commit aebbbf3d80828fc1194de2dc48005e5d7046d798
Author: Levi Yang <levi.yang@coretronic.com>
Date:   Tue Sep 22 14:44:23 2020 +0800

    rk3328 Coretronic BSP porting

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index d439c1a8cc..8b6a503560 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -93,7 +93,7 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=1500000
+CONFIG_BAUDRATE=115200
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2

commit 95fa2ffb2d987f5ef7f4cad038afc8fef89275a0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 5 11:25:01 2019 +0800

    android: change the verification mode
    
    The mode AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE will add
    "androidboot.vbmeta.invalidate_on_error=yes" to cmdline, and kernel
    will invalidate vbmeta if verified fail. This will modify the vbmeta.img
    head and make uboot verify vbmeta.img fail in avb system. And in avb & ab
    system, we can use the retry-count to change slot if verify fail without
    modify the vbmeta. So just use the mode AVB_HASHTREE_ERROR_MODE_RESTART.
    
    Change-Id: I98d60683d5365b996fcca2e85d4847d4a6df2ef6
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    (cherry picked from commit e1c1c23dd865ed05a39291cd1746290e50ce94ad)

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 3bae30de43..04ee524495 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -590,7 +590,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			requested_partitions,
 			slot_suffix,
 			flags,
-			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+			AVB_HASHTREE_ERROR_MODE_RESTART,
 			&slot_data[0]);
 
 	strcat(verify_state, ANDROID_VERIFY_STATE);

commit fe89c774cf95c74693839d49950f5cc9b795acbf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 31 22:01:50 2019 +0800

    fdt: fixup: move board_fdt_fixup the earliest than others
    
    If we update fdt by create or move operation, the fdt nodes offset are
    changed, but device node of DM didn't update its offset linking with the
    fdt node. This makes driver can't parse the right fdt node info.
    
    This is a DM framework bug, we need this patch to workarund it.
    
    Change-Id: I18ee427fe2457ae42e5c6d1dab3e365fe87e06e4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index d564746cf2..8b9ef7de3b 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -40,6 +40,11 @@ __weak int board_fdt_fixup(void *blob)
 int arch_fixup_fdt(void *blob)
 {
 	int ret = 0;
+
+	ret = board_fdt_fixup(blob);
+	if (ret)
+		return ret;
+
 #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT)
 	bd_t *bd = gd->bd;
 	int bank;
@@ -80,9 +85,6 @@ int arch_fixup_fdt(void *blob)
 		return ret;
 #endif
 #endif
-	ret = board_fdt_fixup(blob);
-	if (ret)
-		return ret;
 
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 6cabd2eeff..5d01a652a5 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -562,6 +562,12 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
 	ulong *initrd_end = &images->initrd_end;
 	int ret = -EPERM;
 	int fdt_ret;
+
+	if (arch_fixup_fdt(blob) < 0) {
+		printf("ERROR: arch-specific fdt fixup failed\n");
+		goto err;
+	}
+
 #if defined(CONFIG_PASS_DEVICE_SERIAL_BY_FDT)
 	if (fdt_root(blob) < 0) {
 		printf("ERROR: root node setup failed\n");
@@ -572,10 +578,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
 		printf("ERROR: /chosen node create failed\n");
 		goto err;
 	}
-	if (arch_fixup_fdt(blob) < 0) {
-		printf("ERROR: arch-specific fdt fixup failed\n");
-		goto err;
-	}
+
 	/* Update ethernet nodes */
 	fdt_fixup_ethernet(blob);
 	if (IMAGE_OF_BOARD_SETUP) {

commit 027166974db1544596d5ff0811a2abffa74efcd4
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Wed Jul 31 08:24:36 2019 +0800

    configs: rk3328_defconfig: enable CONFIG_CMD_DTIMG
    
    Change-Id: Ic15017931d22a0fa3c5b9f92aebc4a5bfe74d780
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 00a283cf34..d439c1a8cc 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -35,6 +35,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

commit 62d77b7e5aa2b75ea7305b51376e2b1c50e43725
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Tue Jul 9 08:36:13 2019 +0800

    drm/rockchip: dw-hdmi: Fix yuv422 display err
    
    When switching from another color to yuv422, neither
    encoder input color nor encoder output color is rgb.
    CSC coeff will be incorrectly selected as
    csc_coeff_full_to_limited, which causes the display
    turn to green. To solve this problem, choose
    csc_coeff_full_to_limited only if the input and output
    colors are both RGB.
    
    Change-Id: If09f53fb2a5aa20359efb548b1a8b7da2c79310d
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    (cherry picked from commit 3f6d16ab3dc9af1e6e05efcd36f4697be8b5548c)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 00a0ba4331..6f1b333df3 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -1170,7 +1170,7 @@ static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
 	enc_in_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format);
 
 	if (is_color_space_conversion(hdmi)) {
-		if (enc_out_rgb == enc_in_rgb) {
+		if (enc_out_rgb && enc_in_rgb) {
 			csc_coeff = &csc_coeff_full_to_limited;
 			csc_scale = 0;
 		} else if (enc_out_rgb) {

commit 1e698ade381c4fe82e0396adfe0365833ca8b329
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Mar 21 10:23:30 2019 +0800

    drm/rockchip: dw-hdmi: Support hdmi quantization range setting
    
    Adding hdmi quantization range switching function. The current
    version use default quant range, subsequent version will keep consistent
    with the kernel Setting.
    
    Change-Id: Ibb93f7c08d72322caa15f12b1d6e1f901371b27b
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
    (cherry picked from commit b5016cf2d5ee50c93382cc5148a4aea6b73ee84c)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 02b42c1941..f31b01c1de 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -2747,6 +2747,24 @@ static void drm_parse_hdmi_forum_vsdb(struct hdmi_edid_data *data,
 	drm_parse_ycbcr420_deep_color_info(data, hf_vsdb);
 }
 
+/**
+ * drm_default_rgb_quant_range - default RGB quantization range
+ * @mode: display mode
+ *
+ * Determine the default RGB quantization range for the mode,
+ * as specified in CEA-861.
+ *
+ * Return: The default RGB quantization range for the mode
+ */
+enum hdmi_quantization_range
+drm_default_rgb_quant_range(struct drm_display_mode *mode)
+{
+	/* All CEA modes other than VIC 1 use limited quantization range. */
+	return drm_match_cea_mode(mode) > 1 ?
+		HDMI_QUANTIZATION_RANGE_LIMITED :
+		HDMI_QUANTIZATION_RANGE_FULL;
+}
+
 static void drm_parse_hdmi_deep_color_info(struct hdmi_edid_data *data,
 					   const u8 *hdmi)
 {
@@ -5156,6 +5174,50 @@ static int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)
 	return 0;
 }
 
+/**
+ * drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
+ *                                        quantization range information
+ * @frame: HDMI AVI infoframe
+ * @rgb_quant_range: RGB quantization range (Q)
+ * @rgb_quant_range_selectable: Sink support selectable RGB quantization range (QS)
+ */
+void
+drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
+				   struct drm_display_mode *mode,
+				   enum hdmi_quantization_range rgb_quant_range,
+				   bool rgb_quant_range_selectable)
+{
+	/*
+	 * CEA-861:
+	 * "A Source shall not send a non-zero Q value that does not correspond
+	 *  to the default RGB Quantization Range for the transmitted Picture
+	 *  unless the Sink indicates support for the Q bit in a Video
+	 *  Capabilities Data Block."
+	 *
+	 * HDMI 2.0 recommends sending non-zero Q when it does match the
+	 * default RGB quantization range for the mode, even when QS=0.
+	 */
+	if (rgb_quant_range_selectable ||
+	    rgb_quant_range == drm_default_rgb_quant_range(mode))
+		frame->quantization_range = rgb_quant_range;
+	else
+		frame->quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
+
+	/*
+	 * CEA-861-F:
+	 * "When transmitting any RGB colorimetry, the Source should set the
+	 *  YQ-field to match the RGB Quantization Range being transmitted
+	 *  (e.g., when Limited Range RGB, set YQ=0 or when Full Range RGB,
+	 *  set YQ=1) and the Sink shall ignore the YQ-field."
+	 */
+	if (rgb_quant_range == HDMI_QUANTIZATION_RANGE_LIMITED)
+		frame->ycc_quantization_range =
+			HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
+	else
+		frame->ycc_quantization_range =
+			HDMI_YCC_QUANTIZATION_RANGE_FULL;
+}
+
 static enum hdmi_3d_structure
 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
 {
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index c95614367f..00a0ba4331 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -111,6 +111,12 @@ static const u16 csc_coeff_rgb_in_eitu709[3][4] = {
 	{ 0x6756, 0x78ab, 0x2000, 0x0200 }
 };
 
+static const u16 csc_coeff_full_to_limited[3][4] = {
+	{ 0x36f7, 0x0000, 0x0000, 0x0040 },
+	{ 0x0000, 0x36f7, 0x0000, 0x0040 },
+	{ 0x0000, 0x0000, 0x36f7, 0x0040 }
+};
+
 struct hdmi_vmode {
 	bool mdataenablepolarity;
 
@@ -125,6 +131,7 @@ struct hdmi_data_info {
 	unsigned int enc_out_bus_format;
 	unsigned int enc_in_encoding;
 	unsigned int enc_out_encoding;
+	unsigned int quant_range;
 	unsigned int pix_repet_factor;
 	struct hdmi_vmode video_mode;
 };
@@ -327,8 +334,26 @@ static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
 
 static int is_color_space_conversion(struct dw_hdmi *hdmi)
 {
-	return hdmi->hdmi_data.enc_in_bus_format !=
-	hdmi->hdmi_data.enc_out_bus_format;
+	struct drm_display_mode *mode =
+		hdmi->edid_data.preferred_mode;
+	bool is_cea_default;
+
+	is_cea_default = (drm_match_cea_mode(mode) > 1) &&
+			 (hdmi->hdmi_data.quant_range ==
+			  HDMI_QUANTIZATION_RANGE_DEFAULT);
+
+	/*
+	 * When output is rgb limited range or default range with
+	 * cea mode, csc should be enabled.
+	 */
+	if (hdmi->hdmi_data.enc_in_bus_format !=
+	    hdmi->hdmi_data.enc_out_bus_format ||
+	    ((hdmi->hdmi_data.quant_range == HDMI_QUANTIZATION_RANGE_LIMITED ||
+	      is_cea_default) &&
+	     hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format)))
+		return 1;
+
+	return 0;
 }
 
 static int is_color_space_decimation(struct dw_hdmi *hdmi)
@@ -1139,16 +1164,22 @@ static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
 	const u16 (*csc_coeff)[3][4] = &csc_coeff_default;
 	unsigned i;
 	u32 csc_scale = 1;
+	int enc_out_rgb, enc_in_rgb;
+
+	enc_out_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format);
+	enc_in_rgb = hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format);
 
 	if (is_color_space_conversion(hdmi)) {
-		if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
+		if (enc_out_rgb == enc_in_rgb) {
+			csc_coeff = &csc_coeff_full_to_limited;
+			csc_scale = 0;
+		} else if (enc_out_rgb) {
 			if (hdmi->hdmi_data.enc_out_encoding ==
 						V4L2_YCBCR_ENC_601)
 				csc_coeff = &csc_coeff_rgb_out_eitu601;
 			else
 				csc_coeff = &csc_coeff_rgb_out_eitu709;
-		} else if (hdmi_bus_fmt_is_rgb(
-					hdmi->hdmi_data.enc_in_bus_format)) {
+		} else if (enc_in_rgb) {
 			if (hdmi->hdmi_data.enc_out_encoding ==
 						V4L2_YCBCR_ENC_601)
 				csc_coeff = &csc_coeff_rgb_in_eitu601;
@@ -1513,6 +1544,8 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
 	struct hdmi_avi_infoframe frame;
 	u8 val;
 	bool is_hdmi2 = false;
+	enum hdmi_quantization_range rgb_quant_range =
+		hdmi->hdmi_data.quant_range;
 
 	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) ||
 	    hdmi->edid_data.display_info.hdmi.scdc.supported)
@@ -1520,6 +1553,12 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
 	/* Initialise info frame from DRM mode */
 	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2);
 
+	/*
+	 * Ignore monitor selectable quantization, use quantization set
+	 * by the user
+	 */
+	drm_hdmi_avi_infoframe_quant_range(&frame, mode, rgb_quant_range,
+					   true);
 	if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
 		frame.colorspace = HDMI_COLORSPACE_YUV444;
 	else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
@@ -2034,6 +2073,13 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 			hdmi->plat_data->input_bus_encoding;
 	else
 		hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
+
+	if (hdmi->plat_data->get_quant_range)
+		hdmi->hdmi_data.quant_range =
+			hdmi->plat_data->get_quant_range(data);
+	else
+		hdmi->hdmi_data.quant_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
+
 	/*
 	 * According to the dw-hdmi specification 6.4.2
 	 * vp_pr_cd[3:0]:
diff --git a/include/edid.h b/include/edid.h
index 1ac641c963..7e52b325fd 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -847,6 +847,8 @@ bool drm_detect_hdmi_monitor(struct edid *edid);
 bool drm_detect_monitor_audio(struct edid *edid);
 int do_cea_modes(struct hdmi_edid_data *data, const u8 *db, u8 len);
 int drm_do_get_edid(struct ddc_adapter *adap, u8 *edid);
+enum hdmi_quantization_range
+drm_default_rgb_quant_range(struct drm_display_mode *mode);
 u8 drm_scdc_readb(struct ddc_adapter *adap, u8 offset,
 		  u8 *value);
 u8 drm_scdc_writeb(struct ddc_adapter *adap, u8 offset,
diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
index 8b0b8fa6e2..6a9f473741 100644
--- a/include/linux/dw_hdmi.h
+++ b/include/linux/dw_hdmi.h
@@ -163,6 +163,7 @@ struct dw_hdmi_plat_data {
 	unsigned long (*get_output_bus_format)(void *data);
 	unsigned long (*get_enc_in_encoding)(void *data);
 	unsigned long (*get_enc_out_encoding)(void *data);
+	unsigned long (*get_quant_range)(void *data);
 };
 
 #endif /* __IMX_HDMI_H__ */
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index 70a8e36755..005d34a8fc 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -322,6 +322,11 @@ int
 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
 					 struct drm_display_mode *mode,
 					 bool is_hdmi2_sink);
+void
+drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
+				   struct drm_display_mode *mode,
+				   enum hdmi_quantization_range rgb_quant_range,
+				   bool rgb_quant_range_selectable);
 u8 drm_match_cea_mode(struct drm_display_mode *to_match);
 
 #endif /* _DRM_HDMI_H */

commit 8badd7d226b68c10460abcdd7dfc929901b19340
Merge: e0d6c5c68d 1bca07a1ff
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Jun 28 16:13:06 2019 +0800

    Merge branch 'next-dev' into stable-4.4-rk3328-box-9.0
    
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    
    Conflicts:
            arch/arm/mach-rockchip/board.c
            common/android_bootloader.c
            common/attestation_key.c
            common/boot_rkimg.c
            common/console.c
            common/write_keybox.c
            configs/rk3328_defconfig
            drivers/usb/gadget/f_rockusb.c
            include/write_keybox.h
            lib/avb/libavb_user/Kconfig
            lib/avb/libavb_user/avb_ops_user.c
            lib/optee_clientApi/OpteeClientInterface.c
            lib/optee_clientApi/OpteeClientRPC.c
            lib/optee_clientApi/OpteeClientRkFs-v2.c
            lib/optee_clientApi/OpteeClientRkFs.c
    
    Change-Id: I892237502f67978bfb83a34240e05c06dad0056d

commit 1bca07a1ff24a92d23e0dcef5969ef670ac4510a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Jun 28 11:12:39 2019 +0800

    usb: gadget: composite: add null pointer check
    
    The cdev->config means the currently active configuration and
    it might be null, fix it by adding null pointer check.
    
    Change-Id: I18261653436186c342b447c24ef46a8acc42825f
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 90cbdddd28..eddb45bf27 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -958,10 +958,14 @@ unknown:
 		 */
 		switch (ctrl->bRequestType & USB_RECIP_MASK) {
 		case USB_RECIP_INTERFACE:
+			if (!cdev->config)
+				break;
 			f = cdev->config->interface[intf];
 			break;
 
 		case USB_RECIP_ENDPOINT:
+			if (!cdev->config)
+				break;
 			endp = ((w_index & 0x80) >> 3) | (w_index & 0x0f);
 			list_for_each_entry(f, &cdev->config->functions, list) {
 				if (test_bit(endp, f->endpoints))

commit 87f9541a897790acf69f9c6ea8c600740649c91f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jun 27 15:10:33 2019 +0800

    common: android: fix tries_remaining minus twice in avb & ab system
    
    Change-Id: I422cb3c2f7e28849772a65b8060a0d8e26313d47
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d7e497fa1b..20bbad5049 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -675,7 +675,11 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	}
 
 out:
-#ifdef CONFIG_ANDROID_AB
+#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+	/*
+	 * In ab & avb process, the tries_remaining minus one in function
+	 * android_slot_verify, shield this function here.
+	 */
 	/* ... and decrement tries remaining, if applicable. */
 	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
 	    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {

commit c9289edddb6dac0ab309a1bc98b62a743dd6d565
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 20:40:05 2019 +0800

    mtd: mtd_blk: reserve one block space for gpt table
    
    Reserve one block space for gpt table in mtd part info,
    otherwise gpt table will be erased by user program.
    
    Change-Id: I0545c55f7da2b5518ab766ed763b074b7558fd4f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index fb4aa283f0..81f4b137e5 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -25,6 +25,7 @@ char *mtd_part_parse(void)
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
 	char *mtd_part_info_p;
+	struct mtd_info *mtd;
 	char *mtd_part_info;
 	int ret;
 	int p;
@@ -33,6 +34,7 @@ char *mtd_part_parse(void)
 	if (!dev_desc)
 		return NULL;
 
+	mtd = (struct mtd_info *)dev_desc->bdev->priv;
 	mtd_part_info = (char *)calloc(MTD_PART_INFO_MAX_SIZE, sizeof(char));
 	if (!mtd_part_info) {
 		printf("%s: Fail to malloc!", __func__);
@@ -65,7 +67,15 @@ char *mtd_part_parse(void)
 			 info.name);
 		strcat(mtd_part_info, ",");
 		if (part_get_info(dev_desc, p + 1, &info)) {
-			snprintf(mtd_part_info_p, data_len - 1, "-@0x%x(%s)",
+			/* Nand flash is erased by block and gpt table just
+			 * resserve 33 sectors for the last partition. This
+			 * will erase the backup gpt table by user program,
+			 * so reserve one block.
+			 */
+			snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+				 (int)(size_t)(info.size -
+				 (info.size - 1) %
+				 (mtd->erasesize >> 9) - 1) << 9,
 				 (int)(size_t)info.start << 9,
 				 info.name);
 			break;
@@ -144,6 +154,7 @@ static int mtd_blk_probe(struct udevice *udev)
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
 	struct mtd_info *mtd = dev_get_priv(udev->parent);
 
+	desc->bdev->priv = mtd;
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));

commit 06c1e1b3ae61762c1e2da34cd2bd92dd8234af3f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 14:42:06 2019 +0800

    cmd: rockusb: fix usb serial number bug
    
    Some special characters will be treated as a path in windows environment,
    such as '\\' and '/'. If the usb upload its serial number with these
    special characters, the usb drive will unwork. So use '_' to replace them.
    
    Change-Id: Ic249316f2b03b0dcb73680078f122e23003e6e3d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index c25df454a9..804adb05ab 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -175,8 +175,23 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	}
 
 	s = env_get("serial#");
-	if (s)
-		g_dnl_set_serialnumber((char *)s);
+	if (s) {
+		char *sn = (char *)calloc(strlen(s) + 1, sizeof(char));
+		char *sn_p = sn;
+
+		if (!sn)
+			goto cleanup_board;
+
+		memcpy(sn, s, strlen(s));
+		while (*sn_p) {
+			if (*sn_p == '\\' || *sn_p == '/')
+				*sn_p = '_';
+			sn_p++;
+		}
+
+		g_dnl_set_serialnumber(sn);
+		free(sn);
+	}
 
 	rc = g_dnl_register("rkusb_ums_dnl");
 	if (rc) {

commit 4d432d92ae5a77719609ebd4d4a1160c156e7e0d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 16:14:52 2019 +0800

    common: android: fix missing "root=" with linux a/b & avb system
    
    Change-Id: I2f8320eb4f81f88e7ba1f2d62eee55010f243df5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c8803524a3..d7e497fa1b 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -50,7 +50,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define OEM_UNLOCK_ARG_SIZE 30
 #define UUID_SIZE 37
 
-#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+#ifdef CONFIG_ANDROID_AB
 static int get_partition_unique_uuid(char *partition,
 				     char *guid_buf,
 				     size_t guid_buf_size)
@@ -1055,20 +1055,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
-#if (defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB))
-	{
-		char root_partition[20] = {0};
-		char guid_buf[UUID_SIZE] = {0};
-		char root_partuuid[70] = "root=PARTUUID=";
-
-		strcat(root_partition, ANDROID_PARTITION_SYSTEM);
-		strcat(root_partition, slot_suffix);
-		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
-		strcat(root_partuuid, guid_buf);
-		env_update("bootargs", root_partuuid);
-	}
-#endif
-
 #ifdef CONFIG_ANDROID_AB
 		mode_cmdline = "skip_initramfs";
 #endif
@@ -1141,6 +1127,26 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 #endif
 
+#ifdef CONFIG_ANDROID_AB
+	/* In android a/b & avb process, the "root=" will be add which parameter
+	 * is in vbmeta.In linux a/b & avb process, the "root=" must be add by
+	 * follow code. To be compatible with the above two processes, test it
+	 * is necessary to add "root=".
+	 */
+	char root_partition[20] = {0};
+	char guid_buf[UUID_SIZE] = {0};
+	char root_partuuid[70] = "root=PARTUUID=";
+	char *boot_args = env_get("bootargs");
+
+	if (!strstr(boot_args, "root=")) {
+		strcat(root_partition, ANDROID_PARTITION_SYSTEM);
+		strcat(root_partition, slot_suffix);
+		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
+		strcat(root_partuuid, guid_buf);
+		env_update("bootargs", root_partuuid);
+	}
+#endif
+
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
 	env_set("android_slotsufix", slot_suffix);

commit 139d645e197c33b6ffa7e3fc08cd14760ab76c8d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 26 16:51:06 2019 +0800

    rockchip: dts: rk3308: fix compile warning
    
    The warning message is ""reg" property in /nandc@ff4b0000/nand@0
    has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)".
    
    Change-Id: I06d4eca600e29d3c00a7888055c7526f9f5cd779
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 98ebde2b9a..22ae949a19 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -31,6 +31,9 @@
 &nandc {
 	u-boot,dm-pre-reloc;
 	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
 	nand@0 {
 		u-boot,dm-spl;
 		reg = <0>;
@@ -93,4 +96,4 @@
 
 &route_rgb {
 	status = "disabled";
-};
\ No newline at end of file
+};

commit edf8d43c0e7530bfbfed35ca5c7b736e3bd461e7
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Jun 24 15:35:25 2019 +0800

    drm/rockchip: vop: use win1 for ui instead of win0 in rk3399 vopl
    
    RK3399's VOPL has win0 and win1 layers.The formats they support as below:
    Win0:  XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
    Win1:  XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16
    
    Only the win0 layer supports NV12 format(for video decode).
    So change to use win0 for video overlay layer and win1 for ui layer.
    
    Change-Id: I2168b48d78e2a27fd93b12646952518d7bb529f2
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index fab350ba25..12b7bd7b6d 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -203,6 +203,19 @@ const struct vop_data rk3288_vop_lit = {
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
 };
 
+static const struct vop_win rk3368_win23_data = {
+	.enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
+	.format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
+	.ymirror = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),
+	.rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
+	.dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),
+	.src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xffff, 0),
+	.dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xffffffff, 0),
+};
+
 static const struct vop_line_flag rk3368_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
 	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
@@ -288,7 +301,7 @@ const struct vop_data rk3399_vop_lit = {
 	.version = VOP_VERSION(3, 6),
 	.max_output = {2560, 1600},
 	.ctrl = &rk3288_ctrl_data,
-	.win = &rk3288_win01_data,
+	.win = &rk3368_win23_data,
 	.line_flag = &rk3366_vop_line_flag,
 	.csc_table = &rk3399_csc_table,
 	.win_csc = &rk3399_win0_csc,

commit 5fc2a70c781a061ba5b2e88f8a1bd6ca1fa931ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 13:09:42 2019 +0800

    power: charge animation: allow ctrl+c to exit extrem low charging
    
    Change-Id: I736c2617a4d51085bc91377f1013d7f4b198c9fc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 563ddf38e6..074cfe9066 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -400,6 +400,11 @@ static int charge_extrem_low_power(struct udevice *dev)
 			printf("get voltage failed: %d\n", voltage);
 			continue;
 		}
+
+		if (ctrlc()) {
+			printf("Extrem low charge: exit by ctrl+c\n");
+			break;
+		}
 	}
 
 	autowakeup_timer_uninit();

commit 8526ae77a4f8e53b1beb06459b9321d42b2d0d2f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 10:59:15 2019 +0800

    rockchip: board: ignore cru phandle fix for miss match phandle
    
    This miss match phandle maybe "&pmucru" phandle.
    (fixes: 3e45175 rockchip: board: fixup cru phandle for all U-Boot node.)
    
    Change-Id: If053c1d329264967b1d0f1d3dce8f62aea3b69c7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4533069e0d..5540749f4f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -263,10 +263,12 @@ static int phandles_fixup(void *fdt)
 					if (first_phandle == -1)
 						first_phandle = clocks[j];
 
-					if (clocks[j] != first_phandle)
-						printf("WARN: %s: first cru phandle=%d, this=%d\n",
-						       dev_read_name(dev),
-						       first_phandle, clocks[j]);
+					if (clocks[j] != first_phandle) {
+						debug("WARN: %s: first cru phandle=%d, this=%d\n",
+						      dev_read_name(dev),
+						      first_phandle, clocks[j]);
+						continue;
+					}
 
 					clocks[j] = phandle;
 				}

commit 8d9f99d87be031c67373355b2e75cf434c15afac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 10:57:36 2019 +0800

    rockchip: atags: atags_get_tag() is useless for TPL
    
    TPL only needs atags_set_tag(), remove atags_get_tag() to
    decrease u-boot-tpl.bin size.
    
    Change-Id: If5301db7aa5e4436863741257be617b1d7dcb56a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index be5dfecad7..43fb4b0eaa 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -228,6 +228,7 @@ int atags_set_tag(u32 magic, void *tagdata)
 	return 0;
 }
 
+#ifndef CONFIG_TPL_BUILD
 struct tag *atags_get_tag(u32 magic)
 {
 	u32 *hash, calc_hash, size;
@@ -266,6 +267,9 @@ struct tag *atags_get_tag(u32 magic)
 
 	return NULL;
 }
+#else
+struct tag *atags_get_tag(u32 magic) { return NULL; }
+#endif
 
 void atags_destroy(void)
 {

commit 9a3dcb5be4bca5f9ac86334c8dd323a3c11f523b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 15:01:56 2019 +0800

    rockchip: board: add hotkey "ctrl+s" to enter cli loop
    
    Right after "Starting kernel..." and before jumpping to kernel.
    
    Change-Id: I59bec92b0727b6ff62d2c4f461e99c5a7f6f5426
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 187d4cd730..4533069e0d 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -578,6 +578,7 @@ int board_initr_caches_fixup(void)
 void board_quiesce_devices(void)
 {
 	hotkey_run(HK_CMDLINE);
+	hotkey_run(HK_CLI);
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	/* Destroy atags makes next warm boot safer */

commit 4fe75b5b95efdd8669908a3529d2869f71319d82
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 09:16:33 2019 +0800

    rockchip: hotkey: add comments for hotkey definitions
    
    Change-Id: I710bd7f2a1c393397f8e5536528a6fe5817fa392
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index 9d65ef137d..32e6b1e513 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -12,13 +12,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define CTRL_B		0x02
-#define CTRL_D		0x04
-#define CTRL_F		0x06
-#define CTRL_I		0x09
-#define CTRL_M		0x0d
-#define CTRL_P		0x10
-#define CTRL_S		0x13
+#define CTRL_B		0x02	/* bootrom mode */
+#define CTRL_D		0x04	/* download mde */
+#define CTRL_F		0x06	/* fastboot mode */
+#define CTRL_I		0x09	/* inicall debug for kernel */
+#define CTRL_M		0x0d	/* memory(sysmem/bidram) */
+#define CTRL_P		0x10	/* parameter(cmdline) dump */
+#define CTRL_S		0x13	/* shell(cli) */
 
 bool is_hotkey(enum hotkey_t id)
 {

commit 9b78eaa402249d32e9021d6a109fe038b637069f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 15:01:01 2019 +0800

    rockchip: hotkey: support ctrl+s enter cli loop
    
    Change-Id: I4e0bc24c38f9bada07bc09a563cfd4385c6265f2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
index cd2764612a..8d0709e290 100644
--- a/arch/arm/include/asm/arch-rockchip/hotkey.h
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -9,6 +9,7 @@
 enum hotkey_t {
 	HK_INVAL,
 	HK_BROM_DNL,
+	HK_CLI,
 	HK_CMDLINE,
 	HK_FASTBOOT,
 	HK_INITCALL,
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index 478c9f9e19..9d65ef137d 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <bidram.h>
+#include <cli.h>
 #include <console.h>
 #include <sysmem.h>
 #include <asm/arch/hotkey.h>
@@ -17,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_I		0x09
 #define CTRL_M		0x0d
 #define CTRL_P		0x10
+#define CTRL_S		0x13
 
 bool is_hotkey(enum hotkey_t id)
 {
@@ -57,6 +59,15 @@ void hotkey_run(enum hotkey_t id)
 		if (gd->console_evt == CTRL_I)
 			env_update("bootargs", "initcall_debug debug");
 		break;
+	case HK_CLI:
+		/* Disable enter cli by hotkey*/
+#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
+		break;
+#endif
+		if (gd->console_evt == CTRL_S)
+			cli_loop();
+		break;
 	default:
 		break;
 	}

commit 266906806d575639cc921e88920a370d72ef9448
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Jun 26 10:15:31 2019 +0800

    lib: optee_client: init rpmb before find_mmc_device
    
    Change-Id: I1f2c3d76c9015f1a59822314df5e92b6355c7827
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 5fb9eeb6c4..948c88f501 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -408,7 +408,21 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	}
 
 	case TEE_RPC_RPMB_CMD_GET_DEV_INFO: {
+		if (init_rpmb()) {
+			TeecResult = TEEC_ERROR_GENERIC;
+			goto Exit;
+		}
+
 		mmc = do_returnmmc();
+		if (finish_rpmb()) {
+			TeecResult = TEEC_ERROR_GENERIC;
+			goto Exit;
+		}
+
+		if (mmc == NULL) {
+			TeecResult = TEEC_ERROR_GENERIC;
+			goto Exit;
+		}
 
 		DevInfo = (struct tee_rpc_rpmb_dev_info *)(size_t)
 		TeeSmc32Param[1].u.memref.buf_ptr;

commit 6d5e65664316b8fb1ebdcc98f976299b7562cb99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:04:59 2019 +0800

    common: android: add sysmem overflow check
    
    Change-Id: I263bbc9f9f2a71322591ef3528b8fa6039eb3509
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 313d80ed71..c8803524a3 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -422,6 +422,9 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 				       comp_type))
 		return -1;
 
+	/* Check sysmem overflow */
+	sysmem_overflow_check();
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;

commit 0c4b2feaa336cb59b67fbdbb411ad7c470116afd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:04:01 2019 +0800

    common: rkimg: add sysmem overflow check
    
    Change-Id: I9892482f672290dbc65cda7734b52bffba06996f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index ba28da4ae2..e0d64bcae0 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -561,6 +561,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	fdt_ramdisk_skip_relocation();
 	hotkey_run(HK_SYSMEM);
 
+	/* Check sysmem overflow */
+	sysmem_overflow_check();
+
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
@@ -587,6 +590,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 
 	hotkey_run(HK_SYSMEM);
 
+	/* Check sysmem overflow */
+	sysmem_overflow_check();
+
 	boot_lmb_init(&images);
 	images.ep = kernel_addr_r;
 	images.initrd_start = ramdisk_addr_r;

commit 2c66f6f37e202feb856b17b93ee024e0fe082e56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:03:36 2019 +0800

    lib: sysmem: add sysmem overflow check support
    
    Change-Id: Ifcb6e8cd59656b133f56115d104a1bba017c7c1b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
index 2a51898388..6c869746b3 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -113,10 +113,15 @@ bool sysmem_can_alloc(phys_size_t base, phys_size_t size);
 int sysmem_free(phys_addr_t base);
 
 /**
- * sysmem_dump() - Dump all sysmem region state and check overflow
+ * sysmem_dump() - Dump all sysmem region state
  */
 void sysmem_dump(void);
 
+/**
+ * sysmem_overflow_check() - Sysmem regions overflow check
+ */
+void sysmem_overflow_check(void);
+
 /**
  * board_sysmem_reserve() - Weak function for board to implement
  *
@@ -131,6 +136,8 @@ static inline int sysmem_init(void) { return 0; }
 static inline int sysmem_initr(void) { return 0; }
 static inline int sysmem_free(phys_addr_t base) { return 0; }
 static inline void sysmem_dump(void) {}
+void sysmem_overflow_check(void) {}
+
 __weak int board_sysmem_reserve(struct sysmem *sysmem) { return 0; }
 
 static inline void *sysmem_alloc(enum memblk_id id, phys_size_t size)
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 430ba7e684..76ef3b280a 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -123,6 +123,41 @@ void sysmem_dump(void)
 	printf("    --------------------------------------------------------------------\n\n");
 }
 
+void sysmem_overflow_check(void)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct list_head *node;
+	struct memcheck *check;
+	struct memblock *mem;
+	int overflow;
+
+	if (!sysmem_has_init())
+		return;
+
+	list_for_each(node, &sysmem->allocated_head) {
+		mem = list_entry(node, struct memblock, node);
+		if (mem->attr.flags & M_ATTR_OFC) {
+			check = (struct memcheck *)
+				(mem->base + mem->size - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else if (mem->attr.flags & M_ATTR_HOFC) {
+			check = (struct memcheck *)
+				(mem->base - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else {
+			overflow = 0;
+		}
+
+		if (overflow)
+			break;
+	}
+
+	if (overflow) {
+		SYSMEM_E("Found there is region overflow!\n");
+		sysmem_dump();
+	}
+}
+
 static inline int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
 				    phys_addr_t base2, phys_size_t size2)
 {

commit c7c0bd59567b5478ce7c15ca5f8dcef8712575da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 26 08:52:54 2019 +0800

    rockchip: memblk: add M_ATTR_CACHELINE_ALIGN for AVB memblk
    
    The alloc region for storage read/write should be aligned to
    cacheline size.
    
    Change-Id: Ib529a5f62d3937b66b0d325a49feb22eacb04317
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index cec5be6fdb..d9f92a2626 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -67,7 +67,7 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 	},
 	[MEMBLK_ID_AVB_ANDROID]  =	{
 		.name = "AVB_ANDROID",
-		.flags = M_ATTR_OFC,
+		.flags = M_ATTR_OFC | M_ATTR_CACHELINE_ALIGN,
 	},
 };
 

commit 556bbbe4367a4bc302d7b99160ecfc4eefa35414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 25 21:01:02 2019 +0800

    lib: sysmem: add M_ATTR_CACHELINE_ALIGN support
    
    If alloc buffer for storage read/write should be aligned to
    cacheline size, please add the M_ATTR_CACHELINE_ALIGN flag
    for this region.
    
    Change-Id: I1e5d46405ddacfadd1cdb4670f943996d9b66426
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/memblk.h b/include/memblk.h
index 90429caad2..eccfbcd508 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -63,5 +63,7 @@ extern const struct memblk_attr *mem_attr;
 #define M_ATTR_OVERLAP		(1 << 2)
 /* Just peek, always return success */
 #define M_ATTR_PEEK		(1 << 3)
+/* The region start address should be aligned to cacheline size */
+#define M_ATTR_CACHELINE_ALIGN	(1 << 4)
 
 #endif /* _MEMBLK_H */
diff --git a/lib/sysmem.c b/lib/sysmem.c
index ae7e331f07..430ba7e684 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -276,6 +276,19 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		goto out;
 	}
 
+	/*
+	 * Some modules use "sysmem_alloc()" to alloc region for storage
+	 * read/write buffer, it should be aligned to cacheline size. eg: AVB.
+	 *
+	 * Aligned down to cacheline size if not aligned, otherwise the tail
+	 * of region maybe overflow.
+	 */
+	if (attr.flags & M_ATTR_CACHELINE_ALIGN &&
+	    !IS_ALIGNED(base, ARCH_DMA_MINALIGN)) {
+		base = ALIGN(base, ARCH_DMA_MINALIGN);
+		base -= ARCH_DMA_MINALIGN;
+	}
+
 	if (!IS_ALIGNED(base, 4)) {
 		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n",
 			 name, (ulong)base);

commit 3bce84dba85402c44b91f769739fb82e2e0f92f4
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Jun 20 14:58:59 2019 +0800

    rockchip: dts: rk3308: add nandc config for mtd nand drivers
    
    Change-Id: I50657ce5d9f021d42471d0e0b15471b7b6788cef
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 4da226322c..98ebde2b9a 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -8,6 +8,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &nandc, &emmc;
 	};
 };
 
@@ -30,6 +31,13 @@
 &nandc {
 	u-boot,dm-pre-reloc;
 	status = "okay";
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <16>;
+		nand-ecc-step-size = <1024>;
+	};
 };
 
 &sfc {

commit b75a3992f51dfe87495f9eaf962c28a0fe9591b8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 25 21:59:03 2019 +0800

    cmd: mmc: find current device first before find mmc device
    
    Find the current device before find mmc device, otherwise '-1'
    will be use as curr_device and error occur. The error log is
    "MMC Device -1 not found".
    
    Change-Id: Id6157f73d006f4bbe1c4d105244eb59ca7290c13
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index f802f6b9e1..0813330c07 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -188,6 +188,15 @@ int init_rpmb(void)
 {
 	struct mmc *mmc;
 
+	if (curr_device < 0) {
+		if (get_mmc_num() > 0) {
+			curr_device = 0;
+		} else {
+			printf("No MMC device available\n");
+			return CMD_RET_FAILURE;
+		}
+	}
+
 	mmc = init_mmc_device(curr_device, false);
 	if (!mmc)
 		return CMD_RET_FAILURE;

commit 278b570da47f73b08c435440ffd32a6711e871a1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 25 17:53:27 2019 +0800

    common: fdt_support: correct function part_mtd_parse to mtd_part_parse
    
    Change-Id: I935696c9aff9f464e5e625dd96f0acde67f60c8c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index c13287e574..4d3547c452 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -323,7 +323,7 @@ int fdt_chosen(void *fdt)
 				env_update("bootargs", bootargs);
 #endif
 #ifdef CONFIG_MTD_BLK
-				char *mtd_par_info = part_mtd_parse();
+				char *mtd_par_info = mtd_part_parse();
 
 				if (mtd_par_info) {
 					if (memcmp(env_get("devtype"), "mtd", 3) == 0)

commit 059ed03284aea1a35c7f54a0119d9f0a3ec6707d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 12:06:07 2019 +0800

    disk: rkparm: fix get partition issue
    
    Without this patch, it always returns the last partition when
    "idx" is larger than the last partititon.
    
    Change-Id: I1d126861327c02cab7dd8cc00dd0800651f7da3c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 8383b641de..15ec243852 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -271,8 +271,8 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 		part_num ++;
 	}
 
-	if (part_num > idx) {
-		printf("%s Invalid partition no.%d\n", __func__, idx);
+	if (part_num < idx) {
+		debug("%s Invalid partition no.%d\n", __func__, idx);
 		return -EINVAL;
 	}
 

commit e91ae64f65ce5df6e5f4321828aefcc9d0034dc0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Jun 25 11:21:58 2019 +0800

    lib: rockchip: nand: modify udevice_id to compatible with NAND driver include FTL
    
    Modify the opensource nandc driver to compatible with
    the NAND driver include FTL，which used udevice_id
    "rockchip,rk-nandc".
    
    Change-Id: I67b9beb43b9935f88c98802f6df3507248324a12
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 863d6142e7..a6e3bccb0a 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -71,7 +71,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
-	COMPAT(ROCKCHIP_NANDC, "rockchip,nandc"),
+	COMPAT(ROCKCHIP_NANDC, "rockchip,rk-nandc"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

commit 8623fa54b3c007618cdc9f26bfb7b0ae1e8f89c4
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Jun 20 14:49:56 2019 +0800

    rockchip: nand: modify udevice_id to compatible with NAND driver include FTL
    
    Modify the opensource nandc driver to compatible with
    the NAND driver include FTL，which used udevice_id
    "rockchip,rk-nandc".
    
    Change-Id: I8dda456aed89e15b2b9885e8d9d723f2d2e84ccb
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index 1d0c27b7cc..2b9bde9604 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -639,7 +639,7 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 
 #ifdef CONFIG_NAND_ROCKCHIP_DT
 static const struct udevice_id rockchip_nandc_ids[] = {
-	{ .compatible = "rockchip,nandc" },
+	{ .compatible = "rockchip,rk-nandc" },
 	{ }
 };
 
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
index 76b36032b5..aa4cd1c4df 100644
--- a/drivers/mtd/nand/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -640,7 +640,7 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 
 #ifdef CONFIG_NAND_ROCKCHIP_DT
 static const struct udevice_id rockchip_nandc_ids[] = {
-	{ .compatible = "rockchip,nandc" },
+	{ .compatible = "rockchip,rk-nandc" },
 	{ }
 };
 

commit 6a20f1c71f36fae15a116ae9a4fab2a6de0ee437
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 12:05:21 2019 +0800

    disk: rkparm: check return value only when do initialization
    
    Change-Id: Id2f9e6a7c5843e5d277a70797c4a3a2768230c14
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 6d9221f6b6..8383b641de 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -256,12 +256,12 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 	}
 
 	if (list_empty(&parts_head) ||
-	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum))) {
 		ret = rkparm_init_param(dev_desc, &parts_head);
-
-	if (ret) {
-		printf("%s Invalid rkparm partition\n", __func__);
-		return -1;
+		if (ret) {
+			printf("%s Invalid rkparm partition\n", __func__);
+			return -1;
+		}
 	}
 
 	list_for_each(node, &parts_head) {

commit 24f9e652a5e0459a0a66e0502e4b47654759b2e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 10:26:29 2019 +0800

    tools: rockchip: boot_merger: add option to enable rc4 flag
    
    The legacy chips like rk3188 maskrom require all IDB data with RC4,
    the boot_merger pack the loader with a rc4 flag in header,
    and the upgrade_tool will write the data with rc4 to IDB area.
    
    usage:
    boot_merger --rc4 RKBOOT/RK310BMINIALL.ini
    
    and you can see log below if success with RC4:
    * enable RC4 for IDB data(both ddr and preloader)
    
    Test on rk3188.
    
    Change-Id: If221a32a462bb43bef67aae802adff5e1e8436ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index eec0b3c2c3..48c87530c9 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -26,6 +26,7 @@ char gSubfix[MAX_LINE_LEN] = OUT_SUBFIX;
 char gEat[MAX_LINE_LEN];
 char *gConfigPath;
 uint8_t *gBuf;
+bool enableRC4 = false;
 
 static uint32_t g_merge_max_size = MAX_MERGE_SIZE;
 
@@ -770,9 +771,8 @@ static inline void getBoothdr(rk_boot_header *hdr)
 	hdr->loaderNum = gOpts.loaderNum;
 	hdr->loaderOffset = hdr->code472Offset + gOpts.code472Num * hdr->code472Size;
 	hdr->loaderSize = sizeof(rk_boot_entry);
-#ifndef USE_P_RC4
-	hdr->rc4Flag = 1;
-#endif
+	if (!enableRC4)
+		hdr->rc4Flag = 1;
 }
 
 static inline uint32_t getCrc(const char *path)
@@ -1021,6 +1021,9 @@ int main(int argc, char **argv)
 			merge = true;
 		} else if (!strcmp(OPT_UNPACK, argv[i])) {
 			merge = false;
+		} else if (!strcmp(OPT_RC4, argv[i])) {
+			printf("enable RC4 for IDB data(both ddr and preloader)\n");
+			enableRC4 = true;
 		} else if (!strcmp(OPT_SUBFIX, argv[i])) {
 			i++;
 			snprintf(gSubfix, sizeof(gSubfix), "%s", argv[i]);
diff --git a/tools/rockchip/boot_merger.h b/tools/rockchip/boot_merger.h
index 97586d7cba..3c31b782b1 100644
--- a/tools/rockchip/boot_merger.h
+++ b/tools/rockchip/boot_merger.h
@@ -188,6 +188,7 @@ typedef struct {
 #define OPT_REPLACE         "--replace"
 #define OPT_PREPATH         "--prepath"
 #define OPT_SIZE	    "--size"
+#define OPT_RC4		    "--rc4"
 
 #define OPT_CHIP	"-c"
 #define OPT_471		"-1"

commit 52243bce1370e760206595b1222fa0bf7757f0a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 10:29:01 2019 +0800

    tools: rockchip: loaderimage: add "--prepath" support
    
    Add prefix path of binary path.
    
    Change-Id: I30fe03e0614c7724f452ad8b9d3800acd92db02c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/loaderimage.c b/tools/rockchip/loaderimage.c
index 534dd05149..43cdaa18df 100644
--- a/tools/rockchip/loaderimage.c
+++ b/tools/rockchip/loaderimage.c
@@ -21,6 +21,7 @@ extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
 #define OPT_SIZE "--size"
 #define OPT_VERSION "--version"
 #define OPT_INFO "--info"
+#define OPT_PREPATH             "--prepath"
 
 /* pack or unpack */
 #define MODE_PACK 0
@@ -123,6 +124,8 @@ int main(int argc, char *argv[])
 	char *buf = 0;
 	uint32_t in_size = 0, in_num = 0;
 	char *file_in = NULL, *file_out = NULL;
+	char			*prepath = NULL;
+	char			file_name[1024];
 	uint32_t curr_version = 0;
 
 	if (argc < 3) {
@@ -170,6 +173,8 @@ int main(int argc, char *argv[])
 		} else if (!strcmp(argv[i], OPT_INFO)) {
 			mode = MODE_INFO;
 			file_in = argv[++i];
+		} else if (!strcmp(argv[i], OPT_PREPATH)) {
+			prepath = argv[++i];
 		} else {
 			usage(argv[0]);
 			exit(EXIT_FAILURE);
@@ -206,6 +211,14 @@ int main(int argc, char *argv[])
 			exit(EXIT_FAILURE);
 		}
 		printf("\n load addr is 0x%x!\n", loader_addr);
+
+		/* Add prepath for file_in name */
+		if (prepath && strncmp(prepath, file_in, strlen(prepath))) {
+			strcpy(file_name, prepath);
+			strcat(file_name, file_in);
+			file_in = file_name;
+		}
+
 		if (!file_in || !file_out) {
 			usage(argv[0]);
 			exit(EXIT_FAILURE);

commit 5f0203b77289c3caf17f3dd22395382ad0d3ce57
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 24 10:14:47 2019 +0800

    tools: rockchip: boot_merger: ignore "--prepath" for output path
    
    Change-Id: I89335926cc161c484e813fbd8a699935762f1a34
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index e8ccea3828..eec0b3c2c3 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -149,7 +149,8 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
+	} else if ((ulong)path != (ulong)gOpts.outPath && /* ignore output */
+		    gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);
@@ -318,6 +319,7 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
+	/* fixPath(gOpts.outPath); */
 	printf("out:%s\n", gOpts.outPath);
 	return true;
 }
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index 601d33f9d4..f36b5c8008 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -110,7 +110,8 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
+	} else if ((ulong)path != (ulong)gOpts.outPath && /* ignore output */
+		   gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);
@@ -220,6 +221,7 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
+	/* fixPath(gOpts.outPath); */
 	printf("out:%s\n", gOpts.outPath);
 
 	return true;

commit 29cdb6910002352a04942c2bfa35878be1059bff
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 21 17:24:52 2019 +0800

    common: image-android: print separate load fail message
    
    Change-Id: I2bb06d24ce7cfa22a7c197932b67d6bd2055a03d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index f14ad7d960..67ba1820c0 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -286,7 +286,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 			ret = blk_dread(dev_desc, blk_start,
 					blk_cnt, load_address);
 			if (ret != blk_cnt) {
-				debug("%s: read kernel failed, ret=%d\n",
+				printf("%s: read kernel failed, ret=%d\n",
 				      __func__, ret);
 				return -1;
 			}
@@ -315,7 +315,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 			ret = blk_dread(dev_desc, blk_start,
 					blk_cnt, (void *)ramdisk_addr_r);
 			if (ret != blk_cnt) {
-				debug("%s: read ramdisk failed, ret=%d\n",
+				printf("%s: read ramdisk failed, ret=%d\n",
 				      __func__, ret);
 				return -1;
 			}
@@ -362,7 +362,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 			ret = blk_dread(dev_desc, blk_start, blk_cnt,
 					(void *)fdt_addr_r);
 			if (ret != blk_cnt) {
-				debug("%s: read dtb failed, ret=%d\n",
+				printf("%s: read dtb failed, ret=%d\n",
 				      __func__, ret);
 				return -1;
 			}

commit dd884e9de95bba76222c19284443cf80c8cc3e36
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jun 24 16:36:16 2019 +0800

    configs: rk3368: enable CONFIG_DRM_ROCKCHIP_ANALOGIX_DP
    
    Change-Id: Ice335cd1535cf4318629d2943b372eb4c030b902
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 9dcdda9185..42f42d239f 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -92,6 +92,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y

commit 4a7c178034f30a79ca419022bd272761af648ae8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 17 14:23:41 2019 +0800

    lib: avb: change the hardware rsa verified interface
    
    Change-Id: Id42cf3a829a35514b75f3c5990ce7e00b94f712e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index 9695d1b17a..b11ed88d5f 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -32,8 +32,8 @@
 #include <android_avb/rk_avb_ops_user.h>
 #include <malloc.h>
 #include <common.h>
-#ifdef CONFIG_CRYPTO_ROCKCHIP
-#include <rockchip_crypto/rockchip_crypto.h>
+#ifdef CONFIG_DM_CRYPTO
+#include <crypto.h>
 #endif
 
 /* The most recent unlock challenge generated. */
@@ -72,19 +72,18 @@ static bool verify_permanent_attributes(
     const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
   uint8_t hash[AVB_SHA256_DIGEST_SIZE];
 #ifdef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
-#ifdef CONFIG_CRYPTO_ROCKCHIP
-  struct rk_pub_key pub_key;
-  int i;
+#ifdef CONFIG_DM_CRYPTO
+  u32 cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_RSA2048;
   uint8_t rsa_hash[256] = {0};
   uint8_t rsa_hash_revert[256] = {0};
   unsigned int rsaResult_temp[8];
   unsigned char rsaResult[32] = {0};
+  struct rk_pub_key pub_key;
+  struct udevice *dev;
+  rsa_key rsa_key;
   char *temp;
-  struct rk_crypto_desc crypto_desc;
   int ret = 0;
-
-  if (rk_crypto_probe())
-    return false;
+  int i;
 
   memset(&pub_key, 0, sizeof(struct rk_pub_key));
   ret = rk_avb_get_pub_key(&pub_key);
@@ -100,28 +99,20 @@ static bool verify_permanent_attributes(
   for (i = 0; i < 256; i++)
     rsa_hash_revert[255-i] = rsa_hash[i];
 
-  ret = get_rk_crypto_desc(&crypto_desc);
-  if (ret) {
-    avb_error("get_rk_crypto_desc error\n");
-    return false;
-  }
-
-  ret = rk_crypto_rsa_init(&crypto_desc);
-  if (ret) {
-    avb_error("rk_crypto_rsa_init error\n");
-    return false;
-  }
-
-  ret = rk_crypto_rsa_start(&crypto_desc, (u32 *)(rsa_hash_revert),
-                            pub_key.rsa_n, pub_key.rsa_e, pub_key.rsa_c);
-  if (ret) {
-    avb_error("rk_crypto_rsa_start error\n");
+  dev = crypto_get_device(cap);
+  if (!dev) {
+    avb_error("Can't find crypto device for expected capability\n");
     return false;
   }
 
-  ret = rk_crypto_rsa_end(&crypto_desc, rsaResult_temp);
+  memset(&rsa_key, 0x00, sizeof(rsa_key));
+  rsa_key.algo = CRYPTO_RSA2048;
+  rsa_key.n = (u32 *)&pub_key.rsa_n;
+  rsa_key.e = (u32 *)&pub_key.rsa_e;
+  rsa_key.c = (u32 *)&pub_key.rsa_c;
+  ret = crypto_rsa_verify(dev, &rsa_key, (u8 *)rsa_hash_revert, (u8 *)rsaResult_temp);
   if (ret) {
-    avb_error("rk_crypto_rsa_end error\n");
+    avb_error("Hardware verify error!\n");
     return false;
   }
 

commit 5a1674a738d139ac6dcaa59d5712a85abb83c8cd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 21 18:00:40 2019 +0800

    drivers: core: do not use mtd node from kernel dtb
    
    Do not use mtd node from kernel dtb, otherwise the driver will
    be initialized twice.
    
    Change-Id: I6f3dca8fd8c3e05475f4359fe6c3c5312c0984cd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index ea224c22e5..7b8f0e3e1c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -54,7 +54,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	if (gd->flags & GD_FLG_RELOC) {
 		/* For mmc/nand/spiflash, just update from kernel dtb instead bind again*/
 		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
-		    drv->id == UCLASS_SPI_FLASH) {
+		    drv->id == UCLASS_SPI_FLASH || drv->id == UCLASS_MTD) {
 			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 				if (!strcmp(name, dev->name)) {
 					debug("%s do not bind dev already in list %s\n",

commit 57b5e70433b52aa13503093c82062cd85c1f8420
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 24 14:59:29 2019 +0800

    common: fdt_support: support parse mtd part info
    
    Parse the mtd part info and pass it to kernel by bootargs if
    the device is mtd.
    
    Change-Id: I746081c58d797b8dbd63c47915c6d88a314e1a90
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 4b8641d48c..c13287e574 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -8,16 +8,19 @@
  */
 
 #include <common.h>
+#include <exports.h>
+#include <fdt_support.h>
+#include <fdtdec.h>
 #include <inttypes.h>
+#ifdef CONFIG_MTD_BLK
+#include <mtd_blk.h>
+#endif
 #include <stdio_dev.h>
-#include <linux/ctype.h>
-#include <linux/types.h>
+#include <asm/arch/hotkey.h>
 #include <asm/global_data.h>
+#include <linux/ctype.h>
 #include <linux/libfdt.h>
-#include <fdt_support.h>
-#include <exports.h>
-#include <fdtdec.h>
-#include <asm/arch/hotkey.h>
+#include <linux/types.h>
 
 /**
  * fdt_getprop_u32_default_node - Return a node's property or a default
@@ -318,6 +321,14 @@ int fdt_chosen(void *fdt)
 				env_update_filter("bootargs", bootargs, "root=");
 #else
 				env_update("bootargs", bootargs);
+#endif
+#ifdef CONFIG_MTD_BLK
+				char *mtd_par_info = part_mtd_parse();
+
+				if (mtd_par_info) {
+					if (memcmp(env_get("devtype"), "mtd", 3) == 0)
+						env_update("bootargs", mtd_par_info);
+				}
 #endif
 				/*
 				 * Initrd fixup: remove unused "initrd=0x...,0x...",

commit 22dccd112283e533c5f8628b28ee780d92aa7791
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 24 14:35:39 2019 +0800

    mtd: mtd_blk: parse the block part info to mtd part info
    
    Change-Id: Ib4117bf22d1c91a5b2d69a45b6584e8d0cb47021
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index d4ce7de077..fb4aa283f0 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -5,11 +5,80 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <boot_rkimg.h>
 #include <dm.h>
 #include <errno.h>
+#include <malloc.h>
 #include <nand.h>
+#include <part.h>
 #include <dm/device-internal.h>
 
+#define MTD_PART_NAND_HEAD		"mtdparts="
+#define MTD_PART_INFO_MAX_SIZE		512
+#define MTD_SINGLE_PART_INFO_MAX_SIZE	40
+
+char *mtd_part_parse(void)
+{
+	char mtd_part_info_temp[MTD_SINGLE_PART_INFO_MAX_SIZE] = {0};
+	u32 length, data_len = MTD_PART_INFO_MAX_SIZE;
+	struct blk_desc *dev_desc;
+	disk_partition_t info;
+	char *mtd_part_info_p;
+	char *mtd_part_info;
+	int ret;
+	int p;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+		return NULL;
+
+	mtd_part_info = (char *)calloc(MTD_PART_INFO_MAX_SIZE, sizeof(char));
+	if (!mtd_part_info) {
+		printf("%s: Fail to malloc!", __func__);
+		return NULL;
+	}
+
+	mtd_part_info_p = mtd_part_info;
+	snprintf(mtd_part_info_p, data_len - 1, "%s%s:",
+		 MTD_PART_NAND_HEAD,
+		 dev_desc->product);
+	data_len -= strlen(mtd_part_info_p);
+	mtd_part_info_p = mtd_part_info_p + strlen(mtd_part_info_p);
+
+	for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
+		ret = part_get_info(dev_desc, p, &info);
+		if (ret)
+			break;
+
+		debug("name is %s, start addr is %x\n", info.name,
+		      (int)(size_t)info.start);
+
+		snprintf(mtd_part_info_p, data_len - 1, "0x%x@0x%x(%s)",
+			 (int)(size_t)info.size << 9,
+			 (int)(size_t)info.start << 9,
+			 info.name);
+		snprintf(mtd_part_info_temp, MTD_SINGLE_PART_INFO_MAX_SIZE - 1,
+			 "0x%x@0x%x(%s)",
+			 (int)(size_t)info.size << 9,
+			 (int)(size_t)info.start << 9,
+			 info.name);
+		strcat(mtd_part_info, ",");
+		if (part_get_info(dev_desc, p + 1, &info)) {
+			snprintf(mtd_part_info_p, data_len - 1, "-@0x%x(%s)",
+				 (int)(size_t)info.start << 9,
+				 info.name);
+			break;
+		}
+		length = strlen(mtd_part_info_temp);
+		data_len -= length;
+		mtd_part_info_p = mtd_part_info_p + length + 1;
+		memset(mtd_part_info_temp, 0, MTD_SINGLE_PART_INFO_MAX_SIZE);
+	}
+
+	return mtd_part_info;
+}
+
 ulong mtd_dread(struct udevice *udev, lbaint_t start,
 		lbaint_t blkcnt, void *dst)
 {
diff --git a/include/mtd_blk.h b/include/mtd_blk.h
new file mode 100644
index 0000000000..35ab58ef63
--- /dev/null
+++ b/include/mtd_blk.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _MTD_BLK_H_
+#define _MTD_BLK_H_
+
+/**
+ * mtd_part_parse() - Parse the block part info to mtd part info
+ *
+ * @return mtd part info. If fail, return NULL
+ */
+char *mtd_part_parse(void);
+
+#endif

commit 73251fc230443bd6a87cc32bad8d8bf7089ad8fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 20 14:47:18 2019 +0800

    scripts: stacktrace: support parse spl/tpl stacktrace info
    
    Usage:
            ./scripts/stacktrace.sh ./dump.txt
            ./scripts/stacktrace.sh ./dump.txt tpl
            ./scripts/stacktrace.sh ./dump.txt spl
    
    Change-Id: I6a496109206d26917d5677c076aa770388c36ae6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index 39699499ef..70b4dd68e2 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -8,21 +8,42 @@
 set -e
 ARGS_N=$#
 INPUT_FILE=$1
-SYMBOL_FILE=`find -name u-boot.sym`
+TPL_SPL=$2
+
+
+if [ "$TPL_SPL" = "tpl" ]; then
+	SYMBOL_FILE=`find -name u-boot-tpl.sym`
+elif [ "$TPL_SPL" = "spl" ]; then
+	SYMBOL_FILE=`find -name u-boot-spl.sym`
+else
+	SYMBOL_FILE=`find -name u-boot.sym`
+fi
 
 echo
 if [ $ARGS_N -eq 0 ]; then
 	echo "Usage: "
-	echo "	./scripts/stacktrace.sh <file>  // u-boot stacktrace info file"
+	echo "	./scripts/stacktrace.sh <file> <type>"
+	echo
+	echo "Param:"
+	echo "	<file>: stacktrace info file"
+	echo "	<type>: none, spl, tpl"
+	echo
+	echo "Example:"
+	echo "	./scripts/stacktrace.sh ./dump.txt"
+	echo "	./scripts/stacktrace.sh ./dump.txt tpl"
+	echo "	./scripts/stacktrace.sh ./dump.txt spl"
+	echo
 	exit 1
 elif [ ! -f $INPUT_FILE ]; then
 	echo "Can't find input file: $INPUT_FILE"
 	exit 1
 elif [ "$SYMBOL_FILE" = '' ] || [ ! -f $SYMBOL_FILE ]; then
-	echo "Can't find symbol file: u-boot.sym"
+	echo "Can't find symbol file: ${SYMBOL_FILE}"
 	exit 1
 fi
 
+echo "SYMBOL File: ${SYMBOL_FILE}"
+echo
 # Parse PC and LR
 echo "Call trace:"
 sed -n "/:   \[</p" $INPUT_FILE | while read line
@@ -33,12 +54,12 @@ do
 	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$3); }'`
 	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_dec=`cat ${SYMBOL_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
 	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 	f_offset_dec=$((frame_pc_dec-f_pc_dec))
 	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	cat u-boot.sym | sort |
+	cat ${SYMBOL_FILE} | sort |
 	awk -v foffset=$f_offset_hex '/\.text/ {
 		if (strtonum("0x"$1) > '$frame_pc_str') {
 			printf("%s+0x%s/0x%x      ", fname, foffset, fsize);
@@ -65,12 +86,12 @@ do
 	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$2); }'`
 	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_dec=`cat ${SYMBOL_FILE} | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
 	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
 	f_offset_dec=$((frame_pc_dec-f_pc_dec))
 	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
 
-	cat u-boot.sym | sort |
+	cat ${SYMBOL_FILE} | sort |
 	awk -v foffset=$f_offset_hex '/\.text/ {
 		if (strtonum("0x"$1) > '$frame_pc_str') {
 			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);

commit 1b4592b5382f527bb3b8d924b88ea10ef40db558
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 20 12:32:21 2019 +0800

    scripts: Makefile.spl: generate symbol file for spl and tpl
    
    u-boot-tpl.sym and u-boot-spl.sym are required by stacktrace scripts
    
    Change-Id: Ie408332eaff71c3ed244016adb9f75401ca35845
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 0e34a46c00..97b10d82c5 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -348,7 +348,8 @@ quiet_cmd_u-boot-spl ?= LD      $@
 		       $(patsubst $(obj)/%,%,$(u-boot-spl-main))  \
 		       $(patsubst $(obj)/%,%,$(u-boot-spl-platdata)) \
 		       --end-group \
-		       $(PLATFORM_LIBS) -Map $(SPL_BIN).map -o $(SPL_BIN))
+		       $(PLATFORM_LIBS) -Map $(SPL_BIN).map -o $(SPL_BIN) && \
+		       $(OBJDUMP) -t $(SPL_BIN) > $(SPL_BIN).sym)
 
 $(obj)/$(SPL_BIN): $(u-boot-spl-platdata) $(u-boot-spl-init) \
 		$(u-boot-spl-main) $(obj)/u-boot-spl.lds FORCE

commit 34bdfea0a0b76e056513ef244e5e1a445f617157
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 20 11:56:14 2019 +0800

    make.sh: support objdump tpl/spl elf file
    
    Example:
            ./make.sh elf tpl  --- objdump u-boot-tpl
            ./make.sh elf spl  --- objdump u-boot-spl
            ./make.sh elf      --- objdump u-boot
    
    Change-Id: I8dca1cfce207b98e755db8841f3d614cfad9bfb4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index f6c44cf35f..8fb8cd1549 100755
--- a/make.sh
+++ b/make.sh
@@ -230,18 +230,25 @@ select_toolchain()
 sub_commands()
 {
 	local cmd=${SUBCMD%-*} opt=${SUBCMD#*-}
+	local elf=${OUTDIR}/u-boot map=${OUTDIR}/u-boot.map sym=${OUTDIR}/u-boot.sym
+
+	if [ "$FILE" == "tpl" -o "$FILE" == "spl" ]; then
+		elf=`find -name u-boot-${FILE}`
+		map=`find -name u-boot-${FILE}.map`
+		sym=`find -name u-boot-${FILE}.sym`
+	fi
 
 	case $cmd in
 		elf)
-		if [ ! -f ${OUTDIR}/u-boot ]; then
-			echo "Can't find elf file: ${OUTDIR}/u-boot"
+		if [ -o ! -f ${elf} ]; then
+			echo "Can't find elf file: ${elf}"
 			exit 1
 		else
 			# default 'cmd' without option, use '-D'
 			if [ "${cmd}" = 'elf' -a "${opt}" = 'elf' ]; then
 				opt=D
 			fi
-			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
+			${TOOLCHAIN_OBJDUMP} -${opt} ${elf} | less
 			exit 0
 		fi
 		;;
@@ -252,12 +259,12 @@ sub_commands()
 		;;
 
 		map)
-		cat ${OUTDIR}/u-boot.map | less
+		cat ${map} | less
 		exit 0
 		;;
 
 		sym)
-		cat ${OUTDIR}/u-boot.sym | less
+		cat ${sym} | less
 		exit 0
 		;;
 
@@ -311,8 +318,8 @@ sub_commands()
 			fi
 
 			echo
-			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym
-			${TOOLCHAIN_ADDR2LINE} -e ${OUTDIR}/u-boot ${FUNCADDR}
+			sed -n "/${FUNCADDR}/p" ${sym}
+			${TOOLCHAIN_ADDR2LINE} -e ${elf} ${FUNCADDR}
 			exit 0
 		fi
 		;;

commit 89514e0a47b5b7941cc6c47693c90f2291bd3c35
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 21:48:26 2019 +0800

    configs: evb-rk3229: spl increase stack_r malloc size
    
    Fix the SPL boot issue:
    
    U-Boot TPL 2017.09-02983-ga891458 (Jun 19 2019 - 21:50:08)
    Returning to boot ROM...
    U-Boot SPL board init
    U-Boot SPL 2017.09-02983-ga891458 (Jun 19 2019 - 21:50:08)
    Trying to boot from MMC2
    mmc fail to send stop cmd
    
    Change-Id: I2f47ff906eacfd51af1ec5145331349167c55166
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index a8274a65aa..43a92f340c 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -26,7 +26,7 @@ CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x6000
 CONFIG_SPL_OPTEE=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y

commit c88a887aa9acdf1ad49d35262783b70b83cc449c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 21:47:04 2019 +0800

    configs: evb-rk3229: update by make savedefconfig
    
    Change-Id: Iac13ed18452db14f41dc8bc1e4a2736392f35330
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 99a232f563..a8274a65aa 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -3,34 +3,31 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_TPL_TINY_MEMSET=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
-CONFIG_BOOTDELAY=0
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
@@ -47,8 +44,8 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
-CONFIG_TPL_DM=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -75,9 +72,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
@@ -86,6 +81,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit e8048e8f0a19c66c39b56f1578835ec14f83d970
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 08:43:06 2019 +0800

    rockchip: dts: rk3229-evb: update "u-boot,dm-xxx" prop for some nodes
    
    Change-Id: If9fcdae550c967712e8b9a0be73bb661481d171b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 5b4c97befc..62acc7f5a2 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -36,12 +36,12 @@
 	};
 
 	gpio-keys {
-		u-boot,dm-pre-reloc;
+		u-boot,dm-spl;
 		compatible = "gpio-keys";
 		status = "okay";
 
 		volume-up {
-			u-boot,dm-pre-reloc;
+			u-boot,dm-spl;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "Volume Up";
 			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 3d73382141..90f709dc3e 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -32,46 +32,46 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &nandc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &u2phy0 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &u2phy0_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &usb20_otg {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &pinctrl {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };
 
 &gpio1 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &gpio3 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 	status = "okay";
 };

commit 8dd9db5d1cd5826638c3cdb5f681300ff2f29f3b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 08:34:33 2019 +0800

    Makefile: tpl: u-boot-tpl.dtb support include node with prop "u-boot,dm-tpl"
    
    Without this patch, u-boot-tpl.dtb is always copy from u-boot-spl.dtb which
    doesn't apply fdtgrep with "-b u-boot,dm-tpl".
    
    Sometimes, the platform with critical sram size requires u-boot-tpl.dtb as
    smaller as possible, so we use "u-boot,dm-tpl" prop to idendify what the
    tpl really needs.
    
    Rules:
    "u-boot,dm-tpl": include node with prop for u-boot-tpl.dtb;
    "u-boot,dm-spl": include node with prop for u-boot-spl.dtb;
    "u-boot,pre-reloc": include node with prop for u-boot-tpl.dtb and u-boot-spl.dtb;
    
    Change-Id: I29c2464d285174f4d0a4a1f8b91a84238ed82384
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/dts/Makefile b/dts/Makefile
index c9b2a89441..0e77a283ce 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -38,13 +38,23 @@ quiet_cmd_fdtgrep = FDTGREP $@
 	$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
 		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
 
+fdtgrep_tpl_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
+quiet_cmd_fdtgrep_tpl = FDTGREP $@
+      cmd_fdtgrep_tpl = $(objtree)/tools/fdtgrep $(fdtgrep_tpl_props) -RT $< \
+                -n /config -O dtb | \
+        $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
+                $(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+
+$(obj)/dt-tpl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
+	$(call if_changed,fdtgrep_tpl)
+
 $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 
 $(obj)/dt.dtb: $(DTB) FORCE
 	$(call if_changed,shipped)
 
-targets += dt.dtb dt-spl.dtb
+targets += dt.dtb dt-spl.dtb dt-tpl.dtb
 
 $(DTB): $(dtb_depends)
 ifeq ($(EXT_DTB),)
@@ -61,22 +71,25 @@ endif
 arch-dtbs:
 	$(Q)$(MAKE) $(build)=$(ARCH_PATH) dtbs
 
-.SECONDARY: $(obj)/dt.dtb.S $(obj)/dt-spl.dtb.S
+.SECONDARY: $(obj)/dt.dtb.S $(obj)/dt-spl.dtb.S $(obj)/dt-tpl.dtb.S
 
 
 ifeq ($(CONFIG_SPL_BUILD),y)
 obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o
 # support "out-of-tree" build for dtb-spl
+$(obj)/dt-tpl.dtb.o: $(obj)/dt-tpl.dtb.S FORCE
+	$(call if_changed_dep,as_o_S)
+
 $(obj)/dt-spl.dtb.o: $(obj)/dt-spl.dtb.S FORCE
 	$(call if_changed_dep,as_o_S)
 else
 obj-$(CONFIG_OF_EMBED) := dt.dtb.o
 endif
 
-dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb
+dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb $(obj)/dt-tpl.dtb
 	@:
 
-clean-files := dt.dtb.S dt-spl.dtb.S
+clean-files := dt.dtb.S dt-spl.dtb.S dt-tpl.dtb.S
 
 # Let clean descend into dts directories
 subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index e2f0741db6..0e34a46c00 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -246,8 +246,13 @@ $(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
 	@bss_size_str=$(shell $(NM) $< | awk 'BEGIN {size = 0} /__bss_size/ {size = $$1} END {print "ibase=16; " toupper(size)}' | bc); \
 	dd if=/dev/zero of=$@ bs=1 count=$${bss_size_str} 2>/dev/null;
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+$(obj)/$(SPL_BIN).dtb: dts/dt-tpl.dtb FORCE
+	$(call if_changed,copy)
+else
 $(obj)/$(SPL_BIN).dtb: dts/dt-spl.dtb FORCE
 	$(call if_changed,copy)
+endif
 
 pythonpath = PYTHONPATH=scripts/dtc/pylibfdt
 

commit df5ff5a374bc87d44d01aa9319009bce4f4eff1e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 18:09:32 2019 +0800

    common: spl: atf: disable and clean-invalidate icache/dcache
    
    Refer to cleanup_before_linux().
    
    Change-Id: Ia738f2816ab8c6fa09776aebd83f775697117d8c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index a98a4e99a9..1de602c5e1 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -104,7 +104,19 @@ void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
 	bl31_params = bl2_plat_get_bl31_params(bl32_entry, bl33_entry);
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
+
+	/*
+	 * Turn off I-cache and invalidate it
+	 */
+	icache_disable();
+	invalidate_icache_all();
+
+	/*
+	 * turn off D-cache
+	 * dcache_disable() in turn flushes the d-cache and disables MMU
+	 */
 	dcache_disable();
+	invalidate_dcache_all();
 
 	atf_entry((void *)bl31_params, (void *)fdt_addr);
 }

commit e6482de4e5bfec4f9a5b2f9a94eb78c320705f1e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 21 10:21:57 2019 +0800

    mtd: mtd_blk: get desc->product by mtd->name
    
    Change-Id: I9c089032db87de20fa9a57a9637247df8fac2fbb
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 0d2bd247b2..d4ce7de077 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -76,7 +76,7 @@ static int mtd_blk_probe(struct udevice *udev)
 	struct mtd_info *mtd = dev_get_priv(udev->parent);
 
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
-	memcpy(desc->product, "MTD", sizeof("MTD"));
+	memcpy(desc->product, mtd->name, strlen(mtd->name));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	if (mtd->type == MTD_NANDFLASH) {
 		/* Reserve 4 blocks for BBT(Bad Block Table) */

commit d2e692d26497d4b9ff4aa52c587224ff078c6f2c
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 21 08:37:57 2019 +0800

    drivers: mtd: nand: rockchip: the mtd name used the same as kenrel drivers
    
    Change-Id: Ib3c6d70896f6bb5acb3ea506d01facc5ca465ba2
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index bf0bddcb7b..1d0c27b7cc 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -592,7 +592,6 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		return -EINVAL;
 
 	mtd = nand_to_mtd(chip);
-	mtd->name = "rknand";
 	mtd->dev = rknand->dev;
 	if (rknand->dev)
 		rknand->dev->priv = mtd;
@@ -618,7 +617,7 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		debug("Failed to register mtd device: %d\n", ret);
 		return ret;
 	}
-
+	mtd->name = "rk-nand";
 	return 0;
 }
 
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
index 32711bbd6c..76b36032b5 100644
--- a/drivers/mtd/nand/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -593,7 +593,6 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		return -EINVAL;
 
 	mtd = nand_to_mtd(chip);
-	mtd->name = "rknand";
 	mtd->dev = rknand->dev;
 	if (rknand->dev)
 		rknand->dev->priv = mtd;
@@ -619,7 +618,7 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 		debug("Failed to register mtd device: %d\n", ret);
 		return ret;
 	}
-
+	mtd->name = "rk-nand";
 	return 0;
 }
 

commit 774966068a8c6100b3da251278f4f8e14607c214
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Jun 19 17:03:55 2019 +0800

    rockchip: include: configs: rk3308 reconfig default nand flash size
    
    Change-Id: I3d912a217fce065442c036b9405364b8f9169f5e
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 72b3c9895a..3bfa3222e2 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -15,7 +15,7 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
-#define CONFIG_SYS_NAND_SIZE		(64 * 1024)
+#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
 #define CONFIG_SPL_MAX_SIZE		0x20000

commit fe5b67570a83e16308a892f507092cc75531214f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 18:03:11 2019 +0800

    common: image-android: don't print fdt load addr/size info
    
    The fdt load addr doesn't make any sense from android hdr,
    and it's easy to make user to be confused with "fdt_addr_r".
    
    Change-Id: I20c9047a1a3cef6987d3a1a1c85b6a0f3af15ad2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 0237565343..f14ad7d960 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -251,8 +251,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
 #endif
 
-	printf("FDT load addr 0x%08x size %u KiB\n",
-	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
+	debug("FDT load addr 0x%08x size %u KiB\n",
+	      hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 
 	return 0;
 }

commit 0d0d4395c1a7b09ab7edad43124ac752846972d4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 19 21:46:22 2019 +0800

    make.sh: support pack u-boot.itb for 32-bit platform
    
    Change-Id: I4e7a8f0b334ba39034943f6c1667259d446ea5d4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 34e2d2219e..f6c44cf35f 100755
--- a/make.sh
+++ b/make.sh
@@ -558,19 +558,43 @@ pack_uboot_image()
 
 pack_uboot_itb_image()
 {
-	local ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+	local ini
 
-	if [ ! -f ${ini} ]; then
-		echo "pack trust failed! Can't find: ${ini}"
-		return
-	fi
+	# ARM64
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		if [ ! -f ${ini} ]; then
+			echo "pack trust failed! Can't find: ${ini}"
+			return
+		fi
 
-	bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
+		bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
 
-	cp ${RKBIN}/${bl31} bl31.elf
-	make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+		cp ${RKBIN}/${bl31} bl31.elf
+		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+		echo "pack u-boot.itb okay! Input: ${ini}"
+	else
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+		if [ ! -f ${ini} ]; then
+			echo "pack trust failed! Can't find: ${ini}"
+			return
+		fi
+
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
+
+		if [ $TOS_TA ]; then
+			cp ${RKBIN}/${TOS_TA} tee.bin
+		elif [ $TOS ]; then
+			cp ${RKBIN}/${TOS} tee.bin
+		else
+			echo "Can't find any tee bin"
+			exit 1
+		fi
 
-	echo "pack u-boot.itb okay! Input: ${ini}"
+		make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+		echo "pack u-boot.itb okay! Input: ${ini}"
+	fi
 }
 
 pack_spl_loader_image()

commit dd590c9364ebf54364f44db29d997d2bd1c958cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 18 17:39:34 2019 +0800

    make.sh: support assign ini file for packing loader/trust/spl-s
    
    Example:
            ./make.sh loader ~/rkbin/RKBOOT/RK3399MINIALL_SPINOR.ini
            ./make.sh loader ~/rkbin/RKTRUST/RK3308AARCH32TRUST.ini
            ./make.sh spl-s ~/rkbin/RKBOOT/RK3399MINIALL_SPINOR.ini
    
    Change-Id: Ie373857befdf030a1b816de629dd38d6be1fc920
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index a148e8863d..34e2d2219e 100755
--- a/make.sh
+++ b/make.sh
@@ -9,6 +9,7 @@ set -e
 BOARD=$1
 SUBCMD=$1
 FUNCADDR=$1
+FILE=$2
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -578,6 +579,10 @@ pack_spl_loader_image()
 	local ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 	local temp_ini=${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini
 
+	if [ "$FILE" != "" ]; then
+		ini=$FILE;
+	fi
+
 	if [ ! -f ${ini} ]; then
 		echo "pack TPL+SPL loader failed! Can't find: ${ini}"
 		return
@@ -591,7 +596,7 @@ pack_spl_loader_image()
 	fi
 	cp ${OUTDIR}/spl/u-boot-spl.bin ${RKBIN}/.temp/
 	cp ${OUTDIR}/tpl/u-boot-tpl.bin ${RKBIN}/.temp/
-	cp ${ini} ${RKBIN}/.temp/
+	cp ${ini} ${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini -f
 
 	cd ${RKBIN}
 	if [ "$mode" = 'spl' ]; then	# pack tpl+spl
@@ -618,6 +623,10 @@ pack_loader_image()
 {
 	local mode=$1 files ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 
+	if [ "$FILE" != "" ]; then
+		ini=$FILE;
+	fi
+
 	if [ ! -f $ini ]; then
 		echo "pack loader failed! Can't find: $ini"
 		return
@@ -716,6 +725,10 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
+		if [ "$FILE" != "" ]; then
+			ini=$FILE;
+		fi
+
 		if [ "${mode}" = 'all' ]; then
 			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST*.ini`
 			for ini in $files
@@ -728,6 +741,9 @@ pack_trust_image()
 	# ARM uses loaderimage
 	else
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+		if [ "$FILE" != "" ]; then
+			ini=$FILE;
+		fi
 		if [ "${mode}" = 'all' ]; then
 			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS*.ini`
 			for ini in $files

commit f1892190deb701c41b5727da5250f4a4ddbb6483
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 18 17:24:58 2019 +0800

    mtd: add desc->lba to mtd block device
    
    The desc->lba is based on mtd->size: desc->lba = mtd->size >> 9;
    
    If the mtd storage is spi nand or nand flash, reserve 4 blocks
    for BBT(Bad Block Table). Then desc->lba is
    desc->lba = (mtd->size >> 9) - (mtd->erasesize >> 9) * 4;
    
    Change-Id: I70702623895fe05cec614c4c3ca5f3f6c41d26ca
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
index 1b23cee92f..0d2bd247b2 100644
--- a/drivers/mtd/mtd_blk.c
+++ b/drivers/mtd/mtd_blk.c
@@ -73,10 +73,17 @@ ulong mtd_derase(struct udevice *udev, lbaint_t start,
 static int mtd_blk_probe(struct udevice *udev)
 {
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+	struct mtd_info *mtd = dev_get_priv(udev->parent);
 
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, "MTD", sizeof("MTD"));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+	if (mtd->type == MTD_NANDFLASH) {
+		/* Reserve 4 blocks for BBT(Bad Block Table) */
+		desc->lba = (mtd->size >> 9) - (mtd->erasesize >> 9) * 4;
+	} else {
+		desc->lba = mtd->size >> 9;
+	}
 
 	return 0;
 }

commit 346e1f7dd107c0be2c40fa42a01ef80fe4e39c94
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:46:52 2019 +0800

    rockchip: config: add mtd dev scan
    
    Change-Id: Icda4764ad41292685bd3f35c970fb2edf080e013
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index e8bd45396b..cfec67e118 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -115,6 +115,8 @@
 		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard;" \
 	"elif mmc dev 0; then " \
 		"setenv devtype mmc; setenv devnum 0;" \
+	"elif mtd dev 0; then " \
+		"setenv devtype mtd; setenv devnum 0;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
 	"elif rksfc dev 0; then " \

commit de8452aebf0f69a50a2f63ac68cbc3d9879fe3ae
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:32:25 2019 +0800

    cmd: mtd: support mtd command
    
    Change-Id: I5d5548e97535c6d928d2ff84f055de259577c11a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6e23561996..b5b6b36943 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1498,6 +1498,11 @@ config CMD_MTDPARTS
 	help
 	  MTD partition support
 
+config CMD_MTD
+	bool "MTD support"
+	help
+	  MTD support
+
 config MTDIDS_DEFAULT
 	string "Default MTD IDs"
 	depends on CMD_MTDPARTS
diff --git a/cmd/Makefile b/cmd/Makefile
index 7ff83c2524..853643bfb2 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -100,6 +100,7 @@ obj-$(CONFIG_CMD_MMC) += mmc.o
 obj-$(CONFIG_CMD_MMC_SPI) += mmc_spi.o
 obj-$(CONFIG_MP) += mp.o
 obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o
+obj-$(CONFIG_CMD_MTD) += mtd.o
 obj-$(CONFIG_CMD_NAND) += nand.o
 obj-$(CONFIG_CMD_NET) += net.o
 obj-$(CONFIG_CMD_ONENAND) += onenand.o
diff --git a/cmd/mtd.c b/cmd/mtd.c
new file mode 100644
index 0000000000..3ca1122dff
--- /dev/null
+++ b/cmd/mtd.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+
+static int mtd_curr_dev = -1;
+
+static int do_mtd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	if (argc == 2) {
+		return CMD_RET_FAILURE;
+	}
+
+	return blk_common_cmd(argc, argv, IF_TYPE_MTD, &mtd_curr_dev);
+}
+
+U_BOOT_CMD(
+	mtd, 8, 1, do_mtd,
+	"MTD device sub-system",
+	"mtd dev [dev] - show or set current MTD device\n"
+	"mtd part [dev] - print partition table of one or all MTD devices\n"
+	"mtd read addr blk# cnt - read `cnt' blocks starting at block\n"
+	"     `blk#' to memory address `addr'\n"
+	"mtd write addr blk# cnt - write `cnt' blocks starting at block\n"
+	"     `blk#' from memory address `addr'"
+);

commit b102334f1eef7c833cfcb3386bd451304f60106e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:26:43 2019 +0800

    common: rkimg: support mtd block
    
    Change-Id: Iff8b6d7913a33fb90c05402bacab3173283fe672
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 57e590686a..ba28da4ae2 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -198,6 +198,9 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "ramdisk")) {
 		type = IF_TYPE_RAMDISK;
 		boot_media = "ramdisk";
+	} else if (!strcmp(devtype, "mtd")) {
+		type = IF_TYPE_MTD;
+		boot_media = "mtd";
 	} else {
 		/* Add new to support */
 	}

commit 02445819f5479a0923f45bf4198635f25f68a1c2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 15 20:24:18 2019 +0800

    disk: part: support mtd block part
    
    Change-Id: I1f34cca448e007cc734042121a9f31dcea96fc41
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 097e4e7e0e..81c1972fe2 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -143,6 +143,7 @@ void dev_print (struct blk_desc *dev_desc)
 		break;
 	case IF_TYPE_SD:
 	case IF_TYPE_MMC:
+	case IF_TYPE_MTD:
 	case IF_TYPE_USB:
 	case IF_TYPE_NVME:
 	case IF_TYPE_RKNAND:
@@ -278,6 +279,9 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_MMC:
 		puts ("MMC");
 		break;
+	case IF_TYPE_MTD:
+		puts("MTD");
+		break;
 	case IF_TYPE_HOST:
 		puts ("HOST");
 		break;

commit 411568d7eb6a16c311dd02054073cbb0e43c298c
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu May 30 17:24:48 2019 +0800

    drivers: mtd: nand: support rockchip nand driver as a DT device
    
    Change-Id: I0023502f5121354863ed63fefa380643ec49b1e1
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index f3372d65f7..bf0895604f 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -90,6 +90,15 @@ config NAND_ROCKCHIP_V9
 	---help---
 	Enable support for Rockchip nand v9.
 
+if NAND_ROCKCHIP || NAND_ROCKCHIP_V9
+config NAND_ROCKCHIP_DT
+        bool "Support Rockchip NAND controller as a DT device"
+	default y
+        help
+          Enable the driver for Rockchip NAND flash on platforms
+	  using device tree.
+endif
+
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index b8607c82ee..bf0bddcb7b 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -6,14 +6,16 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <fdtdec.h>
 #include <inttypes.h>
 #include <nand.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
 #include <linux/kernel.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
-#include <linux/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -83,6 +85,7 @@ struct rk_nand {
 	bool bootromblocks;
 	void __iomem *regs;
 	int selected_bank;
+	struct udevice *dev;
 };
 
 static struct nand_ecclayout nand_oob_fix = {
@@ -445,7 +448,7 @@ static int rockchip_nand_ecc_max_strength(struct mtd_info *mtd,
 					  struct nand_ecc_ctrl *ecc)
 {
 	uint32_t max_strength, index;
-	
+
 	max_strength = ((mtd->oobsize / ecc->steps) - ecc->prepad) * 8 / 14;
 
 	for (index = 0; index < ARRAY_SIZE(strengths); index++)
@@ -590,6 +593,9 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 
 	mtd = nand_to_mtd(chip);
 	mtd->name = "rknand";
+	mtd->dev = rknand->dev;
+	if (rknand->dev)
+		rknand->dev->priv = mtd;
 
 	ret = nand_scan_ident(mtd, 1, NULL);
 	if (ret)
@@ -632,6 +638,81 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 	return 0;
 }
 
+#ifdef CONFIG_NAND_ROCKCHIP_DT
+static const struct udevice_id rockchip_nandc_ids[] = {
+	{ .compatible = "rockchip,nandc" },
+	{ }
+};
+
+static int rockchip_nandc_probe(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand = dev_get_priv(dev);
+	fdt_addr_t regs;
+	int ret = 0, node;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	rknand->dev = dev;
+
+	regs = dev_read_addr(dev);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		return ret;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret)
+		debug("Failed to init nand chips\n");
+
+	return ret;
+}
+
+static int rockchip_nandc_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 0, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
+U_BOOT_DRIVER(rk_nandc_v6) = {
+	.name           = "rk_nandc_v6",
+	.id             = UCLASS_MTD,
+	.of_match       = rockchip_nandc_ids,
+	.bind		= rockchip_nandc_bind,
+	.probe          = rockchip_nandc_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_nand),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(rk_nandc_v6),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize NAND controller. (error %d)\n",
+		       ret);
+}
+#else
+
 void board_nand_init(void)
 {
 	const void *blob = gd->fdt_blob;
@@ -678,6 +759,8 @@ err:
 	kfree(rknand);
 }
 
+#endif
+
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 {
 	struct mtd_info *mtd;
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
index b2ff609d33..32711bbd6c 100644
--- a/drivers/mtd/nand/rockchip_nand_v9.c
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -6,14 +6,16 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <fdtdec.h>
 #include <inttypes.h>
 #include <nand.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
 #include <linux/kernel.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
-#include <linux/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -81,6 +83,7 @@ struct rk_nand {
 	bool bootromblocks;
 	void __iomem *regs;
 	int selected_bank;
+	struct udevice *dev;
 };
 
 static struct nand_ecclayout nand_oob_fix = {
@@ -591,6 +594,9 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 
 	mtd = nand_to_mtd(chip);
 	mtd->name = "rknand";
+	mtd->dev = rknand->dev;
+	if (rknand->dev)
+		rknand->dev->priv = mtd;
 
 	ret = nand_scan_ident(mtd, 1, NULL);
 	if (ret)
@@ -633,6 +639,81 @@ static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
 	return 0;
 }
 
+#ifdef CONFIG_NAND_ROCKCHIP_DT
+static const struct udevice_id rockchip_nandc_ids[] = {
+	{ .compatible = "rockchip,nandc" },
+	{ }
+};
+
+static int rockchip_nandc_probe(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand = dev_get_priv(dev);
+	fdt_addr_t regs;
+	int ret = 0, node;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	rknand->dev = dev;
+
+	regs = dev_read_addr(dev);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		return ret;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret)
+		debug("Failed to init nand chips\n");
+
+	return ret;
+}
+
+static int rockchip_nandc_bind(struct udevice *udev)
+{
+	int ret = 0;
+
+#ifdef CONFIG_MTD_BLK
+	struct udevice *bdev;
+
+	ret = blk_create_devicef(udev, "mtd_blk", "blk", IF_TYPE_MTD,
+				 0, 512, 0, &bdev);
+	if (ret)
+		printf("Cannot create block device\n");
+#endif
+	return ret;
+}
+
+U_BOOT_DRIVER(rk_nandc_v9) = {
+	.name           = "rk_nandc_v9",
+	.id             = UCLASS_MTD,
+	.of_match       = rockchip_nandc_ids,
+	.bind		= rockchip_nandc_bind,
+	.probe          = rockchip_nandc_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_nand),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(rk_nandc_v9),
+					  &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize NAND controller. (error %d)\n",
+		       ret);
+}
+#else
+
 void board_nand_init(void)
 {
 	const void *blob = gd->fdt_blob;
@@ -679,6 +760,8 @@ err:
 	kfree(rknand);
 }
 
+#endif
+
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 {
 	struct mtd_info *mtd;

commit 124f23c66ca2d71c2633c5b6b879e863832c9219
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 5 11:21:55 2019 +0800

    rockchip: board: fixup "ramdisk_addr_r" when bl32 is enlarged
    
    Only when ramdisk addr is overlap with bl32 region works.
    
    Change-Id: Ie5f4bce4f60b22cf58f0c07b9151550193a6150d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9328a9f114..187d4cd730 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -326,7 +326,11 @@ int init_kernel_dtb(void)
 
 void board_env_fixup(void)
 {
+	struct memblock mem;
+	ulong u_addr_r;
+	phys_size_t end;
 	char *addr_r;
+
 #ifdef ENV_MEM_LAYOUT_SETTINGS1
 	const char *env_addr0[] = {
 		"scriptaddr", "pxefile_addr_r",
@@ -353,6 +357,13 @@ void board_env_fixup(void)
 		addr_r = env_get("kernel_addr_no_bl32_r");
 		if (addr_r)
 			env_set("kernel_addr_r", addr_r);
+	/* If bl32 is enlarged, we move ramdisk addr right behind it */
+	} else {
+		mem = param_parse_optee_mem();
+		end = mem.base + mem.size;
+		u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+		if (u_addr_r >= mem.base && u_addr_r < end)
+			env_set_hex("ramdisk_addr_r", end);
 	}
 }
 

commit cd2cb2c22ff0f5e3251e605e99c68936da9db942
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 18:22:53 2019 +0800

    common: fdt_support: add hotkey initcall debug
    
    Change-Id: Iafb024773c6dc6e744c2d669bcfa4a8567f34e45
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 28caaf0d51..4b8641d48c 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -17,6 +17,7 @@
 #include <fdt_support.h>
 #include <exports.h>
 #include <fdtdec.h>
+#include <asm/arch/hotkey.h>
 
 /**
  * fdt_getprop_u32_default_node - Return a node's property or a default
@@ -312,6 +313,7 @@ int fdt_chosen(void *fdt)
 				 * high priority system to boot and add its UUID
 				 * to cmdline. The format is "roo=PARTUUID=xxxx...".
 				 */
+				hotkey_run(HK_INITCALL);
 #ifdef CONFIG_ANDROID_AB
 				env_update_filter("bootargs", bootargs, "root=");
 #else

commit 15c8c8db16fc1a3f4bea0a5f8d8b7ab32c1119fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 18:22:40 2019 +0800

    rockchip: board: add hotkey dump cmdline
    
    Change-Id: Ifbb61ae429462e037a23682077a5367da511869c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2076dce73d..9328a9f114 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -368,6 +368,9 @@ static void early_download_init(void)
 		return;
 
 	gd->console_evt = getc();
+	if (gd->console_evt <= 0x1a) /* 'z' */
+		printf("Hotkey: ctrl+%c\n", (gd->console_evt + 'a' - 1));
+
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	/* ctrl+b */
 	if (is_hotkey(HK_BROM_DNL)) {
@@ -563,6 +566,8 @@ int board_initr_caches_fixup(void)
 
 void board_quiesce_devices(void)
 {
+	hotkey_run(HK_CMDLINE);
+
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();

commit 866ecb69e8cb1422418857074bb11e13d5c32160
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 18:18:17 2019 +0800

    rockchip: hotkey: add ctrl+i and ctrl+p
    
    ctrl+i: enable initcall debug;
    ctrl+p: dump cmdline;
    
    Change-Id: Ie31f67a2a3fcb87c4057d56b62fbc1cc59397b86
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
index 3559e71904..cd2764612a 100644
--- a/arch/arm/include/asm/arch-rockchip/hotkey.h
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -9,7 +9,9 @@
 enum hotkey_t {
 	HK_INVAL,
 	HK_BROM_DNL,
+	HK_CMDLINE,
 	HK_FASTBOOT,
+	HK_INITCALL,
 	HK_ROCKUSB_DNL,
 	HK_SYSMEM,
 };
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
index cc5f3845dd..478c9f9e19 100644
--- a/arch/arm/mach-rockchip/hotkey.c
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -14,15 +14,21 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CTRL_B		0x02
 #define CTRL_D		0x04
 #define CTRL_F		0x06
+#define CTRL_I		0x09
 #define CTRL_M		0x0d
+#define CTRL_P		0x10
 
 bool is_hotkey(enum hotkey_t id)
 {
 	switch (id) {
 	case HK_BROM_DNL:
 		return gd->console_evt == CTRL_B;
+	case HK_CMDLINE:
+		return gd->console_evt == CTRL_P;
 	case HK_FASTBOOT:
 		return gd->console_evt == CTRL_F;
+	case HK_INITCALL:
+		return gd->console_evt == CTRL_I;
 	case HK_ROCKUSB_DNL:
 		return gd->console_evt == CTRL_D;
 	case HK_SYSMEM:
@@ -43,6 +49,14 @@ void hotkey_run(enum hotkey_t id)
 			sysmem_dump();
 		}
 		break;
+	case HK_CMDLINE:
+		if (gd->console_evt == CTRL_P)
+			printf("cmdline: %s\n", env_get("bootargs"));
+		break;
+	case HK_INITCALL:
+		if (gd->console_evt == CTRL_I)
+			env_update("bootargs", "initcall_debug debug");
+		break;
 	default:
 		break;
 	}

commit 7397b9613e8a1b18d0ed3f29f5c26d15d8e77df0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 30 18:09:48 2019 +0800

    rockchip: board: add pwrkey download mode init
    
    Change-Id: I105cf370c69a2bd60c553623e8256862e8459d0c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index bd6634a0e8..2076dce73d 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -9,6 +9,7 @@
 #include <bidram.h>
 #include <dm.h>
 #include <debug_uart.h>
+#include <key.h>
 #include <memblk.h>
 #include <ram.h>
 #include <syscon.h>
@@ -355,8 +356,14 @@ void board_env_fixup(void)
 	}
 }
 
-static void early_bootrom_download(void)
+static void early_download_init(void)
 {
+#if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
+		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
+	if (pwrkey_download_init())
+		printf("Pwrkey download init failed\n");
+#endif
+
 	if (!tstc())
 		return;
 
@@ -378,11 +385,12 @@ int board_init(void)
 	int ret;
 
 	board_debug_uart_init();
-	early_bootrom_download();
 
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif
+	early_download_init();
+
 	/*
 	 * pmucru isn't referenced on some platforms, so pmucru driver can't
 	 * probe that the "assigned-clocks" is unused.

commit 1a9c8b1b4c273c620c56503a6a59992b6207dcbb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 10:25:01 2019 +0800

    dm: key: add pwrkey download support
    
    User can press and release pwrkey for times to enter download mode,
    set it disabled by default.
    
    Change-Id: Id2fd9d12756bb1584a4d25b6df0c16a8a85d1e9a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index e49f23c2d2..8a70723626 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -68,3 +68,11 @@ config RK_KEY
 	depends on DM_KEY
 	help
 	  This adds a driver for the rk keys support.
+
+config PWRKEY_DNL_TRIGGER_NUM
+	int "Enter download mode by pwrkey trigger count"
+	default 0
+	depends on DM_KEY && IRQ
+	help
+	  This support enter download mode by press and release pwrkey for times
+	  over the trigger count. The default value 0 means disabled.
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 6e3c8ad882..5c74ca1c6a 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -163,6 +163,31 @@ try_again:
 }
 
 #ifdef CONFIG_IRQ
+#if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
+		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
+static void power_key_download(struct dm_key_uclass_platdata *uc_key)
+{
+	int trig_cnt = CONFIG_PWRKEY_DNL_TRIGGER_NUM;
+	static u64 old_rise_ms;
+
+	if (uc_key->code == KEY_POWER && old_rise_ms != uc_key->rise_ms) {
+		old_rise_ms = uc_key->rise_ms;
+		uc_key->trig_cnt++;
+		if (uc_key->trig_cnt >= trig_cnt) {
+			printf("\nEnter download mode by pwrkey\n");
+			irq_handler_disable(uc_key->irq);
+			run_command("rockusb 0 $devtype $devnum", 0);
+			run_command("rbrom", 0);
+		}
+	}
+}
+
+int pwrkey_download_init(void)
+{
+	return (KEY_NOT_EXIST == key_read(KEY_POWER));
+}
+#endif
+
 static void gpio_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -188,6 +213,12 @@ static void gpio_irq_handler(int irq, void *data)
 		mdelay(10);
 		irq_revert_irq_type(irq);
 	}
+
+	/* Hook event: enter download mode by pwrkey */
+#if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \
+		(CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0)
+	power_key_download(uc_key);
+#endif
 }
 #endif
 
diff --git a/include/key.h b/include/key.h
index b50593b89e..ad7bc1ad49 100644
--- a/include/key.h
+++ b/include/key.h
@@ -45,6 +45,8 @@ struct dm_key_uclass_platdata {
 	u64 rise_ms;
 	u64 fall_ms;
 
+	u32 trig_cnt;
+
 	/* Only for pwrkey gpio irq */
 	void (*irq_thread)(int irq, struct udevice *dev);
 };
@@ -55,6 +57,9 @@ uint64_t key_timer(uint64_t base);
 /* Confirm if your key value is a press event */
 int key_is_pressed(int keyval);
 
+/* Pwrkey download mode init */
+int pwrkey_download_init(void);
+
 /* Read key */
 int key_read(int code);
 

commit 868ca499ba61688f51d6674cadde7a729f385634
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 10:21:56 2019 +0800

    input: rk8xx_pwrkey: register irq thread into key framework
    
    Change-Id: Idbc90a55af76001afba218c7cfe0eb750dd24629
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 14fe5bce3f..6294aa88b4 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -101,9 +101,8 @@ static struct reg_data rk805_init_reg[] = {
 	{ RK805_INT_STS_REG, 0xff },
 };
 
-static void pwrkey_irq_handler(int irq, void *data)
+static void pwrkey_irq_handler(int irq, struct udevice *dev)
 {
-	struct udevice *dev = data;
 	struct rk8xx_key_priv *priv = dev_get_priv(dev);
 	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	int ret, val, i;
@@ -164,7 +163,7 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 {
 	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	u32 interrupt[2], phandle;
-	int irq, ret;
+	int ret;
 
 	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
 	if (phandle < 0) {
@@ -181,15 +180,9 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 	uc_key->name = "rk8xx_pwr";
 	uc_key->type = GPIO_KEY;
 	uc_key->code = KEY_POWER;
-	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
-	if (irq < 0) {
-		printf("%s: request irq failed, ret=%d\n", uc_key->name, irq);
-		return irq;
-	}
-	uc_key->irq = irq;
-	irq_install_handler(irq, pwrkey_irq_handler, dev);
-	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-	irq_handler_enable(irq);
+	uc_key->gpios[0] = phandle;
+	uc_key->gpios[1] = interrupt[0];
+	uc_key->irq_thread = pwrkey_irq_handler;
 
 	return 0;
 }

commit c2e7a0d48362ac5b8288265bb0bcebd6dc80e187
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 10:15:38 2019 +0800

    dm: key: add irq thread for key drivers
    
    - only power key can request irq thread;
    - this makes key framework be able to manage all key interrupt event;
    
    Change-Id: I9f99607ed7ff9bcd261d3918150e4a4489e0f472
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 1a370a5fa9..6e3c8ad882 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -165,22 +165,29 @@ try_again:
 #ifdef CONFIG_IRQ
 static void gpio_irq_handler(int irq, void *data)
 {
-	struct dm_key_uclass_platdata *uc_key = data;
+	struct udevice *dev = data;
+	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 
 	if (uc_key->irq != irq)
 		return;
 
-	if (irq_get_gpio_level(irq)) {
-		uc_key->rise_ms = key_timer(0);
-		KEY_DBG("%s: key dn: %llu ms\n", uc_key->name, uc_key->fall_ms);
+	if (uc_key->irq_thread) {
+		uc_key->irq_thread(irq, data);
 	} else {
-		uc_key->fall_ms = key_timer(0);
-		KEY_DBG("%s: key up: %llu ms\n", uc_key->name, uc_key->rise_ms);
-	}
+		if (irq_get_gpio_level(irq)) {
+			uc_key->rise_ms = key_timer(0);
+			KEY_DBG("%s: key dn: %llu ms\n",
+				uc_key->name, uc_key->fall_ms);
+		} else {
+			uc_key->fall_ms = key_timer(0);
+			KEY_DBG("%s: key up: %llu ms\n",
+				uc_key->name, uc_key->rise_ms);
+		}
 
-	/* Must delay */
-	mdelay(10);
-	irq_revert_irq_type(irq);
+		/* Must delay */
+		mdelay(10);
+		irq_revert_irq_type(irq);
+	}
 }
 #endif
 
@@ -233,9 +240,6 @@ static int key_post_probe(struct udevice *dev)
 					uc_key->adcval - margin : 0;
 	} else {
 		if (uc_key->code == KEY_POWER) {
-			/* The gpio irq has been setup by key driver */
-			if (uc_key->irq)
-				goto finish;
 #ifdef CONFIG_IRQ
 			int irq;
 
@@ -247,8 +251,14 @@ static int key_post_probe(struct udevice *dev)
 				return irq;
 			}
 
+			if (uc_key->code != KEY_POWER && uc_key->irq_thread) {
+				KEY_WARN("%s: only power key can request irq thread\n",
+					 uc_key->name);
+				return -EINVAL;
+			}
+
 			uc_key->irq = irq;
-			irq_install_handler(irq, gpio_irq_handler, uc_key);
+			irq_install_handler(irq, gpio_irq_handler, dev);
 			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 			irq_handler_enable(irq);
 #else
@@ -265,7 +275,6 @@ static int key_post_probe(struct udevice *dev)
 		}
 	}
 
-finish:
 #ifdef DEBUG
 	printf("[%s] (%s, %s, %s):\n", uc_key->name,
 	       uc_key->type == ADC_KEY ? "ADC" : "GPIO",
diff --git a/include/key.h b/include/key.h
index c9e11bd874..b50593b89e 100644
--- a/include/key.h
+++ b/include/key.h
@@ -39,11 +39,14 @@ struct dm_key_uclass_platdata {
 
 	/* GPIO key */
 	u32 irq;
-	u32 gpios[2];
+	u32 gpios[2];	/* gpios[0]: gpio controller phandle, gpios[1]: pin */
 	struct gpio_desc gpio;
 
 	u64 rise_ms;
 	u64 fall_ms;
+
+	/* Only for pwrkey gpio irq */
+	void (*irq_thread)(int irq, struct udevice *dev);
 };
 
 /* Use it instead of get_timer() in key interrupt handler */

commit 176ca189929c8f9306ef7163b186f679b4577d2b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 17 17:31:32 2019 +0800

    configs: rk3308: enable stack relocate
    
    Clean up defconfig by make savedefconfig.
    
    Change-Id: I8e70413fce92bfa14bf6c12902f09f4b405800f7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index f01e80bc6a..d06e0978ba 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -13,6 +13,7 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
+CONFIG_SPL_STACK_R_ADDR=0xc00000
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
@@ -24,6 +25,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_SKIP_RELOCATE is not set
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
@@ -62,11 +64,11 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index c1bffce56f..e0c6888218 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -12,6 +12,7 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
+CONFIG_SPL_STACK_R_ADDR=0xc00000
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
@@ -23,10 +24,11 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_SPL_ATF=y
-CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_SKIP_RELOCATE is not set
 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set

commit 0a7b5ce23b1a28dacec37c908ae70e36d2eae4b7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jun 11 09:01:30 2019 +0800

    common: rkimg: add "androidboot.storagemedia" variable to cmdline
    
    1. "storagemedia": This is a legacy variable to indicate board
       storage media for kernel and android.
    
    2. "androidboot.storagemedia": The same purpose as "storagemedia",
       but the android framework will auto create property by
       variable with format "androidboot.xxx", eg:
    
       "androidboot.storagemedia" => "ro.boot.storagemedia".
    
       So, U-Boot pass this new variable is only for the convenience
       to Android.
    
    Change-Id: I59fc7156c15e4eb925c7d5e7a0bc9b07e4f223da
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 32234ca625..57e590686a 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -230,13 +230,28 @@ int get_bootdev_type(void)
 				 "storagemedia=%s androidboot.mode=%s",
 				 boot_media, boot_media);
 #else
+		/*
+		 * 1. "storagemedia": This is a legacy variable to indicate board
+		 *    storage media for kernel and android.
+		 *
+		 * 2. "androidboot.storagemedia": The same purpose as "storagemedia",
+		 *    but the android framework will auto create property by
+		 *    variable with format "androidboot.xxx", eg:
+		 *
+		 *    "androidboot.storagemedia" => "ro.boot.storagemedia".
+		 *
+		 *    So, U-Boot pass this new variable is only for the convenience
+		 *    to Android.
+		 */
 		if (env_exist("bootargs", "androidboot.mode=charger"))
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s", boot_media);
+				 "storagemedia=%s androidboot.storagemedia=%s",
+				 boot_media, boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s androidboot.mode=normal",
-				 boot_media);
+				 "storagemedia=%s androidboot.storagemedia=%s "
+				 "androidboot.mode=normal ",
+				 boot_media, boot_media);
 #endif
 		env_update("bootargs", boot_options);
 	}

commit 8d5781e9e3634084fe958269075427678a85cd8c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 17 09:58:45 2019 +0800

    arm: lib: crt0_64: spl enables sctlr_el3 A/SA/I bits
    
    A:  Alignment check enable;
    I:  Instruction cache enable;
    SA: Stack Alignment Check Enable;
    
    Change-Id: Ic2a25dd23bc586540e177ea7e7927c24074180cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index c29ba899c7..8ed3087ed1 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -65,7 +65,7 @@
  */
 
 ENTRY(_main)
-#if defined(CONFIG_SPL_BUILD) && defined(DEBUG)
+#if defined(CONFIG_SPL_BUILD)
 	.equ SCTLR_A_BIT,		(1 << 1)
 	.equ SCTLR_SA_BIT,		(1 << 3)
 	.equ SCTLR_I_BIT,		(1 << 12)

commit 9d985d6e9311026de0e5717d92b505f8b6ca5a90
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 14 19:14:39 2019 +0800

    power: fg_cw201x: add capability callback
    
    This is only a fuel gauge IC.
    
    Change-Id: I003dee494aa89b388f5ef68381ce16227d7f9c65
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
index eb14c116f0..83bf41c6e5 100755
--- a/drivers/power/fuel_gauge/fg_cw201x.c
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -301,7 +301,13 @@ static bool cw201x_update_get_chrg_online(struct udevice *dev)
 	return cw201x_check_charge(cw201x);
 }
 
+static int cw201x_capability(struct udevice *dev)
+{
+	return FG_CAP_FUEL_GAUGE;
+}
+
 static struct dm_fuel_gauge_ops cw201x_fg_ops = {
+	.capability = cw201x_capability,
 	.get_soc = cw201x_update_get_soc,
 	.get_voltage = cw201x_update_get_voltage,
 	.get_chrg_online = cw201x_update_get_chrg_online,

commit 8d8025afc0ea5636f688ba782ad9d4a9bc2c13de
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 14 18:52:12 2019 +0800

    common: rkimg: print MMC speed and mode
    
    refer to: print_mmcinfo() in ./cmd/mmc.c
    
    Change-Id: I652132417e7df96b3a286f6ceeb66e60150b435b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index afab6b26a0..32234ca625 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <bootm.h>
+#include <mmc.h>
 #include <linux/list.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
@@ -262,6 +263,20 @@ struct blk_desc *rockchip_get_bootdev(void)
 		return NULL;
 	}
 
+#ifdef CONFIG_MMC
+	if (dev_type == IF_TYPE_MMC) {
+		struct mmc *mmc;
+		const char *timing[] = {
+			"Legacy", "High Speed", "High Speed", "SDR12",
+			"SDR25", "SDR50", "SDR104", "DDR50",
+			"DDR52", "HS200", "HS400", "HS400 Enhanced Strobe"};
+
+		mmc = find_mmc_device(devnum);
+		printf("MMC%d: %s, %dMhz\n", devnum,
+		        timing[mmc->timing], mmc->clock / 1000000);
+	}
+#endif
+
 	printf("PartType: %s\n", part_get_type(dev_desc));
 
 	return dev_desc;

commit fa93589458811662487b885185429af40a68c801
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 14 10:45:32 2019 +0800

    rockchip: configs: rk3308: add nand flash sys config
    
    Change-Id: I6d2363b4e79a216fde4ace26f1eccb29767a5ac0
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 98cceefdd8..72b3c9895a 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -12,7 +12,10 @@
 #define CONFIG_SYS_MALLOC_LEN		(10 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
-
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_SIZE		(64 * 1024)
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x00000000
 #define CONFIG_SPL_MAX_SIZE		0x20000

commit 332967ae48c1da1f36b0154dd3d30956c1402cf0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 14 14:31:45 2019 +0800

    common: spl: nand: support load rockchip images
    
    Change-Id: Idd71eda22b4aabde695d69fbd06c0a3fdb554495
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index c00a68a9fa..6720ba2527 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <mmc.h>
+#include <nand.h>
 #include <spl.h>
 
 #if CONFIG_IS_ENABLED(OF_CONTROL) && ! CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -33,6 +34,11 @@ static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;
 
+#ifdef CONFIG_SPL_NAND_SUPPORT
+	if (!rk_nand_init())
+		return BOOT_DEVICE_NAND;
+#endif
+
 	/*
 	 * This should eventually move into the SPL code, once SPL becomes
 	 * aware of the block-device layer.  Until then (and to avoid unneeded
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index d075985374..4ca363a822 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <config.h>
 #include <spl.h>
+#include <spl_rkfw.h>
 #include <asm/io.h>
 #include <nand.h>
 #include <linux/libfdt_env.h>
@@ -40,11 +41,42 @@ static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs,
 		return 0;
 }
 
+#ifdef CONFIG_SPL_LOAD_RKFW
+static ulong spl_nand_rkfw_read(struct spl_load_info *load, ulong offs,
+				ulong size, void *dst)
+{
+	int ret;
+
+	ret = nand_spl_load_image(offs * 512, size * 512, dst);
+	if (!ret)
+		return size;
+	else
+		return 0;
+}
+#endif
+
 static int spl_nand_load_element(struct spl_image_info *spl_image,
 				 int offset, struct image_header *header)
 {
 	int err;
 
+#ifdef CONFIG_SPL_LOAD_RKFW
+	struct spl_load_info load;
+	int ret;
+
+	load.dev = NULL;
+	load.priv = NULL;
+	load.filename = NULL;
+	load.bl_len = 1;
+	load.read = spl_nand_rkfw_read;
+
+	ret = spl_load_rkfw_image(spl_image, &load,
+				  CONFIG_RKFW_TRUST_SECTOR,
+				  CONFIG_RKFW_U_BOOT_SECTOR);
+	if (!ret || ret != -EAGAIN)
+		return ret;
+#endif
+
 	err = nand_spl_load_image(offset, sizeof(*header), (void *)header);
 	if (err)
 		return err;

commit dedb7deff0f4658fee6123890dd9476a40563a15
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 14 10:40:21 2019 +0800

    drivers: mtd: nand: add nand driver for spl
    
    Change-Id: Ic4cd26fb670eaef7778caf045bb4be3ce89ebf29
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index de8675d227..ffc6f42fb7 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
 obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
 obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
 obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
+obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand_spl.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
 
 endif # drivers
diff --git a/drivers/mtd/nand/rockchip_nand_spl.c b/drivers/mtd/nand/rockchip_nand_spl.c
new file mode 100644
index 0000000000..7559c593ac
--- /dev/null
+++ b/drivers/mtd/nand/rockchip_nand_spl.c
@@ -0,0 +1,348 @@
+/*
+ * Copyright (c) 2017 Yifeng Zhao <yifeng.zhao@rock-chips.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <inttypes.h>
+#include <nand.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NANDC_V6_BOOTROM_ECC	24
+#define NANDC_V6_NUM_BANKS	4
+#define NANDC_V6_DEF_TIMEOUT	20000
+#define NANDC_V6_READ		0
+#define NANDC_V6_WRITE		1
+
+#define	NANDC_REG_V6_FMCTL	0x00
+#define	NANDC_REG_V6_FMWAIT	0x04
+#define	NANDC_REG_V6_FLCTL	0x08
+#define	NANDC_REG_V6_BCHCTL	0x0c
+#define	NANDC_REG_V6_DMA_CFG	0x10
+#define	NANDC_REG_V6_DMA_BUF0	0x14
+#define	NANDC_REG_V6_DMA_BUF1	0x18
+#define	NANDC_REG_V6_DMA_ST	0x1C
+#define	NANDC_REG_V6_BCHST	0x20
+#define	NANDC_REG_V6_RANDMZ	0x150
+#define	NANDC_REG_V6_VER	0x160
+#define	NANDC_REG_V6_INTEN	0x16C
+#define	NANDC_REG_V6_INTCLR	0x170
+#define	NANDC_REG_V6_INTST	0x174
+#define	NANDC_REG_V6_SPARE0	0x200
+#define	NANDC_REG_V6_SPARE1	0x230
+#define	NANDC_REG_V6_BANK0	0x800
+#define	NANDC_REG_V6_SRAM0	0x1000
+#define	NANDC_REG_V6_SRAM_SIZE	0x400
+
+#define NANDC_REG_V6_DATA	0x00
+#define NANDC_REG_V6_ADDR	0x04
+#define NANDC_REG_V6_CMD	0x08
+
+/* FMCTL */
+#define NANDC_V6_FM_WP		BIT(8)
+#define NANDC_V6_FM_CE_SEL_M	0xFF
+#define NANDC_V6_FM_CE_SEL(x)	(1 << (x))
+#define NANDC_V6_FM_FREADY	BIT(9)
+
+/* FLCTL */
+#define NANDC_V6_FL_RST		BIT(0)
+#define NANDC_V6_FL_DIR_S	0x1
+#define NANDC_V6_FL_XFER_START	BIT(2)
+#define NANDC_V6_FL_XFER_EN	BIT(3)
+#define NANDC_V6_FL_ST_BUF_S	0x4
+#define NANDC_V6_FL_XFER_COUNT	BIT(5)
+#define NANDC_V6_FL_ACORRECT	BIT(10)
+#define NANDC_V6_FL_XFER_READY	BIT(20)
+
+/* BCHCTL */
+#define NAND_V6_BCH_REGION_S	0x5
+#define NAND_V6_BCH_REGION_M	0x7
+
+/* BCHST */
+#define NANDC_V6_BCH0_ST_ERR	BIT(2)
+#define NANDC_V6_BCH1_ST_ERR	BIT(15)
+#define NANDC_V6_ECC_ERR_CNT0(x) ((((x & (0x1F << 3)) >> 3) \
+				| ((x & (1 << 27)) >> 22)) & 0x3F)
+#define NANDC_V6_ECC_ERR_CNT1(x) ((((x & (0x1F << 16)) >> 16) \
+				| ((x & (1 << 29)) >> 24)) & 0x3F)
+
+struct rk_nand {
+	void __iomem *regs;
+	u8 chipnr;
+	u8 id[5];
+	u8 *databuf;
+};
+
+struct rk_nand *g_rk_nand;
+
+static void nandc_init(struct rk_nand *rknand)
+{
+	writel(0x1081, rknand->regs + NANDC_REG_V6_FMWAIT);
+}
+
+static void rockchip_nand_wait_dev_ready(void __iomem *regs)
+{
+	u32 reg;
+	u32 timeout = NANDC_V6_DEF_TIMEOUT;
+
+	while (timeout--) {
+		udelay(1);
+		reg = readl(regs + NANDC_REG_V6_FMCTL);
+
+		if ((reg & NANDC_V6_FM_FREADY))
+			break;
+	}
+}
+
+static void rockchip_nand_select_chip(void __iomem *regs, int chipnr)
+{
+	u32 reg;
+
+	reg = readl(regs + NANDC_REG_V6_FMCTL);
+	reg &= ~NANDC_V6_FM_CE_SEL_M;
+	if (chipnr != -1)
+		reg |= 1 << chipnr;
+	writel(reg, regs + NANDC_REG_V6_FMCTL);
+}
+
+static void rockchip_nand_read_page(void __iomem *regs,
+				    int page, int col)
+{
+	void __iomem *bank_base = regs + NANDC_REG_V6_BANK0;
+
+	writeb(0x00, bank_base + NANDC_REG_V6_CMD);
+	writeb(col, bank_base + NANDC_REG_V6_ADDR);
+	writeb(col >> 8, bank_base + NANDC_REG_V6_ADDR);
+	writeb(page, bank_base + NANDC_REG_V6_ADDR);
+	writeb(page >> 8, bank_base + NANDC_REG_V6_ADDR);
+	writeb(page >> 16, bank_base + NANDC_REG_V6_ADDR);
+	writeb(0x30, bank_base + NANDC_REG_V6_CMD);
+}
+
+static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
+					 u8 dir,
+					 u8 st_buf)
+{
+	u32 reg;
+
+	reg = readl(rknand->regs + NANDC_REG_V6_BCHCTL);
+	reg = (reg & (~(NAND_V6_BCH_REGION_M << NAND_V6_BCH_REGION_S)));
+	writel(reg, rknand->regs + NANDC_REG_V6_BCHCTL);
+
+	reg = (dir << NANDC_V6_FL_DIR_S) | (st_buf << NANDC_V6_FL_ST_BUF_S) |
+		  NANDC_V6_FL_XFER_EN | NANDC_V6_FL_XFER_COUNT |
+		  NANDC_V6_FL_ACORRECT;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+
+	reg |= NANDC_V6_FL_XFER_START;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+}
+
+static int rockchip_nand_wait_pio_xfer_done(struct rk_nand *rknand)
+{
+	int timeout = NANDC_V6_DEF_TIMEOUT;
+	int reg;
+
+	while (timeout--) {
+		reg = readl(rknand->regs + NANDC_REG_V6_FLCTL);
+
+		if ((reg & NANDC_V6_FL_XFER_READY) != 0)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout == 0)
+		return -1;
+
+	return 0;
+}
+
+static int nandc_read_page(unsigned int page, uint8_t *buf)
+{
+	void __iomem *sram_base = g_rk_nand->regs + NANDC_REG_V6_SRAM0;
+	unsigned int max_bitflips = 0;
+	int ret, step, bch_st, ecc_step;
+
+	ecc_step = CONFIG_SYS_NAND_PAGE_SIZE / 1024;
+	rockchip_nand_select_chip(g_rk_nand->regs, 0);
+	rockchip_nand_read_page(g_rk_nand->regs, page, 0);
+	rockchip_nand_wait_dev_ready(g_rk_nand->regs);
+	rockchip_nand_pio_xfer_start(g_rk_nand, NANDC_V6_READ, 0);
+
+	for (step = 0; step < ecc_step; step++) {
+		int data_off = step * 1024;
+		u8 *data = buf + data_off;
+
+		ret = rockchip_nand_wait_pio_xfer_done(g_rk_nand);
+		if (ret)
+			return ret;
+
+		bch_st = readl(g_rk_nand->regs + NANDC_REG_V6_BCHST);
+
+		if (bch_st & NANDC_V6_BCH0_ST_ERR) {
+			max_bitflips = -1;
+		} else {
+			ret = NANDC_V6_ECC_ERR_CNT0(bch_st);
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		if ((step + 1) < ecc_step)
+			rockchip_nand_pio_xfer_start(g_rk_nand, NANDC_V6_READ,
+						     (step + 1) & 0x1);
+
+		memcpy_fromio(data, sram_base + NANDC_REG_V6_SRAM_SIZE *
+			      (step & 1), 1024);
+	}
+	rockchip_nand_select_chip(g_rk_nand->regs, -1);
+
+	return max_bitflips;
+}
+
+static int is_badblock(unsigned int page)
+{
+	int res = 0, i;
+	u16 bad = 0xff;
+	void __iomem *regs = g_rk_nand->regs;
+	void __iomem *bank_base = regs + NANDC_REG_V6_BANK0;
+
+	if (nandc_read_page(page, g_rk_nand->databuf) == -1) {
+		rockchip_nand_select_chip(regs, 0);
+		rockchip_nand_read_page(regs, page,
+					CONFIG_SYS_NAND_PAGE_SIZE);
+		rockchip_nand_wait_dev_ready(regs);
+		for (i = 0; i < 8; i++) {
+			bad = readb(bank_base);
+			if (bad)
+				break;
+		}
+		if (i >= 8)
+			res = 1;
+		rockchip_nand_select_chip(regs, 0);
+	}
+	if (res)
+		printf("%s 0x%x %x %x\n", __func__, page, res, bad);
+	return res;
+}
+
+static void read_flash_id(struct rk_nand *rknand, uint8_t *id)
+{
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0;
+
+	rockchip_nand_wait_dev_ready(g_rk_nand->regs);
+	writeb(0x90, bank_base + NANDC_REG_V6_CMD);
+	writeb(0x00, bank_base + NANDC_REG_V6_ADDR);
+	udelay(1);
+	id[0] = readb(bank_base);
+	id[1] = readb(bank_base);
+	id[2] = readb(bank_base);
+	id[3] = readb(bank_base);
+	id[4] = readb(bank_base);
+	rockchip_nand_select_chip(rknand->regs, -1);
+	printf("%s %x %x %x %x %x\n", __func__, id[0], id[1], id[2], id[3],
+	       id[4]);
+}
+
+void board_nand_init(void)
+{
+	const void *blob = gd->fdt_blob;
+	fdt_addr_t regs;
+	int node;
+
+	if (g_rk_nand)
+		return;
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		printf("Nand node not found\n");
+		goto err;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		goto err;
+	}
+
+	regs = fdt_get_base_address(blob, node);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		goto err;
+	}
+
+	g_rk_nand = kzalloc(sizeof(*g_rk_nand), GFP_KERNEL);
+	g_rk_nand->regs = (void *)regs;
+	g_rk_nand->databuf = kzalloc(CONFIG_SYS_NAND_PAGE_SIZE, GFP_KERNEL);
+	nandc_init(g_rk_nand);
+	read_flash_id(g_rk_nand, g_rk_nand->id);
+	if (g_rk_nand->id[0] != 0xFF && g_rk_nand->id[1] != 0xFF &&
+	    g_rk_nand->id[0] != 0x00 && g_rk_nand->id[1] != 0x00)
+		g_rk_nand->chipnr = 1;
+	return;
+err:
+	kfree(g_rk_nand);
+}
+
+int nand_spl_load_image(u32 offs, u32 size, void *buf)
+{
+	int i;
+	unsigned int page;
+	unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
+				CONFIG_SYS_NAND_PAGE_SIZE;
+
+	/* Convert to page number */
+	page = offs / CONFIG_SYS_NAND_PAGE_SIZE;
+	i = 0;
+
+	size = roundup(size, CONFIG_SYS_NAND_PAGE_SIZE);
+	while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
+		/*
+		 * Check if we have crossed a block boundary, and if so
+		 * check for bad block.
+		 */
+		if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
+			/*
+			 * Yes, new block. See if this block is good. If not,
+			 * loop until we find a good block.
+			 */
+			while (is_badblock(page)) {
+				page = page + CONFIG_SYS_NAND_PAGE_COUNT;
+				/* Check i we've reached the end of flash. */
+				if (page >= maxpages)
+					return -EIO;
+			}
+		}
+
+		if (nandc_read_page(page, buf) < 0)
+			return -EIO;
+
+		page++;
+		i++;
+		buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
+	}
+	return 0;
+}
+
+void nand_init(void)
+{
+	board_nand_init();
+}
+
+int rk_nand_init(void)
+{
+	board_nand_init();
+	if (g_rk_nand && g_rk_nand->chipnr)
+		return 0;
+	else
+		return -ENODEV;
+}
+
+void nand_deselect(void) {}
diff --git a/include/nand.h b/include/nand.h
index c1c1d8cce6..3279f43d9e 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -153,4 +153,7 @@ void sunxi_nand_init(void);
  */
 struct mtd_info *get_nand_dev_by_index(int dev);
 
+/* rockchip platform specific init functions */
+int rk_nand_init(void);
+
 #endif /* _NAND_H_ */

commit 19652be07ea78b9c5581d76ecf6fecd511d46eb0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Apr 11 16:05:31 2019 +0800

    gadget: rockusb: fix cmd exception for r/w vendor storage
    
    It should be marked sense_data error when r/w vendor storage failed.
    
    Change-Id: I7e298d4f700ac3ca9648e973258cff521c41ec03
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 39e0a30c3a..25900ce6b2 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -358,15 +358,19 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 				rc = vendor_storage_write(vhead->id,
 							  (char __user *)data,
 							  vhead->size);
-				if (rc < 0)
+				if (rc < 0) {
+					curlun->sense_data = SS_WRITE_ERROR;
 					return -EIO;
+				}
 			} else {
 				/* RPMB */
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
-				if (rc < 0)
+				if (rc < 0) {
+					curlun->sense_data = SS_WRITE_ERROR;
 					return -EIO;
+				}
 			}
 
 			common->residue -= common->data_size;
@@ -427,16 +431,20 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 			rc = vendor_storage_read(vhead->id,
 						 (char __user *)data,
 						 common->data_size);
-			if (!rc)
+			if (!rc) {
+				curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
 				return -EIO;
+			}
 			vhead->size = rc;
 		} else {
 			/* RPMB */
 			rc =
 			read_raw_data_from_secure_storage((u8 *)data,
 							  common->data_size);
-			if (!rc)
+			if (!rc) {
+				curlun->sense_data = SS_UNRECOVERED_READ_ERROR;
 				return -EIO;
+			}
 			vhead->size = rc;
 		}
 

commit 3e45175eaebcaae3c7977e921790ee3587c8b97f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 14:13:38 2019 +0800

    rockchip: board: fixup cru phandle for all U-Boot node.
    
    There is a phandle miss match between U-Boot and kernel dtb node,
    the typical is cru phandle, we fixup it in all U-Boot live dt nodes
    which has property "clocks" or "assigned-clocks".
    
    Change-Id: Id5769195ad54a7ba1cc06ed5cfb68ebcddfd3382
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4137b6998e..bd6634a0e8 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -17,6 +17,7 @@
 #include <asm/arch/vendor.h>
 #include <misc.h>
 #include <asm/gpio.h>
+#include <dm/uclass-internal.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/periph.h>
@@ -180,6 +181,110 @@ int board_late_init(void)
 #ifdef CONFIG_USING_KERNEL_DTB
 #include <asm/arch/resource_img.h>
 
+/* Here, only fixup cru phandle, pmucru is not included */
+static int phandles_fixup(void *fdt)
+{
+	const char *props[] = { "clocks", "assigned-clocks" };
+	struct udevice *dev;
+	struct uclass *uc;
+	const char *comp;
+	u32 id, nclocks;
+	u32 *clocks;
+	int phandle, ncells;
+	int off, offset;
+	int ret, length;
+	int i, j;
+	int first_phandle = -1;
+
+	phandle = -ENODATA;
+	ncells = -ENODATA;
+
+	/* fdt points to kernel dtb, getting cru phandle and "#clock-cells" */
+	for (offset = fdt_next_node(fdt, 0, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		comp = fdt_getprop(fdt, offset, "compatible", NULL);
+		if (!comp)
+			continue;
+
+		/* Actually, this is not a good method to get cru node */
+		off = strlen(comp) - strlen("-cru");
+		if (off > 0 && !strncmp(comp + off, "-cru", 4)) {
+			phandle = fdt_get_phandle(fdt, offset);
+			ncells = fdtdec_get_int(fdt, offset,
+						"#clock-cells", -ENODATA);
+			break;
+		}
+	}
+
+	if (phandle == -ENODATA || ncells == -ENODATA)
+		return 0;
+
+	debug("%s: target cru: clock-cells:%d, phandle:0x%x\n",
+	      __func__, ncells, fdt32_to_cpu(phandle));
+
+	/* Try to fixup all cru phandle from U-Boot dtb nodes */
+	for (id = 0; id < UCLASS_COUNT; id++) {
+		ret = uclass_get(id, &uc);
+		if (ret)
+			continue;
+
+		if (list_empty(&uc->dev_head))
+			continue;
+
+		list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+			/* Only U-Boot node go further */
+			if (!dev_read_bool(dev, "u-boot,dm-pre-reloc"))
+				continue;
+
+			for (i = 0; i < ARRAY_SIZE(props); i++) {
+				if (!dev_read_prop(dev, props[i], &length))
+					continue;
+
+				clocks = malloc(length);
+				if (!clocks)
+					return -ENOMEM;
+
+				/* Read "props[]" which contains cru phandle */
+				nclocks = length / sizeof(u32);
+				if (dev_read_u32_array(dev, props[i],
+						       clocks, nclocks)) {
+					free(clocks);
+					continue;
+				}
+
+				/* Fixup with kernel cru phandle */
+				for (j = 0; j < nclocks; j += (ncells + 1)) {
+					/*
+					 * Check: update pmucru phandle with cru
+					 * phandle by mistake.
+					 */
+					if (first_phandle == -1)
+						first_phandle = clocks[j];
+
+					if (clocks[j] != first_phandle)
+						printf("WARN: %s: first cru phandle=%d, this=%d\n",
+						       dev_read_name(dev),
+						       first_phandle, clocks[j]);
+
+					clocks[j] = phandle;
+				}
+
+				/*
+				 * Override live dt nodes but not fdt nodes,
+				 * because all U-Boot nodes has been imported
+				 * to live dt nodes, should use "dev_xxx()".
+				 */
+				dev_write_u32_array(dev, props[i],
+						    clocks, nclocks);
+				free(clocks);
+			}
+		}
+	}
+
+	return 0;
+}
+
 int init_kernel_dtb(void)
 {
 	int ret = 0;
@@ -197,6 +302,12 @@ int init_kernel_dtb(void)
 		return 0;
 	}
 
+	/*
+	 * There is a phandle miss match between U-Boot and kernel dtb node,
+	 * the typical is cru phandle, we fixup it in U-Boot live dt nodes.
+	 */
+	phandles_fixup((void *)fdt_addr);
+
 	of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root);
 
 	dm_scan_fdt((void *)fdt_addr, false);

commit 04539b46d521a675e53806a7cc0164ad191203b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 3 12:55:59 2019 +0800

    dm: core: add function dev_write_u32_array() to write u32 array values
    
    Change-Id: I6633395c7704eefff59c2145562fe239e21f3b35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 863f6ecc47..cfaee4e4d6 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -485,6 +485,25 @@ int of_read_u32_array(const struct device_node *np, const char *propname,
 	return 0;
 }
 
+int of_write_u32_array(const struct device_node *np, const char *propname,
+		       u32 *values, size_t sz)
+{
+	__be32 *val;
+
+	debug("%s: %s: ", __func__, propname);
+	val = of_find_property_value_of_size(np, propname,
+					     sz * sizeof(*values));
+
+	if (IS_ERR(val))
+		return PTR_ERR(val);
+
+	debug("size %zd\n", sz);
+	while (sz--)
+		*val++ = cpu_to_be32p(values++);
+
+	return 0;
+}
+
 int of_property_match_string(const struct device_node *np, const char *propname,
 			     const char *string)
 {
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 3f51b6d74b..992dd573a2 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -160,6 +160,21 @@ int ofnode_read_u32_array(ofnode node, const char *propname,
 	}
 }
 
+int ofnode_write_u32_array(ofnode node, const char *propname,
+			   u32 *values, size_t sz)
+{
+	assert(ofnode_valid(node));
+	debug("%s: %s: ", __func__, propname);
+
+	if (ofnode_is_np(node)) {
+		return of_write_u32_array(ofnode_to_np(node), propname,
+					 values, sz);
+	} else {
+		return fdt_setprop((void *)gd->fdt_blob, ofnode_to_offset(node),
+				   propname, values, sz);
+	}
+}
+
 ofnode ofnode_first_subnode(ofnode node)
 {
 	assert(ofnode_valid(node));
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 9f4d8c72c4..9b216726ac 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -175,6 +175,14 @@ int dev_read_u32_array(struct udevice *dev, const char *propname,
 	return ofnode_read_u32_array(dev_ofnode(dev), propname, out_values, sz);
 }
 
+int dev_write_u32_array(struct udevice *dev, const char *propname,
+			u32 *values, size_t sz)
+{
+	if (!dev_of_valid(dev))
+		return -EINVAL;
+	return ofnode_write_u32_array(dev_ofnode(dev), propname, values, sz);
+}
+
 const uint8_t *dev_read_u8_array_ptr(struct udevice *dev, const char *propname,
 				     size_t sz)
 {
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 035f0c8d65..48baad5ef9 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -251,6 +251,22 @@ int of_property_read_u64(const struct device_node *np, const char *propname,
 int of_read_u32_array(const struct device_node *np, const char *propname,
 		      u32 *out_values, size_t sz);
 
+/**
+ * of_write_u32_array() - Find and write an array of 32 bit integers
+ *
+ * Search for a property in a device node and write 32-bit value(s) to
+ * it.
+ *
+ * @np:		device node from which the property value is to be read.
+ * @propname:	name of the property to be searched.
+ * @values:	pointer to update value, modified only if return value is 0.
+ * @sz:		number of array elements to read
+ * @return 0 on success, -EINVAL if the property does not exist, -ENODATA
+ * if property does not have a value, and -EOVERFLOW is longer than sz.
+ */
+int of_write_u32_array(const struct device_node *np, const char *propname,
+		       u32 *values, size_t sz);
+
 /**
  * of_property_match_string() - Find string in a list and return index
  *
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index f90ce33ea9..8a4291a6ad 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -274,6 +274,19 @@ const char *ofnode_read_string(ofnode node, const char *propname);
 int ofnode_read_u32_array(ofnode node, const char *propname,
 			  u32 *out_values, size_t sz);
 
+/**
+ * ofnode_write_u32_array() - Find and write an array of 32 bit integers
+ *
+ * @node:	valid node reference to read property from
+ * @propname:	name of the property to read
+ * @values:	pointer to update value, modified only if return value is 0
+ * @sz:		number of array elements to read
+ * @return 0 on success, -EINVAL if the property does not exist, -ENODATA
+ * if property does not have a value, and -EOVERFLOW is longer than sz.
+ */
+int ofnode_write_u32_array(ofnode node, const char *propname,
+			   u32 *values, size_t sz);
+
 /**
  * ofnode_read_bool() - read a boolean value from a property
  *
diff --git a/include/dm/read.h b/include/dm/read.h
index 77c9ae6fcd..71b128ff10 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -341,6 +341,25 @@ int dev_read_alias_seq(struct udevice *dev, int *devnump);
 int dev_read_u32_array(struct udevice *dev, const char *propname,
 		       u32 *out_values, size_t sz);
 
+/**
+ * dev_write_u32_array() - Find and write an array of 32 bit integers
+ *
+ * Search for a property in a device node and write 32-bit value(s) to
+ * it.
+ *
+ * The out_values is modified only if a valid u32 value can be decoded.
+ *
+ * @dev: device to look up
+ * @propname:	name of the property to read
+ * @values:	pointer to update value, modified only if return value is 0
+ * @sz:		number of array elements to read
+ * @return 0 on success, -EINVAL if the property does not exist, -ENODATA if
+ * property does not have a value, and -EOVERFLOW if the property data isn't
+ * large enough.
+ */
+int dev_write_u32_array(struct udevice *dev, const char *propname,
+			u32 *values, size_t sz);
+
 /**
  * dev_read_first_subnode() - find the first subnode of a device's node
  *

commit 7b4692447bb0246e5b815fb821e3a6d728d96fa1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 31 09:55:12 2019 +0800

    common: rkimg: set download boot mode as the highest priority
    
    Anyway, we should promise the user can enter download mode by
    kernel command: reboot bootloader/loader/fastboot.
    
    Change-Id: I23181a2f672774070f93478a338622be622900a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 56e18ba571..afab6b26a0 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -402,27 +402,29 @@ int rockchip_get_boot_mode(void)
 	}
 
 fallback:
-	/* Mode from misc partition */
-	if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
-		boot_mode = BOOT_MODE_RECOVERY;
+	/*
+	 * Boot mode priority
+	 *
+	 * Anyway, we should set download boot mode as the highest priority, so:
+	 *
+	 * reboot loader/bootloader/fastboot > misc partition "recovery" > reboot xxx.
+	 */
+	reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	if (reg_boot_mode == BOOT_LOADER) {
+		printf("boot mode: loader\n");
+		boot_mode = BOOT_MODE_LOADER;
+	} else if (reg_boot_mode == BOOT_FASTBOOT) {
+		printf("boot mode: bootloader\n");
+		boot_mode = BOOT_MODE_BOOTLOADER;
+	} else if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		printf("boot mode: recovery\n");
+		boot_mode = BOOT_MODE_RECOVERY;
 	} else {
-		/* Mode from boot mode register */
-		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
-
 		switch (reg_boot_mode) {
 		case BOOT_NORMAL:
 			printf("boot mode: normal\n");
 			boot_mode = BOOT_MODE_NORMAL;
 			break;
-		case BOOT_FASTBOOT:
-			printf("boot mode: bootloader\n");
-			boot_mode = BOOT_MODE_BOOTLOADER;
-			break;
-		case BOOT_LOADER:
-			printf("boot mode: loader\n");
-			boot_mode = BOOT_MODE_LOADER;
-			break;
 		case BOOT_RECOVERY:
 			/* printf("boot mode: recovery\n"); */
 			boot_mode = BOOT_MODE_RECOVERY;

commit 224307fea301069b1dab2976ec10ddaa7c3399d2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 13 10:50:36 2019 +0800

    make.sh: fix "ls: cannot access *_loader_*.bin: No such file or directory"
    
    Change-Id: I46885f5a59a4ecfa25ad2ab95965732edbb722fe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 8ea193ec10..a148e8863d 100755
--- a/make.sh
+++ b/make.sh
@@ -623,7 +623,7 @@ pack_loader_image()
 		return
 	fi
 
-	ls *_loader_*.bin >/dev/null && rm *_loader_*.bin
+	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then

commit daa3bef505a406fa121901b85faddda2a2020cd8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 12 10:19:51 2019 +0800

    make.sh: support pack spl/tpl loader and u-boot.itb
    
    Usage:
            ./make.sh spl           --- pack tpl+spl
            ./make.sh spl-s         --- pack spl
            ./make.sh itb           --- pack u-boot.itb
    
    itb: Only support pack bl31 into u-boot.itb on 64-bit platform.
    
    Change-Id: I2279ec8c961208160c324a6ade8afe9b8f2713f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index fad2993f92..8ea193ec10 100755
--- a/make.sh
+++ b/make.sh
@@ -119,7 +119,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|loader*|debug*|trust*|uboot|map|sym)
+			''|elf*|loader*|spl*|itb|debug*|trust|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -159,7 +159,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|debug*|trust*|uboot|map|sym)
+		''|elf*|loader*|spl*|itb|debug*|trust*|uboot|map|sym)
 		;;
 
 		*)
@@ -270,6 +270,16 @@ sub_commands()
 		exit 0
 		;;
 
+		spl)
+		pack_spl_loader_image ${opt}
+		exit 0
+		;;
+
+		itb)
+		pack_uboot_itb_image
+		exit 0
+		;;
+
 		uboot)
 		pack_uboot_image ${opt}
 		exit 0
@@ -545,6 +555,65 @@ pack_uboot_image()
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 
+pack_uboot_itb_image()
+{
+	local ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+
+	if [ ! -f ${ini} ]; then
+		echo "pack trust failed! Can't find: ${ini}"
+		return
+	fi
+
+	bl31=`sed -n '/_bl31_/s/PATH=//p' ${ini} |tr -d '\r'`
+
+	cp ${RKBIN}/${bl31} bl31.elf
+	make CROSS_COMPILE=${TOOLCHAIN_GCC} u-boot.itb
+
+	echo "pack u-boot.itb okay! Input: ${ini}"
+}
+
+pack_spl_loader_image()
+{
+	local header label="SPL" mode=$1
+	local ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+	local temp_ini=${RKBIN}/.temp/${RKCHIP_LOADER}MINIALL.ini
+
+	if [ ! -f ${ini} ]; then
+		echo "pack TPL+SPL loader failed! Can't find: ${ini}"
+		return
+	fi
+
+	# Copy to .temp folder
+	if [ -d ${RKBIN}/.temp ]; then
+		rm ${RKBIN}/.temp -rf
+	else
+		mkdir ${RKBIN}/.temp
+	fi
+	cp ${OUTDIR}/spl/u-boot-spl.bin ${RKBIN}/.temp/
+	cp ${OUTDIR}/tpl/u-boot-tpl.bin ${RKBIN}/.temp/
+	cp ${ini} ${RKBIN}/.temp/
+
+	cd ${RKBIN}
+	if [ "$mode" = 'spl' ]; then	# pack tpl+spl
+		# Update ini
+		label="TPL+SPL"
+		header=`sed -n '/NAME=/s/NAME=//p' ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini`
+		dd if=${RKBIN}/.temp/u-boot-tpl.bin of=${RKBIN}/.temp/tpl.bin bs=1 skip=4
+		sed -i "1s/^/${header:0:4}/" ${RKBIN}/.temp/tpl.bin
+		sed -i "s/FlashData=.*$/FlashData=.\/.temp\/tpl.bin/"     ${temp_ini}
+	fi
+
+	sed -i "s/FlashBoot=.*$/FlashBoot=.\/.temp\/u-boot-spl.bin/"  ${temp_ini}
+
+	${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} ${temp_ini}
+	rm ${RKBIN}/.temp -rf
+	cd -
+	ls *_loader_*.bin >/dev/null 2>&1 && rm *_loader_*.bin
+	mv ${RKBIN}/*_loader_*.bin ./
+	echo "pack loader(${label}) okay! Input: ${ini}"
+	ls ./*_loader_*.bin
+}
+
 pack_loader_image()
 {
 	local mode=$1 files ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini

commit 3e15af6d1a342c995b45265a71459c7b368b0715
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Apr 30 10:23:37 2019 +0800

    rockchip: rk3308: enable spl relocation
    
    Relocate spl to a high address(48M + 4KB) to avoid
    overlap wit ATF.
    
    Change-Id: Iae767d7e5b18b24872d2a6975ef25b2146f05095
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 537f68b408..f01e80bc6a 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -24,6 +24,8 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_SKIP_RELOCATE is not set
+CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 171b978f04..c1bffce56f 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -25,6 +25,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+# CONFIG_SPL_SKIP_RELOCATE is not set
+CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set

commit 4f2858296bf38852f0a875746bfb5167f807433b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Apr 19 17:35:19 2019 +0800

    rockchip: rk3308: Enable SPL loading U-Boot as a FIT
    
    Change-Id: Ide8f42aeb5ba9fd80bb66540d9e39cd04b04f9e0
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index c2dc32005d..537f68b408 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
@@ -17,11 +18,14 @@ CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index d501298a4a..171b978f04 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
@@ -16,11 +17,14 @@ CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set

commit 951488b02bb8d1a6997c19ec732407e359a70765
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 1 11:13:48 2019 +0800

    rockchip: rk3308: enable spl build
    
    As rk3308 is a aarch64 based soc, we only let
    it run spl on aarch64 excution state. But for
    u-boot stage, it may run on aarch32 or aarch64
    state.
    
    Change-Id: I592375aef19a35f10555f7c5b991445cf02c4543
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7e08cc11f1..55eae9054b 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -215,6 +215,17 @@ config ROCKCHIP_RK3308
 	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
 	select GICV2
+	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
+	select SUPPORT_TPL if !ARM64_BOOT_AARCH32
+	select SPL if !ARM64_BOOT_AARCH32
+	select TPL if !ARM64_BOOT_AARCH32
+	imply SPL_CLK
+	imply SPL_REGMAP
+	imply SPL_SYSCON
+	imply SPL_RAM
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
+	imply SPL_SEPARATE_BSS
 	help
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 979823ec75..c2dc32005d 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -1,11 +1,16 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
@@ -17,6 +22,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -38,8 +44,11 @@ CONFIG_CMD_MMC=y
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 84b02619d3..d501298a4a 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -1,10 +1,15 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
@@ -16,6 +21,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -38,8 +44,11 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_PMIC=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
@@ -52,11 +61,11 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK816=y
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index a09a18271f..d3cd205bec 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -19,7 +19,9 @@
 #undef CONFIG_CONSOLE_SCROLL_LINES
 #define CONFIG_CONSOLE_SCROLL_LINES            10
 
+#ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 50b931322d..98cceefdd8 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -14,6 +14,10 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x20000
+#define CONFIG_SPL_BSS_START_ADDR	0x00400000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 
 #define CONFIG_SYS_NS16550_MEM32
 

commit 4807f529b80878fad43b8e122a2759247f4d9c44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 20:05:47 2019 +0800

    common: spl: mmc: support load rockchip images
    
    Change-Id: I200c052f61e8c3fdda91ed5447ca54452080d641
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b57e0b04e4..435fe06196 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <spl.h>
+#include <spl_rkfw.h>
 #include <linux/compiler.h>
 #include <errno.h>
 #include <asm/u-boot.h>
@@ -60,6 +61,23 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
 	struct image_header *header;
 	int ret = 0;
 
+#ifdef CONFIG_SPL_LOAD_RKFW
+	struct spl_load_info load;
+
+	load.dev = mmc;
+	load.priv = NULL;
+	load.filename = NULL;
+	load.bl_len = mmc->read_bl_len;
+	load.read = h_spl_load_read;
+
+	ret = spl_load_rkfw_image(spl_image, &load,
+				  CONFIG_RKFW_TRUST_SECTOR,
+				  CONFIG_RKFW_U_BOOT_SECTOR);
+	/* If boot successfully or can't try others, just go end */
+	if (!ret || ret != -EAGAIN)
+		goto end;
+#endif
+
 	header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
 					 sizeof(struct image_header));
 

commit d3992738952fd9a61e3dc6834fe99087d5203738
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 13 11:21:23 2019 +0800

    Makefile: u-boot.itb: call "mkfitimage" when kernel dtb enabled
    
    This was a careless mistake.
    
    fixes: 510e4046a63fe6607bf328aeeb06ec2e36b56b0d
    (Makefile: u-boot.itb: use dt-spl.dtb if using kernel dtb)
    
    Change-Id: Ifc8ad908356db55007ddd8e125543a6501cbe5da
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index 28e3e70001..a2e1a09674 100644
--- a/Makefile
+++ b/Makefile
@@ -1041,8 +1041,8 @@ ifeq ($(CONFIG_USING_KERNEL_DTB),y)
 u-boot.itb: u-boot-nodtb.bin dts/dt-spl.dtb $(U_BOOT_ITS) FORCE
 else
 u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
-	$(call if_changed,mkfitimage)
 endif
+	$(call if_changed,mkfitimage)
 
 u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)

commit 13c5d8ec8c484a5e8a612e9533011423832164af
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 20:04:47 2019 +0800

    rockchip: spl: add rockchip image load support
    
    This patch add SPL support to load rockchip images(trust and U-Boot).
    
    Change-Id: I4f66dbd26af051feb93dfaca57062fd31b3dc695
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index e3fae4b806..317547792c 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -758,6 +758,24 @@ config SPL_OPTEE
 	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
 	  More detail at: https://github.com/OP-TEE/optee_os
 
+config SPL_LOAD_RKFW
+	bool "SPL support load rockchip firmware images"
+	depends on SPL
+	help
+	  This enables SPL support load rockchip firmware images.
+	  Please define both RKFW_TRUST_SECTOR and RKFW_U_BOOT_SECTOR
+	  for trust and U-Boot images.
+
+config RKFW_TRUST_SECTOR
+	hex "rockchip trust image load sector"
+	depends on SPL_LOAD_RKFW
+	default 0x6000
+
+config RKFW_U_BOOT_SECTOR
+	hex "rockchip uboot image load sector"
+	depends on SPL_LOAD_RKFW
+	default 0x4000
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 3e33f3138b..713faa3a76 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
 obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
+obj-$(CONFIG_$(SPL_TPL_)LOAD_RKFW) += spl_rkfw.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl_rkfw.c b/common/spl/spl_rkfw.c
new file mode 100644
index 0000000000..906ba12c6d
--- /dev/null
+++ b/common/spl/spl_rkfw.c
@@ -0,0 +1,276 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <spl_rkfw.h>
+
+static const __aligned(16) struct s_fip_name_id fip_name_id[] = {
+	{ BL30_IMAGE_NAME, UUID_SCP_FIRMWARE_BL30 },		/* optional */
+	{ BL31_IMAGE_NAME, UUID_EL3_RUNTIME_FIRMWARE_BL31 },	/* mandatory */
+	{ BL32_IMAGE_NAME, UUID_SECURE_PAYLOAD_BL32 },		/* optional */
+};
+
+static int file2comp_id(const char *file_name, u32 *comp_id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(fip_name_id); i++) {
+		if (!strcmp(file_name, fip_name_id[i].name)) {
+			*comp_id = fip_name_id[i].id;
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
+static int open_image(const char *image_name, tboot_entry *entry,
+		      struct tag_tboot_header_2k *hdr)
+{
+	u32 i, component_num, sign_offset;
+	component_data *pcompdata;
+	boot_component *pcomp;
+	int n_found = 0;
+	u32 comp_id;
+	int ret;
+
+	ret = file2comp_id(image_name, &comp_id);
+	if (ret) {
+		printf("Can't find unknown image: %s\n", image_name);
+		return ret;
+	}
+
+	component_num = (hdr->size >> 16) & 0xffff;
+	sign_offset = (hdr->size & 0xffff) << 2;
+	pcompdata = (component_data *)((char *)hdr + sizeof(tboot_header));
+	pcomp = (boot_component *)((char *)hdr + sign_offset + SIGNATURE_SIZE);
+
+	for (i = 0; i < component_num; i++) {
+		if (comp_id == pcomp->component_id) {
+			if (n_found < MAX_BL_CODE_NUM) {
+				memcpy(&entry[n_found].component, pcomp,
+				       sizeof(boot_component));
+				memcpy(&entry[n_found].compdata, pcompdata,
+				       sizeof(component_data));
+				n_found++;
+			} else {
+				printf("Image num excess max: %d!\n",
+				       MAX_BL_CODE_NUM);
+				return -EINVAL;
+			}
+		} else {
+			if (n_found > 0)
+				break;
+		}
+
+		pcomp++;
+		pcompdata++;
+	}
+
+	if (!n_found) {
+		printf("No find %s\n", image_name);
+		return -ENONET;
+	}
+
+	return n_found;
+}
+
+static int check_image(struct tag_tboot_header_2k *hdr)
+{
+	u32 hash_format[] = { 0, 160, 256, 256 };
+
+	/* HASH format identifier */
+	return (hash_format[hdr->flags & 0x3] == 0) ? -EINVAL : 0;
+}
+
+static int load_image(struct spl_load_info *info,
+		      struct tag_tboot_header_2k *hdr,
+		      u32 image_sector,
+		      const char *image_name,
+		      uintptr_t *entry_point)
+{
+	tboot_entry entry[MAX_BL_CODE_NUM];
+	void *image_buf = NULL;
+	ulong load_addr;
+	u32 sect_off;
+	u32 sect_cnt;
+	int image_num;
+	int i, ret;
+
+	/* Parse components from image header */
+	image_num = open_image(image_name, entry, hdr);
+	if (image_num < 0)
+		return image_num;
+
+	/* Get all component */
+	for (i = 0; i < image_num; i++) {
+		load_addr = entry[i].compdata.load_addr;
+		sect_cnt = entry[i].component.image_size;
+		sect_off = entry[i].component.storage_addr;
+
+		printf("%s[%d]: addr=0x%lx, size=0x%lx\n",
+		       image_name, i, load_addr, (ulong)sect_cnt * 512);
+
+		/*
+		 * MMC/NAND controller DMA can't access sram region, so:
+		 * data -> ddr buffer -> memcpy to sram region.
+		 */
+		if (load_addr >= SDRAM_MAX_SIZE) {
+			image_buf = memalign(ARCH_DMA_MINALIGN, sect_cnt * 512);
+			if (!image_buf) {
+				printf("%s: malloc failed\n", __func__);
+				return -ENOMEM;
+			}
+		} else {
+			image_buf = (void *)load_addr;
+		}
+
+		ret = info->read(info, image_sector + sect_off,
+				 sect_cnt, image_buf);
+		if (ret != sect_cnt) {
+			printf("Read '%s' failed at sector: %ld, ret=%d\n",
+			       image_name, (ulong)image_sector + sect_off, ret);
+			return -EIO;
+		}
+
+		/* Verify component */
+		ret = check_image(hdr);
+		if (ret) {
+			printf("%s[%d]: verify image fail!\n", image_name, i);
+			return ret;
+		}
+
+		/* Handle sram region */
+		if ((ulong)image_buf != load_addr) {
+			memcpy((void *)load_addr, image_buf, sect_cnt << 9);
+			free(image_buf);
+		}
+
+		/* Fill entry_point by first component */
+		if (i == 0)
+			*entry_point = (uintptr_t)load_addr;
+	}
+
+	return ret;
+}
+
+static int rkfw_load_trust(struct spl_load_info *info, u32 image_sector,
+			   uintptr_t *bl31_entry, uintptr_t *bl32_entry,
+			   int *found_rkfw, u32 try_count)
+{
+	struct tag_tboot_header_2k hdr;
+	u32 sect_addr = image_sector;
+	int blkcnt = 4;	/* header sectors, 2KB */
+	int i, ret = 0;
+
+	/* Find valid image header */
+	for (i = 0; i < try_count; i++) {
+		sect_addr = image_sector + (i * RKFW_RETRY_SECTOR_SIZE);
+		if (blkcnt != info->read(info, sect_addr, blkcnt, &hdr))
+			continue;
+
+		if (hdr.tag == TBOOT_HEAD_TAG) {
+			/* Mark it */
+			*found_rkfw = 1;
+
+			/* bl31 is mandatory */
+			ret = load_image(info, &hdr, sect_addr,
+					 BL31_IMAGE_NAME, bl31_entry);
+			if (ret)
+				continue;
+
+			/* bl32 is optional */
+			ret = load_image(info, &hdr, sect_addr,
+					 BL32_IMAGE_NAME, bl32_entry);
+			if (ret) {
+				if (ret == -ENONET) {
+					*bl32_entry = -1;	/* Not exist */
+					ret = 0;
+				} else {
+					continue;
+				}
+			}
+			break;
+		}
+	}
+
+	return ret;
+}
+
+static int rkfw_load_uboot(struct spl_load_info *info, u32 image_sector,
+			   uintptr_t *bl33_entry, u32 try_count)
+{
+	struct tag_second_loader_hdr hdr;
+	int i, ret, blkcnt = 4;	/* header sectors, 2KB */
+	char *load_addr;
+	u32 sect_addr;
+
+	/* Detect valid image header */
+	for (i = 0; i < try_count; i++) {
+		sect_addr = image_sector + (i * RKFW_RETRY_SECTOR_SIZE);
+		ret = info->read(info, sect_addr, blkcnt, &hdr);
+		if (ret != blkcnt)
+			continue;
+
+		if (!memcmp(hdr.magic, LOADER_HARD_STR, 6)) {
+			/* Load full binary image(right behind header) */
+			sect_addr += blkcnt;
+			load_addr = (char *)((size_t)hdr.loader_load_addr);
+			blkcnt = DIV_ROUND_UP(hdr.loader_load_size, 512);
+
+			printf("u-boot.bin: addr=0x%lx, size=0x%lx\n",
+			       (ulong)load_addr, (ulong)blkcnt * 512);
+			ret = info->read(info, sect_addr, blkcnt, load_addr);
+			if (ret != blkcnt)
+				continue;
+
+			break;
+		}
+	}
+
+	if (i == try_count) {
+		printf("Can not find usable uboot\n");
+		return -ENONET;
+	}
+
+	/* Fill entry point */
+	*bl33_entry = (uintptr_t)hdr.loader_load_addr;
+
+	return 0;
+}
+
+int spl_load_rkfw_image(struct spl_image_info *spl_image,
+			struct spl_load_info *info,
+			u32 trust_sector, u32 uboot_sector)
+{
+	int ret, try_count = RKFW_RETRY_SECTOR_TIMES;
+	int found_rkfw = 0;
+
+	ret = rkfw_load_trust(info, trust_sector,
+			      &spl_image->entry_point,
+			      &spl_image->entry_point_bl32,
+			      &found_rkfw, try_count);
+	if (ret) {
+		printf("Load trust image failed! ret=%d\n", ret);
+		goto out;
+	}
+
+	ret = rkfw_load_uboot(info, uboot_sector,
+			      &spl_image->entry_point_bl33, try_count);
+	if (ret) {
+		printf("Load uboot image failed! ret=%d\n", ret);
+		goto out;
+	}
+
+#if CONFIG_IS_ENABLED(LOAD_FIT)
+	spl_image->fdt_addr = 0;
+#endif
+	spl_image->os = IH_OS_ARM_TRUSTED_FIRMWARE;
+
+out:
+	/* If not found rockchip firmware, try others outside */
+	return found_rkfw ? ret : -EAGAIN;
+}
diff --git a/include/spl_rkfw.h b/include/spl_rkfw.h
new file mode 100644
index 0000000000..c4c8e34205
--- /dev/null
+++ b/include/spl_rkfw.h
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _SPL_RKFW_H_
+#define _SPL_RKFW_H_
+
+#include <spl.h>
+
+#define LOADER_HARD_STR			"LOADER"
+#define TBOOT_HEAD_TAG			0x58334c42 /* 'B', 'L', '3', 'X' */
+
+#define BL30_IMAGE_NAME			"bl30.bin" /* SCP Firmware BL3-0 */
+#define BL31_IMAGE_NAME			"bl31.bin" /* EL3 Runtime Firmware BL31 */
+#define BL32_IMAGE_NAME			"bl32.bin" /* Secure Payload BL32 (Trusted OS) */
+
+#define UUID_SCP_FIRMWARE_BL30		0x30334c42 /* "BL30" */
+#define UUID_EL3_RUNTIME_FIRMWARE_BL31	0x31334c42 /* "BL31" */
+#define UUID_SECURE_PAYLOAD_BL32	0x32334c42 /* "BL32" */
+
+/* Signature size, unit is byte */
+#define SIGNATURE_SIZE			256
+#define MAX_BL_CODE_NUM			6
+#define LOADER_MAGIC_SIZE		8
+#define LOADER_HASH_SIZE		32
+
+/* Special value used to verify platform parameters from BL2 to BL3-1 */
+#define RK_BL31_PLAT_PARAM_VAL		0x0f1e2d3c4b5a6978ULL
+
+#define RKFW_RETRY_SECTOR_SIZE		1024
+#define RKFW_RETRY_SECTOR_TIMES		8
+
+struct s_fip_name_id {
+	const char *name;
+	const u32 id;
+};
+
+typedef struct tag_tboot_header_2k {
+	u32 tag;
+	u32 version;
+	u32 flags;
+	u32 size;
+	u32 reserved1[4];
+	u32 rsa_n[64];
+	u32 rsa_e[64];
+	u32 rsa_c[64];
+	u32 reserved2[312];
+} tboot_header_2k, *ptboot_header_2k;
+
+typedef struct tag_tboot_header {
+	u32 tag;
+	u32 version;
+	u32 flags;
+	u32 size;
+	u32 reserved[4];
+	u32 rsa_n[64];
+	u32 rsa_e[64];
+	u32 rsa_c[64];
+} tboot_header, *ptboot_header;
+
+typedef struct tag_boot_component {
+	u32 component_id;
+	u32 storage_addr;
+	u32 image_size;
+	u32 reserved;
+} boot_component, *pboot_component;
+
+typedef struct tag_component_data {
+	u32 hash_data[8];
+	u32 load_addr;
+	u32 reserved[3];
+} component_data, *pcomponent_data;
+
+typedef struct tag_tboot_entry {
+	boot_component component;
+	component_data compdata;
+} tboot_entry, *ptboot_entry;
+
+typedef struct tag_second_loader_hdr {
+	unsigned char magic[LOADER_MAGIC_SIZE];
+	unsigned int version;
+	unsigned int reserved0;
+	unsigned int loader_load_addr;		/* physical load addr ,default is 0x60000000 */
+	unsigned int loader_load_size;		/* size in bytes */
+	unsigned int crc32;			/* crc32 */
+	unsigned int hash_len;			/* 20 or 32 , 0 is no hash */
+	unsigned char hash[LOADER_HASH_SIZE];	/* sha */
+	unsigned int js_hash;			/* js hsah */
+	unsigned char reserved[1024-32-32-4];
+	unsigned int sign_tag;			/* 0x4E474953, 'N' 'G' 'I' 'S' */
+	unsigned int sign_len;			/* 256 */
+	unsigned char rsa_hash[256];
+	unsigned char reserved2[2048-1024-256-8];
+} second_loader_hdr;				/* Size:2K */
+
+/**
+ * spl_load_rkfw_image - Load rockchip image(trust and U-Boot) and jump to bl31.
+ */
+int spl_load_rkfw_image(struct spl_image_info *spl_image,
+			struct spl_load_info *info,
+			u32 trust_sector, u32 uboot_sector);
+#endif

commit dfcfb4f4f7099135e114609e25374ea72c48f643
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 14 09:17:11 2019 +0800

    common: spl: printf message when jump to ATF
    
    Change-Id: Ibd970ffc3078c3bbe93cbd65698052cd913a31f6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 9e2fe27f1d..84b4e9be00 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -485,7 +485,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		break;
 #if CONFIG_IS_ENABLED(ATF)
 	case IH_OS_ARM_TRUSTED_FIRMWARE:
-		debug("Jumping to U-Boot via ARM Trusted Firmware\n");
+		printf("Jumping to U-Boot via ARM Trusted Firmware\n\n");
 		spl_invoke_atf(&spl_image);
 		break;
 #endif

commit 1620aad4c92296bfc154d88b46118eb71f193404
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 12 18:02:04 2019 +0800

    common: spl: atf: add bl32/bl33 entry point to struct spl_image_info
    
    This allows other booting device to initial other firmware entry
    point, but not only FIT.
    
    Change-Id: I73b08d594079ce0842b68f1c9d222f58e171b555
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 982d7fe35c..9e2fe27f1d 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -455,6 +455,16 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #endif
 
 	memset(&spl_image, '\0', sizeof(spl_image));
+
+#if CONFIG_IS_ENABLED(ATF)
+	/*
+	 * Bl32 ep is optional, initial it as an invalid value.
+	 * BL33 ep is mandatory, but initial it as a default value is better.
+	 */
+	spl_image.entry_point_bl32 = -1;
+	spl_image.entry_point_bl33 = CONFIG_SYS_TEXT_BASE;
+#endif
+
 #ifdef CONFIG_SYS_SPL_ARGS_ADDR
 	spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
 #endif
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 45f3de2a8f..a98a4e99a9 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -152,15 +152,22 @@ uintptr_t spl_fit_images_get_entry(void *blob, int node)
 
 void spl_invoke_atf(struct spl_image_info *spl_image)
 {
-	uintptr_t  bl32_entry = -1;
-	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
+	uintptr_t bl32_entry, bl33_entry;
 	void *blob = spl_image->fdt_addr;
 	uintptr_t platform_param = (uintptr_t)blob;
 	int node;
 
+	/*
+	 * Find the OP-TEE binary (in /fit-images) load address or
+	 * entry point (if different) and pass it as the BL3-2 entry
+	 * point, this is optional.
+	 * This will need to be extended to support Falcon mode.
+	 */
 	node = spl_fit_images_find(blob, IH_OS_OP_TEE);
 	if (node >= 0)
 		bl32_entry = spl_fit_images_get_entry(blob, node);
+	else
+		bl32_entry = spl_image->entry_point_bl32; /* optional */
 
 	/*
 	 * Find the U-Boot binary (in /fit-images) load addreess or
@@ -168,10 +175,11 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	 * point.
 	 * This will need to be extended to support Falcon mode.
 	 */
-
 	node = spl_fit_images_find(blob, IH_OS_U_BOOT);
 	if (node >= 0)
 		bl33_entry = spl_fit_images_get_entry(blob, node);
+	else
+		bl33_entry = spl_image->entry_point_bl33;
 
 	/*
 	 * If ATF_NO_PLATFORM_PARAM is set, we override the platform
diff --git a/include/spl.h b/include/spl.h
index f714e051fe..9135e320e7 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -24,7 +24,11 @@ struct spl_image_info {
 	const char *name;
 	u8 os;
 	uintptr_t load_addr;
-	uintptr_t entry_point;
+	uintptr_t entry_point;		/* Next stage entry point */
+#if CONFIG_IS_ENABLED(ATF)
+	uintptr_t entry_point_bl32;
+	uintptr_t entry_point_bl33;
+#endif
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	void *fdt_addr;
 #endif

commit 64d1b263e75127d1783f99b1fbfee8b755559817
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 11 20:05:18 2019 +0800

    common: spl: atf: export bl31_entry()
    
    Change-Id: I7c628ba567ca554caa5902e6aa6592282ccf167d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index e1e7f43f9f..45f3de2a8f 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -95,8 +95,8 @@ static inline void raw_write_daif(unsigned int daif)
 
 typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
 
-static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
-		       uintptr_t bl33_entry, uintptr_t fdt_addr)
+void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
+		uintptr_t bl33_entry, uintptr_t fdt_addr)
 {
 	struct bl31_params *bl31_params;
 	atf_entry_t  atf_entry = (atf_entry_t)bl31_entry;
diff --git a/include/spl.h b/include/spl.h
index 1475bb0e8c..f714e051fe 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -276,6 +276,12 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
  */
 void spl_invoke_atf(struct spl_image_info *spl_image);
 
+/**
+ * bl31_entry - Fill bl31_params structure, and jump to bl31
+ */
+void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
+		uintptr_t bl33_entry, uintptr_t fdt_addr);
+
 /**
  * spl_optee_entry - entry function for optee
  *
@@ -298,4 +304,5 @@ void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
  * can implement 'board_return_to_bootrom'.
  */
 void board_return_to_bootrom(void);
+
 #endif

commit c8d12fd617760dfd2ef6e820bf768c2ae2fcf29c
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed May 29 11:55:36 2019 +0800

    drivers: rknand: zftl fix cache flush misaligned range
    
    bug:
    CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
    CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
    CACHE: Misaligned operation at range [71e1eb80, 71e1eba0]
    
    Change-Id: Id77a8f8df8e014e8de5dc0845ee0e3dd5d945f97
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
index c934ade82e..acf4621f3e 100644
--- a/drivers/rknand/rk_zftl_arm_v7.S
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-05-22
+ * date: 2019-06-03
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -1398,7 +1398,7 @@ flash_wait_device_ready_raw:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L276
-	movw	r2, #677
+	movw	r2, #678
 	ldr	r1, .L281+4
 	ldr	r0, .L281+8
 	bl	printf
@@ -1745,7 +1745,7 @@ flash_start_page_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r4
 	bhi	.L354
-	movw	r2, #845
+	movw	r2, #846
 	ldr	r1, .L361+4
 	ldr	r0, .L361+8
 	bl	printf
@@ -2058,7 +2058,7 @@ flash_erase_duplane_block:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L390
-	mov	r2, #588
+	movw	r2, #589
 	ldr	r1, .L403+4
 	ldr	r0, .L403+8
 	bl	printf
@@ -2171,7 +2171,7 @@ flash_erase_block_en:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L406
-	movw	r2, #633
+	movw	r2, #634
 	ldr	r1, .L417+4
 	ldr	r0, .L417+8
 	bl	printf
@@ -2337,7 +2337,7 @@ flash_start_plane_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r4
 	bhi	.L428
-	mov	r2, #940
+	movw	r2, #941
 	ldr	r1, .L446+4
 	ldr	r0, .L446+8
 	bl	printf
@@ -3052,9 +3052,9 @@ nandc_xfer_start:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
+	mov	r6, r0
 	ldr	r0, .L563
-	adds	r6, r1, #1
+	adds	r7, r1, #1
 	ldr	r5, .L563+4
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldr	r10, .L563+24
@@ -3062,8 +3062,8 @@ nandc_xfer_start:
 	bne	.L548
 	movs	r4, #0
 	movs	r1, #1
-	bfi	r4, r7, #1, #1
-	asrs	r6, r6, r1
+	bfi	r4, r6, #1, #1
+	asrs	r7, r7, r1
 	orr	r4, r4, #8
 	bfi	r4, r1, #5, #2
 	ldr	r1, .L563+8
@@ -3071,7 +3071,7 @@ nandc_xfer_start:
 	orr	r4, r4, #1024
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	bfc	r4, #4, #1
-	bfi	r4, r6, #22, #6
+	bfi	r4, r7, #22, #6
 	orr	r4, r4, #128
 	cbz	r1, .L549
 	ldr	r1, .L563+12
@@ -3080,22 +3080,22 @@ nandc_xfer_start:
 	orr	r4, r4, #512
 .L549:
 	add	r1, r2, #63
-	and	r6, r6, #63
+	and	r7, r7, #63
 	bic	r1, r1, #63
 	bic	r0, r2, #63
-	add	r1, r1, r6, lsl #10
+	add	r1, r1, r7, lsl #10
 	str	r2, [r5, #4]
 	str	r3, [r5, #8]
-	clz	r7, r7
+	clz	r6, r6
 	str	r2, [r5, #12]
-	lsrs	r7, r7, #5
+	lsrs	r6, r6, #5
 	str	r3, [r5, #16]
 	bl	flush_dcache_range
 	ldr	r0, [r5, #8]
 	add	r1, r0, #63
 	bic	r0, r0, #63
 	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #2
+	adds	r1, r1, #64
 	bl	flush_dcache_range
 	movs	r3, #1
 	ldr	r2, [r10]
@@ -3112,7 +3112,7 @@ nandc_xfer_start:
 	bfi	r3, r1, #3, #3
 	ldr	r1, .L563+16
 	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
+	bfi	r3, r6, #1, #1
 	ldrh	r1, [r1]
 	orr	r3, r3, #1
 	bfi	r3, r1, #16, #11
@@ -3127,22 +3127,22 @@ nandc_xfer_start:
 .L548:
 	ldr	r0, [r10]
 	movs	r4, #0
-	bfi	r4, r7, #1, #1
+	bfi	r4, r6, #1, #1
 	orr	r4, r4, #8
 	ldr	r8, [r0, #12]
 	movs	r0, #16
 	bfi	r8, r0, #8, #8
 	movs	r0, #1
 	bfi	r4, r0, #5, #2
-	asrs	r6, r6, r0
+	asrs	r7, r7, r0
 	orr	r4, r4, #536870912
 	orr	r4, r4, #1024
 	bfc	r8, #3, #1
 	bfc	r4, #4, #1
 	bfc	r8, #5, #3
-	str	r6, [sp]
-	bfi	r4, r6, #22, #6
-	cmp	r7, #0
+	str	r7, [sp]
+	bfi	r4, r7, #22, #6
+	cmp	r6, #0
 	beq	.L551
 	ldr	r0, .L563+20
 	lsrs	r1, r1, #1
@@ -3158,11 +3158,11 @@ nandc_xfer_start:
 	str	r0, [sp, #4]
 	mov	r0, r1
 .L553:
-	ldr	r6, [sp, #4]
+	ldr	r7, [sp, #4]
 	add	fp, r3, r0, lsl #2
-	add	lr, r6, r1
-	ldr	r6, [sp, #8]
-	cmp	r0, r6
+	add	lr, r7, r1
+	ldr	r7, [sp, #8]
+	cmp	r0, r7
 	blt	.L554
 .L555:
 	ldr	r3, [r5]
@@ -3170,20 +3170,20 @@ nandc_xfer_start:
 	bic	r1, r1, #63
 	bic	r0, r2, #63
 	str	r2, [r5, #4]
-	clz	r7, r7
+	clz	r6, r6
 	str	r3, [r5, #8]
-	lsrs	r7, r7, #5
+	lsrs	r6, r6, #5
 	str	r3, [r5, #16]
 	ldr	r3, [sp]
 	str	r2, [r5, #12]
-	and	r6, r3, #63
-	add	r1, r1, r6, lsl #10
+	and	r7, r3, #63
+	add	r1, r1, r7, lsl #10
 	bl	flush_dcache_range
 	ldr	r0, [r5, #8]
 	add	r1, r0, #63
 	bic	r0, r0, #63
 	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #7
+	add	r1, r1, r7, lsl #7
 	bl	flush_dcache_range
 	movs	r3, #1
 	ldr	r2, [r10]
@@ -3199,7 +3199,7 @@ nandc_xfer_start:
 	orr	r3, r3, #448
 	bfi	r3, r1, #3, #3
 	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
+	bfi	r3, r6, #1, #1
 	orr	r3, r3, #1
 	str	r3, [r2, #16]
 	str	r8, [r2, #12]
@@ -3212,9 +3212,9 @@ nandc_xfer_start:
 	bic	r1, r1, #3
 	ldrh	fp, [fp, #2]
 	adds	r0, r0, #1
-	ldr	r6, [sp, #12]
+	ldr	r7, [sp, #12]
 	orr	ip, ip, fp, lsl #16
-	str	ip, [r6, r1]
+	str	ip, [r7, r1]
 	mov	r1, lr
 	b	.L553
 .L551:
@@ -3957,7 +3957,7 @@ gc_add_sblk:
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	bhi	.L680
-	movw	r2, #339
+	mov	r2, #338
 	ldr	r1, .L712+4
 	ldr	r0, .L712+8
 	bl	printf
@@ -3995,7 +3995,7 @@ gc_add_sblk:
 	bne	.L682
 	cmp	r7, #0
 	beq	.L702
-	mov	r2, #344
+	movw	r2, #343
 	ldr	r1, .L712+4
 	ldr	r0, .L712+8
 	bl	printf
@@ -4257,7 +4257,7 @@ gc_write_completed:
 	ldr	r0, .L752+12
 	str	r2, [r3, #320]
 	bl	printf
-	movw	r2, #673
+	mov	r2, #672
 	ldr	r1, .L752+16
 	ldr	r0, .L752+20
 	bl	printf
@@ -4295,7 +4295,7 @@ gc_write_completed:
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	cmp	r2, r3
 	beq	.L729
-	movw	r2, #682
+	movw	r2, #681
 	ldr	r1, .L752+16
 	ldr	r0, .L752+20
 	bl	printf
@@ -7271,7 +7271,7 @@ gc_free_src_blk:
 	tst	r3, #192
 	bne	.L1182
 .L1181:
-	mov	r2, #932
+	movw	r2, #931
 	ldr	r1, .L1214+24
 	ldr	r0, .L1214+28
 	bl	printf
@@ -10336,10 +10336,10 @@ buf_init:
 	movs	r5, #0
 	ldr	r4, .L1655
 	mov	r6, r5
-	ldr	r7, .L1655+4
-	mov	r8, r4
+	ldr	r8, .L1655+12
+	mov	r7, r4
 .L1653:
-	ldrb	r0, [r7]	@ zero_extendqisi2
+	ldrb	r0, [r8]	@ zero_extendqisi2
 	uxtb	r3, r5
 	strb	r6, [r4, #2]
 	adds	r5, r5, #1
@@ -10351,26 +10351,25 @@ buf_init:
 	lsls	r0, r0, #9
 	bl	ftl_malloc
 	str	r0, [r4, #-44]
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	lsls	r0, r0, #1
+	movs	r0, #64
 	bl	ftl_malloc
 	cmp	r5, #32
 	str	r0, [r4, #-36]
 	bne	.L1653
 	movs	r3, #255
-	strb	r3, [r8, #1488]
-	ldr	r3, .L1655+8
+	strb	r3, [r7, #1488]
+	ldr	r3, .L1655+4
 	strb	r6, [r3]
-	ldr	r3, .L1655+12
+	ldr	r3, .L1655+8
 	strb	r5, [r3]
 	pop	{r4, r5, r6, r7, r8, pc}
 .L1656:
 	.align	2
 .L1655:
 	.word	.LANCHOR50
-	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LANCHOR52
+	.word	.LANCHOR123
 	.size	buf_init, .-buf_init
 	.section	.text.gc_init,"ax",%progbits
 	.align	1
@@ -12679,7 +12678,7 @@ flash_read_page_en:
 	mov	fp, r3
 	cmp	r2, r0
 	bhi	.L2035
-	mov	r2, #398
+	movw	r2, #399
 	ldr	r1, .L2061+4
 	ldr	r0, .L2061+8
 	bl	printf
@@ -13010,7 +13009,7 @@ flash_complete_plane_page_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r4
 	bhi	.L2087
-	movw	r2, #886
+	movw	r2, #887
 	ldr	r1, .L2100+4
 	ldr	r0, .L2100+8
 	bl	printf
@@ -13127,7 +13126,7 @@ flash_complete_page_read:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r6
 	bhi	.L2103
-	mov	r2, #1008
+	movw	r2, #1009
 	ldr	r1, .L2132+4
 	ldr	r0, .L2132+8
 	bl	printf
@@ -15055,7 +15054,7 @@ flash_start_tlc_page_prog:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, fp
 	bhi	.L2449
-	movw	r2, #726
+	movw	r2, #727
 	ldr	r1, .L2454+4
 	ldr	r0, .L2454+8
 	bl	printf
@@ -15428,7 +15427,7 @@ flash_start_3d_mlc_page_prog:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r1
 	bhi	.L2473
-	mov	r2, #756
+	movw	r2, #757
 	ldr	r1, .L2474+4
 	ldr	r0, .L2474+8
 	bl	printf
@@ -15614,7 +15613,7 @@ flash_start_page_prog:
 	str	r3, [sp]
 	cmp	r1, r7
 	bhi	.L2485
-	movw	r2, #803
+	mov	r2, #804
 	ldr	r1, .L2493+4
 	ldr	r0, .L2493+8
 	bl	printf
@@ -15950,7 +15949,7 @@ flash_prog_page_en:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L2542
-	movw	r2, #546
+	movw	r2, #547
 	ldr	r1, .L2574+4
 	ldr	r0, .L2574+8
 	bl	printf
@@ -16057,7 +16056,7 @@ flash_prog_page_en:
 	mov	r1, r4
 	ldr	r0, .L2574+56
 	bl	printf
-	movw	r2, #577
+	movw	r2, #578
 	ldr	r1, .L2574+4
 	ldr	r0, .L2574+8
 	bl	printf
@@ -18829,7 +18828,7 @@ nand_flash_init:
 	lsls	r7, r3, #19
 	bpl	.L2974
 	ldr	r2, .L3055+4
-	movw	r1, #2490
+	movw	r1, #2491
 	ldr	r0, .L3055+8
 	bl	printf
 .L2974:
@@ -18950,7 +18949,7 @@ nand_flash_init:
 	lsls	r5, r3, #19
 	bpl	.L2988
 	ldr	r2, .L3055+4
-	movw	r1, #2515
+	movw	r1, #2516
 	ldr	r0, .L3055+8
 	bl	printf
 .L2988:
@@ -19056,7 +19055,7 @@ nand_flash_init:
 	lsls	r0, r3, #19
 	bpl	.L3004
 	ldr	r2, .L3055+4
-	movw	r1, #2573
+	movw	r1, #2574
 	ldr	r0, .L3055+8
 	bl	printf
 .L3004:
@@ -19082,7 +19081,7 @@ nand_flash_init:
 	lsls	r1, r3, #19
 	bpl	.L3008
 	ldr	r2, .L3055+4
-	movw	r1, #2605
+	movw	r1, #2606
 	ldr	r0, .L3055+8
 	bl	printf
 .L3008:
@@ -19095,7 +19094,7 @@ nand_flash_init:
 .L2981:
 	adds	r5, r5, #1
 	adds	r7, r7, #32
-	cmp	r5, #38
+	cmp	r5, #39
 	bne	.L2983
 	b	.L2978
 .L2994:
@@ -19225,7 +19224,7 @@ nand_flash_init:
 	lsls	r3, r3, #19
 	bpl	.L3013
 	ldr	r2, .L3057+12
-	movw	r1, #2671
+	mov	r1, #2672
 	ldr	r0, .L3057+16
 	bl	printf
 .L3013:
@@ -20166,25 +20165,23 @@ gc_recovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L3216
+	ldr	r7, .L3216
 	sub	sp, sp, #64
-	ldr	r7, .L3216+4
-	strb	r4, [r3]
-	ldr	r3, .L3216+8
+	ldr	r3, .L3216+4
 	ldr	r5, [r7]
 	strb	r4, [r3]
-	bl	gc_init
+	ldr	r3, .L3216+8
 	ldrh	r6, [r5, #80]
+	strb	r4, [r3]
 	movw	r3, #65535
 	cmp	r6, r3
 	beq	.L3161
-	ldr	r2, [r7]
+	strh	r3, [r5, #130]	@ movhi
 	movs	r0, #1
-	ldr	r6, .L3216+12
-	strh	r3, [r2, #130]	@ movhi
 	bl	buf_alloc
 	ldrb	r3, [r5, #89]	@ zero_extendqisi2
 	mov	r4, r0
+	ldr	r6, .L3216+12
 	add	r3, r5, r3, lsl #1
 	ldrh	r2, [r3, #94]
 	ldr	r3, .L3216+16
@@ -20259,7 +20256,7 @@ gc_recovery:
 	strh	r4, [r5, #80]	@ movhi
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r3, .L3216+4
+	ldr	r3, .L3216
 	ldr	r2, [r3]
 	ldrh	r0, [r2, #130]
 	cmp	r0, r4
@@ -20385,7 +20382,7 @@ gc_recovery:
 	ldrh	r2, [r5, #80]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L3216+4
+	ldr	r3, .L3216
 	ldr	r3, [r3]
 	b	.L3215
 .L3170:
@@ -20445,8 +20442,8 @@ gc_recovery:
 .L3217:
 	.align	2
 .L3216:
-	.word	.LANCHOR76
 	.word	.LANCHOR10
+	.word	.LANCHOR76
 	.word	.LANCHOR150
 	.word	.LANCHOR71
 	.word	.LANCHOR103
@@ -20576,8 +20573,7 @@ gc_recovery:
 	bl	zftl_insert_data_list
 	b	.L3166
 .L3161:
-	ldr	r3, [r7]
-	ldrh	r3, [r3, #130]
+	ldrh	r3, [r5, #130]
 	cmp	r3, r6
 	beq	.L3160
 	ldr	r5, .L3218+32
@@ -21157,7 +21153,7 @@ gc_update_l2p_map_new:
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r6, r3
 	beq	.L3307
-	movw	r2, #617
+	mov	r2, #616
 	ldr	r1, .L3328+24
 	ldr	r0, .L3328+28
 	bl	printf
@@ -21462,7 +21458,7 @@ gc_scan_src_blk:
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	bne	.L3359
-	movw	r2, #1052
+	movw	r2, #1051
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21527,7 +21523,7 @@ gc_scan_src_blk:
 	ldr	r1, [r5]
 	ldrh	r3, [r1, r3, lsl #1]
 	cbz	r3, .L3366
-	mov	r2, #1072
+	movw	r2, #1071
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21543,7 +21539,7 @@ gc_scan_src_blk:
 	ldrh	r6, [r0, #34]
 	cmp	r6, r3
 	bne	.L3367
-	mov	r2, #1080
+	movw	r2, #1079
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21617,7 +21613,7 @@ gc_scan_src_blk:
 	ldr	r3, .L3399+52
 	cmp	r2, r3
 	beq	.L3372
-	movw	r2, #1113
+	mov	r2, #1112
 	ldr	r1, .L3399+4
 	ldr	r0, .L3399+8
 	bl	printf
@@ -21779,7 +21775,7 @@ gc_scan_static_data:
 	ldr	r3, [r3, #544]
 	cmp	r2, r3
 	beq	.L3405
-	mov	r2, #1552
+	movw	r2, #1551
 	mov	r1, r6
 	mov	r0, r7
 	bl	printf
@@ -22649,7 +22645,7 @@ gc_check_data_one_wl:
 .L3517:
 	ldr	r5, [r4, #8]
 	cbnz	r5, .L3518
-	movw	r2, #495
+	mov	r2, #494
 	ldr	r1, .L3541+8
 	ldr	r0, .L3541+12
 	bl	printf
@@ -23469,7 +23465,7 @@ gc_do_copy_back:
 	cmp	r3, #512
 	bne	.L3649
 .L3648:
-	mov	r2, #732
+	movw	r2, #731
 	ldr	r1, .L3742+8
 	ldr	r0, .L3742+12
 	bl	printf
@@ -23991,7 +23987,7 @@ gc_do_copy_back:
 	cmp	r3, #512
 	bne	.L3674
 .L3673:
-	movw	r2, #847
+	movw	r2, #846
 	ldr	r1, .L3744+72
 	ldr	r0, .L3744+76
 	bl	printf
@@ -24300,7 +24296,7 @@ zftl_do_gc:
 	str	r1, [sp, #12]
 	ldrh	r1, [r3, #120]
 	str	r1, [sp, #8]
-	movw	r1, #1983
+	movw	r1, #1982
 	ldrh	r3, [r3, #124]
 	str	r7, [sp]
 	str	r3, [sp, #4]
@@ -24336,7 +24332,7 @@ zftl_do_gc:
 	tst	r2, #256
 	beq	.L3769
 	ldr	r3, .L3924+72
-	movw	r1, #1995
+	movw	r1, #1994
 	ldr	r0, .L3924+68
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, [sp, #32]
@@ -24389,7 +24385,7 @@ zftl_do_gc:
 	lsls	r4, r3, #23
 	bpl	.L3748
 	ldrh	r3, [r0, #122]
-	movw	r1, #2085
+	movw	r1, #2084
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #120]
 	stm	sp, {r7, fp}
@@ -24612,7 +24608,7 @@ zftl_do_gc:
 	bpl	.L3792
 	ldrh	r3, [r0, #122]
 	mov	r2, r7
-	movw	r1, #2115
+	movw	r1, #2114
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #120]
 	str	r7, [sp, #4]
@@ -24850,7 +24846,7 @@ zftl_do_gc:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r1, lsl #1]
 	cbz	r3, .L3816
-	movw	r2, #2348
+	movw	r2, #2347
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -24895,7 +24891,7 @@ zftl_do_gc:
 	ldr	r1, [r4]
 	ldrh	r2, [r1, r2, lsl #1]
 	cbz	r2, .L3819
-	movw	r2, #2376
+	movw	r2, #2375
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -24958,7 +24954,7 @@ zftl_do_gc:
 	ldrh	r3, [r5, #20]
 	cmp	r2, r3
 	beq	.L3825
-	movw	r2, #2410
+	movw	r2, #2409
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -24990,7 +24986,7 @@ zftl_do_gc:
 	tst	r3, #192
 	bne	.L3828
 .L3827:
-	movw	r2, #2420
+	movw	r2, #2419
 	ldr	r1, .L3928+28
 	ldr	r0, .L3928+32
 	bl	printf
@@ -25055,7 +25051,7 @@ zftl_do_gc:
 	ldrb	r3, [r7, #2]	@ zero_extendqisi2
 	tst	r3, #224
 	beq	.L3834
-	movw	r2, #2449
+	mov	r2, #2448
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	bl	printf
@@ -25166,7 +25162,7 @@ zftl_do_gc:
 	ldr	r2, [r4]
 	ldrh	r2, [r2, r1, lsl #1]
 	cbz	r2, .L3841
-	movw	r2, #2524
+	movw	r2, #2523
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	bl	printf
@@ -25213,7 +25209,7 @@ zftl_do_gc:
 	movs	r5, #0
 	str	r5, [r6, #8]
 	bl	flt_sys_flush
-	movw	r2, #2562
+	movw	r2, #2561
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	strb	r5, [r4]
@@ -25320,7 +25316,7 @@ zftl_do_gc:
 	movs	r3, #0
 	b	.L3922
 .L3833:
-	movw	r2, #2455
+	movw	r2, #2454
 	ldr	r1, .L3930+12
 	ldr	r0, .L3930+16
 	bl	printf
@@ -27970,7 +27966,7 @@ zftl_debug:
 	.align	1
 	.set	.LANCHOR198,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1216
+	.size	zftl_nand_flash_para_tbl, 1248
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -28784,6 +28780,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.short	512
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -29036,389 +29060,389 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10115,"a",%progbits
+	.section	.rodata.__func__.10151,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.10115, %object
-	.size	__func__.10115, 20
-__func__.10115:
+	.type	__func__.10151, %object
+	.size	__func__.10151, 20
+__func__.10151:
 	.ascii	"flash_die_info_init\000"
-	.section	.rodata.__func__.10125,"a",%progbits
+	.section	.rodata.__func__.10161,"a",%progbits
 	.set	.LANCHOR15,. + 0
-	.type	__func__.10125, %object
-	.size	__func__.10125, 22
-__func__.10125:
+	.type	__func__.10161, %object
+	.size	__func__.10161, 22
+__func__.10161:
 	.ascii	"nand_flash_print_info\000"
-	.section	.rodata.__func__.10170,"a",%progbits
+	.section	.rodata.__func__.10206,"a",%progbits
 	.set	.LANCHOR197,. + 0
-	.type	__func__.10170, %object
-	.size	__func__.10170, 16
-__func__.10170:
+	.type	__func__.10206, %object
+	.size	__func__.10206, 16
+__func__.10206:
 	.ascii	"nand_flash_init\000"
-	.section	.rodata.__func__.10193,"a",%progbits
+	.section	.rodata.__func__.10229,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.10193, %object
-	.size	__func__.10193, 11
-__func__.10193:
+	.type	__func__.10229, %object
+	.size	__func__.10229, 11
+__func__.10229:
 	.ascii	"nandc_init\000"
-	.section	.rodata.__func__.10362,"a",%progbits
+	.section	.rodata.__func__.10398,"a",%progbits
 	.set	.LANCHOR53,. + 0
-	.type	__func__.10362, %object
-	.size	__func__.10362, 13
-__func__.10362:
+	.type	__func__.10398, %object
+	.size	__func__.10398, 13
+__func__.10398:
 	.ascii	"buf_add_tail\000"
-	.section	.rodata.__func__.10375,"a",%progbits
+	.section	.rodata.__func__.10411,"a",%progbits
 	.set	.LANCHOR55,. + 0
-	.type	__func__.10375, %object
-	.size	__func__.10375, 10
-__func__.10375:
+	.type	__func__.10411, %object
+	.size	__func__.10411, 10
+__func__.10411:
 	.ascii	"buf_alloc\000"
-	.section	.rodata.__func__.10389,"a",%progbits
+	.section	.rodata.__func__.10425,"a",%progbits
 	.set	.LANCHOR56,. + 0
-	.type	__func__.10389, %object
-	.size	__func__.10389, 16
-__func__.10389:
+	.type	__func__.10425, %object
+	.size	__func__.10425, 16
+__func__.10425:
 	.ascii	"buf_remove_free\000"
-	.section	.rodata.__func__.10402,"a",%progbits
+	.section	.rodata.__func__.10438,"a",%progbits
 	.set	.LANCHOR196,. + 0
-	.type	__func__.10402, %object
-	.size	__func__.10402, 20
-__func__.10402:
+	.type	__func__.10438, %object
+	.size	__func__.10438, 20
+__func__.10438:
 	.ascii	"flash_info_blk_init\000"
-	.section	.rodata.__func__.10413,"a",%progbits
+	.section	.rodata.__func__.10449,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.10413, %object
-	.size	__func__.10413, 21
-__func__.10413:
+	.type	__func__.10449, %object
+	.size	__func__.10449, 21
+__func__.10449:
 	.ascii	"flash_info_data_init\000"
-	.section	.rodata.__func__.10435,"a",%progbits
+	.section	.rodata.__func__.10471,"a",%progbits
 	.set	.LANCHOR193,. + 0
-	.type	__func__.10435, %object
-	.size	__func__.10435, 17
-__func__.10435:
+	.type	__func__.10471, %object
+	.size	__func__.10471, 17
+__func__.10471:
 	.ascii	"flash_info_flush\000"
-	.section	.rodata.__func__.10511,"a",%progbits
+	.section	.rodata.__func__.10547,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.10511, %object
-	.size	__func__.10511, 17
-__func__.10511:
+	.type	__func__.10547, %object
+	.size	__func__.10547, 17
+__func__.10547:
 	.ascii	"lpa_rebuild_hash\000"
-	.section	.rodata.__func__.10558,"a",%progbits
+	.section	.rodata.__func__.10594,"a",%progbits
 	.set	.LANCHOR216,. + 0
-	.type	__func__.10558, %object
-	.size	__func__.10558, 17
-__func__.10558:
+	.type	__func__.10594, %object
+	.size	__func__.10594, 17
+__func__.10594:
 	.ascii	"ftl_write_commit\000"
-	.section	.rodata.__func__.10576,"a",%progbits
+	.section	.rodata.__func__.10612,"a",%progbits
 	.set	.LANCHOR122,. + 0
-	.type	__func__.10576, %object
-	.size	__func__.10576, 14
-__func__.10576:
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 	.ascii	"gc_free_src_blk\000"
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 	.ascii	"ftl_alloc_sblk\000"
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 	.ascii	"ftl_free_sys_blk\000"
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 	.ascii	"ftl_sblk_dump\000"
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 	.ascii	"ftl_get_ppa_from_index\000"
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 	.ascii	"ftl_update_l2p_map\000"
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 	.ascii	"ftl_get_new_free_page\000"
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 	.ascii	"ftl_ext_info_flush\000"
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 	.ascii	"ftl_ext_info_init\000"
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 	.ascii	"ftl_low_format_data_init\000"
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 	.ascii	"sblk_prog_page\000"
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 	.ascii	"load_l2p_region\000"
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 	.ascii	"pm_free_sblk\000"
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 	.ascii	"pm_alloc_new_blk\000"
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 	.ascii	"pm_write_page\000"
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 	.ascii	"pm_select_ram_region\000"
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 	.ascii	"flash_read_page_en\000"
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 	.ascii	"flash_prog_page_en\000"
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 	.ascii	"flash_erase_duplane_block\000"
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 	.ascii	"flash_erase_block_en\000"
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 	.ascii	"flash_wait_device_ready_raw\000"
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 	.ascii	"flash_start_tlc_page_prog\000"
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 	.set	.LANCHOR171,. + 0
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+	.size	__func__.9752, 29
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 	.ascii	"flash_start_3d_mlc_page_prog\000"
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+	.size	__func__.9770, 22
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 	.ascii	"flash_start_page_prog\000"
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+	.size	__func__.9781, 22
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 	.ascii	"flash_start_page_read\000"
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 	.set	.LANCHOR165,. + 0
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+	.type	__func__.9794, %object
+	.size	__func__.9794, 31
+__func__.9794:
 	.ascii	"flash_complete_plane_page_read\000"
-	.section	.rodata.__func__.9770,"a",%progbits
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 	.set	.LANCHOR41,. + 0
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-__func__.9770:
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+	.size	__func__.9806, 23
+__func__.9806:
 	.ascii	"flash_start_plane_read\000"
-	.section	.rodata.__func__.9783,"a",%progbits
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 	.set	.LANCHOR166,. + 0
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-__func__.9783:
+	.type	__func__.9819, %object
+	.size	__func__.9819, 25
+__func__.9819:
 	.ascii	"flash_complete_page_read\000"
 	.section	.rodata._list_remove_node.str1.1,"aMS",%progbits,1
 .LC0:
@@ -30702,7 +30726,7 @@ toshiba_ref_value:
 	.ascii	"swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
 	.section	.rodata.zftl_init.str1.1,"aMS",%progbits,1
 .LC196:
-	.ascii	"FTL version: 6.0.16 20190427\000"
+	.ascii	"FTL version: 6.0.16 20190603\000"
 .LC197:
 	.ascii	"_c_user_data_density := %d\012\000"
 .LC198:
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 344fb75b7b..ad5090cdd5 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-04-27
+ * date: 2019-06-03
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -1152,7 +1152,7 @@ flash_wait_device_ready_raw:
 	bhi	.L256
 	adrp	x1, .LANCHOR29
 	adrp	x0, .LC0
-	mov	w2, 677
+	mov	w2, 678
 	add	x1, x1, :lo12:.LANCHOR29
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1438,7 +1438,7 @@ flash_start_page_read:
 	bhi	.L330
 	adrp	x1, .LANCHOR33
 	adrp	x0, .LC0
-	mov	w2, 845
+	mov	w2, 846
 	add	x1, x1, :lo12:.LANCHOR33
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1706,7 +1706,7 @@ flash_erase_duplane_block:
 	bhi	.L362
 	adrp	x1, .LANCHOR38
 	adrp	x0, .LC0
-	mov	w2, 588
+	mov	w2, 589
 	add	x1, x1, :lo12:.LANCHOR38
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1815,7 +1815,7 @@ flash_erase_block_en:
 	bhi	.L377
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 633
+	mov	w2, 634
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1966,7 +1966,7 @@ flash_start_plane_read:
 	bhi	.L397
 	adrp	x1, .LANCHOR41
 	adrp	x0, .LC0
-	mov	w2, 940
+	mov	w2, 941
 	add	x1, x1, :lo12:.LANCHOR41
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -2575,21 +2575,19 @@ nandc_xfer_start:
 	csel	w19, w0, w19, ne
 .L499:
 	add	x21, x4, :lo12:.LANCHOR47
-	add	x0, x2, 63
-	and	w20, w20, 63
-	and	x0, x0, -64
-	ubfiz	x1, x20, 10, 6
-	ubfiz	x20, x20, 2, 6
-	add	x1, x0, x1
-	stp	x2, x3, [x21, 8]
+	add	x1, x2, 63
+	and	x1, x1, -64
+	ubfiz	x20, x20, 10, 6
 	and	x0, x2, -64
+	add	x1, x1, x20
+	stp	x2, x3, [x21, 8]
 	stp	w2, w3, [x21, 24]
 	bl	flush_dcache_range
 	ldr	x0, [x21, 16]
 	add	x1, x0, 63
 	and	x0, x0, -64
 	and	x1, x1, -64
-	add	x1, x1, x20
+	add	x1, x1, 64
 	bl	flush_dcache_range
 	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
@@ -3250,7 +3248,7 @@ gc_add_sblk:
 	bhi	.L606
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 339
+	mov	w2, 338
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3287,7 +3285,7 @@ gc_add_sblk:
 	cbz	w21, .L628
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 344
+	mov	w2, 343
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3530,7 +3528,7 @@ gc_write_completed:
 	bl	printf
 	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 673
+	mov	w2, 672
 	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3569,7 +3567,7 @@ gc_write_completed:
 	beq	.L651
 	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 682
+	mov	w2, 681
 	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -6160,7 +6158,7 @@ gc_free_src_blk:
 .L1062:
 	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 932
+	mov	w2, 931
 	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -8884,8 +8882,7 @@ buf_init:
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, -56]
-	ldrb	w0, [x22]
-	lsl	w0, w0, 1
+	mov	w0, 64
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
@@ -11041,7 +11038,7 @@ flash_read_page_en:
 	bhi	.L1866
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 398
+	mov	w2, 399
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -11328,7 +11325,7 @@ flash_complete_plane_page_read:
 	bhi	.L1913
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	mov	w2, 886
+	mov	w2, 887
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -11439,7 +11436,7 @@ flash_complete_page_read:
 	bhi	.L1928
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
-	mov	w2, 1008
+	mov	w2, 1009
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -13253,7 +13250,7 @@ flash_start_tlc_page_prog:
 	bhi	.L2254
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 726
+	mov	w2, 727
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -13576,7 +13573,7 @@ flash_start_3d_mlc_page_prog:
 	bhi	.L2275
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 756
+	mov	w2, 757
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -13745,7 +13742,7 @@ flash_start_page_prog:
 	bhi	.L2284
 	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 803
+	mov	w2, 804
 	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -14055,7 +14052,7 @@ flash_prog_page_en:
 	bhi	.L2337
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 546
+	mov	w2, 547
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -14166,7 +14163,7 @@ flash_prog_page_en:
 	adrp	x0, .LC141
 	add	x0, x0, :lo12:.LC141
 	bl	printf
-	mov	w2, 577
+	mov	w2, 578
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR175
@@ -16749,7 +16746,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2490
+	mov	w1, 2491
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2740:
@@ -16887,7 +16884,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2515
+	mov	w1, 2516
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2753:
@@ -16992,7 +16989,7 @@ nand_flash_init:
 .L2747:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 38
+	cmp	x10, 39
 	bne	.L2749
 	b	.L2744
 .L2759:
@@ -17045,7 +17042,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2573
+	mov	w1, 2574
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2766:
@@ -17069,7 +17066,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2605
+	mov	w1, 2606
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2770:
@@ -17130,7 +17127,7 @@ nand_flash_init:
 	adrp	x2, .LANCHOR197
 	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2671
+	mov	w1, 2672
 	add	x0, x0, :lo12:.LC90
 	bl	printf
 .L2775:
@@ -17975,18 +17972,16 @@ gc_recovery:
 	adrp	x0, .LANCHOR150
 	stp	x23, x24, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR150]
-	stp	x25, x26, [sp, 96]
-	stp	x27, x28, [sp, 112]
-	bl	gc_init
 	add	x0, x20, 80
 	ldrh	w1, [x20, 80]
 	str	x0, [x29, 176]
 	mov	w0, 65535
+	stp	x25, x26, [sp, 96]
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	stp	x27, x28, [sp, 112]
 	beq	.L2901
-	mov	w1, -1
-	strh	w1, [x0, 130]
+	mov	w0, -1
+	strh	w0, [x20, 130]
 	mov	w0, 1
 	bl	buf_alloc
 	mov	x26, x0
@@ -18383,7 +18378,7 @@ gc_recovery:
 	bl	zftl_insert_data_list
 	b	.L2906
 .L2901:
-	ldrh	w0, [x0, 130]
+	ldrh	w0, [x20, 130]
 	cmp	w0, w1
 	beq	.L2900
 	adrp	x19, .LANCHOR102
@@ -18855,7 +18850,7 @@ gc_update_l2p_map_new:
 	beq	.L3035
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 617
+	mov	w2, 616
 	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19143,7 +19138,7 @@ gc_scan_src_blk:
 	bne	.L3081
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1052
+	mov	w2, 1051
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19214,7 +19209,7 @@ gc_scan_src_blk:
 	cbz	w1, .L3088
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1072
+	mov	w2, 1071
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19233,7 +19228,7 @@ gc_scan_src_blk:
 	bne	.L3089
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1080
+	mov	w2, 1079
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -19314,7 +19309,7 @@ gc_scan_src_blk:
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
 	beq	.L3093
-	mov	w2, 1113
+	mov	w2, 1112
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR210
@@ -19459,7 +19454,7 @@ gc_scan_static_data:
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
 	beq	.L3122
-	mov	w2, 1552
+	mov	w2, 1551
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
@@ -20250,7 +20245,7 @@ gc_check_data_one_wl:
 	cbnz	x22, .L3223
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
-	mov	w2, 495
+	mov	w2, 494
 	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -20997,7 +20992,7 @@ gc_do_copy_back:
 	bne	.L3347
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 732
+	mov	w2, 731
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -21448,7 +21443,7 @@ gc_do_copy_back:
 	bne	.L3369
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 847
+	mov	w2, 846
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -21747,7 +21742,7 @@ zftl_do_gc:
 	mov	w4, w22
 	ldrb	w2, [x25, #:lo12:.LANCHOR76]
 	mov	w3, w21
-	mov	w1, 1983
+	mov	w1, 1982
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
@@ -21790,7 +21785,7 @@ zftl_do_gc:
 	ldrh	w5, [x20, 124]
 	mov	w3, w21
 	ldrb	w2, [x0, #:lo12:.LANCHOR76]
-	mov	w1, 1995
+	mov	w1, 1994
 	str	w25, [sp]
 	adrp	x0, .LC236
 	add	x0, x0, :lo12:.LC236
@@ -21832,7 +21827,7 @@ zftl_do_gc:
 	mov	w3, w21
 	adrp	x0, .LC237
 	mov	w2, 0
-	mov	w1, 2085
+	mov	w1, 2084
 	add	x0, x0, :lo12:.LC237
 	bl	printf
 .L3436:
@@ -22025,7 +22020,7 @@ zftl_do_gc:
 	adrp	x0, .LC237
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 2115
+	mov	w1, 2114
 	add	x0, x0, :lo12:.LC237
 	bl	printf
 .L3480:
@@ -22253,7 +22248,7 @@ zftl_do_gc:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
 	cbz	w0, .L3504
-	mov	w2, 2348
+	mov	w2, 2347
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
@@ -22293,7 +22288,7 @@ zftl_do_gc:
 	cbz	w1, .L3507
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2376
+	mov	w2, 2375
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22360,7 +22355,7 @@ zftl_do_gc:
 	beq	.L3513
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2410
+	mov	w2, 2409
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22395,7 +22390,7 @@ zftl_do_gc:
 .L3515:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2420
+	mov	w2, 2419
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22448,7 +22443,7 @@ zftl_do_gc:
 	beq	.L3522
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2449
+	mov	w2, 2448
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22569,7 +22564,7 @@ zftl_do_gc:
 	cbz	w1, .L3529
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2524
+	mov	w2, 2523
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -22617,7 +22612,7 @@ zftl_do_gc:
 	add	x24, x24, :lo12:.LANCHOR63
 	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2562
+	mov	w2, 2561
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
@@ -22725,7 +22720,7 @@ zftl_do_gc:
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	b	.L3544
 .L3521:
-	mov	w2, 2455
+	mov	w2, 2454
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
@@ -25284,7 +25279,7 @@ zftl_debug:
 	.align	3
 	.set	.LANCHOR198,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1216
+	.size	zftl_nand_flash_para_tbl, 1248
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -26098,6 +26093,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	4
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -26350,453 +26373,453 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10034,"a",@progbits
+	.section	.rodata.__func__.10032,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10034, %object
-	.size	__func__.10034, 20
-__func__.10034:
+	.type	__func__.10032, %object
+	.size	__func__.10032, 20
+__func__.10032:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.10101,"a",@progbits
+	.section	.rodata.__func__.10099,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10101, %object
-	.size	__func__.10101, 11
-__func__.10101:
+	.type	__func__.10099, %object
+	.size	__func__.10099, 11
+__func__.10099:
 	.string	"zftl_do_gc"
-	.section	.rodata.__func__.10194,"a",@progbits
+	.section	.rodata.__func__.10192,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.10194, %object
-	.size	__func__.10194, 18
-__func__.10194:
+	.type	__func__.10192, %object
+	.size	__func__.10192, 18
+__func__.10192:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10219,"a",@progbits
+	.section	.rodata.__func__.10217,"a",@progbits
 	.align	3
 	.set	.LANCHOR11,. + 0
-	.type	__func__.10219, %object
-	.size	__func__.10219, 23
-__func__.10219:
+	.type	__func__.10217, %object
+	.size	__func__.10217, 23
+__func__.10217:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10327,"a",@progbits
+	.section	.rodata.__func__.10325,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
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+__func__.9607:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9640,"a",@progbits
+	.section	.rodata.__func__.9638,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.9640, %object
-	.size	__func__.9640, 13
-__func__.9640:
+	.type	__func__.9638, %object
+	.size	__func__.9638, 13
+__func__.9638:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9785,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 12
-__func__.9787:
+	.type	__func__.9785, %object
+	.size	__func__.9785, 12
+__func__.9785:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9834,"a",@progbits
+	.section	.rodata.__func__.9832,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9834, %object
-	.size	__func__.9834, 21
-__func__.9834:
+	.type	__func__.9832, %object
+	.size	__func__.9832, 21
+__func__.9832:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9868,"a",@progbits
+	.section	.rodata.__func__.9866,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.9868, %object
-	.size	__func__.9868, 22
-__func__.9868:
+	.type	__func__.9866, %object
+	.size	__func__.9866, 22
+__func__.9866:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9881,"a",@progbits
+	.section	.rodata.__func__.9879,"a",@progbits
 	.align	3
 	.set	.LANCHOR70,. + 0
-	.type	__func__.9881, %object
-	.size	__func__.9881, 19
-__func__.9881:
+	.type	__func__.9879, %object
+	.size	__func__.9879, 19
+__func__.9879:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9910,"a",@progbits
+	.section	.rodata.__func__.9908,"a",@progbits
 	.align	3
 	.set	.LANCHOR218,. + 0
-	.type	__func__.9910, %object
-	.size	__func__.9910, 16
-__func__.9910:
+	.type	__func__.9908, %object
+	.size	__func__.9908, 16
+__func__.9908:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9932,"a",@progbits
+	.section	.rodata.__func__.9930,"a",@progbits
 	.align	3
 	.set	.LANCHOR119,. + 0
-	.type	__func__.9932, %object
-	.size	__func__.9932, 16
-__func__.9932:
+	.type	__func__.9930, %object
+	.size	__func__.9930, 16
+__func__.9930:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9976,"a",@progbits
+	.section	.rodata.__func__.9974,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9976, %object
-	.size	__func__.9976, 16
-__func__.9976:
+	.type	__func__.9974, %object
+	.size	__func__.9974, 16
+__func__.9974:
 	.string	"gc_scan_src_blk"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
@@ -28054,7 +28077,7 @@ toshiba_ref_value:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC196:
-	.string	"FTL version: 6.0.16 20190427"
+	.string	"FTL version: 6.0.16 20190603"
 .LC197:
 	.string	"_c_user_data_density := %d\n"
 .LC198:

commit ffa55e18238b8457fb51fce46a63ef28dfbc33ce
Author: Shixiang Zheng <shixiang.zheng@rock-chips.com>
Date:   Fri May 31 11:18:34 2019 +0800

    video/drm: add panel node parameters for screen rotate
    
    Change-Id: I83112f8a05bd301327d7d1ca21eda97594d95823
    Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 65378c6db4..7af5bdf54b 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -294,6 +294,9 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 		return -ENXIO; \
 	}
 
+#define FDT_GET_INT_DEFAULT(val, name, default) \
+	val = ofnode_read_s32_default(native_mode, name, default);
+
 	FDT_GET_INT(hactive, "hactive");
 	FDT_GET_INT(vactive, "vactive");
 	FDT_GET_INT(pixelclock, "clock-frequency");
@@ -310,6 +313,15 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	FDT_GET_INT(val, "pixelclk-active");
 	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
 
+	FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
+	if (val == DRM_MODE_FLAG_XMIRROR) {
+		flags |= DRM_MODE_FLAG_XMIRROR;
+	} else if (val == DRM_MODE_FLAG_YMIRROR) {
+		flags |= DRM_MODE_FLAG_YMIRROR;
+	} else if (val == DRM_MODE_FLAG_XYMIRROR) {
+		flags |= DRM_MODE_FLAG_XMIRROR;
+		flags |= DRM_MODE_FLAG_YMIRROR;
+	}
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hfront_porch;
 	mode->hsync_end = mode->hsync_start + hsync_len;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c46b705cc9..4ed3892c90 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -653,6 +653,7 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	int crtc_w = crtc_state->crtc_w;
 	int crtc_h = crtc_state->crtc_h;
 	int xvir = crtc_state->xvir;
+	int x_mirror = 0, y_mirror = 0;
 
 	act_info = (src_h - 1) << 16;
 	act_info |= (src_w - 1) & 0xffff;
@@ -664,13 +665,27 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 
-	if (crtc_state->ymirror) {
-		if (VOP_WIN_SUPPORT(vop, vop->win, ymirror))
+	if (mode->flags & DRM_MODE_FLAG_YMIRROR)
+		y_mirror = 1;
+	else
+		y_mirror = 0;
+	if (mode->flags & DRM_MODE_FLAG_XMIRROR)
+		x_mirror = 1;
+	else
+		x_mirror = 0;
+	if (crtc_state->ymirror ^ y_mirror)
+		y_mirror = 1;
+	else
+		y_mirror = 0;
+	if (y_mirror) {
+		if (VOP_CTRL_SUPPORT(vop, ymirror))
 			crtc_state->dma_addr += (src_h - 1) * xvir * 4;
 		else
-			crtc_state->ymirror = 0;
-	}
-	VOP_WIN_SET(vop, ymirror, crtc_state->ymirror);
+			y_mirror = 0;
+		}
+	VOP_CTRL_SET(vop, ymirror, y_mirror);
+	VOP_CTRL_SET(vop, xmirror, x_mirror);
+
 	VOP_WIN_SET(vop, format, crtc_state->format);
 	VOP_WIN_SET(vop, yrgb_vir, xvir);
 	VOP_WIN_SET(vop, yrgb_mst, crtc_state->dma_addr);
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 36d5641dbb..337f59ee30 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -38,6 +38,11 @@
 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
 #define DRM_MODE_FLAG_PPIXDATA                  BIT(31)
 
+/* Panel Mirror control */
+#define DRM_MODE_FLAG_XMIRROR			(1<<28)
+#define DRM_MODE_FLAG_YMIRROR			(1<<29)
+#define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
+
 #define DRM_MODE_CONNECTOR_Unknown	0
 #define DRM_MODE_CONNECTOR_VGA		1
 #define DRM_MODE_CONNECTOR_DVII		2
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index 56265cf85b..d8622ebd19 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -145,4 +145,9 @@
 /* HSV - next is	0x6002 */
 #define MEDIA_BUS_FMT_AHSV8888_1X32		0x6001
 
+/* Panel Mirror control */
+#define DRM_MODE_FLAG_XMIRROR 			(1<<28)
+#define DRM_MODE_FLAG_YMIRROR 			(1<<29)
+#define DRM_MODE_FLAG_XYMIRROR			(DRM_MODE_FLAG_XMIRROR | DRM_MODE_FLAG_YMIRROR)
+
 #endif /* __LINUX_MEDIA_BUS_FORMAT_H */

commit cb0376d1acea586b26080b72f6becda2fd6f6e63
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 17 16:46:20 2018 +0800

    rockchip: test: emmc: add read/write count for emmc test
    
    Usually, we test the eMMC speed by reading and writing several times
    and then taking the average. So add parameter count.
    
    Change-Id: I0a01804b4b35b4a6d9dc8c96ac2bce6a4607301b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index 383998b663..82d9cd2349 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -4,9 +4,9 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <common.h>
 #include <asm/io.h>
 #include <cli.h>
-#include <common.h>
 #include <linux/compat.h>
 #include <malloc.h>
 #include "test-rockchip.h"
@@ -14,13 +14,13 @@
 int board_emmc_test(int argc, char * const argv[])
 {
 	u8 *write_buffer, *read_buffer;
-	u32 i, blocks = 0, lba;
+	u32 i, blocks = 0, count = 0, lba;
 	unsigned long ts;
 	int err = 0;
 	char cmd_mmc[512] = {0};
 
-	if (argc < 4) {
-		printf("Usage: rktest emmc start_lba blocks\n");
+	if (argc < 5) {
+		printf("Usage: rktest emmc start_lba blocks count\n");
 		printf("blocks should be from 8129 to 30000\n");
 		err = -EINVAL;
 		goto err_wb;
@@ -28,23 +28,13 @@ int board_emmc_test(int argc, char * const argv[])
 
 	lba = simple_strtoul(argv[2], NULL, 0);
 	blocks = simple_strtoul(argv[3], NULL, 0);
+	count = simple_strtoul(argv[4], NULL, 0);
 
 	if (blocks % 2)
 		/* Round up */
 		blocks += 1;
 
-	if (blocks < 8192) {
-		printf("Round up to 8192 blocks compulsively\n");
-		blocks = 8192;
-	}
-
-	if (blocks > 30000) {
-		printf("Round down to 30000 blocks compulsively\n");
-		blocks = 30000;
-	}
-
 	/* 1. Prepare memory */
-
 	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
 	if (!write_buffer) {
 		printf("No memory for write_buffer!\n");
@@ -64,29 +54,31 @@ int board_emmc_test(int argc, char * const argv[])
 		read_buffer[i] = 0;
 	}
 
-	/* 2. Prepare and start cli command */
-
+	/* 2. Prepare and start mmc write/read */
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x%x 0x%x",
 		 (u32)(ulong)write_buffer, lba, blocks);
 	ts = get_timer(0);
-	err = cli_simple_run_command(cmd_mmc, 0);
-	ts = get_timer(0) - ts;
-	if (!err)
-		goto err_mw;
+	for (i = 0; i < count; i++) {
+		err = cli_simple_run_command(cmd_mmc, 0);
+		if (!err)
+			goto err_mw;
+	}
 
+	ts = get_timer(0) - ts;
 	printf("eMMC write: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks / 2048, ts, (blocks >> 1) / ts);
+		blocks * count / 2048, ts, (blocks * count >> 1) / ts);
 
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x%x 0x%x",
 		 (u32)(ulong)read_buffer, lba, blocks);
 	ts = get_timer(0);
-	err = cli_simple_run_command(cmd_mmc, 0);
+	for (i = 0; i < count; i++) {
+		err = cli_simple_run_command(cmd_mmc, 0);
+		if (!err)
+			goto err_mw;
+	}
 	ts = get_timer(0) - ts;
-	if (!err)
-		goto err_mw;
-
 	printf("eMMC read: size %dMB, used %ldms, speed %ldMB/s\n",
-		blocks / 2048, ts, (blocks >> 1) / ts);
+		blocks * count / 2048, ts, (blocks * count >> 1) / ts);
 
 	/* 3. Verify the context */
 

commit 5d8287bf264672b085e66d60b1f06231d78f7651
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed May 22 15:08:25 2019 +0800

    dm: crypto: support crypto v2 test
    
    Change-Id: Ia6247f9d91780cebf7806a3c7fb606fe0a2de004
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/cmd/crypto.c b/cmd/crypto.c
index 8a5c19dbb4..c465ded797 100644
--- a/cmd/crypto.c
+++ b/cmd/crypto.c
@@ -137,6 +137,7 @@ static u8 rsa2048_e[] = {
 	0x00, 0x00, 0x00, 0x00,
 };
 
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 static u8 rsa2048_c[] = {
 	0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55, 0x1d, 0xb3, 0xf9, 0x43,
 	0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6, 0x95, 0xd6, 0x98, 0xec,
@@ -161,6 +162,7 @@ static u8 rsa2048_c[] = {
 	0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc, 0x1e, 0x75, 0x32, 0xf8,
 	0x73, 0xfa, 0x22, 0x7b,
 };
+#endif
 
 /* RSA2048-SHA256 sign data of foo_data[] */
 static u8 rsa2048_sha256_sign[] = {
@@ -220,7 +222,7 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	u8 sha256_out1[32];
 	u8 sha1_out0[20];
 	u8 sha1_out1[20];
-	u8 rsa_out[32];
+	u8 rsa_out[256];
 	u8 md5_out0[16];
 	u8 md5_out1[16];
 	u32 cap;
@@ -262,10 +264,13 @@ static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	     crypto_algo_nbits(csha_ctx.algo));
 
 	/* RSA2048-SHA256 */
+	memset(&rsa_key, 0x00, sizeof(rsa_key));
 	rsa_key.algo = CRYPTO_RSA2048;
 	rsa_key.n = (u32 *)&rsa2048_n;
 	rsa_key.e = (u32 *)&rsa2048_e;
+#ifdef CONFIG_ROCKCHIP_CRYPTO_V1
 	rsa_key.c = (u32 *)&rsa2048_c;
+#endif
 	crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, rsa_out);
 	dump("RSA2048-SHA256", rsa_out,
 	     sha256_out1, crypto_algo_nbits(csha_ctx.algo));

commit b353a43c9e441e8665efd1cc47824714ad67ed3f
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Wed May 22 14:46:09 2019 +0800

    crypto: add rockchip crypto v2 driver
    
    Crypto v2 driver implements algorithm below.
    Hash: MD5/SHA1/SHA256
    RSA : RSA512/RSA1024/RSA2048/RSA3072/RSA4096
    for the platforms: px30/rk3326.
    
    Change-Id: Ia3b3233f3d17db1c98da60aa8dd1cd26aed7b260
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
index 9e5cfbea24..775b31f0ce 100644
--- a/drivers/crypto/crypto-uclass.c
+++ b/drivers/crypto/crypto-uclass.c
@@ -23,6 +23,10 @@ u32 crypto_algo_nbits(u32 algo)
 		return 1024;
 	case CRYPTO_RSA2048:
 		return 2048;
+	case CRYPTO_RSA3072:
+		return 3072;
+	case CRYPTO_RSA4096:
+		return 4096;
 	}
 
 	printf("Unknown crypto algorithm: 0x%x\n", algo);
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 6cb003b417..d65abdb445 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -6,3 +6,10 @@ config ROCKCHIP_CRYPTO_V1
 	help
 	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
 	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
+
+config ROCKCHIP_CRYPTO_V2
+	bool "Enable rockchip crypto v2 support"
+	depends on DM_CRYPTO && (ROCKCHIP_RK3326 || ROCKCHIP_PX30)
+	help
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v2 on platforms: px30/rk3326.
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
index f9ba12f967..c818d1921d 100644
--- a/drivers/crypto/rockchip/Makefile
+++ b/drivers/crypto/rockchip/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_CRYPTO_V1) += crypto_v1.o
+obj-$(CONFIG_ROCKCHIP_CRYPTO_V2) += crypto_v2.o crypto_v2_pka.o crypto_v2_util.o
\ No newline at end of file
diff --git a/drivers/crypto/rockchip/crypto_v2.c b/drivers/crypto/rockchip/crypto_v2.c
new file mode 100644
index 0000000000..fa49694515
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v2.c
@@ -0,0 +1,658 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <crypto.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/clock.h>
+#include <rockchip/crypto_v2.h>
+#include <rockchip/crypto_v2_pka.h>
+
+struct rockchip_crypto_priv {
+	fdt_addr_t reg;
+	struct clk clk;
+	u32 frequency;
+	char *clocks;
+	u32 *frequencies;
+	u32 nclocks;
+	u32 length;
+	void *hw_ctx;
+};
+
+#define LLI_ADDR_ALIGIN_SIZE	8
+#define DATA_ADDR_ALIGIN_SIZE	8
+#define RK_CRYPTO_TIME_OUT	50000  /* max 50ms */
+
+#define RK_WHILE_TIME_OUT(condition, timeout, ret) { \
+			u32 time_out = timeout; \
+			while (condition) { \
+				if (time_out-- == 0) { \
+					printf("[%s] %d: time out!", __func__, \
+						__LINE__); \
+					ret = -ETIME; \
+					break; \
+				} \
+				udelay(1); \
+			} \
+			ret = 0; \
+		} while (0)
+
+typedef u32 paddr_t;
+#define virt_to_phys(addr)		(((unsigned long)addr) & 0xffffffff)
+#define phys_to_virt(addr, area)	((unsigned long)addr)
+
+static const u8 null_hash_sha1_value[] = {
+	0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d,
+	0x32, 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90,
+	0xaf, 0xd8, 0x07, 0x09
+};
+
+static const u8 null_hash_md5_value[] = {
+	0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
+	0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e
+};
+
+static const u8 null_hash_sha256_value[] = {
+	0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,
+	0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,
+	0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,
+	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55
+};
+
+fdt_addr_t crypto_base;
+
+static void word2byte(u32 word, u8 *ch, u32 endian)
+{
+	/* 0: Big-Endian 1: Little-Endian */
+	if (endian == BIG_ENDIAN) {
+		ch[0] = (word >> 24) & 0xff;
+		ch[1] = (word >> 16) & 0xff;
+		ch[2] = (word >> 8) & 0xff;
+		ch[3] = (word >> 0) & 0xff;
+	} else if (endian == LITTLE_ENDIAN) {
+		ch[0] = (word >> 0) & 0xff;
+		ch[1] = (word >> 8) & 0xff;
+		ch[2] = (word >> 16) & 0xff;
+		ch[3] = (word >> 24) & 0xff;
+	} else {
+		ch[0] = 0;
+		ch[1] = 0;
+		ch[2] = 0;
+		ch[3] = 0;
+	}
+}
+
+static inline void clear_hash_out_reg(void)
+{
+	int i;
+
+	/*clear out register*/
+	for (i = 0; i < 16; i++)
+		crypto_write(0, CRYPTO_HASH_DOUT_0 + 4 * i);
+}
+
+static int hw_crypto_reset(void)
+{
+	u32 tmp = 0, tmp_mask = 0;
+	int ret;
+
+	tmp = CRYPTO_SW_PKA_RESET | CRYPTO_SW_CC_RESET;
+	tmp_mask = tmp << CRYPTO_WRITE_MASK_SHIFT;
+
+	/* reset pka and crypto modules*/
+	crypto_write(tmp | tmp_mask, CRYPTO_RST_CTL);
+
+	/* wait reset compelete */
+	RK_WHILE_TIME_OUT(crypto_read(CRYPTO_RST_CTL),
+			  RK_CRYPTO_TIME_OUT, ret);
+	return ret;
+}
+
+static void hw_hash_common_clean_ctx(struct rk_hash_ctx *ctx)
+{
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+	if (ctx->free_data_lli)
+		free(ctx->free_data_lli);
+
+	if (ctx->cur_data_lli)
+		free(ctx->cur_data_lli);
+
+	if (ctx->vir_src_addr)
+		free(ctx->vir_src_addr);
+	memset(ctx, 0x00, sizeof(*ctx));
+}
+
+static void hw_hash_clean_ctx(struct rk_hash_ctx *ctx)
+{
+	/* clear hash status */
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+	/* free tmp buff */
+	if (ctx && ctx->magic == RK_HASH_CTX_MAGIC)
+		hw_hash_common_clean_ctx(ctx);
+}
+
+int rk_hash_init(void *hw_ctx, u32 algo)
+{
+	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)hw_ctx;
+	u32 reg_ctrl = 0;
+	int ret;
+
+	if (!tmp_ctx)
+		return -EINVAL;
+
+	memset(tmp_ctx, 0x00, sizeof(*tmp_ctx));
+
+	tmp_ctx->algo = algo;
+	switch (algo) {
+	case CRYPTO_MD5:
+		reg_ctrl |= CRYPTO_MODE_MD5;
+		tmp_ctx->digest_size = 16;
+		tmp_ctx->null_hash = null_hash_md5_value;
+		break;
+	case CRYPTO_SHA1:
+		reg_ctrl |= CRYPTO_MODE_SHA1;
+		tmp_ctx->digest_size = 20;
+		tmp_ctx->null_hash = null_hash_sha1_value;
+		break;
+	case CRYPTO_SHA256:
+		reg_ctrl |= CRYPTO_MODE_SHA256;
+		tmp_ctx->digest_size = 32;
+		tmp_ctx->null_hash = null_hash_sha256_value;
+		break;
+	default:
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	clear_hash_out_reg();
+
+	/* enable hardware padding */
+	reg_ctrl |= CRYPTO_HW_PAD_ENABLE;
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_HASH_CTL);
+
+	/* FIFO input and output data byte swap */
+	/* such as B0, B1, B2, B3 -> B3, B2, B1, B0 */
+	reg_ctrl = CRYPTO_DOUT_BYTESWAP | CRYPTO_DOIN_BYTESWAP;
+	crypto_write(reg_ctrl | CRYPTO_WRITE_MASK_ALL, CRYPTO_FIFO_CTL);
+
+	/* disable all interrupt */
+	crypto_write(0x0, CRYPTO_DMA_INT_EN);
+
+	tmp_ctx->magic = RK_HASH_CTX_MAGIC;
+
+	return 0;
+exit:
+	/* clear hash setting if init failed */
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+	return ret;
+}
+
+int rk_hash_update(void *ctx, const u8 *data, u32 data_len)
+{
+	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
+	struct crypto_lli_desc *free_lli_desp = NULL;
+	struct crypto_lli_desc *lli_desp = NULL;
+	u32 tmp, temp_data_len = 0;
+	u8 *vir_src_addr = NULL;
+	int ret = -EINVAL;
+
+	if (!tmp_ctx || !data)
+		goto error;
+
+	if (tmp_ctx->digest_size == 0 || tmp_ctx->magic != RK_HASH_CTX_MAGIC)
+		goto error;
+
+	/* update will keep cache one calculate request in memmory */
+	/* because last calculate request should calculate in final */
+	if (!tmp_ctx->cur_data_lli) {
+		lli_desp = (struct crypto_lli_desc *)
+				memalign(DATA_ADDR_ALIGIN_SIZE,
+					 sizeof(struct crypto_lli_desc));
+		if (!lli_desp)
+			goto error;
+
+		free_lli_desp = (struct crypto_lli_desc *)
+				memalign(DATA_ADDR_ALIGIN_SIZE,
+					 sizeof(struct crypto_lli_desc));
+		if (!free_lli_desp) {
+			free(lli_desp);
+			goto error;
+		}
+
+		memset(lli_desp, 0x00, sizeof(*lli_desp));
+		vir_src_addr = (u8 *)memalign(DATA_ADDR_ALIGIN_SIZE,
+						HASH_MAX_SIZE);
+		if (!vir_src_addr) {
+			free(lli_desp);
+			free(free_lli_desp);
+			printf("[%s] %d: memalign fail!", __func__, __LINE__);
+			goto error;
+		}
+
+		lli_desp->src_addr = (u32)virt_to_phys(vir_src_addr);
+		lli_desp->user_define = LLI_USER_CPIHER_START |
+					LLI_USER_STRING_START;
+		tmp_ctx->cur_data_lli = lli_desp;
+		tmp_ctx->free_data_lli = free_lli_desp;
+		tmp_ctx->vir_src_addr = vir_src_addr;
+
+		/* write first lli dma address to reg */
+		crypto_write((u32)virt_to_phys(tmp_ctx->cur_data_lli),
+			     CRYPTO_DMA_LLI_ADDR);
+	}
+
+	ret = 0;
+	while (data_len) {
+		lli_desp = (struct crypto_lli_desc *)tmp_ctx->cur_data_lli;
+		vir_src_addr = (u8 *)phys_to_virt((paddr_t)lli_desp->src_addr,
+						MEM_AREA_TEE_RAM);
+		if (data_len + lli_desp->src_len > HASH_MAX_SIZE) {
+			temp_data_len = HASH_MAX_SIZE - lli_desp->src_len;
+			memcpy(vir_src_addr + lli_desp->src_len, data,
+			       temp_data_len);
+			data_len -= temp_data_len;
+			data += temp_data_len;
+
+			free_lli_desp = tmp_ctx->free_data_lli;
+
+			memset(free_lli_desp, 0x00, sizeof(*free_lli_desp));
+			lli_desp->src_len = HASH_MAX_SIZE;
+			lli_desp->next_addr = (u32)virt_to_phys(free_lli_desp);
+			/* item done and  pause */
+			lli_desp->dma_ctrl = LLI_DMA_CTRL_PAUSE |
+					     LLI_DMA_CTRL_SRC_DONE;
+
+			if (tmp_ctx->dma_started == 0) {
+				/* start calculate */
+				crypto_write((CRYPTO_HASH_ENABLE <<
+						CRYPTO_WRITE_MASK_SHIFT) |
+						CRYPTO_HASH_ENABLE,
+						CRYPTO_HASH_CTL);
+				tmp = CRYPTO_DMA_START;
+				tmp_ctx->dma_started = 1;
+			} else {
+				/* restart calculate */
+				tmp = CRYPTO_DMA_RESTART;
+			}
+
+			/* flush cache */
+			cache_op_inner(DCACHE_AREA_CLEAN, lli_desp,
+				       sizeof(*lli_desp));
+			cache_op_inner(DCACHE_AREA_CLEAN, vir_src_addr,
+				       lli_desp->src_len);
+
+			/* start calculate */
+			crypto_write(tmp << CRYPTO_WRITE_MASK_SHIFT | tmp,
+				     CRYPTO_DMA_CTL);
+
+			/* wait calc ok */
+			RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
+					  RK_CRYPTO_TIME_OUT, ret);
+
+			/* clear interrupt status */
+			tmp = crypto_read(CRYPTO_DMA_INT_ST);
+			crypto_write(tmp, CRYPTO_DMA_INT_ST);
+
+			if (tmp != CRYPTO_SRC_ITEM_DONE_INT_ST &&
+			    tmp != CRYPTO_ZERO_LEN_INT_ST) {
+				printf("[%s] %d: CRYPTO_DMA_INT_ST = 0x%x",
+				       __func__, __LINE__, tmp);
+				goto error;
+			}
+
+			/* after calc one block, swap free lli and cur lli */
+			free_lli_desp->src_addr = lli_desp->src_addr;
+			tmp_ctx->free_data_lli = tmp_ctx->cur_data_lli;
+			tmp_ctx->cur_data_lli = free_lli_desp;
+			free_lli_desp = NULL;
+		} else {
+			/* cache first calculate request to buff */
+			memcpy(vir_src_addr + lli_desp->src_len,
+			       data, data_len);
+			lli_desp->src_len += data_len;
+			data_len = 0;
+		}
+	}
+
+	return ret;
+
+error:
+	/* free lli list */
+	hw_hash_clean_ctx(tmp_ctx);
+
+	return ret;
+}
+
+int rk_hash_final(void *ctx, u8 *digest, size_t len)
+{
+	struct rk_hash_ctx *tmp_ctx = (struct rk_hash_ctx *)ctx;
+	struct crypto_lli_desc *lli_desp = NULL;
+	int ret = -EINVAL;
+	u32 i, tmp;
+
+	if (!digest)
+		goto exit;
+
+	if (!tmp_ctx ||
+	    !tmp_ctx->cur_data_lli ||
+	    tmp_ctx->digest_size == 0 ||
+	    len > tmp_ctx->digest_size ||
+	    tmp_ctx->magic != RK_HASH_CTX_MAGIC) {
+		goto exit;
+	}
+
+	/* to find the last block */
+	lli_desp = (struct crypto_lli_desc *)tmp_ctx->cur_data_lli;
+	if (lli_desp->next_addr != 0)
+		goto exit;
+
+	/* if data len is zero, return null hash value immediately*/
+	if (tmp_ctx->dma_started == 0 &&
+	    lli_desp->src_len == 0 &&
+	    !tmp_ctx->null_hash) {
+		memcpy(digest, tmp_ctx->null_hash, len);
+		ret = 0;
+		goto exit;
+	}
+
+	/* set LLI_USER_STRING_LAST to tell crypto this block is last one */
+	lli_desp->user_define |= LLI_USER_STRING_LAST;
+	lli_desp->dma_ctrl = LLI_DMA_CTRL_LIST_DONE | LLI_DMA_CTRL_LAST;
+	cache_op_inner(DCACHE_AREA_CLEAN, lli_desp, sizeof(*lli_desp));
+	cache_op_inner(DCACHE_AREA_CLEAN, tmp_ctx->vir_src_addr,
+		       lli_desp->src_len);
+
+	if (tmp_ctx->dma_started == 0) {
+		crypto_write((CRYPTO_HASH_ENABLE << CRYPTO_WRITE_MASK_SHIFT) |
+				CRYPTO_HASH_ENABLE, CRYPTO_HASH_CTL);
+		crypto_write((CRYPTO_DMA_START << CRYPTO_WRITE_MASK_SHIFT) |
+				CRYPTO_DMA_START, CRYPTO_DMA_CTL);
+	} else {
+		crypto_write((CRYPTO_DMA_RESTART << CRYPTO_WRITE_MASK_SHIFT) |
+				CRYPTO_DMA_RESTART, CRYPTO_DMA_CTL);
+		tmp_ctx->dma_started = 1;
+	}
+
+	/* wait dma trans ok */
+	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_DMA_INT_ST),
+			  RK_CRYPTO_TIME_OUT, ret);
+
+	/* clear interrupt status */
+	tmp = crypto_read(CRYPTO_DMA_INT_ST);
+	crypto_write(tmp, CRYPTO_DMA_INT_ST);
+
+	if (tmp != CRYPTO_LIST_DONE_INT_ST) {
+		ret = -EIO;
+		goto exit;
+	}
+
+	/* wait hash value ok */
+	RK_WHILE_TIME_OUT(!crypto_read(CRYPTO_HASH_VALID),
+			  RK_CRYPTO_TIME_OUT, ret);
+
+	for (i = 0; i < len / 4; i++)
+		word2byte(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
+			  digest + i * 4, BIG_ENDIAN);
+
+	if (len % 4) {
+		u8 tmp_buf[4];
+
+		word2byte(crypto_read(CRYPTO_HASH_DOUT_0 + i * 4),
+			  tmp_buf, BIG_ENDIAN);
+		memcpy(digest + i * 4, tmp_buf, len % 4);
+	}
+
+	/* clear hash status */
+	crypto_write(CRYPTO_HASH_IS_VALID, CRYPTO_HASH_VALID);
+	crypto_write(CRYPTO_WRITE_MASK_ALL | 0, CRYPTO_HASH_CTL);
+
+exit:
+	/* free lli list */
+	hw_hash_clean_ctx(tmp_ctx);
+
+	return ret;
+}
+
+static u32 rockchip_crypto_capability(struct udevice *dev)
+{
+	return CRYPTO_MD5 |
+	       CRYPTO_SHA1 |
+	       CRYPTO_SHA256 |
+	       CRYPTO_RSA512 |
+	       CRYPTO_RSA1024 |
+	       CRYPTO_RSA2048 |
+	       CRYPTO_RSA3072 |
+	       CRYPTO_RSA4096;
+}
+
+static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (!ctx)
+		return -EINVAL;
+
+	priv->hw_ctx = malloc(sizeof(struct rk_hash_ctx));
+	if (!priv->hw_ctx)
+		return -ENOMEM;
+
+	memset(priv->hw_ctx, 0x00, sizeof(struct rk_hash_ctx));
+
+	return rk_hash_init(priv->hw_ctx, ctx->algo);
+}
+
+static int rockchip_crypto_sha_update(struct udevice *dev,
+				      u32 *input, u32 len)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (!len)
+		return -EINVAL;
+
+	return rk_hash_update(priv->hw_ctx, (u8 *)input, len);
+}
+
+static int rockchip_crypto_sha_final(struct udevice *dev,
+				     sha_context *ctx, u8 *output)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	u32 nbits;
+	int ret;
+
+	nbits = crypto_algo_nbits(ctx->algo);
+
+	ret = rk_hash_final(priv->hw_ctx, (u8 *)output, BITS2BYTE(nbits));
+	if (priv->hw_ctx) {
+		free(priv->hw_ctx);
+		priv->hw_ctx = 0;
+	}
+
+	return ret;
+}
+
+static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
+				      u8 *sign, u8 *output)
+{
+	struct mpa_num *mpa_m = NULL, *mpa_e = NULL, *mpa_n = NULL;
+	struct mpa_num *mpa_c = NULL, *mpa_result = NULL;
+	u32 n_bits, n_words;
+	u32 *rsa_result;
+	int ret;
+
+	if (!ctx)
+		return -EINVAL;
+
+	if (ctx->algo != CRYPTO_RSA512 &&
+	    ctx->algo != CRYPTO_RSA1024 &&
+	    ctx->algo != CRYPTO_RSA2048 &&
+	    ctx->algo != CRYPTO_RSA3072 &&
+	    ctx->algo != CRYPTO_RSA4096)
+		return -EINVAL;
+
+	n_bits = crypto_algo_nbits(ctx->algo);
+	n_words = BITS2WORD(n_bits);
+
+	rsa_result = malloc(BITS2BYTE(n_bits));
+	if (!rsa_result)
+		return -ENOMEM;
+
+	memset(rsa_result, 0x00, BITS2BYTE(n_bits));
+
+	ret = rk_mpa_alloc(&mpa_m);
+	ret |= rk_mpa_alloc(&mpa_e);
+	ret |= rk_mpa_alloc(&mpa_n);
+	ret |= rk_mpa_alloc(&mpa_c);
+	ret |= rk_mpa_alloc(&mpa_result);
+	if (ret)
+		goto exit;
+
+	mpa_m->d = (void *)sign;
+	mpa_e->d = (void *)ctx->e;
+	mpa_n->d = (void *)ctx->n;
+	mpa_c->d = (void *)ctx->c;
+	mpa_result->d = (void *)rsa_result;
+
+	mpa_m->size = n_words;
+	mpa_e->size = n_words;
+	mpa_n->size = n_words;
+	mpa_c->size = n_words;
+	mpa_result->size = n_words;
+
+	ret = rk_exptmod_np(mpa_m, mpa_e, mpa_n, mpa_c, mpa_result);
+	if (!ret)
+		memcpy(output, rsa_result, BITS2BYTE(n_bits));
+
+exit:
+	free(rsa_result);
+	rk_mpa_free(&mpa_m);
+	rk_mpa_free(&mpa_e);
+	rk_mpa_free(&mpa_n);
+	rk_mpa_free(&mpa_c);
+	rk_mpa_free(&mpa_result);
+
+	return ret;
+}
+
+static const struct dm_crypto_ops rockchip_crypto_ops = {
+	.capability = rockchip_crypto_capability,
+	.sha_init   = rockchip_crypto_sha_init,
+	.sha_update = rockchip_crypto_sha_update,
+	.sha_final  = rockchip_crypto_sha_final,
+	.rsa_verify = rockchip_crypto_rsa_verify,
+};
+
+/*
+ * Only use "clocks" to parse crypto clock id and use rockchip_get_clk().
+ * Because we always add crypto node in U-Boot dts, when kernel dtb enabled :
+ *
+ *   1. There is cru phandle mismatch between U-Boot and kernel dtb;
+ *   2. CONFIG_OF_SPL_REMOVE_PROPS removes clock property;
+ */
+static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int len, ret = -EINVAL;
+
+	if (!dev_read_prop(dev, "clocks", &len)) {
+		printf("Can't find \"clocks\" property\n");
+		return -EINVAL;
+	}
+
+	memset(priv, 0x00, sizeof(*priv));
+	priv->clocks = malloc(len);
+	if (!priv->clocks)
+		return -ENOMEM;
+
+	priv->nclocks = len / sizeof(u32);
+	if (dev_read_u32_array(dev, "clocks", (u32 *)priv->clocks,
+			       priv->nclocks)) {
+		printf("Can't read \"clocks\" property\n");
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	if (!dev_read_prop(dev, "clock-frequency", &len)) {
+		printf("Can't find \"clock-frequency\" property\n");
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	priv->frequencies = malloc(len);
+	if (!priv->frequencies) {
+		ret = -ENOMEM;
+		goto exit;
+	}
+
+	priv->nclocks = len / sizeof(u32);
+	if (dev_read_u32_array(dev, "clock-frequency", priv->frequencies,
+			       priv->nclocks)) {
+		printf("Can't read \"clock-frequency\" property\n");
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	priv->reg = (fdt_addr_t)dev_read_addr_ptr(dev);
+
+	crypto_base = priv->reg;
+
+	return 0;
+exit:
+	if (priv->clocks)
+		free(priv->clocks);
+
+	if (priv->frequencies)
+		free(priv->frequencies);
+
+	return ret;
+}
+
+static int rockchip_crypto_probe(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int i, ret = 0;
+	u32* clocks;
+
+	ret = rockchip_get_clk(&priv->clk.dev);
+	if (ret) {
+		printf("Failed to get clk device, ret=%d\n", ret);
+		return ret;
+	}
+
+	clocks = (u32 *)priv->clocks;
+	for (i = 0; i < priv->nclocks; i++) {
+		priv->clk.id = clocks[i * 2 + 1];
+		ret = clk_set_rate(&priv->clk, priv->frequencies[i]);
+		if (ret < 0) {
+			printf("%s: Failed to set clk(%ld): ret=%d\n",
+			       __func__, priv->clk.id, ret);
+			return ret;
+		}
+	}
+
+	hw_crypto_reset();
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_crypto_ids[] = {
+	{ .compatible = "rockchip,px30-crypto" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_crypto_v2) = {
+	.name		= "rockchip_crypto_v2",
+	.id		= UCLASS_CRYPTO,
+	.of_match	= rockchip_crypto_ids,
+	.ops		= &rockchip_crypto_ops,
+	.probe		= rockchip_crypto_probe,
+	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
+};
diff --git a/drivers/crypto/rockchip/crypto_v2_pka.c b/drivers/crypto/rockchip/crypto_v2_pka.c
new file mode 100644
index 0000000000..8b7535e17f
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v2_pka.c
@@ -0,0 +1,1098 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <crypto.h>
+#include <dm.h>
+#include <linux/errno.h>
+#include <rockchip/crypto_v2.h>
+#include <rockchip/crypto_v2_pka.h>
+
+#define CRYPT_OK	(0)
+#define CRYPT_ERROR	(-1)
+
+void rk_pka_ram_ctrl_enable(void)
+{
+	crypto_write((CRYPTO_RAM_PKA_RDY << CRYPTO_WRITE_MASK_SHIFT) |
+		     CRYPTO_RAM_PKA_RDY, CRYPTO_RAM_CTL);
+}
+
+void rk_pka_ram_ctrl_disable(void)
+{
+	crypto_write((CRYPTO_RAM_PKA_RDY << CRYPTO_WRITE_MASK_SHIFT),
+		     CRYPTO_RAM_CTL);
+}
+
+void rk_pka_wait_on_ram_ready(void)
+{
+	u32 output_reg_val;
+
+	do {
+		output_reg_val = crypto_read(CRYPTO_RAM_ST);
+	} while ((output_reg_val & 0x01) != CRYPTO_CLK_RAM_RDY);
+}
+
+void rk_pka_wait_on_pipe_ready(void)
+{
+	u32 output_reg_val;
+
+	do {
+		output_reg_val = crypto_read(CRYPTO_PKA_PIPE_RDY);
+	} while ((output_reg_val & 0x01) != RK_PKA_PIPE_READY);
+}
+
+void rk_pka_wait_on_done(void)
+{
+	u32 output_reg_val;
+
+	do {
+		output_reg_val = crypto_read(CRYPTO_PKA_DONE);
+	} while ((output_reg_val & 0x01) != RK_PKA_OP_DONE);
+}
+
+void rk_pka_set_startmemaddr_reg(u32 start_mem_addr)
+{
+	crypto_write(start_mem_addr, CRYPTO_PKA_MON_READ);
+}
+
+void rk_pka_set_N_NP_T0_T1_reg(u32 N, u32 NP, u32 T0,
+			       u32 T1)
+{
+	rk_pka_wait_on_done();
+	crypto_write((u32)((N) << RK_PKA_N_NP_T0_T1_REG_N_POS |
+				(NP) << RK_PKA_N_NP_T0_T1_REG_NP_POS |
+				(T0) << RK_PKA_N_NP_T0_T1_REG_T0_POS |
+				(T1) << RK_PKA_N_NP_T0_T1_REG_T1_POS),
+				CRYPTO_N_NP_T0_T1_ADDR);
+}
+
+void rk_pka_set_default_N_NP_T0_T1_reg(void)
+{
+	crypto_write(RK_PKA_N_NP_T0_T1_REG_DEFAULT_VAL, CRYPTO_N_NP_T0_T1_ADDR);
+}
+
+void rk_pka_get_status(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+}
+
+void rk_pka_get_status_alu_outzero(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_OUT_ZERO_POS) & 1UL;
+}
+
+void rk_pka_get_status_mod_overfl(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_MODOVRFLW_POS) & 1;
+}
+
+void rk_pka_get_status_div_byzero(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_DIV_BY_ZERO_POS) & 1;
+}
+
+void rk_pka_get_status_carry(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_CARRY_POS) & 1;
+}
+
+void rk_pka_get_status_alu_signout(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_ALU_SIGN_OUT_POS) & 1;
+}
+
+void rk_pka_get_status_modinv_ofzero(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_MODINV_OF_ZERO_POS) & 1;
+}
+
+void rk_pka_get_status_opcode(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_OPCODE_POS) &
+			  RK_PKA_STATUS_OPCODE_MASK;
+}
+
+void rk_pka_get_status_tag(u32 *status)
+{
+	rk_pka_wait_on_done();
+	*status = crypto_read(CRYPTO_PKA_STATUS);
+	*status = ((*status) >> RK_PKA_STATUS_TAG_POS) & RK_PKA_STATUS_TAG_MASK;
+}
+
+void rk_pka_set_regsize(u32 size_bits, u32 entry_num)
+{
+	rk_pka_wait_on_done();
+	crypto_write(size_bits, CRYPTO_PKA_L0 + 4 * (entry_num));
+}
+
+void rk_pka_read_regsize(u32 *size_bits, u32 entry_num)
+{
+	rk_pka_wait_on_done();
+	*size_bits = crypto_read(CRYPTO_PKA_L0 + 4 * (entry_num));
+}
+
+void rk_pka_set_regaddr(u32 vir_reg, u32 phys_addr)
+{
+	rk_pka_wait_on_done();
+	crypto_write(phys_addr, CRYPTO_MEMORY_MAP0 + 4 * (vir_reg));
+}
+
+void rk_pka_get_regaddr(u32 vir_reg, u32 *phys_addr)
+{
+	*phys_addr = crypto_read(CRYPTO_MEMORY_MAP0 + 4 * (vir_reg));
+}
+
+void rk_pka_read_regaddr(u32 vir_reg, u32 *phys_addr)
+{
+	rk_pka_wait_on_done();
+	*phys_addr = crypto_read(CRYPTO_MEMORY_MAP0 + 4 * (vir_reg));
+}
+
+u32 rk_pka_make_full_opcode(u32 opcode, u32 len_id,
+			    u32 is_a_immed, u32 op_a,
+			    u32 is_b_immed, u32 op_b,
+			    u32 res_discard, u32 res,
+			    u32 tag)
+{
+	u32 full_opcode;
+
+	full_opcode =
+		(((u32)(opcode) & 31) << RK_PKA_OPCODE_OPERATION_ID_POS |
+		((u32)(len_id) & 7) << RK_PKA_OPCODE_LEN_POS |
+		((u32)(is_a_immed) & 1) << RK_PKA_OPCODE_OPERAND_1_IMMED_POS |
+		((u32)(op_a) & 31)	<< RK_PKA_OPCODE_OPERAND_1_POS	|
+		((u32)(is_b_immed) & 1) << RK_PKA_OPCODE_OPERAND_2_IMMED_POS |
+		((u32)(op_b) & 31) << RK_PKA_OPCODE_OPERAND_2_POS	|
+		((u32)(res_discard) & 1) << RK_PKA_OPCODE_R_DISCARD_POS	|
+		((u32)(res) & 31) << RK_PKA_OPCODE_RESULT_POS |
+		((u32)(tag) & 31) << RK_PKA_OPCODE_TAG_POS);
+	return full_opcode;
+}
+
+void rk_pka_hw_load_value2pka_mem(u32 addr, u32 val)
+{
+	u32 *vaddr;
+
+	vaddr = (u32 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	*vaddr = val;
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_load_block2pka_mem(u32 addr, u32 *ptr,
+				  u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_FastMemCpy(vaddr, (u8 *)ptr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_reverse_load_block2pka_mem(u32 addr, u32 *ptr,
+					  u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_ReverseMemcpy(vaddr, (u8 *)ptr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_clear_pka_mem(u32 addr, u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_MemSetZero(vaddr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_read_value_from_pka_mem(u32 addr, u32 *val)
+{
+	u32 *vaddr;
+
+	vaddr = (u32 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	*val = *vaddr;
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_read_block_from_pka_mem(u32 addr, u32 *ptr,
+				       u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_FastMemCpy((u8 *)(ptr), vaddr, size_words);
+	rk_pka_ram_ctrl_enable();
+}
+
+void rk_pka_hw_reverse_read_block_from_pka_mem(u32 addr, u32 *ptr,
+					       u32 size_words)
+{
+	u8 *vaddr =
+		(u8 *)((addr) + RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR);
+
+	rk_pka_ram_ctrl_disable();
+	rk_pka_wait_on_ram_ready();
+	RK_PKA_ReverseMemcpy((u8 *)(ptr), vaddr,
+			     size_words * sizeof(u32));
+	rk_pka_ram_ctrl_enable();
+}
+
+u32 rk_pka_exec_operation(u32 opcode, u8 len_id,
+			  u8 is_a_immed, s8 op_a,
+			  u8 is_b_immed, s8 op_b,
+			  u8 res_discard, s8 res, u8 tag)
+{
+	u32 status;
+	u32 full_opcode;
+	u32 error = CRYPT_OK;
+
+	if (res == RES_DISCARD) {
+		res_discard = 1;
+		res = 0;
+	}
+
+	full_opcode = rk_pka_make_full_opcode(opcode, len_id,
+					      is_a_immed, op_a,
+					      is_b_immed, op_b,
+					      res_discard, res, tag);
+
+	/* write full opcode into PKA CRYPTO_OPCODE register */
+	crypto_write(full_opcode, CRYPTO_OPCODE);
+
+	/*************************************************/
+	/* finishing operations for different cases      */
+	/*************************************************/
+	switch (opcode) {
+	case PKA_Div:
+		/* for Div operation check, that op_b != 0*/
+		rk_pka_get_status_div_byzero(&status);
+		if (status == 1) {
+			error = RK_PKA_DIVIDER_IS_NULL_ERROR;
+			goto end;
+		}
+		break;
+	case PKA_Terminate:
+		/* wait for PKA done bit */
+		rk_pka_wait_on_done();
+		break;
+	default:
+		/* wait for PKA pipe ready bit */
+		rk_pka_wait_on_pipe_ready();
+	}
+
+end:
+	return error;
+}
+
+u32 rk_pka_set_sizes_tab(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT],
+			 u32 count_of_sizes, u32 max_size_bits,
+			 u32 is_default_map)
+{
+	u32 i;
+	u32 error;
+	u32 max_size, min_size, maxsize_words;
+
+	error = CRYPT_OK;
+	max_size = 0;
+	min_size = 0xFFFFFFFF;
+
+	if (is_default_map > 1)
+		return  RK_PKA_SET_MAP_MODE_ERROR;
+
+	/* 1. Case of user defined settings */
+	if (is_default_map == 0) {
+		/* find maximal and minimal sizes  */
+		for (i = 0; i < count_of_sizes; i++) {
+			if (max_size < regs_sizes_ptr[i] &&
+			    regs_sizes_ptr[i] != 0xFFFFFFFF)
+				max_size = regs_sizes_ptr[i];
+
+			if (min_size > regs_sizes_ptr[i])
+				min_size = regs_sizes_ptr[i];
+		}
+
+		/* set sizes into PKA registers sizes table */
+		for (i = 0; i < count_of_sizes; i++)
+			crypto_write(regs_sizes_ptr[i], CRYPTO_PKA_L0 + 4 * i);
+	} else {
+		/* 2. Case of default settings */
+		maxsize_words = (max_size_bits + 31) / 32;
+		/* write exact size into first table entry */
+		crypto_write(max_size_bits, CRYPTO_PKA_L0);
+
+		/* write size with extra word into tab[1] = tab[0] + 32 */
+		crypto_write(32 * maxsize_words + 32, CRYPTO_PKA_L0 + 4);
+
+		/* count of entries, which was set */
+		count_of_sizes = 2;
+	}
+
+	for (i = count_of_sizes; i < 8; i++)
+		crypto_write(0xFFFFFFFF, CRYPTO_PKA_L0 + 4 * i);
+
+	return error;
+}
+
+u32 rk_pka_set_map_tab(struct rk_pka_regs_map *regs_map_ptr,
+		       u32 *count_of_regs, u32 maxsize_words,
+		       u32 N_NP_T0_T1, u32 is_default_map)
+{
+	u32 i;
+	u32 error;
+	u32 cur_addr;
+	u32 default_max_size, default_count_of_regs;
+
+	error = CRYPT_OK;
+	cur_addr = 0;
+
+	if (is_default_map == 1) {
+		default_max_size = 32 * maxsize_words;
+		default_count_of_regs =
+			min(32, (8 * RK_PKA_MAX_REGS_MEM_SIZE_BYTES) /
+				default_max_size);
+
+		for (i = 0; i < 32 - 2; i++) {
+			if (i < default_count_of_regs - 2) {
+				crypto_write(cur_addr,
+					     CRYPTO_MEMORY_MAP0 + 4 * i);
+				cur_addr = cur_addr + default_max_size / 8;
+			} else {
+				crypto_write(0xFFC, CRYPTO_MEMORY_MAP0 + 4 * i);
+			}
+		}
+		crypto_write(cur_addr, CRYPTO_MEMORY_MAP0 + 4 * 30);
+		cur_addr = cur_addr + default_max_size / 8;
+		crypto_write(cur_addr, CRYPTO_MEMORY_MAP0 + 4 * 31);
+		*count_of_regs = default_count_of_regs;
+		crypto_write((u32)RK_PKA_N_NP_T0_T1_REG_DEFAULT_VAL,
+			     CRYPTO_N_NP_T0_T1_ADDR);
+	}
+
+	if (is_default_map == 0) {
+		for (i = 0; i < *count_of_regs; i++)
+			crypto_write(regs_map_ptr->regs_addr[i],
+				     CRYPTO_MEMORY_MAP0 +
+				     4 * regs_map_ptr->reges_num[i]);
+
+		crypto_write(N_NP_T0_T1, CRYPTO_N_NP_T0_T1_ADDR);
+	}
+
+	return error;
+}
+
+u32 rk_pka_clear_block_of_regs(u8 first_reg, u8 count_of_regs,
+			       u8 len_id)
+{
+	u32 i;
+	u32 size, addr;
+	s32 count_temps;
+
+	rk_pka_read_regsize(&size, len_id);
+
+	count_temps = 0;
+
+	if (first_reg + count_of_regs > 30) {
+		count_temps = min((count_of_regs + first_reg - 30), 2);
+		count_of_regs = 30;
+	} else {
+		count_temps = 2;
+	}
+
+	/* clear ordinary registers */
+	for (i = 0; i < count_of_regs; i++)
+		RK_PKA_Clr(len_id, first_reg + i/*regNum*/, 0/*tag*/);
+
+	/* clear PKA temp registers using macros (without PKA operations */
+	if (count_temps > 0) {
+		/* calculate size of register in words */
+		size = (size + 31) / 32;
+		rk_pka_wait_on_done();
+		rk_pka_get_regaddr(30/*vir_reg*/, &addr/*phys_addr*/);
+		rk_pka_hw_clear_pka_mem(addr, size);
+
+		if (count_temps > 1) {
+			rk_pka_get_regaddr(31/*vir_reg*/, &addr/*phys_addr*/);
+			rk_pka_hw_clear_pka_mem(addr, size);
+		}
+	}
+	return CRYPT_OK;
+}
+
+u32 rk_pka_init(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT], u32 count_of_sizes,
+		struct rk_pka_regs_map *regs_map_ptr, u32 count_of_regs,
+		u32 op_size_bits, u32 regsize_words,
+		u32 N_NP_T0_T1, u32 is_default_map)
+{
+	u32 addr;
+	u32 error;
+
+	error = CRYPT_OK;
+
+	PKA_CLK_ENABLE();
+	rk_pka_ram_ctrl_enable();
+
+	error = rk_pka_set_sizes_tab(regs_sizes_ptr, count_of_sizes,
+				     op_size_bits, is_default_map);
+
+	if (error != CRYPT_OK)
+		return error;
+
+	error = rk_pka_set_map_tab(regs_map_ptr, &count_of_regs, regsize_words,
+				   N_NP_T0_T1, is_default_map);
+
+	if (error != CRYPT_OK)
+		return error;
+
+	/* set size of register into RegsSizesTable */
+	crypto_write(32 * regsize_words, CRYPTO_PKA_L0 + 3 * 4);
+
+	/* clean PKA data memory */
+	rk_pka_clear_block_of_regs(0, count_of_regs - 2, 3);
+
+	/* clean temp PKA registers 30,31 */
+	rk_pka_wait_on_done();
+	rk_pka_get_regaddr(30/*vir_reg*/, &addr/*phys_addr*/);
+	rk_pka_hw_clear_pka_mem(addr, regsize_words);
+	rk_pka_get_regaddr(31/*vir_reg*/, &addr/*phys_addr*/);
+	rk_pka_hw_clear_pka_mem(addr, regsize_words);
+
+	return error;
+}
+
+void rk_pka_finish(void)
+{
+	RK_PKA_Terminate(0);
+	PKA_CLK_DISABLE();
+}
+
+void rk_pka_copy_data_into_reg(s8 dst_reg, u8 len_id,
+			       u32 *src_ptr, u32 size_words)
+{
+	u32 cur_addr;
+	u32 reg_size;
+
+	RK_PKA_Terminate(0);
+
+	rk_pka_read_regaddr(dst_reg, &cur_addr);
+
+	rk_pka_read_regsize(&reg_size, len_id);
+	reg_size = (reg_size + 31) / 32;
+
+	rk_pka_hw_load_block2pka_mem(cur_addr, src_ptr, size_words);
+	cur_addr = cur_addr + sizeof(u32) * size_words;
+
+	rk_pka_hw_clear_pka_mem(cur_addr, reg_size - size_words);
+}
+
+void rk_pka_copy_data_from_reg(u32 *dst_ptr, u32 size_words,
+			       s8 src_reg)
+{
+	u32 cur_addr;
+
+	crypto_write(0, CRYPTO_OPCODE);
+
+	rk_pka_wait_on_done();
+
+	rk_pka_read_regaddr(src_reg, &cur_addr);
+
+	rk_pka_hw_read_block_from_pka_mem(cur_addr, dst_ptr, size_words);
+}
+
+u32 rk_pka_calcNp_and_initmodop(u32 len_id, u32 mod_size_bits,
+				s8 r_t0, s8 r_t1, s8 r_t2)
+{
+	u32 i;
+	u32 s;
+	u32 error;
+	u32 num_bits, num_words;
+
+	/* Set s = 132 */
+	s = 132;
+
+	/*-------------------------------------------------------------------*/
+	/* Step 1,2. Set registers: Set op_a = 2^(sizeN+32)                  */
+	/*           Registers using: 0 - N (is set in register 0,           */
+	/*           1 - NP, temp regs: r_t0 (A), r_t1, r_t2.                */
+	/*           len_id: 0 - exact size, 1 - exact+32 bit                */
+	/*-------------------------------------------------------------------*/
+
+	/* set register r_t0 = 0 */
+	RK_PKA_Clr(len_id + 1, r_t0/*op_a*/, 0/*tag*/); /* r2 = 0 */
+
+	/* calculate bit position of said bit in the word */
+	num_bits = mod_size_bits % 32;
+	num_words = mod_size_bits / 32;
+
+	/* set 1 into register r_t0 */
+	RK_PKA_Set0(len_id + 1, r_t0/*op_a*/, r_t0/*res*/, 0/*tag*/);
+
+	/* shift 1 to num_bits+31 position */
+	if (num_bits > 0)
+		RK_PKA_SHL0(len_id + 1, r_t0/*op_a*/, num_bits - 1/*s*/,
+			    r_t0/*res*/, 0/*tag*/);
+
+	/* shift to word position */
+	for (i = 0; i < num_words; i++)
+		RK_PKA_SHL0(len_id + 1, r_t0/*op_a*/, 31/*s*/,
+			    r_t0/*res*/, 0/*tag*/);
+
+	/*-------------------------------------------------------------------*/
+	/* Step 3.  Dividing:  (op_a * 2**s) / N                             */
+	/*-------------------------------------------------------------------*/
+	error = rk_pka_div_long_num(len_id,        /*len_id*/
+				    r_t0,          /*op_a*/
+				    s,            /*shift*/
+				    0,            /*op_b = N*/
+				    1,            /*res NP*/
+				    r_t1,          /*temp reg*/
+				    r_t2           /*temp reg*/);
+
+	return error;
+
+}  /* END OF LLF_PKI_PKA_ExecCalcNpAndInitModOp */
+
+/***********   LLF_PKI_PKA_DivLongNum function      **********************/
+/**
+ * @brief The function divides long number A*(2^S) by B:
+ *            res =  A*(2^S) / B,  remainder A = A*(2^S) % B.
+ *        where: A,B - are numbers of size, which is not grate than,
+ *		 maximal operands size,
+ *		 and B > 2^S;
+ *               S  - exponent of binary factor of A.
+ *               ^  - exponentiation operator.
+ *
+ *        The function algorithm:
+ *
+ *        1. Let nWords = S/32; nBits = S % 32;
+ *        2. Set res = 0, r_t1 = op_a;
+ *        3. for(i=0; i<=nWords; i++) do:
+ *            3.1. if(i < nWords )
+ *                   s1 = 32;
+ *                 else
+ *                   s1 = nBits;
+ *            3.2. r_t1 = r_t1 << s1;
+ *            3.3. call PKA_div for calculating the quotient and remainder:
+ *                      r_t2 = floor(r_t1/op_b) //quotient;
+ *                      r_t1 = r_t1 % op_b   //remainder (is in r_t1 register);
+ *            3.4. res = (res << s1) + r_t2;
+ *           end do;
+ *        4. Exit.
+ *
+ *        Assuming:
+ *                  - 5 PKA registers are used: op_a, op_b, res, r_t1, r_t2.
+ *                  - The registers sizes and mapping tables are set on
+ *                    default mode according to operands size.
+ *                  - The PKA clocks are initialized.
+ *        NOTE !   Operand op_a shall be overwritten by remainder.
+ *
+ * @param[in] len_id    - ID of operation size (modSize+32).
+ * @param[in] op_a      - Operand A: virtual register pointer of A.
+ * @param[in] S        - exponent of binary factor of A.
+ * @param[in] op_b      - Operand B: virtual register pointer of B.
+ * @param[in] res      - Virtual register pointer for result quotient.
+ * @param[in] r_t1      - Virtual pointer to remainder.
+ * @param[in] r_t2      - Virtual pointer of temp register.
+ * @param[in] VirtualHwBaseAddr -  Virtual HW base address, passed by user.
+ *
+ * @return CRYSError_t - On success CRYPT_OK is returned:
+ *
+ */
+u32 rk_pka_div_long_num(u8 len_id, s8 op_a, u32 s,
+			s8 op_b, s8 res, s8 r_t1, s8 r_t2)
+{
+	s8 s1;
+	u32  i;
+	u32  n_bits, n_words;
+
+	/* calculate shifting parameters (words and bits ) */
+	n_words = ((u32)s + 31) / 32;
+	n_bits = (u32)s % 32;
+
+	/* copy operand op_a (including extra word) into temp reg r_t1 */
+	RK_PKA_Copy(len_id + 1, r_t1/*dst*/, op_a/*src*/, 0 /*tag*/);
+
+	/* set res = 0 (including extra word) */
+	RK_PKA_Clear(len_id + 1, res/*dst*/, 0 /*tag*/);
+
+	/* set s1 = 0 for first dividing in loop */
+	s1 = 0;
+
+	/*----------------------------------------------------*/
+	/* Step 1.  Shifting and dividing loop                */
+	/*----------------------------------------------------*/
+	for (i = 0; i < n_words; i++) {
+		/* 3.1 set shift value s1  */
+		if (i > 0)
+			s1 = 32;
+		else
+			s1 = n_bits;
+
+		/* 3.2. shift: r_t1 = r_t1 * 2**s1 (in code (s1-1),
+		 * because PKA performs s+1 shifts)
+		 */
+		if (s1 > 0)
+			RK_PKA_SHL0(len_id + 1, r_t1/*op_a*/, (s1 - 1)/*s*/,
+				    r_t1/*res*/, 0/*tag*/);
+
+		/* 3.3. perform PKA_Div for calculating a quotient
+		 * r_t2 = floor(r_t1 / N)
+		and remainder r_t1 = r_t1 % op_b
+		 */
+		RK_PKA_Div(len_id + 1, r_t1/*op_a*/, op_b/*B*/, r_t2/*res*/,
+			   0/*tag*/);
+
+		/* 3.4. res = res * 2**s1 + res;   */
+		if (s1 > 0)
+			RK_PKA_SHL0(len_id + 1, res /*op_a*/, (s1 - 1)/*s*/,
+				    res /*res*/, 0 /*tag*/);
+
+		RK_PKA_Add(len_id + 1, res/*op_a*/, r_t2/*op_b*/, res/*res*/,
+			   0/*tag*/);
+	}
+
+	rk_pka_wait_on_done();
+	return CRYPT_OK;
+}  /* END OF LLF_PKI_PKA_DivLongNum */
+
+/******LLF_PKI_CalcNpAndInitModOp function (physical pointers)***************/
+/**
+ * @brief The function initializes  modulus and Barret tag NP,
+ *	      used in modular PKA operations.
+ *
+ *        The function does the following:
+ *          - calculates mod size in bits and sets it into PKA table sizes;
+ *          - if parameter NpCreateFlag = PKA_CreateNP, then the function
+ *            writes the modulus and the tag into registers
+ *            r0 and r1 accordingly;
+ *          - if NpCreateFlag= PKA_SetNP, the function calls the
+ *            LLF_PKI_PKA_ExecCalcNpAndInitModOp, which calculates the Barret
+ *            tag NP and initializes PKA registers; then the function outputs
+ *            calcu1lated NP value.
+ *
+ *       Assumings: - The registers mapping table is set on default mode,
+ *            according to modulus size:
+ *         -- count of allowed registers is not less, than 7 (including 3
+ *            registers r_t0,r_t2,rT3 for internal calculations and 4 default
+ *            special registers N,NP,T0,T1);
+ *         -- modulus exact and exact+32 bit sizes should be set into first
+ *            two entries of sizes-table accordingly.
+ *
+ * @param[in]  N_ptr        - The pointer to the buffer, containing modulus N,
+ * @param[in]  N_sizeBits   - The size of modulus in bytes, must be
+ *				16 <= N_sizeBytes <= 264.
+ * @param[out] NP_ptr       - The pointer to the buffer, containing
+ *				result - modulus tag NP.
+ * @param[in]  NpCreateFlag - Parameter, defining whether the NP shall be
+ *				taken from NP buffer and set into
+ *                            PKA register NP ( NpCreateFlag= PKA_CreateNP= 1 )
+ *                            or it shall be calculated and send to
+ *                            NP buffer ( NpCreateFlag= PKA_SetNP= 0 ).
+ * @param[in]  r_t0,r_t1,r_t2  - Virtual pointers to temp registers
+ *						  (sequence numbers).
+ * @param[in]  VirtualHwBaseAddr -  Virtual HW base address, passed by user.
+ *
+ * @return CRYSError_t - On success CRYPT_OK is returned,
+ *				on failure an error code:
+ *				LLF_PKI_PKA_ILLEGAL_PTR_ERROR
+ *				LLF_PKI_PKA_ILLEGAL_OPERAND_LEN_ERROR
+ *
+ */
+u32 rk_calcNp_and_initmodop(u32 *N_ptr, u32 N_size_bits,
+			    u32 *NP_ptr, u8 np_create_flag,
+			    s8 r_t0, s8 r_t1, s8 r_t2)
+{
+	u32 N_size_words;
+	u32 error = CRYPT_OK;
+
+	/* calculate size of modulus in bytes and in words */
+	N_size_words = (N_size_bits + 31) / 32;
+
+	/* copy modulus N into r0 register */
+	rk_pka_copy_data_into_reg(0/*dst_reg*/, 1/*len_id*/, N_ptr/*src_ptr*/,
+				  N_size_words);
+
+	/* if np_create_flag == PKA_SetNP, then set NP into PKA register r1 */
+	if (np_create_flag == RK_PKA_SET_NP) {
+		/* copy the NP into r1 register NP */
+		rk_pka_copy_data_into_reg(1/*dst_reg*/, 1/*len_id*/,
+					  NP_ptr/*src_ptr*/,
+					  RK_PKA_BARRETT_IN_WORDS);
+	} else {
+		/*---------------------------------------------------------*/
+		/*     execute calculation of NP and initialization of PKA */
+		/*---------------------------------------------------------*/
+
+		rk_pka_calcNp_and_initmodop(0/*len_id*/, N_size_bits,
+					    r_t0, r_t1, r_t2);
+
+		/* output of NP value */
+		rk_pka_copy_data_from_reg(NP_ptr/*dst_ptr*/,
+					  RK_PKA_BARRETT_IN_WORDS,
+					  1/*srcReg*/);
+	}
+	/* End of the function */
+	return error;
+} /* END OF LLF_PKI_CalcNpAndInitModOp */
+
+#define RK_NEG_SIGN -1
+#define RK_POS_SIGN  1
+
+#define RK_WORD_SIZE                  32
+
+#define rk_mpanum_is_zero(x) ((x)->size == 0)
+#define rk_mpanum_neg(x) ((x)->size = -((x)->size))
+#define rk_mpanum_size(x) ((int)((x)->size >= 0 ? \
+				 (x)->size : -(x)->size))
+#define rk_mpanum_sign(x) ((x)->size >= 0 ? RK_POS_SIGN : RK_NEG_SIGN)
+#define rk_mpanum_msw(x) ((x)->d[rk_mpanum_size(x) - 1])
+
+/*  --------------------------------------------------------------------
+ *  Function:  mpa_highest_bit_index
+ *  Returns the index of the highest 1 in |src|.
+ *  The index starts at 0 for the least significant bit.
+ *  If src == zero, it will return -1
+ *
+ */
+static int mpa_highest_bit_index(const struct mpa_num *src)
+{
+	u32 w;
+	u32 b;
+
+	if (rk_mpanum_is_zero(src))
+		return -1;
+
+	w = rk_mpanum_msw(src);
+
+	for (b = 0; b < RK_WORD_SIZE; b++) {
+		w >>= 1;
+		if (w == 0)
+			break;
+	}
+	return (int)(rk_mpanum_size(src) - 1) * RK_WORD_SIZE + b;
+}
+
+/*get bignum data length*/
+static int rk_check_size(u32 *data, u32 max_word_size)
+{
+	for (int i = (max_word_size - 1); i >= 0; i--) {
+		if (data[i] == 0)
+			continue;
+		else
+			return (i + 1);
+	}
+	return 0;
+}
+
+int rk_mpa_alloc(struct mpa_num **mpa)
+{
+	if (!mpa)
+		return -EINVAL;
+
+	*mpa = malloc(sizeof(**mpa));
+	if (!(*mpa))
+		return -ENOMEM;
+
+	memset(*mpa, 0x00, sizeof(**mpa));
+
+	return 0;
+}
+
+void rk_mpa_free(struct mpa_num **mpa)
+{
+	if (mpa && (*mpa))
+		free(*mpa);
+}
+
+/* c = |a| + |b| */
+int rk_abs_add(void *a, void *b, void *c)
+{
+	int max_word_size;
+	u32 error = CRYPT_OK;
+	struct mpa_num *m_a, *m_b, *m_c;
+
+	m_a = (struct mpa_num *)a;
+	m_b = (struct mpa_num *)b;
+	m_c = (struct mpa_num *)c;
+
+	max_word_size = rk_mpanum_size(m_a);
+	if (max_word_size < rk_mpanum_size(m_b))
+		max_word_size = rk_mpanum_size(m_b);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/, m_a->d,
+				  rk_mpanum_size(m_a));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/, m_b->d,
+				  rk_mpanum_size(m_b));
+	RK_PKA_Add(1/*len_id*/, 2/*op_a*/, 3/*op_b*/, 4/*res*/, 0/*tag*/);
+	rk_pka_copy_data_from_reg(m_c->d, max_word_size + 1,
+				  4/*srcReg*/);
+
+	m_c->size = rk_check_size(m_c->d,  max_word_size + 1);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	return error;
+}
+
+/*c = a % b*/
+int rk_mod(void *a, void *b, void *c)
+{
+	int max_word_size;
+	u32 error = CRYPT_OK;
+	struct mpa_num *m_a, *m_b, *m_c;
+
+	m_a = (struct mpa_num *)a;
+	m_b = (struct mpa_num *)b;
+	m_c = (struct mpa_num *)c;
+
+	if (!a || !b || !c || rk_mpanum_size(m_b) == 0) {
+		error = CRYPT_ERROR;
+		goto exit;
+	}
+
+	max_word_size = rk_mpanum_size(m_a);
+	if (max_word_size < rk_mpanum_size(m_b))
+		max_word_size = rk_mpanum_size(m_b);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/,
+				  m_a->d/*src_ptr*/,
+				  rk_mpanum_size(m_a));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/,
+				  m_b->d/*src_ptr*/,
+				  rk_mpanum_size(m_b));
+	RK_PKA_Div(0/*len_id*/, 2/*op_a*/, 3/*op_b*/, 4/*res*/, 0/*tag*/);
+	rk_pka_copy_data_from_reg(m_c->d,  max_word_size, 2/*srcReg*/);
+	m_c->size = rk_check_size(m_c->d, max_word_size);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	return error;
+}
+
+/*d = (a ^ b) % c*/
+int rk_exptmod(void *a, void *b, void *c, void *d)
+{
+	struct mpa_num *tmpa;
+	u32 op_Np[5];
+	u32 error = CRYPT_OK;
+	int max_word_size, exact_size;
+	struct mpa_num *m_b, *m_c, *m_d;
+
+	m_b = (struct mpa_num *)b;
+	m_c = (struct mpa_num *)c;
+	m_d = (struct mpa_num *)d;
+
+	if (rk_mpa_alloc(&tmpa) != 0)
+		return CRYPT_ERROR;
+
+	tmpa->d = malloc(RK_MAX_RSA_NCHARS);
+	if (!tmpa->d) {
+		error = -ENOMEM;
+		goto exit;
+	}
+
+	rk_mod(a, c, tmpa);
+
+	if (!a || !b || !c || !d || rk_mpanum_size(m_c) == 0) {
+		error = CRYPT_ERROR;
+		goto exit;
+	}
+
+	max_word_size = rk_mpanum_size(tmpa);
+	if (max_word_size < rk_mpanum_size(m_b))
+		max_word_size = rk_mpanum_size(m_b);
+	if (max_word_size < rk_mpanum_size(m_c))
+		max_word_size = rk_mpanum_size(m_c);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	/* write exact size into first table entry */
+	exact_size = mpa_highest_bit_index(m_c) + 1;
+	crypto_write(exact_size, CRYPTO_PKA_L0);
+
+	/* write size with extra word into tab[1] = tab[0] + 32 */
+	crypto_write(exact_size + 32, CRYPTO_PKA_L0 + 4);
+
+	/* calculate NP by initialization PKA for modular operations */
+	error = rk_calcNp_and_initmodop(
+					(m_c)->d, /*in N*/
+					exact_size, /*in N size*/
+					op_Np, /*out NP*/
+					RK_PKA_CREATE_NP, /*in caculate NP*/
+					2, /*in *r_t0*/
+					3, /*in r_t1*/
+					4 /*in r_t2*/);
+	if (error != CRYPT_OK) {
+		printf("rk_calcNp_and_initmodop fail");
+		goto exit;
+	}
+	rk_pka_clear_block_of_regs(2/* FirstReg*/, 3, 1/*len_id*/);
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/,
+				  tmpa->d/*src_ptr*/,
+				  rk_mpanum_size(tmpa));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/,
+				  (m_b)->d/*src_ptr*/,
+				  rk_mpanum_size(m_b));
+	rk_pka_copy_data_into_reg(0/*dst_reg*/, 1/*len_id*/,
+				  m_c->d/*src_ptr*/,
+				  rk_mpanum_size(m_c));
+	RK_PKA_ModExp(0, 2, 3, 4, 0);
+	rk_pka_copy_data_from_reg(m_d->d,  max_word_size, 4/*srcReg*/);
+
+	m_d->size = rk_check_size(m_d->d, max_word_size);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	if (tmpa->d)
+		free(tmpa->d);
+
+	rk_mpa_free(&tmpa);
+	return error;
+}
+
+/*d = (a ^ b) % c*/
+int rk_exptmod_np(void *m, void *e, void *n, void *np, void *d)
+{
+	struct mpa_num *tmpa;
+	u32 op_Np[5];
+	u32 error = CRYPT_OK;
+	int max_word_size, exact_size;
+	struct mpa_num *m_e, *m_n, *m_np, *m_d;
+
+	m_e = (struct mpa_num *)e;
+	m_n = (struct mpa_num *)n;
+	m_np = (struct mpa_num *)np;
+	m_d = (struct mpa_num *)d;
+
+	if (rk_mpa_alloc(&tmpa) != 0)
+		return CRYPT_ERROR;
+
+	tmpa->d = malloc(RK_MAX_RSA_NCHARS);
+	if (!tmpa->d) {
+		error = -ENOMEM;
+		goto exit;
+	}
+
+	memset(tmpa->d, 0x00, sizeof(RK_MAX_RSA_NCHARS));
+	rk_mod(m, n, tmpa);
+
+	if (!m || !e || !n || !d || rk_mpanum_size(m_n) == 0) {
+		error = CRYPT_ERROR;
+		goto exit;
+	}
+
+	max_word_size = rk_mpanum_size(tmpa);
+	if (max_word_size < rk_mpanum_size(m_e))
+		max_word_size = rk_mpanum_size(m_e);
+	if (max_word_size < rk_mpanum_size(m_n))
+		max_word_size = rk_mpanum_size(m_n);
+
+	error = RK_PKA_DefaultInitPKA(max_word_size * 32, max_word_size + 1);
+	if (error != CRYPT_OK)
+		goto exit;
+
+	/* write exact size into first table entry */
+	exact_size = mpa_highest_bit_index(m_n) + 1;
+	crypto_write(exact_size, CRYPTO_PKA_L0);
+
+	/* write size with extra word into tab[1] = tab[0] + 32 */
+	crypto_write(exact_size + 32, CRYPTO_PKA_L0 + 4);
+
+	/* calculate NP by initialization PKA for modular operations */
+	if (m_np->d)
+		error = rk_calcNp_and_initmodop((m_n)->d, /*in N*/
+						exact_size,	/*in N size*/
+						np,	/*out NP*/
+						RK_PKA_SET_NP, /*in set NP*/
+						2,	/*in *r_t0*/
+						3,	/*in r_t1*/
+						4	/*in r_t2*/);
+	else
+		error = rk_calcNp_and_initmodop((m_n)->d,/*in N*/
+						exact_size,	/*in N size*/
+						op_Np,	/*out NP*/
+						RK_PKA_CREATE_NP,
+						2,	/*in *r_t0*/
+						3,	/*in r_t1*/
+						4	/*in r_t2*/);
+	if (error != CRYPT_OK) {
+		printf("rk_calcNp_and_initmodop fail");
+		goto exit;
+	}
+	rk_pka_clear_block_of_regs(2/* FirstReg*/, 3, 1/*len_id*/);
+
+	rk_pka_copy_data_into_reg(2/*dst_reg*/, 1/*len_id*/,
+				  (tmpa)->d/*src_ptr*/,
+				  rk_mpanum_size(tmpa));
+	rk_pka_copy_data_into_reg(3/*dst_reg*/, 1/*len_id*/,
+				  m_e->d/*src_ptr*/,
+				  rk_mpanum_size(m_e));
+	rk_pka_copy_data_into_reg(0/*dst_reg*/, 1/*len_id*/,
+				  (m_n)->d/*src_ptr*/,
+				  rk_mpanum_size(m_n));
+	RK_PKA_ModExp(0, 2, 3, 4, 0);
+	rk_pka_copy_data_from_reg(m_d->d, max_word_size, 4/*srcReg*/);
+
+	m_d->size = rk_check_size(m_d->d, max_word_size);
+
+	rk_pka_clear_block_of_regs(0/*FirstReg*/, 5/*Count*/, 1/*len_id*/);
+	rk_pka_clear_block_of_regs(30/*FirstReg*/, 2/*Count*/, 1/*len_id*/);
+	rk_pka_finish();
+
+exit:
+	if (tmpa->d)
+		free(tmpa->d);
+
+	rk_mpa_free(&tmpa);
+	return error;
+}
diff --git a/drivers/crypto/rockchip/crypto_v2_util.c b/drivers/crypto/rockchip/crypto_v2_util.c
new file mode 100644
index 0000000000..97ed1578f1
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v2_util.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <rockchip/crypto_v2_util.h>
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed words copy on a specified buffer.
+ *
+ *        on a 6 words buffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] size    - The counter size in words.
+ *
+ */
+void util_reverse_words_buff(u32 *buff_ptr, u32 size_words)
+{
+	u32 i;
+	u32 temp;
+	u32 *high_swap_ptr, *low_swap_ptr;
+
+	/* initialize the source and the destination poision */
+	high_swap_ptr = buff_ptr + size_words - 1;
+	low_swap_ptr  = buff_ptr;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < (size_words / 2); i++) {
+		temp				= *high_swap_ptr;
+		*(high_swap_ptr--)	= *low_swap_ptr;
+		*(low_swap_ptr++)	= temp;
+	}
+} /* END OF util_reverse_words_buff */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed byte copy on a specified buffer.
+ *
+ *        on a 6 byte buffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] src_ptr - The counter size in bytes.
+ *
+ */
+void util_reverse_buff(u8 *buff_ptr, u32 size)
+{
+	u32 i;
+	u32 temp;
+	u8 *high_swap_ptr, *low_swap_ptr;
+
+	/* initialize the source and the destination poision */
+	high_swap_ptr = buff_ptr + size - 1;
+	low_swap_ptr  = buff_ptr;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < (size / 2); i++) {
+		temp			= *high_swap_ptr;
+		*(high_swap_ptr--)	= *low_swap_ptr;
+		*(low_swap_ptr++)	= temp;
+	}
+} /* END OF util_reverse_buff */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer to
+ * another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in bytes.
+ *
+ */
+void util_reverse_memcpy(u8 *dst_ptr, const u8 *src_ptr, u32 size)
+{
+	u32 i;
+	u32 buff_dst_pos, buff_src_pos;
+
+	/* execute the reverse copy in case of different buffers */
+	/* initialize the source and the destination position */
+	buff_dst_pos = size - 1;
+	buff_src_pos = 0;
+
+	for (i = 0; i < size; i++)
+		dst_ptr[buff_dst_pos--] = src_ptr[buff_src_pos++];
+} /* END OF util_reverse_memcpy */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory copy between 2 buffers.
+ *
+ * @param[in] dst_ptr - The first counter buffer.
+ * @param[in] src_ptr - The second counter buffer.
+ * @param[in] size    - the first counter size in words.
+ *
+ */
+void util_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size)
+{
+	u32 i;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < size; i++)
+		dst_ptr[i] = src_ptr[i];
+} /* END OF util_memcpy */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer
+ * to another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in words.
+ *
+ */
+void util_reverse_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size)
+{
+	u32 i;
+	u32 buff_dst_pos, buff_src_pos;
+
+	/* execute the reverse copy in case of different buffers */
+	/* initialize the source and the destination position */
+	buff_dst_pos = size - 1;
+	buff_src_pos = 0;
+
+	for (i = 0; i < size; i++)
+		dst_ptr[buff_dst_pos--] = src_ptr[buff_src_pos++];
+} /* END OF util_reverse_memcpy */
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory set operation on a buffer.
+ *
+ * @param[in] buff_ptr - the buffer.
+ * @param[in] val      - The value to set the buffer.
+ * @param[in] size     - the buffers size in words.
+ *
+ */
+void util_word_memset(u32 *buff_ptr, u32 val, u32 size)
+{
+	u32 i;
+
+	/* execute the reverse memcpoy */
+	for (i = 0; i < size; i++)
+		buff_ptr[i] = val;
+} /* END OF util_memcpy */
diff --git a/include/crypto.h b/include/crypto.h
index d5dcb5d274..487079dcb2 100644
--- a/include/crypto.h
+++ b/include/crypto.h
@@ -13,6 +13,8 @@
 #define CRYPTO_RSA512		BIT(3)
 #define CRYPTO_RSA1024		BIT(4)
 #define CRYPTO_RSA2048		BIT(5)
+#define CRYPTO_RSA3072		BIT(6)
+#define CRYPTO_RSA4096		BIT(7)
 
 #define BYTE2WORD(bytes)	((bytes) / 4)
 #define BITS2BYTE(nbits)	((nbits) / 8)
diff --git a/include/rockchip/crypto_v2.h b/include/rockchip/crypto_v2.h
new file mode 100644
index 0000000000..bcbaf0788c
--- /dev/null
+++ b/include/rockchip/crypto_v2.h
@@ -0,0 +1,608 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V2_H_
+#define _ROCKCHIP_CRYPTO_V2_H_
+
+#include <asm/io.h>
+
+#define	cache_op_inner(area, addr, size) \
+		flush_cache((unsigned long)addr, (unsigned long)size)
+
+#define	RK_CRYPTO_KEY_ROOT		   0x00010000
+#define	RK_CRYPTO_KEY_PRIVATE		   0x00020000
+#define	RK_CRYPTO_MODE_MASK		   0x0000ffff
+#define	RK_GET_CRYPTO_MODE(mode)	   (mode & RK_CRYPTO_MODE_MASK)
+#define	RK_IS_CRYPTO_USE_ROOT_KEY(mode)    (!!(mode & RK_CRYPTO_KEY_ROOT))
+#define	RK_IS_CRYPTO_USE_PRIVATE_KEY(mode) (!!(mode & RK_CRYPTO_KEY_PRIVATE)
+
+#define	RK_AES_HASH_RX	0
+#define	RK_AES_HASH_TX	1
+
+enum rk_hash_algo {
+	TEE_ALG_SHA1 = 1,
+	TEE_ALG_MD5,
+	TEE_ALG_SHA256,
+	TEE_ALG_SHA224,
+	TEE_ALG_SHA512,
+	TEE_ALG_SHA384,
+	TEE_ALG_SHA512_224,
+	TEE_ALG_SHA512_256,
+};
+
+#define	_SBF(s,	v)			((v) <<	(s))
+#define	_BIT(b)				_SBF(b,	1)
+
+#define	DES_KEYSIZE			8
+#define	TDES_EDE_KEYSIZE		24
+#define	AES_KEYSIZE_128			16
+#define	AES_KEYSIZE_192			24
+#define	AES_KEYSIZE_256			32
+
+#define	DES_BLOCK_SIZE			8
+#define	AES_BLOCK_SIZE			16
+
+#define	RK_MODE_ENCRYPT			0
+#define	RK_MODE_DECRYPT			1
+
+#define	HASH_MAX_SIZE			8192
+#define	CIPHER_MAX_SIZE			8192
+
+#define	_SBF(s,	v)			((v) <<	(s))
+#define	_BIT(b)				_SBF(b,	1)
+
+#define	DES_KEYSIZE			8
+#define	TDES_EDE_KEYSIZE		24
+#define	AES_KEYSIZE_128			16
+#define	AES_KEYSIZE_192			24
+#define	AES_KEYSIZE_256			32
+
+#define	DES_BLOCK_SIZE			8
+#define	AES_BLOCK_SIZE			16
+
+#define	RK_MODE_ENCRYPT			0
+#define	RK_MODE_DECRYPT			1
+
+#define	CRYPTO_WRITE_MASK_SHIFT		(16)
+#define	CRYPTO_WRITE_MASK_ALL		((0xffffu << CRYPTO_WRITE_MASK_SHIFT))
+
+#define	WRITE_MASK			(16)
+
+#define	CRU_CLKGATE_CON8_ALLCLK_EN	_SBF(12, 0x0F)
+#define	CRU_CLKGATE_CON9_ALLCLK_EN	_SBF(2,	0x0F)
+
+#define	CRYPTO_MST_NON_SECURE		_SBF(0,	0x03)
+#define	CRYPTO_SLV_SECURE		_BIT(8)
+
+/* Crypto control registers*/
+#define	CRYPTO_CLK_CTL			0x0000
+#define	CRYPTO_AUTO_CLKGATE_EN		_BIT(0)
+
+#define	CRYPTO_RST_CTL			0x0004
+#define	CRYPTO_SW_PKA_RESET		_BIT(2)
+#define	CRYPTO_SW_RNG_RESET		_BIT(1)
+#define	CRYPTO_SW_CC_RESET		_BIT(0)
+
+/* Crypto DMA control registers*/
+#define	CRYPTO_DMA_INT_EN		0x0008
+#define	CRYPTO_ZERO_ERR_INT_EN		_BIT(6)
+#define	CRYPTO_LIST_ERR_INT_EN		_BIT(5)
+#define	CRYPTO_SRC_ERR_INT_EN		_BIT(4)
+#define	CRYPTO_DST_ERR_INT_EN		_BIT(3)
+#define	CRYPTO_SRC_ITEM_INT_EN		_BIT(2)
+#define	CRYPTO_DST_ITEM_DONE_INT_EN	_BIT(1)
+#define	CRYPTO_LIST_DONE_INT_EN		_BIT(0)
+
+#define	CRYPTO_DMA_INT_ST		0x000C
+#define	CRYPTO_ZERO_LEN_INT_ST		_BIT(6)
+#define	CRYPTO_LIST_ERR_INT_ST		_BIT(5)
+#define	CRYPTO_SRC_ERR_INT_ST		_BIT(4)
+#define	CRYPTO_DST_ERR_INT_ST		_BIT(3)
+#define	CRYPTO_SRC_ITEM_DONE_INT_ST	_BIT(2)
+#define	CRYPTO_DST_ITEM_DONE_INT_ST _BIT(1)
+#define	CRYPTO_LIST_DONE_INT_ST		_BIT(0)
+
+#define	CRYPTO_DMA_CTL			0x0010
+#define	CRYPTO_DMA_RESTART		_BIT(1)
+#define	CRYPTO_DMA_START		_BIT(0)
+
+/* DMA LIST Start Address Register */
+#define	CRYPTO_DMA_LLI_ADDR		0x0014
+
+#define	CRYPTO_DMA_ST			0x0018
+#define	CRYPTO_DMA_BUSY			_BIT(0)
+
+#define	CRYPTO_DMA_STATE		0x001C
+#define	CRYPTO_LLI_IDLE_STATE		_SBF(4,	0x00)
+#define	CRYPTO_LLI_FETCH_STATE		_SBF(4,	0x01)
+#define	CRYPTO_LLI_WORK_STATE		_SBF(4,	0x02)
+#define	CRYPTO_SRC_IDLE_STATE		_SBF(2,	0x00)
+#define	CRYPTO_SRC_LOAD_STATE		_SBF(2,	0x01)
+#define	CRYPTO_SRC_WORK_STATE		_SBF(2,	0x02)
+#define	CRYPTO_DST_IDLE_STATE		_SBF(0,	0x00)
+#define	CRYPTO_DST_LOAD_STATE		_SBF(0,	0x01)
+#define	CRYPTO_DST_WORK_STATE		_SBF(0,	0x02)
+
+/* DMA LLI Read	Address	Register */
+#define	CRYPTO_DMA_LLI_RADDR		0x0020
+
+/* DMA Source Data Read	Address	Register */
+#define	CRYPTO_DMA_SRC_RADDR		0x0024
+
+/* DMA Destination Data	Read Address Register */
+#define	CRYPTO_DMA_DST_RADDR		0x0028
+
+#define	CRYPTO_DMA_ITEM_ID		0x002C
+
+#define	CRYPTO_FIFO_CTL			0x0040
+#define	CRYPTO_DOUT_BYTESWAP		_BIT(1)
+#define	CRYPTO_DOIN_BYTESWAP		_BIT(0)
+
+/* Block Cipher	Control	Register */
+#define	CRYPTO_BC_CTL			0x0044
+#define	CRYPTO_BC_AES			_SBF(8,	0x00)
+#define	CRYPTO_BC_DES			_SBF(8,	0x02)
+#define	CRYPTO_BC_TDES			_SBF(8,	0x03)
+#define	CRYPTO_BC_ECB			_SBF(4,	0x00)
+#define	CRYPTO_BC_CBC			_SBF(4,	0x01)
+#define	CRYPTO_BC_CTS			_SBF(4,	0x02)
+#define	CRYPTO_BC_CTR			_SBF(4,	0x03)
+#define	CRYPTO_BC_CFB			_SBF(4,	0x04)
+#define	CRYPTO_BC_OFB			_SBF(4,	0x05)
+#define	CRYPTO_BC_XTS			_SBF(4,	0x06)
+#define	CRYPTO_BC_CCM			_SBF(4,	0x07)
+#define	CRYPTO_BC_GCM			_SBF(4,	0x08)
+#define	CRYPTO_BC_CMAC			_SBF(4,	0x09)
+#define	CRYPTO_BC_CBC_MAC		_SBF(4,	0x0A)
+#define	CRYPTO_BC_128_bit_key		_SBF(2,	0x00)
+#define	CRYPTO_BC_192_bit_key		_SBF(2,	0x01)
+#define	CRYPTO_BC_256_bit_key		_SBF(2,	0x02)
+#define	CRYPTO_BC_DECRYPT		_BIT(1)
+#define	CRYPTO_BC_ENABLE		_BIT(0)
+
+/* Hash	Control	Register */
+#define	CRYPTO_HASH_CTL			0x0048
+#define	CRYPTO_MODE_SHA1		_SBF(4,	0x00)
+#define	CRYPTO_MODE_MD5			_SBF(4,	0x01)
+#define	CRYPTO_MODE_SHA256		_SBF(4,	0x02)
+#define	CRYPTO_MODE_SHA224		_SBF(4,	0x03)
+#define	CRYPTO_MODE_SHA512		_SBF(4,	0x08)
+#define	CRYPTO_MODE_SHA384		_SBF(4,	0x09)
+#define	CRYPTO_MODE_SHA512_224		_SBF(4,	0x0A)
+#define	CRYPTO_MODE_SHA512_256		_SBF(4,	0x0B)
+#define	CRYPTO_HMAC_ENABLE		_BIT(3)
+#define	CRYPTO_HW_PAD_ENABLE		_BIT(2)
+#define	CRYPTO_HASH_SRC_SEL		_BIT(1)
+#define	CRYPTO_HASH_ENABLE		_BIT(0)
+
+/* Cipher Status Register */
+#define	CRYPTO_CIPHER_ST		0x004C
+#define	CRYPTO_OTP_KEY_VALID		_BIT(2)
+#define	CRYPTO_HASH_BUSY		_BIT(1)
+#define	CRYPTO_BLOCK_CIPHER_BUSY	_BIT(0)
+
+#define	CRYPTO_CIPHER_STATE		0x0050
+#define	CRYPTO_HASH_IDLE_STATE		_SBF(10, 0x01)
+#define	CRYPTO_HASH_IPAD_STATE		_SBF(10, 0x02)
+#define	CRYPTO_HASH_TEXT_STATE		_SBF(10, 0x04)
+#define	CRYPTO_HASH_OPAD_STATE		_SBF(10, 0x08)
+#define	CRYPTO_HASH_OPAD_EXT_STATE	_SBF(10, 0x10)
+#define	CRYPTO_GCM_IDLE_STATE		_SBF(8,	0x00)
+#define	CRYPTO_GCM_PRE_STATE		_SBF(8,	0x01)
+#define	CRYPTO_GCM_NA_STATE		_SBF(8,	0x02)
+#define	CRYPTO_GCM_PC_STATE		_SBF(8,	0x03)
+#define	CRYPTO_CCM_IDLE_STATE		_SBF(6,	0x00)
+#define	CRYPTO_CCM_PRE_STATE		_SBF(6,	0x01)
+#define	CRYPTO_CCM_NA_STATE		_SBF(6,	0x02)
+#define	CRYPTO_CCM_PC_STATE		_SBF(6,	0x03)
+#define	CRYPTO_PARALLEL_IDLE_STATE	_SBF(4,	0x00)
+#define	CRYPTO_PARALLEL_PRE_STATE	_SBF(4,	0x01)
+#define	CRYPTO_PARALLEL_BULK_STATE	_SBF(4,	0x02)
+#define	CRYPTO_MAC_IDLE_STATE		_SBF(2,	0x00)
+#define	CRYPTO_MAC_PRE_STATE		_SBF(2,	0x01)
+#define	CRYPTO_MAC_BULK_STATE		_SBF(2,	0x02)
+#define	CRYPTO_SERIAL_IDLE_STATE	_SBF(0,	0x00)
+#define	CRYPTO_SERIAL_PRE_STATE		_SBF(0,	0x01)
+#define	CRYPTO_SERIAL_BULK_STATE	_SBF(0,	0x02)
+
+#define	CRYPTO_CH0_IV_0			0x0100
+#define	CRYPTO_CH0_IV_1			0x0104
+#define	CRYPTO_CH0_IV_2			0x0108
+#define	CRYPTO_CH0_IV_3			0x010c
+#define	CRYPTO_CH1_IV_0			0x0110
+#define	CRYPTO_CH1_IV_1			0x0114
+#define	CRYPTO_CH1_IV_2			0x0118
+#define	CRYPTO_CH1_IV_3			0x011c
+#define	CRYPTO_CH2_IV_0			0x0120
+#define	CRYPTO_CH2_IV_1			0x0124
+#define	CRYPTO_CH2_IV_2			0x0128
+#define	CRYPTO_CH2_IV_3			0x012c
+#define	CRYPTO_CH3_IV_0			0x0130
+#define	CRYPTO_CH3_IV_1			0x0134
+#define	CRYPTO_CH3_IV_2			0x0138
+#define	CRYPTO_CH3_IV_3			0x013c
+#define	CRYPTO_CH4_IV_0			0x0140
+#define	CRYPTO_CH4_IV_1			0x0144
+#define	CRYPTO_CH4_IV_2			0x0148
+#define	CRYPTO_CH4_IV_3			0x014c
+#define	CRYPTO_CH5_IV_0			0x0150
+#define	CRYPTO_CH5_IV_1			0x0154
+#define	CRYPTO_CH5_IV_2			0x0158
+#define	CRYPTO_CH5_IV_3			0x015c
+#define	CRYPTO_CH6_IV_0			0x0160
+#define	CRYPTO_CH6_IV_1			0x0164
+#define	CRYPTO_CH6_IV_2			0x0168
+#define	CRYPTO_CH6_IV_3			0x016c
+#define	CRYPTO_CH7_IV_0			0x0170
+#define	CRYPTO_CH7_IV_1			0x0174
+#define	CRYPTO_CH7_IV_2			0x0178
+#define	CRYPTO_CH7_IV_3			0x017c
+
+#define	CRYPTO_CH0_KEY_0		0x0180
+#define	CRYPTO_CH0_KEY_1		0x0184
+#define	CRYPTO_CH0_KEY_2		0x0188
+#define	CRYPTO_CH0_KEY_3		0x018c
+#define	CRYPTO_CH1_KEY_0		0x0190
+#define	CRYPTO_CH1_KEY_1		0x0194
+#define	CRYPTO_CH1_KEY_2		0x0198
+#define	CRYPTO_CH1_KEY_3		0x019c
+#define	CRYPTO_CH2_KEY_0		0x01a0
+#define	CRYPTO_CH2_KEY_1		0x01a4
+#define	CRYPTO_CH2_KEY_2		0x01a8
+#define	CRYPTO_CH2_KEY_3		0x01ac
+#define	CRYPTO_CH3_KEY_0		0x01b0
+#define	CRYPTO_CH3_KEY_1		0x01b4
+#define	CRYPTO_CH3_KEY_2		0x01b8
+#define	CRYPTO_CH3_KEY_3		0x01bc
+#define	CRYPTO_CH4_KEY_0		0x01c0
+#define	CRYPTO_CH4_KEY_1		0x01c4
+#define	CRYPTO_CH4_KEY_2		0x01c8
+#define	CRYPTO_CH4_KEY_3		0x01cc
+#define	CRYPTO_CH5_KEY_0		0x01d0
+#define	CRYPTO_CH5_KEY_1		0x01d4
+#define	CRYPTO_CH5_KEY_2		0x01d8
+#define	CRYPTO_CH5_KEY_3		0x01dc
+#define	CRYPTO_CH6_KEY_0		0x01e0
+#define	CRYPTO_CH6_KEY_1		0x01e4
+#define	CRYPTO_CH6_KEY_2		0x01e8
+#define	CRYPTO_CH6_KEY_3		0x01ec
+#define	CRYPTO_CH7_KEY_0		0x01f0
+#define	CRYPTO_CH7_KEY_1		0x01f4
+#define	CRYPTO_CH7_KEY_2		0x01f8
+#define	CRYPTO_CH7_KEY_3		0x01fc
+#define	CRYPTO_KEY_CHANNLE_NUM		8
+
+#define	CRYPTO_CH0_PKEY_0		0x0200
+#define	CRYPTO_CH0_PKEY_1		0x0204
+#define	CRYPTO_CH0_PKEY_2		0x0208
+#define	CRYPTO_CH0_PKEY_3		0x020c
+#define	CRYPTO_CH1_PKEY_0		0x0210
+#define	CRYPTO_CH1_PKEY_1		0x0214
+#define	CRYPTO_CH1_PKEY_2		0x0218
+#define	CRYPTO_CH1_PKEY_3		0x021c
+#define	CRYPTO_CH2_PKEY_0		0x0220
+#define	CRYPTO_CH2_PKEY_1		0x0224
+#define	CRYPTO_CH2_PKEY_2		0x0228
+#define	CRYPTO_CH2_PKEY_3		0x022c
+#define	CRYPTO_CH3_PKEY_0		0x0230
+#define	CRYPTO_CH3_PKEY_1		0x0234
+#define	CRYPTO_CH3_PKEY_2		0x0238
+#define	CRYPTO_CH3_PKEY_3		0x023c
+#define	CRYPTO_CH4_PKEY_0		0x0240
+#define	CRYPTO_CH4_PKEY_1		0x0244
+#define	CRYPTO_CH4_PKEY_2		0x0248
+#define	CRYPTO_CH4_PKEY_3		0x024c
+#define	CRYPTO_CH5_PKEY_0		0x0250
+#define	CRYPTO_CH5_PKEY_1		0x0254
+#define	CRYPTO_CH5_PKEY_2		0x0258
+#define	CRYPTO_CH5_PKEY_3		0x025c
+#define	CRYPTO_CH6_PKEY_0		0x0260
+#define	CRYPTO_CH6_PKEY_1		0x0264
+#define	CRYPTO_CH6_PKEY_2		0x0268
+#define	CRYPTO_CH6_PKEY_3		0x026c
+#define	CRYPTO_CH7_PKEY_0		0x0270
+#define	CRYPTO_CH7_PKEY_1		0x0274
+#define	CRYPTO_CH7_PKEY_2		0x0278
+#define	CRYPTO_CH7_PKEY_3		0x027c
+#define	CRYPTO_PKEY_CHANNLE_NUM		8
+
+#define	CRYPTO_CH0_PC_LEN_0		0x0280
+#define	CRYPTO_CH0_PC_LEN_1		0x0284
+#define	CRYPTO_CH1_PC_LEN_0		0x0288
+#define	CRYPTO_CH1_PC_LEN_1		0x028c
+#define	CRYPTO_CH2_PC_LEN_0		0x0290
+#define	CRYPTO_CH2_PC_LEN_1		0x0294
+#define	CRYPTO_CH3_PC_LEN_0		0x0298
+#define	CRYPTO_CH3_PC_LEN_1		0x029c
+#define	CRYPTO_CH4_PC_LEN_0		0x02a0
+#define	CRYPTO_CH4_PC_LEN_1		0x02a4
+#define	CRYPTO_CH5_PC_LEN_0		0x02a8
+#define	CRYPTO_CH5_PC_LEN_1		0x02ac
+#define	CRYPTO_CH6_PC_LEN_0		0x02b0
+#define	CRYPTO_CH6_PC_LEN_1		0x02b4
+#define	CRYPTO_CH7_PC_LEN_0		0x02b8
+#define	CRYPTO_CH7_PC_LEN_1		0x02bc
+
+#define	CRYPTO_CH0_AAD_LEN_0		0x02c0
+#define	CRYPTO_CH0_AAD_LEN_1		0x02c4
+#define	CRYPTO_CH1_AAD_LEN_0		0x02c8
+#define	CRYPTO_CH1_AAD_LEN_1		0x02cc
+#define	CRYPTO_CH2_AAD_LEN_0		0x02d0
+#define	CRYPTO_CH2_AAD_LEN_1		0x02d4
+#define	CRYPTO_CH3_AAD_LEN_0		0x02d8
+#define	CRYPTO_CH3_AAD_LEN_1		0x02dc
+#define	CRYPTO_CH4_AAD_LEN_0		0x02e0
+#define	CRYPTO_CH4_AAD_LEN_1		0x02e4
+#define	CRYPTO_CH5_AAD_LEN_0		0x02e8
+#define	CRYPTO_CH5_AAD_LEN_1		0x02ec
+#define	CRYPTO_CH6_AAD_LEN_0		0x02f0
+#define	CRYPTO_CH6_AAD_LEN_1		0x02f4
+#define	CRYPTO_CH7_AAD_LEN_0		0x02f8
+#define	CRYPTO_CH7_AAD_LEN_1		0x02fc
+
+#define	CRYPTO_CH0_IV_LEN_0		0x0300
+#define	CRYPTO_CH1_IV_LEN_0		0x0304
+#define	CRYPTO_CH2_IV_LEN_0		0x0308
+#define	CRYPTO_CH3_IV_LEN_0		0x030c
+#define	CRYPTO_CH4_IV_LEN_0		0x0310
+#define	CRYPTO_CH5_IV_LEN_0		0x0314
+#define	CRYPTO_CH6_IV_LEN_0		0x0318
+#define	CRYPTO_CH7_IV_LEN_0		0x031c
+
+#define	CRYPTO_CH0_TAG_0		0x0320
+#define	CRYPTO_CH0_TAG_1		0x0324
+#define	CRYPTO_CH0_TAG_2		0x0328
+#define	CRYPTO_CH0_TAG_3		0x032c
+#define	CRYPTO_CH1_TAG_0		0x0330
+#define	CRYPTO_CH1_TAG_1		0x0334
+#define	CRYPTO_CH1_TAG_2		0x0338
+#define	CRYPTO_CH1_TAG_3		0x033c
+#define	CRYPTO_CH2_TAG_0		0x0340
+#define	CRYPTO_CH2_TAG_1		0x0344
+#define	CRYPTO_CH2_TAG_2		0x0348
+#define	CRYPTO_CH2_TAG_3		0x034c
+#define	CRYPTO_CH3_TAG_0		0x0350
+#define	CRYPTO_CH3_TAG_1		0x0354
+#define	CRYPTO_CH3_TAG_2		0x0358
+#define	CRYPTO_CH3_TAG_3		0x035c
+#define	CRYPTO_CH4_TAG_0		0x0360
+#define	CRYPTO_CH4_TAG_1		0x0364
+#define	CRYPTO_CH4_TAG_2		0x0368
+#define	CRYPTO_CH4_TAG_3		0x036c
+#define	CRYPTO_CH5_TAG_0		0x0370
+#define	CRYPTO_CH5_TAG_1		0x0374
+#define	CRYPTO_CH5_TAG_2		0x0378
+#define	CRYPTO_CH5_TAG_3		0x037c
+#define	CRYPTO_CH6_TAG_0		0x0380
+#define	CRYPTO_CH6_TAG_1		0x0384
+#define	CRYPTO_CH6_TAG_2		0x0388
+#define	CRYPTO_CH6_TAG_3		0x038c
+#define	CRYPTO_CH7_TAG_0		0x0390
+#define	CRYPTO_CH7_TAG_1		0x0394
+#define	CRYPTO_CH7_TAG_2		0x0398
+#define	CRYPTO_CH7_TAG_3		0x039c
+
+#define	CRYPTO_HASH_DOUT_0		0x03a0
+#define	CRYPTO_HASH_DOUT_1		0x03a4
+#define	CRYPTO_HASH_DOUT_2		0x03a8
+#define	CRYPTO_HASH_DOUT_3		0x03ac
+#define	CRYPTO_HASH_DOUT_4		0x03b0
+#define	CRYPTO_HASH_DOUT_5		0x03b4
+#define	CRYPTO_HASH_DOUT_6		0x03b8
+#define	CRYPTO_HASH_DOUT_7		0x03bc
+#define	CRYPTO_HASH_DOUT_8		0x03c0
+#define	CRYPTO_HASH_DOUT_9		0x03c4
+#define	CRYPTO_HASH_DOUT_10		0x03c8
+#define	CRYPTO_HASH_DOUT_11		0x03cc
+#define	CRYPTO_HASH_DOUT_12		0x03d0
+#define	CRYPTO_HASH_DOUT_13		0x03d4
+#define	CRYPTO_HASH_DOUT_14		0x03d8
+#define	CRYPTO_HASH_DOUT_15		0x03dc
+
+#define	CRYPTO_TAG_VALID		0x03e0
+#define	CRYPTO_CH7_TAG_VALID		_BIT(7)
+#define	CRYPTO_CH6_TAG_VALID		_BIT(6)
+#define	CRYPTO_CH5_TAG_VALID		_BIT(5)
+#define	CRYPTO_CH4_TAG_VALID		_BIT(4)
+#define	CRYPTO_CH3_TAG_VALID		_BIT(3)
+#define	CRYPTO_CH2_TAG_VALID		_BIT(2)
+#define	CRYPTO_CH1_TAG_VALID		_BIT(1)
+#define	CRYPTO_CH0_TAG_VALID		_BIT(0)
+
+#define	CRYPTO_HASH_VALID		0x03e4
+#define	CRYPTO_HASH_IS_VALID		_BIT(0)
+
+#define	CRYPTO_VERSION			0x03f0
+
+#define	CRYPTO_RNG_CTL			0x0400
+#define	CRYPTO_RNG_64_bit_len		_SBF(4,	0x00)
+#define	CRYPTO_RNG_128_bit_len		_SBF(4,	0x01)
+#define	CRYPTO_RNG_192_bit_len		_SBF(4,	0x02)
+#define	CRYPTO_RNG_256_bit_len		_SBF(4,	0x03)
+#define	CRYPTO_RNG_FATESY_SOC_RING	_SBF(2,	0x00)
+#define	CRYPTO_RNG_SLOWER_SOC_RING_0	_SBF(2,	0x01)
+#define	CRYPTO_RNG_SLOWER_SOC_RING_1	_SBF(2,	0x02)
+#define	CRYPTO_RNG_SLOWEST_SOC_RING	_SBF(2,	0x03)
+#define	CRYPTO_RNG_ENABLE		_BIT(1)
+#define	CRYPTO_RNG_START		_BIT(0)
+
+#define	CRYPTO_RNG_SAMPLE_CNT		0x0404
+#define	CRYPTO_RNG_DOUT_0		0x0410
+#define	CRYPTO_RNG_DOUT_1		0x0414
+#define	CRYPTO_RNG_DOUT_2		0x0418
+#define	CRYPTO_RNG_DOUT_3		0x041c
+#define	CRYPTO_RNG_DOUT_4		0x0420
+#define	CRYPTO_RNG_DOUT_5		0x0424
+#define	CRYPTO_RNG_DOUT_6		0x0428
+#define	CRYPTO_RNG_DOUT_7		0x042c
+
+#define	CRYPTO_RAM_CTL			0x0480
+#define	CRYPTO_RAM_PKA_RDY		_BIT(0)
+
+#define	CRYPTO_RAM_ST			0x0484
+#define	CRYPTO_CLK_RAM_RDY		_BIT(0)
+
+#define	CRYPTO_DEBUG_CTL		0x04a0
+#define	CRYPTO_DEBUG_MODE		_BIT(0)
+
+#define	CRYPTO_DEBUG_ST			0x04a4
+#define	CRYPTO_PKA_DEBUG_CLK_EN		_BIT(0)
+
+#define	CRYPTO_DEBUG_MONITOR		0x04a8
+
+#define	CRYPTO_MEMORY_MAP0		0x00800
+#define	CRYPTO_MEMORY_MAP1		0x00804
+#define	CRYPTO_MEMORY_MAP2		0x00808
+#define	CRYPTO_MEMORY_MAP3		0x0080C
+#define	CRYPTO_MEMORY_MAP4		0x00810
+#define	CRYPTO_MEMORY_MAP5		0x00814
+#define	CRYPTO_MEMORY_MAP6		0x00818
+#define	CRYPTO_MEMORY_MAP7		0x0081C
+#define	CRYPTO_MEMORY_MAP8		0x00820
+#define	CRYPTO_MEMORY_MAP9		0x00824
+#define	CRYPTO_MEMORY_MAP10		0x00828
+#define	CRYPTO_MEMORY_MAP11		0x0082C
+#define	CRYPTO_MEMORY_MAP12		0x00830
+#define	CRYPTO_MEMORY_MAP13		0x00834
+#define	CRYPTO_MEMORY_MAP14		0x00838
+#define	CRYPTO_MEMORY_MAP15		0x0083C
+#define	CRYPTO_MEMORY_MAP16		0x00840
+#define	CRYPTO_MEMORY_MAP17		0x00844
+#define	CRYPTO_MEMORY_MAP18		0x00848
+#define	CRYPTO_MEMORY_MAP19		0x0084C
+#define	CRYPTO_MEMORY_MAP20		0x00850
+#define	CRYPTO_MEMORY_MAP21		0x00854
+#define	CRYPTO_MEMORY_MAP22		0x00858
+#define	CRYPTO_MEMORY_MAP23		0x0085C
+#define	CRYPTO_MEMORY_MAP24		0x00860
+#define	CRYPTO_MEMORY_MAP25		0x00864
+#define	CRYPTO_MEMORY_MAP26		0x00868
+#define	CRYPTO_MEMORY_MAP27		0x0086C
+#define	CRYPTO_MEMORY_MAP28		0x00870
+#define	CRYPTO_MEMORY_MAP29		0x00874
+#define	CRYPTO_MEMORY_MAP30		0x00878
+#define	CRYPTO_MEMORY_MAP31		0x0087C
+
+#define	CRYPTO_OPCODE			0x00880
+#define	CRYPTO_OPCODE_REG_TAG_SHIFT	0
+#define	CRYPTO_OPCODE_TAG_MASK		0x0000003f
+#define	CRYPTO_OPCODE_REG_R_SHIFT	6
+#define	CRYPTO_OPCODE_REG_R_MASK	0x00000fc0
+#define	CRYPTO_OPCODE_REG_B_SHIFT	12
+#define	CRYPTO_OPCODE_REG_B_MASK	0x0003f000
+#define	CRYPTO_OPCODE_REG_A_SHIFT	18
+#define	CRYPTO_OPCODE_REG_A_MASK	0x00fc0000
+#define	CRYPTO_OPCODE_LEN_SHIFT		24
+#define	CRYPTO_OPCODE_LEN_MASK		0x03000000
+#define	CRYPTO_OPCODE_CODE_SHIFT	27
+#define	CRYPTO_OPCODE_CODE_MASK		0xfc000000
+
+#define	CRYPTO_N_NP_T0_T1_ADDR		0x00884
+#define	CRYPTO_N_VIRTUAL_ADDR_SHIFT	0
+#define	CRYPTO_N_VIRTUAL_ADDR_MASK	0x0000001f
+#define	CRYPTO_NP_VIRTUAL_ADDR_SHIFT	5
+#define	CRYPTO_NP_VIRTUAL_ADDR_MASK	0x000003e0
+#define	CRYPTO_T0_VIRTUAL_ADDR_SHIFT	10
+#define	CRYPTO_T0_VIRTUAL_ADDR_MASK	0x00007c00
+#define	CRYPTO_T1_VIRTUAL_ADDR_SHIFT	15
+#define	CRYPTO_T1_VIRTUAL_ADDR_MASK	0x000f8000
+
+#define	CRYPTO_PKA_STATUS		0x00888
+#define	CRYPTO_PKA_PIPE_IS_RDY		_BIT(0)
+#define	CRYPTO_PKA_BUSY				_BIT(1)
+#define	CRYPTO_PKA_ALU_OUT_ZERO		_BIT(2)
+#define	CRYPTO_PKA_ALU_MODOVRFLW	_BIT(3)
+#define	CRYPTO_PKA_DIV_BY_ZERO		_BIT(4)
+#define	CRYPTO_PKA_ALU_CARRY		_BIT(5)
+#define	CRYPTO_PKA_ALU_SIGN_OUT		_BIT(6)
+#define	CRYPTO_PKA_MODINV_OF_ZERO	_BIT(7)
+#define	CRYPTO_PKA_CPU_BUSY		_BIT(8)
+#define	CRYPTO_PKA_OPCODE_STATUS_SHIFT	9
+#define	CRYPTO_PKA_OPCODE_STATUS_MASK	0x00003e00
+#define	CRYPTO_PKA_TAG_STATUS_SHIFT	14
+#define	CRYPTO_PKA_TAG_STATUS_MASK	0x0003c000
+
+#define	CRYPTO_PKA_SW_RESET		0x0088C
+#define	CRYPTO_PKA_L0			0x00890
+#define	CRYPTO_PKA_L1			0x00894
+#define	CRYPTO_PKA_L2			0x00898
+#define	CRYPTO_PKA_L3			0x0089C
+#define	CRYPTO_PKA_L4			0x008A0
+#define	CRYPTO_PKA_L5			0x008A4
+#define	CRYPTO_PKA_L6			0x008A8
+#define	CRYPTO_PKA_L7			0x008AC
+#define	CRYPTO_PKA_PIPE_RDY		0x008B0
+#define	CRYPTO_PKA_DONE			0x008B4
+#define	CRYPTO_PKA_MON_SELECT		0x008B8
+#define	CRYPTO_PKA_DEBUG_REG_EN		0x008BC
+#define	CRYPTO_DEBUG_CNT_ADDR		0x008C0
+#define	CRYPTO_DEBUG_EXT_ADDR		0x008C4
+#define	CRYPTO_PKA_DEBUG_HALT		0x008C8
+#define	CRYPTO_PKA_MON_READ		0x008D0
+#define	CRYPTO_PKA_INT_ENA		0x008D4
+#define	CRYPTO_PKA_INT_ST		0x008D8
+#define	CRYPTO_SRAM_ADDR		0x01000
+#define	CRYPTO_SRAM_BASE		0x1000
+
+#define	LLI_DMA_CTRL_LAST		_BIT(0)
+#define	LLI_DMA_CTRL_PAUSE		_BIT(1)
+#define	LLI_DMA_CTRL_LIST_DONE		_BIT(8)
+#define	LLI_DMA_CTRL_DST_DONE		_BIT(9)
+#define	LLI_DMA_CTRL_SRC_DONE		_BIT(10)
+
+#define LLI_USER_CPIHER_START		_BIT(0)
+#define LLI_USER_STRING_START		_BIT(1)
+#define LLI_USER_STRING_LAST		_BIT(2)
+#define LLI_USER_STRING_ADA		_BIT(3)
+#define LLI_USER_PRIVACY_KEY		_BIT(7)
+#define LLI_USER_ROOT_KEY		_BIT(8)
+
+enum endian_mode {
+	BIG_ENDIAN = 0,
+	LITTLE_ENDIAN
+};
+
+enum clk_type {
+	CLK = 0,
+	HCLK
+};
+
+struct crypto_lli_desc {
+	u32 src_addr;
+	u32 src_len;
+	u32 dst_addr;
+	u32 dst_len;
+	u32 user_define;
+	u32 reserve;
+	u32 dma_ctrl;
+	u32 next_addr;
+};
+
+struct rk_hash_ctx {
+	const	u8 *null_hash;	/* when hash is null or length is zero */
+	void	*cur_data_lli;	/* to recored the lli that not computed	*/
+	void	*free_data_lli;	/* free lli that can use for next lli */
+	void	*vir_src_addr;	/* virt addr for hash src data*/
+	u32	magic;		/* to check whether the ctx is correct */
+	u32	algo;		/* hash algo */
+	u32	digest_size;	/* hash out length according to hash algo*/
+	u32	dma_started;	/* choose use start or restart */
+};
+
+#define	RK_HASH_CTX_MAGIC		0x1A1A1A1A
+
+extern fdt_addr_t crypto_base;
+
+static inline u32 crypto_read(u32 offset)
+{
+	return readl(crypto_base + offset);
+}
+
+static inline void crypto_write(u32 val, u32 offset)
+{
+	writel(val, crypto_base + offset);
+}
+
+#endif
diff --git a/include/rockchip/crypto_v2_pka.h b/include/rockchip/crypto_v2_pka.h
new file mode 100644
index 0000000000..84652bd037
--- /dev/null
+++ b/include/rockchip/crypto_v2_pka.h
@@ -0,0 +1,553 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V2_PKA_H_
+#define _ROCKCHIP_CRYPTO_V2_PKA_H_
+#include <common.h>
+#include <rockchip/crypto_v2.h>
+#include <rockchip/crypto_v2_util.h>
+
+#define CRYPTO_BASE crypto_base
+
+struct mpa_num {
+	u32 alloc;
+	s32 size;
+	u32 *d;
+};
+
+#define RK_MAX_RSA_NBITS	4096
+#define RK_MAX_RSA_NCHARS	((RK_MAX_RSA_NBITS) / 8)
+#define RK_MAX_RSA_BWORDS	((RK_MAX_RSA_NBITS) / 32)
+
+/* define NpCreateFlag values */
+#define RK_PKA_CREATE_NP		1
+#define RK_PKA_SET_NP		0
+/* size of buffer for Barrett modulus tag NP, used in PKI algorithms */
+#define RK_PKA_BARRETT_IN_WORDS	5
+/* Barrett modulus tag type - 5 words size array */
+typedef u32 RK_PKA_NP_t[RK_PKA_BARRETT_IN_WORDS];
+
+#define RK_PKA_MemSetZero(buf, size) \
+			util_word_memset((void *)buf, 0x00, size)
+
+#define RK_PKA_FastMemCpy(dst, src, size) \
+			util_word_memcpy((void *)dst, (void *)src, size)
+
+#define RK_PKA_ReverseMemcpy(dst, src, size) \
+			util_reverse_word_memcpy((void *)dst, (void *)src, size)
+
+#define RES_DISCARD 0x3F
+
+/* base address -  0x00F10B00 */
+#define RK_PKI_ERROR_BASE			0x00F10B00
+#define RK_PKI_HW_VER_INCORRECT_ERROR		(RK_PKI_ERROR_BASE + 0x0UL)
+#define RK_PKI_HW_DECRYPED_ERROR		(RK_PKI_ERROR_BASE + 0x1UL)
+#define RK_PKI_KEY_SIZE_ERROR			(RK_PKI_ERROR_BASE + 0x2UL)
+
+/* Error definitions for PKA using */
+#define RK_PKA_ILLEGAL_PTR_ERROR		(RK_PKI_ERROR_BASE + 0x20UL)
+#define RK_PKA_ENTRIES_COUNT_ERROR		(RK_PKI_ERROR_BASE + 0x21UL)
+#define RK_PKA_REGISTER_SIZES_ERROR		(RK_PKI_ERROR_BASE + 0x22UL)
+#define RK_PKA_SET_MAP_MODE_ERROR		(RK_PKI_ERROR_BASE + 0x23UL)
+
+#define RK_PKA_DIVIDER_IS_NULL_ERROR		(RK_PKI_ERROR_BASE + 0x2EUL)
+#define RK_PKA_MODULUS_IS_NULL_ERROR		(RK_PKI_ERROR_BASE + 0x2FUL)
+#define RK_PKA_DATA_SIZE_ERROR			(RK_PKI_ERROR_BASE + 0x30UL)
+#define RK_PKA_OPERATION_SIZE_ERROR		(RK_PKI_ERROR_BASE + 0x31UL)
+
+#define RK_PKA_MAX_REGS_COUNT			8
+#define RK_PKA_MAX_PHYS_MEM_REGS_COUNT		32
+#define RK_PKA_MAX_REGS_MEM_SIZE_BYTES		4096
+
+/* PKA control values  */
+#define RK_PKA_PIPE_READY			1
+#define RK_PKA_OP_DONE				1
+#define RK_PKA_SW_REST				1
+
+/* PKA N_NP_T0_T1 register fields positions (low bit position) */
+#define RK_PKA_N_NP_T0_T1_REG_N_POS		CRYPTO_N_VIRTUAL_ADDR_SHIFT
+#define RK_PKA_N_NP_T0_T1_REG_NP_POS		CRYPTO_NP_VIRTUAL_ADDR_SHIFT
+#define RK_PKA_N_NP_T0_T1_REG_T0_POS		CRYPTO_T0_VIRTUAL_ADDR_SHIFT
+#define RK_PKA_N_NP_T0_T1_REG_T1_POS		CRYPTO_T1_VIRTUAL_ADDR_SHIFT
+
+/* PKA N_NP_T0_T1 register default (reset) value: N=0, NP=1, T0=30, T1=31 */
+#define PKA_N					0UL
+#define PKA_NP					1UL
+#define PKA_T0					30UL
+#define PKA_T1					31UL
+#define RK_PKA_N_NP_T0_T1_REG_DEFAULT_VAL \
+				(PKA_N  << RK_PKA_N_NP_T0_T1_REG_N_POS | \
+				PKA_NP << RK_PKA_N_NP_T0_T1_REG_NP_POS | \
+				PKA_T0 << RK_PKA_N_NP_T0_T1_REG_T0_POS | \
+				PKA_T1 << RK_PKA_N_NP_T0_T1_REG_T1_POS)
+
+/* PKA STATUS register fields positions (low bit position) */
+#define RK_PKA_STATUS_PIPE_IS_REDY_POS		0
+#define RK_PKA_STATUS_PKA_BUSY_POS		1
+#define RK_PKA_STATUS_ALU_OUT_ZERO_POS		2
+#define RK_PKA_STATUS_ALU_MODOVRFLW_POS		3
+#define RK_PKA_STATUS_DIV_BY_ZERO_POS		4
+#define RK_PKA_STATUS_ALU_CARRY_POS		5
+#define RK_PKA_STATUS_ALU_SIGN_OUT_POS		6
+#define RK_PKA_STATUS_MODINV_OF_ZERO_POS	7
+#define RK_PKA_STATUS_PKA_CPU_BUSY_POS		8
+#define RK_PKA_STATUS_OPCODE_POS		9
+#define RK_PKA_STATUS_TAG_POS			14
+
+#define RK_PKA_STATUS_OPCODE_MASK		0x1FUl
+#define RK_PKA_STATUS_TAG_MASK			0x3FUl
+
+/* PKA OPCODE register fields positions (low bit position) */
+#define RK_PKA_OPCODE_TAG_POS			0
+#define RK_PKA_OPCODE_RESULT_POS		6
+#define RK_PKA_OPCODE_R_DISCARD_POS		11
+#define RK_PKA_OPCODE_OPERAND_2_POS		12
+#define RK_PKA_OPCODE_OPERAND_2_IMMED_POS	17
+#define RK_PKA_OPCODE_OPERAND_1_POS		18
+#define RK_PKA_OPCODE_OPERAND_1_IMMED_POS	23
+#define RK_PKA_OPCODE_LEN_POS			24
+#define RK_PKA_OPCODE_OPERATION_ID_POS		27
+
+/* PKA data registers base address
+ *should be always zero since it's the offset
+ * from the start of the PKA memory and not from the HOST memory
+ */
+#define RK_PKA_DATA_REGS_BASE_ADDR		(CRYPTO_BASE + CRYPTO_SRAM_BASE)
+#define RK_PKA_DATA_REGS_MEMORY_OFFSET_ADDR	(CRYPTO_BASE + CRYPTO_SRAM_BASE)
+
+/* Machine Opcodes definitions (according to HW CRS ) */
+#define   RK_PKA_MIN_OPCODE			0x00
+
+#define PKA_Add					0x04
+#define PKA_AddIm				0x04
+#define PKA_Sub					0x05
+#define PKA_SubIm				0x05
+#define PKA_Neg					0x05
+#define PKA_ModAdd				0x06
+#define PKA_ModAddIm				0x06
+#define PKA_ModSub				0x07
+#define PKA_ModSubIm				0x07
+#define PKA_ModNeg				0x07
+#define PKA_AND					0x08
+#define PKA_Test0				0x08
+#define PKA_Clr0				0x08
+#define PKA_Clr					0x08
+#define PKA_OR					0x09
+#define PKA_Copy				0x09
+#define PKA_SetBit0				0x09
+#define PKA_XOR					0x0A
+#define PKA_Flip0				0x0A
+#define PKA_InvertBits				0x0A
+#define PKA_Compare				0x0A
+#define PKA_SHR0				0x0C
+#define PKA_SHR1				0x0D
+#define PKA_SHL0				0x0E
+#define PKA_SHL1				0x0F
+#define PKA_LMul				0x10
+#define PKA_ModMul				0x11
+#define PKA_ModMulNR				0x12
+#define PKA_ModExp				0x13
+#define PKA_Div					0x14
+#define PKA_ModInv				0x15
+#define PKA_ModDiv				0x16
+#define PKA_HMul				0x17
+#define PKA_Terminate				0x00
+
+#define RK_PKA_MAX_OPCODE			0x17
+
+/*************************************************************/
+/* Macros for waiting PKA machine ready states               */
+/*************************************************************/
+
+void rk_pka_ram_ctrl_enable(void);
+
+void rk_pka_ram_ctrl_disable(void);
+
+void rk_pka_wait_on_ram_ready(void);
+
+void rk_pka_wait_on_pipe_ready(void);
+
+void rk_pka_wait_on_done(void);
+
+/*****************************************************
+ *  Macros for controlling PKA machine and changing  *
+ *  PKA sizes table and mapping table settings.      *
+ *****************************************************/
+#define PKA_CLK_ENABLE()
+
+#define PKA_CLK_DISABLE()
+
+void rk_pka_set_startmemaddr_reg(u32 start_mem_addr);
+
+void rk_pka_set_N_NP_T0_T1_reg(u32 N, u32 NP, u32 T0, u32 T1);
+
+void rk_pka_set_default_N_NP_T0_T1_reg(void);
+
+void rk_pka_get_status(u32 *status);
+
+void rk_pka_get_status_alu_outzero(u32 *status);
+
+void rk_pka_get_status_mod_overfl(u32 *status);
+
+void rk_pka_get_status_div_byzero(u32 *status);
+
+void rk_pka_get_status_carry(u32 *status);
+
+void rk_pka_get_status_alu_signout(u32 *status);
+
+void rk_pka_get_status_modinv_ofzero(u32 *status);
+
+void rk_pka_get_status_opcode(u32 *status);
+
+void rk_pka_get_status_tag(u32 *status);
+
+/******************************************************************
+ * Macros for setting and reading sizes from PKA regsSizesTable   *
+ ******************************************************************/
+void rk_pka_set_regsize(u32 size_bits, u32 entry_num);
+
+void rk_pka_read_regsize(u32 *size_bits, u32 entry_num);
+
+/******************************************************************
+ * Macros for setting and reading addresses of PKA data registers *
+ ******************************************************************/
+void rk_pka_set_regaddr(u32 vir_reg, u32 phys_addr);
+
+void rk_pka_get_regaddr(u32 vir_reg, u32 *phys_addr);
+
+void rk_pka_read_regaddr(u32 vir_reg, u32 *phys_addr);
+
+/**********************************************
+ *    Macros for setting Full PKI opcode      *
+ **********************************************/
+u32 rk_pka_make_full_opcode(u32 opcode, u32 len_id,
+			    u32 is_a_immed, u32 op_a,
+			    u32 is_b_immed, u32 op_b,
+			    u32 res_discard, u32 res,
+			    u32 tag);
+
+/******************************************************
+ * Macros for reading and loading PKA memory data     *
+ ******************************************************/
+void rk_pka_hw_load_value2pka_mem(u32 addr, u32 val);
+
+void rk_pka_hw_load_block2pka_mem(u32 addr, u32 *ptr,
+				  u32 size_words);
+
+void rk_pka_hw_reverse_load_block2pka_mem(u32 addr, u32 *ptr,
+					  u32 size_words);
+
+void rk_pka_hw_clear_pka_mem(u32 addr, u32 size_words);
+
+void rk_pka_hw_read_value_from_pka_mem(u32 addr, u32 *val);
+
+void rk_pka_hw_read_block_from_pka_mem(u32 addr, u32 *ptr,
+				       u32 size_words);
+
+void rk_pka_hw_reverse_read_block_from_pka_mem(u32 addr, u32 *ptr,
+					       u32 size_words);
+
+u32 rk_pka_exec_operation(u32 opcode, u8 len_id,
+			  u8 is_a_immed, s8 op_a,
+			  u8 is_b_immed, s8 op_b,
+			  u8	res_discard, s8 res, u8 tag);
+
+/*************************************************************************
+ * Macros for calling PKA operations (names according to operation issue *
+ *************************************************************************/
+
+/*--------------------------------------*/
+/*	 1.  ADD - SUBTRACT operations	*/
+/*--------------------------------------*/
+/*	Add:   res =  op_a + op_b	*/
+#define   RK_PKA_Add(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Add, (len_id), 0, (op_a),\
+					      0, (op_b), 0, (res), (tag))
+
+/*	AddIm:	res =  op_a + op_b_im	*/
+#define   RK_PKA_AddIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_Add, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	Sub:  res =  op_a - op_b	*/
+#define   RK_PKA_Sub(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Sub, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	SubIm:	res =  op_a - op_b_im	*/
+#define   RK_PKA_SubIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_Sub, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	Neg:  res =  0 - op_b  */
+#define   RK_PKA_Neg(len_id, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Sub, (len_id), 1, 0, \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModAdd:  res =	(op_a + op_b) mod N  */
+#define   RK_PKA_ModAdd(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModAdd, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModAddIm:  res =  (op_a + op_b_im) mod N  */
+#define   RK_PKA_ModAddIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_ModAdd, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	ModSub:  res =	(op_a - op_b) mod N  */
+#define   RK_PKA_ModSub(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModSub, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModSubIm:  res =  (op_a - op_b_im) mod N  */
+#define   RK_PKA_ModSubIm(len_id, op_a, op_b_im, res, tag)   \
+			rk_pka_exec_operation(PKA_ModSub, (len_id), 0, (op_a), \
+					      1, (op_b_im), 0, (res), (tag))
+
+/*	ModNeg:  res =	(0 - op_b) mod N  */
+#define   RK_PKA_ModNeg(len_id, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModSub, (len_id), 1, 0, \
+					      0, (op_b), 0, (res), (tag))
+
+/*--------------------------------------*/
+/*	 2.  Logical   operations	*/
+/*--------------------------------------*/
+
+/*	AND:  res =  op_a & op_b	*/
+#define   RK_PKA_AND(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	AndIm:	res =  op_a & op_b  */
+#define   RK_PKA_AndIm(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, (op_b), 0, (res), (tag))
+
+/*	Tst0:  op_a & 0x1 - tests the bit 0 of operand A. */
+/*	If bit0 = 0, then ZeroOfStatus = 1, else 0  */
+#define   RK_PKA_Tst0(len_id, op_a, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, 0x01, 1, RES_DISCARD, (tag))
+
+/*	Clr0:  res =  op_a & (-2)  - clears the bit 0 of operand A. */
+/*	Note:  -2 = 0x1E  for 5-bit size */
+#define   RK_PKA_Clr0(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, 0x1E, 0, (res), (tag))
+
+/*	Clr:  res =  op_a & 0  - clears the operand A.  */
+#define   RK_PKA_Clr(len_id, op_a, tag)   \
+			rk_pka_exec_operation(PKA_AND, (len_id), 0, (op_a), \
+					      1, 0x00, 0, (op_a), (tag))
+
+/*	Clear:	for full clearing the actual register op_a,
+ *	this macro calls Clr operation twice.
+ */
+#define   RK_PKA_Clear(len_id, op_a, tag)   \
+		       RK_PKA_Clr(len_id, op_a, tag)
+
+/*	OR:  res =	op_a || op_b	*/
+#define   RK_PKA_OR(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	OrIm:  res =  op_a || op_b  */
+#define   RK_PKA_OrIm(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_a), \
+					      1, (op_b), 0, (res), (tag))
+
+/*	Copy:  OpDest =  OpSrc || 0  */
+#define   RK_PKA_Copy(len_id, op_dest, op_src, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_src), \
+					      1, 0x00, 0, (op_dest), (tag))
+
+/*	Set0:  res =  op_a || 1	: set bit0 = 1, other bits are not changed */
+#define   RK_PKA_Set0(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_OR, (len_id), 0, (op_a), \
+					      1, 0x01, 0, (res), (tag))
+
+/*	Xor:  res =  op_a ^ op_b	*/
+#define   RK_PKA_Xor(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	XorIm:	res =  op_a ^ op_b  */
+#define   RK_PKA_XorIm(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, (op_b), 0, (res), (tag))
+
+/*	Flip0:	res =  op_a || 1  - inverts the bit 0 of operand A  */
+#define   RK_PKA_Flip0(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, 0x01, 0, (res), (tag))
+
+/*	Invert:  res =	op_a ^ 0xFFF.FF	:  inverts all bits of op_a . */
+/* Note: 0xFFFFF =  0x1F for 5 bits size of second operand */
+#define   RK_PKA_Invert(len_id, op_a, res, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, 0x1F, 0, (res), (tag))
+
+/*	Compare:  op_a ^ op_b . Rsult of compare in ZeroBitOfStatus: */
+/*	If op_a == op_b then Z = 1 */
+#define   RK_PKA_Compare(len_id, op_a, op_b, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      0, (op_b), 1, (0), (tag))
+
+/*	CompareImmediate:  op_a ^ op_b . Rsult of compare in ZeroBitOfStatus: */
+/*	If op_a == op_b then status Z = 1 */
+#define   RK_PKA_CompareIm(len_id, op_a, op_b, tag)   \
+			rk_pka_exec_operation(PKA_XOR, (len_id), 0, (op_a), \
+					      1, (op_b), 1, (0), (tag))
+
+/*----------------------------------------------*/
+/*	 3.  SHIFT	  operations		*/
+/*----------------------------------------------*/
+
+/*	SHR0:  res =  op_a >> (S+1) :
+ *	shifts right operand A by S+1 bits, insert 0 to left most bits
+ */
+#define   RK_PKA_SHR0(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHR0, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*	SHR1:  res =  op_a >> (S+1) :
+ *	shifts right operand A by S+1 bits, insert 1 to left most bits
+ */
+#define   RK_PKA_SHR1(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHR1, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*	SHL0:  res =  op_a << (S+1) :
+ *	shifts left operand A by S+1 bits, insert 0 to right most bits
+ */
+#define   RK_PKA_SHL0(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHL0, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*	SHL1:  res =  op_a << (S+1) :
+ *	shifts left operand A by S+1 bits, insert 1 to right most bits
+ */
+#define   RK_PKA_SHL1(len_id, op_a, S, res, tag)   \
+			rk_pka_exec_operation(PKA_SHL1, (len_id), 0, (op_a), \
+					      0, (S), 0, (res), (tag))
+
+/*--------------------------------------------------------------*/
+/*	 2.  Multiplication and other	operations		*/
+/*		 Note:	See notes to RK_PKAExecOperation	*/
+/*--------------------------------------------------------------*/
+
+/*	RMul:  res =  LowHalfOf(op_a * op_b), where size of operands and result
+ *	is equaled to operation size, defined by len_id. Note: for receiving
+ *	full result, the len_id must be set according to (sizeA + sizeB) and
+ *	leading not significant bits of operands must be zeroed
+ */
+#define   RK_PKA_LMul(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_LMul, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	HMul:  res =  HighHalfOf(op_a * op_b) + one high word of low half of
+ *	(op_a * op_b), where size of operands is equaled to operation size,
+ *	defined by len_id. Note: Size of operation result is by one word large,
+ *	than operation size
+ */
+#define   RK_PKA_HMul(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_HMul, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModMul:  res =	op_a * op_b  mod N - modular multiplication */
+#define   RK_PKA_ModMul(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModMul, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModMulN:  res =  op_a * op_b	mod N
+ *	- modular multiplication (final reduction is omitted)
+ */
+#define   RK_PKA_ModMulN(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModMulNR, (len_id), 0, \
+					      (op_a), 0, (op_b), 0, \
+					      (res), (tag))
+
+/*	ModExp:  res =	op_a ** op_b	mod N - modular exponentiation */
+#define   RK_PKA_ModExp(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModExp, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	Divide:  res =	op_a / op_b , op_a = op_a mod op_b - division,  */
+#define   RK_PKA_Div(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_Div, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	ModInv:  Modular inversion: calculates	 res = 1/op_b mod N	*/
+#define   RK_PKA_ModInv(len_id, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModInv, (len_id), 0, 1, \
+					      0, (op_b), 0, (res), (tag))
+#define   RK_PKA_ModDiv(len_id, op_a, op_b, res, tag)   \
+			rk_pka_exec_operation(PKA_ModDiv, (len_id), 0, (op_a), \
+					      0, (op_b), 0, (res), (tag))
+
+/*	Terminate  - special operation, which allows HOST access */
+/*	to PKA data memory registers after end of PKA operations */
+#define   RK_PKA_Terminate(tag)   \
+			rk_pka_exec_operation(PKA_Terminate, 0, 0, 0, 0, \
+					      0, 0, 0, (tag))
+
+struct rk_pka_regs_map {
+	u32 reges_num[RK_PKA_MAX_PHYS_MEM_REGS_COUNT];
+	u32 regs_addr[RK_PKA_MAX_PHYS_MEM_REGS_COUNT];
+};
+
+u32 rk_pka_set_sizes_tab(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT],
+			 u32 count_of_sizes,
+			 u32 max_size_bits,
+			 u32 is_default_map);
+
+#define RK_PKA_DefaultSetRegsSizesTab(max_size_bits) \
+			rk_pka_set_sizes_tab(0, 0, (max_size_bits), 1)
+u32 rk_pka_set_map_tab(struct rk_pka_regs_map *regs_map_ptr, u32 *count_of_regs,
+		       u32 maxsize_words, u32 N_NP_T0_T1,
+		       u32 is_default_map);
+
+#define RK_PKA_DefaultSetRegsMapTab(maxsize_words, count_of_regs) \
+			rk_pka_set_map_tab(NULL, (count_of_regs), \
+					   (maxsize_words), 0, 1)
+
+u32 rk_pka_clear_block_of_regs(u8 first_reg, u8 count_of_regs, u8 len_id);
+
+u32 rk_pka_init(u32 regs_sizes_ptr[RK_PKA_MAX_REGS_COUNT],
+		u32 count_of_sizes,
+		struct rk_pka_regs_map *regs_map_ptr,
+		u32 count_of_regs,
+		u32 op_size_bits,
+		u32 regsize_words,
+		u32 N_NP_T0_T1,
+		u32 is_default_map);
+#define RK_PKA_DefaultInitPKA(max_size_bits, regsize_words) \
+			rk_pka_init(0, 0, 0, 0, (max_size_bits), \
+				    (regsize_words), 0, 1)
+
+void rk_pka_finish(void);
+u32 rk_pka_calcNp_and_initmodop(u32 len_id, u32 mod_size_bits,
+				s8 r_t0, s8 r_t1, s8 r_t2);
+
+u32 rk_pka_div_long_num(u8 len_id, s8 op_a, u32 s, s8 op_b,
+			s8 res, s8 r_t1, s8 r_t2);
+
+u32 rk_calcNp_and_initmodop(u32 *N_ptr, u32 N_size_bits,
+			    u32 *NP_ptr, u8 np_create_flag,
+			    s8 r_t0, s8 r_t1, s8 r_t2);
+
+void rk_pka_copy_data_into_reg(s8 dst_reg, u8 len_id, u32 *src_ptr,
+			       u32 size_words);
+void rk_pka_copy_data_from_reg(u32 *dst_ptr, u32  size_words,
+			       s8 src_reg);
+int test_rk3326_rsa(void);
+int rk_mpa_alloc(struct mpa_num **mpa);
+void rk_mpa_free(struct mpa_num **mpa);
+int rk_abs_add(void *a, void *b, void *c);
+int rk_mod(void *a, void *b, void *c);
+int rk_exptmod(void *a, void *b, void *c, void *d);
+int rk_exptmod_np(void *m, void *e, void *n, void *np, void *d);
+
+#endif
diff --git a/include/rockchip/crypto_v2_util.h b/include/rockchip/crypto_v2_util.h
new file mode 100644
index 0000000000..7edeb04272
--- /dev/null
+++ b/include/rockchip/crypto_v2_util.h
@@ -0,0 +1,135 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V2_UTIL_H_
+#define _ROCKCHIP_CRYPTO_V2_UTIL_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/************************ Defines ******************************/
+
+/* invers the bytes on a word- used for output from HASH */
+#ifdef BIG__ENDIAN
+#define UTIL_INVERSE_UINT32_BYTES(val)	(val)
+#else
+#define UTIL_INVERSE_UINT32_BYTES(val) \
+	(((val) >> 24) | (((val) & 0x00FF0000) >> 8) | \
+	(((val) & 0x0000FF00) << 8) | (((val) & 0x000000FF) << 24))
+#endif
+
+/* invers the bytes on a word - used for input data for HASH */
+#ifdef BIG__ENDIAN
+#define UTIL_REVERT_UINT32_BYTES(val) \
+	(((val) >> 24) | (((val) & 0x00FF0000) >> 8) | \
+	(((val) & 0x0000FF00) << 8) | (((val) & 0x000000FF) << 24))
+#else
+#define UTIL_REVERT_UINT32_BYTES(val)	(val)
+#endif
+
+/* the minimum and maximum macros */
+#undef min
+#define min(a, b) (((a) < (b)) ? (a) : (b))
+
+#undef max
+#define max(a, b) (((a) > (b)) ? (a) : (b))
+
+/* MACRO to count one bits */
+#define COUNT_ONE_BITS(number, bit_count) \
+do { \
+	u32 tmp_num = number; \
+	bit_count = 0; \
+	while (tmp_num) { \
+		tmp_num = tmp_num & (tmp_num - 1); \
+	bit_count = bit_count + 1; \
+	} \
+} while (0)
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed words copy on a specified buffer.
+ *
+ *        on a 6 words byffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] size    - The counter size in words.
+ *
+ */
+void util_reverse_words_buff(u32 *buff_ptr, u32 size_words);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reversed byte copy on a specified buffer.
+ *
+ *        on a 6 byte byffer:
+ *
+ *        buff[5] <---> buff[0]
+ *        buff[4] <---> buff[1]
+ *        buff[3] <---> buff[2]
+ *
+ * @param[in] dst_ptr - The counter buffer.
+ * @param[in] src_ptr - The counter size in bytes.
+ *
+ */
+void util_reverse_buff(u8 *buff_ptr, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory copy between 2 buffers.
+ *
+ * @param[in] dst_ptr - The first counter buffer.
+ * @param[in] src_ptr - The second counter buffer.
+ * @param[in] size    - The counter size in words.
+ *
+ */
+void util_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a memory set operation on a buffer.
+ *
+ * @param[in] buff_ptr - the buffer.
+ * @param[in] val		- The value to set the buffer.
+ * @param[in] size		- the buffers size in words.
+ *
+ */
+void util_word_memset(u32 *buff_ptr, u32 val, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer
+ *	  to another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in words.
+ *
+ */
+void util_reverse_word_memcpy(u32 *dst_ptr, u32 *src_ptr, u32 size);
+
+/* ------------------------------------------------------------
+ **
+ * @brief This function executes a reverse bytes copying from one buffer
+ *	  to another buffer.
+ *
+ * @param[in] dst_ptr - The pointer to destination buffer.
+ * @param[in] src_ptr - The pointer to source buffer.
+ * @param[in] size    - The size in bytes.
+ *
+ */
+void util_reverse_memcpy(u8 *dst_ptr, const u8 *src_ptr, u32 size);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+

commit f8681eaa25c6e2d36b10b30723a7ccff818b4175
Author: Lin Jinhan <troy.lin@rock-chips.com>
Date:   Tue May 21 15:08:21 2019 +0800

    rockchip: dts: px30: add and enable crypto node
    
    Change-Id: Ie8945a1e693e4673ea8863ef5a579e730c32ba66
    Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index ae3e4f973a..fe208f29db 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -45,6 +45,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &pmucru {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index b2ef14584f..e7c864d128 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -279,6 +279,15 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff0b0000 {
+		compatible = "rockchip,px30-crypto";
+		reg = <0x0 0xff0b0000 0x0 0x4000>;
+		clock-names = "sclk_crypto", "apkclk_crypto";
+		clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>;
+		clock-frequency = <200000000>, <300000000>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@ff131000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index 6427423c0e..acc51eccb9 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -430,3 +430,7 @@
 &uart2 {
 	status = "okay";
 };
+
+&crypto {
+	status = "okay";
+};

commit b07f31ddba1c0de6b15dac4057d2ff3ece48107d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 4 14:40:24 2019 +0800

    core: dump: add "*" for node from U-Boot dtb
    
    This is useful for debugging.
    
    Change-Id: If6a6e29053c1519ec40ccbcb183e35ffd81c64e8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 1cc929203b..89162641f2 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -34,7 +34,8 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 		}
 	}
 
-	printf("%s\n", dev->name);
+	printf("%s %s\n", dev->name,
+	       dev_read_bool(dev, "u-boot,dm-pre-reloc") ? "*" : "");
 
 	list_for_each_entry(child, &dev->child_head, sibling_node) {
 		is_last = list_is_last(&child->sibling_node, &dev->child_head);

commit 054229abb7911ae7a8b16bb31f9047cf96a3a21e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 14 16:10:02 2019 +0800

    mtd: support mtd block model
    
    Attach the mtd driver to block device, then we can call common interface
    (blk_dread & blk_dwrite) to operate storage in application layer.
    
    Usage:
    Open CONFIG_MTD_BLK & CONFIG_MTD.
    
    Change-Id: I47a969322e2d20c12d46898bdc88f4104e1a15bf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f258206e88..3400d1d922 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -28,7 +28,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_SPINAND]	= "spinand",
 	[IF_TYPE_SPINOR]	= "spinor",
 	[IF_TYPE_RAMDISK]	= "ramdisk",
-
+	[IF_TYPE_MTD]		= "mtd",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -46,6 +46,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_SPINAND]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_SPINOR]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_RAMDISK]	= UCLASS_RAMDISK,
+	[IF_TYPE_MTD]		= UCLASS_MTD,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 19579801d2..658197a864 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -8,6 +8,12 @@ config MTD
 	  flash, RAM and similar chips, often used for solid state file
 	  systems on embedded devices.
 
+config MTD_BLK
+	bool "Enable mtd block model for MTD drivers"
+	depends on MTD
+	help
+	  Enable mtd block model for Memory Technology Devices (MTD).
+
 config MTD_NOR_FLASH
 	bool "Enable parallel NOR flash support"
 	help
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 20c0d0af44..3a3b54bdd1 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -9,6 +9,7 @@ ifneq (,$(findstring y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAN
 obj-y += mtdcore.o mtd_uboot.o
 endif
 obj-$(CONFIG_MTD) += mtd-uclass.o
+obj-$(CONFIG_MTD_BLK) += mtd_blk.o
 obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
 obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
 obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
diff --git a/drivers/mtd/mtd_blk.c b/drivers/mtd/mtd_blk.c
new file mode 100644
index 0000000000..1b23cee92f
--- /dev/null
+++ b/drivers/mtd/mtd_blk.c
@@ -0,0 +1,97 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <nand.h>
+#include <dm/device-internal.h>
+
+ulong mtd_dread(struct udevice *udev, lbaint_t start,
+		lbaint_t blkcnt, void *dst)
+{
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	if (!desc)
+		return 0;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if (desc->devnum == BLK_MTD_NAND) {
+		int ret = 0;
+		size_t rwsize = blkcnt * 512;
+		struct mtd_info *mtd = dev_get_priv(udev->parent);
+		struct nand_chip *chip = mtd_to_nand(mtd);
+		loff_t off = (loff_t)(start * 512);
+
+		if (!mtd) {
+			puts("\nno mtd available\n");
+			return 0;
+		}
+
+		if (!chip) {
+			puts("\nno chip available\n");
+			return 0;
+		}
+
+		ret = nand_read_skip_bad(&chip->mtd, off, &rwsize,
+					 NULL, chip->mtd.size,
+					 (u_char *)(dst));
+		if (ret)
+			return 0;
+		else
+			return blkcnt;
+	} else if (desc->devnum == BLK_MTD_SPI_NAND) {
+		/* Not implemented */
+		return 0;
+	} else if (desc->devnum == BLK_MTD_SPI_NOR) {
+		/* Not implemented */
+		return 0;
+	} else {
+		return 0;
+	}
+}
+
+ulong mtd_dwrite(struct udevice *udev, lbaint_t start,
+		 lbaint_t blkcnt, const void *src)
+{
+	/* Not implemented */
+	return 0;
+}
+
+ulong mtd_derase(struct udevice *udev, lbaint_t start,
+		 lbaint_t blkcnt)
+{
+	/* Not implemented */
+	return 0;
+}
+
+static int mtd_blk_probe(struct udevice *udev)
+{
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	sprintf(desc->vendor, "0x%.4x", 0x2207);
+	memcpy(desc->product, "MTD", sizeof("MTD"));
+	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+
+	return 0;
+}
+
+static const struct blk_ops mtd_blk_ops = {
+	.read	= mtd_dread,
+#ifndef CONFIG_SPL_BUILD
+	.write	= mtd_dwrite,
+	.erase	= mtd_derase,
+#endif
+};
+
+U_BOOT_DRIVER(mtd_blk) = {
+	.name		= "mtd_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &mtd_blk_ops,
+	.probe		= mtd_blk_probe,
+};
diff --git a/include/blk.h b/include/blk.h
index d1e82f574c..215929c945 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -38,10 +38,15 @@ enum if_type {
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
 	IF_TYPE_RAMDISK,
-
+	IF_TYPE_MTD,
 	IF_TYPE_COUNT,			/* Number of interface types */
 };
 
+/* define mtd device devnum */
+#define BLK_MTD_NAND		0
+#define BLK_MTD_SPI_NAND	1
+#define BLK_MTD_SPI_NOR		2
+
 #define BLK_VEN_SIZE		40
 #define BLK_PRD_SIZE		20
 #define BLK_REV_SIZE		8

commit 4b7e9c7e37b5532b0b43b2cfc56ac7cb557934fa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 31 14:52:07 2019 +0800

    nand: delete useless conditional statement
    
    The alignment operation is always done by nand driver，so there is
    no need to do alignment operation in nand logical level.
    
    Change-Id: Ic08652e7a9574a5c8eebd505c66dc55b1e0ddce3
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index 9c8a373970..9cc5f3357a 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -712,14 +712,6 @@ int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,
 	u_char *p_buffer = buffer;
 	int need_skip;
 
-	if ((offset & (mtd->writesize - 1)) != 0) {
-		printf("Attempt to read non page-aligned data\n");
-		*length = 0;
-		if (actual)
-			*actual = 0;
-		return -EINVAL;
-	}
-
 	need_skip = check_skip_len(mtd, offset, *length, &used_for_read);
 
 	if (actual)

commit d47d99649ef47fdc81ee4e8d70da68412f45d98e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri May 31 17:58:43 2019 +0800

    lib: optee_client: v1 add security partition offset when backup data
    
    Change-Id: I331b95c1df8c0124568aad5ee7351bc270946af6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 90d547622f..f211372905 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -241,7 +241,7 @@ static int rkss_begin_commit(void)
 	memset(data, 0, sizeof(data));
 	memcpy(data, &p, sizeof(p));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -260,7 +260,7 @@ static int rkss_finish_commit(void)
 	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -279,7 +279,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -318,13 +318,13 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 			goto error;
 		}
 
-		ret = blk_dread(dev_desc, index, num, backup_data);
+		ret = blk_dread(dev_desc, part_info.start + index, num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
-		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+		ret = blk_dwrite(dev_desc, part_info.start + info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dwrite fail\n");
@@ -340,7 +340,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		       (p.backup_count - 1) * sizeof(info_current),
 		       &info_current, sizeof(info_current));
 
-		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
 			printf("TEEC: blk_dwrite fail\n");
 			return -1;
@@ -366,7 +366,7 @@ static int rkss_resume(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -407,7 +407,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dread(dev_desc,
-						info_current.backup_data_index,
+						part_info.start + info_current.backup_data_index,
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
@@ -416,7 +416,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dwrite(dev_desc,
-						 info_current.backup_index,
+						 part_info.start + info_current.backup_index,
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
@@ -429,7 +429,7 @@ static int rkss_resume(void)
 		}
 	}
 	memset(data, 0, sizeof(data));
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;

commit e8c34540a61ba8ec3ef255e3e8a72e7d3409f5f5
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri May 31 17:21:52 2019 +0800

    lib: optee_client: v2 add security partition offset when backup data
    
    Change-Id: I9abbef68e56c0b2870426e91138bb110240ed69c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index f06f24cd01..2ebc238256 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -229,7 +229,7 @@ static int rkss_begin_commit(void)
 	memset(data, 0, sizeof(data));
 	memcpy(data, &p, sizeof(p));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -248,7 +248,7 @@ static int rkss_finish_commit(void)
 	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;
@@ -267,7 +267,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -306,13 +306,13 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 			goto error;
 		}
 
-		ret = blk_dread(dev_desc, index, num, backup_data);
+		ret = blk_dread(dev_desc, part_info.start + index, num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
-		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+		ret = blk_dwrite(dev_desc, part_info.start + info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
 			printf("TEEC: blk_dwrite fail\n");
@@ -328,7 +328,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		       (p.backup_count - 1) * sizeof(info_current),
 		       &info_current, sizeof(info_current));
 
-		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
 			printf("TEEC: blk_dwrite fail\n");
 			return -1;
@@ -354,7 +354,7 @@ static int rkss_resume(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dread(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dread fail\n");
 		return -1;
@@ -395,7 +395,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dread(dev_desc,
-						info_current.backup_data_index,
+						part_info.start + info_current.backup_data_index,
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
@@ -404,7 +404,7 @@ static int rkss_resume(void)
 				}
 
 				ret = blk_dwrite(dev_desc,
-						 info_current.backup_index,
+						 part_info.start + info_current.backup_index,
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
@@ -417,7 +417,7 @@ static int rkss_resume(void)
 		}
 	}
 	memset(data, 0, sizeof(data));
-	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	ret = blk_dwrite(dev_desc, part_info.start + RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
 		printf("TEEC: blk_dwrite fail\n");
 		return -1;

commit 6999767bb24a1de9544f7d5740cd5bb7069de68b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 10:46:45 2019 +0800

    dm: regulator: add "regulator-loader-ignore" property support
    
    The property indicates this regulator should skip init setting
    sequence, usually for saving boot time.
    
    Change-Id: I40a81c84b0696c70b16ddba50aeb457412287116
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index e902571c2c..0041c6a72a 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -265,6 +265,9 @@ int regulator_autoset(struct udevice *dev)
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 
+	if (uc_pdata->ignore)
+		return ret;
+
 	if (uc_pdata->ramp_delay != -ENODATA)
 		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
 
@@ -437,6 +440,7 @@ static int regulator_pre_probe(struct udevice *dev)
 						-ENODATA);
 	uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on");
 	uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on");
+	uc_pdata->ignore = dev_read_bool(dev, "regulator-loader-ignore");
 	uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay",
 						    -ENODATA);
 	node = dev_read_subnode(dev, "regulator-state-mem");
diff --git a/include/power/regulator.h b/include/power/regulator.h
index a6a942bb90..8f45d7203a 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -178,6 +178,7 @@ struct dm_regulator_uclass_platdata {
 	u8 ctrl_reg;
 	u8 volt_reg;
 	bool suspend_on;
+	bool ignore;
 	u32 suspend_uV;
 	u32 ramp_delay;
 };

commit ea4b8016c13aa6f6c0d0a68f88c9970a5fcf1213
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 29 09:47:37 2019 +0800

    core: device_bind_common: always use crypto node from U-Boot dtb
    
    There is not crypto node in kernel dtb for early platform(such as
    rk322x/rk3288/rk3368/rk3399, etc), so we decide to add crypto node
    always in U-Boot dtb and ignore crypto node from kernel dtb.
    
    This is a way to compatible with early platforms. Actually, we
    need crypto during secure boot sequence, the crypto had better
    not depends on kernel dtb.
    
    Change-Id: Ibab4fca0741b45042b8d0868240449fb6b52aa14
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 5d7ec56c82..ea224c22e5 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -71,7 +71,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
 			if (!strcmp(name, dev->name) &&
 			    dev_read_bool(dev, "u-boot,dm-pre-reloc")) {
-				if (drv->id == UCLASS_SERIAL) {
+				if (drv->id == UCLASS_SERIAL || drv->id == UCLASS_CRYPTO) {
 					/* Always use serial node from U-Boot dtb */
 					debug("%s do not delete uboot dev: %s\n",
 					      __func__, dev->name);

commit 48802b420ed64314c357b48219c791ec7c6eb8f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 30 14:18:15 2019 +0800

    env: Kconfig: fix typo
    
    Change-Id: I02f0d7e83ab216e8cecba9d8f3e3a9b223afaed4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/env/Kconfig b/env/Kconfig
index 2a35c08090..48cec9b8f8 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -360,7 +360,7 @@ config ENV_IS_IN_UBI
 
 config ENV_IS_IN_BLK_DEV
 	bool "Environment in a block device"
-	depends on !CHAIN_OF_TRUST && CONFIG_BLK
+	depends on !CHAIN_OF_TRUST && BLK
 	help
 	  Define this if you have an Block device which you want to use for the
 	  environment.

commit ce7f8a11466c91eae324e3d8eb1a2f26f834cf52
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 16 11:07:24 2019 +0800

    arm: rockchip: rk3308: grf: add more register
    
    Change-Id: I008a22e3dccd61b928a0f565791f1abef4d279de
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index f0f1bb541d..bf241a4bd5 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -169,7 +169,13 @@ struct rk3308_grf {
 	unsigned int os_reg9;
 	unsigned int os_reg10;
 	unsigned int os_reg11;
-	unsigned int reserved38[(0x800 - 0x52C) / 4 - 1];
+	unsigned int reserved38[(0x600 - 0x52c) / 4 - 1];
+	unsigned int soc_con12;
+	unsigned int reserved39;
+	unsigned int soc_con13;
+	unsigned int soc_con14;
+	unsigned int soc_con15;
+	unsigned int reserved40[(0x800 - 0x610) / 4 - 1];
 	unsigned int chip_id;
 };
 check_member(rk3308_grf, gpio0a_p, 0xa0);

commit f9ebf7a1deba3da5e8597b6f9a84d0201ee8f0e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 12:50:09 2019 +0800

    crypto: rockchip: v1: use BITS2WORD() for sha final
    
    Adding error message for missing total data length when sha init.
    
    Change-Id: Ibbd266a36ba1498ab4ab5c85ecbb68c548a89a86
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
index de9ef078a2..c3d2d2791b 100644
--- a/drivers/crypto/rockchip/crypto_v1.c
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -39,9 +39,15 @@ static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
 	struct rk_crypto_reg *reg = priv->reg;
 	u32 val;
 
-	if (!ctx || !ctx->length)
+	if (!ctx)
 		return -EINVAL;
 
+	if (!ctx->length) {
+		printf("%s: Err: crypto v1 request total data "
+		       "length when sha init\n", __func__);
+		return -EINVAL;
+	}
+
 	priv->length = 0;
 	writel(ctx->length, &reg->crypto_hash_msg_len);
 	if (ctx->algo == CRYPTO_SHA256) {
@@ -140,7 +146,7 @@ static int rockchip_crypto_sha_final(struct udevice *dev,
 
 	/* Read hash data, per-data 32-bit */
 	nbits = crypto_algo_nbits(ctx->algo);
-	for (i = 0; i < BYTE2WORD(nbits); i++)
+	for (i = 0; i < BITS2WORD(nbits); i++)
 		buf[i] = readl(&reg->crypto_hash_dout[i]);
 
 	return 0;

commit d7a244f923dcdd383b5eefaf7a412493fe977b79
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 28 15:30:06 2019 +0800

    core: device_bind_common: only delete U-Boot existance node
    
    Use "u-boot,dm-pre-reloc" to identify whether the existance
    node is from U-Boot or not. This avoids deleting the same name
    nodes from kernel dtb.
    
    Change-Id: I6503965c0013053feefad7e93f98b01b5af71f44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 21eb2527a0..5d7ec56c82 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -69,7 +69,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		struct udevice *n;
 
 		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
-			if (!strcmp(name, dev->name)) {
+			if (!strcmp(name, dev->name) &&
+			    dev_read_bool(dev, "u-boot,dm-pre-reloc")) {
 				if (drv->id == UCLASS_SERIAL) {
 					/* Always use serial node from U-Boot dtb */
 					debug("%s do not delete uboot dev: %s\n",

commit 039bc38d48725a7cd15d60efec1aaae28c30249f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 10:21:11 2019 +0800

    make.sh: add rk3326 aarch32 build support
    
    Change-Id: Ibfc6a40b5d0decbffdbf4e797459da189484ce88
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index bdd345fb57..fad2993f92 100755
--- a/make.sh
+++ b/make.sh
@@ -413,10 +413,13 @@ fixup_platform_configure()
 	fi
 
 # <*> Fixup AARCH32 for ARM64 cpu platforms
-	if [ $RKCHIP = "RK3308" ]; then
-		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+	if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+		if [ $RKCHIP = "RK3308" ]; then
 			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
 			RKCHIP_TRUST=${RKCHIP_TRUST}"AARCH32"
+		elif [ $RKCHIP = "RK3326" ]; then
+			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
+			RKCHIP_LOADER=${RKCHIP_LOADER}"AARCH32"
 		fi
 	fi
 }

commit 5202fe1fb45f2c3f53825d5cbdc0b2f124218a52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 10:20:25 2019 +0800

    make.sh: improve aarch32 build
    
    Change-Id: I7e39b0cb71a534cf073d38f2bab28069dbad1b26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index e1fad7b138..bdd345fb57 100755
--- a/make.sh
+++ b/make.sh
@@ -66,7 +66,6 @@ PLATFORM_RSA=
 PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
-PLATFORM_AARCH32=
 
 # Out env param
 PACK_IGNORE_BL32=$TRUST_PACK_IGNORE_BL32	# Value only: "--ignore-bl32"
@@ -413,10 +412,11 @@ fixup_platform_configure()
 		PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 	fi
 
-# <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
+# <*> Fixup AARCH32 for ARM64 cpu platforms
 	if [ $RKCHIP = "RK3308" ]; then
 		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
-			PLATFORM_AARCH32="AARCH32"
+			RKCHIP_LABEL=${RKCHIP_LABEL}"AARCH32"
+			RKCHIP_TRUST=${RKCHIP_TRUST}"AARCH32"
 		fi
 	fi
 }
@@ -643,9 +643,9 @@ pack_trust_image()
 	ls trust*.img >/dev/null && rm trust*.img
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST.ini
 		if [ "${mode}" = 'all' ]; then
-			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST*.ini`
+			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TRUST*.ini`
 			for ini in $files
 			do
 				__pack_64bit_trust_image ${ini}
@@ -672,9 +672,9 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${RKCHIP_LABEL} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${RKCHIP_LABEL} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 

commit 9ad51843bf9cad5be313c69cd7e73494d11b7d08
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 22 10:42:17 2019 +0800

    configs: add rk3326-aarch32_defconfig
    
    Enable using kernel dtb.
    
    Change-Id: I2a450300509c81f9cc41af7f57fe40d87d8419be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3326-aarch32_defconfig b/configs/rk3326-aarch32_defconfig
new file mode 100644
index 0000000000..06eda5d7a2
--- /dev/null
+++ b/configs/rk3326-aarch32_defconfig
@@ -0,0 +1,120 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_ROCKCHIP_RK3326=y
+CONFIG_ARM64_BOOT_AARCH32=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit 6db22b33e71b19e6828d45ab978748627ff3cabd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 22 10:41:36 2019 +0800

    rockchip: rk3326: add AArch32 execution state support
    
    Support boot ARMv8 based RK3326 on AARCH32 state
    
    Change-Id: Ifb788ba71057f4f72dba9e1071c3609308644a9b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 040a117dec..7e08cc11f1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -2,13 +2,13 @@ if ARCH_ROCKCHIP
 
 config ROCKCHIP_PX30
 	bool "Support Rockchip PX30"
-	select ARM64
+	select ARM64 if !ARM64_BOOT_AARCH32
 	select GICV2
 	select ARM_SMCCC
 	select SUPPORT_SPL
 	select SUPPORT_TPL
-	select SPL
-	select TPL
+	select SPL if !ARM64_BOOT_AARCH32
+	select TPL if !ARM64_BOOT_AARCH32
 	select TPL_TINY_FRAMEWORK if TPL
 
 	imply SPL_SERIAL_SUPPORT
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 84bf8cb7a6..61ddf63e3e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -11,7 +11,6 @@
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/uart.h>
-#include <asm/armv8/mmu.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_px30.h>
 #include <dt-bindings/clock/px30-cru.h>
@@ -26,6 +25,9 @@
 
 #define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
+
 static struct mm_region px30_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -47,6 +49,7 @@ static struct mm_region px30_mem_map[] = {
 };
 
 struct mm_region *mem_map = px30_mem_map;
+#endif
 
 int arch_cpu_init(void)
 {
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 4a4e72ba75..2569a5cb0f 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -52,6 +52,7 @@
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
+#ifdef CONFIG_ARM64
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
@@ -59,6 +60,14 @@
 	"kernel_addr_r=0x00280000\0" \
 	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
+#else
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00000000\0" \
+	"pxefile_addr_r=0x00100000\0" \
+	"fdt_addr_r=0x08300000\0" \
+	"kernel_addr_r=0x02008000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
+#endif
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 39c46c24efcc88fe5498f593330d43911b70efe6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 27 10:03:55 2019 +0800

    common: android: correct kernel memcpy size when load separate
    
    The hdr->page_size should be included.
    
    fixes: 503a892f5a3eec2c981d9247e68efcfb94321d13
    (common: android: avb support load android image separate)
    
    Change-Id: I2de2c9957fd47c7f95bf863f7b0c679cc64633d9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 4e1e185b27..0237565343 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -280,8 +280,7 @@ int android_image_load_separate(struct andr_img_hdr *hdr,
 
 		if (ram_src) {
 			start = (ulong)ram_src;
-			memcpy((char *)load_address,
-			       (char *)start, hdr->kernel_size);
+			memcpy((char *)load_address, (char *)start, size);
 		} else {
 			blk_start = part->start;
 			ret = blk_dread(dev_desc, blk_start,

commit 459505b3345ca13836a1bf632f67258e6d10b7a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 11:16:27 2019 +0800

    common: rkimg: fix uncompress region check issue
    
    kernel_addr_r is defined in the function entry, we should not
    define it agin, otherwise the behind code is someting wrong.
    (images.ep = kernel_addr_r;)
    
    Change-Id: If6a4c01e8ecdf130b800bd3884a5cfbe158d8f9a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 2f196ad668..56e18ba571 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -533,16 +533,16 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	run_command(cmdbuf, 0);
 #else
 	/* We asume it's always zImage on 32-bit platform */
-	ulong kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
-	ulong kaddr, ksize;
+	ulong kaddr_c = env_get_ulong("kaddr_c", 16, 0);
+	ulong kaddr_r, kaddr, ksize;
 
-	if (kernel_addr_r && !kernel_addr_c) {
-		kernel_addr_c = kernel_addr_r;
-		kernel_addr_r = CONFIG_SYS_SDRAM_BASE;
+	if (kernel_addr_r && !kaddr_c) {
+		kaddr_c = kernel_addr_r;
+		kaddr_r = CONFIG_SYS_SDRAM_BASE;
 	}
 
-	if (!sysmem_free((phys_addr_t)kernel_addr_c)) {
-		kaddr = kernel_addr_r;
+	if (!sysmem_free((phys_addr_t)kaddr_c)) {
+		kaddr = kaddr_r;
 		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
 		ksize = ALIGN(ksize, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,

commit 160c99aa45f26fb476b78fd57c8a91f469546c97
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 09:50:01 2019 +0800

    rockchip: param: add common memory reserve for most AArch32 mode
    
    The ARMv8 platform enabling AArch32 mode should reserve memory the same
    as AArch64 mode(because there is no difference about ATF), only some
    platform has special request, they are: RK3308.
    
    Change-Id: I0ffbfac7ddaff50ef53128dccd5b7dc2d02b560a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index c488a92fa4..6c944eb4d8 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -145,7 +145,15 @@ struct memblock param_parse_common_resv_mem(void)
 {
 	struct memblock mem;
 
-#ifdef CONFIG_ARM64
+#if defined(CONFIG_ARM64)
+	mem.base = SDRAM_OFFSET(SZ_1M);
+	mem.size = SZ_1M;
+/*
+ * The ARMv8 platform enabling AArch32 mode should reserve memory the same
+ * as AArch64 mode(because there is no difference about ATF), only some
+ * platform has special request, they are: RK3308.
+ */
+#elif defined(CONFIG_ARM64_BOOT_AARCH32) && !defined(CONFIG_ROCKCHIP_RK3308)
 	mem.base = SDRAM_OFFSET(SZ_1M);
 	mem.size = SZ_1M;
 #else

commit 598774ec05b47f88be38ab860fe4c09a875499f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 24 11:12:59 2019 +0800

    lib: sysmem: add optimization for input base and M_ATTR_PEEK
    
    - handle the case: the input base is 0;
    - ignore the head region which can't visible for M_ATTR_PEEK;
    
    Change-Id: I2c3609b9457a5e2e429e849228301bfee0e4c9b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 0f382c95f4..ae7e331f07 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -12,8 +12,10 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define SYSMEM_MAGIC		0x4D454D53	/* "SMEM" */
-#define SYSMEM_ALLOC_ANYWHERE	0
+
+#define LMB_ALLOC_ANYWHERE	0		/* sync with lmb.c */
 #define SYSMEM_ALLOC_NO_ALIGN	1
+#define SYSMEM_ALLOC_ANYWHERE	2
 
 #define SYSMEM_I(fmt, args...)	printf("Sysmem: "fmt, ##args)
 #define SYSMEM_W(fmt, args...)	printf("Sysmem Warn: "fmt, ##args)
@@ -251,9 +253,19 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 * of space(4KB) maybe safer.
 		 */
 		if ((id == MEMBLK_ID_AVB_ANDROID) &&
-		    (base == SYSMEM_ALLOC_ANYWHERE))
+		    (base == SYSMEM_ALLOC_ANYWHERE)) {
 			base = gd->start_addr_sp -
 					CONFIG_SYS_STACK_SIZE - size - 0x1000;
+		/*
+		 * So far, we use M_ATTR_PEEK for uncompress kernel alloc, and
+		 * for ARMv8 enabling AArch32 mode, the ATF is still AArch64
+		 * and ocuppies 0~1MB and shmem 1~2M. So let's ignore the region
+		 * which overlap with them.
+		 */
+		} else if (attr.flags & M_ATTR_PEEK) {
+			if (base <= gd->bd->bi_dram[0].start)
+				base = gd->bd->bi_dram[0].start;
+		}
 	} else {
 		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
 		goto out;
@@ -321,7 +333,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 
 	/* Alloc anywhere ? */
 	if (base == SYSMEM_ALLOC_ANYWHERE)
-		alloc_base = base;
+		alloc_base = LMB_ALLOC_ANYWHERE;
 	else
 		alloc_base = base + alloc_size;	/* LMB is align down alloc mechanism */
 
@@ -371,6 +383,13 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	return (void *)paddr;
 
 out:
+	/*
+	 * Why: base + sizeof(ulong) ?
+	 * It's a not standard way to handle the case: the input base is 0.
+	 */
+	if (base == 0)
+		base = base + sizeof(ulong);
+
 	return (attr.flags & M_ATTR_PEEK) ? (void *)base : NULL;
 }
 

commit 7328d2324ed09f6a9d87cb4caf8e03a6991a0cbd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 09:51:04 2019 +0800

    ram: rockchip: fix AArch32 compile issue
    
    error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
    
    Change-Id: Iadcf7065f02ee779d3eeee1cb70fd3e9905e1b3f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_share.c b/drivers/ram/rockchip/sdram_share.c
index 09bce9d972..9ec9906c60 100644
--- a/drivers/ram/rockchip/sdram_share.c
+++ b/drivers/ram/rockchip/sdram_share.c
@@ -403,7 +403,7 @@ int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type)
 {
 	void __iomem *test_addr;
 	u32 row = 0, bktmp, coltmp, bw;
-	u64 cs0_cap;
+	ulong cs0_cap;
 	u32 byte_mask;
 
 	if (cap_info->rank == 2) {

commit a7784f29953d4b6b07ef3c0037090b2edb315f44
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed May 22 17:46:21 2019 +0800

    drivers: rknand: add slc nand and some new MLC nand support
    
    Change-Id: I13c9d56c80c6e817f591b55ea31672681565d274
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index ff3d230ed4..afdb29731e 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-01-07
+ * date: 2019-05-08
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -17,7 +17,50 @@
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
-	.file	"rk_ftl_arm_v7.c"
+	.file	"rk_ftl_arm_v7.S"
+	.section	.text.flash_read_ecc,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_ecc, %function
+flash_read_ecc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2
+	push	{r4, lr}
+	ldr	r4, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	movs	r0, #80
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r4, r4, r3, lsl #8
+	movs	r3, #122
+	str	r3, [r4, #2056]
+	bl	udelay
+	ldr	r3, [r4, #2048]
+	ldr	r0, [r4, #2048]
+	and	r3, r3, #15
+	and	r0, r0, #15
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+	ldr	r3, [r4, #2048]
+	and	r3, r3, #15
+	cmp	r3, r0
+	it	cc
+	movcc	r3, r0
+	ldr	r0, [r4, #2048]
+	and	r0, r0, #15
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+	pop	{r4, pc}
+.L3:
+	.align	2
+.L2:
+	.word	.LANCHOR0
+	.size	flash_read_ecc, .-flash_read_ecc
 	.section	.text.ftl_set_blk_mode.part.10,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -29,7 +72,7 @@ ftl_set_blk_mode.part.10:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L2
+	ldr	r3, .L5
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
 	ldr	r2, [r3]
@@ -39,10 +82,10 @@ ftl_set_blk_mode.part.10:
 	orrs	r3, r3, r0
 	str	r3, [r2, r1, lsl #2]
 	bx	lr
-.L3:
+.L6:
 	.align	2
-.L2:
-	.word	.LANCHOR0
+.L5:
+	.word	.LANCHOR1
 	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
@@ -55,33 +98,33 @@ ftl_set_blk_mode.part.10:
 FlashMemCmp8:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L12
+	ldr	r3, .L15
 	push	{r4, r5, lr}
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L7
+	cbz	r3, .L10
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
-	beq	.L11
+	beq	.L14
 	movs	r3, #0
-.L7:
+.L10:
 	cmp	r3, r2
-	bne	.L9
-.L11:
+	bne	.L12
+.L14:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L9:
+.L12:
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r5, r4
-	beq	.L7
+	beq	.L10
 	mov	r0, r3
 	pop	{r4, r5, pc}
-.L13:
+.L16:
 	.align	2
-.L12:
-	.word	.LANCHOR1
+.L15:
+	.word	.LANCHOR2
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
@@ -95,25 +138,25 @@ FlashRsvdBlkChk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L17
+	ldr	r3, .L20
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L17+4
+	ldr	r3, .L20+4
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	cmp	r3, r1
-	bls	.L16
+	bls	.L19
 	adds	r0, r0, #0
 	it	ne
 	movne	r0, #1
 	bx	lr
-.L16:
+.L19:
 	movs	r0, #1
 	bx	lr
-.L18:
+.L21:
 	.align	2
-.L17:
-	.word	.LANCHOR2
+.L20:
 	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
@@ -126,24 +169,24 @@ FlashRsvdBlkChk:
 FlashGetRandomizer:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L27
+	ldr	r3, .L30
 	and	r2, r1, #127
 	push	{r4, lr}
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L27+4
+	ldr	r3, .L30+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L19
+	cbz	r3, .L22
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L19
+	cbz	r0, .L22
 	orr	r4, r4, #-1073741824
-.L19:
+.L22:
 	mov	r0, r4
 	pop	{r4, pc}
-.L28:
+.L31:
 	.align	2
-.L27:
-	.word	.LANCHOR4
+.L30:
 	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
@@ -158,26 +201,26 @@ FlashSetRandomizer:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	and	r2, r1, #127
-	ldr	r3, .L37
+	ldr	r3, .L40
 	mov	r5, r0
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L37+4
+	ldr	r3, .L40+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L30
+	cbz	r3, .L33
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L30
+	cbz	r0, .L33
 	orr	r4, r4, #-1073741824
-.L30:
-	ldr	r3, .L37+8
+.L33:
+	ldr	r3, .L40+8
 	ldr	r3, [r3, r5, lsl #3]
 	str	r4, [r3, #336]
 	pop	{r3, r4, r5, pc}
-.L38:
+.L41:
 	.align	2
-.L37:
-	.word	.LANCHOR4
+.L40:
 	.word	.LANCHOR5
 	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashBlockAlignInit,"ax",%progbits
 	.align	1
@@ -192,24 +235,24 @@ FlashBlockAlignInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, #256
-	ldr	r3, .L44
-	bls	.L40
+	ldr	r3, .L47
+	bls	.L43
 	mov	r2, #512
-.L43:
+.L46:
 	str	r2, [r3]
 	bx	lr
-.L40:
+.L43:
 	cmp	r0, #128
-	bhi	.L42
+	bhi	.L45
 	str	r0, [r3]
 	bx	lr
-.L42:
-	mov	r2, #256
-	b	.L43
 .L45:
+	mov	r2, #256
+	b	.L46
+.L48:
 	.align	2
-.L44:
-	.word	.LANCHOR3
+.L47:
+	.word	.LANCHOR4
 	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
@@ -225,7 +268,7 @@ FlashReadCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L47
+	ldr	r4, .L50
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -243,10 +286,10 @@ FlashReadCmd:
 	str	r2, [r3, #2056]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L48:
+.L51:
 	.align	2
-.L47:
-	.word	.LANCHOR6
+.L50:
+	.word	.LANCHOR0
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
@@ -260,10 +303,10 @@ FlashReadDpDataOutCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L53
+	ldr	r2, .L56
 	push	{r4, r5, r6}
 	uxtb	r6, r1
-	ldr	r4, .L53+4
+	ldr	r4, .L56+4
 	lsrs	r5, r1, #8
 	ldr	r3, [r2, r0, lsl #3]
 	add	r2, r2, r0, lsl #3
@@ -273,7 +316,7 @@ FlashReadDpDataOutCmd:
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
 	add	r3, r3, r2
-	bne	.L50
+	bne	.L53
 	movs	r2, #6
 	str	r2, [r3, #2056]
 	movs	r2, #0
@@ -282,12 +325,12 @@ FlashReadDpDataOutCmd:
 	str	r6, [r3, #2052]
 	str	r5, [r3, #2052]
 	str	r4, [r3, #2052]
-.L52:
+.L55:
 	movs	r2, #224
 	str	r2, [r3, #2056]
 	pop	{r4, r5, r6}
 	b	FlashSetRandomizer
-.L50:
+.L53:
 	movs	r2, #0
 	str	r2, [r3, #2056]
 	str	r2, [r3, #2052]
@@ -299,11 +342,11 @@ FlashReadDpDataOutCmd:
 	str	r4, [r3, #2056]
 	str	r2, [r3, #2052]
 	str	r2, [r3, #2052]
-	b	.L52
-.L54:
+	b	.L55
+.L57:
 	.align	2
-.L53:
-	.word	.LANCHOR6
+.L56:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
@@ -320,7 +363,7 @@ FlashProgFirstCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L56
+	ldr	r4, .L59
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -337,10 +380,10 @@ FlashProgFirstCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L57:
+.L60:
 	.align	2
-.L56:
-	.word	.LANCHOR6
+.L59:
+	.word	.LANCHOR0
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
@@ -354,12 +397,12 @@ FlashEraseCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L63
+	ldr	r4, .L66
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
 	lsls	r0, r0, #8
-	cbz	r2, .L59
+	cbz	r2, .L62
 	adds	r2, r3, r0
 	movs	r4, #96
 	str	r4, [r2, #2056]
@@ -369,10 +412,10 @@ FlashEraseCmd:
 	str	r4, [r2, #2052]
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
-	ldr	r2, .L63+4
+	ldr	r2, .L66+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
-.L59:
+.L62:
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
@@ -385,11 +428,11 @@ FlashEraseCmd:
 	str	r1, [r3, #2052]
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
-.L64:
+.L67:
 	.align	2
-.L63:
-	.word	.LANCHOR6
-	.word	.LANCHOR3
+.L66:
+	.word	.LANCHOR0
+	.word	.LANCHOR4
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
@@ -405,11 +448,11 @@ FlashProgDpSecondCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L66
+	ldr	r4, .L69
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
-	ldr	r4, .L66+4
+	ldr	r4, .L69+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
@@ -423,10 +466,10 @@ FlashProgDpSecondCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L67:
+.L70:
 	.align	2
-.L66:
-	.word	.LANCHOR6
+.L69:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
@@ -441,7 +484,7 @@ FlashProgSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L69
+	ldr	r3, .L72
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -449,10 +492,10 @@ FlashProgSecondCmd:
 	movs	r2, #16
 	str	r2, [r3, #2056]
 	bx	lr
-.L70:
+.L73:
 	.align	2
-.L69:
-	.word	.LANCHOR6
+.L72:
+	.word	.LANCHOR0
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
@@ -466,8 +509,8 @@ FlashProgDpFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L72
-	ldr	r1, .L72+4
+	ldr	r3, .L75
+	ldr	r1, .L75+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
@@ -475,10 +518,10 @@ FlashProgDpFirstCmd:
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
-.L73:
+.L76:
 	.align	2
-.L72:
-	.word	.LANCHOR6
+.L75:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
@@ -494,7 +537,7 @@ FlashReadStatus:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #112
-	ldr	r3, .L75
+	ldr	r3, .L78
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	movs	r0, #80
@@ -506,10 +549,10 @@ FlashReadStatus:
 	bl	udelay
 	ldr	r0, [r5, r4]
 	pop	{r3, r4, r5, pc}
-.L76:
+.L79:
 	.align	2
-.L75:
-	.word	.LANCHOR6
+.L78:
+	.word	.LANCHOR0
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.js_hash,"ax",%progbits
 	.align	1
@@ -522,24 +565,24 @@ FlashReadStatus:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L80
+	ldr	r3, .L83
 	add	r1, r1, r0
 	push	{r4, lr}
-.L78:
+.L81:
 	cmp	r0, r1
-	bne	.L79
+	bne	.L82
 	mov	r0, r3
 	pop	{r4, pc}
-.L79:
+.L82:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L78
-.L81:
+	b	.L81
+.L84:
 	.align	2
-.L80:
+.L83:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
@@ -584,49 +627,49 @@ ToshibaSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	add	r7, r1, r1, lsl #2
-	ldr	r10, .L92+12
+	ldr	r10, .L95+12
 	mov	r5, r0
 	mov	r6, r1
 	movs	r4, #0
-	ldr	r8, .L92+16
-.L85:
+	ldr	r8, .L95+16
+.L88:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L89
+	bcc	.L92
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L89:
+.L92:
 	movs	r3, #85
 	movs	r0, #200
 	str	r3, [r5, #8]
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
 	bl	udelay
-	ldr	r3, .L92
+	ldr	r3, .L95
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L86
+	bne	.L89
 	adds	r3, r4, r7
 	add	r3, r3, r8
-.L91:
+.L94:
 	ldrsb	r3, [r3, #5]
-.L90:
+.L93:
 	str	r3, [r5]
 	adds	r4, r4, #1
-	b	.L85
-.L86:
+	b	.L88
+.L89:
 	cmp	r3, #35
-	bne	.L88
-	ldr	r3, .L92+4
+	bne	.L91
+	ldr	r3, .L95+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
-	b	.L91
-.L88:
-	ldr	r3, .L92+8
+	b	.L94
+.L91:
+	ldr	r3, .L95+8
 	ldrsb	r3, [r3, r6]
-	b	.L90
-.L93:
+	b	.L93
+.L96:
 	.align	2
-.L92:
+.L95:
 	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
@@ -646,18 +689,18 @@ SamsungSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L97
+	ldr	r7, .L100
 	movs	r4, #0
 	mov	r10, #161
-	ldr	r8, .L97+4
+	ldr	r8, .L100+4
 	add	r1, r7, r1, lsl #2
 	adds	r5, r1, #3
-.L95:
+.L98:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L96
+	bcc	.L99
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L96:
+.L99:
 	movs	r3, #0
 	str	r10, [r6, #8]
 	str	r3, [r6]
@@ -668,10 +711,10 @@ SamsungSetRRPara:
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
 	bl	udelay
-	b	.L95
-.L98:
+	b	.L98
+.L101:
 	.align	2
-.L97:
+.L100:
 	.word	.LANCHOR13
 	.word	.LANCHOR12
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
@@ -690,17 +733,17 @@ LogAddr2PhyAddr:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L104
+	ldr	r3, .L107
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
-	ldr	r3, .L104+4
+	ldr	r3, .L107+4
 	ldrh	fp, [r3]
 	uxth	r4, r4
-	ldr	r3, .L104+8
+	ldr	r3, .L107+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
 	ldr	r3, [r0, #4]
@@ -723,14 +766,14 @@ LogAddr2PhyAddr:
 	cmp	r8, #1
 	uxth	r1, r1
 	ubfx	r3, r3, #0, #10
-	bne	.L101
-	ldr	r2, .L104+12
+	bne	.L104
+	ldr	r2, .L107+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L101
-	ldr	r2, .L104+16
+	cbnz	r2, .L104
+	ldr	r2, .L107+16
 	ldrh	r3, [r2, r3, lsl #1]
-.L101:
-	ldr	r2, .L104+20
+.L104:
+	ldr	r2, .L107+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
 	add	r1, r1, r3
@@ -738,26 +781,26 @@ LogAddr2PhyAddr:
 	str	r1, [r7]
 	str	r10, [r6]
 	cmp	r3, #1
-	bls	.L103
+	bls	.L106
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
 	subs	r3, r0, r3
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
-.L102:
+.L105:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L103:
+.L106:
 	movs	r0, #0
-	b	.L102
-.L105:
+	b	.L105
+.L108:
 	.align	2
-.L104:
+.L107:
 	.word	.LANCHOR14
-	.word	.LANCHOR3
-	.word	.LANCHOR1
+	.word	.LANCHOR4
+	.word	.LANCHOR2
 	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	.LANCHOR17
@@ -773,57 +816,57 @@ LogAddr2PhyAddr:
 FlashReadStatusEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L118
+	ldr	r3, .L121
 	push	{r4, r5, r6, lr}
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L118+4
+	ldr	r3, .L121+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	cmp	r3, #2
 	lsl	r3, r4, #8
 	add	r4, r4, #8
-	bne	.L107
-	ldr	r0, .L118+8
-	cbnz	r2, .L108
+	bne	.L110
+	ldr	r0, .L121+8
+	cbnz	r2, .L111
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-.L117:
+.L120:
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
-	cbz	r0, .L112
+	cbz	r0, .L115
 	add	r6, r5, r4, lsl #8
 	movs	r2, #0
-.L111:
+.L114:
 	cmp	r2, r0
-	bcc	.L113
-.L112:
+	bcc	.L116
+.L115:
 	lsls	r4, r4, #8
 	movs	r0, #80
 	bl	udelay
 	ldr	r0, [r5, r4]
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.L108:
+.L111:
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-	b	.L117
-.L113:
+	b	.L120
+.L116:
 	lsls	r3, r2, #3
 	adds	r2, r2, #1
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
-	b	.L111
-.L107:
+	b	.L114
+.L110:
 	add	r3, r3, r5
 	movs	r2, #112
 	str	r2, [r3, #2056]
-	b	.L112
-.L119:
+	b	.L115
+.L122:
 	.align	2
-.L118:
-	.word	.LANCHOR6
+.L121:
+	.word	.LANCHOR0
 	.word	.LANCHOR18
 	.word	.LANCHOR7
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
@@ -842,16 +885,16 @@ FlashWaitReadyEN:
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-.L124:
+.L127:
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
 	cmp	r0, #255
 	mov	r3, r0
-	beq	.L124
+	beq	.L127
 	lsls	r3, r3, #25
-	bpl	.L124
+	bpl	.L127
 	pop	{r4, r5, r6, pc}
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
@@ -880,17 +923,17 @@ NandcGetChipIf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L129
+	ldr	r2, .L132
 	add	r3, r2, r0, lsl #3
 	ldr	r0, [r2, r0, lsl #3]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	add	r0, r0, r3, lsl #8
 	bx	lr
-.L130:
+.L133:
 	.align	2
-.L129:
-	.word	.LANCHOR6
+.L132:
+	.word	.LANCHOR0
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
@@ -904,16 +947,16 @@ NandcSetDdrPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L132
+	ldr	r3, .L135
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
-.L133:
+.L136:
 	.align	2
-.L132:
+.L135:
 	.word	.LANCHOR19
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
@@ -928,14 +971,14 @@ NandcSetDdrDiv:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L135
+	ldr	r3, .L138
 	orr	r0, r0, #16640
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
-.L136:
+.L139:
 	.align	2
-.L135:
+.L138:
 	.word	.LANCHOR19
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
@@ -950,20 +993,20 @@ NandcSetDdrMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L140
+	ldr	r3, .L143
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	cbnz	r0, .L138
+	cbnz	r0, .L141
 	bfi	r3, r0, #13, #1
-.L139:
+.L142:
 	str	r3, [r2]
 	bx	lr
-.L138:
-	orr	r3, r3, #253952
-	b	.L139
 .L141:
+	orr	r3, r3, #253952
+	b	.L142
+.L144:
 	.align	2
-.L140:
+.L143:
 	.word	.LANCHOR19
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
@@ -978,16 +1021,16 @@ NandcSetMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L149
+	ldr	r3, .L152
 	ands	r1, r0, #6
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	beq	.L143
+	beq	.L146
 	lsls	r1, r0, #29
 	movw	r1, #16641
 	str	r1, [r2, #344]
 	orr	r3, r3, #24576
-	ldr	r1, .L149+4
+	ldr	r1, .L152+4
 	bfc	r3, #15, #1
 	orr	r3, r3, #196608
 	it	mi
@@ -997,16 +1040,16 @@ NandcSetMode:
 	str	r1, [r2, #308]
 	movs	r1, #39
 	str	r1, [r2, #308]
-.L145:
+.L148:
 	str	r3, [r2]
 	movs	r0, #0
 	bx	lr
-.L143:
+.L146:
 	bfi	r3, r1, #13, #1
-	b	.L145
-.L150:
+	b	.L148
+.L153:
 	.align	2
-.L149:
+.L152:
 	.word	.LANCHOR19
 	.word	1710595
 	.size	NandcSetMode, .-NandcSetMode
@@ -1022,7 +1065,7 @@ NandcFlashCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L152
+	ldr	r3, .L155
 	movs	r2, #1
 	ldr	r1, [r3, r0, lsl #3]
 	add	r0, r3, r0, lsl #3
@@ -1032,10 +1075,10 @@ NandcFlashCs:
 	bfi	r3, r2, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L153:
+.L156:
 	.align	2
-.L152:
-	.word	.LANCHOR6
+.L155:
+	.word	.LANCHOR0
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
@@ -1049,17 +1092,17 @@ NandcFlashDeCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L155
+	ldr	r3, .L158
 	ldr	r2, [r3, r0, lsl #3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L156:
+.L159:
 	.align	2
-.L155:
-	.word	.LANCHOR6
+.L158:
+	.word	.LANCHOR0
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
@@ -1074,23 +1117,23 @@ HynixSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L166
+	ldr	r3, .L169
 	mov	r5, r0
 	mov	r7, r1
 	mov	r10, r2
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
-	bne	.L158
+	bne	.L161
 	movs	r4, #20
 	add	r4, r4, r0, lsl #6
 	add	r3, r4, r6, lsl #2
-.L164:
-	ldr	r4, .L166+4
-.L165:
+.L167:
+	ldr	r4, .L169+4
+.L168:
 	add	r4, r4, r3
-.L159:
-	ldr	r3, .L166+8
+.L162:
+	ldr	r3, .L169+8
 	mov	r0, r5
 	subs	r7, r7, #1
 	subs	r4, r4, #1
@@ -1105,42 +1148,42 @@ HynixSetRRPara:
 	str	r3, [r0, #2056]
 	add	r3, r10, #-1
 	mov	r10, r0
-.L162:
+.L165:
 	cmp	r3, r7
-	bne	.L163
+	bne	.L166
 	movs	r3, #22
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L166+12
+	ldr	r3, .L169+12
 	strb	r6, [r3, r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L158:
+.L161:
 	cmp	r3, #7
-	bne	.L160
+	bne	.L163
 	movs	r4, #28
 	movs	r3, #160
 	smlabb	r3, r3, r0, r4
 	movs	r4, #10
 	smlabb	r3, r4, r6, r3
-	b	.L164
-.L160:
+	b	.L167
+.L163:
 	cmp	r3, #8
-	bne	.L161
+	bne	.L164
 	add	r4, r6, r6, lsl #2
-	ldr	r3, .L166+16
-	b	.L165
-.L161:
+	ldr	r3, .L169+16
+	b	.L168
+.L164:
 	adds	r4, r6, #2
 	add	r3, r4, r0, lsl #3
-	ldr	r4, .L166+4
+	ldr	r4, .L169+4
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
-	b	.L159
-.L163:
+	b	.L162
+.L166:
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
 	movs	r0, #200
 	str	r2, [r10, #2052]
@@ -1149,13 +1192,13 @@ HynixSetRRPara:
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
 	str	r2, [r10, #2048]
-	b	.L162
-.L167:
+	b	.L165
+.L170:
 	.align	2
-.L166:
+.L169:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.word	.LANCHOR21
 	.word	.LANCHOR20+28
 	.size	HynixSetRRPara, .-HynixSetRRPara
@@ -1170,35 +1213,35 @@ HynixSetRRPara:
 FlashSetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L174
+	ldr	r3, .L177
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L168
-	ldr	r5, .L174+4
+	bhi	.L171
+	ldr	r5, .L177+4
 	movs	r4, #0
 	adds	r6, r5, #4
-.L171:
-	ldr	r3, .L174+8
+.L174:
+	ldr	r3, .L177+8
 	uxtb	r0, r4
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
-	bne	.L170
+	bne	.L173
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L170:
+.L173:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L171
-.L168:
+	bne	.L174
+.L171:
 	pop	{r4, r5, r6, pc}
-.L175:
+.L178:
 	.align	2
-.L174:
+.L177:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
@@ -1214,17 +1257,17 @@ FlashSetReadRetryDefault:
 FlashWaitCmdDone:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L183
+	ldr	r2, .L186
 	lsls	r3, r0, #4
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
-	cbz	r1, .L178
+	cbz	r1, .L181
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r3, .L183+4
+	ldr	r3, .L186+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
 	ldr	r2, [r3, r6, lsl #2]
@@ -1241,15 +1284,15 @@ FlashWaitCmdDone:
 	str	r1, [r3]
 	movs	r3, #0
 	str	r3, [r4, #8]
-	cbz	r2, .L178
+	cbz	r2, .L181
 	str	r1, [r2]
 	str	r3, [r4, #12]
-.L178:
+.L181:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L184:
+.L187:
 	.align	2
-.L183:
+.L186:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
@@ -1280,32 +1323,32 @@ NandcDelayns:
 NandcWaitFlashReadyNoDelay:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L191
+	ldr	r3, .L194
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, .L191+4
+	ldr	r4, .L194+4
 	ldr	r5, [r3, r0, lsl #3]
-.L188:
+.L191:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L189
+	bmi	.L192
 	movs	r0, #10
 	bl	udelay
 	subs	r4, r4, #1
-	bne	.L188
+	bne	.L191
 	mov	r0, #-1
-.L186:
+.L189:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L189:
-	movs	r0, #0
-	b	.L186
 .L192:
+	movs	r0, #0
+	b	.L189
+.L195:
 	.align	2
-.L191:
-	.word	.LANCHOR6
+.L194:
+	.word	.LANCHOR0
 	.word	100000
 	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
@@ -1320,33 +1363,33 @@ NandcWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r3, .L198
-	ldr	r4, .L198+4
+	ldr	r3, .L201
+	ldr	r4, .L201+4
 	ldr	r5, [r3, r0, lsl #3]
 	movs	r0, #150
 	bl	udelay
-.L195:
+.L198:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L196
+	bmi	.L199
 	movs	r0, #10
 	bl	udelay
 	subs	r4, r4, #1
-	bne	.L195
+	bne	.L198
 	mov	r0, #-1
-.L193:
+.L196:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L196:
-	movs	r0, #0
-	b	.L193
 .L199:
+	movs	r0, #0
+	b	.L196
+.L202:
 	.align	2
-.L198:
-	.word	.LANCHOR6
+.L201:
+	.word	.LANCHOR0
 	.word	100000
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",%progbits
@@ -1360,7 +1403,7 @@ NandcWaitFlashReady:
 FlashReset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L201
+	ldr	r3, .L204
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldr	r5, [r3, r0, lsl #3]
@@ -1375,10 +1418,10 @@ FlashReset:
 	mov	r0, r4
 	pop	{r4, r5, r6, lr}
 	b	NandcFlashDeCs
-.L202:
+.L205:
 	.align	2
-.L201:
-	.word	.LANCHOR6
+.L204:
+	.word	.LANCHOR0
 	.size	FlashReset, .-FlashReset
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -1393,11 +1436,11 @@ flash_enter_slc_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r3, .L205
+	ldr	r3, .L208
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L203
+	cbz	r3, .L206
 	bl	NandcFlashCs
-	ldr	r3, .L205+4
+	ldr	r3, .L208+4
 	movs	r0, #100
 	ldr	r4, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -1423,13 +1466,13 @@ flash_enter_slc_mode:
 	str	r3, [r4, #2056]
 	pop	{r3, r4, r5, lr}
 	b	NandcWaitFlashReady
-.L203:
-	pop	{r3, r4, r5, pc}
 .L206:
+	pop	{r3, r4, r5, pc}
+.L209:
 	.align	2
-.L205:
+.L208:
 	.word	.LANCHOR15
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -1444,11 +1487,11 @@ flash_exit_slc_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r5, r0
-	ldr	r3, .L209
+	ldr	r3, .L212
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L207
+	cbz	r3, .L210
 	bl	NandcFlashCs
-	ldr	r3, .L209+4
+	ldr	r3, .L212+4
 	movs	r0, #100
 	ldr	r4, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -1475,13 +1518,13 @@ flash_exit_slc_mode:
 	str	r3, [r4, #2056]
 	pop	{r3, r4, r5, lr}
 	b	NandcWaitFlashReady
-.L207:
-	pop	{r3, r4, r5, pc}
 .L210:
+	pop	{r3, r4, r5, pc}
+.L213:
 	.align	2
-.L209:
+.L212:
 	.word	.LANCHOR15
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
@@ -1527,7 +1570,7 @@ FlashEraseBlock:
 FlashSetInterfaceMode:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L240
+	ldr	r3, .L243
 	mov	ip, #128
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
@@ -1541,36 +1584,36 @@ FlashSetInterfaceMode:
 	str	r2, [sp, #4]
 	mov	r2, r5
 	str	r3, [sp]
-.L222:
-	ldr	r3, .L240+4
+.L225:
+	ldr	r3, .L243+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
 	cmp	r4, #152
-	beq	.L213
+	beq	.L216
 	cmp	r4, #69
-	beq	.L213
+	beq	.L216
 	cmp	r4, #173
-	beq	.L213
+	beq	.L216
 	cmp	r4, #44
-	bne	.L214
-.L213:
-	ldr	r3, .L240+8
+	bne	.L217
+.L216:
+	ldr	r3, .L243+8
 	cmp	r0, #1
 	ldr	r1, [r5, r3]
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	bne	.L215
+	bne	.L218
 	ldr	r6, [sp]
-	cbz	r6, .L214
+	cbz	r6, .L217
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L216
+	bne	.L219
 	str	r0, [fp, #2052]
-.L239:
+.L242:
 	str	r2, [fp, #2048]
-	b	.L220
-.L216:
+	b	.L223
+.L219:
 	cmp	r4, #44
 	ittet	eq
 	moveq	r4, #5
@@ -1579,48 +1622,48 @@ FlashSetInterfaceMode:
 	streq	r4, [fp, #2048]
 	it	ne
 	strne	r0, [fp, #2048]
-.L220:
+.L223:
 	add	r3, r3, r1
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
-.L214:
+.L217:
 	adds	r5, r5, #8
 	cmp	r5, #32
-	bne	.L222
+	bne	.L225
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L215:
+.L218:
 	ldr	r6, [sp, #4]
 	cmp	r6, #0
-	beq	.L214
+	beq	.L217
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L219
+	bne	.L222
 	str	lr, [fp, #2052]
 	str	r10, [fp, #2048]
-	b	.L220
-.L219:
+	b	.L223
+.L222:
 	cmp	r4, #44
-	bne	.L221
+	bne	.L224
 	str	lr, [fp, #2052]
 	str	r8, [fp, #2048]
-	b	.L220
-.L221:
+	b	.L223
+.L224:
 	str	ip, [fp, #2052]
-	b	.L239
-.L241:
+	b	.L242
+.L244:
 	.align	2
-.L240:
+.L243:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
@@ -1642,21 +1685,21 @@ SandiskSetRRPara:
 	str	r3, [r0, #4]
 	movs	r0, #200
 	bl	udelay
-	ldr	r3, .L248
+	ldr	r3, .L251
 	add	r4, r4, r4, lsl #2
-	ldr	r6, .L248+4
+	ldr	r6, .L251+4
 	movs	r2, #0
-	ldr	r7, .L248+8
+	ldr	r7, .L251+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L248+12
+	ldr	r3, .L251+12
 	ldrb	r0, [r3]	@ zero_extendqisi2
-.L243:
+.L246:
 	cmp	r2, r1
-	bcc	.L246
+	bcc	.L249
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	NandcWaitFlashReady
-.L246:
+.L249:
 	adds	r3, r2, r4
 	cmp	r0, #67
 	ite	eq
@@ -1665,10 +1708,10 @@ SandiskSetRRPara:
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
 	str	r3, [r5]
-	b	.L243
-.L249:
+	b	.L246
+.L252:
 	.align	2
-.L248:
+.L251:
 	.word	.LANCHOR12
 	.word	.LANCHOR10
 	.word	.LANCHOR8
@@ -1689,7 +1732,7 @@ micron_auto_read_calibration_config:
 	mov	r5, r0
 	mov	r6, r1
 	bl	NandcWaitFlashReady
-	ldr	r0, .L251
+	ldr	r0, .L254
 	ldr	r4, [r0, r5, lsl #3]
 	add	r0, r0, r5, lsl #3
 	ldrb	r3, [r0, #4]	@ zero_extendqisi2
@@ -1706,10 +1749,10 @@ micron_auto_read_calibration_config:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	pop	{r4, r5, r6, pc}
-.L252:
+.L255:
 	.align	2
-.L251:
-	.word	.LANCHOR6
+.L254:
+	.word	.LANCHOR0
 	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
@@ -1724,19 +1767,19 @@ FlashEraseSLc2KBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r1
-	ldr	r8, .L263+12
+	ldr	r8, .L266+12
 	sub	sp, sp, #20
 	mov	r5, r0
 	movs	r6, #0
-	ldr	r10, .L263+16
-.L254:
+	ldr	r10, .L266+16
+.L257:
 	cmp	r6, r7
-	bne	.L259
+	bne	.L262
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L259:
+.L262:
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -1748,17 +1791,17 @@ FlashEraseSLc2KBlocks:
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L255
+	bhi	.L258
 	mov	r3, #-1
 	str	r3, [r5]
-.L256:
+.L259:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-	b	.L254
-.L255:
+	b	.L257
+.L258:
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L263
+	ldr	r2, .L266
 	mov	r0, r4
 	strb	r4, [r2, r3]
 	bl	NandcWaitFlashReady
@@ -1773,7 +1816,7 @@ FlashEraseSLc2KBlocks:
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-	ldr	r3, .L263+4
+	ldr	r3, .L266+4
 	sbfx	r0, r0, #0, #1
 	str	r0, [r5]
 	movs	r2, #0
@@ -1793,19 +1836,19 @@ FlashEraseSLc2KBlocks:
 	strmi	r3, [r5]
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L258
+	bne	.L261
 	ldr	r1, [sp, #8]
-	ldr	r0, .L263+8
+	ldr	r0, .L266+8
 	bl	printf
-.L258:
+.L261:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	b	.L256
-.L264:
+	b	.L259
+.L267:
 	.align	2
-.L263:
+.L266:
 	.word	.LANCHOR23
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LC1
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -1821,41 +1864,41 @@ FlashEraseSLc2KBlocks:
 FlashEraseBlocks:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L296
+	ldr	r3, .L299
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	sub	sp, sp, #24
 	mov	fp, r1
 	mov	r7, r2
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	cbnz	r4, .L266
-	ldr	r10, .L296+8
-.L267:
+	cbnz	r4, .L269
+	ldr	r10, .L299+8
+.L270:
 	cmp	r4, r7
-	bcc	.L276
-	ldr	r5, .L296+4
+	bcc	.L279
+	ldr	r5, .L299+4
 	movs	r4, #0
-	ldr	r6, .L296+8
-.L277:
-	ldr	r3, .L296+12
+	ldr	r6, .L299+8
+.L280:
+	ldr	r3, .L299+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L279
-	ldr	r3, .L296+16
+	bcc	.L282
+	ldr	r3, .L299+16
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L280
-.L281:
+	bne	.L283
+.L284:
 	movs	r0, #0
-	b	.L265
-.L266:
+	b	.L268
+.L269:
 	mov	r1, r2
 	bl	FlashEraseSLc2KBlocks
-.L265:
+.L268:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L276:
+.L279:
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -1868,29 +1911,29 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L296+12
+	ldr	r3, .L299+12
 	mov	r6, r0
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L269
+	bhi	.L272
 	mov	r3, #-1
 	str	r3, [r8, r5]
-.L270:
+.L273:
 	adds	r4, r4, #1
-	b	.L267
-.L269:
-	ldr	r3, .L296+20
+	b	.L270
+.L272:
+	ldr	r3, .L299+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	add	r3, r10, r0, lsl #4
 	it	eq
 	moveq	r6, #0
 	ldr	r3, [r3, #8]
-	cbz	r3, .L272
+	cbz	r3, .L275
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L272:
+.L275:
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
@@ -1900,25 +1943,25 @@ FlashEraseBlocks:
 	str	r0, [r3, #12]
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
-	cbz	r6, .L273
+	cbz	r6, .L276
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
-.L273:
-	ldr	r3, .L296+24
+.L276:
+	ldr	r3, .L299+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
 	mov	r0, r5
 	strb	r5, [r10, r2]
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r5
-	bne	.L274
-	ldr	r3, .L296+4
+	bne	.L277
+	ldr	r3, .L299+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L274
+	cbz	r3, .L277
 	bl	flash_enter_slc_mode
-.L275:
-	ldr	r3, .L296+28
+.L278:
+	ldr	r3, .L299+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
 	add	r4, r4, r6
@@ -1934,42 +1977,42 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L270
-.L274:
+	b	.L273
+.L277:
 	bl	flash_exit_slc_mode
-	b	.L275
-.L279:
+	b	.L278
+.L282:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L278
+	bne	.L281
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbz	r3, .L278
+	cbz	r3, .L281
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L278:
+.L281:
 	adds	r4, r4, #1
-	b	.L277
-.L280:
-	ldr	r3, .L296+32
+	b	.L280
+.L283:
+	ldr	r3, .L299+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #69
-	bne	.L281
+	bne	.L284
 	movs	r3, #0
 	movs	r2, #36
 	mov	r1, r3
-.L282:
+.L285:
 	cmp	r3, r7
-	beq	.L281
+	beq	.L284
 	mul	r0, r2, r3
 	adds	r3, r3, #1
 	str	r1, [r8, r0]
-	b	.L282
-.L297:
+	b	.L285
+.L300:
 	.align	2
-.L296:
-	.word	.LANCHOR1
+.L299:
+	.word	.LANCHOR2
 	.word	.LANCHOR15
 	.word	.LANCHOR23
 	.word	.LANCHOR25
@@ -1992,7 +2035,7 @@ FlashReadDpCmd:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r5, r2
-	ldr	r3, .L302
+	ldr	r3, .L305
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
@@ -2001,7 +2044,7 @@ FlashReadDpCmd:
 	ldr	r10, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L302+4
+	ldr	r3, .L305+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
@@ -2010,7 +2053,7 @@ FlashReadDpCmd:
 	cmp	r2, #1
 	lsr	r2, r6, #16
 	str	ip, [r4, #2056]
-	bne	.L299
+	bne	.L302
 	mov	r10, #0
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
@@ -2022,7 +2065,7 @@ FlashReadDpCmd:
 	str	r10, [r4, #2056]
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
-.L301:
+.L304:
 	lsrs	r3, r5, #8
 	lsrs	r5, r5, #16
 	str	r8, [r4, #2052]
@@ -2034,16 +2077,16 @@ FlashReadDpCmd:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FlashSetRandomizer
-.L299:
+.L302:
 	str	lr, [r4, #2052]
 	str	r1, [r4, #2052]
 	str	r2, [r4, #2052]
 	str	r3, [r4, #2056]
-	b	.L301
-.L303:
+	b	.L304
+.L306:
 	.align	2
-.L302:
-	.word	.LANCHOR6
+.L305:
+	.word	.LANCHOR0
 	.word	.LANCHOR7
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
@@ -2061,41 +2104,41 @@ FlashDeInit:
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldr	r3, .L314
+	ldr	r3, .L317
 	ldr	r0, [r3]
-	cbz	r0, .L305
+	cbz	r0, .L308
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L306:
-	ldr	r4, .L314+4
+.L309:
+	ldr	r4, .L317+4
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L307
-	ldr	r3, .L314+8
+	cbz	r3, .L310
+	ldr	r3, .L317+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L307
+	bpl	.L310
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
 	strb	r3, [r4]
-.L307:
-	ldr	r3, .L314+12
+.L310:
+	ldr	r3, .L317+12
 	movs	r0, #0
 	ldr	r3, [r3]
 	str	r0, [r3, #336]
 	pop	{r4, pc}
-.L305:
+.L308:
 	bl	flash_exit_slc_mode
-	b	.L306
-.L315:
+	b	.L309
+.L318:
 	.align	2
-.L314:
+.L317:
 	.word	.LANCHOR29
 	.word	.LANCHOR30
 	.word	.LANCHOR24
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
@@ -2109,14 +2152,14 @@ NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L317
+	ldr	r3, .L320
 	ldr	r3, [r3, r0, lsl #3]
 	str	r1, [r3, #336]
 	bx	lr
-.L318:
+.L321:
 	.align	2
-.L317:
-	.word	.LANCHOR6
+.L320:
+	.word	.LANCHOR0
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
@@ -2130,23 +2173,23 @@ NandcTimeCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L324
+	ldr	r3, .L327
 	cmp	r0, #35
 	ldr	r3, [r3]
-	bhi	.L320
+	bhi	.L323
 	movw	r2, #4193
-.L323:
+.L326:
 	str	r2, [r3, #4]
 	bx	lr
-.L320:
+.L323:
 	cmp	r0, #99
 	ite	hi
 	movwhi	r2, #8322
 	movwls	r2, #4225
-	b	.L323
-.L325:
+	b	.L326
+.L328:
 	.align	2
-.L324:
+.L327:
 	.word	.LANCHOR19
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
@@ -2161,12 +2204,12 @@ FlashTimingCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L327
+	ldr	r3, .L330
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L328:
+.L331:
 	.align	2
-.L327:
+.L330:
 	.word	.LANCHOR31
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
@@ -2180,7 +2223,7 @@ FlashTimingCfg:
 NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L337
+	ldr	r3, .L340
 	movs	r1, #0
 	push	{r4, lr}
 	movs	r4, #16
@@ -2188,32 +2231,32 @@ NandcBchSel:
 	ldr	r2, [r3]
 	mov	r3, #1
 	str	r3, [r2, #8]
-	ldr	r3, .L337+4
+	ldr	r3, .L340+4
 	str	r0, [r3]
 	mov	r3, r1
 	bfi	r3, r4, #8, #8
 	bfi	r3, r1, #18, #1
-	bne	.L330
-.L333:
+	bne	.L333
+.L336:
 	bfc	r3, #4, #1
-.L331:
+.L334:
 	orr	r3, r3, #1
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L330:
+.L333:
 	cmp	r0, #24
-	bne	.L332
+	bne	.L335
 	orr	r3, r3, #16
-	b	.L331
-.L332:
+	b	.L334
+.L335:
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L331
-	b	.L333
-.L338:
+	bne	.L334
+	b	.L336
+.L341:
 	.align	2
-.L337:
+.L340:
 	.word	.LANCHOR19
 	.word	.LANCHOR32
 	.size	NandcBchSel, .-NandcBchSel
@@ -2229,12 +2272,12 @@ FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L340
+	ldr	r3, .L343
 	strb	r0, [r3]
 	b	NandcBchSel
-.L341:
+.L344:
 	.align	2
-.L340:
+.L343:
 	.word	.LANCHOR33
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
@@ -2336,7 +2379,7 @@ NandcSendDumpDataStart:
 	@ link register save eliminated.
 	ldr	r2, [r0, #16]
 	sub	sp, sp, #8
-	ldr	r3, .L349
+	ldr	r3, .L352
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2349,9 +2392,9 @@ NandcSendDumpDataStart:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L350:
+.L353:
 	.align	2
-.L349:
+.L352:
 	.word	538969130
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
@@ -2367,12 +2410,12 @@ NandcSendDumpDataDone:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	sub	sp, sp, #8
-.L352:
+.L355:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L352
+	bpl	.L355
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
@@ -2395,12 +2438,12 @@ NandcXferStart:
 	str	r2, [sp, #4]
 	ldr	fp, [sp, #56]
 	cmp	r1, #0
-	bne	.L369
+	bne	.L372
 	adds	r5, fp, #0
 	it	ne
 	movne	r5, #1
-.L356:
-	ldr	r1, .L374
+.L359:
+	ldr	r1, .L377
 	movs	r4, #0
 	ldr	r6, [r1, r0, lsl #3]
 	add	r1, r1, r0, lsl #3
@@ -2418,29 +2461,29 @@ NandcXferStart:
 	orr	r4, r4, #536870912
 	orr	r4, r4, #1024
 	bfi	r4, r3, #4, #1
-	ldr	r3, .L374+4
+	ldr	r3, .L377+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L357
+	bls	.L360
 	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
 	cmp	r5, #0
-	beq	.L358
-	ldr	r5, .L374+8
+	beq	.L361
+	ldr	r5, .L377+8
 	cmp	r7, #0
-	bne	.L359
-.L367:
+	bne	.L362
+.L370:
 	ldr	r2, [sp, #4]
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
 	cmp	fp, #0
-	beq	.L360
+	beq	.L363
 	mov	r0, fp
-.L361:
+.L364:
 	ldr	r3, [r5, #4]
 	add	r1, r0, #63
 	ubfx	r10, r4, #22, #5
@@ -2491,10 +2534,10 @@ NandcXferStart:
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L358:
+.L361:
 	ldr	r3, [sp, #20]
 	str	r3, [r6, #16]
-.L357:
+.L360:
 	str	r8, [r6, #12]
 	str	r4, [r6, #8]
 	orr	r4, r4, #4
@@ -2502,11 +2545,11 @@ NandcXferStart:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L369:
+.L372:
 	movs	r5, #1
-	b	.L356
-.L359:
-	ldr	r3, .L374+12
+	b	.L359
+.L362:
+	ldr	r3, .L377+12
 	movs	r1, #0
 	ldr	lr, [r5, #4]
 	mov	r0, r1
@@ -2520,35 +2563,35 @@ NandcXferStart:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #60]
-.L363:
+.L366:
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	bcs	.L367
+	bcs	.L370
 	ldr	r2, [sp, #60]
 	bic	r10, r1, #3
-	cbz	r2, .L364
+	cbz	r2, .L367
 	ldrh	ip, [r3]
 	adds	r3, r3, #4
 	ldrh	r2, [r3, #-2]
 	orr	ip, ip, r2, lsl #16
 	str	ip, [lr, r10]
-.L365:
+.L368:
 	ldr	r2, [sp, #8]
 	adds	r0, r0, #1
 	add	r1, r1, r2
-	b	.L363
-.L364:
+	b	.L366
+.L367:
 	mov	r2, #-1
 	str	r2, [lr, r10]
-	b	.L365
-.L360:
-	ldr	r3, .L374+8
+	b	.L368
+.L363:
+	ldr	r3, .L377+8
 	ldr	r0, [r3]
-	b	.L361
-.L375:
+	b	.L364
+.L378:
 	.align	2
-.L374:
-	.word	.LANCHOR6
+.L377:
+	.word	.LANCHOR0
 	.word	.LANCHOR34
 	.word	.LANCHOR35
 	.word	.LANCHOR32
@@ -2564,76 +2607,76 @@ NandcXferStart:
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L404
+	ldr	r3, .L407
 	push	{r0, r1, r4, lr}
 	ldr	r1, [r3, r0, lsl #3]
-	ldr	r3, .L404+4
+	ldr	r3, .L407+4
 	ldr	r0, [r3]
 	cmp	r0, #3
-	bls	.L397
+	bls	.L400
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L397
+	bpl	.L400
 	ldr	r3, [r1, #16]
 	tst	r3, #2
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	beq	.L384
-.L380:
+	beq	.L387
+.L383:
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L381
+	bge	.L384
 	cmp	r0, #5
-	bls	.L380
+	bls	.L383
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L380
+	bpl	.L383
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L380
-.L381:
-	ldr	r3, .L404+8
+	bpl	.L383
+.L384:
+	ldr	r3, .L407+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.L376:
+.L379:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L385:
+.L388:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L384:
+.L387:
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L385
-	ldr	r4, .L404+12
+	bpl	.L388
+	ldr	r4, .L407+12
 	ldr	r2, [r4]
-	cbz	r2, .L386
+	cbz	r2, .L389
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.L386:
+.L389:
 	ldr	r3, [r4]
 	cmp	r3, #0
-	beq	.L381
+	beq	.L384
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
-	b	.L381
-.L397:
+	b	.L384
+.L400:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L397
-	b	.L376
-.L405:
+	bpl	.L400
+	b	.L379
+.L408:
 	.align	2
-.L404:
-	.word	.LANCHOR6
+.L407:
+	.word	.LANCHOR0
 	.word	.LANCHOR34
 	.word	.LANCHOR35
 	.word	.LANCHOR36
@@ -2652,17 +2695,17 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r1, #0
 	movs	r2, #1
-.L407:
+.L410:
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
-	bls	.L408
+	bls	.L411
 	subs	r0, r3, #1
 	uxth	r0, r0
 	bx	lr
-.L408:
+.L411:
 	lsls	r2, r2, #1
-	b	.L407
+	b	.L410
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -2690,31 +2733,31 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L411
+	ldr	r3, .L414
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L411+4
+	ldr	r2, .L414+4
 	str	r0, [r3]
-	ldr	r3, .L411+8
+	ldr	r3, .L414+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L411+12
+	ldr	r2, .L414+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L411+16
+	ldr	r2, .L414+16
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L411+20
+	ldr	r2, .L414+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L411+24
+	ldr	r2, .L414+24
 	str	r3, [r2]
 	bx	lr
-.L412:
+.L415:
 	.align	2
-.L411:
+.L414:
 	.word	.LANCHOR37
 	.word	.LANCHOR39
 	.word	.LANCHOR38
@@ -2739,30 +2782,30 @@ FtlConstantsInit:
 	mov	r10, r0
 	ldrh	r7, [r0, #8]
 	sub	sp, sp, #24
-	ldr	r3, .L440
+	ldr	r3, .L443
 	ldrh	r2, [r0, #10]
 	ldrh	r6, [r0, #14]
 	strh	r7, [r3]	@ movhi
 	ldrh	r3, [r0, #12]
-	ldr	r0, .L440+4
-	ldr	r1, .L440+8
-	ldr	r4, .L440+12
+	ldr	r0, .L443+4
+	ldr	r1, .L443+8
+	ldr	r4, .L443+12
 	strh	r6, [r0]	@ movhi
 	str	r0, [sp, #20]
-	ldr	r0, .L440+16
+	ldr	r0, .L443+16
 	strh	r3, [r1]	@ movhi
 	movs	r1, #0
 	strh	r2, [r4]	@ movhi
 	str	r4, [sp, #8]
-.L414:
+.L417:
 	strb	r1, [r1, r0]
 	adds	r1, r1, #1
 	cmp	r1, #32
-	bne	.L414
+	bne	.L417
 	ldrh	r0, [r10, #14]
 	ldrh	r1, [r10, #20]
 	cmp	r1, r0, lsr #8
-	bcs	.L415
+	bcs	.L418
 	uxtb	r8, r3
 	lsl	r1, r8, #1
 	uxtb	r1, r1
@@ -2771,22 +2814,22 @@ FtlConstantsInit:
 	muls	r1, r3, r1
 	str	r1, [sp, #12]
 	movs	r1, #0
-.L416:
+.L419:
 	cmp	r1, r3
-	bcs	.L418
+	bcs	.L421
 	ldr	r4, [sp, #12]
 	sub	fp, r1, r3
 	uxtb	r0, r1
 	adds	r5, r1, r4
-	ldr	r4, .L440+16
+	ldr	r4, .L443+16
 	add	r4, r4, r5
 	movs	r5, #0
 	mov	lr, r4
-	ldr	r4, .L440+16
+	ldr	r4, .L443+16
 	mov	ip, r5
 	add	fp, fp, r4
-	b	.L419
-.L417:
+	b	.L422
+.L420:
 	add	r4, r8, r0
 	strb	r0, [fp, r5]
 	str	r4, [sp, #16]
@@ -2796,47 +2839,47 @@ FtlConstantsInit:
 	ldr	r4, [sp, #4]
 	add	r0, r0, r4
 	uxtb	r0, r0
-.L419:
+.L422:
 	cmp	ip, r2
 	add	r5, r5, r3
-	bcc	.L417
+	bcc	.L420
 	adds	r1, r1, #1
-	b	.L416
-.L418:
+	b	.L419
+.L421:
 	ldr	r1, [sp, #8]
 	lsls	r2, r2, #1
 	lsrs	r6, r6, #1
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L440+4
+	ldr	r2, .L443+4
 	strh	r6, [r2]	@ movhi
-.L415:
-	ldr	r1, .L440+20
+.L418:
+	ldr	r1, .L443+20
 	movs	r2, #5
 	cmp	r7, #1
 	mov	r0, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L440+24
+	ldr	r2, .L443+24
 	it	eq
 	strheq	r7, [r1]	@ movhi
-	ldr	r1, .L440+28
+	ldr	r1, .L443+28
 	strh	r0, [r2]	@ movhi
 	mov	r0, #4352
 	strh	r0, [r1]	@ movhi
-	ldr	r0, .L440+32
+	ldr	r0, .L443+32
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	str	r0, [sp, #4]
-	cbz	r0, .L421
+	cbz	r0, .L424
 	mov	r0, #384
 	strh	r0, [r1]	@ movhi
-.L421:
+.L424:
 	str	r2, [sp, #16]
 	ldr	r2, [sp, #8]
-	ldr	r1, .L440+36
+	ldr	r1, .L443+36
 	ldrh	r6, [r10, #16]
 	ldrh	r5, [r2]
 	ldr	r2, [sp, #20]
-	ldr	fp, .L440+116
-	ldr	r8, .L440+120
+	ldr	fp, .L443+116
+	ldr	r8, .L443+120
 	smulbb	r5, r5, r3
 	ldrh	r4, [r2]
 	strh	r6, [fp]	@ movhi
@@ -2844,13 +2887,13 @@ FtlConstantsInit:
 	smulbb	r3, r3, r4
 	strh	r5, [r1]	@ movhi
 	smulbb	r0, r5, r6
-	ldr	r1, .L440+40
+	ldr	r1, .L443+40
 	strh	r3, [r1]	@ movhi
 	ldrh	r1, [r10, #18]
-	ldr	r3, .L440+44
+	ldr	r3, .L443+44
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	ldr	r3, .L440+48
+	ldr	r3, .L443+48
 	strh	r0, [r3]	@ movhi
 	ldrh	r3, [r10, #20]
 	mov	r0, r3
@@ -2859,9 +2902,9 @@ FtlConstantsInit:
 	bl	Ftl_log2
 	ldr	r3, [sp, #8]
 	mov	r7, r0
-	ldr	ip, .L440+124
+	ldr	ip, .L443+124
 	cmp	r4, #1024
-	ldr	lr, .L440+128
+	ldr	lr, .L443+128
 	ldr	r2, [sp, #16]
 	strh	r0, [ip]	@ movhi
 	lsl	r0, r3, #9
@@ -2869,15 +2912,15 @@ FtlConstantsInit:
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
 	lsr	r0, r0, #8
-	ldr	lr, .L440+132
+	ldr	lr, .L443+132
 	mul	r1, r3, r1
 	strh	r0, [lr]	@ movhi
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-	ldr	r0, .L440+52
+	ldr	r0, .L443+52
 	strh	lr, [r0]	@ movhi
 	mul	lr, r4, r5
-	ldr	r0, .L440+56
+	ldr	r0, .L443+56
 	str	lr, [r0]
 	itt	hi
 	uxtbhi	r0, r4
@@ -2887,16 +2930,16 @@ FtlConstantsInit:
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L440+60
+	ldr	r2, .L443+60
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	ldr	r6, .L440+28
+	ldr	r6, .L443+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L440+64
+	ldr	r6, .L443+64
 	cmp	r0, #4
 	itt	ls
 	movls	r2, #4
@@ -2904,22 +2947,22 @@ FtlConstantsInit:
 	ldr	r2, [sp, #4]
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	cbz	r2, .L425
+	cbz	r2, .L428
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L425:
+.L428:
 	ldrh	r3, [r3]
 	lsls	r4, r4, #6
-	ldr	r2, .L440+68
+	ldr	r2, .L443+68
 	mov	r1, r5
 	ldrh	r0, [r6]
 	asrs	r3, r3, r7
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	ldr	r7, .L440+72
+	ldr	r7, .L443+72
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L440+76
+	ldr	r3, .L443+76
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r4, r5
@@ -2927,9 +2970,9 @@ FtlConstantsInit:
 	str	r3, [r7]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L440+80
+	ldr	r4, .L443+80
 	cmp	r5, #1
-	ldr	r5, .L440+84
+	ldr	r5, .L443+84
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
@@ -2937,10 +2980,10 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #24
-	ldr	r3, .L440+88
+	ldr	r3, .L443+88
 	ldrb	r5, [r5]	@ zero_extendqisi2
 	str	r2, [r3]
-	ldr	r3, .L440+92
+	ldr	r3, .L443+92
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -2948,14 +2991,14 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L440+96
+	ldr	r2, .L443+96
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L440+100
+	ldr	r2, .L443+100
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L440+104
+	ldr	r2, .L443+104
 	str	r0, [r2]
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
@@ -2963,17 +3006,17 @@ FtlConstantsInit:
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	cbz	r5, .L428
+	cbz	r5, .L431
 	adds	r2, r2, #5
 	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
-.L439:
+.L442:
 	str	r2, [r7]
-.L429:
-	ldr	r1, .L440+108
+.L432:
+	ldr	r1, .L443+108
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L440+112
+	ldr	r2, .L443+112
 	ldrh	r0, [r2]
 	lsrs	r2, r0, #3
 	add	r2, r2, r0, lsl #1
@@ -2988,14 +3031,14 @@ FtlConstantsInit:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L428:
+.L431:
 	cmp	r4, #7
-	bhi	.L429
+	bhi	.L432
 	movs	r2, #8
-	b	.L439
-.L441:
+	b	.L442
+.L444:
 	.align	2
-.L440:
+.L443:
 	.word	.LANCHOR44
 	.word	.LANCHOR41
 	.word	.LANCHOR46
@@ -3004,7 +3047,7 @@ FtlConstantsInit:
 	.word	.LANCHOR48
 	.word	.LANCHOR49
 	.word	.LANCHOR50
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR38
 	.word	.LANCHOR51
 	.word	.LANCHOR53
@@ -3043,29 +3086,29 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L449
+	ldr	r3, .L452
 	ldrh	r3, [r3]
-	cbz	r3, .L448
-	ldr	r3, .L449+4
-	ldr	r2, .L449+8
+	cbz	r3, .L451
+	ldr	r3, .L452+4
+	ldr	r2, .L452+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L444:
+.L447:
 	cmp	r3, r2
-	bne	.L445
-.L448:
+	bne	.L448
+.L451:
 	movs	r0, #0
 	bx	lr
-.L445:
+.L448:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L444
+	bne	.L447
 	movs	r0, #1
 	bx	lr
-.L450:
+.L453:
 	.align	2
-.L449:
+.L452:
 	.word	.LANCHOR70
 	.word	.LANCHOR71
 	.word	.LANCHOR61
@@ -3082,12 +3125,12 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L452
+	ldr	r3, .L455
 	ldr	r0, [r3]
 	bx	lr
-.L453:
+.L456:
 	.align	2
-.L452:
+.L455:
 	.word	.LANCHOR68
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
@@ -3102,12 +3145,12 @@ FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L455
+	ldr	r3, .L458
 	ldr	r0, [r3]
 	bx	lr
-.L456:
+.L459:
 	.align	2
-.L455:
+.L458:
 	.word	.LANCHOR68
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
@@ -3122,12 +3165,12 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L458
+	ldr	r3, .L461
 	ldr	r0, [r3]
 	bx	lr
-.L459:
+.L462:
 	.align	2
-.L458:
+.L461:
 	.word	.LANCHOR68
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
@@ -3142,12 +3185,12 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L461
+	ldr	r3, .L464
 	ldr	r0, [r3]
 	bx	lr
-.L462:
+.L465:
 	.align	2
-.L461:
+.L464:
 	.word	.LANCHOR72
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
@@ -3162,15 +3205,15 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L464
-	ldr	r3, .L464+4
+	ldr	r2, .L467
+	ldr	r3, .L467+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L465:
+.L468:
 	.align	2
-.L464:
+.L467:
 	.word	.LANCHOR73
 	.word	.LANCHOR38
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -3186,15 +3229,15 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L467
-	ldr	r3, .L467+4
+	ldr	r2, .L470
+	ldr	r3, .L470+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L468:
+.L471:
 	.align	2
-.L467:
+.L470:
 	.word	.LANCHOR38
 	.word	.LANCHOR41
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -3209,14 +3252,14 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L470
+	ldr	r3, .L473
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L470+4
+	ldr	r4, .L473+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -3233,7 +3276,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L470+8
+	ldr	r0, .L473+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -3242,9 +3285,9 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L471:
+.L474:
 	.align	2
-.L470:
+.L473:
 	.word	.LANCHOR51
 	.word	.LANCHOR74
 	.word	.LC2
@@ -3260,7 +3303,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L473
+	ldr	r3, .L476
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -3270,7 +3313,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L473+4
+	ldr	r3, .L476+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -3280,9 +3323,9 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L474:
+.L477:
 	.align	2
-.L473:
+.L476:
 	.word	.LANCHOR51
 	.word	.LANCHOR74
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
@@ -3313,12 +3356,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L477
+	ldr	r3, .L480
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L477+4
+	ldr	r3, .L480+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -3329,9 +3372,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L478:
+.L481:
 	.align	2
-.L477:
+.L480:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	V2P_block, .-V2P_block
@@ -3346,11 +3389,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L480
+	ldr	r3, .L483
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L480+4
+	ldr	r3, .L483+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -3360,9 +3403,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L481:
+.L484:
 	.align	2
-.L480:
+.L483:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	P2V_plane, .-P2V_plane
@@ -3378,18 +3421,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L483
+	ldr	r3, .L486
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L483+4
+	ldr	r3, .L486+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L484:
+.L487:
 	.align	2
-.L483:
+.L486:
 	.word	.LANCHOR51
 	.word	.LANCHOR46
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -3406,14 +3449,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L486
+	bls	.L489
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L486:
+.L489:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -3433,14 +3476,14 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L489
+	ldr	r3, .L492
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L490:
+.L493:
 	.align	2
-.L489:
+.L492:
 	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
@@ -3455,15 +3498,15 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L492
+	ldr	r3, .L495
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L493:
+.L496:
 	.align	2
-.L492:
+.L495:
 	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
@@ -3483,17 +3526,17 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L494
-	ldr	r4, .L503
+	bhi	.L497
+	ldr	r4, .L506
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L494
-	cbz	r1, .L496
-	ldr	r3, .L503+4
+	beq	.L497
+	cbz	r1, .L499
+	ldr	r3, .L506+4
 	ldr	r3, [r3]
-	cbnz	r3, .L496
+	cbnz	r3, .L499
 	bl	P2V_block_in_plane
-	ldr	r3, .L503+8
+	ldr	r3, .L506+8
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -3501,16 +3544,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L503+12
+	ldr	r3, .L506+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L503+16
+	ldr	r2, .L506+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L496:
+.L499:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -3520,11 +3563,11 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L494:
+.L497:
 	pop	{r4, r5, r6, pc}
-.L504:
+.L507:
 	.align	2
-.L503:
+.L506:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
@@ -3542,28 +3585,28 @@ FtlFreeSysBlkQueueIn:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L514
+	ldr	r3, .L517
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L505
-	ldr	r2, .L514+4
+	cbz	r2, .L508
+	ldr	r2, .L517+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L507:
+.L510:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L508
-	cbz	r5, .L505
+	bgt	.L511
+	cbz	r5, .L508
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L505:
-	pop	{r4, r5, r6, pc}
 .L508:
+	pop	{r4, r5, r6, pc}
+.L511:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -3573,10 +3616,10 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L507
-.L515:
+	b	.L510
+.L518:
 	.align	2
-.L514:
+.L517:
 	.word	.LANCHOR75
 	.word	.LANCHOR80
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -3592,12 +3635,12 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L526
+	ldr	r4, .L529
 	mov	r6, r4
-.L517:
+.L520:
 	ldrh	r1, [r4, #6]
 	cmp	r1, #0
-	beq	.L518
+	beq	.L521
 	ldrh	r3, [r4, #2]
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
@@ -3606,59 +3649,59 @@ FtlFreeSysBlkQueueOut:
 	ubfx	r3, r3, #0, #10
 	ldrh	r5, [r4, r2, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, .L526+4
+	ldr	r3, .L529+4
 	ldr	r10, [r3]
 	cmp	r10, #0
-	bne	.L519
-	ldr	r8, .L526+28
+	bne	.L522
+	ldr	r8, .L529+28
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r7, r0
 	lsls	r3, r5, #10
 	ldr	r0, [r8]
 	str	r3, [r0, #4]
-	ldr	r3, .L526+8
+	ldr	r3, .L529+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L520
+	cbz	r3, .L523
 	movs	r2, #1
 	mov	r1, r10
 	bl	FlashEraseBlocks
-.L520:
+.L523:
 	movs	r2, #1
 	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L526+12
+	ldr	r3, .L529+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	ldr	r2, .L526+16
+	ldr	r2, .L529+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L519:
+.L522:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L522
+	bls	.L525
 	ldrh	r2, [r6, #6]
 	mov	r1, r5
-	ldr	r0, .L526+20
-	bl	printf
-	b	.L517
-.L518:
-	ldr	r0, .L526+24
+	ldr	r0, .L529+20
 	bl	printf
+	b	.L520
 .L521:
-	b	.L521
-.L522:
+	ldr	r0, .L529+24
+	bl	printf
+.L524:
+	b	.L524
+.L525:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L527:
+.L530:
 	.align	2
-.L526:
+.L529:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR15
@@ -3679,34 +3722,34 @@ FtlFreeSysBlkQueueOut:
 test_node_in_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L533
+	ldr	r3, .L536
 	push	{r4, r5, lr}
 	movw	r5, #65535
 	ldr	r2, [r0]
 	ldr	r4, [r3]
 	subs	r3, r2, r4
 	asrs	r0, r3, #1
-	ldr	r3, .L533+4
+	ldr	r3, .L536+4
 	muls	r3, r0, r3
 	movs	r0, #6
 	uxth	r3, r3
-.L530:
+.L533:
 	cmp	r3, r1
-	beq	.L531
+	beq	.L534
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	beq	.L532
+	beq	.L535
 	mla	r2, r0, r3, r4
-	b	.L530
-.L531:
+	b	.L533
+.L534:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L532:
+.L535:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L534:
+.L537:
 	.align	2
-.L533:
+.L536:
 	.word	.LANCHOR81
 	.word	-1431655765
 	.size	test_node_in_list, .-test_node_in_list
@@ -3722,11 +3765,11 @@ insert_data_list:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L551
+	ldr	r3, .L554
 	ldrh	lr, [r3]
 	cmp	lr, r0
-	bls	.L537
-	ldr	r3, .L551+4
+	bls	.L540
+	ldr	r3, .L554+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
@@ -3736,102 +3779,102 @@ insert_data_list:
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L551+8
+	ldr	r3, .L554+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L538
-.L550:
+	bne	.L541
+.L553:
 	str	r1, [r3]
-.L537:
+.L540:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L538:
-	ldr	r3, .L551+12
+.L541:
+	ldr	r3, .L554+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L548
+	cbz	r3, .L551
 	mul	fp, r3, r6
-.L539:
+.L542:
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-	ldr	r3, .L551+16
+	ldr	r3, .L554+16
 	muls	r3, r6, r3
-	ldr	r6, .L551+20
+	ldr	r6, .L554+20
 	ldr	r8, [r6]
 	movs	r6, #0
 	uxth	r3, r3
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.L546:
+.L549:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	lr, r6
-	bcc	.L537
+	bcc	.L540
 	cmp	r3, r0
-	beq	.L537
+	beq	.L540
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
 	ldrh	r7, [r2, #4]
-	cbz	r7, .L549
+	cbz	r7, .L552
 	muls	r7, r5, r7
-.L541:
+.L544:
 	cmp	fp, r7
-	bne	.L542
+	bne	.L545
 	ldr	r5, [sp, #12]
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
 	cmp	r10, r7
-	bcc	.L544
-.L543:
+	bcc	.L547
+.L546:
 	ldr	r5, [sp, #4]
 	cmp	r2, ip
 	strh	r3, [r4, r5]	@ movhi
 	ldrh	r3, [r2, #2]
 	strh	r3, [r1, #2]	@ movhi
-	bne	.L547
+	bne	.L550
 	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L551+8
-	b	.L550
-.L548:
+	ldr	r3, .L554+8
+	b	.L553
+.L551:
 	mov	fp, #-1
-	b	.L539
-.L549:
+	b	.L542
+.L552:
 	mov	r7, #-1
-	b	.L541
-.L542:
-	bcc	.L543
-.L544:
+	b	.L544
+.L545:
+	bcc	.L546
+.L547:
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
-	bne	.L545
+	bne	.L548
 	strh	r3, [r1, #2]	@ movhi
 	strh	r0, [r2]	@ movhi
-	ldr	r3, .L551+24
-	b	.L550
-.L545:
+	ldr	r3, .L554+24
+	b	.L553
+.L548:
 	movs	r3, #6
 	mla	r2, r3, r7, r4
 	mov	r3, r7
-	b	.L546
-.L547:
+	b	.L549
+.L550:
 	ldrh	r1, [r2, #2]
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
 	strh	r0, [r2, #2]	@ movhi
-	b	.L537
-.L552:
+	b	.L540
+.L555:
 	.align	2
-.L551:
+.L554:
 	.word	.LANCHOR40
 	.word	.LANCHOR81
 	.word	.LANCHOR82
@@ -3853,28 +3896,28 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L555
+	ldr	r2, .L558
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L555+4
+	ldr	r2, .L558+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L553
-	ldr	r1, .L555+8
+	bcs	.L556
+	ldr	r1, .L558+8
 	movs	r2, #210
-	ldr	r0, .L555+12
+	ldr	r0, .L558+12
 	bl	printf
-	ldr	r1, .L555+16
-	ldr	r0, .L555+20
+	ldr	r1, .L558+16
+	ldr	r0, .L558+20
 	pop	{r3, lr}
 	b	printf
-.L553:
-	pop	{r3, pc}
 .L556:
+	pop	{r3, pc}
+.L559:
 	.align	2
-.L555:
+.L558:
 	.word	.LANCHOR85
 	.word	.LANCHOR40
 	.word	.LANCHOR86
@@ -3896,48 +3939,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L558
-	ldr	r3, .L564
+	beq	.L561
+	ldr	r3, .L567
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L564+4
+	ldr	r3, .L567+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L559
+	cbnz	r6, .L562
 	str	r5, [r3]
-.L558:
+.L561:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L559:
-	ldr	r3, .L564+8
+.L562:
+	ldr	r3, .L567+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L564+12
+	ldr	r2, .L567+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L562:
+.L565:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L560
+	bcs	.L563
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L561
+	bne	.L564
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L558
-.L561:
+	b	.L561
+.L564:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L562
-.L560:
+	b	.L565
+.L563:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -3952,10 +3995,10 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L558
-.L565:
+	b	.L561
+.L568:
 	.align	2
-.L564:
+.L567:
 	.word	.LANCHOR81
 	.word	.LANCHOR87
 	.word	.LANCHOR78
@@ -3974,28 +4017,28 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L568
+	ldr	r2, .L571
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L568+4
+	ldr	r2, .L571+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L566
-	ldr	r1, .L568+8
+	bcs	.L569
+	ldr	r1, .L571+8
 	movs	r2, #203
-	ldr	r0, .L568+12
+	ldr	r0, .L571+12
 	bl	printf
-	ldr	r1, .L568+16
-	ldr	r0, .L568+20
+	ldr	r1, .L571+16
+	ldr	r0, .L571+20
 	pop	{r3, lr}
 	b	printf
-.L566:
-	pop	{r3, pc}
 .L569:
+	pop	{r3, pc}
+.L572:
 	.align	2
-.L568:
+.L571:
 	.word	.LANCHOR88
 	.word	.LANCHOR40
 	.word	.LANCHOR89
@@ -4016,7 +4059,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L576
+	ldr	r5, .L579
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -4024,23 +4067,23 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L571
+	bne	.L574
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L571
-	ldr	r1, .L576+4
+	beq	.L574
+	ldr	r1, .L579+4
 	mov	r2, #386
-	ldr	r0, .L576+8
+	ldr	r0, .L579+8
 	bl	printf
-	ldr	r1, .L576+12
-	ldr	r0, .L576+16
+	ldr	r1, .L579+12
+	ldr	r0, .L579+16
 	bl	printf
-.L571:
+.L574:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L572
+	bne	.L575
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -4051,24 +4094,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L574:
+.L577:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L572:
+.L575:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L575
+	bne	.L578
 	cmp	r1, r3
-	beq	.L574
+	beq	.L577
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L574
-.L575:
+	b	.L577
+.L578:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -4076,10 +4119,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L574
-.L577:
+	b	.L577
+.L580:
 	.align	2
-.L576:
+.L579:
 	.word	.LANCHOR81
 	.word	.LANCHOR90
 	.word	.LC5
@@ -4099,15 +4142,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L584
-	ldr	r2, .L585
+	cbz	r3, .L587
+	ldr	r2, .L588
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L580:
-	cbnz	r1, .L581
 .L583:
-	ldr	r4, .L585+4
+	cbnz	r1, .L584
+.L586:
+	ldr	r4, .L588+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -4115,20 +4158,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L581:
+.L584:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L583
+	beq	.L586
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L580
-.L584:
+	b	.L583
+.L587:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L586:
+.L589:
 	.align	2
-.L585:
+.L588:
 	.word	.LANCHOR81
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -4143,37 +4186,37 @@ List_pop_index_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L593
+	ldr	r3, .L596
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L592
-	ldr	r2, .L593+4
+	cbz	r3, .L595
+	ldr	r2, .L596+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L589:
-	cbz	r0, .L590
+.L592:
+	cbz	r0, .L593
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L591
-.L592:
+	bne	.L594
+.L595:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L591:
+.L594:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L589
-.L590:
-	ldr	r0, .L593+8
+	b	.L592
+.L593:
+	ldr	r0, .L596+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L594:
+.L597:
 	.align	2
-.L593:
+.L596:
 	.word	.LANCHOR82
 	.word	.LANCHOR81
 	.word	-1431655765
@@ -4189,64 +4232,64 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L606
+	ldr	r3, .L609
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L597
-	ldr	r3, .L606+4
+	beq	.L600
+	ldr	r3, .L609+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L597
-	ldr	r3, .L606+8
+	beq	.L600
+	ldr	r3, .L609+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L597
-	ldr	r7, .L606+12
+	beq	.L600
+	ldr	r7, .L609+12
 	movs	r6, #6
-	ldr	r3, .L606+16
+	ldr	r3, .L609+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L597
-	ldr	r3, .L606+20
+	beq	.L600
+	ldr	r3, .L609+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L604
+	beq	.L607
 	muls	r5, r2, r5
-.L599:
+.L602:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L600
+	bne	.L603
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L600
-	ldr	r1, .L606+24
+	bne	.L603
+	ldr	r1, .L609+24
 	mov	r2, #504
-	ldr	r0, .L606+28
+	ldr	r0, .L609+28
 	bl	printf
-	ldr	r1, .L606+32
-	ldr	r0, .L606+36
+	ldr	r1, .L609+32
+	ldr	r0, .L609+36
 	bl	printf
-.L600:
+.L603:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L601
+	bne	.L604
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L597
-.L601:
+	beq	.L600
+.L604:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L606+40
+	ldr	r3, .L609+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -4254,42 +4297,42 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L605
+	cbz	r3, .L608
 	muls	r3, r0, r3
-.L602:
+.L605:
 	cmp	r5, r3
-	bcs	.L597
-	ldr	r5, .L606+44
+	bcs	.L600
+	ldr	r5, .L609+44
 	mov	r1, r4
-	ldr	r0, .L606+16
+	ldr	r0, .L609+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L603
-	ldr	r1, .L606+24
+	cbnz	r3, .L606
+	ldr	r1, .L609+24
 	movw	r2, #515
-	ldr	r0, .L606+28
+	ldr	r0, .L609+28
 	bl	printf
-	ldr	r1, .L606+32
-	ldr	r0, .L606+36
+	ldr	r1, .L609+32
+	ldr	r0, .L609+36
 	bl	printf
-.L603:
+.L606:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L597:
+.L600:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L604:
+.L607:
 	mov	r5, #-1
-	b	.L599
-.L605:
-	mov	r3, #-1
 	b	.L602
-.L607:
+.L608:
+	mov	r3, #-1
+	b	.L605
+.L610:
 	.align	2
-.L606:
+.L609:
 	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
@@ -4319,16 +4362,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L609:
+.L612:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L612
+	bcs	.L615
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L609
+	bne	.L612
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4336,14 +4379,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L610
-	ldr	r3, .L616
-	ldr	r0, .L616+4
+	bls	.L613
+	ldr	r3, .L619
+	ldr	r0, .L619+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.L611:
-	b	.L611
-.L610:
+.L614:
+	b	.L614
+.L613:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4352,23 +4395,23 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L612:
+.L615:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L614
-	ldr	r1, .L616+8
+	bhi	.L617
+	ldr	r1, .L619+8
 	movw	r2, #629
-	ldr	r0, .L616+12
+	ldr	r0, .L619+12
 	bl	printf
-	ldr	r1, .L616+16
-	ldr	r0, .L616+20
+	ldr	r1, .L619+16
+	ldr	r0, .L619+20
 	bl	printf
-.L614:
+.L617:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L617:
+.L620:
 	.align	2
-.L616:
+.L619:
 	.word	.LANCHOR75
 	.word	.LC8
 	.word	.LANCHOR95
@@ -4389,82 +4432,82 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L628
+	ldr	r3, .L631
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L628+4
+	ldr	r3, .L631+4
 	ldr	r3, [r3]
-.L619:
+.L622:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L621
+	bcc	.L624
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L622:
+.L625:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L624
+	bcc	.L627
 	cmp	r4, r2
-	bcc	.L620
-	ldr	r1, .L628+8
+	bcc	.L623
+	ldr	r1, .L631+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L625:
+.L628:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L627
+	bcc	.L630
 	cmp	r4, r2
-	bcc	.L620
+	bcc	.L623
 	movw	r2, #859
-	ldr	r1, .L628+12
-	ldr	r0, .L628+16
+	ldr	r1, .L631+12
+	ldr	r0, .L631+16
 	bl	printf
-	ldr	r1, .L628+20
-	ldr	r0, .L628+24
+	ldr	r1, .L631+20
+	ldr	r0, .L631+24
 	bl	printf
-	b	.L620
-.L621:
+	b	.L623
+.L624:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L619
-.L620:
+	bne	.L622
+.L623:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L624:
+.L627:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L623
+	blt	.L626
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L623:
+.L626:
 	adds	r1, r1, #1
-	b	.L622
-.L627:
+	b	.L625
+.L630:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L626
+	bls	.L629
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L626:
+.L629:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L625
-.L629:
+	b	.L628
+.L632:
 	.align	2
-.L628:
+.L631:
 	.word	.LANCHOR67
 	.word	.LANCHOR96
 	.word	.LANCHOR97
@@ -4484,45 +4527,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L640
+	ldr	r2, .L643
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L631
-	cbnz	r0, .L631
+	bhi	.L634
+	cbnz	r0, .L634
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L631:
+.L634:
 	movs	r3, #0
-	ldr	r0, .L640+4
+	ldr	r0, .L643+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L640+8
+	ldr	r1, .L643+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L640+12
+	ldr	r2, .L643+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L632:
+.L635:
 	cmp	r1, r4
-	bne	.L634
-	cbz	r3, .L630
+	bne	.L637
+	cbz	r3, .L633
 	str	r0, [r2]
-.L630:
+.L633:
 	pop	{r4, r5, r6, pc}
-.L634:
+.L637:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L632
-.L641:
+	b	.L635
+.L644:
 	.align	2
-.L640:
+.L643:
 	.word	.LANCHOR99
 	.word	.LANCHOR40
 	.word	.LANCHOR83
@@ -4541,10 +4584,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L643
+	cbz	r1, .L646
 	b	ftl_set_blk_mode.part.10
-.L643:
-	ldr	r2, .L644
+.L646:
+	ldr	r2, .L647
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -4554,10 +4597,10 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L645:
+.L648:
 	.align	2
-.L644:
-	.word	.LANCHOR0
+.L647:
+	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -4571,7 +4614,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L647
+	ldr	r3, .L650
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -4579,10 +4622,10 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L648:
+.L651:
 	.align	2
-.L647:
-	.word	.LANCHOR0
+.L650:
+	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -4599,14 +4642,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L656
+	ldr	r3, .L659
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L650:
+.L653:
 	cmp	r2, r4
-	bcc	.L652
-	ldr	r3, .L656+4
+	bcc	.L655
+	ldr	r3, .L659+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -4614,12 +4657,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L653:
+.L656:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L655
+	bhi	.L658
 	pop	{r4, r5, r6, pc}
-.L652:
+.L655:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -4628,8 +4671,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L650
-.L655:
+	b	.L653
+.L658:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -4637,10 +4680,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L653
-.L657:
+	b	.L656
+.L660:
 	.align	2
-.L656:
+.L659:
 	.word	.LANCHOR38
 	.word	.LANCHOR52
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -4655,44 +4698,44 @@ ftl_sb_update_avl_pages:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L671
+	ldr	r3, .L674
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L659
-	ldr	r1, .L671+4
-	movw	r2, #2575
-	ldr	r0, .L671+8
+	bcc	.L662
+	ldr	r1, .L674+4
+	movw	r2, #2577
+	ldr	r0, .L674+8
 	bl	printf
-	ldr	r1, .L671+12
-	ldr	r0, .L671+16
+	ldr	r1, .L674+12
+	ldr	r0, .L674+16
 	bl	printf
-.L659:
-	ldr	r3, .L671+20
+.L662:
+	ldr	r3, .L674+20
 	add	r6, r4, #16
-	ldr	r10, .L671+40
+	ldr	r10, .L674+40
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L660:
+.L663:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L662
-	ldr	r2, .L671+24
+	bhi	.L665
+	ldr	r2, .L674+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L671+28
+	ldr	r3, .L674+28
 	ldr	r3, [r3]
-	cbz	r3, .L663
-	ldr	r3, .L671+32
+	cbz	r3, .L666
+	ldr	r3, .L674+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
@@ -4700,34 +4743,34 @@ make_superblock:
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L663:
-	ldr	r3, .L671+36
+.L666:
+	ldr	r3, .L674+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L664
+	cbz	r3, .L667
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L664:
+.L667:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L662:
+.L665:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L661
+	cbnz	r0, .L664
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L661:
+.L664:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L660
-.L672:
+	b	.L663
+.L675:
 	.align	2
-.L671:
+.L674:
 	.word	.LANCHOR40
 	.word	.LANCHOR101
 	.word	.LC5
@@ -4737,7 +4780,7 @@ make_superblock:
 	.word	.LANCHOR52
 	.word	.LANCHOR28
 	.word	.LANCHOR78
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR47
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
@@ -4753,46 +4796,46 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L679
+	ldr	r3, .L682
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L679+12
+	ldr	r10, .L682+12
 	ldrh	r7, [r3]
-	ldr	r3, .L679+4
+	ldr	r3, .L682+4
 	ldrh	r8, [r3]
-.L674:
+.L677:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L676
-	cbz	r4, .L678
+	bhi	.L679
+	cbz	r4, .L681
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L677:
-	ldr	r3, .L679+8
+.L680:
+	ldr	r3, .L682+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L676:
+.L679:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L675
+	cbnz	r0, .L678
 	add	r4, r4, r8
 	uxth	r4, r4
-.L675:
-	adds	r5, r5, #1
-	b	.L674
 .L678:
-	mov	r0, r4
+	adds	r5, r5, #1
 	b	.L677
-.L680:
+.L681:
+	mov	r0, r4
+	b	.L680
+.L683:
 	.align	2
-.L679:
+.L682:
 	.word	.LANCHOR38
 	.word	.LANCHOR52
 	.word	.LANCHOR81
@@ -4810,24 +4853,24 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L684
+	ldr	r3, .L687
 	ldr	r0, [r3]
-	cbz	r0, .L682
-	ldr	r3, .L684+4
+	cbz	r0, .L685
+	ldr	r3, .L687+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L684+8
+	ldr	r3, .L687+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L684+12
+	ldr	r3, .L687+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L682:
-	bx	lr
 .L685:
+	bx	lr
+.L688:
 	.align	2
-.L684:
+.L687:
 	.word	.LANCHOR87
 	.word	.LANCHOR81
 	.word	-1431655765
@@ -4844,11 +4887,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L694
+	ldr	r3, .L697
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L692
-	ldr	r2, .L694+4
+	cbz	r3, .L695
+	ldr	r2, .L697+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -4857,37 +4900,37 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L694+8
+	ldr	r2, .L697+8
 	ldr	r1, [r2]
-	ldr	r2, .L694+12
+	ldr	r2, .L697+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L689:
+.L692:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L691
+	bls	.L694
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L693
-.L691:
-	ldr	r2, .L694+16
+	bne	.L696
+.L694:
+	ldr	r2, .L697+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L693:
+.L696:
 	mov	r3, r4
-	b	.L689
-.L692:
+	b	.L692
+.L695:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L695:
+.L698:
 	.align	2
-.L694:
+.L697:
 	.word	.LANCHOR87
 	.word	.LANCHOR88
 	.word	.LANCHOR81
@@ -4908,18 +4951,18 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L697
-	ldr	r2, .L698
+	beq	.L700
+	ldr	r2, .L701
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L697:
+.L700:
 	movs	r0, #0
 	pop	{r3, pc}
-.L699:
+.L702:
 	.align	2
-.L698:
+.L701:
 	.word	.LANCHOR83
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
@@ -4935,54 +4978,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L705
+	ldr	r1, .L708
 	mov	fp, #1
-	ldr	r2, .L705+4
+	ldr	r2, .L708+4
 	ldr	r5, [r1]
-	ldr	r1, .L705+8
+	ldr	r1, .L708+8
 	str	r3, [r2]
-	ldr	r2, .L705+12
+	ldr	r2, .L708+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L705+16
+	ldr	r1, .L708+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L705+20
+	ldr	r1, .L708+20
 	ldr	r10, [r1]
-	ldr	r1, .L705+24
+	ldr	r1, .L708+24
 	ldrh	r7, [r1]
-	ldr	r1, .L705+28
+	ldr	r1, .L708+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L701:
+.L704:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #36
 	add	lr, r1, r6
-	bne	.L702
-	ldr	r3, .L705+32
+	bne	.L705
+	ldr	r3, .L708+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L705+8
+	ldr	r3, .L708+8
 	ldr	r4, [r3]
-	ldr	r3, .L705+20
+	ldr	r3, .L708+20
 	ldr	ip, [r3]
-.L703:
+.L706:
 	cmp	r2, r0
-	bcc	.L704
+	bcc	.L707
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L702:
+.L705:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -4996,8 +5039,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-32]
 	mov	r3, ip
 	str	r6, [r4, #-36]
-	b	.L701
-.L704:
+	b	.L704
+.L707:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -5012,10 +5055,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L703
-.L706:
+	b	.L706
+.L709:
 	.align	2
-.L705:
+.L708:
 	.word	.LANCHOR103
 	.word	.LANCHOR102
 	.word	.LANCHOR104
@@ -5037,41 +5080,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L714
+	ldr	r3, .L717
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #36
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L714+4
+	ldr	r3, .L717+4
 	ldr	r5, [r3]
-.L708:
+.L711:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L707
+	bls	.L710
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L709:
+.L712:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L710
+	bls	.L713
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L709
+	bne	.L712
 	str	lr, [r10, #8]
-.L710:
+.L713:
 	adds	r4, r4, #1
-	b	.L708
-.L707:
+	b	.L711
+.L710:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L715:
+.L718:
 	.align	2
-.L714:
+.L717:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -5086,43 +5129,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L723
+	ldr	r3, .L726
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #36
 	ldr	r4, [r3]
-	ldr	r3, .L723+4
+	ldr	r3, .L726+4
 	ldr	r5, [r3]
-.L717:
+.L720:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L721
+	bhi	.L724
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L721:
+.L724:
 	mov	r10, #0
-.L718:
+.L721:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L719
+	bls	.L722
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L718
+	bne	.L721
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L719:
+.L722:
 	adds	r2, r2, #1
-	b	.L717
-.L724:
+	b	.L720
+.L727:
 	.align	2
-.L723:
+.L726:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -5138,25 +5181,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L730
-	ldr	r2, .L730+4
+	ldr	r3, .L733
+	ldr	r2, .L733+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L726:
+.L729:
 	cmp	r3, r2
-	bne	.L728
+	bne	.L731
 	movs	r0, #0
 	bx	lr
-.L728:
+.L731:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L726
+	bne	.L729
 	movs	r0, #1
 	bx	lr
-.L731:
+.L734:
 	.align	2
-.L730:
+.L733:
 	.word	.LANCHOR108
 	.word	.LANCHOR109
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -5173,35 +5216,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L736
+	ldr	r4, .L739
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L736+4
+	ldr	r3, .L739+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L733:
+.L736:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L735
-	bne	.L734
+	bcc	.L738
+	bne	.L737
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L734
-.L735:
+	b	.L737
+.L738:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L733
-.L734:
-	ldr	r2, .L736+8
+	bne	.L736
+.L737:
+	ldr	r2, .L739+8
 	movs	r0, #12
-	ldr	r1, .L736+12
+	ldr	r1, .L739+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -5212,9 +5255,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L737:
+.L740:
 	.align	2
-.L736:
+.L739:
 	.word	.LANCHOR109
 	.word	.LANCHOR108
 	.word	.LANCHOR110
@@ -5231,48 +5274,48 @@ FtlGcUpdatePage:
 FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L743+12
+	ldr	ip, .L746+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L739
-	ldr	r6, .L743
+	beq	.L742
+	ldr	r6, .L746
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L739
-	ldr	r4, .L743+4
+	beq	.L742
+	ldr	r4, .L746+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L739
-	ldr	r2, .L743+8
+	beq	.L742
+	ldr	r2, .L746+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L739
+	beq	.L742
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L740
+	bne	.L743
 	strh	r0, [ip]	@ movhi
-.L739:
+.L742:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L740:
+.L743:
 	cmp	r7, r3
-	bne	.L741
+	bne	.L744
 	strh	r0, [r6]	@ movhi
-	b	.L739
-.L741:
+	b	.L742
+.L744:
 	cmp	r5, r3
-	bne	.L742
+	bne	.L745
 	strh	r0, [r4]	@ movhi
-	b	.L739
-.L742:
+	b	.L742
+.L745:
 	cmp	r1, r3
 	it	eq
 	strheq	r0, [r2]	@ movhi
-	b	.L739
-.L744:
+	b	.L742
+.L747:
 	.align	2
-.L743:
+.L746:
 	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
@@ -5289,51 +5332,51 @@ FtlGcRefreshOpenBlock:
 FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L755+12
+	ldr	ip, .L758+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L753
-	ldr	r6, .L755
+	beq	.L756
+	ldr	r6, .L758
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L753
-	ldr	r4, .L755+4
+	beq	.L756
+	ldr	r4, .L758+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L753
-	ldr	r2, .L755+8
+	beq	.L756
+	ldr	r2, .L758+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L753
+	beq	.L756
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L747
+	bne	.L750
 	strh	r0, [ip]	@ movhi
-.L753:
+.L756:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L747:
+.L750:
 	cmp	r7, r3
-	bne	.L748
+	bne	.L751
 	strh	r0, [r6]	@ movhi
-	b	.L753
-.L748:
+	b	.L756
+.L751:
 	cmp	r5, r3
-	bne	.L749
+	bne	.L752
 	strh	r0, [r4]	@ movhi
-	b	.L753
-.L749:
+	b	.L756
+.L752:
 	cmp	r1, r3
-	bne	.L754
+	bne	.L757
 	strh	r0, [r2]	@ movhi
-	b	.L753
-.L754:
+	b	.L756
+.L757:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, pc}
-.L756:
+.L759:
 	.align	2
-.L755:
+.L758:
 	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
@@ -5355,44 +5398,44 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L765
+	ldr	r3, .L768
 	ldr	r3, [r3]
-	cbz	r3, .L758
-	ldr	r3, .L765+4
+	cbz	r3, .L761
+	ldr	r3, .L768+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #39
 	itt	hi
 	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L758:
-	ldr	r2, .L765+8
+.L761:
+	ldr	r2, .L768+8
 	movs	r1, #0
-	ldr	r5, .L765+12
+	ldr	r5, .L768+12
 	ldrh	r3, [r2]
-.L759:
+.L762:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L761
+	bhi	.L764
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L765+12
+	ldrls	r2, .L768+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L760
-.L761:
+	b	.L763
+.L764:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L759
-.L760:
+	bne	.L762
+.L763:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L766:
+.L769:
 	.align	2
-.L765:
+.L768:
 	.word	.LANCHOR28
 	.word	.LANCHOR78
 	.word	.LANCHOR116
@@ -5409,22 +5452,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L773
+	ldr	r3, .L776
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L768
-	ldr	r2, .L773+4
+	cbz	r3, .L771
+	ldr	r2, .L776+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L768
-	ldr	r4, .L773+8
+	bne	.L771
+	ldr	r4, .L776+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L773+12
+	ldr	r3, .L776+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -5432,12 +5475,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L768:
+.L771:
 	movs	r0, #0
 	pop	{r4, pc}
-.L774:
+.L777:
 	.align	2
-.L773:
+.L776:
 	.word	.LANCHOR116
 	.word	.LANCHOR112
 	.word	.LANCHOR118
@@ -5455,17 +5498,17 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L777
+	ldr	r3, .L780
 	ldr	r2, [r3]
-	ldr	r3, .L777+4
+	ldr	r3, .L780+4
 	cmp	r2, r3
-	bne	.L775
+	bne	.L778
 	b	flash_enter_slc_mode
-.L775:
-	bx	lr
 .L778:
+	bx	lr
+.L781:
 	.align	2
-.L777:
+.L780:
 	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
@@ -5481,17 +5524,17 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L781
+	ldr	r3, .L784
 	ldr	r2, [r3]
-	ldr	r3, .L781+4
+	ldr	r3, .L784+4
 	cmp	r2, r3
-	bne	.L779
+	bne	.L782
 	b	flash_exit_slc_mode
-.L779:
-	bx	lr
 .L782:
+	bx	lr
+.L785:
 	.align	2
-.L781:
+.L784:
 	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
@@ -5507,7 +5550,7 @@ FW_FlashBlockErase.constprop.41:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L784
+	ldr	r3, .L787
 	movs	r0, #0
 	ldr	r3, [r3]
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
@@ -5524,9 +5567,9 @@ FW_FlashBlockErase.constprop.41:
 	bl	flash_boot_exit_slc_mode
 	uxtb	r0, r4
 	pop	{r3, r4, r5, pc}
-.L785:
+.L788:
 	.align	2
-.L784:
+.L787:
 	.word	.LANCHOR18
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
@@ -5556,54 +5599,54 @@ BuildFlashLsbPageTable:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r1
-	cbnz	r0, .L788
-	ldr	r3, .L828
-.L789:
+	cbnz	r0, .L791
+	ldr	r3, .L831
+.L792:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
 	cmp	r0, #256
-	bne	.L789
-.L795:
+	bne	.L792
+.L798:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L828+4
+	ldr	r0, .L831+4
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r1, .L828
+	ldr	r1, .L831
 	movs	r3, #0
-	ldr	r0, .L828+4
-.L790:
+	ldr	r0, .L831+4
+.L793:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L814
+	bhi	.L817
 	pop	{r4, pc}
-.L788:
+.L791:
 	cmp	r0, #1
-	bne	.L791
-	ldr	r1, .L828
+	bne	.L794
+	ldr	r1, .L831
 	movs	r3, #0
-.L794:
+.L797:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L792
+	bls	.L795
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L792:
+.L795:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L794
-	b	.L795
-.L791:
+	bne	.L797
+	b	.L798
+.L794:
 	cmp	r0, #2
-	bne	.L796
-	ldr	r1, .L828
+	bne	.L799
+	ldr	r1, .L831
 	movs	r2, #0
-.L798:
+.L801:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -5613,34 +5656,34 @@ BuildFlashLsbPageTable:
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #256
-	bne	.L798
-	b	.L795
-.L796:
+	bne	.L801
+	b	.L798
+.L799:
 	cmp	r0, #3
-	bne	.L799
-	ldr	r1, .L828
+	bne	.L802
+	ldr	r1, .L831
 	movs	r3, #0
-.L802:
+.L805:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L800
+	bls	.L803
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L800:
+.L803:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L802
-	b	.L795
-.L799:
+	bne	.L805
+	b	.L798
+.L802:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L803
-	ldr	r2, .L828
+	bne	.L806
+	ldr	r2, .L831
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5655,7 +5698,7 @@ BuildFlashLsbPageTable:
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L805:
+.L808:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -5665,52 +5708,52 @@ BuildFlashLsbPageTable:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #256
-	bne	.L805
-	b	.L795
-.L803:
+	bne	.L808
+	b	.L798
+.L806:
 	cmp	r0, #5
-	bne	.L806
-	ldr	r2, .L828
-.L807:
+	bne	.L809
+	ldr	r2, .L831
+.L810:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L807
-	ldr	r2, .L828+8
-.L808:
+	bne	.L810
+	ldr	r2, .L831+8
+.L811:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L808
-	b	.L795
-.L806:
+	bne	.L811
+	b	.L798
+.L809:
 	cmp	r0, #6
-	bne	.L809
-	ldr	r0, .L828
+	bne	.L812
+	ldr	r0, .L831
 	mov	r1, r3
-.L812:
+.L815:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L810
+	bls	.L813
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L810:
+.L813:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L812
-	b	.L795
-.L809:
+	bne	.L815
+	b	.L798
+.L812:
 	cmp	r0, #9
-	bne	.L795
-	ldr	r2, .L828
+	bne	.L798
+	ldr	r2, .L831
 	movw	r1, #509
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
@@ -5719,21 +5762,21 @@ BuildFlashLsbPageTable:
 	movs	r2, #2
 	strh	r2, [r3, #4]!	@ movhi
 	movs	r2, #3
-.L813:
+.L816:
 	strh	r2, [r3, #2]!	@ movhi
 	adds	r2, r2, #2
 	uxth	r2, r2
 	cmp	r2, r1
-	bne	.L813
-	b	.L795
-.L814:
+	bne	.L816
+	b	.L798
+.L817:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L790
-.L829:
+	b	.L793
+.L832:
 	.align	2
-.L828:
+.L831:
 	.word	.LANCHOR16
 	.word	.LANCHOR120
 	.word	.LANCHOR16+30
@@ -5749,82 +5792,82 @@ BuildFlashLsbPageTable:
 FlashDieInfoInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L844
+	ldr	r3, .L847
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L844+4
-	ldr	fp, .L844+36
+	ldr	r5, .L847+4
+	ldr	fp, .L847+36
 	ldrh	r0, [r3, #10]
 	strb	r4, [r5]
 	strb	r4, [fp]
 	bl	FlashBlockAlignInit
 	movs	r2, #8
 	mov	r1, r4
-	ldr	r0, .L844+8
+	ldr	r0, .L847+8
 	bl	ftl_memset
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L844+12
+	ldr	r0, .L847+12
 	bl	ftl_memset
 	movs	r2, #128
 	mov	r1, r4
-	ldr	r0, .L844+16
+	ldr	r0, .L847+16
 	bl	ftl_memset
-	ldr	r3, .L844+20
-	ldr	r10, .L844+32
+	ldr	r3, .L847+20
+	ldr	r10, .L847+32
 	ldr	r6, [r3]
-	ldr	r3, .L844+8
+	ldr	r3, .L847+8
 	ldrb	r8, [r6]	@ zero_extendqisi2
 	adds	r7, r6, #1
-.L832:
+.L835:
 	mov	r2, r8
 	add	r1, r10, r4, lsl #3
 	mov	r0, r7
 	str	r3, [sp, #4]
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L831
+	cbnz	r0, .L834
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r1, .L844+12
+	ldr	r1, .L847+12
 	strb	r4, [r3, r2]
 	str	r0, [r1, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r5]
-.L831:
+.L834:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L832
+	bne	.L835
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	strb	r3, [fp]
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L833
-.L837:
+	beq	.L836
+.L840:
 	ldrh	r2, [r6, #14]
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrb	r2, [r6, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L844+24
+	ldr	r2, .L847+24
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L833:
-	ldr	r3, .L844+28
+.L836:
+	ldr	r3, .L847+28
 	movs	r4, #0
-	ldr	r10, .L844+12
+	ldr	r10, .L847+12
 	ldr	fp, [r3]
-	ldr	r3, .L844+8
-.L836:
+	ldr	r3, .L847+8
+.L839:
 	str	r3, [sp, #4]
 	mov	r2, r8
-	ldr	r3, .L844+32
+	ldr	r3, .L847+32
 	mov	r0, r7
 	add	r1, r3, r4, lsl #3
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L834
+	cbnz	r0, .L837
 	ldrh	r2, [r6, #14]
 	ldrb	r1, [r5]	@ zero_extendqisi2
 	and	r0, r2, #65280
@@ -5833,21 +5876,21 @@ FlashDieInfoInit:
 	muls	r2, r0, r2
 	str	r2, [r10, r1, lsl #2]
 	ldrb	r0, [r6, #23]	@ zero_extendqisi2
-	cbz	r0, .L835
+	cbz	r0, .L838
 	lsls	r2, r2, #1
 	str	r2, [r10, r1, lsl #2]
-.L835:
+.L838:
 	adds	r2, r1, #1
 	strb	r4, [r3, r1]
 	strb	r2, [r5]
-.L834:
+.L837:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L836
-	b	.L837
-.L845:
+	bne	.L839
+	b	.L840
+.L848:
 	.align	2
-.L844:
+.L847:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -5855,7 +5898,7 @@ FlashDieInfoInit:
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR122
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR22
 	.word	.LANCHOR121
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
@@ -5875,10 +5918,10 @@ ReadFlashInfo:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L849
+	ldr	r3, .L852
 	movs	r2, #0
 	ldr	r1, [r3]
-	ldr	r3, .L849+4
+	ldr	r3, .L852+4
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	smulbb	r3, r3, r0
@@ -5886,10 +5929,10 @@ ReadFlashInfo:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L849+8
+	ldr	r3, .L852+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L849+12
+	ldr	r3, .L852+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -5903,30 +5946,30 @@ ReadFlashInfo:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L849+16
+	ldr	r0, .L852+16
 	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L849+20
+	ldr	r3, .L852+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L847:
+.L850:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L848
+	bhi	.L851
 	pop	{r4, r5, r6, pc}
-.L848:
+.L851:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L847
-.L850:
+	b	.L850
+.L853:
 	.align	2
-.L849:
+.L852:
 	.word	.LANCHOR18
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR33
 	.word	.LANCHOR68
 	.word	.LANCHOR26
@@ -5943,35 +5986,35 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L857
+	ldr	r3, .L860
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L857+4
+	ldr	r7, .L860+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L857+20
+	ldr	r8, .L860+20
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L854:
+.L857:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L851
+	beq	.L854
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L853
+	bhi	.L856
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L857+8
+	ldr	r0, .L860+8
 	bl	printf
-	ldr	r1, .L857+12
-	ldr	r0, .L857+16
+	ldr	r1, .L860+12
+	ldr	r0, .L860+16
 	bl	printf
-.L853:
+.L856:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -5981,12 +6024,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L854
-.L851:
+	bne	.L857
+.L854:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L858:
+.L861:
 	.align	2
-.L857:
+.L860:
 	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LC5
@@ -6006,7 +6049,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L860
+	ldr	r0, .L863
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -6015,9 +6058,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L861:
+.L864:
 	.align	2
-.L860:
+.L863:
 	.word	.LANCHOR74
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -6031,7 +6074,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L863
+	ldr	r3, .L866
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -6044,9 +6087,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L864:
+.L867:
 	.align	2
-.L863:
+.L866:
 	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -6071,12 +6114,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L866:
+.L869:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L870
-	ldr	r3, .L885
+	bhi	.L873
+	ldr	r3, .L888
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -6084,59 +6127,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L871:
+.L874:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L875
+	bhi	.L878
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L870:
+.L873:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L867:
+.L870:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L869
+	bhi	.L872
 	adds	r3, r3, #1
-	b	.L866
-.L869:
+	b	.L869
+.L872:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L868
-	cbz	r1, .L868
+	bne	.L871
+	cbz	r1, .L871
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L868:
+.L871:
 	adds	r2, r2, #1
-	b	.L867
-.L875:
+	b	.L870
+.L878:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L872
+	bls	.L875
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L873
-.L874:
+	cbnz	r0, .L876
+.L877:
 	adds	r6, r6, #1
-	b	.L871
-.L872:
+	b	.L874
+.L875:
 	cmp	r3, #0
-	bne	.L874
+	bne	.L877
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L874
-.L876:
+	beq	.L877
+.L879:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -6145,16 +6188,16 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L874
-.L873:
+	b	.L877
+.L876:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L876
-	b	.L874
-.L886:
+	beq	.L879
+	b	.L877
+.L889:
 	.align	2
-.L885:
+.L888:
 	.word	.LANCHOR53
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -6170,14 +6213,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L890
-	ldr	r4, .L890+4
+	ldr	r5, .L893
+	ldr	r4, .L893+4
 	ldr	r2, [r5]
-	ldr	r7, .L890+8
-	ldr	r6, .L890+12
+	ldr	r7, .L893+8
+	ldr	r6, .L893+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L890+44
+	ldr	r8, .L893+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -6185,7 +6228,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L890+16
+	ldr	r3, .L893+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -6196,47 +6239,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L888:
+.L891:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L889
-	ldr	r3, .L890+20
+	bne	.L892
+	ldr	r3, .L893+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L890+24
+	ldr	r2, .L893+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L890+28
+	ldr	r2, .L893+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L890+32
+	ldr	r2, .L893+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L890+36
+	ldr	r2, .L893+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L890+40
+	ldr	r2, .L893+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L889:
+.L892:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L888
-.L891:
+	b	.L891
+.L894:
 	.align	2
-.L890:
+.L893:
 	.word	.LANCHOR64
 	.word	.LANCHOR125
 	.word	.LANCHOR57
@@ -6263,57 +6306,57 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L893
+	ldr	r3, .L896
 	movw	r2, #65535
 	mov	r1, r4
-	ldr	r5, .L893+4
+	ldr	r5, .L896+4
 	str	r4, [r3]
-	ldr	r3, .L893+8
+	ldr	r3, .L896+8
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L893+12
+	ldr	r3, .L896+12
 	str	r4, [r3]
-	ldr	r3, .L893+16
+	ldr	r3, .L896+16
 	str	r4, [r3]
-	ldr	r3, .L893+20
+	ldr	r3, .L896+20
 	str	r2, [r3]
-	ldr	r3, .L893+24
+	ldr	r3, .L896+24
 	str	r4, [r3]
-	ldr	r3, .L893+28
+	ldr	r3, .L896+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L893+32
+	ldr	r3, .L896+32
 	ldrh	r2, [r3]
-	ldr	r3, .L893+36
+	ldr	r3, .L896+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L893+40
+	ldr	r3, .L896+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L893+44
+	ldr	r3, .L896+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L893+48
+	ldr	r0, .L896+48
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L893+52
+	ldr	r0, .L896+52
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L894:
+.L897:
 	.align	2
-.L893:
+.L896:
 	.word	.LANCHOR132
 	.word	.LANCHOR41
 	.word	.LANCHOR133
@@ -6340,11 +6383,11 @@ FtlVariablesInit:
 SupperBlkListInit:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L906
+	ldr	r3, .L909
 	movs	r2, #6
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r6, .L906+4
+	ldr	r6, .L909+4
 	sub	sp, sp, #24
 	movs	r4, #0
 	ldrh	r3, [r3]
@@ -6354,39 +6397,39 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L906+8
-	ldr	r2, .L906+12
-	ldr	r1, .L906+16
+	ldr	r3, .L909+8
+	ldr	r2, .L909+12
+	ldr	r1, .L909+16
 	str	r4, [r3]
-	ldr	r3, .L906+20
+	ldr	r3, .L909+20
 	strh	r4, [r2]	@ movhi
 	strh	r4, [r1]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L906+24
+	ldr	r3, .L909+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L906+28
+	ldr	r3, .L909+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L896:
-	ldr	r3, .L906+32
+.L899:
+	ldr	r3, .L909+32
 	sxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L903
-	ldr	r3, .L906+36
+	bge	.L906
+	ldr	r3, .L909+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
 	ldrh	r2, [r3]
-	ldr	r3, .L906+40
+	ldr	r3, .L909+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L904
-.L898:
+	b	.L907
+.L901:
 	str	r3, [sp, #20]
-	ldr	r3, .L906+44
+	ldr	r3, .L909+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
@@ -6394,85 +6437,85 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L897
+	cbnz	r0, .L900
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
 	sxth	r6, r6
-.L897:
+.L900:
 	adds	r3, r3, #1
-.L904:
+.L907:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L898
+	blt	.L901
 	lsls	r3, r7, #1
-	cbz	r6, .L899
+	cbz	r6, .L902
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L900:
+.L903:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L906+48
+	ldr	r3, .L909+48
 	strh	r6, [r2, #4]	@ movhi
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L901
-	ldr	r3, .L906+52
+	beq	.L904
+	ldr	r3, .L909+52
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L901
-	ldr	r3, .L906+56
+	beq	.L904
+	ldr	r3, .L909+56
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L901
-	ldr	r3, .L906+60
+	beq	.L904
+	ldr	r3, .L909+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L902
+	cbnz	r3, .L905
 	add	r8, r8, #1
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L901:
+.L904:
 	adds	r4, r4, #1
-	b	.L896
-.L899:
-	ldr	r2, .L906+60
+	b	.L899
+.L902:
+	ldr	r2, .L909+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L900
-.L902:
+	b	.L903
+.L905:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L901
-.L903:
+	b	.L904
+.L906:
 	ldr	r2, [sp, #8]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r3, r5
-	bge	.L905
-	ldr	r1, .L906+64
-	movw	r2, #2645
-	ldr	r0, .L906+68
+	bge	.L908
+	ldr	r1, .L909+64
+	movw	r2, #2647
+	ldr	r0, .L909+68
 	bl	printf
-	ldr	r1, .L906+72
-	ldr	r0, .L906+76
+	ldr	r1, .L909+72
+	ldr	r0, .L909+76
 	bl	printf
-.L905:
+.L908:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L907:
+.L910:
 	.align	2
-.L906:
+.L909:
 	.word	.LANCHOR41
 	.word	.LANCHOR81
 	.word	.LANCHOR87
@@ -6505,16 +6548,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L909
+	ldr	r2, .L912
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L909+4
+	ldr	r4, .L912+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L909+8
+	ldr	r2, .L912+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L909+12
+	ldr	r3, .L912+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -6522,14 +6565,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L909+16
+	ldr	r3, .L912+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L910:
+.L913:
 	.align	2
-.L909:
+.L912:
 	.word	.LANCHOR109
 	.word	.LANCHOR54
 	.word	.LANCHOR110
@@ -6550,13 +6593,13 @@ idb_init:
 	push	{r3, lr}
 	mov	r2, #262144
 	movs	r1, #0
-	ldr	r0, .L912
+	ldr	r0, .L915
 	bl	ftl_memset
 	movs	r0, #0
 	pop	{r3, pc}
-.L913:
+.L916:
 	.align	2
-.L912:
+.L915:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -6586,13 +6629,13 @@ FlashReadIdbData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	mov	r2, #2048
-	ldr	r1, .L916
+	ldr	r1, .L919
 	bl	ftl_memcpy
 	movs	r0, #0
 	pop	{r3, pc}
-.L917:
+.L920:
 	.align	2
-.L916:
+.L919:
 	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
@@ -6608,35 +6651,35 @@ FlashLoadPhyInfoInRam:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #0
-	ldr	r7, .L926
-	ldr	r5, .L926+4
-.L921:
+	ldr	r7, .L929
+	ldr	r5, .L929+4
+.L924:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
 	mov	r4, r0
-	cbnz	r0, .L919
-	ldr	r5, .L926+8
+	cbnz	r0, .L922
+	ldr	r5, .L929+8
 	mov	r3, r4
-	ldr	r2, .L926+12
+	ldr	r2, .L929+12
 	add	r5, r5, r8
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L920:
+.L923:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L923
+	beq	.L926
 	adds	r3, r3, #1
 	cmp	r3, #4
-	bne	.L920
-.L923:
-	ldr	r6, .L926+16
+	bne	.L923
+.L926:
+	ldr	r6, .L929+16
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L926+20
+	ldr	r0, .L929+20
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r5
@@ -6644,19 +6687,19 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	ldrh	r0, [r6, #10]
 	bl	FlashBlockAlignInit
-	b	.L918
-.L919:
+	b	.L921
+.L922:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
 	cmp	r6, #81
-	bne	.L921
+	bne	.L924
 	mov	r4, #-1
-.L918:
+.L921:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L927:
+.L930:
 	.align	2
-.L926:
+.L929:
 	.word	.LANCHOR142+1
 	.word	.LANCHOR22
 	.word	.LANCHOR142
@@ -6677,15 +6720,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L929:
+.L932:
 	cmp	r3, r2
-	bne	.L930
+	bne	.L933
 	pop	{r4, pc}
-.L930:
+.L933:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L929
+	b	.L932
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6705,15 +6748,15 @@ NandcCopy1KB:
 	add	r6, r0, #512
 	add	r0, r2, r4, lsl #9
 	ldr	r5, [sp, #16]
-	bne	.L932
-	cbz	r3, .L933
+	bne	.L935
+	cbz	r3, .L936
 	lsls	r1, r3, #30
-	bne	.L934
+	bne	.L937
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L933:
-	cbz	r5, .L931
+.L936:
+	cbz	r5, .L934
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsrs	r4, r4, #1
 	ldrb	r3, [r5]	@ zero_extendqisi2
@@ -6726,21 +6769,21 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L934:
+.L937:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L933
-.L932:
-	cbz	r3, .L937
+	b	.L936
+.L935:
+	cbz	r3, .L940
 	lsls	r2, r3, #30
-	bne	.L938
+	bne	.L941
 	mov	r1, r0
 	mov	r2, #256
 	mov	r0, r3
 	bl	ftl_memcpy32
-.L937:
-	cbz	r5, .L931
+.L940:
+	cbz	r5, .L934
 	lsrs	r4, r4, #1
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
@@ -6752,14 +6795,14 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L931:
+.L934:
 	pop	{r4, r5, r6, pc}
-.L938:
+.L941:
 	mov	r1, r0
 	mov	r2, #1024
 	mov	r0, r3
 	bl	ftl_memcpy
-	b	.L937
+	b	.L940
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6774,7 +6817,7 @@ NandcXferData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L985
+	ldr	r3, .L988
 	sub	sp, sp, #96
 	mov	r6, r0
 	mov	r10, r2
@@ -6782,14 +6825,14 @@ NandcXferData:
 	ldr	r5, [r3, r0, lsl #3]
 	lsls	r3, r7, #26
 	ldr	r4, [sp, #128]
-	bne	.L950
-	cbnz	r4, .L951
+	bne	.L953
+	cbnz	r4, .L954
 	add	r4, sp, #32
 	movs	r2, #64
 	movs	r1, #255
 	add	r0, sp, #32
 	bl	ftl_memset
-.L951:
+.L954:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6801,10 +6844,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L975
-	ldr	r2, .L985+4
+	bne	.L978
+	ldr	r2, .L988+4
 	lsr	r0, r10, #1
-	ldr	ip, .L985+12
+	ldr	ip, .L988+12
 	ldr	r3, [r2]
 	cmp	r3, #25
 	ldr	r3, [sp, #12]
@@ -6812,31 +6855,31 @@ NandcXferData:
 	movcc	r7, #64
 	movcs	r7, #128
 	mov	r1, r3
-.L954:
+.L957:
 	cmp	r1, r0
 	add	r4, r4, #4
 	add	r6, r7, r3
-	bcc	.L955
-	ldr	r3, .L985+8
+	bcc	.L958
+	ldr	r3, .L988+8
 	lsr	r4, r10, #2
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L956:
+.L959:
 	cmp	r2, r4
-	bcs	.L952
-	cbnz	r0, .L962
-.L952:
+	bcs	.L955
+	cbnz	r0, .L965
+.L955:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L963:
-	ldr	r3, .L985+8
+.L966:
+	ldr	r3, .L988+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L949
+	bls	.L952
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L949
+	cbnz	r3, .L952
 	ldr	r3, [r5]
 	and	r2, r3, #139264
 	cmp	r2, #139264
@@ -6844,12 +6887,12 @@ NandcXferData:
 	moveq	r8, #-1
 	orreq	r3, r3, #131072
 	streq	r3, [r5]
-.L949:
+.L952:
 	mov	r0, r8
 	add	sp, sp, #96
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L955:
+.L958:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
 	adds	r1, r1, #1
@@ -6862,20 +6905,20 @@ NandcXferData:
 	strb	lr, [r4, #-2]
 	strb	r3, [r4, #-1]
 	mov	r3, r6
-	b	.L954
-.L962:
+	b	.L957
+.L965:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L978
+	bmi	.L981
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L978
+	bne	.L981
 	cmp	r1, #5
-	bls	.L958
+	bls	.L961
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6896,18 +6939,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L984:
+.L987:
 	orr	r3, r3, r6, lsl #5
-.L960:
+.L963:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L957:
+.L960:
 	adds	r2, r2, #1
-	b	.L956
-.L958:
+	b	.L959
+.L961:
 	cmp	r1, #3
-	bls	.L960
+	bls	.L963
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6928,33 +6971,33 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L984
-.L978:
+	b	.L987
+.L981:
 	mov	r8, #-1
-	b	.L957
-.L975:
+	b	.L960
+.L978:
 	mov	r8, #0
-	b	.L952
-.L950:
+	b	.L955
+.L953:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L964
+	bne	.L967
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L965:
+.L968:
 	cmp	r8, r10
-	bcc	.L967
+	bcc	.L970
 	mov	r8, #0
-	b	.L963
-.L967:
+	b	.L966
+.L970:
 	and	fp, r8, #3
-	cbz	r7, .L980
+	cbz	r7, .L983
 	add	r3, r7, r8, lsl #9
-.L966:
+.L969:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
@@ -6973,11 +7016,11 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L965
-.L980:
+	b	.L968
+.L983:
 	mov	r3, r7
-	b	.L966
-.L964:
+	b	.L969
+.L967:
 	mov	r8, #0
 	movs	r2, #2
 	mov	r3, r8
@@ -6993,16 +7036,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L968:
+.L971:
 	cmp	r4, r10
-	bcs	.L963
+	bcs	.L966
 	mov	r0, r6
 	adds	r4, r4, #2
 	bl	NandcXferComp
 	ldr	r3, [r5, #32]
 	cmp	r10, r4
 	str	r3, [sp, #28]
-	bls	.L969
+	bls	.L972
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -7011,10 +7054,10 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L969:
+.L972:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L981
+	bmi	.L984
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
@@ -7023,7 +7066,7 @@ NandcXferData:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L970:
+.L973:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -7040,14 +7083,14 @@ NandcXferData:
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L968
-.L981:
+	b	.L971
+.L984:
 	mov	r8, #-1
-	b	.L970
-.L986:
+	b	.L973
+.L989:
 	.align	2
-.L985:
-	.word	.LANCHOR6
+.L988:
+	.word	.LANCHOR0
 	.word	.LANCHOR32
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -7065,21 +7108,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L989
+	ldr	r3, .L992
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L988
-	ldr	r3, .L989+4
-	ldr	r2, .L989+8
+	cbnz	r0, .L991
+	ldr	r3, .L992+4
+	ldr	r2, .L992+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L988:
+.L991:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -7102,12 +7145,12 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L990:
+.L993:
 	.align	2
-.L989:
+.L992:
 	.word	.LANCHOR31
-	.word	.LANCHOR2
 	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashReadRawPage, .-FlashReadRawPage
 	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
@@ -7122,7 +7165,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1016
+	ldr	r3, .L1019
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -7130,7 +7173,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L1016+4
+	ldr	r3, .L1019+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -7138,9 +7181,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L1005
+	beq	.L1008
 	movs	r0, #1
-	ldr	r4, .L1016+8
+	ldr	r4, .L1019+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -7157,37 +7200,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L994
-.L1003:
+	bne	.L997
+.L1006:
 	mov	r6, #-1
-.L991:
+.L994:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L994:
+.L997:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1016+12
+	ldr	r0, .L1019+12
 	bl	printf
-	ldr	r2, .L1016+16
+	ldr	r2, .L1019+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L996
+	bcs	.L999
 	str	r3, [r2]
-	b	.L991
-.L996:
+	b	.L994
+.L999:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L993:
+.L996:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L1001:
+.L1004:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7197,72 +7240,72 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L997
+	bhi	.L1000
 	cmp	r0, #2
-	bhi	.L1007
+	bhi	.L1010
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L1007
+	bls	.L1010
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L999:
+.L1002:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L1000:
-	cbz	r5, .L1002
+.L1003:
+	cbz	r5, .L1005
 	mov	r1, r5
-	ldr	r0, .L1016+20
+	ldr	r0, .L1019+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L1002:
+.L1005:
 	cmp	r8, #0
-	beq	.L991
+	beq	.L994
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L1016+24
+	ldr	r0, .L1019+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L1003
+	beq	.L1006
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L991
-.L1005:
+	b	.L994
+.L1008:
 	mov	r6, #1024
-	b	.L993
-.L997:
+	b	.L996
+.L1000:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L1008
+	bls	.L1011
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L1000
+	bhi	.L1003
 	str	r4, [sp, #16]
-.L1008:
+.L1011:
 	movs	r4, #0
-	b	.L998
-.L1007:
+	b	.L1001
+.L1010:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L998:
+.L1001:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L1001
+	bls	.L1004
 	mov	r3, r5
 	mov	r5, r10
-	b	.L999
-.L1017:
+	b	.L1002
+.L1020:
 	.align	2
-.L1016:
+.L1019:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
 	.word	.LANCHOR24
@@ -7290,16 +7333,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L1019
-	ldr	r10, .L1037+20
+	bne	.L1022
+	ldr	r10, .L1040+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L1020
-.L1022:
-	ldr	r3, .L1037
+	bne	.L1023
+.L1025:
+	ldr	r3, .L1040
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1019
-	ldr	r3, .L1037+4
+	cbz	r3, .L1022
+	ldr	r3, .L1040+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7311,16 +7354,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L1023
-	ldr	r3, .L1037+8
+	beq	.L1026
+	ldr	r3, .L1040+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1019
-.L1023:
+	bls	.L1022
+.L1026:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L1019
-.L1020:
+	b	.L1022
+.L1023:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7330,15 +7373,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L1022
+	beq	.L1025
 	mov	r4, r0
-.L1019:
-	ldr	r10, .L1037+24
+.L1022:
+	ldr	r10, .L1040+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L1018
+	beq	.L1021
 	adds	r2, r4, #1
-	bne	.L1018
+	bne	.L1021
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7348,13 +7391,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1037+12
+	ldr	r0, .L1040+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L1018
-	ldr	r3, .L1037+16
+	bne	.L1021
+	ldr	r3, .L1040+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1018
+	cbz	r3, .L1021
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7366,20 +7409,20 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1018:
+.L1021:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1038:
+.L1041:
 	.align	2
-.L1037:
+.L1040:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
 	.word	.LC12
 	.word	.LANCHOR15
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR145
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
@@ -7395,7 +7438,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1050
+	ldr	r4, .L1053
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7413,33 +7456,33 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1050+4
+	ldr	r5, .L1053+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1040
+	beq	.L1043
 	cmp	r8, #-1
-	bne	.L1041
-.L1040:
+	bne	.L1044
+.L1043:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1041
+	bpl	.L1044
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1049:
+.L1052:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1041:
+.L1044:
 	movs	r3, #1
-	b	.L1049
-.L1051:
+	b	.L1052
+.L1054:
 	.align	2
-.L1050:
+.L1053:
 	.word	.LANCHOR24
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -7457,7 +7500,7 @@ FlashLoadPhyInfo:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1066+32
+	ldr	fp, .L1069+32
 	movs	r4, #0
 	movs	r7, #4
 	strb	r3, [sp, #20]
@@ -7470,21 +7513,21 @@ FlashLoadPhyInfo:
 	mov	r0, r4
 	ldr	r3, [fp]
 	mov	r6, #-1
-	ldr	r8, .L1066+36
-	ldr	r10, .L1066+40
+	ldr	r8, .L1069+36
+	ldr	r10, .L1069+40
 	str	r3, [sp, #4]
-	ldr	r5, .L1066
+	ldr	r5, .L1069
 	ldr	r3, [r8]
 	str	r4, [r10]
 	str	r3, [r5]
 	bl	flash_enter_slc_mode
 	str	r10, [sp, #12]
 	mov	r10, r8
-.L1053:
+.L1056:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1055:
+.L1058:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -7494,58 +7537,58 @@ FlashLoadPhyInfo:
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1054
+	bne	.L1057
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1054
+	bne	.L1057
 	add	r8, r8, #1
 	cmp	r8, #4
-	bne	.L1055
-.L1056:
+	bne	.L1058
+.L1059:
 	ldr	r3, [sp, #4]
 	subs	r7, r7, #1
 	add	r4, r4, r3
-	bne	.L1053
+	bne	.L1056
 	mov	r0, r7
-	b	.L1065
-.L1057:
+	b	.L1068
+.L1060:
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	js_hash
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1063
-	ldr	r6, .L1066+4
+	bne	.L1066
+	ldr	r6, .L1069+4
 	movs	r2, #32
 	add	r1, r8, #160
 	mov	r0, r6
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1066+8
+	ldr	r0, .L1069+8
 	adds	r1, r1, #192
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1066+12
+	ldr	r0, .L1069+12
 	adds	r1, r1, #224
 	bl	ftl_memcpy
 	ldrh	r0, [r6, #10]
 	bl	FlashBlockAlignInit
 	ldr	r6, [r5]
 	mov	r0, r4
-	ldr	r3, .L1066+16
+	ldr	r3, .L1069+16
 	ldr	r1, [fp]
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1066+20
+	ldr	r3, .L1069+20
 	adds	r0, r0, #1
 	cmp	r0, #1
 	itte	ls
@@ -7554,36 +7597,36 @@ FlashLoadPhyInfo:
 	strhi	r0, [r3]
 	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldr	r3, .L1066+24
+	ldr	r3, .L1069+24
 	strb	r2, [r3]
-	b	.L1056
-.L1063:
+	b	.L1059
+.L1066:
 	mov	r6, #-1
-	b	.L1056
-.L1054:
+	b	.L1059
+.L1057:
 	ldr	r8, [r5]
-	ldr	r2, .L1066+28
+	ldr	r2, .L1069+28
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1056
+	bne	.L1059
 	cmp	r6, #0
-	bne	.L1057
+	bne	.L1060
 	ldr	r1, [fp]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1066+20
+	ldr	r3, .L1069+20
 	adds	r0, r0, #1
 	str	r0, [r3]
 	mov	r0, r6
-.L1065:
+.L1068:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1067:
+.L1070:
 	.align	2
-.L1066:
+.L1069:
 	.word	.LANCHOR146
 	.word	.LANCHOR31
 	.word	.LANCHOR7
@@ -7592,7 +7635,7 @@ FlashLoadPhyInfo:
 	.word	.LANCHOR149
 	.word	.LANCHOR150
 	.word	1312902724
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR147
 	.word	.LANCHOR148
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
@@ -7614,8 +7657,8 @@ ToshibaReadRetrial:
 	mov	fp, r3
 	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1095
-	ldr	r2, .L1095+4
+	ldr	r3, .L1098
+	ldr	r2, .L1098+4
 	ldr	r4, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
@@ -7625,83 +7668,83 @@ ToshibaReadRetrial:
 	subs	r3, r3, #67
 	add	r5, r4, r5, lsl #8
 	cmp	r3, #1
-	bls	.L1085
-	ldr	r3, .L1095+8
+	bls	.L1088
+	ldr	r3, .L1098+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1086
+	cbz	r3, .L1089
 	movs	r0, #0
 	bl	NandcSetDdrMode
 	movs	r3, #1
-.L1086:
+.L1089:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1069:
+.L1072:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1071:
-	ldr	r3, .L1095+12
+.L1074:
+	ldr	r3, .L1098+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1080
+	bcc	.L1083
 	ldr	r10, [sp, #4]
-.L1079:
+.L1082:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1081
+	bhi	.L1084
 	bl	SandiskSetRRPara
-.L1082:
+.L1085:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1095+16
+	ldr	r2, .L1098+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1083
+	bcc	.L1086
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1083:
+.L1086:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1068
+	cbz	r3, .L1071
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1068:
+.L1071:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1085:
+.L1088:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1069
-.L1080:
+	b	.L1072
+.L1083:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1072
+	bhi	.L1075
 	bl	SandiskSetRRPara
-.L1073:
+.L1076:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1074
-	ldr	r3, .L1095+12
+	bne	.L1077
+	ldr	r3, .L1098+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7709,14 +7752,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1074:
+.L1077:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1075
+	cbz	r3, .L1078
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7727,10 +7770,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1076:
+.L1079:
 	cmp	r10, #-1
-	beq	.L1077
-	ldr	r2, .L1095+16
+	beq	.L1080
+	ldr	r2, .L1098+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7739,30 +7782,30 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1079
+	bcc	.L1082
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1077:
+.L1080:
 	add	r8, r8, #1
-	b	.L1071
-.L1072:
-	bl	ToshibaSetRRPara
-	b	.L1073
+	b	.L1074
 .L1075:
+	bl	ToshibaSetRRPara
+	b	.L1076
+.L1078:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1076
-.L1081:
+	b	.L1079
+.L1084:
 	bl	ToshibaSetRRPara
-	b	.L1082
-.L1096:
+	b	.L1085
+.L1099:
 	.align	2
-.L1095:
-	.word	.LANCHOR6
+.L1098:
+	.word	.LANCHOR0
 	.word	.LANCHOR9
 	.word	.LANCHOR30
 	.word	.LANCHOR151
@@ -7786,35 +7829,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1110
+	ldr	r2, .L1113
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1098:
-	ldr	r3, .L1110+4
+.L1101:
+	ldr	r3, .L1113+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1102
-.L1101:
+	bcc	.L1105
+.L1104:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1110+8
+	ldr	r3, .L1113+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1097
+	bcc	.L1100
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1097:
+.L1100:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1102:
+.L1105:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7824,27 +7867,27 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1099
-	ldr	r3, .L1110+8
+	beq	.L1102
+	ldr	r3, .L1113+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1105
+	bcc	.L1108
 	mov	r8, #0
 	mov	r10, r8
-.L1099:
+.L1102:
 	adds	r6, r6, #1
-	b	.L1098
-.L1105:
-	mov	r4, r0
 	b	.L1101
-.L1111:
+.L1108:
+	mov	r4, r0
+	b	.L1104
+.L1114:
 	.align	2
-.L1110:
-	.word	.LANCHOR6
+.L1113:
+	.word	.LANCHOR0
 	.word	.LANCHOR151
 	.word	.LANCHOR33
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
@@ -7861,28 +7904,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1137
+	ldr	r3, .L1140
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1137+4
+	ldr	r3, .L1140+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1113
+	bne	.L1116
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1136:
-.L1114:
+.L1139:
+.L1117:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1124:
+.L1127:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1137+8
+	ldr	r3, .L1140+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7890,12 +7933,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1115:
-	ldr	r3, .L1137+12
+.L1118:
+	ldr	r3, .L1140+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1119
-.L1118:
+	bcc	.L1122
+.L1121:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7910,7 +7953,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1120
+	bcc	.L1123
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7918,26 +7961,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1137+16
+	ldr	r0, .L1140+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1122
-	ldr	r3, .L1137+4
+	bne	.L1125
+	ldr	r3, .L1140+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1112
+	beq	.L1115
 	adds	r2, r4, #1
-	bne	.L1112
+	bne	.L1115
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1124
-.L1113:
-	ldr	r3, .L1137+20
+	b	.L1127
+.L1116:
+	ldr	r3, .L1140+20
 	smull	r2, r3, r2, r3
-	b	.L1136
-.L1119:
+	b	.L1139
+.L1122:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -7962,49 +8005,49 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1116
+	beq	.L1119
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1126
+	bcc	.L1129
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1116:
+.L1119:
 	ldr	r10, [sp, #20]
-	b	.L1115
-.L1126:
+	b	.L1118
+.L1129:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1118
-.L1122:
+	b	.L1121
+.L1125:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1112:
+.L1115:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1120:
+.L1123:
 	cmp	r8, #0
-	beq	.L1112
+	beq	.L1115
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1112
-.L1138:
+	b	.L1115
+.L1141:
 	.align	2
-.L1137:
+.L1140:
 	.word	.LANCHOR33
 	.word	.LANCHOR15
-	.word	.LANCHOR6
+	.word	.LANCHOR0
 	.word	.LANCHOR151
 	.word	.LC13
 	.word	1431655766
@@ -8022,7 +8065,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r4, .L1156
+	ldr	r4, .L1159
 	mov	r8, #0
 	mov	r6, #-1
 	mov	fp, r2
@@ -8032,7 +8075,7 @@ HynixReadRetrial:
 	adds	r2, r4, r0
 	ldrb	r5, [r2, #12]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1156+4
+	ldr	r3, .L1159+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
@@ -8040,38 +8083,38 @@ HynixReadRetrial:
 	it	ls
 	ldrbls	r5, [r2, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1141:
+.L1144:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1146
-.L1145:
-	ldr	r3, .L1156+4
+	bcc	.L1149
+.L1148:
+	ldr	r3, .L1159+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #7
 	cmp	r3, #1
-	ldr	r3, .L1156+8
+	ldr	r3, .L1159+8
 	ite	ls
 	strbls	r5, [r4, #20]
 	strbhi	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1139
+	bcc	.L1142
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1139:
+.L1142:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1146:
+.L1149:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1156+12
+	ldr	r2, .L1159+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -8085,26 +8128,26 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1143
-	ldr	r3, .L1156+8
+	beq	.L1146
+	ldr	r3, .L1159+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1150
+	bcc	.L1153
 	mov	r10, #0
 	mov	fp, r10
-.L1143:
+.L1146:
 	add	r8, r8, #1
-	b	.L1141
-.L1150:
+	b	.L1144
+.L1153:
 	mov	r6, r0
-	b	.L1145
-.L1157:
+	b	.L1148
+.L1160:
 	.align	2
-.L1156:
+.L1159:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR33
@@ -8123,24 +8166,24 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1161
+	ldr	r3, .L1164
 	mov	r5, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1159
-	ldr	r3, .L1161+4
-	ldr	r2, .L1161+8
+	cbnz	r0, .L1162
+	ldr	r3, .L1164+4
+	ldr	r2, .L1164+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1159
-	ldr	r3, .L1161+12
+	bls	.L1162
+	ldr	r3, .L1164+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1160
+	cbnz	r3, .L1163
 	subs	r6, r6, #2
-.L1159:
+.L1162:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -8169,16 +8212,16 @@ FlashProgPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1160:
+.L1163:
 	movs	r6, #4
-	b	.L1159
-.L1162:
+	b	.L1162
+.L1165:
 	.align	2
-.L1161:
+.L1164:
 	.word	.LANCHOR31
-	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LANCHOR1
+	.word	.LANCHOR4
+	.word	.LANCHOR2
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
@@ -8192,14 +8235,14 @@ FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1172
-	ldr	r4, .L1172+4
+	ldr	r7, .L1175
+	ldr	r4, .L1175+4
 	ldr	r3, [r7]
-	ldr	r10, .L1172+56
-	ldr	fp, .L1172+60
+	ldr	r10, .L1175+56
+	ldr	fp, .L1175+60
 	str	r3, [r4]
-	ldr	r3, .L1172+8
-	ldr	r8, .L1172+64
+	ldr	r3, .L1175+8
+	ldr	r8, .L1175+64
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
 	mov	r2, #2048
@@ -8208,42 +8251,42 @@ FlashSavePhyInfo:
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1172+12
-	ldr	r1, .L1172+16
+	ldr	r3, .L1175+12
+	ldr	r1, .L1175+16
 	str	r10, [r0]
 	adds	r0, r0, #16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1172+20
+	ldr	r3, .L1175+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1172+24
+	ldr	r3, .L1175+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1172+28
+	ldr	r1, .L1175+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1172+32
+	ldr	r1, .L1175+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1172+36
+	ldr	r1, .L1175+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1172+40
+	ldr	r1, .L1175+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1172+44
+	ldr	r1, .L1175+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
 	ldr	r5, [r4]
@@ -8259,7 +8302,7 @@ FlashSavePhyInfo:
 	movs	r0, #0
 	str	r3, [r4]
 	bl	flash_enter_slc_mode
-.L1166:
+.L1169:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
@@ -8286,11 +8329,11 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1164
+	beq	.L1167
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1164
+	bne	.L1167
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
@@ -8300,21 +8343,21 @@ FlashSavePhyInfo:
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1164
-	ldr	r3, .L1172+48
+	bne	.L1167
+	ldr	r3, .L1175+48
 	cmp	r5, #1
 	str	r2, [r3]
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1172+52
+	ldr	r3, .L1175+52
 	str	r6, [r3]
-	beq	.L1167
+	beq	.L1170
 	movs	r5, #1
-.L1164:
+.L1167:
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1166
-.L1165:
+	bne	.L1169
+.L1168:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	clz	r0, r5
@@ -8323,18 +8366,18 @@ FlashSavePhyInfo:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1167:
+.L1170:
 	movs	r5, #2
-	b	.L1165
-.L1173:
+	b	.L1168
+.L1176:
 	.align	2
-.L1172:
+.L1175:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR152
 	.word	.LANCHOR25
 	.word	.LANCHOR22
-	.word	.LANCHOR2
+	.word	.LANCHOR3
 	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
@@ -8345,7 +8388,7 @@ FlashSavePhyInfo:
 	.word	.LANCHOR148
 	.word	1312902724
 	.word	.LANCHOR153
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
@@ -8368,45 +8411,45 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #14]
 	movs	r3, #16
 	strb	r3, [sp, #15]
-	ldr	r3, .L1192
+	ldr	r3, .L1195
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp]
-	ldr	r3, .L1192+4
+	ldr	r3, .L1195+4
 	ldr	r2, [r3]
 	str	r3, [sp, #4]
-	cbz	r2, .L1175
+	cbz	r2, .L1178
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L1175:
+.L1178:
 	mov	r7, #-1
 	movs	r4, #2
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1176:
-	ldr	r3, .L1192+8
+.L1179:
+	ldr	r3, .L1195+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1181
-.L1180:
+	bcc	.L1184
+.L1183:
 	ldr	r0, [sp]
 	bl	FlashBchSel
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
-	cbz	r3, .L1174
+	cbz	r3, .L1177
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1174:
+.L1177:
 	mov	r0, r7
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1181:
-	ldr	r5, .L1192+12
+.L1184:
+	ldr	r5, .L1195+12
 	movs	r6, #0
-	ldr	fp, .L1192+28
-.L1178:
+	ldr	fp, .L1195+28
+.L1181:
 	add	r3, sp, #12
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -8418,52 +8461,52 @@ FlashReadIdbDataRaw:
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1177
+	bne	.L1180
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1178
-.L1179:
+	bne	.L1181
+.L1182:
 	adds	r4, r4, #1
-	b	.L1176
-.L1184:
+	b	.L1179
+.L1187:
 	movs	r7, #0
-	b	.L1180
-.L1177:
+	b	.L1183
+.L1180:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1192+16
+	ldr	r3, .L1195+16
 	cmp	r2, r3
-	bne	.L1179
+	bne	.L1182
 	mov	r1, r8
-	ldr	r0, .L1192+20
+	ldr	r0, .L1195+20
 	bl	printf
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
 	ldr	r3, [r5]
-	ldr	r2, .L1192+8
+	ldr	r2, .L1195+8
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1192+24
+	ldr	r3, .L1195+24
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1184
+	bcs	.L1187
 	str	r4, [r3]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-	b	.L1179
-.L1193:
+	b	.L1182
+.L1196:
 	.align	2
-.L1192:
+.L1195:
 	.word	.LANCHOR33
 	.word	.LANCHOR29
-	.word	.LANCHOR2
+	.word	.LANCHOR3
 	.word	.LANCHOR147
 	.word	-52655045
 	.word	.LC14
 	.word	.LANCHOR149
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
@@ -8476,35 +8519,35 @@ FlashReadIdbDataRaw:
 FlashPageProgMsbFFData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1210
+	ldr	r3, .L1213
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r0
 	mov	r8, r1
 	mov	r4, r2
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1195
-	ldr	r3, .L1210+4
+	cbz	r3, .L1198
+	ldr	r3, .L1213+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1194
-.L1195:
-	ldr	r5, .L1210+8
+	bne	.L1197
+.L1198:
+	ldr	r5, .L1213+8
 	ldr	r3, [r5]
 	ldrb	r6, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r6, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1196
-	ldr	r2, .L1210+12
+	bhi	.L1199
+	ldr	r2, .L1213+12
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1198
+	bmi	.L1201
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1201:
+.L1204:
 	ldrh	r2, [fp, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1194
+	bne	.L1197
 	cmp	r6, #8
 	mov	r2, #32768
 	ite	eq
@@ -8519,24 +8562,24 @@ FlashPageProgMsbFFData:
 	uxth	r4, r4
 	mov	r2, r3
 	bl	FlashProgPage
-.L1202:
+.L1205:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1201
+	bhi	.L1204
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1196:
+.L1199:
 	cmp	r6, #68
-	bne	.L1194
-.L1198:
-	ldr	fp, .L1210+16
-	ldr	r10, .L1210+20
-	b	.L1202
-.L1194:
+	bne	.L1197
+.L1201:
+	ldr	fp, .L1213+16
+	ldr	r10, .L1213+20
+	b	.L1205
+.L1197:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1211:
+.L1214:
 	.align	2
-.L1210:
+.L1213:
 	.word	.LANCHOR15
 	.word	.LANCHOR29
 	.word	.LANCHOR18
@@ -8561,45 +8604,45 @@ idb_write_data:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r2, #63
 	sub	sp, sp, #104
-	bls	.L1213
+	bls	.L1216
 	cmp	r0, #576
-	bcs	.L1214
-	ldr	r2, .L1265
+	bcs	.L1217
+	ldr	r2, .L1268
 	cmp	r0, #64
 	mov	r4, #1
 	str	r4, [r2]
-	bhi	.L1215
+	bhi	.L1218
 	rsb	r0, r0, #64
 	subs	r2, r3, r0
 	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1265+4
+	ldr	r0, .L1268+4
 	lsls	r2, r2, #9
-.L1264:
+.L1267:
 	bl	ftl_memcpy
-.L1253:
+.L1256:
 	movs	r0, #0
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1215:
+.L1218:
 	rsb	r2, r0, #576
 	subs	r0, r0, #64
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1265+4
+	ldr	r3, .L1268+4
 	lsls	r2, r2, #9
 	add	r0, r3, r0, lsl #9
-	b	.L1264
-.L1213:
+	b	.L1267
+.L1216:
 	cmp	r0, #576
-	bcc	.L1253
-.L1214:
-	ldr	r3, .L1265
+	bcc	.L1256
+.L1217:
+	ldr	r3, .L1268
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1253
-	ldr	r3, .L1265+8
+	beq	.L1256
+	ldr	r3, .L1268+8
 	ldr	r2, [r3]
 	ldrb	r3, [r2, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2, #10]
@@ -8609,14 +8652,14 @@ idb_write_data:
 	addw	r0, r3, #511
 	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1265+4
+	ldr	r1, .L1268+4
 	movs	r3, #0
 	str	r0, [sp, #20]
 	movw	r2, #65535
 	mov	r0, r1
-.L1219:
+.L1222:
 	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1217
+	cbnz	r4, .L1220
 	ldr	r4, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -8625,13 +8668,13 @@ idb_write_data:
 	str	r4, [r1, r2, lsl #2]
 	subs	r2, r2, #1
 	cmp	r2, #4096
-	bne	.L1219
-.L1217:
+	bne	.L1222
+.L1220:
 	ldr	r1, [r0, r2, lsl #2]
 	mov	r3, #512
-	ldr	r0, .L1265+12
+	ldr	r0, .L1268+12
 	bl	printf
-	ldr	r3, .L1265+16
+	ldr	r3, .L1268+16
 	ldr	r2, [sp, #8]
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
@@ -8642,35 +8685,35 @@ idb_write_data:
 	mul	r4, r3, r2
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1220:
+.L1223:
 	ldr	r3, [sp, #16]
 	cmp	r3, #15
-	bls	.L1237
+	bls	.L1240
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1239
+	cbnz	r3, .L1242
 	mov	r1, r3
-	ldr	r0, .L1265+20
+	ldr	r0, .L1268+20
 	bl	printf
-.L1239:
-	ldr	r3, .L1265
+.L1242:
+	ldr	r3, .L1268
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1253
-.L1266:
+	b	.L1256
+.L1269:
 	.align	2
-.L1265:
+.L1268:
 	.word	.LANCHOR154
 	.word	idb_buf
 	.word	.LANCHOR18
 	.word	.LC15
 	.word	.LANCHOR149
 	.word	.LC17
-.L1237:
+.L1240:
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1267
+	ldr	r0, .L1270
 	bl	memset
-	ldr	r3, .L1267+4
+	ldr	r3, .L1270+4
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
@@ -8679,61 +8722,61 @@ idb_write_data:
 	smulbb	r5, r5, fp
 	uxth	r5, r5
 	cmp	r5, #512
-	bcs	.L1221
+	bcs	.L1224
 	adds	r0, r5, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1221:
-	ldr	r7, .L1267+8
+.L1224:
+	ldr	r7, .L1270+8
 	mov	r1, r5
-	ldr	r10, .L1267+36
+	ldr	r10, .L1270+36
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	mov	r6, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #24]
-.L1225:
+.L1228:
 	lsrs	r2, r6, #2
-	beq	.L1222
-	ldr	r0, .L1267+12
+	beq	.L1225
+	ldr	r0, .L1270+12
 	adds	r1, r2, #1
-	ldr	r3, .L1267+16
+	ldr	r3, .L1270+16
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1223
+	cbz	r0, .L1226
 	ldr	r0, [r10]
-	ldr	r5, .L1267+20
+	ldr	r5, .L1270+20
 	cmp	r0, r5
 	it	eq
 	moveq	r3, r1
-.L1223:
+.L1226:
 	add	r3, r3, #1073741824
 	subs	r3, r3, #1
 	lsls	r3, r3, #2
 	str	r3, [sp, #40]
-.L1222:
+.L1225:
 	movw	r3, #61424
 	str	r3, [sp, #44]
-	ldr	r3, .L1267+16
+	ldr	r3, .L1270+16
 	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1267+12
+	ldr	r3, .L1270+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1224
+	cbz	r3, .L1227
 	ldr	r3, [r10]
-	ldr	r1, .L1267+20
+	ldr	r1, .L1270+20
 	cmp	r3, r1
 	it	eq
 	moveq	r5, r2
-.L1224:
+.L1227:
 	ldr	r3, [sp, #24]
 	adds	r6, r6, #4
-	ldr	r2, .L1267+24
-	ldr	r8, .L1267+4
+	ldr	r2, .L1270+24
+	ldr	r8, .L1270+4
 	mla	r3, r5, fp, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r3, [sp, #32]
 	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1267+28
+	ldr	r2, .L1270+28
 	str	r3, [sp, #28]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8761,12 +8804,12 @@ idb_write_data:
 	mov	r1, r0
 	movs	r0, #0
 	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1267+32
+	ldr	r3, .L1270+32
 	cmp	r7, r3
-	bne	.L1225
+	bne	.L1228
 	ldr	r3, [r8]
 	mov	r0, r4
-	ldr	r7, .L1267
+	ldr	r7, .L1270
 	movs	r6, #0
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #10]
@@ -8778,47 +8821,47 @@ idb_write_data:
 	subs	r3, r4, r1
 	str	r3, [sp, #28]
 	ubfx	r5, r5, #2, #2
-.L1226:
+.L1229:
 	cmp	r6, #512
-	bcs	.L1233
-	ldr	r1, .L1267+12
+	bcs	.L1236
+	ldr	r1, .L1270+12
 	rsb	r3, r5, #4
 	uxth	r3, r3
-	ldr	r2, .L1267+16
+	ldr	r2, .L1270+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
 	add	r3, r10, r6
 	lsrs	r3, r3, #2
 	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1227
-	ldr	r1, .L1267+36
-	ldr	r0, .L1267+20
+	cbz	r1, .L1230
+	ldr	r1, .L1270+36
+	ldr	r0, .L1270+20
 	ldr	r1, [r1]
 	cmp	r1, r0
 	it	eq
 	moveq	r2, r3
-.L1227:
+.L1230:
 	ldr	r3, [sp, #28]
 	add	r5, r5, r3
-	ldr	r3, .L1267+24
+	ldr	r3, .L1270+24
 	mla	r5, r2, r8, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #32]
-	ldr	r3, .L1267+4
+	ldr	r3, .L1270+4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1267+40
+	ldr	r3, .L1270+40
 	ldrh	r2, [r3, #26]
-	ldr	r3, .L1267+44
+	ldr	r3, .L1270+44
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	mul	r3, fp, r3
 	cmp	r5, r3
-	bcs	.L1228
-	ldr	r3, .L1267+28
+	bcs	.L1231
+	ldr	r3, .L1270+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.L1228:
+.L1231:
 	movs	r0, #0
 	bl	flash_boot_enter_slc_mode
 	mov	r1, fp
@@ -8832,11 +8875,11 @@ idb_write_data:
 	bl	FlashReadPage
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1229
-	ldr	r3, .L1267+28
+	bne	.L1232
+	ldr	r3, .L1270+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #40
-	beq	.L1229
+	beq	.L1232
 	movs	r0, #40
 	bl	FlashBchSel
 	add	r3, sp, #40
@@ -8845,7 +8888,7 @@ idb_write_data:
 	movs	r0, #0
 	bl	FlashReadPage
 	mov	r5, r0
-.L1229:
+.L1232:
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r0, [sp, #32]
@@ -8854,63 +8897,63 @@ idb_write_data:
 	mov	r5, #-1
 	it	ne
 	movne	r5, #0
-	cbz	r5, .L1230
-.L1233:
-	ldr	r3, .L1267+8
+	cbz	r5, .L1233
+.L1236:
+	ldr	r3, .L1270+8
 	movs	r5, #0
-	ldr	r6, .L1267
-.L1231:
+	ldr	r6, .L1270
+.L1234:
 	mov	r7, r3
 	ldr	r1, [r6, r5, lsl #2]
 	ldr	r2, [r7]
 	adds	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1234
+	beq	.L1237
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1267
+	ldr	r0, .L1270
 	bl	memset
 	str	r5, [sp]
 	mov	r1, r4
 	ldr	r3, [r7]
 	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1267+48
+	ldr	r0, .L1270+48
 	bl	printf
 	mov	r0, r4
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1235
+	bls	.L1238
 	ldr	r3, [sp, #8]
 	adds	r0, r3, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1235:
+.L1238:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
-	b	.L1220
-.L1230:
+	b	.L1223
+.L1233:
 	ldr	r3, [sp, #24]
 	add	r6, r6, r3
 	add	r7, r7, r3, lsl #9
 	uxth	r6, r6
-	b	.L1226
-.L1234:
+	b	.L1229
+.L1237:
 	adds	r5, r5, #1
 	cmp	r5, #65536
-	bne	.L1231
+	bne	.L1234
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #12]
-	bls	.L1235
-	b	.L1239
-.L1268:
+	bls	.L1238
+	b	.L1242
+.L1271:
 	.align	2
-.L1267:
+.L1270:
 	.word	gp_flash_check_buf
 	.word	.LANCHOR18
 	.word	idb_buf
@@ -8922,7 +8965,7 @@ idb_write_data:
 	.word	idb_buf+262144
 	.word	.LANCHOR119
 	.word	.LANCHOR14
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LC16
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",%progbits
@@ -8951,11 +8994,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1271
+	ldr	r0, .L1274
 	bx	lr
-.L1272:
+.L1275:
 	.align	2
-.L1271:
+.L1274:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -8986,9 +9029,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L1276
+	ldr	r3, .L1279
 	movs	r4, #0
-	ldr	r5, .L1276+4
+	ldr	r5, .L1279+4
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
@@ -8998,8 +9041,8 @@ NandcInit:
 	str	r0, [r3, #16]
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
-	ldr	r3, .L1276+8
-	ldr	r2, .L1276+12
+	ldr	r3, .L1279+8
+	ldr	r2, .L1279+12
 	str	r0, [r3]
 	ldr	r3, [r0]
 	and	r3, r3, #253952
@@ -9008,7 +9051,7 @@ NandcInit:
 	str	r1, [r2]
 	orr	r3, r3, #256
 	ldr	r2, [r0, #352]
-	ldr	r1, .L1276+16
+	ldr	r1, .L1279+16
 	ubfx	r2, r2, #16, #4
 	str	r2, [r1]
 	ldr	r2, [r0, #352]
@@ -9024,24 +9067,24 @@ NandcInit:
 	str	r3, [r0, #4]
 	movw	r3, #8322
 	str	r3, [r0, #344]
-	ldr	r3, .L1276+20
+	ldr	r3, .L1279+20
 	str	r3, [r0, #304]
 	mov	r0, #36864
 	bl	ftl_malloc
-	ldr	r3, .L1276+24
+	ldr	r3, .L1279+24
 	str	r0, [r3]
-	ldr	r3, .L1276+28
+	ldr	r3, .L1279+28
 	str	r0, [r3]
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
 	str	r4, [r3, #24]
-	ldr	r3, .L1276+32
+	ldr	r3, .L1279+32
 	str	r4, [r3]
 	pop	{r3, r4, r5, pc}
-.L1277:
+.L1280:
 	.align	2
-.L1276:
-	.word	.LANCHOR6
+.L1279:
+	.word	.LANCHOR0
 	.word	.LANCHOR119
 	.word	.LANCHOR19
 	.word	.LANCHOR155
@@ -9062,114 +9105,114 @@ NandcInit:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1283
+	ldr	r3, .L1286
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L1283+4
+	ldr	r2, .L1286+4
 	movs	r6, #12
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+8
-	ldr	r5, .L1283+12
-	ldr	r10, .L1283+304
+	ldr	r3, .L1286+8
+	ldr	r5, .L1286+12
+	ldr	r10, .L1286+304
 	str	r4, [r3]
-	ldr	r3, .L1283+16
-	ldr	r8, .L1283+308
-	ldr	fp, .L1283+312
+	ldr	r3, .L1286+16
+	ldr	r8, .L1286+308
+	ldr	fp, .L1286+312
 	str	r4, [r3]
-	ldr	r3, .L1283+20
+	ldr	r3, .L1286+20
 	str	r4, [r3]
-	ldr	r3, .L1283+24
+	ldr	r3, .L1286+24
 	str	r4, [r3]
-	ldr	r3, .L1283+28
+	ldr	r3, .L1286+28
 	str	r4, [r3]
-	ldr	r3, .L1283+32
+	ldr	r3, .L1286+32
 	str	r4, [r3]
-	ldr	r3, .L1283+36
+	ldr	r3, .L1286+36
 	str	r4, [r3]
-	ldr	r3, .L1283+40
+	ldr	r3, .L1286+40
 	str	r4, [r3]
-	ldr	r3, .L1283+44
+	ldr	r3, .L1286+44
 	str	r4, [r3]
-	ldr	r3, .L1283+48
+	ldr	r3, .L1286+48
 	str	r4, [r3]
-	ldr	r3, .L1283+52
+	ldr	r3, .L1286+52
 	str	r4, [r3]
-	ldr	r3, .L1283+56
+	ldr	r3, .L1286+56
 	str	r4, [r3]
-	ldr	r3, .L1283+60
+	ldr	r3, .L1286+60
 	str	r4, [r3]
-	ldr	r3, .L1283+64
+	ldr	r3, .L1286+64
 	str	r4, [r3]
-	ldr	r3, .L1283+68
+	ldr	r3, .L1286+68
 	str	r4, [r3]
-	ldr	r3, .L1283+72
+	ldr	r3, .L1286+72
 	str	r4, [r3]
-	ldr	r3, .L1283+76
+	ldr	r3, .L1286+76
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L1283+80
+	ldr	r2, .L1286+80
 	str	r4, [r2]
-	ldr	r2, .L1283+84
+	ldr	r2, .L1286+84
 	str	r4, [r2]
-	ldr	r2, .L1283+88
+	ldr	r2, .L1286+88
 	str	r4, [r2]
-	ldr	r2, .L1283+92
+	ldr	r2, .L1286+92
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1283+96
+	ldr	r2, .L1286+96
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1283+100
+	ldr	r2, .L1286+100
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1283+104
+	ldr	r2, .L1286+104
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L1283+108
+	ldr	r3, .L1286+108
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L1283+112
+	ldr	r3, .L1286+112
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1283+116
+	ldr	r3, .L1286+116
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+120
+	ldr	r3, .L1286+120
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+124
+	ldr	r3, .L1286+124
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1283+128
+	ldr	r3, .L1286+128
 	strh	r4, [r3]	@ movhi
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+132
+	ldr	r3, .L1286+132
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #36
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+136
+	ldr	r3, .L1286+136
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1283+140
+	ldr	r3, .L1286+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+144
+	ldr	r3, .L1286+144
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1283+148
-	ldr	r7, .L1283+152
+	ldr	r3, .L1286+148
+	ldr	r7, .L1286+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+156
+	ldr	r3, .L1286+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+160
+	ldr	r3, .L1286+160
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -9178,157 +9221,157 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L1283+164
+	ldr	r3, .L1286+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+168
+	ldr	r3, .L1286+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+172
+	ldr	r3, .L1286+172
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+176
+	ldr	r3, .L1286+176
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+180
+	ldr	r3, .L1286+180
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+184
+	ldr	r3, .L1286+184
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+188
+	ldr	r3, .L1286+188
 	ldrh	r5, [r10]
-	ldr	r10, .L1283+316
+	ldr	r10, .L1286+316
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1283+192
+	ldr	r3, .L1286+192
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L1283+196
+	ldr	r5, .L1286+196
 	bl	ftl_malloc
-	ldr	r3, .L1283+200
+	ldr	r3, .L1286+200
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L1283+320
+	ldr	r8, .L1286+320
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+204
+	ldr	r3, .L1286+204
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1283+208
+	ldr	r3, .L1286+208
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L1283+212
+	ldr	r0, .L1286+212
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1283+216
+	ldr	r3, .L1286+216
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L1283+220
+	ldr	r3, .L1286+220
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+224
+	ldr	r3, .L1286+224
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1283+228
+	ldr	r3, .L1286+228
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1283+232
-	ldr	r8, .L1283+324
+	ldr	r3, .L1286+232
+	ldr	r8, .L1286+324
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L1283+236
+	ldr	r3, .L1286+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+240
+	ldr	r3, .L1286+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1283+244
+	ldr	r3, .L1286+244
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L1283+328
+	ldr	r8, .L1286+328
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1283+248
+	ldr	r3, .L1286+248
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L1283+252
+	ldr	r3, .L1286+252
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1283+256
+	ldr	r3, .L1286+256
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1283+260
+	ldr	r3, .L1286+260
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1283+264
-	ldr	r4, .L1283+268
+	ldr	r3, .L1286+264
+	ldr	r4, .L1286+268
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1283+272
+	ldr	r3, .L1286+272
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L1283+276
+	ldr	r6, .L1286+276
 	bl	ftl_malloc
-	ldr	r3, .L1283+280
+	ldr	r3, .L1286+280
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+284
+	ldr	r3, .L1286+284
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L1283+288
+	ldr	r5, .L1286+288
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1283+292
+	ldr	r3, .L1286+292
 	str	r0, [r3]
-	ldr	r3, .L1283+296
+	ldr	r3, .L1286+296
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -9339,15 +9382,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L1283+300
+	ldr	r3, .L1286+300
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
-	b	.L1284
-.L1285:
+	b	.L1287
+.L1288:
 	.align	2
-.L1283:
+.L1286:
 	.word	.LANCHOR139
 	.word	.LANCHOR173
 	.word	.LANCHOR157
@@ -9407,7 +9450,7 @@ FtlMemInit:
 	.word	.LANCHOR83
 	.word	.LANCHOR129
 	.word	.LANCHOR125
-	.word	.LANCHOR0
+	.word	.LANCHOR1
 	.word	.LANCHOR71
 	.word	.LANCHOR192
 	.word	.LANCHOR193
@@ -9431,33 +9474,33 @@ FtlMemInit:
 	.word	.LANCHOR190
 	.word	.LANCHOR61
 	.word	.LANCHOR62
-.L1284:
+.L1287:
 	mov	r0, r1
-.L1279:
+.L1282:
 	cmp	r2, r6
-	bcc	.L1280
+	bcc	.L1283
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1286
+	ldr	r2, .L1289
 	movs	r1, #0
 	adds	r3, r3, #24
-.L1281:
+.L1284:
 	cmp	r3, r2
-	bne	.L1282
+	bne	.L1285
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1280:
+.L1283:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L1279
-.L1282:
+	b	.L1282
+.L1285:
 	str	r1, [r3, #4]!
-	b	.L1281
-.L1287:
+	b	.L1284
+.L1290:
 	.align	2
-.L1286:
+.L1289:
 	.word	.LANCHOR74+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
@@ -9557,12 +9600,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1294
+	ldr	r3, .L1297
 	ldr	r0, [r3]
 	bx	lr
-.L1295:
+.L1298:
 	.align	2
-.L1294:
+.L1297:
 	.word	.LANCHOR68
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
@@ -9578,51 +9621,51 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1305
+	ldr	r7, .L1308
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1297:
+.L1300:
 	cmp	r4, r10
-	bne	.L1303
-	ldr	r1, .L1305+4
-	ldr	r0, .L1305+8
+	bne	.L1306
+	ldr	r1, .L1308+4
+	ldr	r0, .L1308+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1303:
-	cbnz	r5, .L1298
+.L1306:
+	cbnz	r5, .L1301
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1305+12
+	ldr	r0, .L1308+12
 	bl	printf
-.L1298:
+.L1301:
 	cmp	r8, #4
-	bne	.L1299
+	bne	.L1302
 	ldr	r1, [r6, r4, lsl #2]
-.L1304:
+.L1307:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1302
+	bls	.L1305
 	movs	r5, #0
-	ldr	r1, .L1305+4
-	ldr	r0, .L1305+8
+	ldr	r1, .L1308+4
+	ldr	r0, .L1308+8
 	bl	printf
-.L1302:
+.L1305:
 	adds	r4, r4, #1
-	b	.L1297
-.L1299:
+	b	.L1300
+.L1302:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1304
-.L1306:
+	b	.L1307
+.L1309:
 	.align	2
-.L1305:
+.L1308:
 	.word	.LC19
 	.word	.LC20
 	.word	.LC7
@@ -9641,7 +9684,7 @@ HynixGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #172
-	ldr	r5, .L1425
+	ldr	r5, .L1428
 	cmp	r0, #2
 	mov	r1, #173
 	mov	r2, #174
@@ -9653,19 +9696,19 @@ HynixGetReadRetryDefault:
 	strb	r1, [r5, #5]
 	strb	r2, [r5, #6]
 	strb	r3, [r5, #7]
-	bne	.L1308
+	bne	.L1311
 	movs	r3, #167
 	mov	fp, #7
 	strb	r3, [r5, #4]
 	movs	r2, #247
-	ldr	r3, .L1425+4
+	ldr	r3, .L1428+4
 	strb	r2, [r3, #17]
-.L1418:
+.L1421:
 	mov	r10, #4
-	b	.L1309
-.L1308:
+	b	.L1312
+.L1311:
 	cmp	r0, #3
-	bne	.L1310
+	bne	.L1313
 	movs	r3, #176
 	strb	r3, [r5, #4]
 	movs	r3, #177
@@ -9681,31 +9724,31 @@ HynixGetReadRetryDefault:
 	movs	r3, #182
 	strb	r3, [r5, #10]
 	movs	r3, #183
-.L1419:
+.L1422:
 	mov	fp, #8
 	strb	r3, [r5, #11]
 	mov	r10, fp
-.L1309:
+.L1312:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1315
+	bhi	.L1318
 	mov	r8, #0
-.L1316:
-	ldr	r3, .L1425+8
+.L1319:
+	ldr	r3, .L1428+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1322
-.L1323:
-	ldr	r3, .L1425
+	bhi	.L1325
+.L1326:
+	ldr	r3, .L1428
 	strb	r10, [r3, #1]
 	strb	fp, [r3, #2]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1310:
+.L1313:
 	cmp	r0, #4
-	bne	.L1311
+	bne	.L1314
 	movs	r0, #204
 	strb	r1, [r5, #9]
 	strb	r0, [r5, #4]
@@ -9718,10 +9761,10 @@ HynixGetReadRetryDefault:
 	movs	r0, #205
 	strb	r0, [r5, #8]
 	strb	r2, [r5, #10]
-	b	.L1419
-.L1311:
+	b	.L1422
+.L1314:
 	cmp	r0, #5
-	bne	.L1312
+	bne	.L1315
 	movs	r3, #56
 	mov	fp, #8
 	strb	r3, [r5, #4]
@@ -9731,10 +9774,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #59
 	strb	r3, [r5, #7]
-	b	.L1418
-.L1312:
+	b	.L1421
+.L1315:
 	cmp	r0, #6
-	bne	.L1313
+	bne	.L1316
 	movs	r3, #14
 	mov	fp, #12
 	strb	r3, [r5, #4]
@@ -9744,10 +9787,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1418
-.L1313:
+	b	.L1421
+.L1316:
 	cmp	r0, #7
-	bne	.L1314
+	bne	.L1317
 	movs	r3, #176
 	mov	fp, #12
 	strb	r3, [r5, #4]
@@ -9770,11 +9813,11 @@ HynixGetReadRetryDefault:
 	movs	r3, #213
 	strb	r3, [r5, #13]
 	mov	r10, #10
-	b	.L1309
-.L1314:
+	b	.L1312
+.L1317:
 	cmp	r0, #8
 	mov	r3, #7
-	bne	.L1373
+	bne	.L1376
 	strb	r3, [r5, #5]
 	movs	r3, #9
 	movs	r2, #6
@@ -9785,15 +9828,15 @@ HynixGetReadRetryDefault:
 	mov	fp, #50
 	strb	r3, [r5, #8]
 	mov	r10, #5
-	b	.L1309
-.L1373:
+	b	.L1312
+.L1376:
 	mov	fp, r3
-	b	.L1418
-.L1322:
-	ldr	r2, .L1425+12
+	b	.L1421
+.L1325:
+	ldr	r2, .L1428+12
 	movs	r6, #0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1425+16
+	ldr	r3, .L1428+16
 	ldr	r7, [r3, r2, lsl #3]
 	add	r4, r5, r2, lsl #6
 	add	r3, r3, r2, lsl #3
@@ -9802,7 +9845,7 @@ HynixGetReadRetryDefault:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1317:
+.L1320:
 	adds	r1, r5, r6
 	str	r2, [r3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
@@ -9818,25 +9861,25 @@ HynixGetReadRetryDefault:
 	adds	r6, r6, #1
 	uxtb	r1, r6
 	cmp	r10, r1
-	bhi	.L1317
-	ldr	r7, .L1425+4
+	bhi	.L1320
+	ldr	r7, .L1428+4
 	mov	r1, r4
 	movs	r2, #0
-.L1320:
+.L1323:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1319:
+.L1322:
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1319
+	bne	.L1322
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	cmp	r2, #4
-	bne	.L1320
+	bne	.L1323
 	movs	r3, #0
 	add	r8, r8, #1
 	strb	r3, [r4, #16]
@@ -9846,11 +9889,11 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L1316
-.L1315:
+	b	.L1319
+.L1318:
 	subs	r3, r4, #3
 	cmp	r3, #5
-	bhi	.L1323
+	bhi	.L1326
 	smulbb	r3, fp, r10
 	asrs	r2, r3, #1
 	lsls	r3, r3, #4
@@ -9861,19 +9904,19 @@ HynixGetReadRetryDefault:
 	lsls	r3, r2, #1
 	str	r3, [sp, #32]
 	movs	r3, #0
-.L1424:
+.L1427:
 	str	r3, [sp, #28]
 	ldrb	r3, [sp, #28]	@ zero_extendqisi2
 	str	r3, [sp, #16]
-	ldr	r3, .L1425+8
+	ldr	r3, .L1428+8
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1323
+	bls	.L1326
 	ldr	r2, [sp, #16]
-	ldr	r3, .L1425+12
+	ldr	r3, .L1428+12
 	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1425+16
+	ldr	r3, .L1428+16
 	mov	r0, r8
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
@@ -9887,12 +9930,12 @@ HynixGetReadRetryDefault:
 	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
 	cmp	r4, #7
-	bne	.L1325
-	ldr	r3, .L1425
+	bne	.L1328
+	ldr	r3, .L1428
 	movs	r0, #160
 	mla	r0, r0, r8, r3
 	add	r3, r0, #28
-.L1420:
+.L1423:
 	ldr	r2, [sp, #4]
 	cmp	r4, #4
 	str	r3, [sp, #20]
@@ -9900,42 +9943,42 @@ HynixGetReadRetryDefault:
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1328
+	bne	.L1331
 	movs	r2, #255
 	str	r2, [r3, #2052]
 	movs	r2, #64
 	str	r2, [r3, #2048]
 	movs	r2, #204
-.L1421:
+.L1424:
 	str	r2, [r3, #2052]
 	movs	r2, #77
-	b	.L1422
-.L1325:
+	b	.L1425
+.L1328:
 	cmp	r4, #8
-	beq	.L1327
-	ldr	r0, .L1425
+	beq	.L1330
+	ldr	r0, .L1428
 	add	r0, r0, r8, lsl #6
 	add	r3, r0, #20
-	b	.L1420
-.L1426:
+	b	.L1423
+.L1429:
 	.align	2
-.L1425:
+.L1428:
 	.word	.LANCHOR20
 	.word	.LANCHOR196
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR6
-.L1328:
+	.word	.LANCHOR0
+.L1331:
 	subs	r2, r4, #5
 	cmp	r2, #1
-	bhi	.L1330
-	ldr	r2, .L1427
+	bhi	.L1333
+	ldr	r2, .L1430
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
 	movs	r2, #82
-.L1422:
+.L1425:
 	str	r2, [r3, #2048]
-.L1329:
+.L1332:
 	ldr	r2, [sp, #4]
 	cmp	r4, #6
 	ldr	r3, [sp]
@@ -9959,7 +10002,7 @@ HynixGetReadRetryDefault:
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2052]
-.L1372:
+.L1375:
 	ldr	r2, [sp, #4]
 	mov	r0, r8
 	ldr	r3, [sp]
@@ -9970,15 +10013,15 @@ HynixGetReadRetryDefault:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #36]
-	bls	.L1375
+	bls	.L1378
 	cmp	r4, #8
-	beq	.L1375
+	beq	.L1378
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1333:
-	ldr	r3, .L1427+4
+.L1336:
+	ldr	r3, .L1430+4
 	subs	r2, r2, #1
 	ldm	sp, {r5, r6}
 	ldr	r3, [r3]
@@ -9987,83 +10030,83 @@ HynixGetReadRetryDefault:
 	uxtab	r2, r3, r2
 	mov	r0, r1
 	str	r5, [sp, #8]
-.L1334:
+.L1337:
 	ldr	r5, [sp, #8]
 	ldr	r5, [r5, #2048]
 	strb	r5, [r0, #1]!
 	cmp	r0, r2
-	bne	.L1334
+	bne	.L1337
 	cmp	r4, #8
-	bne	.L1335
+	bne	.L1338
 	movs	r2, #0
-.L1337:
+.L1340:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #50
-	beq	.L1336
+	beq	.L1339
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #5
-	beq	.L1336
+	beq	.L1339
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1337
-.L1338:
+	bne	.L1340
+.L1341:
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
-.L1340:
-	b	.L1340
-.L1330:
+.L1343:
+	b	.L1343
+.L1333:
 	cmp	r4, #7
-	bne	.L1329
+	bne	.L1332
 	movs	r2, #174
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2048]
 	movs	r2, #176
-	b	.L1421
-.L1375:
+	b	.L1424
+.L1378:
 	movs	r2, #16
-	b	.L1333
-.L1336:
-	cmp	r1, #6
-	bhi	.L1338
+	b	.L1336
 .L1339:
-	ldr	r3, .L1427+4
+	cmp	r1, #6
+	bhi	.L1341
+.L1342:
+	ldr	r3, .L1430+4
 	ldr	r2, [r3]
 	mov	r3, r2
-.L1349:
+.L1352:
 	ldr	r0, [sp, #48]
 	subs	r1, r3, r2
 	cmp	r1, r0
-	blt	.L1350
-	ldr	r3, .L1427+4
+	blt	.L1353
+	ldr	r3, .L1430+4
 	ldr	r1, [r3]
 	ldr	r3, [sp, #32]
 	adds	r0, r1, r3
 	movs	r3, #8
-.L1352:
+.L1355:
 	mov	r6, r0
 	movs	r5, #0
-.L1351:
+.L1354:
 	ldrh	r7, [r6]
 	adds	r5, r5, #1
 	mvns	r7, r7
 	strh	r7, [r6], #2	@ movhi
 	ldr	r7, [sp, #12]
 	cmp	r7, r5
-	bgt	.L1351
+	bgt	.L1354
 	ldr	r5, [sp, #44]
 	subs	r3, r3, #1
 	add	r0, r0, r5
-	bne	.L1352
+	bne	.L1355
 	mov	r7, r1
 	str	r3, [sp, #24]
-.L1358:
+.L1361:
 	movs	r5, #0
 	mov	r0, r5
-.L1357:
+.L1360:
 	movs	r3, #1
 	mov	ip, #0
 	lsl	r6, r3, r0
@@ -10071,7 +10114,7 @@ HynixGetReadRetryDefault:
 	str	r3, [sp, #40]
 	mov	lr, r6
 	mov	r6, r7
-.L1355:
+.L1358:
 	ldrh	r3, [r6]
 	str	r3, [sp, #52]
 	ldr	r3, [sp, #52]
@@ -10083,7 +10126,7 @@ HynixGetReadRetryDefault:
 	ldr	r3, [sp, #40]
 	subs	r3, r3, #1
 	str	r3, [sp, #40]
-	bne	.L1355
+	bne	.L1358
 	cmp	ip, #8
 	add	r0, r0, #1
 	ittt	hi
@@ -10091,7 +10134,7 @@ HynixGetReadRetryDefault:
 	orrhi	r5, r5, r3
 	uxthhi	r5, r5
 	cmp	r0, #16
-	bne	.L1357
+	bne	.L1360
 	ldr	r3, [sp, #24]
 	strh	r5, [r7], #2	@ movhi
 	adds	r3, r3, #1
@@ -10099,107 +10142,107 @@ HynixGetReadRetryDefault:
 	ldr	r0, [sp, #24]
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bgt	.L1358
+	bgt	.L1361
 	subs	r0, r1, #4
 	add	r5, r1, #28
 	movs	r3, #0
-.L1361:
+.L1364:
 	ldr	r6, [r0, #4]!
-	cbnz	r6, .L1360
+	cbnz	r6, .L1363
 	adds	r3, r3, #1
-.L1360:
+.L1363:
 	cmp	r5, r0
-	bne	.L1361
+	bne	.L1364
 	cmp	r3, #7
-	ble	.L1362
-	ldr	r0, .L1427+12
+	ble	.L1365
+	ldr	r0, .L1430+12
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
-.L1363:
-	b	.L1363
-.L1335:
+.L1366:
+	b	.L1366
+.L1338:
 	cmp	r4, #7
-	bne	.L1341
+	bne	.L1344
 	movs	r2, #0
-.L1343:
+.L1346:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1342
+	beq	.L1345
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1342
+	beq	.L1345
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1343
-.L1344:
+	bne	.L1346
+.L1347:
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
+.L1348:
+	b	.L1348
 .L1345:
-	b	.L1345
-.L1342:
 	cmp	r1, #6
-	bls	.L1339
-	b	.L1344
-.L1341:
+	bls	.L1342
+	b	.L1347
+.L1344:
 	cmp	r4, #6
-	bne	.L1339
+	bne	.L1342
 	adds	r3, r3, #7
-.L1346:
+.L1349:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1339
+	beq	.L1342
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1339
+	beq	.L1342
 	cmp	r1, r3
-	bne	.L1346
+	bne	.L1349
 	movs	r1, #0
-	ldr	r0, .L1427+8
+	ldr	r0, .L1430+8
 	bl	printf
-.L1348:
-	b	.L1348
-.L1350:
+.L1351:
+	b	.L1351
+.L1353:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1, #2048]
 	strb	r1, [r3], #1
-	b	.L1349
-.L1362:
+	b	.L1352
+.L1365:
 	cmp	r4, #6
-	beq	.L1377
+	beq	.L1380
 	cmp	r4, #7
-	beq	.L1378
+	beq	.L1381
 	cmp	r4, #8
 	ite	eq
 	moveq	r6, #5
 	movne	r6, #8
-.L1364:
+.L1367:
 	add	r3, r10, #-1
 	ldr	r0, [sp, #20]
 	uxtb	r3, r3
 	movs	r5, #0
 	adds	r3, r3, #1
-.L1365:
+.L1368:
 	mov	ip, r0
 	mov	r1, r2
-.L1366:
+.L1369:
 	ldrb	r7, [r1], #1	@ zero_extendqisi2
 	strb	r7, [ip], #1
 	subs	r7, r1, r2
 	uxtb	r7, r7
 	cmp	r10, r7
-	bhi	.L1366
+	bhi	.L1369
 	adds	r5, r5, #1
 	add	r2, r2, r3
 	cmp	fp, r5
 	add	r0, r0, r6
-	bgt	.L1365
+	bgt	.L1368
 	ldr	r3, [sp]
 	mov	r0, r8
 	ldr	r2, [sp, #4]
@@ -10209,12 +10252,12 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #36]
 	cmp	r3, #1
-	bhi	.L1368
+	bhi	.L1371
 	movs	r3, #54
 	ldr	r2, [sp, #8]
 	str	r3, [r5, #2056]
 	mov	r1, #-1
-	ldr	r3, .L1427
+	ldr	r3, .L1430
 	ldr	r0, [sp, #16]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r2, #2052]
@@ -10223,26 +10266,26 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r5, #2056]
 	bl	FlashReadCmd
-.L1369:
+.L1372:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1424
-.L1377:
+	b	.L1427
+.L1380:
 	movs	r6, #4
-	b	.L1364
-.L1378:
+	b	.L1367
+.L1381:
 	movs	r6, #10
-	b	.L1364
-.L1368:
+	b	.L1367
+.L1371:
 	cmp	r4, #8
 	ite	eq
 	moveq	r3, #190
 	movne	r3, #56
 	str	r3, [r5, #2056]
-	b	.L1369
-.L1327:
+	b	.L1372
+.L1330:
 	movs	r3, #120
 	movs	r2, #23
 	str	r3, [r5, #2056]
@@ -10264,12 +10307,12 @@ HynixGetReadRetryDefault:
 	str	r1, [r5, #2052]
 	str	r2, [r5, #2052]
 	str	r3, [r5, #2052]
-	ldr	r3, .L1427+16
+	ldr	r3, .L1430+16
 	str	r3, [sp, #20]
-	b	.L1372
-.L1428:
+	b	.L1375
+.L1431:
 	.align	2
-.L1427:
+.L1430:
 	.word	.LANCHOR20
 	.word	.LANCHOR147
 	.word	.LC21
@@ -10289,72 +10332,72 @@ FlashGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r0, .L1429
+	cbz	r0, .L1432
 	subs	r2, r0, #1
 	cmp	r2, #7
-	bhi	.L1431
+	bhi	.L1434
 	b	HynixGetReadRetryDefault
-.L1431:
+.L1434:
 	cmp	r0, #49
-	bne	.L1432
-	ldr	r0, .L1452
+	bne	.L1435
+	ldr	r0, .L1455
 	movs	r2, #64
-	ldr	r1, .L1452+4
+	ldr	r1, .L1455+4
 	strb	r3, [r0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
-.L1450:
+.L1453:
 	adds	r0, r0, #4
 	b	ftl_memcpy
-.L1432:
+.L1435:
 	cmp	r0, #33
-	beq	.L1433
+	beq	.L1436
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1434
-.L1433:
-	ldr	r0, .L1452
+	bhi	.L1437
+.L1436:
+	ldr	r0, .L1455
 	strb	r3, [r0]
 	movs	r3, #4
-.L1451:
+.L1454:
 	strb	r3, [r0, #1]
 	movs	r3, #7
 	strb	r3, [r0, #2]
 	movs	r2, #45
-	ldr	r1, .L1452+8
-	b	.L1450
-.L1434:
+	ldr	r1, .L1455+8
+	b	.L1453
+.L1437:
 	cmp	r0, #34
-	beq	.L1435
+	beq	.L1438
 	cmp	r0, #67
-	bne	.L1436
-.L1435:
-	ldr	r0, .L1452
+	bne	.L1439
+.L1438:
+	ldr	r0, .L1455
 	strb	r3, [r0]
 	movs	r3, #5
-	b	.L1451
-.L1436:
+	b	.L1454
+.L1439:
 	cmp	r0, #35
-	beq	.L1437
+	beq	.L1440
 	cmp	r0, #68
-	bne	.L1429
-.L1437:
-	ldr	r0, .L1452
+	bne	.L1432
+.L1440:
+	ldr	r0, .L1455
 	movs	r2, #95
-	ldr	r1, .L1452+12
+	ldr	r1, .L1455+12
 	strb	r3, [r0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
-	b	.L1450
-.L1429:
+	b	.L1453
+.L1432:
 	bx	lr
-.L1453:
+.L1456:
 	.align	2
-.L1452:
+.L1455:
 	.word	.LANCHOR20
 	.word	.LANCHOR13
 	.word	.LANCHOR8
@@ -10369,82 +10412,85 @@ FlashGetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashInit, %function
 FlashInit:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	sub	sp, sp, #32
+	sub	sp, sp, #40
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1554
-	ldr	r10, .L1554+120
-	ldr	r8, .L1554+124
+	ldr	r3, .L1560
+	ldr	fp, .L1560+124
+	ldr	r10, .L1560+128
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1554+4
-	ldr	r6, .L1554+8
-	ldr	r7, .L1554+12
+	ldr	r3, .L1560+4
+	ldr	r8, .L1560+132
+	ldr	r6, .L1560+8
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1554+16
+	ldr	r3, .L1560+12
+	ldr	r7, .L1560+16
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1554+20
+	ldr	r3, .L1560+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1554+24
-	ldr	r2, .L1554+28
-	strb	r5, [r8]
+	ldr	r3, .L1560+24
+	ldr	r2, .L1560+28
+	strb	r5, [r10]
 	str	r0, [r3]
 	movs	r3, #50
-	strb	r3, [r10]
-	mov	r0, r4
 	strb	r3, [r2]
 	movs	r2, #128
-	ldr	r3, .L1554+32
-	ldr	r4, .L1554+36
-	strb	r5, [r7]
+	strb	r3, [fp]
+	mov	r0, r4
+	ldr	r3, .L1560+32
+	ldr	r4, .L1560+36
+	strb	r5, [r8]
 	str	r5, [r3]
-	ldr	r3, .L1554+40
+	ldr	r3, .L1560+40
+	strb	r5, [r7]
 	str	r2, [r3]
-	ldr	r3, .L1554+44
+	ldr	r3, .L1560+44
 	str	r5, [r3]
 	movs	r3, #60
 	strb	r3, [r6]
 	bl	NandcInit
 	str	r10, [sp, #20]
-	ldr	r10, .L1554+128
-	str	r8, [sp, #16]
+	ldr	r10, .L1560+136
+	str	r8, [sp, #28]
 	mov	r8, r6
 	mov	r6, r4
-.L1459:
+	str	fp, [sp, #24]
+.L1462:
 	add	r1, r10, r5, lsl #3
 	uxtb	r2, r5
 	ldr	r3, [r10, r5, lsl #3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
 	mov	fp, r2
 	mov	r0, r2
-	str	r3, [sp, #28]
-	str	r1, [sp, #24]
+	str	r3, [sp, #36]
+	str	r1, [sp, #32]
 	bl	FlashReset
 	mov	r0, fp
 	bl	NandcFlashCs
-	ldr	r1, [sp, #24]
+	ldr	r1, [sp, #32]
 	movs	r0, #200
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #36]
 	add	r3, r3, r1, lsl #8
 	movs	r1, #144
 	str	r1, [r3, #2056]
 	movs	r1, #0
 	str	r1, [r3, #2052]
-	str	r3, [sp, #24]
+	str	r3, [sp, #32]
 	bl	udelay
-	ldr	r3, [sp, #24]
+	ldr	r3, [sp, #32]
 	mov	r0, fp
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4]
@@ -10463,10 +10509,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1455
+	bhi	.L1458
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1554+48
+	ldr	r0, .L1560+48
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10476,17 +10522,17 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1455:
-	cbnz	r5, .L1456
+.L1458:
+	cbnz	r5, .L1459
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1503
+	bhi	.L1509
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1503
-.L1456:
+	beq	.L1509
+.L1459:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10495,330 +10541,333 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1459
+	bne	.L1462
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L1460
-	ldr	r3, .L1554+52
+	beq	.L1463
+	ldr	r3, .L1560+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1460:
+.L1463:
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1554+56
+	ldr	r0, .L1560+56
 	bl	ftl_memset
-	ldr	r4, .L1554+60
-	movs	r2, #0
-	ldr	r3, .L1554+64
-	ldr	r5, .L1554+68
+	ldr	r4, .L1560+60
+	ldr	r3, .L1560+64
+	ldr	r5, .L1560+68
 	str	r3, [r4]
-	ldr	r3, .L1554+72
-	strb	r2, [r3]
+	movs	r3, #0
+	strb	r3, [r5]
+	ldr	r3, .L1560+72
+	str	r5, [sp, #32]
+	ldr	r1, [r3]
+	ldr	r3, .L1560+76
+	cmp	r1, r3
 	mov	r10, r3
-	ldr	r2, .L1554+76
-	ldr	r1, [r2]
-	cmp	r1, r5
 	ittt	eq
-	ldreq	r3, .L1554+80
+	ldreq	r3, .L1560+80
 	moveq	r2, #1
 	streq	r2, [r3]
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #161
-	beq	.L1462
+	beq	.L1465
 	cmp	r3, #241
-	beq	.L1462
+	beq	.L1465
 	cmp	r3, #218
-	beq	.L1462
+	beq	.L1465
 	and	r2, r3, #253
 	cmp	r2, #209
-	beq	.L1462
+	beq	.L1465
 	cmp	r3, #220
-	bne	.L1463
+	bne	.L1466
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1463
-.L1462:
-	ldr	r0, [sp, #16]
-	movs	r2, #1
-	strb	r2, [r0]
+	bne	.L1466
+.L1465:
+	ldr	r2, [sp, #20]
+	movs	r0, #1
+	ldr	r5, [sp, #24]
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	strb	r0, [r2]
 	movs	r2, #16
-	ldr	r0, [sp, #20]
+	strb	r2, [r5]
 	strb	r2, [r8]
-	strb	r2, [r0]
-	ldrb	r0, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1554+84
-	cmp	r0, #152
-	strb	r0, [r2, #1]
+	cmp	ip, #152
+	ldr	r2, .L1560+84
+	strb	ip, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1464
-	ldrsb	r0, [r6, #4]
-	cmp	r0, #0
-	itt	ge
-	movge	r0, #24
-	strbge	r0, [r8]
-.L1464:
-	cmp	r1, r5
-	beq	.L1465
+	bne	.L1468
+	ldrsb	ip, [r6, #4]
+	cmp	ip, #0
+	blt	.L1469
+	movs	r0, #24
+	strb	r0, [r8]
+.L1468:
+	cmp	r1, r10
+	beq	.L1471
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1466
-.L1465:
+	bne	.L1472
+.L1471:
 	movs	r1, #16
 	strb	r1, [r8]
-.L1466:
+.L1472:
 	cmp	r3, #218
-	bne	.L1467
+	bne	.L1473
 	mov	r1, #2048
-.L1550:
+.L1556:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1468:
+.L1474:
 	movs	r2, #32
-	ldr	r1, .L1554+88
-	ldr	r0, .L1554+92
+	ldr	r1, .L1560+88
+	ldr	r0, .L1560+92
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1554+84
-	ldr	r0, .L1554+64
+	ldr	r1, .L1560+84
+	ldr	r0, .L1560+64
 	bl	ftl_memcpy
-.L1463:
-	ldr	r3, [sp, #16]
-	ldr	r8, .L1554+132
+.L1466:
+	ldr	r3, [sp, #20]
+	ldr	r8, .L1560+140
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1471
+	bne	.L1477
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1473
+	cbnz	r0, .L1479
 	ldr	r3, [r4]
-	ldr	fp, .L1554+104
+	ldr	fp, .L1560+104
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
 	strb	r0, [fp]
-	bmi	.L1473
+	bmi	.L1479
 	movs	r3, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1473:
+.L1479:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1471
+	beq	.L1477
 	ldr	r3, [r4]
-	ldr	r0, .L1554+96
+	ldr	r0, .L1560+96
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r2, r0, #1
-	beq	.L1454
+	beq	.L1457
 	bl	FlashDieInfoInit
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1554+100
+	ldr	r2, .L1560+100
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1476
+	blt	.L1482
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1477
-.L1476:
+	bge	.L1483
+.L1482:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1477:
-	ldr	r3, .L1554+104
+.L1483:
+	ldr	r3, .L1560+104
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1478
+	beq	.L1484
 	bl	FlashSavePhyInfo
-	ldr	r3, .L1554+108
+	ldr	r3, .L1560+108
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1478:
+.L1484:
 	bl	FlashSavePhyInfo
-.L1471:
+.L1477:
 	ldr	fp, [r4]
+	ldr	r1, [sp, #32]
+	ldr	r5, .L1560+112
 	ldrh	r2, [fp, #16]
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
 	ldrh	r0, [fp, #10]
-	ubfx	r1, r2, #3, #1
 	strb	r3, [r8]
 	ubfx	r3, r2, #7, #1
-	strb	r3, [r10]
-	ldr	r3, .L1554+112
-	ldr	r10, .L1554+136
+	strb	r3, [r1]
+	ubfx	r1, r2, #3, #1
+	ldr	r3, .L1560+116
 	strb	r1, [r3]
 	ubfx	r1, r2, #4, #1
-	ldr	r3, .L1554+116
+	ldr	r3, .L1560+120
 	ubfx	r2, r2, #8, #3
 	strb	r1, [r3]
-	ldr	r3, .L1554+104
+	ldr	r3, .L1560+104
 	ldrb	r1, [fp, #12]	@ zero_extendqisi2
 	strb	r2, [r3]
 	movs	r2, #0
-	str	r2, [r10]
-	str	r3, [sp, #24]
+	str	r2, [r5]
+	str	r3, [sp, #28]
 	bl	__aeabi_idiv
 	mov	r1, r0
 	ldrb	r0, [fp, #18]	@ zero_extendqisi2
 	bl	BuildFlashLsbPageTable
-	bl	FlashDieInfoInit
-	ldr	r2, [r4]
-	ldr	r3, [sp, #24]
-	ldrh	r1, [r2, #16]
-	mov	fp, r3
-	tst	r1, #64
-	mov	r1, r10
-	b	.L1555
-.L1556:
+	b	.L1561
+.L1562:
 	.align	2
-.L1554:
+.L1560:
 	.word	.LANCHOR147
 	.word	.LANCHOR153
 	.word	.LANCHOR152
-	.word	.LANCHOR30
 	.word	.LANCHOR197
+	.word	.LANCHOR30
 	.word	.LANCHOR198
 	.word	.LANCHOR199
 	.word	.LANCHOR150
 	.word	.LANCHOR149
 	.word	.LANCHOR22
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR144
 	.word	.LC23
 	.word	.LANCHOR155
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR31
-	.word	1446522928
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR119
+	.word	1446522928
 	.word	.LANCHOR29
-	.word	.LANCHOR200
+	.word	.LANCHOR201
 	.word	.LANCHOR143+32
 	.word	.LANCHOR7
 	.word	.LC24
 	.word	.LANCHOR122
 	.word	.LANCHOR24
 	.word	.LANCHOR148
-	.word	.LANCHOR201
+	.word	.LANCHOR145
+	.word	.LANCHOR202
 	.word	.LANCHOR27
+	.word	.LANCHOR3
 	.word	.LANCHOR2
-	.word	.LANCHOR1
-	.word	.LANCHOR6
+	.word	.LANCHOR200
+	.word	.LANCHOR0
 	.word	.LANCHOR15
-	.word	.LANCHOR145
-.L1555:
-	beq	.L1480
+.L1561:
+	bl	FlashDieInfoInit
+	ldr	r2, [r4]
+	ldr	r3, [sp, #28]
+	ldrh	r1, [r2, #16]
+	mov	fp, r3
+	tst	r1, #64
+	mov	r1, r5
+	beq	.L1486
 	ldrb	r0, [r2, #19]	@ zero_extendqisi2
-	ldr	r3, .L1557
-	ldr	ip, .L1557+56
+	ldr	r3, .L1563
+	ldr	ip, .L1563+60
 	strb	r0, [r3]
 	ldrb	r2, [ip, #1]	@ zero_extendqisi2
-	ldr	r3, .L1557+4
+	ldr	r3, .L1563+4
 	ldrb	ip, [ip, #2]	@ zero_extendqisi2
 	strb	r2, [r3]
-	ldr	r2, .L1557+8
+	ldr	r2, .L1563+8
 	strb	ip, [r2]
 	add	ip, r0, #-1
 	cmp	ip, #7
 	mov	ip, r2
-	bhi	.L1481
-	ldr	r3, .L1557+12
-	str	r3, [r10]
+	bhi	.L1487
+	ldr	r3, .L1563+12
+	str	r3, [r5]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bls	.L1482
+	bls	.L1488
 	cmp	r0, #8
-	bne	.L1483
-.L1482:
-	ldr	r3, .L1557+16
+	bne	.L1489
+.L1488:
+	ldr	r3, .L1563+16
 	movs	r2, #1
 	str	r2, [r3]
-.L1483:
+.L1489:
 	cmp	r0, #7
-	ldr	r3, .L1557+20
-	beq	.L1484
+	ldr	r3, .L1563+20
+	beq	.L1490
 	sub	r2, r3, #8
 	cmp	r0, #8
 	it	ne
 	movne	r3, r2
-.L1484:
+.L1490:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1486:
-	ldrsb	ip, [r1, #1]!
-	cmp	ip, #0
-	bne	.L1485
+.L1492:
+	ldrsb	r5, [r1, #1]!
+	cbnz	r5, .L1491
 	adds	r2, r2, #1
-.L1485:
+.L1491:
 	cmp	r3, r1
-	bne	.L1486
+	bne	.L1492
 	cmp	r2, #27
-	bls	.L1480
+	bls	.L1486
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1480:
-	ldr	r3, .L1557+24
+.L1486:
+	ldr	r3, .L1563+24
 	ldr	r3, [r3]
-	cmp	r3, r5
-	bne	.L1497
+	cmp	r3, r10
+	bne	.L1503
 	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1497
-	ldr	r3, [r4]
+	cbz	r3, .L1503
+	ldr	r3, .L1563+28
 	movs	r2, #0
+	ldr	r3, [r3]
 	strb	r2, [r3, #18]
-.L1497:
+.L1503:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1498
+	bne	.L1504
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1498
+	cbz	r3, .L1504
 	movs	r3, #0
 	movs	r0, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1498:
+.L1504:
 	ldrb	r3, [fp]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1499
+	beq	.L1505
 	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1500
+	cbnz	r2, .L1506
 	lsls	r3, r3, #31
-	bmi	.L1499
-.L1500:
+	bmi	.L1505
+.L1506:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L1557+28
+	ldr	r3, .L1563+32
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1499:
+.L1505:
 	ldr	r3, [r4]
 	movs	r7, #16
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1557+32
+	ldr	r0, .L1563+36
 	bl	FlashReadIdbDataRaw
 	ldr	r8, [r4]
-	ldr	r3, [sp, #20]
-	ldr	r4, .L1557+36
+	ldr	r3, [sp, #24]
+	ldr	r4, .L1563+40
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
 	strb	r7, [r3]
 	ldrh	r5, [r8, #10]
@@ -10829,7 +10878,7 @@ FlashInit:
 	ldr	r3, [r6]
 	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	ldr	r3, .L1557+40
+	ldr	r3, .L1563+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r8, #13]	@ zero_extendqisi2
@@ -10841,7 +10890,7 @@ FlashInit:
 	strh	r0, [r4, #18]	@ movhi
 	ldrb	r3, [r8, #9]	@ zero_extendqisi2
 	strh	r2, [r4, #24]	@ movhi
-	ldr	r2, [sp, #16]
+	ldr	r2, [sp, #20]
 	strh	r3, [r4, #20]	@ movhi
 	smulbb	r5, r5, r3
 	strh	r7, [r4, #26]	@ movhi
@@ -10849,7 +10898,7 @@ FlashInit:
 	uxth	r5, r5
 	cmp	r2, #1
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1501
+	bne	.L1507
 	lsls	r3, r3, #1
 	lsrs	r2, r6, #1
 	lsls	r5, r5, #1
@@ -10858,93 +10907,97 @@ FlashInit:
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1501:
+.L1507:
 	ldrb	r0, [r8, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-.L1454:
-	add	sp, sp, #32
+.L1457:
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1467:
+.L1473:
 	cmp	r3, #220
-	bne	.L1469
+	bne	.L1475
 	mov	r1, #4096
-	b	.L1550
-.L1469:
+	b	.L1556
+.L1475:
 	cmp	r3, #211
 	itttt	eq
 	moveq	r3, #4096
 	strheq	r3, [r2, #14]	@ movhi
 	moveq	r3, #2
 	strbeq	r3, [r2, #13]
-	b	.L1468
-.L1481:
+	b	.L1474
+.L1487:
 	sub	lr, r0, #17
 	cmp	lr, #2
-	bhi	.L1488
-	ldr	r3, .L1557+44
+	bhi	.L1494
+	ldr	r3, .L1563+48
 	cmp	r0, #19
-	str	r3, [r10]
+	str	r3, [r5]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
 	strb	r3, [r2]
-	b	.L1480
-.L1488:
+	b	.L1486
+.L1494:
 	cmp	r0, #33
-	beq	.L1490
+	beq	.L1496
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1491
-.L1490:
-	ldr	r2, .L1557+48
+	bhi	.L1497
+.L1496:
+	ldr	r2, .L1563+52
 	str	r2, [r1]
 	movs	r2, #4
 	strb	r2, [r3]
 	movs	r3, #7
 	strb	r3, [ip]
-	b	.L1480
-.L1491:
+	b	.L1486
+.L1497:
 	sub	r2, r0, #67
 	uxtb	r2, r2
 	cmp	r2, #1
-	bls	.L1492
+	bls	.L1498
 	sub	ip, r0, #34
 	cmp	ip, #1
-	bhi	.L1493
-.L1492:
-	ldr	ip, .L1557+48
+	bhi	.L1499
+.L1498:
+	ldr	r5, .L1563+52
 	cmp	r0, #35
-	str	ip, [r1]
-	ldr	r1, .L1557+8
-	beq	.L1494
+	str	r5, [r1]
+	ldr	r1, .L1563+8
+	beq	.L1500
 	cmp	r0, #68
-	beq	.L1494
+	beq	.L1500
 	movs	r0, #7
-.L1551:
+.L1557:
 	cmp	r2, #1
 	strb	r0, [r1]
 	ite	ls
 	movls	r2, #4
 	movhi	r2, #5
 	strb	r2, [r3]
-	b	.L1480
-.L1494:
+	b	.L1486
+.L1500:
 	movs	r0, #17
-	b	.L1551
-.L1493:
+	b	.L1557
+.L1499:
 	cmp	r0, #49
 	itt	eq
-	ldreq	r3, .L1557+52
-	streq	r3, [r10]
-	b	.L1480
-.L1503:
+	ldreq	r3, .L1563+56
+	streq	r3, [r5]
+	b	.L1486
+.L1509:
 	mvn	r0, #1
-	b	.L1454
-.L1558:
+	b	.L1457
+.L1469:
+	ldr	r5, [sp, #28]
+	strb	r0, [r5]
+	b	.L1468
+.L1564:
 	.align	2
-.L1557:
+.L1563:
 	.word	.LANCHOR9
 	.word	.LANCHOR12
 	.word	.LANCHOR151
@@ -10952,6 +11005,7 @@ FlashInit:
 	.word	.LANCHOR36
 	.word	.LANCHOR20+28
 	.word	.LANCHOR119
+	.word	.LANCHOR18
 	.word	.LANCHOR148
 	.word	.LANCHOR141
 	.word	.LANCHOR14
@@ -10970,142 +11024,199 @@ FlashInit:
 	.fpu softvfp
 	.type	FlashReadSlc2KPages, %function
 FlashReadSlc2KPages:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r1
-	ldr	r3, .L1588
-	mov	fp, r2
+	ldr	r3, .L1622
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	movs	r7, #0
-	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1560:
-	cmp	r7, r8
-	bne	.L1573
+	sub	sp, sp, #24
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	str	r2, [sp, #12]
+.L1566:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bne	.L1590
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1573:
-	sub	r3, r8, r7
-	add	r2, sp, #12
-	uxtb	r3, r3
-	mov	r1, fp
+.L1590:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #20
+	ldr	r1, [sp, #12]
 	mov	r0, r4
+	subs	r3, r3, r7
+	uxtb	r3, r3
 	str	r3, [sp]
-	add	r3, sp, #8
+	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1588+4
-	ldr	r3, [sp, #8]
+	ldr	r2, .L1622+4
+	ldr	r3, [sp, #16]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1561
+	bhi	.L1567
 	mov	r3, #-1
 	str	r3, [r4]
-.L1562:
+.L1568:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1560
-.L1561:
-	ldr	r2, .L1588+8
+	b	.L1566
+.L1567:
+	ldr	r2, .L1622+8
+	mov	r8, #0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r1, [sp, #12]
+.L1569:
+	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadCmd
 	mov	r0, r5
 	bl	NandcWaitFlashReady
 	ldr	r3, [r4, #12]
-	mov	r2, r10
+	mov	r2, fp
 	movs	r1, #0
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1588+12
+	ldr	r3, .L1622+12
 	mov	r6, r0
-	ldr	r1, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1570
+.L1573:
+	adds	r3, r6, #1
+	beq	.L1571
+.L1572:
+	cmp	r8, #0
+	beq	.L1575
+.L1574:
+	mov	r6, #256
+.L1575:
+	mov	r8, #0
+.L1576:
+	ldr	r3, .L1622+16
 	mov	r0, r5
+	ldr	r1, [sp, #20]
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1563
+	cbz	r3, .L1577
 	add	r3, r3, #2048
-.L1563:
+.L1577:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1564
+	cbz	r2, .L1578
 	adds	r2, r2, #8
-.L1564:
+.L1578:
 	str	r2, [sp]
 	movs	r1, #0
-	mov	r2, r10
+	mov	r2, fp
 	mov	r0, r5
 	bl	NandcXferData
-	mov	r1, r0
+	ldr	r3, .L1622+12
+	mov	r10, r0
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1579
+.L1582:
+	cmp	r10, #-1
+	beq	.L1580
+.L1581:
+	cmp	r8, #0
+	beq	.L1584
+.L1583:
+	mov	r10, #256
+.L1584:
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L1588+16
-	cmp	r6, r1
+	ldr	r2, .L1622+20
+	cmp	r6, r10
 	it	cc
-	movcc	r6, r1
-	ldrb	r2, [r3]	@ zero_extendqisi2
+	movcc	r6, r10
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1565
-	adds	r5, r6, #1
-	it	ne
-	movne	r6, #256
-	str	r6, [r4]
-.L1568:
+	bhi	.L1585
+	movs	r3, #0
+.L1621:
+	str	r3, [r4]
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1569
+	cbz	r3, .L1586
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1569
+	bne	.L1586
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1569
+	bne	.L1586
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1569:
+.L1586:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1562
+	bne	.L1568
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1588+20
+	ldr	r0, .L1622+24
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1571
+	cbz	r1, .L1588
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1588+24
+	ldr	r0, .L1622+28
 	bl	rknand_print_hex
-.L1571:
+.L1588:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1562
+	beq	.L1568
 	movs	r3, #4
-	ldr	r0, .L1588+28
+	ldr	r0, .L1622+32
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1562
-.L1565:
-	movs	r3, #0
-	str	r3, [r4]
 	b	.L1568
-.L1589:
+.L1570:
+	mov	r0, r5
+	bl	flash_read_ecc
+	cmp	r0, #5
+	bls	.L1573
+	mov	r6, #256
+	b	.L1572
+.L1571:
+	cmp	r8, #10
+	beq	.L1574
+	add	r8, r8, #1
+	b	.L1569
+.L1579:
+	mov	r0, r5
+	bl	flash_read_ecc
+	cmp	r0, #5
+	bls	.L1582
+	mov	r10, #256
+	b	.L1581
+.L1580:
+	cmp	r8, #10
+	beq	.L1583
+	add	r8, r8, #1
+	b	.L1576
+.L1585:
+	mov	r3, #256
+	b	.L1621
+.L1623:
 	.align	2
-.L1588:
+.L1622:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR3
+	.word	.LANCHOR200
+	.word	.LANCHOR4
 	.word	.LANCHOR33
 	.word	.LC25
 	.word	.LC26
@@ -11122,36 +11233,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1681
+	ldr	r3, .L1715
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1591
-	ldr	r2, .L1681+4
+	cbnz	r3, .L1625
+	ldr	r2, .L1715+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1681+8
+	ldr	r2, .L1715+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1592:
+.L1626:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1630
+	bcc	.L1664
 	movs	r0, #0
-	b	.L1590
-.L1591:
+	b	.L1624
+.L1625:
 	bl	FlashReadSlc2KPages
-.L1590:
+.L1624:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1630:
+.L1664:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -11167,86 +11278,86 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1681+12
+	ldr	r2, .L1715+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1594
+	bhi	.L1628
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1595:
+.L1629:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1592
-.L1594:
-	ldr	r2, .L1681+16
+	b	.L1626
+.L1628:
+	ldr	r2, .L1715+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1681+20
+	ldr	r3, .L1715+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1681+24
+	ldr	r3, .L1715+24
 	ldr	r3, [r3]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	cmp	r3, #7
-	bhi	.L1597
-	ldr	r3, .L1681+28
+	bhi	.L1631
+	ldr	r3, .L1715+28
 	subs	r2, r2, #7
 	cmp	r2, #1
-	ldr	r2, .L1681+32
+	ldr	r2, .L1715+32
 	add	r1, r3, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	it	ls
 	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1597
-	ldr	r2, .L1681+36
+	beq	.L1631
+	ldr	r2, .L1715+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1597:
+.L1631:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1599
+	beq	.L1633
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1600
-.L1599:
-	ldr	r3, .L1681+40
+	bge	.L1634
+.L1633:
+	ldr	r3, .L1715+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1600
+	cbz	r3, .L1634
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1607:
+.L1641:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1602
+	bne	.L1636
 	cmp	r4, #255
-	beq	.L1632
-.L1602:
-	cbz	r5, .L1604
-	ldr	r3, .L1681+44
+	beq	.L1666
+.L1636:
+	cbz	r5, .L1638
+	ldr	r3, .L1715+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1605:
+.L1639:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1603
+	cbz	r5, .L1637
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1603:
+.L1637:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -11254,30 +11365,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1681+8
+	ldr	r3, .L1715+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1606
+	cbz	r3, .L1640
 	adds	r0, r0, #1
-	bne	.L1606
-	ldr	r3, .L1681+8
+	bne	.L1640
+	ldr	r3, .L1715+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1607
-.L1600:
+	b	.L1641
+.L1634:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1607
-.L1604:
+	b	.L1641
+.L1638:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1605
-.L1632:
+	b	.L1639
+.L1666:
 	movs	r5, #0
-	b	.L1603
-.L1606:
-	cbz	r5, .L1608
-	ldr	r3, .L1681+44
+	b	.L1637
+.L1640:
+	cbz	r5, .L1642
+	ldr	r3, .L1715+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11296,30 +11407,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1608:
+.L1642:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1681+8
+	ldr	r3, .L1715+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1609
-	ldr	r3, .L1681+48
+	bne	.L1643
+	ldr	r3, .L1715+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1610
-.L1614:
-	ldr	r3, .L1681+52
+	cbnz	r3, .L1644
+.L1648:
+	ldr	r3, .L1715+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1611
+	bne	.L1645
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1680
-.L1610:
-	ldr	r3, .L1681+56
+	b	.L1714
+.L1644:
+	ldr	r3, .L1715+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11331,50 +11442,50 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1613
-	ldr	r3, .L1681+60
+	beq	.L1647
+	ldr	r3, .L1715+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1633
-.L1613:
+	bls	.L1667
+.L1647:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1614
-.L1633:
+	beq	.L1648
+.L1667:
 	movs	r5, #0
-.L1609:
-	ldr	r3, .L1681+60
+.L1643:
+	ldr	r3, .L1715+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1622
-	ldr	r3, .L1681+52
+	bls	.L1656
+	ldr	r3, .L1715+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1622
+	bne	.L1656
 	mov	r6, #256
-	b	.L1617
-.L1682:
+	b	.L1651
+.L1716:
 	.align	2
-.L1681:
-	.word	.LANCHOR1
+.L1715:
+	.word	.LANCHOR2
 	.word	.LANCHOR31
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR201
+	.word	.LANCHOR202
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR21
 	.word	.LANCHOR20+4
 	.word	.LANCHOR15
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR30
 	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1611:
+.L1645:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11382,128 +11493,128 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1615
-	ldr	r3, .L1683
+	bne	.L1649
+	ldr	r3, .L1717
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1616
-	ldr	r2, .L1683+4
+	bhi	.L1650
+	ldr	r2, .L1717+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1616:
+.L1650:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1683+8
+	ldr	r2, .L1717+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1683+12
+	ldr	r0, .L1717+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1615
-	ldr	r3, .L1683+16
+	bne	.L1649
+	ldr	r3, .L1717+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1617
+	cbz	r5, .L1651
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1618
+	beq	.L1652
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1619
-.L1618:
+	bge	.L1653
+.L1652:
 	bl	flash_enter_slc_mode
-.L1620:
-	ldr	r3, .L1683+20
+.L1654:
+	ldr	r3, .L1717+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1680:
+.L1714:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1622
-.L1617:
+	bne	.L1656
+.L1651:
 	str	r6, [r10, fp]
-.L1623:
+.L1657:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1625
-	ldr	r2, .L1683+8
+	bne	.L1659
+	ldr	r2, .L1717+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1683+24
+	ldr	r0, .L1717+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1625
+	cbz	r1, .L1659
 	movs	r3, #4
-	ldr	r0, .L1683+28
+	ldr	r0, .L1717+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1625:
-	cbz	r5, .L1627
-	ldr	r3, .L1683+8
+.L1659:
+	cbz	r5, .L1661
+	ldr	r3, .L1717+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1628
-	ldr	r3, .L1683+20
+	bls	.L1662
+	ldr	r3, .L1717+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1628:
+.L1662:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1627
+	beq	.L1661
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1627:
+.L1661:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1629
+	beq	.L1663
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1595
-.L1629:
-	ldr	r3, .L1683+16
+	bge	.L1629
+.L1663:
+	ldr	r3, .L1717+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1595
+	beq	.L1629
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1595
-.L1619:
+	b	.L1629
+.L1653:
 	bl	flash_exit_slc_mode
-	b	.L1620
-.L1615:
+	b	.L1654
+.L1649:
 	movs	r5, #0
-.L1622:
+.L1656:
 	cmp	r6, #256
-	beq	.L1617
+	beq	.L1651
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1623
-.L1684:
+	b	.L1657
+.L1718:
 	.align	2
-.L1683:
+.L1717:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
@@ -11530,23 +11641,23 @@ FlashProgSlc2KPages:
 	mov	r8, r1
 	mov	r4, r0
 	mov	r6, r0
-	ldr	r3, .L1714
+	ldr	r3, .L1748
 	movs	r7, #0
-	ldr	fp, .L1714+28
+	ldr	fp, .L1748+28
 	str	r2, [sp, #8]
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1686:
+.L1720:
 	cmp	r7, r8
-	bne	.L1692
+	bne	.L1726
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L1703
-.L1713:
+	bne	.L1737
+.L1747:
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1692:
+.L1726:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11555,19 +11666,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1714+4
+	ldr	r2, .L1748+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1687
+	bhi	.L1721
 	mov	r3, #-1
 	str	r3, [r6]
-.L1688:
+.L1722:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1686
-.L1687:
-	ldr	r2, .L1714+8
+	b	.L1720
+.L1721:
+	ldr	r2, .L1748+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -11599,13 +11710,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1689
+	cbz	r3, .L1723
 	add	r3, r3, #2048
-.L1689:
+.L1723:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1690
+	cbz	r2, .L1724
 	adds	r2, r2, #8
-.L1690:
+.L1724:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -11627,24 +11738,24 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1688
-.L1699:
+	b	.L1722
+.L1733:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1694
+	bne	.L1728
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+12
+	ldr	r0, .L1748+12
 	bl	printf
-.L1695:
+.L1729:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-.L1693:
+.L1727:
 	cmp	r7, r8
-	bne	.L1699
-	b	.L1713
-.L1694:
+	bne	.L1733
+	b	.L1747
+.L1728:
 	sub	r3, r7, r8
-	ldr	fp, .L1714+32
+	ldr	fp, .L1748+32
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #8]
@@ -11673,46 +11784,46 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1696
+	bne	.L1730
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+16
+	ldr	r0, .L1748+16
 	bl	printf
 	str	r5, [r4]
-.L1696:
+.L1730:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1697
+	cbz	r3, .L1731
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1697
+	beq	.L1731
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+20
+	ldr	r0, .L1748+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1697:
+.L1731:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1695
+	beq	.L1729
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1695
+	beq	.L1729
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1714+24
+	ldr	r0, .L1748+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1695
-.L1703:
+	b	.L1729
+.L1737:
 	mov	r8, #0
-	ldr	r10, .L1714+36
-	b	.L1693
-.L1715:
+	ldr	r10, .L1748+36
+	b	.L1727
+.L1749:
 	.align	2
-.L1714:
+.L1748:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11720,7 +11831,7 @@ FlashProgSlc2KPages:
 	.word	.LC30
 	.word	.LC31
 	.word	.LC32
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LANCHOR199
 	.word	.LANCHOR198
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
@@ -11737,7 +11848,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1768
+	ldr	r5, .L1802
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -11745,36 +11856,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1768+4
+	ldr	r5, .L1802+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1717
-	ldr	r3, .L1768+8
+	cbnz	r7, .L1751
+	ldr	r3, .L1802+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1718:
+.L1752:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1731
-	ldr	r6, .L1768+12
+	bcc	.L1765
+	ldr	r6, .L1802+12
 	movs	r5, #0
-	ldr	r7, .L1768+16
-.L1732:
+	ldr	r7, .L1802+16
+.L1766:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1734
+	bcc	.L1768
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1735
-.L1743:
+	bne	.L1769
+.L1777:
 	movs	r0, #0
-	b	.L1716
-.L1717:
+	b	.L1750
+.L1751:
 	bl	FlashProgSlc2KPages
-.L1716:
+.L1750:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1731:
+.L1765:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -11787,81 +11898,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1768+12
+	ldr	r3, .L1802+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1720
+	bhi	.L1754
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1721:
+.L1755:
 	adds	r7, r7, #1
-	b	.L1718
-.L1720:
-	ldr	r3, .L1768+20
+	b	.L1752
+.L1754:
+	ldr	r3, .L1802+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1768+24
+	ldr	r3, .L1802+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1723
+	cbz	r3, .L1757
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1723:
+.L1757:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1768+24
+	ldr	r2, .L1802+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1724
+	beq	.L1758
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1724:
-	ldr	r2, .L1768+28
+.L1758:
+	ldr	r2, .L1802+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1768+24
+	ldr	r2, .L1802+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1768+12
+	ldr	r3, .L1802+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1725
+	bne	.L1759
 	bl	NandcWaitFlashReady
-.L1726:
+.L1760:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #7
-	bhi	.L1727
-	ldr	r3, .L1768+32
+	bhi	.L1761
+	ldr	r3, .L1802+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1727
-	ldr	r1, .L1768+36
+	cbz	r3, .L1761
+	ldr	r1, .L1802+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1727:
+.L1761:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1728
-	ldr	r3, .L1768+16
+	bne	.L1762
+	ldr	r3, .L1802+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1728
+	beq	.L1762
 	bl	flash_enter_slc_mode
-.L1729:
+.L1763:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -11873,11 +11984,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1730
+	beq	.L1764
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1768+40
+	ldr	r3, .L1802+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -11888,7 +11999,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1768+44
+	ldr	r3, .L1802+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -11901,19 +12012,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1730:
+.L1764:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1721
-.L1725:
+	b	.L1755
+.L1759:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1768+40
+	ldr	r3, .L1802+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -11922,45 +12033,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1726
-.L1728:
+	b	.L1760
+.L1762:
 	bl	flash_exit_slc_mode
-	b	.L1729
-.L1734:
+	b	.L1763
+.L1768:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1733
+	bne	.L1767
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1733
-	ldr	r2, .L1768+24
+	cbz	r3, .L1767
+	ldr	r2, .L1802+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1733:
+.L1767:
 	adds	r5, r5, #1
-	b	.L1732
-.L1735:
-	ldr	r10, .L1768+64
+	b	.L1766
+.L1769:
+	ldr	r10, .L1802+64
 	movs	r7, #0
-.L1736:
+.L1770:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1743
+	beq	.L1777
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1737
+	bne	.L1771
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+48
+	ldr	r0, .L1802+48
 	bl	printf
-.L1738:
+.L1772:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1736
-.L1737:
+	b	.L1770
+.L1771:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1768+68
+	ldr	fp, .L1802+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -11989,44 +12100,44 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1739
+	bne	.L1773
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+52
+	ldr	r0, .L1802+52
 	bl	printf
 	str	r5, [r4]
-.L1739:
+.L1773:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1740
+	cbz	r3, .L1774
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1740
+	beq	.L1774
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+56
+	ldr	r0, .L1802+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1740:
+.L1774:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1738
+	beq	.L1772
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1738
+	beq	.L1772
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1768+60
+	ldr	r0, .L1802+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1738
-.L1769:
+	b	.L1772
+.L1803:
 	.align	2
-.L1768:
+.L1802:
 	.word	.LANCHOR18
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR15
@@ -12036,7 +12147,7 @@ FlashProgPages:
 	.word	.LANCHOR21
 	.word	.LANCHOR20
 	.word	.LANCHOR17
-	.word	.LANCHOR3
+	.word	.LANCHOR4
 	.word	.LC29
 	.word	.LC30
 	.word	.LC31
@@ -12055,14 +12166,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1773
+	ldr	r3, .L1807
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1772
-	ldr	r5, .L1773+4
+	bcc	.L1806
+	ldr	r5, .L1807+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -12094,17 +12205,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1770:
+.L1804:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1772:
+.L1806:
 	movs	r4, #0
-	b	.L1770
-.L1774:
+	b	.L1804
+.L1808:
 	.align	2
-.L1773:
+.L1807:
 	.word	.LANCHOR149
 	.word	.LANCHOR153
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -12119,48 +12230,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1820
+	ldr	r3, .L1854
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1802
-	ldr	r2, .L1820+4
+	bne	.L1836
+	ldr	r2, .L1854+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1820+8
+	ldr	r2, .L1854+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1820+12
+	ldr	r2, .L1854+12
 	str	r0, [r2]
-	ldr	r2, .L1820+16
+	ldr	r2, .L1854+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1820+20
+	ldr	r2, .L1854+20
 	ldr	r7, [r2]
-	ldr	r2, .L1820+24
+	ldr	r2, .L1854+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1820+28
+	ldr	r2, .L1854+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1777:
+.L1811:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1781
+	bhi	.L1815
 	cmp	r5, #0
-	beq	.L1775
+	beq	.L1809
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1820+4
+	ldr	r10, .L1854+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1820+20
+	ldr	r7, .L1854+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -12170,44 +12281,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1783:
+.L1817:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1785
+	bhi	.L1819
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1786
+	bne	.L1820
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1787:
+.L1821:
 	mov	r8, #0
-.L1796:
-	ldr	r3, .L1820+16
+.L1830:
+	ldr	r3, .L1854+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1820+20
+	ldr	r3, .L1854+20
 	ldr	r10, [r3]
-	ldr	r3, .L1820+32
+	ldr	r3, .L1854+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1820+36
+	ldr	r3, .L1854+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1820+28
+	ldr	r3, .L1854+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1788:
+.L1822:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1791
-	cbz	r5, .L1775
-	ldr	fp, .L1820+4
+	bhi	.L1825
+	cbz	r5, .L1809
+	ldr	fp, .L1854+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -12216,59 +12327,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1820+20
+	ldr	r10, .L1854+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1793:
+.L1827:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1795
+	bhi	.L1829
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1796
-	ldr	r8, .L1820+20
+	bhi	.L1830
+	ldr	r8, .L1854+20
 	movs	r7, #0
 	mov	r10, #36
-.L1797:
+.L1831:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1799
+	bhi	.L1833
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1800
+	bls	.L1834
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1775
-.L1800:
-	ldr	r3, .L1820+20
+	cbz	r3, .L1809
+.L1834:
+	ldr	r3, .L1854+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1775:
+.L1809:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1781:
+.L1815:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1820+40
+	ldr	r3, .L1854+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1778
+	cbz	r3, .L1812
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1779
-.L1778:
+	cbnz	r0, .L1813
+.L1812:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1780
+	cbnz	r0, .L1814
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -12281,62 +12392,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1779:
+.L1813:
 	add	r10, r10, #1
-	b	.L1777
-.L1780:
+	b	.L1811
+.L1814:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1779
-.L1785:
+	b	.L1813
+.L1819:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1784
+	bne	.L1818
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1784:
+.L1818:
 	add	r8, r8, #1
-	b	.L1783
-.L1786:
-	ldr	r3, .L1820+44
+	b	.L1817
+.L1820:
+	ldr	r3, .L1854+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1820+8
+	ldr	r3, .L1854+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1803
+	cbnz	r3, .L1837
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1787
-.L1803:
+	b	.L1821
+.L1837:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1787
-.L1791:
+	b	.L1821
+.L1825:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1820+40
+	ldr	r3, .L1854+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1789
+	cbz	r3, .L1823
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1790
-.L1789:
+	cbnz	r0, .L1824
+.L1823:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1790
+	cbnz	r0, .L1824
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12351,44 +12462,44 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1790:
+.L1824:
 	add	fp, fp, #1
-	b	.L1788
-.L1795:
+	b	.L1822
+.L1829:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1794
+	cbz	r3, .L1828
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1794:
+.L1828:
 	adds	r7, r7, #1
-	b	.L1793
-.L1799:
+	b	.L1827
+.L1833:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1798
+	cbz	r3, .L1832
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1798
+	cbnz	r3, .L1832
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1798:
+.L1832:
 	adds	r7, r7, #1
-	b	.L1797
-.L1802:
+	b	.L1831
+.L1836:
 	movs	r4, #0
-	b	.L1775
-.L1821:
+	b	.L1809
+.L1855:
 	.align	2
-.L1820:
+.L1854:
 	.word	.LANCHOR76
 	.word	.LANCHOR27
 	.word	.LANCHOR15
@@ -12414,42 +12525,42 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1833
+	ldr	r3, .L1872
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1824
-	ldr	r3, .L1833+4
+	bne	.L1858
+	ldr	r3, .L1872+4
 	mov	r1, r4
-	ldr	r7, .L1833+8
-	ldr	r5, .L1833+12
+	ldr	r7, .L1872+8
+	ldr	r5, .L1872+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
-	mov	r8, r7
-	ldr	r6, .L1833+16
+	mov	fp, r7
+	ldr	r6, .L1872+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1833+20
-	ldr	r3, .L1833+24
-	ldr	r10, .L1833+56
+	ldr	r7, .L1872+20
+	ldr	r3, .L1872+24
+	ldr	r8, .L1872+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1825:
+.L1859:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1826
+	blt	.L1860
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1833+28
+	ldr	r4, .L1872+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
+	mov	r8, r7
 	bl	ftl_memset
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
 	ldr	r3, [r4, #8]
-	str	r7, [sp, #8]
 	str	r3, [r6, #4]
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
@@ -12457,42 +12568,43 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1833+32
+	ldr	r3, .L1872+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1827:
-	ldr	r3, [r8]
-	mov	fp, #0
+.L1861:
+	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1833+4
+	ldr	r3, .L1872+4
 	ldrh	r0, [r6, #10]
-	str	fp, [r5]
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
+	movs	r3, #0
+	str	r3, [r5]
 	orr	r3, r2, r1, lsl #10
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1833+36
+	ldr	r0, .L1872+36
 	bl	printf
-	ldr	r3, .L1833+40
+	ldr	r3, .L1872+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1828
+	blt	.L1862
 	ldr	r3, [r4, #8]
+	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
-	strh	fp, [r4, #2]	@ movhi
+	strh	r1, [r4, #2]	@ movhi
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
 	str	r3, [r6, #4]
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1833+44
+	ldr	r2, .L1872+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12501,9 +12613,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1828:
+.L1862:
 	movs	r3, #1
-	ldr	r0, .L1833+12
+	ldr	r0, .L1872+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -12511,29 +12623,29 @@ FtlBbmTblFlush:
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
-	adds	r3, r3, #1
-	bne	.L1829
+	adds	r2, r3, #1
+	bne	.L1863
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1833+48
+	ldr	r0, .L1872+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1827
+	bls	.L1861
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1833+52
+	ldr	r0, .L1872+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1824:
+.L1858:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1826:
-	ldrh	r2, [r10]
+.L1860:
+	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r4, r2
@@ -12541,21 +12653,21 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1825
-.L1829:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	bne	.L1824
-	movs	r3, #1
-	str	r3, [sp, #8]
-	b	.L1827
-.L1834:
+	b	.L1859
+.L1863:
+	add	r8, r8, #1
+	cmp	r8, #1
+	beq	.L1861
+	cmp	r3, #256
+	beq	.L1861
+	b	.L1858
+.L1873:
 	.align	2
-.L1833:
+.L1872:
 	.word	.LANCHOR76
 	.word	.LANCHOR188
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR74+24
 	.word	.LANCHOR45
 	.word	.LANCHOR57
@@ -12579,153 +12691,153 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1900
+	ldr	r3, .L1939
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1837
-.L1836:
-	ldr	r3, .L1900+4
-	ldr	r8, .L1900+60
-	ldr	r7, .L1900+8
+	bne	.L1876
+.L1875:
+	ldr	r3, .L1939+4
+	ldr	r8, .L1939+60
+	ldr	r7, .L1939+8
 	ldrh	r3, [r3]
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1838
-	ldr	r1, .L1900+12
-	movw	r2, #3139
-	ldr	r0, .L1900+16
+	ble	.L1877
+	ldr	r1, .L1939+12
+	movw	r2, #3165
+	ldr	r0, .L1939+16
 	bl	printf
-	ldr	r1, .L1900+20
-	ldr	r0, .L1900+24
+	ldr	r1, .L1939+20
+	ldr	r0, .L1939+24
 	bl	printf
-.L1838:
-	ldr	r3, .L1900+28
+.L1877:
+	ldr	r3, .L1939+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1839
-	ldr	r3, .L1900+4
+	bne	.L1878
+	ldr	r3, .L1939+4
 	ldrh	r5, [r3]
-	ldr	r3, .L1900+32
+	ldr	r3, .L1939+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
 	adds	r1, r0, #1
 	mul	r6, r3, r5
 	add	r1, r1, r6, lsr #2
-	ldr	r6, .L1900+36
+	ldr	r6, .L1939+36
 	uxth	r1, r1
 	ldr	r6, [r6]
-	cbz	r6, .L1840
-	ldr	r6, .L1900+40
+	cbz	r6, .L1879
+	ldr	r6, .L1939+40
 	ldr	r6, [r6]
 	cmp	r6, #39
-	bhi	.L1840
+	bhi	.L1879
 	cmp	r6, #2
-	bls	.L1874
+	bls	.L1913
 	lsls	r1, r5, #31
-	bpl	.L1870
+	bpl	.L1909
 	cmp	r3, #0
-	beq	.L1874
-.L1870:
+	beq	.L1913
+.L1909:
 	mov	r1, r0
-	b	.L1840
-.L1839:
+	b	.L1879
+.L1878:
 	cmp	r2, #1
-	bne	.L1874
-	ldr	r3, .L1900+44
+	bne	.L1913
+	ldr	r3, .L1939+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1874
-	ldr	r3, .L1900+48
+	beq	.L1913
+	ldr	r3, .L1939+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1874
-	ldr	r3, .L1900+4
-	ldr	r0, .L1900+36
+	bne	.L1913
+	ldr	r3, .L1939+4
+	ldr	r0, .L1939+36
 	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1840
-	ldr	r0, .L1900+40
+	cbz	r0, .L1879
+	ldr	r0, .L1939+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1840
+	bhi	.L1879
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1840:
-	cbz	r1, .L1841
+.L1879:
+	cbz	r1, .L1880
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1841:
-	ldr	r0, .L1900+52
+.L1880:
+	ldr	r0, .L1939+52
 	bl	List_pop_index_node
-	ldr	r3, .L1900+4
+	ldr	r3, .L1939+4
 	mov	r5, r0
 	uxth	r10, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1842
-	ldr	r1, .L1900+12
-	movw	r2, #3159
-	ldr	r0, .L1900+16
+	cbnz	r3, .L1881
+	ldr	r1, .L1939+12
+	movw	r2, #3185
+	ldr	r0, .L1939+16
 	bl	printf
-	ldr	r1, .L1900+20
-	ldr	r0, .L1900+24
+	ldr	r1, .L1939+20
+	ldr	r0, .L1939+24
 	bl	printf
-.L1842:
-	ldr	r3, .L1900+4
-	ldr	r2, .L1900+4
+.L1881:
+	ldr	r3, .L1939+4
+	ldr	r2, .L1939+4
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
 	cmp	r3, r10
-	bls	.L1836
+	bls	.L1875
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1900+56
+	ldr	r3, .L1939+56
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1836
+	bne	.L1875
 	strh	r10, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1844
-	ldr	r3, .L1900+56
+	bne	.L1883
+	ldr	r3, .L1939+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1900+4
+	ldr	r3, .L1939+4
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1836
-	movw	r2, #3175
-	ldr	r1, .L1900+12
-	ldr	r0, .L1900+16
+	ble	.L1875
+	movw	r2, #3201
+	ldr	r1, .L1939+12
+	ldr	r0, .L1939+16
 	bl	printf
-	ldr	r1, .L1900+20
-	ldr	r0, .L1900+24
+	ldr	r1, .L1939+20
+	ldr	r0, .L1939+24
 	bl	printf
-	b	.L1836
-.L1874:
+	b	.L1875
+.L1913:
 	movs	r1, #0
-	b	.L1841
-.L1901:
+	b	.L1880
+.L1940:
 	.align	2
-.L1900:
+.L1939:
 	.word	.LANCHOR76
 	.word	.LANCHOR88
 	.word	.LANCHOR40
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -12738,82 +12850,82 @@ allocate_data_superblock:
 	.word	.LANCHOR87
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.L1844:
-	ldr	r3, .L1902
+.L1883:
+	ldr	r3, .L1941
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1846
-	ldr	r1, .L1902+4
-	movw	r2, #3178
-	ldr	r0, .L1902+8
+	ble	.L1885
+	ldr	r1, .L1941+4
+	movw	r2, #3204
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1846:
-	ldr	r3, .L1902+20
+.L1885:
+	ldr	r3, .L1941+20
 	add	lr, r4, #16
-	ldr	r2, .L1902+24
+	ldr	r2, .L1941+24
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #36
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1847:
+.L1886:
 	cmp	r0, r3
-	bne	.L1849
-	cbnz	r6, .L1850
-	ldr	r1, .L1902+4
-	movw	r2, #3190
-	ldr	r0, .L1902+8
+	bne	.L1888
+	cbnz	r6, .L1889
+	ldr	r1, .L1941+4
+	mov	r2, #3216
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1850:
-	ldr	r3, .L1902+28
-	ldr	r8, .L1902+80
+.L1889:
+	ldr	r3, .L1941+28
+	ldr	r8, .L1941+80
 	ldr	r3, [r3]
-	cbz	r3, .L1851
-	ldr	r3, .L1902+32
+	cbz	r3, .L1890
+	ldr	r3, .L1941+32
 	cmp	r4, r3
-	bne	.L1851
+	bne	.L1890
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1851:
-	ldr	r3, .L1902+36
+.L1890:
+	ldr	r3, .L1941+36
 	ldrh	r3, [r3]
 	cmp	r3, r10
-	bne	.L1852
-	ldr	r1, .L1902+4
-	movw	r2, #3197
-	ldr	r0, .L1902+8
+	bne	.L1891
+	ldr	r1, .L1941+4
+	movw	r2, #3223
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1852:
+.L1891:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1902+40
-	ldr	fp, .L1902+84
+	ldr	r3, .L1941+40
+	ldr	fp, .L1941+84
 	cmp	r2, #0
-	bne	.L1853
+	bne	.L1892
 	ldr	r1, [r8]
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1854
-	ldr	r0, .L1902+44
+	beq	.L1893
+	ldr	r0, .L1941+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L1897:
+.L1936:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r10
 	ldr	r2, [r3]
@@ -12822,43 +12934,43 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r3]
 	bl	ftl_set_blk_mode
-.L1898:
+.L1937:
 	ldr	r2, [r8]
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1902+48
+	ldr	r2, .L1941+48
 	ldr	r1, [r2]
 	cmp	r0, r1
 	ldrh	r1, [r7]
 	it	hi
 	strhi	r0, [r2]
-	ldr	r2, .L1902+44
+	ldr	r2, .L1941+44
 	ldr	r0, [r3]
 	ldr	r3, [fp]
 	ldrh	r2, [r2]
-	ldr	r7, .L1902+52
+	ldr	r7, .L1941+52
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1902+56
+	ldr	r3, .L1941+56
 	str	r0, [r3]
-	ldr	r3, .L1902+60
+	ldr	r3, .L1941+60
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-	ldr	r3, .L1902+20
+	ldr	r3, .L1941+20
 	ldr	r0, [r3]
 	movs	r3, #36
 	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1858:
+.L1897:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1859
-	ldr	r3, .L1902+64
+	bne	.L1898
+	ldr	r3, .L1941+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1860
+	cbz	r3, .L1899
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -12866,8 +12978,8 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1860:
-	ldr	r3, .L1902+20
+.L1899:
+	ldr	r3, .L1941+20
 	movs	r7, #0
 	mov	r8, r7
 	mov	fp, #36
@@ -12875,43 +12987,43 @@ allocate_data_superblock:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1862:
+.L1901:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L1864
+	bhi	.L1903
 	cmp	r8, #0
-	beq	.L1865
+	beq	.L1904
 	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1865:
+.L1904:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1866
-	ldr	r3, .L1902+68
+	bne	.L1905
+	ldr	r3, .L1941+68
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1836
-.L1849:
+	b	.L1875
+.L1888:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1848
+	beq	.L1887
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1848:
+.L1887:
 	adds	r3, r3, #36
-	b	.L1847
-.L1854:
+	b	.L1886
+.L1893:
 	movs	r2, #2
-	b	.L1897
-.L1853:
+	b	.L1936
+.L1892:
 	ldr	r1, [r8]
 	mov	r0, r10
 	str	r3, [sp, #4]
@@ -12922,20 +13034,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.10
-	b	.L1898
-.L1859:
+	b	.L1937
+.L1898:
 	ldr	r2, [r1, #-36]
 	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1858
-.L1864:
-	ldr	r2, .L1902+20
+	b	.L1897
+.L1903:
+	ldr	r2, .L1941+20
 	mul	r3, fp, r7
 	ldr	r2, [r2]
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1863
+	bne	.L1902
 	ldr	r0, [r1, #4]
 	add	r8, r8, #1
 	str	r2, [sp, #4]
@@ -12947,12 +13059,12 @@ allocate_data_superblock:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4, #7]
-.L1863:
+.L1902:
 	adds	r7, r7, #1
-	b	.L1862
-.L1866:
-	ldr	r3, .L1902+72
-	ldr	r1, .L1902+76
+	b	.L1901
+.L1905:
+	ldr	r3, .L1941+72
+	ldr	r1, .L1941+76
 	ldrh	r3, [r3]
 	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -12965,32 +13077,32 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L1902+68
+	ldr	r2, .L1941+68
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1867
+	cbz	r3, .L1906
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1837
-.L1867:
-	ldr	r1, .L1902+4
-	movw	r2, #3256
-	ldr	r0, .L1902+8
+	cbnz	r3, .L1876
+.L1906:
+	ldr	r1, .L1941+4
+	movw	r2, #3282
+	ldr	r0, .L1941+8
 	bl	printf
-	ldr	r1, .L1902+12
-	ldr	r0, .L1902+16
+	ldr	r1, .L1941+12
+	ldr	r0, .L1941+16
 	bl	printf
-.L1837:
+.L1876:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1903:
+.L1942:
 	.align	2
-.L1902:
+.L1941:
 	.word	.LANCHOR88
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -12998,12 +13110,12 @@ allocate_data_superblock:
 	.word	.LANCHOR38
 	.word	.LANCHOR28
 	.word	.LANCHOR91
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR167
 	.word	.LANCHOR48
 	.word	.LANCHOR169
 	.word	-1024
-	.word	.LANCHOR205
+	.word	.LANCHOR206
 	.word	.LANCHOR191
 	.word	.LANCHOR15
 	.word	.LANCHOR83
@@ -13025,43 +13137,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1916
+	ldr	r4, .L1955
 	ldrh	r3, [r4]
-	cbz	r3, .L1905
-	ldr	r8, .L1916+12
+	cbz	r3, .L1944
+	ldr	r8, .L1955+12
 	movs	r7, #0
-.L1906:
-	ldr	r3, .L1916+4
+.L1945:
+	ldr	r3, .L1955+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1912
+	bhi	.L1951
 	bl	FtlGcReFreshBadBlk
-.L1905:
+.L1944:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1912:
-	ldr	r2, .L1916+8
+.L1951:
+	ldr	r2, .L1955+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L1907:
+.L1946:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1911
+	bhi	.L1950
 	adds	r7, r7, #1
-	b	.L1906
-.L1911:
+	b	.L1945
+.L1950:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L1908
+	bne	.L1947
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -13069,23 +13181,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L1909:
+.L1948:
 	cmp	r5, r2
-	bcc	.L1910
+	bcc	.L1949
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L1908:
+.L1947:
 	add	fp, fp, #1
-	b	.L1907
-.L1910:
+	b	.L1946
+.L1949:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1909
-.L1917:
+	b	.L1948
+.L1956:
 	.align	2
-.L1916:
+.L1955:
 	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR47
@@ -13104,32 +13216,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1928
+	ldr	r3, .L1967
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1919
-	ldr	r2, .L1928+4
+	bne	.L1958
+	ldr	r2, .L1967+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1920
+	bne	.L1959
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1921:
-	ldr	r5, .L1928+8
+.L1960:
+	ldr	r5, .L1967+8
 	mov	r1, r4
-	ldr	r0, .L1928+12
+	ldr	r0, .L1967+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1923
-	ldr	r1, .L1928+16
-	movw	r2, #3367
-	ldr	r0, .L1928+20
+	cbnz	r3, .L1962
+	ldr	r1, .L1967+16
+	movw	r2, #3393
+	ldr	r0, .L1967+20
 	bl	printf
-	ldr	r1, .L1928+24
-	ldr	r0, .L1928+28
+	ldr	r1, .L1967+24
+	ldr	r0, .L1967+28
 	bl	printf
-.L1923:
+.L1962:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13137,52 +13249,52 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1928+32
+	ldr	r3, .L1967+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1928+36
+	ldr	r2, .L1967+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1927
-	ldr	r1, .L1928+16
-	movw	r2, #3370
-	ldr	r0, .L1928+20
+	ble	.L1966
+	ldr	r1, .L1967+16
+	movw	r2, #3396
+	ldr	r0, .L1967+20
 	bl	printf
-	ldr	r1, .L1928+24
-	ldr	r0, .L1928+28
+	ldr	r1, .L1967+24
+	ldr	r0, .L1967+28
 	bl	printf
-.L1927:
+.L1966:
 	movs	r3, #1
-	b	.L1918
-.L1920:
-	ldr	r2, .L1928+40
+	b	.L1957
+.L1959:
+	ldr	r2, .L1967+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1918
-	ldr	r2, .L1928+44
+	beq	.L1957
+	ldr	r2, .L1967+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1918
-	ldr	r2, .L1928+48
+	beq	.L1957
+	ldr	r2, .L1967+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1921
-.L1918:
+	bne	.L1960
+.L1957:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1919:
+.L1958:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1918
-.L1929:
+	b	.L1957
+.L1968:
 	.align	2
-.L1928:
+.L1967:
 	.word	.LANCHOR83
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR85
 	.word	.LANCHOR82
-	.word	.LANCHOR206
+	.word	.LANCHOR207
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -13207,47 +13319,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1931
-	ldr	r5, .L1942
+	beq	.L1970
+	ldr	r5, .L1981
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1932
+	bne	.L1971
 	mov	r1, r0
-	ldr	r0, .L1942+4
+	ldr	r0, .L1981+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1933
-	ldr	r1, .L1942+8
-	movw	r2, #3385
-	ldr	r0, .L1942+12
+	cbnz	r3, .L1972
+	ldr	r1, .L1981+8
+	movw	r2, #3411
+	ldr	r0, .L1981+12
 	bl	printf
-	ldr	r1, .L1942+16
-	ldr	r0, .L1942+20
+	ldr	r1, .L1981+16
+	ldr	r0, .L1981+20
 	bl	printf
-.L1933:
+.L1972:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L1942+24
+	ldr	r0, .L1981+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1934
-	ldr	r6, .L1942+28
+	cbz	r0, .L1973
+	ldr	r6, .L1981+28
 	mov	r1, r4
-	ldr	r0, .L1942+24
+	ldr	r0, .L1981+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L1935
-	ldr	r1, .L1942+8
-	movw	r2, #3389
-	ldr	r0, .L1942+12
+	cbnz	r3, .L1974
+	ldr	r1, .L1981+8
+	movw	r2, #3415
+	ldr	r0, .L1981+12
 	bl	printf
-	ldr	r1, .L1942+16
-	ldr	r0, .L1942+20
+	ldr	r1, .L1981+16
+	ldr	r0, .L1981+20
 	bl	printf
-.L1935:
+.L1974:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13255,33 +13367,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L1942+32
+	ldr	r0, .L1981+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L1934:
+.L1973:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1938:
+.L1977:
 	movs	r5, #0
-	b	.L1930
-.L1932:
+	b	.L1969
+.L1971:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1931:
-	ldr	r6, .L1942+36
+.L1970:
+	ldr	r6, .L1981+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1937
+	bne	.L1976
 	strh	r4, [r6]	@ movhi
-	b	.L1938
-.L1937:
+	b	.L1977
+.L1976:
 	cmp	r4, r0
-	beq	.L1938
+	beq	.L1977
 	bl	update_vpc_list
-	ldr	r3, .L1942+40
+	ldr	r3, .L1981+40
 	adds	r5, r0, #0
-	ldr	r2, .L1942+44
+	ldr	r2, .L1981+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -13289,31 +13401,31 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1942+48
+	ldr	r3, .L1981+48
 	muls	r3, r2, r3
-	ldr	r2, .L1942
+	ldr	r2, .L1981
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1930
+	cbnz	r2, .L1969
 	cmp	r4, r1
-	beq	.L1930
-	ldr	r1, .L1942+8
-	movw	r2, #3410
-	ldr	r0, .L1942+12
+	beq	.L1969
+	ldr	r1, .L1981+8
+	movw	r2, #3436
+	ldr	r0, .L1981+12
 	bl	printf
-	ldr	r1, .L1942+16
-	ldr	r0, .L1942+20
+	ldr	r1, .L1981+16
+	ldr	r0, .L1981+20
 	bl	printf
-.L1930:
+.L1969:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1943:
+.L1982:
 	.align	2
-.L1942:
+.L1981:
 	.word	.LANCHOR83
 	.word	.LC36
-	.word	.LANCHOR207
+	.word	.LANCHOR208
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -13340,71 +13452,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L1944
+	beq	.L1983
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1944
+	beq	.L1983
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1955
-	ldr	r6, .L1955+4
+	ldr	r5, .L1994
+	ldr	r6, .L1994+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L1948:
+.L1987:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1950
+	beq	.L1989
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1951
+	bne	.L1990
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1951
+	cbnz	r1, .L1990
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L1951
+	bne	.L1990
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1950
+	cbnz	r2, .L1989
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1950:
+.L1989:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1955+8
+	ldr	r2, .L1994+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1949
+	bne	.L1988
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1949:
+.L1988:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1948
-.L1951:
+	b	.L1987
+.L1990:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1944
+	cbz	r2, .L1983
 	cmp	r3, #1
-	bne	.L1944
-	ldr	r3, .L1955+12
+	bne	.L1983
+	ldr	r3, .L1994+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1944
-	ldr	r3, .L1955+16
+	bcc	.L1983
+	ldr	r3, .L1994+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13412,16 +13524,16 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L1955+20
+	ldr	r2, .L1994+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L1944:
+.L1983:
 	pop	{r4, r5, r6, pc}
-.L1956:
+.L1995:
 	.align	2
-.L1955:
+.L1994:
 	.word	.LANCHOR15
 	.word	.LANCHOR120
 	.word	.LANCHOR38
@@ -13445,93 +13557,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1958
-	ldr	r1, .L1979
-	movw	r2, #3307
-	ldr	r0, .L1979+4
+	bne	.L1997
+	ldr	r1, .L2018
+	movw	r2, #3333
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1958:
-	ldr	r5, .L1979+16
+.L1997:
+	ldr	r5, .L2018+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1959
-	ldr	r1, .L1979
-	movw	r2, #3308
-	ldr	r0, .L1979+4
+	bne	.L1998
+	ldr	r1, .L2018
+	movw	r2, #3334
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1959:
+.L1998:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1960
-	ldr	r1, .L1979
-	movw	r2, #3309
-	ldr	r0, .L1979+4
+	cbnz	r3, .L1999
+	ldr	r1, .L2018
+	movw	r2, #3335
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1960:
+.L1999:
 	movs	r3, #0
-	ldr	r7, .L1979+20
+	ldr	r7, .L2018+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L1979+24
+	ldr	r6, .L2018+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L1961:
+.L2000:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L1962
+	beq	.L2001
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L1964
+	bne	.L2003
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L1964
-	ldr	ip, .L1979+28
+	bne	.L2003
+	ldr	ip, .L2018+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L1964
+	bne	.L2003
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1962:
+.L2001:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L1963
+	bne	.L2002
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1963:
+.L2002:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L1961
-.L1964:
-	ldr	r8, .L1979+24
+	b	.L2000
+.L2003:
+	ldr	r8, .L2018+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1965:
+.L2004:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L1967:
+.L2006:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13543,31 +13655,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L1967
+	beq	.L2006
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1968
+	bne	.L2007
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1969
-	ldr	r1, .L1979+28
+	cbnz	r1, .L2008
+	ldr	r1, .L2018+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L1968
+	bne	.L2007
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1968
+	cbz	r3, .L2007
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1965
-.L1969:
-	ldr	r2, .L1979+32
+	b	.L2004
+.L2008:
+	ldr	r2, .L2018+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L1968
-	ldr	r3, .L1979+36
+	bcc	.L2007
+	ldr	r3, .L2018+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13579,27 +13691,27 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L1968:
+.L2007:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1957
+	bne	.L1996
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1957
-	ldr	r1, .L1979
-	movw	r2, #3353
-	ldr	r0, .L1979+4
+	cbz	r3, .L1996
+	ldr	r1, .L2018
+	movw	r2, #3379
+	ldr	r0, .L2018+4
 	bl	printf
-	ldr	r1, .L1979+8
-	ldr	r0, .L1979+12
+	ldr	r1, .L2018+8
+	ldr	r0, .L2018+12
 	bl	printf
-.L1957:
+.L1996:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1980:
+.L2019:
 	.align	2
-.L1979:
-	.word	.LANCHOR208
+.L2018:
+	.word	.LANCHOR209
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -13621,38 +13733,38 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2001
+	ldr	r2, .L2044
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r2]
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L1983
-	ldr	r4, .L2001+4
-	ldr	fp, .L2001+108
-	ldr	r8, .L2001+112
-	ldr	r5, .L2001+8
-	ldr	r0, [fp]
-	ldr	r6, [r8]
+	bne	.L2022
+	ldr	r4, .L2044+4
+	ldr	r8, .L2044+112
+	ldr	fp, .L2044+116
+	ldr	r5, .L2044+8
+	ldr	r0, [r8]
+	ldr	r6, [fp]
 	ldrh	r2, [r4]
 	str	r0, [r5, #8]
 	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r7, .L2001+12
+	ldr	r7, .L2044+12
 	strh	r2, [r6]	@ movhi
 	str	r3, [r6, #12]
-	ldr	ip, .L2001+116
+	ldr	ip, .L2044+120
 	ldr	r2, [r4, #8]
 	str	r3, [r6, #8]
-	ldr	r3, .L2001+16
+	ldr	r3, .L2044+16
 	str	r2, [r6, #4]
 	stm	r7, {r3, ip}
 	ldrh	r3, [r4, #6]
 	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L2001+20
+	ldr	r3, .L2044+20
 	ldrh	r3, [r3]
 	strb	r3, [r7, #10]
-	ldr	r3, .L2001+24
+	ldr	r3, .L2044+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r7, #14]	@ movhi
@@ -13660,7 +13772,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2001+28
+	ldr	r3, .L2044+28
 	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
@@ -13669,7 +13781,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2001+32
+	ldr	r3, .L2044+32
 	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
 	strh	r2, [r7, #22]	@ movhi
@@ -13678,33 +13790,33 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L2001+36
+	ldr	r3, .L2044+36
 	movs	r1, #255
 	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
 	str	r3, [r7, #32]
-	ldr	r3, .L2001+40
+	ldr	r3, .L2044+40
 	ldr	r3, [r3]
 	str	r3, [r7, #40]
-	ldr	r3, .L2001+44
+	ldr	r3, .L2044+44
 	ldr	r3, [r3]
 	str	r3, [r7, #36]
-	ldr	r3, .L2001+48
+	ldr	r3, .L2044+48
 	ldrh	r3, [r3]
 	strh	r3, [r7, #44]	@ movhi
-	ldr	r3, .L2001+52
+	ldr	r3, .L2044+52
 	ldrh	r3, [r3]
 	strh	r3, [r7, #46]	@ movhi
-	ldr	r3, .L2001+56
+	ldr	r3, .L2044+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r7
-	ldr	r7, .L2001+60
+	ldr	r7, .L2044+60
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r7]
-	ldr	r3, .L2001+64
+	ldr	r3, .L2044+64
 	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
@@ -13712,7 +13824,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	ldrh	r0, [r7]
 	ldr	r3, [r5, #8]
-	ldr	r1, .L2001+68
+	ldr	r1, .L2044+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -13721,12 +13833,12 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L2001+72
+	ldr	r3, .L2044+72
 	ldrh	r3, [r3]
-	cbz	r3, .L1984
+	cbz	r3, .L2023
 	ldrh	r0, [r7]
-	ldr	r3, .L2001+76
-	ldr	r1, .L2001+80
+	ldr	r3, .L2044+76
+	ldr	r1, .L2044+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
@@ -13737,32 +13849,32 @@ FtlVpcTblFlush:
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L1984:
+.L2023:
 	movs	r7, #0
 	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-.L1985:
-	ldr	r3, [fp]
+.L2024:
+	ldr	r3, [r8]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, [r8]
+	ldr	r3, [fp]
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L2001+84
+	ldr	r3, .L2044+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1986
+	blt	.L2025
 	movs	r3, #0
 	ldrh	r10, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2001+40
-	ldr	r1, .L2001+40
+	ldr	r3, .L2044+40
+	ldr	r1, .L2044+40
 	strh	r0, [r4]	@ movhi
 	ldr	r3, [r3]
 	adds	r2, r3, #1
@@ -13772,9 +13884,18 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r6, #4]
 	strh	r0, [r6, #2]	@ movhi
-.L1986:
+.L2025:
+	ldr	r3, .L2044+88
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2026
+	ldr	r3, .L2044+56
+	ldr	r0, [r8]
+	ldrh	r1, [r3]
+	bl	js_hash
+	str	r0, [r6, #12]
+.L2026:
 	movs	r3, #1
-	ldr	r0, .L2001+8
+	ldr	r0, .L2044+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -13784,58 +13905,58 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1987
+	bne	.L2027
 	cmp	r3, #1
-	bne	.L1988
-	ldr	r1, .L2001+88
-	movw	r2, #1217
-	ldr	r0, .L2001+92
+	bne	.L2028
+	ldr	r1, .L2044+92
+	movw	r2, #1219
+	ldr	r0, .L2044+96
 	bl	printf
-	ldr	r1, .L2001+96
-	ldr	r0, .L2001+100
+	ldr	r1, .L2044+100
+	ldr	r0, .L2044+104
 	bl	printf
-.L1988:
+.L2028:
 	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L2001+84
+	ldreq	r3, .L2044+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L1985
+	bls	.L2024
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L2001+104
+	ldr	r0, .L2044+108
 	bl	printf
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L1983:
+.L2022:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1987:
+.L2027:
 	cmp	r3, #1
-	beq	.L1985
+	beq	.L2024
 	cmp	r2, #256
-	beq	.L1985
+	beq	.L2024
 	movw	r3, #65535
 	cmp	r10, r3
-	beq	.L1983
+	beq	.L2022
 	movs	r1, #1
 	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1983
-.L2002:
+	b	.L2022
+.L2045:
 	.align	2
-.L2001:
+.L2044:
 	.word	.LANCHOR76
-	.word	.LANCHOR209
-	.word	.LANCHOR202
+	.word	.LANCHOR210
+	.word	.LANCHOR203
 	.word	.LANCHOR80
 	.word	1179929683
 	.word	.LANCHOR45
@@ -13850,19 +13971,20 @@ FtlVpcTblFlush:
 	.word	.LANCHOR57
 	.word	.LANCHOR40
 	.word	.LANCHOR83
-	.word	.LANCHOR0
+	.word	.LANCHOR1
 	.word	.LANCHOR69
 	.word	.LANCHOR66
 	.word	.LANCHOR131
 	.word	.LANCHOR53
-	.word	.LANCHOR210
+	.word	.LANCHOR2
+	.word	.LANCHOR211
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LC38
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	1342177363
+	.word	1342177366
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -13875,31 +13997,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2018
+	ldr	r3, .L2061
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L2003
-	ldr	r3, .L2018+4
+	bne	.L2046
+	ldr	r3, .L2061+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2014
+	beq	.L2057
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2014
+	bne	.L2057
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L2005:
+.L2048:
 	mov	r3, #-1
-	ldr	r2, .L2018+8
+	ldr	r2, .L2061+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L2018+12
+	ldr	r3, .L2061+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L2018+24
+	ldr	r10, .L2061+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -13915,38 +14037,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L2006:
+.L2049:
 	adds	r6, r6, #-1
-	bcc	.L2009
+	bcc	.L2052
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2007
-.L2009:
-	ldr	r3, .L2018+16
+	cbnz	r3, .L2050
+.L2052:
+	ldr	r3, .L2061+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L2018+20
+	ldr	r3, .L2061+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2003:
+.L2046:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2014:
+.L2057:
 	movs	r6, #12
-	b	.L2005
-.L2007:
+	b	.L2048
+.L2050:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L2009
+	beq	.L2052
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -13961,10 +14083,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L2006
-.L2019:
+	b	.L2049
+.L2062:
 	.align	2
-.L2018:
+.L2061:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR188
@@ -13984,36 +14106,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2030
+	ldr	r3, .L2073
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L2030+4
+	ldr	r5, .L2073+4
 	ldr	r3, [r3]
-	ldr	r7, .L2030+8
-	ldr	r10, .L2030+20
+	ldr	r7, .L2073+8
+	ldr	r10, .L2073+20
 	str	r3, [r5, #8]
-	ldr	r3, .L2030+12
+	ldr	r3, .L2073+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L2021:
-	ldr	r3, .L2030+16
+.L2064:
+	ldr	r3, .L2073+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L2026
+	bcc	.L2069
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2026:
+.L2069:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L2030+4
+	ldr	fp, .L2073+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L2022:
+.L2065:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L2024
+	bgt	.L2067
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -14023,24 +14145,24 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2023
+	beq	.L2066
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L2023
+	bne	.L2066
 	strh	r4, [r7]	@ movhi
-.L2024:
+.L2067:
 	adds	r6, r6, #1
-	b	.L2021
-.L2023:
+	b	.L2064
+.L2066:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L2022
-.L2031:
+	b	.L2065
+.L2074:
 	.align	2
-.L2030:
+.L2073:
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR74+10
 	.word	.LANCHOR188
 	.word	.LANCHOR45
@@ -14060,12 +14182,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L2044
+	ldreq	r3, .L2087
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L2044+4
+	ldrne	r3, .L2087+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -14081,16 +14203,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2035
-.L2036:
+	bne	.L2078
+.L2079:
 	cmp	r6, r5
-	ble	.L2039
-.L2035:
+	ble	.L2082
+.L2078:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2039:
+.L2082:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -14103,23 +14225,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L2037
+	bne	.L2080
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2037
+	bne	.L2080
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L2037
+	beq	.L2080
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L2036
-.L2037:
+	b	.L2079
+.L2080:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L2036
-.L2045:
+	b	.L2079
+.L2088:
 	.align	2
-.L2044:
+.L2087:
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -14135,24 +14257,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2075+48
-	ldr	r4, .L2075
+	ldr	r8, .L2118+48
+	ldr	r4, .L2118
 	ldr	r3, [r8]
-	ldr	r7, .L2075+4
+	ldr	r7, .L2118+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2075+8
+	ldr	r3, .L2118+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2047:
+.L2090:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2050
+	bgt	.L2093
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -14161,7 +14283,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2048
+	bne	.L2091
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -14169,104 +14291,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L2048:
+.L2091:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2049
+	beq	.L2092
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2049
-	ldr	r3, .L2075+12
+	bne	.L2092
+	ldr	r3, .L2118+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L2050:
-	ldr	r5, .L2075+12
+.L2093:
+	ldr	r5, .L2118+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L2064
+	beq	.L2107
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L2054
+	beq	.L2097
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2075
+	ldr	r0, .L2118
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2054
+	beq	.L2097
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2054
+	bne	.L2097
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L2054
+	bls	.L2097
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L2054:
-	ldr	r10, .L2075
+.L2097:
+	ldr	r10, .L2118
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2056:
+.L2099:
 	cmp	r7, #0
-	bge	.L2059
-	ldr	r1, .L2075+16
-	movw	r2, #335
-	ldr	r0, .L2075+20
+	bge	.L2102
+	ldr	r1, .L2118+16
+	mov	r2, #334
+	ldr	r0, .L2118+20
 	bl	printf
-	ldr	r1, .L2075+24
-	ldr	r0, .L2075+28
+	ldr	r1, .L2118+24
+	ldr	r0, .L2118+28
 	bl	printf
-.L2058:
+.L2101:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L2061
-	ldr	r3, .L2075+32
+	beq	.L2104
+	ldr	r3, .L2118+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L2061
-	ldr	r3, .L2075+36
+	beq	.L2104
+	ldr	r3, .L2118+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L2061
+	bcs	.L2104
 	cmp	r0, r3
-	bcs	.L2061
+	bcs	.L2104
 	bl	FtlSysBlkNumInit
-.L2061:
-	ldr	r6, .L2075+40
+.L2104:
+	ldr	r6, .L2118+40
 	movs	r5, #0
-	ldr	r7, .L2075+44
-	ldr	r8, .L2075+52
-.L2062:
+	ldr	r7, .L2118+44
+	ldr	r8, .L2118+52
+.L2105:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2063
+	bcc	.L2106
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2049:
+.L2092:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2047
-.L2059:
+	b	.L2090
+.L2102:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -14278,16 +14400,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2057
+	beq	.L2100
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L2058
-.L2057:
+	beq	.L2101
+.L2100:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2056
-.L2063:
+	b	.L2099
+.L2106:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14295,18 +14417,18 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L2062
-.L2064:
+	b	.L2105
+.L2107:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2076:
+.L2119:
 	.align	2
-.L2075:
-	.word	.LANCHOR202
+.L2118:
+	.word	.LANCHOR203
 	.word	.LANCHOR51
 	.word	.LANCHOR188
 	.word	.LANCHOR74
-	.word	.LANCHOR211
+	.word	.LANCHOR212
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -14338,13 +14460,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L2078
+	blt	.L2121
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L2078
+	beq	.L2121
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2078
+	cbnz	r3, .L2121
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -14352,35 +14474,35 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L2090
+	ldr	r3, .L2133
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2079
+	bcc	.L2122
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2079:
-	ldr	r5, .L2090+4
+.L2122:
+	ldr	r5, .L2133+4
 	movs	r6, #0
-.L2080:
+.L2123:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L2086
+	bhi	.L2129
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2078:
-	ldr	r3, .L2090
+.L2121:
+	ldr	r3, .L2133
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2084
+	bcc	.L2127
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2084
-.L2086:
+	b	.L2127
+.L2129:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -14388,70 +14510,70 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L2081
-	ldr	r3, .L2090+8
+	bne	.L2124
+	ldr	r3, .L2133+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2090+4
+	ldr	r0, .L2133+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2090+12
+	ldr	r1, .L2133+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L2082
-	ldr	r1, .L2090+16
+	beq	.L2125
+	ldr	r1, .L2133+16
 	movw	r2, #661
-	ldr	r0, .L2090+20
+	ldr	r0, .L2133+20
 	bl	printf
-	ldr	r1, .L2090+24
-	ldr	r0, .L2090+28
+	ldr	r1, .L2133+24
+	ldr	r0, .L2133+28
 	bl	printf
-.L2082:
+.L2125:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	ldrh	r2, [r7, #8]
-	bne	.L2083
-.L2085:
+	bne	.L2126
+.L2128:
 	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2090+32
+	ldr	r0, .L2133+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2090+36
+	ldr	r3, .L2133+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2084:
+.L2127:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2083:
+.L2126:
 	cmp	r2, r10
-	bne	.L2085
+	bne	.L2128
 	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2085
+	bne	.L2128
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2081:
+.L2124:
 	adds	r6, r6, #1
-	b	.L2080
-.L2091:
+	b	.L2123
+.L2134:
 	.align	2
-.L2090:
+.L2133:
 	.word	.LANCHOR53
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR184
 	.word	.LANCHOR188
-	.word	.LANCHOR212
+	.word	.LANCHOR213
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -14469,26 +14591,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2106
+	ldr	r3, .L2149
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2093
+	cbnz	r5, .L2136
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2094
+	bne	.L2137
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2095
-	ldr	r1, .L2106+4
+	cbz	r3, .L2138
+	ldr	r1, .L2149+4
 	movw	r2, #697
-	ldr	r0, .L2106+8
+	ldr	r0, .L2149+8
 	bl	printf
-	ldr	r1, .L2106+12
-	ldr	r0, .L2106+16
+	ldr	r1, .L2149+12
+	ldr	r0, .L2149+16
 	bl	printf
-.L2095:
+.L2138:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14500,20 +14622,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2093:
+.L2136:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2094:
+.L2137:
 	ldrh	r8, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r7, .L2106+20
-	ldr	fp, .L2106+40
+	ldr	r7, .L2149+20
+	ldr	fp, .L2149+40
 	ldr	r10, [r0, #24]
 	orr	r3, r3, r8, lsl #10
 	ldr	r0, [fp]
 	str	r3, [r7, #4]
-	ldr	r3, .L2106+24
+	ldr	r3, .L2149+24
 	str	r0, [r7, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r4, #28]
@@ -14524,7 +14646,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r8, [r6, #2]	@ movhi
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L2106+28
+	ldr	r3, .L2149+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -14532,55 +14654,55 @@ Ftl_write_map_blk_to_last_page:
 	mov	r3, r5
 	ldr	r1, [fp]
 	mov	r2, r5
-.L2096:
+.L2139:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2098
-	ldr	r3, .L2106+32
+	bhi	.L2141
+	ldr	r3, .L2149+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2099
-	ldr	r3, .L2106+36
+	cbz	r3, .L2142
+	ldr	r3, .L2149+36
 	ldr	r0, [r7, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	str	r0, [r6, #12]
-.L2099:
+.L2142:
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2106+20
+	ldr	r0, .L2149+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2093
-.L2098:
+	b	.L2136
+.L2141:
 	ldr	r0, [r10, r3, lsl #2]
 	cmp	r8, r0, lsr #10
-	bne	.L2097
+	bne	.L2140
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
 	ldr	r0, [r10, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2097:
+.L2140:
 	adds	r3, r3, #1
-	b	.L2096
-.L2107:
+	b	.L2139
+.L2150:
 	.align	2
-.L2106:
+.L2149:
 	.word	.LANCHOR76
-	.word	.LANCHOR213
+	.word	.LANCHOR214
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LANCHOR53
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.word	.LANCHOR183
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -14597,12 +14719,12 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2134+44
+	ldr	r10, .L2177+44
 	mov	r8, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
-.L2109:
-	ldr	r2, .L2134
+.L2152:
+	ldr	r2, .L2177
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -14610,48 +14732,48 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2110
+	bge	.L2153
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2111
-.L2110:
+	bne	.L2154
+.L2153:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2111:
-	ldr	r3, .L2134+4
+.L2154:
+	ldr	r3, .L2177+4
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2129
+	bne	.L2172
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2113
-	ldr	r1, .L2134+8
+	cbnz	r3, .L2156
+	ldr	r1, .L2177+8
 	movw	r2, #759
-	ldr	r0, .L2134+12
+	ldr	r0, .L2177+12
 	bl	printf
-	ldr	r1, .L2134+16
-	ldr	r0, .L2134+20
+	ldr	r1, .L2177+16
+	ldr	r0, .L2177+20
 	bl	printf
-.L2113:
+.L2156:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2114
-	ldr	r1, .L2134+8
+	bcc	.L2157
+	ldr	r1, .L2177+8
 	mov	r2, #760
-	ldr	r0, .L2134+12
+	ldr	r0, .L2177+12
 	bl	printf
-	ldr	r1, .L2134+16
-	ldr	r0, .L2134+20
+	ldr	r1, .L2177+16
+	ldr	r0, .L2177+20
 	bl	printf
-.L2114:
+.L2157:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2134+24
+	ldr	r5, .L2177+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
@@ -14660,7 +14782,7 @@ FtlMapWritePage:
 	str	r3, [r5, #4]
 	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2134+28
+	ldr	r3, .L2177+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
@@ -14672,18 +14794,18 @@ FtlMapWritePage:
 	strh	r8, [r3, #8]	@ movhi
 	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2134+32
+	ldr	r2, .L2177+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2115
-	ldr	r2, .L2134+36
+	cbz	r2, .L2158
+	ldr	r2, .L2177+36
 	ldr	r0, [r5, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #12]
 	str	r0, [r3, #12]
-.L2115:
+.L2158:
 	movs	r3, #1
-	ldr	r0, .L2134+24
+	ldr	r0, .L2177+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -14693,68 +14815,68 @@ FtlMapWritePage:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L2116
+	bne	.L2159
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2134+40
+	ldr	r0, .L2177+40
 	uxth	r6, r6
 	bl	printf
 	ldrh	r3, [r4, #2]
 	cmp	r3, #2
 	itttt	ls
-	ldrls	r3, .L2134+44
+	ldrls	r3, .L2177+44
 	ldrhls	r3, [r3]
 	addls	r3, r3, #-1
 	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2109
+	bls	.L2152
 	mov	r2, r6
 	ldr	r1, [fp, #4]
-	ldr	r0, .L2134+48
+	ldr	r0, .L2177+48
 	bl	printf
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2129:
+.L2172:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2116:
-	cbz	r2, .L2119
+.L2159:
+	cbz	r2, .L2162
 	cmp	r3, #1
 	strh	r7, [r4, #40]	@ movhi
-	bne	.L2120
-.L2121:
+	bne	.L2163
+.L2164:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L2109
-.L2120:
+	b	.L2152
+.L2163:
 	cmp	r2, #256
-.L2133:
-	beq	.L2121
+.L2176:
+	beq	.L2164
 	ldr	r3, [r4, #36]
 	cmp	r3, #0
-	bne	.L2121
+	bne	.L2164
 	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2129
-.L2119:
+	b	.L2172
+.L2162:
 	cmp	r3, #1
-	b	.L2133
-.L2135:
+	b	.L2176
+.L2178:
 	.align	2
-.L2134:
+.L2177:
 	.word	.LANCHOR165
 	.word	.LANCHOR76
-	.word	.LANCHOR214
+	.word	.LANCHOR215
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.word	.LC40
 	.word	.LANCHOR53
@@ -14773,9 +14895,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2137
+	ldr	r5, .L2180
 	muls	r4, r0, r4
-	ldr	r0, .L2137+4
+	ldr	r0, .L2180+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -14788,9 +14910,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2138:
+.L2181:
 	.align	2
-.L2137:
+.L2180:
 	.word	.LANCHOR96
 	.word	.LANCHOR127
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -14807,30 +14929,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2143
-	ldr	r6, .L2143+4
-.L2140:
+	ldr	r5, .L2186
+	ldr	r6, .L2186+4
+.L2183:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2142
+	bhi	.L2185
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2142:
+.L2185:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2141
+	bge	.L2184
 	bl	flush_l2p_region
-.L2141:
+.L2184:
 	adds	r4, r4, #1
-	b	.L2140
-.L2144:
+	b	.L2183
+.L2187:
 	.align	2
-.L2143:
+.L2186:
 	.word	.LANCHOR67
 	.word	.LANCHOR96
 	.size	l2p_flush, .-l2p_flush
@@ -14845,7 +14967,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2157
+	ldr	r3, .L2200
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -14854,26 +14976,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2153
-	ldr	r3, .L2157+4
+	bhi	.L2196
+	ldr	r3, .L2200+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2147:
-	cbnz	r5, .L2152
-.L2145:
+.L2190:
+	cbnz	r5, .L2195
+.L2188:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2152:
-	ldr	r3, .L2157+8
+.L2195:
+	ldr	r3, .L2200+8
 	mov	r0, r7
-	ldr	r10, .L2157+24
+	ldr	r10, .L2200+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2157+12
+	ldr	r3, .L2200+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -14887,9 +15009,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2149
+	cbz	r2, .L2192
 	cmp	r4, r3
-	beq	.L2149
+	beq	.L2192
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -14899,7 +15021,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2150:
+.L2193:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -14912,7 +15034,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2157+16
+	ldr	r0, .L2200+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -14923,25 +15045,25 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2147
-.L2149:
-	ldr	r3, .L2157+20
+	b	.L2190
+.L2192:
+	ldr	r3, .L2200+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2150
-.L2153:
+	b	.L2193
+.L2196:
 	mov	r8, #-1
-	b	.L2145
-.L2158:
+	b	.L2188
+.L2201:
 	.align	2
-.L2157:
+.L2200:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR194
 	.word	.LANCHOR55
-	.word	.LANCHOR215
+	.word	.LANCHOR216
 	.word	.LANCHOR57
 	.word	.LANCHOR185
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -14957,68 +15079,68 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2161
-	ldr	r3, .L2161+4
+	ldr	r2, .L2204
+	ldr	r3, .L2204+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2159
-	ldr	r3, .L2161+8
+	bne	.L2202
+	ldr	r3, .L2204+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2161+12
+	ldr	r3, .L2204+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2161+16
+	ldr	r3, .L2204+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2161+20
+	ldr	r3, .L2204+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2161+24
+	ldr	r3, .L2204+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2161+28
+	ldr	r3, .L2204+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2161+32
+	ldr	r3, .L2204+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2161+36
+	ldr	r3, .L2204+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2161+40
+	ldr	r3, .L2204+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2161+44
+	ldr	r3, .L2204+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2161+48
+	ldr	r3, .L2204+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2161+52
+	ldr	r3, .L2204+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2161+56
+	ldr	r3, .L2204+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2161+60
+	ldr	r3, .L2204+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2161+64
+	ldr	r3, .L2204+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2159:
+.L2202:
 	bx	lr
-.L2162:
+.L2205:
 	.align	2
-.L2161:
+.L2204:
 	.word	.LANCHOR138
 	.word	1179929683
-	.word	1342177363
-	.word	.LANCHOR216
+	.word	1342177366
 	.word	.LANCHOR217
+	.word	.LANCHOR218
 	.word	.LANCHOR161
 	.word	.LANCHOR162
 	.word	.LANCHOR166
@@ -15044,40 +15166,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2170
+	ldr	r3, .L2213
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2168
-	ldr	r3, .L2170+4
+	beq	.L2211
+	ldr	r3, .L2213+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2164:
-	ldr	r1, .L2170+8
+.L2207:
+	ldr	r1, .L2213+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2170+12
-	cbnz	r0, .L2166
+	ldr	r2, .L2213+12
+	cbnz	r0, .L2209
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2167
-.L2166:
+	bcc	.L2210
+.L2209:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2170+16
+	ldr	r3, .L2213+16
 	str	r3, [r2]
-	ldr	r3, .L2170+20
+	ldr	r3, .L2213+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -15088,18 +15210,18 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2167:
+.L2210:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2168:
+.L2211:
 	movs	r3, #32
-	b	.L2164
-.L2171:
+	b	.L2207
+.L2214:
 	.align	2
-.L2170:
+.L2213:
 	.word	.LANCHOR28
 	.word	.LANCHOR170
-	.word	.LANCHOR218
+	.word	.LANCHOR219
 	.word	.LANCHOR191
 	.word	1112818501
 	.word	.LANCHOR190
@@ -15115,110 +15237,110 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2199
+	ldr	r3, .L2242
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2173
-	ldr	r1, .L2199+4
-	mov	r2, #3264
-	ldr	r0, .L2199+8
+	bcs	.L2216
+	ldr	r1, .L2242+4
+	movw	r2, #3290
+	ldr	r0, .L2242+8
 	bl	printf
-	ldr	r1, .L2199+12
-	ldr	r0, .L2199+16
+	ldr	r1, .L2242+12
+	ldr	r0, .L2242+16
 	bl	printf
-.L2173:
-	ldr	r3, .L2199+20
+.L2216:
+	ldr	r3, .L2242+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2174
+	bne	.L2217
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2175
-	ldr	r3, .L2199+24
+	beq	.L2218
+	ldr	r3, .L2242+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2176
+	cbz	r3, .L2219
 	bl	INSERT_DATA_LIST
-.L2175:
+.L2218:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2199+28
+	ldr	r3, .L2242+28
 	cmp	r4, r3
-	beq	.L2177
-	ldr	r3, .L2199+32
+	beq	.L2220
+	ldr	r3, .L2242+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2177
-	ldr	r3, .L2199+36
+	beq	.L2220
+	ldr	r3, .L2242+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2178
-.L2177:
+	cbz	r3, .L2221
+.L2220:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2179:
-	ldr	r6, .L2199+40
+.L2222:
+	ldr	r6, .L2242+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2184
+	beq	.L2227
 	cmp	r5, r0
-	bne	.L2185
-	ldr	r3, .L2199+24
+	bne	.L2228
+	ldr	r3, .L2242+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2186
-.L2185:
+	cbz	r3, .L2229
+.L2228:
 	bl	update_vpc_list
-.L2186:
+.L2229:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2184:
+.L2227:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2174:
+.L2217:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2176:
+.L2219:
 	bl	INSERT_FREE_LIST
-	b	.L2175
-.L2178:
-	ldr	r3, .L2199+44
+	b	.L2218
+.L2221:
+	ldr	r3, .L2242+44
 	cmp	r4, r3
-	bne	.L2179
+	bne	.L2222
 	cmp	r2, #3
-	beq	.L2181
-	ldr	r2, .L2199+48
+	beq	.L2224
+	ldr	r2, .L2242+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2182
-.L2181:
+	bne	.L2225
+.L2224:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2182:
-	ldr	r2, .L2199+52
+.L2225:
+	ldr	r2, .L2242+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2179
-	ldr	r2, .L2199+56
+	beq	.L2222
+	ldr	r2, .L2242+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2179
-.L2200:
+	b	.L2222
+.L2243:
 	.align	2
-.L2199:
+.L2242:
 	.word	.LANCHOR40
-	.word	.LANCHOR219
+	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -15244,7 +15366,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2211
+	ldr	r3, .L2254
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -15253,28 +15375,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2210
-	ldr	r3, .L2211+4
+	bhi	.L2253
+	ldr	r3, .L2254+4
 	mov	r8, #0
-	ldr	fp, .L2211+28
+	ldr	fp, .L2254+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2203:
-	cbnz	r6, .L2209
-.L2201:
+.L2246:
+	cbnz	r6, .L2252
+.L2244:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2209:
-	ldr	r3, .L2211+8
+.L2252:
+	ldr	r3, .L2254+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2211+12
+	ldr	r2, .L2254+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15289,7 +15411,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2205
+	beq	.L2248
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15303,28 +15425,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2211+16
+	ldr	r2, .L2254+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2207
+	bne	.L2250
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2211+20
+	ldr	r0, .L2254+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2211+24
+	ldr	r0, .L2254+24
 	bl	FtlMapWritePage
-.L2207:
+.L2250:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2208:
+.L2251:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15333,26 +15455,26 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2203
-.L2205:
+	b	.L2246
+.L2248:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2208
-.L2210:
+	b	.L2251
+.L2253:
 	mov	r8, #-1
-	b	.L2201
-.L2212:
+	b	.L2244
+.L2255:
 	.align	2
-.L2211:
+.L2254:
 	.word	.LANCHOR50
 	.word	.LANCHOR56
 	.word	.LANCHOR194
 	.word	.LANCHOR55
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LC42
-	.word	.LANCHOR215
+	.word	.LANCHOR216
 	.word	.LANCHOR185
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
@@ -15368,30 +15490,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2215
-	ldr	r5, .L2215+4
+	ldr	r4, .L2258
+	ldr	r5, .L2258+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2215+8
+	ldr	r3, .L2258+8
 	cmp	r2, r3
-	beq	.L2214
-	ldr	r1, .L2215+12
-	ldr	r0, .L2215+16
+	beq	.L2257
+	ldr	r1, .L2258+12
+	ldr	r0, .L2258+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2214:
+.L2257:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2216:
+.L2259:
 	.align	2
-.L2215:
+.L2258:
 	.word	.LANCHOR191
 	.word	.LANCHOR190
 	.word	1112818501
@@ -15411,97 +15533,97 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2221
+	ldr	r4, .L2264
 	movs	r0, #0
-	ldr	r5, .L2221+4
+	ldr	r5, .L2264+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2218
+	beq	.L2261
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2218:
+.L2261:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2221+8
-	bne	.L2219
+	ldr	r5, .L2264+8
+	bne	.L2262
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2221+12
+	ldr	r3, .L2264+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2221+16
+	ldr	r3, .L2264+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2221+20
+	ldr	r3, .L2264+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2221+24
+	ldr	r3, .L2264+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2221+28
+	ldr	r3, .L2264+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2221+32
+	ldr	r3, .L2264+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2221+36
+	ldr	r3, .L2264+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2221+40
+	ldr	r3, .L2264+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2221+44
+	ldr	r3, .L2264+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2221+48
+	ldr	r3, .L2264+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2221+52
+	ldr	r3, .L2264+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2221+56
+	ldr	r3, .L2264+56
 	str	r2, [r3]
-.L2219:
-	ldr	r3, .L2221+60
+.L2262:
+	ldr	r3, .L2264+60
 	movs	r2, #0
 	str	r2, [r3]
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2221+64
+	ldr	r3, .L2264+64
 	cmp	r2, r3
-	bne	.L2220
-	ldr	r3, .L2221+68
+	bne	.L2263
+	ldr	r3, .L2264+68
 	movs	r2, #1
-	ldr	r1, .L2221+72
-	ldr	r0, .L2221+76
+	ldr	r1, .L2264+72
+	ldr	r0, .L2264+76
 	str	r2, [r3]
 	bl	printf
-.L2220:
-	ldr	r3, .L2221+80
-	ldr	r1, .L2221+84
+.L2263:
+	ldr	r3, .L2264+80
+	ldr	r1, .L2264+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2221+88
+	ldr	r3, .L2264+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2221+92
+	ldr	r3, .L2264+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2222:
+.L2265:
 	.align	2
-.L2221:
+.L2264:
 	.word	.LANCHOR138
 	.word	1179929683
 	.word	.LANCHOR168
-	.word	.LANCHOR216
 	.word	.LANCHOR217
+	.word	.LANCHOR218
 	.word	.LANCHOR161
 	.word	.LANCHOR162
 	.word	.LANCHOR166
@@ -15520,7 +15642,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	.LANCHOR167
-	.word	.LANCHOR205
+	.word	.LANCHOR206
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.ftl_vendor_read,"ax",%progbits
 	.align	1
@@ -15567,34 +15689,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2225
+	beq	.L2268
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2239
+	ldr	r3, .L2282
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2225
-	ldr	r3, .L2239+4
-	ldr	r5, .L2239+8
+	bne	.L2268
+	ldr	r3, .L2282+4
+	ldr	r5, .L2282+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2239+12
+	ldr	r3, .L2282+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2229
-	ldr	r2, .L2239+16
+	cbz	r3, .L2272
+	ldr	r2, .L2282+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2229
+	bge	.L2272
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2229
+	beq	.L2272
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -15606,47 +15728,47 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2229
+	beq	.L2272
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2229
+	bne	.L2272
 	ldr	r2, [r5, #8]
-.L2238:
+.L2281:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2229:
+.L2272:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2230
+	cbz	r3, .L2273
 	movs	r2, #1
-	ldr	r0, .L2239+8
+	ldr	r0, .L2282+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2231:
+.L2274:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2238
-.L2230:
-	ldr	r3, .L2239+20
+	b	.L2281
+.L2273:
+	ldr	r3, .L2282+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2231
-.L2225:
+	b	.L2274
+.L2268:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2240:
+.L2283:
 	.align	2
-.L2239:
+.L2282:
 	.word	.LANCHOR76
 	.word	.LANCHOR184
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LANCHOR53
 	.word	.LANCHOR57
@@ -15664,69 +15786,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2323
+	ldr	r5, .L2366
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2323+4
+	ldr	r3, .L2366+4
 	ldr	r2, [r5]
-	ldr	r6, .L2323+8
+	ldr	r6, .L2366+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2323+12
+	ldr	r3, .L2366+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2323+16
+	ldr	r7, .L2366+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2323+20
+	ldr	r3, .L2366+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2323+24
+	ldr	r3, .L2366+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2323+28
+	ldr	r3, .L2366+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L2323+32
+	ldr	r0, .L2366+32
 	bl	ftl_memset
-	ldr	r3, .L2323+36
+	ldr	r3, .L2366+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2242:
-	ldr	r3, .L2323+40
+.L2285:
+	ldr	r3, .L2366+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2284
-	ldr	r3, .L2323+44
+	bls	.L2327
+	ldr	r3, .L2366+44
 	movs	r5, #0
-	ldr	r1, .L2323+48
+	ldr	r1, .L2366+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2323+52
+	ldr	r3, .L2366+52
 	ldr	r2, [r1]
-	ldr	r1, .L2323+56
+	ldr	r1, .L2366+56
 	ldr	r6, [r3]
-	ldr	r3, .L2323+60
+	ldr	r3, .L2366+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2323+64
-	b	.L2285
-.L2244:
+	ldr	r2, .L2366+64
+	b	.L2328
+.L2287:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -15736,7 +15858,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2243
+	cbnz	r0, .L2286
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -15749,31 +15871,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2243:
+.L2286:
 	adds	r5, r5, #1
-.L2285:
+.L2328:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2244
+	bhi	.L2287
 	cmp	fp, #0
-	bne	.L2245
-.L2283:
+	bne	.L2288
+.L2326:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2242
-.L2245:
+	b	.L2285
+.L2288:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2246:
+.L2289:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2283
-	ldr	r3, .L2323+52
+	bls	.L2326
+	ldr	r3, .L2366+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -15783,10 +15905,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2249
+	bne	.L2292
 	mov	r10, #16
-.L2251:
-	ldr	r3, .L2323+52
+.L2294:
+	ldr	r3, .L2366+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -15798,88 +15920,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2323+52
+	ldr	r3, .L2366+52
 	ldr	r3, [r3]
-	bne	.L2248
+	bne	.L2291
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2323+52
+	ldr	r3, .L2366+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2250
-.L2249:
-	ldr	r3, .L2323+68
+	beq	.L2293
+.L2292:
+	ldr	r3, .L2366+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2252
+	beq	.L2295
 	cmp	r2, r3
-	bhi	.L2253
-.L2252:
+	bhi	.L2296
+.L2295:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2323+68
+	ldrne	r1, .L2366+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2253:
+.L2296:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2255
-	bhi	.L2256
+	beq	.L2298
+	bhi	.L2299
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2257
-.L2254:
+	beq	.L2300
+.L2297:
 	adds	r7, r7, #1
-	b	.L2246
-.L2248:
+	b	.L2289
+.L2291:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2249
+	bne	.L2292
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2251
-.L2250:
-	ldr	r3, .L2323+72
+	bne	.L2294
+.L2293:
+	ldr	r3, .L2366+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2322
-.L2281:
+	cbnz	r1, .L2365
+.L2324:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2254
-.L2256:
+	b	.L2297
+.L2299:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2258
+	beq	.L2301
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2254
-.L2322:
+	bne	.L2297
+.L2365:
 	movs	r1, #0
-	b	.L2281
-.L2258:
-	ldr	r3, .L2323+8
+	b	.L2324
+.L2301:
+	ldr	r3, .L2366+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2323
+	ldr	r3, .L2366
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2260
-	ldr	r1, .L2323+76
-	movw	r2, #1305
-	ldr	r0, .L2323+80
+	bls	.L2303
+	ldr	r1, .L2366+76
+	movw	r2, #1307
+	ldr	r0, .L2366+80
 	bl	printf
-	ldr	r1, .L2323+84
-	ldr	r0, .L2323+88
+	ldr	r1, .L2366+84
+	ldr	r0, .L2366+88
 	bl	printf
-.L2260:
+.L2303:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2323+12
+	ldr	r2, .L2366+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -15887,61 +16009,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2261:
+.L2304:
 	cmp	r3, r10
-	bgt	.L2267
+	bgt	.L2310
 	cmp	r3, #0
-	bge	.L2300
-	b	.L2254
-.L2267:
+	bge	.L2343
+	b	.L2297
+.L2310:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2262
+	bls	.L2305
 	ldr	r2, [ip]
-	cbnz	r2, .L2263
+	cbnz	r2, .L2306
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2323+8
+	ldrne	r2, .L2366+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2263:
-	ldr	r2, .L2323+20
+.L2306:
+	ldr	r2, .L2366+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2264:
+.L2307:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2265
+	bhi	.L2308
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2254
-	ldr	r2, .L2323+8
+	blt	.L2297
+	ldr	r2, .L2366+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2323
+	ldr	r2, .L2366
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2254
-.L2300:
-	ldr	r2, .L2323+8
+	bgt	.L2297
+.L2343:
+	ldr	r2, .L2366+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2323+20
-.L2320:
+	ldr	r2, .L2366+20
+.L2363:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2254
-.L2265:
+	b	.L2297
+.L2308:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15949,14 +16071,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2264
-.L2262:
+	b	.L2307
+.L2305:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2261
-.L2324:
+	b	.L2304
+.L2367:
 	.align	2
-.L2323:
+.L2366:
 	.word	.LANCHOR64
 	.word	.LANCHOR70
 	.word	.LANCHOR128
@@ -15965,7 +16087,7 @@ FtlScanSysBlk:
 	.word	.LANCHOR129
 	.word	.LANCHOR193
 	.word	.LANCHOR71
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR38
@@ -15976,79 +16098,79 @@ FtlScanSysBlk:
 	.word	.LANCHOR47
 	.word	.LANCHOR159
 	.word	.LANCHOR15
-	.word	.LANCHOR220
+	.word	.LANCHOR221
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2257:
-	ldr	r8, .L2325+20
-	ldr	r10, .L2325+28
+.L2300:
+	ldr	r8, .L2368+20
+	ldr	r10, .L2368+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2270
-	ldr	r1, .L2325
-	mov	r2, #1352
-	ldr	r0, .L2325+4
+	bls	.L2313
+	ldr	r1, .L2368
+	movw	r2, #1354
+	ldr	r0, .L2368+4
 	bl	printf
-	ldr	r1, .L2325+8
-	ldr	r0, .L2325+12
+	ldr	r1, .L2368+8
+	ldr	r0, .L2368+12
 	bl	printf
-.L2270:
-	ldr	r2, .L2325+16
+.L2313:
+	ldr	r2, .L2368+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2271:
+.L2314:
 	cmp	r3, r10
-	ble	.L2276
+	ble	.L2319
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2272
+	bls	.L2315
 	ldr	r2, [r0]
-	cbnz	r2, .L2273
+	cbnz	r2, .L2316
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2325+20
+	ldrne	r2, .L2368+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2273:
-	ldr	r2, .L2325+24
+.L2316:
+	ldr	r2, .L2368+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2274:
+.L2317:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2275
+	bhi	.L2318
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2276:
+.L2319:
 	cmp	r3, #0
-	blt	.L2254
-	ldr	r2, .L2325+28
-	ldr	ip, .L2325+20
+	blt	.L2297
+	ldr	r2, .L2368+28
+	ldr	ip, .L2368+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2254
+	bgt	.L2297
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2325+24
-	b	.L2320
-.L2275:
+	ldr	r2, .L2368+24
+	b	.L2363
+.L2318:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -16056,91 +16178,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2274
-.L2272:
+	b	.L2317
+.L2315:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2271
-.L2255:
-	ldr	r8, .L2325+48
+	b	.L2314
+.L2298:
+	ldr	r8, .L2368+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2278
-.L2321:
+	bne	.L2321
+.L2364:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2254
-.L2278:
+	b	.L2297
+.L2321:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2279
+	beq	.L2322
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2279:
+.L2322:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2280
+	bcs	.L2323
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2321
-.L2280:
+	b	.L2364
+.L2323:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2254
-.L2284:
-	ldr	r3, .L2325+32
+	b	.L2297
+.L2327:
+	ldr	r3, .L2368+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2286
-.L2289:
-	ldr	r3, .L2325+24
+	cbz	r3, .L2329
+.L2332:
+	ldr	r3, .L2368+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2287
-.L2288:
-	ldr	r3, .L2325+36
+	beq	.L2330
+.L2331:
+	ldr	r3, .L2368+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2325+40
+	ldr	r3, .L2368+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2319
-	ldr	r1, .L2325
-	movw	r2, #1486
-	ldr	r0, .L2325+4
+	bls	.L2362
+	ldr	r1, .L2368
+	mov	r2, #1488
+	ldr	r0, .L2368+4
 	bl	printf
-	ldr	r1, .L2325+8
-	ldr	r0, .L2325+12
+	ldr	r1, .L2368+8
+	ldr	r0, .L2368+12
 	bl	printf
-.L2319:
+.L2362:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2286:
-	ldr	r1, .L2325+36
+.L2329:
+	ldr	r1, .L2368+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2289
-	ldr	r5, .L2325+40
+	beq	.L2332
+	ldr	r5, .L2368+40
 	ldr	r0, [r5]
-.L2290:
+.L2333:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2289
+	bcs	.L2332
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2290
-	ldr	r3, .L2325+44
+	beq	.L2333
+	ldr	r3, .L2368+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2291:
+.L2334:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2289
+	bcs	.L2332
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -16149,30 +16271,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2291
-.L2287:
-	ldr	r3, .L2325+20
+	b	.L2334
+.L2330:
+	ldr	r3, .L2368+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2288
-	ldr	r5, .L2325+28
+	beq	.L2331
+	ldr	r5, .L2368+28
 	ldrh	r1, [r5]
-.L2296:
+.L2339:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2288
+	bge	.L2331
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2296
-	ldr	r2, .L2325+16
+	beq	.L2339
+	ldr	r2, .L2368+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2297:
+.L2340:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2288
+	bge	.L2331
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -16181,11 +16303,11 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2297
-.L2326:
+	b	.L2340
+.L2369:
 	.align	2
-.L2325:
-	.word	.LANCHOR220
+.L2368:
+	.word	.LANCHOR221
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -16197,7 +16319,7 @@ FtlScanSysBlk:
 	.word	.LANCHOR128
 	.word	.LANCHOR64
 	.word	.LANCHOR130
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -16212,15 +16334,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L2361+164
-	ldr	r6, .L2361
+	ldr	r8, .L2404+164
+	ldr	r6, .L2404
 	ldr	r3, [r8]
-	ldr	r4, .L2361+4
-	ldr	r10, .L2361+168
+	ldr	r4, .L2404+4
+	ldr	r10, .L2404+168
 	ldrh	r2, [r6]
-	ldr	r5, .L2361+8
+	ldr	r5, .L2404+8
 	str	r3, [r4, #8]
-	ldr	r7, .L2361+12
+	ldr	r7, .L2404+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -16230,100 +16352,100 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp]
 	cmp	r0, r3
-	bne	.L2328
-.L2340:
+	bne	.L2371
+.L2383:
 	mov	r0, #-1
-.L2327:
+.L2370:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2328:
+.L2371:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	fp, [r7]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r7, #2]	@ movhi
-.L2330:
+.L2373:
 	cmp	r5, #0
-	bge	.L2336
-	movw	r2, #1555
-	ldr	r1, .L2361+16
-	ldr	r0, .L2361+20
+	bge	.L2379
+	movw	r2, #1557
+	ldr	r1, .L2404+16
+	ldr	r0, .L2404+20
 	bl	printf
-	ldr	r1, .L2361+24
-	ldr	r0, .L2361+28
+	ldr	r1, .L2404+24
+	ldr	r0, .L2404+28
 	bl	printf
-	b	.L2335
-.L2336:
+	b	.L2378
+.L2379:
 	orr	r2, r5, fp, lsl #10
-	ldr	r0, .L2361+4
+	ldr	r0, .L2404+4
 	str	r2, [r4, #4]
 	ldr	r2, [r8]
 	str	r2, [r4, #8]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r2, .L2361+32
+	ldr	r2, .L2404+32
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L2331
+	cbz	r2, .L2374
 	ldr	r2, [r4, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #4]
-	cbz	r2, .L2331
-	ldr	r1, .L2361+36
+	cbz	r2, .L2374
+	ldr	r1, .L2404+36
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #4]
 	cmp	r2, r0
-	beq	.L2331
-	cbnz	r5, .L2332
+	beq	.L2374
+	cbnz	r5, .L2375
 	ldrh	r2, [r7, #4]
 	cmp	fp, r2
-	beq	.L2332
+	beq	.L2375
 	sxth	fp, r2
-	ldr	r2, .L2361+40
+	ldr	r2, .L2404+40
 	ldrh	r5, [r2]
-.L2334:
+.L2377:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L2330
-.L2332:
+	b	.L2373
+.L2375:
 	mov	r2, #-1
 	str	r2, [r4]
-.L2331:
+.L2374:
 	ldr	r2, [r4]
 	adds	r2, r2, #1
-	beq	.L2334
+	beq	.L2377
 	ldr	r2, [r8]
-	ldr	r3, .L2361+44
+	ldr	r3, .L2404+44
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L2334
+	bne	.L2377
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	bne	.L2334
-.L2335:
-	ldr	r2, .L2361+36
+	bne	.L2377
+.L2378:
+	ldr	r2, .L2404+36
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2338
-	ldr	r1, .L2361+16
-	movw	r2, #1557
-	ldr	r0, .L2361+20
+	bcs	.L2381
+	ldr	r1, .L2404+16
+	movw	r2, #1559
+	ldr	r0, .L2404+20
 	bl	printf
-	ldr	r1, .L2361+24
-	ldr	r0, .L2361+28
+	ldr	r1, .L2404+24
+	ldr	r0, .L2404+28
 	bl	printf
-.L2338:
+.L2381:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2361+48
+	ldr	r0, .L2404+48
 	bl	ftl_memcpy
 	ldrh	r2, [r6]
 	ldr	r3, [sp]
@@ -16340,14 +16462,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2361+52
+	ldr	r3, .L2404+52
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2361+56
+	ldr	r3, .L2404+56
 	ldrh	r3, [r3]
-	cbz	r3, .L2339
+	cbz	r3, .L2382
 	ldrh	r1, [r6]
-	ldr	r3, .L2361+60
+	ldr	r3, .L2404+60
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -16356,65 +16478,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2361+64
+	ldr	r3, .L2404+64
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2339:
-	ldr	r4, .L2361+48
-	ldr	r3, .L2361+44
+.L2382:
+	ldr	r4, .L2404+48
+	ldr	r3, .L2404+44
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2340
-	ldr	r3, .L2361+68
+	bne	.L2383
+	ldr	r3, .L2404+68
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r7, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2340
-	ldr	r3, .L2361+72
-	ldr	r2, .L2361+76
+	bne	.L2383
+	ldr	r3, .L2404+72
+	ldr	r2, .L2404+76
 	str	r5, [r3]
-	ldr	r3, .L2361+80
+	ldr	r3, .L2404+80
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2361+84
+	ldr	r2, .L2404+84
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2361+88
+	ldr	r2, .L2404+88
 	str	r3, [r2]
-	ldr	r3, .L2361+92
+	ldr	r3, .L2404+92
 	ldr	r6, [r3]
-	ldr	r3, .L2361+96
+	ldr	r3, .L2404+96
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2361+100
+	ldr	r3, .L2404+100
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2361+104
+	ldr	r3, .L2404+104
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2341
-	ldr	r1, .L2361+16
-	mov	r2, #1584
-	ldr	r0, .L2361+20
+	bls	.L2384
+	ldr	r1, .L2404+16
+	movw	r2, #1586
+	ldr	r0, .L2404+20
 	bl	printf
-	ldr	r1, .L2361+24
-	ldr	r0, .L2361+28
+	ldr	r1, .L2404+24
+	ldr	r0, .L2404+28
 	bl	printf
-.L2341:
+.L2384:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2361+108
+	ldr	r3, .L2404+108
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2361+112
+	ldr	r7, .L2404+112
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2361+116
+	ldr	r1, .L2404+116
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16433,7 +16555,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2361+120
+	ldr	r2, .L2404+120
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16443,31 +16565,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2361+124
+	ldr	r5, .L2404+124
 	str	r3, [r5]
-	ldr	r5, .L2361+128
+	ldr	r5, .L2404+128
 	str	r3, [r5]
-	ldr	r5, .L2361+132
+	ldr	r5, .L2404+132
 	str	r3, [r5]
-	ldr	r5, .L2361+136
+	ldr	r5, .L2404+136
 	str	r3, [r5]
-	ldr	r5, .L2361+140
+	ldr	r5, .L2404+140
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2361+144
+	ldr	r5, .L2404+144
 	str	r3, [r5]
-	ldr	r5, .L2361+148
+	ldr	r5, .L2404+148
 	str	r3, [r5]
-	ldr	r5, .L2361+152
+	ldr	r5, .L2404+152
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2361+156
+	ldr	r3, .L2404+156
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2361+160
+	ldr	r3, .L2404+160
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16475,55 +16597,55 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2344
-	ldr	r0, .L2361+108
+	beq	.L2387
+	ldr	r0, .L2404+108
 	bl	make_superblock
-.L2344:
+.L2387:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2345
-	ldr	r0, .L2361+116
+	beq	.L2388
+	ldr	r0, .L2404+116
 	bl	make_superblock
-.L2345:
+.L2388:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2346
-	ldr	r0, .L2361+120
+	beq	.L2389
+	ldr	r0, .L2404+120
 	bl	make_superblock
-.L2346:
+.L2389:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2347
-	ldr	r0, .L2361+112
+	beq	.L2390
+	ldr	r0, .L2404+112
 	bl	make_superblock
-.L2347:
+.L2390:
 	movs	r0, #0
-	b	.L2327
-.L2362:
+	b	.L2370
+.L2405:
 	.align	2
-.L2361:
+.L2404:
 	.word	.LANCHOR40
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR83
-	.word	.LANCHOR209
-	.word	.LANCHOR221
+	.word	.LANCHOR210
+	.word	.LANCHOR222
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.word	.LANCHOR53
 	.word	1179929683
 	.word	.LANCHOR80
-	.word	.LANCHOR0
+	.word	.LANCHOR1
 	.word	.LANCHOR69
 	.word	.LANCHOR66
 	.word	.LANCHOR195
 	.word	.LANCHOR45
-	.word	.LANCHOR222
+	.word	.LANCHOR223
 	.word	.LANCHOR72
 	.word	.LANCHOR52
 	.word	.LANCHOR55
@@ -16531,9 +16653,9 @@ FtlLoadSysInfo:
 	.word	.LANCHOR42
 	.word	.LANCHOR74
 	.word	.LANCHOR38
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR91
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR92
 	.word	.LANCHOR93
 	.word	.LANCHOR161
@@ -16562,97 +16684,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2375
+	ldr	r4, .L2418
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2375+4
+	ldr	r1, .L2418+4
 	mov	r6, r0
-	ldr	r0, .L2375+8
+	ldr	r0, .L2418+8
 	bl	printf
-	ldr	r3, .L2375+12
+	ldr	r3, .L2418+12
 	mov	r1, r6
-	ldr	r0, .L2375+16
+	ldr	r0, .L2418+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2375+20
+	ldr	r3, .L2418+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2364
+	cbz	r5, .L2407
 	cmp	r8, #0
-	bne	.L2373
+	bne	.L2416
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2364
-	ldr	r3, .L2375+24
+	bne	.L2407
+	ldr	r3, .L2418+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2364:
+.L2407:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2375+28
+	ldr	r0, .L2418+28
 	bl	printf
-.L2365:
-	ldr	r3, .L2375+32
+.L2408:
+	ldr	r3, .L2418+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2375+36
+	ldr	r3, .L2418+36
 	ldr	r0, [r3]
-	ldr	r3, .L2375+40
+	ldr	r3, .L2418+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2375+44
+	ldr	r3, .L2418+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2375+48
+	ldr	r3, .L2418+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2375+52
+	ldr	r3, .L2418+52
 	ldrh	r8, [r3]
-.L2366:
+.L2409:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2368
-	ldr	fp, .L2375+56
+	bhi	.L2411
+	ldr	fp, .L2418+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2369:
+.L2412:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2370
+	bhi	.L2413
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2365
-.L2371:
+	bne	.L2408
+.L2414:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2373:
+.L2416:
 	movs	r5, #0
-	b	.L2364
-.L2368:
+	b	.L2407
+.L2411:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2367
+	beq	.L2410
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -16669,11 +16791,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2367:
+.L2410:
 	adds	r2, r2, #1
-	b	.L2366
-.L2370:
-	ldr	r3, .L2375+36
+	b	.L2409
+.L2413:
+	ldr	r3, .L2418+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -16697,12 +16819,12 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2369
-.L2376:
+	b	.L2412
+.L2419:
 	.align	2
-.L2375:
+.L2418:
 	.word	.LANCHOR52
-	.word	.LANCHOR224
+	.word	.LANCHOR225
 	.word	.LC45
 	.word	.LANCHOR83
 	.word	.LC46
@@ -16730,86 +16852,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2387
-	ldr	r1, .L2387+4
-	ldr	r0, .L2387+8
+	ldr	r6, .L2430
+	ldr	r1, .L2430+4
+	ldr	r0, .L2430+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2378:
-	ldr	r3, .L2387+12
+.L2421:
+	ldr	r3, .L2430+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2386
+	bhi	.L2429
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2386:
+.L2429:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2387+16
+	ldr	r3, .L2430+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2387+20
+	ldr	r0, .L2430+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2387+24
+	ldr	r3, .L2430+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2387+28
+	ldr	r3, .L2430+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2387+32
+	ldr	r3, .L2430+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2387+36
+	ldr	r3, .L2430+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2387+40
+	ldr	r3, .L2430+40
 	ldrh	r8, [r3]
-.L2379:
+.L2422:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2381
-	ldr	r10, .L2387+44
+	bhi	.L2424
+	ldr	r10, .L2430+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2382:
+.L2425:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2383
-	ldr	r10, .L2387+48
+	bhi	.L2426
+	ldr	r10, .L2430+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2384:
+.L2427:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2385
+	bhi	.L2428
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2378
-.L2381:
+	b	.L2421
+.L2424:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2380
+	beq	.L2423
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -16825,10 +16947,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2380:
+.L2423:
 	adds	r2, r2, #1
-	b	.L2379
-.L2383:
+	b	.L2422
+.L2426:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16852,8 +16974,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2382
-.L2385:
+	b	.L2425
+.L2428:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16877,12 +16999,12 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2384
-.L2388:
+	b	.L2427
+.L2431:
 	.align	2
-.L2387:
+.L2430:
 	.word	.LANCHOR180
-	.word	.LANCHOR225
+	.word	.LANCHOR226
 	.word	.LC45
 	.word	.LANCHOR41
 	.word	.LANCHOR83
@@ -16922,15 +17044,15 @@ FtlMapTblRecovery:
 	ldr	r0, [sp]
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r2, .L2430
-	ldr	r3, .L2430+4
+	ldr	r2, .L2473
+	ldr	r3, .L2473+4
 	str	r6, [r4, #32]
 	ldr	r1, [r2]
 	mov	fp, r3
 	str	r6, [r4, #28]
 	str	r2, [sp, #8]
 	str	r1, [r3, #8]
-	ldr	r1, .L2430+8
+	ldr	r1, .L2473+8
 	ldr	r5, [r1]
 	movw	r1, #65535
 	str	r5, [r3, #12]
@@ -16938,16 +17060,16 @@ FtlMapTblRecovery:
 	strh	r1, [r4, #2]	@ movhi
 	movs	r1, #1
 	str	r1, [r4, #36]
-.L2390:
+.L2433:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2409
+	bge	.L2452
 	ldr	r2, [sp, #4]
 	lsl	r8, r3, #1
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bne	.L2391
+	bne	.L2434
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	str	r3, [sp, #4]
@@ -16957,28 +17079,28 @@ FtlMapTblRecovery:
 	add	r8, r8, r10
 	strh	r6, [r4]	@ movhi
 	sxth	r10, r0
-	ldr	r6, .L2430+4
+	ldr	r6, .L2473+4
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.L2392:
+.L2435:
 	sxth	r2, fp
 	cmp	r2, r10
-	ble	.L2395
-.L2409:
+	ble	.L2438
+.L2452:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2430+12
+	ldr	r3, .L2473+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2397
+	bne	.L2440
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2397:
+.L2440:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -16987,22 +17109,22 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2395:
+.L2438:
 	ldrh	r1, [r8]
-	ldr	r0, .L2430+4
+	ldr	r0, .L2473+4
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, .L2430+16
+	ldr	r3, .L2473+16
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L2393
+	cbz	r2, .L2436
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #4]
-	cbz	r2, .L2393
-	ldr	r1, .L2430+20
+	cbz	r2, .L2436
+	ldr	r1, .L2473+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
@@ -17011,13 +17133,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r2, #-1
 	strne	r2, [r6]
-.L2393:
+.L2436:
 	ldr	r2, [r6]
 	adds	r2, r2, #1
-	beq	.L2394
+	beq	.L2437
 	ldrh	r2, [r5, #8]
 	cmp	r7, r2
-	bls	.L2394
+	bls	.L2437
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r5]
 	cmp	r0, r1
@@ -17025,16 +17147,16 @@ FtlMapTblRecovery:
 	ldreq	r1, [r6, #4]
 	ldreq	r3, [sp]
 	streq	r1, [r3, r2, lsl #2]
-.L2394:
+.L2437:
 	add	fp, fp, #1
-	b	.L2392
-.L2391:
+	b	.L2435
+.L2434:
 	ldr	r2, [sp, #8]
-	ldr	r0, .L2430+4
+	ldr	r0, .L2473+4
 	ldr	r2, [r2]
 	str	r2, [fp, #8]
 	add	r2, r10, r8
-	ldr	r8, .L2430+12
+	ldr	r8, .L2473+12
 	str	r2, [sp, #16]
 	ldrh	r2, [r10, r3, lsl #1]
 	ldrh	r3, [r8]
@@ -17046,39 +17168,39 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2411
+	beq	.L2454
 	ldrh	r2, [r5]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L2411
+	bne	.L2454
 	ldrh	r2, [r5, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L2399
-.L2411:
+	beq	.L2442
+.L2454:
 	mov	r8, #0
-.L2400:
-	ldr	r2, .L2430+12
+.L2443:
+	ldr	r2, .L2473+12
 	sxth	r3, r8
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L2407
+	bge	.L2450
 	ldr	r2, [sp, #16]
-	ldr	r0, .L2430+4
+	ldr	r0, .L2473+4
 	ldrh	r2, [r2]
 	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
 	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r3, .L2430+16
+	ldr	r3, .L2473+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2404
+	cbz	r3, .L2447
 	ldr	r3, [fp, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L2404
-	ldr	r2, .L2430+20
+	cbz	r3, .L2447
+	ldr	r2, .L2473+20
 	ldr	r0, [fp, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
@@ -17087,13 +17209,13 @@ FtlMapTblRecovery:
 	itt	ne
 	movne	r3, #-1
 	strne	r3, [fp]
-.L2404:
+.L2447:
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	beq	.L2405
+	beq	.L2448
 	ldrh	r3, [r5, #8]
 	cmp	r7, r3
-	bls	.L2405
+	bls	.L2448
 	ldrh	r1, [r5]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -17101,23 +17223,23 @@ FtlMapTblRecovery:
 	ldreq	r2, [fp, #4]
 	ldreq	r1, [sp]
 	streq	r2, [r1, r3, lsl #2]
-.L2405:
+.L2448:
 	add	r8, r8, #1
-	b	.L2400
-.L2399:
+	b	.L2443
+.L2442:
 	ldr	r3, [sp, #8]
 	movs	r1, #0
 	ldrh	r2, [r8]
 	ldr	ip, [r3]
 	subs	r2, r2, #1
-.L2401:
+.L2444:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2403
-.L2407:
+	blt	.L2446
+.L2450:
 	adds	r6, r6, #1
-	b	.L2390
-.L2403:
+	b	.L2433
+.L2446:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -17128,15 +17250,15 @@ FtlMapTblRecovery:
 	ldrhi	r3, [sp]
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r3, lr, lsl #2]
-	b	.L2401
-.L2431:
+	b	.L2444
+.L2474:
 	.align	2
-.L2430:
+.L2473:
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LANCHOR53
-	.word	.LANCHOR1
+	.word	.LANCHOR2
 	.word	.LANCHOR57
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
@@ -17151,38 +17273,38 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2433
-	ldr	r0, .L2433+4
+	ldr	r3, .L2476
+	ldr	r0, .L2476+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2433+8
+	ldr	r3, .L2476+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2433+12
+	ldr	r3, .L2476+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2433+16
+	ldr	r3, .L2476+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2433+20
+	ldr	r3, .L2476+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2433+24
+	ldr	r3, .L2476+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2433+28
+	ldr	r3, .L2476+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2434:
+.L2477:
 	.align	2
-.L2433:
+.L2476:
 	.word	.LANCHOR61
-	.word	.LANCHOR215
+	.word	.LANCHOR216
 	.word	.LANCHOR70
 	.word	.LANCHOR62
 	.word	.LANCHOR71
@@ -17203,15 +17325,102 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2436
+	ldr	r0, .L2479
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2437:
+.L2480:
 	.align	2
-.L2436:
+.L2479:
 	.word	.LANCHOR127
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.ftl_scan_all_ppa,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_ppa, %function
+ftl_scan_all_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r4, .L2486
+	sub	sp, sp, #24
+	ldr	r7, .L2486+4
+	ldrh	r1, [r4]
+	mov	r8, r4
+	ldr	r4, .L2486+8
+	ldrh	r2, [r7]
+	ldr	r0, .L2486+12
+	bl	printf
+.L2482:
+	ldrh	r3, [r8]
+	cmp	r6, r3
+	bcs	.L2484
+	lsl	fp, r6, #10
+	movs	r5, #0
+	ldr	r10, .L2486+32
+	b	.L2485
+.L2483:
+	add	r3, r5, fp
+	movs	r2, #0
+	str	r3, [r4, #4]
+	movs	r1, #1
+	ldr	r3, [r10]
+	mov	r0, r4
+	str	r2, [r4]
+	adds	r5, r5, #1
+	str	r3, [r4, #8]
+	ldr	r3, .L2486+16
+	ldr	r3, [r3]
+	str	r3, [r4, #12]
+	bl	FlashReadPages
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2486+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r3, [r3]
+	ldr	r2, [r4]
+	ldr	r1, [r4, #4]
+	bl	printf
+.L2485:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L2483
+	adds	r6, r6, #1
+	b	.L2482
+.L2484:
+	ldr	r1, .L2486+24
+	ldr	r0, .L2486+28
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L2487:
+	.align	2
+.L2486:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR203
+	.word	.LC52
+	.word	.LANCHOR188
+	.word	.LC53
+	.word	.LANCHOR227
+	.word	.LC54
+	.word	.LANCHOR183
+	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
 	.global	FlashReadFacBbtData
@@ -17225,18 +17434,18 @@ FlashReadFacBbtData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2451
+	ldr	r2, .L2501
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2451+4
+	ldr	r7, .L2501+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2451+8
+	ldr	r2, .L2501+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17244,12 +17453,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2439:
+.L2489:
 	cmp	r3, r5
-	ble	.L2446
+	ble	.L2496
 	mov	r0, #-1
-	b	.L2438
-.L2446:
+	b	.L2488
+.L2496:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17261,60 +17470,60 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2440
+	beq	.L2490
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2440
-	cbz	r4, .L2447
-	cbz	r6, .L2442
-.L2445:
+	bne	.L2490
+	cbz	r4, .L2497
+	cbz	r6, .L2492
+.L2495:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2451+12
+	ldr	r0, .L2501+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2438:
+.L2488:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2442:
+.L2492:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2451+16
-.L2443:
+	ldr	r5, .L2501+16
+.L2493:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2445
+	bcs	.L2495
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2443
-.L2440:
+	b	.L2493
+.L2490:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2439
-.L2447:
+	b	.L2489
+.L2497:
 	mov	r0, r4
-	b	.L2438
-.L2452:
+	b	.L2488
+.L2502:
 	.align	2
-.L2451:
+.L2501:
 	.word	.LANCHOR14
 	.word	.LANCHOR147
 	.word	.LANCHOR197
-	.word	.LC52
+	.word	.LC55
 	.word	.LANCHOR149
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -17330,8 +17539,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2463
-	ldr	r6, .L2463+4
+	ldr	r3, .L2513
+	ldr	r6, .L2513+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17342,25 +17551,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2454
-.L2458:
+	bne	.L2504
+.L2508:
 	movs	r3, #0
-.L2455:
+.L2505:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2454:
+.L2504:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2456:
+.L2506:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2455
+	bge	.L2505
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17372,11 +17581,11 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2456
-	b	.L2458
-.L2464:
+	bcc	.L2506
+	b	.L2508
+.L2514:
 	.align	2
-.L2463:
+.L2513:
 	.word	.LANCHOR18
 	.word	.LANCHOR153
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17391,66 +17600,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2485
+	ldr	r3, .L2535
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2466
-	ldr	r8, .L2485+40
-	ldr	r4, .L2485+4
+	bne	.L2516
+	ldr	r8, .L2535+40
+	ldr	r4, .L2535+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2467:
-	ldr	r3, .L2485+8
+.L2517:
+	ldr	r3, .L2535+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2473
-	ldr	r5, .L2485+12
+	bcc	.L2523
+	ldr	r5, .L2535+12
 	movs	r4, #0
-.L2474:
+.L2524:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2475
-	ldr	r4, .L2485+16
+	bhi	.L2525
+	ldr	r4, .L2535+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2476:
+.L2526:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2480
+	bgt	.L2530
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2477
+	beq	.L2527
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2478
+	beq	.L2528
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2477:
+.L2527:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2476
-.L2473:
-	ldr	r3, .L2485+20
+	b	.L2526
+.L2523:
+	ldr	r3, .L2535+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2485+24
+	ldr	r3, .L2535+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2485+28
+	ldr	r3, .L2535+28
 	str	fp, [r4, #12]
-	beq	.L2468
+	beq	.L2518
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -17467,13 +17676,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2469:
+.L2519:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2467
-.L2468:
+	b	.L2517
+.L2518:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -17482,17 +17691,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2471:
+.L2521:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2470:
+.L2520:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2471
+	beq	.L2521
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -17512,7 +17721,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2485+32
+	ldr	r3, .L2535+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -17527,23 +17736,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2469
+	bne	.L2519
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2470
-.L2475:
+	b	.L2520
+.L2525:
 	bl	FtlBbmMapBadBlock
-	b	.L2474
-.L2478:
+	b	.L2524
+.L2528:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2479
+	bne	.L2529
 	strh	r5, [r4]	@ movhi
-	b	.L2477
-.L2479:
+	b	.L2527
+.L2529:
 	strh	r5, [r4, #4]	@ movhi
-.L2480:
-	ldr	r3, .L2485+36
+.L2530:
+	ldr	r3, .L2535+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -17571,16 +17780,16 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2466:
+.L2516:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2486:
+.L2536:
 	.align	2
-.L2485:
+.L2535:
 	.word	.LANCHOR76
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR45
 	.word	.LANCHOR59
 	.word	.LANCHOR74
@@ -17604,40 +17813,40 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r4, .L2505
+	ldr	r4, .L2555
 	mov	fp, r0
 	str	r2, [sp, #16]
 	ldr	r2, [r4]
-	ldr	r3, .L2505+4
+	ldr	r3, .L2555+4
 	str	r1, [sp, #4]
 	cmp	r0, r2
 	ldrh	r5, [r3]
-	bcc	.L2488
-	ldr	r1, .L2505+8
+	bcc	.L2538
+	ldr	r1, .L2555+8
 	mov	r2, #884
-	ldr	r0, .L2505+12
+	ldr	r0, .L2555+12
 	bl	printf
-	ldr	r1, .L2505+16
-	ldr	r0, .L2505+20
+	ldr	r1, .L2555+16
+	ldr	r0, .L2555+20
 	bl	printf
-.L2488:
+.L2538:
 	ldr	r3, [r4]
 	cmp	fp, r3
-	bcs	.L2489
+	bcs	.L2539
 	adds	r3, r5, #7
-	ldr	r5, .L2505+24
+	ldr	r5, .L2555+24
 	lsr	r7, fp, r3
 	str	r3, [sp, #8]
-	ldr	r3, .L2505+28
+	ldr	r3, .L2555+28
 	movs	r4, #12
 	ldr	r1, [r5]
 	uxth	r6, r7
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2490:
+.L2540:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2495
+	bcc	.L2545
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
 	ldr	r3, [r5]
@@ -17646,35 +17855,35 @@ log2phys:
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2496
+	beq	.L2546
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2496
+	bge	.L2546
 	bl	flush_l2p_region
-.L2496:
-	ldr	r3, .L2505+32
+.L2546:
+	ldr	r3, .L2555+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcs	.L2497
-	ldr	r1, .L2505+36
+	bcs	.L2547
+	ldr	r1, .L2555+36
 	movw	r2, #526
-	ldr	r0, .L2505+12
+	ldr	r0, .L2555+12
 	bl	printf
-	ldr	r1, .L2505+16
-	ldr	r0, .L2505+20
+	ldr	r1, .L2555+16
+	ldr	r0, .L2555+20
 	bl	printf
-.L2497:
-	ldr	r3, .L2505+40
+.L2547:
+	ldr	r3, .L2555+40
 	uxth	r7, r7
 	ldr	r3, [r3]
 	ldr	r3, [r3, r7, lsl #2]
 	cmp	r3, #0
-	bne	.L2498
+	bne	.L2548
 	ldr	r2, [r5]
 	movs	r1, #255
 	str	r3, [sp, #12]
 	adds	r0, r2, r4
-	ldr	r2, .L2505+44
+	ldr	r2, .L2555+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -17683,53 +17892,53 @@ log2phys:
 	adds	r1, r2, r4
 	strh	r6, [r2, r4]	@ movhi
 	str	r3, [r1, #4]
-	b	.L2492
-.L2489:
+	b	.L2542
+.L2539:
 	ldr	r3, [sp, #16]
 	mov	r0, #-1
-	cbnz	r3, .L2487
+	cbnz	r3, .L2537
 	ldr	r3, [sp, #4]
 	str	r0, [r3]
-.L2487:
+.L2537:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2495:
+.L2545:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r6
-	bne	.L2490
-.L2492:
+	bne	.L2540
+.L2542:
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	ldr	r0, [sp, #16]
-	ldr	r1, .L2505+24
+	ldr	r1, .L2555+24
 	lsls	r3, r3, r2
 	movs	r2, #12
 	subs	r3, r3, #1
 	and	r3, r3, fp
 	uxth	r3, r3
-	cbnz	r0, .L2493
+	cbnz	r0, .L2543
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r2, [r2, #8]
 	ldr	r3, [r2, r3, lsl #2]
 	ldr	r2, [sp, #4]
 	str	r3, [r2]
-.L2494:
+.L2544:
 	ldr	r2, [r1]
 	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2503
+	beq	.L2553
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2503:
+.L2553:
 	movs	r0, #0
-	b	.L2487
-.L2493:
+	b	.L2537
+.L2543:
 	ldr	r0, [r1]
 	mla	r2, r2, r10, r0
 	ldr	r0, [sp, #4]
@@ -17739,19 +17948,19 @@ log2phys:
 	ldr	r3, [r2, #4]
 	orr	r3, r3, #-2147483648
 	str	r3, [r2, #4]
-	ldr	r3, .L2505+48
+	ldr	r3, .L2555+48
 	strh	r6, [r3]	@ movhi
-	b	.L2494
-.L2498:
+	b	.L2544
+.L2548:
 	ldr	r2, [r5]
-	ldr	r8, .L2505+80
+	ldr	r8, .L2555+80
 	str	r3, [sp, #20]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
 	mov	r0, r8
 	str	r3, [r8, #4]
 	str	r2, [r8, #8]
-	ldr	r2, .L2505+52
+	ldr	r2, .L2555+52
 	ldr	r2, [r2]
 	str	r2, [r8, #12]
 	movs	r2, #1
@@ -17762,85 +17971,85 @@ log2phys:
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #20]
 	cmp	r2, r6
-	beq	.L2499
+	beq	.L2549
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2505+56
+	ldr	r0, .L2555+56
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2505+60
+	ldr	r0, .L2555+60
 	bl	rknand_print_hex
-	ldr	r3, .L2505+32
+	ldr	r3, .L2555+32
 	movs	r2, #4
-	ldr	r1, .L2505+40
-	ldr	r0, .L2505+64
+	ldr	r1, .L2555+40
+	ldr	r0, .L2555+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2505+68
+	ldr	r3, .L2555+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2500:
+.L2550:
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r6
-	beq	.L2501
-	ldr	r1, .L2505+36
+	beq	.L2551
+	ldr	r1, .L2555+36
 	mov	r2, #552
-	ldr	r0, .L2505+12
+	ldr	r0, .L2555+12
 	bl	printf
-	ldr	r1, .L2505+16
-	ldr	r0, .L2505+20
+	ldr	r1, .L2555+16
+	ldr	r0, .L2555+20
 	bl	printf
-.L2501:
-	ldr	r3, .L2505+24
+.L2551:
+	ldr	r3, .L2555+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r6, [r3, r4]	@ movhi
-	b	.L2492
-.L2499:
+	b	.L2542
+.L2549:
 	ldr	r2, [r8]
 	cmp	r2, #256
-	bne	.L2500
+	bne	.L2550
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2505+72
+	ldr	r0, .L2555+72
 	bl	printf
 	ldr	r3, [r5]
 	mov	r1, r7
-	ldr	r0, .L2505+76
+	ldr	r0, .L2555+76
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L2500
-.L2506:
+	b	.L2550
+.L2556:
 	.align	2
-.L2505:
+.L2555:
 	.word	.LANCHOR72
 	.word	.LANCHOR56
-	.word	.LANCHOR226
+	.word	.LANCHOR228
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR96
 	.word	.LANCHOR67
 	.word	.LANCHOR66
-	.word	.LANCHOR227
+	.word	.LANCHOR229
 	.word	.LANCHOR131
 	.word	.LANCHOR57
 	.word	.LANCHOR97
 	.word	.LANCHOR188
-	.word	.LC53
+	.word	.LC56
 	.word	.LC27
-	.word	.LC54
+	.word	.LC57
 	.word	.LANCHOR76
-	.word	.LC55
+	.word	.LC58
 	.word	.LANCHOR127
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -17855,73 +18064,73 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L2527
+	ldr	r3, .L2577
 	mov	r5, r0
 	mov	r10, r1
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r7, .L2507
-	ldr	r3, .L2527+4
+	cbnz	r7, .L2557
+	ldr	r3, .L2577+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2522
+	cbz	r3, .L2572
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2509:
-	ldr	fp, .L2527+40
+.L2559:
+	ldr	fp, .L2577+40
 	mov	r2, r6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r1, r10
 	mov	r0, r5
 	bl	FlashProgPages
-.L2510:
+.L2560:
 	cmp	r7, r10
-	bne	.L2520
-	ldr	r3, .L2527+8
+	bne	.L2570
+	ldr	r3, .L2577+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2507
-	ldr	r1, .L2527+12
-	mov	r2, #1600
-	ldr	r0, .L2527+16
+	bcc	.L2557
+	ldr	r1, .L2577+12
+	movw	r2, #1605
+	ldr	r0, .L2577+16
 	bl	printf
-	ldr	r1, .L2527+20
-	ldr	r0, .L2527+24
+	ldr	r1, .L2577+20
+	ldr	r0, .L2577+24
 	bl	printf
-.L2507:
+.L2557:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2522:
+.L2572:
 	mov	r6, r7
-	b	.L2509
-.L2513:
+	b	.L2559
+.L2563:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2511
+	bne	.L2561
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2527+28
+	ldr	r3, .L2577+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2511:
+.L2561:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2512
+	cbnz	r3, .L2562
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2512:
-	ldr	r2, .L2527+32
+.L2562:
+	ldr	r2, .L2577+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17939,27 +18148,27 @@ FtlProgPages:
 	bl	FlashProgPages
 	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2507
-.L2520:
+	bne	.L2557
+.L2570:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2513
-	ldr	r3, .L2527+8
+	beq	.L2563
+	ldr	r3, .L2577+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2514
-	ldr	r1, .L2527+12
-	movw	r2, #1583
-	ldr	r0, .L2527+16
+	bcc	.L2564
+	ldr	r1, .L2577+12
+	movw	r2, #1588
+	ldr	r0, .L2577+16
 	bl	printf
-	ldr	r1, .L2527+20
-	ldr	r0, .L2527+24
+	ldr	r1, .L2577+20
+	ldr	r0, .L2577+24
 	bl	printf
-.L2514:
+.L2564:
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2515
-.L2526:
+	cbnz	r6, .L2565
+.L2576:
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
@@ -17973,38 +18182,38 @@ FtlProgPages:
 	ldr	r2, [sp, #4]
 	mov	r3, r0
 	adds	r2, r2, #1
-	beq	.L2517
+	beq	.L2567
 	ldr	r2, [fp]
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2518
+	cbnz	r2, .L2568
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L2527+36
+	ldr	r0, .L2577+36
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2518:
+.L2568:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L2517:
+.L2567:
 	adds	r7, r7, #1
 	adds	r5, r5, #36
-	b	.L2510
-.L2515:
+	b	.L2560
+.L2565:
 	orr	r3, r3, #-2147483648
-	b	.L2526
-.L2528:
+	b	.L2576
+.L2578:
 	.align	2
-.L2527:
+.L2577:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR38
-	.word	.LANCHOR228
+	.word	.LANCHOR230
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR52
 	.word	.LANCHOR138
-	.word	.LC56
+	.word	.LC59
 	.word	.LANCHOR83
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
@@ -18019,27 +18228,27 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r3, .L2534
+	ldr	r3, .L2584
 	ldr	r4, [r3]
-	cbnz	r4, .L2530
-	ldr	r5, .L2534+4
+	cbnz	r4, .L2580
+	ldr	r5, .L2584+4
 	ldr	r0, [r5]
-	cbz	r0, .L2530
-	ldr	r3, .L2534+8
+	cbz	r0, .L2580
+	ldr	r3, .L2584+8
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
 	str	r4, [r5]
-.L2530:
+.L2580:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2535:
+.L2585:
 	.align	2
-.L2534:
+.L2584:
 	.word	.LANCHOR76
 	.word	.LANCHOR132
-	.word	.LANCHOR229
+	.word	.LANCHOR231
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -18053,20 +18262,20 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2538
+	ldr	r3, .L2588
 	ldr	r3, [r3]
-	cbnz	r3, .L2537
+	cbnz	r3, .L2587
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2537:
+.L2587:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2539:
+.L2589:
 	.align	2
-.L2538:
+.L2588:
 	.word	.LANCHOR76
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
@@ -18081,18 +18290,18 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2542
+	ldr	r3, .L2592
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2541
+	bne	.L2591
 	bl	FtlSysFlush
-.L2541:
+.L2591:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2543:
+.L2593:
 	.align	2
-.L2542:
-	.word	.LANCHOR230
+.L2592:
+	.word	.LANCHOR232
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
 	.align	1
@@ -18122,28 +18331,28 @@ rk_ftl_de_init:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2560
+	ldr	r3, .L2610
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
 	adds	r2, r1, r2
 	mov	r6, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2553
+	bhi	.L2603
 	cmp	r5, #31
-	bhi	.L2547
-.L2548:
+	bhi	.L2597
+.L2598:
 	movs	r0, #0
-.L2545:
+.L2595:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2547:
-	ldr	r3, .L2560+4
+.L2597:
+	ldr	r3, .L2610+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2548
-	ldr	r8, .L2560+16
+	bne	.L2598
+	ldr	r8, .L2610+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r4, [r8]
@@ -18153,7 +18362,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L2549
+	cbz	r6, .L2599
 	subs	r4, r4, r6
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -18161,32 +18370,32 @@ ftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L2549:
-	ldr	r4, .L2560+8
+.L2599:
+	ldr	r4, .L2610+8
 	mov	r3, #-1
-	ldr	r6, .L2560+12
+	ldr	r6, .L2610+12
 	str	r3, [sp, #4]
-.L2550:
+.L2600:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2552
-	ldr	r3, .L2560+8
+	bcs	.L2602
+	ldr	r3, .L2610+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2548
+	bls	.L2598
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2548
-.L2552:
+	b	.L2598
+.L2602:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2551
+	beq	.L2601
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -18201,23 +18410,165 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2551:
+.L2601:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L2550
-.L2553:
+	b	.L2600
+.L2603:
 	mov	r0, #-1
-	b	.L2545
-.L2561:
+	b	.L2595
+.L2611:
 	.align	2
-.L2560:
+.L2610:
 	.word	.LANCHOR68
 	.word	.LANCHOR76
-	.word	.LANCHOR231
+	.word	.LANCHOR233
 	.word	.LANCHOR163
 	.word	.LANCHOR55
 	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlCheckVpc,"ax",%progbits
+	.align	1
+	.global	FtlCheckVpc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L2636
+	ldr	r5, .L2636+4
+	ldr	r1, .L2636+8
+	ldr	r0, .L2636+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L2636+4
+	bl	memset
+.L2613:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L2615
+	ldr	r10, .L2636+56
+	movs	r4, #0
+	ldr	r7, .L2636+16
+	mov	r6, r4
+.L2616:
+	ldrh	r2, [r10]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L2618
+	ldr	r3, .L2636+20
+	ldr	r4, [r3]
+	cbz	r4, .L2619
+	ldr	r3, .L2636+24
+	mov	r8, #0
+	ldr	r5, .L2636+28
+	ldr	r10, .L2636+16
+	ldrh	r7, [r3]
+	ldr	r3, [r5]
+	ldr	fp, .L2636+4
+	subs	r4, r4, r3
+	ldr	r3, .L2636+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L2620:
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L2619
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L2621
+	movs	r6, #1
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L2636+36
+	bl	printf
+.L2621:
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L2620
+.L2619:
+	cbz	r6, .L2612
+	ldr	r1, .L2636+8
+	mov	r2, #1688
+	ldr	r0, .L2636+40
+	bl	printf
+	ldr	r1, .L2636+44
+	ldr	r0, .L2636+48
+	bl	printf
+.L2612:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2615:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L2614
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L2614:
+	adds	r4, r4, #1
+	b	.L2613
+.L2618:
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L2636+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L2617
+	mov	r1, r5
+	ldr	r0, .L2636+52
+	bl	printf
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L2617
+	ldrh	r2, [r8, r5, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L2617:
+	adds	r4, r4, #1
+	b	.L2616
+.L2637:
+	.align	2
+.L2636:
+	.word	.LANCHOR72
+	.word	check_valid_page_count_table
+	.word	.LANCHOR234
+	.word	.LC45
+	.word	.LANCHOR83
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	-1431655765
+	.word	.LC61
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC60
+	.word	.LANCHOR40
+	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.Ftlscanalldata,"ax",%progbits
 	.align	1
 	.global	Ftlscanalldata
@@ -18231,60 +18582,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2576
+	ldr	r7, .L2652
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2576+24
-	ldr	r0, .L2576+4
+	ldr	r8, .L2652+24
+	ldr	r0, .L2652+4
 	bl	printf
-.L2563:
+.L2639:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2569
+	bcc	.L2645
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2569:
+.L2645:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2564
+	cbnz	r3, .L2640
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2564:
+.L2640:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2566
-	ldr	r4, .L2576+8
+	beq	.L2642
+	ldr	r4, .L2652+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2576+12
+	ldr	r3, .L2652+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2576+16
+	ldr	r3, .L2652+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2567
+	beq	.L2643
 	adds	r3, r3, #1
-	beq	.L2567
+	beq	.L2643
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2566
-.L2567:
+	beq	.L2642
+.L2643:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2576+20
+	ldr	r0, .L2652+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18299,19 +18650,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2566:
+.L2642:
 	adds	r5, r5, #1
-	b	.L2563
-.L2577:
+	b	.L2639
+.L2653:
 	.align	2
-.L2576:
+.L2652:
 	.word	.LANCHOR72
-	.word	.LC57
-	.word	.LANCHOR202
+	.word	.LC62
+	.word	.LANCHOR203
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	.LC59
-	.word	.LC58
+	.word	.LC64
+	.word	.LC63
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18326,7 +18677,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2588
+	ldr	r5, .L2664
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18334,15 +18685,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2579
-	ldr	r2, .L2588+4
+	bne	.L2655
+	ldr	r2, .L2664+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2580
-	ldr	r2, .L2588+8
+	beq	.L2656
+	ldr	r2, .L2664+8
 	movw	lr, #65535
-	ldr	ip, .L2588+32
-	ldr	r0, .L2588+12
+	ldr	ip, .L2664+32
+	ldr	r0, .L2664+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18351,25 +18702,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2581:
+.L2657:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2580
+	bls	.L2656
 	cmp	r4, r7
-	bne	.L2582
+	bne	.L2658
 	mov	r1, r4
-	ldr	r0, .L2588+4
+	ldr	r0, .L2664+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2583
-	ldr	r1, .L2588+16
-	movw	r2, #2097
-	ldr	r0, .L2588+20
+	cbnz	r3, .L2659
+	ldr	r1, .L2664+16
+	movw	r2, #2099
+	ldr	r0, .L2664+20
 	bl	printf
-	ldr	r1, .L2588+24
-	ldr	r0, .L2588+28
+	ldr	r1, .L2664+24
+	ldr	r0, .L2664+28
 	bl	printf
-.L2583:
+.L2659:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18377,17 +18728,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2579:
+.L2655:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2580
-.L2582:
+	b	.L2656
+.L2658:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2581
-.L2580:
+	bne	.L2657
+.L2656:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18395,14 +18746,14 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2589:
+.L2665:
 	.align	2
-.L2588:
+.L2664:
 	.word	.LANCHOR83
 	.word	.LANCHOR87
 	.word	.LANCHOR81
 	.word	.LANCHOR88
-	.word	.LANCHOR232
+	.word	.LANCHOR235
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -18425,181 +18776,181 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2751
+	beq	.L2827
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2760
+	ldr	r3, .L2836
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2593
+	bne	.L2669
 	strh	r3, [r0, #4]	@ movhi
-.L2758:
+.L2834:
 	strb	r3, [r10, #6]
-.L2751:
+.L2827:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2593:
+.L2669:
 	ldrh	r0, [r0, #16]
-.L2594:
+.L2670:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2595
+	beq	.L2671
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2596
+	bne	.L2672
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2597
-	ldr	r3, .L2760+4
+	beq	.L2673
+	ldr	r3, .L2836+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2675
-	ldr	r3, .L2760+8
+	bne	.L2751
+	ldr	r3, .L2836+8
 	ldrh	r5, [r3, r0, lsl #1]
-.L2598:
-	ldr	r3, .L2760+12
+.L2674:
+	ldr	r3, .L2836+12
 	movw	r8, #65535
 	mov	fp, #36
 	ldrh	ip, [r3]
-	ldr	r3, .L2760+16
+	ldr	r3, .L2836+16
 	ldr	r0, [r3]
-	ldr	r3, .L2760+20
+	ldr	r3, .L2836+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2760+24
+	ldr	r3, .L2836+24
 	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2599:
+.L2675:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L2603
+	bhi	.L2679
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2676
-	ldr	r3, .L2760+4
+	bne	.L2752
+	ldr	r3, .L2836+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2752:
+.L2828:
 	str	r3, [sp, #36]
 	mov	r1, r6
 	ldr	r2, [sp, #36]
 	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2760+28
+	ldr	r3, .L2836+28
 	movw	fp, #65535
-	ldr	r8, .L2760+16
+	ldr	r8, .L2836+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2605:
+.L2681:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2610
-	bne	.L2608
+	bhi	.L2686
+	bne	.L2684
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2753:
+.L2829:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2612
-	ldr	r2, .L2760+4
+	bne	.L2688
+	ldr	r2, .L2836+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2612
+	cbnz	r2, .L2688
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2760+8
+	ldr	r2, .L2836+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2612:
-	ldr	r2, .L2760
+.L2688:
+	ldr	r2, .L2836
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2613
+	bne	.L2689
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2613:
+.L2689:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2614
+	bne	.L2690
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2614
-.L2759:
+	bne	.L2690
+.L2835:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2751
-.L2595:
+	b	.L2827
+.L2671:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2594
-.L2596:
+	b	.L2670
+.L2672:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2597
-.L2675:
+	beq	.L2673
+.L2751:
 	mov	r5, r4
-	b	.L2598
-.L2597:
+	b	.L2674
+.L2673:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2600
-	ldr	r1, .L2760+32
-	movw	r2, #2168
-	ldr	r0, .L2760+36
+	cbz	r3, .L2676
+	ldr	r1, .L2836+32
+	movw	r2, #2170
+	ldr	r0, .L2836+36
 	bl	printf
-	ldr	r1, .L2760+40
-	ldr	r0, .L2760+44
+	ldr	r1, .L2836+40
+	ldr	r0, .L2836+44
 	bl	printf
-.L2600:
+.L2676:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2601
+	cbz	r3, .L2677
 	cmp	r5, r3
-	beq	.L2601
-	ldr	r1, .L2760+32
-	movw	r2, #2169
-	ldr	r0, .L2760+36
+	beq	.L2677
+	ldr	r1, .L2836+32
+	movw	r2, #2171
+	ldr	r0, .L2836+36
 	bl	printf
-	ldr	r1, .L2760+40
-	ldr	r0, .L2760+44
+	ldr	r1, .L2836+40
+	ldr	r0, .L2836+44
 	bl	printf
-.L2601:
+.L2677:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2758
-.L2603:
+	b	.L2834
+.L2679:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2602
+	beq	.L2678
 	mla	r1, fp, r6, r0
 	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
@@ -18613,36 +18964,36 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #8]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2602:
+.L2678:
 	adds	r3, r3, #1
-	b	.L2599
-.L2676:
+	b	.L2675
+.L2752:
 	movs	r3, #0
-	b	.L2752
-.L2610:
+	b	.L2828
+.L2686:
 	movs	r3, #36
 	ldr	r1, [r8]
 	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2606
+	cbnz	r3, .L2682
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2607
-	ldr	r1, .L2760+28
+	beq	.L2683
+	ldr	r1, .L2836+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2607
-	ldr	r1, .L2760+28
+	cbz	r0, .L2683
+	ldr	r1, .L2836+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2607:
+.L2683:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2609
-.L2608:
+	bne	.L2685
+.L2684:
 	uxth	r3, r4
 	uxth	r7, r7
 	str	r3, [sp, #8]
@@ -18650,26 +19001,26 @@ FtlRecoverySuperblock:
 	ldr	r3, [r8]
 	mla	r7, r2, r7, r3
 	ldr	r0, [r7, #4]
-	b	.L2753
-.L2606:
+	b	.L2829
+.L2682:
 	ldr	r1, [r2, #4]
 	uxth	fp, r5
-	ldr	r0, .L2760+48
+	ldr	r0, .L2836+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2760+52
+	ldr	r3, .L2836+52
 	strh	r2, [r3]	@ movhi
-.L2609:
+.L2685:
 	adds	r7, r7, #1
-	b	.L2605
-.L2614:
+	b	.L2681
+.L2690:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2615
+	bne	.L2691
 	cmp	r3, #0
-	bne	.L2616
-.L2615:
-	ldr	r3, .L2760+56
+	bne	.L2692
+.L2691:
+	ldr	r3, .L2836+56
 	uxth	fp, r5
 	uxth	r5, r5
 	mov	r7, #-1
@@ -18688,63 +19039,63 @@ FtlRecoverySuperblock:
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2619:
+.L2695:
 	cmp	r4, fp
-	bhi	.L2634
-	ldr	r3, .L2760+12
+	bhi	.L2710
+	ldr	r3, .L2836+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2760+16
+	ldr	r3, .L2836+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2635
-.L2621:
+	b	.L2711
+.L2697:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2620
+	beq	.L2696
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2620:
+.L2696:
 	adds	r3, r3, #1
-.L2635:
+.L2711:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2621
+	bhi	.L2697
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2760+4
+	ldr	r2, .L2836+4
 	movs	r1, #36
-	ldr	r3, .L2760+56
+	ldr	r3, .L2836+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2760+16
+	ldr	r2, .L2836+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2622:
+.L2698:
 	cmp	r5, r2
-	bne	.L2632
-	cbz	r0, .L2633
-	ldr	r2, .L2760+56
+	bne	.L2708
+	cbz	r0, .L2709
+	ldr	r2, .L2836+56
 	str	r3, [r2]
-.L2633:
+.L2709:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2619
-.L2761:
+	b	.L2695
+.L2837:
 	.align	2
-.L2760:
+.L2836:
 	.word	.LANCHOR52
 	.word	.LANCHOR15
 	.word	.LANCHOR16
@@ -18753,128 +19104,128 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR160
-	.word	.LANCHOR233
+	.word	.LANCHOR236
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC60
-	.word	.LANCHOR234
+	.word	.LC65
+	.word	.LANCHOR237
 	.word	.LANCHOR136
-.L2632:
+.L2708:
 	ldr	r1, [r2]
-	cbnz	r1, .L2623
+	cbnz	r1, .L2699
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2679
+	beq	.L2755
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2679
+	beq	.L2755
 	adds	r0, r7, #1
-	bne	.L2681
-	ldr	r0, .L2762
+	bne	.L2757
+	ldr	r0, .L2838
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2625
+	bne	.L2701
 	cmp	lr, #0
-	beq	.L2681
-.L2625:
+	beq	.L2757
+.L2701:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2681:
+.L2757:
 	movs	r0, #1
-	b	.L2624
-.L2623:
-	cbz	r0, .L2626
-	ldr	r2, .L2762+4
+	b	.L2700
+.L2699:
+	cbz	r0, .L2702
+	ldr	r2, .L2838+4
 	str	r3, [r2]
-.L2626:
-	ldr	r3, .L2762+8
+.L2702:
+	ldr	r3, .L2838+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2616
-	ldr	r3, .L2762
+	cbnz	r3, .L2692
+	ldr	r3, .L2838
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2628
+	bne	.L2704
 	adds	r1, r7, #1
-	ldr	r3, .L2762+4
-	beq	.L2629
+	ldr	r3, .L2838+4
+	beq	.L2705
 	str	r7, [r3]
-.L2616:
+.L2692:
 	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r6, .L2762+12
-	ldr	r3, .L2762+16
+	ldr	r6, .L2838+12
+	ldr	r3, .L2838+16
 	strh	r2, [r3]	@ movhi
-.L2636:
-	ldr	r3, .L2762+20
+.L2712:
+	ldr	r3, .L2838+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2762+24
+	ldr	r3, .L2838+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2637:
+.L2713:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2640
+	bcc	.L2716
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2757:
+.L2833:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2669
+	bhi	.L2745
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2670
-	ldr	r3, .L2762+24
+	bne	.L2746
+	ldr	r3, .L2838+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2670
-	ldr	r3, .L2762+28
+	cbz	r3, .L2746
+	ldr	r3, .L2838+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2670
+	bne	.L2746
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2645
-.L2670:
-	ldr	r3, .L2762+32
+	beq	.L2721
+.L2746:
+	ldr	r3, .L2838+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2636
-	ldr	r2, .L2762+20
+	bne	.L2712
+	ldr	r2, .L2838+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2671:
+.L2747:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2751
+	bcs	.L2827
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2758
+	bne	.L2834
 	mov	r3, r1
-	b	.L2671
-.L2629:
+	b	.L2747
+.L2705:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -18882,62 +19233,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2754:
+.L2830:
 	str	r2, [r3]
-	b	.L2616
-.L2628:
+	b	.L2692
+.L2704:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2631
+	beq	.L2707
 	adds	r2, r6, #1
-	beq	.L2616
-	ldr	r3, .L2762+4
+	beq	.L2692
+	ldr	r3, .L2838+4
 	str	r6, [r3]
-	b	.L2616
-.L2631:
-	ldr	r2, .L2762+4
+	b	.L2692
+.L2707:
+	ldr	r2, .L2838+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2616
+	beq	.L2692
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2616
-.L2679:
+	b	.L2692
+.L2755:
 	mov	r1, r3
 	mov	r3, r6
-.L2624:
+.L2700:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2622
-.L2634:
+	b	.L2698
+.L2710:
 	mov	r2, #-1
-	ldr	r3, .L2762+4
-	b	.L2754
-.L2640:
+	ldr	r3, .L2838+4
+	b	.L2830
+.L2716:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2638
+	beq	.L2714
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2639
-	cbz	r7, .L2639
+	bne	.L2715
+	cbz	r7, .L2715
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2639:
+.L2715:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2638:
+.L2714:
 	adds	r2, r2, #1
-	b	.L2637
-.L2669:
+	b	.L2713
+.L2745:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -18949,45 +19300,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2642
-	bne	.L2643
+	bcc	.L2718
+	bne	.L2719
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2642
-.L2643:
+	bhi	.L2718
+.L2719:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2644
+	bne	.L2720
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2645
-.L2644:
+	beq	.L2721
+.L2720:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2646
+	beq	.L2722
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2647
+	beq	.L2723
 	ldrh	r0, [r10]
-.L2755:
+.L2831:
 	bl	decrement_vpc_count
-	b	.L2642
-.L2647:
+	b	.L2718
+.L2723:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2648
-	ldr	r2, .L2762+36
+	beq	.L2724
+	ldr	r2, .L2838+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2648
+	cbz	r0, .L2724
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2648:
+.L2724:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -18995,17 +19346,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2762+4
+	ldr	r3, .L2838+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2649
+	beq	.L2725
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2649
+	beq	.L2725
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2650
+	beq	.L2726
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19017,160 +19368,160 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2651
-.L2652:
+	bne	.L2727
+.L2728:
 	mov	r3, #-1
 	str	r3, [sp, #44]
-.L2659:
+.L2735:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2642
-.L2674:
+	beq	.L2718
+.L2750:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2762+40
+	ldr	r3, .L2838+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2665
-	ldr	r1, .L2762+44
-	movw	r2, #2456
-	ldr	r0, .L2762+48
+	bhi	.L2741
+	ldr	r1, .L2838+44
+	movw	r2, #2458
+	ldr	r0, .L2838+48
 	bl	printf
-	ldr	r1, .L2762+52
-	ldr	r0, .L2762+56
+	ldr	r1, .L2838+52
+	ldr	r0, .L2838+56
 	bl	printf
-.L2665:
-	ldr	r3, .L2762+60
+.L2741:
+	ldr	r3, .L2838+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2666
+	beq	.L2742
 	mov	r0, r4
-	b	.L2755
-.L2650:
+	b	.L2831
+.L2726:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2642
+	bne	.L2718
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.L2642:
+.L2718:
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
-	b	.L2757
-.L2651:
+	b	.L2833
+.L2727:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L2652
+	bne	.L2728
 	ldr	r8, [r7, #4]
-	ldr	r0, .L2762+4
+	ldr	r0, .L2838+4
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2652
+	beq	.L2728
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2654
-.L2657:
+	bne	.L2730
+.L2733:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2652
-.L2763:
+	b	.L2728
+.L2839:
 	.align	2
-.L2762:
+.L2838:
 	.word	.LANCHOR120
 	.word	.LANCHOR136
-	.word	.LANCHOR234
+	.word	.LANCHOR237
 	.word	.LANCHOR180
-	.word	.LANCHOR235
+	.word	.LANCHOR238
 	.word	.LANCHOR38
 	.word	.LANCHOR15
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.word	.LANCHOR160
 	.word	.LANCHOR40
-	.word	.LANCHOR233
+	.word	.LANCHOR236
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR83
-.L2654:
+.L2730:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2652
+	beq	.L2728
 	adds	r0, r1, #1
-	beq	.L2655
+	beq	.L2731
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2656:
+.L2732:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2657
+	beq	.L2733
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2764
+	ldr	r2, .L2840
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2657
+	beq	.L2733
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2652
-	b	.L2657
-.L2655:
+	beq	.L2728
+	b	.L2733
+.L2731:
 	str	r1, [r2, r5]
-	b	.L2656
-.L2649:
+	b	.L2732
+.L2725:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2659
-	ldr	r2, .L2764+4
+	beq	.L2735
+	ldr	r2, .L2840+4
 	ldr	r3, [sp, #44]
 	ldr	r2, [r2]
 	cmp	r2, r3, lsr #10
-	bhi	.L2661
+	bhi	.L2737
 	adds	r3, r3, #1
-	bne	.L2642
-.L2661:
+	bne	.L2718
+.L2737:
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2659
+	beq	.L2735
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2674
+	beq	.L2750
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2764+8
+	ldr	r3, .L2840+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2664
-	ldr	r3, .L2764+12
+	beq	.L2740
+	ldr	r3, .L2840+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2664
-	ldr	r3, .L2764+16
+	beq	.L2740
+	ldr	r3, .L2840+16
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2659
-.L2664:
+	bne	.L2735
+.L2740:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19180,76 +19531,76 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2659
+	beq	.L2735
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2659
+	bne	.L2735
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2659
-.L2666:
+	b	.L2735
+.L2742:
 	mov	r1, r4
-	ldr	r0, .L2764+20
+	ldr	r0, .L2840+20
 	bl	printf
-	b	.L2642
-.L2646:
+	b	.L2718
+.L2722:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2764+24
-	ldr	r0, .L2764+28
+	ldr	r2, .L2840+24
+	ldr	r0, .L2840+28
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2764+32
+	ldr	r2, .L2840+32
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2667
+	bhi	.L2743
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2764+36
+	ldr	r1, .L2840+36
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2667:
+.L2743:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2764
+	ldr	r3, .L2840
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2668
+	bne	.L2744
 	ldr	r2, [sp, #4]
-.L2756:
+.L2832:
 	str	r2, [r3]
-	b	.L2642
-.L2668:
+	b	.L2718
+.L2744:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2642
+	bcs	.L2718
 	mov	r2, r1
-	b	.L2756
-.L2645:
+	b	.L2832
+.L2721:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2759
-.L2765:
+	b	.L2835
+.L2841:
 	.align	2
-.L2764:
+.L2840:
 	.word	.LANCHOR136
 	.word	.LANCHOR43
 	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LC61
-	.word	.LANCHOR234
-	.word	.LC62
-	.word	.LANCHOR236
+	.word	.LC66
 	.word	.LANCHOR237
+	.word	.LC67
+	.word	.LANCHOR239
+	.word	.LANCHOR240
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -19262,77 +19613,77 @@ FtlRecoverySuperblock:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2804
+	ldr	r3, .L2881
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	sub	sp, sp, #64
 	ldrh	r5, [r3]
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2792
-	cbnz	r5, .L2767
-.L2768:
+	beq	.L2868
+	cbnz	r5, .L2843
+.L2844:
 	bl	FtlGcPageVarInit
-	b	.L2769
-.L2792:
+	b	.L2845
+.L2868:
 	movs	r5, #0
-.L2767:
-	ldr	r3, .L2804+4
+.L2843:
+	ldr	r3, .L2881+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2768
-.L2769:
-	ldr	r8, .L2804+72
+	beq	.L2844
+.L2845:
+	ldr	r8, .L2881+76
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2770:
+.L2846:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2771
-.L2791:
-	ldr	r3, .L2804+8
+	beq	.L2847
+.L2867:
+	ldr	r3, .L2881+8
 	movs	r2, #0
 	ldr	r0, [r8]
 	mov	fp, r2
 	movw	ip, #65535
 	mov	lr, #36
 	ldrh	r10, [r3]
-	ldr	r3, .L2804+12
+	ldr	r3, .L2881+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2804+16
+	ldr	r3, .L2881+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L2804+20
+	ldr	r3, .L2881+20
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L2804+24
+	ldr	r3, .L2881+24
 	ldrh	r7, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L2772:
+.L2848:
 	uxth	r3, r2
 	cmp	r10, r3
-	bhi	.L2774
+	bhi	.L2850
 	mov	r10, #0
 	movs	r2, #0
 	mov	r1, fp
 	bl	FlashReadPages
-.L2775:
+.L2851:
 	uxth	r3, r10
 	cmp	fp, r3
-	bhi	.L2790
-	ldr	r3, .L2804+4
+	bhi	.L2866
+	ldr	r3, .L2881+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L2791
-.L2771:
-	ldr	r3, .L2804
+	bhi	.L2867
+.L2847:
+	ldr	r3, .L2881
 	movw	r2, #65535
 	mov	r0, r4
 	strh	r5, [r4, #2]	@ movhi
@@ -19345,12 +19696,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2774:
+.L2850:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
 	str	r1, [sp, #4]
-	beq	.L2773
+	beq	.L2849
 	mla	r1, lr, fp, r0
 	ldr	r6, [sp, #12]
 	orr	r3, r5, r3, lsl #10
@@ -19367,55 +19718,57 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, fp, #1
 	uxth	fp, r3
-.L2773:
+.L2849:
 	adds	r2, r2, #1
-	b	.L2772
-.L2790:
+	b	.L2848
+.L2866:
 	movs	r7, #36
 	ldr	r2, [r8]
 	mul	r7, r7, r10
 	adds	r3, r2, r7
 	ldr	r6, [r2, r7]
 	ldr	r1, [r3, #4]
+	ldr	r3, [r3, #12]
 	str	r1, [sp, #4]
 	cmp	r6, #0
-	bne	.L2776
-	ldr	r3, [r3, #12]
-	movw	r2, #65535
+	bne	.L2852
 	ldrh	r1, [r3]
+	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L2803
-	ldr	r2, .L2804+28
+	beq	.L2880
+	ldr	r2, .L2881+28
 	ldr	r0, [r3, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L2778
-.L2803:
-	ldrh	r2, [r4]
-.L2789:
-	ldr	r3, .L2804+32
+	bls	.L2854
+.L2880:
+	ldr	r3, .L2881+32
 	movs	r1, #0
-	movs	r5, #0
+	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
+	ldr	r2, .L2881+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
+	strh	r3, [r2]	@ movhi
+.L2879:
 	bl	FtlGcPageVarInit
-	b	.L2770
-.L2778:
-	ldr	r2, .L2804+36
+	movs	r5, #0
+	b	.L2846
+.L2854:
+	ldr	r2, .L2881+40
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2780
-.L2781:
+	cbnz	r2, .L2856
+.L2857:
 	ldr	r2, [r3, #8]
 	add	r10, r10, #1
 	ldr	r1, [sp, #4]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2775
-.L2780:
+	b	.L2851
+.L2856:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #12]
@@ -19424,76 +19777,85 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r2, [r3, #12]
 	cmp	r2, r1
-	bne	.L2781
+	bne	.L2857
 	adds	r1, r2, #1
-	beq	.L2781
+	beq	.L2857
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L2804+40
+	ldr	r2, .L2881+44
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L2804+44
+	ldr	r2, .L2881+48
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L2804+48
+	ldr	r2, .L2881+52
 	ldr	r1, [r8]
 	ldr	r0, [sp, #36]
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #12]
 	add	r7, r7, r1
 	lsl	ip, r2, #7
-.L2782:
+.L2858:
 	cmp	r6, ip
-	beq	.L2781
+	beq	.L2857
 	ldr	r1, [r7, #8]
 	ldr	r2, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r2
-	beq	.L2783
+	beq	.L2859
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L2804+52
+	ldr	r0, .L2881+56
 	bl	printf
-	b	.L2803
-.L2783:
+	b	.L2880
+.L2859:
 	adds	r6, r6, #1
-	b	.L2782
-.L2776:
+	b	.L2858
+.L2852:
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4]
-	ldr	r0, .L2804+56
+	ldr	r0, .L2881+60
 	bl	printf
-	ldr	r3, .L2804+60
+	ldr	r3, .L2881+64
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
-	cbnz	r3, .L2786
-	ldr	r3, .L2804+64
+	cbnz	r3, .L2862
+	ldr	r3, .L2881+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2787
-.L2786:
-	ldr	r3, .L2804+68
+	cbz	r3, .L2863
+.L2862:
+	ldr	r3, .L2881+72
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #159
-	bls	.L2788
-.L2787:
+	bls	.L2864
+.L2863:
 	ldr	r3, [r8]
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	bne	.L2789
-.L2788:
+	bne	.L2865
+.L2864:
 	ldr	r3, [r8]
 	add	r7, r7, r3
 	ldr	r3, [r7, #4]
 	str	r3, [sp, #8]
-	b	.L2789
-.L2805:
+.L2865:
+	ldr	r3, .L2881+32
+	movs	r1, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	b	.L2879
+.L2882:
 	.align	2
-.L2804:
-	.word	.LANCHOR238
+.L2881:
+	.word	.LANCHOR241
 	.word	.LANCHOR52
 	.word	.LANCHOR38
 	.word	.LANCHOR104
@@ -19502,12 +19864,13 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR58
 	.word	.LANCHOR72
 	.word	.LANCHOR83
-	.word	.LANCHOR1
+	.word	.LANCHOR205
+	.word	.LANCHOR2
 	.word	.LANCHOR187
 	.word	.LANCHOR189
 	.word	.LANCHOR55
-	.word	.LC63
-	.word	.LC64
+	.word	.LC68
+	.word	.LC69
 	.word	.LANCHOR28
 	.word	.LANCHOR15
 	.word	.LANCHOR78
@@ -19525,42 +19888,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2829
+	ldr	r3, .L2907
 	ldr	r3, [r3]
-	cbz	r3, .L2807
-.L2812:
+	cbz	r3, .L2884
+.L2889:
 	movs	r0, #0
-.L2806:
+.L2883:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2807:
-	ldr	r0, .L2829+4
+.L2884:
+	ldr	r0, .L2907+4
 	movw	r3, #65535
-	ldr	r5, .L2829+8
+	ldr	r5, .L2907+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2809
-	ldr	r3, .L2829+12
+	beq	.L2886
+	ldr	r3, .L2907+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2809
-	ldr	r3, .L2829+16
+	beq	.L2886
+	ldr	r3, .L2907+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2810
+	bls	.L2887
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2810:
+.L2887:
 	ldr	r3, [r5]
-	cbnz	r3, .L2811
-	ldr	r2, .L2829+20
+	cbnz	r3, .L2888
+	ldr	r2, .L2907+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19568,73 +19931,72 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2811:
+.L2888:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2806
-.L2809:
+	b	.L2883
+.L2886:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2812
-	ldr	r6, .L2829+12
+	beq	.L2889
+	ldr	r6, .L2907+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2829+24
+	ldr	r5, .L2907+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2813
-	ldr	r1, .L2829+28
+	beq	.L2890
+	ldr	r1, .L2907+28
 	movs	r2, #163
-	ldr	r0, .L2829+32
+	ldr	r0, .L2907+32
 	bl	printf
-	ldr	r1, .L2829+36
-	ldr	r0, .L2829+40
+	ldr	r1, .L2907+36
+	ldr	r0, .L2907+40
 	bl	printf
-.L2813:
+.L2890:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2829+44
+	ldr	r2, .L2907+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2829+84
+	ldr	fp, .L2907+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
-	str	r2, [sp, #4]
+	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2829+48
+	ldr	r1, .L2907+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2814:
+.L2891:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2818
+	bhi	.L2895
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2829+52
+	ldr	r3, .L2907+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2819
+	cbz	r3, .L2896
 	ldrh	r1, [r4]
-	ldr	r0, .L2829+56
+	ldr	r0, .L2907+56
 	bl	printf
-.L2819:
-	ldr	r3, [sp, #4]
+.L2896:
 	ldrh	r0, [r4]
-	ldr	r3, [r3]
+	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2820
+	beq	.L2897
 	bl	INSERT_DATA_LIST
-.L2821:
-	ldr	r3, .L2829+60
+.L2898:
+	ldr	r3, .L2907+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -19642,72 +20004,68 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2829+64
+	ldr	r3, .L2907+64
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2829+68
+	ldr	r3, .L2907+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2829+72
+	ldr	r3, .L2907+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2812
-	ldr	r3, .L2829+76
+	ble	.L2889
+	ldr	r3, .L2907+76
 	movs	r2, #20
 	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L2806
-.L2818:
+	b	.L2883
+.L2895:
 	uxth	r3, r6
-	movs	r7, #12
+	mov	r8, #12
 	ldr	r2, [fp]
-	muls	r7, r3, r7
-	ldr	r3, .L2829+80
-	ldr	r8, [r3]
-	add	r10, r8, r7
-	ldr	r1, [r10, #8]
-	cmp	r1, r2
-	bcc	.L2815
-	ldr	r1, .L2829+28
-	movs	r2, #168
-	ldr	r0, .L2829+32
-	bl	printf
-	ldr	r1, .L2829+36
-	ldr	r0, .L2829+40
-	bl	printf
-.L2815:
+	mul	r8, r8, r3
+	ldr	r3, .L2907+80
+	ldr	r3, [r3]
+	add	r7, r3, r8
+	ldr	r0, [r7, #8]
+	cmp	r0, r2
+	bcc	.L2892
+.L2905:
+	ldrh	r0, [r4]
+	b	.L2906
+.L2892:
 	movs	r2, #0
 	add	r1, sp, #12
-	ldr	r0, [r10, #8]
+	str	r3, [sp, #4]
 	bl	log2phys
+	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #12]
-	ldr	r0, [r8, r7]
+	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L2816
+	bne	.L2894
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
-	mov	r7, r0
-	add	r1, r10, #4
-	ldr	r0, [r10, #8]
+	mov	r8, r0
+	adds	r1, r7, #4
+	ldr	r0, [r7, #8]
 	bl	log2phys
-	mov	r0, r7
-.L2828:
+	mov	r0, r8
+.L2906:
 	bl	decrement_vpc_count
-.L2817:
-	adds	r6, r6, #1
-	b	.L2814
-.L2816:
-	ldr	r3, [r10, #4]
+	b	.L2893
+.L2894:
+	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	beq	.L2817
-	ldrh	r0, [r4]
-	b	.L2828
-.L2820:
+	bne	.L2905
+.L2893:
+	adds	r6, r6, #1
+	b	.L2891
+.L2897:
 	bl	INSERT_FREE_LIST
-	b	.L2821
-.L2830:
+	b	.L2898
+.L2908:
 	.align	2
-.L2829:
+.L2907:
 	.word	.LANCHOR76
 	.word	.LANCHOR93
 	.word	.LANCHOR135
@@ -19715,18 +20073,18 @@ FtlGcFreeTempBlock:
 	.word	.LANCHOR78
 	.word	.LANCHOR138
 	.word	.LANCHOR110
-	.word	.LANCHOR239
+	.word	.LANCHOR242
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR83
 	.word	.LANCHOR161
 	.word	.LANCHOR15
-	.word	.LC65
+	.word	.LC70
 	.word	.LANCHOR109
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR88
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR176
 	.word	.LANCHOR111
 	.word	.LANCHOR72
@@ -19744,35 +20102,35 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L2834
+	ldr	r4, .L2912
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L2832
+	beq	.L2910
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2833
-.L2832:
+	cbnz	r3, .L2911
+.L2910:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2834
+	ldr	r0, .L2912
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L2834+4
+	ldr	r3, .L2912+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2834+8
+	ldr	r3, .L2912+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2833:
-	ldr	r0, .L2834
+.L2911:
+	ldr	r0, .L2912
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L2835:
+.L2913:
 	.align	2
-.L2834:
+.L2912:
 	.word	.LANCHOR93
 	.word	.LANCHOR109
 	.word	.LANCHOR110
@@ -19789,26 +20147,26 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2851
+	ldr	r3, .L2929
 	ldr	r3, [r3]
-	cbz	r3, .L2837
-.L2840:
+	cbz	r3, .L2915
+.L2918:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2837:
-	ldr	r3, .L2851+4
-	ldr	r5, .L2851+8
+.L2915:
+	ldr	r3, .L2929+4
+	ldr	r5, .L2929+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2839
+	cbz	r3, .L2917
 	ldr	r3, [r5]
 	lsls	r2, r3, #31
-	bpl	.L2839
-	ldr	r3, .L2851+12
+	bpl	.L2917
+	ldr	r3, .L2929+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2840
-.L2839:
-	ldr	r4, .L2851+16
+	bne	.L2918
+.L2917:
+	ldr	r4, .L2929+16
 	movs	r3, #0
 	movs	r6, #0
 	movs	r7, #36
@@ -19816,38 +20174,39 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2841:
+.L2919:
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2843
+	bcc	.L2921
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2851+12
+	ldr	r3, .L2929+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2840
+	bne	.L2918
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2850
-.L2843:
+	b	.L2928
+.L2921:
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
+	ldr	r0, [r1, #12]
 	adds	r3, r2, #1
-	bne	.L2842
-	ldr	r3, .L2851+12
+	bne	.L2920
+	ldr	r3, .L2929+12
 	movs	r5, #0
-	ldr	r0, .L2851+20
+	ldr	r0, .L2929+20
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2851+24
+	ldr	r2, .L2929+24
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19856,19 +20215,18 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2850:
+.L2928:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2842:
-	ldr	r3, [r1, #12]
+.L2920:
+	ldr	r2, [r0, #8]
 	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
+	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L2841
-.L2852:
+	b	.L2919
+.L2930:
 	.align	2
-.L2851:
+.L2929:
 	.word	.LANCHOR76
 	.word	.LANCHOR15
 	.word	.LANCHOR102
@@ -19889,27 +20247,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2855
-	ldr	r5, .L2855+4
+	ldr	r4, .L2933
+	ldr	r5, .L2933+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2853
-	ldr	r0, .L2855+8
+	bcc	.L2931
+	ldr	r0, .L2933+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2855+12
+	ldr	r3, .L2933+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2853:
+.L2931:
 	pop	{r3, r4, r5, pc}
-.L2856:
+.L2934:
 	.align	2
-.L2855:
+.L2933:
 	.word	.LANCHOR52
 	.word	.LANCHOR93
 	.word	.LANCHOR127
@@ -19928,13 +20286,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2858
-	ldr	r3, .L2858+4
+	ldr	r5, .L2936
+	ldr	r3, .L2936+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2858+8
+	ldr	r5, .L2936+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -19945,11 +20303,11 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2859:
+.L2937:
 	.align	2
-.L2858:
+.L2936:
 	.word	.LANCHOR91
-	.word	.LANCHOR236
+	.word	.LANCHOR239
 	.word	.LANCHOR92
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
@@ -19965,30 +20323,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2869
+	ldr	r4, .L2951
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2869+4
+	ldr	r3, .L2951+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2869+8
+	ldr	r3, .L2951+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2869+12
+	ldr	r3, .L2951+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2861
-.L2863:
+	bne	.L2939
+.L2941:
 	mov	r4, #-1
-.L2860:
+.L2938:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2861:
+.L2939:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2863
+	bne	.L2941
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -19998,34 +20356,42 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2869+16
+	ldr	r3, .L2951+16
 	movs	r0, #12
-	ldrh	r2, [r3]
-	ldr	r3, .L2869+20
-	ldr	r1, [r3]
+	ldrh	r1, [r3]
+	ldr	r3, .L2951+20
+	ldr	r2, [r3]
 	mov	r3, r4
-.L2864:
-	cmp	r3, r2
-	blt	.L2866
-	ldrh	r3, [r5]
-	cmp	r3, #0
-	beq	.L2867
-.L2865:
-	ldr	r3, .L2869+24
+.L2942:
+	cmp	r3, r1
+	bge	.L2947
+	mla	r6, r0, r3, r2
+	ldr	r6, [r6, #4]
+	cmp	r6, #0
+	bge	.L2943
+.L2947:
+	ldr	r0, .L2951+24
+	cmp	r3, r1
+	ldr	r2, [r0]
+	add	r2, r2, #32
+	str	r2, [r0]
+	bge	.L2949
+.L2944:
+	ldr	r3, .L2951+28
 	ldr	r1, [r3]
-	ldr	r3, .L2869+28
+	ldr	r3, .L2951+32
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2869+32
+	ldr	r5, .L2951+36
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2869+36
+	ldr	r3, .L2951+40
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
@@ -20034,35 +20400,35 @@ FtlSysBlkInit:
 	strb	r2, [r3, #6]
 	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L2869+40
+	ldr	r2, .L2951+44
 	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2868:
+.L2950:
 	bl	FtlVpcTblFlush
-	b	.L2860
-.L2866:
-	mla	r6, r0, r3, r1
-	ldr	r6, [r6, #4]
-	cmp	r6, #0
-	blt	.L2865
+	b	.L2938
+.L2943:
 	adds	r3, r3, #1
-	b	.L2864
-.L2867:
+	b	.L2942
+.L2949:
+	ldrh	r3, [r5]
+	cmp	r3, #0
+	bne	.L2944
 	bl	l2p_flush
-	b	.L2868
-.L2870:
+	b	.L2950
+.L2952:
 	.align	2
-.L2869:
-	.word	.LANCHOR235
-	.word	.LANCHOR234
+.L2951:
+	.word	.LANCHOR238
+	.word	.LANCHOR237
 	.word	.LANCHOR39
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.word	.LANCHOR67
 	.word	.LANCHOR96
+	.word	.LANCHOR160
 	.word	.LANCHOR83
 	.word	.LANCHOR91
 	.word	.LANCHOR52
@@ -20080,87 +20446,87 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2902
+	ldr	r3, .L2984
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2873
-	ldr	r5, .L2902+4
+	bne	.L2955
+	ldr	r5, .L2984+4
 	mov	r1, r4
-	ldr	r3, .L2902+8
-	ldr	r6, .L2902+12
+	ldr	r3, .L2984+8
+	ldr	r6, .L2984+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2902+16
-	ldr	r5, .L2902+20
+	ldr	r3, .L2984+16
+	ldr	r5, .L2984+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2902+24
+	ldr	r3, .L2984+24
 	ldrh	r0, [r6]
 	str	r4, [r5]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2874
+	cbz	r0, .L2956
 	bl	FtlMakeBbt
-.L2874:
-	ldr	r3, .L2902+28
-	ldr	r2, .L2902+32
-	ldr	ip, .L2902+112
+.L2956:
+	ldr	r3, .L2984+28
+	ldr	r2, .L2984+32
+	ldr	ip, .L2984+112
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2902+36
+	ldr	r2, .L2984+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L2875:
+.L2957:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2876
-	ldr	r3, .L2902+40
+	blt	.L2958
+	ldr	r3, .L2984+40
 	movs	r7, #0
-	ldr	fp, .L2902+116
+	ldr	fp, .L2984+116
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
-.L2877:
+.L2959:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2878
-	ldr	r4, .L2902+44
+	bhi	.L2960
+	ldr	r4, .L2984+44
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2879
-.L2883:
+	bgt	.L2961
+.L2965:
 	movs	r7, #0
 	mov	r6, r7
-.L2880:
+.L2962:
 	ldrh	r3, [r8]
 	uxth	r0, r7
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2884
+	bhi	.L2966
 	ldrh	r2, [r10]
-	ldr	r3, .L2902+48
+	ldr	r3, .L2984+48
 	ldrh	r4, [r4]
-	ldr	r7, .L2902+52
+	ldr	r7, .L2984+52
 	str	r2, [r3]
-	ldr	r3, .L2902+56
+	ldr	r3, .L2984+56
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2902+60
+	ldr	r1, .L2984+60
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -20171,7 +20537,7 @@ FtlLowFormat:
 	str	r3, [sp, #4]
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2885
+	ble	.L2967
 	ldr	r3, [sp, #16]
 	mov	r1, r4
 	subs	r0, r3, r6
@@ -20181,12 +20547,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2885:
-	ldr	r3, .L2902+64
+.L2967:
+	ldr	r3, .L2984+64
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2886
-	ldr	r2, .L2902+60
+	bne	.L2968
+	ldr	r2, .L2984+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20198,11 +20564,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2886:
-	ldr	r3, .L2902+68
+.L2968:
+	ldr	r3, .L2984+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2887
-	ldr	r2, .L2902+60
+	cbz	r3, .L2969
+	ldr	r2, .L2984+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20214,55 +20580,55 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2887:
-	ldr	r3, .L2902+72
+.L2969:
+	ldr	r3, .L2984+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2889
-	ldr	r2, .L2902+60
+	cbz	r3, .L2971
+	ldr	r2, .L2984+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2889
+	bge	.L2971
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #32
 	str	fp, [r7]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2889:
+.L2971:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2902+76
+	ldr	r6, .L2984+76
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2902+80
+	ldr	r3, .L2984+80
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2902+84
+	ldr	r7, .L2984+84
 	muls	r4, r3, r4
-	ldr	r3, .L2902+88
+	ldr	r3, .L2984+88
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2902+120
+	ldr	r10, .L2984+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2902+92
+	ldr	r2, .L2984+92
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2902+96
+	ldr	r2, .L2984+96
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -20273,30 +20639,30 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2902+100
+	ldr	r3, .L2984+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2891:
+.L2973:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2892
+	bne	.L2974
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2891
-.L2876:
+	b	.L2973
+.L2958:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L2875
-.L2878:
+	b	.L2957
+.L2960:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -20304,11 +20670,11 @@ FtlLowFormat:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L2877
-.L2879:
+	b	.L2959
+.L2961:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2902+104
+	ldr	r3, .L2984+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -20316,26 +20682,26 @@ FtlLowFormat:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L2881:
+.L2963:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2883
+	bls	.L2965
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L2881
-.L2884:
+	b	.L2963
+.L2966:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2880
-.L2892:
+	b	.L2962
+.L2974:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2902+108
+	ldr	r4, .L2984+108
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -20351,22 +20717,22 @@ FtlLowFormat:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2893:
+.L2975:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2894
+	bne	.L2976
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2893
-.L2903:
+	b	.L2975
+.L2985:
 	.align	2
-.L2902:
+.L2984:
 	.word	.LANCHOR76
 	.word	.LANCHOR66
 	.word	.LANCHOR195
@@ -20382,23 +20748,23 @@ FtlLowFormat:
 	.word	.LANCHOR73
 	.word	.LANCHOR72
 	.word	.LANCHOR42
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR28
 	.word	.LANCHOR15
 	.word	.LANCHOR49
-	.word	.LANCHOR222
+	.word	.LANCHOR223
 	.word	.LANCHOR52
 	.word	.LANCHOR91
 	.word	.LANCHOR68
 	.word	.LANCHOR100
-	.word	.LANCHOR204
-	.word	.LANCHOR0
+	.word	.LANCHOR205
+	.word	.LANCHOR1
 	.word	.LANCHOR65
 	.word	.LANCHOR92
 	.word	168778952
 	.word	.LANCHOR41
 	.word	.LANCHOR83
-.L2894:
+.L2976:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -20407,10 +20773,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2904
+	ldr	r3, .L2986
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2904+4
+	ldr	r3, .L2986+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -20423,21 +20789,21 @@ FtlLowFormat:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2873
-	ldr	r3, .L2904+8
+	cbnz	r0, .L2955
+	ldr	r3, .L2986+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2873:
+.L2955:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2905:
+.L2987:
 	.align	2
-.L2904:
+.L2986:
 	.word	.LANCHOR93
-	.word	.LANCHOR209
-	.word	.LANCHOR230
+	.word	.LANCHOR210
+	.word	.LANCHOR232
 	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -20450,34 +20816,34 @@ FtlLowFormat:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2996
+	ldr	r3, .L3087
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
+	sub	sp, sp, #32
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2958
-	ldr	r3, .L2996+4
+	bne	.L3047
+	ldr	r3, .L3087+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2958
-	ldr	r2, .L2996+8
+	bne	.L3047
+	ldr	r2, .L3087+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2960
-	ldr	r5, .L2996+12
+	bls	.L3049
+	ldr	r5, .L3087+12
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L2908
-	ldr	r7, .L2996+16
+	beq	.L2990
+	ldr	r7, .L3087+16
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L2908
-	ldr	r1, .L2996+20
+	bne	.L2990
+	ldr	r1, .L3087+20
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L2908
-	ldr	r2, .L2996+24
+	beq	.L2990
+	ldr	r2, .L3087+24
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20485,164 +20851,172 @@ rk_ftl_garbage_collect:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L2908:
+.L2990:
 	cmp	r0, #0
-	bne	.L2961
-	ldr	r3, .L2996+28
+	bne	.L3050
+	ldr	r3, .L3087+28
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2962
-	ldr	r2, .L2996+32
+	bhi	.L3051
+	ldr	r2, .L3087+32
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L2911
+	bls	.L2993
 	lsrs	r4, r4, #5
-.L2910:
-	ldr	r2, .L2996+36
+.L2992:
+	ldr	r2, .L3087+36
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2914
-	ldr	r3, .L2996+40
+	bcs	.L2996
+	ldr	r3, .L3087+40
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2915
-	ldr	r0, .L2996+16
+	bne	.L2997
+	ldr	r0, .L3087+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2915
-	ldr	r3, .L2996+44
+	bne	.L2997
+	ldr	r3, .L3087+44
 	ldrh	r0, [r3]
-	cbnz	r0, .L2916
-	ldr	r3, .L2996+48
-	ldr	r4, .L2996+52
+	cbnz	r0, .L2998
+	ldr	r3, .L3087+48
+	ldr	r4, .L3087+52
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2917
-.L2916:
-	ldr	r3, .L2996+56
+	bcs	.L2999
+.L2998:
+	ldr	r3, .L3087+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2918:
-	ldr	r3, .L2996+60
+.L3000:
+	ldr	r3, .L3087+60
 	movs	r2, #0
 	str	r2, [r3]
-.L2906:
-	add	sp, sp, #40
+.L2988:
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2911:
+.L2993:
 	cmp	r3, #12
-	bls	.L2912
+	bls	.L2994
 	lsrs	r4, r4, #4
-	b	.L2910
-.L2912:
+	b	.L2992
+.L2994:
 	cmp	r3, #8
-	bls	.L2910
+	bls	.L2992
 	lsrs	r4, r4, #2
-	b	.L2910
-.L2962:
+	b	.L2992
+.L3051:
 	movs	r4, #1
-	b	.L2910
-.L2917:
+	b	.L2992
+.L2999:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2918
-.L2915:
-	ldr	r3, .L2996+56
+	b	.L3000
+.L2997:
+	ldr	r3, .L3087+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2914:
-	ldr	r3, .L2996+64
+.L2996:
+	ldr	r3, .L3087+64
 	ldrh	r3, [r3]
-	cbz	r3, .L2909
+	cbz	r3, .L2991
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L2909:
-	ldr	r5, .L2996+68
+.L2991:
+	ldr	r5, .L3087+68
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2921
-	ldr	r3, .L2996+16
+	bne	.L3003
+	ldr	r3, .L3087+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2922
-	ldr	r0, .L2996+72
+	beq	.L3004
+	ldr	r0, .L3087+72
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2923
+	cbnz	r1, .L3005
 	strh	r2, [r3]	@ movhi
-.L2923:
+.L3005:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2922:
+.L3004:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L2921
+	beq	.L3003
 	bl	IsBlkInGcList
-	cbz	r0, .L2925
+	cbz	r0, .L3007
 	strh	r6, [r5]	@ movhi
-.L2925:
-	ldr	r3, .L2996+76
+.L3007:
+	ldr	r3, .L3087+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2926
+	cbz	r3, .L3008
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L2926:
+.L3008:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2921
-	ldr	r0, .L2996+68
+	beq	.L3003
+	ldr	r0, .L3087+68
 	bl	make_superblock
-	ldr	r2, .L2996+80
+	ldr	r2, .L3087+80
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2996+72
+	ldr	r3, .L3087+72
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2996+84
+	ldr	r3, .L3087+84
 	strh	r2, [r3]	@ movhi
-.L2921:
-	ldr	r2, .L2996+88
+.L3003:
+	ldr	r2, .L3087+88
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2927
-	ldr	r2, .L2996+92
+	beq	.L3009
+	ldr	r2, .L3087+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2927
-	ldr	r5, .L2996+68
+	beq	.L3009
+	ldr	r2, .L3087+40
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L3010
+.L3009:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L3010:
+	ldr	r5, .L3087+68
 	mov	r6, r5
-.L2928:
+.L3046:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2929
-	ldr	r10, .L2996+100
+	bne	.L3011
+	ldr	r10, .L3087+100
 	movs	r2, #0
-	ldr	r3, .L2996+60
+	ldr	r3, .L3087+60
 	mov	r7, r10
 	str	r2, [r3]
-.L2930:
+.L3012:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -20650,36 +21024,29 @@ rk_ftl_garbage_collect:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L2931
+	bne	.L3013
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L2906
-.L2961:
+	b	.L2988
+.L3050:
 	movs	r4, #1
-	b	.L2909
-.L2927:
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L2994:
-	ldr	r3, .L2996+44
-	ldrh	r0, [r3]
-	b	.L2906
-.L2931:
-	str	r0, [sp, #8]
+	b	.L2991
+.L3013:
+	str	r0, [sp]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
-	ldr	r2, [sp, #8]
-	cbz	r0, .L2932
+	ldr	r2, [sp]
+	cbz	r0, .L3014
 	strh	r3, [r10]	@ movhi
-	b	.L2930
-.L2932:
-	ldr	r1, .L2996+32
+	b	.L3012
+.L3014:
+	ldr	r1, .L3087+32
 	uxth	r3, r3
-	ldr	lr, .L2996+104
+	ldr	lr, .L3087+104
 	uxth	r2, r2
-	ldr	r8, .L2996+72
+	ldr	r8, .L3087+72
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -20687,42 +21054,45 @@ rk_ftl_garbage_collect:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2934
+	bgt	.L3016
 	cmp	r3, #48
-	bls	.L2935
+	bls	.L3017
 	cmp	ip, #8
-	bls	.L2935
-	ldr	r3, .L2996+96
+	bls	.L3017
+	ldr	r3, .L3087+96
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2935
-.L2934:
+	bhi	.L3017
+.L3016:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2935:
+.L3017:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2936
+	bgt	.L3018
 	ldrh	r2, [r7]
 	cmp	r2, #3
-	bhi	.L2936
+	bhi	.L3018
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2994
-.L2936:
+.L3086:
+	ldr	r3, .L3087+44
+	ldrh	r0, [r3]
+	b	.L2988
+.L3018:
 	cmp	r3, #0
-	bne	.L2937
+	bne	.L3019
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2930
-.L2997:
+	b	.L3012
+.L3088:
 	.align	2
-.L2996:
+.L3087:
 	.word	.LANCHOR76
 	.word	.LANCHOR171
 	.word	.LANCHOR85
@@ -20734,102 +21104,102 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR176
 	.word	.LANCHOR93
-	.word	.LANCHOR240
+	.word	.LANCHOR243
 	.word	.LANCHOR72
 	.word	.LANCHOR100
-	.word	.LANCHOR223
+	.word	.LANCHOR224
 	.word	.LANCHOR172
 	.word	.LANCHOR116
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR83
 	.word	.LANCHOR15
-	.word	.LANCHOR241
-	.word	.LANCHOR242
+	.word	.LANCHOR244
+	.word	.LANCHOR245
 	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR109
 	.word	.LANCHOR178
 	.word	.LANCHOR38
-.L2937:
+.L3019:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L2998
+	ldr	r3, .L3089
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2938
+	cbz	r3, .L3020
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L2938:
-	ldr	r3, .L2998+4
+.L3020:
+	ldr	r3, .L3089+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2939
-	ldr	r1, .L2998+8
-	movw	r2, #893
-	ldr	r0, .L2998+12
+	bne	.L3021
+	ldr	r1, .L3089+8
+	movw	r2, #902
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2939:
-	ldr	r3, .L2998+24
+.L3021:
+	ldr	r3, .L3089+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2940
-	ldr	r1, .L2998+8
-	movw	r2, #894
-	ldr	r0, .L2998+12
+	bne	.L3022
+	ldr	r1, .L3089+8
+	movw	r2, #903
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2940:
-	ldr	r3, .L2998+28
+.L3022:
+	ldr	r3, .L3089+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2941
-	ldr	r1, .L2998+8
-	movw	r2, #895
-	ldr	r0, .L2998+12
+	bne	.L3023
+	ldr	r1, .L3089+8
+	mov	r2, #904
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2941:
+.L3023:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L2998+32
+	ldr	r2, .L3089+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2998+36
+	ldr	r2, .L3089+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L2929:
-	ldr	r3, .L2998+40
+.L3011:
+	ldr	r3, .L3089+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2998+44
+	ldr	r3, .L3089+44
 	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L2998
+	str	r3, [sp, #4]
+	ldr	r3, .L3089
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2942
+	cbz	r3, .L3024
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L2998+48
+	ldreq	r3, .L3089+48
 	ldrheq	r3, [r3]
-	streq	r3, [sp, #12]
-.L2942:
+	streq	r3, [sp, #4]
+.L3024:
 	ldrh	r3, [r6, #2]
-	ldr	r1, [sp, #12]
-	ldr	fp, .L2998+84
+	ldr	r1, [sp, #4]
+	ldr	fp, .L3089+76
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -20838,99 +21208,99 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-	str	r3, [sp, #20]
-.L2944:
-	ldrh	r3, [sp, #20]
+	str	r3, [sp, #12]
+.L3026:
+	ldrh	r3, [sp, #12]
 	cmp	r4, r3
-	bls	.L2952
-	ldr	r3, .L2998+52
+	bls	.L3034
+	ldr	r3, .L3089+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
 	ldr	r0, [fp]
 	ldrh	r7, [r3]
-	ldr	r3, [sp, #20]
+	ldr	r3, [sp, #12]
 	add	lr, lr, r3
-	ldr	r3, .L2998+56
-	str	r3, [sp, #16]
-	movs	r3, #0
+	ldr	r3, .L3089+56
 	str	r3, [sp, #8]
-	b	.L2953
-.L2946:
-	ldr	r1, [sp, #16]
+	movs	r3, #0
+	str	r3, [sp]
+	b	.L3035
+.L3028:
+	ldr	r1, [sp, #8]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
-	str	r1, [sp, #16]
-	beq	.L2945
-	ldr	r1, [sp, #8]
+	str	r1, [sp, #8]
+	beq	.L3027
+	ldr	r1, [sp]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
 	str	r2, [ip, #4]
 	mov	r2, r1
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp, #8]
-.L2945:
+	str	r2, [sp]
+.L3027:
 	adds	r3, r3, #1
-.L2953:
+.L3035:
 	uxth	r2, r3
-	cmp	r2, r7
-	bcc	.L2946
+	cmp	r7, r2
+	bhi	.L3028
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #8]
+	ldr	r1, [sp]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2993:
-	str	r3, [sp, #16]
-	ldr	r2, [sp, #8]
-	ldrh	r3, [sp, #16]
+.L3085:
+	str	r3, [sp, #8]
+	ldr	r2, [sp]
+	ldrh	r3, [sp, #8]
 	cmp	r2, r3
-	bhi	.L2951
-	ldr	r3, [sp, #20]
+	bhi	.L3033
+	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
-	str	r3, [sp, #20]
-	b	.L2944
-.L2951:
-	ldr	r3, [sp, #16]
+	str	r3, [sp, #12]
+	b	.L3026
+.L3033:
+	ldr	r3, [sp, #8]
 	movs	r7, #36
 	muls	r7, r3, r7
 	ldr	r3, [fp]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2948
+	beq	.L3030
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L2948
+	bne	.L3030
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L2949
-	ldr	r1, .L2998+8
-	movw	r2, #934
-	ldr	r0, .L2998+12
+	bne	.L3031
+	ldr	r1, .L3089+8
+	movw	r2, #943
+	ldr	r0, .L3089+12
 	bl	printf
-	ldr	r1, .L2998+16
-	ldr	r0, .L2998+20
+	ldr	r1, .L3089+16
+	ldr	r0, .L3089+20
 	bl	printf
-.L2949:
+.L3031:
 	movs	r2, #0
-	add	r1, sp, #36
+	add	r1, sp, #24
 	mov	r0, r10
 	bl	log2phys
 	ldr	r0, [fp]
-	ldr	r3, [sp, #36]
+	ldr	r3, [sp, #24]
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2948
-	ldr	r2, .L2998+32
-	ldr	r1, .L2998+60
-	ldr	r10, .L2998+68
+	bne	.L3030
+	ldr	r2, .L3089+32
+	ldr	r1, .L3089+60
+	ldr	r10, .L3089+72
 	ldrh	r3, [r2]
-	str	r1, [sp, #28]
+	str	r1, [sp, #20]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r1]
@@ -20939,10 +21309,10 @@ rk_ftl_garbage_collect:
 	mla	r3, r1, r3, r2
 	ldr	r2, [r0, #16]
 	str	r2, [r3, #16]
-	str	r3, [sp, #24]
+	str	r3, [sp, #16]
 	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #24]
-	ldr	r1, [sp, #28]
+	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #20]
 	str	r0, [r3, #4]
 	ldr	r2, [r1]
 	movs	r1, #36
@@ -20950,130 +21320,160 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L2998+28
+	ldr	r7, .L3089+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
 	ldr	r1, [r0, #12]
 	str	r1, [r2, #12]
 	movs	r1, #1
-	ldr	r2, [sp, #36]
+	ldr	r2, [sp, #24]
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2998+64
+	ldr	r2, .L3089+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2998
+	ldr	r3, .L3089
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2950
+	cbnz	r3, .L3032
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L2950
+	beq	.L3032
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2948
-.L2950:
+	cbnz	r3, .L3030
+.L3032:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2948
-.L2995:
-	ldr	r3, .L2998+40
+	cbz	r0, .L3030
+	ldr	r3, .L3089+40
 	movs	r2, #0
+	movw	r1, #65535
 	str	r2, [r3]
-	b	.L2994
-.L2948:
-	ldr	r3, [sp, #16]
+	ldr	r3, .L3089+68
+	strh	r1, [r3]	@ movhi
+	strh	r2, [r3, #2]	@ movhi
+	b	.L3086
+.L3030:
+	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L2993
-.L2952:
+	b	.L3085
+.L3034:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #4]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L2954
-	ldr	r3, .L2998+68
+	bhi	.L3036
+	ldr	r3, .L3089+72
 	ldr	r3, [r3]
-	cbz	r3, .L2955
+	cbz	r3, .L3037
 	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	bne	.L2995
-.L2955:
-	ldr	r3, .L2998+32
-	ldrh	r4, [r3]
-	cbnz	r4, .L2956
-	ldr	r7, .L2998+72
-	ldrh	r1, [r5]
-	ldr	r3, [r7]
-	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L2956
-	ldr	r0, .L2998+36
-	ldrh	r2, [r5, #2]
-	ldrh	r0, [r0]
-	str	r3, [sp]
-	mov	r3, r4
-	str	r0, [sp, #4]
-	ldr	r0, .L2998+76
-	bl	printf
-	ldrh	r2, [r5]
-	ldr	r3, [r7]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L2956:
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L2954:
-	ldr	r3, .L2998+80
-	ldrh	r0, [r3]
-	cmp	r0, #2
-	bhi	.L2957
-	ldr	r3, .L2998+44
-	ldrh	r4, [r3]
-	b	.L2928
-.L2957:
-	ldr	r3, .L2998+40
+	cbz	r0, .L3037
+	ldr	r3, .L3089+40
 	movs	r2, #0
-	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L2906
-.L2999:
+	b	.L3086
+.L3090:
 	.align	2
-.L2998:
+.L3089:
 	.word	.LANCHOR15
 	.word	.LANCHOR91
-	.word	.LANCHOR243
+	.word	.LANCHOR246
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR241
-	.word	.LANCHOR242
+	.word	.LANCHOR244
+	.word	.LANCHOR245
 	.word	.LANCHOR171
 	.word	.LANCHOR52
 	.word	.LANCHOR53
 	.word	.LANCHOR38
-	.word	.LANCHOR204+14
+	.word	.LANCHOR205+14
 	.word	.LANCHOR181
 	.word	.LANCHOR160
+	.word	.LANCHOR205
 	.word	.LANCHOR102
-	.word	.LANCHOR83
-	.word	.LC66
-	.word	.LANCHOR88
 	.word	.LANCHOR106
-.L2958:
+.L3037:
+	ldr	r3, .L3091
+	ldrh	r7, [r3]
+	cbnz	r7, .L3038
+	ldr	r8, .L3091+20
+	ldrh	r2, [r5]
+	ldr	r3, [r8]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbz	r3, .L3038
+	ldr	r4, .L3091+4
+.L3039:
+	ldr	r3, [r4]
+	cmp	r7, r3
+	bcs	.L3044
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r7
+	bl	log2phys
+	ldr	r0, [sp, #28]
+	adds	r3, r0, #1
+	beq	.L3040
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5]
+	cmp	r3, r0
+	bne	.L3040
+.L3044:
+	ldr	r3, [r4]
+	cmp	r7, r3
+	bcc	.L3038
+	ldrh	r2, [r5]
+	movs	r1, #0
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L3038:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L3036:
+	ldr	r3, .L3091+8
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L3045
+	ldr	r3, .L3091+12
+	ldrh	r4, [r3]
+	b	.L3046
+.L3040:
+	adds	r7, r7, #1
+	b	.L3039
+.L3045:
+	ldr	r3, .L3091+16
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3]
+	b	.L2988
+.L3047:
 	movs	r0, #0
-	b	.L2906
-.L2960:
+	b	.L2988
+.L3049:
 	mov	r0, r3
-	b	.L2906
+	b	.L2988
+.L3092:
+	.align	2
+.L3091:
+	.word	.LANCHOR244
+	.word	.LANCHOR72
+	.word	.LANCHOR88
+	.word	.LANCHOR52
+	.word	.LANCHOR171
+	.word	.LANCHOR83
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -21086,70 +21486,91 @@ rk_ftl_garbage_collect:
 FtlInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
-	ldr	r4, .L3009
-	mov	r5, r0
-	ldr	r2, .L3009+4
-	str	r3, [r4]
+	ldr	r5, .L3103
+	mov	r4, r0
+	ldr	r2, .L3103+4
+	str	r3, [r5]
 	movs	r3, #0
-	ldr	r1, .L3009+8
+	ldr	r1, .L3103+8
 	str	r3, [r2]
-	ldr	r2, .L3009+12
-	ldr	r0, .L3009+16
+	ldr	r2, .L3103+12
+	ldr	r0, .L3103+16
 	str	r3, [r2]
 	bl	printf
-	mov	r0, r5
+	mov	r0, r4
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L3009+20
+	ldr	r3, .L3103+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L3001
-	ldr	r1, .L3009+24
-	ldr	r0, .L3009+28
-.L3008:
+	cbz	r0, .L3094
+	ldr	r1, .L3103+24
+	ldr	r0, .L3103+28
+.L3102:
 	bl	printf
-.L3002:
+.L3095:
 	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L3001:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L3094:
 	bl	FtlSysBlkInit
-	cbz	r0, .L3003
-	ldr	r1, .L3009+24
-	ldr	r0, .L3009+32
-	b	.L3008
-.L3003:
+	mov	r4, r0
+	cbz	r0, .L3096
+	ldr	r1, .L3103+24
+	ldr	r0, .L3103+32
+	b	.L3102
+.L3096:
 	movs	r1, #1
-	str	r1, [r4]
+	str	r1, [r5]
+	ldr	r5, .L3103+36
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L3009+36
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L3002
-	mov	r4, #1024
-.L3005:
+	ldrh	r6, [r5]
+	cmp	r6, #15
+	bhi	.L3095
+	ldr	r7, .L3103+40
+	ldr	r8, .L3103+44
+.L3100:
+	ldrh	r3, [r7]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L3098
+	ldrh	r2, [r8]
+	cmp	r2, r3
+	bne	.L3098
+	and	r0, r4, #7
+	bl	List_get_gc_head_node
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.L3098:
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L3005
-	b	.L3002
-.L3010:
+	ldrh	r2, [r5]
+	adds	r3, r6, #2
+	cmp	r2, r3
+	bhi	.L3095
+	adds	r4, r4, #1
+	cmp	r4, #1024
+	bne	.L3100
+	b	.L3095
+.L3104:
 	.align	2
-.L3009:
-	.word	.LANCHOR230
-	.word	.LANCHOR244
-	.word	.LC67
+.L3103:
+	.word	.LANCHOR232
+	.word	.LANCHOR247
+	.word	.LC71
 	.word	.LANCHOR76
 	.word	.LC7
 	.word	.LANCHOR39
-	.word	.LANCHOR245
-	.word	.LC68
-	.word	.LC69
+	.word	.LANCHOR248
+	.word	.LC72
+	.word	.LC73
 	.word	.LANCHOR88
+	.word	.LANCHOR205
+	.word	.LANCHOR112
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
@@ -21165,21 +21586,21 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L3012
-	ldr	r0, .L3013
+	cbnz	r0, .L3106
+	ldr	r0, .L3107
 	bl	FtlInit
-.L3012:
+.L3106:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L3013+4
+	ldr	r0, .L3107+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L3014:
+.L3108:
 	.align	2
-.L3013:
+.L3107:
 	.word	.LANCHOR14
-	.word	.LC70
+	.word	.LC74
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -21192,20 +21613,20 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3029
+	ldr	r3, .L3123
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L3015
-	ldr	r7, .L3029+4
-	ldr	r6, .L3029+8
-	ldr	r10, .L3029+32
+	beq	.L3109
+	ldr	r7, .L3123+4
+	ldr	r6, .L3123+8
+	ldr	r10, .L3123+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L3029+12
+	ldr	r4, .L3123+12
 	mov	r1, r5
-	ldr	r0, .L3029+16
+	ldr	r0, .L3123+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
@@ -21219,44 +21640,44 @@ ftl_fix_nand_power_lost_error:
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L3017:
+.L3111:
 	subs	r4, r4, #1
-	beq	.L3021
+	beq	.L3115
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L3017
-.L3021:
+	bne	.L3111
+.L3115:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3029+16
+	ldr	r0, .L3123+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L3019
+	cbnz	r4, .L3113
 	add	r0, sp, #56
-	ldr	r7, .L3029+20
+	ldr	r7, .L3123+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L3029+24
+	ldr	r3, .L3123+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L3022:
+.L3116:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L3024
+	bhi	.L3118
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L3029+28
+	ldr	r0, .L3123+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -21267,18 +21688,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L3019:
+.L3113:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L3015:
+.L3109:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3024:
+.L3118:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L3023
+	beq	.L3117
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -21286,20 +21707,20 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L3023:
+.L3117:
 	adds	r2, r2, #1
-	b	.L3022
-.L3030:
+	b	.L3116
+.L3124:
 	.align	2
-.L3029:
+.L3123:
 	.word	.LANCHOR15
-	.word	.LANCHOR234
+	.word	.LANCHOR237
 	.word	.LANCHOR83
 	.word	.LANCHOR92
-	.word	.LC71
+	.word	.LC75
 	.word	.LANCHOR77
 	.word	.LANCHOR38
-	.word	.LC72
+	.word	.LC76
 	.word	.LANCHOR91
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
@@ -21319,34 +21740,34 @@ ftl_read:
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #52]
-	bne	.L3032
+	bne	.L3126
 	mov	r2, r3
 	ldr	r1, [sp, #52]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #32]
-.L3031:
+.L3125:
 	ldr	r0, [sp, #32]
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3032:
+.L3126:
 	ldr	r3, [sp, #52]
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
-	ldr	r3, .L3070
+	ldr	r3, .L3164
 	ldr	r2, [sp, #36]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L3055
-	ldr	r3, .L3070+4
+	bhi	.L3149
+	ldr	r3, .L3164+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L3056
+	beq	.L3150
 	bl	FtlCacheWriteBack
-	ldr	r3, .L3070+8
+	ldr	r3, .L3164+8
 	mov	r0, r6
-	ldr	r10, .L3070+52
+	ldr	r10, .L3164+52
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21356,7 +21777,7 @@ ftl_read:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #40]
-	ldr	r2, .L3070+12
+	ldr	r2, .L3164+12
 	ldr	r4, [sp, #40]
 	rsb	r3, r3, #1
 	str	r0, [sp, #44]
@@ -21371,44 +21792,44 @@ ftl_read:
 	str	r3, [sp, #24]
 	str	r3, [sp, #48]
 	str	r3, [sp, #32]
-.L3034:
+.L3128:
 	ldr	r3, [sp, #28]
-	cbnz	r3, .L3054
-	ldr	r3, .L3070+16
+	cbnz	r3, .L3148
+	ldr	r3, .L3164+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L3031
+	beq	.L3125
 	movs	r1, #1
 	ldr	r0, [sp, #28]
 	bl	rk_ftl_garbage_collect
-	b	.L3031
-.L3054:
+	b	.L3125
+.L3148:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r0, r3, #1
-	bne	.L3035
-	ldr	fp, .L3070+8
+	bne	.L3129
+	ldr	fp, .L3164+8
 	mov	r8, #0
-.L3036:
+.L3130:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L3038
-.L3039:
+	bcc	.L3132
+.L3133:
 	ldr	r3, [sp, #28]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	beq	.L3043
-	ldr	r3, .L3070+20
+	beq	.L3137
+	ldr	r3, .L3164+20
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L3034
-.L3043:
+	bne	.L3128
+.L3137:
 	cmp	r5, #0
-	beq	.L3034
+	beq	.L3128
 	movs	r2, #0
 	mov	r1, r5
 	ldr	r0, [r10]
@@ -21423,7 +21844,7 @@ ftl_read:
 	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L3053:
+.L3147:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -21431,27 +21852,27 @@ ftl_read:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L3045
+	bne	.L3139
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3070+24
+	ldr	r3, .L3164+24
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3046
+	bne	.L3140
 	ldr	r3, [sp, #60]
 	mov	r0, r7
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L3069:
+.L3163:
 	bl	ftl_memcpy
-.L3046:
+.L3140:
 	ldr	r2, [r10]
 	add	r2, r2, r8
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L3047
-	ldr	ip, .L3070+32
+	beq	.L3141
+	ldr	ip, .L3164+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -21467,52 +21888,52 @@ ftl_read:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L3070+28
+	ldr	r0, .L3164+28
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L3047:
+.L3141:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r1, r3, #1
-	bne	.L3048
-	ldr	r1, .L3070+32
+	bne	.L3142
+	ldr	r1, .L3164+32
 	str	r3, [sp, #32]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L3049:
+.L3143:
 	add	fp, fp, #1
 	cmp	r5, fp
-	bne	.L3053
+	bne	.L3147
 	movs	r5, #0
-	b	.L3034
-.L3038:
+	b	.L3128
+.L3132:
 	mla	r0, r0, r4, r8
 	cmp	r6, r0
-	bhi	.L3037
+	bhi	.L3131
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L3037
+	bls	.L3131
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L3037:
+.L3131:
 	add	r8, r8, #1
-	b	.L3036
-.L3035:
+	b	.L3130
+.L3129:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r5, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #40]
 	cmp	r4, r3
-	ldr	r3, .L3070+8
-	bne	.L3040
-	ldr	r2, .L3070+24
+	ldr	r3, .L3164+8
+	bne	.L3134
+	ldr	r2, .L3164+24
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -21527,11 +21948,11 @@ ftl_read:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #48]
-	bne	.L3041
+	bne	.L3135
 	str	r7, [r8, #8]
-.L3041:
-	ldr	r3, .L3070+36
-	ldr	r2, .L3070+40
+.L3135:
+	ldr	r3, .L3164+36
+	ldr	r2, .L3164+40
 	str	r4, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -21540,12 +21961,12 @@ ftl_read:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L3039
-.L3040:
+	b	.L3133
+.L3134:
 	ldr	r2, [sp, #44]
 	cmp	r4, r2
-	bne	.L3042
-	ldr	r2, .L3070+44
+	bne	.L3136
+	ldr	r2, .L3164+44
 	ldr	r1, [sp, #36]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -21554,50 +21975,50 @@ ftl_read:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #24]
-	bne	.L3041
-.L3068:
+	bne	.L3135
+.L3162:
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L3041
-.L3042:
+	b	.L3135
+.L3136:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L3068
-.L3045:
+	b	.L3162
+.L3139:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L3046
+	bne	.L3140
 	ldr	r1, [r3, #8]
-	ldr	r3, .L3070+44
+	ldr	r3, .L3164+44
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L3046
-	ldr	r3, .L3070+8
+	bne	.L3140
+	ldr	r3, .L3164+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L3069
-.L3048:
+	b	.L3163
+.L3142:
 	cmp	r3, #256
-	bne	.L3049
+	bne	.L3143
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L3070+48
+	ldr	r2, .L3164+48
 	movw	r3, #2049
-.L3051:
+.L3145:
 	subs	r3, r3, #1
-	bne	.L3050
-.L3052:
+	bne	.L3144
+.L3146:
 	bl	FtlSysFlush
-	b	.L3049
-.L3050:
+	b	.L3143
+.L3144:
 	movs	r1, #1
 	str	r2, [sp, #76]
 	mov	r0, r1
@@ -21607,29 +22028,29 @@ ftl_read:
 	ldr	r3, [sp, #72]
 	ldrh	r1, [r2]
 	cmp	r1, r8
-	beq	.L3051
-	b	.L3052
-.L3055:
+	beq	.L3145
+	b	.L3146
+.L3149:
 	mov	r3, #-1
-.L3056:
+.L3150:
 	str	r3, [sp, #32]
-	b	.L3031
-.L3071:
+	b	.L3125
+.L3165:
 	.align	2
-.L3070:
+.L3164:
 	.word	.LANCHOR68
-	.word	.LANCHOR230
+	.word	.LANCHOR232
 	.word	.LANCHOR55
 	.word	.LANCHOR166
 	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR186
-	.word	.LC59
+	.word	.LC64
 	.word	.LANCHOR138
 	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR187
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR180
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",%progbits
@@ -21645,39 +22066,39 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r3, .L3120
+	ldr	r3, .L3214
 	sub	sp, sp, #80
 	mov	r6, r1
 	str	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3105
+	bne	.L3199
 	cmp	r0, #16
-	bne	.L3074
+	bne	.L3168
 	mov	r2, r10
 	ldr	r1, [sp, #12]
 	add	r0, r6, #256
 	bl	FtlVendorPartWrite
-.L3072:
+.L3166:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3074:
+.L3168:
 	ldr	r3, [sp, #12]
 	adds	r5, r1, r3
-	ldr	r3, .L3120+4
+	ldr	r3, .L3214+4
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L3106
-	ldr	r3, .L3120+8
+	bhi	.L3200
+	ldr	r3, .L3214+8
 	ldr	r0, [r3]
 	adds	r4, r0, #1
-	beq	.L3072
-	ldr	r3, .L3120+12
+	beq	.L3166
+	ldr	r3, .L3214+12
 	mov	r2, #2048
 	mov	r0, r6
 	str	r2, [r3]
-	ldr	r3, .L3120+16
+	ldr	r3, .L3214+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21685,7 +22106,7 @@ FtlWrite:
 	mov	r8, r0
 	subs	r0, r5, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3120+20
+	ldr	r2, .L3214+20
 	sub	r5, r0, r8
 	adds	r3, r5, #1
 	adds	r1, r5, #1
@@ -21694,29 +22115,29 @@ FtlWrite:
 	str	r0, [sp, #16]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L3120+24
+	ldr	r3, .L3214+24
 	ldr	fp, [r3]
 	cmp	fp, #0
-	beq	.L3076
+	beq	.L3170
 	ldr	r3, [fp, #16]
 	cmp	r8, r3
-	beq	.L3077
+	beq	.L3171
 	bl	FtlCacheWriteBack
-.L3076:
-	ldr	r7, .L3120+28
+.L3170:
+	ldr	r7, .L3214+28
 	mov	r4, r8
-.L3078:
+.L3172:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L3104
+	cbnz	r3, .L3198
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #4]
 	sub	r1, r3, r8
 	bl	rk_ftl_garbage_collect
-.L3105:
+.L3199:
 	movs	r0, #0
-	b	.L3072
-.L3077:
-	ldr	r2, .L3120+32
+	b	.L3166
+.L3171:
+	ldr	r2, .L3214+32
 	mov	r1, r4
 	mov	r0, r6
 	ldr	r3, [r2]
@@ -21736,7 +22157,7 @@ FtlWrite:
 	mov	r2, r7
 	bl	ftl_memcpy
 	cmp	r5, #0
-	beq	.L3105
+	beq	.L3199
 	ldr	r3, [sp, #12]
 	add	r6, r6, r4
 	add	r10, r10, r7
@@ -21745,27 +22166,27 @@ FtlWrite:
 	str	r3, [sp, #12]
 	bl	FtlCacheWriteBack
 	str	r5, [sp, #4]
-	b	.L3076
-.L3104:
-	ldr	r5, .L3120+36
+	b	.L3170
+.L3198:
+	ldr	r5, .L3214+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L3079
-	ldr	r1, .L3120+40
-	movw	r2, #1668
-	ldr	r0, .L3120+44
+	bcc	.L3173
+	ldr	r1, .L3214+40
+	movw	r2, #1673
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3079:
+.L3173:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L3080
+	cbnz	r3, .L3174
 	bl	FtlCacheWriteBack
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L3080:
+.L3174:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -21780,24 +22201,24 @@ FtlWrite:
 	str	r3, [sp, #36]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L3081
-	ldr	r1, .L3120+40
-	movw	r2, #1701
-	ldr	r0, .L3120+44
+	bcc	.L3175
+	ldr	r1, .L3214+40
+	movw	r2, #1706
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3081:
+.L3175:
 	movs	r3, #0
-.L3119:
+.L3213:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #36]
 	cmp	r3, r2
-	bne	.L3102
-.L3083:
-	ldr	r0, .L3120+56
+	bne	.L3196
+.L3177:
+	ldr	r0, .L3214+56
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #8]
@@ -21806,24 +22227,24 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bcs	.L3103
-	ldr	r1, .L3120+40
-	movw	r2, #1790
-	ldr	r0, .L3120+44
+	bcs	.L3197
+	ldr	r1, .L3214+40
+	movw	r2, #1795
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3103:
+.L3197:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	subs	r3, r3, r2
 	str	r3, [sp, #4]
-	b	.L3078
-.L3102:
+	b	.L3172
+.L3196:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L3083
+	beq	.L3177
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
@@ -21832,9 +22253,9 @@ FtlWrite:
 	mov	r0, r7
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #8]
-	ldr	r2, .L3120+60
+	ldr	r2, .L3214+60
 	muls	r5, r3, r5
-	ldr	r3, .L3120+56
+	ldr	r3, .L3214+56
 	ldrh	r2, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #20]
@@ -21844,7 +22265,7 @@ FtlWrite:
 	str	r4, [r1, #16]
 	mul	r0, r2, r3
 	bic	r3, r0, #3
-	ldr	r0, .L3120+64
+	ldr	r0, .L3214+64
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -21855,12 +22276,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	r4, r8
-	ldr	r1, .L3120+16
-	beq	.L3084
+	ldr	r1, .L3214+16
+	beq	.L3178
 	ldr	r3, [sp, #16]
 	cmp	r3, r4
 	ldr	r3, [sp, #20]
-	bne	.L3115
+	bne	.L3209
 	ldr	r3, [sp, #12]
 	adds	r2, r6, r3
 	ldrh	r3, [r1]
@@ -21871,8 +22292,8 @@ FtlWrite:
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L3087
-.L3084:
+	b	.L3181
+.L3178:
 	ldrh	r2, [r1]
 	mov	r0, r6
 	mov	r1, r2
@@ -21887,14 +22308,14 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #20]
-.L3087:
-	ldr	r3, .L3120+16
+.L3181:
+	ldr	r3, .L3214+16
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	ldr	r3, .L3120+56
+	ldr	r3, .L3214+56
 	ldr	r3, [r3]
-	bne	.L3088
+	bne	.L3182
 	cmp	r4, r8
 	add	r5, r5, r3
 	itett	ne
@@ -21905,25 +22326,25 @@ FtlWrite:
 	itt	ne
 	addne	r2, r10, r2, lsl #9
 	strne	r2, [r5, #8]
-.L3090:
-	ldr	r3, .L3120+36
+.L3184:
+	ldr	r3, .L3214+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3099
-	ldr	r1, .L3120+40
-	movw	r2, #1775
-	ldr	r0, .L3120+44
+	bcc	.L3193
+	ldr	r1, .L3214+40
+	movw	r2, #1780
+	ldr	r0, .L3214+44
 	bl	printf
-	ldr	r1, .L3120+48
-	ldr	r0, .L3120+52
+	ldr	r1, .L3214+48
+	ldr	r0, .L3214+52
 	bl	printf
-.L3099:
+.L3193:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3120+68
+	ldr	r2, .L3214+68
 	str	r4, [fp, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -21939,21 +22360,21 @@ FtlWrite:
 	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3119
-.L3121:
+	b	.L3213
+.L3215:
 	.align	2
-.L3120:
+.L3214:
 	.word	.LANCHOR76
 	.word	.LANCHOR68
-	.word	.LANCHOR230
-	.word	.LANCHOR246
+	.word	.LANCHOR232
+	.word	.LANCHOR249
 	.word	.LANCHOR55
 	.word	.LANCHOR162
 	.word	.LANCHOR132
 	.word	.LANCHOR91
 	.word	.LANCHOR164
 	.word	.LANCHOR38
-	.word	.LANCHOR247
+	.word	.LANCHOR250
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -21961,18 +22382,18 @@ FtlWrite:
 	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR160
-.L3088:
+.L3182:
 	cmp	r4, r8
 	add	r3, r3, r5
 	ite	eq
-	ldreq	r2, .L3122
-	ldrne	r2, .L3122+4
+	ldreq	r2, .L3216
+	ldrne	r2, .L3216+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r2, [sp, #40]
-	ldr	r3, .L3122+8
+	ldr	r3, .L3216+8
 	adds	r0, r2, #1
-	beq	.L3093
+	beq	.L3187
 	ldr	r3, [r3]
 	movs	r1, #1
 	str	r2, [sp, #48]
@@ -21987,60 +22408,60 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L3094
-	ldr	r2, .L3122+12
+	bne	.L3188
+	ldr	r2, .L3216+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L3097:
+.L3191:
 	ldr	r2, [sp, #20]
 	cmp	r4, r8
-	ldr	r3, .L3122+8
+	ldr	r3, .L3216+8
 	lsl	r2, r2, #9
-	bne	.L3098
+	bne	.L3192
 	ldr	r3, [r3]
 	mov	r1, r10
 	add	r5, r5, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r5, #8]
 	add	r0, r0, r3, lsl #9
-.L3117:
+.L3211:
 	bl	ftl_memcpy
-	b	.L3090
-.L3094:
+	b	.L3184
+.L3188:
 	ldr	r1, [fp, #8]
 	cmp	r4, r1
-	beq	.L3096
-	ldr	r2, .L3122+12
-	ldr	r0, .L3122+16
+	beq	.L3190
+	ldr	r2, .L3216+12
+	ldr	r0, .L3216+16
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L3096:
+.L3190:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L3097
-	movw	r2, #1754
-	ldr	r1, .L3122+20
-	ldr	r0, .L3122+24
+	beq	.L3191
+	movw	r2, #1759
+	ldr	r1, .L3216+20
+	ldr	r0, .L3216+24
 	bl	printf
-	ldr	r1, .L3122+28
-	ldr	r0, .L3122+32
+	ldr	r1, .L3216+28
+	ldr	r0, .L3216+32
 	bl	printf
-	b	.L3097
-.L3093:
+	b	.L3191
+.L3187:
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L3122+36
+	ldr	r2, .L3216+36
 	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L3097
-.L3098:
-	ldr	r1, .L3122+40
+	b	.L3191
+.L3192:
+	ldr	r1, .L3216+40
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
 	add	r5, r5, r3
@@ -22048,8 +22469,8 @@ FtlWrite:
 	muls	r1, r4, r1
 	subs	r1, r1, r6
 	add	r1, r10, r1, lsl #9
-	b	.L3117
-.L3115:
+	b	.L3211
+.L3209:
 	ldr	r3, [r3]
 	add	r5, r5, r3
 	ldrh	r3, [r1]
@@ -22057,19 +22478,19 @@ FtlWrite:
 	subs	r3, r3, r6
 	add	r3, r10, r3, lsl #9
 	str	r3, [r5, #8]
-	b	.L3090
-.L3106:
+	b	.L3184
+.L3200:
 	mov	r0, #-1
-	b	.L3072
-.L3123:
+	b	.L3166
+.L3217:
 	.align	2
-.L3122:
+.L3216:
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR182
 	.word	.LANCHOR138
-	.word	.LC73
-	.word	.LANCHOR247
+	.word	.LC77
+	.word	.LANCHOR250
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -22134,204 +22555,48 @@ StorageSysDataStore:
 	.align	1
 	.global	FlashBootVendorWrite
 	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r1, r0
-	movs	r2, #1
-	movs	r0, #16
-	b	FtlWrite
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
-	.section	.text.ftl_write,"ax",%progbits
-	.align	1
-	.global	ftl_write
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_write, %function
-ftl_write:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r7, r1
-	mov	r4, r2
-	mov	r5, r3
-	mov	r6, r0
-	cbnz	r0, .L3129
-	mov	r3, r2
-	mov	r2, r5
-	bl	idb_write_data
-.L3129:
-	mov	r3, r5
-	mov	r2, r4
-	mov	r1, r7
-	mov	r0, r6
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	FtlWrite
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlCheckVpc,"ax",%progbits
-	.align	1
-	.global	FtlCheckVpc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlCheckVpc, %function
-FtlCheckVpc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r6, .L3154
-	ldr	r5, .L3154+4
-	ldr	r1, .L3154+8
-	ldr	r0, .L3154+12
-	bl	printf
-	mov	r2, #8192
-	movs	r1, #0
-	ldr	r0, .L3154+4
-	bl	memset
-.L3131:
-	ldr	r3, [r6]
-	cmp	r4, r3
-	bcc	.L3133
-	ldr	r7, .L3154+16
-	movs	r4, #0
-	ldr	r5, .L3154+20
-	movs	r2, #2
-	ldr	r10, .L3154+4
-	mov	r6, r4
-	ldr	fp, .L3154+60
-	mov	r8, r7
-	ldrh	r3, [r7]
-	ldr	r1, [r5]
-	ldr	r0, .L3154+24
-	bl	rknand_print_hex
-	ldrh	r3, [r7]
-	movs	r2, #2
-	ldr	r1, .L3154+4
-	ldr	r0, .L3154+28
-	bl	rknand_print_hex
-.L3134:
-	ldrh	r2, [r8]
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L3136
-	ldr	r3, .L3154+32
-	ldr	r4, [r3]
-	cbz	r4, .L3137
-	ldr	r3, .L3154+36
-	mov	r8, #0
-	ldr	r7, .L3154+40
-	ldr	fp, .L3154+64
-	ldrh	r10, [r3]
-	ldr	r3, [r7]
-	subs	r4, r4, r3
-	ldr	r3, .L3154+44
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
-	uxth	r4, r4
-.L3138:
-	uxth	r3, r8
-	cmp	r10, r3
-	bls	.L3137
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L3139
-	ldr	r3, .L3154+4
-	movs	r6, #1
-	mov	r1, r4
-	mov	r0, fp
-	ldrh	r3, [r3, r4, lsl #1]
-	bl	printf
-.L3139:
-	movs	r3, #6
-	ldr	r2, [r7]
-	muls	r4, r3, r4
-	movw	r3, #65535
-	add	r8, r8, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, r3
-	bne	.L3138
-.L3137:
-	cbz	r6, .L3130
-	ldr	r1, .L3154+8
-	movw	r2, #1686
-	ldr	r0, .L3154+48
-	bl	printf
-	ldr	r1, .L3154+52
-	ldr	r0, .L3154+56
-	bl	printf
-.L3130:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3133:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L3132
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r5, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L3132:
-	adds	r4, r4, #1
-	b	.L3131
-.L3136:
-	ldr	r3, [r5]
-	uxth	r7, r4
-	ldrh	r2, [r3, r7, lsl #1]
-	ldrh	r3, [r10, r7, lsl #1]
-	cmp	r2, r3
-	beq	.L3135
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r1, r0
+	movs	r2, #1
+	movs	r0, #16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r1
+	mov	r4, r2
+	mov	r5, r3
+	mov	r6, r0
+	cbnz	r0, .L3223
+	mov	r3, r2
+	mov	r2, r5
+	bl	idb_write_data
+.L3223:
+	mov	r3, r5
+	mov	r2, r4
 	mov	r1, r7
-	mov	r0, fp
-	bl	printf
-	ldr	r3, [r5]
-	movw	r2, #65535
-	ldrh	r3, [r3, r7, lsl #1]
-	cmp	r3, r2
-	beq	.L3135
-	ldrh	r2, [r10, r7, lsl #1]
-	cmp	r2, r3
-	it	hi
-	movhi	r6, #1
-.L3135:
-	adds	r4, r4, #1
-	b	.L3134
-.L3155:
-	.align	2
-.L3154:
-	.word	.LANCHOR72
-	.word	check_valid_page_count_table
-	.word	.LANCHOR248
-	.word	.LC45
-	.word	.LANCHOR40
-	.word	.LANCHOR83
-	.word	.LC74
-	.word	.LC75
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR81
-	.word	-1431655765
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LC76
-	.word	.LC77
-	.size	FtlCheckVpc, .-FtlCheckVpc
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
 	.section	.text.FtlDumpSysBlock,"ax",%progbits
 	.align	1
 	.global	FtlDumpSysBlock
@@ -22345,27 +22610,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3163
+	ldr	r5, .L3231
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3163+4
+	ldr	r4, .L3231+4
 	ldr	r3, [r5]
-	ldr	r8, .L3163+20
+	ldr	r8, .L3231+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3163+8
+	ldr	r3, .L3231+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3157:
+.L3225:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3159
+	blt	.L3227
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3159:
+.L3227:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -22375,7 +22640,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3163+12
+	ldr	r0, .L3231+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -22391,20 +22656,20 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3158
+	beq	.L3226
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3163+16
+	ldr	r0, .L3231+16
 	bl	rknand_print_hex
-.L3158:
+.L3226:
 	adds	r6, r6, #1
-	b	.L3157
-.L3164:
+	b	.L3225
+.L3232:
 	.align	2
-.L3163:
+.L3231:
 	.word	.LANCHOR183
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR188
 	.word	.LC78
 	.word	.LC79
@@ -22421,32 +22686,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3179
+	ldr	r3, .L3247
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3179+72
+	ldr	r8, .L3247+72
 	ldrh	r5, [r3]
-.L3166:
-	ldr	r3, .L3179+4
+.L3234:
+	ldr	r3, .L3247+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3173
-	ldr	r4, .L3179+8
+	bhi	.L3241
+	ldr	r4, .L3247+8
 	movs	r7, #0
-.L3174:
-	ldr	r3, .L3179+12
+.L3242:
+	ldr	r3, .L3247+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3177
+	bge	.L3245
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3179+76
-	b	.L3178
-.L3168:
+	ldr	r8, .L3247+76
+	b	.L3246
+.L3236:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3179+16
+	ldr	r3, .L3247+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -22454,7 +22719,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3167
+	cbnz	r0, .L3235
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -22467,29 +22732,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3167:
+.L3235:
 	adds	r6, r6, #1
-.L3175:
+.L3243:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3168
-	cbnz	r4, .L3169
-.L3172:
+	bhi	.L3236
+	cbnz	r4, .L3237
+.L3240:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3166
-.L3169:
-	ldr	r10, .L3179+80
+	b	.L3234
+.L3237:
+	ldr	r10, .L3247+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3170:
+.L3238:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3172
+	bls	.L3240
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22510,24 +22775,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3170
-.L3173:
-	ldr	r1, .L3179+20
+	b	.L3238
+.L3241:
+	ldr	r1, .L3247+20
 	movs	r6, #0
-	ldr	r3, .L3179+24
+	ldr	r3, .L3247+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3179+28
+	ldr	r3, .L3247+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3179+32
+	ldr	r1, .L3247+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3175
-.L3176:
-	ldr	r10, .L3179+44
+	b	.L3243
+.L3244:
+	ldr	r10, .L3247+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22543,7 +22808,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3179+36
+	ldr	r0, .L3247+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22555,44 +22820,44 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3178:
+.L3246:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3176
+	blt	.L3244
 	adds	r7, r7, #1
-	b	.L3174
-.L3177:
-	ldr	r3, .L3179+40
+	b	.L3242
+.L3245:
+	ldr	r3, .L3247+40
 	movs	r2, #2
-	ldr	r1, .L3179+44
-	ldr	r0, .L3179+48
+	ldr	r1, .L3247+44
+	ldr	r0, .L3247+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3179+52
+	ldr	r4, .L3247+52
 	movs	r2, #4
-	ldr	r1, .L3179+56
-	ldr	r0, .L3179+60
+	ldr	r1, .L3247+56
+	ldr	r0, .L3247+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3179+64
+	ldr	r1, .L3247+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3179+68
+	ldr	r0, .L3247+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3180:
+.L3248:
 	.align	2
-.L3179:
+.L3247:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
-	.word	.LANCHOR202
+	.word	.LANCHOR203
 	.word	.LANCHOR128
 	.word	.LANCHOR47
 	.word	.LANCHOR105
@@ -22805,6 +23070,7 @@ dump_map_info:
 	.global	gReadRetryInfo
 	.global	gpNandParaInfo
 	.global	gNandOptPara
+	.global	g_nand_ecc_en
 	.global	g_slc2KBNand
 	.global	g_maxRetryCount
 	.global	g_maxRegNum
@@ -22935,7 +23201,7 @@ c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -23137,7 +23403,7 @@ gBbtInfo:
 	.space	60
 	.section	.bss.gBlockPageAlignSize,"aw",%nobits
 	.align	2
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	gBlockPageAlignSize, %object
 	.size	gBlockPageAlignSize, 4
 gBlockPageAlignSize:
@@ -23247,14 +23513,14 @@ gMasterTempBuf:
 gMultiPageProgEn:
 	.space	1
 	.section	.bss.gMultiPageReadEn,"aw",%nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
 	.space	1
 	.section	.bss.gNandChipMap,"aw",%nobits
 	.align	2
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR0,. + 0
 	.type	gNandChipMap, %object
 	.size	gNandChipMap, 32
 gNandChipMap:
@@ -23297,7 +23563,7 @@ gNandFlashInfoBlockEcc:
 gNandFlashResEndPageAddr:
 	.space	4
 	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	gNandIDBResBlkNum, %object
 	.size	gNandIDBResBlkNum, 1
 gNandIDBResBlkNum:
@@ -23341,7 +23607,7 @@ gNandOptPara:
 gNandPhyInfo:
 	.space	28
 	.section	.bss.gNandRandomizer,"aw",%nobits
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gNandRandomizer, %object
 	.size	gNandRandomizer, 1
 gNandRandomizer:
@@ -23382,7 +23648,7 @@ gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR209,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
@@ -23402,7 +23668,7 @@ gTotleBlock:
 	.space	2
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
@@ -23423,7 +23689,7 @@ g_GlobalSysVersion:
 	.space	4
 	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
-	.set	.LANCHOR244,. + 0
+	.set	.LANCHOR247,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -23437,7 +23703,7 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -23500,7 +23766,7 @@ g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR218,. + 0
+	.set	.LANCHOR219,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
@@ -23521,7 +23787,7 @@ g_free_slc_blk_num:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR246,. + 0
+	.set	.LANCHOR249,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -23563,14 +23829,14 @@ g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR242,. + 0
+	.set	.LANCHOR245,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -23667,7 +23933,7 @@ g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -23733,6 +23999,12 @@ g_max_erase_count:
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
+	.section	.bss.g_nand_ecc_en,"aw",%nobits
+	.set	.LANCHOR200,. + 0
+	.type	g_nand_ecc_en, %object
+	.size	g_nand_ecc_en, 1
+g_nand_ecc_en:
+	.space	1
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
 	.set	.LANCHOR119,. + 0
@@ -23763,14 +24035,14 @@ g_page_map_check_enable:
 	.space	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR234,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -23784,14 +24056,14 @@ g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR239,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -23810,7 +24082,7 @@ g_req_cache:
 g_retryMode:
 	.space	1
 	.section	.bss.g_slc2KBNand,"aw",%nobits
-	.set	.LANCHOR1,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	g_slc2KBNand, %object
 	.size	g_slc2KBNand, 1
 g_slc2KBNand:
@@ -23838,7 +24110,7 @@ g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -23894,7 +24166,7 @@ g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR218,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
@@ -23936,21 +24208,21 @@ g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR233,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR240,. + 0
+	.set	.LANCHOR243,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -24011,7 +24283,7 @@ gp_gc_page_buf_info:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR229,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -24045,7 +24317,7 @@ mlcPageToSlcPageTbl:
 	.space	1024
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
@@ -24308,7 +24580,7 @@ req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 36
 req_sys:
@@ -26759,14 +27031,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -26801,7 +27073,7 @@ gNandParaInfo:
 	.space	4
 	.section	.data.gSlcNandParaInfo,"aw",%progbits
 	.align	1
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -26839,7 +27111,7 @@ power_up_flag:
 	.word	1
 	.section	.data.random_seed,"aw",%progbits
 	.align	1
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -27029,7 +27301,7 @@ refValueDefault:
 .LC32:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC52:
+.LC55:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
 .LC14:
@@ -27059,13 +27331,9 @@ refValueDefault:
 .LC35:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC74:
-	.ascii	"vpc1\000"
-.LC75:
-	.ascii	"vpc2\000"
-.LC76:
+.LC60:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC77:
+.LC61:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
 .LC45:
@@ -27090,20 +27358,20 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC65:
+.LC70:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC63:
+.LC68:
 	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
-.LC64:
+.LC69:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC67:
-	.ascii	"FTL version: 5.0.53 20190107\000"
-.LC68:
+.LC71:
+	.ascii	"FTL version: 5.0.56 20190508\000"
+.LC72:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC69:
+.LC73:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
 .LC43:
@@ -27114,14 +27382,14 @@ refValueDefault:
 .LC41:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC56:
+.LC59:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC60:
+.LC65:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC61:
+.LC66:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC62:
+.LC67:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
 .LC49:
@@ -27139,17 +27407,17 @@ refValueDefault:
 .LC38:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC73:
+.LC77:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
 .LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC57:
+.LC62:
 	.ascii	"Ftlscanalldata = %x\012\000"
-.LC58:
+.LC63:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC59:
+.LC64:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
@@ -27167,203 +27435,209 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10518,"a",%progbits
-	.set	.LANCHOR245,. + 0
-	.type	__func__.10518, %object
-	.size	__func__.10518, 8
-__func__.10518:
+	.section	.rodata.__func__.10524,"a",%progbits
+	.set	.LANCHOR248,. + 0
+	.type	__func__.10524, %object
+	.size	__func__.10524, 8
+__func__.10524:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10578,"a",%progbits
-	.set	.LANCHOR228,. + 0
-	.type	__func__.10578, %object
-	.size	__func__.10578, 13
-__func__.10578:
+	.section	.rodata.__func__.10585,"a",%progbits
+	.set	.LANCHOR230,. + 0
+	.type	__func__.10585, %object
+	.size	__func__.10585, 13
+__func__.10585:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10604,"a",%progbits
-	.set	.LANCHOR247,. + 0
-	.type	__func__.10604, %object
-	.size	__func__.10604, 9
-__func__.10604:
+	.section	.rodata.__func__.10611,"a",%progbits
+	.set	.LANCHOR250,. + 0
+	.type	__func__.10611, %object
+	.size	__func__.10611, 9
+__func__.10611:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10687,"a",%progbits
+	.section	.rodata.__func__.10694,"a",%progbits
 	.set	.LANCHOR124,. + 0
-	.type	__func__.10687, %object
-	.size	__func__.10687, 14
-__func__.10687:
+	.type	__func__.10694, %object
+	.size	__func__.10694, 14
+__func__.10694:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10733,"a",%progbits
-	.set	.LANCHOR211,. + 0
-	.type	__func__.10733, %object
-	.size	__func__.10733, 11
-__func__.10733:
+	.section	.rodata.__func__.10740,"a",%progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10740, %object
+	.size	__func__.10740, 11
+__func__.10740:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10826,"a",%progbits
+	.section	.rodata.__func__.10833,"a",%progbits
 	.set	.LANCHOR89,. + 0
-	.type	__func__.10826, %object
-	.size	__func__.10826, 17
-__func__.10826:
+	.type	__func__.10833, %object
+	.size	__func__.10833, 17
+__func__.10833:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10830,"a",%progbits
+	.section	.rodata.__func__.10837,"a",%progbits
 	.set	.LANCHOR86,. + 0
-	.type	__func__.10830, %object
-	.size	__func__.10830, 17
-__func__.10830:
+	.type	__func__.10837, %object
+	.size	__func__.10837, 17
+__func__.10837:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10867,"a",%progbits
+	.section	.rodata.__func__.10874,"a",%progbits
 	.set	.LANCHOR90,. + 0
-	.type	__func__.10867, %object
-	.size	__func__.10867, 17
-__func__.10867:
+	.type	__func__.10874, %object
+	.size	__func__.10874, 17
+__func__.10874:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10897,"a",%progbits
-	.set	.LANCHOR94,. + 0
-	.type	__func__.10897, %object
-	.size	__func__.10897, 22
-__func__.10897:
-	.ascii	"List_update_data_list\000"
 	.section	.rodata.__func__.10904,"a",%progbits
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	__func__.10904, %object
-	.size	__func__.10904, 20
+	.size	__func__.10904, 22
 __func__.10904:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.10911,"a",%progbits
+	.set	.LANCHOR229,. + 0
+	.type	__func__.10911, %object
+	.size	__func__.10911, 20
+__func__.10911:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10935,"a",%progbits
+	.section	.rodata.__func__.10942,"a",%progbits
 	.set	.LANCHOR95,. + 0
-	.type	__func__.10935, %object
-	.size	__func__.10935, 26
-__func__.10935:
+	.type	__func__.10942, %object
+	.size	__func__.10942, 26
+__func__.10942:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10945,"a",%progbits
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10945, %object
-	.size	__func__.10945, 15
-__func__.10945:
-	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10958,"a",%progbits
+	.section	.rodata.__func__.10952,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10958, %object
-	.size	__func__.10958, 31
-__func__.10958:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10971,"a",%progbits
+	.type	__func__.10952, %object
+	.size	__func__.10952, 15
+__func__.10952:
+	.ascii	"ftl_map_blk_gc\000"
+	.section	.rodata.__func__.10965,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10971, %object
-	.size	__func__.10971, 16
-__func__.10971:
+	.type	__func__.10965, %object
+	.size	__func__.10965, 31
+__func__.10965:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.10978,"a",%progbits
+	.set	.LANCHOR215,. + 0
+	.type	__func__.10978, %object
+	.size	__func__.10978, 16
+__func__.10978:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10991,"a",%progbits
+	.section	.rodata.__func__.10998,"a",%progbits
 	.set	.LANCHOR98,. + 0
-	.type	__func__.10991, %object
-	.size	__func__.10991, 22
-__func__.10991:
+	.type	__func__.10998, %object
+	.size	__func__.10998, 22
+__func__.10998:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.11007,"a",%progbits
-	.set	.LANCHOR226,. + 0
-	.type	__func__.11007, %object
-	.size	__func__.11007, 9
-__func__.11007:
+	.section	.rodata.__func__.11014,"a",%progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.11014, %object
+	.size	__func__.11014, 9
+__func__.11014:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.11069,"a",%progbits
-	.set	.LANCHOR210,. + 0
-	.type	__func__.11069, %object
-	.size	__func__.11069, 15
-__func__.11069:
+	.section	.rodata.__func__.11076,"a",%progbits
+	.set	.LANCHOR211,. + 0
+	.type	__func__.11076, %object
+	.size	__func__.11076, 15
+__func__.11076:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.11088,"a",%progbits
-	.set	.LANCHOR220,. + 0
-	.type	__func__.11088, %object
-	.size	__func__.11088, 14
-__func__.11088:
-	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11143,"a",%progbits
+	.section	.rodata.__func__.11095,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11143, %object
-	.size	__func__.11143, 15
-__func__.11143:
+	.type	__func__.11095, %object
+	.size	__func__.11095, 14
+__func__.11095:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.rodata.__func__.11150,"a",%progbits
+	.set	.LANCHOR222,. + 0
+	.type	__func__.11150, %object
+	.size	__func__.11150, 15
+__func__.11150:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11154,"a",%progbits
-	.set	.LANCHOR248,. + 0
-	.type	__func__.11154, %object
-	.size	__func__.11154, 12
-__func__.11154:
+	.section	.rodata.__func__.11161,"a",%progbits
+	.set	.LANCHOR234,. + 0
+	.type	__func__.11161, %object
+	.size	__func__.11161, 12
+__func__.11161:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11186,"a",%progbits
-	.set	.LANCHOR224,. + 0
-	.type	__func__.11186, %object
-	.size	__func__.11186, 17
-__func__.11186:
-	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11205,"a",%progbits
+	.section	.rodata.__func__.11193,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11205, %object
-	.size	__func__.11205, 16
-__func__.11205:
+	.type	__func__.11193, %object
+	.size	__func__.11193, 17
+__func__.11193:
+	.ascii	"FtlDumpBlockInfo\000"
+	.section	.rodata.__func__.11212,"a",%progbits
+	.set	.LANCHOR226,. + 0
+	.type	__func__.11212, %object
+	.size	__func__.11212, 16
+__func__.11212:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11310,"a",%progbits
-	.set	.LANCHOR232,. + 0
-	.type	__func__.11310, %object
-	.size	__func__.11310, 16
-__func__.11310:
+	.section	.rodata.__func__.11317,"a",%progbits
+	.set	.LANCHOR235,. + 0
+	.type	__func__.11317, %object
+	.size	__func__.11317, 16
+__func__.11317:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11343,"a",%progbits
-	.set	.LANCHOR233,. + 0
-	.type	__func__.11343, %object
-	.size	__func__.11343, 22
-__func__.11343:
+	.section	.rodata.__func__.11350,"a",%progbits
+	.set	.LANCHOR236,. + 0
+	.type	__func__.11350, %object
+	.size	__func__.11350, 22
+__func__.11350:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11397,"a",%progbits
+	.section	.rodata.__func__.11404,"a",%progbits
 	.set	.LANCHOR101,. + 0
-	.type	__func__.11397, %object
-	.size	__func__.11397, 16
-__func__.11397:
+	.type	__func__.11404, %object
+	.size	__func__.11404, 16
+__func__.11404:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11417,"a",%progbits
+	.section	.rodata.__func__.11424,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.11417, %object
-	.size	__func__.11417, 18
-__func__.11417:
+	.type	__func__.11424, %object
+	.size	__func__.11424, 18
+__func__.11424:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11494,"a",%progbits
-	.set	.LANCHOR203,. + 0
-	.type	__func__.11494, %object
-	.size	__func__.11494, 25
-__func__.11494:
+	.section	.rodata.__func__.11468,"a",%progbits
+	.set	.LANCHOR227,. + 0
+	.type	__func__.11468, %object
+	.size	__func__.11468, 17
+__func__.11468:
+	.ascii	"ftl_scan_all_ppa\000"
+	.section	.rodata.__func__.11513,"a",%progbits
+	.set	.LANCHOR204,. + 0
+	.type	__func__.11513, %object
+	.size	__func__.11513, 25
+__func__.11513:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11508,"a",%progbits
-	.set	.LANCHOR219,. + 0
-	.type	__func__.11508, %object
-	.size	__func__.11508, 29
-__func__.11508:
+	.section	.rodata.__func__.11527,"a",%progbits
+	.set	.LANCHOR220,. + 0
+	.type	__func__.11527, %object
+	.size	__func__.11527, 29
+__func__.11527:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11514,"a",%progbits
-	.set	.LANCHOR208,. + 0
-	.type	__func__.11514, %object
-	.size	__func__.11514, 19
-__func__.11514:
+	.section	.rodata.__func__.11533,"a",%progbits
+	.set	.LANCHOR209,. + 0
+	.type	__func__.11533, %object
+	.size	__func__.11533, 19
+__func__.11533:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11525,"a",%progbits
-	.set	.LANCHOR206,. + 0
-	.type	__func__.11525, %object
-	.size	__func__.11525, 16
-__func__.11525:
-	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11530,"a",%progbits
+	.section	.rodata.__func__.11544,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.11530, %object
-	.size	__func__.11530, 20
-__func__.11530:
+	.type	__func__.11544, %object
+	.size	__func__.11544, 16
+__func__.11544:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.11549,"a",%progbits
+	.set	.LANCHOR208,. + 0
+	.type	__func__.11549, %object
+	.size	__func__.11549, 20
+__func__.11549:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11598,"a",%progbits
-	.set	.LANCHOR239,. + 0
-	.type	__func__.11598, %object
-	.size	__func__.11598, 19
-__func__.11598:
+	.section	.rodata.__func__.11617,"a",%progbits
+	.set	.LANCHOR242,. + 0
+	.type	__func__.11617, %object
+	.size	__func__.11617, 19
+__func__.11617:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11697,"a",%progbits
-	.set	.LANCHOR243,. + 0
-	.type	__func__.11697, %object
-	.size	__func__.11697, 23
-__func__.11697:
+	.section	.rodata.__func__.11717,"a",%progbits
+	.set	.LANCHOR246,. + 0
+	.type	__func__.11717, %object
+	.size	__func__.11717, 23
+__func__.11717:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC36:
@@ -27381,9 +27655,9 @@ __func__.11697:
 .LC83:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC71:
+.LC75:
 	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC72:
+.LC76:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
@@ -27391,6 +27665,14 @@ __func__.11697:
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
 .LC39:
 	.ascii	"page map lost: %x %x\012\000"
+	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",%progbits,1
+.LC52:
+	.ascii	"ftl_scan_all_ppa blk %x page %x\012\000"
+.LC53:
+	.ascii	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+.LC54:
+	.ascii	"%s finished\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
 .LC15:
 	.ascii	"1 write_idblock fix data %x %x %x\012\000"
@@ -27399,17 +27681,14 @@ __func__.11697:
 .LC17:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC53:
+.LC56:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC54:
+.LC57:
 	.ascii	"map_ppn:\000"
-.LC55:
+.LC58:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC66:
-	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC70:
+.LC74:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 06eaf15721..4b2ecaf29d 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,18 +5,54 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-01-07
+ * date: 2019-05-08
  */
 	.arch armv8-a
-	.file	"rk_ftl_arm_v8.c"
+	.file	"rk_ftl_arm_v8.S"
+	.section	.text.flash_read_ecc,"ax",@progbits
+	.align	2
+	.type	flash_read_ecc, %function
+flash_read_ecc:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
+	stp	x29, x30, [sp, -32]!
+	add	x2, x1, x0
+	add	x29, sp, 0
+	ldr	x0, [x1, x0]
+	str	x19, [sp, 16]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 122
+	str	w0, [x19, 2056]
+	mov	x0, 80
+	bl	udelay
+	ldr	w1, [x19, 2048]
+	ldr	w0, [x19, 2048]
+	and	w1, w1, 15
+	and	w0, w0, 15
+	cmp	w1, w0
+	csel	w1, w1, w0, cs
+	ldr	w0, [x19, 2048]
+	ldr	w2, [x19, 2048]
+	and	w0, w0, 15
+	ldr	x19, [sp, 16]
+	and	w2, w2, 15
+	cmp	w0, w2
+	csel	w0, w0, w2, cs
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_read_ecc, .-flash_read_ecc
 	.section	.text.ftl_set_blk_mode.part.10,"ax",@progbits
 	.align	2
 	.type	ftl_set_blk_mode.part.10, %function
 ftl_set_blk_mode.part.10:
 	and	w0, w0, 65535
-	adrp	x2, .LANCHOR0
+	adrp	x2, .LANCHOR1
 	ubfx	x1, x0, 5, 11
-	ldr	x3, [x2, #:lo12:.LANCHOR0]
+	ldr	x3, [x2, #:lo12:.LANCHOR1]
 	lsl	x1, x1, 2
 	and	w0, w0, 31
 	mov	w2, 1
@@ -31,29 +67,29 @@ ftl_set_blk_mode.part.10:
 	.global	FlashMemCmp8
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
-	adrp	x3, .LANCHOR1
-	ldrb	w3, [x3, #:lo12:.LANCHOR1]
-	cbz	w3, .L7
+	adrp	x3, .LANCHOR2
+	ldrb	w3, [x3, #:lo12:.LANCHOR2]
+	cbz	w3, .L9
 	ldrb	w4, [x0, 1]
 	ldrb	w3, [x1, 1]
 	cmp	w4, w3
-	beq	.L8
-.L7:
+	beq	.L10
+.L9:
 	mov	x3, 0
-.L5:
+.L7:
 	mov	w4, w3
 	cmp	w3, w2
-	bcc	.L6
-.L8:
+	bcc	.L8
+.L10:
 	mov	w0, 0
 	ret
-.L6:
+.L8:
 	ldrb	w5, [x0, x3]
 	add	x3, x3, 1
 	add	x6, x1, x3
 	ldrb	w6, [x6, -1]
 	cmp	w6, w5
-	beq	.L5
+	beq	.L7
 	add	w0, w4, 1
 	ret
 	.size	FlashMemCmp8, .-FlashMemCmp8
@@ -62,18 +98,18 @@ FlashMemCmp8:
 	.global	FlashRsvdBlkChk
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
-	adrp	x2, .LANCHOR2
-	adrp	x3, .LANCHOR3
+	adrp	x2, .LANCHOR3
+	adrp	x3, .LANCHOR4
 	and	w0, w0, 255
-	ldrb	w2, [x2, #:lo12:.LANCHOR2]
-	ldr	w3, [x3, #:lo12:.LANCHOR3]
+	ldrb	w2, [x2, #:lo12:.LANCHOR3]
+	ldr	w3, [x3, #:lo12:.LANCHOR4]
 	mul	w2, w2, w3
 	cmp	w2, w1
-	bls	.L12
+	bls	.L14
 	cmp	w0, 0
 	cset	w0, ne
 	ret
-.L12:
+.L14:
 	mov	w0, 1
 	ret
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
@@ -83,12 +119,12 @@ FlashRsvdBlkChk:
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
 	and	x3, x1, 127
-	adrp	x2, .LANCHOR4
-	add	x2, x2, :lo12:.LANCHOR4
-	ldrh	w4, [x2, x3, lsl 1]
 	adrp	x2, .LANCHOR5
-	ldrb	w2, [x2, #:lo12:.LANCHOR5]
-	cbz	w2, .L21
+	add	x2, x2, :lo12:.LANCHOR5
+	ldrh	w4, [x2, x3, lsl 1]
+	adrp	x2, .LANCHOR6
+	ldrb	w2, [x2, #:lo12:.LANCHOR6]
+	cbz	w2, .L23
 	stp	x29, x30, [sp, -16]!
 	and	w0, w0, 255
 	add	x29, sp, 0
@@ -99,7 +135,7 @@ FlashGetRandomizer:
 	mov	w0, w4
 	ldp	x29, x30, [sp], 16
 	ret
-.L21:
+.L23:
 	mov	w0, w4
 	ret
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
@@ -110,30 +146,30 @@ FlashGetRandomizer:
 FlashSetRandomizer:
 	and	w5, w0, 255
 	and	x2, x1, 127
-	adrp	x0, .LANCHOR4
-	add	x0, x0, :lo12:.LANCHOR4
-	ldrh	w4, [x0, x2, lsl 1]
 	adrp	x0, .LANCHOR5
-	ldrb	w0, [x0, #:lo12:.LANCHOR5]
-	cbz	w0, .L32
+	add	x0, x0, :lo12:.LANCHOR5
+	ldrh	w4, [x0, x2, lsl 1]
+	adrp	x0, .LANCHOR6
+	ldrb	w0, [x0, #:lo12:.LANCHOR6]
+	cbz	w0, .L34
 	stp	x29, x30, [sp, -16]!
 	mov	w0, w5
 	add	x29, sp, 0
 	bl	FlashRsvdBlkChk
 	cmp	w0, 0
 	sbfiz	x5, x5, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	orr	w1, w4, -1073741824
 	csel	w4, w1, w4, ne
 	ldr	x0, [x0, x5]
 	str	w4, [x0, 336]
 	ldp	x29, x30, [sp], 16
 	ret
-.L32:
+.L34:
 	sbfiz	x5, x5, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x0, [x0, x5]
 	str	w4, [x0, 336]
 	ret
@@ -144,18 +180,18 @@ FlashSetRandomizer:
 	.type	FlashBlockAlignInit, %function
 FlashBlockAlignInit:
 	and	w0, w0, 65535
-	adrp	x1, .LANCHOR3
+	adrp	x1, .LANCHOR4
 	cmp	w0, 256
-	bls	.L36
+	bls	.L38
 	mov	w0, 512
-.L39:
-	str	w0, [x1, #:lo12:.LANCHOR3]
+.L41:
+	str	w0, [x1, #:lo12:.LANCHOR4]
 	ret
-.L36:
+.L38:
 	cmp	w0, 128
-	bls	.L39
+	bls	.L41
 	mov	w0, 256
-	b	.L39
+	b	.L41
 	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",@progbits
 	.align	2
@@ -163,9 +199,9 @@ FlashBlockAlignInit:
 	.type	FlashReadCmd, %function
 FlashReadCmd:
 	and	w0, w0, 255
-	adrp	x4, .LANCHOR6
+	adrp	x4, .LANCHOR0
 	sbfiz	x5, x0, 4, 32
-	add	x4, x4, :lo12:.LANCHOR6
+	add	x4, x4, :lo12:.LANCHOR0
 	add	x2, x4, x5
 	lsr	w3, w1, 16
 	ldr	x4, [x4, x5]
@@ -189,9 +225,9 @@ FlashReadCmd:
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR6
+	adrp	x2, .LANCHOR0
 	sbfiz	x3, x0, 4, 32
-	add	x2, x2, :lo12:.LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR0
 	add	x4, x2, x3
 	and	w5, w1, 255
 	ldr	x6, [x2, x3]
@@ -202,7 +238,7 @@ FlashReadDpDataOutCmd:
 	ldrb	w2, [x4, 8]
 	lsr	w4, w1, 8
 	add	x2, x6, x2, lsl 8
-	bne	.L42
+	bne	.L44
 	mov	w6, 6
 	str	w6, [x2, 2056]
 	str	wzr, [x2, 2052]
@@ -210,11 +246,11 @@ FlashReadDpDataOutCmd:
 	str	w5, [x2, 2052]
 	str	w4, [x2, 2052]
 	str	w3, [x2, 2052]
-.L44:
+.L46:
 	mov	w3, 224
 	str	w3, [x2, 2056]
 	b	FlashSetRandomizer
-.L42:
+.L44:
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
@@ -225,7 +261,7 @@ FlashReadDpDataOutCmd:
 	str	w3, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
-	b	.L44
+	b	.L46
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",@progbits
 	.align	2
@@ -233,9 +269,9 @@ FlashReadDpDataOutCmd:
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
 	and	w0, w0, 255
-	adrp	x4, .LANCHOR6
+	adrp	x4, .LANCHOR0
 	sbfiz	x5, x0, 4, 32
-	add	x4, x4, :lo12:.LANCHOR6
+	add	x4, x4, :lo12:.LANCHOR0
 	add	x2, x4, x5
 	lsr	w3, w1, 16
 	ldr	x4, [x4, x5]
@@ -258,12 +294,12 @@ FlashProgFirstCmd:
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
 	ubfiz	x0, x0, 4, 8
-	adrp	x3, .LANCHOR6
-	add	x3, x3, :lo12:.LANCHOR6
+	adrp	x3, .LANCHOR0
+	add	x3, x3, :lo12:.LANCHOR0
 	add	x4, x3, x0
 	ldr	x3, [x3, x0]
 	ldrb	w0, [x4, 8]
-	cbz	w2, .L47
+	cbz	w2, .L49
 	add	x2, x3, x0, lsl 8
 	mov	w4, 96
 	str	w4, [x2, 2056]
@@ -273,10 +309,10 @@ FlashEraseCmd:
 	str	w4, [x2, 2052]
 	lsr	w4, w1, 16
 	str	w4, [x2, 2052]
-	adrp	x2, .LANCHOR3
-	ldr	w2, [x2, #:lo12:.LANCHOR3]
+	adrp	x2, .LANCHOR4
+	ldr	w2, [x2, #:lo12:.LANCHOR4]
 	add	w1, w1, w2
-.L47:
+.L49:
 	add	x0, x3, x0, lsl 8
 	mov	w2, 96
 	str	w2, [x0, 2056]
@@ -298,8 +334,8 @@ FlashProgDpSecondCmd:
 	and	w0, w0, 255
 	adrp	x2, .LANCHOR7+11
 	sbfiz	x5, x0, 4, 32
-	adrp	x4, .LANCHOR6
-	add	x4, x4, :lo12:.LANCHOR6
+	adrp	x4, .LANCHOR0
+	add	x4, x4, :lo12:.LANCHOR0
 	ldrb	w6, [x2, #:lo12:.LANCHOR7+11]
 	add	x2, x4, x5
 	lsr	w3, w1, 16
@@ -322,8 +358,8 @@ FlashProgDpSecondCmd:
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x2, x1, x0
 	ldr	x1, [x1, x0]
 	ldrb	w0, [x2, 8]
@@ -339,8 +375,8 @@ FlashProgSecondCmd:
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x3, x1, x0
 	ldr	x2, [x1, x0]
 	adrp	x0, .LANCHOR7+10
@@ -357,8 +393,8 @@ FlashProgDpFirstCmd:
 	.type	FlashReadStatus, %function
 FlashReadStatus:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	stp	x29, x30, [sp, -32]!
 	add	x2, x1, x0
 	add	x29, sp, 0
@@ -384,18 +420,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L57:
+.L59:
 	cmp	w1, w3
-	bhi	.L58
+	bhi	.L60
 	ret
-.L58:
+.L60:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L57
+	b	.L59
 	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",@progbits
 	.align	2
@@ -443,10 +479,10 @@ ToshibaSetRRPara:
 	add	x24, x24, x2
 	mov	x22, x0
 	mov	x19, 0
-.L62:
+.L64:
 	ldrb	w0, [x23]
 	cmp	w0, w19
-	bhi	.L66
+	bhi	.L68
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -454,7 +490,7 @@ ToshibaSetRRPara:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L66:
+.L68:
 	mov	w0, 85
 	str	w0, [x21, 8]
 	add	x0, x22, :lo12:.LANCHOR9
@@ -464,20 +500,20 @@ ToshibaSetRRPara:
 	bl	udelay
 	ldrb	w0, [x25]
 	cmp	w0, 34
-	bne	.L63
+	bne	.L65
 	ldrsb	w0, [x24, x19]
-.L68:
+.L70:
 	add	x19, x19, 1
 	str	w0, [x21]
-	b	.L62
-.L63:
+	b	.L64
+.L65:
 	cmp	w0, 35
-	bne	.L65
+	bne	.L67
 	ldrsb	w0, [x20, x19]
-	b	.L68
-.L65:
+	b	.L70
+.L67:
 	ldrsb	w0, [x26, w27, sxtw]
-	b	.L68
+	b	.L70
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",@progbits
 	.align	2
@@ -500,16 +536,16 @@ SamsungSetRRPara:
 	add	x23, x23, :lo12:.LANCHOR12
 	mov	x20, 0
 	mov	w24, 161
-.L70:
+.L72:
 	ldrb	w0, [x23]
 	cmp	w0, w20
-	bhi	.L71
+	bhi	.L73
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L71:
+.L73:
 	str	w24, [x22, 8]
 	str	wzr, [x22]
 	ldrsb	w0, [x20, x19]
@@ -519,7 +555,7 @@ SamsungSetRRPara:
 	str	w0, [x22]
 	mov	x0, 300
 	bl	udelay
-	b	.L70
+	b	.L72
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.section	.text.LogAddr2PhyAddr,"ax",@progbits
 	.align	2
@@ -533,10 +569,10 @@ LogAddr2PhyAddr:
 	ldrh	w5, [x6, 14]
 	mul	w5, w5, w8
 	and	w8, w5, 65535
-	adrp	x5, .LANCHOR3
-	ldrh	w7, [x5, #:lo12:.LANCHOR3]
-	adrp	x5, .LANCHOR1
-	ldrb	w6, [x5, #:lo12:.LANCHOR1]
+	adrp	x5, .LANCHOR4
+	ldrh	w7, [x5, #:lo12:.LANCHOR4]
+	adrp	x5, .LANCHOR2
+	ldrb	w6, [x5, #:lo12:.LANCHOR2]
 	ubfiz	w5, w7, 1, 15
 	cmp	w6, 1
 	ldr	w6, [x0, 4]
@@ -548,14 +584,14 @@ LogAddr2PhyAddr:
 	and	w10, w5, 65535
 	msub	w5, w5, w8, w11
 	and	w5, w5, 65535
-	bne	.L75
+	bne	.L77
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbnz	w1, .L75
+	cbnz	w1, .L77
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	ldrh	w6, [x1, w6, sxtw 1]
-.L75:
+.L77:
 	uxtw	x8, w10
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
@@ -565,14 +601,14 @@ LogAddr2PhyAddr:
 	add	w5, w5, w6
 	str	w5, [x2]
 	str	w10, [x3]
-	bls	.L77
+	bls	.L79
 	ldr	w1, [x0, 4]
 	ldr	w0, [x0, 60]
 	add	w1, w1, 1024
 	cmp	w1, w0
 	cset	w0, eq
 	ret
-.L77:
+.L79:
 	mov	w0, 0
 	ret
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
@@ -583,8 +619,8 @@ LogAddr2PhyAddr:
 FlashReadStatusEN:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 8
-	adrp	x3, .LANCHOR6
-	add	x3, x3, :lo12:.LANCHOR6
+	adrp	x3, .LANCHOR0
+	add	x3, x3, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	add	x4, x3, x0
@@ -594,26 +630,26 @@ FlashReadStatusEN:
 	ldrb	w19, [x4, 8]
 	ldrb	w0, [x0, 8]
 	cmp	w0, 2
-	bne	.L79
+	bne	.L81
 	and	w2, w2, 255
 	adrp	x0, .LANCHOR7
-	cbnz	w2, .L80
+	cbnz	w2, .L82
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 13]
-.L90:
+.L92:
 	add	x2, x19, 8
 	add	x0, x0, :lo12:.LANCHOR7
 	add	x2, x20, x2, lsl 8
 	str	w3, [x2, 8]
 	ldrb	w4, [x0, 15]
-	cbz	w4, .L84
+	cbz	w4, .L86
 	add	x3, x19, 8
 	mov	w2, 0
 	add	x3, x20, x3, lsl 8
-.L83:
+.L85:
 	cmp	w2, w4
-	bcc	.L85
-.L84:
+	bcc	.L87
+.L86:
 	add	x19, x19, 8
 	mov	x0, 80
 	lsl	x19, x19, 8
@@ -623,23 +659,23 @@ FlashReadStatusEN:
 	and	w0, w0, 255
 	ldp	x29, x30, [sp], 32
 	ret
-.L80:
+.L82:
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 14]
-	b	.L90
-.L85:
+	b	.L92
+.L87:
 	lsl	w0, w2, 3
 	add	w2, w2, 1
 	lsr	w0, w1, w0
 	and	w0, w0, 255
 	str	w0, [x3, 4]
-	b	.L83
-.L79:
+	b	.L85
+.L81:
 	add	x0, x19, 8
 	mov	w1, 112
 	add	x0, x20, x0, lsl 8
 	str	w1, [x0, 8]
-	b	.L84
+	b	.L86
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",@progbits
 	.align	2
@@ -653,15 +689,15 @@ FlashWaitReadyEN:
 	str	x21, [sp, 32]
 	mov	w20, w1
 	and	w21, w2, 255
-.L95:
+.L97:
 	mov	w1, w20
 	mov	w2, w21
 	mov	w0, w19
 	bl	FlashReadStatusEN
 	mov	w1, w0
 	cmp	w0, 255
-	beq	.L95
-	tbz	x1, 6, .L95
+	beq	.L97
+	tbz	x1, 6, .L97
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -680,8 +716,8 @@ NandcReadDontCaseBusyEn:
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x2, x1, x0
 	ldr	x0, [x1, x0]
 	ldrb	w2, [x2, 8]
@@ -741,7 +777,7 @@ NandcSetMode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x2]
-	beq	.L107
+	beq	.L109
 	orr	w1, w1, 24576
 	tst	x0, 4
 	and	w1, w1, -32769
@@ -757,13 +793,13 @@ NandcSetMode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-.L109:
+.L111:
 	mov	w0, 0
 	str	w1, [x2]
 	ret
-.L107:
+.L109:
 	and	w1, w1, -8193
-	b	.L109
+	b	.L111
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",@progbits
 	.align	2
@@ -771,8 +807,8 @@ NandcSetMode:
 	.type	NandcFlashCs, %function
 NandcFlashCs:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x3, x1, x0
 	ldr	x2, [x1, x0]
 	mov	w1, 1
@@ -789,8 +825,8 @@ NandcFlashCs:
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	ldr	x1, [x1, x0]
 	ldr	w0, [x1]
 	and	w0, w0, -256
@@ -818,18 +854,18 @@ HynixSetRRPara:
 	adrp	x19, .LANCHOR20
 	ldrb	w0, [x0, 19]
 	cmp	w0, 6
-	bne	.L115
+	bne	.L117
 	add	x0, x19, :lo12:.LANCHOR20
 	ubfiz	x19, x22, 6, 8
 	add	x19, x19, 20
 	add	x19, x19, x21, uxtw 2
-.L122:
+.L124:
 	add	x19, x0, x19
-.L116:
+.L118:
 	sxtw	x25, w22
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR0
 	lsl	x1, x25, 4
-	add	x0, x0, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	and	x26, x26, 255
 	mov	x24, 0
@@ -841,9 +877,9 @@ HynixSetRRPara:
 	add	x23, x23, x5
 	mov	w0, 54
 	str	w0, [x23, 2056]
-.L119:
+.L121:
 	cmp	x24, x26
-	bne	.L120
+	bne	.L122
 	mov	w0, 22
 	str	w0, [x23, 2056]
 	mov	w0, w22
@@ -857,33 +893,33 @@ HynixSetRRPara:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L115:
+.L117:
 	cmp	w0, 7
-	bne	.L117
+	bne	.L119
 	add	x0, x19, :lo12:.LANCHOR20
 	mov	x1, 28
 	mov	w19, 160
 	umaddl	x1, w19, w22, x1
 	mov	w19, 10
 	umaddl	x19, w21, w19, x1
-	b	.L122
-.L117:
+	b	.L124
+.L119:
 	cmp	w0, 8
-	bne	.L118
+	bne	.L120
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x0, x19, 28
 	add	w19, w21, w21, lsl 2
 	add	x19, x0, x19, sxtw
-	b	.L116
-.L118:
+	b	.L118
+.L120:
 	add	x0, x19, :lo12:.LANCHOR20
 	and	x19, x21, 255
 	add	x19, x19, 2
 	add	x19, x19, x22, uxtw 3
 	add	x19, x0, x19, lsl 3
 	add	x19, x19, 4
-	b	.L116
-.L120:
+	b	.L118
+.L122:
 	ldrb	w0, [x20, x24]
 	str	w0, [x23, 2052]
 	mov	x0, 200
@@ -891,7 +927,7 @@ HynixSetRRPara:
 	ldrsb	w0, [x19, x24]
 	add	x24, x24, 1
 	str	w0, [x23, 2048]
-	b	.L119
+	b	.L121
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -904,7 +940,7 @@ FlashSetReadRetryDefault:
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L130
+	bhi	.L132
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -915,25 +951,25 @@ FlashSetReadRetryDefault:
 	add	x22, x20, 4
 	add	x21, x21, :lo12:.LANCHOR22
 	mov	x19, 0
-.L126:
+.L128:
 	lsl	x1, x19, 3
 	and	w0, w19, 255
 	ldrb	w1, [x1, x21]
 	cmp	w1, 173
-	bne	.L125
+	bne	.L127
 	ldrb	w1, [x20, 1]
 	mov	w3, 0
 	mov	x2, x22
 	bl	HynixSetRRPara
-.L125:
+.L127:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L126
+	bne	.L128
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L130:
+.L132:
 	ret
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",@progbits
@@ -951,7 +987,7 @@ FlashWaitCmdDone:
 	stp	x19, x20, [sp, 16]
 	add	x19, x1, x0
 	ldr	x2, [x19, 8]
-	cbz	x2, .L135
+	cbz	x2, .L137
 	ldrb	w20, [x1, x0]
 	mov	w0, w20
 	bl	NandcFlashCs
@@ -971,10 +1007,10 @@ FlashWaitCmdDone:
 	str	w0, [x1]
 	ldr	x1, [x19, 16]
 	str	xzr, [x19, 8]
-	cbz	x1, .L135
+	cbz	x1, .L137
 	str	w0, [x1]
 	str	xzr, [x19, 16]
-.L135:
+.L137:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -1000,30 +1036,30 @@ NandcDelayns:
 NandcWaitFlashReadyNoDelay:
 	stp	x29, x30, [sp, -48]!
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 34464
 	ldr	x20, [x1, x0]
 	movk	w19, 0x1, lsl 16
-.L145:
+.L147:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L146
+	tbnz	x0, 9, .L148
 	mov	x0, 10
 	bl	udelay
 	subs	w19, w19, #1
-	bne	.L145
+	bne	.L147
 	mov	w0, -1
-.L143:
+.L145:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L146:
+.L148:
 	mov	w0, 0
-	b	.L143
+	b	.L145
 	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",@progbits
 	.align	2
@@ -1032,8 +1068,8 @@ NandcWaitFlashReadyNoDelay:
 NandcWaitFlashReady:
 	stp	x29, x30, [sp, -48]!
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 34464
@@ -1041,23 +1077,23 @@ NandcWaitFlashReady:
 	ldr	x20, [x1, x0]
 	mov	x0, 150
 	bl	udelay
-.L151:
+.L153:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L152
+	tbnz	x0, 9, .L154
 	mov	x0, 10
 	bl	udelay
 	subs	w19, w19, #1
-	bne	.L151
+	bne	.L153
 	mov	w0, -1
-.L149:
+.L151:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L152:
+.L154:
 	mov	w0, 0
-	b	.L149
+	b	.L151
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",@progbits
 	.align	2
@@ -1069,8 +1105,8 @@ FlashReset:
 	str	x19, [sp, 16]
 	and	w19, w0, 255
 	sbfiz	x1, x19, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x5, [x0, x1]
 	mov	w0, w19
@@ -1098,12 +1134,12 @@ flash_enter_slc_mode:
 	and	w20, w0, 255
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L157
+	cbz	w0, .L159
 	mov	w0, w20
 	bl	NandcFlashCs
 	sbfiz	x1, x20, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x0, [x0, x1]
 	ldrb	w19, [x2, 8]
@@ -1129,7 +1165,7 @@ flash_enter_slc_mode:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L157:
+.L159:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -1145,12 +1181,12 @@ flash_exit_slc_mode:
 	and	w20, w0, 255
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L160
+	cbz	w0, .L162
 	mov	w0, w20
 	bl	NandcFlashCs
 	sbfiz	x1, x20, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x0, [x0, x1]
 	ldrb	w19, [x2, 8]
@@ -1177,7 +1213,7 @@ flash_exit_slc_mode:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L160:
+.L162:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -1223,8 +1259,8 @@ FlashEraseBlock:
 FlashSetInterfaceMode:
 	stp	x29, x30, [sp, -16]!
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR6
-	add	x2, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
 	add	x29, sp, 0
 	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	adrp	x7, .LANCHOR22
@@ -1241,71 +1277,71 @@ FlashSetInterfaceMode:
 	mov	w15, 32
 	mov	w16, 5
 	mov	w17, 44
-.L175:
+.L177:
 	ldrb	w3, [x5, x7]
 	ldrb	w4, [x2]
 	cmp	w3, 152
 	ccmp	w3, w13, 4, ne
-	beq	.L166
+	beq	.L168
 	cmp	w3, 173
 	ccmp	w3, w17, 4, ne
-	bne	.L167
-.L166:
+	bne	.L169
+.L168:
 	cmp	w0, 1
 	ldr	x1, [x2, -8]
-	bne	.L168
-	cbz	w6, .L167
+	bne	.L170
+	cbz	w6, .L169
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L169
+	bne	.L171
 	str	w0, [x1, 2052]
-.L187:
+.L189:
 	str	wzr, [x1, 2048]
-	b	.L173
-.L169:
+	b	.L175
+.L171:
 	cmp	w3, 44
-	bne	.L171
+	bne	.L173
 	str	w0, [x1, 2052]
 	str	w16, [x1, 2048]
-.L173:
+.L175:
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
-.L167:
+.L169:
 	add	x5, x5, 8
 	add	x2, x2, 16
 	cmp	x5, 32
-	bne	.L175
+	bne	.L177
 	mov	w0, 0
 	bl	NandcWaitFlashReady
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L171:
+.L173:
 	str	w10, [x1, 2052]
 	str	w0, [x1, 2048]
-	b	.L173
-.L168:
-	cbz	w12, .L167
+	b	.L175
+.L170:
+	cbz	w12, .L169
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L172
+	bne	.L174
 	str	w11, [x1, 2052]
 	str	w15, [x1, 2048]
-	b	.L173
-.L172:
+	b	.L175
+.L174:
 	cmp	w3, 44
-	bne	.L174
+	bne	.L176
 	str	w11, [x1, 2052]
 	str	w14, [x1, 2048]
-	b	.L173
-.L174:
+	b	.L175
+.L176:
 	str	w10, [x1, 2052]
-	b	.L187
+	b	.L189
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",@progbits
 	.align	2
@@ -1337,24 +1373,24 @@ SandiskSetRRPara:
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L189:
+.L191:
 	cmp	w3, w0
-	bhi	.L192
+	bhi	.L194
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L192:
+.L194:
 	cmp	w4, 67
-	bne	.L190
+	bne	.L192
 	ldrsb	w5, [x1, x0]
-.L194:
+.L196:
 	add	x0, x0, 1
 	str	w5, [x20]
-	b	.L189
-.L190:
+	b	.L191
+.L192:
 	ldrsb	w5, [x2, x0]
-	b	.L194
+	b	.L196
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",@progbits
 	.align	2
@@ -1369,8 +1405,8 @@ micron_auto_read_calibration_config:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	sbfiz	x0, x19, 4, 32
-	adrp	x2, .LANCHOR6
-	add	x2, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
 	add	x1, x2, x0
 	ldr	x0, [x2, x0]
 	ldrb	w19, [x1, 8]
@@ -1406,16 +1442,16 @@ FlashEraseSLc2KBlocks:
 	mov	x20, x0
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x24, .LANCHOR26
-.L198:
+.L200:
 	cmp	x20, x22
-	bne	.L203
+	bne	.L205
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L203:
+.L205:
 	mov	w1, 0
 	mov	w4, w21
 	add	x3, x29, 76
@@ -1425,15 +1461,15 @@ FlashEraseSLc2KBlocks:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 76]
 	cmp	w1, w0
-	bhi	.L199
+	bhi	.L201
 	mov	w0, -1
 	str	w0, [x20]
-.L200:
+.L202:
 	sub	w21, w21, #1
 	add	x20, x20, 56
 	and	w21, w21, 255
-	b	.L198
-.L199:
+	b	.L200
+.L201:
 	uxtw	x0, w0
 	add	x1, x24, :lo12:.LANCHOR26
 	ldrb	w19, [x1, x0]
@@ -1457,10 +1493,10 @@ FlashEraseSLc2KBlocks:
 	bl	FlashReadStatus
 	sbfx	x0, x0, 0, 1
 	str	w0, [x20]
-	adrp	x0, .LANCHOR3
+	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 72]
 	mov	w2, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w19
 	bl	FlashEraseCmd
@@ -1469,21 +1505,21 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29, 72]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L201
+	tbz	x0, 0, .L203
 	mov	w0, -1
 	str	w0, [x20]
-.L201:
+.L203:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L202
+	bne	.L204
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L202:
+.L204:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L200
+	b	.L202
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -1494,48 +1530,48 @@ FlashEraseBlocks:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w1
-	adrp	x1, .LANCHOR1
+	adrp	x1, .LANCHOR2
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
 	mov	w22, w2
-	ldrb	w1, [x1, #:lo12:.LANCHOR1]
+	ldrb	w1, [x1, #:lo12:.LANCHOR2]
 	stp	x25, x26, [sp, 64]
-	cbnz	w1, .L209
+	cbnz	w1, .L211
 	adrp	x25, .LANCHOR23
 	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
 	mov	w20, 0
-.L210:
+.L212:
 	cmp	w20, w22
 	adrp	x13, .LANCHOR25
-	bcc	.L219
+	bcc	.L221
 	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x13, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L220:
+.L222:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L222
+	bhi	.L224
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L223
-.L224:
+	cbnz	w0, .L225
+.L226:
 	mov	w0, 0
-	b	.L208
-.L209:
+	b	.L210
+.L211:
 	mov	w1, w2
 	bl	FlashEraseSLc2KBlocks
-.L208:
+.L210:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L219:
+.L221:
 	mov	w12, 56
 	mov	w1, 0
 	sub	w4, w22, w20
@@ -1549,13 +1585,13 @@ FlashEraseBlocks:
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
-	bhi	.L212
+	bhi	.L214
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L213:
+.L215:
 	add	w20, w20, 1
-	b	.L210
-.L212:
+	b	.L212
+.L214:
 	adrp	x1, .LANCHOR27
 	add	x2, x25, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -1565,20 +1601,20 @@ FlashEraseBlocks:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L215
+	cbz	x1, .L217
 	bl	FlashWaitCmdDone
-.L215:
+.L217:
 	ldp	w2, w1, [x29, 88]
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
 	stp	x21, xzr, [x0, 8]
-	cbz	w23, .L216
+	cbz	w23, .L218
 	add	w2, w20, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L216:
+.L218:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, x1]
@@ -1588,13 +1624,13 @@ FlashEraseBlocks:
 	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
-	bne	.L217
+	bne	.L219
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L217
+	cbz	w0, .L219
 	mov	w0, w21
 	bl	flash_enter_slc_mode
-.L218:
+.L220:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
@@ -1611,37 +1647,37 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	w0, w21
 	bl	NandcFlashDeCs
-	b	.L213
-.L217:
+	b	.L215
+.L219:
 	mov	w0, w21
 	bl	flash_exit_slc_mode
-	b	.L218
-.L222:
+	b	.L220
+.L224:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
-	bne	.L221
+	bne	.L223
 	ldrb	w0, [x21]
-	cbz	w0, .L221
+	cbz	w0, .L223
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L221:
-	add	x20, x20, 1
-	b	.L220
 .L223:
+	add	x20, x20, 1
+	b	.L222
+.L225:
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 69
-	bne	.L224
+	bne	.L226
 	mov	w0, 56
 	umaddl	x22, w22, w0, x19
-.L225:
+.L227:
 	cmp	x22, x19
-	beq	.L224
+	beq	.L226
 	str	wzr, [x19], 56
-	b	.L225
+	b	.L227
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1653,9 +1689,9 @@ FlashReadDpCmd:
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
 	mov	w21, w1
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR0
 	sbfiz	x1, x22, 4, 32
-	add	x0, x0, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x3, x0, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
@@ -1675,7 +1711,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L241
+	bne	.L243
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1687,7 +1723,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L244:
+.L246:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1700,12 +1736,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L241:
+.L243:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L244
+	b	.L246
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1720,33 +1756,33 @@ FlashDeInit:
 	bl	FlashSetReadRetryDefault
 	adrp	x0, .LANCHOR29
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L246
+	cbz	w0, .L248
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L247:
+.L249:
 	adrp	x19, .LANCHOR30
 	ldrb	w0, [x19, #:lo12:.LANCHOR30]
-	cbz	w0, .L248
+	cbz	w0, .L250
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L248
+	tbz	x0, 0, .L250
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x19, #:lo12:.LANCHOR30]
-.L248:
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+.L250:
+	adrp	x0, .LANCHOR0
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	str	wzr, [x0, 336]
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L246:
+.L248:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-	b	.L247
+	b	.L249
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",@progbits
 	.align	2
@@ -1754,8 +1790,8 @@ FlashDeInit:
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
 	ubfiz	x0, x0, 4, 8
-	adrp	x2, .LANCHOR6
-	add	x2, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
 	ldr	x0, [x2, x0]
 	str	w1, [x0, 336]
 	ret
@@ -1767,21 +1803,21 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L258
+	bhi	.L260
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L261:
+.L263:
 	str	w1, [x0, 4]
 	ret
-.L258:
+.L260:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L260
+	bls	.L262
 	mov	w1, 8322
-	b	.L261
-.L260:
+	b	.L263
+.L262:
 	mov	w1, 4225
-	b	.L261
+	b	.L263
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
@@ -1806,24 +1842,24 @@ NandcBchSel:
 	adrp	x1, .LANCHOR32
 	str	w0, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 4096
-	bne	.L264
-.L267:
+	bne	.L266
+.L269:
 	and	w1, w1, -17
-.L265:
+.L267:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L264:
+.L266:
 	cmp	w0, 24
-	bne	.L266
+	bne	.L268
 	orr	w1, w1, 16
-	b	.L265
-.L266:
+	b	.L267
+.L268:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L265
-	b	.L267
+	bne	.L267
+	b	.L269
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
@@ -1905,11 +1941,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L281:
+.L283:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L281
+	tbz	x1, 20, .L283
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1924,8 +1960,8 @@ NandcXferStart:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w1, 255
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	add	x6, x1, x0
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
@@ -1947,7 +1983,7 @@ NandcXferStart:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L286
+	bls	.L288
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1955,11 +1991,11 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L287
+	beq	.L289
 	and	w2, w2, 255
 	adrp	x20, .LANCHOR35
-	cbnz	w24, .L288
-.L296:
+	cbnz	w24, .L290
+.L298:
 	ldr	x0, [x20, #:lo12:.LANCHOR35]
 	add	w2, w2, 1
 	cmp	x4, 0
@@ -2001,12 +2037,12 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L297
+	bne	.L299
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L297:
+.L299:
 	ldr	w0, [x29, 88]
 	cmp	w24, 0
 	cset	w1, eq
@@ -2018,10 +2054,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L287:
+.L289:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L286:
+.L288:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -2032,7 +2068,7 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L288:
+.L290:
 	adrp	x0, .LANCHOR32
 	mov	w6, 64
 	lsr	w11, w2, 1
@@ -2046,24 +2082,24 @@ NandcXferStart:
 	csel	w6, w6, w0, cc
 	add	x0, x20, :lo12:.LANCHOR35
 	ldr	x10, [x0, 8]
-.L292:
+.L294:
 	cmp	w3, w11
-	bcs	.L296
+	bcs	.L298
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L293
+	cbz	x5, .L295
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L294:
+.L296:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L292
-.L293:
-	str	w12, [x10, x0]
 	b	.L294
+.L295:
+	str	w12, [x10, x0]
+	b	.L296
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -2071,65 +2107,65 @@ NandcXferStart:
 	.type	NandcXferComp, %function
 NandcXferComp:
 	ubfiz	x0, x0, 4, 8
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
+	adrp	x1, .LANCHOR0
+	add	x1, x1, :lo12:.LANCHOR0
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	x3, [x1, x0]
 	adrp	x0, .LANCHOR34
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, 3
-	bls	.L325
+	bls	.L327
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L325
+	tbz	x0, 2, .L327
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L313
+	tbz	x0, 1, .L315
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
-.L308:
+.L310:
 	ldr	w1, [x3, 28]
 	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L309
+	bge	.L311
 	cmp	w2, 5
-	bls	.L308
+	bls	.L310
 	ldr	w0, [x3]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbz	x0, 13, .L308
+	tbz	x0, 13, .L310
 	ldr	w0, [x29, 24]
-	tbz	x0, 17, .L308
-.L309:
+	tbz	x0, 17, .L310
+.L311:
 	adrp	x0, .LANCHOR35+40
 	str	wzr, [x0, #:lo12:.LANCHOR35+40]
-.L304:
+.L306:
 	ldp	x29, x30, [sp], 32
 	ret
-.L313:
+.L315:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L313
+	tbz	x0, 20, .L315
 	adrp	x0, .LANCHOR36
 	mov	x4, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR36]
-	cbz	w1, .L314
+	cbz	w1, .L316
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L314:
+.L316:
 	ldr	w0, [x4, #:lo12:.LANCHOR36]
-	cbz	w0, .L309
+	cbz	w0, .L311
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
-	b	.L309
-.L325:
+	b	.L311
+.L327:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L325
-	b	.L304
+	tbz	x0, 20, .L327
+	b	.L306
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -2138,16 +2174,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L334:
+.L336:
 	cmp	w2, w0
-	bls	.L335
+	bls	.L337
 	sub	w0, w1, #1
 	ret
-.L335:
+.L337:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L334
+	b	.L336
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2210,28 +2246,28 @@ FtlConstantsInit:
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
 	str	x19, [sp, 16]
-.L339:
+.L341:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L339
+	bne	.L341
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L340
+	bcs	.L342
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
 	add	x1, x1, :lo12:.LANCHOR47
 	mov	w7, 0
-.L341:
+.L343:
 	cmp	w7, w0
-	bcs	.L343
+	bcs	.L345
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L344
-.L342:
+	b	.L346
+.L344:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2240,35 +2276,35 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L344:
+.L346:
 	cmp	w12, w2
-	bcc	.L342
+	bcc	.L344
 	add	w7, w7, 1
-	b	.L341
-.L343:
+	b	.L343
+.L345:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
-.L340:
+.L342:
 	adrp	x1, .LANCHOR48
 	adrp	x13, .LANCHOR49
 	mov	w2, 5
 	cmp	w11, 1
 	strh	w2, [x1, #:lo12:.LANCHOR48]
 	strh	wzr, [x13, #:lo12:.LANCHOR49]
-	bne	.L345
+	bne	.L347
 	strh	w11, [x1, #:lo12:.LANCHOR48]
-.L345:
+.L347:
 	adrp	x8, .LANCHOR50
 	mov	w1, 4352
 	strh	w1, [x8, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR1
-	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L346
+	adrp	x1, .LANCHOR2
+	ldrb	w11, [x1, #:lo12:.LANCHOR2]
+	cbz	w11, .L348
 	mov	w1, 384
 	strh	w1, [x8, #:lo12:.LANCHOR50]
-.L346:
+.L348:
 	ldrh	w4, [x4, #:lo12:.LANCHOR45]
 	adrp	x1, .LANCHOR38
 	ldrh	w3, [x6, #:lo12:.LANCHOR41]
@@ -2308,10 +2344,10 @@ FtlConstantsInit:
 	adrp	x0, .LANCHOR43
 	mul	w1, w4, w3
 	str	w1, [x0, #:lo12:.LANCHOR43]
-	bls	.L347
+	bls	.L349
 	and	w0, w3, 255
 	strh	w0, [x13, #:lo12:.LANCHOR49]
-.L347:
+.L349:
 	ldrh	w0, [x13, #:lo12:.LANCHOR49]
 	adrp	x1, .LANCHOR60
 	sub	w0, w3, w0
@@ -2327,13 +2363,13 @@ FtlConstantsInit:
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L348
-.L364:
+	bls	.L350
+.L366:
 	strh	w0, [x10, #:lo12:.LANCHOR61]
-	cbz	w11, .L350
+	cbz	w11, .L352
 	mov	w0, 640
 	strh	w0, [x8, #:lo12:.LANCHOR50]
-.L350:
+.L352:
 	ldrh	w0, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR62
 	lsl	w3, w3, 6
@@ -2355,8 +2391,8 @@ FtlConstantsInit:
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L351
-.L365:
+	beq	.L353
+.L367:
 	str	w3, [x8, #:lo12:.LANCHOR37]
 	ldrh	w0, [x8, #:lo12:.LANCHOR37]
 	bl	FtlSysBlkNumInit
@@ -2388,13 +2424,13 @@ FtlConstantsInit:
 	ldr	w1, [x4, #:lo12:.LANCHOR64]
 	add	w3, w1, 3
 	str	w3, [x4, #:lo12:.LANCHOR64]
-	cbz	w6, .L353
+	cbz	w6, .L355
 	add	w1, w1, 5
 	add	w2, w2, 4
 	strh	w2, [x10, #:lo12:.LANCHOR61]
-.L366:
+.L368:
 	str	w1, [x4, #:lo12:.LANCHOR64]
-.L354:
+.L356:
 	adrp	x1, .LANCHOR40
 	adrp	x3, .LANCHOR69
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
@@ -2407,25 +2443,25 @@ FtlConstantsInit:
 	add	w0, w0, w1
 	ldrh	w1, [x15, #:lo12:.LANCHOR55]
 	cmp	w0, w1, lsl 9
-	bcs	.L355
+	bcs	.L357
 	mov	w0, 1
 	strh	w0, [x3, #:lo12:.LANCHOR69]
-.L355:
+.L357:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L348:
+.L350:
 	mov	w0, 4
-	b	.L364
-.L351:
-	add	w3, w3, 4
-	b	.L365
+	b	.L366
 .L353:
+	add	w3, w3, 4
+	b	.L367
+.L355:
 	cmp	w3, 7
-	bhi	.L354
+	bhi	.L356
 	mov	w1, 8
-	b	.L366
+	b	.L368
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
@@ -2435,24 +2471,24 @@ IsBlkInVendorPart:
 	adrp	x1, .LANCHOR70
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR70]
-	cbz	w1, .L371
+	cbz	w1, .L373
 	adrp	x1, .LANCHOR61
 	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	adrp	x1, .LANCHOR71
 	ldr	x3, [x1, #:lo12:.LANCHOR71]
 	mov	x1, 0
-.L369:
-	cmp	w2, w1, uxth
-	bhi	.L370
 .L371:
+	cmp	w2, w1, uxth
+	bhi	.L372
+.L373:
 	mov	w0, 0
 	ret
-.L370:
+.L372:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L369
+	bne	.L371
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2639,12 +2675,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L387
+	bls	.L389
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L387:
+.L389:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2685,18 +2721,18 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L391
+	bcc	.L393
 	adrp	x0, .LANCHOR75
 	add	x2, x0, :lo12:.LANCHOR75
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L391
+	beq	.L393
 	and	w1, w1, 65535
-	cbz	w1, .L393
+	cbz	w1, .L395
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L393
+	cbnz	w0, .L395
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
@@ -2717,7 +2753,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR79]
-.L393:
+.L395:
 	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -2728,7 +2764,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L391:
+.L393:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2742,7 +2778,7 @@ FtlFreeSysBLkSort:
 	adrp	x0, .LANCHOR75
 	add	x1, x0, :lo12:.LANCHOR75
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L401
+	cbz	w2, .L403
 	adrp	x2, .LANCHOR80+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -2750,16 +2786,16 @@ FtlFreeSysBLkSort:
 	ldrh	w5, [x2, #:lo12:.LANCHOR80+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L403:
+.L405:
 	cmp	w5, w4
-	bgt	.L404
-	cbz	w6, .L401
+	bgt	.L406
+	cbz	w6, .L403
 	add	x0, x0, :lo12:.LANCHOR75
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L401:
+.L403:
 	ret
-.L404:
+.L406:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -2771,7 +2807,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L403
+	b	.L405
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
@@ -2788,9 +2824,9 @@ FtlFreeSysBlkQueueOut:
 	adrp	x22, .LANCHOR76
 	mov	x23, x19
 	add	x22, x22, :lo12:.LANCHOR76
-.L411:
+.L413:
 	ldrh	w1, [x19, 6]
-	cbz	w1, .L412
+	cbz	w1, .L414
 	ldrh	w0, [x19, 2]
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
@@ -2800,7 +2836,7 @@ FtlFreeSysBlkQueueOut:
 	strh	w0, [x19, 2]
 	ldr	w0, [x22]
 	ldrh	w20, [x2, 8]
-	cbnz	w0, .L413
+	cbnz	w0, .L415
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR77
@@ -2811,11 +2847,11 @@ FtlFreeSysBlkQueueOut:
 	str	w2, [x0, 4]
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L414
+	cbz	w2, .L416
 	mov	w2, 1
 	mov	w1, 0
 	bl	FlashEraseBlocks
-.L414:
+.L416:
 	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	w2, 1
 	mov	w1, w2
@@ -2830,25 +2866,25 @@ FtlFreeSysBlkQueueOut:
 	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR79]
-.L413:
+.L415:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L416
+	bcs	.L418
 	ldrh	w2, [x23, 6]
 	mov	w1, w20
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-	b	.L411
-.L412:
+	b	.L413
+.L414:
 	adrp	x0, .LC3
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L415:
-	b	.L415
-.L416:
+.L417:
+	b	.L417
+.L418:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2873,18 +2909,18 @@ test_node_in_list:
 	mul	x0, x0, x4
 	mov	w4, 6
 	and	w0, w0, 65535
-.L423:
+.L425:
 	cmp	w0, w1
-	beq	.L424
+	beq	.L426
 	ldrh	w0, [x2]
 	cmp	w0, w5
-	beq	.L425
+	beq	.L427
 	umaddl	x2, w0, w4, x3
-	b	.L423
-.L424:
+	b	.L425
+.L426:
 	mov	w0, 1
 	ret
-.L425:
+.L427:
 	mov	w0, 0
 	ret
 	.size	test_node_in_list, .-test_node_in_list
@@ -2897,7 +2933,7 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w14, [x1, #:lo12:.LANCHOR40]
 	cmp	w14, w0
-	bls	.L442
+	bls	.L444
 	adrp	x1, .LANCHOR81
 	mov	w3, 6
 	ldr	x6, [x1, #:lo12:.LANCHOR81]
@@ -2909,12 +2945,12 @@ insert_data_list:
 	adrp	x1, .LANCHOR82
 	mov	x15, x1
 	ldr	x12, [x1, #:lo12:.LANCHOR82]
-	cbnz	x12, .L429
+	cbnz	x12, .L431
 	str	x5, [x1, #:lo12:.LANCHOR82]
-.L442:
+.L444:
 	mov	w0, 0
 	ret
-.L429:
+.L431:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR83
 	ubfiz	x2, x0, 1, 16
@@ -2941,13 +2977,13 @@ insert_data_list:
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L437:
+.L439:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L428
+	bcc	.L430
 	cmp	w1, w0
-	beq	.L428
+	beq	.L430
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2955,46 +2991,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L433
+	bne	.L435
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L435
-.L434:
+	bcc	.L437
+.L436:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L438
+	bne	.L440
 	strh	w0, [x4, 2]
 	str	x5, [x15, #:lo12:.LANCHOR82]
-	b	.L428
-.L433:
-	bcc	.L434
+	b	.L430
 .L435:
+	bcc	.L436
+.L437:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L436
+	bne	.L438
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
 	adrp	x0, .LANCHOR84
 	str	x5, [x0, #:lo12:.LANCHOR84]
-.L428:
+.L430:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L436:
+.L438:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L437
-.L438:
+	b	.L439
+.L440:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L428
+	b	.L430
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -3012,7 +3048,7 @@ INSERT_DATA_LIST:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L444
+	bcs	.L446
 	mov	w2, 210
 	adrp	x1, .LANCHOR86
 	adrp	x0, .LC5
@@ -3025,7 +3061,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L444:
+.L446:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -3037,7 +3073,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L448
+	beq	.L450
 	adrp	x1, .LANCHOR81
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR81]
@@ -3049,12 +3085,12 @@ insert_free_list:
 	adrp	x1, .LANCHOR87
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR87]
-	cbnz	x5, .L449
+	cbnz	x5, .L451
 	str	x4, [x1, #:lo12:.LANCHOR87]
-.L448:
+.L450:
 	mov	w0, 0
 	ret
-.L449:
+.L451:
 	adrp	x1, .LANCHOR78
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -3066,37 +3102,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L452:
+.L454:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L450
+	bcs	.L452
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L451
+	bne	.L453
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L448
-.L451:
+	b	.L450
+.L453:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L452
-.L450:
+	b	.L454
+.L452:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L453
+	bne	.L455
 	strh	w0, [x2, 2]
 	str	x4, [x12, #:lo12:.LANCHOR87]
-	b	.L448
-.L453:
+	b	.L450
+.L455:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L448
+	b	.L450
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -3114,7 +3150,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L454
+	bcs	.L456
 	mov	w2, 203
 	adrp	x1, .LANCHOR89
 	adrp	x0, .LC5
@@ -3127,7 +3163,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L454:
+.L456:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3151,10 +3187,10 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L458
+	bne	.L460
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L458
+	beq	.L460
 	mov	w2, 386
 	adrp	x1, .LANCHOR90
 	adrp	x0, .LC5
@@ -3166,16 +3202,16 @@ List_remove_node:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L458:
+.L460:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L459
+	bne	.L461
 	cmp	w0, w1
-	bne	.L460
+	bne	.L462
 	str	xzr, [x22]
-.L461:
+.L463:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3185,27 +3221,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L460:
+.L462:
 	ldr	x1, [x20, #:lo12:.LANCHOR81]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L461
-.L459:
+	b	.L463
+.L461:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L462
+	bne	.L464
 	cmp	w1, w0
-	beq	.L461
+	beq	.L463
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR81]
 	strh	w2, [x0, x1]
-	b	.L461
-.L462:
+	b	.L463
+.L464:
 	ldr	x2, [x20, #:lo12:.LANCHOR81]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -3213,7 +3249,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L461
+	b	.L463
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3221,7 +3257,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L470
+	cbz	x2, .L472
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR81
 	and	w1, w1, 65535
@@ -3230,9 +3266,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR81]
-.L466:
-	cbnz	w1, .L467
-.L469:
+.L468:
+	cbnz	w1, .L469
+.L471:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3245,15 +3281,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L467:
+.L469:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L469
+	beq	.L471
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L466
-.L470:
+	b	.L468
+.L472:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3265,26 +3301,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR82
 	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	cbz	x1, .L480
+	cbz	x1, .L482
 	adrp	x0, .LANCHOR81
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
-.L477:
-	cbz	w2, .L478
+.L479:
+	cbz	w2, .L480
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L479
+	bne	.L481
 	ret
-.L479:
+.L481:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L477
-.L480:
+	b	.L479
+.L482:
 	mov	w0, 65535
 	ret
-.L478:
+.L480:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3308,15 +3344,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L483
+	beq	.L485
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L483
+	beq	.L485
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L483
+	beq	.L485
 	adrp	x0, .LANCHOR81
 	mov	w21, 6
 	adrp	x24, .LANCHOR82
@@ -3326,7 +3362,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L483
+	beq	.L485
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -3339,10 +3375,10 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L486
+	bne	.L488
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L486
+	bne	.L488
 	mov	w2, 504
 	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
@@ -3354,15 +3390,15 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L486:
+.L488:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L487
+	bne	.L489
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L483
-.L487:
+	beq	.L485
+.L489:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -3378,13 +3414,13 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L483
+	bcs	.L485
 	adrp	x20, .LANCHOR85
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR82
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L489
+	cbnz	w0, .L491
 	mov	w2, 515
 	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
@@ -3396,13 +3432,13 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L489:
+.L491:
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L483:
+.L485:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3424,27 +3460,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L494:
+.L496:
 	cmp	w20, w1
-	beq	.L498
+	beq	.L500
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L495
+	cbnz	w2, .L497
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L496
+	bcs	.L498
 	adrp	x0, .LANCHOR75+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L497:
-	b	.L497
-.L496:
+.L499:
+	b	.L499
+.L498:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3453,10 +3489,10 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L498:
+.L500:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L500
+	bhi	.L502
 	mov	w2, 629
 	adrp	x1, .LANCHOR95
 	adrp	x0, .LC5
@@ -3468,16 +3504,16 @@ ftl_map_blk_alloc_new_blk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L500:
+.L502:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L495:
+.L497:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L494
+	b	.L496
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3493,29 +3529,29 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR96
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR96]
-.L503:
+.L505:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L505
+	bcc	.L507
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L506:
+.L508:
 	cmp	w1, w2
-	bne	.L508
+	bne	.L510
 	cmp	w19, w2
-	bcc	.L504
+	bcc	.L506
 	adrp	x1, .LANCHOR97
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR97]
 	mov	w1, 0
-.L509:
+.L511:
 	cmp	w1, w2
-	bne	.L511
+	bne	.L513
 	cmp	w19, w1
-	bcc	.L504
+	bcc	.L506
 	mov	w2, 859
 	adrp	x1, .LANCHOR98
 	adrp	x0, .LC5
@@ -3527,43 +3563,43 @@ select_l2p_ram_region:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L504
-.L505:
+	b	.L506
+.L507:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L503
-.L504:
+	bne	.L505
+.L506:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L508:
+.L510:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L507
+	tbnz	w4, #31, .L509
 	cmp	w5, w4
-	bls	.L507
+	bls	.L509
 	mov	w5, w4
 	mov	w19, w1
-.L507:
+.L509:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L506
-.L511:
+	b	.L508
+.L513:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L510
+	bls	.L512
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L510:
+.L512:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L509
+	b	.L511
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -3574,12 +3610,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR99]
 	cmp	w1, 4
-	bhi	.L514
-	cbnz	w0, .L514
+	bhi	.L516
+	cbnz	w0, .L516
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR99]
 	ret
-.L514:
+.L516:
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LANCHOR100
 	strh	wzr, [x3, #:lo12:.LANCHOR99]
@@ -3591,22 +3627,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR83]
 	mov	w7, 65535
 	mov	x1, 0
-.L515:
+.L517:
 	cmp	w5, w1, uxth
-	bhi	.L517
-	cbz	w3, .L513
+	bhi	.L519
+	cbz	w3, .L515
 	str	w2, [x0, #:lo12:.LANCHOR100]
-.L513:
+.L515:
 	ret
-.L517:
+.L519:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L516
+	beq	.L518
 	add	w2, w2, w4
 	mov	w3, 1
-.L516:
+.L518:
 	add	x1, x1, 1
-	b	.L515
+	b	.L517
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3614,13 +3650,13 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L524
+	cbz	w1, .L526
 	b	ftl_set_blk_mode.part.10
-.L524:
-	adrp	x1, .LANCHOR0
+.L526:
+	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
-	ldr	x3, [x1, #:lo12:.LANCHOR0]
+	ldr	x3, [x1, #:lo12:.LANCHOR1]
 	and	w1, w0, 31
 	mov	w0, 1
 	lsl	w0, w0, w1
@@ -3634,9 +3670,9 @@ ftl_set_blk_mode:
 	.global	ftl_get_blk_mode
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-	adrp	x1, .LANCHOR0
+	adrp	x1, .LANCHOR1
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	ubfx	x2, x0, 5, 11
 	and	w0, w0, 31
 	ldr	w1, [x1, x2, lsl 2]
@@ -3658,9 +3694,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR38]
 	mov	w1, 65535
-.L527:
+.L529:
 	cmp	w2, w3
-	bcc	.L529
+	bcc	.L531
 	adrp	x1, .LANCHOR52
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -3671,32 +3707,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L530:
+.L532:
 	cmp	x2, x3
-	bne	.L532
+	bne	.L534
 	ret
-.L529:
+.L531:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L528
+	beq	.L530
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L528:
+.L530:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L527
-.L532:
+	b	.L529
+.L534:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L531
+	beq	.L533
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L531:
+.L533:
 	add	x2, x2, 2
-	b	.L530
+	b	.L532
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3711,8 +3747,8 @@ make_superblock:
 	adrp	x0, .LANCHOR40
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcc	.L534
-	mov	w2, 2575
+	bcc	.L536
+	mov	w2, 2577
 	adrp	x1, .LANCHOR101
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR101
@@ -3723,7 +3759,7 @@ make_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L534:
+.L536:
 	adrp	x0, .LANCHOR38
 	adrp	x7, .LANCHOR47
 	add	x6, x19, 16
@@ -3733,9 +3769,9 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L535:
+.L537:
 	cmp	w8, w5, uxth
-	bhi	.L537
+	bhi	.L539
 	adrp	x1, .LANCHOR52
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
@@ -3744,42 +3780,42 @@ make_superblock:
 	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L538
+	cbz	w0, .L540
 	adrp	x0, .LANCHOR78
 	ldrh	w1, [x19]
 	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w0, 79
-	bhi	.L538
+	bhi	.L540
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L538:
-	adrp	x0, .LANCHOR1
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L539
+.L540:
+	adrp	x0, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbz	w0, .L541
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L539:
+.L541:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L537:
+.L539:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L536
+	cbnz	w0, .L538
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L536:
+.L538:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L535
+	b	.L537
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3796,11 +3832,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR47
 	ldrh	w11, [x0, #:lo12:.LANCHOR52]
 	cmp	w10, w7, uxth
-	bhi	.L559
-	cbz	w5, .L557
+	bhi	.L561
+	cbz	w5, .L559
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L558:
+.L560:
 	adrp	x0, .LANCHOR81
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR81]
@@ -3808,31 +3844,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L552:
+.L554:
 	mov	w5, 0
-	b	.L551
-.L557:
-	mov	w5, 0
-	b	.L558
+	b	.L553
 .L559:
+	mov	w5, 0
+	b	.L560
+.L561:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L550:
+.L552:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L549
+	cbnz	w0, .L551
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L549:
+.L551:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L550
-	cbz	w5, .L552
+	bhi	.L552
+	cbz	w5, .L554
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L551:
+.L553:
 	adrp	x0, .LANCHOR81
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR81]
@@ -3849,7 +3885,7 @@ update_multiplier_value:
 GetFreeBlockMinEraseCount:
 	adrp	x0, .LANCHOR87
 	ldr	x0, [x0, #:lo12:.LANCHOR87]
-	cbz	x0, .L562
+	cbz	x0, .L564
 	adrp	x1, .LANCHOR81
 	ldr	x1, [x1, #:lo12:.LANCHOR81]
 	sub	x0, x0, x1
@@ -3862,7 +3898,7 @@ GetFreeBlockMinEraseCount:
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L562:
+.L564:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3874,7 +3910,7 @@ GetFreeBlockMaxEraseCount:
 	adrp	x1, .LANCHOR87
 	and	w0, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR87]
-	cbz	x1, .L570
+	cbz	x1, .L572
 	adrp	x2, .LANCHOR88
 	mov	w3, 7
 	mov	w5, 6
@@ -3893,25 +3929,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L566:
+.L568:
 	cmp	w0, w2
-	beq	.L569
+	beq	.L571
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L567
-.L569:
+	bne	.L569
+.L571:
 	adrp	x0, .LANCHOR78
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1]
 	ret
-.L567:
+.L569:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L566
-.L570:
+	b	.L568
+.L572:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3923,7 +3959,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L574
+	beq	.L576
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
@@ -3934,7 +3970,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L574:
+.L576:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3967,21 +4003,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L578:
+.L580:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L579
+	bne	.L581
 	adrp	x1, .LANCHOR107
 	ldr	x7, [x7, #:lo12:.LANCHOR104]
 	ldr	x6, [x6, #:lo12:.LANCHOR105]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR107]
-.L580:
+.L582:
 	cmp	w0, w4
-	bcc	.L581
+	bcc	.L583
 	ret
-.L579:
+.L581:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3993,8 +4029,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L578
-.L581:
+	b	.L580
+.L583:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -4008,7 +4044,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L580
+	b	.L582
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -4022,30 +4058,30 @@ FtlGcBufFree:
 	ldr	w8, [x2, #:lo12:.LANCHOR107]
 	adrp	x2, .LANCHOR103
 	ldr	x4, [x2, #:lo12:.LANCHOR103]
-.L583:
+.L585:
 	cmp	w3, w1
-	bcs	.L582
+	bcs	.L584
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L588
-.L584:
+	b	.L590
+.L586:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L588:
+.L590:
 	cmp	w2, w8
-	bcs	.L585
+	bcs	.L587
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L584
+	bne	.L586
 	str	wzr, [x11, 16]
-.L585:
+.L587:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L583
-.L582:
+	b	.L585
+.L584:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -4061,30 +4097,30 @@ FtlGcBufAlloc:
 	adrp	x2, .LANCHOR103
 	mov	w10, 56
 	ldr	x6, [x2, #:lo12:.LANCHOR103]
-.L590:
+.L592:
 	cmp	w3, w1
-	bcs	.L589
+	bcs	.L591
 	mov	w2, 0
-	b	.L595
-.L591:
+	b	.L597
+.L593:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L595:
+.L597:
 	cmp	w2, w5
-	bcs	.L592
+	bcs	.L594
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L591
+	cbnz	w11, .L593
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L592:
+.L594:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L590
-.L589:
+	b	.L592
+.L591:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -4098,17 +4134,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR109
 	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	x1, 0
-.L597:
+.L599:
 	cmp	w2, w1, uxth
-	bhi	.L599
+	bhi	.L601
 	mov	w0, 0
 	ret
-.L599:
+.L601:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L597
+	bne	.L599
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -4130,24 +4166,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR108]
 	ldr	x5, [x2, #:lo12:.LANCHOR109]
-.L602:
+.L604:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L604
-	bne	.L603
+	bcc	.L606
+	bne	.L605
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR108]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR108]
-	b	.L603
-.L604:
+	b	.L605
+.L606:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L602
-.L603:
+	bne	.L604
+.L605:
 	adrp	x4, .LANCHOR110
 	adrp	x1, .LANCHOR111
 	mov	w3, 12
@@ -4171,41 +4207,41 @@ FtlGcRefreshOpenBlock:
 	and	w0, w0, 65535
 	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L607
+	beq	.L609
 	adrp	x6, .LANCHOR113
 	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L607
+	beq	.L609
 	adrp	x4, .LANCHOR114
 	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L607
+	beq	.L609
 	adrp	x2, .LANCHOR115
 	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L607
+	beq	.L609
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L608
+	bne	.L610
 	strh	w0, [x8, #:lo12:.LANCHOR112]
-.L607:
+.L609:
 	mov	w0, 0
 	ret
-.L608:
+.L610:
 	cmp	w7, w1
-	bne	.L609
+	bne	.L611
 	strh	w0, [x6, #:lo12:.LANCHOR113]
-	b	.L607
-.L609:
+	b	.L609
+.L611:
 	cmp	w5, w1
-	bne	.L610
+	bne	.L612
 	strh	w0, [x4, #:lo12:.LANCHOR114]
-	b	.L607
-.L610:
+	b	.L609
+.L612:
 	cmp	w3, w1
-	bne	.L607
+	bne	.L609
 	strh	w0, [x2, #:lo12:.LANCHOR115]
-	b	.L607
+	b	.L609
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",@progbits
 	.align	2
@@ -4216,42 +4252,42 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L619
+	beq	.L621
 	adrp	x6, .LANCHOR113
 	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L619
+	beq	.L621
 	adrp	x4, .LANCHOR114
 	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L619
+	beq	.L621
 	adrp	x2, .LANCHOR115
 	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L619
+	beq	.L621
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L613
+	bne	.L615
 	strh	w0, [x8, #:lo12:.LANCHOR112]
-.L619:
+.L621:
 	mov	w0, 0
 	ret
-.L613:
+.L615:
 	cmp	w7, w1
-	bne	.L614
+	bne	.L616
 	strh	w0, [x6, #:lo12:.LANCHOR113]
-	b	.L619
-.L614:
+	b	.L621
+.L616:
 	cmp	w5, w1
-	bne	.L615
+	bne	.L617
 	strh	w0, [x4, #:lo12:.LANCHOR114]
-	b	.L619
-.L615:
+	b	.L621
+.L617:
 	cmp	w3, w1
-	bne	.L620
+	bne	.L622
 	strh	w0, [x2, #:lo12:.LANCHOR115]
-	b	.L619
-.L620:
+	b	.L621
+.L622:
 	mov	w0, -1
 	ret
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4269,39 +4305,39 @@ FtlGcMarkBadPhyBlk:
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L622
+	cbz	w0, .L624
 	adrp	x1, .LANCHOR78
 	ubfiz	x0, x11, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 39
-	bls	.L622
+	bls	.L624
 	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L622:
+.L624:
 	adrp	x1, .LANCHOR116
 	adrp	x3, .LANCHOR117
 	add	x3, x3, :lo12:.LANCHOR117
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR116]
-.L623:
+.L625:
 	cmp	w0, w2, uxth
-	bhi	.L625
+	bhi	.L627
 	cmp	w0, 15
-	bhi	.L624
+	bhi	.L626
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR116]
 	adrp	x1, .LANCHOR117
 	add	x1, x1, :lo12:.LANCHOR117
 	strh	w12, [x1, w0, sxtw 1]
-	b	.L624
-.L625:
+	b	.L626
+.L627:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w12
-	bne	.L623
-.L624:
+	bne	.L625
+.L626:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4313,20 +4349,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L637
+	cbz	w0, .L639
 	adrp	x1, .LANCHOR112
 	ldrh	w2, [x1, #:lo12:.LANCHOR112]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L637
+	bne	.L639
 	stp	x29, x30, [sp, -16]!
 	adrp	x11, .LANCHOR118
 	add	x29, sp, 0
 	ldrh	w1, [x11, #:lo12:.LANCHOR118]
 	cmp	w1, w0
-	bcc	.L632
+	bcc	.L634
 	strh	wzr, [x11, #:lo12:.LANCHOR118]
-.L632:
+.L634:
 	ldrh	w1, [x11, #:lo12:.LANCHOR118]
 	adrp	x0, .LANCHOR117
 	add	x0, x0, :lo12:.LANCHOR117
@@ -4339,7 +4375,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x11, #:lo12:.LANCHOR118]
 	mov	w0, 0
 	ret
-.L637:
+.L639:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4354,9 +4390,9 @@ flash_boot_enter_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L640
+	bne	.L642
 	b	flash_enter_slc_mode
-.L640:
+.L642:
 	ret
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
@@ -4370,9 +4406,9 @@ flash_boot_exit_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L642
+	bne	.L644
 	b	flash_exit_slc_mode
-.L642:
+.L644:
 	ret
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
@@ -4417,16 +4453,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L648
+	cbnz	w0, .L650
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L649:
+.L651:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L649
-.L655:
+	bne	.L651
+.L657:
 	adrp	x19, .LANCHOR120
 	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
@@ -4437,41 +4473,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L650:
+.L652:
 	cmp	w20, w0, uxth
-	bhi	.L674
+	bhi	.L676
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L648:
+.L650:
 	cmp	w0, 1
-	bne	.L651
+	bne	.L653
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L654:
+.L656:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L652
+	bls	.L654
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L652:
+.L654:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L654
-	b	.L655
-.L651:
-	cmp	w0, 2
 	bne	.L656
+	b	.L657
+.L653:
+	cmp	w0, 2
+	bne	.L658
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L658:
+.L660:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4480,32 +4516,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L658
-	b	.L655
-.L656:
+	bne	.L660
+	b	.L657
+.L658:
 	cmp	w0, 3
-	bne	.L659
+	bne	.L661
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L662:
+.L664:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L660
+	bls	.L662
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L660:
+.L662:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L662
-	b	.L655
-.L659:
+	bne	.L664
+	b	.L657
+.L661:
 	cmp	w0, 4
-	bne	.L663
+	bne	.L665
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4524,7 +4560,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L665:
+.L667:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4533,55 +4569,55 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L665
-	b	.L655
-.L663:
+	bne	.L667
+	b	.L657
+.L665:
 	cmp	w0, 5
-	bne	.L666
+	bne	.L668
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L667:
+.L669:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L667
+	bne	.L669
 	add	x1, x1, 32
-.L668:
+.L670:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L668
-	b	.L655
-.L666:
+	bne	.L670
+	b	.L657
+.L668:
 	cmp	w0, 6
-	bne	.L669
+	bne	.L671
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L672:
+.L674:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L670
+	bls	.L672
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L670:
+.L672:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L672
-	b	.L655
-.L669:
+	bne	.L674
+	b	.L657
+.L671:
 	cmp	w0, 9
-	bne	.L655
+	bne	.L657
 	adrp	x1, .LANCHOR16
 	add	x0, x1, :lo12:.LANCHOR16
 	strh	wzr, [x1, #:lo12:.LANCHOR16]
@@ -4591,18 +4627,18 @@ BuildFlashLsbPageTable:
 	strh	w1, [x0, 4]
 	add	x1, x0, 6
 	mov	w0, 3
-.L673:
+.L675:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 509
-	bne	.L673
-	b	.L655
-.L674:
+	bne	.L675
+	b	.L657
+.L676:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L650
+	b	.L652
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4647,27 +4683,27 @@ FlashDieInfoInit:
 	ldr	x7, [x0, #:lo12:.LANCHOR18]
 	add	x11, x7, 1
 	ldrb	w12, [x7]
-.L692:
+.L694:
 	mov	w2, w12
 	add	x1, x10, x22, lsl 3
 	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L691
+	cbnz	w0, .L693
 	ldrb	w1, [x15]
 	add	w0, w1, 1
 	strb	w0, [x15]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w22, [x21, x1]
-.L691:
+.L693:
 	add	x22, x22, 1
 	cmp	x22, 4
-	bne	.L692
+	bne	.L694
 	ldrb	w0, [x25, #:lo12:.LANCHOR25]
 	strb	w0, [x19, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L693
-.L697:
+	beq	.L695
+.L699:
 	ldrb	w0, [x25, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4681,20 +4717,20 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L693:
-	adrp	x0, .LANCHOR3
+.L695:
+	adrp	x0, .LANCHOR4
 	add	x13, x13, :lo12:.LANCHOR22
 	add	x15, x25, :lo12:.LANCHOR25
 	add	x23, x23, :lo12:.LANCHOR17
-	ldr	w20, [x0, #:lo12:.LANCHOR3]
+	ldr	w20, [x0, #:lo12:.LANCHOR4]
 	add	x14, x24, :lo12:.LANCHOR26
 	mov	x19, 0
-.L696:
+.L698:
 	mov	w2, w12
 	add	x1, x13, x19, lsl 3
 	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L694
+	cbnz	w0, .L696
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x15]
@@ -4704,18 +4740,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x23, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L695
+	cbz	w3, .L697
 	lsl	w0, w0, 1
 	str	w0, [x23, x2, lsl 2]
-.L695:
+.L697:
 	add	w1, w1, 1
 	strb	w19, [x14, x2]
 	strb	w1, [x15]
-.L694:
+.L696:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L696
-	b	.L697
+	bne	.L698
+	b	.L699
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4733,8 +4769,8 @@ ReadFlashInfo:
 	adrp	x3, .LANCHOR68
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
-	adrp	x0, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR4
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	ldrb	w2, [x1, 9]
 	mul	w0, w0, w2
 	strb	w0, [x19, 4]
@@ -4763,20 +4799,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L706:
+.L708:
 	cmp	w3, w1, uxtb
-	bhi	.L707
+	bhi	.L709
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L707:
+.L709:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L706
+	b	.L708
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4802,13 +4838,13 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L712:
+.L714:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L709
+	beq	.L711
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L711
+	bhi	.L713
 	mov	w2, 79
 	mov	x1, x23
 	adrp	x0, .LC5
@@ -4819,7 +4855,7 @@ FtlBbt2Bitmap:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L711:
+.L713:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4831,8 +4867,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L712
-.L709:
+	bne	.L714
+.L711:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4895,10 +4931,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L720:
+.L722:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L724
+	bhi	.L726
 	adrp	x0, .LANCHOR53
 	mov	w23, 0
 	mov	w20, 0
@@ -4906,10 +4942,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L725:
+.L727:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L729
+	bhi	.L731
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4917,64 +4953,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L724:
+.L726:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L721:
+.L723:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L723
+	bhi	.L725
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L720
-.L723:
+	b	.L722
+.L725:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L722
-	cbz	w2, .L722
+	bne	.L724
+	cbz	w2, .L724
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L722:
+.L724:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L721
-.L729:
+	b	.L723
+.L731:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L726
+	bls	.L728
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L727
-.L728:
+	cbnz	w0, .L729
+.L730:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L725
-.L726:
-	cbnz	w1, .L728
+	b	.L727
+.L728:
+	cbnz	w1, .L730
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L728
-.L730:
+	cbz	w0, .L730
+.L732:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L728
-.L731:
-	mov	w24, 0
 	b	.L730
-.L727:
+.L733:
+	mov	w24, 0
+	b	.L732
+.L729:
 	mov	w23, w20
-	cbz	w1, .L731
+	cbz	w1, .L733
 	mov	w24, w1
-	b	.L728
+	b	.L730
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -5010,10 +5046,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR57]
 	add	x3, x0, x3, lsl 4
-.L741:
+.L743:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L742
+	bne	.L744
 	adrp	x1, .LANCHOR127
 	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
@@ -5044,7 +5080,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L742:
+.L744:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -5052,7 +5088,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L741
+	b	.L743
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -5155,35 +5191,35 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR139
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
-.L747:
+.L749:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L754
+	bge	.L756
 	adrp	x0, .LANCHOR52
 	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR52]
-	b	.L755
-.L749:
+	b	.L757
+.L751:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L748
+	cbnz	w0, .L750
 	add	w5, w7, w5
 	sxth	w5, w5
-.L748:
+.L750:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L755:
+.L757:
 	cmp	w6, w8
-	blt	.L749
-	cbz	w5, .L750
+	blt	.L751
+	cbz	w5, .L752
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L751:
+.L753:
 	ldr	x1, [x24, #:lo12:.LANCHOR81]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
@@ -5191,46 +5227,46 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w19, w0
-	beq	.L752
+	beq	.L754
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L752
+	beq	.L754
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L752
+	beq	.L754
 	adrp	x0, .LANCHOR83
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L753
+	cbnz	w0, .L755
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L752:
+.L754:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L747
-.L750:
+	b	.L749
+.L752:
 	adrp	x0, .LANCHOR83
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L751
-.L753:
+	b	.L753
+.L755:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L752
-.L754:
+	b	.L754
+.L756:
 	strh	w20, [x23, #:lo12:.LANCHOR85]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR88]
 	cmp	w0, w20
-	bge	.L756
-	mov	w2, 2645
+	bge	.L758
+	mov	w2, 2647
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR140
@@ -5241,7 +5277,7 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L756:
+.L758:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5336,7 +5372,7 @@ FlashLoadPhyInfoInRam:
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
 	str	x21, [sp, 32]
-.L768:
+.L770:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x21, x10, 5
@@ -5344,7 +5380,7 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w20, w0
-	cbnz	w0, .L766
+	cbnz	w0, .L768
 	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
 	add	x21, x0, x21
@@ -5353,17 +5389,17 @@ FlashLoadPhyInfoInRam:
 	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L767:
+.L769:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L770
+	beq	.L772
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L767
+	bne	.L769
 	mov	w2, w0
-.L770:
+.L772:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR143
 	adrp	x19, .LANCHOR31
@@ -5379,14 +5415,14 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	ldrh	w0, [x19, 10]
 	bl	FlashBlockAlignInit
-	b	.L765
-.L766:
+	b	.L767
+.L768:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 81
-	bne	.L768
+	bne	.L770
 	mov	w20, -1
-.L765:
+.L767:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
@@ -5399,15 +5435,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L775:
+.L777:
 	cmp	w2, w3
-	bhi	.L776
+	bhi	.L778
 	ret
-.L776:
+.L778:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L775
+	b	.L777
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5426,15 +5462,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L778
-	cbz	x3, .L779
-	tst	x3, 3
 	bne	.L780
+	cbz	x3, .L781
+	tst	x3, 3
+	bne	.L782
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L779:
-	cbz	x20, .L777
+.L781:
+	cbz	x20, .L779
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5446,26 +5482,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L777:
+.L779:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L780:
+.L782:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L779
-.L778:
-	cbz	x3, .L783
+	b	.L781
+.L780:
+	cbz	x3, .L785
 	tst	x3, 3
-	bne	.L784
+	bne	.L786
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L783:
-	cbz	x20, .L777
+.L785:
+	cbz	x20, .L779
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5477,13 +5513,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L777
-.L784:
+	b	.L779
+.L786:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L783
+	b	.L785
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5496,9 +5532,9 @@ NandcXferData:
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR0
 	and	w20, w1, 255
-	add	x0, x0, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR0
 	sbfiz	x1, x25, 4, 32
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -5507,14 +5543,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L797
-	cbnz	x4, .L798
+	bne	.L799
+	cbnz	x4, .L800
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L798:
+.L800:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5524,7 +5560,7 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L822
+	cbnz	w20, .L824
 	adrp	x0, .LANCHOR32
 	adrp	x4, .LANCHOR35
 	mov	x1, x0
@@ -5537,38 +5573,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L801:
+.L803:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L802
+	bne	.L804
 	adrp	x0, .LANCHOR34
 	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
 	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L803:
+.L805:
 	cmp	w2, w24
-	bcs	.L799
-	cbnz	w4, .L809
-.L799:
+	bcs	.L801
+	cbnz	w4, .L811
+.L801:
 	str	wzr, [x19, 16]
-.L810:
+.L812:
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L796
-	cbnz	w20, .L796
+	bls	.L798
+	cbnz	w20, .L798
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L796
+	bne	.L798
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L796:
+.L798:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5577,7 +5613,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L802:
+.L804:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5590,18 +5626,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L801
-.L809:
+	b	.L803
+.L811:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L825
+	tbnz	x0, 2, .L827
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L825
+	tbnz	x0, 15, .L827
 	cmp	w3, 5
-	bls	.L805
+	bls	.L807
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5614,26 +5650,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L806
+	bls	.L808
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L831:
+.L833:
 	orr	w0, w1, w0, lsl 5
-.L807:
+.L809:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L804:
-	add	w2, w2, 1
-	b	.L803
 .L806:
+	add	w2, w2, 1
+	b	.L805
+.L808:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L831
-.L805:
+	b	.L833
+.L807:
 	cmp	w3, 3
-	bls	.L826
+	bls	.L828
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5646,45 +5682,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L808
+	bls	.L810
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L831
-.L808:
+	b	.L833
+.L810:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L831
-.L826:
+	b	.L833
+.L828:
 	mov	w0, 0
-	b	.L807
-.L825:
+	b	.L809
+.L827:
 	mov	w22, -1
-	b	.L804
-.L822:
+	b	.L806
+.L824:
 	mov	w22, 0
-	b	.L799
-.L797:
+	b	.L801
+.L799:
 	cmp	w20, 1
-	bne	.L811
+	bne	.L813
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L812:
+.L814:
 	cmp	w22, w24
-	bcc	.L814
+	bcc	.L816
 	mov	w22, 0
-	b	.L810
-.L814:
+	b	.L812
+.L816:
 	and	w28, w22, 3
-	cbz	x26, .L827
+	cbz	x26, .L829
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L813:
+.L815:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5701,11 +5737,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L812
-.L827:
+	b	.L814
+.L829:
 	mov	x3, 0
-	b	.L813
-.L811:
+	b	.L815
+.L813:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5721,16 +5757,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L815:
+.L817:
 	cmp	w24, w23
-	bls	.L810
+	bls	.L812
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L816
+	bls	.L818
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5738,9 +5774,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L816:
+.L818:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L828
+	tbnz	x0, 2, .L830
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5748,12 +5784,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L817:
+.L819:
 	and	w2, w23, 3
-	cbz	x26, .L829
+	cbz	x26, .L831
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L818:
+.L820:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5761,13 +5797,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L815
-.L828:
-	mov	w22, -1
 	b	.L817
-.L829:
+.L830:
+	mov	w22, -1
+	b	.L819
+.L831:
 	mov	x3, 0
-	b	.L818
+	b	.L820
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5785,16 +5821,16 @@ FlashReadRawPage:
 	mov	x22, x2
 	mov	x23, x3
 	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
-	bne	.L833
-	adrp	x0, .LANCHOR2
-	adrp	x1, .LANCHOR3
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	bne	.L835
+	adrp	x0, .LANCHOR3
+	adrp	x1, .LANCHOR4
+	ldrb	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w1, [x1, #:lo12:.LANCHOR4]
 	mul	w0, w0, w1
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L833:
+.L835:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5847,7 +5883,7 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L849
+	cbz	w4, .L851
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5866,10 +5902,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L838
-.L847:
+	bne	.L840
+.L849:
 	mov	w21, -1
-.L835:
+.L837:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5878,7 +5914,7 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L838:
+.L840:
 	mov	w1, w25
 	mov	w2, w21
 	adrp	x0, .LC9
@@ -5888,20 +5924,20 @@ FlashDdrTunningRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L840
+	bhi	.L842
 	str	w0, [x1, #:lo12:.LANCHOR144]
-	b	.L835
-.L840:
+	b	.L837
+.L842:
 	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L837:
+.L839:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L845:
+.L847:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5913,65 +5949,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L841
+	bhi	.L843
 	cmp	w0, 2
-	bhi	.L851
+	bhi	.L853
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L851
+	bls	.L853
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L843:
+.L845:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L844:
-	cbz	w20, .L846
+.L846:
+	cbz	w20, .L848
 	mov	w1, w20
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L846:
-	cbz	w27, .L835
+.L848:
+	cbz	w27, .L837
 	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L847
+	cbz	w26, .L849
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L835
-.L849:
-	mov	w21, 1024
 	b	.L837
-.L841:
+.L851:
+	mov	w21, 1024
+	b	.L839
+.L843:
 	cmp	w19, w6
-	bls	.L852
+	bls	.L854
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L844
+	bhi	.L846
 	mov	w6, w19
-.L852:
+.L854:
 	mov	w19, 0
-	b	.L842
-.L851:
+	b	.L844
+.L853:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L842:
+.L844:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L845
+	bls	.L847
 	mov	w1, w20
 	mov	w20, w5
-	b	.L843
+	b	.L845
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5992,14 +6028,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L862
-	adrp	x24, .LANCHOR5
-	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L863
-.L865:
+	bne	.L864
+	adrp	x24, .LANCHOR6
+	ldrb	w25, [x24, #:lo12:.LANCHOR6]
+	cbnz	w25, .L865
+.L867:
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L862
+	cbz	w0, .L864
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -6011,32 +6047,32 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L866
+	beq	.L868
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L862
-.L866:
+	bls	.L864
+.L868:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L862
-.L863:
-	strb	wzr, [x24, #:lo12:.LANCHOR5]
+	b	.L864
+.L865:
+	strb	wzr, [x24, #:lo12:.LANCHOR6]
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
 	mov	w0, w20
 	bl	FlashReadRawPage
-	strb	w25, [x24, #:lo12:.LANCHOR5]
+	strb	w25, [x24, #:lo12:.LANCHOR6]
 	cmn	w0, #1
-	beq	.L865
+	beq	.L867
 	mov	w19, w0
-.L862:
+.L864:
 	adrp	x24, .LANCHOR145
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
-	cbz	x4, .L861
+	cbz	x4, .L863
 	cmn	w19, #1
-	bne	.L861
+	bne	.L863
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -6050,10 +6086,10 @@ FlashReadPage:
 	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L861
+	bne	.L863
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L861
+	cbz	w0, .L863
 	mov	w0, w20
 	bl	flash_enter_slc_mode
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
@@ -6065,7 +6101,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L861:
+.L863:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -6104,27 +6140,27 @@ FlashDdrParaScan:
 	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L882
+	beq	.L884
 	cmn	w22, #1
-	bne	.L883
-.L882:
+	bne	.L885
+.L884:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L883
+	tbz	x0, 0, .L885
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
-.L884:
+.L886:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L883:
+.L885:
 	mov	w0, 1
 	strb	w0, [x20, #:lo12:.LANCHOR30]
-	b	.L884
+	b	.L886
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -6135,7 +6171,7 @@ FlashLoadPhyInfo:
 	mov	w0, 60
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR3
+	adrp	x21, .LANCHOR4
 	adrp	x22, .LANCHOR147
 	stp	x19, x20, [sp, 16]
 	strb	w0, [x29, 120]
@@ -6146,7 +6182,7 @@ FlashLoadPhyInfo:
 	mov	w0, 16
 	strb	w0, [x29, 123]
 	adrp	x20, .LANCHOR146
-	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR148
@@ -6162,10 +6198,10 @@ FlashLoadPhyInfo:
 	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L893:
+.L895:
 	add	w28, w19, 1
 	mov	x27, 0
-.L895:
+.L897:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
@@ -6175,30 +6211,30 @@ FlashLoadPhyInfo:
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L894
+	bne	.L896
 	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L894
+	bne	.L896
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L895
-.L896:
+	bne	.L897
+.L898:
 	ldr	w0, [x29, 108]
 	subs	w26, w26, #1
 	add	w19, w19, w0
-	bne	.L893
-	b	.L901
-.L897:
+	bne	.L895
+	b	.L903
+.L899:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L903
+	bne	.L905
 	add	x1, x6, 160
 	mov	w2, 32
 	mov	x0, x25
@@ -6222,39 +6258,39 @@ FlashLoadPhyInfo:
 	adrp	x0, .LANCHOR30
 	ldr	w2, [x1, 1076]
 	strb	w2, [x0, #:lo12:.LANCHOR30]
-	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
 	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
 	add	w0, w0, 1
 	cmp	w0, 1
-	bls	.L899
-.L906:
+	bls	.L901
+.L908:
 	str	w0, [x2, #:lo12:.LANCHOR149]
 	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
 	strb	w1, [x0, #:lo12:.LANCHOR150]
-	b	.L896
-.L899:
+	b	.L898
+.L901:
 	mov	w0, 2
-	b	.L906
-.L903:
+	b	.L908
+.L905:
 	mov	w23, -1
-	b	.L896
-.L894:
+	b	.L898
+.L896:
 	ldr	x6, [x20, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L896
-	cbnz	w23, .L897
-	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	bne	.L898
+	cbnz	w23, .L899
+	ldr	w0, [x21, #:lo12:.LANCHOR4]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
 	str	w19, [x0, #:lo12:.LANCHOR149]
-.L901:
+.L903:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6285,8 +6321,8 @@ ToshibaReadRetrial:
 	stp	x23, x24, [sp, 48]
 	bl	NandcWaitFlashReady
 	sbfiz	x1, x21, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	add	x2, x0, x1
 	ldr	x22, [x0, x1]
 	adrp	x1, .LANCHOR10
@@ -6299,34 +6335,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L924
+	bls	.L926
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L925
+	cbz	w0, .L927
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L909:
+.L911:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L908:
+.L910:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L910:
+.L912:
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L919
+	bcc	.L921
 	mov	w28, w24
-.L918:
+.L920:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR10]
@@ -6334,9 +6370,9 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L920
+	bhi	.L922
 	bl	SandiskSetRRPara
-.L921:
+.L923:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
@@ -6346,17 +6382,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L922
+	bcc	.L924
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L922:
+.L924:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L907
+	cbz	w23, .L909
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L907:
+.L909:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6365,13 +6401,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L925:
+.L927:
 	mov	w23, 0
-	b	.L909
-.L924:
+	b	.L911
+.L926:
 	mov	w23, 0
-	b	.L908
-.L919:
+	b	.L910
+.L921:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR10]
@@ -6379,28 +6415,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L911
+	bhi	.L913
 	bl	SandiskSetRRPara
-.L912:
+.L914:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	cmp	w0, 34
-	bne	.L913
+	bne	.L915
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L913
+	bne	.L915
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L913:
+.L915:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L914
+	cbz	w23, .L916
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6411,35 +6447,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L915:
+.L917:
 	cmn	w28, #1
-	beq	.L916
+	beq	.L918
 	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L918
+	bcc	.L920
 	mov	x26, 0
 	mov	x25, 0
-.L916:
+.L918:
 	add	w20, w20, 1
-	b	.L910
-.L911:
-	bl	ToshibaSetRRPara
 	b	.L912
-.L914:
+.L913:
+	bl	ToshibaSetRRPara
+	b	.L914
+.L916:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L915
-.L920:
+	b	.L917
+.L922:
 	bl	ToshibaSetRRPara
-	b	.L921
+	b	.L923
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6461,8 +6497,8 @@ SamsungReadRetrial:
 	bl	NandcWaitFlashReady
 	adrp	x26, .LANCHOR151
 	sbfiz	x1, x22, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	adrp	x27, .LANCHOR33
 	add	x2, x0, x1
 	add	x26, x26, :lo12:.LANCHOR151
@@ -6473,12 +6509,12 @@ SamsungReadRetrial:
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L936:
+.L938:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L940
-.L939:
+	bcc	.L942
+.L941:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
@@ -6486,11 +6522,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L935
+	bcc	.L937
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L935:
+.L937:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6499,7 +6535,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L940:
+.L942:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6509,21 +6545,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L937
+	beq	.L939
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L942
+	bcc	.L944
 	mov	x25, 0
 	mov	x24, 0
-.L937:
+.L939:
 	add	w21, w21, 1
-	b	.L936
-.L942:
+	b	.L938
+.L944:
 	mov	w19, w0
-	b	.L939
+	b	.L941
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6546,16 +6582,16 @@ MicronReadRetrial:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 128]
-	cbnz	w1, .L950
+	cbnz	w1, .L952
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
-.L951:
-	adrp	x21, .LANCHOR6
-	add	x21, x21, :lo12:.LANCHOR6
+.L953:
+	adrp	x21, .LANCHOR0
+	add	x21, x21, :lo12:.LANCHOR0
 	add	x21, x21, x20, sxtw 4
 	mov	w23, 0
 	mov	w28, 137
-.L961:
+.L963:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldrb	w4, [x21, 8]
@@ -6565,11 +6601,11 @@ MicronReadRetrial:
 	mov	w22, 0
 	mov	w26, -1
 	add	x27, x8, x4, lsl 8
-.L952:
+.L954:
 	ldrb	w0, [x7]
 	cmp	w22, w0
-	bcc	.L956
-.L955:
+	bcc	.L958
+.L957:
 	add	x4, x8, x4, lsl 8
 	mov	w0, 239
 	str	x4, [x29, 120]
@@ -6583,14 +6619,14 @@ MicronReadRetrial:
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
-	bcc	.L957
+	bcc	.L959
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L957:
+.L959:
 	cmp	w26, 256
 	ccmn	w26, #1, 4, ne
-	bne	.L958
+	bne	.L960
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC13
 	mov	w4, w26
@@ -6598,22 +6634,22 @@ MicronReadRetrial:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-	cbnz	w23, .L959
+	cbnz	w23, .L961
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L949
+	cbz	w0, .L951
 	cmn	w26, #1
-	bne	.L949
+	bne	.L951
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	micron_auto_read_calibration_config
-	b	.L961
-.L950:
+	b	.L963
+.L952:
 	mov	w0, 3
 	sdiv	w19, w19, w0
-	b	.L951
-.L956:
+	b	.L953
+.L958:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w28, [x27, 2052]
@@ -6636,29 +6672,29 @@ MicronReadRetrial:
 	ldr	w10, [x29, 120]
 	ldp	x4, x7, [x29, 96]
 	ldr	x8, [x29, 112]
-	beq	.L953
+	beq	.L955
 	cmn	w26, #1
 	csel	w26, w26, w0, ne
 	cmp	w0, w19
-	bcc	.L963
+	bcc	.L965
 	mov	x25, 0
 	mov	x24, 0
-.L953:
+.L955:
 	mov	w22, w10
-	b	.L952
-.L963:
+	b	.L954
+.L965:
 	mov	w26, w0
 	mov	x25, 0
 	mov	x24, 0
-	b	.L955
-.L959:
+	b	.L957
+.L961:
 	mov	w0, w20
 	mov	w1, 0
 	bl	micron_auto_read_calibration_config
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L949:
+.L951:
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6667,13 +6703,13 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L958:
-	cbz	w23, .L949
+.L960:
+	cbz	w23, .L951
 	mov	w1, 0
 	mov	w0, w20
 	mov	w26, 256
 	bl	micron_auto_read_calibration_config
-	b	.L949
+	b	.L951
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6703,9 +6739,9 @@ HynixReadRetrial:
 	sub	w0, w0, #7
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L975
+	bhi	.L977
 	ldrb	w26, [x1, 20]
-.L975:
+.L977:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
@@ -6714,10 +6750,10 @@ HynixReadRetrial:
 	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
 	mov	w27, -1
-.L976:
+.L978:
 	cmp	w4, w21
-	bcc	.L981
-.L980:
+	bcc	.L983
+.L982:
 	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
@@ -6725,18 +6761,18 @@ HynixReadRetrial:
 	sub	w0, w0, #7
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L982
+	bhi	.L984
 	strb	w26, [x19, 20]
-.L983:
+.L985:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w27, w0, lsr 2
-	bcc	.L974
+	bcc	.L976
 	cmn	w27, #1
 	mov	w0, 256
 	csel	w27, w27, w0, eq
-.L974:
+.L976:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6745,7 +6781,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L981:
+.L983:
 	add	w26, w26, 1
 	ldrb	w1, [x6, 1]
 	and	w26, w26, 255
@@ -6767,24 +6803,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L978
+	beq	.L980
 	ldrb	w1, [x5]
 	cmn	w27, #1
 	csel	w27, w27, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L985
+	bcc	.L987
 	mov	x24, 0
 	mov	x23, 0
-.L978:
+.L980:
 	add	w4, w4, 1
-	b	.L976
-.L985:
+	b	.L978
+.L987:
 	mov	w27, w0
-	b	.L980
-.L982:
+	b	.L982
+.L984:
 	strb	w26, [x19, 12]
-	b	.L983
+	b	.L985
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6802,19 +6838,19 @@ FlashProgPage:
 	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L993
-	adrp	x0, .LANCHOR2
-	adrp	x1, .LANCHOR3
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	bne	.L995
+	adrp	x0, .LANCHOR3
+	adrp	x1, .LANCHOR4
+	ldrb	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w1, [x1, #:lo12:.LANCHOR4]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L993
-	adrp	x0, .LANCHOR1
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L994
+	bls	.L995
+	adrp	x0, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbnz	w0, .L996
 	sub	w21, w21, #2
-.L993:
+.L995:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6845,9 +6881,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L994:
+.L996:
 	mov	w21, 4
-	b	.L993
+	b	.L995
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6861,7 +6897,7 @@ FlashSavePhyInfo:
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR146
 	ldr	x0, [x22, #:lo12:.LANCHOR147]
-	adrp	x21, .LANCHOR3
+	adrp	x21, .LANCHOR4
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w20, 0
 	adrp	x0, .LANCHOR152
@@ -6873,7 +6909,7 @@ FlashSavePhyInfo:
 	adrp	x24, .LANCHOR153
 	adrp	x26, .LANCHOR149
 	mov	w23, 0
-	add	x21, x21, :lo12:.LANCHOR3
+	add	x21, x21, :lo12:.LANCHOR4
 	add	x26, x26, :lo12:.LANCHOR149
 	bl	FlashBchSel
 	ldr	x0, [x22, #:lo12:.LANCHOR147]
@@ -6887,8 +6923,8 @@ FlashSavePhyInfo:
 	str	w25, [x0, -16]
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	strh	w1, [x0, -4]
-	adrp	x1, .LANCHOR2
-	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR3
+	ldrb	w1, [x1, #:lo12:.LANCHOR3]
 	strh	w1, [x0, -2]
 	adrp	x1, .LANCHOR30
 	ldrb	w1, [x1, #:lo12:.LANCHOR30]
@@ -6937,7 +6973,7 @@ FlashSavePhyInfo:
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L999:
+.L1001:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6964,30 +7000,30 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L997
+	beq	.L999
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L997
+	bne	.L999
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L997
+	bne	.L999
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
 	adrp	x0, .LANCHOR148
 	str	w20, [x0, #:lo12:.LANCHOR148]
-	beq	.L1000
+	beq	.L1002
 	mov	w23, 1
-.L997:
+.L999:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L999
-.L998:
+	bne	.L1001
+.L1000:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6998,9 +7034,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1000:
+.L1002:
 	mov	w23, 2
-	b	.L998
+	b	.L1000
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -7028,34 +7064,34 @@ FlashReadIdbDataRaw:
 	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
-	cbz	w1, .L1007
+	cbz	w1, .L1009
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L1007:
-	adrp	x24, .LANCHOR2
-	adrp	x22, .LANCHOR3
+.L1009:
+	adrp	x24, .LANCHOR3
+	adrp	x22, .LANCHOR4
 	add	x27, x29, 136
-	add	x22, x22, :lo12:.LANCHOR3
-	add	x28, x24, :lo12:.LANCHOR2
+	add	x22, x22, :lo12:.LANCHOR4
+	add	x28, x24, :lo12:.LANCHOR3
 	mov	w20, -1
 	mov	w19, 2
 	mov	w2, 2048
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L1008:
-	ldrb	w0, [x24, #:lo12:.LANCHOR2]
+.L1010:
+	ldrb	w0, [x24, #:lo12:.LANCHOR3]
 	cmp	w19, w0
-	bcc	.L1013
-.L1012:
+	bcc	.L1015
+.L1014:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L1006
+	cbz	w0, .L1008
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L1006:
+.L1008:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7064,10 +7100,10 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1013:
+.L1015:
 	mov	x4, 0
 	adrp	x25, .LANCHOR147
-.L1010:
+.L1012:
 	ldrb	w5, [x4, x27]
 	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
@@ -7082,24 +7118,24 @@ FlashReadIdbDataRaw:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L1009
+	bne	.L1011
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L1010
-.L1011:
+	bne	.L1012
+.L1013:
 	add	w19, w19, 1
-	b	.L1008
-.L1016:
+	b	.L1010
+.L1018:
 	mov	w20, 0
-	b	.L1012
-.L1009:
+	b	.L1014
+.L1011:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L1011
+	bne	.L1013
 	mov	w1, w5
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
@@ -7114,11 +7150,11 @@ FlashReadIdbDataRaw:
 	adrp	x0, .LANCHOR149
 	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L1016
+	bcs	.L1018
 	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L1011
+	b	.L1013
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -7135,11 +7171,11 @@ FlashPageProgMsbFFData:
 	and	w19, w2, 65535
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x25, x26, [sp, 64]
-	cbz	w0, .L1026
+	cbz	w0, .L1028
 	adrp	x0, .LANCHOR29
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cbnz	w0, .L1025
-.L1026:
+	cbnz	w0, .L1027
+.L1028:
 	adrp	x2, .LANCHOR18
 	mov	x25, x2
 	ldr	x0, [x2, #:lo12:.LANCHOR18]
@@ -7147,38 +7183,38 @@ FlashPageProgMsbFFData:
 	sub	w0, w23, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1025
+	bhi	.L1027
 	mov	x2, 16399
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1025
+	tbz	x0, 0, .L1027
 	adrp	x20, .LANCHOR120
 	mov	w22, w1
 	add	x20, x20, :lo12:.LANCHOR120
 	mov	w26, 65535
 	adrp	x21, .LANCHOR153
-.L1028:
+.L1030:
 	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L1031
-.L1025:
+	bhi	.L1033
+.L1027:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1031:
+.L1033:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w26
-	bne	.L1025
+	bne	.L1027
 	mov	w2, 32768
 	cmp	w23, 8
-	bne	.L1029
+	bne	.L1031
 	mov	w1, 0
-.L1036:
+.L1038:
 	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	bl	ftl_memset
 	ldr	x3, [x21, #:lo12:.LANCHOR153]
@@ -7188,10 +7224,10 @@ FlashPageProgMsbFFData:
 	mov	x2, x3
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L1028
-.L1029:
+	b	.L1030
+.L1031:
 	mov	w1, 255
-	b	.L1036
+	b	.L1038
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -7208,16 +7244,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1038
+	bls	.L1040
 	cmp	w1, 575
-	bhi	.L1039
+	bhi	.L1041
 	adrp	x0, .LANCHOR154
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
 	str	w2, [x0, #:lo12:.LANCHOR154]
 	adrp	x0, idb_buf
-	bhi	.L1040
+	bhi	.L1042
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -7225,9 +7261,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1090:
+.L1092:
 	bl	ftl_memcpy
-.L1073:
+.L1075:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7236,7 +7272,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1040:
+.L1042:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -7246,15 +7282,15 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1090
-.L1038:
+	b	.L1092
+.L1040:
 	cmp	w1, 575
-	bls	.L1073
-.L1039:
+	bls	.L1075
+.L1041:
 	adrp	x0, .LANCHOR154
 	str	x0, [x29, 104]
 	ldr	w1, [x0, #:lo12:.LANCHOR154]
-	cbz	w1, .L1073
+	cbz	w1, .L1075
 	adrp	x21, .LANCHOR18
 	adrp	x1, idb_buf+262140
 	adrp	x25, idb_buf
@@ -7271,9 +7307,9 @@ idb_write_data:
 	udiv	w0, w0, w20
 	str	w0, [x29, 172]
 	mov	w0, 0
-.L1044:
+.L1046:
 	ldr	w4, [x1]
-	cbnz	w4, .L1042
+	cbnz	w4, .L1044
 	ldr	w4, [x5, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1], -4
@@ -7281,8 +7317,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1044
-.L1042:
+	bne	.L1046
+.L1044:
 	add	x0, x25, :lo12:idb_buf
 	mov	w3, 512
 	mov	w23, 0
@@ -7299,19 +7335,19 @@ idb_write_data:
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 160]
-.L1045:
+.L1047:
 	cmp	w24, 15
-	bls	.L1063
-	cbnz	w23, .L1065
+	bls	.L1065
+	cbnz	w23, .L1067
 	adrp	x0, .LC17
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC17
 	bl	printf
-.L1065:
+.L1067:
 	ldr	x0, [x29, 104]
 	str	wzr, [x0, #:lo12:.LANCHOR154]
-	b	.L1073
-.L1063:
+	b	.L1075
+.L1065:
 	adrp	x27, gp_flash_check_buf
 	mov	x2, 512
 	mov	w1, 0
@@ -7326,21 +7362,21 @@ idb_write_data:
 	mul	w26, w22, w26
 	and	w26, w26, 65535
 	cmp	w26, 511
-	bhi	.L1046
+	bhi	.L1048
 	add	w0, w26, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1046:
+.L1048:
 	udiv	w4, w19, w26
 	adrp	x5, .LANCHOR15
 	add	x5, x5, :lo12:.LANCHOR15
 	mov	x28, 0
 	msub	w4, w4, w26, w19
 	sub	w26, w19, w4
-.L1047:
+.L1049:
 	add	x2, x25, :lo12:idb_buf
 	cmp	x28, 128
 	add	x2, x2, x28, lsl 11
-	bne	.L1051
+	bne	.L1053
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
 	mov	w26, 0
 	ldr	x1, [x29, 128]
@@ -7358,9 +7394,9 @@ idb_write_data:
 	str	w0, [x29, 120]
 	mul	w0, w22, w28
 	ubfx	x0, x0, 2, 2
-.L1052:
+.L1054:
 	cmp	w26, 511
-	bhi	.L1059
+	bhi	.L1061
 	ldr	x3, [x29, 96]
 	mov	w1, 4
 	sub	w1, w1, w0
@@ -7371,18 +7407,18 @@ idb_write_data:
 	ldrb	w3, [x3]
 	lsr	w1, w1, 2
 	ldrh	w2, [x2, w1, sxtw 1]
-	cbz	w3, .L1053
+	cbz	w3, .L1055
 	adrp	x3, .LANCHOR119
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
 	ldr	w3, [x3, #:lo12:.LANCHOR119]
 	cmp	w3, w4
 	csel	w2, w2, w1, ne
-.L1053:
+.L1055:
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR3
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	adrp	x1, .LANCHOR4
+	ldr	w1, [x1, #:lo12:.LANCHOR4]
 	madd	w0, w28, w2, w0
 	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR33
@@ -7398,11 +7434,11 @@ idb_write_data:
 	mul	w0, w0, w1
 	ldr	w1, [x29, 168]
 	cmp	w1, w0
-	bcs	.L1054
+	bcs	.L1056
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	bl	FlashBchSel
-.L1054:
+.L1056:
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
 	ldr	w0, [x29, 168]
@@ -7415,11 +7451,11 @@ idb_write_data:
 	bl	FlashReadPage
 	mov	w1, w0
 	cmn	w0, #1
-	bne	.L1055
+	bne	.L1057
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	cmp	w0, 40
-	beq	.L1055
+	beq	.L1057
 	mov	w0, 40
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
@@ -7428,7 +7464,7 @@ idb_write_data:
 	mov	w0, 0
 	bl	FlashReadPage
 	mov	w1, w0
-.L1055:
+.L1057:
 	str	w1, [x29, 168]
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
@@ -7436,20 +7472,20 @@ idb_write_data:
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
 	cmn	w1, #1
-	bne	.L1056
-.L1059:
+	bne	.L1058
+.L1061:
 	ldr	x0, [x29, 128]
 	add	x1, x25, :lo12:idb_buf
 	mov	x22, 0
 	add	x26, x0, :lo12:gp_flash_check_buf
-.L1057:
+.L1059:
 	lsl	x0, x22, 2
 	mov	w27, w22
 	add	x28, x0, x1
 	ldr	w2, [x0, x26]
 	ldr	w0, [x0, x1]
 	cmp	w2, w0
-	beq	.L1060
+	beq	.L1062
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x26
@@ -7465,48 +7501,48 @@ idb_write_data:
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	w0, [x29, 172]
 	cmp	w0, 1
-	bls	.L1061
+	bls	.L1063
 	add	w0, w20, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1061:
+.L1063:
 	ldr	w0, [x29, 172]
 	add	w24, w24, w0
 	ldr	w0, [x29, 136]
 	add	w19, w19, w0
-	b	.L1045
-.L1051:
+	b	.L1047
+.L1053:
 	add	w1, w4, w28, lsl 2
 	lsr	w1, w1, 2
-	cbz	w1, .L1048
+	cbz	w1, .L1050
 	ldr	x0, [x29, 160]
 	add	w3, w1, 1
 	ldrb	w6, [x5]
 	ldrh	w0, [x0, w3, sxtw 1]
-	cbz	w6, .L1049
+	cbz	w6, .L1051
 	adrp	x6, .LANCHOR119
 	mov	w7, 12336
 	movk	w7, 0x5638, lsl 16
 	ldr	w6, [x6, #:lo12:.LANCHOR119]
 	cmp	w6, w7
 	csel	w0, w0, w3, ne
-.L1049:
+.L1051:
 	lsl	w0, w0, 2
 	sub	w0, w0, #4
 	str	w0, [x29, 176]
-.L1048:
+.L1050:
 	mov	w0, 61424
 	str	w0, [x29, 180]
 	ldr	x0, [x29, 160]
 	ldrh	w27, [x0, w1, sxtw 1]
 	ldrb	w0, [x5]
-	cbz	w0, .L1050
+	cbz	w0, .L1052
 	adrp	x0, .LANCHOR119
 	mov	w3, 12336
 	movk	w3, 0x5638, lsl 16
 	ldr	w0, [x0, #:lo12:.LANCHOR119]
 	cmp	w0, w3
 	csel	w27, w27, w1, ne
-.L1050:
+.L1052:
 	adrp	x0, .LANCHOR33
 	madd	w1, w22, w27, w26
 	stp	x5, x2, [x29, 112]
@@ -7538,8 +7574,8 @@ idb_write_data:
 	bl	FlashPageProgMsbFFData
 	ldr	w4, [x29, 140]
 	ldr	x5, [x29, 112]
-	b	.L1047
-.L1056:
+	b	.L1049
+.L1058:
 	ldr	x0, [x29, 144]
 	ubfiz	x0, x0, 9, 16
 	add	x27, x27, x0
@@ -7547,15 +7583,15 @@ idb_write_data:
 	add	w26, w0, w26
 	mov	w0, 0
 	and	w26, w26, 65535
-	b	.L1052
-.L1060:
+	b	.L1054
+.L1062:
 	add	x22, x22, 1
 	cmp	x22, 65536
-	bne	.L1057
+	bne	.L1059
 	add	w23, w23, 1
 	cmp	w23, 5
-	bls	.L1061
-	b	.L1065
+	bls	.L1063
+	b	.L1067
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7589,11 +7625,11 @@ ftl_malloc:
 	.type	NandcInit, %function
 NandcInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR6
-	add	x1, x2, :lo12:.LANCHOR6
+	adrp	x2, .LANCHOR0
+	add	x1, x2, :lo12:.LANCHOR0
 	adrp	x4, .LANCHOR119
 	add	x29, sp, 0
-	str	x0, [x2, #:lo12:.LANCHOR6]
+	str	x0, [x2, #:lo12:.LANCHOR0]
 	mov	w2, 1
 	str	w2, [x1, 24]
 	mov	w2, 2
@@ -7619,10 +7655,10 @@ NandcInit:
 	ldr	w2, [x0, 352]
 	str	w2, [x4, #:lo12:.LANCHOR119]
 	cmp	w2, 2049
-	bne	.L1095
+	bne	.L1097
 	mov	w2, 8
 	str	w2, [x3, #:lo12:.LANCHOR34]
-.L1095:
+.L1097:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -7859,8 +7895,8 @@ FtlMemInit:
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR0
-	str	x0, [x1, #:lo12:.LANCHOR0]
+	adrp	x1, .LANCHOR1
+	str	x0, [x1, #:lo12:.LANCHOR1]
 	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
@@ -7939,36 +7975,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L1098:
+.L1100:
 	cmp	w0, w7
-	bcc	.L1099
+	bcc	.L1101
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR74
 	mov	x3, 0
-.L1100:
+.L1102:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L1101
+	bne	.L1103
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1099:
+.L1101:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L1098
-.L1101:
+	b	.L1100
+.L1103:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L1100
+	b	.L1102
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -8056,9 +8092,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC20
-.L1111:
+.L1113:
 	cmp	x25, x19
-	bne	.L1117
+	bne	.L1119
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
@@ -8070,38 +8106,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1117:
-	cbnz	w20, .L1112
+.L1119:
+	cbnz	w20, .L1114
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1112:
+.L1114:
 	cmp	w24, 4
-	bne	.L1113
+	bne	.L1115
 	ldr	w1, [x22, x19, lsl 2]
-.L1119:
+.L1121:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1116
+	bls	.L1118
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC20
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1116:
+.L1118:
 	add	x19, x19, 1
-	b	.L1111
-.L1113:
+	b	.L1113
+.L1115:
 	cmp	w24, 2
-	bne	.L1115
+	bne	.L1117
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1119
-.L1115:
+	b	.L1121
+.L1117:
 	ldrb	w1, [x22, x19]
-	b	.L1119
+	b	.L1121
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8128,18 +8164,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1121
+	bne	.L1123
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR196+17]
-.L1186:
+.L1188:
 	mov	w27, 7
-	b	.L1230
-.L1121:
+	b	.L1232
+.L1123:
 	cmp	w26, 3
-	bne	.L1123
+	bne	.L1125
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8155,26 +8191,26 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1229:
+.L1231:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1122:
+.L1124:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1128
+	bhi	.L1130
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
-	adrp	x25, .LANCHOR6
+	adrp	x25, .LANCHOR0
 	add	x26, x26, :lo12:.LANCHOR25
 	add	x4, x0, :lo12:.LANCHOR26
-	add	x25, x25, :lo12:.LANCHOR6
+	add	x25, x25, :lo12:.LANCHOR0
 	mov	w24, 0
-.L1129:
+.L1131:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1135
-.L1136:
+	bhi	.L1137
+.L1138:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -8185,9 +8221,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1123:
+.L1125:
 	cmp	w26, 4
-	bne	.L1124
+	bne	.L1126
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -8200,10 +8236,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1229
-.L1124:
+	b	.L1231
+.L1126:
 	cmp	w26, 5
-	bne	.L1125
+	bne	.L1127
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -8213,12 +8249,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1230:
+.L1232:
 	mov	w28, 4
-	b	.L1122
-.L1125:
+	b	.L1124
+.L1127:
 	cmp	w26, 6
-	bne	.L1126
+	bne	.L1128
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -8228,10 +8264,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1230
-.L1126:
+	b	.L1232
+.L1128:
 	cmp	w26, 7
-	bne	.L1127
+	bne	.L1129
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8254,10 +8290,10 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1122
-.L1127:
+	b	.L1124
+.L1129:
 	cmp	w26, 8
-	bne	.L1186
+	bne	.L1188
 	mov	w1, 6
 	strb	w1, [x0, 4]
 	mov	w1, 7
@@ -8269,8 +8305,8 @@ HynixGetReadRetryDefault:
 	mov	w1, 10
 	mov	w28, 5
 	strb	w1, [x0, 8]
-	b	.L1122
-.L1135:
+	b	.L1124
+.L1137:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -8284,7 +8320,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1130:
+.L1132:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -8299,15 +8335,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1130
+	bhi	.L1132
 	adrp	x2, .LANCHOR196
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1133:
+.L1135:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1132:
+.L1134:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -8316,10 +8352,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1132
+	bne	.L1134
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1133
+	bne	.L1135
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8329,11 +8365,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1129
-.L1128:
+	b	.L1131
+.L1130:
 	sub	w0, w26, #3
 	cmp	w0, 5
-	bhi	.L1136
+	bhi	.L1138
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -8350,16 +8386,16 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1137:
+.L1139:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1136
+	bls	.L1138
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
 	sbfiz	x1, x22, 4, 32
 	add	x3, x0, x1
 	ldr	x0, [x0, x1]
@@ -8370,43 +8406,43 @@ HynixGetReadRetryDefault:
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w26, 7
-	bne	.L1138
+	bne	.L1140
 	mov	x1, 28
 	mov	w0, 160
 	add	x3, x20, :lo12:.LANCHOR20
 	umaddl	x0, w0, w22, x1
-.L1231:
+.L1233:
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1141
+	bne	.L1143
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1232:
+.L1234:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1233
-.L1138:
+	b	.L1235
+.L1140:
 	cmp	w26, 8
-	beq	.L1140
+	beq	.L1142
 	ubfiz	x0, x22, 6, 8
 	add	x3, x20, :lo12:.LANCHOR20
 	add	x0, x0, 20
-	b	.L1231
-.L1141:
+	b	.L1233
+.L1143:
 	cmp	w25, 1
-	bhi	.L1143
+	bhi	.L1145
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1233:
+.L1235:
 	str	w0, [x19, 2048]
-.L1142:
+.L1144:
 	mov	w0, 22
 	str	w0, [x19, 2056]
 	mov	w0, 23
@@ -8419,14 +8455,14 @@ HynixGetReadRetryDefault:
 	cmp	w26, 6
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1144
+	bne	.L1146
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1145:
+.L1147:
 	mov	w0, 2
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L1185:
+.L1187:
 	mov	w0, 48
 	str	w0, [x19, 2056]
 	str	x3, [x29, 104]
@@ -8435,124 +8471,124 @@ HynixGetReadRetryDefault:
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
 	ccmp	w26, 8, 4, hi
-	beq	.L1187
+	beq	.L1189
 	cmp	w26, 7
 	mov	w0, 2
 	mov	w1, 32
 	csel	w1, w1, w0, eq
-.L1146:
+.L1148:
 	adrp	x8, .LANCHOR147
 	mov	x7, 0
 	ldr	x0, [x8, #:lo12:.LANCHOR147]
-.L1147:
+.L1149:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1147
+	bhi	.L1149
 	cmp	w26, 8
-	bne	.L1148
+	bne	.L1150
 	mov	w1, 0
-.L1150:
+.L1152:
 	ldrb	w7, [x0]
 	cmp	w7, 50
-	beq	.L1149
+	beq	.L1151
 	ldrb	w7, [x0, 1]
 	cmp	w7, 5
-	beq	.L1149
+	beq	.L1151
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1150
-.L1151:
+	bne	.L1152
+.L1153:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1153:
-	b	.L1153
-.L1143:
+.L1155:
+	b	.L1155
+.L1145:
 	cmp	w26, 7
-	bne	.L1142
+	bne	.L1144
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1232
-.L1144:
+	b	.L1234
+.L1146:
 	str	wzr, [x19, 2052]
-	b	.L1145
-.L1187:
+	b	.L1147
+.L1189:
 	mov	w1, 16
-	b	.L1146
-.L1149:
+	b	.L1148
+.L1151:
 	cmp	w1, 6
-	bhi	.L1151
-.L1152:
+	bhi	.L1153
+.L1154:
 	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1162:
+.L1164:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1163
+	bgt	.L1165
 	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1165:
+.L1167:
 	mov	x0, 0
-.L1164:
+.L1166:
 	ldrh	w11, [x8, x0, lsl 1]
 	mvn	w11, w11
 	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1164
+	bgt	.L1166
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 1
-	bne	.L1165
+	bne	.L1167
 	mov	x10, x1
 	mov	w11, 0
 	mov	w16, 1
-.L1171:
+.L1173:
 	mov	w0, 0
 	mov	w8, 0
-.L1170:
+.L1172:
 	mov	x14, x10
 	lsl	w15, w16, w8
 	mov	w13, 16
 	mov	w12, 0
-.L1168:
+.L1170:
 	ldrh	w17, [x14]
 	add	x14, x14, x24
 	bics	wzr, w15, w17
 	cinc	w12, w12, eq
 	subs	w13, w13, #1
-	bne	.L1168
+	bne	.L1170
 	cmp	w12, 8
-	bls	.L1169
+	bls	.L1171
 	orr	w0, w0, w15
 	and	w0, w0, 65535
-.L1169:
+.L1171:
 	add	w8, w8, 1
 	cmp	w8, 16
-	bne	.L1170
+	bne	.L1172
 	strh	w0, [x10], 2
 	add	w11, w11, 1
 	cmp	w23, w11
-	bgt	.L1171
+	bgt	.L1173
 	mov	x0, 0
 	mov	w8, 0
-.L1174:
+.L1176:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1174
+	bne	.L1176
 	cmp	w8, 7
-	ble	.L1175
+	ble	.L1177
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC22
@@ -8562,92 +8598,92 @@ HynixGetReadRetryDefault:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1176:
-	b	.L1176
-.L1148:
+.L1178:
+	b	.L1178
+.L1150:
 	cmp	w26, 7
-	bne	.L1154
+	bne	.L1156
 	mov	w1, 0
-.L1156:
+.L1158:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1155
+	beq	.L1157
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1155
+	beq	.L1157
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1156
-.L1157:
+	bne	.L1158
+.L1159:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1158:
-	b	.L1158
-.L1155:
+.L1160:
+	b	.L1160
+.L1157:
 	cmp	w1, 6
-	bls	.L1152
-	b	.L1157
-.L1154:
+	bls	.L1154
+	b	.L1159
+.L1156:
 	cmp	w26, 6
-	bne	.L1152
+	bne	.L1154
 	mov	x1, 0
-.L1159:
+.L1161:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1152
+	beq	.L1154
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1152
+	beq	.L1154
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1159
+	bne	.L1161
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1161:
-	b	.L1161
 .L1163:
+	b	.L1163
+.L1165:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1162
-.L1175:
+	b	.L1164
+.L1177:
 	cmp	w26, 6
-	beq	.L1189
+	beq	.L1191
 	cmp	w26, 7
-	beq	.L1190
+	beq	.L1192
 	cmp	w26, 8
 	mov	x1, 8
 	mov	x0, 5
 	csel	x0, x0, x1, eq
-.L1177:
+.L1179:
 	mov	w8, 0
-.L1178:
+.L1180:
 	mov	x1, 0
-.L1179:
+.L1181:
 	ldrb	w10, [x7, x1]
 	strb	w10, [x3, x1]
 	add	x1, x1, 1
 	cmp	w28, w1, uxtb
-	bhi	.L1179
+	bhi	.L1181
 	ldr	x1, [x29, 112]
 	add	w8, w8, 1
 	add	x3, x3, x0
 	cmp	w27, w8
 	add	x7, x7, x1
-	bgt	.L1178
+	bgt	.L1180
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1181
+	bhi	.L1183
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -8659,29 +8695,29 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1182:
+.L1184:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1137
-.L1189:
+	b	.L1139
+.L1191:
 	mov	x0, 4
-	b	.L1177
-.L1190:
+	b	.L1179
+.L1192:
 	mov	x0, 10
-	b	.L1177
-.L1181:
+	b	.L1179
+.L1183:
 	cmp	w26, 8
-	bne	.L1183
+	bne	.L1185
 	mov	w0, 190
-.L1234:
+.L1236:
 	str	w0, [x19, 2056]
-	b	.L1182
-.L1183:
+	b	.L1184
+.L1185:
 	mov	w0, 56
-	b	.L1234
-.L1140:
+	b	.L1236
+.L1142:
 	mov	w0, 120
 	str	w0, [x19, 2056]
 	str	wzr, [x19, 2052]
@@ -8704,7 +8740,7 @@ HynixGetReadRetryDefault:
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
-	b	.L1185
+	b	.L1187
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8712,14 +8748,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1235
+	cbz	w0, .L1237
 	sub	w2, w0, #1
 	cmp	w2, 7
-	bhi	.L1237
+	bhi	.L1239
 	b	HynixGetReadRetryDefault
-.L1237:
+.L1239:
 	cmp	w0, 49
-	bne	.L1238
+	bne	.L1240
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8730,41 +8766,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR13
 	add	x1, x1, :lo12:.LANCHOR13
 	mov	w2, 64
-.L1247:
+.L1249:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1238:
+.L1240:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1239
+	bhi	.L1241
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1248:
+.L1250:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1247
-.L1239:
+	b	.L1249
+.L1241:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1240
+	bne	.L1242
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1248
-.L1240:
+	b	.L1250
+.L1242:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1235
+	bne	.L1237
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8775,8 +8811,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR8
 	add	x1, x1, :lo12:.LANCHOR8
-	b	.L1247
-.L1235:
+	b	.L1249
+.L1237:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8786,26 +8822,27 @@ FlashGetReadRetryDefault:
 FlashInit:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR30
+	mov	w0, 32768
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR2
+	adrp	x22, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR1
+	adrp	x25, .LANCHOR3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR152
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR147
-	adrp	x21, .LANCHOR22
-	adrp	x26, .LC23
-	mov	w28, 0
+	adrp	x26, .LANCHOR200
+	adrp	x23, .LANCHOR30
+	adrp	x24, .LANCHOR152
 	str	x0, [x1, #:lo12:.LANCHOR147]
 	mov	w0, 32768
 	bl	ftl_malloc
+	adrp	x20, .LC23
 	adrp	x1, .LANCHOR153
+	adrp	x21, .LANCHOR22
+	mov	w28, 0
 	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 4096
 	bl	ftl_malloc
@@ -8817,59 +8854,65 @@ FlashInit:
 	str	x0, [x1, #:lo12:.LANCHOR198]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x22, #:lo12:.LANCHOR30]
+	strb	wzr, [x23, #:lo12:.LANCHOR30]
 	adrp	x1, .LANCHOR199
-	strb	wzr, [x23, #:lo12:.LANCHOR1]
+	strb	wzr, [x22, #:lo12:.LANCHOR2]
+	strb	wzr, [x26, #:lo12:.LANCHOR200]
 	str	x0, [x1, #:lo12:.LANCHOR199]
 	adrp	x1, .LANCHOR150
 	mov	w0, 50
-	strb	w0, [x24, #:lo12:.LANCHOR2]
+	strb	w0, [x25, #:lo12:.LANCHOR3]
 	strb	w0, [x1, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR149
 	mov	w1, 128
 	str	wzr, [x0, #:lo12:.LANCHOR149]
-	adrp	x0, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR4
+	str	w1, [x0, #:lo12:.LANCHOR4]
 	adrp	x0, .LANCHOR144
 	str	wzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 60
-	strb	w0, [x25, #:lo12:.LANCHOR152]
+	strb	w0, [x24, #:lo12:.LANCHOR152]
 	mov	x0, x19
-	bl	NandcInit
 	add	x19, x21, :lo12:.LANCHOR22
-	adrp	x10, .LANCHOR6
-	add	x27, x10, :lo12:.LANCHOR6
-	add	x0, x26, :lo12:.LC23
-	stp	x0, x19, [x29, 112]
-.L1254:
-	ldrb	w2, [x27, 8]
-	and	w1, w28, 255
-	mov	w26, w1
-	mov	w0, w1
-	str	w2, [x29, 108]
-	ldr	x20, [x27]
+	bl	NandcInit
+	add	x0, x20, :lo12:.LC23
+	adrp	x10, .LANCHOR0
+	mov	x20, x19
+	add	x27, x10, :lo12:.LANCHOR0
+	stp	x0, x26, [x29, 112]
+.L1256:
+	ldrb	w3, [x27, 8]
+	and	w2, w28, 255
+	ldr	x1, [x27]
+	mov	w26, w2
+	mov	w0, w2
+	str	x1, [x29, 96]
+	str	w3, [x29, 104]
 	bl	FlashReset
 	mov	w0, w26
 	bl	NandcFlashCs
-	ldr	w2, [x29, 108]
+	ldr	w3, [x29, 104]
 	mov	w0, 144
-	ubfiz	x2, x2, 8, 8
-	add	x20, x20, x2
-	str	w0, [x20, 2056]
+	ldr	x1, [x29, 96]
+	ubfiz	x3, x3, 8, 8
+	add	x1, x1, x3
+	str	x1, [x29, 104]
+	str	w0, [x1, 2056]
 	mov	x0, 200
-	str	wzr, [x20, 2052]
+	str	wzr, [x1, 2052]
 	bl	udelay
-	ldr	w0, [x20, 2048]
+	ldr	x1, [x29, 104]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 1]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 2]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 3]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 4]
-	ldr	w0, [x20, 2048]
+	ldr	w0, [x1, 2048]
 	strb	w0, [x19, 5]
 	mov	w0, w26
 	bl	NandcFlashDeCs
@@ -8877,7 +8920,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1250
+	bhi	.L1252
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8886,153 +8929,151 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L1250:
-	cbnz	w28, .L1251
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0]
+.L1252:
+	cbnz	w28, .L1253
+	ldrb	w0, [x20]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1295
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, 1]
+	bhi	.L1300
+	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	beq	.L1295
-.L1251:
+	beq	.L1300
+.L1253:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1253
+	bne	.L1255
 	mov	w0, 44
 	strb	w0, [x19]
-.L1253:
+.L1255:
 	add	w28, w28, 1
 	add	x27, x27, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1254
+	bne	.L1256
 	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1255
+	beq	.L1257
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1255:
+.L1257:
 	adrp	x20, .LANCHOR18
-	adrp	x28, .LANCHOR5
-	adrp	x26, .LANCHOR119
+	adrp	x28, .LANCHOR6
+	adrp	x27, .LANCHOR119
 	adrp	x19, .LANCHOR20
 	mov	w2, 852
 	mov	w1, 0
 	add	x0, x19, :lo12:.LANCHOR20
 	bl	ftl_memset
-	adrp	x3, .LANCHOR31
-	ldr	w4, [x26, #:lo12:.LANCHOR119]
-	add	x0, x3, :lo12:.LANCHOR31
-	strb	wzr, [x28, #:lo12:.LANCHOR5]
+	adrp	x4, .LANCHOR31
+	ldr	w5, [x27, #:lo12:.LANCHOR119]
+	add	x0, x4, :lo12:.LANCHOR31
+	strb	wzr, [x28, #:lo12:.LANCHOR6]
 	str	x0, [x20, #:lo12:.LANCHOR18]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
-	cmp	w4, w0
-	bne	.L1256
+	cmp	w5, w0
+	bne	.L1258
 	adrp	x0, .LANCHOR29
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR29]
-.L1256:
+.L1258:
 	add	x0, x21, :lo12:.LANCHOR22
-	ldrb	w1, [x0, 1]
-	add	w0, w1, 95
-	and	w2, w0, 255
+	ldrb	w2, [x0, 1]
+	add	w0, w2, 95
+	and	w1, w0, 255
 	mov	x0, 1
-	cmp	w2, 57
-	bhi	.L1257
+	cmp	w1, 57
+	bhi	.L1259
 	movk	x0, 0x205, lsl 48
-	lsr	x0, x0, x2
+	lsr	x0, x0, x1
 	mvn	x0, x0
-.L1257:
-	cmp	w1, 241
+.L1259:
+	cmp	w2, 241
 	and	w0, w0, 1
-	cset	w2, eq
+	cset	w1, eq
 	eor	w0, w0, 1
-	orr	w0, w2, w0
-	cbnz	w0, .L1258
-	cmp	w1, 220
-	bne	.L1259
+	orr	w0, w1, w0
+	cbnz	w0, .L1260
+	cmp	w2, 220
+	bne	.L1261
 	add	x0, x21, :lo12:.LANCHOR22
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1259
-.L1258:
+	bne	.L1261
+.L1260:
+	adrp	x3, .LANCHOR201
+	add	x6, x3, :lo12:.LANCHOR201
+	mov	w1, 16
+	strb	w1, [x25, #:lo12:.LANCHOR3]
+	strb	w1, [x24, #:lo12:.LANCHOR152]
 	mov	w0, 1
-	adrp	x27, .LANCHOR200
-	add	x2, x27, :lo12:.LANCHOR200
-	strb	w0, [x23, #:lo12:.LANCHOR1]
-	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR2]
-	strb	w0, [x25, #:lo12:.LANCHOR152]
-	add	x5, x21, :lo12:.LANCHOR22
-	ldrb	w0, [x21, #:lo12:.LANCHOR22]
-	strb	w0, [x2, 1]
-	strb	w1, [x2, 2]
-	cmp	w0, 152
-	bne	.L1260
-	ldrsb	w0, [x5, 4]
-	tbnz	w0, #31, .L1260
+	ldrb	w1, [x21, #:lo12:.LANCHOR22]
+	add	x7, x21, :lo12:.LANCHOR22
+	strb	w0, [x22, #:lo12:.LANCHOR2]
+	strb	w1, [x6, 1]
+	cmp	w1, 152
+	strb	w2, [x6, 2]
+	bne	.L1263
+	ldrsb	w1, [x7, 4]
+	tbnz	w1, #31, .L1264
 	mov	w0, 24
-	strb	w0, [x25, #:lo12:.LANCHOR152]
-.L1260:
-	cmp	w4, 2049
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1263:
+	cmp	w5, 2049
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
-	ccmp	w4, w0, 4, ne
-	bne	.L1261
+	ccmp	w5, w0, 4, ne
+	bne	.L1266
 	mov	w0, 16
-	strb	w0, [x25, #:lo12:.LANCHOR152]
-.L1261:
-	cmp	w1, 218
-	bne	.L1262
-	add	x0, x27, :lo12:.LANCHOR200
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1266:
+	cmp	w2, 218
+	bne	.L1267
+	add	x0, x3, :lo12:.LANCHOR201
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1329:
+.L1334:
 	strb	w1, [x0, 2]
-.L1263:
+.L1268:
 	adrp	x1, .LANCHOR143
 	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
 	add	x1, x1, 32
-	str	x3, [x29, 120]
+	stp	x3, x4, [x29, 112]
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
-	ldr	x3, [x29, 120]
+	ldp	x3, x4, [x29, 112]
 	mov	w2, 32
-	add	x1, x27, :lo12:.LANCHOR200
-	add	x0, x3, :lo12:.LANCHOR31
+	add	x1, x3, :lo12:.LANCHOR201
+	add	x0, x4, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1259:
-	ldrb	w0, [x23, #:lo12:.LANCHOR1]
-	adrp	x27, .LANCHOR15
-	cbnz	w0, .L1266
+.L1261:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	adrp	x24, .LANCHOR15
+	cbnz	w0, .L1271
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1268
+	cbnz	w0, .L1273
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
-	adrp	x25, .LANCHOR24
+	adrp	x26, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
-	strb	w0, [x25, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1268
+	strb	w0, [x26, #:lo12:.LANCHOR24]
+	tbnz	x1, 0, .L1273
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR30]
+	strb	w1, [x23, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x25, #:lo12:.LANCHOR24]
+	ldrb	w0, [x26, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1268:
+.L1273:
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
-	strb	w0, [x27, #:lo12:.LANCHOR15]
+	strb	w0, [x24, #:lo12:.LANCHOR15]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1266
+	cbz	w0, .L1271
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC24
@@ -9040,7 +9081,7 @@ FlashInit:
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1249
+	beq	.L1251
 	bl	FlashDieInfoInit
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
@@ -9051,44 +9092,44 @@ FlashInit:
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1271
+	blt	.L1276
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1272
-.L1271:
+	bge	.L1277
+.L1276:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1272:
+.L1277:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1273
+	beq	.L1278
 	bl	FlashSavePhyInfo
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1273:
+.L1278:
 	bl	FlashSavePhyInfo
-.L1266:
+.L1271:
 	ldr	x2, [x20, #:lo12:.LANCHOR18]
-	adrp	x25, .LANCHOR24
+	adrp	x26, .LANCHOR24
 	ldrb	w0, [x2, 26]
-	strb	w0, [x27, #:lo12:.LANCHOR15]
+	strb	w0, [x24, #:lo12:.LANCHOR15]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
-	strb	w1, [x28, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR201
+	strb	w1, [x28, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR202
 	ubfx	x3, x0, 3, 1
 	adrp	x28, .LANCHOR145
-	strb	w3, [x1, #:lo12:.LANCHOR201]
+	strb	w3, [x1, #:lo12:.LANCHOR202]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
 	strb	w3, [x1, #:lo12:.LANCHOR27]
-	strb	w0, [x25, #:lo12:.LANCHOR24]
+	strb	w0, [x26, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
 	str	xzr, [x28, #:lo12:.LANCHOR145]
@@ -9098,7 +9139,7 @@ FlashInit:
 	bl	FlashDieInfoInit
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1275
+	tbz	x1, 6, .L1280
 	add	x3, x19, :lo12:.LANCHOR20
 	adrp	x1, .LANCHOR10
 	ldrb	w0, [x0, 19]
@@ -9113,7 +9154,7 @@ FlashInit:
 	sub	w3, w0, #1
 	and	w3, w3, 255
 	cmp	w3, 7
-	bhi	.L1276
+	bhi	.L1281
 	adrp	x1, HynixReadRetrial
 	add	x1, x1, :lo12:HynixReadRetrial
 	str	x1, [x28, #:lo12:.LANCHOR145]
@@ -9121,61 +9162,61 @@ FlashInit:
 	and	w1, w1, 255
 	cmp	w1, 1
 	ccmp	w0, 8, 4, hi
-	bne	.L1277
+	bne	.L1282
 	adrp	x1, .LANCHOR36
 	mov	w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR36]
-.L1277:
+.L1282:
 	add	x19, x19, :lo12:.LANCHOR20
 	cmp	w0, 7
-	beq	.L1330
+	beq	.L1335
 	cmp	w0, 8
-	bne	.L1298
-.L1330:
+	bne	.L1303
+.L1335:
 	add	x19, x19, 28
-.L1278:
+.L1283:
 	mov	x1, 0
 	mov	w2, 0
-.L1280:
+.L1285:
 	ldrsb	w3, [x19, x1]
 	add	x1, x1, 1
 	cmp	w3, 0
 	cinc	w2, w2, eq
 	cmp	x1, 32
-	bne	.L1280
+	bne	.L1285
 	cmp	w2, 27
-	bls	.L1275
+	bls	.L1280
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1275:
-	ldr	w1, [x26, #:lo12:.LANCHOR119]
+.L1280:
+	ldr	w1, [x27, #:lo12:.LANCHOR119]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1289
-	ldrb	w0, [x27, #:lo12:.LANCHOR15]
-	cbz	w0, .L1289
+	bne	.L1294
+	ldrb	w0, [x24, #:lo12:.LANCHOR15]
+	cbz	w0, .L1294
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1289:
+.L1294:
 	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1290
-	ldrb	w0, [x22, #:lo12:.LANCHOR30]
-	cbz	w0, .L1290
-	strb	wzr, [x22, #:lo12:.LANCHOR30]
+	bne	.L1295
+	ldrb	w0, [x23, #:lo12:.LANCHOR30]
+	cbz	w0, .L1295
+	strb	wzr, [x23, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1290:
-	ldrb	w0, [x25, #:lo12:.LANCHOR24]
+.L1295:
+	ldrb	w0, [x26, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1291
-	ldrb	w1, [x22, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1292
-	tbnz	x0, 0, .L1291
-.L1292:
+	beq	.L1296
+	ldrb	w1, [x23, #:lo12:.LANCHOR30]
+	cbnz	w1, .L1297
+	tbnz	x0, 0, .L1296
+.L1297:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	adrp	x0, .LANCHOR148
@@ -9184,7 +9225,7 @@ FlashInit:
 	bl	FlashDdrParaScan
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L1291:
+.L1296:
 	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
@@ -9194,7 +9235,7 @@ FlashInit:
 	ldr	x2, [x20, #:lo12:.LANCHOR18]
 	mov	w0, 16
 	adrp	x1, .LANCHOR14
-	strb	w0, [x24, #:lo12:.LANCHOR2]
+	strb	w0, [x25, #:lo12:.LANCHOR3]
 	add	x0, x1, :lo12:.LANCHOR14
 	ldrb	w3, [x2, 12]
 	strh	w3, [x0, 8]
@@ -9223,9 +9264,9 @@ FlashInit:
 	and	w1, w1, 65535
 	strh	w5, [x0, 26]
 	strh	w1, [x0, 22]
-	ldrb	w5, [x23, #:lo12:.LANCHOR1]
+	ldrb	w5, [x22, #:lo12:.LANCHOR2]
 	cmp	w5, 1
-	bne	.L1293
+	bne	.L1298
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -9234,11 +9275,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1293:
+.L1298:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1249:
+.L1251:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9246,175 +9287,208 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1262:
-	cmp	w1, 220
-	bne	.L1264
-	add	x0, x27, :lo12:.LANCHOR200
+.L1267:
+	cmp	w2, 220
+	bne	.L1269
+	add	x0, x3, :lo12:.LANCHOR201
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1329
-.L1264:
-	cmp	w1, 211
-	bne	.L1263
-	add	x0, x27, :lo12:.LANCHOR200
+	b	.L1334
+.L1269:
+	cmp	w2, 211
+	bne	.L1268
+	add	x0, x3, :lo12:.LANCHOR201
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, 2
 	strb	w1, [x0, 13]
-	b	.L1263
-.L1298:
+	b	.L1268
+.L1303:
 	add	x19, x19, 20
-	b	.L1278
-.L1276:
+	b	.L1283
+.L1281:
 	sub	w3, w0, #17
 	and	w3, w3, 255
 	cmp	w3, 2
-	bhi	.L1282
+	bhi	.L1287
 	adrp	x2, MicronReadRetrial
 	add	x2, x2, :lo12:MicronReadRetrial
 	str	x2, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	beq	.L1283
-.L1334:
+	beq	.L1288
+.L1339:
 	mov	w0, 7
-	b	.L1332
-.L1283:
+	b	.L1337
+.L1288:
 	mov	w0, 15
-.L1332:
+.L1337:
 	strb	w0, [x1, #:lo12:.LANCHOR151]
-	b	.L1275
-.L1282:
+	b	.L1280
+.L1287:
 	sub	w3, w0, #65
 	cmp	w0, 33
 	and	w3, w3, 255
 	ccmp	w3, 1, 0, ne
-	bhi	.L1284
+	bhi	.L1289
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
 	str	x0, [x28, #:lo12:.LANCHOR145]
 	mov	w0, 4
 	strb	w0, [x2, #:lo12:.LANCHOR12]
-	b	.L1334
-.L1284:
+	b	.L1339
+.L1289:
 	sub	w3, w0, #34
 	sub	w2, w0, #67
 	and	w3, w3, 255
 	and	w2, w2, 255
 	cmp	w3, 1
 	ccmp	w2, 1, 0, hi
-	bhi	.L1285
+	bhi	.L1290
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
 	str	x3, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1286
+	beq	.L1291
 	mov	w0, 7
-.L1331:
+.L1336:
 	strb	w0, [x1, #:lo12:.LANCHOR151]
 	cmp	w2, 1
-	bhi	.L1288
+	bhi	.L1293
 	mov	w0, 4
-.L1333:
+.L1338:
 	strb	w0, [x4, #:lo12:.LANCHOR12]
-	b	.L1275
-.L1286:
+	b	.L1280
+.L1291:
 	mov	w0, 17
-	b	.L1331
-.L1288:
+	b	.L1336
+.L1293:
 	mov	w0, 5
-	b	.L1333
-.L1285:
+	b	.L1338
+.L1290:
 	cmp	w0, 49
-	bne	.L1275
+	bne	.L1280
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
 	str	x0, [x28, #:lo12:.LANCHOR145]
-	b	.L1275
-.L1295:
+	b	.L1280
+.L1300:
 	mov	w0, -2
-	b	.L1249
+	b	.L1251
+.L1264:
+	ldr	x1, [x29, 120]
+	strb	w0, [x1, #:lo12:.LANCHOR200]
+	b	.L1263
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
 	.global	FlashReadSlc2KPages
 	.type	FlashReadSlc2KPages, %function
 FlashReadSlc2KPages:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w22, 56
 	stp	x25, x26, [sp, 64]
-	mov	w25, w2
+	and	w21, w1, 255
+	str	w2, [x29, 116]
 	adrp	x2, .LANCHOR31+9
-	stp	x23, x24, [sp, 48]
-	nop // between mem op and mult-accumulate
-	umaddl	x22, w1, w22, x0
 	stp	x19, x20, [sp, 16]
-	ldrb	w24, [x2, #:lo12:.LANCHOR31+9]
-	adrp	x23, .LANCHOR25
 	mov	x19, x0
-	and	w21, w1, 255
-	add	x23, x23, :lo12:.LANCHOR25
-	adrp	x26, .LANCHOR26
-	str	x27, [sp, 80]
-.L1336:
-	cmp	x22, x19
-	bne	.L1348
+	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w1, w22, x0
+	adrp	x26, .LANCHOR200
+	str	x0, [x29, 120]
+	stp	x23, x24, [sp, 48]
+	add	x0, x26, :lo12:.LANCHOR200
+	stp	x27, x28, [sp, 80]
+	str	x0, [x29, 104]
+.L1341:
+	ldr	x0, [x29, 120]
+	cmp	x19, x0
+	bne	.L1361
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1348:
-	mov	w1, w25
+.L1361:
+	ldr	w1, [x29, 116]
 	mov	w4, w21
-	add	x3, x29, 104
-	add	x2, x29, 108
+	add	x3, x29, 136
+	add	x2, x29, 140
 	mov	x0, x19
 	bl	LogAddr2PhyAddr
-	ldrb	w1, [x23]
-	ldr	w0, [x29, 104]
-	cmp	w1, w0
-	bhi	.L1337
+	adrp	x0, .LANCHOR25
+	ldr	w1, [x29, 136]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	cmp	w0, w1
+	bhi	.L1342
 	mov	w0, -1
 	str	w0, [x19]
-.L1338:
+.L1343:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1336
-.L1337:
-	add	x1, x26, :lo12:.LANCHOR26
-	ldrb	w27, [x1, w0, uxtw]
-	mov	w0, w27
+	b	.L1341
+.L1342:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	add	x23, x26, :lo12:.LANCHOR200
+	mov	w22, 0
+	mov	w24, 256
+	ldrb	w20, [x0, w1, uxtw]
+	mov	w0, w20
 	bl	NandcWaitFlashReady
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcFlashCs
-	ldr	w1, [x29, 108]
-	mov	w0, w27
+.L1344:
+	ldr	w1, [x29, 140]
+	mov	w0, w20
 	bl	FlashReadCmd
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldp	x3, x4, [x19, 8]
-	mov	w2, w24
+	mov	w2, w25
 	mov	w1, 0
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcXferData
-	mov	w20, w0
-	adrp	x0, .LANCHOR3
-	ldr	w1, [x29, 108]
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	mov	w28, w0
+	ldrb	w0, [x23]
+	cbz	w0, .L1345
+	mov	w0, w20
+	bl	flash_read_ecc
+	cmp	w0, 5
+	csel	w28, w28, w24, ls
+.L1345:
+	cmp	w22, 9
+	ccmn	w28, #1, 0, ls
+	bne	.L1346
+	add	w22, w22, 1
+	b	.L1344
+.L1346:
+	cmp	w22, 0
+	mov	w23, 256
+	adrp	x24, .LANCHOR4
+	csel	w28, w28, w23, eq
+	add	x24, x24, :lo12:.LANCHOR4
+	mov	w22, 0
+.L1348:
+	ldr	w0, [x24]
+	ldr	w1, [x29, 140]
 	add	w1, w1, w0
-	mov	w0, w27
+	mov	w0, w20
 	bl	FlashReadCmd
+	mov	w0, w20
+	bl	NandcWaitFlashReady
 	ldr	x0, [x19, 8]
-	mov	w2, w24
+	mov	w2, w25
 	mov	w1, 0
 	cmp	x0, 0
 	add	x3, x0, 2048
@@ -9423,62 +9497,78 @@ FlashReadSlc2KPages:
 	cmp	x0, 0
 	add	x4, x0, 8
 	csel	x4, x4, xzr, ne
-	mov	w0, w27
+	mov	w0, w20
 	bl	NandcXferData
-	mov	w2, w0
-	mov	w0, w27
+	mov	w27, w0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cbz	w0, .L1351
+	mov	w0, w20
+	bl	flash_read_ecc
+	cmp	w0, 5
+	csel	w27, w27, w23, ls
+.L1351:
+	cmp	w22, 9
+	ccmn	w27, #1, 0, ls
+	bne	.L1352
+	add	w22, w22, 1
+	b	.L1348
+.L1352:
+	cmp	w22, 0
+	mov	w3, 256
+	mov	w0, w20
+	csel	w27, w27, w3, eq
 	bl	NandcFlashDeCs
-	cmp	w20, w2
-	adrp	x1, .LANCHOR33
-	csel	w0, w20, w2, cs
-	ldrb	w2, [x1, #:lo12:.LANCHOR33]
-	add	w1, w2, w2, lsl 1
-	cmp	w0, w1, lsr 2
-	bls	.L1341
-	cmn	w0, #1
-	mov	w1, 256
-	csel	w0, w0, w1, eq
-.L1341:
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	csel	w0, w0, wzr, eq
-	str	w0, [x19]
+	adrp	x0, .LANCHOR33
+	cmp	w28, w27
+	csel	w5, w28, w27, cs
+	ldrb	w2, [x0, #:lo12:.LANCHOR33]
+	add	w0, w2, w2, lsl 1
+	cmp	w5, w0, lsr 2
+	bls	.L1354
+	cmn	w5, #1
+	csel	w5, w5, w3, eq
+.L1354:
+	cmp	w5, 256
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1344
+	ccmn	w5, #1, 4, ne
+	csel	w5, w5, wzr, eq
+	str	w5, [x19]
+	cbz	x0, .L1357
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1344
+	bne	.L1357
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1344
+	bne	.L1357
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1344
+	beq	.L1357
 	str	w1, [x19]
-.L1344:
+.L1357:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1338
+	bne	.L1343
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1346
+	cbz	x1, .L1359
 	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1346:
+.L1359:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1338
+	cbz	x1, .L1343
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1338
+	b	.L1343
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9486,16 +9576,16 @@ FlashReadSlc2KPages:
 	.type	FlashReadPages, %function
 FlashReadPages:
 	stp	x29, x30, [sp, -176]!
-	adrp	x3, .LANCHOR1
+	adrp	x3, .LANCHOR2
 	add	x29, sp, 0
-	ldrb	w3, [x3, #:lo12:.LANCHOR1]
+	ldrb	w3, [x3, #:lo12:.LANCHOR2]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1367
+	cbnz	w3, .L1390
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9503,23 +9593,23 @@ FlashReadPages:
 	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
 	mov	w22, 0
 	str	w0, [x29, 156]
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	str	x0, [x29, 128]
-	ldrb	w1, [x0, #:lo12:.LANCHOR5]
+	ldrb	w1, [x0, #:lo12:.LANCHOR6]
 	add	x0, x27, :lo12:.LANCHOR20
 	str	w1, [x29, 144]
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1368:
+.L1391:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1402
+	bcc	.L1425
 	mov	w0, 0
-	b	.L1366
-.L1367:
+	b	.L1389
+.L1390:
 	bl	FlashReadSlc2KPages
-.L1366:
+.L1389:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9527,7 +9617,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1402:
+.L1425:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9543,18 +9633,18 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1370
+	bhi	.L1393
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1371:
+.L1394:
 	add	w22, w22, 1
-	b	.L1368
-.L1370:
+	b	.L1391
+.L1393:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
-	adrp	x0, .LANCHOR201
-	ldrb	w0, [x0, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR202
+	ldrb	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 0
 	mov	w0, w19
 	csel	w20, w20, wzr, ne
@@ -9566,7 +9656,7 @@ FlashReadPages:
 	sub	w0, w1, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1373
+	bhi	.L1396
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x2, w19
 	add	x0, x0, x2
@@ -9574,59 +9664,59 @@ FlashReadPages:
 	and	w1, w1, 255
 	cmp	w1, 1
 	ldrb	w3, [x0, 12]
-	bhi	.L1374
+	bhi	.L1397
 	ldrb	w3, [x0, 20]
-.L1374:
+.L1397:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x2]
 	cmp	w0, w3
-	beq	.L1373
+	beq	.L1396
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1373:
+.L1396:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1375
+	cbz	w24, .L1398
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1375
+	cbz	w0, .L1398
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1376:
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
+.L1399:
+	adrp	x0, .LANCHOR4
+	add	x0, x0, :lo12:.LANCHOR4
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
-	add	x0, x0, :lo12:.LANCHOR5
+	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-.L1382:
+.L1405:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1377
+	bne	.L1400
 	cmp	w19, 255
-	beq	.L1404
-.L1377:
-	cbz	w20, .L1379
+	beq	.L1427
+.L1400:
+	cbz	w20, .L1402
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1380:
+.L1403:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1378
+	cbz	w20, .L1401
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1378:
+.L1401:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9635,29 +9725,29 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1381
+	cbz	w0, .L1404
 	cmn	w28, #1
-	bne	.L1381
+	bne	.L1404
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1382
-.L1375:
+	b	.L1405
+.L1398:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1376
-.L1379:
+	b	.L1399
+.L1402:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1380
-.L1404:
+	b	.L1403
+.L1427:
 	mov	w20, 0
-	b	.L1378
-.L1381:
-	cbz	w20, .L1383
-	adrp	x0, .LANCHOR3
+	b	.L1401
+.L1404:
+	cbz	w20, .L1406
+	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 172]
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
@@ -9673,27 +9763,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1383:
+.L1406:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
-	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1384
+	strb	w1, [x0, #:lo12:.LANCHOR6]
+	bne	.L1407
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1385
-.L1389:
+	cbnz	w0, .L1408
+.L1412:
 	adrp	x20, .LANCHOR145
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1386
+	cbnz	x4, .L1409
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1441
-.L1385:
+	b	.L1464
+.L1408:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9704,36 +9794,36 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1388
+	beq	.L1411
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1405
-.L1388:
+	bls	.L1428
+.L1411:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1389
-.L1405:
+	beq	.L1412
+.L1428:
 	mov	w20, 0
-.L1384:
+.L1407:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1390
+	bls	.L1413
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1390:
+.L1413:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1397
+	bne	.L1420
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
@@ -9741,25 +9831,25 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1397
+	cbz	x1, .L1420
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1397:
-	cbz	w20, .L1399
+.L1420:
+	cbz	w20, .L1422
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1400
+	bls	.L1423
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1400:
+.L1423:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9767,37 +9857,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1399:
+.L1422:
 	add	w22, w22, w20
-	cbz	w24, .L1371
+	cbz	w24, .L1394
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1371
+	cbz	w0, .L1394
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1371
-.L1386:
+	b	.L1394
+.L1409:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1408
+	bne	.L1431
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L1391
+	bhi	.L1414
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1391:
+.L1414:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9811,27 +9901,27 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1408
+	bne	.L1431
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1408
+	cbz	w0, .L1431
 	mov	w0, w19
-	cbz	w24, .L1392
+	cbz	w24, .L1415
 	bl	flash_enter_slc_mode
-.L1393:
+.L1416:
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1441:
+.L1464:
 	mov	w28, w0
-.L1408:
+.L1431:
 	mov	w20, 0
-	b	.L1390
-.L1392:
+	b	.L1413
+.L1415:
 	bl	flash_exit_slc_mode
-	b	.L1393
+	b	.L1416
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9850,20 +9940,20 @@ FlashProgSlc2KPages:
 	nop // between mem op and mult-accumulate
 	umaddl	x23, w1, w23, x0
 	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
-	adrp	x26, .LANCHOR3
+	adrp	x26, .LANCHOR4
 	stp	x27, x28, [sp, 80]
 	mov	w22, w21
 	stp	x19, x20, [sp, 16]
 	mov	x27, x0
 	mov	x20, x0
-	add	x28, x26, :lo12:.LANCHOR3
+	add	x28, x26, :lo12:.LANCHOR4
 	str	w3, [x29, 108]
-.L1443:
+.L1466:
 	cmp	x20, x23
-	bne	.L1449
+	bne	.L1472
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1450
-.L1469:
+	cbnz	w0, .L1473
+.L1492:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9872,7 +9962,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1449:
+.L1472:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9883,15 +9973,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1444
+	bhi	.L1467
 	mov	w0, -1
 	str	w0, [x20]
-.L1445:
+.L1468:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1443
-.L1444:
+	b	.L1466
+.L1467:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9918,7 +10008,7 @@ FlashProgSlc2KPages:
 	sbfx	x0, x0, 0, 1
 	str	w0, [x20]
 	ldr	w1, [x29, 112]
-	ldr	w0, [x26, #:lo12:.LANCHOR3]
+	ldr	w0, [x26, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w19
 	bl	FlashProgFirstCmd
@@ -9944,30 +10034,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1448
+	tbz	x0, 0, .L1471
 	mov	w0, -1
 	str	w0, [x20]
-.L1448:
+.L1471:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1445
-.L1456:
+	b	.L1468
+.L1479:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1451
+	bne	.L1474
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1452:
+.L1475:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1470:
+.L1493:
 	cmp	x27, x20
-	bne	.L1456
-	b	.L1469
-.L1451:
+	bne	.L1479
+	b	.L1492
+.L1474:
 	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9990,45 +10080,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1453
+	bne	.L1476
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1453:
+.L1476:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1454
+	cbz	x0, .L1477
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1454
+	beq	.L1477
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1454:
+.L1477:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1452
+	cbz	x0, .L1475
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1452
+	beq	.L1475
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1452
-.L1450:
+	b	.L1475
+.L1473:
 	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1470
+	b	.L1493
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -10046,9 +10136,9 @@ FlashProgPages:
 	stp	x27, x28, [sp, 80]
 	ldrb	w4, [x4, 19]
 	stp	w3, w4, [x29, 100]
-	adrp	x4, .LANCHOR1
-	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1473
+	adrp	x4, .LANCHOR2
+	ldrb	w4, [x4, #:lo12:.LANCHOR2]
+	cbnz	w4, .L1496
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -10058,28 +10148,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1474:
+.L1497:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1487
+	bcc	.L1510
 	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1488:
+.L1511:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1490
+	bhi	.L1513
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1491
-.L1499:
+	cbnz	w0, .L1514
+.L1522:
 	mov	w0, 0
-	b	.L1472
-.L1473:
+	b	.L1495
+.L1496:
 	bl	FlashProgSlc2KPages
-.L1472:
+.L1495:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10087,7 +10177,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1487:
+.L1510:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -10101,13 +10191,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1476
+	bhi	.L1499
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1477:
+.L1500:
 	add	w21, w21, 1
-	b	.L1474
-.L1476:
+	b	.L1497
+.L1499:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -10117,20 +10207,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1479
+	cbz	x1, .L1502
 	bl	FlashWaitCmdDone
-.L1479:
+.L1502:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1480
+	cbz	w23, .L1503
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1480:
+.L1503:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -10140,17 +10230,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1481
+	bne	.L1504
 	bl	NandcWaitFlashReady
-.L1482:
+.L1505:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 7
-	bhi	.L1483
+	bhi	.L1506
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1483
+	cbz	w0, .L1506
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -10158,17 +10248,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1483:
+.L1506:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1484
+	bne	.L1507
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1484
+	cbz	w0, .L1507
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1485:
+.L1508:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -10177,7 +10267,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1486
+	cbz	w23, .L1509
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -10190,9 +10280,9 @@ FlashProgPages:
 	mov	w0, w20
 	cset	w2, ne
 	bl	FlashWaitReadyEN
-	adrp	x0, .LANCHOR3
+	adrp	x0, .LANCHOR4
 	ldr	w1, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR4]
 	add	w1, w1, w0
 	mov	w0, w20
 	bl	FlashProgDpSecondCmd
@@ -10205,15 +10295,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1486:
+.L1509:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1477
-.L1481:
+	b	.L1500
+.L1504:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -10226,47 +10316,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1482
-.L1484:
+	b	.L1505
+.L1507:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1485
-.L1490:
+	b	.L1508
+.L1513:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1489
+	bne	.L1512
 	ldrb	w0, [x21]
-	cbz	w0, .L1489
+	cbz	w0, .L1512
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1489:
+.L1512:
 	add	x20, x20, 1
-	b	.L1488
-.L1491:
+	b	.L1511
+.L1514:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1492:
+.L1515:
 	cmp	x24, x19
-	beq	.L1499
+	beq	.L1522
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1493
+	bne	.L1516
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1494:
+.L1517:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1492
-.L1493:
+	b	.L1515
+.L1516:
 	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
@@ -10289,41 +10379,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1495
+	bne	.L1518
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1495:
+.L1518:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1496
+	cbz	x0, .L1519
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1496
+	beq	.L1519
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1496:
+.L1519:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1494
+	cbz	x0, .L1517
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1494
+	beq	.L1517
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1494
+	b	.L1517
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10337,7 +10427,7 @@ FlashTestBlk:
 	adrp	x0, .LANCHOR149
 	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1527
+	bcc	.L1550
 	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
@@ -10368,14 +10458,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1525:
+.L1548:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1527:
+.L1550:
 	mov	w19, 0
-	b	.L1525
+	b	.L1548
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10392,7 +10482,7 @@ FtlLowFormatEraseBlock:
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1552
+	cbnz	w0, .L1575
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
 	adrp	x20, .LANCHOR15
@@ -10418,10 +10508,10 @@ FtlLowFormatEraseBlock:
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1531:
+.L1554:
 	cmp	w11, w5, uxth
-	bhi	.L1535
-	cbz	w24, .L1529
+	bhi	.L1558
+	cbz	w24, .L1552
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -10434,31 +10524,31 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1538:
+.L1561:
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1537
+	bne	.L1560
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1537:
+.L1560:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1538
-	cbnz	w25, .L1539
+	bne	.L1561
+	cbnz	w25, .L1562
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1540:
+.L1563:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1548:
+.L1571:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR77]
@@ -10471,10 +10561,10 @@ FtlLowFormatEraseBlock:
 	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR58]
-.L1541:
+.L1564:
 	cmp	w7, w5, uxth
-	bhi	.L1544
-	cbz	w20, .L1529
+	bhi	.L1567
+	cbz	w20, .L1552
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -10486,11 +10576,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1547:
+.L1570:
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1546
+	cbz	w0, .L1569
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10498,39 +10588,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1546:
+.L1569:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1547
+	bne	.L1570
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1548
+	bhi	.L1571
 	mov	x23, 0
-.L1550:
-	cbz	w25, .L1549
+.L1573:
+	cbz	w25, .L1572
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1549
+	cbnz	w0, .L1572
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1549:
+.L1572:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1550
+	bne	.L1573
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1529
+	beq	.L1552
 	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1529:
+.L1552:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10539,7 +10629,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1535:
+.L1558:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10547,13 +10637,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1532
+	cbz	w25, .L1555
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1533
-.L1532:
+	cbnz	w0, .L1556
+.L1555:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1534
+	cbnz	w0, .L1557
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10563,26 +10653,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1533:
+.L1556:
 	add	x5, x5, 1
-	b	.L1531
-.L1534:
+	b	.L1554
+.L1557:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1533
-.L1539:
+	b	.L1556
+.L1562:
 	adrp	x0, .LANCHOR53
 	ldrh	w27, [x0, #:lo12:.LANCHOR53]
 	ldrb	w0, [x20, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1553
+	cbnz	w0, .L1576
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1540
-.L1553:
+	b	.L1563
+.L1576:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1540
-.L1544:
+	b	.L1563
+.L1567:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10592,13 +10682,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1542
+	cbz	w25, .L1565
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1543
-.L1542:
+	cbnz	w0, .L1566
+.L1565:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1543
+	cbnz	w0, .L1566
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10608,12 +10698,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1543:
+.L1566:
 	add	x5, x5, 1
-	b	.L1541
-.L1552:
+	b	.L1564
+.L1575:
 	mov	w19, 0
-	b	.L1529
+	b	.L1552
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10629,11 +10719,11 @@ FtlBbmTblFlush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1576
+	cbnz	w0, .L1599
 	adrp	x24, .LANCHOR188
 	adrp	x23, .LANCHOR183
-	adrp	x20, .LANCHOR202
-	add	x19, x20, :lo12:.LANCHOR202
+	adrp	x20, .LANCHOR203
+	add	x19, x20, :lo12:.LANCHOR203
 	ldr	x1, [x24, #:lo12:.LANCHOR188]
 	adrp	x21, .LANCHOR74
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
@@ -10649,20 +10739,20 @@ FtlBbmTblFlush:
 	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1577:
+.L1600:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1578
-	add	x20, x20, :lo12:.LANCHOR202
+	blt	.L1601
+	add	x20, x20, :lo12:.LANCHOR203
 	add	x19, x21, :lo12:.LANCHOR74
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x25, .LC33
+	adrp	x26, .LC33
 	adrp	x27, .LANCHOR53
 	ldr	x28, [x20, 16]
-	add	x25, x25, :lo12:.LC33
+	add	x26, x26, :lo12:.LC33
 	add	x27, x27, :lo12:.LANCHOR53
-	mov	w26, 0
+	mov	w25, 0
 	mov	x0, x28
 	bl	ftl_memset
 	mov	w0, -3887
@@ -10679,7 +10769,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1579:
+.L1602:
 	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
 	ldrh	w2, [x19, 2]
@@ -10691,13 +10781,13 @@ FtlBbmTblFlush:
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x20]
 	str	w0, [x20, 4]
-	mov	x0, x25
+	mov	x0, x26
 	bl	printf
 	ldrh	w0, [x27]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1580
+	blt	.L1603
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -10716,7 +10806,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1580:
+.L1603:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -10727,7 +10817,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1581
+	bne	.L1604
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC34
@@ -10735,7 +10825,7 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1579
+	bls	.L1602
 	ldr	w1, [x20, 4]
 	mov	w2, w21
 	adrp	x0, .LC35
@@ -10743,7 +10833,7 @@ FtlBbmTblFlush:
 	bl	printf
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR76]
-.L1576:
+.L1599:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10752,7 +10842,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1578:
+.L1601:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x19, 8]
@@ -10761,11 +10851,14 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1577
-.L1581:
-	cbnz	w26, .L1576
-	mov	w26, 1
-	b	.L1579
+	b	.L1600
+.L1604:
+	add	w25, w25, 1
+	cmp	w25, 1
+	beq	.L1602
+	cmp	w0, 256
+	beq	.L1602
+	b	.L1599
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
@@ -10774,7 +10867,7 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1650
+	cbnz	w1, .L1678
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10788,7 +10881,7 @@ allocate_data_superblock:
 	add	x23, x0, :lo12:.LANCHOR88
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1641:
+.L1669:
 	ldr	x1, [x29, 120]
 	adrp	x0, .LANCHOR88
 	adrp	x24, .LANCHOR40
@@ -10797,11 +10890,11 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1589
-	mov	w2, 3139
-	adrp	x1, .LANCHOR203
+	ble	.L1617
+	mov	w2, 3165
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10809,11 +10902,11 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1589:
+.L1617:
 	adrp	x0, .LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1590
+	bne	.L1618
 	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
 	ldr	w3, [x1, #:lo12:.LANCHOR172]
@@ -10824,57 +10917,57 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1591
+	cbz	w4, .L1619
 	adrp	x4, .LANCHOR170
 	ldr	w4, [x4, #:lo12:.LANCHOR170]
 	cmp	w4, 39
-	bhi	.L1591
+	bhi	.L1619
 	cmp	w4, 2
-	bls	.L1625
-	tbz	x2, 0, .L1621
-	cbz	w3, .L1625
-.L1621:
+	bls	.L1653
+	tbz	x2, 0, .L1649
+	cbz	w3, .L1653
+.L1649:
 	mov	w1, w0
-	b	.L1591
-.L1590:
+	b	.L1619
+.L1618:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1625
+	bne	.L1653
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1625
+	beq	.L1653
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L1625
+	cbnz	w0, .L1653
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1591
+	cbz	w2, .L1619
 	adrp	x2, .LANCHOR170
 	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1591
+	bhi	.L1619
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1591:
-	cbz	w1, .L1592
+.L1619:
+	cbz	w1, .L1620
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1592:
+.L1620:
 	ldrb	w2, [x19, 8]
 	adrp	x0, .LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1593
-	mov	w2, 3159
-	adrp	x1, .LANCHOR203
+	cbnz	w0, .L1621
+	mov	w2, 3185
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10882,23 +10975,23 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1593:
+.L1621:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
 	ldrh	w0, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w22
-	bls	.L1641
+	bls	.L1669
 	adrp	x25, .LANCHOR83
 	ubfiz	x21, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	ldrh	w20, [x0, x21]
-	cbnz	w20, .L1641
+	cbnz	w20, .L1669
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1595
+	cbnz	w0, .L1623
 	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	mov	w1, -1
 	strh	w1, [x0, x21]
@@ -10907,11 +11000,11 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1641
-	mov	w2, 3175
-	adrp	x1, .LANCHOR203
+	ble	.L1669
+	mov	w2, 3201
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10919,21 +11012,21 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1641
-.L1625:
+	b	.L1669
+.L1653:
 	mov	w1, 0
-	b	.L1592
-.L1595:
+	b	.L1620
+.L1623:
 	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1597
-	mov	w2, 3178
-	adrp	x1, .LANCHOR203
+	ble	.L1625
+	mov	w2, 3204
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10941,7 +11034,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1597:
+.L1625:
 	adrp	x1, .LANCHOR38
 	adrp	x25, .LANCHOR77
 	mov	w2, 56
@@ -10954,14 +11047,14 @@ allocate_data_superblock:
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1598:
+.L1626:
 	cmp	x1, x0
-	bne	.L1600
-	cbnz	w20, .L1601
-	mov	w2, 3190
-	adrp	x1, .LANCHOR203
+	bne	.L1628
+	cbnz	w20, .L1629
+	mov	w2, 3216
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10969,29 +11062,29 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1601:
+.L1629:
 	adrp	x0, .LANCHOR28
 	adrp	x28, .LANCHOR78
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1602
+	cbz	w0, .L1630
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
 	cmp	x19, x0
-	bne	.L1602
+	bne	.L1630
 	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1602
+	bls	.L1630
 	strb	wzr, [x19, 8]
-.L1602:
-	adrp	x0, .LANCHOR204
-	ldrh	w0, [x0, #:lo12:.LANCHOR204]
+.L1630:
+	adrp	x0, .LANCHOR205
+	ldrh	w0, [x0, #:lo12:.LANCHOR205]
 	cmp	w0, w22
-	bne	.L1603
-	mov	w2, 3197
-	adrp	x1, .LANCHOR203
+	bne	.L1631
+	mov	w2, 3223
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -10999,18 +11092,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1603:
+.L1631:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
 	adrp	x5, .LANCHOR167
 	adrp	x4, .LANCHOR168
 	ldr	x1, [x28, #:lo12:.LANCHOR78]
-	cbnz	w0, .L1604
+	cbnz	w0, .L1632
 	ldrh	w0, [x1, x21]
-	cbz	w0, .L1605
+	cbz	w0, .L1633
 	ldrh	w2, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w2
-.L1653:
+.L1681:
 	strh	w0, [x1, x21]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR167]
@@ -11018,15 +11111,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR167]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1607:
+.L1635:
 	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w1, [x0, x21]
 	adrp	x0, .LANCHOR169
 	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1608
+	bls	.L1636
 	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1608:
+.L1636:
 	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
 	ldr	w1, [x4, #:lo12:.LANCHOR168]
@@ -11034,8 +11127,8 @@ allocate_data_superblock:
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR205
-	str	w0, [x1, #:lo12:.LANCHOR205]
+	adrp	x1, .LANCHOR206
+	str	w0, [x1, #:lo12:.LANCHOR206]
 	adrp	x0, .LANCHOR191
 	ldr	x1, [x0, #:lo12:.LANCHOR191]
 	ldr	w0, [x1, 16]
@@ -11047,20 +11140,20 @@ allocate_data_superblock:
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1609:
+.L1637:
 	cmp	x1, x2
-	bne	.L1610
+	bne	.L1638
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1611
+	cbz	w1, .L1639
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1612
+	bne	.L1640
 	mov	w1, 0
-.L1654:
+.L1682:
 	bl	FlashEraseBlocks
-.L1611:
+.L1639:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	ldr	x0, [x25, #:lo12:.LANCHOR77]
@@ -11068,39 +11161,39 @@ allocate_data_superblock:
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1613:
+.L1641:
 	cmp	w20, w24, uxth
-	bhi	.L1615
-	cbz	w1, .L1616
+	bhi	.L1643
+	cbz	w1, .L1644
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1616:
+.L1644:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1617
+	cbnz	w0, .L1645
 	adrp	x0, .LANCHOR83
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, x21]
-	b	.L1641
-.L1600:
+	b	.L1669
+.L1628:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1599
+	beq	.L1627
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1599:
+.L1627:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1598
-.L1605:
+	b	.L1626
+.L1633:
 	mov	w0, 2
-	b	.L1653
-.L1604:
+	b	.L1681
+.L1632:
 	ldrh	w0, [x1, x21]
 	add	w0, w0, 1
 	strh	w0, [x1, x21]
@@ -11109,22 +11202,22 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR168]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.10
-	b	.L1607
-.L1610:
+	b	.L1635
+.L1638:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1609
-.L1612:
+	b	.L1637
+.L1640:
 	mov	w1, 1
-	b	.L1654
-.L1615:
+	b	.L1682
+.L1643:
 	mul	x0, x24, x3
 	ldr	x2, [x25, #:lo12:.LANCHOR77]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1614
+	bne	.L1642
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -11137,11 +11230,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1614:
+.L1642:
 	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1613
-.L1617:
+	b	.L1641
+.L1645:
 	adrp	x1, .LANCHOR52
 	adrp	x2, .LANCHOR159
 	strh	wzr, [x19, 2]
@@ -11159,14 +11252,14 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1618
+	cbz	w0, .L1646
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1588
-.L1618:
-	mov	w2, 3256
-	adrp	x1, .LANCHOR203
+	cbnz	w0, .L1616
+.L1646:
+	mov	w2, 3282
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR203
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11174,7 +11267,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1588:
+.L1616:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11183,7 +11276,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1650:
+.L1678:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -11202,17 +11295,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1656
+	cbz	w0, .L1684
 	adrp	x23, .LANCHOR117
 	add	x24, x23, :lo12:.LANCHOR117
 	mov	w19, 0
-.L1657:
+.L1685:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1663
+	bhi	.L1691
 	bl	FtlGcReFreshBadBlk
-.L1656:
+.L1684:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11221,7 +11314,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1663:
+.L1691:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
@@ -11230,19 +11323,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1658:
+.L1686:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1662
+	bhi	.L1690
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1657
-.L1662:
+	b	.L1685
+.L1690:
 	add	x0, x23, :lo12:.LANCHOR117
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1659
+	bne	.L1687
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -11250,22 +11343,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1660:
+.L1688:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1661
+	bhi	.L1689
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1659:
+.L1687:
 	and	w20, w27, 65535
-	b	.L1658
-.L1661:
+	b	.L1686
+.L1689:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1660
+	b	.L1688
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -11280,25 +11373,25 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1669
-	adrp	x0, .LANCHOR204
-	ldrh	w1, [x0, #:lo12:.LANCHOR204]
+	cbnz	w0, .L1697
+	adrp	x0, .LANCHOR205
+	ldrh	w1, [x0, #:lo12:.LANCHOR205]
 	cmp	w1, w19
-	bne	.L1670
+	bne	.L1698
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR204]
-.L1671:
+	strh	w1, [x0, #:lo12:.LANCHOR205]
+.L1699:
 	adrp	x20, .LANCHOR85
 	mov	w1, w19
 	adrp	x0, .LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR82
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L1673
-	mov	w2, 3367
-	adrp	x1, .LANCHOR206
+	cbnz	w0, .L1701
+	mov	w2, 3393
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11306,7 +11399,7 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1673:
+.L1701:
 	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR85]
@@ -11321,11 +11414,11 @@ update_vpc_list:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1677
-	mov	w2, 3370
-	adrp	x1, .LANCHOR206
+	ble	.L1705
+	mov	w2, 3396
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11333,32 +11426,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1677:
+.L1705:
 	mov	w0, 1
-	b	.L1668
-.L1670:
+	b	.L1696
+.L1698:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w19
-	beq	.L1676
+	beq	.L1704
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1676
+	beq	.L1704
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	bne	.L1671
-.L1676:
+	bne	.L1699
+.L1704:
 	mov	w0, 0
-.L1668:
+.L1696:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1669:
+.L1697:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1676
+	b	.L1704
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11372,12 +11465,12 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1680
+	beq	.L1708
 	adrp	x20, .LANCHOR83
 	ubfiz	x21, x19, 1, 16
 	ldr	x1, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1681
+	cbnz	w0, .L1709
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC36
@@ -11385,11 +11478,11 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1682
-	mov	w2, 3385
-	adrp	x1, .LANCHOR207
+	cbnz	w0, .L1710
+	mov	w2, 3411
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11397,7 +11490,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1682:
+.L1710:
 	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	adrp	x6, .LANCHOR87
 	add	x6, x6, :lo12:.LANCHOR87
@@ -11406,17 +11499,17 @@ decrement_vpc_count:
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1683
+	cbz	w0, .L1711
 	adrp	x22, .LANCHOR88
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
 	ldrh	w0, [x22, #:lo12:.LANCHOR88]
-	cbnz	w0, .L1684
-	mov	w2, 3389
-	adrp	x1, .LANCHOR207
+	cbnz	w0, .L1712
+	mov	w2, 3415
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11424,7 +11517,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1684:
+.L1712:
 	ldrh	w0, [x22, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
 	strh	w0, [x22, #:lo12:.LANCHOR88]
@@ -11436,26 +11529,26 @@ decrement_vpc_count:
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1683:
+.L1711:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1687:
+.L1715:
 	mov	w20, 0
-	b	.L1679
-.L1681:
+	b	.L1707
+.L1709:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1680:
+.L1708:
 	adrp	x21, .LANCHOR133
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1686
+	bne	.L1714
 	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1687
-.L1686:
+	b	.L1715
+.L1714:
 	cmp	w19, w0
-	beq	.L1687
+	beq	.L1715
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR81
@@ -11473,13 +11566,13 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1679
+	cbnz	w1, .L1707
 	cmp	w19, w0, uxth
-	beq	.L1679
-	mov	w2, 3410
-	adrp	x1, .LANCHOR207
+	beq	.L1707
+	mov	w2, 3436
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11487,7 +11580,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1679:
+.L1707:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11500,7 +11593,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1704
+	cbz	w1, .L1732
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11509,7 +11602,7 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1692
+	beq	.L1720
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR15
@@ -11518,37 +11611,37 @@ FtlSlcSuperblockCheck:
 	add	x23, x22, :lo12:.LANCHOR15
 	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1696:
+.L1724:
 	cmp	w0, w20
-	beq	.L1698
+	beq	.L1726
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1699
+	bne	.L1727
 	ldrb	w1, [x23]
-	cbnz	w1, .L1699
+	cbnz	w1, .L1727
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1699
+	bne	.L1727
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1698
+	cbnz	w0, .L1726
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1707:
+.L1735:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1692:
+.L1720:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1698:
+.L1726:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11556,26 +11649,26 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1697
+	bne	.L1725
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1697:
+.L1725:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1696
-.L1699:
+	b	.L1724
+.L1727:
 	ldrb	w1, [x22, #:lo12:.LANCHOR15]
-	cbz	w1, .L1692
+	cbz	w1, .L1720
 	cmp	w0, 1
-	bne	.L1692
+	bne	.L1720
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1692
+	bcc	.L1720
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -11587,8 +11680,8 @@ FtlSlcSuperblockCheck:
 	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	b	.L1707
-.L1704:
+	b	.L1735
+.L1732:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11606,11 +11699,11 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1709
-	mov	w2, 3307
-	adrp	x1, .LANCHOR208
+	bne	.L1737
+	mov	w2, 3333
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11618,16 +11711,16 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1709:
+.L1737:
 	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1710
-	mov	w2, 3308
-	adrp	x1, .LANCHOR208
+	bne	.L1738
+	mov	w2, 3334
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11635,13 +11728,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1710:
+.L1738:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1711
-	mov	w2, 3309
-	adrp	x1, .LANCHOR208
+	cbnz	w0, .L1739
+	mov	w2, 3335
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11649,7 +11742,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1711:
+.L1739:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
@@ -11660,42 +11753,42 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1712:
+.L1740:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1713
+	beq	.L1741
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1715
+	bne	.L1743
 	ldrb	w3, [x23]
-	cbnz	w3, .L1715
+	cbnz	w3, .L1743
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1715
+	bne	.L1743
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1713:
+.L1741:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1714
+	bne	.L1742
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1714:
+.L1742:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1712
-.L1715:
+	b	.L1740
+.L1743:
 	adrp	x23, .LANCHOR15
 	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
@@ -11703,46 +11796,46 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1716:
+.L1744:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1718:
+.L1746:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1717
+	bne	.L1745
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1717:
+.L1745:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1718
+	beq	.L1746
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1719
+	bne	.L1747
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1720
+	cbnz	w2, .L1748
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1719
+	bne	.L1747
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1719
+	cbz	w0, .L1747
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1716
-.L1720:
+	b	.L1744
+.L1748:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1719
+	bcc	.L1747
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -11755,17 +11848,17 @@ get_new_active_ppa:
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1719:
+.L1747:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1708
+	bne	.L1736
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1708
-	mov	w2, 3353
-	adrp	x1, .LANCHOR208
+	cbz	w0, .L1736
+	mov	w2, 3379
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11773,7 +11866,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1708:
+.L1736:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11787,112 +11880,111 @@ get_new_active_ppa:
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR76
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
+	ldr	w1, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	x24, [x29, 104]
-	cbnz	w0, .L1733
-	adrp	x26, .LANCHOR188
-	adrp	x28, .LANCHOR202
-	adrp	x23, .LANCHOR209
-	add	x21, x28, :lo12:.LANCHOR202
-	ldr	x20, [x26, #:lo12:.LANCHOR188]
-	adrp	x25, .LANCHOR183
-	ldrh	w2, [x23, #:lo12:.LANCHOR209]
-	add	x1, x23, :lo12:.LANCHOR209
-	ldr	x0, [x25, #:lo12:.LANCHOR183]
+	str	x0, [x29, 112]
+	cbnz	w1, .L1761
+	adrp	x25, .LANCHOR188
+	adrp	x27, .LANCHOR210
+	adrp	x23, .LANCHOR183
+	adrp	x20, .LANCHOR203
+	ldr	x19, [x25, #:lo12:.LANCHOR188]
+	add	x22, x20, :lo12:.LANCHOR203
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	add	x1, x27, :lo12:.LANCHOR210
+	ldrh	w2, [x27, #:lo12:.LANCHOR210]
 	mov	w3, 19539
-	stp	x0, x20, [x21, 8]
+	stp	x0, x19, [x22, 8]
 	movk	w3, 0x4654, lsl 16
-	strh	w2, [x20, 2]
+	strh	w2, [x19, 2]
 	mov	w2, -3932
-	strh	w2, [x20]
-	adrp	x22, .LANCHOR159
+	strh	w2, [x19]
+	adrp	x24, .LANCHOR159
 	ldr	w2, [x1, 8]
-	adrp	x27, .LANCHOR40
+	adrp	x26, .LANCHOR57
 	ldrh	w1, [x1, 6]
-	stp	w2, wzr, [x20, 4]
+	stp	w2, wzr, [x19, 4]
 	adrp	x2, .LANCHOR80
-	add	x19, x2, :lo12:.LANCHOR80
-	str	wzr, [x20, 12]
+	add	x21, x2, :lo12:.LANCHOR80
+	str	wzr, [x19, 12]
 	str	w3, [x2, #:lo12:.LANCHOR80]
-	mov	w2, 83
+	mov	w2, 86
 	movk	w2, 0x5000, lsl 16
-	strh	w1, [x19, 8]
+	strh	w1, [x21, 8]
 	adrp	x1, .LANCHOR45
-	str	w2, [x19, 4]
+	str	w2, [x21, 4]
 	adrp	x2, .LANCHOR91
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
-	strb	w1, [x19, 10]
+	strb	w1, [x21, 10]
 	add	x1, x2, :lo12:.LANCHOR91
 	ldrh	w2, [x2, #:lo12:.LANCHOR91]
-	strh	w2, [x19, 14]
+	strh	w2, [x21, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x19, 11]
+	strb	w1, [x21, 11]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x19, 16]
+	strh	w2, [x21, 16]
 	adrp	x2, .LANCHOR92
 	add	x1, x2, :lo12:.LANCHOR92
 	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	ldrb	w3, [x1, 6]
-	strh	w2, [x19, 18]
+	strh	w2, [x21, 18]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x19, 12]
+	strb	w1, [x21, 12]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x19, 20]
+	strh	w2, [x21, 20]
 	adrp	x2, .LANCHOR93
 	add	x1, x2, :lo12:.LANCHOR93
 	ldrh	w2, [x2, #:lo12:.LANCHOR93]
-	strh	w2, [x19, 22]
+	strh	w2, [x21, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x19, 13]
+	strb	w1, [x21, 13]
 	adrp	x1, .LANCHOR167
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x19, 24]
+	strh	w2, [x21, 24]
 	ldr	w1, [x1, #:lo12:.LANCHOR167]
-	str	w1, [x19, 32]
-	ldr	w1, [x22, #:lo12:.LANCHOR159]
-	str	w1, [x19, 40]
+	str	w1, [x21, 32]
+	ldr	w1, [x24, #:lo12:.LANCHOR159]
+	str	w1, [x21, 40]
 	adrp	x1, .LANCHOR160
+	ldrh	w2, [x26, #:lo12:.LANCHOR57]
 	ldr	w1, [x1, #:lo12:.LANCHOR160]
-	str	w1, [x19, 36]
+	str	w1, [x21, 36]
 	adrp	x1, .LANCHOR112
 	ldrh	w1, [x1, #:lo12:.LANCHOR112]
-	strh	w1, [x19, 44]
+	strh	w1, [x21, 44]
 	adrp	x1, .LANCHOR113
 	ldrh	w1, [x1, #:lo12:.LANCHOR113]
-	strh	w1, [x19, 46]
-	adrp	x1, .LANCHOR57
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	strh	w1, [x21, 46]
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x0, [x21, 8]
-	mov	x1, x19
+	ldr	x0, [x22, 8]
+	mov	x1, x21
 	mov	w2, 48
-	mov	x19, x28
+	adrp	x21, .LANCHOR40
 	bl	ftl_memcpy
 	adrp	x1, .LANCHOR83
-	ldrh	w2, [x27, #:lo12:.LANCHOR40]
-	ldr	x0, [x21, 8]
+	ldrh	w2, [x21, #:lo12:.LANCHOR40]
+	ldr	x0, [x22, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x27, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR0
-	ldr	x3, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	ldrh	w0, [x21, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR1
+	ldr	x3, [x22, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
 	add	x0, x0, 48
@@ -11901,11 +11993,12 @@ FtlVpcTblFlush:
 	add	x0, x3, x0
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR69
+	str	x26, [x29, 104]
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L1734
-	ldrh	w0, [x27, #:lo12:.LANCHOR40]
+	cbz	w0, .L1762
+	ldrh	w0, [x21, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR66
-	ldr	x3, [x21, 8]
+	ldr	x3, [x22, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
@@ -11916,61 +12009,73 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1734:
-	add	x28, x19, :lo12:.LANCHOR202
+.L1762:
 	mov	w0, 0
-	add	x24, x23, :lo12:.LANCHOR209
 	bl	FtlUpdateVaildLpn
-	adrp	x23, .LANCHOR53
+	adrp	x0, .LANCHOR2
+	add	x22, x20, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LANCHOR2
+	add	x28, x27, :lo12:.LANCHOR210
+	str	x0, [x29, 120]
+	adrp	x27, .LANCHOR53
 	mov	w21, 0
-	add	x23, x23, :lo12:.LANCHOR53
-	mov	w27, 65535
-	str	x23, [x29, 96]
-.L1735:
-	ldrh	w2, [x24, 2]
-	ldrh	w1, [x24]
-	ldr	x0, [x25, #:lo12:.LANCHOR183]
-	str	x0, [x28, 8]
-	ldr	x0, [x26, #:lo12:.LANCHOR188]
-	str	x0, [x28, 16]
+	add	x0, x27, :lo12:.LANCHOR53
+	mov	w26, 65535
+	str	x0, [x29, 96]
+.L1763:
+	ldrh	w2, [x28, 2]
+	ldrh	w1, [x28]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	str	x0, [x22, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR188]
+	str	x0, [x22, 16]
 	orr	w0, w2, w1, lsl 10
-	str	w0, [x28, 4]
-	ldrh	w0, [x23]
+	str	w0, [x22, 4]
+	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1736
-	ldrh	w27, [x24, 4]
-	strh	wzr, [x24, 2]
-	strh	w1, [x24, 4]
+	blt	.L1764
+	ldrh	w26, [x28, 4]
+	strh	wzr, [x28, 2]
+	strh	w1, [x28, 4]
 	bl	FtlFreeSysBlkQueueOut
-	ldr	w1, [x22, #:lo12:.LANCHOR159]
-	str	w1, [x24, 8]
+	ldr	w1, [x24, #:lo12:.LANCHOR159]
+	str	w1, [x28, 8]
 	add	w2, w1, 1
-	str	w2, [x22, #:lo12:.LANCHOR159]
+	str	w2, [x24, #:lo12:.LANCHOR159]
 	ubfiz	w2, w0, 10, 16
-	str	w2, [x28, 4]
-	strh	w0, [x24]
-	strh	w0, [x20, 2]
-	str	w1, [x20, 4]
-.L1736:
+	str	w2, [x22, 4]
+	strh	w0, [x28]
+	strh	w0, [x19, 2]
+	str	w1, [x19, 4]
+.L1764:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cbz	w0, .L1765
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR57]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	bl	js_hash
+	str	w0, [x19, 12]
+.L1765:
 	mov	w3, 1
-	mov	x0, x28
+	mov	x0, x22
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-	ldrh	w0, [x24, 2]
-	ldr	w1, [x28]
+	ldrh	w0, [x28, 2]
+	ldr	w1, [x22]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x24, 2]
+	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1737
+	bne	.L1766
 	cmp	w0, 1
-	bne	.L1738
-	mov	w2, 1217
-	adrp	x1, .LANCHOR210
+	bne	.L1767
+	mov	w2, 1219
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR210
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -11978,49 +12083,49 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1738:
-	ldrh	w0, [x24, 2]
+.L1767:
+	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1739
+	bne	.L1768
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
-	strh	w0, [x24, 2]
-.L1739:
+	strh	w0, [x28, 2]
+.L1768:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1735
-	add	x19, x19, :lo12:.LANCHOR202
+	bls	.L1763
+	add	x20, x20, :lo12:.LANCHOR203
 	mov	w2, w21
 	adrp	x0, .LC38
 	add	x0, x0, :lo12:.LC38
-	ldr	w1, [x19, 4]
+	ldr	w1, [x20, 4]
 	bl	printf
-	ldr	x1, [x29, 104]
+	ldr	x1, [x29, 112]
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
-.L1733:
+.L1761:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L1737:
+.L1766:
 	cmp	w0, 1
-	beq	.L1735
+	beq	.L1763
 	cmp	w1, 256
-	beq	.L1735
+	beq	.L1763
 	mov	w0, 65535
-	cmp	w27, w0
-	beq	.L1733
+	cmp	w26, w0
+	beq	.L1761
 	mov	w1, 1
-	mov	w0, w27
+	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1733
+	b	.L1761
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -12034,16 +12139,16 @@ FtlSuperblockPowerLostFix:
 	ldr	w23, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1752
+	cbnz	w23, .L1784
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1763
+	cbz	w1, .L1795
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1763
+	bne	.L1795
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1754:
+.L1786:
 	adrp	x1, .LANCHOR188
 	mov	x19, x0
 	mov	w0, -1
@@ -12067,13 +12172,13 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1755:
+.L1787:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1758
+	beq	.L1790
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1756
-.L1758:
+	cbnz	w0, .L1788
+.L1790:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
@@ -12087,21 +12192,21 @@ FtlSuperblockPowerLostFix:
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
-.L1752:
+.L1784:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1763:
+.L1795:
 	mov	w21, 12
-	b	.L1754
-.L1756:
+	b	.L1786
+.L1788:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1758
+	beq	.L1790
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -12115,7 +12220,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1755
+	b	.L1787
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -12124,8 +12229,8 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
 	adrp	x2, .LANCHOR183
-	adrp	x0, .LANCHOR202
-	add	x1, x0, :lo12:.LANCHOR202
+	adrp	x0, .LANCHOR203
+	add	x1, x0, :lo12:.LANCHOR203
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR183]
 	stp	x21, x22, [sp, 32]
@@ -12147,10 +12252,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1769:
+.L1801:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1774
+	bcc	.L1806
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12159,18 +12264,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1774:
+.L1806:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
-	add	x24, x22, :lo12:.LANCHOR202
+	add	x24, x22, :lo12:.LANCHOR203
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1770:
+.L1802:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1772
+	bgt	.L1804
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -12182,19 +12287,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1771
+	beq	.L1803
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1771
+	bne	.L1803
 	strh	w19, [x20]
-.L1772:
+.L1804:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1769
-.L1771:
+	b	.L1801
+.L1803:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1770
+	b	.L1802
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -12208,10 +12313,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1780
+	bne	.L1812
 	adrp	x1, .LANCHOR53
 	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-.L1781:
+.L1813:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -12225,24 +12330,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1782
+	bne	.L1814
 	mov	w22, 0
 	mov	w24, 2
-.L1783:
+.L1815:
 	cmp	w22, w19
-	ble	.L1786
-.L1782:
+	ble	.L1818
+.L1814:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1780:
+.L1812:
 	adrp	x1, .LANCHOR52
 	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-	b	.L1781
-.L1786:
+	b	.L1813
+.L1818:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -12254,20 +12359,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1784
+	bne	.L1816
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1784
+	bne	.L1816
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1784
+	beq	.L1816
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1783
-.L1784:
+	b	.L1815
+.L1816:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1783
+	b	.L1815
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12281,8 +12386,8 @@ FtlLoadBbt:
 	stp	x19, x20, [sp, 16]
 	adrp	x24, .LANCHOR51
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR202
-	add	x20, x22, :lo12:.LANCHOR202
+	adrp	x22, .LANCHOR203
+	add	x20, x22, :lo12:.LANCHOR203
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x25, [sp, 64]
 	mov	w25, 61649
@@ -12295,11 +12400,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1792:
+.L1824:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1795
+	bgt	.L1827
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12308,7 +12413,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1793
+	bne	.L1825
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12316,13 +12421,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1793:
+.L1825:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1794
+	beq	.L1826
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1794
+	bne	.L1826
 	adrp	x1, .LANCHOR74
 	add	x0, x1, :lo12:.LANCHOR74
 	strh	w19, [x1, #:lo12:.LANCHOR74]
@@ -12330,39 +12435,39 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1795:
+.L1827:
 	adrp	x19, .LANCHOR74
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x19, #:lo12:.LANCHOR74]
 	cmp	w1, w0
-	beq	.L1809
+	beq	.L1841
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1799
-	add	x0, x22, :lo12:.LANCHOR202
+	beq	.L1831
+	add	x0, x22, :lo12:.LANCHOR203
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR202]
+	ldr	w0, [x22, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L1799
+	beq	.L1831
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1799
+	bne	.L1831
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1799
+	bls	.L1831
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR74]
 	strh	w0, [x20, 4]
-.L1799:
+.L1831:
 	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	add	x24, x19, :lo12:.LANCHOR74
 	mov	w1, 1
@@ -12371,13 +12476,13 @@ FtlLoadBbt:
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR202
-.L1801:
-	tbz	w20, #31, .L1804
-	mov	w2, 335
-	adrp	x1, .LANCHOR211
+	add	x24, x22, :lo12:.LANCHOR203
+.L1833:
+	tbz	w20, #31, .L1836
+	mov	w2, 334
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12385,52 +12490,52 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1803:
+.L1835:
 	add	x0, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1806
+	beq	.L1838
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1806
+	beq	.L1838
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1806
+	bcs	.L1838
 	cmp	w0, w1
-	bcs	.L1806
+	bcs	.L1838
 	bl	FtlSysBlkNumInit
-.L1806:
+.L1838:
 	add	x19, x19, :lo12:.LANCHOR74
 	adrp	x21, .LANCHOR45
 	adrp	x23, .LANCHOR123
 	add	x19, x19, 32
 	add	x21, x21, :lo12:.LANCHOR45
 	add	x23, x23, :lo12:.LANCHOR123
-	add	x22, x22, :lo12:.LANCHOR202
+	add	x22, x22, :lo12:.LANCHOR203
 	mov	w20, 0
-.L1807:
+.L1839:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1808
+	bcc	.L1840
 	mov	w0, 0
-.L1791:
+.L1823:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1794:
+.L1826:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1792
-.L1804:
+	b	.L1824
+.L1836:
 	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, w2
@@ -12442,15 +12547,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1802
+	beq	.L1834
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1803
-.L1802:
+	beq	.L1835
+.L1834:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1801
-.L1808:
+	b	.L1833
+.L1840:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12459,10 +12564,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1807
-.L1809:
+	b	.L1839
+.L1841:
 	mov	w0, -1
-	b	.L1791
+	b	.L1823
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12485,12 +12590,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L1822
+	blt	.L1854
 	ubfiz	x0, x0, 1, 16
 	ldrh	w21, [x20, x0]
-	cbz	w21, .L1822
+	cbz	w21, .L1854
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1822
+	cbnz	w1, .L1854
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12500,41 +12605,41 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1823
+	bcc	.L1855
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1823:
-	adrp	x22, .LANCHOR202
-	adrp	x24, .LANCHOR212
+.L1855:
+	adrp	x22, .LANCHOR203
+	adrp	x24, .LANCHOR213
 	mov	x23, x22
-	add	x27, x22, :lo12:.LANCHOR202
-	add	x24, x24, :lo12:.LANCHOR212
+	add	x27, x22, :lo12:.LANCHOR203
+	add	x24, x24, :lo12:.LANCHOR213
 	mov	w20, 0
-.L1824:
+.L1856:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1830
+	bhi	.L1862
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1822:
+.L1854:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1828
+	bcc	.L1860
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1828
-.L1830:
+	b	.L1860
+.L1862:
 	ubfiz	x0, x20, 2, 16
 	add	x1, x26, x0
 	str	x1, [x29, 104]
 	ldr	w1, [x26, x0]
 	cmp	w21, w1, lsr 10
-	bne	.L1825
+	bne	.L1857
 	adrp	x2, .LANCHOR184
-	add	x0, x22, :lo12:.LANCHOR202
+	add	x0, x22, :lo12:.LANCHOR203
 	ldr	x2, [x2, #:lo12:.LANCHOR184]
 	str	x2, [x0, 8]
 	adrp	x2, .LANCHOR188
@@ -12546,7 +12651,7 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1826
+	beq	.L1858
 	mov	w2, 661
 	mov	x1, x24
 	adrp	x0, .LC5
@@ -12557,14 +12662,14 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1826:
+.L1858:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1827
-.L1829:
+	bne	.L1859
+.L1861:
 	ldr	x0, [x29, 104]
-	add	x23, x23, :lo12:.LANCHOR202
+	add	x23, x23, :lo12:.LANCHOR203
 	str	wzr, [x0]
 	adrp	x0, .LC39
 	add	x0, x0, :lo12:.LC39
@@ -12573,7 +12678,7 @@ ftl_map_blk_gc:
 	adrp	x0, .LANCHOR76
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1828:
+.L1860:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12582,21 +12687,21 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1827:
+.L1859:
 	cmp	w2, w20
-	bne	.L1829
+	bne	.L1861
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1829
+	bne	.L1861
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1825:
+.L1857:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1824
+	b	.L1856
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -12605,7 +12710,7 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1850
+	cbnz	w1, .L1882
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12616,13 +12721,13 @@ Ftl_write_map_blk_to_last_page:
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
 	ldr	x20, [x19, 16]
-	bne	.L1837
+	bne	.L1869
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1838
+	cbz	w0, .L1870
 	mov	w2, 697
-	adrp	x1, .LANCHOR213
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR213
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12630,7 +12735,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1838:
+.L1870:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12641,18 +12746,18 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1836:
+.L1868:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1837:
+.L1869:
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR188
-	adrp	x21, .LANCHOR202
-	add	x1, x21, :lo12:.LANCHOR202
+	adrp	x21, .LANCHOR203
+	add	x1, x21, :lo12:.LANCHOR203
 	adrp	x24, .LANCHOR183
 	ldr	x23, [x19, 40]
 	ldrh	w22, [x20, x0]
@@ -12679,34 +12784,34 @@ Ftl_write_map_blk_to_last_page:
 	mov	x1, 0
 	ldr	x3, [x24, #:lo12:.LANCHOR183]
 	mov	w0, 0
-.L1839:
+.L1871:
 	cmp	w4, w1, uxth
-	bhi	.L1841
-	adrp	x0, .LANCHOR1
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L1842
-	add	x0, x21, :lo12:.LANCHOR202
+	bhi	.L1873
+	adrp	x0, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbz	w0, .L1874
+	add	x0, x21, :lo12:.LANCHOR203
 	adrp	x1, .LANCHOR57
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	ldr	x0, [x0, 8]
 	bl	js_hash
 	str	w0, [x20, 12]
-.L1842:
+.L1874:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x21, :lo12:.LANCHOR202
+	add	x0, x21, :lo12:.LANCHOR203
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1836
-.L1841:
+	b	.L1868
+.L1873:
 	ldr	w2, [x23, x1, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L1840
+	bne	.L1872
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	ubfiz	x2, x0, 1, 16
@@ -12714,10 +12819,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x1, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L1840:
+.L1872:
 	add	x1, x1, 1
-	b	.L1839
-.L1850:
+	b	.L1871
+.L1882:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12736,13 +12841,13 @@ FtlMapWritePage:
 	mov	w25, w1
 	stp	x21, x22, [sp, 32]
 	mov	x27, x0
-	adrp	x22, .LANCHOR202
+	adrp	x22, .LANCHOR203
 	stp	x23, x24, [sp, 48]
 	mov	x20, x22
-	add	x23, x22, :lo12:.LANCHOR202
+	add	x23, x22, :lo12:.LANCHOR203
 	add	x28, x26, :lo12:.LANCHOR53
 	str	x2, [x29, 104]
-.L1854:
+.L1886:
 	adrp	x1, .LANCHOR165
 	ldr	w0, [x1, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
@@ -12751,26 +12856,26 @@ FtlMapWritePage:
 	ldrh	w1, [x27, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1855
+	bge	.L1887
 	ldrh	w1, [x27]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1856
-.L1855:
+	bne	.L1888
+.L1887:
 	mov	x0, x27
 	bl	Ftl_write_map_blk_to_last_page
-.L1856:
+.L1888:
 	adrp	x21, .LANCHOR76
 	ldr	w0, [x21, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1871
+	cbnz	w0, .L1903
 	ldrh	w1, [x27]
 	ldr	x0, [x27, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1858
+	cbnz	w0, .L1890
 	mov	w2, 759
-	adrp	x1, .LANCHOR214
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR214
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12778,15 +12883,15 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1858:
+.L1890:
 	ldrh	w1, [x27]
 	ldrh	w0, [x27, 10]
 	cmp	w1, w0
-	bcc	.L1859
+	bcc	.L1891
 	mov	w2, 760
-	adrp	x1, .LANCHOR214
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR214
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -12794,9 +12899,9 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1859:
+.L1891:
 	ldrh	w1, [x27]
-	add	x3, x22, :lo12:.LANCHOR202
+	add	x3, x22, :lo12:.LANCHOR203
 	ldr	x0, [x27, 16]
 	mov	w2, 16
 	str	x3, [x29, 96]
@@ -12817,17 +12922,17 @@ FtlMapWritePage:
 	str	w0, [x6, 4]
 	ldrh	w0, [x27, 4]
 	strh	w0, [x6]
-	adrp	x0, .LANCHOR1
+	adrp	x0, .LANCHOR2
 	strh	w25, [x6, 8]
 	strh	w24, [x6, 2]
-	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L1860
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cbz	w0, .L1892
 	adrp	x0, .LANCHOR57
 	ldrh	w1, [x0, #:lo12:.LANCHOR57]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L1860:
+.L1892:
 	mov	w3, 1
 	mov	x0, x23
 	mov	w1, w3
@@ -12839,7 +12944,7 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x27, 2]
 	cmn	w1, #1
-	bne	.L1861
+	bne	.L1893
 	ldr	w1, [x23, 4]
 	adrp	x0, .LC40
 	add	x0, x0, :lo12:.LC40
@@ -12848,14 +12953,14 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x27, 2]
 	cmp	w0, 2
-	bhi	.L1862
+	bhi	.L1894
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x27, 2]
-.L1862:
+.L1894:
 	cmp	w19, 3
-	bls	.L1854
-	add	x20, x20, :lo12:.LANCHOR202
+	bls	.L1886
+	add	x20, x20, :lo12:.LANCHOR203
 	mov	w2, w19
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
@@ -12863,7 +12968,7 @@ FtlMapWritePage:
 	bl	printf
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR76]
-.L1871:
+.L1903:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12872,28 +12977,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1861:
-	cbz	w1, .L1864
+.L1893:
+	cbz	w1, .L1896
 	strh	w24, [x27, 60]
 	cmp	w0, 1
-	bne	.L1865
-.L1866:
+	bne	.L1897
+.L1898:
 	str	wzr, [x27, 56]
-	b	.L1854
-.L1865:
+	b	.L1886
+.L1897:
 	cmp	w1, 256
-.L1879:
-	beq	.L1866
+.L1911:
+	beq	.L1898
 	ldr	w0, [x27, 56]
-	cbnz	w0, .L1866
-	add	x20, x20, :lo12:.LANCHOR202
+	cbnz	w0, .L1898
+	add	x20, x20, :lo12:.LANCHOR203
 	ldr	x0, [x27, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w25, uxtw 2]
-	b	.L1871
-.L1864:
+	b	.L1903
+.L1896:
 	cmp	w0, 1
-	b	.L1879
+	b	.L1911
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12935,27 +13040,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR96
-.L1883:
+.L1915:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1885
+	bhi	.L1917
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1885:
+.L1917:
 	ldr	x1, [x21, #:lo12:.LANCHOR96]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1884
+	tbz	w0, #31, .L1916
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1884:
+.L1916:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1883
+	b	.L1915
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12975,7 +13080,7 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1895
+	bhi	.L1927
 	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR55
 	adrp	x27, .LANCHOR57
@@ -12985,9 +13090,9 @@ FtlVendorPartWrite:
 	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1889:
-	cbnz	w20, .L1894
-.L1887:
+.L1921:
+	cbnz	w20, .L1926
+.L1919:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12996,7 +13101,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1894:
+.L1926:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR194
 	adrp	x28, .LANCHOR185
@@ -13009,9 +13114,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1891
+	cbz	w2, .L1923
 	cmp	w19, w1
-	beq	.L1891
+	beq	.L1923
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -13019,7 +13124,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1892:
+.L1924:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
@@ -13030,8 +13135,8 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	x2, [x28, #:lo12:.LANCHOR185]
 	mov	w1, w21
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
+	adrp	x0, .LANCHOR216
+	add	x0, x0, :lo12:.LANCHOR216
 	sub	w20, w20, w19
 	add	w22, w22, w19
 	add	w21, w21, 1
@@ -13040,16 +13145,16 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1889
-.L1891:
+	b	.L1921
+.L1923:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1892
-.L1895:
+	b	.L1924
+.L1927:
 	mov	w24, -1
-	b	.L1887
+	b	.L1919
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -13062,16 +13167,16 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1900
-	mov	w0, 83
+	bne	.L1932
+	mov	w0, 86
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	adrp	x0, .LANCHOR216
-	ldr	w0, [x0, #:lo12:.LANCHOR216]
-	str	w0, [x2, 88]
 	adrp	x0, .LANCHOR217
 	ldr	w0, [x0, #:lo12:.LANCHOR217]
+	str	w0, [x2, 88]
+	adrp	x0, .LANCHOR218
+	ldr	w0, [x0, #:lo12:.LANCHOR218]
 	str	w0, [x2, 92]
 	adrp	x0, .LANCHOR161
 	ldr	w0, [x0, #:lo12:.LANCHOR161]
@@ -13111,7 +13216,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1900:
+.L1932:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -13121,31 +13226,31 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1907
+	cbz	w1, .L1939
 	adrp	x1, .LANCHOR170
 	mov	w2, 4
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1903:
-	adrp	x3, .LANCHOR218
-	ldrh	w2, [x3, #:lo12:.LANCHOR218]
+.L1935:
+	adrp	x3, .LANCHOR219
+	ldrh	w2, [x3, #:lo12:.LANCHOR219]
 	cmp	w2, 31
-	bhi	.L1904
+	bhi	.L1936
 	add	w2, w2, 1
 	mov	w1, 1
-	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1904:
+	strh	w2, [x3, #:lo12:.LANCHOR219]
+.L1936:
 	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1905
+	cbnz	w0, .L1937
 	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1910
-.L1905:
+	bcc	.L1942
+.L1937:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR191]
@@ -13168,10 +13273,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1907:
+.L1939:
 	mov	w1, 32
-	b	.L1903
-.L1910:
+	b	.L1935
+.L1942:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -13189,11 +13294,11 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1913
-	mov	w2, 3264
-	adrp	x1, .LANCHOR219
+	bcs	.L1945
+	mov	w2, 3290
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR219
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -13201,99 +13306,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1913:
+.L1945:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1914
+	cbnz	w0, .L1946
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1915
+	beq	.L1947
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x20, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1916
+	cbz	w0, .L1948
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1915:
+.L1947:
 	strb	wzr, [x19, 8]
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	beq	.L1917
+	beq	.L1949
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1917
+	beq	.L1949
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L1918
-.L1917:
+	cbz	w0, .L1950
+.L1949:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1919:
+.L1951:
 	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1924
+	beq	.L1956
 	cmp	w20, w0
-	bne	.L1925
+	bne	.L1957
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1926
-.L1925:
+	cbz	w1, .L1958
+.L1957:
 	bl	update_vpc_list
-.L1926:
+.L1958:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1924:
+.L1956:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1914:
+.L1946:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1916:
+.L1948:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1915
-.L1918:
+	b	.L1947
+.L1950:
 	adrp	x0, .LANCHOR91
 	add	x2, x0, :lo12:.LANCHOR91
 	cmp	x19, x2
-	bne	.L1919
+	bne	.L1951
 	cmp	w1, 3
-	beq	.L1921
+	beq	.L1953
 	adrp	x1, .LANCHOR158
 	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1922
-.L1921:
+	bne	.L1954
+.L1953:
 	add	x1, x0, :lo12:.LANCHOR91
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1922:
+.L1954:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1919
+	cbz	w1, .L1951
 	adrp	x1, .LANCHOR170
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
-	bhi	.L1919
+	bhi	.L1951
 	add	x0, x0, :lo12:.LANCHOR91
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1919
+	b	.L1951
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13313,7 +13418,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1949
+	bhi	.L1981
 	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR185
 	mov	x25, x2
@@ -13324,9 +13429,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1942:
-	cbnz	w21, .L1948
-.L1940:
+.L1974:
+	cbnz	w21, .L1980
+.L1972:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13335,7 +13440,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1948:
+.L1980:
 	adrp	x0, .LANCHOR194
 	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13349,7 +13454,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1944
+	cbz	w3, .L1976
 	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13361,43 +13466,43 @@ FtlVendorPartRead:
 	ldr	w0, [x29, 120]
 	ldr	w3, [x29, 100]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR202
+	adrp	x0, .LANCHOR203
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR202]
+	ldr	w0, [x0, #:lo12:.LANCHOR203]
 	cmp	w0, 256
-	bne	.L1946
+	bne	.L1978
 	mov	w2, w3
 	mov	w1, w20
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
 	ldr	x2, [x26, #:lo12:.LANCHOR185]
-	adrp	x0, .LANCHOR215
+	adrp	x0, .LANCHOR216
 	mov	w1, w20
-	add	x0, x0, :lo12:.LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR216
 	bl	FtlMapWritePage
-.L1946:
+.L1978:
 	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1947:
+.L1979:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1942
-.L1944:
+	b	.L1974
+.L1976:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1947
-.L1949:
+	b	.L1979
+.L1981:
 	mov	w24, -1
-	b	.L1940
+	b	.L1972
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13418,7 +13523,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1952
+	beq	.L1984
 	adrp	x1, .LC43
 	adrp	x0, .LC7
 	add	x1, x1, :lo12:.LC43
@@ -13429,7 +13534,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1952:
+.L1984:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13454,24 +13559,24 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1955
+	beq	.L1987
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1955:
+.L1987:
 	ldr	w1, [x19, #:lo12:.LANCHOR138]
 	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
 	adrp	x20, .LANCHOR168
-	bne	.L1956
-	adrp	x1, .LANCHOR216
-	ldr	w2, [x0, 88]
-	str	w2, [x1, #:lo12:.LANCHOR216]
+	bne	.L1988
 	adrp	x1, .LANCHOR217
-	ldr	w2, [x0, 92]
+	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR217]
+	adrp	x1, .LANCHOR218
+	ldr	w2, [x0, 92]
+	str	w2, [x1, #:lo12:.LANCHOR218]
 	adrp	x1, .LANCHOR161
 	ldr	w2, [x0, 8]
 	str	w2, [x1, #:lo12:.LANCHOR161]
@@ -13503,7 +13608,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x0, 60]
 	adrp	x0, .LANCHOR158
 	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1956:
+.L1988:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR157
 	str	wzr, [x0, #:lo12:.LANCHOR157]
@@ -13511,7 +13616,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1957
+	bne	.L1989
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
@@ -13520,7 +13625,7 @@ Ftl_load_ext_data:
 	add	x1, x1, :lo12:.LC44
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1957:
+.L1989:
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
@@ -13533,8 +13638,8 @@ Ftl_load_ext_data:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR205
-	str	w0, [x1, #:lo12:.LANCHOR205]
+	adrp	x1, .LANCHOR206
+	str	w0, [x1, #:lo12:.LANCHOR206]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.ftl_vendor_read,"ax",@progbits
@@ -13559,7 +13664,7 @@ ftl_sys_read:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1975
+	cbz	w1, .L2007
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
@@ -13571,11 +13676,11 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1961
+	cbnz	w1, .L1993
 	mov	x19, x0
 	adrp	x0, .LANCHOR184
-	adrp	x23, .LANCHOR202
-	add	x21, x23, :lo12:.LANCHOR202
+	adrp	x23, .LANCHOR203
+	add	x21, x23, :lo12:.LANCHOR203
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	mov	x22, x23
 	str	x0, [x21, 8]
@@ -13583,16 +13688,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1965
+	cbz	w0, .L1997
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1965
+	bge	.L1997
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1965
+	beq	.L1997
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13603,18 +13708,18 @@ FtlMapBlkWriteDumpData:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-	ldr	w0, [x23, #:lo12:.LANCHOR202]
+	ldr	w0, [x23, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L1965
+	beq	.L1997
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1965
+	bne	.L1997
 	ldr	x2, [x21, 8]
-.L1978:
+.L2010:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13622,37 +13727,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1965:
+.L1997:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
-	add	x0, x22, :lo12:.LANCHOR202
+	add	x0, x22, :lo12:.LANCHOR203
 	str	w1, [x0, 4]
-	cbz	w1, .L1966
+	cbz	w1, .L1998
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1967:
-	add	x22, x22, :lo12:.LANCHOR202
+.L1999:
+	add	x22, x22, :lo12:.LANCHOR203
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1978
-.L1966:
+	b	.L2010
+.L1998:
 	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1967
-.L1961:
+	b	.L1999
+.L1993:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1975:
+.L2007:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13685,7 +13790,7 @@ FtlScanSysBlk:
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	adrp	x19, .LANCHOR61
 	adrp	x28, .LANCHOR71
-	adrp	x24, .LANCHOR209
+	adrp	x24, .LANCHOR210
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR193]
@@ -13700,7 +13805,7 @@ FtlScanSysBlk:
 	bl	ftl_memset
 	mov	w2, 16
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR209
+	add	x0, x24, :lo12:.LANCHOR210
 	bl	ftl_memset
 	adrp	x0, .LANCHOR40
 	stp	x22, x25, [x29, 144]
@@ -13713,12 +13818,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR159
 	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1980:
+.L2012:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L2021
+	bls	.L2053
 	adrp	x0, .LANCHOR38
 	adrp	x25, .LANCHOR180
 	adrp	x6, .LANCHOR47
@@ -13734,14 +13839,14 @@ FtlScanSysBlk:
 	ldr	x11, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR58
 	ldrh	w10, [x0, #:lo12:.LANCHOR58]
-	b	.L2022
-.L1982:
+	b	.L2054
+.L2014:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1981
+	cbnz	w0, .L2013
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13751,19 +13856,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1981:
+.L2013:
 	add	x5, x5, 1
-.L2022:
+.L2054:
 	cmp	w13, w5, uxth
-	bhi	.L1982
-	cbnz	w22, .L1983
-.L2020:
+	bhi	.L2014
+	cbnz	w22, .L2015
+.L2052:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1980
-.L1983:
+	b	.L2012
+.L2015:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13772,10 +13877,10 @@ FtlScanSysBlk:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR220
-	add	x0, x0, :lo12:.LANCHOR220
+	adrp	x0, .LANCHOR221
+	add	x0, x0, :lo12:.LANCHOR221
 	str	x0, [x29, 136]
-.L2019:
+.L2051:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -13783,10 +13888,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1986
+	bne	.L2018
 	mov	w5, 16
 	mov	w7, 65535
-.L1988:
+.L2020:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
@@ -13804,71 +13909,71 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1985
+	bne	.L2017
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2058
-.L1986:
+	beq	.L2090
+.L2018:
 	adrp	x0, .LANCHOR159
 	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1989
+	beq	.L2021
 	cmp	w1, w0
-	bhi	.L1990
-.L1989:
+	bhi	.L2022
+.L2021:
 	cmn	w0, #1
-	beq	.L1990
+	beq	.L2022
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1990:
+.L2022:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1992
-	bhi	.L1993
+	beq	.L2024
+	bhi	.L2025
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1994
-.L1991:
+	beq	.L2026
+.L2023:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L2019
-	b	.L2020
-.L1985:
+	bne	.L2051
+	b	.L2052
+.L2017:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1986
+	bne	.L2018
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1988
-.L2058:
+	bne	.L2020
+.L2090:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1991
-.L1993:
+	b	.L2023
+.L2025:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1995
+	beq	.L2027
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2058
-	b	.L1991
-.L1995:
+	beq	.L2090
+	b	.L2023
+.L2027:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L1997
+	bls	.L2029
 	ldr	x1, [x29, 136]
-	mov	w2, 1305
+	mov	w2, 1307
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13877,7 +13982,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1997:
+.L2029:
 	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
@@ -13888,53 +13993,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1998:
+.L2030:
 	cmp	w0, w2
-	bgt	.L2004
-	tbz	w0, #31, .L2039
-	b	.L1991
-.L2004:
+	bgt	.L2036
+	tbz	w0, #31, .L2071
+	b	.L2023
+.L2036:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1999
+	bls	.L2031
 	ldr	w2, [x5]
-	cbnz	w2, .L2000
+	cbnz	w2, .L2032
 	cmp	w6, w1
-	beq	.L2000
+	beq	.L2032
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L2000:
+.L2032:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L2001:
+.L2033:
 	cmp	w1, w0
-	bne	.L2002
+	bne	.L2034
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1991
+	tbnz	w0, #31, .L2023
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1991
-.L2039:
+	bgt	.L2023
+.L2071:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2057:
+.L2089:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1991
-.L2002:
+	b	.L2023
+.L2034:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13946,18 +14051,18 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L2001
-.L1999:
+	b	.L2033
+.L2031:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1998
-.L1994:
+	b	.L2030
+.L2026:
 	ldrh	w1, [x23, #:lo12:.LANCHOR70]
 	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L2007
+	bls	.L2039
 	ldr	x1, [x29, 136]
-	mov	w2, 1352
+	mov	w2, 1354
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13966,7 +14071,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2007:
+.L2039:
 	ldrh	w6, [x19, #:lo12:.LANCHOR61]
 	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
@@ -13974,46 +14079,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L2008:
+.L2040:
 	cmp	w0, w5
-	ble	.L2013
+	ble	.L2045
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L2009
+	bls	.L2041
 	ldr	w5, [x1]
-	cbnz	w5, .L2010
+	cbnz	w5, .L2042
 	cmp	w6, w2
-	beq	.L2010
+	beq	.L2042
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR70]
-.L2010:
+.L2042:
 	ldr	x6, [x28, #:lo12:.LANCHOR71]
 	mov	w2, 0
-.L2011:
+.L2043:
 	cmp	w2, w0
-	bne	.L2012
+	bne	.L2044
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L2013:
-	tbnz	w0, #31, .L1991
+.L2045:
+	tbnz	w0, #31, .L2023
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1991
+	bgt	.L2023
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
-	b	.L2057
-.L2012:
+	b	.L2089
+.L2044:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -14025,58 +14130,58 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L2011
-.L2009:
+	b	.L2043
+.L2041:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L2008
-.L1992:
-	ldrh	w5, [x24, #:lo12:.LANCHOR209]
+	b	.L2040
+.L2024:
+	ldrh	w5, [x24, #:lo12:.LANCHOR210]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR209
+	add	x2, x24, :lo12:.LANCHOR210
 	cmp	w5, w1
-	bne	.L2015
-	strh	w26, [x24, #:lo12:.LANCHOR209]
+	bne	.L2047
+	strh	w26, [x24, #:lo12:.LANCHOR210]
 	str	w0, [x2, 8]
-	b	.L1991
-.L2015:
+	b	.L2023
+.L2047:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L2016
+	beq	.L2048
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L2016:
-	add	x0, x24, :lo12:.LANCHOR209
+.L2048:
+	add	x0, x24, :lo12:.LANCHOR210
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L2017
-	ldrh	w2, [x24, #:lo12:.LANCHOR209]
+	bcs	.L2049
+	ldrh	w2, [x24, #:lo12:.LANCHOR210]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR209]
+	strh	w26, [x24, #:lo12:.LANCHOR210]
 	str	w1, [x0, 8]
-	b	.L1991
-.L2017:
+	b	.L2023
+.L2049:
 	strh	w26, [x0, 4]
-	b	.L1991
-.L2021:
+	b	.L2023
+.L2053:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L2023
-.L2026:
+	cbz	w0, .L2055
+.L2058:
 	ldr	x1, [x28, #:lo12:.LANCHOR71]
 	ldrh	w0, [x1]
-	cbz	w0, .L2024
-.L2025:
+	cbz	w0, .L2056
+.L2057:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2055
-	mov	w2, 1486
-	adrp	x1, .LANCHOR220
+	bls	.L2087
+	mov	w2, 1488
+	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR220
+	add	x1, x1, :lo12:.LANCHOR221
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14084,7 +14189,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2055:
+.L2087:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14093,24 +14198,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2023:
+.L2055:
 	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L2026
+	cbz	w0, .L2058
 	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L2027:
+.L2059:
 	cmp	w0, w1
-	bcs	.L2026
+	bcs	.L2058
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L2028
+	cbz	w3, .L2060
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR64
 	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L2029:
+.L2061:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L2026
+	bcs	.L2058
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -14122,29 +14227,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L2029
-.L2028:
+	b	.L2061
+.L2060:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2027
-.L2024:
+	b	.L2059
+.L2056:
 	ldrh	w0, [x23, #:lo12:.LANCHOR70]
-	cbz	w0, .L2025
+	cbz	w0, .L2057
 	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L2034:
+.L2066:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L2025
+	bge	.L2057
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L2035
+	cbz	w3, .L2067
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR61
 	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L2036:
+.L2068:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L2025
+	bge	.L2057
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -14156,11 +14261,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L2036
-.L2035:
+	b	.L2068
+.L2067:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2034
+	b	.L2066
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -14172,8 +14277,8 @@ FtlLoadSysInfo:
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR183
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR202
-	add	x0, x19, :lo12:.LANCHOR202
+	adrp	x19, .LANCHOR203
+	add	x0, x19, :lo12:.LANCHOR203
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR188
 	stp	x21, x22, [sp, 32]
@@ -14182,7 +14287,7 @@ FtlLoadSysInfo:
 	ldr	x1, [x23, #:lo12:.LANCHOR183]
 	adrp	x22, .LANCHOR40
 	str	x1, [x0, 8]
-	adrp	x21, .LANCHOR209
+	adrp	x21, .LANCHOR210
 	ldr	x1, [x25, #:lo12:.LANCHOR188]
 	str	x1, [x0, 16]
 	ldr	x0, [x24, #:lo12:.LANCHOR83]
@@ -14190,13 +14295,13 @@ FtlLoadSysInfo:
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR209]
+	ldrh	w0, [x21, #:lo12:.LANCHOR210]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2060
-.L2072:
+	bne	.L2092
+.L2104:
 	mov	w0, -1
-.L2059:
+.L2091:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14204,24 +14309,24 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2060:
-	add	x26, x21, :lo12:.LANCHOR209
+.L2092:
+	add	x26, x21, :lo12:.LANCHOR210
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-	ldrsh	w28, [x21, #:lo12:.LANCHOR209]
+	ldrsh	w28, [x21, #:lo12:.LANCHOR210]
 	sxth	w20, w0
 	adrp	x27, .LANCHOR57
 	add	w0, w0, 1
 	add	x27, x27, :lo12:.LANCHOR57
 	strh	w0, [x26, 2]
-	adrp	x26, .LANCHOR1
-	add	x26, x26, :lo12:.LANCHOR1
-.L2062:
-	tbz	w20, #31, .L2068
-	mov	w2, 1555
-	adrp	x1, .LANCHOR221
+	adrp	x26, .LANCHOR2
+	add	x26, x26, :lo12:.LANCHOR2
+.L2094:
+	tbz	w20, #31, .L2100
+	mov	w2, 1557
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14229,9 +14334,9 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2067
-.L2068:
-	add	x3, x19, :lo12:.LANCHOR202
+	b	.L2099
+.L2100:
+	add	x3, x19, :lo12:.LANCHOR203
 	orr	w0, w20, w28, lsl 10
 	mov	w2, 1
 	str	x3, [x29, 104]
@@ -14242,57 +14347,57 @@ FtlLoadSysInfo:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldrb	w0, [x26]
-	cbz	w0, .L2063
+	cbz	w0, .L2095
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w6, [x0, 12]
-	cbz	w6, .L2063
+	cbz	w6, .L2095
 	ldrh	w1, [x27]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w6, w0
-	beq	.L2063
-	cbnz	w20, .L2064
-	add	x0, x21, :lo12:.LANCHOR209
+	beq	.L2095
+	cbnz	w20, .L2096
+	add	x0, x21, :lo12:.LANCHOR210
 	ldrh	w0, [x0, 4]
 	cmp	w28, w0
-	beq	.L2064
+	beq	.L2096
 	sxth	w28, w0
 	adrp	x0, .LANCHOR53
 	ldrh	w20, [x0, #:lo12:.LANCHOR53]
-.L2066:
+.L2098:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L2062
-.L2064:
+	b	.L2094
+.L2096:
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR202]
-.L2063:
-	ldr	w0, [x19, #:lo12:.LANCHOR202]
+	str	w0, [x19, #:lo12:.LANCHOR203]
+.L2095:
+	ldr	w0, [x19, #:lo12:.LANCHOR203]
 	cmn	w0, #1
-	beq	.L2066
+	beq	.L2098
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L2066
+	bne	.L2098
 	ldr	x0, [x25, #:lo12:.LANCHOR188]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	bne	.L2066
-.L2067:
+	bne	.L2098
+.L2099:
 	adrp	x1, .LANCHOR57
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
 	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2070
-	mov	w2, 1557
-	adrp	x1, .LANCHOR221
+	bcs	.L2102
+	mov	w2, 1559
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14300,8 +14405,8 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2070:
-	add	x19, x19, :lo12:.LANCHOR202
+.L2102:
+	add	x19, x19, :lo12:.LANCHOR203
 	mov	w2, 48
 	adrp	x20, .LANCHOR80
 	add	x0, x20, :lo12:.LANCHOR80
@@ -14321,12 +14426,12 @@ FtlLoadSysInfo:
 	add	w2, w2, 4
 	and	x1, x1, -4
 	add	x1, x0, x1
-	adrp	x0, .LANCHOR0
-	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR69
 	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2071
+	cbz	w0, .L2103
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR66
 	ldrh	w2, [x0, #:lo12:.LANCHOR66]
@@ -14340,25 +14445,25 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR195
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2071:
+.L2103:
 	ldr	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	bne	.L2072
-	add	x21, x21, :lo12:.LANCHOR209
+	bne	.L2104
+	add	x21, x21, :lo12:.LANCHOR210
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
 	adrp	x0, .LANCHOR45
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2072
-	adrp	x0, .LANCHOR222
+	bne	.L2104
+	adrp	x0, .LANCHOR223
 	adrp	x2, .LANCHOR72
 	adrp	x3, .LANCHOR38
-	str	w1, [x0, #:lo12:.LANCHOR222]
+	str	w1, [x0, #:lo12:.LANCHOR223]
 	adrp	x0, .LANCHOR52
 	ldrh	w3, [x3, #:lo12:.LANCHOR38]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
@@ -14377,13 +14482,13 @@ FtlLoadSysInfo:
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR223
-	strh	w0, [x3, #:lo12:.LANCHOR223]
-	bls	.L2073
-	mov	w2, 1584
-	adrp	x1, .LANCHOR221
+	adrp	x3, .LANCHOR224
+	strh	w0, [x3, #:lo12:.LANCHOR224]
+	bls	.L2105
+	mov	w2, 1586
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR221
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -14391,11 +14496,11 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2073:
+.L2105:
 	add	x4, x20, :lo12:.LANCHOR80
 	adrp	x0, .LANCHOR91
 	add	x2, x0, :lo12:.LANCHOR91
-	adrp	x5, .LANCHOR204
+	adrp	x5, .LANCHOR205
 	adrp	x19, .LANCHOR92
 	mov	x22, x5
 	ldrh	w1, [x4, 16]
@@ -14406,10 +14511,10 @@ FtlLoadSysInfo:
 	strb	w1, [x2, 6]
 	ldrb	w1, [x4, 11]
 	strb	w1, [x2, 8]
-	add	x1, x5, :lo12:.LANCHOR204
+	add	x1, x5, :lo12:.LANCHOR205
 	strh	w3, [x2, 2]
 	mov	w2, -1
-	strh	w2, [x5, #:lo12:.LANCHOR204]
+	strh	w2, [x5, #:lo12:.LANCHOR205]
 	add	x2, x19, :lo12:.LANCHOR92
 	strh	wzr, [x1, 2]
 	strb	wzr, [x1, 6]
@@ -14456,46 +14561,46 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR159
 	ldr	w4, [x1, #:lo12:.LANCHOR159]
 	cmp	w3, w4
-	bls	.L2074
+	bls	.L2106
 	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2074:
+.L2106:
 	add	x20, x20, :lo12:.LANCHOR80
 	adrp	x1, .LANCHOR160
 	ldr	w3, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2075
+	bls	.L2107
 	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2075:
+.L2107:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2076
+	beq	.L2108
 	add	x0, x0, :lo12:.LANCHOR91
 	bl	make_superblock
-.L2076:
+.L2108:
 	ldrh	w2, [x19, #:lo12:.LANCHOR92]
 	mov	w1, 65535
 	add	x0, x19, :lo12:.LANCHOR92
 	cmp	w2, w1
-	beq	.L2077
+	beq	.L2109
 	bl	make_superblock
-.L2077:
+.L2109:
 	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2078
+	beq	.L2110
 	bl	make_superblock
-.L2078:
-	ldrh	w2, [x22, #:lo12:.LANCHOR204]
+.L2110:
+	ldrh	w2, [x22, #:lo12:.LANCHOR205]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR204
+	add	x0, x22, :lo12:.LANCHOR205
 	cmp	w2, w1
-	beq	.L2079
+	beq	.L2111
 	bl	make_superblock
-.L2079:
+.L2111:
 	mov	w0, 0
-	b	.L2059
+	b	.L2091
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14517,9 +14622,9 @@ FtlDumpBlockInfo:
 	bl	P2V_block_in_plane
 	ldrh	w25, [x19, #:lo12:.LANCHOR52]
 	and	w21, w0, 65535
-	adrp	x1, .LANCHOR224
+	adrp	x1, .LANCHOR225
 	adrp	x0, .LC45
-	add	x1, x1, :lo12:.LANCHOR224
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC45
 	bl	printf
 	adrp	x1, .LANCHOR83
@@ -14535,16 +14640,16 @@ FtlDumpBlockInfo:
 	bl	make_superblock
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2104
-	cbnz	w22, .L2104
+	cbz	w0, .L2136
+	cbnz	w22, .L2136
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2095
+	bne	.L2127
 	adrp	x0, .LANCHOR53
 	ldrh	w25, [x0, #:lo12:.LANCHOR53]
-.L2095:
+.L2127:
 	ldrh	w3, [x19, #:lo12:.LANCHOR52]
 	adrp	x26, .LC48
 	add	x26, x26, :lo12:.LC48
@@ -14555,7 +14660,7 @@ FtlDumpBlockInfo:
 	adrp	x0, .LC47
 	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L2096:
+.L2128:
 	adrp	x1, .LANCHOR104
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR180
@@ -14572,22 +14677,22 @@ FtlDumpBlockInfo:
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2097:
+.L2129:
 	cmp	w1, w5
-	bne	.L2099
+	bne	.L2131
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2100:
+.L2132:
 	cmp	x22, x19
-	bne	.L2101
+	bne	.L2133
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2096
-.L2102:
+	bne	.L2128
+.L2134:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14597,13 +14702,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2104:
+.L2136:
 	mov	w21, 0
-	b	.L2095
-.L2099:
+	b	.L2127
+.L2131:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2098
+	beq	.L2130
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14617,12 +14722,12 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2098:
+.L2130:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2097
-.L2101:
+	b	.L2129
+.L2133:
 	ldr	x8, [x24, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
@@ -14638,7 +14743,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2100
+	b	.L2132
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14646,9 +14751,9 @@ FtlDumpBlockInfo:
 	.type	FtlScanAllBlock, %function
 FtlScanAllBlock:
 	sub	sp, sp, #144
-	adrp	x1, .LANCHOR225
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC45
-	add	x1, x1, :lo12:.LANCHOR225
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC45
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
@@ -14662,10 +14767,10 @@ FtlScanAllBlock:
 	add	x24, x24, :lo12:.LC50
 	str	x25, [sp, 80]
 	bl	printf
-.L2108:
+.L2140:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2116
+	bhi	.L2148
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14674,7 +14779,7 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2116:
+.L2148:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
@@ -14706,18 +14811,18 @@ FtlScanAllBlock:
 	adrp	x1, .LANCHOR58
 	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2109:
+.L2141:
 	cmp	w1, w5
-	bne	.L2111
+	bne	.L2143
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2112:
+.L2144:
 	cmp	x21, x25
-	bne	.L2113
+	bne	.L2145
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	adrp	x25, .LC51
 	add	x25, x25, :lo12:.LC51
@@ -14725,16 +14830,16 @@ FtlScanAllBlock:
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2114:
+.L2146:
 	cmp	x21, x19
-	bne	.L2115
+	bne	.L2147
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2108
-.L2111:
+	b	.L2140
+.L2143:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2110
+	beq	.L2142
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14748,12 +14853,12 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2110:
+.L2142:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2109
-.L2113:
+	b	.L2141
+.L2145:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
@@ -14769,8 +14874,8 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2112
-.L2115:
+	b	.L2144
+.L2147:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
@@ -14786,7 +14891,7 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2114
+	b	.L2146
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14816,8 +14921,8 @@ FtlMapTblRecovery:
 	mov	x0, x22
 	bl	ftl_memset
 	stp	wzr, wzr, [x28, 48]
-	adrp	x0, .LANCHOR202
-	add	x4, x0, :lo12:.LANCHOR202
+	adrp	x0, .LANCHOR203
+	add	x4, x0, :lo12:.LANCHOR203
 	ldr	x1, [x21, #:lo12:.LANCHOR183]
 	mov	x27, x4
 	str	x0, [x29, 128]
@@ -14835,14 +14940,14 @@ FtlMapTblRecovery:
 	add	x0, x25, :lo12:.LANCHOR53
 	str	w1, [x28, 56]
 	str	x0, [x29, 104]
-.L2119:
+.L2151:
 	ldr	w0, [x29, 156]
 	cmp	w19, w0
-	bge	.L2138
+	bge	.L2170
 	ldr	w0, [x29, 116]
 	sxtw	x26, w19
 	cmp	w19, w0
-	bne	.L2120
+	bne	.L2152
 	lsl	x0, x26, 1
 	mov	w1, 1
 	add	x21, x23, x0
@@ -14857,25 +14962,25 @@ FtlMapTblRecovery:
 	ldr	x0, [x29, 144]
 	strh	w19, [x28]
 	ldr	w0, [x0, x26, lsl 2]
-	adrp	x26, .LANCHOR1
+	adrp	x26, .LANCHOR2
 	str	w0, [x28, 48]
-	add	x26, x26, :lo12:.LANCHOR1
+	add	x26, x26, :lo12:.LANCHOR2
 	ldr	x0, [x29, 128]
-	add	x19, x0, :lo12:.LANCHOR202
-.L2121:
+	add	x19, x0, :lo12:.LANCHOR203
+.L2153:
 	cmp	w25, w23
-	ble	.L2124
-.L2138:
+	ble	.L2156
+.L2170:
 	mov	x0, x28
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x28, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2126
+	bne	.L2158
 	mov	x0, x28
 	bl	ftl_map_blk_alloc_new_blk
-.L2126:
+.L2158:
 	mov	x0, x28
 	bl	ftl_map_blk_gc
 	mov	x0, x28
@@ -14888,7 +14993,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2124:
+.L2156:
 	ldrh	w0, [x21]
 	mov	w2, 1
 	mov	w1, w2
@@ -14897,39 +15002,39 @@ FtlMapTblRecovery:
 	mov	x0, x19
 	bl	FlashReadPages
 	ldrb	w0, [x26]
-	cbz	w0, .L2122
+	cbz	w0, .L2154
 	ldr	x0, [x19, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L2122
+	cbz	w0, .L2154
 	ldrh	w1, [x27]
 	ldr	x0, [x19, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L2122
+	beq	.L2154
 	mov	w0, -1
 	str	w0, [x19]
-.L2122:
+.L2154:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2123
+	beq	.L2155
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2123
+	bls	.L2155
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2123
+	bne	.L2155
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x19, 4]
 	str	w1, [x22, x0]
-.L2123:
+.L2155:
 	add	w25, w25, 1
 	sxth	w25, w25
-	b	.L2121
-.L2120:
+	b	.L2153
+.L2152:
 	lsl	x26, x26, 1
 	ldr	x0, [x21, #:lo12:.LANCHOR183]
 	str	x0, [x27, 8]
@@ -14946,27 +15051,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2140
+	beq	.L2172
 	ldrh	w1, [x20]
 	ldrh	w0, [x28, 4]
 	cmp	w1, w0
-	bne	.L2140
+	bne	.L2172
 	ldrh	w1, [x20, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2128
-.L2140:
+	beq	.L2160
+.L2172:
 	adrp	x26, .LANCHOR57
 	add	x26, x26, :lo12:.LANCHOR57
-	adrp	x0, .LANCHOR1
+	adrp	x0, .LANCHOR2
 	mov	w5, 0
-	add	x0, x0, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LANCHOR2
 	str	x0, [x29, 120]
-.L2129:
+.L2161:
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2136
+	bge	.L2168
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	str	w5, [x29, 152]
@@ -14979,12 +15084,12 @@ FtlMapTblRecovery:
 	ldr	x0, [x29, 120]
 	ldr	w5, [x29, 152]
 	ldrb	w0, [x0]
-	cbz	w0, .L2133
+	cbz	w0, .L2165
 	ldr	x0, [x27, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 152]
 	uxtw	x0, w0
-	cbz	w0, .L2133
+	cbz	w0, .L2165
 	ldrh	w1, [x26]
 	ldr	x0, [x27, 8]
 	str	w5, [x29, 112]
@@ -14992,54 +15097,54 @@ FtlMapTblRecovery:
 	ldr	w1, [x29, 152]
 	ldr	w5, [x29, 112]
 	cmp	w1, w0
-	beq	.L2133
+	beq	.L2165
 	mov	w0, -1
 	str	w0, [x27]
-.L2133:
+.L2165:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2134
+	beq	.L2166
 	ldrh	w0, [x20, 8]
 	cmp	w24, w0
-	bls	.L2134
+	bls	.L2166
 	ldrh	w2, [x20]
 	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2134
+	bne	.L2166
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x22, x0]
-.L2134:
+.L2166:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2129
-.L2128:
+	b	.L2161
+.L2160:
 	ldrh	w5, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR183]
 	sub	w5, w5, #1
-.L2130:
+.L2162:
 	cmp	w0, w5
-	blt	.L2132
-.L2136:
+	blt	.L2164
+.L2168:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2119
-.L2132:
+	b	.L2151
+.L2164:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x6, x1]
 	cmp	w24, w1
-	bls	.L2131
+	bls	.L2163
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x6, x2, lsl 2]
 	str	w2, [x22, x1]
-.L2131:
+.L2163:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2130
+	b	.L2162
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -15048,8 +15153,8 @@ FtlMapTblRecovery:
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
 	adrp	x1, .LANCHOR61
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
+	adrp	x0, .LANCHOR216
+	add	x0, x0, :lo12:.LANCHOR216
 	add	x29, sp, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR61]
 	strh	w1, [x0, 10]
@@ -15093,10 +15198,84 @@ FtlLoadMapInfo:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.section	.text.ftl_scan_all_ppa,"ax",@progbits
 	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
+	.global	ftl_scan_all_ppa
+	.type	ftl_scan_all_ppa, %function
+ftl_scan_all_ppa:
+	sub	sp, sp, #96
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x21, x22, [sp, 48]
+	adrp	x22, .LANCHOR52
+	adrp	x21, .LANCHOR51
+	stp	x23, x24, [sp, 64]
+	ldrh	w2, [x22, #:lo12:.LANCHOR52]
+	adrp	x24, .LC53
+	ldrh	w1, [x21, #:lo12:.LANCHOR51]
+	add	x24, x24, :lo12:.LC53
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR203
+	add	x19, x19, :lo12:.LANCHOR203
+	mov	w23, 0
+	stp	x25, x26, [sp, 80]
+	bl	printf
+.L2197:
+	ldrh	w0, [x21, #:lo12:.LANCHOR51]
+	cmp	w23, w0
+	bcs	.L2199
+	lsl	w26, w23, 10
+	mov	w20, 0
+	add	x25, x22, :lo12:.LANCHOR52
+	b	.L2200
+.L2198:
+	add	w0, w20, w26
+	stp	wzr, w0, [x19]
+	adrp	x0, .LANCHOR183
+	mov	w2, 0
+	mov	w1, 1
+	add	w20, w20, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	str	x0, [x19, 8]
+	adrp	x0, .LANCHOR188
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	str	x0, [x19, 16]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldp	x1, x0, [x19, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	mov	x0, x24
+	ldr	w7, [x1]
+	ldp	w2, w1, [x19]
+	bl	printf
+.L2200:
+	ldrh	w0, [x25]
+	cmp	w20, w0
+	bcc	.L2198
+	add	w23, w23, 1
+	b	.L2197
+.L2199:
+	ldp	x19, x20, [sp, 32]
+	adrp	x1, .LANCHOR227
+	ldp	x21, x22, [sp, 48]
+	add	x1, x1, :lo12:.LANCHOR227
+	ldp	x23, x24, [sp, 64]
+	adrp	x0, .LC54
+	ldp	x25, x26, [sp, 80]
+	add	x0, x0, :lo12:.LC54
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 96
+	b	printf
+	.size	ftl_scan_all_ppa, .-ftl_scan_all_ppa
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
 FlashReadFacBbtData:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
@@ -15126,11 +15305,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2165:
+.L2203:
 	cmp	w19, w20
-	ble	.L2172
+	ble	.L2210
 	mov	w0, -1
-.L2164:
+.L2202:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15138,7 +15317,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2172:
+.L2210:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -15148,37 +15327,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2166
+	beq	.L2204
 	ldr	x0, [x22, #:lo12:.LANCHOR197]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2166
-	cbz	x23, .L2173
-	cbz	w25, .L2168
-.L2171:
+	bne	.L2204
+	cbz	x23, .L2211
+	cbz	w25, .L2206
+.L2209:
 	ldr	x1, [x21, #:lo12:.LANCHOR147]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC52
+	adrp	x0, .LC55
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC52
+	add	x0, x0, :lo12:.LC55
 	bl	rknand_print_hex
-.L2173:
+.L2211:
 	mov	w0, 0
-	b	.L2164
-.L2168:
+	b	.L2202
+.L2206:
 	ldr	x5, [x21, #:lo12:.LANCHOR147]
 	adrp	x2, .LANCHOR149
 	add	x2, x2, :lo12:.LANCHOR149
 	mov	w0, 0
 	mov	w6, 1
-.L2169:
+.L2207:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2171
+	bcs	.L2209
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -15188,11 +15367,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2169
-.L2166:
+	b	.L2207
+.L2204:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2165
+	b	.L2203
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15216,10 +15395,10 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2179
-.L2183:
+	bne	.L2217
+.L2221:
 	mov	w0, 0
-.L2180:
+.L2218:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15228,32 +15407,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2179:
+.L2217:
 	ldr	x4, [x21, #:lo12:.LANCHOR153]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2181:
+.L2219:
 	cmp	w1, w19
-	bge	.L2180
+	bge	.L2218
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2182
+	beq	.L2220
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2182:
+.L2220:
 	cmp	w0, w5
-	bcs	.L2183
+	bcs	.L2221
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2181
+	b	.L2219
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15269,57 +15448,57 @@ FtlMakeBbt:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2190
+	cbnz	w21, .L2228
 	bl	FtlBbtMemInit
 	adrp	x20, .LANCHOR74
 	add	x22, x20, :lo12:.LANCHOR74
 	bl	FtlLoadFactoryBbt
 	add	x24, x22, 32
-	adrp	x28, .LANCHOR202
+	adrp	x28, .LANCHOR203
 	add	x22, x22, 12
-	add	x25, x28, :lo12:.LANCHOR202
+	add	x25, x28, :lo12:.LANCHOR203
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2191:
+.L2229:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2197
+	bcc	.L2235
 	adrp	x21, .LANCHOR59
 	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2198:
+.L2236:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2199
+	bhi	.L2237
 	add	x21, x20, :lo12:.LANCHOR74
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2200:
+.L2238:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2204
+	bgt	.L2242
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2201
+	beq	.L2239
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2202
+	cbz	w0, .L2240
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2201:
+.L2239:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2200
-.L2197:
+	b	.L2238
+.L2235:
 	adrp	x2, .LANCHOR188
 	adrp	x0, .LANCHOR183
-	add	x19, x28, :lo12:.LANCHOR202
+	add	x19, x28, :lo12:.LANCHOR203
 	ldrh	w1, [x22]
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
 	mov	w3, 65535
@@ -15328,7 +15507,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2192
+	beq	.L2230
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15343,14 +15522,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2193:
+.L2231:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2191
-.L2192:
+	b	.L2229
+.L2230:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -15363,12 +15542,12 @@ FtlMakeBbt:
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2194:
+.L2232:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2195
+	beq	.L2233
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -15401,29 +15580,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2193
+	bne	.L2231
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2194
-.L2195:
+	b	.L2232
+.L2233:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2194
-.L2199:
+	b	.L2232
+.L2237:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2198
-.L2202:
+	b	.L2236
+.L2240:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2203
+	bne	.L2241
 	strh	w19, [x21]
-	b	.L2201
-.L2203:
+	b	.L2239
+.L2241:
 	strh	w19, [x21, 4]
-.L2204:
+.L2242:
 	adrp	x0, .LANCHOR77
 	add	x19, x20, :lo12:.LANCHOR74
 	ldrh	w1, [x20, #:lo12:.LANCHOR74]
@@ -15452,7 +15631,7 @@ FtlMakeBbt:
 	strh	w0, [x19, 4]
 	strh	w1, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmTblFlush
-.L2190:
+.L2228:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15483,11 +15662,11 @@ log2phys:
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 116]
 	cmp	w25, w1
-	bcc	.L2211
+	bcc	.L2249
 	mov	w2, 884
-	adrp	x1, .LANCHOR226
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR226
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15495,10 +15674,10 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2211:
+.L2249:
 	ldr	w0, [x19, #:lo12:.LANCHOR72]
 	cmp	w25, w0
-	bcs	.L2212
+	bcs	.L2250
 	adrp	x19, .LANCHOR96
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR67
@@ -15507,10 +15686,10 @@ log2phys:
 	and	w22, w23, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR67]
 	mov	x0, 0
-.L2213:
+.L2251:
 	and	x20, x0, 65535
 	cmp	w20, w1
-	bcc	.L2218
+	bcc	.L2256
 	bl	select_l2p_ram_region
 	and	x20, x0, 65535
 	ldr	x1, [x19, #:lo12:.LANCHOR96]
@@ -15519,20 +15698,20 @@ log2phys:
 	ldrh	w3, [x1, x21]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2219
+	beq	.L2257
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2219
+	tbz	w1, #31, .L2257
 	bl	flush_l2p_region
-.L2219:
+.L2257:
 	adrp	x0, .LANCHOR66
 	str	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR66]
 	cmp	w1, w22
-	bcs	.L2220
+	bcs	.L2258
 	mov	w2, 526
-	adrp	x1, .LANCHOR227
+	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15540,12 +15719,12 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2220:
+.L2258:
 	adrp	x27, .LANCHOR131
 	ubfiz	x0, x22, 2, 16
 	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldr	w3, [x1, x0]
-	cbnz	w3, .L2221
+	cbnz	w3, .L2259
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	adrp	x1, .LANCHOR57
 	add	x0, x0, x21
@@ -15557,13 +15736,13 @@ log2phys:
 	add	x1, x0, x21
 	strh	w22, [x0, x21]
 	str	wzr, [x1, 4]
-	b	.L2215
-.L2212:
+	b	.L2253
+.L2250:
 	ldr	w1, [x29, 116]
 	mov	w0, -1
-	cbnz	w1, .L2210
+	cbnz	w1, .L2248
 	str	w0, [x26]
-.L2210:
+.L2248:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15571,37 +15750,37 @@ log2phys:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2218:
+.L2256:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L2213
-.L2215:
+	bne	.L2251
+.L2253:
 	mov	x0, 1
 	lsl	x24, x0, x24
 	ldr	w0, [x29, 116]
 	sub	w24, w24, #1
 	and	w25, w24, w25
 	and	x25, x25, 65535
-	cbnz	w0, .L2216
+	cbnz	w0, .L2254
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x0, x0, x20, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x26]
-.L2217:
+.L2255:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x20, x0, x20, lsl 4
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L2226
+	beq	.L2264
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L2226:
+.L2264:
 	mov	w0, 0
-	b	.L2210
-.L2216:
+	b	.L2248
+.L2254:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	ldr	w2, [x26]
 	add	x0, x0, x20, lsl 4
@@ -15612,11 +15791,11 @@ log2phys:
 	str	w1, [x0, 4]
 	adrp	x0, .LANCHOR97
 	strh	w22, [x0, #:lo12:.LANCHOR97]
-	b	.L2217
-.L2221:
+	b	.L2255
+.L2259:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	adrp	x5, .LANCHOR202
-	add	x28, x5, :lo12:.LANCHOR202
+	adrp	x5, .LANCHOR203
+	add	x28, x5, :lo12:.LANCHOR203
 	mov	w2, 1
 	add	x0, x0, x21
 	str	x5, [x29, 96]
@@ -15636,11 +15815,11 @@ log2phys:
 	ldr	x5, [x29, 96]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2222
+	beq	.L2260
 	mov	w2, w3
 	and	w1, w23, 65535
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	bl	printf
 	ldr	x1, [x28, 16]
 	mov	w3, 4
@@ -15652,21 +15831,21 @@ log2phys:
 	mov	w2, 4
 	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldrh	w3, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR76
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L2223:
+.L2261:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, 8]
 	cmp	w0, w22
-	beq	.L2224
+	beq	.L2262
 	mov	w2, 552
-	adrp	x1, .LANCHOR227
+	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR229
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15674,21 +15853,21 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2224:
+.L2262:
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	add	x1, x0, x21
 	str	wzr, [x1, 4]
 	strh	w22, [x0, x21]
-	b	.L2215
-.L2222:
-	ldr	w0, [x5, #:lo12:.LANCHOR202]
+	b	.L2253
+.L2260:
+	ldr	w0, [x5, #:lo12:.LANCHOR203]
 	cmp	w0, 256
-	bne	.L2223
+	bne	.L2261
 	and	w23, w23, 65535
 	mov	w2, w3
 	mov	w1, w23
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	mov	w1, w23
@@ -15697,7 +15876,7 @@ log2phys:
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	b	.L2223
+	b	.L2261
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -15712,14 +15891,14 @@ FtlProgPages:
 	ldr	w2, [x23, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2229
+	cbnz	w2, .L2267
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2244
+	cbz	w2, .L2282
 	ldrb	w2, [x3, 8]
 	cmp	w2, 1
 	cset	w22, eq
-.L2231:
+.L2269:
 	mov	x20, x3
 	ldrb	w3, [x3, 9]
 	mov	w21, w1
@@ -15732,21 +15911,21 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR138
 	mov	w1, 56
 	umaddl	x21, w21, w1, x19
-.L2232:
+.L2270:
 	cmp	x19, x21
-	beq	.L2241
+	beq	.L2279
 	adrp	x26, .LANCHOR83
-	b	.L2242
-.L2244:
+	b	.L2280
+.L2282:
 	mov	w22, 0
-	b	.L2231
-.L2235:
+	b	.L2269
+.L2273:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2233
+	bne	.L2271
 	ldr	x2, [x26, #:lo12:.LANCHOR83]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20, 4]
@@ -15757,12 +15936,12 @@ FtlProgPages:
 	ldrh	w0, [x25]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L2233:
+.L2271:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2234
+	cbnz	w0, .L2272
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2234:
+.L2272:
 	ldr	w0, [x24, 96]
 	add	w0, w0, 1
 	str	w0, [x24, 96]
@@ -15779,20 +15958,20 @@ FtlProgPages:
 	mov	x0, x19
 	bl	FlashProgPages
 	ldr	w0, [x23, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2229
-.L2242:
+	cbnz	w0, .L2267
+.L2280:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2235
+	beq	.L2273
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2236
-	mov	w2, 1583
-	adrp	x1, .LANCHOR228
+	bcc	.L2274
+	mov	w2, 1588
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15800,10 +15979,10 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2236:
+.L2274:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L2237
-.L2249:
+	cbnz	w22, .L2275
+.L2287:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -15816,35 +15995,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w26, w1
 	cmn	w3, #1
-	beq	.L2239
+	beq	.L2277
 	adrp	x2, .LANCHOR83
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2240
-	adrp	x0, .LC56
+	cbnz	w0, .L2278
+	adrp	x0, .LC59
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC56
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L2240:
+.L2278:
 	mov	w0, w26
 	bl	decrement_vpc_count
-.L2239:
+.L2277:
 	add	x19, x19, 56
-	b	.L2232
-.L2237:
+	b	.L2270
+.L2275:
 	orr	w0, w0, -2147483648
-	b	.L2249
-.L2241:
+	b	.L2287
+.L2279:
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2229
-	mov	w2, 1600
-	adrp	x1, .LANCHOR228
+	bcc	.L2267
+	mov	w2, 1605
+	adrp	x1, .LANCHOR230
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR230
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15852,7 +16031,7 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2229:
+.L2267:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15867,25 +16046,25 @@ FtlProgPages:
 FtlCacheWriteBack:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2256
+	cbnz	w0, .L2294
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR132
 	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2251
-	adrp	x1, .LANCHOR229
+	cbz	x0, .L2289
+	adrp	x1, .LANCHOR231
 	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR229]
+	ldr	x3, [x1, #:lo12:.LANCHOR231]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2251:
+.L2289:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2256:
+.L2294:
 	mov	w0, 0
 	ret
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -15896,7 +16075,7 @@ FtlCacheWriteBack:
 FtlSysFlush:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2262
+	cbnz	w0, .L2300
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -15907,7 +16086,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2262:
+.L2300:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -15916,17 +16095,17 @@ FtlSysFlush:
 	.global	FtlDeInit
 	.type	FtlDeInit, %function
 FtlDeInit:
-	adrp	x0, .LANCHOR230
-	ldr	w0, [x0, #:lo12:.LANCHOR230]
+	adrp	x0, .LANCHOR232
+	ldr	w0, [x0, #:lo12:.LANCHOR232]
 	cmp	w0, 1
-	bne	.L2268
+	bne	.L2306
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2268:
+.L2306:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -15957,61 +16136,61 @@ ftl_discard:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L2281
+	bhi	.L2319
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L2275
-.L2289:
+	bhi	.L2313
+.L2327:
 	mov	w0, 0
-.L2273:
+.L2311:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2275:
+.L2313:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2289
+	cbnz	w0, .L2327
 	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L2277
+	beq	.L2315
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L2277:
-	adrp	x20, .LANCHOR231
+.L2315:
+	adrp	x20, .LANCHOR233
 	adrp	x23, .LANCHOR163
-	add	x20, x20, :lo12:.LANCHOR231
+	add	x20, x20, :lo12:.LANCHOR233
 	add	x23, x23, :lo12:.LANCHOR163
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L2278:
+.L2316:
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	cmp	w19, w0
-	bcs	.L2280
-	adrp	x0, .LANCHOR231
-	ldr	w1, [x0, #:lo12:.LANCHOR231]
+	bcs	.L2318
+	adrp	x0, .LANCHOR233
+	ldr	w1, [x0, #:lo12:.LANCHOR233]
 	cmp	w1, 32
-	bls	.L2289
-	str	wzr, [x0, #:lo12:.LANCHOR231]
+	bls	.L2327
+	str	wzr, [x0, #:lo12:.LANCHOR233]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2289
-.L2280:
+	b	.L2327
+.L2318:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L2279
+	beq	.L2317
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -16026,63 +16205,209 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2279:
+.L2317:
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L2278
-.L2281:
+	b	.L2316
+.L2319:
 	mov	w0, -1
-	b	.L2273
+	b	.L2311
 	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlCheckVpc,"ax",@progbits
+	.align	2
+	.global	FtlCheckVpc
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR72
+	add	x23, x23, :lo12:.LANCHOR72
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR234
+	stp	x27, x28, [sp, 80]
+	add	x1, x21, :lo12:.LANCHOR234
+	adrp	x20, check_valid_page_count_table
+	bl	printf
+	add	x19, x20, :lo12:check_valid_page_count_table
+	mov	x2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	memset
+.L2329:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L2331
+	adrp	x22, .LANCHOR40
+	adrp	x24, .LC60
+	add	x22, x22, :lo12:.LANCHOR40
+	add	x26, x20, :lo12:check_valid_page_count_table
+	add	x24, x24, :lo12:.LC60
+	mov	w23, 0
+	mov	w19, 0
+	adrp	x25, .LANCHOR83
+.L2332:
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L2334
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L2335
+	adrp	x0, .LANCHOR88
+	adrp	x25, .LC61
+	add	x20, x20, :lo12:check_valid_page_count_table
+	add	x25, x25, :lo12:.LC61
+	ldrh	w26, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR81
+	mov	x24, x0
+	mov	w22, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR81]
+	adrp	x27, .LANCHOR83
+	mov	w28, 6
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L2336:
+	cmp	w22, w26
+	bne	.L2338
+.L2335:
+	cbz	w23, .L2328
+	mov	w2, 1688
+	add	x1, x21, :lo12:.LANCHOR234
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2328:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2331:
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+	ldr	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L2330
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L2330:
+	add	w22, w22, 1
+	b	.L2329
+.L2334:
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L2333
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L2333
+	ldrh	w1, [x26, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.L2333:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2332
+.L2338:
+	ldr	x1, [x27, #:lo12:.LANCHOR83]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L2337
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w23, 1
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.L2337:
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
+	umull	x19, w19, w28
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L2335
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L2336
+	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
 	.global	Ftlscanalldata
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC57
+	adrp	x0, .LC62
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC57
+	add	x0, x0, :lo12:.LC62
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR202
+	adrp	x20, .LANCHOR203
 	stp	x21, x22, [sp, 48]
 	mov	w19, 0
 	adrp	x21, .LANCHOR72
-	add	x22, x20, :lo12:.LANCHOR202
+	add	x22, x20, :lo12:.LANCHOR203
 	add	x21, x21, :lo12:.LANCHOR72
 	str	x23, [sp, 64]
 	bl	printf
-.L2291:
+.L2354:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2297
+	bcc	.L2360
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2297:
+.L2360:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2292
+	bne	.L2355
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC58
+	adrp	x0, .LC63
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC63
 	bl	printf
-.L2292:
+.L2355:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2294
-	add	x0, x20, :lo12:.LANCHOR202
-	str	wzr, [x20, #:lo12:.LANCHOR202]
+	beq	.L2357
+	add	x0, x20, :lo12:.LANCHOR203
+	str	wzr, [x20, #:lo12:.LANCHOR203]
 	mov	w2, 0
 	str	w1, [x0, 4]
 	adrp	x1, .LANCHOR183
@@ -16094,28 +16419,28 @@ Ftlscanalldata:
 	mov	w1, 1
 	str	x23, [x0, 16]
 	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR202]
+	ldr	w0, [x20, #:lo12:.LANCHOR203]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2295
+	beq	.L2358
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2294
-.L2295:
+	beq	.L2357
+.L2358:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC59
+	adrp	x0, .LC64
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC64
 	mov	w1, w19
 	bl	printf
-.L2294:
+.L2357:
 	add	w19, w19, 1
-	b	.L2291
+	b	.L2354
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -16136,10 +16461,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2300
+	cbnz	w1, .L2363
 	adrp	x0, .LANCHOR87
 	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2301
+	cbz	x19, .L2364
 	adrp	x2, .LANCHOR81
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -16152,20 +16477,20 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2302:
+.L2365:
 	cmp	w1, w4
-	beq	.L2301
+	beq	.L2364
 	cmp	w19, w3
-	bne	.L2303
+	bne	.L2366
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	cbnz	w0, .L2304
-	mov	w2, 2097
-	adrp	x1, .LANCHOR232
+	cbnz	w0, .L2367
+	mov	w2, 2099
+	adrp	x1, .LANCHOR235
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR232
+	add	x1, x1, :lo12:.LANCHOR235
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16173,7 +16498,7 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2304:
+.L2367:
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR88]
@@ -16183,7 +16508,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2301:
+.L2364:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -16193,18 +16518,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2303:
+.L2366:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2301
+	beq	.L2364
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2302
-.L2300:
+	b	.L2365
+.L2363:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2301
+	b	.L2364
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16222,7 +16547,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2469
+	beq	.L2532
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
 	adrp	x0, .LANCHOR52
@@ -16230,11 +16555,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2313
+	bne	.L2376
 	strh	wzr, [x19, 4]
-.L2476:
+.L2539:
 	strb	wzr, [x19, 6]
-.L2469:
+.L2532:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16243,26 +16568,26 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2313:
+.L2376:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2314:
+.L2377:
 	cmp	w0, w1
-	beq	.L2315
+	beq	.L2378
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2316
+	bne	.L2379
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2317
+	beq	.L2380
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2394
+	cbnz	w0, .L2457
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2318:
+.L2381:
 	adrp	x1, .LANCHOR105
 	adrp	x2, .LANCHOR38
 	adrp	x22, .LANCHOR180
@@ -16280,24 +16605,24 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2319:
+.L2382:
 	cmp	x1, x4
-	bne	.L2323
+	bne	.L2386
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2395
+	bne	.L2458
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2324:
+.L2387:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC60
-	adrp	x25, .LANCHOR234
-	add	x24, x24, :lo12:.LC60
-	add	x25, x25, :lo12:.LANCHOR234
+	adrp	x24, .LC65
+	adrp	x25, .LANCHOR237
+	add	x24, x24, :lo12:.LC65
+	add	x25, x25, :lo12:.LANCHOR237
 	mov	x28, 0
 	bl	FlashReadPages
 	adrp	x0, .LANCHOR160
@@ -16305,71 +16630,71 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 168]
 	ldr	w21, [x0, #:lo12:.LANCHOR160]
 	sub	w21, w21, #1
-.L2325:
+.L2388:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2330
-	bne	.L2328
+	bhi	.L2393
+	bne	.L2391
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2471:
+.L2534:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2332
+	bne	.L2395
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2332
+	cbnz	w0, .L2395
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2332:
+.L2395:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2333
+	bne	.L2396
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2333:
+.L2396:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2334
-.L2477:
+	beq	.L2397
+.L2540:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2469
-.L2315:
+	b	.L2532
+.L2378:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2314
-.L2316:
+	b	.L2377
+.L2379:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2317
-.L2394:
+	beq	.L2380
+.L2457:
 	mov	w23, w20
-	b	.L2318
-.L2317:
-	cbz	w26, .L2320
-	mov	w2, 2168
-	adrp	x1, .LANCHOR233
+	b	.L2381
+.L2380:
+	cbz	w26, .L2383
+	mov	w2, 2170
+	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR236
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16377,15 +16702,15 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2320:
+.L2383:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2321
-	mov	w2, 2169
-	adrp	x1, .LANCHOR233
+	beq	.L2384
+	mov	w2, 2171
+	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR236
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16393,13 +16718,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2321:
+.L2384:
 	strh	wzr, [x19, 2]
-	b	.L2476
-.L2323:
+	b	.L2539
+.L2386:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2322
+	beq	.L2385
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16410,81 +16735,81 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2322:
+.L2385:
 	add	x4, x4, 2
-	b	.L2319
-.L2395:
+	b	.L2382
+.L2458:
 	str	wzr, [x29, 176]
-	b	.L2324
-.L2330:
+	b	.L2387
+.L2393:
 	mov	x0, 56
 	ldr	x2, [x22, #:lo12:.LANCHOR180]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2326
+	cbnz	w0, .L2389
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2327
+	beq	.L2390
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2327
+	cbz	w0, .L2390
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
 	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2327:
+.L2390:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2329
-.L2328:
+	bne	.L2392
+.L2391:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2471
-.L2326:
+	b	.L2534
+.L2389:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2329:
+.L2392:
 	add	x28, x28, 1
-	b	.L2325
-.L2334:
+	b	.L2388
+.L2397:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2335
-	cbnz	w1, .L2336
-.L2335:
+	bne	.L2398
+	cbnz	w1, .L2399
+.L2398:
 	adrp	x24, .LANCHOR136
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2337
+	bne	.L2400
 	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2337:
+.L2400:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR136]
 	cmp	w0, w23, uxth
-	bge	.L2396
+	bge	.L2459
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2338:
+.L2401:
 	mov	w3, -1
 	adrp	x5, .LANCHOR120
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR120
 	mov	w4, 65535
-.L2339:
+.L2402:
 	cmp	w23, w6
-	bhi	.L2354
+	bhi	.L2417
 	ldr	x1, [x29, 160]
 	mov	w25, 0
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16493,24 +16818,24 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2355
-.L2396:
+	b	.L2418
+.L2459:
 	mov	w23, w26
-	b	.L2338
-.L2341:
+	b	.L2401
+.L2404:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2340
+	beq	.L2403
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2340:
+.L2403:
 	add	x2, x2, 2
-.L2355:
+.L2418:
 	cmp	x2, x1
-	bne	.L2341
+	bne	.L2404
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16534,67 +16859,67 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2342:
+.L2405:
 	cmp	x25, x1
-	bne	.L2352
-	cbz	w2, .L2353
+	bne	.L2415
+	cbz	w2, .L2416
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2353:
+.L2416:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2339
-.L2352:
+	b	.L2402
+.L2415:
 	ldr	w8, [x1]
-	cbnz	w8, .L2343
+	cbnz	w8, .L2406
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2398
+	beq	.L2461
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2398
+	beq	.L2461
 	cmn	w3, #1
-	bne	.L2400
+	bne	.L2463
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2345
-	cbz	w10, .L2400
-.L2345:
+	bne	.L2408
+	cbz	w10, .L2463
+.L2408:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2344:
+.L2407:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2342
-.L2343:
-	cbz	w2, .L2346
+	b	.L2405
+.L2406:
+	cbz	w2, .L2409
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2346:
-	adrp	x0, .LANCHOR234
+.L2409:
+	adrp	x0, .LANCHOR237
 	ldrh	w1, [x19]
-	strh	w1, [x0, #:lo12:.LANCHOR234]
+	strh	w1, [x0, #:lo12:.LANCHOR237]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2336
+	cbnz	w0, .L2399
 	adrp	x0, .LANCHOR120
 	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2348
+	bne	.L2411
 	cmn	w3, #1
-	beq	.L2349
+	beq	.L2412
 	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2336:
-	adrp	x0, .LANCHOR235
+.L2399:
+	adrp	x0, .LANCHOR238
 	mov	w23, w26
 	mov	w1, 1
 	adrp	x28, .LANCHOR136
-	strh	w1, [x0, #:lo12:.LANCHOR235]
+	strh	w1, [x0, #:lo12:.LANCHOR238]
 	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2356:
+.L2419:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR15
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16606,9 +16931,9 @@ FtlRecoverySuperblock:
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2357:
+.L2420:
 	cmp	x2, x3
-	bne	.L2360
+	bne	.L2423
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16616,103 +16941,103 @@ FtlRecoverySuperblock:
 	mov	w0, 56
 	umull	x0, w24, w0
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR234
-	add	x0, x0, :lo12:.LANCHOR234
+	adrp	x0, .LANCHOR237
+	add	x0, x0, :lo12:.LANCHOR237
 	str	x0, [x29, 120]
-.L2361:
+.L2424:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2387
+	bne	.L2450
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2388
+	bne	.L2451
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2388
+	cbz	w0, .L2451
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2388
+	bne	.L2451
 	cmp	w20, w23
-	beq	.L2363
-.L2388:
+	beq	.L2426
+.L2451:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2356
+	bne	.L2419
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2389:
+.L2452:
 	cmp	w0, w1
-	beq	.L2469
+	beq	.L2532
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2390
+	beq	.L2453
 	strb	w0, [x19, 6]
-	b	.L2469
-.L2349:
+	b	.L2532
+.L2412:
 	cmp	w21, w7
-	beq	.L2350
+	beq	.L2413
 	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2336
-.L2350:
+	b	.L2399
+.L2413:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2478:
+.L2541:
 	sub	w0, w0, #1
-.L2472:
+.L2535:
 	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2336
-.L2348:
+	b	.L2399
+.L2411:
 	cmp	w28, w21
-	beq	.L2351
+	beq	.L2414
 	cmn	w28, #1
-	beq	.L2336
+	beq	.L2399
 	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2336
-.L2351:
+	b	.L2399
+.L2414:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2478
-	b	.L2336
-.L2398:
+	bne	.L2541
+	b	.L2399
+.L2461:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2344
-.L2400:
+	b	.L2407
+.L2463:
 	mov	w2, 1
-	b	.L2344
-.L2354:
+	b	.L2407
+.L2417:
 	mov	w0, -1
-	b	.L2472
-.L2360:
+	b	.L2535
+.L2423:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2358
+	beq	.L2421
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2359
-	cbz	w5, .L2359
+	bne	.L2422
+	cbz	w5, .L2422
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2359:
+.L2422:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2358:
+.L2421:
 	add	x3, x3, 2
-	b	.L2357
-.L2387:
+	b	.L2420
+.L2450:
 	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -16721,38 +17046,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2362
+	bcc	.L2425
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2362
+	bhi	.L2425
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2363
+	beq	.L2426
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2364
+	beq	.L2427
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2365
+	beq	.L2428
 	ldrh	w0, [x19]
-.L2474:
+.L2537:
 	bl	decrement_vpc_count
-	b	.L2362
-.L2365:
+	b	.L2425
+.L2428:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2366
+	beq	.L2429
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2366
+	cbz	w0, .L2429
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2366:
+.L2429:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -16762,12 +17087,12 @@ FtlRecoverySuperblock:
 	ldr	w1, [x28, #:lo12:.LANCHOR136]
 	ldr	w3, [x29, 196]
 	cmn	w1, #1
-	beq	.L2367
+	beq	.L2430
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2367
+	cbz	w0, .L2430
 	cmn	w3, #1
-	beq	.L2368
+	beq	.L2431
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16781,15 +17106,15 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2369
-.L2370:
+	bne	.L2432
+.L2433:
 	mov	w0, -1
 	str	w0, [x29, 196]
-.L2377:
+.L2440:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2362
-.L2393:
+	beq	.L2425
+.L2456:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -16797,11 +17122,11 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2383
-	mov	w2, 2456
-	adrp	x1, .LANCHOR233
+	bhi	.L2446
+	mov	w2, 2458
+	adrp	x1, .LANCHOR236
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR236
 	add	x0, x0, :lo12:.LC5
 	str	w24, [x29, 152]
 	bl	printf
@@ -16811,50 +17136,50 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2383:
+.L2446:
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2384
+	cbz	w0, .L2447
 	mov	w0, w3
-	b	.L2474
-.L2368:
+	b	.L2537
+.L2431:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2362
+	bne	.L2425
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-.L2362:
+.L2425:
 	add	x25, x25, 56
-	b	.L2361
-.L2369:
+	b	.L2424
+.L2432:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L2370
+	bne	.L2433
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 152]
 	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2370
+	cbz	w0, .L2433
 	ldp	w0, w1, [x29, 200]
 	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2372
-.L2473:
+	bne	.L2435
+.L2536:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2370
-.L2372:
+	b	.L2433
+.L2435:
 	cmp	w0, w1
-	beq	.L2370
+	beq	.L2433
 	cmn	w0, #1
-	beq	.L2373
+	beq	.L2436
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -16863,64 +17188,64 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 104]
-.L2374:
+.L2437:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2375
+	beq	.L2438
 	ldr	x0, [x29, 112]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2375
+	cbz	w0, .L2438
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2370
-.L2375:
+	cbz	w0, .L2433
+.L2438:
 	ldr	w1, [x29, 196]
-	b	.L2473
-.L2373:
+	b	.L2536
+.L2436:
 	str	w0, [x3]
-	b	.L2374
-.L2367:
+	b	.L2437
+.L2430:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2377
+	beq	.L2440
 	adrp	x0, .LANCHOR43
 	ldr	w0, [x0, #:lo12:.LANCHOR43]
 	cmp	w0, w3, lsr 10
-	bhi	.L2379
+	bhi	.L2442
 	cmn	w3, #1
-	bne	.L2362
-.L2379:
+	bne	.L2425
+.L2442:
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2377
+	beq	.L2440
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2393
+	beq	.L2456
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR91
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	beq	.L2382
+	beq	.L2445
 	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2382
+	beq	.L2445
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2377
-.L2382:
+	bne	.L2440
+.L2445:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16931,63 +17256,63 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2377
+	beq	.L2440
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2377
+	cbnz	w0, .L2440
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2377
-.L2384:
+	b	.L2440
+.L2447:
 	mov	w1, w24
-	adrp	x0, .LC61
-	add	x0, x0, :lo12:.LC61
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-	b	.L2362
-.L2364:
+	b	.L2425
+.L2427:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-	adrp	x2, .LANCHOR236
-	ldr	w0, [x2, #:lo12:.LANCHOR236]
+	adrp	x2, .LANCHOR239
+	ldr	w0, [x2, #:lo12:.LANCHOR239]
 	cmp	w0, 31
-	bhi	.L2385
-	adrp	x1, .LANCHOR237
-	add	x1, x1, :lo12:.LANCHOR237
+	bhi	.L2448
+	adrp	x1, .LANCHOR240
+	add	x1, x1, :lo12:.LANCHOR240
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x2, #:lo12:.LANCHOR236]
-.L2385:
+	str	w0, [x2, #:lo12:.LANCHOR239]
+.L2448:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2386
-.L2475:
+	bne	.L2449
+.L2538:
 	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2362
-.L2386:
+	b	.L2425
+.L2449:
 	cmp	w21, w0
-	bcs	.L2362
-	b	.L2475
-.L2390:
+	bcs	.L2425
+	b	.L2538
+.L2453:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2389
-.L2363:
+	b	.L2452
+.L2426:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2477
+	b	.L2540
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -16997,39 +17322,39 @@ FtlGcScanTempBlk:
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR238
+	adrp	x23, .LANCHOR241
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w20, [x23, #:lo12:.LANCHOR238]
+	ldrh	w20, [x23, #:lo12:.LANCHOR241]
 	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2504
-	cbnz	w20, .L2480
-.L2481:
+	beq	.L2567
+	cbnz	w20, .L2543
+.L2544:
 	bl	FtlGcPageVarInit
-	b	.L2482
-.L2504:
+	b	.L2545
+.L2567:
 	mov	w20, 0
-.L2480:
+.L2543:
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w1
-	beq	.L2481
-.L2482:
+	beq	.L2544
+.L2545:
 	adrp	x24, .LANCHOR72
 	add	x24, x24, :lo12:.LANCHOR72
 	mov	w26, -1
-.L2483:
+.L2546:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L2484
+	beq	.L2547
 	mov	w27, 56
-.L2503:
+.L2566:
 	adrp	x1, .LANCHOR104
 	adrp	x22, .LANCHOR180
 	add	x3, x19, 16
@@ -17047,34 +17372,34 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2485:
+.L2548:
 	cmp	x3, x1
-	bne	.L2487
+	bne	.L2550
 	mov	w1, w21
 	mov	w2, 0
 	bl	FlashReadPages
-	adrp	x25, .LANCHOR1
+	adrp	x25, .LANCHOR2
 	umull	x0, w21, w27
 	mov	x21, 0
 	str	x0, [x29, 104]
-	add	x0, x25, :lo12:.LANCHOR1
+	add	x0, x25, :lo12:.LANCHOR2
 	str	x0, [x29, 96]
-.L2488:
+.L2551:
 	ldr	x0, [x29, 104]
 	cmp	x0, x21
-	bne	.L2502
+	bne	.L2565
 	adrp	x0, .LANCHOR52
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bhi	.L2503
-.L2484:
+	bhi	.L2566
+.L2547:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
 	mov	w1, w20
-	strh	w0, [x23, #:lo12:.LANCHOR238]
+	strh	w0, [x23, #:lo12:.LANCHOR241]
 	mov	w2, 0
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
@@ -17086,10 +17411,10 @@ FtlGcScanTempBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2487:
+.L2550:
 	ldrh	w2, [x3]
 	cmp	w2, w10
-	beq	.L2486
+	beq	.L2549
 	umaddl	x4, w21, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -17103,57 +17428,59 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x7, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2486:
+.L2549:
 	add	x3, x3, 2
-	b	.L2485
-.L2502:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	add	x0, x1, x21
-	ldr	w1, [x1, x21]
-	ldr	w28, [x0, 4]
-	cbnz	w1, .L2489
-	ldr	x25, [x0, 16]
-	mov	w0, 65535
+	b	.L2548
+.L2565:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	add	x1, x0, x21
+	ldr	w0, [x0, x21]
+	ldr	w28, [x1, 4]
+	ldr	x25, [x1, 16]
+	cbnz	w0, .L2552
 	ldrh	w1, [x25]
+	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2518
+	beq	.L2581
 	ldr	w1, [x24]
 	ldr	w0, [x25, 8]
 	cmp	w0, w1
-	bls	.L2491
-.L2518:
+	bls	.L2554
+.L2581:
 	adrp	x0, .LANCHOR83
 	ldrh	w1, [x19]
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, x1, lsl 1]
-.L2517:
 	ldrh	w0, [x19]
-	mov	w20, 0
 	bl	INSERT_FREE_LIST
+	adrp	x1, .LANCHOR205
 	mov	w0, -1
 	strh	w0, [x19]
+	strh	w0, [x1, #:lo12:.LANCHOR205]
+.L2580:
 	bl	FtlGcPageVarInit
-	b	.L2483
-.L2491:
+	mov	w20, 0
+	b	.L2546
+.L2554:
 	ldr	x1, [x29, 96]
 	ldrb	w1, [x1]
-	cbnz	w1, .L2493
-.L2494:
+	cbnz	w1, .L2556
+.L2557:
 	ldp	w2, w0, [x25, 8]
 	mov	w1, w28
 	add	x21, x21, 56
 	bl	FtlGcUpdatePage
-	b	.L2488
-.L2493:
+	b	.L2551
+.L2556:
 	add	x1, x29, 116
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x25, 12]
 	ldr	w1, [x29, 116]
 	cmp	w0, w1
-	bne	.L2494
+	bne	.L2557
 	cmn	w0, #1
-	beq	.L2494
+	beq	.L2557
 	str	w0, [x29, 124]
 	adrp	x0, .LANCHOR187
 	mov	w2, 0
@@ -17172,57 +17499,61 @@ FtlGcScanTempBlk:
 	add	x2, x2, x21
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L2495:
+.L2558:
 	cmp	x0, x1
-	beq	.L2494
+	beq	.L2557
 	ldr	x6, [x2, 8]
 	ldr	w7, [x6, x0]
 	add	x0, x0, 4
 	add	x6, x5, x0
 	ldr	w6, [x6, -4]
 	cmp	w7, w6
-	beq	.L2495
+	beq	.L2558
 	ldrh	w1, [x19]
-	adrp	x0, .LC63
+	adrp	x0, .LC68
 	ldr	w2, [x29, 124]
-	add	x0, x0, :lo12:.LC63
+	add	x0, x0, :lo12:.LC68
 	bl	printf
-	b	.L2518
-.L2489:
+	b	.L2581
+.L2552:
 	ldrh	w1, [x19]
 	mov	w2, w28
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
 	bl	printf
 	adrp	x0, .LANCHOR28
 	ldr	w1, [x0, #:lo12:.LANCHOR28]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2498
+	cbnz	w1, .L2561
 	adrp	x1, .LANCHOR15
 	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L2499
-.L2498:
+	cbz	w1, .L2562
+.L2561:
 	adrp	x2, .LANCHOR78
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 159
-	bls	.L2500
-.L2499:
+	bls	.L2563
+.L2562:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	ldr	w1, [x1, x21]
 	cmn	w1, #1
-	bne	.L2501
-.L2500:
+	bne	.L2564
+.L2563:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	add	x3, x1, x21
 	ldr	w26, [x3, 4]
-.L2501:
+.L2564:
 	adrp	x1, .LANCHOR83
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	wzr, [x1, x0]
-	b	.L2517
+	ldrh	w0, [x19]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	b	.L2580
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
@@ -17231,10 +17562,10 @@ FtlGcScanTempBlk:
 FtlGcFreeTempBlock:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2520
+	cbz	w0, .L2583
 	mov	w0, 0
 	ret
-.L2520:
+.L2583:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -17247,27 +17578,27 @@ FtlGcFreeTempBlock:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
-	str	x27, [sp, 80]
-	beq	.L2522
+	stp	x27, x28, [sp, 80]
+	beq	.L2585
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2522
+	beq	.L2585
 	adrp	x0, .LANCHOR78
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2523
+	bls	.L2586
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2523:
+.L2586:
 	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2524
+	cbnz	w0, .L2587
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 96]
@@ -17277,24 +17608,24 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2524:
+.L2587:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 1
-.L2519:
+.L2582:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2522:
+.L2585:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 65535
 	ldrh	w1, [x19, #:lo12:.LANCHOR93]
 	add	x21, x19, :lo12:.LANCHOR93
 	cmp	w1, w0
-	beq	.L2545
+	beq	.L2609
 	bl	FtlCacheWriteBack
 	adrp	x20, .LANCHOR110
 	adrp	x0, .LANCHOR52
@@ -17304,11 +17635,11 @@ FtlGcFreeTempBlock:
 	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2526
+	beq	.L2589
 	mov	w2, 163
-	adrp	x1, .LANCHOR239
+	adrp	x1, .LANCHOR242
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR239
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -17316,18 +17647,18 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2526:
+.L2589:
 	add	x0, x19, :lo12:.LANCHOR93
-	adrp	x23, .LANCHOR83
+	adrp	x22, .LANCHOR83
 	ldrh	w3, [x21, #:lo12:.LANCHOR52]
 	adrp	x25, .LANCHOR72
 	ldrh	w2, [x19, #:lo12:.LANCHOR93]
-	adrp	x26, .LANCHOR239
+	add	x26, x20, :lo12:.LANCHOR110
 	ldrb	w0, [x0, 7]
 	add	x25, x25, :lo12:.LANCHOR72
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	add	x26, x26, :lo12:.LANCHOR239
+	ldr	x1, [x22, #:lo12:.LANCHOR83]
 	mov	w21, 0
+	adrp	x27, .LANCHOR111
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	adrp	x1, .LANCHOR161
@@ -17335,27 +17666,27 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR161]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2527:
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+.L2590:
+	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L2531
+	bhi	.L2594
 	mov	w0, -1
 	bl	decrement_vpc_count
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2532
+	cbz	w0, .L2595
 	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
-.L2532:
+.L2595:
 	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	ldr	x2, [x23, #:lo12:.LANCHOR83]
+	ldr	x2, [x22, #:lo12:.LANCHOR83]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2533
+	cbz	w1, .L2596
 	bl	INSERT_DATA_LIST
-.L2534:
+.L2597:
 	adrp	x0, .LANCHOR108
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR110]
@@ -17363,73 +17694,63 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR204
-	strh	w21, [x0, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR205
+	strh	w21, [x0, #:lo12:.LANCHOR205]
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR223
-	ldrh	w0, [x0, #:lo12:.LANCHOR223]
+	adrp	x0, .LANCHOR224
+	ldrh	w0, [x0, #:lo12:.LANCHOR224]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2545
+	ble	.L2609
 	adrp	x0, .LANCHOR176
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2545:
+.L2609:
 	mov	w0, 0
-	b	.L2519
-.L2531:
-	adrp	x0, .LANCHOR111
+	b	.L2582
+.L2594:
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	ldr	x28, [x27, #:lo12:.LANCHOR111]
+	ldr	w1, [x25]
 	umull	x24, w21, w24
-	ldr	w0, [x25]
-	add	x22, x27, x24
-	ldr	w1, [x22, 8]
-	cmp	w1, w0
-	bcc	.L2528
-	mov	w2, 168
-	mov	x1, x26
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	adrp	x1, .LC6
-	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC6
-	add	x0, x0, :lo12:.LC7
-	bl	printf
-.L2528:
-	ldr	w0, [x22, 8]
+	add	x23, x28, x24
+	ldr	w0, [x23, 8]
+	cmp	w0, w1
+	bcc	.L2591
+.L2607:
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	b	.L2608
+.L2591:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x27, x24]
+	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2529
+	bne	.L2593
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
-	ldr	w0, [x22, 8]
+	ldr	w0, [x23, 8]
 	mov	w2, 1
-	add	x1, x22, 4
+	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L2544:
+.L2608:
 	bl	decrement_vpc_count
-.L2530:
+	b	.L2592
+.L2593:
+	ldr	w0, [x23, 4]
+	cmp	w1, w0
+	bne	.L2607
+.L2592:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2527
-.L2529:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L2530
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	b	.L2544
-.L2533:
+	b	.L2590
+.L2596:
 	bl	INSERT_FREE_LIST
-	b	.L2534
+	b	.L2597
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -17444,11 +17765,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR93]
 	cmp	w3, w2
-	beq	.L2547
+	beq	.L2611
 	add	x1, x0, :lo12:.LANCHOR93
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2548
-.L2547:
+	cbnz	w0, .L2612
+.L2611:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -17463,7 +17784,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2548:
+.L2612:
 	add	x0, x19, :lo12:.LANCHOR93
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17476,29 +17797,29 @@ Ftl_get_new_temp_ppa:
 Ftl_gc_temp_data_write_back:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2551
+	cbz	w0, .L2615
 	mov	w0, 0
 	ret
-.L2554:
+.L2618:
 	mov	w0, 0
-.L2550:
+.L2614:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2551:
+.L2615:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR15
 	add	x29, sp, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR102
-	cbz	w0, .L2553
+	cbz	w0, .L2617
 	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2553
+	tbz	x0, 0, .L2617
 	adrp	x0, .LANCHOR93+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2554
-.L2553:
+	cbnz	w0, .L2618
+.L2617:
 	adrp	x20, .LANCHOR181
 	ldr	w1, [x19, #:lo12:.LANCHOR102]
 	mov	w3, 0
@@ -17508,26 +17829,27 @@ Ftl_gc_temp_data_write_back:
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2555:
+.L2619:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2557
+	bcc	.L2621
 	ldr	x0, [x20, #:lo12:.LANCHOR181]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR93+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2554
+	cbnz	w0, .L2618
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2567
-.L2557:
+	b	.L2631
+.L2621:
 	umull	x0, w11, w12
 	ldr	x2, [x20, #:lo12:.LANCHOR181]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
+	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L2556
+	bne	.L2620
 	adrp	x0, .LANCHOR93
 	adrp	x3, .LANCHOR83
 	ldrh	w4, [x0, #:lo12:.LANCHOR93]
@@ -17544,17 +17866,16 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2567:
+.L2631:
 	mov	w0, 1
-	b	.L2550
-.L2556:
-	ldr	x0, [x1, 16]
+	b	.L2614
+.L2620:
 	ldr	w1, [x1, 4]
-	ldp	w2, w0, [x0, 8]
+	ldp	w2, w0, [x3, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2555
+	b	.L2619
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -17573,7 +17894,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2568
+	bcc	.L2632
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
@@ -17581,7 +17902,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2568:
+.L2632:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17592,12 +17913,12 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR236
+	adrp	x0, .LANCHOR239
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR91
 	add	x19, x19, :lo12:.LANCHOR91
-	str	wzr, [x0, #:lo12:.LANCHOR236]
+	str	wzr, [x0, #:lo12:.LANCHOR239]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -17622,33 +17943,33 @@ FtlPowerLostRecovery:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR234
+	adrp	x0, .LANCHOR237
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR234]
+	strh	w1, [x0, #:lo12:.LANCHOR237]
 	adrp	x0, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR235
+	adrp	x20, .LANCHOR238
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	strh	wzr, [x20, #:lo12:.LANCHOR235]
+	strh	wzr, [x20, #:lo12:.LANCHOR238]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR209
-	ldrh	w1, [x0, #:lo12:.LANCHOR209]
+	adrp	x0, .LANCHOR210
+	ldrh	w1, [x0, #:lo12:.LANCHOR210]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2574
-.L2576:
+	bne	.L2638
+.L2640:
 	mov	w19, -1
-.L2573:
+.L2637:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2574:
+.L2638:
 	bl	FtlLoadSysInfo
 	mov	w19, w0
-	cbnz	w0, .L2576
+	cbnz	w0, .L2640
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17658,25 +17979,25 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR67
+	adrp	x0, .LANCHOR67
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
 	adrp	x0, .LANCHOR96
-	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR67]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
-	add	x2, x3, x2, uxtw 4
-	add	x1, x0, 4
-	add	x0, x0, x2
-.L2577:
-	cmp	x1, x0
-	bne	.L2579
-	ldrh	w0, [x20, #:lo12:.LANCHOR235]
-	cbnz	w0, .L2578
-	bl	l2p_flush
-	b	.L2582
-.L2579:
-	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2577
-.L2578:
+	ldr	x1, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 0
+	add	x1, x1, 4
+.L2641:
+	cmp	w0, w2
+	bge	.L2646
+	ldr	w3, [x1], 16
+	tbz	w3, #31, .L2642
+.L2646:
+	adrp	x3, .LANCHOR160
+	cmp	w0, w2
+	ldr	w1, [x3, #:lo12:.LANCHOR160]
+	add	w1, w1, 32
+	str	w1, [x3, #:lo12:.LANCHOR160]
+	bge	.L2648
+.L2643:
 	adrp	x0, .LANCHOR83
 	adrp	x1, .LANCHOR91
 	ldr	x2, [x0, #:lo12:.LANCHOR83]
@@ -17711,9 +18032,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2582:
+.L2650:
 	bl	FtlVpcTblFlush
-	b	.L2573
+	b	.L2637
+.L2642:
+	add	w0, w0, 1
+	b	.L2641
+.L2648:
+	ldrh	w0, [x20, #:lo12:.LANCHOR238]
+	cbnz	w0, .L2643
+	bl	l2p_flush
+	b	.L2650
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
@@ -17722,7 +18051,7 @@ FtlSysBlkInit:
 FtlLowFormat:
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2615
+	cbnz	w0, .L2683
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR195
 	mov	w1, 0
@@ -17750,9 +18079,9 @@ FtlLowFormat:
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2586
+	cbz	w0, .L2654
 	bl	FtlMakeBbt
-.L2586:
+.L2654:
 	adrp	x22, .LANCHOR55
 	adrp	x0, .LANCHOR186
 	mov	w6, 23752
@@ -17763,97 +18092,97 @@ FtlLowFormat:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 0
-.L2587:
+.L2655:
 	cmp	w0, w1
-	blt	.L2588
+	blt	.L2656
 	adrp	x21, .LANCHOR40
 	adrp	x19, .LANCHOR41
 	add	x26, x19, :lo12:.LANCHOR41
 	mov	w23, 0
 	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2589:
+.L2657:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2590
+	bhi	.L2658
 	adrp	x24, .LANCHOR38
 	sub	w1, w23, #2
 	ldrh	w0, [x24, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2591
-.L2595:
+	bgt	.L2659
+.L2663:
 	add	x26, x21, :lo12:.LANCHOR40
 	mov	w23, 0
 	mov	w25, 0
-.L2592:
+.L2660:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2596
+	bhi	.L2664
 	adrp	x0, .LANCHOR73
 	ldrh	w1, [x19, #:lo12:.LANCHOR41]
 	ldrh	w3, [x24, #:lo12:.LANCHOR38]
 	str	w1, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR42
-	adrp	x1, .LANCHOR223
+	adrp	x1, .LANCHOR224
 	ldr	w2, [x0, #:lo12:.LANCHOR42]
 	adrp	x0, .LANCHOR72
 	udiv	w6, w2, w3
 	ubfx	x5, x6, 5, 16
 	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w4, w5, 36
-	strh	w4, [x1, #:lo12:.LANCHOR223]
+	strh	w4, [x1, #:lo12:.LANCHOR224]
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2597
+	ble	.L2665
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
 	str	w2, [x0, #:lo12:.LANCHOR72]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
-	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2597:
+	strh	w2, [x1, #:lo12:.LANCHOR224]
+.L2665:
 	adrp	x2, .LANCHOR28
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2598
+	bne	.L2666
 	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	ldrh	w2, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2598:
+	strh	w4, [x1, #:lo12:.LANCHOR224]
+.L2666:
 	adrp	x2, .LANCHOR15
 	ldrb	w2, [x2, #:lo12:.LANCHOR15]
-	cbz	w2, .L2599
+	cbz	w2, .L2667
 	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	ldrh	w2, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2599:
+	strh	w4, [x1, #:lo12:.LANCHOR224]
+.L2667:
 	adrp	x2, .LANCHOR49
 	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2601
-	ldrh	w4, [x1, #:lo12:.LANCHOR223]
+	cbz	w2, .L2669
+	ldrh	w4, [x1, #:lo12:.LANCHOR224]
 	add	w4, w4, w2, lsr 1
-	strh	w4, [x1, #:lo12:.LANCHOR223]
+	strh	w4, [x1, #:lo12:.LANCHOR224]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2601
+	bge	.L2669
 	add	w2, w2, 32
 	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w2, w5, w2
-	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2601:
-	ldrh	w2, [x1, #:lo12:.LANCHOR223]
-	adrp	x25, .LANCHOR222
+	strh	w2, [x1, #:lo12:.LANCHOR224]
+.L2669:
+	ldrh	w2, [x1, #:lo12:.LANCHOR224]
+	adrp	x25, .LANCHOR223
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	adrp	x24, .LANCHOR83
 	mov	w23, -1
 	sub	w1, w1, w2
 	mul	w3, w1, w3
 	adrp	x1, .LANCHOR52
-	str	w3, [x25, #:lo12:.LANCHOR222]
+	str	w3, [x25, #:lo12:.LANCHOR223]
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w3, w1, w3
 	str	w3, [x0, #:lo12:.LANCHOR72]
@@ -17868,11 +18197,11 @@ FtlLowFormat:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR100
-	adrp	x1, .LANCHOR204
+	adrp	x1, .LANCHOR205
 	ldrh	w2, [x21, #:lo12:.LANCHOR40]
 	str	wzr, [x0, #:lo12:.LANCHOR100]
-	add	x0, x1, :lo12:.LANCHOR204
-	strh	w23, [x1, #:lo12:.LANCHOR204]
+	add	x0, x1, :lo12:.LANCHOR205
+	strh	w23, [x1, #:lo12:.LANCHOR205]
 	mov	w1, 255
 	lsr	w2, w2, 3
 	strh	wzr, [x0, 2]
@@ -17883,25 +18212,25 @@ FtlLowFormat:
 	strh	wzr, [x0, #:lo12:.LANCHOR91]
 	mov	w0, 1
 	strb	w0, [x19, 8]
-	adrp	x0, .LANCHOR0
+	adrp	x0, .LANCHOR1
 	strh	wzr, [x19, 2]
-	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2603:
+.L2671:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2604
+	cbnz	w1, .L2672
 	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2603
-.L2588:
+	b	.L2671
+.L2656:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -17909,8 +18238,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2587
-.L2590:
+	b	.L2655
+.L2658:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -17918,8 +18247,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2589
-.L2591:
+	b	.L2657
+.L2659:
 	udiv	w0, w23, w0
 	adrp	x1, .LANCHOR65
 	ldr	w23, [x1, #:lo12:.LANCHOR65]
@@ -17929,17 +18258,17 @@ FtlLowFormat:
 	add	x25, x19, :lo12:.LANCHOR41
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2593:
+.L2661:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2595
+	bls	.L2663
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2593
-.L2596:
+	b	.L2661
+.L2664:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -17947,8 +18276,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2592
-.L2604:
+	b	.L2660
+.L2672:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17968,20 +18297,20 @@ FtlLowFormat:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2605:
+.L2673:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2606
+	cbnz	w1, .L2674
 	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2605
-.L2606:
+	b	.L2673
+.L2674:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17994,10 +18323,10 @@ FtlLowFormat:
 	adrp	x0, .LANCHOR93
 	strh	w19, [x0, #:lo12:.LANCHOR93]
 	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR209
-	add	x1, x2, :lo12:.LANCHOR209
-	strh	w0, [x2, #:lo12:.LANCHOR209]
-	ldr	w0, [x25, #:lo12:.LANCHOR222]
+	adrp	x2, .LANCHOR210
+	add	x1, x2, :lo12:.LANCHOR210
+	strh	w0, [x2, #:lo12:.LANCHOR210]
+	ldr	w0, [x25, #:lo12:.LANCHOR223]
 	strh	w0, [x1, 6]
 	ldr	w0, [x20, #:lo12:.LANCHOR159]
 	str	w0, [x1, 8]
@@ -18007,11 +18336,11 @@ FtlLowFormat:
 	str	w0, [x20, #:lo12:.LANCHOR159]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2585
-	adrp	x0, .LANCHOR230
+	cbnz	w0, .L2653
+	adrp	x0, .LANCHOR232
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR230]
-.L2585:
+	str	w1, [x0, #:lo12:.LANCHOR232]
+.L2653:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -18019,7 +18348,7 @@ FtlLowFormat:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2615:
+.L2683:
 	mov	w0, 0
 	ret
 	.size	FtlLowFormat, .-FtlLowFormat
@@ -18030,8 +18359,8 @@ FtlLowFormat:
 rk_ftl_garbage_collect:
 	adrp	x1, .LANCHOR76
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L2670
-	stp	x29, x30, [sp, -192]!
+	cbnz	w1, .L2745
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR171
@@ -18040,228 +18369,228 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2672
+	cbnz	w1, .L2747
 	adrp	x1, .LANCHOR85
 	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, 47
-	bls	.L2672
+	bls	.L2747
 	adrp	x5, .LANCHOR113
 	mov	w2, 65535
 	ldrh	w8, [x5, #:lo12:.LANCHOR113]
 	cmp	w8, w2
-	beq	.L2620
+	beq	.L2688
 	adrp	x7, .LANCHOR112
 	ldrh	w1, [x7, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	bne	.L2620
+	bne	.L2688
 	adrp	x3, .LANCHOR114
 	ldrh	w6, [x3, #:lo12:.LANCHOR114]
 	cmp	w6, w1
-	beq	.L2620
+	beq	.L2688
 	adrp	x2, .LANCHOR115
 	ldrh	w4, [x2, #:lo12:.LANCHOR115]
 	cmp	w4, w1
-	beq	.L2620
+	beq	.L2688
 	mov	w1, -1
 	strh	w8, [x7, #:lo12:.LANCHOR112]
 	strh	w6, [x5, #:lo12:.LANCHOR113]
 	strh	w4, [x3, #:lo12:.LANCHOR114]
 	strh	w1, [x2, #:lo12:.LANCHOR115]
-.L2620:
-	cbnz	w0, .L2673
+.L2688:
+	cbnz	w0, .L2748
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 24
-	bhi	.L2674
+	bhi	.L2749
 	adrp	x1, .LANCHOR52
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR52]
-	bls	.L2623
+	bls	.L2691
 	lsr	w20, w20, 5
-.L2622:
+.L2690:
 	adrp	x2, .LANCHOR176
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2626
+	bcs	.L2694
 	adrp	x0, .LANCHOR93
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bne	.L2627
+	bne	.L2695
 	adrp	x1, .LANCHOR112
 	ldrh	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w1, w0
-	bne	.L2627
-	adrp	x0, .LANCHOR240
-	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	cbnz	w0, .L2628
+	bne	.L2695
+	adrp	x0, .LANCHOR243
+	ldrh	w0, [x0, #:lo12:.LANCHOR243]
+	cbnz	w0, .L2696
 	adrp	x1, .LANCHOR72
 	adrp	x4, .LANCHOR100
 	ldr	w1, [x1, #:lo12:.LANCHOR72]
 	ldr	w4, [x4, #:lo12:.LANCHOR100]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2629
-.L2628:
-	adrp	x1, .LANCHOR223
-	ldrh	w1, [x1, #:lo12:.LANCHOR223]
+	bcs	.L2697
+.L2696:
+	adrp	x1, .LANCHOR224
+	ldrh	w1, [x1, #:lo12:.LANCHOR224]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR176]
-.L2630:
+.L2698:
 	adrp	x1, .LANCHOR172
 	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2618:
+.L2686:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x29, x30, [sp], 176
 	ret
-.L2623:
+.L2691:
 	cmp	w0, 12
-	bls	.L2624
+	bls	.L2692
 	lsr	w20, w20, 4
-	b	.L2622
-.L2624:
+	b	.L2690
+.L2692:
 	cmp	w0, 8
-	bls	.L2622
+	bls	.L2690
 	lsr	w20, w20, 2
-	b	.L2622
-.L2674:
+	b	.L2690
+.L2749:
 	mov	w20, 1
-	b	.L2622
-.L2629:
+	b	.L2690
+.L2697:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2630
-.L2627:
-	adrp	x0, .LANCHOR223
-	ldrh	w0, [x0, #:lo12:.LANCHOR223]
+	b	.L2698
+.L2695:
+	adrp	x0, .LANCHOR224
+	ldrh	w0, [x0, #:lo12:.LANCHOR224]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2626:
+.L2694:
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2621
+	cbz	w0, .L2689
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2621:
-	adrp	x19, .LANCHOR204
+.L2689:
+	adrp	x19, .LANCHOR205
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR204]
+	ldrh	w2, [x19, #:lo12:.LANCHOR205]
 	cmp	w2, w0
-	bne	.L2633
+	bne	.L2701
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	beq	.L2634
+	beq	.L2702
 	adrp	x2, .LANCHOR83
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2635
+	cbnz	w1, .L2703
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2635:
+.L2703:
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
-	strh	w1, [x19, #:lo12:.LANCHOR204]
+	strh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2634:
-	add	x0, x19, :lo12:.LANCHOR204
+.L2702:
+	add	x0, x19, :lo12:.LANCHOR205
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
 	cmp	w0, w1
-	beq	.L2633
+	beq	.L2701
 	bl	IsBlkInGcList
-	cbz	w0, .L2637
+	cbz	w0, .L2705
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2637:
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2705:
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2638
-	ldrh	w0, [x19, #:lo12:.LANCHOR204]
-	add	x3, x19, :lo12:.LANCHOR204
+	cbz	w0, .L2706
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
+	add	x3, x19, :lo12:.LANCHOR205
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2638:
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+.L2706:
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR204
+	add	x22, x19, :lo12:.LANCHOR205
 	cmp	w1, w0
-	beq	.L2633
+	beq	.L2701
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR241
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR244
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	strh	wzr, [x0, #:lo12:.LANCHOR244]
 	adrp	x0, .LANCHOR83
 	strb	wzr, [x22, 6]
 	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR242
-	strh	w1, [x0, #:lo12:.LANCHOR242]
-.L2633:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
-	cmp	w2, w1
-	beq	.L2639
-	adrp	x0, .LANCHOR92
-	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
-	cmp	w2, w1
-	beq	.L2639
+	adrp	x0, .LANCHOR245
+	strh	w1, [x0, #:lo12:.LANCHOR245]
+.L2701:
+	adrp	x1, .LANCHOR91
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
+	str	x1, [x29, 128]
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	beq	.L2707
+	adrp	x1, .LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	cmp	w1, w0
+	beq	.L2707
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	cmp	w1, w0
+	bne	.L2708
+.L2707:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2708:
 	adrp	x25, .LANCHOR178
 	add	x26, x25, :lo12:.LANCHOR178
-.L2640:
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+.L2744:
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2641
+	bne	.L2709
 	adrp	x0, .LANCHOR172
 	adrp	x22, .LANCHOR52
 	add	x22, x22, :lo12:.LANCHOR52
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2642:
+.L2710:
 	ldrh	w5, [x25, #:lo12:.LANCHOR178]
 	add	x7, x25, :lo12:.LANCHOR178
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR204]
+	strh	w6, [x19, #:lo12:.LANCHOR205]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2643
+	bne	.L2711
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2618
-.L2673:
+	b	.L2686
+.L2748:
 	mov	w20, 1
-	b	.L2621
-.L2639:
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2709:
-	adrp	x0, .LANCHOR240
-	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	b	.L2618
-.L2643:
+	b	.L2689
+.L2711:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2644
+	cbz	w0, .L2712
 	strh	w5, [x25, #:lo12:.LANCHOR178]
-	b	.L2642
-.L2644:
+	b	.L2710
+.L2712:
 	adrp	x23, .LANCHOR83
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
@@ -18273,54 +18602,57 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2646
+	bgt	.L2714
 	cmp	w5, 48
-	bls	.L2647
+	bls	.L2715
 	cmp	w3, 8
-	bls	.L2647
+	bls	.L2715
 	adrp	x3, .LANCHOR108
 	ldrh	w3, [x3, #:lo12:.LANCHOR108]
 	cmp	w3, 35
-	bhi	.L2647
-.L2646:
+	bhi	.L2715
+.L2714:
 	strh	wzr, [x26]
-.L2647:
+.L2715:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2648
+	bgt	.L2716
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L2648
+	bhi	.L2716
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-	b	.L2709
-.L2648:
-	cbnz	w1, .L2649
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2787:
+	adrp	x0, .LANCHOR243
+	ldrh	w0, [x0, #:lo12:.LANCHOR243]
+	b	.L2686
+.L2716:
+	cbnz	w1, .L2717
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L2642
-.L2649:
+	b	.L2710
+.L2717:
 	adrp	x0, .LANCHOR15
-	add	x3, x19, :lo12:.LANCHOR204
+	add	x3, x19, :lo12:.LANCHOR205
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2650
+	cbz	w0, .L2718
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2650:
-	ldr	x0, [x29, 144]
+.L2718:
+	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w6
-	bne	.L2651
-	mov	w2, 893
-	adrp	x1, .LANCHOR243
+	bne	.L2719
+	mov	w2, 902
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18328,16 +18660,16 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2651:
-	ldr	x0, [x29, 136]
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+.L2719:
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2652
-	mov	w2, 894
-	adrp	x1, .LANCHOR243
+	bne	.L2720
+	mov	w2, 903
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18345,16 +18677,16 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2652:
+.L2720:
 	adrp	x0, .LANCHOR93
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2653
-	mov	w2, 895
-	adrp	x1, .LANCHOR243
+	bne	.L2721
+	mov	w2, 904
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18362,55 +18694,55 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2653:
-	add	x22, x19, :lo12:.LANCHOR204
+.L2721:
+	add	x22, x19, :lo12:.LANCHOR205
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR241
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	adrp	x0, .LANCHOR244
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	strh	wzr, [x0, #:lo12:.LANCHOR244]
 	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR242
+	adrp	x0, .LANCHOR245
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR242]
+	strh	w1, [x0, #:lo12:.LANCHOR245]
 	strb	wzr, [x22, 6]
-.L2641:
+.L2709:
 	adrp	x1, .LANCHOR52
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR171]
 	ldrh	w0, [x1, #:lo12:.LANCHOR52]
-	str	w0, [x29, 172]
+	str	w0, [x29, 156]
 	adrp	x0, .LANCHOR15
-	str	x1, [x29, 128]
-	str	x0, [x29, 120]
+	str	x1, [x29, 120]
+	str	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR15]
-	cbz	w2, .L2654
-	add	x0, x19, :lo12:.LANCHOR204
+	cbz	w2, .L2722
+	add	x0, x19, :lo12:.LANCHOR205
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2654
+	bne	.L2722
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	str	w0, [x29, 172]
-.L2654:
-	add	x0, x19, :lo12:.LANCHOR204
-	ldr	w2, [x29, 172]
+	str	w0, [x29, 156]
+.L2722:
+	add	x0, x19, :lo12:.LANCHOR205
+	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L2655
+	ble	.L2723
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L2655:
-	adrp	x0, .LANCHOR241
+.L2723:
+	adrp	x0, .LANCHOR244
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR241
-	str	x0, [x29, 160]
-.L2656:
+	add	x0, x0, :lo12:.LANCHOR244
+	str	x0, [x29, 144]
+.L2724:
 	cmp	w20, w28, uxth
-	bls	.L2664
-	add	x1, x19, :lo12:.LANCHOR204
+	bls	.L2732
+	add	x1, x19, :lo12:.LANCHOR205
 	adrp	x0, .LANCHOR38
 	adrp	x23, .LANCHOR106
 	add	x1, x1, 16
@@ -18422,24 +18754,24 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	add	w4, w4, w28
 	mov	w5, 56
-	b	.L2665
-.L2658:
+	b	.L2733
+.L2726:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2657
+	beq	.L2725
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2657:
+.L2725:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2665:
+.L2733:
 	cmp	w2, w7
-	bne	.L2658
-	add	x1, x19, :lo12:.LANCHOR204
+	bne	.L2726
+	add	x1, x19, :lo12:.LANCHOR205
 	adrp	x24, .LANCHOR102
 	add	x24, x24, :lo12:.LANCHOR102
 	ldrb	w2, [x1, 8]
@@ -18448,32 +18780,32 @@ rk_ftl_garbage_collect:
 	mov	w0, 56
 	umull	x0, w22, w0
 	mov	x22, 0
-	str	x0, [x29, 152]
-.L2659:
-	ldr	x0, [x29, 152]
-	cmp	x22, x0
-	bne	.L2663
+	str	x0, [x29, 136]
+.L2727:
+	ldr	x0, [x29, 136]
+	cmp	x0, x22
+	bne	.L2731
 	add	w28, w28, 1
-	b	.L2656
-.L2663:
+	b	.L2724
+.L2731:
 	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2660
+	beq	.L2728
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L2660
+	bne	.L2728
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L2661
-	mov	w2, 934
-	str	w4, [x29, 112]
-	adrp	x1, .LANCHOR243
+	bne	.L2729
+	mov	w2, 943
+	str	w4, [x29, 104]
+	adrp	x1, .LANCHOR246
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR243
+	add	x1, x1, :lo12:.LANCHOR246
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -18481,22 +18813,22 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	ldr	w4, [x29, 112]
-.L2661:
+	ldr	w4, [x29, 104]
+.L2729:
 	mov	w2, 0
-	add	x1, x29, 188
+	add	x1, x29, 168
 	mov	w0, w4
 	bl	log2phys
 	ldr	x0, [x23, #:lo12:.LANCHOR106]
-	ldr	w1, [x29, 188]
+	ldr	w1, [x29, 168]
 	add	x0, x0, x22
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2660
-	ldr	x1, [x29, 160]
+	bne	.L2728
+	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR181
-	ldr	x2, [x29, 160]
+	ldr	x2, [x29, 144]
 	ldr	x5, [x4, #:lo12:.LANCHOR181]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
@@ -18504,14 +18836,14 @@ rk_ftl_garbage_collect:
 	strh	w1, [x2]
 	ldr	w2, [x24]
 	mov	w1, 56
-	str	w1, [x29, 168]
+	str	w1, [x29, 152]
 	nop // between mem op and mult-accumulate
 	umaddl	x2, w2, w1, x5
-	stp	x4, x2, [x29, 104]
+	stp	x4, x2, [x29, 96]
 	str	w0, [x2, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldp	x4, x2, [x29, 104]
-	ldr	w1, [x29, 168]
+	ldp	x4, x2, [x29, 96]
+	ldr	w1, [x29, 152]
 	str	w0, [x2, 4]
 	ldr	x0, [x4, #:lo12:.LANCHOR181]
 	ldr	w2, [x24]
@@ -18523,7 +18855,7 @@ rk_ftl_garbage_collect:
 	str	x4, [x1, 8]
 	ldr	x4, [x0, 16]
 	str	x4, [x1, 16]
-	ldr	w1, [x29, 188]
+	ldr	w1, [x29, 168]
 	str	w1, [x27, 12]
 	adrp	x1, .LANCHOR93
 	add	x12, x1, :lo12:.LANCHOR93
@@ -18535,103 +18867,127 @@ rk_ftl_garbage_collect:
 	str	w1, [x27, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbnz	w0, .L2662
+	cbnz	w0, .L2730
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L2662
+	beq	.L2730
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2660
-.L2662:
+	cbnz	w0, .L2728
+.L2730:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2660
-.L2710:
+	cbz	w0, .L2728
+	add	x0, x19, :lo12:.LANCHOR205
+	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2709
-.L2660:
+	strh	w1, [x19, #:lo12:.LANCHOR205]
+	strh	wzr, [x0, 2]
+	b	.L2787
+.L2728:
 	add	x22, x22, 56
-	b	.L2659
-.L2664:
-	add	x1, x19, :lo12:.LANCHOR204
+	b	.L2727
+.L2732:
+	add	x1, x19, :lo12:.LANCHOR205
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
-	ldr	w0, [x29, 172]
+	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L2666
+	bhi	.L2734
 	adrp	x0, .LANCHOR102
 	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2667
+	cbz	w0, .L2735
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2710
-.L2667:
-	adrp	x0, .LANCHOR241
-	ldrh	w0, [x0, #:lo12:.LANCHOR241]
-	cbnz	w0, .L2668
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	adrp	x20, .LANCHOR83
-	add	x0, x19, :lo12:.LANCHOR204
-	ldr	x3, [x20, #:lo12:.LANCHOR83]
-	ubfiz	x2, x1, 1, 16
-	ldrh	w4, [x3, x2]
-	cbz	w4, .L2668
-	adrp	x2, .LANCHOR242
-	mov	w3, 0
-	ldrh	w5, [x2, #:lo12:.LANCHOR242]
-	ldrh	w2, [x0, 2]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
-	bl	printf
-	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldr	x0, [x20, #:lo12:.LANCHOR83]
+	cbz	w0, .L2735
+	str	wzr, [x21, #:lo12:.LANCHOR171]
+	b	.L2787
+.L2735:
+	adrp	x0, .LANCHOR244
+	ldrh	w0, [x0, #:lo12:.LANCHOR244]
+	cbnz	w0, .L2736
+	adrp	x22, .LANCHOR83
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	ldr	x0, [x22, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbz	w0, .L2736
+	adrp	x23, .LANCHOR72
+	add	x24, x23, :lo12:.LANCHOR72
+	mov	w20, 0
+.L2737:
+	ldr	w0, [x24]
+	cmp	w20, w0
+	bcs	.L2742
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w20
+	bl	log2phys
+	ldr	w0, [x29, 172]
+	cmn	w0, #1
+	beq	.L2738
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	cmp	w1, w0, uxth
+	bne	.L2738
+.L2742:
+	ldr	w0, [x23, #:lo12:.LANCHOR72]
+	cmp	w20, w0
+	bcc	.L2736
+	ldrh	w1, [x19, #:lo12:.LANCHOR205]
+	ldr	x0, [x22, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x19, #:lo12:.LANCHOR205]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2668:
+.L2736:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2666:
+	strh	w0, [x19, #:lo12:.LANCHOR205]
+.L2734:
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 2
-	bhi	.L2669
-	ldr	x0, [x29, 128]
+	bhi	.L2743
+	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR52]
-	b	.L2640
-.L2669:
+	b	.L2744
+.L2738:
+	add	w20, w20, 1
+	b	.L2737
+.L2743:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2618
-.L2670:
+	b	.L2686
+.L2745:
 	mov	w0, 0
 	ret
-.L2672:
+.L2747:
 	mov	w0, 0
-	b	.L2618
+	b	.L2686
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
 	.global	FtlInit
 	.type	FtlInit, %function
 FtlInit:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC67
-	add	x1, x1, :lo12:.LC67
+	stp	x29, x30, [sp, -64]!
+	adrp	x1, .LC71
+	add	x1, x1, :lo12:.LC71
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR230
+	adrp	x19, .LANCHOR232
 	mov	x20, x0
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR230]
-	adrp	x0, .LANCHOR244
-	str	wzr, [x0, #:lo12:.LANCHOR244]
+	str	w0, [x19, #:lo12:.LANCHOR232]
+	adrp	x0, .LANCHOR247
+	stp	x21, x22, [sp, 32]
+	str	wzr, [x0, #:lo12:.LANCHOR247]
 	adrp	x0, .LANCHOR76
+	stp	x23, x24, [sp, 48]
 	str	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
@@ -18644,42 +19000,64 @@ FtlInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2712
-	adrp	x1, .LANCHOR245
-	adrp	x0, .LC68
-	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC68
-.L2720:
+	cbz	w0, .L2789
+	adrp	x1, .LANCHOR248
+	adrp	x0, .LC72
+	add	x1, x1, :lo12:.LANCHOR248
+	add	x0, x0, :lo12:.LC72
+.L2798:
 	bl	printf
-.L2713:
+.L2790:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L2712:
+.L2789:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2714
-	adrp	x1, .LANCHOR245
-	adrp	x0, .LC69
-	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC69
-	b	.L2720
-.L2714:
+	cbz	w0, .L2791
+	adrp	x1, .LANCHOR248
+	adrp	x0, .LC73
+	add	x1, x1, :lo12:.LANCHOR248
+	add	x0, x0, :lo12:.LC73
+	b	.L2798
+.L2791:
 	mov	w1, 1
-	str	w1, [x19, #:lo12:.LANCHOR230]
+	str	w1, [x19, #:lo12:.LANCHOR232]
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
-	cmp	w0, 15
-	bhi	.L2713
-	mov	w19, 1024
-.L2716:
+	mov	x22, x0
+	ldrh	w23, [x0, #:lo12:.LANCHOR88]
+	cmp	w23, 15
+	bhi	.L2790
+	adrp	x20, .LANCHOR112
+	add	x20, x20, :lo12:.LANCHOR112
+	mov	w19, 0
+	adrp	x24, .LANCHOR205
+	mov	w21, 65535
+.L2795:
+	ldrh	w0, [x24, #:lo12:.LANCHOR205]
+	cmp	w0, w21
+	bne	.L2793
+	ldrh	w0, [x20]
+	cmp	w0, w21
+	bne	.L2793
+	and	w0, w19, 7
+	bl	List_get_gc_head_node
+	bl	FtlGcRefreshBlock
+.L2793:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L2716
-	b	.L2713
+	ldrh	w1, [x22, #:lo12:.LANCHOR88]
+	add	w0, w23, 2
+	cmp	w1, w0
+	bhi	.L2790
+	add	w19, w19, 1
+	cmp	w19, 1024
+	bne	.L2795
+	b	.L2790
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -18691,15 +19069,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2722
+	cbnz	w0, .L2800
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	bl	FtlInit
-.L2722:
+.L2800:
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18713,22 +19091,22 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR15
 	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cbz	w0, .L2739
+	cbz	w0, .L2817
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR234
+	adrp	x25, .LANCHOR237
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR83
-	ldrh	w23, [x25, #:lo12:.LANCHOR234]
+	ldrh	w23, [x25, #:lo12:.LANCHOR237]
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC71
+	adrp	x19, .LC75
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC75
 	bl	printf
 	adrp	x0, .LANCHOR91
 	add	x11, x0, :lo12:.LANCHOR91
@@ -18743,24 +19121,24 @@ ftl_fix_nand_power_lost_error:
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2726:
+.L2804:
 	subs	w20, w20, #1
-	beq	.L2730
+	beq	.L2808
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2726
-.L2730:
+	cbnz	w0, .L2804
+.L2808:
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC75
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2728
+	cbnz	w19, .L2806
 	add	x20, x29, 128
 	adrp	x22, .LANCHOR77
 	strh	w23, [x20, -48]!
@@ -18773,14 +19151,14 @@ ftl_fix_nand_power_lost_error:
 	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2731:
+.L2809:
 	cmp	w0, w3
-	bne	.L2733
+	bne	.L2811
 	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
@@ -18790,31 +19168,31 @@ ftl_fix_nand_power_lost_error:
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2728:
+.L2806:
 	mov	w0, -1
-	strh	w0, [x25, #:lo12:.LANCHOR234]
+	strh	w0, [x25, #:lo12:.LANCHOR237]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2733:
+.L2811:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2732
+	beq	.L2810
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2732:
+.L2810:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2731
-.L2739:
+	b	.L2809
+.L2817:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -18835,13 +19213,13 @@ ftl_read:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L2743
+	bne	.L2821
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2742:
+.L2820:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18851,18 +19229,18 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2743:
+.L2821:
 	add	w0, w1, w2
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR68
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2766
-	adrp	x0, .LANCHOR230
-	ldr	w21, [x0, #:lo12:.LANCHOR230]
+	bhi	.L2844
+	adrp	x0, .LANCHOR232
+	ldr	w21, [x0, #:lo12:.LANCHOR232]
 	cmn	w21, #1
-	beq	.L2742
+	beq	.L2820
 	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	adrp	x25, .LANCHOR138
@@ -18888,42 +19266,42 @@ ftl_read:
 	ldr	w2, [x29, 172]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2745:
+.L2823:
 	ldr	w0, [x29, 172]
-	cbnz	w0, .L2765
+	cbnz	w0, .L2843
 	adrp	x0, .LANCHOR116
 	ldrh	w0, [x0, #:lo12:.LANCHOR116]
-	cbz	w0, .L2742
+	cbz	w0, .L2820
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2742
-.L2765:
+	b	.L2820
+.L2843:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2746
+	bne	.L2824
 	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2747:
+.L2825:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2749
-.L2750:
+	bcc	.L2827
+.L2828:
 	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 172]
-	beq	.L2754
+	beq	.L2832
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w24, w0, lsl 2
-	bne	.L2745
-.L2754:
-	cbz	w24, .L2745
+	bne	.L2823
+.L2832:
+	cbz	w24, .L2823
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w1, w24
 	mov	w2, 0
@@ -18942,35 +19320,35 @@ ftl_read:
 	umull	x0, w24, w0
 	mov	x24, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	str	x0, [x29, 112]
-.L2764:
+.L2842:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w2, [x29, 168]
 	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2756
+	bne	.L2834
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2757
+	bne	.L2835
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2781:
+.L2859:
 	bl	ftl_memcpy
-.L2757:
+.L2835:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x0, x0, x24
 	ldr	x2, [x0, 16]
 	ldr	w1, [x0, 24]
 	ldr	w3, [x2, 8]
 	cmp	w1, w3
-	beq	.L2758
+	beq	.L2836
 	ldr	w3, [x25, 72]
 	add	w3, w3, 1
 	str	w3, [x25, 72]
@@ -18984,30 +19362,30 @@ ftl_read:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L2758:
+.L2836:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2759
+	bne	.L2837
 	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L2760:
+.L2838:
 	ldr	x0, [x29, 120]
 	add	x24, x24, 56
 	cmp	x0, x24
-	bne	.L2764
+	bne	.L2842
 	mov	w24, 0
-	b	.L2745
-.L2749:
+	b	.L2823
+.L2827:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2748
+	bhi	.L2826
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2748
+	bls	.L2826
 	sub	w0, w0, w19
 	str	x3, [x29, 136]
 	lsl	w0, w0, 9
@@ -19016,17 +19394,17 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 136]
-.L2748:
+.L2826:
 	add	w28, w28, 1
-	b	.L2747
-.L2746:
+	b	.L2825
+.L2824:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
 	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2751
+	bne	.L2829
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
@@ -19039,9 +19417,9 @@ ftl_read:
 	csel	w2, w27, w2, ls
 	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2752
+	bne	.L2830
 	str	x23, [x0, 8]
-.L2752:
+.L2830:
 	adrp	x1, .LANCHOR58
 	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
@@ -19052,11 +19430,11 @@ ftl_read:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2750
-.L2751:
+	b	.L2828
+.L2829:
 	ldr	w1, [x29, 164]
 	cmp	w20, w1
-	bne	.L2753
+	bne	.L2831
 	ldrh	w2, [x22, #:lo12:.LANCHOR55]
 	adrp	x1, .LANCHOR187
 	ldr	w3, [x29, 148]
@@ -19066,35 +19444,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2752
-.L2780:
+	bne	.L2830
+.L2858:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2752
-.L2753:
+	b	.L2830
+.L2831:
 	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	mul	w1, w1, w20
-	b	.L2780
-.L2756:
+	b	.L2858
+.L2834:
 	ldr	w2, [x29, 164]
 	cmp	w2, w1
-	bne	.L2757
+	bne	.L2835
 	ldr	x1, [x0, 8]
 	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2757
+	bne	.L2835
 	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w0, w0, w2
 	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2781
-.L2759:
+	b	.L2859
+.L2837:
 	cmp	w0, 256
-	bne	.L2760
+	bne	.L2838
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -19102,14 +19480,14 @@ ftl_read:
 	str	w1, [x29, 128]
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
-	adrp	x3, .LANCHOR204
-.L2762:
+	adrp	x3, .LANCHOR205
+.L2840:
 	subs	w2, w2, #1
-	bne	.L2761
-.L2763:
+	bne	.L2839
+.L2841:
 	bl	FtlSysFlush
-	b	.L2760
-.L2761:
+	b	.L2838
+.L2839:
 	mov	w1, 1
 	str	x3, [x29, 96]
 	mov	w0, w1
@@ -19118,13 +19496,13 @@ ftl_read:
 	ldr	x3, [x29, 96]
 	ldr	w1, [x29, 128]
 	ldr	w2, [x29, 108]
-	ldrh	w0, [x3, #:lo12:.LANCHOR204]
+	ldrh	w0, [x3, #:lo12:.LANCHOR205]
 	cmp	w0, w1
-	beq	.L2762
-	b	.L2763
-.L2766:
+	beq	.L2840
+	b	.L2841
+.L2844:
 	mov	w21, -1
-	b	.L2742
+	b	.L2820
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
@@ -19141,17 +19519,17 @@ FtlWrite:
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2814
+	cbnz	w1, .L2892
 	and	w0, w0, 255
 	mov	w23, w2
 	mov	x24, x3
 	cmp	w0, 16
-	bne	.L2784
+	bne	.L2862
 	mov	x2, x3
 	mov	w1, w23
 	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2782:
+.L2860:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19159,21 +19537,21 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2784:
+.L2862:
 	adrp	x0, .LANCHOR68
 	add	w2, w21, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
-	bhi	.L2815
-	adrp	x0, .LANCHOR230
-	ldr	w0, [x0, #:lo12:.LANCHOR230]
+	bhi	.L2893
+	adrp	x0, .LANCHOR232
+	ldr	w0, [x0, #:lo12:.LANCHOR232]
 	cmn	w0, #1
-	beq	.L2782
-	adrp	x0, .LANCHOR246
+	beq	.L2860
+	adrp	x0, .LANCHOR249
 	adrp	x26, .LANCHOR55
 	mov	w1, 2048
 	sub	w2, w2, #1
-	str	w1, [x0, #:lo12:.LANCHOR246]
+	str	w1, [x0, #:lo12:.LANCHOR249]
 	ldrh	w1, [x26, #:lo12:.LANCHOR55]
 	str	x26, [x29, 160]
 	udiv	w0, w2, w1
@@ -19187,25 +19565,25 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR132
 	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2786
+	cbz	x2, .L2864
 	ldr	w0, [x2, 24]
 	cmp	w20, w0
-	beq	.L2787
+	beq	.L2865
 	bl	FtlCacheWriteBack
-.L2786:
+.L2864:
 	adrp	x0, .LANCHOR91
 	mov	w19, w20
 	add	x22, x0, :lo12:.LANCHOR91
-.L2788:
-	cbnz	w25, .L2813
+.L2866:
+	cbnz	w25, .L2891
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w20
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2814:
+.L2892:
 	mov	w0, 0
-	b	.L2782
-.L2787:
+	b	.L2860
+.L2865:
 	adrp	x3, .LANCHOR164
 	ldr	w0, [x3, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
@@ -19221,15 +19599,15 @@ FtlWrite:
 	mov	x1, x24
 	mov	w2, w22
 	bl	ftl_memcpy
-	cbz	w27, .L2814
+	cbz	w27, .L2892
 	sub	w23, w23, w19
 	add	w21, w21, w19
 	add	x24, x24, x22
 	add	w20, w20, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w27
-	b	.L2786
-.L2813:
+	b	.L2864
+.L2891:
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
 	adrp	x1, .LANCHOR38
@@ -19237,11 +19615,11 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2789
-	mov	w2, 1668
-	adrp	x1, .LANCHOR247
+	bcc	.L2867
+	mov	w2, 1673
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19249,13 +19627,13 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2789:
+.L2867:
 	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2790
+	cbnz	w0, .L2868
 	bl	FtlCacheWriteBack
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2790:
+.L2868:
 	ldrb	w0, [x22, 7]
 	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
@@ -19268,11 +19646,11 @@ FtlWrite:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2791
-	mov	w2, 1701
-	adrp	x1, .LANCHOR247
+	bcc	.L2869
+	mov	w2, 1706
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19280,7 +19658,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2791:
+.L2869:
 	adrp	x0, .LANCHOR58
 	add	x0, x0, :lo12:.LANCHOR58
 	str	xzr, [x29, 168]
@@ -19288,25 +19666,25 @@ FtlWrite:
 	adrp	x0, .LANCHOR57
 	add	x0, x0, :lo12:.LANCHOR57
 	str	x0, [x29, 104]
-.L2792:
+.L2870:
 	ldr	w1, [x29, 144]
 	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2811
+	bcc	.L2889
 	mov	x27, x1
-.L2793:
+.L2871:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x3, x22
 	mov	w2, 0
 	mov	w1, w27
 	bl	FtlProgPages
 	cmp	w25, w27
-	bcs	.L2812
-	mov	w2, 1790
-	adrp	x1, .LANCHOR247
+	bcs	.L2890
+	mov	w2, 1795
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19314,12 +19692,12 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2812:
+.L2890:
 	sub	w25, w25, w27
-	b	.L2788
-.L2811:
+	b	.L2866
+.L2889:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L2793
+	cbz	w0, .L2871
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -19350,9 +19728,9 @@ FtlWrite:
 	ldr	w0, [x29, 152]
 	cmp	w19, w20
 	ccmp	w0, w19, 4, ne
-	bne	.L2794
+	bne	.L2872
 	cmp	w19, w20
-	bne	.L2795
+	bne	.L2873
 	ldr	x0, [x29, 160]
 	ldrh	w2, [x0, #:lo12:.LANCHOR55]
 	udiv	w0, w21, w2
@@ -19362,27 +19740,27 @@ FtlWrite:
 	cmp	w2, w23
 	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2796:
+.L2874:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	cmp	w0, w1
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2797
+	bne	.L2875
 	add	x3, x0, x26
 	cmp	w19, w20
-	bne	.L2798
+	bne	.L2876
 	str	x24, [x3, 8]
-.L2799:
+.L2877:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x22, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2808
-	mov	w2, 1775
-	adrp	x1, .LANCHOR247
+	bcc	.L2886
+	mov	w2, 1780
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19390,7 +19768,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2808:
+.L2886:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -19409,8 +19787,8 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2792
-.L2795:
+	b	.L2870
+.L2873:
 	ldr	x0, [x29, 160]
 	add	w2, w21, w23
 	str	wzr, [x29, 148]
@@ -19418,27 +19796,27 @@ FtlWrite:
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2796
-.L2798:
+	b	.L2874
+.L2876:
 	ldr	w0, [x29, 156]
-.L2826:
+.L2904:
 	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x24, x0
 	str	x0, [x3, 8]
-	b	.L2799
-.L2797:
+	b	.L2877
+.L2875:
 	add	x0, x0, x26
 	cmp	w19, w20
-	bne	.L2800
+	bne	.L2878
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2825:
+.L2903:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2802
+	beq	.L2880
 	str	w0, [x29, 188]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19451,17 +19829,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2803
+	bne	.L2881
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2806:
+.L2884:
 	ldr	w0, [x29, 156]
 	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2807
+	bne	.L2885
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x1, x24
 	add	x3, x0, x26
@@ -19469,34 +19847,34 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L2827:
+.L2905:
 	bl	ftl_memcpy
-	b	.L2799
-.L2800:
+	b	.L2877
+.L2878:
 	adrp	x1, .LANCHOR187
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2825
-.L2803:
+	b	.L2903
+.L2881:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2805
+	beq	.L2883
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC73
+	adrp	x0, .LC77
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC77
 	bl	printf
-.L2805:
+.L2883:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2806
-	mov	w2, 1754
-	adrp	x1, .LANCHOR247
+	beq	.L2884
+	mov	w2, 1759
+	adrp	x1, .LANCHOR250
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR247
+	add	x1, x1, :lo12:.LANCHOR250
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -19504,8 +19882,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2806
-.L2802:
+	b	.L2884
+.L2880:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x26
@@ -19513,8 +19891,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2806
-.L2807:
+	b	.L2884
+.L2885:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR55]
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19524,16 +19902,16 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x24, x1
-	b	.L2827
-.L2794:
+	b	.L2905
+.L2872:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	b	.L2826
-.L2815:
+	b	.L2904
+.L2893:
 	mov	w0, -1
-	b	.L2782
+	b	.L2860
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19587,187 +19965,26 @@ ftl_write:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w2
-	stp	x21, x22, [sp, 32]
-	mov	x20, x3
-	mov	w22, w1
-	ands	w21, w0, 255
-	bne	.L2833
-	mov	w3, w2
-	mov	w0, 0
-	mov	x2, x20
-	bl	idb_write_data
-.L2833:
-	mov	x3, x20
-	mov	w2, w19
-	mov	w1, w22
-	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	b	FtlWrite
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlCheckVpc,"ax",@progbits
-	.align	2
-	.global	FtlCheckVpc
-	.type	FtlCheckVpc, %function
-FtlCheckVpc:
-	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR72
-	add	x23, x23, :lo12:.LANCHOR72
-	stp	x21, x22, [sp, 32]
-	mov	w21, 0
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR248
-	stp	x27, x28, [sp, 80]
-	add	x1, x22, :lo12:.LANCHOR248
-	adrp	x20, check_valid_page_count_table
-	bl	printf
-	add	x19, x20, :lo12:check_valid_page_count_table
-	mov	x2, 8192
-	mov	w1, 0
-	mov	x0, x19
-	bl	memset
-.L2836:
-	ldr	w0, [x23]
-	cmp	w21, w0
-	bcc	.L2838
-	adrp	x24, .LANCHOR40
-	adrp	x23, .LANCHOR83
-	mov	w2, 2
-	adrp	x0, .LC74
-	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	add	x0, x0, :lo12:.LC74
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	add	x21, x20, :lo12:check_valid_page_count_table
-	adrp	x26, .LC76
-	add	x26, x26, :lo12:.LC76
-	mov	w25, 0
-	mov	w19, 0
-	bl	rknand_print_hex
-	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	mov	w2, 2
-	mov	x1, x21
-	adrp	x0, .LC75
-	add	x24, x24, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC75
-	bl	rknand_print_hex
-	mov	w4, 65535
-.L2839:
-	ldrh	w0, [x24]
-	cmp	w0, w19
-	bhi	.L2841
-	adrp	x0, .LANCHOR87
-	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L2842
-	adrp	x0, .LANCHOR88
-	adrp	x26, .LC77
-	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x26, x26, :lo12:.LC77
-	ldrh	w27, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR81
-	mov	x24, x0
-	mov	w21, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR81]
-	mov	w28, 6
-	mov	w4, 65535
-	sub	x19, x19, x1
-	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-.L2843:
-	cmp	w21, w27
-	bne	.L2845
-.L2842:
-	cbz	w25, .L2835
-	mov	w2, 1686
-	add	x1, x22, :lo12:.LANCHOR248
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	adrp	x1, .LC6
-	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC6
-	add	x0, x0, :lo12:.LC7
-	bl	printf
-.L2835:
+	mov	w19, w2
+	stp	x21, x22, [sp, 32]
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L2911
+	mov	w3, w2
+	mov	w0, 0
+	mov	x2, x20
+	bl	idb_write_data
+.L2911:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2838:
-	mov	w2, 0
-	add	x1, x29, 124
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 124]
-	cmn	w0, #1
-	beq	.L2837
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	x0, x0, 65535
-	ldrh	w1, [x19, x0, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x19, x0, lsl 1]
-.L2837:
-	add	w21, w21, 1
-	b	.L2836
-.L2841:
-	ldr	x0, [x23, #:lo12:.LANCHOR83]
-	ubfiz	x28, x19, 1, 16
-	sxtw	x27, w19
-	ldrh	w2, [x0, x28]
-	ldrh	w3, [x21, x27, lsl 1]
-	cmp	w2, w3
-	beq	.L2840
-	str	w4, [x29, 108]
-	mov	w1, w19
-	mov	x0, x26
-	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR83]
-	ldr	w4, [x29, 108]
-	ldrh	w0, [x0, x28]
-	cmp	w0, w4
-	beq	.L2840
-	ldrh	w1, [x21, x27, lsl 1]
-	cmp	w1, w0
-	csinc	w25, w25, wzr, ls
-.L2840:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2839
-.L2845:
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L2844
-	ldrh	w3, [x20, w19, sxtw 1]
-	mov	w1, w19
-	str	w4, [x29, 108]
-	mov	x0, x26
-	mov	w25, 1
-	bl	printf
-	ldr	w4, [x29, 108]
-.L2844:
-	umull	x19, w19, w28
-	ldr	x0, [x24, #:lo12:.LANCHOR81]
-	ldrh	w19, [x0, x19]
-	cmp	w19, w4
-	beq	.L2842
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2843
-	.size	FtlCheckVpc, .-FtlCheckVpc
+	ldp	x29, x30, [sp], 48
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
 	.section	.text.FtlDumpSysBlock,"ax",@progbits
 	.align	2
 	.global	FtlDumpSysBlock
@@ -19780,8 +19997,8 @@ FtlDumpSysBlock:
 	and	w25, w0, 65535
 	adrp	x0, .LANCHOR183
 	stp	x21, x22, [sp, 48]
-	adrp	x21, .LANCHOR202
-	add	x1, x21, :lo12:.LANCHOR202
+	adrp	x21, .LANCHOR203
+	add	x1, x21, :lo12:.LANCHOR203
 	ldr	x2, [x0, #:lo12:.LANCHOR183]
 	adrp	x22, .LANCHOR53
 	stp	x23, x24, [sp, 64]
@@ -19799,10 +20016,10 @@ FtlDumpSysBlock:
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2861:
+.L2914:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2863
+	blt	.L2916
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19811,8 +20028,8 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2863:
-	add	x20, x21, :lo12:.LANCHOR202
+.L2916:
+	add	x20, x21, :lo12:.LANCHOR203
 	orr	w0, w19, w26
 	mov	w2, 1
 	mov	w1, w2
@@ -19820,7 +20037,7 @@ FtlDumpSysBlock:
 	mov	x0, x20
 	bl	FlashReadPages
 	ldp	x1, x0, [x20, 8]
-	ldr	w2, [x21, #:lo12:.LANCHOR202]
+	ldr	w2, [x21, #:lo12:.LANCHOR203]
 	ldr	w3, [x20, 4]
 	ldr	w1, [x1]
 	str	w1, [sp]
@@ -19832,16 +20049,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2862
+	beq	.L2915
 	ldr	x1, [x27, #:lo12:.LANCHOR183]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2862:
+.L2915:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2861
+	b	.L2914
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -19862,33 +20079,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2869:
+.L2922:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2875
+	bhi	.L2928
 	adrp	x25, .LANCHOR128
-	adrp	x19, .LANCHOR202
+	adrp	x19, .LANCHOR203
 	add	x25, x25, :lo12:.LANCHOR128
-	add	x19, x19, :lo12:.LANCHOR202
+	add	x19, x19, :lo12:.LANCHOR203
 	mov	w26, 0
-.L2876:
+.L2929:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2879
+	bge	.L2932
 	adrp	x21, .LANCHOR53
 	adrp	x0, .LC48
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
 	add	x21, x21, :lo12:.LANCHOR53
 	add	x24, x0, :lo12:.LC48
-	b	.L2880
-.L2871:
+	b	.L2933
+.L2924:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2870
+	cbnz	w0, .L2923
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -19898,17 +20115,17 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2870:
+.L2923:
 	add	x5, x5, 1
-.L2877:
+.L2930:
 	cmp	w12, w5, uxth
-	bhi	.L2871
-	cbnz	w19, .L2872
-.L2874:
+	bhi	.L2924
+	cbnz	w19, .L2925
+.L2927:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2869
-.L2872:
+	b	.L2922
+.L2925:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
@@ -19918,7 +20135,7 @@ dump_map_info:
 	add	x26, x26, :lo12:.LC80
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2873:
+.L2926:
 	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	add	x0, x0, x25
 	add	x25, x25, 56
@@ -19934,9 +20151,9 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2873
-	b	.L2874
-.L2875:
+	bne	.L2926
+	b	.L2927
+.L2928:
 	adrp	x0, .LANCHOR104
 	adrp	x21, .LANCHOR180
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
@@ -19949,8 +20166,8 @@ dump_map_info:
 	adrp	x0, .LANCHOR58
 	mov	w7, 56
 	ldrh	w8, [x0, #:lo12:.LANCHOR58]
-	b	.L2877
-.L2878:
+	b	.L2930
+.L2931:
 	adrp	x22, .LANCHOR129
 	mov	w2, 1
 	mov	w1, w2
@@ -19974,14 +20191,14 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2880:
+.L2933:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2878
+	blt	.L2931
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2876
-.L2879:
+	b	.L2929
+.L2932:
 	adrp	x0, .LANCHOR64
 	mov	w2, 2
 	adrp	x19, .LANCHOR66
@@ -20205,6 +20422,7 @@ dump_map_info:
 	.global	gReadRetryInfo
 	.global	gpNandParaInfo
 	.global	gNandOptPara
+	.global	g_nand_ecc_en
 	.global	g_slc2KBNand
 	.global	g_maxRetryCount
 	.global	g_maxRegNum
@@ -20335,7 +20553,7 @@ c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -20537,7 +20755,7 @@ gBbtInfo:
 	.zero	96
 	.section	.bss.gBlockPageAlignSize,"aw",@nobits
 	.align	2
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	gBlockPageAlignSize, %object
 	.size	gBlockPageAlignSize, 4
 gBlockPageAlignSize:
@@ -20647,14 +20865,14 @@ gMasterTempBuf:
 gMultiPageProgEn:
 	.zero	1
 	.section	.bss.gMultiPageReadEn,"aw",@nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
 	.zero	1
 	.section	.bss.gNandChipMap,"aw",@nobits
 	.align	3
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR0,. + 0
 	.type	gNandChipMap, %object
 	.size	gNandChipMap, 64
 gNandChipMap:
@@ -20697,7 +20915,7 @@ gNandFlashInfoBlockEcc:
 gNandFlashResEndPageAddr:
 	.zero	4
 	.section	.bss.gNandIDBResBlkNum,"aw",@nobits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	gNandIDBResBlkNum, %object
 	.size	gNandIDBResBlkNum, 1
 gNandIDBResBlkNum:
@@ -20742,7 +20960,7 @@ gNandOptPara:
 gNandPhyInfo:
 	.zero	28
 	.section	.bss.gNandRandomizer,"aw",@nobits
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gNandRandomizer, %object
 	.size	gNandRandomizer, 1
 gNandRandomizer:
@@ -20784,7 +21002,7 @@ gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR209,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 16
 gSysInfo:
@@ -20804,7 +21022,7 @@ gTotleBlock:
 	.zero	2
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
@@ -20825,7 +21043,7 @@ g_GlobalSysVersion:
 	.zero	4
 	.section	.bss.g_LowFormat,"aw",@nobits
 	.align	2
-	.set	.LANCHOR244,. + 0
+	.set	.LANCHOR247,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -20839,7 +21057,7 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -20902,7 +21120,7 @@ g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR218,. + 0
+	.set	.LANCHOR219,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
@@ -20923,7 +21141,7 @@ g_free_slc_blk_num:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR246,. + 0
+	.set	.LANCHOR249,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -20965,14 +21183,14 @@ g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR242,. + 0
+	.set	.LANCHOR245,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -21069,7 +21287,7 @@ g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -21135,6 +21353,12 @@ g_max_erase_count:
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
+	.section	.bss.g_nand_ecc_en,"aw",@nobits
+	.set	.LANCHOR200,. + 0
+	.type	g_nand_ecc_en, %object
+	.size	g_nand_ecc_en, 1
+g_nand_ecc_en:
+	.zero	1
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
 	.set	.LANCHOR119,. + 0
@@ -21165,14 +21389,14 @@ g_page_map_check_enable:
 	.zero	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR234,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -21186,14 +21410,14 @@ g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR239,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -21212,7 +21436,7 @@ g_req_cache:
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc2KBNand,"aw",@nobits
-	.set	.LANCHOR1,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	g_slc2KBNand, %object
 	.size	g_slc2KBNand, 1
 g_slc2KBNand:
@@ -21240,7 +21464,7 @@ g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -21296,7 +21520,7 @@ g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR218,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
@@ -21338,21 +21562,21 @@ g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR233,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR240,. + 0
+	.set	.LANCHOR243,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -21413,7 +21637,7 @@ gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR229,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
@@ -21447,7 +21671,7 @@ mlcPageToSlcPageTbl:
 	.zero	1024
 	.section	.bss.p_blk_mode_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 8
 p_blk_mode_table:
@@ -21712,7 +21936,7 @@ req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 56
 req_sys:
@@ -24168,14 +24392,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -24210,7 +24434,7 @@ gNandParaInfo:
 	.zero	4
 	.section	.data.gSlcNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -24248,7 +24472,7 @@ power_up_flag:
 	.word	1
 	.section	.data.random_seed,"aw",@progbits
 	.align	3
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -24439,7 +24663,7 @@ refValueDefault:
 .LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC52:
+.LC55:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
 .LC14:
@@ -24468,13 +24692,9 @@ refValueDefault:
 .LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC74:
-	.string	"vpc1"
-.LC75:
-	.string	"vpc2"
-.LC76:
+.LC60:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC77:
+.LC61:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
 .LC45:
@@ -24496,19 +24716,19 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC65:
+.LC70:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC63:
+.LC68:
 	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
-.LC64:
+.LC69:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC67:
-	.string	"FTL version: 5.0.53 20190107"
-.LC68:
+.LC71:
+	.string	"FTL version: 5.0.56 20190508"
+.LC72:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC69:
+.LC73:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
 .LC43:
@@ -24519,14 +24739,14 @@ refValueDefault:
 .LC41:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC56:
+.LC59:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC60:
+.LC65:
 	.string	"RSB refresh addr %x\n"
-.LC61:
+.LC66:
 	.string	"spuer block %x vpn is 0\n "
-.LC62:
+.LC67:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
 .LC49:
@@ -24542,17 +24762,17 @@ refValueDefault:
 .LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC73:
+.LC77:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
 .LC44:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC57:
+.LC62:
 	.string	"Ftlscanalldata = %x\n"
-.LC58:
+.LC63:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC59:
+.LC64:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
 .LC21:
@@ -24569,236 +24789,243 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10005,"a",@progbits
+	.section	.rodata.__func__.10012,"a",@progbits
 	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.10005, %object
-	.size	__func__.10005, 14
-__func__.10005:
+	.set	.LANCHOR221,. + 0
+	.type	__func__.10012, %object
+	.size	__func__.10012, 14
+__func__.10012:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10067,"a",@progbits
 	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 15
-__func__.10060:
+	.set	.LANCHOR222,. + 0
+	.type	__func__.10067, %object
+	.size	__func__.10067, 15
+__func__.10067:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.10071,"a",@progbits
+	.section	.rodata.__func__.10078,"a",@progbits
 	.align	3
-	.set	.LANCHOR248,. + 0
-	.type	__func__.10071, %object
-	.size	__func__.10071, 12
-__func__.10071:
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10078, %object
+	.size	__func__.10078, 12
+__func__.10078:
 	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.10103,"a",@progbits
+	.section	.rodata.__func__.10110,"a",@progbits
 	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.10103, %object
-	.size	__func__.10103, 17
-__func__.10103:
+	.set	.LANCHOR225,. + 0
+	.type	__func__.10110, %object
+	.size	__func__.10110, 17
+__func__.10110:
 	.string	"FtlDumpBlockInfo"
-	.section	.rodata.__func__.10122,"a",@progbits
+	.section	.rodata.__func__.10129,"a",@progbits
 	.align	3
-	.set	.LANCHOR225,. + 0
-	.type	__func__.10122, %object
-	.size	__func__.10122, 16
-__func__.10122:
+	.set	.LANCHOR226,. + 0
+	.type	__func__.10129, %object
+	.size	__func__.10129, 16
+__func__.10129:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10227,"a",@progbits
+	.section	.rodata.__func__.10234,"a",@progbits
 	.align	3
-	.set	.LANCHOR232,. + 0
-	.type	__func__.10227, %object
-	.size	__func__.10227, 16
-__func__.10227:
+	.set	.LANCHOR235,. + 0
+	.type	__func__.10234, %object
+	.size	__func__.10234, 16
+__func__.10234:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10260,"a",@progbits
+	.section	.rodata.__func__.10267,"a",@progbits
 	.align	3
-	.set	.LANCHOR233,. + 0
-	.type	__func__.10260, %object
-	.size	__func__.10260, 22
-__func__.10260:
+	.set	.LANCHOR236,. + 0
+	.type	__func__.10267, %object
+	.size	__func__.10267, 22
+__func__.10267:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10314,"a",@progbits
+	.section	.rodata.__func__.10321,"a",@progbits
 	.align	3
 	.set	.LANCHOR101,. + 0
-	.type	__func__.10314, %object
-	.size	__func__.10314, 16
-__func__.10314:
+	.type	__func__.10321, %object
+	.size	__func__.10321, 16
+__func__.10321:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10334,"a",@progbits
+	.section	.rodata.__func__.10341,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.10334, %object
-	.size	__func__.10334, 18
-__func__.10334:
+	.type	__func__.10341, %object
+	.size	__func__.10341, 18
+__func__.10341:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10411,"a",@progbits
+	.section	.rodata.__func__.10385,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.10411, %object
-	.size	__func__.10411, 25
-__func__.10411:
+	.set	.LANCHOR227,. + 0
+	.type	__func__.10385, %object
+	.size	__func__.10385, 17
+__func__.10385:
+	.string	"ftl_scan_all_ppa"
+	.section	.rodata.__func__.10430,"a",@progbits
+	.align	3
+	.set	.LANCHOR204,. + 0
+	.type	__func__.10430, %object
+	.size	__func__.10430, 25
+__func__.10430:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10425,"a",@progbits
+	.section	.rodata.__func__.10444,"a",@progbits
 	.align	3
-	.set	.LANCHOR219,. + 0
-	.type	__func__.10425, %object
-	.size	__func__.10425, 29
-__func__.10425:
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10444, %object
+	.size	__func__.10444, 29
+__func__.10444:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10431,"a",@progbits
+	.section	.rodata.__func__.10450,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.10431, %object
-	.size	__func__.10431, 19
-__func__.10431:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.10450, %object
+	.size	__func__.10450, 19
+__func__.10450:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10442,"a",@progbits
+	.section	.rodata.__func__.10461,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.10442, %object
-	.size	__func__.10442, 16
-__func__.10442:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.10461, %object
+	.size	__func__.10461, 16
+__func__.10461:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10447,"a",@progbits
+	.section	.rodata.__func__.10466,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.10447, %object
-	.size	__func__.10447, 20
-__func__.10447:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10466, %object
+	.size	__func__.10466, 20
+__func__.10466:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10515,"a",@progbits
+	.section	.rodata.__func__.10534,"a",@progbits
 	.align	3
-	.set	.LANCHOR239,. + 0
-	.type	__func__.10515, %object
-	.size	__func__.10515, 19
-__func__.10515:
+	.set	.LANCHOR242,. + 0
+	.type	__func__.10534, %object
+	.size	__func__.10534, 19
+__func__.10534:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10614,"a",@progbits
+	.section	.rodata.__func__.10634,"a",@progbits
 	.align	3
-	.set	.LANCHOR243,. + 0
-	.type	__func__.10614, %object
-	.size	__func__.10614, 23
-__func__.10614:
+	.set	.LANCHOR246,. + 0
+	.type	__func__.10634, %object
+	.size	__func__.10634, 23
+__func__.10634:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9435,"a",@progbits
+	.section	.rodata.__func__.9441,"a",@progbits
 	.align	3
-	.set	.LANCHOR245,. + 0
-	.type	__func__.9435, %object
-	.size	__func__.9435, 8
-__func__.9435:
+	.set	.LANCHOR248,. + 0
+	.type	__func__.9441, %object
+	.size	__func__.9441, 8
+__func__.9441:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9495,"a",@progbits
+	.section	.rodata.__func__.9502,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.9495, %object
-	.size	__func__.9495, 13
-__func__.9495:
+	.set	.LANCHOR230,. + 0
+	.type	__func__.9502, %object
+	.size	__func__.9502, 13
+__func__.9502:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9521,"a",@progbits
+	.section	.rodata.__func__.9528,"a",@progbits
 	.align	3
-	.set	.LANCHOR247,. + 0
-	.type	__func__.9521, %object
-	.size	__func__.9521, 9
-__func__.9521:
+	.set	.LANCHOR250,. + 0
+	.type	__func__.9528, %object
+	.size	__func__.9528, 9
+__func__.9528:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9604,"a",@progbits
+	.section	.rodata.__func__.9611,"a",@progbits
 	.align	3
 	.set	.LANCHOR124,. + 0
-	.type	__func__.9604, %object
-	.size	__func__.9604, 14
-__func__.9604:
+	.type	__func__.9611, %object
+	.size	__func__.9611, 14
+__func__.9611:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9650,"a",@progbits
+	.section	.rodata.__func__.9657,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9650, %object
-	.size	__func__.9650, 11
-__func__.9650:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9657, %object
+	.size	__func__.9657, 11
+__func__.9657:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9743,"a",@progbits
+	.section	.rodata.__func__.9750,"a",@progbits
 	.align	3
 	.set	.LANCHOR89,. + 0
-	.type	__func__.9743, %object
-	.size	__func__.9743, 17
-__func__.9743:
+	.type	__func__.9750, %object
+	.size	__func__.9750, 17
+__func__.9750:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9747,"a",@progbits
+	.section	.rodata.__func__.9754,"a",@progbits
 	.align	3
 	.set	.LANCHOR86,. + 0
-	.type	__func__.9747, %object
-	.size	__func__.9747, 17
-__func__.9747:
+	.type	__func__.9754, %object
+	.size	__func__.9754, 17
+__func__.9754:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9784,"a",@progbits
+	.section	.rodata.__func__.9791,"a",@progbits
 	.align	3
 	.set	.LANCHOR90,. + 0
-	.type	__func__.9784, %object
-	.size	__func__.9784, 17
-__func__.9784:
+	.type	__func__.9791, %object
+	.size	__func__.9791, 17
+__func__.9791:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9814,"a",@progbits
-	.align	3
-	.set	.LANCHOR94,. + 0
-	.type	__func__.9814, %object
-	.size	__func__.9814, 22
-__func__.9814:
-	.string	"List_update_data_list"
 	.section	.rodata.__func__.9821,"a",@progbits
 	.align	3
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	__func__.9821, %object
-	.size	__func__.9821, 20
+	.size	__func__.9821, 22
 __func__.9821:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.9828,"a",@progbits
+	.align	3
+	.set	.LANCHOR229,. + 0
+	.type	__func__.9828, %object
+	.size	__func__.9828, 20
+__func__.9828:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9852,"a",@progbits
+	.section	.rodata.__func__.9859,"a",@progbits
 	.align	3
 	.set	.LANCHOR95,. + 0
-	.type	__func__.9852, %object
-	.size	__func__.9852, 26
-__func__.9852:
+	.type	__func__.9859, %object
+	.size	__func__.9859, 26
+__func__.9859:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9862,"a",@progbits
+	.section	.rodata.__func__.9869,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9862, %object
-	.size	__func__.9862, 15
-__func__.9862:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9869, %object
+	.size	__func__.9869, 15
+__func__.9869:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9875,"a",@progbits
+	.section	.rodata.__func__.9882,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9875, %object
-	.size	__func__.9875, 31
-__func__.9875:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9882, %object
+	.size	__func__.9882, 31
+__func__.9882:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9888,"a",@progbits
+	.section	.rodata.__func__.9895,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
-	.type	__func__.9888, %object
-	.size	__func__.9888, 16
-__func__.9888:
+	.set	.LANCHOR215,. + 0
+	.type	__func__.9895, %object
+	.size	__func__.9895, 16
+__func__.9895:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9908,"a",@progbits
+	.section	.rodata.__func__.9915,"a",@progbits
 	.align	3
 	.set	.LANCHOR98,. + 0
-	.type	__func__.9908, %object
-	.size	__func__.9908, 22
-__func__.9908:
+	.type	__func__.9915, %object
+	.size	__func__.9915, 22
+__func__.9915:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9924,"a",@progbits
+	.section	.rodata.__func__.9931,"a",@progbits
 	.align	3
-	.set	.LANCHOR226,. + 0
-	.type	__func__.9924, %object
-	.size	__func__.9924, 9
-__func__.9924:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9931, %object
+	.size	__func__.9931, 9
+__func__.9931:
 	.string	"log2phys"
-	.section	.rodata.__func__.9986,"a",@progbits
+	.section	.rodata.__func__.9993,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
-	.type	__func__.9986, %object
-	.size	__func__.9986, 15
-__func__.9986:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9993, %object
+	.size	__func__.9993, 15
+__func__.9993:
 	.string	"FtlVpcTblFlush"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC36:
@@ -24815,9 +25042,9 @@ __func__.9986:
 .LC83:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC71:
+.LC75:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC72:
+.LC76:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
@@ -24825,6 +25052,13 @@ __func__.9986:
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
 .LC39:
 	.string	"page map lost: %x %x\n"
+	.section	.rodata.ftl_scan_all_ppa.str1.1,"aMS",@progbits,1
+.LC52:
+	.string	"ftl_scan_all_ppa blk %x page %x\n"
+.LC53:
+	.string	"addr= %x, status= %d,spare= %x %x %x %x data=%x %x\n"
+.LC54:
+	.string	"%s finished\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
 .LC15:
 	.string	"1 write_idblock fix data %x %x %x\n"
@@ -24833,17 +25067,14 @@ __func__.9986:
 .LC17:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC53:
+.LC56:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC54:
+.LC57:
 	.string	"map_ppn:"
-.LC55:
+.LC58:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC66:
-	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC70:
+.LC74:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
index 2b1d874c9e..c934ade82e 100644
--- a/drivers/rknand/rk_zftl_arm_v7.S
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-11
+ * date: 2019-05-22
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -44,21304 +44,27952 @@ flash_mem_cmp8:
 	mov	r0, r3
 	pop	{r4, r5, pc}
 	.size	flash_mem_cmp8, .-flash_mem_cmp8
-	.section	.text.nand_flash_print_info,"ax",%progbits
-	.align	1
-	.global	nand_flash_print_info
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nand_flash_print_info, %function
-nand_flash_print_info:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	nand_flash_print_info, .-nand_flash_print_info
-	.section	.text.FlashTimingCfg,"ax",%progbits
+	.global	__aeabi_uidiv
+	.global	__aeabi_uidivmod
+	.section	.text.slc_phy_page_address_calc,"ax",%progbits
 	.align	1
-	.global	FlashTimingCfg
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTimingCfg, %function
-FlashTimingCfg:
+	.type	slc_phy_page_address_calc, %function
+slc_phy_page_address_calc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FlashTimingCfg, .-FlashTimingCfg
-	.section	.text.timer_delay_ns,"ax",%progbits
-	.align	1
-	.global	timer_delay_ns
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	timer_delay_ns, %function
-timer_delay_ns:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	lsrs	r0, r0, #4
-	sub	sp, sp, #8
-	str	r0, [sp, #4]
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, .L16
+	ldr	r7, .L16+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L7
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L8
+.L7:
+	ldr	r3, .L16+8
+	mov	r0, r4
+	ldrh	r5, [r3]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	r6, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L9
+	add	r4, r6, r1, lsl #1
+.L8:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
 .L9:
-	ldr	r3, [sp, #4]
-	subs	r2, r3, #1
-	str	r2, [sp, #4]
-	cmp	r3, #0
-	bne	.L9
-	add	sp, sp, #8
-	@ sp needed
-	bx	lr
-	.size	timer_delay_ns, .-timer_delay_ns
-	.section	.text.flash_read_status,"ax",%progbits
-	.align	1
-	.global	flash_read_status
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_read_status, %function
-flash_read_status:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	movs	r3, #112
-	mov	r1, r0
-	str	r3, [r0, #8]
-	movs	r0, #120
-	bl	timer_delay_ns
-	ldr	r0, [r1]
-	uxtb	r0, r0
-	pop	{r3, pc}
-	.size	flash_read_status, .-flash_read_status
-	.section	.text.toshiba_set_rr_para,"ax",%progbits
-	.align	1
-	.global	toshiba_set_rr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	toshiba_set_rr_para, %function
-toshiba_set_rr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	add	r6, r1, r1, lsl #2
-	ldr	r8, .L20+16
-	mov	r5, r0
-	movs	r4, #0
-	ldr	r7, .L20
-.L13:
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L17
-	pop	{r4, r5, r6, r7, r8, pc}
+	ldr	r3, .L16+12
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r6
+	b	.L8
 .L17:
-	movs	r3, #85
-	movs	r0, #200
-	str	r3, [r5, #8]
-	ldrsb	r3, [r4, r7]
-	str	r3, [r5, #4]
-	bl	timer_delay_ns
-	ldr	r3, .L20+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L14
-	adds	r3, r4, r6
-	add	r3, r3, r7
-.L19:
-	ldrsb	r3, [r3, #5]
-.L18:
-	str	r3, [r5]
-	adds	r4, r4, #1
-	b	.L13
-.L14:
-	cmp	r3, #35
-	bne	.L16
-	ldr	r3, .L20+8
-	adds	r2, r4, r6
-	add	r3, r3, r2
-	b	.L19
-.L16:
-	ldr	r3, .L20+12
-	ldrsb	r3, [r3, r1]
-	b	.L18
-.L21:
 	.align	2
-.L20:
+.L16:
 	.word	.LANCHOR0
 	.word	.LANCHOR1
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.word	.LANCHOR4
-	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
-	.section	.text.hynix_set_rr_para,"ax",%progbits
+	.size	slc_phy_page_address_calc, .-slc_phy_page_address_calc
+	.section	.text._list_remove_node,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_set_rr_para, %function
-hynix_set_rr_para:
+	.type	_list_remove_node, %function
+_list_remove_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L25
-	push	{r4, r5, r6, r7, r8, lr}
-	lsls	r7, r0, #8
-	ldr	r2, .L25+4
-	ldr	r3, [r3]
-	ldr	r5, [r2]
-	movs	r2, #54
-	ldrb	r4, [r3, #113]	@ zero_extendqisi2
-	add	r6, r3, #127
-	add	r8, r5, r7
-	str	r2, [r8, #2056]
-	movs	r2, #160
-	muls	r1, r4, r1
-	mla	r1, r2, r0, r1
-	add	r1, r1, r3
-	add	r3, r3, r4
-	adds	r1, r1, #143
-	add	r4, r3, #127
-.L23:
-	cmp	r6, r4
-	bne	.L24
-	add	r5, r5, r7
-	movs	r3, #22
-	str	r3, [r5, #2056]
-	pop	{r4, r5, r6, r7, r8, pc}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	movs	r5, #6
+	ldr	r6, .L26
+	muls	r5, r1, r5
+	movw	r3, #65535
+	mov	r8, r2
+	mov	r10, r0
+	ldr	r7, [r6]
+	ldrh	r1, [r7, r5]
+	adds	r4, r7, r5
+	ldrh	r2, [r4, #2]
+	cmp	r1, r3
+	ldr	r3, [r0]
+	bne	.L19
+	cmp	r2, r1
+	bne	.L19
+	cmp	r4, r3
+	bne	.L18
+.L19:
+	movw	r1, #65535
+	cmp	r2, r1
+	bne	.L21
+	cmp	r4, r3
+	beq	.L21
+	movs	r2, #188
+	ldr	r1, .L26+4
+	ldr	r0, .L26+8
+	bl	printf
+.L21:
+	ldr	r3, [r10]
+	movw	r1, #65535
+	cmp	r4, r3
+	ldrh	r3, [r7, r5]
+	bne	.L22
+	cmp	r3, r1
+	ittee	ne
+	ldrne	r0, [r6]
+	movne	r2, #6
+	moveq	r3, #0
+	streq	r3, [r10]
+	ittt	ne
+	mlane	r3, r2, r3, r0
+	strne	r3, [r10]
+	strhne	r1, [r3, #2]	@ movhi
 .L24:
-	ldrb	r3, [r6, #1]!	@ zero_extendqisi2
-	movs	r0, #120
-	str	r3, [r8, #2052]
-	bl	timer_delay_ns
-	ldrsb	r3, [r1, #1]!
-	str	r3, [r8, #2048]
-	b	.L23
-.L26:
-	.align	2
-.L25:
-	.word	.LANCHOR5
-	.word	.LANCHOR6
-	.size	hynix_set_rr_para, .-hynix_set_rr_para
-	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
-	.align	1
-	.global	hynix_reconfig_rr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	hynix_reconfig_rr_para, %function
-hynix_reconfig_rr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L32
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	movw	r3, #65535
+	strh	r3, [r7, r5]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	ldrh	r3, [r8]
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L27
-	ldr	r5, .L32+4
-	ldr	r3, [r5]
-	add	r3, r3, r0
-	ldrb	r3, [r3, #120]	@ zero_extendqisi2
-	cbz	r3, .L27
-	movs	r1, #0
-	bl	hynix_set_rr_para
-	ldr	r0, [r5]
-	movs	r3, #0
-	add	r0, r0, r4
-	strb	r3, [r0, #120]
+	strh	r3, [r8]	@ movhi
+.L18:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L22:
+	cmp	r3, r1
+	ldrh	r1, [r4, #2]
+	bne	.L25
+	cmp	r1, r3
+	beq	.L24
+	movs	r2, #6
+	ldr	r0, [r6]
+	muls	r1, r2, r1
+	strh	r3, [r0, r1]	@ movhi
+	b	.L24
+.L25:
+	ldr	r0, [r6]
+	movs	r2, #6
+	mla	r6, r2, r3, r0
+	strh	r1, [r6, #2]	@ movhi
+	ldrh	r1, [r4, #2]
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L24
 .L27:
-	pop	{r3, r4, r5, pc}
-.L33:
 	.align	2
-.L32:
-	.word	.LANCHOR1
+.L26:
+	.word	.LANCHOR4
 	.word	.LANCHOR5
-	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
-	.section	.text.nandc_set_ddr_para,"ax",%progbits
+	.word	.LC0
+	.size	_list_remove_node, .-_list_remove_node
+	.section	.text._list_pop_index_node,"ax",%progbits
 	.align	1
-	.global	nandc_set_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_set_ddr_para, %function
-nandc_set_ddr_para:
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L37
-	ldr	r2, .L37+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r2, [r2]
-	cmp	r3, #9
-	lsl	r3, r0, #16
-	lsl	r0, r0, #8
-	orr	r3, r3, r0
-	orr	r3, r3, #3
-	ite	eq
-	streq	r3, [r2, #80]
-	strne	r3, [r2, #304]
-	bx	lr
-.L38:
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r5, [r0]
+	cbz	r5, .L34
+	ldr	r3, .L35
+	movw	r6, #65535
+	movs	r7, #6
+	ldr	r4, [r3]
+.L30:
+	cbnz	r1, .L31
+.L33:
+	subs	r4, r5, r4
+	asrs	r3, r4, #1
+	ldr	r4, .L35+4
+	muls	r4, r3, r4
+	uxth	r1, r4
+	bl	_list_remove_node
+	movw	r3, #65535
+	uxth	r0, r4
+	strh	r3, [r5]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L31:
+	ldrh	r3, [r5]
+	cmp	r3, r6
+	beq	.L33
+	subs	r1, r1, #1
+	mla	r5, r7, r3, r4
+	uxth	r1, r1
+	b	.L30
+.L34:
+	movw	r0, #65535
+	pop	{r3, r4, r5, r6, r7, pc}
+.L36:
 	.align	2
-.L37:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
-	.section	.text.nandc_get_ddr_para,"ax",%progbits
+.L35:
+	.word	.LANCHOR4
+	.word	-1431655765
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._insert_free_list,"ax",%progbits
 	.align	1
-	.global	nandc_get_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_get_ddr_para, %function
-nandc_get_ddr_para:
-	@ args = 0, pretend = 0, frame = 0
+	.type	_insert_free_list, %function
+_insert_free_list:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L43
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	ldr	r3, .L43+4
-	ldr	r3, [r3]
-	ite	eq
-	ldreq	r0, [r3, #80]
-	ldrne	r0, [r3, #304]
-	ubfx	r0, r0, #8, #8
-	bx	lr
+	ldr	r3, .L45
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L37
+	ldrh	r3, [r2]
+	movw	r10, #65535
+	ldr	r7, [r0]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	movs	r2, #6
+	ldr	r3, .L45+4
+	mul	lr, r2, r1
+	ldr	r5, [r3]
+	add	r6, r5, lr
+	strh	r10, [r6, #2]	@ movhi
+	strh	r10, [r5, lr]	@ movhi
+	cbnz	r7, .L39
 .L44:
-	.align	2
+	str	r6, [r0]
+	b	.L37
+.L39:
+	ldr	r3, .L45+8
+	str	r2, [sp, #4]
+	ldr	ip, [r3]
+	ldr	r3, .L45+12
+	ldrh	r4, [ip, r1, lsl #2]
+	ldrh	r8, [r3]
+	ldr	r3, [ip, r1, lsl #2]
+	ubfx	r4, r4, #0, #11
+	ubfx	r3, r3, #11, #8
+	smulbb	r3, r3, r8
+	add	r3, r3, r4
+	uxth	r3, r3
+	str	r3, [sp]
+	subs	r3, r7, r5
+	asrs	r4, r3, #1
+	ldr	r3, .L45+16
+	muls	r3, r4, r3
+	mov	r4, r7
+	uxth	r3, r3
+.L42:
+	ldr	r2, [ip, r3, lsl #2]
+	ldrh	fp, [ip, r3, lsl #2]
+	ubfx	r2, r2, #11, #8
+	smulbb	r2, r2, r8
+	ubfx	fp, fp, #0, #11
+	add	r2, r2, fp
+	uxth	fp, r2
+	ldr	r2, [sp]
+	cmp	r2, fp
+	bls	.L40
+	ldrh	r2, [r4]
+	cmp	r2, r10
+	bne	.L41
+	strh	r3, [r6, #2]	@ movhi
+	strh	r1, [r4]	@ movhi
+.L37:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L41:
+	ldr	r3, [sp, #4]
+	mla	r4, r3, r2, r5
+	mov	r3, r2
+	b	.L42
+.L40:
+	ldrh	r2, [r4, #2]
+	cmp	r7, r4
+	strh	r2, [r6, #2]	@ movhi
+	strh	r3, [r5, lr]	@ movhi
+	bne	.L43
+	strh	r1, [r7, #2]	@ movhi
+	b	.L44
 .L43:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
-	.section	.text.nandc_set_if_mode,"ax",%progbits
-	.align	1
-	.global	nandc_set_if_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nandc_set_if_mode, %function
-nandc_set_if_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L53
-	ands	r1, r0, #6
-	ldr	r3, [r3]
-	ldr	r2, [r3]
-	beq	.L46
-	lsls	r1, r0, #29
-	ldr	r1, .L53+4
-	orr	r2, r2, #24576
-	bfc	r2, #15, #1
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	orr	r2, r2, #196608
-	it	mi
-	orrmi	r2, r2, #32768
-	cmp	r1, #9
-	ldr	r1, .L53+8
-	bne	.L48
-	movw	r0, #8321
-	str	r0, [r3, #8]
-	str	r1, [r3, #80]
-	movs	r1, #38
-	str	r1, [r3, #84]
-	movs	r1, #39
-	str	r1, [r3, #84]
-.L49:
-	str	r2, [r3]
-	bx	lr
-.L48:
-	movw	r0, #8322
-	str	r0, [r3, #344]
-	str	r1, [r3, #304]
-	movs	r1, #38
-	str	r1, [r3, #308]
-	movs	r1, #39
-	str	r1, [r3, #308]
-	b	.L49
+	ldrh	r2, [r4, #2]
+	movs	r3, #6
+	muls	r3, r2, r3
+	strh	r1, [r5, r3]	@ movhi
+	strh	r1, [r4, #2]	@ movhi
+	b	.L37
 .L46:
-	bfi	r2, r1, #13, #1
-	b	.L49
-.L54:
 	.align	2
-.L53:
+.L45:
 	.word	.LANCHOR6
+	.word	.LANCHOR4
 	.word	.LANCHOR7
-	.word	1052675
-	.size	nandc_set_if_mode, .-nandc_set_if_mode
-	.section	.text.nandc_cs,"ax",%progbits
+	.word	.LANCHOR8
+	.word	-1431655765
+	.size	_insert_free_list, .-_insert_free_list
+	.section	.text._insert_data_list,"ax",%progbits
 	.align	1
-	.global	nandc_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_cs, %function
-nandc_cs:
-	@ args = 0, pretend = 0, frame = 0
+	.type	_insert_data_list, %function
+_insert_data_list:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L56
-	movs	r2, #1
-	lsl	r0, r2, r0
-	ldr	r1, [r3]
-	ldr	r3, [r1]
-	bfi	r3, r0, #0, #8
-	str	r3, [r1]
-	bx	lr
+	ldr	r3, .L67
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	lr, r0
+	sub	sp, sp, #32
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L47
+	ldrh	r3, [r2]
+	ldr	r0, [r0]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L67+4
+	ldr	r6, [r3]
+	movs	r3, #6
+	muls	r3, r1, r3
+	str	r3, [sp, #8]
+	adds	r7, r6, r3
+	ldr	r2, [sp, #8]
+	movw	r3, #65535
+	strh	r3, [r7, #2]	@ movhi
+	strh	r3, [r6, r2]	@ movhi
+	cbnz	r0, .L50
+.L66:
+	str	r7, [lr]
+	b	.L47
+.L50:
+	ldr	r3, .L67+8
+	ldrh	r5, [r7, #4]
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r1, lsl #1]
+	muls	r4, r5, r4
+	str	r3, [sp, #12]
+	ldr	r3, .L67+12
+	str	r4, [sp, #4]
+	ldr	ip, [r3]
+	ldr	r3, [ip, r1, lsl #2]
+	ubfx	r2, r3, #11, #8
+	ldr	r3, .L67+16
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldrh	r3, [ip, r1, lsl #2]
+	ubfx	r3, r3, #0, #11
+	beq	.L51
+	ldrh	r4, [sp, #16]
+	smulbb	r2, r2, r4
+	add	r3, r3, r2
+	ldr	r2, [sp, #4]
+	uxtah	r3, r2, r3
+	str	r3, [sp, #4]
+.L51:
+	ldr	r3, [sp, #4]
+	cmp	r5, #0
+	it	eq
+	moveq	r3, #-1
+	mov	r5, r0
+	mov	r8, #0
+	str	r3, [sp, #4]
+	subs	r3, r0, r6
+	asrs	r2, r3, #1
+	ldr	r3, .L67+20
+	muls	r3, r2, r3
+	ldr	r2, .L67
+	ldrh	r2, [r2]
+	uxth	r3, r3
+	str	r2, [sp, #20]
+.L58:
+	add	r2, r8, #1
+	uxth	r8, r2
+	ldr	r2, [sp, #20]
+	cmp	r8, r2
+	bhi	.L47
+	cmp	r1, r3
+	beq	.L47
+	ldr	r2, [sp, #12]
+	ldrh	fp, [r5, #4]
+	ldrh	r10, [r2, r3, lsl #1]
+	ldr	r2, [ip, r3, lsl #2]
+	mov	r4, fp
+	ubfx	r2, r2, #11, #8
+	str	r2, [sp, #24]
+	ldrh	r2, [ip, r3, lsl #2]
+	ubfx	r2, r2, #0, #11
+	str	r2, [sp, #28]
+	mov	r2, r10
+	muls	r2, r4, r2
+	mov	r10, r2
+	beq	.L54
+	cmp	fp, #0
+	beq	.L62
+	ldrh	r2, [sp, #24]
+	ldrh	r4, [sp, #16]
+	smulbb	fp, r2, r4
+	ldr	r2, [sp, #28]
+	add	fp, fp, r2
+	uxtah	r10, r10, fp
+.L55:
+	ldr	r2, [sp, #4]
+	cmp	r2, r10
+	bcc	.L56
+.L60:
+	ldrh	r2, [r5]
+	movw	r4, #65535
+	cmp	r2, r4
+	bne	.L57
+	strh	r3, [r7, #2]	@ movhi
+	strh	r1, [r5]	@ movhi
+.L47:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L57:
-	.align	2
+	movs	r3, #6
+	mla	r5, r3, r2, r6
+	mov	r3, r2
+	b	.L58
 .L56:
+	ldrh	r2, [r5, #2]
+	cmp	r0, r5
+	strh	r2, [r7, #2]	@ movhi
+	ldr	r2, [sp, #8]
+	strh	r3, [r6, r2]	@ movhi
+	bne	.L59
+	strh	r1, [r0, #2]	@ movhi
+	b	.L66
+.L59:
+	ldrh	r2, [r5, #2]
+	movs	r3, #6
+	muls	r3, r2, r3
+	strh	r1, [r6, r3]	@ movhi
+	strh	r1, [r5, #2]	@ movhi
+	b	.L47
+.L54:
+	cmp	fp, #0
+	bne	.L60
+.L62:
+	mov	r10, #-1
+	b	.L55
+.L68:
+	.align	2
+.L67:
 	.word	.LANCHOR6
-	.size	nandc_cs, .-nandc_cs
-	.section	.text.nandc_de_cs,"ax",%progbits
+	.word	.LANCHOR4
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	-1431655765
+	.size	_insert_data_list, .-_insert_data_list
+	.section	.text._list_get_gc_head_node.isra.2,"ax",%progbits
 	.align	1
-	.global	nandc_de_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_de_cs, %function
-nandc_de_cs:
+	.type	_list_get_gc_head_node.isra.2, %function
+_list_get_gc_head_node.isra.2:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L59
-	ldr	r2, [r3]
-	ldr	r3, [r2]
-	bfc	r3, #0, #8
-	bfc	r3, #17, #1
-	str	r3, [r2]
-	bx	lr
-.L60:
+	push	{r4, lr}
+	cbz	r0, .L74
+	ldr	r3, .L76
+	movw	r2, #65535
+	movs	r4, #6
+	ldr	r3, [r3]
+.L71:
+	cbz	r1, .L72
+	ldrh	r0, [r0]
+	cmp	r0, r2
+	bne	.L73
+	pop	{r4, pc}
+.L73:
+	subs	r1, r1, #1
+	mla	r0, r4, r0, r3
+	uxth	r1, r1
+	b	.L71
+.L74:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L72:
+	subs	r0, r0, r3
+	asrs	r3, r0, #1
+	ldr	r0, .L76+4
+	muls	r0, r3, r0
+	uxth	r0, r0
+	pop	{r4, pc}
+.L77:
 	.align	2
-.L59:
-	.word	.LANCHOR6
-	.size	nandc_de_cs, .-nandc_de_cs
-	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
+.L76:
+	.word	.LANCHOR4
+	.word	-1431655765
+	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
+	.section	.text._list_update_data_list,"ax",%progbits
 	.align	1
-	.global	flash_wait_device_ready_raw
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_wait_device_ready_raw, %function
-flash_wait_device_ready_raw:
+	.type	_list_update_data_list, %function
+_list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r1
-	ldr	r3, .L70
-	mov	r7, r2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L62
-	mov	r2, #604
-	ldr	r1, .L70+4
-	ldr	r0, .L70+8
+	ldr	r3, .L88
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r2
+	mov	r7, r0
+	mov	r4, r1
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #16]
+	cmp	r2, r1
+	beq	.L78
+	ldrh	r2, [r3, #48]
+	cmp	r2, r1
+	beq	.L78
+	ldrh	r3, [r3, #80]
+	cmp	r3, r1
+	beq	.L78
+	ldr	r3, .L88+4
+	movs	r5, #6
+	muls	r5, r1, r5
+	ldr	r2, [r0]
+	ldr	fp, [r3]
+	mov	r8, r3
+	add	r10, fp, r5
+	cmp	r10, r2
+	beq	.L78
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L82
+	ldrh	r2, [fp, r5]
+	cmp	r2, r3
+	bne	.L82
+	movs	r2, #255
+	ldr	r1, .L88+8
+	ldr	r0, .L88+12
 	bl	printf
-.L63:
-	b	.L63
-.L62:
-	ldr	r3, .L70+12
-	ldrb	r6, [r3, r0]	@ zero_extendqisi2
-	ldr	r3, .L70+16
-	mov	r0, r6
-	ldr	r4, [r3]
-	bl	nandc_cs
-	uxtb	r3, r5
-	movs	r0, #120
-	add	r4, r4, r6, lsl #8
-	str	r0, [r4, #2056]
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
-	lsrs	r5, r5, #16
-	str	r3, [r4, #2052]
-	str	r5, [r4, #2052]
-.L69:
-	bl	timer_delay_ns
-	ldr	r1, [r4, #2048]
-	uxtb	r1, r1
-	bics	r3, r7, r1
-	bne	.L65
-	cmp	r1, #255
-	beq	.L65
-	mov	r0, r6
-	bl	nandc_de_cs
-	mov	r0, r1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L65:
-	movs	r0, #20
-	b	.L69
-.L71:
-	.align	2
-.L70:
-	.word	.LANCHOR8
-	.word	.LANCHOR9
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
-	.global	__aeabi_uidiv
-	.global	__aeabi_uidivmod
-	.section	.text.flash_wait_device_ready,"ax",%progbits
-	.align	1
-	.global	flash_wait_device_ready
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_wait_device_ready, %function
-flash_wait_device_ready:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	tst	r0, #50331648
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r10, r1
-	ubfx	r4, r0, #0, #21
-	ubfx	r8, r0, #21, #3
-	bne	.L73
-	ldr	r3, .L82
-	ldr	r6, .L82+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L74
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L73
-.L74:
-	ldr	r3, .L82+8
-	mov	r0, r4
-	ldrh	r5, [r3]
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	mov	r1, r5
-	mul	r7, r5, r0
-	mov	r0, r4
-	bl	__aeabi_uidivmod
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cbz	r3, .L75
-	add	r4, r7, r1, lsl #1
-.L73:
-	mov	r2, r10
-	mov	r1, r4
-	mov	r0, r8
-	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	b	flash_wait_device_ready_raw
-.L75:
-	ldr	r3, .L82+12
-	ldrh	r4, [r3, r1, lsl #1]
-	add	r4, r4, r7
-	b	.L73
-.L83:
-	.align	2
 .L82:
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.size	flash_wait_device_ready, .-flash_wait_device_ready
-	.section	.text.nandc_wait_flash_ready,"ax",%progbits
-	.align	1
-	.global	nandc_wait_flash_ready
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nandc_wait_flash_ready, %function
-nandc_wait_flash_ready:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, lr}
-	ldr	r1, .L89
-	ldr	r4, .L89+4
-.L86:
-	movs	r0, #100
-	bl	timer_delay_ns
-	ldr	r3, [r4]
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #22
-	bmi	.L87
-	subs	r1, r1, #1
-	bne	.L86
-	mov	r0, #-1
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L83
+	ldrh	r2, [fp, r5]
+	cmp	r2, r3
+	beq	.L78
+.L83:
+	ldr	r2, .L88+16
+	ldr	r0, [r2]
+	ldrh	r2, [r10, #4]
+	ldrh	r1, [r0, r4, lsl #1]
+	cbz	r2, .L86
+	muls	r2, r1, r2
 .L84:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, pc}
-.L87:
-	movs	r0, #0
+	movs	r1, #6
+	muls	r1, r3, r1
+	ldr	r3, .L88+20
+	asrs	r5, r1, #1
+	muls	r3, r5, r3
+	ldrh	r5, [r0, r3, lsl #1]
+	ldr	r0, [r8]
+	add	r1, r1, r0
+	ldrh	r3, [r1, #4]
+	cbz	r3, .L87
+	muls	r3, r5, r3
+.L85:
+	cmp	r2, r3
+	bcs	.L78
+	mov	r2, r6
+	mov	r1, r4
+	mov	r0, r7
+	bl	_list_remove_node
+	mov	r2, r6
+	mov	r1, r4
+	mov	r0, r7
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	_insert_data_list
+.L86:
+	mov	r2, #-1
 	b	.L84
-.L90:
-	.align	2
+.L87:
+	mov	r3, #-1
+	b	.L85
+.L78:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L89:
-	.word	100000
-	.word	.LANCHOR6
-	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
-	.section	.text.sandisk_set_rr_para,"ax",%progbits
-	.align	1
-	.global	sandisk_set_rr_para
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sandisk_set_rr_para, %function
-sandisk_set_rr_para:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #239
-	str	r3, [r0, #8]
-	movs	r3, #17
-	mov	r4, r0
-	str	r3, [r0, #4]
-	movs	r0, #200
-	bl	timer_delay_ns
-	ldr	r3, .L97
-	add	r1, r1, r1, lsl #2
-	ldr	r6, .L97+4
-	movs	r2, #0
-	ldr	r7, .L97+8
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L97+12
-	ldrb	r5, [r3]	@ zero_extendqisi2
-.L92:
-	cmp	r2, r0
-	bcc	.L95
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	nandc_wait_flash_ready
-.L95:
-	adds	r3, r2, r1
-	cmp	r5, #67
-	ite	eq
-	addeq	r3, r3, r7
-	addne	r3, r3, r6
-	ldrsb	r3, [r3, #5]
-	adds	r2, r2, #1
-	str	r3, [r4]
-	b	.L92
-.L98:
 	.align	2
-.L97:
+.L88:
+	.word	.LANCHOR10
 	.word	.LANCHOR4
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LANCHOR1
-	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
-	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",%progbits
+	.word	.LANCHOR11
+	.word	.LC0
+	.word	.LANCHOR9
+	.word	-1431655765
+	.size	_list_update_data_list, .-_list_update_data_list
+	.section	.text.zftl_get_gc_node.part.9,"ax",%progbits
 	.align	1
-	.global	toshiba_3d_set_tlc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_3d_set_tlc_rr_para, %function
-toshiba_3d_set_tlc_rr_para:
+	.type	zftl_get_gc_node.part.9, %function
+zftl_get_gc_node.part.9:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r6, #0
-	movs	r7, #213
-	mvn	r3, #118
-	adds	r1, r1, #1
-	mov	r4, r0
-	str	r7, [r0, #8]
-	rsb	r1, r1, r1, lsl #3
-	str	r6, [r0, #4]
-	str	r3, [r0, #4]
-	ldr	r3, .L100
-	adds	r5, r3, r1
-	ldrsb	r3, [r3, r1]
-	str	r3, [r0]
-	ldrsb	r3, [r5, #1]
-	str	r3, [r0]
-	ldrsb	r3, [r5, #2]
-	str	r3, [r0]
-	ldrsb	r3, [r5, #3]
-	str	r3, [r0]
-	bl	nandc_wait_flash_ready
-	mvn	r3, #117
-	str	r7, [r4, #8]
-	str	r6, [r4, #4]
-	str	r3, [r4, #4]
-	ldrsb	r3, [r5, #4]
-	str	r3, [r4]
-	ldrsb	r3, [r5, #5]
-	str	r3, [r4]
-	ldrsb	r3, [r5, #6]
-	str	r3, [r4]
-	str	r6, [r4]
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	nandc_wait_flash_ready
-.L101:
+	@ link register save eliminated.
+	ldr	r3, .L91
+	mov	r1, r0
+	ldr	r0, [r3]
+	b	_list_get_gc_head_node.isra.2
+.L92:
 	.align	2
-.L100:
-	.word	.LANCHOR15
-	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
-	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
+.L91:
+	.word	.LANCHOR12
+	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
+	.section	.text.nandc_de_cs.constprop.29,"ax",%progbits
 	.align	1
-	.global	toshiba_3d_set_slc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_3d_set_slc_rr_para, %function
-toshiba_3d_set_slc_rr_para:
+	.type	nandc_de_cs.constprop.29, %function
+nandc_de_cs.constprop.29:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	movs	r3, #213
-	mvn	r2, #116
-	str	r3, [r0, #8]
-	movs	r3, #0
-	str	r3, [r0, #4]
-	str	r2, [r0, #4]
-	ldr	r2, .L103
-	add	r1, r1, r2
-	ldrsb	r2, [r1, #1]
-	str	r2, [r0]
-	str	r3, [r0]
-	str	r3, [r0]
-	str	r3, [r0]
-	b	nandc_wait_flash_ready
-.L104:
+	ldr	r3, .L94
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2]
+	bx	lr
+.L95:
 	.align	2
-.L103:
-	.word	.LANCHOR16
-	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
-	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
+.L94:
+	.word	.LANCHOR13
+	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
+	.section	.text.nand_flash_print_info,"ax",%progbits
 	.align	1
-	.global	toshiba_tlc_set_rr_para
+	.global	nand_flash_print_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_tlc_set_rr_para, %function
-toshiba_tlc_set_rr_para:
+	.type	nand_flash_print_info, %function
+nand_flash_print_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r6, #239
-	mov	r4, r0
-	str	r6, [r0, #8]
-	cbz	r2, .L106
-	movs	r3, #18
-	rsb	r1, r1, r1, lsl #3
-	str	r3, [r0, #4]
-	ldr	r3, .L108
-	adds	r5, r3, r1
-	ldrb	r3, [r3, r1]	@ zero_extendqisi2
-	str	r3, [r0]
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	str	r3, [r0]
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	str	r3, [r0]
-	ldrb	r3, [r5, #3]	@ zero_extendqisi2
-	str	r3, [r0]
-	bl	nandc_wait_flash_ready
-	movs	r3, #19
-	str	r6, [r4, #8]
-	str	r3, [r4, #4]
-	ldrb	r3, [r5, #4]	@ zero_extendqisi2
-	str	r3, [r4]
-	ldrb	r3, [r5, #5]	@ zero_extendqisi2
-	str	r3, [r4]
-	ldrb	r3, [r5, #6]	@ zero_extendqisi2
-	str	r3, [r4]
-	movs	r3, #0
-	str	r3, [r4]
-.L107:
-	pop	{r4, r5, r6, lr}
-	b	nandc_wait_flash_ready
+	push	{r4, r5, lr}
+	sub	sp, sp, #20
+	ldr	r4, .L218
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L97
+	ldr	r1, .L218+4
+	ldr	r0, .L218+8
+	bl	printf
+.L97:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L98
+	ldr	r3, .L218+12
+	ldr	r0, [r3]
+	ldrb	r5, [r0, #6]	@ zero_extendqisi2
+	ldrb	r3, [r0, #3]	@ zero_extendqisi2
+	ldrb	r2, [r0, #2]	@ zero_extendqisi2
+	ldrb	r1, [r0, #1]	@ zero_extendqisi2
+	str	r5, [sp, #8]
+	ldrb	r5, [r0, #5]	@ zero_extendqisi2
+	str	r5, [sp, #4]
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r0, .L218+16
+	bl	printf
+.L98:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L99
+	ldr	r3, .L218+12
+	ldr	r0, .L218+20
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #8]	@ zero_extendqisi2
+	bl	printf
+.L99:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L100
+	ldr	r3, .L218+12
+	ldr	r0, .L218+24
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	bl	printf
+.L100:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L101
+	ldr	r3, .L218+12
+	ldr	r0, .L218+28
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #10]
+	bl	printf
+.L101:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L102
+	ldr	r3, .L218+12
+	ldr	r0, .L218+32
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	bl	printf
+.L102:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L103
+	ldr	r3, .L218+12
+	ldr	r0, .L218+36
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #13]	@ zero_extendqisi2
+	bl	printf
+.L103:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L104
+	ldr	r3, .L218+12
+	ldr	r0, .L218+40
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #14]
+	bl	printf
+.L104:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L105
+	ldr	r3, .L218+12
+	ldr	r0, .L218+44
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #23]	@ zero_extendqisi2
+	bl	printf
+.L105:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L106
+	ldr	r3, .L218+12
+	ldr	r0, .L218+48
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #18]	@ zero_extendqisi2
+	bl	printf
 .L106:
-	movs	r3, #20
-	str	r3, [r0, #4]
-	ldr	r3, .L108+4
-	ldrb	r3, [r3, r1]	@ zero_extendqisi2
-	str	r3, [r0]
-	str	r2, [r0]
-	str	r2, [r0]
-	str	r2, [r0]
-	b	.L107
-.L109:
-	.align	2
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L107
+	ldr	r3, .L218+12
+	ldr	r0, .L218+52
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #19]	@ zero_extendqisi2
+	bl	printf
+.L107:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L108
+	ldr	r3, .L218+12
+	ldr	r0, .L218+56
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #20]	@ zero_extendqisi2
+	bl	printf
 .L108:
-	.word	.LANCHOR17
-	.word	.LANCHOR18
-	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
-	.section	.text.flash_enter_slc_mode,"ax",%progbits
-	.align	1
-	.global	flash_enter_slc_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L122
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L110
-	ldr	r3, .L122+4
-	cmp	r2, #1
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L109
+	ldr	r3, .L218+60
+	ldr	r0, .L218+64
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+.L109:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L110
+	ldr	r3, .L218+68
+	ldr	r0, .L218+72
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+.L110:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L111
+	ldr	r3, .L218+12
+	ldr	r0, .L218+76
 	ldr	r3, [r3]
-	bne	.L112
-	ldr	r2, .L122+8
-	ldrb	r2, [r2, #29]	@ zero_extendqisi2
-	cbz	r2, .L110
-	add	r0, r3, r0, lsl #8
-	str	r2, [r0, #2056]
-	bx	lr
+	ldrb	r1, [r3, #22]	@ zero_extendqisi2
+	bl	printf
+.L111:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L112
+	ldr	r3, .L218+80
+	ldr	r0, .L218+84
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
 .L112:
-	cmp	r2, #2
-	bne	.L110
-	ldr	r1, .L122+12
-	ldrb	r2, [r1]	@ zero_extendqisi2
-	cbz	r2, .L110
-	add	r0, r3, r0, lsl #8
-	movs	r3, #239
-	movs	r2, #0
-	str	r3, [r0, #2056]
-	movs	r3, #145
-	str	r3, [r0, #2052]
-	movs	r3, #1
-	str	r2, [r0, #2048]
-	str	r3, [r0, #2048]
-	str	r2, [r0, #2048]
-	str	r2, [r0, #2048]
-	strb	r2, [r1]
-	b	nandc_wait_flash_ready
-.L110:
-	bx	lr
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L113
+	ldr	r3, .L218+12
+	ldr	r0, .L218+88
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #16]	@ zero_extendqisi2
+	and	r1, r1, #1
+	bl	printf
+.L113:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L114
+	ldr	r3, .L218+12
+	ldr	r0, .L218+92
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #1, #1
+	bl	printf
+.L114:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L115
+	ldr	r3, .L218+12
+	ldr	r0, .L218+96
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #2, #1
+	bl	printf
+.L115:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L116
+	ldr	r3, .L218+12
+	ldr	r0, .L218+100
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #3, #1
+	bl	printf
+.L116:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L117
+	ldr	r3, .L218+12
+	ldr	r0, .L218+104
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #4, #1
+	bl	printf
+.L117:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L118
+	ldr	r3, .L218+12
+	ldr	r0, .L218+108
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #5, #1
+	bl	printf
+.L118:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L119
+	ldr	r3, .L218+12
+	ldr	r0, .L218+112
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #6, #1
+	bl	printf
+.L119:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L120
+	ldr	r3, .L218+12
+	ldr	r0, .L218+116
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #7, #1
+	bl	printf
+.L120:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L121
+	ldr	r3, .L218+12
+	ldr	r0, .L218+120
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #8, #1
+	bl	printf
+.L121:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L122
+	ldr	r3, .L218+12
+	ldr	r0, .L218+124
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #9, #1
+	bl	printf
+.L122:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L123
+	ldr	r3, .L218+12
+	ldr	r0, .L218+128
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #16]
+	ubfx	r1, r1, #10, #1
+	bl	printf
 .L123:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L124
+	ldr	r3, .L218+132
+	ldr	r0, .L218+136
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L218+68
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+.L124:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L125
+	ldr	r3, .L218+140
+	ldr	r0, .L218+144
+	ldrb	r2, [r3, #11]	@ zero_extendqisi2
+	ldrb	r1, [r3, #10]	@ zero_extendqisi2
+	bl	printf
+.L125:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L126
+	ldr	r3, .L218+140
+	ldr	r0, .L218+148
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	b	.L219
+.L220:
 	.align	2
-.L122:
-	.word	.LANCHOR11
-	.word	.LANCHOR6
+.L218:
+	.word	.LANCHOR14
+	.word	.LANCHOR15
+	.word	.LC1
+	.word	.LANCHOR16
+	.word	.LC2
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC12
+	.word	.LANCHOR17
+	.word	.LC13
+	.word	.LANCHOR0
+	.word	.LC14
+	.word	.LC15
+	.word	.LANCHOR18
+	.word	.LC16
+	.word	.LC17
+	.word	.LC18
+	.word	.LC19
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
 	.word	.LANCHOR19
+	.word	.LC28
 	.word	.LANCHOR20
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.word	.LC29
+	.word	.LC30
+.L219:
+	ldrb	r1, [r3, #8]	@ zero_extendqisi2
+	bl	printf
+.L126:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L96
+	ldr	r3, .L221
+	ldr	r0, .L221+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, lr}
+	b	printf
+.L96:
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, pc}
+.L222:
+	.align	2
+.L221:
+	.word	.LANCHOR21
+	.word	.LC31
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.timer_delay_ns,"ax",%progbits
 	.align	1
-	.global	flash_exit_slc_mode
+	.global	timer_delay_ns
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L136
-	push	{r4}
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L124
-	ldr	r3, .L136+4
-	cmp	r2, #1
-	ldr	r3, [r3]
-	bne	.L126
-	ldr	r2, .L136+8
-	ldrb	r2, [r2, #30]	@ zero_extendqisi2
-	cbz	r2, .L124
-	add	r0, r3, r0, lsl #8
-	str	r2, [r0, #2056]
-.L124:
-	pop	{r4}
+	lsrs	r0, r0, #4
+	sub	sp, sp, #8
+	str	r0, [sp, #4]
+.L224:
+	ldr	r3, [sp, #4]
+	subs	r2, r3, #1
+	str	r2, [sp, #4]
+	cmp	r3, #0
+	bne	.L224
+	add	sp, sp, #8
+	@ sp needed
 	bx	lr
-.L126:
-	cmp	r2, #2
-	bne	.L124
-	ldr	r4, .L136+12
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	cmp	r1, #0
-	bne	.L124
-	ldr	r2, .L136+8
-	add	r0, r3, r0, lsl #8
-	movs	r3, #239
-	str	r3, [r0, #2056]
-	movs	r3, #145
-	ldrb	r2, [r2, #12]	@ zero_extendqisi2
-	str	r3, [r0, #2052]
-	movs	r3, #1
-	cmp	r2, #2
-	it	ne
-	movne	r2, #4
-	str	r2, [r0, #2048]
-	strb	r2, [r4]
-	str	r3, [r0, #2048]
-	pop	{r4}
-	str	r1, [r0, #2048]
-	str	r1, [r0, #2048]
-	b	nandc_wait_flash_ready
-.L137:
-	.align	2
-.L136:
-	.word	.LANCHOR11
-	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
-	.section	.text.flash_erase_duplane_block,"ax",%progbits
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",%progbits
 	.align	1
-	.global	flash_erase_duplane_block
+	.global	flash_read_status
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_duplane_block, %function
-flash_erase_duplane_block:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_read_status, %function
+flash_read_status:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r1
-	ldr	r1, .L154
-	mov	r7, r2
-	mov	r6, r3
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, r0
-	bhi	.L139
-	movw	r2, #517
-	ldr	r1, .L154+4
-	ldr	r0, .L154+8
-	bl	printf
-.L140:
-	b	.L140
-.L139:
-	ldr	r1, .L154+12
-	ldrb	r4, [r1, r0]	@ zero_extendqisi2
-	ldr	r1, .L154+16
-	add	r8, r4, #8
-	ldr	r5, [r1]
-	ldr	r1, .L154+20
-	ldr	r1, [r1]
-	add	r8, r5, r8, lsl #8
-	lsls	r1, r1, #27
-	bpl	.L141
-	mov	r1, r4
-	ldr	r0, .L154+24
-	bl	printf
-.L141:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
-	bl	nandc_cs
-	mov	r0, r4
-	cmp	fp, #0
-	bne	.L142
-	bl	flash_enter_slc_mode
-.L143:
-	lsls	r2, r4, #8
-	movs	r1, #96
-	adds	r3, r5, r2
-	str	r1, [r3, #2056]
-	uxtb	r1, r7
-	str	r1, [r3, #2052]
-	lsrs	r1, r7, #8
-	str	r1, [r3, #2052]
-	lsrs	r1, r7, #16
-	str	r1, [r3, #2052]
-	ldr	r1, .L154+28
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #0
-	bne	.L147
-	movs	r1, #208
-	str	r2, [sp, #4]
-	str	r1, [r3, #2056]
-	str	r3, [sp]
-	bl	nandc_wait_flash_ready
-	mov	r0, r8
-	bl	flash_read_status
-	ldr	r3, [sp]
-	and	r10, r0, #5
-	ldr	r2, [sp, #4]
-.L144:
-	add	r5, r5, r2
-	movs	r2, #96
-	str	r2, [r5, #2056]
-	uxtb	r2, r6
-	str	r2, [r3, #2052]
-	lsrs	r2, r6, #8
-	lsrs	r6, r6, #16
-	str	r2, [r3, #2052]
-	str	r6, [r3, #2052]
-	movs	r3, #208
-	str	r3, [r5, #2056]
-	bl	nandc_wait_flash_ready
-	mov	r0, r8
-	bl	flash_read_status
-	mov	r5, r0
-	cmp	fp, #0
-	bne	.L145
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L145:
-	mov	r0, r4
-	bl	nandc_de_cs
-	and	r0, r5, #5
-	orrs	r10, r0, r10
-	beq	.L146
-	mov	r2, r5
-	mov	r1, r7
-	ldr	r0, .L154+32
-	bl	printf
-.L146:
-	mov	r0, r10
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L142:
-	bl	flash_exit_slc_mode
-	b	.L143
-.L147:
-	mov	r10, #0
-	b	.L144
-.L155:
-	.align	2
-.L154:
-	.word	.LANCHOR8
-	.word	.LANCHOR21
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR22
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LC2
-	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
-	.section	.text.flash_erase_block_en,"ax",%progbits
+	push	{r3, lr}
+	movs	r3, #112
+	mov	r1, r0
+	str	r3, [r0, #8]
+	movs	r0, #120
+	bl	timer_delay_ns
+	ldr	r0, [r1]
+	uxtb	r0, r0
+	pop	{r3, pc}
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_erase_block_en
+	.global	toshiba_set_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_block_en, %function
-flash_erase_block_en:
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L170
 	push	{r4, r5, r6, r7, r8, lr}
-	mov	r8, r1
-	mov	r6, r2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L157
-	movw	r2, #561
-	ldr	r1, .L170+4
-	ldr	r0, .L170+8
-	bl	printf
-.L158:
-	b	.L158
-.L157:
-	ldr	r3, .L170+12
-	ldrb	r4, [r3, r0]	@ zero_extendqisi2
-	ldr	r3, .L170+16
-	add	r7, r4, #8
-	ldr	r5, [r3]
-	ldr	r3, .L170+20
-	ldr	r3, [r3]
-	add	r7, r5, r7, lsl #8
-	lsls	r3, r3, #27
-	bpl	.L159
-	mov	r1, r4
-	ldr	r0, .L170+24
-	bl	printf
-.L159:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
-	bl	nandc_cs
-	mov	r0, r4
-	cmp	r8, #0
-	bne	.L160
-	bl	flash_enter_slc_mode
-.L161:
-	add	r3, r5, r4, lsl #8
-	movs	r1, #96
-	ubfx	r2, r6, #0, #21
-	str	r1, [r3, #2056]
-	uxtb	r1, r6
-	str	r1, [r3, #2052]
-	lsrs	r1, r2, #8
-	lsrs	r2, r2, #16
-	str	r1, [r3, #2052]
-	str	r2, [r3, #2052]
-	movs	r2, #208
-	str	r2, [r3, #2056]
-	bl	nandc_wait_flash_ready
-	mov	r0, r7
-	bl	flash_read_status
+	add	r6, r1, r1, lsl #2
+	ldr	r8, .L235+16
 	mov	r5, r0
-	cmp	r8, #0
-	bne	.L162
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L162:
-	mov	r0, r4
-	bl	nandc_de_cs
-	ands	r5, r5, #5
-	beq	.L163
-	ldr	r3, .L170+28
-	mov	r0, r6
-	ldrh	r1, [r3]
-	bl	__aeabi_uidiv
-	mov	r2, r5
-	mov	r1, r0
-	ldr	r0, .L170+32
-	bl	printf
-.L163:
-	mov	r0, r5
+	movs	r4, #0
+	ldr	r7, .L235
+.L228:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L232
 	pop	{r4, r5, r6, r7, r8, pc}
-.L160:
-	bl	flash_exit_slc_mode
-	b	.L161
-.L171:
+.L232:
+	movs	r3, #85
+	movs	r0, #200
+	str	r3, [r5, #8]
+	ldrsb	r3, [r4, r7]
+	str	r3, [r5, #4]
+	bl	timer_delay_ns
+	ldr	r3, .L235+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L229
+	adds	r3, r4, r6
+	add	r3, r3, r7
+.L234:
+	ldrsb	r3, [r3, #5]
+.L233:
+	str	r3, [r5]
+	adds	r4, r4, #1
+	b	.L228
+.L229:
+	cmp	r3, #35
+	bne	.L231
+	ldr	r3, .L235+8
+	adds	r2, r4, r6
+	add	r3, r3, r2
+	b	.L234
+.L231:
+	ldr	r3, .L235+12
+	ldrsb	r3, [r3, r1]
+	b	.L233
+.L236:
 	.align	2
-.L170:
-	.word	.LANCHOR8
-	.word	.LANCHOR24
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
+.L235:
 	.word	.LANCHOR22
-	.word	.LC3
-	.word	.LANCHOR13
-	.word	.LC4
-	.size	flash_erase_block_en, .-flash_erase_block_en
-	.section	.text.flash_erase_block,"ax",%progbits
+	.word	.LANCHOR23
+	.word	.LANCHOR24
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_erase_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_block, %function
-flash_erase_block:
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r2, r1
-	movs	r1, #0
-	b	flash_erase_block_en
-	.size	flash_erase_block, .-flash_erase_block
-	.section	.text.flash_erase_all,"ax",%progbits
+	ldr	r3, .L242
+	push	{r4, r5, r6, r7, r8, lr}
+	lsls	r6, r0, #8
+	ldr	r4, .L242+4
+	ldr	r3, [r3]
+	ldr	r7, [r4]
+	ldrb	r2, [r3, #113]	@ zero_extendqisi2
+	add	ip, r3, #128
+	ldrb	r5, [r3, #112]	@ zero_extendqisi2
+	mul	r4, r1, r2
+	cmp	r5, #8
+	it	ne
+	movne	r5, #160
+	add	r1, r3, #112
+	add	r2, r2, #-1
+	add	r8, ip, r2
+	add	r4, r4, #32
+	it	ne
+	smlabbne	r4, r5, r0, r4
+	add	r5, r3, #127
+	movs	r0, #54
+	add	r1, r1, r4
+	adds	r4, r7, r6
+	subs	r1, r1, #1
+	str	r0, [r4, #2056]
+.L240:
+	cmp	r5, r8
+	bne	.L241
+	add	r6, r6, r7
+	movs	r3, #22
+	str	r3, [r6, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L241:
+	ldrb	r3, [r5, #1]!	@ zero_extendqisi2
+	movs	r0, #120
+	str	r3, [r4, #2052]
+	bl	timer_delay_ns
+	ldrsb	r3, [r1, #1]!
+	str	r3, [r4, #2048]
+	b	.L240
+.L243:
+	.align	2
+.L242:
+	.word	.LANCHOR27
+	.word	.LANCHOR13
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_erase_all
+	.global	hynix_reconfig_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_erase_all, %function
-flash_erase_all:
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L178
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #0
-	ldr	r7, .L178+4
-	ldrb	r4, [r3, #13]	@ zero_extendqisi2
-	ldrh	r3, [r3, #14]
-	smulbb	r4, r4, r3
-	uxth	r4, r4
-.L174:
-	ldr	r3, .L178+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxth	r3, r5
-	cmp	r2, r3
-	bhi	.L177
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L249
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #7
+	bhi	.L244
+	ldr	r5, .L249+4
+	ldr	r3, [r5]
+	add	r3, r3, r0
+	ldrb	r3, [r3, #120]	@ zero_extendqisi2
+	cbz	r3, .L244
 	movs	r1, #0
-	ldr	r0, .L178+12
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	printf
-.L177:
-	ldr	r2, .L178+16
-	uxth	r3, r5
-	movs	r6, #0
-	ldrb	r8, [r2, r3]	@ zero_extendqisi2
-.L175:
-	uxth	r3, r6
-	cmp	r4, r3
-	bhi	.L176
-	adds	r5, r5, #1
-	b	.L174
-.L176:
-	ldrh	r1, [r7]
-	mov	r0, r8
-	muls	r1, r6, r1
-	adds	r6, r6, #1
-	bl	flash_erase_block
-	b	.L175
-.L179:
+	bl	hynix_set_rr_para
+	ldr	r0, [r5]
+	movs	r3, #0
+	add	r0, r0, r4
+	strb	r3, [r0, #120]
+.L244:
+	pop	{r3, r4, r5, pc}
+.L250:
 	.align	2
-.L178:
-	.word	.LANCHOR19
-	.word	.LANCHOR13
-	.word	.LANCHOR8
-	.word	.LC5
-	.word	.LANCHOR10
-	.size	flash_erase_all, .-flash_erase_all
-	.section	.text.flash_set_interface_mode,"ax",%progbits
+.L249:
+	.word	.LANCHOR23
+	.word	.LANCHOR27
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
+	.section	.text.nandc_set_ddr_para,"ax",%progbits
 	.align	1
-	.global	flash_set_interface_mode
+	.global	nandc_set_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_set_interface_mode, %function
-flash_set_interface_mode:
-	@ args = 0, pretend = 0, frame = 8
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L202
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #239
-	ldr	ip, .L202+8
-	movs	r7, #128
-	mov	lr, #1
-	mov	r8, #35
-	ldr	r5, [r3]
-	mov	r10, #5
-	ldr	r3, .L202+4
+	@ link register save eliminated.
+	ldr	r3, .L254
+	ldr	r2, .L254+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	and	r2, r3, #4
-	and	r3, r3, #1
-	str	r3, [sp]
-	movs	r3, #0
-	str	r2, [sp, #4]
-	mov	r2, r3
-.L188:
-	ldrb	r4, [ip, r3, lsl #3]	@ zero_extendqisi2
-	cmp	r4, #152
-	beq	.L181
-	cmp	r4, #69
-	beq	.L181
-	cmp	r4, #44
-	bne	.L182
-.L181:
-	cmp	r0, #1
-	bne	.L183
-	ldr	r1, [sp]
-	cbz	r1, .L182
-	lsls	r1, r3, #8
-	cmp	r4, #44
-	add	fp, r5, r1
-	str	r6, [fp, #2056]
-	itete	eq
-	streq	r0, [fp, #2052]
-	strne	r7, [fp, #2052]
-	streq	r10, [fp, #2048]
-	strne	r0, [fp, #2048]
-.L187:
-	add	r1, r1, r5
-	str	r2, [r1, #2048]
-	str	r2, [r1, #2048]
-	str	r2, [r1, #2048]
-.L182:
-	adds	r3, r3, #1
-	cmp	r3, #4
-	bne	.L188
-	bl	nandc_wait_flash_ready
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L183:
-	ldr	r1, [sp, #4]
-	cmp	r1, #0
-	beq	.L182
-	lsls	r1, r3, #8
-	cmp	r4, #44
-	add	fp, r5, r1
-	str	r6, [fp, #2056]
-	itete	eq
-	streq	lr, [fp, #2052]
-	strne	r7, [fp, #2052]
-	streq	r8, [fp, #2048]
-	strne	r2, [fp, #2048]
-	b	.L187
-.L203:
-	.align	2
-.L202:
-	.word	.LANCHOR6
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.size	flash_set_interface_mode, .-flash_set_interface_mode
-	.section	.text.flash_reset,"ax",%progbits
+	ldr	r2, [r2]
+	cmp	r3, #9
+	lsl	r3, r0, #16
+	lsl	r0, r0, #8
+	orr	r3, r3, r0
+	orr	r3, r3, #3
+	ite	eq
+	streq	r3, [r2, #80]
+	strne	r3, [r2, #304]
+	bx	lr
+.L255:
+	.align	2
+.L254:
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",%progbits
 	.align	1
-	.global	flash_reset
+	.global	nandc_get_ddr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_reset, %function
-flash_reset:
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L205
+	ldr	r3, .L260
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ldr	r3, .L260+4
 	ldr	r3, [r3]
-	add	r0, r3, r0, lsl #8
-	movs	r3, #255
-	str	r3, [r0, #2056]
-	b	nandc_wait_flash_ready
-.L206:
+	ite	eq
+	ldreq	r0, [r3, #80]
+	ldrne	r0, [r3, #304]
+	ubfx	r0, r0, #8, #8
+	bx	lr
+.L261:
 	.align	2
-.L205:
-	.word	.LANCHOR6
-	.size	flash_reset, .-flash_reset
-	.section	.text.flash_read_id,"ax",%progbits
+.L260:
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",%progbits
 	.align	1
-	.global	flash_read_id
+	.global	nandc_set_if_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_id, %function
-flash_read_id:
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L208
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	mov	r5, r1
-	ldr	r4, [r3]
-	bl	flash_reset
-	mov	r0, r6
-	bl	nandc_cs
-	add	r4, r4, r6, lsl #8
-	movs	r3, #144
-	movs	r0, #200
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	bl	timer_delay_ns
-	ldr	r3, [r4, #2048]
-	mov	r0, r6
-	strb	r3, [r5]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #1]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #2]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #3]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #4]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #5]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #6]
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5, #7]
-	pop	{r4, r5, r6, lr}
-	b	nandc_de_cs
-.L209:
+	@ link register save eliminated.
+	ldr	r3, .L270
+	ands	r1, r0, #6
+	ldr	r3, [r3]
+	ldr	r2, [r3]
+	beq	.L263
+	lsls	r1, r0, #29
+	ldr	r1, .L270+4
+	orr	r2, r2, #24576
+	bfc	r2, #15, #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	orr	r2, r2, #196608
+	it	mi
+	orrmi	r2, r2, #32768
+	cmp	r1, #9
+	ldr	r1, .L270+8
+	bne	.L265
+	movw	r0, #8321
+	str	r0, [r3, #8]
+	str	r1, [r3, #80]
+	movs	r1, #38
+	str	r1, [r3, #84]
+	movs	r1, #39
+	str	r1, [r3, #84]
+.L266:
+	str	r2, [r3]
+	bx	lr
+.L265:
+	movw	r0, #8322
+	str	r0, [r3, #344]
+	str	r1, [r3, #304]
+	movs	r1, #38
+	str	r1, [r3, #308]
+	movs	r1, #39
+	str	r1, [r3, #308]
+	b	.L266
+.L263:
+	bfi	r2, r1, #13, #1
+	b	.L266
+.L271:
 	.align	2
-.L208:
-	.word	.LANCHOR6
-	.size	flash_read_id, .-flash_read_id
-	.section	.text.flash_read_spare,"ax",%progbits
+.L270:
+	.word	.LANCHOR13
+	.word	.LANCHOR28
+	.word	1052675
+	.size	nandc_set_if_mode, .-nandc_set_if_mode
+	.section	.text.nandc_cs,"ax",%progbits
 	.align	1
-	.global	flash_read_spare
+	.global	nandc_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_spare, %function
-flash_read_spare:
+	.type	nandc_cs, %function
+nandc_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r5, r2
-	ldr	r3, .L211
-	ldr	r2, .L211+4
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	ldr	r4, [r2]
-	movs	r2, #0
-	lsls	r3, r3, #9
-	add	r4, r4, r0, lsl #8
-	str	r2, [r4, #2056]
-	str	r3, [r4, #2052]
-	lsrs	r3, r3, #8
-	str	r3, [r4, #2052]
-	uxtb	r3, r1
-	str	r3, [r4, #2052]
-	lsrs	r3, r1, #8
-	lsrs	r1, r1, #16
-	str	r3, [r4, #2052]
-	movs	r3, #48
-	str	r1, [r4, #2052]
-	str	r3, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #2048]
-	strb	r3, [r5]
-	pop	{r3, r4, r5, pc}
-.L212:
+	@ link register save eliminated.
+	ldr	r3, .L273
+	movs	r2, #1
+	lsl	r0, r2, r0
+	ldr	r1, [r3]
+	ldr	r3, [r1]
+	bfi	r3, r0, #0, #8
+	str	r3, [r1]
+	bx	lr
+.L274:
 	.align	2
-.L211:
-	.word	.LANCHOR19
-	.word	.LANCHOR6
-	.size	flash_read_spare, .-flash_read_spare
-	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
+.L273:
+	.word	.LANCHOR13
+	.size	nandc_cs, .-nandc_cs
+	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
 	.align	1
-	.global	sandisk_prog_test_bad_block
+	.global	flash_wait_device_ready_raw
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sandisk_prog_test_bad_block, %function
-sandisk_prog_test_bad_block:
+	.type	flash_wait_device_ready_raw, %function
+flash_wait_device_ready_raw:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	lsls	r0, r0, #8
-	ldr	r3, .L220
-	ldr	r5, .L220+4
+	ldr	r3, .L281
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L276
+	movw	r2, #677
+	ldr	r1, .L281+4
+	ldr	r0, .L281+8
+	bl	printf
+.L276:
+	ldr	r3, .L281+12
+	lsrs	r7, r5, #16
+	ldrb	r8, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L281+16
+	mov	r0, r8
 	ldr	r4, [r3]
-	ldrb	r3, [r5, #29]	@ zero_extendqisi2
-	cbz	r3, .L214
-	adds	r2, r4, r0
-	str	r3, [r2, #2056]
-.L215:
-	add	r4, r4, r0
-	movs	r3, #128
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	uxtb	r3, r1
-	str	r3, [r4, #2052]
-	lsrs	r3, r1, #8
-	lsrs	r1, r1, #16
-	str	r3, [r4, #2052]
-	movs	r3, #16
+	bl	nandc_cs
+	lsrs	r1, r5, #8
+	uxtb	r5, r5
+	add	r4, r4, r8, lsl #8
+.L279:
+	movs	r0, #120
+	str	r0, [r4, #2056]
+	str	r5, [r4, #2052]
 	str	r1, [r4, #2052]
-	str	r3, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	movs	r3, #112
-	movs	r0, #80
-	str	r3, [r4, #2056]
+	str	r7, [r4, #2052]
 	bl	timer_delay_ns
-	ldrb	r3, [r5, #30]	@ zero_extendqisi2
 	ldr	r0, [r4, #2048]
-	and	r0, r0, #5
-	cbz	r3, .L213
-	str	r3, [r4, #2056]
-.L213:
-	pop	{r3, r4, r5, pc}
-.L214:
-	adds	r3, r4, r0
-	movs	r2, #162
-	str	r2, [r3, #2056]
-	b	.L215
-.L221:
+	uxtb	r0, r0
+	bics	r3, r6, r0
+	bne	.L279
+	cmp	r0, #255
+	beq	.L279
+	bl	nandc_de_cs.constprop.29
+	pop	{r4, r5, r6, r7, r8, pc}
+.L282:
 	.align	2
-.L220:
-	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
-	.section	.text.nandc_bch_sel,"ax",%progbits
+.L281:
+	.word	.LANCHOR18
+	.word	.LANCHOR29
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
+	.section	.text.flash_wait_device_ready,"ax",%progbits
 	.align	1
-	.global	nandc_bch_sel
+	.global	flash_wait_device_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_bch_sel, %function
-nandc_bch_sel:
+	.type	flash_wait_device_ready, %function
+flash_wait_device_ready:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L236
-	movs	r2, #0
-	push	{r4, lr}
-	movs	r3, #1
-	strb	r0, [r1]
-	ldr	r1, .L236+4
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #9
-	ldr	r1, .L236+8
-	ldr	r1, [r1]
-	bne	.L223
-	cmp	r0, #70
-	str	r3, [r1, #16]
-	beq	.L224
-	cmp	r0, #60
-	beq	.L231
-	cmp	r0, #40
-	ite	eq
-	moveq	r2, #2
-	movne	r2, r3
-.L224:
-	lsls	r3, r2, #25
-	orr	r3, r3, #1
-	str	r3, [r1, #32]
-	pop	{r4, pc}
-.L231:
-	movs	r2, #3
-	b	.L224
-.L223:
-	movs	r4, #16
-	str	r3, [r1, #8]
-	cmp	r0, r4
-	mov	r3, r2
-	bfi	r3, r4, #8, #8
-	bfi	r3, r2, #18, #1
-	bne	.L226
-.L229:
-	bfc	r3, #4, #1
-.L227:
-	orr	r3, r3, #1
-	str	r3, [r1, #12]
-	pop	{r4, pc}
-.L226:
-	cmp	r0, #24
-	bne	.L228
-	orr	r3, r3, #16
-	b	.L227
-.L228:
-	cmp	r0, #40
-	orr	r3, r3, #262144
-	orr	r3, r3, #16
-	bne	.L227
-	b	.L229
-.L237:
+	tst	r0, #50331648
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r10, r1
+	ubfx	r4, r0, #0, #21
+	ubfx	r8, r0, #21, #3
+	bne	.L284
+	ldr	r3, .L293
+	ldr	r6, .L293+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L285
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L284
+.L285:
+	ldr	r3, .L293+8
+	mov	r0, r4
+	ldrh	r5, [r3]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	r7, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L286
+	add	r4, r7, r1, lsl #1
+.L284:
+	mov	r2, r10
+	mov	r1, r4
+	mov	r0, r8
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	flash_wait_device_ready_raw
+.L286:
+	ldr	r3, .L293+12
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r7
+	b	.L284
+.L294:
 	.align	2
-.L236:
-	.word	.LANCHOR27
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_bch_sel, .-nandc_bch_sel
-	.section	.text.NandCIrqEnable,"ax",%progbits
+.L293:
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_de_cs,"ax",%progbits
 	.align	1
-	.global	NandCIrqEnable
+	.global	nandc_de_cs
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandCIrqEnable, %function
-NandCIrqEnable:
+	.type	nandc_de_cs, %function
+nandc_de_cs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	ldr	r3, .L296
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2]
 	bx	lr
-	.size	NandCIrqEnable, .-NandCIrqEnable
-	.section	.text.NandCIrqDisable,"ax",%progbits
+.L297:
+	.align	2
+.L296:
+	.word	.LANCHOR13
+	.size	nandc_de_cs, .-nandc_de_cs
+	.section	.text.nandc_wait_flash_ready_no_delay,"ax",%progbits
 	.align	1
-	.global	NandCIrqDisable
+	.global	nandc_wait_flash_ready_no_delay
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandCIrqDisable, %function
-NandCIrqDisable:
-	@ args = 0, pretend = 0, frame = 0
+	.type	nandc_wait_flash_ready_no_delay, %function
+nandc_wait_flash_ready_no_delay:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	NandCIrqDisable, .-NandCIrqDisable
-	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
+	push	{r0, r1, r4, lr}
+	ldr	r1, .L303
+	ldr	r4, .L303+4
+.L300:
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L301
+	movs	r0, #10
+	bl	timer_delay_ns
+	subs	r1, r1, #1
+	bne	.L300
+	mov	r0, #-1
+.L298:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, pc}
+.L301:
+	movs	r0, #0
+	b	.L298
+.L304:
+	.align	2
+.L303:
+	.word	100000
+	.word	.LANCHOR13
+	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
+	.section	.text.zftl_flash_enter_slc_mode,"ax",%progbits
 	.align	1
-	.global	rk_nandc_get_irq_status
+	.global	zftl_flash_enter_slc_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_nandc_get_irq_status, %function
-rk_nandc_get_irq_status:
+	.type	zftl_flash_enter_slc_mode, %function
+zftl_flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L243
+	ldr	r3, .L326
+	push	{r4, lr}
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	ite	eq
-	ldreq	r0, [r0, #296]
-	ldrne	r0, [r0, #372]
-	bx	lr
-.L244:
+	cmp	r3, #0
+	beq	.L305
+	ldr	r2, .L326+4
+	cmp	r3, #1
+	ldr	r4, [r2]
+	bne	.L308
+.L325:
+	ldr	r3, .L326+8
+	ldrb	r3, [r3, #29]	@ zero_extendqisi2
+	cbz	r3, .L305
+	add	r4, r4, r0, lsl #8
+	str	r3, [r4, #2056]
+	pop	{r4, pc}
+.L308:
+	cmp	r3, #2
+	bne	.L310
+	ldr	r3, .L326+12
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	cbz	r2, .L305
+	movs	r2, #0
+	strb	r2, [r3, r0]
+	b	.L325
+.L310:
+	cmp	r3, #3
+	bne	.L305
+	ldr	r3, .L326+12
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	cbz	r2, .L305
+	add	r4, r4, r0, lsl #8
+	movs	r1, #0
+	strb	r1, [r3, r0]
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	movs	r0, #50
+	bl	timer_delay_ns
+	movs	r3, #1
+	str	r1, [r4, #2048]
+	movs	r0, #150
+	str	r3, [r4, #2048]
+	str	r1, [r4, #2048]
+	str	r1, [r4, #2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	movs	r3, #218
+	movs	r0, #150
+	str	r3, [r4, #2056]
+	bl	timer_delay_ns
+	pop	{r4, lr}
+	b	nandc_wait_flash_ready_no_delay
+.L305:
+	pop	{r4, pc}
+.L327:
 	.align	2
-.L243:
-	.word	.LANCHOR7
-	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
-	.section	.text.rk_nandc_flash_ready,"ax",%progbits
+.L326:
+	.word	.LANCHOR0
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.word	.LANCHOR32
+	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
+	.section	.text.zftl_flash_exit_slc_mode,"ax",%progbits
 	.align	1
-	.global	rk_nandc_flash_ready
+	.global	zftl_flash_exit_slc_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_nandc_flash_ready, %function
-rk_nandc_flash_ready:
+	.type	zftl_flash_exit_slc_mode, %function
+zftl_flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
-	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
+	ldr	r3, .L351
+	mov	r1, r0
+	push	{r4, r5, r6, r7, r8, lr}
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L328
+	ldr	r2, .L351+4
+	cmp	r3, #1
+	ldr	r5, [r2]
+	bne	.L331
+	ldr	r3, .L351+8
+	ldrb	r3, [r3, #30]	@ zero_extendqisi2
+.L350:
+	cmp	r3, #0
+	beq	.L328
+	add	r1, r5, r1, lsl #8
+	str	r3, [r1, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L331:
+	cmp	r3, #2
+	bne	.L333
+	ldr	r0, .L351+12
+	ldrb	r3, [r0, r1]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L328
+	ldr	r2, .L351+8
+	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+	cmp	r3, #2
+	it	ne
+	movne	r3, #4
+	strb	r3, [r0, r1]
+	ldrb	r3, [r2, #30]	@ zero_extendqisi2
+	b	.L350
+.L333:
+	cmp	r3, #3
+	bne	.L328
+	ldr	r6, .L351+12
+	ldrb	r3, [r6, r0]	@ zero_extendqisi2
+	cbnz	r3, .L328
+	ldr	r8, .L351+8
+	lsls	r7, r0, #8
+	adds	r4, r5, r7
+	add	r5, r5, r7
+	ldrb	r3, [r8, #12]	@ zero_extendqisi2
+	cmp	r3, #2
+	it	ne
+	movne	r3, #4
+	strb	r3, [r6, r0]
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	movs	r0, #50
+	bl	timer_delay_ns
+	ldrb	r3, [r8, #7]	@ zero_extendqisi2
+	movs	r0, #150
+	cmp	r3, #9
+	mov	r3, #1
+	itet	ne
+	ldrbne	r2, [r6, r1]	@ zero_extendqisi2
+	streq	r3, [r4, #2048]
+	strne	r2, [r4, #2048]
+	str	r3, [r4, #2048]
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	movs	r3, #223
+	movs	r0, #150
+	str	r3, [r5, #2056]
+	bl	timer_delay_ns
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	nandc_wait_flash_ready_no_delay
+.L328:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L352:
+	.align	2
+.L351:
+	.word	.LANCHOR0
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.word	.LANCHOR32
+	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
+	.section	.text.flash_start_page_read,"ax",%progbits
 	.align	1
-	.global	NandcIqrWaitFlashReady
+	.global	flash_start_page_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	NandcIqrWaitFlashReady, %function
-NandcIqrWaitFlashReady:
+	.type	flash_start_page_read, %function
+flash_start_page_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
-	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
-	.align	1
-	.global	rk_nandc_flash_xfer_completed
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_nandc_flash_xfer_completed, %function
-rk_nandc_flash_xfer_completed:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
-	.section	.text.nandc_xfer_start,"ax",%progbits
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ubfx	r4, r1, #21, #3
+	ldr	r3, .L361
+	mov	r7, r0
+	ubfx	r5, r1, #0, #21
+	ubfx	r8, r1, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L354
+	movw	r2, #845
+	ldr	r1, .L361+4
+	ldr	r0, .L361+8
+	bl	printf
+.L354:
+	ldr	r3, .L361+12
+	ldrb	r6, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L361+16
+	mov	r0, r6
+	ldr	r4, [r3]
+	lsl	r10, r6, #8
+	bl	nandc_cs
+	cmp	r8, #0
+	bne	.L355
+	mov	r0, r5
+	bl	slc_phy_page_address_calc
+	ldr	r3, .L361+20
+	mov	r5, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L356
+	mov	r0, r6
+	bl	zftl_flash_enter_slc_mode
+.L356:
+	add	r3, r4, r10
+	movs	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r5
+	str	r2, [r3, #2052]
+	lsrs	r2, r5, #8
+	lsrs	r5, r5, #16
+	str	r2, [r3, #2052]
+	str	r5, [r3, #2052]
+	str	r7, [r3, #2056]
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	nandc_de_cs.constprop.29
+.L355:
+	ldr	r3, .L361+24
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L357
+	add	r3, r4, r10
+	str	r8, [r3, #2056]
+	b	.L356
+.L357:
+	mov	r0, r6
+	bl	zftl_flash_exit_slc_mode
+	b	.L356
+.L362:
+	.align	2
+.L361:
+	.word	.LANCHOR18
+	.word	.LANCHOR33
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.nandc_wait_flash_ready,"ax",%progbits
 	.align	1
-	.global	nandc_xfer_start
+	.global	nandc_wait_flash_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_xfer_start, %function
-nandc_xfer_start:
-	@ args = 0, pretend = 0, frame = 16
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	ldr	r0, .L264
-	adds	r6, r1, #1
-	ldr	r5, .L264+4
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r10, .L264+24
-	cmp	r0, #9
-	bne	.L249
-	movs	r4, #0
-	movs	r1, #1
-	bfi	r4, r7, #1, #1
-	asrs	r6, r6, r1
-	orr	r4, r4, #8
-	bfi	r4, r1, #5, #2
-	ldr	r1, .L264+8
-	orr	r4, r4, #536870912
-	orr	r4, r4, #1024
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	bfc	r4, #4, #1
-	bfi	r4, r6, #22, #6
-	cbz	r1, .L250
-	ldr	r1, .L264+12
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cbz	r1, .L250
-	orr	r4, r4, #512
-.L250:
-	add	r1, r2, #63
-	and	r6, r6, #63
-	bic	r1, r1, #63
-	bic	r0, r2, #63
-	add	r1, r1, r6, lsl #10
-	str	r2, [r5, #4]
-	str	r3, [r5, #8]
-	clz	r7, r7
-	str	r2, [r5, #12]
-	lsrs	r7, r7, #5
-	str	r3, [r5, #16]
-	bl	flush_dcache_range
-	ldr	r0, [r5, #8]
-	add	r1, r0, #63
-	bic	r0, r0, #63
-	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #2
-	bl	flush_dcache_range
-	movs	r3, #1
-	ldr	r2, [r10]
-	str	r3, [r5, #20]
-	movs	r1, #16
-	ldr	r3, [r5, #12]
-	str	r3, [r2, #52]
-	ldr	r3, [r5, #16]
-	str	r3, [r2, #56]
-	ldr	r3, [r2, #48]
-	bfi	r3, r1, #9, #5
-	movs	r1, #2
-	orr	r3, r3, #448
-	bfi	r3, r1, #3, #3
-	ldr	r1, .L264+16
-	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
-	ldrh	r1, [r1]
-	orr	r3, r3, #1
-	bfi	r3, r1, #16, #11
-	str	r3, [r2, #48]
-	str	r4, [r2, #16]
-	orr	r4, r4, #4
-	str	r4, [r2, #16]
-.L248:
-	add	sp, sp, #16
+	push	{r0, r1, r4, lr}
+	movs	r0, #150
+	bl	timer_delay_ns
+	ldr	r4, .L368
+	ldr	r1, .L368+4
+.L365:
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L366
+	movs	r0, #10
+	bl	timer_delay_ns
+	subs	r1, r1, #1
+	bne	.L365
+	mov	r0, #-1
+.L363:
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L249:
-	ldr	r0, [r10]
-	movs	r4, #0
-	bfi	r4, r7, #1, #1
-	orr	r4, r4, #8
-	ldr	r8, [r0, #12]
-	movs	r0, #16
-	bfi	r8, r0, #8, #8
-	movs	r0, #1
-	bfi	r4, r0, #5, #2
-	asrs	r6, r6, r0
-	orr	r4, r4, #536870912
-	orr	r4, r4, #1024
-	bfc	r8, #3, #1
-	bfc	r4, #4, #1
-	bfc	r8, #5, #3
-	str	r6, [sp]
-	bfi	r4, r6, #22, #6
-	cmp	r7, #0
-	beq	.L252
-	ldr	r0, .L264+20
-	lsrs	r1, r1, #1
-	str	r1, [sp, #8]
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	ldr	r1, [r5]
-	cmp	r0, #24
-	ite	hi
-	movhi	r0, #128
-	movls	r0, #64
-	str	r1, [sp, #12]
-	movs	r1, #0
-	str	r0, [sp, #4]
-	mov	r0, r1
-.L254:
-	ldr	r6, [sp, #4]
-	add	fp, r3, r0, lsl #2
-	add	lr, r6, r1
-	ldr	r6, [sp, #8]
-	cmp	r0, r6
-	blt	.L255
-.L256:
-	ldr	r3, [r5]
-	add	r1, r2, #63
-	bic	r1, r1, #63
-	bic	r0, r2, #63
-	str	r2, [r5, #4]
-	clz	r7, r7
-	str	r3, [r5, #8]
-	lsrs	r7, r7, #5
-	str	r3, [r5, #16]
-	ldr	r3, [sp]
-	str	r2, [r5, #12]
-	and	r6, r3, #63
-	add	r1, r1, r6, lsl #10
-	bl	flush_dcache_range
-	ldr	r0, [r5, #8]
-	add	r1, r0, #63
-	bic	r0, r0, #63
-	bic	r1, r1, #63
-	add	r1, r1, r6, lsl #7
-	bl	flush_dcache_range
-	movs	r3, #1
-	ldr	r2, [r10]
-	str	r3, [r5, #20]
-	movs	r1, #16
-	ldr	r3, [r5, #12]
-	str	r3, [r2, #20]
-	ldr	r3, [r5, #16]
-	str	r3, [r2, #24]
-	movs	r3, #0
-	bfi	r3, r1, #9, #5
-	movs	r1, #2
-	orr	r3, r3, #448
-	bfi	r3, r1, #3, #3
-	orr	r3, r3, #4
-	bfi	r3, r7, #1, #1
-	orr	r3, r3, #1
-	str	r3, [r2, #16]
-	str	r8, [r2, #12]
-	str	r4, [r2, #8]
-	orr	r4, r4, #4
-	str	r4, [r2, #8]
-	b	.L248
-.L255:
-	ldrh	ip, [r3, r0, lsl #2]
-	bic	r1, r1, #3
-	ldrh	fp, [fp, #2]
-	adds	r0, r0, #1
-	ldr	r6, [sp, #12]
-	orr	ip, ip, fp, lsl #16
-	str	ip, [r6, r1]
-	mov	r1, lr
-	b	.L254
-.L252:
-	ldr	r3, [r5]
-	str	r0, [r3]
-	b	.L256
-.L265:
+	pop	{r4, pc}
+.L366:
+	movs	r0, #0
+	b	.L363
+.L369:
 	.align	2
-.L264:
-	.word	.LANCHOR7
-	.word	.LANCHOR30
-	.word	.LANCHOR28
-	.word	.LANCHOR29
-	.word	.LANCHOR31
-	.word	.LANCHOR27
-	.word	.LANCHOR6
-	.size	nandc_xfer_start, .-nandc_xfer_start
-	.section	.text.nandc_set_seed,"ax",%progbits
+.L368:
+	.word	.LANCHOR13
+	.word	100000
+	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
+	.section	.text.sandisk_set_rr_para,"ax",%progbits
 	.align	1
-	.global	nandc_set_seed
+	.global	sandisk_set_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_set_seed, %function
-nandc_set_seed:
+	.type	sandisk_set_rr_para, %function
+sandisk_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L273
-	and	r0, r0, #127
-	ldr	r3, .L273+4
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r2, .L267
-	orr	r3, r3, #-1073741824
-.L267:
-	ldr	r2, .L273+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #9
-	ldr	r2, .L273+12
-	ldr	r2, [r2]
-	ite	eq
-	streq	r3, [r2, #520]
-	strne	r3, [r2, #336]
-	bx	lr
-.L274:
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #239
+	str	r3, [r0, #8]
+	movs	r3, #17
+	mov	r4, r0
+	str	r3, [r0, #4]
+	movs	r0, #200
+	bl	timer_delay_ns
+	ldr	r3, .L376
+	add	r1, r1, r1, lsl #2
+	ldr	r6, .L376+4
+	movs	r2, #0
+	ldr	r7, .L376+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L376+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+.L371:
+	cmp	r2, r0
+	bcc	.L374
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L374:
+	adds	r3, r2, r1
+	cmp	r5, #67
+	ite	eq
+	addeq	r3, r3, r7
+	addne	r3, r3, r6
+	ldrsb	r3, [r3, #5]
+	adds	r2, r2, #1
+	str	r3, [r4]
+	b	.L371
+.L377:
 	.align	2
-.L273:
-	.word	.LANCHOR29
-	.word	.LANCHOR32
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.size	nandc_set_seed, .-nandc_set_seed
-	.section	.text.flash_start_page_read,"ax",%progbits
+.L376:
+	.word	.LANCHOR26
+	.word	.LANCHOR24
+	.word	.LANCHOR22
+	.word	.LANCHOR23
+	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
+	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",%progbits
 	.align	1
-	.global	flash_start_page_read
+	.global	toshiba_3d_set_tlc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_start_page_read, %function
-flash_start_page_read:
-	@ args = 0, pretend = 0, frame = 16
+	.type	toshiba_3d_set_tlc_rr_para, %function
+toshiba_3d_set_tlc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ubfx	r3, r1, #21, #3
-	ldr	r2, .L293
-	str	r0, [sp, #4]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L276
-	movw	r2, #738
-	ldr	r1, .L293+4
-	ldr	r0, .L293+8
-	bl	printf
-.L277:
-	b	.L277
-.L276:
-	ldr	r2, .L293+12
-	ubfx	r5, r1, #24, #2
-	ubfx	r4, r1, #0, #21
-	ldr	r10, .L293+36
-	ldrb	r7, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L293+16
-	mov	r0, r7
-	ldr	r6, [r3]
-	lsl	fp, r7, #8
-	bl	nandc_cs
-	cmp	r5, #0
-	bne	.L278
-	ldr	r3, .L293+20
-	ldr	r2, .L293+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L279
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	cbz	r3, .L280
-.L279:
-	ldr	r3, .L293+28
-	mov	r0, r4
-	str	r2, [sp, #12]
-	ldrh	r8, [r3]
-	mov	r1, r8
-	bl	__aeabi_uidiv
-	mul	r3, r8, r0
-	mov	r1, r8
-	mov	r0, r4
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #8]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L281
-	add	r4, r3, r1, lsl #1
-.L280:
-	mov	r0, r7
-	bl	flash_enter_slc_mode
-	b	.L282
-.L281:
-	ldr	r2, .L293+32
-	ldrh	r4, [r2, r1, lsl #1]
-	add	r4, r4, r3
-.L282:
-	add	r6, r6, fp
-	movs	r3, #0
-	str	r3, [r6, #2056]
-	str	r3, [r6, #2052]
-	str	r3, [r6, #2052]
-	uxtb	r3, r4
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #8
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #16
-	str	r3, [r6, #2052]
-	ldr	r3, [sp, #4]
-	str	r3, [r6, #2056]
-	ldr	r3, [r10]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L284
-	cbz	r5, .L284
-	add	r4, r4, r4, lsl #1
-	subs	r5, r5, #1
-	adds	r0, r4, r5
-.L292:
-	bl	nandc_set_seed
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs
-.L278:
-	ldr	r3, [r10]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L283
-	add	r3, r6, fp
-	str	r5, [r3, #2056]
-	b	.L282
-.L283:
-	mov	r0, r7
-	bl	flash_exit_slc_mode
-	b	.L282
-.L284:
-	mov	r0, r4
-	b	.L292
-.L294:
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #0
+	movs	r7, #213
+	mvn	r3, #118
+	adds	r1, r1, #1
+	mov	r4, r0
+	str	r7, [r0, #8]
+	rsb	r1, r1, r1, lsl #3
+	str	r6, [r0, #4]
+	str	r3, [r0, #4]
+	ldr	r3, .L379
+	adds	r5, r3, r1
+	ldrsb	r3, [r3, r1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #2]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #3]
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	mvn	r3, #117
+	str	r7, [r4, #8]
+	str	r6, [r4, #4]
+	str	r3, [r4, #4]
+	ldrsb	r3, [r5, #4]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #5]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #6]
+	str	r3, [r4]
+	str	r6, [r4]
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L380:
 	.align	2
-.L293:
-	.word	.LANCHOR8
-	.word	.LANCHOR33
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR14
+.L379:
 	.word	.LANCHOR34
-	.size	flash_start_page_read, .-flash_start_page_read
-	.section	.text.FlashDeInit,"ax",%progbits
+	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
+	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
 	.align	1
-	.global	FlashDeInit
+	.global	toshiba_3d_set_slc_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashDeInit, %function
-FlashDeInit:
+	.type	toshiba_3d_set_slc_rr_para, %function
+toshiba_3d_set_slc_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L307
-	bl	nandc_wait_flash_ready
-	movs	r0, #0
-	bl	hynix_reconfig_rr_para
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L296
-	ldr	r3, .L307+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L296
-	movs	r0, #1
-	bl	flash_set_interface_mode
-	movs	r0, #1
-	bl	nandc_set_if_mode
+	@ link register save eliminated.
+	movs	r3, #213
+	mvn	r2, #116
+	str	r3, [r0, #8]
 	movs	r3, #0
-	strb	r3, [r4]
-.L296:
-	ldr	r1, .L307+8
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	cbz	r3, .L297
-	movs	r0, #0
-	strb	r0, [r1]
-	bl	nandc_set_seed
-	movs	r3, #1
-	strb	r3, [r1]
-.L297:
-	movs	r0, #0
-	pop	{r4, pc}
-.L308:
+	str	r3, [r0, #4]
+	str	r2, [r0, #4]
+	ldr	r2, .L382
+	add	r1, r1, r2
+	ldrsb	r2, [r1, #1]
+	str	r2, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	b	nandc_wait_flash_ready
+.L383:
 	.align	2
-.L307:
+.L382:
 	.word	.LANCHOR35
-	.word	.LANCHOR25
-	.word	.LANCHOR29
-	.size	FlashDeInit, .-FlashDeInit
-	.section	.text.nandc_randomizer_enable,"ax",%progbits
+	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
+	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
 	.align	1
-	.global	nandc_randomizer_enable
+	.global	toshiba_tlc_set_rr_para
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_randomizer_enable, %function
-nandc_randomizer_enable:
+	.type	toshiba_tlc_set_rr_para, %function
+toshiba_tlc_set_rr_para:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L310
-	strb	r0, [r3]
-	bx	lr
-.L311:
+	push	{r4, r5, r6, lr}
+	movs	r6, #239
+	mov	r4, r0
+	str	r6, [r0, #8]
+	cbz	r2, .L385
+	movs	r3, #18
+	rsb	r1, r1, r1, lsl #3
+	str	r3, [r0, #4]
+	ldr	r3, .L387
+	adds	r5, r3, r1
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #3]	@ zero_extendqisi2
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	movs	r3, #19
+	str	r6, [r4, #8]
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #4]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #5]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #6]	@ zero_extendqisi2
+	str	r3, [r4]
+	movs	r3, #0
+	str	r3, [r4]
+.L386:
+	pop	{r4, r5, r6, lr}
+	b	nandc_wait_flash_ready
+.L385:
+	movs	r3, #20
+	str	r3, [r0, #4]
+	ldr	r3, .L387+4
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	b	.L386
+.L388:
 	.align	2
-.L310:
-	.word	.LANCHOR29
-	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
-	.section	.text.nandc_get_chip_if,"ax",%progbits
+.L387:
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.flash_erase_duplane_block,"ax",%progbits
 	.align	1
-	.global	nandc_get_chip_if
+	.global	flash_erase_duplane_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_get_chip_if, %function
-nandc_get_chip_if:
+	.type	flash_erase_duplane_block, %function
+flash_erase_duplane_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L313
-	adds	r0, r0, #8
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L403
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L390
+	mov	r2, #588
+	ldr	r1, .L403+4
+	ldr	r0, .L403+8
+	bl	printf
+.L390:
+	ldr	r3, .L403+12
+	ldrb	r4, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L403+16
+	add	r7, r4, #8
+	ldr	r10, [r3]
+	ldr	r3, .L403+20
 	ldr	r3, [r3]
-	add	r0, r3, r0, lsl #8
-	bx	lr
-.L314:
+	add	r7, r10, r7, lsl #8
+	lsls	r3, r3, #27
+	bpl	.L391
+	mov	r3, r8
+	mov	r2, r6
+	mov	r1, r4
+	ldr	r0, .L403+24
+	bl	printf
+.L391:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	r5, #0
+	bne	.L392
+	bl	zftl_flash_enter_slc_mode
+.L393:
+	lsls	r4, r4, #8
+	movs	r3, #96
+	add	r5, r10, r4
+	str	r3, [r5, #2056]
+	uxtb	r3, r6
+	str	r3, [r5, #2052]
+	lsrs	r3, r6, #8
+	str	r3, [r5, #2052]
+	lsrs	r3, r6, #16
+	str	r3, [r5, #2052]
+	ldr	r3, .L403+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L396
+	movs	r3, #208
+	str	r3, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	and	fp, r0, #5
+.L394:
+	add	r1, r10, r4
+	movs	r3, #96
+	str	r3, [r1, #2056]
+	uxtb	r3, r8
+	str	r3, [r5, #2052]
+	lsr	r3, r8, #8
+	str	r3, [r5, #2052]
+	lsr	r3, r8, #16
+	str	r3, [r5, #2052]
+	movs	r3, #208
+	str	r3, [r1, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	and	r3, r0, #5
+	orrs	fp, r3, fp
+	beq	.L395
+	mov	r2, r0
+	mov	r1, r6
+	ldr	r0, .L403+32
+	bl	printf
+.L395:
+	mov	r0, fp
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L392:
+	bl	zftl_flash_exit_slc_mode
+	b	.L393
+.L396:
+	mov	fp, #0
+	b	.L394
+.L404:
 	.align	2
-.L313:
-	.word	.LANCHOR6
-	.size	nandc_get_chip_if, .-nandc_get_chip_if
-	.section	.text.buf_reinit,"ax",%progbits
+.L403:
+	.word	.LANCHOR18
+	.word	.LANCHOR38
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC32
+	.word	.LANCHOR39
+	.word	.LC33
+	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
+	.section	.text.flash_erase_block_en,"ax",%progbits
 	.align	1
-	.global	buf_reinit
+	.global	flash_erase_block_en
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_reinit, %function
-buf_reinit:
+	.type	flash_erase_block_en, %function
+flash_erase_block_en:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L318
-	movs	r2, #0
-	push	{r4, r5, lr}
-	mov	r1, r2
-	mov	r4, r3
-.L316:
-	uxtb	r0, r2
-	adds	r2, r2, #1
-	cmp	r2, #32
-	strb	r1, [r3, #2]
-	add	r5, r0, #1
-	strb	r0, [r3, #1]
-	strb	r5, [r3]
-	add	r3, r3, #48
-	str	r1, [r3, #-40]
-	bne	.L316
-	movs	r3, #255
-	strb	r3, [r4, #1488]
-	ldr	r3, .L318+4
-	strb	r1, [r3]
-	ldr	r3, .L318+8
-	strb	r2, [r3]
-	pop	{r4, r5, pc}
-.L319:
+	ldr	r3, .L417
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	mov	fp, r1
+	mov	r6, r2
+	ubfx	r8, r2, #0, #21
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L406
+	movw	r2, #633
+	ldr	r1, .L417+4
+	ldr	r0, .L417+8
+	bl	printf
+.L406:
+	ldr	r3, .L417+12
+	ldrb	r5, [r3, r7]	@ zero_extendqisi2
+	ldr	r3, .L417+16
+	add	r10, r5, #8
+	ldr	r4, [r3]
+	ldr	r3, .L417+20
+	ldr	r3, [r3]
+	add	r10, r4, r10, lsl #8
+	lsls	r3, r3, #27
+	bpl	.L407
+	mov	r3, fp
+	mov	r2, r6
+	mov	r1, r5
+	ldr	r0, .L417+24
+	bl	printf
+.L407:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	cmp	fp, #0
+	bne	.L408
+	bl	zftl_flash_enter_slc_mode
+.L409:
+	add	r0, r4, r5, lsl #8
+	movs	r3, #96
+	str	r3, [r0, #2056]
+	uxtb	r3, r6
+	str	r3, [r0, #2052]
+	lsr	r3, r8, #8
+	str	r3, [r0, #2052]
+	lsr	r3, r8, #16
+	str	r3, [r0, #2052]
+	movs	r3, #208
+	str	r3, [r0, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r10
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	ands	r4, r0, #5
+	beq	.L410
+	ldr	r3, .L417+28
+	mov	r0, r6
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+	mov	r3, r4
+	mov	r2, r0
+	mov	r1, r7
+	ldr	r0, .L417+32
+	bl	printf
+.L410:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L408:
+	bl	zftl_flash_exit_slc_mode
+	b	.L409
+.L418:
 	.align	2
-.L318:
-	.word	.LANCHOR36
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.size	buf_reinit, .-buf_reinit
-	.section	.text.buf_add_tail,"ax",%progbits
+.L417:
+	.word	.LANCHOR18
+	.word	.LANCHOR40
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC34
+	.word	.LANCHOR2
+	.word	.LC35
+	.size	flash_erase_block_en, .-flash_erase_block_en
+	.section	.text.flash_erase_block,"ax",%progbits
 	.align	1
-	.global	buf_add_tail
+	.global	flash_erase_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_add_tail, %function
-buf_add_tail:
+	.type	flash_erase_block, %function
+flash_erase_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #255
-	push	{r4, lr}
-	strb	r3, [r1]
-	ldrb	r2, [r0]	@ zero_extendqisi2
-	cmp	r2, r3
-	bne	.L321
-	ldrb	r3, [r1, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L322
-	movs	r2, #74
-	ldr	r1, .L329
-	ldr	r0, .L329+4
-	bl	printf
-.L323:
-	b	.L323
-.L322:
-	strb	r3, [r0]
-	pop	{r4, pc}
-.L325:
-	muls	r3, r0, r3
-	strb	r2, [r4, r3]
-	pop	{r4, pc}
-.L321:
-	ldr	r4, .L329+8
-	movs	r3, #48
-.L328:
-	mov	r0, r2
-	muls	r2, r3, r2
-	ldrb	r2, [r4, r2]	@ zero_extendqisi2
-	cmp	r2, #255
-	bne	.L328
-	ldrb	r2, [r1, #1]	@ zero_extendqisi2
-	cmp	r2, #255
-	bne	.L325
-	movs	r2, #81
-	ldr	r1, .L329
-	ldr	r0, .L329+4
-	bl	printf
-.L326:
-	b	.L326
-.L330:
-	.align	2
-.L329:
-	.word	.LANCHOR39
-	.word	.LC0
-	.word	.LANCHOR36
-	.size	buf_add_tail, .-buf_add_tail
-	.section	.text.buf_free,"ax",%progbits
+	@ link register save eliminated.
+	mov	r2, r1
+	movs	r1, #0
+	b	flash_erase_block_en
+	.size	flash_erase_block, .-flash_erase_block
+	.section	.text.flash_erase_all,"ax",%progbits
 	.align	1
-	.global	buf_free
+	.global	flash_erase_all
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_free, %function
-buf_free:
+	.type	flash_erase_all, %function
+flash_erase_all:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r1, r0
-	ldrb	r3, [r0, #2]	@ zero_extendqisi2
-	and	r3, r3, #8
-	strb	r3, [r0, #2]
-	cbz	r3, .L332
-	ldr	r0, .L334
-	bl	buf_add_tail
-.L333:
-	ldr	r2, .L334+4
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strb	r3, [r2]
-	pop	{r3, pc}
-.L332:
-	ldr	r3, .L334
+	ldr	r3, .L425
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L425+4
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+.L421:
+	ldr	r3, .L425+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	strb	r2, [r0]
-	ldrb	r2, [r0, #1]	@ zero_extendqisi2
-	strb	r2, [r3]
-	b	.L333
-.L335:
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L424
+	movs	r1, #0
+	ldr	r0, .L425+12
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	printf
+.L424:
+	ldr	r2, .L425+16
+	uxth	r3, r5
+	movs	r6, #0
+	ldrb	r8, [r2, r3]	@ zero_extendqisi2
+.L422:
+	uxth	r3, r6
+	cmp	r4, r3
+	bhi	.L423
+	adds	r5, r5, #1
+	b	.L421
+.L423:
+	ldrh	r1, [r7]
+	mov	r0, r8
+	muls	r1, r6, r1
+	adds	r6, r6, #1
+	bl	flash_erase_block
+	b	.L422
+.L426:
 	.align	2
-.L334:
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.size	buf_free, .-buf_free
-	.section	.text.buf_alloc,"ax",%progbits
+.L425:
+	.word	.LANCHOR31
+	.word	.LANCHOR2
+	.word	.LANCHOR18
+	.word	.LC36
+	.word	.LANCHOR30
+	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_start_plane_read,"ax",%progbits
 	.align	1
-	.global	buf_alloc
+	.global	flash_start_plane_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_alloc, %function
-buf_alloc:
+	.type	flash_start_plane_read, %function
+flash_start_plane_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r2, r0
-	ldr	r7, .L342
-	ldrb	r1, [r7]	@ zero_extendqisi2
-	cbnz	r1, .L337
-	movs	r2, #121
-	ldr	r1, .L342+4
-	ldr	r0, .L342+8
-	bl	printf
-.L338:
-	b	.L338
-.L337:
-	ldr	r5, .L342+12
-	ldr	r3, .L342+16
-	ldrb	r6, [r5]	@ zero_extendqisi2
-	add	r0, r6, r6, lsl #1
-	add	r0, r3, r0, lsl #4
-	cbnz	r2, .L339
-	cmp	r1, #1
-	beq	.L341
-.L339:
-	movs	r2, #48
-	subs	r1, r1, #1
-	muls	r2, r6, r2
-	strb	r1, [r7]
-	movs	r1, #1
-	adds	r4, r3, r2
-	ldrb	r6, [r3, r2]	@ zero_extendqisi2
-	strb	r1, [r4, #2]
-	movs	r1, #255
-	strb	r1, [r3, r2]
-	mov	r3, #-1
-	str	r3, [r4, #20]
+	ldr	r3, .L446
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r4, r0, #21, #3
+	ubfx	r6, r0, #0, #21
+	ubfx	r5, r1, #0, #21
+	ubfx	r7, r0, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L428
+	mov	r2, #940
+	ldr	r1, .L446+4
+	ldr	r0, .L446+8
+	bl	printf
+.L428:
+	ldr	r3, .L446+12
+	ldr	fp, .L446+28
+	ldrb	r4, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L446+16
+	mov	r0, r4
+	ldr	r8, [r3]
+	lsl	r10, r4, #8
+	bl	nandc_cs
+	cmp	r7, #0
+	bne	.L429
+	mov	r0, r6
+	bl	slc_phy_page_address_calc
+	mov	r6, r0
+	mov	r0, r5
+	bl	slc_phy_page_address_calc
+	ldr	r3, .L446+20
+	mov	r5, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L430
+	mov	r0, r4
+	bl	zftl_flash_enter_slc_mode
+.L430:
+	ldr	r3, .L446+24
+	ldrb	r2, [r3, #16]	@ zero_extendqisi2
+	mov	r0, r3
+	ldrb	r1, [r3, #8]	@ zero_extendqisi2
+	cmp	r2, #1
+	uxtb	r2, r6
+	bne	.L432
+	add	r4, r8, r10
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r1, [r4, #2056]
+	movs	r1, #0
+	str	r1, [r4, #2052]
+	str	r1, [r4, #2052]
+	str	r2, [r4, #2052]
+	lsrs	r2, r6, #8
+	lsrs	r6, r6, #16
+	str	r2, [r4, #2052]
+	str	r6, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [fp]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L433
+	cbz	r7, .L433
+	str	r7, [r4, #2056]
+.L433:
 	movs	r3, #0
-	strb	r6, [r5]
-	strh	r3, [r4, #34]	@ movhi
-	str	r3, [r4, #8]
-	pop	{r3, r4, r5, r6, r7, pc}
-.L341:
-	mov	r0, r2
-	pop	{r3, r4, r5, r6, r7, pc}
-.L343:
+	add	r8, r8, r10
+	str	r3, [r8, #2056]
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	lsrs	r5, r5, #16
+	str	r3, [r4, #2052]
+	str	r5, [r4, #2052]
+.L445:
+	movs	r3, #48
+	str	r3, [r8, #2056]
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L429:
+	ldr	r3, [fp]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L431
+	add	r3, r8, r10
+	str	r7, [r3, #2056]
+	b	.L430
+.L431:
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	b	.L430
+.L432:
+	add	r3, r8, r10
+	str	r1, [r3, #2056]
+	str	r2, [r3, #2052]
+	lsrs	r2, r6, #8
+	lsrs	r6, r6, #16
+	str	r2, [r3, #2052]
+	ldr	r2, [fp]
+	str	r6, [r3, #2052]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L435
+	cbz	r7, .L435
+	str	r7, [r3, #2056]
+.L435:
+	ldrb	r2, [r0, #9]	@ zero_extendqisi2
+	add	r8, r8, r10
+	str	r2, [r8, #2056]
+	uxtb	r2, r5
+	str	r2, [r3, #2052]
+	lsrs	r2, r5, #8
+	lsrs	r5, r5, #16
+	str	r2, [r3, #2052]
+	str	r5, [r3, #2052]
+	b	.L445
+.L447:
 	.align	2
-.L342:
-	.word	.LANCHOR38
-	.word	.LANCHOR40
+.L446:
+	.word	.LANCHOR18
+	.word	.LANCHOR41
 	.word	.LC0
-	.word	.LANCHOR37
-	.word	.LANCHOR36
-	.size	buf_alloc, .-buf_alloc
-	.section	.text.buf_remove_buf,"ax",%progbits
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR0
+	.word	.LANCHOR20
+	.word	.LANCHOR16
+	.size	flash_start_plane_read, .-flash_start_plane_read
+	.section	.text.flash_set_interface_mode,"ax",%progbits
 	.align	1
-	.global	buf_remove_buf
+	.global	flash_set_interface_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_remove_buf, %function
-buf_remove_buf:
+	.type	flash_set_interface_mode, %function
+flash_set_interface_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldrb	r4, [r1, #1]	@ zero_extendqisi2
-	ldrb	r3, [r0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bne	.L345
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	strb	r3, [r0]
-.L350:
-	movs	r0, #1
-	pop	{r4, r5, pc}
-.L348:
-	mov	r5, r3
-	muls	r3, r2, r3
-	ldrb	r3, [r0, r3]	@ zero_extendqisi2
-	cmp	r4, r3
-	bne	.L347
-	muls	r2, r5, r2
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	strb	r3, [r0, r2]
-	movs	r3, #255
-	strb	r3, [r1]
-	b	.L350
-.L345:
-	ldr	r0, .L351
-	movs	r2, #48
-.L347:
-	cmp	r3, #255
-	bne	.L348
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	ldr	r7, .L491
+	mov	r10, #0
+	ldr	r8, .L491+24
+.L462:
+	ldrb	r5, [r7, r10, lsl #3]	@ zero_extendqisi2
+	cmp	r5, #69
+	beq	.L449
+	cmp	r5, #44
+	beq	.L449
+	add	r3, r5, #119
+	uxtb	r3, r3
+	cmp	r3, #18
+	bhi	.L450
+	ldr	r2, .L491+4
+	lsr	r3, r2, r3
+	lsls	r2, r3, #31
+	bpl	.L450
+.L449:
+	ldr	r3, .L491+8
+	cmp	r6, #1
+	ldr	r4, [r8]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bne	.L451
+	lsls	r3, r1, #31
+	bpl	.L450
+	ldr	r3, .L491+12
+	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L452
+	ldr	r0, .L491+16
+	bl	printf
+.L452:
+	lsl	r3, r10, #8
+	cmp	r5, #44
+	mov	r1, #239
+	add	r2, r4, r3
+	str	r1, [r2, #2056]
+	beq	.L453
+	cmp	r5, #137
+	bne	.L454
+.L453:
+	movs	r1, #1
+	adds	r2, r4, r3
+	str	r1, [r2, #2052]
+	movs	r1, #5
+.L488:
+	add	r4, r4, r3
+	str	r1, [r2, #2048]
+.L490:
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+.L450:
+	add	r10, r10, #1
+	cmp	r10, #4
+	bne	.L462
+	bl	nandc_wait_flash_ready
 	movs	r0, #0
-	pop	{r4, r5, pc}
-.L352:
-	.align	2
-.L351:
-	.word	.LANCHOR36
-	.size	buf_remove_buf, .-buf_remove_buf
-	.section	.text.buf_remove_free,"ax",%progbits
-	.align	1
-	.global	buf_remove_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	buf_remove_free, %function
-buf_remove_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r5, .L357
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbnz	r3, .L354
-	movs	r2, #170
-	ldr	r1, .L357+4
-	ldr	r0, .L357+8
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L454:
+	cmp	r5, #155
+	itett	eq
+	moveq	r1, #1
+	movne	r1, #128
+	streq	r1, [r2, #2052]
+	moveq	r1, #3
+	itt	ne
+	strne	r1, [r2, #2052]
+	movne	r1, #1
+	b	.L488
+.L451:
+	lsls	r2, r1, #29
+	bpl	.L450
+	ldr	r3, .L491+12
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L457
+	ldr	r0, .L491+20
 	bl	printf
-.L355:
-	b	.L355
-.L354:
-	mov	r1, r0
-	ldr	r0, .L357+12
-	bl	buf_remove_buf
-	cmp	r0, #1
-	bne	.L353
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	strb	r3, [r5]
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #1
-	strb	r3, [r4, #2]
-.L353:
-	pop	{r3, r4, r5, pc}
-.L358:
+.L457:
+	lsl	r2, r10, #8
+	cmp	r5, #44
+	mov	r1, #239
+	add	r3, r4, r2
+	str	r1, [r3, #2056]
+	beq	.L458
+	cmp	r5, #137
+	bne	.L459
+.L458:
+	movs	r1, #1
+	adds	r3, r4, r2
+	str	r1, [r3, #2052]
+	movs	r1, #35
+.L489:
+	str	r1, [r3, #2048]
+	add	r4, r4, r2
+	b	.L490
+.L459:
+	cmp	r5, #155
+	itett	eq
+	moveq	r1, #1
+	movne	r1, #128
+	streq	r1, [r3, #2052]
+	moveq	r1, #37
+	itt	ne
+	strne	r1, [r3, #2052]
+	movne	r1, #0
+	b	.L489
+.L492:
 	.align	2
-.L357:
-	.word	.LANCHOR38
-	.word	.LANCHOR41
-	.word	.LC0
-	.word	.LANCHOR37
-	.size	buf_remove_free, .-buf_remove_free
-	.section	.text.flash_check_bad_block,"ax",%progbits
+.L491:
+	.word	.LANCHOR42
+	.word	294913
+	.word	.LANCHOR43
+	.word	.LANCHOR14
+	.word	.LC37
+	.word	.LC38
+	.word	.LANCHOR13
+	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.flash_reset,"ax",%progbits
 	.align	1
-	.global	flash_check_bad_block
+	.global	flash_reset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_check_bad_block, %function
-flash_check_bad_block:
+	.type	flash_reset, %function
+flash_reset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L360
-	push	{r4, lr}
-	lsrs	r4, r1, #5
-	and	r1, r1, #31
-	ldrb	r3, [r2, #13]	@ zero_extendqisi2
-	ldrh	r2, [r2, #14]
-	smulbb	r3, r3, r2
-	ldr	r2, .L360+4
-	uxth	r3, r3
-	ldr	r2, [r2]
-	adds	r3, r3, #31
-	asrs	r3, r3, #5
-	add	r2, r2, r4, lsl #2
-	lsls	r3, r3, #2
-	uxth	r3, r3
-	mla	r0, r0, r3, r2
-	ldr	r0, [r0, #912]
-	lsrs	r0, r0, r1
-	and	r0, r0, #1
-	pop	{r4, pc}
-.L361:
+	@ link register save eliminated.
+	ldr	r3, .L494
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #8
+	movs	r3, #255
+	str	r3, [r0, #2056]
+	b	nandc_wait_flash_ready
+.L495:
 	.align	2
-.L360:
-	.word	.LANCHOR19
-	.word	.LANCHOR5
-	.size	flash_check_bad_block, .-flash_check_bad_block
-	.section	.text.flash_mask_bad_block,"ax",%progbits
+.L494:
+	.word	.LANCHOR13
+	.size	flash_reset, .-flash_reset
+	.section	.text.flash_read_id,"ax",%progbits
 	.align	1
-	.global	flash_mask_bad_block
+	.global	flash_read_id
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_mask_bad_block, %function
-flash_mask_bad_block:
+	.type	flash_read_id, %function
+flash_read_id:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L363
-	mov	r2, r1
-	push	{r4, r5, r6, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
 	mov	r5, r0
-	mov	r6, r1
-	mov	r1, r0
-	ldrb	r4, [r3, #13]	@ zero_extendqisi2
-	ldrh	r3, [r3, #14]
-	ldr	r0, .L363+4
-	smulbb	r4, r4, r3
+	ldr	r3, .L498
+	mov	r4, r1
+	ldr	r6, [r3]
+	bl	flash_reset
+	mov	r0, r5
+	bl	nandc_cs
+	add	r6, r6, r5, lsl #8
+	movs	r3, #144
+	movs	r0, #200
+	str	r3, [r6, #2056]
+	movs	r3, #0
+	str	r3, [r6, #2052]
+	bl	timer_delay_ns
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #1]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #2]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #3]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #4]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #5]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #6]
+	ldr	r3, [r6, #2048]
+	strb	r3, [r4, #7]
+	bl	nandc_de_cs.constprop.29
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L496
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L498+4
+	str	r1, [sp, #12]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	str	r1, [sp]
+	adds	r1, r5, #1
 	bl	printf
-	uxth	r4, r4
-	ldr	r3, .L363+8
-	add	r0, r4, #31
-	asrs	r0, r0, #5
-	ldr	r2, [r3]
-	movs	r3, #1
-	lsls	r0, r0, #2
-	uxth	r0, r0
-	muls	r0, r5, r0
-	lsrs	r5, r6, #5
-	and	r6, r6, #31
-	lsl	r6, r3, r6
-	add	r0, r0, #912
-	add	r0, r0, r5, lsl #2
-	ldr	r3, [r2, r0]
-	orrs	r3, r3, r6
-	str	r3, [r2, r0]
+.L496:
+	add	sp, sp, #16
+	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L364:
+.L499:
 	.align	2
-.L363:
-	.word	.LANCHOR19
-	.word	.LC6
-	.word	.LANCHOR5
-	.size	flash_mask_bad_block, .-flash_mask_bad_block
-	.section	.text.ftl_gc_write_buf,"ax",%progbits
+.L498:
+	.word	.LANCHOR13
+	.word	.LC39
+	.size	flash_read_id, .-flash_read_id
+	.section	.text.flash_read_spare,"ax",%progbits
 	.align	1
-	.global	ftl_gc_write_buf
+	.global	flash_read_spare
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_gc_write_buf, %function
-ftl_gc_write_buf:
+	.type	flash_read_spare, %function
+flash_read_spare:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r1, r0
-	ldrb	r3, [r0, #2]	@ zero_extendqisi2
-	orr	r3, r3, #2
-	strb	r3, [r0, #2]
-	ldr	r0, .L366
-	bl	buf_add_tail
-	ldr	r3, .L366+4
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	adds	r0, r0, #1
-	uxtb	r0, r0
-	strb	r0, [r3]
-	pop	{r3, pc}
-.L367:
+	push	{r3, r4, r5, lr}
+	mov	r5, r2
+	ldr	r3, .L501
+	ldr	r2, .L501+4
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	ldr	r4, [r2]
+	movs	r2, #0
+	lsls	r3, r3, #9
+	add	r4, r4, r0, lsl #8
+	str	r2, [r4, #2056]
+	str	r3, [r4, #2052]
+	lsrs	r3, r3, #8
+	str	r3, [r4, #2052]
+	uxtb	r3, r1
+	str	r3, [r4, #2052]
+	lsrs	r3, r1, #8
+	lsrs	r1, r1, #16
+	str	r3, [r4, #2052]
+	movs	r3, #48
+	str	r1, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5]
+	pop	{r3, r4, r5, pc}
+.L502:
 	.align	2
-.L366:
-	.word	.LANCHOR42
-	.word	.LANCHOR43
-	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
-	.section	.text.ftl_write_buf,"ax",%progbits
+.L501:
+	.word	.LANCHOR31
+	.word	.LANCHOR13
+	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.flash_read_otp_data,"ax",%progbits
 	.align	1
-	.global	ftl_write_buf
+	.global	flash_read_otp_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_buf, %function
-ftl_write_buf:
+	.type	flash_read_otp_data, %function
+flash_read_otp_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	cbnz	r0, .L369
-	movw	r2, #539
-	ldr	r1, .L375
-	ldr	r0, .L375+4
+	ldr	r3, .L506
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	lsl	r8, r8, #8
+	mov	r6, r1
+	mov	r5, r2
+	ldr	r7, [r3]
+	mov	fp, #144
+	bl	nandc_cs
+	movs	r3, #239
+	movs	r0, #50
+	add	r4, r7, r8
+	mov	r10, #0
+	str	r3, [r4, #2056]
+	str	fp, [r4, #2052]
+	bl	timer_delay_ns
+	movs	r3, #1
+	str	r3, [r4, #2048]
+	str	r10, [r4, #2048]
+	str	r10, [r4, #2048]
+	str	r10, [r4, #2048]
+	bl	nandc_wait_flash_ready
+	movs	r3, #238
+	ldr	r0, .L506+4
+	str	r3, [r4, #2056]
+	str	fp, [r4, #2052]
+	ldr	r2, [r4, #2048]
+	ldr	r3, [r4, #2048]
+	ldr	r1, [r4, #2048]
+	str	r1, [sp]
+	mov	r1, r6
 	bl	printf
-.L370:
-	b	.L370
-.L369:
-	ldr	r2, .L375+8
-	ldrb	r3, [r0, #40]	@ zero_extendqisi2
-	ldrb	r2, [r2]	@ zero_extendqisi2
+	bl	nandc_wait_flash_ready
+	uxtb	r3, r6
+	str	r10, [r4, #2056]
+	str	r10, [r4, #2052]
+	str	r10, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsrs	r3, r6, #8
+	lsrs	r6, r6, #16
+	str	r3, [r4, #2052]
+	movs	r3, #48
+	str	r6, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	add	r3, r5, #16384
+	mov	r2, r5
+.L504:
+	ldr	r1, [r4, #2048]
+	strb	r1, [r2], #1
 	cmp	r2, r3
-	bcs	.L371
-	mov	r2, #544
-	ldr	r1, .L375
-	ldr	r0, .L375+4
-	bl	printf
-.L372:
-	b	.L372
-.L371:
-	ldr	r5, .L375+12
-	cbnz	r3, .L373
-	bl	buf_free
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	pop	{r3, r4, r5, pc}
-.L373:
-	mov	r1, r0
-	ldr	r0, .L375+16
-	bl	buf_add_tail
-	ldr	r3, .L375+20
-	ldrb	r1, [r4, #40]	@ zero_extendqisi2
-	ldrb	r0, [r5]	@ zero_extendqisi2
+	bne	.L504
+	add	r7, r7, r8
+	movs	r3, #239
+	str	r3, [r7, #2056]
+	movs	r3, #144
+	str	r3, [r4, #2052]
+	movs	r0, #50
+	bl	timer_delay_ns
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L507:
+	.align	2
+.L506:
+	.word	.LANCHOR13
+	.word	.LC40
+	.size	flash_read_otp_data, .-flash_read_otp_data
+	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
+	.align	1
+	.global	sandisk_prog_test_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sandisk_prog_test_bad_block, %function
+sandisk_prog_test_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	lsls	r0, r0, #8
+	ldr	r3, .L518
+	mov	r5, r1
+	ldr	r4, [r3]
+	ldr	r3, .L518+4
+	ldrb	r3, [r3, #29]	@ zero_extendqisi2
+	cbz	r3, .L509
+	adds	r2, r4, r0
+	str	r3, [r2, #2056]
+.L510:
+	add	r4, r4, r0
+	movs	r3, #128
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	movs	r3, #16
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	movs	r3, #112
+	movs	r0, #80
+	str	r3, [r4, #2056]
+	bl	timer_delay_ns
+	ldr	r2, [r4, #2048]
+	ands	r4, r2, #5
+	beq	.L508
+	ldr	r3, .L518+8
 	ldr	r3, [r3]
-	adds	r0, r0, #1
-	ldr	r2, [r3, #16]
-	uxtb	r0, r0
-	strb	r0, [r5]
-	add	r2, r2, r1
-	str	r2, [r3, #16]
-	ldr	r2, [r3, #32]
-	adds	r2, r2, #1
-	str	r2, [r3, #32]
+	lsls	r3, r3, #19
+	bpl	.L508
+	mov	r1, r5
+	ldr	r0, .L518+12
+	bl	printf
+.L508:
+	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L376:
+.L509:
+	adds	r3, r4, r0
+	movs	r2, #162
+	str	r2, [r3, #2056]
+	b	.L510
+.L519:
 	.align	2
-.L375:
-	.word	.LANCHOR44
-	.word	.LC0
-	.word	.LANCHOR45
-	.word	.LANCHOR43
-	.word	.LANCHOR42
-	.word	.LANCHOR46
-	.size	ftl_write_buf, .-ftl_write_buf
-	.section	.text.ftl_cache_flush,"ax",%progbits
+.L518:
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.word	.LANCHOR14
+	.word	.LC41
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_rdy_status,"ax",%progbits
 	.align	1
-	.global	ftl_cache_flush
+	.global	nandc_rdy_status
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_cache_flush, %function
-ftl_cache_flush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	nandc_rdy_status, %function
+nandc_rdy_status:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	ldr	r3, .L521
+	sub	sp, sp, #8
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r0, [sp, #4]
+	ubfx	r0, r0, #9, #1
+	add	sp, sp, #8
+	@ sp needed
 	bx	lr
-	.size	ftl_cache_flush, .-ftl_cache_flush
-	.section	.text.ftl_read_buf,"ax",%progbits
+.L522:
+	.align	2
+.L521:
+	.word	.LANCHOR13
+	.size	nandc_rdy_status, .-nandc_rdy_status
+	.section	.text.nandc_bch_sel,"ax",%progbits
 	.align	1
-	.global	ftl_read_buf
+	.global	nandc_bch_sel
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read_buf, %function
-ftl_read_buf:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r3, .L389
-	ldr	r3, [r3]
-	cmp	r3, r0
-	bhi	.L379
-	movw	r2, #771
-	ldr	r1, .L389+4
-	ldr	r0, .L389+8
-	bl	printf
-.L380:
-	b	.L380
-.L379:
-	ldr	r3, .L389+12
-	movs	r4, #0
-	mov	r5, r3
-.L383:
-	ldr	r2, [r3, #20]
-	cmp	r0, r2
-	bne	.L381
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	tst	r2, #8
-	beq	.L381
-	movs	r3, #48
-	mla	r4, r3, r4, r5
-	orr	r3, r2, #4
-	strb	r3, [r4, #2]
-	lsls	r3, r2, #31
-	bmi	.L378
-	mov	r0, r4
-	bl	buf_remove_free
-.L378:
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L381:
-	adds	r4, r4, #1
-	adds	r3, r3, #48
-	cmp	r4, #32
-	bne	.L383
-	ldr	r3, .L389+16
-	movs	r4, #0
-	ldr	r2, [r3]
-	adds	r2, r2, #1
-	ittt	eq
-	streq	r0, [r3]
-	ldreq	r3, .L389+20
-	streq	r1, [r3]
-	b	.L378
-.L390:
-	.align	2
-.L389:
-	.word	.LANCHOR47
-	.word	.LANCHOR48
-	.word	.LC0
-	.word	.LANCHOR36
-	.word	.LANCHOR49
-	.word	.LANCHOR50
-	.size	ftl_read_buf, .-ftl_read_buf
-	.section	.text.ftl_read_buf_free,"ax",%progbits
-	.align	1
-	.global	ftl_read_buf_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read_buf_free, %function
-ftl_read_buf_free:
+	.type	nandc_bch_sel, %function
+nandc_bch_sel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r1, .L537
+	movs	r2, #0
 	push	{r4, lr}
-	mov	r1, r0
-	mov	r4, r0
-	ldr	r0, .L395
-	bl	buf_remove_buf
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	lsls	r2, r3, #30
-	bpl	.L392
-	bic	r3, r3, #4
-	strb	r3, [r4, #2]
+	movs	r3, #1
+	strb	r0, [r1]
+	ldr	r1, .L537+4
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #9
+	ldr	r1, .L537+8
+	ldr	r1, [r1]
+	bne	.L524
+	cmp	r0, #70
+	str	r3, [r1, #16]
+	beq	.L525
+	cmp	r0, #60
+	beq	.L532
+	cmp	r0, #40
+	ite	eq
+	moveq	r2, #2
+	movne	r2, r3
+.L525:
+	lsls	r3, r2, #25
+	orr	r3, r3, #1
+	str	r3, [r1, #32]
 	pop	{r4, pc}
-.L392:
-	mov	r0, r4
-	pop	{r4, lr}
-	b	buf_free
-.L396:
+.L532:
+	movs	r2, #3
+	b	.L525
+.L524:
+	movs	r4, #16
+	str	r3, [r1, #8]
+	cmp	r0, r4
+	mov	r3, r2
+	bfi	r3, r4, #8, #8
+	bfi	r3, r2, #18, #1
+	bne	.L527
+.L530:
+	bfc	r3, #4, #1
+.L528:
+	orr	r3, r3, #1
+	str	r3, [r1, #12]
+	pop	{r4, pc}
+.L527:
+	cmp	r0, #24
+	bne	.L529
+	orr	r3, r3, #16
+	b	.L528
+.L529:
+	cmp	r0, #40
+	orr	r3, r3, #262144
+	orr	r3, r3, #16
+	bne	.L528
+	b	.L530
+.L538:
 	.align	2
-.L395:
-	.word	.LANCHOR51
-	.size	ftl_read_buf_free, .-ftl_read_buf_free
-	.section	.text.ftl_get_density,"ax",%progbits
+.L537:
+	.word	.LANCHOR44
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_bch_sel, .-nandc_bch_sel
+	.section	.text.zftl_nandc_get_irq_status,"ax",%progbits
 	.align	1
-	.global	ftl_get_density
+	.global	zftl_nandc_get_irq_status
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_density, %function
-ftl_get_density:
+	.type	zftl_nandc_get_irq_status, %function
+zftl_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	cbnz	r0, .L398
-	ldr	r3, .L401
-	ldr	r0, [r3]
-	bx	lr
-.L398:
-	cmp	r0, #4
-	ite	cc
-	movcc	r0, #8192
-	movcs	r0, #0
+	ldr	r3, .L542
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ite	eq
+	ldreq	r0, [r0, #296]
+	ldrne	r0, [r0, #372]
 	bx	lr
-.L402:
+.L543:
 	.align	2
-.L401:
-	.word	.LANCHOR52
-	.size	ftl_get_density, .-ftl_get_density
-	.section	.text.gc_hook,"ax",%progbits
-	.align	1
-	.global	gc_hook
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_hook, %function
-gc_hook:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	gc_hook, .-gc_hook
-	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+.L542:
+	.word	.LANCHOR28
+	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
-	.global	FtlGetCurEraseBlock
+	.global	rk_nandc_flash_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetCurEraseBlock, %function
-FtlGetCurEraseBlock:
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L405
-	ldrh	r0, [r3]
 	bx	lr
-.L406:
-	.align	2
-.L405:
-	.word	.LANCHOR53
-	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
-	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.nandc_iqr_wait_flash_ready,"ax",%progbits
 	.align	1
-	.global	FtlGetAllBlockNum
+	.global	nandc_iqr_wait_flash_ready
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetAllBlockNum, %function
-FtlGetAllBlockNum:
+	.type	nandc_iqr_wait_flash_ready, %function
+nandc_iqr_wait_flash_ready:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L408
-	ldrh	r0, [r3]
 	bx	lr
-.L409:
-	.align	2
-.L408:
-	.word	.LANCHOR54
-	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
-	.section	.text.FtlLowFormat,"ax",%progbits
+	.size	nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
-	.global	FtlLowFormat
+	.global	rk_nandc_flash_xfer_completed
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormat, %function
-FtlLowFormat:
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	movs	r0, #0
 	bx	lr
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.gc_add_sblk,"ax",%progbits
-	.align	1
-	.global	gc_add_sblk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_add_sblk, %function
-gc_add_sblk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L438
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	r5, r0
-	sub	sp, sp, #20
-	mov	r6, r1
-	mov	r7, r2
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L412
-	movs	r2, #240
-	ldr	r1, .L438+4
-	ldr	r0, .L438+8
-	bl	printf
-.L413:
-	b	.L413
-.L412:
-	ldr	r3, .L438+12
-	lsl	r8, r0, #2
-	ldr	r10, .L438+36
-	ldr	r3, [r3]
-	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L438+16
-	ldr	r3, [r3]
-	tst	r3, #256
-	beq	.L414
-	ldr	r2, .L438+20
-	ldr	r3, [r10]
-	ldrh	r2, [r2]
-	add	r3, r3, r8
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	ldr	r2, .L438+24
-	lsrs	r3, r3, #5
-	ldrh	r2, [r2, #52]
-	str	r4, [sp]
-	str	r2, [sp, #4]
-	mov	r2, r1
-	mov	r1, r0
-	ldr	r0, .L438+28
-	bl	printf
-.L414:
-	ldr	r3, [r10]
-	add	r3, r3, r8
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	bne	.L415
-	cmp	r4, #0
-	beq	.L429
-	movs	r2, #245
-	ldr	r1, .L438+4
-	ldr	r0, .L438+8
-	bl	printf
-.L417:
-	b	.L417
-.L415:
-	ldr	r3, .L438+24
-	ldrh	r2, [r3]
-	cmp	r2, r5
-	beq	.L429
-	ldr	r2, .L438+32
-	ldr	r2, [r2]
-	ldrh	r1, [r2, #48]
-	cmp	r1, r5
-	beq	.L429
-	ldrh	r1, [r2, #16]
-	cmp	r1, r5
-	beq	.L429
-	ldrh	r1, [r2, #80]
-	cmp	r1, r5
-	beq	.L429
-	ldrh	r0, [r3, #52]!
-	movs	r1, #0
-.L418:
-	cmp	r1, r0
-	bcc	.L419
-	add	r3, r2, r7, lsl #7
-	adds	r3, r3, #136
-	cbz	r6, .L420
-	add	r3, r2, #392
-.L420:
-	add	r0, r3, #128
-	movw	r4, #65535
-.L423:
-	mov	r1, r3
-	adds	r3, r3, #2
-	ldrh	ip, [r1]
-	cmp	ip, r4
-	bne	.L421
-	strh	r5, [r1]	@ movhi
-	cbz	r6, .L422
-	ldrh	r3, [r2, #124]
-	adds	r3, r3, #1
-	strh	r3, [r2, #124]	@ movhi
-.L437:
-	movs	r0, #1
-.L411:
-	add	sp, sp, #20
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L419:
-	ldrh	r4, [r3, #2]!
-	cmp	r4, r5
-	beq	.L429
-	adds	r1, r1, #1
-	b	.L418
-.L422:
-	add	r2, r2, r7, lsl #1
-	ldrh	r3, [r2, #120]
-	adds	r3, r3, #1
-	strh	r3, [r2, #120]	@ movhi
-	b	.L437
-.L421:
-	cmp	r0, r3
-	bne	.L423
-	b	.L437
-.L429:
-	movs	r0, #0
-	b	.L411
-.L439:
-	.align	2
-.L438:
-	.word	.LANCHOR54
-	.word	.LANCHOR55
-	.word	.LC0
-	.word	.LANCHOR56
-	.word	.LANCHOR22
-	.word	.LANCHOR58
-	.word	.LANCHOR59
-	.word	.LC7
-	.word	.LANCHOR60
-	.word	.LANCHOR57
-	.size	gc_add_sblk, .-gc_add_sblk
-	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.nandc_xfer_start,"ax",%progbits
 	.align	1
-	.global	gc_get_src_ppa_from_index
+	.global	nandc_xfer_start
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_get_src_ppa_from_index, %function
-gc_get_src_ppa_from_index:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L441
-	ldr	r3, [r3]
-	ldr	r0, [r3, r0, lsl #2]
-	bx	lr
-.L442:
-	.align	2
-.L441:
-	.word	.LANCHOR61
-	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
-	.section	.text.gc_write_completed,"ax",%progbits
-	.align	1
-	.global	gc_write_completed
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_write_completed, %function
-gc_write_completed:
-	@ args = 0, pretend = 0, frame = 8
+	.type	nandc_xfer_start, %function
+nandc_xfer_start:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r6, .L465
-.L444:
-	ldr	r1, .L465+4
-	ldrb	r5, [r1]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L457
+	mov	r7, r0
+	ldr	r0, .L563
+	adds	r6, r1, #1
+	ldr	r5, .L563+4
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r10, .L563+24
+	cmp	r0, #9
+	bne	.L548
+	movs	r4, #0
+	movs	r1, #1
+	bfi	r4, r7, #1, #1
+	asrs	r6, r6, r1
+	orr	r4, r4, #8
+	bfi	r4, r1, #5, #2
+	ldr	r1, .L563+8
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bfc	r4, #4, #1
+	bfi	r4, r6, #22, #6
+	orr	r4, r4, #128
+	cbz	r1, .L549
+	ldr	r1, .L563+12
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L549
+	orr	r4, r4, #512
+.L549:
+	add	r1, r2, #63
+	and	r6, r6, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	add	r1, r1, r6, lsl #10
+	str	r2, [r5, #4]
+	str	r3, [r5, #8]
+	clz	r7, r7
+	str	r2, [r5, #12]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #2
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #52]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #56]
+	ldr	r3, [r2, #48]
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	ldr	r1, .L563+16
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	ldrh	r1, [r1]
+	orr	r3, r3, #1
+	bfi	r3, r1, #16, #11
+	str	r3, [r2, #48]
+	str	r4, [r2, #16]
+	orr	r4, r4, #4
+	str	r4, [r2, #16]
+.L547:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L457:
-	movs	r3, #48
-	muls	r3, r5, r3
-	adds	r2, r6, r3
-	ldrb	r3, [r6, r3]	@ zero_extendqisi2
-	ldrh	r4, [r2, #32]
-	strb	r3, [r1]
-	ldr	r1, [r2, #36]
-	cbz	r1, .L445
-	ldr	r3, .L465+8
+.L548:
+	ldr	r0, [r10]
+	movs	r4, #0
+	bfi	r4, r7, #1, #1
+	orr	r4, r4, #8
+	ldr	r8, [r0, #12]
+	movs	r0, #16
+	bfi	r8, r0, #8, #8
 	movs	r0, #1
-	ldr	r2, [r2, #24]
-	strh	r0, [r3, #314]	@ movhi
-	ldr	r0, .L465+12
-	str	r2, [r3, #316]
-	bl	printf
-	mov	r2, #502
-	ldr	r1, .L465+16
-	ldr	r0, .L465+20
-	bl	printf
-.L446:
-	b	.L446
-.L445:
-	ldr	fp, .L465+40
-	ldr	r10, .L465+44
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, #3
-	itett	eq
-	ldreq	r3, .L465+24
-	movne	r7, #1
-	ldreq	r3, [r3]
-	ldrbeq	r7, [r3, #89]	@ zero_extendqisi2
-	ldr	r3, .L465+28
-	ldr	r3, [r3]
-	it	eq
-	addeq	r7, r7, r7, lsl #1
-	tst	r3, #256
-	beq	.L448
-	movs	r3, #48
-	mov	r1, r4
-	mla	r3, r3, r5, r6
-	ldr	r0, .L465+32
-	ldrb	r2, [r3, #1]	@ zero_extendqisi2
-	ldr	r3, [r10]
-	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, r4
-	bl	printf
-.L448:
-	movs	r2, #48
-	ldr	r3, [r10]
-	mla	r5, r2, r5, r6
-	ldrb	r1, [r3, r4]	@ zero_extendqisi2
-	adds	r0, r3, r4
-	mov	r8, r4
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	cmp	r1, r3
-	beq	.L449
-	movw	r2, #509
-	ldr	r1, .L465+16
-	ldr	r0, .L465+20
-	bl	printf
-.L450:
-	b	.L450
-.L449:
-	ldrb	r3, [r5, #45]	@ zero_extendqisi2
-	cmp	r3, #3
-	beq	.L451
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L451
-	ldr	r3, .L465+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L451
-	mov	r4, r3
-.L452:
-	uxth	r1, r3
-	cmp	r7, r1
-	bls	.L444
-	ldrb	r1, [r0, r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	mla	r1, r2, r1, r6
-	strb	r4, [r1, #45]
-	b	.L452
-.L451:
-	ldr	r5, .L465+8
-	mov	fp, #255
-	movs	r3, #48
-	strh	r4, [r5, #312]	@ movhi
-.L453:
-	sub	r2, r8, r4
-	uxth	r2, r2
-	cmp	r7, r2
-	bls	.L444
-	ldr	r2, [r10]
+	bfi	r4, r0, #5, #2
+	asrs	r6, r6, r0
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	bfc	r8, #3, #1
+	bfc	r4, #4, #1
+	bfc	r8, #5, #3
+	str	r6, [sp]
+	bfi	r4, r6, #22, #6
+	cmp	r7, #0
+	beq	.L551
+	ldr	r0, .L563+20
+	lsrs	r1, r1, #1
+	str	r1, [sp, #8]
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r1, [r5]
+	cmp	r0, #24
+	ite	hi
+	movhi	r0, #128
+	movls	r0, #64
+	str	r1, [sp, #12]
 	movs	r1, #0
-	str	r3, [sp, #12]
-	ldrb	r0, [r2, r8]	@ zero_extendqisi2
-	strb	fp, [r2, r8]
-	add	r8, r8, #1
-	mla	r2, r3, r0, r6
-	add	r0, r0, r0, lsl #1
-	strb	r1, [r2, #45]
-	add	r0, r6, r0, lsl #4
-	bl	buf_free
-	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	subs	r2, r2, #1
-	strb	r2, [r5, #7]
-	b	.L453
-.L466:
+	str	r0, [sp, #4]
+	mov	r0, r1
+.L553:
+	ldr	r6, [sp, #4]
+	add	fp, r3, r0, lsl #2
+	add	lr, r6, r1
+	ldr	r6, [sp, #8]
+	cmp	r0, r6
+	blt	.L554
+.L555:
+	ldr	r3, [r5]
+	add	r1, r2, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	str	r2, [r5, #4]
+	clz	r7, r7
+	str	r3, [r5, #8]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	ldr	r3, [sp]
+	str	r2, [r5, #12]
+	and	r6, r3, #63
+	add	r1, r1, r6, lsl #10
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #7
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #20]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #24]
+	movs	r3, #0
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	orr	r3, r3, #1
+	str	r3, [r2, #16]
+	str	r8, [r2, #12]
+	str	r4, [r2, #8]
+	orr	r4, r4, #4
+	str	r4, [r2, #8]
+	b	.L547
+.L554:
+	ldrh	ip, [r3, r0, lsl #2]
+	bic	r1, r1, #3
+	ldrh	fp, [fp, #2]
+	adds	r0, r0, #1
+	ldr	r6, [sp, #12]
+	orr	ip, ip, fp, lsl #16
+	str	ip, [r6, r1]
+	mov	r1, lr
+	b	.L553
+.L551:
+	ldr	r3, [r5]
+	str	r0, [r3]
+	b	.L555
+.L564:
 	.align	2
-.L465:
-	.word	.LANCHOR36
-	.word	.LANCHOR62
-	.word	.LANCHOR59
-	.word	.LC8
-	.word	.LANCHOR63
-	.word	.LC0
-	.word	.LANCHOR60
-	.word	.LANCHOR22
-	.word	.LC9
-	.word	.LANCHOR66
-	.word	.LANCHOR64
-	.word	.LANCHOR65
-	.size	gc_write_completed, .-gc_write_completed
-	.section	.text.gc_get_src_blk,"ax",%progbits
+.L563:
+	.word	.LANCHOR28
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR46
+	.word	.LANCHOR48
+	.word	.LANCHOR44
+	.word	.LANCHOR13
+	.size	nandc_xfer_start, .-nandc_xfer_start
+	.section	.text.nandc_set_seed,"ax",%progbits
 	.align	1
-	.global	gc_get_src_blk
+	.global	nandc_set_seed
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_get_src_blk, %function
-gc_get_src_blk:
+	.type	nandc_set_seed, %function
+nandc_set_seed:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L476
-	push	{r4, r5, r6, r7, lr}
-	ldr	r2, [r3]
-	ldr	r3, .L476+4
-	ldrh	r4, [r2, #124]
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbz	r4, .L468
-	add	r3, r2, #392
-	movs	r4, #1
-.L469:
-	add	r6, r3, #128
-	movw	r5, #65535
-.L473:
-	mov	r7, r3
-	ldrh	r0, [r3], #2
-	cmp	r0, r5
-	beq	.L471
-	strh	r5, [r7]	@ movhi
-	cbz	r4, .L472
-	ldrh	r3, [r2, #124]
-	subs	r3, r3, #1
-	strh	r3, [r2, #124]	@ movhi
-	pop	{r4, r5, r6, r7, pc}
-.L468:
-	add	r3, r1, #60
-	ldrh	r3, [r2, r3, lsl #1]
-	cbz	r3, .L474
-	add	r3, r2, r1, lsl #7
-	adds	r3, r3, #136
-	b	.L469
-.L472:
-	add	r2, r2, r1, lsl #1
-	ldrh	r3, [r2, #120]
-	subs	r3, r3, #1
-	strh	r3, [r2, #120]	@ movhi
-	pop	{r4, r5, r6, r7, pc}
-.L471:
-	cmp	r3, r6
-	bne	.L473
-	pop	{r4, r5, r6, r7, pc}
-.L474:
-	movw	r0, #65535
-	pop	{r4, r5, r6, r7, pc}
-.L477:
+	@ link register save eliminated.
+	ldr	r2, .L572
+	and	r0, r0, #127
+	ldr	r3, .L572+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r2, .L566
+	orr	r3, r3, #-1073741824
+.L566:
+	ldr	r2, .L572+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #9
+	ldr	r2, .L572+12
+	ldr	r2, [r2]
+	ite	eq
+	streq	r3, [r2, #520]
+	strne	r3, [r2, #336]
+	bx	lr
+.L573:
 	.align	2
-.L476:
-	.word	.LANCHOR60
-	.word	.LANCHOR67
-	.size	gc_get_src_blk, .-gc_get_src_blk
-	.section	.text.gc_free_temp_buf,"ax",%progbits
+.L572:
+	.word	.LANCHOR46
+	.word	.LANCHOR49
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.size	nandc_set_seed, .-nandc_set_seed
+	.section	.text.zftl_flash_de_init,"ax",%progbits
 	.align	1
-	.global	gc_free_temp_buf
+	.global	zftl_flash_de_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_free_temp_buf, %function
-gc_free_temp_buf:
+	.type	zftl_flash_de_init, %function
+zftl_flash_de_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r5, .L492
-	ldrb	r0, [r5, #7]	@ zero_extendqisi2
-	cbz	r0, .L478
-	ldr	r3, .L492+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #1
-	bhi	.L485
-	ldr	r3, .L492+8
-	movs	r7, #48
-	ldrh	r4, [r5, #312]
-	ldr	r6, .L492+12
-	ldrh	r2, [r3]
-	ldr	r3, .L492+16
-	add	r1, r4, #24
-	ldr	r0, .L492+20
+	push	{r4, lr}
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L590
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	cmp	r2, r1
-	it	cs
-	movcs	r2, r1
-	ldr	r1, [r6]
-.L480:
-	cmp	r4, r2
-	bcc	.L483
-.L485:
+	cbz	r3, .L575
+	ldr	r3, .L590+4
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cbnz	r0, .L575
+	bl	zftl_flash_exit_slc_mode
+.L575:
+	ldr	r4, .L590+8
 	movs	r0, #0
-.L478:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L483:
-	ldrb	r3, [r1, r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L481
-	mla	ip, r7, r3, r0
-	ldrb	ip, [ip, #45]	@ zero_extendqisi2
-	cmp	ip, #0
-	bne	.L481
-	add	r3, r3, r3, lsl #1
-	add	r0, r0, r3, lsl #4
-	bl	buf_free
-	ldr	r3, .L492+24
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L482
-	ldr	r3, [r6]
-	mov	r1, r4
-	ldr	r0, .L492+28
-	ldrb	r2, [r3, r4]	@ zero_extendqisi2
-	bl	printf
-.L482:
-	ldr	r3, [r6]
-	movs	r2, #255
+	bl	hynix_reconfig_rr_para
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L576
+	ldr	r3, .L590+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L576
 	movs	r0, #1
-	strb	r2, [r3, r4]
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	strb	r3, [r5, #7]
-	pop	{r3, r4, r5, r6, r7, pc}
-.L481:
-	adds	r4, r4, #1
-	b	.L480
-.L493:
+	bl	flash_set_interface_mode
+	movs	r0, #1
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L576:
+	ldr	r1, .L590+16
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cbz	r3, .L577
+	movs	r0, #0
+	strb	r0, [r1]
+	bl	nandc_set_seed
+	movs	r3, #1
+	strb	r3, [r1]
+.L577:
+	movs	r0, #0
+	pop	{r4, pc}
+.L591:
 	.align	2
-.L492:
-	.word	.LANCHOR59
-	.word	.LANCHOR38
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR69
-	.word	.LANCHOR36
-	.word	.LANCHOR22
-	.word	.LC10
-	.size	gc_free_temp_buf, .-gc_free_temp_buf
-	.section	.text.gc_static_wearleveling,"ax",%progbits
+.L590:
+	.word	.LANCHOR0
+	.word	.LANCHOR19
+	.word	.LANCHOR21
+	.word	.LANCHOR43
+	.word	.LANCHOR46
+	.size	zftl_flash_de_init, .-zftl_flash_de_init
+	.section	.text.nandc_randomizer_enable,"ax",%progbits
 	.align	1
-	.global	gc_static_wearleveling
+	.global	nandc_randomizer_enable
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_static_wearleveling, %function
-gc_static_wearleveling:
-	@ args = 0, pretend = 0, frame = 8
+	.type	nandc_randomizer_enable, %function
+nandc_randomizer_enable:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L542
-	ldr	r4, [r3]
-	ldr	r3, [r4, #32]
-	cmp	r3, #20480
-	bls	.L495
-	ldr	r2, [r4, #36]
-	add	r2, r2, r3, lsr #10
-	ubfx	r3, r3, #0, #10
-	str	r3, [r4, #32]
-	str	r2, [r4, #36]
-.L495:
-	ldr	r3, .L542+4
-	ldr	r0, [r4, #36]
-	ldr	r3, [r3]
-	ldr	r2, [r3, #568]
-	ldr	r1, [r3, #12]
-	add	r2, r2, #12910592
-	add	r2, r2, #49408
-	cmp	r1, r2
-	bhi	.L496
-	ldr	r2, [r3, #572]
-	adds	r2, r2, #128
-	cmp	r0, r2
-	bls	.L494
-.L496:
-	str	r0, [r3, #572]
-	movw	r6, #65535
-	str	r1, [r3, #568]
-	movs	r0, #0
-	ldr	r3, .L542+8
-	mov	r2, r0
-	ldrh	ip, [r4, #134]
-	mov	r8, r0
-	mov	r10, r0
-	mov	fp, r0
-	ldrh	r3, [r3]
-	mov	r7, r0
-	mov	r5, r6
-	str	r3, [sp, #8]
-	ldr	r3, .L542+12
+	@ link register save eliminated.
+	ldr	r3, .L593
+	strb	r0, [r3]
+	bx	lr
+.L594:
+	.align	2
+.L593:
+	.word	.LANCHOR46
+	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
+	.section	.text.nandc_get_chip_if,"ax",%progbits
+	.align	1
+	.global	nandc_get_chip_if
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_get_chip_if, %function
+nandc_get_chip_if:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L596
+	adds	r0, r0, #8
 	ldr	r3, [r3]
-	add	r3, r3, ip, lsl #2
-.L498:
-	ldr	r1, [sp, #8]
-	cmp	ip, r1
-	bcc	.L502
-	ldrh	r3, [r4, #96]
-	mov	r1, r10
-	str	r2, [sp, #12]
-	cmp	r3, fp
-	ldrh	r3, [r4, #98]
-	it	cc
-	strhcc	fp, [r4, #96]	@ movhi
-	cmp	r3, r7
-	it	cc
-	strhcc	r7, [r4, #98]	@ movhi
-	bl	__aeabi_uidiv
-	ldr	r2, [sp, #12]
-	mov	r1, r8
-	strh	r0, [r4, #88]	@ movhi
-	str	r0, [sp, #8]
-	mov	r0, r2
-	bl	__aeabi_uidiv
-	strh	r0, [r4, #90]	@ movhi
-	ldr	r4, .L542+16
-	ldr	r3, [sp, #8]
-	ldr	r2, [r4]
-	tst	r2, #256
-	beq	.L505
-	uxth	r0, r0
-	uxth	r3, r3
-	str	r0, [sp]
-	mov	r2, r8
-	mov	r1, r10
-	ldr	r0, .L542+20
-	bl	printf
-.L505:
-	ldr	r3, [r4]
-	lsls	r2, r3, #23
-	bpl	.L506
-	str	r7, [sp]
-	mov	r3, fp
-	mov	r2, r5
-	mov	r1, r6
-	ldr	r0, .L542+24
-	bl	printf
-.L506:
-	subs	r7, r7, r5
-	cmp	r7, #64
-	bgt	.L507
-.L513:
-	cmp	r5, #0
-	bne	.L508
-.L514:
-	cbz	r6, .L494
-	ldr	r3, .L542
-	ldr	r2, .L542+8
-	ldr	r1, [r3]
-	ldrh	r5, [r2]
-	ldr	r2, .L542+12
-	ldrh	r3, [r1, #134]
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-.L519:
-	cmp	r3, r5
-	bcc	.L521
-	ldrh	r3, [r1, #74]
-	add	r3, r3, r6
-	strh	r3, [r1, #74]	@ movhi
-	ldrh	r3, [r1, #96]
-	cmp	r6, r3
-	bcs	.L494
-	subs	r6, r3, r6
-	strh	r6, [r1, #96]	@ movhi
-.L494:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L502:
-	ldrb	r1, [r3, #2]	@ zero_extendqisi2
-	tst	r1, #8
-	beq	.L499
-	ldrh	lr, [r3]
-	ldr	r1, [r3]
-	ubfx	lr, lr, #0, #11
-	ubfx	r1, r1, #11, #8
-.L500:
-	cmp	r6, lr
-	add	r0, r0, lr
-	it	cs
-	movcs	r6, lr
-	cmp	fp, lr
-	it	cc
-	movcc	fp, lr
-	movw	lr, #65535
-	cmp	r1, lr
-	add	r10, r10, #1
-	uxth	r10, r10
-	bne	.L522
-	b	.L523
-.L499:
-	tst	r1, #24
-	bne	.L501
-	ldrh	lr, [r3]
-	movw	r1, #65535
-	ubfx	lr, lr, #0, #11
-	b	.L500
-.L501:
-	ldr	r1, [r3]
-	ubfx	r1, r1, #11, #8
-.L522:
-	cmp	r5, r1
-	add	r8, r8, #1
-	it	cs
-	movcs	r5, r1
-	uxth	r8, r8
-	cmp	r7, r1
-	add	r2, r2, r1
-	it	cc
-	movcc	r7, r1
-.L523:
-	add	ip, ip, #1
-	adds	r3, r3, #4
-	uxth	ip, ip
-	b	.L498
-.L507:
-	ldr	r3, .L542
-	ldr	r7, .L542+8
-	ldr	r8, .L542+12
-	ldr	r3, [r3]
-	ldrh	r4, [r3, #134]
-.L510:
-	ldrh	r3, [r7]
-	cmp	r3, r4
-	bls	.L513
-	ldr	r1, [r8]
-	lsls	r2, r4, #2
-	adds	r3, r1, r2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	tst	r3, #192
-	beq	.L511
-	and	r0, r3, #224
-	cmp	r0, #224
-	beq	.L511
-	ubfx	r3, r3, #3, #2
-	lsls	r3, r3, #30
-	bpl	.L511
-	ldr	r3, [r1, r2]
-	ubfx	r3, r3, #11, #8
-	cmp	r3, r5
-	bhi	.L511
-	movs	r2, #1
-	mov	r0, r4
+	add	r0, r3, r0, lsl #8
+	bx	lr
+.L597:
+	.align	2
+.L596:
+	.word	.LANCHOR13
+	.size	nandc_get_chip_if, .-nandc_get_chip_if
+	.section	.text.buf_reinit,"ax",%progbits
+	.align	1
+	.global	buf_reinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_reinit, %function
+buf_reinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L601
+	movs	r2, #0
+	push	{r4, r5, lr}
 	mov	r1, r2
-	bl	gc_add_sblk
-.L511:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L510
-.L508:
-	ldr	r3, .L542
-	ldr	r2, .L542+8
-	ldr	r1, [r3]
-	ldrh	r7, [r2]
-	ldr	r2, .L542+12
-	ldrh	r3, [r1, #134]
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-.L515:
-	cmp	r3, r7
-	bcc	.L517
-	ldrh	r3, [r1, #72]
-	add	r3, r3, r5
-	strh	r3, [r1, #72]	@ movhi
-	ldrh	r3, [r1, #98]
-	cmp	r5, r3
-	itt	cc
-	subcc	r5, r3, r5
-	strhcc	r5, [r1, #98]	@ movhi
-	b	.L514
-.L517:
-	ldr	r0, [r2]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	adds	r2, r2, #4
-	ubfx	r4, r0, #11, #8
-	cmp	r5, r4
-	ittt	ls
-	subls	r4, r4, r5
-	bfils	r0, r4, #11, #8
-	strls	r0, [r2, #-4]
-	b	.L515
-.L521:
-	ldrh	r0, [r2]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	adds	r2, r2, #4
-	ubfx	r4, r0, #0, #11
-	cmp	r4, r6
-	ittt	ge
-	subge	r4, r4, r6
-	bfige	r0, r4, #0, #11
-	strhge	r0, [r2, #-4]	@ movhi
-	b	.L519
-.L543:
+	mov	r4, r3
+.L599:
+	uxtb	r0, r2
+	adds	r2, r2, #1
+	cmp	r2, #32
+	strb	r1, [r3, #2]
+	add	r5, r0, #1
+	strb	r0, [r3, #1]
+	strb	r5, [r3]
+	add	r3, r3, #48
+	str	r1, [r3, #-40]
+	bne	.L599
+	movs	r3, #255
+	strb	r3, [r4, #1488]
+	ldr	r3, .L601+4
+	strb	r1, [r3]
+	ldr	r3, .L601+8
+	strb	r2, [r3]
+	pop	{r4, r5, pc}
+.L602:
 	.align	2
-.L542:
-	.word	.LANCHOR46
-	.word	.LANCHOR60
-	.word	.LANCHOR54
-	.word	.LANCHOR57
-	.word	.LANCHOR22
-	.word	.LC11
-	.word	.LC12
-	.size	gc_static_wearleveling, .-gc_static_wearleveling
-	.section	.text.print_gc_debug_info,"ax",%progbits
+.L601:
+	.word	.LANCHOR50
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.size	buf_reinit, .-buf_reinit
+	.section	.text.buf_add_tail,"ax",%progbits
 	.align	1
-	.global	print_gc_debug_info
+	.global	buf_add_tail
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	print_gc_debug_info, %function
-print_gc_debug_info:
+	.type	buf_add_tail, %function
+buf_add_tail:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, lr}
-	ldr	r0, .L545
-	ldrh	r3, [r0, #310]
-	ldrh	r2, [r0, #2]
-	ldrh	r1, [r0]
-	ldrb	r0, [r0, #7]	@ zero_extendqisi2
-	str	r0, [sp, #4]
-	ldr	r0, .L545+4
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	str	r0, [sp]
-	ldr	r0, .L545+8
+	movs	r3, #255
+	push	{r4, r5, r6, lr}
+	strb	r3, [r1]
+	mov	r5, r0
+	mov	r4, r1
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L604
+	ldrb	r3, [r1, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L605
+	movs	r2, #74
+	ldr	r1, .L610
+	ldr	r0, .L610+4
 	bl	printf
-	add	sp, sp, #12
-	@ sp needed
-	ldr	pc, [sp], #4
-.L546:
+.L605:
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	strb	r3, [r5]
+	pop	{r4, r5, r6, pc}
+.L604:
+	ldr	r2, .L610+8
+	movs	r1, #48
+	mov	r6, r2
+.L609:
+	mov	r5, r3
+	muls	r3, r1, r3
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L609
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L607
+	movs	r2, #81
+	ldr	r1, .L610
+	ldr	r0, .L610+4
+	bl	printf
+.L607:
+	movs	r3, #48
+	ldrb	r2, [r4, #1]	@ zero_extendqisi2
+	muls	r3, r5, r3
+	strb	r2, [r6, r3]
+	pop	{r4, r5, r6, pc}
+.L611:
 	.align	2
-.L545:
-	.word	.LANCHOR59
-	.word	.LANCHOR38
-	.word	.LC13
-	.size	print_gc_debug_info, .-print_gc_debug_info
-	.global	__aeabi_idiv
-	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
+.L610:
+	.word	.LANCHOR53
+	.word	.LC0
+	.word	.LANCHOR50
+	.size	buf_add_tail, .-buf_add_tail
+	.section	.text.queue_read_cmd,"ax",%progbits
 	.align	1
-	.global	ftl_get_blk_list_in_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_blk_list_in_sblk, %function
-ftl_get_blk_list_in_sblk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	queue_read_cmd, %function
+queue_read_cmd:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L556
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	mov	r7, r1
-	mov	r5, r4
-	ldr	r3, [r3]
-	add	r3, r3, r0, lsl #2
-	ldrb	fp, [r3, #3]	@ zero_extendqisi2
-	ldr	r3, .L556+4
-	ldrb	r10, [r3]	@ zero_extendqisi2
-	ldr	r3, .L556+8
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, .L556+12
-	smulbb	r0, r8, r0
-	uxth	r6, r0
-.L548:
-	cmp	r5, r10
-	blt	.L552
-	mov	r3, r4
-	movw	r2, #65535
-.L553:
-	cmp	r3, r10
-	blt	.L554
-	mov	r0, r4
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L552:
-	asr	r2, fp, r5
-	lsls	r2, r2, #31
-	bmi	.L549
-	mov	r1, r8
-	mov	r0, r5
-	str	r3, [sp, #4]
-	bl	__aeabi_idiv
-	ldr	r3, [sp, #4]
-	cmp	r8, #1
-	ldrh	r2, [r3]
-	rsb	r2, r2, #21
-	lsl	r0, r0, r2
-	it	hi
-	andhi	r2, r5, #1
-	add	r0, r0, r6
-	uxth	r0, r0
-	it	hi
-	addhi	r0, r0, r2
-	strh	r0, [r7, r4, lsl #1]	@ movhi
-	adds	r4, r4, #1
-.L549:
-	adds	r5, r5, #1
-	b	.L548
-.L554:
-	strh	r2, [r7, r3, lsl #1]	@ movhi
+	push	{r4, lr}
+	mov	r4, r0
+	ldr	r1, [r0, #24]
+	movs	r0, #48
+	bl	flash_start_page_read
+	movs	r3, #1
+	mov	r1, r4
+	strb	r3, [r4, #42]
+	movs	r3, #0
+	strb	r3, [r4, #43]
+	movs	r3, #255
+	strb	r3, [r4]
+	ldr	r0, .L613
+	pop	{r4, lr}
+	b	buf_add_tail
+.L614:
+	.align	2
+.L613:
+	.word	.LANCHOR54
+	.size	queue_read_cmd, .-queue_read_cmd
+	.section	.text.buf_free,"ax",%progbits
+	.align	1
+	.global	buf_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_free, %function
+buf_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	and	r3, r3, #8
+	strb	r3, [r0, #2]
+	cbz	r3, .L616
+	ldr	r3, [r0, #20]
 	adds	r3, r3, #1
-	b	.L553
-.L557:
+	beq	.L616
+	ldr	r0, .L624
+	bl	buf_add_tail
+.L617:
+	ldr	r2, .L624+4
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2]
+	pop	{r3, pc}
+.L616:
+	ldr	r3, .L624
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r1]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	strb	r2, [r3]
+	b	.L617
+.L625:
 	.align	2
-.L556:
-	.word	.LANCHOR57
-	.word	.LANCHOR69
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
-	.section	.text.ftl_alloc_sblk,"ax",%progbits
+.L624:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.size	buf_free, .-buf_free
+	.section	.text.buf_alloc,"ax",%progbits
 	.align	1
-	.global	ftl_alloc_sblk
+	.global	buf_alloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-	@ args = 0, pretend = 0, frame = 16
+	.type	buf_alloc, %function
+buf_alloc:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.L559:
-	ldr	r3, .L580
-	cmp	r0, #5
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	movw	r4, #65535
-	mov	r5, r0
-	mov	lr, #0
-	mov	ip, r4
-	ldrh	r3, [r3]
-	str	r3, [sp, #8]
-	ite	ne
-	movne	r3, #0
-	moveq	r3, #2
-	ldr	r8, [sp, #8]
-	str	r3, [sp, #12]
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	str	r3, [sp, #20]
-	ldr	r3, .L580+4
-	ldr	r2, [r3]
-	ldr	r3, .L580+8
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-.L574:
-	ldrh	r7, [r2, #132]
-	ldr	r1, [sp, #16]
-	mov	r3, r7
-	add	r1, r1, r7, lsl #2
-.L560:
-	cmp	r3, r8
-	blt	.L572
-	subs	r3, r3, r7
-	ldr	r1, [sp, #8]
-	add	lr, lr, r3
-	ldrh	r3, [r2, #134]
-	uxth	lr, lr
-	subs	r1, r1, r3
-	cmp	lr, r1
-	blt	.L573
-	movw	r1, #65535
-	cmp	r4, r1
-	beq	.L573
-	ldr	r3, [sp, #16]
-	add	r6, r3, r4, lsl #2
-	b	.L564
-.L572:
-	ldrb	r0, [r1, #2]	@ zero_extendqisi2
-	mov	r6, r1
-	tst	r0, #224
-	bne	.L561
-	ubfx	r10, r0, #3, #2
-	ldr	r0, [sp, #20]
-	cmp	r0, r10
-	beq	.L561
-	ldr	r0, [sp, #12]
-	cbz	r0, .L562
-	ldr	r0, [r1]
-	ldrh	fp, [r2, #72]
-	ldrh	r10, [r2, #90]
-	ubfx	r0, r0, #11, #8
-	add	fp, fp, r0
-	add	r10, r10, #1
-	cmp	fp, r10
-	ble	.L563
-	uxth	r0, r0
-	cmp	ip, r0
-	bls	.L561
-	uxth	r4, r3
-	mov	ip, r0
-.L561:
-	adds	r3, r3, #1
-	adds	r1, r1, #4
-	b	.L560
-.L562:
-	ldrh	r0, [r1]
-	ldrh	fp, [r2, #74]
-	ldrh	r10, [r2, #88]
-	ubfx	r0, r0, #0, #11
-	add	fp, fp, r0
-	add	r10, r10, #1
-	cmp	fp, r10
-	ble	.L563
-	cmp	r0, ip
-	bge	.L561
-	mov	ip, r0
-	uxth	r4, r3
-	b	.L561
-.L563:
-	uxth	r4, r3
-.L564:
-	ldr	r3, .L580+12
-	ldr	r3, [r3]
-	lsls	r1, r3, #19
-	bpl	.L565
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	mov	r1, r4
-	ldrb	r2, [r6, #3]	@ zero_extendqisi2
-	ldr	r0, .L580+16
-	str	r2, [sp]
-	lsrs	r3, r3, #5
-	mov	r2, r5
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r0
+	ldr	r4, .L636
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L627
+.L630:
+	ldr	r5, .L636+4
+	ldr	r2, .L636+8
+	ldrb	r6, [r5]	@ zero_extendqisi2
+	add	r0, r6, r6, lsl #1
+	add	r0, r2, r0, lsl #4
+	cbz	r7, .L628
+.L629:
+	movs	r1, #48
+	muls	r1, r6, r1
+	ldrb	r6, [r2, r1]	@ zero_extendqisi2
+	adds	r3, r2, r1
+	strb	r6, [r5]
+	ldrb	r5, [r4]	@ zero_extendqisi2
+	subs	r5, r5, #1
+	strb	r5, [r4]
+	movs	r4, #1
+	strb	r4, [r3, #2]
+	movs	r4, #255
+	strb	r4, [r2, r1]
+	mov	r2, #-1
+	str	r2, [r3, #20]
+	movs	r2, #0
+	strh	r2, [r3, #34]	@ movhi
+	str	r2, [r3, #8]
+	strb	r2, [r3, #40]
+	strb	r2, [r3, #41]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L627:
+	movs	r2, #121
+	ldr	r1, .L636+12
+	ldr	r0, .L636+16
 	bl	printf
-.L565:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	bfi	r3, r5, #5, #3
-	uxtb	r3, r3
-	ubfx	r2, r3, #3, #2
-	orrs	r2, r2, r1
-	bfi	r3, r2, #3, #2
-	lsls	r2, r2, #31
-	strb	r3, [r6, #2]
-	ldr	r3, .L580+4
-	ldr	r3, [r3]
-	strh	r4, [r3, #132]	@ movhi
-	bpl	.L566
-	ldrh	r2, [r3, #116]
-	subs	r2, r2, #1
-	strh	r2, [r3, #116]	@ movhi
-.L567:
-	cmp	r5, #5
-	bne	.L569
-	ldrh	r2, [r3, #120]
-	adds	r2, r2, #1
-	strh	r2, [r3, #120]	@ movhi
-.L576:
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L566:
-	ldrb	r2, [r6, #2]	@ zero_extendqisi2
-	tst	r2, #24
-	itete	eq
-	ldrheq	r2, [r3, #114]
-	ldrhne	r2, [r3, #118]
-	addeq	r2, r2, #-1
-	addne	r2, r2, #-1
-	ite	eq
-	strheq	r2, [r3, #114]	@ movhi
-	strhne	r2, [r3, #118]	@ movhi
-	b	.L567
-.L569:
-	cmp	r5, #2
-	bne	.L571
-	ldrh	r2, [r3, #122]
-	adds	r2, r2, #1
-	strh	r2, [r3, #122]	@ movhi
-	b	.L576
-.L571:
-	cmp	r5, #3
-	bne	.L576
-	ldrh	r2, [r3, #124]
-	adds	r2, r2, #1
-	strh	r2, [r3, #124]	@ movhi
-	b	.L576
-.L573:
-	strh	r3, [r2, #132]	@ movhi
-	mov	r8, r7
-	b	.L574
-.L581:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L630
+.L632:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L628:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L629
+	b	.L632
+.L637:
 	.align	2
-.L580:
-	.word	.LANCHOR54
-	.word	.LANCHOR46
-	.word	.LANCHOR57
-	.word	.LANCHOR22
-	.word	.LC14
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
-	.section	.text.ftl_free_sblk,"ax",%progbits
+.L636:
+	.word	.LANCHOR52
+	.word	.LANCHOR51
+	.word	.LANCHOR50
+	.word	.LANCHOR55
+	.word	.LC0
+	.size	buf_alloc, .-buf_alloc
+	.section	.text.buf_remove_buf,"ax",%progbits
 	.align	1
-	.global	ftl_free_sblk
+	.global	buf_remove_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_sblk, %function
-ftl_free_sblk:
+	.type	buf_remove_buf, %function
+buf_remove_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldrb	r4, [r1, #1]	@ zero_extendqisi2
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L639
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0]
+.L644:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L642:
+	mov	r5, r3
+	muls	r3, r2, r3
+	ldrb	r3, [r0, r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L641
+	muls	r2, r5, r2
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0, r2]
+	movs	r3, #255
+	strb	r3, [r1]
+	b	.L644
+.L639:
+	ldr	r0, .L645
+	movs	r2, #48
+.L641:
+	cmp	r3, #255
+	bne	.L642
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L646:
+	.align	2
+.L645:
+	.word	.LANCHOR50
+	.size	buf_remove_buf, .-buf_remove_buf
+	.section	.text.buf_remove_free,"ax",%progbits
+	.align	1
+	.global	buf_remove_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_remove_free, %function
+buf_remove_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L583
-	movw	r2, #313
-	ldr	r1, .L593
-	ldr	r0, .L593+4
-	bl	printf
-.L584:
-	b	.L584
-.L583:
-	ldr	r3, .L593+8
-	ldr	r2, [r3]
-	add	r2, r2, r0, lsl #2
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	ands	r1, r3, #224
-	bne	.L585
-	mov	r2, #316
-	ldr	r1, .L593
-	ldr	r0, .L593+4
-	bl	printf
-.L586:
-	b	.L586
-.L585:
-	cmp	r1, #160
-	ubfx	r4, r3, #3, #2
-	ldr	r3, .L593+12
-	bne	.L587
-	ldr	r5, [r3]
-	ldrh	r1, [r5, #120]
-	subs	r1, r1, #1
-	strh	r1, [r5, #120]	@ movhi
-.L588:
-	ldr	r1, [r3]
-	lsls	r3, r4, #31
-	bpl	.L590
-	ldrh	r3, [r1, #116]
-	adds	r3, r3, #1
-	strh	r3, [r1, #116]	@ movhi
-.L591:
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	bfc	r3, #5, #3
-	strb	r3, [r2, #2]
-	movs	r2, #0
-	ldr	r3, .L593+16
-	ldr	r3, [r3]
-	strh	r2, [r3, r0, lsl #1]	@ movhi
+	mov	r5, r0
+	ldr	r4, .L652
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbnz	r3, .L648
+	movs	r2, #172
+	ldr	r1, .L652+4
+	ldr	r0, .L652+8
+	bl	printf
+.L648:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L647
+	mov	r1, r5
+	ldr	r0, .L652+12
+	bl	buf_remove_buf
+	cmp	r0, #1
+	bne	.L647
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r4]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #1
+	strb	r3, [r5, #2]
+.L647:
 	pop	{r3, r4, r5, pc}
-.L587:
-	cmp	r1, #64
-	bne	.L589
-	ldr	r5, [r3]
-	ldrh	r1, [r5, #122]
-	subs	r1, r1, #1
-	strh	r1, [r5, #122]	@ movhi
-	b	.L588
-.L589:
-	cmp	r1, #96
-	itttt	eq
-	ldreq	r5, [r3]
-	ldrheq	r1, [r5, #124]
-	addeq	r1, r1, #-1
-	strheq	r1, [r5, #124]	@ movhi
-	b	.L588
-.L590:
-	cbnz	r4, .L592
-	ldrh	r3, [r1, #114]
-	adds	r3, r3, #1
-	strh	r3, [r1, #114]	@ movhi
-	b	.L591
-.L592:
-	ldrh	r3, [r1, #118]
-	adds	r3, r3, #1
-	strh	r3, [r1, #118]	@ movhi
-	b	.L591
-.L594:
+.L653:
 	.align	2
-.L593:
-	.word	.LANCHOR72
-	.word	.LC0
-	.word	.LANCHOR57
-	.word	.LANCHOR46
+.L652:
+	.word	.LANCHOR52
 	.word	.LANCHOR56
-	.size	ftl_free_sblk, .-ftl_free_sblk
-	.section	.text.gc_free_src_blk,"ax",%progbits
+	.word	.LC0
+	.word	.LANCHOR51
+	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.flash_check_bad_block,"ax",%progbits
 	.align	1
-	.global	gc_free_src_blk
+	.global	flash_check_bad_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_free_src_blk, %function
-gc_free_src_blk:
+	.type	flash_check_bad_block, %function
+flash_check_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r5, #0
-	ldr	r6, .L634
-.L596:
-	uxth	r2, r5
-	ldr	r3, .L634+4
-	ldrh	r1, [r3, #52]
-	cmp	r1, r2
-	bhi	.L612
-	movs	r2, #0
-	strh	r2, [r3, #52]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L612:
-	uxth	r2, r5
-	add	r3, r3, r2, lsl #1
-	ldrh	r4, [r3, #54]
-	ldr	r3, [r6]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L597
-	mov	r1, r4
-	ldr	r0, .L634+8
-	bl	printf
-.L597:
-	ldr	r3, [r6]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, #0
-	bne	.L598
-	ldr	r3, .L634+12
-	ldr	r7, [r3]
-	ldr	r3, .L634+16
-	ldr	r3, [r3]
-	add	r7, r7, r4, lsl #2
-	lsls	r3, r3, #23
-	bpl	.L599
-	ldrb	r2, [r7, #2]	@ zero_extendqisi2
-	mov	r1, r4
-	ldr	r0, .L634+20
-	lsrs	r2, r2, #5
-	bl	printf
-.L599:
-	ldrb	r3, [r7, #2]	@ zero_extendqisi2
-	and	r2, r3, #224
-	cmp	r2, #224
-	beq	.L600
-	tst	r3, #192
-	bne	.L601
-.L600:
-	movw	r2, #753
-	ldr	r1, .L634+24
-	ldr	r0, .L634+28
-	bl	printf
-.L602:
-	b	.L602
-.L601:
-	mov	r0, r4
-	bl	ftl_free_sblk
-	ldr	r3, .L634+32
-	ldr	r3, [r3]
-	ldrh	r1, [r3, #124]
-	cbz	r1, .L603
-	add	r0, r3, #392
-	movs	r2, #0
-.L605:
-	ldrh	r7, [r0], #2
-	cmp	r4, r7
-	bne	.L604
-	adds	r2, r2, #196
-	movw	r0, #65535
-	subs	r1, r1, #1
-	strh	r0, [r3, r2, lsl #1]	@ movhi
-	strh	r1, [r3, #124]	@ movhi
-.L603:
-	ldrh	r1, [r3, #120]
-	cbz	r1, .L606
-	add	r0, r3, #136
-	movs	r2, #0
-.L608:
-	ldrh	r7, [r0], #2
-	cmp	r4, r7
-	bne	.L607
-	adds	r2, r2, #68
-	movw	r0, #65535
-	subs	r1, r1, #1
-	strh	r0, [r3, r2, lsl #1]	@ movhi
-	strh	r1, [r3, #120]	@ movhi
-.L606:
-	ldrh	r1, [r3, #122]
-	cbz	r1, .L609
-	add	r0, r3, #264
-	movs	r2, #0
-.L611:
-	ldrh	r7, [r0], #2
-	cmp	r4, r7
-	bne	.L610
-	adds	r2, r2, #132
-	movw	r0, #65535
-	subs	r1, r1, #1
-	strh	r0, [r3, r2, lsl #1]	@ movhi
-	strh	r1, [r3, #122]	@ movhi
-.L609:
-	adds	r5, r5, #1
-	b	.L596
-.L604:
-	adds	r2, r2, #1
-	cmp	r2, #64
-	bne	.L605
-	b	.L603
-.L607:
-	adds	r2, r2, #1
-	cmp	r2, #64
-	bne	.L608
-	b	.L606
-.L610:
-	adds	r2, r2, #1
-	cmp	r2, #64
-	bne	.L611
-	b	.L609
-.L598:
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r4
-	bl	gc_add_sblk
-	b	.L609
-.L635:
+	ldr	r2, .L655
+	push	{r4, lr}
+	lsrs	r4, r1, #5
+	and	r1, r1, #31
+	ldrb	r3, [r2, #13]	@ zero_extendqisi2
+	ldrh	r2, [r2, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L655+4
+	uxth	r3, r3
+	ldr	r2, [r2]
+	adds	r3, r3, #31
+	asrs	r3, r3, #5
+	add	r2, r2, r4, lsl #2
+	lsls	r3, r3, #2
+	uxth	r3, r3
+	mla	r0, r0, r3, r2
+	ldr	r0, [r0, #912]
+	lsrs	r0, r0, r1
+	and	r0, r0, #1
+	pop	{r4, pc}
+.L656:
 	.align	2
-.L634:
-	.word	.LANCHOR56
-	.word	.LANCHOR59
-	.word	.LC15
-	.word	.LANCHOR57
-	.word	.LANCHOR22
-	.word	.LC16
-	.word	.LANCHOR73
-	.word	.LC0
-	.word	.LANCHOR60
-	.size	gc_free_src_blk, .-gc_free_src_blk
-	.section	.text.ftl_erase_phy_blk,"ax",%progbits
+.L655:
+	.word	.LANCHOR31
+	.word	.LANCHOR27
+	.size	flash_check_bad_block, .-flash_check_bad_block
+	.section	.text.flash_mask_bad_block,"ax",%progbits
 	.align	1
-	.global	ftl_erase_phy_blk
+	.global	flash_mask_bad_block
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_erase_phy_blk, %function
-ftl_erase_phy_blk:
+	.type	flash_mask_bad_block, %function
+flash_mask_bad_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L658
+	mov	r2, r1
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
 	mov	r6, r1
-	ldr	r3, .L641
-	ldr	r7, .L641+4
-	ldrh	r4, [r3]
-	rsb	r3, r4, #21
-	movs	r4, #1
-	asr	r5, r0, r3
-	lsls	r4, r4, r3
-	ldr	r3, .L641+8
-	subs	r4, r4, #1
-	uxtb	r5, r5
-	ands	r4, r4, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	sxth	r4, r4
-	cbz	r3, .L637
-	ldrh	r2, [r7]
-	clz	r1, r1
-	lsrs	r1, r1, #5
-	mov	r0, r5
-	muls	r2, r4, r2
-	bl	flash_erase_block_en
-.L637:
-	ldrh	r2, [r7]
-	uxtb	r1, r6
-	mov	r0, r5
-	muls	r2, r4, r2
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	flash_erase_block_en
-.L642:
+	mov	r1, r0
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	ldr	r0, .L658+4
+	smulbb	r4, r4, r3
+	bl	printf
+	uxth	r4, r4
+	ldr	r3, .L658+8
+	add	r0, r4, #31
+	asrs	r0, r0, #5
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsls	r0, r0, #2
+	uxth	r0, r0
+	muls	r0, r5, r0
+	lsrs	r5, r6, #5
+	and	r6, r6, #31
+	lsl	r6, r3, r6
+	add	r0, r0, #912
+	add	r0, r0, r5, lsl #2
+	ldr	r3, [r2, r0]
+	orrs	r3, r3, r6
+	str	r3, [r2, r0]
+	pop	{r4, r5, r6, pc}
+.L659:
 	.align	2
-.L641:
-	.word	.LANCHOR71
-	.word	.LANCHOR75
-	.word	.LANCHOR74
-	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
-	.section	.text.ftl_erase_sblk,"ax",%progbits
+.L658:
+	.word	.LANCHOR31
+	.word	.LC42
+	.word	.LANCHOR27
+	.size	flash_mask_bad_block, .-flash_mask_bad_block
+	.section	.text.ftl_gc_write_buf,"ax",%progbits
 	.align	1
-	.global	ftl_erase_sblk
+	.global	ftl_gc_write_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_erase_sblk, %function
-ftl_erase_sblk:
-	@ args = 0, pretend = 0, frame = 64
+	.type	ftl_gc_write_buf, %function
+ftl_gc_write_buf:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r6, .L663
-	sub	sp, sp, #64
-	mov	r7, r1
-	movs	r5, #0
-	ldr	r3, [r6]
-	add	r3, r3, r0, lsl #2
-	ldrb	r8, [r3, #3]	@ zero_extendqisi2
-.L644:
-	ldr	r3, .L663+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r5, r3
-	bge	.L651
-	ldr	r3, .L663+8
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	orr	r3, r3, #2
+	strb	r3, [r0, #2]
+	ldr	r0, .L661
+	bl	buf_add_tail
+	ldr	r3, .L661+4
 	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L663+12
-	ldrh	ip, [r3]
-	movs	r3, #0
-	mul	r10, r0, r5
-	mov	r2, r3
-	mul	lr, r0, r4
-	b	.L652
-.L646:
-	add	r1, r2, r10
-	asr	r1, r8, r1
-	lsls	r1, r1, #31
-	bmi	.L645
-	add	r1, sp, #64
-	add	fp, r1, r3, lsl #2
-	and	r1, r2, #1
-	add	r1, r1, lr
-	mul	r1, ip, r1
-	adds	r3, r3, #1
-	str	r1, [fp, #-64]
-.L645:
-	adds	r2, r2, #1
-.L652:
-	cmp	r2, r0
-	blt	.L646
-	cmp	r3, #2
-	bne	.L647
-	ldr	r3, .L663+16
-	uxtb	r10, r5
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L648
-	clz	r1, r7
-	ldm	sp, {r2, r3}
-	lsrs	r1, r1, #5
-	mov	r0, r10
-	bl	flash_erase_duplane_block
-.L648:
-	ldm	sp, {r2, r3}
-	uxtb	r1, r7
-	mov	r0, r10
-	bl	flash_erase_duplane_block
-.L649:
-	adds	r5, r5, #1
-	b	.L644
-.L647:
-	cmp	r3, #1
-	bne	.L649
-	ldr	r3, .L663+16
-	uxtb	r10, r5
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L650
-	clz	r1, r7
-	ldr	r2, [sp]
-	lsrs	r1, r1, #5
-	mov	r0, r10
-	bl	flash_erase_block_en
-.L650:
-	ldr	r2, [sp]
-	uxtb	r1, r7
-	mov	r0, r10
-	bl	flash_erase_block_en
-	b	.L649
-.L651:
-	ldr	r1, .L663+20
-	ldr	r0, [r6]
-	cbnz	r7, .L653
-	ldrh	r2, [r0, r4, lsl #2]
-	adds	r3, r2, #1
-	ubfx	r3, r3, #0, #11
-	bfi	r2, r3, #0, #11
-	strh	r2, [r0, r4, lsl #2]	@ movhi
-	ldr	r2, [r1]
-	ldr	r1, [r2, #84]
-	adds	r1, r1, #1
-	str	r1, [r2, #84]
-	ldrh	r1, [r2, #96]
-	cmp	r1, r3
-	bge	.L655
-	strh	r3, [r2, #96]	@ movhi
-.L655:
-	movs	r0, #0
-	add	sp, sp, #64
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L653:
-	ldr	r2, [r0, r4, lsl #2]
-	ubfx	r3, r2, #11, #8
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	bfi	r2, r3, #11, #8
-	uxth	r3, r3
-	str	r2, [r0, r4, lsl #2]
-	ldr	r2, [r1]
-	ldr	r1, [r2, #80]
-	adds	r1, r1, #1
-	str	r1, [r2, #80]
-	ldrh	r1, [r2, #98]
-	cmp	r1, r3
-	it	cc
-	strhcc	r3, [r2, #98]	@ movhi
-	b	.L655
-.L664:
+	adds	r0, r0, #1
+	uxtb	r0, r0
+	strb	r0, [r3]
+	pop	{r3, pc}
+.L662:
 	.align	2
-.L663:
+.L661:
 	.word	.LANCHOR57
-	.word	.LANCHOR76
-	.word	.LANCHOR70
-	.word	.LANCHOR75
-	.word	.LANCHOR74
-	.word	.LANCHOR46
-	.size	ftl_erase_sblk, .-ftl_erase_sblk
-	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
+	.word	.LANCHOR58
+	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.zftl_cache_flush,"ax",%progbits
 	.align	1
-	.global	ftl_alloc_sys_blk
+	.global	zftl_cache_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_alloc_sys_blk, %function
-ftl_alloc_sys_blk:
+	.type	zftl_cache_flush, %function
+zftl_cache_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L675
-	ldr	r3, [r3]
-	ldrh	r2, [r3, #136]
-	ldrh	r1, [r3, #112]
-	cmp	r2, #63
-	itt	hi
-	movhi	r2, #0
-	strhhi	r2, [r3, #136]	@ movhi
-	cbnz	r1, .L667
-	mov	r2, #440
-	ldr	r1, .L675+4
-	ldr	r0, .L675+8
-	bl	printf
-.L668:
-	b	.L668
-.L667:
-	movw	r5, #65535
-	movs	r6, #0
-	mov	r7, r5
-.L673:
-	ldrh	r2, [r3, #136]
-	add	r4, r3, r2, lsl #1
-	adds	r4, r4, #158
+	@ link register save eliminated.
+	bx	lr
+	.size	zftl_cache_flush, .-zftl_cache_flush
+	.section	.text.zftl_get_density,"ax",%progbits
+	.align	1
+	.global	zftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_get_density, %function
+zftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cbnz	r0, .L665
+	ldr	r3, .L668
+	ldr	r0, [r3]
+	bx	lr
+.L665:
+	cmp	r0, #4
+	ite	cc
+	movcc	r0, #8192
+	movcs	r0, #0
+	bx	lr
 .L669:
-	cmp	r2, #63
-	ble	.L671
-	strh	r6, [r3, #136]	@ movhi
-	b	.L673
-.L671:
-	ldrh	r0, [r4, #2]!
-	cmp	r0, r5
-	bne	.L674
-	adds	r2, r2, #1
-	b	.L669
-.L674:
-	add	r4, r2, #80
-	subs	r1, r1, #1
-	strh	r7, [r3, r4, lsl #1]	@ movhi
-	strh	r2, [r3, #136]	@ movhi
-	strh	r1, [r3, #112]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L676:
 	.align	2
-.L675:
-	.word	.LANCHOR46
-	.word	.LANCHOR77
-	.word	.LC0
-	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
-	.section	.text.ftl_free_sys_blk,"ax",%progbits
+.L668:
+	.word	.LANCHOR59
+	.size	zftl_get_density, .-zftl_get_density
+	.section	.text.gc_hook,"ax",%progbits
 	.align	1
-	.global	ftl_free_sys_blk
+	.global	gc_hook
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_sys_blk, %function
-ftl_free_sys_blk:
+	.type	gc_hook, %function
+gc_hook:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L686
-	ldr	r3, [r3]
-	ldrh	r2, [r3, #138]
-	ldrh	r1, [r3, #112]
-	cmp	r2, #63
-	itt	hi
-	movhi	r2, #0
-	strhhi	r2, [r3, #138]	@ movhi
-	cmp	r1, #63
-	bls	.L679
-	mov	r2, #464
-	ldr	r1, .L686+4
-	ldr	r0, .L686+8
-	bl	printf
-.L680:
-	b	.L680
-.L679:
-	movw	r6, #65535
-	movs	r5, #0
-.L685:
-	ldrh	r2, [r3, #138]
-	add	r4, r3, r2, lsl #1
-	adds	r4, r4, #158
-.L681:
-	cmp	r2, #63
-	ble	.L683
-	strh	r5, [r3, #138]	@ movhi
-	b	.L685
-.L683:
-	ldrh	r7, [r4, #2]!
-	cmp	r7, r6
-	bne	.L682
-	add	r4, r2, #80
-	adds	r1, r1, #1
-	strh	r0, [r3, r4, lsl #1]	@ movhi
-	strh	r2, [r3, #138]	@ movhi
-	strh	r1, [r3, #112]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L682:
-	adds	r2, r2, #1
-	b	.L681
-.L687:
-	.align	2
-.L686:
-	.word	.LANCHOR46
-	.word	.LANCHOR78
-	.word	.LC0
-	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
-	.section	.text.ftl_info_data_recovery,"ax",%progbits
+	@ link register save eliminated.
+	bx	lr
+	.size	gc_hook, .-gc_hook
+	.section	.text.vpn_check,"ax",%progbits
 	.align	1
-	.global	ftl_info_data_recovery
+	.global	vpn_check
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_data_recovery, %function
-ftl_info_data_recovery:
+	.type	vpn_check, %function
+vpn_check:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0]
-	movw	r3, #65535
-	push	{r4, r5, lr}
-	cmp	r1, r3
-	beq	.L688
-	ldr	r3, .L697
-	ldr	r4, [r3]
-	add	r2, r4, r1, lsl #2
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	bne	.L688
-	ldrb	r0, [r0, #4]	@ zero_extendqisi2
-	bfi	r3, r0, #5, #3
-	strb	r3, [r2, #2]
-	uxtb	r3, r3
-	ldr	r2, .L697+4
-	tst	r3, #8
-	ldr	r5, [r2]
-	beq	.L692
-	ldrh	r0, [r5, #116]
-	subs	r0, r0, #1
-	strh	r0, [r5, #116]	@ movhi
-.L693:
-	and	r3, r3, #224
-	cmp	r3, #160
-	bne	.L695
-	ldr	r3, [r4, r1, lsl #2]
-	ldr	r2, [r2]
-	ubfx	r0, r3, #11, #8
-	adds	r0, r0, #1
-	bfi	r3, r0, #11, #8
-	str	r3, [r4, r1, lsl #2]
-	ldrh	r3, [r2, #120]
-	subs	r3, r3, #1
-	strh	r3, [r2, #120]	@ movhi
-	pop	{r4, r5, pc}
-.L692:
-	tst	r3, #24
-	itete	eq
-	ldrheq	r0, [r5, #114]
-	ldrhne	r0, [r5, #118]
-	addeq	r0, r0, #-1
-	addne	r0, r0, #-1
-	ite	eq
-	strheq	r0, [r5, #114]	@ movhi
-	strhne	r0, [r5, #118]	@ movhi
-	b	.L693
-.L695:
-	ldrh	r0, [r4, r1, lsl #2]
-	cmp	r3, #64
-	add	r5, r0, #1
-	bfi	r0, r5, #0, #11
-	strh	r0, [r4, r1, lsl #2]	@ movhi
-	bne	.L696
-	ldr	r2, [r2]
-	ldrh	r3, [r2, #122]
-	subs	r3, r3, #1
-	strh	r3, [r2, #122]	@ movhi
-	pop	{r4, r5, pc}
-.L696:
-	cmp	r3, #96
-	itttt	eq
-	ldreq	r2, [r2]
-	ldrheq	r3, [r2, #124]
-	addeq	r3, r3, #-1
-	strheq	r3, [r2, #124]	@ movhi
-.L688:
-	pop	{r4, r5, pc}
-.L698:
-	.align	2
-.L697:
-	.word	.LANCHOR57
-	.word	.LANCHOR46
-	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
-	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
+	@ link register save eliminated.
+	bx	lr
+	.size	vpn_check, .-vpn_check
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
-	.global	ftl_get_ppa_from_index
+	.global	FtlGetCurEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_ppa_from_index, %function
-ftl_get_ppa_from_index:
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L704
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	ldr	r5, [r3]
-	ldr	r3, .L704+4
-	ldrh	r2, [r3]
-	ldr	r3, .L704+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mul	r1, r3, r2
-	cmp	r0, r1
-	itet	ge
-	smulbbge	r3, r3, r2
-	addlt	r5, r5, #16
-	addge	r5, r5, #48
-	ldrb	r6, [r5, #9]	@ zero_extendqisi2
-	itt	ge
-	subge	r4, r0, r3
-	uxthge	r4, r4
-	mov	r1, r6
-	mov	r0, r4
-	bl	__aeabi_idiv
-	smulbb	r6, r0, r6
-	movw	r2, #65535
-	subs	r4, r4, r6
-	uxth	r4, r4
-	adds	r4, r4, #8
-	ldrh	r3, [r5, r4, lsl #1]
-	cmp	r3, r2
-	bne	.L702
-	movw	r2, #837
-	ldr	r1, .L704+12
-	ldr	r0, .L704+16
-	bl	printf
-.L703:
-	b	.L703
-.L702:
-	ldr	r2, .L704+20
-	ldrh	r2, [r2]
-	mla	r0, r3, r2, r0
-	pop	{r4, r5, r6, pc}
-.L705:
+	@ link register save eliminated.
+	ldr	r3, .L673
+	ldrh	r0, [r3]
+	bx	lr
+.L674:
 	.align	2
-.L704:
+.L673:
 	.word	.LANCHOR60
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR80
-	.word	.LC0
-	.word	.LANCHOR75
-	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
-	.section	.text.lpa_hash_get_ppa,"ax",%progbits
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
-	.global	lpa_hash_get_ppa
+	.global	FtlGetAllBlockNum
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_hash_get_ppa, %function
-lpa_hash_get_ppa:
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L710
-	uxtb	r2, r0
-	push	{r4, r5}
-	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L710+4
-	ldr	r1, [r2]
-	ldr	r2, .L710+8
-	ldr	r4, [r2]
-	movw	r2, #65535
-.L707:
-	cmp	r3, r2
-	bne	.L709
-	mov	r0, #-1
-	pop	{r4, r5}
+	ldr	r3, .L676
+	ldrh	r0, [r3]
 	bx	lr
-.L709:
-	ldr	r5, [r1, r3, lsl #2]
-	cmp	r0, r5
-	bne	.L708
-	mov	r0, r3
-	pop	{r4, r5}
-	b	ftl_get_ppa_from_index
-.L708:
-	ldrh	r3, [r4, r3, lsl #1]
-	b	.L707
-.L711:
+.L677:
 	.align	2
-.L710:
-	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
-	.section	.text.ftl_get_new_free_page,"ax",%progbits
+.L676:
+	.word	.LANCHOR6
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
-	.global	ftl_get_new_free_page
+	.global	FtlLowFormat
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_get_new_free_page, %function
-ftl_get_new_free_page:
+	.type	FtlLowFormat, %function
+FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0]
-	movw	r2, #65535
-	push	{r4, r5, r6, lr}
-	mov	r3, r0
-	cmp	r1, r2
-	bne	.L713
-	mov	r2, #948
-	ldr	r1, .L723
-	ldr	r0, .L723+4
-	bl	printf
-.L714:
-	b	.L714
-.L713:
-	ldr	r1, .L723+8
-	ldrh	r0, [r0, #2]
-	ldrh	r1, [r1]
-	cmp	r0, r1
-	bne	.L715
-	movw	r2, #949
-	ldr	r1, .L723
-	ldr	r0, .L723+4
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.gc_add_sblk,"ax",%progbits
+	.align	1
+	.global	gc_add_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_add_sblk, %function
+gc_add_sblk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L712
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	sub	sp, sp, #24
+	mov	r4, r1
+	mov	r8, r2
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L680
+	movw	r2, #339
+	ldr	r1, .L712+4
+	ldr	r0, .L712+8
 	bl	printf
-.L716:
-	b	.L716
-.L715:
-	ldrh	r1, [r3, #6]
-	cbnz	r1, .L717
-	movw	r2, #950
-	ldr	r1, .L723
-	ldr	r0, .L723+4
+.L680:
+	ldr	r3, .L712+12
+	lsl	r10, r5, #2
+	ldr	r6, .L712+16
+	ldr	fp, .L712+44
+	ldr	r2, [r3]
+	str	r3, [sp, #20]
+	ldrh	r7, [r2, r5, lsl #1]
+	ldr	r2, [r6]
+	tst	r2, #256
+	beq	.L681
+	ldr	r2, .L712+20
+	mov	r1, r5
+	ldr	r3, [fp]
+	ldr	r0, .L712+24
+	ldrh	r2, [r2]
+	add	r3, r3, r10
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	ldr	r2, .L712+28
+	lsrs	r3, r3, #5
+	ldrh	r2, [r2, #52]
+	str	r7, [sp]
+	str	r2, [sp, #4]
+	mov	r2, r4
 	bl	printf
-.L718:
-	b	.L718
-.L717:
-	ldrb	r0, [r3, #5]	@ zero_extendqisi2
-	movs	r6, #0
-	ldr	r4, .L723+12
-	adds	r0, r0, #8
-	ldrh	r0, [r3, r0, lsl #1]
-	ldrb	r5, [r4]	@ zero_extendqisi2
-	mov	r4, r2
-.L719:
-	cmp	r0, r4
-	ldrb	r2, [r3, #5]	@ zero_extendqisi2
-	beq	.L721
-	ldr	r6, .L723+16
-	adds	r2, r2, #1
-	uxtb	r2, r2
-	ldrh	r4, [r3, #2]
-	subs	r1, r1, #1
-	ldrh	r6, [r6]
-	cmp	r5, r2
-	strh	r1, [r3, #6]	@ movhi
-	ldrh	r1, [r3, #10]
-	strb	r2, [r3, #5]
-	it	eq
-	addeq	r2, r4, #1
-	mul	r0, r0, r6
-	it	eq
-	strheq	r2, [r3, #2]	@ movhi
-	add	r1, r1, #1
-	it	eq
-	moveq	r2, #0
-	strh	r1, [r3, #10]	@ movhi
-	it	eq
-	strbeq	r2, [r3, #5]
-	orrs	r0, r0, r4
-	pop	{r4, r5, r6, pc}
-.L721:
-	adds	r2, r2, #1
-	uxtb	r2, r2
-	cmp	r2, r5
-	strb	r2, [r3, #5]
-	itttt	eq
-	ldrheq	r2, [r3, #2]
-	strbeq	r6, [r3, #5]
-	addeq	r2, r2, #1
-	strheq	r2, [r3, #2]	@ movhi
-	ldrb	r2, [r3, #5]	@ zero_extendqisi2
-	adds	r2, r2, #8
-	ldrh	r0, [r3, r2, lsl #1]
-	b	.L719
-.L724:
+.L681:
+	ldr	r3, [fp]
+	add	r10, r10, r3
+	ldrb	r2, [r10, #2]	@ zero_extendqisi2
+	ands	r10, r2, #224
+	bne	.L682
+	cmp	r7, #0
+	beq	.L702
+	mov	r2, #344
+	ldr	r1, .L712+4
+	ldr	r0, .L712+8
+	bl	printf
+.L700:
+	movs	r0, #0
+	b	.L679
+.L682:
+	ldr	r1, .L712+28
+	ldrh	r3, [r1]
+	cmp	r3, r5
+	beq	.L700
+	ldr	r7, .L712+32
+	ldr	r3, [r7]
+	ldrh	r0, [r3, #48]
+	cmp	r0, r5
+	beq	.L700
+	ldrh	r0, [r3, #16]
+	cmp	r0, r5
+	beq	.L700
+	ldrh	r0, [r3, #80]
+	cmp	r0, r5
+	beq	.L700
+	ldrh	ip, [r1, #52]!
+	movs	r0, #0
+.L684:
+	cmp	r0, ip
+	bcc	.L685
+	cmp	r4, #0
+	bne	.L689
+	ldr	r1, .L712+36
+	ldrh	r0, [r1]
+	cmp	r5, r0
+	beq	.L700
+	ldr	lr, .L712+48
+	mov	r1, r4
+.L688:
+	ldrh	r10, [lr, r1, lsl #1]
+	cmp	r5, r10
+	bne	.L687
+	ldr	r7, [r6]
+	ands	r7, r7, #256
+	beq	.L702
+	ldr	r3, [sp, #20]
+	lsrs	r2, r2, #5
+	mov	r1, r5
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	str	r0, [sp, #4]
+	str	r5, [sp]
+	ldr	r0, .L712+40
+	bl	printf
+	b	.L700
+.L685:
+	ldrh	lr, [r1, #2]!
+	cmp	lr, r5
+	beq	.L700
+	adds	r0, r0, #1
+	b	.L684
+.L687:
+	adds	r1, r1, #1
+	cmp	r1, #8
+	bne	.L688
+	add	r3, r3, r8, lsl #7
+	add	r10, r3, #136
+.L690:
+	ldr	r3, [r6]
+	lsls	r3, r3, #23
+	bpl	.L691
+	ldr	r3, .L712+20
+	mov	r1, r5
+	ldr	r0, .L712+24
+	ldrh	r3, [r3]
+	str	ip, [sp, #4]
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #20]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	str	r3, [sp]
+	lsrs	r3, r2, #5
+	mov	r2, r4
+	bl	printf
+.L691:
+	mov	r3, r10
+	add	r1, r10, #128
+	movw	r0, #65535
+.L694:
+	mov	r2, r3
+	adds	r3, r3, #2
+	ldrh	r6, [r2]
+	cmp	r6, r0
+	bne	.L692
+	strh	r5, [r2]	@ movhi
+	cbz	r4, .L693
+	ldr	r2, [r7]
+	ldrh	r3, [r2, #124]
+	adds	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+.L711:
+	movs	r0, #1
+.L679:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L689:
+	add	r10, r3, #392
+	b	.L690
+.L693:
+	ldr	r3, [r7]
+	add	r8, r3, r8, lsl #1
+	ldrh	r3, [r8, #120]
+	adds	r3, r3, #1
+	strh	r3, [r8, #120]	@ movhi
+	b	.L711
+.L692:
+	cmp	r1, r3
+	bne	.L694
+	b	.L711
+.L702:
+	mov	r0, r7
+	b	.L679
+.L713:
 	.align	2
-.L723:
-	.word	.LANCHOR84
+.L712:
+	.word	.LANCHOR6
+	.word	.LANCHOR61
 	.word	.LC0
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR75
-	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
-	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
+	.word	.LANCHOR9
+	.word	.LANCHOR14
+	.word	.LANCHOR62
+	.word	.LC43
+	.word	.LANCHOR63
+	.word	.LANCHOR10
+	.word	.LANCHOR64
+	.word	.LC44
+	.word	.LANCHOR7
+	.word	.LANCHOR65
+	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_mark_bad_ppa,"ax",%progbits
 	.align	1
-	.global	ftl_ext_alloc_new_blk
+	.global	gc_mark_bad_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_ext_alloc_new_blk, %function
-ftl_ext_alloc_new_blk:
+	.type	gc_mark_bad_ppa, %function
+gc_mark_bad_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	bl	ftl_alloc_sys_blk
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	mov	r4, r0
-	cmp	r3, r2
-	bls	.L726
-	movw	r2, #981
-	ldr	r1, .L728
-	ldr	r0, .L728+4
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r8, r0
+	ldr	r3, .L718
+	movs	r7, #1
+	ldr	r4, .L718+4
+	ldrh	r0, [r3]
+	ldr	r3, .L718+8
+	lsr	r6, r8, r0
+	rsb	r0, r0, #21
+	lsl	r0, r7, r0
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	uxth	r5, r6
+	subs	r0, r0, #1
+	ands	r0, r0, r6
+	bl	__aeabi_uidiv
+	uxth	r10, r0
+	mov	r3, r8
+	mov	r2, r5
+	ldr	r1, [r4, #324]
+	ldr	r0, .L718+12
 	bl	printf
-.L727:
-	b	.L727
-.L726:
-	ldr	r5, .L728+8
+	mov	r1, r7
+	movs	r2, #0
+	mov	r0, r10
+	bl	gc_add_sblk
+	ldr	r3, [r4, #324]
 	movs	r1, #0
-	bl	ftl_erase_phy_blk
-	ldr	r3, [r5]
-	ldrh	r0, [r3, #130]
-	bl	ftl_free_sys_blk
-	ldr	r3, [r5]
+.L715:
+	uxth	r2, r1
+	cmp	r3, r2
+	bhi	.L717
+	cmp	r3, #5
+	itttt	ls
+	addls	r2, r3, #1
+	addls	r3, r3, #164
+	strls	r2, [r4, #324]
+	strhls	r5, [r4, r3, lsl #1]	@ movhi
+	b	.L716
+.L717:
+	adds	r2, r2, #164
+	adds	r1, r1, #1
+	ldrh	r2, [r4, r2, lsl #1]
+	cmp	r5, r2
+	bne	.L715
+.L716:
 	movs	r0, #0
-	strh	r4, [r3, #130]	@ movhi
-	strh	r0, [r3, #140]	@ movhi
-	pop	{r3, r4, r5, pc}
-.L729:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L719:
 	.align	2
-.L728:
-	.word	.LANCHOR85
-	.word	.LC0
-	.word	.LANCHOR46
-	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
-	.section	.text.ftl_total_vpn_update,"ax",%progbits
+.L718:
+	.word	.LANCHOR66
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LC45
+	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
+	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
 	.align	1
-	.global	ftl_total_vpn_update
+	.global	gc_get_src_ppa_from_index
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_total_vpn_update, %function
-ftl_total_vpn_update:
+	.type	gc_get_src_ppa_from_index, %function
+gc_get_src_ppa_from_index:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L737
-	push	{r4, r5, r6, r7, lr}
-	mov	r1, r2
-	ldrh	r3, [r2]
-	cmp	r3, #4
-	bhi	.L731
-	cbnz	r0, .L731
-	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	pop	{r4, r5, r6, r7, pc}
-.L731:
-	ldr	r2, .L737+4
-	movs	r3, #0
-	strh	r3, [r1]	@ movhi
-	movw	ip, #65535
-	mov	r1, r3
-	ldrh	r5, [r2]
-	ldr	r2, .L737+8
-	ldr	r6, [r2]
-	ldr	r2, .L737+12
-	ldr	r7, [r2]
-	mov	r2, r3
-.L733:
-	uxth	r0, r3
-	cmp	r5, r0
-	bhi	.L736
-	ldr	r3, .L737+16
+	@ link register save eliminated.
+	ldr	r3, .L721
 	ldr	r3, [r3]
-	str	r1, [r3, #524]
-	str	r2, [r3, #528]
-	pop	{r4, r5, r6, r7, pc}
-.L736:
-	ldrh	r0, [r6, r3, lsl #1]
-	cmp	r0, ip
-	beq	.L734
-	add	r4, r7, r3, lsl #2
-	ldrb	r4, [r4, #2]	@ zero_extendqisi2
-	and	r4, r4, #224
-	cmp	r4, #160
-	ite	eq
-	addeq	r2, r2, r0
-	addne	r1, r1, r0
-.L734:
+	ldr	r0, [r3, r0, lsl #2]
+	bx	lr
+.L722:
+	.align	2
+.L721:
+	.word	.LANCHOR68
+	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
+	.section	.text.gc_write_completed,"ax",%progbits
+	.align	1
+	.global	gc_write_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_write_completed, %function
+gc_write_completed:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r5, .L752
+.L724:
+	ldr	r1, .L752+4
+	ldrb	r7, [r1]	@ zero_extendqisi2
+	cmp	r7, #255
+	bne	.L737
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L737:
+	movs	r3, #48
+	muls	r3, r7, r3
+	adds	r2, r5, r3
+	ldrb	r3, [r5, r3]	@ zero_extendqisi2
+	ldrh	r6, [r2, #32]
+	strb	r3, [r1]
+	ldr	r1, [r2, #36]
+	cbz	r1, .L725
+	ldr	r3, .L752+8
+	movs	r0, #1
+	ldr	r2, [r2, #24]
+	strh	r0, [r3, #316]	@ movhi
+	ldr	r0, .L752+12
+	str	r2, [r3, #320]
+	bl	printf
+	movw	r2, #673
+	ldr	r1, .L752+16
+	ldr	r0, .L752+20
+	bl	printf
+.L725:
+	ldr	fp, .L752+48
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L726
+	ldr	r3, .L752+24
+	ldr	r3, [r3]
+	ldrb	r4, [r3, #89]	@ zero_extendqisi2
+	add	r4, r4, r4, lsl #1
+.L727:
+	ldr	r3, .L752+28
+	ldr	r10, .L752+52
+	ldr	r3, [r3]
+	tst	r3, #256
+	beq	.L728
+	movs	r3, #48
+	mov	r1, r6
+	mla	r3, r3, r7, r5
+	ldr	r0, .L752+32
+	ldrb	r2, [r3, #1]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	ldrb	r3, [r3, r6]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r6
+	bl	printf
+.L728:
+	movs	r3, #48
+	ldr	r2, [r10]
+	mla	r3, r3, r7, r5
+	ldrb	r2, [r2, r6]	@ zero_extendqisi2
+	mov	r8, r6
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	cmp	r2, r3
+	beq	.L729
+	movw	r2, #682
+	ldr	r1, .L752+16
+	ldr	r0, .L752+20
+	bl	printf
+.L729:
+	movs	r3, #48
+	mla	r7, r3, r7, r5
+	ldrb	r3, [r7, #45]	@ zero_extendqisi2
+	cmp	r3, #3
+	beq	.L730
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L730
+	ldr	r3, .L752+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L730
+	ldr	r3, .L752+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L731
+	ldr	r3, .L752+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L730
+.L731:
+	ldr	r2, [r10]
+	movs	r3, #0
+	movs	r1, #48
+	mov	r0, r3
+	add	r6, r6, r2
+.L732:
+	uxth	r2, r3
+	cmp	r4, r2
+	bls	.L724
+	ldrb	r2, [r6, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
+	mla	r2, r1, r2, r5
+	strb	r0, [r2, #45]
+	b	.L732
+.L726:
+	ldr	r3, .L752+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L739
+	ldr	r3, .L752+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L739
+	ldr	r3, .L752+24
+	ldr	r3, [r3]
+	ldrb	r4, [r3, #89]	@ zero_extendqisi2
+	lsls	r4, r4, #1
+	b	.L727
+.L739:
+	movs	r4, #1
+	b	.L727
+.L730:
+	ldr	r7, .L752+8
+	mov	fp, #255
+	movs	r3, #48
+	strh	r6, [r7, #312]	@ movhi
+.L733:
+	sub	r2, r8, r6
+	uxth	r2, r2
+	cmp	r4, r2
+	bls	.L724
+	ldr	r2, [r10]
+	movs	r1, #0
+	str	r3, [sp, #12]
+	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	strb	fp, [r2, r8]
+	add	r8, r8, #1
+	mla	r2, r3, r0, r5
+	add	r0, r0, r0, lsl #1
+	strb	r1, [r2, #45]
+	add	r0, r5, r0, lsl #4
+	bl	buf_free
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	subs	r2, r2, #1
+	strb	r2, [r7, #7]
 	b	.L733
-.L738:
+.L753:
 	.align	2
-.L737:
-	.word	.LANCHOR86
-	.word	.LANCHOR54
-	.word	.LANCHOR56
-	.word	.LANCHOR57
-	.word	.LANCHOR60
-	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
-	.section	.text.ftl_debug_info_fill,"ax",%progbits
+.L752:
+	.word	.LANCHOR50
+	.word	.LANCHOR69
+	.word	.LANCHOR63
+	.word	.LC46
+	.word	.LANCHOR70
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR14
+	.word	.LC47
+	.word	.LANCHOR75
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR71
+	.word	.LANCHOR74
+	.size	gc_write_completed, .-gc_write_completed
+	.section	.text.gc_get_src_blk,"ax",%progbits
 	.align	1
-	.global	ftl_debug_info_fill
+	.global	gc_get_src_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_debug_info_fill, %function
-ftl_debug_info_fill:
+	.type	gc_get_src_blk, %function
+gc_get_src_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r0, #0
-	bx	lr
-	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
-	.section	.text.ftl_vpn_update,"ax",%progbits
+	ldr	r3, .L763
+	push	{r4, r5, r6, r7, lr}
+	ldr	r2, [r3]
+	ldr	r3, .L763+4
+	ldrh	r4, [r2, #124]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r4, .L755
+	add	r3, r2, #392
+	movs	r4, #1
+.L756:
+	add	r6, r3, #128
+	movw	r5, #65535
+.L760:
+	mov	r7, r3
+	ldrh	r0, [r3], #2
+	cmp	r0, r5
+	beq	.L758
+	strh	r5, [r7]	@ movhi
+	cbz	r4, .L759
+	ldrh	r3, [r2, #124]
+	subs	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L755:
+	add	r3, r1, #60
+	ldrh	r3, [r2, r3, lsl #1]
+	cbz	r3, .L761
+	add	r3, r2, r1, lsl #7
+	adds	r3, r3, #136
+	b	.L756
+.L759:
+	add	r2, r2, r1, lsl #1
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L758:
+	cmp	r3, r6
+	bne	.L760
+	pop	{r4, r5, r6, r7, pc}
+.L761:
+	movw	r0, #65535
+	pop	{r4, r5, r6, r7, pc}
+.L764:
+	.align	2
+.L763:
+	.word	.LANCHOR10
+	.word	.LANCHOR76
+	.size	gc_get_src_blk, .-gc_get_src_blk
+	.section	.text.gc_free_temp_buf,"ax",%progbits
 	.align	1
-	.global	ftl_vpn_update
+	.global	gc_free_temp_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_vpn_update, %function
-ftl_vpn_update:
+	.type	gc_free_temp_buf, %function
+gc_free_temp_buf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L741
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r5, .L779
+	ldrb	r0, [r5, #7]	@ zero_extendqisi2
+	cbz	r0, .L765
+	ldr	r3, .L779+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	bhi	.L772
+	ldr	r3, .L779+8
+	movs	r7, #48
+	ldrh	r4, [r5, #312]
+	ldr	r6, .L779+12
+	ldrh	r2, [r3]
+	ldr	r3, .L779+16
+	add	r1, r4, #24
+	ldr	r0, .L779+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r2, r1
+	ldr	r1, [r6]
+.L767:
+	cmp	r4, r2
+	bcc	.L770
+.L772:
+	movs	r0, #0
+.L765:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L770:
+	ldrb	r3, [r1, r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L768
+	mla	ip, r7, r3, r0
+	ldrb	ip, [ip, #45]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L768
+	add	r3, r3, r3, lsl #1
+	add	r0, r0, r3, lsl #4
+	bl	buf_free
+	ldr	r3, .L779+24
 	ldr	r3, [r3]
-	ldrh	r0, [r3, r0, lsl #1]
-	clz	r0, r0
-	lsrs	r0, r0, #5
-	bx	lr
-.L742:
+	lsls	r3, r3, #23
+	bpl	.L769
+	ldr	r3, [r6]
+	mov	r1, r4
+	ldr	r0, .L779+28
+	ldrb	r2, [r3, r4]	@ zero_extendqisi2
+	bl	printf
+.L769:
+	ldr	r3, [r6]
+	movs	r2, #255
+	movs	r0, #1
+	strb	r2, [r3, r4]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r5, #7]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L768:
+	adds	r4, r4, #1
+	b	.L767
+.L780:
 	.align	2
-.L741:
-	.word	.LANCHOR56
-	.size	ftl_vpn_update, .-ftl_vpn_update
-	.section	.text.ftl_vpn_decrement,"ax",%progbits
+.L779:
+	.word	.LANCHOR63
+	.word	.LANCHOR52
+	.word	.LANCHOR77
+	.word	.LANCHOR74
+	.word	.LANCHOR78
+	.word	.LANCHOR50
+	.word	.LANCHOR14
+	.word	.LC48
+	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.print_gc_debug_info,"ax",%progbits
 	.align	1
-	.global	ftl_vpn_decrement
+	.global	print_gc_debug_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_vpn_decrement, %function
-ftl_vpn_decrement:
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	push	{r4, lr}
-	cmp	r0, r3
-	mov	r1, r0
-	beq	.L744
-	ldr	r3, .L749
-	ldr	r3, [r3]
-	ldrh	r4, [r3, r0, lsl #1]
-	cbnz	r4, .L745
-	mov	r2, r4
-	ldr	r0, .L749+4
-	bl	printf
-.L748:
-	movs	r0, #0
-	pop	{r4, pc}
-.L745:
-	subs	r4, r4, #1
-	strh	r4, [r3, r0, lsl #1]	@ movhi
-.L744:
-	ldr	r2, .L749+8
-	ldrh	r0, [r2]
-	cmp	r1, r0
-	beq	.L748
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L747
-	strh	r1, [r2]	@ movhi
-	b	.L748
-.L747:
-	bl	ftl_vpn_update
-	adds	r0, r0, #0
-	strh	r1, [r2]	@ movhi
-	it	ne
-	movne	r0, #1
+	push	{r0, r1, r2, r3, r4, lr}
+	ldr	r4, .L782
+	ldr	r0, .L782+4
+	ldrh	r4, [r4]
+	ldrh	r3, [r0, #310]
+	ldrh	r2, [r0, #2]
+	ldrh	r1, [r0]
+	str	r4, [sp, #8]
+	ldrb	r0, [r0, #7]	@ zero_extendqisi2
+	str	r0, [sp, #4]
+	ldr	r0, .L782+8
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r0, .L782+12
+	bl	printf
+	add	sp, sp, #16
+	@ sp needed
 	pop	{r4, pc}
-.L750:
+.L783:
 	.align	2
-.L749:
-	.word	.LANCHOR56
-	.word	.LC17
-	.word	.LANCHOR87
-	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
-	.section	.text.lpa_hash_update_ppa,"ax",%progbits
+.L782:
+	.word	.LANCHOR79
+	.word	.LANCHOR63
+	.word	.LANCHOR52
+	.word	.LC49
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.section	.text.zftl_get_gc_node,"ax",%progbits
 	.align	1
-	.global	lpa_hash_update_ppa
+	.global	zftl_get_gc_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_hash_update_ppa, %function
-lpa_hash_update_ppa:
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	uxtb	ip, r0
-	ldr	r4, .L762
-	movw	r6, #65535
-	mov	fp, r6
-	ldr	r5, .L762+4
-	ldr	lr, [r4]
-	ldr	r4, .L762+8
-	ldrh	r3, [r5, ip, lsl #1]
-	ldr	r4, [r4]
-.L752:
-	cmp	r3, fp
-	beq	.L756
-	ldr	r7, [lr, r3, lsl #2]
-	add	r8, lr, r3, lsl #2
-	cmp	r0, r7
-	bne	.L753
-	cmp	r6, fp
-	mov	r10, #-1
-	ite	eq
-	ldrheq	r6, [r4, r3, lsl #1]
-	ldrhne	r7, [r4, r3, lsl #1]
-	str	r10, [r8]
-	ite	eq
-	strheq	r6, [r5, ip, lsl #1]	@ movhi
-	strhne	r7, [r4, r6, lsl #1]	@ movhi
-	movw	r6, #65535
-	strh	r6, [r4, r3, lsl #1]	@ movhi
-.L756:
-	ldrh	r3, [r5, ip, lsl #1]
-	str	r0, [lr, r2, lsl #2]
-	strh	r2, [r5, ip, lsl #1]	@ movhi
-	strh	r3, [r4, r2, lsl #1]	@ movhi
-	adds	r3, r1, #1
-	beq	.L758
-	ldr	r3, .L762+12
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L762+16
-	lsr	r0, r1, r0
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L758:
-	mov	r0, #-1
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L753:
-	mov	r6, r3
-	ldrh	r3, [r4, r3, lsl #1]
-	b	.L752
-.L763:
+	@ link register save eliminated.
+	cmp	r1, #5
+	bne	.L785
+	ldr	r3, .L788
+	mov	r1, r0
+.L787:
+	ldr	r0, [r3]
+	b	_list_get_gc_head_node.isra.2
+.L785:
+	cmp	r1, #2
+	bne	.L786
+	b	zftl_get_gc_node.part.9
+.L786:
+	mov	r1, r0
+	ldr	r3, .L788+4
+	b	.L787
+.L789:
 	.align	2
-.L762:
-	.word	.LANCHOR82
+.L788:
+	.word	.LANCHOR80
 	.word	.LANCHOR81
-	.word	.LANCHOR83
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
-	.section	.text.ftl_write_completed,"ax",%progbits
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	.section	.text.gc_search_src_blk,"ax",%progbits
 	.align	1
-	.global	ftl_write_completed
+	.global	gc_search_src_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_completed, %function
-ftl_write_completed:
-	@ args = 0, pretend = 0, frame = 0
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L889
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L772
-	ldr	r6, .L772+4
-.L765:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L771
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L771:
-	movs	r2, #48
-	add	r5, r3, r3, lsl #1
-	muls	r3, r2, r3
-	add	r5, r6, r5, lsl #4
-	adds	r4, r6, r3
-	ldrb	r3, [r6, r3]	@ zero_extendqisi2
-	strb	r3, [r7]
-	ldr	r3, [r4, #36]
-	adds	r3, r3, #1
-	bne	.L766
-	ldr	r3, .L772+8
-	mov	r8, #1
-	ldr	r10, [r4, #24]
-	ldrh	r0, [r3]
-	ldr	r3, .L772+12
-	rsb	r2, r0, #21
-	lsl	r2, r8, r2
-	lsr	r0, r10, r0
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	ands	r0, r0, r2
-	bl	__aeabi_uidiv
-	uxth	fp, r0
-	mov	r3, r10
-	ldr	r2, [r4, #20]
-	mov	r1, fp
-	ldr	r0, .L772+16
-	bl	printf
-	movs	r2, #0
-	mov	r1, r8
-	mov	r0, fp
-	bl	gc_add_sblk
-	ldr	r3, .L772+20
+	sub	sp, sp, #32
+	str	r2, [sp, #12]
+	add	r2, r0, #60
+	mov	fp, r0
 	ldr	r3, [r3]
-	ldrh	r2, [r3, #16]
-	cmp	r2, fp
-	bne	.L767
-	movs	r2, #0
-	strh	r2, [r3, #22]	@ movhi
-.L768:
-	mov	r0, r5
-	bl	ftl_write_buf
-	b	.L765
-.L767:
-	ldrh	r2, [r3, #48]
-	cmp	r2, fp
-	itt	eq
-	moveq	r2, #0
-	strheq	r2, [r3, #54]	@ movhi
-	b	.L768
-.L766:
-	ldrh	r2, [r4, #32]
-	ldr	r1, [r4, #28]
-	ldr	r0, [r4, #20]
-	bl	lpa_hash_update_ppa
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	lsls	r2, r3, #29
-	bpl	.L770
-	bic	r3, r3, #2
-	strb	r3, [r4, #2]
-	b	.L765
-.L770:
+	str	r1, [sp, #16]
+	ldrh	r5, [r3, r2, lsl #1]
+	cbz	r5, .L791
 	mov	r0, r5
-	bl	buf_free
-	b	.L765
-.L773:
-	.align	2
-.L772:
-	.word	.LANCHOR88
-	.word	.LANCHOR36
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC18
-	.word	.LANCHOR60
-	.size	ftl_write_completed, .-ftl_write_completed
-	.section	.text.ftl_mask_bad_block,"ax",%progbits
-	.align	1
-	.global	ftl_mask_bad_block
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_mask_bad_block, %function
-ftl_mask_bad_block:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ubfx	r4, r0, #21, #3
-	ldr	r3, .L780
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r1, r2, #21
-	lsls	r3, r3, r1
-	lsrs	r0, r0, r2
-	ldr	r2, .L780+4
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r3, .L780+8
-	uxtb	r5, r0
+.L790:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L791:
+	cmp	r0, #0
+	bne	.L793
+	ldr	r10, .L889+28
+	mov	r4, r0
+	ldr	r6, .L889+4
+	mov	r8, r0
+	strh	r0, [r6]	@ movhi
+.L794:
+	ldrh	r5, [sp, #12]
+	uxth	r3, r8
+	cmp	r3, r5
+	bcs	.L799
+	ldrh	r2, [r6]
+	movs	r1, #3
+	mov	r0, r2
+	str	r2, [sp, #20]
+	bl	zftl_get_gc_node
+	ldr	r2, [sp, #20]
+	movw	r3, #65535
+	cmp	r0, r3
+	mov	r7, r0
+	add	r2, r2, #1
+	uxth	r2, r2
+	strh	r2, [r6]	@ movhi
+	beq	.L795
+	ldr	r3, .L889+8
 	ldr	r3, [r3]
-	lsls	r3, r3, #17
-	bpl	.L775
-	mov	r2, r5
-	mov	r1, r4
-	ldr	r0, .L780+12
+	lsls	r3, r3, #23
+	bpl	.L796
+	ldr	r3, [r10]
+	mov	r1, r0
+	ldrh	r3, [r3, r0, lsl #1]
+	ldr	r0, .L889+12
 	bl	printf
-.L775:
-	ldr	r3, .L780+16
+.L796:
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r7, lsl #1]
+	ldr	r3, .L889+16
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	bls	.L774
-	ldr	r3, .L780+20
-	ldr	r2, [r3]
-	movs	r3, #1
-	lsls	r3, r3, r4
-	add	r2, r2, r5, lsl #2
-	ldrb	r4, [r2, #3]	@ zero_extendqisi2
-	orrs	r4, r4, r3
-	strb	r4, [r2, #3]
-.L774:
-	pop	{r3, r4, r5, pc}
-.L781:
-	.align	2
-.L780:
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR22
-	.word	.LC19
-	.word	.LANCHOR54
-	.word	.LANCHOR57
-	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
-	.section	.text.print_ftl_debug_info,"ax",%progbits
-	.align	1
-	.global	print_ftl_debug_info
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	print_ftl_debug_info, %function
-print_ftl_debug_info:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L783
-	push	{r4, r5, r6, lr}
-	sub	sp, sp, #32
-	ldr	r4, .L783+4
-	ldr	r5, [r3]
-	ldr	r0, [r4]
-	ldr	r6, [r5, #528]
-	ldrh	r3, [r0, #116]
-	ldrh	r2, [r0, #118]
-	ldrh	r1, [r0, #114]
-	str	r6, [sp, #16]
-	ldr	r5, [r5, #524]
-	str	r5, [sp, #12]
-	ldrh	r5, [r0, #120]
-	str	r5, [sp, #8]
-	ldrh	r5, [r0, #124]
-	str	r5, [sp, #4]
-	ldrh	r0, [r0, #122]
-	str	r0, [sp]
-	ldr	r0, .L783+8
-	bl	printf
-	ldr	r1, [r4]
-	ldr	r3, .L783+12
-	ldr	r0, .L783+16
-	ldr	r2, [r1, #64]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r2, [sp, #4]
-	ldr	r2, [r1, #8]
-	str	r2, [sp]
-	ldr	r2, [r1, #28]
-	ldr	r1, [r1, #20]
-	bl	printf
-	ldr	r1, [r4]
-	ldr	r0, .L783+20
-	ldr	r3, [r1, #16]
-	ldr	r2, [r1, #60]
-	ldr	r1, [r1, #52]
-	lsrs	r3, r3, #11
-	bl	printf
-	ldr	r2, [r4]
-	ldrh	r0, [r2, #98]
-	ldrh	r3, [r2, #88]
-	ldrh	r1, [r2, #74]
-	str	r0, [sp, #24]
-	ldrh	r0, [r2, #94]
-	str	r0, [sp, #20]
-	ldrh	r0, [r2, #90]
-	str	r0, [sp, #16]
-	ldr	r0, [r2, #80]
-	str	r0, [sp, #12]
-	ldrh	r0, [r2, #72]
-	str	r0, [sp, #8]
-	ldrh	r0, [r2, #96]
-	str	r0, [sp, #4]
-	ldrh	r0, [r2, #92]
-	str	r0, [sp]
-	ldr	r0, .L783+24
-	ldr	r2, [r2, #84]
-	bl	printf
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L784:
-	.align	2
-.L783:
-	.word	.LANCHOR60
-	.word	.LANCHOR46
-	.word	.LC20
-	.word	.LANCHOR89
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.size	print_ftl_debug_info, .-print_ftl_debug_info
-	.section	.text.sblk_init,"ax",%progbits
-	.align	1
-	.global	sblk_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_init, %function
-sblk_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L786
-	movs	r3, #255
-	movs	r0, #0
-	strb	r3, [r2]
-	ldr	r2, .L786+4
-	strb	r3, [r2]
-	ldr	r2, .L786+8
-	strb	r3, [r2]
-	ldr	r2, .L786+12
-	strb	r3, [r2]
-	bx	lr
-.L787:
-	.align	2
-.L786:
-	.word	.LANCHOR90
-	.word	.LANCHOR88
-	.word	.LANCHOR51
-	.word	.LANCHOR62
-	.size	sblk_init, .-sblk_init
-	.section	.text.dump_sblk_queue,"ax",%progbits
-	.align	1
-	.global	dump_sblk_queue
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	dump_sblk_queue, %function
-dump_sblk_queue:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	ldr	r4, .L797
-	ldr	r0, .L797+4
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	bl	printf
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	cmp	r4, #255
-	beq	.L788
-	ldr	r5, .L797+8
-	add	r4, r4, r4, lsl #1
-	ldr	r6, .L797+12
-	add	r4, r5, r4, lsl #4
-.L790:
-	ldr	r3, [r4, #24]
-	mov	r0, r6
-	ldrb	r2, [r4, #42]	@ zero_extendqisi2
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	bl	printf
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	cmp	r4, #255
-	beq	.L788
-	add	r4, r4, r4, lsl #1
-	add	r4, r5, r4, lsl #4
-	b	.L790
-.L788:
-	pop	{r4, r5, r6, pc}
-.L798:
-	.align	2
-.L797:
-	.word	.LANCHOR90
-	.word	.LC24
-	.word	.LANCHOR36
-	.word	.LC25
-	.size	dump_sblk_queue, .-dump_sblk_queue
-	.section	.text.queue_lun_state,"ax",%progbits
-	.align	1
-	.global	queue_lun_state
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	queue_lun_state, %function
-queue_lun_state:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L816
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cmp	r5, #255
-	beq	.L808
-	ldr	r3, .L816+4
-	ubfx	r10, r0, #21, #3
-	ldr	lr, .L816+12
-	mov	ip, #48
-	ldrh	r7, [r3]
-	movs	r3, #1
-	mov	r8, lr
-	rsb	r2, r7, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L816+8
-	subs	r3, r3, #1
-	ldrb	r6, [r2]	@ zero_extendqisi2
-	asr	r2, r0, r7
-	uxth	r3, r3
-	subs	r6, r6, #1
-	uxth	r6, r6
-	ands	r2, r2, r6
-	ands	r2, r2, r3
-.L807:
-	mla	r0, ip, r5, lr
-	ldr	r4, [r0, #24]
-	ubfx	fp, r4, #21, #3
-	cmp	r10, fp
-	bne	.L801
-	lsrs	r4, r4, r7
-	ldrb	r0, [r0, #42]	@ zero_extendqisi2
-	ands	r4, r4, r6
-	ands	r4, r4, r3
-	cmp	r2, r4
-	bne	.L802
-	cmp	r1, #1
-	bne	.L799
-	cmp	r0, #6
-	beq	.L801
-	cmp	r0, #8
-	beq	.L801
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	cmp	r2, r3
+	bcs	.L795
+	movs	r2, #0
+	mov	r0, r7
+	mov	r1, r2
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L798
+	adds	r4, r4, #1
+	uxth	r4, r4
+	cmp	r5, r4
+	bcs	.L798
+.L799:
+	ldr	r3, [sp, #16]
+	lsls	r0, r3, #30
+	bpl	.L801
+	ldr	r6, .L889+20
+	mov	r8, #0
+	ldr	r7, .L889+24
 .L802:
-	cmp	r1, #3
-	bhi	.L801
-	tbb	[pc, r1]
-.L804:
-	.byte	(.L803-.L804)/2
-	.byte	(.L805-.L804)/2
-	.byte	(.L806-.L804)/2
-	.byte	(.L799-.L804)/2
-	.p2align 1
-.L803:
-	cmp	r0, #2
-	beq	.L801
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L805:
-	cmp	r0, #6
-	beq	.L801
-	cmp	r0, #8
-	beq	.L801
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	uxth	r3, r8
+	cmp	r5, r3
+	bls	.L806
+	ldrh	r10, [r7]
+	movs	r1, #5
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node
+	movw	r2, #65535
+	strh	r10, [r7]	@ movhi
+	cmp	r0, r2
+	beq	.L803
+	ldr	r2, .L889+28
+	ldrh	r3, [r6]
+	ldr	r2, [r2]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, r3
+	bcs	.L803
+	movs	r2, #0
+	mov	r1, r2
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L805
+	adds	r4, r4, #1
+	uxth	r4, r4
+	cmp	r5, r4
+	bcs	.L805
 .L806:
-	cmp	r0, #10
-	bne	.L799
+	cmp	r4, r5
+	ldr	r1, .L889+32
+	bcs	.L808
+	ldr	r3, .L889+36
+	ldrh	r1, [r1]
+	ldrh	r2, [r6]
+	ldrh	r0, [r3]
+	ldr	r3, .L889+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r0, r3
+	sub	r3, r3, r1, lsr #2
+	cmp	r2, r3
+	bge	.L801
+	add	r2, r2, r1, lsr #3
+	strh	r2, [r6]	@ movhi
 .L801:
-	mul	r5, ip, r5
-	ldrb	r5, [r8, r5]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L807
+	ldr	r3, [sp, #16]
+	lsls	r1, r3, #31
+	bpl	.L809
+	cmp	r4, r5
+	bcs	.L809
+	ldr	r8, .L889+48
+	movs	r6, #0
+	movw	r7, #65535
+.L814:
+	ldrh	r10, [r8]
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node.part.9
+	cmp	r0, r7
+	strh	r10, [r8]	@ movhi
+	beq	.L810
+	movs	r2, #0
+	mov	r1, r2
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L811
+	adds	r4, r4, #1
+	uxth	r4, r4
+	cmp	r5, r4
+	bhi	.L811
+.L812:
+	ldr	r3, .L889+32
+	ldr	r2, .L889+16
+	ldrh	r1, [r3]
+	ldrh	r3, [r2]
+	cmp	r3, r1, lsr #1
+	bls	.L809
+	sub	r3, r3, r1, lsr #3
+	b	.L888
+.L795:
+	movs	r3, #0
+	strh	r3, [r6]	@ movhi
+	b	.L799
+.L798:
+	add	r8, r8, #1
+	b	.L794
+.L803:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L806
+.L805:
+	add	r8, r8, #1
+	b	.L802
 .L808:
-	movs	r0, #0
-.L799:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L817:
+	ldrh	r3, [r6]
+	ldrh	r2, [r1]
+	cmp	r3, r2
+	itt	hi
+	subhi	r3, r3, r2, lsr #3
+	strhhi	r3, [r6]	@ movhi
+	b	.L801
+.L810:
+	movs	r3, #0
+	strh	r3, [r8]	@ movhi
+.L813:
+	cmp	r4, r5
+	bcs	.L812
+	ldr	r2, .L889+16
+	ldr	r1, .L889+32
+	ldrh	r3, [r2]
+	ldrh	r1, [r1]
+	cmp	r3, r1
+	bcs	.L809
+	add	r3, r3, r1, lsr #3
+.L888:
+	strh	r3, [r2]	@ movhi
+.L809:
+	ldr	r3, .L889+8
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L836
+	ldr	r3, [sp, #12]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	ldr	r0, .L889+44
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+.L836:
+	mov	r0, r4
+	b	.L790
+.L811:
+	adds	r6, r6, #1
+	uxth	r3, r6
+	cmp	r5, r3
+	bhi	.L814
+	b	.L813
+.L890:
 	.align	2
-.L816:
-	.word	.LANCHOR90
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR36
-	.size	queue_lun_state, .-queue_lun_state
-	.section	.text.queue_remove_completed_req,"ax",%progbits
+.L889:
+	.word	.LANCHOR10
+	.word	.LANCHOR82
+	.word	.LANCHOR14
+	.word	.LC50
+	.word	.LANCHOR62
+	.word	.LANCHOR84
+	.word	.LANCHOR83
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LC51
+	.word	.LANCHOR86
+.L793:
+	ldr	r3, .L891
+	strh	r5, [r3, #314]	@ movhi
+	ldr	r3, .L891+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, [sp, #16]
+	ands	r3, r3, #1
+	str	r3, [sp, #20]
+	beq	.L839
+	ldr	r1, .L891+8
+	ldr	r2, .L891+12
+	ldr	r6, .L891+16
+	ldrh	r3, [r1]
+	mov	r10, r1
+	ldrh	r0, [r2]
+	str	r2, [sp, #24]
+	cmp	r3, r0, lsr #2
+	bcc	.L816
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bls	.L840
+.L816:
+	ldrh	r3, [r6]
+	movs	r0, #0
+	ldr	r4, .L891+20
+	lsrs	r3, r3, #2
+	strh	r3, [r4]	@ movhi
+	bl	zftl_get_gc_node.part.9
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L841
+	ldr	r2, .L891+24
+	ldr	r1, [r2]
+	ldr	r2, .L891+28
+	ldrh	r3, [r1, r0, lsl #1]
+	movs	r1, #0
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #2
+	bcs	.L842
+	mov	r2, fp
+	strh	r1, [r4]	@ movhi
+	bl	gc_add_sblk
+	adds	r4, r0, #0
+	it	ne
+	movne	r4, #1
+.L818:
+	ldr	r7, .L891+20
+	mov	r8, #64
+.L820:
+	ldrh	r2, [r7]
+	mov	r0, r2
+	str	r2, [sp, #28]
+	bl	zftl_get_gc_node.part.9
+	ldr	r2, [sp, #28]
+	movw	r3, #65535
+	cmp	r0, r3
+	add	r2, r2, #1
+	strh	r2, [r7]	@ movhi
+	beq	.L817
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L819
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r4, r3
+	bcs	.L817
+.L819:
+	add	r3, r8, #-1
+	uxth	r8, r3
+	cmp	r8, #0
+	bne	.L820
+.L817:
+	ldr	r3, [sp, #24]
+	ldrh	r2, [r10]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #3
+	bhi	.L837
+	ldrh	r3, [r6]
+	adds	r3, r3, #8
+	cmp	r2, r3
+	ble	.L815
+.L837:
+	ldr	r6, .L891+32
+	mov	r8, #64
+	movw	r7, #65535
+	movs	r3, #0
+	strh	r3, [r6]	@ movhi
+.L822:
+	ldrh	r10, [r6]
+	movs	r1, #3
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node
+	cmp	r0, r7
+	strh	r10, [r6]	@ movhi
+	beq	.L815
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L821
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r4, r3
+	bcs	.L815
+.L821:
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L822
+.L815:
+	ldr	r3, [sp, #16]
+	lsls	r2, r3, #30
+	bpl	.L823
+	ldr	r6, .L891+36
+	mov	r10, #64
+	ldr	r7, .L891+40
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L828:
+	ldrh	r8, [r7]
+	movs	r1, #5
+	mov	r0, r8
+	bl	zftl_get_gc_node
+	add	r3, r8, #1
+	strh	r3, [r7]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L824
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bne	.L825
+	ldr	r3, .L891+44
+	ldr	r2, .L891+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
+	ldr	r2, .L891+28
+	ldrh	r2, [r2]
+	sub	r3, r3, r2, lsr #3
+	strh	r3, [r6]	@ movhi
+.L825:
+	ldr	r3, .L891+24
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcs	.L826
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cmp	r0, #0
+	beq	.L827
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r4, r3
+	bcc	.L827
+.L824:
+	ldr	r3, [sp, #12]
+	ldr	r1, .L891+28
+	ldr	r0, .L891+44
+	cmp	r4, r3
+	bcc	.L829
+	cmp	r5, #0
+	bne	.L830
+	ldr	r3, .L891+52
+	ldrh	r2, [r3]
+	ldr	r3, .L891+56
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bls	.L830
+.L829:
+	ldr	r3, .L891+48
+	ldrh	r1, [r1]
+	ldrh	r2, [r6]
+	ldrh	r5, [r3]
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	lsrs	r1, r1, #3
+	muls	r3, r5, r3
+	subs	r3, r3, r1
+	cmp	r2, r3
+	bge	.L823
+	add	r2, r2, r1
+	strh	r2, [r6]	@ movhi
+.L823:
+	ldr	r3, [sp, #20]
+	cmp	r3, #0
+	beq	.L809
+	ldr	r5, .L891+60
+	mov	r8, #64
+	ldr	r7, .L891+24
+	movs	r3, #0
+	ldr	r6, .L891+32
+	strh	r3, [r6]	@ movhi
+.L834:
+	ldrh	r10, [r6]
+	movs	r1, #3
+	mov	r0, r10
+	add	r10, r10, #1
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	strh	r10, [r6]	@ movhi
+	cmp	r0, r3
+	beq	.L831
+	ldr	r3, [r7]
+	ldrh	r2, [r5]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r2, r3
+	bls	.L832
+	cmp	r3, #2
+	bls	.L832
+	ldr	r3, .L891+12
+	ldrh	r2, [r3]
+	ldr	r3, .L891+8
+	ldrh	r3, [r3]
+	cmp	r3, r2, lsr #1
+	bls	.L831
+.L832:
+	mov	r2, fp
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L833
+	adds	r4, r4, #1
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r4, r3
+	bcs	.L831
+.L833:
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L834
+.L831:
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	ldr	r3, .L891+28
+	bcs	.L835
+	ldrh	r2, [r3]
+	ldrh	r3, [r5]
+	cmp	r3, r2, lsr #1
+	bls	.L809
+	sub	r3, r3, r2, lsr #3
+	strh	r3, [r5]	@ movhi
+	b	.L809
+.L841:
+	movs	r4, #0
+	b	.L818
+.L842:
+	mov	r4, r1
+	b	.L818
+.L839:
+	ldr	r4, [sp, #20]
+	b	.L815
+.L826:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L824
+.L827:
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L828
+	b	.L824
+.L830:
+	ldrh	r1, [r1]
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	ldrh	r3, [r6]
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itt	gt
+	subgt	r3, r3, r1, lsr #3
+	strhgt	r3, [r6]	@ movhi
+	b	.L823
+.L835:
+	ldrh	r1, [r3]
+	ldr	r3, .L891+44
+	ldrh	r2, [r5]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	subs	r3, r3, #32
+	cmp	r2, r3
+	itt	lt
+	addlt	r2, r2, r1, lsr #3
+	strhlt	r2, [r5]	@ movhi
+	b	.L809
+.L840:
+	mov	r4, r5
+	b	.L817
+.L892:
+	.align	2
+.L891:
+	.word	.LANCHOR63
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR90
+	.word	.LANCHOR86
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LANCHOR83
+	.word	.LANCHOR78
+	.word	.LANCHOR77
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.zftl_insert_free_list,"ax",%progbits
 	.align	1
-	.global	queue_remove_completed_req
+	.global	zftl_insert_free_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_remove_completed_req, %function
-queue_remove_completed_req:
+	.type	zftl_insert_free_list, %function
+zftl_insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r5, .L834
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	cmp	r0, #255
-	beq	.L818
-	movs	r1, #48
-	ldr	r2, .L834+4
-	muls	r1, r0, r1
-	adds	r3, r2, r1
-	ldrb	r4, [r3, #42]	@ zero_extendqisi2
-	subs	r4, r4, #11
-	cmp	r4, #1
-	bhi	.L818
-	ldrb	r4, [r2, r1]	@ zero_extendqisi2
-	strb	r4, [r5]
-	movs	r4, #255
-	strb	r4, [r2, r1]
-	ldrb	r1, [r3, #43]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L820
-	ldrh	r3, [r3, #34]
-	cbnz	r3, .L821
-	ldr	r3, .L834+8
-.L833:
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cmp	r1, #255
-	bne	.L823
-	movs	r1, #48
-	mla	r2, r1, r0, r2
-	ldrb	r2, [r2, #1]	@ zero_extendqisi2
-	strb	r2, [r3]
-	pop	{r4, r5, pc}
-.L821:
-	ldr	r3, .L834+12
-	b	.L833
-.L820:
-	cbnz	r1, .L818
-	ldr	r3, [r3, #20]
-	adds	r3, r3, #1
-	beq	.L818
-	ldr	r3, .L834+16
-	b	.L833
-.L823:
-	movs	r3, #48
-.L826:
-	mov	r4, r1
-	muls	r1, r3, r1
-	ldrb	r1, [r2, r1]	@ zero_extendqisi2
-	cmp	r1, #255
-	bne	.L826
-	muls	r4, r3, r4
-	mla	r3, r3, r0, r2
-	ldrb	r3, [r3, #1]	@ zero_extendqisi2
-	strb	r3, [r2, r4]
-	pop	{r4, r5, pc}
-.L818:
-	pop	{r4, r5, pc}
-.L835:
+	@ link register save eliminated.
+	ldr	r3, .L897
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #24
+	bne	.L894
+	ldr	r2, .L897+4
+	ldr	r0, .L897+8
+.L896:
+	b	_insert_free_list
+.L894:
+	cmp	r3, #16
+	ittee	eq
+	ldreq	r2, .L897+12
+	ldreq	r0, .L897+16
+	ldrne	r2, .L897+20
+	ldrne	r0, .L897+24
+	b	.L896
+.L898:
 	.align	2
-.L834:
-	.word	.LANCHOR90
-	.word	.LANCHOR36
-	.word	.LANCHOR88
-	.word	.LANCHOR62
-	.word	.LANCHOR51
-	.size	queue_remove_completed_req, .-queue_remove_completed_req
-	.section	.text.pm_alloc_new_blk,"ax",%progbits
+.L897:
+	.word	.LANCHOR7
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.size	zftl_insert_free_list, .-zftl_insert_free_list
+	.section	.text.zftl_insert_data_list,"ax",%progbits
 	.align	1
-	.global	pm_alloc_new_blk
+	.global	zftl_insert_data_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_alloc_new_blk, %function
-pm_alloc_new_blk:
+	.type	zftl_insert_data_list, %function
+zftl_insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r4, .L854
-	ldr	r1, .L854+4
-	ldr	r2, [r4]
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	ldrh	r3, [r2, #690]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r1, r3
-	strh	r3, [r2, #690]	@ movhi
-	bls	.L837
-	add	r3, r3, #336
-	ldrh	r2, [r2, r3, lsl #1]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L838
-.L837:
-	ldr	r7, .L854+8
-	ldr	r6, .L854+12
-.L852:
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	movs	r1, #0
+	@ link register save eliminated.
+	ldr	r3, .L904
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #64
+	bne	.L900
+	ldr	r2, .L904+4
+	ldr	r0, .L904+8
+.L903:
+	b	_insert_data_list
+.L900:
+	cmp	r3, #96
+	bne	.L901
+	ldr	r2, .L904+12
+	ldr	r0, .L904+16
+	b	.L903
+.L901:
+	cmp	r3, #160
+	bne	.L899
+	ldr	r2, .L904+20
+	ldr	r0, .L904+24
+	b	.L903
+.L899:
+	bx	lr
+.L905:
+	.align	2
+.L904:
+	.word	.LANCHOR7
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	zftl_insert_data_list, .-zftl_insert_data_list
+	.section	.text.zftl_gc_get_free_sblk,"ax",%progbits
+	.align	1
+	.global	zftl_gc_get_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_gc_get_free_sblk, %function
+zftl_gc_get_free_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	movw	r6, #65535
+	ldr	r8, .L923+48
 	mov	r5, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r4]
-	mov	r0, r5
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	uxth	r0, r0
-	cbnz	r0, .L839
-	mov	r1, r5
-	mov	r0, r7
+	mov	r7, r1
+	ldr	r3, [r8]
+	ldrh	r4, [r3, #588]
+	cmp	r4, r6
+	beq	.L907
+	cbnz	r0, .L907
+	mov	r1, r4
+	ldr	r0, .L923
 	bl	printf
-	ldr	r3, [r6]
-	add	r5, r3, r5, lsl #2
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r5, #2]
-	b	.L852
-.L839:
-	ldr	r2, [r4]
-	movs	r0, #1
-	ldr	r1, .L854+16
-	movs	r3, #0
-	strh	r3, [r2, #690]	@ movhi
-	str	r0, [r1]
-	add	r1, r2, #416
-	movw	r0, #65535
-.L841:
-	ldrh	r6, [r1], #2
-	cmp	r6, r0
-	beq	.L840
-	adds	r3, r3, #1
-	cmp	r3, #128
-	bne	.L841
-	movs	r2, #188
-	ldr	r1, .L854+20
-	ldr	r0, .L854+24
+	ldr	r3, [r8]
+	strh	r6, [r3, #588]	@ movhi
+.L908:
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L907:
+	ldr	r3, .L923+4
+	ldr	r6, .L923+8
+	ldrh	r1, [r3]
+	ldrh	r3, [r6]
+	cmp	r1, r3
+	bls	.L909
+	cmp	r5, #0
+	beq	.L915
+	lsrs	r1, r1, #3
+.L910:
+	ldr	r2, .L923+4
+	ldr	r0, .L923+12
+.L922:
+	bl	_list_pop_index_node
+	uxth	r4, r0
+	movw	r3, #65535
+	cmp	r4, r3
+	bne	.L914
+	ldrh	r3, [r6]
+	mov	r2, r7
+	mov	r1, r4
+	ldr	r0, .L923+16
+	str	r3, [sp, #4]
+	ldr	r3, .L923+20
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	ldr	r3, .L923+24
+	ldr	r3, [r3]
 	bl	printf
-.L843:
-	b	.L843
-.L844:
-	movs	r2, #0
-	strh	r3, [r1, #692]	@ movhi
-	strh	r2, [r1, #696]	@ movhi
-	ldr	r2, .L854+28
-	ldrh	r2, [r2]
-	rsb	r2, r2, #21
-	asr	r0, r3, r2
-	strh	r0, [r1, #694]	@ movhi
-	ldr	r1, .L854+32
+.L914:
+	cmp	r5, #0
+	beq	.L908
+	ldr	r3, .L923+28
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L908
+	ldr	r3, .L923+32
+	ldr	r1, .L923+36
+	ldr	r0, .L923+40
+	ldr	r3, [r3]
 	ldr	r1, [r1]
-	lsls	r1, r1, #19
-	bpl	.L849
-	movs	r1, #1
-	uxth	r0, r0
-	lsl	r2, r1, r2
-	mov	r1, r3
-	str	r0, [sp]
-	subs	r2, r2, #1
-	ldr	r0, .L854+36
-	bl	printf
-.L849:
-	movs	r0, #0
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L840:
-	adds	r3, r3, #208
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	ldrh	r3, [r2, #688]
-	adds	r3, r3, #1
-	strh	r3, [r2, #688]	@ movhi
-.L838:
-	ldr	r1, [r4]
-	movw	r0, #65533
-	ldrh	r3, [r1, #690]
-	add	r3, r3, #336
-	ldrh	r3, [r1, r3, lsl #1]
-	subs	r2, r3, #1
-	uxth	r2, r2
-	cmp	r2, r0
-	bls	.L844
-	movs	r2, #193
-	ldr	r1, .L854+20
-	ldr	r0, .L854+24
+	ldrh	r1, [r1, r4, lsl #1]
+	add	r2, r3, r4, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrh	r1, [r3, r4, lsl #2]
+	ubfx	r1, r1, #0, #11
+	str	r1, [sp, #4]
+	mov	r1, r4
+	ldr	r3, [r3, r4, lsl #2]
+	ubfx	r3, r3, #11, #8
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
 	bl	printf
-.L845:
-	b	.L845
-.L855:
+	b	.L908
+.L915:
+	mov	r1, r5
+	b	.L910
+.L909:
+	cbnz	r5, .L912
+	lsrs	r1, r3, #2
+.L913:
+	ldr	r2, .L923+8
+	ldr	r0, .L923+44
+	b	.L922
+.L912:
+	rsb	r1, r1, r1, lsl #3
+	ubfx	r1, r1, #3, #16
+	b	.L913
+.L924:
 	.align	2
-.L854:
-	.word	.LANCHOR46
-	.word	.LANCHOR69
-	.word	.LC26
-	.word	.LANCHOR57
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR22
-	.word	.LC27
-	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
-	.section	.text.pm_select_ram_region,"ax",%progbits
+.L923:
+	.word	.LC52
+	.word	.LANCHOR97
+	.word	.LANCHOR99
+	.word	.LANCHOR98
+	.word	.LC53
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR14
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LC54
+	.word	.LANCHOR100
+	.word	.LANCHOR10
+	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
+	.section	.text.zftl_get_free_sblk,"ax",%progbits
 	.align	1
-	.global	pm_select_ram_region
+	.global	zftl_get_free_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_select_ram_region, %function
-pm_select_ram_region:
+	.type	zftl_get_free_sblk, %function
+zftl_get_free_sblk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L867
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #0
-	movw	r4, #65535
-	mov	r1, r2
-.L858:
-	ldrh	r5, [r2, r3, lsl #3]
-	uxth	r0, r3
-	cmp	r5, r4
-	beq	.L857
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L858
-	movs	r2, #0
-	mov	r4, #32768
-	mov	r0, r3
-.L860:
-	add	r3, r1, r2, lsl #3
-	uxth	r5, r2
-	ldrh	r3, [r3, #2]
-	lsls	r6, r3, #16
-	bmi	.L859
-	cmp	r3, r4
-	itt	cc
-	movcc	r4, r3
-	movcc	r0, r5
-.L859:
-	adds	r2, r2, #1
-	cmp	r2, #32
-	bne	.L860
-	cmp	r0, #32
-	bne	.L857
-	ldr	r3, .L867+4
-	mov	r2, #-1
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	movs	r3, #0
-.L862:
-	add	r4, r1, r3, lsl #3
-	uxth	r6, r3
-	ldrh	r4, [r4, #2]
-	cmp	r4, r2
-	bcs	.L861
-	ldrh	r7, [r1, r3, lsl #3]
-	cmp	r7, r5
-	itt	ne
-	movne	r2, r4
-	movne	r0, r6
-.L861:
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L862
-	cmp	r0, #32
-	bne	.L857
-	movw	r2, #289
-	ldr	r1, .L867+8
-	ldr	r0, .L867+12
-	bl	printf
-.L863:
-	b	.L863
-.L857:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L868:
+	cmp	r1, #5
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r1
+	bne	.L926
+	ldr	r3, .L947
+	ldr	r2, .L947+4
+	ldrh	r3, [r3]
+	ldrh	r1, [r2]
+	cmp	r3, r1
+	bcc	.L927
+	ldr	r2, .L947+8
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L928
+	cbz	r1, .L928
+.L927:
+	ldr	r2, .L947+4
+	lsrs	r1, r1, #1
+.L946:
+	ldr	r0, .L947+12
+	b	.L945
+.L928:
+	ldr	r2, .L947
+	movs	r1, #0
+	ldr	r0, .L947+16
+.L945:
+	bl	_list_pop_index_node
+	uxth	r4, r0
+	movw	r3, #65535
+	cmp	r4, r3
+	bne	.L931
+	ldr	r3, .L947+4
+	mov	r2, r5
+	mov	r1, r4
+	ldr	r0, .L947+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, .L947+8
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	ldr	r3, .L947+24
+	ldr	r3, [r3]
+	bl	printf
+	b	.L931
+.L926:
+	ldr	r7, .L947+28
+	movw	r6, #65535
+	ldr	r3, [r7]
+	ldrh	r4, [r3, #590]
+	cmp	r4, r6
+	beq	.L930
+	cmp	r1, #1
+	beq	.L930
+	mov	r1, r4
+	ldr	r0, .L947+32
+	bl	printf
+	ldr	r3, [r7]
+	strh	r6, [r3, #590]	@ movhi
+.L931:
+	mov	r0, r4
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L930:
+	ldr	r3, .L947+8
+	ldr	r2, .L947+4
+	ldrh	r3, [r3]
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bcc	.L932
+	ldr	r1, .L947
+	ldrh	r1, [r1]
+	cmp	r1, r3
+	bls	.L933
+	cbz	r2, .L933
+.L932:
+	cmp	r5, #1
+	it	eq
+	lsreq	r0, r2, #1
+	ldr	r2, .L947+4
+	mov	r1, r0
+	b	.L946
+.L933:
+	cmp	r5, #1
+	ldr	r2, .L947+8
+	it	eq
+	lsreq	r0, r3, #1
+	mov	r1, r0
+	ldr	r0, .L947+24
+	b	.L945
+.L948:
 	.align	2
-.L867:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
+.L947:
+	.word	.LANCHOR97
+	.word	.LANCHOR99
 	.word	.LANCHOR95
-	.word	.LC0
-	.size	pm_select_ram_region, .-pm_select_ram_region
-	.section	.text.ftl_memset,"ax",%progbits
+	.word	.LANCHOR100
+	.word	.LANCHOR98
+	.word	.LC53
+	.word	.LANCHOR96
+	.word	.LANCHOR10
+	.word	.LC55
+	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
+	.section	.text.zftl_remove_data_node,"ax",%progbits
 	.align	1
-	.global	ftl_memset
+	.global	zftl_remove_data_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
+	.type	zftl_remove_data_node, %function
+zftl_remove_data_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.flash_lsb_page_tbl_build,"ax",%progbits
-	.align	1
-	.global	flash_lsb_page_tbl_build
+	ldr	r3, .L954
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #64
+	bne	.L950
+	ldr	r2, .L954+4
+	ldr	r0, .L954+8
+.L953:
+	b	_list_remove_node
+.L950:
+	cmp	r3, #96
+	bne	.L951
+	ldr	r2, .L954+12
+	ldr	r0, .L954+16
+	b	.L953
+.L951:
+	cmp	r3, #160
+	bne	.L949
+	ldr	r2, .L954+20
+	ldr	r0, .L954+24
+	b	.L953
+.L949:
+	bx	lr
+.L955:
+	.align	2
+.L954:
+	.word	.LANCHOR7
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	zftl_remove_data_node, .-zftl_remove_data_node
+	.section	.text.zftl_remove_free_node,"ax",%progbits
+	.align	1
+	.global	zftl_remove_free_node
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_lsb_page_tbl_build, %function
-flash_lsb_page_tbl_build:
+	.type	zftl_remove_free_node, %function
+zftl_remove_free_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L905
-	cbnz	r0, .L871
-.L872:
-	strh	r0, [r4, r0, lsl #1]	@ movhi
-	adds	r0, r0, #1
-	cmp	r0, #256
-	bne	.L872
-.L878:
-	movs	r1, #255
-	mov	r2, #1024
-	ldr	r0, .L905+4
-	bl	ftl_memset
-	ldr	r1, .L905+4
-	movs	r3, #0
-.L873:
-	ldrh	r2, [r4, r3, lsl #1]
-	adds	r3, r3, #1
-	cmp	r3, #256
-	strh	r2, [r1, r2, lsl #1]	@ movhi
-	bne	.L873
-	pop	{r4, pc}
-.L871:
-	cmp	r0, #1
-	bne	.L874
-	movs	r3, #0
-.L877:
-	cmp	r3, #3
-	uxth	r2, r3
-	bls	.L875
-	tst	r2, #1
-	ite	ne
-	movne	r1, #3
-	moveq	r1, #2
-	rsb	r2, r1, r2, lsl #1
-	uxth	r2, r2
-.L875:
-	strh	r2, [r4, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L877
-	b	.L878
-.L874:
-	cmp	r0, #2
-	bne	.L879
-	movs	r2, #0
-.L881:
-	uxth	r3, r2
-	cmp	r2, #1
-	ittt	hi
-	lslhi	r3, r3, #1
-	addhi	r3, r3, #-1
-	uxthhi	r3, r3
-	strh	r3, [r4, r2, lsl #1]	@ movhi
-	adds	r2, r2, #1
-	cmp	r2, #256
-	bne	.L881
-	b	.L878
-.L879:
-	cmp	r0, #3
-	bne	.L882
-	movs	r3, #0
-.L885:
-	cmp	r3, #5
-	uxth	r2, r3
-	bls	.L883
-	tst	r2, #1
-	ite	ne
-	movne	r1, #5
-	moveq	r1, #4
-	rsb	r2, r1, r2, lsl #1
-	uxth	r2, r2
-.L883:
-	strh	r2, [r4, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	cmp	r3, #256
-	bne	.L885
-	b	.L878
-.L882:
-	cmp	r0, #4
-	mov	r3, #0
-	bne	.L886
-	strh	r3, [r4]	@ movhi
-	movs	r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #2
-	strh	r3, [r4, #4]	@ movhi
-	movs	r3, #3
-	strh	r3, [r4, #6]	@ movhi
-	movs	r3, #5
-	strh	r3, [r4, #10]	@ movhi
-	movs	r3, #7
-	strh	r3, [r4, #12]	@ movhi
-	mov	r2, r4
-	movs	r3, #8
-	strh	r0, [r4, #8]	@ movhi
-	strh	r3, [r2, #14]!	@ movhi
-.L888:
-	tst	r3, #1
-	ite	ne
-	movne	r1, #7
-	moveq	r1, #6
-	rsb	r1, r1, r3, lsl #1
-	adds	r3, r3, #1
-	uxth	r3, r3
-	strh	r1, [r2, #2]!	@ movhi
-	cmp	r3, #256
-	bne	.L888
-	b	.L878
-.L886:
-	cmp	r0, #5
-	bne	.L889
-.L890:
-	strh	r3, [r4, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
+	@ link register save eliminated.
+	ldr	r3, .L960
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #24
+	bne	.L957
+	ldr	r2, .L960+4
+	ldr	r0, .L960+8
+.L959:
+	b	_list_remove_node
+.L957:
 	cmp	r3, #16
-	bne	.L890
-	ldr	r2, .L905+8
-.L891:
-	strh	r3, [r2, #2]!	@ movhi
-	adds	r3, r3, #2
-	uxth	r3, r3
-	cmp	r3, #496
-	bne	.L891
-	b	.L878
-.L889:
-	cmp	r0, #8
-	bne	.L878
-.L892:
-	strh	r3, [r4, r3]	@ movhi
-	adds	r3, r3, #2
-	cmp	r3, #512
-	bne	.L892
-	b	.L878
-.L906:
+	ittee	eq
+	ldreq	r2, .L960+12
+	ldreq	r0, .L960+16
+	ldrne	r2, .L960+20
+	ldrne	r0, .L960+24
+	b	.L959
+.L961:
 	.align	2
-.L905:
-	.word	.LANCHOR14
+.L960:
+	.word	.LANCHOR7
+	.word	.LANCHOR95
 	.word	.LANCHOR96
-	.word	.LANCHOR14+30
-	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
-	.section	.text.flash_die_info_init,"ax",%progbits
-	.align	1
-	.global	flash_die_info_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_die_info_init, %function
-flash_die_info_init:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r4, .L920
-	ldr	r6, .L920+4
-	ldrh	r3, [r4, #26]
-	add	r10, r4, #1
-	ldr	r7, .L920+8
-	ldrb	r1, [r4, #12]	@ zero_extendqisi2
-	ldrh	r0, [r4, #10]
-	strh	r3, [r7]	@ movhi
-	strb	r5, [r6]
-	bl	__aeabi_idiv
-	ldr	r3, .L920+12
-	movs	r2, #8
-	mov	r1, r5
-	ldr	r8, .L920+32
-	ldr	fp, .L920+20
-	strh	r0, [r3]	@ movhi
-	ldr	r0, .L920+16
-	bl	ftl_memset
-	movs	r2, #32
-	mov	r1, r5
-	ldr	r0, .L920+20
-	bl	ftl_memset
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L920+16
-.L909:
-	ldr	r2, [sp]
-	add	r1, r8, r5, lsl #3
-	mov	r0, r10
-	str	r3, [sp, #4]
-	bl	flash_mem_cmp8
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L908
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	adds	r1, r2, #1
-	str	r0, [fp, r2, lsl #2]
-	strb	r1, [r6]
-	strb	r5, [r3, r2]
-.L908:
-	adds	r5, r5, #1
-	cmp	r5, #4
-	bne	.L909
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #2
-	beq	.L910
-.L914:
-	ldrb	r2, [r4, #13]	@ zero_extendqisi2
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	smulbb	r3, r3, r2
-	ldrh	r2, [r4, #14]
-	smulbb	r3, r3, r2
-	ldr	r2, .L920+24
-	strh	r3, [r2]	@ movhi
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L910:
-	ldrh	r5, [r7]
-	movs	r7, #0
-	ldrb	r3, [r4, #13]	@ zero_extendqisi2
-	ldrb	r8, [r4, #23]	@ zero_extendqisi2
-	ldr	fp, .L920+16
-	muls	r3, r5, r3
-	ldrh	r5, [r4, #14]
-	and	r5, r5, #65280
-	muls	r5, r3, r5
-	ldr	r3, .L920+28
-	lsl	r10, r5, #1
-.L913:
-	ldr	r1, .L920+32
-	mov	r0, r3
-	ldr	r2, [sp]
-	str	r3, [sp, #4]
-	add	r1, r1, r7, lsl #3
-	bl	flash_mem_cmp8
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L911
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	cmp	r8, #0
-	ite	eq
-	moveq	r1, r5
-	movne	r1, r10
-	ldr	r0, .L920+20
-	strb	r7, [fp, r2]
-	str	r1, [r0, r2, lsl #2]
-	adds	r1, r2, #1
-	strb	r1, [r6]
-.L911:
-	adds	r7, r7, #1
-	cmp	r7, #4
-	bne	.L913
-	b	.L914
-.L921:
-	.align	2
-.L920:
-	.word	.LANCHOR19
-	.word	.LANCHOR8
-	.word	.LANCHOR13
 	.word	.LANCHOR97
-	.word	.LANCHOR10
 	.word	.LANCHOR98
 	.word	.LANCHOR99
-	.word	.LANCHOR19+1
-	.word	.LANCHOR26
-	.size	flash_die_info_init, .-flash_die_info_init
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.word	.LANCHOR100
+	.size	zftl_remove_free_node, .-zftl_remove_free_node
+	.section	.text.zftl_list_update_data_list,"ax",%progbits
 	.align	1
-	.global	FlashReadFacBbtData
+	.global	zftl_list_update_data_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
+	.type	zftl_list_update_data_list, %function
+zftl_list_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	lsrs	r2, r2, #3
-	movs	r1, #0
-	bl	ftl_memset
-	movs	r0, #0
-	pop	{r3, pc}
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.lpa_hash_init,"ax",%progbits
+	@ link register save eliminated.
+	ldr	r3, .L967
+	mov	r1, r0
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #64
+	bne	.L963
+	ldr	r2, .L967+4
+	ldr	r0, .L967+8
+.L966:
+	b	_list_update_data_list
+.L963:
+	cmp	r3, #96
+	bne	.L964
+	ldr	r2, .L967+12
+	ldr	r0, .L967+16
+	b	.L966
+.L964:
+	cmp	r3, #160
+	bne	.L962
+	ldr	r2, .L967+20
+	ldr	r0, .L967+24
+	b	.L966
+.L962:
+	bx	lr
+.L968:
+	.align	2
+.L967:
+	.word	.LANCHOR7
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
+	.word	.LANCHOR81
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
+	.section	.text.print_list_info,"ax",%progbits
 	.align	1
-	.global	lpa_hash_init
+	.global	print_list_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_hash_init, %function
-lpa_hash_init:
+	.type	print_list_info, %function
+print_list_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r2, #512
-	movs	r1, #255
-	ldr	r0, .L924
-	bl	ftl_memset
-	ldr	r3, .L924+4
-	movs	r1, #255
-	ldr	r2, .L924+8
-	ldrh	r3, [r3]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L924+12
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	pop	{r3, lr}
-	b	ftl_memset
-.L925:
-	.align	2
-.L924:
-	.word	.LANCHOR81
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR83
-	.size	lpa_hash_init, .-lpa_hash_init
-	.section	.text.lpa_rebuild_hash,"ax",%progbits
+	push	{r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldrh	r2, [r1]
+	sub	sp, sp, #36
+	ldr	r1, [r0]
+	ldr	r0, .L973
+	bl	printf
+	ldr	r4, [r4]
+	cmp	r4, #0
+	beq	.L969
+	ldr	r6, .L973+4
+	movs	r5, #0
+	ldr	r7, .L973+8
+.L972:
+	ldr	r2, [r6]
+	ldr	r0, .L973+12
+	ldr	r3, .L973+16
+	subs	r2, r4, r2
+	asrs	r2, r2, #1
+	ldr	r0, [r0]
+	ldr	r1, [r3]
+	muls	r2, r7, r2
+	ldrh	r3, [r4]
+	uxth	r2, r2
+	ldrh	r0, [r0, r2, lsl #1]
+	add	ip, r1, r2, lsl #2
+	str	r0, [sp, #24]
+	ldrh	r0, [r1, r2, lsl #2]
+	ubfx	r0, r0, #0, #11
+	str	r0, [sp, #20]
+	ldr	r1, [r1, r2, lsl #2]
+	ldr	r0, .L973+20
+	ubfx	r1, r1, #11, #8
+	str	r1, [sp, #16]
+	ldrb	r1, [ip, #2]	@ zero_extendqisi2
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp, #12]
+	ldrb	r1, [ip, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	str	r1, [sp, #8]
+	ldrh	r1, [r4, #4]
+	str	r1, [sp, #4]
+	ldrh	r1, [r4, #2]
+	str	r1, [sp]
+	mov	r1, r5
+	bl	printf
+	ldrh	r4, [r4]
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L969
+	ldr	r3, [r6]
+	movs	r2, #6
+	adds	r5, r5, #1
+	uxth	r5, r5
+	mla	r4, r2, r4, r3
+	ldr	r3, .L973+24
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bcs	.L972
+.L969:
+	add	sp, sp, #36
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L974:
+	.align	2
+.L973:
+	.word	.LC56
+	.word	.LANCHOR4
+	.word	-1431655765
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LC57
+	.word	.LANCHOR101
+	.size	print_list_info, .-print_list_info
+	.section	.text.dump_all_list_info,"ax",%progbits
 	.align	1
-	.global	lpa_rebuild_hash
+	.global	dump_all_list_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	lpa_rebuild_hash, %function
-lpa_rebuild_hash:
+	.type	dump_all_list_info, %function
+dump_all_list_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L937
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L927
-	movs	r3, #0
-	movs	r2, #190
-	ldr	r1, .L937+4
-	ldr	r0, .L937+8
-	bl	printf
-.L927:
-	ldr	r6, .L937+12
-	mov	r2, #512
-	ldr	r4, .L937+16
-	movs	r1, #255
-	ldr	r0, .L937+20
-	bl	ftl_memset
-	ldrh	r3, [r4]
-	movs	r1, #255
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r5, .L937+24
-	muls	r2, r3, r2
-	ldr	r0, [r5]
-	lsls	r2, r2, #2
-	bl	ftl_memset
-	ldr	r3, .L937+28
-	movs	r2, #0
-	ldrb	r6, [r6]	@ zero_extendqisi2
-	ldr	ip, [r5]
-	ldr	r7, [r3]
-	ldr	r0, .L937+20
-.L928:
-	ldrh	r3, [r4]
-	uxth	r5, r2
-	mov	r1, r5
-	muls	r3, r6, r3
-	cmp	r5, r3, lsl #1
-	blt	.L930
-	pop	{r3, r4, r5, r6, r7, pc}
-.L930:
-	ldr	r3, [r7, r1, lsl #2]
-	adds	r2, r2, #1
-	cmp	r3, #-1
-	itttt	ne
-	uxtbne	r3, r3
-	ldrhne	lr, [r0, r3, lsl #1]
-	strhne	r5, [r0, r3, lsl #1]	@ movhi
-	strhne	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L928
-.L938:
+	push	{r3, lr}
+	ldr	r1, .L976
+	ldr	r0, .L976+4
+	bl	print_list_info
+	ldr	r1, .L976+8
+	ldr	r0, .L976+12
+	bl	print_list_info
+	ldr	r1, .L976+16
+	ldr	r0, .L976+20
+	bl	print_list_info
+	ldr	r1, .L976+24
+	ldr	r0, .L976+28
+	bl	print_list_info
+	ldr	r1, .L976+32
+	ldr	r0, .L976+36
+	bl	print_list_info
+	ldr	r1, .L976+40
+	ldr	r0, .L976+44
+	pop	{r3, lr}
+	b	print_list_info
+.L977:
 	.align	2
-.L937:
-	.word	.LANCHOR22
+.L976:
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR100
-	.word	.LC28
-	.word	.LANCHOR69
-	.word	.LANCHOR79
+	.word	.LANCHOR90
+	.word	.LANCHOR12
+	.word	.LANCHOR88
 	.word	.LANCHOR81
-	.word	.LANCHOR83
-	.word	.LANCHOR82
-	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
-	.section	.text.ftl_open_sblk_init,"ax",%progbits
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.size	dump_all_list_info, .-dump_all_list_info
+	.section	.text.ftl_tmp_into_update,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_init
+	.global	ftl_tmp_into_update
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
+	.type	ftl_tmp_into_update, %function
+ftl_tmp_into_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	ldr	r8, .L945+12
-	mov	r6, r1
-	movs	r7, #0
-.L940:
-.L943:
-	mov	r0, r6
-	ldr	r10, .L945+16
-	bl	ftl_alloc_sblk
-	movs	r1, #0
-	mov	r5, r0
-	bl	ftl_erase_sblk
-	add	r1, r4, #16
-	mov	r0, r5
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r1, .L945
-	cmp	r6, #2
-	ldrh	r2, [r8]
-	uxtb	r0, r0
-	strh	r5, [r4]	@ movhi
-	ite	eq
-	moveq	r3, #0
-	ldrbne	r3, [r1]	@ zero_extendqisi2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	strb	r0, [r4, #9]
-	smulbb	r0, r0, r2
-	strh	r7, [r4, #2]	@ movhi
-	it	ne
-	smulbbne	r3, r3, r2
-	strb	r7, [r4, #5]
-	mul	r2, r2, r1
-	ldr	r1, .L945+4
-	strh	r0, [r4, #6]	@ movhi
-	it	ne
-	uxthne	r3, r3
-	strh	r7, [r4, #10]	@ movhi
-	ldr	r0, [r1]
-	movs	r1, #255
-	strh	r3, [r4, #12]	@ movhi
-	lsls	r2, r2, #2
-	strb	r6, [r4, #4]
-	add	r0, r0, r3, lsl #2
-	bl	ftl_memset
-	ldr	r3, [r10]
-	ldrh	r2, [r4, #6]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cbnz	r3, .L939
-	mov	r1, r5
-	ldr	r0, .L945+8
-	bl	printf
-	ldr	r3, [r10]
-	movw	r2, #65535
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	movs	r3, #7
-	strb	r3, [r4, #4]
-	b	.L943
-.L939:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L946:
+	@ link register save eliminated.
+	ldr	r3, .L983
+	ldr	r3, [r3]
+	ldr	r2, [r3, #16]
+	cmp	r2, #2048
+	bls	.L979
+	ldr	r1, [r3, #20]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #16]
+	str	r1, [r3, #20]
+.L979:
+	ldr	r2, [r3, #24]
+	cmp	r2, #2048
+	bls	.L980
+	ldr	r1, [r3, #28]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #24]
+	str	r1, [r3, #28]
+.L980:
+	ldr	r2, [r3, #32]
+	cmp	r2, #1024
+	bls	.L981
+	ldr	r1, [r3, #36]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #32]
+	str	r1, [r3, #36]
+.L981:
+	ldr	r2, [r3, #40]
+	cmp	r2, #1024
+	bls	.L978
+	ldr	r1, [r3, #44]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #40]
+	str	r1, [r3, #44]
+.L978:
+	bx	lr
+.L984:
 	.align	2
-.L945:
-	.word	.LANCHOR69
-	.word	.LANCHOR82
-	.word	.LC26
-	.word	.LANCHOR79
-	.word	.LANCHOR56
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.pm_free_sblk,"ax",%progbits
+.L983:
+	.word	.LANCHOR102
+	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
+	.global	__aeabi_idiv
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
 	.align	1
-	.global	pm_free_sblk
+	.global	ftl_get_blk_list_in_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_free_sblk, %function
-pm_free_sblk:
-	@ args = 0, pretend = 0, frame = 280
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L962
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #280
-	ldrh	r2, [r3]
-	str	r3, [sp, #4]
-	cmp	r2, #128
-	bls	.L948
-	movs	r2, #74
-	ldr	r1, .L962+4
-	ldr	r0, .L962+8
-	bl	printf
-.L949:
-	b	.L949
-.L948:
-	mov	r2, #256
-	movs	r1, #0
-	add	r0, sp, #24
-	movs	r4, #1
-	bl	ftl_memset
-	ldr	r3, .L962+12
-	add	r10, sp, #24
-	ldr	r0, .L962+16
-	ldr	r1, .L962+20
-	ldrh	r7, [r3]
-	ldr	r6, [r0]
-	ldr	r5, [sp, #4]
-	rsb	r3, r7, #21
-	str	r0, [sp, #8]
-	lsls	r4, r4, r3
-	ldrh	r2, [r6, #698]
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	add	r8, r6, #704
-	ldrh	fp, [r5]
-	subs	r4, r4, #1
-	movs	r5, #0
-	str	r1, [sp, #12]
-.L950:
-	uxth	r1, r5
-	cmp	r2, r1
-	bhi	.L954
-	ldr	r6, .L962+24
-	movs	r5, #0
-	ldr	r7, .L962+28
-	mov	r10, r5
-	ldrb	r4, [r6]	@ zero_extendqisi2
-	ldrh	r3, [r7]
-	smulbb	r4, r4, r3
-	uxth	r4, r4
-.L955:
-	ldr	r3, [sp, #4]
-	uxth	r2, r5
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bhi	.L960
-	mov	r0, r10
-	add	sp, sp, #280
+	ldr	r2, .L994
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L994+4
+	mov	r8, r1
+	mov	r5, r4
+	ldrb	fp, [r2]	@ zero_extendqisi2
+	ldr	r2, .L994+8
+	ldr	r3, [r3]
+	ldrb	r10, [r2]	@ zero_extendqisi2
+	ldr	r2, .L994+12
+	add	r3, r3, r0, lsl #2
+	uxth	r7, r10
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	smulbb	r0, r0, r7
+	subs	r7, r7, #1
+	sxth	r7, r7
+	uxth	r6, r0
+.L986:
+	cmp	r5, fp
+	blt	.L990
+	mov	r3, r4
+	movw	r2, #65535
+.L991:
+	cmp	r3, fp
+	blt	.L992
+	mov	r0, r4
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L954:
-	ldr	r0, [r8], #4
-	mov	r1, r3
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
-	lsrs	r0, r0, r7
-	ands	r0, r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	uxth	r0, r0
-	ldr	r2, [sp, #20]
-	add	lr, r6, #416
-	movs	r1, #0
-.L951:
-	uxth	ip, r1
-	cmp	fp, ip
-	bhi	.L953
-	adds	r5, r5, #1
-	b	.L950
-.L953:
-	ldrh	ip, [lr], #2
-	cmp	r0, ip
-	ittt	eq
-	ldrheq	ip, [r10, r1, lsl #1]
-	addeq	ip, ip, #1
-	strheq	ip, [r10, r1, lsl #1]	@ movhi
-	adds	r1, r1, #1
-	b	.L951
-.L960:
-	ldr	r3, [sp, #8]
-	str	r2, [sp, #20]
-	ldr	r0, [r3]
-	uxth	r3, r5
-	add	fp, r3, #208
-	str	r3, [sp, #16]
-	ldr	r3, [sp, #12]
-	ldrh	r8, [r0, fp, lsl #1]
-	ldrh	r0, [r0, #692]
-	ldrb	r1, [r3]	@ zero_extendqisi2
+.L990:
+	asr	r1, r3, r5
+	lsls	r1, r1, #31
+	bmi	.L987
+	mov	r1, r10
+	mov	r0, r5
+	str	r2, [sp, #4]
+	str	r3, [sp]
 	bl	__aeabi_idiv
-	cmp	r0, r8
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	bne	.L956
-	ldrh	r0, [r7]
-	ldrb	r1, [r6]	@ zero_extendqisi2
-	smulbb	r1, r1, r0
-	add	r0, sp, #24
-	strh	r1, [r0, r3, lsl #1]	@ movhi
-.L956:
-	add	r1, sp, #24
-	ldrh	r3, [r1, r3, lsl #1]
-	cmp	r4, r3
-	bls	.L957
-	cbnz	r3, .L961
-.L959:
-	movw	r3, #65535
-	cmp	r8, r3
-	str	r3, [sp, #16]
-	beq	.L958
-	mov	r0, r8
-	bl	ftl_free_sblk
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3]
-	ldr	r3, [sp, #16]
-	strh	r3, [r2, fp, lsl #1]	@ movhi
-	ldrh	r3, [r2, #688]
-	subs	r3, r3, #1
-	strh	r3, [r2, #688]	@ movhi
-	b	.L958
-.L957:
-	cmp	r3, #0
-	beq	.L959
-.L958:
+	ldr	r2, [sp, #4]
+	cmp	r10, #1
+	ldr	r3, [sp]
+	ldrh	r1, [r2]
+	rsb	r1, r1, #21
+	lsl	r0, r0, r1
+	it	hi
+	andhi	r1, r7, r5
+	add	r0, r0, r6
+	uxth	r0, r0
+	it	hi
+	addhi	r0, r0, r1
+	strh	r0, [r8, r4, lsl #1]	@ movhi
+	adds	r4, r4, #1
+.L987:
 	adds	r5, r5, #1
-	b	.L955
-.L961:
-	mov	r10, r2
-	mov	r4, r3
-	b	.L958
-.L963:
+	b	.L986
+.L992:
+	strh	r2, [r8, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	b	.L991
+.L995:
 	.align	2
-.L962:
-	.word	.LANCHOR101
-	.word	.LANCHOR102
-	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR46
-	.word	.LANCHOR70
-	.word	.LANCHOR69
-	.word	.LANCHOR79
-	.size	pm_free_sblk, .-pm_free_sblk
-	.section	.text.ftl_memcpy,"ax",%progbits
-	.align	1
-	.global	ftl_memcpy
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.flash_into_data_init,"ax",%progbits
+.L994:
+	.word	.LANCHOR78
+	.word	.LANCHOR7
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
+	.section	.text.ftl_erase_phy_blk,"ax",%progbits
 	.align	1
-	.global	flash_into_data_init
+	.global	ftl_erase_phy_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_into_data_init, %function
-flash_into_data_init:
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r2, #2048
-	ldr	r4, .L966
-	movs	r1, #0
-	ldr	r0, [r4]
-	bl	ftl_memset
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r3, .L966+4
-	ldr	r1, .L966+8
-	adds	r0, r0, #80
-	str	r3, [r0, #-80]
-	mov	r3, #2032
-	str	r3, [r0, #-72]
-	movs	r3, #1
-	strh	r3, [r0, #-64]	@ movhi
-	bl	ftl_memcpy
-	ldr	r0, [r4]
-	movs	r2, #32
-	ldr	r1, .L966+12
-	pop	{r4, lr}
-	adds	r0, r0, #48
-	b	ftl_memcpy
-.L967:
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r6, r1
+	ldr	r3, .L1001
+	ldr	r7, .L1001+4
+	ldrh	r4, [r3]
+	rsb	r3, r4, #21
+	movs	r4, #1
+	asr	r5, r0, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L1001+8
+	subs	r4, r4, #1
+	uxtb	r5, r5
+	ands	r4, r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	sxth	r4, r4
+	cbz	r3, .L997
+	ldr	r3, .L1001+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L997
+	ldrh	r2, [r7]
+	clz	r1, r1
+	lsrs	r1, r1, #5
+	mov	r0, r5
+	muls	r2, r4, r2
+	bl	flash_erase_block_en
+.L997:
+	ldrh	r2, [r7]
+	uxtb	r1, r6
+	mov	r0, r5
+	muls	r2, r4, r2
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	flash_erase_block_en
+.L1002:
 	.align	2
-.L966:
-	.word	.LANCHOR5
-	.word	1398362953
+.L1001:
+	.word	.LANCHOR66
 	.word	.LANCHOR103
-	.word	.LANCHOR19
-	.size	flash_into_data_init, .-flash_into_data_init
-	.section	.text.ftl_memcpy32,"ax",%progbits
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
+	.section	.text.ftl_erase_sblk,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy32
+	.global	ftl_erase_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_erase_sblk, %function
+ftl_erase_sblk:
+	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #0
-	push	{r4, lr}
-.L969:
-	cmp	r3, r2
-	bne	.L970
-	pop	{r4, pc}
-.L970:
-	ldr	r4, [r1, r3, lsl #2]
-	str	r4, [r0, r3, lsl #2]
+	ldr	r2, .L1027
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r0
+	mov	r7, r1
+	movs	r5, #0
+	mov	r8, r2
+	sub	sp, sp, #72
+	ldr	r3, [r2]
+	add	r3, r3, r0, lsl #2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+.L1004:
+	ldr	r3, .L1027+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bge	.L1015
+	ldr	r3, .L1027+8
+	movs	r4, #0
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1027+12
+	add	ip, r2, #-1
+	ldrh	r0, [r3]
+	mul	r10, r2, r5
+	mov	r3, r4
+	mul	lr, r2, r6
+	b	.L1016
+.L1006:
+	ldr	r1, [sp, #4]
+	add	fp, r3, r10
+	asr	r1, r1, fp
+	lsls	r1, r1, #31
+	bmi	.L1005
+	add	r1, sp, #72
+	add	fp, r1, r4, lsl #2
+	and	r1, r3, ip
+	add	r1, r1, lr
+	muls	r1, r0, r1
+	adds	r4, r4, #1
+	str	r1, [fp, #-64]
+.L1005:
 	adds	r3, r3, #1
-	b	.L969
-	.size	ftl_memcpy32, .-ftl_memcpy32
-	.section	.text.ftl_memcmp,"ax",%progbits
-	.align	1
-	.global	ftl_memcmp
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",%progbits
-	.align	1
-	.global	rknand_get_clk_rate
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L973
-	bx	lr
-.L974:
-	.align	2
-.L973:
-	.word	148000000
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",%progbits
+.L1016:
+	cmp	r3, r2
+	blt	.L1006
+	cmp	r2, #4
+	bne	.L1007
+	uxtb	fp, r7
+	mov	r10, #0
+.L1008:
+	cmp	r10, r4
+	bne	.L1009
+.L1010:
+	adds	r5, r5, #1
+	b	.L1004
+.L1009:
+	add	r3, sp, #8
+	mov	r1, fp
+	ldr	r2, [r3, r10, lsl #2]
+	uxtb	r0, r5
+	add	r10, r10, #1
+	bl	flash_erase_block_en
+	b	.L1008
+.L1007:
+	cmp	r4, #2
+	bne	.L1011
+	ldr	r3, .L1027+16
+	uxtb	r4, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1012
+	ldr	r3, .L1027+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1012
+	clz	r1, r7
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #8]
+	lsrs	r1, r1, #5
+	mov	r0, r4
+	bl	flash_erase_duplane_block
+.L1012:
+	ldr	r3, [sp, #12]
+	uxtb	r1, r7
+	ldr	r2, [sp, #8]
+	mov	r0, r4
+	bl	flash_erase_duplane_block
+	b	.L1010
+.L1011:
+	cmp	r4, #1
+	bne	.L1010
+	ldr	r3, .L1027+16
+	uxtb	r4, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1014
+	ldr	r3, .L1027+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1014
+	clz	r1, r7
+	ldr	r2, [sp, #8]
+	lsrs	r1, r1, #5
+	mov	r0, r4
+	bl	flash_erase_block_en
+.L1014:
+	ldr	r2, [sp, #8]
+	uxtb	r1, r7
+	mov	r0, r4
+	bl	flash_erase_block_en
+	b	.L1010
+.L1015:
+	ldr	r1, .L1027+24
+	ldr	r0, [r8]
+	cbnz	r7, .L1017
+	ldrh	r2, [r0, r6, lsl #2]
+	adds	r3, r2, #1
+	ubfx	r3, r3, #0, #11
+	bfi	r2, r3, #0, #11
+	strh	r2, [r0, r6, lsl #2]	@ movhi
+	ldr	r2, [r1]
+	ldr	r1, [r2, #84]
+	adds	r1, r1, #1
+	str	r1, [r2, #84]
+	ldrh	r1, [r2, #96]
+	cmp	r1, r3
+	bge	.L1019
+	strh	r3, [r2, #96]	@ movhi
+.L1019:
+	movs	r0, #0
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1017:
+	ldr	r2, [r0, r6, lsl #2]
+	ubfx	r3, r2, #11, #8
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	bfi	r2, r3, #11, #8
+	uxth	r3, r3
+	str	r2, [r0, r6, lsl #2]
+	ldr	r2, [r1]
+	ldr	r1, [r2, #80]
+	adds	r1, r1, #1
+	str	r1, [r2, #80]
+	ldrh	r1, [r2, #98]
+	cmp	r1, r3
+	it	cc
+	strhcc	r3, [r2, #98]	@ movhi
+	b	.L1019
+.L1028:
+	.align	2
+.L1027:
+	.word	.LANCHOR7
+	.word	.LANCHOR104
+	.word	.LANCHOR67
+	.word	.LANCHOR103
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR102
+	.size	ftl_erase_sblk, .-ftl_erase_sblk
+	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
 	.align	1
-	.global	ftl_malloc
+	.global	ftl_alloc_sys_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
+	.type	ftl_alloc_sys_blk, %function
+ftl_alloc_sys_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.nandc_init,"ax",%progbits
+	push	{r4, r5, r6, lr}
+	ldr	r4, .L1038
+	ldr	r2, [r4]
+	ldrh	r1, [r2, #136]
+	cmp	r1, #63
+	itt	hi
+	movhi	r3, #0
+	strhhi	r3, [r2, #136]	@ movhi
+	ldrh	r3, [r2, #112]
+	cbnz	r3, .L1031
+	movw	r2, #1130
+	ldr	r1, .L1038+4
+	ldr	r0, .L1038+8
+	bl	printf
+.L1031:
+	ldr	r3, [r4]
+	movw	r4, #65535
+	mov	r6, r4
+	movs	r5, #0
+.L1035:
+	ldrh	r2, [r3, #136]
+	add	r1, r3, r2, lsl #1
+	adds	r1, r1, #158
+.L1032:
+	cmp	r2, #63
+	ble	.L1034
+	strh	r5, [r3, #136]	@ movhi
+	b	.L1035
+.L1034:
+	ldrh	r0, [r1, #2]!
+	cmp	r0, r4
+	bne	.L1037
+	adds	r2, r2, #1
+	b	.L1032
+.L1037:
+	add	r1, r2, #80
+	strh	r6, [r3, r1, lsl #1]	@ movhi
+	strh	r2, [r3, #136]	@ movhi
+	ldrh	r2, [r3, #112]
+	subs	r2, r2, #1
+	strh	r2, [r3, #112]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1039:
+	.align	2
+.L1038:
+	.word	.LANCHOR102
+	.word	.LANCHOR105
+	.word	.LC0
+	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
+	.section	.text.ftl_free_sys_blk,"ax",%progbits
 	.align	1
-	.global	nandc_init
+	.global	ftl_free_sys_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_init, %function
-nandc_init:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_free_sys_blk, %function
+ftl_free_sys_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #0
-	push	{r0, r1, r2, lr}
-	str	r3, [sp, #4]
-	movs	r2, #6
-	ldr	r3, .L981
-	ldr	r1, [r0, #352]
-	strb	r2, [r3]
-	ldr	r2, .L981+4
-	str	r0, [r2]
-	ldr	r2, .L981+8
-	cmp	r1, r2
-	ldr	r1, [r0, #128]
-	itt	eq
-	moveq	r2, #8
-	strbeq	r2, [r3]
-	ldr	r2, .L981+12
-	cmp	r1, r2
-	itt	eq
-	moveq	r2, #9
-	strbeq	r2, [r3]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r2, .L981+16
-	cmp	r3, #9
-	ldr	r3, .L981+20
-	bne	.L979
-	movs	r1, #1
-	strb	r1, [r3]
-	ldr	r3, [sp, #4]
-	orr	r3, r3, #256
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	str	r3, [r0]
-	movs	r3, #0
-	str	r3, [r0, #520]
-	movw	r3, #4225
-	str	r3, [r0, #4]
-	movw	r3, #8321
-	str	r3, [r0, #8]
-	movs	r3, #38
-	str	r2, [r0, #80]
-	str	r3, [r0, #84]
-	movs	r3, #39
-	str	r3, [r0, #84]
-.L980:
-	ldr	r3, .L981+24
-	movs	r2, #1
-	strb	r2, [r3]
-	movs	r3, #0
-	ldr	r2, .L981+28
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L981+32
-	strb	r3, [r2]
-	add	sp, sp, #12
-	@ sp needed
-	ldr	pc, [sp], #4
-.L979:
-	movs	r1, #0
-	strb	r1, [r3]
-	ldr	r3, [sp, #4]
-	orr	r3, r3, #256
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	str	r3, [r0]
-	movw	r3, #4225
-	str	r1, [r0, #336]
-	str	r3, [r0, #4]
-	movw	r3, #8321
-	str	r3, [r0, #344]
-	movs	r3, #38
-	str	r2, [r0, #304]
-	str	r3, [r0, #308]
-	movs	r3, #39
-	str	r3, [r0, #308]
-	mov	r0, #2048
-	bl	ftl_malloc
-	ldr	r3, .L981+36
-	str	r0, [r3]
-	b	.L980
-.L982:
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r4, .L1048
+	ldr	r2, [r4]
+	ldrh	r1, [r2, #138]
+	cmp	r1, #63
+	itt	hi
+	movhi	r3, #0
+	strhhi	r3, [r2, #138]	@ movhi
+	ldrh	r3, [r2, #112]
+	cmp	r3, #63
+	bls	.L1042
+	movw	r2, #1154
+	ldr	r1, .L1048+4
+	ldr	r0, .L1048+8
+	bl	printf
+.L1042:
+	ldr	r3, [r4]
+	movs	r0, #0
+	movw	r4, #65535
+.L1046:
+	ldrh	r2, [r3, #138]
+	add	r1, r3, r2, lsl #1
+	adds	r1, r1, #158
+.L1043:
+	cmp	r2, #63
+	ble	.L1045
+	strh	r0, [r3, #138]	@ movhi
+	b	.L1046
+.L1045:
+	ldrh	r6, [r1, #2]!
+	cmp	r6, r4
+	bne	.L1044
+	add	r1, r2, #80
+	strh	r5, [r3, r1, lsl #1]	@ movhi
+	strh	r2, [r3, #138]	@ movhi
+	ldrh	r2, [r3, #112]
+	adds	r2, r2, #1
+	strh	r2, [r3, #112]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1044:
+	adds	r2, r2, #1
+	b	.L1043
+.L1049:
 	.align	2
-.L981:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	1446522928
-	.word	1446588464
-	.word	1052675
-	.word	.LANCHOR28
-	.word	.LANCHOR29
-	.word	.LANCHOR31
-	.word	.LANCHOR27
-	.word	.LANCHOR30
-	.size	nandc_init, .-nandc_init
-	.section	.text.buf_init,"ax",%progbits
+.L1048:
+	.word	.LANCHOR102
+	.word	.LANCHOR106
+	.word	.LC0
+	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
+	.section	.text.ftl_info_data_recovery,"ax",%progbits
 	.align	1
-	.global	buf_init
+	.global	ftl_info_data_recovery
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	buf_init, %function
-buf_init:
+	.type	ftl_info_data_recovery, %function
+ftl_info_data_recovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #0
-	ldr	r4, .L986
-	mov	r6, r5
-	ldr	r7, .L986+4
-	mov	r8, r4
-.L984:
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	uxtb	r3, r5
-	strb	r6, [r4, #2]
-	adds	r5, r5, #1
-	adds	r2, r3, #1
-	strb	r3, [r4, #1]
-	strb	r2, [r4]
-	adds	r4, r4, #48
-	str	r6, [r4, #-40]
-	lsls	r0, r0, #9
-	bl	ftl_malloc
-	str	r0, [r4, #-44]
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	cmp	r5, #32
-	str	r0, [r4, #-36]
-	bne	.L984
-	movs	r3, #255
-	strb	r3, [r8, #1488]
-	ldr	r3, .L986+8
-	strb	r6, [r3]
-	ldr	r3, .L986+12
-	strb	r5, [r3]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L987:
-	.align	2
-.L986:
-	.word	.LANCHOR36
-	.word	.LANCHOR45
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.size	buf_init, .-buf_init
-	.section	.text.gc_init,"ax",%progbits
+	push	{r4, r5, r6, lr}
+	movw	r3, #65535
+	ldrh	r4, [r0]
+	cmp	r4, r3
+	beq	.L1050
+	ldr	r3, .L1059
+	ldr	r5, [r3]
+	add	r6, r5, r4, lsl #2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L1050
+	ldrb	r2, [r0, #4]	@ zero_extendqisi2
+	mov	r0, r4
+	bfi	r3, r2, #5, #3
+	strb	r3, [r6, #2]
+	bl	zftl_remove_free_node
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	ldr	r2, .L1059+4
+	tst	r3, #8
+	ldr	r0, [r2]
+	beq	.L1054
+	ldrh	r1, [r0, #116]
+	subs	r1, r1, #1
+	strh	r1, [r0, #116]	@ movhi
+.L1055:
+	and	r3, r3, #224
+	cmp	r3, #160
+	bne	.L1057
+	ldr	r3, [r5, r4, lsl #2]
+	ldr	r2, [r2]
+	ubfx	r1, r3, #11, #8
+	adds	r1, r1, #1
+	bfi	r3, r1, #11, #8
+	str	r3, [r5, r4, lsl #2]
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1054:
+	tst	r3, #24
+	itete	eq
+	ldrheq	r1, [r0, #114]
+	ldrhne	r1, [r0, #118]
+	addeq	r1, r1, #-1
+	addne	r1, r1, #-1
+	ite	eq
+	strheq	r1, [r0, #114]	@ movhi
+	strhne	r1, [r0, #118]	@ movhi
+	b	.L1055
+.L1057:
+	ldrh	r1, [r5, r4, lsl #2]
+	cmp	r3, #64
+	add	r0, r1, #1
+	bfi	r1, r0, #0, #11
+	strh	r1, [r5, r4, lsl #2]	@ movhi
+	bne	.L1058
+	ldr	r2, [r2]
+	ldrh	r3, [r2, #122]
+	subs	r3, r3, #1
+	strh	r3, [r2, #122]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1058:
+	cmp	r3, #96
+	itttt	eq
+	ldreq	r2, [r2]
+	ldrheq	r3, [r2, #124]
+	addeq	r3, r3, #-1
+	strheq	r3, [r2, #124]	@ movhi
+.L1050:
+	pop	{r4, r5, r6, pc}
+.L1060:
+	.align	2
+.L1059:
+	.word	.LANCHOR7
+	.word	.LANCHOR102
+	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
+	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
 	.align	1
-	.global	gc_init
+	.global	ftl_get_ppa_from_index
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_init, %function
-gc_init:
+	.type	ftl_get_ppa_from_index, %function
+ftl_get_ppa_from_index:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r5, #0
-	ldr	r3, .L989
-	mov	r1, r5
-	mov	r2, #320
-	ldr	r4, .L989+4
-	strb	r5, [r3]
-	ldr	r3, .L989+8
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, .L1065
+	ldr	r5, [r3]
+	ldr	r3, .L1065+4
+	ldrh	r2, [r3]
+	ldr	r3, .L1065+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mul	r1, r3, r2
+	cmp	r0, r1
+	itet	ge
+	smulbbge	r3, r3, r2
+	addlt	r5, r5, #16
+	addge	r5, r5, #48
+	ldrb	r6, [r5, #9]	@ zero_extendqisi2
+	itt	ge
+	subge	r4, r0, r3
+	uxthge	r4, r4
+	mov	r1, r6
 	mov	r0, r4
-	strb	r5, [r3]
-	bl	ftl_memset
+	bl	__aeabi_idiv
+	smulbb	r6, r0, r6
 	movw	r3, #65535
-	str	r5, [r4, #8]
-	strh	r3, [r4]	@ movhi
-	ldr	r3, .L989+12
-	ldr	r5, .L989+16
-	ldrh	r3, [r3]
-	lsrs	r2, r3, #2
-	lsrs	r1, r3, #1
-	strh	r2, [r4, #32]	@ movhi
-	strh	r1, [r4, #34]	@ movhi
-	ldr	r4, .L989+20
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	smulbb	r3, r0, r3
-	subs	r3, r3, #32
-	strh	r3, [r5]	@ movhi
-	ldr	r3, .L989+24
-	ldr	r5, .L989+28
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L989+32
-	strh	r2, [r3]	@ movhi
-	ldrh	r3, [r5]
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+36
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+40
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L989+44
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+48
-	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L989+52
-	str	r0, [r3]
-	pop	{r3, r4, r5, pc}
-.L990:
+	mov	r7, r0
+	subs	r4, r4, r6
+	uxth	r4, r4
+	adds	r4, r4, #8
+	ldrh	r4, [r5, r4, lsl #1]
+	cmp	r4, r3
+	bne	.L1064
+	movw	r2, #1593
+	ldr	r1, .L1065+12
+	ldr	r0, .L1065+16
+	bl	printf
+.L1064:
+	ldr	r3, .L1065+20
+	ldrh	r0, [r3]
+	mla	r0, r4, r0, r7
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1066:
 	.align	2
-.L989:
-	.word	.LANCHOR67
-	.word	.LANCHOR59
-	.word	.LANCHOR104
-	.word	.LANCHOR79
-	.word	.LANCHOR105
-	.word	.LANCHOR69
-	.word	.LANCHOR106
-	.word	.LANCHOR68
-	.word	.LANCHOR58
+.L1065:
+	.word	.LANCHOR10
+	.word	.LANCHOR85
+	.word	.LANCHOR78
 	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR65
-	.word	.LANCHOR61
-	.word	.LANCHOR109
-	.size	gc_init, .-gc_init
-	.section	.text.ftl_free,"ax",%progbits
+	.word	.LC0
+	.word	.LANCHOR103
+	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
+	.section	.text.lpa_hash_get_ppa,"ax",%progbits
 	.align	1
-	.global	ftl_free
+	.global	lpa_hash_get_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
+	.type	lpa_hash_get_ppa, %function
+lpa_hash_get_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.js_hash,"ax",%progbits
+	ldr	r3, .L1071
+	uxtb	r2, r0
+	push	{r4, r5}
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L1071+4
+	ldr	r1, [r2]
+	ldr	r2, .L1071+8
+	ldr	r4, [r2]
+	movw	r2, #65535
+.L1068:
+	cmp	r3, r2
+	bne	.L1070
+	mov	r0, #-1
+	pop	{r4, r5}
+	bx	lr
+.L1070:
+	ldr	r5, [r1, r3, lsl #2]
+	cmp	r0, r5
+	bne	.L1069
+	mov	r0, r3
+	pop	{r4, r5}
+	b	ftl_get_ppa_from_index
+.L1069:
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1068
+.L1072:
+	.align	2
+.L1071:
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
+	.section	.text.ftl_get_new_free_page,"ax",%progbits
 	.align	1
-	.global	js_hash
+	.global	ftl_get_new_free_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	js_hash, %function
-js_hash:
+	.type	ftl_get_new_free_page, %function
+ftl_get_new_free_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L995
-	add	r1, r1, r0
-	push	{r4, lr}
-.L993:
-	cmp	r0, r1
-	bne	.L994
-	mov	r0, r3
-	pop	{r4, pc}
-.L994:
-	lsrs	r2, r3, #2
-	ldrb	r4, [r0], #1	@ zero_extendqisi2
-	add	r2, r2, r3, lsl #5
-	add	r2, r2, r4
-	eors	r3, r3, r2
-	b	.L993
-.L996:
+	ldrh	r2, [r0]
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r2, r3
+	bne	.L1074
+	movw	r2, #1716
+	ldr	r1, .L1081
+	ldr	r0, .L1081+4
+	bl	printf
+.L1074:
+	ldr	r3, .L1081+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1075
+	movw	r2, #1717
+	ldr	r1, .L1081
+	ldr	r0, .L1081+4
+	bl	printf
+.L1075:
+	ldrh	r3, [r4, #6]
+	cbnz	r3, .L1076
+	movw	r2, #1718
+	ldr	r1, .L1081
+	ldr	r0, .L1081+4
+	bl	printf
+.L1076:
+	ldrb	r3, [r4, #5]	@ zero_extendqisi2
+	movw	r2, #65535
+	movs	r1, #0
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+	ldr	r3, .L1081+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+.L1077:
+	cmp	r0, r2
+	ldrb	r3, [r4, #5]	@ zero_extendqisi2
+	beq	.L1079
+	ldr	r1, .L1081+16
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	ldrh	r2, [r4, #2]
+	ldrh	r1, [r1]
+	cmp	r5, r3
+	strb	r3, [r4, #5]
+	itttt	eq
+	addeq	r3, r2, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	strbeq	r3, [r4, #5]
+	muls	r0, r1, r0
+	ldrh	r1, [r4, #6]
+	subs	r1, r1, #1
+	strh	r1, [r4, #6]	@ movhi
+	orrs	r0, r0, r2
+	ldrh	r1, [r4, #10]
+	adds	r1, r1, #1
+	strh	r1, [r4, #10]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L1079:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r5
+	strb	r3, [r4, #5]
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	strbeq	r1, [r4, #5]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	ldrb	r3, [r4, #5]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+	b	.L1077
+.L1082:
 	.align	2
-.L995:
-	.word	1204201446
-	.size	js_hash, .-js_hash
-	.section	.text.timer_get_time,"ax",%progbits
+.L1081:
+	.word	.LANCHOR111
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR103
+	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
+	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	timer_get_time
+	.global	ftl_ext_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	timer_get_time, %function
-timer_get_time:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_ext_alloc_new_blk, %function
+ftl_ext_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r3, r4, r5, lr}
+	bl	ftl_alloc_sys_blk
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r4, r0
+	cmp	r3, r2
+	bls	.L1084
+	movw	r2, #1749
+	ldr	r1, .L1085
+	ldr	r0, .L1085+4
+	bl	printf
+.L1084:
+	ldr	r5, .L1085+8
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sys_blk
+	ldr	r3, [r5]
 	movs	r0, #0
-	bx	lr
-	.size	timer_get_time, .-timer_get_time
-	.section	.text.FlashCs123Init,"ax",%progbits
+	strh	r4, [r3, #130]	@ movhi
+	strh	r0, [r3, #140]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L1086:
+	.align	2
+.L1085:
+	.word	.LANCHOR112
+	.word	.LC0
+	.word	.LANCHOR102
+	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
+	.section	.text.ftl_total_vpn_update,"ax",%progbits
 	.align	1
-	.global	FlashCs123Init
+	.global	ftl_total_vpn_update
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashCs123Init, %function
-FlashCs123Init:
+	.type	ftl_total_vpn_update, %function
+ftl_total_vpn_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",%progbits
+	ldr	r2, .L1098
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r1, r2
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L1088
+	cbnz	r0, .L1088
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1088:
+	ldr	r2, .L1098+4
+	movs	r3, #0
+	mov	r0, r3
+	movw	ip, #65535
+	strh	r3, [r1]	@ movhi
+	ldrh	r5, [r2]
+	ldr	r2, .L1098+8
+	ldr	r6, [r2]
+	ldr	r2, .L1098+12
+	ldr	r7, [r2]
+	mov	r2, r3
+.L1090:
+	uxth	r1, r3
+	cmp	r5, r1
+	bhi	.L1093
+	ldr	r3, .L1098+16
+	ldr	r4, [r3]
+	ldr	r3, .L1098+20
+	str	r2, [r4, #524]
+	ldr	r3, [r3]
+	str	r0, [r4, #528]
+	ldrh	r1, [r3, #120]
+	cbz	r1, .L1087
+	bl	__aeabi_uidiv
+	str	r0, [r4, #532]
+.L1087:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1093:
+	ldrh	r1, [r6, r3, lsl #1]
+	cmp	r1, ip
+	beq	.L1091
+	add	r4, r7, r3, lsl #2
+	ldrb	r4, [r4, #2]	@ zero_extendqisi2
+	and	r4, r4, #224
+	cmp	r4, #160
+	ite	eq
+	addeq	r0, r0, r1
+	addne	r2, r2, r1
+.L1091:
+	adds	r3, r3, #1
+	b	.L1090
+.L1099:
+	.align	2
+.L1098:
+	.word	.LANCHOR113
+	.word	.LANCHOR6
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LANCHOR10
+	.word	.LANCHOR102
+	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
+	.section	.text.ftl_debug_info_fill,"ax",%progbits
 	.align	1
-	.global	rk_nand_de_init
+	.global	ftl_debug_info_fill
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	b	FlashDeInit
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	movs	r0, #0
+	bx	lr
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
+	.section	.text.ftl_vpn_update,"ax",%progbits
 	.align	1
-	.global	rk_ftl_get_capacity
+	.global	ftl_vpn_update
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
+	.type	ftl_vpn_update, %function
+ftl_vpn_update:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L1001
-	ldr	r0, [r3]
-	bx	lr
-.L1002:
+	push	{r4, lr}
+	mov	r4, r0
+	bl	zftl_list_update_data_list
+	ldr	r3, .L1104
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L1103
+	ldr	r3, .L1104+4
+	movs	r0, #1
+	str	r0, [r3]
+	pop	{r4, pc}
+.L1103:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1105:
 	.align	2
-.L1001:
-	.word	.LANCHOR52
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",%progbits
+.L1104:
+	.word	.LANCHOR9
+	.word	.LANCHOR114
+	.size	ftl_vpn_update, .-ftl_vpn_update
+	.section	.text.ftl_vpn_decrement,"ax",%progbits
 	.align	1
-	.global	rknand_print_hex
+	.global	ftl_vpn_decrement
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rknand_print_hex, %function
-rknand_print_hex:
+	.type	ftl_vpn_decrement, %function
+ftl_vpn_decrement:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1012
-	mov	fp, r0
-	mov	r6, r1
-	mov	r8, r2
-	mov	r10, r3
-	mov	r4, r5
-.L1004:
-	cmp	r4, r10
-	bne	.L1010
-	ldr	r1, .L1012+4
-	ldr	r0, .L1012+8
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	printf
-.L1010:
-	cbnz	r5, .L1005
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	cmp	r0, r3
+	mov	r5, r0
+	beq	.L1107
+	ldr	r3, .L1115
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r0, lsl #1]
+	cbnz	r4, .L1108
+	ldr	r3, .L1115+4
+	mov	r1, r0
 	mov	r2, r4
-	mov	r1, fp
-	ldr	r0, .L1012+12
-	bl	printf
-.L1005:
-	cmp	r8, #4
-	bne	.L1006
-	ldr	r1, [r6, r4, lsl #2]
-.L1011:
-	mov	r0, r7
-	adds	r5, r5, #1
-	bl	printf
-	cmp	r5, #15
-	bls	.L1009
-	movs	r5, #0
-	ldr	r1, .L1012+4
-	ldr	r0, .L1012+8
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldr	r0, .L1115+8
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	lsrs	r3, r3, #5
 	bl	printf
-.L1009:
-	adds	r4, r4, #1
-	b	.L1004
-.L1006:
-	cmp	r8, #2
-	ite	eq
-	ldrsheq	r1, [r6, r4, lsl #1]
-	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1011
-.L1013:
+.L1113:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1108:
+	subs	r4, r4, #1
+	strh	r4, [r3, r0, lsl #1]	@ movhi
+.L1107:
+	ldr	r3, .L1115+12
+	ldrh	r0, [r3]
+	mov	r4, r3
+	cmp	r5, r0
+	beq	.L1113
+	movw	r2, #65535
+	cmp	r0, r2
+	bne	.L1110
+	strh	r5, [r3]	@ movhi
+	b	.L1113
+.L1110:
+	bl	ftl_vpn_update
+	ldr	r3, .L1115+16
+	adds	r0, r0, #0
+	it	ne
+	movne	r0, #1
+	ldrh	r1, [r4]
+	strh	r5, [r4]	@ movhi
+	ldrh	r2, [r3]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	cmp	r2, #7
+	it	hi
+	movhi	r2, #0
+	strh	r2, [r3]	@ movhi
+	ldrh	r2, [r3]
+	ldr	r3, .L1115+20
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L1116:
 	.align	2
-.L1012:
-	.word	.LC30
-	.word	.LC31
-	.word	.LC32
-	.word	.LC29
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.hynix_get_read_retry_default,"ax",%progbits
+.L1115:
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LC58
+	.word	.LANCHOR64
+	.word	.LANCHOR115
+	.word	.LANCHOR65
+	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
+	.section	.text.lpa_hash_update_ppa,"ax",%progbits
 	.align	1
-	.global	hynix_get_read_retry_default
+	.global	lpa_hash_update_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_get_read_retry_default, %function
-hynix_get_read_retry_default:
-	@ args = 0, pretend = 0, frame = 56
+	.type	lpa_hash_update_ppa, %function
+lpa_hash_update_ppa:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1107
-	cmp	r0, #2
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #56
-	mov	r1, #173
-	mov	r2, #174
-	mov	r6, r0
-	ldr	r4, [r3]
-	add	r3, r4, #128
-	strb	r0, [r4, #112]
-	str	r3, [sp, #8]
-	mov	r3, #172
-	strb	r3, [r4, #128]
-	mov	r3, #175
-	strb	r1, [r4, #129]
-	strb	r2, [r4, #130]
-	strb	r3, [r4, #131]
-	bne	.L1015
-	movs	r3, #167
-	movs	r2, #247
-	strb	r3, [r4, #128]
-	ldr	r3, .L1107+4
-	strb	r2, [r3, #17]
-.L1069:
-	mov	r10, #7
-	b	.L1101
-.L1015:
-	cmp	r0, #3
-	bne	.L1017
-	add	r2, r4, #127
-	movs	r3, #176
-.L1018:
-	strb	r3, [r2, #1]!
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #184
-	bne	.L1018
-.L1102:
-	mov	r10, #8
-	mov	fp, r10
-.L1016:
-	subs	r3, r6, #1
-	cmp	r3, #1
-	bhi	.L1023
-	movs	r6, #0
-.L1024:
-	ldr	r3, .L1107+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxtb	r3, r6
-	cmp	r2, r3
-	bhi	.L1029
-.L1030:
-	strb	fp, [r4, #113]
-	strb	r10, [r4, #114]
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1017:
-	cmp	r0, #4
-	bne	.L1019
-	movs	r0, #204
-	strb	r1, [r4, #133]
-	strb	r0, [r4, #128]
-	movs	r0, #191
-	strb	r0, [r4, #129]
-	movs	r0, #170
-	strb	r0, [r4, #130]
-	movs	r0, #171
-	strb	r0, [r4, #131]
-	movs	r0, #205
-	strb	r0, [r4, #132]
-	strb	r2, [r4, #134]
-	strb	r3, [r4, #135]
-	b	.L1102
-.L1019:
-	cmp	r0, #5
-	bne	.L1020
-	movs	r3, #56
-	mov	r10, #8
-	strb	r3, [r4, #128]
-	movs	r3, #57
-	strb	r3, [r4, #129]
-	movs	r3, #58
-	strb	r3, [r4, #130]
-	movs	r3, #59
-	strb	r3, [r4, #131]
-.L1101:
-	mov	fp, #4
-	b	.L1016
-.L1020:
-	cmp	r0, #6
-	bne	.L1021
-	movs	r3, #14
-	mov	r10, #12
-	strb	r3, [r4, #128]
-	movs	r3, #15
-	strb	r3, [r4, #129]
-	movs	r3, #16
-	strb	r3, [r4, #130]
-	movs	r3, #17
-	strb	r3, [r4, #131]
-	b	.L1101
-.L1021:
-	cmp	r0, #7
-	bne	.L1069
-	add	r2, r4, #127
-	movs	r3, #176
-.L1022:
-	strb	r3, [r2, #1]!
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #184
-	bne	.L1022
-	movs	r3, #212
-	mov	r10, #12
-	strb	r3, [r4, #136]
-	movs	r3, #213
-	strb	r3, [r4, #137]
-	mov	fp, #10
-	b	.L1016
-.L1029:
-	ldr	r2, .L1107+12
-	movs	r1, #160
-	add	r8, fp, #-1
-	add	r7, r4, #127
-	ldrb	r3, [r2, r3]	@ zero_extendqisi2
-	mla	r1, r1, r3, r4
-	add	r2, r1, #144
-	ldr	r1, [sp, #8]
+	uxtb	ip, r0
+	ldr	r4, .L1128
+	movw	r6, #65535
+	mov	fp, r6
+	ldr	r5, .L1128+4
+	ldr	lr, [r4]
+	ldr	r4, .L1128+8
+	ldrh	r3, [r5, ip, lsl #1]
+	ldr	r4, [r4]
+.L1118:
+	cmp	r3, fp
+	beq	.L1122
+	ldr	r7, [lr, r3, lsl #2]
+	add	r8, lr, r3, lsl #2
+	cmp	r0, r7
+	bne	.L1119
+	cmp	r6, fp
+	mov	r10, #-1
+	ite	eq
+	ldrheq	r6, [r4, r3, lsl #1]
+	ldrhne	r7, [r4, r3, lsl #1]
+	str	r10, [r8]
+	ite	eq
+	strheq	r6, [r5, ip, lsl #1]	@ movhi
+	strhne	r7, [r4, r6, lsl #1]	@ movhi
+	movw	r6, #65535
+	strh	r6, [r4, r3, lsl #1]	@ movhi
+.L1122:
+	ldrh	r3, [r5, ip, lsl #1]
+	str	r0, [lr, r2, lsl #2]
+	strh	r2, [r5, ip, lsl #1]	@ movhi
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r3, r1, #1
+	beq	.L1124
+	ldr	r3, .L1128+12
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L1128+16
+	lsr	r0, r1, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L1124:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1119:
+	mov	r6, r3
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1118
+.L1129:
+	.align	2
+.L1128:
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
+	.section	.text.ftl_mask_bad_block,"ax",%progbits
+	.align	1
+	.global	ftl_mask_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1137
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ubfx	r6, r0, #21, #3
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1137+4
+	mov	r1, r4
+	smulbb	r2, r6, r4
+	uxtb	r8, r2
+	ldrh	r2, [r3]
+	lsr	r3, r0, r2
+	rsb	r2, r2, #21
+	movs	r0, #1
+	lsls	r0, r0, r2
+	subs	r0, r0, #1
+	ands	r0, r0, r3
+	uxth	r10, r0
+	bl	__aeabi_uidiv
+	ldr	r3, .L1137+8
+	cmp	r4, #1
+	it	hi
+	addhi	r2, r4, #-1
+	mov	r5, r0
+	it	hi
+	andhi	r2, r2, r10
+	uxth	r7, r0
+	ldr	r3, [r3]
+	itt	hi
+	addhi	r2, r2, r8
+	uxtbhi	r8, r2
+	lsls	r3, r3, #17
+	bpl	.L1132
+	uxth	r3, r0
+	str	r10, [sp]
+	mov	r2, r8
+	ldr	r0, .L1137+12
+	mov	r1, r6
+	bl	printf
+.L1132:
+	ldr	r3, .L1137+16
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bls	.L1130
+	ldr	r3, .L1137+20
+	uxth	r5, r5
+	movs	r2, #1
+	lsl	r8, r2, r8
+	ldr	r3, [r3]
+	add	r5, r3, r5, lsl #2
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r2, r2, r8
+	strb	r2, [r5, #3]
+.L1130:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1138:
+	.align	2
+.L1137:
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.word	.LANCHOR14
+	.word	.LC59
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.gc_free_bad_sblk,"ax",%progbits
+	.align	1
+	.global	gc_free_bad_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_bad_sblk, %function
+gc_free_bad_sblk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r4, .L1153
+	ldr	r3, [r4, #324]
+	cbz	r3, .L1151
+	ldr	r7, .L1153+4
+	mov	r10, #0
+.L1141:
+	ldr	r3, .L1153+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxth	r3, r10
+	cmp	r2, r3
+	bhi	.L1148
+.L1151:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1148:
+	ldr	r3, .L1153+12
+	uxth	r0, r10
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	mov	r1, fp
+	bl	__aeabi_idiv
+	ldrh	r5, [r7]
+	uxth	r6, fp
+	cmp	fp, #1
+	ldr	r2, .L1153+16
+	mov	fp, #0
+	rsb	r5, r5, #21
+	lsl	r0, r0, r5
+	smulbb	r5, r8, r6
+	itt	hi
+	addhi	r6, r6, #-1
+	andhi	r6, r6, r10
+	add	r5, r5, r0
+	uxth	r5, r5
+	itt	hi
+	addhi	r5, r5, r6
+	uxthhi	r5, r5
+.L1143:
+	ldr	r1, [r4, #324]
+	uxth	r6, fp
+	mov	r3, r6
+	cmp	r1, r6
+	bhi	.L1147
+	add	r10, r10, #1
+	b	.L1141
+.L1147:
+	adds	r3, r3, #164
+	ldrh	r3, [r4, r3, lsl #1]
+	cmp	r3, r5
+	bne	.L1144
+	mov	r0, r2
+	mov	r1, r5
 	str	r2, [sp, #4]
-	ldr	r2, .L1107+16
-	uxtab	r8, r1, r8
-	ldr	r5, [r2]
+	bl	printf
+	ldrh	r0, [r7]
+	lsl	r0, r5, r0
+	bl	ftl_mask_bad_block
+	ldr	r3, [r4, #324]
 	ldr	r2, [sp, #4]
-	add	r5, r5, r3, lsl #8
-	subs	r2, r2, #1
-	addw	r3, r5, #2056
-.L1025:
-	str	r2, [sp, #16]
-	movs	r2, #55
-	str	r2, [r3]
-	ldrb	r0, [r7, #1]!	@ zero_extendqisi2
+.L1145:
+	cmp	r6, r3
+	bcc	.L1146
+	subs	r3, r3, #1
+	str	r3, [r4, #324]
+.L1144:
+	add	fp, fp, #1
+	b	.L1143
+.L1146:
+	add	r1, r6, #165
+	ldrh	r0, [r4, r1, lsl #1]
+	add	r1, r6, #164
+	adds	r6, r6, #1
+	uxth	r6, r6
+	strh	r0, [r4, r1, lsl #1]	@ movhi
+	b	.L1145
+.L1154:
+	.align	2
+.L1153:
+	.word	.LANCHOR63
+	.word	.LANCHOR66
+	.word	.LANCHOR78
+	.word	.LANCHOR67
+	.word	.LC60
+	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
+	.section	.text.ftl_free_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r0
+	ldr	r3, .L1175
+	ldr	r10, [r3]
+	lsls	r3, r0, #2
+	add	r7, r10, r3
+	ldrb	r4, [r7, #2]	@ zero_extendqisi2
+	lsls	r2, r4, #28
+	lsr	r3, r4, #5
+	str	r3, [sp, #4]
+	bpl	.L1157
+	ldr	r2, .L1175+4
+	ldrh	r3, [r10, r0, lsl #2]
+	ldr	r5, [r10, r0, lsl #2]
+	ldr	r2, [r2]
+	ubfx	r3, r3, #0, #11
 	str	r3, [sp, #12]
-	str	r0, [r5, #2052]
-	movs	r0, #80
-	bl	timer_delay_ns
-	ldr	r0, [r5, #2048]
-	cmp	r8, r7
-	ldr	r2, [sp, #16]
+	ubfx	r5, r5, #11, #8
+	ldrh	fp, [r2, #74]
+	ldrh	r8, [r2, #72]
+	ldr	r2, .L1175+8
+	add	fp, fp, r3
+	uxth	fp, fp
+	add	r8, r8, r5
+	ldrh	r2, [r2]
+	uxth	r8, r8
+	mov	r0, fp
+	mov	r1, r2
+	str	r2, [sp, #8]
+	bl	__aeabi_uidiv
+	ldr	r1, .L1175+12
+	uxtah	r0, r8, r0
+	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #12]
-	strb	r0, [r2, #1]!
-	bne	.L1025
-	ldr	r0, [sp, #4]
+	ldrh	r1, [r1]
+	cmp	r0, r1
+	ble	.L1158
+	ldr	r1, .L1175+16
+	ldr	ip, .L1175+52
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+20
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	cmp	r0, r1
+	blt	.L1159
+.L1174:
+	movs	r1, #2
+	bfi	r4, r1, #3, #2
+.L1172:
+	strb	r4, [r7, #2]
+.L1160:
+	ldrb	r1, [r7, #2]	@ zero_extendqisi2
+	ands	r1, r1, #24
+	bne	.L1164
+	muls	r5, r2, r5
+	ldrh	r2, [r10, r6, lsl #2]
+	add	r5, r5, r5, lsl #1
+	add	r3, r3, r5, asr #2
+	ubfx	r3, r3, #2, #9
+	bfi	r2, r3, #0, #11
+	strh	r2, [r10, r6, lsl #2]	@ movhi
+.L1157:
+	mov	r0, r6
+	bl	zftl_remove_data_node
+	ldr	r3, .L1175
+	lsls	r2, r6, #2
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	bfc	r2, #5, #3
+	strb	r2, [r3, #2]
 	movs	r2, #0
-	ldr	ip, .L1107+4
-.L1026:
-	movs	r3, #1
-	add	r7, ip, r2
-.L1027:
-	ldrb	r5, [r7, r3, lsl #2]	@ zero_extendqisi2
-	ldrb	lr, [r0]	@ zero_extendqisi2
-	add	r5, r5, lr
-	strb	r5, [r0, r3, lsl #3]
-	adds	r3, r3, #1
-	cmp	r3, #7
-	bne	.L1027
-	adds	r2, r2, #1
-	adds	r0, r0, #1
-	cmp	r2, #4
-	bne	.L1026
-	ldr	r2, [sp, #4]
-	movs	r3, #0
-	adds	r6, r6, #1
-	strb	r3, [r2, #16]
-	strb	r3, [r2, #24]
-	strb	r3, [r2, #32]
-	strb	r3, [r2, #40]
-	strb	r3, [r2, #48]
-	strb	r3, [r2, #41]
-	strb	r3, [r2, #49]
-	b	.L1024
-.L1023:
-	subs	r3, r6, #3
+	ldr	r3, .L1175+24
+	ldr	r3, [r3]
+	strh	r2, [r3, r6, lsl #1]	@ movhi
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #6
+	and	r3, r3, #7
 	cmp	r3, #4
-	bhi	.L1030
-	smulbb	r3, r10, fp
-	asrs	r2, r3, #2
-	lsls	r3, r3, #4
-	str	r3, [sp, #48]
-	lsls	r3, r2, #3
-	str	r2, [sp, #8]
-	str	r3, [sp, #52]
-	lsls	r3, r2, #2
-	str	r3, [sp, #36]
-	movs	r3, #0
-.L1106:
-	str	r3, [sp, #24]
-	ldr	r3, .L1107+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldrb	r3, [sp, #24]	@ zero_extendqisi2
-	cmp	r2, r3
-	bls	.L1030
-	ldr	r2, .L1107+12
-	movs	r1, #160
-	movs	r7, #255
-	ldrb	r3, [r2, r3]	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	mla	r1, r1, r3, r4
-	ldr	r2, [sp, #4]
-	add	r3, r1, #144
-	str	r3, [sp, #44]
-	ldr	r3, .L1107+16
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	add	r5, r3, r2, lsl #8
-	str	r7, [r5, #2056]
-	bl	nandc_wait_flash_ready
-	cmp	r6, #4
-	mov	r3, #54
-	str	r3, [r5, #2056]
-	bne	.L1032
-	movs	r3, #64
-	str	r7, [r5, #2052]
-	str	r3, [r5, #2048]
-	movs	r3, #204
-.L1103:
-	str	r3, [r5, #2052]
-	movs	r3, #77
-	b	.L1104
-.L1032:
-	subs	r3, r6, #5
-	cmp	r3, #1
-	bhi	.L1034
-	ldrb	r3, [r4, #128]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
-	movs	r3, #82
-.L1104:
-	str	r3, [r5, #2048]
-	cmp	r6, #6
-	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #4]
-	add	r5, r3, r2, lsl #8
-	mov	r3, #22
-	ldr	r2, [sp, #4]
-	str	r3, [r5, #2056]
-	mov	r3, #23
-	str	r3, [r5, #2056]
-	mov	r3, #4
-	str	r3, [r5, #2056]
-	mov	r3, #25
-	str	r3, [r5, #2056]
-	mov	r3, #0
-	str	r3, [r5, #2056]
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	it	eq
-	moveq	r3, #31
-	str	r3, [r5, #2052]
-	movs	r3, #2
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	ldr	r3, [sp, #12]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #48
-	str	r2, [r3, #2056]
-	bl	nandc_wait_flash_ready
-	subs	r3, r6, #5
-	cmp	r3, #1
-	str	r3, [sp, #28]
-	bls	.L1070
-	cmp	r6, #7
-	ite	ne
-	movne	r2, #2
-	moveq	r2, #32
-.L1037:
-	ldr	r3, .L1107+20
-	subs	r2, r2, #1
+	bhi	.L1166
+	mov	r0, r6
+	bl	gc_free_bad_sblk
+.L1166:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	lsls	r3, r3, #28
+	bpl	.L1167
+	ldr	r3, .L1175+28
 	ldr	r3, [r3]
-	subs	r1, r3, #1
-	uxtab	r2, r3, r2
-	mov	r0, r1
-.L1038:
-	ldr	r7, [r5, #2048]
-	strb	r7, [r0, #1]!
-	cmp	r0, r2
-	bne	.L1038
-	cmp	r6, #7
-	bne	.L1039
-	movs	r2, #0
-.L1041:
-	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
-	uxtb	r1, r2
-	cmp	r0, #12
-	beq	.L1040
-	add	r0, r3, r2, lsl #2
-	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #10
-	beq	.L1040
-	adds	r2, r2, #1
-	cmp	r2, #8
-	bne	.L1041
-.L1042:
-	movs	r1, #0
-	ldr	r0, .L1107+24
-	bl	printf
-.L1044:
-	b	.L1044
-.L1034:
-	movs	r3, #174
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2048]
-	movs	r3, #176
-	b	.L1103
-.L1070:
-	movs	r2, #16
-	b	.L1037
-.L1108:
+	ldrh	r2, [r3, #584]
+	cmp	r2, r6
+	bne	.L1168
+	ldrh	r1, [r3, #588]
+	movw	r2, #65535
+	strh	r2, [r3, #584]	@ movhi
+	cmp	r1, r2
+	bne	.L1167
+	ldr	r0, .L1175+32
+	mov	r1, r6
+	strh	r6, [r3, #588]	@ movhi
+.L1173:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1159:
+	ldr	r1, .L1175+36
+	ldr	ip, .L1175+56
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+40
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	ldr	ip, .L1175+60
+	ldrh	ip, [ip]
+	add	r1, r1, ip
+	cmp	r0, r1
+	blt	.L1174
+.L1163:
+	bfc	r4, #3, #2
+	b	.L1172
+.L1158:
+	ldr	r1, .L1175+44
+	mla	r8, r8, r2, fp
+	ldrh	r1, [r1]
+	cmp	r8, r1
+	ble	.L1160
+	ldr	r1, .L1175+36
+	ldr	ip, .L1175+56
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+40
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	ldr	ip, .L1175+60
+	ldrh	ip, [ip]
+	add	r1, r1, ip
+	cmp	r0, r1
+	bge	.L1163
+	ldr	r1, .L1175+16
+	ldr	ip, .L1175+52
+	ldrh	r0, [r1]
+	ldr	r1, .L1175+20
+	ldrh	ip, [ip]
+	adds	r0, r0, #7
+	ldrh	r1, [r1]
+	add	r1, r1, ip
+	cmp	r0, r1
+	blt	.L1163
+	b	.L1174
+.L1164:
+	cmp	r1, #16
+	bne	.L1157
+	mov	r0, r3
+	mov	r1, r2
+	bl	__aeabi_idiv
+	add	r0, r0, r0, lsl #1
+	ldr	r3, [r10, r6, lsl #2]
+	add	r5, r5, r0, asr #2
+	ubfx	r5, r5, #2, #6
+	bfi	r3, r5, #11, #8
+	str	r3, [r10, r6, lsl #2]
+	b	.L1157
+.L1168:
+	ldrh	r2, [r3, #586]
+	cmp	r2, r6
+	bne	.L1167
+	ldrh	r1, [r3, #590]
+	movw	r2, #65535
+	strh	r2, [r3, #586]	@ movhi
+	cmp	r1, r2
+	bne	.L1167
+	strh	r6, [r3, #590]	@ movhi
+	mov	r1, r6
+	ldr	r0, .L1175+48
+	b	.L1173
+.L1167:
+	mov	r0, r6
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	zftl_insert_free_list
+.L1176:
 	.align	2
-.L1107:
-	.word	.LANCHOR5
-	.word	.LANCHOR110
+.L1175:
+	.word	.LANCHOR7
+	.word	.LANCHOR102
 	.word	.LANCHOR8
+	.word	.LANCHOR116
+	.word	.LANCHOR93
+	.word	.LANCHOR92
+	.word	.LANCHOR9
 	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR111
-	.word	.LC33
-.L1040:
-	cmp	r1, #6
-	bhi	.L1042
-.L1043:
-	ldr	r3, .L1109
-	ldr	r8, [r3]
-	mov	r3, r8
-.L1048:
-	ldr	r1, [sp, #48]
-	sub	r2, r3, r8
+	.word	.LC61
+	.word	.LANCHOR117
+	.word	.LANCHOR90
+	.word	.LANCHOR118
+	.word	.LC62
+	.word	.LANCHOR97
+	.word	.LANCHOR95
+	.word	.LANCHOR88
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_free_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r5, #0
+	ldr	r6, .L1214
+.L1178:
+	uxth	r2, r5
+	ldr	r3, .L1214+4
+	ldrh	r1, [r3, #52]
 	cmp	r1, r2
-	bgt	.L1049
-	ldr	r3, .L1109
-	ldr	r1, [r3]
-	ldr	r3, [sp, #36]
-	adds	r0, r1, r3
-	movs	r3, #8
-.L1051:
-	mov	ip, r0
-	movs	r7, #0
-.L1050:
-	ldr	r2, [ip]
-	adds	r7, r7, #1
-	mvns	r2, r2
-	str	r2, [ip], #4
-	ldr	r2, [sp, #8]
-	cmp	r2, r7
-	bgt	.L1050
-	ldr	r2, [sp, #52]
-	subs	r3, r3, #1
-	add	r0, r0, r2
-	bne	.L1051
-	mov	ip, r1
-	str	r3, [sp, #20]
-.L1052:
-	movs	r0, #0
-	mov	r2, r0
-.L1056:
-	movs	r3, #1
-	mov	lr, #0
-	lsl	r7, r3, r2
-	movs	r3, #16
-	str	ip, [sp, #16]
-	str	r7, [sp, #32]
-	str	r3, [sp, #40]
-.L1054:
-	ldr	r3, [sp, #32]
-	mov	r7, r3
-	ldr	r3, [sp, #16]
+	bhi	.L1192
+	movs	r2, #0
+	strh	r2, [r3, #52]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1192:
+	uxth	r2, r5
+	add	r3, r3, r2, lsl #1
+	ldrh	r4, [r3, #54]
+	ldr	r3, [r6]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L1179
+	mov	r1, r4
+	ldr	r0, .L1214+8
+	bl	printf
+.L1179:
+	ldr	r3, [r6]
+	movs	r2, #0
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	ldr	r3, .L1214+12
+	ldr	r7, [r3]
+	ldr	r3, .L1214+16
 	ldr	r3, [r3]
-	bics	r3, r7, r3
-	ldr	r3, [sp, #36]
-	ldr	r7, [sp, #16]
-	it	eq
-	addeq	lr, lr, #1
-	add	r7, r7, r3
-	ldr	r3, [sp, #40]
-	str	r7, [sp, #16]
-	subs	r3, r3, #1
-	str	r3, [sp, #40]
-	bne	.L1054
-	cmp	lr, #8
-	add	r2, r2, #1
-	itt	hi
-	ldrhi	r3, [sp, #32]
-	orrhi	r0, r0, r3
-	cmp	r2, #32
-	bne	.L1056
-	ldr	r3, [sp, #20]
-	str	r0, [ip], #4
-	adds	r3, r3, #1
-	str	r3, [sp, #20]
-	ldr	r2, [sp, #20]
-	ldr	r3, [sp, #8]
-	cmp	r3, r2
-	bgt	.L1052
-	subs	r2, r1, #4
-	add	r0, r1, #28
-	movs	r3, #0
-.L1059:
-	ldr	r7, [r2, #4]!
-	cbnz	r7, .L1058
-	adds	r3, r3, #1
-.L1058:
-	cmp	r0, r2
-	bne	.L1059
-	cmp	r3, #7
-	ble	.L1060
-	ldr	r0, .L1109+4
-	mov	r3, #1024
-	movs	r2, #1
-	bl	rknand_print_hex
-	movs	r1, #0
-	ldr	r0, .L1109+8
+	add	r7, r7, r4, lsl #2
+	lsls	r3, r3, #23
+	bpl	.L1180
+	ldrb	r2, [r7, #2]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r0, .L1214+20
+	lsrs	r2, r2, #5
 	bl	printf
-.L1061:
-	b	.L1061
-.L1039:
-	cmp	r6, #6
-	bne	.L1043
-	adds	r3, r3, #7
-.L1045:
-	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
-	cmp	r2, #12
-	beq	.L1043
-	ldrb	r2, [r1, #8]	@ zero_extendqisi2
-	cmp	r2, #4
-	beq	.L1043
-	cmp	r1, r3
-	bne	.L1045
-	movs	r1, #0
-	ldr	r0, .L1109+8
+.L1180:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L1181
+	tst	r3, #192
+	bne	.L1182
+.L1181:
+	mov	r2, #932
+	ldr	r1, .L1214+24
+	ldr	r0, .L1214+28
 	bl	printf
-.L1047:
-	b	.L1047
-.L1049:
-	ldr	r2, [r5, #2048]
-	strb	r2, [r3], #1
-	b	.L1048
-.L1060:
-	cmp	r6, #6
-	beq	.L1072
-	cmp	r6, #7
-	ite	ne
-	movne	lr, #8
-	moveq	lr, #10
-.L1062:
-	add	r3, fp, #-1
-	ldr	r1, [sp, #44]
-	uxtb	r3, r3
-	movs	r0, #0
-	adds	r3, r3, #1
-.L1063:
-	mov	ip, r1
-	mov	r2, r8
-.L1064:
-	ldrb	r7, [r2], #1	@ zero_extendqisi2
-	strb	r7, [ip], #1
-	sub	r7, r2, r8
-	uxtb	r7, r7
-	cmp	fp, r7
-	bhi	.L1064
-	adds	r0, r0, #1
-	add	r8, r8, r3
-	cmp	r10, r0
-	add	r1, r1, lr
-	bgt	.L1063
-	ldr	r3, [sp, #12]
-	mov	r8, #255
-	ldr	r2, [sp, #4]
-	add	r7, r3, r2, lsl #8
-	str	r8, [r7, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r3, [sp, #28]
-	cmp	r3, #1
-	bhi	.L1066
-	movs	r3, #54
-	movs	r2, #22
-	str	r3, [r7, #2056]
-	ldrb	r3, [r4, #128]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2048]
-	str	r2, [r7, #2056]
-	str	r3, [r7, #2056]
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	movs	r3, #48
-	str	r8, [r5, #2052]
-	str	r8, [r5, #2052]
-	str	r8, [r5, #2052]
-.L1105:
-	str	r3, [r7, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	b	.L1106
-.L1072:
-	mov	lr, #4
-	b	.L1062
-.L1066:
-	movs	r3, #56
-	b	.L1105
-.L1110:
+.L1182:
+	mov	r0, r4
+	bl	ftl_free_sblk
+	ldr	r3, .L1214+32
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #124]
+	cbz	r1, .L1183
+	add	r0, r3, #392
+	movs	r2, #0
+.L1185:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L1184
+	adds	r2, r2, #196
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #124]	@ movhi
+.L1183:
+	ldrh	r1, [r3, #120]
+	cbz	r1, .L1186
+	add	r0, r3, #136
+	movs	r2, #0
+.L1188:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L1187
+	adds	r2, r2, #68
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #120]	@ movhi
+.L1186:
+	ldrh	r1, [r3, #122]
+	cbz	r1, .L1189
+	add	r0, r3, #264
+	movs	r2, #0
+.L1191:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L1190
+	adds	r2, r2, #132
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #122]	@ movhi
+.L1189:
+	adds	r5, r5, #1
+	b	.L1178
+.L1184:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L1185
+	b	.L1183
+.L1187:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L1188
+	b	.L1186
+.L1190:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L1191
+	b	.L1189
+.L1215:
 	.align	2
-.L1109:
-	.word	.LANCHOR111
-	.word	.LC34
-	.word	.LC33
-	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
-	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
+.L1214:
+	.word	.LANCHOR9
+	.word	.LANCHOR63
+	.word	.LC63
+	.word	.LANCHOR7
+	.word	.LANCHOR14
+	.word	.LC64
+	.word	.LANCHOR119
+	.word	.LC0
+	.word	.LANCHOR10
+	.size	gc_free_src_blk, .-gc_free_src_blk
+	.section	.text.print_ftl_debug_info,"ax",%progbits
 	.align	1
-	.global	flash_get_read_retry_tbl
+	.global	print_ftl_debug_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_get_read_retry_tbl, %function
-flash_get_read_retry_tbl:
+	.type	print_ftl_debug_info, %function
+print_ftl_debug_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L1113
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r0, #1
-	cmp	r3, #6
-	bhi	.L1111
-	b	hynix_get_read_retry_default
-.L1111:
-	bx	lr
-.L1114:
+	push	{r4, r5, r6, lr}
+	sub	sp, sp, #32
+	ldr	r4, .L1217
+	ldr	r5, .L1217+4
+	ldr	r6, .L1217+8
+	ldr	r1, [r4]
+	ldr	r0, [r5]
+	ldr	r6, [r6]
+	ldr	r3, .L1217+12
+	ldrh	r2, [r1, #146]
+	ldrh	r1, [r1, #148]
+	ldrh	r3, [r3]
+	str	r6, [sp, #28]
+	ldr	r6, [r0, #528]
+	str	r6, [sp, #24]
+	ldr	r0, [r0, #524]
+	str	r0, [sp, #20]
+	ldr	r0, .L1217+16
+	ldrh	r0, [r0]
+	str	r0, [sp, #16]
+	ldr	r0, .L1217+20
+	ldrh	r0, [r0]
+	str	r0, [sp, #12]
+	ldr	r0, .L1217+24
+	ldrh	r0, [r0]
+	str	r0, [sp, #8]
+	ldr	r0, .L1217+28
+	ldrh	r0, [r0]
+	str	r0, [sp, #4]
+	ldr	r0, .L1217+32
+	ldrh	r0, [r0]
+	str	r0, [sp]
+	ldr	r0, .L1217+36
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r3, .L1217+40
+	ldr	r0, .L1217+44
+	ldr	r2, [r1, #64]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	ldr	r2, [r1, #8]
+	str	r2, [sp]
+	ldr	r2, [r1, #28]
+	ldr	r1, [r1, #20]
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r0, .L1217+48
+	ldr	r3, [r1, #16]
+	ldr	r2, [r1, #60]
+	ldr	r1, [r1, #52]
+	lsrs	r3, r3, #11
+	bl	printf
+	ldr	r2, [r4]
+	ldrh	r0, [r2, #98]
+	ldrh	r3, [r2, #88]
+	ldrh	r1, [r2, #74]
+	str	r0, [sp, #24]
+	ldrh	r0, [r2, #94]
+	str	r0, [sp, #20]
+	ldrh	r0, [r2, #90]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #80]
+	str	r0, [sp, #12]
+	ldrh	r0, [r2, #72]
+	str	r0, [sp, #8]
+	ldrh	r0, [r2, #96]
+	str	r0, [sp, #4]
+	ldrh	r0, [r2, #92]
+	str	r0, [sp]
+	ldr	r0, .L1217+52
+	ldr	r2, [r2, #84]
+	bl	printf
+	ldr	r0, .L1217+56
+	ldr	r3, .L1217+60
+	ldr	r2, .L1217+64
+	ldrh	r0, [r0]
+	ldr	r1, .L1217+68
+	ldrh	r3, [r3]
+	ldrh	r2, [r2]
+	ldrh	r1, [r1]
+	str	r0, [sp, #4]
+	ldr	r0, .L1217+72
+	ldrh	r0, [r0]
+	str	r0, [sp]
+	ldr	r0, .L1217+76
+	bl	printf
+	ldr	r0, [r5]
+	ldrh	r3, [r0, #588]
+	ldrh	r2, [r0, #586]
+	ldrh	r1, [r0, #584]
+	ldrh	r0, [r0, #590]
+	str	r0, [sp]
+	ldr	r0, .L1217+80
+	bl	printf
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L1218:
 	.align	2
-.L1113:
-	.word	.LANCHOR19
-	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
-	.section	.text.nandc_xfer_done,"ax",%progbits
+.L1217:
+	.word	.LANCHOR102
+	.word	.LANCHOR10
+	.word	.LANCHOR120
+	.word	.LANCHOR95
+	.word	.LANCHOR92
+	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR99
+	.word	.LANCHOR97
+	.word	.LC65
+	.word	.LANCHOR121
+	.word	.LC66
+	.word	.LC67
+	.word	.LC68
+	.word	.LANCHOR79
+	.word	.LANCHOR62
+	.word	.LANCHOR94
+	.word	.LANCHOR91
+	.word	.LANCHOR84
+	.word	.LC69
+	.word	.LC70
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.ftl_write_buf,"ax",%progbits
 	.align	1
-	.global	nandc_xfer_done
+	.global	ftl_write_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_xfer_done, %function
-nandc_xfer_done:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1149
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	ldr	r4, .L1149+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r6, [r4]
-	cmp	r3, #9
-	bne	.L1116
-	ldr	r3, [r6, #16]
-	str	r3, [sp]
-	ldr	r5, [r6, #48]
-	ubfx	r5, r5, #1, #1
-	cbnz	r5, .L1117
-	ldr	r7, .L1149+8
-	ldr	r8, .L1149+24
-.L1118:
-	ldr	r3, [sp]
-	lsls	r0, r3, #11
-	bmi	.L1121
-	ldr	r3, [r4]
-	adds	r5, r5, #1
-	ldr	r3, [r3, #16]
-	str	r3, [sp]
-	bics	r3, r5, #-16777216
-	bne	.L1118
-	ldr	r2, [sp]
-	mov	r1, r5
-	ldr	r3, [r6, #64]
-	mov	r0, r7
-	ubfx	r3, r3, #16, #6
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	cbnz	r0, .L1220
+	mov	r2, #668
+	ldr	r1, .L1229
+	ldr	r0, .L1229+4
 	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1118
-.L1117:
-	ldr	r7, .L1149+12
-	movs	r5, #0
-	ldr	r8, .L1149+24
-.L1119:
-	ldr	r2, [r6, #64]
-	ldr	r3, [sp]
-	ubfx	r2, r2, #16, #6
-	ubfx	r3, r3, #22, #6
-	cmp	r2, r3
-	blt	.L1123
-.L1121:
-	ldr	r3, .L1149+16
-	movs	r2, #0
-	str	r2, [r3, #20]
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1123:
-	ldr	r3, [r4]
+	bl	print_ftl_debug_info
+	mov	r0, #-1
+	pop	{r4, r5, r6, pc}
+.L1223:
+	mov	r1, r4
+	ldr	r0, .L1229+8
+	bl	buf_add_tail
+	ldr	r3, .L1229+12
+	ldrb	r1, [r4, #40]	@ zero_extendqisi2
+	ldrb	r0, [r6]	@ zero_extendqisi2
 	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r2, r3, #18
-	bpl	.L1120
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #14
-	bmi	.L1121
-.L1120:
-	adds	r5, r5, #1
-	bics	r3, r5, #-16777216
-	bne	.L1119
-	ldr	r2, [r6, #64]
-	mov	r1, r5
-	ldr	r3, [sp]
-	mov	r0, r7
-	ubfx	r2, r2, #16, #5
-	ubfx	r3, r3, #22, #6
-	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1119
-.L1116:
-	ldr	r3, [r6, #8]
-	str	r3, [sp]
-	ldr	r5, [r6, #16]
-	ubfx	r5, r5, #1, #1
-	cbnz	r5, .L1127
-	ldr	r7, .L1149+8
-	ldr	r8, .L1149+24
-.L1128:
-	ldr	r3, [sp]
-	lsls	r3, r3, #11
-	bmi	.L1121
-	ldr	r3, [r4]
-	adds	r5, r5, #1
-	ldr	r3, [r3, #8]
-	str	r3, [sp]
-	bics	r3, r5, #-16777216
-	bne	.L1128
-	ldr	r2, [sp]
-	mov	r1, r5
-	ldr	r3, [r6, #28]
-	mov	r0, r7
-	ubfx	r3, r3, #16, #5
+	adds	r0, r0, #1
+	ldr	r2, [r3, #16]
+	uxtb	r0, r0
+	strb	r0, [r6]
+	add	r2, r2, r1
+	str	r2, [r3, #16]
+	ldr	r2, [r3, #32]
+	adds	r2, r2, #1
+	str	r2, [r3, #32]
+	pop	{r4, r5, r6, pc}
+.L1220:
+	ldr	r5, .L1229+16
+	ldrb	r1, [r0, #40]	@ zero_extendqisi2
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cmp	r1, r2
+	bls	.L1225
+	movw	r2, #673
+	ldr	r1, .L1229
+	ldr	r0, .L1229+4
 	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1128
-.L1127:
-	ldr	r7, .L1149+12
-	movs	r5, #0
-	ldr	r8, .L1149+24
-.L1129:
-	ldr	r2, [r6, #28]
-	ldr	r3, [sp]
-	ubfx	r2, r2, #16, #5
-	ubfx	r3, r3, #22, #6
+.L1225:
+	ldrb	r3, [r4, #40]	@ zero_extendqisi2
+	ldr	r6, .L1229+20
+	cbz	r3, .L1222
+	ldrb	r2, [r5]	@ zero_extendqisi2
 	cmp	r2, r3
-	bge	.L1121
-	ldr	r3, [r4]
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r1, r3, #18
-	bpl	.L1130
-	ldr	r3, [sp, #4]
-	lsls	r2, r3, #14
-	bpl	.L1130
-	ldr	r1, [sp, #4]
-	ldr	r0, .L1149+20
-	bl	printf
-	b	.L1121
-.L1130:
-	adds	r5, r5, #1
-	bics	r3, r5, #-16777216
-	bne	.L1129
-	ldr	r2, [r6, #28]
-	mov	r1, r5
-	ldr	r3, [sp]
-	mov	r0, r7
-	ubfx	r2, r2, #16, #5
-	ubfx	r3, r3, #22, #6
-	bl	printf
-	mov	r3, #256
-	movs	r2, #4
-	ldr	r1, [r4]
-	mov	r0, r8
-	bl	rknand_print_hex
-	b	.L1129
-.L1150:
+	bcs	.L1223
+.L1222:
+	mov	r0, r4
+	bl	buf_free
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	pop	{r4, r5, r6, pc}
+.L1230:
 	.align	2
-.L1149:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	.LC37
-	.word	.LC35
-	.word	.LANCHOR30
-	.word	.LC38
-	.word	.LC36
-	.size	nandc_xfer_done, .-nandc_xfer_done
-	.section	.text.nandc_xfer,"ax",%progbits
+.L1229:
+	.word	.LANCHOR122
+	.word	.LC0
+	.word	.LANCHOR57
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.word	.LANCHOR58
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_write_completed,"ax",%progbits
 	.align	1
-	.global	nandc_xfer
+	.global	ftl_write_completed
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	nandc_xfer, %function
-nandc_xfer:
-	@ args = 4, pretend = 0, frame = 8
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r1
-	ldr	r4, [sp, #32]
-	mov	r6, r2
-	mov	r5, r3
-	mov	r1, r6
-	mov	r2, r5
-	mov	r0, r8
-	mov	r3, r4
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	cmp	r8, #0
-	bne	.L1169
-	ldr	r3, .L1182
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #9
-	bne	.L1153
-	ldr	r5, .L1182+4
-	lsrs	r6, r6, #2
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r8, #0
+	ldr	r7, .L1241
+.L1232:
+	ldr	r2, .L1241+4
+	ldrb	r5, [r2]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L1240
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1240:
+	movs	r3, #48
+	add	r6, r5, r5, lsl #1
+	muls	r3, r5, r3
+	add	r6, r7, r6, lsl #4
+	adds	r4, r7, r3
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	strb	r3, [r2]
+	ldr	r3, [r4, #36]
+	adds	r3, r3, #1
+	bne	.L1233
+	ldr	r3, .L1241+8
 	movs	r2, #1
-	mov	r1, r8
-	mov	r0, r8
-	ldr	r4, [r5]
-.L1154:
-	cmp	r1, r6
-	bcc	.L1158
-	ldr	r4, [r4]
-	cmp	r2, #0
-	it	ne
-	movne	r0, #512
-	and	r3, r4, #139264
-	cmp	r3, #139264
-	bne	.L1152
+	ldr	r10, [r4, #24]
+	ldr	r8, .L1241+24
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsls	r2, r2, r3
+	ldr	r3, .L1241+12
+	lsr	r0, r10, r0
+	subs	r2, r2, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ands	r0, r0, r2
+	bl	__aeabi_uidiv
+	ldr	r2, [r8]
+	movw	r1, #65535
+	uxth	r4, r0
+	ldr	r0, .L1241+16
+	ldr	r3, [r2, #560]
+	cmp	r3, r1
+	mov	r3, #48
+	mla	r5, r3, r5, r7
+	itt	eq
+	streq	r4, [r2, #560]
+	streq	r10, [r2, #564]
+	mov	r3, r10
 	mov	r1, r4
-	ldr	r0, .L1182+8
+	ldr	r2, [r5, #20]
 	bl	printf
-	ldr	r3, [r5]
-	orr	r4, r4, #131072
-.L1181:
-	mov	r0, #-1
-	str	r4, [r3]
-.L1152:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1158:
-	add	r3, r1, #84
-	ldr	r3, [r4, r3, lsl #2]
-	str	r3, [sp, #4]
-	ldr	r7, [sp, #4]
-	ldr	r3, [sp, #4]
-	ubfx	r3, r3, #26, #1
-	and	r3, r3, r7, lsr #10
-	ands	r2, r2, r3
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #29
-	bmi	.L1171
-	ldr	r3, [sp, #4]
-	lsls	r7, r3, #13
-	bmi	.L1171
-	ldr	r7, [sp, #4]
-	ldr	r3, [sp, #4]
-	ubfx	r7, r7, #3, #7
-	ubfx	r3, r3, #19, #7
-	cmp	r7, r3
-	ldr	r3, [sp, #4]
-	ite	gt
-	ubfxgt	r3, r3, #3, #7
-	ubfxle	r3, r3, #19, #7
-	cmp	r0, r3
-	it	cc
-	movcc	r0, r3
-.L1155:
-	adds	r1, r1, #1
-	b	.L1154
-.L1171:
-	mov	r0, #-1
-	b	.L1155
-.L1153:
-	ldr	r3, .L1182+12
-	mov	r1, r8
-	mov	r0, r8
-	ldr	r8, .L1182+20
-	lsrs	r7, r6, #1
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #25
-	mov	r3, r4
-	ite	cc
-	movcc	lr, #64
-	movcs	lr, #128
-.L1161:
-	cmp	r0, r7
-	add	ip, lr, r1
-	add	r3, r3, #4
-	bcc	.L1162
-	lsrs	r7, r6, #2
-	ldr	r6, .L1182+4
+	ldr	r3, [r8]
+	ldr	r2, [r3, #556]
+	adds	r2, r2, #1
+	str	r2, [r3, #556]
+	ldrh	r2, [r3, #16]
+	cmp	r2, r4
+	bne	.L1235
 	movs	r2, #0
-	mov	r0, r2
-	ldr	r1, [r6]
-.L1163:
-	cmp	r2, r7
-	bcc	.L1167
-	movs	r3, #0
-	str	r3, [r1, #16]
-	adds	r3, r0, #1
-	beq	.L1168
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1168
-	ldr	r3, [r4, #4]
-	adds	r3, r3, #1
-	bne	.L1168
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	it	eq
-	moveq	r0, #512
-.L1168:
-	ldr	r4, [r1]
-	and	r3, r4, #139264
-	cmp	r3, #139264
-	bne	.L1152
-	mov	r1, r4
-	ldr	r0, .L1182+16
+	strh	r2, [r3, #22]	@ movhi
+.L1236:
+	mov	r0, r6
+	mov	r8, #1
+	bl	ftl_write_buf
+	b	.L1232
+.L1235:
+	ldrh	r2, [r3, #48]
+	cmp	r2, r4
+	itt	eq
+	moveq	r2, #0
+	strheq	r2, [r3, #54]	@ movhi
+	b	.L1236
+.L1233:
+	cmp	r8, #0
+	beq	.L1238
+	ldr	r2, [r4, #24]
+	ldr	r1, [r4, #20]
+	ldr	r0, .L1241+20
 	bl	printf
-	orr	r4, r4, #131072
-	ldr	r3, [r6]
-	b	.L1181
-.L1162:
-	ldr	r2, [r8]
-	bic	r1, r1, #3
-	adds	r0, r0, #1
-	ldr	r2, [r2, r1]
-	strb	r2, [r3, #-4]
-	lsrs	r1, r2, #8
-	strb	r1, [r3, #-3]
-	lsrs	r1, r2, #16
-	lsrs	r2, r2, #24
-	strb	r1, [r3, #-2]
-	mov	r1, ip
-	strb	r2, [r3, #-1]
-	b	.L1161
-.L1167:
-	add	r3, r2, #8
-	ldr	r3, [r1, r3, lsl #2]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #29
-	bmi	.L1174
-	ldr	r3, [sp, #4]
-	lsls	r3, r3, #16
-	bmi	.L1174
-	ldr	r3, [sp, #4]
-	ubfx	ip, r3, #3, #5
-	ldr	r3, [sp, #4]
-	ubfx	r8, r3, #27, #1
-	ldr	r3, [sp, #4]
-	ldr	lr, [sp, #4]
-	orr	ip, ip, r8, lsl #5
-	ubfx	r3, r3, #16, #5
-	ubfx	lr, lr, #29, #1
-	orr	r3, r3, lr, lsl #5
-	cmp	ip, r3
-	ldr	r3, [sp, #4]
-	itete	hi
-	ldrhi	ip, [sp, #4]
-	ldrls	ip, [sp, #4]
-	ubfxhi	r3, r3, #3, #5
-	ubfxls	r3, r3, #16, #5
-	ite	hi
-	ubfxhi	ip, ip, #27, #1
-	ubfxls	ip, ip, #29, #1
-	orr	r3, r3, ip, lsl #5
-	cmp	r0, r3
-	it	cc
-	movcc	r0, r3
-.L1164:
-	adds	r2, r2, #1
-	b	.L1163
-.L1174:
-	mov	r0, #-1
-	b	.L1164
-.L1169:
-	movs	r0, #0
-	b	.L1152
-.L1183:
+	mov	r0, r6
+	bl	ftl_write_buf
+	b	.L1232
+.L1238:
+	ldrh	r2, [r4, #32]
+	ldr	r1, [r4, #28]
+	ldr	r0, [r4, #20]
+	bl	lpa_hash_update_ppa
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #29
+	bpl	.L1239
+	bic	r3, r3, #2
+	strb	r3, [r4, #2]
+	b	.L1232
+.L1239:
+	mov	r0, r6
+	bl	buf_free
+	b	.L1232
+.L1242:
 	.align	2
-.L1182:
-	.word	.LANCHOR7
-	.word	.LANCHOR6
-	.word	.LC39
-	.word	.LANCHOR27
-	.word	.LC40
-	.word	.LANCHOR30
-	.size	nandc_xfer, .-nandc_xfer
-	.section	.text.flash_read_page,"ax",%progbits
+.L1241:
+	.word	.LANCHOR50
+	.word	.LANCHOR124
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LC71
+	.word	.LC72
+	.word	.LANCHOR10
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.zftl_add_read_buf,"ax",%progbits
 	.align	1
-	.global	flash_read_page
+	.global	zftl_add_read_buf
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_page, %function
-flash_read_page:
-	@ args = 4, pretend = 0, frame = 16
+	.type	zftl_add_read_buf, %function
+zftl_add_read_buf:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	str	r3, [sp, #16]
+	push	{r4, lr}
+	mov	r4, r0
+	cbnz	r0, .L1244
+	mov	r2, #964
+	ldr	r1, .L1248
+	ldr	r0, .L1248+4
+	bl	printf
+	pop	{r4, lr}
+	b	print_ftl_debug_info
+.L1244:
+	ldr	r3, .L1248+8
+	ldrb	r2, [r0, #40]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r2, r3
+	bls	.L1246
+	movw	r2, #969
+	ldr	r1, .L1248
+	ldr	r0, .L1248+4
+	bl	printf
+.L1246:
+	mov	r1, r4
+	ldr	r0, .L1248+12
+	bl	buf_add_tail
+	ldr	r2, .L1248+16
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2]
+	pop	{r4, pc}
+.L1249:
+	.align	2
+.L1248:
+	.word	.LANCHOR125
+	.word	.LC0
+	.word	.LANCHOR123
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.size	zftl_add_read_buf, .-zftl_add_read_buf
+	.section	.text.ftl_alloc_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	uxth	r6, r0
+	cmp	r0, #5
 	mov	r5, r0
-	mov	r8, r1
-	ubfx	r4, r1, #0, #21
-	ldr	r3, .L1200
-	ubfx	r6, r1, #24, #2
-	str	r2, [sp, #12]
-	ldr	r7, [r3]
-	ldr	r3, .L1200+4
-	ldr	r3, [r3]
-	lsls	r3, r3, #27
-	bpl	.L1185
-	mov	r3, r1
-	mov	r2, r6
-	mov	r1, r0
-	ldr	r0, .L1200+8
+	mov	r1, r6
+	mov	r0, #0
+	ite	ne
+	movne	r7, #0
+	moveq	r7, #2
+	bl	zftl_get_free_sblk
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r0, r3
+	beq	.L1252
+	ldr	r3, .L1259
+	ldr	r6, [r3]
+	add	r6, r6, r0, lsl #2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	beq	.L1253
+	movw	r2, #833
+	ldr	r1, .L1259+4
+	ldr	r0, .L1259+8
 	bl	printf
-.L1185:
-	bl	nandc_wait_flash_ready
-	mov	r0, r5
-	lsl	r10, r5, #8
-	bl	nandc_cs
-	ldr	r1, .L1200+12
-	cbnz	r6, .L1186
-	mov	r0, r5
-	str	r1, [sp, #20]
-	bl	flash_enter_slc_mode
-.L1198:
-	ldr	r1, [sp, #20]
-	b	.L1187
-.L1186:
-	ldr	r3, [r1]
-	ldrb	r3, [r3, #12]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L1188
-	add	r3, r7, r10
-	str	r6, [r3, #2056]
-.L1187:
-	add	fp, r7, r10
-	movs	r2, #0
-	str	r2, [fp, #2056]
-	str	r2, [fp, #2052]
-	str	r2, [fp, #2052]
-	uxtb	r2, r8
-	str	r2, [fp, #2052]
-	lsrs	r2, r4, #8
-	str	r2, [fp, #2052]
-	lsrs	r2, r4, #16
-	str	r2, [fp, #2052]
-	movs	r2, #48
-	str	r2, [fp, #2056]
-	ldr	r2, [r1]
-	ldrb	r2, [r2, #12]	@ zero_extendqisi2
-	cmp	r2, #3
-	bne	.L1189
-	cbz	r6, .L1189
-	add	r4, r4, r4, lsl #1
-	subs	r0, r4, #1
-	add	r0, r0, r6
-.L1199:
-	bl	nandc_set_seed
-	add	r7, r7, r10
-	bl	nandc_wait_flash_ready
-	movs	r1, #0
-	movs	r2, #5
-	movs	r3, #224
-	str	r2, [r7, #2056]
-	str	r1, [fp, #2052]
-	mov	r0, r5
-	str	r1, [fp, #2052]
-	str	r3, [r7, #2056]
-	ldr	r3, [sp, #16]
-	ldrb	r2, [sp, #56]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, [sp, #12]
-	bl	nandc_xfer
+.L1253:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	bfi	r3, r5, #5, #3
+	uxtb	r3, r3
+	ubfx	r2, r3, #3, #2
+	orrs	r7, r7, r2
+	bfi	r3, r7, #3, #2
+	strb	r3, [r6, #2]
+.L1254:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1252:
+	bl	print_ftl_debug_info
+	mov	r2, r5
+	mov	r1, r4
+	ldr	r0, .L1259+12
+	bl	printf
+	mov	r1, r6
+	movs	r0, #0
+	bl	zftl_get_free_sblk
+	mov	r2, r5
+	mov	r1, r0
 	mov	r4, r0
-	cbnz	r6, .L1191
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L1191:
+	ldr	r0, .L1259+12
+	bl	printf
+	bl	dump_all_list_info
+	movw	r2, #843
+	ldr	r1, .L1259+4
+	ldr	r0, .L1259+8
+	bl	printf
+	b	.L1254
+.L1260:
+	.align	2
+.L1259:
+	.word	.LANCHOR7
+	.word	.LANCHOR128
+	.word	.LC0
+	.word	.LC73
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.sblk_init,"ax",%progbits
+	.align	1
+	.global	sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_init, %function
+sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L1262
+	movs	r3, #255
 	movs	r0, #0
-	bl	nandc_de_cs
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1188:
-	mov	r0, r5
-	str	r1, [sp, #20]
-	bl	flash_exit_slc_mode
-	b	.L1198
-.L1189:
-	mov	r0, r4
-	b	.L1199
-.L1201:
+	strb	r3, [r2]
+	ldr	r2, .L1262+4
+	strb	r3, [r2]
+	ldr	r2, .L1262+8
+	strb	r3, [r2]
+	ldr	r2, .L1262+12
+	strb	r3, [r2]
+	bx	lr
+.L1263:
 	.align	2
-.L1200:
-	.word	.LANCHOR6
-	.word	.LANCHOR22
-	.word	.LC41
-	.word	.LANCHOR34
-	.size	flash_read_page, .-flash_read_page
-	.section	.text.micron_read_retrial,"ax",%progbits
+.L1262:
+	.word	.LANCHOR54
+	.word	.LANCHOR124
+	.word	.LANCHOR129
+	.word	.LANCHOR69
+	.size	sblk_init, .-sblk_init
+	.section	.text.dump_sblk_queue,"ax",%progbits
 	.align	1
-	.global	micron_read_retrial
+	.global	dump_sblk_queue
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	micron_read_retrial, %function
-micron_read_retrial:
-	@ args = 8, pretend = 0, frame = 8
+	.type	dump_sblk_queue, %function
+dump_sblk_queue:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	str	r3, [sp, #12]
-	mov	r7, r2
-	movs	r5, #0
-	mov	r4, #-1
-	ldr	r3, .L1215
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	asr	r10, r3, #2
-	bl	nandc_wait_flash_ready
-	ldr	r3, .L1215+4
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-.L1203:
-	ldr	r3, .L1215+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L1207
-.L1206:
-	ldr	r3, [sp, #8]
-	movs	r0, #200
-	add	r8, r3, r8, lsl #8
-	movs	r3, #239
-	str	r3, [r8, #2056]
-	movs	r3, #137
-	str	r3, [r8, #2052]
-	bl	timer_delay_ns
-	cmp	r4, r10
-	mov	r3, #0
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	str	r3, [r8, #2048]
-	bcc	.L1202
-	adds	r3, r4, #1
-	mov	r2, r7
-	it	ne
-	movne	r4, #256
-	mov	r3, r5
-	str	r4, [sp]
-	mov	r1, r5
-	ldr	r0, .L1215+12
+	push	{r4, r5, r6, lr}
+	ldr	r4, .L1273
+	ldr	r0, .L1273+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
 	bl	printf
-.L1202:
-	mov	r0, r4
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1207:
-	ldr	r3, [sp, #8]
-	movs	r0, #200
-	add	fp, r5, #1
-	add	r1, r3, r8, lsl #8
-	movs	r3, #239
-	str	r3, [r1, #2056]
-	movs	r3, #137
-	str	r3, [r1, #2052]
-	bl	timer_delay_ns
-	movs	r3, #0
-	str	fp, [r1, #2048]
-	str	r3, [r1, #2048]
-	mov	r0, r8
-	str	r3, [r1, #2048]
-	str	r3, [r1, #2048]
-	mov	r1, r7
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #12]
-	str	r3, [sp]
-	ldr	r3, [sp, #48]
-	bl	flash_read_page
-	mov	r2, r7
-	mov	r6, r0
-	str	r4, [sp]
-	mov	r3, r5
-	mov	r1, r5
-	ldr	r0, .L1215+16
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L1264
+	ldr	r5, .L1273+8
+	add	r4, r4, r4, lsl #1
+	ldr	r6, .L1273+12
+	add	r4, r5, r4, lsl #4
+.L1266:
+	ldr	r3, [r4, #24]
+	mov	r0, r6
+	ldrb	r2, [r4, #42]	@ zero_extendqisi2
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	bl	printf
-	adds	r2, r6, #1
-	beq	.L1204
-	ldr	r3, .L1215+20
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r6
-	cmp	r6, r10
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1215+24
-	ldr	r3, [r3]
-	str	r3, [sp, #48]
-	bcc	.L1210
-.L1204:
-	mov	r5, fp
-	b	.L1203
-.L1210:
-	mov	r4, r6
-	b	.L1206
-.L1216:
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L1264
+	add	r4, r4, r4, lsl #1
+	add	r4, r5, r4, lsl #4
+	b	.L1266
+.L1264:
+	pop	{r4, r5, r6, pc}
+.L1274:
 	.align	2
-.L1215:
-	.word	.LANCHOR27
-	.word	.LANCHOR6
-	.word	.LANCHOR113
-	.word	.LC43
-	.word	.LC42
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.size	micron_read_retrial, .-micron_read_retrial
-	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
+.L1273:
+	.word	.LANCHOR54
+	.word	.LC74
+	.word	.LANCHOR50
+	.word	.LC75
+	.size	dump_sblk_queue, .-dump_sblk_queue
+	.section	.text.queue_lun_state,"ax",%progbits
 	.align	1
-	.global	toshiba_3d_read_retrial
+	.global	queue_lun_state
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_3d_read_retrial, %function
-toshiba_3d_read_retrial:
-	@ args = 8, pretend = 0, frame = 16
+	.type	queue_lun_state, %function
+queue_lun_state:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1291
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r10, r0
-	mov	r8, r2
-	mov	r4, r1
-	add	r7, r10, #8
-	str	r3, [sp, #12]
-	bl	nandc_wait_flash_ready
-	ldr	r3, .L1252
-	ldr	r6, [r3]
-	ldr	r3, .L1252+4
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	add	r7, r6, r7, lsl #8
-	cmp	r2, #36
-	ite	ne
-	movne	r2, #56
-	moveq	r2, #46
-	str	r2, [sp, #20]
-	ite	ne
-	movne	r2, #10
-	moveq	r2, #26
-	str	r2, [sp, #16]
-	cmp	r4, #0
-	bne	.L1219
-	mov	r4, #-1
-	movs	r5, #1
-	str	r3, [sp, #20]
-.L1225:
-	ldr	r3, [sp, #20]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1220
-	movs	r2, #0
-	mov	r1, r5
-	mov	r0, r7
-	bl	toshiba_tlc_set_rr_para
-	add	r3, r6, r10, lsl #8
-	movs	r2, #93
-	str	r2, [r3, #2056]
-.L1221:
-	ldr	r3, [sp, #60]
-	mov	r1, r8
-	ldr	r2, [sp, #12]
-	mov	r0, r10
-	str	r3, [sp]
-	ldr	r3, [sp, #56]
-	bl	flash_read_page
-	mov	r2, r8
-	mov	fp, r0
-	mov	r3, r0
-	mov	r1, r5
-	ldr	r0, .L1252+8
-	bl	printf
-	cmp	fp, #-1
-	beq	.L1222
-	ldr	r3, .L1252+12
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, fp
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1252+16
-	ldr	r3, [r3]
-	str	r3, [sp, #56]
-	ldr	r3, .L1252+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	fp, r3, asr #2
-	bcc	.L1238
-.L1222:
-	ldr	r3, [sp, #16]
-	adds	r5, r5, #1
-	cmp	r3, r5
-	bne	.L1225
-.L1224:
-	ldr	r3, .L1252+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1226
-	movs	r2, #0
-.L1251:
-	movs	r1, #0
-	mov	r0, r7
-	bl	toshiba_tlc_set_rr_para
-	b	.L1227
-.L1220:
-	uxtb	r1, r5
-	mov	r0, r7
-	bl	toshiba_3d_set_slc_rr_para
-	b	.L1221
-.L1238:
-	mov	r4, fp
-	b	.L1224
-.L1226:
-	movs	r1, #0
-	mov	r0, r7
-	bl	toshiba_3d_set_slc_rr_para
-.L1227:
-	ldr	r3, .L1252+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1235
-	add	r6, r6, r10, lsl #8
-	movs	r3, #85
-	str	r3, [r6, #2056]
-	movs	r3, #0
-	str	r3, [r6, #2052]
-	str	r3, [r6, #2048]
-	movs	r3, #255
-	str	r3, [r6, #2056]
-.L1235:
-	mov	r3, r5
-	str	r4, [sp]
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L1252+24
-	bl	printf
-	ldr	r3, .L1252+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L1236
-	adds	r3, r4, #1
-	it	ne
-	movne	r4, #256
-.L1236:
-	bl	nandc_wait_flash_ready
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	beq	.L1283
+	ldr	r3, .L1291+4
+	ubfx	r10, r0, #21, #3
+	ldr	lr, .L1291+12
+	mov	ip, #48
+	ldrh	r7, [r3]
+	movs	r3, #1
+	mov	r8, lr
+	rsb	r2, r7, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L1291+8
+	subs	r3, r3, #1
+	ldrb	r6, [r2]	@ zero_extendqisi2
+	asr	r2, r0, r7
+	uxth	r3, r3
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ands	r2, r2, r6
+	ands	r2, r2, r3
+.L1282:
+	mla	r0, ip, r5, lr
+	ldr	r4, [r0, #24]
+	ubfx	fp, r4, #21, #3
+	cmp	r10, fp
+	bne	.L1277
+	lsrs	r4, r4, r7
+	ldrb	r0, [r0, #42]	@ zero_extendqisi2
+	ands	r4, r4, r6
+	ands	r4, r4, r3
+	cmp	r2, r4
+	bne	.L1278
+	cmp	r1, #1
+	bne	.L1275
+	cmp	r0, #7
+	beq	.L1277
+	cmp	r0, #9
+	beq	.L1277
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1219:
-	orr	r8, r8, r4, lsl #24
-	movs	r5, #1
-	mov	r4, #-1
-	str	r3, [sp, #16]
-.L1233:
-	ldr	r3, [sp, #16]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1228
-	movs	r2, #1
-	mov	r1, r5
-	mov	r0, r7
-	bl	toshiba_tlc_set_rr_para
-	add	r3, r6, r10, lsl #8
-	movs	r2, #93
-.L1250:
-	str	r2, [r3, #2056]
-	mov	r1, r8
-	ldr	r3, [sp, #60]
-	mov	r0, r10
-	ldr	r2, [sp, #12]
-	str	r3, [sp]
-	ldr	r3, [sp, #56]
-	bl	flash_read_page
-	mov	r2, r8
-	mov	fp, r0
-	mov	r3, r0
-	mov	r1, r5
-	ldr	r0, .L1252+28
-	bl	printf
-	cmp	fp, #-1
-	beq	.L1230
-	ldr	r3, .L1252+12
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, fp
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1252+16
-	ldr	r3, [r3]
-	str	r3, [sp, #56]
-	ldr	r3, .L1252+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	fp, r3, asr #2
-	bcc	.L1239
-.L1230:
-	ldr	r3, [sp, #20]
-	adds	r5, r5, #1
-	cmp	r3, r5
-	bne	.L1233
-.L1232:
-	ldr	r3, .L1252+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #36
-	bne	.L1234
-	movs	r2, #1
-	b	.L1251
-.L1228:
-	uxtb	r1, r5
-	mov	r0, r7
-	bl	toshiba_3d_set_tlc_rr_para
-	add	r3, r6, r10, lsl #8
-	movs	r2, #38
-	b	.L1250
-.L1239:
-	mov	r4, fp
-	b	.L1232
-.L1234:
-	movs	r1, #0
-	mov	r0, r7
-	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1227
-.L1253:
+.L1278:
+	cmp	r1, #3
+	bhi	.L1277
+	tbb	[pc, r1]
+.L1279:
+	.byte	(.L1275-.L1279)/2
+	.byte	(.L1280-.L1279)/2
+	.byte	(.L1281-.L1279)/2
+	.byte	(.L1275-.L1279)/2
+	.p2align 1
+.L1280:
+	cmp	r0, #7
+	beq	.L1277
+	cmp	r0, #9
+	beq	.L1277
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1281:
+	cmp	r0, #11
+	bne	.L1275
+.L1277:
+	mul	r5, ip, r5
+	ldrb	r5, [r8, r5]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L1282
+.L1283:
+	movs	r0, #0
+.L1275:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1292:
 	.align	2
-.L1252:
-	.word	.LANCHOR6
-	.word	.LANCHOR1
-	.word	.LC44
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.word	.LANCHOR27
-	.word	.LC46
-	.word	.LC45
-	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
-	.section	.text.toshiba_read_retrial,"ax",%progbits
+.L1291:
+	.word	.LANCHOR54
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR50
+	.size	queue_lun_state, .-queue_lun_state
+	.section	.text.queue_remove_completed_req,"ax",%progbits
 	.align	1
-	.global	toshiba_read_retrial
+	.global	queue_remove_completed_req
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	toshiba_read_retrial, %function
-toshiba_read_retrial:
-	@ args = 8, pretend = 0, frame = 16
+	.type	queue_remove_completed_req, %function
+queue_remove_completed_req:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r7, r0
-	str	r2, [sp, #12]
-	add	r10, r7, #8
-	str	r3, [sp, #16]
-	bl	nandc_wait_flash_ready
-	ldr	r3, .L1281
-	ldr	r2, .L1281+4
-	ldr	r6, [r3]
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	str	r2, [sp, #20]
-	subs	r3, r3, #67
-	add	r10, r6, r10, lsl #8
-	cmp	r3, #1
-	bls	.L1272
-	ldr	r3, .L1281+8
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1256
-	movs	r5, #1
-	movs	r0, #1
-	bl	nandc_set_if_mode
-.L1256:
-	add	r3, r6, r7, lsl #8
-	movs	r2, #92
-	str	r2, [r3, #2056]
-	movs	r2, #197
-	str	r2, [r3, #2056]
-.L1255:
-	mov	r8, #1
-	mov	fp, #-1
-.L1257:
-	ldr	r3, .L1281+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r8, r3
-	bcc	.L1266
-	mov	r4, fp
-.L1265:
-	ldr	r3, .L1281+4
-	movs	r1, #0
-	mov	r0, r10
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L1267
-	bl	sandisk_set_rr_para
-.L1268:
-	add	r6, r6, r7, lsl #8
-	movs	r3, #255
-	str	r3, [r6, #2056]
-	ldr	r3, .L1281+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L1269
-	adds	r3, r4, #1
-	ldr	r2, [sp, #12]
-	it	ne
-	movne	r4, #256
-	mov	r3, r8
-	str	r4, [sp]
-	mov	r1, r8
-	ldr	r0, .L1281+20
-	bl	printf
-.L1269:
-	bl	nandc_wait_flash_ready
-	cbz	r5, .L1254
-	movs	r0, #4
-	bl	nandc_set_if_mode
-.L1254:
-	mov	r0, r4
-	add	sp, sp, #24
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	ip, #0
+	ldr	r5, .L1318
+	movs	r4, #48
+	mov	fp, #255
+	ldr	r6, .L1318+4
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	ldr	r1, .L1318+8
+	ldr	r7, .L1318+12
+	str	r3, [sp, #4]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	ldrb	r2, [r1]	@ zero_extendqisi2
+	ldrb	r10, [r7]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1318+16
+.L1294:
+	cmp	r2, #255
+	beq	.L1295
+	mul	r8, r4, r2
+	mov	r0, r2
+	add	lr, r3, r8
+	ldrb	lr, [lr, #42]	@ zero_extendqisi2
+	sub	lr, lr, #12
+	cmp	lr, #1
+	bls	.L1296
+.L1295:
+	cmp	ip, #0
+	beq	.L1293
+	strb	r2, [r1]
+	b	.L1293
+.L1296:
+	mul	lr, r4, r0
+	ldrb	r2, [r3, r8]	@ zero_extendqisi2
+	add	ip, r3, lr
+	strb	fp, [r3, lr]
+	ldrb	lr, [ip, #43]	@ zero_extendqisi2
+	cmp	lr, #1
+	bne	.L1299
+	ldrh	ip, [ip, #34]
+	cmp	ip, #0
+	bne	.L1307
+	mov	ip, r10
+	mov	lr, r7
+.L1300:
+	cmp	ip, #255
+	bne	.L1305
+	strb	r2, [r1]
+	movs	r2, #48
+	mla	r3, r2, r0, r3
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	strb	r3, [lr]
+.L1293:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1272:
-	movs	r5, #0
-	b	.L1255
-.L1266:
-	ldr	r3, [sp, #20]
-	mov	r0, r10
-	uxtb	r1, r8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L1258
-	bl	sandisk_set_rr_para
-.L1259:
-	ldr	r3, .L1281+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L1260
-	ldr	r3, .L1281+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r8, r3
-	ittt	eq
-	addeq	r3, r6, r7, lsl #8
-	moveq	r2, #179
-	streq	r2, [r3, #2056]
-.L1260:
-	add	r3, r6, r7, lsl #8
-	movs	r2, #38
-	ldr	r1, [sp, #12]
-	mov	r0, r7
-	str	r2, [r3, #2056]
-	movs	r2, #93
-	str	r2, [r3, #2056]
-	ldr	r3, [sp, #60]
-	ldr	r2, [sp, #16]
-	str	r3, [sp]
-	ldr	r3, [sp, #56]
-	bl	flash_read_page
-	adds	r2, r0, #1
-	mov	r4, r0
-	beq	.L1263
-	ldr	r3, .L1281+24
-	cmp	fp, #-1
-	it	eq
-	moveq	fp, r0
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1281+28
-	ldr	r3, [r3]
-	str	r3, [sp, #56]
-	ldr	r3, .L1281+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
-	bcc	.L1265
-.L1263:
-	add	r8, r8, #1
-	b	.L1257
-.L1258:
-	bl	toshiba_set_rr_para
-	b	.L1259
-.L1267:
-	bl	toshiba_set_rr_para
-	b	.L1268
-.L1282:
+.L1299:
+	cmp	lr, #0
+	bne	.L1301
+	ldr	ip, [ip, #20]
+	cmp	ip, #-1
+	beq	.L1301
+	ldr	ip, [sp, #4]
+	mov	lr, r5
+	b	.L1300
+.L1307:
+	ldr	ip, [sp]
+	mov	lr, r6
+	b	.L1300
+.L1305:
+	mov	lr, ip
+	mul	ip, r4, ip
+	ldrb	ip, [r3, ip]	@ zero_extendqisi2
+	cmp	ip, #255
+	bne	.L1305
+	mla	r0, r4, r0, r3
+	mul	lr, r4, lr
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	strb	r0, [r3, lr]
+.L1301:
+	mov	ip, #1
+	b	.L1294
+.L1319:
 	.align	2
-.L1281:
-	.word	.LANCHOR6
-	.word	.LANCHOR1
-	.word	.LANCHOR35
-	.word	.LANCHOR113
-	.word	.LANCHOR27
-	.word	.LC46
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.size	toshiba_read_retrial, .-toshiba_read_retrial
-	.section	.text.hynix_read_retrial,"ax",%progbits
+.L1318:
+	.word	.LANCHOR129
+	.word	.LANCHOR69
+	.word	.LANCHOR54
+	.word	.LANCHOR124
+	.word	.LANCHOR50
+	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	hynix_read_retrial
+	.global	pm_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	hynix_read_retrial, %function
-hynix_read_retrial:
-	@ args = 8, pretend = 0, frame = 8
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	str	r3, [sp, #12]
-	mov	r4, #-1
-	mov	r7, r0
-	mov	r8, r2
-	ldr	r3, .L1297
-	ldr	r3, [r3]
-	add	fp, r3, r0
-	ldrb	r10, [r3, #114]	@ zero_extendqisi2
-	ldrb	r5, [fp, #120]	@ zero_extendqisi2
-	bl	nandc_wait_flash_ready
-.L1284:
-	cmp	r6, r10
-	bcc	.L1289
-.L1288:
-	ldr	r3, .L1297+4
-	strb	r5, [fp, #120]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L1283
-	adds	r3, r4, #1
-	mov	r2, r8
-	it	ne
-	movne	r4, #256
-	mov	r3, r6
-	str	r4, [sp]
-	mov	r1, r6
-	ldr	r0, .L1297+8
-	bl	printf
-.L1283:
-	mov	r0, r4
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1289:
-	adds	r5, r5, #1
-	mov	r0, r7
-	uxtb	r5, r5
-	cmp	r10, r5
-	it	ls
-	movls	r5, #0
-	mov	r1, r5
-	bl	hynix_set_rr_para
-	ldr	r3, [sp, #52]
-	mov	r1, r8
-	ldr	r2, [sp, #12]
-	mov	r0, r7
-	str	r3, [sp]
-	ldr	r3, [sp, #48]
-	bl	flash_read_page
-	adds	r2, r0, #1
-	beq	.L1286
-	ldr	r3, .L1297+12
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1297+16
-	ldr	r3, [r3]
-	str	r3, [sp, #48]
-	ldr	r3, .L1297+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
-	bcc	.L1292
-.L1286:
-	adds	r6, r6, #1
-	b	.L1284
-.L1292:
-	mov	r4, r0
-	b	.L1288
-.L1298:
-	.align	2
-.L1297:
-	.word	.LANCHOR5
-	.word	.LANCHOR27
-	.word	.LC47
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.size	hynix_read_retrial, .-hynix_read_retrial
-	.section	.text.flash_ddr_tunning_read,"ax",%progbits
-	.align	1
-	.global	flash_ddr_tunning_read
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_ddr_tunning_read, %function
-flash_ddr_tunning_read:
-	@ args = 4, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, #0
-	mov	r5, r8
-	mov	r4, r8
-	mov	r7, #1024
-	movs	r6, #6
-	mov	fp, #-1
-	sub	sp, sp, #32
-	str	r0, [sp, #16]
-	str	r1, [sp, #12]
-	str	r2, [sp, #20]
-	str	r3, [sp, #24]
-	bl	nandc_get_ddr_para
-	str	r8, [sp, #8]
-	str	r0, [sp, #28]
-.L1304:
-	uxtb	r0, r6
-	bl	nandc_set_ddr_para
-	ldr	r3, [sp, #64]
-	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #12]
-	str	r3, [sp]
-	ldr	r0, [sp, #16]
-	ldr	r3, [sp, #24]
-	bl	flash_read_page
-	ldr	r2, [sp, #12]
-	mov	r3, r0
-	mov	r10, r0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r5, .L1336
+	ldr	r1, .L1336+4
+	ldr	r2, [r5]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrh	r3, [r2, #690]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r1, r3
+	strh	r3, [r2, #690]	@ movhi
+	bls	.L1321
+	add	r3, r3, #336
+	ldrh	r2, [r2, r3, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1322
+.L1321:
+	ldr	r7, .L1336+8
+	ldr	r4, .L1336+12
+.L1334:
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r6, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	uxth	r0, r0
+	cbnz	r0, .L1323
 	mov	r1, r6
-	ldr	r0, .L1316
+	mov	r0, r7
 	bl	printf
-	adds	r3, r7, #1
-	cmp	r10, r3
-	bhi	.L1300
-	ldr	r3, .L1316+4
-	cmp	r10, #2
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1316+8
-	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	bhi	.L1309
+	ldr	r3, [r4]
+	add	r6, r3, r6, lsl #2
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r6, #2]
+	b	.L1334
+.L1323:
+	ldr	r3, [r5]
+	movs	r1, #1
+	ldr	r2, .L1336+16
+	movs	r4, #0
+	strh	r4, [r3, #690]	@ movhi
+	add	r3, r3, #416
+	str	r1, [r2]
+	movw	r1, #65535
+.L1325:
+	ldrh	r0, [r3], #2
+	uxth	r2, r4
+	cmp	r0, r1
+	beq	.L1324
 	adds	r4, r4, #1
-	cmp	r4, #7
-	bls	.L1309
-	mov	r3, r5
-	mov	r7, r10
-	subs	r5, r6, r4
-	mov	fp, #0
-.L1302:
-	ldr	r2, [sp, #8]
-	cmp	r4, r2
-	it	ls
-	movls	r5, r3
-.L1303:
-	cbz	r5, .L1305
-	ldr	r3, .L1316+12
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1316+16
-	umull	r2, r3, r2, r3
-	ubfx	r3, r3, #1, #8
-	cmp	r3, r7
-	bls	.L1305
-	mov	r1, r5
-	ldr	r0, .L1316+20
+	cmp	r4, #128
+	bne	.L1325
+	movs	r2, #194
+	ldr	r1, .L1336+20
+	ldr	r0, .L1336+24
 	bl	printf
-	uxtb	r0, r5
-.L1315:
-	bl	nandc_set_ddr_para
-	cmp	fp, #0
-	beq	.L1299
-	mov	r7, fp
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #16]
-	ldr	r0, .L1316+24
+	mov	r2, r4
+.L1324:
+	ldr	r3, [r5]
+	adds	r2, r2, #208
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r2, [r3, #688]
+	adds	r2, r2, #1
+	strh	r2, [r3, #688]	@ movhi
+.L1322:
+	ldr	r2, [r5]
+	ldrh	r3, [r2, #690]
+	add	r3, r3, #336
+	ldrh	r4, [r2, r3, lsl #1]
+	movw	r2, #65533
+	subs	r3, r4, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L1327
+	movs	r2, #199
+	ldr	r1, .L1336+20
+	ldr	r0, .L1336+24
 	bl	printf
-.L1299:
-	mov	r0, r7
-	add	sp, sp, #32
+.L1327:
+	ldr	r1, [r5]
+	movs	r3, #0
+	strh	r3, [r1, #696]	@ movhi
+	ldr	r3, .L1336+28
+	strh	r4, [r1, #692]	@ movhi
+	ldrh	r2, [r3]
+	rsb	r2, r2, #21
+	asr	r3, r4, r2
+	strh	r3, [r1, #694]	@ movhi
+	ldr	r1, .L1336+32
+	ldr	r1, [r1]
+	lsls	r1, r1, #19
+	bpl	.L1331
+	movs	r1, #1
+	uxth	r3, r3
+	lsl	r2, r1, r2
+	ldr	r0, .L1336+36
+	str	r3, [sp]
+	mov	r1, r4
+	mov	r3, r4
+	subs	r2, r2, #1
+	bl	printf
+.L1331:
+	movs	r0, #0
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1300:
-	ldr	r3, [sp, #8]
-	cmp	r4, r3
-	bls	.L1310
-	cmp	r4, #7
-	sub	r5, r8, r4
-	bhi	.L1303
-	str	r4, [sp, #8]
-.L1310:
-	movs	r4, #0
-	b	.L1301
-.L1309:
-	mov	r8, r6
-	mov	r7, r10
-	mov	fp, #0
-.L1301:
-	adds	r6, r6, #2
-	cmp	r6, #50
-	bne	.L1304
-	mov	r3, r5
-	mov	r5, r8
-	b	.L1302
-.L1305:
-	ldrb	r0, [sp, #28]	@ zero_extendqisi2
-	b	.L1315
-.L1317:
+	pop	{r4, r5, r6, r7, pc}
+.L1337:
 	.align	2
-.L1316:
-	.word	.LC48
-	.word	.LANCHOR111
-	.word	.LANCHOR112
-	.word	.LANCHOR27
-	.word	-1431655765
-	.word	.LC49
-	.word	.LC50
-	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
-	.section	.text.flash_read_page_en,"ax",%progbits
+.L1336:
+	.word	.LANCHOR102
+	.word	.LANCHOR78
+	.word	.LC76
+	.word	.LANCHOR7
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LC0
+	.word	.LANCHOR66
+	.word	.LANCHOR14
+	.word	.LC77
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_select_ram_region,"ax",%progbits
 	.align	1
-	.global	flash_read_page_en
+	.global	pm_select_ram_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_read_page_en, %function
-flash_read_page_en:
-	@ args = 4, pretend = 0, frame = 8
+	.type	pm_select_ram_region, %function
+pm_select_ram_region:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r3
-	ldr	r3, .L1347
-	mov	r4, r1
-	mov	r7, r2
-	ldr	r10, [sp, #48]
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, .L1348
+	movw	r0, #65535
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	mov	r1, r2
+.L1340:
+	ldrh	r5, [r2, r3, lsl #3]
+	uxth	r4, r3
+	cmp	r5, r0
+	beq	.L1339
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L1340
+	movs	r2, #0
+	mov	r4, r3
+	mov	r0, #32768
+.L1342:
+	add	r3, r1, r2, lsl #3
+	uxth	r5, r2
+	ldrh	r3, [r3, #2]
+	lsls	r6, r3, #16
+	bmi	.L1341
 	cmp	r3, r0
-	bhi	.L1319
-	mov	r2, #386
-	ldr	r1, .L1347+4
-	ldr	r0, .L1347+8
-	bl	printf
-.L1320:
-	b	.L1320
-.L1319:
-	ldr	r3, .L1347+12
-	ldrb	r5, [r3, r0]	@ zero_extendqisi2
-	ldr	r3, .L1347+16
-	ldr	r3, [r3]
-	lsls	r0, r3, #27
-	bpl	.L1321
-	mov	r2, r1
-	ldr	r0, .L1347+20
-	mov	r1, r5
+	itt	cc
+	movcc	r0, r3
+	movcc	r4, r5
+.L1341:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L1342
+	cmp	r4, #32
+	bne	.L1339
+	ldr	r3, .L1348+4
+	mov	r2, #-1
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	movs	r3, #0
+.L1344:
+	add	r0, r1, r3, lsl #3
+	uxth	r6, r3
+	ldrh	r0, [r0, #2]
+	cmp	r0, r2
+	bcs	.L1343
+	ldrh	r7, [r1, r3, lsl #3]
+	cmp	r7, r5
+	itt	ne
+	movne	r2, r0
+	movne	r4, r6
+.L1343:
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L1344
+	cmp	r4, #32
+	bne	.L1339
+	movw	r2, #297
+	ldr	r1, .L1348+8
+	ldr	r0, .L1348+12
 	bl	printf
-.L1321:
-	tst	r4, #50331648
-	bne	.L1322
-	ldr	r3, .L1347+24
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1347+28
-	cbz	r2, .L1323
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cbz	r2, .L1322
-.L1323:
-	ldr	r2, .L1347+32
-	mov	r0, r4
-	str	r3, [sp, #12]
-	ldrh	r6, [r2]
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	mov	r1, r6
-	mul	fp, r6, r0
+.L1339:
 	mov	r0, r4
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1324
-	add	r4, fp, r1, lsl #1
-.L1322:
-	mov	r1, r4
-	str	r10, [sp]
-	mov	r3, r8
-	mov	r2, r7
-	mov	r0, r5
-	bl	flash_read_page
-	adds	r1, r0, #1
-	mov	r6, r0
-	bne	.L1318
-	ldr	fp, .L1347+40
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	cbnz	r3, .L1326
-.L1329:
-	ldr	r3, .L1347+36
-	ldr	fp, [r3]
-	cmp	fp, #0
-	bne	.L1327
-.L1328:
-	ldr	r3, .L1347+40
-	mov	r2, r4
-	movs	r1, #0
-	ldr	r0, .L1347+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, #-1
-	bl	printf
-	ldr	r3, .L1347+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1318
-	str	r10, [sp, #48]
-	mov	r3, r8
-	mov	r2, r7
-	mov	r1, r4
-	mov	r0, r5
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	flash_ddr_tunning_read
-.L1324:
-	ldr	r3, .L1347+52
-	ldrh	r4, [r3, r1, lsl #1]
-	add	r4, r4, fp
-	b	.L1322
-.L1326:
-	movs	r3, #0
-	mov	r2, r7
-	strb	r3, [fp]
-	mov	r1, r4
-	mov	r3, r8
-	str	r10, [sp]
-	mov	r0, r5
-	bl	flash_read_page
-	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-	adds	r2, r0, #1
-	strb	r3, [fp]
-	beq	.L1329
-.L1346:
-	mov	r6, r0
-.L1318:
-	mov	r0, r6
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1327:
-	mov	r3, r7
-	stm	sp, {r8, r10}
-	mov	r2, r4
-	movs	r1, #0
-	mov	r0, r5
-	blx	fp
-	adds	r3, r0, #1
-	bne	.L1346
-	b	.L1328
-.L1348:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1349:
 	.align	2
-.L1347:
-	.word	.LANCHOR8
-	.word	.LANCHOR114
+.L1348:
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR134
 	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR22
-	.word	.LC51
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR115
-	.word	.LANCHOR29
-	.word	.LC52
-	.word	.LANCHOR35
-	.word	.LANCHOR14
-	.size	flash_read_page_en, .-flash_read_page_en
-	.section	.text.flash_get_last_written_page,"ax",%progbits
+	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.idb_init,"ax",%progbits
 	.align	1
-	.global	flash_get_last_written_page
+	.global	idb_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_get_last_written_page, %function
-flash_get_last_written_page:
-	@ args = 4, pretend = 0, frame = 0
+	.type	idb_init, %function
+idb_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	ldr	r4, .L1355
-	mov	r10, r2
-	mov	fp, r3
-	ldrh	r5, [r4]
-	ldr	r4, .L1355+4
-	subs	r5, r5, #1
-	ldrh	r6, [r4, #26]
-	sxth	r5, r5
-	muls	r6, r1, r6
-	ldr	r1, [sp, #40]
-	str	r1, [sp]
-	adds	r1, r5, r6
-	bl	flash_read_page_en
-	cmp	r0, #512
-	bne	.L1350
-	movs	r7, #0
-.L1351:
-	cmp	r7, r5
-	ble	.L1354
-.L1350:
-	mov	r0, r5
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1354:
-	adds	r4, r7, r5
-	ldr	r3, [sp, #40]
-	add	r4, r4, r4, lsr #31
-	mov	r2, r10
-	mov	r0, r8
-	asrs	r4, r4, #1
-	str	r3, [sp]
-	mov	r3, fp
-	sxtah	r1, r6, r4
-	bl	flash_read_page_en
-	cmp	r0, #512
-	itete	eq
-	addeq	r4, r4, #-1
-	addne	r4, r4, #1
-	sxtheq	r5, r4
-	sxthne	r7, r4
-	b	.L1351
-.L1356:
+	@ link register save eliminated.
+	ldr	r3, .L1351
+	movs	r0, #0
+	str	r0, [r3]
+	ldr	r3, .L1351+4
+	str	r0, [r3]
+	ldr	r3, .L1351+8
+	str	r0, [r3]
+	bx	lr
+.L1352:
 	.align	2
-.L1355:
-	.word	.LANCHOR97
-	.word	.LANCHOR19
-	.size	flash_get_last_written_page, .-flash_get_last_written_page
-	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
+.L1351:
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.size	idb_init, .-idb_init
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	flash_get_last_written_page_ext
+	.global	ftl_memset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_get_last_written_page_ext, %function
-flash_get_last_written_page_ext:
+	.type	ftl_memset, %function
+ftl_memset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, lr}
-	movs	r5, #1
-	ldr	r4, .L1358
-	ldrh	r4, [r4]
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	rsb	r4, r4, #21
-	lsls	r5, r5, r4
-	asr	r4, r0, r4
-	subs	r5, r5, #1
-	and	r1, r5, r0
-	uxtb	r0, r4
-	bl	flash_get_last_written_page
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, pc}
-.L1359:
-	.align	2
-.L1358:
-	.word	.LANCHOR71
-	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
-	.section	.text.flash_info_blk_init,"ax",%progbits
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.flash_lsb_page_tbl_build,"ax",%progbits
 	.align	1
-	.global	flash_info_blk_init
+	.global	flash_lsb_page_tbl_build
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_info_blk_init, %function
-flash_info_blk_init:
+	.type	flash_lsb_page_tbl_build, %function
+flash_lsb_page_tbl_build:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #4
-	ldr	r10, .L1384+12
-.L1363:
-	movs	r5, #4
-	movs	r0, #0
-	ldr	r8, .L1384+16
-	ldr	fp, .L1384+20
-	ldr	r6, .L1384
-	ldrh	r1, [r8]
-	str	r5, [sp]
-	mov	r7, fp
-	ldr	r3, [r6]
-	ldr	r2, [fp]
-	muls	r1, r4, r1
-	bl	flash_read_page_en
+	push	{r4, lr}
+	ldr	r4, .L1392
+	cbnz	r0, .L1355
+.L1356:
+	strh	r0, [r4, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
-	beq	.L1361
-	ldr	r2, [fp]
-	ldr	r3, [r2]
-	cmp	r3, r10
-	beq	.L1362
+	cmp	r0, #256
+	bne	.L1356
+.L1362:
+	movs	r1, #255
+	mov	r2, #1024
+	ldr	r0, .L1392+4
+	bl	ftl_memset
+	ldr	r1, .L1392+4
+	movs	r3, #0
+.L1357:
+	ldrh	r2, [r4, r3, lsl #1]
+	adds	r3, r3, #1
+	cmp	r3, #256
+	strh	r2, [r1, r2, lsl #1]	@ movhi
+	bne	.L1357
+	pop	{r4, pc}
+.L1355:
+	cmp	r0, #1
+	bne	.L1358
+	movs	r3, #0
 .L1361:
-	adds	r4, r4, #1
-	cmp	r4, #16
+	cmp	r3, #3
+	uxth	r2, r3
+	bls	.L1359
+	tst	r2, #1
+	ite	ne
+	movne	r1, #3
+	moveq	r1, #2
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L1359:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L1361
+	b	.L1362
+.L1358:
+	cmp	r0, #2
 	bne	.L1363
-.L1383:
-	mov	r0, #-1
-.L1360:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1371:
-	ldr	r3, [r7]
-	ldr	r2, [r3]
-	cmp	r2, r10
-	bne	.L1372
-	ldr	r4, [r3, #4]
+	movs	r2, #0
 .L1365:
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	movs	r3, #4
-	ldrh	r0, [r8]
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r6]
-	muls	r1, r0, r1
-	movs	r0, #0
-	bl	flash_read_page_en
-	adds	r0, r0, #1
-	beq	.L1366
-	ldr	r3, [r7]
-	ldr	r2, [r3]
-	cmp	r2, r10
+	uxth	r3, r2
+	cmp	r2, #1
+	ittt	hi
+	lslhi	r3, r3, #1
+	addhi	r3, r3, #-1
+	uxthhi	r3, r3
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r2, r2, #1
+	cmp	r2, #256
+	bne	.L1365
+	b	.L1362
+.L1363:
+	cmp	r0, #3
 	bne	.L1366
-	ldr	r2, [r3, #4]
-	cmp	r4, r2
-	itttt	cc
-	ldrbcc	r2, [r3, #37]	@ zero_extendqisi2
-	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
-	strbcc	r2, [r5]
-	strbcc	r3, [r5, #1]
-.L1366:
-	mov	fp, #4
-	ldrb	r1, [r5]	@ zero_extendqisi2
-	str	fp, [sp]
-	movs	r0, #0
-	ldr	r3, [r6]
-	ldr	r2, [r7]
-	bl	flash_get_last_written_page
-	adds	r3, r0, #1
-	mov	r4, r0
-	strh	r3, [r5, #2]	@ movhi
-	ldrb	r5, [r5]	@ zero_extendqisi2
-	ldrh	r3, [r8]
-	mla	r5, r3, r5, r0
-.L1367:
-	cmp	r4, #0
-	bge	.L1369
-	adds	r4, r4, #1
-	bne	.L1370
-	ldr	r3, [r7]
-	ldr	r0, .L1384+4
-	ldr	r1, [r3]
-	bl	printf
-	b	.L1383
+	movs	r3, #0
 .L1369:
-	str	fp, [sp]
-	mov	r1, r5
-	ldr	r3, [r6]
-	movs	r0, #0
-	ldr	r2, [r7]
-	bl	flash_read_page_en
-	adds	r0, r0, #1
-	beq	.L1368
-	ldr	r3, [r7]
-	ldr	r3, [r3]
-	cmp	r3, r10
-	bne	.L1368
-.L1370:
-	movs	r0, #0
-	b	.L1360
-.L1368:
-	subs	r4, r4, #1
-	subs	r5, r5, #1
-	sxth	r4, r4
-	b	.L1367
-.L1362:
-	ldrb	r1, [r2, #36]	@ zero_extendqisi2
-	ldrh	r0, [r8]
-	ldrb	r3, [r2, #37]	@ zero_extendqisi2
-	ldr	r4, .L1384+8
-	strb	r1, [r4]
-	muls	r1, r0, r1
-	strb	r3, [r4, #1]
-	movs	r0, #0
-	str	r5, [sp]
-	mov	r5, r4
-	ldr	r3, [r6]
-	bl	flash_read_page_en
-	adds	r0, r0, #1
-	bne	.L1371
+	cmp	r3, #5
+	uxth	r2, r3
+	bls	.L1367
+	tst	r2, #1
+	ite	ne
+	movne	r1, #5
+	moveq	r1, #4
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L1367:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L1369
+	b	.L1362
+.L1366:
+	cmp	r0, #4
+	mov	r3, #0
+	bne	.L1370
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #2
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #3
+	strh	r3, [r4, #6]	@ movhi
+	movs	r3, #5
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #7
+	strh	r3, [r4, #12]	@ movhi
+	mov	r2, r4
+	movs	r3, #8
+	strh	r0, [r4, #8]	@ movhi
+	strh	r3, [r2, #14]!	@ movhi
 .L1372:
-	movs	r4, #0
-	b	.L1365
-.L1385:
+	tst	r3, #1
+	ite	ne
+	movne	r1, #7
+	moveq	r1, #6
+	rsb	r1, r1, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r1, [r2, #2]!	@ movhi
+	cmp	r3, #256
+	bne	.L1372
+	b	.L1362
+.L1370:
+	cmp	r0, #5
+	bne	.L1373
+.L1374:
+	strh	r3, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #16
+	bne	.L1374
+	ldr	r2, .L1392+8
+.L1375:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L1375
+	b	.L1362
+.L1373:
+	cmp	r0, #8
+	bne	.L1376
+.L1377:
+	strh	r3, [r4, r3]	@ movhi
+	adds	r3, r3, #2
+	cmp	r3, #512
+	bne	.L1377
+	b	.L1362
+.L1376:
+	cmp	r0, #9
+	bne	.L1362
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	mov	r2, r4
+	movs	r3, #2
+	movw	r1, #509
+	strh	r3, [r2, #4]!	@ movhi
+	movs	r3, #3
+.L1378:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, r1
+	bne	.L1378
+	b	.L1362
+.L1393:
 	.align	2
-.L1384:
-	.word	.LANCHOR116
-	.word	.LC53
-	.word	.LANCHOR117
-	.word	1398362953
-	.word	.LANCHOR13
-	.word	.LANCHOR5
-	.size	flash_info_blk_init, .-flash_info_blk_init
-	.section	.text.flash_ddr_para_scan,"ax",%progbits
+.L1392:
+	.word	.LANCHOR3
+	.word	.LANCHOR138
+	.word	.LANCHOR3+30
+	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
+	.section	.text.flash_die_info_init,"ax",%progbits
 	.align	1
-	.global	flash_ddr_para_scan
+	.global	flash_die_info_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_ddr_para_scan, %function
-flash_ddr_para_scan:
-	@ args = 0, pretend = 0, frame = 0
+	.type	flash_die_info_init, %function
+flash_die_info_init:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1411
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	ldr	r6, .L1392
-	movs	r5, #1
-	mov	r8, r1
-	ldr	r4, .L1392+4
-	ldr	fp, .L1392+8
-	ldr	r10, .L1392+12
-	ldrb	r0, [r6]	@ zero_extendqisi2
-	strb	r5, [r4]
-	bl	flash_set_interface_mode
-	ldrb	r0, [r6]	@ zero_extendqisi2
-	bl	nandc_set_if_mode
-	movs	r3, #4
-	ldr	r2, [r10]
-	str	r3, [sp]
-	mov	r1, r8
-	ldr	r3, [fp]
-	mov	r0, r7
-	bl	flash_ddr_tunning_read
-	movs	r3, #4
-	ldr	r2, [r10]
-	str	r3, [sp]
-	mov	r1, r8
-	ldr	r3, [fp]
-	mov	r0, r7
-	bl	flash_read_page
-	adds	r0, r0, #1
-	mov	r3, r4
-	bne	.L1387
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	lsls	r2, r2, #31
-	bpl	.L1387
-	mov	r0, r5
-	bl	flash_set_interface_mode
-	mov	r0, r5
-	bl	nandc_set_if_mode
-	movs	r3, #0
-	strb	r3, [r4]
-.L1388:
-	movs	r0, #0
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1395
+	ldr	r1, .L1411+4
+	ldr	r0, .L1411+8
+	bl	printf
+.L1395:
+	ldr	r4, .L1411+12
+	movs	r6, #0
+	ldr	r5, .L1411+16
+	ldr	r7, .L1411+20
+	ldrh	r3, [r4, #26]
+	ldrb	r1, [r4, #12]	@ zero_extendqisi2
+	ldrh	r0, [r4, #10]
+	strh	r3, [r7]	@ movhi
+	strb	r6, [r5]
+	bl	__aeabi_idiv
+	ldr	r10, .L1411+48
+	movs	r2, #8
+	ldr	r3, .L1411+24
+	mov	r1, r6
+	mov	r8, r10
+	strh	r0, [r3]	@ movhi
+	ldr	r0, .L1411+28
+	bl	ftl_memset
+	movs	r2, #32
+	mov	r1, r6
+	ldr	r0, .L1411+32
+	bl	ftl_memset
+.L1397:
+	ldr	r3, .L1411+36
+	movs	r2, #2
+	add	r1, r10, r6, lsl #3
+	ldr	r0, .L1411+40
+	strb	r2, [r6, r3]
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	bl	flash_mem_cmp8
+	cbnz	r0, .L1396
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	ldr	r2, .L1411+32
+	str	r0, [r2, r3, lsl #2]
+	adds	r2, r3, #1
+	strb	r2, [r5]
+	uxtb	r0, r6
+	ldr	r2, .L1411+28
+	strb	r0, [r2, r3]
+	bl	zftl_flash_enter_slc_mode
+.L1396:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L1397
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	beq	.L1398
+.L1402:
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldrh	r2, [r4, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L1411+44
+	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1387:
-	movs	r2, #1
-	strb	r2, [r3]
-	b	.L1388
-.L1393:
+.L1398:
+	ldrh	r6, [r7]
+	movs	r7, #0
+	ldrb	r3, [r4, #13]	@ zero_extendqisi2
+	ldrb	r10, [r4]	@ zero_extendqisi2
+	ldrb	fp, [r4, #23]	@ zero_extendqisi2
+	muls	r3, r6, r3
+	ldrh	r6, [r4, #14]
+	and	r6, r6, #65280
+	muls	r6, r3, r6
+	lsls	r3, r6, #1
+	str	r3, [sp]
+	ldr	r3, .L1411+28
+.L1401:
+	mov	r2, r10
+	add	r1, r8, r7, lsl #3
+	ldr	r0, .L1411+40
+	str	r3, [sp, #4]
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L1399
+	ldr	r1, [sp]
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r0, .L1411+32
+	cmp	fp, #0
+	it	eq
+	moveq	r1, r6
+	strb	r7, [r3, r2]
+	str	r1, [r0, r2, lsl #2]
+	adds	r1, r2, #1
+	strb	r1, [r5]
+.L1399:
+	adds	r7, r7, #1
+	cmp	r7, #4
+	bne	.L1401
+	b	.L1402
+.L1412:
 	.align	2
-.L1392:
-	.word	.LANCHOR25
-	.word	.LANCHOR35
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
-	.section	.text.flash_complete_page_read,"ax",%progbits
+.L1411:
+	.word	.LANCHOR14
+	.word	.LANCHOR139
+	.word	.LC1
+	.word	.LANCHOR31
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR140
+	.word	.LANCHOR30
+	.word	.LANCHOR141
+	.word	.LANCHOR32
+	.word	.LANCHOR31+1
+	.word	.LANCHOR142
+	.word	.LANCHOR42
+	.size	flash_die_info_init, .-flash_die_info_init
+	.section	.text.lpa_hash_init,"ax",%progbits
 	.align	1
-	.global	flash_complete_page_read
+	.global	lpa_hash_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_complete_page_read, %function
-flash_complete_page_read:
-	@ args = 0, pretend = 0, frame = 16
+	.type	lpa_hash_init, %function
+lpa_hash_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	ldr	r2, .L1419
-	ubfx	r3, r0, #21, #3
-	sub	sp, sp, #24
-	str	r0, [sp, #12]
+	push	{r3, lr}
+	mov	r2, #512
+	movs	r1, #255
+	ldr	r0, .L1414
+	bl	ftl_memset
+	ldr	r3, .L1414+4
+	movs	r1, #255
+	ldr	r2, .L1414+8
+	ldrh	r3, [r3]
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r1, [sp, #16]
-	cmp	r2, r3
-	bhi	.L1395
-	movw	r2, #791
-	ldr	r1, .L1419+4
-	ldr	r0, .L1419+8
-	bl	printf
-.L1396:
-	b	.L1396
-.L1395:
-	ldr	r2, [sp, #12]
-	ubfx	r4, r2, #0, #21
-	ubfx	r2, r2, #24, #2
-	str	r2, [sp, #8]
-	ldr	r2, .L1419+12
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1419+16
-	mov	r0, r5
-	ldr	r6, [r3]
-	bl	nandc_cs
-	ldr	r3, [sp, #8]
-	cbnz	r3, .L1397
-	ldr	r3, .L1419+20
-	ldr	fp, .L1419+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1398
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cbz	r3, .L1397
-.L1398:
-	ldr	r3, .L1419+24
-	mov	r0, r4
-	ldrh	r8, [r3]
-	mov	r1, r8
-	bl	__aeabi_uidiv
-	mov	r1, r8
-	mul	r10, r8, r0
-	mov	r0, r4
-	bl	__aeabi_uidivmod
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1399
-	add	r4, r10, r1, lsl #1
-.L1397:
-	add	r6, r6, r5, lsl #8
-	movs	r3, #5
-	mov	r8, #0
-	ldr	fp, .L1419+44
-	str	r3, [r6, #2056]
-	uxtb	r3, r4
-	str	r8, [r6, #2052]
-	mov	r1, r8
-	str	r8, [r6, #2052]
-	mov	r0, r5
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #8
-	ldrb	r2, [fp, #9]	@ zero_extendqisi2
-	str	r3, [r6, #2052]
-	lsrs	r3, r4, #16
-	str	r3, [r6, #2052]
-	movs	r3, #224
-	str	r3, [r6, #2056]
-	str	r7, [sp]
-	ldr	r3, [sp, #16]
-	bl	nandc_xfer
-	adds	r1, r0, #1
-	mov	r6, r0
-	bne	.L1394
-	ldr	r10, .L1419+32
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	str	r3, [sp, #20]
-	cbnz	r3, .L1401
-.L1404:
-	ldr	r3, .L1419+28
-	ldr	r8, [r3]
-	cmp	r8, #0
-	bne	.L1402
-.L1403:
-	ldr	r3, .L1419+32
-	movs	r1, #0
-	ldr	r2, [sp, #12]
-	ldr	r0, .L1419+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, #-1
+	muls	r2, r3, r2
+	ldr	r3, .L1414+12
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	pop	{r3, lr}
+	b	ftl_memset
+.L1415:
+	.align	2
+.L1414:
+	.word	.LANCHOR108
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR110
+	.size	lpa_hash_init, .-lpa_hash_init
+	.section	.text.lpa_rebuild_hash,"ax",%progbits
+	.align	1
+	.global	lpa_rebuild_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_rebuild_hash, %function
+lpa_rebuild_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L1427
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1417
+	movs	r3, #0
+	movs	r2, #224
+	ldr	r1, .L1427+4
+	ldr	r0, .L1427+8
 	bl	printf
-	ldr	r3, .L1419+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1394
-	ldr	r3, .L1419+44
-	mov	r0, r5
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #16]
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	orr	r1, r4, r1, lsl #24
-	str	r3, [sp]
-	mov	r3, r7
-	bl	flash_ddr_tunning_read
-	b	.L1418
-.L1399:
-	ldr	r3, .L1419+48
-	ldrh	r4, [r3, r1, lsl #1]
-	add	r4, r4, r10
-	b	.L1397
-.L1401:
-	ldr	r1, [sp, #8]
-	mov	r0, r5
-	ldrb	r3, [fp, #9]	@ zero_extendqisi2
-	strb	r8, [r10]
-	ldr	r2, [sp, #16]
-	str	r3, [sp]
-	orr	r1, r4, r1, lsl #24
-	mov	r3, r7
-	bl	flash_read_page
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	adds	r2, r0, #1
-	strb	r3, [r10]
-	beq	.L1404
+.L1417:
+	ldr	r6, .L1427+12
+	mov	r2, #512
+	ldr	r4, .L1427+16
+	movs	r1, #255
+	ldr	r0, .L1427+20
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r5, .L1427+24
+	muls	r2, r3, r2
+	ldr	r0, [r5]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, .L1427+28
+	movs	r2, #0
+	ldrb	r6, [r6]	@ zero_extendqisi2
+	ldr	ip, [r5]
+	ldr	r7, [r3]
+	ldr	r0, .L1427+20
 .L1418:
-	mov	r6, r0
-.L1394:
-	mov	r0, r6
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1402:
-	ldr	r3, .L1419+44
-	mov	r2, r4
-	ldr	r1, [sp, #8]
-	mov	r0, r5
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r7, [sp]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #16]
-	blx	r8
-	adds	r3, r0, #1
-	beq	.L1403
-	b	.L1418
+	ldrh	r3, [r4]
+	uxth	r5, r2
+	mov	r1, r5
+	muls	r3, r6, r3
+	cmp	r5, r3, lsl #1
+	blt	.L1420
+	pop	{r3, r4, r5, r6, r7, pc}
 .L1420:
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r2, r2, #1
+	cmp	r3, #-1
+	itttt	ne
+	uxtbne	r3, r3
+	ldrhne	lr, [r0, r3, lsl #1]
+	strhne	r5, [r0, r3, lsl #1]	@ movhi
+	strhne	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L1418
+.L1428:
 	.align	2
-.L1419:
-	.word	.LANCHOR8
-	.word	.LANCHOR120
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR6
-	.word	.LANCHOR11
-	.word	.LANCHOR13
-	.word	.LANCHOR115
-	.word	.LANCHOR29
-	.word	.LC54
-	.word	.LANCHOR35
-	.word	.LANCHOR19
+.L1427:
 	.word	.LANCHOR14
-	.word	.LANCHOR12
-	.size	flash_complete_page_read, .-flash_complete_page_read
-	.section	.text.queue_wait_first_req_completed,"ax",%progbits
+	.word	.LANCHOR143
+	.word	.LC78
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.word	.LANCHOR109
+	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
+	.section	.text.zftl_read_flash_info,"ax",%progbits
 	.align	1
+	.global	zftl_read_flash_info
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_wait_first_req_completed, %function
-queue_wait_first_req_completed:
+	.type	zftl_read_flash_info, %function
+zftl_read_flash_info:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1458
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cmp	r5, #255
-	bne	.L1422
-.L1440:
-	movs	r4, #0
-	b	.L1421
-.L1422:
-	ldr	r6, .L1458+4
-	movs	r3, #48
-	mla	r3, r3, r5, r6
-	ldrb	r2, [r3, #42]	@ zero_extendqisi2
-	ldr	r4, [r3, #24]
-	subs	r3, r2, #1
-	cmp	r3, #9
-	bhi	.L1440
-	tbb	[pc, r3]
-.L1425:
-	.byte	(.L1424-.L1425)/2
-	.byte	(.L1424-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1427-.L1425)/2
-	.byte	(.L1428-.L1425)/2
-	.byte	(.L1429-.L1425)/2
-	.byte	(.L1426-.L1425)/2
-	.byte	(.L1429-.L1425)/2
-	.p2align 1
-.L1424:
-	movs	r1, #64
-	mov	r0, r4
-	bl	flash_wait_device_ready
-	lsls	r0, r0, #25
-	bpl	.L1440
-	movs	r3, #48
-	mov	r0, r4
-	mla	r5, r3, r5, r6
-	ldr	r3, [r5, #4]
-	ldr	r1, [r5, #8]
-	ldr	r2, [r5, #12]
-	cmp	r1, #0
-	it	eq
-	moveq	r1, r3
-	bl	flash_complete_page_read
-	movs	r3, #12
-	str	r0, [r5, #36]
-	strb	r3, [r5, #42]
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #8
-	strb	r3, [r5, #2]
-	b	.L1440
-.L1426:
-	movs	r1, #64
-	mov	r0, r4
-	bl	flash_wait_device_ready
-	lsls	r1, r0, #25
-	mov	r4, r0
-	bpl	.L1440
-	ands	r2, r0, #5
-	mov	r3, #48
-	mla	r5, r3, r5, r6
-	beq	.L1439
-	movs	r3, #11
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	strb	r3, [r5, #42]
-	ldr	r0, .L1458+8
-	str	r3, [sp]
-	ldr	r3, [r5, #24]
-	ldr	r2, [r5, #36]
-	bl	printf
-.L1457:
-	mov	r3, #-1
-	str	r3, [r5, #36]
-	b	.L1421
-.L1429:
-	add	r3, r5, r5, lsl #1
-	cmp	r2, #10
-	it	eq
-	moveq	r1, #9
-	add	r3, r6, r3, lsl #4
-	it	ne
-	movne	r1, #3
-	ubfx	r0, r4, #21, #3
-	movs	r7, #48
-.L1434:
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	cmp	r8, #255
-	bne	.L1438
-	mov	r4, #-1
-	b	.L1421
-.L1438:
-	mla	r2, r7, r8, r6
-	add	r3, r8, r8, lsl #1
-	ldrb	ip, [r2, #42]	@ zero_extendqisi2
-	add	r3, r6, r3, lsl #4
-	cmp	ip, r1
-	bne	.L1434
-	ldr	r2, [r2, #24]
-	ubfx	r2, r2, #21, #3
-	cmp	r0, r2
-	bne	.L1434
-	mov	r0, r4
-	movs	r1, #64
-	bl	flash_wait_device_ready
-	ands	r4, r0, #64
-	mov	r10, r0
-	beq	.L1436
-	ands	r4, r0, #15
-	mul	r7, r7, r5
-	beq	.L1437
-	adds	r4, r6, r7
-	movs	r7, #11
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1458+8
-	str	r7, [sp]
-	ldr	r3, [r4, #24]
-	ldr	r2, [r4, #36]
-	bl	printf
-	mov	r3, #-1
-	strb	r7, [r4, #42]
-	str	r3, [r4, #36]
-	mov	r4, r10
-.L1436:
-	movs	r3, #48
-	mla	r5, r3, r5, r6
-	mla	r6, r3, r8, r6
-	ldrb	r2, [r5, #42]	@ zero_extendqisi2
-	ldr	r3, [r5, #36]
-	strb	r2, [r6, #42]
-	str	r3, [r6, #36]
-.L1421:
-	mov	r0, r4
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1437:
-	add	r7, r7, r6
-	movs	r3, #12
-	strb	r3, [r7, #42]
-	str	r4, [r7, #36]
-	b	.L1436
-.L1427:
-	mov	r0, r4
-	movs	r1, #32
-	bl	flash_wait_device_ready
-	lsls	r2, r0, #26
+	push	{r4, r5, r6, lr}
+	movs	r2, #11
+	movs	r1, #0
 	mov	r4, r0
-	bpl	.L1440
-	ands	r2, r0, #15
-	mov	r3, #48
-	mla	r5, r3, r5, r6
-	beq	.L1439
-	movs	r3, #11
-	strb	r3, [r5, #42]
-	b	.L1457
-.L1439:
-	movs	r3, #12
-	str	r2, [r5, #36]
-	strb	r3, [r5, #42]
-	b	.L1440
-.L1428:
-	movs	r1, #64
-	mov	r0, r4
-	bl	flash_wait_device_ready
-	lsls	r3, r0, #25
-	bpl	.L1440
-	movs	r3, #48
-	mla	r5, r3, r5, r6
-	movs	r3, #6
-	str	r0, [r5, #36]
-	strb	r3, [r5, #42]
-	b	.L1440
-.L1459:
-	.align	2
-.L1458:
-	.word	.LANCHOR90
-	.word	.LANCHOR36
-	.word	.LC55
-	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
-	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
-	.align	1
-	.global	sblk_wait_write_queue_completed
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_wait_write_queue_completed, %function
-sblk_wait_write_queue_completed:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L1463
-.L1461:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L1462
-	pop	{r4, pc}
-.L1462:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1461
-.L1464:
+	bl	ftl_memset
+	ldr	r1, .L1432
+	movs	r2, #0
+	ldr	r3, .L1432+4
+	strb	r2, [r4, #10]
+	ldrb	r0, [r1, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	smulbb	r3, r3, r0
+	uxth	r3, r3
+	strb	r3, [r4, #4]
+	lsrs	r3, r3, #8
+	strb	r3, [r4, #5]
+	ldr	r3, .L1432+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #7]
+	ldr	r3, .L1432+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	strb	r5, [r4]
+	ldrb	r5, [r3, #1]	@ zero_extendqisi2
+	strb	r5, [r4, #1]
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	strb	r0, [r4, #6]
+	strb	r5, [r4, #2]
+	movs	r5, #1
+	strb	r3, [r4, #3]
+	movs	r3, #32
+	strb	r3, [r4, #8]
+	ldrb	r3, [r1, #7]	@ zero_extendqisi2
+	ldr	r0, .L1432+16
+	strb	r3, [r4, #9]
+	ldr	r3, .L1432+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	mov	r3, r2
+.L1430:
+	uxtb	r2, r3
+	cmp	r1, r2
+	bhi	.L1431
+	pop	{r4, r5, r6, pc}
+.L1431:
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	ldrb	r6, [r4, #10]	@ zero_extendqisi2
+	lsl	r2, r5, r2
+	orrs	r2, r2, r6
+	strb	r2, [r4, #10]
+	b	.L1430
+.L1433:
 	.align	2
-.L1463:
-	.word	.LANCHOR90
-	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
-	.section	.text.ftl_read_page,"ax",%progbits
-	.align	1
-	.global	ftl_read_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read_page, %function
-ftl_read_page:
-	@ args = 4, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldr	r8, [sp, #24]
-	mov	r5, r1
-	mov	r6, r2
-	mov	r7, r3
-	bl	sblk_wait_write_queue_completed
-	str	r8, [sp, #24]
-	mov	r3, r7
-	mov	r2, r6
-	mov	r1, r5
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	flash_read_page_en
-	.size	ftl_read_page, .-ftl_read_page
-	.section	.text.ftl_read_ppa_page,"ax",%progbits
-	.align	1
-	.global	ftl_read_ppa_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_read_ppa_page, %function
-ftl_read_ppa_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	mov	r7, r3
-	bl	sblk_wait_write_queue_completed
-	str	r7, [sp]
-	mov	r3, r6
-	mov	r2, r5
-	mov	r1, r4
-	ubfx	r0, r4, #21, #3
-	bl	flash_read_page_en
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.ftl_open_sblk_read_test,"ax",%progbits
+.L1432:
+	.word	.LANCHOR31
+	.word	.LANCHOR2
+	.word	.LANCHOR44
+	.word	.LANCHOR59
+	.word	.LANCHOR30
+	.word	.LANCHOR18
+	.size	zftl_read_flash_info, .-zftl_read_flash_info
+	.section	.text.gc_static_wearleveling,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_read_test
+	.global	gc_static_wearleveling
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_read_test, %function
-ftl_open_sblk_read_test:
-	@ args = 0, pretend = 0, frame = 32
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r0, .L1550
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	ldr	r3, [r0]
+	ldr	r3, [r3, #32]
+	cmp	r3, #10240
+	bls	.L1435
+	bl	ftl_tmp_into_update
+.L1435:
+	ldr	r3, .L1550+4
+	ldr	r3, [r3]
+	ldr	r2, [r3, #568]
+	ldr	r1, [r3, #12]
+	add	r2, r2, #860160
+	add	r2, r2, #3840
+	cmp	r1, r2
+	bhi	.L1436
+	ldr	r4, [r0]
+	ldr	r2, [r3, #572]
+	ldr	r4, [r4, #36]
+	adds	r2, r2, #32
+	cmp	r4, r2
+	bls	.L1487
+.L1436:
+	ldr	r2, [r0]
 	movs	r5, #0
-	ldr	r8, .L1477+20
-	sub	sp, sp, #32
-	mov	r4, r0
-	add	r1, sp, #16
-	bl	ftl_get_blk_list_in_sblk
-	strh	r4, [sp]	@ movhi
-	strb	r0, [sp, #9]
-.L1468:
-	ldr	r3, .L1477
-	ldrh	r2, [r3]
-	uxth	r3, r5
-	cmp	r2, r3
-	bls	.L1467
-	movs	r4, #0
-	ldr	r7, .L1477+4
-	b	.L1470
-.L1473:
-	uxth	r3, r4
-	add	r2, sp, #32
-	add	r3, r2, r3, lsl #1
-	ldrh	r0, [r3, #-16]
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L1469
-.L1472:
-	adds	r4, r4, #1
-.L1470:
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L1473
-	adds	r5, r5, #1
-	b	.L1468
-.L1469:
-	ldr	r3, .L1477+8
-	uxth	r6, r5
-	ldr	r2, .L1477+12
-	ldr	r1, .L1477+16
-	ldrh	ip, [r3]
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	mla	r0, r0, ip, r6
-	bl	ftl_read_ppa_page
-	cmp	r0, #512
-	bne	.L1472
-.L1467:
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1478:
-	.align	2
-.L1477:
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR75
-	.word	.LANCHOR121
-	.word	ftl_tmp_buffer
-	.word	.LANCHOR45
-	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
-	.section	.text.sblk_read_page,"ax",%progbits
-	.align	1
-	.global	sblk_read_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_read_page, %function
-sblk_read_page:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r10, .L1493
-	mov	r5, r1
-	mov	r8, r0
-	mov	r6, r1
-.L1480:
-	cbnz	r6, .L1484
-.L1492:
-	ldr	r6, .L1493
-.L1485:
-	cbnz	r5, .L1488
-	mov	r0, r5
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1484:
-	ldrb	r7, [r8]	@ zero_extendqisi2
-	ldr	fp, [r8, #24]
-.L1481:
+	movw	r4, #65535
+	mov	r8, r5
+	mov	fp, r4
+	str	r5, [sp, #20]
+	ldrh	r6, [r2, #134]
+	ldr	r0, [r2, #36]
+	str	r5, [sp, #32]
+	str	r1, [r3, #568]
+	str	r0, [r3, #572]
+	str	r5, [sp, #36]
+	str	r5, [sp, #28]
+	str	r5, [sp, #24]
+	str	r5, [sp, #16]
+.L1438:
+	ldr	r3, .L1550+8
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bhi	.L1449
+	ldr	r6, .L1550+4
+	movs	r3, #0
+	movs	r2, #128
+	movs	r1, #255
+	ldr	r0, [r6]
+	strh	r3, [r0, #122]	@ movhi
+	add	r0, r0, #264
+	bl	ftl_memset
+	ldr	r3, [r6]
+	ldrh	r1, [r3, #586]
+	ldr	r3, .L1550+12
+	ldr	r2, [r3]
+	ldr	r3, .L1550+16
+	ldr	r3, [r3]
+	add	r6, r2, r1, lsl #2
+	lsls	r0, r3, #21
+	bpl	.L1450
+	ldr	r0, .L1550+20
+	ldr	r3, [r2, r1, lsl #2]
+	ldrh	r2, [r2, r1, lsl #2]
+	ldr	r0, [r0]
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	ldrh	r0, [r0, r1, lsl #1]
+	str	r0, [sp, #12]
+	ldrb	r0, [r6, #3]	@ zero_extendqisi2
+	str	r0, [sp, #8]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp, #4]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	ubfx	r0, r0, #3, #2
+	str	r0, [sp]
+	ldr	r0, .L1550+24
+	bl	printf
+.L1450:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #28
+	bpl	.L1451
+	and	r2, r3, #192
+	ldr	r6, .L1550+4
+	cmp	r2, #64
+	bne	.L1452
+	ldr	r3, [r6]
+	movs	r2, #1
 	movs	r1, #0
-	mov	r0, fp
-	bl	queue_lun_state
-	cbnz	r0, .L1482
+	ldrh	r0, [r3, #586]
+	bl	gc_add_sblk
+	ldr	r3, .L1550+28
+	movs	r2, #1
+	strh	r2, [r3, #314]	@ movhi
+.L1451:
+	ldr	r3, .L1550+4
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #584]
+	ldr	r3, .L1550+12
+	ldr	r2, [r3]
+	ldr	r3, .L1550+16
+	ldr	r3, [r3]
+	add	r6, r2, r1, lsl #2
+	lsls	r7, r3, #21
+	bpl	.L1453
+	ldr	r0, .L1550+20
+	ldr	r3, [r2, r1, lsl #2]
+	ldrh	r2, [r2, r1, lsl #2]
+	ldr	r0, [r0]
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	ldrh	r0, [r0, r1, lsl #1]
+	str	r0, [sp, #12]
+	ldrb	r0, [r6, #3]	@ zero_extendqisi2
+	str	r0, [sp, #8]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
 	str	r0, [sp, #4]
-	movs	r0, #48
-	ldr	r1, [r8, #24]
-	bl	flash_start_page_read
-	ldr	r2, [sp, #4]
-	movs	r1, #1
-	strb	r1, [r8, #42]
-	mov	r1, r8
-	ldr	r0, .L1493+4
-	strb	r2, [r8, #43]
-	movs	r2, #255
-	strb	r2, [r8]
-	bl	buf_add_tail
-	subs	r6, r6, #1
-	beq	.L1492
-	add	r7, r7, r7, lsl #1
-	add	r8, r10, r7, lsl #4
-	b	.L1480
-.L1482:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1481
-.L1488:
-	ldrb	r3, [r4, #42]	@ zero_extendqisi2
-	cmp	r3, #12
-	bne	.L1486
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	subs	r5, r5, #1
-	add	r4, r4, r4, lsl #1
-	add	r4, r6, r4, lsl #4
-	b	.L1485
-.L1486:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1485
-.L1494:
-	.align	2
-.L1493:
-	.word	.LANCHOR36
-	.word	.LANCHOR90
-	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.gc_check_data_one_wl,"ax",%progbits
-	.align	1
-	.global	gc_check_data_one_wl
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r3, .L1520
-	ldr	r4, .L1520+4
-	ldr	r8, [r3]
-	ldr	r3, [r4, #8]
-	cbnz	r3, .L1496
-	movs	r0, #1
-	bl	buf_alloc
-	str	r0, [r4, #8]
-.L1496:
-	ldr	r5, [r4, #8]
-	cbz	r5, .L1497
-	ldr	fp, .L1520+40
-	add	r10, r8, #96
-	movs	r7, #0
-.L1498:
-	ldrb	r3, [r8, #89]	@ zero_extendqisi2
-	cmp	r7, r3
-	bge	.L1508
-	movs	r6, #1
-	b	.L1509
-.L1497:
-	movw	r2, #333
-	ldr	r1, .L1520+8
-	ldr	r0, .L1520+12
-	bl	printf
-.L1499:
-	b	.L1499
-.L1507:
-	ldrh	r3, [fp]
-	ldrh	r2, [r10]
-	muls	r2, r3, r2
-	ldr	r3, .L1520+16
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldrh	r3, [r4, #12]
-	cmp	r1, #3
-	bne	.L1500
-	add	r3, r3, r2
-	orr	r3, r3, r6, lsl #24
-.L1519:
-	movs	r1, #1
-	str	r3, [r5, #24]
-	mov	r0, r5
-	bl	sblk_read_page
-	ldr	r2, [r5, #36]
-	ldr	r1, .L1520+20
-	adds	r0, r2, #1
-	beq	.L1503
-	ldr	r3, [r1]
-	ldrh	ip, [r4, #18]
-	ldr	r0, [r5, #12]
-	ldr	lr, [r3, ip, lsl #2]
-	ldr	r3, [r0, #4]
-	cmp	lr, r3
-	bne	.L1503
-	ldr	r3, .L1520+24
-	ldr	r3, [r3]
-	ldr	ip, [r3, ip, lsl #2]
-	ldr	r3, [r0, #8]
-	cmp	ip, r3
-	beq	.L1504
-.L1503:
-	ldrh	r3, [r4, #18]
-	ldr	r1, [r1]
-	lsls	r0, r3, #2
-	ldr	r3, [r1, r3, lsl #2]
-	adds	r1, r3, #1
-	beq	.L1504
-	ldr	r1, .L1520+28
-	ldr	r1, [r1]
-	lsls	r1, r1, #21
-	bpl	.L1505
-	ldr	r1, [r5, #12]
-	ldr	r4, [r1, #12]
-	str	r4, [sp, #16]
-	ldr	r4, [r1, #8]
-	str	r4, [sp, #12]
-	ldr	r4, [r1, #4]
-	str	r4, [sp, #8]
-	ldr	r1, [r1]
-	str	r1, [sp, #4]
-	ldr	r1, .L1520+24
-	ldr	r1, [r1]
-	ldr	r1, [r1, r0]
-	ldr	r0, .L1520+32
-	str	r1, [sp]
-	ldr	r1, [r5, #24]
+	ldrb	r0, [r6, #2]	@ zero_extendqisi2
+	ubfx	r0, r0, #3, #2
+	str	r0, [sp]
+	ldr	r0, .L1550+32
 	bl	printf
-.L1505:
-	ldr	r3, .L1520+36
-	mov	r0, #-1
-	ldrh	r2, [r8, #80]
+.L1453:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	lsls	r0, r3, #28
+	bpl	.L1454
+	and	r2, r3, #192
+	cmp	r2, #64
+	bne	.L1455
+	ldr	r3, .L1550+4
+	movs	r2, #1
 	movs	r1, #0
 	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-.L1495:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1500:
-	cmp	r1, #2
-	itett	eq
-	addeq	r3, r3, #-1
-	addne	r3, r3, r2
-	addeq	r3, r3, r2
-	addeq	r3, r3, r6
-	it	eq
-	orreq	r3, r3, #33554432
-	b	.L1519
-.L1504:
-	ldrh	r3, [r4, #18]
-	adds	r6, r6, #1
-	adds	r3, r3, #1
-	strh	r3, [r4, #18]	@ movhi
-.L1509:
-	ldrh	r3, [r4, #16]
-	cmp	r6, r3
-	ble	.L1507
-	adds	r7, r7, #1
-	add	r10, r10, #2
-	b	.L1498
-.L1508:
-.L1506:
-	ldrh	r3, [r4, #12]
-	movs	r0, #0
-	adds	r3, r3, #1
-	strh	r3, [r4, #12]	@ movhi
-	b	.L1495
-.L1521:
-	.align	2
-.L1520:
-	.word	.LANCHOR60
-	.word	.LANCHOR59
-	.word	.LANCHOR122
-	.word	.LC0
-	.word	.LANCHOR64
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR22
-	.word	.LC56
-	.word	.LANCHOR56
-	.word	.LANCHOR75
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
-	.section	.text.flash_prog_page,"ax",%progbits
-	.align	1
-	.global	flash_prog_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_prog_page, %function
-flash_prog_page:
-	@ args = 4, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L1530
-	mov	r5, r0
-	mov	r6, r1
-	mov	r10, r2
-	ubfx	r8, r1, #0, #21
-	ubfx	r7, r1, #24, #2
-	ldr	r4, [r3]
-	add	r3, r0, #8
-	add	r3, r4, r3, lsl #8
-	str	r3, [sp, #4]
-	ldr	r3, .L1530+4
+	ldrh	r0, [r3, #584]
+	bl	gc_add_sblk
+	ldr	r3, .L1550+28
+	movs	r2, #1
+	strh	r2, [r3, #314]	@ movhi
+.L1454:
+	ldr	r3, .L1550+16
 	ldr	r3, [r3]
-	lsls	r3, r3, #27
-	bpl	.L1523
-	ldr	r3, [sp, #40]
-	mov	r2, r7
-	ldr	r0, .L1530+8
-	bl	printf
-.L1523:
-	bl	nandc_wait_flash_ready
-	mov	r0, r5
-	bl	hynix_reconfig_rr_para
-	mov	r0, r5
-	bl	nandc_cs
-	mov	r0, r5
-	cbnz	r7, .L1524
-	bl	flash_enter_slc_mode
-.L1525:
-	add	r4, r4, r5, lsl #8
-	movs	r3, #128
-	uxtb	r6, r6
-	mov	r0, r8
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	lsr	r3, r8, #8
-	str	r6, [r4, #2052]
-	str	r3, [r4, #2052]
-	lsr	r3, r8, #16
-	str	r3, [r4, #2052]
-	bl	nandc_set_seed
-	ldr	r1, .L1530+12
-	mov	r2, r10
-	mov	r3, fp
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	movs	r3, #16
-	str	r3, [r4, #2056]
-	bl	nandc_wait_flash_ready
-	ldr	r0, [sp, #4]
-	bl	flash_read_status
-	mov	r4, r0
-	cbnz	r7, .L1526
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L1526:
-	mov	r0, r5
-	bl	nandc_de_cs
-	and	r0, r4, #4
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1524:
-	bl	flash_exit_slc_mode
-	b	.L1525
-.L1531:
-	.align	2
-.L1530:
-	.word	.LANCHOR6
-	.word	.LANCHOR22
-	.word	.LC57
-	.word	.LANCHOR19
-	.size	flash_prog_page, .-flash_prog_page
-	.section	.text.flash_test_blk,"ax",%progbits
-	.align	1
-	.global	flash_test_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_test_blk, %function
-flash_test_blk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r5, r1
-	mov	r4, r0
-	cbnz	r0, .L1533
-	ldr	r3, .L1550
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r1
-	bhi	.L1537
-.L1533:
-	ldr	r6, .L1550+4
-	movs	r2, #32
-	ldr	r7, .L1550+8
-	movs	r1, #165
-	ldr	r0, [r6]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r7]
-	bl	ftl_memset
+	lsls	r1, r3, #21
+	bpl	.L1456
 	ldr	r3, .L1550+12
-	mov	r0, r4
-	ldrh	r3, [r3]
-	muls	r5, r3, r5
-	mov	r1, r5
-	bl	flash_erase_block
-	adds	r0, r0, #1
-	beq	.L1535
-	ldr	r8, .L1550+16
-	mov	r1, r5
-	mov	r0, r4
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r6]
-	bl	flash_prog_page
-	adds	r0, r0, #1
-	beq	.L1535
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	ldr	r0, .L1550+20
+	ldr	r2, [r3]
+	ldr	r0, [r0]
+	ldr	r3, [r2, r5, lsl #2]
+	ldrh	r0, [r0, r5, lsl #1]
+	add	r1, r2, r5, lsl #2
+	ldrh	r2, [r2, r5, lsl #2]
+	ubfx	r3, r3, #11, #8
+	str	r0, [sp, #12]
+	ldrb	r0, [r1, #3]	@ zero_extendqisi2
+	ubfx	r2, r2, #0, #11
+	str	r0, [sp, #8]
+	ldrb	r0, [r1, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp, #4]
+	ldrb	r1, [r1, #2]	@ zero_extendqisi2
+	ldr	r0, .L1550+36
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp]
 	mov	r1, r5
-	mov	r0, r4
-	str	r3, [sp]
-	ldr	r2, [r7]
-	ldr	r3, [r6]
-	bl	flash_read_page
-	cmp	r0, #-1
-	mov	r8, r0
-	beq	.L1535
-	ldr	r3, [r7]
-	ldr	r3, [r3]
-	cmp	r3, #1515870810
-	bne	.L1535
-	ldr	r3, [r6]
+	bl	printf
+.L1456:
+	ldr	r3, .L1550+16
 	ldr	r3, [r3]
-	cmp	r3, #-1515870811
-	beq	.L1536
-.L1535:
-	mov	r8, #-1
-.L1536:
+	lsls	r2, r3, #21
+	bpl	.L1457
+	ldr	r3, .L1550+12
+	ldr	r0, [sp, #20]
+	ldr	r5, [sp, #20]
+	ldr	r2, [r3]
+	ldr	r3, [sp, #20]
+	add	r1, r2, r3, lsl #2
+	ldr	r3, [r2, r3, lsl #2]
+	ldrh	r2, [r2, r0, lsl #2]
+	ldr	r0, .L1550+20
+	ubfx	r3, r3, #11, #8
+	ubfx	r2, r2, #0, #11
+	ldr	r0, [r0]
+	ldrh	r0, [r0, r5, lsl #1]
+	str	r0, [sp, #12]
+	ldrb	r0, [r1, #3]	@ zero_extendqisi2
+	str	r0, [sp, #8]
+	ldrb	r0, [r1, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp, #4]
+	ldrb	r1, [r1, #2]	@ zero_extendqisi2
+	ldr	r0, .L1550+40
+	ubfx	r1, r1, #3, #2
+	str	r1, [sp]
 	mov	r1, r5
-	mov	r0, r4
-	bl	flash_erase_block
-	mov	r0, r8
-.L1532:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1537:
-	b	.L1532
-.L1551:
-	.align	2
-.L1550:
-	.word	.LANCHOR123
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR13
-	.word	.LANCHOR19
-	.size	flash_test_blk, .-flash_test_blk
-	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
-	.align	1
-	.global	flash_start_tlc_page_prog
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_start_tlc_page_prog, %function
-flash_start_tlc_page_prog:
-	@ args = 12, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	ldr	r2, .L1559
-	add	r5, sp, #40
-	mov	r4, r0
-	mov	fp, r1
-	ldm	r5, {r5, r8, r10}
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1553
-	movw	r2, #655
-	ldr	r1, .L1559+4
-	ldr	r0, .L1559+8
 	bl	printf
-.L1554:
-	b	.L1554
-.L1553:
-	ldr	r2, .L1559+12
-	ldrb	r6, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1559+16
-	mov	r0, r6
-	ldr	r2, [r3]
-	str	r2, [sp, #4]
-	bl	nandc_cs
-	lsls	r3, r6, #8
-	ldr	r2, [sp, #4]
-	cbz	r4, .L1555
-	adds	r1, r2, r3
-	str	r4, [r1, #2056]
-.L1555:
-	adds	r4, r2, r3
-	movs	r3, #128
-	str	fp, [r4, #2056]
-	str	r3, [r4, #2056]
-	movs	r3, #0
-	str	r3, [r4, #2052]
-	str	r3, [r4, #2052]
-	uxtb	r3, r5
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #8
-	str	r3, [r4, #2052]
-	lsrs	r3, r5, #16
-	add	r5, r5, r5, lsl #1
-	str	r3, [r4, #2052]
-	subs	r0, r5, #1
-	add	r0, r0, fp
-	bl	nandc_set_seed
-	ldr	r1, .L1559+20
-	mov	r3, r10
-	mov	r2, r8
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	r7, [r4, #2056]
-	mov	r0, r6
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs
-.L1560:
+.L1457:
+	ldr	r6, .L1550
+	ldrh	r3, [sp, #16]
+	ldr	r1, [sp, #24]
+	ldr	r5, [r6]
+	ldr	r0, [sp, #32]
+	strh	r3, [r5, #96]	@ movhi
+	strh	r8, [r5, #98]	@ movhi
+	strh	r4, [r5, #92]	@ movhi
+	strh	fp, [r5, #94]	@ movhi
+	bl	__aeabi_uidiv
+	ldr	r1, [sp, #28]
+	mov	r7, r0
+	strh	r0, [r5, #88]	@ movhi
+	ldr	r0, [sp, #36]
+	bl	__aeabi_uidiv
+	strh	r0, [r5, #90]	@ movhi
+	ldr	r5, .L1550+16
+	ldr	r3, [r5]
+	lsls	r3, r3, #21
+	bpl	.L1458
+	uxth	r0, r0
+	uxth	r3, r7
+	ldr	r2, [sp, #28]
+	str	r0, [sp]
+	ldr	r1, [sp, #24]
+	ldr	r0, .L1550+44
+	bl	printf
+.L1458:
+	ldr	r3, [r5]
+	ldr	r5, .L1550+48
+	tst	r3, #1024
+	beq	.L1459
+	ldrh	r3, [r5]
+	mov	r2, fp
+	mov	r1, r4
+	ldr	r0, .L1550+52
+	str	r3, [sp, #8]
+	ldr	r3, .L1550+56
+	ldrh	r3, [r3]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #16]
+	bl	printf
+.L1459:
+	sub	r3, r8, fp
+	str	r3, [sp, #20]
+	ldr	r2, [sp, #20]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bgt	.L1460
+	ldr	r2, .L1550+56
+	ldr	r3, [sp, #16]
+	ldrh	r2, [r2]
+	subs	r3, r3, r4
+	cmp	r3, r2
+	ble	.L1488
+.L1460:
+	ldr	r3, .L1550+4
+	mov	r8, #0
+	mov	r7, r8
+	ldr	r3, [r3]
+	ldrh	r5, [r3, #580]
+	ldr	r3, [r6]
+	ldrh	r10, [r3, #134]
+.L1462:
+	ldr	r3, .L1550+8
+	ldrh	r3, [r3]
+	cmp	r10, r3
+	bcc	.L1472
+.L1471:
+	ldr	r3, .L1550+4
+	ldr	r3, [r3]
+	str	r5, [r3, #580]
+.L1461:
+	cmp	fp, #0
+	beq	.L1474
+	ldr	r3, .L1550
+	ldr	r1, [r3]
+	ldr	r3, .L1550+8
+	ldrh	r2, [r1, #134]
+	ldrh	r6, [r3]
+	ldr	r3, .L1550+12
+	ldr	r3, [r3]
+	add	r3, r3, r2, lsl #2
+	b	.L1551
+.L1552:
 	.align	2
-.L1559:
-	.word	.LANCHOR8
-	.word	.LANCHOR124
-	.word	.LC0
+.L1550:
+	.word	.LANCHOR102
 	.word	.LANCHOR10
 	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
-	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
-	.align	1
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	queue_tlc_prog_cmd, %function
-queue_tlc_prog_cmd:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, lr}
-	mov	r4, r0
-	ldr	r3, [r0]
-	movs	r1, #1
-	ldr	r2, [r3, #12]
-	ldr	r5, [r3, #24]
-	ldrb	r0, [r3, #44]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	ubfx	r6, r5, #0, #21
-	ubfx	r5, r5, #21, #3
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldm	r4, {r2, r3}
-	movs	r1, #2
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #8]
-	movs	r1, #3
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #16
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	ldr	r1, [r4]
-	movs	r3, #4
-	ldr	r0, .L1562
-	strb	r3, [r1, #42]
-	movs	r3, #1
-	strb	r3, [r1, #43]
-	movs	r3, #255
-	strb	r3, [r1]
-	add	sp, sp, #16
+	.word	.LANCHOR7
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC80
+	.word	.LANCHOR63
+	.word	.LC81
+	.word	.LC82
+	.word	.LC83
+	.word	.LC84
+	.word	.LANCHOR144
+	.word	.LC85
+	.word	.LANCHOR145
+.L1551:
+.L1475:
+	cmp	r2, r6
+	bcc	.L1477
+	ldrh	r3, [r1, #72]
+	add	r3, r3, fp
+	strh	r3, [r1, #72]	@ movhi
+	ldrh	r3, [r1, #98]
+	cmp	fp, r3
+	itt	cc
+	subcc	r3, r3, fp
+	strhcc	r3, [r1, #98]	@ movhi
+.L1474:
+	cbz	r4, .L1480
+	ldr	r3, .L1553
+	ldr	r1, [r3]
+	ldr	r3, .L1553+4
+	ldrh	r2, [r1, #134]
+	ldrh	ip, [r3]
+	ldr	r3, .L1553+8
+	ldr	r3, [r3]
+	add	r3, r3, r2, lsl #2
+.L1481:
+	cmp	r2, ip
+	bcc	.L1483
+	ldrh	r3, [r1, #74]
+	add	r3, r3, r4
+	strh	r3, [r1, #74]	@ movhi
+	ldrh	r3, [r1, #96]
+	cmp	r4, r3
+	itt	cc
+	subcc	r4, r3, r4
+	strhcc	r4, [r1, #96]	@ movhi
+.L1480:
+	movs	r1, #5
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r2, #65535
+	cmp	r0, r2
+	beq	.L1437
+	ldr	r2, .L1553+12
+	ldr	r3, .L1553+16
+	ldr	r2, [r2]
+	ldrh	r3, [r3]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, r3
+	bhi	.L1437
+	adds	r7, r7, #1
+	movs	r2, #1
+	movs	r1, #0
+	bl	gc_add_sblk
+.L1437:
+	add	r0, r7, r8
+	add	sp, sp, #40
 	@ sp needed
-	pop	{r4, r5, r6, lr}
-	b	buf_add_tail
-.L1563:
-	.align	2
-.L1562:
-	.word	.LANCHOR90
-	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
-	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
-	.align	1
-	.global	sblk_tlc_prog_one_page
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_tlc_prog_one_page, %function
-sblk_tlc_prog_one_page:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	ldr	r6, [r3, #24]
-.L1565:
-	movs	r1, #1
-	mov	r0, r6
-	bl	queue_lun_state
-	mov	r4, r0
-	cbnz	r0, .L1566
-	mov	r0, r5
-	bl	queue_tlc_prog_cmd
-	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L1566:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1565
-	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
-	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
-	.align	1
-	.global	sblk_xlc_prog_pages
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sblk_xlc_prog_pages, %function
-sblk_xlc_prog_pages:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	sub	sp, sp, #20
-	mov	r7, r1
-	mov	r10, r2
-	ldr	r5, [r3, #24]
-.L1568:
-	movs	r1, #1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1449:
+	ldr	r3, .L1553+8
+	lsls	r1, r6, #2
+	ldr	r0, [r3]
+	add	ip, r0, r1
+	ldrb	r3, [ip, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L1439
+	ubfx	lr, r3, #3, #2
+	tst	lr, #1
+	beq	.L1440
+	ldrh	r3, [r0, r1]
+	ldr	r2, [r0, r1]
+	ubfx	r3, r3, #0, #11
+	ubfx	r2, r2, #11, #8
+.L1441:
+	ldr	r7, [sp, #24]
+	cmp	r4, r3
+	add	r10, r7, #1
+	uxth	r7, r10
+	str	r7, [sp, #24]
+	ldr	r7, [sp, #32]
+	add	r7, r7, r3
+	str	r7, [sp, #32]
+	bls	.L1486
+	ldr	r4, .L1553+20
+	ldr	r4, [r4]
+	strh	r6, [r4, #586]	@ movhi
+	mov	r4, r3
+.L1486:
+	ldr	r7, [sp, #16]
+	movw	r10, #65535
+	cmp	r7, r3
+	itt	cc
+	movcc	r5, r6
+	strcc	r3, [sp, #16]
+	cmp	r2, r10
+	bne	.L1443
+.L1445:
+	cmp	r3, #9
+	bls	.L1448
+.L1439:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	b	.L1438
+.L1440:
+	tst	r3, #24
+	bne	.L1442
+	ldrh	r3, [r0, r1]
+	movw	r2, #65535
+	ubfx	r3, r3, #0, #11
+	b	.L1441
+.L1442:
+	ldr	r3, [r0, r1]
+	ubfx	r2, r3, #11, #8
+	movw	r3, #65535
+.L1443:
+	ldr	r7, [sp, #28]
+	cmp	fp, r2
+	it	hi
+	movhi	fp, r2
+	add	r10, r7, #1
+	uxth	r7, r10
+	it	hi
+	ldrhi	r10, .L1553+20
+	str	r7, [sp, #28]
+	it	hi
+	ldrhi	r10, [r10]
+	ldr	r7, [sp, #36]
+	it	hi
+	strhhi	r6, [r10, #584]	@ movhi
+	cmp	r8, r2
+	itt	cc
+	strcc	r6, [sp, #20]
+	movcc	r8, r2
+	cmp	r2, #9
+	add	r7, r7, r2
+	str	r7, [sp, #36]
+	bhi	.L1445
+.L1448:
+	ldr	r3, .L1553+24
+	ldr	r3, [r3]
+	lsls	r7, r3, #23
+	bpl	.L1439
+	ldr	r3, [r0, r1]
+	ldrh	r2, [r0, r1]
+	ldr	r1, .L1553+12
+	ubfx	r3, r3, #11, #8
+	ldr	r0, .L1553+28
+	ubfx	r2, r2, #0, #11
+	ldr	r1, [r1]
+	ldrh	r1, [r1, r6, lsl #1]
+	str	r1, [sp, #12]
+	ldrb	r1, [ip, #3]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [ip, #2]	@ zero_extendqisi2
+	str	lr, [sp]
+	lsrs	r1, r1, #5
+	str	r1, [sp, #4]
+	mov	r1, r6
+	bl	printf
+	b	.L1439
+.L1452:
+	tst	r3, #224
+	bne	.L1451
+	ldr	r3, [r6]
+	movw	r2, #65535
+	ldrh	r10, [r3, #590]
+	cmp	r10, r2
+	bne	.L1451
+	ldrh	r0, [r3, #586]
+	ldrh	r3, [r3, #588]
+	cmp	r3, r0
+	beq	.L1451
+	bl	zftl_remove_free_node
+	ldr	r3, [r6]
+	ldrh	r2, [r3, #586]
+	strh	r10, [r3, #586]	@ movhi
+	strh	r2, [r3, #590]	@ movhi
+	b	.L1451
+.L1455:
+	tst	r3, #224
+	bne	.L1454
+	ldr	r10, .L1553+20
+	movw	r2, #65535
+	ldr	r3, [r10]
+	ldrh	r6, [r3, #588]
+	cmp	r6, r2
+	bne	.L1454
+	ldrh	r0, [r3, #584]
+	ldrh	r3, [r3, #590]
+	cmp	r3, r0
+	beq	.L1454
+	bl	zftl_remove_free_node
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #584]
+	strh	r6, [r3, #584]	@ movhi
+	strh	r2, [r3, #588]	@ movhi
+	b	.L1454
+.L1472:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r3, r5
+	it	ls
+	movls	r5, #0
+	ldr	r3, .L1553+8
+	lsls	r6, r5, #2
+	ldr	r3, [r3]
+	adds	r2, r3, r6
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	tst	r2, #192
+	beq	.L1464
+	and	r0, r2, #224
+	cmp	r0, #224
+	beq	.L1464
+	ubfx	r2, r2, #3, #2
+	ands	r1, r2, #1
+	beq	.L1465
+	cmp	r0, #160
+.L1548:
+	bne	.L1467
+	ldr	r2, .L1553+32
+	ldr	r0, [sp, #20]
+	ldrh	r2, [r2]
+	cmp	r0, r2
+	ble	.L1468
+	ldr	r2, [r3, r6]
+	ubfx	r2, r2, #11, #8
+	cmp	r2, fp
+	bls	.L1469
+	cbz	r1, .L1468
+	ldrh	r2, [r3, r6]
+	ubfx	r2, r2, #0, #11
+	cmp	r2, r4
+	bgt	.L1468
+.L1469:
+	movs	r2, #1
+	movs	r1, #0
 	mov	r0, r5
-	bl	queue_lun_state
-	cmp	r0, #0
-	bne	.L1569
-	cmp	r10, #2
-	bne	.L1570
-	ldr	r2, [r7]
-	movs	r1, #1
-	ldr	r3, [r4]
-	ldr	r6, [r2, #24]
-	ldr	r2, [r3, #12]
-	ldr	r5, [r3, #24]
-	ldrb	r0, [r3, #44]	@ zero_extendqisi2
-	ubfx	r6, r6, #0, #21
-	str	r2, [sp, #8]
-	movs	r2, #17
-	ldr	r3, [r3, #4]
-	ubfx	r8, r5, #0, #21
-	ubfx	r5, r5, #21, #3
-	str	r8, [sp]
+	str	r3, [sp, #24]
+	bl	gc_add_sblk
+	ldr	r0, .L1553+36
+	movs	r2, #1
+	add	r7, r7, r2
+	ldr	r3, [sp, #24]
+	strh	r2, [r0, #314]	@ movhi
+	ldr	r2, .L1553+24
+	ldr	r2, [r2]
+	tst	r2, #1024
+	beq	.L1468
+	ldr	r2, .L1553+12
+	ldr	r1, [r3, r6]
+	ldr	r2, [r2]
+	ubfx	r1, r1, #11, #8
+	ldrh	ip, [r2, r5, lsl #1]
+	ldr	r2, .L1553+8
+	ldr	r2, [r2]
+	add	r2, r2, r6
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrh	r1, [r3, r6]
+	lsrs	r2, r2, #5
+	ubfx	r1, r1, #0, #11
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r0, #52]
+	ldr	r0, .L1553+40
+	str	r3, [sp]
+	mov	r3, ip
+.L1549:
+	bl	printf
+.L1468:
+	cmp	r7, #4
+	bhi	.L1471
+	cmp	r8, #4
+	bhi	.L1471
+.L1464:
+	add	r10, r10, #1
+	uxth	r10, r10
+	b	.L1462
+.L1465:
+	cmp	r2, #2
+	b	.L1548
+.L1554:
+	.align	2
+.L1553:
+	.word	.LANCHOR102
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR10
+	.word	.LANCHOR14
+	.word	.LC79
+	.word	.LANCHOR144
+	.word	.LANCHOR63
+	.word	.LC86
+.L1467:
+	ldr	r0, .L1555
+	ldr	r2, [sp, #16]
+	ldrh	r0, [r0]
+	subs	r2, r2, r4
+	cmp	r2, r0
+	ble	.L1468
+	ldrh	r2, [r3, r6]
+	add	r0, r4, #8
+	ubfx	r2, r2, #0, #11
+	cmp	r2, r0
+	ble	.L1470
+	cmp	r1, #0
+	beq	.L1468
+	ldr	r2, [r3, r6]
+	add	r1, fp, #4
+	ubfx	r2, r2, #11, #8
+	cmp	r2, r1
+	bgt	.L1468
+.L1470:
+	movs	r2, #1
+	movs	r1, #0
+	mov	r0, r5
+	str	r3, [sp, #24]
+	bl	gc_add_sblk
+	ldr	r0, .L1555+4
+	movs	r2, #1
+	add	r8, r8, r2
+	ldr	r3, [sp, #24]
+	strh	r2, [r0, #314]	@ movhi
+	ldr	r2, .L1555+8
+	ldr	r2, [r2]
+	tst	r2, #1024
+	beq	.L1468
+	ldr	r2, .L1555+12
+	ldr	r1, [r3, r6]
+	ldr	r2, [r2]
+	ubfx	r1, r1, #11, #8
+	ldrh	ip, [r2, r5, lsl #1]
+	ldr	r2, .L1555+16
+	ldr	r2, [r2]
+	add	r2, r2, r6
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrh	r1, [r3, r6]
+	lsrs	r2, r2, #5
+	ubfx	r1, r1, #0, #11
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r0, #52]
+	ldr	r0, .L1555+20
+	str	r3, [sp]
+	mov	r3, ip
+	b	.L1549
+.L1488:
+	mov	r8, #0
+	mov	r7, r8
+	b	.L1461
+.L1477:
+	ldr	r0, [r3]
+	ubfx	r5, r0, #11, #8
+	cmp	fp, r5
+	bhi	.L1476
+	ldrb	ip, [r3, #2]	@ zero_extendqisi2
+	tst	ip, #24
+	ittt	ne
+	subne	r5, r5, fp
+	bfine	r0, r5, #11, #8
+	strne	r0, [r3]
+.L1476:
+	adds	r2, r2, #1
+	adds	r3, r3, #4
+	uxth	r2, r2
+	b	.L1475
+.L1483:
+	ldrh	r0, [r3]
+	ubfx	r5, r0, #0, #11
+	cmp	r5, r4
+	blt	.L1482
+	ldrb	r6, [r3, #2]	@ zero_extendqisi2
+	and	r6, r6, #24
+	cmp	r6, #16
+	ittt	ne
+	subne	r5, r5, r4
+	bfine	r0, r5, #0, #11
+	strhne	r0, [r3]	@ movhi
+.L1482:
+	adds	r2, r2, #1
+	adds	r3, r3, #4
+	uxth	r2, r2
+	b	.L1481
+.L1487:
+	mov	r8, #0
+	mov	r7, r8
+	b	.L1437
+.L1556:
+	.align	2
+.L1555:
+	.word	.LANCHOR145
+	.word	.LANCHOR63
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR7
+	.word	.LC87
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.zftl_sblk_list_init,"ax",%progbits
+	.align	1
+	.global	zftl_sblk_list_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sblk_list_init, %function
+zftl_sblk_list_init:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #6
+	ldr	r8, .L1585+76
+	sub	sp, sp, #24
+	movs	r1, #0
+	movs	r4, #0
+	ldr	fp, .L1585+80
+	ldrh	r3, [r8]
+	ldr	r5, .L1585
+	ldr	r0, [fp]
+	ldr	r10, .L1585+64
+	muls	r2, r3, r2
+	ldr	r7, .L1585+4
+	ldr	r6, .L1585+8
+	bl	ftl_memset
+	ldr	r3, .L1585+12
+	movs	r2, #16
+	ldr	r1, .L1585+16
+	mov	r0, #32768
+	strh	r4, [r10]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L1585+20
+	ldrh	r1, [r1]
+	strh	r4, [r7]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L1585+24
+	strh	r4, [r6]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L1585+28
+	str	r4, [r3]
+	ldr	r3, .L1585+32
+	str	r4, [r3]
+	ldr	r3, .L1585+36
+	str	r4, [r3]
+	ldr	r3, .L1585+40
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L1585+44
+	ldr	r3, .L1585+48
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L1585+52
+	strh	r4, [r3]	@ movhi
 	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r7]
-	movs	r1, #1
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
+	strh	r4, [r2]	@ movhi
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r1, r2, r1
+	bl	__aeabi_idiv
+	ldr	r2, .L1585+56
+	sxth	r3, r0
+	str	fp, [sp, #12]
+	mov	fp, r10
+	str	r3, [sp]
+	ldr	r1, [r2]
+	ldr	r3, [sp, #4]
+	ldr	r10, .L1585+84
+	strh	r4, [r1, #146]	@ movhi
+	ldrsh	r4, [r1, #134]
+	str	r8, [sp, #8]
+	mov	r8, r3
+	str	r2, [sp, #16]
+	str	r5, [sp, #20]
+.L1558:
+	ldr	r3, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	blt	.L1574
+	ldr	r3, [sp, #16]
+	ldrh	r2, [r8]
+	ldr	r3, [r3]
+	strh	r2, [r3, #114]	@ movhi
+	ldrh	r2, [r7]
+	strh	r2, [r3, #118]	@ movhi
+	ldrh	r2, [r6]
+	strh	r2, [r3, #116]	@ movhi
+	ldrh	r2, [fp]
+	strh	r2, [r3, #122]	@ movhi
+	ldr	r2, .L1585+44
+	ldrh	r2, [r2]
+	strh	r2, [r3, #120]	@ movhi
+	ldr	r2, .L1585+52
+	ldrh	r2, [r2]
+	strh	r2, [r3, #124]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1574:
+	ldr	r5, [r10]
+	add	r5, r5, r4, lsl #2
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L1575
+	ldr	r3, [sp, #20]
+	ldrb	lr, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1585+56
+	ldr	ip, [r3]
+	ldr	r3, .L1585+16
+	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldm	r4, {r2, r3}
-	mov	r1, r10
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #17
-	ldr	r3, [r3, #4]
-	str	r8, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r7, #4]
-	mov	r1, r10
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #26
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r4, #8]
-	movs	r1, #3
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #17
-	ldr	r3, [r3, #4]
-	str	r8, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	r3, [r7, #8]
-	movs	r1, #3
-	ldr	r2, [r4]
-	ldrb	r0, [r2, #44]	@ zero_extendqisi2
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	movs	r2, #16
-	ldr	r3, [r3, #4]
-	str	r6, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r5
-	bl	flash_start_tlc_page_prog
-	ldr	r1, [r4]
-	movs	r3, #5
-	ldr	r0, .L1572
-	strb	r3, [r1, #42]
-	movs	r3, #1
-	strb	r3, [r1, #43]
-	movs	r3, #255
-	strb	r3, [r1]
-	bl	buf_add_tail
-.L1571:
-	movs	r0, #0
-	add	sp, sp, #20
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
+	movs	r3, #0
+	mov	r1, r3
+.L1560:
+	cmp	r3, lr
+	blt	.L1563
+	cmp	r1, #0
+	beq	.L1564
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	adds	r1, r0, #1
+	sxth	r1, r1
+.L1559:
+	ldr	r3, [sp, #12]
+	lsls	r0, r4, #1
+	adds	r2, r0, r4
+	ldr	r3, [r3]
+	add	ip, r3, r2, lsl #1
+	strh	r1, [ip, #4]	@ movhi
+	movw	r1, #65535
+	strh	r1, [ip, #2]	@ movhi
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrb	r1, [r5, #2]	@ zero_extendqisi2
+	and	r3, r1, #224
+	cmp	r3, #32
+	beq	.L1565
+	cmp	r3, #224
+	beq	.L1565
+	ldr	r2, .L1585+60
+	ldr	r2, [r2]
+	ldrh	ip, [r2, #16]
+	cmp	r4, ip
+	beq	.L1565
+	ldrh	ip, [r2, #48]
+	cmp	r4, ip
+	beq	.L1565
+	ldrh	r2, [r2, #80]
+	cmp	r4, r2
+	beq	.L1565
+	cmp	r3, #64
+	bne	.L1566
+	ldr	r2, .L1585+64
+	uxth	r1, r4
+	ldr	r0, .L1585+32
+.L1583:
+	bl	_insert_data_list
+.L1565:
+	adds	r4, r4, #1
+	sxth	r4, r4
+	b	.L1558
+.L1563:
+	asr	r2, r0, r3
+	adds	r3, r3, #1
+	lsls	r2, r2, #31
+	itete	mi
+	ldrhmi	r2, [ip, #146]
+	ldrpl	r2, [sp, #4]
+	addmi	r2, r2, #1
+	addpl	r1, r1, r2
+	ite	mi
+	strhmi	r2, [ip, #146]	@ movhi
+	sxthpl	r1, r1
+	b	.L1560
+.L1564:
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	movw	r2, #65535
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+	ldr	r3, .L1585+68
+	ldr	r3, [r3]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	b	.L1559
+.L1575:
+	ldr	r1, [sp]
+	b	.L1559
+.L1566:
+	cmp	r3, #96
+	bne	.L1567
+	ldr	r2, .L1585+52
+	uxth	r1, r4
+	ldr	r0, .L1585+28
+	b	.L1583
+.L1567:
+	cmp	r3, #160
+	bne	.L1568
+	ldr	r2, .L1585+44
+	uxth	r1, r4
+	ldr	r0, .L1585+36
+	b	.L1583
+.L1568:
+	cmp	r3, #0
+	bne	.L1565
+	ldr	r3, .L1585+68
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0]
+	cbz	r2, .L1569
+	mov	r1, r4
+	ldr	r0, .L1585+72
+	bl	printf
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	movs	r1, #1
+	uxth	r0, r4
+	lsls	r2, r3, #27
+	ite	mi
+	movmi	r2, #5
+	movpl	r2, #2
+	bfi	r3, r2, #5, #3
+	movs	r2, #0
+	strb	r3, [r5, #2]
+	bl	gc_add_sblk
+	b	.L1565
 .L1569:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1568
-.L1570:
-	mov	r0, r4
-	bl	queue_tlc_prog_cmd
-	b	.L1571
-.L1573:
-	.align	2
+	ands	r3, r1, #24
+	uxth	r1, r4
+	bne	.L1572
+	ldr	r2, .L1585+48
+	ldr	r0, .L1585+12
+.L1584:
+	bl	_insert_free_list
+	b	.L1565
 .L1572:
-	.word	.LANCHOR90
-	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.flash_start_page_prog,"ax",%progbits
-	.align	1
-	.global	flash_start_page_prog
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r2
-	ldr	r2, .L1585
-	mov	r10, r3
-	ubfx	r3, r1, #21, #3
-	mov	r7, r0
-	mov	fp, r1
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1575
-	mov	r2, #692
-	ldr	r1, .L1585+4
-	ldr	r0, .L1585+8
-	bl	printf
-.L1576:
-	b	.L1576
-.L1575:
-	ldr	r2, .L1585+12
-	ubfx	r4, r1, #0, #21
-	ldrb	r6, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1585+16
-	mov	r0, r6
-	ldr	r5, [r3]
-	bl	hynix_reconfig_rr_para
-	mov	r0, r6
-	bl	nandc_cs
-	tst	fp, #50331648
-	bne	.L1577
-	ldr	r3, .L1585+20
-	ldr	r2, .L1585+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1578
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	cbz	r3, .L1579
-.L1578:
-	ldr	r3, .L1585+28
-	mov	r0, r4
-	str	r2, [sp, #4]
-	ldrh	fp, [r3]
-	mov	r1, fp
-	bl	__aeabi_uidiv
-	mul	r3, fp, r0
-	mov	r1, fp
-	mov	r0, r4
-	str	r3, [sp]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L1580
-	add	r4, r3, r1, lsl #1
-.L1579:
-	mov	r0, r6
-	bl	flash_enter_slc_mode
-	b	.L1581
-.L1580:
-	ldr	r2, .L1585+32
-	ldrh	r4, [r2, r1, lsl #1]
-	add	r4, r4, r3
-.L1581:
-	add	r5, r5, r6, lsl #8
-	movs	r3, #128
-	mov	r0, r4
-	str	r3, [r5, #2056]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
-	uxtb	r3, r4
-	str	r3, [r5, #2052]
-	lsrs	r3, r4, #8
-	str	r3, [r5, #2052]
-	lsrs	r3, r4, #16
-	str	r3, [r5, #2052]
-	bl	nandc_set_seed
-	ldr	r1, .L1585+36
-	mov	r3, r10
-	mov	r2, r8
-	movs	r0, #1
-	ldrb	r1, [r1, #9]	@ zero_extendqisi2
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	r7, [r5, #2056]
-	mov	r0, r6
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	nandc_de_cs
-.L1577:
-	mov	r0, r6
-	bl	flash_exit_slc_mode
-	b	.L1581
+	cmp	r3, #16
+	ittee	eq
+	ldreq	r2, .L1585+4
+	ldreq	r0, .L1585+20
+	ldrne	r2, .L1585+8
+	ldrne	r0, .L1585+24
+	b	.L1584
 .L1586:
 	.align	2
 .L1585:
-	.word	.LANCHOR8
-	.word	.LANCHOR125
-	.word	.LC0
+	.word	.LANCHOR78
+	.word	.LANCHOR97
+	.word	.LANCHOR99
+	.word	.LANCHOR96
+	.word	.LANCHOR77
+	.word	.LANCHOR98
+	.word	.LANCHOR100
+	.word	.LANCHOR81
+	.word	.LANCHOR12
+	.word	.LANCHOR80
+	.word	.LANCHOR101
+	.word	.LANCHOR92
+	.word	.LANCHOR95
+	.word	.LANCHOR88
+	.word	.LANCHOR102
 	.word	.LANCHOR10
+	.word	.LANCHOR90
+	.word	.LANCHOR9
+	.word	.LC88
 	.word	.LANCHOR6
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.word	.LANCHOR19
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",%progbits
+	.word	.LANCHOR4
+	.word	.LANCHOR7
+	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",%progbits
 	.align	1
+	.global	ftl_open_sblk_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
-	ldr	r3, [r0, #12]
-	ldr	r2, [r0, #4]
-	ldr	r1, [r0, #24]
-	movs	r0, #16
-	bl	flash_start_page_prog
-	ldr	r3, .L1595
-	ldr	r2, [r4, #24]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L1588
-	ldr	r6, .L1595+4
-	ubfx	r2, r2, #21, #3
-	movs	r5, #48
-	mov	r7, r6
-.L1590:
-	mla	r1, r5, r3, r6
-	ldr	r0, [r1, #24]
-	ubfx	r0, r0, #21, #3
-	cmp	r2, r0
-	bne	.L1589
-	add	r0, r1, #42
-	ldrb	r1, [r1, #42]	@ zero_extendqisi2
-	cmp	r1, #6
-	bne	.L1589
-	movs	r3, #3
-	strb	r3, [r0]
+	ldr	r8, .L1593+12
+	mov	r6, r1
+	movs	r7, #0
 .L1588:
-	movs	r3, #3
-	mov	r1, r4
-	strb	r3, [r4, #42]
-	movs	r3, #1
-	strb	r3, [r4, #43]
-	movs	r3, #255
-	strb	r3, [r4]
-	ldr	r0, .L1595
-	pop	{r3, r4, r5, r6, r7, lr}
-	b	buf_add_tail
-.L1589:
-	muls	r3, r5, r3
-	ldrb	r3, [r7, r3]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L1590
-	b	.L1588
-.L1596:
+.L1591:
+	mov	r0, r6
+	ldr	r10, .L1593+16
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r5, r0
+	bl	ftl_erase_sblk
+	add	r1, r4, #16
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r1, .L1593
+	cmp	r6, #2
+	ldrh	r2, [r8]
+	uxtb	r0, r0
+	strh	r5, [r4]	@ movhi
+	ite	eq
+	moveq	r3, #0
+	ldrbne	r3, [r1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
+	smulbb	r0, r0, r2
+	strh	r7, [r4, #2]	@ movhi
+	it	ne
+	smulbbne	r3, r3, r2
+	strb	r7, [r4, #5]
+	mul	r2, r2, r1
+	ldr	r1, .L1593+4
+	strh	r0, [r4, #6]	@ movhi
+	it	ne
+	uxthne	r3, r3
+	strh	r7, [r4, #10]	@ movhi
+	ldr	r0, [r1]
+	movs	r1, #255
+	strh	r3, [r4, #12]	@ movhi
+	lsls	r2, r2, #2
+	strb	r6, [r4, #4]
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r2, [r4, #6]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cbnz	r3, .L1587
+	mov	r1, r5
+	ldr	r0, .L1593+8
+	bl	printf
+	ldr	r3, [r10]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	movs	r3, #7
+	strb	r3, [r4, #4]
+	b	.L1591
+.L1587:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1594:
 	.align	2
-.L1595:
-	.word	.LANCHOR90
-	.word	.LANCHOR36
-	.size	queue_prog_cmd, .-queue_prog_cmd
-	.section	.text.sblk_prog_page,"ax",%progbits
+.L1593:
+	.word	.LANCHOR78
+	.word	.LANCHOR109
+	.word	.LC76
+	.word	.LANCHOR85
+	.word	.LANCHOR9
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",%progbits
 	.align	1
-	.global	sblk_prog_page
+	.global	pm_free_sblk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sblk_prog_page, %function
-sblk_prog_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	@ args = 0, pretend = 0, frame = 280
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0, #34]
+	ldr	r3, .L1613
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	mov	r5, r1
-	cbz	r3, .L1598
-	ldr	r3, .L1620
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L1598
-	mov	r2, r1
-	ldr	r1, [r0, #24]
-	ldr	r0, .L1620+4
+	sub	sp, sp, #288
+	ldrh	r2, [r3]
+	str	r3, [sp, #12]
+	cmp	r2, #128
+	bls	.L1596
+	movs	r2, #78
+	ldr	r1, .L1613+4
+	ldr	r0, .L1613+8
 	bl	printf
-.L1598:
-	movs	r6, #0
-.L1599:
-	cbnz	r5, .L1610
-	mov	r0, r5
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1610:
-	ldrb	r7, [r4]	@ zero_extendqisi2
-	ldr	r10, [r4, #24]
-.L1600:
-	movs	r1, #1
-	mov	r0, r10
-	bl	queue_lun_state
+.L1596:
+	mov	r2, #256
+	movs	r1, #0
+	add	r0, sp, #32
+	movs	r4, #1
+	bl	ftl_memset
+	ldr	r3, .L1613+12
+	add	r10, sp, #32
+	ldr	r0, .L1613+16
+	ldr	r5, [sp, #12]
+	ldrh	r7, [r3]
+	ldr	r6, [r0]
 	mov	fp, r0
-	cbnz	r0, .L1601
-	cmp	r5, #1
-	beq	.L1602
-	ldr	r3, .L1620+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1603
+	ldr	r1, .L1613+20
+	rsb	r3, r7, #21
+	ldrh	r5, [r5]
+	lsls	r4, r4, r3
+	ldrh	r2, [r6, #698]
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	add	r8, r6, #704
+	str	r5, [sp, #16]
+	subs	r4, r4, #1
+	movs	r5, #0
+	str	r1, [sp, #20]
+.L1597:
+	uxth	r1, r5
+	cmp	r2, r1
+	bhi	.L1601
+	ldr	r3, .L1613+24
+	movs	r5, #0
+	ldr	r6, .L1613+28
+	str	r5, [sp, #8]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	str	r3, [sp, #16]
+	smulbb	r4, r4, r2
+	uxth	r4, r4
 .L1602:
-	mov	r0, r4
-	bl	queue_prog_cmd
-.L1604:
-	ldr	r3, .L1620+12
-	add	r7, r7, r7, lsl #1
-	subs	r5, r5, #1
-	add	r4, r3, r7, lsl #4
-	b	.L1599
+	ldr	r3, [sp, #12]
+	uxth	r2, r5
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bhi	.L1608
+	ldr	r0, [sp, #8]
+	add	sp, sp, #288
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1601:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1600
+	ldr	r0, [r8], #4
+	mov	r1, r3
+	str	r2, [sp, #28]
+	str	r3, [sp, #24]
+	lsrs	r0, r0, r7
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	ldr	r2, [sp, #28]
+	add	lr, r6, #416
+	str	r3, [sp, #8]
+	movs	r1, #0
+	ldr	r3, [sp, #24]
+.L1598:
+	ldr	r0, [sp, #16]
+	uxth	ip, r1
+	cmp	r0, ip
+	bhi	.L1600
+	adds	r5, r5, #1
+	b	.L1597
+.L1600:
+	ldrh	ip, [lr], #2
+	ldr	r0, [sp, #8]
+	cmp	r0, ip
+	ittt	eq
+	ldrheq	ip, [r10, r1, lsl #1]
+	addeq	ip, ip, #1
+	strheq	ip, [r10, r1, lsl #1]	@ movhi
+	adds	r1, r1, #1
+	b	.L1598
+.L1608:
+	ldr	r3, [fp]
+	uxth	r7, r5
+	str	r2, [sp, #28]
+	add	r8, r7, #208
+	ldr	r2, [sp, #20]
+	ldrh	r10, [r3, r8, lsl #1]
+	ldrh	r0, [r3, #692]
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	str	r3, [sp, #24]
+	bl	__aeabi_idiv
+	cmp	r0, r10
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #28]
+	bne	.L1603
+	ldr	r1, [sp, #16]
+	ldrh	r0, [r6]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	smulbb	r1, r1, r0
+	add	r0, sp, #32
+	strh	r1, [r0, r7, lsl #1]	@ movhi
 .L1603:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ubfx	r2, r10, #21, #3
-	cmp	r3, #255
-	bne	.L1605
-	mov	r2, #478
-	ldr	r1, .L1620+16
-	ldr	r0, .L1620+20
-	bl	printf
+	add	r1, sp, #32
+	ldrh	r1, [r1, r7, lsl #1]
+	cmp	r4, r1
+	bls	.L1604
+	cbnz	r1, .L1609
 .L1606:
-	b	.L1606
-.L1605:
-	ldr	r0, .L1620+12
-	movs	r1, #48
-	mla	r3, r1, r3, r0
-	ldr	ip, [r3, #24]
-	ubfx	r3, ip, #21, #3
-	cmp	r2, r3
-	bne	.L1607
-	ldr	r3, .L1620+24
-	mov	r8, #1
-	ldrh	r1, [r3]
-	ldr	r3, .L1620+28
-	lsl	r2, r8, r1
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	rsb	r3, r1, #21
-	lsl	r3, r8, r3
-	subs	r2, r2, #1
-	uxth	r2, r2
-	subs	r0, r0, #1
-	subs	r3, r3, #1
-	ands	r3, r3, r0
-	and	lr, r2, r10
-	uxth	r3, r3
-	lsr	r10, r10, r1
-	lsr	r1, ip, r1
-	and	r10, r3, r10
-	ands	r1, r1, r3
-	and	r2, r2, ip
-	cmp	r10, r1
-	beq	.L1608
-	cmp	lr, r2
-	bne	.L1608
-	cmp	r6, r0
-	beq	.L1607
-	ldr	r3, [r4, #12]
-	movs	r0, #17
-	ldr	r2, [r4, #4]
-	add	r6, r6, r8
-	ldr	r1, [r4, #24]
-	bl	flash_start_page_prog
-	movs	r3, #8
-	strb	r8, [r4, #43]
-	strb	r3, [r4, #42]
-	movs	r3, #255
-	strb	r3, [r4]
-	mov	r1, r4
-	ldr	r0, .L1620+32
-	bl	buf_add_tail
-	b	.L1604
-.L1608:
-	mov	r0, r4
-	movs	r6, #0
-	bl	queue_prog_cmd
-	b	.L1604
+	movw	r2, #65535
+	cmp	r10, r2
+	beq	.L1605
+	ldr	r2, .L1613+32
+	ldr	r2, [r2]
+	lsls	r2, r2, #19
+	bpl	.L1607
+	ldrh	r3, [r3, #688]
+	movs	r2, #0
+	mov	r1, r7
+	ldr	r0, .L1613+36
+	str	r3, [sp]
+	mov	r3, r10
+	bl	printf
 .L1607:
-	mov	r0, r4
-	mov	r6, fp
-	bl	queue_prog_cmd
-	b	.L1604
-.L1621:
+	ldr	r3, [fp]
+	ldrh	r0, [r3, r8, lsl #1]
+	bl	ftl_free_sblk
+	ldr	r3, [fp]
+	movw	r2, #65535
+	strh	r2, [r3, r8, lsl #1]	@ movhi
+	ldrh	r2, [r3, #688]
+	subs	r2, r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	b	.L1605
+.L1604:
+	cmp	r1, #0
+	beq	.L1606
+.L1605:
+	adds	r5, r5, #1
+	b	.L1602
+.L1609:
+	str	r2, [sp, #8]
+	mov	r4, r1
+	b	.L1605
+.L1614:
 	.align	2
-.L1620:
-	.word	.LANCHOR22
-	.word	.LC58
-	.word	.LANCHOR23
-	.word	.LANCHOR36
-	.word	.LANCHOR126
+.L1613:
+	.word	.LANCHOR146
+	.word	.LANCHOR147
 	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR90
-	.size	sblk_prog_page, .-sblk_prog_page
-	.section	.text.ftl_flush,"ax",%progbits
+	.word	.LANCHOR66
+	.word	.LANCHOR102
+	.word	.LANCHOR67
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR14
+	.word	.LC89
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	ftl_flush
+	.global	ftl_memcpy
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_flush, %function
-ftl_flush:
+	.type	ftl_memcpy, %function
+ftl_memcpy:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L1627
-	ldr	r5, .L1627+4
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	cbz	r1, .L1623
-	ldrb	r0, [r5]	@ zero_extendqisi2
-	ldr	r3, .L1627+8
-	add	r0, r0, r0, lsl #1
-	add	r0, r3, r0, lsl #4
-	bl	sblk_prog_page
-.L1623:
-	movs	r3, #255
-	strb	r3, [r5]
-	movs	r3, #0
-	strb	r3, [r4]
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	movw	r0, #65535
-	pop	{r3, r4, r5, lr}
-	b	ftl_vpn_decrement
-.L1628:
-	.align	2
-.L1627:
-	.word	.LANCHOR89
-	.word	.LANCHOR127
-	.word	.LANCHOR36
-	.size	ftl_flush, .-ftl_flush
-	.section	.text.flash_prog_page_en,"ax",%progbits
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_info_data_init,"ax",%progbits
 	.align	1
-	.global	flash_prog_page_en
+	.global	flash_info_data_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flash_prog_page_en, %function
-flash_prog_page_en:
-	@ args = 8, pretend = 0, frame = 8
+	.type	flash_info_data_init, %function
+flash_info_data_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r3
-	ldr	r3, .L1658
-	mov	r7, r0
-	mov	r5, r1
-	mov	r10, r2
-	ldrb	r6, [sp, #52]	@ zero_extendqisi2
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L1630
-	mov	r2, #480
-	ldr	r1, .L1658+4
-	ldr	r0, .L1658+8
-	bl	printf
-.L1631:
-	b	.L1631
-.L1630:
-	ldr	r3, .L1658+12
-	tst	r1, #50331648
-	ldrb	fp, [r3, r0]	@ zero_extendqisi2
-	bne	.L1642
-	ldr	r3, .L1658+16
-	ldr	r2, .L1658+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1633
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1642
-.L1633:
-	ldr	r3, .L1658+24
-	mov	r0, r5
-	str	r2, [sp, #12]
-	ldrh	r4, [r3]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	mul	r3, r4, r0
-	mov	r1, r4
-	mov	r0, r5
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #8]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L1634
-	add	r4, r3, r1, lsl #1
-.L1632:
-	ldr	r3, .L1658+28
-	ldr	r3, [r3]
-	lsls	r2, r3, #27
-	bpl	.L1635
-	mov	r2, r5
-	mov	r1, fp
-	ldr	r0, .L1658+32
-	bl	printf
-.L1635:
-	ldr	r3, [sp, #48]
-	mov	r0, fp
-	mov	r2, r10
-	mov	r1, r4
-	str	r3, [sp]
-	mov	r3, r8
-	bl	flash_prog_page
-	mov	fp, r0
-	cmp	r6, #0
-	beq	.L1636
-	ldr	r3, [sp, #48]
-	mov	r1, r5
-	ldr	r6, .L1658+36
-	mov	r0, r7
-	ldr	r4, .L1658+40
-	str	r3, [sp]
-	ldr	r3, [r6]
-	ldr	r2, [r4]
-	bl	flash_read_page_en
-	adds	r3, r0, #1
-	beq	.L1637
-	cmp	r0, #512
-	beq	.L1637
-	ldr	r3, [r4]
-	ldr	r2, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bne	.L1637
-	ldr	r3, [r6]
-	ldr	r2, [r8]
+	ldr	r3, .L1621
+	push	{r4, lr}
 	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1636
-.L1637:
-	movs	r3, #4
-	ldr	r1, [r6]
-	mov	r2, r3
-	ldr	r0, .L1658+44
-	bl	rknand_print_hex
-	movs	r3, #4
-	ldr	r1, [r4]
-	mov	r2, r3
-	ldr	r0, .L1658+48
-	bl	rknand_print_hex
-.L1638:
-	mov	r1, r5
-	ldr	r0, .L1658+52
-	bl	printf
-	mov	r2, #506
-	ldr	r1, .L1658+4
-	ldr	r0, .L1658+8
+	lsls	r3, r3, #19
+	bpl	.L1617
+	ldr	r2, .L1621+4
+	movs	r1, #105
+	ldr	r0, .L1621+8
 	bl	printf
-.L1640:
-	b	.L1640
-.L1634:
-	ldr	r2, .L1658+56
-	ldrh	r4, [r2, r1, lsl #1]
-	add	r4, r4, r3
-	b	.L1632
-.L1642:
-	mov	r4, r5
-	b	.L1632
-.L1636:
-	cmp	fp, #-1
-	beq	.L1638
-	mov	r0, fp
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1659:
+.L1617:
+	ldr	r4, .L1621+12
+	mov	r2, #2048
+	movs	r1, #0
+	ldr	r0, [r4]
+	bl	ftl_memset
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r3, .L1621+16
+	ldr	r1, .L1621+20
+	adds	r0, r0, #80
+	str	r3, [r0, #-80]
+	mov	r3, #2032
+	str	r3, [r0, #-72]
+	movs	r3, #1
+	strh	r3, [r0, #-64]	@ movhi
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1621+24
+	pop	{r4, lr}
+	adds	r0, r0, #48
+	b	ftl_memcpy
+.L1622:
 	.align	2
-.L1658:
-	.word	.LANCHOR8
-	.word	.LANCHOR128
-	.word	.LC0
-	.word	.LANCHOR10
-	.word	.LANCHOR11
-	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR22
-	.word	.LC59
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LC60
-	.word	.LC61
-	.word	.LC62
+.L1621:
 	.word	.LANCHOR14
-	.size	flash_prog_page_en, .-flash_prog_page_en
-	.section	.text.ftl_test_block,"ax",%progbits
+	.word	.LANCHOR148
+	.word	.LC90
+	.word	.LANCHOR27
+	.word	1398362953
+	.word	.LANCHOR20
+	.word	.LANCHOR31
+	.size	flash_info_data_init, .-flash_info_data_init
+	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
-	.global	ftl_test_block
+	.global	ftl_memcpy32
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_test_block, %function
-ftl_test_block:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r3, .L1677
-	mov	r10, r0
-	ldr	fp, .L1677+32
-	str	r5, [r3]
-	ldr	r3, .L1677+4
-	str	r5, [r3]
-.L1661:
-	uxth	r3, r5
-	str	r3, [sp, #12]
-	ldr	r3, .L1677+8
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	movs	r3, #0
+	push	{r4, lr}
+.L1624:
 	cmp	r3, r2
-	bls	.L1668
-	mov	r8, #0
-	b	.L1669
-.L1667:
-	ldr	r3, .L1677+12
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L1662
-	mov	r1, r10
-	ldr	r0, .L1677+16
-	bl	printf
-.L1662:
-	ldrb	r4, [fp]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	smulbb	r4, r4, r10
-	add	r4, r4, r6
-	uxth	r4, r4
-	cbnz	r3, .L1663
-	ldr	r3, .L1677+20
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #47]	@ zero_extendqisi2
-	cmp	r3, r4
-	bcs	.L1664
-.L1663:
-	uxtb	r6, r5
-	mov	r1, r4
-	mov	r0, r6
-	bl	flash_check_bad_block
-	cbnz	r0, .L1664
-	ldr	r3, .L1677+24
-	mov	r0, r6
-	ldrh	r7, [r3]
-	muls	r7, r4, r7
-	mov	r1, r7
-	bl	flash_erase_block
-	cbz	r0, .L1666
-.L1676:
-	mov	r1, r4
-	mov	r0, r6
-	bl	flash_mask_bad_block
-	b	.L1664
-.L1666:
-	movs	r3, #1
-	ldr	r2, .L1677
-	str	r3, [sp, #4]
-	mov	r1, r7
-	ldr	r3, .L1677+28
-	mov	r0, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L1677+4
-	bl	flash_prog_page_en
-	cmp	r0, #0
-	bne	.L1676
-.L1664:
-	add	r8, r8, #1
-.L1669:
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	uxth	r6, r8
-	cmp	r3, r6
-	bhi	.L1667
-	adds	r5, r5, #1
-	b	.L1661
-.L1668:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1678:
-	.align	2
-.L1677:
-	.word	ftl_tmp_buffer
-	.word	.LANCHOR121
-	.word	.LANCHOR76
-	.word	.LANCHOR22
-	.word	.LC63
-	.word	.LANCHOR5
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LANCHOR70
-	.size	ftl_test_block, .-ftl_test_block
-	.section	.text.ftl_prog_page,"ax",%progbits
+	bne	.L1625
+	pop	{r4, pc}
+.L1625:
+	ldr	r4, [r1, r3, lsl #2]
+	str	r4, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	b	.L1624
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	ftl_prog_page
+	.global	ftl_memcmp
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_prog_page, %function
-ftl_prog_page:
-	@ args = 4, pretend = 0, frame = 0
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r7, r3
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	bl	sblk_wait_write_queue_completed
-	movs	r3, #1
-	mov	r2, r6
-	str	r3, [sp, #4]
-	mov	r1, r5
-	ldr	r3, [sp, #32]
-	mov	r0, r4
-	str	r3, [sp]
-	mov	r3, r7
-	bl	flash_prog_page_en
-	adds	r3, r0, #1
-	bne	.L1679
-	movw	r2, #1414
-	ldr	r1, .L1682
-	ldr	r0, .L1682+4
-	bl	printf
-.L1681:
-	b	.L1681
-.L1679:
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.L1683:
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L1628
+	bx	lr
+.L1629:
 	.align	2
-.L1682:
-	.word	.LANCHOR129
-	.word	.LC0
-	.size	ftl_prog_page, .-ftl_prog_page
-	.section	.text.ftl_info_flush,"ax",%progbits
+.L1628:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	ftl_info_flush
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_flush, %function
-ftl_info_flush:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, #0
-	ldr	r4, .L1721
-	movs	r1, #0
-	ldr	r6, .L1721+4
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	mov	fp, r4
-	str	r0, [sp, #12]
-	mov	r4, r6
-	ldr	r0, .L1721+8
-	lsls	r2, r2, #1
-	bl	ftl_memset
-.L1685:
-	ldr	r7, .L1721+12
-	ldr	r1, [sp, #12]
-	ldrb	r10, [r6]	@ zero_extendqisi2
-	ldrh	r3, [r7]
-	ldrh	r5, [r6, #2]
-	str	r3, [sp, #8]
-	ldr	r3, .L1721+16
-	ldr	r2, [r3]
-	ldr	r3, [r2, #4]
-	adds	r3, r3, #1
-	str	r3, [r2, #4]
-	ldr	r2, .L1721+8
-	stm	r2, {r1, r3}
-	ldr	r2, .L1721+20
-	ldr	r2, [r2]
-	lsls	r2, r2, #19
-	bpl	.L1686
-	mov	r2, r5
-	mov	r1, r10
-	ldr	r0, .L1721+24
-	bl	printf
-.L1686:
-	ldr	r3, .L1721+28
-	ldrh	r0, [r4, #2]
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L1687
-	ldr	r2, .L1721+32
-	movs	r0, #0
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r5, [r2]
-	ldrb	r2, [r4]	@ zero_extendqisi2
-.L1694:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #7
-	bls	.L1688
-	add	lr, r5, #40
+	@ link register save eliminated.
 	movs	r1, #0
-.L1693:
-	ldrb	r8, [lr], #1	@ zero_extendqisi2
-	uxth	ip, r1
-	cmp	r8, #128
-	bls	.L1689
-	cmp	r8, #255
-	beq	.L1690
-	strb	r3, [r4, #1]
-	cbz	r0, .L1691
-	strb	r2, [r4]
-.L1691:
-	movs	r2, #156
-	ldr	r1, .L1721+36
-	ldr	r0, .L1721+40
-	bl	printf
-.L1692:
-	b	.L1692
-.L1690:
-	adds	r1, r1, #1
-	cmp	r1, #8
-	bne	.L1693
-	mov	ip, r1
-.L1689:
-	uxtb	r3, ip
-	mov	r8, #1
-.L1688:
-	adds	r2, r5, r3
-	ldrb	r2, [r2, #40]	@ zero_extendqisi2
-	movs	r0, #1
-	cmp	r2, #255
-	beq	.L1694
-	ldrh	r5, [r7]
-	movs	r0, #0
-	strb	r3, [r4, #1]
-	strb	r2, [r4]
-	muls	r5, r2, r5
-	mov	r1, r5
-	bl	flash_erase_block
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r2, .L1721+44
-	movs	r0, #0
-	str	r3, [sp]
-	ldr	r3, .L1721+8
-	bl	ftl_prog_page
-	movs	r3, #1
-	add	r5, r5, r3
-	strh	r3, [r4, #2]	@ movhi
-.L1695:
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r2, .L1721+44
-	movs	r0, #0
-	str	r3, [sp]
-	ldr	r3, .L1721+8
-	bl	ftl_prog_page
-	ldrh	r3, [r4, #2]
-	adds	r0, r0, #1
-	add	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	beq	.L1685
-	cmp	r8, #0
-	bne	.L1696
-.L1704:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L1720
-	movs	r2, #191
-	ldr	r1, .L1721+36
-	ldr	r0, .L1721+40
-	bl	printf
-.L1705:
-	b	.L1705
-.L1687:
-	ldr	r3, [sp, #8]
-	mla	r5, r10, r3, r5
-	cmp	r0, #0
-	bne	.L1695
-	mov	r1, r5
-	bl	flash_erase_block
-	b	.L1695
-.L1696:
-	ldrb	r5, [r4, #1]	@ zero_extendqisi2
-	ldr	r6, .L1721+32
-	adds	r5, r5, #1
-.L1699:
-	cmp	r5, #7
-	bhi	.L1704
-	ldr	r3, [r6]
-	add	r3, r3, r5
-	ldrb	r3, [r3, #40]	@ zero_extendqisi2
-	uxth	r2, r3
-	cmp	r2, #128
-	bls	.L1700
-	cmp	r2, #255
-	beq	.L1701
-	movs	r2, #184
-	ldr	r1, .L1721+36
-	ldr	r0, .L1721+40
-	bl	printf
-.L1702:
-	b	.L1702
-.L1700:
-	ldr	r2, .L1721+12
-	movs	r0, #0
-	ldrh	r1, [r2]
-	muls	r1, r3, r1
-	bl	flash_erase_block
-.L1701:
-	adds	r5, r5, #1
-	uxth	r5, r5
-	b	.L1699
-.L1720:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1722:
-	.align	2
-.L1721:
-	.word	.LANCHOR45
-	.word	.LANCHOR131
-	.word	.LANCHOR130
-	.word	.LANCHOR75
-	.word	.LANCHOR46
-	.word	.LANCHOR22
-	.word	.LC64
-	.word	.LANCHOR79
-	.word	.LANCHOR5
-	.word	.LANCHOR132
-	.word	.LC0
-	.word	ftl_info_data_buffer
-	.size	ftl_info_flush, .-ftl_info_flush
-	.section	.text.ftl_info_blk_init,"ax",%progbits
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",%progbits
 	.align	1
-	.global	ftl_info_blk_init
+	.global	nandc_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_blk_init, %function
-ftl_info_blk_init:
+	.type	nandc_init, %function
+nandc_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r3, .L1755
-	mov	r1, r4
-	mov	r2, #16384
-	ldr	r0, .L1755+4
-	strb	r4, [r3]
-	ldr	r3, .L1755+8
-	ldr	r5, .L1755+12
-	ldr	r6, .L1755+16
-	str	r0, [r3]
-	ldr	r3, .L1755+20
-	ldrh	r3, [r3]
-	add	r3, r0, r3, lsl #2
-	str	r3, [r5]
-	bl	ftl_memset
-	mov	r2, #16384
-	mov	r1, r4
-	ldr	r0, .L1755+24
-	bl	ftl_memset
-	ldr	r2, [r6]
-	ldr	r3, .L1755+28
-	ldrb	r2, [r2, #40]	@ zero_extendqisi2
-	strb	r4, [r3, #1]
-	strh	r4, [r3, #2]	@ movhi
-	movs	r4, #7
-	strb	r2, [r3]
+	push	{r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r6, .L1650
+	sub	sp, sp, #20
+	mov	r4, r0
 	str	r3, [sp, #12]
-.L1725:
 	ldr	r3, [r6]
-	sxth	r8, r4
-	add	r3, r3, r4
-	ldrb	r7, [r3, #40]	@ zero_extendqisi2
-	cmp	r7, #255
-	bne	.L1724
-.L1729:
-	adds	r4, r4, #-1
-	bcs	.L1725
-	mov	r8, #0
-.L1726:
-	ldr	r3, .L1755+32
-	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L1632
+	mov	r2, r4
+	ldr	r1, .L1650+4
+	ldr	r0, .L1650+8
+	bl	printf
+.L1632:
+	ldr	r1, [r4, #352]
+	movs	r3, #6
+	ldr	r2, .L1650+12
+	ldr	r5, .L1650+16
+	ldr	r7, .L1650+20
+	cmp	r1, r2
+	ldr	r2, [r4, #128]
+	strb	r3, [r5]
+	itt	eq
+	moveq	r3, #8
+	strbeq	r3, [r5]
+	ldr	r3, .L1650+24
+	str	r4, [r7]
+	cmp	r2, r3
+	ldr	r2, .L1650+28
+	itt	eq
+	moveq	r3, #9
+	strbeq	r3, [r5]
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cmp	r3, #9
+	ldr	r3, .L1650+32
+	bne	.L1635
+	movs	r1, #1
+	strb	r1, [r3]
+	movs	r1, #2
+	ldr	r3, [sp, #12]
+	orr	r3, r3, #256
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #12]
+	bfi	r3, r1, #18, #3
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #12]
+	str	r3, [r4]
+	movs	r3, #0
+	str	r3, [r4, #520]
+	movw	r3, #4161
+	str	r3, [r4, #4]
+	movw	r3, #8321
+	str	r3, [r4, #8]
+	movs	r3, #38
+	str	r2, [r4, #80]
+	str	r3, [r4, #84]
+	movs	r3, #39
+	str	r3, [r4, #84]
+	ldr	r3, [r6]
 	lsls	r1, r3, #19
-	bpl	.L1730
-	ldr	r3, [r5]
-	mov	r2, #4800
-	mov	r1, r4
-	ldr	r0, .L1755+36
-	ldr	r3, [r3]
+	bpl	.L1637
+	ldr	r1, [r4]
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #80]
+	ldr	r0, [r4, #84]
+	ldr	r4, [r4, #88]
+	stm	sp, {r0, r4}
+.L1649:
+	ldr	r0, .L1650+36
 	bl	printf
-.L1730:
-	adds	r2, r4, #1
-	bne	.L1731
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L1755+4
-	bl	ftl_memset
-	ldr	r3, [r5]
-	mov	r0, r4
-	ldr	r2, .L1755+40
-	str	r2, [r3]
-.L1723:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1724:
-	ldr	r3, .L1755+44
-	movs	r0, #0
-	ldr	fp, .L1755+56
-	ldr	r2, .L1755+4
-	ldrh	r3, [r3]
-	muls	r7, r3, r7
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r1, r7
-	ldr	r3, .L1755+48
-	bl	ftl_read_page
-	cmp	r0, #-1
-	mov	r10, r0
-	bne	.L1727
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	adds	r1, r7, #1
-	ldr	r2, .L1755+4
-	movs	r0, #0
-	str	r3, [sp]
-	ldr	r3, .L1755+48
-	bl	ftl_read_page
-	mov	r10, r0
-.L1727:
-	ldr	r3, .L1755+32
-	ldr	r3, [r3]
-	lsls	r0, r3, #19
-	bpl	.L1728
-	ldr	r3, [r5]
-	mov	r2, r10
-	mov	r1, r4
-	ldr	r0, .L1755+52
-	ldr	r3, [r3]
-	str	r3, [sp]
-	movs	r3, #64
-	bl	printf
-.L1728:
-	cmp	r10, #-1
-	beq	.L1729
-	ldr	r3, [r5]
-	ldr	r2, .L1755+40
-	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L1729
-	mov	r4, r8
-	b	.L1726
-.L1731:
+.L1637:
+	ldr	r3, .L1650+40
+	movs	r2, #1
+	strb	r2, [r3]
+	movs	r3, #0
+	ldr	r2, .L1650+44
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1650+48
+	strb	r3, [r2]
 	ldr	r3, [r6]
-	movs	r0, #0
-	ldr	r2, .L1755+4
-	movs	r4, #0
-	ldr	r10, .L1755+40
-	add	r3, r3, r8
-	ldrb	r1, [r3, #40]	@ zero_extendqisi2
-	ldr	r3, [sp, #12]
-	strb	r8, [r3, #1]
+	lsls	r3, r3, #19
+	bpl	.L1631
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	ldr	r0, .L1650+52
+	bl	printf
+.L1631:
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L1635:
+	movs	r1, #0
+	movs	r0, #1
 	strb	r1, [r3]
-	movs	r3, #4
-	str	r3, [sp]
-	ldr	r3, .L1755+48
-	bl	flash_get_last_written_page
-	uxth	r6, r0
-	mov	r7, r0
-	adds	r3, r6, #1
-	uxth	r8, r3
 	ldr	r3, [sp, #12]
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1755+44
-	ldrh	r3, [r3]
-	mul	fp, r3, fp
-.L1733:
-	subs	r3, r6, r4
-	lsls	r3, r3, #16
-	bmi	.L1738
-	ldr	r3, .L1755+56
-	add	r1, r7, fp
-	ldr	r2, .L1755+4
-	subs	r1, r1, r4
-	movs	r0, #0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp]
-	ldr	r3, .L1755+48
-	bl	ftl_read_page
-	adds	r0, r0, #1
-	beq	.L1734
-	ldr	r3, [r5]
-	ldr	r3, [r3]
-	cmp	r3, r10
-	bne	.L1734
-.L1738:
+	orr	r3, r3, #256
+	str	r3, [sp, #12]
 	ldr	r3, [sp, #12]
-	strh	r8, [r3, #2]	@ movhi
-	ldr	r3, [r5]
-	ldr	r2, [r3, #16]
-	cmp	r2, #2048
-	bhi	.L1735
-.L1736:
-	ldr	r2, [r3, #24]
-	cmp	r2, #2048
-	bls	.L1739
-	ldr	r1, [r3, #28]
-	add	r1, r1, r2, lsr #11
-	ubfx	r2, r2, #0, #11
-	str	r2, [r3, #24]
-	str	r1, [r3, #28]
-.L1739:
-	ldr	r2, [r3, #32]
-	cmp	r2, #1024
-	bls	.L1740
-	ldr	r1, [r3, #36]
-	add	r1, r1, r2, lsr #10
-	ubfx	r2, r2, #0, #10
-	str	r2, [r3, #32]
-	str	r1, [r3, #36]
-.L1740:
-	ldr	r2, [r3, #40]
-	cmp	r2, #1024
-	bls	.L1741
-	ldr	r1, [r3, #44]
-	add	r1, r1, r2, lsr #10
-	ubfx	r2, r2, #0, #10
-	str	r2, [r3, #40]
-	str	r1, [r3, #44]
-.L1741:
-	ldr	r2, [r3, #64]
-	movs	r0, #0
-	adds	r2, r2, #1
-	str	r2, [r3, #64]
-	bl	ftl_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	movs	r0, #0
-	b	.L1723
-.L1734:
-	adds	r4, r4, #1
-	b	.L1733
-.L1735:
-	ldr	r1, [r3, #20]
-	add	r1, r1, r2, lsr #11
-	ubfx	r2, r2, #0, #11
-	str	r2, [r3, #16]
-	str	r1, [r3, #20]
-	b	.L1736
-.L1756:
+	bfi	r3, r0, #24, #3
+	mov	r0, #2048
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #12]
+	str	r3, [r4]
+	movw	r3, #4193
+	str	r1, [r4, #336]
+	str	r3, [r4, #4]
+	movw	r3, #8321
+	str	r3, [r4, #344]
+	movs	r3, #38
+	str	r2, [r4, #304]
+	str	r3, [r4, #308]
+	movs	r3, #39
+	str	r3, [r4, #308]
+	bl	ftl_malloc
+	ldr	r3, .L1650+56
+	str	r0, [r3]
+	ldr	r3, [r6]
+	lsls	r2, r3, #19
+	bpl	.L1637
+	ldr	r0, [r7]
+	ldr	r1, [r0]
+	ldr	r2, [r0, #344]
+	ldr	r3, [r0, #304]
+	ldr	r4, [r0, #308]
+	ldr	r0, [r0, #312]
+	str	r4, [sp]
+	str	r0, [sp, #4]
+	b	.L1649
+.L1651:
 	.align	2
-.L1755:
-	.word	.LANCHOR133
-	.word	ftl_info_data_buffer
-	.word	.LANCHOR57
-	.word	.LANCHOR46
-	.word	.LANCHOR5
-	.word	.LANCHOR54
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR131
-	.word	.LANCHOR22
-	.word	.LC66
-	.word	1229739078
-	.word	.LANCHOR75
-	.word	.LANCHOR130
-	.word	.LC65
+.L1650:
+	.word	.LANCHOR14
+	.word	.LANCHOR149
+	.word	.LC91
+	.word	1446522928
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.word	1446588464
+	.word	1052675
 	.word	.LANCHOR45
-	.size	ftl_info_blk_init, .-ftl_info_blk_init
-	.section	.text.ftl_ext_info_flush,"ax",%progbits
-	.align	1
-	.global	ftl_ext_info_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_ext_info_flush, %function
-ftl_ext_info_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1771
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, [r3]
-	ldr	r2, [r3, #520]
-	cbz	r2, .L1758
-	movs	r2, #0
-	str	r2, [r3, #520]
-.L1758:
-	ldr	r5, .L1771+4
-	movs	r0, #0
-	bl	ftl_total_vpn_update
-	mov	r4, r5
-.L1767:
-	ldr	r3, [r5]
-	ldr	r2, [r3, #56]
-	adds	r2, r2, #1
-	str	r2, [r3, #56]
-	ldrh	r2, [r3, #140]
-	ldr	r3, .L1771+8
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1759
-	bl	ftl_ext_alloc_new_blk
-.L1759:
-	ldr	r0, [r4]
-	movw	r3, #65535
-	ldrh	r1, [r0, #130]
-	cmp	r1, r3
-	bne	.L1760
-	mov	r2, #1048
-	ldr	r1, .L1771+12
-	ldr	r0, .L1771+16
-	bl	printf
-.L1761:
-	b	.L1761
-.L1760:
-	ldr	r3, .L1771+20
-	movs	r7, #0
-	ldr	fp, .L1771+32
-	ldr	r10, .L1771+36
-	ldrh	r3, [r3]
-	rsb	r2, r3, #21
-	movs	r3, #1
-	asr	r6, r1, r2
-	lsls	r3, r3, r2
-	ldr	r2, .L1771+24
-	subs	r3, r3, #1
-	ands	r3, r3, r1
-	movs	r1, #0
-	ldrh	r8, [r2]
-	ldrh	r2, [r0, #140]
-	mov	r0, r10
-	smlabb	r3, r8, r3, r2
-	ldrb	r2, [fp]	@ zero_extendqisi2
-	uxth	r8, r3
-	lsls	r2, r2, #1
-	bl	ftl_memset
-	ldr	r3, [r4]
-	mov	r1, r8
-	ldr	r2, .L1771+28
-	uxtb	r0, r6
-	str	r7, [r10]
-	ldr	r3, [r3, #56]
-	str	r3, [r10, #4]
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	str	r3, [sp]
-	mov	r3, r10
-	bl	ftl_prog_page
-	ldr	r2, [r4]
-	ldrh	r3, [r2, #140]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #1
-	strh	r3, [r2, #140]	@ movhi
-	beq	.L1767
-	adds	r0, r0, #1
-	beq	.L1767
-	mov	r0, r7
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1772:
-	.align	2
-.L1771:
-	.word	.LANCHOR60
+	.word	.LC92
 	.word	.LANCHOR46
-	.word	.LANCHOR79
-	.word	.LANCHOR134
-	.word	.LC0
-	.word	.LANCHOR71
-	.word	.LANCHOR75
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR45
-	.word	.LANCHOR130
-	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
-	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.word	.LANCHOR48
+	.word	.LANCHOR44
+	.word	.LC93
+	.word	.LANCHOR47
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",%progbits
 	.align	1
-	.global	ftl_ext_info_init
+	.global	buf_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_ext_info_init, %function
-ftl_ext_info_init:
+	.type	buf_init, %function
+buf_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #0
-	ldr	r3, .L1790
-	ldr	r5, .L1790+4
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1790+8
-	ldr	r3, [r5]
-	mov	r10, r5
-	ldrh	r4, [r3, #130]
-	ldr	r3, .L1790+12
-	ubfx	r8, r4, #0, #14
-	ldrh	r3, [r3]
-	mov	r1, r8
-	rsb	r3, r3, #21
-	asrs	r4, r4, r3
-	movs	r3, #4
-	str	r3, [sp]
-	uxtb	r4, r4
-	ldr	r3, .L1790+16
-	mov	r0, r4
-	bl	flash_get_last_written_page
-	ldr	r3, .L1790+20
-	mov	r6, r0
-	ldr	r3, [r3]
-	tst	r3, #4096
-	beq	.L1774
-	mov	r3, r0
-	movw	r2, #1091
-	ldr	r1, .L1790+24
-	ldr	r0, .L1790+28
-	bl	printf
-.L1774:
-	ldr	fp, .L1790+48
-	movs	r7, #0
-.L1775:
-	uxth	r5, r6
-	subs	r3, r5, r7
-	lsls	r3, r3, #16
-	bmi	.L1780
-	ldr	r3, .L1790+32
-	subs	r1, r6, r7
-	ldr	r2, .L1790+8
-	ldrh	r0, [r3]
-	ldr	r3, .L1790+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mla	r1, r8, r0, r1
-	mov	r0, r4
-	str	r3, [sp]
-	ldr	r3, .L1790+16
-	bl	flash_read_page_en
-	adds	r2, r0, #1
-	beq	.L1776
-	cmp	r0, #512
-	beq	.L1776
-	ldr	r3, .L1790+40
-	ldr	r3, [r3]
-	ldr	r3, [r3]
-	cmp	r3, fp
-	bne	.L1776
-.L1780:
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #140]
-	cmp	r2, r6
-	bgt	.L1778
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r4, .L1655
+	mov	r6, r5
+	ldr	r7, .L1655+4
+	mov	r8, r4
+.L1653:
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	uxtb	r3, r5
+	strb	r6, [r4, #2]
 	adds	r5, r5, #1
-	strh	r5, [r3, #140]	@ movhi
-	bl	ftl_ext_info_flush
-.L1778:
-	ldr	r3, .L1790+40
-	movs	r0, #0
-	movw	r2, #65535
-	ldr	r3, [r3]
-	str	r0, [r3, #520]
-	ldr	r3, .L1790+44
-	strh	r2, [r3]	@ movhi
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1776:
-	adds	r7, r7, #1
-	b	.L1775
-.L1791:
+	adds	r2, r3, #1
+	strb	r3, [r4, #1]
+	strb	r2, [r4]
+	adds	r4, r4, #48
+	str	r6, [r4, #-40]
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r4, #-44]
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	cmp	r5, #32
+	str	r0, [r4, #-36]
+	bne	.L1653
+	movs	r3, #255
+	strb	r3, [r8, #1488]
+	ldr	r3, .L1655+8
+	strb	r6, [r3]
+	ldr	r3, .L1655+12
+	strb	r5, [r3]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1656:
 	.align	2
-.L1790:
-	.word	.LANCHOR86
-	.word	.LANCHOR46
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR71
-	.word	.LANCHOR130
-	.word	.LANCHOR22
-	.word	.LANCHOR135
-	.word	.LC28
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LANCHOR60
-	.word	.LANCHOR87
-	.word	1162432070
-	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format,"ax",%progbits
+.L1655:
+	.word	.LANCHOR50
+	.word	.LANCHOR123
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",%progbits
 	.align	1
-	.global	ftl_low_format
+	.global	gc_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_low_format, %function
-ftl_low_format:
-	@ args = 0, pretend = 0, frame = 32
+	.type	gc_init, %function
+gc_init:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #8
-	ldr	r5, .L1829
-	sub	sp, sp, #40
-.L1796:
-	ldr	r3, [r5]
-	add	r3, r3, r4
-	ldrb	r3, [r3, #32]	@ zero_extendqisi2
-	cmp	r3, #128
-	ble	.L1793
-	cmp	r3, #255
-	beq	.L1794
-	movw	r2, #1228
-	ldr	r1, .L1829+4
-	ldr	r0, .L1829+8
-	bl	printf
-.L1795:
-	b	.L1795
-.L1793:
-	ldr	r2, .L1829+12
-	movs	r0, #0
-	ldrh	r1, [r2]
-	muls	r1, r3, r1
-	bl	flash_erase_block
-.L1794:
-	adds	r4, r4, #1
-	cmp	r4, #16
-	bne	.L1796
-	ldr	r4, .L1829+16
-	mov	r10, #0
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L1829+20
+	ldr	r3, .L1658
+	mov	r2, #340
+	push	{r4, r5, r6, lr}
+	movs	r4, #0
+	ldr	r5, .L1658+4
+	mov	r1, r4
+	strb	r4, [r3]
+	ldr	r3, .L1658+8
+	mov	r0, r5
+	strb	r4, [r3]
+	ldr	r3, .L1658+12
+	str	r4, [r3]
+	ldr	r3, .L1658+16
+	strh	r4, [r3]	@ movhi
 	bl	ftl_memset
-	ldr	r3, [r4]
-	ldr	r2, .L1829+24
-	str	r2, [r3]
-.L1797:
-	ldr	r3, .L1829+28
-	uxth	r0, r10
-	ldr	r6, .L1829+32
+	movw	r3, #65535
+	str	r4, [r5, #8]
+	strh	r3, [r5]	@ movhi
+	ldr	r3, .L1658+20
 	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L1804
-	ldr	r7, .L1829+36
-	mov	r2, #16384
-	movs	r1, #0
-	ldr	r0, .L1829+40
-	bl	ftl_memset
-	ldr	r3, [r7]
-	ldr	r2, .L1829+44
-	str	r2, [r3]
-	ldr	r3, .L1829+48
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1829
-	mov	r1, r8
-	ldr	r3, [r3]
-	ldrb	r0, [r3, #47]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	ip, [r6]
-	uxtb	r0, r0
-	cmp	r8, #1
-	str	r7, [sp, #8]
-	add	r5, r0, #1
-	mov	r3, #0
-	ite	eq
-	moveq	r0, #1
-	movne	r0, #3
-.L1805:
-	add	r1, ip, r3, lsl #2
-	adds	r3, r3, #1
-	ldrb	r2, [r1, #2]	@ zero_extendqisi2
-	strb	r0, [r1, #3]
-	orn	r2, r2, #31
-	bfc	r2, #3, #2
-	strb	r2, [r1, #2]
-	uxth	r2, r3
-	cmp	r5, r2
-	bhi	.L1805
-	mov	r1, r8
-	movs	r0, #16
-	bl	__aeabi_idiv
-	ldr	r3, [r4]
-	add	r0, r0, r5
-	uxth	r0, r0
-	strh	r0, [r3, #134]	@ movhi
-	ldr	r3, .L1829+52
-	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L1806
-	str	r0, [sp]
-	mov	r3, r5
-	movs	r2, #128
-	movw	r1, #1265
-	ldr	r0, .L1829+56
-	bl	printf
-.L1806:
-	ldr	r0, [r4]
-	movs	r2, #128
-	movs	r1, #255
-	adds	r0, r0, #160
-	bl	ftl_memset
-	ldr	r3, [r6]
-	ldr	r0, [r4]
-	str	r3, [sp, #24]
-	ldr	r3, .L1829+60
-	ldrh	ip, [r0, #134]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #28]
-	ldr	r3, .L1829+48
-	ldrb	fp, [r3]	@ zero_extendqisi2
-	uxth	r3, fp
-	str	r3, [sp, #16]
-	ldrh	r3, [sp, #16]
-	smulbb	r2, r5, r3
-	ldr	r3, .L1829+64
-	ldrh	r1, [r3]
+	lsrs	r2, r3, #1
+	lsrs	r1, r3, #2
+	strh	r2, [r5, #34]	@ movhi
+	ldr	r2, .L1658+24
+	strh	r1, [r5, #32]	@ movhi
+	ldr	r5, .L1658+28
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L1658+32
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L1658+36
+	strh	r4, [r2]	@ movhi
+	ldr	r4, .L1658+40
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	smulbb	r2, r0, r3
 	uxth	r2, r2
-	str	r3, [sp, #36]
-	rsb	r6, r1, #21
-	movs	r1, #1
-	lsls	r1, r1, r6
-	movs	r6, #0
-	uxth	r1, r1
-	str	r1, [sp, #32]
-.L1807:
-	cmp	r5, ip
-	bcc	.L1813
-	ldr	r3, .L1829+28
-	mov	r2, ip
-	mov	lr, #1
-	ldrh	r1, [r3]
-	ldr	r3, [sp, #24]
-	add	r3, r3, ip, lsl #2
-.L1814:
-	cmp	r2, r1
-	bcc	.L1815
-	sub	ip, r1, ip
-	movs	r5, #0
-	strh	ip, [r0, #116]	@ movhi
-	strh	r6, [r0, #112]	@ movhi
-	strh	r5, [r0, #114]	@ movhi
-	strh	r5, [r0, #118]	@ movhi
-	movs	r0, #1
-	bl	ftl_alloc_sblk
-	mov	r1, r5
-	mov	r6, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r4]
-	mov	r0, r6
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r0, [r4]
-	movw	r2, #65533
-	ldrh	r8, [r0, #672]
-	strh	r5, [r0, #690]	@ movhi
-	add	r3, r8, #-1
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L1816
-	movw	r2, #1297
-	ldr	r1, .L1829+4
-	ldr	r0, .L1829+8
-	bl	printf
-.L1817:
-	b	.L1817
-.L1804:
-	ldr	r3, .L1829+68
-	strh	r0, [r3]	@ movhi
-	bl	ftl_test_block
-	ldr	r3, .L1829+60
-	uxth	r1, r10
-	ldr	r5, [r6]
-	movs	r6, #0
-	mov	fp, r6
-	mov	r7, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r5, r5, r1, lsl #2
-	str	r3, [sp, #8]
-	ldr	r3, .L1829+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	uxth	r2, r3
-	str	r2, [sp, #12]
-	mul	r2, r3, r1
-.L1798:
-	ldr	r0, [sp, #8]
-	uxth	r1, fp
-	cmp	r0, r1
-	bhi	.L1818
-	cbnz	r7, .L1803
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	orr	r3, r3, #224
-	strb	r3, [r5, #2]
-.L1803:
-	add	r10, r10, #1
-	b	.L1797
-.L1801:
-	add	r1, r8, r2
-	ldr	r0, [sp, #16]
-	str	r3, [sp, #24]
-	str	r2, [sp, #20]
-	bl	flash_check_bad_block
-	ldr	r2, [sp, #20]
-	ldr	r3, [sp, #24]
-	cbz	r0, .L1799
-	ldrb	r0, [r5, #3]	@ zero_extendqisi2
-	movs	r1, #1
-	lsl	r1, r1, r8
-	orrs	r1, r1, r0
-	strb	r1, [r5, #3]
-.L1800:
-	add	r8, r8, #1
-.L1802:
-	sub	r1, r8, r6
-	ldr	r0, [sp, #12]
-	uxth	r1, r1
-	cmp	r0, r1
-	bhi	.L1801
-	add	fp, fp, #1
-	add	r6, r6, r3
-	subs	r2, r2, r3
-	b	.L1798
-.L1799:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	b	.L1800
-.L1818:
-	uxtb	r1, fp
-	mov	r8, r6
-	str	r1, [sp, #16]
-	b	.L1802
-.L1813:
-	ldr	r3, [sp, #24]
-	add	r3, r3, r5, lsl #2
-	str	r3, [sp, #12]
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	orn	r3, r3, #31
-	bfc	r3, #3, #2
-	strb	r3, [r1, #2]
-	movs	r1, #0
-	mov	r8, r1
-	str	r1, [sp, #20]
-.L1808:
-	ldrh	r3, [sp, #20]
-	ldr	r7, [sp, #28]
-	cmp	r7, r3
-	bhi	.L1820
-	ldr	r3, [sp, #16]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	add	r2, r2, r3
-	uxth	r2, r2
-	b	.L1807
-.L1811:
-	ldr	r7, [sp, #12]
-	ldrb	r10, [r7, #3]	@ zero_extendqisi2
-	add	r7, lr, r8
-	asr	r10, r10, r7
-	tst	r10, #1
-	bne	.L1809
-	cmp	fp, #1
-	add	r10, r6, #80
-	it	hi
-	andhi	r3, r3, #1
-	add	r6, r6, #1
-	it	hi
-	addhi	r3, r3, r2
-	uxth	r6, r6
-	ite	hi
-	uxthhi	r3, r3
-	movls	r3, r2
-	add	r3, r3, r1
-	strh	r3, [r0, r10, lsl #1]	@ movhi
-.L1809:
-	add	lr, lr, #1
-.L1812:
-	ldr	r7, [sp, #16]
-	uxth	r3, lr
-	cmp	r3, r7
-	bcc	.L1811
-	ldr	r3, [sp, #20]
-	add	r8, r8, fp
-	adds	r3, r3, #1
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #32]
-	add	r1, r1, r3
-	uxth	r1, r1
-	b	.L1808
-.L1820:
-	mov	lr, #0
-	b	.L1812
-.L1815:
-	ldrb	r5, [r3, #2]	@ zero_extendqisi2
-	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r3, #4
-	and	r5, r5, #31
-	bfi	r5, lr, #3, #2
-	strb	r5, [r3, #-2]
-	b	.L1814
-.L1830:
+	sub	r6, r2, #32
+	strh	r6, [r5]	@ movhi
+	ldr	r5, .L1658+44
+	strh	r2, [r5]	@ movhi
+	ldr	r2, .L1658+48
+	ldr	r5, .L1658+52
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L1658+56
+	strh	r1, [r3]	@ movhi
+	ldrh	r3, [r5]
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+60
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+64
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1658+68
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+72
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1658+76
+	ldr	r2, .L1658+80
+	str	r0, [r3]
+	ldr	r3, .L1658+84
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1659:
 	.align	2
-.L1829:
-	.word	.LANCHOR5
-	.word	.LANCHOR136
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR46
-	.word	ftl_info_data_buffer
-	.word	1229739078
-	.word	.LANCHOR54
-	.word	.LANCHOR57
-	.word	.LANCHOR60
-	.word	ftl_ext_info_data_buffer
-	.word	1162432070
-	.word	.LANCHOR70
-	.word	.LANCHOR22
-	.word	.LC67
+.L1658:
 	.word	.LANCHOR76
-	.word	.LANCHOR71
-	.word	.LANCHOR53
-.L1816:
-	strh	r5, [r0, #696]	@ movhi
-	movs	r1, #255
-	mov	r2, #256
-	add	r0, r0, #416
-	bl	ftl_memset
-	ldr	r2, [sp, #36]
-	ldr	r3, [r4]
-	ldrh	r2, [r2]
-	strh	r8, [r3, #692]	@ movhi
-	strh	r6, [r3, #416]	@ movhi
-	rsb	r2, r2, #21
-	asr	r2, r8, r2
-	strh	r2, [r3, #694]	@ movhi
-	movs	r2, #1
-	strh	r2, [r3, #688]	@ movhi
-	ldr	r2, .L1831
-	ldrh	r2, [r2]
-	strh	r2, [r3, #698]	@ movhi
-	bl	ftl_alloc_sys_blk
-	mov	r1, r5
-	mov	r6, r0
-	bl	ftl_erase_phy_blk
-	ldr	r3, [r4]
-	movs	r1, #2
-	strh	r6, [r3, #130]	@ movhi
-	ldr	r3, [sp, #8]
-	ldr	r0, [r3]
-	adds	r0, r0, #16
-	bl	ftl_open_sblk_init
-	ldr	r3, [sp, #8]
-	movs	r1, #3
-	ldr	r0, [r3]
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_init
-	ldr	r3, [sp, #8]
-	movs	r1, #255
-	ldr	r0, [r3]
-	ldr	r3, [r4]
-	adds	r0, r0, #136
-	ldrh	r2, [r3, #134]
-	strh	r5, [r0, #-12]	@ movhi
-	strh	r5, [r0, #-16]	@ movhi
-	strh	r2, [r0, #-10]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r0, #-56]	@ movhi
-	strh	r2, [r0, #-6]	@ movhi
-	mov	r2, #-1
-	strh	r5, [r0, #-14]	@ movhi
-	str	r2, [r0, #408]
-	strh	r2, [r3, #126]	@ movhi
-	mov	r2, #256
-	bl	ftl_memset
-	ldr	r3, [sp, #8]
-	movs	r2, #128
-	movs	r1, #255
-	ldr	r0, [r3]
-	add	r0, r0, #392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	r0, r5
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	mov	r0, r5
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1832:
+	.word	.LANCHOR63
+	.word	.LANCHOR150
+	.word	.LANCHOR151
+	.word	.LANCHOR87
+	.word	.LANCHOR85
+	.word	.LANCHOR86
+	.word	.LANCHOR94
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR78
+	.word	.LANCHOR91
+	.word	.LANCHOR84
+	.word	.LANCHOR77
+	.word	.LANCHOR62
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR74
+	.word	.LANCHOR68
+	.word	.LANCHOR154
+	.word	.LANCHOR79
+	.word	.LANCHOR89
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",%progbits
+	.align	1
+	.global	js_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	js_hash, %function
+js_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1664
+	add	r1, r1, r0
+	push	{r4, lr}
+.L1662:
+	cmp	r0, r1
+	bne	.L1663
+	mov	r0, r3
+	pop	{r4, pc}
+.L1663:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L1662
+.L1665:
 	.align	2
-.L1831:
-	.word	.LANCHOR137
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format_test,"ax",%progbits
+.L1664:
+	.word	1204201446
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",%progbits
 	.align	1
-	.global	ftl_re_low_format_test
+	.global	timer_get_time
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_re_low_format_test, %function
-ftl_re_low_format_test:
+	.type	timer_get_time, %function
+timer_get_time:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r1, #1
-	ldr	r5, .L1841
-	ldr	r0, .L1841+4
-	bl	printf
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	ldr	r2, .L1841+8
-	ldr	r3, [r5]
-	ldr	r6, .L1841+12
-	ldr	r0, [r2]
-	movs	r2, #0
-	ldrh	r1, [r3, #134]
-	mov	r7, r2
-	ldrh	lr, [r6]
-	mov	ip, r2
-	add	r0, r0, r1, lsl #2
-.L1834:
-	cmp	r1, lr
-	bcc	.L1838
-	movs	r4, #0
-	strh	r7, [r3, #118]	@ movhi
-	strh	r2, [r3, #116]	@ movhi
-	movs	r0, #1
-	strh	ip, [r3, #114]	@ movhi
-	strh	r4, [r3, #122]	@ movhi
-	strh	r4, [r3, #120]	@ movhi
-	strh	r4, [r3, #124]	@ movhi
-	bl	ftl_alloc_sblk
-	mov	r1, r4
-	mov	r8, r0
-	bl	ftl_erase_sblk
-	ldr	r1, [r5]
-	mov	r0, r8
-	add	r1, r1, #672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r0, [r5]
-	movw	r2, #65533
-	ldrh	r7, [r0, #672]
-	strh	r4, [r0, #690]	@ movhi
-	subs	r3, r7, #1
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L1839
-	movw	r2, #1366
-	ldr	r1, .L1841+16
-	ldr	r0, .L1841+20
-	bl	printf
-.L1840:
-	b	.L1840
-.L1838:
-	ldrb	r4, [r0, #2]	@ zero_extendqisi2
-	bfc	r4, #5, #3
-	strb	r4, [r0, #2]
-	ands	r4, r4, #24
-	bne	.L1835
-	add	ip, ip, #1
-	uxth	ip, ip
-.L1836:
-	adds	r1, r1, #1
-	uxth	r1, r1
-	adds	r0, r0, #4
-	b	.L1834
-.L1835:
-	cmp	r4, #16
-	itete	eq
-	addeq	r7, r7, #1
-	addne	r2, r2, #1
-	uxtheq	r7, r7
-	uxthne	r2, r2
-	b	.L1836
-.L1839:
-	strh	r4, [r0, #696]	@ movhi
-	mov	r2, #256
-	movs	r1, #255
-	add	r0, r0, #416
-	bl	ftl_memset
-	ldr	r0, [r5]
-	mov	r1, r4
-	mov	r2, #4096
-	add	r0, r0, #704
-	bl	ftl_memset
-	ldr	r3, [r5]
-	lsrs	r2, r7, #14
-	ubfx	r7, r7, #0, #14
-	mov	r1, r4
-	strh	r2, [r3, #694]	@ movhi
-	movs	r2, #1
-	strh	r2, [r3, #688]	@ movhi
-	ldr	r2, .L1841+24
-	strh	r7, [r3, #692]	@ movhi
-	strh	r8, [r3, #416]	@ movhi
-	ldrh	r2, [r2]
-	strh	r2, [r3, #698]	@ movhi
-	ldrh	r2, [r6]
-	ldr	r3, .L1841+28
-	ldr	r6, .L1841+32
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r0, [r6]
-	movs	r1, #2
-	adds	r0, r0, #16
-	bl	ftl_open_sblk_init
-	ldr	r0, [r6]
-	movs	r1, #3
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_init
-	ldr	r3, [r5]
-	movs	r1, #255
-	ldr	r0, [r6]
-	ldrh	r2, [r3, #134]
-	adds	r0, r0, #136
-	strh	r4, [r0, #-12]	@ movhi
-	strh	r4, [r0, #-16]	@ movhi
-	strh	r2, [r0, #-10]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r0, #-56]	@ movhi
-	strh	r2, [r0, #-6]	@ movhi
-	mov	r2, #-1
-	strh	r4, [r0, #-14]	@ movhi
-	str	r2, [r0, #408]
-	strh	r2, [r3, #126]	@ movhi
-	mov	r2, #256
-	bl	ftl_memset
-	ldr	r0, [r6]
-	movs	r2, #128
-	movs	r1, #255
-	add	r0, r0, #392
-	bl	ftl_memset
-	ldr	r3, [r6]
-	str	r4, [r3, #520]
-	str	r4, [r3, #524]
-	str	r4, [r3, #528]
-	bl	ftl_ext_info_flush
-	mov	r0, r4
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1842:
-	.align	2
-.L1841:
-	.word	.LANCHOR46
-	.word	.LC68
-	.word	.LANCHOR57
-	.word	.LANCHOR54
-	.word	.LANCHOR138
-	.word	.LC0
-	.word	.LANCHOR137
-	.word	.LANCHOR56
-	.word	.LANCHOR60
-	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
-	.section	.text.ftl_prog_ppa_page,"ax",%progbits
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",%progbits
 	.align	1
-	.global	ftl_prog_ppa_page
+	.global	FlashCs123Init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
+	.type	FlashCs123Init, %function
+FlashCs123Init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, lr}
-	str	r3, [sp]
-	mov	r3, r2
-	mov	r2, r1
-	ubfx	r1, r0, #0, #21
-	ubfx	r0, r0, #21, #3
-	bl	ftl_prog_page
-	add	sp, sp, #12
-	@ sp needed
-	ldr	pc, [sp], #4
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
 	.align	1
-	.global	ftl_write_last_log_page
+	.global	rk_nand_de_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldrh	r3, [r0, #6]
-	cmp	r3, #1
-	bne	.L1846
-	ldr	r3, .L1848
-	ldrh	r7, [r0, #12]
-	ldr	r4, [r3]
-	bl	ftl_get_new_free_page
-	adds	r3, r0, #1
-	mov	r6, r0
-	beq	.L1847
-	ldrh	r0, [r5]
-	add	r4, r4, r7, lsl #2
-	ldr	r5, .L1848+4
-	bl	ftl_vpn_decrement
-	ldr	r3, .L1848+8
-	mov	r0, r4
-	ldr	r2, .L1848+12
-	str	r3, [r5]
-	ldr	r3, .L1848+16
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r1, r3, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r3, .L1848+20
-	mov	r2, r5
-	str	r0, [r5, #4]
-	mov	r1, r4
-	mov	r0, r6
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_prog_ppa_page
-.L1847:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1846:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1849:
+	@ link register save eliminated.
+	b	zftl_flash_de_init
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	zftl_get_density
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_capacity, %function
+ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1671
+	ldr	r0, [r3]
+	bx	lr
+.L1672:
 	.align	2
-.L1848:
-	.word	.LANCHOR82
-	.word	.LANCHOR121
-	.word	-178307901
-	.word	.LANCHOR69
-	.word	.LANCHOR79
-	.word	.LANCHOR45
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
+.L1671:
+	.word	.LANCHOR59
+	.size	ftl_get_capacity, .-ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
-	.global	ftl_open_sblk_recovery
+	.global	rknand_print_hex
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	@ args = 0, pretend = 0, frame = 16
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1922
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #56
-	mov	r4, r0
-	str	r1, [sp, #52]
+	movs	r5, #0
+	ldr	r7, .L1682
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
 	mov	r10, r3
-	ldr	r2, [r3]
-	tst	r2, #4096
-	beq	.L1851
-	ldrh	r1, [r0, #2]
-	ldr	r0, .L1922+4
-	bl	printf
-.L1851:
-	ldr	r3, [r10]
-	lsls	r0, r3, #19
-	bpl	.L1852
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldr	r0, .L1922+8
+	mov	r4, r5
+.L1674:
+	cmp	r4, r10
+	bne	.L1680
+	ldr	r1, .L1682+4
+	ldr	r0, .L1682+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1680:
+	cbnz	r5, .L1675
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1682+12
 	bl	printf
-.L1852:
-	ldr	r3, [r10]
-	lsls	r1, r3, #19
-	bpl	.L1853
-	ldrh	r1, [r4]
-	ldr	r0, .L1922+12
+.L1675:
+	cmp	r8, #4
+	bne	.L1676
+	ldr	r1, [r6, r4, lsl #2]
+.L1681:
+	mov	r0, r7
+	adds	r5, r5, #1
 	bl	printf
-.L1853:
-	ldr	r3, [r10]
-	lsls	r2, r3, #19
-	bpl	.L1854
-	ldrh	r2, [r4, #18]
-	ldrh	r1, [r4, #16]
-	ldr	r0, .L1922+16
+	cmp	r5, #15
+	bls	.L1679
+	movs	r5, #0
+	ldr	r1, .L1682+4
+	ldr	r0, .L1682+8
 	bl	printf
-.L1854:
-	ldrh	r3, [r4, #10]
-	movs	r0, #1
-	strh	r3, [r4, #14]	@ movhi
-	bl	buf_alloc
-	ldrh	r3, [r4, #2]
-	mov	r5, r0
-	ldrb	fp, [r4, #5]	@ zero_extendqisi2
-	str	r3, [sp, #44]
-	movs	r3, #0
-	str	r3, [sp, #48]
-.L1855:
-	ldr	r3, .L1922+20
-	ldr	r2, [sp, #44]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bhi	.L1870
-.L1858:
-	ldrh	r3, [sp, #44]
-	movs	r7, #0
-	ldr	r6, .L1922+24
-	mov	r2, r7
-	ldrh	r0, [r4, #10]
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, [r6]
-	strb	fp, [r4, #5]
-.L1871:
-	cmp	r2, r0
-	bcc	.L1873
-	ldr	r2, .L1922+20
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	ldr	r8, .L1922+72
-	ldrh	r2, [r2]
-	smulbb	r3, r3, r2
-	subs	r3, r3, r0
-	add	r7, r7, r3
-	ldr	r3, [r10]
-	uxth	r7, r7
-	tst	r3, #4096
-	beq	.L1874
-	ldrh	r1, [r4]
-	mov	r2, r7
-	ldr	r3, [r8]
-	ldr	r0, .L1922+28
-	ldrh	r3, [r3, r1, lsl #1]
-	bl	printf
-.L1874:
-	ldrh	r2, [r4]
-	mov	r0, r5
-	ldr	r3, [r8]
-	ldr	fp, .L1922+76
-	strh	r7, [r3, r2, lsl #1]	@ movhi
-	movs	r7, #0
-	bl	buf_free
-.L1875:
-	ldr	r3, .L1922+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r7, r3, lsl #1
-	bcc	.L1878
-	ldr	r3, .L1922+20
-	ldrh	r2, [r4, #12]
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	mla	r3, r1, r3, r2
-	ldr	r2, [r6]
-	add	r3, r3, #1073741824
-	subs	r3, r3, #1
-	ldr	r3, [r2, r3, lsl #2]
-	adds	r3, r3, #1
-	beq	.L1879
-	movw	r2, #811
-	ldr	r1, .L1922+36
-	ldr	r0, .L1922+40
-	bl	printf
-.L1880:
-	b	.L1880
-.L1870:
-	ldrb	fp, [r4, #5]	@ zero_extendqisi2
-.L1856:
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	cmp	r3, fp
-	bhi	.L1869
-	movs	r3, #0
-	strb	r3, [r4, #5]
-	ldr	r3, [sp, #44]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #44]
-	b	.L1855
-.L1869:
-	add	r3, fp, #8
-	ldrh	r8, [r4, r3, lsl #1]
-	movw	r3, #65535
-	cmp	r8, r3
-	beq	.L1857
-	ldr	r3, .L1922+44
-	ldr	r2, [r5, #12]
-	ldr	r1, [r5, #4]
-	ldrh	r6, [r3]
-	ldr	r3, [sp, #44]
-	mla	r6, r8, r6, r3
-	ldr	r3, .L1922+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r6
-	bl	ftl_read_ppa_page
-	cmp	r0, #512
-	mov	r7, r0
-	beq	.L1858
-	ldr	r3, [r10]
-	lsls	r3, r3, #19
-	bpl	.L1859
-	ldr	r2, [r5, #12]
-	ldr	r3, [r5, #4]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #32]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #28]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #24]
-	mov	r1, r8
-	ldr	r2, [r2]
-	str	r2, [sp, #20]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r2, [sp, #44]
-	str	r0, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
-	ldr	r0, .L1922+52
-	bl	printf
-.L1859:
-	ldr	r3, .L1922+56
-	mov	r8, #1
-	ldr	r2, [sp, #44]
-	ldrh	r1, [r4, #10]
-	strb	r8, [r3]
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mla	r2, r3, r2, fp
-	cmp	r1, r2
-	beq	.L1860
-	movw	r2, #707
-	ldr	r1, .L1922+36
-	ldr	r0, .L1922+40
-	bl	printf
-.L1861:
-	b	.L1861
-.L1860:
-	ldrh	r2, [r4, #6]
-	add	r2, r2, r1
-	ldr	r1, .L1922+20
-	ldrh	r1, [r1]
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1862
-	mov	r2, #708
-	ldr	r1, .L1922+36
-	ldr	r0, .L1922+40
-	bl	printf
-.L1863:
-	b	.L1863
-.L1862:
-	adds	r7, r7, #1
-	beq	.L1865
-	ldr	r7, [r5, #12]
-	ldr	r0, [r7, #4]
-	adds	r6, r0, #1
-	beq	.L1865
-	bl	lpa_hash_get_ppa
-	ldr	r3, [sp, #52]
-	mov	r6, r0
-	cmp	r3, #0
-	beq	.L1867
-	ldr	r3, [r7, #8]
-	cmp	r0, r3
-	beq	.L1867
-	adds	r1, r0, #1
-	beq	.L1867
-	ldr	r3, .L1922+60
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsl	r8, r8, r3
-	ldr	r3, .L1922+64
-	lsr	r0, r6, r0
-	add	r8, r8, #-1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	and	r0, r8, r0
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #52]
-	uxth	r0, r0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L1867
-	ldr	r8, [r7]
-	mov	r0, r6
-	ldr	r7, .L1922+68
-	ldr	r3, .L1922+48
-	ldr	r1, [r5, #4]
-	mov	r2, r7
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r3, [r7]
-	cmp	r8, r3
-	bhi	.L1867
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #8]
-	adds	r2, r0, #1
-	beq	.L1865
-	ldr	r3, .L1922+60
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r1, r2, #21
-	lsls	r3, r3, r1
-	lsrs	r0, r0, r2
-	ldr	r2, .L1922+64
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L1865:
-	ldrh	r3, [r4, #6]
-	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #10]
-	adds	r3, r3, #1
-	strh	r3, [r4, #10]	@ movhi
-	movs	r3, #1
-	str	r3, [sp, #48]
-.L1857:
-	add	fp, fp, #1
-	uxth	fp, fp
-	b	.L1856
-.L1873:
-	ldrh	r1, [r4, #12]
-	add	r1, r1, r2
-	adds	r2, r2, #1
-	ldr	r1, [r3, r1, lsl #2]
-	adds	r1, r1, #1
-	itt	ne
-	addne	r7, r7, #1
-	uxthne	r7, r7
-	b	.L1871
-.L1923:
-	.align	2
-.L1922:
-	.word	.LANCHOR22
-	.word	.LC69
-	.word	.LC70
-	.word	.LC71
-	.word	.LC72
-	.word	.LANCHOR79
-	.word	.LANCHOR82
-	.word	.LC74
-	.word	.LANCHOR69
-	.word	.LANCHOR139
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LC73
-	.word	.LANCHOR133
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR130
-	.word	.LANCHOR56
-	.word	.LANCHOR46
-.L1878:
-	ldr	r3, [sp, #48]
-	cbz	r3, .L1876
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bls	.L1876
-	mov	r0, r4
-	bl	ftl_get_new_free_page
-	ldr	r3, [r10]
-	mov	r8, r0
-	lsls	r3, r3, #19
-	bpl	.L1877
-	mov	r1, r0
-	ldr	r0, .L1924
-	bl	printf
-.L1877:
-	ldr	r3, [fp]
-	mov	r0, r8
-	ldr	r2, [r5, #12]
-	ldr	r1, [r5, #4]
-	ldr	r3, [r3, #8]
-	str	r3, [r2]
-	mov	r3, #-1
-	str	r3, [r2, #4]
-	str	r3, [r2, #8]
-	movs	r3, #0
-	str	r3, [r2, #12]
-	str	r3, [r1]
-	ldr	r3, .L1924+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_prog_ppa_page
-	ldrh	r0, [r4]
-	bl	ftl_vpn_decrement
-.L1876:
-	adds	r7, r7, #1
-	b	.L1875
-.L1879:
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1
-	bne	.L1850
-	mov	r0, r4
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	ftl_write_last_log_page
-.L1867:
-	ldr	r0, [r5, #12]
-	ldr	r3, .L1924+8
-	ldr	r2, [r0, #4]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bcs	.L1865
-	ldr	r3, .L1924+12
-	ldrb	r1, [r4, #9]	@ zero_extendqisi2
-	ldrh	r2, [r4, #10]
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
-	subs	r3, r3, #1
-	cmp	r2, r3
-	bge	.L1865
-	ldr	r3, .L1924+16
-	ldr	r6, [r0]
-	ldr	r3, [r3]
-	ldr	r1, [r3, #8]
-	cmp	r6, r1
-	it	hi
-	strhi	r6, [r3, #8]
-	ldrh	r3, [r4, #12]
-	ldr	r1, [r0, #8]
-	ldr	r0, [r0, #4]
-	add	r2, r2, r3
-	uxth	r2, r2
-	bl	lpa_hash_update_ppa
-	b	.L1865
-.L1850:
-	add	sp, sp, #56
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1925:
+.L1679:
+	adds	r4, r4, #1
+	b	.L1674
+.L1676:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1681
+.L1683:
 	.align	2
-.L1924:
-	.word	.LC75
-	.word	.LANCHOR45
-	.word	.LANCHOR47
-	.word	.LANCHOR79
-	.word	.LANCHOR46
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",%progbits
+.L1682:
+	.word	.LC95
+	.word	.LC96
+	.word	.LC97
+	.word	.LC94
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",%progbits
 	.align	1
-	.global	pm_write_page
+	.global	hynix_get_read_retry_default
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_write_page, %function
-pm_write_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r3, .L1795
+	cmp	r0, #2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	mov	r1, #173
+	mov	r2, #174
 	mov	r4, r0
-	ldr	r7, .L1937
-	mov	r8, r1
-	mov	r6, r7
-.L1932:
-	ldr	r3, [r7]
-	ldr	r2, [r3, #48]
-	ldrh	r1, [r3, #696]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	ldr	r2, .L1937+4
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcs	.L1928
-	ldrh	r2, [r3, #692]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1929
-.L1928:
-	bl	pm_alloc_new_blk
-	movs	r0, #0
-	bl	ftl_info_flush
-.L1929:
-	ldr	r2, [r6]
-	movw	r1, #65535
-	ldrh	r3, [r2, #692]
-	cmp	r3, r1
-	bne	.L1930
-	movs	r2, #224
-	ldr	r1, .L1937+8
-	ldr	r0, .L1937+12
-	bl	printf
-.L1931:
-	b	.L1931
-.L1930:
-	ldr	r1, .L1937+16
-	ldrh	r2, [r2, #696]
-	ldr	r10, .L1937+28
-	ldrh	r5, [r1]
-	movs	r1, #0
-	ldr	r0, [r10]
-	mla	r5, r3, r5, r2
-	movs	r2, #64
-	bl	ftl_memset
-	ldr	r2, [r6]
-	ldr	r3, [r10]
-	ldrb	r0, [r2, #694]	@ zero_extendqisi2
-	str	r4, [r3]
-	ldr	r1, [r2, #48]
-	ldr	r2, .L1937+20
-	str	r1, [r3, #4]
-	mov	r1, r5
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp]
-	mov	r2, r8
-	bl	ftl_prog_page
-	ldr	r2, [r6]
-	ldrh	r3, [r2, #696]
+	ldr	fp, [r3]
+	add	r3, fp, #128
+	strb	r0, [fp, #112]
+	str	r3, [sp]
+	mov	r3, #172
+	strb	r3, [fp, #128]
+	mov	r3, #175
+	strb	r1, [fp, #129]
+	strb	r2, [fp, #130]
+	strb	r3, [fp, #131]
+	bne	.L1685
+	movs	r3, #167
+	mov	r8, #7
+	strb	r3, [fp, #128]
+	movs	r2, #247
+	ldr	r3, .L1795+4
+	strb	r2, [r3, #17]
+.L1789:
+	mov	r10, #4
+	b	.L1686
+.L1685:
+	cmp	r0, #3
+	bne	.L1687
+	add	r2, fp, #127
+	movs	r3, #176
+.L1688:
+	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
-	uxth	r3, r3
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1688
+.L1790:
+	mov	r8, #8
+	mov	r10, r8
+.L1686:
+	subs	r3, r4, #1
 	cmp	r3, #1
-	strh	r3, [r2, #696]	@ movhi
-	beq	.L1932
-	adds	r0, r0, #1
-	bne	.L1933
-.L1927:
-	mov	r1, r5
-	ldr	r0, .L1937+24
-	bl	printf
-	b	.L1932
-.L1933:
-	ldrh	r3, [r2, #698]
-	movs	r0, #0
-	cmp	r4, r3
-	itt	cc
-	addcc	r4, r4, #176
-	strcc	r5, [r2, r4, lsl #2]
-	add	sp, sp, #12
+	bhi	.L1694
+	movs	r5, #0
+.L1695:
+	ldr	r3, .L1795+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r5
+	cmp	r2, r3
+	bhi	.L1700
+.L1701:
+	strb	r10, [fp, #113]
+	strb	r8, [fp, #114]
+	add	sp, sp, #56
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1938:
-	.align	2
-.L1937:
-	.word	.LANCHOR46
-	.word	.LANCHOR79
-	.word	.LANCHOR140
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LC76
-	.word	.LANCHOR141
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.flash_info_flush,"ax",%progbits
-	.align	1
-	.global	flash_info_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_info_flush, %function
-flash_info_flush:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #64
-	ldr	r5, .L1947
-	movs	r1, #0
-	movs	r7, #0
-	ldr	r6, .L1947+4
-	ldr	r0, [r5]
-	bl	ftl_memset
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1687:
+	cmp	r0, #4
+	bne	.L1689
+	movs	r0, #204
+	strb	r1, [fp, #133]
+	strb	r0, [fp, #128]
+	movs	r0, #191
+	strb	r0, [fp, #129]
+	movs	r0, #170
+	strb	r0, [fp, #130]
+	movs	r0, #171
+	strb	r0, [fp, #131]
+	movs	r0, #205
+	strb	r0, [fp, #132]
+	strb	r2, [fp, #134]
+	strb	r3, [fp, #135]
+	b	.L1790
+.L1689:
+	cmp	r0, #5
+	bne	.L1690
+	movs	r3, #56
+	mov	r8, #8
+	strb	r3, [fp, #128]
+	movs	r3, #57
+	strb	r3, [fp, #129]
+	movs	r3, #58
+	strb	r3, [fp, #130]
+	movs	r3, #59
+	strb	r3, [fp, #131]
+	b	.L1789
+.L1690:
+	cmp	r0, #6
+	bne	.L1691
+	movs	r3, #14
+	mov	r8, #12
+	strb	r3, [fp, #128]
+	movs	r3, #15
+	strb	r3, [fp, #129]
 	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r6]
-	ldr	r0, .L1947+8
-	bl	rknand_print_hex
-	ldr	r4, [r6]
-	ldr	r1, [r4, #8]
-	add	r0, r4, #16
-	bl	js_hash
-	str	r5, [sp, #8]
-	ldr	r5, .L1947+12
-	str	r0, [r4, #12]
-	mov	r8, r5
-.L1940:
-	ldr	fp, .L1947+32
-	ldrb	r10, [r5]	@ zero_extendqisi2
-	ldrh	r4, [r5, #2]
-	ldrh	r3, [fp]
-	mov	r1, r10
-	ldr	r0, .L1947+16
-	mov	r2, r4
-	str	r3, [sp, #12]
-	bl	printf
-	ldr	r2, .L1947+20
-	ldrh	r0, [r5, #2]
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r2]
-	subs	r2, r2, #1
-	cmp	r0, r2
-	blt	.L1941
-	ldr	r4, [r6]
-	mov	r10, #0
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	strh	r10, [r5, #2]	@ movhi
-	ldr	r3, [r4, #4]
-	mov	r0, r4
-	ldr	r1, [r4, #8]
+	strb	r3, [fp, #130]
+	movs	r3, #17
+	strb	r3, [fp, #131]
+	b	.L1789
+.L1691:
+	cmp	r0, #7
+	bne	.L1692
+	add	r2, fp, #127
+	movs	r3, #176
+.L1693:
+	strb	r3, [r2, #1]!
 	adds	r3, r3, #1
-	str	r3, [r4, #4]
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	strb	r2, [r5, #1]
-	ldrh	r2, [r4, #16]
-	strb	r3, [r5]
-	str	r3, [sp, #12]
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1693
+	movs	r3, #212
+	mov	r8, #12
+	strb	r3, [fp, #136]
+	movs	r3, #213
+	strb	r3, [fp, #137]
+	mov	r10, #10
+	b	.L1686
+.L1692:
+	cmp	r0, #8
+	mov	r3, #7
+	bne	.L1748
+	strb	r3, [fp, #129]
+	movs	r3, #9
+	movs	r2, #6
+	strb	r3, [fp, #131]
+	movs	r3, #10
+	strb	r2, [fp, #128]
+	strb	r0, [fp, #130]
+	mov	r8, #50
+	strb	r3, [fp, #132]
+	mov	r10, #5
+	b	.L1686
+.L1748:
+	mov	r8, r3
+	b	.L1789
+.L1700:
+	ldr	r2, .L1795+12
+	movs	r1, #160
+	ldr	r0, [sp]
+	add	r7, r10, #-1
+	add	r6, fp, #127
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	ldr	r2, .L1795+16
+	uxtab	r7, r0, r7
+	ldr	r4, [r2]
+	mla	r1, r1, r3, fp
+	add	r4, r4, r3, lsl #8
+	adds	r1, r1, #144
+	subs	r2, r1, #1
+	addw	r3, r4, #2056
+.L1696:
+	str	r2, [sp, #8]
+	movs	r2, #55
+	str	r2, [r3]
+	ldrb	r0, [r6, #1]!	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	str	r0, [r4, #2052]
+	movs	r0, #80
+	bl	timer_delay_ns
+	ldr	r0, [r4, #2048]
+	cmp	r7, r6
+	ldr	r2, [sp, #8]
+	ldr	r3, [sp, #4]
+	strb	r0, [r2, #1]!
+	bne	.L1696
+	ldr	r7, .L1795+4
+	mov	r0, r1
+	movs	r2, #0
+.L1697:
+	movs	r3, #1
+	adds	r6, r7, r2
+.L1698:
+	ldrb	r4, [r6, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	ip, [r0]	@ zero_extendqisi2
+	add	r4, r4, ip
+	strb	r4, [r0, r3, lsl #3]
+	adds	r3, r3, #1
+	cmp	r3, #7
+	bne	.L1698
 	adds	r2, r2, #1
-	strh	r2, [r0, #16]!	@ movhi
-	bl	js_hash
-	ldr	r3, [sp, #12]
-	str	r0, [r4, #12]
-	mov	r0, r10
-	ldrh	r4, [fp]
-	muls	r4, r3, r4
-	mov	r1, r4
-.L1946:
-	bl	flash_erase_block
-.L1942:
-	ldr	r2, [r6]
-	mov	r10, #1
-	ldr	r3, [sp, #8]
-	movs	r0, #0
-	ldr	r1, [r2, #4]
-	ldr	r3, [r3]
-	str	r1, [r3]
-	ldr	r1, .L1947+24
-	str	r1, [r3, #4]
-	movs	r1, #4
-	stm	sp, {r1, r10}
-	mov	r1, r4
-	bl	flash_prog_page_en
-	ldrh	r3, [r8, #2]
 	adds	r0, r0, #1
-	add	r3, r3, r10
-	strh	r3, [r8, #2]	@ movhi
-	bne	.L1943
-	mov	r1, r4
-	ldr	r0, .L1947+28
-	bl	printf
-	b	.L1940
-.L1945:
-	mov	r7, r10
-	b	.L1940
-.L1941:
-	mla	r4, r10, r3, r4
-	cmp	r0, #0
-	bne	.L1942
-	mov	r1, r4
-	b	.L1946
-.L1943:
-	cmp	r7, #0
-	beq	.L1945
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1948:
-	.align	2
-.L1947:
-	.word	.LANCHOR116
-	.word	.LANCHOR5
-	.word	.LC77
-	.word	.LANCHOR117
-	.word	.LC78
-	.word	.LANCHOR97
-	.word	1398362953
-	.word	.LC79
-	.word	.LANCHOR13
-	.size	flash_info_flush, .-flash_info_flush
-	.section	.text.nand_flash_init,"ax",%progbits
-	.align	1
-	.global	nand_flash_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	nand_flash_init, %function
-nand_flash_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r8, .L2005+140
-	movs	r2, #2
-	ldr	r3, .L2005
-	ldr	r7, .L2005+4
-	mov	r6, r8
-	ldr	r4, .L2005+8
-	strb	r2, [r3]
-	bl	nandc_init
-	str	r4, [r7]
-.L1955:
-	lsl	r10, r5, #3
-	uxtb	r0, r5
-	add	r1, r8, r10
-	bl	flash_read_id
-	cbnz	r5, .L1950
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bls	.L1951
-.L1953:
-	mvn	r0, #1
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1951:
-	ldrb	r3, [r8, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L1953
-.L1950:
-	ldrb	r3, [r6, r10]	@ zero_extendqisi2
+	cmp	r2, #4
+	bne	.L1697
+	movs	r3, #0
 	adds	r5, r5, #1
-	cmp	r3, #181
-	itt	eq
-	moveq	r3, #44
-	strbeq	r3, [r6, r10]
-	cmp	r5, #4
-	bne	.L1955
-	ldr	r5, .L2005+12
-	mov	r8, #0
-	ldr	r10, .L2005+140
-.L1958:
-	ldrb	r2, [r5, #-1]	@ zero_extendqisi2
-	mov	r1, r10
-	mov	r0, r5
-	lsl	fp, r8, #5
-	bl	flash_mem_cmp8
-	cmp	r0, #0
-	bne	.L1956
-	ldr	r5, .L2005+16
-	ldr	r3, .L2005+20
-	add	r5, r5, fp
-	ldrb	r2, [r5, #22]	@ zero_extendqisi2
-	mov	r1, r3
-.L1957:
-	lsl	ip, r0, #5
-	ldrb	ip, [ip, r3]	@ zero_extendqisi2
-	cmp	ip, r2
-	beq	.L1959
-	adds	r0, r0, #1
-	cmp	r0, #4
-	bne	.L1957
-.L1959:
-	add	r1, r1, r0, lsl #5
-	movs	r2, #32
-	ldr	r0, .L2005+24
-	bl	ftl_memcpy
-	movs	r2, #32
-	mov	r1, r5
-	ldr	r0, .L2005+8
-	bl	ftl_memcpy
-	ldr	r2, .L2005+28
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	mov	r8, r2
-	cmp	r3, #8
-	bhi	.L1960
-	ldrb	r2, [r4, #20]	@ zero_extendqisi2
-	cmp	r2, #60
-	bls	.L1961
-	movs	r2, #60
-	strb	r2, [r4, #20]
-.L1961:
-	cmp	r3, #8
-	bne	.L1960
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #44
-	bne	.L1960
-	ldrb	r3, [r4, #28]	@ zero_extendqisi2
-	cmp	r3, #2
-	itt	eq
-	moveq	r3, #0
-	strbeq	r3, [r4, #28]
-.L1960:
-	mov	r0, #16384
-	ldr	r6, .L2005+32
-	bl	ftl_malloc
-	ldr	r3, .L2005+36
-	mov	r10, #0
-	str	r0, [r3]
-	mov	r0, #16384
-	bl	ftl_malloc
-	ldr	r3, .L2005+40
-	str	r0, [r3]
-	mov	r0, #2048
-	bl	ftl_malloc
-	str	r0, [r6]
-	movs	r0, #64
-	bl	ftl_malloc
-	ldr	r3, .L2005+44
-	str	r0, [r3]
-	movs	r0, #64
-	bl	ftl_malloc
-	ldr	r3, .L2005+48
-	str	r0, [r3]
-	movs	r0, #64
-	bl	ftl_malloc
-	ldr	r3, .L2005+52
-	str	r0, [r3]
-	ldr	r3, .L2005+56
-	strb	r10, [r3]
-	bl	flash_die_info_init
-	ldrb	r0, [r4, #18]	@ zero_extendqisi2
-	bl	flash_lsb_page_tbl_build
-	ldrb	r0, [r4, #20]	@ zero_extendqisi2
-	bl	nandc_bch_sel
-	ldr	r2, [r7]
-	ldr	r7, .L2005+60
-	ldrh	r3, [r2, #16]
-	ubfx	r5, r3, #3, #1
-	lsrs	r1, r3, #8
-	and	r0, r1, #7
-	strb	r0, [r7]
-	ldr	r0, .L2005+64
-	strb	r5, [r0]
-	ubfx	r5, r3, #4, #1
-	ldr	r0, .L2005+68
-	strb	r5, [r0]
-	ubfx	r5, r3, #12, #1
-	ldr	r0, .L2005+72
-	strb	r5, [r0]
-	ubfx	r5, r3, #13, #1
-	ldr	r0, .L2005+76
-	ubfx	r3, r3, #14, #1
-	strb	r5, [r0]
-	ldr	r0, .L2005+80
-	ldr	r5, .L2005+84
-	strb	r3, [r0]
-	movs	r0, #60
-	ldrb	r3, [r2, #28]	@ zero_extendqisi2
-	ldr	r2, .L2005+88
-	str	r10, [r5]
-	strb	r3, [r2]
-	ldr	r2, .L2005+92
-	strb	r0, [r2]
-	ldrb	r0, [r8]	@ zero_extendqisi2
-	cmp	r0, #9
-	itt	eq
-	moveq	r0, #70
-	strbeq	r0, [r2]
-	ldr	r2, .L2005+96
-	ldrh	r0, [r4, #16]
-	strb	r3, [r2]
-	ldrb	r3, [r4, #19]	@ zero_extendqisi2
-	tst	r0, #64
-	ldr	r2, .L2005+100
-	strb	r3, [r2]
-	mov	r4, r2
-	beq	.L1964
-	sub	r2, r3, #17
-	cmp	r2, #2
-	bhi	.L1965
-	ldr	r2, .L2005+104
-	cmp	r3, #19
-	ldr	r3, .L2005+108
-	str	r2, [r5]
-	ite	ne
-	movne	r2, #7
-	moveq	r2, #15
-.L2003:
-	strb	r2, [r3]
-.L1964:
-	ldr	r3, .L2005+112
-	tst	r1, #1
-	mov	r2, #0
-	mov	r0, #4
-	strb	r2, [r3]
-	mov	r8, r3
-	beq	.L1975
-	bl	nandc_set_if_mode
-	movs	r0, #1
-	bl	flash_set_interface_mode
-	movs	r0, #1
-.L1975:
-	bl	nandc_set_if_mode
-	bl	flash_info_blk_init
-	adds	r2, r0, #1
-	beq	.L1949
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	cmp	r3, #6
-	itt	ls
-	ldrls	r3, .L2005+116
-	strls	r3, [r5]
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	lsls	r3, r3, #29
-	bmi	.L1978
-.L1979:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1956:
-	add	r8, r8, #1
-	adds	r5, r5, #32
-	cmp	r8, #24
-	bne	.L1958
-	b	.L1953
-.L1965:
-	cmp	r3, #33
-	beq	.L1968
-	sub	r2, r3, #65
-	cmp	r2, #1
-	bhi	.L1969
-.L1968:
-	ldr	r3, .L2005+120
+	strb	r3, [r1, #16]
+	strb	r3, [r1, #24]
+	strb	r3, [r1, #32]
+	strb	r3, [r1, #40]
+	strb	r3, [r1, #48]
+	strb	r3, [r1, #41]
+	strb	r3, [r1, #49]
+	b	.L1695
+.L1694:
+	subs	r3, r4, #3
+	cmp	r3, #5
+	bhi	.L1701
+	smulbb	r3, r8, r10
+	asrs	r2, r3, #1
+	lsls	r3, r3, #4
+	str	r3, [sp, #48]
+	lsls	r3, r2, #2
+	str	r2, [sp, #8]
+	str	r3, [sp, #44]
+	lsls	r3, r2, #1
+	str	r3, [sp, #24]
+	movs	r3, #0
+.L1794:
+	str	r3, [sp, #20]
+	ldr	r3, .L1795+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	cmp	r2, r3
+	bls	.L1701
+	ldr	r2, .L1795+12
+	movs	r6, #255
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r3
+	str	r3, [sp]
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [sp]
+	movs	r1, #160
+	ldr	r2, [sp]
+	mla	r1, r1, r3, fp
+	add	r3, r1, #144
+	str	r3, [sp, #40]
+	ldr	r3, .L1795+16
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	str	r6, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	cmp	r4, #8
+	bne	.L1703
+	add	r3, fp, #144
+	movs	r2, #23
+	str	r3, [sp, #40]
+	movs	r3, #120
+	str	r3, [r5, #2056]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	movs	r1, #25
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r2, [r5, #2056]
 	movs	r2, #4
-	str	r3, [r5]
-	ldr	r3, .L2005+124
-	strb	r2, [r3]
-.L2004:
-	movs	r2, #7
-	ldr	r3, .L2005+108
-	b	.L2003
-.L1969:
-	sub	r2, r3, #67
-	uxtb	r2, r2
-	cmp	r2, #1
-	bls	.L1970
-	sub	r0, r3, #34
-	cmp	r0, #1
-	bhi	.L1971
-.L1970:
-	ldr	r0, .L2005+120
-	cmp	r3, #35
-	str	r0, [r5]
-	ldr	r0, .L2005+108
-	beq	.L1972
-	cmp	r3, #68
-	beq	.L1972
-	movs	r3, #7
-.L2002:
-	cmp	r2, #1
-	strb	r3, [r0]
-	it	ls
-	movls	r2, #4
-	ldr	r3, .L2005+124
-	it	hi
-	movhi	r2, #5
-	b	.L2003
-.L1972:
-	movs	r3, #17
-	b	.L2002
-.L1971:
-	subs	r3, r3, #36
+	str	r2, [r5, #2056]
+	str	r1, [r5, #2056]
+	movs	r1, #218
+	str	r1, [r5, #2056]
+	movs	r1, #21
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r1, [r5, #2052]
+	str	r2, [r5, #2052]
+	str	r3, [r5, #2052]
+.L1704:
+	ldm	sp, {r2, r3}
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
+	bl	nandc_wait_flash_ready
+	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L1964
-	ldr	r3, .L2005+128
-	str	r3, [r5]
-	b	.L2004
-.L1978:
-	ldr	r3, [r6]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1979
-	ldr	r2, .L2005+132
-	movs	r0, #0
-	ldr	r3, .L2005+136
-	ldrh	r1, [r2]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r1, r3, r1
-	bl	flash_ddr_para_scan
-	ldrb	r4, [r8]	@ zero_extendqisi2
-	cmp	r4, #0
-	bne	.L1979
-	ldr	r3, [r6]
-	strb	r4, [r3, #19]
-	bl	flash_info_flush
-	b	.L1979
-.L1949:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2006:
+	str	r3, [sp, #28]
+	bls	.L1750
+	cmp	r4, #8
+	beq	.L1750
+	cmp	r4, #7
+	ite	ne
+	movne	r2, #2
+	moveq	r2, #32
+.L1710:
+	ldr	r3, .L1795+20
+	subs	r2, r2, #1
+	ldr	r5, [sp, #4]
+	ldr	r6, [sp]
+	ldr	r3, [r3]
+	add	r7, r5, r6, lsl #8
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1711:
+	ldr	r5, [r7, #2048]
+	strb	r5, [r0, #1]!
+	cmp	r2, r0
+	bne	.L1711
+	cmp	r4, #8
+	bne	.L1712
+	movs	r2, #0
+.L1714:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #50
+	beq	.L1713
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #5
+	beq	.L1713
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1714
+.L1715:
+	movs	r1, #0
+	ldr	r0, .L1795+24
+	bl	printf
+.L1717:
+	b	.L1717
+.L1703:
+	cmp	r4, #4
+	mov	r3, #54
+	str	r3, [r5, #2056]
+	bne	.L1705
+	movs	r3, #64
+	str	r6, [r5, #2052]
+	str	r3, [r5, #2048]
+	movs	r3, #204
+.L1791:
+	str	r3, [r5, #2052]
+	movs	r3, #77
+	b	.L1792
+.L1796:
 	.align	2
-.L2005:
-	.word	.LANCHOR20
-	.word	.LANCHOR34
-	.word	.LANCHOR19
-	.word	.LANCHOR142+1
-	.word	.LANCHOR142
-	.word	.LANCHOR143
-	.word	.LANCHOR103
-	.word	.LANCHOR7
-	.word	.LANCHOR5
-	.word	.LANCHOR119
-	.word	.LANCHOR111
-	.word	.LANCHOR118
-	.word	.LANCHOR112
-	.word	.LANCHOR116
-	.word	.LANCHOR123
-	.word	.LANCHOR25
-	.word	.LANCHOR144
-	.word	.LANCHOR23
-	.word	.LANCHOR66
-	.word	.LANCHOR74
-	.word	.LANCHOR12
-	.word	.LANCHOR115
-	.word	.LANCHOR11
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.word	.LANCHOR1
-	.word	micron_read_retrial
-	.word	.LANCHOR113
-	.word	.LANCHOR35
-	.word	hynix_read_retrial
-	.word	toshiba_read_retrial
-	.word	.LANCHOR4
-	.word	toshiba_3d_read_retrial
+.L1795:
+	.word	.LANCHOR27
+	.word	.LANCHOR155
+	.word	.LANCHOR18
+	.word	.LANCHOR30
 	.word	.LANCHOR13
-	.word	.LANCHOR117
-	.word	.LANCHOR26
-	.size	nand_flash_init, .-nand_flash_init
-	.section	.text.ftl_sysblk_dump,"ax",%progbits
+	.word	.LANCHOR156
+	.word	.LC98
+.L1705:
+	subs	r3, r4, #5
+	cmp	r3, #1
+	bhi	.L1707
+	ldrb	r3, [fp, #128]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #82
+.L1792:
+	str	r3, [r5, #2048]
+.L1706:
+	ldm	sp, {r2, r3}
+	cmp	r4, #6
+	add	r3, r3, r2, lsl #8
+	mov	r2, #22
+	str	r2, [r3, #2056]
+	mov	r2, #23
+	str	r2, [r3, #2056]
+	mov	r2, #4
+	str	r2, [r3, #2056]
+	mov	r2, #25
+	str	r2, [r3, #2056]
+	mov	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	it	eq
+	moveq	r2, #31
+	str	r2, [r3, #2052]
+	movs	r2, #2
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+	b	.L1704
+.L1707:
+	cmp	r4, #7
+	bne	.L1706
+	movs	r3, #174
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	movs	r3, #176
+	b	.L1791
+.L1750:
+	movs	r2, #16
+	b	.L1710
+.L1713:
+	cmp	r1, #6
+	bhi	.L1715
+.L1716:
+	ldr	r3, .L1797
+	ldr	ip, [r3]
+	mov	r3, ip
+.L1726:
+	ldr	r1, [sp, #48]
+	sub	r2, r3, ip
+	cmp	r1, r2
+	bgt	.L1727
+	ldr	r3, .L1797
+	ldr	r1, [r3]
+	ldr	r3, [sp, #24]
+	adds	r2, r1, r3
+	movs	r3, #8
+.L1729:
+	mov	r5, r2
+	movs	r0, #0
+.L1728:
+	ldrh	r6, [r5]
+	adds	r0, r0, #1
+	mvns	r6, r6
+	strh	r6, [r5], #2	@ movhi
+	ldr	r6, [sp, #8]
+	cmp	r6, r0
+	bgt	.L1728
+	ldr	r0, [sp, #44]
+	subs	r3, r3, #1
+	add	r2, r2, r0
+	bne	.L1729
+	mov	r6, r1
+	str	r3, [sp, #16]
+.L1730:
+	movs	r0, #0
+	mov	r2, r0
+.L1734:
+	movs	r3, #1
+	mov	lr, r6
+	lsl	r5, r3, r2
+	movs	r3, #0
+	str	r3, [sp, #12]
+	str	r5, [sp, #32]
+	movs	r5, #16
+	str	r5, [sp, #36]
+.L1732:
+	ldrh	r3, [lr]
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #32]
+	mov	r5, r3
+	ldr	r3, [sp, #52]
+	bics	r3, r5, r3
+	ittt	eq
+	ldreq	r3, [sp, #12]
+	addeq	r3, r3, #1
+	streq	r3, [sp, #12]
+	ldr	r3, [sp, #24]
+	add	lr, lr, r3
+	ldr	r3, [sp, #36]
+	subs	r3, r3, #1
+	str	r3, [sp, #36]
+	bne	.L1732
+	ldr	r3, [sp, #12]
+	adds	r2, r2, #1
+	cmp	r3, #8
+	ittt	hi
+	ldrhi	r3, [sp, #32]
+	orrhi	r0, r0, r3
+	uxthhi	r0, r0
+	cmp	r2, #16
+	bne	.L1734
+	ldr	r3, [sp, #16]
+	strh	r0, [r6], #2	@ movhi
+	adds	r3, r3, #1
+	str	r3, [sp, #16]
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #8]
+	cmp	r3, r2
+	bgt	.L1730
+	subs	r2, r1, #4
+	add	r0, r1, #28
+	movs	r3, #0
+.L1737:
+	ldr	r5, [r2, #4]!
+	cbnz	r5, .L1736
+	adds	r3, r3, #1
+.L1736:
+	cmp	r0, r2
+	bne	.L1737
+	cmp	r3, #7
+	ble	.L1738
+	ldr	r0, .L1797+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1797+8
+	bl	printf
+.L1739:
+	b	.L1739
+.L1712:
+	cmp	r4, #7
+	bne	.L1718
+	movs	r2, #0
+.L1720:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1719
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1719
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1720
+.L1721:
+	movs	r1, #0
+	ldr	r0, .L1797+8
+	bl	printf
+.L1722:
+	b	.L1722
+.L1719:
+	cmp	r1, #6
+	bls	.L1716
+	b	.L1721
+.L1718:
+	cmp	r4, #6
+	bne	.L1716
+	adds	r3, r3, #7
+.L1723:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1716
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1716
+	cmp	r3, r1
+	bne	.L1723
+	movs	r1, #0
+	ldr	r0, .L1797+8
+	bl	printf
+.L1725:
+	b	.L1725
+.L1727:
+	ldr	r2, [r7, #2048]
+	strb	r2, [r3], #1
+	b	.L1726
+.L1738:
+	cmp	r4, #6
+	beq	.L1752
+	cmp	r4, #7
+	beq	.L1753
+	cmp	r4, #8
+	ite	ne
+	movne	r0, #8
+	moveq	r0, #5
+.L1740:
+	add	r3, r10, #-1
+	ldr	r1, [sp, #40]
+	uxtb	r3, r3
+	movs	r5, #0
+	adds	r3, r3, #1
+.L1741:
+	mov	lr, r1
+	mov	r2, ip
+.L1742:
+	ldrb	r6, [r2], #1	@ zero_extendqisi2
+	strb	r6, [lr], #1
+	sub	r6, r2, ip
+	uxtb	r6, r6
+	cmp	r10, r6
+	bhi	.L1742
+	adds	r5, r5, #1
+	add	ip, ip, r3
+	cmp	r8, r5
+	add	r1, r1, r0
+	bgt	.L1741
+	ldm	sp, {r2, r3}
+	movs	r6, #255
+	add	r5, r3, r2, lsl #8
+	str	r6, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #28]
+	cmp	r3, #1
+	bhi	.L1744
+	movs	r3, #54
+	movs	r2, #22
+	str	r3, [r5, #2056]
+	ldrb	r3, [fp, #128]	@ zero_extendqisi2
+	str	r3, [r7, #2052]
+	movs	r3, #0
+	str	r3, [r7, #2048]
+	str	r2, [r5, #2056]
+	str	r3, [r5, #2056]
+	str	r3, [r7, #2052]
+	str	r3, [r7, #2052]
+	movs	r3, #48
+	str	r6, [r7, #2052]
+	str	r6, [r7, #2052]
+	str	r6, [r7, #2052]
+.L1793:
+	str	r3, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	b	.L1794
+.L1752:
+	movs	r0, #4
+	b	.L1740
+.L1753:
+	movs	r0, #10
+	b	.L1740
+.L1744:
+	cmp	r4, #8
+	ite	eq
+	moveq	r3, #190
+	movne	r3, #56
+	b	.L1793
+.L1798:
+	.align	2
+.L1797:
+	.word	.LANCHOR156
+	.word	.LC99
+	.word	.LC98
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
 	.align	1
-	.global	ftl_sysblk_dump
+	.global	flash_get_read_retry_tbl
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_sysblk_dump, %function
-ftl_sysblk_dump:
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1801
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r0, #1
+	cmp	r3, #7
+	bhi	.L1799
+	b	hynix_get_read_retry_default
+.L1799:
+	bx	lr
+.L1802:
+	.align	2
+.L1801:
+	.word	.LANCHOR31
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",%progbits
+	.align	1
+	.global	nandc_xfer_done
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r0
-	sub	sp, sp, #48
-	movs	r0, #1
-	movs	r6, #0
-	bl	buf_alloc
-	ldr	r3, [r0, #4]
-	mov	r4, r0
-	mov	r5, r6
-	str	r3, [sp, #44]
-.L2008:
-	ldr	r3, .L2015
-	ldrh	r2, [r3]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L2010
-	mov	r0, r4
-	bl	buf_free
-	cmp	r5, #0
-	beq	.L2011
-	movw	r2, #655
-	ldr	r1, .L2015+4
-	ldr	r0, .L2015+8
-	bl	printf
-.L2012:
-	b	.L2012
-.L2010:
-	ldr	r3, .L2015+12
-	uxth	r7, r6
-	ldr	r2, [r4, #12]
-	ldr	r1, [r4, #4]
-	ldrh	r8, [r3]
-	ldr	r3, .L2015+16
-	mla	r8, fp, r8, r7
+	ldr	r3, .L1841
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	movs	r4, #0
+	ldr	r7, .L1841+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r8
-	bl	ftl_read_ppa_page
-	ldr	r2, [r4, #12]
-	mov	r10, r0
-	ldr	r3, [r4, #4]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #32]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #28]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #24]
-	mov	r1, fp
-	ldr	r2, [r2]
-	str	r2, [sp, #20]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #8]
-	mov	r2, r7
+	ldr	r5, .L1841+8
+	strb	r4, [r7]
+	cmp	r3, #9
+	ldr	r6, [r5]
+	bne	.L1804
+	ldr	r3, [r6, #16]
+	str	r3, [sp]
+	ldr	r3, [r6, #48]
+	ubfx	r3, r3, #1, #1
+	cbnz	r3, .L1805
+	ldr	r7, .L1841+12
+	mov	r4, r3
+	ldr	r8, .L1841+32
+.L1806:
+	ldr	r3, [sp]
+	lsls	r0, r3, #11
+	bmi	.L1809
+	ldr	r3, [r5]
+	adds	r4, r4, #1
+	ldr	r3, [r3, #16]
+	str	r3, [sp]
+	bics	r3, r4, #-16777216
+	bne	.L1806
+	ldr	r2, [sp]
+	mov	r1, r4
+	ldr	r3, [r6, #64]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #6
+	bl	printf
+	movs	r3, #64
+	movs	r2, #4
+	ldr	r1, [r5]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1806
+.L1805:
+	ldr	r8, .L1841+24
+	ldr	r10, .L1841+32
+.L1807:
+	ldr	r2, [r6, #64]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #6
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L1809
+	ldr	r3, [r5]
 	ldr	r3, [r3]
-	str	r0, [sp]
-	ldr	r0, .L2015+20
 	str	r3, [sp, #4]
-	mov	r3, r8
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #18
+	bpl	.L1808
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #14
+	bpl	.L1808
+	ldr	r1, [sp, #4]
+	ldr	r0, .L1841+16
+	ubfx	r1, r1, #17, #1
+.L1840:
 	bl	printf
-	ldr	r1, [sp, #44]
-	movs	r3, #32
+	b	.L1809
+.L1808:
+	ldr	r3, [sp]
+	adds	r4, r4, #1
+	ubfx	r3, r3, #22, #6
+	cmp	r4, r3, lsl #12
+	bne	.L1807
+	ldr	r2, [r6, #64]
+	mov	r1, r4
+	ldr	r3, [sp]
+	mov	r0, r8
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	movs	r3, #64
 	movs	r2, #4
-	ldr	r0, .L2015+24
-	add	r1, r1, #704
+	ldr	r1, [r5]
+	mov	r0, r10
 	bl	rknand_print_hex
-	cmp	r10, #-1
-	beq	.L2013
-	cmp	r10, #512
-	it	eq
-	moveq	r5, #1
-.L2009:
-	adds	r6, r6, #1
-	b	.L2008
-.L2013:
-	movs	r5, #1
-	b	.L2009
-.L2011:
-	mov	r0, r5
-	add	sp, sp, #48
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #18
+	bpl	.L1807
+	movs	r3, #1
+	strb	r3, [r7]
+.L1809:
+	ldr	r3, .L1841+20
+	movs	r2, #0
+	str	r2, [r3, #20]
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2016:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1804:
+	ldr	r3, [r6, #8]
+	str	r3, [sp]
+	ldr	r3, [r6, #16]
+	ubfx	r3, r3, #1, #1
+	cbnz	r3, .L1815
+	ldr	r7, .L1841+12
+	mov	r4, r3
+	ldr	r8, .L1841+32
+.L1816:
+	ldr	r3, [sp]
+	lsls	r3, r3, #11
+	bmi	.L1809
+	ldr	r3, [r5]
+	adds	r4, r4, #1
+	ldr	r3, [r3, #8]
+	str	r3, [sp]
+	bics	r3, r4, #-16777216
+	bne	.L1816
+	ldr	r2, [sp]
+	mov	r1, r4
+	ldr	r3, [r6, #28]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #5
+	bl	printf
+	movs	r3, #64
+	movs	r2, #4
+	ldr	r1, [r5]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1816
+.L1815:
+	ldr	r7, .L1841+24
+	ldr	r8, .L1841+32
+.L1817:
+	ldr	r2, [r6, #28]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L1809
+	ldr	r3, [r5]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #18
+	bpl	.L1818
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #14
+	bpl	.L1818
+	ldr	r1, [sp, #4]
+	ldr	r0, .L1841+28
+	b	.L1840
+.L1818:
+	adds	r4, r4, #1
+	bics	r3, r4, #-16777216
+	bne	.L1817
+	ldr	r2, [r6, #28]
+	mov	r1, r4
+	ldr	r3, [sp]
+	mov	r0, r7
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	movs	r3, #64
+	movs	r2, #4
+	ldr	r1, [r5]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1817
+.L1842:
 	.align	2
-.L2015:
-	.word	.LANCHOR79
-	.word	.LANCHOR147
-	.word	.LC0
-	.word	.LANCHOR75
-	.word	.LANCHOR45
-	.word	.LC73
-	.word	.LC80
-	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
-	.section	.text.dump_ftl_info,"ax",%progbits
+.L1841:
+	.word	.LANCHOR28
+	.word	.LANCHOR157
+	.word	.LANCHOR13
+	.word	.LC103
+	.word	.LC100
+	.word	.LANCHOR47
+	.word	.LC101
+	.word	.LC104
+	.word	.LC102
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",%progbits
 	.align	1
-	.global	dump_ftl_info
+	.global	nandc_xfer
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	dump_ftl_info, %function
-dump_ftl_info:
-	@ args = 0, pretend = 0, frame = 0
+	.type	nandc_xfer, %function
+nandc_xfer:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	ldr	r1, .L2018
-	ldr	r5, .L2018+4
-	ldrh	r3, [r1, #2]
-	ldrb	r2, [r1, #1]	@ zero_extendqisi2
-	ldr	r0, .L2018+8
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	bl	printf
-	ldr	r3, [r5]
-	ldr	r4, .L2018+12
-	ldr	r0, .L2018+16
-	ldrh	r2, [r3, #140]
-	ldrh	r1, [r3, #130]
-	bl	printf
-	ldr	r0, [r4]
-	ldr	r7, .L2018+20
-	ldrh	r6, [r0, #26]
-	ldrb	r3, [r0, #21]	@ zero_extendqisi2
-	ldrh	r2, [r0, #18]
-	ldrh	r1, [r0, #16]
-	str	r6, [sp, #4]
-	ldrh	r0, [r0, #22]
-	str	r0, [sp]
-	ldr	r0, .L2018+24
-	bl	printf
-	ldr	r0, [r4]
-	ldrh	r6, [r0, #58]
-	ldrb	r3, [r0, #53]	@ zero_extendqisi2
-	ldrh	r2, [r0, #50]
-	ldrh	r1, [r0, #48]
-	str	r6, [sp, #4]
-	ldrh	r0, [r0, #54]
-	ldr	r6, .L2018+28
-	str	r0, [sp]
-	ldr	r0, .L2018+32
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r1
+	ldr	r5, [sp, #32]
+	mov	r4, r2
+	mov	r6, r3
+	mov	r1, r4
+	mov	r2, r6
+	mov	r0, r8
+	mov	r3, r5
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cmp	r8, #0
+	bne	.L1862
+	ldr	r3, .L1881
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L1845
+	ldr	r7, .L1881+4
+	lsr	ip, r4, #2
+	movs	r2, #1
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r4, [r7]
+.L1846:
+	cmp	r1, ip
+	bcc	.L1850
+	ldr	r4, [r4]
+	cmp	r2, #0
+	it	ne
+	movne	r0, #512
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1852
+	mov	r1, r4
+	ldr	r0, .L1881+8
 	bl	printf
-	ldr	r0, [r4]
-	ldrh	r4, [r0, #90]
-	ldrb	r3, [r0, #85]	@ zero_extendqisi2
-	ldrh	r2, [r0, #82]
-	ldrh	r1, [r0, #80]
-	str	r4, [sp, #4]
-	ldrh	r0, [r0, #86]
-	ldr	r4, .L2018+36
-	str	r0, [sp]
-	ldr	r0, .L2018+40
+	ldr	r3, [r7]
+	mov	r0, #-1
+	orr	r4, r4, #131072
+	str	r4, [r3]
+.L1852:
+	lsls	r2, r4, #18
+	bpl	.L1853
+	ldr	r3, .L1881+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1853
+	mov	r1, r4
+	ldr	r0, .L1881+16
 	bl	printf
-	ldrh	r2, [r6]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L2018+44
-	ldr	r0, .L2018+48
-	muls	r3, r2, r3
-	ldr	r1, [r1]
-	movs	r2, #4
-	lsls	r3, r3, #1
-	bl	rknand_print_hex
-	ldr	r1, .L2018+52
-	movs	r2, #2
-	ldrh	r3, [r7]
-	ldr	r0, .L2018+56
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	ldr	r1, [r5]
-	movs	r3, #32
-	movs	r2, #4
-	ldr	r0, .L2018+60
-	add	r1, r1, #704
-	bl	rknand_print_hex
-	ldr	r1, .L2018+64
-	movs	r2, #4
-	ldrh	r3, [r7]
-	ldr	r0, .L2018+68
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-	mov	r3, #256
-	movs	r2, #2
-	ldr	r1, .L2018+72
-	ldr	r0, .L2018+76
-	bl	rknand_print_hex
-	ldrh	r2, [r6]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r1, .L2018+80
-	ldr	r0, .L2018+84
-	muls	r3, r2, r3
-	ldr	r1, [r1]
-	movs	r2, #2
-	lsls	r3, r3, #1
-	add	sp, sp, #12
+	ldr	r3, [r7]
+	movs	r2, #1
+	str	r2, [r3, #16]
+.L1880:
+	mov	r0, #-1
+.L1844:
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, lr}
-	b	rknand_print_hex
-.L2019:
-	.align	2
-.L2018:
-	.word	.LANCHOR131
-	.word	.LANCHOR46
-	.word	.LC81
-	.word	.LANCHOR60
-	.word	.LC82
-	.word	.LANCHOR54
-	.word	.LC83
-	.word	.LANCHOR79
-	.word	.LC84
-	.word	.LANCHOR69
-	.word	.LC85
-	.word	.LANCHOR82
-	.word	.LC86
-	.word	.LANCHOR56
-	.word	.LC87
-	.word	.LC80
-	.word	.LANCHOR57
-	.word	.LC88
-	.word	.LANCHOR81
-	.word	.LC89
-	.word	.LANCHOR83
-	.word	.LC90
-	.size	dump_ftl_info, .-dump_ftl_info
-	.section	.text.pm_ppa_update_check,"ax",%progbits
-	.align	1
-	.global	pm_ppa_update_check
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_ppa_update_check, %function
-pm_ppa_update_check:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r3, .L2027
-	movs	r4, #1
-	mov	r6, r1
-	mov	r7, r2
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsls	r4, r4, r3
-	ldr	r3, .L2027+4
-	lsr	r0, r2, r0
-	subs	r4, r4, #1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ands	r0, r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, .L2027+8
-	uxth	r0, r0
-	ldr	r3, [r3]
-	add	r0, r3, r0, lsl #2
-	ldrb	r1, [r0, #2]	@ zero_extendqisi2
-	lsrs	r1, r1, #5
-	cmp	r1, #1
-	beq	.L2021
-	cmp	r1, #7
-	bne	.L2023
-.L2021:
-	mov	r3, r7
-	mov	r2, r6
-	mov	r1, r5
-	ldr	r0, .L2027+12
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1850:
+	add	r3, r1, #84
+	ldr	r3, [r4, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	lr, [sp, #4]
+	ldr	r3, [sp, #4]
+	ubfx	r3, r3, #26, #1
+	and	r3, r3, lr, lsr #10
+	ands	r2, r2, r3
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1864
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #13
+	bmi	.L1864
+	ldr	r3, [sp, #4]
+	ubfx	lr, r3, #3, #7
+	ldr	r3, [sp, #4]
+	ubfx	r3, r3, #19, #7
+	cmp	lr, r3
+	ldr	r3, [sp, #4]
+	ite	gt
+	ubfxgt	r3, r3, #3, #7
+	ubfxle	r3, r3, #19, #7
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1847:
+	adds	r1, r1, #1
+	b	.L1846
+.L1864:
+	mov	r0, #-1
+	b	.L1847
+.L1845:
+	ldr	r3, .L1881+20
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r8, .L1881+28
+	lsrs	r7, r4, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #25
+	mov	r3, r5
+	ite	cc
+	movcc	lr, #64
+	movcs	lr, #128
+.L1855:
+	cmp	r0, r7
+	add	ip, lr, r1
+	add	r3, r3, #4
+	bcc	.L1856
+	ldr	r7, .L1881+4
+	movs	r2, #0
+	lsrs	r4, r4, #2
+	mov	r0, r2
+	ldr	r1, [r7]
+.L1857:
+	cmp	r2, r4
+	bcc	.L1861
+	movs	r3, #0
+	str	r3, [r1, #16]
+	ldr	r4, [r1]
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1853
+	mov	r1, r4
+	ldr	r0, .L1881+24
 	bl	printf
-	bl	dump_ftl_info
+	ldr	r3, [r7]
+	orr	r4, r4, #131072
+	str	r4, [r3]
+	b	.L1880
+.L1856:
+	ldr	r2, [r8]
+	bic	r1, r1, #3
+	adds	r0, r0, #1
+	ldr	r2, [r2, r1]
+	strb	r2, [r3, #-4]
+	lsrs	r1, r2, #8
+	strb	r1, [r3, #-3]
+	lsrs	r1, r2, #16
+	lsrs	r2, r2, #24
+	strb	r1, [r3, #-2]
+	mov	r1, ip
+	strb	r2, [r3, #-1]
+	b	.L1855
+.L1861:
+	add	r3, r2, #8
+	ldr	r3, [r1, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1867
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #16
+	bmi	.L1867
+	ldr	r3, [sp, #4]
+	ubfx	ip, r3, #3, #5
+	ldr	r3, [sp, #4]
+	ubfx	r8, r3, #27, #1
+	ldr	r3, [sp, #4]
+	ldr	lr, [sp, #4]
+	orr	ip, ip, r8, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	lr, lr, #29, #1
+	orr	r3, r3, lr, lsl #5
+	cmp	ip, r3
+	ldr	r3, [sp, #4]
+	itete	hi
+	ldrhi	ip, [sp, #4]
+	ldrls	ip, [sp, #4]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	ip, ip, #27, #1
+	ubfxls	ip, ip, #29, #1
+	orr	r3, r3, ip, lsl #5
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1858:
+	adds	r2, r2, #1
+	b	.L1857
+.L1867:
 	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2023:
+	b	.L1858
+.L1853:
+	adds	r3, r0, #1
+	beq	.L1844
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1844
+	ldr	r3, [r5, #4]
+	adds	r3, r3, #1
+	bne	.L1844
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	it	eq
+	moveq	r0, #512
+	b	.L1844
+.L1862:
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2028:
+	b	.L1844
+.L1882:
 	.align	2
-.L2027:
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR57
-	.word	.LC91
-	.size	pm_ppa_update_check, .-pm_ppa_update_check
-	.section	.text.load_l2p_region,"ax",%progbits
+.L1881:
+	.word	.LANCHOR28
+	.word	.LANCHOR13
+	.word	.LC105
+	.word	.LANCHOR157
+	.word	.LC106
+	.word	.LANCHOR44
+	.word	.LC107
+	.word	.LANCHOR47
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	flash_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.type	flash_read_page, %function
+flash_read_page:
+	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #31
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r4, r0
-	bls	.L2030
-	movs	r2, #30
-	ldr	r1, .L2039
-	ldr	r0, .L2039+4
-	bl	printf
-.L2031:
-	b	.L2031
-.L2030:
-	ldr	r10, .L2039+52
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #698]
-	cmp	r2, r0
-	bcs	.L2032
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	str	r3, [sp, #16]
+	mov	r5, r0
+	mov	r7, r1
+	ubfx	r4, r1, #0, #21
+	ldr	r3, .L1898
+	ubfx	r8, r1, #24, #2
+	str	r2, [sp, #12]
+	ldr	r6, [r3]
+	ldr	r3, .L1898+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L1884
+	mov	r3, r1
+	mov	r2, r8
 	mov	r1, r0
-	ldr	r0, .L2039+8
+	ldr	r0, .L1898+8
 	bl	printf
-	ldr	r3, .L2039+12
-	movs	r1, #255
-	ldrh	r2, [r3]
-	movs	r3, #0
-	ldr	r0, [r3, #4]
-	bl	ftl_memset
-	ldr	r3, [r10]
-	ldrh	r3, [r3, #698]
-	cmp	r3, r4
-	bcs	.L2036
-	movs	r2, #34
-	ldr	r1, .L2039
-	ldr	r0, .L2039+4
-	bl	printf
-.L2034:
-	b	.L2034
-.L2032:
-	ldr	r5, .L2039+16
-	add	r2, r0, #176
-	ldr	r7, [r3, r2, lsl #2]
-	mov	r8, #0
-	strh	r0, [r5, r1, lsl #3]	@ movhi
-	add	r5, r5, r1, lsl #3
-	strh	r8, [r5, #2]	@ movhi
-	cbnz	r7, .L2035
-	ldr	r3, .L2039+12
-	movs	r1, #255
-	ldr	r0, [r5, #4]
-	ldrh	r2, [r3]
-	bl	ftl_memset
-.L2036:
-	movs	r0, #0
-	add	sp, sp, #12
+.L1884:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	lsl	r10, r5, #8
+	bl	nandc_cs
+	ldr	r2, .L1898+12
+	cmp	r8, #0
+	bne	.L1885
+	mov	r0, r5
+	str	r2, [sp, #20]
+	bl	zftl_flash_enter_slc_mode
+.L1896:
+	ldr	r2, [sp, #20]
+	b	.L1886
+.L1885:
+	ldr	r3, [r2]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L1887
+	add	r3, r6, r10
+	str	r8, [r3, #2056]
+.L1886:
+	add	fp, r6, r10
+	movs	r1, #0
+	str	r1, [fp, #2056]
+	uxtb	r7, r7
+	str	r1, [fp, #2052]
+	str	r1, [fp, #2052]
+	lsrs	r1, r4, #8
+	str	r7, [fp, #2052]
+	ldr	r2, [r2]
+	str	r1, [fp, #2052]
+	lsrs	r1, r4, #16
+	str	r1, [fp, #2052]
+	movs	r1, #48
+	str	r1, [fp, #2056]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L1888
+	cmp	r8, #0
+	beq	.L1888
+	add	r4, r4, r4, lsl #1
+	subs	r0, r4, #1
+	add	r0, r0, r8
+.L1897:
+	bl	nandc_set_seed
+	add	r6, r6, r10
+	bl	nandc_wait_flash_ready
+	movs	r1, #0
+	movs	r2, #5
+	movs	r3, #224
+	str	r2, [r6, #2056]
+	str	r1, [fp, #2052]
+	mov	r0, r5
+	str	r1, [fp, #2052]
+	str	r3, [r6, #2056]
+	ldr	r3, [sp, #16]
+	ldrb	r2, [sp, #56]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	nandc_xfer
+	bl	nandc_de_cs.constprop.29
+	add	sp, sp, #24
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2035:
-	ldr	r6, .L2039+20
-	mov	r0, r7
-	ldr	r3, .L2039+24
-	ldr	r1, [r5, #4]
-	ldr	r2, [r6]
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1887:
+	mov	r0, r5
+	str	r2, [sp, #20]
+	bl	zftl_flash_exit_slc_mode
+	b	.L1896
+.L1888:
+	mov	r0, r4
+	b	.L1897
+.L1899:
+	.align	2
+.L1898:
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC108
+	.word	.LANCHOR16
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",%progbits
+	.align	1
+	.global	micron_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	@ args = 4, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L1917
+	sub	sp, sp, #24
+	mov	r8, r0
+	mov	r7, r1
+	str	r2, [sp, #16]
+	movs	r5, #0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	bl	ftl_read_ppa_page
-	ldr	r2, [r6]
-	mov	r3, r0
-	ldr	r2, [r2]
-	cmp	r2, r4
-	beq	.L2037
-	str	r7, [sp]
-	mov	r1, r4
-	ldr	r0, .L2039+28
+	mov	r4, #-1
+	add	r3, r3, r3, lsl #1
+	asr	r10, r3, #2
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1917+4
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+.L1901:
+	ldr	r3, .L1917+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1906
+.L1905:
+	ldr	r3, [sp, #12]
+	movs	r0, #200
+	add	r8, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r8, #2056]
+	movs	r3, #137
+	str	r3, [r8, #2052]
+	bl	timer_delay_ns
+	cmp	r4, r10
+	mov	r3, #0
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	bcc	.L1907
+	adds	r3, r4, #1
+	mov	r2, r7
+	it	ne
+	movne	r4, #256
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r1, r5
+	ldr	r0, .L1917+12
 	bl	printf
-	ldr	r1, [r10]
-	movs	r2, #4
-	ldr	r0, .L2039+32
-	ldrh	r3, [r1, #698]
-	add	r1, r1, #704
-	bl	rknand_print_hex
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r5, #4]
-	ldr	r0, .L2039+36
-	bl	rknand_print_hex
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r6]
-	ldr	r0, .L2039+40
-	bl	rknand_print_hex
-	ldr	r3, .L2039+44
-	movs	r0, #1
-	ldrh	r3, [r3]
-	rsb	r2, r3, #21
-	lsls	r0, r0, r2
-	lsrs	r7, r7, r3
-	ldr	r3, .L2039+48
-	subs	r0, r0, #1
-	ands	r0, r0, r7
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	mov	r1, r8
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2037:
-	ldr	r3, [r6]
+.L1907:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1906:
+	ldr	r3, [sp, #12]
+	movs	r0, #200
+	add	r1, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r1, #2056]
+	movs	r3, #137
+	str	r3, [r1, #2052]
+	bl	timer_delay_ns
+	adds	r3, r5, #1
+	ldr	r2, [sp, #16]
+	str	r3, [r1, #2048]
+	mov	r0, r8
+	str	r3, [sp, #20]
+	movs	r3, #0
+	str	r3, [r1, #2048]
+	str	r3, [r1, #2048]
+	str	r3, [r1, #2048]
+	mov	r1, r7
+	ldr	r3, [sp, #56]
+	str	r3, [sp]
+	mov	r3, fp
+	bl	flash_read_page
+	ldr	r3, .L1917+16
+	mov	r6, r0
 	ldr	r3, [r3]
-	cmp	r4, r3
-	beq	.L2036
-	movs	r2, #55
-	ldr	r1, .L2039
-	ldr	r0, .L2039+4
+	lsls	r1, r3, #19
+	bpl	.L1902
+	str	r0, [sp]
+	mov	r3, r4
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L1917+20
 	bl	printf
-.L2038:
-	b	.L2038
-.L2040:
+.L1902:
+	adds	r2, r6, #1
+	beq	.L1903
+	ldr	r3, .L1917+24
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r6
+	cmp	r6, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1917+28
+	ldr	fp, [r3]
+	bcc	.L1909
+.L1903:
+	ldr	r5, [sp, #20]
+	b	.L1901
+.L1909:
+	mov	r4, r6
+	b	.L1905
+.L1918:
 	.align	2
-.L2039:
-	.word	.LANCHOR148
-	.word	.LC0
-	.word	.LC92
-	.word	.LANCHOR149
-	.word	.LANCHOR93
-	.word	.LANCHOR141
-	.word	.LANCHOR45
-	.word	.LC93
-	.word	.LC94
-	.word	.LC95
-	.word	.LC96
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR46
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.pm_gc,"ax",%progbits
+.L1917:
+	.word	.LANCHOR44
+	.word	.LANCHOR13
+	.word	.LANCHOR159
+	.word	.LC110
+	.word	.LANCHOR14
+	.word	.LC109
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
 	.align	1
-	.global	pm_gc
+	.global	toshiba_3d_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_gc, %function
-pm_gc:
-	@ args = 0, pretend = 0, frame = 0
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L2054
-	ldr	r5, .L2054+4
-	ldr	r3, [r4]
-	mov	r8, r4
-	ldrh	r2, [r3, #688]
-	ldrh	r3, [r5]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L2043
-	bl	pm_free_sblk
-	ldr	r2, [r4]
-	ldrh	r3, [r5]
-	ldrh	r1, [r2, #688]
-	subs	r3, r3, #1
-	cmp	r1, r3
-	blt	.L2043
-	uxth	r0, r0
-	movw	r7, #65535
-	adds	r0, r0, #208
-	ldrh	r6, [r2, r0, lsl #1]
-	cmp	r6, r7
-	bne	.L2045
-	movs	r2, #127
-	ldr	r1, .L2054+8
-	ldr	r0, .L2054+12
-	bl	printf
-.L2046:
-	b	.L2046
-.L2045:
-	ldr	r4, .L2054+16
-	bl	pm_select_ram_region
-	mov	r5, r0
-	ldrh	r0, [r4, r0, lsl #3]
-	cmp	r0, r7
-	beq	.L2047
-	add	r7, r4, r5, lsl #3
-	ldr	r1, [r7, #4]
-	cbz	r1, .L2047
-	ldrsh	r3, [r7, #2]
-	cmp	r3, #0
-	bge	.L2047
-	bl	pm_write_page
-	ldrh	r3, [r7, #2]
-	ubfx	r3, r3, #0, #15
-	strh	r3, [r7, #2]	@ movhi
-.L2047:
-	mov	fp, #0
-.L2048:
-	ldr	r1, [r8]
-	uxth	r10, fp
-	ldrh	r0, [r1, #698]
-	cmp	r0, r10
-	bhi	.L2050
-	bl	pm_free_sblk
-.L2043:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2050:
-	ldr	r3, .L2054+20
-	uxth	r7, fp
-	add	ip, r7, #176
-	ldrh	r0, [r3]
-	ldr	r1, [r1, ip, lsl #2]
-	ldr	r3, .L2054+24
-	lsr	ip, r1, r0
-	rsb	r1, r0, #21
-	movs	r0, #1
-	lsls	r0, r0, r1
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	subs	r0, r0, #1
-	and	r0, ip, r0
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	cmp	r6, r0
-	bne	.L2049
+	sub	sp, sp, #24
+	mov	r7, r0
+	str	r2, [sp, #8]
+	mov	r8, r1
+	ubfx	r4, r1, #24, #2
+	str	r3, [sp, #12]
+	add	r6, r7, #8
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1962
+	ldr	fp, [r3]
+	ldr	r3, .L1962+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r6, fp, r6, lsl #8
+	cmp	r2, #36
+	ite	ne
+	movne	r2, #56
+	moveq	r2, #46
+	str	r2, [sp, #20]
+	ite	ne
+	movne	r2, #10
+	moveq	r2, #26
+	str	r2, [sp, #16]
+	cmp	r4, #0
+	bne	.L1921
+	mov	r4, #-1
+	movs	r5, #1
+	str	r3, [sp, #20]
+.L1928:
+	ldr	r3, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1922
+	movs	r2, #0
 	mov	r1, r5
-	mov	r0, r10
-	bl	load_l2p_region
-	add	r2, r4, r5, lsl #3
+	mov	r0, r6
+	bl	toshiba_tlc_set_rr_para
+	add	r3, fp, r7, lsl #8
+	movs	r2, #93
+	str	r2, [r3, #2056]
+.L1923:
+	ldr	r3, [sp, #56]
+	mov	r1, r8
+	ldr	r2, [sp, #8]
 	mov	r0, r7
-	ldr	r1, [r2, #4]
-	bl	pm_write_page
-.L2049:
-	add	fp, fp, #1
-	b	.L2048
-.L2055:
-	.align	2
-.L2054:
-	.word	.LANCHOR46
-	.word	.LANCHOR101
-	.word	.LANCHOR150
-	.word	.LC0
-	.word	.LANCHOR93
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.size	pm_gc, .-pm_gc
-	.section	.text.pm_flush_id,"ax",%progbits
-	.align	1
-	.global	pm_flush_id
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_flush_id, %function
-pm_flush_id:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2061
-	push	{r4, lr}
-	add	r4, r3, r0, lsl #3
-	ldrh	r0, [r3, r0, lsl #3]
-	ldr	r1, [r4, #4]
-	bl	pm_write_page
-	ldrh	r3, [r4, #2]
-	ubfx	r3, r3, #0, #15
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r4, .L2061+4
-	ldr	r3, [r4]
-	cbz	r3, .L2057
-	bl	pm_gc
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	flash_read_page
+	ldr	r3, .L1962+8
+	mov	r10, r0
+	ldr	r3, [r3]
+	lsls	r1, r3, #27
+	bpl	.L1924
+	mov	r3, r0
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L1962+12
+	bl	printf
+.L1924:
+	cmp	r10, #-1
+	beq	.L1925
+	ldr	r3, .L1962+16
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1962+20
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1962+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r10, r3, asr #2
+	bcc	.L1943
+.L1925:
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1928
+.L1927:
+	ldr	r3, .L1962+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1929
+	movs	r2, #0
+.L1961:
+	movs	r1, #0
+	mov	r0, r6
+	bl	toshiba_tlc_set_rr_para
+	b	.L1930
+.L1922:
+	uxtb	r1, r5
+	mov	r0, r6
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1923
+.L1943:
+	mov	r4, r10
+	b	.L1927
+.L1929:
+	movs	r1, #0
+	mov	r0, r6
+	bl	toshiba_3d_set_slc_rr_para
+.L1930:
+	ldr	r3, .L1962+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1939
+	add	r7, fp, r7, lsl #8
+	movs	r3, #85
+	str	r3, [r7, #2056]
 	movs	r3, #0
-	str	r3, [r4]
-.L2057:
-	movs	r0, #0
-	pop	{r4, pc}
-.L2062:
+	str	r3, [r7, #2052]
+	str	r3, [r7, #2048]
+	movs	r3, #255
+	str	r3, [r7, #2056]
+.L1939:
+	ldr	r3, .L1962+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1940
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r1, r5
+	ldr	r0, .L1962+28
+	bl	printf
+.L1940:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1921:
+	mov	r4, #-1
+	movs	r5, #1
+	str	r3, [sp, #16]
+.L1937:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1931
+	movs	r2, #1
+	mov	r1, r5
+	mov	r0, r6
+	bl	toshiba_tlc_set_rr_para
+	add	r3, fp, r7, lsl #8
+	movs	r2, #93
+.L1960:
+	str	r2, [r3, #2056]
+	mov	r1, r8
+	ldr	r3, [sp, #56]
+	mov	r0, r7
+	ldr	r2, [sp, #8]
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	flash_read_page
+	ldr	r3, .L1962+8
+	mov	r10, r0
+	ldr	r3, [r3]
+	lsls	r2, r3, #27
+	bpl	.L1933
+	mov	r3, r0
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L1962+32
+	bl	printf
+.L1933:
+	cmp	r10, #-1
+	beq	.L1934
+	ldr	r3, .L1962+16
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1962+20
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1962+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r10, r3, asr #2
+	bcc	.L1944
+.L1934:
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1937
+.L1936:
+	ldr	r3, .L1962+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1938
+	movs	r2, #1
+	b	.L1961
+.L1931:
+	uxtb	r1, r5
+	mov	r0, r6
+	bl	toshiba_3d_set_tlc_rr_para
+	add	r3, fp, r7, lsl #8
+	movs	r2, #38
+	b	.L1960
+.L1944:
+	mov	r4, r10
+	b	.L1936
+.L1938:
+	movs	r1, #0
+	mov	r0, r6
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1930
+.L1963:
 	.align	2
-.L2061:
-	.word	.LANCHOR93
-	.word	.LANCHOR91
-	.size	pm_flush_id, .-pm_flush_id
-	.section	.text.pm_flush,"ax",%progbits
+.L1962:
+	.word	.LANCHOR13
+	.word	.LANCHOR23
+	.word	.LANCHOR14
+	.word	.LC111
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.word	.LANCHOR44
+	.word	.LC113
+	.word	.LC112
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",%progbits
 	.align	1
-	.global	pm_flush
+	.global	toshiba_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_flush, %function
-pm_flush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	@ args = 4, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r5, .L2067
-.L2065:
-	add	r3, r5, r4, lsl #3
-	uxth	r0, r4
-	ldrsh	r3, [r3, #2]
-	cmp	r3, #0
-	bge	.L2064
-	bl	pm_flush_id
-.L2064:
-	adds	r4, r4, #1
-	cmp	r4, #32
-	bne	.L2065
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L2068:
-	.align	2
-.L2067:
-	.word	.LANCHOR93
-	.size	pm_flush, .-pm_flush
-	.section	.text.flt_sys_flush,"ax",%progbits
-	.align	1
-	.global	flt_sys_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flt_sys_flush, %function
-flt_sys_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	pop	{r3, lr}
-	b	ftl_info_flush
-	.size	flt_sys_flush, .-flt_sys_flush
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FlashDeInit
-	bl	flt_sys_flush
-	pop	{r3, lr}
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.pm_init,"ax",%progbits
-	.align	1
-	.global	pm_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	pm_init, %function
-pm_init:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	ldr	r5, .L2088
-	movs	r4, #0
-	movs	r0, #64
-	ldr	r3, .L2088+4
-	ldr	r7, .L2088+8
-	mov	r10, r5
-	str	r4, [r3]
-	bl	ftl_malloc
-	str	r0, [r7]
-.L2073:
-	movw	r3, #65535
-	adds	r6, r5, r4
-	strh	r3, [r4, r5]	@ movhi
-	movs	r3, #0
-	strh	r3, [r6, #2]	@ movhi
-	cmp	r8, #0
-	beq	.L2072
-	ldr	r3, .L2088+12
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	lsls	r0, r0, #9
-	bl	ftl_malloc
-	str	r0, [r6, #4]
-.L2072:
-	adds	r4, r4, #8
-	cmp	r4, #256
-	bne	.L2073
-	ldr	r3, [r10, #4]
-	ldr	r4, .L2088+16
-	ldr	r8, [r7]
-	str	r3, [sp, #12]
-	ldr	r3, [r4]
-	ldr	r2, [sp, #12]
-	ldrh	r1, [r3, #692]
-	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	movs	r3, #4
-	str	r3, [sp]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r7, r0
+	str	r2, [sp, #12]
+	add	r10, r7, #8
+	str	r3, [sp, #16]
+	str	r1, [sp, #8]
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1991
+	ldr	r2, .L1991+4
+	ldr	r6, [r3]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	subs	r3, r3, #67
+	add	r10, r6, r10, lsl #8
+	cmp	r3, #1
+	bls	.L1982
+	ldr	r3, .L1991+8
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1966
+	movs	r5, #1
+	movs	r0, #1
+	bl	nandc_set_if_mode
+.L1966:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L1965:
+	mov	r8, #1
+	mov	fp, #-1
+.L1967:
+	ldr	r3, .L1991+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L1976
+	mov	r4, fp
+.L1975:
+	ldr	r3, .L1991+4
+	movs	r1, #0
+	mov	r0, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1977
+	bl	sandisk_set_rr_para
+.L1978:
+	add	r6, r6, r7, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	ldr	r3, .L1991+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1979
+	adds	r3, r4, #1
+	ldr	r2, [sp, #8]
+	it	ne
+	movne	r4, #256
 	mov	r3, r8
-	bl	flash_get_last_written_page
-	ldr	r1, [r4]
-	mov	r5, r0
-	ldrh	r2, [r1, #696]
-	cmp	r2, r0
-	bgt	.L2074
-	mov	r3, r0
-	ldrh	r1, [r1, #692]
-	ldr	r0, .L2088+20
+	str	r4, [sp]
+	mov	r1, r8
+	ldr	r0, .L1991+20
 	bl	printf
-	ldr	r3, [r4]
-	ldrsh	r6, [r3, #696]
-.L2075:
-	cmp	r6, r5
-	ble	.L2077
-	ldr	r3, .L2088+24
-	movs	r2, #1
-	add	r5, r5, r2
-	strb	r2, [r3]
-	ldr	r3, [r4]
-	strh	r5, [r3, #696]	@ movhi
-	bl	pm_free_sblk
-	ldr	r1, [r10, #4]
-	mov	r0, #-1
-	bl	pm_write_page
-	ldr	r1, [r10, #4]
-	mov	r0, #-1
-	bl	pm_write_page
-.L2074:
-	bl	pm_free_sblk
-	bl	pm_gc
-	movs	r0, #0
-	add	sp, sp, #16
+.L1979:
+	bl	nandc_wait_flash_ready
+	cbz	r5, .L1964
+	movs	r0, #4
+	bl	nandc_set_if_mode
+.L1964:
+	mov	r0, r4
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2077:
-	ldr	r3, [r4]
-	ldr	r2, .L2088+28
-	ldrh	r7, [r3, #692]
-	ldrh	r2, [r2]
-	ldrb	r0, [r3, #694]	@ zero_extendqisi2
-	ldr	r3, .L2088+12
-	mla	r7, r2, r7, r6
-	ldr	r2, [sp, #12]
+.L1982:
+	movs	r5, #0
+	b	.L1965
+.L1976:
+	ldr	r3, [sp, #20]
+	mov	r0, r10
+	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r1, r7
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1968
+	bl	sandisk_set_rr_para
+.L1969:
+	ldr	r3, .L1991+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L1970
+	ldr	r3, .L1991+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r6, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L1970:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #38
+	add	r1, sp, #8
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	mov	r0, r7
+	ldr	r3, [sp, #56]
 	str	r3, [sp]
-	mov	r3, r8
-	bl	flash_read_page_en
-	ldr	r3, [r4]
-	mov	fp, r0
-	ldr	r0, .L2088+32
-	ldr	r2, [r3, #48]
-	adds	r2, r2, #1
-	str	r2, [r3, #48]
-	mov	r2, r7
-	ldrh	r3, [r3, #694]
-	ldr	r1, [r8]
-	bl	printf
+	ldm	r1, {r1, r2, r3}
+	bl	flash_read_page
+	adds	r2, r0, #1
+	mov	r4, r0
+	beq	.L1973
+	ldr	r3, .L1991+24
 	cmp	fp, #-1
-	beq	.L2076
-	cmp	fp, #512
-	beq	.L2076
-	ldr	r2, [r4]
-	ldr	r3, [r8]
-	ldrh	r1, [r2, #698]
-	cmp	r3, r1
-	itt	cc
-	addcc	r3, r3, #176
-	strcc	r7, [r2, r3, lsl #2]
-.L2076:
-	adds	r6, r6, #1
-	sxth	r6, r6
-	b	.L2075
-.L2089:
+	it	eq
+	moveq	fp, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1991+28
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1991+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1975
+.L1973:
+	add	r8, r8, #1
+	b	.L1967
+.L1968:
+	bl	toshiba_set_rr_para
+	b	.L1969
+.L1977:
+	bl	toshiba_set_rr_para
+	b	.L1978
+.L1992:
 	.align	2
-.L2088:
-	.word	.LANCHOR93
-	.word	.LANCHOR91
-	.word	.LANCHOR141
-	.word	.LANCHOR45
-	.word	.LANCHOR46
-	.word	.LC97
-	.word	.LANCHOR133
-	.word	.LANCHOR75
-	.word	.LC98
-	.size	pm_init, .-pm_init
-	.section	.text.pm_log2phys,"ax",%progbits
+.L1991:
+	.word	.LANCHOR13
+	.word	.LANCHOR23
+	.word	.LANCHOR21
+	.word	.LANCHOR159
+	.word	.LANCHOR44
+	.word	.LC113
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",%progbits
 	.align	1
-	.global	pm_log2phys
+	.global	hynix_read_retrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	pm_log2phys, %function
-pm_log2phys:
-	@ args = 0, pretend = 0, frame = 0
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2104
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r1
-	mov	r4, r0
-	mov	r8, r2
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	lsls	r1, r5, #7
-	lsls	r5, r5, #7
-	bl	__aeabi_uidiv
-	ldr	r3, .L2104+4
-	uxth	r10, r0
-	mov	r6, r0
-	smulbb	r5, r5, r10
-	ldr	r2, [r3]
-	subs	r5, r4, r5
-	cmp	r4, r2
-	uxth	r5, r5
-	bcc	.L2091
-	mov	r1, r4
-	ldr	r0, .L2104+8
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	str	r3, [sp, #12]
+	mov	r4, #-1
+	mov	r7, r0
+	mov	r8, r1
+	ldr	r3, .L2007
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	add	r10, r3, r0
+	ldrb	fp, [r3, #114]	@ zero_extendqisi2
+	ldrb	r5, [r10, #120]	@ zero_extendqisi2
+	bl	nandc_wait_flash_ready
+.L1994:
+	cmp	r6, fp
+	bcc	.L1999
+.L1998:
+	ldr	r3, .L2007+4
+	strb	r5, [r10, #120]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L2000
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r6
+	str	r4, [sp]
+	mov	r1, r6
+	ldr	r0, .L2007+8
 	bl	printf
-	mov	r0, #-1
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2091:
-	ldr	r2, .L2104+12
-	movs	r3, #0
-	mov	fp, r2
-.L2097:
-	add	r1, r2, r3, lsl #3
-	uxth	r4, r3
-	ldr	r1, [r1, #4]
-	cbz	r1, .L2093
-	ldrh	r1, [r2, r3, lsl #3]
-	cmp	r1, r10
-	bne	.L2093
-.L2094:
-	lsls	r4, r4, #3
-	cmp	r8, #0
-	bne	.L2095
-	add	r3, fp, r4
-	ldr	r3, [r3, #4]
-	ldr	r3, [r3, r5, lsl #2]
-	str	r3, [r7]
-.L2096:
-	add	r4, r4, fp
-	movw	r2, #32767
-	ldrh	r3, [r4, #2]
-	ubfx	r1, r3, #0, #15
-	cmp	r1, r2
-	beq	.L2099
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L2099:
-	movs	r0, #0
+.L2000:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2095:
-	add	r2, fp, r4
-	ldr	r1, [r7]
-	ldr	r3, [r2, #4]
-	str	r1, [r3, r5, lsl #2]
-	ldrh	r3, [r2, #2]
-	mvn	r3, r3, lsl #17
-	mvn	r3, r3, lsr #17
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L2104+16
-	strb	r6, [r3]
-	b	.L2096
-.L2093:
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L2097
-	bl	pm_select_ram_region
-	ldrh	r2, [fp, r0, lsl #3]
-	movw	r3, #65535
+.L1999:
+	adds	r5, r5, #1
+	mov	r0, r7
+	uxtb	r5, r5
+	cmp	fp, r5
+	it	ls
+	movls	r5, #0
+	mov	r1, r5
+	bl	hynix_set_rr_para
+	ldr	r3, [sp, #48]
+	mov	r1, r8
+	ldr	r2, [sp, #8]
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	flash_read_page
+	adds	r2, r0, #1
+	beq	.L1996
+	ldr	r3, .L2007+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L2007+16
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2007+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L2002
+.L1996:
+	adds	r6, r6, #1
+	b	.L1994
+.L2002:
 	mov	r4, r0
-	cmp	r2, r3
-	beq	.L2098
-	add	r3, fp, r0, lsl #3
-	ldrsh	r3, [r3, #2]
-	cmp	r3, #0
-	bge	.L2098
-	bl	pm_flush_id
-.L2098:
-	ldr	r3, .L2104+20
-	mov	r1, r4
-	mov	r0, r10
-	strb	r4, [r3]
-	bl	load_l2p_region
-	b	.L2094
-.L2105:
+	b	.L1998
+.L2008:
 	.align	2
-.L2104:
-	.word	.LANCHOR45
-	.word	.LANCHOR47
-	.word	.LC99
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR151
-	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.ftl_read_ahead,"ax",%progbits
+.L2007:
+	.word	.LANCHOR27
+	.word	.LANCHOR44
+	.word	.LC114
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tuning_read,"ax",%progbits
 	.align	1
-	.global	ftl_read_ahead
+	.global	flash_ddr_tuning_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read_ahead, %function
-ftl_read_ahead:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_ddr_tuning_read, %function
+flash_ddr_tuning_read:
+	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	sub	sp, sp, #28
-	ldr	r6, .L2119
-	ldr	r3, [r6]
-	adds	r3, r3, #1
-	beq	.L2107
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r4, r0
-	mov	r0, #-1
-	cbz	r4, .L2106
-	ldr	r5, [r6]
-	str	r0, [r6]
-	ldr	r7, [r4, #4]
-	str	r5, [r4, #20]
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #20]
-	adds	r0, r0, #1
-	ldr	r6, [r4, #12]
-	bne	.L2109
-	movs	r2, #0
-	add	r1, sp, #20
-	mov	r0, r5
-	bl	pm_log2phys
-.L2109:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	sub	sp, sp, #32
+	mov	r5, r4
+	mov	r6, #1024
+	movs	r7, #6
+	str	r3, [sp, #20]
+	mov	r8, r0
+	mov	fp, r1
+	str	r2, [sp, #16]
+	bl	nandc_get_ddr_para
+	mov	r3, #-1
+	str	r0, [sp, #28]
+	str	r4, [sp, #24]
+	str	r4, [sp, #12]
+	str	r3, [sp, #8]
+.L2015:
+	uxtb	r0, r7
+	bl	nandc_set_ddr_para
+	ldr	r3, [sp, #64]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	mov	r0, r8
+	str	r3, [sp]
 	ldr	r3, [sp, #20]
-	str	r3, [r4, #24]
-	str	r3, [r4, #28]
-	adds	r3, r3, #1
-	bne	.L2110
-	ldr	r3, .L2119+4
-	movs	r1, #0
-	mov	r0, r7
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	lsls	r2, r2, #9
-	bl	ftl_memset
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #8
-	strb	r3, [r4, #2]
-.L2107:
-	movs	r0, #0
-.L2106:
-	add	sp, sp, #28
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2110:
-	movs	r1, #1
-	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r7, [r4, #36]
-	cmp	r7, #256
-	bne	.L2111
-	ldr	r3, .L2119+8
-	mov	r8, #1
-	ldr	r0, [sp, #20]
-	ldrh	r2, [r3]
-	rsb	r3, r2, #21
-	lsrs	r0, r0, r2
-	lsl	r3, r8, r3
-	ldr	r2, .L2119+12
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r2, [r4, #20]
-	uxth	r1, r0
+	bl	flash_read_page
+	ldr	r3, .L2032
 	mov	r10, r0
-	ldr	r3, [r4, #24]
-	ldr	r0, .L2119+16
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L2010
+	mov	r3, r0
+	mov	r2, fp
+	mov	r1, r7
+	ldr	r0, .L2032+4
 	bl	printf
-	movs	r2, #0
+.L2010:
+	adds	r3, r6, #1
+	cmp	r10, r3
+	bhi	.L2011
+	ldr	r3, .L2032+8
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2032+12
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L2032+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r10, r3, lsr #2
+	bcs	.L2021
+	adds	r5, r5, #1
+	cmp	r5, #7
+	bls	.L2021
+	subs	r4, r7, r5
+	mov	r6, r10
+	movs	r3, #0
+	str	r3, [sp, #8]
+.L2013:
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #12]
+	cmp	r5, r2
+	it	cc
+	movcc	r4, r3
+.L2014:
+	cmp	r4, #0
+	beq	.L2016
+	ldr	r3, .L2032+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2032+20
+	umull	r2, r3, r2, r3
+	ubfx	r3, r3, #1, #8
+	cmp	r3, r6
+	bls	.L2016
+	mov	r1, r4
+	ldr	r0, .L2032+24
+	bl	printf
+	uxtb	r0, r4
+.L2031:
+	bl	nandc_set_ddr_para
+	ldr	r3, [sp, #8]
+	cbz	r3, .L2009
 	mov	r1, r8
-	uxth	r0, r10
-	bl	gc_add_sblk
-.L2111:
-	ldr	r3, [r6, #4]
-	cmp	r5, r3
-	beq	.L2112
-	ldr	r2, [r6, #12]
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2119+20
-	str	r2, [sp, #12]
-	ldr	r2, [r6, #8]
-	str	r3, [sp, #4]
-	str	r2, [sp, #8]
-	mov	r2, r5
-	ldr	r3, [r6]
+	mov	r2, fp
+	ldr	r0, .L2032+28
+	bl	printf
+	mov	r0, r8
+	bl	flash_reset
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+	bl	nandc_set_if_mode
+	ldr	r3, .L2032+32
+	movs	r2, #2
+	mov	r0, r8
+	strb	r2, [r3, r8]
+	bl	zftl_flash_enter_slc_mode
+	ldr	r3, [sp, #64]
+	mov	r1, fp
+	ldr	r2, [sp, #16]
+	mov	r0, r8
 	str	r3, [sp]
 	ldr	r3, [sp, #20]
+	bl	flash_read_page
+	mov	r2, fp
+	mov	r3, r0
+	mov	r6, r0
+	mov	r1, r8
+	ldr	r0, .L2032+36
 	bl	printf
-.L2112:
-	ldr	r3, [r6, #4]
-	cmp	r5, r3
-	bne	.L2113
-	adds	r7, r7, #1
-	bne	.L2107
-.L2113:
-	movw	r2, #758
-	ldr	r1, .L2119+24
-	ldr	r0, .L2119+28
-	bl	printf
-.L2114:
-	b	.L2114
-.L2120:
-	.align	2
-.L2119:
-	.word	.LANCHOR49
-	.word	.LANCHOR45
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC100
-	.word	.LC101
-	.word	.LANCHOR152
-	.word	.LC0
-	.size	ftl_read_ahead, .-ftl_read_ahead
-	.section	.text.gc_update_l2p_map,"ax",%progbits
-	.align	1
-	.global	gc_update_l2p_map
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	gc_update_l2p_map, %function
-gc_update_l2p_map:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2138
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	sub	sp, sp, #24
-	mov	r4, r5
-	mov	r8, r5
-	ldr	fp, [r3]
-.L2122:
-	ldr	r3, .L2138+4
-	ldrh	r3, [r3]
-	cmp	r4, r3
-	bge	.L2132
-	lsls	r3, r4, #1
-	movs	r7, #0
-	subs	r3, r3, #1
-	str	r3, [sp, #8]
-	b	.L2133
-.L2129:
-	ldr	r3, .L2138+8
-	ldr	r3, [r3]
-	ldr	r10, [r3, r8, lsl #2]
-	cmp	r10, #-1
-	beq	.L2123
-	ldr	r2, .L2138+12
-	mov	r0, r10
-	ldr	r2, [r2]
-	ldr	r3, [r2, r8, lsl #2]
-	str	r3, [sp, #4]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #20]
-	adds	r0, r0, #1
-	bne	.L2124
-	movs	r2, #0
-	add	r1, sp, #20
-	mov	r0, r10
-	bl	pm_log2phys
-.L2124:
-	ldr	r2, [sp, #20]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2
-	bne	.L2125
-	ldr	r3, [sp, #12]
-	ldr	r2, .L2138+16
-	ldrh	r1, [r3, #96]
-	ldrh	r2, [r2]
-	ldr	r3, .L2138+20
-	muls	r2, r1, r2
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cmp	r1, #3
-	bne	.L2126
-	add	r2, r2, r4
-	orr	r2, r2, r6, lsl #24
-.L2137:
-	str	r2, [sp, #16]
-	add	r1, sp, #16
-	movs	r2, #1
-	mov	r0, r10
-	bl	pm_log2phys
-	ldr	r3, .L2138+24
-	adds	r5, r5, #1
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, [sp, #4]
-	subs	r3, r3, #1
-	lsrs	r2, r2, r0
-	mov	r0, r2
-	ldr	r2, .L2138+28
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-.L2125:
-	add	r8, r8, #1
-.L2123:
-	adds	r6, r6, #1
-.L2131:
-	ldr	r3, .L2138+20
+	ldr	r3, .L2032+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r6, r3
-	ble	.L2129
-	adds	r7, r7, #1
-.L2133:
-	ldrb	r3, [fp, #89]	@ zero_extendqisi2
-	cmp	r7, r3
-	bge	.L2130
-	add	r3, fp, r7, lsl #1
-	movs	r6, #1
-	str	r3, [sp, #12]
-	b	.L2131
-.L2126:
-	cmp	r1, #2
-	itett	eq
-	ldreq	r3, [sp, #8]
-	addne	r2, r2, r4
-	addeq	r2, r2, r3
-	addeq	r2, r2, r6
-	it	eq
-	orreq	r2, r2, #33554432
-	b	.L2137
-.L2130:
-	adds	r4, r4, #1
-	b	.L2122
-.L2132:
-	ldr	r3, .L2138+32
-	ldrh	r2, [fp, #80]
-	ldr	r3, [r3]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	add	sp, sp, #24
+	bhi	.L2023
+	ldr	r2, .L2032+40
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	cmp	r3, #100
+	str	r3, [r2]
+	bls	.L2019
+	ldr	r3, .L2032+44
+	movs	r2, #0
+	strb	r2, [r3]
+.L2009:
+	mov	r0, r6
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2139:
+.L2011:
+	ldr	r3, [sp, #12]
+	cmp	r5, r3
+	bls	.L2022
+	cmp	r5, #7
+	sub	r3, r4, r5
+	str	r3, [sp, #24]
+	bhi	.L2014
+	str	r5, [sp, #12]
+.L2022:
+	movs	r5, #0
+	b	.L2012
+.L2021:
+	mov	r4, r7
+	mov	r6, r10
+	movs	r3, #0
+	str	r3, [sp, #8]
+.L2012:
+	adds	r7, r7, #2
+	cmp	r7, #50
+	bne	.L2015
+	b	.L2013
+.L2016:
+	ldrb	r0, [sp, #28]	@ zero_extendqisi2
+	b	.L2031
+.L2023:
+	ldr	r6, [sp, #8]
+.L2019:
+	ldr	r4, .L2032+48
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	flash_set_interface_mode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	nandc_set_if_mode
+	b	.L2009
+.L2033:
 	.align	2
-.L2138:
-	.word	.LANCHOR60
-	.word	.LANCHOR79
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR56
-	.size	gc_update_l2p_map, .-gc_update_l2p_map
-	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+.L2032:
+	.word	.LANCHOR14
+	.word	.LC115
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.word	.LANCHOR44
+	.word	-1431655765
+	.word	.LC116
+	.word	.LC117
+	.word	.LANCHOR32
+	.word	.LC118
+	.word	.LANCHOR160
+	.word	.LANCHOR21
+	.word	.LANCHOR43
+	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
+	.section	.text.flash_read_page_en,"ax",%progbits
 	.align	1
-	.global	gc_update_l2p_map_new
+	.global	flash_read_page_en
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_update_l2p_map_new, %function
-gc_update_l2p_map_new:
-	@ args = 0, pretend = 0, frame = 32
+	.type	flash_read_page_en, %function
+flash_read_page_en:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2177
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r2, .L2177+4
-	ldr	r4, [r3]
-	ldrh	r2, [r2]
-	str	r3, [sp, #16]
-	ldrb	r1, [r4, #89]	@ zero_extendqisi2
-	muls	r2, r1, r2
-	str	r2, [sp, #4]
-	ldr	r2, .L2177+8
-	ldr	r2, [r2]
-	tst	r2, #256
-	beq	.L2141
-	ldrh	r1, [r4, #80]
-	ldr	r0, .L2177+12
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L2061
+	mov	r7, r2
+	mov	r5, r0
+	mov	r4, r1
+	ldr	r10, [sp, #48]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	fp, r3
+	cmp	r2, r0
+	bhi	.L2035
+	mov	r2, #398
+	ldr	r1, .L2061+4
+	ldr	r0, .L2061+8
 	bl	printf
-.L2141:
-	ldr	r3, .L2177+16
-	movs	r7, #0
-	ldr	r1, [sp, #4]
-	mov	r5, r7
-	ldrh	r2, [r4, #80]
-	ldr	r3, [r3]
-	subs	r1, r1, #1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-.L2142:
-	ldr	r3, [sp, #4]
-	cmp	r5, r3
-	bne	.L2151
-	ldr	r3, .L2177+8
-	ldr	r5, .L2177+16
+.L2035:
+	ldr	r3, .L2061+12
+	ldrb	r6, [r3, r5]	@ zero_extendqisi2
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, r5
+	bcs	.L2036
+	ldr	r3, .L2061+16
 	ldr	r3, [r3]
-	tst	r3, #256
-	beq	.L2152
-	ldr	r3, [sp, #16]
-	ldrh	r0, [r4, #80]
-	ldr	r2, [r5]
-	ldr	r1, [r3]
-	mov	r3, r7
-	ldrh	r2, [r2, r0, lsl #1]
-	ldrh	r1, [r1, #80]
-	ldr	r0, .L2177+20
-	bl	printf
-.L2152:
-	ldrh	r2, [r4, #80]
-	ldr	r3, [r5]
-	ldrh	r1, [r3, r2, lsl #1]
-	cmp	r7, r1
-	beq	.L2153
-	mov	r2, #448
-	ldr	r1, .L2177+24
-	ldr	r0, .L2177+28
+	lsls	r0, r3, #25
+	bmi	.L2037
+.L2060:
+	mov	r0, #-1
+.L2034:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2037:
+	mov	r3, r4
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, .L2061+20
 	bl	printf
-.L2154:
-	b	.L2154
-.L2151:
-	ldr	r3, .L2177+32
-	lsl	r8, r5, #2
-	ldr	r3, [r3]
-	ldr	r6, [r3, r5, lsl #2]
-	adds	r2, r6, #1
-	beq	.L2143
-	ldr	r3, .L2177+36
-	mov	r0, r6
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	uxth	r3, r0
+	b	.L2060
+.L2036:
+	tst	r4, #50331648
+	bne	.L2039
+	ldr	r3, .L2061+24
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2061+28
+	cbz	r2, .L2040
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2039
+.L2040:
+	ldr	r2, .L2061+32
+	mov	r0, r4
 	str	r3, [sp, #12]
-	ldr	r3, .L2177+8
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2144
-	mov	r3, r5
-	mov	r2, r6
-	ldr	r1, [sp, #12]
-	ldr	r0, .L2177+40
-	bl	printf
-.L2144:
-	ldr	fp, .L2177+32
-	str	r5, [sp, #8]
-.L2150:
-	ldr	r3, [fp]
-	ldr	r6, [r3, r8]
-	adds	r0, r6, #1
-	beq	.L2145
-	ldr	r3, .L2177+36
-	mov	r0, r6
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
+	ldrh	r5, [r2]
+	mov	r1, r5
 	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	fp, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #12]
-	uxth	r0, r0
-	cmp	r3, r0
-	bne	.L2145
-	ldr	r3, .L2177+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2041
+	add	r4, fp, r1, lsl #1
+.L2039:
+	mov	r1, r4
+	str	r10, [sp]
+	mov	r3, r8
+	mov	r2, r7
 	mov	r0, r6
-	ldr	r3, [r3]
-	ldr	r10, [r3, r8]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #28]
-	adds	r0, r0, #1
-	bne	.L2146
-	movs	r2, #0
-	add	r1, sp, #28
+	bl	flash_read_page
+	adds	r1, r0, #1
+	bne	.L2034
+	ldr	r5, .L2061+36
+	ldrb	fp, [r5]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L2042
+.L2045:
+	ldr	r3, .L2061+40
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L2043
+.L2044:
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, .L2061+44
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L2061+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2060
+	str	r10, [sp, #48]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r4
 	mov	r0, r6
-	bl	pm_log2phys
-.L2146:
-	ldr	r3, [sp, #28]
-	cmp	r10, r3
-	bne	.L2147
-	ldr	r3, .L2177+48
-	add	r1, sp, #32
-	movs	r2, #1
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	flash_ddr_tuning_read
+.L2041:
+	ldr	r3, .L2061+52
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, fp
+	b	.L2039
+.L2042:
+	movs	r3, #0
+	mov	r2, r7
+	strb	r3, [r5]
+	mov	r1, r4
+	str	r10, [sp]
+	mov	r3, r8
 	mov	r0, r6
-	adds	r7, r7, #1
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	str	r3, [r1, #-8]!
-	bl	pm_log2phys
-	ldr	r3, .L2177+52
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L2177+56
-	lsr	r0, r10, r0
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	mov	r0, r3
-	str	r3, [sp, #20]
-	bl	ftl_vpn_decrement
-	ldrh	r2, [r4, #80]
-	ldr	r3, [sp, #20]
-	cmp	r2, r3
-	bne	.L2148
-	ldr	r3, .L2177+8
+	bl	flash_read_page
+	adds	r2, r0, #1
+	strb	fp, [r5]
+	beq	.L2045
+	b	.L2034
+.L2043:
+	mov	r3, r8
+	str	r10, [sp]
+	mov	r2, r7
+	mov	r1, r4
+	mov	r0, r6
+	blx	fp
+	adds	r3, r0, #1
+	beq	.L2044
+	b	.L2034
+.L2062:
+	.align	2
+.L2061:
+	.word	.LANCHOR18
+	.word	.LANCHOR161
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR14
+	.word	.LC119
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR46
+	.word	.LANCHOR162
+	.word	.LC120
+	.word	.LANCHOR21
+	.word	.LANCHOR3
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",%progbits
+	.align	1
+	.global	flash_get_last_written_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	r1, .L2073
+	mov	fp, r2
+	mov	r10, r3
+	str	r0, [sp, #12]
+	ldrh	r4, [r1]
+	ldr	r1, .L2073+4
+	subs	r4, r4, #1
+	ldrh	r6, [r1, #26]
+	sxth	r4, r4
+	ldr	r1, [sp, #48]
+	mul	r6, r8, r6
+	str	r1, [sp]
+	adds	r1, r4, r6
+	bl	flash_read_page_en
+	cmp	r0, #512
+	bne	.L2064
+	movs	r7, #0
+.L2065:
+	cmp	r7, r4
+	ble	.L2068
+.L2064:
+	ldr	r3, .L2073+8
 	ldr	r3, [r3]
-	lsls	r1, r3, #23
-	bpl	.L2148
-	ldr	r3, [sp, #28]
-	mov	r2, r10
-	mov	r1, r6
-	ldr	r0, .L2177+60
-	bl	printf
-.L2148:
-	ldr	r3, [fp]
-	mov	r2, #-1
-	str	r2, [r3, r8]
-.L2145:
-	ldr	r3, [sp, #8]
-	add	r8, r8, #4
-	adds	r3, r3, #1
-	str	r3, [sp, #8]
-	ldr	r2, [sp, #8]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2
-	bne	.L2150
-.L2143:
-	adds	r5, r5, #1
-	b	.L2142
-.L2147:
-	ldr	r2, .L2177+8
-	ldr	r2, [r2]
-	lsls	r2, r2, #23
-	bpl	.L2149
-	mov	r2, r10
-	mov	r1, r6
-	ldr	r0, .L2177+64
+	lsls	r3, r3, #19
+	bpl	.L2069
+	ldr	r3, [r10]
+	mov	r2, r4
+	mov	r1, r8
+	ldr	r0, .L2073+12
 	bl	printf
-.L2149:
-	ldrh	r0, [r4, #80]
-	bl	ftl_vpn_decrement
-	b	.L2148
-.L2153:
-	strh	r7, [r3, r2, lsl #1]	@ movhi
-	add	sp, sp, #32
+.L2069:
+	mov	r0, r4
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2178:
+.L2068:
+	adds	r5, r7, r4
+	ldr	r3, [sp, #48]
+	add	r5, r5, r5, lsr #31
+	mov	r2, fp
+	ldr	r0, [sp, #12]
+	asrs	r5, r5, #1
+	str	r3, [sp]
+	mov	r3, r10
+	sxtah	r1, r6, r5
+	bl	flash_read_page_en
+	cmp	r0, #512
+	itete	eq
+	addeq	r4, r5, #-1
+	addne	r5, r5, #1
+	sxtheq	r4, r4
+	sxthne	r7, r5
+	b	.L2065
+.L2074:
 	.align	2
-.L2177:
-	.word	.LANCHOR60
-	.word	.LANCHOR68
-	.word	.LANCHOR22
-	.word	.LC102
-	.word	.LANCHOR56
-	.word	.LC106
-	.word	.LANCHOR153
-	.word	.LC0
-	.word	.LANCHOR107
-	.word	.LANCHOR45
-	.word	.LC103
-	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC104
-	.word	.LC105
-	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
-	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
+.L2073:
+	.word	.LANCHOR140
+	.word	.LANCHOR31
+	.word	.LANCHOR14
+	.word	.LC121
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
 	.align	1
-	.global	gc_scan_src_blk_one_page
+	.global	flash_get_last_written_page_ext
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_src_blk_one_page, %function
-gc_scan_src_blk_one_page:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, lr}
+	movs	r5, #1
+	ldr	r4, .L2076
+	ldrh	r4, [r4]
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	rsb	r4, r4, #21
+	lsls	r5, r5, r4
+	asr	r4, r0, r4
+	subs	r5, r5, #1
+	and	r1, r5, r0
+	uxtb	r0, r4
+	bl	flash_get_last_written_page
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L2077:
+	.align	2
+.L2076:
+	.word	.LANCHOR66
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_ddr_para_scan,"ax",%progbits
+	.align	1
+	.global	flash_ddr_para_scan
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r0, #0
-	ldr	r4, .L2214
-	mov	r6, r0
-	movw	r7, #65535
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	add	r2, r4, r3, lsl #1
-	ldrh	r5, [r2, #36]
-	ldr	r2, .L2214+4
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ldrh	r2, [r4, #2]
-.L2180:
-	cmp	r5, r7
-	beq	.L2182
-	cbz	r6, .L2183
-	strb	r3, [r4, #4]
-.L2183:
-	cbz	r0, .L2184
-	strh	r2, [r4, #2]	@ movhi
-.L2184:
-	ldr	r3, .L2214+8
-	ldrh	r3, [r3]
-	muls	r5, r3, r5
-	ldr	r3, .L2214+12
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	mov	r8, r3
-	cmp	r2, #2
-	bne	.L2185
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2185
-	ldrh	r3, [r4, #2]
-	add	r5, r5, r3, lsl #1
-.L2186:
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r1, r3
-	strb	r3, [r4, #4]
-	bne	.L2187
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #4]
-.L2187:
-	ldr	r10, .L2214+16
-	movs	r0, #1
-	bl	buf_alloc
-	movs	r6, #0
 	mov	r7, r0
-.L2197:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L2188
-	cmp	r6, #0
-	beq	.L2189
-.L2188:
-	cmp	r3, r6
-	bgt	.L2190
-.L2198:
-	mov	r0, r7
-	bl	buf_free
+	ldr	r6, .L2084
+	movs	r5, #1
+	mov	r8, r1
+	ldr	r4, .L2084+4
+	ldr	fp, .L2084+8
+	ldr	r10, .L2084+12
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	strb	r5, [r4]
+	bl	flash_set_interface_mode
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	bl	nandc_set_if_mode
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_ddr_tuning_read
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_read_page
+	adds	r0, r0, #1
+	mov	r3, r4
+	bne	.L2079
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #31
+	bpl	.L2079
+	mov	r0, r5
+	bl	flash_set_interface_mode
+	mov	r0, r5
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L2080:
+	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2182:
-	adds	r3, r3, #1
-	movs	r6, #1
-	uxtb	r3, r3
-	cmp	r3, r1
-	itt	eq
-	moveq	r3, #0
-	addeq	r2, r2, #1
-	add	r5, r4, r3, lsl #1
-	itt	eq
-	uxtheq	r2, r2
-	moveq	r0, #1
-	ldrh	r5, [r5, #36]
-	b	.L2180
-.L2185:
-	ldrh	r3, [r4, #2]
-	add	r5, r5, r3
-	b	.L2186
-.L2190:
-	ldrb	r2, [r8]	@ zero_extendqisi2
-	cmp	r2, #2
-	bne	.L2191
-	cbnz	r3, .L2191
-	adds	r3, r6, r5
-	orr	r3, r3, #33554432
-.L2213:
-	str	r3, [r7, #24]
-	movs	r1, #1
-	mov	r0, r7
-	bl	sblk_read_page
-	ldr	r3, [r7, #36]
-	adds	r2, r3, #1
-	beq	.L2194
-	cmp	r3, #512
-	beq	.L2194
-	ldr	r3, [r7, #12]
-	ldr	fp, [r3, #4]
-	mov	r0, fp
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #4]
-	adds	r0, r0, #1
-	bne	.L2196
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, fp
-	bl	pm_log2phys
-.L2196:
-	ldr	r3, [sp, #4]
-	cmp	r5, r3
-	bne	.L2194
-	ldrh	r3, [r4, #20]
-	ldr	r2, [r10]
-	str	r5, [r2, r3, lsl #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #20]	@ movhi
-.L2194:
-	ldrh	r3, [r4, #22]
-	adds	r3, r3, #1
-	strh	r3, [r4, #22]	@ movhi
-.L2189:
-	adds	r6, r6, #1
-	cmp	r6, #4
-	bne	.L2197
-	b	.L2198
-.L2191:
-	orr	r3, r5, r6, lsl #24
-	b	.L2213
-.L2215:
-	.align	2
-.L2214:
-	.word	.LANCHOR59
-	.word	.LANCHOR69
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR61
-	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
-	.section	.text.gc_scan_static_data,"ax",%progbits
+.L2079:
+	movs	r2, #1
+	strb	r2, [r3]
+	b	.L2080
+.L2085:
+	.align	2
+.L2084:
+	.word	.LANCHOR43
+	.word	.LANCHOR21
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_plane_page_read,"ax",%progbits
 	.align	1
-	.global	gc_scan_static_data
+	.global	flash_complete_plane_page_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_static_data, %function
-gc_scan_static_data:
-	@ args = 0, pretend = 0, frame = 8
+	.type	flash_complete_plane_page_read, %function
+flash_complete_plane_page_read:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2100
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L2234
-	ldr	r3, [r4]
-	ldr	r2, [r3, #544]
-	adds	r2, r2, #1
-	beq	.L2217
-	ldr	r6, .L2234+4
-	movs	r5, #11
-	ldr	r7, .L2234+8
-.L2226:
-	ldr	r3, [r4]
-	movs	r2, #0
-	add	r1, sp, #4
-	ldr	r0, [r3, #544]
-	bl	pm_log2phys
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	beq	.L2218
-	movs	r0, #1
-	bl	buf_alloc
-	ldr	r3, [sp, #4]
-	mov	r8, r0
-	movs	r1, #1
-	str	r3, [r0, #24]
-	bl	sblk_read_page
-	ldr	r3, [r8, #36]
-	cmp	r3, #256
-	bne	.L2219
-	ldrh	r2, [r6]
-	mov	r10, #1
-	ldr	r0, [sp, #4]
-	ldrb	r1, [r7]	@ zero_extendqisi2
-	rsb	r3, r2, #21
-	lsl	r3, r10, r3
-	lsrs	r0, r0, r2
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	movs	r2, #0
-	mov	r1, r10
-	uxth	r0, r0
-	bl	gc_add_sblk
-.L2219:
-	ldr	r2, [r8, #12]
-	ldr	r3, [r4]
-	ldr	r2, [r2, #4]
-	ldr	r3, [r3, #544]
-	cmp	r2, r3
-	beq	.L2220
-	movw	r2, #1149
-	ldr	r1, .L2234+12
-	ldr	r0, .L2234+16
-	bl	printf
-.L2221:
-	b	.L2221
-.L2220:
-	mov	r0, r8
-	bl	buf_free
-.L2218:
-	ldr	r3, [r4]
-	ldr	r1, .L2234+20
-	ldr	r2, [r3, #544]
-	ldr	r1, [r1]
-	adds	r2, r2, #1
-	cmp	r2, r1
-	str	r2, [r3, #544]
-	bcc	.L2222
-	mov	r2, #-1
-	str	r2, [r3, #544]
-	ldr	r2, [r3, #548]
-	adds	r2, r2, #1
-	str	r2, [r3, #548]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-.L2216:
+	ubfx	r4, r0, #21, #3
+	mov	r7, r1
+	mov	r8, r2
+	ubfx	r10, r0, #0, #21
+	ubfx	r5, r0, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r4
+	bhi	.L2087
+	movw	r2, #886
+	ldr	r1, .L2100+4
+	ldr	r0, .L2100+8
+	bl	printf
+.L2087:
+	ldr	r3, .L2100+12
+	ldrb	r6, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L2100+16
+	mov	r0, r6
+	ldr	r4, [r3]
+	bl	nandc_cs
+	cbnz	r5, .L2088
+	mov	r0, r10
+	bl	slc_phy_page_address_calc
+	mov	r10, r0
+.L2088:
+	ldr	r3, .L2100+20
+	uxtb	ip, r10
+	lsr	r0, r10, #8
+	lsr	r2, r10, #16
+	ldr	lr, .L2100+28
+	ldrb	r3, [r3, #16]	@ zero_extendqisi2
+	cmp	r3, #1
+	lsl	r3, r6, #8
+	bne	.L2089
+	add	r3, r3, r4
+	movs	r1, #6
+.L2099:
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r3, #2052]
+	str	r1, [r3, #2052]
+	str	ip, [r3, #2052]
+	str	r0, [r3, #2052]
+	str	r2, [r3, #2052]
+.L2097:
+	movs	r2, #224
+	str	r2, [r3, #2056]
+	ldr	r3, [lr]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2092
+	cbz	r5, .L2092
+	add	r10, r10, r10, lsl #1
+	subs	r5, r5, #1
+	add	r0, r10, r5
+.L2098:
+	bl	nandc_set_seed
+	ldr	r3, .L2100+24
+	movs	r1, #0
+	mov	r0, r6
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	mov	r3, r7
+	str	r8, [sp]
+	bl	nandc_xfer
+	bl	nandc_de_cs.constprop.29
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L2222:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L2216
-	subs	r5, r5, #1
-	uxth	r5, r5
-	cmp	r5, #0
-	bne	.L2226
-	b	.L2216
-.L2217:
-	ldr	r2, .L2234+24
-	ldr	r2, [r2]
-	ldr	r1, [r2, #40]
-	cmp	r1, #20480
-	bls	.L2228
-	ldr	r0, [r2, #44]
-	add	r0, r0, r1, lsr #10
-	ubfx	r1, r1, #0, #10
-	str	r1, [r2, #40]
-	str	r0, [r2, #44]
-.L2228:
-	ldr	r1, [r3, #536]
-	ldr	r0, [r3, #12]
-	add	r1, r1, #12910592
-	add	r1, r1, #49408
-	cmp	r0, r1
-	ldr	r1, [r2, #44]
-	bhi	.L2229
-	ldr	r2, [r3, #540]
-	add	r2, r2, #99840
-	adds	r2, r2, #160
-	cmp	r1, r2
-	bls	.L2216
-.L2229:
-	movs	r2, #0
-	str	r1, [r3, #540]
-	str	r0, [r3, #536]
-	str	r2, [r3, #544]
-	b	.L2216
-.L2235:
+.L2089:
+	ldr	r1, [lr]
+	add	r3, r3, r4
+	ldrb	r1, [r1, #12]	@ zero_extendqisi2
+	cmp	r1, #3
+	bne	.L2091
+	movs	r1, #5
+	b	.L2099
+.L2091:
+	movs	r1, #0
+	str	r1, [r3, #2056]
+	str	r1, [r3, #2052]
+	str	r1, [r3, #2052]
+	str	ip, [r3, #2052]
+	str	r0, [r3, #2052]
+	str	r2, [r3, #2052]
+	movs	r2, #5
+	str	r2, [r3, #2056]
+	str	r1, [r3, #2052]
+	str	r1, [r3, #2052]
+	b	.L2097
+.L2092:
+	mov	r0, r10
+	b	.L2098
+.L2101:
 	.align	2
-.L2234:
-	.word	.LANCHOR60
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR154
+.L2100:
+	.word	.LANCHOR18
+	.word	.LANCHOR165
 	.word	.LC0
-	.word	.LANCHOR47
-	.word	.LANCHOR46
-	.size	gc_scan_static_data, .-gc_scan_static_data
-	.section	.text.ftl_sblk_dump,"ax",%progbits
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR20
+	.word	.LANCHOR31
+	.word	.LANCHOR16
+	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
+	.section	.text.flash_complete_page_read,"ax",%progbits
 	.align	1
-	.global	ftl_sblk_dump
+	.global	flash_complete_page_read
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_sblk_dump, %function
-ftl_sblk_dump:
-	@ args = 0, pretend = 0, frame = 80
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	cmp	r0, r3
-	sub	sp, sp, #120
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r6, r0, #21, #3
+	ldr	r3, .L2132
 	mov	r7, r0
-	str	r1, [sp, #64]
-	beq	.L2258
-	ldr	r5, .L2286
-	lsls	r4, r0, #2
-	add	r1, sp, #104
-	strh	r0, [sp, #88]	@ movhi
-	ldr	r3, [r5]
-	add	r3, r3, r4
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	and	r3, r3, #224
-	cmp	r3, #160
-	itet	eq
-	ldreq	r3, .L2286+4
-	movne	r3, #1
-	ldrbeq	r3, [r3]	@ zero_extendqisi2
-	str	r3, [sp, #44]
-	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L2286+8
-	uxtb	r0, r0
-	movs	r2, #0
-	strb	r0, [sp, #97]
-	ldrh	r1, [r3]
-	ldr	r3, .L2286+12
-	strh	r2, [sp, #90]	@ movhi
-	strb	r2, [sp, #93]
-	ldr	r3, [r3]
-	smulbb	r1, r1, r0
-	strh	r2, [sp, #98]	@ movhi
-	lsls	r6, r3, #19
-	strh	r1, [sp, #94]	@ movhi
-	bpl	.L2239
-	ldr	r3, [r5]
-	mov	r1, r7
-	add	r3, r3, r4
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	str	r0, [sp]
-	ldr	r3, [sp, #44]
-	ldr	r0, .L2286+16
-	lsrs	r2, r2, #5
-	bl	printf
-.L2239:
-	movs	r6, #0
-	movs	r0, #1
-	bl	buf_alloc
-	mov	fp, r6
-	mov	r5, r0
-	str	r6, [sp, #52]
-	str	r6, [sp, #48]
-.L2240:
-	ldr	r3, .L2286+8
-	ldrh	r2, [r3]
-	uxth	r3, r6
-	cmp	r2, r3
-	bls	.L2255
-	str	r3, [sp, #68]
-	lsls	r3, r3, #1
-	ldr	r8, .L2286+12
-	subs	r3, r3, #1
-	str	r3, [sp, #72]
-	movs	r3, #0
-	str	r3, [sp, #56]
-	b	.L2256
-.L2252:
-	ldr	r3, [sp, #76]
-	add	r2, sp, #120
-	add	r3, r2, r3, lsl #1
-	ldrh	r10, [r3, #-32]
-	movw	r3, #65535
-	cmp	r10, r3
-	beq	.L2241
-	ldr	r3, .L2286+20
-	ldrh	r4, [r3]
-	ldr	r3, [sp, #44]
-	cmp	r3, #3
-	mul	r4, r10, r4
-	bne	.L2242
-	ldr	r3, [sp, #40]
-	uxtah	r4, r4, r6
-.L2284:
-	orr	r4, r4, r3, lsl #24
-.L2243:
-	movs	r1, #1
-	str	r4, [r5, #24]
-	mov	r0, r5
-	bl	sblk_read_page
-	ldr	r3, [r5, #36]
-	str	r3, [sp, #60]
-	ldr	r3, [r8]
-	lsls	r1, r3, #19
-	bpl	.L2245
-	ldr	r2, [r5, #12]
-	ldr	r3, [r5, #4]
-	ldr	r0, .L2286+24
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #32]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #28]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #24]
-	mov	r1, r10
-	ldr	r2, [r2]
-	str	r2, [sp, #20]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #4]
+	mov	r8, r1
+	ubfx	r4, r0, #0, #21
 	str	r2, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r2, [sp, #68]
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #60]
-	str	r3, [sp]
-	mov	r3, r4
+	ubfx	r5, r0, #24, #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2103
+	mov	r2, #1008
+	ldr	r1, .L2132+4
+	ldr	r0, .L2132+8
 	bl	printf
-.L2245:
-	ldr	r3, [sp, #60]
-	adds	r2, r3, #1
-	beq	.L2260
-	cmp	r3, #512
-	ldr	r3, [sp, #48]
-	it	eq
-	moveq	r3, #1
-.L2285:
-	str	r3, [sp, #48]
-	ldr	r3, [r5, #12]
-	ldr	r10, [r3, #4]
-	mov	r0, r10
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #84]
-	adds	r0, r0, #1
-	bne	.L2247
+.L2103:
+	ldr	r3, .L2132+12
+	ldrb	r6, [r3, r6]	@ zero_extendqisi2
+	ldr	r3, .L2132+16
+	mov	r0, r6
+	ldr	fp, [r3]
+	bl	nandc_cs
+	cbnz	r5, .L2104
+	mov	r0, r4
+	bl	slc_phy_page_address_calc
+	mov	r4, r0
+.L2104:
+	add	r3, fp, r6, lsl #8
+	movs	r2, #5
+	str	r2, [r3, #2056]
 	movs	r2, #0
-	add	r1, sp, #84
-	mov	r0, r10
-	bl	pm_log2phys
-.L2247:
-	ldr	r3, [sp, #84]
-	cmp	r4, r3
-	bne	.L2248
-	ldr	r3, [sp, #52]
-	adds	r3, r3, #1
-	str	r3, [sp, #52]
-	ldr	r3, [r8]
-	lsls	r0, r3, #19
-	bpl	.L2248
-	ldr	r2, [r5, #12]
-	mov	r1, r4
-	ldr	r3, [sp, #52]
-	ldr	r0, .L2286+28
-	ldr	r2, [r2, #4]
-	bl	printf
-.L2248:
-	ldr	r3, [sp, #64]
-	cbz	r3, .L2249
-	ldr	r2, [r3, fp, lsl #2]
-	lsl	r4, fp, #2
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	cmp	r3, r2
-	beq	.L2250
-	ldr	r3, [r8]
-	lsls	r1, r3, #19
-	bpl	.L2250
-	mov	r1, fp
-	ldr	r0, .L2286+32
-	bl	printf
-.L2250:
-	ldr	r3, [sp, #64]
-	ldr	r2, [r5, #12]
-	ldr	r3, [r3, r4]
-	ldr	r2, [r2, #4]
-	cmp	r2, r3
-	beq	.L2249
-	adds	r3, r3, #1
-	beq	.L2249
-	mov	r2, #616
-	ldr	r1, .L2286+36
-	ldr	r0, .L2286+40
-	bl	printf
-.L2251:
-	b	.L2251
-.L2242:
-	ldr	r3, [sp, #44]
-	cmp	r3, #2
-	bne	.L2244
-	ldr	r3, [sp, #72]
-	add	r4, r4, r3
-	ldr	r3, [sp, #40]
-	add	r4, r4, r3
-	ldr	r3, .L2286+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	b	.L2284
-.L2244:
-	uxtah	r4, r4, r6
-	b	.L2243
-.L2260:
-	movs	r3, #1
-	b	.L2285
-.L2249:
-	add	fp, fp, #1
-.L2241:
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #40]
-.L2254:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r3, r2
-	bcs	.L2252
-	ldr	r3, [sp, #56]
-	adds	r3, r3, #1
-	str	r3, [sp, #56]
-.L2256:
-	ldrb	r2, [sp, #97]	@ zero_extendqisi2
-	ldrh	r3, [sp, #56]
-	cmp	r2, r3
-	bls	.L2253
-	movs	r3, #1
-	str	r3, [sp, #40]
-	ldrh	r3, [sp, #56]
-	adds	r3, r3, #8
-	str	r3, [sp, #76]
-	b	.L2254
-.L2253:
-	adds	r6, r6, #1
-	b	.L2240
-.L2255:
-	mov	r0, r5
-	bl	buf_free
-	ldr	r3, .L2286+12
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	uxtb	r2, r4
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [r3, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [r3, #2052]
+	movs	r2, #224
+	str	r2, [r3, #2056]
+	ldr	r3, .L2132+20
 	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L2257
-	ldr	r3, .L2286+44
-	mov	r1, r7
-	ldr	r0, .L2286+48
-	ldr	r2, [r3]
-	ldr	r3, [sp, #52]
-	ldrh	r2, [r2, r7, lsl #1]
-	bl	printf
-.L2257:
-	ldr	r0, [sp, #48]
-.L2236:
-	add	sp, sp, #120
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2105
+	cmp	r5, #0
+	beq	.L2105
+	add	r3, r4, r4, lsl #1
+	subs	r0, r5, #1
+	add	r0, r0, r3
+.L2131:
+	bl	nandc_set_seed
+	ldr	r10, .L2132+48
+	movs	r1, #0
+	ldr	r3, [sp, #8]
+	mov	r0, r6
+	ldrb	r2, [r10, #9]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r8
+	bl	nandc_xfer
+	adds	r1, r0, #1
+	bne	.L2107
+	ldr	fp, .L2132+36
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L2108
+	movs	r3, #0
+	mov	r2, r8
+	strb	r3, [fp]
+	orr	r1, r4, r5, lsl #24
+	ldrb	r3, [r10, #9]	@ zero_extendqisi2
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	bl	flash_read_page
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+	strb	r3, [fp]
+	cbnz	r5, .L2109
+.L2114:
+	ldr	r3, .L2132+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2109
+	ldr	r3, .L2132+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	blt	.L2109
+	ldrb	r3, [r10, #19]	@ zero_extendqisi2
+	subs	r3, r3, #4
+	cmp	r3, #4
+	it	ls
+	movls	r0, #256
+.L2102:
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2258:
-	movs	r0, #0
-	b	.L2236
-.L2287:
+.L2105:
+	mov	r0, r4
+	b	.L2131
+.L2109:
+	adds	r2, r0, #1
+	bne	.L2102
+.L2115:
+	ldr	r3, .L2132+32
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L2111
+.L2113:
+	ldr	r3, .L2132+36
+	mov	r2, r7
+	movs	r1, #0
+	ldr	r0, .L2132+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L2132+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2112
+	mov	r0, #-1
+	b	.L2102
+.L2111:
+	ldrb	r3, [r10, #9]	@ zero_extendqisi2
+	mov	r2, r8
+	orr	r1, r4, r5, lsl #24
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	blx	fp
+	adds	r3, r0, #1
+	beq	.L2113
+	b	.L2102
+.L2112:
+	ldrb	r3, [r10, #9]	@ zero_extendqisi2
+	mov	r2, r8
+	orr	r1, r4, r5, lsl #24
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r3, [sp, #8]
+	bl	flash_ddr_tuning_read
+	b	.L2102
+.L2107:
+	cmp	r5, #0
+	beq	.L2114
+	b	.L2102
+.L2108:
+	cmp	r5, #0
+	bne	.L2115
+	b	.L2114
+.L2133:
 	.align	2
-.L2286:
-	.word	.LANCHOR57
-	.word	.LANCHOR64
-	.word	.LANCHOR79
-	.word	.LANCHOR22
-	.word	.LC107
-	.word	.LANCHOR75
-	.word	.LC73
-	.word	.LC108
-	.word	.LC109
-	.word	.LANCHOR155
-	.word	.LC0
-	.word	.LANCHOR56
-	.word	.LC110
-	.size	ftl_sblk_dump, .-ftl_sblk_dump
-	.section	.text.gc_search_src_blk,"ax",%progbits
+.L2132:
+	.word	.LANCHOR18
+	.word	.LANCHOR166
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR16
+	.word	.LANCHOR0
+	.word	.LANCHOR44
+	.word	.LANCHOR162
+	.word	.LANCHOR46
+	.word	.LC122
+	.word	.LANCHOR21
+	.word	.LANCHOR31
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",%progbits
 	.align	1
-	.global	gc_search_src_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_search_src_blk, %function
-gc_search_src_blk:
-	@ args = 0, pretend = 0, frame = 24
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2360
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	str	r2, [sp, #12]
-	mov	r7, r0
-	mov	fp, r3
-	ldr	r2, [r3]
-	str	r1, [sp, #16]
-	add	r1, r0, #60
-	ldrh	r5, [r2, r1, lsl #1]
-	cmp	r5, #0
-	bne	.L2288
-	ldr	r3, .L2360+4
-	ldr	r6, .L2360+8
-	ldr	r2, [r3]
-	mov	r10, r3
-	ldrh	r4, [r2, #134]
-	ldr	r2, [r6]
-	tst	r2, #256
-	beq	.L2291
-	mov	r1, r0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2233
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L2135
+.L2168:
+	movs	r6, #0
+	b	.L2134
+.L2135:
+	ldr	r4, .L2233+4
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldrb	r2, [r3, #42]	@ zero_extendqisi2
+	ldr	r6, [r3, #24]
+	subs	r3, r2, #1
+	cmp	r3, #10
+	bhi	.L2168
+	tbh	[pc, r3, lsl #1]
+.L2138:
+	.2byte	(.L2137-.L2138)/2
+	.2byte	(.L2139-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2141-.L2138)/2
+	.2byte	(.L2142-.L2138)/2
+	.2byte	(.L2143-.L2138)/2
+	.2byte	(.L2140-.L2138)/2
+	.2byte	(.L2143-.L2138)/2
+	.p2align 1
+.L2137:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r0, r0, #25
+	bpl	.L2168
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldr	r2, [r3, #8]
+	ldr	r1, [r3, #4]
+	cbz	r2, .L2145
+	ldrb	r0, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, .L2233+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r0, r3
+	it	eq
+	moveq	r1, r2
+.L2145:
+	movs	r3, #48
+	mov	r0, r6
+	mla	r4, r3, r5, r4
+	ldr	r2, [r4, #12]
+	bl	flash_complete_page_read
+	str	r0, [r4, #36]
+.L2232:
+	movs	r3, #13
+	strb	r3, [r4, #42]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #8
+	strb	r3, [r4, #2]
+	b	.L2168
+.L2139:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	bpl	.L2168
+	movs	r3, #48
+	mul	r1, r3, r5
+	ldrb	r6, [r4, r1]	@ zero_extendqisi2
+	adds	r2, r4, r1
+	ldr	fp, [r2, #4]
+	mla	r3, r3, r6, r4
+	ldr	r10, [r3, #4]
+	ldr	r3, [r2, #8]
+	cbz	r3, .L2146
+	ldrb	r1, [r2, #40]	@ zero_extendqisi2
+	ldr	r2, .L2233+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r1, r2
+	it	eq
+	moveq	fp, r3
+.L2146:
+	movs	r3, #48
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #8]
+	cbz	r2, .L2147
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, .L2233+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r1, r3
+	it	eq
+	moveq	r10, r2
+.L2147:
+	movs	r3, #48
+	mov	r1, fp
+	mla	r7, r3, r5, r4
+	str	r3, [sp, #12]
+	ldr	r2, [r7, #12]
+	ldr	r0, [r7, #24]
+	bl	flash_complete_plane_page_read
 	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #16]
-	ldr	r0, .L2360+12
-	bl	printf
-.L2291:
-	ldr	r3, [r6]
-	lsls	r2, r3, #23
-	bpl	.L2292
-	ldr	r2, [fp]
-	ldr	r1, [r10]
-	ldr	r3, .L2360+16
-	ldrh	r2, [r2, #126]
-	ldrh	r1, [r1, #134]
-	ldrh	r3, [r3]
-	ldr	r0, .L2360+12
+	mov	r8, r0
+	mov	r1, r10
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #12]
+	ldr	r0, [r3, #24]
+	bl	flash_complete_plane_page_read
+	cmp	r8, #-1
+	str	r0, [sp, #12]
+	beq	.L2148
+	ldr	r3, [r7, #20]
+	adds	r2, r3, #1
+	beq	.L2149
+	ldr	r2, [r7, #12]
+	ldr	r2, [r2, #4]
+	cmp	r3, r2
+	beq	.L2149
+.L2148:
+	movs	r7, #48
+	ldr	r3, .L2233+8
+	mla	r7, r7, r5, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r2, fp
+	ldr	r0, [r7, #24]
+	str	r3, [sp]
+	ldr	r3, [r7, #12]
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	bl	flash_read_page_en
+	ldr	r2, [r7, #20]
+	mov	r8, r0
+	adds	r3, r2, #1
+	beq	.L2150
+	ldr	r3, [r7, #12]
+	ldr	r1, [r3, #4]
+	cmp	r2, r1
+	beq	.L2150
+	ldr	r0, .L2233+12
+	ldr	r0, [r0]
+	lsls	r0, r0, #25
+	bpl	.L2150
+	str	r1, [sp]
+	ldr	r1, [r7, #24]
+	ldr	r3, [r3]
+	ldr	r0, .L2233+16
 	bl	printf
-.L2292:
-	ldr	r3, [sp, #12]
-	cmp	r3, #64
-	bls	.L2293
-	movw	r2, #1028
-	ldr	r1, .L2360+20
-	ldr	r0, .L2360+24
+.L2150:
+	movs	r3, #48
+	mla	r3, r3, r5, r4
+	ldr	r2, [r3, #20]
+	adds	r0, r2, #1
+	beq	.L2149
+	ldr	r3, [r3, #12]
+	ldr	r3, [r3, #4]
+	cmp	r2, r3
+	beq	.L2149
+	mov	r2, #360
+	ldr	r1, .L2233+20
+	ldr	r0, .L2233+24
 	bl	printf
-.L2294:
-	b	.L2294
-.L2293:
-	ldr	r3, .L2360+28
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2360+32
-	ldrh	r6, [r3]
-	ldr	r3, .L2360+36
-	ldrh	r3, [r3]
-	smulbb	r6, r6, r2
-	uxth	r6, r6
-	smulbb	r3, r3, r2
-	uxth	r3, r3
-	str	r3, [sp, #8]
-	ldr	r3, [r10]
-	ldrh	r3, [r3, #134]
-.L2357:
-	str	r3, [sp, #4]
-	ldr	r3, .L2360+40
-	ldr	r0, [sp, #4]
-	ldrh	r2, [r3]
-	ldr	r3, [r10]
-	ldrh	r3, [r3, #134]
-	subs	r1, r2, r3
-	cmp	r0, r1
-	blt	.L2307
-.L2304:
-	ldr	r3, [r10]
-	ldr	r2, [sp, #4]
-	ldrh	r1, [r3, #134]
-	ldr	r3, .L2360+40
-	ldrh	r3, [r3]
-	subs	r3, r3, r1
+.L2149:
+	movs	r3, #48
+	movs	r2, #13
+	mla	r5, r3, r5, r4
+	strb	r2, [r5, #42]
+	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	str	r8, [r5, #36]
+	orr	r2, r2, #8
+	strb	r2, [r5, #2]
+	ldr	r2, [sp, #12]
+	adds	r2, r2, #1
+	beq	.L2151
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #20]
+	adds	r1, r2, #1
+	beq	.L2153
+	ldr	r3, [r3, #12]
+	ldr	r3, [r3, #4]
 	cmp	r2, r3
-	ldr	r2, .L2360+32
-	ldr	r3, [fp]
-	blt	.L2308
-	strh	r1, [r3, #126]	@ movhi
-	cmp	r7, #0
-	bne	.L2309
-	ldr	r3, .L2360+16
-	ldrh	r2, [r2]
-	ldrh	r1, [r3]
-	rsb	r0, r2, r2, lsl #3
-	cmp	r1, r6
-	it	cc
-	strhcc	r6, [r3]	@ movhi
-	ldrh	r1, [r3]
-	cmp	r1, r0, asr #3
-	bge	.L2312
-	add	r1, r1, r2, lsr #3
-	strh	r1, [r3]	@ movhi
-.L2312:
-	ldr	r3, .L2360+8
+	beq	.L2153
+.L2151:
+	movs	r5, #48
+	ldr	r3, .L2233+8
+	mla	r5, r5, r6, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r2, r10
+	ldr	r0, [r5, #24]
+	str	r3, [sp]
+	ldr	r3, [r5, #12]
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	bl	flash_read_page_en
+	ldr	r2, [r5, #20]
+	adds	r3, r2, #1
+	beq	.L2155
+	ldr	r3, [r5, #12]
+	ldr	r1, [r3, #4]
+	cmp	r2, r1
+	beq	.L2155
+	ldr	r0, .L2233+12
+	ldr	r0, [r0]
+	lsls	r7, r0, #25
+	bpl	.L2155
+	str	r1, [sp]
+	ldr	r0, .L2233+16
 	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2318
-	mov	r1, r5
-	ldr	r0, .L2360+44
-	bl	printf
-.L2318:
-	bl	print_ftl_debug_info
-.L2288:
-	mov	r0, r5
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2307:
-	ldr	r1, [fp]
-	ldrh	r4, [r1, #126]
-	ldr	r1, [sp, #4]
-	add	r4, r4, r1
-	uxth	r4, r4
-	cmp	r2, r4
-	bhi	.L2296
-	subs	r3, r3, r2
-	add	r4, r4, r3
-	uxth	r4, r4
-	cmp	r2, r4
-	bhi	.L2296
-	movw	r2, #1038
-	ldr	r1, .L2360+20
-	ldr	r0, .L2360+24
+	ldr	r1, [r5, #24]
 	bl	printf
-.L2297:
-	b	.L2297
-.L2296:
-	ldr	r3, .L2360+48
-	ldr	r3, [r3]
-	add	r3, r3, r4, lsl #2
-	ldrb	r8, [r3, #2]	@ zero_extendqisi2
-	and	r8, r8, #224
-	cmp	r8, #32
-	beq	.L2298
-	cmp	r8, #224
-	beq	.L2298
-	ldr	r3, .L2360+52
-	cmp	r8, #0
-	bne	.L2299
-	lsls	r2, r4, #1
-	str	r2, [sp, #20]
-	ldr	r2, [r3]
-	ldrh	r1, [r2, r4, lsl #1]
-	cbz	r1, .L2300
-	mov	r2, r4
-	ldr	r0, .L2360+56
-	str	r3, [sp, #20]
+.L2155:
+	movs	r3, #48
+	mla	r3, r3, r6, r4
+	ldr	r2, [r3, #20]
+	adds	r0, r2, #1
+	beq	.L2153
+	ldr	r3, [r3, #12]
+	ldr	r3, [r3, #4]
+	cmp	r2, r3
+	beq	.L2153
+	movw	r2, #375
+	ldr	r1, .L2233+20
+	ldr	r0, .L2233+24
 	bl	printf
-	mov	r1, r8
-	mov	r0, r4
-	bl	ftl_sblk_dump
-	ldr	r3, [sp, #20]
-.L2300:
-	ldr	r2, [r3]
-	lsls	r3, r4, #1
-	ldrh	r3, [r2, r3]
-	cmp	r3, #0
-	beq	.L2298
-	movw	r2, #1047
-	ldr	r1, .L2360+20
-	ldr	r0, .L2360+24
+.L2153:
+	movs	r3, #48
+	mla	r4, r3, r6, r4
+	str	r8, [r4, #36]
+	b	.L2232
+.L2140:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	mov	r6, r0
+	bpl	.L2168
+	ands	r2, r0, #5
+	mov	r3, #48
+	beq	.L2156
+	mla	r4, r3, r5, r4
+	movs	r3, #12
+	mov	r2, r0
+	ldr	r0, .L2233+28
+	strb	r3, [r4, #42]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r4, #24]
 	bl	printf
-.L2301:
-	b	.L2301
-.L2299:
+.L2231:
+	mov	r3, #-1
+	str	r3, [r4, #36]
+	b	.L2134
+.L2234:
+	.align	2
+.L2233:
+	.word	.LANCHOR54
+	.word	.LANCHOR50
+	.word	.LANCHOR123
+	.word	.LANCHOR14
+	.word	.LC123
+	.word	.LANCHOR167
+	.word	.LC0
+	.word	.LC124
+.L2156:
+	mla	r6, r3, r5, r4
+	movs	r3, #13
+	strb	r3, [r6, #42]
+	ldr	r3, .L2235
+	str	r2, [r6, #36]
 	ldr	r3, [r3]
-	movw	r2, #65535
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, r2
-	beq	.L2298
-	ldr	r1, [sp, #16]
-	cmp	r8, #160
-	ite	ne
-	movne	r2, #1
-	moveq	r2, #2
-	ands	r2, r2, r1
-	cbnz	r7, .L2303
-	cmp	r6, r3
-	it	cs
-	movcs	r6, r3
-	cbz	r2, .L2298
-	ldr	r2, .L2360+16
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	bls	.L2298
-	mov	r2, r7
-	mov	r1, r7
-	mov	r0, r4
-	bl	gc_add_sblk
-	cbz	r0, .L2298
-.L2356:
-	adds	r5, r5, #1
-	uxth	r5, r5
-	b	.L2305
-.L2303:
-	cbz	r2, .L2305
-	cmp	r8, #160
-	bne	.L2306
-	ldr	r2, [sp, #8]
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
-	str	r2, [sp, #8]
-	ldr	r2, .L2360+60
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	bls	.L2305
-.L2359:
-	mov	r2, r7
-	movs	r1, #0
-	mov	r0, r4
-	bl	gc_add_sblk
-	cbz	r0, .L2305
-	b	.L2356
-.L2306:
-	ldr	r2, .L2360+64
-	cmp	r6, r3
-	it	cs
-	movcs	r6, r3
-	ldrh	r2, [r2]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L2235+4
 	cmp	r2, r3
-	bls	.L2359
-.L2305:
-	ldr	r3, [sp, #12]
-	cmp	r5, r3
-	bhi	.L2304
-.L2298:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	b	.L2357
-.L2309:
-	ldr	r3, .L2360+36
-	ldrh	r1, [r3]
-	ldr	r3, .L2360+68
+	bne	.L2168
+	ldrh	r3, [r6, #34]
+	cmp	r3, #0
+	bne	.L2168
+	ldr	r3, .L2235+8
+	ldr	r0, [r6, #24]
+	ldr	r7, .L2235+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	ldr	r1, [sp, #8]
-	cmp	r1, r3
-	ldr	r1, .L2360+60
-	beq	.L2313
-	ldrh	r0, [r1]
-	ldr	r4, [sp, #8]
-	cmp	r0, r4
-	itt	cc
-	ldrhcc	r0, [sp, #8]
-	strhcc	r0, [r1]	@ movhi
-.L2313:
-	ldrh	r4, [r2]
-	ldrh	r0, [r1]
-	lsrs	r2, r4, #3
-	subs	r3, r3, r2
-	cmp	r0, r3
-	itt	lt
-	addlt	r0, r0, r2
-	strhlt	r0, [r1]	@ movhi
-	ldr	r1, .L2360+64
-	ldrh	r3, [r1]
-	cmp	r3, r4, lsr #1
-	bls	.L2312
-	subs	r3, r3, r2
-	strh	r3, [r1]	@ movhi
-	b	.L2312
-.L2308:
-	strh	r4, [r3, #126]	@ movhi
-	cbnz	r7, .L2316
-	ldrh	r1, [r2]
-	ldr	r2, .L2360+16
-	ldrh	r3, [r2]
-	cmp	r3, r1, lsr #2
-	bls	.L2312
-	sub	r3, r3, r1, lsr #3
-	strh	r3, [r2]	@ movhi
-	b	.L2312
-.L2316:
-	ldr	r1, .L2360+60
-	ldrh	r3, [r2]
-	ldr	r0, .L2360+68
-	ldrh	r2, [r1]
-	ldrb	r0, [r0]	@ zero_extendqisi2
-	cmp	r2, r3, lsr #1
-	it	hi
-	subhi	r2, r2, r3, lsr #3
-	mul	r3, r3, r0
-	it	hi
-	strhhi	r2, [r1]	@ movhi
-	ldr	r1, .L2360+64
-	subs	r3, r3, #32
-	ldrh	r2, [r1]
+	ldr	r2, .L2235+16
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	str	r3, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	mov	r3, r0
+	beq	.L2157
+	ldr	r1, [r6, #12]
+	ldr	r2, [r7]
+	ldr	r1, [r1]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	beq	.L2168
+.L2157:
+	movs	r2, #48
+	ldr	r0, .L2235+20
+	mla	r4, r2, r5, r4
+	ldr	r2, .L2235+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, [r4, #24]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #36]
+	b	.L2168
+.L2143:
+	add	r3, r5, r5, lsl #1
+	cmp	r2, #11
+	it	eq
+	moveq	r1, #10
+	add	r3, r4, r3, lsl #4
+	it	ne
+	movne	r1, #3
+	ubfx	r0, r6, #21, #3
+	movs	r7, #48
+.L2159:
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	cmp	r8, #255
+	bne	.L2166
+	mov	r6, #-1
+	b	.L2134
+.L2166:
+	mla	r2, r7, r8, r4
+	add	r3, r8, r8, lsl #1
+	ldrb	ip, [r2, #42]	@ zero_extendqisi2
+	add	r3, r4, r3, lsl #4
+	cmp	ip, r1
+	bne	.L2159
+	ldr	r2, [r2, #24]
+	ubfx	r2, r2, #21, #3
+	cmp	r0, r2
+	bne	.L2159
+	mov	r0, r6
+	movs	r1, #64
+	bl	flash_wait_device_ready
+	mov	r6, r0
+	lsls	r0, r6, #25
+	bmi	.L2161
+.L2230:
+	movs	r6, #0
+	b	.L2162
+.L2161:
+	ands	r2, r6, #15
+	mul	r3, r7, r5
+	beq	.L2163
+	adds	r7, r4, r3
+	mov	r10, #12
+	ldrb	r1, [r7, #1]	@ zero_extendqisi2
+	mov	r2, r6
+	str	r10, [sp]
+	ldr	r3, [r7, #24]
+	ldr	r0, .L2235+28
+	bl	printf
+	mov	r3, #-1
+	strb	r10, [r7, #42]
+	str	r3, [r7, #36]
+.L2162:
+	movs	r3, #48
+	mla	r5, r3, r5, r4
+	mla	r8, r3, r8, r4
+	ldrb	r2, [r5, #42]	@ zero_extendqisi2
+	ldr	r3, [r5, #36]
+	strb	r2, [r8, #42]
+	str	r3, [r8, #36]
+.L2134:
+	mov	r0, r6
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2163:
+	adds	r6, r4, r3
+	movs	r3, #13
+	strb	r3, [r6, #42]
+	ldr	r3, .L2235
+	str	r2, [r6, #36]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #156]
+	ldr	r3, .L2235+4
 	cmp	r2, r3
-	itt	lt
-	addlt	r2, r2, #32
-	strhlt	r2, [r1]	@ movhi
-	b	.L2312
-.L2361:
+	bne	.L2230
+	ldrh	r3, [r6, #34]
+	cmp	r3, #0
+	bne	.L2230
+	ldr	r3, .L2235+8
+	ldr	r0, [r6, #24]
+	ldr	r7, .L2235+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, .L2235+16
+	bic	r1, r0, #14680064
+	ubfx	r0, r0, #21, #3
+	str	r3, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r1, r0, #1
+	mov	r3, r0
+	beq	.L2165
+	ldr	r1, [r6, #12]
+	ldr	r2, [r7]
+	ldr	r1, [r1]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	beq	.L2230
+.L2165:
+	ldr	r2, .L2235+24
+	movs	r6, #48
+	mla	r6, r6, r5, r4
+	ldr	r0, .L2235+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrb	r1, [r6, #1]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, [r6, #24]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r6, #36]
+	b	.L2230
+.L2141:
+	mov	r0, r6
+	movs	r1, #32
+	bl	flash_wait_device_ready
+	lsls	r2, r0, #26
+	mov	r6, r0
+	bpl	.L2168
+	ands	r2, r0, #15
+	mov	r3, #48
+	mla	r4, r3, r5, r4
+	beq	.L2167
+	movs	r3, #12
+	strb	r3, [r4, #42]
+	b	.L2231
+.L2167:
+	movs	r3, #13
+	str	r2, [r4, #36]
+	strb	r3, [r4, #42]
+	b	.L2168
+.L2142:
+	movs	r1, #64
+	mov	r0, r6
+	bl	flash_wait_device_ready
+	lsls	r3, r0, #25
+	bpl	.L2168
+	movs	r3, #48
+	mla	r4, r3, r5, r4
+	movs	r3, #7
+	str	r0, [r4, #36]
+	strb	r3, [r4, #42]
+	b	.L2168
+.L2236:
 	.align	2
-.L2360:
-	.word	.LANCHOR60
+.L2235:
+	.word	.LANCHOR102
+	.word	1145785929
+	.word	.LANCHOR123
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LC125
 	.word	.LANCHOR46
-	.word	.LANCHOR22
-	.word	.LC111
-	.word	.LANCHOR58
-	.word	.LANCHOR156
-	.word	.LC0
-	.word	.LANCHOR69
-	.word	.LANCHOR79
-	.word	.LANCHOR68
+	.word	.LC126
+	.word	.LC127
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
+	.align	1
+	.global	sblk_wait_write_queue_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L2240
+.L2238:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2239
+	pop	{r4, pc}
+.L2239:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2238
+.L2241:
+	.align	2
+.L2240:
 	.word	.LANCHOR54
-	.word	.LC113
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LC112
-	.word	.LANCHOR106
-	.word	.LANCHOR105
-	.word	.LANCHOR70
-	.size	gc_search_src_blk, .-gc_search_src_blk
-	.section	.text.ftl_read,"ax",%progbits
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",%progbits
 	.align	1
-	.global	ftl_read
+	.global	ftl_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read, %function
-ftl_read:
-	@ args = 0, pretend = 0, frame = 48
+	.type	ftl_read_page, %function
+ftl_read_page:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r2
-	sub	sp, sp, #64
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r8, [sp, #24]
+	mov	r5, r1
+	mov	r6, r2
 	mov	r7, r3
-	cmp	r0, #0
-	bne	.L2363
-	ldr	r3, .L2395
-	mov	r0, #24576
-	ldr	r3, [r3]
-.L2364:
-	add	r2, r1, r10
-	cmp	r3, r2
-	bcc	.L2388
-	ldr	r4, .L2395+4
-	add	fp, r0, r1
-	ldr	r5, .L2395+8
-	mov	r0, fp
-	ldr	r2, [r4]
-	ldrb	r6, [r5]	@ zero_extendqisi2
-	ldr	r3, [r2, #24]
-	mov	r1, r6
-	add	r3, r3, r10
-	str	r3, [r2, #24]
-	bl	__aeabi_uidiv
-	add	r3, r10, fp
-	str	r0, [sp, #28]
-	mov	r1, r6
-	subs	r0, r3, #1
-	str	r3, [sp, #40]
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #28]
-	ldr	r6, [sp, #28]
-	str	r0, [sp, #44]
-	rsb	r3, r3, #1
-	str	r5, [sp, #32]
-	add	r3, r3, r0
-	str	r4, [sp, #52]
-	str	r3, [sp, #24]
-	movs	r3, #0
-	str	r3, [sp, #36]
-.L2366:
-	ldr	r3, [sp, #24]
-	cbnz	r3, .L2386
-	ldr	r0, [sp, #36]
-.L2362:
-	add	sp, sp, #64
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2363:
-	cmp	r0, #3
-	bhi	.L2388
-	lsls	r0, r0, #13
-	mov	r3, #8192
-	b	.L2364
-.L2386:
-	ldr	r3, [sp, #32]
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #28]
-	cmp	r6, r3
-	uxth	r5, r1
-	bne	.L2367
-	mov	r0, fp
-	bl	__aeabi_uidivmod
-	uxth	r8, r1
-	sub	r5, r5, r8
-	uxth	r5, r5
-	cmp	r10, r5
-	bcs	.L2368
-	uxth	r5, r10
-.L2368:
-	ldr	r2, .L2395+12
-	movs	r3, #0
-.L2371:
-	ldr	r1, [r2, #20]
-	cmp	r6, r1
-	bne	.L2369
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	lsls	r1, r1, #28
-	bpl	.L2369
-	ldr	r1, .L2395+12
-	movs	r2, #48
-	lsls	r5, r5, #9
-	mov	r0, r7
-	add	r7, r7, r5
-	mla	r3, r2, r3, r1
-	mov	r2, r5
-	ldr	r1, [r3, #4]
-	add	r1, r1, r8, lsl #9
-	bl	ftl_memcpy
-.L2370:
-	ldr	r3, [sp, #24]
-	adds	r6, r6, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #24]
-	b	.L2366
-.L2367:
-	ldr	r3, [sp, #44]
-	mov	r8, #0
-	cmp	r6, r3
-	ittt	eq
-	addeq	r5, fp, r10
-	mlseq	r1, r6, r1, r5
-	uxtbeq	r5, r1
-	b	.L2368
-.L2369:
-	adds	r3, r3, #1
-	adds	r2, r2, #48
-	cmp	r3, #32
-	bne	.L2371
-	mov	r0, r6
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #60]
-	adds	r0, r0, #1
-	bne	.L2372
-	movs	r2, #0
-	add	r1, sp, #60
-	mov	r0, r6
-	bl	pm_log2phys
-.L2372:
-	ldr	r3, [sp, #60]
-	adds	r3, r3, #1
-	bne	.L2373
-	movs	r4, #0
-.L2374:
-	ldr	r3, [sp, #32]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcs	.L2370
-	mla	r3, r3, r6, r4
-	cmp	fp, r3
-	bhi	.L2375
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	bls	.L2375
-	mov	r0, r7
-	add	r7, r7, #512
-	mov	r2, #512
-	movs	r1, #0
-	bl	ftl_memset
-.L2375:
-	adds	r4, r4, #1
-	b	.L2374
-.L2373:
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r4, r0
-	cbnz	r0, .L2377
-	bl	ftl_read_ahead
-	b	.L2366
-.L2377:
-	ldr	r3, [sp, #52]
-	movs	r1, #1
-	ldr	r2, [r3]
-	ldr	r3, [r2, #40]
-	adds	r3, r3, #1
-	str	r3, [r2, #40]
-	ldr	r3, [sp, #60]
-	str	r3, [r0, #24]
-	str	r3, [r0, #28]
-	ldr	r3, [sp, #32]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r5
-	it	eq
-	streq	r7, [r0, #8]
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	adds	r2, r3, #1
-	str	r3, [sp, #20]
-	beq	.L2390
-	cmp	r3, #256
-	bne	.L2380
-	ldr	r3, .L2395+16
-	movs	r1, #1
-	ldr	r0, [sp, #60]
-	ldrh	r2, [r3]
-	rsb	r3, r2, #21
-	lsl	r3, r1, r3
-	lsrs	r0, r0, r2
-	ldr	r2, .L2395+20
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r2, [r4, #20]
-	str	r0, [sp, #48]
-	ldr	r3, [r4, #24]
-	ldrh	r1, [sp, #48]
-	ldr	r0, .L2395+24
-	bl	printf
-	movs	r2, #0
-	movs	r1, #1
-	ldrh	r0, [sp, #48]
-	bl	gc_add_sblk
-.L2380:
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3, #4]
-	cmp	r6, r2
-	beq	.L2381
-	ldr	r0, [r3, #12]
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	str	r0, [sp, #12]
-	ldr	r0, [r3, #8]
-	str	r2, [sp, #4]
+	bl	sblk_wait_write_queue_completed
+	str	r8, [sp, #24]
+	mov	r3, r7
 	mov	r2, r6
-	str	r0, [sp, #8]
-	ldr	r3, [r3]
-	ldr	r0, .L2395+28
-	str	r3, [sp]
-	ldr	r3, [sp, #60]
-	bl	printf
-	ldr	r3, .L2395+16
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #60]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2395+20
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2381:
-	ldr	r3, [r4, #12]
-	ldr	r3, [r3, #4]
-	cmp	r6, r3
-	bne	.L2382
-	ldr	r3, [sp, #20]
-	adds	r3, r3, #1
-	bne	.L2383
-.L2382:
-	movw	r2, #911
-	ldr	r1, .L2395+32
-	ldr	r0, .L2395+36
-	bl	printf
-.L2384:
-	b	.L2384
-.L2390:
-	ldr	r3, [sp, #20]
-	str	r3, [sp, #36]
-	b	.L2380
-.L2383:
-	ldr	r3, [r4, #8]
-	cbnz	r3, .L2385
-	ldr	r1, [r4, #4]
-	lsls	r2, r5, #9
-	mov	r0, r7
-	add	r1, r1, r8, lsl #9
-	bl	ftl_memcpy
-.L2385:
+	mov	r1, r5
 	mov	r0, r4
-	add	r7, r7, r5, lsl #9
-	bl	buf_free
-	b	.L2370
-.L2388:
-	mov	r0, #-1
-	b	.L2362
-.L2396:
-	.align	2
-.L2395:
-	.word	.LANCHOR52
-	.word	.LANCHOR46
-	.word	.LANCHOR45
-	.word	.LANCHOR36
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC114
-	.word	.LC101
-	.word	.LANCHOR157
-	.word	.LC0
-	.size	ftl_read, .-ftl_read
-	.section	.text.FtlRead,"ax",%progbits
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",%progbits
 	.align	1
-	.global	FtlRead
+	.global	ftl_read_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlRead, %function
-FtlRead:
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_read
-	.size	FtlRead, .-FtlRead
-	.section	.text.StorageSysDataLoad,"ax",%progbits
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	mov	r7, r3
+	bl	sblk_wait_write_queue_completed
+	str	r7, [sp]
+	mov	r3, r6
+	mov	r2, r5
+	mov	r1, r4
+	ubfx	r0, r4, #21, #3
+	bl	flash_read_page_en
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.sblk_read_page,"ax",%progbits
 	.align	1
-	.global	StorageSysDataLoad
+	.global	sblk_read_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	@ args = 0, pretend = 0, frame = 0
+	.type	sblk_read_page, %function
+sblk_read_page:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r1
-	mov	r5, r0
-	mov	r2, #512
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r7, .L2269
+	sub	sp, sp, #24
+	mov	r6, r1
+	mov	r4, r0
+	mov	r5, r1
+.L2245:
+	cbnz	r5, .L2255
+.L2268:
+	ldr	r4, .L2269
+.L2256:
+	cmp	r6, #0
+	bne	.L2258
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2255:
+	ldr	fp, [r4, #24]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+.L2246:
 	movs	r1, #0
+	mov	r0, fp
+	bl	queue_lun_state
+	cbnz	r0, .L2247
+	cmp	r5, #1
+	beq	.L2252
+	ldr	r3, .L2269+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2249
+.L2252:
 	mov	r0, r4
-	bl	ftl_memset
-	mov	r3, r4
-	mov	r1, r5
-	movs	r2, #1
-	movs	r0, #2
-	pop	{r4, r5, r6, lr}
-	b	ftl_read
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.vpn_check,"ax",%progbits
-	.align	1
-	.global	vpn_check
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	vpn_check, %function
-vpn_check:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
-	ldr	r5, .L2430
-	bl	dump_ftl_info
-	ldr	r1, [r5]
-	ldr	r0, .L2430+4
-	ldr	r4, .L2430+8
-	ldrh	r3, [r1, #80]
-	ldrh	r2, [r1, #48]
-	ldrh	r1, [r1, #16]
-	bl	printf
-	ldr	r3, [r5]
-	ldr	r6, .L2430+12
-	ldrh	r1, [r3, #16]
-	ldrh	r2, [r3, #22]
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r1, lsl #1]
-	subs	r0, r3, r2
-	str	r0, [sp]
-	ldr	r0, .L2430+16
-	bl	printf
-	ldr	r3, [r5]
-	movs	r5, #0
-	ldrh	r1, [r3, #48]
-	ldrh	r2, [r3, #54]
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r1, lsl #1]
-	subs	r0, r3, r2
-	str	r0, [sp]
-	ldr	r0, .L2430+20
-	bl	printf
-	mov	r2, #4352
-	movs	r1, #0
-	ldr	r0, .L2430+24
-	bl	ftl_memset
-.L2400:
-	ldr	r3, .L2430+28
-	ldr	r3, [r3]
-	cmp	r5, r3
-	bcc	.L2408
-	ldr	r6, .L2430+12
-	movs	r5, #0
-	mov	r7, r6
-.L2409:
-	ldrh	r2, [r6]
-	uxth	r3, r5
-	cmp	r2, r3
-	bhi	.L2411
-	ldr	r8, .L2430+24
-	movs	r6, #0
-.L2412:
-	ldrh	r2, [r7]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L2417
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2408:
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	adds	r2, r0, #1
-	str	r0, [sp, #12]
-	bne	.L2401
-	movs	r2, #0
-	add	r1, sp, #12
-	mov	r0, r5
-	bl	pm_log2phys
-.L2402:
-	ldr	r7, [sp, #12]
-	adds	r3, r7, #1
-	beq	.L2404
-	ldr	r3, .L2430+32
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L2430+36
-	lsr	r0, r7, r0
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldrh	r3, [r6]
-	uxth	r8, r0
-	cmp	r3, r8
-	mov	r3, r8
-	bls	.L2405
-	ldr	r1, .L2430+24
-	ldrh	r2, [r1, r8, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r1, r8, lsl #1]	@ movhi
-.L2406:
-	ldrh	r3, [r6]
-	cmp	r3, r8
-	bhi	.L2404
-	movw	r2, #1111
-	ldr	r1, .L2430+40
-	ldr	r0, .L2430+44
-	bl	printf
-.L2407:
-	b	.L2407
-.L2401:
-	ldr	r3, .L2430+32
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r1, r2, #21
-	lsls	r3, r3, r1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2430+36
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldrh	r3, [r6]
-	uxth	r0, r0
-	cmp	r3, r0
-	bhi	.L2402
-	movw	r2, #1101
-	ldr	r1, .L2430+40
-	ldr	r0, .L2430+44
-	bl	printf
-.L2403:
-	b	.L2403
-.L2405:
-	mov	r2, r7
-	mov	r1, r5
-	ldr	r0, .L2430+48
+	bl	queue_read_cmd
+	b	.L2250
+.L2247:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2246
+.L2249:
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	ubfx	r3, fp, #21, #3
+	cmp	r2, #255
+	bne	.L2251
+	movw	r2, #661
+	ldr	r1, .L2269+8
+	ldr	r0, .L2269+12
+	str	r3, [sp, #4]
 	bl	printf
-	ldr	r3, .L2430+52
-	movs	r2, #4
-	ldr	r1, .L2430+56
-	ldr	r0, .L2430+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	ldr	r1, [r1, #4]
-	lsls	r3, r3, #7
-	bl	rknand_print_hex
-	b	.L2406
-.L2404:
-	adds	r5, r5, #1
-	b	.L2400
-.L2411:
-	ldr	r3, [r4]
-	uxth	r1, r5
-	ldr	r2, .L2430+24
-	ldrh	r3, [r3, r1, lsl #1]
-	ldrh	r2, [r2, r1, lsl #1]
+	ldr	r3, [sp, #4]
+.L2251:
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	movs	r2, #48
+	ldr	r1, [sp, #12]
+	muls	r2, r1, r2
+	add	r10, r7, r2
+	str	r2, [sp, #4]
+	ldr	r1, [r10, #24]
+	ubfx	r2, r1, #21, #3
 	cmp	r3, r2
-	beq	.L2410
-	ldr	r0, .L2430+64
-	ldr	r0, [r0]
-	add	r0, r0, r1, lsl #2
-	ldrb	r0, [r0, #2]	@ zero_extendqisi2
-	lsrs	r0, r0, #5
-	str	r0, [sp]
-	ldr	r0, .L2430+68
-	bl	printf
-.L2410:
-	adds	r5, r5, #1
-	b	.L2409
-.L2417:
-	ldr	r3, .L2430+64
-	uxth	r5, r6
-	ldr	r3, [r3]
-	add	r3, r3, r5, lsl #2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	tst	r3, #224
-	bne	.L2413
-	ldrh	r3, [r8, r5, lsl #1]
-	cbnz	r3, .L2414
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2415
-	mov	r1, r5
-	ldr	r0, .L2430+72
-	bl	printf
-.L2415:
-	ldr	r3, [r4]
-	movs	r2, #0
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L2414:
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2413
-	ldrh	r3, [r8, r5, lsl #1]
-	cbz	r3, .L2413
-	movw	r2, #1143
-	ldr	r1, .L2430+40
-	ldr	r0, .L2430+44
-	bl	printf
-.L2416:
-	b	.L2416
-.L2413:
-	adds	r6, r6, #1
-	b	.L2412
-.L2431:
+	bne	.L2252
+	ldr	r3, .L2269+16
+	ldrh	r3, [r3]
+	add	fp, fp, r3
+	cmp	r1, fp
+	bne	.L2252
+	ldr	r3, [sp, #4]
+	mov	fp, #255
+	ldr	r0, [r4, #24]
+	subs	r5, r5, #1
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	bl	flash_start_plane_read
+	movs	r2, #2
+	movs	r3, #0
+	strb	r2, [r4, #42]
+	mov	r1, r4
+	strb	r3, [r4, #43]
+	ldr	r0, .L2269+20
+	strb	fp, [r4]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	buf_add_tail
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	ldr	r0, .L2269+20
+	strb	r3, [r10, #43]
+	ldr	r3, [sp, #4]
+	strb	r2, [r10, #42]
+	strb	fp, [r7, r3]
+	ldr	r3, [sp, #12]
+	add	r1, r3, r3, lsl #1
+	add	r1, r7, r1, lsl #4
+	bl	buf_add_tail
+.L2250:
+	subs	r5, r5, #1
+	beq	.L2268
+	ldr	r3, [sp, #8]
+	add	r4, r3, r3, lsl #1
+	add	r4, r7, r4, lsl #4
+	b	.L2245
+.L2258:
+	ldrb	r3, [r8, #42]	@ zero_extendqisi2
+	cmp	r3, #13
+	bne	.L2257
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	subs	r6, r6, #1
+	cmp	r3, #255
+	itt	ne
+	addne	r3, r3, r3, lsl #1
+	addne	r8, r4, r3, lsl #4
+.L2257:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2256
+.L2270:
 	.align	2
-.L2430:
-	.word	.LANCHOR60
-	.word	.LC115
-	.word	.LANCHOR56
-	.word	.LANCHOR54
-	.word	.LC116
-	.word	.LC117
-	.word	check_vpc_tbl
-	.word	.LANCHOR47
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR158
+.L2269:
+	.word	.LANCHOR50
+	.word	.LANCHOR168
+	.word	.LANCHOR169
 	.word	.LC0
-	.word	.LC118
-	.word	.LANCHOR45
-	.word	.LANCHOR93
-	.word	.LC119
-	.word	.LANCHOR57
-	.word	.LC120
-	.word	.LC121
-	.size	vpn_check, .-vpn_check
-	.section	.text.ftl_info_check,"ax",%progbits
+	.word	.LANCHOR103
+	.word	.LANCHOR54
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.flash_prog_page,"ax",%progbits
 	.align	1
-	.global	ftl_info_check
+	.global	flash_prog_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_info_check, %function
-ftl_info_check:
-	@ args = 0, pretend = 0, frame = 16
+	.type	flash_prog_page, %function
+flash_prog_page:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r5, #0
-	ldr	r3, .L2467
-	mov	r8, r5
-	mov	r10, r5
-	mov	r6, r5
-	ldr	fp, .L2467+44
-	mov	r7, r5
-	ldr	r2, [r3]
-	str	r5, [sp, #4]
-	str	r3, [sp, #8]
-	ldrh	r4, [r2, #134]
-.L2433:
-	ldr	r2, .L2467+4
-	ldrh	r2, [r2]
-	cmp	r2, r4
-	bhi	.L2448
-	ldr	r3, [sp, #4]
-	mov	r2, r6
-	mov	r1, r7
-	ldr	r0, .L2467+8
-	bl	printf
-	mov	r3, r5
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L2282
+	mov	r5, r0
+	mov	r6, r1
+	mov	r10, r2
+	ubfx	r7, r1, #0, #21
+	ubfx	r8, r1, #24, #2
+	ldr	r4, [r3]
+	add	r3, r0, #8
+	add	r3, r4, r3, lsl #8
+	str	r3, [sp, #4]
+	ldr	r3, .L2282+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L2272
+	ldr	r3, [sp, #40]
 	mov	r2, r8
-	mov	r1, r10
-	ldr	r0, .L2467+12
+	ldr	r0, .L2282+8
 	bl	printf
-	ldr	r3, [sp, #8]
-	ldr	r1, [sp, #4]
-	ldr	r3, [r3]
-	ldrh	r2, [r3, #114]
-	cmp	r2, r10
-	ldrh	r2, [r3, #118]
-	it	ne
-	strhne	r10, [r3, #114]	@ movhi
-	cmp	r2, r8
-	ldrh	r2, [r3, #116]
-	it	ne
-	strhne	r8, [r3, #118]	@ movhi
-	cmp	r2, r5
-	ldrh	r2, [r3, #122]
-	it	ne
-	strhne	r5, [r3, #116]	@ movhi
-	cmp	r2, r7
-	ldrh	r2, [r3, #120]
-	it	ne
-	strhne	r7, [r3, #122]	@ movhi
-	cmp	r2, r6
-	ldrh	r2, [r3, #124]
-	it	ne
-	strhne	r6, [r3, #120]	@ movhi
-	cmp	r2, r1
-	itt	ne
-	ldrhne	r2, [sp, #4]
-	strhne	r2, [r3, #124]	@ movhi
-	add	sp, sp, #16
+.L2272:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	hynix_reconfig_rr_para
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	cmp	r8, #0
+	bne	.L2273
+	bl	zftl_flash_enter_slc_mode
+.L2274:
+	add	r4, r4, r5, lsl #8
+	movs	r3, #128
+	mov	r0, r7
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r6
+	str	r3, [r4, #2052]
+	lsrs	r3, r7, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r7, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L2282+12
+	mov	r2, r10
+	mov	r3, fp
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	movs	r3, #16
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r0, [sp, #4]
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	ands	r4, r0, #4
+	beq	.L2271
+	mov	r2, r4
+	mov	r1, r6
+	ldr	r0, .L2282+16
+	bl	printf
+.L2271:
+	mov	r0, r4
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2448:
-	ldr	r2, .L2467+16
-	ldr	r3, [r2]
-	add	r3, r3, r4, lsl #2
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	and	r1, r2, #224
-	cmp	r1, #64
-	bne	.L2434
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L2466:
-	ldr	r2, [fp]
-	ldrh	r1, [r2, r4, lsl #1]
-	cmp	r1, #15
-	bls	.L2440
-	ldr	r2, .L2467+20
-.L2463:
-	ldrh	r0, [r2]
-	ldr	r2, .L2467+24
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	muls	r2, r0, r2
-	cmp	r1, r2
-	bne	.L2436
-.L2440:
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r4
-	bl	gc_add_sblk
-.L2436:
+.L2273:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2274
+.L2283:
+	.align	2
+.L2282:
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC128
+	.word	.LANCHOR31
+	.word	.LC129
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",%progbits
+	.align	1
+	.global	flash_test_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_test_blk, %function
+flash_test_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	movs	r2, #32
+	ldr	r7, .L2294
+	mov	r6, r0
+	mov	r4, r1
+	movs	r1, #165
+	ldr	r5, .L2294+4
+	ldr	r0, [r7]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	ldr	r3, .L2294+8
+	mov	r0, r6
+	ldrh	r3, [r3]
+	muls	r4, r3, r4
+	mov	r1, r4
+	bl	flash_erase_block
+	adds	r0, r0, #1
+	bne	.L2285
+.L2287:
+	mov	r5, #-1
+.L2286:
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_erase_block
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2285:
+	ldr	r8, .L2294+12
+	mov	r1, r4
+	mov	r0, r6
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r5]
+	bl	flash_prog_page
+	adds	r0, r0, #1
+	beq	.L2287
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	mov	r1, r4
+	mov	r0, r6
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r5]
+	bl	flash_read_page
+	adds	r0, r0, #1
+	beq	.L2287
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r3, #-1515870811
+	bne	.L2287
+	ldr	r3, [r5]
+	ldr	r5, [r3]
+	subs	r5, r5, #1515870810
+	it	ne
+	movne	r5, #-1
+	b	.L2286
+.L2295:
+	.align	2
+.L2294:
+	.word	.LANCHOR156
+	.word	.LANCHOR158
+	.word	.LANCHOR2
+	.word	.LANCHOR31
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.id_block_prog_msb_ff_data,"ax",%progbits
+	.align	1
+	.global	id_block_prog_msb_ff_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	id_block_prog_msb_ff_data, %function
+id_block_prog_msb_ff_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2303
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	mov	r7, r1
+	mov	r4, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2296
+	ldr	r5, .L2303+4
+	ldrb	r2, [r5, #19]	@ zero_extendqisi2
+	subs	r3, r2, #5
+	uxtb	r3, r3
+	cmp	r3, #30
+	bhi	.L2298
+	ldr	r2, .L2303+8
+	lsr	r3, r2, r3
+	lsls	r3, r3, #31
+	bmi	.L2300
+.L2296:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2301:
+	ldrh	r2, [r10, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2296
+	mov	r2, #16384
+	movs	r1, #255
+	ldr	r0, [r8]
+	bl	ftl_memset
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	adds	r1, r4, r7
 	adds	r4, r4, #1
+	mov	r0, r6
 	uxth	r4, r4
-	b	.L2433
-.L2434:
-	cmp	r1, #96
-	bne	.L2437
-	ldr	r2, [sp, #4]
-	adds	r2, r2, #1
-	uxth	r3, r2
-	str	r3, [sp, #4]
-	b	.L2466
-.L2437:
-	cmp	r1, #160
-	bne	.L2439
-	ldr	r2, [fp]
-	adds	r6, r6, #1
-	uxth	r6, r6
-	ldrh	r1, [r2, r4, lsl #1]
-	cmp	r1, #15
-	bls	.L2440
-	ldr	r2, .L2467+28
-	b	.L2463
-.L2439:
-	cmp	r1, #0
-	bne	.L2436
-	ands	r2, r2, #24
-	bne	.L2441
-	add	r10, r10, #1
-	uxth	r10, r10
-.L2442:
-	lsls	r2, r4, #1
-	str	r2, [sp, #12]
-	ldr	r2, [fp]
-	ldrh	r2, [r2, r4, lsl #1]
-	cbz	r2, .L2444
-	mov	r1, r4
-	ldr	r0, .L2467+32
-	str	r3, [sp, #12]
-	bl	printf
-	ldr	r3, [sp, #12]
-	mov	r0, r4
-	ldrb	r2, [r3, #2]	@ zero_extendqisi2
-	lsls	r1, r2, #27
-	ite	mi
-	movmi	r1, #5
-	movpl	r1, #2
-	bfi	r2, r1, #5, #3
-	movs	r1, #1
-	strb	r2, [r3, #2]
-	movs	r2, #0
-	bl	gc_add_sblk
-	bl	vpn_check
-.L2444:
-	ldr	r2, [fp]
-	lsls	r3, r4, #1
-	ldrh	r2, [r2, r3]
-	cmp	r2, #0
-	beq	.L2436
-	movw	r2, #1202
-	ldr	r1, .L2467+36
-	ldr	r0, .L2467+40
-	bl	printf
-.L2447:
-	b	.L2447
-.L2441:
-	cmp	r2, #16
-	itete	eq
-	addeq	r8, r8, #1
-	addne	r5, r5, #1
-	uxtheq	r8, r8
-	uxthne	r5, r5
-	b	.L2442
-.L2468:
+	str	r3, [sp]
+	ldr	r3, [r8]
+	mov	r2, r3
+	bl	flash_prog_page
+.L2302:
+	ldrh	r3, [r5, #10]
+	cmp	r3, r4
+	bhi	.L2301
+	b	.L2296
+.L2298:
+	cmp	r2, #68
+	bne	.L2296
+.L2300:
+	ldr	r10, .L2303+12
+	ldr	r8, .L2303+16
+	b	.L2302
+.L2304:
 	.align	2
-.L2467:
-	.word	.LANCHOR46
-	.word	.LANCHOR54
-	.word	.LC123
-	.word	.LC124
-	.word	.LANCHOR57
-	.word	.LANCHOR79
-	.word	.LANCHOR69
-	.word	.LANCHOR68
-	.word	.LC122
-	.word	.LANCHOR159
-	.word	.LC0
-	.word	.LANCHOR56
-	.size	ftl_info_check, .-ftl_info_check
-	.section	.text.gc_scan_src_blk,"ax",%progbits
+.L2303:
+	.word	.LANCHOR19
+	.word	.LANCHOR31
+	.word	1073758215
+	.word	.LANCHOR138
+	.word	.LANCHOR156
+	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.flash_dual_page_prog,"ax",%progbits
 	.align	1
-	.global	gc_scan_src_blk
+	.global	flash_dual_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_scan_src_blk, %function
-gc_scan_src_blk:
-	@ args = 0, pretend = 0, frame = 16
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	@ args = 12, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movw	r3, #65535
-	ldr	r4, .L2511
-	ldrh	r1, [r4]
-	cmp	r1, r3
-	bne	.L2470
-	mov	r2, #880
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
+	mov	fp, r3
+	ldr	r3, .L2319
+	mov	r4, r0
+	mov	r6, r1
+	ubfx	r5, r1, #0, #21
+	str	r2, [sp, #8]
+	ubfx	r8, r1, #24, #2
+	ldr	r7, [r3]
+	add	r3, r0, #8
+	add	r3, r7, r3, lsl #8
+	str	r3, [sp, #4]
+	ldr	r3, .L2319+4
+	ldr	r2, [r3]
+	str	r3, [sp, #12]
+	tst	r2, #16
+	beq	.L2306
+	ldr	r3, [sp, #56]
+	mov	r2, r8
+	ldr	r0, .L2319+8
 	bl	printf
-.L2471:
-	b	.L2471
-.L2470:
-	ldr	r3, .L2511+12
-	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L2472
-	ldr	r3, .L2511+16
-	ldr	r0, .L2511+20
+.L2306:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	r8, #0
+	bne	.L2307
+	bl	zftl_flash_enter_slc_mode
+.L2308:
+	add	r4, r7, r4, lsl #8
+	uxtb	r3, r6
+	ldr	r8, .L2319+16
+	movs	r7, #0
+	mov	r10, #128
+	str	r10, [r4, #2056]
+	mov	r0, r5
+	str	r7, [r4, #2052]
+	str	r7, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	mov	r3, fp
+	ldr	r2, [sp, #8]
+	ldrb	r1, [r8, #9]	@ zero_extendqisi2
+	movs	r0, #1
+	mov	fp, #16
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	fp, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	adds	r0, r5, #1
+	str	r10, [r4, #2056]
+	uxtb	r3, r0
+	str	r7, [r4, #2052]
+	str	r7, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsrs	r3, r0, #8
+	str	r3, [r4, #2052]
+	lsr	r3, r0, fp
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r3, [sp, #52]
+	movs	r0, #1
+	ldr	r2, [sp, #48]
+	ldrb	r1, [r8, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	fp, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r0, [sp, #4]
+	bl	flash_read_status
+	bl	nandc_de_cs.constprop.29
+	ands	r4, r0, #4
+	beq	.L2305
+	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
-	ldrh	r2, [r3, r1, lsl #1]
+	lsls	r3, r3, #19
+	bpl	.L2305
+	mov	r2, r4
+	mov	r1, r6
+	ldr	r0, .L2319+12
 	bl	printf
-.L2472:
-	ldr	r1, .L2511+24
-	ldrh	r0, [r4]
-	bl	ftl_get_blk_list_in_sblk
-	uxtb	r0, r0
-	strb	r0, [r4, #5]
-	cbnz	r0, .L2473
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-.L2469:
+.L2305:
+	mov	r0, r4
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2473:
-	ldr	r2, .L2511+28
-	ldrh	r3, [r4]
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	and	r2, r2, #224
-	cmp	r2, #32
-	beq	.L2475
-	cmp	r2, #224
-	beq	.L2475
-	cbz	r2, .L2476
-	ldr	r1, .L2511+32
-	ldr	r1, [r1]
-	ldrh	r5, [r1, #16]
-	cmp	r5, r3
-	beq	.L2475
-	ldrh	r5, [r1, #48]
-	cmp	r5, r3
-	beq	.L2475
-	ldrh	r1, [r1, #80]
-	cmp	r1, r3
-	bne	.L2510
-.L2475:
-	movw	r3, #65535
-	movs	r0, #0
-	strh	r3, [r4]	@ movhi
-	strh	r0, [r4, #20]	@ movhi
-	b	.L2469
-.L2476:
-	ldr	r2, .L2511+16
-	ldr	r2, [r2]
-	ldrh	r3, [r2, r3, lsl #1]
-	cmp	r3, #0
-	beq	.L2475
-	mov	r2, #900
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
-	bl	printf
-.L2478:
-	b	.L2478
-.L2510:
-	add	r0, r4, r0, lsl #1
-	movw	r3, #65535
-	ldrh	r7, [r0, #34]
-	cmp	r7, r3
-	bne	.L2479
-	mov	r2, #908
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
-	bl	printf
-.L2480:
-	b	.L2480
-.L2479:
-	ldr	r1, .L2511+36
-	cmp	r2, #160
-	ldr	r0, .L2511+40
-	ldr	r8, .L2511+64
-	ldrh	r3, [r1]
-	mov	r10, r1
-	ldrh	r0, [r0]
-	add	r3, r3, #-1
-	uxth	r3, r3
-	mul	r7, r7, r0
-	bne	.L2494
-	ldr	r2, .L2511+44
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #2
-	uxth	fp, r2
-	orr	r7, r7, r2, lsl #24
-	bne	.L2481
-	ldrh	r3, [r8]
-	mov	fp, #2
-	subs	r3, r3, #1
-	uxth	r3, r3
-.L2481:
-	orrs	r7, r7, r3
-	strb	fp, [r4, #6]
-	movs	r5, #0
-	movs	r0, #1
-	strh	r5, [r4, #2]	@ movhi
-	strb	r5, [r4, #4]
-	strh	r5, [r4, #22]	@ movhi
-	bl	buf_alloc
-	str	r7, [r0, #24]
-	movs	r1, #1
-	ldr	r7, .L2511+48
-	mov	r6, r0
-	bl	sblk_read_page
-	ldrh	r3, [r8]
+.L2307:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2308
+.L2320:
+	.align	2
+.L2319:
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LC128
+	.word	.LC129
+	.word	.LANCHOR31
+	.size	flash_dual_page_prog, .-flash_dual_page_prog
+	.section	.text.fw_flash_page_prog.constprop.26,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	fw_flash_page_prog.constprop.26, %function
+fw_flash_page_prog.constprop.26:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	mov	r5, r1
+	ldr	r7, .L2325
+	mov	r6, r2
+	ldrb	r1, [r7, #9]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L2325+4
+	mov	r4, r0
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2325+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	nandc_bch_sel
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L2322
+	ldr	r7, .L2325+12
+	mov	r2, #16384
 	movs	r1, #255
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r8, .L2511+68
-	muls	r2, r3, r2
-	ldr	r0, [r8]
-	lsls	r2, r2, #2
+	ldr	r0, [r7]
 	bl	ftl_memset
-	ldr	r3, [r6, #36]
-	strh	r5, [r4, #20]	@ movhi
-	adds	r2, r3, #1
-	bne	.L2482
-.L2483:
-	mov	r0, #-1
-	b	.L2469
-.L2494:
-	mov	fp, #1
-	b	.L2481
-.L2482:
-	cmp	r3, #512
-	beq	.L2483
-	ldr	r2, [r6, #12]
-	ldr	r3, .L2511+52
-	ldr	r2, [r2]
+	ldr	r3, [r7]
+	movs	r2, #4
+	str	r2, [sp, #8]
+	mov	r1, r4
+	mov	r2, r5
+	movs	r0, #0
 	str	r3, [sp, #4]
-	cmp	r2, r3
-	beq	.L2484
-	mov	r1, r5
-	ldrh	r0, [r4]
-	bl	ftl_sblk_dump
-	ldr	r2, [r6, #12]
-	ldr	r3, [sp, #4]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	beq	.L2483
-	movw	r2, #937
-	ldr	r1, .L2511+4
-	ldr	r0, .L2511+8
-	bl	printf
-.L2485:
-	b	.L2485
-.L2484:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	ldrh	r2, [r10]
-	ldr	r7, [r6, #4]
-	ldr	r10, .L2511+72
-	smulbb	r3, r3, r2
-	subs	r7, r7, #4
-	smulbb	fp, r3, fp
-	uxth	fp, fp
-.L2486:
-	cmp	r5, fp
-	blt	.L2491
-	ldr	r5, .L2511+16
-	mov	r0, r6
-	bl	buf_free
-	ldrh	r1, [r4]
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r1, lsl #1]
-	ldrh	r3, [r4, #20]
-	cmp	r2, r3
-	beq	.L2492
-	ldr	r0, .L2511+56
-	bl	printf
-.L2492:
-	ldr	r3, [r5]
-	ldrh	r2, [r4]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldrh	r3, [r4, #20]
-	cmp	r2, r3
-	bcs	.L2493
-	bl	vpn_check
-.L2493:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #20]
-	ldrh	r2, [r4]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #24]	@ movhi
-	ldrh	r0, [r4, #20]
-	b	.L2469
-.L2491:
-	ldr	r0, [r7, #4]!
-	adds	r3, r0, #1
-	beq	.L2488
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #12]
-	adds	r0, r0, #1
-	bne	.L2489
-	movs	r2, #0
-	add	r1, sp, #12
-	ldr	r0, [r7]
-	bl	pm_log2phys
-.L2489:
-	ldr	r2, [sp, #12]
-	movs	r3, #1
-	ldrh	r0, [r10]
-	str	r2, [sp, #4]
-	rsb	r1, r0, #21
-	lsls	r3, r3, r1
-	lsr	r0, r2, r0
-	ldr	r2, .L2511+60
-	subs	r3, r3, #1
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldrh	r3, [r4]
-	ldr	r2, [sp, #4]
-	cmp	r0, r3
-	bne	.L2488
-	ldrh	r3, [r4, #20]
-	ldr	r1, [r8]
-	str	r2, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #20]	@ movhi
-.L2488:
-	adds	r5, r5, #1
-	b	.L2486
-.L2512:
+	str	r3, [sp]
+	mov	r3, r6
+	bl	flash_dual_page_prog
+.L2324:
+	mov	r4, r0
+	mov	r0, r8
+	bl	nandc_bch_sel
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2322:
+	movs	r3, #4
+	mov	r2, r5
+	str	r3, [sp]
+	mov	r1, r4
+	mov	r3, r6
+	movs	r0, #0
+	bl	flash_prog_page
+	b	.L2324
+.L2326:
 	.align	2
-.L2511:
-	.word	.LANCHOR59
-	.word	.LANCHOR160
-	.word	.LC0
-	.word	.LANCHOR22
-	.word	.LANCHOR56
-	.word	.LC125
-	.word	.LANCHOR59+36
-	.word	.LANCHOR57
-	.word	.LANCHOR60
-	.word	.LANCHOR79
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR69
-	.word	-178307901
-	.word	.LC126
-	.word	.LANCHOR70
-	.word	.LANCHOR68
-	.word	.LANCHOR61
-	.word	.LANCHOR71
-	.size	gc_scan_src_blk, .-gc_scan_src_blk
-	.section	.text.ftl_scan_all_data,"ax",%progbits
+.L2325:
+	.word	.LANCHOR31
+	.word	.LANCHOR44
+	.word	.LANCHOR17
+	.word	.LANCHOR156
+	.size	fw_flash_page_prog.constprop.26, .-fw_flash_page_prog.constprop.26
+	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
-	.global	ftl_scan_all_data
+	.global	idb_write_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	@ args = 0, pretend = 0, frame = 16
+	.type	idb_write_data, %function
+idb_write_data:
+	@ args = 0, pretend = 0, frame = 136
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r0, #0
-	ldr	r8, .L2542+20
-	sub	sp, sp, #40
-	movs	r5, #0
-	bl	buf_alloc
-	movs	r1, #0
-	mov	r4, r0
-	ldr	r0, .L2542
-	bl	printf
-.L2514:
-	ldr	r3, [r8]
-	cmp	r5, r3
-	bcc	.L2527
-	mov	r0, r4
-	bl	buf_free
-	add	sp, sp, #40
+	mov	r8, r3
+	ldr	r5, .L2444
+	adds	r3, r1, r3
+	cmp	r3, #63
+	sub	sp, sp, #144
+	mov	r4, r1
+	mov	r7, r2
+	ldr	r6, [r5]
+	bls	.L2328
+	cmp	r1, #576
+	bcs	.L2329
+	cbnz	r6, .L2330
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r5]
+	cbnz	r0, .L2331
+.L2336:
+	mov	r0, #-1
+.L2327:
+	add	sp, sp, #144
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2527:
-	mov	r3, #-1
-	str	r3, [r4, #20]
-	ubfx	r3, r5, #0, #12
-	cbnz	r3, .L2515
-	ldr	r2, [sp, #36]
-	mov	r1, r5
-	ldr	r0, .L2542+4
-	bl	printf
-.L2515:
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #36]
-	adds	r0, r0, #1
-	bne	.L2516
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r5
-	bl	pm_log2phys
-.L2516:
-	ldr	r3, [sp, #36]
-	str	r3, [r4, #24]
-	str	r3, [r4, #28]
+.L2331:
+	mov	r2, #262144
+	mov	r1, r6
+	bl	ftl_memset
+.L2330:
+	ldr	r6, .L2444+4
+	ldr	r3, [r6]
+	cbz	r3, .L2333
+.L2337:
+	ldr	r3, .L2444+8
+	cmp	r4, #64
+	mov	r2, #1
+	ldr	r0, [r5]
+	str	r2, [r3]
+	bhi	.L2438
+	rsb	r1, r4, #64
+	sub	r2, r8, r1
+	add	r1, r7, r1, lsl #9
+	lsls	r2, r2, #9
+.L2443:
+	bl	ftl_memcpy
+.L2338:
+	movs	r0, #0
+	b	.L2327
+.L2333:
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r6]
+	cmp	r0, #0
+	bne	.L2337
+	b	.L2336
+.L2438:
+	rsb	r2, r4, #576
+	subs	r4, r4, #64
+	cmp	r2, r8
+	mov	r1, r7
+	it	cs
+	movcs	r2, r8
+	add	r0, r0, r4, lsl #9
+	lsls	r2, r2, #9
+	b	.L2443
+.L2328:
+	cmp	r1, #576
+	bcc	.L2338
+.L2329:
+	ldr	r3, .L2444+8
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2338
+	ldr	r7, .L2444+12
+	ldr	r2, .L2444+16
+	ldr	r10, .L2444+32
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	ldrb	r4, [r2, #9]	@ zero_extendqisi2
+	mov	r8, r2
+	ldrh	r5, [r2, #26]
+	str	r3, [sp, #20]
+	cmp	r3, #0
+	beq	.L2390
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	clz	r3, r3
+	lsrs	r3, r3, #5
+.L2440:
+	movs	r0, #0
+	str	r3, [sp, #28]
+	bl	zftl_flash_exit_slc_mode
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	strb	r3, [r7]
+	ldr	r3, .L2444+20
+	ldr	r2, [r6]
+	cmp	r2, r3
+	bne	.L2341
+	ldrh	r0, [r8, #10]
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	lsls	r0, r0, #2
+	bl	__aeabi_idiv
+	cmp	r0, #512
+	mov	r3, r0
+	it	ge
+	movge	r3, #512
+	add	r1, r6, #260096
+	str	r3, [sp, #32]
+	movw	r2, #65023
+	movs	r3, #0
+.L2345:
+	ldr	r0, [r1, #-4]!
+	cbnz	r0, .L2343
+	ldr	r0, [r6, r3, lsl #2]
 	adds	r3, r3, #1
-	bne	.L2517
-.L2519:
-	adds	r5, r5, #1
-	b	.L2514
-.L2517:
-	movs	r1, #1
-	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	ldr	r2, [r4, #12]
-	cmp	r3, #256
-	beq	.L2518
-	adds	r0, r3, #1
-	beq	.L2518
-	ldr	r1, [r2, #4]
-	cmp	r5, r1
-	beq	.L2519
-.L2518:
-	ldr	r1, [r4, #4]
-	ldr	r10, .L2542+24
-	ldr	r7, .L2542+8
-	ldr	r0, [r1, #4]
-	str	r0, [sp, #20]
-	ldr	r1, [r1]
-	ldr	r0, .L2542+12
-	str	r1, [sp, #16]
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #12]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #8]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #4]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp]
-	ldr	r2, [r4, #24]
+	cmp	r3, #4096
+	add	r2, r2, #-1
+	it	hi
+	movhi	r3, #0
+	cmp	r2, #4096
+	str	r0, [r1, #2048]
+	bne	.L2345
+.L2343:
+	smulbb	r4, r4, r5
+	ldr	r3, [sp, #32]
+	ldr	r1, [r6, r2, lsl #2]
+	ldr	r0, .L2444+24
 	bl	printf
-	ldr	r2, [r4, #12]
-	ldr	r3, [r2, #8]
-	adds	r1, r3, #1
-	bne	.L2520
-.L2522:
-	ldrb	r6, [r10]	@ zero_extendqisi2
+	uxth	r3, r4
+	str	r3, [sp, #68]
+	movs	r3, #0
+	str	r3, [sp, #12]
+	str	r3, [sp, #24]
+.L2386:
+	ldr	r3, .L2444+4
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2444+28
+	ldr	r2, [sp, #24]
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r3, [r3, #32]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2346
+	ldr	r2, [sp, #68]
+	mul	r10, r2, r3
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2347
+	ldr	r3, [sp, #24]
+	ldr	r5, .L2444+12
+	ldr	r4, .L2444+32
+	cmp	r3, #1
+	bne	.L2348
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+.L2441:
+	strb	r3, [r5]
+	strb	r3, [r4]
+.L2347:
+	ldr	r8, .L2444+16
+	movs	r5, #0
+	ldr	r3, .L2444+36
+	mov	r0, r10
+	ldrb	r7, [r8, #9]	@ zero_extendqisi2
+	ldrh	r4, [r8, #26]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r1, r7
+	str	r3, [sp, #72]
+	smulbb	r4, r4, r7
+	ldr	r3, .L2444+36
+	uxth	r4, r4
+	strb	r5, [r3]
+	bl	__aeabi_uidiv
+	mov	r1, r0
 	mov	r0, r5
-	ldr	fp, .L2542+28
-	lsls	r1, r6, #7
+	bl	flash_erase_block
+	mov	r1, r4
+	mov	r0, r10
+	bl	__aeabi_uidivmod
+	ldrh	r0, [r8, #10]
+	sub	r3, r10, r1
+	str	r1, [sp, #40]
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	str	r3, [sp, #36]
+	lsls	r0, r0, #2
 	bl	__aeabi_idiv
-	uxth	r10, r0
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	lsls	r3, r6, #7
-	str	r0, [sp]
-	mov	r2, r10
-	ldr	r0, .L2542+16
-	subs	r3, r3, #1
+	ldr	r3, [sp, #36]
+	str	r0, [sp, #44]
+	cmp	r10, r3
+	bne	.L2393
+	ldr	r3, .L2444+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L2393
+	ldr	r3, .L2444+4
+	mov	r2, #1024
 	mov	r1, r5
-	ands	r3, r3, r5
-	movs	r6, #0
-	uxth	r3, r3
-	bl	printf
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r5
-	bl	pm_log2phys
-.L2521:
-	adds	r3, r7, r6
-	ldr	r1, [r3, #4]
-	cbz	r1, .L2526
-	ldrh	r3, [r7, r6]
-	cmp	r3, r10
-	bne	.L2526
-	mov	r3, #4096
-	movs	r2, #4
-	mov	r0, fp
-	bl	rknand_print_hex
-.L2526:
-	adds	r6, r6, #8
-	cmp	r6, #256
-	bne	.L2521
-	b	.L2519
-.L2520:
-	ldr	r6, [r2, #4]
-	ldr	r2, .L2542+20
-	ldr	r2, [r2]
-	cmp	r6, r2
-	bcs	.L2522
-	str	r3, [r4, #24]
-	movs	r1, #1
+	ldr	r4, [r3]
 	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r2, [r4, #4]
-	ldr	r3, [r4, #12]
-	ldr	r0, .L2542+12
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #20]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [sp]
-	ldr	r3, [r4, #36]
-	ldr	r2, [r4, #24]
-	bl	printf
-	mov	r0, r6
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #36]
-	adds	r0, r0, #1
-	bne	.L2523
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r6
-	bl	pm_log2phys
-.L2523:
+	bl	ftl_memset
+	ldr	r2, .L2444+44
+	movs	r3, #12
+	str	r5, [r4, #12]
+	strb	r5, [r4, #16]
+	stm	r4, {r2, r3}
+	ldr	r3, .L2444+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2350
+	ldrb	r3, [r8, #29]	@ zero_extendqisi2
+	strb	r3, [r4, #16]
+.L2350:
+	movs	r3, #4
+	strb	r3, [r4, #17]
+	ldr	r3, .L2444+16
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	ldrh	r0, [r3, #10]
+	bl	__aeabi_idiv
+	cmp	r7, #8
+	mov	r3, #0
+	ite	hi
+	movhi	r2, #70
+	movls	r2, #16
+	movs	r1, #12
+	strh	r0, [r4, #18]	@ movhi
+	strb	r3, [r4, #20]
+	adds	r0, r4, r1
+	strh	r3, [r4, #22]	@ movhi
+	strb	r2, [r4, #21]
+	bl	js_hash
+	ldr	r3, [sp, #32]
+	str	r0, [r4, #8]
+	subs	r3, r3, #4
+	str	r3, [sp, #16]
+.L2349:
+	mov	r8, r6
+	mov	fp, #0
+.L2352:
+	ldr	r3, [sp, #44]
+	cmp	r3, fp
+	bhi	.L2363
+	ldr	r3, .L2444+4
+	movs	r4, #0
+	mov	r0, r10
+	movs	r7, #4
+	ldr	r5, [r3]
+	ldr	r3, .L2444+16
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	ldrh	r1, [r3, #26]
+	str	r2, [sp, #60]
+	ldrh	r3, [sp, #60]
+	smulbb	r1, r1, r3
+	ldr	r3, .L2444+36
+	uxth	r1, r1
+	strb	r4, [r3]
+	bl	__aeabi_uidivmod
+	sub	r3, r10, r1
+	str	r1, [sp, #36]
+	str	r3, [sp, #64]
+	and	r3, r1, #3
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #16]
+	str	r4, [sp, #48]
+	str	r3, [sp, #52]
+.L2364:
+	ldr	r3, [sp, #52]
+	cmp	r4, r3
+	bcc	.L2380
+	ldr	r3, .L2444+36
+	ldrb	r2, [sp, #72]	@ zero_extendqisi2
+	strb	r2, [r3]
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2381
+	movs	r0, #0
+	bl	zftl_flash_exit_slc_mode
+	ldr	r2, .L2444+12
+	movs	r3, #0
+	strb	r3, [r2]
+	ldr	r2, .L2444+32
+	strb	r3, [r2]
+.L2381:
+	ldr	r3, [sp, #16]
+	movs	r4, #0
+	lsls	r1, r3, #7
+	ldr	r3, .L2444+4
+	ldr	r0, [r3]
+.L2382:
+	cmp	r4, r1
+	bne	.L2384
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #12]
+	bls	.L2346
+	b	.L2389
+.L2390:
+	ldr	r3, [sp, #20]
+	b	.L2440
+.L2348:
+	movs	r0, #0
+	bl	zftl_flash_exit_slc_mode
+	movs	r3, #0
+	b	.L2441
+.L2393:
+	ldr	r3, [sp, #32]
+	mov	r4, r5
+	str	r3, [sp, #16]
+	b	.L2349
+.L2445:
+	.align	2
+.L2444:
+	.word	.LANCHOR135
+	.word	.LANCHOR137
+	.word	.LANCHOR136
+	.word	.LANCHOR0
+	.word	.LANCHOR31
+	.word	-52655045
+	.word	.LC130
+	.word	.LANCHOR27
+	.word	.LANCHOR19
+	.word	.LANCHOR46
+	.word	.LANCHOR28
+	.word	1179535694
+.L2363:
+	ldr	r3, [sp, #40]
+	add	r5, r3, fp
+	ldr	r3, .L2446
+	lsrs	r5, r5, #2
+	adds	r2, r5, #1
+	ldrh	r0, [r3, r2, lsl #1]
+	ldr	r3, .L2446+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L2353
+	mov	r2, r0
+.L2354:
+	ldr	r0, .L2446+8
+	ldr	r3, .L2446
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r0, #9
+	itt	ne
+	addne	r2, r2, #-1
+	lslne	r2, r2, #2
+	str	r2, [sp, #80]
+	movw	r2, #61424
+	str	r2, [sp, #84]
+	ldrh	r2, [r3, r5, lsl #1]
+	cbnz	r1, .L2358
+	mov	r5, r2
+.L2359:
+	mul	r0, r5, r7
+	add	r2, sp, #80
+	cbnz	r4, .L2360
 	ldr	r3, [sp, #36]
-	movs	r1, #1
-	mov	r0, r4
-	str	r3, [r4, #24]
-	bl	sblk_read_page
-	ldr	r2, [r4, #4]
-	ldr	r3, [r4, #12]
-	ldr	r0, .L2542+12
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #20]
-	mov	r1, r6
-	ldr	r2, [r2]
-	str	r2, [sp, #16]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [sp]
-	ldr	r2, [r4, #24]
-	ldr	r3, [r4, #36]
-	bl	printf
-	ldrb	fp, [r10]	@ zero_extendqisi2
-	mov	r0, r6
-	lsl	r1, fp, #7
+	mov	r1, r8
+	add	r0, r0, r3
+	bl	fw_flash_page_prog.constprop.26
+	ldr	r3, .L2446+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbnz	r2, .L2361
+	adds	r5, r5, #1
+	mov	r1, r7
+	uxth	r5, r5
+	ldr	r0, [sp, #36]
 	bl	__aeabi_uidiv
-	uxth	r3, r0
-	str	r0, [sp, #28]
-	mov	r0, r6
-	str	r3, [sp, #24]
-	bl	lpa_hash_get_ppa
-	lsl	r3, fp, #7
-	ldr	r2, [sp, #28]
-	ldr	fp, .L2542+32
-	mov	r1, r6
-	subs	r3, r3, #1
-	str	r0, [sp]
-	ands	r3, r3, r6
-	ldr	r0, .L2542+16
+	mov	r2, r5
+	mov	r1, r0
+	mov	r0, r4
+	bl	id_block_prog_msb_ff_data
+.L2361:
+	ldr	r3, [sp, #16]
+	add	r8, r8, #2048
+	add	r2, r3, #16
+	cmp	fp, r2
+	bcc	.L2362
+	add	r2, r3, #20
+	cmp	fp, r2
+	bcs	.L2362
+	add	r8, r6, #2048
+.L2362:
+	add	r3, fp, #4
+	movs	r4, #0
+	uxth	fp, r3
+	b	.L2352
+.L2353:
+	ldr	r0, .L2446+12
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L2354
+	lsls	r2, r2, #1
+	b	.L2354
+.L2358:
+	ldr	r2, .L2446+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L2359
+	lsls	r5, r5, #1
+	b	.L2359
+.L2360:
+	ldr	r3, [sp, #36]
+	mov	r1, r4
+	add	r0, r0, r3
+	bl	fw_flash_page_prog.constprop.26
+	b	.L2362
+.L2380:
+	ldr	r3, [sp, #40]
+	mov	r1, r7
+	subs	r3, r7, r3
 	uxth	r3, r3
-	uxth	r2, r2
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #36]
+	adds	r0, r3, r4
+	bl	__aeabi_uidiv
+	ldr	r2, .L2446+4
+	uxth	r0, r0
+	ldr	r3, .L2446
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r2, #0
+	bne	.L2365
+	mov	r0, r3
+.L2366:
+	ldr	r3, .L2446+16
+	ldr	r2, [sp, #64]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #56]
+	ldr	r3, [sp, #40]
+	add	r3, r3, r2
+	ldr	r2, .L2446+20
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
+	ldr	r2, [sp, #60]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2446+24
+	mov	r8, r0
+	ldr	r0, [sp, #56]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #76]
+	bl	nandc_bch_sel
+.L2367:
+	str	r7, [sp]
+	add	r3, sp, #80
+	mov	r2, r5
+	mov	r1, r8
+	movs	r0, #0
+	bl	flash_read_page
+	adds	r0, r0, #1
+	bne	.L2368
+	ldr	r3, .L2446+28
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L2369
+.L2372:
+	ldr	r3, .L2446+32
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L2370
+.L2371:
+	ldr	r3, .L2446+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2374
+	str	r7, [sp]
+	add	r3, sp, #80
+	mov	r2, r5
+	mov	r1, r8
+	movs	r0, #0
+	bl	flash_ddr_tuning_read
+	adds	r0, r0, #1
+	bne	.L2368
+.L2374:
+	ldr	r3, [sp, #56]
+	cmp	r3, #16
+	bne	.L2375
+	mov	r8, #-1
+.L2376:
+	ldr	r0, [sp, #76]
+	bl	nandc_bch_sel
+	ldr	r3, [sp, #48]
+	cmp	r8, #0
+	it	ne
+	movne	r3, #-1
+	str	r3, [sp, #48]
+	ldr	r3, [sp, #64]
+	cmp	r10, r3
+	bne	.L2378
+	cmp	r4, #0
+	bne	.L2378
+	ldr	r3, [sp, #48]
+	cmp	r3, #0
+	bne	.L2378
+	ldr	r2, [r5]
+	ldr	r3, .L2446+40
+	cmp	r2, r3
+	bne	.L2378
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #44]
+	ldrb	r7, [r5, #17]	@ zero_extendqisi2
+	add	r3, r3, r2
+	str	r3, [sp, #52]
+.L2379:
+	ldr	r3, [sp, #44]
+	add	r3, r3, r4
+	uxth	r4, r3
+	b	.L2364
+.L2365:
+	ldr	r3, .L2446+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2366
+	lsls	r0, r0, #1
+	b	.L2366
+.L2369:
+	ldr	r3, .L2446+28
+	movs	r0, #0
+	mov	r2, r5
+	mov	r1, r8
+	strb	r0, [r3]
+	add	r3, sp, #80
+	str	r7, [sp]
+	bl	flash_read_page
+	ldr	r3, .L2446+28
+	adds	r0, r0, #1
+	strb	fp, [r3]
+	beq	.L2372
+.L2368:
+	mov	r8, #0
+	b	.L2376
+.L2370:
+	str	r7, [sp]
+	add	r3, sp, #80
+	mov	r2, r5
+	mov	r1, r8
+	movs	r0, #0
+	blx	fp
+	adds	r0, r0, #1
+	beq	.L2371
+	b	.L2368
+.L2375:
+	movs	r0, #16
+	bl	nandc_bch_sel
+	movs	r3, #16
+	str	r3, [sp, #56]
+	b	.L2367
+.L2378:
+	ldr	r3, [sp, #44]
+	add	r5, r5, r3, lsl #9
+	movs	r3, #0
+	str	r3, [sp, #40]
+	b	.L2379
+.L2384:
+	ldr	r2, [r0, r4, lsl #2]
+	ldr	r3, [r6, r4, lsl #2]
+	cmp	r2, r3
+	beq	.L2383
+	mov	r2, #512
+	movs	r1, #0
+	bl	ftl_memset
+	mov	r1, r4
+	ldr	r0, .L2446+44
 	bl	printf
-	mov	r0, r6
-	movs	r6, #0
-	movs	r2, #0
-	add	r1, sp, #36
-	bl	pm_log2phys
-.L2525:
-	adds	r3, r7, r6
-	ldr	r1, [r3, #4]
-	cbz	r1, .L2524
-	ldrh	r3, [r7, r6]
-	ldr	r2, [sp, #24]
-	cmp	r3, r2
-	bne	.L2524
-	mov	r3, #4096
-	movs	r2, #4
-	mov	r0, fp
-	bl	rknand_print_hex
-.L2524:
-	adds	r6, r6, #8
-	cmp	r6, #256
-	bne	.L2525
-	b	.L2522
-.L2543:
+	mov	r1, r10
+	movs	r0, #0
+	bl	flash_erase_block
+.L2346:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	cmp	r3, #4
+	str	r3, [sp, #24]
+	bne	.L2386
+.L2389:
+	ldrb	r2, [sp, #20]	@ zero_extendqisi2
+	movs	r0, #0
+	ldr	r3, .L2446+48
+	strb	r2, [r3]
+	movs	r2, #2
+	ldr	r3, .L2446+52
+	strb	r2, [r3]
+	bl	zftl_flash_enter_slc_mode
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L2341
+	mov	r1, r3
+	ldr	r0, .L2446+56
+	bl	printf
+.L2341:
+	ldr	r4, .L2446+60
+	movs	r5, #0
+	ldr	r3, .L2446+64
+	ldr	r0, [r4]
+	str	r5, [r3]
+	cbz	r0, .L2388
+	bl	free
+	str	r5, [r4]
+.L2388:
+	ldr	r4, .L2446+68
+	ldr	r0, [r4]
+	cmp	r0, #0
+	beq	.L2338
+	bl	free
+	movs	r0, #0
+	str	r0, [r4]
+	b	.L2327
+.L2383:
+	adds	r4, r4, #1
+	b	.L2382
+.L2447:
 	.align	2
-.L2542:
-	.word	.LC127
-	.word	.LC128
-	.word	.LANCHOR93
-	.word	.LC129
-	.word	.LC130
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LC132
+.L2446:
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR28
+	.word	.LANCHOR1
+	.word	.LANCHOR17
+	.word	.LANCHOR31
+	.word	.LANCHOR44
+	.word	.LANCHOR46
+	.word	.LANCHOR162
+	.word	.LANCHOR21
+	.word	1179535694
 	.word	.LC131
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.gc_recovery,"ax",%progbits
+	.word	.LANCHOR0
+	.word	.LANCHOR32
+	.word	.LC132
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
 	.align	1
-	.global	gc_recovery
+	.global	flash_start_tlc_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_recovery, %function
-gc_recovery:
-	@ args = 0, pretend = 0, frame = 32
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	@ args = 12, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r3, .L2603
-	sub	sp, sp, #64
-	ldr	r7, .L2603+4
-	strb	r4, [r3]
-	ldr	r3, .L2603+8
-	ldr	r5, [r7]
-	strb	r4, [r3]
-	bl	gc_init
-	ldrh	r6, [r5, #80]
-	movw	r3, #65535
-	cmp	r6, r3
-	beq	.L2545
-	ldr	r2, [r7]
-	movs	r0, #1
-	ldr	r6, .L2603+12
-	strh	r3, [r2, #130]	@ movhi
-	bl	buf_alloc
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L2454
+	add	r5, sp, #40
 	mov	r4, r0
-	add	r3, r5, r3, lsl #1
-	ldrh	r2, [r3, #94]
-	ldr	r3, .L2603+16
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	cmp	r2, #3
-	str	r3, [sp, #56]
-	bne	.L2546
-	ldr	r2, .L2603+20
-	ldrh	r2, [r2]
-	subs	r2, r2, #1
-	add	r3, r3, r2
-	orr	r3, r3, #50331648
-.L2598:
-	str	r3, [r4, #24]
-.L2547:
-	movs	r1, #1
-	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	adds	r2, r3, #1
-	beq	.L2548
-	cmp	r3, #512
-	beq	.L2548
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3]
-	ldr	r3, .L2603+24
-	cmp	r2, r3
-	beq	.L2549
-.L2548:
-	mov	r0, r4
-	bl	buf_free
-	ldr	r2, [r4, #12]
-	ldr	r3, [r4, #4]
-	ldr	r0, .L2603+28
-	ldr	r1, [r2, #12]
-	str	r1, [sp, #24]
-	ldr	r1, [r2, #8]
-	str	r1, [sp, #20]
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	ldr	r2, [r4, #36]
-	ldr	r3, [r3]
-	ldr	r1, [r4, #24]
-	movs	r4, #0
+	mov	r6, r1
+	mov	r7, r2
+	ldm	r5, {r5, r8, r10}
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, fp
+	bhi	.L2449
+	movw	r2, #726
+	ldr	r1, .L2454+4
+	ldr	r0, .L2454+8
 	bl	printf
-	ldr	r3, .L2603+32
-	ldrh	r2, [r5, #80]
+.L2449:
+	ldr	r3, .L2454+12
+	ldrb	fp, [r3, fp]	@ zero_extendqisi2
+	ldr	r3, .L2454+16
+	mov	r0, fp
 	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, [r7]
-.L2602:
-	ldrh	r2, [r5, #80]
-	strh	r2, [r3, #130]	@ movhi
-.L2550:
-	mov	r2, r4
-	ldrh	r1, [r5, #80]
-	movw	r4, #65535
-	ldr	r0, .L2603+36
-	bl	printf
-	strh	r4, [r5, #80]	@ movhi
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	ldr	r3, .L2603+4
-	ldr	r2, [r3]
-	ldrh	r0, [r2, #130]
-	cmp	r0, r4
-	mov	r4, r3
-	beq	.L2579
-	bl	ftl_free_sblk
-.L2579:
-	ldr	r3, .L2603+40
-	movs	r0, #0
-	ldr	r2, [r3]
-	movw	r3, #65535
-	strh	r3, [r2, #126]	@ movhi
+	lsl	fp, fp, #8
+	str	r3, [sp, #4]
+	bl	nandc_cs
+	ldr	r3, [sp, #4]
+	cbz	r4, .L2450
+	add	r2, r3, fp
+	str	r4, [r2, #2056]
+.L2450:
+	add	fp, fp, r3
+	movs	r3, #128
+	str	r6, [fp, #2056]
+	str	r3, [fp, #2056]
+	movs	r3, #0
+	str	r3, [fp, #2052]
+	str	r3, [fp, #2052]
+	uxtb	r3, r5
+	str	r3, [fp, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [fp, #2052]
+	lsrs	r3, r5, #16
+	add	r5, r5, r5, lsl #1
+	str	r3, [fp, #2052]
+	subs	r0, r5, #1
+	add	r0, r0, r6
+	bl	nandc_set_seed
+	ldr	r1, .L2454+20
+	mov	r3, r10
+	mov	r2, r8
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r7, [fp, #2056]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L2455:
+	.align	2
+.L2454:
+	.word	.LANCHOR18
+	.word	.LANCHOR170
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r3, [r0]
+	movs	r1, #1
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	ubfx	r6, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	movs	r1, #2
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
 	ldr	r2, [r4]
-	strh	r3, [r2, #130]	@ movhi
-	bl	ftl_info_flush
-.L2544:
-	add	sp, sp, #64
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #4
+	ldr	r0, .L2457
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	add	sp, sp, #16
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2546:
-	cmp	r2, #2
-	bne	.L2547
-	ldr	r2, .L2603+20
-	ldrh	r2, [r2]
-	add	r3, r3, r2, lsl #1
-	subs	r3, r3, #1
-	orr	r3, r3, #33554432
-	b	.L2598
-.L2549:
-	ldr	r8, .L2603+68
-	ldr	r7, .L2603+44
-	ldr	fp, .L2603+56
-	ldrh	r3, [r8]
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r1, [r4, #4]
-	ldr	r0, [fp]
-	ldr	r10, .L2603+60
-	muls	r2, r3, r2
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	ldrh	r3, [r8]
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r1, [r4, #4]
-	ldr	r0, [r10]
-	muls	r2, r3, r2
-	lsls	r2, r2, #2
-	add	r1, r1, r2
-	bl	ftl_memcpy
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldrh	r3, [r8]
-	ldr	r1, [fp]
-	ldr	r0, .L2603+48
-	muls	r3, r2, r3
-	movs	r2, #4
-	bl	rknand_print_hex
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldrh	r3, [r8]
-	ldr	r1, [r10]
-	ldr	r0, .L2603+52
-	muls	r3, r2, r3
-	movs	r2, #4
-	bl	rknand_print_hex
-	ldr	r3, .L2603+20
-	ldrh	fp, [r3]
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #2
-	itt	eq
-	moveq	r3, #1
-	lsleq	fp, fp, #1
-	str	r3, [sp, #44]
-	movs	r3, #0
-	mov	r10, r3
-	str	r3, [sp, #36]
-.L2553:
-	ldr	r3, [sp, #36]
-	cmp	r3, fp
-	beq	.L2562
-	mov	r8, #0
-	b	.L2563
-.L2559:
-	ldr	r3, [sp, #40]
-	ldrh	r2, [r3, #96]
-	ldr	r3, .L2603+16
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldr	r2, .L2603+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r3, [sp, #56]
-	cmp	r2, #3
-	bne	.L2554
-	ldr	r2, [sp, #36]
-	add	r3, r3, r2
-	orr	r3, r3, r7, lsl #24
-.L2600:
-	str	r3, [r4, #24]
+	pop	{r4, r5, r6, lr}
+	b	buf_add_tail
+.L2458:
+	.align	2
+.L2457:
+	.word	.LANCHOR54
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
+	.align	1
+	.global	sblk_tlc_prog_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0]
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r6, [r3, #24]
+.L2460:
 	movs	r1, #1
+	mov	r0, r6
+	bl	queue_lun_state
+	mov	r4, r0
+	cbnz	r0, .L2461
+	mov	r0, r5
+	bl	queue_tlc_prog_cmd
 	mov	r0, r4
-	bl	sblk_read_page
-	ldr	r3, .L2603+56
-	ldr	r2, [r4, #12]
-	ldr	r3, [r3]
-	ldr	r1, [r2, #4]
-	ldr	r3, [r3, r6]
-	cmp	r3, r1
-	bne	.L2557
-	ldr	r0, .L2603+60
-	ldr	r0, [r0]
-	ldr	ip, [r0, r6]
-	ldr	r0, [r2, #8]
-	cmp	ip, r0
-	beq	.L2558
-.L2557:
-	ldr	r0, [r2, #12]
-	str	r0, [sp, #16]
-	ldr	r0, [r2, #8]
-	str	r1, [sp, #8]
-	str	r0, [sp, #12]
-	ldr	r2, [r2]
-	ldr	r0, .L2603+64
-	str	r2, [sp, #4]
-	ldr	r2, .L2603+60
-	ldr	r2, [r2]
-	ldr	r2, [r2, r6]
-	str	r2, [sp]
-	ldr	r2, [r4, #36]
-	ldr	r1, [r4, #24]
-	bl	printf
-	ldr	r3, .L2603+56
-	ldr	r3, [r3]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	beq	.L2558
-	mov	r0, r4
-	movs	r4, #0
-	bl	buf_free
-	ldr	r3, .L2603+32
-	ldrh	r2, [r5, #80]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2603+4
-	ldr	r3, [r3]
-	b	.L2602
-.L2554:
-	cmp	r2, #2
-	ldr	r2, [sp, #36]
-	itett	eq
-	addeq	r2, r2, #-1
-	addne	r3, r3, r2
-	addeq	r3, r3, r2
-	addeq	r3, r3, r7
-	it	eq
-	orreq	r3, r3, #33554432
-	b	.L2600
-.L2558:
-	add	r10, r10, #1
-	adds	r7, r7, #1
-	adds	r6, r6, #4
-.L2561:
-	ldr	r3, [sp, #44]
-	cmp	r3, r7
-	bcs	.L2559
-	add	r8, r8, #1
-.L2563:
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	cmp	r8, r3
-	bge	.L2560
-	add	r3, r5, r8, lsl #1
-	lsl	r6, r10, #2
-	str	r3, [sp, #40]
-	movs	r7, #1
-	b	.L2561
-.L2560:
-	ldr	r3, [sp, #36]
-	adds	r3, r3, #1
-	str	r3, [sp, #36]
-	b	.L2553
-.L2562:
-	mov	r0, r4
-	movs	r4, #0
-	bl	buf_free
-	ldr	r3, .L2603+32
-	mov	r6, r4
-	ldr	r0, .L2603+68
-	ldrh	r1, [r5, #80]
-	ldr	r2, [r3]
-	ldrh	r0, [r0]
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	str	r4, [sp, #40]
-	smulbb	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-.L2564:
-	ldr	r3, [sp, #36]
-	cmp	r3, r6
-	beq	.L2577
-	mov	fp, #0
-	b	.L2578
-.L2604:
-	.align	2
-.L2603:
-	.word	.LANCHOR67
-	.word	.LANCHOR60
-	.word	.LANCHOR104
-	.word	.LANCHOR64
-	.word	.LANCHOR75
-	.word	.LANCHOR79
-	.word	-178307901
-	.word	.LC133
-	.word	.LANCHOR56
-	.word	.LC138
-	.word	.LANCHOR46
-	.word	.LANCHOR69
-	.word	.LC134
-	.word	.LC135
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LC136
-	.word	.LANCHOR68
-.L2574:
-	ldr	r3, .L2605
-	ldr	r2, [sp, #40]
-	ldr	r3, [r3]
-	ldr	r10, [r3, r2, lsl #2]
-	cmp	r10, #-1
-	beq	.L2565
-	ldr	r3, .L2605+4
-	mov	r0, r10
-	ldr	r3, [r3]
-	ldr	r3, [r3, r2, lsl #2]
-	str	r3, [sp, #48]
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #60]
-	adds	r0, r0, #1
-	bne	.L2566
-	movs	r2, #0
-	add	r1, sp, #60
-	mov	r0, r10
-	bl	pm_log2phys
-.L2566:
-	ldr	r3, [sp, #52]
-	ldrh	r2, [r3, #96]
-	ldr	r3, .L2605+8
-	ldrh	r3, [r3]
-	muls	r3, r2, r3
-	ldr	r2, .L2605+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, #3
-	bne	.L2567
-	add	r3, r3, r6
-	orr	r3, r3, r8, lsl #24
-.L2601:
-	str	r3, [sp, #56]
-	movs	r2, #1
-	ldr	r3, .L2605+16
-	ldrh	r0, [r3]
-	rsb	r3, r0, #21
-	lsl	r3, r2, r3
-	ldr	r2, [sp, #48]
-	subs	r3, r3, #1
-	lsr	r0, r2, r0
-	ldr	r2, .L2605+20
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	ldr	r2, [sp, #48]
-	mov	r7, r0
-	ldr	r3, [sp, #60]
-	cmp	r2, r3
-	ldr	r2, [sp, #56]
-	bne	.L2570
-	mov	r1, r10
-	ldr	r0, .L2605+24
-	bl	pm_ppa_update_check
-	cbz	r0, .L2571
-.L2597:
-	b	.L2597
-.L2567:
-	cmp	r2, #2
-	itett	eq
-	addeq	r2, r6, #-1
-	addne	r3, r3, r6
-	addeq	r3, r3, r2
-	addeq	r3, r3, r8
-	it	eq
-	orreq	r3, r3, #33554432
-	b	.L2601
-.L2571:
-	movs	r2, #1
-	add	r1, sp, #56
-	mov	r0, r10
-	adds	r4, r4, #1
-	bl	pm_log2phys
-	uxth	r0, r7
-	bl	ftl_vpn_decrement
-.L2573:
-	ldr	r3, [sp, #40]
-	uxth	r7, r7
-	adds	r3, r3, #1
-	str	r3, [sp, #40]
-	ldr	r3, .L2605+28
-	ldr	r3, [r3]
-	add	r3, r3, r7, lsl #2
-	ldrb	r3, [r3, #2]	@ zero_extendqisi2
-	ands	r3, r3, #224
-	bne	.L2565
-	ldr	r2, .L2605+32
-	ldr	r2, [r2]
-	ldrh	r1, [r2, r7, lsl #1]
-	cbz	r1, .L2565
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-.L2565:
-	add	r8, r8, #1
-.L2576:
-	ldr	r3, [sp, #44]
-	cmp	r3, r8
-	bcs	.L2574
-	add	fp, fp, #1
-.L2578:
-	ldrb	r3, [r5, #89]	@ zero_extendqisi2
-	cmp	fp, r3
-	bge	.L2575
-	add	r3, r5, fp, lsl #1
-	mov	r8, #1
-	str	r3, [sp, #52]
-	b	.L2576
-.L2570:
-	cmp	r3, r2
-	it	eq
-	addeq	r4, r4, #1
-	b	.L2573
-.L2575:
-	adds	r6, r6, #1
-	b	.L2564
-.L2577:
-	ldr	r3, .L2605+32
-	ldrh	r2, [r5, #80]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	b	.L2550
-.L2545:
-	ldr	r3, [r7]
-	ldrh	r3, [r3, #130]
-	cmp	r3, r6
-	beq	.L2544
-	ldr	r5, .L2605+36
-	ldr	r2, [r5]
-	ldrh	r2, [r2, #126]
-	cmp	r2, r3
-	bne	.L2581
-	bl	pm_flush
-	ldr	r3, [r7]
-	ldrh	r0, [r3, #130]
-	bl	ftl_free_sblk
-	ldr	r3, [r5]
-	mov	r0, r4
-	strh	r6, [r3, #126]	@ movhi
-	bl	ftl_info_flush
-.L2581:
-	ldr	r3, [r7]
-	movw	r2, #65535
-	strh	r2, [r3, #130]	@ movhi
-	b	.L2544
-.L2606:
-	.align	2
-.L2605:
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR75
-	.word	.LANCHOR64
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LC137
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LANCHOR46
-	.size	gc_recovery, .-gc_recovery
-	.section	.text.ftl_init,"ax",%progbits
+	pop	{r4, r5, r6, pc}
+.L2461:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2460
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
 	.align	1
-	.global	ftl_init
+	.global	sblk_xlc_prog_pages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_init, %function
-ftl_init:
-	@ args = 0, pretend = 0, frame = 16
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #255
-	ldr	r2, .L2619
-	movs	r5, #0
-	ldr	r6, .L2619+4
-	strb	r3, [r2]
-	ldr	r2, .L2619+8
-	ldr	r1, .L2619+12
-	ldr	r0, .L2619+16
-	strb	r5, [r2]
-	ldr	r2, .L2619+20
-	ldr	r8, .L2619+144
-	ldr	r7, .L2619+24
-	strb	r3, [r2]
-	mov	r2, #-1
-	ldr	r3, .L2619+28
-	strb	r5, [r3]
-	ldr	r3, .L2619+32
-	str	r2, [r3]
-	bl	printf
-	ldrb	r1, [r6, #12]	@ zero_extendqisi2
-	ldr	r3, .L2619+36
-	ldrb	r2, [r6, #9]	@ zero_extendqisi2
-	ldrh	r10, [r6, #10]
-	strb	r1, [r3]
-	ldr	r3, .L2619+40
-	mov	r0, r10
-	str	r2, [sp, #4]
-	strb	r2, [r3]
-	ldr	r3, .L2619+44
-	strh	r10, [r3]	@ movhi
-	bl	__aeabi_idiv
-	ldr	r1, .L2619+48
-	mov	r3, r0
-	strh	r0, [r8]	@ movhi
-	ldr	r0, .L2619+52
-	ldrb	r4, [r1]	@ zero_extendqisi2
-	ldr	r1, .L2619+56
-	ldr	r2, [sp, #4]
-	ldr	ip, .L2619+148
-	strb	r4, [r1]
-	ldrb	r1, [r6, #13]	@ zero_extendqisi2
-	lsl	fp, r2, #9
-	ldrh	r6, [r6, #14]
-	str	ip, [sp, #4]
-	strb	r1, [r0]
-	uxth	fp, fp
-	smulbb	r4, r4, r1
-	ldr	r1, .L2619+60
-	ldr	r0, .L2619+64
-	strh	r6, [ip]	@ movhi
-	ldrh	lr, [r1]
-	uxtb	r4, r4
-	ldr	r1, .L2619+68
-	strb	r4, [r7]
-	strh	fp, [r0]	@ movhi
-	strh	lr, [r1]	@ movhi
+	ldr	r3, [r0]
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	sub	sp, sp, #20
+	mov	r7, r1
+	mov	r10, r2
+	ldr	r5, [r3, #24]
+.L2463:
 	movs	r1, #1
-	str	r0, [sp, #8]
-.L2608:
-	cmp	lr, r1
-	uxth	r0, r5
-	add	r5, r5, #1
-	bcs	.L2609
-	mul	r10, r10, r2
-	subs	r1, r0, #1
-	ldr	r0, .L2619+72
-	mov	r5, #1892352
-	muls	r5, r4, r5
-	str	r3, [sp, #12]
-	strh	r1, [r0]	@ movhi
-	mul	r1, r6, r10
-	lsrs	r0, r1, #21
-	muls	r1, r4, r1
-	muls	r5, r0, r5
-	ldr	r0, .L2619+76
-	str	r5, [r0]
-	add	r5, r5, #24576
-	ldr	r0, .L2619+80
-	str	r1, [r0]
-	mov	r0, r5
-	ldr	r1, .L2619+84
-	str	r5, [r1]
-	mov	r1, r2
-	bl	__aeabi_uidiv
-	ldr	r2, .L2619+88
-	mov	r1, fp
-	str	r0, [r2]
-	add	r2, fp, #-1
-	add	r0, r2, r0, lsl #2
-	ldr	fp, .L2619+152
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #12]
-	strh	r0, [fp]	@ movhi
-	uxth	r0, r0
-	lsls	r0, r0, #4
-	mul	r1, r4, r3
-	bl	__aeabi_idiv
-	ldr	r3, .L2619+92
-	mul	r1, r4, r10
-	strh	r0, [r3]	@ movhi
 	mov	r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L2619+96
-	adds	r0, r0, #2
-	ldr	r2, .L2619+100
-	ldr	r5, .L2619+104
-	strh	r0, [r3]	@ movhi
-	add	r3, r6, r6, lsl #1
-	lsrs	r6, r6, #4
-	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2619+108
-	strh	r6, [r3]	@ movhi
-	bl	buf_init
-	ldrh	r3, [r8]
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L2619+112
-	ldrb	r1, [r7]	@ zero_extendqisi2
-	ldr	r2, .L2619+116
-	str	r0, [r3]
-	ldrh	r0, [r8]
-	ldr	r3, .L2619+120
-	muls	r0, r1, r0
-	ldr	r1, .L2619+124
-	str	r2, [r3]
-	add	r3, r2, r0, lsl #3
-	str	r3, [r1]
-	ldr	r1, [sp, #4]
-	ldrh	r1, [r1]
-	lsrs	r1, r1, #1
-	add	r1, r1, r0, lsl #1
-	ldr	r0, .L2619+128
-	add	r1, r2, r1, lsl #2
-	str	r1, [r5]
-	bl	printf
-	ldrh	r2, [r8]
-	ldrb	r4, [r7]	@ zero_extendqisi2
-	ldr	r3, [sp, #4]
-	ldr	r0, .L2619+132
-	ldrh	r3, [r3]
-	muls	r4, r2, r4
-	ldrh	r2, [fp]
-	add	r4, r3, r4, lsl #2
-	lsls	r6, r3, #2
-	ldr	r3, [sp, #8]
-	add	r6, r6, r2, lsl #2
-	lsls	r4, r4, #1
-	add	r6, r6, #704
-	add	r4, r4, #600
-	ldrh	r3, [r3]
-	mov	r2, r6
-	mov	r1, r4
-	bl	printf
-	ldr	r3, [sp, #8]
-	ldrh	r3, [r3]
-	cmp	r4, r3
-	bhi	.L2610
-	cmp	r6, r3
-	bls	.L2611
-.L2610:
-.L2618:
-	b	.L2618
-.L2609:
-	lsls	r1, r1, #1
-	b	.L2608
-.L2611:
-	bl	sblk_init
-	bl	ftl_info_blk_init
-	adds	r3, r0, #1
-	beq	.L2607
-	bl	ftl_ext_info_init
-	movs	r0, #1
-	ldr	r4, .L2619+136
-	bl	pm_init
-	bl	lpa_rebuild_hash
-	ldr	r0, [r5]
-	movs	r1, #0
-	adds	r0, r0, #16
-	bl	ftl_open_sblk_recovery
-	ldr	r0, [r5]
-	add	r1, r0, #16
-	adds	r0, r0, #48
-	bl	ftl_open_sblk_recovery
+	bl	queue_lun_state
+	cmp	r0, #0
+	bne	.L2464
+	cmp	r10, #2
+	bne	.L2465
+	ldr	r2, [r7]
+	movs	r1, #1
+	ldr	r3, [r4]
+	ldr	r6, [r2, #24]
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	ubfx	r6, r6, #0, #21
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	ubfx	r8, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7]
+	movs	r1, #1
 	ldr	r2, [r4]
-	ldr	r0, [r5]
-	ldr	r3, [r2, #8]
-	adds	r0, r0, #16
-	adds	r3, r3, #16
-	str	r3, [r2, #8]
-	bl	ftl_info_data_recovery
-	ldr	r0, [r5]
-	adds	r0, r0, #48
-	bl	ftl_info_data_recovery
-	ldr	r0, [r5]
-	adds	r0, r0, #80
-	bl	ftl_info_data_recovery
-	bl	gc_recovery
-	bl	ftl_info_check
-	bl	pm_flush
-	movs	r0, #1
-	bl	ftl_total_vpn_update
-	ldr	r3, .L2619+140
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2613
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	mov	r1, r10
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #4]
+	mov	r1, r10
 	ldr	r2, [r4]
-	ldr	r3, [r2, #68]
-	adds	r3, r3, #1
-	str	r3, [r2, #68]
-.L2613:
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	bl	print_ftl_debug_info
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #5
+	ldr	r0, .L2467
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	bl	buf_add_tail
+.L2466:
 	movs	r0, #0
-.L2607:
-	add	sp, sp, #16
+	add	sp, sp, #20
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2620:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2464:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2463
+.L2465:
+	mov	r0, r4
+	bl	queue_tlc_prog_cmd
+	b	.L2466
+.L2468:
 	.align	2
-.L2619:
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR43
-	.word	.LC139
-	.word	.LC32
-	.word	.LANCHOR127
-	.word	.LANCHOR69
-	.word	.LANCHOR89
-	.word	.LANCHOR49
-	.word	.LANCHOR64
-	.word	.LANCHOR45
-	.word	.LANCHOR68
-	.word	.LANCHOR8
-	.word	.LANCHOR70
-	.word	.LANCHOR76
-	.word	.LANCHOR13
-	.word	.LANCHOR149
-	.word	.LANCHOR75
-	.word	.LANCHOR71
-	.word	.LANCHOR52
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR47
-	.word	.LANCHOR101
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR60
-	.word	.LANCHOR165
-	.word	.LANCHOR83
-	.word	ftl_ext_info_data_buffer
-	.word	.LANCHOR82
-	.word	.LANCHOR56
-	.word	.LC140
-	.word	.LC141
-	.word	.LANCHOR46
-	.word	.LANCHOR133
-	.word	.LANCHOR79
+.L2467:
 	.word	.LANCHOR54
-	.word	.LANCHOR137
-	.size	ftl_init, .-ftl_init
-	.section	.text.rk_ftl_init,"ax",%progbits
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.sblk_3d_tlc_dump_prog,"ax",%progbits
 	.align	1
-	.global	rk_ftl_init
+	.global	sblk_3d_tlc_dump_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_init, %function
-rk_ftl_init:
+	.type	sblk_3d_tlc_dump_prog, %function
+sblk_3d_tlc_dump_prog:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	bl	nand_flash_init
-	mov	r4, r0
-	cbnz	r0, .L2622
-	bl	ftl_init
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
 	mov	r4, r0
-.L2622:
-	mov	r1, r4
-	ldr	r0, .L2623
+	ldr	r3, [r0, #24]
+	ldr	r0, .L2470
+	ubfx	r5, r3, #0, #21
+	mov	r2, r3
+	mov	r1, r5
+	ubfx	r6, r3, #21, #3
 	bl	printf
-	mov	r0, r4
-	pop	{r4, pc}
-.L2624:
+	ldr	r3, [r4, #12]
+	movs	r2, #26
+	movs	r1, #1
+	str	r5, [sp]
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r4, #4]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #12]
+	movs	r2, #26
+	movs	r1, #2
+	str	r5, [sp]
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r4, #4]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #12]
+	movs	r2, #16
+	movs	r1, #3
+	str	r5, [sp]
+	movs	r0, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r4, #4]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	movs	r1, #64
+	ldr	r0, [r4, #24]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, lr}
+	b	flash_wait_device_ready
+.L2471:
 	.align	2
-.L2623:
-	.word	.LC142
-	.size	rk_ftl_init, .-rk_ftl_init
-	.global	__aeabi_idivmod
-	.section	.text.ftl_update_l2p_map,"ax",%progbits
+.L2470:
+	.word	.LC133
+	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
+	.section	.text.flash_start_3d_mlc_page_prog,"ax",%progbits
 	.align	1
-	.global	ftl_update_l2p_map
+	.global	flash_start_3d_mlc_page_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	@ args = 0, pretend = 0, frame = 24
+	.type	flash_start_3d_mlc_page_prog, %function
+flash_start_3d_mlc_page_prog:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2650
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrb	r7, [r0, #9]	@ zero_extendqisi2
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r3
+	ldr	r3, .L2474
 	mov	r6, r0
-	ldrh	r3, [r3]
-	ldr	r2, .L2650+4
-	muls	r7, r3, r7
-	ldr	r4, [r2]
-	ldrh	r3, [r0, #12]
-	str	r2, [sp, #4]
-	add	r4, r4, r3, lsl #2
-	add	r3, r7, #1073741824
-	subs	r3, r3, #1
-	ldr	r3, [r4, r3, lsl #2]
-	adds	r3, r3, #1
-	bne	.L2626
-	movs	r5, #0
-	subs	r4, r4, #4
-	mov	r10, r5
-.L2627:
-	cmp	r10, r7
-	bne	.L2635
-	ldr	r3, .L2650+8
-	ldr	r4, .L2650+12
-	ldr	r3, [r3]
-	tst	r3, #4096
-	beq	.L2636
-	ldrh	r1, [r6]
-	mov	r2, r5
-	ldr	r3, [r4]
-	ldr	r0, .L2650+16
-	ldrh	r3, [r3, r1, lsl #1]
-	bl	printf
-.L2636:
-	ldrh	r2, [r6]
-	ldr	r3, [r4]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2626:
-	movw	r2, #882
-	ldr	r1, .L2650+20
-	ldr	r0, .L2650+24
-	bl	printf
-.L2628:
-	b	.L2628
-.L2635:
-	ldr	r8, [r4, #4]!
-	cmp	r8, #-1
-	beq	.L2629
-	ldr	r3, .L2650+28
-	mov	r0, r8
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	str	r3, [sp]
-	ldr	r3, .L2650+8
-	ldr	r3, [r3]
-	lsls	r2, r3, #19
-	bpl	.L2630
-	mov	r3, r10
-	mov	r2, r8
-	ldr	r1, [sp]
-	ldr	r0, .L2650+32
+	mov	r4, r1
+	mov	r5, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r1
+	bhi	.L2473
+	mov	r2, #756
+	ldr	r1, .L2474+4
+	ldr	r0, .L2474+8
 	bl	printf
-.L2630:
-	mov	r8, r4
-	mov	fp, r10
-.L2634:
-	ldr	r0, [r8]
-	adds	r3, r0, #1
-	beq	.L2631
-	ldr	r3, .L2650+28
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	lsls	r1, r1, #7
-	bl	__aeabi_uidiv
-	ldr	r3, [sp]
-	uxth	r0, r0
-	cmp	r3, r0
-	bne	.L2631
-	ldrb	r3, [r6, #9]	@ zero_extendqisi2
-	mov	r0, fp
-	mov	r1, r3
-	str	r3, [sp, #12]
-	bl	__aeabi_idivmod
-	ldr	r3, .L2650+36
-	adds	r1, r1, #8
-	ldrh	r0, [r6, r1, lsl #1]
-	ldrh	r2, [r3]
-	ldr	r3, [sp, #12]
-	muls	r2, r0, r2
-	mov	r1, r3
-	mov	r0, fp
-	str	r2, [sp, #8]
-	bl	__aeabi_idiv
-	ldr	r2, [sp, #8]
-	add	r2, r2, r0
-	ldr	r0, .L2650+40
-	str	r2, [sp, #20]
-	ldr	r1, [r8]
-	bl	pm_ppa_update_check
-	cbz	r0, .L2632
-	ldr	r1, [sp, #4]
-	mov	r3, r7
-	movs	r2, #4
-	ldr	r0, .L2650+44
-	ldr	r1, [r1]
-	bl	rknand_print_hex
-.L2633:
-	b	.L2633
-.L2632:
-	adds	r5, r5, #1
-	movs	r2, #1
-	uxth	r5, r5
-	add	r1, sp, #20
-	ldr	r0, [r8]
-	bl	pm_log2phys
-	mov	r3, #-1
-	str	r3, [r8]
-.L2631:
-	add	fp, fp, #1
-	add	r8, r8, #4
-	cmp	r7, fp
-	bne	.L2634
-.L2629:
-	add	r10, r10, #1
-	b	.L2627
-.L2651:
+.L2473:
+	ldr	r3, .L2474+12
+	ldrb	r4, [r3, r4]	@ zero_extendqisi2
+	ldr	r3, .L2474+16
+	mov	r0, r4
+	ldr	r8, [r3]
+	bl	nandc_cs
+	movs	r3, #128
+	mov	r0, r5
+	add	r4, r8, r4, lsl #8
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L2474+20
+	mov	r2, r7
+	ldr	r3, [sp, #24]
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r6, [r4, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2475:
 	.align	2
-.L2650:
-	.word	.LANCHOR79
-	.word	.LANCHOR82
-	.word	.LANCHOR22
-	.word	.LANCHOR56
-	.word	.LC146
-	.word	.LANCHOR166
+.L2474:
+	.word	.LANCHOR18
+	.word	.LANCHOR171
 	.word	.LC0
-	.word	.LANCHOR45
-	.word	.LC143
-	.word	.LANCHOR75
-	.word	.LC144
-	.word	.LC145
-	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
-	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR31
+	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",%progbits
 	.align	1
-	.global	ftl_alloc_new_data_sblk
+	.global	sblk_3d_mlc_prog_pages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_alloc_new_data_sblk, %function
-ftl_alloc_new_data_sblk:
+	.type	sblk_3d_mlc_prog_pages, %function
+sblk_3d_mlc_prog_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r4, r0
-	bl	ftl_update_l2p_map
-	bl	pm_flush
-	ldr	r3, .L2655
+	ldr	r3, [r0]
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r4, [r3, #24]
+.L2477:
+	movs	r1, #1
 	mov	r0, r4
-	ldr	r1, [r3]
-	adds	r1, r1, #16
-	cmp	r4, r1
-	ite	eq
-	moveq	r1, #2
-	movne	r1, #3
-	bl	ftl_open_sblk_init
-	bl	ftl_ext_info_flush
-	movs	r0, #0
-	bl	ftl_info_flush
-	bl	lpa_rebuild_hash
-	movs	r0, #0
-	pop	{r4, pc}
-.L2656:
+	bl	queue_lun_state
+	mov	r6, r0
+	cbnz	r0, .L2478
+	ldr	r3, [r5]
+	ldr	r4, [r3, #24]
+	ubfx	r7, r4, #0, #21
+	ubfx	r4, r4, #21, #3
+	mov	r0, r4
+	bl	zftl_flash_exit_slc_mode
+	ldr	r3, [r5]
+	mov	r1, r4
+	movs	r0, #16
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	mov	r2, r7
+	ldr	r3, [r3, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r5, #4]
+	mov	r1, r4
+	movs	r0, #16
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	adds	r2, r7, #1
+	ldr	r3, [r3, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_de_cs.constprop.29
+	ldr	r1, [r5]
+	movs	r3, #4
+	ldr	r0, .L2479
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	bl	buf_add_tail
+	mov	r0, r6
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L2478:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2477
+.L2480:
 	.align	2
-.L2655:
-	.word	.LANCHOR60
-	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
-	.section	.text.ftl_write_commit,"ax",%progbits
+.L2479:
+	.word	.LANCHOR54
+	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
+	.section	.text.sblk_mlc_dump_prog,"ax",%progbits
 	.align	1
-	.global	ftl_write_commit
+	.global	sblk_mlc_dump_prog
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write_commit, %function
-ftl_write_commit:
-	@ args = 0, pretend = 0, frame = 24
+	.type	sblk_mlc_dump_prog, %function
+sblk_mlc_dump_prog:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r8, .L2717+24
-.L2658:
-	ldr	r0, .L2717
-	ldrb	r2, [r0]	@ zero_extendqisi2
-	cmp	r2, #0
-	beq	.L2660
-	ldr	r4, .L2717+4
-	movs	r1, #48
-	subs	r2, r2, #1
-	strb	r2, [r0]
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r2, .L2717+8
-	str	r3, [sp, #16]
-	add	r3, r3, r3, lsl #1
-	ldr	r2, [r2]
-	add	r3, r8, r3, lsl #4
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #16]
-	muls	r1, r3, r1
-	add	r3, r8, r1
-	ldrb	r1, [r8, r1]	@ zero_extendqisi2
-	ldr	r7, [r3, #20]
-	strb	r1, [r4]
-	cmp	r7, r2
-	bcc	.L2662
-	ldr	r0, [sp, #20]
-	bl	buf_free
-	mov	r0, #-1
-.L2657:
-	add	sp, sp, #32
+	push	{r0, r1, r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #24]
+	ubfx	r6, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	mov	r0, r5
+	bl	zftl_flash_exit_slc_mode
+	ldr	r2, [r4, #24]
+	mov	r1, r6
+	ldr	r0, .L2482
+	adds	r3, r2, #1
+	bl	printf
+	ldr	r3, [r4, #12]
+	mov	r2, r6
+	mov	r1, r5
+	movs	r0, #16
+	str	r3, [sp]
+	ldr	r3, [r4, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #12]
+	adds	r2, r6, #1
+	mov	r1, r5
+	movs	r0, #16
+	str	r3, [sp]
+	ldr	r3, [r4, #4]
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	movs	r1, #64
+	ldr	r0, [r4, #24]
+	bl	flash_wait_device_ready
+	bl	nandc_de_cs.constprop.29
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2662:
-	ldr	r2, [r3, #12]
-	ldr	fp, [r3, #4]
-	ldrb	r4, [r3, #41]	@ zero_extendqisi2
-	ldrb	r3, [r3, #40]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	str	r3, [sp, #12]
-	ldr	r3, .L2717+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2664
-	ldr	r3, .L2717+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	add	r3, r8, r3, lsl #4
-.L2665:
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	cmp	r2, #255
-	bne	.L2666
-	ldr	r2, [r3, #20]
-	cmp	r7, r2
-	bne	.L2664
-	ldr	r0, [r3, #4]
-	lsls	r4, r4, #9
-	ldr	r3, [sp, #12]
-	add	r1, fp, r4
-	add	r0, r0, r4
-	lsls	r2, r3, #9
-	bl	ftl_memcpy
-	ldr	r0, [sp, #20]
-	bl	buf_free
-	b	.L2658
-.L2666:
-	add	r2, r2, r2, lsl #1
-	add	r3, r8, r2, lsl #4
-	b	.L2665
-.L2664:
-	mov	r0, r7
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #28]
-	adds	r0, r0, #1
-	bne	.L2668
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r7
-	bl	pm_log2phys
-.L2668:
-	ldr	r3, .L2717+20
-	ldr	r2, .L2717+24
-	ldr	r0, [r3]
-	movs	r3, #0
-.L2671:
-	ldr	r1, [r2, #20]
-	cmp	r7, r1
-	bne	.L2669
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	lsls	r5, r1, #28
-	bpl	.L2669
-	movs	r2, #48
-	bic	r1, r1, #8
-	mla	r3, r2, r3, r8
-	strb	r1, [r3, #2]
-	ldr	r5, [r3, #4]
-	ldr	r3, [r3, #24]
-	str	r3, [sp, #28]
-.L2670:
-	ldr	r6, .L2717+28
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r2, r3
-	bcc	.L2672
-	add	r6, r0, #16
-.L2716:
-	mov	r10, #0
-.L2673:
-	ldrh	r3, [r6, #6]
-	cbnz	r3, .L2688
-	bl	ftl_flush
-	mov	r0, r6
-	bl	ftl_alloc_new_data_sblk
-.L2688:
-	mov	r0, r6
-	ldr	r5, .L2717+12
-	bl	ftl_get_new_free_page
-	ldr	r2, [sp, #16]
-	movs	r3, #48
-	ldr	r4, [sp, #8]
-	muls	r3, r2, r3
-	add	r2, r8, r3
-	ldr	r1, [r2, #16]
-	str	r7, [r4, #4]
-	str	r10, [r4, #12]
-	str	r1, [r4]
-	ldr	r1, [sp, #28]
-	str	r1, [r4, #8]
-	str	r1, [r2, #28]
-	movs	r1, #255
-	strb	r1, [r8, r3]
-	ldrb	r3, [r2, #2]	@ zero_extendqisi2
-	ldrh	r1, [r6, #12]
-	str	r0, [r2, #24]
-	orr	r3, r3, #10
-	ldr	r0, .L2717+16
-	strb	r3, [r2, #2]
-	ldrh	r3, [r6, #10]
-	add	r3, r3, r1
-	ldr	r1, [sp, #20]
-	subs	r3, r3, #1
-	strh	r3, [r2, #32]	@ movhi
-	bl	buf_add_tail
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r2, .L2717+32
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	str	r1, [r2]
-	ldrh	r2, [r6, #6]
-	cmp	r3, #2
-	strb	r3, [r5]
-	bhi	.L2689
-	cmp	r2, #1
-	bne	.L2661
-.L2689:
-	ldr	r7, .L2717+16
-	mov	ip, #48
-	ldrb	r1, [r6, #5]	@ zero_extendqisi2
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	cmp	r1, #0
-	mov	r1, #0
-	ite	ne
-	movne	r4, #2
-	moveq	r4, #1
+	pop	{r4, r5, r6, pc}
+.L2483:
+	.align	2
+.L2482:
+	.word	.LC134
+	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
+	.section	.text.flash_start_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r2, .L2493
+	ubfx	r7, r1, #21, #3
+	mov	r10, r3
+	ubfx	r5, r1, #0, #21
+	ubfx	r3, r1, #24, #2
+	str	r0, [sp, #4]
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	mov	r8, r2
+	str	r3, [sp]
+	cmp	r1, r7
+	bhi	.L2485
+	movw	r2, #803
+	ldr	r1, .L2493+4
+	ldr	r0, .L2493+8
+	bl	printf
+.L2485:
+	ldr	r2, .L2493+12
+	ldrb	r6, [r2, r7]	@ zero_extendqisi2
+	ldr	r2, .L2493+16
+	ldr	r4, [r2]
+	bl	nandc_rdy_status
+	cbnz	r0, .L2486
+	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, #1
-	it	eq
-	moveq	r4, r3
-	mov	r2, r0
-.L2693:
-	cmp	r1, r4
-	bne	.L2694
-	uxtb	r1, r1
-	add	r0, r0, r0, lsl #1
-	strb	r2, [r7]
-	subs	r3, r3, r1
-	add	r0, r8, r0, lsl #4
-	strb	r3, [r5]
-	bl	sblk_prog_page
-	ldrh	r3, [r6, #6]
-	cmp	r3, #1
-	bne	.L2661
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
+	bne	.L2487
+	bl	nandc_wait_flash_ready
+.L2486:
 	mov	r0, r6
-	bl	ftl_write_last_log_page
+	bl	hynix_reconfig_rr_para
 	mov	r0, r6
-	bl	ftl_alloc_new_data_sblk
-.L2661:
-	ldr	r3, .L2717
+	bl	nandc_cs
+	ldr	r3, [sp]
+	cbnz	r3, .L2488
+	mov	r0, r5
+	bl	slc_phy_page_address_calc
+	ldr	r3, .L2493+20
+	mov	r5, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2658
-.L2660:
-	bl	ftl_write_completed
-	movs	r0, #0
-	b	.L2657
-.L2669:
-	adds	r3, r3, #1
-	adds	r2, r2, #48
-	cmp	r3, #32
-	bne	.L2671
-	movs	r5, #0
-	b	.L2670
-.L2672:
-	cbz	r5, .L2674
-	cbz	r4, .L2675
-	lsls	r2, r4, #9
-	mov	r1, r5
-	mov	r0, fp
-	bl	ftl_memcpy
-.L2675:
-	ldr	r2, [sp, #12]
-	ldr	r3, .L2717+20
-	add	r4, r4, r2
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	ldr	r3, [r3]
-	cmp	r4, r2
-	bcc	.L2676
-	add	r6, r3, #16
-	b	.L2716
-.L2676:
-	lsls	r0, r4, #9
-	subs	r2, r2, r4
-	lsls	r2, r2, #9
-	add	r6, r3, #48
-	adds	r1, r5, r0
-	add	r0, r0, fp
-	bl	ftl_memcpy
-	b	.L2716
-.L2674:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	beq	.L2677
+	cbz	r3, .L2489
+	mov	r0, r6
+	bl	zftl_flash_enter_slc_mode
+.L2489:
+	add	r4, r4, r6, lsl #8
+	movs	r3, #128
+	mov	r0, r5
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L2493+24
+	mov	r3, r10
+	mov	r2, fp
 	movs	r0, #1
-	bl	buf_alloc
-	ldr	r3, [sp, #28]
-	mov	r5, r0
-	str	r7, [r0, #20]
-	movs	r1, #1
-	str	r3, [r0, #24]
-	bl	sblk_read_page
-	ldr	r3, [r5, #12]
-	ldr	r2, [r3, #12]
-	ldr	r3, [r3, #4]
-	add	r10, r2, #1
-	cmp	r7, r3
-	ldr	r3, [r5, #36]
-	bne	.L2678
-	adds	r2, r3, #1
-	bne	.L2679
-.L2678:
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
-	ldr	r2, [sp, #28]
-	str	r3, [sp]
-	mov	r3, r7
-	ldr	r0, .L2717+36
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r5, #12]
-	mov	r2, r3
-	ldr	r0, .L2717+40
-	bl	rknand_print_hex
-	ldr	r3, .L2717+44
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #28]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2717+48
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2679:
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	cmp	r7, r3
-	bne	.L2680
-	ldr	r3, [r5, #36]
-	adds	r3, r3, #1
-	bne	.L2681
-.L2680:
-	movw	r2, #445
-	ldr	r1, .L2717+52
-	ldr	r0, .L2717+56
-	bl	printf
-.L2682:
-	b	.L2682
-.L2718:
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	ldr	r3, [sp, #4]
+	str	r3, [r4, #2056]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs.constprop.29
+.L2487:
+	movs	r2, #64
+	mov	r1, r5
+	mov	r0, r7
+	bl	flash_wait_device_ready_raw
+	b	.L2486
+.L2488:
+	mov	r0, r6
+	bl	zftl_flash_exit_slc_mode
+	b	.L2489
+.L2494:
 	.align	2
-.L2717:
-	.word	.LANCHOR43
-	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR89
-	.word	.LANCHOR127
-	.word	.LANCHOR60
-	.word	.LANCHOR36
-	.word	.LANCHOR45
-	.word	.LANCHOR168
-	.word	.LC147
-	.word	.LC96
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR167
+.L2493:
+	.word	.LANCHOR18
+	.word	.LANCHOR172
 	.word	.LC0
-.L2681:
-	cbz	r4, .L2683
-	ldr	r3, [sp, #28]
-	lsls	r2, r4, #9
-	adds	r3, r3, #1
-	beq	.L2684
-	ldr	r1, [r5, #4]
-	mov	r0, fp
-	bl	ftl_memcpy
-.L2683:
-	ldr	r2, [sp, #12]
-	ldr	r3, .L2719
-	add	r4, r4, r2
-	ldr	r2, .L2719+4
-	ldr	r3, [r3]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	add	r6, r3, #48
-	cmp	r4, r2
-	bcc	.L2685
-	add	r6, r3, #16
-.L2686:
-	cmp	r5, #0
-	beq	.L2673
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	mov	r1, r5
-	ldr	r0, .L2719+8
-	bic	r3, r3, #8
-	strb	r3, [r5, #2]
-	bl	buf_remove_buf
-	mov	r0, r5
-	bl	buf_free
-	b	.L2673
-.L2685:
-	ldr	r3, [sp, #28]
-	subs	r2, r2, r4
-	lsls	r2, r2, #9
-	lsls	r0, r4, #9
-	adds	r3, r3, #1
-	beq	.L2687
-	ldr	r1, [r5, #4]
-	add	r1, r1, r0
-	add	r0, r0, fp
-	bl	ftl_memcpy
-	b	.L2686
-.L2687:
-	movs	r1, #0
-	add	r0, r0, fp
-	bl	ftl_memset
-	b	.L2686
-.L2694:
-	mul	r2, ip, r2
-	adds	r1, r1, #1
-	ldrb	r2, [r8, r2]	@ zero_extendqisi2
-	b	.L2693
-.L2695:
-	lsls	r2, r4, #9
-	mov	r10, r5
-.L2684:
-	movs	r1, #0
-	mov	r0, fp
-	bl	ftl_memset
-	b	.L2683
-.L2677:
-	cmp	r4, #0
-	bne	.L2695
-	mov	r10, r4
-	mov	r5, r4
-	b	.L2683
-.L2720:
+	.word	.LANCHOR30
+	.word	.LANCHOR13
+	.word	.LANCHOR0
+	.word	.LANCHOR31
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #12]
+	ldr	r2, [r0, #4]
+	ldr	r1, [r0, #24]
+	movs	r0, #16
+	bl	flash_start_page_prog
+	ldr	r3, .L2503
+	ldr	r2, [r4, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2496
+	ldr	r6, .L2503+4
+	ubfx	r2, r2, #21, #3
+	movs	r5, #48
+	mov	r7, r6
+.L2498:
+	mla	r1, r5, r3, r6
+	ldr	r0, [r1, #24]
+	ubfx	r0, r0, #21, #3
+	cmp	r2, r0
+	bne	.L2497
+	add	r0, r1, #42
+	ldrb	r1, [r1, #42]	@ zero_extendqisi2
+	cmp	r1, #7
+	bne	.L2497
+	movs	r3, #3
+	strb	r3, [r0]
+.L2496:
+	movs	r3, #3
+	mov	r1, r4
+	strb	r3, [r4, #42]
+	movs	r3, #1
+	strb	r3, [r4, #43]
+	movs	r3, #255
+	strb	r3, [r4]
+	ldr	r0, .L2503
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	buf_add_tail
+.L2497:
+	muls	r3, r5, r3
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2498
+	b	.L2496
+.L2504:
 	.align	2
-.L2719:
-	.word	.LANCHOR60
-	.word	.LANCHOR45
-	.word	.LANCHOR51
-	.size	ftl_write_commit, .-ftl_write_commit
-	.section	.text.ftl_discard,"ax",%progbits
+.L2503:
+	.word	.LANCHOR54
+	.word	.LANCHOR50
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",%progbits
 	.align	1
-	.global	ftl_discard
+	.global	sblk_prog_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_discard, %function
-ftl_discard:
-	@ args = 0, pretend = 0, frame = 24
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0, #34]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r2
-	sub	sp, sp, #32
-	mov	r10, r3
-	cmp	r0, #0
-	bne	.L2722
-	ldr	r3, .L2773
-	mov	fp, #24576
-	ldr	r3, [r3]
-.L2723:
-	adds	r2, r1, r5
-	cmp	r3, r2
-	bcc	.L2744
-	ldr	r3, .L2773+4
-	add	fp, fp, r1
+	mov	r4, r0
+	mov	r5, r1
+	cbz	r3, .L2506
+	ldr	r3, .L2532
 	ldr	r3, [r3]
-	lsls	r3, r3, #19
-	bpl	.L2725
-	mov	r1, r0
-	str	r10, [sp]
-	mov	r3, r5
-	mov	r2, fp
-	ldr	r0, .L2773+8
+	lsls	r3, r3, #23
+	bpl	.L2506
+	mov	r2, r1
+	ldr	r1, [r0, #24]
+	ldr	r0, .L2532+4
 	bl	printf
-.L2725:
-	ldr	r6, .L2773+12
-	mov	r0, fp
-	ldr	r7, .L2773+16
-	ldr	r3, [r6]
-	ldrb	r8, [r7]	@ zero_extendqisi2
-	ldr	r2, [r3, #8]
-	mov	r1, r8
-	str	r2, [sp, #12]
-	adds	r2, r2, #1
-	str	r2, [r3, #8]
-	bl	__aeabi_uidiv
-	mov	r1, r8
-	mov	r4, r0
-	mov	r0, fp
-	bl	__aeabi_uidivmod
-	mov	fp, r1
-	cmp	r1, #0
-	beq	.L2726
-	sub	r3, r8, r1
-	cmp	r3, r5
-	it	cs
-	movcs	r3, r5
-	cmp	r10, #1
-	mov	r8, r3
-	uxth	r3, r3
-	str	r3, [sp, #16]
-	bhi	.L2728
-	mov	r0, r4
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #24]
-	adds	r0, r0, #1
-	bne	.L2729
-	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r4
-	bl	pm_log2phys
-.L2729:
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2728
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r3, r0
-	cbz	r0, .L2728
-	ldr	r2, [sp, #12]
-	movs	r1, #0
-	str	r4, [r0, #20]
-	strb	fp, [r0, #41]
-	str	r3, [sp, #20]
-	strb	r8, [r3, #40]
-	str	r2, [r0, #16]
-	ldr	r3, [sp, #16]
-	ldr	r0, [r0, #4]
-	lsls	r2, r3, #9
-	add	r0, r0, fp, lsl #9
-	bl	ftl_memset
-	ldr	r3, [sp, #20]
-	mov	r0, r3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	r2, [r6]
-	ldr	r3, [r2, #76]
-	adds	r3, r3, #1
-	str	r3, [r2, #76]
-.L2728:
-	ldr	r3, [sp, #16]
-	adds	r4, r4, #1
-	subs	r5, r5, r3
-.L2726:
-	cbz	r5, .L2731
-	bl	ftl_flush
-.L2731:
-	ldr	fp, .L2773+32
-	mov	r3, #-1
-	str	r3, [sp, #28]
-.L2732:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcs	.L2737
-	cmp	r10, #1
-	bls	.L2738
-.L2739:
+.L2506:
+	ldr	fp, .L2532+32
+	movs	r7, #0
+.L2507:
+	cbnz	r5, .L2518
+.L2531:
 	movs	r0, #0
-.L2721:
-	add	sp, sp, #32
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2722:
-	cmp	r0, #3
-	bhi	.L2744
-	lsl	fp, r0, #13
-	mov	r3, #8192
-	b	.L2723
-.L2737:
-	mov	r0, r4
-	bl	lpa_hash_get_ppa
-	add	r1, sp, #32
-	movs	r2, #0
-	str	r0, [r1, #-8]!
-	adds	r0, r0, #1
-	mov	r0, r4
-	beq	.L2733
-	bl	pm_log2phys
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2735
-	movs	r2, #1
-	add	r1, sp, #28
-	mov	r0, r4
-	bl	pm_log2phys
-.L2772:
-	ldr	r2, [r6]
-	ldr	r3, [r2, #76]
-	adds	r3, r3, #1
-	str	r3, [r2, #76]
-.L2735:
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	adds	r4, r4, #1
-	subs	r5, r5, r3
-	b	.L2732
-.L2733:
-	bl	pm_log2phys
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2735
-	add	r1, sp, #28
-	movs	r2, #1
+.L2518:
+	ldrb	r8, [r4]	@ zero_extendqisi2
+	ldr	r6, [r4, #24]
+.L2508:
+	movs	r1, #1
+	mov	r0, r6
+	bl	queue_lun_state
+	cbnz	r0, .L2509
+	cmp	r5, #1
+	beq	.L2510
+	ldr	r3, .L2532+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2511
+.L2510:
 	mov	r0, r4
-	bl	pm_log2phys
-	ldr	r3, .L2773+20
-	ldrb	r1, [fp]	@ zero_extendqisi2
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [sp, #24]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ands	r0, r0, r3
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	bl	ftl_vpn_decrement
-	b	.L2772
-.L2738:
-	cmp	r5, #0
-	beq	.L2739
-	mov	r0, r4
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #24]
-	adds	r0, r0, #1
-	bne	.L2740
-	movs	r2, #0
-	add	r1, sp, #24
-	mov	r0, r4
-	bl	pm_log2phys
-.L2740:
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	beq	.L2739
-	movs	r0, #0
-	bl	buf_alloc
-	mov	r10, r0
-	cmp	r0, #0
-	beq	.L2739
-	ldr	r3, [sp, #12]
-	str	r4, [r0, #20]
-	movs	r4, #0
-	strb	r4, [r0, #41]
-	str	r3, [r0, #16]
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	strb	r5, [r0, #40]
-	cmp	r5, r3
-	bcc	.L2741
-	mov	r2, #1048
-	ldr	r1, .L2773+24
-	ldr	r0, .L2773+28
+	bl	queue_prog_cmd
+.L2512:
+	subs	r5, r5, #1
+	beq	.L2531
+	add	r8, r8, r8, lsl #1
+	add	r4, fp, r8, lsl #4
+	b	.L2507
+.L2509:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2508
+.L2511:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ubfx	r10, r6, #21, #3
+	cmp	r3, #255
+	bne	.L2513
+	movw	r2, #583
+	ldr	r1, .L2532+12
+	ldr	r0, .L2532+16
 	bl	printf
-.L2742:
-	b	.L2742
-.L2741:
-	lsls	r2, r5, #9
+.L2513:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	movs	r2, #48
+	mla	r3, r2, r3, fp
+	ldr	ip, [r3, #24]
+	ubfx	r3, ip, #21, #3
+	cmp	r10, r3
+	bne	.L2514
+	ldr	r3, .L2532+20
+	mov	r10, #1
+	ldrh	r1, [r3]
+	ldr	r3, .L2532+24
+	lsl	r2, r10, r1
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	rsb	r3, r1, #21
+	lsl	r3, r10, r3
+	subs	r2, r2, #1
+	uxth	r2, r2
+	subs	r0, r0, #1
+	subs	r3, r3, #1
+	ands	r3, r3, r0
+	and	lr, r2, r6
+	uxth	r3, r3
+	lsrs	r6, r6, r1
+	lsr	r1, ip, r1
+	ands	r6, r6, r3
+	ands	r1, r1, r3
+	and	r2, r2, ip
+	cmp	r6, r1
+	beq	.L2514
+	cmp	lr, r2
+	bne	.L2514
+	cmp	r7, r0
+	beq	.L2514
+	ldr	r3, [r4, #12]
+	movs	r0, #17
+	ldr	r2, [r4, #4]
+	add	r7, r7, r10
+	ldr	r1, [r4, #24]
+	bl	flash_start_page_prog
+	movs	r3, #9
+	strb	r10, [r4, #43]
+	strb	r3, [r4, #42]
+	movs	r3, #255
+	strb	r3, [r4]
 	mov	r1, r4
-	ldr	r0, [r0, #4]
-	bl	ftl_memset
-	mov	r0, r10
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	r2, [r6]
-	ldr	r3, [r2, #76]
-	adds	r3, r3, #1
-	str	r3, [r2, #76]
-	b	.L2739
-.L2744:
-	mov	r0, #-1
-	b	.L2721
-.L2774:
+	ldr	r0, .L2532+28
+	bl	buf_add_tail
+	b	.L2512
+.L2514:
+	mov	r0, r4
+	movs	r7, #0
+	bl	queue_prog_cmd
+	b	.L2512
+.L2533:
 	.align	2
-.L2773:
-	.word	.LANCHOR52
-	.word	.LANCHOR22
-	.word	.LC148
-	.word	.LANCHOR46
-	.word	.LANCHOR45
-	.word	.LANCHOR71
-	.word	.LANCHOR169
+.L2532:
+	.word	.LANCHOR14
+	.word	.LC135
+	.word	.LANCHOR39
+	.word	.LANCHOR173
 	.word	.LC0
-	.word	.LANCHOR70
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlDiscard,"ax",%progbits
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR54
+	.word	.LANCHOR50
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",%progbits
 	.align	1
-	.global	FtlDiscard
+	.global	ftl_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
+	.type	ftl_flush, %function
+ftl_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2539
+	ldr	r5, .L2539+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	cbz	r1, .L2535
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldr	r3, .L2539+8
+	add	r0, r0, r0, lsl #1
+	add	r0, r3, r0, lsl #4
+	bl	sblk_prog_page
+.L2535:
+	movs	r3, #255
+	strb	r3, [r5]
 	movs	r3, #0
-	mov	r2, r1
-	mov	r1, r0
-	mov	r0, r3
-	b	ftl_discard
-	.size	FtlDiscard, .-FtlDiscard
-	.section	.text.gc_do_copy_back,"ax",%progbits
+	strb	r3, [r4]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	movw	r0, #65535
+	pop	{r3, r4, r5, lr}
+	b	ftl_vpn_decrement
+.L2540:
+	.align	2
+.L2539:
+	.word	.LANCHOR121
+	.word	.LANCHOR174
+	.word	.LANCHOR50
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",%progbits
 	.align	1
-	.global	gc_do_copy_back
+	.global	flash_prog_page_en
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	gc_do_copy_back, %function
-gc_do_copy_back:
-	@ args = 0, pretend = 0, frame = 48
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	@ args = 8, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2877
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #72
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	cmp	r0, #0
-	bne	.L2777
-	bl	buf_alloc
-	mov	r4, r0
-	cmp	r0, #0
-	beq	.L2776
-	ldr	r6, .L2877+4
-	ldrh	r2, [r6, #22]
-	mov	r0, r2
-	bl	gc_get_src_ppa_from_index
-	movs	r1, #1
-	adds	r2, r2, #1
-	str	r0, [r4, #24]
-	mov	r7, r0
+	sub	sp, sp, #24
+	mov	r7, r3
+	ldrb	r3, [sp, #60]	@ zero_extendqisi2
+	mov	fp, r0
+	mov	r4, r1
+	mov	r8, r2
+	ubfx	r5, r1, #24, #2
+	str	r3, [sp, #20]
+	ldr	r3, .L2574
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L2542
+	movw	r2, #546
+	ldr	r1, .L2574+4
+	ldr	r0, .L2574+8
+	bl	printf
+.L2542:
+	ldr	r3, .L2574+12
+	ldrb	r3, [r3, fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cmp	r5, #0
+	bne	.L2553
+	ldr	r3, .L2574+16
+	ldr	r10, .L2574+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2544
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2553
+.L2544:
+	ldr	r3, .L2574+20
 	mov	r0, r4
-	strh	r2, [r6, #22]	@ movhi
-	bl	sblk_read_page
-	ldr	r3, [r4, #36]
-	adds	r0, r3, #1
-	beq	.L2779
-	cmp	r3, #512
-	bne	.L2780
-.L2779:
-	ldr	r3, .L2877+8
-	ldrh	r0, [r3]
-	movs	r3, #1
-	rsb	r2, r0, #21
-	lsls	r3, r3, r2
-	ldr	r2, .L2877+12
-	lsr	r0, r7, r0
-	subs	r3, r3, #1
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	ands	r0, r0, r3
+	ldrh	r6, [r3]
+	mov	r1, r6
 	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-.L2780:
-	ldr	r3, [r4, #36]
-	adds	r1, r3, #1
-	beq	.L2781
-	cmp	r3, #512
-	bne	.L2782
-.L2781:
-	mov	r2, #556
-	ldr	r1, .L2877+16
-	ldr	r0, .L2877+20
-	bl	printf
-.L2783:
-	b	.L2783
-.L2782:
-	ldr	r3, [r4, #12]
-	ldr	r5, [r3, #4]
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	str	r0, [sp, #48]
-	adds	r0, r0, #1
-	bne	.L2784
-	movs	r2, #0
-	add	r1, sp, #48
-	mov	r0, r5
-	bl	pm_log2phys
-.L2784:
-	ldr	r8, [sp, #48]
-	cmp	r7, r8
-	bne	.L2785
-	ldr	r0, .L2877+24
-	movs	r3, #0
-.L2788:
-	adds	r2, r0, r3
-	ldr	r1, [r2, #20]
-	cmp	r5, r1
-	bne	.L2786
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	lsls	r2, r2, #30
-	bpl	.L2786
+	mov	r1, r6
+	mul	r5, r6, r0
 	mov	r0, r4
-	bl	buf_free
-	ldr	r3, .L2877+28
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2545
+	add	r5, r5, r1, lsl #1
+.L2549:
+	ldr	r3, .L2574+24
 	ldr	r3, [r3]
-	lsls	r1, r3, #23
-	bpl	.L2776
-	ldrh	r3, [r6, #22]
-	mov	r2, r7
-	mov	r1, r5
-	ldr	r0, .L2877+32
+	lsls	r1, r3, #27
+	bpl	.L2546
+	mov	r3, r5
+	mov	r2, r4
+	ldr	r1, [sp, #12]
+	ldr	r0, .L2574+28
 	bl	printf
-.L2776:
-	add	sp, sp, #72
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2786:
-	adds	r3, r3, #48
-	cmp	r3, #1536
-	bne	.L2788
-	movs	r3, #0
-	str	r5, [r4, #20]
-	strb	r3, [r4, #41]
-	ldr	r3, .L2877+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strb	r3, [r4, #40]
-	ldrb	r3, [r4, #2]	@ zero_extendqisi2
-	orr	r3, r3, #10
-	strb	r3, [r4, #2]
-	ldr	r3, [r4, #12]
-	ldr	r3, [r3]
-	str	r3, [r4, #16]
-	ldr	r3, .L2877+28
-	ldr	r3, [r3]
-	lsls	r2, r3, #23
-	bpl	.L2789
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	ldrh	r3, [r6, #22]
+.L2546:
+	ldr	r3, [sp, #56]
 	mov	r2, r8
-	str	r7, [sp]
 	mov	r1, r5
-	str	r3, [sp, #4]
-	mov	r3, r0
-	ldr	r0, .L2877+40
-	bl	printf
-.L2789:
-	mov	r0, r4
-	bl	ftl_gc_write_buf
-	bl	ftl_write_commit
-	ldr	r3, .L2877+44
-	ldr	r2, [r3]
-	ldr	r3, [r2, #60]
-	adds	r3, r3, #1
-	str	r3, [r2, #60]
-	ldrh	r3, [r6, #24]
-	adds	r3, r3, #1
-	strh	r3, [r6, #24]	@ movhi
-	b	.L2776
-.L2785:
-	ldr	r3, .L2877+28
+	ldr	r0, [sp, #12]
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_prog_page
+	ldr	r3, [sp, #20]
+	str	r0, [sp, #16]
+	cmp	r3, #0
+	beq	.L2547
+	ldr	r3, [sp, #56]
+	mov	r1, r4
+	ldr	r10, .L2574+44
+	mov	r0, fp
+	ldr	r2, .L2574+32
+	str	r3, [sp]
+	ldr	r3, [r10]
+	ldr	r2, [r2]
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	mov	r6, r0
+	beq	.L2548
+	cmp	r0, #512
+	beq	.L2548
+	ldr	r3, .L2574+32
+	ldr	r2, [r8]
 	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2790
-	mov	r0, r5
-	bl	lpa_hash_get_ppa
-	ldrh	r3, [r6, #22]
-	mov	r2, r8
-	str	r7, [sp]
-	mov	r1, r5
-	str	r3, [sp, #4]
-	mov	r3, r0
-	ldr	r0, .L2877+40
-	bl	printf
-.L2790:
-	mov	r0, r4
-	bl	buf_free
-	b	.L2776
-.L2777:
-	ldr	r3, .L2877+48
-	ldr	r5, .L2877+4
 	ldr	r3, [r3]
-	str	r3, [sp, #28]
-	ldr	r3, .L2877+52
-	ldrb	r8, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #28]
-	cmp	r8, #3
-	ldrb	r7, [r3, #89]	@ zero_extendqisi2
-	bne	.L2791
-	ldr	r3, .L2877+56
-	ldrh	r4, [r5, #310]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2792
-	add	r1, r7, r7, lsl #1
-	mov	r0, r4
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	sub	r0, r7, r7, lsl #2
-	str	r8, [sp, #32]
-	smulbb	r0, r0, r10
-	add	r0, r0, r4
-	uxth	fp, r0
-.L2793:
-	ldr	r3, [sp, #32]
-	muls	r3, r7, r3
-	str	r3, [sp, #36]
-	ldr	r3, .L2877+60
-	ldrh	r1, [r3]
-	ldr	r3, .L2877+64
-	ldr	r8, [r3]
-	muls	r1, r7, r1
-	ldrh	r3, [r5, #20]
-	movs	r7, #0
-	str	r3, [sp, #40]
-	subs	r1, r1, #1
-	ldr	r3, .L2877+4
-.L2796:
-	ldr	r0, [sp, #36]
-	uxth	r2, r7
-	cmp	r2, r0
-	blt	.L2798
-.L2829:
-	movs	r6, #1
-	b	.L2794
-.L2792:
-	mov	r0, r4
+	cmp	r2, r3
+	bne	.L2548
+	ldr	r3, [r10]
+	ldr	r2, [r7]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L2547
+.L2548:
+	movs	r3, #4
+	mov	r1, r8
+	mov	r2, r3
+	ldr	r0, .L2574+36
+	bl	rknand_print_hex
+	movs	r3, #4
 	mov	r1, r7
-	bl	__aeabi_idiv
-	ldr	r3, .L2877+68
-	str	r8, [sp, #32]
-	ldrh	r6, [r3, r0, lsl #1]
-	smulbb	r0, r0, r7
-	subs	r0, r4, r0
-	lsr	r10, r6, #3
-	uxth	fp, r0
-	mla	r4, r7, r10, fp
-	and	r6, r6, #7
-	cmp	r6, #1
-	add	r4, r4, r4, lsl #1
-	uxth	r4, r4
-	beq	.L2793
-.L2794:
-	ldr	r3, .L2877+28
+	mov	r2, r3
+	ldr	r0, .L2574+40
+	bl	rknand_print_hex
+	ldr	r1, .L2574+44
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2574+48
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, .L2574+32
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2574+52
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	cmp	r6, #512
+	beq	.L2549
+.L2551:
+	mov	r1, r4
+	ldr	r0, .L2574+56
+	bl	printf
+	movw	r2, #577
+	ldr	r1, .L2574+4
+	ldr	r0, .L2574+8
+	bl	printf
+	mov	r0, #-1
+.L2550:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2545:
+	ldr	r3, .L2574+60
+	ldrh	r1, [r3, r1, lsl #1]
+	add	r5, r5, r1
+	b	.L2549
+.L2553:
+.L2543:
+	mov	r5, r4
+	b	.L2549
+.L2547:
+	ldr	r0, [sp, #16]
+	adds	r3, r0, #1
+	bne	.L2550
+	b	.L2551
+.L2575:
+	.align	2
+.L2574:
+	.word	.LANCHOR18
+	.word	.LANCHOR175
+	.word	.LC0
+	.word	.LANCHOR30
+	.word	.LANCHOR0
+	.word	.LANCHOR2
+	.word	.LANCHOR14
+	.word	.LC136
+	.word	.LANCHOR164
+	.word	.LC137
+	.word	.LC138
+	.word	.LANCHOR163
+	.word	.LC139
+	.word	.LC140
+	.word	.LC141
+	.word	.LANCHOR3
+	.word	.LANCHOR1
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",%progbits
+	.align	1
+	.global	ftl_test_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_test_block, %function
+ftl_test_block:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r3, .L2603
+	mov	r10, r0
+	mov	r8, r5
+	str	r5, [r3]
+	ldr	r3, .L2603+4
+	str	r5, [r3]
+.L2577:
+	uxth	r3, r5
+	str	r3, [sp, #12]
+	ldr	r3, .L2603+8
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L2587
+	mov	fp, #0
+	b	.L2588
+.L2586:
+	ldr	r3, .L2603+12
 	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L2799
-	ldr	r3, .L2877+64
-	mov	r2, r6
-	str	r4, [sp, #8]
+	lsls	r3, r3, #19
+	bpl	.L2578
 	mov	r1, r10
-	ldr	r0, .L2877+72
+	ldr	r0, .L2603+16
+	bl	printf
+.L2578:
+	ldr	r3, .L2603+20
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	smulbb	r4, r4, r10
+	add	r4, r4, r6
+	uxth	r4, r4
+	cbnz	r3, .L2579
+	ldr	r3, .L2603+24
 	ldr	r3, [r3]
-	ldr	r3, [r3, r4, lsl #2]
+	ldrb	r3, [r3, #47]	@ zero_extendqisi2
+	cmp	r3, r4
+	bcs	.L2580
+.L2579:
+	uxtb	r6, r5
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_check_bad_block
+	cbnz	r0, .L2580
+	ldr	r3, .L2603+28
+	mov	r1, r8
+	mov	r0, r6
+	ldrh	r7, [r3]
+	muls	r7, r4, r7
+	mov	r2, r7
+	bl	flash_erase_block_en
+	cbz	r0, .L2581
+	ldr	r3, .L2603+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	bne	.L2602
+	ldr	r3, .L2603+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2602
+	mov	r2, r7
+	movs	r1, #1
+	mov	r0, r6
+	bl	flash_erase_block_en
+	cbnz	r0, .L2602
+.L2585:
+	ldr	r3, .L2603+32
+	mov	r8, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #24
+.L2584:
+	movs	r3, #1
+	ldr	r2, .L2603
 	str	r3, [sp, #4]
-	ldrh	r3, [r5, #310]
-	str	r3, [sp]
-	mov	r3, fp
-	bl	printf
-.L2799:
-	movs	r3, #0
-.L2875:
-	str	r3, [sp, #40]
-	ldrh	r3, [sp, #40]
-	mov	r8, r3
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #28]
-	ldrb	r2, [r3, #89]	@ zero_extendqisi2
-	ldr	r3, [sp, #32]
-	muls	r3, r2, r3
-	cmp	r8, r3
-	blt	.L2816
-	ldr	r1, .L2877+52
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #3
-	beq	.L2817
-	movs	r0, #0
-	subs	r3, r3, #1
-.L2818:
-	uxth	r1, r0
-	adds	r0, r0, #1
-	cmp	r1, r3
-	blt	.L2824
-	add	r1, sp, #72
-	add	r3, r1, r3, lsl #2
-	movs	r1, #255
-	ldr	r3, [r3, #-24]
-	strb	r1, [r3]
-	ldrh	r3, [sp, #32]
-	ldr	r0, [sp, #48]
-	smulbb	r1, r3, r2
-	uxtb	r1, r1
-	bl	sblk_prog_page
-	b	.L2823
-.L2791:
-	ldr	r3, .L2877+76
 	mov	r1, r7
-	ldrh	r4, [r5, #310]
+	ldr	r3, .L2603+40
+	mov	r0, r6
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	mov	r0, r4
-	cbnz	r3, .L2795
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	movs	r3, #1
-	smulbb	r0, r7, r10
-	subs	r0, r4, r0
-	uxth	fp, r0
-.L2873:
-	str	r3, [sp, #32]
-	b	.L2793
-.L2795:
-	bl	__aeabi_idiv
-	uxth	r10, r0
-	movs	r3, #2
-	smulbb	r0, r7, r10
-	subs	r0, r4, r0
-	uxth	fp, r0
-	b	.L2873
-.L2878:
-	.align	2
-.L2877:
-	.word	.LANCHOR67
-	.word	.LANCHOR59
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR170
-	.word	.LC0
-	.word	.LANCHOR36
-	.word	.LANCHOR22
-	.word	.LC149
-	.word	.LANCHOR45
-	.word	.LC150
-	.word	.LANCHOR46
-	.word	.LANCHOR60
-	.word	.LANCHOR64
-	.word	.LANCHOR66
-	.word	.LANCHOR68
-	.word	.LANCHOR108
-	.word	.LANCHOR171
-	.word	.LC151
-	.word	.LANCHOR74
-.L2798:
-	add	r2, r2, r4
-	cmp	r2, r1
-	beq	.L2829
-	ldr	r0, [r8, r2, lsl #2]
-	adds	r0, r0, #1
-	bne	.L2797
-	ldrh	r6, [r3, #22]
-	str	r3, [sp, #44]
-	ldr	r3, [sp, #40]
-	cmp	r6, r3
-	bcs	.L2776
+	str	r3, [sp]
+	ldr	r3, .L2603+4
+	bl	flash_prog_page_en
+	cbz	r0, .L2580
+.L2602:
+	mov	r1, r4
 	mov	r0, r6
-	adds	r6, r6, #1
-	bl	gc_get_src_ppa_from_index
-	ldr	r3, [sp, #44]
-	strh	r6, [r3, #22]	@ movhi
-	str	r0, [r8, r2, lsl #2]
-.L2797:
-	adds	r7, r7, #1
-	b	.L2796
-.L2816:
-	ldr	r3, .L2879
-	add	r7, r4, r8
+	bl	flash_mask_bad_block
+.L2580:
+	add	fp, fp, #1
+.L2588:
+	ldr	r3, .L2603+20
+	uxth	r6, fp
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2586
+	adds	r5, r5, #1
+	b	.L2577
+.L2581:
+	cmp	r8, #0
+	beq	.L2584
+	b	.L2585
+.L2587:
+	cmp	r8, #0
+	beq	.L2589
+	ldr	r3, .L2603+44
+	movs	r2, #2
 	ldr	r3, [r3]
-	ldrb	r3, [r3, r7]	@ zero_extendqisi2
-	cmp	r3, #255
-	bne	.L2801
+	add	r10, r3, r10, lsl #2
+	ldrb	r3, [r10, #2]	@ zero_extendqisi2
+	bfi	r3, r2, #3, #2
+	strb	r3, [r10, #2]
+.L2589:
 	movs	r0, #0
-	bl	buf_alloc
-	mov	r5, r0
-	cbnz	r0, .L2802
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2604:
+	.align	2
+.L2603:
+	.word	ftl_tmp_buffer
+	.word	.LANCHOR176
+	.word	.LANCHOR104
+	.word	.LANCHOR14
+	.word	.LC142
+	.word	.LANCHOR67
+	.word	.LANCHOR27
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.word	.LANCHOR0
+	.word	.LANCHOR123
+	.word	.LANCHOR7
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",%progbits
+	.align	1
+	.global	ftl_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	mov	r7, r3
+	mov	r5, r1
+	mov	r6, r2
 	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	bl	gc_write_completed
-	bl	gc_free_temp_buf
-	mov	r0, r5
-	bl	buf_alloc
-	mov	r5, r0
-	cmp	r0, #0
-	beq	.L2776
-.L2802:
-	ldr	r3, .L2879
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	ldr	r3, [r3]
-	strb	r2, [r3, r7]
-	ldr	r2, .L2879+4
-	strb	r6, [r5, #45]
-	ldrb	r3, [r2, #7]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strb	r3, [r2, #7]
-	ldr	r3, [sp, #36]
-	add	r3, r3, r4
-	strh	r3, [r5, #32]	@ movhi
-	ldr	r3, .L2879+8
-	ldrh	r2, [r3]
-	ldr	r3, [sp, #28]
-	ldrb	r3, [r3, #89]	@ zero_extendqisi2
-	muls	r3, r2, r3
-	subs	r3, r3, #1
-	cmp	r7, r3
-	bne	.L2803
-	ldr	r3, .L2879+12
-	ldr	r0, [r5, #4]
-	ldr	r1, [r3]
-	mov	r3, #-1
-	str	r3, [r1, r7, lsl #2]
-	ldr	r3, .L2879+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	ldr	r3, .L2879+8
-	ldr	r2, .L2879+16
-	ldr	r0, [r5, #4]
-	ldrh	r3, [r3]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L2879+20
-	ldr	r1, [r3]
-	lsls	r2, r2, #2
-	add	r0, r0, r2
-	bl	ftl_memcpy
-	ldr	r3, .L2879+24
+	movs	r3, #1
+	mov	r0, r4
+	str	r3, [sp, #4]
+	mov	r2, r6
+	ldr	r3, [sp, #32]
+	mov	r1, r5
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_prog_page_en
+	adds	r3, r0, #1
+	mov	r4, r0
+	bne	.L2605
+	ldr	r1, .L2607
+	movw	r2, #2231
+	ldr	r0, .L2607+4
+	bl	printf
+	mov	r1, r5
+	ldr	r0, .L2607+8
+	bl	printf
+.L2605:
+	mov	r0, r4
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L2608:
+	.align	2
+.L2607:
+	.word	.LANCHOR177
+	.word	.LC0
+	.word	.LC141
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, #0
+	ldr	r6, .L2642
 	movs	r1, #0
-	ldr	r0, [r5, #12]
-	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r7, .L2642+4
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	str	r0, [sp, #12]
+	mov	r5, r7
+	ldr	r0, .L2642+8
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r3, [r5, #12]
-	ldr	r2, .L2879+28
-	ldr	r0, [r5, #4]
-	str	r3, [sp, #44]
-	str	r2, [r3]
-	ldr	r3, .L2879+8
-	ldrh	r2, [r3]
-	ldr	r3, .L2879+16
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	muls	r1, r2, r1
-	lsls	r1, r1, #2
-	bl	js_hash
-	ldr	r2, .L2879+32
-	ldr	r3, [sp, #44]
+.L2610:
+	ldr	r8, .L2642+48
+	ldr	r1, [sp, #12]
+	ldrb	fp, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	ldrh	r4, [r7, #2]
+	str	r3, [sp, #8]
+	ldr	r3, .L2642+12
+	ldr	r2, [r3]
+	ldr	r3, [r2, #4]
+	adds	r3, r3, #1
+	str	r3, [r2, #4]
+	ldr	r2, .L2642+8
+	stm	r2, {r1, r3}
+	ldr	r2, .L2642+16
 	ldr	r2, [r2]
-	str	r0, [r3, #4]
-	ldr	r2, [r2, #132]
-.L2874:
-	str	r2, [r3, #8]
-.L2801:
-	ldr	r3, .L2879
-	ldr	r2, .L2879+36
-	ldr	ip, [r3]
-	add	r3, sp, #72
-	add	r1, r3, r8, lsl #2
-	ldrb	r5, [ip, r7]	@ zero_extendqisi2
-	add	r3, r5, r5, lsl #1
-	add	r3, r2, r3, lsl #4
-	str	r3, [r1, #-24]
-	movs	r3, #48
-	mla	r2, r3, r5, r2
+	lsls	r2, r2, #19
+	bpl	.L2611
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L2642+20
+	bl	printf
+.L2611:
+	ldr	r3, .L2642+24
+	ldrh	r0, [r5, #2]
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2612
+	ldr	r4, .L2642+28
+	ldr	fp, .L2642+44
+.L2616:
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #7
+	strb	r3, [r5, #1]
+	bls	.L2613
+	ldr	r2, [r4]
+	movs	r3, #0
+	adds	r2, r2, #40
+.L2628:
+	ldrb	r1, [r2], #1	@ zero_extendqisi2
+	uxth	r10, r3
+	cmp	r1, #128
+	bls	.L2614
+	cmp	r1, #255
+	beq	.L2615
+	mov	r2, #748
+	mov	r1, fp
+	ldr	r0, .L2642+32
+	bl	printf
+.L2614:
+	strb	r10, [r5, #1]
+	mov	r10, #1
+.L2613:
+	ldr	r3, [r4]
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	add	r3, r3, r2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	cmp	r3, #255
+	strb	r3, [r5]
+	beq	.L2616
+	ldrh	r4, [r8]
+	movs	r0, #0
+	muls	r4, r3, r4
+	mov	r1, r4
+	bl	flash_erase_block
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r2, .L2642+36
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L2642+8
+	bl	ftl_prog_page
 	movs	r3, #1
-	strh	r3, [r2, #34]	@ movhi
-	ldr	r3, .L2879+40
-	strb	r6, [r2, #45]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #3
-	bne	.L2811
-	ldr	r3, [sp, #36]
-	ldr	r0, .L2879+44
-	umull	r0, r1, r3, r0
-	ldr	r0, [sp, #28]
-	lsrs	r3, r1, #1
-	uxtah	r1, fp, r3
-	add	r3, r3, r3, lsl #1
-	add	r1, r0, r1, lsl #1
-	ldrh	r0, [r1, #96]
-	ldr	r1, .L2879+48
-	ldrh	r1, [r1]
-	muls	r1, r0, r1
-	ldrh	r0, [r2, #32]
-	orr	r1, r1, r10
-	str	r1, [r2, #24]
-	ldr	r2, .L2879+52
-	ldr	lr, [r2]
-	ldr	r2, [sp, #36]
-	subs	r3, r2, r3
-	lsls	r3, r3, #24
-	add	r3, r3, #16777216
-	orrs	r1, r1, r3
-	str	r1, [lr, r0, lsl #2]
-.L2812:
-	ldr	r3, .L2879+56
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2815
-	ldr	r3, .L2879+4
-	movs	r2, #48
-	ldr	r0, .L2879+60
-	ldrb	r1, [r3, #6]	@ zero_extendqisi2
-	ldr	r3, .L2879+36
-	mla	r5, r2, r5, r3
-	ldr	r2, .L2879+44
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #36]
-	umull	r2, r3, r3, r2
-	mov	r2, r6
-	ubfx	r3, r3, #1, #16
-	add	r3, r3, fp
-	str	r3, [sp, #16]
-	ldrb	r3, [r5, #1]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-	ldrh	r3, [r5, #32]
-	str	r3, [sp, #8]
-	ldr	r3, [r5, #24]
-	str	r3, [sp, #4]
-	ldrb	r3, [ip, r7]	@ zero_extendqisi2
+	add	r4, r4, r3
+	strh	r3, [r5, #2]	@ movhi
+.L2617:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r2, .L2642+36
+	movs	r0, #0
 	str	r3, [sp]
-	mov	r3, r1
-	mov	r1, r8
+	ldr	r3, .L2642+8
+	bl	ftl_prog_page
+	ldrh	r3, [r5, #2]
+	adds	r0, r0, #1
+	add	r3, r3, #1
+	strh	r3, [r5, #2]	@ movhi
+	ldr	r3, .L2642+40
+	beq	.L2618
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2619
+.L2618:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2610
+.L2612:
+	ldr	r3, [sp, #8]
+	mla	r4, fp, r3, r4
+	cmp	r0, #0
+	bne	.L2617
+	mov	r1, r4
+	bl	flash_erase_block
+	b	.L2617
+.L2619:
+	cmp	r10, #0
+	bne	.L2620
+.L2627:
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2641
+	mov	r2, #784
+	ldr	r1, .L2642+44
+	ldr	r0, .L2642+32
 	bl	printf
-.L2815:
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	b	.L2875
-.L2803:
-	ldr	r3, .L2879+20
-	movs	r1, #1
-	mov	r0, r5
-	ldr	r3, [r3]
-	ldr	r3, [r3, r7, lsl #2]
-	str	r3, [r5, #24]
-	bl	sblk_read_page
-	ldr	r3, [r5, #36]
-	adds	r1, r3, #1
-	beq	.L2804
-	cmp	r3, #512
-	bne	.L2808
-.L2804:
-	ldr	r3, .L2879+64
-	ldrh	r2, [r3]
-	movs	r3, #1
-	rsb	r0, r2, #21
-	lsls	r3, r3, r0
-	ldr	r0, [r5, #24]
-	subs	r3, r3, #1
-	lsrs	r0, r0, r2
-	ldr	r2, .L2879+68
-	ands	r0, r0, r3
-	ldrb	r1, [r2]	@ zero_extendqisi2
-	bl	__aeabi_uidiv
-	movs	r1, #0
-	uxth	r0, r0
-	bl	ftl_sblk_dump
-	ldr	r3, [r5, #36]
-	adds	r2, r3, #1
-	beq	.L2806
-	cmp	r3, #512
-	bne	.L2808
-.L2806:
-	ldr	r3, [r5, #12]
-	mov	r2, #-1
-	str	r2, [r3, #4]
-	ldr	r3, [r5, #36]
-	cmp	r3, r2
-	beq	.L2807
-	cmp	r3, #512
-	bne	.L2808
-.L2807:
-	movw	r2, #671
-	ldr	r1, .L2879+72
-	ldr	r0, .L2879+76
+.L2641:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2620:
+	ldrb	r4, [r5, #1]	@ zero_extendqisi2
+	ldr	r6, .L2642+28
+	ldr	r7, .L2642+44
+	adds	r4, r4, #1
+.L2623:
+	cmp	r4, #7
+	bhi	.L2627
+	ldr	r3, [r6]
+	add	r3, r3, r4
+	ldrb	r8, [r3, #40]	@ zero_extendqisi2
+	uxth	r3, r8
+	cmp	r3, #128
+	bls	.L2624
+	cmp	r3, #255
+	beq	.L2625
+	movw	r2, #777
+	mov	r1, r7
+	ldr	r0, .L2642+32
 	bl	printf
-.L2809:
-	b	.L2809
-.L2808:
-	ldr	r3, [r5, #12]
-	ldr	r2, .L2879+80
-	ldr	r1, [r3, #4]
-	ldr	r2, [r2]
-	cmp	r1, r2
-	itt	cs
-	movcs	r2, #-1
-	strcs	r2, [r3, #4]
-	ldr	r2, .L2879+12
-	ldr	r1, [r3, #4]
-	ldr	r2, [r2]
-	str	r1, [r2, r7, lsl #2]
-	ldr	r2, [r5, #24]
-	b	.L2874
-.L2811:
-	cmp	r3, #2
-	bne	.L2813
-	ldr	r3, .L2879+84
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2814
-	ldr	r1, [sp, #28]
-	add	r3, r8, fp
-	add	r3, r1, r3, lsl #1
-	ldr	r1, .L2879+48
-	ldrh	r3, [r3, #96]
-	ldrh	r1, [r1]
-	mla	r3, r1, r3, r10
-.L2876:
-	orr	r3, r3, #33554432
-	str	r3, [r2, #24]
-.L2813:
-	ldr	r2, .L2879+36
-	movs	r3, #48
-	mla	r3, r3, r5, r2
-	ldr	r2, [r3, #24]
-	ldrh	r1, [r3, #32]
-	ldr	r3, .L2879+52
-	ldr	r3, [r3]
-	str	r2, [r3, r1, lsl #2]
-	b	.L2812
-.L2814:
-	ldr	r3, [sp, #36]
-	ldr	r1, [sp, #28]
-	add	r3, fp, r3, lsr #1
-	add	r3, r1, r3, lsl #1
-	ldr	r1, .L2879+48
-	ldrh	r3, [r3, #96]
-	ldrh	r1, [r1]
-	mla	r3, r1, r3, r10
-	ldr	r1, [sp, #36]
-	and	r1, r1, #1
-	add	r3, r3, r1
-	b	.L2876
-.L2880:
+.L2624:
+	ldr	r3, .L2642+48
+	movs	r0, #0
+	ldrh	r1, [r3]
+	mul	r1, r8, r1
+	bl	flash_erase_block
+.L2625:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2623
+.L2615:
+	adds	r3, r3, #1
+	cmp	r3, #8
+	bne	.L2628
+	mov	r10, r3
+	b	.L2614
+.L2643:
 	.align	2
-.L2879:
-	.word	.LANCHOR65
-	.word	.LANCHOR59
-	.word	.LANCHOR68
-	.word	.LANCHOR107
-	.word	.LANCHOR69
-	.word	.LANCHOR108
-	.word	.LANCHOR45
-	.word	-178307901
-	.word	.LANCHOR60
-	.word	.LANCHOR36
-	.word	.LANCHOR64
-	.word	-1431655765
-	.word	.LANCHOR75
-	.word	.LANCHOR109
-	.word	.LANCHOR22
-	.word	.LC152
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR170
+.L2642:
+	.word	.LANCHOR123
+	.word	.LANCHOR179
+	.word	.LANCHOR178
+	.word	.LANCHOR102
+	.word	.LANCHOR14
+	.word	.LC143
+	.word	.LANCHOR85
+	.word	.LANCHOR27
 	.word	.LC0
-	.word	.LANCHOR47
-	.word	.LANCHOR74
-.L2817:
-	ldr	r3, .L2881
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, [sp, #48]
-	cbz	r1, .L2819
-	movs	r1, #0
-.L2822:
-	strb	r1, [r3, #44]
-	add	r0, sp, #48
-	add	r1, sp, #60
-	bl	sblk_xlc_prog_pages
-.L2823:
-	ldr	r3, [sp, #28]
-	ldr	r1, .L2881
-	ldrb	r2, [r3, #89]	@ zero_extendqisi2
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	uxth	r3, r2
-	cmp	r1, #0
-	beq	.L2825
-	add	r3, r3, r3, lsl #1
-.L2826:
-	ldr	r1, .L2881+4
-	ldr	r0, [r1]
-	ldr	r1, [r0, #52]
-	add	r1, r1, r3
-	str	r1, [r0, #52]
-	ldr	r1, .L2881+8
-	ldrh	r0, [r1, #310]
-	add	r3, r3, r0
-	uxth	r3, r3
-	strh	r3, [r1, #310]	@ movhi
-	ldr	r1, .L2881+12
-	ldrh	r1, [r1]
-	muls	r2, r1, r2
-	cmp	r3, r2
-	itttt	ge
-	ldrge	r3, .L2881+16
-	movge	r2, #0
-	ldrge	r3, [r3]
-	strhge	r2, [r3, #86]	@ movhi
-	bl	gc_write_completed
-	b	.L2776
-.L2819:
-	cmp	r6, #1
-	bne	.L2821
-	movs	r1, #9
-	b	.L2822
-.L2821:
-	cmp	r6, #2
-	it	eq
-	moveq	r1, #13
-	b	.L2822
-.L2824:
-	add	r4, sp, #72
-	add	r5, sp, #72
-	add	r4, r4, r1, lsl #2
-	add	r1, r5, r1, lsl #2
-	ldr	r1, [r1, #-20]
-	ldr	r4, [r4, #-24]
-	ldrb	r1, [r1, #1]	@ zero_extendqisi2
-	strb	r1, [r4]
-	b	.L2818
-.L2825:
-	ldr	r1, .L2881+20
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	cmp	r1, #0
-	beq	.L2826
-	lsls	r3, r3, #1
-	uxth	r3, r3
-	b	.L2826
-.L2882:
-	.align	2
-.L2881:
-	.word	.LANCHOR66
-	.word	.LANCHOR46
-	.word	.LANCHOR59
-	.word	.LANCHOR68
-	.word	.LANCHOR60
-	.word	.LANCHOR74
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.do_gc,"ax",%progbits
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR181
+	.word	.LANCHOR180
+	.word	.LANCHOR103
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",%progbits
 	.align	1
-	.global	do_gc
+	.global	ftl_info_blk_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	do_gc, %function
-do_gc:
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r1, .L3019
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r5, .L3019+4
-	mov	r10, r1
-	ldr	r3, [r1]
-	ldr	r7, .L3019+8
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldrh	r4, [r3, #116]
-	ldrh	r6, [r3, #114]
-	mov	r8, r7
-	ldr	fp, [r7]
-	add	r6, r6, r4
-	uxth	r6, r6
-	cmp	r2, #6
-	bhi	.L2883
-	tbh	[pc, r2, lsl #1]
-.L2886:
-	.2byte	(.L2885-.L2886)/2
-	.2byte	(.L2887-.L2886)/2
-	.2byte	(.L2888-.L2886)/2
-	.2byte	(.L2889-.L2886)/2
-	.2byte	(.L2890-.L2886)/2
-	.2byte	(.L2891-.L2886)/2
-	.2byte	(.L2892-.L2886)/2
-	.p2align 1
-.L2885:
-	ldrh	r2, [r3, #118]
-	ldrh	r1, [fp, #80]
-	ldr	r7, .L3019+12
-	add	r4, r4, r2
-	movw	r2, #65535
-	cmp	r1, r2
-	uxth	r4, r4
-	beq	.L2893
-	ldr	r3, .L3019+16
-	cmp	r4, #7
-	ite	hi
-	movhi	r8, #3
-	movls	r8, #1
-	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2895
-	ldrh	r3, [fp, #122]
-	movw	r1, #1348
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	ldr	r0, .L3019+20
-	str	r3, [sp, #12]
-	ldrh	r3, [fp, #120]
-	str	r3, [sp, #8]
-	ldrh	r3, [fp, #124]
-	str	r4, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
-	bl	printf
-.L2895:
-	movs	r2, #1
-	mov	r1, r8
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	bl	gc_search_src_blk
-	cmp	r0, #0
-	ble	.L2883
-.L2896:
-	movs	r3, #1
-.L3014:
-	strb	r3, [r5]
-	b	.L2883
-.L2893:
-	ldrh	r2, [r3, #122]
-	cmp	r0, #1
-	ldrh	r3, [r3, #124]
-	str	r3, [sp, #16]
-	bne	.L2897
-	str	r2, [sp, #20]
-	bl	gc_scan_static_data
-	bl	gc_static_wearleveling
-	ldr	r2, [sp, #20]
-.L2897:
-	ldr	r1, [r8]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L2672
+	mov	r1, r4
+	ldr	r2, .L2672+4
+	strb	r4, [r3]
 	movs	r3, #1
-	strb	r3, [r7]
-	ldrh	fp, [r1, #124]
-	cmp	fp, #0
-	beq	.L2898
-	strb	r3, [r5]
-	movs	r2, #0
-	ldr	r3, .L3019+16
-	strb	r2, [r7]
-	ldr	r3, [r3]
-	lsls	r0, r3, #23
-	bpl	.L2883
-	ldrh	r3, [r1, #122]
-	ldr	r0, .L3019+20
+	ldr	r0, .L2672+8
+	strb	r3, [r2]
+	ldr	r2, .L2672+12
+	ldr	r5, .L2672+16
+	ldr	r6, .L2672+20
+	strb	r3, [r2]
+	mov	r2, #16384
+	ldr	r3, .L2672+24
+	str	r0, [r3]
+	ldr	r3, .L2672+28
+	ldrh	r3, [r3]
+	add	r3, r0, r3, lsl #2
+	str	r3, [r5]
+	bl	ftl_memset
+	mov	r2, #16384
+	mov	r1, r4
+	ldr	r0, .L2672+32
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, .L2672+36
+	ldrb	r2, [r2, #40]	@ zero_extendqisi2
+	strb	r4, [r3, #1]
+	strh	r4, [r3, #2]	@ movhi
+	movs	r4, #7
+	strb	r2, [r3]
 	str	r3, [sp, #12]
-	ldrh	r3, [r1, #120]
-	movw	r1, #1373
-	stm	sp, {r4, fp}
-	str	r3, [sp, #8]
-	mov	r3, r6
+.L2646:
+	ldr	r3, [r6]
+	sxth	r8, r4
+	add	r3, r3, r4
+	ldrb	r7, [r3, #40]	@ zero_extendqisi2
+	cmp	r7, #255
+	bne	.L2645
+.L2650:
+	adds	r4, r4, #-1
+	bcs	.L2646
+	mov	r8, #0
+.L2647:
+	ldr	r3, .L2672+40
+	ldr	r2, [r3]
+	mov	r10, r3
+	tst	r2, #4096
+	beq	.L2651
+	ldr	r3, [r5]
+	mov	r2, #4800
+	mov	r1, r4
+	ldr	r0, .L2672+44
+	ldr	r3, [r3]
 	bl	printf
-.L2883:
-	add	sp, sp, #24
+.L2651:
+	adds	r2, r4, #1
+	bne	.L2652
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L2672+8
+	bl	ftl_memset
+	ldr	r3, [r5]
+	ldr	r2, .L2672+48
+	str	r2, [r3]
+	ldr	r2, .L2672+52
+	str	r2, [r3, #12]
+.L2644:
+	mov	r0, r4
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2898:
-	cmp	r6, #47
-	bhi	.L2900
-	cmp	r4, #1
-	bls	.L2901
-	cmp	r4, #16
-	bhi	.L2902
-	ldr	r2, [r10]
-	ldrh	r2, [r2, #120]
-	cmp	r2, #127
-	bhi	.L2903
-.L2902:
-	movs	r2, #16
-	movs	r1, #3
-.L3018:
-	movs	r0, #1
-.L3012:
-	bl	gc_search_src_blk
-	uxth	r0, r0
-.L2904:
-	cmp	r0, #0
-	bne	.L2896
-	b	.L2883
-.L2903:
-	movs	r2, #8
-	movs	r1, #2
-	b	.L3018
-.L2901:
-	ldr	r3, .L3019+16
-	strb	fp, [r7]
+.L2645:
+	ldr	r3, .L2672+56
+	movs	r0, #0
+	ldr	fp, .L2672+68
+	ldr	r2, .L2672+8
+	ldrh	r3, [r3]
+	muls	r7, r3, r7
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r1, r7
+	ldr	r3, .L2672+60
+	bl	ftl_read_page
+	cmp	r0, #-1
+	mov	r10, r0
+	bne	.L2648
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	adds	r1, r7, #1
+	ldr	r2, .L2672+8
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L2672+60
+	bl	ftl_read_page
+	mov	r10, r0
+.L2648:
+	ldr	r3, .L2672+40
 	ldr	r3, [r3]
-	lsls	r3, r3, #23
-	bpl	.L2905
-	ldrh	r3, [r1, #122]
-	mov	r2, fp
-	ldr	r0, .L3019+20
-	str	r3, [sp, #12]
-	ldrh	r3, [r1, #120]
-	movw	r1, #1386
-	stm	sp, {r4, fp}
-	str	r3, [sp, #8]
-	mov	r3, r6
-	bl	printf
-.L2905:
-	cmp	r6, #16
-	bls	.L2906
-	movs	r2, #1
-.L3017:
-	movs	r1, #2
-.L3011:
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	b	.L3012
-.L2906:
-	movs	r2, #16
-.L2920:
-	movs	r1, #1
-	b	.L3011
-.L2900:
-	ldr	r1, [sp, #16]
-	cmp	r6, #127
-	add	r2, r2, r1
-	uxth	r2, r2
-	str	r2, [sp, #16]
-	bhi	.L2907
-	subs	r2, r4, #2
-	cmp	r2, #13
-	bhi	.L2908
-	movs	r2, #8
-	movs	r1, #2
-	mov	r0, r3
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #0
-	bne	.L2896
-.L2911:
-	ldr	r3, .L3019+24
-	ldr	fp, .L3019+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #2
-	ldr	r3, .L3019+16
-	bne	.L3009
-	cmp	r4, #1
-	mov	r2, #0
-	strh	r2, [fp, #30]	@ movhi
-	bls	.L2912
-.L2915:
+	lsls	r1, r3, #19
+	bpl	.L2649
+	ldr	r3, [r5]
+	mov	r2, r10
+	mov	r1, r4
+	ldr	r0, .L2672+64
 	ldr	r3, [r3]
-	movs	r2, #1
-	strb	r2, [r7]
-	lsls	r0, r3, #23
-	bpl	.L2914
-	ldr	r3, [r8]
-	ldr	r0, .L3019+20
-	ldrh	r1, [r3, #122]
-	str	r1, [sp, #12]
-	ldrh	r1, [r3, #120]
-	str	r1, [sp, #8]
-	movw	r1, #1411
-	ldrh	r3, [r3, #124]
-	str	r4, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
+	str	r3, [sp]
+	mov	r3, #672
 	bl	printf
-.L2914:
-	ldrh	r3, [fp, #30]
-	movs	r2, #16
-	movs	r1, #1
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	strh	r3, [fp, #30]	@ movhi
-	movs	r3, #0
-	strh	r3, [fp, #28]	@ movhi
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #7
-	bhi	.L2916
-	cmp	r4, #31
-	bls	.L2917
-.L2916:
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #120]
-	ldr	r3, .L3019+28
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bls	.L2904
-.L2917:
-	ldr	r3, [sp, #16]
-	cmp	r3, #63
-	bhi	.L2918
-	movs	r2, #8
-	b	.L3017
-.L2908:
-	ldr	r3, .L3019+32
-	ldr	r2, [sp, #16]
+.L2649:
+	cmp	r10, #-1
+	beq	.L2650
+	ldr	r3, [r5]
+	ldr	r2, .L2672+48
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L2650
+	mov	r4, r8
+	b	.L2647
+.L2652:
+	ldr	r3, [r6]
+	movs	r0, #0
+	ldr	r2, .L2672+8
+	movs	r4, #0
+	add	r3, r3, r8
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	strb	r8, [r3, #1]
+	strb	r1, [r3]
+	movs	r3, #4
+	str	r3, [sp]
+	ldr	r3, .L2672+60
+	bl	flash_get_last_written_page
+	uxth	r6, r0
+	mov	r7, r0
+	adds	r3, r6, #1
+	uxth	r8, r3
+	ldr	r3, [sp, #12]
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2672+56
 	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #1
-	bcs	.L2911
-	b	.L2883
-.L3009:
-	cmp	r4, #1
-	bls	.L2912
-	ldrh	r2, [fp, #30]
-	cmp	r2, #3
-	bls	.L2915
-.L2912:
+	mul	fp, r3, fp
+.L2654:
+	subs	r3, r6, r4
+	lsls	r3, r3, #16
+	bmi	.L2658
+	ldr	r3, .L2672+68
+	add	r1, r7, fp
+	ldr	r2, .L2672+8
+	subs	r1, r1, r4
+	movs	r0, #0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L2672+60
+	bl	ftl_read_page
+	adds	r0, r0, #1
+	beq	.L2655
+	ldr	r3, [r5]
+	ldr	r2, .L2672+48
 	ldr	r3, [r3]
-	movs	r2, #0
-	strh	r2, [fp, #30]	@ movhi
-	strb	r2, [r7]
-	lsls	r1, r3, #23
-	bpl	.L2919
-	ldr	r3, [r8]
-	ldr	r0, .L3019+20
-	ldrh	r1, [r3, #122]
-	str	r1, [sp, #12]
-	ldrh	r1, [r3, #120]
-	str	r1, [sp, #8]
-	movw	r1, #1426
-	ldrh	r3, [r3, #124]
-	str	r4, [sp]
-	str	r3, [sp, #4]
-	mov	r3, r6
+	cmp	r3, r2
+	bne	.L2655
+.L2658:
+	ldr	r3, [sp, #12]
+	strh	r8, [r3, #2]	@ movhi
+	bl	ftl_tmp_into_update
+	ldr	r2, [r5]
+	movs	r0, #0
+	ldr	r3, [r2, #64]
+	adds	r3, r3, #1
+	str	r3, [r2, #64]
+	bl	ftl_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	ldr	r4, [r10]
+	ands	r4, r4, #16384
+	beq	.L2644
+	ldr	r3, [r5]
+	movs	r4, #0
+	ldr	r0, .L2672+72
+	ldr	r1, [r3, #156]
 	bl	printf
-.L2919:
-	ldr	r3, .L3019+32
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #1
-	bls	.L2883
-	cmp	r4, #31
-	mov	r2, #16
-	bhi	.L2920
-	b	.L3013
-.L2918:
-	movs	r2, #16
-.L3013:
-	movs	r1, #3
-	b	.L3011
-.L2907:
-	cmp	r6, #255
-	bhi	.L2921
-	ldr	r2, .L3019+32
-	ldr	r1, [sp, #16]
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bls	.L2921
-	cmp	r1, r2, lsr #1
-	bcc	.L2883
-	movs	r2, #16
-	mov	r1, r3
-	mov	r0, fp
-	strb	fp, [r7]
-	str	r3, [sp, #16]
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #7
-	bhi	.L2896
-	cmp	r4, #4
-	bls	.L2904
-	ldr	r0, [r8]
-	movs	r2, #128
-	movs	r1, #255
-	strh	fp, [r0, #120]	@ movhi
-	adds	r0, r0, #136
-	bl	ftl_memset
-	ldr	r3, [sp, #16]
-	strb	r3, [r7]
-	ldr	r3, [r10]
-	ldrh	r2, [r3, #120]
-	ldr	r3, .L3019+28
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bls	.L2923
-	cmp	r4, #16
-	bls	.L2924
-.L2926:
-	movs	r2, #8
-	movs	r1, #2
-.L3010:
-	movs	r0, #1
-	bl	gc_search_src_blk
-	movs	r3, #1
-	uxth	r0, r0
-	strb	r3, [r5]
-	b	.L2904
-.L3020:
+	b	.L2644
+.L2655:
+	adds	r4, r4, #1
+	b	.L2654
+.L2673:
 	.align	2
-.L3019:
-	.word	.LANCHOR46
-	.word	.LANCHOR104
-	.word	.LANCHOR60
-	.word	.LANCHOR67
-	.word	.LANCHOR22
-	.word	.LC153
-	.word	.LANCHOR64
-	.word	.LANCHOR163
-	.word	.LANCHOR165
-	.word	.LANCHOR59
-.L2923:
-	cmp	r4, #32
-	bls	.L2924
-	movs	r2, #16
-	movs	r1, #1
-	b	.L3010
-.L2924:
-	cmp	r4, #7
-	bls	.L2926
-	movs	r2, #16
-	movs	r1, #3
-	b	.L3010
-.L2921:
-	subs	r4, r4, #2
-	cmp	r4, #5
-	bhi	.L2883
-	ldr	r3, .L3021
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r3]
-	cmp	r2, r3, lsr #1
-	bls	.L2883
-	movs	r2, #16
-	movs	r1, #2
-	movs	r0, #1
-	bl	gc_search_src_blk
-	uxth	r0, r0
-	cmp	r0, #15
-	bhi	.L2896
-	ldrb	r0, [r7]	@ zero_extendqisi2
-	movs	r1, #0
-	ldr	r3, [r8]
-	add	r2, r0, #60
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r2, #128
-	mla	r0, r2, r0, r3
-	movs	r1, #255
-	adds	r0, r0, #136
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	ftl_memset
-.L2887:
-	ldr	r4, .L3021+4
-	movw	r3, #65535
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	bne	.L2928
-	bl	gc_get_src_blk
-	strh	r0, [r4]	@ movhi
-.L2928:
-	ldrh	r3, [r4]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L2929
-	ldrh	r1, [r4, #52]
-	cbz	r1, .L2930
-	ldr	r0, .L3021+8
+.L2672:
+	.word	.LANCHOR182
+	.word	.LANCHOR181
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR183
+	.word	.LANCHOR102
+	.word	.LANCHOR27
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR179
+	.word	.LANCHOR14
+	.word	.LC145
+	.word	1229739078
+	.word	393238
+	.word	.LANCHOR103
+	.word	.LANCHOR178
+	.word	.LC144
+	.word	.LANCHOR123
+	.word	.LC146
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2690
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r3, [r3]
+	ldr	r2, [r3, #520]
+	cbz	r2, .L2675
 	movs	r2, #0
-.L2931:
-	uxth	r4, r2
-	cmp	r1, r4
-	bhi	.L2932
-.L2930:
-	ldr	r2, .L3021+12
-	ldr	r2, [r2]
-	add	r2, r2, r3, lsl #2
-	ldrb	r2, [r2, #2]	@ zero_extendqisi2
-	and	r1, r2, #224
-	cmp	r1, #224
-	beq	.L2933
-	tst	r2, #192
-	bne	.L2934
-.L2933:
-	ldr	r2, .L3021+16
-	ldr	r2, [r2]
-	ldrh	r3, [r2, r3, lsl #1]
-	cbz	r3, .L2935
-	movw	r2, #1497
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2936:
-	b	.L2936
-.L2932:
-	ldrh	r4, [r0, #2]!
+	str	r2, [r3, #520]
+.L2675:
+	ldr	r5, .L2690+4
+	movs	r0, #0
+	bl	ftl_total_vpn_update
+	mov	r4, r5
+.L2679:
+	ldr	r3, [r5]
+	ldr	r2, [r3, #56]
 	adds	r2, r2, #1
-	cmp	r4, r3
-	bne	.L2931
-.L2935:
-	ldr	r3, .L3021+4
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-	b	.L2883
-.L2934:
-	movs	r3, #2
-	b	.L3014
-.L2929:
-	movs	r3, #0
-	b	.L3014
-.L2888:
-	bl	gc_scan_src_blk
-	adds	r0, r0, #1
-	bne	.L2937
-	movs	r3, #3
-	b	.L3014
-.L2937:
-	ldr	r4, .L3021+4
-	movw	r3, #65535
-	ldrh	r0, [r4]
-	cmp	r0, r3
-	beq	.L2896
-	ldrh	r3, [r4, #20]
-	cbz	r3, .L2938
-	movs	r3, #4
-	strb	r3, [r5]
-	movs	r3, #0
-	strh	r3, [r4, #22]	@ movhi
-	b	.L2883
-.L2938:
-	ldr	r6, .L3021+16
-	movs	r3, #1
-	strb	r3, [r5]
-	ldr	r3, [r6]
-	ldrh	r5, [r3, r0, lsl #1]
-	cbz	r5, .L2939
-	movw	r2, #1525
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2940:
-	b	.L2940
-.L2939:
-	bl	ftl_free_sblk
-	ldr	r3, [r6]
-	ldrh	r2, [r4]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4, #26]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #8
-	strh	r3, [r4, #26]	@ movhi
-	bls	.L2935
-	strh	r5, [r4, #26]	@ movhi
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	mov	r0, r5
-	bl	ftl_info_flush
-	b	.L2935
-.L2889:
-	bl	gc_scan_src_blk_one_page
-	ldr	r4, .L3021+4
-	ldr	r3, .L3021+28
-	ldrh	r2, [r4, #2]
+	str	r2, [r3, #56]
+	ldrh	r2, [r3, #140]
+	ldr	r3, .L2690+8
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2883
-	ldrh	r3, [r4, #20]
-	ldr	r2, .L3021+32
-	cbz	r3, .L2941
-	ldr	r2, [r2]
-	movs	r1, #4
-	strb	r1, [r5]
-	movs	r1, #0
-	strh	r1, [r4, #22]	@ movhi
-	tst	r2, #256
-	ldr	r5, .L3021+16
-	beq	.L2942
-	ldrh	r1, [r4]
-	ldr	r2, [r5]
-	ldr	r0, .L3021+36
-	ldrh	r2, [r2, r1, lsl #1]
-	bl	printf
-.L2942:
-	ldr	r3, [r5]
-	ldrh	r2, [r4]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldrh	r3, [r4, #20]
+	bcc	.L2677
+	bl	ftl_ext_alloc_new_blk
+.L2677:
+	ldr	r3, [r4]
+	ldrh	r2, [r3, #130]
+	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2883
-	movw	r2, #1555
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
+	bne	.L2678
+	movw	r2, #1819
+	ldr	r1, .L2690+12
+	ldr	r0, .L2690+16
 	bl	printf
-.L2943:
-	b	.L2943
-.L2941:
-	ldr	r3, .L3021+12
-	ldrh	r1, [r4]
-	ldr	r6, [r3]
+.L2678:
+	ldr	r1, [r4]
+	ldr	r3, .L2690+20
+	ldr	r10, .L2690+36
+	ldrh	r0, [r1, #130]
+	ldrh	r3, [r3]
+	ldr	r8, .L2690+40
+	rsb	r2, r3, #21
 	movs	r3, #1
-	strb	r3, [r5]
-	ldr	r3, [r2]
-	add	r6, r6, r1, lsl #2
-	lsls	r2, r3, #23
-	bpl	.L2944
-	ldrb	r2, [r6, #2]	@ zero_extendqisi2
-	ldr	r0, .L3021+40
-	lsrs	r2, r2, #5
-	bl	printf
-.L2944:
-	ldrb	r3, [r6, #2]	@ zero_extendqisi2
-	and	r2, r3, #224
-	cmp	r2, #224
-	beq	.L2945
-	tst	r3, #192
-	bne	.L2946
-.L2945:
-	movw	r2, #1565
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2947:
-	b	.L2947
-.L2946:
-	ldrh	r0, [r4]
-	bl	ftl_free_sblk
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	ldrh	r3, [r4, #26]
+	asr	r6, r0, r2
+	lsls	r3, r3, r2
+	ldr	r2, .L2690+24
+	subs	r3, r3, #1
+	ands	r3, r3, r0
+	mov	r0, r8
+	ldrh	r7, [r2]
+	ldrh	r2, [r1, #140]
+	movs	r1, #0
+	smlabb	r3, r7, r3, r2
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	uxth	r7, r3
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	movs	r3, #0
+	ldr	r2, .L2690+28
+	str	r3, [r8]
+	mov	r1, r7
+	ldr	r3, [r4]
+	uxtb	r0, r6
+	ldr	r3, [r3, #56]
+	str	r3, [r8, #4]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r8
+	bl	ftl_prog_page
+	ldr	r2, [r4]
+	ldrh	r3, [r2, #140]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	cmp	r3, #8
-	strh	r3, [r4, #26]	@ movhi
-	bls	.L2883
-	movs	r3, #0
-	strh	r3, [r4, #26]	@ movhi
-.L3016:
-	add	sp, sp, #24
+	cmp	r3, #1
+	strh	r3, [r2, #140]	@ movhi
+	beq	.L2679
+	adds	r0, r0, #1
+	ldr	r3, .L2690+32
+	beq	.L2680
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cbz	r0, .L2681
+.L2680:
+.L2676:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2679
+.L2681:
+	add	sp, sp, #12
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	flt_sys_flush
-.L2890:
-	ldrh	r7, [fp, #80]
-	movw	r3, #65535
-	cmp	r7, r3
-	bne	.L2948
-	ldr	r3, .L3021+44
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	cmp	r4, #1
-	bne	.L2948
-	bl	ftl_flush
-	movs	r0, #5
-	bl	ftl_alloc_sblk
-	cmp	r0, r7
-	mov	r5, r0
-	bne	.L2949
-	movw	r2, #1581
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
-	bl	printf
-.L2950:
-	b	.L2950
-.L2949:
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2691:
+	.align	2
+.L2690:
+	.word	.LANCHOR10
+	.word	.LANCHOR102
+	.word	.LANCHOR85
+	.word	.LANCHOR184
+	.word	.LC0
+	.word	.LANCHOR66
+	.word	.LANCHOR103
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR183
+	.word	.LANCHOR123
+	.word	.LANCHOR178
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #0
+	ldr	r3, .L2709
+	ldr	r5, .L2709+4
+	strh	r2, [r3]	@ movhi
+	ldr	r3, [r5]
+	ldrh	r2, [r3, #130]
+	ldr	r3, .L2709+8
+	ldrh	r4, [r3]
+	rsb	r3, r4, #21
+	movs	r4, #1
+	asr	r6, r2, r3
+	lsls	r4, r4, r3
+	uxtb	r10, r6
+	subs	r4, r4, #1
+	ands	r4, r4, r2
+	ldr	r2, .L2709+12
+	movs	r3, #4
 	mov	r1, r4
-	movs	r4, #0
+	str	r3, [sp]
+	mov	r0, r10
+	ldr	r3, .L2709+16
+	bl	flash_get_last_written_page
+	ldr	r3, .L2709+20
+	mov	r7, r0
+	ldr	r3, [r3]
+	lsls	r1, r3, #19
+	bpl	.L2693
+	ldr	r3, [r5]
+	uxth	r6, r6
+	movw	r2, #1863
+	ldr	r1, .L2709+24
+	ldrh	r3, [r3, #130]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L2709+28
+	bl	printf
+.L2693:
+	ldr	fp, .L2709+48
+	mov	r8, #0
+.L2694:
+	uxth	r6, r7
+	sub	r3, r6, r8
+	lsls	r3, r3, #16
+	bmi	.L2699
+	ldr	r3, .L2709+32
+	sub	r1, r7, r8
+	ldr	r2, .L2709+12
+	ldrh	r0, [r3]
+	ldr	r3, .L2709+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mla	r1, r4, r0, r1
+	mov	r0, r10
+	str	r3, [sp]
+	ldr	r3, .L2709+16
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	beq	.L2695
+	cmp	r0, #512
+	beq	.L2695
+	ldr	r3, .L2709+40
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	cmp	r3, fp
+	bne	.L2695
+.L2699:
+	bl	zftl_sblk_list_init
+	ldr	r3, [r5]
+	ldrh	r2, [r3, #140]
+	cmp	r2, r7
+	bgt	.L2697
+	adds	r6, r6, #1
+	strh	r6, [r3, #140]	@ movhi
+	bl	ftl_ext_info_flush
+.L2697:
+	ldr	r3, .L2709+40
+	movw	r2, #65535
+	movs	r0, #0
+	ldr	r3, [r3]
+	strh	r2, [r3, #584]	@ movhi
+	strh	r2, [r3, #586]	@ movhi
+	strh	r2, [r3, #588]	@ movhi
+	strh	r2, [r3, #590]	@ movhi
+	str	r2, [r3, #560]
+	mov	r2, #-1
+	str	r0, [r3, #520]
+	str	r0, [r3, #604]
+	str	r0, [r3, #608]
+	str	r2, [r3, #564]
+	ldr	r3, .L2709+44
+	strh	r2, [r3]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2695:
+	add	r8, r8, #1
+	b	.L2694
+.L2710:
+	.align	2
+.L2709:
+	.word	.LANCHOR113
+	.word	.LANCHOR102
+	.word	.LANCHOR66
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR178
+	.word	.LANCHOR14
+	.word	.LANCHOR185
+	.word	.LC147
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LANCHOR10
+	.word	.LANCHOR64
+	.word	1162432070
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format_data_init,"ax",%progbits
+	.align	1
+	.global	ftl_low_format_data_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r5, .L2713
+	ldr	r0, .L2713+4
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r6, r0
 	bl	ftl_erase_sblk
-	movs	r3, #5
-	add	r1, fp, #96
-	strb	r3, [fp, #84]
-	mov	r0, r5
+	ldr	r1, [r5]
+	mov	r0, r6
+	add	r1, r1, #672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	r3, .L3021+28
-	uxtb	r0, r0
-	ldr	r6, .L3021+48
+	ldr	r3, [r5]
+	movs	r2, #0
+	ldrh	r7, [r3, #672]
+	strh	r2, [r3, #690]	@ movhi
+	movw	r2, #65533
+	subs	r3, r7, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L2712
+	movw	r2, #2053
+	ldr	r1, .L2713+8
+	ldr	r0, .L2713+12
+	bl	printf
+.L2712:
+	ldr	r0, [r5]
+	movs	r4, #0
+	mov	r2, #256
 	movs	r1, #255
-	strb	r0, [fp, #89]
-	ldrh	r3, [r3]
-	strh	r5, [fp, #80]	@ movhi
-	strh	r4, [fp, #82]	@ movhi
-	strb	r4, [fp, #85]
-	smulbb	r0, r3, r0
-	strh	r4, [fp, #90]	@ movhi
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	strh	r0, [fp, #86]	@ movhi
-	ldr	fp, .L3021+64
-	ldrh	r3, [fp]
-	muls	r2, r3, r2
-	ldr	r3, .L3021+52
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
+	strh	r4, [r0, #696]	@ movhi
+	add	r0, r0, #416
 	bl	ftl_memset
-	ldrh	r3, [fp]
+	ldr	r0, [r5]
+	mov	r1, r4
+	mov	r2, #4096
+	add	r0, r0, #704
+	bl	ftl_memset
+	ldr	r2, .L2713+16
+	ldr	r3, [r5]
+	ldrh	r2, [r2]
+	strh	r7, [r3, #692]	@ movhi
+	strh	r6, [r3, #416]	@ movhi
+	rsb	r2, r2, #21
+	asr	r2, r7, r2
+	ldr	r7, .L2713+20
+	strh	r2, [r3, #694]	@ movhi
+	movs	r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	ldr	r2, .L2713+24
+	ldrh	r2, [r2]
+	strh	r2, [r3, #698]	@ movhi
+	ldr	r2, .L2713+28
+	ldr	r3, [r7]
+	str	r2, [r3]
+	bl	ftl_alloc_sys_blk
+	mov	r1, r4
+	mov	r6, r0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	movs	r1, #2
+	ldr	r0, [r7]
+	strh	r6, [r3, #130]	@ movhi
+	movw	r6, #65535
+	strh	r4, [r3, #140]	@ movhi
+	adds	r0, r0, #16
+	strh	r6, [r0, #568]	@ movhi
+	strh	r6, [r0, #570]	@ movhi
+	strh	r6, [r0, #572]	@ movhi
+	strh	r6, [r0, #574]	@ movhi
+	bl	ftl_open_sblk_init
+	ldr	r0, [r7]
+	movs	r1, #3
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [r5]
 	movs	r1, #255
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L3021+56
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
+	ldr	r0, [r7]
+	ldrh	r2, [r3, #134]
+	adds	r0, r0, #136
+	strh	r4, [r0, #-12]	@ movhi
+	strh	r4, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	mov	r2, #-1
+	strh	r4, [r0, #-14]	@ movhi
+	strh	r6, [r0, #-56]	@ movhi
+	strh	r6, [r0, #-6]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	str	r4, [r0, #384]
+	str	r4, [r0, #388]
+	str	r4, [r0, #392]
 	bl	ftl_memset
-	ldrh	r3, [fp]
+	ldr	r0, [r7]
+	movs	r2, #128
 	movs	r1, #255
-	ldrb	r2, [r6]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldr	r3, .L3021+60
-	ldr	r0, [r3]
+	add	r0, r0, #392
 	bl	ftl_memset
-	ldr	r3, [r8]
-	strh	r7, [r3, #128]	@ movhi
-	strh	r7, [r3, #130]	@ movhi
-	str	r5, [r3, #132]
-	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	r3, [r10]
-	mov	r2, #-1
 	mov	r0, r4
-	strh	r5, [r3, #126]	@ movhi
-	ldr	r3, .L3021+4
-	strh	r4, [r3, #310]	@ movhi
-	strh	r4, [r3, #52]	@ movhi
-	strh	r4, [r3, #312]	@ movhi
-	strh	r4, [r3, #314]	@ movhi
-	str	r2, [r3, #316]
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	ftl_info_flush
-.L3022:
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2714:
 	.align	2
-.L3021:
-	.word	.LANCHOR165
-	.word	.LANCHOR59
-	.word	.LANCHOR59+52
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LANCHOR172
+.L2713:
+	.word	.LANCHOR102
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR186
 	.word	.LC0
-	.word	.LANCHOR79
-	.word	.LANCHOR22
-	.word	.LC154
-	.word	.LC155
-	.word	.LANCHOR67
-	.word	.LANCHOR69
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR65
-	.word	.LANCHOR68
-.L2948:
-	cmp	r6, #31
-	bls	.L2968
-	cmp	r6, #63
-	bls	.L2969
-	cmp	r6, #127
-	bls	.L2970
-	cmp	r6, #255
-	ite	hi
-	movhi	r6, #1
-	movls	r6, #2
-.L2951:
-	ldr	r7, .L3023
-	ldr	r4, .L3023+4
-.L2952:
-	subs	r6, r6, #1
-	uxtb	r6, r6
-	cmp	r6, #255
-	beq	.L2883
-	bl	gc_do_copy_back
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbnz	r3, .L2953
-	ldr	r3, .L3023+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #3
-	bhi	.L2954
-	bl	ftl_write_commit
-.L2954:
-	ldrh	r2, [r4, #22]
-	ldrh	r3, [r4, #20]
-	cmp	r2, r3
-	bcc	.L2952
-	movs	r3, #1
-	strb	r3, [r5]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldr	r3, .L3023+12
-	ldrh	r0, [r4]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2956
-	movw	r2, #1638
-	ldr	r1, .L3023+16
-	ldr	r0, .L3023+20
-	bl	printf
-.L2957:
-	b	.L2957
-.L2968:
-	movs	r6, #9
-	b	.L2951
-.L2969:
-	movs	r6, #5
-	b	.L2951
-.L2970:
-	movs	r6, #3
-	b	.L2951
-.L2956:
-	bl	ftl_free_sblk
-.L3015:
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	b	.L2883
-.L2953:
-	ldrh	r3, [r4, #314]
-	cbz	r3, .L2958
-	ldr	r0, [r4, #316]
-	movs	r6, #0
-	strh	r6, [r4, #314]	@ movhi
-	adds	r3, r0, #1
-	beq	.L2959
-	bl	ftl_mask_bad_block
-.L2959:
-	ldr	r3, [r8]
-	str	r6, [r4, #316]
-	strh	r6, [r4, #52]	@ movhi
-	ldrh	r0, [r3, #80]
-	bl	ftl_free_sblk
-	ldr	r0, [r4, #8]
-	movw	r3, #65535
-	ldr	r2, [r8]
-	ldr	r1, [r10]
-	strh	r3, [r2, #80]	@ movhi
-	strh	r3, [r1, #126]	@ movhi
-	strh	r3, [r2, #130]	@ movhi
-	cbz	r0, .L2960
-	bl	buf_free
-.L2960:
-	movs	r6, #0
-	str	r6, [r4, #8]
-	bl	flt_sys_flush
-	movw	r2, #1671
-	ldr	r1, .L3023+16
-	ldr	r0, .L3023+20
-	strb	r6, [r5]
-	bl	printf
-.L2961:
-	b	.L2961
-.L2958:
-	ldrh	r3, [fp, #86]
-	ldrh	r2, [r4, #22]
-	cmp	r3, #1
-	ldrh	r3, [r4, #20]
-	bls	.L2962
-	cmp	r2, r3
-	bcc	.L2952
-	movs	r3, #1
-	strb	r3, [r5]
-	ldrh	r3, [r4, #52]
-	adds	r2, r3, #1
-	strh	r2, [r4, #52]	@ movhi
-	add	r3, r4, r3, lsl #1
-	ldrh	r2, [r4]
-	strh	r2, [r3, #54]	@ movhi
-	b	.L3015
-.L2962:
-	cmp	r2, r3
-	mov	r1, #5
-	strb	r1, [r5]
-	bcc	.L2963
-	ldrh	r3, [r4, #52]
-	adds	r2, r3, #1
-	strh	r2, [r4, #52]	@ movhi
-	add	r3, r4, r3, lsl #1
-	ldrh	r2, [r4]
-	strh	r2, [r3, #54]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-.L2963:
-	bl	ftl_flush
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
-	ldr	r3, [r8]
-	ldrh	r2, [fp, #80]
-	strh	r2, [r3, #128]	@ movhi
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	movs	r3, #0
-	ldr	r2, .L3023+24
-	strh	r3, [r4, #12]	@ movhi
-	ldr	r3, .L3023+28
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, #2
-	strh	r2, [r4, #16]	@ movhi
-	strh	r3, [r4, #14]	@ movhi
-	itttt	eq
-	lsleq	r3, r3, #1
-	strheq	r3, [r4, #14]	@ movhi
-	moveq	r3, #1
-	strheq	r3, [r4, #16]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #18]	@ movhi
-	b	.L2883
-.L2891:
-	bl	gc_check_data_one_wl
-	ldr	r4, .L3023+4
-	mov	r6, r0
-	cbz	r0, .L2966
-	ldr	r3, [r7]
-	movs	r6, #0
-	strh	r6, [r4, #52]	@ movhi
-	ldrh	r0, [r3, #80]
-	bl	ftl_free_sblk
-	ldr	r2, [r7]
-	movw	r3, #65535
-	ldr	r1, [r10]
-	ldr	r0, [r4, #8]
-	strh	r3, [r2, #80]	@ movhi
-	strh	r3, [r1, #126]	@ movhi
-	strh	r3, [r2, #130]	@ movhi
-	bl	buf_free
-	str	r6, [r4, #8]
-	strb	r6, [r5]
-	b	.L3016
-.L2966:
-	ldrh	r2, [r4, #12]
-	ldrh	r3, [r4, #14]
-	cmp	r2, r3
-	bcc	.L2883
-	movs	r3, #6
-	ldr	r0, [r4, #8]
-	strb	r3, [r5]
-	bl	buf_free
-	str	r6, [r4, #8]
-	b	.L2883
-.L2892:
-	movw	r4, #65535
-	bl	gc_update_l2p_map_new
-	bl	gc_free_src_blk
-	bl	ftl_flush
-	bl	pm_flush
-	strh	r4, [fp, #80]	@ movhi
-	bl	ftl_ext_info_flush
-	ldr	r3, [r10]
-	movs	r0, #0
-	strh	r4, [r3, #126]	@ movhi
-	bl	ftl_info_flush
-	movs	r3, #0
-	strb	r3, [r5]
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	print_ftl_debug_info
-.L3024:
-	.align	2
-.L3023:
-	.word	.LANCHOR67
-	.word	.LANCHOR59
-	.word	.LANCHOR38
-	.word	.LANCHOR56
-	.word	.LANCHOR172
-	.word	.LC0
-	.word	.LANCHOR64
-	.word	.LANCHOR79
-	.size	do_gc, .-do_gc
-	.section	.text.ftl_write,"ax",%progbits
+	.word	.LANCHOR66
+	.word	.LANCHOR10
+	.word	.LANCHOR187
+	.word	1162432070
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
+	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
-	.global	ftl_write
+	.global	ftl_low_format
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write, %function
-ftl_write:
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_low_format, %function
+ftl_low_format:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	mov	r10, r3
-	cbnz	r0, .L3026
-	mov	r0, #24576
-	ldr	r3, .L3039
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #8
+	ldr	r6, .L2752
+	sub	sp, sp, #40
+	movs	r1, #0
+	ldr	r0, .L2752+4
+	bl	printf
+.L2718:
+	ldr	r3, [r6]
+	add	r3, r3, r4
+	ldrb	r5, [r3, #32]	@ zero_extendqisi2
+	cmp	r5, #128
+	ble	.L2716
+	cmp	r5, #255
+	beq	.L2717
+	movw	r2, #2107
+	ldr	r1, .L2752+8
+	ldr	r0, .L2752+12
+	bl	printf
+.L2716:
+	ldr	r3, .L2752+16
+	movs	r0, #0
+	ldrh	r1, [r3]
+	muls	r1, r5, r1
+	bl	flash_erase_block
+.L2717:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L2718
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L2752+20
+	bl	ftl_memset
+	ldr	r2, .L2752+24
+	movs	r0, #1
+	ldr	r1, .L2752+28
+	ldr	r3, [r2]
+	ldrh	r1, [r1]
+	str	r2, [sp, #24]
+	add	r1, r3, r1, lsl #2
+.L2719:
+	cmp	r3, r1
+	bne	.L2720
+	ldr	r7, .L2752+32
+	movs	r4, #0
+	ldr	r2, .L2752+36
+	ldr	r3, [r7]
+	str	r2, [r3]
+	strh	r4, [r3, #148]	@ movhi
+.L2721:
+	ldr	r3, .L2752+28
+	uxth	r0, r4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2729
+	ldr	r3, .L2752+40
+	mov	fp, #15
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2752
+	mov	r1, r5
 	ldr	r3, [r3]
-.L3027:
-	adds	r2, r1, r7
-	cmp	r3, r2
-	bcc	.L3038
-	ldr	fp, .L3039+8
-	adds	r5, r0, r1
-	mov	r0, r5
-	ldrb	r4, [fp]	@ zero_extendqisi2
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	mov	r8, r0
-	subs	r0, r7, #1
-	mov	r1, r4
-	add	r0, r0, r5
+	ldrb	r0, [r3, #47]	@ zero_extendqisi2
 	bl	__aeabi_uidiv
-	sub	r4, r0, r8
-	mov	r6, r8
-	adds	r4, r4, #1
-	str	r0, [sp, #4]
-	str	fp, [sp, #8]
-.L3029:
-	cbnz	r4, .L3036
-	bl	ftl_write_commit
-	mov	r0, r4
-	movs	r1, #1
-	bl	do_gc
+	ldr	r3, .L2752+24
+	uxtb	r0, r0
+	cmp	r5, #1
+	uxth	lr, r5
+	add	r4, r0, #1
+	ldr	r10, [r3]
+	it	eq
+	moveq	r8, #1
+	ldr	r3, .L2752+32
+	it	ne
+	movne	r8, #3
+	movs	r2, #0
+	ldr	r6, [r3]
+	ldrh	r3, [r6, #148]
+.L2732:
+	add	r1, r10, r2, lsl #2
+	cmp	r5, #4
+	add	r2, r2, #1
+	ldrb	ip, [r1, #2]	@ zero_extendqisi2
+	ite	ne
+	strbne	r8, [r1, #3]
+	strbeq	fp, [r1, #3]
+	orr	ip, ip, #224
+	strb	ip, [r1, #2]
+	uxth	r1, r2
+	cmp	r4, r1
+	bhi	.L2732
+	smulbb	r0, r0, lr
+	add	r3, r3, lr
+	mov	r1, r5
+	uxtah	r0, r0, r3
+	strh	r0, [r6, #148]	@ movhi
+	movs	r0, #16
+	bl	__aeabi_idiv
+	ldr	r3, .L2752+44
+	add	r0, r0, r4
+	uxth	r0, r0
+	ldr	r3, [r3]
+	strh	r0, [r6, #134]	@ movhi
+	lsls	r3, r3, #19
+	bpl	.L2733
+	str	r0, [sp]
+	mov	r3, r4
+	movs	r2, #128
+	movw	r1, #2154
+	ldr	r0, .L2752+48
+	bl	printf
+.L2733:
+	ldr	r0, [r7]
+	movs	r2, #128
+	movs	r1, #255
+	movs	r5, #0
+	adds	r0, r0, #160
+	bl	ftl_memset
+	ldr	r3, [sp, #24]
+	ldr	r1, [r7]
+	ldr	r3, [r3]
+	ldrh	fp, [r1, #134]
+	str	r3, [sp, #24]
+	ldr	r3, .L2752+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L2752+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldr	r3, .L2752+56
+	ldrh	r7, [sp, #12]
+	ldrh	r3, [r3]
+	smulbb	r2, r4, r7
+	rsb	r0, r3, #21
+	movs	r3, #1
+	lsls	r3, r3, r0
+	uxth	r2, r2
+	uxth	r3, r3
+	str	r3, [sp, #20]
+.L2734:
+	cmp	r4, fp
+	bcc	.L2740
+	ldr	r3, .L2752+28
+	movs	r4, #0
+	strh	r5, [r1, #112]	@ movhi
+	strh	r4, [r1, #114]	@ movhi
+	ldrh	r3, [r3]
+	strh	r4, [r1, #118]	@ movhi
+	strh	fp, [r1, #132]	@ movhi
+	sub	r3, r3, fp
+	strh	r3, [r1, #116]	@ movhi
+	bl	ftl_low_format_data_init
 	mov	r0, r4
-.L3025:
-	add	sp, sp, #16
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3026:
-	cmp	r0, #3
-	bhi	.L3038
-	lsls	r0, r0, #13
-	mov	r3, #8192
-	b	.L3027
-.L3036:
-	movs	r0, #0
-	bl	buf_alloc
-	mov	fp, r0
-	cbnz	r0, .L3030
-	bl	ftl_write_commit
-	b	.L3029
-.L3030:
-	mov	r3, #0
-	cmp	r6, r8
-	strb	r3, [r0, #41]
-	ldr	r3, [sp, #8]
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	strb	r2, [r0, #40]
-	bne	.L3032
-	mov	r1, r2
-	mov	r0, r5
-	str	r2, [sp, #12]
-	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #12]
-	uxtb	r1, r1
-	strb	r1, [fp, #41]
-	subs	r1, r2, r1
-	uxtb	r1, r1
-	cmp	r7, r1
-	ite	cs
-	strbcs	r1, [fp, #40]
-	strbcc	r7, [fp, #40]
-.L3034:
-	ldrb	ip, [fp, #41]	@ zero_extendqisi2
-	mov	r1, r10
-	ldrb	r2, [fp, #40]	@ zero_extendqisi2
-	subs	r4, r4, #1
-	ldr	r0, [fp, #4]
-	lsls	r2, r2, #9
-	add	r0, r0, ip, lsl #9
-	bl	ftl_memcpy
-	ldr	r3, .L3039+4
-	str	r6, [fp, #20]
-	adds	r6, r6, #1
-	ldr	r1, [r3]
-	ldr	r2, [r1, #8]
-	adds	r0, r2, #1
-	str	r0, [r1, #8]
-	mov	r0, fp
-	str	r2, [fp, #16]
-	bl	ftl_write_buf
-	ldrb	r3, [fp, #40]	@ zero_extendqisi2
-	add	r10, r10, r3, lsl #9
-	b	.L3029
-.L3032:
-	ldr	r3, [sp, #4]
-	cmp	r6, r3
-	itttt	eq
-	smulbbeq	r2, r6, r2
-	addeq	r1, r5, r7
-	subeq	r2, r1, r2
-	strbeq	r2, [r0, #40]
-	b	.L3034
-.L3038:
-	mov	r0, #-1
-	b	.L3025
-.L3040:
+.L2720:
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	adds	r3, r3, #4
+	and	r2, r2, #31
+	bfi	r2, r0, #3, #2
+	strb	r2, [r3, #-2]
+	b	.L2719
+.L2729:
+	ldr	r3, .L2752+60
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L2752+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2722
+	bl	ftl_test_block
+.L2722:
+	ldr	r3, .L2752+52
+	uxth	r1, r4
+	ldr	r0, .L2752+24
+	movs	r6, #0
+	mov	fp, r6
+	mov	r8, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r5, [r0]
+	str	r3, [sp, #16]
+	ldr	r3, .L2752+40
+	add	r5, r5, r1, lsl #2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxth	r2, r3
+	str	r2, [sp, #20]
+	mul	r2, r3, r1
+	ldr	r1, .L2752+32
+	ldr	r1, [r1]
+	str	r1, [sp, #12]
+.L2723:
+	ldr	r0, [sp, #16]
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L2741
+	cmp	r8, #0
+	bne	.L2728
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+.L2728:
+	adds	r4, r4, #1
+	b	.L2721
+.L2726:
+	add	r1, r10, r2
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #36]
+	str	r2, [sp, #32]
+	bl	flash_check_bad_block
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #36]
+	cbz	r0, .L2724
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	movs	r1, #1
+	lsl	r1, r1, r10
+	orrs	r1, r1, r0
+	ldr	r0, [sp, #12]
+	strb	r1, [r5, #3]
+	ldr	r1, [sp, #12]
+	ldrh	r1, [r1, #148]
+	adds	r1, r1, #1
+	strh	r1, [r0, #148]	@ movhi
+.L2725:
+	add	r10, r10, #1
+.L2727:
+	sub	r1, r10, r6
+	ldr	r0, [sp, #20]
+	uxth	r1, r1
+	cmp	r0, r1
+	bhi	.L2726
+	add	fp, fp, #1
+	add	r6, r6, r3
+	subs	r2, r2, r3
+	b	.L2723
+.L2724:
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L2725
+.L2741:
+	uxtb	r1, fp
+	mov	r10, r6
+	str	r1, [sp, #28]
+	b	.L2727
+.L2740:
+	ldr	r3, [sp, #24]
+	movs	r0, #0
+	mov	lr, r0
+	mov	ip, r0
+	add	r8, r3, r4, lsl #2
+	ldrb	r3, [r8, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r8, #2]
+.L2735:
+	ldr	r6, [sp, #28]
+	uxth	r3, ip
+	cmp	r3, r6
+	bcc	.L2743
+	adds	r4, r4, #1
+	add	r2, r2, r7
+	uxth	r4, r4
+	uxth	r2, r2
+	b	.L2734
+.L2738:
+	ldrb	r10, [r8, #3]	@ zero_extendqisi2
+	add	r3, lr, r6
+	asr	r10, r10, r3
+	tst	r10, #1
+	bne	.L2736
+	ldr	r3, [sp, #12]
+	add	r10, r5, #80
+	adds	r5, r5, #1
+	uxth	r5, r5
+	cmp	r3, #1
+	itett	hi
+	ldrhi	r3, [sp, #16]
+	movls	r3, r2
+	andhi	r3, r3, #1
+	addhi	r3, r3, r2
+	it	hi
+	uxthhi	r3, r3
+	add	r3, r3, r0
+	strh	r3, [r1, r10, lsl #1]	@ movhi
+.L2736:
+	adds	r6, r6, #1
+.L2739:
+	uxth	r3, r6
+	cmp	r3, r7
+	str	r3, [sp, #16]
+	bcc	.L2738
+	ldr	r3, [sp, #12]
+	add	ip, ip, #1
+	add	lr, lr, r3
+	ldr	r3, [sp, #20]
+	add	r0, r0, r3
+	uxth	r0, r0
+	b	.L2735
+.L2743:
+	movs	r6, #0
+	b	.L2739
+.L2753:
 	.align	2
-.L3039:
-	.word	.LANCHOR52
-	.word	.LANCHOR46
-	.word	.LANCHOR45
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlWrite,"ax",%progbits
+.L2752:
+	.word	.LANCHOR27
+	.word	.LC148
+	.word	.LANCHOR188
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LANCHOR102
+	.word	1229739078
+	.word	.LANCHOR67
+	.word	.LANCHOR14
+	.word	.LC149
+	.word	.LANCHOR104
+	.word	.LANCHOR66
+	.word	.LANCHOR60
+	.word	.LANCHOR73
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format,"ax",%progbits
 	.align	1
-	.global	FtlWrite
+	.global	ftl_re_low_format
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlWrite, %function
-FtlWrite:
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	ftl_write
-	.size	FtlWrite, .-FtlWrite
-	.section	.text.StorageSysDataStore,"ax",%progbits
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r1, #1
+	ldr	r0, .L2760
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	r2, .L2760+4
+	ldr	r3, .L2760+8
+	ldrh	r7, [r2]
+	ldr	r3, [r3]
+	ldr	r2, .L2760+12
+	ldrh	r1, [r3, #134]
+	ldr	r0, [r2]
+	movs	r2, #0
+	mov	r5, r2
+	mov	r6, r2
+	add	r0, r0, r1, lsl #2
+.L2755:
+	cmp	r1, r7
+	bcc	.L2759
+	movs	r4, #0
+	strh	r6, [r3, #114]	@ movhi
+	strh	r5, [r3, #118]	@ movhi
+	strh	r2, [r3, #116]	@ movhi
+	strh	r4, [r3, #122]	@ movhi
+	strh	r4, [r3, #120]	@ movhi
+	strh	r4, [r3, #124]	@ movhi
+	bl	ftl_low_format_data_init
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2759:
+	ldrb	r4, [r0, #2]	@ zero_extendqisi2
+	bfc	r4, #5, #3
+	strb	r4, [r0, #2]
+	ands	r4, r4, #24
+	bne	.L2756
+	adds	r6, r6, #1
+	uxth	r6, r6
+.L2757:
+	adds	r1, r1, #1
+	uxth	r1, r1
+	adds	r0, r0, #4
+	b	.L2755
+.L2756:
+	cmp	r4, #16
+	itete	eq
+	addeq	r5, r5, #1
+	addne	r2, r2, #1
+	uxtheq	r5, r5
+	uxthne	r2, r2
+	b	.L2757
+.L2761:
+	.align	2
+.L2760:
+	.word	.LC150
+	.word	.LANCHOR6
+	.word	.LANCHOR102
+	.word	.LANCHOR7
+	.size	ftl_re_low_format, .-ftl_re_low_format
+	.section	.text.ftl_prog_ppa_page,"ax",%progbits
 	.align	1
-	.global	StorageSysDataStore
+	.global	ftl_prog_ppa_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r1
-	movs	r2, #1
-	mov	r1, r0
-	movs	r0, #2
-	b	ftl_write
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.global	g_pm_spare
-	.global	pm_gc_enable
-	.global	pm_last_load_ram_id
-	.global	pm_last_update_ram_id
-	.global	pm_ram_info
-	.global	sblk_gc_write_completed_queue_head
-	.global	sblk_read_completed_queue_head
-	.global	sblk_write_completed_queue_head
-	.global	sblk_queue_head
-	.global	ftl_low_format_cur_blk
-	.global	ftl_power_lost_flag
-	.global	ftl_vpn_update_count
-	.global	ftl_sblk_vpn_update_id
-	.global	ftl_sblk_lpa_tbl
-	.global	ftl_sblk_vpn
-	.global	gp_ftl_ext_info
-	.global	gp_ftl_info
-	.global	gp_blk_info
-	.global	ftl_tmp_spare
-	.global	ftl_info_spare
-	.global	ftl_ext_info_data_buffer
-	.global	ftl_info_data_buffer
-	.global	ftl_tmp_buffer
-	.global	g_ftl_info_blk
-	.global	tlc_prog_order
-	.global	gc_des_ppa_tbl
-	.global	gc_valid_page_ppa
-	.global	gc_page_buf_id
-	.global	gc_pre_ppa_tbl
-	.global	gc_lpa_tbl
-	.global	g_gc_info
-	.global	gc_slc_mode_vpn_th
-	.global	gc_tlc_mode_tlc_vpn_th
-	.global	gc_tlc_mode_slc_vpn_th
-	.global	gc_state
-	.global	gc_mode
-	.global	check_vpc_tbl
-	.global	p_read_ahead_ext_buf
-	.global	read_ahead_lpa
-	.global	write_commit_count
-	.global	write_commit_head
-	.global	write_buf_count
-	.global	write_buf_head
-	.global	ftl_flush_jiffies
-	.global	lpa_hash
-	.global	lpa_hash_index
-	.global	_min_slc_super_block
-	.global	_max_slc_super_block
-	.global	_max_xlc_super_block
-	.global	_c_max_pm_sblk
-	.global	_c_ftl_pm_page_num
-	.global	_c_totle_log_page
-	.global	_c_totle_data_density
-	.global	_c_user_data_density
-	.global	_c_totle_phy_density
-	.global	_c_ftl_block_addr_log2
-	.global	_c_ftl_block_align_addr
-	.global	_c_ftl_byte_pre_page
-	.global	_c_ftl_nand_blks_per_die
-	.global	_c_ftl_page_pre_slc_blk
-	.global	_c_ftl_page_pre_blk
-	.global	_c_ftl_blk_pre_plane
-	.global	_c_ftl_nand_planes_num
-	.global	_c_ftl_planes_per_die
-	.global	_c_ftl_sec_per_page
-	.global	_c_ftl_nand_die_num
-	.global	_c_ftl_nand_type
-	.global	zftl_debug
-	.global	g_flash_blk_info
-	.global	gp_flash_info
-	.global	p_free_buf_head
-	.global	free_buf_count
-	.global	g_buf
-	.global	g_nandc_v6_master_info
-	.global	nandc_randomizer_en
-	.global	nandc_hw_seed
-	.global	fill_spare_size
-	.global	g_nandc_ecc_bits
-	.global	g_nandc_ver
-	.global	gp_nandc
-	.global	hy_f26_ref_value
-	.global	sd15_tlc_rr
-	.global	sd15_slc_rr
-	.global	gNandParaInfo
-	.global	NandFlashParaTbl
-	.global	gpNandParaInfo
-	.global	gNandOptPara
-	.global	g_msb_page_tbl
-	.global	g_lsb_page_tbl
-	.global	g_die_addr
-	.global	g_die_cs_idx
-	.global	IDByte
-	.global	flash_read_retry
-	.global	g_maxRetryCount
-	.global	g_maxRegNum
-	.global	g_retryMode
-	.global	g_flash_toggle_mode_en
-	.global	g_flash_3d_mlc_flag
-	.global	g_flash_3d_tlc_flag
-	.global	g_flash_multi_page_prog_en
-	.global	g_flash_multi_page_read_en
-	.global	g_flash_interface_mode
-	.global	g_idb_ecc_bits
-	.global	g_idb_slc_mode_enable
-	.global	g_slc_mode_addr2
-	.global	g_slc_mode_enable
-	.global	g_flash_cur_mode
-	.global	g_flash_slc_mode
-	.global	g_slc_page_num
-	.global	g_totle_phy_block
-	.global	g_block_align_addr
-	.global	g_flash_reversd_blks
-	.global	g_nand_max_die
-	.global	g_flash_tmp_spare_buffer
-	.global	g_flash_tmp_page_buffer
-	.global	g_flash_sys_spare_buffer
-	.global	g_flash_spare_buffer
-	.global	g_flash_page_buffer
-	.section	.bss.IDByte,"aw",%nobits
-	.align	2
-	.set	.LANCHOR26,. + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.space	32
-	.section	.bss._c_ftl_blk_pre_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR54,. + 0
-	.type	_c_ftl_blk_pre_plane, %object
-	.size	_c_ftl_blk_pre_plane, 2
-_c_ftl_blk_pre_plane:
-	.space	2
-	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
-	.align	1
-	.set	.LANCHOR71,. + 0
-	.type	_c_ftl_block_addr_log2, %object
-	.size	_c_ftl_block_addr_log2, 2
-_c_ftl_block_addr_log2:
-	.space	2
-	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
-	.align	1
-	.set	.LANCHOR75,. + 0
-	.type	_c_ftl_block_align_addr, %object
-	.size	_c_ftl_block_align_addr, 2
-_c_ftl_block_align_addr:
-	.space	2
-	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
-	.align	1
-	.set	.LANCHOR149,. + 0
-	.type	_c_ftl_byte_pre_page, %object
-	.size	_c_ftl_byte_pre_page, 2
-_c_ftl_byte_pre_page:
-	.space	2
-	.section	.bss._c_ftl_nand_blks_per_die,"aw",%nobits
-	.align	1
-	.type	_c_ftl_nand_blks_per_die, %object
-	.size	_c_ftl_nand_blks_per_die, 2
-_c_ftl_nand_blks_per_die:
-	.space	2
-	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
-	.set	.LANCHOR76,. + 0
-	.type	_c_ftl_nand_die_num, %object
-	.size	_c_ftl_nand_die_num, 1
-_c_ftl_nand_die_num:
-	.space	1
-	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
-	.set	.LANCHOR69,. + 0
-	.type	_c_ftl_nand_planes_num, %object
-	.size	_c_ftl_nand_planes_num, 1
-_c_ftl_nand_planes_num:
-	.space	1
-	.section	.bss._c_ftl_nand_type,"aw",%nobits
-	.set	.LANCHOR64,. + 0
-	.type	_c_ftl_nand_type, %object
-	.size	_c_ftl_nand_type, 1
-_c_ftl_nand_type:
-	.space	1
-	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR68,. + 0
-	.type	_c_ftl_page_pre_blk, %object
-	.size	_c_ftl_page_pre_blk, 2
-_c_ftl_page_pre_blk:
-	.space	2
-	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR79,. + 0
-	.type	_c_ftl_page_pre_slc_blk, %object
-	.size	_c_ftl_page_pre_slc_blk, 2
-_c_ftl_page_pre_slc_blk:
-	.space	2
-	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
-	.set	.LANCHOR70,. + 0
-	.type	_c_ftl_planes_per_die, %object
-	.size	_c_ftl_planes_per_die, 1
-_c_ftl_planes_per_die:
-	.space	1
-	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR137,. + 0
-	.type	_c_ftl_pm_page_num, %object
-	.size	_c_ftl_pm_page_num, 2
-_c_ftl_pm_page_num:
-	.space	2
-	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
-	.set	.LANCHOR45,. + 0
-	.type	_c_ftl_sec_per_page, %object
-	.size	_c_ftl_sec_per_page, 1
-_c_ftl_sec_per_page:
-	.space	1
-	.section	.bss._c_max_pm_sblk,"aw",%nobits
+	push	{r0, r1, r2, lr}
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	ubfx	r1, r0, #0, #21
+	ubfx	r0, r0, #21, #3
+	bl	ftl_prog_page
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",%progbits
 	.align	1
-	.set	.LANCHOR101,. + 0
-	.type	_c_max_pm_sblk, %object
-	.size	_c_max_pm_sblk, 2
-_c_max_pm_sblk:
-	.space	2
-	.section	.bss._c_totle_data_density,"aw",%nobits
-	.align	2
-	.set	.LANCHOR162,. + 0
-	.type	_c_totle_data_density, %object
-	.size	_c_totle_data_density, 4
-_c_totle_data_density:
-	.space	4
-	.section	.bss._c_totle_log_page,"aw",%nobits
-	.align	2
-	.set	.LANCHOR47,. + 0
-	.type	_c_totle_log_page, %object
-	.size	_c_totle_log_page, 4
-_c_totle_log_page:
-	.space	4
-	.section	.bss._c_totle_phy_density,"aw",%nobits
-	.align	2
-	.set	.LANCHOR161,. + 0
-	.type	_c_totle_phy_density, %object
-	.size	_c_totle_phy_density, 4
-_c_totle_phy_density:
-	.space	4
-	.section	.bss._c_user_data_density,"aw",%nobits
+	.global	ftl_write_last_log_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldrh	r3, [r0, #6]
+	cmp	r3, #1
+	bne	.L2765
+	ldr	r3, .L2767
+	ldrh	r5, [r0, #12]
+	ldr	r6, [r3]
+	bl	ftl_get_new_free_page
+	adds	r3, r0, #1
+	mov	r7, r0
+	beq	.L2766
+	ldrh	r0, [r4]
+	add	r6, r6, r5, lsl #2
+	ldr	r5, .L2767+4
+	movs	r4, #0
+	bl	ftl_vpn_decrement
+	ldr	r3, .L2767+8
+	mov	r0, r6
+	ldr	r2, .L2767+12
+	str	r3, [r5]
+	ldr	r3, .L2767+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L2767+20
+	mov	r2, r5
+	str	r0, [r5, #4]
+	mov	r1, r6
+	mov	r0, r7
+	str	r4, [r5, #8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r4, [r5, #12]
+	bl	ftl_prog_ppa_page
+.L2766:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2765:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2768:
 	.align	2
-	.set	.LANCHOR52,. + 0
-	.type	_c_user_data_density, %object
-	.size	_c_user_data_density, 4
-_c_user_data_density:
-	.space	4
-	.section	.bss._max_slc_super_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR164,. + 0
-	.type	_max_slc_super_block, %object
-	.size	_max_slc_super_block, 2
-_max_slc_super_block:
-	.space	2
-	.section	.bss._max_xlc_super_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR163,. + 0
-	.type	_max_xlc_super_block, %object
-	.size	_max_xlc_super_block, 2
-_max_xlc_super_block:
-	.space	2
-	.section	.bss._min_slc_super_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR165,. + 0
-	.type	_min_slc_super_block, %object
-	.size	_min_slc_super_block, 2
-_min_slc_super_block:
-	.space	2
-	.section	.bss.check_vpc_tbl,"aw",%nobits
-	.align	1
-	.type	check_vpc_tbl, %object
-	.size	check_vpc_tbl, 4352
-check_vpc_tbl:
-	.space	4352
-	.section	.bss.fill_spare_size,"aw",%nobits
+.L2767:
+	.word	.LANCHOR109
+	.word	.LANCHOR176
+	.word	-178307901
+	.word	.LANCHOR78
+	.word	.LANCHOR85
+	.word	.LANCHOR123
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
 	.align	1
-	.set	.LANCHOR31,. + 0
-	.type	fill_spare_size, %object
-	.size	fill_spare_size, 2
-fill_spare_size:
-	.space	2
-	.section	.bss.flash_read_retry,"aw",%nobits
-	.align	2
-	.set	.LANCHOR115,. + 0
-	.type	flash_read_retry, %object
-	.size	flash_read_retry, 4
-flash_read_retry:
-	.space	4
-	.section	.bss.free_buf_count,"aw",%nobits
-	.set	.LANCHOR38,. + 0
-	.type	free_buf_count, %object
-	.size	free_buf_count, 1
-free_buf_count:
-	.space	1
-	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
-	.align	6
-	.type	ftl_ext_info_data_buffer, %object
-	.size	ftl_ext_info_data_buffer, 16384
-ftl_ext_info_data_buffer:
-	.space	16384
-	.section	.bss.ftl_flush_jiffies,"aw",%nobits
-	.align	2
-	.set	.LANCHOR168,. + 0
-	.type	ftl_flush_jiffies, %object
-	.size	ftl_flush_jiffies, 4
-ftl_flush_jiffies:
-	.space	4
-	.section	.bss.ftl_info_data_buffer,"aw",%nobits
-	.align	6
-	.type	ftl_info_data_buffer, %object
-	.size	ftl_info_data_buffer, 16384
-ftl_info_data_buffer:
-	.space	16384
-	.section	.bss.ftl_info_spare,"aw",%nobits
-	.align	6
-	.set	.LANCHOR130,. + 0
-	.type	ftl_info_spare, %object
-	.size	ftl_info_spare, 256
-ftl_info_spare:
-	.space	256
-	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR53,. + 0
-	.type	ftl_low_format_cur_blk, %object
-	.size	ftl_low_format_cur_blk, 2
-ftl_low_format_cur_blk:
-	.space	2
-	.section	.bss.ftl_power_lost_flag,"aw",%nobits
-	.set	.LANCHOR133,. + 0
-	.type	ftl_power_lost_flag, %object
-	.size	ftl_power_lost_flag, 1
-ftl_power_lost_flag:
-	.space	1
-	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR82,. + 0
-	.type	ftl_sblk_lpa_tbl, %object
-	.size	ftl_sblk_lpa_tbl, 4
-ftl_sblk_lpa_tbl:
-	.space	4
-	.section	.bss.ftl_sblk_vpn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR56,. + 0
-	.type	ftl_sblk_vpn, %object
-	.size	ftl_sblk_vpn, 4
-ftl_sblk_vpn:
-	.space	4
-	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
-	.align	1
-	.set	.LANCHOR87,. + 0
-	.type	ftl_sblk_vpn_update_id, %object
-	.size	ftl_sblk_vpn_update_id, 2
-ftl_sblk_vpn_update_id:
-	.space	2
-	.section	.bss.ftl_tmp_buffer,"aw",%nobits
-	.align	6
-	.type	ftl_tmp_buffer, %object
-	.size	ftl_tmp_buffer, 16384
-ftl_tmp_buffer:
-	.space	16384
-	.section	.bss.ftl_tmp_spare,"aw",%nobits
-	.align	6
-	.set	.LANCHOR121,. + 0
-	.type	ftl_tmp_spare, %object
-	.size	ftl_tmp_spare, 256
-ftl_tmp_spare:
-	.space	256
-	.section	.bss.ftl_vpn_update_count,"aw",%nobits
-	.align	1
-	.set	.LANCHOR86,. + 0
-	.type	ftl_vpn_update_count, %object
-	.size	ftl_vpn_update_count, 2
-ftl_vpn_update_count:
-	.space	2
-	.section	.bss.gNandOptPara,"aw",%nobits
-	.set	.LANCHOR103,. + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.space	32
-	.section	.bss.g_block_align_addr,"aw",%nobits
-	.align	1
-	.set	.LANCHOR13,. + 0
-	.type	g_block_align_addr, %object
-	.size	g_block_align_addr, 2
-g_block_align_addr:
-	.space	2
-	.section	.bss.g_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR36,. + 0
-	.type	g_buf, %object
-	.size	g_buf, 1536
-g_buf:
-	.space	1536
-	.section	.bss.g_die_addr,"aw",%nobits
-	.align	2
-	.set	.LANCHOR98,. + 0
-	.type	g_die_addr, %object
-	.size	g_die_addr, 32
-g_die_addr:
-	.space	32
-	.section	.bss.g_die_cs_idx,"aw",%nobits
+	.global	ftl_open_sblk_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #96
+	ldr	r5, .L2876
+	mov	r4, r0
+	str	r1, [sp, #24]
+	ldr	r3, [r5]
+	lsls	r7, r3, #19
+	bpl	.L2770
+	ldrh	r1, [r0, #2]
+	ldr	r0, .L2876+4
+	bl	printf
+.L2770:
+	ldr	r3, [r5]
+	lsls	r6, r3, #19
+	bpl	.L2771
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldr	r0, .L2876+8
+	bl	printf
+.L2771:
+	ldr	r3, [r5]
+	lsls	r0, r3, #19
+	bpl	.L2772
+	ldrh	r1, [r4]
+	ldr	r0, .L2876+12
+	bl	printf
+.L2772:
+	ldr	r3, [r5]
+	lsls	r1, r3, #19
+	bpl	.L2773
+	ldrh	r2, [r4, #18]
+	ldrh	r1, [r4, #16]
+	ldr	r0, .L2876+16
+	bl	printf
+.L2773:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4]
+	strh	r3, [r4, #14]	@ movhi
+	ldr	r3, .L2876+20
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L2769
+	movs	r0, #1
+	bl	buf_alloc
+	movs	r2, #64
+	mov	r5, r0
+	movs	r1, #255
+	add	r0, sp, #32
+	bl	ftl_memset
+	ldrb	r6, [r4, #5]	@ zero_extendqisi2
+	movs	r3, #2
+	ldrh	r7, [r4, #2]
+	str	r3, [sp, #12]
+	movs	r3, #0
+	str	r3, [sp, #16]
+.L2775:
+	ldr	r3, .L2876+24
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bhi	.L2788
+.L2778:
+	ldrh	r3, [r4, #10]
+	ldr	r1, .L2876+24
+	ldrh	r2, [r4, #6]
+	ldrb	r0, [r4, #9]	@ zero_extendqisi2
+	strh	r7, [r4, #2]	@ movhi
+	add	r2, r2, r3
+	ldrh	r3, [r1]
+	strb	r6, [r4, #5]
+	str	r1, [sp, #20]
+	muls	r3, r0, r3
+	cmp	r2, r3
+	beq	.L2789
+	movw	r2, #1493
+	ldr	r1, .L2876+28
+	ldr	r0, .L2876+32
+	bl	printf
+.L2789:
+	ldr	r3, .L2876+36
+	movs	r6, #0
+	ldrh	r0, [r4, #10]
+	mov	r2, r6
+	ldr	r7, [r3]
+	str	r3, [sp, #28]
+.L2790:
+	cmp	r2, r0
+	bcc	.L2792
+	ldr	r2, [sp, #20]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldr	r7, .L2876
+	ldrh	r2, [r2]
+	ldr	r8, .L2876+56
+	smulbb	r3, r3, r2
+	subs	r3, r3, r0
+	add	r6, r6, r3
+	ldr	r3, [r7]
+	uxth	r6, r6
+	tst	r3, #4096
+	beq	.L2793
+	ldrh	r1, [r4]
+	mov	r2, r6
+	ldr	r3, [r8]
+	ldr	r0, .L2876+40
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L2793:
+	ldr	r3, [r8]
+	ldrh	r2, [r4]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+	lsls	r0, r3, #17
+	bpl	.L2794
+	ldr	r3, [sp, #44]
+	add	r1, sp, #32
+	ldr	r0, .L2876+44
+	str	r3, [sp]
+	ldm	r1, {r1, r2, r3}
+	bl	printf
+.L2794:
+	ldr	r6, .L2876+48
+	movs	r7, #0
+	ldr	r8, .L2876
+	movs	r1, #0
+	ldr	r0, [r5, #4]
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	str	r6, [sp, #24]
+.L2795:
+	ldr	r3, .L2876+52
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	cmp	r7, r3
+	bcc	.L2808
+	mov	r0, r5
+	bl	buf_free
+	ldr	r3, [sp, #20]
+	ldrh	r2, [r4, #12]
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mla	r3, r1, r3, r2
+	ldr	r2, [sp, #28]
+	ldr	r2, [r2]
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L2809
+	movw	r2, #1567
+	ldr	r1, .L2876+28
+	ldr	r0, .L2876+32
+	bl	printf
+.L2809:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bne	.L2769
+	mov	r0, r4
+	bl	ftl_write_last_log_page
+.L2769:
+	add	sp, sp, #96
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2788:
+	ldrb	r6, [r4, #5]	@ zero_extendqisi2
+.L2776:
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cmp	r3, r6
+	bhi	.L2787
+	movs	r3, #0
+	adds	r7, r7, #1
+	strb	r3, [r4, #5]
+	uxth	r7, r7
+	b	.L2775
+.L2877:
 	.align	2
-	.set	.LANCHOR10,. + 0
-	.type	g_die_cs_idx, %object
-	.size	g_die_cs_idx, 8
-g_die_cs_idx:
-	.space	8
-	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
-	.set	.LANCHOR74,. + 0
-	.type	g_flash_3d_mlc_flag, %object
-	.size	g_flash_3d_mlc_flag, 1
-g_flash_3d_mlc_flag:
-	.space	1
-	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
-	.set	.LANCHOR66,. + 0
-	.type	g_flash_3d_tlc_flag, %object
-	.size	g_flash_3d_tlc_flag, 1
-g_flash_3d_tlc_flag:
-	.space	1
-	.section	.bss.g_flash_blk_info,"aw",%nobits
-	.align	1
-	.set	.LANCHOR117,. + 0
-	.type	g_flash_blk_info, %object
-	.size	g_flash_blk_info, 4
-g_flash_blk_info:
-	.space	4
-	.section	.bss.g_flash_cur_mode,"aw",%nobits
-	.set	.LANCHOR20,. + 0
-	.type	g_flash_cur_mode, %object
-	.size	g_flash_cur_mode, 1
-g_flash_cur_mode:
-	.space	1
-	.section	.bss.g_flash_interface_mode,"aw",%nobits
-	.set	.LANCHOR25,. + 0
-	.type	g_flash_interface_mode, %object
-	.size	g_flash_interface_mode, 1
-g_flash_interface_mode:
-	.space	1
-	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
-	.set	.LANCHOR23,. + 0
-	.type	g_flash_multi_page_prog_en, %object
-	.size	g_flash_multi_page_prog_en, 1
-g_flash_multi_page_prog_en:
-	.space	1
-	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
-	.set	.LANCHOR144,. + 0
-	.type	g_flash_multi_page_read_en, %object
-	.size	g_flash_multi_page_read_en, 1
-g_flash_multi_page_read_en:
-	.space	1
-	.section	.bss.g_flash_page_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR119,. + 0
-	.type	g_flash_page_buffer, %object
-	.size	g_flash_page_buffer, 4
-g_flash_page_buffer:
-	.space	4
-	.section	.bss.g_flash_reversd_blks,"aw",%nobits
-	.set	.LANCHOR123,. + 0
-	.type	g_flash_reversd_blks, %object
-	.size	g_flash_reversd_blks, 1
-g_flash_reversd_blks:
-	.space	1
-	.section	.bss.g_flash_slc_mode,"aw",%nobits
-	.set	.LANCHOR11,. + 0
-	.type	g_flash_slc_mode, %object
-	.size	g_flash_slc_mode, 1
-g_flash_slc_mode:
-	.space	1
-	.section	.bss.g_flash_spare_buffer,"aw",%nobits
+.L2876:
+	.word	.LANCHOR14
+	.word	.LC151
+	.word	.LC152
+	.word	.LC153
+	.word	.LC154
+	.word	.LANCHOR6
+	.word	.LANCHOR85
+	.word	.LANCHOR189
+	.word	.LC0
+	.word	.LANCHOR109
+	.word	.LC155
+	.word	.LC156
+	.word	.LANCHOR123
+	.word	.LANCHOR78
+	.word	.LANCHOR9
+.L2787:
+	add	r3, r6, #8
+	movw	r2, #65535
+	ldrh	r3, [r4, r3, lsl #1]
+	cmp	r3, r2
+	beq	.L2777
+	ldr	r2, .L2878
+	ldr	r1, [r5, #4]
+	ldrh	r2, [r2]
+	mla	r3, r3, r2, r7
+	ldr	r2, [r5, #12]
+	str	r3, [sp, #20]
+	ldr	r3, .L2878+4
+	ldr	r0, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	cmp	r0, #512
+	mov	r8, r0
+	beq	.L2778
+	cmp	r0, #-1
+	beq	.L2779
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	bne	.L2779
+	ldr	r3, [r3, #4]
+	adds	r3, r3, #1
+	bne	.L2779
+	ldr	r3, [r5, #4]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2778
+.L2779:
+	ldr	r3, .L2878+8
+	movs	r2, #1
+	strb	r2, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldrh	r2, [r4, #10]
+	mla	r3, r7, r3, r6
+	cmp	r2, r3
+	beq	.L2780
+	movw	r2, #1412
+	ldr	r1, .L2878+12
+	ldr	r0, .L2878+16
+	bl	printf
+.L2780:
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #6]
+	add	r2, r2, r3
+	ldr	r3, .L2878+20
+	ldrh	r1, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L2781
+	movw	r2, #1413
+	ldr	r1, .L2878+12
+	ldr	r0, .L2878+16
+	bl	printf
+.L2781:
+	cmp	r8, #-1
+	beq	.L2783
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #4]
+	adds	r2, r0, #1
+	beq	.L2783
+	bl	lpa_hash_get_ppa
+	ldr	r3, [sp, #24]
+	mov	r8, r0
+	cmp	r3, #0
+	beq	.L2785
+	ldr	r10, [r5, #12]
+	ldr	r3, [r10, #8]
+	cmp	r0, r3
+	beq	.L2785
+	cmp	r0, #-1
+	beq	.L2785
+	ldr	r3, .L2878+24
+	mov	fp, #1
+	ldr	r2, .L2878+28
+	ldrh	r0, [r3]
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	rsb	r3, r0, #21
+	lsl	r3, fp, r3
+	lsr	r0, r8, r0
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #24]
+	uxth	r0, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2785
+	ldr	r3, [r10]
+	mov	r0, r8
+	ldr	r10, .L2878+48
+	ldr	r1, [r5, #4]
+	str	r3, [sp, #12]
+	ldr	r3, .L2878+4
+	mov	r2, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r10]
+	ldr	r2, [sp, #12]
+	cmp	r2, r3
+	bhi	.L2785
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #8]
+	adds	r3, r0, #1
+	beq	.L2783
+	ldr	r3, .L2878+24
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsrs	r0, r0, r2
+	lsl	r3, fp, r3
+	ldr	r2, .L2878+28
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L2783:
+	ldrh	r3, [r4, #6]
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #10]
+	adds	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #4
+	str	r3, [sp, #12]
+	movs	r3, #1
+	str	r3, [sp, #16]
+.L2777:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	b	.L2776
+.L2792:
+	ldrh	r1, [r4, #12]
+	add	r1, r1, r2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r3, r3, #1
+	itt	ne
+	addne	r6, r6, #1
+	uxthne	r6, r6
+	b	.L2790
+.L2808:
+	add	fp, sp, #32
+	ldr	r0, [fp, r7, lsl #2]
+	adds	r1, r0, #1
+	bne	.L2796
+.L2800:
+	ldr	r2, .L2878+32
+	mov	r6, #-1
+	ldr	r3, [r5, #12]
+	ldr	r2, [r2]
+	ldr	r2, [r2, #8]
+	str	r6, [r3, #4]
+	str	r6, [r3, #8]
+	str	r2, [r3]
+	movs	r2, #0
+	str	r2, [r3, #12]
+	ldr	r3, [r5, #4]
+	str	r2, [r3]
+.L2797:
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	beq	.L2802
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L2802
+	ldr	fp, .L2878+52
+.L2853:
+	mov	r0, r4
+	bl	ftl_get_new_free_page
+	ldr	r3, [r8]
+	mov	r10, r0
+	lsls	r0, r3, #17
+	bpl	.L2804
+	ldr	r3, [r5, #12]
+	mov	r1, r10
+	mov	r0, fp
+	ldr	r2, [r3, #4]
+	bl	printf
+.L2804:
+	ldr	r3, .L2878+36
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r4, #6]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	adds	r3, r3, #1
+	subs	r3, r3, r7
+	cmp	r2, r3
+	bls	.L2802
+	ldr	r3, [sp, #24]
+	mov	r0, r10
+	ldr	r1, [r5, #4]
+	ldr	r2, [r5, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+	mov	r10, r0
+	ldrh	r0, [r4]
+	bl	ftl_vpn_decrement
+	adds	r1, r6, #1
+	beq	.L2805
+	cmp	r10, #-1
+	beq	.L2805
+	ldr	r3, [r8]
+	lsls	r2, r3, #17
+	bpl	.L2806
+	ldrh	r2, [r4, #12]
+	ldrh	r3, [r4, #10]
+	ldr	r1, [r5, #12]
+	ldr	r0, .L2878+40
+	add	r3, r3, r2
+	subs	r3, r3, #1
+	ldr	r2, [r1, #8]
+	ldr	r1, [r1, #4]
+	bl	printf
+.L2806:
+	ldrh	r1, [r4, #12]
+	ldrh	r2, [r4, #10]
+	ldr	r3, [r5, #12]
+	add	r2, r2, r1
+	subs	r2, r2, #1
+	ldr	r1, [r3, #8]
+	uxth	r2, r2
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_update_ppa
+.L2802:
+	adds	r7, r7, #1
+	b	.L2795
+.L2796:
+	ldr	r3, [sp, #24]
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r5, #12]
+	mov	r6, r0
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_get_ppa
+	ldr	r3, [r8]
+	mov	r10, r0
+	lsls	r2, r3, #17
+	bpl	.L2798
+	ldr	r3, [r5, #12]
+	mov	r1, r0
+	ldr	r2, [fp, r7, lsl #2]
+	ldr	r0, .L2878+44
+	ldr	r3, [r3, #4]
+	bl	printf
+.L2798:
+	ldr	r2, .L2878+32
+	add	r3, sp, #32
+	ldr	r3, [r3, r7, lsl #2]
+	ldr	r1, [r2]
+	cmp	r10, r3
+	it	ne
+	movne	r6, #-1
+	ldr	r3, [r5, #12]
+	ldr	r2, [r1, #8]
+	adds	r0, r2, #1
+	str	r0, [r1, #8]
+	str	r2, [r3]
+	movs	r2, #1
+	str	r10, [r3, #8]
+	str	r2, [r3, #12]
+	adds	r3, r6, #1
+	bne	.L2797
+	b	.L2800
+.L2805:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L2802
+	adds	r3, r6, #1
+	bne	.L2853
+	b	.L2802
+.L2879:
 	.align	2
-	.set	.LANCHOR118,. + 0
-	.type	g_flash_spare_buffer, %object
-	.size	g_flash_spare_buffer, 4
-g_flash_spare_buffer:
-	.space	4
-	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR116,. + 0
-	.type	g_flash_sys_spare_buffer, %object
-	.size	g_flash_sys_spare_buffer, 4
-g_flash_sys_spare_buffer:
-	.space	4
-	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR111,. + 0
-	.type	g_flash_tmp_page_buffer, %object
-	.size	g_flash_tmp_page_buffer, 4
-g_flash_tmp_page_buffer:
-	.space	4
-	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR112,. + 0
-	.type	g_flash_tmp_spare_buffer, %object
-	.size	g_flash_tmp_spare_buffer, 4
-g_flash_tmp_spare_buffer:
-	.space	4
-	.section	.bss.g_flash_toggle_mode_en,"aw",%nobits
-	.set	.LANCHOR35,. + 0
-	.type	g_flash_toggle_mode_en, %object
-	.size	g_flash_toggle_mode_en, 1
-g_flash_toggle_mode_en:
-	.space	1
-	.section	.bss.g_ftl_info_blk,"aw",%nobits
-	.align	6
-	.set	.LANCHOR131,. + 0
-	.type	g_ftl_info_blk, %object
-	.size	g_ftl_info_blk, 4
-g_ftl_info_blk:
-	.space	4
-	.section	.bss.g_gc_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR59,. + 0
-	.type	g_gc_info, %object
-	.size	g_gc_info, 320
-g_gc_info:
-	.space	320
-	.section	.bss.g_idb_ecc_bits,"aw",%nobits
-	.set	.LANCHOR145,. + 0
-	.type	g_idb_ecc_bits, %object
-	.size	g_idb_ecc_bits, 1
-g_idb_ecc_bits:
-	.space	1
-	.section	.bss.g_idb_slc_mode_enable,"aw",%nobits
-	.set	.LANCHOR146,. + 0
-	.type	g_idb_slc_mode_enable, %object
-	.size	g_idb_slc_mode_enable, 1
-g_idb_slc_mode_enable:
-	.space	1
-	.section	.bss.g_lsb_page_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR14,. + 0
-	.type	g_lsb_page_tbl, %object
-	.size	g_lsb_page_tbl, 512
-g_lsb_page_tbl:
-	.space	512
-	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR4,. + 0
-	.type	g_maxRegNum, %object
-	.size	g_maxRegNum, 1
-g_maxRegNum:
-	.space	1
-	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR113,. + 0
-	.type	g_maxRetryCount, %object
-	.size	g_maxRetryCount, 1
-g_maxRetryCount:
-	.space	1
-	.section	.bss.g_msb_page_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR96,. + 0
-	.type	g_msb_page_tbl, %object
-	.size	g_msb_page_tbl, 1024
-g_msb_page_tbl:
-	.space	1024
-	.section	.bss.g_nand_max_die,"aw",%nobits
-	.set	.LANCHOR8,. + 0
-	.type	g_nand_max_die, %object
-	.size	g_nand_max_die, 1
-g_nand_max_die:
-	.space	1
-	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
-	.set	.LANCHOR27,. + 0
-	.type	g_nandc_ecc_bits, %object
-	.size	g_nandc_ecc_bits, 1
-g_nandc_ecc_bits:
-	.space	1
-	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
+.L2878:
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LANCHOR182
+	.word	.LANCHOR189
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR102
+	.word	.LANCHOR78
+	.word	.LC159
+	.word	.LC157
+	.word	.LANCHOR178
+	.word	.LC158
+.L2785:
+	ldr	r0, [r5, #12]
+	ldr	r3, .L2880
+	ldr	r2, [r0, #4]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bcs	.L2783
+	ldr	r3, .L2880+4
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	ip, [r4, #10]
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	subs	r3, r3, #1
+	cmp	ip, r3
+	bge	.L2783
+	ldr	r3, .L2880+8
+	ldr	r1, [r0]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #8]
+	cmp	r1, r2
+	it	hi
+	strhi	r1, [r3, #8]
+	ldrh	r3, [r4, #12]
+	ldr	r1, [r0, #8]
+	ldr	r0, [r0, #4]
+	add	r2, ip, r3
+	uxth	r2, r2
+	bl	lpa_hash_update_ppa
+	ldr	r3, [sp, #36]
+	str	r3, [sp, #32]
+	ldr	r3, [sp, #40]
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #44]
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #44]
+	b	.L2783
+.L2881:
 	.align	2
-	.set	.LANCHOR30,. + 0
-	.type	g_nandc_v6_master_info, %object
-	.size	g_nandc_v6_master_info, 28
-g_nandc_v6_master_info:
-	.space	28
-	.section	.bss.g_nandc_ver,"aw",%nobits
-	.set	.LANCHOR7,. + 0
-	.type	g_nandc_ver, %object
-	.size	g_nandc_ver, 1
-g_nandc_ver:
-	.space	1
-	.section	.bss.g_pm_spare,"aw",%nobits
+.L2880:
+	.word	.LANCHOR120
+	.word	.LANCHOR85
+	.word	.LANCHOR102
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",%progbits
+	.align	1
+	.global	pm_write_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_write_page, %function
+pm_write_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r7, .L2895
+	mov	r8, r1
+	mov	r6, r7
+.L2883:
+	ldr	r3, [r7]
+	ldr	r2, [r3, #48]
+	ldrh	r1, [r3, #696]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldr	r2, .L2895+4
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcs	.L2884
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2885
+.L2884:
+	bl	pm_alloc_new_blk
+	movs	r0, #0
+	bl	ftl_info_flush
+.L2885:
+	ldr	r3, [r6]
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2886
+	movs	r2, #230
+	ldr	r1, .L2895+8
+	ldr	r0, .L2895+12
+	bl	printf
+.L2886:
+	ldr	r3, [r6]
+	movs	r1, #0
+	ldr	r2, .L2895+16
+	ldr	r10, .L2895+32
+	ldrh	r5, [r3, #692]
+	ldrh	r2, [r2]
+	ldrh	r3, [r3, #696]
+	ldr	r0, [r10]
+	mla	r5, r2, r5, r3
+	movs	r2, #64
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, [r10]
+	ldrb	r0, [r2, #694]	@ zero_extendqisi2
+	str	r4, [r3]
+	ldr	r1, [r2, #48]
+	ldr	r2, .L2895+20
+	str	r1, [r3, #4]
+	mov	r1, r5
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp]
+	mov	r2, r8
+	bl	ftl_prog_page
+	ldr	r2, [r6]
+	ldrh	r3, [r2, #696]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	strh	r3, [r2, #696]	@ movhi
+	ldr	r3, .L2895+24
+	beq	.L2887
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r1, .L2888
+.L2887:
+	movs	r2, #0
+	strb	r2, [r3]
+	b	.L2883
+.L2888:
+	adds	r0, r0, #1
+	bne	.L2890
+	mov	r1, r5
+	ldr	r0, .L2895+28
+	bl	printf
+	b	.L2883
+.L2890:
+	ldrh	r3, [r2, #698]
+	movs	r0, #0
+	cmp	r4, r3
+	itt	cc
+	addcc	r4, r4, #176
+	strcc	r5, [r2, r4, lsl #2]
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2896:
 	.align	2
-	.set	.LANCHOR141,. + 0
-	.type	g_pm_spare, %object
-	.size	g_pm_spare, 4
-g_pm_spare:
-	.space	4
-	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR1,. + 0
-	.type	g_retryMode, %object
-	.size	g_retryMode, 1
-g_retryMode:
-	.space	1
-	.section	.bss.g_slc_mode_addr2,"aw",%nobits
-	.set	.LANCHOR12,. + 0
-	.type	g_slc_mode_addr2, %object
-	.size	g_slc_mode_addr2, 1
-g_slc_mode_addr2:
-	.space	1
-	.section	.bss.g_slc_mode_enable,"aw",%nobits
-	.type	g_slc_mode_enable, %object
-	.size	g_slc_mode_enable, 1
-g_slc_mode_enable:
-	.space	1
-	.section	.bss.g_slc_page_num,"aw",%nobits
+.L2895:
+	.word	.LANCHOR102
+	.word	.LANCHOR85
+	.word	.LANCHOR190
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LANCHOR192
+	.word	.LC160
+	.word	.LANCHOR191
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",%progbits
 	.align	1
-	.set	.LANCHOR97,. + 0
-	.type	g_slc_page_num, %object
-	.size	g_slc_page_num, 2
-g_slc_page_num:
-	.space	2
-	.section	.bss.g_totle_phy_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR99,. + 0
-	.type	g_totle_phy_block, %object
-	.size	g_totle_phy_block, 2
-g_totle_phy_block:
-	.space	2
-	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR109,. + 0
-	.type	gc_des_ppa_tbl, %object
-	.size	gc_des_ppa_tbl, 4
-gc_des_ppa_tbl:
-	.space	4
-	.section	.bss.gc_lpa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR107,. + 0
-	.type	gc_lpa_tbl, %object
-	.size	gc_lpa_tbl, 4
-gc_lpa_tbl:
-	.space	4
-	.section	.bss.gc_mode,"aw",%nobits
-	.set	.LANCHOR67,. + 0
-	.type	gc_mode, %object
-	.size	gc_mode, 1
-gc_mode:
-	.space	1
-	.section	.bss.gc_page_buf_id,"aw",%nobits
-	.align	2
-	.set	.LANCHOR65,. + 0
-	.type	gc_page_buf_id, %object
-	.size	gc_page_buf_id, 4
-gc_page_buf_id:
-	.space	4
-	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
+	.global	ftl_dump_write_open_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2926
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	sub	sp, sp, #104
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bls	.L2897
+	ldr	r3, .L2926+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2899
+	ldr	r3, .L2926+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2897
+.L2899:
+	ldr	r7, .L2926+12
+	lsls	r4, r5, #2
+	add	r1, sp, #88
+	strh	r5, [sp, #72]	@ movhi
+	mov	r0, r5
+	movs	r6, #0
+	ldr	r3, [r7]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L2926+16
+	movne	r8, #1
+	ldrbeq	r8, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L2926+20
+	uxtb	r0, r0
+	strb	r6, [sp, #77]
+	strb	r0, [sp, #81]
+	ldrh	r3, [r3]
+	strh	r6, [sp, #74]	@ movhi
+	strh	r6, [sp, #82]	@ movhi
+	smulbb	r0, r3, r0
+	ldr	r3, [r7]
+	mov	r7, r6
+	ldr	r1, [r3, r5, lsl #2]
+	add	r4, r4, r3
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	strh	r0, [sp, #78]	@ movhi
+	ubfx	r1, r1, #11, #8
+	ldr	r0, .L2926+24
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldrh	r3, [r3, r5, lsl #2]
+	ubfx	r3, r3, #0, #11
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
+	bl	printf
+	movs	r0, #1
+	bl	buf_alloc
+	mov	r4, r0
+	str	r6, [sp, #44]
+.L2901:
+	ldr	r3, .L2926+20
+	uxth	r10, r6
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L2907
+	mov	r3, r10
+	str	r10, [sp, #52]
+	lsls	r3, r3, #1
+	mov	fp, #0
+	subs	r3, r3, #1
+	str	r3, [sp, #60]
+	b	.L2911
+.L2909:
+	ldr	r3, [sp, #64]
+	add	r2, sp, #104
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
+	str	r3, [sp, #48]
+	movw	r3, #65535
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2902
+.L2908:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L2903:
+	cmp	r8, r7
+	bcs	.L2909
+	add	fp, fp, #1
+.L2911:
+	uxth	r3, fp
+	str	r3, [sp, #44]
+	ldr	r2, [sp, #44]
+	ldrb	r3, [sp, #81]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L2910
+	mov	r3, r2
+	movs	r7, #1
+	adds	r3, r3, #8
+	str	r3, [sp, #64]
+	b	.L2903
+.L2902:
+	ldr	r3, .L2926+28
+	cmp	r8, #3
+	ldr	r2, [sp, #48]
+	ldrh	r3, [r3]
+	mul	r3, r2, r3
+	bne	.L2904
+	uxtah	r3, r3, r6
+	orr	r3, r3, r7, lsl #24
+.L2905:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [sp, #68]
+	bl	sblk_read_page
+	ldr	r1, [r4, #12]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r4, #36]
+	ldr	r0, [r1, #12]
+	str	r3, [sp, #56]
+	str	r0, [sp, #32]
+	ldr	r0, [r1, #8]
+	str	r0, [sp, #28]
+	ldr	r0, [r1, #4]
+	str	r0, [sp, #24]
+	ldr	r1, [r1]
+	ldr	r0, .L2926+32
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #16]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #12]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #48]
+	str	r3, [sp]
+	str	r2, [sp, #4]
+	ldr	r3, [sp, #68]
+	ldr	r2, [sp, #52]
+	bl	printf
+	ldr	r3, [sp, #56]
+	cmp	r3, #512
+	bne	.L2908
+.L2907:
+	uxth	r2, r6
+	ldr	r6, .L2926+36
+	ldr	r3, [sp, #44]
+	mov	r1, r5
+	str	r7, [sp]
+	ldr	r0, .L2926+40
+	bl	printf
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #4]
+	ldr	fp, .L2926+4
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r0, [r4, #12]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L2912:
+	ldr	r3, .L2926+20
+	ldrh	r3, [r3]
+	cmp	r3, r10
+	bls	.L2917
+	lsl	r3, r10, #1
+	movs	r7, #0
+	str	r3, [sp, #44]
+	b	.L2918
+.L2904:
+	cmp	r8, #2
+	itett	eq
+	ldreq	r2, [sp, #60]
+	uxtahne	r3, r3, r6
+	addeq	r3, r3, r2
+	ldreq	r2, .L2926+16
+	ittt	eq
+	addeq	r3, r3, r7
+	ldrbeq	r2, [r2]	@ zero_extendqisi2
+	orreq	r3, r3, r2, lsl #24
+	b	.L2905
+.L2910:
+	adds	r6, r6, #1
+	b	.L2901
+.L2916:
+	uxth	r8, r7
+	mov	r1, r10
+	ldr	r0, .L2926+44
+	mov	r2, r8
+	bl	printf
+	ldrb	ip, [fp]	@ zero_extendqisi2
+	add	r2, r8, #8
+	ldr	r1, .L2926+28
+	cmp	ip, #0
+	beq	.L2913
+	add	r3, sp, #104
+	mov	r0, r4
+	add	r2, r3, r2, lsl #1
+	ldrh	r3, [r1]
+	ldrh	r2, [r2, #-32]
+	muls	r3, r2, r3
+	orr	r3, r3, r10
+	str	r3, [r4, #24]
+	bl	sblk_3d_tlc_dump_prog
+.L2914:
+	adds	r7, r7, #1
+.L2918:
+	ldrb	r2, [sp, #81]	@ zero_extendqisi2
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L2916
+	add	r3, r10, #1
+	uxth	r10, r3
+	b	.L2912
+.L2913:
+	ldr	r3, .L2926+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	add	r3, sp, #104
+	add	r2, r3, r2, lsl #1
+	bne	.L2915
+	ldrh	r2, [r2, #-32]
+	mov	r0, r4
+	ldrh	r3, [r1]
+	muls	r3, r2, r3
+	ldr	r2, [sp, #44]
+	orrs	r3, r3, r2
+	orr	r3, r3, #33554432
+	str	r3, [r4, #24]
+	bl	sblk_mlc_dump_prog
+	b	.L2914
+.L2915:
+	ldrh	r3, [r2, #-32]
+	ldrh	r0, [r1]
+	muls	r0, r3, r0
+	orr	r0, r0, r10
+	str	r0, [r4, #24]
+	bic	r1, r0, #14680064
+	str	ip, [sp, #4]
+	ubfx	r0, r0, #21, #3
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #4]
+	bl	flash_prog_page_en
+	b	.L2914
+.L2917:
+	mov	r0, r4
+	bl	buf_free
+	mov	r1, r5
+	ldr	r0, .L2926+48
+	bl	printf
+.L2897:
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2927:
 	.align	2
-	.set	.LANCHOR108,. + 0
-	.type	gc_pre_ppa_tbl, %object
-	.size	gc_pre_ppa_tbl, 4
-gc_pre_ppa_tbl:
-	.space	4
-	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
-	.align	1
-	.set	.LANCHOR58,. + 0
-	.type	gc_slc_mode_vpn_th, %object
-	.size	gc_slc_mode_vpn_th, 2
-gc_slc_mode_vpn_th:
-	.space	2
-	.section	.bss.gc_state,"aw",%nobits
-	.set	.LANCHOR104,. + 0
-	.type	gc_state, %object
-	.size	gc_state, 1
-gc_state:
-	.space	1
-	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
-	.align	1
-	.set	.LANCHOR105,. + 0
-	.type	gc_tlc_mode_slc_vpn_th, %object
-	.size	gc_tlc_mode_slc_vpn_th, 2
-gc_tlc_mode_slc_vpn_th:
-	.space	2
-	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
+.L2926:
+	.word	.LANCHOR6
+	.word	.LANCHOR75
+	.word	.LANCHOR72
+	.word	.LANCHOR7
+	.word	.LANCHOR71
+	.word	.LANCHOR85
+	.word	.LC161
+	.word	.LANCHOR103
+	.word	.LC162
+	.word	.LANCHOR123
+	.word	.LC163
+	.word	.LC164
+	.word	.LC165
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
+	.section	.text.flash_info_flush,"ax",%progbits
 	.align	1
-	.set	.LANCHOR106,. + 0
-	.type	gc_tlc_mode_tlc_vpn_th, %object
-	.size	gc_tlc_mode_tlc_vpn_th, 2
-gc_tlc_mode_tlc_vpn_th:
-	.space	2
-	.section	.bss.gc_valid_page_ppa,"aw",%nobits
-	.align	2
-	.set	.LANCHOR61,. + 0
-	.type	gc_valid_page_ppa, %object
-	.size	gc_valid_page_ppa, 4
-gc_valid_page_ppa:
-	.space	4
-	.section	.bss.gpNandParaInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR34,. + 0
-	.type	gpNandParaInfo, %object
-	.size	gpNandParaInfo, 4
-gpNandParaInfo:
-	.space	4
-	.section	.bss.gp_blk_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR57,. + 0
-	.type	gp_blk_info, %object
-	.size	gp_blk_info, 4
-gp_blk_info:
-	.space	4
-	.section	.bss.gp_flash_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR5,. + 0
-	.type	gp_flash_info, %object
-	.size	gp_flash_info, 4
-gp_flash_info:
-	.space	4
-	.section	.bss.gp_ftl_ext_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR60,. + 0
-	.type	gp_ftl_ext_info, %object
-	.size	gp_ftl_ext_info, 4
-gp_ftl_ext_info:
-	.space	4
-	.section	.bss.gp_ftl_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR46,. + 0
-	.type	gp_ftl_info, %object
-	.size	gp_ftl_info, 4
-gp_ftl_info:
-	.space	4
-	.section	.bss.gp_nandc,"aw",%nobits
+	.global	flash_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_flush, %function
+flash_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2940
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2929
+	ldr	r2, .L2940+4
+	mov	r1, #324
+	ldr	r0, .L2940+8
+	bl	printf
+.L2929:
+	ldr	r5, .L2940+12
+	movs	r2, #64
+	ldr	r6, .L2940+16
+	movs	r1, #0
+	movs	r7, #0
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L2940+20
+	bl	rknand_print_hex
+	ldr	r4, [r6]
+	ldr	r1, [r4, #8]
+	add	r0, r4, #16
+	bl	js_hash
+	str	r5, [sp, #8]
+	ldr	r5, .L2940+24
+	str	r0, [r4, #12]
+	mov	r8, r5
+.L2930:
+	ldr	fp, .L2940+44
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	ldrh	r4, [r5, #2]
+	ldrh	r3, [fp]
+	mov	r1, r10
+	ldr	r0, .L2940+28
+	mov	r2, r4
+	str	r3, [sp, #12]
+	bl	printf
+	ldr	r2, .L2940+32
+	ldrh	r0, [r5, #2]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r0, r2
+	blt	.L2931
+	ldr	r4, [r6]
+	mov	r10, #0
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	strh	r10, [r5, #2]	@ movhi
+	ldr	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	strb	r2, [r5, #1]
+	ldrh	r2, [r4, #16]
+	strb	r3, [r5]
+	str	r3, [sp, #12]
+	adds	r2, r2, #1
+	strh	r2, [r0, #16]!	@ movhi
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	str	r0, [r4, #12]
+	mov	r0, r10
+	ldrh	r4, [fp]
+	muls	r4, r3, r4
+	mov	r1, r4
+.L2939:
+	bl	flash_erase_block
+.L2932:
+	ldr	r2, [r6]
+	mov	r10, #1
+	ldr	r3, [sp, #8]
+	movs	r0, #0
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3]
+	str	r1, [r3]
+	ldr	r1, .L2940+36
+	str	r1, [r3, #4]
+	movs	r1, #4
+	stm	sp, {r1, r10}
+	mov	r1, r4
+	bl	flash_prog_page_en
+	ldrh	r3, [r8, #2]
+	adds	r0, r0, #1
+	add	r3, r3, r10
+	strh	r3, [r8, #2]	@ movhi
+	bne	.L2933
+	mov	r1, r4
+	ldr	r0, .L2940+40
+	bl	printf
+	b	.L2930
+.L2935:
+	mov	r7, r10
+	b	.L2930
+.L2931:
+	mla	r4, r10, r3, r4
+	cmp	r0, #0
+	bne	.L2932
+	mov	r1, r4
+	b	.L2939
+.L2933:
+	cmp	r7, #0
+	beq	.L2935
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2941:
 	.align	2
-	.set	.LANCHOR6,. + 0
-	.type	gp_nandc, %object
-	.size	gp_nandc, 4
-gp_nandc:
-	.space	4
-	.section	.bss.lpa_hash,"aw",%nobits
+.L2940:
+	.word	.LANCHOR14
+	.word	.LANCHOR193
+	.word	.LC90
+	.word	.LANCHOR194
+	.word	.LANCHOR27
+	.word	.LC166
+	.word	.LANCHOR195
+	.word	.LC167
+	.word	.LANCHOR140
+	.word	1398362953
+	.word	.LC168
+	.word	.LANCHOR2
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.flash_info_blk_init,"ax",%progbits
 	.align	1
-	.set	.LANCHOR81,. + 0
-	.type	lpa_hash, %object
-	.size	lpa_hash, 512
-lpa_hash:
-	.space	512
-	.section	.bss.lpa_hash_index,"aw",%nobits
-	.align	2
-	.set	.LANCHOR83,. + 0
-	.type	lpa_hash_index, %object
-	.size	lpa_hash_index, 4
-lpa_hash_index:
-	.space	4
-	.section	.bss.nandc_hw_seed,"aw",%nobits
-	.set	.LANCHOR28,. + 0
-	.type	nandc_hw_seed, %object
-	.size	nandc_hw_seed, 1
-nandc_hw_seed:
-	.space	1
-	.section	.bss.nandc_randomizer_en,"aw",%nobits
-	.set	.LANCHOR29,. + 0
-	.type	nandc_randomizer_en, %object
-	.size	nandc_randomizer_en, 1
-nandc_randomizer_en:
-	.space	1
-	.section	.bss.p_free_buf_head,"aw",%nobits
-	.set	.LANCHOR37,. + 0
-	.type	p_free_buf_head, %object
-	.size	p_free_buf_head, 1
-p_free_buf_head:
-	.space	1
-	.section	.bss.p_read_ahead_ext_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR50,. + 0
-	.type	p_read_ahead_ext_buf, %object
-	.size	p_read_ahead_ext_buf, 4
-p_read_ahead_ext_buf:
-	.space	4
-	.section	.bss.pm_gc_enable,"aw",%nobits
-	.align	2
-	.set	.LANCHOR91,. + 0
-	.type	pm_gc_enable, %object
-	.size	pm_gc_enable, 4
-pm_gc_enable:
-	.space	4
-	.section	.bss.pm_last_load_ram_id,"aw",%nobits
-	.set	.LANCHOR151,. + 0
-	.type	pm_last_load_ram_id, %object
-	.size	pm_last_load_ram_id, 1
-pm_last_load_ram_id:
-	.space	1
-	.section	.bss.pm_last_update_ram_id,"aw",%nobits
-	.set	.LANCHOR94,. + 0
-	.type	pm_last_update_ram_id, %object
-	.size	pm_last_update_ram_id, 1
-pm_last_update_ram_id:
-	.space	1
-	.section	.bss.pm_ram_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR93,. + 0
-	.type	pm_ram_info, %object
-	.size	pm_ram_info, 256
-pm_ram_info:
-	.space	256
-	.section	.bss.read_ahead_lpa,"aw",%nobits
-	.align	2
-	.set	.LANCHOR49,. + 0
-	.type	read_ahead_lpa, %object
-	.size	read_ahead_lpa, 4
-read_ahead_lpa:
-	.space	4
-	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR62,. + 0
-	.type	sblk_gc_write_completed_queue_head, %object
-	.size	sblk_gc_write_completed_queue_head, 1
-sblk_gc_write_completed_queue_head:
-	.space	1
-	.section	.bss.sblk_queue_head,"aw",%nobits
-	.set	.LANCHOR90,. + 0
-	.type	sblk_queue_head, %object
-	.size	sblk_queue_head, 1
-sblk_queue_head:
-	.space	1
-	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR51,. + 0
-	.type	sblk_read_completed_queue_head, %object
-	.size	sblk_read_completed_queue_head, 1
-sblk_read_completed_queue_head:
-	.space	1
-	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
-	.set	.LANCHOR88,. + 0
-	.type	sblk_write_completed_queue_head, %object
-	.size	sblk_write_completed_queue_head, 1
-sblk_write_completed_queue_head:
-	.space	1
-	.section	.bss.write_buf_count,"aw",%nobits
-	.set	.LANCHOR43,. + 0
-	.type	write_buf_count, %object
-	.size	write_buf_count, 1
-write_buf_count:
-	.space	1
-	.section	.bss.write_buf_head,"aw",%nobits
-	.set	.LANCHOR42,. + 0
-	.type	write_buf_head, %object
-	.size	write_buf_head, 1
-write_buf_head:
-	.space	1
-	.section	.bss.write_commit_count,"aw",%nobits
-	.set	.LANCHOR89,. + 0
-	.type	write_commit_count, %object
-	.size	write_commit_count, 1
-write_commit_count:
-	.space	1
-	.section	.bss.write_commit_head,"aw",%nobits
-	.set	.LANCHOR127,. + 0
-	.type	write_commit_head, %object
-	.size	write_commit_head, 1
-write_commit_head:
-	.space	1
-	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.global	flash_info_blk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2971
+	ldr	r4, .L2971+4
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L2943
+	ldr	r3, [r4]
+	movs	r1, #50
+	ldr	r2, .L2971+8
+	ldr	r0, .L2971+12
+	str	r3, [sp]
+	mov	r3, #2048
+	bl	printf
+.L2943:
+	ldr	r7, .L2971+16
+	movs	r6, #4
+.L2946:
+	ldr	r10, .L2971+32
+	mov	r8, #4
+	ldr	r5, .L2971+20
+	movs	r0, #0
+	ldr	r2, [r4]
+	ldrh	r1, [r10]
+	ldr	r3, [r5]
+	str	r8, [sp]
+	muls	r1, r6, r1
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L2944
+	ldr	r2, [r4]
+	ldr	r3, [r2]
+	cmp	r3, r7
+	beq	.L2945
+.L2944:
+	adds	r6, r6, #1
+	cmp	r6, #16
+	bne	.L2946
+.L2970:
+	mov	r0, #-1
+.L2942:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2954:
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	cmp	r2, r7
+	bne	.L2955
+	ldr	r8, [r3, #4]
+.L2948:
+	ldrh	r0, [r10]
+	movs	r3, #4
+	ldrb	r1, [r6, #1]	@ zero_extendqisi2
+	ldr	r2, [r4]
+	str	r3, [sp]
+	ldr	r3, [r5]
+	muls	r1, r0, r1
+	movs	r0, #0
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L2949
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	cmp	r2, r7
+	bne	.L2949
+	ldr	r2, [r3, #4]
+	cmp	r8, r2
+	itttt	cc
+	ldrbcc	r2, [r3, #37]	@ zero_extendqisi2
+	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
+	strbcc	r2, [r6]
+	strbcc	r3, [r6, #1]
+.L2949:
+	mov	r8, #4
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	ldr	r3, [r5]
+	movs	r0, #0
+	str	r8, [sp]
+	ldr	r2, [r4]
+	bl	flash_get_last_written_page
+	uxth	fp, r0
+	ldrh	r10, [r10]
+	add	r3, fp, #1
+	strh	r3, [r6, #2]	@ movhi
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	movs	r6, #0
+	mla	r10, r10, r3, r0
+.L2950:
+	sub	r0, fp, r6
+	sxth	r3, r0
+	cmp	r3, #0
+	bge	.L2953
+	adds	r2, r3, #1
+	bne	.L2952
+	ldr	r2, [r4]
+	ldr	r0, .L2971+24
+	str	r3, [sp, #12]
+	ldr	r1, [r2]
+	bl	printf
+	b	.L2970
+.L2953:
+	str	r8, [sp]
+	sub	r1, r10, r6
+	ldr	r3, [r5]
+	movs	r0, #0
+	ldr	r2, [r4]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L2951
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	cmp	r3, r7
+	beq	.L2952
+.L2951:
+	adds	r6, r6, #1
+	b	.L2950
+.L2952:
+	cmp	r6, #1
+	bls	.L2956
+	bl	flash_info_flush
+.L2956:
+	movs	r0, #0
+	b	.L2942
+.L2945:
+	ldrb	r1, [r2, #36]	@ zero_extendqisi2
+	ldrh	r0, [r10]
+	ldrb	r3, [r2, #37]	@ zero_extendqisi2
+	ldr	r6, .L2971+28
+	strb	r1, [r6]
+	muls	r1, r0, r1
+	strb	r3, [r6, #1]
+	movs	r0, #0
+	str	r8, [sp]
+	ldr	r3, [r5]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	bne	.L2954
+.L2955:
+	mov	r8, #0
+	b	.L2948
+.L2972:
+	.align	2
+.L2971:
+	.word	.LANCHOR14
+	.word	.LANCHOR27
+	.word	.LANCHOR196
+	.word	.LC169
+	.word	1398362953
+	.word	.LANCHOR194
+	.word	.LC170
+	.word	.LANCHOR195
+	.word	.LANCHOR2
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.nand_flash_init,"ax",%progbits
 	.align	1
-	.set	.LANCHOR142,. + 0
-	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 768
-NandFlashParaTbl:
-	.byte	6
-	.byte	-104
-	.byte	58
-	.byte	-104
-	.byte	-77
-	.byte	118
-	.byte	114
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	768
-	.byte	3
-	.byte	2
-	.short	758
-	.short	5593
-	.byte	0
-	.byte	37
-	.byte	60
-	.byte	32
-	.byte	2
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	60
-	.byte	-104
-	.byte	-77
-	.byte	118
-	.byte	114
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	768
-	.byte	3
-	.byte	2
-	.short	1478
-	.short	5593
-	.byte	0
-	.byte	37
-	.byte	60
-	.byte	32
-	.byte	2
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	58
-	.byte	-104
-	.byte	-93
-	.byte	118
-	.byte	81
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	384
-	.byte	3
-	.byte	2
-	.short	1446
-	.short	1497
-	.byte	0
-	.byte	36
-	.byte	60
-	.byte	32
-	.byte	2
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	-34
-	.byte	-108
-	.byte	-109
-	.byte	118
-	.byte	81
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	256
-	.byte	2
-	.byte	2
-	.short	1074
-	.short	17881
-	.byte	2
-	.byte	35
-	.byte	40
-	.byte	32
-	.byte	3
-	.byte	1
-	.byte	4
-	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	-104
-	.byte	-34
-	.byte	-124
-	.byte	-109
-	.byte	114
-	.byte	87
-	.byte	1
-	.byte	1
-	.byte	32
-	.short	256
-	.byte	2
-	.byte	1
-	.short	2092
-	.short	17857
-	.byte	2
-	.byte	33
-	.byte	40
-	.byte	32
-	.byte	2
-	.byte	1
+	.global	nand_flash_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nand_flash_init, %function
+nand_flash_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r6, .L3055
+	ldr	r3, [r6]
+	lsls	r7, r3, #19
+	bpl	.L2974
+	ldr	r2, .L3055+4
+	movw	r1, #2490
+	ldr	r0, .L3055+8
+	bl	printf
+.L2974:
+	ldr	r3, .L3055+12
+	mov	r0, r4
+	ldr	r7, .L3055+16
+	movs	r5, #0
+	ldr	r4, .L3055+20
+	str	r5, [r3]
+	mov	r8, r7
+	bl	nandc_init
+	ldr	r3, .L3055+24
+	movs	r2, #1
+	str	r4, [r7]
+	mov	r1, r5
+	ldr	r7, .L3055+28
+	strb	r2, [r3]
+	movs	r2, #8
+	ldr	r0, .L3055+32
+	mov	r10, r7
+	bl	ftl_memset
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L3055+36
+	bl	ftl_memset
+.L2980:
+	lsl	fp, r5, #3
+	uxtb	r0, r5
+	add	r1, r7, fp
+	bl	flash_read_id
+	cbnz	r5, .L2975
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bls	.L2976
+.L2978:
+	mvn	r10, #1
+.L2973:
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2976:
+	ldrb	r3, [r7, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2978
+.L2975:
+	ldrb	r3, [r10, fp]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r10, fp]
+	cmp	r5, #4
+	bne	.L2980
+	ldr	r7, .L3055+40
+	movs	r5, #0
+	ldr	r3, .L3055+28
+.L2983:
+	mov	r1, r3
+	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
+	mov	r0, r7
+	str	r3, [sp, #4]
+	lsl	fp, r5, #5
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cmp	r0, #0
+	bne	.L2981
+	ldr	r5, .L3055+44
+	ldr	r3, .L3055+48
+	add	r5, r5, fp
+	ldrb	r2, [r5, #22]	@ zero_extendqisi2
+	mov	r1, r3
+.L2982:
+	lsls	r7, r0, #5
+	ldrb	r7, [r7, r3]	@ zero_extendqisi2
+	cmp	r7, r2
+	beq	.L2984
+	adds	r0, r0, #1
+	cmp	r0, #4
+	bne	.L2982
+.L2984:
+	add	r1, r1, r0, lsl #5
+	movs	r2, #32
+	ldr	r0, .L3055+52
+	bl	ftl_memcpy
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L3055+20
+	bl	ftl_memcpy
+	ldr	r2, .L3055+56
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	mov	fp, r2
+	cmp	r3, #8
+	bhi	.L2985
+	ldrb	r2, [r4, #20]	@ zero_extendqisi2
+	cmp	r2, #60
+	bls	.L2986
+	movs	r2, #60
+	strb	r2, [r4, #20]
+.L2986:
+	cmp	r3, #8
+	bne	.L2985
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r3, #44
+	beq	.L2987
+	cmp	r3, #137
+	bne	.L2985
+.L2987:
+	ldrb	r3, [r4, #28]	@ zero_extendqisi2
+	cmp	r3, #3
+	itt	eq
+	moveq	r3, #0
+	strbeq	r3, [r4, #28]
+.L2985:
+	ldr	r3, [r6]
+	lsls	r5, r3, #19
+	bpl	.L2988
+	ldr	r2, .L3055+4
+	movw	r1, #2515
+	ldr	r0, .L3055+8
+	bl	printf
+.L2988:
+	mov	r0, #16384
+	ldr	r7, .L3055+60
+	bl	ftl_malloc
+	ldr	r3, .L3055+64
+	mov	r10, #0
+	str	r0, [r3]
+	mov	r0, #16384
+	bl	ftl_malloc
+	ldr	r3, .L3055+68
+	str	r0, [r3]
+	mov	r0, #2048
+	bl	ftl_malloc
+	str	r0, [r7]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L3055+72
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L3055+76
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L3055+80
+	str	r0, [r3]
+	ldr	r3, .L3055+84
+	strb	r10, [r3]
+	bl	flash_die_info_init
+	ldrb	r0, [r4, #18]	@ zero_extendqisi2
+	bl	flash_lsb_page_tbl_build
+	ldrb	r0, [r4, #20]	@ zero_extendqisi2
+	bl	nandc_bch_sel
+	ldr	r2, [r8]
+	ldr	r1, .L3055+88
+	ldrh	r3, [r2, #16]
+	ldrb	r2, [r2, #28]	@ zero_extendqisi2
+	mov	r8, r1
+	ubfx	r0, r3, #8, #3
+	ubfx	r5, r3, #3, #1
+	strb	r0, [r1]
+	ldr	r0, .L3055+92
+	strb	r5, [r0]
+	ubfx	r5, r3, #4, #1
+	ldr	r0, .L3055+96
+	strb	r5, [r0]
+	ubfx	r5, r3, #12, #1
+	ldr	r0, .L3055+100
+	strb	r5, [r0]
+	ubfx	r5, r3, #13, #1
+	ldr	r0, .L3055+104
+	strb	r5, [r0]
+	ubfx	r5, r3, #14, #1
+	ldr	r0, .L3055+108
+	lsrs	r3, r3, #15
+	strb	r5, [r0]
+	ldr	r0, .L3055+112
+	ldr	r5, .L3055+116
+	strb	r3, [r0]
+	movs	r0, #60
+	ldr	r3, .L3055+120
+	str	r10, [r5]
+	strb	r2, [r3]
+	ldr	r3, .L3055+124
+	strb	r0, [r3]
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	cmp	r0, #9
+	itt	eq
+	moveq	r1, #70
+	strbeq	r1, [r3]
+	ldr	r3, .L3055+128
+	ldrh	r1, [r4, #16]
+	strb	r2, [r3]
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	cmp	r2, #9
+	itt	eq
+	moveq	r2, #0
+	strbeq	r2, [r3]
+	tst	r1, #64
+	ldrb	r3, [r4, #19]	@ zero_extendqisi2
+	ldr	r2, .L3055+132
+	strb	r3, [r2]
+	mov	r4, r2
+	beq	.L2992
+	sub	r2, r3, #17
+	cmp	r2, #2
+	bls	.L2993
+	cmp	r3, #21
+	bne	.L2994
+.L2993:
+	ldr	r2, .L3055+136
+	cmp	r3, #21
+	ldr	r3, .L3055+140
+	str	r2, [r5]
+	beq	.L3054
+	movs	r2, #15
+.L3052:
+	strb	r2, [r3]
+.L2992:
+	ldr	r3, [r6]
+	lsls	r0, r3, #19
+	bpl	.L3004
+	ldr	r2, .L3055+4
+	movw	r1, #2573
+	ldr	r0, .L3055+8
+	bl	printf
+.L3004:
+	ldr	r3, .L3055+144
+	movs	r2, #0
+	movs	r0, #4
+	strb	r2, [r3]
+	mov	fp, r3
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	tst	r2, #1
+	beq	.L3005
+	bl	nandc_set_if_mode
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+.L3005:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	cmp	r0, #-1
+	mov	r10, r0
+	bne	.L3007
+	ldr	r3, [r6]
+	lsls	r1, r3, #19
+	bpl	.L3008
+	ldr	r2, .L3055+4
+	movw	r1, #2605
+	ldr	r0, .L3055+8
+	bl	printf
+.L3008:
+	ldr	r3, [r7]
+	movs	r2, #17
+	movs	r0, #0
+	strb	r2, [r3, #32]
+	bl	zftl_flash_exit_slc_mode
+	b	.L2973
+.L2981:
+	adds	r5, r5, #1
+	adds	r7, r7, #32
+	cmp	r5, #38
+	bne	.L2983
+	b	.L2978
+.L2994:
+	cmp	r3, #33
+	beq	.L2997
+	sub	r2, r3, #65
+	cmp	r2, #1
+	bhi	.L2998
+.L2997:
+	ldr	r3, .L3055+148
+	movs	r2, #4
+	str	r3, [r5]
+	ldr	r3, .L3055+152
+	strb	r2, [r3]
+.L3053:
+	movs	r2, #7
+	ldr	r3, .L3055+140
+	b	.L3052
+.L2998:
+	sub	r2, r3, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L2999
+	sub	r1, r3, #34
+	cmp	r1, #1
+	bhi	.L3000
+.L2999:
+	ldr	r1, .L3055+148
+	cmp	r3, #35
+	str	r1, [r5]
+	ldr	r1, .L3055+140
+	beq	.L3001
+	cmp	r3, #68
+	beq	.L3001
+	movs	r3, #7
+.L3051:
+	cmp	r2, #1
+	strb	r3, [r1]
+	ldr	r3, .L3055+152
+	bhi	.L3003
+.L3054:
+	movs	r2, #4
+	b	.L3052
+.L3001:
+	movs	r3, #17
+	b	.L3051
+.L3003:
+	movs	r2, #5
+	b	.L3052
+.L3000:
+	subs	r3, r3, #36
+	cmp	r3, #1
+	bhi	.L2992
+	ldr	r3, .L3055+156
+	str	r3, [r5]
+	b	.L3053
+.L3056:
+	.align	2
+.L3055:
+	.word	.LANCHOR14
+	.word	.LANCHOR197
+	.word	.LC90
+	.word	.LANCHOR160
+	.word	.LANCHOR16
+	.word	.LANCHOR31
+	.word	.LANCHOR18
+	.word	.LANCHOR42
+	.word	.LANCHOR30
+	.word	.LANCHOR141
+	.word	.LANCHOR198+1
+	.word	.LANCHOR198
+	.word	.LANCHOR199
+	.word	.LANCHOR20
+	.word	.LANCHOR28
+	.word	.LANCHOR27
+	.word	.LANCHOR164
+	.word	.LANCHOR156
+	.word	.LANCHOR163
+	.word	.LANCHOR158
+	.word	.LANCHOR194
+	.word	.LANCHOR200
+	.word	.LANCHOR43
+	.word	.LANCHOR168
+	.word	.LANCHOR39
+	.word	.LANCHOR75
+	.word	.LANCHOR72
+	.word	.LANCHOR1
+	.word	.LANCHOR73
+	.word	.LANCHOR162
+	.word	.LANCHOR0
+	.word	.LANCHOR17
+	.word	.LANCHOR19
+	.word	.LANCHOR23
+	.word	micron_read_retrial
+	.word	.LANCHOR159
+	.word	.LANCHOR21
+	.word	toshiba_read_retrial
+	.word	.LANCHOR26
+	.word	toshiba_3d_read_retrial
+.L3007:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #7
+	itt	ls
+	ldrls	r3, .L3057
+	strls	r3, [r5]
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	lsls	r2, r3, #29
+	bpl	.L3011
+	ldr	r3, [r7]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cbz	r3, .L3011
+	ldr	r2, .L3057+4
+	movs	r0, #0
+	ldr	r3, .L3057+8
+	ldrh	r1, [r2]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r1, r3, r1
+	bl	flash_ddr_para_scan
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cbnz	r3, .L3011
+	ldr	r2, [r7]
+	strb	r3, [r2, #19]
+	bl	flash_info_flush
+.L3011:
+	ldr	r3, [r6]
+	lsls	r3, r3, #19
+	bpl	.L3013
+	ldr	r2, .L3057+12
+	movw	r1, #2671
+	ldr	r0, .L3057+16
+	bl	printf
+.L3013:
+	bl	nand_flash_print_info
+	mov	r10, #0
+	b	.L2973
+.L3058:
+	.align	2
+.L3057:
+	.word	hynix_read_retrial
+	.word	.LANCHOR2
+	.word	.LANCHOR195
+	.word	.LANCHOR197
+	.word	.LC90
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sysblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r0
+	sub	sp, sp, #48
+	movs	r0, #1
+	movs	r6, #0
+	bl	buf_alloc
+	ldr	r3, [r0, #4]
+	mov	r4, r0
+	mov	r5, r6
+	str	r3, [sp, #44]
+.L3060:
+	ldr	r3, .L3069
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L3062
+	ldr	r1, [sp, #44]
+	movs	r3, #32
+	ldr	r0, .L3069+4
+	movs	r2, #4
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	mov	r0, r4
+	bl	buf_free
+	cbz	r5, .L3063
+	movw	r2, #1351
+	ldr	r1, .L3069+8
+	ldr	r0, .L3069+12
+	bl	printf
+.L3063:
+	mov	r0, r5
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3062:
+	ldr	r3, .L3069+16
+	uxth	r7, r6
+	ldr	r2, [r4, #12]
+	ldr	r1, [r4, #4]
+	ldrh	r8, [r3]
+	ldr	r3, .L3069+20
+	mla	r8, fp, r8, r7
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r8
+	bl	ftl_read_ppa_page
+	ldr	r2, [r4, #12]
+	mov	r10, r0
+	ldr	r3, [r4, #4]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, fp
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	mov	r2, r7
+	ldr	r3, [r3]
+	str	r0, [sp]
+	ldr	r0, .L3069+24
+	str	r3, [sp, #4]
+	mov	r3, r8
+	bl	printf
+	cmp	r10, #-1
+	beq	.L3064
+	cmp	r10, #512
+	it	eq
+	moveq	r5, #1
+.L3061:
+	adds	r6, r6, #1
+	b	.L3060
+.L3064:
+	movs	r5, #1
+	b	.L3061
+.L3070:
+	.align	2
+.L3069:
+	.word	.LANCHOR85
+	.word	.LC171
+	.word	.LANCHOR201
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	.LANCHOR123
+	.word	.LC162
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",%progbits
+	.align	1
+	.global	dump_ftl_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3072
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r0, .L3072+4
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	printf
+	ldr	r1, .L3072+8
+	ldr	r5, .L3072+12
+	ldr	r0, .L3072+16
+	ldrh	r3, [r1, #2]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, [r5]
+	ldr	r4, .L3072+20
+	ldr	r0, .L3072+24
+	ldrh	r2, [r3, #140]
+	ldrh	r1, [r3, #130]
+	bl	printf
+	ldr	r0, [r4]
+	ldr	r7, .L3072+28
+	ldrh	r6, [r0, #26]
+	ldrb	r3, [r0, #21]	@ zero_extendqisi2
+	ldrh	r2, [r0, #18]
+	ldrh	r1, [r0, #16]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #22]
+	str	r0, [sp]
+	ldr	r0, .L3072+32
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r6, [r0, #58]
+	ldrb	r3, [r0, #53]	@ zero_extendqisi2
+	ldrh	r2, [r0, #50]
+	ldrh	r1, [r0, #48]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #54]
+	ldr	r6, .L3072+36
+	str	r0, [sp]
+	ldr	r0, .L3072+40
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r4, [r0, #90]
+	ldrb	r3, [r0, #85]	@ zero_extendqisi2
+	ldrh	r2, [r0, #82]
+	ldrh	r1, [r0, #80]
+	str	r4, [sp, #4]
+	ldrh	r0, [r0, #86]
+	ldr	r4, .L3072+44
+	str	r0, [sp]
+	ldr	r0, .L3072+48
+	bl	printf
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L3072+52
+	ldr	r0, .L3072+56
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #4
+	lsls	r3, r3, #1
+	bl	rknand_print_hex
+	ldr	r1, .L3072+60
+	movs	r2, #2
+	ldrh	r3, [r7]
+	ldr	r0, .L3072+64
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, [r5]
+	movs	r2, #4
+	ldr	r0, .L3072+68
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldr	r1, .L3072+72
+	movs	r2, #4
+	ldrh	r3, [r7]
+	ldr	r0, .L3072+76
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	mov	r3, #256
+	movs	r2, #2
+	ldr	r1, .L3072+80
+	ldr	r0, .L3072+84
+	bl	rknand_print_hex
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L3072+88
+	ldr	r0, .L3072+92
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #2
+	lsls	r3, r3, #1
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, lr}
+	b	rknand_print_hex
+.L3073:
+	.align	2
+.L3072:
+	.word	.LANCHOR52
+	.word	.LC172
+	.word	.LANCHOR179
+	.word	.LANCHOR102
+	.word	.LC173
+	.word	.LANCHOR10
+	.word	.LC174
+	.word	.LANCHOR6
+	.word	.LC175
+	.word	.LANCHOR85
+	.word	.LC176
+	.word	.LANCHOR78
+	.word	.LC177
+	.word	.LANCHOR109
+	.word	.LC178
+	.word	.LANCHOR9
+	.word	.LC179
+	.word	.LC171
+	.word	.LANCHOR7
+	.word	.LC180
+	.word	.LANCHOR108
+	.word	.LC181
+	.word	.LANCHOR110
+	.word	.LC182
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",%progbits
+	.align	1
+	.global	pm_ppa_update_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L3081
+	movs	r4, #1
+	mov	r6, r1
+	mov	r7, r2
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsls	r4, r4, r3
+	ldr	r3, .L3081+4
+	lsr	r0, r2, r0
+	subs	r4, r4, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L3081+8
+	uxth	r0, r0
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #2
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	cmp	r1, #1
+	beq	.L3075
+	cmp	r1, #7
+	bne	.L3077
+.L3075:
+	mov	r3, r7
+	mov	r2, r6
+	mov	r1, r5
+	ldr	r0, .L3081+12
+	bl	printf
+	bl	dump_ftl_info
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3077:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L3082:
+	.align	2
+.L3081:
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR7
+	.word	.LC183
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #31
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	mov	r5, r1
+	bls	.L3084
+	movs	r2, #31
+	ldr	r1, .L3092
+	ldr	r0, .L3092+4
+	bl	printf
+.L3084:
+	ldr	r8, .L3092+44
+	ldr	r3, [r8]
+	ldrh	r2, [r3, #698]
+	cmp	r2, r4
+	bcs	.L3085
+	mov	r1, r4
+	ldr	r0, .L3092+8
+	bl	printf
+	ldr	r3, .L3092+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+	movs	r3, #0
+	ldr	r0, [r3, #4]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	ldrh	r3, [r3, #698]
+	cmp	r3, r4
+	bcs	.L3087
+	movs	r2, #35
+.L3091:
+	ldr	r1, .L3092
+	ldr	r0, .L3092+4
+	bl	printf
+	b	.L3087
+.L3085:
+	add	r2, r4, #176
+	ldr	r7, [r3, r2, lsl #2]
+	ldr	r3, .L3092+16
+	strh	r4, [r3, r5, lsl #3]	@ movhi
+	add	r5, r3, r5, lsl #3
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	cbnz	r7, .L3088
+	mov	r2, r7
+	mov	r1, r4
+	ldr	r0, .L3092+20
+	bl	printf
+	ldr	r3, .L3092+12
+	movs	r1, #255
+	ldr	r0, [r5, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L3087:
+	movs	r0, #0
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L3088:
+	ldr	r6, .L3092+24
+	mov	r0, r7
+	ldr	r10, .L3092+48
+	ldr	r1, [r5, #4]
+	ldr	r2, [r6]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r2, [r6]
+	mov	r3, r0
+	ldr	r2, [r2]
+	cmp	r2, r4
+	beq	.L3089
+	mov	r1, r4
+	str	r7, [sp]
+	ldr	r0, .L3092+28
+	bl	printf
+	ldr	r1, [r8]
+	movs	r2, #4
+	ldr	r0, .L3092+32
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	movs	r2, #4
+	ldr	r1, [r5, #4]
+	ldr	r0, .L3092+36
+	lsls	r3, r3, #7
+	bl	rknand_print_hex
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L3092+40
+	bl	rknand_print_hex
+.L3089:
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	cmp	r4, r3
+	beq	.L3087
+	movs	r2, #59
+	b	.L3091
+.L3093:
+	.align	2
+.L3092:
+	.word	.LANCHOR202
+	.word	.LC0
+	.word	.LC184
+	.word	.LANCHOR203
+	.word	.LANCHOR132
+	.word	.LC185
+	.word	.LANCHOR191
+	.word	.LC186
+	.word	.LC187
+	.word	.LC188
+	.word	.LC189
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",%progbits
+	.align	1
+	.global	pm_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_gc, %function
+pm_gc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L3106
+	ldr	r5, .L3106+4
+	ldr	r3, [r4]
+	ldrh	r2, [r3, #688]
+	ldrh	r3, [r5]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L3096
+	bl	pm_free_sblk
+	ldr	r2, [r4]
+	ldrh	r3, [r5]
+	ldrh	r1, [r2, #688]
+	subs	r3, r3, #1
+	cmp	r1, r3
+	blt	.L3096
+	uxth	r0, r0
+	movw	r3, #65535
+	adds	r0, r0, #208
+	ldrh	r7, [r2, r0, lsl #1]
+	cmp	r7, r3
+	bne	.L3098
+	movs	r2, #131
+	ldr	r1, .L3106+8
+	ldr	r0, .L3106+12
+	bl	printf
+	bl	pm_free_sblk
+	ldr	r3, [r4]
+	uxth	r0, r0
+	adds	r0, r0, #208
+	ldrh	r7, [r3, r0, lsl #1]
+.L3098:
+	ldr	r5, .L3106+16
+	bl	pm_select_ram_region
+	mov	r6, r0
+	movw	r3, #65535
+	ldrh	r0, [r5, r0, lsl #3]
+	cmp	r0, r3
+	beq	.L3099
+	add	r8, r5, r6, lsl #3
+	ldr	r1, [r8, #4]
+	cbz	r1, .L3099
+	ldrsh	r3, [r8, #2]
+	cmp	r3, #0
+	bge	.L3099
+	bl	pm_write_page
+	ldrh	r3, [r8, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r8, #2]	@ movhi
+.L3099:
+	mov	fp, #0
+.L3100:
+	ldr	r1, [r4]
+	uxth	r10, fp
+	ldrh	r0, [r1, #698]
+	cmp	r0, r10
+	bhi	.L3102
+	bl	pm_free_sblk
+.L3096:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3102:
+	ldr	r3, .L3106+20
+	uxth	r8, fp
+	add	ip, r8, #176
+	ldrh	r0, [r3]
+	ldr	r1, [r1, ip, lsl #2]
+	ldr	r3, .L3106+24
+	lsr	ip, r1, r0
+	rsb	r1, r0, #21
+	movs	r0, #1
+	lsls	r0, r0, r1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	subs	r0, r0, #1
+	and	r0, ip, r0
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	cmp	r0, r7
+	bne	.L3101
+	mov	r1, r6
+	mov	r0, r10
+	bl	load_l2p_region
+	add	r2, r5, r6, lsl #3
+	mov	r0, r8
+	ldr	r1, [r2, #4]
+	bl	pm_write_page
+	movw	r2, #65535
+	strh	r2, [r5, r6, lsl #3]	@ movhi
+.L3101:
+	add	fp, fp, #1
+	b	.L3100
+.L3107:
+	.align	2
+.L3106:
+	.word	.LANCHOR102
+	.word	.LANCHOR146
+	.word	.LANCHOR204
+	.word	.LC0
+	.word	.LANCHOR132
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",%progbits
+	.align	1
+	.global	pm_flush_id
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush_id, %function
+pm_flush_id:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3113
+	push	{r4, lr}
+	add	r4, r3, r0, lsl #3
+	ldrh	r0, [r3, r0, lsl #3]
+	ldr	r1, [r4, #4]
+	bl	pm_write_page
+	ldrh	r3, [r4, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r4, .L3113+4
+	ldr	r3, [r4]
+	cbz	r3, .L3109
+	bl	pm_gc
+	movs	r3, #0
+	str	r3, [r4]
+.L3109:
+	movs	r0, #0
+	pop	{r4, pc}
+.L3114:
+	.align	2
+.L3113:
+	.word	.LANCHOR132
+	.word	.LANCHOR130
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",%progbits
+	.align	1
+	.global	pm_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush, %function
+pm_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L3119
+.L3117:
+	add	r3, r5, r4, lsl #3
+	uxth	r0, r4
+	ldrsh	r3, [r3, #2]
+	cmp	r3, #0
+	bge	.L3116
+	bl	pm_flush_id
+.L3116:
+	adds	r4, r4, #1
+	cmp	r4, #32
+	bne	.L3117
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L3120:
+	.align	2
+.L3119:
+	.word	.LANCHOR132
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",%progbits
+	.align	1
+	.global	flt_sys_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	pop	{r3, lr}
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	zftl_flash_de_init
+	bl	flt_sys_flush
+	pop	{r3, lr}
+	b	zftl_flash_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.zftl_deinit,"ax",%progbits
+	.align	1
+	.global	zftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_deinit, %function
+zftl_deinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	rk_ftl_de_init
+	.size	zftl_deinit, .-zftl_deinit
+	.section	.text.pm_init,"ax",%progbits
+	.align	1
+	.global	pm_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_init, %function
+pm_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L3141
+	movs	r2, #1
+	mov	r10, r0
+	movs	r0, #64
+	ldr	r5, .L3141+4
+	str	r4, [r3]
+	ldr	r3, .L3141+8
+	mov	r7, r5
+	strb	r2, [r3]
+	bl	ftl_malloc
+	ldr	r3, .L3141+12
+	mov	r8, r3
+	str	r0, [r3]
+.L3126:
+	movw	r3, #65535
+	adds	r6, r5, r4
+	strh	r3, [r4, r5]	@ movhi
+	movs	r3, #0
+	strh	r3, [r6, #2]	@ movhi
+	cmp	r10, #0
+	beq	.L3125
+	ldr	r3, .L3141+16
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r6, #4]
+.L3125:
+	adds	r4, r4, #8
+	cmp	r4, #256
+	bne	.L3126
+	ldr	r3, [r7, #4]
+	ldr	r4, .L3141+20
+	ldr	r10, [r8]
+	str	r3, [sp, #12]
+	ldr	r3, [r4]
+	ldr	r2, [sp, #12]
+	ldrh	r1, [r3, #692]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	movs	r3, #4
+	str	r3, [sp]
+	mov	r3, r10
+	bl	flash_get_last_written_page
+	ldr	r1, [r4]
+	mov	r5, r0
+	ldrh	r2, [r1, #696]
+	cmp	r2, r0
+	bgt	.L3127
+	mov	r3, r0
+	ldrh	r1, [r1, #692]
+	ldr	r0, .L3141+24
+	bl	printf
+	ldr	r3, [r4]
+	ldrsh	r6, [r3, #696]
+.L3128:
+	cmp	r6, r5
+	ble	.L3130
+	ldr	r3, .L3141+28
+	movs	r2, #1
+	add	r5, r5, r2
+	strb	r2, [r3]
+	ldr	r3, [r4]
+	strh	r5, [r3, #696]	@ movhi
+	bl	pm_free_sblk
+.L3127:
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r7, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	bl	pm_free_sblk
+	bl	pm_gc
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3130:
+	ldr	r3, [r4]
+	ldr	r2, .L3141+32
+	ldrh	r8, [r3, #692]
+	ldrh	r2, [r2]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	ldr	r3, .L3141+16
+	mla	r8, r2, r8, r6
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r1, r8
+	str	r3, [sp]
+	mov	r3, r10
+	bl	flash_read_page_en
+	ldr	r3, [r4]
+	mov	fp, r0
+	ldr	r0, .L3141+36
+	ldr	r2, [r3, #48]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	mov	r2, r8
+	ldrh	r3, [r3, #694]
+	ldr	r1, [r10]
+	bl	printf
+	cmp	fp, #-1
+	beq	.L3129
+	cmp	fp, #512
+	beq	.L3129
+	ldr	r2, [r4]
+	ldr	r3, [r10]
+	ldrh	r1, [r2, #698]
+	cmp	r3, r1
+	itt	cc
+	addcc	r3, r3, #176
+	strcc	r8, [r2, r3, lsl #2]
+.L3129:
+	adds	r6, r6, #1
+	sxth	r6, r6
+	b	.L3128
+.L3142:
+	.align	2
+.L3141:
+	.word	.LANCHOR130
+	.word	.LANCHOR132
+	.word	.LANCHOR192
+	.word	.LANCHOR191
+	.word	.LANCHOR123
+	.word	.LANCHOR102
+	.word	.LC190
+	.word	.LANCHOR182
+	.word	.LANCHOR103
+	.word	.LC191
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",%progbits
+	.align	1
+	.global	pm_log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_log2phys, %function
+pm_log2phys:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3158
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r0
+	str	r2, [sp, #4]
+	mov	r7, r1
+	ldr	r2, [r3]
+	cmp	r0, r2
+	bcc	.L3144
+	mov	r1, r0
+	ldr	r0, .L3158+4
+	bl	printf
+	ldr	r3, [sp, #4]
+	mov	r0, #-1
+	cbnz	r3, .L3143
+	str	r0, [r7]
+.L3143:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3144:
+	ldr	r3, .L3158+8
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	lsls	r1, r5, #7
+	bl	__aeabi_uidiv
+	ldr	r1, .L3158+12
+	uxth	r6, r0
+	mov	r10, r0
+	movs	r2, #0
+	mov	r8, r1
+.L3150:
+	add	r0, r1, r2, lsl #3
+	uxth	r4, r2
+	ldr	r0, [r0, #4]
+	cbz	r0, .L3146
+	ldrh	r0, [r1, r2, lsl #3]
+	cmp	r0, r6
+	bne	.L3146
+.L3147:
+	lsls	r5, r5, #7
+	ldr	r3, [sp, #4]
+	lsls	r4, r4, #3
+	smulbb	r5, r5, r6
+	sub	r5, fp, r5
+	uxth	r5, r5
+	cbnz	r3, .L3148
+	add	r2, r8, r4
+	ldr	r2, [r2, #4]
+	ldr	r2, [r2, r5, lsl #2]
+	str	r2, [r7]
+.L3149:
+	add	r4, r4, r8
+	movw	r2, #32767
+	ldrh	r3, [r4, #2]
+	ubfx	r1, r3, #0, #15
+	cmp	r1, r2
+	beq	.L3153
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L3153:
+	movs	r0, #0
+	b	.L3143
+.L3148:
+	add	r1, r8, r4
+	ldr	r0, [r7]
+	ldr	r2, [r1, #4]
+	str	r0, [r2, r5, lsl #2]
+	ldrh	r2, [r1, #2]
+	mvn	r2, r2, lsl #17
+	mvn	r2, r2, lsr #17
+	strh	r2, [r1, #2]	@ movhi
+	ldr	r2, .L3158+16
+	strb	r10, [r2]
+	b	.L3149
+.L3146:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L3150
+	bl	pm_select_ram_region
+	ldrh	r1, [r8, r0, lsl #3]
+	movw	r2, #65535
+	mov	r4, r0
+	cmp	r1, r2
+	beq	.L3151
+	add	r2, r8, r0, lsl #3
+	ldrsh	r2, [r2, #2]
+	cmp	r2, #0
+	bge	.L3151
+	bl	pm_flush_id
+.L3151:
+	ldr	r2, .L3158+20
+	mov	r1, r4
+	mov	r0, r6
+	strb	r4, [r2]
+	bl	load_l2p_region
+	b	.L3147
+.L3159:
+	.align	2
+.L3158:
+	.word	.LANCHOR120
+	.word	.LC192
+	.word	.LANCHOR123
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR205
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.gc_recovery,"ax",%progbits
+	.align	1
+	.global	gc_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_recovery, %function
+gc_recovery:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L3216
+	sub	sp, sp, #64
+	ldr	r7, .L3216+4
+	strb	r4, [r3]
+	ldr	r3, .L3216+8
+	ldr	r5, [r7]
+	strb	r4, [r3]
+	bl	gc_init
+	ldrh	r6, [r5, #80]
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L3161
+	ldr	r2, [r7]
+	movs	r0, #1
+	ldr	r6, .L3216+12
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_alloc
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	mov	r4, r0
+	add	r3, r5, r3, lsl #1
+	ldrh	r2, [r3, #94]
+	ldr	r3, .L3216+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r2, #3
+	str	r3, [sp, #56]
+	bne	.L3162
+	ldr	r2, .L3216+20
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	add	r3, r3, r2
+	orr	r3, r3, #50331648
+.L3211:
+	str	r3, [r4, #24]
+.L3163:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r2, r3, #1
+	beq	.L3164
+	cmp	r3, #512
+	beq	.L3164
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3]
+	ldr	r3, .L3216+24
+	cmp	r2, r3
+	beq	.L3165
+.L3164:
+	mov	r0, r4
+	bl	buf_free
+	ldr	r2, [r4, #12]
+	ldr	r3, [r4, #4]
+	ldr	r0, .L3216+28
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #24]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r3, [r3]
+	ldr	r1, [r4, #24]
+	movs	r4, #0
+	bl	printf
+	ldr	r3, .L3216+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+.L3215:
+	ldrh	r2, [r5, #80]
+	strh	r2, [r3, #130]	@ movhi
+.L3166:
+	ldrh	r0, [r5, #80]
+	bl	ftl_dump_write_open_sblk
+	mov	r2, r4
+	ldrh	r1, [r5, #80]
+	movw	r4, #65535
+	ldr	r0, .L3216+36
+	bl	printf
+	strh	r4, [r5, #80]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, .L3216+4
+	ldr	r2, [r3]
+	ldrh	r0, [r2, #130]
+	cmp	r0, r4
+	mov	r4, r3
+	beq	.L3193
+	bl	ftl_free_sblk
+.L3193:
+	ldr	r3, .L3216+40
+	movs	r0, #0
+	ldr	r2, [r3]
+	movw	r3, #65535
+	strh	r3, [r2, #126]	@ movhi
+	ldr	r2, [r4]
+	strh	r3, [r2, #130]	@ movhi
+	bl	ftl_info_flush
+.L3160:
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3162:
+	cmp	r2, #2
+	bne	.L3163
+	ldr	r2, .L3216+20
+	ldrh	r2, [r2]
+	add	r3, r3, r2, lsl #1
+	subs	r3, r3, #1
+	orr	r3, r3, #33554432
+	b	.L3211
+.L3165:
+	ldr	r8, .L3216+60
+	ldr	r7, .L3216+44
+	ldr	r1, [r4, #4]
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3216+48
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r1, [r4, #4]
+	muls	r2, r3, r2
+	ldr	r3, .L3216+52
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	add	r1, r1, r2
+	bl	ftl_memcpy
+	ldr	r3, .L3216+20
+	ldrh	fp, [r3]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #2
+	itt	eq
+	moveq	r3, #1
+	lsleq	fp, fp, #1
+	str	r3, [sp, #36]
+	movs	r3, #0
+	mov	r10, r3
+	str	r3, [sp, #32]
+.L3169:
+	ldr	r3, [sp, #32]
+	cmp	r3, fp
+	beq	.L3178
+	mov	r8, #0
+	b	.L3179
+.L3175:
+	ldr	r3, [sp, #40]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L3216+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L3216+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r3, [sp, #56]
+	cmp	r2, #3
+	bne	.L3170
+	ldr	r2, [sp, #32]
+	add	r3, r3, r2
+	orr	r3, r3, r7, lsl #24
+.L3213:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, .L3216+48
+	ldr	r2, [r4, #12]
+	ldr	r3, [r3]
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3, r6]
+	cmp	r3, r1
+	bne	.L3173
+	ldr	r0, .L3216+52
+	ldr	r0, [r0]
+	ldr	ip, [r0, r6]
+	ldr	r0, [r2, #8]
+	cmp	ip, r0
+	beq	.L3174
+.L3173:
+	ldr	r0, [r2, #12]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r1, [sp, #8]
+	str	r0, [sp, #12]
+	ldr	r2, [r2]
+	ldr	r0, .L3216+56
+	str	r2, [sp, #4]
+	ldr	r2, .L3216+52
+	ldr	r2, [r2]
+	ldr	r2, [r2, r6]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r1, [r4, #24]
+	bl	printf
+	ldr	r3, .L3216+48
+	ldr	r3, [r3]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	beq	.L3174
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L3216+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L3216+4
+	ldr	r3, [r3]
+	b	.L3215
+.L3170:
+	cmp	r2, #2
+	ldr	r2, [sp, #32]
+	itett	eq
+	addeq	r2, r2, #-1
+	addne	r3, r3, r2
+	addeq	r3, r3, r2
+	addeq	r3, r3, r7
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L3213
+.L3174:
+	add	r10, r10, #1
+	adds	r7, r7, #1
+	adds	r6, r6, #4
+.L3177:
+	ldr	r3, [sp, #36]
+	cmp	r3, r7
+	bcs	.L3175
+	add	r8, r8, #1
+.L3179:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	r8, r3
+	bge	.L3176
+	add	r3, r5, r8, lsl #1
+	lsl	r6, r10, #2
+	str	r3, [sp, #40]
+	movs	r7, #1
+	b	.L3177
+.L3176:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	str	r3, [sp, #32]
+	b	.L3169
+.L3178:
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L3216+32
+	mov	r6, r4
+	ldr	r0, .L3216+60
+	mov	fp, r4
+	ldrh	r1, [r5, #80]
+	ldr	r2, [r3]
+	ldrh	r0, [r0]
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	smulbb	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+.L3180:
+	ldr	r3, [sp, #32]
+	cmp	r3, r6
+	beq	.L3191
+	mov	r10, #0
+	b	.L3192
+.L3217:
+	.align	2
+.L3216:
+	.word	.LANCHOR76
+	.word	.LANCHOR10
+	.word	.LANCHOR150
+	.word	.LANCHOR71
+	.word	.LANCHOR103
+	.word	.LANCHOR85
+	.word	-178307901
+	.word	.LC193
+	.word	.LANCHOR9
+	.word	.LC195
+	.word	.LANCHOR102
+	.word	.LANCHOR78
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LC194
+	.word	.LANCHOR77
+.L3188:
+	ldr	r3, .L3218
+	ldr	r3, [r3]
+	ldr	r7, [r3, fp, lsl #2]
+	adds	r3, r7, #1
+	beq	.L3181
+	ldr	r3, .L3218+4
+	mov	r0, r7
+	ldr	r3, [r3]
+	ldr	r3, [r3, fp, lsl #2]
+	str	r3, [sp, #40]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #60]
+	adds	r0, r0, #1
+	bne	.L3182
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r7
+	bl	pm_log2phys
+.L3182:
+	ldr	r3, [sp, #48]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L3218+8
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L3218+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L3183
+	add	r3, r3, r6
+	orr	r3, r3, r8, lsl #24
+.L3214:
+	str	r3, [sp, #56]
+	movs	r2, #1
+	ldr	r3, .L3218+16
+	str	r2, [sp, #52]
+	ldr	r1, .L3218+20
+	ldrh	r0, [r3]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	rsb	r3, r0, #21
+	lsl	r3, r2, r3
+	ldr	r2, [sp, #40]
+	subs	r3, r3, #1
+	lsr	r0, r2, r0
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #40]
+	ldr	r3, [sp, #60]
+	str	r0, [sp, #44]
+	cmp	r2, r3
+	ldr	r2, [sp, #52]
+	bne	.L3186
+	add	r1, sp, #56
+	mov	r0, r7
+	bl	pm_log2phys
+	ldrh	r0, [sp, #44]
+	adds	r4, r4, #1
+	bl	ftl_vpn_decrement
+.L3187:
+	ldr	r3, .L3218+24
+	add	fp, fp, #1
+	ldrh	r7, [sp, #44]
+	ldr	r3, [r3]
+	add	r3, r3, r7, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #224
+	bne	.L3181
+	ldr	r2, .L3218+28
+	ldr	r2, [r2]
+	ldrh	r1, [r2, r7, lsl #1]
+	cbz	r1, .L3181
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+.L3181:
+	add	r8, r8, #1
+.L3190:
+	ldr	r3, [sp, #36]
+	cmp	r3, r8
+	bcs	.L3188
+	add	r10, r10, #1
+.L3192:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	r10, r3
+	bge	.L3189
+	add	r3, r5, r10, lsl #1
+	mov	r8, #1
+	str	r3, [sp, #48]
+	b	.L3190
+.L3183:
+	cmp	r2, #2
+	itett	eq
+	addeq	r2, r6, #-1
+	addne	r3, r3, r6
+	addeq	r3, r3, r2
+	addeq	r3, r3, r8
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L3214
+.L3186:
+	ldr	r2, [sp, #56]
+	cmp	r3, r2
+	it	eq
+	addeq	r4, r4, #1
+	b	.L3187
+.L3189:
+	adds	r6, r6, #1
+	b	.L3180
+.L3191:
+	ldr	r3, .L3218+28
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5, #80]
+	bl	zftl_insert_data_list
+	b	.L3166
+.L3161:
+	ldr	r3, [r7]
+	ldrh	r3, [r3, #130]
+	cmp	r3, r6
+	beq	.L3160
+	ldr	r5, .L3218+32
+	ldr	r2, [r5]
+	ldrh	r2, [r2, #126]
+	cmp	r2, r3
+	bne	.L3195
+	bl	pm_flush
+	ldr	r3, [r7]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sblk
+	ldr	r3, [r5]
+	mov	r0, r4
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L3195:
+	ldr	r3, [r7]
+	movw	r2, #65535
+	strh	r2, [r3, #130]	@ movhi
+	b	.L3160
+.L3219:
+	.align	2
+.L3218:
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LANCHOR102
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.zftl_init,"ax",%progbits
+	.align	1
+	.global	zftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_init, %function
+zftl_init:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L3285
+	movs	r3, #255
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r6, .L3285+4
+	sub	sp, sp, #24
+	strb	r3, [r2]
+	ldr	r2, .L3285+8
+	ldr	r1, .L3285+12
+	ldr	r0, .L3285+16
+	strb	r5, [r2]
+	ldr	r2, .L3285+20
+	strb	r3, [r2]
+	ldr	r2, .L3285+24
+	strb	r5, [r2]
+	ldr	r2, .L3285+28
+	strb	r3, [r2]
+	mov	r2, #-1
+	ldr	r3, .L3285+32
+	strb	r5, [r3]
+	ldr	r3, .L3285+36
+	str	r2, [r3]
+	bl	printf
+	ldrb	r3, [r6, #12]	@ zero_extendqisi2
+	ldrb	r8, [r6, #9]	@ zero_extendqisi2
+	ldrh	r10, [r6, #10]
+	str	r3, [sp]
+	ldr	r3, .L3285+40
+	ldrb	r2, [sp]	@ zero_extendqisi2
+	mov	r0, r10
+	ldr	r1, [sp]
+	strb	r2, [r3]
+	ldr	r3, .L3285+44
+	strb	r8, [r3]
+	ldr	r3, .L3285+48
+	strh	r10, [r3]	@ movhi
+	bl	__aeabi_idiv
+	ldr	r3, .L3285+52
+	mov	r7, r0
+	ldrb	r1, [r6, #13]	@ zero_extendqisi2
+	ldrh	fp, [r6, #14]
+	lsl	r6, r8, #9
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L3285+56
+	uxth	r6, r6
+	ldr	ip, .L3285+216
+	ldr	r0, .L3285+60
+	strb	r4, [r3]
+	smulbb	r4, r4, r1
+	ldr	r3, .L3285+64
+	ldr	r2, .L3285+68
+	uxtb	r4, r4
+	strh	r7, [r0]	@ movhi
+	strb	r1, [r3]
+	ldr	r3, .L3285+72
+	ldr	r1, .L3285+76
+	strh	fp, [r2]	@ movhi
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L3285+80
+	strb	r4, [r1]
+	str	r0, [sp, #4]
+	ldrh	r3, [r3]
+	str	r1, [sp, #8]
+	str	r2, [sp, #12]
+	strh	r3, [ip]	@ movhi
+	mov	ip, #1
+.L3221:
+	cmp	r3, ip
+	uxth	r2, r5
+	add	r5, r5, #1
+	bcs	.L3222
+	mul	r10, r10, r8
+	subs	r3, r2, #1
+	ldr	r2, .L3285+84
+	movs	r0, #0
+	movs	r1, #1
+	strh	r3, [r2]	@ movhi
+	mul	r2, fp, r10
+	lsrs	r5, r2, #21
+.L3223:
+	cmp	r5, r1
+	uxth	r3, r0
+	add	r0, r0, #1
+	bcs	.L3224
+	mov	r5, #1892352
+	subs	r3, r3, #1
+	mul	r1, r5, r4
+	uxth	r3, r3
+	muls	r2, r4, r2
+	lsl	r5, r1, r3
+	ldr	r3, .L3285+88
+	mov	r1, r8
+	ldr	r8, .L3285+220
+	str	r5, [r3]
+	ldr	r3, .L3285+92
+	str	r2, [r3]
+	add	r2, r5, #24576
+	str	r3, [sp, #20]
+	mov	r0, r2
+	ldr	r3, .L3285+96
+	str	r2, [sp, #16]
+	str	r2, [r3]
+	bl	__aeabi_uidiv
+	ldr	r3, .L3285+100
+	add	ip, r6, #-1
+	mov	r1, r6
+	ldr	r6, .L3285+104
+	str	r0, [r3]
+	add	r0, ip, r0, lsl #2
+	bl	__aeabi_uidiv
+	strh	r0, [r6]	@ movhi
+	uxth	r0, r0
+	mul	r1, r4, r7
+	ldr	r7, .L3285+108
+	lsls	r0, r0, #4
+	bl	__aeabi_idiv
+	mul	r1, r4, r10
+	ldr	r2, [sp, #16]
+	strh	r0, [r8]	@ movhi
+	mov	r4, #256
+	ldr	r10, .L3285+100
+	mov	r0, r2
+	subs	r1, r1, #1
+	bl	__aeabi_uidiv
+	add	r2, fp, fp, lsl #1
+	ldr	r1, .L3285+112
+	lsr	fp, fp, #4
+	adds	r0, r0, #8
+	asrs	r2, r2, #2
+	strh	r0, [r7]	@ movhi
+	cmp	fp, #79
+	ldr	r0, .L3285+116
+	strh	r2, [r1]	@ movhi
+	it	ls
+	movls	r1, #80
+	ldr	r2, .L3285+120
+	mov	ip, #32
+	ldr	r3, [sp, #20]
+	strh	fp, [r2]	@ movhi
+	it	ls
+	strhls	r1, [r2]	@ movhi
+	mov	r1, #2000
+	ldr	r2, .L3285+124
+	ldr	fp, .L3285+96
+	strh	r1, [r2]	@ movhi
+	movs	r1, #50
+	strh	r1, [r0]	@ movhi
+	ldr	r1, .L3285+128
+	strh	r4, [r1]	@ movhi
+	movs	r4, #48
+	ldr	r1, .L3285+132
+	strh	r4, [r1]	@ movhi
+	ldr	r4, .L3285+136
+	strh	ip, [r4]	@ movhi
+	ldr	r4, [sp]
+	cmp	r4, #2
+	beq	.L3226
+	ldr	r4, .L3285+140
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cbz	r4, .L3227
+.L3226:
+	movs	r4, #150
+	strh	r4, [r0]	@ movhi
+	movs	r0, #64
+	strh	r0, [r1]	@ movhi
+	movs	r0, #12
+	ldr	r1, .L3285+136
+	strh	r0, [r1]	@ movhi
+	ldr	r0, .L3285+144
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cbnz	r0, .L3227
+	movs	r0, #4
+	strh	r0, [r1]	@ movhi
+	mov	r1, #600
+	strh	r1, [r2]	@ movhi
+	movs	r1, #128
+	ldr	r2, .L3285+128
+	strh	r1, [r2]	@ movhi
+.L3227:
+	ldr	r4, .L3285+148
+	ldr	r2, [r4]
+	lsls	r1, r2, #19
+	bpl	.L3229
+	mov	r1, r5
+	ldr	r0, .L3285+152
+	str	r3, [sp]
+	bl	printf
+	ldr	r3, [sp]
+.L3229:
+	ldr	r2, [r4]
+	lsls	r2, r2, #19
+	bpl	.L3230
+	ldr	r1, [r3]
+	ldr	r0, .L3285+156
+	bl	printf
+.L3230:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L3231
+	ldr	r1, [r10]
+	ldr	r0, .L3285+160
+	bl	printf
+.L3231:
+	ldr	r3, [r4]
+	lsls	r5, r3, #19
+	bpl	.L3232
+	ldr	r1, [fp]
+	ldr	r0, .L3285+164
+	bl	printf
+.L3232:
+	ldr	r3, [r4]
+	lsls	r0, r3, #19
+	bpl	.L3233
+	ldrh	r1, [r6]
+	ldr	r0, .L3285+168
+	bl	printf
+.L3233:
+	ldr	r3, [r4]
+	ldr	r5, .L3285+72
+	tst	r3, #4096
+	beq	.L3234
+	ldrh	r1, [r5]
+	ldr	r0, .L3285+172
+	bl	printf
+.L3234:
+	ldr	r3, [r4]
+	lsls	r1, r3, #19
+	bpl	.L3235
+	ldrh	r1, [r8]
+	ldr	r0, .L3285+176
+	bl	printf
+.L3235:
+	ldr	r3, [r4]
+	lsls	r2, r3, #19
+	bpl	.L3236
+	ldr	r3, .L3285+120
+	ldr	r0, .L3285+180
+	ldrh	r1, [r3]
+	bl	printf
+.L3236:
+	ldr	r3, [r4]
+	lsls	r3, r3, #19
+	bpl	.L3237
+	ldrh	r1, [r7]
+	ldr	r0, .L3285+184
+	bl	printf
+.L3237:
+	bl	buf_init
+	ldr	r3, [sp, #12]
+	movs	r0, #6
+	ldr	r7, .L3285+188
+	ldrh	r3, [r3]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L3285+192
+	ldr	r2, [sp, #8]
+	str	r0, [r3]
+	ldr	r3, [sp, #4]
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L3285+196
+	ldr	r2, .L3285+200
+	str	r0, [r3]
+	ldr	r3, .L3285+204
+	str	r2, [r3]
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r3]
+	ldr	r3, [sp, #8]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	muls	r0, r1, r0
+	ldr	r1, .L3285+208
+	add	r3, r2, r0, lsl #3
+	str	r3, [r1]
+	ldr	r1, [sp, #12]
+	ldrh	r1, [r1]
+	lsrs	r1, r1, #1
+	add	r1, r1, r0, lsl #1
+	ldr	r0, [r4]
+	add	r1, r2, r1, lsl #2
+	lsls	r0, r0, #19
+	str	r1, [r7]
+	bpl	.L3238
+	ldr	r0, .L3285+212
+	bl	printf
+	b	.L3286
+.L3287:
+	.align	2
+.L3285:
+	.word	.LANCHOR57
+	.word	.LANCHOR31
+	.word	.LANCHOR58
+	.word	.LC196
+	.word	.LC97
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR174
+	.word	.LANCHOR121
+	.word	.LANCHOR206
+	.word	.LANCHOR71
+	.word	.LANCHOR123
+	.word	.LANCHOR77
+	.word	.LANCHOR18
+	.word	.LANCHOR104
+	.word	.LANCHOR85
+	.word	.LANCHOR67
+	.word	.LANCHOR6
+	.word	.LANCHOR203
+	.word	.LANCHOR78
+	.word	.LANCHOR2
+	.word	.LANCHOR66
+	.word	.LANCHOR59
+	.word	.LANCHOR207
+	.word	.LANCHOR208
+	.word	.LANCHOR120
+	.word	.LANCHOR187
+	.word	.LANCHOR93
+	.word	.LANCHOR117
+	.word	.LANCHOR116
+	.word	.LANCHOR89
+	.word	.LANCHOR118
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.word	.LANCHOR8
+	.word	.LANCHOR75
+	.word	.LANCHOR0
+	.word	.LANCHOR14
+	.word	.LC197
+	.word	.LC198
+	.word	.LC199
+	.word	.LC200
+	.word	.LC201
+	.word	.LC202
+	.word	.LC203
+	.word	.LC204
+	.word	.LC205
+	.word	.LANCHOR10
+	.word	.LANCHOR4
+	.word	.LANCHOR110
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR109
+	.word	.LANCHOR9
+	.word	.LC206
+	.word	.LANCHOR103
+	.word	.LANCHOR146
+.L3286:
+.L3238:
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #8]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	ldrb	r8, [r1]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mul	r8, r8, r2
+	ldrh	r2, [r6]
+	lsls	r6, r3, #2
+	add	r8, r3, r8, lsl #2
+	ldr	r3, [r4]
+	add	r6, r6, r2, lsl #2
+	lsl	r8, r8, #1
+	lsls	r2, r3, #19
+	add	r8, r8, #632
+	add	r6, r6, #704
+	bpl	.L3239
+	ldrh	r3, [r5]
+	mov	r2, r6
+	mov	r1, r8
+	ldr	r0, .L3288
+	bl	printf
+.L3239:
+	ldrh	r3, [r5]
+	cmp	r8, r3
+	bhi	.L3240
+	cmp	r6, r3
+	bls	.L3241
+.L3240:
+.L3284:
+	b	.L3284
+.L3222:
+	lsl	ip, ip, #1
+	b	.L3221
+.L3224:
+	lsls	r1, r1, #1
+	b	.L3223
+.L3241:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	adds	r3, r0, #1
+	beq	.L3220
+	bl	ftl_ext_info_init
+	bl	gc_init
+	movs	r0, #1
+	ldr	r4, .L3288+4
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	r0, [r7]
+	movs	r1, #0
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_recovery
+	ldr	r0, [r7]
+	add	r1, r0, #16
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_recovery
+	ldr	r2, [r4]
+	ldr	r0, [r7]
+	ldr	r3, [r2, #8]
+	adds	r0, r0, #16
+	adds	r3, r3, #16
+	str	r3, [r2, #8]
+	bl	ftl_info_data_recovery
+	ldr	r0, [r7]
+	adds	r0, r0, #48
+	bl	ftl_info_data_recovery
+	ldr	r0, [r7]
+	adds	r0, r0, #80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	pm_flush
+	movs	r0, #1
+	bl	ftl_total_vpn_update
+	ldr	r3, .L3288+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3243
+	ldr	r2, [r4]
+	ldr	r3, [r2, #68]
+	adds	r3, r3, #1
+	str	r3, [r2, #68]
+.L3243:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	movs	r0, #0
+.L3220:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3289:
+	.align	2
+.L3288:
+	.word	.LC207
+	.word	.LANCHOR102
+	.word	.LANCHOR182
+	.size	zftl_init, .-zftl_init
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	nand_flash_init
+	mov	r4, r0
+	cbnz	r0, .L3291
+	bl	zftl_init
+	mov	r4, r0
+.L3291:
+	bl	idb_init
+	mov	r1, r4
+	ldr	r0, .L3292
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L3293:
+	.align	2
+.L3292:
+	.word	.LC208
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+	.align	1
+	.global	gc_update_l2p_map_new
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3328
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r2, .L3328+4
+	ldr	r4, [r3]
+	ldrh	r2, [r2]
+	ldr	r7, .L3328+8
+	ldrb	r1, [r4, #89]	@ zero_extendqisi2
+	str	r3, [sp, #20]
+	muls	r2, r1, r2
+	str	r2, [sp, #4]
+	ldr	r2, [r7]
+	tst	r2, #256
+	beq	.L3295
+	ldrh	r1, [r4, #80]
+	ldr	r0, .L3328+12
+	bl	printf
+.L3295:
+	ldr	r3, .L3328+16
+	movs	r6, #0
+	ldr	r1, [sp, #4]
+	mov	r5, r6
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r3]
+	subs	r1, r1, #1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L3296:
+	ldr	r3, [sp, #4]
+	cmp	r5, r3
+	bne	.L3305
+	ldr	r3, [r7]
+	ldr	r5, .L3328+16
+	tst	r3, #256
+	beq	.L3306
+	ldr	r3, [sp, #20]
+	ldrh	r0, [r4, #80]
+	ldr	r2, [r5]
+	ldr	r1, [r3]
+	mov	r3, r6
+	ldrh	r2, [r2, r0, lsl #1]
+	ldrh	r1, [r1, #80]
+	ldr	r0, .L3328+20
+	bl	printf
+.L3306:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r6, r3
+	beq	.L3307
+	movw	r2, #617
+	ldr	r1, .L3328+24
+	ldr	r0, .L3328+28
+	bl	printf
+.L3307:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4, #80]
+	bl	zftl_insert_data_list
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3305:
+	ldr	r3, .L3328+32
+	lsl	r8, r5, #2
+	ldr	r3, [r3]
+	ldr	r10, [r3, r5, lsl #2]
+	cmp	r10, #-1
+	beq	.L3297
+	ldr	r3, .L3328+36
+	mov	r0, r10
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp, #16]
+	ldr	r3, [r7]
+	lsls	r1, r3, #23
+	bpl	.L3298
+	mov	r3, r5
+	mov	r2, r10
+	ldr	r1, [sp, #16]
+	ldr	r0, .L3328+40
+	bl	printf
+.L3298:
+	ldr	fp, .L3328+32
+	str	r5, [sp, #12]
+.L3304:
+	ldr	r3, [fp]
+	ldr	r10, [r3, r8]
+	cmp	r10, #-1
+	beq	.L3299
+	ldr	r3, .L3328+36
+	mov	r0, r10
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L3299
+	ldr	r3, .L3328+44
+	mov	r0, r10
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [sp, #8]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L3300
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r10
+	bl	pm_log2phys
+.L3300:
+	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #8]
+	cmp	r2, r3
+	bne	.L3301
+	ldr	r3, .L3328+48
+	add	r1, sp, #32
+	movs	r2, #1
+	mov	r0, r10
+	adds	r6, r6, #1
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [r1, #-8]!
+	bl	pm_log2phys
+	ldr	r3, .L3328+52
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, [sp, #8]
+	subs	r3, r3, #1
+	lsrs	r2, r2, r0
+	mov	r0, r2
+	ldr	r2, .L3328+56
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+.L3327:
+	bl	ftl_vpn_decrement
+	ldr	r3, [fp]
+	mov	r2, #-1
+	str	r2, [r3, r8]
+.L3299:
+	ldr	r3, [sp, #12]
+	add	r8, r8, #4
+	adds	r3, r3, #1
+	str	r3, [sp, #12]
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bne	.L3304
+.L3297:
+	adds	r5, r5, #1
+	b	.L3296
+.L3301:
+	ldr	r2, [r7]
+	lsls	r2, r2, #23
+	bpl	.L3303
+	ldr	r2, [sp, #8]
+	mov	r1, r10
+	ldr	r0, .L3328+60
+	bl	printf
+.L3303:
+	ldrh	r0, [r4, #80]
+	b	.L3327
+.L3329:
+	.align	2
+.L3328:
+	.word	.LANCHOR10
+	.word	.LANCHOR77
+	.word	.LANCHOR14
+	.word	.LC209
+	.word	.LANCHOR9
+	.word	.LC212
+	.word	.LANCHOR209
+	.word	.LC0
+	.word	.LANCHOR152
+	.word	.LANCHOR123
+	.word	.LC210
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LC211
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r4, .L3356
+	mov	r0, r1
+	movw	r5, #65535
+	ldr	r6, .L3356+4
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	add	r2, r4, r3, lsl #1
+	ldrh	r7, [r2, #36]
+	ldrh	r2, [r4, #2]
+.L3331:
+	cmp	r7, r5
+	beq	.L3333
+	cbz	r0, .L3334
+	strh	r2, [r4, #2]	@ movhi
+.L3334:
+	cbz	r1, .L3335
+	strb	r3, [r4, #4]
+.L3335:
+	ldr	r8, .L3356+16
+	movs	r0, #1
+	ldr	r10, .L3356+20
+	mov	fp, #1
+	bl	buf_alloc
+	mov	r5, r0
+.L3336:
+	ldrb	r1, [r4, #6]	@ zero_extendqisi2
+	cmp	fp, r1
+	ble	.L3344
+	mov	r0, r5
+	bl	buf_free
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r2, r3
+	strb	r3, [r4, #4]
+	bne	.L3330
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #4]
+.L3330:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3333:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, ip
+	itt	eq
+	moveq	r3, #0
+	addeq	r2, r2, #1
+	add	r1, r4, r3, lsl #1
+	it	eq
+	uxtheq	r2, r2
+	ldrh	r7, [r1, #36]
+	it	eq
+	moveq	r0, #1
+	movs	r1, #1
+	b	.L3331
+.L3344:
+	ldrh	r3, [r8]
+	cmp	r1, #3
+	ldrh	r2, [r4, #2]
+	mul	r3, r7, r3
+	bne	.L3337
+	add	r3, r3, r2
+	orr	r3, r3, fp, lsl #24
+.L3355:
+	str	r3, [r5, #24]
+	movs	r1, #1
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L3341
+	cmp	r3, #512
+	beq	.L3341
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	mov	r0, r3
+	str	r3, [sp, #4]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	ldr	r3, [sp, #4]
+	bne	.L3343
+	ldr	r2, .L3356+8
+	ldr	r2, [r2]
+	cmp	r3, r2
+	bcs	.L3343
+	movs	r2, #0
+	add	r1, sp, #12
+	mov	r0, r3
+	bl	pm_log2phys
+.L3343:
+	ldr	r2, [r5, #24]
+	ldr	r3, [sp, #12]
+	cmp	r2, r3
+	bne	.L3341
+	ldr	r1, .L3356+12
+	ldrh	r3, [r4, #20]
+	ldr	r1, [r1]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L3341:
+	ldrh	r3, [r4, #22]
+	add	fp, fp, #1
+	adds	r3, r3, #1
+	strh	r3, [r4, #22]	@ movhi
+	b	.L3336
+.L3337:
+	cmp	r1, #2
+	ittet	eq
+	addeq	r3, r3, r2, lsl #1
+	ldrbeq	r2, [r10]	@ zero_extendqisi2
+	addne	r3, r3, r2
+	addeq	r3, r3, #-1
+	itt	eq
+	addeq	r3, r3, fp
+	orreq	r3, r3, r2, lsl #24
+	b	.L3355
+.L3357:
+	.align	2
+.L3356:
+	.word	.LANCHOR63
+	.word	.LANCHOR78
+	.word	.LANCHOR120
+	.word	.LANCHOR68
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movw	r3, #65535
+	ldr	r4, .L3399
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L3359
+	movw	r2, #1052
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+.L3359:
+	ldrh	r1, [r4]
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L3380
+	ldr	r3, .L3399+12
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L3361
+	ldr	r3, .L3399+16
+	ldr	r0, .L3399+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r1, lsl #1]
+	bl	printf
+.L3361:
+	ldr	r1, .L3399+24
+	ldrh	r0, [r4]
+	bl	ftl_get_blk_list_in_sblk
+	uxtb	r0, r0
+	strb	r0, [r4, #5]
+	cbnz	r0, .L3362
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+.L3358:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3362:
+	ldr	r5, .L3399+28
+	ldrh	r3, [r4]
+	ldr	r2, [r5]
+	add	r2, r2, r3, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r2, r2, #224
+	cmp	r2, #32
+	beq	.L3363
+	cmp	r2, #224
+	beq	.L3363
+	cbz	r2, .L3364
+	ldr	r2, .L3399+32
+	ldr	r2, [r2]
+	ldrh	r1, [r2, #16]
+	cmp	r1, r3
+	beq	.L3363
+	ldrh	r1, [r2, #48]
+	cmp	r1, r3
+	beq	.L3363
+	ldrh	r2, [r2, #80]
+	cmp	r2, r3
+	bne	.L3397
+.L3363:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r4]	@ movhi
+	strh	r0, [r4, #20]	@ movhi
+	b	.L3358
+.L3364:
+	ldr	r5, .L3399+16
+	ldr	r1, [r5]
+	ldrh	r3, [r1, r3, lsl #1]
+	cbz	r3, .L3366
+	mov	r2, #1072
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+.L3366:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r5]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	b	.L3363
+.L3397:
+	add	r0, r4, r0, lsl #1
+	movw	r3, #65535
+	ldrh	r6, [r0, #34]
+	cmp	r6, r3
+	bne	.L3367
+	mov	r2, #1080
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+.L3367:
+	ldr	r2, .L3399+36
+	ldrh	r0, [r4]
+	ldr	r1, .L3399+40
+	ldrh	r2, [r2]
+	ldr	r8, .L3399+64
+	ldrh	r3, [r1]
+	mov	r10, r1
+	muls	r6, r2, r6
+	ldr	r2, [r5]
+	subs	r3, r3, #1
+	uxth	r3, r3
+	add	r2, r2, r0, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r2, r2, #224
+	cmp	r2, #160
+	bne	.L3381
+	ldr	r2, .L3399+44
+	ldrb	r7, [r2]	@ zero_extendqisi2
+	cmp	r7, #2
+	it	eq
+	ldrheq	r3, [r8]
+	orr	r6, r6, r7, lsl #24
+	itee	ne
+	uxthne	r7, r7
+	addeq	r3, r3, #-1
+	uxtheq	r3, r3
+.L3368:
+	orrs	r6, r6, r3
+	strb	r7, [r4, #6]
+	movs	r5, #0
+	movs	r0, #1
+	strh	r5, [r4, #2]	@ movhi
+	strb	r5, [r4, #4]
+	strh	r5, [r4, #22]	@ movhi
+	strh	r5, [r4, #24]	@ movhi
+	bl	buf_alloc
+	str	r6, [r0, #24]
+	movs	r1, #1
+	ldr	r6, .L3399+48
+	mov	fp, r0
+	bl	sblk_read_page
+	ldrh	r3, [r8]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r8, .L3399+68
+	muls	r2, r3, r2
+	ldr	r0, [r8]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, [fp, #36]
+	strh	r5, [r4, #20]	@ movhi
+	adds	r2, r3, #1
+	beq	.L3398
+	cmp	r3, #512
+	bne	.L3371
+.L3398:
+	mov	r0, fp
+	bl	buf_free
+	mov	r0, #-1
+	b	.L3358
+.L3381:
+	movs	r7, #1
+	b	.L3368
+.L3371:
+	ldr	r3, [fp, #12]
+	ldr	r2, [r3]
+	ldr	r3, .L3399+52
+	cmp	r2, r3
+	beq	.L3372
+	movw	r2, #1113
+	ldr	r1, .L3399+4
+	ldr	r0, .L3399+8
+	bl	printf
+	b	.L3398
+.L3372:
+	ldrh	r3, [r10]
+	ldrb	r6, [r6]	@ zero_extendqisi2
+	ldr	r10, .L3399+72
+	smulbb	r6, r6, r3
+	smulbb	r6, r6, r7
+	ldr	r7, [fp, #4]
+	uxth	r6, r6
+	subs	r7, r7, #4
+.L3373:
+	cmp	r5, r6
+	blt	.L3378
+	ldr	r5, .L3399+16
+	mov	r0, fp
+	bl	buf_free
+	ldrh	r1, [r4]
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r1, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	beq	.L3379
+	ldr	r0, .L3399+56
+	bl	printf
+.L3379:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #20]
+	ldrh	r2, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #24]	@ movhi
+	ldrh	r0, [r4, #20]
+	b	.L3358
+.L3378:
+	ldr	r0, [r7, #4]!
+	adds	r3, r0, #1
+	beq	.L3375
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	bne	.L3376
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r7]
+	bl	pm_log2phys
+.L3376:
+	ldr	r3, [sp, #12]
+	movs	r2, #1
+	ldrh	r0, [r10]
+	str	r3, [sp, #4]
+	rsb	r1, r0, #21
+	lsls	r2, r2, r1
+	lsr	r0, r3, r0
+	ldr	r3, .L3399+60
+	subs	r2, r2, #1
+	ands	r0, r0, r2
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r2, [r4]
+	ldr	r3, [sp, #4]
+	cmp	r0, r2
+	bne	.L3375
+	ldrh	r2, [r4, #20]
+	ldr	r1, [r8]
+	str	r3, [r1, r2, lsl #2]
+	adds	r2, r2, #1
+	strh	r2, [r4, #20]	@ movhi
+.L3375:
+	adds	r5, r5, #1
+	b	.L3373
+.L3380:
+	movs	r0, #0
+	b	.L3358
+.L3400:
+	.align	2
+.L3399:
+	.word	.LANCHOR63
+	.word	.LANCHOR210
+	.word	.LC0
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC213
+	.word	.LANCHOR63+36
+	.word	.LANCHOR7
+	.word	.LANCHOR10
+	.word	.LANCHOR103
+	.word	.LANCHOR85
+	.word	.LANCHOR71
+	.word	.LANCHOR78
+	.word	-178307901
+	.word	.LC214
+	.word	.LANCHOR67
+	.word	.LANCHOR77
+	.word	.LANCHOR68
+	.word	.LANCHOR66
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.gc_scan_static_data,"ax",%progbits
+	.align	1
+	.global	gc_scan_static_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r4, .L3417
+	ldr	r3, [r4]
+	ldr	r2, [r3, #544]
+	adds	r2, r2, #1
+	beq	.L3402
+	ldr	r6, .L3417+4
+	movs	r5, #11
+	ldr	r7, .L3417+8
+.L3410:
+	ldr	r3, [r4]
+	movs	r2, #0
+	add	r1, sp, #4
+	ldr	r0, [r3, #544]
+	bl	pm_log2phys
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L3403
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #4]
+	mov	r8, r0
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r8, #36]
+	cmp	r3, #256
+	bne	.L3404
+	ldr	r3, .L3417+12
+	mov	r10, #1
+	ldr	r0, [sp, #4]
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsrs	r0, r0, r2
+	lsl	r3, r10, r3
+	ldr	r2, .L3417+16
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r2, #0
+	mov	r1, r10
+	uxth	r0, r0
+	bl	gc_add_sblk
+.L3404:
+	ldr	r2, [r8, #12]
+	ldr	r3, [r4]
+	ldr	r2, [r2, #4]
+	ldr	r3, [r3, #544]
+	cmp	r2, r3
+	beq	.L3405
+	mov	r2, #1552
+	mov	r1, r6
+	mov	r0, r7
+	bl	printf
+.L3405:
+	mov	r0, r8
+	bl	buf_free
+.L3403:
+	ldr	r3, [r4]
+	ldr	r1, .L3417+20
+	ldr	r2, [r3, #544]
+	ldr	r1, [r1]
+	adds	r2, r2, #1
+	cmp	r2, r1
+	str	r2, [r3, #544]
+	bcc	.L3406
+	mov	r2, #-1
+	str	r2, [r3, #544]
+	ldr	r2, [r3, #548]
+	adds	r2, r2, #1
+	str	r2, [r3, #548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+.L3401:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L3406:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L3401
+	subs	r5, r5, #1
+	uxth	r5, r5
+	cmp	r5, #0
+	bne	.L3410
+	b	.L3401
+.L3402:
+	ldr	r2, [r3, #536]
+	ldr	r1, [r3, #12]
+	ldr	r0, .L3417+24
+	add	r2, r2, #12910592
+	add	r2, r2, #49408
+	cmp	r1, r2
+	bhi	.L3412
+	ldr	r4, [r0]
+	ldr	r2, [r3, #540]
+	ldr	r4, [r4, #44]
+	add	r2, r2, #4992
+	adds	r2, r2, #8
+	cmp	r4, r2
+	bls	.L3401
+.L3412:
+	ldr	r2, [r0]
+	ldr	r2, [r2, #44]
+	str	r1, [r3, #536]
+	str	r2, [r3, #540]
+	movs	r2, #0
+	str	r2, [r3, #544]
+	b	.L3401
+.L3418:
+	.align	2
+.L3417:
+	.word	.LANCHOR10
+	.word	.LANCHOR211
+	.word	.LC0
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR120
+	.word	.LANCHOR102
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	lsls	r3, r0, #2
+	ldr	r4, .L3458
+	sub	sp, sp, #120
+	lsls	r2, r0, #2
+	mov	r6, r0
+	str	r3, [sp, #68]
+	ldr	r3, [r4]
+	str	r1, [sp, #60]
+	ldr	r1, [r3, r0, lsl #2]
+	adds	r2, r3, r2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	ubfx	r1, r1, #11, #8
+	str	r1, [sp, #4]
+	mov	r1, r0
+	ldrh	r3, [r3, r0, lsl #2]
+	ldr	r0, .L3458+4
+	ubfx	r3, r3, #0, #11
+	str	r3, [sp]
+	ubfx	r3, r2, #3, #2
+	lsrs	r2, r2, #5
+	bl	printf
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L3440
+	ldr	r3, .L3458+8
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bls	.L3440
+	ldr	r3, [r4]
+	lsls	r2, r6, #2
+	add	r1, sp, #104
+	strh	r6, [sp, #88]	@ movhi
+	mov	r0, r6
+	movs	r5, #0
+	add	r3, r3, r2
+	mov	r10, r5
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L3458+12
+	movne	fp, #1
+	ldrbeq	fp, [r3]	@ zero_extendqisi2
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3458+16
+	uxtb	r0, r0
+	lsls	r2, r6, #2
+	strb	r5, [sp, #93]
+	strb	r0, [sp, #97]
+	mov	r1, r6
+	ldrh	r3, [r3]
+	strh	r5, [sp, #90]	@ movhi
+	strh	r5, [sp, #98]	@ movhi
+	smulbb	r3, r3, r0
+	strh	r3, [sp, #94]	@ movhi
+	ldr	r3, [r4]
+	add	r3, r3, r2
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	mov	r3, fp
+	str	r0, [sp]
+	ldr	r0, .L3458+20
+	lsrs	r2, r2, #5
+	bl	printf
+	movs	r0, #1
+	bl	buf_alloc
+	mov	r7, r0
+	str	r5, [sp, #44]
+	str	r5, [sp, #40]
+.L3422:
+	ldr	r3, .L3458+16
+	ldrh	r2, [r3]
+	uxth	r3, r5
+	cmp	r2, r3
+	bls	.L3437
+	str	r3, [sp, #64]
+	lsls	r3, r3, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #72]
+	movs	r3, #0
+	b	.L3457
+.L3434:
+	ldr	r3, [sp, #76]
+	add	r2, sp, #120
+	add	r3, r2, r3, lsl #1
+	ldrh	r3, [r3, #-32]
+	str	r3, [sp, #52]
+	movw	r3, #65535
+	ldr	r2, [sp, #52]
+	cmp	r2, r3
+	beq	.L3423
+	ldr	r3, .L3458+24
+	cmp	fp, #3
+	ldrh	r4, [r3]
+	mov	r3, r2
+	mul	r4, r2, r4
+	bne	.L3424
+	uxtah	r4, r4, r5
+	orr	r4, r4, r8, lsl #24
+.L3425:
+	movs	r1, #1
+	str	r4, [r7, #24]
+	mov	r0, r7
+	bl	sblk_read_page
+	ldr	r2, [r7, #12]
+	ldr	r3, [r7, #36]
+	ldr	r0, .L3458+28
+	ldr	r1, [r2, #12]
+	str	r3, [sp, #56]
+	ldr	r3, [r7, #4]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	ldr	r2, [r2]
+	ldr	r1, [sp, #52]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [sp, #64]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #56]
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+	ldr	r3, [sp, #56]
+	adds	r2, r3, #1
+	beq	.L3442
+	cmp	r3, #512
+	ldr	r3, [sp, #40]
+	it	eq
+	moveq	r3, #1
+.L3456:
+	str	r3, [sp, #40]
+	ldr	r3, .L3458
+	ldr	r2, [sp, #68]
+	ldr	r3, [r3]
+	add	r3, r3, r2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #224
+	beq	.L3423
+	cmp	r3, #32
+	beq	.L3423
+	ldr	r3, [r7, #12]
+	ldr	r0, [r3, #4]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #84]
+	adds	r0, r0, #1
+	bne	.L3428
+	ldr	r3, [r7, #12]
+	movs	r2, #0
+	add	r1, sp, #84
+	ldr	r0, [r3, #4]
+	bl	pm_log2phys
+.L3428:
+	ldr	r3, [sp, #84]
+	cmp	r4, r3
+	bne	.L3429
+	ldr	r3, [sp, #44]
+	mov	r1, r4
+	ldr	r2, [r7, #12]
+	ldr	r0, .L3458+32
+	adds	r3, r3, #1
+	ldr	r2, [r2, #4]
+	str	r3, [sp, #44]
+	bl	printf
+.L3429:
+	ldr	r3, [sp, #60]
+	cbz	r3, .L3431
+	ldr	r2, [r3, r10, lsl #2]
+	lsl	r4, r10, #2
+	ldr	r3, [r7, #12]
+	ldr	r3, [r3, #4]
+	cmp	r3, r2
+	beq	.L3432
+	ldr	r3, .L3458+36
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L3432
+	mov	r1, r10
+	ldr	r0, .L3458+40
+	bl	printf
+.L3432:
+	ldr	r3, [sp, #60]
+	ldr	r2, [r7, #12]
+	ldr	r3, [r3, r4]
+	ldr	r2, [r2, #4]
+	cmp	r2, r3
+	beq	.L3431
+	adds	r3, r3, #1
+	beq	.L3431
+	mov	r2, #1312
+	ldr	r1, .L3458+44
+	ldr	r0, .L3458+48
+	bl	printf
+.L3431:
+	add	r10, r10, #1
+.L3423:
+	add	r8, r8, #1
+	uxth	r8, r8
+.L3436:
+	cmp	fp, r8
+	bcs	.L3434
+	ldr	r3, [sp, #48]
+	adds	r3, r3, #1
+.L3457:
+	str	r3, [sp, #48]
+	ldrb	r2, [sp, #97]	@ zero_extendqisi2
+	ldrh	r3, [sp, #48]
+	cmp	r2, r3
+	bls	.L3435
+	adds	r3, r3, #8
+	mov	r8, #1
+	str	r3, [sp, #76]
+	b	.L3436
+.L3424:
+	cmp	fp, #2
+	itett	eq
+	ldreq	r3, [sp, #72]
+	uxtahne	r4, r4, r5
+	addeq	r4, r4, r3
+	ldreq	r3, .L3458+12
+	ittt	eq
+	addeq	r4, r4, r8
+	ldrbeq	r3, [r3]	@ zero_extendqisi2
+	orreq	r4, r4, r3, lsl #24
+	b	.L3425
+.L3442:
+	movs	r3, #1
+	b	.L3456
+.L3435:
+	adds	r5, r5, #1
+	b	.L3422
+.L3437:
+	mov	r0, r7
+	bl	buf_free
+	ldr	r3, .L3458+52
+	mov	r1, r6
+	ldr	r0, .L3458+56
+	ldr	r2, [r3]
+	ldr	r3, [sp, #44]
+	ldrh	r2, [r2, r6, lsl #1]
+	bl	printf
+	ldr	r0, [sp, #40]
+.L3419:
+	add	sp, sp, #120
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3440:
+	movs	r0, #0
+	b	.L3419
+.L3459:
+	.align	2
+.L3458:
+	.word	.LANCHOR7
+	.word	.LC215
+	.word	.LANCHOR6
+	.word	.LANCHOR71
+	.word	.LANCHOR85
+	.word	.LC216
+	.word	.LANCHOR103
+	.word	.LC162
+	.word	.LC217
+	.word	.LANCHOR14
+	.word	.LC218
+	.word	.LANCHOR212
+	.word	.LC0
+	.word	.LANCHOR9
+	.word	.LC219
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.zftl_read,"ax",%progbits
+	.align	1
+	.global	zftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_read, %function
+zftl_read:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r3
+	ldr	r3, .L3507
+	mov	r4, r0
+	sub	sp, sp, #72
+	mov	r6, r1
+	mov	fp, r2
+	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L3461
+	mov	r3, r2
+	ldr	r0, .L3507+4
+	mov	r2, r1
+	mov	r1, r4
+	bl	printf
+.L3461:
+	cmp	r4, #0
+	bne	.L3462
+	ldr	r3, .L3507+8
+	mov	r4, #24576
+	ldr	r3, [r3]
+.L3463:
+	add	r2, r6, fp
+	cmp	r3, r2
+	bcc	.L3492
+	adds	r3, r4, r6
+	ldr	r6, .L3507+12
+	str	r3, [sp, #28]
+	ldr	r3, .L3507+16
+	ldr	r0, [sp, #28]
+	ldr	r2, [r3]
+	ldr	r3, [r2, #24]
+	add	r3, r3, fp
+	str	r3, [r2, #24]
+	ldr	r3, .L3507+20
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #28]
+	mov	r1, r4
+	str	r0, [sp, #36]
+	add	r3, fp, r3
+	subs	r0, r3, #1
+	str	r3, [sp, #44]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #36]
+	ldr	r4, [sp, #36]
+	str	r0, [sp, #48]
+	rsb	r3, r3, #1
+	add	r3, r3, r0
+	str	r3, [sp, #32]
+	movs	r3, #0
+	str	r3, [sp, #40]
+.L3465:
+	ldr	r3, [sp, #32]
+	cbnz	r3, .L3490
+	ldr	r0, [sp, #40]
+.L3460:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3462:
+	cmp	r4, #3
+	bhi	.L3492
+	lsls	r4, r4, #13
+	mov	r3, #8192
+	b	.L3463
+.L3490:
+	ldr	r3, .L3507+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #36]
+	cmp	r4, r3
+	uxth	r7, r1
+	bne	.L3466
+	ldr	r0, [sp, #28]
+	bl	__aeabi_uidivmod
+	uxth	r8, r1
+	sub	r7, r7, r8
+	uxth	r7, r7
+	cmp	fp, r7
+	bcs	.L3467
+	uxth	r7, fp
+.L3467:
+	ldr	r2, .L3507+12
+	movs	r3, #0
+.L3470:
+	ldr	r1, [r2, #20]
+	cmp	r4, r1
+	bne	.L3468
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r1, r1, #28
+	bpl	.L3468
+	movs	r2, #48
+	lsls	r7, r7, #9
+	mov	r0, r5
+	mla	r3, r2, r3, r6
+	add	r5, r5, r7
+	mov	r2, r7
+	ldr	r1, [r3, #4]
+	add	r1, r1, r8, lsl #9
+	bl	ftl_memcpy
+.L3469:
+	ldr	r3, [sp, #32]
+	adds	r4, r4, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #32]
+.L3476:
+	ldr	r3, .L3507+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	bls	.L3477
+	ldr	r3, [sp, #32]
+	cmp	r3, #0
+	bne	.L3465
+.L3477:
+	ldr	r3, .L3507+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L3465
+	ldr	r3, .L3507+32
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	add	r0, r0, r0, lsl #1
+	add	r0, r6, r0, lsl #4
+	bl	sblk_read_page
+.L3479:
+	ldr	r3, .L3507+28
+	ldr	r8, .L3507+32
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L3489
+	movs	r1, #255
+	strb	r2, [r3]
+	strb	r1, [r8]
+	b	.L3465
+.L3466:
+	ldr	r3, [sp, #48]
+	mov	r8, #0
+	cmp	r4, r3
+	itttt	eq
+	ldreq	r3, [sp, #28]
+	addeq	r7, r3, fp
+	mlseq	r1, r4, r1, r7
+	uxtbeq	r7, r1
+	b	.L3467
+.L3468:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L3470
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #68]
+	adds	r0, r0, #1
+	bne	.L3471
+	movs	r2, #0
+	add	r1, sp, #68
+	mov	r0, r4
+	bl	pm_log2phys
+.L3471:
+	ldr	r3, [sp, #68]
+	adds	r3, r3, #1
+	bne	.L3472
+	ldr	r8, .L3507+20
+	movs	r7, #0
+.L3473:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r7, r3
+	bcs	.L3469
+	mla	r3, r3, r4, r7
+	ldr	r2, [sp, #28]
+	cmp	r2, r3
+	bhi	.L3474
+	ldr	r2, [sp, #44]
+	cmp	r2, r3
+	bls	.L3474
+	mov	r0, r5
+	add	r5, r5, #512
+	mov	r2, #512
+	movs	r1, #0
+	bl	ftl_memset
+.L3474:
+	adds	r7, r7, #1
+	b	.L3473
+.L3472:
+	movs	r0, #0
+	bl	buf_alloc
+	cmp	r0, #0
+	beq	.L3476
+	ldr	r2, .L3507+16
+	ldr	r1, [r2]
+	ldr	r2, [r1, #40]
+	adds	r2, r2, #1
+	str	r2, [r1, #40]
+	ldr	r2, [sp, #68]
+	str	r5, [r0, #8]
+	add	r5, r5, r7, lsl #9
+	str	r4, [r0, #20]
+	str	r2, [r0, #24]
+	str	r2, [r0, #28]
+	strb	r7, [r0, #40]
+	strb	r8, [r0, #41]
+	bl	zftl_add_read_buf
+	b	.L3469
+.L3508:
+	.align	2
+.L3507:
+	.word	.LANCHOR14
+	.word	.LC220
+	.word	.LANCHOR59
+	.word	.LANCHOR50
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.word	.LANCHOR52
+	.word	.LANCHOR127
+	.word	.LANCHOR126
+.L3489:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L3480
+	mov	r2, #1080
+	ldr	r1, .L3509
+	ldr	r0, .L3509+4
+	bl	printf
+.L3480:
+	ldrb	r7, [r8]	@ zero_extendqisi2
+	add	r3, r7, r7, lsl #1
+	add	r3, r6, r3, lsl #4
+	str	r3, [sp, #52]
+	movs	r3, #48
+	muls	r3, r7, r3
+	adds	r2, r6, r3
+	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	strb	r3, [r8]
+	ldr	r8, [r2, #36]
+	cmp	r8, #-1
+	bne	.L3481
+	ldr	r3, .L3509+8
+	str	r8, [sp, #40]
+	ldr	r2, [r3]
+	ldr	r3, [r2, #552]
+	adds	r3, r3, #1
+	str	r3, [r2, #552]
+.L3482:
+	movs	r3, #48
+	mla	r3, r3, r7, r6
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #20]
+	ldr	r1, [r2, #4]
+	cmp	r1, r3
+	bne	.L3483
+	cmp	r8, #-1
+	bne	.L3484
+.L3483:
+	ldr	r1, .L3509+8
+	mov	r10, #48
+	mla	r10, r10, r7, r6
+	ldr	r0, [r1]
+	ldr	r1, [r0, #552]
+	adds	r1, r1, #1
+	str	r1, [r0, #552]
+	ldr	r0, [r2, #12]
+	ldrb	r1, [r10, #1]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r0, [sp, #12]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #8]
+	ldr	r2, [r2]
+	ldr	r0, .L3509+12
+	str	r2, [sp, #4]
+	ldr	r2, [r10, #24]
+	str	r2, [sp]
+	mov	r2, r8
+	bl	printf
+	ldr	r3, .L3509+16
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [r10, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L3509+20
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L3484:
+	movs	r3, #48
+	mla	r3, r3, r7, r6
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #20]
+	ldr	r2, [r2, #4]
+	cmp	r2, r3
+	bne	.L3485
+	cmp	r8, #-1
+	bne	.L3486
+.L3485:
+	movw	r2, #1101
+	ldr	r1, .L3509
+	ldr	r0, .L3509+4
+	bl	printf
+.L3486:
+	movs	r3, #48
+	mla	r7, r3, r7, r6
+	ldr	r3, .L3509+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldrb	r2, [r7, #40]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L3487
+	ldrb	r1, [r7, #41]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	ldr	r3, [r7, #4]
+	ldr	r0, [r7, #8]
+	add	r1, r3, r1, lsl #9
+	bl	ftl_memcpy
+.L3488:
+	ldr	r1, [sp, #52]
+	ldr	r0, .L3509+28
+	bl	buf_remove_buf
+	ldr	r0, [sp, #52]
+	bl	buf_free
+	ldr	r2, .L3509+32
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r2]
+	b	.L3479
+.L3481:
+	cmp	r8, #256
+	bne	.L3482
+	ldr	r1, .L3509+16
+	ldr	r3, [r2, #24]
+	str	r2, [sp, #60]
+	movs	r2, #1
+	ldrh	r0, [r1]
+	ldr	r1, .L3509+20
+	str	r3, [sp, #56]
+	rsb	ip, r0, #21
+	lsl	ip, r2, ip
+	lsr	r0, r3, r0
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	add	ip, ip, #-1
+	and	r0, ip, r0
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #60]
+	mov	r10, r0
+	uxth	r1, r0
+	ldr	r3, [sp, #56]
+	ldr	r0, .L3509+36
+	ldr	r2, [r2, #20]
+	bl	printf
+	movs	r2, #0
+	movs	r1, #1
+	uxth	r0, r10
+	bl	gc_add_sblk
+	b	.L3482
+.L3487:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	bic	r3, r3, #8
+	strb	r3, [r7, #2]
+	b	.L3488
+.L3492:
+	mov	r0, #-1
+	b	.L3460
+.L3510:
+	.align	2
+.L3509:
+	.word	.LANCHOR213
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LC222
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR123
+	.word	.LANCHOR129
+	.word	.LANCHOR127
+	.word	.LC221
+	.size	zftl_read, .-zftl_read
+	.section	.text.ftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_read
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.zftl_sys_read,"ax",%progbits
+	.align	1
+	.global	zftl_sys_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sys_read, %function
+zftl_sys_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_read
+	.size	zftl_sys_read, .-zftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_memset
+	mov	r3, r4
+	mov	r1, r5
+	movs	r2, #1
+	movs	r0, #2
+	pop	{r4, r5, r6, lr}
+	b	zftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_read
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	zftl_read
+	.size	ftl_read, .-ftl_read
+	.section	.text.gc_check_data_one_wl,"ax",%progbits
+	.align	1
+	.global	gc_check_data_one_wl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r4, .L3541
+	ldr	r3, .L3541+4
+	ldr	r2, [r4, #8]
+	ldr	r7, [r3]
+	mov	r8, r3
+	cbnz	r2, .L3517
+	movs	r0, #1
+	bl	buf_alloc
+	str	r0, [r4, #8]
+.L3517:
+	ldr	r5, [r4, #8]
+	cbnz	r5, .L3518
+	movw	r2, #495
+	ldr	r1, .L3541+8
+	ldr	r0, .L3541+12
+	bl	printf
+.L3518:
+	add	r3, r7, #96
+	mov	r10, #0
+.L3519:
+	ldrb	r1, [r7, #89]	@ zero_extendqisi2
+	cmp	r10, r1
+	bge	.L3528
+	movs	r6, #1
+	b	.L3529
+.L3527:
+	ldr	r2, .L3541+16
+	ldrh	r0, [r3]
+	ldrh	r1, [r2]
+	ldr	r2, .L3541+20
+	ldrb	ip, [r2]	@ zero_extendqisi2
+	muls	r0, r1, r0
+	ldrh	r1, [r4, #12]
+	cmp	ip, #3
+	bne	.L3520
+	add	r1, r1, r0
+	orr	r1, r1, r6, lsl #24
+.L3540:
+	str	r1, [r5, #24]
+	mov	r0, r5
+	movs	r1, #1
+	str	r3, [sp, #28]
+	bl	sblk_read_page
+	ldr	r1, [r5, #36]
+	ldr	fp, .L3541+56
+	ldr	r3, [sp, #28]
+	adds	r1, r1, #1
+	beq	.L3523
+	ldr	r0, [fp]
+	ldrh	ip, [r4, #18]
+	ldr	r1, [r5, #12]
+	ldr	r2, [r0, ip, lsl #2]
+	ldr	r0, [r1, #4]
+	cmp	r2, r0
+	bne	.L3523
+	ldr	r0, .L3541+24
+	ldr	r1, [r1, #8]
+	ldr	r0, [r0]
+	ldr	r0, [r0, ip, lsl #2]
+	cmp	r0, r1
+	beq	.L3524
+.L3523:
+	ldr	r1, [fp]
+	ldrh	r0, [r4, #18]
+	ldr	r0, [r1, r0, lsl #2]
+	adds	r0, r0, #1
+	beq	.L3524
+	ldr	r6, .L3541+28
+	ldrb	r3, [r7, #89]	@ zero_extendqisi2
+	ldr	r0, .L3541+32
+	ldrh	r2, [r6]
+	muls	r3, r2, r3
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldrh	r2, [r6]
+	ldrb	r3, [r7, #89]	@ zero_extendqisi2
+	ldr	r6, .L3541+24
+	ldr	r0, .L3541+36
+	muls	r3, r2, r3
+	ldr	r1, [r6]
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldr	r3, .L3541+40
+	ldr	r3, [r3]
+	lsls	r3, r3, #21
+	bpl	.L3525
+	ldr	r3, [r5, #12]
+	ldrh	r2, [r4, #18]
+	ldr	r1, [fp]
+	ldr	r0, [r3, #12]
+	str	r0, [sp, #16]
+	ldr	r0, [r3, #8]
+	str	r0, [sp, #12]
+	ldr	r0, [r3, #4]
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r0, .L3541+44
+	str	r3, [sp, #4]
+	ldr	r3, [r6]
+	ldr	r3, [r3, r2, lsl #2]
+	str	r3, [sp]
+	ldr	r3, [r1, r2, lsl #2]
+	ldr	r2, [r5, #36]
+	ldr	r1, [r5, #24]
+	bl	printf
+.L3525:
+	ldr	r3, [r8]
+	movs	r1, #0
+	ldrh	r0, [r3, #80]
+	bl	ftl_sblk_dump
+	ldr	r3, .L3541+48
+	mov	r0, #-1
+	ldrh	r2, [r7, #80]
+	movs	r1, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L3526:
+.L3516:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3520:
+	cmp	ip, #2
+	itett	eq
+	addeq	r1, r1, #-1
+	addne	r1, r1, r0
+	addeq	r1, r1, r0
+	addeq	r1, r1, r6
+	it	eq
+	orreq	r1, r1, #33554432
+	b	.L3540
+.L3524:
+	ldrh	r1, [r4, #18]
+	adds	r6, r6, #1
+	adds	r1, r1, #1
+	strh	r1, [r4, #18]	@ movhi
+.L3529:
+	ldrh	r1, [r4, #16]
+	cmp	r6, r1
+	ble	.L3527
+	add	r10, r10, #1
+	adds	r3, r3, #2
+	b	.L3519
+.L3528:
+	ldrh	r3, [r4, #12]
+	adds	r2, r3, #1
+	strh	r2, [r4, #12]	@ movhi
+	ldr	r2, .L3541+52
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	cmp	r0, #0
+	beq	.L3516
+	adds	r3, r3, #2
+	movs	r0, #0
+	strh	r3, [r4, #12]	@ movhi
+	b	.L3516
+.L3542:
+	.align	2
+.L3541:
+	.word	.LANCHOR63
+	.word	.LANCHOR10
+	.word	.LANCHOR214
+	.word	.LC0
+	.word	.LANCHOR103
+	.word	.LANCHOR71
+	.word	.LANCHOR153
+	.word	.LANCHOR77
+	.word	.LC223
+	.word	.LC224
+	.word	.LANCHOR14
+	.word	.LC225
+	.word	.LANCHOR9
+	.word	.LANCHOR72
+	.word	.LANCHOR152
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.global	__aeabi_idivmod
+	.section	.text.ftl_update_l2p_map,"ax",%progbits
+	.align	1
+	.global	ftl_update_l2p_map
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3572
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r7, [r0, #9]	@ zero_extendqisi2
+	mov	r6, r0
+	ldrh	r3, [r3]
+	ldr	r2, .L3572+4
+	muls	r7, r3, r7
+	ldr	r4, [r2]
+	ldrh	r3, [r0, #12]
+	str	r2, [sp, #4]
+	add	r4, r4, r3, lsl #2
+	add	r3, r7, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L3544
+	mov	r2, #1640
+	ldr	r1, .L3572+8
+	ldr	r0, .L3572+12
+	bl	printf
+.L3544:
+	movs	r5, #0
+	subs	r4, r4, #4
+	mov	r10, r5
+.L3545:
+	cmp	r10, r7
+	bne	.L3551
+	ldr	r3, .L3572+16
+	ldr	r4, .L3572+20
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L3552
+	ldrh	r1, [r6]
+	mov	r2, r5
+	ldr	r3, [r4]
+	ldr	r0, .L3572+24
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L3552:
+	ldrh	r2, [r6]
+	ldr	r3, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3551:
+	ldr	r8, [r4, #4]!
+	cmp	r8, #-1
+	beq	.L3546
+	ldr	r3, .L3572+28
+	mov	r0, r8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp]
+	ldr	r3, .L3572+16
+	ldr	r3, [r3]
+	lsls	r2, r3, #19
+	bpl	.L3547
+	mov	r3, r10
+	mov	r2, r8
+	ldr	r1, [sp]
+	ldr	r0, .L3572+32
+	bl	printf
+.L3547:
+	mov	r8, r4
+	mov	fp, r10
+.L3550:
+	ldr	r0, [r8]
+	adds	r3, r0, #1
+	beq	.L3548
+	ldr	r3, .L3572+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L3548
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
+	mov	r0, fp
+	mov	r1, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idivmod
+	ldr	r3, .L3572+36
+	adds	r1, r1, #8
+	ldrh	r0, [r6, r1, lsl #1]
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #12]
+	muls	r2, r0, r2
+	mov	r1, r3
+	mov	r0, fp
+	str	r2, [sp, #8]
+	bl	__aeabi_idiv
+	ldr	r2, [sp, #8]
+	add	r2, r2, r0
+	ldr	r0, .L3572+40
+	str	r2, [sp, #20]
+	ldr	r1, [r8]
+	bl	pm_ppa_update_check
+	cbz	r0, .L3549
+	ldr	r1, [sp, #4]
+	mov	r3, r7
+	movs	r2, #4
+	ldr	r0, .L3572+44
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+.L3549:
+	adds	r5, r5, #1
+	movs	r2, #1
+	uxth	r5, r5
+	add	r1, sp, #20
+	ldr	r0, [r8]
+	bl	pm_log2phys
+	mov	r3, #-1
+	str	r3, [r8]
+.L3548:
+	add	fp, fp, #1
+	add	r8, r8, #4
+	cmp	r7, fp
+	bne	.L3550
+.L3546:
+	add	r10, r10, #1
+	b	.L3545
+.L3573:
+	.align	2
+.L3572:
+	.word	.LANCHOR85
+	.word	.LANCHOR109
+	.word	.LANCHOR215
+	.word	.LC0
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LC229
+	.word	.LANCHOR123
+	.word	.LC226
+	.word	.LANCHOR103
+	.word	.LC227
+	.word	.LC228
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_new_data_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldrh	r6, [r0]
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldrh	r0, [r5]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3575
+	bl	zftl_insert_data_list
+.L3575:
+	ldr	r4, .L3579
+	mov	r0, r5
+	ldr	r1, [r4]
+	adds	r1, r1, #16
+	cmp	r5, r1
+	ite	eq
+	moveq	r1, #2
+	movne	r1, #3
+	bl	ftl_open_sblk_init
+	ldr	r3, [r4]
+	ldr	r3, [r3, #560]
+	cmp	r3, r6
+	bne	.L3577
+	movw	r5, #65535
+	cmp	r6, r5
+	beq	.L3577
+	mov	r1, r6
+	ldr	r0, .L3579+4
+	bl	printf
+	ldr	r3, [r4]
+	ldr	r0, [r3, #564]
+	bl	gc_mark_bad_ppa
+	ldr	r3, [r4]
+	mov	r2, #-1
+	str	r5, [r3, #560]
+	str	r2, [r3, #564]
+.L3577:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L3580:
+	.align	2
+.L3579:
+	.word	.LANCHOR10
+	.word	.LC230
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",%progbits
+	.align	1
+	.global	ftl_write_commit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r7, .L3641
+.L3582:
+	ldr	r1, .L3641+4
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L3584
+	ldr	r0, .L3641+8
+	subs	r3, r3, #1
+	strb	r3, [r1]
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	add	r2, r2, r2, lsl #1
+	ldr	r4, [sp, #8]
+	add	r2, r7, r2, lsl #4
+	str	r2, [sp, #20]
+	movs	r2, #48
+	muls	r2, r4, r2
+	ldr	r4, .L3641+12
+	ldr	r3, [r4]
+	adds	r5, r7, r2
+	ldrb	r2, [r7, r2]	@ zero_extendqisi2
+	strb	r2, [r0]
+	ldr	r2, [r5, #20]
+	cmp	r2, r3
+	bcc	.L3586
+	mov	r2, #502
+	ldr	r1, .L3641+16
+	ldr	r0, .L3641+20
+	bl	printf
+.L3586:
+	ldr	r2, [sp, #8]
+	movs	r3, #48
+	mla	r3, r3, r2, r7
+	ldr	r2, [r4]
+	ldr	r8, [r3, #20]
+	cmp	r8, r2
+	bcc	.L3587
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	mov	r0, #-1
+.L3581:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3587:
+	ldr	r2, [r3, #12]
+	ldr	fp, [r3, #4]
+	ldrb	r4, [r3, #41]	@ zero_extendqisi2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	str	r3, [sp, #16]
+	ldr	r3, .L3641+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3589
+	ldr	r3, .L3641+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	add	r3, r7, r3, lsl #4
+.L3590:
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L3591
+	ldr	r2, [r3, #20]
+	cmp	r8, r2
+	bne	.L3589
+	ldr	r0, [r3, #4]
+	lsls	r4, r4, #9
+	ldr	r3, [sp, #16]
+	add	r1, fp, r4
+	add	r0, r0, r4
+	lsls	r2, r3, #9
+	bl	ftl_memcpy
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	b	.L3582
+.L3591:
+	add	r2, r2, r2, lsl #1
+	add	r3, r7, r2, lsl #4
+	b	.L3590
+.L3589:
+	mov	r0, r8
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L3593
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r8
+	bl	pm_log2phys
+.L3593:
+	ldr	r3, .L3641+32
+	ldr	r2, .L3641
+	ldr	r6, [r3]
+	movs	r3, #0
+	adds	r6, r6, #16
+.L3596:
+	ldr	r1, [r2, #20]
+	cmp	r8, r1
+	bne	.L3594
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r0, r1, #28
+	bpl	.L3594
+	movs	r2, #48
+	bic	r1, r1, #8
+	mla	r3, r2, r3, r7
+	strb	r1, [r3, #2]
+	ldr	r5, [r3, #4]
+	ldr	r3, [r3, #24]
+	str	r3, [sp, #28]
+.L3595:
+	ldr	r10, .L3641+36
+	ldr	r2, [sp, #16]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r2, r3
+	bcs	.L3620
+	cbz	r5, .L3598
+	cbz	r4, .L3599
+	lsls	r2, r4, #9
+	mov	r1, r5
+	mov	r0, fp
+	bl	ftl_memcpy
+	ldr	r3, .L3641+32
+	ldr	r6, [r3]
+	adds	r6, r6, #48
+.L3599:
+	ldr	r3, [sp, #16]
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	add	r4, r4, r3
+	cmp	r4, r2
+	bcc	.L3600
+	ldr	r3, .L3641+32
+	ldr	r6, [r3]
+	adds	r6, r6, #16
+.L3620:
+	mov	r10, #0
+	b	.L3597
+.L3594:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L3596
+	movs	r5, #0
+	b	.L3595
+.L3600:
+	lsls	r0, r4, #9
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	adds	r1, r5, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L3620
+.L3642:
+	.align	2
+.L3641:
+	.word	.LANCHOR50
+	.word	.LANCHOR58
+	.word	.LANCHOR57
+	.word	.LANCHOR120
+	.word	.LANCHOR216
+	.word	.LC0
+	.word	.LANCHOR121
+	.word	.LANCHOR174
+	.word	.LANCHOR10
+	.word	.LANCHOR123
+.L3598:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	beq	.L3601
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #28]
+	mov	r5, r0
+	str	r8, [r0, #20]
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #4]
+	add	r10, r2, #1
+	cmp	r8, r3
+	bne	.L3602
+	ldr	r3, [r5, #36]
+	adds	r3, r3, #1
+	bne	.L3603
+.L3602:
+	ldr	r3, .L3643
+	ldr	r0, .L3643+4
+	ldr	r2, [r3]
+	ldr	r3, [r2, #552]
+	adds	r3, r3, #1
+	str	r3, [r2, #552]
+	ldr	r3, [r5, #36]
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	ldr	r2, [sp, #28]
+	str	r3, [sp]
+	mov	r3, r8
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r5, #12]
+	mov	r2, r3
+	ldr	r0, .L3643+8
+	bl	rknand_print_hex
+.L3603:
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	cmp	r8, r3
+	bne	.L3604
+	ldr	r3, [r5, #36]
+	adds	r3, r3, #1
+	bne	.L3605
+.L3604:
+	movw	r2, #573
+	ldr	r1, .L3643+12
+	ldr	r0, .L3643+16
+	bl	printf
+.L3605:
+	cbz	r4, .L3606
+	ldr	r3, [sp, #28]
+	lsls	r2, r4, #9
+	adds	r3, r3, #1
+	beq	.L3607
+	ldr	r1, [r5, #4]
+	mov	r0, fp
+	bl	ftl_memcpy
+.L3608:
+	ldr	r3, .L3643
+	ldr	r6, [r3]
+	adds	r6, r6, #48
+.L3606:
+	ldr	r3, [sp, #16]
+	add	r4, r4, r3
+	ldr	r3, .L3643+20
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r4, r2
+	bcc	.L3609
+	bls	.L3610
+	ldr	r3, .L3643
+	ldr	r6, [r3]
+	adds	r6, r6, #16
+.L3610:
+	cbz	r5, .L3597
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r0, .L3643+24
+	bic	r3, r3, #8
+	strb	r3, [r5, #2]
+	bl	buf_remove_buf
+	mov	r0, r5
+	bl	buf_free
+.L3597:
+	ldrh	r3, [r6, #6]
+	cbnz	r3, .L3612
+	bl	ftl_flush
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L3612:
+	mov	r0, r6
+	bl	ftl_get_new_free_page
+	ldr	r2, [sp, #8]
+	movs	r3, #48
+	ldr	r4, [sp, #12]
+	muls	r3, r2, r3
+	adds	r2, r7, r3
+	ldr	r1, [r2, #16]
+	str	r8, [r4, #4]
+	str	r10, [r4, #12]
+	str	r1, [r4]
+	ldr	r1, [sp, #28]
+	str	r1, [r4, #8]
+	str	r1, [r2, #28]
+	movs	r1, #255
+	strb	r1, [r7, r3]
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	ldrh	r1, [r6, #12]
+	str	r0, [r2, #24]
+	orr	r3, r3, #10
+	ldr	r0, .L3643+28
+	strb	r3, [r2, #2]
+	ldrh	r3, [r6, #10]
+	add	r3, r3, r1
+	ldr	r1, [sp, #20]
+	subs	r3, r3, #1
+	strh	r3, [r2, #32]	@ movhi
+	bl	buf_add_tail
+	ldr	r2, .L3643+32
+	movs	r1, #0
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	strb	r3, [r2]
+	cmp	r3, #2
+	ldr	r2, .L3643+36
+	str	r1, [r2]
+	ldrh	r2, [r6, #6]
+	bhi	.L3613
+	cmp	r2, #1
+	bne	.L3585
+.L3613:
+	ldr	r5, .L3643+28
+	mov	ip, #48
+	ldrb	r1, [r6, #5]	@ zero_extendqisi2
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	cmp	r1, #0
+	mov	r1, #0
+	ite	ne
+	movne	r4, #2
+	moveq	r4, #1
+	cmp	r2, #1
+	it	eq
+	moveq	r4, r3
+	mov	r2, r0
+.L3617:
+	cmp	r1, r4
+	bne	.L3618
+	strb	r2, [r5]
+	uxtb	r1, r1
+	ldr	r2, .L3643+32
+	add	r0, r0, r0, lsl #1
+	subs	r3, r3, r1
+	add	r0, r7, r0, lsl #4
+	strb	r3, [r2]
+	bl	sblk_prog_page
+	ldrh	r3, [r6, #6]
+	cmp	r3, #1
+	bne	.L3585
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	r0, r6
+	bl	ftl_write_last_log_page
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L3585:
+	ldr	r3, .L3643+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L3582
+.L3584:
+	bl	ftl_write_completed
+	movs	r0, #0
+	b	.L3581
+.L3609:
+	ldr	r3, [sp, #28]
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	lsls	r0, r4, #9
+	adds	r3, r3, #1
+	beq	.L3611
+	ldr	r1, [r5, #4]
+	add	r1, r1, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L3610
+.L3611:
+	movs	r1, #0
+	add	r0, r0, fp
+	bl	ftl_memset
+	b	.L3610
+.L3618:
+	mul	r2, ip, r2
+	adds	r1, r1, #1
+	ldrb	r2, [r7, r2]	@ zero_extendqisi2
+	b	.L3617
+.L3619:
+	lsls	r2, r4, #9
+	mov	r10, r5
+.L3607:
+	movs	r1, #0
+	mov	r0, fp
+	bl	ftl_memset
+	b	.L3608
+.L3601:
+	cmp	r4, #0
+	bne	.L3619
+	mov	r10, r4
+	mov	r5, r4
+	b	.L3606
+.L3644:
+	.align	2
+.L3643:
+	.word	.LANCHOR10
+	.word	.LC231
+	.word	.LC189
+	.word	.LANCHOR216
+	.word	.LC0
+	.word	.LANCHOR123
+	.word	.LANCHOR129
+	.word	.LANCHOR174
+	.word	.LANCHOR121
+	.word	.LANCHOR217
+	.word	.LANCHOR58
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.gc_do_copy_back,"ax",%progbits
+	.align	1
+	.global	gc_do_copy_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3742
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cmp	r0, #0
+	bne	.L3646
+	bl	buf_alloc
+	mov	r4, r0
+	cmp	r0, #0
+	beq	.L3645
+	ldr	r6, .L3742+4
+	ldrh	r2, [r6, #22]
+	mov	r0, r2
+	bl	gc_get_src_ppa_from_index
+	movs	r1, #1
+	adds	r2, r2, #1
+	str	r0, [r4, #24]
+	mov	r7, r0
+	mov	r0, r4
+	strh	r2, [r6, #22]	@ movhi
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r1, r3, #1
+	beq	.L3648
+	cmp	r3, #512
+	bne	.L3649
+.L3648:
+	mov	r2, #732
+	ldr	r1, .L3742+8
+	ldr	r0, .L3742+12
+	bl	printf
+.L3649:
+	ldr	r3, [r4, #12]
+	ldr	r5, [r3, #4]
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #48]
+	adds	r0, r0, #1
+	bne	.L3650
+	movs	r2, #0
+	add	r1, sp, #48
+	mov	r0, r5
+	bl	pm_log2phys
+.L3650:
+	ldr	r8, [sp, #48]
+	cmp	r7, r8
+	bne	.L3651
+	ldr	r0, .L3742+16
+	movs	r3, #0
+.L3654:
+	adds	r2, r0, r3
+	ldr	r1, [r2, #20]
+	cmp	r5, r1
+	bne	.L3652
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	lsls	r2, r2, #30
+	bpl	.L3652
+	mov	r0, r4
+	bl	buf_free
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L3645
+	ldrh	r3, [r6, #22]
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L3742+24
+	bl	printf
+.L3645:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3652:
+	adds	r3, r3, #48
+	cmp	r3, #1536
+	bne	.L3654
+	movs	r3, #0
+	str	r5, [r4, #20]
+	strb	r3, [r4, #41]
+	ldr	r3, .L3742+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #40]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #10
+	strb	r3, [r4, #2]
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3]
+	str	r3, [r4, #16]
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r2, r3, #23
+	bpl	.L3655
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L3742+32
+	bl	printf
+.L3655:
+	mov	r0, r4
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	ldr	r3, .L3742+36
+	ldr	r2, [r3]
+	ldr	r3, [r2, #60]
+	adds	r3, r3, #1
+	str	r3, [r2, #60]
+	ldrh	r3, [r6, #24]
+	adds	r3, r3, #1
+	strh	r3, [r6, #24]	@ movhi
+	b	.L3645
+.L3651:
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L3656
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L3742+32
+	bl	printf
+.L3656:
+	mov	r0, r4
+	bl	buf_free
+	b	.L3645
+.L3646:
+	ldr	r3, .L3742+40
+	ldr	r5, .L3742+4
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L3742+44
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #28]
+	cmp	r8, #3
+	ldrb	r7, [r3, #89]	@ zero_extendqisi2
+	bne	.L3657
+	ldr	r3, .L3742+48
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3658
+	add	r1, r7, r7, lsl #1
+	mov	r0, r4
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	sub	r0, r7, r7, lsl #2
+	str	r8, [sp, #32]
+	smulbb	r0, r0, r10
+	add	r0, r0, r4
+	uxth	fp, r0
+.L3659:
+	ldr	r3, [sp, #32]
+	muls	r3, r7, r3
+	str	r3, [sp, #36]
+	ldr	r3, .L3742+52
+	ldrh	r1, [r3]
+	ldr	r3, .L3742+56
+	ldr	r8, [r3]
+	muls	r1, r7, r1
+	ldrh	r3, [r5, #20]
+	movs	r7, #0
+	str	r3, [sp, #40]
+	subs	r1, r1, #1
+	ldr	r3, .L3742+4
+.L3662:
+	ldr	r0, [sp, #36]
+	uxth	r2, r7
+	cmp	r2, r0
+	blt	.L3664
+.L3696:
+	movs	r6, #1
+	b	.L3660
+.L3658:
+	mov	r0, r4
+	mov	r1, r7
+	bl	__aeabi_idiv
+	ldr	r3, .L3742+60
+	str	r8, [sp, #32]
+	ldrh	r6, [r3, r0, lsl #1]
+	smulbb	r0, r0, r7
+	subs	r0, r4, r0
+	lsr	r10, r6, #3
+	uxth	fp, r0
+	mla	r4, r7, r10, fp
+	and	r6, r6, #7
+	cmp	r6, #1
+	add	r4, r4, r4, lsl #1
+	uxth	r4, r4
+	beq	.L3659
+.L3660:
+	ldr	r3, .L3742+20
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L3665
+	ldr	r3, .L3742+56
+	mov	r2, r6
+	str	r4, [sp, #8]
+	mov	r1, r10
+	ldr	r0, .L3742+64
+	ldr	r3, [r3]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [sp, #4]
+	ldrh	r3, [r5, #310]
+	str	r3, [sp]
+	mov	r3, fp
+	bl	printf
+.L3665:
+	movs	r3, #0
+.L3740:
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #40]
+	mov	r8, r3
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #28]
+	ldrb	r1, [r3, #89]	@ zero_extendqisi2
+	ldr	r3, [sp, #32]
+	mul	r0, r1, r3
+	cmp	r8, r0
+	blt	.L3681
+	ldr	r3, .L3742+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L3682
+	ldr	r3, .L3742+48
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #48]
+	cmp	r2, #0
+	beq	.L3683
+	movs	r2, #0
+.L3686:
+	strb	r2, [r3, #44]
+	add	r0, sp, #48
+	mov	r2, r1
+	add	r1, sp, #60
+	bl	sblk_xlc_prog_pages
+.L3687:
+	ldr	r3, [sp, #28]
+	ldr	r1, .L3742+48
+	ldrb	r2, [r3, #89]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	uxth	r3, r2
+	cmp	r1, #0
+	beq	.L3692
+	add	r3, r3, r3, lsl #1
+.L3693:
+	ldr	r1, .L3742+36
+	ldr	r0, [r1]
+	ldr	r1, [r0, #52]
+	add	r1, r1, r3
+	str	r1, [r0, #52]
+	ldr	r1, .L3742+4
+	ldrh	r0, [r1, #310]
+	add	r3, r3, r0
+	uxth	r3, r3
+	strh	r3, [r1, #310]	@ movhi
+	ldr	r1, .L3742+52
+	ldrh	r1, [r1]
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itttt	ge
+	ldrge	r3, .L3742+40
+	movge	r2, #0
+	ldrge	r3, [r3]
+	strhge	r2, [r3, #86]	@ movhi
+	bl	gc_write_completed
+	b	.L3645
+.L3657:
+	ldr	r3, .L3742+68
+	mov	r1, r7
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r4
+	cbnz	r3, .L3661
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #1
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+.L3738:
+	str	r3, [sp, #32]
+	b	.L3659
+.L3661:
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #2
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+	b	.L3738
+.L3743:
+	.align	2
+.L3742:
+	.word	.LANCHOR76
+	.word	.LANCHOR63
+	.word	.LANCHOR218
+	.word	.LC0
+	.word	.LANCHOR50
+	.word	.LANCHOR14
+	.word	.LC232
+	.word	.LANCHOR123
+	.word	.LC233
+	.word	.LANCHOR102
+	.word	.LANCHOR10
+	.word	.LANCHOR71
+	.word	.LANCHOR75
+	.word	.LANCHOR77
+	.word	.LANCHOR153
+	.word	.LANCHOR219
+	.word	.LC234
+	.word	.LANCHOR72
+.L3664:
+	add	r2, r2, r4
+	cmp	r2, r1
+	beq	.L3696
+	ldr	r0, [r8, r2, lsl #2]
+	adds	r0, r0, #1
+	bne	.L3663
+	ldrh	r6, [r3, #22]
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #40]
+	cmp	r6, r3
+	bcs	.L3645
+	mov	r0, r6
+	adds	r6, r6, #1
+	bl	gc_get_src_ppa_from_index
+	ldr	r3, [sp, #44]
+	strh	r6, [r3, #22]	@ movhi
+	str	r0, [r8, r2, lsl #2]
+.L3663:
+	adds	r7, r7, #1
+	b	.L3662
+.L3681:
+	ldr	r3, .L3744
+	add	r7, r4, r8
+	ldr	r3, [r3]
+	ldrb	r3, [r3, r7]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L3667
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r5, r0
+	cbnz	r0, .L3668
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	r0, r5
+	bl	buf_alloc
+	mov	r5, r0
+	cmp	r0, #0
+	beq	.L3645
+.L3668:
+	ldr	r3, .L3744
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	strb	r2, [r3, r7]
+	ldr	r2, .L3744+4
+	strb	r6, [r5, #45]
+	ldrb	r3, [r2, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2, #7]
+	ldr	r3, [sp, #36]
+	add	r3, r3, r4
+	strh	r3, [r5, #32]	@ movhi
+	ldr	r3, .L3744+8
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #28]
+	ldrb	r3, [r3, #89]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	subs	r3, r3, #1
+	cmp	r7, r3
+	bne	.L3669
+	ldr	r3, .L3744+12
+	ldr	r0, [r5, #4]
+	ldr	r1, [r3]
+	mov	r3, #-1
+	str	r3, [r1, r7, lsl #2]
+	ldr	r3, .L3744+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldr	r3, .L3744+8
+	ldr	r2, .L3744+16
+	ldr	r0, [r5, #4]
+	ldrh	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3744+20
+	ldr	r1, [r3]
+	lsls	r2, r2, #2
+	add	r0, r0, r2
+	bl	ftl_memcpy
+	ldr	r3, .L3744+24
+	movs	r1, #0
+	ldr	r0, [r5, #12]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r3, [r5, #12]
+	ldr	r2, .L3744+28
+	ldr	r0, [r5, #4]
+	str	r3, [sp, #44]
+	str	r2, [r3]
+	ldr	r3, .L3744+8
+	ldrh	r2, [r3]
+	ldr	r3, .L3744+16
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	muls	r1, r2, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r2, .L3744+32
+	ldr	r3, [sp, #44]
+	ldr	r2, [r2]
+	str	r0, [r3, #4]
+	ldr	r2, [r2, #132]
+.L3739:
+	str	r2, [r3, #8]
+.L3667:
+	ldr	r3, .L3744
+	ldr	r2, .L3744+36
+	ldr	ip, [r3]
+	add	r3, sp, #72
+	add	r1, r3, r8, lsl #2
+	ldrb	r5, [ip, r7]	@ zero_extendqisi2
+	add	r3, r5, r5, lsl #1
+	add	r3, r2, r3, lsl #4
+	str	r3, [r1, #-24]
+	movs	r3, #48
+	mla	r2, r3, r5, r2
+	movs	r3, #2
+	strh	r3, [r2, #34]	@ movhi
+	ldr	r3, .L3744+40
+	strb	r6, [r2, #45]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L3676
+	ldr	r3, [sp, #36]
+	ldr	r0, .L3744+44
+	umull	r0, r1, r3, r0
+	ldr	r0, [sp, #28]
+	lsrs	r3, r1, #1
+	uxtah	r1, fp, r3
+	add	r3, r3, r3, lsl #1
+	add	r1, r0, r1, lsl #1
+	ldrh	r0, [r1, #96]
+	ldr	r1, .L3744+48
+	ldrh	r1, [r1]
+	muls	r1, r0, r1
+	ldrh	r0, [r2, #32]
+	orr	r1, r1, r10
+	str	r1, [r2, #24]
+	ldr	r2, .L3744+52
+	ldr	lr, [r2]
+	ldr	r2, [sp, #36]
+	subs	r3, r2, r3
+	lsls	r3, r3, #24
+	add	r3, r3, #16777216
+	orrs	r1, r1, r3
+	str	r1, [lr, r0, lsl #2]
+.L3677:
+	ldr	r3, .L3744+56
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L3680
+	ldr	r3, .L3744+4
+	movs	r2, #48
+	ldr	r0, .L3744+60
+	ldrb	r1, [r3, #6]	@ zero_extendqisi2
+	ldr	r3, .L3744+36
+	mla	r5, r2, r5, r3
+	ldr	r2, .L3744+44
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #36]
+	umull	r2, r3, r3, r2
+	mov	r2, r6
+	ubfx	r3, r3, #1, #16
+	add	r3, r3, fp
+	str	r3, [sp, #16]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldrh	r3, [r5, #32]
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #24]
+	str	r3, [sp, #4]
+	ldrb	r3, [ip, r7]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r1
+	mov	r1, r8
+	bl	printf
+.L3680:
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	b	.L3740
+.L3669:
+	ldr	r3, .L3744+20
+	movs	r1, #1
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r3, [r3, r7, lsl #2]
+	str	r3, [r5, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r1, r3, #1
+	beq	.L3670
+	cmp	r3, #512
+	bne	.L3674
+.L3670:
+	ldr	r3, .L3744+64
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [r5, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L3744+68
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L3672
+	cmp	r3, #512
+	bne	.L3674
+.L3672:
+	ldr	r3, [r5, #12]
+	mov	r2, #-1
+	str	r2, [r3, #4]
+	ldr	r3, [r5, #36]
+	cmp	r3, r2
+	beq	.L3673
+	cmp	r3, #512
+	bne	.L3674
+.L3673:
+	movw	r2, #847
+	ldr	r1, .L3744+72
+	ldr	r0, .L3744+76
+	bl	printf
+.L3674:
+	ldr	r3, [r5, #12]
+	ldr	r2, .L3744+80
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	itt	cs
+	movcs	r2, #-1
+	strcs	r2, [r3, #4]
+	ldr	r2, .L3744+12
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	str	r1, [r2, r7, lsl #2]
+	ldr	r2, [r5, #24]
+	b	.L3739
+.L3676:
+	cmp	r3, #2
+	bne	.L3678
+	ldr	r3, .L3744+84
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3679
+	ldr	r1, [sp, #28]
+	add	r3, r8, fp
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L3744+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+.L3741:
+	orr	r3, r3, #33554432
+	str	r3, [r2, #24]
+.L3678:
+	ldr	r2, .L3744+36
+	movs	r3, #48
+	mla	r3, r3, r5, r2
+	ldr	r1, [r3, #24]
+	ldrh	r2, [r3, #32]
+	ldr	r3, .L3744+52
+	ldr	r3, [r3]
+	str	r1, [r3, r2, lsl #2]
+	b	.L3677
+.L3679:
+	ldr	r3, [sp, #36]
+	ldr	r1, [sp, #28]
+	add	r3, fp, r3, lsr #1
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L3744+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+	ldr	r1, [sp, #36]
+	and	r1, r1, #1
+	add	r3, r3, r1
+	b	.L3741
+.L3683:
+	cmp	r6, #1
+	bne	.L3685
+	movs	r2, #9
+	b	.L3686
+.L3685:
+	cmp	r6, #2
+	it	eq
+	moveq	r2, #13
+	b	.L3686
+.L3745:
+	.align	2
+.L3744:
+	.word	.LANCHOR74
+	.word	.LANCHOR63
+	.word	.LANCHOR77
+	.word	.LANCHOR152
+	.word	.LANCHOR78
+	.word	.LANCHOR153
+	.word	.LANCHOR123
+	.word	-178307901
+	.word	.LANCHOR10
+	.word	.LANCHOR50
+	.word	.LANCHOR71
+	.word	-1431655765
+	.word	.LANCHOR103
+	.word	.LANCHOR154
+	.word	.LANCHOR14
+	.word	.LC235
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR218
+	.word	.LC0
+	.word	.LANCHOR120
+	.word	.LANCHOR72
+.L3682:
+	ldr	r3, .L3746
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L3688
+	ldr	r3, .L3746+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3689
+.L3688:
+	subs	r0, r0, #1
+.L3690:
+	uxth	r2, r3
+	adds	r3, r3, #1
+	cmp	r2, r0
+	blt	.L3691
+	add	r3, sp, #72
+	movs	r2, #255
+	add	r0, r3, r0, lsl #2
+	ldr	r3, [r0, #-24]
+	strb	r2, [r3]
+	ldrh	r3, [sp, #32]
+	ldr	r0, [sp, #48]
+	smulbb	r1, r3, r1
+	uxtb	r1, r1
+	bl	sblk_prog_page
+	b	.L3687
+.L3689:
+	add	r0, sp, #48
+	bl	sblk_3d_mlc_prog_pages
+	b	.L3687
+.L3691:
+	add	r4, sp, #72
+	add	r5, sp, #72
+	add	r4, r4, r2, lsl #2
+	add	r2, r5, r2, lsl #2
+	ldr	r2, [r2, #-20]
+	ldr	r4, [r4, #-24]
+	ldrb	r2, [r2, #1]	@ zero_extendqisi2
+	strb	r2, [r4]
+	b	.L3690
+.L3692:
+	ldr	r1, .L3746
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L3693
+	lsls	r3, r3, #1
+	uxth	r3, r3
+	b	.L3693
+.L3747:
+	.align	2
+.L3746:
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_do_gc,"ax",%progbits
+	.align	1
+	.global	zftl_do_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_do_gc, %function
+zftl_do_gc:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3924
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
+	ldr	r4, .L3924+4
+	ldrh	r7, [r3]
+	ldr	r3, .L3924+8
+	ldr	r2, .L3924+12
+	str	r0, [sp, #32]
+	ldrh	r6, [r3]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	mov	r8, r2
+	ldr	r5, [r2]
+	add	r6, r6, r7
+	uxth	r6, r6
+	cmp	r3, #6
+	bhi	.L3856
+	tbh	[pc, r3, lsl #1]
+.L3751:
+	.2byte	(.L3750-.L3751)/2
+	.2byte	(.L3752-.L3751)/2
+	.2byte	(.L3753-.L3751)/2
+	.2byte	(.L3754-.L3751)/2
+	.2byte	(.L3755-.L3751)/2
+	.2byte	(.L3756-.L3751)/2
+	.2byte	(.L3757-.L3751)/2
+	.p2align 1
+.L3756:
+	ldr	r5, .L3924+16
+	movs	r7, #0
+.L3758:
+	bl	gc_check_data_one_wl
+	mov	r10, r0
+	cmp	r0, #0
+	beq	.L3852
+	ldr	r3, [r8]
+	movs	r6, #0
+	strh	r6, [r5, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r1, .L3924+20
+	movw	r3, #65535
+	ldr	r2, [r8]
+	ldr	r0, [r5, #8]
+	ldr	r1, [r1]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_free
+	str	r6, [r5, #8]
+	strb	r6, [r4]
+	b	.L3921
+.L3750:
+	ldr	r3, .L3924+24
+	ldr	r1, .L3924+28
+	ldr	r2, .L3924+32
+	ldrh	r3, [r3]
+	str	r1, [sp, #36]
+	ldrh	r0, [r2]
+	add	r7, r7, r3
+	ldrh	r3, [r1]
+	uxth	r7, r7
+	str	r2, [sp, #40]
+	add	r3, r3, r0
+	ldrh	r0, [r5, #80]
+	uxth	r3, r3
+	str	r3, [sp, #28]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3759
+	ldr	r3, [sp, #32]
+	cbnz	r3, .L3760
+	ldr	r3, .L3924+36
+	ldrh	r3, [r3]
+	cmp	r6, r3, lsl #1
+	blt	.L3760
+.L3856:
+	movs	r5, #16
+	b	.L3748
+.L3760:
+	ldr	r10, .L3924+84
+	movs	r1, #5
+	ldr	fp, .L3924+72
+	ldrh	r0, [r10]
+	adds	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r10]	@ movhi
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	mov	ip, r10
+	cmp	r0, r3
+	beq	.L3761
+	ldr	r1, .L3924+40
+	ldr	lr, .L3924+80
+	ldr	r2, .L3924+44
+	ldr	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r3, [r2]
+	mov	r10, r2
+	ldrh	r1, [r1, r0, lsl #1]
+	adds	r3, r3, #1
+	cmp	lr, r1
+	str	r3, [r2]
+	bcs	.L3762
+	ldr	r2, .L3924+48
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #4
+	bls	.L3761
+	ldr	r3, .L3924+52
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L3761
+.L3762:
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	movs	r1, #0
+	bl	gc_add_sblk
+	cbz	r0, .L3763
+	movs	r3, #1
+	strb	r3, [r4]
+	movs	r3, #0
+	str	r3, [r10]
+	b	.L3856
+.L3761:
+	movs	r3, #0
+	strh	r3, [ip]	@ movhi
+.L3763:
+	cmp	r7, #15
+	bls	.L3858
+	ldr	r3, .L3924+56
+	ldrh	r2, [r3]
+	ldr	r3, .L3924+60
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L3858
+	ldr	r3, [sp, #28]
+	cmp	r3, #0
+	ite	eq
+	moveq	r10, #2
+	movne	r10, #1
+.L3764:
+	ldr	r3, .L3924+64
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L3765
+	ldr	r3, [r8]
+	ldrh	r1, [r5, #80]
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	ldr	r0, .L3924+68
+	str	r1, [sp, #16]
+	ldrh	r1, [r3, #122]
+	str	r1, [sp, #12]
+	ldrh	r1, [r3, #120]
+	str	r1, [sp, #8]
+	movw	r1, #1983
+	ldrh	r3, [r3, #124]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L3765:
+	movs	r2, #1
+	mov	r1, r10
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	ble	.L3766
+.L3767:
+	movs	r3, #1
+.L3922:
+	strb	r3, [r4]
+	b	.L3856
+.L3858:
+	mov	r10, #2
+	b	.L3764
+.L3766:
+	movs	r2, #1
+	movs	r1, #3
+	ldrb	r0, [fp]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	bgt	.L3767
+	b	.L3856
+.L3759:
+	ldr	r3, .L3924+64
+	ldr	r2, [r3]
+	str	r3, [sp, #44]
+	tst	r2, #256
+	beq	.L3769
+	ldr	r3, .L3924+72
+	movw	r1, #1995
+	ldr	r0, .L3924+68
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #32]
+	str	r3, [sp, #16]
+	ldrh	r3, [r5, #122]
+	str	r3, [sp, #12]
+	ldrh	r3, [r5, #120]
+	str	r3, [sp, #8]
+	ldrh	r3, [r5, #124]
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L3769:
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L3770
+	bl	gc_scan_static_data
+	ldr	r3, [r8]
+	ldr	fp, .L3924+72
+	ldrh	r3, [r3, #122]
+	cbz	r3, .L3771
+.L3772:
+	movs	r3, #1
+	strb	r3, [fp]
+	b	.L3922
+.L3771:
+	bl	gc_static_wearleveling
+	mov	r5, r0
+	cmp	r0, #0
+	bne	.L3772
+	cmp	r7, #0
+	bne	.L3773
+.L3777:
+	movs	r5, #16
+.L3774:
+	ldr	r0, [r8]
+	movs	r1, #1
+	ldr	r3, .L3924+72
+	ldrh	fp, [r0, #124]
+	strb	r1, [r3]
+	mov	r8, r3
+	cmp	fp, #0
+	beq	.L3782
+	movs	r2, #0
+	strb	r1, [r4]
+	strb	r2, [r3]
+	ldr	r3, [sp, #44]
+	ldr	r3, [r3]
+	lsls	r4, r3, #23
+	bpl	.L3748
+	ldrh	r3, [r0, #122]
+	movw	r1, #2085
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #120]
+	stm	sp, {r7, fp}
+	ldr	r0, .L3924+76
+	str	r3, [sp, #8]
+	mov	r3, r6
+	bl	printf
+.L3748:
+	mov	r0, r5
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3925:
+	.align	2
+.L3924:
+	.word	.LANCHOR99
+	.word	.LANCHOR150
+	.word	.LANCHOR95
+	.word	.LANCHOR10
+	.word	.LANCHOR63
+	.word	.LANCHOR102
+	.word	.LANCHOR97
+	.word	.LANCHOR90
+	.word	.LANCHOR88
+	.word	.LANCHOR79
+	.word	.LANCHOR9
+	.word	.LANCHOR151
+	.word	.LANCHOR6
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR14
+	.word	.LC236
+	.word	.LANCHOR76
+	.word	.LC237
+	.word	.LANCHOR85
+	.word	.LANCHOR87
+.L3773:
+	ldr	r3, [sp, #28]
+	ldr	r2, .L3926
+	cmp	r6, r3
+	bcs	.L3775
+	ldrh	r3, [r2]
+	cmp	r3, r6
+	bhi	.L3776
+.L3775:
+	ldr	r3, [sp, #28]
+	ldrh	r2, [r2]
+	adds	r3, r6, r3
+	cmp	r3, r2
+	blt	.L3776
+	ldr	r3, .L3926+4
+	ldrh	r2, [r3]
+	ldr	r3, .L3926+8
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L3777
+.L3776:
+	mov	r10, #1
+	ldr	r2, .L3926+12
+	strb	r10, [fp]
+	ldr	fp, .L3926+32
+	ldrh	r2, [r2]
+	ldr	r3, [fp]
+	add	r3, r3, r10
+	cmp	r3, r2, lsr #5
+	str	r3, [fp]
+	ldr	r3, .L3926+4
+	bls	.L3778
+	ldrh	r2, [r3]
+	cmp	r2, r7
+	bls	.L3778
+	movs	r1, #5
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3777
+	ldr	r3, .L3926+16
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldr	r3, .L3926+20
+	ldrh	r1, [r3]
+	ldr	r3, .L3926+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	bgt	.L3777
+	movs	r2, #4
+	movs	r1, #2
+	mov	r0, r10
+	movs	r3, #0
+	str	r3, [fp]
+.L3912:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	beq	.L3777
+	b	.L3767
+.L3778:
+	ldrh	r2, [r3]
+	ldr	r3, .L3926+8
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L3780
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+	b	.L3912
+.L3780:
+	ldr	r3, [sp, #36]
+	ldrh	r3, [r3]
+	cbnz	r3, .L3781
+	ldr	r3, [sp, #40]
+	ldrh	r3, [r3]
+	cmp	r3, #8
+	bls	.L3774
+.L3781:
+	movs	r1, #1
+	movs	r2, #4
+	mov	r0, r1
+	b	.L3912
+.L3770:
+	ldr	r3, .L3926+28
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bcc	.L3856
+	b	.L3777
+.L3782:
+	ldr	r2, .L3926+28
+	ldrh	ip, [r2]
+	mov	r10, r2
+	cmp	r6, ip
+	bcs	.L3783
+	cmp	r7, #0
+	beq	.L3784
+	cmp	r7, #16
+	bls	.L3785
+	ldr	r2, .L3926+4
+	ldrh	r0, [r2]
+	ldr	r2, .L3926+8
+	ldrh	r2, [r2]
+	cmp	r0, r2
+	bhi	.L3785
+	movs	r2, #4
+	mov	r0, r1
+	str	r3, [sp, #28]
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L3786
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	movs	r2, #4
+	movs	r1, #3
+.L3914:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L3787:
+	cbnz	r0, .L3789
+	b	.L3748
+.L3786:
+	movs	r1, #5
+	mov	r0, fp
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3789
+	ldr	r1, .L3926+16
+	ldr	r6, .L3926+20
+	ldr	r2, .L3926+32
+	ldr	r1, [r1]
+	ldrh	r6, [r6]
+	ldr	r3, [r2]
+	ldrh	r1, [r1, r0, lsl #1]
+	adds	r3, r3, #1
+	cmp	r6, r1
+	str	r3, [r2]
+	mov	r6, r2
+	bcs	.L3790
+	ldr	r2, .L3926+12
+	ldrh	r2, [r2]
+	cmp	r3, r2, lsr #4
+	bls	.L3789
+	ldr	r3, .L3926+36
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	bls	.L3789
+.L3790:
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	movs	r1, #0
+	bl	gc_add_sblk
+	ldr	r3, .L3926+40
+	movs	r2, #1
+	str	r2, [r3]
+	movs	r3, #0
+	str	r3, [r6]
+.L3789:
+	movs	r3, #1
+	strb	r3, [r4]
+	b	.L3748
+.L3785:
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+.L3920:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L3789
+	movs	r2, #2
+.L3917:
+	movs	r1, #3
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	b	.L3914
+.L3784:
+	strb	r7, [r3]
+	ldr	r3, [sp, #44]
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L3792
+	ldrh	r3, [r0, #122]
+	mov	r2, r7
+	movw	r1, #2115
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #120]
+	str	r7, [sp, #4]
+	str	r7, [sp]
+	str	r3, [sp, #8]
+	mov	r3, r6
+	ldr	r0, .L3926+44
+	bl	printf
+.L3792:
+	cmp	r6, #16
+	bls	.L3793
+	movs	r2, #4
+	b	.L3917
+.L3793:
+	movs	r2, #1
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	mov	r1, r2
+	b	.L3920
+.L3783:
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L3748
+	cmp	r6, ip, lsl #1
+	bge	.L3794
+	ldr	r3, [sp, #28]
+	cmp	r3, r7, lsr #1
+	bcs	.L3795
+	ldr	r3, .L3926+4
+	ldrh	r1, [r3]
+	ldr	r3, .L3926+8
+	ldrh	r3, [r3]
+	cmp	r1, r3
+	bcs	.L3795
+	ldr	r3, .L3926
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	b	.L3748
+.L3795:
+	movs	r1, #5
+	movs	r0, #0
+	bl	zftl_get_gc_node
+	movw	r3, #65535
+	mov	fp, r0
+	cmp	r0, r3
+	bne	.L3796
+.L3801:
+	cmp	r7, #1
+	bhi	.L3797
+.L3798:
+	ldr	r3, [sp, #28]
+	cmp	r6, r3
+	ldr	r6, .L3926
+	bcs	.L3805
+	movs	r7, #0
+	movs	r0, #4
+	strb	r7, [r8]
+	bl	zftl_get_gc_node.part.9
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L3805
+	ldr	r3, .L3926+16
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r0, lsl #1]
+	ldr	r3, .L3926+20
+	ldrh	r1, [r3]
+	ldr	r3, .L3926+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3, asr #1
+	ble	.L3807
+.L3805:
+	ldrh	r3, [r6]
+	lsrs	r3, r3, #2
+	strh	r3, [r10]	@ movhi
+	b	.L3748
+.L3796:
+	ldr	r2, .L3926+32
+	ldr	r1, .L3926+12
+	ldr	r3, [r2]
+	ldrh	r1, [r1]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	cmp	r3, r1, lsr #4
+	ldr	r3, .L3926+16
+	bls	.L3799
+	movs	r1, #0
+	str	r1, [r2]
+	ldr	r2, [r3]
+	ldrh	ip, [r2, r0, lsl #1]
+	ldr	r2, .L3926+36
+	ldrh	r2, [r2]
+	cmp	ip, r2
+	bcs	.L3799
+	movs	r2, #1
+	str	r3, [sp, #32]
+	bl	gc_add_sblk
+	ldr	r3, [sp, #32]
+	cmp	r0, #0
+	bne	.L3789
+.L3799:
+	ldr	r3, [r3]
+	ldrh	r2, [r3, fp, lsl #1]
+	ldr	r3, .L3926+20
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bhi	.L3800
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, fp
+	bl	gc_add_sblk
+	b	.L3789
+.L3800:
+	ldr	r3, [sp, #36]
+	ldr	r1, [sp, #40]
+	ldrh	r3, [r3]
+	ldrh	r1, [r1]
+	add	r3, r3, r1
+	ldr	r1, .L3926
+	ldrh	r1, [r1]
+	cmp	r3, r1, lsl #1
+	ble	.L3801
+	ldr	r3, .L3926+36
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bcc	.L3798
+	b	.L3801
+.L3927:
+	.align	2
+.L3926:
+	.word	.LANCHOR89
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR6
+	.word	.LANCHOR9
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR79
+	.word	.LANCHOR151
+	.word	.LANCHOR91
+	.word	.LANCHOR114
+	.word	.LC237
+.L3797:
+	cmp	r7, #16
+	mov	r1, #1
+	strb	r1, [r8]
+	bls	.L3802
+	ldr	r3, .L3928
+	ldrh	r2, [r3]
+	ldr	r3, .L3928+4
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L3802
+	movs	r2, #4
+	mov	r0, r1
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cbnz	r0, .L3803
+	movs	r2, #4
+.L3913:
+	movs	r1, #3
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L3803:
+	ldr	r3, [sp, #28]
+	cmp	r6, r3, lsr #1
+	ldr	r3, .L3928+8
+	ldrh	r3, [r3]
+	bls	.L3915
+	lsrs	r3, r3, #2
+.L3916:
+	strh	r3, [r10]	@ movhi
+	b	.L3787
+.L3802:
+	movs	r2, #1
+	movs	r1, #2
+	mov	r0, r2
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L3803
+	movs	r2, #2
+	b	.L3913
+.L3807:
+	movs	r2, #4
+	movs	r1, #3
+	mov	r0, r7
+	bl	gc_search_src_blk
+	ldrh	r3, [r6]
+	uxth	r0, r0
+.L3915:
+	lsrs	r3, r3, #1
+	b	.L3916
+.L3794:
+	ldr	r3, .L3928+8
+	mov	r5, fp
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	b	.L3748
+.L3752:
+	ldr	r5, .L3928+12
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L3808
+	bl	gc_get_src_blk
+	strh	r0, [r5]	@ movhi
+.L3808:
+	ldrh	r1, [r5]
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L3923
+	ldr	r3, .L3928+16
+	ldrh	r0, [r5, #52]
+	ldr	r3, [r3]
+	add	r3, r3, r1, lsl #2
+	cbz	r0, .L3810
+	ldr	r5, .L3928+20
+	movs	r2, #0
+.L3811:
+	uxth	r6, r2
+	cmp	r0, r6
+	bhi	.L3812
+.L3810:
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L3813
+	tst	r3, #192
+	bne	.L3814
+.L3813:
+	ldr	r3, .L3928+24
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r3, .L3816
+	movw	r2, #2348
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+	b	.L3816
+.L3812:
+	ldrh	r6, [r5, #2]!
+	adds	r2, r2, #1
+	cmp	r6, r1
+	bne	.L3811
+.L3816:
+	ldr	r3, .L3928+12
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+	b	.L3856
+.L3814:
+	movs	r3, #2
+	b	.L3922
+.L3753:
+	bl	gc_scan_src_blk
+	adds	r0, r0, #1
+	bne	.L3817
+	movs	r3, #3
+	b	.L3922
+.L3817:
+	ldr	r3, .L3928+12
+	movw	r1, #65535
+	ldrh	r2, [r3]
+	mov	r5, r3
+	cmp	r2, r1
+	beq	.L3767
+	ldrh	r1, [r3, #20]
+	cbz	r1, .L3818
+	movs	r2, #4
+	strb	r2, [r4]
+	movs	r2, #0
+	strh	r2, [r3, #22]	@ movhi
+	b	.L3856
+.L3818:
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r4, .L3928+24
+	ldr	r1, [r4]
+	ldrh	r2, [r1, r2, lsl #1]
+	cbz	r2, .L3819
+	movw	r2, #2376
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+.L3819:
+	ldrh	r0, [r5]
+	bl	ftl_free_sblk
+	ldr	r3, [r4]
+	movs	r4, #0
+	ldrh	r2, [r5]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r5, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	bhi	.L3820
+	strh	r3, [r5, #26]	@ movhi
+	b	.L3816
+.L3820:
+	strh	r4, [r5, #26]	@ movhi
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	b	.L3816
+.L3754:
+	ldr	r7, .L3928+12
+	mov	r5, r7
+.L3893:
+	bl	gc_scan_src_blk_one_page
+	ldr	r3, .L3928+36
+	ldrh	r2, [r7, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcs	.L3822
+	cmp	r6, #7
+	bls	.L3893
+	b	.L3856
+.L3822:
+	ldrh	r3, [r7, #20]
+	ldr	r2, .L3928+40
+	cbz	r3, .L3823
+	ldr	r2, [r2]
+	movs	r1, #4
+	strb	r1, [r4]
+	movs	r1, #0
+	strh	r1, [r7, #22]	@ movhi
+	tst	r2, #256
+	ldr	r4, .L3928+24
+	beq	.L3824
+	ldrh	r1, [r7]
+	ldr	r2, [r4]
+	ldr	r0, .L3928+44
+	ldrh	r2, [r2, r1, lsl #1]
+	bl	printf
+.L3824:
+	ldr	r3, [r4]
+	ldrh	r2, [r5]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldrh	r3, [r5, #20]
+	cmp	r2, r3
+	beq	.L3825
+	movw	r2, #2410
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+.L3825:
+	ldrh	r1, [r5, #20]
+	ldrh	r2, [r5]
+	ldr	r3, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	b	.L3856
+.L3823:
+	ldr	r3, .L3928+16
+	ldrh	r1, [r7]
+	ldr	r6, [r3]
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r3, [r2]
+	add	r6, r6, r1, lsl #2
+	lsls	r2, r3, #23
+	bpl	.L3826
+	ldrb	r2, [r6, #2]	@ zero_extendqisi2
+	ldr	r0, .L3928+48
+	lsrs	r2, r2, #5
+	bl	printf
+.L3826:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L3827
+	tst	r3, #192
+	bne	.L3828
+.L3827:
+	movw	r2, #2420
+	ldr	r1, .L3928+28
+	ldr	r0, .L3928+32
+	bl	printf
+.L3828:
+	ldrh	r0, [r5]
+	bl	ftl_free_sblk
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	ldrh	r3, [r5, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	bhi	.L3829
+	strh	r3, [r5, #26]	@ movhi
+	b	.L3856
+.L3829:
+	movs	r3, #0
+	strh	r3, [r5, #26]	@ movhi
+.L3921:
+	bl	flt_sys_flush
+	b	.L3856
+.L3929:
+	.align	2
+.L3928:
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR89
+	.word	.LANCHOR63
+	.word	.LANCHOR7
+	.word	.LANCHOR63+52
+	.word	.LANCHOR9
+	.word	.LANCHOR220
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR14
+	.word	.LC238
+	.word	.LC239
+.L3755:
+	ldrh	r2, [r5, #80]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L3830
+	ldr	r3, .L3930
+	ldrb	r7, [r3]	@ zero_extendqisi2
+	cmp	r7, #1
+	bne	.L3830
+	ldr	r6, .L3930+4
+	bl	ftl_flush
+	movs	r1, #5
+	ldrh	r0, [r6, #314]
+	cbz	r0, .L3831
+	mov	r0, r7
+.L3831:
+	bl	zftl_gc_get_free_sblk
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r0, r3
+	beq	.L3833
+	ldr	r3, .L3930+8
+	ldr	r7, [r3]
+	add	r7, r7, r0, lsl #2
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	beq	.L3834
+	movw	r2, #2449
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	bl	printf
+.L3834:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	and	r3, r3, #15
+	orr	r3, r3, #176
+	strb	r3, [r7, #2]
+.L3855:
+	movs	r1, #1
+	mov	r0, r4
+	bl	ftl_erase_sblk
+	movs	r3, #5
+	add	r1, r5, #96
+	strb	r3, [r5, #84]
+	mov	r0, r4
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3930+20
+	uxtb	r0, r0
+	movs	r7, #0
+	ldr	r10, .L3930+60
+	strb	r0, [r5, #89]
+	movs	r1, #255
+	ldrh	r3, [r3]
+	strh	r4, [r5, #80]	@ movhi
+	strh	r7, [r5, #82]	@ movhi
+	strb	r7, [r5, #85]
+	smulbb	r0, r3, r0
+	strh	r7, [r5, #90]	@ movhi
+	ldrh	r3, [r10]
+	strh	r0, [r5, #86]	@ movhi
+	ldr	r5, .L3930+24
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3930+28
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [r10]
+	movs	r1, #255
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3930+32
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [r10]
+	movs	r1, #255
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3930+36
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	movw	r2, #65535
+	strh	r2, [r3, #128]	@ movhi
+	strh	r2, [r3, #130]	@ movhi
+	str	r4, [r3, #132]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, .L3930+40
+	mov	r0, r7
+	strh	r7, [r6, #52]	@ movhi
+	ldr	r3, [r3]
+	strh	r4, [r3, #126]	@ movhi
+	mov	r3, #-1
+	strh	r7, [r6, #310]	@ movhi
+	strh	r7, [r6, #312]	@ movhi
+	strh	r7, [r6, #316]	@ movhi
+	str	r3, [r6, #320]
+	bl	ftl_info_flush
+	b	.L3856
+.L3830:
+	ldr	r3, [sp, #32]
+	ldr	r10, .L3930
+	cmp	r3, #1
+	ite	ne
+	movne	r7, #1
+	moveq	r7, #4
+	cmp	r6, #15
+	ldr	r6, .L3930+4
+	it	ls
+	addls	r7, r7, #4
+.L3837:
+	subs	r7, r7, #1
+	uxtb	r7, r7
+	cmp	r7, #255
+	beq	.L3856
+	bl	gc_do_copy_back
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cbnz	r3, .L3838
+	ldr	r3, .L3930+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bhi	.L3839
+	bl	ftl_write_commit
+.L3839:
+	ldrh	r2, [r6, #22]
+	ldrh	r3, [r6, #20]
+	cmp	r2, r3
+	bcc	.L3837
+	movs	r3, #1
+	strb	r3, [r4]
+	ldr	r4, .L3930+48
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrh	r1, [r6]
+	ldr	r2, [r4]
+	ldrh	r2, [r2, r1, lsl #1]
+	cbz	r2, .L3841
+	movw	r2, #2524
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	bl	printf
+.L3841:
+	ldrh	r0, [r6]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbnz	r3, .L3842
+	bl	ftl_free_sblk
+	b	.L3816
+.L3842:
+	movs	r2, #1
+	movs	r1, #0
+	bl	gc_add_sblk
+	b	.L3816
+.L3838:
+	ldrh	r3, [r6, #316]
+	cbz	r3, .L3843
+	movs	r5, #0
+	strh	r5, [r6, #316]	@ movhi
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r0, [r6, #320]
+	adds	r3, r0, #1
+	beq	.L3844
+	bl	ftl_mask_bad_block
+.L3844:
+	ldr	r3, [r8]
+	str	r5, [r6, #320]
+	strh	r5, [r6, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r1, .L3930+40
+	movw	r3, #65535
+	ldr	r0, [r6, #8]
+	ldr	r2, [r8]
+	ldr	r1, [r1]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	cbz	r0, .L3845
+	bl	buf_free
+.L3845:
+	movs	r5, #0
+	str	r5, [r6, #8]
+	bl	flt_sys_flush
+	movw	r2, #2562
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	strb	r5, [r4]
+	bl	printf
+	b	.L3856
+.L3843:
+	ldrh	r3, [r5, #86]
+	ldrh	r2, [r6, #22]
+	cmp	r3, #1
+	ldrh	r3, [r6, #20]
+	bls	.L3846
+	cmp	r2, r3
+	bcc	.L3837
+	movs	r3, #1
+	strb	r3, [r4]
+	ldrh	r3, [r6, #52]
+	adds	r2, r3, #1
+	strh	r2, [r6, #52]	@ movhi
+	add	r3, r6, r3, lsl #1
+	ldrh	r2, [r6]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+	b	.L3856
+.L3846:
+	cmp	r2, r3
+	mov	r1, #5
+	strb	r1, [r4]
+	bcc	.L3847
+	ldrh	r3, [r6, #52]
+	adds	r2, r3, #1
+	strh	r2, [r6, #52]	@ movhi
+	add	r3, r6, r3, lsl #1
+	ldrh	r2, [r6]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L3847:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r3, [r8]
+	ldrh	r2, [r5, #80]
+	strh	r2, [r3, #128]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r2, .L3930+52
+	movs	r3, #0
+	strh	r3, [r6, #12]	@ movhi
+	ldr	r3, .L3930+20
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, #2
+	strh	r2, [r6, #16]	@ movhi
+	strh	r3, [r6, #14]	@ movhi
+	bne	.L3849
+	lsls	r3, r3, #1
+	strh	r3, [r6, #14]	@ movhi
+	ldr	r3, .L3930+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L3849
+	movs	r3, #1
+	strh	r3, [r6, #16]	@ movhi
+.L3849:
+	movs	r3, #0
+	strh	r3, [r6, #18]	@ movhi
+	b	.L3856
+.L3852:
+	ldrh	r2, [r5, #12]
+	ldrh	r3, [r5, #14]
+	cmp	r2, r3
+	bcc	.L3853
+	movs	r3, #6
+	ldr	r0, [r5, #8]
+	strb	r3, [r4]
+	bl	buf_free
+	str	r10, [r5, #8]
+	b	.L3856
+.L3853:
+	cmp	r6, #15
+	bls	.L3758
+	ldr	r3, [sp, #32]
+	cmp	r3, #1
+	bne	.L3856
+	adds	r7, r7, #1
+	uxtb	r7, r7
+	cmp	r7, #4
+	bls	.L3758
+	b	.L3856
+.L3757:
+	movw	r6, #65535
+	bl	gc_update_l2p_map_new
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	r6, [r5, #80]	@ movhi
+	bl	ftl_ext_info_flush
+	ldr	r3, .L3930+40
+	movs	r0, #0
+	ldr	r3, [r3]
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L3923:
+	movs	r3, #0
+	b	.L3922
+.L3833:
+	movw	r2, #2455
+	ldr	r1, .L3930+12
+	ldr	r0, .L3930+16
+	bl	printf
+	b	.L3855
+.L3931:
+	.align	2
+.L3930:
+	.word	.LANCHOR76
+	.word	.LANCHOR63
+	.word	.LANCHOR7
+	.word	.LANCHOR220
+	.word	.LC0
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR74
+	.word	.LANCHOR102
+	.word	.LANCHOR52
+	.word	.LANCHOR9
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR77
+	.size	zftl_do_gc, .-zftl_do_gc
+	.section	.text.zftl_write,"ax",%progbits
+	.align	1
+	.global	zftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_write, %function
+zftl_write:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L3952
+	sub	sp, sp, #24
+	mov	r4, r0
+	mov	r5, r1
+	mov	r7, r2
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L3933
+	ldr	r3, [r8]
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	ldr	r0, .L3952+4
+	bl	printf
+.L3933:
+	cbnz	r4, .L3934
+	ldr	r3, .L3952+8
+	mov	r4, #24576
+	ldr	r3, [r3]
+.L3935:
+	adds	r2, r5, r7
+	cmp	r3, r2
+	bcc	.L3948
+	ldr	fp, .L3952+24
+	add	r4, r4, r5
+	mov	r0, r4
+	ldrb	r5, [fp]	@ zero_extendqisi2
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r10, r0
+	subs	r0, r7, #1
+	mov	r1, r5
+	add	r0, r0, r4
+	bl	__aeabi_uidiv
+	sub	r5, r0, r10
+	mov	r6, r10
+	adds	r5, r5, #1
+	str	r0, [sp, #12]
+	str	fp, [sp, #16]
+.L3937:
+	cbnz	r5, .L3944
+	bl	ftl_write_commit
+	ldr	r4, .L3952+12
+	bl	ftl_flush
+	mov	r0, r5
+	ldr	r5, .L3952+16
+	movs	r1, #1
+	bl	zftl_do_gc
+.L3945:
+	ldrh	r3, [r5]
+	ldrh	r2, [r4]
+	add	r3, r3, r2
+	cmp	r3, #7
+	ble	.L3946
+	movs	r0, #0
+.L3932:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3934:
+	cmp	r4, #3
+	bhi	.L3948
+	lsls	r4, r4, #13
+	mov	r3, #8192
+	b	.L3935
+.L3944:
+	movs	r0, #0
+	bl	buf_alloc
+	mov	fp, r0
+	cbnz	r0, .L3938
+	bl	ftl_write_commit
+	b	.L3937
+.L3938:
+	mov	r3, #0
+	cmp	r6, r10
+	strb	r3, [r0, #41]
+	ldr	r3, [sp, #16]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r0, #40]
+	bne	.L3940
+	mov	r1, r2
+	mov	r0, r4
+	str	r2, [sp, #20]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #20]
+	uxtb	r1, r1
+	strb	r1, [fp, #41]
+	subs	r1, r2, r1
+	uxtb	r1, r1
+	cmp	r7, r1
+	ite	cs
+	strbcs	r1, [fp, #40]
+	strbcc	r7, [fp, #40]
+.L3942:
+	ldrb	ip, [fp, #41]	@ zero_extendqisi2
+	mov	r1, r8
+	ldrb	r2, [fp, #40]	@ zero_extendqisi2
+	subs	r5, r5, #1
+	ldr	r0, [fp, #4]
+	lsls	r2, r2, #9
+	add	r0, r0, ip, lsl #9
+	bl	ftl_memcpy
+	ldr	r3, .L3952+20
+	str	r6, [fp, #20]
+	adds	r6, r6, #1
+	ldr	r1, [r3]
+	ldr	r2, [r1, #8]
+	adds	r0, r2, #1
+	str	r0, [r1, #8]
+	mov	r0, fp
+	str	r2, [fp, #16]
+	bl	ftl_write_buf
+	ldrb	r3, [fp, #40]	@ zero_extendqisi2
+	add	r8, r8, r3, lsl #9
+	b	.L3937
+.L3940:
+	ldr	r3, [sp, #12]
+	cmp	r6, r3
+	itttt	eq
+	smulbbeq	r2, r6, r2
+	addeq	r1, r4, r7
+	subeq	r2, r1, r2
+	strbeq	r2, [r0, #40]
+	b	.L3942
+.L3946:
+	movs	r1, #1
+	movs	r0, #0
+	bl	zftl_do_gc
+	b	.L3945
+.L3948:
+	mov	r0, #-1
+	b	.L3932
+.L3953:
+	.align	2
+.L3952:
+	.word	.LANCHOR14
+	.word	.LC240
+	.word	.LANCHOR59
+	.word	.LANCHOR99
+	.word	.LANCHOR95
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.size	zftl_write, .-zftl_write
+	.section	.text.ftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.zftl_sys_write,"ax",%progbits
+	.align	1
+	.global	zftl_sys_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_sys_write, %function
+zftl_sys_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_write
+	.size	zftl_sys_write, .-zftl_sys_write
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	mov	r1, r0
+	movs	r0, #2
+	b	zftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #512
+	movs	r0, #2
+	b	zftl_write
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r1
+	mov	r4, r2
+	mov	r5, r3
+	mov	r6, r0
+	cbnz	r0, .L3959
+	mov	r3, r2
+	mov	r2, r5
+	bl	idb_write_data
+.L3959:
+	mov	r3, r5
+	mov	r2, r4
+	mov	r1, r7
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
+	.section	.text.zftl_discard,"ax",%progbits
+	.align	1
+	.global	zftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	zftl_discard, %function
+zftl_discard:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L4008
+	adds	r3, r0, r1
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r1
+	sub	sp, sp, #32
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bcc	.L3981
+	ldr	r2, .L4008+4
+	add	r7, r0, #24576
+	ldr	r3, .L4008+8
+	ldr	r0, [r2]
+	ldr	r1, [r3]
+	str	r3, [sp, #12]
+	tst	r0, #4096
+	str	r2, [sp, #16]
+	add	r1, r1, r4
+	str	r1, [r3]
+	beq	.L3962
+	movs	r3, #0
+	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r4
+	ldr	r0, .L4008+12
+	bl	printf
+.L3962:
+	ldr	r8, .L4008+32
+	ldr	r10, .L4008+36
+	ldr	r3, [r8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	adds	r2, r2, #1
+	str	r2, [r3, #8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	r6, [r10]	@ zero_extendqisi2
+	mov	r0, r7
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	mov	r5, r0
+	mov	r0, r7
+	bl	__aeabi_uidivmod
+	mov	fp, r1
+	cmp	r1, #0
+	beq	.L3963
+	subs	r6, r6, r1
+	mov	r0, r5
+	cmp	r6, r4
+	it	cs
+	movcs	r6, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L3964
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+.L3964:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L3966
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L3966
+	ldr	r2, [sp, #8]
+	movs	r1, #0
+	str	r5, [r0, #20]
+	strb	fp, [r0, #41]
+	str	r2, [r0, #16]
+	uxth	r2, r6
+	strb	r6, [r0, #40]
+	ldr	r0, [r0, #4]
+	lsls	r2, r2, #9
+	str	r3, [sp, #20]
+	add	r0, r0, fp, lsl #9
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L3966:
+	uxth	r6, r6
+	adds	r5, r5, #1
+	subs	r4, r4, r6
+.L3963:
+	cbz	r4, .L3968
+	bl	ftl_flush
+.L3968:
+	ldr	fp, .L4008+40
+	mov	r3, #-1
+	ldr	r6, .L4008+16
+	str	r3, [sp, #28]
+.L3969:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcs	.L3974
+	cmp	r4, #0
+	beq	.L3976
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L3977
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+.L3977:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L3976
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r6, r0
+	cbz	r0, .L3976
+	movs	r3, #0
+	str	r5, [r0, #20]
+	strb	r3, [r0, #41]
+	ldr	r3, [sp, #8]
+	strb	r4, [r0, #40]
+	str	r3, [r0, #16]
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L3979
+	movw	r2, #1251
+	ldr	r1, .L4008+20
+	ldr	r0, .L4008+24
+	bl	printf
+.L3979:
+	lsls	r2, r4, #9
+	movs	r1, #0
+	ldr	r0, [r6, #4]
+	bl	ftl_memset
+	mov	r0, r6
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L3976:
+	ldr	r3, [sp, #12]
+	ldr	r1, [r3]
+	cmp	r1, #8192
+	bls	.L3982
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L3980
+	movs	r3, #0
+	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r4
+	ldr	r0, .L4008+12
+	bl	printf
+.L3980:
+	ldr	r3, [sp, #12]
+	movs	r4, #0
+	str	r4, [r3]
+	bl	flt_sys_flush
+	ldr	r3, .L4008+28
+	movs	r2, #1
+	str	r2, [r3]
+.L3982:
+	movs	r0, #0
+	b	.L3960
+.L3974:
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	beq	.L3970
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L3972
+	ldrb	r2, [r10]	@ zero_extendqisi2
+	movs	r1, #0
+	strb	r1, [r0, #41]
+	str	r5, [r0, #20]
+	strb	r2, [r0, #40]
+	ldr	r0, [sp, #8]
+	lsls	r2, r2, #9
+	str	r3, [sp, #20]
+	str	r0, [r3, #16]
+	ldr	r0, [r3, #4]
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L4007:
+	ldr	r2, [r8]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L3972:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	subs	r4, r4, r3
+	b	.L3969
+.L3970:
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r5
+	bl	pm_log2phys
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L3972
+	add	r1, sp, #28
+	movs	r2, #1
+	mov	r0, r5
+	bl	pm_log2phys
+	ldrh	r2, [fp]
+	movs	r3, #1
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+	b	.L4007
+.L3981:
+	mov	r0, #-1
+.L3960:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L4009:
+	.align	2
+.L4008:
+	.word	.LANCHOR59
+	.word	.LANCHOR14
+	.word	.LANCHOR221
+	.word	.LC241
+	.word	.LANCHOR67
+	.word	.LANCHOR222
+	.word	.LC0
+	.word	.LANCHOR114
+	.word	.LANCHOR102
+	.word	.LANCHOR123
+	.word	.LANCHOR66
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r0, r1
+	mov	r1, r2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
+	.global	g_pm_spare
+	.global	pm_first_write
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	slc_cache_sblk
+	.global	xlc_data_sblk
+	.global	slc_data_sblk
+	.global	free_mix_sblk
+	.global	free_xlc_sblk
+	.global	free_slc_sblk
+	.global	gp_data_xlc_data_head
+	.global	gp_data_slc_data_head
+	.global	gp_data_slc_cache_head
+	.global	gp_free_mix_head
+	.global	gp_free_xlc_head
+	.global	gp_free_slc_head
+	.global	gp_sblk_list_tbl
+	.global	zftl_print_list_count
+	.global	ftl_ext_info_first_write
+	.global	ftl_sys_info_first_write
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_update_list_offset
+	.global	ftl_sblk_update_list
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_xlc_search_index
+	.global	gc_xlc_data_index
+	.global	gc_slc_cache_index
+	.global	gc_slc_data_index
+	.global	gc_free_slc_sblk_th
+	.global	gc_slc_mode_vpn_th
+	.global	gc_slc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	p_read_ahead_ext_buf
+	.global	discard_sector_count
+	.global	read_ahead_lpa
+	.global	read_buf_count
+	.global	read_buf_head
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_c_slc_to_xlc_ec_ratio
+	.global	_c_mix_max_xlc_ec_count
+	.global	_c_mix_max_slc_ec_count
+	.global	_c_swl_xlc_gc_th
+	.global	_c_swl_slc_gc_th
+	.global	_gc_after_discard_en
+	.global	_last_write_time
+	.global	_last_read_time
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	nandc_ecc_sts
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_tran_timeout
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	g_nand_para_info
+	.global	gp_nand_para_info
+	.global	g_nand_opt_para
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_one_pass_program
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+	.set	.LANCHOR42,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR6,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.space	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
+	.align	1
+	.set	.LANCHOR66,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.space	2
+	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR103,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.space	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR203,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.space	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
+	.set	.LANCHOR104,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.space	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
+	.set	.LANCHOR78,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.space	1
+	.section	.bss._c_ftl_nand_type,"aw",%nobits
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.space	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR77,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.space	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.space	2
+	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
+	.set	.LANCHOR67,. + 0
+	.type	_c_ftl_planes_per_die, %object
+	.size	_c_ftl_planes_per_die, 1
+_c_ftl_planes_per_die:
+	.space	1
+	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR187,. + 0
+	.type	_c_ftl_pm_page_num, %object
+	.size	_c_ftl_pm_page_num, 2
+_c_ftl_pm_page_num:
+	.space	2
+	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
+	.set	.LANCHOR123,. + 0
+	.type	_c_ftl_sec_per_page, %object
+	.size	_c_ftl_sec_per_page, 1
+_c_ftl_sec_per_page:
+	.space	1
+	.section	.bss._c_max_pm_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR146,. + 0
+	.type	_c_max_pm_sblk, %object
+	.size	_c_max_pm_sblk, 2
+_c_max_pm_sblk:
+	.space	2
+	.section	.bss._c_mix_max_slc_ec_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR118,. + 0
+	.type	_c_mix_max_slc_ec_count, %object
+	.size	_c_mix_max_slc_ec_count, 2
+_c_mix_max_slc_ec_count:
+	.space	2
+	.section	.bss._c_mix_max_xlc_ec_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	_c_mix_max_xlc_ec_count, %object
+	.size	_c_mix_max_xlc_ec_count, 2
+_c_mix_max_xlc_ec_count:
+	.space	2
+	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",%nobits
+	.align	1
+	.set	.LANCHOR8,. + 0
+	.type	_c_slc_to_xlc_ec_ratio, %object
+	.size	_c_slc_to_xlc_ec_ratio, 2
+_c_slc_to_xlc_ec_ratio:
+	.space	2
+	.section	.bss._c_swl_slc_gc_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR145,. + 0
+	.type	_c_swl_slc_gc_th, %object
+	.size	_c_swl_slc_gc_th, 2
+_c_swl_slc_gc_th:
+	.space	2
+	.section	.bss._c_swl_xlc_gc_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR144,. + 0
+	.type	_c_swl_xlc_gc_th, %object
+	.size	_c_swl_xlc_gc_th, 2
+_c_swl_xlc_gc_th:
+	.space	2
+	.section	.bss._c_totle_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR208,. + 0
+	.type	_c_totle_data_density, %object
+	.size	_c_totle_data_density, 4
+_c_totle_data_density:
+	.space	4
+	.section	.bss._c_totle_log_page,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	_c_totle_log_page, %object
+	.size	_c_totle_log_page, 4
+_c_totle_log_page:
+	.space	4
+	.section	.bss._c_totle_phy_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR207,. + 0
+	.type	_c_totle_phy_density, %object
+	.size	_c_totle_phy_density, 4
+_c_totle_phy_density:
+	.space	4
+	.section	.bss._c_user_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR59,. + 0
+	.type	_c_user_data_density, %object
+	.size	_c_user_data_density, 4
+_c_user_data_density:
+	.space	4
+	.section	.bss._gc_after_discard_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR114,. + 0
+	.type	_gc_after_discard_en, %object
+	.size	_gc_after_discard_en, 4
+_gc_after_discard_en:
+	.space	4
+	.section	.bss._last_read_time,"aw",%nobits
+	.align	2
+	.type	_last_read_time, %object
+	.size	_last_read_time, 4
+_last_read_time:
+	.space	4
+	.section	.bss._last_write_time,"aw",%nobits
+	.align	2
+	.type	_last_write_time, %object
+	.size	_last_write_time, 4
+_last_write_time:
+	.space	4
+	.section	.bss._max_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR117,. + 0
+	.type	_max_slc_super_block, %object
+	.size	_max_slc_super_block, 2
+_max_slc_super_block:
+	.space	2
+	.section	.bss._max_xlc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR93,. + 0
+	.type	_max_xlc_super_block, %object
+	.size	_max_xlc_super_block, 2
+_max_xlc_super_block:
+	.space	2
+	.section	.bss._min_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR89,. + 0
+	.type	_min_slc_super_block, %object
+	.size	_min_slc_super_block, 2
+_min_slc_super_block:
+	.space	2
+	.section	.bss.discard_sector_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR221,. + 0
+	.type	discard_sector_count, %object
+	.size	discard_sector_count, 4
+discard_sector_count:
+	.space	4
+	.section	.bss.fill_spare_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	fill_spare_size, %object
+	.size	fill_spare_size, 2
+fill_spare_size:
+	.space	2
+	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	flash_ddr_tuning_sdr_read_count, %object
+	.size	flash_ddr_tuning_sdr_read_count, 4
+flash_ddr_tuning_sdr_read_count:
+	.space	4
+	.section	.bss.flash_read_retry,"aw",%nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	flash_read_retry, %object
+	.size	flash_read_retry, 4
+flash_read_retry:
+	.space	4
+	.section	.bss.free_buf_count,"aw",%nobits
+	.set	.LANCHOR52,. + 0
+	.type	free_buf_count, %object
+	.size	free_buf_count, 1
+free_buf_count:
+	.space	1
+	.section	.bss.free_mix_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	free_mix_sblk, %object
+	.size	free_mix_sblk, 2
+free_mix_sblk:
+	.space	2
+	.section	.bss.free_slc_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR95,. + 0
+	.type	free_slc_sblk, %object
+	.size	free_slc_sblk, 2
+free_slc_sblk:
+	.space	2
+	.section	.bss.free_xlc_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	free_xlc_sblk, %object
+	.size	free_xlc_sblk, 2
+free_xlc_sblk:
+	.space	2
+	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_ext_info_data_buffer, %object
+	.size	ftl_ext_info_data_buffer, 16384
+ftl_ext_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_ext_info_first_write,"aw",%nobits
+	.set	.LANCHOR183,. + 0
+	.type	ftl_ext_info_first_write, %object
+	.size	ftl_ext_info_first_write, 1
+ftl_ext_info_first_write:
+	.space	1
+	.section	.bss.ftl_flush_jiffies,"aw",%nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	ftl_flush_jiffies, %object
+	.size	ftl_flush_jiffies, 4
+ftl_flush_jiffies:
+	.space	4
+	.section	.bss.ftl_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_info_data_buffer, %object
+	.size	ftl_info_data_buffer, 16384
+ftl_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_info_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR178,. + 0
+	.type	ftl_info_spare, %object
+	.size	ftl_info_spare, 256
+ftl_info_spare:
+	.space	256
+	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	ftl_low_format_cur_blk, %object
+	.size	ftl_low_format_cur_blk, 2
+ftl_low_format_cur_blk:
+	.space	2
+	.section	.bss.ftl_power_lost_flag,"aw",%nobits
+	.set	.LANCHOR182,. + 0
+	.type	ftl_power_lost_flag, %object
+	.size	ftl_power_lost_flag, 1
+ftl_power_lost_flag:
+	.space	1
+	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	ftl_sblk_lpa_tbl, %object
+	.size	ftl_sblk_lpa_tbl, 4
+ftl_sblk_lpa_tbl:
+	.space	4
+	.section	.bss.ftl_sblk_update_list,"aw",%nobits
+	.align	1
+	.set	.LANCHOR65,. + 0
+	.type	ftl_sblk_update_list, %object
+	.size	ftl_sblk_update_list, 16
+ftl_sblk_update_list:
+	.space	16
+	.section	.bss.ftl_sblk_update_list_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR115,. + 0
+	.type	ftl_sblk_update_list_offset, %object
+	.size	ftl_sblk_update_list_offset, 2
+ftl_sblk_update_list_offset:
+	.space	2
+	.section	.bss.ftl_sblk_vpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR9,. + 0
+	.type	ftl_sblk_vpn, %object
+	.size	ftl_sblk_vpn, 4
+ftl_sblk_vpn:
+	.space	4
+	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR64,. + 0
+	.type	ftl_sblk_vpn_update_id, %object
+	.size	ftl_sblk_vpn_update_id, 2
+ftl_sblk_vpn_update_id:
+	.space	2
+	.section	.bss.ftl_sys_info_first_write,"aw",%nobits
+	.set	.LANCHOR181,. + 0
+	.type	ftl_sys_info_first_write, %object
+	.size	ftl_sys_info_first_write, 1
+ftl_sys_info_first_write:
+	.space	1
+	.section	.bss.ftl_tmp_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_tmp_buffer, %object
+	.size	ftl_tmp_buffer, 16384
+ftl_tmp_buffer:
+	.space	16384
+	.section	.bss.ftl_tmp_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR176,. + 0
+	.type	ftl_tmp_spare, %object
+	.size	ftl_tmp_spare, 256
+ftl_tmp_spare:
+	.space	256
+	.section	.bss.ftl_vpn_update_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	ftl_vpn_update_count, %object
+	.size	ftl_vpn_update_count, 2
+ftl_vpn_update_count:
+	.space	2
+	.section	.bss.g_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR2,. + 0
+	.type	g_block_align_addr, %object
+	.size	g_block_align_addr, 2
+g_block_align_addr:
+	.space	2
+	.section	.bss.g_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR50,. + 0
+	.type	g_buf, %object
+	.size	g_buf, 1536
+g_buf:
+	.space	1536
+	.section	.bss.g_die_addr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR141,. + 0
+	.type	g_die_addr, %object
+	.size	g_die_addr, 32
+g_die_addr:
+	.space	32
+	.section	.bss.g_die_cs_idx,"aw",%nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	g_die_cs_idx, %object
+	.size	g_die_cs_idx, 8
+g_die_cs_idx:
+	.space	8
+	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
+	.set	.LANCHOR72,. + 0
+	.type	g_flash_3d_mlc_flag, %object
+	.size	g_flash_3d_mlc_flag, 1
+g_flash_3d_mlc_flag:
+	.space	1
+	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
+	.set	.LANCHOR75,. + 0
+	.type	g_flash_3d_tlc_flag, %object
+	.size	g_flash_3d_tlc_flag, 1
+g_flash_3d_tlc_flag:
+	.space	1
+	.section	.bss.g_flash_blk_info,"aw",%nobits
+	.align	1
+	.set	.LANCHOR195,. + 0
+	.type	g_flash_blk_info, %object
+	.size	g_flash_blk_info, 4
+g_flash_blk_info:
+	.space	4
+	.section	.bss.g_flash_cur_mode,"aw",%nobits
+	.set	.LANCHOR32,. + 0
+	.type	g_flash_cur_mode, %object
+	.size	g_flash_cur_mode, 4
+g_flash_cur_mode:
+	.space	4
+	.section	.bss.g_flash_interface_mode,"aw",%nobits
+	.set	.LANCHOR43,. + 0
+	.type	g_flash_interface_mode, %object
+	.size	g_flash_interface_mode, 1
+g_flash_interface_mode:
+	.space	1
+	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
+	.set	.LANCHOR39,. + 0
+	.type	g_flash_multi_page_prog_en, %object
+	.size	g_flash_multi_page_prog_en, 1
+g_flash_multi_page_prog_en:
+	.space	1
+	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
+	.set	.LANCHOR168,. + 0
+	.type	g_flash_multi_page_read_en, %object
+	.size	g_flash_multi_page_read_en, 1
+g_flash_multi_page_read_en:
+	.space	1
+	.section	.bss.g_flash_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_flash_page_buffer, %object
+	.size	g_flash_page_buffer, 4
+g_flash_page_buffer:
+	.space	4
+	.section	.bss.g_flash_reversd_blks,"aw",%nobits
+	.set	.LANCHOR200,. + 0
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
+	.space	1
+	.section	.bss.g_flash_slc_mode,"aw",%nobits
+	.set	.LANCHOR0,. + 0
+	.type	g_flash_slc_mode, %object
+	.size	g_flash_slc_mode, 1
+g_flash_slc_mode:
+	.space	1
+	.section	.bss.g_flash_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_flash_spare_buffer, %object
+	.size	g_flash_spare_buffer, 4
+g_flash_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR194,. + 0
+	.type	g_flash_sys_spare_buffer, %object
+	.size	g_flash_sys_spare_buffer, 4
+g_flash_sys_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	g_flash_tmp_page_buffer, %object
+	.size	g_flash_tmp_page_buffer, 4
+g_flash_tmp_page_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_flash_tmp_spare_buffer, %object
+	.size	g_flash_tmp_spare_buffer, 4
+g_flash_tmp_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_toggle_mode_en,"aw",%nobits
+	.set	.LANCHOR21,. + 0
+	.type	g_flash_toggle_mode_en, %object
+	.size	g_flash_toggle_mode_en, 1
+g_flash_toggle_mode_en:
+	.space	1
+	.section	.bss.g_ftl_info_blk,"aw",%nobits
+	.align	6
+	.set	.LANCHOR179,. + 0
+	.type	g_ftl_info_blk, %object
+	.size	g_ftl_info_blk, 4
+g_ftl_info_blk:
+	.space	4
+	.section	.bss.g_gc_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	g_gc_info, %object
+	.size	g_gc_info, 340
+g_gc_info:
+	.space	340
+	.section	.bss.g_idb_ecc_bits,"aw",%nobits
+	.set	.LANCHOR17,. + 0
+	.type	g_idb_ecc_bits, %object
+	.size	g_idb_ecc_bits, 1
+g_idb_ecc_bits:
+	.space	1
+	.section	.bss.g_idb_slc_mode_enable,"aw",%nobits
+	.set	.LANCHOR19,. + 0
+	.type	g_idb_slc_mode_enable, %object
+	.size	g_idb_slc_mode_enable, 1
+g_idb_slc_mode_enable:
+	.space	1
+	.section	.bss.g_lsb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	g_lsb_page_tbl, %object
+	.size	g_lsb_page_tbl, 512
+g_lsb_page_tbl:
+	.space	512
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR26,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR159,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_msb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR138,. + 0
+	.type	g_msb_page_tbl, %object
+	.size	g_msb_page_tbl, 1024
+g_msb_page_tbl:
+	.space	1024
+	.section	.bss.g_nand_max_die,"aw",%nobits
+	.set	.LANCHOR18,. + 0
+	.type	g_nand_max_die, %object
+	.size	g_nand_max_die, 1
+g_nand_max_die:
+	.space	1
+	.section	.bss.g_nand_opt_para,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	g_nand_opt_para, %object
+	.size	g_nand_opt_para, 32
+g_nand_opt_para:
+	.space	32
+	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
+	.set	.LANCHOR44,. + 0
+	.type	g_nandc_ecc_bits, %object
+	.size	g_nandc_ecc_bits, 1
+g_nandc_ecc_bits:
+	.space	1
+	.section	.bss.g_nandc_tran_timeout,"aw",%nobits
+	.set	.LANCHOR157,. + 0
+	.type	g_nandc_tran_timeout, %object
+	.size	g_nandc_tran_timeout, 1
+g_nandc_tran_timeout:
+	.space	1
+	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	g_nandc_v6_master_info, %object
+	.size	g_nandc_v6_master_info, 28
+g_nandc_v6_master_info:
+	.space	28
+	.section	.bss.g_nandc_ver,"aw",%nobits
+	.set	.LANCHOR28,. + 0
+	.type	g_nandc_ver, %object
+	.size	g_nandc_ver, 1
+g_nandc_ver:
+	.space	1
+	.section	.bss.g_one_pass_program,"aw",%nobits
+	.set	.LANCHOR73,. + 0
+	.type	g_one_pass_program, %object
+	.size	g_one_pass_program, 1
+g_one_pass_program:
+	.space	1
+	.section	.bss.g_pm_spare,"aw",%nobits
+	.align	2
+	.set	.LANCHOR191,. + 0
+	.type	g_pm_spare, %object
+	.size	g_pm_spare, 4
+g_pm_spare:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR23,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc_mode_addr2,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc_mode_addr2, %object
+	.size	g_slc_mode_addr2, 1
+g_slc_mode_addr2:
+	.space	1
+	.section	.bss.g_slc_mode_enable,"aw",%nobits
+	.type	g_slc_mode_enable, %object
+	.size	g_slc_mode_enable, 1
+g_slc_mode_enable:
+	.space	1
+	.section	.bss.g_slc_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR140,. + 0
+	.type	g_slc_page_num, %object
+	.size	g_slc_page_num, 2
+g_slc_page_num:
+	.space	2
+	.section	.bss.g_totle_phy_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR142,. + 0
+	.type	g_totle_phy_block, %object
+	.size	g_totle_phy_block, 2
+g_totle_phy_block:
+	.space	2
+	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	gc_des_ppa_tbl, %object
+	.size	gc_des_ppa_tbl, 4
+gc_des_ppa_tbl:
+	.space	4
+	.section	.bss.gc_free_slc_sblk_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	gc_free_slc_sblk_th, %object
+	.size	gc_free_slc_sblk_th, 2
+gc_free_slc_sblk_th:
+	.space	2
+	.section	.bss.gc_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	gc_lpa_tbl, %object
+	.size	gc_lpa_tbl, 4
+gc_lpa_tbl:
+	.space	4
+	.section	.bss.gc_mode,"aw",%nobits
+	.set	.LANCHOR76,. + 0
+	.type	gc_mode, %object
+	.size	gc_mode, 1
+gc_mode:
+	.space	1
+	.section	.bss.gc_page_buf_id,"aw",%nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	gc_page_buf_id, %object
+	.size	gc_page_buf_id, 4
+gc_page_buf_id:
+	.space	4
+	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gc_pre_ppa_tbl, %object
+	.size	gc_pre_ppa_tbl, 4
+gc_pre_ppa_tbl:
+	.space	4
+	.section	.bss.gc_search_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR151,. + 0
+	.type	gc_search_count, %object
+	.size	gc_search_count, 4
+gc_search_count:
+	.space	4
+	.section	.bss.gc_slc_cache_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR82,. + 0
+	.type	gc_slc_cache_index, %object
+	.size	gc_slc_cache_index, 2
+gc_slc_cache_index:
+	.space	2
+	.section	.bss.gc_slc_data_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	gc_slc_data_index, %object
+	.size	gc_slc_data_index, 2
+gc_slc_data_index:
+	.space	2
+	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	gc_slc_mode_tlc_vpn_th, %object
+	.size	gc_slc_mode_tlc_vpn_th, 2
+gc_slc_mode_tlc_vpn_th:
+	.space	2
+	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR62,. + 0
+	.type	gc_slc_mode_vpn_th, %object
+	.size	gc_slc_mode_vpn_th, 2
+gc_slc_mode_vpn_th:
+	.space	2
+	.section	.bss.gc_state,"aw",%nobits
+	.set	.LANCHOR150,. + 0
+	.type	gc_state, %object
+	.size	gc_state, 1
+gc_state:
+	.space	1
+	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR94,. + 0
+	.type	gc_tlc_mode_slc_vpn_th, %object
+	.size	gc_tlc_mode_slc_vpn_th, 2
+gc_tlc_mode_slc_vpn_th:
+	.space	2
+	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR91,. + 0
+	.type	gc_tlc_mode_tlc_vpn_th, %object
+	.size	gc_tlc_mode_tlc_vpn_th, 2
+gc_tlc_mode_tlc_vpn_th:
+	.space	2
+	.section	.bss.gc_valid_page_ppa,"aw",%nobits
+	.align	2
+	.set	.LANCHOR68,. + 0
+	.type	gc_valid_page_ppa, %object
+	.size	gc_valid_page_ppa, 4
+gc_valid_page_ppa:
+	.space	4
+	.section	.bss.gc_xlc_data_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR83,. + 0
+	.type	gc_xlc_data_index, %object
+	.size	gc_xlc_data_index, 2
+gc_xlc_data_index:
+	.space	2
+	.section	.bss.gc_xlc_search_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	gc_xlc_search_index, %object
+	.size	gc_xlc_search_index, 2
+gc_xlc_search_index:
+	.space	2
+	.section	.bss.gp_blk_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR7,. + 0
+	.type	gp_blk_info, %object
+	.size	gp_blk_info, 4
+gp_blk_info:
+	.space	4
+	.section	.bss.gp_data_slc_cache_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR81,. + 0
+	.type	gp_data_slc_cache_head, %object
+	.size	gp_data_slc_cache_head, 4
+gp_data_slc_cache_head:
+	.space	4
+	.section	.bss.gp_data_slc_data_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR12,. + 0
+	.type	gp_data_slc_data_head, %object
+	.size	gp_data_slc_data_head, 4
+gp_data_slc_data_head:
+	.space	4
+	.section	.bss.gp_data_xlc_data_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR80,. + 0
+	.type	gp_data_xlc_data_head, %object
+	.size	gp_data_xlc_data_head, 4
+gp_data_xlc_data_head:
+	.space	4
+	.section	.bss.gp_flash_check_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR137,. + 0
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 4
+gp_flash_check_buf:
+	.space	4
+	.section	.bss.gp_flash_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR27,. + 0
+	.type	gp_flash_info, %object
+	.size	gp_flash_info, 4
+gp_flash_info:
+	.space	4
+	.section	.bss.gp_free_mix_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR100,. + 0
+	.type	gp_free_mix_head, %object
+	.size	gp_free_mix_head, 4
+gp_free_mix_head:
+	.space	4
+	.section	.bss.gp_free_slc_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	gp_free_slc_head, %object
+	.size	gp_free_slc_head, 4
+gp_free_slc_head:
+	.space	4
+	.section	.bss.gp_free_xlc_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR98,. + 0
+	.type	gp_free_xlc_head, %object
+	.size	gp_free_xlc_head, 4
+gp_free_xlc_head:
+	.space	4
+	.section	.bss.gp_ftl_ext_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR10,. + 0
+	.type	gp_ftl_ext_info, %object
+	.size	gp_ftl_ext_info, 4
+gp_ftl_ext_info:
+	.space	4
+	.section	.bss.gp_ftl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR102,. + 0
+	.type	gp_ftl_info, %object
+	.size	gp_ftl_info, 4
+gp_ftl_info:
+	.space	4
+	.section	.bss.gp_nand_para_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR16,. + 0
+	.type	gp_nand_para_info, %object
+	.size	gp_nand_para_info, 4
+gp_nand_para_info:
+	.space	4
+	.section	.bss.gp_nandc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR13,. + 0
+	.type	gp_nandc, %object
+	.size	gp_nandc, 4
+gp_nandc:
+	.space	4
+	.section	.bss.gp_sblk_list_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR4,. + 0
+	.type	gp_sblk_list_tbl, %object
+	.size	gp_sblk_list_tbl, 4
+gp_sblk_list_tbl:
+	.space	4
+	.section	.bss.idb_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	idb_buf, %object
+	.size	idb_buf, 4
+idb_buf:
+	.space	4
+	.section	.bss.idb_need_write_back,"aw",%nobits
+	.align	2
+	.set	.LANCHOR136,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.space	4
+	.section	.bss.lpa_hash,"aw",%nobits
+	.align	1
+	.set	.LANCHOR108,. + 0
+	.type	lpa_hash, %object
+	.size	lpa_hash, 512
+lpa_hash:
+	.space	512
+	.section	.bss.lpa_hash_index,"aw",%nobits
+	.align	2
+	.set	.LANCHOR110,. + 0
+	.type	lpa_hash_index, %object
+	.size	lpa_hash_index, 4
+lpa_hash_index:
+	.space	4
+	.section	.bss.nandc_ecc_sts,"aw",%nobits
+	.type	nandc_ecc_sts, %object
+	.size	nandc_ecc_sts, 16
+nandc_ecc_sts:
+	.space	16
+	.section	.bss.nandc_hw_seed,"aw",%nobits
+	.set	.LANCHOR45,. + 0
+	.type	nandc_hw_seed, %object
+	.size	nandc_hw_seed, 1
+nandc_hw_seed:
+	.space	1
+	.section	.bss.nandc_randomizer_en,"aw",%nobits
+	.set	.LANCHOR46,. + 0
+	.type	nandc_randomizer_en, %object
+	.size	nandc_randomizer_en, 1
+nandc_randomizer_en:
+	.space	1
+	.section	.bss.p_free_buf_head,"aw",%nobits
+	.set	.LANCHOR51,. + 0
+	.type	p_free_buf_head, %object
+	.size	p_free_buf_head, 1
+p_free_buf_head:
+	.space	1
+	.section	.bss.p_read_ahead_ext_buf,"aw",%nobits
+	.align	2
+	.type	p_read_ahead_ext_buf, %object
+	.size	p_read_ahead_ext_buf, 4
+p_read_ahead_ext_buf:
+	.space	4
+	.section	.bss.pm_first_write,"aw",%nobits
+	.set	.LANCHOR192,. + 0
+	.type	pm_first_write, %object
+	.size	pm_first_write, 1
+pm_first_write:
+	.space	1
+	.section	.bss.pm_gc_enable,"aw",%nobits
+	.align	2
+	.set	.LANCHOR130,. + 0
+	.type	pm_gc_enable, %object
+	.size	pm_gc_enable, 4
+pm_gc_enable:
+	.space	4
+	.section	.bss.pm_last_load_ram_id,"aw",%nobits
+	.set	.LANCHOR205,. + 0
+	.type	pm_last_load_ram_id, %object
+	.size	pm_last_load_ram_id, 1
+pm_last_load_ram_id:
+	.space	1
+	.section	.bss.pm_last_update_ram_id,"aw",%nobits
+	.set	.LANCHOR133,. + 0
+	.type	pm_last_update_ram_id, %object
+	.size	pm_last_update_ram_id, 1
+pm_last_update_ram_id:
+	.space	1
+	.section	.bss.pm_ram_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	pm_ram_info, %object
+	.size	pm_ram_info, 256
+pm_ram_info:
+	.space	256
+	.section	.bss.read_ahead_lpa,"aw",%nobits
+	.align	2
+	.set	.LANCHOR206,. + 0
+	.type	read_ahead_lpa, %object
+	.size	read_ahead_lpa, 4
+read_ahead_lpa:
+	.space	4
+	.section	.bss.read_buf_count,"aw",%nobits
+	.set	.LANCHOR127,. + 0
+	.type	read_buf_count, %object
+	.size	read_buf_count, 1
+read_buf_count:
+	.space	1
+	.section	.bss.read_buf_head,"aw",%nobits
+	.set	.LANCHOR126,. + 0
+	.type	read_buf_head, %object
+	.size	read_buf_head, 1
+read_buf_head:
+	.space	1
+	.section	.bss.sblk_gc_write_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR69,. + 0
+	.type	sblk_gc_write_completed_queue_head, %object
+	.size	sblk_gc_write_completed_queue_head, 1
+sblk_gc_write_completed_queue_head:
+	.space	1
+	.section	.bss.sblk_queue_head,"aw",%nobits
+	.set	.LANCHOR54,. + 0
+	.type	sblk_queue_head, %object
+	.size	sblk_queue_head, 1
+sblk_queue_head:
+	.space	1
+	.section	.bss.sblk_read_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR129,. + 0
+	.type	sblk_read_completed_queue_head, %object
+	.size	sblk_read_completed_queue_head, 1
+sblk_read_completed_queue_head:
+	.space	1
+	.section	.bss.sblk_write_completed_queue_head,"aw",%nobits
+	.set	.LANCHOR124,. + 0
+	.type	sblk_write_completed_queue_head, %object
+	.size	sblk_write_completed_queue_head, 1
+sblk_write_completed_queue_head:
+	.space	1
+	.section	.bss.slc_cache_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR88,. + 0
+	.type	slc_cache_sblk, %object
+	.size	slc_cache_sblk, 2
+slc_cache_sblk:
+	.space	2
+	.section	.bss.slc_data_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR90,. + 0
+	.type	slc_data_sblk, %object
+	.size	slc_data_sblk, 2
+slc_data_sblk:
+	.space	2
+	.section	.bss.write_buf_count,"aw",%nobits
+	.set	.LANCHOR58,. + 0
+	.type	write_buf_count, %object
+	.size	write_buf_count, 1
+write_buf_count:
+	.space	1
+	.section	.bss.write_buf_head,"aw",%nobits
+	.set	.LANCHOR57,. + 0
+	.type	write_buf_head, %object
+	.size	write_buf_head, 1
+write_buf_head:
+	.space	1
+	.section	.bss.write_commit_count,"aw",%nobits
+	.set	.LANCHOR121,. + 0
+	.type	write_commit_count, %object
+	.size	write_commit_count, 1
+write_commit_count:
+	.space	1
+	.section	.bss.write_commit_head,"aw",%nobits
+	.set	.LANCHOR174,. + 0
+	.type	write_commit_head, %object
+	.size	write_commit_head, 1
+write_commit_head:
+	.space	1
+	.section	.bss.xlc_data_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR92,. + 0
+	.type	xlc_data_sblk, %object
+	.size	xlc_data_sblk, 2
+xlc_data_sblk:
+	.space	2
+	.section	.bss.zftl_print_list_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	zftl_print_list_count, %object
+	.size	zftl_print_list_count, 2
+zftl_print_list_count:
+	.space	2
+	.section	.data.g_nand_para_info,"aw",%progbits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	g_nand_para_info, %object
+	.size	g_nand_para_info, 32
+g_nand_para_info:
+	.byte	6
+	.byte	-104
+	.byte	58
+	.byte	-104
+	.byte	-77
+	.byte	118
+	.byte	114
+	.byte	1
+	.byte	1
+	.byte	32
+	.short	768
+	.byte	3
+	.byte	2
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+	.short	5593
+	.byte	0
+	.byte	37
+	.byte	60
+	.byte	32
+	.byte	2
+	.byte	1
+	.byte	4
+	.byte	0
+	.short	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.section	.data.hy_f26_ref_value,"aw",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	hy_f26_ref_value, %object
+	.size	hy_f26_ref_value, 28
+hy_f26_ref_value:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
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+	.byte	10
+	.byte	6
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+	.byte	-8
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+	.byte	-23
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+	.byte	0
+	.byte	-26
+	.byte	-30
+	.byte	0
+	.byte	0
+	.byte	-32
+	.byte	-37
+	.section	.data.nand_opt_para,"aw",%progbits
+	.set	.LANCHOR199,. + 0
+	.type	nand_opt_para, %object
+	.size	nand_opt_para, 128
+nand_opt_para:
+	.byte	1
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
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+	.byte	21
+	.byte	0
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+	.byte	112
+	.byte	120
+	.byte	120
+	.byte	3
 	.byte	1
 	.byte	0
-	.short	256
-	.byte	1
-	.byte	-94
+	.space	14
+	.byte	2
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
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+	.byte	21
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+	.byte	112
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+	.byte	4
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+	.byte	21
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+	.byte	112
+	.byte	112
+	.byte	112
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	14
+	.section	.data.sd15_slc_rr,"aw",%progbits
+	.set	.LANCHOR37,. + 0
+	.type	sd15_slc_rr, %object
+	.size	sd15_slc_rr, 25
+sd15_slc_rr:
+	.byte	0
+	.byte	8
+	.byte	-8
+	.byte	16
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+	.byte	24
+	.byte	-24
+	.byte	32
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+	.byte	56
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+	.byte	64
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+	.byte	-72
+	.byte	80
+	.byte	-80
+	.byte	88
+	.byte	96
+	.byte	104
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+	.section	.data.sd15_tlc_rr,"aw",%progbits
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@@ -21353,190 +28001,78 @@ NandFlashParaTbl:
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-	.section	.rodata.__func__.11655,"a",%progbits
-	.set	.LANCHOR150,. + 0
-	.type	__func__.11655, %object
-	.size	__func__.11655, 6
-__func__.11655:
+	.section	.rodata.__func__.12054,"a",%progbits
+	.set	.LANCHOR204,. + 0
+	.type	__func__.12054, %object
+	.size	__func__.12054, 6
+__func__.12054:
 	.ascii	"pm_gc\000"
-	.section	.rodata.__func__.11671,"a",%progbits
-	.set	.LANCHOR92,. + 0
-	.type	__func__.11671, %object
-	.size	__func__.11671, 17
-__func__.11671:
+	.section	.rodata.__func__.12070,"a",%progbits
+	.set	.LANCHOR131,. + 0
+	.type	__func__.12070, %object
+	.size	__func__.12070, 17
+__func__.12070:
 	.ascii	"pm_alloc_new_blk\000"
-	.section	.rodata.__func__.11681,"a",%progbits
-	.set	.LANCHOR140,. + 0
-	.type	__func__.11681, %object
-	.size	__func__.11681, 14
-__func__.11681:
+	.section	.rodata.__func__.12080,"a",%progbits
+	.set	.LANCHOR190,. + 0
+	.type	__func__.12080, %object
+	.size	__func__.12080, 14
+__func__.12080:
 	.ascii	"pm_write_page\000"
-	.section	.rodata.__func__.11699,"a",%progbits
-	.set	.LANCHOR95,. + 0
-	.type	__func__.11699, %object
-	.size	__func__.11699, 21
-__func__.11699:
+	.section	.rodata.__func__.12098,"a",%progbits
+	.set	.LANCHOR134,. + 0
+	.type	__func__.12098, %object
+	.size	__func__.12098, 21
+__func__.12098:
 	.ascii	"pm_select_ram_region\000"
-	.section	.rodata.__func__.9485,"a",%progbits
-	.set	.LANCHOR114,. + 0
-	.type	__func__.9485, %object
-	.size	__func__.9485, 19
-__func__.9485:
+	.section	.rodata.__func__.9598,"a",%progbits
+	.set	.LANCHOR161,. + 0
+	.type	__func__.9598, %object
+	.size	__func__.9598, 19
+__func__.9598:
 	.ascii	"flash_read_page_en\000"
-	.section	.rodata.__func__.9514,"a",%progbits
-	.set	.LANCHOR128,. + 0
-	.type	__func__.9514, %object
-	.size	__func__.9514, 19
-__func__.9514:
+	.section	.rodata.__func__.9640,"a",%progbits
+	.set	.LANCHOR175,. + 0
+	.type	__func__.9640, %object
+	.size	__func__.9640, 19
+__func__.9640:
 	.ascii	"flash_prog_page_en\000"
-	.section	.rodata.__func__.9529,"a",%progbits
-	.set	.LANCHOR21,. + 0
-	.type	__func__.9529, %object
-	.size	__func__.9529, 26
-__func__.9529:
+	.section	.rodata.__func__.9656,"a",%progbits
+	.set	.LANCHOR38,. + 0
+	.type	__func__.9656, %object
+	.size	__func__.9656, 26
+__func__.9656:
 	.ascii	"flash_erase_duplane_block\000"
-	.section	.rodata.__func__.9540,"a",%progbits
-	.set	.LANCHOR24,. + 0
-	.type	__func__.9540, %object
-	.size	__func__.9540, 21
-__func__.9540:
+	.section	.rodata.__func__.9667,"a",%progbits
+	.set	.LANCHOR40,. + 0
+	.type	__func__.9667, %object
+	.size	__func__.9667, 21
+__func__.9667:
 	.ascii	"flash_erase_block_en\000"
-	.section	.rodata.__func__.9554,"a",%progbits
-	.set	.LANCHOR9,. + 0
-	.type	__func__.9554, %object
-	.size	__func__.9554, 28
-__func__.9554:
+	.section	.rodata.__func__.9681,"a",%progbits
+	.set	.LANCHOR29,. + 0
+	.type	__func__.9681, %object
+	.size	__func__.9681, 28
+__func__.9681:
 	.ascii	"flash_wait_device_ready_raw\000"
-	.section	.rodata.__func__.9579,"a",%progbits
-	.set	.LANCHOR124,. + 0
-	.type	__func__.9579, %object
-	.size	__func__.9579, 26
-__func__.9579:
+	.section	.rodata.__func__.9705,"a",%progbits
+	.set	.LANCHOR170,. + 0
+	.type	__func__.9705, %object
+	.size	__func__.9705, 26
+__func__.9705:
 	.ascii	"flash_start_tlc_page_prog\000"
-	.section	.rodata.__func__.9592,"a",%progbits
-	.set	.LANCHOR125,. + 0
-	.type	__func__.9592, %object
-	.size	__func__.9592, 22
-__func__.9592:
+	.section	.rodata.__func__.9716,"a",%progbits
+	.set	.LANCHOR171,. + 0
+	.type	__func__.9716, %object
+	.size	__func__.9716, 29
+__func__.9716:
+	.ascii	"flash_start_3d_mlc_page_prog\000"
+	.section	.rodata.__func__.9734,"a",%progbits
+	.set	.LANCHOR172,. + 0
+	.type	__func__.9734, %object
+	.size	__func__.9734, 22
+__func__.9734:
 	.ascii	"flash_start_page_prog\000"
-	.section	.rodata.__func__.9605,"a",%progbits
+	.section	.rodata.__func__.9745,"a",%progbits
 	.set	.LANCHOR33,. + 0
-	.type	__func__.9605, %object
-	.size	__func__.9605, 22
-__func__.9605:
+	.type	__func__.9745, %object
+	.size	__func__.9745, 22
+__func__.9745:
 	.ascii	"flash_start_page_read\000"
-	.section	.rodata.__func__.9620,"a",%progbits
-	.set	.LANCHOR120,. + 0
-	.type	__func__.9620, %object
-	.size	__func__.9620, 25
-__func__.9620:
+	.section	.rodata.__func__.9758,"a",%progbits
+	.set	.LANCHOR165,. + 0
+	.type	__func__.9758, %object
+	.size	__func__.9758, 31
+__func__.9758:
+	.ascii	"flash_complete_plane_page_read\000"
+	.section	.rodata.__func__.9770,"a",%progbits
+	.set	.LANCHOR41,. + 0
+	.type	__func__.9770, %object
+	.size	__func__.9770, 23
+__func__.9770:
+	.ascii	"flash_start_plane_read\000"
+	.section	.rodata.__func__.9783,"a",%progbits
+	.set	.LANCHOR166,. + 0
+	.type	__func__.9783, %object
+	.size	__func__.9783, 25
+__func__.9783:
 	.ascii	"flash_complete_page_read\000"
-	.section	.rodata.do_gc.str1.1,"aMS",%progbits,1
-.LC153:
-	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
-.LC154:
-	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
-	.ascii	"\000"
-.LC155:
-	.ascii	"gc free %x, %d\012\000"
+	.section	.rodata._list_remove_node.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",%progbits,1
-.LC81:
+.LC172:
+	.ascii	"free_buf_count: %d\012\000"
+.LC173:
 	.ascii	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000"
-.LC82:
+.LC174:
 	.ascii	"ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
-.LC83:
+.LC175:
 	.ascii	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC84:
+.LC176:
 	.ascii	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
 	.ascii	"e_index:0x%x\012\000"
-.LC85:
+.LC177:
 	.ascii	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
 	.ascii	"_index:0x%x\012\000"
-.LC86:
+.LC178:
 	.ascii	"lpa:\000"
-.LC87:
+.LC179:
 	.ascii	"vpn:\000"
-.LC88:
+.LC180:
 	.ascii	"sblk:\000"
-.LC89:
+.LC181:
 	.ascii	"lpa_hash:\000"
-.LC90:
+.LC182:
 	.ascii	"lpa_hash_index:\000"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",%progbits,1
-.LC24:
+.LC74:
 	.ascii	"dump_sblk_queue: %d\012\000"
-.LC25:
+.LC75:
 	.ascii	"buf id= %d state = %d ppa = %x\012\000"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",%progbits,1
-.LC54:
+.LC122:
 	.ascii	"flash_complete_page_read %x %x error_ecc %d %d\012\000"
-	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",%progbits,1
-.LC48:
-	.ascii	"%d flash_ddr_tunning_read %x ecc=%d\012\000"
-.LC49:
+	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",%progbits,1
+.LC115:
+	.ascii	"%d flash_ddr_tuning_read %x ecc=%d\012\000"
+.LC116:
 	.ascii	"sync para %d\012\000"
-.LC50:
+.LC117:
 	.ascii	"DDR mode Read error %x %x\012\000"
+.LC118:
+	.ascii	"SDR mode Read %x %x ecc:%x\012\000"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",%progbits,1
-.LC5:
+.LC36:
 	.ascii	"erase done: %x\012\000"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",%progbits,1
-.LC3:
-	.ascii	"flash_erase_block %x %x\012\000"
-.LC4:
-	.ascii	"flash_erase_block block = %x status = %x\012\000"
+.LC34:
+	.ascii	"flash_erase_block %x %x %x\012\000"
+.LC35:
+	.ascii	"flash_erase_block %d block = %x status = %x\012\000"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",%progbits,1
-.LC1:
+.LC32:
 	.ascii	"flash_erase_duplane_block %x %x %x\012\000"
-.LC2:
+.LC33:
 	.ascii	"flash_erase_duplane_block pageadd = %x status = %x\012"
 	.ascii	"\000"
+	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",%progbits,1
+.LC121:
+	.ascii	"flash_get_last_written_page: %x %x %x\012\000"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",%progbits,1
-.LC53:
+.LC169:
+	.ascii	"...%d @ %s %d %p\012\000"
+.LC170:
 	.ascii	"no sys info %x\012\000"
+	.section	.rodata.flash_info_data_init.str1.1,"aMS",%progbits,1
+.LC90:
+	.ascii	"...%d @ %s\012\000"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",%progbits,1
-.LC77:
+.LC166:
 	.ascii	"finfo:\000"
-.LC78:
+.LC167:
 	.ascii	"flash_info_flush id = %x, page = %x\012\000"
-.LC79:
+.LC168:
 	.ascii	"sys_info_flush error:%x\012\000"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",%progbits,1
-.LC6:
+.LC42:
 	.ascii	"flash_mask_bad_block %d %d\012\000"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",%progbits,1
-.LC57:
+.LC128:
 	.ascii	"flash_prog_page %x %x %x\012\000"
+.LC129:
+	.ascii	"flash_prog_page page_addr = %x status = %x\012\000"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",%progbits,1
-.LC59:
-	.ascii	"flash_prog_page_en:%x %x\012\000"
-.LC60:
+.LC136:
+	.ascii	"flash_prog_page_en:%x %x %x\012\000"
+.LC137:
+	.ascii	"w d:\000"
+.LC138:
+	.ascii	"w s:\000"
+.LC139:
 	.ascii	"spare\000"
-.LC61:
+.LC140:
 	.ascii	"data\000"
-.LC62:
+.LC141:
 	.ascii	"write error: %x\012\000"
+	.section	.rodata.flash_read_id.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+	.section	.rodata.flash_read_otp_data.str1.1,"aMS",%progbits,1
+.LC40:
+	.ascii	"otp:%x %x %x %x\012\000"
 	.section	.rodata.flash_read_page.str1.1,"aMS",%progbits,1
-.LC41:
+.LC108:
 	.ascii	"flash_read_page %x %x %x\012\000"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",%progbits,1
-.LC51:
-	.ascii	"flash_read_page_en %x %x\012\000"
-.LC52:
+.LC119:
+	.ascii	"flash_read_page_en %x %x %x\012\000"
+.LC120:
 	.ascii	"flash_read_page_en %x %x error_ecc %d %d\012\000"
-	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",%progbits,1
-.LC0:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",%progbits,1
+.LC37:
+	.ascii	"nand sdr mode %x\012\000"
+.LC38:
+	.ascii	"nand ddr mode %x\012\000"
+	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",%progbits,1
+.LC230:
+	.ascii	"error gc_add_sblk: %x\012\000"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",%progbits,1
-.LC14:
-	.ascii	"ftl_alloc_sblk %x, %d %d %d\012\000"
-	.section	.rodata.ftl_discard.str1.1,"aMS",%progbits,1
-.LC148:
-	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
+.LC73:
+	.ascii	"alloc sblk %x %d\012\000"
+	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",%progbits,1
+.LC161:
+	.ascii	"ftl_sblk_dump_write = %x %d %d %d %d\012\000"
+.LC162:
+	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
+	.ascii	" %x %x, spare: %x %x %x %x\012\000"
+.LC163:
+	.ascii	"ftl_sblk_dump_write2 = %x %d %d %d\012\000"
+.LC164:
+	.ascii	"ftl_sblk_dump_write = %x %x\012\000"
+.LC165:
+	.ascii	"ftl_sblk_dump_write done = %x\012\000"
+	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",%progbits,1
+.LC147:
+	.ascii	"%s %d %d %x %x\012\000"
+	.section	.rodata.ftl_free_sblk.str1.1,"aMS",%progbits,1
+.LC61:
+	.ascii	"swl_tlc_free_mini_ec_blk sblk %x\012\000"
+.LC62:
+	.ascii	"swl_slc_free_mini_ec_blk sblk %x\012\000"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",%progbits,1
-.LC65:
+.LC144:
 	.ascii	"%d %x @%d %x\012\000"
-.LC66:
+.LC145:
 	.ascii	"ftl_info_blk_init %d %d %x\012\000"
-	.section	.rodata.ftl_info_check.str1.1,"aMS",%progbits,1
-.LC122:
-	.ascii	"free blk vpn error: %x %x\012\000"
-.LC123:
-	.ascii	"data blk: %d %d %d\012\000"
-.LC124:
-	.ascii	"free blk: %d %d %d\012\000"
+.LC146:
+	.ascii	"ink flag: %x\012\000"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",%progbits,1
-.LC64:
+.LC143:
 	.ascii	"g_ftl_info_blk blk = %x, page = %x version = %d\012"
 	.ascii	"\000"
-	.section	.rodata.ftl_init.str1.1,"aMS",%progbits,1
-.LC139:
-	.ascii	"FTL version: 6.0.3 20180211\000"
-.LC140:
-	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
-.LC141:
-	.ascii	"flash info size: %d %d %d\012\000"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",%progbits,1
-.LC67:
+.LC148:
+	.ascii	"ftl_low_format %d\012\000"
+.LC149:
 	.ascii	"low format %d %d %d %d\012\000"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",%progbits,1
-.LC19:
-	.ascii	"mask bad block:cs %x block: %x\012\000"
+.LC59:
+	.ascii	"mask bad block:cs %x %x block: %x %x\012\000"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",%progbits,1
-.LC69:
+.LC151:
 	.ascii	"saved_active_page  = %x\012\000"
-.LC70:
+.LC152:
 	.ascii	"saved_active_plane = %x\012\000"
-.LC71:
+.LC153:
 	.ascii	"sblk = %x\012\000"
-.LC72:
-	.ascii	"phy_blk = %x %x\012\000"
-.LC73:
-	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
-	.ascii	" %x %x, spare: %x %x %x %x\012\000"
-.LC74:
+.LC154:
+	.ascii	"phy_blk = %x %x\012\000"
+.LC155:
 	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
-.LC75:
-	.ascii	"dump write = %x\012\000"
-	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",%progbits,1
-.LC68:
-	.ascii	"re low formaet %d\012\000"
-	.section	.rodata.ftl_read.str1.1,"aMS",%progbits,1
-.LC114:
-	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
-	.section	.rodata.ftl_read_ahead.str1.1,"aMS",%progbits,1
-.LC100:
-	.ascii	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\012\000"
-.LC101:
-	.ascii	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\012\000"
+.LC156:
+	.ascii	"dump_write_lpa = %x %x %x %x\012\000"
+.LC157:
+	.ascii	"dump write new ppa = %x, last ppa = %x lpa = %x\012"
+	.ascii	"\000"
+.LC158:
+	.ascii	"dump write = %x %x\012\000"
+.LC159:
+	.ascii	"dump write hash update = %x %x %x\012\000"
+	.section	.rodata.ftl_re_low_format.str1.1,"aMS",%progbits,1
+.LC150:
+	.ascii	"re low format %d\012\000"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",%progbits,1
-.LC107:
+.LC215:
+	.ascii	"ftl_sblk_dump = %x %d %d %d %d\012\000"
+.LC216:
 	.ascii	"ftl_sblk_dump = %x %x %x %x\012\000"
-.LC108:
+.LC217:
 	.ascii	"page_addr = %x, lpa=%x vpn = %d\012\000"
-.LC109:
+.LC218:
 	.ascii	"index= %x, lpa=%x\012\000"
-.LC110:
+.LC219:
 	.ascii	"block = %x, vpn=%x check vpn = %d\012\000"
-	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC127:
-	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC128:
-	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC129:
-	.ascii	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x "
-	.ascii	"data=%x %x\012\000"
-.LC130:
-	.ascii	"lba = %x, id= %x, index = %x hash ppa = %x\012\000"
-.LC131:
-	.ascii	"0pm:\000"
-.LC132:
-	.ascii	"1pm:\000"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",%progbits,1
-.LC80:
+.LC171:
 	.ascii	"l2p:\000"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",%progbits,1
-.LC63:
+.LC142:
 	.ascii	"low format %d\012\000"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",%progbits,1
-.LC143:
+.LC226:
 	.ascii	"ftl_update_l2p_map: %x %x %x\012\000"
-.LC144:
+.LC227:
 	.ascii	"ftl_update_l2p_map\000"
-.LC145:
+.LC228:
 	.ascii	"lpa_tbl:\000"
-.LC146:
+.LC229:
 	.ascii	"sblk %x vpn: %d %d\012\000"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",%progbits,1
-.LC17:
-	.ascii	"ftl_vpn_decrement %x = %d\012\000"
+.LC58:
+	.ascii	"ftl_vpn_decrement %x = %d, %d\012\000"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",%progbits,1
-.LC147:
+.LC231:
 	.ascii	"%d read error: ppa:%x, lpa:%x, status:%x\012\000"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",%progbits,1
-.LC18:
+.LC71:
 	.ascii	"ftl prog error =%x, lpa = %x, ppa= %x\012\000"
+.LC72:
+	.ascii	"ftl re prog: lpa = %x, ppa= %x\012\000"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",%progbits,1
-.LC7:
+.LC43:
 	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
+.LC44:
+	.ascii	"gc_add_sblk = %d, %d, %d,last update:%d, %d\012\000"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",%progbits,1
-.LC56:
-	.ascii	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
-	.ascii	"\000"
+.LC223:
+	.ascii	"gc_lpa:\000"
+.LC224:
+	.ascii	"gc_ppa:\000"
+.LC225:
+	.ascii	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %"
+	.ascii	"x\012\000"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",%progbits,1
-.LC149:
+.LC232:
 	.ascii	"gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
-.LC150:
+.LC233:
 	.ascii	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
 	.ascii	"page_index= %d\012\000"
-.LC151:
+.LC234:
 	.ascii	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\012\000"
-.LC152:
+.LC235:
 	.ascii	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id "
 	.ascii	"= %x plane = %x lpa=%x\012\000"
+	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",%progbits,1
+.LC60:
+	.ascii	"gc_free_bad_sblk 0x%x\012\000"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",%progbits,1
-.LC15:
+.LC63:
 	.ascii	"gc_free_src_blk = %x, vpn = %d\012\000"
-.LC16:
+.LC64:
 	.ascii	"gc_free_src_blk %x, %d\012\000"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",%progbits,1
-.LC10:
+.LC48:
 	.ascii	"%d gc_free_temp_buf buf id= %x\012\000"
+	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",%progbits,1
+.LC45:
+	.ascii	"gc_mark_bad_ppa %d %x %x\012\000"
 	.section	.rodata.gc_recovery.str1.1,"aMS",%progbits,1
-.LC133:
+.LC193:
 	.ascii	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
 	.ascii	"%x %x %x\012\000"
-.LC134:
-	.ascii	"gc_lpa:\000"
-.LC135:
-	.ascii	"gc_ppa:\000"
-.LC136:
+.LC194:
 	.ascii	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
 	.ascii	"\000"
-.LC137:
-	.ascii	"gc_recovery\000"
-.LC138:
+.LC195:
 	.ascii	"gc_recovery: %x vpn = %x\012\000"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",%progbits,1
-.LC125:
+.LC213:
 	.ascii	"gc_scan_src_blk = %x, vpn = %d\012\000"
-.LC126:
+.LC214:
 	.ascii	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",%progbits,1
-.LC111:
-	.ascii	"gc_search_src_blk = %d, %d, %d\012\000"
-.LC112:
-	.ascii	"vpn gc = %d, id = %d\012\000"
-.LC113:
-	.ascii	"gc_search_src_blk count= %d\012\000"
+.LC50:
+	.ascii	"zftl_get_gc_node cache = %x index = %d vpn = %x\012"
+	.ascii	"\000"
+.LC51:
+	.ascii	"gc_search_src_blk mode = %x, src mode = %x, count= "
+	.ascii	"%d %d\012\000"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",%progbits,1
-.LC11:
-	.ascii	"gc_static_wearleveling: slc blk: %d, tlc blk: %d av"
+.LC79:
+	.ascii	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d"
+	.ascii	" ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC80:
+	.ascii	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC81:
+	.ascii	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC82:
+	.ascii	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC83:
+	.ascii	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec "
+	.ascii	"= %d ,mode=%d, func=%x, bbt=%x vpn = %d\012\000"
+.LC84:
+	.ascii	"gc_static_wearleveling: slc blk: %x, tlc blk: %d av"
 	.ascii	"g slc ec: %d, avg tlc ec: %d \012\000"
-.LC12:
-	.ascii	"gc_static_wearleveling: min slc ec: %d, min tlc ec:"
-	.ascii	" %d max slc ec: %d, max tlc ec: %d \012\000"
+.LC85:
+	.ascii	"gc_static_wearleveling: min slc ec: %x, min tlc ec:"
+	.ascii	" %d max slc ec: %d, max tlc ec: %d; %d %d\012\000"
+.LC86:
+	.ascii	"swl add tlc gc = %x, %d, %d, %d, %d, %d\012\000"
+.LC87:
+	.ascii	"swl add slc gc  = %x, %d, %d, %d, %d, %d\012\000"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",%progbits,1
-.LC102:
+.LC209:
 	.ascii	"gc_update_l2p_map_new sblk %x\012\000"
-.LC103:
+.LC210:
 	.ascii	"gc_update_l2p_map_new: %x %x %x\012\000"
-.LC104:
-	.ascii	"0lpa: %x %x %x\012\000"
-.LC105:
+.LC211:
 	.ascii	"lpa: %x %x %x\012\000"
-.LC106:
+.LC212:
 	.ascii	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
 	.ascii	"\000"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",%progbits,1
-.LC8:
+.LC46:
 	.ascii	"status: %x, ppa: %x\012\000"
-.LC9:
+.LC47:
 	.ascii	"gc_write_completed: %x  %x  %x %x\012\000"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",%progbits,1
-.LC33:
+.LC98:
 	.ascii	"otp error! %d\000"
-.LC34:
+.LC99:
 	.ascii	"rr\000"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",%progbits,1
-.LC47:
+.LC114:
 	.ascii	"hynix RR %d row=%x, count %d, status=%d\012\000"
+	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
+.LC130:
+	.ascii	"1 write_idblock fix data %x %x %x\012\000"
+.LC131:
+	.ascii	"write_idblock check fail! %x\012\000"
+.LC132:
+	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC92:
+.LC184:
 	.ascii	"region_id = %d, pm_max_region = %d\012\000"
-.LC93:
+.LC185:
+	.ascii	"load_l2p_region no ppa = %x , %x, all setting 0xff."
+	.ascii	"...\012\000"
+.LC186:
 	.ascii	"load_l2p_region = %x,%x,%x, %x\012\000"
-.LC94:
+.LC187:
 	.ascii	"pm_ppa:\000"
-.LC95:
+.LC188:
 	.ascii	"data:\000"
-.LC96:
+.LC189:
 	.ascii	"spare:\000"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",%progbits,1
-.LC28:
+.LC78:
 	.ascii	"%s %d %d\012\000"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",%progbits,1
-.LC42:
-	.ascii	"micron %d row=%x,count %d,status=%d\012\000"
-.LC43:
+.LC109:
+	.ascii	"micron %d row=%x,last status %d,status = %d\012\000"
+.LC110:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.nand_flash_print_info.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"...%s enter...\012\000"
+.LC2:
+	.ascii	"No.0 FLASH ID: %x %x %x %x %x %x\012\000"
+.LC3:
+	.ascii	"DiePerChip: %x\012\000"
+.LC4:
+	.ascii	"SectPerPage: %x\012\000"
+.LC5:
+	.ascii	"PagePerBlk: %x\012\000"
+.LC6:
+	.ascii	"Cell: %x\012\000"
+.LC7:
+	.ascii	"PlanePerDie: %x\012\000"
+.LC8:
+	.ascii	"BlkPerPlane: %x\012\000"
+.LC9:
+	.ascii	"die gap: %x\012\000"
+.LC10:
+	.ascii	"lsbMode: %x\012\000"
+.LC11:
+	.ascii	"ReadRetryMode: %x\012\000"
+.LC12:
+	.ascii	"ecc: %x\012\000"
+.LC13:
+	.ascii	"idb ecc: %x\012\000"
+.LC14:
+	.ascii	"g_flash_slc_mode: %x\012\000"
+.LC15:
+	.ascii	"OptMode: %x\012\000"
+.LC16:
+	.ascii	"g_nand_max_die: %x\012\000"
+.LC17:
+	.ascii	"Cache read enable: %x\012\000"
+.LC18:
+	.ascii	"Cache random read enable: %x\012\000"
+.LC19:
+	.ascii	"Cache prog enable: %x\012\000"
+.LC20:
+	.ascii	"multi read enable: %x\012\000"
+.LC21:
+	.ascii	"multi prog enable: %x\012\000"
+.LC22:
+	.ascii	"interleave enable: %x\012\000"
+.LC23:
+	.ascii	"read retry enable: %x\012\000"
+.LC24:
+	.ascii	"randomizer enable: %x\012\000"
+.LC25:
+	.ascii	"SDR enable: %x\012\000"
+.LC26:
+	.ascii	"ONFI enable: %x\012\000"
+.LC27:
+	.ascii	"TOGGLE enable: %x\012\000"
+.LC28:
+	.ascii	"g_flash_slc_mode: %x %x\012\000"
+.LC29:
+	.ascii	"MultiPlaneProgCmd: %x %x\012\000"
+.LC30:
+	.ascii	"MultiPlaneReadCmd: %x %x\012\000"
+.LC31:
+	.ascii	"g_flash_toggle_mode_en: %x\012\000"
+	.section	.rodata.nandc_init.str1.1,"aMS",%progbits,1
+.LC91:
+	.ascii	"...%s enter... %p\012\000"
+.LC92:
+	.ascii	"0:%x %x %x %x %x\012\000"
+.LC93:
+	.ascii	"g_nandc_ver...%d\012\000"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",%progbits,1
-.LC39:
+.LC105:
 	.ascii	"dqs data abort %x\012\000"
-.LC40:
+.LC106:
+	.ascii	"dqs data timeout %x\012\000"
+.LC107:
 	.ascii	"xfer error %x\012\000"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",%progbits,1
-.LC35:
+.LC100:
+	.ascii	"flash_abort_clear = %d\012\000"
+.LC101:
 	.ascii	"%d mtrans_cnt = %d page_num = %d\012\000"
-.LC36:
+.LC102:
 	.ascii	"nandc:\000"
-.LC37:
+.LC103:
 	.ascii	"%d flReg.d32=%x %x\012\000"
-.LC38:
+.LC104:
 	.ascii	"nandc_xfer_done read error %x\012\000"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC26:
+.LC76:
 	.ascii	"blk %x is bad block\012\000"
-.LC27:
+.LC77:
 	.ascii	"pm_alloc_new_blk: %x %x %x %x\012\000"
+	.section	.rodata.pm_free_sblk.str1.1,"aMS",%progbits,1
+.LC89:
+	.ascii	"ftl_free_no_use_map_blk %x %x %x %d\012\000"
 	.section	.rodata.pm_init.str1.1,"aMS",%progbits,1
-.LC97:
+.LC190:
 	.ascii	"pm_init posr %x %x %x\012\000"
-.LC98:
+.LC191:
 	.ascii	"pm_init recovery %x %x %x\012\000"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",%progbits,1
-.LC99:
+.LC192:
 	.ascii	"pm_log2phys  lpn = %d, max lpn = %d\012\000"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",%progbits,1
-.LC91:
+.LC183:
 	.ascii	"%s w error lpn = %x, max ppa = %d\012\000"
 	.section	.rodata.pm_write_page.str1.1,"aMS",%progbits,1
-.LC76:
+.LC160:
 	.ascii	"pm_write_page write error: %x\012\000"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",%progbits,1
-.LC20:
-	.ascii	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn:"
-	.ascii	" s:%x t:%x\012\000"
-.LC21:
+.LC65:
+	.ascii	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk"
+	.ascii	":s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\012\000"
+.LC66:
 	.ascii	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
-.LC22:
+.LC67:
 	.ascii	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
-.LC23:
+.LC68:
 	.ascii	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
+.LC69:
+	.ascii	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:"
+	.ascii	"%d free_th: %d\012\000"
+.LC70:
+	.ascii	"swl : %x %x %x %x\012\000"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",%progbits,1
-.LC13:
-	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d\012\000"
+.LC49:
+	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\012"
+	.ascii	"\000"
+	.section	.rodata.print_list_info.str1.1,"aMS",%progbits,1
+.LC56:
+	.ascii	"list count:%p %d\012\000"
+.LC57:
+	.ascii	"%d: node:%x %x %x %x, %d %d %d %d %d\012\000"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",%progbits,1
-.LC55:
-	.ascii	"set buf %d,status = %x, ppa = %x lun state = %d\012"
+.LC123:
+	.ascii	"read: %x %x %x %x\012\000"
+.LC124:
+	.ascii	"0set buf %d,status = %x, ppa = %x lun state = %d\012"
 	.ascii	"\000"
+.LC125:
+	.ascii	"prog end %x %x error_ecc %d %d\012\000"
+.LC126:
+	.ascii	"1set buf %d,status = %x, ppa = %x lun state = %d\012"
+	.ascii	"\000"
+.LC127:
+	.ascii	"dp prog end %x %x error_ecc %d %d\012\000"
 	.section	.rodata.random_seed,"a",%progbits
 	.align	1
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -23388,22 +30062,33 @@ random_seed:
 	.short	17598
 	.short	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC142:
-	.ascii	"ftl_init %x\012\000"
+.LC208:
+	.ascii	"zftl_init %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC29:
+.LC94:
 	.ascii	"%s 0x%x:\000"
-.LC30:
+.LC95:
 	.ascii	"%x \000"
-.LC31:
+.LC96:
 	.ascii	"\000"
-.LC32:
+.LC97:
 	.ascii	"%s\012\000"
+	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"bad block test:%x %x\012\000"
+	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",%progbits,1
+.LC133:
+	.ascii	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x"
+	.ascii	"\012\000"
+	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",%progbits,1
+.LC134:
+	.ascii	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\012"
+	.ascii	"\000"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",%progbits,1
-.LC58:
+.LC135:
 	.ascii	"sblk_prog_page ppa = %x, count = %d\012\000"
 	.section	.rodata.toshiba_15ref_value,"a",%progbits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -23503,7 +30188,7 @@ toshiba_15ref_value:
 	.byte	114
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -23519,7 +30204,7 @@ toshiba_3D_slc_value:
 	.byte	-56
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -23537,13 +30222,6 @@ toshiba_3D_tlc_value:
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	-9
-	.byte	-12
-	.byte	-9
-	.byte	-7
-	.byte	-13
-	.byte	-12
-	.byte	-7
 	.byte	5
 	.byte	-2
 	.byte	-1
@@ -23551,6 +30229,13 @@ toshiba_3D_tlc_value:
 	.byte	-3
 	.byte	-2
 	.byte	6
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
 	.byte	-6
 	.byte	-15
 	.byte	-15
@@ -23923,14 +30608,14 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
-.LC44:
+.LC111:
 	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
-.LC45:
+.LC112:
 	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
-.LC46:
+.LC113:
 	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
 	.section	.rodata.toshiba_A19ref_value,"a",%progbits
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -23980,7 +30665,7 @@ toshiba_A19ref_value:
 	.byte	124
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",%progbits
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -23992,19 +30677,66 @@ toshiba_ref_value:
 	.byte	8
 	.byte	12
 	.byte	112
-	.section	.rodata.vpn_check.str1.1,"aMS",%progbits,1
-.LC115:
-	.ascii	"acblk = %x, tempblk = %x, gc_des = %x\012\000"
-.LC116:
-	.ascii	"acblk = %x, free page = %x, vpn = %x %x\012\000"
-.LC117:
-	.ascii	"tmp_blk = %x, free page = %x, vpn = %x %x\012\000"
-.LC118:
-	.ascii	"vpn_check lpa = %x, ppa = %x, blk = %x\012\000"
-.LC119:
-	.ascii	"l2p\000"
-.LC120:
-	.ascii	"vpn_check %x = c %x  s %x function: %x\012\000"
-.LC121:
-	.ascii	"vpn_check blk = %x fix vpc\012\000"
+	.section	.rodata.zftl_discard.str1.1,"aMS",%progbits,1
+.LC241:
+	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
+	.section	.rodata.zftl_do_gc.str1.1,"aMS",%progbits,1
+.LC236:
+	.ascii	"gc %d: %d %d %d %d %d %d %d\012\000"
+.LC237:
+	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
+.LC238:
+	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
+	.ascii	"\000"
+.LC239:
+	.ascii	"gc free %x, %d\012\000"
+	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",%progbits,1
+.LC52:
+	.ascii	"swl_tlc_free_mini_ec_blk alloc sblk %x\012\000"
+.LC53:
+	.ascii	"zftl_get_free_sblk %x %d, %p %d %d\012\000"
+.LC54:
+	.ascii	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\012\000"
+	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"swl_slc_free_mini_ec_blk alloc sblk %x\012\000"
+	.section	.rodata.zftl_init.str1.1,"aMS",%progbits,1
+.LC196:
+	.ascii	"FTL version: 6.0.16 20190427\000"
+.LC197:
+	.ascii	"_c_user_data_density := %d\012\000"
+.LC198:
+	.ascii	"_c_totle_phy_density := %d\012\000"
+.LC199:
+	.ascii	"_c_totle_log_page := %d\012\000"
+.LC200:
+	.ascii	"_c_totle_data_density := %d\012\000"
+.LC201:
+	.ascii	"_c_ftl_pm_page_num := %d\012\000"
+.LC202:
+	.ascii	"_c_ftl_byte_pre_page := %d\012\000"
+.LC203:
+	.ascii	"_c_max_pm_sblk := %d\012\000"
+.LC204:
+	.ascii	"_min_slc_super_block := %d\012\000"
+.LC205:
+	.ascii	"_max_xlc_super_block := %d\012\000"
+.LC206:
+	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
+.LC207:
+	.ascii	"flash info size: %d %d %d\012\000"
+	.section	.rodata.zftl_read.str1.1,"aMS",%progbits,1
+.LC220:
+	.ascii	"ftl_read %x %x %x\012\000"
+.LC221:
+	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
+.LC222:
+	.ascii	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %"
+	.ascii	"x %x %x\012\000"
+	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",%progbits,1
+.LC88:
+	.ascii	"free blk vpn error: %x %x\012\000"
+	.section	.rodata.zftl_write.str1.1,"aMS",%progbits,1
+.LC240:
+	.ascii	"ftlwrite %x %x %x %x\012\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 8e0423e3d2..344fb75b7b 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,10 +5,10 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2019-01-07
+ * date: 2019-04-27
  */
 	.arch armv8-a
-	.file	"rk_zftl_arm_v8.c"
+	.file	"rk_zftl_arm_v8.S"
 	.section	.text.flash_mem_cmp8,"ax",@progbits
 	.align	2
 	.type	flash_mem_cmp8, %function
@@ -540,10 +540,10 @@ zftl_get_gc_node.part.9:
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.28,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.29,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.28, %function
-nandc_de_cs.constprop.28:
+	.type	nandc_de_cs.constprop.29, %function
+nandc_de_cs.constprop.29:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -551,7 +551,7 @@ nandc_de_cs.constprop.28:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.28, .-nandc_de_cs.constprop.28
+	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -818,40 +818,42 @@ nand_flash_print_info:
 .L110:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L111
+	adrp	x0, .LANCHOR19
+	ldrb	w2, [x0, #:lo12:.LANCHOR19]
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LC14
-	add	x0, x0, :lo12:.LC14
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 .L111:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L112
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
-	adrp	x0, .LC28
-	add	x0, x0, :lo12:.LC28
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
 .L112:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L113
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 .L113:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L83
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR21
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR20]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	ldrb	w1, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	b	printf
 .L83:
 	ldr	x19, [sp, 16]
@@ -900,22 +902,22 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR25
-	add	x6, x6, :lo12:.LANCHOR25
-	adrp	x3, .LANCHOR21
-	add	x3, x3, :lo12:.LANCHOR21
+	adrp	x6, .LANCHOR26
+	add	x6, x6, :lo12:.LANCHOR26
+	adrp	x3, .LANCHOR22
+	add	x3, x3, :lo12:.LANCHOR22
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR22
-	add	x7, x0, :lo12:.LANCHOR22
+	adrp	x0, .LANCHOR23
+	add	x7, x0, :lo12:.LANCHOR23
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR23
+	adrp	x8, .LANCHOR24
 	mov	x2, 0
-	adrp	x10, .LANCHOR24
-	add	x8, x8, :lo12:.LANCHOR23
-	add	x10, x10, :lo12:.LANCHOR24
+	adrp	x10, .LANCHOR25
+	add	x8, x8, :lo12:.LANCHOR24
+	add	x10, x10, :lo12:.LANCHOR25
 	cmp	w0, w2
 	bhi	.L220
 	ret
@@ -933,7 +935,7 @@ toshiba_set_rr_para:
 .L217:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR22
+	add	x0, x5, :lo12:.LANCHOR23
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
@@ -955,10 +957,10 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR26
+	adrp	x2, .LANCHOR27
 	and	w1, w1, 255
 	and	w0, w0, 255
-	ldr	x3, [x2, #:lo12:.LANCHOR26]
+	ldr	x3, [x2, #:lo12:.LANCHOR27]
 	adrp	x2, .LANCHOR13
 	add	x6, x3, 128
 	add	x4, x3, 112
@@ -1006,16 +1008,16 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR23
-	ldrb	w1, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 7
 	bhi	.L237
-	adrp	x8, .LANCHOR26
+	adrp	x8, .LANCHOR27
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR26]
+	ldr	x1, [x8, #:lo12:.LANCHOR27]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
 	cbz	w1, .L237
@@ -1023,7 +1025,7 @@ hynix_reconfig_rr_para:
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR26]
+	ldr	x0, [x8, #:lo12:.LANCHOR27]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
@@ -1036,10 +1038,10 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR27
+	adrp	x1, .LANCHOR28
 	and	w0, w0, 255
 	adrp	x2, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
 	cmp	w1, 9
 	lsl	w1, w0, 16
@@ -1058,8 +1060,8 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR13
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
@@ -1085,10 +1087,10 @@ nandc_set_if_mode:
 	beq	.L248
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR28
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
@@ -1148,15 +1150,15 @@ flash_wait_device_ready_raw:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
 	bhi	.L256
-	adrp	x1, .LANCHOR28
+	adrp	x1, .LANCHOR29
 	adrp	x0, .LC0
 	mov	w2, 677
-	add	x1, x1, :lo12:.LANCHOR28
+	add	x1, x1, :lo12:.LANCHOR29
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L256:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w5, [x0, w21, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
@@ -1181,7 +1183,7 @@ flash_wait_device_ready_raw:
 	bne	.L259
 	cmp	w3, 255
 	beq	.L259
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x21, [sp, 32]
 	mov	w0, w3
 	ldp	x19, x20, [sp, 16]
@@ -1278,8 +1280,8 @@ zftl_flash_enter_slc_mode:
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	bne	.L282
 .L302:
-	adrp	x1, .LANCHOR30+29
-	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
+	adrp	x1, .LANCHOR31+29
+	ldrb	w1, [x1, #:lo12:.LANCHOR31+29]
 	cbz	w1, .L279
 	add	x0, x0, 8
 	add	x0, x4, x0, lsl 8
@@ -1288,8 +1290,8 @@ zftl_flash_enter_slc_mode:
 .L282:
 	cmp	w1, 2
 	bne	.L284
-	adrp	x1, .LANCHOR31
-	add	x1, x1, :lo12:.LANCHOR31
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	ldrb	w2, [x1, x0]
 	cbz	w2, .L279
 	strb	wzr, [x1, x0]
@@ -1297,9 +1299,9 @@ zftl_flash_enter_slc_mode:
 .L284:
 	cmp	w1, 3
 	bne	.L279
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	sxtw	x2, w0
-	add	x1, x1, :lo12:.LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR32
 	ldrb	w3, [x1, x2]
 	cbz	w3, .L279
 	ubfiz	x0, x0, 8, 8
@@ -1343,8 +1345,8 @@ zftl_flash_exit_slc_mode:
 	cmp	w1, 1
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	bne	.L306
-	adrp	x1, .LANCHOR30+30
-	ldrb	w1, [x1, #:lo12:.LANCHOR30+30]
+	adrp	x1, .LANCHOR31+30
+	ldrb	w1, [x1, #:lo12:.LANCHOR31+30]
 .L328:
 	cbz	w1, .L303
 	add	x0, x0, 8
@@ -1354,12 +1356,12 @@ zftl_flash_exit_slc_mode:
 .L306:
 	cmp	w1, 2
 	bne	.L308
-	adrp	x2, .LANCHOR31
-	add	x2, x2, :lo12:.LANCHOR31
+	adrp	x2, .LANCHOR32
+	add	x2, x2, :lo12:.LANCHOR32
 	ldrb	w1, [x2, x0]
 	cbnz	w1, .L303
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
 	mov	w5, 4
 	ldrb	w3, [x1, 12]
 	ldrb	w1, [x1, 30]
@@ -1370,13 +1372,13 @@ zftl_flash_exit_slc_mode:
 .L308:
 	cmp	w1, 3
 	bne	.L303
-	adrp	x2, .LANCHOR31
+	adrp	x2, .LANCHOR32
 	sxtw	x5, w0
-	add	x2, x2, :lo12:.LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR32
 	ldrb	w1, [x2, x5]
 	cbnz	w1, .L303
-	adrp	x3, .LANCHOR30
-	add	x3, x3, :lo12:.LANCHOR30
+	adrp	x3, .LANCHOR31
+	add	x3, x3, :lo12:.LANCHOR31
 	stp	x29, x30, [sp, -16]!
 	ubfiz	x0, x0, 8, 8
 	add	x4, x4, x0
@@ -1434,15 +1436,15 @@ flash_start_page_read:
 	ubfx	x21, x1, 24, 2
 	cmp	w0, w22
 	bhi	.L330
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR33
 	adrp	x0, .LC0
 	mov	w2, 845
-	add	x1, x1, :lo12:.LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR33
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L330:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w8, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x7, [x0, #:lo12:.LANCHOR13]
@@ -1473,7 +1475,7 @@ flash_start_page_read:
 	str	w20, [x1, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 .L331:
 	adrp	x0, .LANCHOR16
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
@@ -1536,16 +1538,16 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR25
-	adrp	x2, .LANCHOR21
-	add	x2, x2, :lo12:.LANCHOR21
-	ldrb	w4, [x0, #:lo12:.LANCHOR25]
-	adrp	x0, .LANCHOR23
-	ldrb	w5, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR26
+	adrp	x2, .LANCHOR22
+	add	x2, x2, :lo12:.LANCHOR22
+	ldrb	w4, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR24
+	ldrb	w5, [x0, #:lo12:.LANCHOR24]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR22
-	add	x0, x0, :lo12:.LANCHOR22
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
@@ -1583,8 +1585,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR33
-	add	x0, x0, :lo12:.LANCHOR33
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1619,8 +1621,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR34
-	add	x2, x2, :lo12:.LANCHOR34
+	adrp	x2, .LANCHOR35
+	add	x2, x2, :lo12:.LANCHOR35
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1645,8 +1647,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR35
-	add	x0, x0, :lo12:.LANCHOR35
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1674,8 +1676,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
+	adrp	x2, .LANCHOR37
+	add	x2, x2, :lo12:.LANCHOR37
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
@@ -1702,15 +1704,15 @@ flash_erase_duplane_block:
 	and	w25, w1, 255
 	cmp	w0, w19
 	bhi	.L362
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	adrp	x0, .LC0
 	mov	w2, 588
-	add	x1, x1, :lo12:.LANCHOR37
+	add	x1, x1, :lo12:.LANCHOR38
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L362:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w22, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x24, [x0, #:lo12:.LANCHOR13]
@@ -1720,11 +1722,11 @@ flash_erase_duplane_block:
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
 	tbz	x0, 4, .L363
-	adrp	x0, .LC31
+	adrp	x0, .LC32
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
-	add	x0, x0, :lo12:.LC31
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 .L363:
 	bl	nandc_wait_flash_ready
@@ -1743,8 +1745,8 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	lsr	w0, w21, 16
 	str	w0, [x24, 2052]
-	adrp	x0, .LANCHOR38
-	ldrb	w0, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR39
+	ldrb	w0, [x0, #:lo12:.LANCHOR39]
 	cbnz	w0, .L368
 	mov	w0, 208
 	str	w0, [x24, 2056]
@@ -1769,13 +1771,13 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, w19
 	orr	w19, w19, w5
 	cbz	w19, .L367
-	adrp	x0, .LC32
+	adrp	x0, .LC33
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC32
+	add	x0, x0, :lo12:.LC33
 	bl	printf
 .L367:
 	mov	w0, w19
@@ -1811,15 +1813,15 @@ flash_erase_block_en:
 	and	w22, w2, 2097151
 	cmp	w0, w23
 	bhi	.L377
-	adrp	x1, .LANCHOR39
+	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
 	mov	w2, 633
-	add	x1, x1, :lo12:.LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L377:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w20, [x0, w23, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x25, [x0, #:lo12:.LANCHOR13]
@@ -1829,11 +1831,11 @@ flash_erase_block_en:
 	add	x24, x19, 8
 	add	x24, x25, x24, lsl 8
 	tbz	x0, 4, .L378
-	adrp	x0, .LC33
+	adrp	x0, .LC34
 	mov	w3, w26
 	mov	w2, w21
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC33
+	add	x0, x0, :lo12:.LC34
 	bl	printf
 .L378:
 	bl	nandc_wait_flash_ready
@@ -1858,7 +1860,7 @@ flash_erase_block_en:
 	mov	x0, x24
 	bl	flash_read_status
 	mov	w19, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	mov	w0, 5
 	ands	w19, w19, w0
 	beq	.L381
@@ -1866,8 +1868,8 @@ flash_erase_block_en:
 	mov	w3, w19
 	mov	w1, w23
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
 	udiv	w2, w21, w2
 	bl	printf
 .L381:
@@ -1897,8 +1899,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -1910,7 +1912,7 @@ flash_erase_all:
 	adrp	x22, .LANCHOR18
 	str	x25, [sp, 64]
 	add	x22, x22, :lo12:.LANCHOR18
-	adrp	x24, .LANCHOR29
+	adrp	x24, .LANCHOR30
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
@@ -1921,14 +1923,14 @@ flash_erase_all:
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
-	adrp	x0, .LC35
+	adrp	x0, .LC36
 	ldp	x23, x24, [sp, 48]
-	add	x0, x0, :lo12:.LC35
+	add	x0, x0, :lo12:.LC36
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
 .L394:
-	add	x0, x24, :lo12:.LANCHOR29
+	add	x0, x24, :lo12:.LANCHOR30
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
 .L392:
@@ -1962,15 +1964,15 @@ flash_start_plane_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w22
 	bhi	.L397
-	adrp	x1, .LANCHOR40
+	adrp	x1, .LANCHOR41
 	adrp	x0, .LC0
 	mov	w2, 940
-	add	x1, x1, :lo12:.LANCHOR40
+	add	x1, x1, :lo12:.LANCHOR41
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L397:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w7, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x10, [x0, #:lo12:.LANCHOR13]
@@ -1990,9 +1992,9 @@ flash_start_plane_read:
 	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
 .L399:
-	adrp	x0, .LANCHOR19
+	adrp	x0, .LANCHOR20
 	and	x4, x7, 255
-	add	x1, x0, :lo12:.LANCHOR19
+	add	x1, x0, :lo12:.LANCHOR20
 	add	x4, x10, x4, lsl 8
 	and	w3, w21, 255
 	and	w6, w20, 255
@@ -2032,7 +2034,7 @@ flash_start_plane_read:
 	str	w0, [x4, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 .L398:
 	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
@@ -2058,7 +2060,7 @@ flash_start_plane_read:
 	cbz	w19, .L404
 	str	w19, [x4, 2056]
 .L404:
-	add	x0, x0, :lo12:.LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
 	b	.L415
@@ -2071,14 +2073,14 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR41
+	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
 	adrp	x21, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR42
+	adrp	x20, .LANCHOR43
 	mov	w23, w0
-	add	x22, x22, :lo12:.LANCHOR41
-	add	x20, x20, :lo12:.LANCHOR42
+	add	x22, x22, :lo12:.LANCHOR42
+	add	x20, x20, :lo12:.LANCHOR43
 	add	x21, x21, :lo12:.LANCHOR14
 	str	x25, [sp, 64]
 	mov	x25, 0
@@ -2111,8 +2113,8 @@ flash_set_interface_mode:
 	tbz	x1, 0, .L419
 	ldr	w0, [x21]
 	tbz	x0, 12, .L421
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
 	bl	printf
 .L421:
 	add	x0, x19, x25, lsl 8
@@ -2160,8 +2162,8 @@ flash_set_interface_mode:
 	tbz	x1, 2, .L419
 	ldr	w0, [x21]
 	tbz	x0, 12, .L425
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	bl	printf
 .L425:
 	add	x0, x19, x25, lsl 8
@@ -2240,7 +2242,7 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
@@ -2249,9 +2251,9 @@ flash_read_id:
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
-	adrp	x0, .LC38
+	adrp	x0, .LC39
 	ldrb	w5, [x8, 3]
-	add	x0, x0, :lo12:.LC38
+	add	x0, x0, :lo12:.LC39
 	ldrb	w4, [x8, 2]
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
@@ -2267,10 +2269,10 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR30+9
+	adrp	x2, .LANCHOR31+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR30+9]
+	ldrb	w3, [x2, #:lo12:.LANCHOR31+9]
 	adrp	x2, .LANCHOR13
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
@@ -2327,8 +2329,8 @@ flash_read_otp_data:
 	str	w0, [x19, 2056]
 	str	w4, [x19, 2052]
 	mov	w1, w20
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	ldr	w2, [x19, 2048]
 	ldr	w3, [x19, 2048]
 	ldr	w4, [x19, 2048]
@@ -2366,7 +2368,7 @@ flash_read_otp_data:
 	str	wzr, [x19, 2048]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
@@ -2379,10 +2381,10 @@ sandisk_prog_test_bad_block:
 	and	x2, x0, 255
 	add	x29, sp, 0
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR30+29
+	adrp	x1, .LANCHOR31+29
 	str	x19, [sp, 16]
 	mov	x0, x2
-	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
+	ldrb	w1, [x1, #:lo12:.LANCHOR31+29]
 	add	x2, x2, 8
 	add	x2, x4, x2, lsl 8
 	cbz	w1, .L464
@@ -2414,9 +2416,9 @@ sandisk_prog_test_bad_block:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L463
-	adrp	x0, .LC40
+	adrp	x0, .LC41
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC40
+	add	x0, x0, :lo12:.LC41
 	bl	printf
 .L463:
 	mov	w0, w19
@@ -2447,11 +2449,11 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR43
+	adrp	x2, .LANCHOR44
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR43]
-	adrp	x2, .LANCHOR27
-	ldrb	w2, [x2, #:lo12:.LANCHOR27]
+	strb	w0, [x2, #:lo12:.LANCHOR44]
+	adrp	x2, .LANCHOR28
+	ldrb	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 9
 	adrp	x2, .LANCHOR13
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
@@ -2503,8 +2505,8 @@ nandc_bch_sel:
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR27
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
 	bne	.L492
 	ldr	w0, [x0, 296]
@@ -2541,15 +2543,15 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR46
+	adrp	x4, .LANCHOR47
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR27
+	adrp	x0, .LANCHOR28
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	adrp	x24, .LANCHOR13
 	cmp	w0, 9
 	bne	.L498
@@ -2558,21 +2560,21 @@ nandc_xfer_start:
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR44
+	adrp	x0, .LANCHOR45
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldrb	w0, [x0, #:lo12:.LANCHOR44]
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
 	cbz	w0, .L499
-	adrp	x0, .LANCHOR45
-	ldrb	w1, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR46
+	ldrb	w1, [x0, #:lo12:.LANCHOR46]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
 .L499:
-	add	x21, x4, :lo12:.LANCHOR46
+	add	x21, x4, :lo12:.LANCHOR47
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -2606,9 +2608,9 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR47
+	adrp	x2, .LANCHOR48
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR47]
+	ldrh	w2, [x2, #:lo12:.LANCHOR48]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
@@ -2637,11 +2639,11 @@ nandc_xfer_start:
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	cbz	w23, .L501
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR46]
+	ldr	x8, [x4, #:lo12:.LANCHOR47]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
@@ -2652,8 +2654,8 @@ nandc_xfer_start:
 	cmp	x3, x1
 	bne	.L504
 .L505:
-	add	x21, x4, :lo12:.LANCHOR46
-	ldr	x0, [x4, #:lo12:.LANCHOR46]
+	add	x21, x4, :lo12:.LANCHOR47
+	ldr	x0, [x4, #:lo12:.LANCHOR47]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -2698,7 +2700,7 @@ nandc_xfer_start:
 	mov	w0, w7
 	b	.L503
 .L501:
-	ldr	x1, [x4, #:lo12:.LANCHOR46]
+	ldr	x1, [x4, #:lo12:.LANCHOR47]
 	str	w0, [x1]
 	b	.L505
 	.size	nandc_xfer_start, .-nandc_xfer_start
@@ -2708,16 +2710,16 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR48
-	add	x1, x1, :lo12:.LANCHOR48
+	adrp	x1, .LANCHOR49
+	add	x1, x1, :lo12:.LANCHOR49
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR45
-	ldrb	w2, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	ldrb	w2, [x1, #:lo12:.LANCHOR46]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR27
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
@@ -2740,33 +2742,33 @@ zftl_flash_de_init:
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
 	cbz	w0, .L520
-	adrp	x0, .LANCHOR49
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	cbnz	w0, .L520
 	bl	zftl_flash_exit_slc_mode
 .L520:
-	adrp	x19, .LANCHOR20
+	adrp	x19, .LANCHOR21
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR20]
+	ldrb	w0, [x19, #:lo12:.LANCHOR21]
 	cbz	w0, .L521
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	tbz	x0, 0, .L521
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR20]
+	strb	wzr, [x19, #:lo12:.LANCHOR21]
 .L521:
-	adrp	x3, .LANCHOR45
-	ldrb	w0, [x3, #:lo12:.LANCHOR45]
+	adrp	x3, .LANCHOR46
+	ldrb	w0, [x3, #:lo12:.LANCHOR46]
 	cbz	w0, .L522
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR45]
+	strb	wzr, [x3, #:lo12:.LANCHOR46]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR45]
+	strb	w0, [x3, #:lo12:.LANCHOR46]
 .L522:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -2778,8 +2780,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR45
-	strb	w0, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	strb	w0, [x1, #:lo12:.LANCHOR46]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -3079,8 +3081,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR30
-	add	x3, x3, :lo12:.LANCHOR30
+	adrp	x3, .LANCHOR31
+	add	x3, x3, :lo12:.LANCHOR31
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -3093,8 +3095,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR26
-	ldr	x2, [x2, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR27
+	ldr	x2, [x2, #:lo12:.LANCHOR27]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -3111,14 +3113,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -3132,8 +3134,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR26
-	ldr	x2, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR27
+	ldr	x2, [x0, #:lo12:.LANCHOR27]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -3273,8 +3275,8 @@ gc_add_sblk:
 	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
 	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
 .L607:
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
@@ -3334,8 +3336,8 @@ gc_add_sblk:
 	ubfx	x2, x2, 5, 3
 	mov	w1, w20
 	ldrh	w3, [x0, x26]
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
 	b	.L628
 .L611:
@@ -3362,8 +3364,8 @@ gc_add_sblk:
 	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
 .L617:
 	mov	x0, x19
@@ -3405,14 +3407,78 @@ gc_add_sblk:
 	bne	.L620
 	b	.L638
 	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_mark_bad_ppa,"ax",@progbits
+	.align	2
+	.global	gc_mark_bad_ppa
+	.type	gc_mark_bad_ppa, %function
+gc_mark_bad_ppa:
+	stp	x29, x30, [sp, -64]!
+	adrp	x1, .LANCHOR66
+	mov	w3, w0
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 21
+	sub	w19, w19, w1
+	str	x23, [sp, 48]
+	lsr	w2, w0, w1
+	adrp	x1, .LANCHOR67
+	mov	w23, 1
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	lsl	w19, w23, w19
+	sub	w19, w19, #1
+	adrp	x20, .LANCHOR63
+	and	w19, w19, w2
+	add	x21, x20, :lo12:.LANCHOR63
+	and	w22, w2, 65535
+	adrp	x0, .LC45
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC45
+	udiv	w19, w19, w1
+	ldr	w1, [x21, 328]
+	and	w19, w19, 65535
+	bl	printf
+	mov	w1, w23
+	mov	w2, 0
+	mov	w0, w19
+	bl	gc_add_sblk
+	ldr	w0, [x21, 328]
+	mov	w1, 0
+.L640:
+	cmp	w1, w0
+	bcc	.L642
+	cmp	w0, 5
+	bhi	.L641
+	add	x20, x20, :lo12:.LANCHOR63
+	add	w1, w0, 1
+	str	w1, [x20, 328]
+	add	x20, x20, x0, uxtw 1
+	strh	w22, [x20, 332]
+.L641:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L642:
+	add	x2, x21, x1, sxtw 1
+	ldrh	w2, [x2, 332]
+	cmp	w2, w22
+	beq	.L641
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L640
+	.size	gc_mark_bad_ppa, .-gc_mark_bad_ppa
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR68
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR66]
+	ldr	x1, [x1, #:lo12:.LANCHOR68]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3424,18 +3490,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR67
+	adrp	x22, .LANCHOR69
 	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR67
+	add	x22, x22, :lo12:.LANCHOR69
 	adrp	x23, .LANCHOR50
 	add	x21, x23, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L641:
+.L646:
 	ldrb	w0, [x22]
 	cmp	w0, 255
-	bne	.L654
+	bne	.L659
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3443,7 +3509,7 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L654:
+.L659:
 	sxtw	x26, w0
 	add	x1, x23, :lo12:.LANCHOR50
 	lsl	x3, x26, 6
@@ -3452,116 +3518,116 @@ gc_write_completed:
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w24, [x2, 48]
-	cbz	w1, .L642
+	cbz	w1, .L647
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 324]
 	strh	w3, [x0, 320]
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	bl	printf
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 625
-	add	x1, x1, :lo12:.LANCHOR68
+	mov	w2, 673
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L642:
-	adrp	x25, .LANCHOR69
-	ldrb	w0, [x25, #:lo12:.LANCHOR69]
+.L647:
+	adrp	x25, .LANCHOR71
+	ldrb	w0, [x25, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L643
+	bne	.L648
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w19, [x0, 89]
 	add	w19, w19, w19, lsl 1
 	and	w19, w19, 1023
-.L644:
+.L649:
 	adrp	x0, .LANCHOR14
-	adrp	x28, .LANCHOR72
+	adrp	x28, .LANCHOR74
 	and	x20, x24, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L645
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	tbz	x0, 8, .L650
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	add	x0, x21, x26, lsl 6
 	mov	w3, w24
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC45
+	adrp	x0, .LC47
 	ldrb	w4, [x1, x20]
-	add	x0, x0, :lo12:.LC45
+	add	x0, x0, :lo12:.LC47
 	mov	w1, w24
 	bl	printf
-.L645:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+.L650:
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	add	x0, x21, x26, lsl 6
 	mov	x27, x20
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x20]
 	cmp	w1, w0
-	beq	.L646
-	adrp	x1, .LANCHOR68
+	beq	.L651
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 634
-	add	x1, x1, :lo12:.LANCHOR68
+	mov	w2, 682
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L646:
+.L651:
 	add	x0, x21, x26, lsl 6
 	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L647
-	ldrb	w0, [x25, #:lo12:.LANCHOR69]
+	beq	.L652
+	ldrb	w0, [x25, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L647
+	bne	.L652
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L652
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L653
 	adrp	x0, .LANCHOR73
 	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L647
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L648
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L647
-.L648:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	cbnz	w0, .L652
+.L653:
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	mov	x0, 0
 	add	x20, x1, x20
-.L649:
+.L654:
 	cmp	w19, w0, uxth
-	bls	.L641
+	bls	.L646
 	ldrb	w1, [x20, x0]
 	add	x0, x0, 1
 	add	x1, x21, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L649
-.L643:
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L656
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbz	w0, .L656
+	b	.L654
+.L648:
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L661
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L661
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w19, [x0, 89]
 	ubfiz	w19, w19, 1, 8
-	b	.L644
-.L656:
+	b	.L649
+.L661:
 	mov	w19, 1
-	b	.L644
-.L647:
+	b	.L649
+.L652:
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	add	x19, x20, x19, uxth
 	mov	x20, x0
 	strh	w24, [x0, 316]
 	mov	w24, -1
-.L650:
+.L655:
 	cmp	x19, x27
-	beq	.L641
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	beq	.L646
+	ldr	x1, [x28, #:lo12:.LANCHOR74]
 	ldrb	w0, [x1, x27]
 	strb	w24, [x1, x27]
 	add	x27, x27, 1
@@ -3574,7 +3640,7 @@ gc_write_completed:
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
-	b	.L650
+	b	.L655
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3583,47 +3649,47 @@ gc_write_completed:
 gc_get_src_blk:
 	adrp	x0, .LANCHOR10
 	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR74
-	ldrb	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR76
+	ldrb	w3, [x0, #:lo12:.LANCHOR76]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L671
+	cbz	w0, .L676
 	add	x1, x2, 392
 	mov	w4, 1
-.L672:
+.L677:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L676:
+.L681:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L674
+	beq	.L679
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L675
+	cbz	w4, .L680
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L671:
+.L676:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L677
+	cbz	w0, .L682
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L672
-.L675:
+	b	.L677
+.L680:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L674:
+.L679:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L676
+	bne	.L681
 	ret
-.L677:
+.L682:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3639,53 +3705,53 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L686
+	cbz	w1, .L691
 	adrp	x1, .LANCHOR52
 	ldrb	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, 1
-	bhi	.L686
+	bhi	.L691
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	adrp	x21, .LANCHOR72
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR78
+	adrp	x0, .LANCHOR77
+	adrp	x21, .LANCHOR74
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldr	x4, [x21, #:lo12:.LANCHOR72]
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	ldr	x4, [x21, #:lo12:.LANCHOR74]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
-.L681:
-	cmp	w19, w1
-	bcc	.L684
 .L686:
+	cmp	w19, w1
+	bcc	.L689
+.L691:
 	mov	w0, 0
-	b	.L679
-.L684:
+	b	.L684
+.L689:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L682
+	beq	.L687
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L682
+	cbnz	w3, .L687
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L683
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	tbz	x0, 8, .L688
+	ldr	x0, [x21, #:lo12:.LANCHOR74]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L683:
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
+.L688:
+	ldr	x0, [x21, #:lo12:.LANCHOR74]
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
 	strb	w1, [x0, x22]
@@ -3693,32 +3759,32 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L679:
+.L684:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L682:
+.L687:
 	add	w19, w19, 1
-	b	.L681
+	b	.L686
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR77
+	adrp	x2, .LANCHOR79
 	adrp	x1, .LANCHOR63
 	add	x0, x1, :lo12:.LANCHOR63
-	ldrh	w6, [x2, #:lo12:.LANCHOR77]
+	ldrh	w6, [x2, #:lo12:.LANCHOR79]
 	adrp	x2, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	ldrb	w5, [x0, 7]
 	ldrb	w4, [x2, #:lo12:.LANCHOR52]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3729,21 +3795,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L696
+	bne	.L701
 	mov	w1, w0
-	adrp	x0, .LANCHOR78
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
-.L698:
+	adrp	x0, .LANCHOR80
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
+.L703:
 	b	_list_get_gc_head_node.isra.2
-.L696:
+.L701:
 	cmp	w1, 2
-	bne	.L697
+	bne	.L702
 	b	zftl_get_gc_node.part.9
-.L697:
+.L702:
 	mov	w1, w0
-	adrp	x0, .LANCHOR79
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
-	b	.L698
+	adrp	x0, .LANCHOR81
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	b	.L703
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3764,9 +3830,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L700
+	cbz	w19, .L705
 	mov	w0, w19
-.L699:
+.L704:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3774,72 +3840,72 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L700:
+.L705:
 	and	w20, w2, 255
-	cbnz	w21, .L702
-	adrp	x24, .LANCHOR80
+	cbnz	w21, .L707
+	adrp	x24, .LANCHOR82
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC48
+	adrp	x27, .LC50
 	and	w22, w20, 65535
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC48
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	add	x27, x27, :lo12:.LC50
+	strh	wzr, [x24, #:lo12:.LANCHOR82]
 	mov	w23, 0
 	mov	w25, 0
-.L703:
+.L708:
 	cmp	w25, w22
-	bcs	.L708
-	ldrh	w6, [x24, #:lo12:.LANCHOR80]
-	add	x7, x24, :lo12:.LANCHOR80
+	bcs	.L713
+	ldrh	w6, [x24, #:lo12:.LANCHOR82]
+	add	x7, x24, :lo12:.LANCHOR82
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR80]
+	strh	w2, [x24, #:lo12:.LANCHOR82]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L704
+	beq	.L709
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L705
+	tbz	x0, 8, .L710
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L705:
+.L710:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
 	adrp	x0, .LANCHOR62
 	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bcs	.L706
+	bcs	.L711
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L707
+	cbz	w0, .L712
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L707
-.L708:
+	bcs	.L712
+.L713:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L710
-	adrp	x25, .LANCHOR82
-	adrp	x24, .LANCHOR81
-	add	x27, x25, :lo12:.LANCHOR82
-	add	x24, x24, :lo12:.LANCHOR81
+	tbz	x0, 1, .L715
+	adrp	x25, .LANCHOR84
+	adrp	x24, .LANCHOR83
+	add	x27, x25, :lo12:.LANCHOR84
+	add	x24, x24, :lo12:.LANCHOR83
 	mov	w28, 0
 	mov	w26, 65535
-.L711:
+.L716:
 	cmp	w28, w22
-	beq	.L715
+	beq	.L720
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3848,219 +3914,219 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L712
+	beq	.L717
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L712
+	bcs	.L717
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L714
+	cbz	w0, .L719
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L714
-.L715:
+	bcs	.L719
+.L720:
 	cmp	w23, w22
-	adrp	x0, .LANCHOR83
-	bcs	.L717
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x3, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	ldrh	w2, [x25, #:lo12:.LANCHOR82]
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR85
+	bcs	.L722
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x3, .LANCHOR78
+	adrp	x0, .LANCHOR77
+	ldrh	w2, [x25, #:lo12:.LANCHOR84]
+	ldrb	w3, [x3, #:lo12:.LANCHOR78]
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L710
+	bge	.L715
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR82]
-.L710:
+	strh	w1, [x25, #:lo12:.LANCHOR84]
+.L715:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L718
+	tbz	x0, 0, .L723
 	cmp	w23, w22
-	bcs	.L718
-	adrp	x24, .LANCHOR84
-	add	x24, x24, :lo12:.LANCHOR84
+	bcs	.L723
+	adrp	x24, .LANCHOR86
+	add	x24, x24, :lo12:.LANCHOR86
 	mov	w25, 65535
-.L723:
+.L728:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L719
+	beq	.L724
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L720
+	cbz	w0, .L725
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L720
-.L721:
-	adrp	x0, .LANCHOR83
+	bhi	.L725
+.L726:
+	adrp	x0, .LANCHOR85
 	adrp	x1, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	ldrh	w2, [x1, #:lo12:.LANCHOR62]
 	cmp	w2, w0, lsr 1
-	bls	.L718
+	bls	.L723
 	sub	w0, w2, w0, lsr 3
-	b	.L798
-.L706:
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	b	.L708
-.L704:
+	b	.L803
+.L711:
+	strh	wzr, [x24, #:lo12:.LANCHOR82]
+	b	.L713
+.L709:
 	strh	wzr, [x7]
-	b	.L708
-.L707:
+	b	.L713
+.L712:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L703
-.L712:
+	b	.L708
+.L717:
 	strh	wzr, [x24]
-	b	.L715
-.L714:
+	b	.L720
+.L719:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L711
-.L717:
-	ldrh	w1, [x25, #:lo12:.LANCHOR82]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	b	.L716
+.L722:
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bls	.L710
+	bls	.L715
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR82]
-	b	.L710
-.L719:
+	strh	w0, [x25, #:lo12:.LANCHOR84]
+	b	.L715
+.L724:
 	strh	wzr, [x24]
-.L722:
+.L727:
 	cmp	w23, w22
-	bcs	.L721
+	bcs	.L726
 	adrp	x1, .LANCHOR62
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR85
 	ldrh	w2, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w2, w0
-	bcs	.L718
+	bcs	.L723
 	add	w0, w2, w0, lsr 3
-.L798:
+.L803:
 	strh	w0, [x1, #:lo12:.LANCHOR62]
-.L718:
+.L723:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L745
+	tbz	x0, 8, .L750
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC49
+	adrp	x0, .LC51
 	mov	w4, w20
 	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC49
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-.L745:
+.L750:
 	mov	w0, w23
-	b	.L699
-.L720:
+	b	.L704
+.L725:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L723
-	b	.L722
-.L702:
+	bne	.L728
+	b	.L727
+.L707:
 	adrp	x0, .LANCHOR63+318
 	strh	wzr, [x0, #:lo12:.LANCHOR63+318]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
 	ldr	w0, [x29, 112]
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L748
-	adrp	x1, .LANCHOR87
-	adrp	x25, .LANCHOR86
+	tbz	x0, 0, .L753
+	adrp	x1, .LANCHOR89
+	adrp	x25, .LANCHOR88
 	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR88
-	ldrh	w0, [x25, #:lo12:.LANCHOR86]
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	adrp	x26, .LANCHOR90
+	ldrh	w0, [x25, #:lo12:.LANCHOR88]
+	ldrh	w2, [x1, #:lo12:.LANCHOR89]
 	cmp	w0, w2, lsr 2
-	bcc	.L725
-	ldrh	w1, [x26, #:lo12:.LANCHOR88]
+	bcc	.L730
+	ldrh	w1, [x26, #:lo12:.LANCHOR90]
 	cmp	w1, w0
-	bls	.L749
-.L725:
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
-	adrp	x22, .LANCHOR84
+	bls	.L754
+.L730:
+	ldrh	w0, [x26, #:lo12:.LANCHOR90]
+	adrp	x22, .LANCHOR86
 	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR84]
+	strh	w0, [x22, #:lo12:.LANCHOR86]
 	mov	w0, 0
 	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L751
+	beq	.L756
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR85
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L751
-	strh	wzr, [x22, #:lo12:.LANCHOR84]
+	bcs	.L756
+	strh	wzr, [x22, #:lo12:.LANCHOR86]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L727:
-	add	x22, x22, :lo12:.LANCHOR84
+.L732:
+	add	x22, x22, :lo12:.LANCHOR86
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L729:
+.L734:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L726
+	beq	.L731
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L728
+	cbz	w0, .L733
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L726
-.L728:
+	bcs	.L731
+.L733:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L729
-.L726:
+	bne	.L734
+.L731:
 	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR86]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x25, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w1, w0, lsr 3
-	bhi	.L746
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	bhi	.L751
+	ldrh	w0, [x26, #:lo12:.LANCHOR90]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L724
-.L746:
-	adrp	x24, .LANCHOR80
+	ble	.L729
+.L751:
+	adrp	x24, .LANCHOR82
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	add	x24, x24, :lo12:.LANCHOR80
-.L731:
+	strh	wzr, [x24, #:lo12:.LANCHOR82]
+	add	x24, x24, :lo12:.LANCHOR82
+.L736:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -4068,31 +4134,31 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L724
+	beq	.L729
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L730
+	cbz	w0, .L735
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L724
-.L730:
+	bcs	.L729
+.L735:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L731
-.L724:
+	bne	.L736
+.L729:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L732
-	adrp	x24, .LANCHOR81
-	adrp	x28, .LANCHOR89
-	adrp	x25, .LANCHOR76
-	add	x26, x24, :lo12:.LANCHOR81
-	add	x27, x28, :lo12:.LANCHOR89
-	add	x25, x25, :lo12:.LANCHOR76
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	tbz	x0, 1, .L737
+	adrp	x24, .LANCHOR83
+	adrp	x28, .LANCHOR91
+	adrp	x25, .LANCHOR78
+	add	x26, x24, :lo12:.LANCHOR83
+	add	x27, x28, :lo12:.LANCHOR91
+	add	x25, x25, :lo12:.LANCHOR78
+	strh	wzr, [x24, #:lo12:.LANCHOR83]
 	mov	w22, 64
-.L737:
+.L742:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -4102,159 +4168,159 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L733
+	beq	.L738
 	cmp	w20, 1
-	bne	.L734
-	adrp	x3, .LANCHOR75
+	bne	.L739
+	adrp	x3, .LANCHOR77
 	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrh	w3, [x3, #:lo12:.LANCHOR77]
 	mul	w3, w2, w3
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR85
+	ldrh	w2, [x2, #:lo12:.LANCHOR85]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L734:
+.L739:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L735
+	bcs	.L740
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L736
+	cbz	w0, .L741
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L736
-.L733:
+	bcc	.L741
+.L738:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	adrp	x3, .LANCHOR76
-	bcc	.L738
-	cbnz	w19, .L739
-	adrp	x1, .LANCHOR90
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR85
+	adrp	x3, .LANCHOR78
+	bcc	.L743
+	cbnz	w19, .L744
+	adrp	x1, .LANCHOR92
+	ldrh	w2, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	bls	.L739
-.L738:
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR75
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldrh	w1, [x28, #:lo12:.LANCHOR89]
+	bls	.L744
+.L743:
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR77
+	ldrb	w3, [x3, #:lo12:.LANCHOR78]
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	ldrh	w1, [x28, #:lo12:.LANCHOR91]
 	lsr	w2, w2, 3
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L732
+	bge	.L737
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR89]
-.L732:
+	strh	w1, [x28, #:lo12:.LANCHOR91]
+.L737:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L718
-	adrp	x25, .LANCHOR80
-	adrp	x22, .LANCHOR92
-	adrp	x26, .LANCHOR87
-	adrp	x27, .LANCHOR86
-	add	x28, x22, :lo12:.LANCHOR92
-	add	x26, x26, :lo12:.LANCHOR87
-	add	x27, x27, :lo12:.LANCHOR86
-	strh	wzr, [x25, #:lo12:.LANCHOR80]
+	cbz	w0, .L723
+	adrp	x25, .LANCHOR82
+	adrp	x22, .LANCHOR94
+	adrp	x26, .LANCHOR89
+	adrp	x27, .LANCHOR88
+	add	x28, x22, :lo12:.LANCHOR94
+	add	x26, x26, :lo12:.LANCHOR89
+	add	x27, x27, :lo12:.LANCHOR88
+	strh	wzr, [x25, #:lo12:.LANCHOR82]
 	mov	w24, 64
-.L743:
-	ldrh	w6, [x25, #:lo12:.LANCHOR80]
+.L748:
+	ldrh	w6, [x25, #:lo12:.LANCHOR82]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR80]
+	strh	w6, [x25, #:lo12:.LANCHOR82]
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L740
+	beq	.L745
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L741
+	bls	.L746
 	cmp	w1, 2
-	bls	.L741
+	bls	.L746
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L740
-.L741:
+	bls	.L745
+.L746:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L742
+	cbz	w0, .L747
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L740
-.L742:
+	bcs	.L745
+.L747:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L743
-.L740:
+	bne	.L748
+.L745:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	bcs	.L744
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrh	w1, [x22, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR85
+	bcs	.L749
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrh	w1, [x22, #:lo12:.LANCHOR94]
 	cmp	w1, w0, lsr 1
-	bls	.L718
+	bls	.L723
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR92]
-	b	.L718
-.L751:
+	strh	w0, [x22, #:lo12:.LANCHOR94]
+	b	.L723
+.L756:
 	mov	w23, 0
-	b	.L727
-.L748:
+	b	.L732
+.L753:
 	mov	w23, 0
-	b	.L724
-.L735:
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
-	b	.L733
-.L736:
+	b	.L729
+.L740:
+	strh	wzr, [x24, #:lo12:.LANCHOR83]
+	b	.L738
+.L741:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L737
-	b	.L733
-.L739:
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrb	w1, [x3, #:lo12:.LANCHOR76]
-	ldrh	w2, [x28, #:lo12:.LANCHOR89]
+	bne	.L742
+	b	.L738
+.L744:
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
+	ldrb	w1, [x3, #:lo12:.LANCHOR78]
+	ldrh	w2, [x28, #:lo12:.LANCHOR91]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L732
+	ble	.L737
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR89]
-	b	.L732
-.L744:
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrh	w2, [x22, #:lo12:.LANCHOR92]
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	strh	w0, [x28, #:lo12:.LANCHOR91]
+	b	.L737
+.L749:
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR78
+	ldrh	w2, [x22, #:lo12:.LANCHOR94]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L718
+	bge	.L723
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR92]
-	b	.L718
-.L749:
+	strh	w1, [x22, #:lo12:.LANCHOR94]
+	b	.L723
+.L754:
 	mov	w23, 0
-	b	.L726
+	b	.L731
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4267,27 +4333,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L800
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L802:
-	b	_insert_free_list
-.L800:
-	cmp	w0, 16
-	bne	.L801
+	bne	.L805
 	adrp	x2, .LANCHOR95
 	adrp	x0, .LANCHOR96
 	add	x2, x2, :lo12:.LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR96
-	b	.L802
-.L801:
+.L807:
+	b	_insert_free_list
+.L805:
+	cmp	w0, 16
+	bne	.L806
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L802
+	b	.L807
+.L806:
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR100
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L807
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4301,30 +4367,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L804
-	adrp	x2, .LANCHOR88
+	bne	.L809
+	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
-.L807:
+.L812:
 	b	_insert_data_list
-.L804:
+.L809:
 	cmp	w2, 96
-	bne	.L805
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L807
-.L805:
+	bne	.L810
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L812
+.L810:
 	cmp	w2, 160
-	bne	.L803
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L807
-.L803:
+	bne	.L808
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L812
+.L808:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4343,55 +4409,55 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L809
-	cbnz	w21, .L809
+	beq	.L814
+	cbnz	w21, .L814
 	mov	w1, w19
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L810:
+.L815:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L809:
-	adrp	x2, .LANCHOR95
-	adrp	x20, .LANCHOR97
-	ldrh	w0, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x20, #:lo12:.LANCHOR97]
+.L814:
+	adrp	x2, .LANCHOR97
+	adrp	x20, .LANCHOR99
+	ldrh	w0, [x2, #:lo12:.LANCHOR97]
+	ldrh	w1, [x20, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bls	.L811
+	bls	.L816
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR98
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-.L825:
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+.L830:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L816
-	adrp	x0, .LANCHOR93
-	ldrh	w5, [x20, #:lo12:.LANCHOR97]
+	bne	.L821
+	adrp	x0, .LANCHOR95
+	ldrh	w5, [x20, #:lo12:.LANCHOR99]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LC51
-	add	x0, x0, :lo12:.LC51
+	ldrh	w4, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR96
+	ldr	x3, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-.L816:
-	cbz	w21, .L810
+.L821:
+	cbz	w21, .L815
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L810
+	tbz	x0, 8, .L815
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4405,26 +4471,26 @@ zftl_gc_get_free_sblk:
 	ldrh	w5, [x1, x0]
 	ubfx	x4, x4, 11, 8
 	mov	w1, w19
-	adrp	x0, .LC52
+	adrp	x0, .LC54
 	ubfx	x3, x2, 3, 2
 	and	w5, w5, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC52
+	add	x0, x0, :lo12:.LC54
 	bl	printf
-	b	.L810
-.L811:
-	cbnz	w21, .L814
+	b	.L815
+.L816:
+	cbnz	w21, .L819
 	lsr	w1, w1, 2
-.L815:
-	adrp	x0, .LANCHOR98
-	add	x2, x20, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L825
-.L814:
+.L820:
+	adrp	x0, .LANCHOR100
+	add	x2, x20, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L830
+.L819:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L815
+	b	.L820
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4437,99 +4503,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L827
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR97
-	ldrh	w3, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	bne	.L832
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR99
+	ldrh	w3, [x2, #:lo12:.LANCHOR97]
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w3, w1
-	bcc	.L828
-	adrp	x4, .LANCHOR93
-	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	bcc	.L833
+	adrp	x4, .LANCHOR95
+	ldrh	w4, [x4, #:lo12:.LANCHOR95]
 	cmp	w4, w3
-	bls	.L829
-	cbz	w1, .L829
-.L828:
-	add	x2, x0, :lo12:.LANCHOR97
+	bls	.L834
+	cbz	w1, .L834
+.L833:
+	add	x2, x0, :lo12:.LANCHOR99
 	lsr	w1, w1, 1
-.L848:
+.L853:
+	adrp	x0, .LANCHOR100
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L852
+.L834:
 	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L847
-.L829:
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
 	mov	w1, 0
-.L847:
+.L852:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L832
-	adrp	x0, .LANCHOR97
+	bne	.L837
+	adrp	x0, .LANCHOR99
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR93
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LC51
-	add	x0, x0, :lo12:.LC51
+	ldrh	w5, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR95
+	ldrh	w4, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR96
+	ldr	x3, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-	b	.L832
-.L827:
+	b	.L837
+.L832:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L831
+	beq	.L836
 	cmp	w20, 1
-	beq	.L831
+	beq	.L836
 	mov	w1, w19
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L832:
+.L837:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L831:
-	adrp	x2, .LANCHOR93
-	adrp	x4, .LANCHOR97
-	ldrh	w1, [x2, #:lo12:.LANCHOR93]
-	ldrh	w3, [x4, #:lo12:.LANCHOR97]
+.L836:
+	adrp	x2, .LANCHOR95
+	adrp	x4, .LANCHOR99
+	ldrh	w1, [x2, #:lo12:.LANCHOR95]
+	ldrh	w3, [x4, #:lo12:.LANCHOR99]
 	cmp	w1, w3
-	bcc	.L833
-	adrp	x5, .LANCHOR95
-	ldrh	w5, [x5, #:lo12:.LANCHOR95]
+	bcc	.L838
+	adrp	x5, .LANCHOR97
+	ldrh	w5, [x5, #:lo12:.LANCHOR97]
 	cmp	w5, w1
-	bls	.L834
-	cbz	w3, .L834
-.L833:
+	bls	.L839
+	cbz	w3, .L839
+.L838:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR97
+	add	x2, x4, :lo12:.LANCHOR99
 	mov	w1, w0
-	b	.L848
-.L834:
+	b	.L853
+.L839:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR95
 	mov	w1, w0
-	adrp	x0, .LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR94
-	b	.L847
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L852
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4543,30 +4609,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L850
-	adrp	x2, .LANCHOR88
+	bne	.L855
+	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
-.L853:
+.L858:
 	b	_list_remove_node
-.L850:
+.L855:
 	cmp	w2, 96
-	bne	.L851
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L853
-.L851:
+	bne	.L856
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L858
+.L856:
 	cmp	w2, 160
-	bne	.L849
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L853
-.L849:
+	bne	.L854
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L858
+.L854:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4580,27 +4646,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L855
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L857:
-	b	_list_remove_node
-.L855:
-	cmp	w0, 16
-	bne	.L856
+	bne	.L860
 	adrp	x2, .LANCHOR95
 	adrp	x0, .LANCHOR96
 	add	x2, x2, :lo12:.LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR96
-	b	.L857
-.L856:
+.L862:
+	b	_list_remove_node
+.L860:
+	cmp	w0, 16
+	bne	.L861
 	adrp	x2, .LANCHOR97
 	adrp	x0, .LANCHOR98
 	add	x2, x2, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
-	b	.L857
+	b	.L862
+.L861:
+	adrp	x2, .LANCHOR99
+	adrp	x0, .LANCHOR100
+	add	x2, x2, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L862
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4614,30 +4680,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L859
-	adrp	x2, .LANCHOR88
+	bne	.L864
+	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR88
+	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
-.L862:
+.L867:
 	b	_list_update_data_list
-.L859:
+.L864:
 	cmp	w2, 96
-	bne	.L860
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L862
-.L860:
+	bne	.L865
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L867
+.L865:
 	cmp	w2, 160
-	bne	.L858
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L862
-.L858:
+	bne	.L863
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L867
+.L863:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4653,21 +4719,21 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC54
+	adrp	x0, .LC56
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC56
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L863
+	cbz	x19, .L868
 	mov	x24, -6148914691236517206
-	adrp	x22, .LC55
-	adrp	x21, .LANCHOR99
-	add	x22, x22, :lo12:.LC55
-	add	x21, x21, :lo12:.LANCHOR99
+	adrp	x22, .LC57
+	adrp	x21, .LANCHOR101
+	add	x22, x22, :lo12:.LC57
+	add	x21, x21, :lo12:.LANCHOR101
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L867:
+.L872:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -4700,7 +4766,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L863
+	beq	.L868
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -4708,8 +4774,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L867
-.L863:
+	bcs	.L872
+.L868:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4723,15 +4789,10 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR94
-	bl	print_list_info
 	adrp	x1, .LANCHOR95
 	adrp	x0, .LANCHOR96
 	add	x1, x1, :lo12:.LANCHOR95
+	add	x29, sp, 0
 	add	x0, x0, :lo12:.LANCHOR96
 	bl	print_list_info
 	adrp	x1, .LANCHOR97
@@ -4739,21 +4800,26 @@ dump_all_list_info:
 	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LANCHOR98
 	bl	print_list_info
-	adrp	x1, .LANCHOR88
+	adrp	x1, .LANCHOR99
+	adrp	x0, .LANCHOR100
+	add	x1, x1, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR100
+	bl	print_list_info
+	adrp	x1, .LANCHOR90
 	adrp	x0, .LANCHOR12
-	add	x1, x1, :lo12:.LANCHOR88
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
+	adrp	x1, .LANCHOR88
+	adrp	x0, .LANCHOR81
+	add	x1, x1, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR81
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x1, x1, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LANCHOR80
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR80
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -4761,40 +4827,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L872
+	bls	.L877
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L872:
+.L877:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L873
+	bls	.L878
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L873:
+.L878:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L874
+	bls	.L879
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L874:
+.L879:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L871
+	bls	.L876
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L871:
+.L876:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4804,35 +4870,35 @@ ftl_tmp_into_update:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR102
-	add	x7, x7, :lo12:.LANCHOR102
+	adrp	x7, .LANCHOR66
+	add	x7, x7, :lo12:.LANCHOR66
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR76
-	ldrb	w10, [x2, #:lo12:.LANCHOR76]
-	adrp	x2, .LANCHOR101
-	ldrb	w6, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR78
+	ldrb	w10, [x2, #:lo12:.LANCHOR78]
+	adrp	x2, .LANCHOR67
+	ldrb	w6, [x2, #:lo12:.LANCHOR67]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L877:
+.L882:
 	cmp	w3, w10
-	blt	.L881
+	blt	.L886
 	sxtw	x2, w0
 	mov	w3, -1
-.L882:
+.L887:
 	cmp	w10, w2
-	bgt	.L883
+	bgt	.L888
 	ret
-.L881:
+.L886:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L878
+	tbnz	x2, 0, .L883
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4841,379 +4907,62 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L879
-.L884:
+	bhi	.L884
+.L889:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L878:
+.L883:
 	add	w3, w3, 1
-	b	.L877
-.L879:
+	b	.L882
+.L884:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L884
-.L883:
+	b	.L889
+.L888:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L882
+	b	.L887
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
-	.section	.text.ftl_free_sblk,"ax",@progbits
+	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
-	.global	ftl_free_sblk
-	.type	ftl_free_sblk, %function
-ftl_free_sblk:
-	stp	x29, x30, [sp, -64]!
+	.global	ftl_erase_phy_blk
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
+	stp	x29, x30, [sp, -48]!
+	and	w0, w0, 65535
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR7
-	str	x23, [sp, 48]
-	and	x23, x0, 65535
-	ldr	x4, [x22, #:lo12:.LANCHOR7]
-	lsl	x21, x23, 2
+	mov	w21, w1
+	adrp	x1, .LANCHOR66
 	stp	x19, x20, [sp, 16]
-	mov	x19, x23
-	add	x20, x4, x21
-	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L887
-	adrp	x1, .LANCHOR100
-	ldrh	w2, [x4, x21]
-	adrp	x8, .LANCHOR103
-	ldr	x7, [x1, #:lo12:.LANCHOR100]
-	and	w3, w2, 2047
-	ldr	w2, [x4, x21]
-	ldrh	w8, [x8, #:lo12:.LANCHOR103]
-	ldrh	w1, [x7, 74]
-	ubfx	x6, x2, 11, 8
-	adrp	x2, .LANCHOR8
-	add	w1, w3, w1
-	ldrh	w2, [x2, #:lo12:.LANCHOR8]
-	and	w5, w1, 65535
-	ldrh	w1, [x7, 72]
-	add	w1, w6, w1
-	udiv	w7, w5, w2
-	and	w1, w1, 65535
-	add	w7, w7, w1
-	cmp	w7, w8
-	ble	.L888
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L889
-.L904:
-	mov	w1, 2
-	bfi	w0, w1, 3, 2
-.L902:
-	strb	w0, [x20, 2]
-.L890:
-	ldrb	w0, [x20, 2]
-	ands	w0, w0, 24
-	bne	.L894
-	mul	w2, w6, w2
-	ldrh	w0, [x4, x21]
-	add	w2, w2, w2, lsl 1
-	add	w2, w3, w2, lsr 2
-	ubfx	x2, x2, 2, 9
-	bfi	w0, w2, 0, 11
-	strh	w0, [x4, x21]
-.L887:
-	mov	w0, w19
-	bl	zftl_remove_data_node
-	ldr	x0, [x22, #:lo12:.LANCHOR7]
-	add	x21, x0, x21
-	ldrb	w0, [x21, 2]
-	and	w0, w0, 31
-	strb	w0, [x21, 2]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x23, lsl 1]
-	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L896
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrh	w1, [x0, 584]
-	cmp	w1, w19
-	bne	.L897
-	mov	w1, -1
-	ldrh	w2, [x0, 588]
-	strh	w1, [x0, 584]
-	mov	w1, 65535
-	cmp	w2, w1
-	bne	.L896
-	strh	w19, [x0, 588]
-	mov	w1, w19
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
-.L903:
-	ldp	x19, x20, [sp, 16]
+	mov	w19, 21
+	adrp	x22, .LANCHOR103
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	sub	w1, w19, w1
+	mov	w19, 1
+	lsl	w19, w19, w1
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	asr	w20, w0, w1
+	adrp	x0, .LANCHOR72
+	sxth	w19, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L891
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L891
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+	cmp	w21, 0
+	cset	w1, eq
+	mov	w0, w20
+	mul	w2, w2, w19
+	bl	flash_erase_block_en
+.L891:
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+	mov	w1, w21
+	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	b	printf
-.L889:
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L904
-.L893:
-	and	w0, w0, -25
-	b	.L902
-.L888:
-	madd	w1, w2, w1, w5
-	adrp	x5, .LANCHOR105
-	ldrh	w5, [x5, #:lo12:.LANCHOR105]
-	cmp	w1, w5
-	ble	.L890
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
-	add	w1, w1, w7
-	cmp	w5, w1
-	bge	.L893
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	w5, w5, 7
-	add	w1, w1, w7
-	cmp	w5, w1
-	blt	.L893
-	b	.L904
-.L894:
-	cmp	w0, 16
-	bne	.L887
-	sdiv	w2, w3, w2
-	ldr	w0, [x4, x21]
-	add	w2, w2, w2, lsl 1
-	add	w2, w6, w2, lsr 2
-	ubfx	x2, x2, 2, 6
-	bfi	w0, w2, 11, 8
-	str	w0, [x4, x21]
-	b	.L887
-.L897:
-	ldrh	w1, [x0, 586]
-	cmp	w1, w19
-	bne	.L896
-	mov	w1, -1
-	ldrh	w2, [x0, 590]
-	strh	w1, [x0, 586]
-	mov	w1, 65535
-	cmp	w2, w1
-	bne	.L896
-	strh	w19, [x0, 590]
-	mov	w1, w19
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
-	b	.L903
-.L896:
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	b	zftl_insert_free_list
-	.size	ftl_free_sblk, .-ftl_free_sblk
-	.section	.text.gc_free_src_blk,"ax",@progbits
-	.align	2
-	.global	gc_free_src_blk
-	.type	gc_free_src_blk, %function
-gc_free_src_blk:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR63
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC58
-	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR63
-	mov	x24, x23
-	add	x22, x22, :lo12:.LC58
-	stp	x19, x20, [sp, 16]
-	mov	w20, 0
-	stp	x25, x26, [sp, 64]
-.L906:
-	ldrh	w0, [x21, 56]
-	cmp	w0, w20
-	bhi	.L920
-	strh	wzr, [x21, 56]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L920:
-	add	x0, x21, x20, sxtw 1
-	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR9]
-	mov	x19, x25
-	lsl	x26, x25, 1
-	ldrh	w2, [x0, x26]
-	cbz	w2, .L907
-	mov	w1, w25
-	mov	x0, x22
-	bl	printf
-.L907:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x26]
-	adrp	x0, .LANCHOR7
-	ldr	x0, [x0, #:lo12:.LANCHOR7]
-	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L908
-	ldrb	w2, [x25, 2]
-	adrp	x0, .LC59
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC59
-	ubfx	x2, x2, 5, 3
-	bl	printf
-.L908:
-	ldrb	w0, [x25, 2]
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L909
-	tst	w0, 192
-	bne	.L910
-.L909:
-	adrp	x1, .LANCHOR106
-	adrp	x0, .LC0
-	mov	w2, 884
-	add	x1, x1, :lo12:.LANCHOR106
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L910:
-	mov	w0, w19
-	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrh	w2, [x0, 124]
-	cbz	w2, .L911
-	add	x3, x0, 392
-	mov	w1, 0
-.L913:
-	ldrh	w4, [x3]
-	cmp	w4, w19
-	bne	.L912
-	add	x1, x0, x1, sxtw 1
-	mov	w3, -1
-	sub	w2, w2, #1
-	strh	w3, [x1, 392]
-	strh	w2, [x0, 124]
-.L911:
-	ldrh	w2, [x0, 120]
-	cbz	w2, .L914
-	add	x3, x0, 136
-	mov	w1, 0
-.L916:
-	ldrh	w4, [x3]
-	cmp	w4, w19
-	bne	.L915
-	add	x1, x0, x1, sxtw 1
-	mov	w3, -1
-	sub	w2, w2, #1
-	strh	w3, [x1, 136]
-	strh	w2, [x0, 120]
-.L914:
-	ldrh	w2, [x0, 122]
-	cbz	w2, .L917
-	add	x3, x0, 264
-	mov	w1, 0
-.L919:
-	ldrh	w4, [x3]
-	cmp	w4, w19
-	bne	.L918
-	add	x1, x0, x1, sxtw 1
-	mov	w3, -1
-	sub	w2, w2, #1
-	strh	w3, [x1, 264]
-	strh	w2, [x0, 122]
-.L917:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L906
-.L912:
-	add	w1, w1, 1
-	add	x3, x3, 2
-	cmp	w1, 64
-	bne	.L913
-	b	.L911
-.L915:
-	add	w1, w1, 1
-	add	x3, x3, 2
-	cmp	w1, 64
-	bne	.L916
-	b	.L914
-.L918:
-	add	w1, w1, 1
-	add	x3, x3, 2
-	cmp	w1, 64
-	bne	.L919
-	b	.L917
-	.size	gc_free_src_blk, .-gc_free_src_blk
-	.section	.text.ftl_erase_phy_blk,"ax",@progbits
-	.align	2
-	.global	ftl_erase_phy_blk
-	.type	ftl_erase_phy_blk, %function
-ftl_erase_phy_blk:
-	stp	x29, x30, [sp, -48]!
-	and	w0, w0, 65535
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w1
-	adrp	x1, .LANCHOR102
-	stp	x19, x20, [sp, 16]
-	mov	w19, 21
-	adrp	x22, .LANCHOR107
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
-	sub	w1, w19, w1
-	mov	w19, 1
-	lsl	w19, w19, w1
-	sub	w19, w19, #1
-	and	w19, w19, w0
-	asr	w20, w0, w1
-	adrp	x0, .LANCHOR70
-	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L944
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L944
-	ldrh	w2, [x22, #:lo12:.LANCHOR107]
-	cmp	w21, 0
-	cset	w1, eq
-	mov	w0, w20
-	mul	w2, w2, w19
-	bl	flash_erase_block_en
-.L944:
-	ldrh	w2, [x22, #:lo12:.LANCHOR107]
-	mov	w1, w21
-	mov	w0, w20
-	ldp	x21, x22, [sp, 32]
-	mul	w2, w2, w19
+	mul	w2, w2, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	flash_erase_block_en
@@ -5230,56 +4979,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
-	adrp	x25, .LANCHOR108
+	adrp	x25, .LANCHOR104
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR101
+	adrp	x24, .LANCHOR67
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR108
+	add	x25, x25, :lo12:.LANCHOR104
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR101
+	add	x24, x24, :lo12:.LANCHOR67
 	add	x27, x29, 112
 	mov	w19, 0
-.L950:
+.L897:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L961
+	bge	.L908
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR103
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR107]
+	ldrh	w3, [x0, #:lo12:.LANCHOR103]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L962
-.L952:
+	b	.L909
+.L899:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L951
+	tbnz	x2, 0, .L898
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L951:
+.L898:
 	add	w0, w0, 1
-.L962:
+.L909:
 	cmp	w0, w1
-	blt	.L952
+	blt	.L899
 	cmp	w1, 4
-	bne	.L953
+	bne	.L900
 	mov	x3, 0
-.L954:
+.L901:
 	cmp	w21, w3
-	bgt	.L955
-.L956:
+	bgt	.L902
+.L903:
 	add	w19, w19, 1
-	b	.L950
-.L955:
+	b	.L897
+.L902:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5287,65 +5036,65 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L954
-.L953:
+	b	.L901
+.L900:
 	cmp	w21, 2
-	bne	.L957
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L958
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L958
+	bne	.L904
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L905
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L905
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L958:
+.L905:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L956
-.L957:
+	b	.L903
+.L904:
 	cmp	w21, 1
-	bne	.L956
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L960
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L960
+	bne	.L903
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L907
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L907
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L960:
+.L907:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L956
-.L961:
-	adrp	x2, .LANCHOR100
+	b	.L903
+.L908:
+	adrp	x2, .LANCHOR102
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L963
+	cbnz	w20, .L910
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR102]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L965
+	bge	.L912
 	strh	w0, [x1, 96]
-.L965:
+.L912:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5354,7 +5103,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L963:
+.L910:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5362,15 +5111,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR102]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L965
+	bcs	.L912
 	strh	w0, [x1, 98]
-	b	.L965
+	b	.L912
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5378,44 +5127,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L975
+	bls	.L922
 	strh	wzr, [x1, 136]
-.L975:
+.L922:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L976
-	adrp	x1, .LANCHOR109
+	cbnz	w0, .L923
+	adrp	x1, .LANCHOR105
 	adrp	x0, .LC0
-	mov	w2, 1117
-	add	x1, x1, :lo12:.LANCHOR109
+	mov	w2, 1130
+	add	x1, x1, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L976:
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+.L923:
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	mov	w5, 65535
-.L979:
+.L926:
 	ldrh	w2, [x1, 136]
-.L977:
+.L924:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L978
+	ble	.L925
 	strh	wzr, [x1, 136]
-	b	.L979
-.L978:
+	b	.L926
+.L925:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L982
+	bne	.L929
 	mov	x2, x4
-	b	.L977
-.L982:
+	b	.L924
+.L929:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5436,40 +5185,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L985
+	bls	.L932
 	strh	wzr, [x1, 138]
-.L985:
+.L932:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L986
-	adrp	x1, .LANCHOR110
+	bls	.L933
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 1141
-	add	x1, x1, :lo12:.LANCHOR110
+	mov	w2, 1154
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L986:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L933:
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w4, 65535
-.L989:
+.L936:
 	ldrh	w1, [x0, 138]
-.L987:
+.L934:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L988
+	ble	.L935
 	strh	wzr, [x0, 138]
-	b	.L989
-.L988:
+	b	.L936
+.L935:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L990
+	bne	.L937
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5479,9 +5228,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L990:
+.L937:
 	mov	x1, x3
-	b	.L987
+	b	.L934
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5491,7 +5240,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L1003
+	beq	.L950
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5502,25 +5251,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L993
+	bne	.L940
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR100
-	ldr	x3, [x1, #:lo12:.LANCHOR100]
-	tbz	x0, 3, .L997
+	adrp	x1, .LANCHOR102
+	ldr	x3, [x1, #:lo12:.LANCHOR102]
+	tbz	x0, 3, .L944
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L998:
+.L945:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L1000
+	bne	.L947
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5528,44 +5277,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L993:
+.L940:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L997:
+.L944:
 	tst	w0, 24
-	bne	.L999
+	bne	.L946
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L998
-.L999:
+	b	.L945
+.L946:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L998
-.L1000:
+	b	.L945
+.L947:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L1001
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L948
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L993
-.L1001:
+	b	.L940
+.L948:
 	cmp	w0, 96
-	bne	.L993
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L940
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L993
-.L1003:
+	b	.L940
+.L950:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5575,19 +5324,19 @@ ftl_info_data_recovery:
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR10
-	adrp	x3, .LANCHOR76
+	adrp	x3, .LANCHOR78
 	and	w0, w0, 65535
 	add	x29, sp, 0
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR83
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR85
+	ldrb	w3, [x3, #:lo12:.LANCHOR78]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L1007
+	bge	.L954
 	add	x2, x2, 16
-.L1008:
+.L955:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5595,25 +5344,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1009
-	adrp	x1, .LANCHOR111
+	bne	.L956
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1580
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1593
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1009:
-	adrp	x0, .LANCHOR107
-	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+.L956:
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1007:
+.L954:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L1008
+	b	.L955
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5621,29 +5370,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR112
-	add	x1, x1, :lo12:.LANCHOR112
+	adrp	x1, .LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR108
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR113
-	ldr	x4, [x2, #:lo12:.LANCHOR113]
-	adrp	x2, .LANCHOR114
-	ldr	x5, [x2, #:lo12:.LANCHOR114]
-.L1012:
+	adrp	x2, .LANCHOR109
+	ldr	x4, [x2, #:lo12:.LANCHOR109]
+	adrp	x2, .LANCHOR110
+	ldr	x5, [x2, #:lo12:.LANCHOR110]
+.L959:
 	cmp	w1, w3
-	bne	.L1014
+	bne	.L961
 	mov	w0, -1
 	ret
-.L1014:
+.L961:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L1013
+	bne	.L960
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L1013:
+.L960:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L1012
+	b	.L959
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5657,50 +5406,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1016
-	adrp	x1, .LANCHOR115
+	bne	.L963
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1695
-	add	x1, x1, :lo12:.LANCHOR115
+	mov	w2, 1716
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1016:
-	adrp	x0, .LANCHOR83
+.L963:
+	adrp	x0, .LANCHOR85
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bne	.L1017
-	adrp	x1, .LANCHOR115
+	bne	.L964
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1696
-	add	x1, x1, :lo12:.LANCHOR115
+	mov	w2, 1717
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1017:
+.L964:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L1018
-	adrp	x1, .LANCHOR115
+	cbnz	w0, .L965
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1697
-	add	x1, x1, :lo12:.LANCHOR115
+	mov	w2, 1718
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1018:
+.L965:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR76
-	ldrb	w4, [x0, #:lo12:.LANCHOR76]
-.L1019:
+	adrp	x0, .LANCHOR78
+	ldrb	w4, [x0, #:lo12:.LANCHOR78]
+.L966:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L1021
-	adrp	x0, .LANCHOR107
+	beq	.L968
+	adrp	x0, .LANCHOR103
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR107]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5711,29 +5460,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L1015
+	bne	.L962
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L1015:
+.L962:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1021:
+.L968:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L1020
+	bne	.L967
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1020:
+.L967:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L1019
+	b	.L966
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5749,22 +5498,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L1025
-	adrp	x1, .LANCHOR116
+	bcs	.L972
+	adrp	x1, .LANCHOR112
 	adrp	x0, .LC0
-	mov	w2, 1728
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 1749
+	add	x1, x1, :lo12:.LANCHOR112
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1025:
-	adrp	x20, .LANCHOR100
+.L972:
+	adrp	x20, .LANCHOR102
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5777,18 +5526,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR117
+	adrp	x2, .LANCHOR113
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR117]
+	ldrh	w1, [x2, #:lo12:.LANCHOR113]
 	cmp	w1, 4
-	bhi	.L1028
-	cbnz	w0, .L1028
+	bhi	.L975
+	cbnz	w0, .L975
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR117]
+	strh	w1, [x2, #:lo12:.LANCHOR113]
 	ret
-.L1028:
+.L975:
 	adrp	x0, .LANCHOR6
-	strh	wzr, [x3, #:lo12:.LANCHOR117]
+	strh	wzr, [x3, #:lo12:.LANCHOR113]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
@@ -5798,37 +5547,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L1030:
+.L977:
 	cmp	w5, w1, uxth
-	bhi	.L1033
+	bhi	.L980
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR102
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR102]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L1027
+	cbz	w2, .L974
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L1027:
+.L974:
 	ret
-.L1033:
+.L980:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L1031
+	beq	.L978
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L1032
+	bne	.L979
 	add	w0, w0, w3
-.L1031:
+.L978:
 	add	x1, x1, 1
-	b	.L1030
-.L1032:
+	b	.L977
+.L979:
 	add	w2, w2, w3
-	b	.L1031
+	b	.L978
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5853,17 +5602,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1041
-	adrp	x1, .LANCHOR118
+	cbnz	w0, .L988
+	adrp	x1, .LANCHOR114
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR118]
-.L1039:
+	str	w0, [x1, #:lo12:.LANCHOR114]
+.L986:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1041:
+.L988:
 	mov	w0, 0
-	b	.L1039
+	b	.L986
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5876,57 +5625,57 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1044
+	beq	.L991
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1045
+	cbnz	w0, .L992
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x1, x0, x1, lsl 2
-	adrp	x0, .LC60
-	add	x0, x0, :lo12:.LC60
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	ldrb	w3, [x1, 2]
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1050:
+.L997:
 	mov	w0, 0
-	b	.L1043
-.L1045:
+	b	.L990
+.L992:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1044:
+.L991:
 	adrp	x20, .LANCHOR64
 	ldrh	w0, [x20, #:lo12:.LANCHOR64]
 	cmp	w19, w0
-	beq	.L1050
+	beq	.L997
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1047
+	bne	.L994
 	strh	w19, [x20, #:lo12:.LANCHOR64]
-	b	.L1050
-.L1047:
+	b	.L997
+.L994:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR115
 	cset	w0, ne
 	ldrh	w3, [x20, #:lo12:.LANCHOR64]
-	ldrh	w2, [x1, #:lo12:.LANCHOR119]
+	ldrh	w2, [x1, #:lo12:.LANCHOR115]
 	strh	w19, [x20, #:lo12:.LANCHOR64]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR119]
+	strh	w2, [x1, #:lo12:.LANCHOR115]
 	and	x2, x2, 65535
 	adrp	x1, .LANCHOR65
 	add	x1, x1, :lo12:.LANCHOR65
 	strh	w3, [x1, x2, lsl 1]
-.L1043:
+.L990:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5936,50 +5685,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR112
+	adrp	x3, .LANCHOR108
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR112
+	add	x4, x3, :lo12:.LANCHOR108
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR113
-	ldr	x8, [x4, #:lo12:.LANCHOR113]
-	adrp	x4, .LANCHOR114
-	ldr	x4, [x4, #:lo12:.LANCHOR114]
-.L1053:
+	adrp	x4, .LANCHOR109
+	ldr	x8, [x4, #:lo12:.LANCHOR109]
+	adrp	x4, .LANCHOR110
+	ldr	x4, [x4, #:lo12:.LANCHOR110]
+.L1000:
 	cmp	w6, w12
-	beq	.L1057
+	beq	.L1004
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1054
+	bne	.L1001
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1055
-	add	x6, x3, :lo12:.LANCHOR112
+	bne	.L1002
+	add	x6, x3, :lo12:.LANCHOR108
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1056:
+.L1003:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1057:
+.L1004:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR112
+	add	x3, x3, :lo12:.LANCHOR108
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1064
+	beq	.L1011
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR66
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5987,22 +5736,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1055:
+.L1002:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1056
-.L1054:
+	b	.L1003
+.L1001:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1053
-.L1064:
+	b	.L1000
+.L1011:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -6012,73 +5761,503 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR102
-	mov	w2, 21
+	adrp	x2, .LANCHOR67
+	ubfx	x1, x0, 21, 3
+	mov	w3, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR102]
+	ldrb	w5, [x2, #:lo12:.LANCHOR67]
 	stp	x19, x20, [sp, 16]
-	ubfx	x20, x0, 21, 3
-	sub	w1, w2, w3
-	mov	w2, 1
-	lsr	w0, w0, w3
-	lsl	w2, w2, w1
-	sub	w2, w2, #1
-	and	w2, w2, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
-	udiv	w2, w2, w0
+	cmp	w5, 1
+	mul	w2, w1, w5
+	and	w19, w2, 255
+	adrp	x2, .LANCHOR66
+	ldrh	w2, [x2, #:lo12:.LANCHOR66]
+	lsr	w0, w0, w2
+	sub	w2, w3, w2
+	mov	w3, 1
+	lsl	w3, w3, w2
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	and	w4, w3, 65535
+	udiv	w3, w3, w5
+	and	w20, w3, 65535
+	bls	.L1015
+	sub	w2, w5, #1
+	and	w2, w2, w4
+	add	w2, w19, w2
+	and	w19, w2, 255
+.L1015:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	and	w19, w2, 65535
-	tbz	x0, 14, .L1068
-	adrp	x0, .LC61
+	tbz	x0, 14, .L1016
+	adrp	x0, .LC59
+	and	w3, w3, 65535
 	mov	w2, w19
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC61
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L1068:
+.L1016:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
-	cmp	w0, w19
-	bls	.L1067
+	cmp	w0, w20
+	bls	.L1014
 	adrp	x0, .LANCHOR7
-	mov	w1, 1
-	lsl	w1, w1, w20
+	mov	w2, 1
+	lsl	w2, w2, w19
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
-	add	x19, x0, x19, uxth 2
-	ldrb	w0, [x19, 3]
-	orr	w1, w1, w0
-	strb	w1, [x19, 3]
-.L1067:
+	add	x20, x0, x20, uxth 2
+	ldrb	w19, [x20, 3]
+	orr	w2, w2, w19
+	strb	w2, [x20, 3]
+.L1014:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.gc_free_bad_sblk,"ax",@progbits
+	.align	2
+	.global	gc_free_bad_sblk
+	.type	gc_free_bad_sblk, %function
+gc_free_bad_sblk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR63
+	stp	x27, x28, [sp, 80]
+	and	w28, w0, 65535
+	add	x0, x24, :lo12:.LANCHOR63
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	ldr	w0, [x0, 328]
+	cbz	w0, .L1033
+	adrp	x25, .LANCHOR78
+	adrp	x27, .LANCHOR66
+	add	x25, x25, :lo12:.LANCHOR78
+	add	x22, x27, :lo12:.LANCHOR66
+	mov	w23, 0
+.L1024:
+	ldrb	w0, [x25]
+	cmp	w0, w23
+	bhi	.L1031
+.L1033:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1031:
+	adrp	x0, .LANCHOR67
+	ldrh	w3, [x27, #:lo12:.LANCHOR66]
+	mov	w2, 21
+	ldrb	w1, [x0, #:lo12:.LANCHOR67]
+	sub	w2, w2, w3
+	and	w0, w1, 65535
+	cmp	w1, 1
+	sdiv	w19, w23, w1
+	lsl	w19, w19, w2
+	madd	w19, w28, w0, w19
+	and	w19, w19, 65535
+	bls	.L1025
+	sub	w0, w0, #1
+	and	w0, w0, w23
+	add	w19, w19, w0
+	and	w19, w19, 65535
+.L1025:
+	adrp	x26, .LC60
+	add	x21, x24, :lo12:.LANCHOR63
+	add	x26, x26, :lo12:.LC60
+	mov	w20, 0
+.L1026:
+	ldr	w0, [x21, 328]
+	cmp	w20, w0
+	bcc	.L1030
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L1024
+.L1030:
+	add	x0, x21, x20, sxtw 1
+	ldrh	w0, [x0, 332]
+	cmp	w0, w19
+	bne	.L1027
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+	ldrh	w0, [x22]
+	lsl	w0, w19, w0
+	bl	ftl_mask_bad_block
+	ldr	w1, [x21, 328]
+	mov	w0, w20
+.L1028:
+	cmp	w0, w1
+	bcc	.L1029
+	sub	w1, w1, #1
+	str	w1, [x21, 328]
+.L1027:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1026
+.L1029:
+	add	w2, w0, 1
+	add	x0, x21, x0, sxtw 1
+	add	x3, x21, x2, sxtw 1
+	ldrh	w3, [x3, 332]
+	strh	w3, [x0, 332]
+	and	w0, w2, 65535
+	b	.L1028
+	.size	gc_free_bad_sblk, .-gc_free_bad_sblk
+	.section	.text.ftl_free_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sblk
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR7
+	and	x24, x0, 65535
+	stp	x21, x22, [sp, 32]
+	ldr	x4, [x23, #:lo12:.LANCHOR7]
+	lsl	x21, x24, 2
+	stp	x19, x20, [sp, 16]
+	mov	x19, x24
+	add	x20, x4, x21
+	ldrb	w0, [x20, 2]
+	ubfx	x22, x0, 5, 3
+	tbz	x0, 3, .L1039
+	adrp	x1, .LANCHOR102
+	ldrh	w2, [x4, x21]
+	adrp	x8, .LANCHOR116
+	ldr	x7, [x1, #:lo12:.LANCHOR102]
+	and	w3, w2, 2047
+	ldr	w2, [x4, x21]
+	ldrh	w8, [x8, #:lo12:.LANCHOR116]
+	ldrh	w1, [x7, 74]
+	ubfx	x6, x2, 11, 8
+	adrp	x2, .LANCHOR8
+	add	w1, w3, w1
+	ldrh	w2, [x2, #:lo12:.LANCHOR8]
+	and	w5, w1, 65535
+	ldrh	w1, [x7, 72]
+	add	w1, w6, w1
+	udiv	w7, w5, w2
+	and	w1, w1, 65535
+	add	w7, w7, w1
+	cmp	w7, w8
+	ble	.L1040
+	adrp	x1, .LANCHOR93
+	adrp	x7, .LANCHOR97
+	ldrh	w5, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR92
+	ldrh	w7, [x7, #:lo12:.LANCHOR97]
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L1041
+.L1057:
+	mov	w1, 2
+	bfi	w0, w1, 3, 2
+.L1055:
+	strb	w0, [x20, 2]
+.L1042:
+	ldrb	w0, [x20, 2]
+	ands	w0, w0, 24
+	bne	.L1046
+	mul	w2, w6, w2
+	ldrh	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w3, w2, lsr 2
+	ubfx	x2, x2, 2, 9
+	bfi	w0, w2, 0, 11
+	strh	w0, [x4, x21]
+.L1039:
+	mov	w0, w19
+	bl	zftl_remove_data_node
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	add	w22, w22, 6
+	and	w22, w22, 7
+	add	x21, x0, x21
+	cmp	w22, 4
+	ldrb	w0, [x21, 2]
+	and	w0, w0, 31
+	strb	w0, [x21, 2]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x24, lsl 1]
+	bhi	.L1048
+	mov	w0, w19
+	bl	gc_free_bad_sblk
+.L1048:
+	ldrb	w0, [x20, 2]
+	tbz	x0, 3, .L1049
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w1, [x0, 584]
+	cmp	w1, w19
+	bne	.L1050
+	mov	w1, -1
+	ldrh	w2, [x0, 588]
+	strh	w1, [x0, 584]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L1049
+	strh	w19, [x0, 588]
+	mov	w1, w19
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
+.L1056:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	printf
+.L1041:
+	adrp	x1, .LANCHOR117
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR88]
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L1057
+.L1045:
+	and	w0, w0, -25
+	b	.L1055
+.L1040:
+	madd	w1, w2, w1, w5
+	adrp	x5, .LANCHOR118
+	ldrh	w5, [x5, #:lo12:.LANCHOR118]
+	cmp	w1, w5
+	ble	.L1042
+	adrp	x1, .LANCHOR117
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR88]
+	add	w1, w1, w7
+	cmp	w5, w1
+	bge	.L1045
+	adrp	x1, .LANCHOR93
+	adrp	x7, .LANCHOR97
+	ldrh	w5, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR92
+	ldrh	w7, [x7, #:lo12:.LANCHOR97]
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L1045
+	b	.L1057
+.L1046:
+	cmp	w0, 16
+	bne	.L1039
+	sdiv	w2, w3, w2
+	ldr	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w6, w2, lsr 2
+	ubfx	x2, x2, 2, 6
+	bfi	w0, w2, 11, 8
+	str	w0, [x4, x21]
+	b	.L1039
+.L1050:
+	ldrh	w1, [x0, 586]
+	cmp	w1, w19
+	bne	.L1049
+	mov	w1, -1
+	ldrh	w2, [x0, 590]
+	strh	w1, [x0, 586]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L1049
+	strh	w19, [x0, 590]
+	mov	w1, w19
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
+	b	.L1056
+.L1049:
+	mov	w0, w19
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	zftl_insert_free_list
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_free_src_blk
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR63
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC63
+	adrp	x23, .LANCHOR9
+	add	x21, x21, :lo12:.LANCHOR63
+	mov	x24, x23
+	add	x22, x22, :lo12:.LC63
+	stp	x19, x20, [sp, 16]
+	mov	w20, 0
+	stp	x25, x26, [sp, 64]
+.L1059:
+	ldrh	w0, [x21, 56]
+	cmp	w0, w20
+	bhi	.L1073
+	strh	wzr, [x21, 56]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1073:
+	add	x0, x21, x20, sxtw 1
+	ldrh	w25, [x0, 58]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	mov	x19, x25
+	lsl	x26, x25, 1
+	ldrh	w2, [x0, x26]
+	cbz	w2, .L1060
+	mov	w1, w25
+	mov	x0, x22
+	bl	printf
+.L1060:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x26]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x25, x0, x25, lsl 2
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L1061
+	ldrb	w2, [x25, 2]
+	adrp	x0, .LC64
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC64
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L1061:
+	ldrb	w0, [x25, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1062
+	tst	w0, 192
+	bne	.L1063
+.L1062:
+	adrp	x1, .LANCHOR119
+	adrp	x0, .LC0
+	mov	w2, 932
+	add	x1, x1, :lo12:.LANCHOR119
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1063:
+	mov	w0, w19
+	bl	ftl_free_sblk
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrh	w2, [x0, 124]
+	cbz	w2, .L1064
+	add	x3, x0, 392
+	mov	w1, 0
+.L1066:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1065
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 392]
+	strh	w2, [x0, 124]
+.L1064:
+	ldrh	w2, [x0, 120]
+	cbz	w2, .L1067
+	add	x3, x0, 136
+	mov	w1, 0
+.L1069:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1068
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 136]
+	strh	w2, [x0, 120]
+.L1067:
+	ldrh	w2, [x0, 122]
+	cbz	w2, .L1070
+	add	x3, x0, 264
+	mov	w1, 0
+.L1072:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L1071
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 264]
+	strh	w2, [x0, 122]
+.L1070:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1059
+.L1065:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1066
+	b	.L1064
+.L1068:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1069
+	b	.L1067
+.L1071:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L1072
+	b	.L1070
+	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.print_ftl_debug_info,"ax",@progbits
 	.align	2
 	.global	print_ftl_debug_info
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR88
 	adrp	x8, .LANCHOR120
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w7, [x2, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR88
+	ldrh	w7, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR90
 	stp	x19, x20, [sp, 48]
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
 	adrp	x20, .LANCHOR10
-	ldrh	w6, [x2, #:lo12:.LANCHOR88]
+	ldrh	w6, [x2, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR99
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
+	ldrh	w5, [x2, #:lo12:.LANCHOR99]
 	adrp	x2, .LANCHOR97
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
-	ldrh	w5, [x2, #:lo12:.LANCHOR97]
-	adrp	x2, .LANCHOR95
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
-	ldrh	w4, [x2, #:lo12:.LANCHOR95]
-	adrp	x2, .LANCHOR93
+	ldrh	w4, [x2, #:lo12:.LANCHOR97]
+	adrp	x2, .LANCHOR95
 	ldr	w8, [x8, #:lo12:.LANCHOR120]
-	ldrh	w3, [x2, #:lo12:.LANCHOR93]
+	ldrh	w3, [x2, #:lo12:.LANCHOR95]
 	ldrh	w2, [x1, 146]
 	ldrh	w1, [x1, 148]
 	str	w8, [sp, 24]
@@ -6086,31 +6265,31 @@ print_ftl_debug_info:
 	str	w8, [sp, 16]
 	ldr	w0, [x0, 524]
 	str	w0, [sp, 8]
-	adrp	x0, .LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	str	w0, [sp]
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	adrp	x1, .LANCHOR121
 	ldrb	w3, [x1, #:lo12:.LANCHOR121]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -6123,21 +6302,21 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	bl	printf
-	adrp	x0, .LANCHOR77
-	ldrh	w5, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR82
-	ldrh	w4, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR79
+	ldrh	w5, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR84
+	ldrh	w4, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR62
 	ldrh	w3, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR92
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR89
-	ldrh	w1, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LANCHOR94
+	ldrh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	ldp	x29, x30, [sp, 32]
@@ -6147,8 +6326,8 @@ print_ftl_debug_info:
 	ldrh	w3, [x0, 588]
 	ldrh	w2, [x0, 586]
 	ldrh	w1, [x0, 584]
-	adrp	x0, .LC67
-	add	x0, x0, :lo12:.LC67
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -6160,29 +6339,29 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1077
+	cbnz	x0, .L1099
 	adrp	x1, .LANCHOR122
 	add	x1, x1, :lo12:.LANCHOR122
-	mov	w2, 667
+	mov	w2, 668
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1076:
+.L1098:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1080:
+.L1102:
 	mov	x1, x19
 	adrp	x0, .LANCHOR57
 	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR100
+	adrp	x1, .LANCHOR102
 	ldrb	w3, [x19, 56]
 	ldrb	w0, [x21, #:lo12:.LANCHOR58]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x21, #:lo12:.LANCHOR58]
@@ -6192,125 +6371,141 @@ ftl_write_buf:
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1076
-.L1077:
+	b	.L1098
+.L1099:
 	mov	x19, x0
 	adrp	x0, .LANCHOR123
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1082
+	bls	.L1104
 	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 672
+	mov	w2, 673
 	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1082:
+.L1104:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR58
-	cbz	w0, .L1079
+	cbz	w0, .L1101
 	ldrb	w1, [x20, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bcs	.L1080
-.L1079:
+	bcs	.L1102
+.L1101:
 	mov	x0, x19
 	bl	buf_free
 	ldrb	w0, [x21, #:lo12:.LANCHOR58]
-	b	.L1076
+	b	.L1098
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
 	.global	ftl_write_completed
 	.type	ftl_write_completed, %function
 ftl_write_completed:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR124
-	stp	x21, x22, [sp, 32]
 	adrp	x19, .LANCHOR50
-	adrp	x22, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR124
 	add	x19, x19, :lo12:.LANCHOR50
-	add	x22, x22, :lo12:.LANCHOR102
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR124
+	mov	x22, x19
+	add	x21, x21, :lo12:.LANCHOR124
 	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-.L1088:
-	ldrb	w0, [x20]
+	mov	w24, 0
+.L1110:
+	ldrb	w0, [x21]
 	cmp	w0, 255
-	bne	.L1094
+	bne	.L1118
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 64
 	ret
-.L1094:
-	ubfiz	x21, x0, 6, 8
-	sbfiz	x0, x0, 6, 32
-	add	x23, x19, x0
-	add	x21, x19, x21
-	ldrb	w0, [x19, x0]
-	strb	w0, [x20]
-	ldr	w0, [x23, 52]
-	cmn	w0, #1
-	bne	.L1089
-	ldp	w2, w3, [x23, 36]
+.L1118:
+	lsl	x1, x0, 6
+	ubfiz	x20, x0, 6, 8
+	add	x23, x19, x1
+	add	x20, x19, x20
+	ldrb	w1, [x19, x1]
+	strb	w1, [x21]
+	ldr	w1, [x23, 52]
+	cmn	w1, #1
+	bne	.L1111
+	adrp	x1, .LANCHOR66
+	ldr	w3, [x23, 40]
+	mov	w5, 65535
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	mov	w1, 21
-	ldrh	w0, [x22]
-	mov	w25, 1
-	sub	w1, w1, w0
-	lsr	w0, w3, w0
-	lsl	w1, w25, w1
+	sub	w4, w1, w2
+	mov	w1, 1
+	lsr	w2, w3, w2
+	lsl	w1, w1, w4
 	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
-	udiv	w1, w1, w0
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	and	w1, w1, w2
+	adrp	x2, .LANCHOR67
+	ldrb	w2, [x2, #:lo12:.LANCHOR67]
+	udiv	w1, w1, w2
+	adrp	x2, .LANCHOR10
+	mov	x23, x2
+	ldr	x4, [x2, #:lo12:.LANCHOR10]
 	and	w24, w1, 65535
-	mov	w1, w24
+	and	w1, w1, w5
+	ldr	w6, [x4, 560]
+	cmp	w6, w5
+	bne	.L1112
+	str	w1, [x4, 560]
+	str	w3, [x4, 564]
+.L1112:
+	add	x0, x22, x0, lsl 6
+	ldr	w2, [x0, 36]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-	mov	w1, w25
-	mov	w2, 0
-	mov	w0, w24
-	bl	gc_add_sblk
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 556]
-	add	w1, w1, w25
+	add	w1, w1, 1
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1090
+	bne	.L1113
 	strh	wzr, [x0, 22]
-.L1091:
-	mov	x0, x21
+.L1114:
+	mov	x0, x20
+	mov	w24, 1
 	bl	ftl_write_buf
-	b	.L1088
-.L1090:
+	b	.L1110
+.L1113:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1091
+	bne	.L1114
 	strh	wzr, [x0, 54]
-	b	.L1091
-.L1089:
+	b	.L1114
+.L1111:
+	cbz	w24, .L1116
+	ldp	w1, w2, [x23, 36]
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+	mov	x0, x20
+	bl	ftl_write_buf
+	b	.L1110
+.L1116:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1093
+	tbz	x0, 2, .L1117
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1088
-.L1093:
-	mov	x0, x21
+	b	.L1110
+.L1117:
+	mov	x0, x20
 	bl	buf_free
-	b	.L1088
+	b	.L1110
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6320,8 +6515,8 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1097
-	mov	w2, 954
+	cbnz	x0, .L1121
+	mov	w2, 964
 	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR125
@@ -6330,20 +6525,20 @@ zftl_add_read_buf:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1097:
+.L1121:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
 	adrp	x0, .LANCHOR123
 	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bls	.L1099
+	bls	.L1123
 	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 959
+	mov	w2, 969
 	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1099:
+.L1123:
 	mov	x1, x19
 	adrp	x0, .LANCHOR126
 	add	x0, x0, :lo12:.LANCHOR126
@@ -6376,39 +6571,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1104
+	beq	.L1128
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1105
+	beq	.L1129
 	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	mov	w2, 827
+	mov	w2, 833
 	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1105:
+.L1129:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1106:
+.L1130:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1104:
+.L1128:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC69
+	adrp	x21, .LC73
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC69
+	add	x21, x21, :lo12:.LC73
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -6421,13 +6616,13 @@ ftl_alloc_sblk:
 	mov	x0, x21
 	bl	printf
 	bl	dump_all_list_info
-	mov	w2, 837
+	mov	w2, 843
 	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1106
+	b	.L1130
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
@@ -6441,8 +6636,8 @@ sblk_init:
 	strb	w0, [x1, #:lo12:.LANCHOR124]
 	adrp	x1, .LANCHOR129
 	strb	w0, [x1, #:lo12:.LANCHOR129]
-	adrp	x1, .LANCHOR67
-	strb	w0, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR69
+	strb	w0, [x1, #:lo12:.LANCHOR69]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6452,8 +6647,8 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR54
@@ -6462,15 +6657,15 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19, #:lo12:.LANCHOR54]
 	cmp	w19, 255
-	beq	.L1113
+	beq	.L1137
 	adrp	x1, .LANCHOR50
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR50
-	adrp	x21, .LC71
+	adrp	x21, .LC75
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC71
+	add	x21, x21, :lo12:.LC75
 	mov	x20, x1
-.L1115:
+.L1139:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6478,11 +6673,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1113
+	beq	.L1137
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1115
-.L1113:
+	b	.L1139
+.L1137:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6496,79 +6691,79 @@ queue_lun_state:
 	adrp	x2, .LANCHOR54
 	ldrb	w2, [x2, #:lo12:.LANCHOR54]
 	cmp	w2, 255
-	beq	.L1131
-	adrp	x3, .LANCHOR102
+	beq	.L1155
+	adrp	x3, .LANCHOR66
 	adrp	x7, .LANCHOR50
 	add	x7, x7, :lo12:.LANCHOR50
-	adrp	x10, .L1127
-	ldrh	w8, [x3, #:lo12:.LANCHOR102]
+	adrp	x10, .L1151
+	ldrh	w8, [x3, #:lo12:.LANCHOR66]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1127
+	add	x10, x10, :lo12:.L1151
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR101
+	adrp	x4, .LANCHOR67
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR101]
+	ldrb	w6, [x4, #:lo12:.LANCHOR67]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1130:
+.L1154:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1125
+	bne	.L1149
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1126
+	bne	.L1150
 	cmp	w1, 1
-	bne	.L1123
+	bne	.L1147
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1125
+	beq	.L1149
 	ret
-.L1126:
+.L1150:
 	cmp	w1, 3
-	bhi	.L1125
+	bhi	.L1149
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1127
+	adr	x13, .Lrtx1151
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1127:
+.Lrtx1151:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1127:
-	.byte	(.L1123 - .Lrtx1127) / 4
-	.byte	(.L1128 - .Lrtx1127) / 4
-	.byte	(.L1129 - .Lrtx1127) / 4
-	.byte	(.L1123 - .Lrtx1127) / 4
+.L1151:
+	.byte	(.L1147 - .Lrtx1151) / 4
+	.byte	(.L1152 - .Lrtx1151) / 4
+	.byte	(.L1153 - .Lrtx1151) / 4
+	.byte	(.L1147 - .Lrtx1151) / 4
 	.section	.text.queue_lun_state
-.L1128:
+.L1152:
 	cmp	w0, 7
 	ccmp	w0, 9, 4, ne
-	beq	.L1125
+	beq	.L1149
 	ret
-.L1129:
+.L1153:
 	cmp	w0, 11
-	bne	.L1123
-.L1125:
+	bne	.L1147
+.L1149:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1130
-.L1131:
+	bne	.L1154
+.L1155:
 	mov	w0, 0
-.L1123:
+.L1147:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6577,24 +6772,24 @@ queue_lun_state:
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
 	adrp	x4, .LANCHOR124
-	adrp	x8, .LANCHOR67
+	adrp	x8, .LANCHOR69
 	adrp	x1, .LANCHOR54
 	adrp	x7, .LANCHOR129
 	adrp	x3, .LANCHOR50
 	ldrb	w14, [x4, #:lo12:.LANCHOR124]
 	add	x5, x3, :lo12:.LANCHOR50
 	ldrb	w2, [x1, #:lo12:.LANCHOR54]
-	ldrb	w12, [x8, #:lo12:.LANCHOR67]
+	ldrb	w12, [x8, #:lo12:.LANCHOR69]
 	mov	x11, x5
 	ldrb	w13, [x7, #:lo12:.LANCHOR129]
-	add	x16, x8, :lo12:.LANCHOR67
+	add	x16, x8, :lo12:.LANCHOR69
 	add	x7, x7, :lo12:.LANCHOR129
 	add	x10, x4, :lo12:.LANCHOR124
 	mov	w6, 0
 	mov	w15, -1
-.L1134:
+.L1158:
 	cmp	w2, 255
-	beq	.L1135
+	beq	.L1159
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -6602,61 +6797,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1136
-	cbz	w6, .L1133
+	bls	.L1160
+	cbz	w6, .L1157
 	strb	w2, [x1, #:lo12:.LANCHOR54]
 	ret
-.L1136:
+.L1160:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1139
+	bne	.L1163
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1147
+	cbnz	w4, .L1171
 	mov	w4, w14
 	mov	x6, x10
-.L1140:
+.L1164:
 	cmp	w4, 255
-	bne	.L1145
+	bne	.L1169
 	add	x3, x3, :lo12:.LANCHOR50
 	strb	w2, [x1, #:lo12:.LANCHOR54]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1139:
-	cbnz	w6, .L1141
+.L1163:
+	cbnz	w6, .L1165
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1141
+	beq	.L1165
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1140
-.L1147:
+	b	.L1164
+.L1171:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1140
-.L1145:
+	b	.L1164
+.L1169:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1145
+	bne	.L1169
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1141:
+.L1165:
 	mov	w6, 1
-	b	.L1134
-.L1135:
-	cbz	w6, .L1133
+	b	.L1158
+.L1159:
+	cbz	w6, .L1157
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR54]
-.L1133:
+.L1157:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6665,42 +6860,42 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR78
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
+	adrp	x20, .LANCHOR102
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1158
+	bls	.L1182
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1159
-.L1158:
-	adrp	x19, .LC72
-	add	x19, x19, :lo12:.LC72
+	bne	.L1183
+.L1182:
+	adrp	x19, .LC76
+	add	x19, x19, :lo12:.LC76
 	adrp	x23, .LANCHOR7
-.L1171:
+.L1195:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR100
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	add	x14, x20, :lo12:.LANCHOR102
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1160
+	bne	.L1184
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -6709,8 +6904,8 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1171
-.L1160:
+	b	.L1195
+.L1184:
 	ldr	x0, [x14]
 	adrp	x1, .LANCHOR130
 	mov	w2, 1
@@ -6719,48 +6914,48 @@ pm_alloc_new_blk:
 	str	w2, [x1, #:lo12:.LANCHOR130]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1162:
+.L1186:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1161
+	beq	.L1185
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1162
+	bne	.L1186
 	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 194
 	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1161:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1185:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1159:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L1183:
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1164
+	bcs	.L1188
 	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 199
 	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1164:
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1188:
+	adrp	x1, .LANCHOR66
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
@@ -6768,17 +6963,17 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1167
+	tbz	x0, 12, .L1191
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC73
+	adrp	x0, .LC77
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC77
 	bl	printf
-.L1167:
+.L1191:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6798,62 +6993,62 @@ pm_select_ram_region:
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1176:
+.L1200:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1175
+	beq	.L1199
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1176
+	bne	.L1200
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1178:
+.L1202:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1177
+	tbnz	x3, 15, .L1201
 	cmp	w3, w4
-	bcs	.L1177
+	bcs	.L1201
 	mov	w4, w3
 	mov	w19, w1
-.L1177:
+.L1201:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1178
+	bne	.L1202
 	cmp	w19, 32
-	bne	.L1175
+	bne	.L1199
 	adrp	x1, .LANCHOR133
 	mov	w2, -1
 	ldrb	w3, [x1, #:lo12:.LANCHOR133]
 	mov	w1, 0
-.L1180:
+.L1204:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1179
+	bcs	.L1203
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1179:
+.L1203:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1180
+	bne	.L1204
 	cmp	w19, 32
-	bne	.L1175
+	bne	.L1199
 	adrp	x1, .LANCHOR134
 	adrp	x0, .LC0
 	mov	w2, 297
 	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1175:
+.L1199:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6890,15 +7085,15 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1188
+	cbnz	w0, .L1212
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1189:
+.L1213:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1189
-.L1195:
+	bne	.L1213
+.L1219:
 	adrp	x20, .LANCHOR138
 	add	x20, x20, :lo12:.LANCHOR138
 	mov	w2, 1024
@@ -6907,42 +7102,42 @@ flash_lsb_page_tbl_build:
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1190:
+.L1214:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1190
+	bne	.L1214
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1188:
+.L1212:
 	cmp	w0, 1
-	bne	.L1191
+	bne	.L1215
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1194:
+.L1218:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1192
+	bls	.L1216
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1192:
+.L1216:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1194
-	b	.L1195
-.L1191:
+	bne	.L1218
+	b	.L1219
+.L1215:
 	cmp	w0, 2
-	bne	.L1196
+	bne	.L1220
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1198:
+.L1222:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6951,31 +7146,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1198
-	b	.L1195
-.L1196:
+	bne	.L1222
+	b	.L1219
+.L1220:
 	cmp	w0, 3
-	bne	.L1199
+	bne	.L1223
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1202:
+.L1226:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1200
+	bls	.L1224
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1200:
+.L1224:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1202
-	b	.L1195
-.L1199:
+	bne	.L1226
+	b	.L1219
+.L1223:
 	cmp	w0, 4
-	bne	.L1203
+	bne	.L1227
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6993,7 +7188,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1205:
+.L1229:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -7002,40 +7197,40 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1205
-	b	.L1195
-.L1203:
+	bne	.L1229
+	b	.L1219
+.L1227:
 	cmp	w0, 5
-	bne	.L1206
+	bne	.L1230
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1207:
+.L1231:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1207
+	bne	.L1231
 	add	x1, x1, 32
-.L1208:
+.L1232:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1208
-	b	.L1195
-.L1206:
+	bne	.L1232
+	b	.L1219
+.L1230:
 	cmp	w0, 8
-	bne	.L1209
+	bne	.L1233
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1210:
+.L1234:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1210
-	b	.L1195
-.L1209:
+	bne	.L1234
+	b	.L1219
+.L1233:
 	cmp	w0, 9
-	bne	.L1195
+	bne	.L1219
 	add	x0, x19, :lo12:.LANCHOR3
 	mov	w1, 1
 	add	x0, x0, 6
@@ -7044,13 +7239,13 @@ flash_lsb_page_tbl_build:
 	mov	w1, 2
 	strh	w1, [x0, -2]
 	mov	w1, 3
-.L1211:
+.L1235:
 	strh	w1, [x0], 2
 	add	w1, w1, 2
 	and	w1, w1, 65535
 	cmp	w1, 509
-	bne	.L1211
-	b	.L1195
+	bne	.L1235
+	b	.L1219
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -7064,18 +7259,18 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1228
+	tbz	x0, 12, .L1252
 	adrp	x1, .LANCHOR139
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR139
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1228:
-	adrp	x22, .LANCHOR30
-	add	x19, x22, :lo12:.LANCHOR30
+.L1252:
+	adrp	x22, .LANCHOR31
+	add	x19, x22, :lo12:.LANCHOR31
 	adrp	x23, .LANCHOR2
 	adrp	x24, .LANCHOR18
-	adrp	x21, .LANCHOR29
+	adrp	x21, .LANCHOR30
 	mov	w2, 8
 	ldrh	w0, [x19, 26]
 	adrp	x20, .LANCHOR141
@@ -7087,7 +7282,7 @@ flash_die_info_init:
 	adrp	x1, .LANCHOR140
 	strh	w0, [x1, #:lo12:.LANCHOR140]
 	mov	w1, 0
-	add	x0, x21, :lo12:.LANCHOR29
+	add	x0, x21, :lo12:.LANCHOR30
 	bl	ftl_memset
 	add	x0, x20, :lo12:.LANCHOR141
 	mov	w2, 32
@@ -7095,40 +7290,40 @@ flash_die_info_init:
 	bl	ftl_memset
 	mov	x15, x21
 	mov	x11, x20
-	adrp	x12, .LANCHOR31
-	adrp	x14, .LANCHOR41
+	adrp	x12, .LANCHOR32
+	adrp	x14, .LANCHOR42
 	mov	x7, x22
-	add	x12, x12, :lo12:.LANCHOR31
-	add	x20, x14, :lo12:.LANCHOR41
+	add	x12, x12, :lo12:.LANCHOR32
+	add	x20, x14, :lo12:.LANCHOR42
 	add	x21, x19, 1
 	mov	x10, 0
-.L1230:
+.L1254:
 	ldrb	w2, [x19]
 	mov	w0, 2
 	strb	w0, [x10, x12]
 	add	x1, x20, x10, lsl 3
 	mov	x0, x21
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1229
+	cbnz	w0, .L1253
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
 	add	x1, x11, :lo12:.LANCHOR141
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
 	and	w0, w10, 255
 	str	wzr, [x1, x2, lsl 2]
-	add	x1, x15, :lo12:.LANCHOR29
+	add	x1, x15, :lo12:.LANCHOR30
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1229:
+.L1253:
 	add	x10, x10, 1
 	cmp	x10, 4
-	bne	.L1230
-	add	x0, x7, :lo12:.LANCHOR30
+	bne	.L1254
+	add	x0, x7, :lo12:.LANCHOR31
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1231
-.L1235:
-	add	x7, x7, :lo12:.LANCHOR30
+	beq	.L1255
+.L1259:
+	add	x7, x7, :lo12:.LANCHOR31
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
@@ -7141,28 +7336,28 @@ flash_die_info_init:
 	adrp	x1, .LANCHOR142
 	strh	w0, [x1, #:lo12:.LANCHOR142]
 	ret
-.L1231:
+.L1255:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	add	x14, x14, :lo12:.LANCHOR41
+	add	x14, x14, :lo12:.LANCHOR42
 	ldrb	w12, [x0, 13]
 	add	x10, x0, 1
-	ldrb	w20, [x7, #:lo12:.LANCHOR30]
+	ldrb	w20, [x7, #:lo12:.LANCHOR31]
 	add	x19, x24, :lo12:.LANCHOR18
 	ldrb	w21, [x0, 23]
 	add	x11, x11, :lo12:.LANCHOR141
-	add	x15, x15, :lo12:.LANCHOR29
+	add	x15, x15, :lo12:.LANCHOR30
 	mov	x13, 0
 	mul	w12, w12, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1234:
+.L1258:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
 	mov	x0, x10
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1232
+	cbnz	w0, .L1256
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -7170,11 +7365,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1232:
+.L1256:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1234
-	b	.L1235
+	bne	.L1258
+	b	.L1259
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -7184,19 +7379,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR108
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR112
+	add	x0, x0, :lo12:.LANCHOR108
 	bl	ftl_memset
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR85
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR78
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR114
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -7211,59 +7406,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1248
+	tbz	x0, 12, .L1272
 	adrp	x1, .LANCHOR143
-	adrp	x0, .LC74
+	adrp	x0, .LC78
 	mov	w3, 0
 	mov	w2, 224
 	add	x1, x1, :lo12:.LANCHOR143
-	add	x0, x0, :lo12:.LC74
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1248:
-	adrp	x20, .LANCHOR83
-	adrp	x22, .LANCHOR76
-	adrp	x19, .LANCHOR112
-	add	x19, x19, :lo12:.LANCHOR112
+.L1272:
+	adrp	x20, .LANCHOR85
+	adrp	x22, .LANCHOR78
+	adrp	x19, .LANCHOR108
+	add	x19, x19, :lo12:.LANCHOR108
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR83]
-	adrp	x21, .LANCHOR114
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	ldrh	w2, [x20, #:lo12:.LANCHOR85]
+	adrp	x21, .LANCHOR110
+	ldrb	w0, [x22, #:lo12:.LANCHOR78]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR85
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR114]
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR113
-	ldrb	w3, [x22, #:lo12:.LANCHOR76]
-	ldr	x5, [x21, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR109
+	ldrb	w3, [x22, #:lo12:.LANCHOR78]
+	ldr	x5, [x21, #:lo12:.LANCHOR110]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR113]
-.L1249:
+	ldr	x4, [x0, #:lo12:.LANCHOR109]
+.L1273:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1251
+	blt	.L1275
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1251:
+.L1275:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1250
+	beq	.L1274
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1250:
+.L1274:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1249
+	b	.L1273
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7277,8 +7472,8 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
 	adrp	x0, .LANCHOR2
 	adrp	x3, .LANCHOR59
 	strb	wzr, [x19, 10]
@@ -7289,8 +7484,8 @@ zftl_read_flash_info:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	strb	w0, [x19, 7]
 	add	x0, x3, :lo12:.LANCHOR59
 	ldrb	w3, [x3, #:lo12:.LANCHOR59]
@@ -7303,28 +7498,28 @@ zftl_read_flash_info:
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w2, [x19, 6]
-	adrp	x2, .LANCHOR29
+	adrp	x2, .LANCHOR30
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR29
+	add	x2, x2, :lo12:.LANCHOR30
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1260:
+.L1284:
 	cmp	w3, w1, uxtb
-	bhi	.L1261
+	bhi	.L1285
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1261:
+.L1285:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1260
+	b	.L1284
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7334,18 +7529,18 @@ gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR102
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1264
+	bls	.L1288
 	bl	ftl_tmp_into_update
-.L1264:
+.L1288:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7353,15 +7548,15 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1265
-	ldr	x3, [x25, #:lo12:.LANCHOR100]
+	bhi	.L1289
+	ldr	x3, [x25, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1314
-.L1265:
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	bls	.L1338
+.L1289:
+	ldr	x1, [x25, #:lo12:.LANCHOR102]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
 	mov	w21, w20
@@ -7380,10 +7575,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1267:
+.L1291:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1276
+	bhi	.L1300
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -7398,14 +7593,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1277
+	tbz	x3, 10, .L1301
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7413,13 +7608,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1277:
+.L1301:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1278
+	tbz	x0, 3, .L1302
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1279
+	bne	.L1303
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7428,7 +7623,7 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR63+318]
-.L1278:
+.L1302:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w3, [x24, #:lo12:.LANCHOR14]
 	ldr	x2, [x23, #:lo12:.LANCHOR7]
@@ -7436,14 +7631,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1280
+	tbz	x3, 10, .L1304
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7451,13 +7646,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1280:
+.L1304:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1281
+	tbz	x0, 3, .L1305
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1282
+	bne	.L1306
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7466,9 +7661,9 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR63+318]
-.L1281:
+.L1305:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1283
+	tbz	x0, 10, .L1307
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7477,9 +7672,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC78
+	adrp	x0, .LC82
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC82
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -7488,9 +7683,9 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1283:
+.L1307:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1284
+	tbz	x0, 10, .L1308
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7499,9 +7694,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC79
+	adrp	x0, .LC83
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC79
+	add	x0, x0, :lo12:.LC83
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 136]
@@ -7510,8 +7705,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1284:
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+.L1308:
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 148]
@@ -7524,17 +7719,17 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1285
-	adrp	x0, .LC80
+	tbz	x0, 10, .L1309
+	adrp	x0, .LC84
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC80
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1285:
+.L1309:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1286
+	tbz	x0, 10, .L1310
 	adrp	x0, .LANCHOR144
 	ldr	w3, [x29, 156]
 	mov	w4, w22
@@ -7543,31 +7738,31 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR145
 	mov	w1, w20
 	ldrh	w5, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1286:
+.L1310:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR144
 	ldr	w1, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w1, w0
-	bgt	.L1287
+	bgt	.L1311
 	adrp	x1, .LANCHOR145
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR145]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1315
-.L1287:
+	ble	.L1339
+.L1311:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x28, .LANCHOR63
 	add	x28, x28, :lo12:.LANCHOR63
 	mov	w27, 0
 	mov	w22, 0
 	ldrh	w26, [x0, 580]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 134]
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR6
@@ -7576,74 +7771,74 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR145
 	add	x0, x0, :lo12:.LANCHOR145
 	str	x0, [x29, 128]
-.L1289:
+.L1313:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1299
-.L1298:
+	bcc	.L1323
+.L1322:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1288:
-	cbz	w21, .L1301
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
+.L1312:
+	cbz	w21, .L1325
+	ldr	x2, [x25, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1302:
+.L1326:
 	cmp	w1, w5
-	bcc	.L1304
+	bcc	.L1328
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1301
+	bcs	.L1325
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1301:
-	cbz	w20, .L1307
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
+.L1325:
+	cbz	w20, .L1331
+	ldr	x2, [x25, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1308:
+.L1332:
 	cmp	w1, w6
-	bcc	.L1310
+	bcc	.L1334
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1307
+	bcs	.L1331
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1307:
+.L1331:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1266
+	beq	.L1290
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR83
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR85
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w2, w1
-	bhi	.L1266
+	bhi	.L1290
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1266:
+.L1290:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7652,7 +7847,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1276:
+.L1300:
 	uxtw	x7, w24
 	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -7660,40 +7855,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1268
+	beq	.L1292
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1269
+	tbz	x4, 0, .L1293
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1270:
+.L1294:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1313
+	bls	.L1337
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1313:
+.L1337:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1273
+	bcs	.L1297
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1273:
+.L1297:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1272
-.L1274:
+	bne	.L1296
+.L1298:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1268
+	bhi	.L1292
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1268
+	tbz	x0, 8, .L1292
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -7705,82 +7900,82 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	stp	x8, x10, [x29, 112]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC75
+	adrp	x0, .LC79
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC75
+	add	x0, x0, :lo12:.LC79
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1268:
+.L1292:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1267
-.L1269:
+	b	.L1291
+.L1293:
 	tst	w0, 24
-	bne	.L1271
+	bne	.L1295
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1270
-.L1271:
+	b	.L1294
+.L1295:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1272:
+.L1296:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1275
+	bls	.L1299
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1275:
+.L1299:
 	cmp	w22, w0
-	bcs	.L1274
+	bcs	.L1298
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1274
-.L1279:
+	b	.L1298
+.L1303:
 	tst	w0, 224
-	bne	.L1278
+	bne	.L1302
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1278
+	bne	.L1302
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1278
+	beq	.L1302
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1278
-.L1282:
+	b	.L1302
+.L1306:
 	tst	w0, 224
-	bne	.L1281
+	bne	.L1305
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1281
+	bne	.L1305
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1281
+	beq	.L1305
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1281
-.L1299:
+	b	.L1305
+.L1323:
 	add	w7, w26, 1
 	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
@@ -7791,31 +7986,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1291
+	beq	.L1315
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1291
+	beq	.L1315
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1292
+	tbz	x0, 0, .L1316
 	cmp	w2, 160
-.L1379:
-	bne	.L1294
+.L1403:
+	bne	.L1318
 	adrp	x0, .LANCHOR144
 	ldr	w2, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w0
-	ble	.L1295
+	ble	.L1319
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1296
-	cbz	w1, .L1295
+	bls	.L1320
+	cbz	w1, .L1319
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1295
-.L1296:
+	bgt	.L1319
+.L1320:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7828,7 +8023,7 @@ gc_static_wearleveling:
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1295
+	tbz	x0, 10, .L1319
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7838,46 +8033,46 @@ gc_static_wearleveling:
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1380:
+.L1404:
 	bl	printf
-.L1295:
+.L1319:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1298
-.L1291:
+	bhi	.L1322
+.L1315:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1289
-.L1292:
+	b	.L1313
+.L1316:
 	cmp	w0, 2
-	b	.L1379
-.L1294:
+	b	.L1403
+.L1318:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1295
+	ble	.L1319
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1297
-	cbz	w1, .L1295
+	ble	.L1321
+	cbz	w1, .L1319
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1295
-.L1297:
+	bgt	.L1319
+.L1321:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7890,7 +8085,7 @@ gc_static_wearleveling:
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1295
+	tbz	x0, 10, .L1319
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7900,54 +8095,54 @@ gc_static_wearleveling:
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1380
-.L1315:
+	b	.L1404
+.L1339:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1288
-.L1304:
+	b	.L1312
+.L1328:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1303
+	bhi	.L1327
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1303
+	beq	.L1327
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1303:
+.L1327:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1302
-.L1310:
+	b	.L1326
+.L1334:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1309
+	blt	.L1333
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1309
+	beq	.L1333
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1309:
+.L1333:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1308
-.L1314:
+	b	.L1332
+.L1338:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1266
+	b	.L1290
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7963,80 +8158,80 @@ zftl_sblk_list_init:
 	adrp	x28, .LANCHOR4
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x27, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR90
+	adrp	x20, .LANCHOR92
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR86
+	adrp	x19, .LANCHOR88
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR102
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR4]
-	adrp	x24, .LANCHOR93
-	adrp	x23, .LANCHOR95
-	adrp	x21, .LANCHOR88
+	adrp	x24, .LANCHOR95
+	adrp	x23, .LANCHOR97
+	adrp	x21, .LANCHOR90
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR99
-	adrp	x2, .LANCHOR76
-	adrp	x3, .LANCHOR75
+	adrp	x0, .LANCHOR101
+	adrp	x2, .LANCHOR78
+	adrp	x3, .LANCHOR77
 	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-	adrp	x10, .LANCHOR94
-	ldrb	w0, [x2, #:lo12:.LANCHOR76]
-	adrp	x8, .LANCHOR96
-	ldrh	w1, [x3, #:lo12:.LANCHOR75]
-	adrp	x7, .LANCHOR98
-	adrp	x6, .LANCHOR79
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x10, .LANCHOR96
+	ldrb	w0, [x2, #:lo12:.LANCHOR78]
+	adrp	x8, .LANCHOR98
+	ldrh	w1, [x3, #:lo12:.LANCHOR77]
+	adrp	x7, .LANCHOR100
+	adrp	x6, .LANCHOR81
 	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR78
-	str	xzr, [x10, #:lo12:.LANCHOR94]
-	str	xzr, [x8, #:lo12:.LANCHOR96]
+	adrp	x4, .LANCHOR80
+	str	xzr, [x10, #:lo12:.LANCHOR96]
+	str	xzr, [x8, #:lo12:.LANCHOR98]
 	adrp	x28, .LANCHOR7
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR98]
-	str	xzr, [x6, #:lo12:.LANCHOR79]
+	str	xzr, [x7, #:lo12:.LANCHOR100]
+	str	xzr, [x6, #:lo12:.LANCHOR81]
 	str	xzr, [x5, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR78]
-	strh	wzr, [x24, #:lo12:.LANCHOR93]
-	strh	wzr, [x23, #:lo12:.LANCHOR95]
-	strh	wzr, [x22, #:lo12:.LANCHOR97]
+	str	xzr, [x4, #:lo12:.LANCHOR80]
+	strh	wzr, [x24, #:lo12:.LANCHOR95]
+	strh	wzr, [x23, #:lo12:.LANCHOR97]
+	strh	wzr, [x22, #:lo12:.LANCHOR99]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	strh	wzr, [x21, #:lo12:.LANCHOR88]
-	strh	wzr, [x20, #:lo12:.LANCHOR90]
-	strh	wzr, [x19, #:lo12:.LANCHOR86]
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
+	strh	wzr, [x21, #:lo12:.LANCHOR90]
+	strh	wzr, [x20, #:lo12:.LANCHOR92]
+	strh	wzr, [x19, #:lo12:.LANCHOR88]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR6
-	adrp	x27, .LC84
-	add	x27, x27, :lo12:.LC84
+	adrp	x27, .LC88
+	add	x27, x27, :lo12:.LC88
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1382:
+.L1406:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1398
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	ldrh	w1, [x24, #:lo12:.LANCHOR93]
+	blt	.L1422
+	ldr	x0, [x25, #:lo12:.LANCHOR102]
+	ldrh	w1, [x24, #:lo12:.LANCHOR95]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR95]
+	ldrh	w1, [x23, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR97]
+	ldrh	w1, [x22, #:lo12:.LANCHOR99]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR88]
+	ldrh	w1, [x21, #:lo12:.LANCHOR90]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR90]
+	ldrh	w1, [x20, #:lo12:.LANCHOR92]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR86]
+	ldrh	w1, [x19, #:lo12:.LANCHOR88]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8044,28 +8239,28 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1398:
+.L1422:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1399
+	cbz	w6, .L1423
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR100]
-	ldrb	w8, [x0, #:lo12:.LANCHOR76]
+	ldr	x7, [x25, #:lo12:.LANCHOR102]
+	ldrb	w8, [x0, #:lo12:.LANCHOR78]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR75]
+	ldrh	w10, [x0, #:lo12:.LANCHOR77]
 	mov	w0, 0
-.L1384:
+.L1408:
 	cmp	w1, w8
-	blt	.L1387
-	cbz	w0, .L1388
+	blt	.L1411
+	cbz	w0, .L1412
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1383:
+.L1407:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -8080,44 +8275,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1389
+	beq	.L1413
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1389
+	beq	.L1413
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1389
+	beq	.L1413
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1389
+	beq	.L1413
 	cmp	w0, 64
-	bne	.L1390
+	bne	.L1414
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR88
+	add	x2, x21, :lo12:.LANCHOR90
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1402:
+.L1426:
 	bl	_insert_data_list
-.L1389:
+.L1413:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1382
-.L1387:
+	b	.L1406
+.L1411:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1385
+	tbnz	x5, 0, .L1409
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1386:
+.L1410:
 	add	w1, w1, 1
-	b	.L1384
-.L1385:
+	b	.L1408
+.L1409:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1386
-.L1388:
+	b	.L1410
+.L1412:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -8125,75 +8320,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1383
-.L1399:
+	b	.L1407
+.L1423:
 	ldr	w0, [x29, 188]
-	b	.L1383
-.L1390:
+	b	.L1407
+.L1414:
 	cmp	w0, 96
-	bne	.L1391
+	bne	.L1415
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR86
+	add	x2, x19, :lo12:.LANCHOR88
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L1402
-.L1391:
+	add	x0, x0, :lo12:.LANCHOR81
+	b	.L1426
+.L1415:
 	cmp	w0, 160
-	bne	.L1392
+	bne	.L1416
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR90
+	add	x2, x20, :lo12:.LANCHOR92
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L1402
-.L1392:
-	cbnz	w0, .L1389
+	add	x0, x0, :lo12:.LANCHOR80
+	b	.L1426
+.L1416:
+	cbnz	w0, .L1413
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1393
+	cbz	w2, .L1417
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1394
+	tbz	x0, 4, .L1418
 	mov	w1, 5
-.L1401:
+.L1425:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1389
-.L1394:
+	b	.L1413
+.L1418:
 	mov	w1, 2
-	b	.L1401
-.L1393:
+	b	.L1425
+.L1417:
 	ands	w1, w1, 24
-	bne	.L1396
+	bne	.L1420
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR93
+	add	x2, x24, :lo12:.LANCHOR95
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR94
-.L1403:
+	add	x0, x0, :lo12:.LANCHOR96
+.L1427:
 	bl	_insert_free_list
-	b	.L1389
-.L1396:
+	b	.L1413
+.L1420:
 	cmp	w1, 16
-	bne	.L1397
+	bne	.L1421
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR95
+	add	x2, x23, :lo12:.LANCHOR97
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L1403
-.L1397:
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L1427
+.L1421:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR97
+	add	x2, x22, :lo12:.LANCHOR99
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L1403
+	add	x0, x0, :lo12:.LANCHOR100
+	b	.L1427
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -8203,19 +8398,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR78
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC72
-	adrp	x23, .LANCHOR83
+	adrp	x21, .LC76
+	adrp	x23, .LANCHOR85
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR83
-	add	x20, x20, :lo12:.LANCHOR76
-	add	x21, x21, :lo12:.LC72
+	add	x23, x23, :lo12:.LANCHOR85
+	add	x20, x20, :lo12:.LANCHOR78
+	add	x21, x21, :lo12:.LC76
 	stp	x25, x26, [sp, 64]
-.L1405:
-.L1408:
+.L1429:
+.L1432:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -8235,18 +8430,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1409
+	beq	.L1433
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1406:
+.L1430:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR113
-	ldr	x3, [x1, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -8255,7 +8450,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1404
+	cbnz	w0, .L1428
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -8264,11 +8459,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1408
-.L1409:
+	b	.L1432
+.L1433:
 	mov	w0, 0
-	b	.L1406
-.L1404:
+	b	.L1430
+.L1428:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8291,26 +8486,26 @@ pm_free_sblk:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1412
+	bls	.L1436
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC0
 	mov	w2, 78
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1412:
+.L1436:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR101
-	adrp	x5, .LANCHOR100
-	adrp	x0, .LANCHOR102
+	adrp	x23, .LANCHOR67
+	adrp	x5, .LANCHOR102
+	adrp	x0, .LANCHOR66
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR101]
-	ldr	x7, [x5, #:lo12:.LANCHOR100]
-	ldrh	w11, [x0, #:lo12:.LANCHOR102]
+	ldrb	w12, [x23, #:lo12:.LANCHOR67]
+	ldr	x7, [x5, #:lo12:.LANCHOR102]
+	ldrh	w11, [x0, #:lo12:.LANCHOR66]
 	ldrh	w13, [x20, #:lo12:.LANCHOR146]
 	add	x4, x7, 704
 	sub	w0, w2, w11
@@ -8320,26 +8515,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1413:
+.L1437:
 	cmp	x4, x1
-	bne	.L1417
-	adrp	x24, .LANCHOR76
-	adrp	x25, .LANCHOR83
+	bne	.L1441
+	adrp	x24, .LANCHOR78
+	adrp	x25, .LANCHOR85
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC85
-	ldrb	w22, [x24, #:lo12:.LANCHOR76]
+	adrp	x27, .LC89
+	ldrb	w22, [x24, #:lo12:.LANCHOR78]
 	add	x20, x20, :lo12:.LANCHOR146
-	ldrh	w0, [x25, #:lo12:.LANCHOR83]
+	ldrh	w0, [x25, #:lo12:.LANCHOR85]
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC85
+	add	x27, x27, :lo12:.LC89
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1418:
+.L1442:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1424
+	bhi	.L1448
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8348,7 +8543,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1417:
+.L1441:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -8356,47 +8551,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1414:
+.L1438:
 	cmp	w13, w3, uxth
-	bhi	.L1416
+	bhi	.L1440
 	add	x4, x4, 4
-	b	.L1413
-.L1416:
+	b	.L1437
+.L1440:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1415
+	bne	.L1439
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1415:
+.L1439:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1414
-.L1424:
-	ldr	x1, [x5, #:lo12:.LANCHOR100]
+	b	.L1438
+.L1448:
+	ldr	x1, [x5, #:lo12:.LANCHOR102]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR67]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1419
-	ldrb	w0, [x24, #:lo12:.LANCHOR76]
-	ldrh	w2, [x25, #:lo12:.LANCHOR83]
+	bne	.L1443
+	ldrb	w0, [x24, #:lo12:.LANCHOR78]
+	ldrh	w2, [x25, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1419:
+.L1443:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1420
-	cbnz	w0, .L1425
-.L1422:
+	bls	.L1444
+	cbnz	w0, .L1449
+.L1446:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1421
+	beq	.L1445
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1423
+	tbz	x0, 12, .L1447
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8404,30 +8599,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1423:
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+.L1447:
+	ldr	x0, [x5, #:lo12:.LANCHOR102]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+	ldr	x0, [x5, #:lo12:.LANCHOR102]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1421
-.L1420:
-	cbz	w0, .L1422
-.L1421:
+	b	.L1445
+.L1444:
+	cbz	w0, .L1446
+.L1445:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1418
-.L1425:
+	b	.L1442
+.L1449:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1421
+	b	.L1445
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -8447,20 +8642,20 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1432
+	tbz	x0, 12, .L1456
 	adrp	x2, .LANCHOR148
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR148
 	mov	w1, 105
-	add	x0, x0, :lo12:.LC86
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L1432:
-	adrp	x19, .LANCHOR26
+.L1456:
+	adrp	x19, .LANCHOR27
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR26]
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR26]
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -8470,15 +8665,15 @@ flash_info_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR19
-	add	x1, x1, :lo12:.LANCHOR19
+	adrp	x1, .LANCHOR20
+	add	x1, x1, :lo12:.LANCHOR20
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR26]
+	ldr	x0, [x19, #:lo12:.LANCHOR27]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR30
+	adrp	x1, .LANCHOR31
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR31
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -8488,15 +8683,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1438:
+.L1462:
 	cmp	w2, w3
-	bhi	.L1439
+	bhi	.L1463
 	ret
-.L1439:
+.L1463:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1438
+	b	.L1462
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8537,42 +8732,42 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1444
+	tbz	x0, 12, .L1468
 	adrp	x1, .LANCHOR149
-	adrp	x0, .LC87
+	adrp	x0, .LC91
 	mov	x2, x19
 	add	x1, x1, :lo12:.LANCHOR149
-	add	x0, x0, :lo12:.LC87
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1444:
-	adrp	x20, .LANCHOR27
+.L1468:
+	adrp	x20, .LANCHOR28
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR27]
+	strb	w0, [x20, #:lo12:.LANCHOR28]
 	adrp	x0, .LANCHOR13
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1445
+	bne	.L1469
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1445:
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+.L1469:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1446
+	bne	.L1470
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1446:
-	ldrb	w0, [x20, #:lo12:.LANCHOR27]
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+.L1470:
+	ldrb	w0, [x20, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR44
-	bne	.L1447
+	adrp	x0, .LANCHOR45
+	bne	.L1471
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR44]
+	strb	w1, [x0, #:lo12:.LANCHOR45]
 	ldr	w0, [x29, 56]
 	mov	w1, 2
 	orr	w0, w0, 256
@@ -8595,37 +8790,37 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1449
+	tbz	x0, 12, .L1473
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1462:
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+.L1486:
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1449:
-	adrp	x0, .LANCHOR45
+.L1473:
+	adrp	x0, .LANCHOR46
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR47
-	strh	wzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR43
-	strb	wzr, [x0, #:lo12:.LANCHOR43]
+	strb	w1, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR48
+	strh	wzr, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR44
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1443
-	ldrb	w1, [x20, #:lo12:.LANCHOR27]
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
+	tbz	x0, 12, .L1467
+	ldrb	w1, [x20, #:lo12:.LANCHOR28]
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1443:
+.L1467:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1447:
-	strb	wzr, [x0, #:lo12:.LANCHOR44]
+.L1471:
+	strb	wzr, [x0, #:lo12:.LANCHOR45]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -8649,17 +8844,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR46
-	str	x0, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR47
+	str	x0, [x1, #:lo12:.LANCHOR47]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1449
+	tbz	x0, 12, .L1473
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1462
+	b	.L1486
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8676,7 +8871,7 @@ buf_init:
 	adrp	x22, .LANCHOR123
 	add	x22, x22, :lo12:.LANCHOR123
 	mov	w21, 0
-.L1464:
+.L1488:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8694,7 +8889,7 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1464
+	bne	.L1488
 	add	x0, x20, :lo12:.LANCHOR50
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -8713,11 +8908,11 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR74
-	mov	w2, 328
+	adrp	x0, .LANCHOR76
+	mov	w2, 344
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	strb	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR150
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR63
@@ -8725,79 +8920,79 @@ gc_init:
 	adrp	x0, .LANCHOR151
 	add	x19, x20, :lo12:.LANCHOR63
 	str	wzr, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR83
-	adrp	x4, .LANCHOR92
-	adrp	x20, .LANCHOR75
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	adrp	x4, .LANCHOR94
+	adrp	x20, .LANCHOR77
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR86
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR76
-	strh	wzr, [x2, #:lo12:.LANCHOR84]
-	adrp	x2, .LANCHOR80
-	ldrb	w3, [x19, #:lo12:.LANCHOR76]
-	strh	wzr, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR81
-	strh	wzr, [x2, #:lo12:.LANCHOR81]
+	adrp	x19, .LANCHOR78
+	strh	wzr, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR82
+	ldrb	w3, [x19, #:lo12:.LANCHOR78]
+	strh	wzr, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR83
+	strh	wzr, [x2, #:lo12:.LANCHOR83]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR92]
-	adrp	x4, .LANCHOR89
-	strh	w2, [x4, #:lo12:.LANCHOR89]
-	adrp	x2, .LANCHOR82
-	strh	w1, [x2, #:lo12:.LANCHOR82]
+	strh	w5, [x4, #:lo12:.LANCHOR94]
+	adrp	x4, .LANCHOR91
+	strh	w2, [x4, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR84
+	strh	w1, [x2, #:lo12:.LANCHOR84]
 	adrp	x1, .LANCHOR62
 	strh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR152
 	str	x0, [x1, #:lo12:.LANCHOR152]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrb	w1, [x19, #:lo12:.LANCHOR78]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR153
 	str	x0, [x1, #:lo12:.LANCHOR153]
-	ldrh	w1, [x20, #:lo12:.LANCHOR75]
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrh	w1, [x20, #:lo12:.LANCHOR77]
+	ldrb	w0, [x19, #:lo12:.LANCHOR78]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR72
-	str	x0, [x1, #:lo12:.LANCHOR72]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR74
+	str	x0, [x1, #:lo12:.LANCHOR74]
+	ldrb	w1, [x19, #:lo12:.LANCHOR78]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR66
-	str	x0, [x1, #:lo12:.LANCHOR66]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR68
+	str	x0, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR78]
+	ldrh	w0, [x20, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR154
 	ldp	x19, x20, [sp, 16]
 	str	x0, [x1, #:lo12:.LANCHOR154]
-	adrp	x0, .LANCHOR87
-	adrp	x1, .LANCHOR77
+	adrp	x0, .LANCHOR89
+	adrp	x1, .LANCHOR79
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR77]
+	strh	w0, [x1, #:lo12:.LANCHOR79]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -8816,18 +9011,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1471:
+.L1495:
 	cmp	w1, w3
-	bhi	.L1472
+	bhi	.L1496
 	ret
-.L1472:
+.L1496:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1471
+	b	.L1495
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8876,67 +9071,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC91
+	adrp	x21, .LC95
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC90
+	adrp	x23, .LC94
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC90
-	add	x21, x21, :lo12:.LC91
+	add	x23, x23, :lo12:.LC94
+	add	x21, x21, :lo12:.LC95
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC92
-.L1479:
+	adrp	x27, .LC96
+.L1503:
 	cmp	x25, x19
-	bne	.L1485
+	bne	.L1509
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC92
+	adrp	x1, .LC96
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC92
+	add	x1, x1, :lo12:.LC96
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC93
+	adrp	x0, .LC97
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC93
+	add	x0, x0, :lo12:.LC97
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1485:
-	cbnz	w20, .L1480
+.L1509:
+	cbnz	w20, .L1504
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1480:
+.L1504:
 	cmp	w24, 4
-	bne	.L1481
+	bne	.L1505
 	ldr	w1, [x22, x19, lsl 2]
-.L1487:
+.L1511:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1484
+	bls	.L1508
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC92
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	add	x1, x27, :lo12:.LC96
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1484:
+.L1508:
 	add	x19, x19, 1
-	b	.L1479
-.L1481:
+	b	.L1503
+.L1505:
 	cmp	w24, 2
-	bne	.L1483
+	bne	.L1507
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1487
-.L1483:
+	b	.L1511
+.L1507:
 	ldrb	w1, [x22, x19]
-	b	.L1487
+	b	.L1511
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -8945,10 +9140,10 @@ rknand_print_hex:
 hynix_get_read_retry_default:
 	stp	x29, x30, [sp, -96]!
 	mov	w8, w0
-	adrp	x0, .LANCHOR26
+	adrp	x0, .LANCHOR27
 	mov	w2, -83
 	add	x29, sp, 0
-	ldr	x7, [x0, #:lo12:.LANCHOR26]
+	ldr	x7, [x0, #:lo12:.LANCHOR27]
 	mov	w0, -84
 	stp	x19, x20, [sp, 16]
 	mov	w1, -82
@@ -8965,41 +9160,41 @@ hynix_get_read_retry_default:
 	strb	w2, [x7, 129]
 	strb	w1, [x7, 130]
 	strb	w0, [x7, 131]
-	bne	.L1489
+	bne	.L1513
 	mov	w0, -89
 	strb	w0, [x12, 16]
 	adrp	x0, .LANCHOR155+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR155+17]
-.L1553:
+.L1577:
 	mov	w23, 7
-	b	.L1596
-.L1489:
+	b	.L1620
+.L1513:
 	cmp	w8, 3
-	bne	.L1491
+	bne	.L1515
 	mov	x10, 0
-.L1492:
+.L1516:
 	sub	w0, w10, #80
 	strb	w0, [x6, x10]
 	add	x10, x10, 1
 	cmp	x10, 8
-	bne	.L1492
+	bne	.L1516
 	mov	w23, w10
-.L1490:
+.L1514:
 	sub	w0, w8, #1
 	cmp	w0, 1
-	bhi	.L1498
+	bhi	.L1522
 	adrp	x7, .LANCHOR18
-	adrp	x8, .LANCHOR29
+	adrp	x8, .LANCHOR30
 	add	x7, x7, :lo12:.LANCHOR18
-	add	x8, x8, :lo12:.LANCHOR29
+	add	x8, x8, :lo12:.LANCHOR30
 	mov	w5, 0
 	mov	w11, 55
-.L1499:
+.L1523:
 	ldrb	w0, [x7]
 	cmp	w0, w5
-	bhi	.L1505
-.L1506:
+	bhi	.L1529
+.L1530:
 	strb	w10, [x12, 1]
 	strb	w23, [x12, 2]
 	ldp	x19, x20, [sp, 16]
@@ -9009,9 +9204,9 @@ hynix_get_read_retry_default:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1491:
+.L1515:
 	cmp	w8, 4
-	bne	.L1493
+	bne	.L1517
 	mov	w3, -52
 	strb	w3, [x7, 128]
 	mov	w3, -65
@@ -9027,10 +9222,10 @@ hynix_get_read_retry_default:
 	strb	w3, [x7, 132]
 	strb	w1, [x7, 134]
 	strb	w0, [x7, 135]
-	b	.L1490
-.L1493:
+	b	.L1514
+.L1517:
 	cmp	w8, 5
-	bne	.L1494
+	bne	.L1518
 	mov	w0, 56
 	strb	w0, [x7, 128]
 	mov	w0, 57
@@ -9040,12 +9235,12 @@ hynix_get_read_retry_default:
 	strb	w0, [x7, 130]
 	mov	w0, 59
 	strb	w0, [x7, 131]
-.L1596:
+.L1620:
 	mov	w10, 4
-	b	.L1490
-.L1494:
+	b	.L1514
+.L1518:
 	cmp	w8, 6
-	bne	.L1495
+	bne	.L1519
 	mov	w0, 14
 	strb	w0, [x7, 128]
 	mov	w0, 15
@@ -9055,27 +9250,27 @@ hynix_get_read_retry_default:
 	strb	w0, [x7, 130]
 	mov	w0, 17
 	strb	w0, [x7, 131]
-	b	.L1596
-.L1495:
+	b	.L1620
+.L1519:
 	cmp	w8, 7
-	bne	.L1496
+	bne	.L1520
 	mov	x0, 0
-.L1497:
+.L1521:
 	sub	w1, w0, #80
 	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1497
+	bne	.L1521
 	mov	w0, -44
 	mov	w23, 12
 	strb	w0, [x7, 136]
 	mov	w10, 10
 	mov	w0, -43
 	strb	w0, [x7, 137]
-	b	.L1490
-.L1496:
+	b	.L1514
+.L1520:
 	cmp	w8, 8
-	bne	.L1553
+	bne	.L1577
 	mov	w0, 6
 	strb	w0, [x7, 128]
 	mov	w0, 7
@@ -9087,8 +9282,8 @@ hynix_get_read_retry_default:
 	mov	w0, 10
 	mov	w10, 5
 	strb	w0, [x7, 132]
-	b	.L1490
-.L1505:
+	b	.L1514
+.L1529:
 	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -9099,7 +9294,7 @@ hynix_get_read_retry_default:
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x2, x12, x2
 	add	x4, x4, x0
-.L1500:
+.L1524:
 	str	w11, [x4, 2056]
 	ldrb	w0, [x6, x3]
 	str	w0, [x4, 2052]
@@ -9109,15 +9304,15 @@ hynix_get_read_retry_default:
 	strb	w0, [x2, x3]
 	add	x3, x3, 1
 	cmp	w10, w3, uxtb
-	bhi	.L1500
+	bhi	.L1524
 	adrp	x3, .LANCHOR155
 	add	x3, x3, :lo12:.LANCHOR155
 	mov	x0, 0
-.L1503:
+.L1527:
 	add	x14, x2, x0
 	add	x13, x3, x0
 	mov	x1, 1
-.L1502:
+.L1526:
 	lsl	x4, x1, 2
 	lsl	x15, x1, 3
 	ldrb	w16, [x2, x0]
@@ -9126,10 +9321,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x13, x4]
 	add	w4, w4, w16
 	strb	w4, [x14, x15]
-	bne	.L1502
+	bne	.L1526
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1503
+	bne	.L1527
 	add	w5, w5, 1
 	strb	wzr, [x2, 16]
 	strb	wzr, [x2, 24]
@@ -9139,11 +9334,11 @@ hynix_get_read_retry_default:
 	strb	wzr, [x2, 48]
 	strb	wzr, [x2, 41]
 	strb	wzr, [x2, 49]
-	b	.L1499
-.L1498:
+	b	.L1523
+.L1522:
 	sub	w0, w8, #3
 	cmp	w0, 5
-	bhi	.L1506
+	bhi	.L1530
 	mul	w15, w23, w10
 	sub	w13, w10, #1
 	and	x13, x13, 255
@@ -9156,12 +9351,12 @@ hynix_get_read_retry_default:
 	lsl	w22, w14, 1
 	sbfiz	x21, x14, 1, 32
 	mov	w11, 0
-.L1507:
+.L1531:
 	ldrb	w0, [x19]
 	cmp	w0, w11
-	bls	.L1506
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	bls	.L1530
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w24, [x0, w11, sxtw]
 	mov	w0, w24
 	bl	zftl_flash_exit_slc_mode
@@ -9178,7 +9373,7 @@ hynix_get_read_retry_default:
 	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w8, 8
-	bne	.L1508
+	bne	.L1532
 	mov	w0, 120
 	str	w0, [x4, 2056]
 	str	wzr, [x4, 2052]
@@ -9198,7 +9393,7 @@ hynix_get_read_retry_default:
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w1, [x4, 2052]
-.L1599:
+.L1623:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	wzr, [x4, 2052]
@@ -9206,65 +9401,65 @@ hynix_get_read_retry_default:
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
 	ccmp	w8, 8, 4, hi
-	beq	.L1554
+	beq	.L1578
 	cmp	w8, 7
 	mov	w0, 32
 	mov	w1, 2
 	csel	w1, w1, w0, ne
-.L1515:
+.L1539:
 	adrp	x6, .LANCHOR156
 	mov	x2, 0
 	ldr	x0, [x6, #:lo12:.LANCHOR156]
-.L1516:
+.L1540:
 	ldr	w3, [x4, 2048]
 	strb	w3, [x0, x2]
 	add	x2, x2, 1
 	cmp	w1, w2, uxtb
-	bhi	.L1516
+	bhi	.L1540
 	cmp	w8, 8
-	bne	.L1517
+	bne	.L1541
 	mov	w1, 0
-.L1519:
+.L1543:
 	ldrb	w2, [x0]
 	cmp	w2, 50
-	beq	.L1518
+	beq	.L1542
 	ldrb	w2, [x0, 1]
 	cmp	w2, 5
-	beq	.L1518
+	beq	.L1542
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1519
-.L1520:
-	adrp	x0, .LC94
+	bne	.L1543
+.L1544:
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1522:
-	b	.L1522
-.L1508:
+.L1546:
+	b	.L1546
+.L1532:
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	cmp	w8, 4
-	bne	.L1510
+	bne	.L1534
 	mov	w0, 64
 	str	w6, [x4, 2052]
 	str	w0, [x4, 2048]
 	mov	w0, 204
-.L1597:
+.L1621:
 	str	w0, [x4, 2052]
 	mov	w0, 77
-	b	.L1598
-.L1510:
+	b	.L1622
+.L1534:
 	cmp	w20, 1
-	bhi	.L1512
+	bhi	.L1536
 	ldrb	w0, [x7, 128]
 	str	w0, [x4, 2052]
 	mov	w0, 82
-.L1598:
+.L1622:
 	str	w0, [x4, 2048]
-.L1511:
+.L1535:
 	mov	w0, 22
 	str	w0, [x4, 2056]
 	mov	w0, 23
@@ -9277,185 +9472,185 @@ hynix_get_read_retry_default:
 	cmp	w8, 6
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-	bne	.L1513
+	bne	.L1537
 	mov	w0, 31
 	str	w0, [x4, 2052]
-.L1514:
+.L1538:
 	mov	w0, 2
-	b	.L1599
-.L1512:
+	b	.L1623
+.L1536:
 	cmp	w8, 7
-	bne	.L1511
+	bne	.L1535
 	mov	w0, 174
 	str	w0, [x4, 2052]
 	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1597
-.L1513:
+	b	.L1621
+.L1537:
 	str	wzr, [x4, 2052]
-	b	.L1514
-.L1554:
+	b	.L1538
+.L1578:
 	mov	w1, 16
-	b	.L1515
-.L1518:
+	b	.L1539
+.L1542:
 	cmp	w1, 6
-	bhi	.L1520
-.L1521:
+	bhi	.L1544
+.L1545:
 	ldr	x3, [x6, #:lo12:.LANCHOR156]
 	mov	x0, 0
-.L1531:
+.L1555:
 	cmp	w15, w0
-	bgt	.L1532
+	bgt	.L1556
 	ldr	x1, [x6, #:lo12:.LANCHOR156]
 	mov	w6, 8
 	add	x2, x1, x21
-.L1534:
+.L1558:
 	mov	x0, 0
-.L1533:
+.L1557:
 	ldrh	w16, [x2, x0, lsl 1]
 	mvn	w16, w16
 	strh	w16, [x2, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w14, w0
-	bgt	.L1533
+	bgt	.L1557
 	add	x2, x2, x22, uxtw 1
 	subs	w6, w6, #1
-	bne	.L1534
+	bne	.L1558
 	mov	x6, x1
 	mov	w16, 0
 	mov	w26, 1
-.L1535:
+.L1559:
 	mov	w0, 0
 	mov	w2, 0
-.L1539:
+.L1563:
 	mov	x30, x6
 	lsl	w25, w26, w2
 	mov	w24, 16
 	mov	w17, 0
-.L1537:
+.L1561:
 	ldrh	w27, [x30]
 	add	x30, x30, x21
 	bics	wzr, w25, w27
 	cinc	w17, w17, eq
 	subs	w24, w24, #1
-	bne	.L1537
+	bne	.L1561
 	cmp	w17, 8
-	bls	.L1538
+	bls	.L1562
 	orr	w0, w0, w25
 	and	w0, w0, 65535
-.L1538:
+.L1562:
 	add	w2, w2, 1
 	cmp	w2, 16
-	bne	.L1539
+	bne	.L1563
 	strh	w0, [x6], 2
 	add	w16, w16, 1
 	cmp	w14, w16
-	bgt	.L1535
+	bgt	.L1559
 	mov	x0, 0
 	mov	w2, 0
-.L1542:
+.L1566:
 	ldr	w6, [x1, x0]
 	add	x0, x0, 4
 	cmp	w6, 0
 	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1542
+	bne	.L1566
 	cmp	w2, 7
-	ble	.L1543
+	ble	.L1567
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	rknand_print_hex
-	adrp	x0, .LC94
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1544:
-	b	.L1544
-.L1517:
+.L1568:
+	b	.L1568
+.L1541:
 	cmp	w8, 7
-	bne	.L1523
+	bne	.L1547
 	mov	w1, 0
-.L1525:
+.L1549:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1524
+	beq	.L1548
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1524
+	beq	.L1548
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1525
-.L1526:
-	adrp	x0, .LC94
+	bne	.L1549
+.L1550:
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1527:
-	b	.L1527
-.L1524:
+.L1551:
+	b	.L1551
+.L1548:
 	cmp	w1, 6
-	bls	.L1521
-	b	.L1526
-.L1523:
+	bls	.L1545
+	b	.L1550
+.L1547:
 	cmp	w8, 6
-	bne	.L1521
+	bne	.L1545
 	mov	x1, 0
-.L1528:
+.L1552:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1521
+	beq	.L1545
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1521
+	beq	.L1545
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1528
-	adrp	x0, .LC94
+	bne	.L1552
+	adrp	x0, .LC98
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC94
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L1530:
-	b	.L1530
-.L1532:
+.L1554:
+	b	.L1554
+.L1556:
 	ldr	w1, [x4, 2048]
 	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1531
-.L1543:
+	b	.L1555
+.L1567:
 	cmp	w8, 6
-	beq	.L1556
+	beq	.L1580
 	cmp	w8, 7
-	beq	.L1557
+	beq	.L1581
 	cmp	w8, 8
 	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1545:
+.L1569:
 	mov	x1, x5
 	mov	w5, 0
-.L1546:
+.L1570:
 	mov	x2, 0
-.L1547:
+.L1571:
 	ldrb	w6, [x3, x2]
 	strb	w6, [x1, x2]
 	add	x2, x2, 1
 	cmp	w10, w2, uxtb
-	bhi	.L1547
+	bhi	.L1571
 	add	w5, w5, 1
 	add	x3, x3, x13
 	add	x1, x1, x0
 	cmp	w23, w5
-	bgt	.L1546
+	bgt	.L1570
 	mov	w5, 255
 	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1549
+	bhi	.L1573
 	mov	w0, 54
 	str	w0, [x4, 2056]
 	ldrb	w0, [x7, 128]
@@ -9470,40 +9665,40 @@ hynix_get_read_retry_default:
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
 	str	w5, [x4, 2052]
-.L1600:
+.L1624:
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	add	w11, w11, 1
 	and	w11, w11, 255
-	b	.L1507
-.L1556:
+	b	.L1531
+.L1580:
 	mov	x0, 4
-	b	.L1545
-.L1557:
+	b	.L1569
+.L1581:
 	mov	x0, 10
-	b	.L1545
-.L1549:
+	b	.L1569
+.L1573:
 	cmp	w8, 8
-	bne	.L1551
+	bne	.L1575
 	mov	w0, 190
-	b	.L1600
-.L1551:
+	b	.L1624
+.L1575:
 	mov	w0, 56
-	b	.L1600
+	b	.L1624
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR30+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+19]
+	adrp	x0, .LANCHOR31+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 7
-	bhi	.L1601
+	bhi	.L1625
 	b	hynix_get_read_retry_default
-.L1601:
+.L1625:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9513,36 +9708,36 @@ flash_get_read_retry_tbl:
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR157
-	adrp	x1, .LANCHOR27
+	adrp	x1, .LANCHOR28
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
 	strb	wzr, [x0, #:lo12:.LANCHOR157]
-	bne	.L1604
+	bne	.L1628
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1605
-	adrp	x22, .LC99
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC99
-	add	x23, x23, :lo12:.LC98
-.L1606:
+	tbnz	x0, 1, .L1629
+	adrp	x22, .LC103
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC102
+.L1630:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1609
+	tbnz	x0, 20, .L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1606
+	bne	.L1630
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -9554,39 +9749,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1606
-.L1605:
-	adrp	x22, .LC97
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC98
-.L1607:
+	b	.L1630
+.L1629:
+	adrp	x22, .LC101
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC101
+	add	x23, x23, :lo12:.LC102
+.L1631:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1609
+	bge	.L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1608
+	tbz	x0, 13, .L1632
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1608
+	tbz	x0, 17, .L1632
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	ubfx	x1, x1, 17, 1
-.L1641:
+.L1665:
 	bl	printf
-	b	.L1609
-.L1608:
+	b	.L1633
+.L1632:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1607
+	bne	.L1631
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9600,37 +9795,37 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1607
+	tbz	x0, 13, .L1631
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR157]
-.L1609:
-	adrp	x0, .LANCHOR46+32
+.L1633:
+	adrp	x0, .LANCHOR47+32
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR46+32]
+	str	wzr, [x0, #:lo12:.LANCHOR47+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1604:
+.L1628:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1615
-	adrp	x22, .LC99
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC99
-	add	x23, x23, :lo12:.LC98
-.L1616:
+	tbnz	x0, 1, .L1639
+	adrp	x22, .LC103
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC103
+	add	x23, x23, :lo12:.LC102
+.L1640:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1609
+	tbnz	x0, 20, .L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1616
+	bne	.L1640
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -9642,34 +9837,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1616
-.L1615:
-	adrp	x22, .LC97
-	adrp	x23, .LC98
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC98
-.L1617:
+	b	.L1640
+.L1639:
+	adrp	x22, .LC101
+	adrp	x23, .LC102
+	add	x22, x22, :lo12:.LC101
+	add	x23, x23, :lo12:.LC102
+.L1641:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1609
+	bge	.L1633
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1618
+	tbz	x0, 13, .L1642
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1618
-	adrp	x0, .LC100
+	tbz	x0, 17, .L1642
+	adrp	x0, .LC104
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC100
-	b	.L1641
-.L1618:
+	add	x0, x0, :lo12:.LC104
+	b	.L1665
+.L1642:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1617
+	bne	.L1641
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9682,7 +9877,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1617
+	b	.L1641
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9703,20 +9898,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1661
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	cbnz	w22, .L1685
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L1644
+	bne	.L1668
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1645:
+.L1669:
 	cmp	w2, w19
-	bcc	.L1649
+	bcc	.L1673
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9725,35 +9920,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1651
+	bne	.L1675
 	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1651:
-	tbz	x19, 13, .L1652
+.L1675:
+	tbz	x19, 13, .L1676
 	adrp	x1, .LANCHOR157
 	ldrb	w1, [x1, #:lo12:.LANCHOR157]
-	cbz	w1, .L1652
+	cbz	w1, .L1676
 	mov	w1, w19
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1680:
+.L1704:
 	mov	w0, -1
-.L1643:
+.L1667:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1649:
+.L1673:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9764,70 +9959,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1663
+	tbnz	x1, 2, .L1687
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1663
+	tbnz	x1, 18, .L1687
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1647
+	ble	.L1671
 	ubfx	x1, x1, 3, 7
-.L1648:
+.L1672:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1646:
+.L1670:
 	add	w2, w2, 1
-	b	.L1645
-.L1647:
+	b	.L1669
+.L1671:
 	ubfx	x1, x1, 19, 7
-	b	.L1648
-.L1663:
+	b	.L1672
+.L1687:
 	mov	w0, -1
-	b	.L1646
-.L1644:
-	adrp	x0, .LANCHOR43
+	b	.L1670
+.L1668:
+	adrp	x0, .LANCHOR44
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	mov	w2, 0
-	adrp	x6, .LANCHOR46
+	adrp	x6, .LANCHOR47
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1654:
+.L1678:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1655
+	bcc	.L1679
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1656:
+.L1680:
 	cmp	w3, w19
-	bcc	.L1660
+	bcc	.L1684
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1652
+	bne	.L1676
 	mov	w1, w19
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1680
-.L1655:
-	ldr	x7, [x6, #:lo12:.LANCHOR46]
+	b	.L1704
+.L1679:
+	ldr	x7, [x6, #:lo12:.LANCHOR47]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -9843,16 +10038,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1654
-.L1660:
+	b	.L1678
+.L1684:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1666
+	tbnz	x1, 2, .L1690
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1666
+	tbnz	x1, 15, .L1690
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9865,42 +10060,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1658
+	bls	.L1682
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1679:
+.L1703:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1657:
+.L1681:
 	add	w3, w3, 1
-	b	.L1656
-.L1658:
+	b	.L1680
+.L1682:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1679
-.L1666:
+	b	.L1703
+.L1690:
 	mov	w0, -1
-	b	.L1657
-.L1652:
+	b	.L1681
+.L1676:
 	cmn	w0, #1
-	beq	.L1643
+	beq	.L1667
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1643
+	bne	.L1667
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1643
+	bne	.L1667
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1643
-.L1661:
+	b	.L1667
+.L1685:
 	mov	w0, 0
-	b	.L1643
+	b	.L1667
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9924,22 +10119,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1682
+	tbz	x0, 4, .L1706
 	mov	w3, w1
-	adrp	x0, .LC104
+	adrp	x0, .LC108
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1682:
+.L1706:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	adrp	x7, .LANCHOR16
-	cbnz	w23, .L1683
+	cbnz	w23, .L1707
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1684:
+.L1708:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9956,12 +10151,12 @@ flash_read_page:
 	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1686
-	cbz	w23, .L1686
+	bne	.L1710
+	cbz	w23, .L1710
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1695:
+.L1719:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9977,7 +10172,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9985,23 +10180,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1683:
+.L1707:
 	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1685
+	bne	.L1709
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1684
-.L1685:
+	b	.L1708
+.L1709:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1684
-.L1686:
+	b	.L1708
+.L1710:
 	mov	w0, w20
-	b	.L1695
+	b	.L1719
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -10012,7 +10207,7 @@ micron_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w0, 255
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w22, w1
@@ -10020,7 +10215,7 @@ micron_read_retrial:
 	mov	x25, x2
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
-	ldrb	w20, [x0, #:lo12:.LANCHOR43]
+	ldrb	w20, [x0, #:lo12:.LANCHOR44]
 	and	x19, x24, 255
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
@@ -10039,12 +10234,12 @@ micron_read_retrial:
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1697:
+.L1721:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1702
-.L1701:
+	bcc	.L1726
+.L1725:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -10058,22 +10253,22 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1703
+	bcc	.L1727
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1703:
+.L1727:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1704
-	adrp	x0, .LC106
+	bne	.L1728
+	adrp	x0, .LC110
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC106
+	add	x0, x0, :lo12:.LC110
 	bl	printf
-.L1704:
+.L1728:
 	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
@@ -10083,7 +10278,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1702:
+.L1726:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -10104,19 +10299,19 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1698
+	tbz	x0, 12, .L1722
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
 	mov	w2, w22
 	mov	w1, w21
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1698:
+.L1722:
 	cmn	w7, #1
-	beq	.L1699
+	beq	.L1723
 	adrp	x0, .LANCHOR156
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
@@ -10124,13 +10319,13 @@ micron_read_retrial:
 	ldr	x25, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x26, [x0, #:lo12:.LANCHOR158]
-	bcc	.L1705
-.L1699:
+	bcc	.L1729
+.L1723:
 	mov	w21, w27
-	b	.L1697
-.L1705:
+	b	.L1721
+.L1729:
 	mov	w28, w7
-	b	.L1701
+	b	.L1725
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -10152,14 +10347,14 @@ toshiba_3d_read_retrial:
 	mov	x26, x2
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR13
-	adrp	x22, .LANCHOR23
+	adrp	x22, .LANCHOR24
 	mov	w1, 46
 	mov	w2, 56
 	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	and	x0, x24, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	mov	w19, -1
 	add	x21, x25, x21, lsl 8
 	mov	w20, 1
@@ -10170,18 +10365,18 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR23
-	cbnz	w4, .L1720
+	add	x0, x22, :lo12:.LANCHOR24
+	cbnz	w4, .L1744
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1727:
+.L1751:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1721
+	bne	.L1745
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -10189,7 +10384,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1722:
+.L1746:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -10199,60 +10394,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1723
+	tbz	x0, 4, .L1747
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1723:
+.L1747:
 	cmn	w4, #1
-	beq	.L1724
+	beq	.L1748
 	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
 	ldr	x26, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1742
-.L1724:
+	bcc	.L1766
+.L1748:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1727
-.L1726:
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+	bne	.L1751
+.L1750:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1728
+	bne	.L1752
 	mov	w2, 0
-.L1765:
+.L1789:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1729
-.L1721:
+	b	.L1753
+.L1745:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1722
-.L1742:
+	b	.L1746
+.L1766:
 	mov	w19, w4
-	b	.L1726
-.L1728:
+	b	.L1750
+.L1752:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1729:
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+.L1753:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1738
+	bne	.L1762
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -10261,27 +10456,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1738:
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+.L1762:
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1739
+	bcc	.L1763
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1739:
+.L1763:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1740
-	adrp	x0, .LC109
+	bne	.L1764
+	adrp	x0, .LC113
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1740:
+.L1764:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10291,23 +10486,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1720:
+.L1744:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1736:
+.L1760:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1730
+	bne	.L1754
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1764:
+.L1788:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10319,54 +10514,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1732
+	tbz	x0, 4, .L1756
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1732:
+.L1756:
 	cmn	w4, #1
-	beq	.L1733
+	beq	.L1757
 	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
 	ldr	x26, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1743
-.L1733:
+	bcc	.L1767
+.L1757:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1736
-.L1735:
-	ldrb	w0, [x22, #:lo12:.LANCHOR23]
+	bne	.L1760
+.L1759:
+	ldrb	w0, [x22, #:lo12:.LANCHOR24]
 	cmp	w0, 36
-	bne	.L1737
+	bne	.L1761
 	mov	w2, 1
-	b	.L1765
-.L1730:
+	b	.L1789
+.L1754:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1764
-.L1743:
+	b	.L1788
+.L1767:
 	mov	w19, w4
-	b	.L1735
-.L1737:
+	b	.L1759
+.L1761:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1729
+	b	.L1753
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10387,86 +10582,86 @@ toshiba_read_retrial:
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR24
 	str	x1, [x29, 120]
 	ldr	x22, [x0, #:lo12:.LANCHOR13]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR23]
+	ldrb	w0, [x1, #:lo12:.LANCHOR24]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1784
-	adrp	x0, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1785
+	bls	.L1808
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbz	w0, .L1809
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1768:
+.L1792:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1767:
+.L1791:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1769:
+.L1793:
 	adrp	x0, .LANCHOR159
 	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1778
+	bcc	.L1802
 	mov	w28, w24
-.L1777:
+.L1801:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1779
+	bhi	.L1803
 	bl	sandisk_set_rr_para
-.L1780:
+.L1804:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1781
+	bcc	.L1805
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1781:
+.L1805:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1782
-	adrp	x0, .LC109
+	bne	.L1806
+	adrp	x0, .LC113
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1782:
+.L1806:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1766
+	cbz	w23, .L1790
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1766:
+.L1790:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10475,36 +10670,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1785:
+.L1809:
 	mov	w23, 0
-	b	.L1768
-.L1784:
+	b	.L1792
+.L1808:
 	mov	w23, 0
-	b	.L1767
-.L1778:
+	b	.L1791
+.L1802:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1770
+	bhi	.L1794
 	bl	sandisk_set_rr_para
-.L1771:
+.L1795:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 34
-	bne	.L1772
+	bne	.L1796
 	adrp	x0, .LANCHOR159
 	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1772
+	bne	.L1796
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1772:
+.L1796:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10519,27 +10714,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1775
+	beq	.L1799
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
 	adrp	x0, .LANCHOR156
 	ldr	x26, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x27, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1777
-.L1775:
+	bcc	.L1801
+.L1799:
 	add	w20, w20, 1
-	b	.L1769
-.L1770:
+	b	.L1793
+.L1794:
 	bl	toshiba_set_rr_para
-	b	.L1771
-.L1779:
+	b	.L1795
+.L1803:
 	bl	toshiba_set_rr_para
-	b	.L1780
+	b	.L1804
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10550,11 +10745,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR26
+	adrp	x0, .LANCHOR27
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR26]
+	ldr	x28, [x0, #:lo12:.LANCHOR27]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -10567,37 +10762,37 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR43
-	add	x6, x6, :lo12:.LANCHOR43
+	adrp	x6, .LANCHOR44
+	add	x6, x6, :lo12:.LANCHOR44
 	mov	w5, 0
 	adrp	x7, .LANCHOR156
 	adrp	x8, .LANCHOR158
-.L1799:
+.L1823:
 	cmp	w5, w24
-	bcc	.L1804
-.L1803:
-	adrp	x0, .LANCHOR43
+	bcc	.L1828
+.L1827:
+	adrp	x0, .LANCHOR44
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1805
+	bcc	.L1829
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1805:
+.L1829:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1806
-	adrp	x0, .LC110
+	bne	.L1830
+	adrp	x0, .LC114
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC110
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1806:
+.L1830:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10607,7 +10802,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1804:
+.L1828:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10628,7 +10823,7 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1801
+	beq	.L1825
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
@@ -10636,13 +10831,13 @@ hynix_read_retrial:
 	ldr	x26, [x8, #:lo12:.LANCHOR158]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1807
-.L1801:
+	bcc	.L1831
+.L1825:
 	add	w5, w5, 1
-	b	.L1799
-.L1807:
+	b	.L1823
+.L1831:
 	mov	w19, w0
-	b	.L1803
+	b	.L1827
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10660,25 +10855,25 @@ flash_ddr_tuning_read:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR43
+	adrp	x25, .LANCHOR44
 	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	add	x25, x25, :lo12:.LANCHOR43
+	add	x25, x25, :lo12:.LANCHOR44
 	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC111
+	adrp	x0, .LC115
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC111
+	add	x0, x0, :lo12:.LC115
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1823:
+.L1847:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -10692,7 +10887,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1818
+	tbz	x0, 4, .L1842
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -10702,47 +10897,47 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1818:
+.L1842:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1819
+	bhi	.L1843
 	adrp	x0, .LANCHOR156
 	ldr	x23, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR158
 	ldr	x24, [x0, #:lo12:.LANCHOR158]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1829
+	bcs	.L1853
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1829
+	bls	.L1853
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1821:
+.L1845:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1822:
-	cbz	w28, .L1824
-	adrp	x0, .LANCHOR43
+.L1846:
+	cbz	w28, .L1848
+	adrp	x0, .LANCHOR44
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1824
+	bls	.L1848
 	mov	w1, w28
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
 	mov	w0, w28
-.L1840:
+.L1864:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1817
+	cbz	w21, .L1841
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -10750,8 +10945,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -10766,22 +10961,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w19, w0
-	bhi	.L1831
+	bhi	.L1855
 	adrp	x1, .LANCHOR160
 	ldr	w0, [x1, #:lo12:.LANCHOR160]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
 	cmp	w0, 100
-	bls	.L1827
-	adrp	x0, .LANCHOR20
-	strb	wzr, [x0, #:lo12:.LANCHOR20]
-.L1817:
+	bls	.L1851
+	adrp	x0, .LANCHOR21
+	strb	wzr, [x0, #:lo12:.LANCHOR21]
+.L1841:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10790,38 +10985,38 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1819:
+.L1843:
 	cmp	w27, w26
-	bls	.L1830
+	bls	.L1854
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1822
+	bhi	.L1846
 	mov	w26, w27
-.L1830:
+.L1854:
 	mov	w27, 0
-	b	.L1820
-.L1829:
+	b	.L1844
+.L1853:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1820:
+.L1844:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1823
-	b	.L1821
-.L1824:
+	bne	.L1847
+	b	.L1845
+.L1848:
 	ldrb	w0, [x29, 132]
-	b	.L1840
-.L1831:
+	b	.L1864
+.L1855:
 	mov	w19, w21
-.L1827:
-	adrp	x20, .LANCHOR42
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+.L1851:
+	adrp	x20, .LANCHOR43
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
 	bl	flash_set_interface_mode
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
 	bl	nandc_set_if_mode
-	b	.L1817
+	b	.L1841
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10843,59 +11038,59 @@ flash_read_page_en:
 	mov	w24, w4
 	mov	x25, x0
 	cmp	w1, w20
-	bhi	.L1842
+	bhi	.L1866
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
 	mov	w2, 398
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1842:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L1866:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w21, [x0, w20, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
 	cmp	w0, w20
-	bcs	.L1843
+	bcs	.L1867
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbnz	x0, 6, .L1844
-.L1868:
+	tbnz	x0, 6, .L1868
+.L1892:
 	mov	w0, -1
-.L1841:
+.L1865:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1844:
+.L1868:
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w21
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
+	adrp	x0, .LC119
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-	b	.L1868
-.L1843:
+	b	.L1892
+.L1867:
 	tst	x19, 50331648
-	bne	.L1846
+	bne	.L1870
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1847
+	cbz	w0, .L1871
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1846
-.L1847:
+	cbz	w0, .L1870
+.L1871:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1848
+	cbz	w1, .L1872
 	add	w19, w0, w19, lsl 1
-.L1846:
+.L1870:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10903,25 +11098,25 @@ flash_read_page_en:
 	mov	w0, w21
 	bl	flash_read_page
 	cmn	w0, #1
-	bne	.L1841
-	adrp	x20, .LANCHOR45
-	ldrb	w25, [x20, #:lo12:.LANCHOR45]
-	cbnz	w25, .L1849
-.L1852:
+	bne	.L1865
+	adrp	x20, .LANCHOR46
+	ldrb	w25, [x20, #:lo12:.LANCHOR46]
+	cbnz	w25, .L1873
+.L1876:
 	adrp	x0, .LANCHOR162
 	ldr	x5, [x0, #:lo12:.LANCHOR162]
-	cbnz	x5, .L1850
-.L1851:
-	ldrb	w4, [x20, #:lo12:.LANCHOR45]
+	cbnz	x5, .L1874
+.L1875:
+	ldrb	w4, [x20, #:lo12:.LANCHOR46]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-	adrp	x0, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1868
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbz	w0, .L1892
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10933,25 +11128,25 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L1848:
+.L1872:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1846
-.L1849:
-	strb	wzr, [x20, #:lo12:.LANCHOR45]
+	b	.L1870
+.L1873:
+	strb	wzr, [x20, #:lo12:.LANCHOR46]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w21
 	bl	flash_read_page
-	strb	w25, [x20, #:lo12:.LANCHOR45]
+	strb	w25, [x20, #:lo12:.LANCHOR46]
 	cmn	w0, #1
-	beq	.L1852
-	b	.L1841
-.L1850:
+	beq	.L1876
+	b	.L1865
+.L1874:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10959,8 +11154,8 @@ flash_read_page_en:
 	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L1851
-	b	.L1841
+	beq	.L1875
+	b	.L1865
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10976,10 +11171,10 @@ flash_get_last_written_page:
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
 	ldrh	w19, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR30+26
+	adrp	x0, .LANCHOR31+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR30+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR31+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -10990,23 +11185,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1870
+	bne	.L1894
 	mov	w27, 0
 	mov	w28, 2
-.L1871:
+.L1895:
 	cmp	w27, w19
-	ble	.L1874
-.L1870:
+	ble	.L1898
+.L1894:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1875
+	tbz	x0, 12, .L1899
 	ldr	w3, [x22]
-	adrp	x0, .LC117
+	adrp	x0, .LC121
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC117
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L1875:
+.L1899:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11015,7 +11210,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1874:
+.L1898:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -11025,25 +11220,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1872
+	bne	.L1896
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1871
-.L1872:
+	b	.L1895
+.L1896:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1871
+	b	.L1895
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR102
+	adrp	x4, .LANCHOR66
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR102]
+	ldrh	w4, [x4, #:lo12:.LANCHOR66]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -11062,20 +11257,20 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR42
+	adrp	x20, .LANCHOR43
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
-	adrp	x19, .LANCHOR20
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+	adrp	x19, .LANCHOR21
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR20]
+	strb	w21, [x19, #:lo12:.LANCHOR21]
 	adrp	x24, .LANCHOR164
 	bl	flash_set_interface_mode
 	adrp	x25, .LANCHOR163
-	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
 	bl	nandc_set_if_mode
 	ldr	x3, [x25, #:lo12:.LANCHOR163]
 	mov	w4, 4
@@ -11091,15 +11286,15 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1882
-	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1882
+	bne	.L1906
+	ldrb	w1, [x20, #:lo12:.LANCHOR43]
+	tbz	x1, 0, .L1906
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1883:
+	strb	wzr, [x19, #:lo12:.LANCHOR21]
+.L1907:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11107,10 +11302,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1882:
+.L1906:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1883
+	strb	w1, [x0, #:lo12:.LANCHOR21]
+	b	.L1907
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -11130,81 +11325,81 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1889
+	bhi	.L1913
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
 	mov	w2, 886
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1889:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L1913:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w6, [x0, w23, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1890
+	cbnz	w20, .L1914
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1890:
-	adrp	x0, .LANCHOR19+16
+.L1914:
+	adrp	x0, .LANCHOR20+16
 	and	x1, x6, 255
 	and	w3, w19, 255
 	lsr	w2, w19, 8
-	ldrb	w0, [x0, #:lo12:.LANCHOR19+16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR20+16]
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1891
+	bne	.L1915
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1902:
+.L1926:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1900:
+.L1924:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1894
-	cbz	w20, .L1894
+	bne	.L1918
+	cbz	w20, .L1918
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1901:
+.L1925:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x4, x22
 	mov	x3, x21
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, w6
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x23, [sp, 48]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1891:
+.L1915:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1893
+	bne	.L1917
 	mov	w4, 5
-	b	.L1902
-.L1893:
+	b	.L1926
+.L1917:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11215,10 +11410,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1900
-.L1894:
+	b	.L1924
+.L1918:
 	mov	w0, w19
-	b	.L1901
+	b	.L1925
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11241,26 +11436,26 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1904
+	bhi	.L1928
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
 	mov	w2, 1008
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1904:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L1928:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w22, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1905
+	cbnz	w21, .L1929
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1905:
+.L1929:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11279,14 +11474,14 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1906
-	cbz	w21, .L1906
+	bne	.L1930
+	cbz	w21, .L1930
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1933:
-	adrp	x20, .LANCHOR30
-	add	x28, x20, :lo12:.LANCHOR30
+.L1957:
+	adrp	x20, .LANCHOR31
+	add	x28, x20, :lo12:.LANCHOR31
 	bl	nandc_set_seed
 	mov	x4, x25
 	mov	x3, x24
@@ -11295,36 +11490,36 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1908
-	adrp	x26, .LANCHOR45
-	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1909
+	bne	.L1932
+	adrp	x26, .LANCHOR46
+	ldrb	w27, [x26, #:lo12:.LANCHOR46]
+	cbz	w27, .L1933
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR45]
+	strb	wzr, [x26, #:lo12:.LANCHOR46]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1910
-.L1915:
+	strb	w27, [x26, #:lo12:.LANCHOR46]
+	cbnz	w21, .L1934
+.L1939:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1910
-	adrp	x1, .LANCHOR43
-	ldrb	w1, [x1, #:lo12:.LANCHOR43]
+	cbz	w1, .L1934
+	adrp	x1, .LANCHOR44
+	ldrb	w1, [x1, #:lo12:.LANCHOR44]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1910
-	add	x20, x20, :lo12:.LANCHOR30
+	blt	.L1934
+	add	x20, x20, :lo12:.LANCHOR31
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1903:
+.L1927:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11332,32 +11527,32 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1906:
+.L1930:
 	mov	w0, w19
-	b	.L1933
-.L1910:
+	b	.L1957
+.L1934:
 	cmn	w0, #1
-	bne	.L1903
-.L1916:
+	bne	.L1927
+.L1940:
 	adrp	x0, .LANCHOR162
 	ldr	x5, [x0, #:lo12:.LANCHOR162]
-	cbnz	x5, .L1912
-.L1914:
-	adrp	x0, .LANCHOR45
+	cbnz	x5, .L1936
+.L1938:
+	adrp	x0, .LANCHOR46
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	ldrb	w4, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-	adrp	x0, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1913
+	adrp	x0, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR21]
+	cbnz	w0, .L1937
 	mov	w0, -1
-	b	.L1903
-.L1912:
-	add	x0, x20, :lo12:.LANCHOR30
+	b	.L1927
+.L1936:
+	add	x0, x20, :lo12:.LANCHOR31
 	mov	x3, x25
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
@@ -11365,10 +11560,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1914
-	b	.L1903
-.L1913:
-	add	x20, x20, :lo12:.LANCHOR30
+	beq	.L1938
+	b	.L1927
+.L1937:
+	add	x20, x20, :lo12:.LANCHOR31
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -11381,12 +11576,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1908:
-	cbz	w21, .L1915
-	b	.L1903
-.L1909:
-	cbnz	w21, .L1916
-	b	.L1915
+.L1932:
+	cbz	w21, .L1939
+	b	.L1927
+.L1933:
+	cbnz	w21, .L1940
+	b	.L1939
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -11402,60 +11597,60 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1935
-.L1964:
+	bne	.L1959
+.L1992:
 	mov	w21, 0
-	b	.L1934
-.L1935:
+	b	.L1958
+.L1959:
 	adrp	x19, .LANCHOR50
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR50
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
-	ldr	w24, [x1, 40]
+	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 10
-	bhi	.L1964
-	adrp	x1, .L1938
-	add	x1, x1, :lo12:.L1938
+	bhi	.L1992
+	adrp	x1, .L1962
+	add	x1, x1, :lo12:.L1962
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1938
+	adr	x3, .Lrtx1962
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1938:
+.Lrtx1962:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1938:
-	.2byte	(.L1937 - .Lrtx1938) / 4
-	.2byte	(.L1939 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1941 - .Lrtx1938) / 4
-	.2byte	(.L1942 - .Lrtx1938) / 4
-	.2byte	(.L1943 - .Lrtx1938) / 4
-	.2byte	(.L1940 - .Lrtx1938) / 4
-	.2byte	(.L1943 - .Lrtx1938) / 4
+.L1962:
+	.2byte	(.L1961 - .Lrtx1962) / 4
+	.2byte	(.L1963 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1965 - .Lrtx1962) / 4
+	.2byte	(.L1966 - .Lrtx1962) / 4
+	.2byte	(.L1967 - .Lrtx1962) / 4
+	.2byte	(.L1964 - .Lrtx1962) / 4
+	.2byte	(.L1967 - .Lrtx1962) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1937:
+.L1961:
 	mov	w1, 64
-	mov	w0, w24
+	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1964
+	tbz	x0, 6, .L1992
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1945
+	cbz	x2, .L1969
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR123
 	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1945:
+.L1969:
 	add	x19, x19, :lo12:.LANCHOR50
-	mov	w0, w24
+	mov	w0, w21
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
@@ -11465,12 +11660,12 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1964
-.L1939:
+	b	.L1992
+.L1963:
 	mov	w1, 64
-	mov	w0, w24
+	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1964
+	tbz	x0, 6, .L1992
 	add	x0, x19, :lo12:.LANCHOR50
 	lsl	x2, x20, 6
 	add	x1, x0, x2
@@ -11478,23 +11673,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1946
+	cbz	x0, .L1970
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR123
 	ldrb	w1, [x1, #:lo12:.LANCHOR123]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1946:
+.L1970:
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1947
+	cbz	x1, .L1971
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR123
 	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1947:
+.L1971:
 	add	x22, x19, :lo12:.LANCHOR50
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -11509,15 +11704,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1948
+	beq	.L1972
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1949
+	beq	.L1973
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1949
-.L1948:
+	beq	.L1973
+.L1972:
 	add	x22, x19, :lo12:.LANCHOR50
 	adrp	x2, .LANCHOR123
 	add	x22, x22, x20, lsl 6
@@ -11531,36 +11726,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1950
+	beq	.L1974
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1950
+	beq	.L1974
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1950
+	tbz	x1, 6, .L1974
 	ldr	w3, [x0]
-	adrp	x0, .LC119
+	adrp	x0, .LC123
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1950:
+.L1974:
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1949
+	beq	.L1973
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1949
+	beq	.L1973
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 360
 	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1949:
+.L1973:
 	add	x0, x19, :lo12:.LANCHOR50
 	mov	w1, 13
 	add	x20, x0, x20, lsl 6
@@ -11570,16 +11765,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1951
+	beq	.L1975
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1953
+	beq	.L1977
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1953
-.L1951:
+	beq	.L1977
+.L1975:
 	add	x20, x19, :lo12:.LANCHOR50
 	adrp	x2, .LANCHOR123
 	add	x20, x20, x21, lsl 6
@@ -11592,36 +11787,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1955
+	beq	.L1979
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1955
+	beq	.L1979
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1955
+	tbz	x1, 6, .L1979
 	ldr	w3, [x0]
-	adrp	x0, .LC119
+	adrp	x0, .LC123
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1955:
+.L1979:
 	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1953
+	beq	.L1977
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1953
+	beq	.L1977
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 375
 	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1953:
+.L1977:
 	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, 13
 	add	x21, x19, x21, lsl 6
@@ -11630,81 +11825,129 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1964
-.L1940:
+	b	.L1992
+.L1964:
+	mov	w0, w21
 	mov	w1, 64
-	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1964
-	add	x19, x19, :lo12:.LANCHOR50
+	tbz	x21, 6, .L1992
 	mov	w0, 5
-	add	x20, x19, x20, lsl 6
 	tst	w21, w0
-	beq	.L1963
-	ldrb	w1, [x20, 1]
+	beq	.L1980
+	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, 12
-	ldr	w3, [x20, 40]
+	add	x20, x19, x20, lsl 6
 	mov	w4, 12
-	strb	w0, [x20, 58]
 	mov	w2, w21
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	ldrb	w1, [x20, 1]
+	ldr	w3, [x20, 40]
+	strb	w0, [x20, 58]
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L2024:
+.L2056:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1934
-.L1943:
-	cmp	w2, 11
+	b	.L1958
+.L1980:
 	add	x21, x19, :lo12:.LANCHOR50
+	mov	w0, 13
+	add	x21, x21, x20, lsl 6
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L1992
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L1992
+	adrp	x2, .LANCHOR123
+	adrp	x22, .LANCHOR163
+	ldr	w1, [x21, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
+	adrp	x2, .LANCHOR164
+	ldr	x3, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x2, #:lo12:.LANCHOR164]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1981
+	ldr	x1, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L1992
+.L1981:
+	add	x19, x19, :lo12:.LANCHOR50
+	adrp	x1, .LANCHOR46
+	add	x20, x19, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR46]
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
+	ldrb	w1, [x20, 1]
+	ldr	w2, [x20, 40]
+	bl	printf
+	mov	w0, -1
+	str	w0, [x20, 52]
+	b	.L1992
+.L1967:
+	cmp	w2, 11
+	add	x22, x19, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 10
-	add	x0, x21, x0
+	add	x0, x22, x0
 	csel	w2, w2, w1, eq
-	ubfx	x3, x24, 21, 3
-	mov	x22, x21
-.L1958:
+	ubfx	x3, x21, 21, 3
+.L1983:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1962
+	bne	.L1990
 	mov	w21, -1
-	b	.L1934
-.L1962:
+	b	.L1958
+.L1990:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1958
+	bne	.L1983
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1958
-	mov	w0, w24
+	bne	.L1983
+	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
-	mov	w24, w0
-	and	w21, w0, 64
-	tbz	x24, 6, .L1960
+	mov	w21, w0
+	tbnz	x21, 6, .L1985
+.L2055:
+	mov	w21, 0
+	b	.L1986
+.L1985:
+	tst	x21, 15
+	beq	.L1987
 	add	x22, x22, x20, lsl 6
-	ands	w21, w0, 15
-	beq	.L1961
-	ldrb	w1, [x22, 1]
 	mov	w2, w0
-	ldr	w3, [x22, 40]
 	mov	w4, 12
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
-	mov	w21, w24
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
+	ldrb	w1, [x22, 1]
+	ldr	w3, [x22, 40]
 	bl	printf
 	mov	w0, 12
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L1960:
+.L1986:
 	add	x1, x19, :lo12:.LANCHOR50
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -11712,7 +11955,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1934:
+.L1958:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11721,40 +11964,81 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1961:
+.L1987:
+	add	x21, x22, x20, lsl 6
 	mov	w0, 13
-	str	wzr, [x22, 52]
-	strb	w0, [x22, 58]
-	b	.L1960
-.L1941:
+	strb	w0, [x21, 58]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
+	ldr	w1, [x0, 156]
+	mov	w0, 20041
+	str	wzr, [x21, 52]
+	movk	w0, 0x444b, lsl 16
+	cmp	w1, w0
+	bne	.L2055
+	ldrh	w0, [x21, 50]
+	cbnz	w0, .L2055
+	adrp	x2, .LANCHOR123
+	adrp	x22, .LANCHOR163
+	ldr	w1, [x21, 40]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
+	adrp	x2, .LANCHOR164
+	ldr	x3, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x2, #:lo12:.LANCHOR164]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1989
+	ldr	x1, [x22, #:lo12:.LANCHOR163]
+	ldr	x2, [x21, 24]
+	ldr	w1, [x1]
+	ldr	w2, [x2]
+	cmp	w2, w1
+	beq	.L2055
+.L1989:
+	add	x21, x19, :lo12:.LANCHOR50
+	adrp	x1, .LANCHOR46
+	add	x21, x21, x20, lsl 6
+	mov	w3, w0
+	ldrb	w4, [x1, #:lo12:.LANCHOR46]
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	ldrb	w1, [x21, 1]
+	ldr	w2, [x21, 40]
+	bl	printf
+	mov	w0, -1
+	str	w0, [x21, 52]
+	b	.L2055
+.L1965:
+	mov	w0, w21
 	mov	w1, 32
-	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1964
+	tbz	x21, 5, .L1992
 	add	x19, x19, :lo12:.LANCHOR50
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1963
+	beq	.L1991
 	mov	w0, 12
 	strb	w0, [x20, 58]
-	b	.L2024
-.L1963:
+	b	.L2056
+.L1991:
 	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1964
-.L1942:
+	b	.L1992
+.L1966:
 	mov	w1, 64
-	mov	w0, w24
+	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1964
+	tbz	x0, 6, .L1992
 	add	x19, x19, :lo12:.LANCHOR50
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L1964
+	b	.L1992
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11766,17 +12050,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR54
 	add	x19, x19, :lo12:.LANCHOR54
-.L2026:
+.L2058:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2027
+	bne	.L2059
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2027:
+.L2059:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2026
+	b	.L2058
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11849,14 +12133,14 @@ sblk_read_page:
 	add	x26, x26, :lo12:.LANCHOR168
 	add	x21, x21, :lo12:.LANCHOR50
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR107
-.L2034:
-	cbnz	w20, .L2044
-.L2057:
+	adrp	x27, .LANCHOR103
+.L2066:
+	cbnz	w20, .L2076
+.L2089:
 	adrp	x19, .LANCHOR50
 	add	x19, x19, :lo12:.LANCHOR50
-.L2045:
-	cbnz	w22, .L2047
+.L2077:
+	cbnz	w22, .L2079
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11865,51 +12149,51 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2044:
+.L2076:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2035:
+.L2067:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2036
+	cbnz	w0, .L2068
 	cmp	w20, 1
-	beq	.L2041
+	beq	.L2073
 	ldrb	w0, [x26]
-	cbnz	w0, .L2038
-.L2041:
+	cbnz	w0, .L2070
+.L2073:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2039
-.L2036:
+	b	.L2071
+.L2068:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2035
-.L2038:
+	b	.L2067
+.L2070:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2040
+	bne	.L2072
 	str	w4, [x29, 124]
-	mov	w2, 652
+	mov	w2, 661
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2040:
+.L2072:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2041
-	ldrh	w0, [x27, #:lo12:.LANCHOR107]
+	bne	.L2073
+	ldrh	w0, [x27, #:lo12:.LANCHOR103]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2041
+	bne	.L2073
 	ldr	w0, [x19, 40]
 	adrp	x25, .LANCHOR54
 	ldrb	w24, [x21, x2]
@@ -11935,26 +12219,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2039:
+.L2071:
 	subs	w20, w20, #1
-	beq	.L2057
+	beq	.L2089
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2034
-.L2047:
+	b	.L2066
+.L2079:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 13
-	bne	.L2046
+	bne	.L2078
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2046
+	beq	.L2078
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2046:
+.L2078:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2045
+	b	.L2077
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11981,22 +12265,22 @@ flash_prog_page:
 	and	w23, w1, 2097151
 	ubfx	x25, x21, 24, 2
 	mov	x27, x3
-	tbz	x0, 4, .L2060
-	adrp	x0, .LC122
+	tbz	x0, 4, .L2092
+	adrp	x0, .LC128
 	mov	w3, w4
 	mov	w2, w25
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2060:
+.L2092:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L2061
+	cbnz	w25, .L2093
 	bl	zftl_flash_enter_slc_mode
-.L2062:
+.L2094:
 	add	x19, x24, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -12010,10 +12294,10 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	mov	w0, w23
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x27
 	mov	x2, x26
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -12023,15 +12307,15 @@ flash_prog_page:
 	mov	x0, x22
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2059
-	adrp	x0, .LC123
+	tbz	x2, 2, .L2091
+	adrp	x0, .LC129
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2059:
+.L2091:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12040,9 +12324,9 @@ flash_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2061:
+.L2093:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2062
+	b	.L2094
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12073,10 +12357,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2072
-.L2074:
+	bne	.L2104
+.L2106:
 	mov	w21, -1
-.L2073:
+.L2105:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -12086,9 +12370,9 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2072:
-	adrp	x23, .LANCHOR30
-	add	x23, x23, :lo12:.LANCHOR30
+.L2104:
+	adrp	x23, .LANCHOR31
+	add	x23, x23, :lo12:.LANCHOR31
 	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w1, w19
 	ldr	x2, [x22, #:lo12:.LANCHOR156]
@@ -12096,7 +12380,7 @@ flash_test_blk:
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2106
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
 	ldr	x3, [x21, #:lo12:.LANCHOR158]
@@ -12104,20 +12388,20 @@ flash_test_blk:
 	ldr	x2, [x22, #:lo12:.LANCHOR156]
 	bl	flash_read_page
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2106
 	ldr	x0, [x22, #:lo12:.LANCHOR156]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2074
+	bne	.L2106
 	ldr	x0, [x21, #:lo12:.LANCHOR158]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2073
+	b	.L2105
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12128,45 +12412,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR19
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2082
-	adrp	x20, .LANCHOR30
-	add	x20, x20, :lo12:.LANCHOR30
+	cbnz	w0, .L2114
+	adrp	x20, .LANCHOR31
+	add	x20, x20, :lo12:.LANCHOR31
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2082
+	bhi	.L2114
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2082
+	tbz	x0, 0, .L2114
 	adrp	x21, .LANCHOR138
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR138
 	mov	w25, 65535
 	adrp	x24, .LANCHOR156
-.L2084:
+.L2116:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2085
-.L2082:
+	bhi	.L2117
+.L2114:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2085:
+.L2117:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2082
+	bne	.L2114
 	ldr	x0, [x24, #:lo12:.LANCHOR156]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12179,7 +12463,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2084
+	b	.L2116
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.flash_dual_page_prog,"ax",@progbits
 	.align	2
@@ -12210,25 +12494,25 @@ flash_dual_page_prog:
 	mov	x26, x5
 	and	w20, w1, 2097151
 	ubfx	x24, x21, 24, 2
-	tbz	x2, 4, .L2088
-	adrp	x0, .LC122
+	tbz	x2, 4, .L2120
+	adrp	x0, .LC128
 	mov	w3, w6
 	mov	w2, w24
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2088:
+.L2120:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w24, .L2089
+	cbnz	w24, .L2121
 	bl	zftl_flash_enter_slc_mode
-.L2090:
+.L2122:
 	add	x19, x23, x19, lsl 8
 	mov	w24, 128
 	and	w0, w21, 255
-	adrp	x22, .LANCHOR30
-	add	x22, x22, :lo12:.LANCHOR30
+	adrp	x22, .LANCHOR31
+	add	x22, x22, :lo12:.LANCHOR31
 	mov	w23, 16
 	str	w24, [x19, 2056]
 	str	wzr, [x19, 2052]
@@ -12270,18 +12554,18 @@ flash_dual_page_prog:
 	ldr	x0, [x29, 104]
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2087
+	tbz	x2, 2, .L2119
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2087
-	adrp	x0, .LC123
+	tbz	x0, 12, .L2119
+	adrp	x0, .LC129
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC123
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2087:
+.L2119:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12290,17 +12574,17 @@ flash_dual_page_prog:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2089:
+.L2121:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2090
+	b	.L2122
 	.size	flash_dual_page_prog, .-flash_dual_page_prog
-	.section	.text.fw_flash_page_prog.constprop.25,"ax",@progbits
+	.section	.text.fw_flash_page_prog.constprop.26,"ax",@progbits
 	.align	2
-	.type	fw_flash_page_prog.constprop.25, %function
-fw_flash_page_prog.constprop.25:
+	.type	fw_flash_page_prog.constprop.26, %function
+fw_flash_page_prog.constprop.26:
 	stp	x29, x30, [sp, -64]!
-	adrp	x4, .LANCHOR30
-	add	x4, x4, :lo12:.LANCHOR30
+	adrp	x4, .LANCHOR31
+	add	x4, x4, :lo12:.LANCHOR31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x20, x1
@@ -12309,14 +12593,14 @@ fw_flash_page_prog.constprop.25:
 	str	x23, [sp, 48]
 	ldrb	w19, [x4, 9]
 	udiv	w19, w0, w19
-	adrp	x0, .LANCHOR43
-	ldrb	w23, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR44
+	ldrb	w23, [x0, #:lo12:.LANCHOR44]
 	adrp	x0, .LANCHOR17
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	bl	nandc_bch_sel
 	ldrb	w0, [x4, 7]
 	cmp	w0, 9
-	bne	.L2103
+	bne	.L2135
 	adrp	x22, .LANCHOR156
 	mov	w2, 16384
 	mov	w1, 255
@@ -12330,7 +12614,7 @@ fw_flash_page_prog.constprop.25:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_dual_page_prog
-.L2106:
+.L2138:
 	mov	w3, w0
 	mov	w0, w23
 	bl	nandc_bch_sel
@@ -12340,15 +12624,15 @@ fw_flash_page_prog.constprop.25:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2103:
+.L2135:
 	mov	w4, 4
 	mov	x3, x21
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_prog_page
-	b	.L2106
-	.size	fw_flash_page_prog.constprop.25, .-fw_flash_page_prog.constprop.25
+	b	.L2138
+	.size	fw_flash_page_prog.constprop.26, .-fw_flash_page_prog.constprop.26
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
@@ -12365,20 +12649,20 @@ idb_write_data:
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	ldr	x28, [x22, #:lo12:.LANCHOR135]
-	bls	.L2108
+	ldr	x27, [x22, #:lo12:.LANCHOR135]
+	bls	.L2140
 	cmp	w1, 575
-	bhi	.L2109
+	bhi	.L2141
 	mov	x21, x2
 	mov	w20, w3
-	cbnz	x28, .L2110
+	cbnz	x27, .L2142
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x22, #:lo12:.LANCHOR135]
-	cbnz	x0, .L2111
-.L2116:
+	cbnz	x0, .L2143
+.L2148:
 	mov	w0, -1
-.L2107:
+.L2139:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12386,39 +12670,39 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 272
 	ret
-.L2111:
+.L2143:
 	mov	w2, 262144
 	mov	w1, 0
 	bl	ftl_memset
-.L2110:
+.L2142:
 	adrp	x23, .LANCHOR137
 	ldr	x0, [x23, #:lo12:.LANCHOR137]
-	cbz	x0, .L2113
-.L2117:
+	cbz	x0, .L2145
+.L2149:
 	adrp	x1, .LANCHOR136
 	mov	w2, 1
 	ldr	x0, [x22, #:lo12:.LANCHOR135]
 	cmp	w19, 64
 	str	w2, [x1, #:lo12:.LANCHOR136]
-	bhi	.L2213
+	bhi	.L2246
 	mov	w1, 64
 	sub	w19, w1, w19
 	sub	w2, w20, w19
 	ubfiz	x19, x19, 9, 25
 	lsl	w2, w2, 9
 	add	x1, x21, x19
-.L2219:
+.L2252:
 	bl	ftl_memcpy
-.L2218:
+.L2251:
 	mov	w0, 0
-	b	.L2107
-.L2113:
+	b	.L2139
+.L2145:
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x23, #:lo12:.LANCHOR137]
-	cbnz	x0, .L2117
-	b	.L2116
-.L2213:
+	cbnz	x0, .L2149
+	b	.L2148
+.L2246:
 	mov	w2, 576
 	sub	w2, w2, w19
 	cmp	w20, w2
@@ -12428,504 +12712,522 @@ idb_write_data:
 	lsl	w2, w2, 9
 	mov	x1, x21
 	add	x0, x0, x19
-	b	.L2219
-.L2108:
+	b	.L2252
+.L2140:
 	cmp	w1, 575
-	bls	.L2218
-.L2109:
+	bls	.L2251
+.L2141:
 	adrp	x0, .LANCHOR136
 	ldr	w0, [x0, #:lo12:.LANCHOR136]
-	cbz	w0, .L2218
-	adrp	x1, .LANCHOR30
-	add	x0, x1, :lo12:.LANCHOR30
+	cbz	w0, .L2251
+	adrp	x1, .LANCHOR31
+	add	x0, x1, :lo12:.LANCHOR31
 	str	x1, [x29, 152]
-	adrp	x8, .LANCHOR49
+	adrp	x8, .LANCHOR19
 	ldrb	w20, [x0, 9]
 	ldrh	w19, [x0, 26]
 	adrp	x0, .LANCHOR0
 	mov	x7, x0
 	ldrb	w2, [x0, #:lo12:.LANCHOR0]
-	str	w2, [x29, 160]
+	str	w2, [x29, 188]
 	uxtw	x0, w2
-	cbz	w0, .L2166
-	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	cbz	w0, .L2199
+	ldrb	w0, [x8, #:lo12:.LANCHOR19]
 	cmp	w0, 0
 	cset	w0, eq
-	str	w0, [x29, 164]
-.L2119:
+	str	w0, [x29, 176]
+.L2151:
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	ldrb	w0, [x8, #:lo12:.LANCHOR19]
 	strb	w0, [x7, #:lo12:.LANCHOR0]
 	mov	w0, 35899
-	ldr	w1, [x28]
+	ldr	w1, [x27]
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L2121
+	bne	.L2153
 	ldr	x0, [x29, 152]
-	mov	w2, 65535
+	mov	w2, 65023
 	mov	w3, 4097
-	add	x1, x0, :lo12:.LANCHOR30
+	add	x1, x0, :lo12:.LANCHOR31
 	ldrh	w0, [x1, 10]
 	ldrb	w1, [x1, 12]
 	lsl	w0, w0, 2
-	sdiv	w25, w0, w1
+	sdiv	w26, w0, w1
+	add	x1, x27, 258048
 	mov	w0, 512
-	cmp	w25, 512
-	csel	w25, w25, w0, lt
-	mov	x0, 262140
-	add	x1, x28, x0
+	add	x1, x1, 2044
+	cmp	w26, 512
+	csel	w26, w26, w0, lt
 	mov	w0, 0
-.L2125:
+.L2157:
 	ldr	w4, [x1]
-	cbnz	w4, .L2123
-	ldr	w4, [x28, w0, uxtw 2]
+	cbnz	w4, .L2155
+	ldr	w4, [x27, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w4, [x1], -4
+	str	w4, [x1, 2048]
 	cmp	w0, w3
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
+	sub	x1, x1, #4
 	cmp	w2, 4096
-	bne	.L2125
-.L2123:
-	ldr	w1, [x28, w2, uxtw 2]
+	bne	.L2157
+.L2155:
+	ldr	w1, [x27, w2, uxtw 2]
 	mul	w19, w19, w20
-	mov	w3, w25
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	mov	w3, w26
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-	stp	wzr, wzr, [x29, 192]
+	str	wzr, [x29, 184]
 	and	w0, w19, 65535
+	str	wzr, [x29, 200]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR45
-	add	x0, x0, :lo12:.LANCHOR45
-	str	x0, [x29, 200]
-.L2162:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
+	str	x0, [x29, 192]
+.L2195:
 	adrp	x20, .LANCHOR137
 	mov	w1, 0
 	mov	w2, 512
 	ldr	x0, [x20, #:lo12:.LANCHOR137]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR26
-	ldr	w1, [x29, 196]
-	ldr	x0, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR27
+	ldr	w1, [x29, 200]
+	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	add	x0, x0, x1, uxtw
-	ldrb	w0, [x0, 32]
-	cmp	w0, 255
-	beq	.L2126
-	ldr	w1, [x29, 140]
-	mul	w26, w0, w1
-	ldr	w0, [x29, 164]
-	cbz	w0, .L2127
-	mov	w0, 0
-	bl	zftl_flash_exit_slc_mode
-	adrp	x0, .LANCHOR0
-	strb	wzr, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
-.L2127:
+	ldrb	w19, [x0, 32]
+	cmp	w19, 255
+	beq	.L2158
+	ldr	w0, [x29, 140]
+	mul	w19, w19, w0
+	ldr	w0, [x29, 176]
+	cbz	w0, .L2159
+	cmp	w1, 1
+	adrp	x8, .LANCHOR0
+	adrp	x7, .LANCHOR19
+	bne	.L2160
+	ldrb	w0, [x29, 188]
+	strb	w0, [x8, #:lo12:.LANCHOR0]
+	strb	w0, [x7, #:lo12:.LANCHOR19]
+.L2159:
 	ldr	x0, [x29, 152]
-	add	x24, x0, :lo12:.LANCHOR30
-	ldr	x0, [x29, 200]
-	ldrb	w21, [x24, 9]
+	add	x25, x0, :lo12:.LANCHOR31
+	ldr	x0, [x29, 192]
+	ldrb	w22, [x25, 9]
+	ldrh	w23, [x25, 26]
 	ldrb	w0, [x0]
 	str	w0, [x29, 136]
-	ldr	x0, [x29, 200]
-	udiv	w1, w26, w21
-	ldrh	w22, [x24, 26]
+	udiv	w1, w19, w22
+	ldr	x0, [x29, 192]
+	mul	w23, w22, w23
+	and	w21, w23, 65535
 	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_erase_block
-	mul	w22, w21, w22
-	ldrh	w0, [x24, 10]
-	and	w19, w22, 65535
-	ldrb	w1, [x24, 12]
-	lsl	w0, w0, 2
-	udiv	w22, w26, w19
-	sdiv	w0, w0, w1
-	msub	w22, w22, w19, w26
-	str	w0, [x29, 184]
-	sub	w23, w26, w22
-	cmp	w26, w23
-	bne	.L2169
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	udiv	w23, w19, w21
+	ldrb	w0, [x25, 12]
+	msub	w23, w23, w21, w19
+	ldrh	w21, [x25, 10]
+	sub	w24, w19, w23
+	lsl	w21, w21, 2
+	cmp	w19, w24
+	sdiv	w0, w21, w0
+	str	w0, [x29, 180]
+	bne	.L2202
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
 	cmp	w0, 9
-	bne	.L2169
-	ldr	x27, [x20, #:lo12:.LANCHOR137]
+	bne	.L2202
+	ldr	x21, [x20, #:lo12:.LANCHOR137]
 	mov	w2, 1024
 	mov	w1, 0
-	mov	x0, x27
+	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
-	str	w0, [x27]
+	str	w0, [x21]
 	mov	w0, 12
-	str	w0, [x27, 4]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x27, 16]
-	str	wzr, [x27, 12]
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
-	cbz	w0, .L2129
-	ldrb	w0, [x24, 29]
-	strb	w0, [x27, 16]
-.L2129:
+	str	w0, [x21, 4]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x21, 16]
+	str	wzr, [x21, 12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbz	w0, .L2162
+	ldrb	w0, [x25, 29]
+	strb	w0, [x21, 16]
+.L2162:
 	mov	w0, 4
-	strb	w0, [x27, 17]
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
-	cmp	w21, 8
-	strb	wzr, [x27, 20]
-	strh	wzr, [x27, 22]
+	strb	w0, [x21, 17]
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
+	cmp	w22, 8
+	strb	wzr, [x21, 20]
+	strh	wzr, [x21, 22]
 	ldrh	w1, [x0, 10]
 	ldrb	w0, [x0, 12]
 	sdiv	w0, w1, w0
 	mov	w1, 16
-	strh	w0, [x27, 18]
+	strh	w0, [x21, 18]
 	mov	w0, 70
 	csel	w0, w0, w1, hi
-	strb	w0, [x27, 21]
+	strb	w0, [x21, 21]
 	mov	w1, 12
-	add	x0, x27, 12
+	add	x0, x21, 12
 	bl	js_hash
-	str	w0, [x27, 8]
-	sub	w0, w25, #4
-	str	w0, [x29, 188]
-.L2128:
-	adrp	x0, .LANCHOR49
-	mov	x24, x28
-	add	x0, x0, :lo12:.LANCHOR49
-	mov	w19, 0
-	str	x0, [x29, 176]
+	str	w0, [x21, 8]
+	sub	w0, w26, #4
+	str	w0, [x29, 204]
+.L2161:
+	adrp	x0, .LANCHOR19
+	mov	x25, x27
+	add	x0, x0, :lo12:.LANCHOR19
+	mov	w28, 0
+	str	x0, [x29, 168]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 168]
-.L2131:
-	ldr	w0, [x29, 184]
-	cmp	w0, w19
-	bhi	.L2142
+	str	x0, [x29, 160]
+.L2164:
+	ldr	w0, [x29, 180]
+	cmp	w0, w28
+	bhi	.L2175
 	ldr	x0, [x29, 152]
-	mov	w21, 4
-	ldr	x20, [x20, #:lo12:.LANCHOR137]
-	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR30
-	str	wzr, [x29, 176]
+	mov	w22, 4
+	ldr	x21, [x20, #:lo12:.LANCHOR137]
+	mov	w23, 0
+	add	x0, x0, :lo12:.LANCHOR31
+	str	wzr, [x29, 168]
 	ldrb	w1, [x0, 9]
-	ldrh	w27, [x0, 26]
+	ldrh	w28, [x0, 26]
 	uxtw	x0, w1
-	mul	w27, w0, w27
-	adrp	x0, .LANCHOR45
-	and	w27, w27, 65535
-	strb	wzr, [x0, #:lo12:.LANCHOR45]
-	udiv	w0, w26, w27
-	msub	w27, w0, w27, w26
-	sub	w0, w26, w27
+	mul	w28, w0, w28
+	adrp	x0, .LANCHOR46
+	and	w28, w28, 65535
+	strb	wzr, [x0, #:lo12:.LANCHOR46]
+	udiv	w0, w19, w28
+	msub	w28, w0, w28, w19
+	sub	w0, w19, w28
 	stp	w0, w1, [x29, 144]
-	and	w0, w27, 3
-	str	w0, [x29, 184]
-	ldr	w0, [x29, 188]
-	str	w0, [x29, 168]
+	and	w0, w28, 3
+	str	w0, [x29, 180]
+	ldr	w0, [x29, 204]
+	str	w0, [x29, 160]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
-.L2143:
-	ldr	w0, [x29, 168]
-	cmp	w22, w0
-	bcc	.L2157
-	ldr	x0, [x29, 200]
+.L2176:
+	ldr	w0, [x29, 160]
+	cmp	w23, w0
+	bcc	.L2190
+	ldr	x0, [x29, 192]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0]
-	ldr	w0, [x29, 164]
-	cbz	w0, .L2158
+	ldr	w0, [x29, 176]
+	cbz	w0, .L2191
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
 	adrp	x0, .LANCHOR0
 	strb	wzr, [x0, #:lo12:.LANCHOR0]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
-.L2158:
-	ldr	w0, [x29, 188]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x0, #:lo12:.LANCHOR19]
+.L2191:
+	ldr	w0, [x29, 204]
 	mov	x2, 0
 	lsl	w1, w0, 7
 	adrp	x0, .LANCHOR137
 	ldr	x0, [x0, #:lo12:.LANCHOR137]
-.L2159:
-	mov	w19, w2
+.L2192:
+	mov	w20, w2
 	cmp	w2, w1
-	bcc	.L2160
-	ldr	w0, [x29, 192]
+	bcc	.L2193
+	ldr	w0, [x29, 184]
 	add	w0, w0, 1
-	str	w0, [x29, 192]
+	str	w0, [x29, 184]
 	cmp	w0, 5
-	bls	.L2126
-	b	.L2165
-.L2166:
-	str	wzr, [x29, 164]
-	b	.L2119
-.L2169:
-	mov	x27, 0
-	str	w25, [x29, 188]
-	b	.L2128
-.L2142:
-	ldr	x2, [x29, 176]
-	add	w4, w22, w19
+	bls	.L2158
+	b	.L2198
+.L2199:
+	str	wzr, [x29, 176]
+	b	.L2151
+.L2160:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	strb	wzr, [x8, #:lo12:.LANCHOR0]
+	strb	wzr, [x7, #:lo12:.LANCHOR19]
+	b	.L2159
+.L2202:
+	mov	x21, 0
+	str	w26, [x29, 204]
+	b	.L2161
+.L2175:
+	ldr	x2, [x29, 168]
+	add	w4, w23, w28
 	lsr	w4, w4, 2
 	adrp	x0, .LANCHOR3
 	add	w1, w4, 1
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2133
+	cbz	w2, .L2166
 	adrp	x0, .LANCHOR1
-	ldrb	w5, [x0, #:lo12:.LANCHOR1]
+	ldrb	w7, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
-	cmp	w5, 0
+	cmp	w7, 0
 	csel	w0, w0, w1, ne
-.L2133:
-	adrp	x1, .LANCHOR27
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+.L2166:
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
 	cmp	w1, 9
-	bne	.L2135
-.L2216:
+	bne	.L2168
+.L2249:
 	str	w0, [x29, 208]
 	mov	w0, 61424
 	str	w0, [x29, 212]
-	ldr	x0, [x29, 168]
+	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, w4, sxtw 1]
-	cbnz	w2, .L2137
+	cbnz	w2, .L2170
 	mov	w4, w0
-.L2138:
-	mul	w0, w21, w4
-	cbnz	x27, .L2139
+.L2171:
+	mul	w0, w22, w4
+	cbnz	x21, .L2172
 	str	w4, [x29, 148]
 	add	x2, x29, 208
-	mov	x1, x24
-	add	w0, w0, w23
-	bl	fw_flash_page_prog.constprop.25
-	adrp	x0, .LANCHOR49
+	mov	x1, x25
+	add	w0, w0, w24
+	bl	fw_flash_page_prog.constprop.26
+	adrp	x0, .LANCHOR19
 	ldr	w4, [x29, 148]
-	ldrb	w0, [x0, #:lo12:.LANCHOR49]
-	cbnz	w0, .L2140
-	udiv	w1, w23, w21
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	cbnz	w0, .L2173
+	udiv	w1, w24, w22
 	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2140:
-	add	x24, x24, 2048
-.L2141:
-	add	w19, w19, 4
-	mov	x27, 0
-	and	w19, w19, 65535
-	b	.L2131
-.L2135:
+.L2173:
+	ldr	w0, [x29, 204]
+	add	x25, x25, 2048
+	add	w0, w0, 16
+	cmp	w28, w0
+	bcc	.L2174
+	ldr	w0, [x29, 204]
+	add	w1, w0, 20
+	add	x0, x27, 2048
+	cmp	w28, w1
+	csel	x25, x0, x25, cc
+.L2174:
+	add	w5, w28, 4
+	mov	x21, 0
+	and	w28, w5, 65535
+	b	.L2164
+.L2168:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2216
-.L2137:
+	b	.L2249
+.L2170:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w4, 1
 	cmp	w1, 0
 	csel	w4, w0, w4, ne
-	b	.L2138
-.L2139:
+	b	.L2171
+.L2172:
 	add	x2, x29, 208
-	mov	x1, x27
-	add	w0, w0, w23
-	bl	fw_flash_page_prog.constprop.25
-	b	.L2141
-.L2157:
-	add	w19, w27, w22
-	ldr	w0, [x29, 184]
-	adrp	x1, .LANCHOR49
-	sub	w24, w21, w0
+	mov	x1, x21
+	add	w0, w0, w24
+	bl	fw_flash_page_prog.constprop.26
+	b	.L2174
+.L2190:
+	add	w20, w28, w23
+	ldr	w0, [x29, 180]
+	adrp	x1, .LANCHOR19
+	sub	w25, w22, w0
 	ldr	x0, [x29, 112]
-	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR49]
-	and	w24, w24, 65535
-	and	w19, w19, 65535
-	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2144
-	mov	w19, w0
-.L2145:
+	udiv	w20, w20, w22
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	and	w25, w25, 65535
+	and	w20, w20, 65535
+	ldrh	w0, [x0, w20, sxtw 1]
+	cbnz	w1, .L2177
+	mov	w20, w0
+.L2178:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 144]
-	ldrb	w23, [x0, #:lo12:.LANCHOR17]
-	ldr	w0, [x29, 184]
+	ldrb	w24, [x0, #:lo12:.LANCHOR17]
+	ldr	w0, [x29, 180]
 	add	w0, w0, w1
 	ldr	w1, [x29, 148]
-	madd	w19, w1, w19, w0
-	adrp	x0, .LANCHOR30+9
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
-	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	madd	w20, w1, w20, w0
+	adrp	x0, .LANCHOR31+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
+	udiv	w20, w20, w0
+	adrp	x0, .LANCHOR44
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	str	w0, [x29, 132]
-	mov	w0, w23
+	mov	w0, w24
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR20
-	add	x0, x0, :lo12:.LANCHOR20
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
 	str	x0, [x29, 120]
-.L2146:
-	mov	w4, w21
+.L2179:
+	mov	w4, w22
 	add	x3, x29, 208
-	mov	x2, x20
-	mov	w1, w19
+	mov	x2, x21
+	mov	w1, w20
 	mov	w0, 0
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2147
-	ldr	x0, [x29, 200]
+	bne	.L2180
+	ldr	x0, [x29, 192]
 	ldrb	w6, [x0]
-	cbnz	w6, .L2148
-.L2151:
+	cbnz	w6, .L2181
+.L2184:
 	adrp	x0, .LANCHOR162
 	ldr	x6, [x0, #:lo12:.LANCHOR162]
-	cbnz	x6, .L2149
-.L2150:
+	cbnz	x6, .L2182
+.L2183:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2147
-	mov	w4, w21
+	cbz	w0, .L2180
+	mov	w4, w22
 	add	x3, x29, 208
-	mov	x2, x20
-	mov	w1, w19
+	mov	x2, x21
+	mov	w1, w20
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2217
-.L2144:
+	b	.L2250
+.L2177:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w19, 1
+	lsl	w0, w20, 1
 	cmp	w1, 0
-	csel	w19, w0, w19, ne
-	b	.L2145
-.L2148:
-	ldr	x0, [x29, 200]
-	mov	w1, w19
+	csel	w20, w0, w20, ne
+	b	.L2178
+.L2181:
+	ldr	x0, [x29, 192]
+	mov	w1, w20
 	str	w6, [x29, 108]
-	mov	w4, w21
+	mov	w4, w22
 	str	w5, [x29, 128]
 	add	x3, x29, 208
-	mov	x2, x20
+	mov	x2, x21
 	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_read_page
 	cmn	w0, #1
-	ldr	x1, [x29, 200]
+	ldr	x1, [x29, 192]
 	ldr	w6, [x29, 108]
 	ldr	w5, [x29, 128]
 	strb	w6, [x1]
-	beq	.L2151
-.L2217:
+	beq	.L2184
+.L2250:
 	mov	w5, w0
-.L2147:
+.L2180:
 	cmn	w5, #1
 	cset	w3, eq
-	cmp	w23, 16
+	cmp	w24, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2153
+	beq	.L2186
 	mov	w0, 16
-	mov	w23, 16
+	mov	w24, 16
 	bl	nandc_bch_sel
-	b	.L2146
-.L2149:
+	b	.L2179
+.L2182:
 	str	w5, [x29, 128]
-	mov	w4, w21
+	mov	w4, w22
 	add	x3, x29, 208
-	mov	x2, x20
-	mov	w1, w19
+	mov	x2, x21
+	mov	w1, w20
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 128]
-	beq	.L2150
-	b	.L2217
-.L2153:
+	beq	.L2183
+	b	.L2250
+.L2186:
 	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w3, 0
-	ldr	w0, [x29, 176]
+	ldr	w0, [x29, 168]
 	csinv	w0, w0, wzr, eq
-	str	w0, [x29, 176]
+	str	w0, [x29, 168]
 	ldr	w0, [x29, 144]
-	cmp	w22, 0
-	ccmp	w26, w0, 0, eq
-	bne	.L2155
-	ldr	w0, [x29, 176]
-	cbnz	w0, .L2155
-	ldr	w1, [x20]
+	cmp	w23, 0
+	ccmp	w19, w0, 0, eq
+	bne	.L2188
+	ldr	w0, [x29, 168]
+	cbnz	w0, .L2188
+	ldr	w1, [x21]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2155
-	ldr	w0, [x29, 168]
-	ldrb	w21, [x20, 17]
-	add	w0, w0, w24
-	str	w0, [x29, 168]
-.L2156:
-	add	w22, w24, w22
-	and	w22, w22, 65535
-	b	.L2143
-.L2155:
-	ubfiz	x0, x24, 9, 16
-	str	wzr, [x29, 184]
-	add	x20, x20, x0
-	b	.L2156
-.L2160:
+	bne	.L2188
+	ldr	w0, [x29, 160]
+	ldrb	w22, [x21, 17]
+	add	w0, w0, w25
+	str	w0, [x29, 160]
+.L2189:
+	add	w23, w25, w23
+	and	w23, w23, 65535
+	b	.L2176
+.L2188:
+	ubfiz	x0, x25, 9, 16
+	str	wzr, [x29, 180]
+	add	x21, x21, x0
+	b	.L2189
+.L2193:
 	ldr	w4, [x0, x2, lsl 2]
 	add	x2, x2, 1
-	add	x3, x28, x2, lsl 2
+	add	x3, x27, x2, lsl 2
 	ldr	w3, [x3, -4]
 	cmp	w4, w3
-	beq	.L2159
+	beq	.L2192
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-	mov	w1, w19
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+	mov	w1, w20
+	adrp	x0, .LC131
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-	mov	w1, w26
+	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-.L2126:
-	ldr	w0, [x29, 196]
+.L2158:
+	ldr	w0, [x29, 200]
 	add	w0, w0, 1
-	str	w0, [x29, 196]
+	str	w0, [x29, 200]
 	cmp	w0, 4
-	bne	.L2162
-.L2165:
-	ldrb	w1, [x29, 160]
+	bne	.L2195
+.L2198:
+	ldrb	w1, [x29, 188]
 	adrp	x0, .LANCHOR0
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	mov	w1, 2
-	adrp	x0, .LANCHOR31
-	strb	w1, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	strb	w1, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 0
 	bl	zftl_flash_enter_slc_mode
-	ldr	w0, [x29, 192]
-	cbnz	w0, .L2121
-	adrp	x0, .LC126
+	ldr	w0, [x29, 184]
+	cbnz	w0, .L2153
+	adrp	x0, .LC132
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC132
 	bl	printf
-.L2121:
+.L2153:
 	adrp	x0, .LANCHOR136
 	adrp	x19, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR136]
 	ldr	x0, [x19, #:lo12:.LANCHOR135]
-	cbz	x0, .L2164
+	cbz	x0, .L2197
 	bl	free
 	str	xzr, [x19, #:lo12:.LANCHOR135]
-.L2164:
+.L2197:
 	adrp	x19, .LANCHOR137
 	ldr	x0, [x19, #:lo12:.LANCHOR137]
-	cbz	x0, .L2218
+	cbz	x0, .L2251
 	bl	free
 	str	xzr, [x19, #:lo12:.LANCHOR137]
-	b	.L2218
+	b	.L2251
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12948,27 +13250,27 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2221
+	bhi	.L2254
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 726
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2221:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2254:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w4, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2222
+	cbz	w25, .L2255
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2222:
+.L2255:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12986,10 +13288,10 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x24
 	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -12999,7 +13301,7 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.28
+	b	nandc_de_cs.constprop.29
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
@@ -13068,21 +13370,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2230:
+.L2263:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2231
+	cbnz	w0, .L2264
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2231:
+.L2264:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2230
+	b	.L2263
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -13099,13 +13401,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2234:
+.L2267:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2235
+	cbnz	w0, .L2268
 	cmp	w24, 2
-	bne	.L2236
+	bne	.L2269
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -13185,21 +13487,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR54
 	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-.L2237:
+.L2270:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2235:
+.L2268:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2234
-.L2236:
+	b	.L2267
+.L2269:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2237
+	b	.L2270
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
 	.align	2
@@ -13210,8 +13512,8 @@ sblk_3d_tlc_dump_prog:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	ldr	w3, [x19, 40]
 	str	x21, [sp, 32]
 	and	w20, w3, 2097151
@@ -13271,16 +13573,16 @@ flash_start_3d_mlc_page_prog:
 	mov	x22, x3
 	mov	x23, x4
 	cmp	w0, w19
-	bhi	.L2242
+	bhi	.L2275
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 756
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2242:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2275:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w4, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
@@ -13300,10 +13602,10 @@ flash_start_3d_mlc_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x23
 	mov	x2, x22
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -13326,11 +13628,11 @@ sblk_3d_mlc_prog_pages:
 	ldr	x0, [x0]
 	ldr	w19, [x0, 40]
 	str	x21, [sp, 32]
-.L2245:
+.L2278:
 	mov	w1, 1
 	mov	w0, w19
 	bl	queue_lun_state
-	cbnz	w0, .L2246
+	cbnz	w0, .L2279
 	ldr	x0, [x20]
 	ldr	w19, [x0, 40]
 	and	w21, w19, 2097151
@@ -13352,7 +13654,7 @@ sblk_3d_mlc_prog_pages:
 	ldr	x4, [x0, 24]
 	mov	w0, 16
 	bl	flash_start_3d_mlc_page_prog
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x1, [x20]
 	mov	w0, 4
 	strb	w0, [x1, 58]
@@ -13368,10 +13670,10 @@ sblk_3d_mlc_prog_pages:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2246:
+.L2279:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2245
+	b	.L2278
 	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
 	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
 	.align	2
@@ -13390,8 +13692,8 @@ sblk_mlc_dump_prog:
 	bl	zftl_flash_exit_slc_mode
 	ldr	w2, [x19, 40]
 	mov	w1, w21
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	add	w3, w2, 1
 	bl	printf
 	ldr	x3, [x19, 8]
@@ -13412,7 +13714,7 @@ sblk_mlc_dump_prog:
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.28
+	bl	nandc_de_cs.constprop.29
 	ldr	x21, [sp, 32]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
@@ -13440,40 +13742,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2251
+	bhi	.L2284
 	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
 	mov	w2, 803
 	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2251:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2284:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2252
+	cbnz	w0, .L2285
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2253
+	bne	.L2286
 	bl	nandc_wait_flash_ready
-.L2252:
+.L2285:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2254
+	cbnz	w22, .L2287
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2255
+	cbz	w0, .L2288
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2255:
+.L2288:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -13488,10 +13790,10 @@ flash_start_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	mov	x3, x26
 	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR31+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -13502,17 +13804,17 @@ flash_start_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.28
-.L2253:
+	b	nandc_de_cs.constprop.29
+.L2286:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2252
-.L2254:
+	b	.L2285
+.L2287:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2255
+	b	.L2288
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -13531,23 +13833,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, 255
-	beq	.L2261
+	beq	.L2294
 	adrp	x2, .LANCHOR50
 	add	x2, x2, :lo12:.LANCHOR50
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2263:
+.L2296:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2262
+	bne	.L2295
 	ldrb	w5, [x4, 58]
 	cmp	w5, 7
-	bne	.L2262
+	bne	.L2295
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2261:
+.L2294:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -13559,12 +13861,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2262:
+.L2295:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2263
-	b	.L2261
+	bne	.L2296
+	b	.L2294
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -13581,25 +13883,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2270
+	cbz	w0, .L2303
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2270
+	tbz	x0, 8, .L2303
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC129
+	adrp	x0, .LC135
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2270:
-	adrp	x25, .LANCHOR38
+.L2303:
+	adrp	x25, .LANCHOR39
 	adrp	x23, .LANCHOR50
-	add	x25, x25, :lo12:.LANCHOR38
+	add	x25, x25, :lo12:.LANCHOR39
 	add	x23, x23, :lo12:.LANCHOR50
 	mov	w21, 0
 	mov	w24, 1
-.L2271:
-	cbnz	w20, .L2282
-.L2295:
+.L2304:
+	cbnz	w20, .L2315
+.L2328:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13608,53 +13910,53 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2282:
+.L2315:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2272:
+.L2305:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2273
+	cbnz	w0, .L2306
 	cmp	w20, 1
-	beq	.L2274
+	beq	.L2307
 	ldrb	w0, [x25]
-	cbnz	w0, .L2275
-.L2274:
+	cbnz	w0, .L2308
+.L2307:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2276:
+.L2309:
 	subs	w20, w20, #1
-	beq	.L2295
+	beq	.L2328
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2271
-.L2273:
+	b	.L2304
+.L2306:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2272
-.L2275:
+	b	.L2305
+.L2308:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2277
+	bne	.L2310
 	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 574
+	mov	w2, 583
 	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2277:
+.L2310:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2278
-	adrp	x0, .LANCHOR102
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR101
-	ldrb	w3, [x0, #:lo12:.LANCHOR101]
+	bne	.L2311
+	adrp	x0, .LANCHOR66
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR67
+	ldrb	w3, [x0, #:lo12:.LANCHOR67]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -13673,9 +13975,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2278
+	bne	.L2311
 	cmp	w21, w3
-	beq	.L2278
+	beq	.L2311
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13691,12 +13993,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR54
 	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	b	.L2276
-.L2278:
+	b	.L2309
+.L2311:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2276
+	b	.L2309
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13710,13 +14012,13 @@ ftl_flush:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	adrp	x20, .LANCHOR174
-	cbz	w1, .L2298
+	cbz	w1, .L2331
 	ldrb	w2, [x20, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2298:
+.L2331:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR121]
 	strb	w0, [x20, #:lo12:.LANCHOR174]
@@ -13750,48 +14052,48 @@ flash_prog_page_en:
 	mov	w28, w4
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w23
-	bhi	.L2304
+	bhi	.L2337
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
 	mov	w2, 546
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2304:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+.L2337:
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	ldrb	w27, [x0, w23, sxtw]
-	cbnz	w19, .L2315
+	cbnz	w19, .L2348
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2306
+	cbz	w1, .L2339
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2315
-.L2306:
+	cbz	w1, .L2348
+.L2339:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2307
+	cbz	w0, .L2340
 	add	w19, w19, w1, lsl 1
-.L2305:
+.L2338:
 	adrp	x24, .LANCHOR14
-	adrp	x25, .LC130
+	adrp	x25, .LC136
 	add	x24, x24, :lo12:.LANCHOR14
-	add	x25, x25, :lo12:.LC130
+	add	x25, x25, :lo12:.LC136
 	adrp	x26, .LANCHOR163
-.L2311:
+.L2344:
 	ldr	w0, [x24]
-	tbz	x0, 4, .L2308
+	tbz	x0, 4, .L2341
 	mov	w3, w19
 	mov	w2, w20
 	mov	w1, w27
 	mov	x0, x25
 	bl	printf
-.L2308:
+.L2341:
 	mov	w4, w28
 	mov	x3, x21
 	mov	x2, x22
@@ -13800,7 +14102,7 @@ flash_prog_page_en:
 	bl	flash_prog_page
 	mov	w5, w0
 	ldr	w0, [x29, 124]
-	cbz	w0, .L2309
+	cbz	w0, .L2342
 	adrp	x6, .LANCHOR164
 	ldr	x3, [x26, #:lo12:.LANCHOR163]
 	mov	w4, w28
@@ -13815,54 +14117,54 @@ flash_prog_page_en:
 	mov	w4, w0
 	ccmn	w0, #1, 4, ne
 	mov	x7, x6
-	beq	.L2310
+	beq	.L2343
 	ldr	x0, [x6, #:lo12:.LANCHOR164]
 	ldr	w1, [x22]
 	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2310
+	bne	.L2343
 	ldr	x0, [x26, #:lo12:.LANCHOR163]
 	ldr	w1, [x21]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2309
-.L2310:
+	beq	.L2342
+.L2343:
 	str	w4, [x29, 112]
 	mov	w3, 4
 	str	x7, [x29, 104]
 	mov	w2, w3
 	mov	x1, x22
-	adrp	x0, .LC131
-	add	x0, x0, :lo12:.LC131
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	rknand_print_hex
 	mov	w3, 4
 	mov	x1, x21
 	mov	w2, w3
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR163
 	mov	w3, 4
 	mov	w2, w3
 	ldr	x1, [x0, #:lo12:.LANCHOR163]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	rknand_print_hex
 	ldr	x7, [x29, 104]
 	mov	w3, 4
-	adrp	x0, .LC134
+	adrp	x0, .LC140
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC134
+	add	x0, x0, :lo12:.LC140
 	ldr	x1, [x7, #:lo12:.LANCHOR164]
 	bl	rknand_print_hex
 	ldr	w4, [x29, 112]
 	cmp	w4, 512
-	beq	.L2311
-.L2313:
+	beq	.L2344
+.L2346:
 	mov	w1, w20
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	bl	printf
 	mov	w2, 577
 	adrp	x1, .LANCHOR175
@@ -13871,7 +14173,7 @@ flash_prog_page_en:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-.L2312:
+.L2345:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13879,20 +14181,20 @@ flash_prog_page_en:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2307:
+.L2340:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2305
-.L2315:
+	b	.L2338
+.L2348:
 	mov	w19, w20
-	b	.L2305
-.L2309:
+	b	.L2338
+.L2342:
 	mov	w0, w5
 	cmn	w5, #1
-	bne	.L2312
-	b	.L2313
+	bne	.L2345
+	b	.L2346
 	.size	flash_prog_page_en, .-flash_prog_page_en
 	.section	.text.ftl_test_block,"ax",@progbits
 	.align	2
@@ -13906,82 +14208,82 @@ ftl_test_block:
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR176
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR108
+	adrp	x26, .LANCHOR104
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR108
+	add	x0, x26, :lo12:.LANCHOR104
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR101
+	adrp	x27, .LANCHOR67
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR101
+	add	x0, x27, :lo12:.LANCHOR67
 	str	wzr, [x25, #:lo12:.LANCHOR176]
 	str	x0, [x29, 96]
-.L2332:
+.L2365:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2342
-	add	x0, x27, :lo12:.LANCHOR101
+	bls	.L2375
+	add	x0, x27, :lo12:.LANCHOR67
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2343
-.L2341:
+	b	.L2376
+.L2374:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2333
-	adrp	x0, .LC136
+	tbz	x0, 12, .L2366
+	adrp	x0, .LC142
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC136
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2333:
+.L2366:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2334
-	adrp	x0, .LANCHOR26
-	ldr	x0, [x0, #:lo12:.LANCHOR26]
+	cbnz	w20, .L2367
+	adrp	x0, .LANCHOR27
+	ldr	x0, [x0, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2335
-.L2334:
+	bcs	.L2368
+.L2367:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2335
-	adrp	x0, .LANCHOR107
+	cbnz	w0, .L2368
+	adrp	x0, .LANCHOR103
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR107]
+	ldrh	w7, [x0, #:lo12:.LANCHOR103]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2336
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2369
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	bne	.L2358
+	bne	.L2391
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2358
+	cbz	w0, .L2391
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2358
-.L2340:
-	adrp	x0, .LANCHOR69
+	cbnz	w0, .L2391
+.L2373:
+	adrp	x0, .LANCHOR71
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	add	w26, w26, w0, lsl 24
-.L2339:
+.L2372:
 	adrp	x0, .LANCHOR123
 	mov	w5, 1
 	add	x3, x25, :lo12:.LANCHOR176
@@ -13990,27 +14292,27 @@ ftl_test_block:
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2335
-.L2358:
+	cbz	w0, .L2368
+.L2391:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2335:
+.L2368:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2343:
+.L2376:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2341
+	bhi	.L2374
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2332
-.L2336:
-	cbz	w23, .L2339
-	b	.L2340
-.L2342:
-	cbz	w23, .L2344
+	b	.L2365
+.L2369:
+	cbz	w23, .L2372
+	b	.L2373
+.L2375:
+	cbz	w23, .L2377
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -14018,7 +14320,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2344:
+.L2377:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14053,18 +14355,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2359
-	mov	w2, 2203
+	bne	.L2392
+	mov	w2, 2231
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC135
+	adrp	x0, .LC141
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC135
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2359:
+.L2392:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -14085,12 +14387,12 @@ ftl_info_flush:
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR179
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR107
+	adrp	x23, .LANCHOR103
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR123]
 	add	x25, x22, :lo12:.LANCHOR179
-	add	x28, x23, :lo12:.LANCHOR107
+	add	x28, x23, :lo12:.LANCHOR103
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
@@ -14098,13 +14400,13 @@ ftl_info_flush:
 	lsl	w2, w2, 1
 	add	x0, x20, :lo12:.LANCHOR178
 	bl	ftl_memset
-.L2363:
+.L2396:
 	add	x0, x22, :lo12:.LANCHOR179
 	ldrb	w6, [x22, #:lo12:.LANCHOR179]
-	ldrh	w19, [x23, #:lo12:.LANCHOR107]
+	ldrh	w19, [x23, #:lo12:.LANCHOR103]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
@@ -14113,37 +14415,37 @@ ftl_info_flush:
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2364
+	tbz	x0, 12, .L2397
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC137
+	adrp	x0, .LC143
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC143
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2364:
-	adrp	x1, .LANCHOR83
+.L2397:
+	adrp	x1, .LANCHOR85
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bhi	.L2365
+	bhi	.L2398
 	adrp	x19, .LANCHOR180
 	adrp	x3, .LC0
 	add	x19, x19, :lo12:.LANCHOR180
 	add	x3, x3, :lo12:.LC0
-.L2372:
+.L2405:
 	ldrb	w0, [x25, 1]
-	adrp	x4, .LANCHOR26
+	adrp	x4, .LANCHOR27
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2366
+	bls	.L2399
 	mov	x0, 0
-.L2371:
-	ldr	x2, [x4, #:lo12:.LANCHOR26]
+.L2404:
+	ldr	x2, [x4, #:lo12:.LANCHOR27]
 	add	w1, w0, 8
 	and	w24, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -14151,24 +14453,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2367
+	bhi	.L2400
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
-	mov	w2, 742
+	mov	w2, 748
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2370:
+.L2403:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2366:
-	ldr	x0, [x4, #:lo12:.LANCHOR26]
+.L2399:
+	ldr	x0, [x4, #:lo12:.LANCHOR27]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2372
+	beq	.L2405
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -14184,7 +14486,7 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2373:
+.L2406:
 	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
 	add	x3, x20, :lo12:.LANCHOR178
@@ -14197,40 +14499,40 @@ ftl_info_flush:
 	adrp	x0, .LANCHOR181
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2374
+	beq	.L2407
 	ldrb	w1, [x0, #:lo12:.LANCHOR181]
-	cbz	w1, .L2375
-.L2374:
+	cbz	w1, .L2408
+.L2407:
 	strb	wzr, [x0, #:lo12:.LANCHOR181]
-	b	.L2363
-.L2367:
+	b	.L2396
+.L2400:
 	cmp	w2, 255
-	bne	.L2370
+	bne	.L2403
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2371
+	bne	.L2404
 	mov	w24, w0
-	b	.L2370
-.L2365:
+	b	.L2403
+.L2398:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2373
+	cbnz	w0, .L2406
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2373
-.L2375:
-	cbnz	w24, .L2376
-.L2384:
+	b	.L2406
+.L2408:
+	cbnz	w24, .L2409
+.L2417:
 	adrp	x0, .LANCHOR179
 	ldrb	w0, [x0, #:lo12:.LANCHOR179]
 	cmp	w0, 255
-	bne	.L2378
+	bne	.L2411
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
-	mov	w2, 778
+	mov	w2, 784
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2378:
+.L2411:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14239,42 +14541,42 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2376:
+.L2409:
 	ldrb	w19, [x25, 1]
 	adrp	x20, .LANCHOR180
 	adrp	x21, .LC0
 	add	x20, x20, :lo12:.LANCHOR180
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR26
-.L2379:
+	adrp	x22, .LANCHOR27
+.L2412:
 	cmp	w19, 7
-	bhi	.L2384
-	ldr	x1, [x22, #:lo12:.LANCHOR26]
+	bhi	.L2417
+	ldr	x1, [x22, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2380
-	mov	w2, 771
+	bhi	.L2413
+	mov	w2, 777
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2381:
-	ldrh	w1, [x26, #:lo12:.LANCHOR107]
+.L2414:
+	ldrh	w1, [x26, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2382
-.L2380:
+	b	.L2415
+.L2413:
 	cmp	w23, 255
-	bne	.L2381
-.L2382:
+	bne	.L2414
+.L2415:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2379
+	b	.L2412
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -14298,16 +14600,16 @@ ftl_info_blk_init:
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR7]
 	adrp	x1, .LANCHOR6
-	adrp	x22, .LANCHOR100
-	stp	x25, x26, [sp, 64]
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR179
+	adrp	x21, .LANCHOR102
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR26
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	adrp	x24, .LANCHOR27
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR179
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR107
+	adrp	x26, .LANCHOR103
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR100]
+	str	x1, [x21, #:lo12:.LANCHOR102]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -14315,59 +14617,59 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR123
-	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR179
+	adrp	x23, .LANCHOR123
+	ldr	x1, [x24, #:lo12:.LANCHOR27]
+	add	x0, x22, :lo12:.LANCHOR179
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR107
-	add	x25, x25, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR103
+	add	x23, x23, :lo12:.LANCHOR123
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR179]
+	strb	w1, [x22, #:lo12:.LANCHOR179]
 	strh	wzr, [x0, 2]
-.L2400:
-	ldr	x1, [x23, #:lo12:.LANCHOR26]
+.L2433:
+	ldr	x1, [x24, #:lo12:.LANCHOR27]
 	add	w0, w19, 8
-	sxth	w24, w19
+	sxth	w25, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2399
-.L2404:
+	bne	.L2432
+.L2437:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2400
-	mov	w24, 0
-.L2401:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2405
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	bne	.L2433
+	mov	w25, 0
+.L2434:
+	adrp	x23, .LANCHOR14
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2438
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2405:
+.L2438:
 	cmn	w19, #1
-	bne	.L2406
+	bne	.L2439
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 20
+	mov	w1, 22
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2398:
+.L2431:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14375,10 +14677,10 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2399:
+.L2432:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
-	ldrb	w4, [x25]
+	ldrb	w4, [x23]
 	adrp	x7, .LANCHOR178
 	add	x7, x7, :lo12:.LANCHOR178
 	mov	x2, x8
@@ -14393,83 +14695,83 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2402
-	ldrb	w4, [x25]
+	bne	.L2435
+	ldrb	w4, [x23]
 	mov	x3, x7
 	mov	x2, x8
 	add	w1, w6, 1
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2402:
+.L2435:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2403
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	tbz	x0, 12, .L2436
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2403:
+.L2436:
 	cmn	w5, #1
-	beq	.L2404
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2437
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2404
-	mov	w19, w24
-	b	.L2401
-.L2406:
-	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	w0, w24, 8
+	bne	.L2437
+	mov	w19, w25
+	b	.L2434
+.L2439:
+	ldr	x1, [x24, #:lo12:.LANCHOR27]
+	add	w0, w25, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR123
+	adrp	x27, .LANCHOR123
 	add	x0, x1, x0, sxtw
-	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR123
-	movk	w27, 0x494c, lsl 16
+	mov	w28, 21574
+	add	x27, x27, :lo12:.LANCHOR123
+	movk	w28, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR179
-	strb	w1, [x21, #:lo12:.LANCHOR179]
-	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR178
-	add	x24, x24, :lo12:.LANCHOR178
+	add	x0, x22, :lo12:.LANCHOR179
+	strb	w1, [x22, #:lo12:.LANCHOR179]
+	strb	w25, [x0, 1]
+	adrp	x25, .LANCHOR178
+	add	x25, x25, :lo12:.LANCHOR178
 	mov	w0, 0
-	mov	x3, x24
+	mov	x3, x25
 	bl	flash_get_last_written_page
-	sxth	w23, w0
+	sxth	w24, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR107
-	ldrb	w25, [x21, #:lo12:.LANCHOR179]
-	ldrh	w0, [x0, #:lo12:.LANCHOR107]
-	madd	w25, w25, w0, w23
-.L2408:
-	tbnz	w23, #31, .L2411
-	ldrb	w4, [x26]
-	mov	x3, x24
+	adrp	x0, .LANCHOR103
+	ldrb	w26, [x22, #:lo12:.LANCHOR179]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	madd	w26, w26, w0, w24
+.L2441:
+	tbnz	w24, #31, .L2445
+	ldrb	w4, [x27]
+	mov	x3, x25
 	mov	x2, x20
-	mov	w1, w25
+	mov	w1, w26
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2409
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2442
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L2409
-.L2411:
-	add	x21, x21, :lo12:.LANCHOR179
-	strh	w19, [x21, 2]
+	cmp	w0, w28
+	bne	.L2442
+.L2445:
+	add	x22, x22, :lo12:.LANCHOR179
+	strh	w19, [x22, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x21, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -14477,13 +14779,23 @@ ftl_info_blk_init:
 	bl	ftl_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbnz	x0, 14, .L2443
+.L2460:
 	mov	w0, 0
-	b	.L2398
-.L2409:
-	sub	w23, w23, #1
-	sub	w25, w25, #1
-	sxth	w23, w23
-	b	.L2408
+	b	.L2431
+.L2442:
+	sub	w24, w24, #1
+	sub	w26, w26, #1
+	sxth	w24, w24
+	b	.L2441
+.L2443:
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
+	ldr	w1, [x0, 156]
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
+	bl	printf
+	b	.L2460
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -14500,43 +14812,43 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2427
+	cbz	w1, .L2462
 	str	wzr, [x0, 520]
-.L2427:
-	adrp	x20, .LANCHOR83
+.L2462:
+	adrp	x20, .LANCHOR85
 	adrp	x22, .LANCHOR184
-	adrp	x21, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR83
+	adrp	x21, .LANCHOR66
+	add	x20, x20, :lo12:.LANCHOR85
 	add	x22, x22, :lo12:.LANCHOR184
-	add	x21, x21, :lo12:.LANCHOR102
+	add	x21, x21, :lo12:.LANCHOR66
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2428:
-	adrp	x23, .LANCHOR100
+.L2463:
+	adrp	x23, .LANCHOR102
 	mov	x24, x23
-.L2431:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2466:
+	ldr	x0, [x23, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2429
+	bcc	.L2464
 	bl	ftl_ext_alloc_new_blk
-.L2429:
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+.L2464:
+	ldr	x0, [x24, #:lo12:.LANCHOR102]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2430
+	bne	.L2465
 	adrp	x0, .LC0
-	mov	w2, 1798
+	mov	w2, 1819
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2430:
-	ldr	x1, [x24, #:lo12:.LANCHOR100]
+.L2465:
+	ldr	x1, [x24, #:lo12:.LANCHOR102]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR123
@@ -14549,8 +14861,8 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR107
-	ldrh	w2, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR103
+	ldrh	w2, [x0, #:lo12:.LANCHOR103]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
@@ -14559,7 +14871,7 @@ ftl_ext_info_flush:
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+	ldr	x0, [x24, #:lo12:.LANCHOR102]
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR123]
 	mov	x3, x25
@@ -14570,22 +14882,22 @@ ftl_ext_info_flush:
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR100]
+	ldr	x2, [x24, #:lo12:.LANCHOR102]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2431
+	beq	.L2466
 	cmn	w0, #1
 	adrp	x0, .LANCHOR183
-	beq	.L2432
+	beq	.L2467
 	ldrb	w1, [x0, #:lo12:.LANCHOR183]
-	cbz	w1, .L2433
-.L2432:
+	cbz	w1, .L2468
+.L2467:
 	strb	wzr, [x0, #:lo12:.LANCHOR183]
-	b	.L2428
-.L2433:
+	b	.L2463
+.L2468:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14601,23 +14913,23 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR113
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
-	strh	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x20, .LANCHOR102
+	strh	wzr, [x0, #:lo12:.LANCHOR113]
 	mov	w19, 21
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR178
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR66
 	stp	x25, x26, [sp, 64]
 	add	x3, x24, :lo12:.LANCHOR178
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w19, w0
@@ -14633,29 +14945,29 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2444
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	tbz	x0, 12, .L2479
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	adrp	x1, .LANCHOR185
 	and	w4, w21, 65535
 	mov	w3, w22
-	mov	w2, 1842
+	mov	w2, 1863
 	add	x1, x1, :lo12:.LANCHOR185
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	printf
-.L2444:
+.L2479:
 	adrp	x26, .LANCHOR123
-	adrp	x28, .LANCHOR107
+	adrp	x28, .LANCHOR103
 	mov	w5, 20038
 	add	x26, x26, :lo12:.LANCHOR123
-	add	x28, x28, :lo12:.LANCHOR107
+	add	x28, x28, :lo12:.LANCHOR103
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2445:
+.L2480:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2450
+	tbnz	x0, 15, .L2485
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
@@ -14668,22 +14980,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2446
+	beq	.L2481
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2446
-.L2450:
+	bne	.L2481
+.L2485:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2448
+	bgt	.L2483
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2448:
+.L2483:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14691,22 +15003,26 @@ ftl_ext_info_init:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	strh	w1, [x0, 584]
-	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 586]
-	ldp	x27, x28, [sp, 80]
 	strh	w1, [x0, 588]
 	strh	w1, [x0, 590]
+	mov	w1, 65535
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, 560]
 	str	wzr, [x0, 520]
+	mov	w1, -1
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
+	str	w1, [x0, 564]
 	adrp	x0, .LANCHOR64
 	strh	w1, [x0, #:lo12:.LANCHOR64]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2446:
+.L2481:
 	add	w23, w23, 1
-	b	.L2445
+	b	.L2480
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14723,44 +15039,44 @@ ftl_low_format_data_init:
 	str	x21, [sp, 32]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	mov	w21, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2459
+	bcs	.L2494
 	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 2025
+	mov	w2, 2053
 	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2459:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2494:
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
-	ldrh	w2, [x1, #:lo12:.LANCHOR102]
+	adrp	x1, .LANCHOR66
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	mov	w1, 21
 	sub	w1, w1, w2
 	strh	w21, [x0, 416]
@@ -14781,7 +15097,7 @@ ftl_low_format_data_init:
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	mov	w20, -1
@@ -14797,7 +15113,7 @@ ftl_low_format_data_init:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -14838,44 +15154,44 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR188
 	stp	x21, x22, [sp, 32]
 	add	x20, x20, :lo12:.LANCHOR188
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR26
+	adrp	x22, .LANCHOR27
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2464:
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+.L2499:
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2462
-	mov	w2, 2079
+	bhi	.L2497
+	mov	w2, 2107
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2462:
+.L2497:
 	cmp	w21, 255
-	beq	.L2463
-	adrp	x0, .LANCHOR107
-	ldrh	w1, [x0, #:lo12:.LANCHOR107]
+	beq	.L2498
+	adrp	x0, .LANCHOR103
+	ldrh	w1, [x0, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2463:
+.L2498:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2464
+	bne	.L2499
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14889,29 +15205,29 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2465:
+.L2500:
 	cmp	x0, x2
-	bne	.L2466
-	adrp	x21, .LANCHOR100
+	bne	.L2501
+	adrp	x21, .LANCHOR102
 	mov	w1, 21574
 	adrp	x24, .LANCHOR60
 	add	x24, x24, :lo12:.LANCHOR60
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	movk	w1, 0x494c, lsl 16
 	mov	w20, 0
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2467:
+.L2502:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR101
+	adrp	x23, .LANCHOR67
 	cmp	w0, w20
-	bhi	.L2476
-	ldr	x0, [x25, #:lo12:.LANCHOR26]
+	bhi	.L2511
+	ldr	x0, [x25, #:lo12:.LANCHOR27]
 	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR67]
 	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR100]
+	ldr	x6, [x21, #:lo12:.LANCHOR102]
 	cmp	w2, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 47]
@@ -14925,7 +15241,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2479:
+.L2514:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14934,7 +15250,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2479
+	bne	.L2514
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w8, w3
@@ -14946,28 +15262,28 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2480
-	adrp	x0, .LC142
+	tbz	x0, 12, .L2515
+	adrp	x0, .LC149
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2126
-	add	x0, x0, :lo12:.LC142
+	mov	w1, 2154
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-.L2480:
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+.L2515:
+	ldr	x0, [x21, #:lo12:.LANCHOR102]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	adrp	x0, .LANCHOR108
-	ldrb	w13, [x23, #:lo12:.LANCHOR101]
-	ldr	x2, [x21, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR104
+	ldrb	w13, [x23, #:lo12:.LANCHOR67]
+	ldr	x2, [x21, #:lo12:.LANCHOR102]
 	mov	w4, 21
-	ldrb	w15, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR102
+	ldrb	w15, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR66
 	and	w16, w13, 65535
 	ldr	x14, [x22, #:lo12:.LANCHOR7]
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
 	mov	w3, 0
 	ldrh	w12, [x2, 134]
 	sub	w0, w4, w0
@@ -14976,9 +15292,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2481:
+.L2516:
 	cmp	w20, w12
-	bcc	.L2487
+	bcc	.L2522
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14994,41 +15310,41 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2466:
+.L2501:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2465
-.L2476:
-	adrp	x0, .LANCHOR71
+	b	.L2500
+.L2511:
+	adrp	x0, .LANCHOR73
 	strh	w20, [x24]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
-	cbnz	w0, .L2468
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L2503
 	mov	w0, w20
 	bl	ftl_test_block
-.L2468:
-	ldrb	w11, [x23, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR108
+.L2503:
+	ldrb	w11, [x23, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR104
 	ldr	x6, [x22, #:lo12:.LANCHOR7]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR108]
+	ldrb	w14, [x0, #:lo12:.LANCHOR104]
 	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR100]
+	ldr	x13, [x21, #:lo12:.LANCHOR102]
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2469:
+.L2504:
 	cmp	w8, w14
-	bcs	.L2473
+	bcs	.L2508
 	add	w15, w11, w7
-	b	.L2474
-.L2472:
+	b	.L2509
+.L2507:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2470
+	cbz	w0, .L2505
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -15036,29 +15352,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2471:
+.L2506:
 	add	w7, w7, 1
-.L2474:
+.L2509:
 	cmp	w7, w15
-	bne	.L2472
+	bne	.L2507
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2469
-.L2470:
+	b	.L2504
+.L2505:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2471
-.L2473:
-	cbnz	w10, .L2475
+	b	.L2506
+.L2508:
+	cbnz	w10, .L2510
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2475:
+.L2510:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2467
-.L2487:
+	b	.L2502
+.L2522:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -15066,48 +15382,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2482:
+.L2517:
 	cmp	w5, w15
-	bcc	.L2489
+	bcc	.L2524
 	add	w20, w20, 1
 	add	w1, w1, w16
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2481
-.L2485:
+	b	.L2516
+.L2520:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2483
+	tbnz	x11, 0, .L2518
 	cmp	w13, 1
-	bls	.L2488
+	bls	.L2523
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2484:
+.L2519:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2483:
+.L2518:
 	add	x7, x7, 1
-.L2486:
+.L2521:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2485
+	bcc	.L2520
 	add	w5, w5, 1
 	add	w6, w4, w6
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2482
-.L2488:
+	b	.L2517
+.L2523:
 	mov	w0, w1
-	b	.L2484
-.L2489:
+	b	.L2519
+.L2524:
 	mov	x7, 0
-	b	.L2486
+	b	.L2521
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -15116,27 +15432,27 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	adrp	x2, .LANCHOR6
 	mov	w3, 0
 	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	mov	w5, 0
 	ldrh	w7, [x2, #:lo12:.LANCHOR6]
 	adrp	x2, .LANCHOR7
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2500:
+.L2535:
 	cmp	w1, w7
-	bcc	.L2504
+	bcc	.L2539
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -15147,29 +15463,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2504:
+.L2539:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2501
+	bne	.L2536
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2502:
+.L2537:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2500
-.L2501:
+	b	.L2535
+.L2536:
 	cmp	w6, 16
-	bne	.L2503
+	bne	.L2538
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2502
-.L2503:
+	b	.L2537
+.L2538:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2502
+	b	.L2537
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -15191,19 +15507,19 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2509
+	bne	.L2544
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR113
+	adrp	x1, .LANCHOR109
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR113]
+	ldr	x20, [x1, #:lo12:.LANCHOR109]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2510
+	beq	.L2545
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
@@ -15212,10 +15528,10 @@ ftl_write_last_log_page:
 	add	x6, x0, :lo12:.LANCHOR176
 	movk	w1, 0xf55f, lsl 16
 	str	w1, [x0, #:lo12:.LANCHOR176]
-	adrp	x0, .LANCHOR83
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR78
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w1, w1, w0
 	mov	x0, x20
 	lsl	w1, w1, 2
@@ -15228,13 +15544,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2510:
+.L2545:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2509:
+.L2544:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -15254,41 +15570,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2516
+	tbz	x0, 12, .L2551
 	ldrh	w1, [x19, 2]
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-.L2516:
+.L2551:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2517
+	tbz	x0, 12, .L2552
 	ldrb	w1, [x19, 5]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-.L2517:
+.L2552:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2518
+	tbz	x0, 12, .L2553
 	ldrh	w1, [x19]
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-.L2518:
+.L2553:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2519
+	tbz	x0, 12, .L2554
 	ldrh	w2, [x19, 18]
-	adrp	x0, .LC147
+	adrp	x0, .LC154
 	ldrh	w1, [x19, 16]
-	add	x0, x0, :lo12:.LC147
+	add	x0, x0, :lo12:.LC154
 	bl	printf
-.L2519:
+.L2554:
 	ldrh	w0, [x19, 10]
 	strh	w0, [x19, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x19]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2515
+	bcs	.L2550
 	mov	w0, 1
 	add	x26, x29, 160
 	bl	buf_alloc
@@ -15302,68 +15618,68 @@ ftl_open_sblk_recovery:
 	ldrh	w23, [x19, 2]
 	add	x0, x0, :lo12:.LANCHOR123
 	mov	w27, 2
-	adrp	x24, .LANCHOR83
+	adrp	x24, .LANCHOR85
 	str	x0, [x29, 128]
 	str	wzr, [x29, 152]
-.L2521:
-	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+.L2556:
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	cmp	w0, w23
-	bhi	.L2534
-.L2524:
+	bhi	.L2569
+.L2559:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
-	ldrh	w2, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x24, #:lo12:.LANCHOR85]
 	add	w1, w1, w0
 	ldrb	w0, [x19, 9]
 	strh	w23, [x19, 2]
 	strb	w22, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2535
+	beq	.L2570
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1480
+	mov	w2, 1493
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2535:
-	adrp	x2, .LANCHOR113
+.L2570:
+	adrp	x2, .LANCHOR109
 	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR113]
+	ldr	x4, [x2, #:lo12:.LANCHOR109]
 	str	x2, [x29, 136]
-.L2536:
+.L2571:
 	cmp	w1, w3
-	bcc	.L2538
+	bcc	.L2573
 	ldrb	w22, [x19, 9]
 	adrp	x23, .LANCHOR9
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w1, [x24, #:lo12:.LANCHOR85]
 	madd	w22, w22, w1, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	sub	w22, w22, w3
 	and	w22, w22, 65535
-	tbz	x0, 12, .L2539
+	tbz	x0, 12, .L2574
 	ldrh	w1, [x19]
 	ldr	x2, [x23, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC148
+	adrp	x0, .LC155
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC148
+	add	x0, x0, :lo12:.LC155
 	bl	printf
-.L2539:
+.L2574:
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w1, [x19]
 	strh	w22, [x0, x1, lsl 1]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2540
+	tbz	x0, 14, .L2575
 	ldp	w1, w2, [x29, 160]
-	adrp	x0, .LC149
+	adrp	x0, .LC156
 	ldp	w3, w4, [x29, 168]
-	add	x0, x0, :lo12:.LC149
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-.L2540:
+.L2575:
 	adrp	x25, .LANCHOR123
 	ldr	x0, [x20, 8]
 	mov	w1, 0
@@ -15371,45 +15687,45 @@ ftl_open_sblk_recovery:
 	ldrb	w2, [x25, #:lo12:.LANCHOR123]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR76
-	add	x0, x0, :lo12:.LANCHOR76
+	adrp	x0, .LANCHOR78
+	add	x0, x0, :lo12:.LANCHOR78
 	str	x0, [x29, 112]
-.L2541:
-	adrp	x0, .LANCHOR76
+.L2576:
+	adrp	x0, .LANCHOR78
 	str	w23, [x29, 148]
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	ldrb	w0, [x0, #:lo12:.LANCHOR78]
 	mul	w0, w0, w27
 	cmp	w23, w0
-	bcc	.L2554
+	bcc	.L2589
 	mov	x0, x20
 	bl	buf_free
 	ldrh	w1, [x19, 12]
-	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	ldrb	w2, [x19, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
 	ldr	x1, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR113]
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2555
+	beq	.L2590
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1554
+	mov	w2, 1567
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2555:
+.L2590:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2515
+	bne	.L2550
 	mov	x0, x19
 	bl	ftl_write_last_log_page
-.L2515:
+.L2550:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15417,25 +15733,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L2534:
+.L2569:
 	ldrb	w22, [x19, 5]
-	adrp	x0, .LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR107
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 136]
-.L2522:
+.L2557:
 	ldrb	w0, [x19, 9]
 	cmp	w0, w22
-	bhi	.L2533
+	bhi	.L2568
 	add	w23, w23, 1
 	strb	wzr, [x19, 5]
 	and	w23, w23, 65535
-	b	.L2521
-.L2533:
+	b	.L2556
+.L2568:
 	add	x0, x19, x22, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2523
+	beq	.L2558
 	ldr	x1, [x29, 136]
 	ldr	x2, [x20, 24]
 	ldrh	w1, [x1]
@@ -15448,21 +15764,21 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w28, w0
 	cmp	w0, 512
-	beq	.L2524
+	beq	.L2559
 	cmn	w0, #1
-	beq	.L2525
+	beq	.L2560
 	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2525
+	bne	.L2560
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2525
+	bne	.L2560
 	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2524
-.L2525:
+	beq	.L2559
+.L2560:
 	adrp	x0, .LANCHOR182
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR182]
@@ -15470,58 +15786,58 @@ ftl_open_sblk_recovery:
 	ldrh	w1, [x19, 10]
 	madd	w0, w0, w23, w22
 	cmp	w1, w0
-	beq	.L2526
+	beq	.L2561
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1399
+	mov	w2, 1412
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2526:
+.L2561:
 	ldrh	w0, [x19, 10]
 	ldrh	w1, [x19, 6]
 	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2527
+	beq	.L2562
 	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1400
+	mov	w2, 1413
 	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2527:
+.L2562:
 	cmn	w28, #1
-	beq	.L2529
+	beq	.L2564
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2529
+	beq	.L2564
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2531
+	cbz	x25, .L2566
 	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2531
+	beq	.L2566
 	cmn	w0, #1
-	beq	.L2531
-	adrp	x4, .LANCHOR102
+	beq	.L2566
+	adrp	x4, .LANCHOR66
 	mov	w28, 21
 	mov	w27, 1
-	ldrh	w5, [x4, #:lo12:.LANCHOR102]
+	ldrh	w5, [x4, #:lo12:.LANCHOR66]
 	sub	w1, w28, w5
 	lsr	w2, w0, w5
-	adrp	x5, .LANCHOR101
+	adrp	x5, .LANCHOR67
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x5, #:lo12:.LANCHOR101]
+	ldrb	w2, [x5, #:lo12:.LANCHOR67]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2531
+	bne	.L2566
 	ldr	x1, [x29, 128]
 	adrp	x6, .LANCHOR178
 	ldr	w7, [x3]
@@ -15536,22 +15852,22 @@ ftl_open_sblk_recovery:
 	ldr	w7, [x29, 120]
 	ldr	w0, [x6, #:lo12:.LANCHOR178]
 	cmp	w7, w0
-	bhi	.L2531
+	bhi	.L2566
 	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2529
+	beq	.L2564
 	ldp	x5, x4, [x29, 104]
-	ldrh	w1, [x4, #:lo12:.LANCHOR102]
+	ldrh	w1, [x4, #:lo12:.LANCHOR66]
 	sub	w28, w28, w1
 	lsr	w0, w0, w1
 	lsl	w27, w27, w28
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x5, #:lo12:.LANCHOR101]
+	ldrb	w0, [x5, #:lo12:.LANCHOR67]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2529:
+.L2564:
 	ldrh	w0, [x19, 6]
 	mov	w27, 4
 	sub	w0, w0, #1
@@ -15561,28 +15877,28 @@ ftl_open_sblk_recovery:
 	strh	w0, [x19, 10]
 	mov	w0, 1
 	str	w0, [x29, 152]
-.L2523:
+.L2558:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L2522
-.L2538:
+	b	.L2557
+.L2573:
 	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2537
+	beq	.L2572
 	add	w22, w0, 1
 	and	w0, w22, 65535
-.L2537:
+.L2572:
 	add	w1, w1, 1
-	b	.L2536
-.L2554:
+	b	.L2571
+.L2589:
 	ldr	w0, [x26, x23, lsl 2]
-	adrp	x28, .LANCHOR100
+	adrp	x28, .LANCHOR102
 	cmn	w0, #1
-	bne	.L2542
-.L2546:
-	ldr	x1, [x28, #:lo12:.LANCHOR100]
+	bne	.L2577
+.L2581:
+	ldr	x1, [x28, #:lo12:.LANCHOR102]
 	mov	w22, -1
 	ldr	x0, [x20, 24]
 	ldr	w1, [x1, 8]
@@ -15590,22 +15906,22 @@ ftl_open_sblk_recovery:
 	stp	w22, wzr, [x0, 8]
 	ldr	x0, [x20, 8]
 	str	wzr, [x0]
-.L2543:
+.L2578:
 	ldr	w0, [x29, 152]
-	cbz	w0, .L2548
+	cbz	w0, .L2583
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2548
+	bls	.L2583
 	add	x0, x21, :lo12:.LANCHOR14
 	mov	x28, x0
 	add	x0, x25, :lo12:.LANCHOR123
 	str	x0, [x29, 128]
-.L2595:
+.L2630:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x28]
-	tbz	x0, 14, .L2550
+	tbz	x0, 14, .L2585
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	str	w4, [x29, 104]
@@ -15613,7 +15929,7 @@ ftl_open_sblk_recovery:
 	ldr	x0, [x29, 120]
 	bl	printf
 	ldr	w4, [x29, 104]
-.L2550:
+.L2585:
 	ldr	x0, [x29, 112]
 	ldr	w2, [x29, 148]
 	ldrh	w1, [x19, 6]
@@ -15622,7 +15938,7 @@ ftl_open_sblk_recovery:
 	add	w0, w0, 1
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L2548
+	bls	.L2583
 	ldr	x0, [x29, 128]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -15636,19 +15952,19 @@ ftl_open_sblk_recovery:
 	ldr	w1, [x29, 104]
 	cmn	w22, #1
 	ccmn	w1, #1, 4, ne
-	beq	.L2551
+	beq	.L2586
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2552
+	tbz	x0, 14, .L2587
 	ldr	x0, [x20, 24]
 	ldrh	w1, [x19, 12]
 	ldrh	w3, [x19, 10]
 	add	w3, w3, w1
 	ldp	w1, w2, [x0, 4]
 	sub	w3, w3, #1
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	bl	printf
-.L2552:
+.L2587:
 	ldr	x0, [x20, 24]
 	ldrh	w1, [x19, 12]
 	ldrh	w2, [x19, 10]
@@ -15657,10 +15973,10 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x0, 4]
 	sub	w2, w2, #1
 	bl	lpa_hash_update_ppa
-.L2548:
+.L2583:
 	add	x23, x23, 1
-	b	.L2541
-.L2542:
+	b	.L2576
+.L2577:
 	ldrb	w3, [x25, #:lo12:.LANCHOR123]
 	ldr	x1, [x20, 8]
 	ldr	x2, [x20, 24]
@@ -15671,18 +15987,18 @@ ftl_open_sblk_recovery:
 	bl	lpa_hash_get_ppa
 	mov	w4, w0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 14, .L2544
+	tbz	x0, 14, .L2579
 	ldr	x0, [x20, 24]
 	mov	w1, w4
 	ldr	w2, [x26, x23, lsl 2]
 	str	w4, [x29, 128]
 	ldr	w3, [x0, 4]
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	printf
 	ldr	w4, [x29, 128]
-.L2544:
-	ldr	x2, [x28, #:lo12:.LANCHOR100]
+.L2579:
+	ldr	x2, [x28, #:lo12:.LANCHOR102]
 	ldr	w0, [x26, x23, lsl 2]
 	cmp	w4, w0
 	ldr	x0, [x20, 24]
@@ -15695,37 +16011,37 @@ ftl_open_sblk_recovery:
 	mov	w1, 1
 	str	w4, [x0, 8]
 	str	w1, [x0, 12]
-	bne	.L2543
-	b	.L2546
-.L2551:
+	bne	.L2578
+	b	.L2581
+.L2586:
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2548
+	bls	.L2583
 	cmn	w22, #1
-	bne	.L2595
-	b	.L2548
-.L2531:
+	bne	.L2630
+	b	.L2583
+.L2566:
 	ldr	x3, [x20, 24]
 	adrp	x0, .LANCHOR120
 	ldr	w0, [x0, #:lo12:.LANCHOR120]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2529
+	bcs	.L2564
 	ldrb	w0, [x19, 9]
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w1, [x24, #:lo12:.LANCHOR85]
 	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2529
-	adrp	x0, .LANCHOR100
+	bge	.L2564
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L2532
+	bls	.L2567
 	str	w1, [x0, 8]
-.L2532:
+.L2567:
 	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
@@ -15738,7 +16054,7 @@ ftl_open_sblk_recovery:
 	str	w0, [x29, 168]
 	ldr	w0, [x29, 148]
 	str	w0, [x29, 172]
-	b	.L2529
+	b	.L2564
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
@@ -15750,46 +16066,46 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR83
+	adrp	x21, .LANCHOR85
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR107
+	adrp	x22, .LANCHOR103
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR100
+	adrp	x23, .LANCHOR102
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR83
+	add	x21, x21, :lo12:.LANCHOR85
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR107
+	add	x22, x22, :lo12:.LANCHOR103
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2618:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2653:
+	ldr	x0, [x23, #:lo12:.LANCHOR102]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2619
+	bcs	.L2654
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2620
-.L2619:
+	bne	.L2655
+.L2654:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2620:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L2655:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2621
+	bne	.L2656
 	adrp	x1, .LANCHOR190
 	adrp	x0, .LC0
 	mov	w2, 230
 	add	x1, x1, :lo12:.LANCHOR190
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2621:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L2656:
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	adrp	x27, .LANCHOR191
 	ldrh	w1, [x22]
 	mov	w2, 64
@@ -15801,7 +16117,7 @@ pm_write_page:
 	bl	ftl_memset
 	ldr	x3, [x27, #:lo12:.LANCHOR191]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
@@ -15810,34 +16126,34 @@ pm_write_page:
 	ldrb	w4, [x1, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldr	x2, [x20, #:lo12:.LANCHOR102]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
 	adrp	x1, .LANCHOR192
-	beq	.L2622
+	beq	.L2657
 	ldrb	w3, [x1, #:lo12:.LANCHOR192]
-	cbz	w3, .L2623
-.L2622:
+	cbz	w3, .L2658
+.L2657:
 	strb	wzr, [x1, #:lo12:.LANCHOR192]
-	b	.L2618
-.L2623:
+	b	.L2653
+.L2658:
 	cmn	w0, #1
-	bne	.L2625
+	bne	.L2660
 	mov	w1, w26
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	bl	printf
-	b	.L2618
-.L2625:
+	b	.L2653
+.L2660:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2626
+	bcs	.L2661
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2626:
+.L2661:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15864,15 +16180,15 @@ ftl_dump_write_open_sblk:
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
 	cmp	w0, w20
-	bls	.L2631
-	adrp	x25, .LANCHOR73
+	bls	.L2666
+	adrp	x25, .LANCHOR75
 	str	x25, [x29, 136]
-	ldrb	w0, [x25, #:lo12:.LANCHOR73]
-	cbnz	w0, .L2633
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L2631
-.L2633:
+	ldrb	w0, [x25, #:lo12:.LANCHOR75]
+	cbnz	w0, .L2668
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbz	w0, .L2666
+.L2668:
 	adrp	x0, .LANCHOR7
 	ubfiz	x14, x20, 2, 16
 	mov	x15, x0
@@ -15881,12 +16197,12 @@ ftl_dump_write_open_sblk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2653
-	adrp	x0, .LANCHOR69
-	ldrb	w10, [x0, #:lo12:.LANCHOR69]
-.L2634:
+	bne	.L2688
+	adrp	x0, .LANCHOR71
+	ldrb	w10, [x0, #:lo12:.LANCHOR71]
+.L2669:
 	add	x22, x29, 176
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR85
 	str	w10, [x29, 128]
 	mov	w0, w20
 	mov	w24, 0
@@ -15895,7 +16211,7 @@ ftl_dump_write_open_sblk:
 	mov	w27, 0
 	add	x1, x22, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	ldrh	w1, [x23, #:lo12:.LANCHOR85]
 	and	w0, w0, 255
 	strb	w0, [x29, 153]
 	strb	wzr, [x29, 149]
@@ -15909,9 +16225,9 @@ ftl_dump_write_open_sblk:
 	ldrb	w2, [x1, 2]
 	mov	w1, w20
 	ldrh	w4, [x0, x14]
-	adrp	x0, .LC154
+	adrp	x0, .LC161
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC161
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
@@ -15920,52 +16236,52 @@ ftl_dump_write_open_sblk:
 	bl	buf_alloc
 	mov	x19, x0
 	ldr	w10, [x29, 128]
-	adrp	x12, .LANCHOR107
-	add	x14, x23, :lo12:.LANCHOR83
-	add	x12, x12, :lo12:.LANCHOR107
-.L2635:
+	adrp	x12, .LANCHOR103
+	add	x14, x23, :lo12:.LANCHOR85
+	add	x12, x12, :lo12:.LANCHOR103
+.L2670:
 	ldrh	w0, [x14]
 	cmp	w0, w25
-	bls	.L2641
+	bls	.L2676
 	lsl	w11, w25, 1
-	adrp	x26, .LC155
+	adrp	x26, .LC162
 	sub	w11, w11, #1
 	mov	w27, 0
-	add	x26, x26, :lo12:.LC155
-	b	.L2645
-.L2653:
+	add	x26, x26, :lo12:.LC162
+	b	.L2680
+.L2688:
 	mov	w10, 1
-	b	.L2634
-.L2643:
+	b	.L2669
+.L2678:
 	ldrh	w13, [x22, x28]
 	mov	w0, 65535
 	cmp	w13, w0
-	bne	.L2636
-.L2642:
+	bne	.L2671
+.L2677:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2637:
+.L2672:
 	cmp	w10, w24
-	bcs	.L2643
+	bcs	.L2678
 	add	w27, w27, 1
 	and	w27, w27, 65535
-.L2645:
+.L2680:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w27
-	bls	.L2644
+	bls	.L2679
 	sxtw	x28, w27
 	mov	w24, 1
 	add	x28, x28, 8
 	lsl	x28, x28, 1
-	b	.L2637
-.L2636:
+	b	.L2672
+.L2671:
 	ldrh	w21, [x12]
 	cmp	w10, 3
 	mul	w21, w21, w13
-	bne	.L2638
+	bne	.L2673
 	add	w21, w25, w21
 	orr	w21, w21, w24, lsl 24
-.L2639:
+.L2674:
 	str	w21, [x19, 40]
 	mov	w1, 1
 	stp	x12, x14, [x29, 96]
@@ -16000,23 +16316,23 @@ ftl_dump_write_open_sblk:
 	ldp	w11, w10, [x29, 116]
 	cmp	w15, 512
 	ldp	x12, x14, [x29, 96]
-	bne	.L2642
-.L2641:
+	bne	.L2677
+.L2676:
 	mov	w4, w24
 	mov	w3, w27
 	mov	w2, w25
 	mov	w1, w20
 	adrp	x24, .LANCHOR123
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
 	ldr	x0, [x19, 8]
 	mov	w1, 0
 	ldrb	w2, [x24, #:lo12:.LANCHOR123]
-	adrp	x26, .LC157
-	adrp	x27, .LANCHOR69
-	add	x26, x26, :lo12:.LC157
-	add	x27, x27, :lo12:.LANCHOR69
+	adrp	x26, .LC164
+	adrp	x27, .LANCHOR71
+	add	x26, x26, :lo12:.LC164
+	add	x27, x27, :lo12:.LANCHOR71
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldr	x0, [x19, 24]
@@ -16024,78 +16340,78 @@ ftl_dump_write_open_sblk:
 	ldrb	w2, [x24, #:lo12:.LANCHOR123]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L2646:
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+.L2681:
+	ldrh	w0, [x23, #:lo12:.LANCHOR85]
 	cmp	w0, w25
-	bls	.L2651
+	bls	.L2686
 	ldr	x0, [x29, 136]
 	lsl	w28, w25, 1
 	mov	w21, 0
-	add	x0, x0, :lo12:.LANCHOR73
+	add	x0, x0, :lo12:.LANCHOR75
 	str	x0, [x29, 128]
-	b	.L2652
-.L2638:
+	b	.L2687
+.L2673:
 	cmp	w10, 2
-	bne	.L2640
-	adrp	x0, .LANCHOR69
+	bne	.L2675
+	adrp	x0, .LANCHOR71
 	add	w21, w21, w11
 	add	w21, w21, w24
-	ldrb	w3, [x0, #:lo12:.LANCHOR69]
+	ldrb	w3, [x0, #:lo12:.LANCHOR71]
 	orr	w21, w21, w3, lsl 24
-	b	.L2639
-.L2640:
+	b	.L2674
+.L2675:
 	add	w21, w25, w21
-	b	.L2639
-.L2644:
+	b	.L2674
+.L2679:
 	add	w8, w25, 1
 	and	w25, w8, 65535
-	b	.L2635
-.L2650:
+	b	.L2670
+.L2685:
 	mov	w2, w21
 	mov	w1, w25
 	mov	x0, x26
 	bl	printf
 	ldr	x0, [x29, 128]
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR103
 	ldrb	w1, [x0]
 	sxtw	x0, w21
-	cbz	w1, .L2647
+	cbz	w1, .L2682
 	add	x0, x0, 8
-	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	ldrh	w1, [x2, #:lo12:.LANCHOR103]
 	ldrh	w0, [x22, x0, lsl 1]
 	mul	w0, w0, w1
 	orr	w0, w0, w25
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_3d_tlc_dump_prog
-.L2648:
+.L2683:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-.L2652:
+.L2687:
 	ldrb	w0, [x29, 153]
 	cmp	w0, w21
-	bhi	.L2650
+	bhi	.L2685
 	add	w8, w25, 1
 	and	w25, w8, 65535
-	b	.L2646
-.L2647:
+	b	.L2681
+.L2682:
 	ldrb	w1, [x27]
 	add	x0, x0, 8
 	cmp	w1, 2
-	bne	.L2649
+	bne	.L2684
 	ldrh	w0, [x22, x0, lsl 1]
-	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	ldrh	w1, [x2, #:lo12:.LANCHOR103]
 	mul	w0, w0, w1
 	orr	w0, w0, w28
 	orr	w0, w0, 33554432
 	str	w0, [x19, 40]
 	mov	x0, x19
 	bl	sblk_mlc_dump_prog
-	b	.L2648
-.L2649:
+	b	.L2683
+.L2684:
 	ldrh	w1, [x22, x0, lsl 1]
 	mov	w5, 0
-	ldrh	w0, [x2, #:lo12:.LANCHOR107]
+	ldrh	w0, [x2, #:lo12:.LANCHOR103]
 	ldrb	w4, [x24, #:lo12:.LANCHOR123]
 	ldr	x2, [x19, 8]
 	ldr	x3, [x19, 24]
@@ -16105,15 +16421,15 @@ ftl_dump_write_open_sblk:
 	ubfx	x0, x1, 21, 3
 	and	w1, w1, -14680065
 	bl	flash_prog_page_en
-	b	.L2648
-.L2651:
+	b	.L2683
+.L2686:
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LC158
+	adrp	x0, .LC165
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC158
+	add	x0, x0, :lo12:.LC165
 	bl	printf
-.L2631:
+.L2666:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -16137,41 +16453,41 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2662
+	tbz	x0, 12, .L2697
 	adrp	x2, .LANCHOR193
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 324
-	add	x0, x0, :lo12:.LC86
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2662:
+.L2697:
 	adrp	x23, .LANCHOR194
-	adrp	x20, .LANCHOR26
+	adrp	x20, .LANCHOR27
 	mov	w2, 64
 	mov	w1, 0
 	ldr	x0, [x23, #:lo12:.LANCHOR194]
 	adrp	x21, .LANCHOR195
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC160
+	adrp	x24, .LC167
 	adrp	x25, .LANCHOR140
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC160
+	add	x24, x24, :lo12:.LC167
 	add	x25, x25, :lo12:.LANCHOR140
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR195
-	ldr	x1, [x20, #:lo12:.LANCHOR26]
+	ldr	x1, [x20, #:lo12:.LANCHOR27]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR26]
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2663:
+.L2698:
 	add	x28, x21, :lo12:.LANCHOR195
 	ldrb	w4, [x21, #:lo12:.LANCHOR195]
 	ldrh	w19, [x22]
@@ -16186,8 +16502,8 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2664
-	ldr	x6, [x20, #:lo12:.LANCHOR26]
+	blt	.L2699
+	ldr	x6, [x20, #:lo12:.LANCHOR27]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
@@ -16205,19 +16521,19 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2673:
+.L2708:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2665
-.L2668:
+	b	.L2700
+.L2703:
 	mov	w26, 1
-	b	.L2663
-.L2664:
+	b	.L2698
+.L2699:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2673
-.L2665:
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	cbz	w1, .L2708
+.L2700:
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w5, 1
@@ -16233,14 +16549,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2666
+	bne	.L2701
 	mov	w1, w19
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	bl	printf
-	b	.L2663
-.L2666:
-	cbz	w26, .L2668
+	b	.L2698
+.L2701:
+	cbz	w26, .L2703
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16260,21 +16576,21 @@ flash_info_blk_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR26
+	adrp	x20, .LANCHOR27
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L2675
-	ldr	x4, [x20, #:lo12:.LANCHOR26]
+	tbz	x0, 12, .L2710
+	ldr	x4, [x20, #:lo12:.LANCHOR27]
 	adrp	x2, .LANCHOR196
-	adrp	x0, .LC162
+	adrp	x0, .LC169
 	mov	w3, 2048
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	w1, 50
-	add	x0, x0, :lo12:.LC162
+	add	x0, x0, :lo12:.LC169
 	bl	printf
-.L2675:
+.L2710:
 	adrp	x21, .LANCHOR194
 	adrp	x24, .LANCHOR2
 	mov	w22, 21321
@@ -16282,29 +16598,29 @@ flash_info_blk_init:
 	mov	x23, x21
 	mov	w19, 4
 	movk	w22, 0x5359, lsl 16
-.L2678:
+.L2713:
 	ldrh	w1, [x26]
 	mov	w4, 4
 	ldr	x3, [x21, #:lo12:.LANCHOR194]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	add	x27, x21, :lo12:.LANCHOR194
-	add	x25, x20, :lo12:.LANCHOR26
+	add	x25, x20, :lo12:.LANCHOR27
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2676
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	beq	.L2711
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x2]
 	cmp	w0, w22
-	beq	.L2677
-.L2676:
+	beq	.L2712
+.L2711:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2678
-.L2703:
+	bne	.L2713
+.L2738:
 	mov	w0, -1
-.L2674:
+.L2709:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16312,43 +16628,43 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2686:
+.L2721:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w22
-	bne	.L2687
+	bne	.L2722
 	ldr	w21, [x0, 4]
-.L2680:
+.L2715:
 	add	x22, x19, :lo12:.LANCHOR195
 	ldrh	w0, [x24, #:lo12:.LANCHOR2]
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	ldrb	w1, [x22, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2681
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	beq	.L2716
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L2681
+	bne	.L2716
 	ldr	w1, [x0, 4]
 	cmp	w21, w1
-	bcs	.L2681
+	bcs	.L2716
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
 	strb	w1, [x19, #:lo12:.LANCHOR195]
 	strb	w0, [x22, 1]
-.L2681:
+.L2716:
 	ldrb	w1, [x19, #:lo12:.LANCHOR195]
 	add	x21, x19, :lo12:.LANCHOR195
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	and	w25, w0, 65535
@@ -16361,42 +16677,42 @@ flash_info_blk_init:
 	movk	w24, 0x5359, lsl 16
 	mul	w22, w22, w1
 	add	w22, w22, w0, sxth
-.L2682:
+.L2717:
 	sub	w0, w25, w21
 	sxth	w19, w0
-	tbz	w19, #31, .L2685
+	tbz	w19, #31, .L2720
 	cmn	w19, #1
-	bne	.L2684
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	bne	.L2719
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w1, [x0]
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	bl	printf
-	b	.L2703
-.L2685:
+	b	.L2738
+.L2720:
 	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	x2, [x20, #:lo12:.LANCHOR27]
 	sub	w1, w22, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L2683
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	beq	.L2718
+	ldr	x0, [x20, #:lo12:.LANCHOR27]
 	ldr	w0, [x0]
 	cmp	w0, w24
-	beq	.L2684
-.L2683:
+	beq	.L2719
+.L2718:
 	add	w21, w21, 1
-	b	.L2682
-.L2684:
+	b	.L2717
+.L2719:
 	cmp	w21, 1
-	bls	.L2688
+	bls	.L2723
 	bl	flash_info_flush
-.L2688:
+.L2723:
 	mov	w0, 0
-	b	.L2674
-.L2677:
+	b	.L2709
+.L2712:
 	adrp	x19, .LANCHOR195
 	add	x1, x19, :lo12:.LANCHOR195
 	ldrb	w3, [x2, 37]
@@ -16410,10 +16726,10 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L2686
-.L2687:
+	bne	.L2721
+.L2722:
 	mov	w21, 0
-	b	.L2680
+	b	.L2715
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
@@ -16429,23 +16745,23 @@ nand_flash_init:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2705
+	tbz	x0, 12, .L2740
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2459
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2490
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2705:
+.L2740:
 	adrp	x0, .LANCHOR160
 	adrp	x23, .LANCHOR16
-	adrp	x22, .LANCHOR41
-	add	x24, x22, :lo12:.LANCHOR41
+	adrp	x22, .LANCHOR42
+	add	x24, x22, :lo12:.LANCHOR42
 	str	wzr, [x0, #:lo12:.LANCHOR160]
 	mov	x0, x19
 	bl	nandc_init
-	adrp	x19, .LANCHOR30
-	add	x0, x19, :lo12:.LANCHOR30
+	adrp	x19, .LANCHOR31
+	add	x0, x19, :lo12:.LANCHOR31
 	mov	x25, x24
 	str	x0, [x23, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
@@ -16455,27 +16771,27 @@ nand_flash_init:
 	strb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w2, 8
 	mov	w1, 0
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
 	adrp	x0, .LANCHOR141
 	add	x0, x0, :lo12:.LANCHOR141
 	bl	ftl_memset
-.L2711:
+.L2746:
 	mov	x1, x24
 	mov	w0, w21
 	bl	flash_read_id
-	cbnz	w21, .L2706
+	cbnz	w21, .L2741
 	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2707
-.L2709:
+	bls	.L2742
+.L2744:
 	mov	w19, -2
-.L2704:
+.L2739:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16483,35 +16799,35 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2707:
+.L2742:
 	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2709
-.L2706:
+	beq	.L2744
+.L2741:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2710
+	bne	.L2745
 	strb	w26, [x24]
-.L2710:
+.L2745:
 	add	w21, w21, 1
 	add	x24, x24, 8
 	and	w21, w21, 255
 	cmp	w21, 4
-	bne	.L2711
+	bne	.L2746
 	adrp	x0, .LANCHOR198
 	add	x8, x0, :lo12:.LANCHOR198
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x22, :lo12:.LANCHOR41
+	add	x12, x22, :lo12:.LANCHOR42
 	mov	x10, 0
-.L2714:
+.L2749:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2712
+	cbnz	w0, .L2747
 	add	x0, x7, :lo12:.LANCHOR198
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
@@ -16520,66 +16836,66 @@ nand_flash_init:
 	add	x4, x1, :lo12:.LANCHOR199
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2713:
+.L2748:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2715
+	beq	.L2750
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2713
+	bne	.L2748
 	mov	w2, w0
-.L2715:
+.L2750:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	bl	ftl_memcpy
-	add	x21, x19, :lo12:.LANCHOR30
+	add	x21, x19, :lo12:.LANCHOR31
 	mov	x1, x24
-	adrp	x24, .LANCHOR27
+	adrp	x24, .LANCHOR28
 	mov	w2, 32
 	mov	x0, x21
 	bl	ftl_memcpy
-	ldrb	w0, [x24, #:lo12:.LANCHOR27]
+	ldrb	w0, [x24, #:lo12:.LANCHOR28]
 	cmp	w0, 8
-	bhi	.L2716
+	bhi	.L2751
 	ldrb	w1, [x21, 20]
 	cmp	w1, 60
-	bls	.L2717
+	bls	.L2752
 	mov	w1, 60
 	strb	w1, [x21, 20]
-.L2717:
+.L2752:
 	cmp	w0, 8
-	bne	.L2716
-	ldrb	w0, [x22, #:lo12:.LANCHOR41]
+	bne	.L2751
+	ldrb	w0, [x22, #:lo12:.LANCHOR42]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2716
-	add	x0, x19, :lo12:.LANCHOR30
+	bne	.L2751
+	add	x0, x19, :lo12:.LANCHOR31
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2716
+	bne	.L2751
 	strb	wzr, [x0, 28]
-.L2716:
+.L2751:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2718
+	tbz	x0, 12, .L2753
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2484
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2515
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2718:
+.L2753:
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR164
-	adrp	x22, .LANCHOR26
-	add	x21, x19, :lo12:.LANCHOR30
+	adrp	x22, .LANCHOR27
+	add	x21, x19, :lo12:.LANCHOR31
 	str	x0, [x1, #:lo12:.LANCHOR164]
 	mov	w0, 16384
 	bl	ftl_malloc
@@ -16587,7 +16903,7 @@ nand_flash_init:
 	str	x0, [x1, #:lo12:.LANCHOR156]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x22, #:lo12:.LANCHOR26]
+	str	x0, [x22, #:lo12:.LANCHOR27]
 	mov	w0, 64
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR163
@@ -16610,102 +16926,102 @@ nand_flash_init:
 	bl	nandc_bch_sel
 	str	xzr, [x21, #:lo12:.LANCHOR162]
 	ldr	x1, [x23, #:lo12:.LANCHOR16]
-	adrp	x23, .LANCHOR42
+	adrp	x23, .LANCHOR43
 	ldrh	w0, [x1, 16]
 	ldrb	w1, [x1, 28]
 	ubfx	x2, x0, 8, 3
-	strb	w2, [x23, #:lo12:.LANCHOR42]
+	strb	w2, [x23, #:lo12:.LANCHOR43]
 	adrp	x2, .LANCHOR168
 	ubfx	x3, x0, 3, 1
 	strb	w3, [x2, #:lo12:.LANCHOR168]
-	adrp	x2, .LANCHOR38
+	adrp	x2, .LANCHOR39
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR73
+	strb	w3, [x2, #:lo12:.LANCHOR39]
+	adrp	x2, .LANCHOR75
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR70
+	strb	w3, [x2, #:lo12:.LANCHOR75]
+	adrp	x2, .LANCHOR72
 	ubfx	x3, x0, 13, 1
-	strb	w3, [x2, #:lo12:.LANCHOR70]
+	strb	w3, [x2, #:lo12:.LANCHOR72]
 	adrp	x2, .LANCHOR1
 	ubfx	x3, x0, 14, 1
 	lsr	w0, w0, 15
 	strb	w3, [x2, #:lo12:.LANCHOR1]
-	adrp	x2, .LANCHOR71
-	strb	w0, [x2, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR73
+	strb	w0, [x2, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR0
 	mov	w2, 60
 	strb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR17
 	strb	w2, [x0, #:lo12:.LANCHOR17]
-	ldrb	w2, [x24, #:lo12:.LANCHOR27]
+	ldrb	w2, [x24, #:lo12:.LANCHOR28]
 	cmp	w2, 9
-	bne	.L2719
+	bne	.L2754
 	mov	w2, 70
 	strb	w2, [x0, #:lo12:.LANCHOR17]
-.L2719:
-	adrp	x0, .LANCHOR49
-	strb	w1, [x0, #:lo12:.LANCHOR49]
-	add	x1, x19, :lo12:.LANCHOR30
+.L2754:
+	adrp	x0, .LANCHOR19
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+	add	x1, x19, :lo12:.LANCHOR31
 	ldrb	w1, [x1, 7]
 	cmp	w1, 9
-	bne	.L2720
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
-.L2720:
-	add	x19, x19, :lo12:.LANCHOR30
-	adrp	x25, .LANCHOR23
+	bne	.L2755
+	strb	wzr, [x0, #:lo12:.LANCHOR19]
+.L2755:
+	add	x19, x19, :lo12:.LANCHOR31
+	adrp	x25, .LANCHOR24
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2722
+	strb	w0, [x25, #:lo12:.LANCHOR24]
+	tbz	x1, 6, .L2757
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
 	ccmp	w0, 21, 4, hi
-	bne	.L2723
+	bne	.L2758
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
 	str	x1, [x21, #:lo12:.LANCHOR162]
 	cmp	w0, 21
 	adrp	x0, .LANCHOR159
-	beq	.L2724
+	beq	.L2759
 	mov	w1, 15
-.L2771:
+.L2806:
 	strb	w1, [x0, #:lo12:.LANCHOR159]
-	b	.L2722
-.L2712:
+	b	.L2757
+.L2747:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 38
-	bne	.L2714
-	b	.L2709
-.L2724:
+	bne	.L2749
+	b	.L2744
+.L2759:
 	mov	w1, 4
-	b	.L2771
-.L2723:
+	b	.L2806
+.L2758:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2726
+	bhi	.L2761
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
 	str	x0, [x21, #:lo12:.LANCHOR162]
-	adrp	x0, .LANCHOR25
+	adrp	x0, .LANCHOR26
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2773:
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+.L2808:
 	mov	w1, 7
 	adrp	x0, .LANCHOR159
-	b	.L2771
-.L2726:
+	b	.L2806
+.L2761:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2727
+	bhi	.L2762
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
 	str	x2, [x21, #:lo12:.LANCHOR162]
@@ -16713,89 +17029,89 @@ nand_flash_init:
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR159
-	beq	.L2728
+	beq	.L2763
 	mov	w2, 7
-.L2770:
+.L2805:
 	strb	w2, [x0, #:lo12:.LANCHOR159]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR25
-	bhi	.L2730
+	adrp	x0, .LANCHOR26
+	bhi	.L2765
 	mov	w1, 4
-.L2772:
-	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2722:
+.L2807:
+	strb	w1, [x0, #:lo12:.LANCHOR26]
+.L2757:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2731
+	tbz	x0, 12, .L2766
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2537
-	add	x0, x0, :lo12:.LC86
-	bl	printf
-.L2731:
-	adrp	x24, .LANCHOR20
-	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2732
+	mov	w1, 2573
+	add	x0, x0, :lo12:.LC90
+	bl	printf
+.L2766:
+	adrp	x24, .LANCHOR21
+	ldrb	w0, [x23, #:lo12:.LANCHOR43]
+	strb	wzr, [x24, #:lo12:.LANCHOR21]
+	tbz	x0, 0, .L2767
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2774:
+.L2809:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2734
+	bne	.L2769
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2735
+	tbz	x0, 12, .L2770
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2568
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2605
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2735:
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+.L2770:
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	mov	w1, 17
 	strb	w1, [x0, 32]
 	mov	w0, 0
 	bl	zftl_flash_exit_slc_mode
-	b	.L2704
-.L2728:
+	b	.L2739
+.L2763:
 	mov	w2, 17
-	b	.L2770
-.L2730:
+	b	.L2805
+.L2765:
 	mov	w1, 5
-	b	.L2772
-.L2727:
+	b	.L2807
+.L2762:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2722
+	bhi	.L2757
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x21, #:lo12:.LANCHOR162]
-	b	.L2773
-.L2732:
+	b	.L2808
+.L2767:
 	mov	w0, 4
-	b	.L2774
-.L2734:
-	ldrb	w0, [x25, #:lo12:.LANCHOR23]
+	b	.L2809
+.L2769:
+	ldrb	w0, [x25, #:lo12:.LANCHOR24]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 7
-	bhi	.L2736
+	bhi	.L2771
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
 	str	x0, [x21, #:lo12:.LANCHOR162]
-.L2736:
-	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2738
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+.L2771:
+	ldrb	w0, [x23, #:lo12:.LANCHOR43]
+	tbz	x0, 2, .L2773
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2738
+	cbz	w0, .L2773
 	adrp	x0, .LANCHOR195
 	ldrb	w1, [x0, #:lo12:.LANCHOR195]
 	adrp	x0, .LANCHOR2
@@ -16803,24 +17119,24 @@ nand_flash_init:
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2738
-	ldr	x0, [x22, #:lo12:.LANCHOR26]
+	ldrb	w0, [x24, #:lo12:.LANCHOR21]
+	cbnz	w0, .L2773
+	ldr	x0, [x22, #:lo12:.LANCHOR27]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2738:
+.L2773:
 	ldr	w0, [x20, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2740
+	tbz	x0, 12, .L2775
 	adrp	x2, .LANCHOR197
-	adrp	x0, .LC86
+	adrp	x0, .LC90
 	add	x2, x2, :lo12:.LANCHOR197
-	mov	w1, 2634
-	add	x0, x0, :lo12:.LC86
+	mov	w1, 2671
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-.L2740:
+.L2775:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2704
+	b	.L2739
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -16837,31 +17153,37 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR83
+	adrp	x25, .LANCHOR85
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
-	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR107
-	adrp	x28, .LANCHOR123
-	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR83
-	add	x27, x27, :lo12:.LANCHOR107
-	add	x28, x28, :lo12:.LANCHOR123
+	ldr	x28, [x0, 8]
+	adrp	x26, .LANCHOR103
+	adrp	x27, .LANCHOR123
+	mov	x24, x0
+	add	x25, x25, :lo12:.LANCHOR85
+	add	x26, x26, :lo12:.LANCHOR103
+	add	x27, x27, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2776:
-	ldrh	w0, [x26]
+.L2811:
+	ldrh	w0, [x25]
 	cmp	w0, w19
-	bhi	.L2778
-	mov	x0, x25
+	bhi	.L2813
+	add	x1, x28, 704
+	mov	w3, 32
+	mov	w2, 4
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	bl	rknand_print_hex
+	mov	x0, x24
 	bl	buf_free
-	cbz	w20, .L2779
+	cbz	w20, .L2814
 	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
-	mov	w2, 1338
+	mov	w2, 1351
 	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2779:
+.L2814:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -16871,18 +17193,18 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2778:
-	ldrh	w21, [x27]
-	ldrb	w3, [x28]
-	ldr	x1, [x25, 8]
-	ldr	x2, [x25, 24]
+.L2813:
+	ldrh	w21, [x26]
+	ldrb	w3, [x27]
+	ldr	x1, [x24, 8]
+	ldr	x2, [x24, 24]
 	madd	w21, w21, w23, w19
 	mov	w0, w21
 	bl	ftl_read_ppa_page
 	mov	w22, w0
-	ldr	x1, [x25, 24]
+	ldr	x1, [x24, 24]
 	mov	w4, w0
-	ldr	x0, [x25, 8]
+	ldr	x0, [x24, 8]
 	mov	w3, w21
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
@@ -16900,19 +17222,13 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
-	mov	w3, 32
-	mov	w2, 4
-	add	x1, x24, 704
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
-	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2776
+	b	.L2811
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -16923,13 +17239,13 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR52
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LC165
+	adrp	x0, .LC172
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC165
+	add	x0, x0, :lo12:.LC172
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR100
+	adrp	x22, .LANCHOR102
 	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR83
+	adrp	x20, .LANCHOR85
 	bl	printf
 	adrp	x21, .LANCHOR6
 	adrp	x0, .LANCHOR179
@@ -16937,18 +17253,18 @@ dump_ftl_info:
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
 	ldrb	w1, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR102]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -16956,8 +17272,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -16965,36 +17281,36 @@ dump_ftl_info:
 	ldrh	w1, [x1, 48]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR76
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x19, .LANCHOR78
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR78]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR85]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR113
-	ldr	x1, [x0, #:lo12:.LANCHOR113]
-	adrp	x0, .LC171
+	adrp	x0, .LANCHOR109
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LC178
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC171
+	add	x0, x0, :lo12:.LC178
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC172
-	add	x0, x0, :lo12:.LC172
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR102]
 	mov	w2, 4
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -17002,28 +17318,28 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR112
-	adrp	x0, .LC174
-	add	x1, x1, :lo12:.LANCHOR112
-	add	x0, x0, :lo12:.LC174
+	adrp	x1, .LANCHOR108
+	adrp	x0, .LC181
+	add	x1, x1, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LC181
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR78]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR85]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR110
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -17031,17 +17347,17 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR66
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR102]
+	ldrh	w3, [x3, #:lo12:.LANCHOR66]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR101
-	ldrb	w3, [x3, #:lo12:.LANCHOR101]
+	adrp	x3, .LANCHOR67
+	ldrb	w3, [x3, #:lo12:.LANCHOR67]
 	udiv	w4, w4, w3
 	adrp	x3, .LANCHOR7
 	ldr	x3, [x3, #:lo12:.LANCHOR7]
@@ -17050,20 +17366,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2790
+	bne	.L2825
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2790:
+.L2825:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -17079,22 +17395,22 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2796
+	bls	.L2831
 	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
 	mov	w2, 31
 	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2796:
-	adrp	x22, .LANCHOR100
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2831:
+	adrp	x22, .LANCHOR102
+	ldr	x0, [x22, #:lo12:.LANCHOR102]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2797
+	bcs	.L2832
 	mov	w1, w19
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
 	adrp	x0, .LANCHOR203
 	mov	w1, 255
@@ -17102,19 +17418,19 @@ load_l2p_region:
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR102]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2799
+	bcs	.L2834
 	mov	w2, 35
-.L2804:
+.L2839:
 	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2799
-.L2797:
+	b	.L2834
+.L2832:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -17123,25 +17439,25 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2800
+	cbnz	w21, .L2835
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC178
-	add	x0, x0, :lo12:.LC178
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
 	adrp	x0, .LANCHOR203
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR203]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2799:
+.L2834:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2800:
+.L2835:
 	adrp	x20, .LANCHOR191
 	adrp	x24, .LANCHOR123
 	ldr	x1, [x23, 8]
@@ -17152,40 +17468,40 @@ load_l2p_region:
 	ldr	x1, [x20, #:lo12:.LANCHOR191]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2801
+	beq	.L2836
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR102]
 	mov	w2, 4
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR123]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
 	ldr	x1, [x20, #:lo12:.LANCHOR191]
-	adrp	x0, .LC182
+	adrp	x0, .LC189
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC182
+	add	x0, x0, :lo12:.LC189
 	bl	rknand_print_hex
-.L2801:
+.L2836:
 	ldr	x0, [x20, #:lo12:.LANCHOR191]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2799
+	beq	.L2834
 	mov	w2, 59
-	b	.L2804
+	b	.L2839
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -17195,29 +17511,29 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
+	adrp	x20, .LANCHOR102
 	adrp	x19, .LANCHOR146
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR102]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
 	ldrh	w0, [x19, #:lo12:.LANCHOR146]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2807
+	blt	.L2842
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldr	x2, [x20, #:lo12:.LANCHOR102]
 	ldrh	w1, [x19, #:lo12:.LANCHOR146]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2807
+	blt	.L2842
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2809
+	bne	.L2844
 	adrp	x1, .LANCHOR204
 	add	x1, x1, :lo12:.LANCHOR204
 	mov	w2, 131
@@ -17225,10 +17541,10 @@ pm_gc:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2809:
+.L2844:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR132
@@ -17240,28 +17556,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2810
+	beq	.L2845
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2810
+	cbz	x1, .L2845
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2810
+	tbz	w2, #31, .L2845
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2810:
+.L2845:
 	add	x1, x23, :lo12:.LANCHOR132
-	adrp	x25, .LANCHOR102
+	adrp	x25, .LANCHOR66
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR66
 	mov	w19, 0
-.L2811:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L2846:
+	ldr	x1, [x20, #:lo12:.LANCHOR102]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2813
+	bhi	.L2848
 	bl	pm_free_sblk
-.L2807:
+.L2842:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -17269,7 +17585,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2813:
+.L2848:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -17280,11 +17596,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2812
+	bne	.L2847
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -17293,10 +17609,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2812:
+.L2847:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2811
+	b	.L2846
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -17318,10 +17634,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR130
 	ldr	w0, [x19, #:lo12:.LANCHOR130]
-	cbz	w0, .L2819
+	cbz	w0, .L2854
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR130]
-.L2819:
+.L2854:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17339,17 +17655,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR132
 	mov	w20, 0
 	add	x19, x19, 2
-.L2826:
+.L2861:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2825
+	tbz	w0, #31, .L2860
 	mov	w0, w20
 	bl	pm_flush_id
-.L2825:
+.L2860:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2826
+	bne	.L2861
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17418,57 +17734,57 @@ pm_init:
 	add	x19, x19, :lo12:.LANCHOR123
 	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w25, -1
-.L2836:
+.L2871:
 	strh	w25, [x21]
 	strh	wzr, [x21, 2]
-	cbz	w24, .L2835
+	cbz	w24, .L2870
 	ldrb	w0, [x19]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x21, 8]
-.L2835:
+.L2870:
 	add	x21, x21, 16
 	cmp	x21, x23
-	bne	.L2836
+	bne	.L2871
 	add	x0, x20, :lo12:.LANCHOR132
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
 	ldr	x24, [x22, #:lo12:.LANCHOR191]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2837
+	bgt	.L2872
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
-	adrp	x27, .LANCHOR107
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
+	adrp	x27, .LANCHOR103
 	adrp	x28, .LANCHOR123
-	add	x27, x27, :lo12:.LANCHOR107
+	add	x27, x27, :lo12:.LANCHOR103
 	add	x28, x28, :lo12:.LANCHOR123
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	ldrsh	w21, [x0, 696]
-.L2838:
+.L2873:
 	cmp	w21, w26
-	ble	.L2840
+	ble	.L2875
 	adrp	x0, .LANCHOR182
 	mov	w1, 1
 	add	w23, w23, 1
 	strb	w1, [x0, #:lo12:.LANCHOR182]
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
-.L2837:
+.L2872:
 	add	x20, x20, :lo12:.LANCHOR132
 	mov	w0, -1
 	ldr	x1, [x20, 8]
@@ -17492,8 +17808,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2840:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2875:
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -17504,32 +17820,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2839
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2874
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2839
+	bcs	.L2874
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2839:
+.L2874:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2838
+	b	.L2873
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -17549,15 +17865,15 @@ pm_log2phys:
 	ldr	w2, [x0, #:lo12:.LANCHOR120]
 	str	x27, [sp, 80]
 	cmp	w25, w2
-	bcc	.L2850
+	bcc	.L2885
 	mov	w1, w25
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
 	mov	w0, -1
-	cbnz	w24, .L2849
+	cbnz	w24, .L2884
 	str	w0, [x23]
-.L2849:
+.L2884:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17565,7 +17881,7 @@ pm_log2phys:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2850:
+.L2885:
 	adrp	x0, .LANCHOR123
 	adrp	x21, .LANCHOR132
 	mov	x19, 0
@@ -17575,35 +17891,35 @@ pm_log2phys:
 	lsl	w22, w20, 7
 	udiv	w22, w25, w22
 	and	w26, w22, 65535
-.L2856:
+.L2891:
 	ldr	x1, [x0]
-	cbz	x1, .L2852
+	cbz	x1, .L2887
 	ldrh	w1, [x0, -8]
 	cmp	w1, w26
-	bne	.L2852
-.L2853:
+	bne	.L2887
+.L2888:
 	ubfiz	w20, w20, 7, 9
 	msub	w25, w26, w20, w25
 	and	x25, x25, 65535
-	cbnz	w24, .L2854
+	cbnz	w24, .L2889
 	add	x0, x21, :lo12:.LANCHOR132
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x25, lsl 2]
 	str	w0, [x23]
-.L2855:
+.L2890:
 	add	x21, x21, :lo12:.LANCHOR132
 	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2859
+	beq	.L2894
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2859:
+.L2894:
 	mov	w0, 0
-	b	.L2849
-.L2854:
+	b	.L2884
+.L2889:
 	add	x0, x21, :lo12:.LANCHOR132
 	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
@@ -17614,13 +17930,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR133
 	strb	w22, [x0, #:lo12:.LANCHOR133]
-	b	.L2855
-.L2852:
+	b	.L2890
+.L2887:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2856
+	bne	.L2891
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -17630,17 +17946,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2857
+	beq	.L2892
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2857
+	tbz	w1, #31, .L2892
 	bl	pm_flush_id
-.L2857:
+.L2892:
 	adrp	x0, .LANCHOR205
 	mov	w1, w27
 	strb	w19, [x0, #:lo12:.LANCHOR205]
 	mov	w0, w26
 	bl	load_l2p_region
-	b	.L2853
+	b	.L2888
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -17648,14 +17964,14 @@ pm_log2phys:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR76
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
 	adrp	x21, .LANCHOR10
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR10]
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	strb	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR150
 	stp	x23, x24, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR150]
@@ -17668,7 +17984,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2866
+	beq	.L2901
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -17676,41 +17992,41 @@ gc_recovery:
 	mov	x26, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR107
-	adrp	x2, .LANCHOR69
+	adrp	x3, .LANCHOR103
+	adrp	x2, .LANCHOR71
 	sub	w0, w0, #1
 	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR107]
+	ldrh	w1, [x3, #:lo12:.LANCHOR103]
 	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR69]
+	ldrb	w0, [x2, #:lo12:.LANCHOR71]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2867
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2902
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2911:
+.L2946:
 	str	w0, [x26, 40]
-.L2868:
+.L2903:
 	mov	w1, 1
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2869
+	beq	.L2904
 	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2870
-.L2869:
+	beq	.L2905
+.L2904:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x1, [x26, 24]
@@ -17723,13 +18039,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC186
+	adrp	x0, .LC193
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC193
 	ldr	w1, [x26, 40]
 	ldr	w2, [x26, 52]
 	bl	printf
-.L2915:
+.L2950:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -17738,13 +18054,13 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2871:
+.L2906:
 	ldrh	w0, [x20, 80]
 	bl	ftl_dump_write_open_sblk
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -17754,18 +18070,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2898
+	beq	.L2933
 	bl	ftl_free_sblk
-.L2898:
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+.L2933:
+	adrp	x0, .LANCHOR102
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2865:
+.L2900:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -17774,29 +18090,29 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2867:
+.L2902:
 	cmp	w0, 2
-	bne	.L2868
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2903
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2911
-.L2870:
-	adrp	x28, .LANCHOR75
-	adrp	x22, .LANCHOR76
+	b	.L2946
+.L2905:
+	adrp	x28, .LANCHOR77
+	adrp	x22, .LANCHOR78
 	adrp	x27, .LANCHOR152
 	ldr	x1, [x26, 8]
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	ldrb	w0, [x22, #:lo12:.LANCHOR78]
 	adrp	x24, .LANCHOR153
-	ldrh	w2, [x28, #:lo12:.LANCHOR75]
+	ldrh	w2, [x28, #:lo12:.LANCHOR77]
 	mul	w2, w2, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x22, #:lo12:.LANCHOR76]
-	ldrh	w0, [x28, #:lo12:.LANCHOR75]
+	ldrb	w1, [x22, #:lo12:.LANCHOR78]
+	ldrh	w0, [x28, #:lo12:.LANCHOR77]
 	mul	w0, w0, w1
 	ldr	x1, [x26, 8]
 	lsl	w2, w0, 2
@@ -17804,34 +18120,34 @@ gc_recovery:
 	ldr	x0, [x24, #:lo12:.LANCHOR153]
 	bl	ftl_memcpy
 	str	x28, [x29, 144]
-	adrp	x0, .LANCHOR83
-	ldrh	w14, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w14, [x0, #:lo12:.LANCHOR85]
 	ldr	x0, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	beq	.L2872
-.L2912:
+	beq	.L2907
+.L2947:
 	str	w0, [x29, 184]
-	adrp	x25, .LC187
+	adrp	x25, .LC194
 	ldr	x0, [x29, 152]
 	mov	w23, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 128]
-	add	x0, x25, :lo12:.LC187
+	add	x0, x25, :lo12:.LC194
 	str	x0, [x29, 120]
-.L2874:
+.L2909:
 	sub	w0, w23, #1
 	str	w0, [x29, 188]
 	cmp	w23, w14
-	beq	.L2883
+	beq	.L2918
 	mov	x19, 0
-	b	.L2884
-.L2872:
+	b	.L2919
+.L2907:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2912
-.L2880:
+	b	.L2947
+.L2915:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -17841,10 +18157,10 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2875
+	bne	.L2910
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2913:
+.L2948:
 	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
@@ -17856,13 +18172,13 @@ gc_recovery:
 	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2878
+	bne	.L2913
 	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2879
-.L2878:
+	beq	.L2914
+.L2913:
 	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
@@ -17878,47 +18194,47 @@ gc_recovery:
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2879
+	beq	.L2914
 	mov	x0, x26
 	bl	buf_free
-	b	.L2915
-.L2875:
+	b	.L2950
+.L2910:
 	cmp	w1, 2
-	bne	.L2877
+	bne	.L2912
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2913
-.L2877:
+	b	.L2948
+.L2912:
 	add	w0, w23, w0
-	b	.L2913
-.L2879:
+	b	.L2948
+.L2914:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2882:
+.L2917:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2880
+	bcs	.L2915
 	add	x19, x19, 1
-.L2884:
+.L2919:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2881
+	ble	.L2916
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
 	sbfiz	x28, x22, 2, 32
 	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR69
+	add	x0, x0, :lo12:.LANCHOR71
 	str	x0, [x29, 136]
-	b	.L2882
-.L2881:
+	b	.L2917
+.L2916:
 	add	w23, w23, 1
-	b	.L2874
-.L2883:
+	b	.L2909
+.L2918:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -17928,29 +18244,29 @@ gc_recovery:
 	ldrh	w2, [x20, 80]
 	mov	w28, 0
 	ldr	x1, [x25, #:lo12:.LANCHOR9]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrh	w3, [x3, #:lo12:.LANCHOR77]
 	ldrb	w0, [x0, 9]
 	str	x25, [x29, 144]
 	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
 	str	x0, [x29, 112]
-.L2885:
+.L2920:
 	sub	w0, w28, #1
 	str	w0, [x29, 136]
 	cmp	w23, w28
-	beq	.L2896
+	beq	.L2931
 	mov	x26, 0
-	b	.L2897
-.L2893:
+	b	.L2932
+.L2928:
 	ldr	w0, [x29, 188]
 	ldr	x1, [x27, #:lo12:.LANCHOR152]
 	sbfiz	x0, x0, 2, 32
 	ldr	w5, [x1, x0]
 	cmn	w5, #1
-	beq	.L2886
+	beq	.L2921
 	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
@@ -17960,26 +18276,26 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	bne	.L2887
+	bne	.L2922
 	mov	w0, w5
 	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w5, [x29, 108]
-.L2887:
+.L2922:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	ldrb	w1, [x1, #:lo12:.LANCHOR71]
 	cmp	w1, 3
-	bne	.L2888
+	bne	.L2923
 	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2914:
+.L2949:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -17997,14 +18313,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2891
+	bne	.L2926
 	add	x1, x29, 200
 	mov	w0, w5
 	bl	pm_log2phys
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2892:
+.L2927:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -18013,82 +18329,82 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2886
+	bne	.L2921
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2886
+	cbz	w1, .L2921
 	strh	wzr, [x0, x19]
-.L2886:
+.L2921:
 	add	w25, w25, 1
-.L2895:
+.L2930:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2893
+	bcs	.L2928
 	add	x26, x26, 1
-.L2897:
+.L2932:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2894
+	ble	.L2929
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR101
+	adrp	x0, .LANCHOR67
+	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 120]
-	b	.L2895
-.L2888:
+	b	.L2930
+.L2923:
 	cmp	w1, 2
-	bne	.L2890
+	bne	.L2925
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2914
-.L2890:
+	b	.L2949
+.L2925:
 	add	w0, w28, w0
-	b	.L2914
-.L2891:
+	b	.L2949
+.L2926:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2892
-.L2894:
+	b	.L2927
+.L2929:
 	add	w28, w28, 1
-	b	.L2885
-.L2896:
+	b	.L2920
+.L2931:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w22, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L2871
-.L2866:
+	b	.L2906
+.L2901:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2865
-	adrp	x19, .LANCHOR100
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2900
+	adrp	x19, .LANCHOR102
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2900
+	bne	.L2935
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR102]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2900:
+.L2935:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2865
+	b	.L2900
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -18102,11 +18418,11 @@ zftl_init:
 	strb	w0, [x1, #:lo12:.LANCHOR57]
 	adrp	x1, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR83
+	adrp	x22, .LANCHOR85
 	strb	wzr, [x1, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR126
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR76
+	adrp	x21, .LANCHOR78
 	strb	w0, [x1, #:lo12:.LANCHOR126]
 	adrp	x1, .LANCHOR127
 	stp	x23, x24, [sp, 48]
@@ -18122,58 +18438,58 @@ zftl_init:
 	strb	wzr, [x0, #:lo12:.LANCHOR121]
 	adrp	x0, .LANCHOR206
 	str	w1, [x0, #:lo12:.LANCHOR206]
-	adrp	x1, .LC189
-	adrp	x0, .LC93
-	add	x1, x1, :lo12:.LC189
-	add	x0, x0, :lo12:.LC93
+	adrp	x1, .LC196
+	adrp	x0, .LC97
+	add	x1, x1, :lo12:.LC196
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
-	adrp	x0, .LANCHOR69
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
+	adrp	x0, .LANCHOR71
 	adrp	x2, .LANCHOR123
-	adrp	x3, .LANCHOR75
-	adrp	x4, .LANCHOR101
+	adrp	x3, .LANCHOR77
+	adrp	x4, .LANCHOR67
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR69]
+	strb	w5, [x0, #:lo12:.LANCHOR71]
 	ldrb	w0, [x1, 9]
 	strb	w0, [x2, #:lo12:.LANCHOR123]
 	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR75]
+	strh	w2, [x3, #:lo12:.LANCHOR77]
 	adrp	x3, .LANCHOR18
 	ldrh	w7, [x1, 14]
 	ubfiz	w10, w0, 9, 7
 	ldrb	w6, [x3, #:lo12:.LANCHOR18]
-	adrp	x3, .LANCHOR108
+	adrp	x3, .LANCHOR104
 	sdiv	w8, w2, w5
 	strh	w7, [x23, #:lo12:.LANCHOR6]
-	strb	w6, [x3, #:lo12:.LANCHOR108]
+	strb	w6, [x3, #:lo12:.LANCHOR104]
 	ldrb	w3, [x1, 13]
 	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR101]
+	strb	w3, [x4, #:lo12:.LANCHOR67]
 	ldrh	w4, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR107
-	strh	w8, [x22, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR103
+	strh	w8, [x22, #:lo12:.LANCHOR85]
 	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR107]
+	strh	w4, [x1, #:lo12:.LANCHOR103]
 	strh	w10, [x20, #:lo12:.LANCHOR203]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR76]
-.L2917:
+	strb	w6, [x21, #:lo12:.LANCHOR78]
+.L2952:
 	cmp	w4, w3
-	bcs	.L2918
+	bcs	.L2953
 	mul	w2, w0, w2
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR66
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR102]
+	strh	w1, [x3, #:lo12:.LANCHOR66]
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2919:
+.L2954:
 	cmp	w11, w1
-	bcs	.L2920
+	bcs	.L2955
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -18189,7 +18505,7 @@ zftl_init:
 	lsl	w1, w1, w4
 	adrp	x4, .LANCHOR59
 	sub	w2, w2, #1
-	adrp	x25, .LANCHOR87
+	adrp	x25, .LANCHOR89
 	str	w1, [x4, #:lo12:.LANCHOR59]
 	adrp	x4, .LANCHOR207
 	str	w3, [x4, #:lo12:.LANCHOR207]
@@ -18197,7 +18513,7 @@ zftl_init:
 	str	w3, [x27, #:lo12:.LANCHOR208]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR104
+	adrp	x2, .LANCHOR117
 	str	w0, [x28, #:lo12:.LANCHOR120]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
@@ -18205,28 +18521,28 @@ zftl_init:
 	strh	w0, [x24, #:lo12:.LANCHOR187]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR91
+	adrp	x8, .LANCHOR93
 	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR91]
+	strh	w3, [x8, #:lo12:.LANCHOR93]
 	strh	w0, [x26, #:lo12:.LANCHOR146]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR104]
+	strh	w0, [x2, #:lo12:.LANCHOR117]
 	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR87]
+	strh	w0, [x25, #:lo12:.LANCHOR89]
 	cmp	w0, 79
-	bhi	.L2921
+	bhi	.L2956
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR87]
-.L2921:
-	adrp	x7, .LANCHOR105
+	strh	w0, [x25, #:lo12:.LANCHOR89]
+.L2956:
+	adrp	x7, .LANCHOR118
 	mov	w0, 2000
-	adrp	x3, .LANCHOR103
+	adrp	x3, .LANCHOR116
 	adrp	x6, .LANCHOR145
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	strh	w0, [x7, #:lo12:.LANCHOR118]
 	mov	w0, 50
 	adrp	x2, .LANCHOR144
-	strh	w0, [x3, #:lo12:.LANCHOR103]
+	strh	w0, [x3, #:lo12:.LANCHOR116]
 	mov	w0, 256
 	strh	w0, [x6, #:lo12:.LANCHOR145]
 	mov	w0, 48
@@ -18235,93 +18551,93 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2922
-	adrp	x5, .LANCHOR73
-	ldrb	w5, [x5, #:lo12:.LANCHOR73]
-	cbz	w5, .L2923
-.L2922:
+	beq	.L2957
+	adrp	x5, .LANCHOR75
+	ldrb	w5, [x5, #:lo12:.LANCHOR75]
+	cbz	w5, .L2958
+.L2957:
 	mov	w5, 150
-	strh	w5, [x3, #:lo12:.LANCHOR103]
+	strh	w5, [x3, #:lo12:.LANCHOR116]
 	mov	w3, 64
 	strh	w3, [x2, #:lo12:.LANCHOR144]
 	mov	w2, 12
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2923
+	cbnz	w2, .L2958
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	strh	w0, [x7, #:lo12:.LANCHOR118]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR145]
-.L2923:
+.L2958:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2925
+	tbz	x0, 12, .L2960
 	str	x4, [x29, 96]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2925:
+.L2960:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2926
+	tbz	x0, 12, .L2961
 	ldr	w1, [x4, #:lo12:.LANCHOR207]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-.L2926:
+.L2961:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2927
+	tbz	x0, 12, .L2962
 	ldr	w1, [x28, #:lo12:.LANCHOR120]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2927:
+.L2962:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2928
+	tbz	x0, 12, .L2963
 	ldr	w1, [x27, #:lo12:.LANCHOR208]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	bl	printf
-.L2928:
+.L2963:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2929
+	tbz	x0, 12, .L2964
 	ldrh	w1, [x24, #:lo12:.LANCHOR187]
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
 	bl	printf
-.L2929:
+.L2964:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2930
+	tbz	x0, 12, .L2965
 	ldrh	w1, [x20, #:lo12:.LANCHOR203]
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	bl	printf
-.L2930:
+.L2965:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2931
+	tbz	x0, 12, .L2966
 	ldrh	w1, [x26, #:lo12:.LANCHOR146]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	bl	printf
-.L2931:
+.L2966:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2932
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
+	tbz	x0, 12, .L2967
+	ldrh	w1, [x25, #:lo12:.LANCHOR89]
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L2932:
+.L2967:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2933
+	tbz	x0, 12, .L2968
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	ldrh	w1, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L2933:
+.L2968:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -18330,19 +18646,19 @@ zftl_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR4
 	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR76]
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	ldrb	w1, [x21, #:lo12:.LANCHOR78]
+	ldrh	w0, [x22, #:lo12:.LANCHOR85]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR110
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR113
-	ldrh	w1, [x22, #:lo12:.LANCHOR83]
-	str	x2, [x0, #:lo12:.LANCHOR113]
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	str	x0, [x1, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	ldrh	w1, [x22, #:lo12:.LANCHOR85]
+	str	x2, [x0, #:lo12:.LANCHOR109]
+	ldrb	w0, [x21, #:lo12:.LANCHOR78]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
 	adrp	x1, .LANCHOR9
@@ -18353,13 +18669,13 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2934
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	tbz	x0, 12, .L2969
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	printf
-.L2934:
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
-	ldrb	w21, [x21, #:lo12:.LANCHOR76]
+.L2969:
+	ldrh	w0, [x22, #:lo12:.LANCHOR85]
+	ldrb	w21, [x21, #:lo12:.LANCHOR78]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
 	ldrh	w22, [x24, #:lo12:.LANCHOR187]
 	mul	w21, w0, w21
@@ -18370,39 +18686,40 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2935
+	tbz	x0, 12, .L2970
 	ldrh	w3, [x20, #:lo12:.LANCHOR203]
-	adrp	x0, .LC200
+	adrp	x0, .LC207
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2935:
+.L2970:
 	ldrh	w0, [x20, #:lo12:.LANCHOR203]
 	cmp	w21, w0
-	bhi	.L2936
+	bhi	.L2971
 	cmp	w22, w0
-	bls	.L2937
-.L2936:
-.L2980:
-	b	.L2980
-.L2918:
+	bls	.L2972
+.L2971:
+.L3015:
+	b	.L3015
+.L2953:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2917
-.L2920:
+	b	.L2952
+.L2955:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2919
-.L2937:
+	b	.L2954
+.L2972:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2916
+	beq	.L2951
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR102
+	bl	gc_init
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
@@ -18414,7 +18731,7 @@ zftl_init:
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
@@ -18433,18 +18750,18 @@ zftl_init:
 	bl	ftl_total_vpn_update
 	adrp	x0, .LANCHOR182
 	ldrb	w0, [x0, #:lo12:.LANCHOR182]
-	cbz	w0, .L2939
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	cbz	w0, .L2974
+	ldr	x1, [x19, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2939:
+.L2974:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2916:
+.L2951:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18462,14 +18779,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2984
+	cbnz	w0, .L3019
 	bl	zftl_init
-.L2984:
+.L3019:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18483,12 +18800,12 @@ rk_ftl_init:
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
 	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR75]
+	ldrh	w26, [x1, #:lo12:.LANCHOR77]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR14
@@ -18498,12 +18815,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2987
+	tbz	x1, 8, .L3022
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	bl	printf
-.L2987:
+.L3022:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -18514,12 +18831,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR123
 	add	x0, x0, :lo12:.LANCHOR123
 	str	x0, [x29, 104]
-.L2988:
+.L3023:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2998
+	bhi	.L3033
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2999
+	tbz	x0, 8, .L3034
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -18527,22 +18844,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L2999:
+.L3034:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L3000
+	beq	.L3035
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 569
+	mov	w2, 617
 	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3000:
+.L3035:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -18555,13 +18872,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2998:
+.L3033:
 	adrp	x27, .LANCHOR152
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2989
+	beq	.L3024
 	adrp	x0, .LANCHOR123
 	ldrb	w20, [x0, #:lo12:.LANCHOR123]
 	lsl	w20, w20, 7
@@ -18569,42 +18886,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2990
+	tbz	x0, 8, .L3025
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC203
+	adrp	x0, .LC210
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC203
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2990:
+.L3025:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	adrp	x0, .LC211
+	add	x0, x0, :lo12:.LC211
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR66
+	add	x0, x0, :lo12:.LANCHOR66
 	str	x0, [x29, 112]
-.L2991:
+.L3026:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2997
-.L2989:
+	bne	.L3032
+.L3024:
 	add	x22, x22, 1
-	b	.L2988
-.L2997:
+	b	.L3023
+.L3032:
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2992
+	beq	.L3027
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2992
+	bne	.L3027
 	adrp	x0, .LANCHOR153
 	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	ldr	w28, [x0, x19]
@@ -18612,15 +18929,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2993
+	bne	.L3028
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2993:
+.L3028:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2994
+	bne	.L3029
 	adrp	x0, .LANCHOR154
 	mov	w2, 1
 	add	x1, x29, 168
@@ -18639,35 +18956,35 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	udiv	w0, w28, w0
-.L3020:
+.L3055:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2992:
+.L3027:
 	add	x19, x19, 4
-	b	.L2991
-.L2994:
+	b	.L3026
+.L3029:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2996
+	tbz	x0, 8, .L3031
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2996:
+.L3031:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L3020
+	b	.L3055
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
 	.global	gc_scan_src_blk_one_page
 	.type	gc_scan_src_blk_one_page, %function
 gc_scan_src_blk_one_page:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -96]!
 	mov	w3, 0
 	mov	w4, 0
 	mov	w5, 65535
@@ -18677,135 +18994,136 @@ gc_scan_src_blk_one_page:
 	add	x1, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR78
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	ldrb	w6, [x20, #:lo12:.LANCHOR76]
+	ldrb	w6, [x20, #:lo12:.LANCHOR78]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w21, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L3022:
+.L3057:
 	cmp	w21, w5
-	beq	.L3024
-	cbz	w4, .L3025
+	beq	.L3059
+	cbz	w4, .L3060
 	add	x1, x19, :lo12:.LANCHOR63
 	strh	w2, [x1, 2]
-.L3025:
-	cbz	w3, .L3026
+.L3060:
+	cbz	w3, .L3061
 	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L3026:
+.L3061:
 	mov	w0, 1
-	adrp	x22, .LANCHOR107
+	adrp	x22, .LANCHOR103
 	bl	buf_alloc
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR71
 	mov	x24, x0
-	add	x22, x22, :lo12:.LANCHOR107
-	add	x23, x23, :lo12:.LANCHOR69
+	add	x22, x22, :lo12:.LANCHOR103
+	add	x23, x23, :lo12:.LANCHOR71
 	mov	w26, 1
-.L3027:
+.L3062:
 	add	x25, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x25, 6]
 	cmp	w26, w1
-	ble	.L3035
+	ble	.L3070
 	mov	x0, x24
 	bl	buf_free
 	ldrb	w0, [x25, 4]
-	ldrb	w1, [x20, #:lo12:.LANCHOR76]
+	ldrb	w1, [x20, #:lo12:.LANCHOR78]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 4]
 	cmp	w1, w0
-	bne	.L3021
+	bne	.L3056
 	ldrh	w0, [x25, 2]
 	strb	wzr, [x25, 4]
 	add	w0, w0, 1
 	strh	w0, [x25, 2]
-.L3021:
+.L3056:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 96
 	ret
-.L3024:
+.L3059:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L3023
+	bne	.L3058
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L3023:
+.L3058:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w21, [x3, 40]
 	mov	w3, 1
-	b	.L3022
-.L3035:
+	b	.L3057
+.L3070:
 	ldrh	w0, [x22]
 	cmp	w1, 3
 	mul	w2, w0, w21
 	ldrh	w0, [x25, 2]
-	bne	.L3028
+	bne	.L3063
 	add	w0, w0, w2
 	orr	w0, w0, w26, lsl 24
-.L3044:
+.L3079:
 	str	w0, [x24, 40]
 	mov	w1, 1
 	mov	x0, x24
-	ldr	w25, [x24, 40]
 	bl	sblk_read_page
 	ldr	w0, [x24, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L3032
+	beq	.L3067
 	ldr	x0, [x24, 24]
-	ldr	w27, [x0, 4]
-	mov	w0, w27
+	ldr	w25, [x0, 4]
+	mov	w0, w25
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 108]
+	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3033
+	bne	.L3068
+	adrp	x0, .LANCHOR120
+	ldr	w0, [x0, #:lo12:.LANCHOR120]
+	cmp	w25, w0
+	bcs	.L3068
 	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w27
+	add	x1, x29, 92
+	mov	w0, w25
 	bl	pm_log2phys
-.L3033:
-	ldr	w1, [x24, 40]
-	ldr	w0, [x29, 108]
-	cmp	w1, w0
-	bne	.L3032
+.L3068:
+	ldr	w2, [x24, 40]
+	ldr	w0, [x29, 92]
+	cmp	w2, w0
+	bne	.L3067
 	add	x1, x19, :lo12:.LANCHOR63
-	adrp	x3, .LANCHOR66
-	ldr	x3, [x3, #:lo12:.LANCHOR66]
+	adrp	x4, .LANCHOR68
+	ldr	x4, [x4, #:lo12:.LANCHOR68]
 	ldrh	w0, [x1, 24]
-	ubfiz	x2, x0, 2, 16
+	ubfiz	x3, x0, 2, 16
 	add	w0, w0, 1
-	str	w25, [x3, x2]
+	str	w2, [x4, x3]
 	strh	w0, [x1, 24]
-.L3032:
+.L3067:
 	add	x1, x19, :lo12:.LANCHOR63
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L3027
-.L3028:
+	b	.L3062
+.L3063:
 	cmp	w1, 2
-	bne	.L3030
+	bne	.L3065
 	lsl	w0, w0, 1
 	sub	w1, w0, #1
 	add	w0, w26, w2
 	add	w0, w1, w0
 	ldrb	w1, [x23]
 	orr	w0, w0, w1, lsl 24
-	b	.L3044
-.L3030:
+	b	.L3079
+.L3065:
 	add	w0, w0, w2
-	b	.L3044
+	b	.L3079
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -18822,42 +19140,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L3046
+	bne	.L3081
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1004
+	mov	w2, 1052
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3046:
+.L3081:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L3066
+	beq	.L3101
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3048
+	tbz	x0, 8, .L3083
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3048:
+.L3083:
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	add	x14, x19, :lo12:.LANCHOR63
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L3049
+	cbnz	w1, .L3084
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L3066:
+.L3101:
 	mov	w0, 0
-	b	.L3045
-.L3049:
+	b	.L3080
+.L3084:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR63]
 	mov	x22, x4
@@ -18867,67 +19185,67 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L3050
+	beq	.L3085
 	cmp	w1, 224
-	beq	.L3050
-	cbz	w1, .L3051
+	beq	.L3085
+	cbz	w1, .L3086
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L3050
+	beq	.L3085
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L3050
+	beq	.L3085
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L3080
-.L3050:
+	bne	.L3115
+.L3085:
 	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L3066
-.L3051:
+	b	.L3101
+.L3086:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L3053
+	cbz	w1, .L3088
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1024
+	mov	w2, 1072
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3053:
+.L3088:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L3050
-.L3080:
+	b	.L3085
+.L3115:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L3054
+	bne	.L3089
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1032
+	mov	w2, 1080
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3054:
-	adrp	x1, .LANCHOR107
+.L3089:
+	adrp	x1, .LANCHOR103
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR83
-	adrp	x23, .LANCHOR75
-	ldrh	w20, [x1, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR85
+	adrp	x23, .LANCHOR77
+	ldrh	w20, [x1, #:lo12:.LANCHOR103]
 	mov	x24, x2
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	ldrh	w0, [x2, #:lo12:.LANCHOR83]
+	ldrh	w0, [x2, #:lo12:.LANCHOR85]
 	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -18935,14 +19253,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L3067
-	adrp	x1, .LANCHOR69
-	ldrb	w21, [x1, #:lo12:.LANCHOR69]
+	bne	.L3102
+	adrp	x1, .LANCHOR71
+	ldrb	w21, [x1, #:lo12:.LANCHOR71]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L3056
+	beq	.L3091
 	and	w21, w21, 65535
-.L3055:
+.L3090:
 	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -18955,69 +19273,69 @@ gc_scan_src_blk:
 	str	w20, [x0, 40]
 	mov	x25, x0
 	mov	w1, 1
-	adrp	x20, .LANCHOR66
+	adrp	x20, .LANCHOR68
 	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR75]
-	adrp	x23, .LANCHOR76
+	ldrh	w2, [x23, #:lo12:.LANCHOR77]
+	adrp	x23, .LANCHOR78
 	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	ldrb	w0, [x23, #:lo12:.LANCHOR78]
 	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR66]
+	ldr	x0, [x20, #:lo12:.LANCHOR68]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3057
-.L3082:
+	bne	.L3092
+.L3117:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L3045:
+.L3080:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L3056:
-	ldrh	w0, [x23, #:lo12:.LANCHOR75]
+.L3091:
+	ldrh	w0, [x23, #:lo12:.LANCHOR77]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L3055
-.L3067:
+	b	.L3090
+.L3102:
 	mov	w21, 1
-	b	.L3055
-.L3057:
+	b	.L3090
+.L3092:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L3058
-	mov	w2, 1065
+	beq	.L3093
+	mov	w2, 1113
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3082
-.L3058:
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
-	adrp	x22, .LANCHOR102
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	adrp	x23, .LANCHOR101
+	b	.L3117
+.L3093:
+	ldrb	w0, [x23, #:lo12:.LANCHOR78]
+	adrp	x22, .LANCHOR66
+	ldrh	w1, [x24, #:lo12:.LANCHOR85]
+	adrp	x23, .LANCHOR67
 	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR102
-	add	x23, x23, :lo12:.LANCHOR101
+	add	x22, x22, :lo12:.LANCHOR66
+	add	x23, x23, :lo12:.LANCHOR67
 	mov	x26, 0
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L3059:
+.L3094:
 	cmp	w21, w26
-	bgt	.L3064
+	bgt	.L3099
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -19029,11 +19347,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L3065
-	adrp	x0, .LC207
-	add	x0, x0, :lo12:.LC207
+	beq	.L3100
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3065:
+.L3100:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -19041,20 +19359,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L3045
-.L3064:
+	b	.L3080
+.L3099:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L3061
+	beq	.L3096
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L3062
+	bne	.L3097
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L3062:
+.L3097:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -19069,16 +19387,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L3061
+	bne	.L3096
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR66]
+	ldr	x4, [x20, #:lo12:.LANCHOR68]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L3061:
+.L3096:
 	add	x26, x26, 1
-	b	.L3059
+	b	.L3094
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -19094,13 +19412,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L3084
+	beq	.L3119
 	adrp	x21, .LANCHOR211
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR211
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L3092:
+.L3127:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -19108,7 +19426,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L3085
+	beq	.L3120
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -19118,37 +19436,37 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L3086
-	adrp	x0, .LANCHOR102
+	bne	.L3121
+	adrp	x0, .LANCHOR66
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR101
-	ldrb	w3, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR67
+	ldrb	w3, [x2, #:lo12:.LANCHOR67]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L3086:
+.L3121:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L3087
-	mov	w2, 1504
+	beq	.L3122
+	mov	w2, 1552
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L3087:
+.L3122:
 	mov	x0, x23
 	bl	buf_free
-.L3085:
+.L3120:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR120
 	ldr	w2, [x2, #:lo12:.LANCHOR120]
@@ -19156,7 +19474,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L3088
+	bcc	.L3123
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -19167,42 +19485,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3083:
+.L3118:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L3088:
+.L3123:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L3083
+	bne	.L3118
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L3092
-	b	.L3083
-.L3084:
+	bne	.L3127
+	b	.L3118
+.L3119:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR100
+	adrp	x3, .LANCHOR102
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L3094
-	ldr	x4, [x3, #:lo12:.LANCHOR100]
+	bhi	.L3129
+	ldr	x4, [x3, #:lo12:.LANCHOR102]
 	mov	w5, 5000
 	ldr	w1, [x0, 540]
 	add	w1, w1, w5
 	ldr	w4, [x4, 44]
 	cmp	w4, w1
-	bls	.L3083
-.L3094:
-	ldr	x1, [x3, #:lo12:.LANCHOR100]
+	bls	.L3118
+.L3129:
+	ldr	x1, [x3, #:lo12:.LANCHOR102]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L3083
+	b	.L3118
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -19228,49 +19546,49 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC208
+	adrp	x0, .LC215
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC215
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L3121
+	beq	.L3156
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L3121
+	bls	.L3156
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L3122
-	adrp	x0, .LANCHOR69
-	ldrb	w25, [x0, #:lo12:.LANCHOR69]
-.L3102:
+	bne	.L3157
+	adrp	x0, .LANCHOR71
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
+.L3137:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR83
+	adrp	x19, .LANCHOR85
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, #:lo12:.LANCHOR85]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC209
+	adrp	x0, .LC216
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC216
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -19282,39 +19600,39 @@ ftl_sblk_dump:
 	str	x19, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 164]
-	adrp	x0, .LANCHOR107
-	add	x0, x0, :lo12:.LANCHOR107
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 112]
-.L3103:
+.L3138:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w0, w20
-	bls	.L3118
+	bls	.L3153
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	str	x0, [x29, 120]
-	b	.L3119
-.L3122:
+	b	.L3154
+.L3157:
 	mov	w25, 1
-	b	.L3102
-.L3115:
+	b	.L3137
+.L3150:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L3104
+	beq	.L3139
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L3105
+	bne	.L3140
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L3106:
+.L3141:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -19356,22 +19674,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L3104
+	beq	.L3139
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3109
+	bne	.L3144
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L3109:
+.L3144:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L3110
+	bne	.L3145
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -19379,81 +19697,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3110:
+.L3145:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L3112
+	cbz	x0, .L3147
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L3113
+	beq	.L3148
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3113
-	adrp	x0, .LC211
+	tbz	x0, 12, .L3148
+	adrp	x0, .LC218
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3113:
+.L3148:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L3112
+	beq	.L3147
 	cmn	w0, #1
-	beq	.L3112
+	beq	.L3147
 	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
-	mov	w2, 1299
+	mov	w2, 1312
 	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3112:
+.L3147:
 	add	w27, w27, 1
-.L3104:
+.L3139:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L3117:
+.L3152:
 	cmp	w25, w22
-	bcs	.L3115
+	bcs	.L3150
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L3119:
+.L3154:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L3116
+	bls	.L3151
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L3117
-.L3105:
+	b	.L3152
+.L3140:
 	cmp	w25, 2
-	bne	.L3107
+	bne	.L3142
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR71
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	orr	w19, w19, w0, lsl 24
-	b	.L3106
-.L3107:
+	b	.L3141
+.L3142:
 	add	w19, w20, w19
-	b	.L3106
-.L3116:
+	b	.L3141
+.L3151:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L3103
-.L3118:
+	b	.L3138
+.L3153:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -19462,11 +19780,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
 	ldr	w0, [x29, 164]
-.L3100:
+.L3135:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -19475,9 +19793,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L3121:
+.L3156:
 	mov	w0, 0
-	b	.L3100
+	b	.L3135
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -19488,57 +19806,57 @@ zftl_read:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	mov	w20, w0
+	mov	w19, w0
 	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	mov	w19, w1
+	mov	w20, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w26, w2
+	mov	w25, w2
 	stp	x23, x24, [sp, 64]
 	mov	x22, x3
 	stp	x27, x28, [sp, 96]
-	tbz	x0, 12, .L3133
+	tbz	x0, 12, .L3168
 	mov	w3, w2
-	adrp	x0, .LC213
+	adrp	x0, .LC220
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC213
-	mov	w1, w20
+	add	x0, x0, :lo12:.LC220
+	mov	w1, w19
 	bl	printf
-.L3133:
-	cbnz	w20, .L3134
+.L3168:
+	cbnz	w19, .L3169
 	adrp	x0, .LANCHOR59
-	mov	w20, 24576
+	mov	w19, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3135:
-	add	w1, w19, w26
+.L3170:
+	add	w1, w20, w25
 	cmp	w0, w1
-	bcc	.L3163
-	adrp	x1, .LANCHOR100
-	add	w20, w20, w19
-	add	w3, w26, w20
-	stp	w3, wzr, [x29, 160]
-	ldr	x2, [x1, #:lo12:.LANCHOR100]
-	sub	w3, w3, #1
+	bcc	.L3199
+	adrp	x1, .LANCHOR102
+	adrp	x26, .LANCHOR123
+	add	w19, w19, w20
 	str	x1, [x29, 120]
+	ldr	x2, [x1, #:lo12:.LANCHOR102]
+	str	x26, [x29, 168]
 	ldr	w0, [x2, 24]
-	add	w0, w0, w26
+	add	w0, w0, w25
 	str	w0, [x2, 24]
-	adrp	x0, .LANCHOR123
-	str	x0, [x29, 168]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	add	w2, w25, w19
+	stp	w2, wzr, [x29, 160]
+	sub	w2, w2, #1
+	udiv	w27, w19, w0
+	udiv	w0, w2, w0
+	mov	w20, w27
+	sub	w24, w0, w27
+	str	w0, [x29, 156]
+	add	w24, w24, 1
 	adrp	x0, .LANCHOR127
 	add	x28, x0, :lo12:.LANCHOR127
-	udiv	w27, w20, w2
-	udiv	w2, w3, w2
-	mov	w21, w27
-	sub	w25, w2, w27
-	str	w2, [x29, 156]
-	add	w25, w25, 1
-.L3137:
-	cbnz	w25, .L3161
+.L3172:
+	cbnz	w24, .L3197
 	ldr	w0, [x29, 164]
-.L3132:
+.L3167:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19547,68 +19865,68 @@ zftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L3134:
-	cmp	w20, 3
-	bhi	.L3163
-	lsl	w20, w20, 13
+.L3169:
+	cmp	w19, 3
+	bhi	.L3199
+	lsl	w19, w19, 13
 	mov	w0, 8192
-	b	.L3135
-.L3161:
+	b	.L3170
+.L3197:
 	ldr	x0, [x29, 168]
-	cmp	w21, w27
+	cmp	w20, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldr	w0, [x29, 156]
-	and	w19, w1, 65535
-	ccmp	w21, w0, 4, ne
-	bne	.L3164
-	cmp	w21, w27
-	bne	.L3139
-	udiv	w24, w20, w1
-	and	w0, w26, 65535
-	msub	w1, w24, w1, w20
-	and	w24, w1, 65535
-	sub	w19, w19, w24
-	and	w19, w19, 65535
-	cmp	w26, w19
-	csel	w19, w0, w19, cc
-.L3138:
-	adrp	x23, .LANCHOR50
-	add	x1, x23, :lo12:.LANCHOR50
+	and	w23, w1, 65535
+	ccmp	w20, w0, 4, ne
+	bne	.L3200
+	cmp	w20, w27
+	bne	.L3174
+	udiv	w3, w19, w1
+	and	w0, w25, 65535
+	msub	w1, w3, w1, w19
+	and	w26, w1, 65535
+	sub	w23, w23, w26
+	and	w23, w23, 65535
+	cmp	w25, w23
+	csel	w23, w0, w23, cc
+.L3173:
+	adrp	x21, .LANCHOR50
+	add	x1, x21, :lo12:.LANCHOR50
 	add	x1, x1, 2
 	mov	w0, 0
-.L3142:
+.L3177:
 	ldr	w2, [x1, 34]
-	cmp	w21, w2
-	bne	.L3140
+	cmp	w20, w2
+	bne	.L3175
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3140
-	add	x1, x23, :lo12:.LANCHOR50
+	tbz	x2, 3, .L3175
+	add	x1, x21, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
-	lsl	w2, w19, 9
-	ubfiz	x19, x19, 9, 16
-	ubfiz	x24, x24, 9, 16
+	lsl	w2, w23, 9
+	ubfiz	x23, x23, 9, 16
+	ubfiz	x26, x26, 9, 16
 	ldr	x1, [x0, 8]
 	mov	x0, x22
-	add	x22, x22, x19
-	add	x1, x1, x24
+	add	x22, x22, x23
+	add	x1, x1, x26
 	bl	ftl_memcpy
-.L3141:
-	add	w21, w21, 1
-	sub	w25, w25, #1
-.L3148:
+.L3176:
+	add	w20, w20, 1
+	sub	w24, w24, #1
+.L3183:
 	adrp	x0, .LANCHOR52
 	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 2
-	bls	.L3149
-	cbnz	w25, .L3137
-.L3149:
+	bls	.L3184
+	cbnz	w24, .L3172
+.L3184:
 	adrp	x0, .LANCHOR127
 	ldrb	w1, [x0, #:lo12:.LANCHOR127]
-	cbz	w1, .L3137
-	adrp	x24, .LANCHOR126
-	add	x0, x23, :lo12:.LANCHOR50
-	ldrb	w2, [x24, #:lo12:.LANCHOR126]
+	cbz	w1, .L3172
+	adrp	x23, .LANCHOR126
+	add	x0, x21, :lo12:.LANCHOR50
+	ldrb	w2, [x23, #:lo12:.LANCHOR126]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
 	adrp	x0, .LANCHOR213
@@ -19617,176 +19935,180 @@ zftl_read:
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3151:
+.L3186:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3160
+	cbnz	w0, .L3196
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x24, #:lo12:.LANCHOR126]
-	b	.L3137
-.L3139:
+	strb	w0, [x23, #:lo12:.LANCHOR126]
+	b	.L3172
+.L3174:
 	ldr	w0, [x29, 160]
-	msub	w19, w1, w21, w0
-	and	w19, w19, 255
-.L3164:
-	mov	w24, 0
-	b	.L3138
-.L3140:
+	msub	w23, w1, w20, w0
+	and	w23, w23, 255
+.L3200:
+	mov	w26, 0
+	b	.L3173
+.L3175:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3142
-	mov	w0, w21
+	bne	.L3177
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3143
+	bne	.L3178
 	mov	w2, 0
 	add	x1, x29, 188
-	mov	w0, w21
+	mov	w0, w20
 	bl	pm_log2phys
-.L3143:
+.L3178:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L3144
+	bne	.L3179
 	ldr	x0, [x29, 168]
-	mov	w19, 0
-	add	x24, x0, :lo12:.LANCHOR123
-.L3145:
-	ldrb	w0, [x24]
+	mov	w23, 0
+	add	x26, x0, :lo12:.LANCHOR123
+.L3180:
+	ldrb	w0, [x26]
+	cmp	w23, w0
+	bcs	.L3176
+	madd	w0, w20, w0, w23
 	cmp	w19, w0
-	bcs	.L3141
-	madd	w0, w21, w0, w19
-	cmp	w20, w0
-	bhi	.L3146
+	bhi	.L3181
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3146
+	bls	.L3181
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3146:
-	add	w19, w19, 1
-	b	.L3145
-.L3144:
+.L3181:
+	add	w23, w23, 1
+	b	.L3180
+.L3179:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3148
+	cbz	x0, .L3183
 	ldr	x2, [x29, 120]
-	ldr	x3, [x2, #:lo12:.LANCHOR100]
-	ldr	w2, [x3, 40]
+	ldr	x4, [x2, #:lo12:.LANCHOR102]
+	ldr	w2, [x4, 40]
 	add	w2, w2, 1
-	str	w2, [x3, 40]
+	str	w2, [x4, 40]
 	ldr	w2, [x29, 188]
-	strb	w19, [x0, 56]
-	ubfiz	x19, x19, 9, 16
+	strb	w23, [x0, 56]
+	ubfiz	x23, x23, 9, 16
 	str	x22, [x0, 16]
-	add	x22, x22, x19
-	strb	w24, [x0, 57]
-	stp	w21, w2, [x0, 36]
+	add	x22, x22, x23
+	strb	w26, [x0, 57]
+	stp	w20, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L3141
-.L3160:
-	ldrb	w0, [x24, #:lo12:.LANCHOR126]
+	b	.L3176
+.L3196:
+	ldrb	w0, [x23, #:lo12:.LANCHOR126]
 	cmp	w0, 255
-	bne	.L3152
+	bne	.L3187
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1070
+	mov	w2, 1080
 	bl	printf
-.L3152:
-	ldrb	w19, [x24, #:lo12:.LANCHOR126]
-	add	x0, x23, :lo12:.LANCHOR50
-	ubfiz	x1, x19, 6, 8
-	lsl	x2, x19, 6
-	add	x1, x0, x1
-	str	x1, [x29, 144]
-	add	x1, x0, x2
-	ldrb	w0, [x0, x2]
-	strb	w0, [x24, #:lo12:.LANCHOR126]
-	ldr	w8, [x1, 52]
-	cmn	w8, #1
-	bne	.L3153
+.L3187:
+	ldrb	w26, [x23, #:lo12:.LANCHOR126]
+	add	x1, x21, :lo12:.LANCHOR50
+	ubfiz	x2, x26, 6, 8
+	lsl	x0, x26, 6
+	add	x2, x1, x2
+	str	x2, [x29, 144]
+	add	x2, x1, x0
+	ldrb	w0, [x1, x0]
+	strb	w0, [x23, #:lo12:.LANCHOR126]
+	ldr	w10, [x2, 52]
+	cmn	w10, #1
+	bne	.L3188
 	adrp	x0, .LANCHOR10
-	str	w8, [x29, 164]
+	str	w10, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3154:
-	add	x10, x23, :lo12:.LANCHOR50
-	add	x10, x10, x19, lsl 6
-	ldr	x0, [x10, 24]
-	ldr	w3, [x10, 36]
+.L3189:
+	add	x1, x21, :lo12:.LANCHOR50
+	add	x1, x1, x26, lsl 6
+	ldr	x0, [x1, 24]
+	ldr	w3, [x1, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w3
-	beq	.L3155
+	bne	.L3190
+	cmn	w10, #1
+	bne	.L3191
+.L3190:
 	adrp	x1, .LANCHOR10
-	str	w8, [x29, 152]
-	str	x10, [x29, 112]
+	add	x11, x21, :lo12:.LANCHOR50
+	add	x11, x11, x26, lsl 6
+	str	w10, [x29, 152]
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	str	x11, [x29, 112]
 	ldr	w1, [x2, 552]
 	add	w1, w1, 1
 	str	w1, [x2, 552]
-	ldrb	w1, [x10, 1]
+	ldrb	w1, [x11, 1]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	mov	w2, w8
+	mov	w2, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC215
-	ldr	w4, [x10, 40]
-	add	x0, x0, :lo12:.LC215
+	adrp	x0, .LC222
+	ldr	w4, [x11, 40]
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-	ldr	x10, [x29, 112]
-	adrp	x0, .LANCHOR102
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldr	x11, [x29, 112]
+	adrp	x0, .LANCHOR66
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
-	ldr	w1, [x10, 40]
+	ldr	w1, [x11, 40]
 	sub	w2, w0, w3
 	mov	w0, 1
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w2, [x1, #:lo12:.LANCHOR67]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w8, [x29, 152]
-.L3155:
-	add	x0, x23, :lo12:.LANCHOR50
-	add	x0, x0, x19, lsl 6
+	ldr	w10, [x29, 152]
+.L3191:
+	add	x0, x21, :lo12:.LANCHOR50
+	add	x0, x0, x26, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3156
-	cmn	w8, #1
-	bne	.L3157
-.L3156:
+	bne	.L3192
+	cmn	w10, #1
+	bne	.L3193
+.L3192:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1091
+	mov	w2, 1101
 	bl	printf
-.L3157:
-	add	x0, x23, :lo12:.LANCHOR50
-	add	x19, x0, x19, lsl 6
-	ldr	x0, [x29, 168]
-	ldrb	w2, [x19, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
-	cmp	w0, w2
-	bls	.L3158
-	ldrb	w0, [x19, 57]
+.L3193:
+	add	x0, x21, :lo12:.LANCHOR50
+	ldr	x1, [x29, 168]
+	add	x0, x0, x26, lsl 6
+	ldrb	w1, [x1, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, 56]
+	cmp	w1, w2
+	bls	.L3194
+	ldrb	w1, [x0, 57]
 	lsl	w2, w2, 9
-	ldr	x1, [x19, 8]
-	ubfiz	x0, x0, 9, 8
-	add	x1, x1, x0
-	ldr	x0, [x19, 16]
+	ldp	x3, x0, [x0, 8]
+	ubfiz	x1, x1, 9, 8
+	add	x1, x3, x1
 	bl	ftl_memcpy
-.L3159:
+.L3195:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
@@ -19796,26 +20118,27 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3151
-.L3153:
-	cmp	w8, 256
-	bne	.L3154
-	adrp	x0, .LANCHOR102
+	b	.L3186
+.L3188:
+	cmp	w10, 256
+	bne	.L3189
+	adrp	x0, .LANCHOR66
+	ldr	w3, [x2, 40]
 	mov	w4, 21
-	ldp	w2, w3, [x1, 36]
 	mov	w5, 1
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
-	stp	w8, w5, [x29, 108]
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
+	ldr	w2, [x2, 36]
 	sub	w4, w4, w0
+	stp	w10, w5, [x29, 108]
 	lsr	w0, w3, w0
 	lsl	w4, w5, w4
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	udiv	w4, w4, w0
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC221
+	add	x0, x0, :lo12:.LC221
 	and	w1, w4, 65535
 	str	w4, [x29, 152]
 	bl	printf
@@ -19825,16 +20148,16 @@ zftl_read:
 	mov	w1, w5
 	mov	w0, w4
 	bl	gc_add_sblk
-	ldr	w8, [x29, 108]
-	b	.L3154
-.L3158:
-	ldrb	w0, [x19, 2]
-	and	w0, w0, -9
-	strb	w0, [x19, 2]
-	b	.L3159
-.L3163:
+	ldr	w10, [x29, 108]
+	b	.L3189
+.L3194:
+	ldrb	w1, [x0, 2]
+	and	w1, w1, -9
+	strb	w1, [x0, 2]
+	b	.L3195
+.L3199:
 	mov	w0, -1
-	b	.L3132
+	b	.L3167
 	.size	zftl_read, .-zftl_read
 	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
@@ -19917,46 +20240,46 @@ gc_check_data_one_wl:
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3186
+	cbnz	x0, .L3222
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3186:
+.L3222:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3187
+	cbnz	x22, .L3223
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
-	mov	w2, 447
+	mov	w2, 495
 	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3187:
-	adrp	x2, .LANCHOR107
+.L3223:
+	adrp	x2, .LANCHOR103
 	add	x28, x21, 96
 	add	x27, x21, 80
-	add	x2, x2, :lo12:.LANCHOR107
+	add	x2, x2, :lo12:.LANCHOR103
 	mov	w26, 0
-.L3188:
+.L3224:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3197
-	adrp	x25, .LANCHOR69
+	bge	.L3233
+	adrp	x25, .LANCHOR71
 	mov	w24, 1
 	add	x23, x19, :lo12:.LANCHOR63
-	add	x25, x25, :lo12:.LANCHOR69
-	b	.L3198
-.L3196:
+	add	x25, x25, :lo12:.LANCHOR71
+	b	.L3234
+.L3232:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3189
+	bne	.L3225
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3210:
+.L3246:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
@@ -19966,7 +20289,7 @@ gc_check_data_one_wl:
 	adrp	x1, .LANCHOR152
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3192
+	beq	.L3228
 	ldrh	w0, [x23, 22]
 	ldr	x4, [x1, #:lo12:.LANCHOR152]
 	ldr	x3, [x22, 24]
@@ -19974,42 +20297,42 @@ gc_check_data_one_wl:
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3192
+	bne	.L3228
 	adrp	x4, .LANCHOR153
 	ldr	x4, [x4, #:lo12:.LANCHOR153]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3193
-.L3192:
+	beq	.L3229
+.L3228:
 	add	x4, x1, :lo12:.LANCHOR152
 	ldrh	w0, [x23, 22]
 	ldr	x1, [x1, #:lo12:.LANCHOR152]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3193
-	adrp	x19, .LANCHOR75
+	beq	.L3229
+	adrp	x19, .LANCHOR77
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	ldrh	w0, [x19, #:lo12:.LANCHOR77]
 	mul	w3, w3, w0
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC223
+	add	x0, x0, :lo12:.LC223
 	bl	rknand_print_hex
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	ldrh	w0, [x19, #:lo12:.LANCHOR77]
 	adrp	x19, .LANCHOR153
 	ldrb	w3, [x27, 9]
 	mov	w2, 4
 	ldr	x1, [x19, #:lo12:.LANCHOR153]
 	mul	w3, w3, w0
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC224
+	add	x0, x0, :lo12:.LC224
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3194
+	tbz	x0, 10, .L3230
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
@@ -20020,13 +20343,13 @@ gc_check_data_one_wl:
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC218
+	adrp	x0, .LC225
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC225
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3194:
+.L3230:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -20036,7 +20359,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3185:
+.L3221:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -20045,43 +20368,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3189:
+.L3225:
 	cmp	w3, 2
-	bne	.L3191
+	bne	.L3227
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3210
-.L3191:
+	b	.L3246
+.L3227:
 	add	w0, w0, w1
-	b	.L3210
-.L3193:
+	b	.L3246
+.L3229:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3198:
+.L3234:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3196
+	ble	.L3232
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3188
-.L3197:
+	b	.L3224
+.L3233:
 	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	cbz	w1, .L3199
+	adrp	x1, .LANCHOR72
+	ldrb	w1, [x1, #:lo12:.LANCHOR72]
+	cbz	w1, .L3235
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3199:
-.L3195:
+.L3235:
+.L3231:
 	mov	w0, 0
-	b	.L3185
+	b	.L3221
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -20093,50 +20416,50 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR85
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR83]
+	ldrh	w23, [x0, #:lo12:.LANCHOR85]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR109
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR113]
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3212
+	beq	.L3248
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 1627
+	mov	w2, 1640
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3212:
+.L3248:
 	adrp	x27, .LANCHOR123
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR123
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3213:
+.L3249:
 	cmp	w24, w23
-	blt	.L3219
+	blt	.L3255
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3220
+	tbz	x0, 12, .L3256
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC222
+	adrp	x0, .LC229
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC229
 	bl	printf
-.L3220:
+.L3256:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -20147,38 +20470,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3219:
+.L3255:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3214
+	beq	.L3250
 	ldrb	w20, [x27, #:lo12:.LANCHOR123]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3215
-	adrp	x0, .LC219
+	tbz	x0, 12, .L3251
+	adrp	x0, .LC226
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC226
 	bl	printf
-.L3215:
-	adrp	x25, .LANCHOR107
-	adrp	x26, .LC220
+.L3251:
+	adrp	x25, .LANCHOR103
+	adrp	x26, .LC227
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR107
-	add	x26, x26, :lo12:.LC220
-.L3218:
+	add	x25, x25, :lo12:.LANCHOR103
+	add	x26, x26, :lo12:.LC227
+.L3254:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3216
+	beq	.L3252
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3216
+	bne	.L3252
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -20190,15 +20513,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3217
+	cbz	w0, .L3253
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR113]
-	adrp	x0, .LC221
-	add	x0, x0, :lo12:.LC221
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
 	bl	rknand_print_hex
-.L3217:
+.L3253:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -20207,46 +20530,68 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3216:
+.L3252:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3218
-.L3214:
+	bgt	.L3254
+.L3250:
 	add	x24, x24, 1
-	b	.L3213
+	b	.L3249
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_new_data_sblk
 	.type	ftl_alloc_new_data_sblk, %function
 ftl_alloc_new_data_sblk:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	mov	x19, x0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	str	x21, [sp, 32]
+	ldrh	w21, [x0]
 	bl	ftl_update_l2p_map
 	bl	pm_flush
-	ldrh	w0, [x19]
+	ldrh	w0, [x20]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3242
+	beq	.L3278
 	bl	zftl_insert_data_list
-.L3242:
-	adrp	x0, .LANCHOR10
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
+.L3278:
+	adrp	x19, .LANCHOR10
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
-	cmp	x19, x0
-	mov	x0, x19
+	cmp	x20, x0
+	mov	x0, x20
 	cset	w1, ne
 	add	w1, w1, 2
 	bl	ftl_open_sblk_init
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 560]
+	cmp	w0, w21
+	bne	.L3280
+	mov	w20, 65535
+	cmp	w21, w20
+	beq	.L3280
+	mov	w1, w21
+	adrp	x0, .LC230
+	add	x0, x0, :lo12:.LC230
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w0, [x0, 564]
+	bl	gc_mark_bad_ppa
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	mov	w1, -1
+	str	w20, [x0, 560]
+	str	w1, [x0, 564]
+.L3280:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	lpa_rebuild_hash
-	ldr	x19, [sp, 16]
+	ldr	x21, [sp, 32]
 	mov	w0, 0
-	ldp	x29, x30, [sp], 32
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
 	.section	.text.ftl_write_commit,"ax",@progbits
@@ -20263,10 +20608,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3247:
+.L3284:
 	adrp	x2, .LANCHOR58
 	ldrb	w1, [x2, #:lo12:.LANCHOR58]
-	cbz	w1, .L3249
+	cbz	w1, .L3286
 	adrp	x3, .LANCHOR57
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
@@ -20285,24 +20630,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR120]
 	cmp	w2, w1
-	bcc	.L3251
+	bcc	.L3288
 	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 501
+	mov	w2, 502
 	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3251:
+.L3288:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR120]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3252
+	bcc	.L3289
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3246:
+.L3283:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20310,7 +20655,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3252:
+.L3289:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -20318,17 +20663,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
-	cbz	w1, .L3254
+	cbz	w1, .L3291
 	adrp	x0, .LANCHOR174
 	ldrb	w1, [x0, #:lo12:.LANCHOR174]
 	add	x1, x23, x1, lsl 6
-.L3255:
+.L3292:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3256
+	bne	.L3293
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3254
+	bne	.L3291
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -20337,33 +20682,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3247
-.L3256:
+	b	.L3284
+.L3293:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3255
-.L3254:
+	b	.L3292
+.L3291:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3258
+	bne	.L3295
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3258:
+.L3295:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3261:
+.L3298:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3259
+	bne	.L3296
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3259
+	tbz	x2, 3, .L3296
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -20371,50 +20716,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3260:
+.L3297:
 	adrp	x0, .LANCHOR123
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w1
-	bcs	.L3285
+	bcs	.L3322
 	add	w20, w21, w20
-	cbz	x24, .L3263
-	cbz	w21, .L3264
+	cbz	x24, .L3300
+	cbz	w21, .L3301
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3264:
+.L3301:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3265
+	bcc	.L3302
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3285:
+.L3322:
 	mov	w24, 0
-	b	.L3262
-.L3259:
+	b	.L3299
+.L3296:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3261
+	bne	.L3298
 	mov	x24, 0
-	b	.L3260
-.L3265:
+	b	.L3297
+.L3302:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3285
-.L3263:
+	b	.L3322
+.L3300:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3266
+	beq	.L3303
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -20427,11 +20772,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3267
+	bne	.L3304
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3268
-.L3267:
+	bne	.L3305
+.L3304:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -20439,53 +20784,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC223
-	add	x0, x0, :lo12:.LC223
+	adrp	x0, .LC231
+	add	x0, x0, :lo12:.LC231
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC182
+	adrp	x0, .LC189
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC182
+	add	x0, x0, :lo12:.LC189
 	bl	rknand_print_hex
-.L3268:
+.L3305:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3269
+	bne	.L3306
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3270
-.L3269:
+	bne	.L3307
+.L3306:
 	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 572
+	mov	w2, 573
 	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3270:
-	cbz	w21, .L3271
+.L3307:
+	cbz	w21, .L3308
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3272
+	beq	.L3309
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3273:
+.L3310:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3271:
+.L3308:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3274
-	bls	.L3275
+	bcc	.L3311
+	bls	.L3312
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3275:
-	cbz	x27, .L3262
+.L3312:
+	cbz	x27, .L3299
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -20495,13 +20840,13 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3262:
+.L3299:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3277
+	cbnz	w0, .L3314
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3277:
+.L3314:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
@@ -20537,10 +20882,10 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR217]
 	ldrh	w0, [x19, 6]
-	bhi	.L3278
+	bhi	.L3315
 	cmp	w0, 1
-	bne	.L3250
-.L3278:
+	bne	.L3287
+.L3315:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
@@ -20549,9 +20894,9 @@ ftl_write_commit:
 	ldrb	w0, [x20, #:lo12:.LANCHOR174]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3282:
+.L3319:
 	cmp	w1, w4
-	bne	.L3283
+	bne	.L3320
 	strb	w3, [x20, #:lo12:.LANCHOR174]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
@@ -20562,58 +20907,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3250
+	bne	.L3287
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3250:
+.L3287:
 	adrp	x0, .LANCHOR58
 	ldrb	w0, [x0, #:lo12:.LANCHOR58]
-	cbnz	w0, .L3247
-.L3249:
+	cbnz	w0, .L3284
+.L3286:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3246
-.L3274:
+	b	.L3283
+.L3311:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3276
+	beq	.L3313
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3275
-.L3276:
+	b	.L3312
+.L3313:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3275
-.L3283:
+	b	.L3312
+.L3320:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3282
-.L3284:
+	b	.L3319
+.L3321:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3272:
+.L3309:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3273
-.L3266:
-	cbnz	w21, .L3284
+	b	.L3310
+.L3303:
+	cbnz	w21, .L3321
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3271
+	b	.L3308
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -20621,19 +20966,19 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR76
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3308
+	cbnz	w0, .L3345
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3307
+	cbz	x0, .L3344
 	adrp	x20, .LANCHOR63
 	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
@@ -20649,52 +20994,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3310
+	bne	.L3347
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 684
+	mov	w2, 732
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3310:
+.L3347:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3311
+	bne	.L3348
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3311:
+.L3348:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3312
+	bne	.L3349
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3315:
+.L3352:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3313
+	bne	.L3350
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3313
+	tbz	x2, 1, .L3350
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3307
+	tbz	x0, 8, .L3344
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LC224
+	adrp	x0, .LC232
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC224
+	add	x0, x0, :lo12:.LC232
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3307:
+.L3344:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -20703,10 +21048,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3313:
+.L3350:
 	add	x1, x1, 64
 	cmp	x1, x0
-	bne	.L3315
+	bne	.L3352
 	adrp	x0, .LANCHOR123
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -20721,64 +21066,64 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3316
+	tbz	x0, 8, .L3353
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR63
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC225
+	adrp	x0, .LC233
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC225
+	add	x0, x0, :lo12:.LC233
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3316:
+.L3353:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x1, [x0, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3307
-.L3312:
+	b	.L3344
+.L3349:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3317
+	tbz	x0, 8, .L3354
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC225
+	adrp	x0, .LC233
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC225
+	add	x0, x0, :lo12:.LC233
 	bl	printf
-.L3317:
+.L3354:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3307
-.L3308:
+	b	.L3344
+.L3345:
 	adrp	x1, .LANCHOR10
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR71
 	stp	x0, x1, [x29, 128]
 	adrp	x24, .LANCHOR63
 	ldr	x22, [x1, #:lo12:.LANCHOR10]
-	ldrb	w25, [x0, #:lo12:.LANCHOR69]
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3318
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbz	w0, .L3319
+	bne	.L3355
+	adrp	x0, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR75]
+	cbz	w0, .L3356
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -20787,25 +21132,25 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3320:
-	adrp	x1, .LANCHOR75
+.L3357:
+	adrp	x1, .LANCHOR77
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR63
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR75]
+	ldrh	w3, [x1, #:lo12:.LANCHOR77]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR153
 	ldr	x7, [x0, #:lo12:.LANCHOR153]
 	sub	w3, w3, #1
-.L3323:
+.L3360:
 	cmp	w2, w8
-	blt	.L3325
-.L3354:
+	blt	.L3362
+.L3391:
 	mov	w23, 1
-	b	.L3321
-.L3319:
+	b	.L3358
+.L3356:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -20821,12 +21166,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3320
-.L3321:
+	beq	.L3357
+.L3358:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3326
+	tbz	x1, 8, .L3363
 	adrp	x0, .LANCHOR153
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -20834,18 +21179,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR153]
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC226
+	adrp	x0, .LC234
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC226
+	add	x0, x0, :lo12:.LC234
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3326:
+.L3363:
 	adrp	x0, .LANCHOR50
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR50
 	str	x0, [x29, 120]
-.L3327:
+.L3364:
 	ldrb	w1, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -20853,23 +21198,23 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w3, w25, w1
 	cmp	w0, w3
-	blt	.L3339
+	blt	.L3376
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
 	add	x0, x29, 160
-	bne	.L3340
-	adrp	x2, .LANCHOR73
+	bne	.L3377
+	adrp	x2, .LANCHOR75
 	ldr	x3, [x29, 160]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
-	cbz	w2, .L3341
-.L3344:
+	ldrb	w2, [x2, #:lo12:.LANCHOR75]
+	cbz	w2, .L3378
+.L3381:
 	strb	wzr, [x3, 60]
-	b	.L3342
-.L3318:
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L3322
+	b	.L3379
+.L3355:
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbnz	w0, .L3359
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -20877,8 +21222,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3320
-.L3322:
+	b	.L3357
+.L3359:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -20886,41 +21231,41 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3320
-.L3325:
+	b	.L3357
+.L3362:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3354
+	beq	.L3391
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3324
+	bne	.L3361
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3307
+	bcs	.L3344
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3324:
+.L3361:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3323
-.L3339:
+	b	.L3360
+.L3376:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR74
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3328
+	bne	.L3365
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3329
+	cbnz	x0, .L3366
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -20928,17 +21273,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3307
-.L3329:
-	adrp	x0, .LANCHOR72
+	cbz	x0, .L3344
+.L3366:
+	adrp	x0, .LANCHOR74
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR75
+	adrp	x5, .LANCHOR77
 	adrp	x6, .LANCHOR153
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
 	strb	w1, [x0, x27]
 	add	x1, x24, :lo12:.LANCHOR63
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR75]
+	ldrh	w7, [x5, #:lo12:.LANCHOR77]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -20949,24 +21294,24 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3330
+	bne	.L3367
 	adrp	x0, .LANCHOR152
-	adrp	x4, .LANCHOR76
+	adrp	x4, .LANCHOR78
 	stp	x6, x5, [x29, 96]
 	ldr	x1, [x0, #:lo12:.LANCHOR152]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR76]
+	ldrb	w2, [x4, #:lo12:.LANCHOR78]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR75]
-	ldrb	w1, [x4, #:lo12:.LANCHOR76]
+	ldrh	w0, [x5, #:lo12:.LANCHOR77]
+	ldrb	w1, [x4, #:lo12:.LANCHOR78]
 	mul	w0, w0, w1
 	ldr	x1, [x6, #:lo12:.LANCHOR153]
 	lsl	w2, w0, 2
@@ -20983,9 +21328,9 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	ldrh	w1, [x5, #:lo12:.LANCHOR77]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR76]
+	ldrb	w0, [x4, #:lo12:.LANCHOR78]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
@@ -20995,11 +21340,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3328:
-	adrp	x0, .LANCHOR72
+.L3365:
+	adrp	x0, .LANCHOR74
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR72]
+	ldr	x4, [x0, #:lo12:.LANCHOR74]
 	adrp	x0, .LANCHOR50
 	add	x3, x0, :lo12:.LANCHOR50
 	ldrb	w2, [x4, x27]
@@ -21012,12 +21357,12 @@ gc_do_copy_back:
 	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x3, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L3334
+	bne	.L3371
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR107
-	ldrh	w6, [x6, #:lo12:.LANCHOR107]
+	adrp	x6, .LANCHOR103
+	ldrh	w6, [x6, #:lo12:.LANCHOR103]
 	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x1, x22, x1, sxtw 1
@@ -21032,10 +21377,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR154]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3335:
+.L3372:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3338
+	tbz	x0, 8, .L3375
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -21049,19 +21394,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC227
-	add	x0, x0, :lo12:.LC227
+	adrp	x0, .LC235
+	add	x0, x0, :lo12:.LC235
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3338:
+.L3375:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3327
-.L3330:
+	b	.L3364
+.L3367:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR153]
@@ -21074,10 +21419,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3332
-	adrp	x0, .LANCHOR102
+	bne	.L3369
+	adrp	x0, .LANCHOR66
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR102]
+	ldrh	w4, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -21085,38 +21430,38 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w2, [x1, #:lo12:.LANCHOR67]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3332
+	bne	.L3369
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3332
+	bne	.L3369
 	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 799
+	mov	w2, 847
 	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3332:
+.L3369:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR120
 	ldr	w1, [x1, #:lo12:.LANCHOR120]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3333
+	bcc	.L3370
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3333:
+.L3370:
 	adrp	x1, .LANCHOR152
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -21124,125 +21469,125 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3328
-.L3334:
+	b	.L3365
+.L3371:
 	cmp	w0, 2
-	bne	.L3336
-	adrp	x0, .LANCHOR70
-	adrp	x1, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L3337
+	bne	.L3373
+	adrp	x0, .LANCHOR72
+	adrp	x1, .LANCHOR103
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	cbnz	w0, .L3374
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3398:
+.L3435:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3336:
+.L3373:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR154]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3335
-.L3337:
+	b	.L3372
+.L3374:
 	add	w0, w19, w26, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR107]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3398
-.L3341:
+	b	.L3435
+.L3378:
 	cmp	w23, 1
-	bne	.L3343
+	bne	.L3380
 	mov	w2, 9
-.L3397:
+.L3434:
 	strb	w2, [x3, 60]
-.L3342:
+.L3379:
 	mov	w2, w1
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3345:
-	adrp	x1, .LANCHOR73
+.L3382:
+	adrp	x1, .LANCHOR75
 	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	ldrb	w1, [x1, #:lo12:.LANCHOR75]
 	and	w0, w3, 65535
-	cbz	w1, .L3350
+	cbz	w1, .L3387
 	add	w0, w0, w0, lsl 1
-.L3351:
-	adrp	x1, .LANCHOR100
+.L3388:
+	adrp	x1, .LANCHOR102
 	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR102]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
 	ldrh	w1, [x24, 314]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR77
 	and	w0, w0, 65535
 	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR77]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3352
+	blt	.L3389
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3352:
+.L3389:
 	bl	gc_write_completed
-	b	.L3307
-.L3343:
+	b	.L3344
+.L3380:
 	cmp	w23, 2
-	bne	.L3344
+	bne	.L3381
 	mov	w2, 13
-	b	.L3397
-.L3340:
-	adrp	x2, .LANCHOR70
-	ldrb	w2, [x2, #:lo12:.LANCHOR70]
-	cbz	w2, .L3355
-	adrp	x2, .LANCHOR71
-	ldrb	w2, [x2, #:lo12:.LANCHOR71]
-	cbnz	w2, .L3347
-.L3346:
+	b	.L3434
+.L3377:
+	adrp	x2, .LANCHOR72
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	cbz	w2, .L3392
+	adrp	x2, .LANCHOR73
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	cbnz	w2, .L3384
+.L3383:
 	sub	w1, w3, #1
-.L3348:
+.L3385:
 	cmp	w2, w1
-	blt	.L3349
+	blt	.L3386
 	ldr	x0, [x0, w1, sxtw 3]
 	mov	w1, -1
 	strb	w1, [x0]
 	mov	w1, w3
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3345
-.L3355:
+	b	.L3382
+.L3392:
 	mov	w2, 0
-	b	.L3346
-.L3347:
+	b	.L3383
+.L3384:
 	bl	sblk_3d_mlc_prog_pages
-	b	.L3345
-.L3349:
+	b	.L3382
+.L3386:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3348
-.L3350:
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	b	.L3385
+.L3387:
+	adrp	x1, .LANCHOR72
+	ldrb	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3351
+	b	.L3388
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -21250,61 +21595,61 @@ gc_do_copy_back:
 	.type	zftl_do_gc, %function
 zftl_do_gc:
 	sub	sp, sp, #128
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR99
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	adrp	x19, .LANCHOR150
 	stp	x21, x22, [sp, 48]
-	ldrh	w22, [x1, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR93
+	ldrh	w22, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, .LANCHOR95
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR10
-	ldrh	w21, [x1, #:lo12:.LANCHOR93]
+	ldrh	w21, [x1, #:lo12:.LANCHOR95]
 	stp	x25, x26, [sp, 80]
 	ldrb	w1, [x19, #:lo12:.LANCHOR150]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
 	ldr	x20, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3507
+	bhi	.L3544
 	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3402
-	add	x0, x0, :lo12:.L3402
+	adrp	x0, .L3439
+	add	x0, x0, :lo12:.L3439
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3402
+	adr	x1, .Lrtx3439
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3402:
+.Lrtx3439:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3402:
-	.2byte	(.L3401 - .Lrtx3402) / 4
-	.2byte	(.L3403 - .Lrtx3402) / 4
-	.2byte	(.L3404 - .Lrtx3402) / 4
-	.2byte	(.L3405 - .Lrtx3402) / 4
-	.2byte	(.L3406 - .Lrtx3402) / 4
-	.2byte	(.L3407 - .Lrtx3402) / 4
-	.2byte	(.L3408 - .Lrtx3402) / 4
+.L3439:
+	.2byte	(.L3438 - .Lrtx3439) / 4
+	.2byte	(.L3440 - .Lrtx3439) / 4
+	.2byte	(.L3441 - .Lrtx3439) / 4
+	.2byte	(.L3442 - .Lrtx3439) / 4
+	.2byte	(.L3443 - .Lrtx3439) / 4
+	.2byte	(.L3444 - .Lrtx3439) / 4
+	.2byte	(.L3445 - .Lrtx3439) / 4
 	.section	.text.zftl_do_gc
-.L3407:
+.L3444:
 	adrp	x20, .LANCHOR63
 	add	x24, x20, :lo12:.LANCHOR63
 	mov	w22, 0
-.L3409:
+.L3446:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3503
+	cbz	w0, .L3540
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR102
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR102]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
@@ -21312,44 +21657,44 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	str	xzr, [x20, 8]
-	b	.L3574
-.L3401:
-	adrp	x0, .LANCHOR95
-	adrp	x27, .LANCHOR88
+	b	.L3611
+.L3438:
+	adrp	x0, .LANCHOR97
+	adrp	x27, .LANCHOR90
 	ldrh	w2, [x20, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	ldrh	w24, [x27, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR97]
+	ldrh	w24, [x27, #:lo12:.LANCHOR90]
 	add	w22, w22, w0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR88
 	str	x0, [x29, 104]
 	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	add	w24, w24, w1
 	mov	w1, 65535
 	and	w24, w24, 65535
 	cmp	w2, w1
-	beq	.L3410
-	cbnz	w25, .L3411
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	beq	.L3447
+	cbnz	w25, .L3448
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w21, w0, lsl 1
-	blt	.L3411
-.L3507:
+	blt	.L3448
+.L3544:
 	mov	w20, 16
-	b	.L3399
-.L3411:
-	adrp	x5, .LANCHOR85
+	b	.L3436
+.L3448:
+	adrp	x5, .LANCHOR87
 	mov	w1, 5
-	adrp	x25, .LANCHOR74
-	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+	adrp	x25, .LANCHOR76
+	ldrh	w0, [x5, #:lo12:.LANCHOR87]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR87]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3412
+	beq	.L3449
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR151
@@ -21359,138 +21704,138 @@ zftl_do_gc:
 	add	w2, w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR85
+	ldrh	w4, [x4, #:lo12:.LANCHOR85]
 	cmp	w4, w3
-	bcs	.L3413
+	bcs	.L3450
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3412
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3449
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w3
-	bls	.L3412
-.L3413:
-	ldrb	w2, [x25, #:lo12:.LANCHOR74]
+	bls	.L3449
+.L3450:
+	ldrb	w2, [x25, #:lo12:.LANCHOR76]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3414
+	cbz	w0, .L3451
 	mov	w0, 1
 	str	wzr, [x26, #:lo12:.LANCHOR151]
 	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3412:
-	strh	wzr, [x5, #:lo12:.LANCHOR85]
-.L3414:
+	b	.L3544
+.L3449:
+	strh	wzr, [x5, #:lo12:.LANCHOR87]
+.L3451:
 	cmp	w22, 15
-	bls	.L3509
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3546
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bhi	.L3509
+	bhi	.L3546
 	cmp	w24, 0
 	cset	w24, eq
 	add	w24, w24, 1
-.L3415:
+.L3452:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3416
+	tbz	x0, 8, .L3453
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x25, #:lo12:.LANCHOR74]
+	ldrb	w2, [x25, #:lo12:.LANCHOR76]
 	mov	w3, w21
-	mov	w1, 1935
+	mov	w1, 1983
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x20, 80]
 	str	w0, [sp]
-	adrp	x0, .LC228
-	add	x0, x0, :lo12:.LC228
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L3416:
-	ldrb	w0, [x25, #:lo12:.LANCHOR74]
+.L3453:
+	ldrb	w0, [x25, #:lo12:.LANCHOR76]
 	mov	w2, 1
 	mov	w1, w24
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3417
-.L3418:
+	ble	.L3454
+.L3455:
 	mov	w0, 1
-.L3576:
+.L3613:
 	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3509:
+	b	.L3544
+.L3546:
 	mov	w24, 2
-	b	.L3415
-.L3417:
-	ldrb	w0, [x25, #:lo12:.LANCHOR74]
+	b	.L3452
+.L3454:
+	ldrb	w0, [x25, #:lo12:.LANCHOR76]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3418
-	b	.L3507
-.L3410:
+	bgt	.L3455
+	b	.L3544
+.L3447:
 	adrp	x28, .LANCHOR14
 	ldr	w0, [x28, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3420
-	adrp	x0, .LANCHOR74
+	tbz	x0, 8, .L3457
+	adrp	x0, .LANCHOR76
 	ldrh	w7, [x20, 122]
 	ldrh	w6, [x20, 120]
 	mov	w4, w22
 	ldrh	w5, [x20, 124]
 	mov	w3, w21
-	ldrb	w2, [x0, #:lo12:.LANCHOR74]
-	mov	w1, 1947
+	ldrb	w2, [x0, #:lo12:.LANCHOR76]
+	mov	w1, 1995
 	str	w25, [sp]
-	adrp	x0, .LC228
-	add	x0, x0, :lo12:.LC228
+	adrp	x0, .LC236
+	add	x0, x0, :lo12:.LC236
 	bl	printf
-.L3420:
+.L3457:
 	cmp	w25, 1
-	bne	.L3421
+	bne	.L3458
 	bl	gc_scan_static_data
-	adrp	x26, .LANCHOR74
+	adrp	x26, .LANCHOR76
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3422
-.L3423:
+	cbz	w0, .L3459
+.L3460:
 	mov	w0, 1
-	strb	w0, [x26, #:lo12:.LANCHOR74]
-	b	.L3576
-.L3422:
+	strb	w0, [x26, #:lo12:.LANCHOR76]
+	b	.L3613
+.L3459:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3423
-	cbnz	w22, .L3424
-.L3428:
+	cbnz	w0, .L3460
+	cbnz	w22, .L3461
+.L3465:
 	mov	w20, 16
-.L3425:
+.L3462:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x3, .LANCHOR74
+	adrp	x3, .LANCHOR76
 	mov	w1, 1
 	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR74]
+	strb	w1, [x3, #:lo12:.LANCHOR76]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3433
+	cbz	w5, .L3470
 	strb	w1, [x19, #:lo12:.LANCHOR150]
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	tbz	x1, 8, .L3399
+	strb	wzr, [x3, #:lo12:.LANCHOR76]
+	tbz	x1, 8, .L3436
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC229
+	adrp	x0, .LC237
 	mov	w2, 0
-	mov	w1, 2037
-	add	x0, x0, :lo12:.LC229
+	mov	w1, 2085
+	add	x0, x0, :lo12:.LC237
 	bl	printf
-.L3399:
+.L3436:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -21500,132 +21845,132 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3424:
+.L3461:
 	cmp	w21, w24
-	adrp	x1, .LANCHOR90
-	adrp	x2, .LANCHOR87
-	bcs	.L3426
-	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR92
+	adrp	x2, .LANCHOR89
+	bcs	.L3463
+	ldrh	w0, [x2, #:lo12:.LANCHOR89]
 	cmp	w0, w21
-	bhi	.L3427
-.L3426:
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	bhi	.L3464
+.L3463:
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
 	add	w0, w21, w24
 	cmp	w0, w2
-	blt	.L3427
-	adrp	x0, .LANCHOR91
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	blt	.L3464
+	adrp	x0, .LANCHOR93
+	ldrh	w2, [x1, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w0
-	bcc	.L3428
-.L3427:
+	bcc	.L3465
+.L3464:
 	adrp	x5, .LANCHOR151
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
-	strb	w6, [x26, #:lo12:.LANCHOR74]
+	strb	w6, [x26, #:lo12:.LANCHOR76]
 	ldr	w0, [x5, #:lo12:.LANCHOR151]
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR151]
 	cmp	w0, w2, lsr 5
-	bls	.L3429
-	ldrh	w0, [x1, #:lo12:.LANCHOR90]
+	bls	.L3466
+	ldrh	w0, [x1, #:lo12:.LANCHOR92]
 	cmp	w0, w22
-	bls	.L3429
+	bls	.L3466
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3428
+	beq	.L3465
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR78
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3428
+	bgt	.L3465
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR151]
 	mov	w2, 4
 	mov	w1, 2
-.L3564:
+.L3601:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3428
-	b	.L3418
-.L3429:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cbz	w0, .L3465
+	b	.L3455
+.L3466:
+	adrp	x0, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bcc	.L3431
+	bcc	.L3468
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3564
-.L3431:
-	ldrh	w0, [x27, #:lo12:.LANCHOR88]
-	cbnz	w0, .L3432
+	b	.L3601
+.L3468:
+	ldrh	w0, [x27, #:lo12:.LANCHOR90]
+	cbnz	w0, .L3469
 	ldr	x0, [x29, 104]
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 8
-	bls	.L3425
-.L3432:
+	bls	.L3462
+.L3469:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3564
-.L3421:
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	b	.L3601
+.L3458:
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
 	cmp	w0, w21
-	bcc	.L3507
-	b	.L3428
-.L3433:
-	adrp	x2, .LANCHOR77
+	bcc	.L3544
+	b	.L3465
+.L3470:
+	adrp	x2, .LANCHOR79
 	mov	x26, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR77]
+	ldrh	w4, [x2, #:lo12:.LANCHOR79]
 	cmp	w21, w4
-	bcs	.L3434
-	cbz	w22, .L3435
+	bcs	.L3471
+	cbz	w22, .L3472
 	cmp	w22, 16
-	bls	.L3436
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3473
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w0
-	bhi	.L3436
+	bhi	.L3473
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3437
-	ldrb	w0, [x3, #:lo12:.LANCHOR74]
+	bne	.L3474
+	ldrb	w0, [x3, #:lo12:.LANCHOR76]
 	mov	w2, 4
 	mov	w1, 3
-.L3570:
+.L3607:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3438:
-	cbnz	w0, .L3440
-	b	.L3399
-.L3437:
+.L3475:
+	cbnz	w0, .L3477
+	b	.L3436
+.L3474:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3440
+	beq	.L3477
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR151
@@ -21635,86 +21980,86 @@ zftl_do_gc:
 	add	w2, w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR85
+	ldrh	w4, [x4, #:lo12:.LANCHOR85]
 	cmp	w4, w3
-	bcs	.L3441
+	bcs	.L3478
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3440
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3477
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w3
-	bls	.L3440
-.L3441:
-	ldrb	w2, [x23, #:lo12:.LANCHOR74]
+	bls	.L3477
+.L3478:
+	ldrb	w2, [x23, #:lo12:.LANCHOR76]
 	mov	w1, 0
 	bl	gc_add_sblk
 	str	wzr, [x21, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR114
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR118]
-.L3440:
+	str	w1, [x0, #:lo12:.LANCHOR114]
+.L3477:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
-	b	.L3399
-.L3436:
+	b	.L3436
+.L3473:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3573:
+.L3610:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3440
+	bne	.L3477
 	mov	w2, 2
-	b	.L3566
-.L3435:
+	b	.L3603
+.L3472:
 	ldr	w1, [x28, #:lo12:.LANCHOR14]
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	tbz	x1, 8, .L3443
+	strb	wzr, [x3, #:lo12:.LANCHOR76]
+	tbz	x1, 8, .L3480
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC229
+	adrp	x0, .LC237
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 2067
-	add	x0, x0, :lo12:.LC229
+	mov	w1, 2115
+	add	x0, x0, :lo12:.LC237
 	bl	printf
-.L3443:
+.L3480:
 	cmp	w21, 16
-	bls	.L3444
+	bls	.L3481
 	mov	w2, 4
-.L3566:
+.L3603:
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
-	b	.L3570
-.L3444:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	b	.L3607
+.L3481:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
 	mov	w1, w2
-	b	.L3573
-.L3434:
+	b	.L3610
+.L3471:
 	cmp	w25, 1
-	bne	.L3399
+	bne	.L3436
 	cmp	w21, w4, lsl 1
-	bge	.L3445
+	bge	.L3482
 	cmp	w24, w22, lsr 1
-	bcs	.L3446
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bcs	.L3483
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bcs	.L3446
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	bcs	.L3483
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3399
-.L3446:
+	strh	w0, [x2, #:lo12:.LANCHOR79]
+	b	.L3436
+.L3483:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -21722,38 +22067,38 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w28, w25
 	cmp	w25, w1
-	bne	.L3447
-.L3452:
+	bne	.L3484
+.L3489:
 	cmp	w22, 1
-	bhi	.L3448
-.L3449:
+	bhi	.L3485
+.L3486:
 	cmp	w21, w24
-	adrp	x21, .LANCHOR87
-	bcs	.L3456
-	strb	wzr, [x23, #:lo12:.LANCHOR74]
+	adrp	x21, .LANCHOR89
+	bcs	.L3493
+	strb	wzr, [x23, #:lo12:.LANCHOR76]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3456
+	beq	.L3493
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR78
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3458
-.L3456:
-	ldrh	w0, [x21, #:lo12:.LANCHOR87]
+	ble	.L3495
+.L3493:
+	ldrh	w0, [x21, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x26, #:lo12:.LANCHOR77]
-	b	.L3399
-.L3447:
+	strh	w0, [x26, #:lo12:.LANCHOR79]
+	b	.L3436
+.L3484:
 	adrp	x2, .LANCHOR151
 	adrp	x3, .LANCHOR6
 	uxtw	x25, w25
@@ -21763,181 +22108,181 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR151]
 	cmp	w1, w3, lsr 4
 	adrp	x3, .LANCHOR9
-	bls	.L3450
+	bls	.L3487
 	ldr	x1, [x3, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR151]
 	ldrh	w2, [x1, x25, lsl 1]
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	bcs	.L3450
+	bcs	.L3487
 	str	x3, [x29, 96]
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
 	ldr	x3, [x29, 96]
-	cbnz	w0, .L3440
-.L3450:
+	cbnz	w0, .L3477
+.L3487:
 	ldr	x0, [x3, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x25, lsl 1]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	ldrh	w0, [x0, #:lo12:.LANCHOR85]
 	cmp	w1, w0, lsr 1
-	bhi	.L3451
+	bhi	.L3488
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3440
-.L3451:
+	b	.L3477
+.L3488:
 	ldr	x2, [x29, 104]
-	ldrh	w0, [x27, #:lo12:.LANCHOR88]
-	ldrh	w2, [x2, #:lo12:.LANCHOR86]
+	ldrh	w0, [x27, #:lo12:.LANCHOR90]
+	ldrh	w2, [x2, #:lo12:.LANCHOR88]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR89
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
 	cmp	w0, w2, lsl 1
-	ble	.L3452
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ble	.L3489
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w1
-	bcc	.L3449
-	b	.L3452
-.L3448:
+	bcc	.L3486
+	b	.L3489
+.L3485:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR74]
+	strb	w1, [x23, #:lo12:.LANCHOR76]
 	cmp	w22, 16
-	bls	.L3453
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3490
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w0
-	bhi	.L3453
+	bhi	.L3490
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3454
+	bne	.L3491
 	mov	w2, 4
-.L3565:
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+.L3602:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3454:
-	adrp	x1, .LANCHOR87
+.L3491:
+	adrp	x1, .LANCHOR89
 	cmp	w21, w24, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	bls	.L3568
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3605
 	lsr	w1, w1, 2
-.L3569:
-	strh	w1, [x26, #:lo12:.LANCHOR77]
-	b	.L3438
-.L3453:
+.L3606:
+	strh	w1, [x26, #:lo12:.LANCHOR79]
+	b	.L3475
+.L3490:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3454
+	bne	.L3491
 	mov	w2, 2
-	b	.L3565
-.L3458:
+	b	.L3602
+.L3495:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR87]
+	ldrh	w1, [x21, #:lo12:.LANCHOR89]
 	and	w0, w0, 65535
-.L3568:
+.L3605:
 	lsr	w1, w1, 1
-	b	.L3569
-.L3445:
-	adrp	x0, .LANCHOR87
+	b	.L3606
+.L3482:
+	adrp	x0, .LANCHOR89
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3399
-.L3403:
+	strh	w0, [x2, #:lo12:.LANCHOR79]
+	b	.L3436
+.L3440:
 	adrp	x7, .LANCHOR63
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L3459
+	bne	.L3496
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L3459:
+.L3496:
 	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L3575
+	beq	.L3612
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3461
+	cbz	w5, .L3498
 	add	x1, x1, 58
 	mov	w0, 0
-.L3463:
+.L3500:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3462
-.L3467:
+	bne	.L3499
+.L3504:
 	adrp	x0, .LANCHOR63
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L3507
-.L3462:
+	b	.L3544
+.L3499:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3463
-.L3461:
+	bne	.L3500
+.L3498:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3464
+	beq	.L3501
 	tst	w0, 192
-	bne	.L3465
-.L3464:
+	bne	.L3502
+.L3501:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3467
-	mov	w2, 2300
+	cbz	w0, .L3504
+	mov	w2, 2348
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3467
-.L3465:
+	b	.L3504
+.L3502:
 	mov	w0, 2
-	b	.L3576
-.L3404:
+	b	.L3613
+.L3441:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3468
+	bne	.L3505
 	mov	w0, 3
-	b	.L3576
-.L3468:
+	b	.L3613
+.L3505:
 	adrp	x20, .LANCHOR63
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR63
 	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	cmp	w1, w2
-	beq	.L3418
+	beq	.L3455
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3469
+	cbz	w2, .L3506
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3469:
+	b	.L3544
+.L3506:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR9
@@ -21945,14 +22290,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3470
+	cbz	w1, .L3507
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2328
+	mov	w2, 2376
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3470:
+.L3507:
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	add	x21, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -21963,70 +22308,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3471
+	bhi	.L3508
 	strh	w0, [x21, 30]
-	b	.L3467
-.L3471:
+	b	.L3504
+.L3508:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3467
-.L3405:
+	b	.L3504
+.L3442:
 	adrp	x20, .LANCHOR63
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR85
 	add	x22, x20, :lo12:.LANCHOR63
-	add	x23, x23, :lo12:.LANCHOR83
-.L3544:
+	add	x23, x23, :lo12:.LANCHOR85
+.L3581:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3473
+	bcs	.L3510
 	cmp	w21, 7
-	bls	.L3544
-	b	.L3507
-.L3473:
+	bls	.L3581
+	b	.L3544
+.L3510:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3474
+	cbz	w3, .L3511
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR150]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3475
+	tbz	x0, 8, .L3512
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC230
-	add	x0, x0, :lo12:.LC230
+	adrp	x0, .LC238
+	add	x0, x0, :lo12:.LC238
 	bl	printf
-.L3475:
+.L3512:
 	ldrh	w2, [x20, #:lo12:.LANCHOR63]
 	add	x0, x20, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3476
+	beq	.L3513
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2362
+	mov	w2, 2410
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3476:
+.L3513:
 	add	x0, x20, :lo12:.LANCHOR63
 	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3507
-.L3474:
+	b	.L3544
+.L3511:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -22034,27 +22379,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR150]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3477
+	tbz	x0, 8, .L3514
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC231
-	add	x0, x0, :lo12:.LC231
+	adrp	x0, .LC239
+	add	x0, x0, :lo12:.LC239
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3477:
+.L3514:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3478
+	beq	.L3515
 	tst	w0, 192
-	bne	.L3479
-.L3478:
+	bne	.L3516
+.L3515:
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2372
+	mov	w2, 2420
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3479:
+.L3516:
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	add	x19, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -22064,98 +22409,98 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3480
+	bhi	.L3517
 	strh	w0, [x19, 30]
-	b	.L3507
-.L3480:
+	b	.L3544
+.L3517:
 	strh	wzr, [x19, 30]
-.L3574:
+.L3611:
 	bl	flt_sys_flush
-	b	.L3507
-.L3406:
+	b	.L3544
+.L3443:
 	ldrh	w1, [x20, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3481
-	adrp	x0, .LANCHOR74
-	ldrb	w22, [x0, #:lo12:.LANCHOR74]
+	bne	.L3518
+	adrp	x0, .LANCHOR76
+	ldrb	w22, [x0, #:lo12:.LANCHOR76]
 	cmp	w22, 1
-	bne	.L3481
+	bne	.L3518
 	bl	ftl_flush
 	adrp	x0, .LANCHOR63
 	add	x1, x0, :lo12:.LANCHOR63
 	mov	x21, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3482
+	cbz	w1, .L3519
 	mov	w0, w22
 	mov	w1, 5
-.L3571:
+.L3608:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3484
+	beq	.L3521
 	adrp	x0, .LANCHOR7
 	ldr	x22, [x0, #:lo12:.LANCHOR7]
 	add	x22, x22, x19, uxth 2
 	ldrb	w0, [x22, 2]
 	tst	w0, 224
-	beq	.L3485
+	beq	.L3522
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2401
+	mov	w2, 2449
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3485:
+.L3522:
 	ldrb	w0, [x22, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x22, 2]
-.L3506:
+.L3543:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR75
+	adrp	x22, .LANCHOR77
 	mov	w0, 5
 	strb	w0, [x20, 84]
 	add	x1, x20, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR85
 	strb	w0, [x20, 89]
 	strh	w19, [x20, 80]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	strh	wzr, [x20, 82]
 	strb	wzr, [x20, 85]
 	strh	wzr, [x20, 90]
 	mul	w0, w0, w1
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR77]
 	strh	w0, [x20, 86]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR78
 	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR76]
+	ldrb	w0, [x20, #:lo12:.LANCHOR78]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR152
 	ldr	x0, [x0, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR76]
+	ldrb	w0, [x20, #:lo12:.LANCHOR78]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR77]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR153
 	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR76]
+	ldrb	w0, [x20, #:lo12:.LANCHOR78]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR77]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR74
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
 	bl	ftl_memset
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
@@ -22164,9 +22509,9 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	strh	w19, [x0, 126]
 	add	x0, x21, :lo12:.LANCHOR63
 	str	w1, [x0, 324]
@@ -22176,42 +22521,42 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3507
-.L3482:
+	b	.L3544
+.L3519:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3571
-.L3481:
+	b	.L3608
+.L3518:
 	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR74
+	adrp	x25, .LANCHOR76
 	adrp	x24, .LANCHOR63
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR74
+	add	x25, x25, :lo12:.LANCHOR76
 	add	x21, x24, :lo12:.LANCHOR63
 	add	x26, x20, 80
-.L3488:
+.L3525:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3507
+	beq	.L3544
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3489
+	cbnz	w0, .L3526
 	adrp	x0, .LANCHOR52
 	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 3
-	bhi	.L3490
+	bhi	.L3527
 	bl	ftl_write_commit
-.L3490:
+.L3527:
 	ldrh	w1, [x21, 26]
 	ldrh	w0, [x21, 24]
 	cmp	w1, w0
-	bcc	.L3488
+	bcc	.L3525
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	bl	ftl_write_commit
@@ -22221,73 +22566,73 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3492
+	cbz	w1, .L3529
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2476
+	mov	w2, 2524
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3492:
+.L3529:
 	ldrh	w0, [x24, #:lo12:.LANCHOR63]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3493
+	cbnz	w1, .L3530
 	bl	ftl_free_sblk
-	b	.L3467
-.L3493:
+	b	.L3504
+.L3530:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3467
-.L3489:
+	b	.L3504
+.L3526:
 	ldrh	w0, [x21, 320]
-	cbz	w0, .L3494
+	cbz	w0, .L3531
 	strh	wzr, [x21, 320]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	w0, [x21, 324]
 	cmn	w0, #1
-	beq	.L3495
+	beq	.L3532
 	bl	ftl_mask_bad_block
-.L3495:
+.L3532:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x24, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR102
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR102]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3496
+	cbz	x0, .L3533
 	bl	buf_free
-.L3496:
+.L3533:
 	add	x24, x24, :lo12:.LANCHOR63
 	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2514
+	mov	w2, 2562
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3507
-.L3494:
+	b	.L3544
+.L3531:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x21, 26]
 	cmp	w0, 1
 	ldrh	w0, [x21, 24]
-	bls	.L3497
+	bls	.L3534
 	cmp	w1, w0
-	bcc	.L3488
+	bcc	.L3525
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	ldrh	w0, [x21, 56]
@@ -22298,12 +22643,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-	b	.L3507
-.L3497:
+	b	.L3544
+.L3534:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR150]
 	cmp	w1, w0
-	bcc	.L3498
+	bcc	.L3535
 	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
 	strh	w1, [x21, 56]
@@ -22312,7 +22657,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x21]
-.L3498:
+.L3535:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -22322,48 +22667,48 @@ zftl_do_gc:
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	add	x0, x24, :lo12:.LANCHOR63
-	adrp	x1, .LANCHOR83
-	adrp	x2, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR85
+	adrp	x2, .LANCHOR71
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	ldrb	w2, [x2, #:lo12:.LANCHOR71]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3500
+	bne	.L3537
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	cbnz	w1, .L3500
+	adrp	x1, .LANCHOR72
+	ldrb	w1, [x1, #:lo12:.LANCHOR72]
+	cbnz	w1, .L3537
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3500:
+.L3537:
 	add	x24, x24, :lo12:.LANCHOR63
 	strh	wzr, [x24, 22]
-	b	.L3507
-.L3503:
+	b	.L3544
+.L3540:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3504
+	bcc	.L3541
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR150]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3507
-.L3504:
+	b	.L3544
+.L3541:
 	cmp	w21, 15
-	bls	.L3409
+	bls	.L3446
 	cmp	w25, 1
-	bne	.L3507
+	bne	.L3544
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3409
-	b	.L3507
-.L3408:
+	bls	.L3446
+	b	.L3544
+.L3445:
 	bl	gc_update_l2p_map_new
 	mov	w21, -1
 	bl	gc_free_src_blk
@@ -22371,22 +22716,22 @@ zftl_do_gc:
 	bl	pm_flush
 	strh	w21, [x20, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR102
+	ldr	x0, [x0, #:lo12:.LANCHOR102]
 	strh	w21, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3575:
+.L3612:
 	strb	wzr, [x19, #:lo12:.LANCHOR150]
-	b	.L3507
-.L3484:
-	mov	w2, 2407
+	b	.L3544
+.L3521:
+	mov	w2, 2455
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3506
+	b	.L3543
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -22406,27 +22751,27 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x23, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3578
+	tbz	x0, 12, .L3615
 	ldr	w4, [x23]
 	mov	w3, w2
-	adrp	x0, .LC232
+	adrp	x0, .LC240
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC232
+	add	x0, x0, :lo12:.LC240
 	mov	w1, w27
 	bl	printf
-.L3578:
-	cbnz	w27, .L3579
+.L3615:
+	cbnz	w27, .L3616
 	adrp	x0, .LANCHOR59
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3580:
+.L3617:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3594
+	bcc	.L3631
 	adrp	x24, .LANCHOR123
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR102
 	ldrb	w0, [x24, #:lo12:.LANCHOR123]
 	add	w19, w19, w27
 	add	x24, x24, :lo12:.LANCHOR123
@@ -22437,25 +22782,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3582:
-	cbnz	w21, .L3590
-	adrp	x20, .LANCHOR93
-	adrp	x19, .LANCHOR97
-	add	x20, x20, :lo12:.LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR97
+.L3619:
+	cbnz	w21, .L3627
+	adrp	x20, .LANCHOR95
+	adrp	x19, .LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR95
+	add	x19, x19, :lo12:.LANCHOR99
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3591:
+.L3628:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3592
+	ble	.L3629
 	mov	w0, 0
-.L3577:
+.L3614:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -22463,28 +22808,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3579:
+.L3616:
 	cmp	w27, 3
-	bhi	.L3594
+	bhi	.L3631
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3580
-.L3590:
+	b	.L3617
+.L3627:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3583
+	cbnz	x0, .L3620
 	bl	ftl_write_commit
-	b	.L3582
-.L3583:
+	b	.L3619
+.L3620:
 	ldrb	w3, [x24]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3586
+	bne	.L3623
 	cmp	w26, w22
-	bne	.L3587
+	bne	.L3624
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -22493,9 +22838,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3599:
+.L3636:
 	strb	w3, [x28, 56]
-.L3586:
+.L3623:
 	ldr	x3, [x28, 8]
 	mov	x1, x23
 	ldrb	w0, [x28, 57]
@@ -22505,7 +22850,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	ldr	x1, [x25, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -22517,19 +22862,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x23, x23, x0
-	b	.L3582
-.L3587:
+	b	.L3619
+.L3624:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3599
-.L3592:
+	b	.L3636
+.L3629:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3591
-.L3594:
+	b	.L3628
+.L3631:
 	mov	w0, -1
-	b	.L3577
+	b	.L3614
 	.size	zftl_write, .-zftl_write
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -22588,12 +22933,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3605
+	bne	.L3642
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3605:
+.L3642:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -22620,7 +22965,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3628
+	bcc	.L3665
 	adrp	x24, .LANCHOR221
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
@@ -22629,17 +22974,17 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR221]
-	tbz	x2, 12, .L3609
-	adrp	x0, .LC233
+	tbz	x2, 12, .L3646
+	adrp	x0, .LC241
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC233
+	add	x0, x0, :lo12:.LC241
 	bl	printf
-.L3609:
-	adrp	x23, .LANCHOR100
+.L3646:
+	adrp	x23, .LANCHOR102
 	adrp	x26, .LANCHOR123
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+	ldr	x0, [x23, #:lo12:.LANCHOR102]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
@@ -22648,7 +22993,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR123]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3610
+	cbz	w25, .L3647
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -22656,20 +23001,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3611
+	bne	.L3648
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3611:
+.L3648:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3613
+	beq	.L3650
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3613
+	cbz	x0, .L3650
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -22684,57 +23029,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3613:
+.L3650:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3610:
-	cbz	w19, .L3615
+.L3647:
+	cbz	w19, .L3652
 	bl	ftl_flush
-.L3615:
-	adrp	x25, .LANCHOR102
+.L3652:
+	adrp	x25, .LANCHOR66
 	add	x21, x26, :lo12:.LANCHOR123
-	add	x25, x25, :lo12:.LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR66
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3616:
+.L3653:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3621
-	cbz	w19, .L3623
+	bcs	.L3658
+	cbz	w19, .L3660
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3624
+	bne	.L3661
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3624:
+.L3661:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3623
+	beq	.L3660
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3623
+	cbz	x0, .L3660
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR123]
 	cmp	w19, w0
-	bcc	.L3626
+	bcc	.L3663
 	adrp	x1, .LANCHOR222
 	adrp	x0, .LC0
-	mov	w2, 1241
+	mov	w2, 1251
 	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3626:
+.L3663:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -22742,42 +23087,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3623:
+.L3660:
 	ldr	w1, [x24, #:lo12:.LANCHOR221]
 	cmp	w1, 8192
-	bls	.L3629
+	bls	.L3666
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3627
-	adrp	x0, .LC233
+	tbz	x0, 12, .L3664
+	adrp	x0, .LC241
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC233
+	add	x0, x0, :lo12:.LC241
 	bl	printf
-.L3627:
+.L3664:
 	str	wzr, [x24, #:lo12:.LANCHOR221]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR114
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR118]
-.L3629:
+	str	w1, [x0, #:lo12:.LANCHOR114]
+.L3666:
 	mov	w0, 0
-	b	.L3607
-.L3621:
+	b	.L3644
+.L3658:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3617
+	beq	.L3654
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3619
+	cbz	x0, .L3656
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -22789,24 +23134,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3655:
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+.L3692:
+	ldr	x1, [x23, #:lo12:.LANCHOR102]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3619:
+.L3656:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3616
-.L3617:
+	b	.L3653
+.L3654:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3619
+	beq	.L3656
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -22820,14 +23165,14 @@ zftl_discard:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR67
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3655
-.L3628:
+	b	.L3692
+.L3665:
 	mov	w0, -1
-.L3607:
+.L3644:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -23002,7 +23347,7 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -23016,14 +23361,14 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
@@ -23042,39 +23387,39 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
@@ -23101,14 +23446,14 @@ _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -23164,7 +23509,7 @@ _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -23183,21 +23528,21 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
@@ -23211,7 +23556,7 @@ discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
@@ -23238,21 +23583,21 @@ free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -23304,7 +23649,7 @@ ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
@@ -23318,7 +23663,7 @@ ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -23358,7 +23703,7 @@ ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -23386,19 +23731,19 @@ g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
@@ -23412,19 +23757,19 @@ g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
@@ -23483,7 +23828,7 @@ g_flash_tmp_page_buffer:
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
@@ -23499,9 +23844,9 @@ g_ftl_info_blk:
 	.align	3
 	.set	.LANCHOR63,. + 0
 	.type	g_gc_info, %object
-	.size	g_gc_info, 328
+	.size	g_gc_info, 344
 g_gc_info:
-	.zero	328
+	.zero	344
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
 	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
@@ -23509,7 +23854,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -23522,7 +23867,7 @@ g_idb_slc_mode_enable:
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
@@ -23548,13 +23893,13 @@ g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
@@ -23567,19 +23912,19 @@ g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_one_pass_program,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_one_pass_program, %object
 	.size	g_one_pass_program, 1
 g_one_pass_program:
@@ -23592,7 +23937,7 @@ g_one_pass_program:
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -23631,7 +23976,7 @@ gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
@@ -23644,14 +23989,14 @@ gc_free_slc_sblk_th:
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
@@ -23672,21 +24017,21 @@ gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
@@ -23706,35 +24051,35 @@ gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -23748,7 +24093,7 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
@@ -23762,7 +24107,7 @@ gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
@@ -23776,28 +24121,28 @@ gp_flash_check_buf:
 	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
@@ -23811,7 +24156,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -23853,14 +24198,14 @@ idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -23872,13 +24217,13 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
@@ -23947,7 +24292,7 @@ read_buf_count:
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
@@ -23972,14 +24317,14 @@ sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
@@ -24010,21 +24355,21 @@ write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -24174,7 +24519,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -24205,7 +24550,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -25497,7 +25842,7 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.byte	0
 	.hword	512
-	.byte	3
+	.byte	0
 	.byte	0
 	.byte	0
 	.byte	0
@@ -26005,777 +26350,790 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10010,"a",@progbits
+	.section	.rodata.__func__.10034,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10010, %object
-	.size	__func__.10010, 20
-__func__.10010:
+	.type	__func__.10034, %object
+	.size	__func__.10034, 20
+__func__.10034:
 	.string	"gc_scan_static_data"
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 	.set	.LANCHOR143,. + 0
-	.type	__func__.9469, %object
-	.size	__func__.9469, 17
-__func__.9469:
+	.type	__func__.9466, %object
+	.size	__func__.9466, 17
+__func__.9466:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9516,"a",@progbits
+	.section	.rodata.__func__.9513,"a",@progbits
 	.align	3
 	.set	.LANCHOR216,. + 0
-	.type	__func__.9516, %object
-	.size	__func__.9516, 17
-__func__.9516:
+	.type	__func__.9513, %object
+	.size	__func__.9513, 17
+__func__.9513:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9534,"a",@progbits
+	.section	.rodata.__func__.9531,"a",@progbits
 	.align	3
 	.set	.LANCHOR122,. + 0
-	.type	__func__.9534, %object
-	.size	__func__.9534, 14
-__func__.9534:
+	.type	__func__.9531, %object
+	.size	__func__.9531, 14
+__func__.9531:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9578,"a",@progbits
+	.section	.rodata.__func__.9576,"a",@progbits
 	.align	3
 	.set	.LANCHOR125,. + 0
-	.type	__func__.9578, %object
-	.size	__func__.9578, 18
-__func__.9578:
+	.type	__func__.9576, %object
+	.size	__func__.9576, 18
+__func__.9576:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9611,"a",@progbits
+	.section	.rodata.__func__.9609,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9611, %object
-	.size	__func__.9611, 10
-__func__.9611:
+	.type	__func__.9609, %object
+	.size	__func__.9609, 10
+__func__.9609:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9642,"a",@progbits
+	.section	.rodata.__func__.9640,"a",@progbits
 	.align	3
 	.set	.LANCHOR222,. + 0
-	.type	__func__.9642, %object
-	.size	__func__.9642, 13
-__func__.9642:
+	.type	__func__.9640, %object
+	.size	__func__.9640, 13
+__func__.9640:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9789,"a",@progbits
+	.section	.rodata.__func__.9787,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9789, %object
-	.size	__func__.9789, 12
-__func__.9789:
+	.type	__func__.9787, %object
+	.size	__func__.9787, 12
+__func__.9787:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9810,"a",@progbits
+	.section	.rodata.__func__.9834,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9810, %object
-	.size	__func__.9810, 21
-__func__.9810:
+	.type	__func__.9834, %object
+	.size	__func__.9834, 21
+__func__.9834:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9844,"a",@progbits
+	.section	.rodata.__func__.9868,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.9844, %object
-	.size	__func__.9844, 22
-__func__.9844:
+	.type	__func__.9868, %object
+	.size	__func__.9868, 22
+__func__.9868:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9857,"a",@progbits
+	.section	.rodata.__func__.9881,"a",@progbits
 	.align	3
-	.set	.LANCHOR68,. + 0
-	.type	__func__.9857, %object
-	.size	__func__.9857, 19
-__func__.9857:
+	.set	.LANCHOR70,. + 0
+	.type	__func__.9881, %object
+	.size	__func__.9881, 19
+__func__.9881:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9886,"a",@progbits
+	.section	.rodata.__func__.9910,"a",@progbits
 	.align	3
 	.set	.LANCHOR218,. + 0
-	.type	__func__.9886, %object
-	.size	__func__.9886, 16
-__func__.9886:
+	.type	__func__.9910, %object
+	.size	__func__.9910, 16
+__func__.9910:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9908,"a",@progbits
+	.section	.rodata.__func__.9932,"a",@progbits
 	.align	3
-	.set	.LANCHOR106,. + 0
-	.type	__func__.9908, %object
-	.size	__func__.9908, 16
-__func__.9908:
+	.set	.LANCHOR119,. + 0
+	.type	__func__.9932, %object
+	.size	__func__.9932, 16
+__func__.9932:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9952,"a",@progbits
+	.section	.rodata.__func__.9976,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9952, %object
-	.size	__func__.9952, 16
-__func__.9952:
+	.type	__func__.9976, %object
+	.size	__func__.9976, 16
+__func__.9976:
 	.string	"gc_scan_src_blk"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC165:
+.LC172:
 	.string	"free_buf_count: %d\n"
-.LC166:
+.LC173:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC167:
+.LC174:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC168:
+.LC175:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC169:
+.LC176:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC170:
+.LC177:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC171:
+.LC178:
 	.string	"lpa:"
-.LC172:
+.LC179:
 	.string	"vpn:"
-.LC173:
+.LC180:
 	.string	"sblk:"
-.LC174:
+.LC181:
 	.string	"lpa_hash:"
-.LC175:
+.LC182:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC70:
+.LC74:
 	.string	"dump_sblk_queue: %d\n"
-.LC71:
+.LC75:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC118:
+.LC122:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC111:
+.LC115:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC112:
+.LC116:
 	.string	"sync para %d\n"
-.LC113:
+.LC117:
 	.string	"DDR mode Read error %x %x\n"
-.LC114:
+.LC118:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
-.LC35:
+.LC36:
 	.string	"erase done: %x\n"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
-.LC33:
-	.string	"flash_erase_block %x %x %x\n"
 .LC34:
+	.string	"flash_erase_block %x %x %x\n"
+.LC35:
 	.string	"flash_erase_block %d block = %x status = %x\n"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
-.LC31:
-	.string	"flash_erase_duplane_block %x %x %x\n"
 .LC32:
+	.string	"flash_erase_duplane_block %x %x %x\n"
+.LC33:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC117:
+.LC121:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC162:
+.LC169:
 	.string	"...%d @ %s %d %p\n"
-.LC163:
+.LC170:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC86:
+.LC90:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC159:
+.LC166:
 	.string	"finfo:"
-.LC160:
+.LC167:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC161:
+.LC168:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC41:
+.LC42:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC122:
+.LC128:
 	.string	"flash_prog_page %x %x %x\n"
-.LC123:
+.LC129:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC130:
+.LC136:
 	.string	"flash_prog_page_en:%x %x %x\n"
-.LC131:
+.LC137:
 	.string	"w d:"
-.LC132:
+.LC138:
 	.string	"w s:"
-.LC133:
+.LC139:
 	.string	"spare"
-.LC134:
+.LC140:
 	.string	"data"
-.LC135:
+.LC141:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
-.LC38:
+.LC39:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_otp_data.str1.1,"aMS",@progbits,1
-.LC39:
+.LC40:
 	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC104:
+.LC108:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC115:
+.LC119:
 	.string	"flash_read_page_en %x %x %x\n"
-.LC116:
+.LC120:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
-.LC36:
-	.string	"nand sdr mode %x\n"
 .LC37:
+	.string	"nand sdr mode %x\n"
+.LC38:
 	.string	"nand ddr mode %x\n"
+	.section	.rodata.ftl_alloc_new_data_sblk.str1.1,"aMS",@progbits,1
+.LC230:
+	.string	"error gc_add_sblk: %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC69:
+.LC73:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
-.LC154:
+.LC161:
 	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
-.LC155:
+.LC162:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC156:
+.LC163:
 	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
-.LC157:
+.LC164:
 	.string	"ftl_sblk_dump_write = %x %x\n"
-.LC158:
+.LC165:
 	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC140:
+.LC147:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC56:
+.LC61:
 	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
-.LC57:
+.LC62:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC138:
+.LC144:
 	.string	"%d %x @%d %x\n"
-.LC139:
+.LC145:
 	.string	"ftl_info_blk_init %d %d %x\n"
+.LC146:
+	.string	"ink flag: %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC137:
+.LC143:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC141:
+.LC148:
 	.string	"ftl_low_format %d\n"
-.LC142:
+.LC149:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC61:
-	.string	"mask bad block:cs %x block: %x\n"
+.LC59:
+	.string	"mask bad block:cs %x %x block: %x %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC144:
+.LC151:
 	.string	"saved_active_page  = %x\n"
-.LC145:
+.LC152:
 	.string	"saved_active_plane = %x\n"
-.LC146:
+.LC153:
 	.string	"sblk = %x\n"
-.LC147:
+.LC154:
 	.string	"phy_blk = %x %x\n"
-.LC148:
+.LC155:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC149:
+.LC156:
 	.string	"dump_write_lpa = %x %x %x %x\n"
-.LC150:
+.LC157:
 	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
-.LC151:
+.LC158:
 	.string	"dump write = %x %x\n"
-.LC152:
+.LC159:
 	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC143:
+.LC150:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC208:
+.LC215:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC209:
+.LC216:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC210:
+.LC217:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC211:
+.LC218:
 	.string	"index= %x, lpa=%x\n"
-.LC212:
+.LC219:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC164:
+.LC171:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC136:
+.LC142:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC219:
+.LC226:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC220:
+.LC227:
 	.string	"ftl_update_l2p_map"
-.LC221:
+.LC228:
 	.string	"lpa_tbl:"
-.LC222:
+.LC229:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC60:
+.LC58:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC223:
+.LC231:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC68:
+.LC71:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
+.LC72:
+	.string	"ftl re prog: lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC42:
-	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 .LC43:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+.LC44:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC216:
+.LC223:
 	.string	"gc_lpa:"
-.LC217:
+.LC224:
 	.string	"gc_ppa:"
-.LC218:
+.LC225:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC224:
+.LC232:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC225:
+.LC233:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC226:
+.LC234:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC227:
+.LC235:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
+	.section	.rodata.gc_free_bad_sblk.str1.1,"aMS",@progbits,1
+.LC60:
+	.string	"gc_free_bad_sblk 0x%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC58:
+.LC63:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC59:
+.LC64:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC46:
+.LC48:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
+	.section	.rodata.gc_mark_bad_ppa.str1.1,"aMS",@progbits,1
+.LC45:
+	.string	"gc_mark_bad_ppa %d %x %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC186:
+.LC193:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC187:
+.LC194:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC188:
+.LC195:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC206:
+.LC213:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC207:
+.LC214:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC48:
+.LC50:
 	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
-.LC49:
+.LC51:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC75:
+.LC79:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC76:
+.LC80:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC77:
+.LC81:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC78:
+.LC82:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC79:
+.LC83:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC80:
+.LC84:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC81:
+.LC85:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC82:
+.LC86:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC83:
+.LC87:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC202:
+.LC209:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC203:
+.LC210:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC204:
+.LC211:
 	.string	"lpa: %x %x %x\n"
-.LC205:
+.LC212:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC44:
+.LC46:
 	.string	"status: %x, ppa: %x\n"
-.LC45:
+.LC47:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC94:
+.LC98:
 	.string	"otp error! %d"
-.LC95:
+.LC99:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC110:
+.LC114:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC124:
+.LC130:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC125:
+.LC131:
 	.string	"write_idblock check fail! %x\n"
-.LC126:
+.LC132:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC177:
+.LC184:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC178:
+.LC185:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC179:
+.LC186:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC180:
+.LC187:
 	.string	"pm_ppa:"
-.LC181:
+.LC188:
 	.string	"data:"
-.LC182:
+.LC189:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC74:
+.LC78:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC105:
+.LC109:
 	.string	"micron %d row=%x,last status %d,status = %d\n"
-.LC106:
+.LC110:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -26833,89 +27191,95 @@ __func__.9952:
 .LC27:
 	.string	"TOGGLE enable: %x\n"
 .LC28:
-	.string	"MultiPlaneProgCmd: %x %x\n"
+	.string	"g_flash_slc_mode: %x %x\n"
 .LC29:
-	.string	"MultiPlaneReadCmd: %x %x\n"
+	.string	"MultiPlaneProgCmd: %x %x\n"
 .LC30:
+	.string	"MultiPlaneReadCmd: %x %x\n"
+.LC31:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC87:
+.LC91:
 	.string	"...%s enter... %p\n"
-.LC88:
+.LC92:
 	.string	"0:%x %x %x %x %x\n"
-.LC89:
+.LC93:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC101:
+.LC105:
 	.string	"dqs data abort %x\n"
-.LC102:
+.LC106:
 	.string	"dqs data timeout %x\n"
-.LC103:
+.LC107:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC96:
+.LC100:
 	.string	"flash_abort_clear = %d\n"
-.LC97:
+.LC101:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC98:
+.LC102:
 	.string	"nandc:"
-.LC99:
+.LC103:
 	.string	"%d flReg.d32=%x %x\n"
-.LC100:
+.LC104:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC72:
+.LC76:
 	.string	"blk %x is bad block\n"
-.LC73:
+.LC77:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC85:
+.LC89:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC183:
+.LC190:
 	.string	"pm_init posr %x %x %x\n"
-.LC184:
+.LC191:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC185:
+.LC192:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC176:
+.LC183:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC153:
+.LC160:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC62:
+.LC65:
 	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC63:
+.LC66:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC64:
+.LC67:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC65:
+.LC68:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC66:
+.LC69:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
-.LC67:
+.LC70:
 	.string	"swl : %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC47:
+.LC49:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC54:
+.LC56:
 	.string	"list count:%p %d\n"
-.LC55:
+.LC57:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC119:
+.LC123:
 	.string	"read: %x %x %x %x\n"
-.LC120:
+.LC124:
 	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
-.LC121:
+.LC125:
+	.string	"prog end %x %x error_ecc %d %d\n"
+.LC126:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC127:
+	.string	"dp prog end %x %x error_ecc %d %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -27048,32 +27412,32 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC201:
+.LC208:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC90:
+.LC94:
 	.string	"%s 0x%x:"
-.LC91:
+.LC95:
 	.string	"%x "
-.LC92:
+.LC96:
 	.string	""
-.LC93:
+.LC97:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
-.LC40:
+.LC41:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC127:
+.LC133:
 	.string	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
-.LC128:
+.LC134:
 	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC129:
+.LC135:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -27174,7 +27538,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -27191,7 +27555,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -27595,15 +27959,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC107:
+.LC111:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC108:
+.LC112:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC109:
+.LC113:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -27654,7 +28018,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -27667,63 +28031,63 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC233:
+.LC241:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC228:
+.LC236:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC229:
+.LC237:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC230:
+.LC238:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC231:
+.LC239:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC50:
+.LC52:
 	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
-.LC51:
+.LC53:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
-.LC52:
+.LC54:
 	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC53:
+.LC55:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC189:
-	.string	"FTL version: 6.0.14 20181128"
-.LC190:
+.LC196:
+	.string	"FTL version: 6.0.16 20190427"
+.LC197:
 	.string	"_c_user_data_density := %d\n"
-.LC191:
+.LC198:
 	.string	"_c_totle_phy_density := %d\n"
-.LC192:
+.LC199:
 	.string	"_c_totle_log_page := %d\n"
-.LC193:
+.LC200:
 	.string	"_c_totle_data_density := %d\n"
-.LC194:
+.LC201:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC195:
+.LC202:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC196:
+.LC203:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC197:
+.LC204:
 	.string	"_min_slc_super_block := %d\n"
-.LC198:
+.LC205:
 	.string	"_max_xlc_super_block := %d\n"
-.LC199:
+.LC206:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC200:
+.LC207:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC213:
+.LC220:
 	.string	"ftl_read %x %x %x\n"
-.LC214:
+.LC221:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC215:
+.LC222:
 	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC84:
+.LC88:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC232:
+.LC240:
 	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free

commit 27643361d9f25861b93e562d31cd6a944a8360e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 22 10:38:14 2019 +0800

    common: android: add/update boot message
    
    Make android bootflow more clear by message.
    
    Change-Id: I6e022ae6fd22ce4b6933b085033c66b7bf79297c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index bf029fa319..313d80ed71 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -997,8 +997,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 #ifdef CONFIG_ANDROID_AB
 	/*TODO: get from pre-loader or misc partition*/
-	if (rk_avb_get_current_slot(slot_suffix))
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		printf("rk_avb_get_current_slot() failed\n");
 		return -1;
+	}
 
 	AvbOps *ops;
 	AvbABData ab_data;
@@ -1089,31 +1091,39 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	char vbmeta_partition[9] = {0};
 	disk_partition_t vbmeta_part_info;
 
-	if (trusty_read_vbootkey_enable_flag(&vboot_flag))
+	if (trusty_read_vbootkey_enable_flag(&vboot_flag)) {
+		printf("Can't read vboot flag\n");
 		return -1;
+	}
 
 	if (vboot_flag) {
-		printf("SecureBoot enabled, AVB verify\n");
+		printf("Vboot=1, SecureBoot enabled, AVB verify\n");
 		if (android_slot_verify(boot_partname, &load_address,
-					slot_suffix))
+					slot_suffix)) {
+			printf("AVB verify failed\n");
 			return -1;
+		}
 	} else {
 		strcat(vbmeta_partition, ANDROID_PARTITION_VBMETA);
 		strcat(vbmeta_partition, slot_suffix);
 		part_num = part_get_info_by_name(dev_desc, vbmeta_partition,
 						 &vbmeta_part_info);
 		if (part_num < 0) {
-			printf("SecureBoot disabled, AVB skip\n");
+			printf("Not AVB images, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
 			if (load_android_image(dev_desc, boot_partname,
-					       slot_suffix, &load_address))
+					       slot_suffix, &load_address)) {
+				printf("Android image load failed\n");
 				return -1;
+			}
 		} else {
-			printf("SecureBoot enabled, AVB verify\n");
+			printf("Vboot=0, AVB images, AVB verify\n");
 			if (android_slot_verify(boot_partname, &load_address,
-						slot_suffix))
+						slot_suffix)) {
+				printf("AVB verify failed\n");
 				return -1;
+			}
 		}
 	}
 #else
@@ -1122,8 +1132,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	 * Determine if this is an AOSP image.
 	 */
 	if (load_android_image(dev_desc, boot_partname,
-			       slot_suffix, &load_address))
+			       slot_suffix, &load_address)) {
+		printf("Android image load failed\n");
 		return -1;
+	}
 #endif
 
 	/* Set Android root variables. */

commit e0d6c5c68d0ea508af4505816dc969901a5ea78d
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon May 27 15:24:46 2019 +0800

    FROMRKLOCAL: configs: rk3328_defconfig: enable CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    Change-Id: I851180f6319ee60d18606e3e156e876ca49a8249
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 2af35b749b..7083231324 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -132,4 +132,5 @@ CONFIG_AVB_VBMETA_EMBEDDED_PUBLIC_KEY=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 2e6f3f4c09e03d35bfc9e08fa7b7bb5fa6fee0a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 27 11:14:33 2019 +0800

    tool: rockchip: boot/trust_merger: ignore prepath when it's already exist
    
    Change-Id: I33b1b14ba7b68ab08e1e61bf98e476da3b13b56a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index f258f6c3c3..e8ccea3828 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -149,7 +149,7 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath) {
+	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index a33125e224..601d33f9d4 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -110,7 +110,7 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
-	} else if (gPrePath) {
+	} else if (gPrePath && strncmp(path, gPrePath, strlen(gPrePath))) {
 		strcpy(tmp, path);
 		strcpy(path, gPrePath);
 		strcat(path, tmp);

commit 05b87a4eed51c6c519fc94c54a4b9007cb77d3b3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 15:20:21 2019 +0800

    make.sh: remove exist image before pack
    
    Change-Id: Iea5083970bbd332ec62250a6d1e35ac09dbed533
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 707b92cb27..e1fad7b138 100755
--- a/make.sh
+++ b/make.sh
@@ -551,6 +551,7 @@ pack_loader_image()
 		return
 	fi
 
+	ls *_loader_*.bin >/dev/null && rm *_loader_*.bin
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
@@ -639,6 +640,7 @@ pack_trust_image()
 {
 	local mode=$1 files ini
 
+	ls trust*.img >/dev/null && rm trust*.img
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini

commit 4874919d228c76da877ba91248beff27a7d5baef
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Fri May 24 14:54:30 2019 +0800

    power: pmic: rk8xx: get the correct on/off source
    
    The on/off_source value has been changed,
    so we can't get the correct on/off source.
    
    Change-Id: I7c522574f5e8d3bbc3c5d73980cdccdb4717da52
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 1e5f45bfc0..f8c4f6166a 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -250,13 +250,10 @@ static int rk8xx_probe(struct udevice *dev)
 
 	printf("PMIC:  RK%x ", show_variant);
 
-	if (on_source && off_source) {
-		on_source = pmic_reg_read(dev, on_source);
-		off_source = pmic_reg_read(dev, off_source);
+	if (on_source && off_source)
 		printf("(on=0x%02x, off=0x%02x)",
 		       pmic_reg_read(dev, on_source),
 		       pmic_reg_read(dev, off_source));
-	}
 	printf("\n");
 
 	return 0;

commit cd60bf88a7eca235e4bb317d64f7cc839fa73dde
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue May 14 11:37:50 2019 +0800

    rkflash: add new spi nor flash
    
    MX25L51245G08G
    
    Change-Id: Ia4a2844d64102a1fead410f592b73892ae4870be
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 74f20a5798..b329a93d76 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -41,6 +41,8 @@ static struct flash_info spi_flash_tbl[] = {
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
 	/* EN25QH128A */
 	{0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
+	/* MX25L51245G08G */
+	{0xc2201a, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x10, 17, 6, 0},
 };
 
 static const u8 sfnor_dev_code[] = {

commit 3b47334dd77a3739d97e301d1c6203bbc8c0d87d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Jan 11 15:02:02 2019 +0800

    rockchip: px30: add support for video phy
    
    Sync the video phy related dts node from kernel.
    
    Change-Id: If9715bff0d129397cd3c3fc2597d34863d6e2dfb
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 55cd85cc80..b2ef14584f 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -302,6 +302,63 @@
 			compatible = "rockchip,px30-io-voltage-domain";
 			status = "disabled";
 		};
+
+		lvds: lvds {
+			compatible = "rockchip,px30-lvds";
+			phys = <&video_phy>;
+			phy-names = "phy";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					lvds_in_vopb: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vopb_out_lvds>;
+					};
+
+					lvds_in_vopl: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&vopl_out_lvds>;
+					};
+				};
+			};
+		};
+
+		rgb: rgb {
+			compatible = "rockchip,px30-rgb";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&lcdc_m0_rgb_pins>;
+			pinctrl-1 = <&lcdc_m0_sleep_pins>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					rgb_in_vopb: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&vopb_out_rgb>;
+					};
+
+					rgb_in_vopl: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&vopl_out_rgb>;
+					};
+				};
+			};
+		};
 	};
 
 	core_grf: syscon@ff148000 {
@@ -696,53 +753,21 @@
 		};
 	};
 
-	mipi_dphy: mipi-dphy@ff2e0000 {
-		compatible = "rockchip,px30-mipi-dphy";
-		reg = <0x0 0xff2e0000 0x0 0x10000>;
-		clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
-		clock-names = "ref", "pclk";
-		clock-output-names = "mipi_dphy_pll";
+	video_phy: video-phy@ff2e0000 {
+		compatible = "rockchip,px30-video-phy";
+		reg = <0x0 0xff2e0000 0x0 0x10000>,
+		      <0x0 0xff450000 0x0 0x10000>;
+		clocks = <&pmucru SCLK_MIPIDSIPHY_REF>,
+			 <&cru PCLK_MIPIDSIPHY>, <&cru PCLK_MIPI_DSI>;
+		clock-names = "ref", "pclk_phy", "pclk_host";
 		#clock-cells = <0>;
 		resets = <&cru SRST_MIPIDSIPHY_P>;
-		reset-names = "apb";
+		reset-names = "rst";
 		power-domains = <&power PX30_PD_VO>;
 		#phy-cells = <0>;
-		rockchip,grf = <&grf>;
 		status = "disabled";
 	};
 
-	lvds: lvds@ff2e0000 {
-		compatible = "rockchip,px30-lvds";
-		reg = <0x0 0xff2e0000 0x0 0x100>, <0x0 0xff2e0100 0x0 0x100>;
-		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
-		clocks = <&cru PCLK_MIPIDSIPHY>, <&cru PCLK_MIPI_DSI>;
-		clock-names = "pclk_lvds", "pclk_lvds_ctl";
-		power-domains = <&power PX30_PD_VO>;
-		rockchip,grf = <&grf>;
-		status = "disabled";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			port@0 {
-				reg = <0>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				lvds_in_vopl: endpoint@0 {
-					reg = <0>;
-					remote-endpoint = <&vopl_out_lvds>;
-				};
-
-				lvds_in_vopb: endpoint@1 {
-					reg = <1>;
-					remote-endpoint = <&vopb_out_lvds>;
-				};
-			};
-		};
-	};
-
 	usb20_otg: usb@ff300000 {
 		compatible = "rockchip,px30-usb", "rockchip,rk3066-usb",
 			     "snps,dwc2";
@@ -937,11 +962,11 @@
 		compatible = "rockchip,px30-mipi-dsi";
 		reg = <0x0 0xff450000 0x0 0x10000>;
 		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_MIPI_DSI>, <&mipi_dphy>;
+		clocks = <&cru PCLK_MIPI_DSI>, <&video_phy>;
 		clock-names = "pclk", "hs_clk";
 		resets = <&cru SRST_MIPIDSI_HOST_P>;
 		reset-names = "apb";
-		phys = <&mipi_dphy>;
+		phys = <&video_phy>;
 		phy-names = "mipi_dphy";
 		power-domains = <&power PX30_PD_VO>;
 		rockchip,grf = <&grf>;
@@ -950,7 +975,11 @@
 		status = "disabled";
 
 		ports {
-			port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
 				#address-cells = <1>;
 				#size-cells = <0>;
 
@@ -991,6 +1020,11 @@
 				reg = <1>;
 				remote-endpoint = <&dsi_in_vopb>;
 			};
+
+			vopb_out_rgb: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&rgb_in_vopb>;
+			};
 		};
 	};
 
@@ -1029,6 +1063,11 @@
 				reg = <1>;
 				remote-endpoint = <&dsi_in_vopl>;
 			};
+
+			vopl_out_rgb: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&rgb_in_vopl>;
+			};
 		};
 	};
 
@@ -1968,143 +2007,68 @@
 		};
 
 		lcdc {
-			lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
-				rockchip,pins =
-					<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
-				rockchip,pins =
-					<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
-				rockchip,pins =
-					<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb_m0_den_pin: lcdc-rgb-m0-den-pin {
-				rockchip,pins =
-					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			lcdc_rgb888_m0_data_pins: lcdc-rgb888-m0-data-pins {
-				rockchip,pins =
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
-					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
-					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
-					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
-					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
-					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
-					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
-					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
-			};
-
-			lcdc_rgb666_m0_data_pins: lcdc-rgb666-m0-data-pins {
-				rockchip,pins =
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
-					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
-					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
-			};
-
-			lcdc_rgb565_m0_data_pins: lcdc-rgb565-m0-data-pins {
-				rockchip,pins =
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
-					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
-					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
-			};
-
-			lcdc_rgb888_m1_data_pins: lcdc-rgb888-m1-data-pins {
-				rockchip,pins =
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
-					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
-					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
-					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
-					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
-					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
-			};
-
-			lcdc_rgb666_m1_data_pins: lcdc-rgb666-m1-data-pins {
-				rockchip,pins =
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
-					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
-					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
-			};
-
-			lcdc_rgb565_m1_data_pins: lcdc-rgb565-m1-data-pins {
-				rockchip,pins =
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
-					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
-					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
-					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
+			lcdc_m0_rgb_pins: lcdc-m0-rgb-pins {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */
+					<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */
+					<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */
+					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DEN */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D0 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D1 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D3 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D4 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D5 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D8 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D10 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D11 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */
+					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */
+					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */
+					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */
+					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */
+					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */
+					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D23 */
+			};
+
+			lcdc_m0_sleep_pins: lcdc-m0-sleep-pins {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */
+					<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */
+					<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */
+					<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */
+					<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */
+					<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */
+					<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */
+					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */
+					<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */
+					<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */
+					<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */
+					<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */
+					<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */
+					<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */
+					<3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */
+					<3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */
+					<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */
+					<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */
+					<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */
+					<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */
+					<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */
+					<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */
+					<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */
+					<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */
+					<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */
+					<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */
+					<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */
+					<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D23 */
 			};
 		};
 
diff --git a/arch/arm/dts/rk3326.dtsi b/arch/arm/dts/rk3326.dtsi
new file mode 100644
index 0000000000..a887a8490e
--- /dev/null
+++ b/arch/arm/dts/rk3326.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include "px30.dtsi"
+
+&rgb {
+	phys = <&video_phy>;
+	phy-names = "phy";
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&lcdc_m1_rgb_pins>;
+	pinctrl-1 = <&lcdc_m1_sleep_pins>;
+};
+
+&pinctrl {
+	lcdc {
+		lcdc_m1_rgb_pins: lcdc-m1-rgb-pins {
+			rockchip,pins =
+				<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */
+				<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D0 */
+				<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D2 */
+				<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D6 */
+				<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D7 */
+				<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D9 */
+				<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D12 */
+				<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D13 */
+				<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D14 */
+				<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D15 */
+				<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D16 */
+				<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D17 */
+				<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D18 */
+				<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D19 */
+				<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D20 */
+				<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D21 */
+				<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none_8ma>, /* LCDC_D22 */
+				<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none_8ma>; /* LCDC_D23 */
+		};
+
+		lcdc_m1_sleep_pins: lcdc-m1-sleep-pins {
+			rockchip,pins =
+				<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */
+				<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */
+				<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */
+				<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */
+				<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */
+				<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */
+				<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */
+				<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */
+				<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */
+				<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */
+				<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */
+				<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */
+				<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */
+				<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */
+				<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */
+				<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */
+				<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */
+				<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D23 */
+		};
+	};
+};

commit e2ce9fefd467d1b3cf44b3e37f3f138c191bf7fe
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Jan 11 15:30:58 2019 +0800

    rockchip: rk3128: add support for video phy
    
    Sync the video phy related dts node from kernel.
    
    Change-Id: I93ac2d1540934f2674702255f3f1c7913cc997d2
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 9bac7e40d8..7216c5defd 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -375,15 +375,20 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			vop_out_lvds: endpoint@1 {
-				reg = <1>;
+			vop_out_lvds: endpoint@0 {
+				reg = <0>;
 				remote-endpoint = <&lvds_in_vop>;
 			};
 
-			vop_out_dsi: endpoint@2 {
+			vop_out_dsi: endpoint@1 {
 				reg = <1>;
 				remote-endpoint = <&dsi_in_vop>;
 			};
+
+			vop_out_rgb: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&rgb_in_vop>;
+			};
 		};
 	};
 
@@ -391,11 +396,11 @@
 		compatible = "rockchip,rk3128-mipi-dsi";
 		reg = <0x10110000 0x4000>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&mipi_dphy>;
+		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&video_phy>;
 		clock-names = "pclk", "h2p", "hs_clk";
 		resets = <&cru SRST_VIO_MIPI_DSI>;
 		reset-names = "apb";
-		phys = <&mipi_dphy>;
+		phys = <&video_phy>;
 		phy-names = "mipi_dphy";
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
@@ -540,39 +545,19 @@
 		status = "disabled";
 	};
 
-	mipi_dphy: mipi-dphy@20038000 {
-		compatible = "rockchip,rk3128-mipi-dphy";
-		reg = <0x20038000 0x4000>;
-		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>, <&cru HCLK_VIO_H2P>;
-		clock-names = "ref", "pclk", "h2p";
-		clock-output-names = "mipi_dphy_pll";
+	video_phy: video-phy@20038000 {
+		compatible = "rockchip,rk3128-video-phy";
+		reg = <0x20038000 0x4000>, <0x10110000 0x4000>;
+		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>,
+			 <&cru PCLK_MIPI>;
+		clock-names = "ref", "pclk_phy", "pclk_host";
 		#clock-cells = <0>;
 		resets = <&cru SRST_MIPIPHY_P>;
-		reset-names = "apb";
+		reset-names = "rst";
 		#phy-cells = <0>;
 		status = "disabled";
 	};
 
-	lvds: lvds@20038000 {
-		compatible = "rockchip,rk3126-lvds";
-		reg = <0x20038000 0x4000>, <0x10110000 0x100>;
-		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
-		rockchip,grf = <&grf>;
-		status = "disabled";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			lvds_in: port@0 {
-				reg = <0>;
-				lvds_in_vop: endpoint {
-					remote-endpoint = <&vop_out_lvds>;
-				};
-			};
-		};
-	};
-
 	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
 		reg = <0x20072000 0x1000>;
@@ -638,6 +623,49 @@
 	grf: syscon@20008000 {
 		compatible = "rockchip,rk3128-grf", "syscon";
 		reg = <0x20008000 0x1000>;
+
+		lvds: lvds {
+			compatible = "rockchip,rk3126-lvds";
+			phys = <&video_phy>;
+			phy-names = "phy";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					lvds_in_vop: endpoint {
+						remote-endpoint = <&vop_out_lvds>;
+					};
+				};
+			};
+		};
+
+		rgb: rgb {
+			compatible = "rockchip,rk3128-rgb";
+			phys = <&video_phy>;
+			phy-names = "phy";
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&lcdc_rgb_pins>;
+			pinctrl-1 = <&lcdc_sleep_pins>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					rgb_in_vop: endpoint {
+						remote-endpoint = <&vop_out_rgb>;
+					};
+				};
+			};
+		};
 	};
 
 	pinctrl: pinctrl@20008000 {
@@ -772,6 +800,52 @@
 			};
 		};
 
+		lcdc {
+			lcdc_rgb_pins: lcdc-rgb-pins {
+				rockchip,pins =
+					<2 RK_PB0 1 &pcfg_pull_none>, /* LCDC_DCLK */
+					<2 RK_PB1 1 &pcfg_pull_none>, /* LCDC_HSYNC */
+					<2 RK_PB2 1 &pcfg_pull_none>, /* LCDC_VSYNC */
+					<2 RK_PB3 1 &pcfg_pull_none>, /* LCDC_DEN */
+					<2 RK_PB4 1 &pcfg_pull_none>, /* LCDC_DATA10 */
+					<2 RK_PB5 1 &pcfg_pull_none>, /* LCDC_DATA11 */
+					<2 RK_PB6 1 &pcfg_pull_none>, /* LCDC_DATA12 */
+					<2 RK_PB7 1 &pcfg_pull_none>, /* LCDC_DATA13 */
+					<2 RK_PC0 1 &pcfg_pull_none>, /* LCDC_DATA14 */
+					<2 RK_PC1 1 &pcfg_pull_none>, /* LCDC_DATA15 */
+					<2 RK_PC2 1 &pcfg_pull_none>, /* LCDC_DATA16 */
+					<2 RK_PC3 1 &pcfg_pull_none>, /* LCDC_DATA17 */
+					<2 RK_PC4 1 &pcfg_pull_none>, /* LCDC_DATA18 */
+					<2 RK_PC5 1 &pcfg_pull_none>, /* LCDC_DATA19 */
+					<2 RK_PC6 1 &pcfg_pull_none>, /* LCDC_DATA20 */
+					<2 RK_PC7 1 &pcfg_pull_none>, /* LCDC_DATA21 */
+					<2 RK_PD0 1 &pcfg_pull_none>, /* LCDC_DATA22 */
+					<2 RK_PD1 1 &pcfg_pull_none>; /* LCDC_DATA23 */
+			};
+
+			lcdc_sleep_pins: lcdc-sleep-pins {
+				rockchip,pins =
+					<2 RK_PB0 0 &pcfg_pull_none>, /* LCDC_DCLK */
+					<2 RK_PB1 0 &pcfg_pull_none>, /* LCDC_HSYNC */
+					<2 RK_PB2 0 &pcfg_pull_none>, /* LCDC_VSYNC */
+					<2 RK_PB3 0 &pcfg_pull_none>, /* LCDC_DEN */
+					<2 RK_PB4 0 &pcfg_pull_none>, /* LCDC_DATA10 */
+					<2 RK_PB5 0 &pcfg_pull_none>, /* LCDC_DATA11 */
+					<2 RK_PB6 0 &pcfg_pull_none>, /* LCDC_DATA12 */
+					<2 RK_PB7 0 &pcfg_pull_none>, /* LCDC_DATA13 */
+					<2 RK_PC0 0 &pcfg_pull_none>, /* LCDC_DATA14 */
+					<2 RK_PC1 0 &pcfg_pull_none>, /* LCDC_DATA15 */
+					<2 RK_PC2 0 &pcfg_pull_none>, /* LCDC_DATA16 */
+					<2 RK_PC3 0 &pcfg_pull_none>, /* LCDC_DATA17 */
+					<2 RK_PC4 0 &pcfg_pull_none>, /* LCDC_DATA18 */
+					<2 RK_PC5 0 &pcfg_pull_none>, /* LCDC_DATA19 */
+					<2 RK_PC6 0 &pcfg_pull_none>, /* LCDC_DATA20 */
+					<2 RK_PC7 0 &pcfg_pull_none>, /* LCDC_DATA21 */
+					<2 RK_PD0 0 &pcfg_pull_none>, /* LCDC_DATA22 */
+					<2 RK_PD1 0 &pcfg_pull_none>; /* LCDC_DATA23 */
+			};
+		};
+
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <2 RK_PD2 2 &pcfg_pull_default>,

commit 2ba7147f8008e675b31a0a5c13b8366431ea09ae
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 8 20:22:19 2019 +0800

    env: add a common env driver for block device
    
    The driver implementation refers to env/mmc.c, the storage media
    binding to block layer can use it(Nand/Nor Flash...).
    
    Support configure:
            - CONFIG_ENV_OFFSET
            - CONFIG_ENV_SIZE
            - CONFIG_ENV_OFFSET_REDUND (optional)
            - CONFIG_ENV_SIZE_REDUND (optional)
            - CONFIG_SYS_MMC_ENV_PART (optional)
    
    Change-Id: Ibb16f0dd7af1331f454784968fbdc9002f4b769c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 83d14eb794..f5e704e178 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -52,9 +52,10 @@ DECLARE_GLOBAL_DATA_PTR;
 	!defined(CONFIG_ENV_IS_IN_SPI_FLASH)	&& \
 	!defined(CONFIG_ENV_IS_IN_REMOTE)	&& \
 	!defined(CONFIG_ENV_IS_IN_UBI)		&& \
+	!defined(CONFIG_ENV_IS_IN_BLK_DEV)	&& \
 	!defined(CONFIG_ENV_IS_NOWHERE)
 # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|MMC|FAT|EXT4|\
-NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
+NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI|BLK_DEV} or CONFIG_ENV_IS_NOWHERE
 #endif
 
 /*
diff --git a/env/Kconfig b/env/Kconfig
index 9de5cae083..2a35c08090 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -358,6 +358,40 @@ config ENV_IS_IN_UBI
 	  You will probably want to define these to avoid a really noisy system
 	  when storing the env in UBI.
 
+config ENV_IS_IN_BLK_DEV
+	bool "Environment in a block device"
+	depends on !CHAIN_OF_TRUST && CONFIG_BLK
+	help
+	  Define this if you have an Block device which you want to use for the
+	  environment.
+
+	  - CONFIG_ENV_OFFSET:
+	  - CONFIG_ENV_SIZE:
+
+	  These two #defines specify the offset and size of the environment
+	  area within the specified Block device. These two values are in units
+	  of bytes, but must be aligned to an Block sector boundary.
+
+	  - CONFIG_ENV_OFFSET_REDUND (optional):
+
+	  Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
+	  hold a redundant copy of the environment data. This provides a
+	  valid backup copy in case the other copy is corrupted, e.g. due
+	  to a power failure during a "saveenv" operation. This is handled
+	  in the same way as CONFIG_ENV_OFFSET.
+
+	  - CONFIG_ENV_SIZE_REDUND (optional):
+
+	  This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
+	  set. If this value is set, it must be set to the same value as
+	  CONFIG_ENV_SIZE.
+
+	  - CONFIG_SYS_MMC_ENV_PART (optional):
+
+	  Specifies which MMC partition the environment is stored in. If not
+	  set, defaults to partition 0, the user area. Common values might be
+	  1 (first MMC boot partition), 2 (second MMC boot partition).
+
 endchoice
 
 config ENV_AES
diff --git a/env/Makefile b/env/Makefile
index 7ce8231d9a..1d5c6db355 100644
--- a/env/Makefile
+++ b/env/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_ENV_IS_IN_SATA) += sata.o
 obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += sf.o
 obj-$(CONFIG_ENV_IS_IN_REMOTE) += remote.o
 obj-$(CONFIG_ENV_IS_IN_UBI) += ubi.o
+obj-$(CONFIG_ENV_IS_IN_BLK_DEV) += env_blk.o
 obj-$(CONFIG_ENV_IS_NOWHERE) += nowhere.o
 endif
 
diff --git a/env/env.c b/env/env.c
index 76a5608628..73c00545df 100644
--- a/env/env.c
+++ b/env/env.c
@@ -46,6 +46,8 @@ static enum env_location env_get_default_location(void)
 		return ENVL_SPI_FLASH;
 	else if IS_ENABLED(CONFIG_ENV_IS_IN_UBI)
 		return ENVL_UBI;
+	else if IS_ENABLED(CONFIG_ENV_IS_IN_BLK_DEV)
+		return ENVL_BLK;
 	else if IS_ENABLED(CONFIG_ENV_IS_NOWHERE)
 		return ENVL_NOWHERE;
 	else
diff --git a/env/env_blk.c b/env/env_blk.c
new file mode 100644
index 0000000000..5289dbfaa7
--- /dev/null
+++ b/env/env_blk.c
@@ -0,0 +1,290 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <environment.h>
+#include <memalign.h>
+#include <boot_rkimg.h>
+
+#define __STR(X) #X
+#define STR(X) __STR(X)
+
+#if defined(CONFIG_ENV_SIZE_REDUND) &&  \
+	(CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
+#error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int get_env_addr(struct blk_desc *blk_desc, int copy, u32 *env_addr)
+{
+	s64 offset = CONFIG_ENV_OFFSET;
+
+#if defined(CONFIG_ENV_OFFSET_REDUND)
+	if (copy)
+		offset = CONFIG_ENV_OFFSET_REDUND;
+#endif
+	if (offset < 0)
+		return -EINVAL;
+
+	*env_addr = offset;
+
+	return 0;
+}
+
+int get_env_dev(void)
+{
+	return CONFIG_SYS_MMC_ENV_DEV;
+}
+
+#ifdef CONFIG_SYS_MMC_ENV_PART
+static unsigned char env_org_hwpart;
+
+int get_env_part(void)
+{
+	return CONFIG_SYS_MMC_ENV_PART;
+}
+
+static const char *init_blk_hwpart_for_env(struct blk_desc *blk_desc)
+{
+	enum if_type if_type;
+	const char *devtype;
+	int devnum, devpart, ret;
+
+	devtype = env_get("devtype");
+	devnum = env_get_ulong("devnum", 10, 0);
+	devpart = get_env_part();
+	if_type = if_typename_to_iftype(devtype);
+
+	env_org_hwpart = blk_desc->hwpart;
+	ret = blk_select_hwpart_devnum(if_type, devnum, devpart);
+	if (ret)
+		return "!Partition switch failed";
+
+	return NULL;
+}
+
+static void fini_blk_hwpart_for_env(void)
+{
+	enum if_type if_type;
+	const char *devtype;
+	int devnum;
+
+	devtype = env_get("devtype");
+	devnum = env_get_ulong("devnum", 10, 0);
+	if_type = if_typename_to_iftype(devtype);
+
+	blk_select_hwpart_devnum(if_type, devnum, env_org_hwpart);
+}
+#else
+static inline const char *init_blk_hwpart_for_env(struct blk_desc *blk_desc)
+{ return NULL; }
+static inline void fini_blk_hwpart_for_env(void) {}
+#endif
+
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_SPL_BUILD)
+static inline int write_env(struct blk_desc *blk_desc, unsigned long size,
+			    unsigned long offset, const void *buffer)
+{
+	uint blk_start, blk_cnt, n;
+
+	blk_start = ALIGN(offset, blk_desc->blksz) / blk_desc->blksz;
+	blk_cnt	  = ALIGN(size, blk_desc->blksz) / blk_desc->blksz;
+
+	n = blk_dwrite(blk_desc, blk_start, blk_cnt, (u_char *)buffer);
+
+	return (n == blk_cnt) ? 0 : -1;
+}
+
+static int env_blk_save(void)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1);
+	struct blk_desc *blk_desc;
+	const char *errmsg = NULL;
+	int ret, copy = 0;
+	u32 offset;
+
+	blk_desc = rockchip_get_bootdev();
+	if (!blk_desc) {
+		puts("Can't find bootdev\n");
+		return -EIO;
+	}
+
+	errmsg = init_blk_hwpart_for_env(blk_desc);
+	if (errmsg) {
+		puts(errmsg);
+		return -EIO;
+	}
+
+	ret = env_export(env_new);
+	if (ret)
+		goto fini;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+	if (gd->env_valid == ENV_VALID)
+		copy = 1;
+#endif
+
+	if (get_env_addr(blk_desc, copy, &offset)) {
+		ret = 1;
+		goto fini;
+	}
+
+	printf("Writing to %s%s(%s)... ", copy ? "redundant " : "",
+	       env_get("devtype"), env_get("devnum"));
+
+	if (write_env(blk_desc, CONFIG_ENV_SIZE, offset, (u_char *)env_new)) {
+		puts("failed\n");
+		ret = 1;
+		goto fini;
+	}
+
+	puts("done\n");
+	ret = 0;
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+	gd->env_valid = gd->env_valid == ENV_REDUND ? ENV_VALID : ENV_REDUND;
+#endif
+
+fini:
+	fini_blk_hwpart_for_env();
+
+	return ret;
+}
+#endif /* CONFIG_CMD_SAVEENV && !CONFIG_SPL_BUILD */
+
+static inline int read_env(struct blk_desc *blk_desc, unsigned long size,
+			   unsigned long offset, const void *buffer)
+{
+	uint blk_start, blk_cnt, n;
+
+	blk_start = ALIGN(offset, blk_desc->blksz) / blk_desc->blksz;
+	blk_cnt	  = ALIGN(size, blk_desc->blksz) / blk_desc->blksz;
+
+	n = blk_dread(blk_desc, blk_start, blk_cnt, (uchar *)buffer);
+
+	return (n == blk_cnt) ? 0 : -1;
+}
+
+#ifdef CONFIG_ENV_OFFSET_REDUND
+static int env_blk_load(void)
+{
+#if !defined(ENV_IS_EMBEDDED)
+	struct blk_desc *blk_desc;
+	const char *errmsg = NULL;
+	int read1_fail = 0, read2_fail = 0;
+	u32 offset1, offset2;
+	int ret;
+
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
+
+	blk_desc = rockchip_get_bootdev();
+	if (!blk_desc) {
+		puts("Can't find bootdev\n");
+		return -EIO;
+	}
+
+	errmsg = init_blk_hwpart_for_env(blk_desc);
+	if (errmsg) {
+		ret = -EIO;
+		goto err;
+	}
+
+	if (get_env_addr(blk_desc, 0, &offset1) ||
+	    get_env_addr(blk_desc, 1, &offset2)) {
+		ret = -EIO;
+		goto fini;
+	}
+
+	read1_fail = read_env(blk_desc, CONFIG_ENV_SIZE, offset1, tmp_env1);
+	read2_fail = read_env(blk_desc, CONFIG_ENV_SIZE, offset2, tmp_env2);
+
+	if (read1_fail && read2_fail)
+		puts("*** Error - No Valid Environment Area found\n");
+	else if (read1_fail || read2_fail)
+		puts("*** Warning - some problems detected "
+		     "reading environment; recovered successfully\n");
+
+	if (read1_fail && read2_fail) {
+		errmsg = "!bad CRC";
+		ret = -EIO;
+		goto fini;
+	} else if (!read1_fail && read2_fail) {
+		gd->env_valid = ENV_VALID;
+		env_import((char *)tmp_env1, 1);
+	} else if (read1_fail && !read2_fail) {
+		gd->env_valid = ENV_REDUND;
+		env_import((char *)tmp_env2, 1);
+	} else {
+		env_import_redund((char *)tmp_env1, (char *)tmp_env2);
+	}
+
+	ret = 0;
+
+fini:
+	fini_blk_hwpart_for_env();
+err:
+	if (ret)
+		set_default_env(errmsg);
+
+#endif
+	return ret;
+}
+#else /* ! CONFIG_ENV_OFFSET_REDUND */
+static int env_blk_load(void)
+{
+#if !defined(ENV_IS_EMBEDDED)
+	ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
+	struct blk_desc *blk_desc;
+	const char *errmsg = NULL;
+	u32 offset;
+	int ret;
+
+	blk_desc = rockchip_get_bootdev();
+	if (!blk_desc) {
+		puts("Can't find bootdev\n");
+		return -EIO;
+	}
+
+	errmsg = init_blk_hwpart_for_env(blk_desc);
+	if (errmsg) {
+		ret = -EIO;
+		puts(errmsg);
+		goto err;
+	}
+
+	if (get_env_addr(blk_desc, 0, &offset)) {
+		ret = -EIO;
+		goto fini;
+	}
+
+	if (read_env(blk_desc, CONFIG_ENV_SIZE, offset, buf)) {
+		errmsg = "!read failed";
+		ret = -EIO;
+		goto fini;
+	}
+
+	env_import(buf, 1);
+	ret = 0;
+
+fini:
+	fini_blk_hwpart_for_env();
+err:
+	if (ret)
+		set_default_env(errmsg);
+#endif
+	return ret;
+}
+#endif /* CONFIG_ENV_OFFSET_REDUND */
+
+U_BOOT_ENV_LOCATION(env_blk) = {
+	.location	= ENVL_BLK,
+	ENV_NAME("ENV_BLK")
+	.load		= env_blk_load,
+#ifndef CONFIG_SPL_BUILD
+	.save		= env_save_ptr(env_blk_save),
+#endif
+};
diff --git a/include/environment.h b/include/environment.h
index 7b98216389..e328ac22fb 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -210,6 +210,7 @@ enum env_location {
 	ENVL_SPI_FLASH,
 	ENVL_UBI,
 	ENVL_NOWHERE,
+	ENVL_BLK,
 
 	ENVL_COUNT,
 	ENVL_UNKNOWN,

commit 1712dc5c34857330f320e2ecf2cd52e59a4fb9d7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 8 20:22:35 2019 +0800

    dm: blk: export if_typename_to_iftype()
    
    Change-Id: I436d431f69051861e02699e0366701a27ab5a0da
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index b60a856daa..f258206e88 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -49,7 +49,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
-static enum if_type if_typename_to_iftype(const char *if_typename)
+enum if_type if_typename_to_iftype(const char *if_typename)
 {
 	int i;
 
diff --git a/include/blk.h b/include/blk.h
index 4eb79ed748..d1e82f574c 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -670,4 +670,12 @@ const char *blk_get_if_type_name(enum if_type if_type);
 int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 		   int *cur_devnump);
 
+/**
+ * if_typename_to_iftype() - get iftype according to iftype name
+ *
+ * @if_typename: iftype name
+ * @return iftype index
+ */
+enum if_type if_typename_to_iftype(const char *if_typename);
+
 #endif

commit e311da245800596d57b7b7d91ebd4a730747a9ec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 23 18:19:46 2019 +0800

    tools: rockchip: boot/trust_merger: add "--prepath" support
    
    Add prefix path of binary path.
    
    Change-Id: I576b9fa40f88a1ee0701f1ff776d25d4e3ed747b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index 923bdb75ba..f258f6c3c3 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -21,6 +21,7 @@ bool gDebug =
 options gOpts;
 char gLegacyPath[MAX_LINE_LEN] = { 0 };
 char gNewPath[MAX_LINE_LEN] = { 0 };
+static char *gPrePath;
 char gSubfix[MAX_LINE_LEN] = OUT_SUBFIX;
 char gEat[MAX_LINE_LEN];
 char *gConfigPath;
@@ -148,6 +149,10 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
+	} else if (gPrePath) {
+		strcpy(tmp, path);
+		strcpy(path, gPrePath);
+		strcat(path, tmp);
 	}
 }
 
@@ -976,6 +981,7 @@ static void printHelp(void)
 	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
 	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
 	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_PREPATH "\t\tAdd prefix path of binary path.\n");
 	printf("\t" OPT_SIZE
 	       "\t\tImage size.\"--size [image KB size]\", must be 512KB aligned\n");
 	printf("Usage2: boot_merger [options] [parameter]\n");
@@ -1021,6 +1027,9 @@ int main(int argc, char **argv)
 			snprintf(gLegacyPath, sizeof(gLegacyPath), "%s", argv[i]);
 			i++;
 			snprintf(gNewPath, sizeof(gNewPath), "%s", argv[i]);
+		} else if (!strcmp(OPT_PREPATH, argv[i])) {
+			i++;
+			gPrePath = argv[i];
 		} else if (!strcmp(OPT_SIZE, argv[i])) {
 			g_merge_max_size = strtoul(argv[++i], NULL, 10);
 			if (g_merge_max_size % 512) {
diff --git a/tools/rockchip/boot_merger.h b/tools/rockchip/boot_merger.h
index ef25a2236d..97586d7cba 100644
--- a/tools/rockchip/boot_merger.h
+++ b/tools/rockchip/boot_merger.h
@@ -186,6 +186,7 @@ typedef struct {
 #define OPT_UNPACK          "--unpack"
 #define OPT_SUBFIX          "--subfix"
 #define OPT_REPLACE         "--replace"
+#define OPT_PREPATH         "--prepath"
 #define OPT_SIZE	    "--size"
 
 #define OPT_CHIP	"-c"
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index 81e4da8a9b..a33125e224 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -51,6 +51,7 @@ static uint8_t gBuf[BL3X_FILESIZE_MAX];
 static bool gSubfix;
 static char *gLegacyPath;
 static char *gNewPath;
+static char *gPrePath;
 static uint8_t gRSAmode = RSA_SEL_2048;
 static uint8_t gSHAmode = SHA_SEL_256;
 static bool gIgnoreBL32;
@@ -109,6 +110,10 @@ static inline void fixPath(char *path)
 			strcpy(path, gNewPath);
 			strcat(path, tmp);
 		}
+	} else if (gPrePath) {
+		strcpy(tmp, path);
+		strcpy(path, gPrePath);
+		strcat(path, tmp);
 	}
 }
 
@@ -833,6 +838,7 @@ static void printHelp(void)
 	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
 	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
 	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_PREPATH "\t\tAdd prefix path of binary path.\n");
 	printf("\t" OPT_RSA "\t\t\tRSA mode.\"--rsa [mode]\", [mode] can be: "
 	       "0(none), 1(1024), 2(2048), 3(2048 pss).\n");
 	printf("\t" OPT_SHA
@@ -870,6 +876,9 @@ int main(int argc, char **argv)
 			gLegacyPath = argv[i];
 			i++;
 			gNewPath = argv[i];
+		} else if (!strcmp(OPT_PREPATH, argv[i])) {
+			i++;
+			gPrePath = argv[i];
 		} else if (!strcmp(OPT_RSA, argv[i])) {
 			i++;
 			if (!is_digit(*(argv[i]))) {
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
index 2a46e60dfc..e25683fdf3 100644
--- a/tools/rockchip/trust_merger.h
+++ b/tools/rockchip/trust_merger.h
@@ -44,6 +44,7 @@
 #define OPT_UNPACK          "--unpack"
 #define OPT_SUBFIX          "--subfix"
 #define OPT_REPLACE         "--replace"
+#define OPT_PREPATH         "--prepath"
 #define OPT_RSA		    "--rsa"
 #define OPT_SHA		    "--sha"
 #define OPT_SIZE	    "--size"

commit ab64d6564f35393221188e3c6b8d2ea129c16b48
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu May 23 10:41:05 2019 +0800

    configs: rk3399pro: enable CONFIG_CHARGER_BQ25700
    
    Change-Id: I14a521e391f124809403b9170b5b2055220d43e7
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index e37eeb8030..589e03ad00 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -84,6 +84,7 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK817=y
+CONFIG_CHARGER_BQ25700=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y

commit d19b8cd2ae304387e7a53319e817b11949fe40b8
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu May 16 09:19:59 2019 +0800

    power: charge: add bq25700 support
    
    Change-Id: I49c2e60ac94cea35e6a1e9ca1f713551a75e6265
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/Makefile b/Makefile
index 62ce8879e1..28e3e70001 100644
--- a/Makefile
+++ b/Makefile
@@ -674,7 +674,8 @@ libs-y += drivers/power/ \
 	drivers/power/battery/ \
 	drivers/power/regulator/ \
 	drivers/power/dvfs/ \
-	drivers/power/io-domain/
+	drivers/power/io-domain/ \
+	drivers/power/charge/
 libs-y += drivers/spi/
 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 7462ce3e6d..a57d9c8934 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -12,6 +12,8 @@ source "drivers/power/regulator/Kconfig"
 
 source "drivers/power/dvfs/Kconfig"
 
+source "drivers/power/charge/Kconfig"
+
 config DM_CHARGE_DISPLAY
 	bool "Enable driver model for charge display support"
 	depends on DM
diff --git a/drivers/power/charge/Kconfig b/drivers/power/charge/Kconfig
new file mode 100644
index 0000000000..d3ea8a66b3
--- /dev/null
+++ b/drivers/power/charge/Kconfig
@@ -0,0 +1,6 @@
+config CHARGER_BQ25700
+	bool "BQ25700 charger support"
+	depends on DM_FUEL_GAUGE
+	help
+	  This adds support for BQ25700 charger support.
+
diff --git a/drivers/power/charge/Makefile b/drivers/power/charge/Makefile
new file mode 100644
index 0000000000..0fc2e0eeef
--- /dev/null
+++ b/drivers/power/charge/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-$(CONFIG_CHARGER_BQ25700) += bq25700_charger.o
diff --git a/drivers/power/charge/bq25700_charger.c b/drivers/power/charge/bq25700_charger.c
new file mode 100644
index 0000000000..5b6ab4a7c2
--- /dev/null
+++ b/drivers/power/charge/bq25700_charger.c
@@ -0,0 +1,390 @@
+/*
+ * (C) Copyright 2019 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <dm/device.h>
+#include <power/fuel_gauge.h>
+#include <power/pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BQ25700_ID				0x25700
+#define BQ25703_ID				0x25703
+
+#define COMPAT_BQ25700				"ti,bq25700"
+#define COMPAT_BQ25703				"ti,bq25703"
+
+#define BQ25700_I2C_SPEED			100000
+#define BQ25700_CHARGE_CURRENT_1500MA		0x5C0
+#define BQ25700_SDP_INPUT_CURRENT_500MA		0xA00
+#define BQ25700_DCP_INPUT_CURRENT_1500MA	0x1E00
+#define BQ25700_DCP_INPUT_CURRENT_2000MA	0x2800
+#define BQ25700_DCP_INPUT_CURRENT_3000MA	0x3C00
+
+#define WATCHDOG_ENSABLE			(0x03 << 13)
+
+#define BQ25700_CHARGEOPTION0_REG		0x12
+#define BQ25700_CHARGECURREN_REG		0x14
+#define BQ25700_CHARGERSTAUS_REG		0x20
+#define BQ25700_INPUTVOLTAGE_REG		0x3D
+#define BQ25700_INPUTCURREN_REG			0x3F
+
+#define BQ25703_CHARGEOPTION0_REG		0x00
+#define BQ25703_CHARGECURREN_REG		0x02
+#define BQ25703_CHARGERSTAUS_REG		0x20
+#define BQ25703_INPUTVOLTAGE_REG		0x0A
+#define BQ25703_INPUTCURREN_REG			0x0E
+
+enum bq25700_table_ids {
+	/* range tables */
+	TBL_ICHG,
+	TBL_CHGMAX,
+	TBL_INPUTVOL,
+	TBL_INPUTCUR,
+	TBL_SYSVMIN,
+	TBL_OTGVOL,
+	TBL_OTGCUR,
+	TBL_EXTCON,
+};
+
+struct bq25700 {
+	struct udevice *dev;
+	struct gpio_desc typec0_enable_gpio;
+	struct gpio_desc typec1_enable_gpio;
+	u32 ichg;
+	u32 chip_id;
+};
+
+struct bq25700_range {
+	u32 min;
+	u32 max;
+	u32 step;
+};
+
+static int bq25700_read(struct bq25700 *charger, uint reg)
+{
+	u16 val;
+	int ret;
+
+	ret = dm_i2c_read(charger->dev, reg, (u8 *)&val, 2);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      charger->dev, reg);
+		return ret;
+	}
+
+	return val;
+}
+
+static int bq25700_write(struct bq25700 *charger, uint reg, u16 val)
+{
+	int ret;
+
+	ret = dm_i2c_write(charger->dev, reg, (u8 *)&val, 2);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      charger->dev, reg);
+		return ret;
+	}
+
+	return 0;
+}
+
+#if defined(CONFIG_POWER_FUSB302)
+static const union {
+	struct bq25700_range  rt;
+} bq25700_tables[] = {
+	/* range tables */
+	[TBL_ICHG] = { .rt = {0, 8128000, 64000} },
+	/* uV */
+	[TBL_CHGMAX] = { .rt = {0, 19200000, 16000} },
+	/* uV  max charge voltage*/
+	[TBL_INPUTVOL] = { .rt = {3200000, 19520000, 64000} },
+	/* uV  input charge voltage*/
+	[TBL_INPUTCUR] = {.rt = {0, 6350000, 50000} },
+	/*uA input current*/
+	[TBL_SYSVMIN] = { .rt = {1024000, 16182000, 256000} },
+	/* uV min system voltage*/
+	[TBL_OTGVOL] = {.rt = {4480000, 20800000, 64000} },
+	/*uV OTG volage*/
+	[TBL_OTGCUR] = {.rt = {0, 6350000, 50000} },
+};
+
+static u32 bq25700_find_idx(u32 value, enum bq25700_table_ids id)
+{
+	const struct bq25700_range *rtbl = &bq25700_tables[id].rt;
+	u32 rtbl_size;
+	u32 idx;
+
+	rtbl_size = (rtbl->max - rtbl->min) / rtbl->step + 1;
+
+	for (idx = 1;
+	     idx < rtbl_size && (idx * rtbl->step + rtbl->min <= value);
+	     idx++)
+		;
+
+	return idx - 1;
+}
+#endif
+
+static bool bq25700_charger_status(struct bq25700 *charger)
+{
+#if defined(CONFIG_POWER_FUSB302)
+	static u16 charge_flag;
+#endif
+	int state_of_charger;
+	u16 value;
+
+	value = bq25700_read(charger, BQ25700_CHARGERSTAUS_REG);
+	state_of_charger = value >> 15;
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (state_of_charger) {
+		charge_flag = 1;
+	} else if (!state_of_charger && charge_flag == 1) {
+		typec_discharge();
+		charge_flag = 0;
+	}
+#endif
+
+	return state_of_charger;
+}
+
+static bool bq25703_charger_status(struct bq25700 *charger)
+{
+#if defined(CONFIG_POWER_FUSB302)
+	static u16 charge_flag;
+#endif
+	int state_of_charger;
+	u16 value;
+
+	value = bq25700_read(charger, BQ25703_CHARGERSTAUS_REG);
+	state_of_charger = value >> 15;
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (state_of_charger) {
+		charge_flag = 1;
+	} else if (!state_of_charger && charge_flag == 1) {
+		typec_discharge();
+		charge_flag = 0;
+	}
+#endif
+
+	return state_of_charger;
+}
+
+static bool bq257xx_charger_status(struct udevice *dev)
+{
+	struct bq25700 *charger = dev_get_priv(dev);
+
+	if (charger->chip_id == BQ25700_ID)
+		return bq25700_charger_status(charger);
+	else
+		return bq25703_charger_status(charger);
+}
+
+static int bq25700_charger_capability(struct udevice *dev)
+{
+	return FG_CAP_CHARGER;
+}
+
+static int bq25700_get_usb_type(void)
+{
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+	return rockchip_chg_get_type();
+#else
+	return 0;
+#endif
+}
+
+static void bq25700_charger_current_init(struct bq25700 *charger)
+{
+	u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
+	u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
+	u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
+	u32 pd_inputcurrent = 0;
+#if defined(CONFIG_POWER_FUSB302)
+	u16 vol_idx, cur_idx, pd_inputvol;
+#endif
+	u16 temp;
+
+	temp = bq25700_read(charger, BQ25700_CHARGEOPTION0_REG);
+	temp &= (~WATCHDOG_ENSABLE);
+	bq25700_write(charger, BQ25700_CHARGEOPTION0_REG, temp);
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (!get_pd_output_val(&pd_inputvol, &pd_inputcurrent)) {
+		printf("%s pd charge input vol:%dmv current:%dma\n",
+		       __func__, pd_inputvol, pd_inputcurrent);
+		vol_idx = bq25700_find_idx((pd_inputvol - 1280) * 1000,
+					   TBL_INPUTVOL);
+		cur_idx = bq25700_find_idx(pd_inputcurrent * 1000,
+					   TBL_INPUTCUR);
+		cur_idx  = cur_idx << 8;
+		vol_idx = vol_idx << 6;
+		if (pd_inputcurrent != 0) {
+			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
+				      cur_idx);
+			bq25700_write(charger, BQ25700_INPUTVOLTAGE_REG,
+				      vol_idx);
+			charge_current = bq25700_find_idx(charger.ichg,
+							  TBL_ICHG);
+			charge_current = charge_current << 8;
+		}
+	}
+#endif
+
+	if (pd_inputcurrent == 0) {
+		if (bq25700_get_usb_type() > 1)
+			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
+				      dcp_inputcurrent);
+		else
+			bq25700_write(charger, BQ25700_INPUTCURREN_REG,
+				      sdp_inputcurrent);
+	}
+
+	if (bq25700_charger_status(charger))
+		bq25700_write(charger, BQ25700_CHARGECURREN_REG,
+			      charge_current);
+}
+
+static void bq25703_charger_current_init(struct bq25700 *charger)
+{
+	u16 charge_current = BQ25700_CHARGE_CURRENT_1500MA;
+	u16 sdp_inputcurrent = BQ25700_SDP_INPUT_CURRENT_500MA;
+	u16 dcp_inputcurrent = BQ25700_DCP_INPUT_CURRENT_1500MA;
+	u32 pd_inputcurrent = 0;
+#if defined(CONFIG_POWER_FUSB302)
+	u16 vol_idx, cur_idx, pd_inputvol;
+#endif
+	u16 temp;
+
+	temp = bq25700_read(charger, BQ25703_CHARGEOPTION0_REG);
+	temp &= (~WATCHDOG_ENSABLE);
+	bq25700_write(charger, BQ25703_CHARGEOPTION0_REG, temp);
+
+#if defined(CONFIG_POWER_FUSB302)
+	if (!get_pd_output_val(&pd_inputvol, &pd_inputcurrent)) {
+		printf("%s pd charge input vol:%dmv current:%dma\n",
+		       __func__, pd_inputvol, pd_inputcurrent);
+		vol_idx = bq25700_find_idx((pd_inputvol - 1280) * 1000,
+					   TBL_INPUTVOL);
+		cur_idx = bq25700_find_idx(pd_inputcurrent * 1000,
+					   TBL_INPUTCUR);
+		cur_idx  = cur_idx << 8;
+		vol_idx = vol_idx << 6;
+		if (pd_inputcurrent != 0) {
+			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
+				      cur_idx);
+			bq25700_write(charger, BQ25703_INPUTVOLTAGE_REG,
+				      vol_idx);
+			charge_current = bq25700_find_idx(charger.ichg,
+							  TBL_ICHG);
+			charge_current = charge_current << 8;
+		}
+	}
+#endif
+
+	if (pd_inputcurrent == 0) {
+		if (bq25700_get_usb_type() > 1)
+			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
+				      dcp_inputcurrent);
+		else
+			bq25700_write(charger, BQ25703_INPUTCURREN_REG,
+				      sdp_inputcurrent);
+	}
+
+	if (bq25703_charger_status(charger))
+		bq25700_write(charger, BQ25703_CHARGECURREN_REG,
+			      charge_current);
+}
+
+static int bq25700_ofdata_to_platdata(struct udevice *dev)
+{
+	struct bq25700 *charger = dev_get_priv(dev);
+	const void *blob = gd->fdt_blob;
+	int node, node1;
+#if defined(CONFIG_POWER_FUSB302)
+	int port_num;
+#endif
+
+	charger->dev = dev;
+
+	node = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25700);
+	node1 = fdt_node_offset_by_compatible(blob, 0, COMPAT_BQ25703);
+	if ((node < 0) && (node1 < 0)) {
+		printf("Can't find dts node for charger bq25700\n");
+		return -ENODEV;
+	}
+
+	if (node < 0) {
+		node = node1;
+		charger->chip_id = BQ25703_ID;
+	} else {
+		charger->chip_id = BQ25700_ID;
+	}
+
+	charger->ichg = fdtdec_get_int(blob, node, "ti,charge-current", 0);
+
+#if defined(CONFIG_POWER_FUSB302)
+	gpio_request_by_name(dev, "typec0-enable-gpios", 0,
+			     &charger.typec0_enable_gpio);
+	gpio_request_by_name(dev, "typec1-enable-gpios", 0,
+			     &charger.typec1_enable_gpio);
+
+	if (dm_gpio_is_valid(charger.typec1_enable_gpio.gpio) &&
+	    dm_gpio_is_valid(charger.typec0_enable_gpio.gpio)) {
+		port_num = get_pd_port_num();
+		if (port_num == 0) {
+			printf("fusb0 charge typec0:1 typec1:0\n");
+			dm_gpio_set_value(&charger.typec0_enable_gpio.gpio, 1);
+			dm_gpio_set_value(&charger.typec1_enable_gpio.gpio, 0);
+		} else if (port_num == 1) {
+			printf("fusb1 charge typec0:0 typec1:1\n");
+			dm_gpio_set_value(&charger.typec0_enable_gpio.gpio, 0);
+			dm_gpio_set_value(&charger.typec1_enable_gpio.gpio, 1);
+		}
+		udelay(1000 * 200);
+	}
+#endif
+
+	return 0;
+}
+
+static int bq25700_probe(struct udevice *dev)
+{
+	struct bq25700 *charger = dev_get_priv(dev);
+
+	if (charger->chip_id == BQ25700_ID)
+		bq25700_charger_current_init(charger);
+	else
+		bq25703_charger_current_init(charger);
+
+	return 0;
+}
+
+static const struct udevice_id charger_ids[] = {
+	{ .compatible = "ti,bq25700" },
+	{ .compatible = "ti,bq25703" },
+	{ },
+};
+
+static struct dm_fuel_gauge_ops charger_ops = {
+	.get_chrg_online = bq257xx_charger_status,
+	.capability = bq25700_charger_capability,
+};
+
+U_BOOT_DRIVER(bq25700_charger) = {
+	.name = "bq25700_charger",
+	.id = UCLASS_FG,
+	.probe = bq25700_probe,
+	.of_match = charger_ids,
+	.ops = &charger_ops,
+	.ofdata_to_platdata = bq25700_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct bq25700),
+};

commit 4d083e3f1920f6c8c8a6c575dcce6f057844a903
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 15 17:12:54 2019 +0800

    power: charge animation: add charger device support
    
    If a fuel gauge device doesn't have both charger and fuel gauge
    capabilities, try to find devices group to support that.
    
    Change-Id: I78d929e80e79bea304bb2b29f423c90ca12be16f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index b82a0f4d45..563ddf38e6 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -50,6 +50,7 @@ struct charge_image {
 struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
+	struct udevice *charger;
 	struct udevice *rtc;
 #ifdef CONFIG_LED
 	struct udevice *led_charging;
@@ -327,6 +328,16 @@ static int leds_update(struct udevice *dev, int soc)
 static int leds_update(struct udevice *dev, int soc) { return 0; }
 #endif
 
+static int fg_charger_get_chrg_online(struct udevice *dev)
+{
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	struct udevice *charger;
+
+	charger = priv->charger ? : priv->fg;
+
+	return fuel_gauge_get_chrg_online(charger);
+}
+
 static int charge_extrem_low_power(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -343,7 +354,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 
 	while (voltage < pdata->low_power_voltage + 50) {
 		/* Check charger online */
-		charging = fuel_gauge_get_chrg_online(fg);
+		charging = fg_charger_get_chrg_online(dev);
 		if (charging <= 0) {
 			printf("%s: Not charging, online=%d. Shutdown...\n",
 			       __func__, charging);
@@ -456,7 +467,7 @@ static int charge_animation_show(struct udevice *dev)
 #endif
 
 	/* Not charger online, exit */
-	charging = fuel_gauge_get_chrg_online(fg);
+	charging = fg_charger_get_chrg_online(dev);
 	if (charging <= 0) {
 		printf("Exit charge: due to charger offline\n");
 		return 0;
@@ -525,7 +536,7 @@ static int charge_animation_show(struct udevice *dev)
 		local_irq_disable();
 
 		/* Step1: Is charging now ? */
-		charging = fuel_gauge_get_chrg_online(fg);
+		charging = fg_charger_get_chrg_online(dev);
 		if (charging <= 0) {
 			printf("Not charging, online=%d. Shutdown...\n",
 			       charging);
@@ -755,6 +766,37 @@ show_images:
 	return 0;
 }
 
+static int fg_charger_get_device(struct udevice **fuel_gauge,
+				 struct udevice **charger)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret, cap;
+
+	*fuel_gauge = NULL,
+	*charger = NULL;
+
+	ret = uclass_get(UCLASS_FG, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_FG, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		cap = fuel_gauge_capability(dev);
+		if (cap == (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE)) {
+			*fuel_gauge = dev;
+			*charger = NULL;
+		} else if (cap == FG_CAP_FUEL_GAUGE) {
+			*fuel_gauge = dev;
+		} else if (cap == FG_CAP_CHARGER) {
+			*charger = dev;
+		}
+	}
+
+	return (*fuel_gauge) ? 0 : -ENODEV;
+}
+
 static const struct dm_charge_display_ops charge_animation_ops = {
 	.show = charge_animation_show,
 };
@@ -774,8 +816,8 @@ static int charge_animation_probe(struct udevice *dev)
 		return ret;
 	}
 
-	/* Get fuel gauge: used for charging */
-	ret = uclass_get_device(UCLASS_FG, 0, &priv->fg);
+	/* Get fuel gauge and charger(If need) */
+	ret = fg_charger_get_device(&priv->fg, &priv->charger);
 	if (ret) {
 		if (ret == -ENODEV)
 			debug("Can't find FG\n");

commit b3271e11e6b2f16e42258b62904911b457f08ffa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 15 17:10:30 2019 +0800

    power: fuel gauge: add capability callback
    
    Return "FG_CAP_FUEL_GAUGE | FG_CAP_CHARGER" as default value
    when there's not implementation, which compatibles with all fg drivers.
    
    Change-Id: Ie71e1271e504c63be42af41551e10e8c2c7d89ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index 8d7d400109..d766c57ee9 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -10,6 +10,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int fuel_gauge_capability(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->capability)
+		return (FG_CAP_CHARGER | FG_CAP_FUEL_GAUGE);
+
+	return ops->capability(dev);
+}
+
 int fuel_gauge_bat_is_exist(struct udevice *dev)
 {
 	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
index cf9ef8be7e..ee6c3e5f0e 100644
--- a/include/power/fuel_gauge.h
+++ b/include/power/fuel_gauge.h
@@ -7,7 +7,12 @@
 #ifndef _FUEL_GAUGE_H_
 #define _FUEL_GAUGE_H_
 
+/* Capability */
+#define FG_CAP_FUEL_GAUGE	BIT(0)
+#define FG_CAP_CHARGER		BIT(1)
+
 struct dm_fuel_gauge_ops {
+	int (*capability)(struct udevice *dev);
 	int (*bat_is_exist)(struct udevice *dev);
 	int (*get_soc)(struct udevice *dev);
 	int (*get_voltage)(struct udevice *dev);
@@ -15,6 +20,7 @@ struct dm_fuel_gauge_ops {
 	bool (*get_chrg_online)(struct udevice *dev);
 };
 
+int fuel_gauge_capability(struct udevice *dev);
 int fuel_gauge_bat_is_exist(struct udevice *dev);
 int fuel_gauge_get_soc(struct udevice *dev);
 int fuel_gauge_get_voltage(struct udevice *dev);

commit 69cce37bfc44a8a5950acbec99b4a795403335bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 09:37:28 2019 +0800

    make.sh: support "./make trust-all" command
    
    support parse "ADDR" and "OUTPUT" from *TOS.ini
    
    Change-Id: Ie98d858c832eecd7736cf3b4a020dfc91b10241c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index cad6f3ae4c..707b92cb27 100755
--- a/make.sh
+++ b/make.sh
@@ -78,7 +78,7 @@ help()
 	echo "	./make.sh [board|subcmd] [O=<dir>]"
 	echo
 	echo "	 - board: board name of defconfig"
-	echo "	 - subcmd: loader|loader-all|trust|uboot|elf|map|sym|<addr>|"
+	echo "	 - subcmd: loader|loader-all|trust|trust-all|uboot|elf|map|sym|<addr>|"
 	echo "	 - O=<dir>: assigned output directory"
 	echo
 	echo "Example:"
@@ -92,10 +92,11 @@ help()
 	echo "	After build, Images of uboot, loader and trust are all generated."
 	echo
 	echo "2. Pack helper:"
-	echo "	./make.sh trust                    --- pack trust.img"
 	echo "	./make.sh uboot                    --- pack uboot.img"
+	echo "	./make.sh trust                    --- pack trust.img"
+	echo "	./make.sh trust-all                --- pack trust img (all supported)"
 	echo "	./make.sh loader                   --- pack loader bin"
-	echo "	./make.sh loader-all	           --- pack loader bin (all supported loaders)"
+	echo "	./make.sh loader-all	           --- pack loader bin (all supported)"
 	echo
 	echo "3. Debug helper:"
 	echo "	./make.sh elf                      --- dump elf file with -D(default)"
@@ -119,7 +120,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|loader*|debug*|trust|uboot|map|sym)
+			''|elf*|loader*|debug*|trust*|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -159,7 +160,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|debug*|trust|uboot|map|sym)
+		''|elf*|loader*|debug*|trust*|uboot|map|sym)
 		;;
 
 		*)
@@ -261,7 +262,7 @@ sub_commands()
 		;;
 
 		trust)
-		pack_trust_image
+		pack_trust_image ${opt}
 		exit 0
 		;;
 
@@ -271,7 +272,7 @@ sub_commands()
 		;;
 
 		uboot)
-		pack_uboot_image
+		pack_uboot_image ${opt}
 		exit 0
 		;;
 
@@ -569,55 +570,99 @@ pack_loader_image()
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
 }
 
-pack_trust_image()
+__pack_32bit_trust_image()
 {
-	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+	local ini=$1 TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OUTPUT TEE_OFFSET
 
-	# ARM64 uses trust_merger
-	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
-			return
-		fi
+	if [ ! -f ${ini} ]; then
+		echo "pack trust failed! Can't find: ${ini}"
+		return
+	fi
 
-		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} \
-					${PACK_IGNORE_BL32} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+	# Parse orignal path
+	TOS=`sed -n "/TOS=/s/TOS=//p" ${ini} |tr -d '\r'`
+	TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${ini} |tr -d '\r'`
 
-		cd - && mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
-	# ARM uses loaderimage
+	# Parse address and output name
+	TEE_OUTPUT=`sed -n "/OUTPUT=/s/OUTPUT=//p" ${ini} |tr -d '\r'`
+	if [ "$TEE_OUTPUT" = "" ]; then
+		TEE_OUTPUT="./trust.img"
+	fi
+	TEE_OFFSET=`sed -n "/ADDR=/s/ADDR=//p" ${ini} |tr -d '\r'`
+	if [ "$TEE_OFFSET" = "" ]; then
+		TEE_OFFSET=0x8400000
+	fi
+
+	# OP-TEE is 132M(0x8400000) offset from DRAM base.
+	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+
+	# Convert Dec to Hex
+	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+
+	# Replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
+	TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
+	TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
+
+	if [ $TOS_TA ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+	elif [ $TOS ]; then
+		${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ${TEE_OUTPUT} ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
-			return
-		fi
+		echo "Can't find any tee bin"
+		exit 1
+	fi
 
-		# OP-TEE is 132M(0x8400000) offset from DRAM base.
-		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+	echo "pack trust okay! Input: ${ini}"
+	echo
+}
+
+__pack_64bit_trust_image()
+{
+	local ini=$1
+
+	if [ ! -f ${ini} ]; then
+		echo "pack trust failed! Can't find: ${ini}"
+		return
+	fi
 
-		# Convert Dec to Hex
-		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+	cd ${RKBIN}
+	${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} \
+				${PACK_IGNORE_BL32} ${ini}
 
-		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
+	cd - && mv ${RKBIN}/trust*.img ./
+	echo "pack trust okay! Input: ${ini}"
+	echo
+}
 
-		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
-		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
-		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
+pack_trust_image()
+{
+	local mode=$1 files ini
 
-		if [ $TOS_TA ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-		elif [ $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+	# ARM64 uses trust_merger
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		if [ "${mode}" = 'all' ]; then
+			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST*.ini`
+			for ini in $files
+			do
+				__pack_64bit_trust_image ${ini}
+			done
 		else
-			echo "Can't find any tee bin"
-			exit 1
+			__pack_64bit_trust_image ${ini}
+		fi
+	# ARM uses loaderimage
+	else
+		ini=${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini
+		if [ "${mode}" = 'all' ]; then
+			files=`ls ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS*.ini`
+			for ini in $files
+			do
+				__pack_32bit_trust_image ${ini}
+			done
+		else
+			__pack_32bit_trust_image ${ini}
 		fi
-
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
 	fi
 }
 

commit cd2acdbee7741e3cc01f738000598ec23cd5008a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:43:58 2019 +0800

    rockchip: rk3128: add firmware load address for small ram board
    
    - Since avb use sysmem alloc, we can decrease malloc size;
    - The typical request is 128M ram board;
    
    Note: trust.img should be placed in low memory address.
    
    Change-Id: Iba6564710b130d26fdf6b4edfd013b1352216250
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index aaa2d22684..414c51b9c5 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -52,6 +52,13 @@
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 
+#define ENV_MEM_LAYOUT_SETTINGS1 \
+	"scriptaddr1=0x60500000\0" \
+	"pxefile_addr1_r=0x60600000\0" \
+	"fdt_addr1_r=0x61700000\0" \
+	"kernel_addr1_r=0x62008000\0" \
+	"ramdisk_addr1_r=0x63000000\0"
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60500000\0" \
 	"pxefile_addr_r=0x60600000\0" \
@@ -62,6 +69,7 @@
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS1 \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \

commit 4dfe920a3abf50af23960fc89ab78782a071ecdc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:42:10 2019 +0800

    rockchip: board: add firmware load address env fixup
    
    Sometimes, we need to adjust fimware load address accroding
    to board ram size, so we define another group of load address
    to override the orignal group.
    
    Change-Id: Ic23629d05db822111d7a270eec0b316df7865b86
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 378598a344..4137b6998e 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -214,15 +214,34 @@ int init_kernel_dtb(void)
 
 void board_env_fixup(void)
 {
-	ulong kernel_addr_r;
-
-	if (gd->flags & GD_FLG_BL32_ENABLED)
-		return;
+	char *addr_r;
+#ifdef ENV_MEM_LAYOUT_SETTINGS1
+	const char *env_addr0[] = {
+		"scriptaddr", "pxefile_addr_r",
+		"fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r",
+	};
+	const char *env_addr1[] = {
+		"scriptaddr1", "pxefile_addr1_r",
+		"fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r",
+	};
+	int i;
 
+	/* 128M is a typical ram size for most platform, so as default here */
+	if (gd->ram_size <= SZ_128M) {
+		/* Replace orignal xxx_addr_r */
+		for (i = 0; i < ARRAY_SIZE(env_addr1); i++) {
+			addr_r = env_get(env_addr1[i]);
+			if (addr_r)
+				env_set(env_addr0[i], addr_r);
+		}
+	}
+#endif
 	/* If bl32 is disabled, maybe kernel can be load to lower address. */
-	kernel_addr_r = env_get_ulong("kernel_addr_no_bl32_r", 16, -1);
-	if (kernel_addr_r != -1)
-		env_set_hex("kernel_addr_r", kernel_addr_r);
+	if (!(gd->flags & GD_FLG_BL32_ENABLED)) {
+		addr_r = env_get("kernel_addr_no_bl32_r");
+		if (addr_r)
+			env_set("kernel_addr_r", addr_r);
+	}
 }
 
 static void early_bootrom_download(void)

commit 503a892f5a3eec2c981d9247e68efcfb94321d13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:39:19 2019 +0800

    common: android: avb support load android image separate
    
    Skip fdt and ramdisk relocation to save boot time.
    
    Change-Id: I56fd2fca97fa7795024aa542f0a45d0512be01d4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 4083ac7507..bf029fa319 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -659,9 +659,14 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		load_address -= hdr->page_size;
 		*android_load_address = load_address;
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+		android_image_load_separate(hdr, NULL,
+					    (void *)load_address, hdr);
+#else
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
+#endif
 	} else {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
@@ -951,17 +956,6 @@ static int load_android_image(struct blk_desc *dev_desc,
 	return 0;
 }
 
-static bool avb_enabled;
-void android_avb_set_enabled(bool enable)
-{
-	avb_enabled = enable;
-}
-
-bool android_avb_is_enabled(void)
-{
-	return avb_enabled;
-}
-
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -1100,7 +1094,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	if (vboot_flag) {
 		printf("SecureBoot enabled, AVB verify\n");
-		android_avb_set_enabled(true);
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;
@@ -1113,13 +1106,11 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			printf("SecureBoot disabled, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
-			android_avb_set_enabled(false);
 			if (load_android_image(dev_desc, boot_partname,
 					       slot_suffix, &load_address))
 				return -1;
 		} else {
 			printf("SecureBoot enabled, AVB verify\n");
-			android_avb_set_enabled(true);
 			if (android_slot_verify(boot_partname, &load_address,
 						slot_suffix))
 				return -1;
diff --git a/common/image-android.c b/common/image-android.c
index 67cc083916..4e1e185b27 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -194,37 +194,28 @@ ulong android_image_get_kload(const struct andr_img_hdr *hdr)
 int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len)
 {
-	bool avb_enabled = false;
-
-#ifdef CONFIG_ANDROID_BOOTLOADER
-	avb_enabled = android_avb_is_enabled();
-#endif
-
 	if (!hdr->ramdisk_size) {
 		*rd_data = *rd_len = 0;
 		return -1;
 	}
 
-	/*
-	 * We have load ramdisk at "ramdisk_addr_r" when android avb is
-	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled.
-	 */
-	if (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE)) {
-		ulong ramdisk_addr_r;
-
-		ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-		if (!ramdisk_addr_r) {
-			printf("No Found Ramdisk Load Address.\n");
-			return -1;
-		}
+	/* We have load ramdisk at "ramdisk_addr_r" */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+	ulong ramdisk_addr_r;
 
-		*rd_data = ramdisk_addr_r;
-	} else {
-		*rd_data = (unsigned long)hdr;
-		*rd_data += hdr->page_size;
-		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	if (!ramdisk_addr_r) {
+		printf("No Found Ramdisk Load Address.\n");
+		return -1;
 	}
 
+	*rd_data = ramdisk_addr_r;
+#else
+	*rd_data = (unsigned long)hdr;
+	*rd_data += hdr->page_size;
+	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+#endif
+
 	*rd_len = hdr->ramdisk_size;
 
 	printf("RAM disk load addr 0x%08lx size %u KiB\n",
@@ -236,40 +227,30 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 int android_image_get_fdt(const struct andr_img_hdr *hdr,
 			      ulong *rd_data)
 {
-	bool avb_enabled = false;
-
-#ifdef CONFIG_ANDROID_BOOTLOADER
-	avb_enabled = android_avb_is_enabled();
-#endif
-
 	if (!hdr->second_size) {
 		*rd_data = 0;
 		return -1;
 	}
 
-	/*
-	 * We have load fdt at "fdt_addr_r" when android avb is
-	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled;
-	 * or CONFIG_USING_KERNEL_DTB is enabled.
-	 */
-	if (IS_ENABLED(CONFIG_USING_KERNEL_DTB) ||
-	    (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE))) {
-		ulong fdt_addr_r;
-
-		fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-		if (!fdt_addr_r) {
-			printf("No Found FDT Load Address.\n");
-			return -1;
-		}
+	/* We have load fdt at "fdt_addr_r" */
+#if defined(CONFIG_USING_KERNEL_DTB) || \
+    defined(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE)
+	ulong fdt_addr_r;
 
-		*rd_data = fdt_addr_r;
-	} else {
-		*rd_data = (unsigned long)hdr;
-		*rd_data += hdr->page_size;
-		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-		*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr_r) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
 	}
 
+	*rd_data = fdt_addr_r;
+#else
+	*rd_data = (unsigned long)hdr;
+	*rd_data += hdr->page_size;
+	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+#endif
+
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 
@@ -277,53 +258,70 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 }
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-static int android_image_load_separate(struct blk_desc *dev_desc,
-				       struct andr_img_hdr *hdr,
-				       const disk_partition_t *part,
-				       void *android_load_address)
+int android_image_load_separate(struct andr_img_hdr *hdr,
+				const disk_partition_t *part,
+				void *load_address, void *ram_src)
 {
+	struct blk_desc *dev_desc = rockchip_get_bootdev();
 	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	char *fdt_high = env_get("fdt_high");
+	char *ramdisk_high = env_get("initrd_high");
 	ulong blk_start, blk_cnt, size;
 	int ret, blk_read = 0;
+	ulong start;
 
 	if (hdr->kernel_size) {
 		size = hdr->kernel_size + hdr->page_size;
-		blk_start = part->start;
 		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_KERNEL,
-				       (phys_addr_t)android_load_address,
+				       (phys_addr_t)load_address,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
 
-		ret = blk_dread(dev_desc, blk_start,
-				blk_cnt, android_load_address);
-		if (ret != blk_cnt) {
-			debug("%s: read kernel failed, ret=%d\n",
-			      __func__, ret);
-			return -1;
+		if (ram_src) {
+			start = (ulong)ram_src;
+			memcpy((char *)load_address,
+			       (char *)start, hdr->kernel_size);
+		} else {
+			blk_start = part->start;
+			ret = blk_dread(dev_desc, blk_start,
+					blk_cnt, load_address);
+			if (ret != blk_cnt) {
+				debug("%s: read kernel failed, ret=%d\n",
+				      __func__, ret);
+				return -1;
+			}
+			blk_read += ret;
 		}
-		blk_read += ret;
 	}
 
 	if (hdr->ramdisk_size) {
 		ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
 
 		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
-		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_RAMDISK,
 				       ramdisk_addr_r,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
-
-		ret = blk_dread(dev_desc, blk_start,
-				blk_cnt, (void *)ramdisk_addr_r);
-		if (ret != blk_cnt) {
-			debug("%s: read ramdisk failed, ret=%d\n",
-			      __func__, ret);
-			return -1;
+		if (ram_src) {
+			start = (unsigned long)ram_src;
+			start += hdr->page_size;
+			start += ALIGN(hdr->kernel_size, hdr->page_size);
+			memcpy((char *)ramdisk_addr_r,
+			       (char *)start, hdr->ramdisk_size);
+		} else {
+			blk_start = part->start +
+				DIV_ROUND_UP(size, dev_desc->blksz);
+			ret = blk_dread(dev_desc, blk_start,
+					blk_cnt, (void *)ramdisk_addr_r);
+			if (ret != blk_cnt) {
+				debug("%s: read ramdisk failed, ret=%d\n",
+				      __func__, ret);
+				return -1;
+			}
+			blk_read += ret;
 		}
-		blk_read += ret;
 	}
 
 	if ((gd->fdt_blob != (void *)fdt_addr_r) && hdr->second_size) {
@@ -345,7 +343,6 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		size = hdr->page_size +
 		       ALIGN(hdr->kernel_size, hdr->page_size) +
 		       ALIGN(hdr->ramdisk_size, hdr->page_size);
-		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_FDT_AOSP,
 				       fdt_addr_r,
@@ -353,16 +350,42 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 				       CONFIG_SYS_FDT_PAD))
 			return -ENXIO;
 
-		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
-		if (ret != blk_cnt) {
-			debug("%s: read dtb failed, ret=%d\n", __func__, ret);
-			return -1;
-		}
+		if (ram_src) {
+			start = (unsigned long)ram_src;
+			start += hdr->page_size;
+			start += ALIGN(hdr->kernel_size, hdr->page_size);
+			start += ALIGN(hdr->ramdisk_size, hdr->page_size);
+			memcpy((char *)fdt_addr_r,
+			       (char *)start, hdr->second_size);
+		} else {
+			blk_start = part->start +
+					DIV_ROUND_UP(size, dev_desc->blksz);
+			ret = blk_dread(dev_desc, blk_start, blk_cnt,
+					(void *)fdt_addr_r);
+			if (ret != blk_cnt) {
+				debug("%s: read dtb failed, ret=%d\n",
+				      __func__, ret);
+				return -1;
+			}
 
-		blk_read += blk_cnt;
+			blk_read += blk_cnt;
+		}
 #endif /* CONFIG_RKIMG_BOOTLOADER */
 	}
 
+	if (blk_read > 0 || ram_src) {
+		if (!fdt_high) {
+			env_set_hex("fdt_high", -1UL);
+			printf("Fdt ");
+		}
+		if (!ramdisk_high) {
+			env_set_hex("initrd_high", -1UL);
+			printf("Ramdisk ");
+		}
+		if (!fdt_high || !ramdisk_high)
+			printf("skip relocation\n");
+	}
+
 	return blk_read;
 }
 #endif /* CONFIG_ANDROID_BOOT_IMAGE_SEPARATE */
@@ -451,36 +474,17 @@ long android_image_load(struct blk_desc *dev_desc,
 			      blk_cnt, load_address);
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-			if (!android_avb_is_enabled()) {
-				char *fdt_high = env_get("fdt_high");
-				char *ramdisk_high = env_get("initrd_high");
-
-				blk_read =
-				android_image_load_separate(dev_desc, hdr,
-							    part_info, buf);
-				if (blk_read > 0) {
-					if (!fdt_high) {
-						env_set_hex("fdt_high", -1UL);
-						printf("Fdt ");
-					}
-					if (!ramdisk_high) {
-						env_set_hex("initrd_high", -1UL);
-						printf("Ramdisk ");
-					}
-					if (!fdt_high || !ramdisk_high)
-						printf("skip relocation\n");
-				}
-			} else
+			blk_read =
+			android_image_load_separate(hdr, part_info, buf, NULL);
+#else
+			if (!sysmem_alloc_base(MEMBLK_ID_ANDROID,
+					       (phys_addr_t)buf,
+						blk_cnt * part_info->blksz))
+				return -ENXIO;
+
+			blk_read = blk_dread(dev_desc, part_info->start,
+					     blk_cnt, buf);
 #endif
-			{
-				if (!sysmem_alloc_base(MEMBLK_ID_ANDROID,
-						       (phys_addr_t)buf,
-							blk_cnt * part_info->blksz))
-					return -ENXIO;
-
-				blk_read = blk_dread(dev_desc, part_info->start,
-						     blk_cnt, buf);
-			}
 		}
 
 		/*
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index c591390434..15498b7fe3 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -94,10 +94,4 @@ char *android_str_append(char *base_name, char *slot_suffix);
  */
 int android_fdt_overlay_apply(void *fdt_addr);
 
-/** android_avb_is_enabled- get avb enable state.
- * *
- * @return true on enabled, otherwise disabled;
- */
-bool android_avb_is_enabled(void);
-
 #endif  /* __ANDROID_BOOTLOADER_H */
diff --git a/include/image.h b/include/image.h
index 11c65292ba..975cc572e3 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1274,6 +1274,20 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
+/** android_image_load_separate - Load an Android Image separate from storage or ram
+ *
+ * Load an Android Image based on the header size in the storage or ram.
+ *
+ * @hdr:		The android image header
+ * @part:		The partition where to read the image from
+ * @load_address:	The address where the image will be loaded
+ * @ram_src:		The ram source to load, if NULL load from partition
+ * @return the blk count.
+ */
+int android_image_load_separate(struct andr_img_hdr *hdr,
+				const disk_partition_t *part,
+				void *load_address, void *ram_src);
+
 /** android_image_load - Load an Android Image from storage.
  *
  * Load an Android Image based on the header size in the storage.

commit 89151b4aadb381865c9dc02832b1775904ca2d8f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:50:30 2019 +0800

    lib: avb: use sysmem alloc to load image
    
    Using malloc buffer to load image makes CONFIG_SYS_MALLOC_LEN must be
    large enough, sysmem alloc is a better way.
    
    Change-Id: I24e2b86c53b8d3307c0d155fc37cb499c321e1c6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
index 3fd45c929c..76abc178d4 100644
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -21,7 +21,8 @@
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  * SOFTWARE.
  */
-
+#include <common.h>
+#include <sysmem.h>
 #include <android_avb/avb_slot_verify.h>
 #include <android_avb/avb_chain_partition_descriptor.h>
 #include <android_avb/avb_cmdline.h>
@@ -107,7 +108,7 @@ static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
 
   /* Allocate and copy the partition. */
   if (!*out_image_preloaded) {
-    *out_image_buf = avb_malloc(image_size);
+    *out_image_buf = sysmem_alloc(MEMBLK_ID_AVB_ANDROID, image_size);
     if (*out_image_buf == NULL) {
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     }
@@ -369,7 +370,7 @@ out:
 
 fail:
   if (image_buf != NULL && !image_preloaded) {
-    avb_free(image_buf);
+    sysmem_free((phys_addr_t)image_buf);
   }
   return ret;
 }
@@ -449,7 +450,7 @@ static AvbSlotVerifyResult load_requested_partitions(
 out:
   /* Free the current buffer if any. */
   if (image_buf != NULL && !image_preloaded) {
-    avb_free(image_buf);
+    sysmem_free((phys_addr_t)image_buf);
   }
   /* Buffers that are already saved in slot_data will be handled by the caller
    * even on failure. */
@@ -1295,7 +1296,7 @@ void avb_slot_verify_data_free(AvbSlotVerifyData* data) {
         avb_free(loaded_partition->partition_name);
       }
       if (loaded_partition->data != NULL && !loaded_partition->preloaded) {
-        avb_free(loaded_partition->data);
+        sysmem_free((phys_addr_t)loaded_partition->data);
       }
     }
     avb_free(data->loaded_partitions);

commit 6184121cdc2fc45e350eb406a78dbf685f281d2e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 29 17:06:34 2019 +0800

    arm: add spl relocation support for armv8
    
    Relocate spl itself to a high memory.
    
    Change-Id: Ia69f05449a0a8e4f07cc6d37a2486c3cd2aa7176
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 42a1d9c490..bd83fcab71 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -105,6 +105,12 @@ endif
 # needed for relocation
 LDFLAGS_u-boot += -pie
 
+ifndef CONFIG_SPL_SKIP_RELOCATE
+LDFLAGS_u-boot-spl = -pie
+else
+SPL_LDFLAGS_u-boot-spl =
+endif
+
 #
 # FIXME: binutils versions < 2.22 have a bug in the assembler where
 # branches to weak symbols can be incorrectly optimized in thumb mode
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 3336c1e0fd..57e6d11006 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -35,7 +35,11 @@ _start:
 
 .globl	_TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD)
+	.quad   CONFIG_SPL_TEXT_BASE
+#else
 	.quad	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the linker script.
diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds
index 0d1b0c4993..c6579b50be 100644
--- a/arch/arm/cpu/armv8/u-boot-spl.lds
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -54,6 +54,23 @@ SECTIONS
 		*(.__end)
 	} >.sram
 
+#ifndef CONFIG_SPL_SKIP_RELOCATE
+	. = ALIGN(8);
+
+	.rel_dyn_start :
+	{
+		*(.__rel_dyn_start)
+	} >.sram
+
+	.rela.dyn : {
+		*(.rela*)
+	} >.sram
+
+	.rel_dyn_end :
+	{
+		*(.__rel_dyn_end)
+	} >.sram
+#endif
 	_image_binary_end = .;
 
 	.bss_start (NOLOAD) : {
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index d4b5f29eb1..1cba844c5f 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -23,7 +23,7 @@ else
 obj-y   += setjmp.o
 endif
 
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_TPL_BUILD
 ifdef CONFIG_ARM64
 obj-y	+= relocate_64.o
 else
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index fad7f518c6..c29ba899c7 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -106,7 +106,8 @@ ENTRY(_main)
 	mov	x0, #0
 	bl	board_init_f
 
-#if !defined(CONFIG_SPL_BUILD)
+#if (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && !defined(CONFIG_SPL_SKIP_RELOCATE)) || \
+	!defined(CONFIG_SPL_BUILD)
 /*
  * Set up intermediate environment (new sp and gd) and call
  * relocate_code(addr_moni). Trick here is that we'll return

commit dced428b74cb752ec4fc63933e1f1470e54bd881
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 29 17:04:47 2019 +0800

    spl: add relocation support
    
    Some times we want to relocate spl code to dram after dram
    initialization or relocate spl code to a high memory to avoid
    code overide.
    
    For example on Rockchip armv8 platform, we run with boot flow
    TPL->SPL->ATF->U-Boot.
    
    TPL run in sram and is responsible for dram initialization.
    SPL run from the start address of dram and is responsible for
    loading ATF and U-Boot.
    
    The case here is that the ATF load address is from 64KB of dram,
    which overlaps with spl code itself.
    
    So we want to relocate spl itself to high memory to aovid this.
    
    Change-Id: Ifcae4444c04fa1208406b51196cf8737277ace90
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 42203591d0..e3fae4b806 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -125,6 +125,19 @@ config SPL_DISPLAY_PRINT
 	  banner ("U-Boot SPL ..."). This function should be provided by
 	  the board.
 
+config SPL_SKIP_RELOCATE
+	bool "Skip code relocation in SPL"
+	default y
+	help
+	  The SPL code will be relocated to a high memory if you say no here.
+	  Only ARM64 and PowerPC SPL support relocate now.
+
+config SPL_RELOC_TEXT_BASE
+	hex "Address the SPL relocate to"
+	depends on !SPL_SKIP_RELOCATE
+	help
+	  The address on the ram where the SPL relocate to.
+
 config SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
 	bool "MMC raw mode: by sector"
 	default y if ARCH_SUNXI || ARCH_DAVINCI || ARCH_UNIPHIER ||ARCH_MX6 || \
diff --git a/common/spl/spl.c b/common/spl/spl.c
index ec6ac69819..982d7fe35c 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <spl.h>
+#include <asm/sections.h>
 #include <asm/u-boot.h>
 #include <nand.h>
 #include <fat.h>
@@ -258,6 +259,28 @@ static int spl_common_init(bool setup_malloc)
 	return 0;
 }
 
+#if !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD)
+static void spl_setup_relocate(void)
+{
+	gd->relocaddr = CONFIG_SPL_RELOC_TEXT_BASE;
+	gd->new_gd = (gd_t *)gd;
+	gd->start_addr_sp = gd->relocaddr;
+	gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
+
+	gd->start_addr_sp -= gd->fdt_size;
+	gd->new_fdt = (void *)gd->start_addr_sp;
+	memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
+	gd->fdt_blob = gd->new_fdt;
+
+	gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
+}
+#else
+static void spl_setup_relocate(void)
+{
+
+}
+#endif
+
 void spl_set_bd(void)
 {
 	if (!gd->bd)
@@ -273,6 +296,8 @@ int spl_early_init(void)
 		return ret;
 	gd->flags |= GD_FLG_SPL_EARLY_INIT;
 
+	spl_setup_relocate();
+
 	return 0;
 }
 
@@ -359,6 +384,34 @@ static int boot_from_devices(struct spl_image_info *spl_image,
 	return -ENODEV;
 }
 
+#if defined(CONFIG_DM) && !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD)
+static int spl_initr_dm(void)
+{
+	int ret;
+
+	/* Save the pre-reloc driver model and start a new one */
+	gd->dm_root_f = gd->dm_root;
+	gd->dm_root = NULL;
+	bootstage_start(BOOTSTATE_ID_ACCUM_DM_R, "dm_r");
+	ret = dm_init_and_scan(false);
+	bootstage_accum(BOOTSTATE_ID_ACCUM_DM_R);
+	if (ret)
+		return ret;
+
+#if defined(CONFIG_TIMER)
+	gd->timer = NULL;
+#endif
+	serial_init();
+
+	return 0;
+}
+#else
+static int spl_initr_dm(void)
+{
+	return 0;
+}
+#endif
+
 void board_init_r(gd_t *dummy1, ulong dummy2)
 {
 	u32 spl_boot_list[] = {
@@ -372,6 +425,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 
 	debug(">>spl:board_init_r()\n");
 
+	spl_initr_dm();
+
 	spl_set_bd();
 
 #ifdef CONFIG_SPL_OS_BOOT

commit 01714a2c060dbad1027faaf1a63028a79d2ed1fd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 26 17:22:08 2019 +0800

    rockchip: rk3308: set several master IP that can be secure access
    
    Include CRYPTO SDMMC EMMC NAND SFC USB.
    
    Change-Id: I1da1423bbefb45af3c2fad1b848bc7df0729512f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 8b4f939885..245ee56b5e 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -38,6 +38,7 @@ struct mm_region *mem_map = rk3308_mem_map;
 #endif
 
 #define GRF_BASE	0xff000000
+#define SGRF_BASE	0xff2b0000
 
 enum {
 
@@ -139,3 +140,15 @@ void board_debug_uart_init(void)
 		     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |
 		     GPIO4D3_UART2_TX_M1 << GPIO4D3_SHIFT);
 }
+
+#if defined(CONFIG_SPL_BUILD)
+int arch_cpu_init(void)
+{
+	static struct rk3308_sgrf * const sgrf = (void *)SGRF_BASE;
+
+	/* Set CRYPTO SDMMC EMMC NAND SFC USB master bus to be secure access */
+	rk_clrreg(&sgrf->con_secure0, 0x2b83);
+
+	return 0;
+}
+#endif

commit 3a10ef3901e3d78fc7308021448bc220d179cea7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 26 17:13:30 2019 +0800

    arm: rockchip: add RK3308 SGRF registers support
    
    Change-Id: I04340035cf8c372ae9f30424871da3810c70c56b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index 7e8e3a62f8..f0f1bb541d 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -173,4 +173,20 @@ struct rk3308_grf {
 	unsigned int chip_id;
 };
 check_member(rk3308_grf, gpio0a_p, 0xa0);
+
+struct rk3308_sgrf {
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int con_tzma_r0size;
+	unsigned int con_secure0;
+	unsigned int reserved0;
+	unsigned int clk_timer_en;
+	unsigned int clkgat_con;
+	unsigned int fastboot_addr;
+	unsigned int fastboot_en;
+	unsigned int reserved1[(0x30 - 0x24) / 4];
+	unsigned int srst_con;
+};
+check_member(rk3308_sgrf, fastboot_en, 0x20);
+
 #endif

commit f6b2f1e3cd08bba458a3d700840edad5d6977ecd
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Jan 24 15:33:35 2019 +0800

    common: write keybox: write Playready SL3000 root key to secure storage
    
    Change-Id: Ia202f7f81c7c618e7d6fc8ecb28ceb8a65157a1c
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    (cherry picked from commit 75d7f9972ba6d2aa0291785471d214c92807cd61)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 9d522be6e5..d3a70b5f64 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -16,6 +16,7 @@
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
 #define	ATTESTATION_TAG	"ATTE"
+#define PLAYREADY30_TAG	"SL30"
 
 uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      TEEC_UUID uuid,
@@ -149,7 +150,23 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write attestation key to secure storage fail\n");
 		}
+	} else if (memcmp(received_data, PLAYREADY30_TAG, 4) == 0) {
+		/* PlayReady SL3000 root key */
+		uint32_t ret;
+
+		data_size = *(received_data + 4);
+		ret = write_to_keymaster((uint8_t *)"PlayReady_SL3000",
+					 sizeof("PlayReady_SL3000"),
+					 received_data + 8, data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write PlayReady SL3000 root key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write PlayReady SL3000 root key to secure storage fail\n");
+		}
 	}
+
 	/* write all data to secure storage for readback check */
 	if (!rc) {
 		uint32_t ret;

commit 164b2a3361a7c1d8b31a43e87c265daad4bdd738
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 17 12:00:52 2019 +0800

    rockchip: smccc: psci_system_suspend() effects by CONFIG_ARM_CPU_SUSPEND
    
    Change-Id: I6ecc1c4db8232782af369e8e29b78a2c0cb13783
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 2b88a86934..8785666816 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -137,6 +137,7 @@ struct arm_smccc_res sip_smc_get_sip_version(void);
  */
 int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
 
+#ifdef CONFIG_ARM_CPU_SUSPEND
 /*
  * psci_system_suspend() - Standard ARM PSCI system suspend call.
  *
@@ -145,5 +146,6 @@ int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
  * @return 0 on success, otherwise failed.
  */
 int psci_system_suspend(unsigned long unused);
+#endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index a39e5b2830..815ad5e015 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -41,6 +41,7 @@ int psci_cpu_on(unsigned long cpuid, unsigned long entry_point)
 	return res.a0;
 }
 
+#ifdef CONFIG_ARM_CPU_SUSPEND
 int psci_system_suspend(unsigned long unused)
 {
 	struct arm_smccc_res res;
@@ -49,6 +50,7 @@ int psci_system_suspend(unsigned long unused)
 				  virt_to_phys(cpu_resume), 0, 0);
 	return res.a0;
 }
+#endif
 
 int sip_smc_set_suspend_mode(unsigned long ctrl,
 			     unsigned long config1,

commit 3415d4ebcdab59eb5a39caff19003307532974cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 17 11:14:51 2019 +0800

    power: charge animation: select CONFIG_ARM_CPU_SUSPEND
    
    Change-Id: I0c901e17b9da18d87f8dd7da776254a20c47ee11
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 608df55cca..7462ce3e6d 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -82,6 +82,7 @@ endchoice
 config CHARGE_ANIMATION
 	bool "Enable charge animation"
 	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
+	select ARM_CPU_SUSPEND
 	help
 	  This adds a simple function for charge animation display.
 
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index b1a814e02b..b82a0f4d45 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -170,7 +170,7 @@ static int check_key_press(struct udevice *dev)
  * If not enable CONFIG_IRQ, cpu can't suspend to ATF or wfi, so that wakeup
  * period timer is useless.
  */
-#ifndef CONFIG_IRQ
+#if !defined(CONFIG_IRQ) || !defined(CONFIG_ARM_CPU_SUSPEND)
 static int system_suspend_enter(struct udevice *dev)
 {
 	return 0;

commit ff294bc6d1de6dc409baee2690a1a7da5f92127e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 17 11:09:38 2019 +0800

    arm: armv7/8: add CONFIG_ARM_CPU_SUSPEND definition
    
    Make it as a optional choice.
    
    Change-Id: I87c5d8ce863eb64f3922fb4124e1f4a6aaf79257
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b8cd54762d..8e2d2a017e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -218,6 +218,13 @@ config ARM_SMCCC
 	  This should be enabled if U-Boot needs to communicate with system
 	  firmware (for example, PSCI) according to SMCCC.
 
+config ARM_CPU_SUSPEND
+	bool "Support for ARM cpu suspend and resume"
+	depends on CPU_V7 || ARM64
+	help
+	  Say Y here if you want to enable ARM cpu suspend/resume which allows
+	  to poweroff cpu power supply.
+
 config SEMIHOSTING
 	bool "support boot from semihosting"
 	help
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index aca89142f0..48cbfbf8c0 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,11 +12,6 @@ obj-y	+= cache_v7.o cache_v7_asm.o
 obj-y	+= cpu.o cp15.o
 obj-y	+= syslib.o
 
-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
-obj-y	+= suspend.o
-obj-y	+= sleep.o
-endif
-
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y	+= lowlevel_init.o
 endif
@@ -25,6 +20,10 @@ obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
 obj-$(CONFIG_ARMV7_NONSEC)	+= nonsec_virt.o virt-v7.o virt-dt.o
 obj-$(CONFIG_ARMV7_PSCI)	+= psci.o psci-common.o
 
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ARM_CPU_SUSPEND)	+= suspend.o sleep.o
+endif
+
 obj-$(CONFIG_IPROC) += iproc-common/
 obj-$(CONFIG_KONA) += kona-common/
 obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index b8c31aead8..c200dc28b8 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -19,13 +19,12 @@ obj-y	+= transition.o
 obj-y	+= fwcall.o
 obj-y	+= cpu-dt.o
 
+obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
+
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
-obj-y	+= ../armv7/suspend.o
-obj-y	+= sleep.o
+obj-$(CONFIG_ARM_CPU_SUSPEND)	+= ../armv7/suspend.o sleep.o
 endif
 
-obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
-
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
 endif

commit a3d0083590b3424673b016b7377c48c5b6aeb530
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 13 10:45:50 2019 +0800

    crypto: add rockchip crypto v1 driver
    
    Crypto v1 driver implements algorithm MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048
    for the platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
    
    Change-Id: Ib3e16c365dd130ad2d5ab9008f8db4252cbd2834
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index a3a8db66a9..3cc4106db8 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_DM_CRYPTO)		+= crypto-uclass.o
 obj-$(CONFIG_EXYNOS_ACE_SHA)	+= ace_sha.o
 obj-y += rsa_mod_exp/
 obj-y += fsl/
+obj-y += rockchip/
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
index 40b332e41d..6cb003b417 100644
--- a/drivers/crypto/rockchip/Kconfig
+++ b/drivers/crypto/rockchip/Kconfig
@@ -1,5 +1,8 @@
-config CRYPTO_ROCKCHIP
-	bool "Support Rockchip Hardware Crypto"
+config ROCKCHIP_CRYPTO_V1
+	bool "Enable rockchip crypto v1 support"
+	depends on DM_CRYPTO && (ROCKCHIP_RK3399 || ROCKCHIP_RK3368 || \
+				 ROCKCHIP_RK3328 || ROCKCHIP_RK3229 || \
+				 ROCKCHIP_RK3288 || ROCKCHIP_RK3128)
 	help
-	  The module supports Rockchip Hardware Crypto.
-	  This accelerates algorithmic operations.
\ No newline at end of file
+	  This enable MD5/SHA1/SHA256/RSA512/RSA1024/RSA2048 algorithm support for
+	  rockchip crypto v1 on platforms: rk3399/rk3368/rk3328/rk3229/rk3288/rk3128.
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
index bb1557984d..f9ba12f967 100644
--- a/drivers/crypto/rockchip/Makefile
+++ b/drivers/crypto/rockchip/Makefile
@@ -4,5 +4,4 @@
 #  Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
 #
 
-obj-y += rockchip_crypto_hd.o
-obj-y += rockchip_crypto.o
+obj-$(CONFIG_ROCKCHIP_CRYPTO_V1) += crypto_v1.o
diff --git a/drivers/crypto/rockchip/crypto_v1.c b/drivers/crypto/rockchip/crypto_v1.c
new file mode 100644
index 0000000000..de9ef078a2
--- /dev/null
+++ b/drivers/crypto/rockchip/crypto_v1.c
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <crypto.h>
+#include <dm.h>
+#include <rockchip/crypto_v1.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/clock.h>
+
+#define CRYPTO_V1_DEFAULT_RATE		100000000
+
+struct rockchip_crypto_priv {
+	struct rk_crypto_reg *reg;
+	struct clk clk;
+	u32 frequency;
+	char *clocks;
+	u32 nclocks;
+	u32 length;
+};
+
+static u32 rockchip_crypto_capability(struct udevice *dev)
+{
+	return CRYPTO_MD5 |
+	       CRYPTO_SHA1 |
+	       CRYPTO_SHA256 |
+	       CRYPTO_RSA512 |
+	       CRYPTO_RSA1024 |
+	       CRYPTO_RSA2048;
+}
+
+static int rockchip_crypto_sha_init(struct udevice *dev, sha_context *ctx)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+	u32 val;
+
+	if (!ctx || !ctx->length)
+		return -EINVAL;
+
+	priv->length = 0;
+	writel(ctx->length, &reg->crypto_hash_msg_len);
+	if (ctx->algo == CRYPTO_SHA256) {
+		/* Set SHA256 mode and out byte swap */
+		writel(HASH_SWAP_DO | ENGINE_SELECTION_SHA256,
+		       &reg->crypto_hash_ctrl);
+
+		val = readl(&reg->crypto_conf);
+		val &= ~BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+	} else if (ctx->algo == CRYPTO_SHA1) {
+		/* Set SHA160 input byte swap */
+		val = readl(&reg->crypto_conf);
+		val |= BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+
+		/* Set SHA160 mode and out byte swap */
+		writel(HASH_SWAP_DO, &reg->crypto_hash_ctrl);
+	} else if (ctx->algo == CRYPTO_MD5) {
+		/* Set MD5 input byte swap */
+		val = readl(&reg->crypto_conf);
+		val |= BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+
+		/* Set MD5 mode and out byte swap */
+		writel(HASH_SWAP_DO | ENGINE_SELECTION_MD5,
+		       &reg->crypto_hash_ctrl);
+	} else {
+		return -EINVAL;
+	}
+
+	rk_setreg(&reg->crypto_ctrl, HASH_FLUSH);
+	do {} while (readl(&reg->crypto_ctrl) & HASH_FLUSH);
+
+	/* SHA256 needs input byte swap */
+	if (ctx->algo == CRYPTO_SHA256) {
+		val = readl(&reg->crypto_conf);
+		val |= BYTESWAP_HRFIFO;
+		writel(val, &reg->crypto_conf);
+	}
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_update(struct udevice *dev,
+				      u32 *input, u32 len)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+
+	if (!len)
+		return -EINVAL;
+
+	priv->length += len;
+
+	/* Must flush dcache before crypto DMA fetch data region */
+	flush_cache((unsigned long)input, len);
+
+	/* Wait last complete */
+	do {} while (readl(&reg->crypto_ctrl) & HASH_START);
+
+	/* Hash Done Interrupt */
+	writel(HASH_DONE_INT, &reg->crypto_intsts);
+
+	/* Set data base and length */
+	writel((u32)(ulong)input, &reg->crypto_hrdmas);
+	writel((len + 3) >> 2, &reg->crypto_hrdmal);
+
+	/* Write 1 to start. When finishes, the core will clear it */
+	rk_setreg(&reg->crypto_ctrl, HASH_START);
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_final(struct udevice *dev,
+				     sha_context *ctx, u8 *output)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+	u32 *buf = (u32 *)output;
+	u32 nbits;
+	int i;
+
+	if (priv->length != ctx->length) {
+		printf("%s: Err: update total length(0x%x) is not equal "
+		       "to init total length(0x%x)!\n",
+		       __func__, priv->length, ctx->length);
+		return -EIO;
+	}
+
+	/* Wait last complete */
+	do {} while (readl(&reg->crypto_ctrl) & HASH_START);
+
+	/* It is high when finish, and it will not be low until it restart */
+	do {} while (!readl(&reg->crypto_hash_sts));
+
+	/* Read hash data, per-data 32-bit */
+	nbits = crypto_algo_nbits(ctx->algo);
+	for (i = 0; i < BYTE2WORD(nbits); i++)
+		buf[i] = readl(&reg->crypto_hash_dout[i]);
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_verify(struct udevice *dev, rsa_key *ctx,
+				      u8 *sign, u8 *output)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	struct rk_crypto_reg *reg = priv->reg;
+	u32 nbits, *buf = (u32 *)output;
+	int i, value;
+
+	if (!ctx)
+		return -EINVAL;
+
+	if (ctx->algo == CRYPTO_RSA512)
+		value = PKA_BLOCK_SIZE_512;
+	else if (ctx->algo == CRYPTO_RSA1024)
+		value = PKA_BLOCK_SIZE_1024;
+	else if (ctx->algo == CRYPTO_RSA2048)
+		value = PKA_BLOCK_SIZE_2048;
+	else
+		return -EINVAL;
+
+	/* Specify the nbits of N in PKA calculation */
+	writel(value, &reg->crypto_pka_ctrl);
+
+	/* Flush SHA and RSA */
+	rk_setreg(&reg->crypto_ctrl, PKA_HASH_CTRL);
+	writel(0xffffffff, &reg->crypto_intsts);
+	do {} while (readl(&reg->crypto_ctrl) & PKA_CTRL);
+
+	/* Clean PKA done interrupt */
+	writel(PKA_DONE_INT, &reg->crypto_intsts);
+
+	/* Set m/n/e/c */
+	nbits = crypto_algo_nbits(ctx->algo);
+	memcpy((void *)&reg->crypto_pka_m, (void *)sign,   BITS2BYTE(nbits));
+	memcpy((void *)&reg->crypto_pka_n, (void *)ctx->n, BITS2BYTE(nbits));
+	memcpy((void *)&reg->crypto_pka_e, (void *)ctx->e, BITS2BYTE(nbits));
+	memcpy((void *)&reg->crypto_pka_c, (void *)ctx->c, BITS2BYTE(nbits));
+	do {} while (readl(&reg->crypto_ctrl) & PKA_START);
+
+	/* Start PKA */
+	rk_setreg(&reg->crypto_ctrl, PKA_START);
+
+	/* Wait PKA done */
+	do {} while (readl(&reg->crypto_ctrl) & PKA_START);
+
+	/* Read hash data, per-data 32-bit */
+	for (i = 0; i < BITS2WORD(nbits); i++)
+		buf[i] = readl(&reg->crypto_pka_m[i]);
+
+	return 0;
+}
+
+static const struct dm_crypto_ops rockchip_crypto_ops = {
+	.capability = rockchip_crypto_capability,
+	.sha_init   = rockchip_crypto_sha_init,
+	.sha_update = rockchip_crypto_sha_update,
+	.sha_final  = rockchip_crypto_sha_final,
+	.rsa_verify = rockchip_crypto_rsa_verify,
+};
+
+/*
+ * Only use "clocks" to parse crypto clock id and use rockchip_get_clk().
+ * Because we always add crypto node in U-Boot dts, when kernel dtb enabled :
+ *
+ *   1. There is cru phandle mismatch between U-Boot and kernel dtb;
+ *   2. CONFIG_OF_SPL_REMOVE_PROPS removes clock property;
+ */
+static int rockchip_crypto_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int len;
+
+	if (!dev_read_prop(dev, "clocks", &len)) {
+		printf("Can't find \"clocks\" property\n");
+		return -EINVAL;
+	}
+
+	priv->clocks = malloc(len);
+	if (!priv->clocks)
+		return -ENOMEM;
+
+	priv->nclocks = len / sizeof(u32);
+	if (dev_read_u32_array(dev, "clocks", (u32 *)priv->clocks,
+			       priv->nclocks)) {
+		printf("Can't read \"clocks\" property\n");
+		return -EINVAL;
+	}
+
+	priv->reg = dev_read_addr_ptr(dev);
+	priv->frequency = dev_read_u32_default(dev, "clock-frequency",
+					       CRYPTO_V1_DEFAULT_RATE);
+
+	return 0;
+}
+
+static int rockchip_crypto_probe(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	u32 *clocks;
+	int i, ret;
+
+	ret = rockchip_get_clk(&priv->clk.dev);
+	if (ret) {
+		printf("Failed to get clk device, ret=%d\n", ret);
+		return ret;
+	}
+
+	clocks = (u32 *)priv->clocks;
+	for (i = 1; i < priv->nclocks; i += 2) {
+		priv->clk.id = clocks[i];
+		ret = clk_set_rate(&priv->clk, priv->frequency);
+		if (ret < 0) {
+			printf("%s: Failed to set clk(%ld): ret=%d\n",
+			       __func__, priv->clk.id, ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_crypto_ids[] = {
+	{ .compatible = "rockchip,rk3399-crypto" },
+	{ .compatible = "rockchip,rk3368-crypto" },
+	{ .compatible = "rockchip,rk3328-crypto" },
+	{ .compatible = "rockchip,rk3288-crypto" },
+	{ .compatible = "rockchip,rk322x-crypto" },
+	{ .compatible = "rockchip,rk312x-crypto" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_crypto_v1) = {
+	.name		= "rockchip_crypto_v1",
+	.id		= UCLASS_CRYPTO,
+	.of_match	= rockchip_crypto_ids,
+	.ops		= &rockchip_crypto_ops,
+	.probe		= rockchip_crypto_probe,
+	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
+};
diff --git a/drivers/crypto/rockchip/rockchip_crypto.c b/drivers/crypto/rockchip/rockchip_crypto.c
deleted file mode 100644
index 208d3619e0..0000000000
--- a/drivers/crypto/rockchip/rockchip_crypto.c
+++ /dev/null
@@ -1,120 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-#include <config.h>
-#include <common.h>
-#include <dm.h>
-#include <dm/device-internal.h>
-#include <errno.h>
-#include <rockchip_crypto/rockchip_crypto_hd.h>
-#include <rockchip_crypto/rockchip_crypto.h>
-
-int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc)
-{
-	int ret;
-
-	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto",
-					&crypto_desc->dev);
-	if (ret) {
-		printf("%s: Can not get crypto dev.\n", __func__);
-		return ret;
-	}
-
-	crypto_desc->ops = crypto_get_ops(crypto_desc->dev);
-
-	return 0;
-}
-
-int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
-		       int hash_bits)
-{
-	return rk_crypto->ops->sha_init(rk_crypto->dev, msg_len, msg_len);
-}
-
-int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en)
-{
-	return rk_crypto->ops->sha_byte_swap(rk_crypto->dev, en);
-}
-
-int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
-			u32 data_len)
-{
-	return rk_crypto->ops->sha_start(rk_crypto->dev, data, data_len);
-}
-
-int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result)
-{
-	return rk_crypto->ops->sha_end(rk_crypto->dev, result);
-}
-
-int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash)
-{
-	int ret;
-	u32 data_hash[8];
-
-	ret = rk_crypto_sha_end(rk_crypto, data_hash);
-	if (ret)
-		return -1;
-
-	return memcmp(in_hash, data_hash, 32);
-}
-
-int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto)
-{
-	return rk_crypto->ops->rsa_init(rk_crypto->dev);
-}
-
-int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto,
-			u32 *m, u32 *n, u32 *e, u32 *c)
-{
-	return rk_crypto->ops->rsa_start(rk_crypto->dev, m, n, e, c);
-}
-
-int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result)
-{
-	return rk_crypto->ops->rsa_end(rk_crypto->dev, result);
-}
-
-int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto)
-{
-	u32 datahash[8];
-	u32 rsa_result[8];
-	int ret = 0;
-
-	ret = rk_crypto_sha_end(rk_crypto, datahash);
-	if (ret)
-		return ret;
-
-	ret = rk_crypto_rsa_end(rk_crypto, rsa_result);
-	if (ret)
-		return ret;
-
-	return memcmp(rsa_result, datahash, 32);
-}
-
-int rk_crypto_probe(void)
-{
-	int ret;
-	struct udevice *dev;
-
-	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto", &dev);
-	if (ret) {
-		printf("%s: Can not get crypto dev.\n", __func__);
-		return -1;
-	}
-
-	ret = device_probe(dev);
-	if (ret) {
-		printf("%s: Crypto probe error.\n", __func__);
-		return -1;
-	}
-
-	return 0;
-}
-
-UCLASS_DRIVER(crypto) = {
-	.id		= UCLASS_RKCRYPTO,
-	.name		= "crypto",
-};
diff --git a/drivers/crypto/rockchip/rockchip_crypto_hd.c b/drivers/crypto/rockchip/rockchip_crypto_hd.c
deleted file mode 100644
index d765411bbc..0000000000
--- a/drivers/crypto/rockchip/rockchip_crypto_hd.c
+++ /dev/null
@@ -1,196 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- */
-
-#include <common.h>
-#include <bouncebuf.h>
-#include <clk.h>
-#include <dm.h>
-#include <dt-structs.h>
-#include <errno.h>
-#include <linux/errno.h>
-#include <asm/arch/hardware.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <rockchip_crypto/rockchip_crypto_hd.h>
-#include <rockchip_crypto/rockchip_crypto.h>
-
-struct rockchip_crypto_plat {
-	fdt_addr_t base;
-	s32 frequency;
-};
-
-struct rockchip_crypto_priv {
-	volatile struct rk_crypto_reg *regbase;
-	struct clk clk;
-	unsigned int max_freq;
-};
-
-static int rockchip_crypto_ofdata_to_platdata(struct udevice *bus)
-{
-	struct rockchip_crypto_plat *plat = dev_get_platdata(bus);
-	struct rockchip_crypto_priv *priv = dev_get_priv(bus);
-	int ret = 0;
-
-	plat->base = dev_read_u32_default(bus, "default-addr", 0);
-	debug("Crypto base address is %x\n", (int)(size_t)plat->base);
-	ret = clk_get_by_index(bus, 0, &priv->clk);
-	if (ret < 0) {
-		printf("Could not get clock for %s: %d\n", bus->name, ret);
-		return ret;
-	}
-
-	plat->frequency = dev_read_u32_default(bus, "default-frequency",
-					       CRYPTO_DEFAULT_CLK);
-	debug("Crypto clock frequency is %x\n", (int)(size_t)plat->frequency);
-
-	return 0;
-}
-
-static int rockchip_crypto_probe(struct udevice *dev)
-{
-	struct rockchip_crypto_plat *plat = dev_get_platdata(dev);
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->regbase = (volatile struct rk_crypto_reg *)
-				(plat->base & 0xffffffff);
-	priv->max_freq = plat->frequency;
-	ret = clk_set_rate(&priv->clk, priv->max_freq);
-	if (ret < 0) {
-		printf("%s: Failed to set clock: %d\n", __func__, ret);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int rockchip_crypto_sha_init(struct udevice *dev, u32 msg_len,
-				    int hash_bits)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	priv->regbase->crypto_hash_meg_len = msg_len;
-	if (hash_bits == SHA_256_BIT) {
-		priv->regbase->crypto_hash_ctrl = HASH_SWAP_DO | ENGINE_SELECTION_SHA256;
-		priv->regbase->crypto_conf &= ~(BYTESWAP_HRFIFO);
-	} else {
-		printf("Do not support that hash_bits is not equal to 256");
-		return -ENOTSUPP;
-	}
-
-	rk_setreg(&priv->regbase->crypto_ctrl, HASH_FLUSH);
-	do {} while (priv->regbase->crypto_ctrl & HASH_FLUSH);
-
-	return 0;
-}
-
-static int rockchip_crypto_sha_byte_swap(struct udevice *dev, int en)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	if (en)
-		priv->regbase->crypto_conf |= BYTESWAP_HRFIFO;
-	else
-		priv->regbase->crypto_conf &= ~BYTESWAP_HRFIFO;
-	return 0;
-}
-
-static int rockchip_crypto_sha_start(struct udevice *dev, u32 *data,
-				     u32 data_len)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	if (data_len == 0)
-		return 0;
-
-	flush_cache((unsigned long)data, data_len);
-	do {} while (priv->regbase->crypto_ctrl & HASH_START);
-	priv->regbase->crypto_intsts = HASH_DONE_INT;
-	priv->regbase->crypto_hrdmas = (u32)(unsigned long)data;
-	priv->regbase->crypto_hrdmal = ((data_len + 3) >> 2);
-	rk_setreg(&priv->regbase->crypto_ctrl, HASH_START);
-
-	return 0;
-}
-
-static int rockchip_crypto_sha_end(struct udevice *dev, u32 *result)
-{
-	int i;
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	do {} while (priv->regbase->crypto_ctrl & HASH_START);
-	do {} while (!priv->regbase->crypto_hash_sts);
-	for (i = 0; i < 8; i++)
-		*result++ = priv->regbase->crypto_hash_dout[i];
-
-	return 0;
-}
-
-static int rockchip_crypto_rsa_init(struct udevice *dev)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	priv->regbase->crypto_pka_ctrl = PKA_BLOCK_SIZE_2048;
-	rk_setreg(&priv->regbase->crypto_ctrl, PKA_HASH_CTRL);
-	priv->regbase->crypto_intsts = 0xffffffff;
-	do {} while (priv->regbase->crypto_ctrl & PKA_CTRL);
-
-	return 0;
-}
-
-static int rockchip_crypto_rsa_start(struct udevice *dev, u32 *m,
-				     u32 *n, u32 *e, u32 *c)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-
-	priv->regbase->crypto_intsts = PKA_DONE_INT;
-	memcpy((void *)&priv->regbase->crypto_pka_m, (void *)m, 256);
-	memcpy((void *)&priv->regbase->crypto_pka_n, (void *)n, 256);
-	memcpy((void *)&priv->regbase->crypto_pka_e, (void *)e, 256);
-	memcpy((void *)&priv->regbase->crypto_pka_c, (void *)c, 256);
-	do {} while (priv->regbase->crypto_ctrl & PKA_START);
-	rk_setreg(&priv->regbase->crypto_ctrl, PKA_START);
-
-	return 0;
-}
-
-static int rockchip_crypto_rsa_end(struct udevice *dev, u32 *result)
-{
-	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
-	int i;
-
-	do {} while (priv->regbase->crypto_ctrl & PKA_START);
-	for (i = 0; i < 8; i++)
-		*result++ = *((u32 *)(&priv->regbase->crypto_pka_m + i));
-
-	return 0;
-}
-
-static const struct dm_rk_crypto_ops rockchip_crypto_ops = {
-	.sha_init = rockchip_crypto_sha_init,
-	.sha_byte_swap = rockchip_crypto_sha_byte_swap,
-	.sha_start = rockchip_crypto_sha_start,
-	.sha_end = rockchip_crypto_sha_end,
-	.rsa_init = rockchip_crypto_rsa_init,
-	.rsa_start = rockchip_crypto_rsa_start,
-	.rsa_end = rockchip_crypto_rsa_end,
-};
-
-static const struct udevice_id rockchip_crypto_ids[] = {
-	{ .compatible = "rockchip,rk3399-crypto" },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_crypto_drv) = {
-	.name		= "rockchip_crypto",
-	.id		= UCLASS_RKCRYPTO,
-	.of_match	= rockchip_crypto_ids,
-	.ops = &rockchip_crypto_ops,
-	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
-	.probe		= rockchip_crypto_probe,
-	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
-	.platdata_auto_alloc_size = sizeof(struct rockchip_crypto_plat),
-};
diff --git a/include/rockchip/crypto_v1.h b/include/rockchip/crypto_v1.h
new file mode 100644
index 0000000000..054d509dbc
--- /dev/null
+++ b/include/rockchip/crypto_v1.h
@@ -0,0 +1,105 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_V1_H_
+#define _ROCKCHIP_CRYPTO_V1_H_
+
+struct rk_crypto_reg {
+	u32 crypto_intsts;
+	u32 crypto_intena;
+	u32 crypto_ctrl;
+	u32 crypto_conf;
+	u32 crypto_brdmas;
+	u32 crypto_btdmas;
+	u32 crypto_brdmal;
+	u32 crypto_hrdmas;
+	u32 crypto_hrdmal;
+	u32 reserved0[(0x80 - 0x24) / 4];
+
+	u32 crypto_aes_ctrl;
+	u32 crypto_aes_sts;
+	u32 crypto_aes_din[4];
+	u32 crypto_aes_dout[4];
+	u32 crypto_aes_iv[4];
+	u32 crypto_aes_key[8];
+	u32 crypto_aes_cnt[4];
+	u32 reserved1[(0x100 - 0xe8) / 4];
+
+	u32 crypto_tdes_ctrl;
+	u32 crypto_tdes_sts;
+	u32 crypto_tdes_din[2];
+	u32 crypto_tdes_dout[2];
+	u32 crypto_tdes_iv[2];
+	u32 crypto_tdes_key1[2];
+	u32 crypto_tdes_key2[2];
+	u32 crypto_tdes_key3[2];
+	u32 reserved2[(0x180 - 0x138) / 4];
+
+	u32 crypto_hash_ctrl;
+	u32 crypto_hash_sts;
+	u32 crypto_hash_msg_len;
+	u32 crypto_hash_dout[8];
+	u32 crypto_hash_seed[5];
+	u32 reserved3[(0x200 - 0x1c0) / 4];
+
+	u32 crypto_trng_ctrl;
+	u32 crypto_trng_dout[8];
+	u32 reserved4[(0x280 - 0x224) / 4];
+
+	u32 crypto_pka_ctrl;
+	u32 reserved5[(0x400 - 0x284) / 4];
+
+	u32 crypto_pka_m[(0x500 - 0x400) / 4];
+	u32 crypto_pka_c[(0x600 - 0x500) / 4];
+	u32 crypto_pka_n[(0x700 - 0x600) / 4];
+	u32 crypto_pka_e;
+};
+
+check_member(rk_crypto_reg, crypto_pka_e, 0x700);
+
+/************************ Register bits definition ****************************/
+/* CRYPTO_HASH_CTRL */
+#define ENGINE_SELECTION_SHA1		0x0
+#define ENGINE_SELECTION_MD5		0x1
+#define ENGINE_SELECTION_SHA256		0x2
+#define HASH_SWAP_DO			0x8
+
+/* CRYPTO_CONF */
+#define HR_ADDR_MODE			BIT(8)
+#define BT_ADDR_MODE			BIT(7)
+#define BR_ADDR_MODE			BIT(6)
+#define BYTESWAP_HRFIFO			BIT(5)
+#define BYTESWAP_BTFIFO			BIT(4)
+#define BYTESWAP_BRFIFO			BIT(3)
+#define DESSEL				BIT(2)
+
+/* CRYPTO_CTRL */
+#define TRNG_FLUSH			BIT(9)
+#define TRNG_START			BIT(8)
+#define PKA_FLUSH			BIT(7)
+#define HASH_FLUSH			BIT(6)
+#define BLOCK_FLUSH			BIT(5)
+#define PKA_START			BIT(4)
+#define HASH_START			BIT(3)
+#define BLOCK_START			BIT(2)
+#define TDES_START			BIT(1)
+#define AES_START			BIT(0)
+#define PKA_HASH_CTRL			(PKA_FLUSH | HASH_FLUSH)
+#define PKA_CTRL			(PKA_FLUSH | PKA_START)
+
+/* CRYPTO_INTSTS */
+#define PKA_DONE_INT			BIT(5)
+#define HASH_DONE_INT			BIT(4)
+#define HRDMA_ERR_INT			BIT(3)
+#define HRDMA_DONE_INT			BIT(2)
+#define BCDMA_ERR_INT			BIT(1)
+#define BCDMA_DONE_INT			BIT(0)
+
+/* CRYPTO_PKA_CTRL */
+#define PKA_BLOCK_SIZE_512		0
+#define PKA_BLOCK_SIZE_1024		1
+#define PKA_BLOCK_SIZE_2048		2
+
+#endif
diff --git a/include/rockchip_crypto/rockchip_crypto.h b/include/rockchip_crypto/rockchip_crypto.h
deleted file mode 100644
index ca7fbb01df..0000000000
--- a/include/rockchip_crypto/rockchip_crypto.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* SPDX-License-Identifier:     GPL-2.0+ */
-/*
- * (C) Copyright 2019 Rockchip Electronics Co., Ltd
- */
-
-#ifndef _ROCKCHIP_CRYPTO_H_
-#define _ROCKCHIP_CRYPTO_H_
-
-#define crypto_get_ops(dev)	((struct dm_rk_crypto_ops *)(dev)->driver->ops)
-
-struct rk_crypto_desc {
-	struct udevice *dev;
-	struct dm_rk_crypto_ops *ops;
-};
-
-int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc);
-int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
-		       int hash_bits);
-int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en);
-int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
-			u32 data_len);
-int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result);
-int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash);
-int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto);
-int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto, u32 *m,
-			u32 *n, u32 *e, u32 *c);
-int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result);
-int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto);
-int rk_crypto_probe(void);
-
-#endif
diff --git a/include/rockchip_crypto/rockchip_crypto_hd.h b/include/rockchip_crypto/rockchip_crypto_hd.h
deleted file mode 100644
index c34fbdb90d..0000000000
--- a/include/rockchip_crypto/rockchip_crypto_hd.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/* SPDX-License-Identifier:     GPL-2.0+ */
-/*
- * (C) Copyright 2019 Rockchip Electronics Co., Ltd
- */
-
-#ifndef _ROCKCHIP_CRYPTO_HD_H_
-#define _ROCKCHIP_CRYPTO_HD_H_
-
-struct rk_crypto_reg {
-	u32 crypto_intsts;
-	u32 crypto_intena;
-	u32 crypto_ctrl;
-	u32 crypto_conf;
-	u32 crypto_brdmas;
-	u32 crypto_btdmas;
-	u32 crypto_brdmal;
-	u32 crypto_hrdmas;
-	u32 crypto_hrdmal;
-	u32 reserved0[(0x80 - 0x24) / 4];
-
-	u32 crypto_aes_ctrl;
-	u32 crypto_aes_sts;
-	u32 crypto_aes_din[4];
-	u32 crypto_aes_dout[4];
-	u32 crypto_aes_iv[4];
-	u32 crypto_aes_key[8];
-	u32 crypto_aes_cnt[4];
-	u32 reserved1[(0x100 - 0xe8) / 4];
-
-	u32 crypto_tdes_ctrl;
-	u32 crypto_tdes_sts;
-	u32 crypto_tdes_din[2];
-	u32 crypto_tdes_dout[2];
-	u32 crypto_tdes_iv[2];
-	u32 crypto_tdes_key1[2];
-	u32 crypto_tdes_key2[2];
-	u32 crypto_tdes_key3[2];
-	u32 reserved2[(0x180 - 0x138) / 4];
-
-	u32 crypto_hash_ctrl;
-	u32 crypto_hash_sts;
-	u32 crypto_hash_meg_len;
-	u32 crypto_hash_dout[8];
-	u32 crypto_hash_seed[5];
-	u32 reserved3[(0x200 - 0x1c0) / 4];
-
-	u32 crypto_trng_ctrl;
-	u32 crypto_trng_dout[8];
-	u32 reserved4[(0x280 - 0x224) / 4];
-
-	u32 crypto_pka_ctrl;
-	u32 reserved5[(0x400 - 0x284) / 4];
-
-	u32 crypto_pka_m;
-	u32 reserved6[(0x500 - 0x404) / 4];
-
-	u32 crypto_pka_c;
-	u32 reserved7[(0x600 - 0x504) / 4];
-
-	u32 crypto_pka_n;
-	u32 reserved8[(0x700 - 0x604) / 4];
-
-	u32 crypto_pka_e;
-};
-
-#define CRYPTO_DEFAULT_CLK           10000000
-#define SHA_256_BIT                  256
-/* crypto_hash_ctrl */
-#define HASH_SWAP_DO                 0x8
-#define ENGINE_SELECTION_SHA256      0x2
-/* crypto_conf */
-#define HR_ADDR_MODE                 (1 << 8)
-#define BT_ADDR_MODE                 (1 << 7)
-#define BR_ADDR_MODE                 (1 << 6)
-#define BYTESWAP_HRFIFO              (1 << 5)
-#define BYTESWAP_BTFIFO              (1 << 4)
-#define BYTESWAP_BRFIFO              (1 << 3)
-#define DESSEL                       (1 << 2)
-/* crypto_ctrl */
-#define TRNG_FLUSH                   (1 << 9)
-#define TRNG_START                   (1 << 8)
-#define PKA_FLUSH                    (1 << 7)
-#define HASH_FLUSH                   (1 << 6)
-#define BLOCK_FLUSH                  (1 << 5)
-#define PKA_START                    (1 << 4)
-#define HASH_START                   (1 << 3)
-#define BLOCK_START                  (1 << 2)
-#define TDES_START                   (1 << 1)
-#define AES_START                    (1 << 0)
-#define PKA_HASH_CTRL                (PKA_FLUSH | HASH_FLUSH)
-#define PKA_CTRL                     (PKA_FLUSH | PKA_START)
-/* crypto_intsts */
-#define PKA_DONE_INT                 (1 << 5)
-#define HASH_DONE_INT                (1 << 4)
-#define HRDMA_ERR_INT                (1 << 3)
-#define HRDMA_DONE_INT               (1 << 2)
-#define BCDMA_ERR_INT                (1 << 1)
-#define BCDMA_DONE_INT               (1 << 0)
-/* crypto_pka_ctrl */
-#define PKA_BLOCK_SIZE_2048          2
-
-struct dm_rk_crypto_ops {
-	int (*sha_init)(struct udevice *dev, u32 msg_len, int hash_bits);
-	int (*sha_byte_swap)(struct udevice *dev, int en);
-	int (*sha_start)(struct udevice *dev, u32 *data, u32 data_len);
-	int (*sha_end)(struct udevice *dev, u32 *result);
-	int (*rsa_init)(struct udevice *dev);
-	int (*rsa_start)(struct udevice *dev, u32 *m, u32 *n, u32 *e, u32 *c);
-	int (*rsa_end)(struct udevice *dev, u32 *result);
-};
-
-#endif

commit cc6ac5d64f8b6de9febcac3190279c2ad3f586c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 13 10:43:21 2019 +0800

    dm: add crypto uclass and cmd support
    
    Change-Id: I2241c90aca9695cd28bb9ca2a220d0e1af8ca932
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index c2d90640f4..6e23561996 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -532,6 +532,15 @@ config CMD_STRINGS
 	  within the range are displayed. The minimum number of characters
 	  for a sequence to be considered a string can be provided.
 
+config CMD_CRYPTO
+	bool "crypto test"
+	depends on DM_CRYPTO
+	select SHA1
+	select SHA256
+	select MD5
+	help
+	  Crypto test.
+
 endmenu
 
 menu "Compression commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index 6ac48171a1..7ff83c2524 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_CMD_CONFIG) += config.o
 obj-$(CONFIG_CMD_CONSOLE) += console.o
 obj-$(CONFIG_CMD_CPU) += cpu.o
 obj-$(CONFIG_CMD_CHARGE_DISPLAY) += charge.o
+obj-$(CONFIG_CMD_CRYPTO) += crypto.o
 obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
 obj-$(CONFIG_CMD_DATE) += date.o
 obj-$(CONFIG_CMD_DEMO) += demo.o
diff --git a/cmd/crypto.c b/cmd/crypto.c
new file mode 100644
index 0000000000..8a5c19dbb4
--- /dev/null
+++ b/cmd/crypto.c
@@ -0,0 +1,280 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <command.h>
+#include <crypto.h>
+#include <dm.h>
+#include <u-boot/md5.h>
+#include <u-boot/sha1.h>
+#include <u-boot/sha256.h>
+
+static u8 foo_data[] = {
+	0x52, 0x53, 0x41, 0x4b, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00,
+	0xda, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd5, 0xf2, 0xfc, 0xbb,
+	0x1a, 0x39, 0x61, 0xf5, 0x63, 0x7f, 0xa6, 0xeb, 0x5d, 0xc5, 0x22, 0xe2,
+	0x65, 0x03, 0xcc, 0x61, 0x92, 0x60, 0x4c, 0x5f, 0x4e, 0x81, 0x96, 0x3d,
+	0x89, 0x1d, 0xa3, 0x5c, 0xb7, 0x88, 0xc3, 0x75, 0xcd, 0x71, 0xf0, 0x16,
+	0x04, 0x5e, 0xef, 0x85, 0xdf, 0x30, 0x57, 0x7e, 0x06, 0x0d, 0x44, 0x3b,
+	0x80, 0x22, 0x41, 0xcd, 0xba, 0x40, 0xb5, 0xfa, 0xbe, 0x8f, 0xa9, 0x61,
+	0x4d, 0xc6, 0x2a, 0xd9, 0x96, 0x57, 0x57, 0xc6, 0xc0, 0x99, 0xc0, 0x94,
+	0x57, 0x21, 0x0a, 0xad, 0xde, 0x4c, 0xe1, 0xaa, 0x6e, 0x11, 0xc6, 0xeb,
+	0xa2, 0x09, 0x65, 0xd9, 0xd5, 0xc6, 0x8f, 0x8d, 0xb6, 0xec, 0xb3, 0xca,
+	0x29, 0xa4, 0x9f, 0xab, 0x90, 0x7e, 0xf2, 0x86, 0x92, 0x25, 0x71, 0xf4,
+	0x17, 0x70, 0x92, 0xe0, 0xd0, 0xe2, 0xe1, 0x57, 0xc4, 0xca, 0x44, 0xbb,
+	0x14, 0xdc, 0xf8, 0x1a, 0x27, 0x00, 0x8f, 0x30, 0xcd, 0x0a, 0x4a, 0x26,
+	0x42, 0x07, 0xa1, 0x1e, 0x69, 0x7e, 0xfd, 0xc4, 0x38, 0xf8, 0x53, 0xfe,
+	0xcd, 0xa7, 0xfc, 0x7d, 0xa1, 0x87, 0xe8, 0xec, 0x52, 0x01, 0x37, 0x43,
+	0x0c, 0xf2, 0x2e, 0x89, 0x3d, 0xaa, 0xed, 0x9d, 0x83, 0x13, 0x8f, 0x79,
+	0xec, 0xb3, 0x7f, 0xbe, 0xf9, 0x36, 0x99, 0x8d, 0x93, 0xc2, 0x4d, 0x8f,
+	0x8f, 0x18, 0x1e, 0x94, 0x25, 0xe7, 0x0b, 0xdc, 0xd9, 0x85, 0x88, 0x77,
+	0x7e, 0x25, 0x80, 0x10, 0xde, 0xb6, 0xdd, 0xe6, 0xb6, 0xba, 0xe9, 0x1d,
+	0xac, 0xd2, 0xd7, 0x1c, 0x8e, 0x86, 0x5e, 0xd1, 0xc0, 0x97, 0x59, 0x79,
+	0x7e, 0x1a, 0x96, 0x6a, 0xa1, 0x09, 0xc0, 0x45, 0xb0, 0x71, 0x2d, 0xd1,
+	0x87, 0x6f, 0xbe, 0x31, 0x21, 0xcb, 0x52, 0xde, 0x48, 0x41, 0x73, 0x7e,
+	0x4a, 0x2f, 0xf8, 0x95, 0x0c, 0x2d, 0xb4, 0x9d, 0x53, 0x70, 0xcd, 0xa5,
+	0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55,
+	0x1d, 0xb3, 0xf9, 0x43, 0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6,
+	0x95, 0xd6, 0x98, 0xec, 0x53, 0x6b, 0x85, 0x77, 0x74, 0x21, 0xf1, 0x22,
+	0x5c, 0x4d, 0x56, 0x55, 0x89, 0x0d, 0x60, 0xa5, 0x2b, 0x68, 0xf8, 0x71,
+	0x6d, 0x72, 0xed, 0x67, 0x55, 0x3e, 0x5f, 0xd1, 0x9e, 0x21, 0xa7, 0x6e,
+	0x5c, 0xf2, 0xac, 0xe8, 0x66, 0x1d, 0x4e, 0xe5, 0x58, 0x76, 0xed, 0x2b,
+	0xfe, 0x2b, 0xc9, 0xf6, 0x7f, 0xb7, 0x02, 0x27, 0xfd, 0x25, 0x3f, 0x2d,
+	0x7c, 0x1c, 0x37, 0x80, 0x29, 0x7f, 0x12, 0xd2, 0xd5, 0xae, 0x27, 0xc6,
+	0x68, 0x24, 0x83, 0xc5, 0x61, 0x8b, 0xea, 0x1a, 0xbd, 0x07, 0x96, 0xe4,
+	0xd1, 0xc5, 0xd4, 0x21, 0x39, 0x4a, 0xaa, 0x66, 0xd2, 0x3f, 0xd2, 0x67,
+	0x55, 0x39, 0xbf, 0x40, 0x66, 0x66, 0x5a, 0x92, 0xdd, 0x8d, 0xda, 0x5a,
+	0x89, 0x7e, 0x78, 0xd9, 0x5f, 0x42, 0xe4, 0x16, 0xdb, 0x76, 0x49, 0xe0,
+	0x71, 0x98, 0x8e, 0xed, 0x61, 0xd9, 0x63, 0x0a, 0x11, 0xf6, 0x24, 0x7f,
+	0x9b, 0xf2, 0xee, 0xfc, 0xa4, 0x4c, 0x98, 0x81, 0xfb, 0x2d, 0xd3, 0x8f,
+	0x29, 0x77, 0x63, 0xd9, 0x51, 0xfc, 0xe1, 0x17, 0x3f, 0xc3, 0xce, 0xca,
+	0xbe, 0xec, 0xf2, 0xc9, 0x07, 0x48, 0x74, 0x54, 0xbb, 0x1d, 0x02, 0xe7,
+	0xaf, 0x18, 0x27, 0x39, 0xb8, 0xc4, 0x90, 0x05, 0x20, 0x5b, 0x38, 0x7b,
+	0x3a, 0x15, 0x94, 0x7e, 0xe8, 0xc1, 0xa5, 0x8c, 0xc0, 0x6c, 0x86, 0x96,
+	0xeb, 0x46, 0xfa, 0xad, 0x2e, 0x69, 0x12, 0x56, 0xb9, 0x51, 0x91, 0x9c,
+	0xea, 0x83, 0x4b, 0xd3, 0x5f, 0xb7, 0xdd, 0x29, 0x99, 0xb9, 0x66, 0x65,
+	0x5e, 0xe2, 0x59, 0x16, 0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc,
+	0x1e, 0x75, 0x32, 0xf8, 0x73, 0xfa, 0x22, 0x7b, 0x22, 0x7c, 0x7d, 0x9d,
+	0x03, 0x89, 0x54, 0x27, 0x8f, 0xbb, 0x12, 0xbb, 0x29, 0x0a, 0xe0, 0x41,
+	0x4e, 0x80, 0x1b, 0x3f, 0x9c, 0x6d, 0xc1, 0x79, 0xdb, 0x3c, 0xc4, 0xd2,
+	0x65, 0x99, 0xd7, 0x16, 0xff, 0xff, 0xff, 0xff, 0xd1, 0x95, 0x46, 0x66,
+	0x83, 0xe2, 0x1b, 0xd4, 0x35, 0x1f, 0x5d, 0xf2, 0x1e, 0xb5, 0x43, 0x22,
+	0xe4, 0x41, 0xe6, 0x6a, 0x46, 0x93, 0x24, 0x89, 0x1b, 0x74, 0x3c, 0xa0,
+	0x20, 0x3b, 0x4e, 0x64, 0xff, 0xff, 0xff, 0xff,
+};
+
+static u8 rsa2048_n[] = {
+	0xd5, 0xf2, 0xfc, 0xbb, 0x1a, 0x39, 0x61, 0xf5, 0x63, 0x7f, 0xa6, 0xeb,
+	0x5d, 0xc5, 0x22, 0xe2, 0x65, 0x03, 0xcc, 0x61, 0x92, 0x60, 0x4c, 0x5f,
+	0x4e, 0x81, 0x96, 0x3d, 0x89, 0x1d, 0xa3, 0x5c, 0xb7, 0x88, 0xc3, 0x75,
+	0xcd, 0x71, 0xf0, 0x16, 0x04, 0x5e, 0xef, 0x85, 0xdf, 0x30, 0x57, 0x7e,
+	0x06, 0x0d, 0x44, 0x3b, 0x80, 0x22, 0x41, 0xcd, 0xba, 0x40, 0xb5, 0xfa,
+	0xbe, 0x8f, 0xa9, 0x61, 0x4d, 0xc6, 0x2a, 0xd9, 0x96, 0x57, 0x57, 0xc6,
+	0xc0, 0x99, 0xc0, 0x94, 0x57, 0x21, 0x0a, 0xad, 0xde, 0x4c, 0xe1, 0xaa,
+	0x6e, 0x11, 0xc6, 0xeb, 0xa2, 0x09, 0x65, 0xd9, 0xd5, 0xc6, 0x8f, 0x8d,
+	0xb6, 0xec, 0xb3, 0xca, 0x29, 0xa4, 0x9f, 0xab, 0x90, 0x7e, 0xf2, 0x86,
+	0x92, 0x25, 0x71, 0xf4, 0x17, 0x70, 0x92, 0xe0, 0xd0, 0xe2, 0xe1, 0x57,
+	0xc4, 0xca, 0x44, 0xbb, 0x14, 0xdc, 0xf8, 0x1a, 0x27, 0x00, 0x8f, 0x30,
+	0xcd, 0x0a, 0x4a, 0x26, 0x42, 0x07, 0xa1, 0x1e, 0x69, 0x7e, 0xfd, 0xc4,
+	0x38, 0xf8, 0x53, 0xfe, 0xcd, 0xa7, 0xfc, 0x7d, 0xa1, 0x87, 0xe8, 0xec,
+	0x52, 0x01, 0x37, 0x43, 0x0c, 0xf2, 0x2e, 0x89, 0x3d, 0xaa, 0xed, 0x9d,
+	0x83, 0x13, 0x8f, 0x79, 0xec, 0xb3, 0x7f, 0xbe, 0xf9, 0x36, 0x99, 0x8d,
+	0x93, 0xc2, 0x4d, 0x8f, 0x8f, 0x18, 0x1e, 0x94, 0x25, 0xe7, 0x0b, 0xdc,
+	0xd9, 0x85, 0x88, 0x77, 0x7e, 0x25, 0x80, 0x10, 0xde, 0xb6, 0xdd, 0xe6,
+	0xb6, 0xba, 0xe9, 0x1d, 0xac, 0xd2, 0xd7, 0x1c, 0x8e, 0x86, 0x5e, 0xd1,
+	0xc0, 0x97, 0x59, 0x79, 0x7e, 0x1a, 0x96, 0x6a, 0xa1, 0x09, 0xc0, 0x45,
+	0xb0, 0x71, 0x2d, 0xd1, 0x87, 0x6f, 0xbe, 0x31, 0x21, 0xcb, 0x52, 0xde,
+	0x48, 0x41, 0x73, 0x7e, 0x4a, 0x2f, 0xf8, 0x95, 0x0c, 0x2d, 0xb4, 0x9d,
+	0x53, 0x70, 0xcd, 0xa5,
+};
+
+static u8 rsa2048_e[] = {
+	0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+};
+
+static u8 rsa2048_c[] = {
+	0xa5, 0x0d, 0xc2, 0xc6, 0xf1, 0x08, 0x95, 0x55, 0x1d, 0xb3, 0xf9, 0x43,
+	0xb0, 0x7b, 0x5b, 0x96, 0xa0, 0x72, 0xe8, 0xd6, 0x95, 0xd6, 0x98, 0xec,
+	0x53, 0x6b, 0x85, 0x77, 0x74, 0x21, 0xf1, 0x22, 0x5c, 0x4d, 0x56, 0x55,
+	0x89, 0x0d, 0x60, 0xa5, 0x2b, 0x68, 0xf8, 0x71, 0x6d, 0x72, 0xed, 0x67,
+	0x55, 0x3e, 0x5f, 0xd1, 0x9e, 0x21, 0xa7, 0x6e, 0x5c, 0xf2, 0xac, 0xe8,
+	0x66, 0x1d, 0x4e, 0xe5, 0x58, 0x76, 0xed, 0x2b, 0xfe, 0x2b, 0xc9, 0xf6,
+	0x7f, 0xb7, 0x02, 0x27, 0xfd, 0x25, 0x3f, 0x2d, 0x7c, 0x1c, 0x37, 0x80,
+	0x29, 0x7f, 0x12, 0xd2, 0xd5, 0xae, 0x27, 0xc6, 0x68, 0x24, 0x83, 0xc5,
+	0x61, 0x8b, 0xea, 0x1a, 0xbd, 0x07, 0x96, 0xe4, 0xd1, 0xc5, 0xd4, 0x21,
+	0x39, 0x4a, 0xaa, 0x66, 0xd2, 0x3f, 0xd2, 0x67, 0x55, 0x39, 0xbf, 0x40,
+	0x66, 0x66, 0x5a, 0x92, 0xdd, 0x8d, 0xda, 0x5a, 0x89, 0x7e, 0x78, 0xd9,
+	0x5f, 0x42, 0xe4, 0x16, 0xdb, 0x76, 0x49, 0xe0, 0x71, 0x98, 0x8e, 0xed,
+	0x61, 0xd9, 0x63, 0x0a, 0x11, 0xf6, 0x24, 0x7f, 0x9b, 0xf2, 0xee, 0xfc,
+	0xa4, 0x4c, 0x98, 0x81, 0xfb, 0x2d, 0xd3, 0x8f, 0x29, 0x77, 0x63, 0xd9,
+	0x51, 0xfc, 0xe1, 0x17, 0x3f, 0xc3, 0xce, 0xca, 0xbe, 0xec, 0xf2, 0xc9,
+	0x07, 0x48, 0x74, 0x54, 0xbb, 0x1d, 0x02, 0xe7, 0xaf, 0x18, 0x27, 0x39,
+	0xb8, 0xc4, 0x90, 0x05, 0x20, 0x5b, 0x38, 0x7b, 0x3a, 0x15, 0x94, 0x7e,
+	0xe8, 0xc1, 0xa5, 0x8c, 0xc0, 0x6c, 0x86, 0x96, 0xeb, 0x46, 0xfa, 0xad,
+	0x2e, 0x69, 0x12, 0x56, 0xb9, 0x51, 0x91, 0x9c, 0xea, 0x83, 0x4b, 0xd3,
+	0x5f, 0xb7, 0xdd, 0x29, 0x99, 0xb9, 0x66, 0x65, 0x5e, 0xe2, 0x59, 0x16,
+	0x20, 0xa2, 0xda, 0x0e, 0x8e, 0xd4, 0x41, 0xdc, 0x1e, 0x75, 0x32, 0xf8,
+	0x73, 0xfa, 0x22, 0x7b,
+};
+
+/* RSA2048-SHA256 sign data of foo_data[] */
+static u8 rsa2048_sha256_sign[] = {
+	0xd4, 0x05, 0x21, 0x34, 0x2c, 0x92, 0xaf, 0x73, 0x72, 0x13, 0x54, 0x92,
+	0x9b, 0x57, 0x63, 0x82, 0xd4, 0x7c, 0x41, 0xba, 0x58, 0x3e, 0xa6, 0x82,
+	0xe8, 0x56, 0x9f, 0x1c, 0xc2, 0x6d, 0x07, 0x6d, 0xe0, 0xca, 0x4c, 0x93,
+	0xb4, 0xa4, 0x82, 0x53, 0x41, 0x58, 0xeb, 0x77, 0xd5, 0x2c, 0xf5, 0x3f,
+	0x3d, 0x1b, 0x54, 0x1b, 0x6a, 0x18, 0x30, 0xc1, 0x93, 0x14, 0x8f, 0xdd,
+	0x77, 0xe4, 0xed, 0xb8, 0xd3, 0xfc, 0x63, 0xed, 0x88, 0x2f, 0xf4, 0x35,
+	0xc4, 0xdb, 0x89, 0x94, 0x4a, 0xcd, 0x88, 0x88, 0x4f, 0xc3, 0xeb, 0x14,
+	0x03, 0xd9, 0x85, 0x2e, 0x7a, 0x27, 0xbd, 0xc9, 0x19, 0xbf, 0x55, 0x50,
+	0x2a, 0x29, 0x23, 0x02, 0xe4, 0xaf, 0x16, 0x5c, 0x17, 0x81, 0x38, 0x79,
+	0xf1, 0x2b, 0x9a, 0xc7, 0xd2, 0x9d, 0x66, 0xca, 0xf7, 0x6b, 0xf0, 0x83,
+	0x81, 0x57, 0xfc, 0x56, 0xae, 0x6d, 0x98, 0xae, 0xe2, 0xec, 0x00, 0x19,
+	0x6b, 0x75, 0x06, 0xdc, 0x1c, 0x6e, 0xbd, 0x23, 0x15, 0xb1, 0x3a, 0x43,
+	0x7e, 0x3c, 0x8b, 0x32, 0x9c, 0x4d, 0xa2, 0xcf, 0x14, 0xee, 0xd8, 0x7a,
+	0x12, 0x90, 0x70, 0xd2, 0x9f, 0xd5, 0x6d, 0x50, 0x67, 0x35, 0x93, 0x97,
+	0x2e, 0xff, 0x8f, 0xbf, 0x34, 0x4c, 0xa9, 0xee, 0x6a, 0xaa, 0x87, 0x09,
+	0x1f, 0x6b, 0xcc, 0x3d, 0xeb, 0x88, 0xca, 0x8f, 0x45, 0x86, 0xb7, 0xb2,
+	0xd6, 0xd8, 0xe5, 0x3e, 0x94, 0x02, 0x4b, 0xa7, 0x74, 0xb8, 0x5f, 0x1f,
+	0xe3, 0xbc, 0x95, 0x72, 0x3b, 0x51, 0xd4, 0xec, 0x8d, 0x87, 0xca, 0xb0,
+	0x69, 0xca, 0xa9, 0x68, 0xfc, 0x34, 0xf9, 0xb5, 0x67, 0xef, 0xac, 0xc2,
+	0x10, 0x1a, 0x39, 0x56, 0xcb, 0x38, 0x45, 0x92, 0x74, 0x2e, 0x24, 0x1c,
+	0x4e, 0x31, 0x80, 0xd9, 0x2d, 0x5f, 0x74, 0x48, 0xfe, 0x46, 0x4e, 0xf6,
+	0x19, 0x9a, 0x1d, 0x32,
+};
+
+static void dump(const char *title, void *hard_d, void *soft_d, u32 nbits)
+{
+	int i, same;
+	char *buf;
+
+	same = !memcmp(hard_d, soft_d, BITS2BYTE(nbits));
+	printf("[%s]: %s\n", title, same ? "OK" : "FAIL");
+
+	printf("    hard: ");
+	buf = hard_d;
+	for (i = 0; i < BITS2BYTE(nbits); i++)
+		printf("%02x ", buf[i]);
+
+	printf("\n    soft: ");
+	buf = soft_d;
+	for (i = 0; i < BITS2BYTE(nbits); i++)
+		printf("%02x ", buf[i]);
+
+	printf("\n\n");
+}
+
+static int do_crypto(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct udevice *dev;
+	sha_context csha_ctx;
+	sha1_context sha1_ctx;
+	sha256_context sha256_ctx;
+	rsa_key rsa_key;
+	u8 sha256_out0[32];
+	u8 sha256_out1[32];
+	u8 sha1_out0[20];
+	u8 sha1_out1[20];
+	u8 rsa_out[32];
+	u8 md5_out0[16];
+	u8 md5_out1[16];
+	u32 cap;
+
+	cap = CRYPTO_MD5 | CRYPTO_SHA1 | CRYPTO_SHA256 | CRYPTO_RSA2048;
+	dev = crypto_get_device(cap);
+	if (!dev) {
+		printf("Can't find crypto device for expected capability\n");
+		return -ENODEV;
+	}
+
+	/* MD5 */
+	csha_ctx.algo = CRYPTO_MD5;
+	csha_ctx.length = sizeof(foo_data);
+	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+			sizeof(foo_data), md5_out0);
+	md5(foo_data, sizeof(foo_data), md5_out1);
+	dump("MD5", md5_out0, md5_out1, crypto_algo_nbits(csha_ctx.algo));
+
+	/* SHA1 */
+	csha_ctx.algo = CRYPTO_SHA1;
+	csha_ctx.length = sizeof(foo_data);
+	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+			sizeof(foo_data), sha1_out0);
+	sha1_starts(&sha1_ctx);
+	sha1_update(&sha1_ctx, (const u8 *)foo_data, sizeof(foo_data));
+	sha1_finish(&sha1_ctx, sha1_out1);
+	dump("SHA1", sha1_out0, sha1_out1, crypto_algo_nbits(csha_ctx.algo));
+
+	/* SHA256 */
+	csha_ctx.algo = CRYPTO_SHA256;
+	csha_ctx.length = sizeof(foo_data);
+	crypto_sha_csum(dev, &csha_ctx, (char *)foo_data,
+			sizeof(foo_data), sha256_out0);
+	sha256_starts(&sha256_ctx);
+	sha256_update(&sha256_ctx, (const u8 *)foo_data, sizeof(foo_data));
+	sha256_finish(&sha256_ctx, sha256_out1);
+	dump("SHA256", sha256_out0, sha256_out1,
+	     crypto_algo_nbits(csha_ctx.algo));
+
+	/* RSA2048-SHA256 */
+	rsa_key.algo = CRYPTO_RSA2048;
+	rsa_key.n = (u32 *)&rsa2048_n;
+	rsa_key.e = (u32 *)&rsa2048_e;
+	rsa_key.c = (u32 *)&rsa2048_c;
+	crypto_rsa_verify(dev, &rsa_key, rsa2048_sha256_sign, rsa_out);
+	dump("RSA2048-SHA256", rsa_out,
+	     sha256_out1, crypto_algo_nbits(csha_ctx.algo));
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	crypto, 1, 1, do_crypto,
+	"crypto test",
+	""
+);
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 709268c8c7..89ccc48c30 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -1,5 +1,11 @@
 menu "Hardware crypto devices"
 
+config DM_CRYPTO
+	bool "Enable Driver Model for CRYPTO drivers (UCLASS_CRYPTO)"
+	depends on DM
+	---help---
+	This config enables the dm crypto support.
+
 source drivers/crypto/fsl/Kconfig
 source drivers/crypto/rockchip/Kconfig
 
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 0b770fcd64..a3a8db66a9 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -5,7 +5,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+obj-$(CONFIG_DM_CRYPTO)		+= crypto-uclass.o
 obj-$(CONFIG_EXYNOS_ACE_SHA)	+= ace_sha.o
 obj-y += rsa_mod_exp/
 obj-y += fsl/
-obj-$(CONFIG_CRYPTO_ROCKCHIP) += rockchip/
diff --git a/drivers/crypto/crypto-uclass.c b/drivers/crypto/crypto-uclass.c
new file mode 100644
index 0000000000..9e5cfbea24
--- /dev/null
+++ b/drivers/crypto/crypto-uclass.c
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <crypto.h>
+#include <dm.h>
+#include <u-boot/sha1.h>
+
+u32 crypto_algo_nbits(u32 algo)
+{
+	switch (algo) {
+	case CRYPTO_MD5:
+		return 128;
+	case CRYPTO_SHA1:
+		return 160;
+	case CRYPTO_SHA256:
+		return 256;
+	case CRYPTO_RSA512:
+		return 512;
+	case CRYPTO_RSA1024:
+		return 1024;
+	case CRYPTO_RSA2048:
+		return 2048;
+	}
+
+	printf("Unknown crypto algorithm: 0x%x\n", algo);
+
+	return 0;
+}
+
+struct udevice *crypto_get_device(u32 capability)
+{
+	const struct dm_crypto_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+	u32 cap;
+
+	ret = uclass_get(UCLASS_CRYPTO, &uc);
+	if (ret)
+		return NULL;
+
+	for (uclass_first_device(UCLASS_CRYPTO, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = device_get_ops(dev);
+		if (!ops || !ops->capability)
+			continue;
+
+		cap = ops->capability(dev);
+		if ((cap & capability) == capability)
+			return dev;
+	}
+
+	return NULL;
+}
+
+int crypto_sha_init(struct udevice *dev, sha_context *ctx)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->sha_init)
+		return -ENOSYS;
+
+	return ops->sha_init(dev, ctx);
+}
+
+int crypto_sha_update(struct udevice *dev, u32 *input, u32 len)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->sha_update)
+		return -ENOSYS;
+
+	return ops->sha_update(dev, input, len);
+}
+
+int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->sha_final)
+		return -ENOSYS;
+
+	return ops->sha_final(dev, ctx, output);
+}
+
+int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
+		    char *input, u32 input_len, u8 *output)
+{
+	int ret;
+
+	ret = crypto_sha_init(dev, ctx);
+	if (ret)
+		return ret;
+
+	ret = crypto_sha_update(dev, (u32 *)input, input_len);
+	if (ret)
+		return ret;
+
+	ret = crypto_sha_final(dev, ctx, output);
+
+	return ret;
+}
+
+int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output)
+{
+	const struct dm_crypto_ops *ops = device_get_ops(dev);
+
+	if (!ops || !ops->rsa_verify)
+		return -ENOSYS;
+
+	return ops->rsa_verify(dev, ctx, sign, output);
+}
+
+UCLASS_DRIVER(crypto) = {
+	.id	= UCLASS_CRYPTO,
+	.name	= "crypto",
+};
diff --git a/include/crypto.h b/include/crypto.h
new file mode 100644
index 0000000000..d5dcb5d274
--- /dev/null
+++ b/include/crypto.h
@@ -0,0 +1,122 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _CORE_CRYPTO_H_
+#define _CORE_CRYPTO_H_
+
+/* Algorithms/capability of crypto, works together with crypto_algo_nbits() */
+#define CRYPTO_MD5		BIT(0)
+#define CRYPTO_SHA1		BIT(1)
+#define CRYPTO_SHA256		BIT(2)
+#define CRYPTO_RSA512		BIT(3)
+#define CRYPTO_RSA1024		BIT(4)
+#define CRYPTO_RSA2048		BIT(5)
+
+#define BYTE2WORD(bytes)	((bytes) / 4)
+#define BITS2BYTE(nbits)	((nbits) / 8)
+#define BITS2WORD(nbits)	((nbits) / 32)
+
+typedef struct {
+	u32 algo;	/* Algorithm: CRYPTO_MD5/CRYPTO_SHA1/CRYPTO_RSA2048... */
+	u32 length;	/* Data total length */
+
+} sha_context;
+
+typedef struct {
+	u32 algo;	/* Algorithm: CRYPTO_MD5/CRYPTO_SHA1/CRYPTO_RSA2048... */
+	u32 *n;		/* Public key factor N */
+	u32 *e;		/* Public key factor E */
+	u32 *c;		/* Optional, a accelerate factor for some crypto */
+} rsa_key;
+
+struct dm_crypto_ops {
+	/* Hardware algorithm capability */
+	u32 (*capability)(struct udevice *dev);
+
+	/* SHA init/update/final */
+	int (*sha_init)(struct udevice *dev, sha_context *ctx);
+	int (*sha_update)(struct udevice *dev, u32 *input, u32 len);
+	int (*sha_final)(struct udevice *dev, sha_context *ctx, u8 *output);
+
+	/* RSA verify */
+	int (*rsa_verify)(struct udevice *dev, rsa_key *ctx,
+			  u8 *sign, u8 *output);
+};
+
+/**
+ * crypto_algo_nbits() - Get algorithm bits accroding to algorithm
+ * @capability: expected algorithm capability, eg. CRYPTO_MD5/RSA2048...
+ *
+ * @return algorithm bits
+ */
+u32 crypto_algo_nbits(u32 algo);
+
+/**
+ * crypto_get_device() - Get crypto device by capability
+ * @capability: expected algorithm capability, eg. CRYPTO_MD5/RSA2048...
+ *
+ * @return dev on success, otherwise NULL
+ */
+struct udevice *crypto_get_device(u32 capability);
+
+/**
+ * crypto_sha_init() - Crypto sha init
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_init(struct udevice *dev, sha_context *ctx);
+
+/**
+ * crypto_sha_update() - Crypto sha update
+ *
+ * @dev: crypto device
+ * @input: input data buffer
+ * @len: input data length
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_update(struct udevice *dev, u32 *input, u32 len);
+
+/**
+ * crypto_sha_final() - Crypto sha finish and get result
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ * @output: output hash data
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_final(struct udevice *dev, sha_context *ctx, u8 *output);
+
+/**
+ * crypto_sha_csum() - Crypto sha hash for one data block only
+ *
+ * @dev: crypto device
+ * @ctx: sha context
+ * @input: input data buffer
+ * @input_len: input data length
+ * @output: output hash data
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_sha_csum(struct udevice *dev, sha_context *ctx,
+		    char *input, u32 input_len, u8 *output);
+
+/**
+ * crypto_rsa_verify() - Crypto rsa verify
+ *
+ * @dev: crypto device
+ * @ctx: rsa key context
+ * @sign: signature
+ * @output: output hash data buffer
+ *
+ * @return 0 on success, otherwise failed
+ */
+int crypto_rsa_verify(struct udevice *dev, rsa_key *ctx, u8 *sign, u8 *output);
+
+#endif
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index b51b9873f2..69cf23a940 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -101,7 +101,7 @@ enum uclass_id {
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 	UCLASS_DVFS,		/* DVFS policy */
 	UCLASS_IO_DOMAIN,	/* IO domain */
-	UCLASS_RKCRYPTO,        /* Rockchip Crypto */
+	UCLASS_CRYPTO,		/* Crypto */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };

commit 272fdf68ed75c15079fff8123974ecda6545eb3b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 8 19:50:50 2019 +0800

    rockchip: dts: rk3399: add and enable crypto node
    
    Change-Id: I63866f6f63e331e7c2722399f9a1621c55a7590a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e8e240898c..5605eaa0d0 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -215,6 +215,10 @@
 
 };
 
+&crypto {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 21196f4c78..ded8e93b43 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -53,6 +53,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&crypto {
+	u-boot,dm-pre-reloc;
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 6c56e51588..0f87ef67c4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -202,6 +202,14 @@
 		};
 	};
 
+	crypto: crypto@ff8b0000 {
+		compatible = "rockchip,rk3399-crypto";
+		reg = <0x0 0xff8b0000 0x0 0x10000>;
+		clock-names = "sclk_crypto0";
+		clocks = <&cru SCLK_CRYPTO0>, <&cru SCLK_CRYPTO1>;
+		status = "disabled";
+	};
+
 	pcie0: pcie@f8000000 {
 		compatible = "rockchip,rk3399-pcie";
 		reg = <0x0 0xf8000000 0x0 0x2000000>,

commit 5ee9804858fe427000faea68f1cc4ebadd501c6d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 8 18:45:56 2019 +0800

    rockchip: clk: rk3399: rename and export rockchip_get_clk()
    
    Change-Id: I454500829fe815f8374b957279949bd0c6c87c52
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
index cf5b8c9548..c5d27f17d1 100644
--- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
@@ -11,7 +11,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3399.h>
 
-static int rockchip_get_cruclk(struct udevice **devp)
+int rockchip_get_clk(struct udevice **devp)
 {
 	return uclass_get_device_by_driver(UCLASS_CLK,
 			DM_GET_DRIVER(clk_rk3399), devp);
@@ -23,7 +23,7 @@ void *rockchip_get_cru(void)
 	struct udevice *dev;
 	int ret;
 
-	ret = rockchip_get_cruclk(&dev);
+	ret = rockchip_get_clk(&dev);
 	if (ret)
 		return ERR_PTR(ret);
 

commit 88cae289b5aafbf2c7098a02fcdd5f88da644a29
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu May 16 11:28:18 2019 +0800

    clk: rockchip: rk3368: support crypto clk get/set rate
    
    Change-Id: I736fdda1d994ebdb59c68f8be209bae0e206be99
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index db2d777bde..dcb7d6eafd 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -131,6 +131,8 @@ enum {
 	ACLK_PERI_DIV_CON_MASK		= 0x1f,
 
 	/* CLKSEL10CON */
+	CLK_CRYPTO_DIV_CON_SHIFT	= 14,
+	CLK_CRYPTO_DIV_CON_MASK		= 0x3 << CLK_CRYPTO_DIV_CON_SHIFT,
 	PCLK_ALIVE_DIV_CON_SHIFT	= 8,
 	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
 
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1ed2bea3f4..54555b826f 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -786,6 +786,35 @@ static ulong rk3368_alive_get_clk(struct rk3368_clk_priv *priv)
 	parent = GPLL_HZ;
 	return DIV_TO_RATE(parent, div);
 }
+
+static ulong rk3368_crypto_get_rate(struct rk3368_clk_priv *priv)
+{
+	struct rk3368_cru *cru = priv->cru;
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[10]);
+	div = (val & CLK_CRYPTO_DIV_CON_MASK) >> CLK_CRYPTO_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(rk3368_bus_get_clk(priv->cru, ACLK_BUS), div);
+}
+
+static ulong rk3368_crypto_set_rate(struct rk3368_clk_priv *priv,
+				    uint hz)
+{
+	struct rk3368_cru *cru = priv->cru;
+	int src_clk_div;
+	uint p_rate;
+
+	p_rate = rk3368_bus_get_clk(priv->cru, ACLK_BUS);
+	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;
+	assert(src_clk_div < 3);
+
+	rk_clrsetreg(&cru->clksel_con[10],
+		     CLK_CRYPTO_DIV_CON_MASK,
+		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);
+
+	return rk3368_crypto_get_rate(priv);
+}
 #endif
 
 static ulong rk3368_armclk_set_clk(struct rk3368_clk_priv *priv,
@@ -908,6 +937,9 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 	case PCLK_WDT:
 		rate = rk3368_alive_get_clk(priv);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3368_crypto_get_rate(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -985,6 +1017,9 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_CCI_PRE:
 		ret =  0;
 		break;
+	case SCLK_CRYPTO:
+		ret = rk3368_crypto_set_rate(priv, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 582fa222b926693c4001b2c6dbc728271b0d7416
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu May 16 11:27:44 2019 +0800

    clk: rockchip: rk3128: support crypto clk get/set rate
    
    Change-Id: I3a7d71a481aca04c9e6c0547cfc05a8106f79423
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 6c2b6cb1b1..cfc4cb3c70 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -165,6 +165,8 @@ enum {
 	SARADC_DIV_CON_SHIFT	= 8,
 	SARADC_DIV_CON_MASK	= GENMASK(15, 8),
 	SARADC_DIV_CON_WIDTH	= 8,
+	CLK_CRYPTO_DIV_CON_SHIFT= 0,
+	CLK_CRYPTO_DIV_CON_MASK	= GENMASK(1, 0),
 
 	/* CRU_CLKSEL27_CON*/
 	DCLK_VOP_SEL_SHIFT	= 0,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index edfdcef1c4..8af387bcff 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -469,6 +469,35 @@ static ulong rk3128_vop_get_rate(struct rk3128_clk_priv *priv, ulong clk_id)
 	}
 	return DIV_TO_RATE(parent, div);
 }
+
+static ulong rk3128_crypto_get_rate(struct rk3128_clk_priv *priv)
+{
+	struct rk3128_cru *cru = priv->cru;
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = (val & CLK_CRYPTO_DIV_CON_MASK) >> CLK_CRYPTO_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(rk3128_bus_get_clk(priv, ACLK_CPU), div);
+}
+
+static ulong rk3128_crypto_set_rate(struct rk3128_clk_priv *priv,
+				    uint hz)
+{
+	struct rk3128_cru *cru = priv->cru;
+	int src_clk_div;
+	uint p_rate;
+
+	p_rate = rk3128_bus_get_clk(priv, ACLK_CPU);
+	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;
+	assert(src_clk_div < 3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     CLK_CRYPTO_DIV_CON_MASK,
+		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);
+
+	return rk3128_crypto_get_rate(priv);
+}
 #endif
 
 static ulong rk3128_clk_get_rate(struct clk *clk)
@@ -522,6 +551,9 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case ACLK_LCDC0:
 		rate = rk3128_vop_get_rate(priv, clk->id);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3128_crypto_get_rate(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -586,6 +618,9 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_LCDC0:
 		ret = rk3128_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_CRYPTO:
+		ret = rk3128_crypto_set_rate(priv, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 8b9843df21fb47683c041eedaf6ff6e756218799
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 21:15:01 2019 +0800

    common: android: fix uncompress kernel region check
    
    Change-Id: Ie8b6f7255eae3c2be86ccc2c33e04c8b21add75d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c81b4e04b7..4083ac7507 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -326,12 +326,14 @@ static int android_bootloader_get_fdt(const char *part_name,
  *   | Image.lzma| 2683750     | 34%   |                 |               |
  *   |-------------------------------------------------------------------|
  */
-static int sysmem_alloc_uncomp_kernel(ulong kernel_address, u32 comp)
+static int sysmem_alloc_uncomp_kernel(ulong andr_hdr,
+				      ulong uncomp_kaddr, u32 comp)
 {
-	struct andr_img_hdr *hdr = (struct andr_img_hdr *)kernel_address;
+	struct andr_img_hdr *hdr = (struct andr_img_hdr *)andr_hdr;
 	ulong ksize, kaddr;
 
 	if (comp != IH_COMP_NONE) {
+		/* Release compressed sysmem */
 		kaddr = env_get_hex("kernel_addr_c", 0);
 		if (!kaddr)
 			kaddr = env_get_hex("kernel_addr_r", 0);
@@ -358,10 +360,13 @@ static int sysmem_alloc_uncomp_kernel(ulong kernel_address, u32 comp)
 		else
 			ksize = hdr->kernel_size;
 
+		kaddr = uncomp_kaddr;
 		ksize = ALIGN(ksize, 512);
 		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
 				       (phys_addr_t)kaddr, ksize))
 			return -ENOMEM;
+
+		hotkey_run(HK_SYSMEM);
 	}
 
 	return 0;
@@ -412,7 +417,9 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	 * Actually, here only gives a sysmem warning message when failed
 	 * but never return -1.
 	 */
-	if (sysmem_alloc_uncomp_kernel(kernel_address, comp_type))
+	if (sysmem_alloc_uncomp_kernel(kernel_address,
+				       simple_strtoul(kernel_addr_r, NULL, 16),
+				       comp_type))
 		return -1;
 
 	do_bootm(NULL, 0, 4, bootm_args);

commit 76f45eb9e982fe2578e0436ba31a5edf367b4992
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 21:14:01 2019 +0800

    common: rkimg: fix uncompress kernel region check
    
    Change-Id: I5e9f51f17dc49dbe4cd36afe6502fdda68a59fe6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d64aeefc0f..2f196ad668 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -467,7 +467,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 {
 	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
 	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
+	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0);
 	disk_partition_t kernel_part;
 	int ramdisk_size;
 	int kernel_size;
@@ -532,10 +532,17 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
 #else
+	/* We asume it's always zImage on 32-bit platform */
+	ulong kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
 	ulong kaddr, ksize;
 
-	kaddr = kernel_addr_r;
-	if (!sysmem_free((phys_addr_t)kaddr)) {
+	if (kernel_addr_r && !kernel_addr_c) {
+		kernel_addr_c = kernel_addr_r;
+		kernel_addr_r = CONFIG_SYS_SDRAM_BASE;
+	}
+
+	if (!sysmem_free((phys_addr_t)kernel_addr_c)) {
+		kaddr = kernel_addr_r;
 		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
 		ksize = ALIGN(ksize, dev_desc->blksz);
 		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,

commit 661cbb0b92d6fdbdb94ef8b408cd1617b5703b63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 19:33:47 2019 +0800

    lib: sysmem: goto out when alloc failed
    
    Change-Id: I8f6fd82f7367c49596475a88bafd19137e2f2f7c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 9b11e9f4b2..0f382c95f4 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -362,6 +362,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	} else {
 		SYSMEM_E("Failed to alloc \"%s\" at 0x%08lx - 0x%08lx\n",
 			 name, (ulong)base, (ulong)(base + size));
+		goto out;
 	}
 
 	SYSMEM_D("Exit alloc: \"%s\", paddr=0x%08lx, size=0x%08lx, align=0x%x, anywhere=%d\n",

commit 44f308bd53af198fe464edb3277728ea0cb6e733
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 14 21:51:26 2019 +0800

    rockchip: param: add CONFIG_RKFLASH for bootdev "rknand 0"
    
    Change-Id: Ifbb541d2b6ed883deaceff7838663763ab841dd1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 409354f613..c488a92fa4 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -188,7 +188,7 @@ int param_parse_bootdev(char **devtype, char **devnum)
 			}
 			break;
 #endif
-#ifdef CONFIG_RKNAND
+#if defined(CONFIG_RKNAND) || defined(CONFIG_RKNANDC_NAND)
 		case BOOT_TYPE_NAND:
 			*devtype = "rknand";
 			*devnum = "0";

commit fe2fac9531c96d1f84365390368837f9800a5963
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 10 18:36:22 2019 +0800

    rockchip: iomem: compare node name when compatible is not match
    
    Change-Id: I37916390efb2be5d88e45e09bec51a09fa77c056
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/iomem.c b/arch/arm/mach-rockchip/iomem.c
index 75b8bb3b75..e3cebb5b07 100644
--- a/arch/arm/mach-rockchip/iomem.c
+++ b/arch/arm/mach-rockchip/iomem.c
@@ -10,6 +10,11 @@
 #include <dm.h>
 #include <fdtdec.h>
 
+enum ops {
+	SEARCH_NAME,
+	SEARCH_COMP,
+};
+
 void iomem_show(const char *label, unsigned long base, size_t start, size_t end)
 {
 	unsigned long val, offset = start, nr = 0;
@@ -30,57 +35,73 @@ void iomem_show(const char *label, unsigned long base, size_t start, size_t end)
 	printf("\n");
 }
 
-void iomem_show_by_compatible(const char *compat, size_t start, size_t end)
+static int iomem_show_by_match(enum ops op, const char *search,
+			       size_t start, size_t end)
 {
 	const void *fdt = gd->fdt_blob;
-	const char *compatible;
+	const char *name;
 	fdt_addr_t addr;
+	int found = 0;
 	int offset;
 
-	if (!compat)
-		return;
-
 	for (offset = fdt_next_node(fdt, 0, NULL);
 	     offset >= 0;
 	     offset = fdt_next_node(fdt, offset, NULL)) {
-		compatible = fdt_getprop(fdt, offset, "compatible", NULL);
-		if (!compatible)
+		if (op == SEARCH_COMP)
+			name = fdt_getprop(fdt, offset, "compatible", NULL);
+		else if (op == SEARCH_NAME)
+			name = fdt_get_name(fdt, offset, NULL);
+		else
+			goto out;
+
+		if (!name)
 			continue;
 
-		if (strstr(compatible, compat)) {
+		if (strstr(name, search)) {
 			addr = fdtdec_get_addr_size_auto_noparent(fdt, offset,
 							"reg", 0, NULL, false);
-			compatible = fdt_getprop(fdt, offset, "compatible",
-						 NULL);
-			iomem_show(compatible, addr, start, end);
+			if (addr == FDT_ADDR_T_NONE)
+				goto out;
+
+			iomem_show(name, addr, start, end);
+			found = 1;
 			break;
 		}
 	}
-
 	printf("\n");
+
+out:
+	return found;
+}
+
+void iomem_show_by_compatible(const char *compat, size_t start, size_t end)
+{
+	iomem_show_by_match(SEARCH_COMP, compat, start, end);
 }
 
-static int do_iomem_by_compatible(cmd_tbl_t *cmdtp, int flag, int argc,
-				  char *const argv[])
+static int do_iomem_by_match(cmd_tbl_t *cmdtp, int flag,
+			     int argc, char *const argv[])
 {
 	size_t start, end;
-	const char *compat;
+	const char *search;
 
 	if (argc != 4)
 		return CMD_RET_USAGE;
 
-	compat = argv[1];
+	search = argv[1];
 	start = simple_strtoul(argv[2], NULL, 0);
 	end = simple_strtoul(argv[3], NULL, 0);
 
-	iomem_show_by_compatible(compat, start, end);
+	if (!iomem_show_by_match(SEARCH_COMP, search, start, end))
+		iomem_show_by_match(SEARCH_NAME, search, start, end);
 
 	return 0;
 }
 
 U_BOOT_CMD(
-	iomem,		4,	1,	do_iomem_by_compatible,
-	"Show iomem data by device compatible",
-	"iomem <compatible> <start offset>  <end offset>\n"
-	"  eg: iomem -grf 0x0 0x200"
+	iomem, 4, 1, do_iomem_by_match,
+	"Show iomem data by device compatible(high priority) or node name",
+	"iomem <compatible or node name> <start offset>  <end offset>\n"
+	"  eg: iomem -grf  0x0 0x200"
+	"  eg: iomem gpio3 0x0 0x200"
 );

commit 510e4046a63fe6607bf328aeeb06ec2e36b56b0d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Apr 13 22:30:25 2019 +0800

    Makefile: u-boot.itb: use dt-spl.dtb if using kernel dtb
    
    Change-Id: Ia8244dfefbdddb638779f56207e400b44590bb35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index e121dbd4d9..62ce8879e1 100644
--- a/Makefile
+++ b/Makefile
@@ -1036,8 +1036,12 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
 		$(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE
 	$(call if_changed,mkimage)
 
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+u-boot.itb: u-boot-nodtb.bin dts/dt-spl.dtb $(U_BOOT_ITS) FORCE
+else
 u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
 	$(call if_changed,mkfitimage)
+endif
 
 u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
 	$(call if_changed,mkimage)

commit 60ea26bd956b8bba0bf9cd3ed7914893bf223724
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 18 11:44:31 2019 +0800

    rockchip: board: replace register reading with soc_is_rk3288w()
    
    Change-Id: I4b5d7633093b0c544761f0e3724e4f7c0e6e928f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 006c72e1f6..378598a344 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -18,6 +18,7 @@
 #include <misc.h>
 #include <asm/gpio.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/hotkey.h>
@@ -349,7 +350,7 @@ int board_fdt_fixup(void *blob)
 	 * - RK1808: MMC strength 2mA;
 	 */
 #ifdef CONFIG_ROCKCHIP_RK3288
-	if (readl(0xff980004) == 0x1A) {
+	if (soc_is_rk3288w()) {
 		ret = fdt_setprop_string(blob, 0,
 					 "compatible", "rockchip,rk3288w");
 		if (ret)

commit 9dfc5f87440fc20cbdde5a1756ba20bfc80ffbcf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:58:33 2019 +0800

    rockchip: board: call console_record_print_purge()
    
    Change-Id: I0ac68dfa66c641f180e33313706b279d0a10427e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 571dcee5b3..006c72e1f6 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -428,6 +428,11 @@ void board_quiesce_devices(void)
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();
 #endif
+
+#if defined(CONFIG_CONSOLE_RECORD)
+	/* Print record console data */
+	console_record_print_purge();
+#endif
 }
 
 void enable_caches(void)

commit 8626b6473200e7f2266a43f5e9f90d7645afe8ac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:31:27 2019 +0800

    common: board_r: add console_record_reset_enable() call
    
    It's fine to call it by initr_console_record() since initr
    malloc was setup.
    
    Change-Id: I2de9f0bf76499e5c04d4ce57aa48800d6a6151db
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index e49e30c8c2..e07a39fe8d 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -256,7 +256,12 @@ static int initr_malloc(void)
 static int initr_console_record(void)
 {
 #if defined(CONFIG_CONSOLE_RECORD)
-	return console_record_init();
+	int ret;
+
+	ret = console_record_init();
+	if (!ret)
+		console_record_reset_enable();
+	return ret;
 #else
 	return 0;
 #endif

commit 4f92923eccf61f16abd3d3bd8c3bbc9ddb769c8d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:43:03 2019 +0800

    common: console: fix typo
    
    Change-Id: I20dc7e8c808a6c060629dea67801172280bc9551
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index 169c47c039..1446b6268f 100644
--- a/common/console.c
+++ b/common/console.c
@@ -774,7 +774,7 @@ static void console_update_silent(void)
 {
 #ifdef CONFIG_SILENT_CONSOLE
 	if (env_get("silent") != NULL) {
-		printf("U-Boot: enable slient console\n");
+		printf("U-Boot: enable silent console\n");
 		gd->flags |= GD_FLG_SILENT;
 	} else {
 		gd->flags &= ~GD_FLG_SILENT;

commit 5bb5aa82d31d1125edce22ec0a80ce0240c9a111
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 14:12:25 2019 +0800

    common: console: optimize console record
    
    - fix: passing argument 1 of ‘membuff_new’ discards ‘volatile’ qualifier from pointer target type;
    - add console_record_print_purge();
    - set default CONSOLE_RECORD_OUT_SIZE value for rockchip;
    
    Change-Id: Id247d590b677cd2cff95bc5e66963b0ff07b0658
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index f7a7dd952f..d6efe6590a 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -233,7 +233,8 @@ config CONSOLE_RECORD
 config CONSOLE_RECORD_OUT_SIZE
 	hex "Output buffer size"
 	depends on CONSOLE_RECORD
-	default 0x400 if CONSOLE_RECORD
+	default 0x400 if CONSOLE_RECORD && !ARCH_ROCKCHIP
+	default 0x2000 if CONSOLE_RECORD && ARCH_ROCKCHIP
 	help
 	  Set the size of the console output buffer. When this fills up, no
 	  more data will be recorded until some is removed. The buffer is
diff --git a/common/console.c b/common/console.c
index a6fd9c4322..169c47c039 100644
--- a/common/console.c
+++ b/common/console.c
@@ -420,7 +420,7 @@ int getc(void)
 	if (gd->console_in.start) {
 		int ch;
 
-		ch = membuff_getbyte(&gd->console_in);
+		ch = membuff_getbyte((struct membuff *)&gd->console_in);
 		if (ch != -1)
 			return 1;
 	}
@@ -445,7 +445,7 @@ int tstc(void)
 		return 0;
 #ifdef CONFIG_CONSOLE_RECORD
 	if (gd->console_in.start) {
-		if (membuff_peekbyte(&gd->console_in) != -1)
+		if (membuff_peekbyte((struct membuff *)&gd->console_in) != -1)
 			return 1;
 	}
 #endif
@@ -529,7 +529,7 @@ void putc(const char c)
 #endif
 #ifdef CONFIG_CONSOLE_RECORD
 	if (gd && (gd->flags & GD_FLG_RECORD) && gd->console_out.start)
-		membuff_putbyte(&gd->console_out, c);
+		membuff_putbyte((struct membuff *)&gd->console_out, c);
 #endif
 #ifdef CONFIG_SILENT_CONSOLE
 	if (gd->flags & GD_FLG_SILENT)
@@ -605,18 +605,20 @@ int console_record_init(void)
 {
 	int ret;
 
-	ret = membuff_new(&gd->console_out, CONFIG_CONSOLE_RECORD_OUT_SIZE);
+	ret = membuff_new((struct membuff *)&gd->console_out,
+			  CONFIG_CONSOLE_RECORD_OUT_SIZE);
 	if (ret)
 		return ret;
-	ret = membuff_new(&gd->console_in, CONFIG_CONSOLE_RECORD_IN_SIZE);
+	ret = membuff_new((struct membuff *)&gd->console_in,
+			  CONFIG_CONSOLE_RECORD_IN_SIZE);
 
 	return ret;
 }
 
 void console_record_reset(void)
 {
-	membuff_purge(&gd->console_out);
-	membuff_purge(&gd->console_in);
+	membuff_purge((struct membuff *)&gd->console_out);
+	membuff_purge((struct membuff *)&gd->console_in);
 }
 
 void console_record_reset_enable(void)
@@ -624,6 +626,28 @@ void console_record_reset_enable(void)
 	console_record_reset();
 	gd->flags |= GD_FLG_RECORD;
 }
+
+/* Print and remove data from buffer */
+void console_record_print_purge(void)
+{
+	unsigned long flags;
+	char c;
+
+	if (!gd || !(gd->flags & GD_FLG_RECORD))
+		return;
+
+	/* Remove some bits to avoid running unexpected branch in putc() */
+	flags = gd->flags;
+	gd->flags &= ~(GD_FLG_RECORD | GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE);
+
+	printf("\n\n## Console Record: \n");
+	while (!membuff_isempty((struct membuff *)&gd->console_out)) {
+		c = membuff_getbyte((struct membuff *)&gd->console_out);
+		putc(c);
+	}
+
+	gd->flags = flags;
+}
 #endif
 
 /* test if ctrl-c was pressed */
diff --git a/include/console.h b/include/console.h
index cea29ed6dc..61cba6bcfd 100644
--- a/include/console.h
+++ b/include/console.h
@@ -42,6 +42,11 @@ void console_record_reset(void);
  */
 void console_record_reset_enable(void);
 
+/**
+ * console_record_print_purge() - print record data and remove data from buffers
+ */
+void console_record_print_purge(void);
+
 /**
  * console_announce_r() - print a U-Boot console on non-serial consoles
  *

commit a69fab4a3455e3938ac488f6c9a913ed14cfb7e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 13:12:31 2019 +0800

    console: remove unused definitions
    
    Change-Id: I281d773196401b57d3db99644d06277255e36c07
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/console.h b/include/console.h
index 3af98a622a..cea29ed6dc 100644
--- a/include/console.h
+++ b/include/console.h
@@ -10,11 +10,6 @@
 
 extern char console_buffer[];
 
-#define CONSOLE_EVT_CTRL_B	0x02
-#define CONSOLE_EVT_CTRL_D	0x04
-#define CONSOLE_EVT_CTRL_F	0x06
-#define CONSOLE_EVT_CTRL_M	0x0D
-
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */
 int console_init_r(void);	/* After  relocation; uses the console stuff */

commit 90b99ac763ba14bd5d947eaa3c02c65549273da2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 13:11:42 2019 +0800

    common: rkimg: add sysmem alloc for uncompress kernel
    
    It helps check whether uncompress kernel overlap with other region
    or not.
    
    Change-Id: I16299d4865fb79c3d0e83ccd2a2f4cdff9df66f9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 49bc241f69..d64aeefc0f 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -9,6 +9,7 @@
 #include <linux/list.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
+#include <asm/arch/hotkey.h>
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rockchip_crc.h>
 #include <boot_rkimg.h>
@@ -523,11 +524,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 
 	fdt_ramdisk_skip_relocation();
-
-	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
-		bidram_dump();
-		sysmem_dump();
-	}
+	hotkey_run(HK_SYSMEM);
 
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
@@ -535,6 +532,19 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
 #else
+	ulong kaddr, ksize;
+
+	kaddr = kernel_addr_r;
+	if (!sysmem_free((phys_addr_t)kaddr)) {
+		ksize = kernel_size * 100 / 45 ; /* Ratio: 45% */
+		ksize = ALIGN(ksize, dev_desc->blksz);
+		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
+				       (phys_addr_t)kaddr, ksize))
+			return -ENOMEM;
+	}
+
+	hotkey_run(HK_SYSMEM);
+
 	boot_lmb_init(&images);
 	images.ep = kernel_addr_r;
 	images.initrd_start = ramdisk_addr_r;

commit 0986a7dda1c55af4d329d51f1b4e7c0964db5abc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 09:24:28 2019 +0800

    common: android: add sysmem alloc for uncompress kernel
    
    It helps check whether uncompress kernel overlap with other region
    or not.
    
    Change-Id: Ia7e6c027f68c2e8af398824afd8b7580531cb77e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index a9cd04b0a7..cec5be6fdb 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -57,6 +57,10 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 		.name = "KERNEL",
 		.flags = M_ATTR_OFC,
 	},
+	[MEMBLK_ID_UNCOMP_KERNEL] = {
+		.name = "UNCOMPRESS-KERNEL",
+		.flags = M_ATTR_PEEK,
+	},
 	[MEMBLK_ID_ANDROID]  =	{
 		.name = "ANDROID",
 		.flags = M_ATTR_OFC,
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index e6da05a098..c81b4e04b7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -10,6 +10,7 @@
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
 #include <android_image.h>
+#include <asm/arch/hotkey.h>
 #include <cli.h>
 #include <common.h>
 #include <dt_table.h>
@@ -306,6 +307,66 @@ static int android_bootloader_get_fdt(const char *part_name,
 }
 #endif
 
+/*
+ *   Test on RK3308 AARCH64 mode (Cortex A35 816 MHZ) boot with eMMC:
+ *
+ *   |-------------------------------------------------------------------|
+ *   | Format    |  Size(Byte) | Ratio | Decomp time(ms) | Boot time(ms) |
+ *   |-------------------------------------------------------------------|
+ *   | Image     | 7720968     |       |                 |     488       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.lz4 | 4119448     | 53%   |       59        |     455       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.lzo | 3858322     | 49%   |       141       |     536       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.gz  | 3529108     | 45%   |       222       |     609       |
+ *   |-------------------------------------------------------------------|
+ *   | Image.bz2 | 3295914     | 42%   |       2940      |               |
+ *   |-------------------------------------------------------------------|
+ *   | Image.lzma| 2683750     | 34%   |                 |               |
+ *   |-------------------------------------------------------------------|
+ */
+static int sysmem_alloc_uncomp_kernel(ulong kernel_address, u32 comp)
+{
+	struct andr_img_hdr *hdr = (struct andr_img_hdr *)kernel_address;
+	ulong ksize, kaddr;
+
+	if (comp != IH_COMP_NONE) {
+		kaddr = env_get_hex("kernel_addr_c", 0);
+		if (!kaddr)
+			kaddr = env_get_hex("kernel_addr_r", 0);
+		kaddr -= hdr->page_size;
+		if (sysmem_free((phys_addr_t)kaddr))
+			return -EINVAL;
+
+		/*
+		 * Use smaller Ratio to get larger estimated uncompress
+		 * kernel size.
+		 */
+		if (comp == IH_COMP_ZIMAGE)
+			ksize = hdr->kernel_size * 100 / 45;
+		else if (comp == IH_COMP_LZ4)
+			ksize = hdr->kernel_size * 100 / 50;
+		else if (comp == IH_COMP_LZO)
+			ksize = hdr->kernel_size * 100 / 45;
+		else if (comp == IH_COMP_GZIP)
+			ksize = hdr->kernel_size * 100 / 40;
+		else if (comp == IH_COMP_BZIP2)
+			ksize = hdr->kernel_size * 100 / 40;
+		else if (comp == IH_COMP_LZMA)
+			ksize = hdr->kernel_size * 100 / 30;
+		else
+			ksize = hdr->kernel_size;
+
+		ksize = ALIGN(ksize, 512);
+		if (!sysmem_alloc_base(MEMBLK_ID_UNCOMP_KERNEL,
+				       (phys_addr_t)kaddr, ksize))
+			return -ENOMEM;
+	}
+
+	return 0;
+}
+
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char *kernel_addr_r = env_get("kernel_addr_r");
@@ -344,10 +405,15 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	       comp_type != IH_COMP_NONE ? kernel_addr_c : kernel_addr_r,
 	       comp_str, fdt_addr);
 
-	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
-		bidram_dump();
-		sysmem_dump();
-	}
+	hotkey_run(HK_SYSMEM);
+
+	/*
+	 * Check whether there is enough space for uncompress kernel,
+	 * Actually, here only gives a sysmem warning message when failed
+	 * but never return -1.
+	 */
+	if (sysmem_alloc_uncomp_kernel(kernel_address, comp_type))
+		return -1;
 
 	do_bootm(NULL, 0, 4, bootm_args);
 
diff --git a/include/memblk.h b/include/memblk.h
index 7226c81e44..90429caad2 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -25,6 +25,7 @@ enum memblk_id {
 	MEMBLK_ID_FDT_DTBO,
 	MEMBLK_ID_FDT_AOSP,
 	MEMBLK_ID_KERNEL,
+	MEMBLK_ID_UNCOMP_KERNEL,
 	MEMBLK_ID_ANDROID,
 	MEMBLK_ID_AVB_ANDROID,
 

commit c664909e96abcd0725d5032078d39a3c2a468bb0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 09:23:01 2019 +0800

    rockchip: board: add and use conosle hotkey interface
    
    Change-Id: I9c7b3ce75b9b7652cdd60d0d94d55d34f0a7011e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/hotkey.h b/arch/arm/include/asm/arch-rockchip/hotkey.h
new file mode 100644
index 0000000000..3559e71904
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/hotkey.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_HOTKEY_H_
+#define _ROCKCHIP_HOTKEY_H_
+
+enum hotkey_t {
+	HK_INVAL,
+	HK_BROM_DNL,
+	HK_FASTBOOT,
+	HK_ROCKUSB_DNL,
+	HK_SYSMEM,
+};
+
+bool is_hotkey(enum hotkey_t id);
+void hotkey_run(enum hotkey_t id);
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 00132884a3..946f32f1a1 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -25,6 +25,7 @@ obj-y += board.o
 obj-y += chip_info.o
 obj-y += iomem.o
 obj-y += memblk.o
+obj-y += hotkey.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 0b7579c162..571dcee5b3 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -20,6 +20,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/hotkey.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/arch/param.h>
 #ifdef CONFIG_DM_CHARGE_DISPLAY
@@ -231,7 +232,7 @@ static void early_bootrom_download(void)
 	gd->console_evt = getc();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	/* ctrl+b */
-	if (gd->console_evt == CONSOLE_EVT_CTRL_B) {
+	if (is_hotkey(HK_BROM_DNL)) {
 		printf("Enter bootrom download...");
 		flushc();
 		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f271c5b945..5e8e66ffa8 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,6 +8,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/hotkey.h>
 #include <asm/arch/param.h>
 #include <cli.h>
 #include <dm.h>
@@ -131,7 +132,7 @@ void rockchip_dnl_mode_check(void)
 {
 	/* recovery key or "ctrl+d" */
 	if (rockchip_dnl_key_pressed() ||
-	    gd->console_evt == CONSOLE_EVT_CTRL_D) {
+	    is_hotkey(HK_ROCKUSB_DNL)) {
 		printf("download key pressed... ");
 		if (rockchip_u2phy_vbus_detect() > 0) {
 			printf("entering download mode...\n");
@@ -164,7 +165,7 @@ void rockchip_dnl_mode_check(void)
 			printf("recovery key pressed, entering recovery mode!\n");
 			env_set("reboot_mode", "recovery");
 		}
-	} else if (gd->console_evt == CONSOLE_EVT_CTRL_F) {
+	} else if (is_hotkey(HK_FASTBOOT)) {
 		env_set("reboot_mode", "fastboot");
 	}
 }
diff --git a/arch/arm/mach-rockchip/hotkey.c b/arch/arm/mach-rockchip/hotkey.c
new file mode 100644
index 0000000000..cc5f3845dd
--- /dev/null
+++ b/arch/arm/mach-rockchip/hotkey.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bidram.h>
+#include <console.h>
+#include <sysmem.h>
+#include <asm/arch/hotkey.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CTRL_B		0x02
+#define CTRL_D		0x04
+#define CTRL_F		0x06
+#define CTRL_M		0x0d
+
+bool is_hotkey(enum hotkey_t id)
+{
+	switch (id) {
+	case HK_BROM_DNL:
+		return gd->console_evt == CTRL_B;
+	case HK_FASTBOOT:
+		return gd->console_evt == CTRL_F;
+	case HK_ROCKUSB_DNL:
+		return gd->console_evt == CTRL_D;
+	case HK_SYSMEM:
+		return gd->console_evt == CTRL_M;
+	default:
+		break;
+	}
+
+	return false;
+}
+
+void hotkey_run(enum hotkey_t id)
+{
+	switch ((id)) {
+	case HK_SYSMEM:
+		if (gd->console_evt == CTRL_M) {
+			bidram_dump();
+			sysmem_dump();
+		}
+		break;
+	default:
+		break;
+	}
+}

commit 92298dbc5da47a3c238502be8f85029603391383
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 9 15:33:03 2019 +0800

    rockchip: common: increase CONFIG_NR_DRAM_BANKS
    
    Since we have import sysmem/bidram memory management, we can
    support any count of discontinuous memory block, let's increase it.
    
    Change-Id: I12e5d7e766c8060e1a50f6eee9eaa23bde8021ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 189e23e03c..e8bd45396b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -20,7 +20,7 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#define CONFIG_NR_DRAM_BANKS		4
+#define CONFIG_NR_DRAM_BANKS		12
 
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>

commit 63363c40ff9e9aa3e6b27d10c6ad9ea9b4b45217
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Apr 24 14:06:51 2019 +0800

    spl: fit: all rockchip based soc use dram as sram bounce buffer for
    block device
    
    The Storage controller(MMC/NANDC/SFC) on Rockchip based soc can't
    access the sram directly, we need use dram memory as a bounce buffer.
    
    Change-Id: Ibe2a10d7b73cb19b093ee372602ade097b689b82
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d65cbb1ae6..7203d30d78 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -197,7 +197,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			return -ENOENT;
 
 		load_ptr = (load_addr + align_len) & ~align_len;
-#if  defined(CONFIG_ROCKCHIP_RK3399) || defined(CONFIG_ROCKCHIP_RK3368)
+#if  defined(CONFIG_ARCH_ROCKCHIP)
 		if ((load_ptr & 0xffff0000) == CONFIG_ROCKCHIP_IRAM_START_ADDR)
 			load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len);
 #endif

commit 912343c03a9c1b09aa38be5a597bcc97f5078fe6
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Apr 19 17:09:06 2019 +0800

    rockchip: mkimage: add support for RK3308
    
    Usage:
    
     (1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
     (2) cat spl/u-boot-spl.bin >> idbloader.img
     (3) upgrade_tool wl 0x40 idbloader.img
    
    Note:
      When use a ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in (1)
    
    Change-Id: Ia6694754ed70d2d5cce04f62dcfac538291f7386
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 8f184c1301..08d8a22903 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -74,6 +74,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3188", "RK31", 0x8000 - 0x800, true },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false },
 	{ "rk3288", "RK32", 0x8000, false },
+	{ "rk3308", "RK33", 0x40000 - 0x1000, false},
 	{ "rk3328", "RK32", 0x8000 - 0x1000, false },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false },

commit 41386edd8d26f2d7489cdb3212a1fdb30bd59699
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 12 10:17:39 2019 +0800

    fastboot: add oem command to init ab metadata
    
    The command is: fastboot oem init-ab-metadata
    
    Change-Id: I879929a8a6e1c133725267c94492b2f2495ba5b4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 896bcac61c..d44a1c022c 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -2126,6 +2126,16 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
+	} else if (strncmp("init-ab-metadata", cmd + 4, 16) == 0) {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		if (rk_avb_init_ab_metadata()) {
+			fastboot_tx_write_str("FAILinit ab data fail!");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else {
 		fastboot_tx_write_str("FAILunknown oem command");

commit 363411a1e6747822ad3ec1499a22b36ad70df9c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:51:45 2019 +0800

    rockchip: board: use flushc() to flush console data
    
    Change-Id: I422a8ab8423bbab1922059d1e80d757506a1ca73
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 56ceae23e2..0b7579c162 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -233,7 +233,7 @@ static void early_bootrom_download(void)
 	/* ctrl+b */
 	if (gd->console_evt == CONSOLE_EVT_CTRL_B) {
 		printf("Enter bootrom download...");
-		mdelay(100);
+		flushc();
 		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
 		do_reset(NULL, 0, 0, NULL);
 		printf("failed!\n");

commit 91cbfde1a2679846bd858761e06bcb81397abc19
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:57:24 2019 +0800

    arm: bootm: use flushc() to flush console data before linux
    
    Remove GD_FLG_OS_RUN definition.
    
    Change-Id: Ib78d4adf58dfea5e40ec79fcb9603020651c6daa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 6312f130ff..c160c829ba 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -97,20 +97,11 @@ static void announce_and_cleanup(int fake)
 	udc_disconnect();
 #endif
 
-#ifdef CONFIG_ARCH_ROCKCHIP
-	/* Enable this flag, call putc to flush console(ns16550_serial_putc)*/
-	gd->flags |= GD_FLG_OS_RUN;
-	/*
-	 * This putc is only for calling ns16550_serial_putc() to flush console.
-	 * Console uclass framework is quite complicated, it's not easy to
-	 * flush console by privoding a new interface which must provide a
-	 * udevice here, so we use an easy way to achieve that.
-	 */
-	putc('\n');
-#endif
-
 	board_quiesce_devices();
 
+	/* Flush all console data */
+	flushc();
+
 	/*
 	 * Call remove function of all devices with a removal flag set.
 	 * This may be useful for last-stage operations, like cancelling
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index ea3f8e5252..a8df46d23d 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -171,8 +171,6 @@ typedef struct global_data {
 #define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
 
 #ifdef CONFIG_ARCH_ROCKCHIP
-/* Currently, we use it to indicate console can be flushed before jump to OS */
-#define GD_FLG_OS_RUN		0x10000
 /* BL32 is enabled */
 #define GD_FLG_BL32_ENABLED	0x20000
 #endif

commit 7c86130655e60fe9aff55b24e83160cb11e48de8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:55:55 2019 +0800

    serial: ns16550: implement ops->clear callback
    
    Thus, the flushc() can work normally.
    
    Change-Id: I544ed0ffcbc5564913bf89bf1a83c6d540ae6b6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6f2ee6960d..63587786f3 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -363,20 +363,6 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 	if (ch == '\n')
 		WATCHDOG_RESET();
 
-#ifdef CONFIG_ARCH_ROCKCHIP
-	/*
-	 * Wait fifo flush.
-	 *
-	 * UART_USR: bit2 trans_fifo_empty:
-	 *	0 = Transmit FIFO is not empty
-	 *	1 = Transmit FIFO is empty
-	 */
-	if (gd->flags & GD_FLG_OS_RUN) {
-		while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
-			;
-	}
-#endif
-
 	return 0;
 }
 
@@ -413,6 +399,24 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
 	return 0;
 }
 
+static int ns16550_serial_clear(struct udevice *dev)
+{
+#ifdef CONFIG_ARCH_ROCKCHIP
+	struct NS16550 *const com_port = dev_get_priv(dev);
+
+	/*
+	 * Wait fifo flush.
+	 *
+	 * UART_USR: bit2 trans_fifo_empty:
+	 *	0 = Transmit FIFO is not empty
+	 *	1 = Transmit FIFO is empty
+	 */
+	while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
+		;
+#endif
+	return 0;
+}
+
 int ns16550_serial_probe(struct udevice *dev)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
@@ -521,6 +525,7 @@ const struct dm_serial_ops ns16550_serial_ops = {
 	.pending = ns16550_serial_pending,
 	.getc = ns16550_serial_getc,
 	.setbrg = ns16550_serial_setbrg,
+	.clear = ns16550_serial_clear,
 };
 
 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)

commit c1e72b20c91289718b46e1d52185fbef59878daf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun May 5 12:50:43 2019 +0800

    dm: console/serial: add flushc() support
    
    Flush console data.
    
    Change-Id: If347b6c8d1126452a1f6386040693b30c66eb5fb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index 4990fdd69a..a6fd9c4322 100644
--- a/common/console.c
+++ b/common/console.c
@@ -256,6 +256,18 @@ static inline void console_doenv(int file, struct stdio_dev *dev)
 {
 	iomux_doenv(file, dev->name);
 }
+
+static void console_clear(int file)
+{
+	int i;
+	struct stdio_dev *dev;
+
+	for (i = 0; i < cd_count[file]; i++) {
+		dev = console_devices[file][i];
+		if (dev->clear != NULL)
+			dev->clear(dev);
+	}
+}
 #else
 static inline int console_getc(int file)
 {
@@ -283,6 +295,12 @@ static inline void console_puts(int file, const char *s)
 	stdio_devices[file]->puts(stdio_devices[file], s);
 }
 
+static inline void console_clear(int file)
+{
+	if (stdio_devices[file]->clear)
+		stdio_devices[file]->clear(stdio_devices[file]);
+}
+
 static inline void console_doenv(int file, struct stdio_dev *dev)
 {
 	console_setfile(file, dev);
@@ -361,6 +379,12 @@ void fputs(int file, const char *s)
 		console_puts(file, s);
 }
 
+void fclear(int file)
+{
+	if (file < MAX_FILES)
+		console_clear(file);
+}
+
 int fprintf(int file, const char *fmt, ...)
 {
 	va_list args;
@@ -434,6 +458,19 @@ int tstc(void)
 	return serial_tstc();
 }
 
+void flushc(void)
+{
+#ifdef CONFIG_DISABLE_CONSOLE
+	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
+		return;
+#endif
+
+	if (gd->flags & GD_FLG_DEVINIT)
+		fclear(stdout);
+	else
+		serial_clear();
+}
+
 #define PRE_CONSOLE_FLUSHPOINT1_SERIAL			0
 #define PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL	1
 
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 0c7a4d7c87..c86766bb44 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -279,6 +279,18 @@ void serial_setbrg(void)
 		ops->setbrg(gd->cur_serial_dev, gd->baudrate);
 }
 
+void serial_clear(void)
+{
+	struct dm_serial_ops *ops;
+
+	if (!gd->cur_serial_dev)
+		return;
+
+	ops = serial_get_ops(gd->cur_serial_dev);
+	if (ops->setbrg)
+		ops->clear(gd->cur_serial_dev);
+}
+
 void serial_stdio_init(void)
 {
 }
diff --git a/include/common.h b/include/common.h
index e300aa3c25..62081face0 100644
--- a/include/common.h
+++ b/include/common.h
@@ -548,6 +548,7 @@ void smp_kick_all_cpus(void);
 int	serial_init   (void);
 void	serial_setbrg (void);
 void	serial_putc   (const char);
+void	serial_clear  (void);
 void	serial_putc_raw(const char);
 void	serial_puts   (const char *);
 int	serial_getc   (void);
diff --git a/include/stdio.h b/include/stdio.h
index aedf374452..4ba2f0e283 100644
--- a/include/stdio.h
+++ b/include/stdio.h
@@ -15,6 +15,7 @@ int tstc(void);
 		defined(CONFIG_SPL_SERIAL_SUPPORT))
 void putc(const char c);
 void puts(const char *s);
+void flushc(void);
 int __printf(1, 2) printf(const char *fmt, ...);
 int vprintf(const char *fmt, va_list args);
 #else
@@ -26,6 +27,10 @@ static inline void puts(const char *s)
 {
 }
 
+static inline void flushc(void)
+{
+}
+
 static inline int __printf(1, 2) printf(const char *fmt, ...)
 {
 	return 0;
diff --git a/include/stdio_dev.h b/include/stdio_dev.h
index 3164fa2a55..5b13ebf2be 100644
--- a/include/stdio_dev.h
+++ b/include/stdio_dev.h
@@ -36,6 +36,9 @@ struct stdio_dev {
 	/* To put a string (accelerator) */
 	void (*puts)(struct stdio_dev *dev, const char *s);
 
+/* Clear functions */
+	void (*clear)(struct stdio_dev *dev);
+
 /* INPUT functions */
 
 	/* To test if a char is ready... */

commit 3bee194f53c141c25ed866431dc198ee12fb0f86
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 7 18:45:08 2019 +0800

    lib: sysmem: add sysmem_can_alloc() interface
    
    Check if the region can be sysmem allocated.
    
    Change-Id: I26a524c1597bee65ab1282da5ec373b9603866ba
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
index f32b63a03b..2a51898388 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -93,6 +93,16 @@ void *sysmem_alloc_base_by_name(const char *name,
 void *sysmem_fdt_reserve_alloc_base(const char *name,
 				    phys_addr_t base, phys_size_t size);
 
+/**
+ * sysmem_can_alloc() - Check if the region can be allocated
+ *
+ * @base: region base
+ * @size: region size
+ *
+ * @return true on okay.
+ */
+bool sysmem_can_alloc(phys_size_t base, phys_size_t size);
+
 /**
  * sysmem_free() - Free allocated sysmem region
  *
@@ -128,6 +138,11 @@ static inline void *sysmem_alloc(enum memblk_id id, phys_size_t size)
 	return malloc(size);
 }
 
+static inline bool sysmem_can_alloc(phys_size_t base, phys_size_t size)
+{
+	return true;
+}
+
 static inline void *sysmem_alloc_base(enum memblk_id id,
 				      phys_addr_t base, phys_size_t size)
 {
diff --git a/lib/sysmem.c b/lib/sysmem.c
index e65a28d60d..9b11e9f4b2 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -354,7 +354,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				 name, (ulong)base, (ulong)(base + size),
 				 (ulong)paddr, (ulong)(paddr + size));
 			/* Free what we don't want allocated region */
-			if (lmb_free(&sysmem->lmb, paddr, alloc_size))
+			if (lmb_free(&sysmem->lmb, paddr, alloc_size) < 0)
 				SYSMEM_E("Failed to free \"%s\"\n", name);
 
 			goto out;
@@ -435,6 +435,38 @@ void *sysmem_fdt_reserve_alloc_base(const char *name,
 	return paddr;
 }
 
+bool sysmem_can_alloc(phys_size_t base, phys_size_t size)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	phys_addr_t alloc_base;
+	phys_addr_t paddr;
+	int ret;
+
+	if (!sysmem_has_init())
+		return false;
+
+	/* LMB is align down alloc mechanism */
+	alloc_base = base + size;
+	paddr = __lmb_alloc_base(&sysmem->lmb,
+				 size,
+				 SYSMEM_ALLOC_NO_ALIGN,
+				 alloc_base);
+	if (paddr) {
+		/* If free failed, return false */
+		ret = lmb_free(&sysmem->lmb, base, size);
+		if (ret < 0) {
+			SYSMEM_E("Can't free at 0x%08lx - 0x%08lx, ret=%d\n",
+				 (ulong)base, (ulong)(base + size), ret);
+			return false;
+		}
+	} else {
+		SYSMEM_D("Can't alloc at 0x%08lx - 0x%08lx\n",
+			 (ulong)base, (ulong)(base + size));
+	}
+
+	return (paddr == base) ? true : false;
+}
+
 int sysmem_free(phys_addr_t base)
 {
 	struct sysmem *sysmem = &plat_sysmem;

commit f6e15301658097e63b41855426a3fdbb258afe63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 7 17:34:27 2019 +0800

    lib: sysmem: support avb android memblk sysmem alloc
    
    Because avb android image usually needs a large memory buffer,
    always alloc avb android memblk right after U-Boot stack is a
    better choice to avoid memblk overlap with others.
    
    Since we have overflow protect magic for U-Boot stack, so we add
    a pad(4KB) between them.
    
    Change-Id: I72655d022f7e82f1ed9fbb381424d04bc86ccf6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
index 7d288ab080..a9cd04b0a7 100644
--- a/arch/arm/mach-rockchip/memblk.c
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -61,6 +61,10 @@ const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
 		.name = "ANDROID",
 		.flags = M_ATTR_OFC,
 	},
+	[MEMBLK_ID_AVB_ANDROID]  =	{
+		.name = "AVB_ANDROID",
+		.flags = M_ATTR_OFC,
+	},
 };
 
 const struct memblk_attr *mem_attr = plat_mem_attr;
diff --git a/include/memblk.h b/include/memblk.h
index 3a2eb3b6b7..7226c81e44 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -26,6 +26,7 @@ enum memblk_id {
 	MEMBLK_ID_FDT_AOSP,
 	MEMBLK_ID_KERNEL,
 	MEMBLK_ID_ANDROID,
+	MEMBLK_ID_AVB_ANDROID,
 
 	/* Other */
 	MEMBLK_ID_BY_NAME,
diff --git a/lib/sysmem.c b/lib/sysmem.c
index be14ada671..e65a28d60d 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -245,6 +245,15 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
 		attr = mem_attr[id];
 		name = attr.name;
+
+		/*
+		 * Fixup base and place right after U-Boot stack, adding a lot
+		 * of space(4KB) maybe safer.
+		 */
+		if ((id == MEMBLK_ID_AVB_ANDROID) &&
+		    (base == SYSMEM_ALLOC_ANYWHERE))
+			base = gd->start_addr_sp -
+					CONFIG_SYS_STACK_SIZE - size - 0x1000;
 	} else {
 		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
 		goto out;

commit dcb404a6770682d7f913c9e6579f4c39a917ff15
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue May 7 17:34:04 2019 +0800

    lib: sysmem: add sysmem_alloc() interface
    
    Change-Id: I3ae1fe618ba1bb9c7924bb9816884eb26927dc1e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
index 0a5d807f82..f32b63a03b 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -7,6 +7,7 @@
 #define _SYSMEM_H
 
 #include <memblk.h>
+#include <malloc.h>
 
 /*
  * CONFIG_SYS_FDT_PAD default value is sync with bootm framework in:
@@ -121,6 +122,12 @@ static inline int sysmem_initr(void) { return 0; }
 static inline int sysmem_free(phys_addr_t base) { return 0; }
 static inline void sysmem_dump(void) {}
 __weak int board_sysmem_reserve(struct sysmem *sysmem) { return 0; }
+
+static inline void *sysmem_alloc(enum memblk_id id, phys_size_t size)
+{
+	return malloc(size);
+}
+
 static inline void *sysmem_alloc_base(enum memblk_id id,
 				      phys_addr_t base, phys_size_t size)
 {
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 7ec9c1479f..be14ada671 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -364,6 +364,21 @@ out:
 	return (attr.flags & M_ATTR_PEEK) ? (void *)base : NULL;
 }
 
+void *sysmem_alloc(enum memblk_id id, phys_size_t size)
+{
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(id,
+					NULL,
+					SYSMEM_ALLOC_ANYWHERE,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
+}
+
 void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size)
 {
 	void *paddr;

commit d92ffd1e4829da5a26463553e2b80f6516712e0c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue May 7 15:59:36 2019 +0800

    common: android: do not start kernel when read kernel failed
    
    Change-Id: I032776022378078baae8e59ed8d746ccf13ed373
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 048de0f7ea..67cc083916 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -297,10 +297,10 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 
 		ret = blk_dread(dev_desc, blk_start,
 				blk_cnt, android_load_address);
-		if (ret < 0) {
+		if (ret != blk_cnt) {
 			debug("%s: read kernel failed, ret=%d\n",
 			      __func__, ret);
-			return ret;
+			return -1;
 		}
 		blk_read += ret;
 	}
@@ -318,10 +318,10 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 
 		ret = blk_dread(dev_desc, blk_start,
 				blk_cnt, (void *)ramdisk_addr_r);
-		if (ret < 0) {
+		if (ret != blk_cnt) {
 			debug("%s: read ramdisk failed, ret=%d\n",
 			      __func__, ret);
-			return ret;
+			return -1;
 		}
 		blk_read += ret;
 	}
@@ -354,9 +354,9 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 			return -ENXIO;
 
 		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
-		if (ret < 0) {
+		if (ret != blk_cnt) {
 			debug("%s: read dtb failed, ret=%d\n", __func__, ret);
-			return ret;
+			return -1;
 		}
 
 		blk_read += blk_cnt;

commit efda1f1db3f4fc77c65c060b5bdb91d223df5d69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 29 20:07:59 2019 +0800

    lib: sysmem: support M_ATTR_PEEK for memblk
    
    - always return successful for M_ATTR_PEEK;
    - add code comments;
    
    Change-Id: I3c7f939ac61d8da5948978de4e70f17576748c91
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/memblk.h b/include/memblk.h
index bba5de000e..3a2eb3b6b7 100644
--- a/include/memblk.h
+++ b/include/memblk.h
@@ -59,5 +59,7 @@ extern const struct memblk_attr *mem_attr;
 #define M_ATTR_HOFC		(1 << 1)
 /* Memory can be overlap by fdt reserved memory */
 #define M_ATTR_OVERLAP		(1 << 2)
+/* Just peek, always return success */
+#define M_ATTR_PEEK		(1 << 3)
 
 #endif /* _MEMBLK_H */
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 952a5e1894..7ec9c1479f 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -200,13 +200,22 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	int i;
 
 	if (!sysmem_has_init())
-		return NULL;
+		goto out;
 
 	if (id == MEMBLK_ID_BY_NAME || id == MEMBLK_ID_FDT_RESV) {
 		if (!mem_name) {
 			SYSMEM_E("NULL name for alloc sysmem\n");
-			return NULL;
+			goto out;
 		} else if (id == MEMBLK_ID_FDT_RESV) {
+
+			/*
+			 * Allow fdt reserved memory to overlap with the region
+			 * only used in U-Boot, like: stack, fastboot, u-boot...
+			 * these regions are marked as M_ATTR_OVERLAP in flags.
+			 *
+			 * Here we check whether it overlaps with others, if
+			 * so, set req_overlap as true.
+			 */
 			for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 				if (!gd->bd->bi_dram[i].size)
 					continue;
@@ -220,9 +229,15 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				}
 			}
 
+			/*
+			 * If this request region is out size of all available
+			 * region, ignore and return success.
+			 */
 			if (!req_overlap)
 				return (void *)base;
 		}
+
+		/* Find name, id and attr by outer mem_name */
 		name = sysmem_alias2name(mem_name, (int *)&id);
 		attr = mem_attr[id];
 		if (!attr.name)
@@ -232,18 +247,18 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		name = attr.name;
 	} else {
 		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
-		return NULL;
+		goto out;
 	}
 
 	if (!size) {
 		SYSMEM_E("\"%s\" size is 0 for alloc sysmem\n", name);
-		return NULL;
+		goto out;
 	}
 
 	if (!IS_ALIGNED(base, 4)) {
 		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n",
 			 name, (ulong)base);
-		return NULL;
+		goto out;
 	}
 
 	/* Must be 4-byte aligned */
@@ -259,12 +274,17 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			 mem->attr.name, (ulong)mem->base,
 			 (ulong)(mem->base + mem->size));
 		if (!strcmp(mem->attr.name, name)) {
+			/* Allow double alloc for same but smaller region */
 			if (mem->base <= base && mem->size >= size)
 				return (void *)base;
 
 			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
-			return NULL;
+			goto out;
 		} else if (sysmem_is_overlap(mem->base, mem->size, base, size)) {
+			/*
+			 * If this new alloc region expects overlap and the old
+			 * region is also allowed to be overlap, just do reserve.
+			 */
 			if (req_overlap && mem->attr.flags & M_ATTR_OVERLAP) {
 				if (lmb_reserve(&sysmem->lmb, base, size))
 					SYSMEM_E("Failed to overlap alloc \"%s\" "
@@ -280,7 +300,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				 name, (ulong)base, (ulong)(base + size),
 				 mem->attr.name, (ulong)mem->base,
 				 (ulong)(mem->base + mem->size));
-			return NULL;
+			goto out;
 		}
 	}
 
@@ -302,7 +322,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			mem = malloc(sizeof(*mem));
 			if (!mem) {
 				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
-				return NULL;
+				goto out;
 			}
 
 			mem->base = paddr;
@@ -311,6 +331,7 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			sysmem->allocated_cnt++;
 			list_add_tail(&mem->node, &sysmem->allocated_head);
 
+			/* Add overflow check magic */
 			if (mem->attr.flags & M_ATTR_OFC) {
 				check = (struct memcheck *)(paddr + size);
 				check->magic = SYSMEM_MAGIC;
@@ -323,10 +344,11 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 				 "but at 0x%08lx - x%08lx\n",
 				 name, (ulong)base, (ulong)(base + size),
 				 (ulong)paddr, (ulong)(paddr + size));
+			/* Free what we don't want allocated region */
 			if (lmb_free(&sysmem->lmb, paddr, alloc_size))
 				SYSMEM_E("Failed to free \"%s\"\n", name);
 
-			return NULL;
+			goto out;
 		}
 	} else {
 		SYSMEM_E("Failed to alloc \"%s\" at 0x%08lx - 0x%08lx\n",
@@ -337,6 +359,9 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		 name, (ulong)paddr, (ulong)size, (u32)align, !base);
 
 	return (void *)paddr;
+
+out:
+	return (attr.flags & M_ATTR_PEEK) ? (void *)base : NULL;
 }
 
 void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size)

commit 50d35c453ff270454024cad52411a1fb0f6e5990
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Apr 12 15:43:14 2019 +0800

    rockchip: board: add amp cpus on
    
    implement cpu_secondary_init_r().
    
    Change-Id: I840db566f18ee7dd270eb837ce0fd9a4e2409ebe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 16136442df..56ceae23e2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <amp.h>
 #include <clk.h>
 #include <bidram.h>
 #include <dm.h>
@@ -516,6 +517,13 @@ parse_fn_t board_bidram_parse_fn(void)
 }
 #endif
 
+#ifdef CONFIG_ROCKCHIP_AMP
+void cpu_secondary_init_r(void)
+{
+	amp_cpus_on();
+}
+#endif
+
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)

commit 94aee224c6c1fd1607d860adb80d0ecd12b0cef2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon May 6 09:45:35 2019 +0800

    rockchip: param: use module config to decide whether use atags parameters
    
    We can not call some drivers if this driver is closed. But this time we use
    the parameters passed by atags directly but not test the drivers whether
    exist. Add it.
    
    Change-Id: I857ccf3b3e23a9e92502868d1514849770390ebb
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 0d422c92b4..409354f613 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -162,6 +162,7 @@ int param_parse_bootdev(char **devtype, char **devnum)
 	t = atags_get_tag(ATAG_BOOTDEV);
 	if (t) {
 		switch (t->u.bootdev.devtype) {
+#ifdef CONFIG_DM_MMC
 		case BOOT_TYPE_EMMC:
 			*devtype = "mmc";
 			*devnum = "0";
@@ -186,22 +187,31 @@ int param_parse_bootdev(char **devtype, char **devnum)
 				env_update("bootargs", "sdfwupdate");
 			}
 			break;
+#endif
+#ifdef CONFIG_RKNAND
 		case BOOT_TYPE_NAND:
 			*devtype = "rknand";
 			*devnum = "0";
 			break;
+#endif
+#ifdef CONFIG_RKSFC_NAND
 		case BOOT_TYPE_SPI_NAND:
 			*devtype = "spinand";
 			*devnum = "0";
 			break;
+#endif
+#ifdef CONFIG_RKSFC_NOR
 		case BOOT_TYPE_SPI_NOR:
 			*devtype = "spinor";
 			*devnum = "1";
 			break;
+#endif
+#ifdef CONFIG_DM_RAMDISK
 		case BOOT_TYPE_RAM:
 			*devtype = "ramdisk";
 			*devnum = "0";
 			break;
+#endif
 		default:
 			printf("Unknown bootdev type: 0x%x\n",
 			       t->u.bootdev.devtype);

commit f149c047e6d0de656595d14d723eace0bd8fe209
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:32:38 2019 +0800

    clk: rockchip: rk3036: fix up the assert error
    
    Change-Id: Id987e8847dbe97e5502259a9432dac85782769f3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 50fc42d784..4b242b4b7b 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -121,10 +121,10 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * core hz : apll = 1:1
 	 */
 	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+	assert((aclk_div + 1) * CORE_ACLK_HZ <= APLL_HZ && aclk_div < 0x7);
 
 	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+	assert((pclk_div + 1) * CORE_PERI_HZ <= APLL_HZ && pclk_div < 0xf);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
@@ -141,13 +141,13 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * BUS_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
+	assert((pclk_div + 1) * BUS_PCLK_HZ <= BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
+	assert((hclk_div + 1) * BUS_HCLK_HZ <= BUS_ACLK_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
@@ -164,14 +164,14 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div < 0x4));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && pclk_div < 0x8);
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit 27b00bb2a4993e517d042a4588ad6b6ec8764745
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:32:12 2019 +0800

    clk: rockchip: rk3066: fix up the assert error
    
    Change-Id: I4d75bef4f1450e2cb467eb106b81e80eb8f582d1
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index dc324350dc..7dc435395b 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -411,7 +411,7 @@ static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = RATE_TO_DIV(GPLL_HZ, CPU_ACLK_HZ);
-	assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * CPU_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CPU_ACLK_PLL_MASK |
@@ -420,11 +420,11 @@ static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
 		     aclk_div << A9_CPU_DIV_SHIFT);
 
 	hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ);
-	assert((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3);
+	assert((1 << hclk_div) * CPU_HCLK_HZ <= CPU_ACLK_HZ && hclk_div < 0x3);
 	pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ);
-	assert((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4);
+	assert((1 << pclk_div) * CPU_PCLK_HZ <= CPU_ACLK_HZ && pclk_div < 0x4);
 	h2p_div = ilog2(CPU_HCLK_HZ / CPU_H2P_HZ);
-	assert((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3);
+	assert((1 << h2p_div) * CPU_H2P_HZ <= CPU_HCLK_HZ && pclk_div < 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     AHB2APB_DIV_MASK |
@@ -439,14 +439,14 @@ static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div < 0x4));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && (pclk_div < 0x4));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit d177ad999c5c4bbe9d2582086b39405e6e9d0834
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:31:35 2019 +0800

    clk: rockchip: rk3188: fix up the assert error
    
    Change-Id: I690798cd9a17e266c32d702f5b2c8bfdc413d970
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 757328f4bc..857fbf42da 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -441,7 +441,7 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, CPU_ACLK_HZ) - 1;
-	assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * CPU_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CPU_ACLK_PLL_MASK << CPU_ACLK_PLL_SHIFT |
@@ -450,11 +450,11 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 		     aclk_div << A9_CPU_DIV_SHIFT);
 
 	hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ);
-	assert((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3);
+	assert((1 << hclk_div) * CPU_HCLK_HZ <= CPU_ACLK_HZ && hclk_div < 0x3);
 	pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ);
-	assert((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4);
+	assert((1 << pclk_div) * CPU_PCLK_HZ <= CPU_ACLK_HZ && pclk_div < 0x4);
 	h2p_div = ilog2(CPU_HCLK_HZ / CPU_H2P_HZ);
-	assert((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3);
+	assert((1 << h2p_div) * CPU_H2P_HZ <= CPU_HCLK_HZ && pclk_div < 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     AHB2APB_DIV_MASK << AHB2APB_DIV_SHIFT |
@@ -469,14 +469,14 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div < 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div < 0x4));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && (pclk_div < 0x4));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit a0af2ba7c791f16daf771b7051be552699ec8120
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:30:58 2019 +0800

    clk: rockchip: rk3288: fix up the assert error
    
    Change-Id: I066a217b15108db21821c63bd7709fb430d34f45
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index b42d36cbd0..eb5ec6ec5b 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -544,13 +544,13 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PD_BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * PD_BUS_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 	hclk_div = PD_BUS_ACLK_HZ / PD_BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PD_BUS_HCLK_HZ ==
+	assert((hclk_div + 1) * PD_BUS_HCLK_HZ <=
 		PD_BUS_ACLK_HZ && (hclk_div <= 0x3) && (hclk_div != 0x2));
 
 	pclk_div = PD_BUS_ACLK_HZ / PD_BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PD_BUS_PCLK_HZ ==
+	assert((pclk_div + 1) * PD_BUS_PCLK_HZ <=
 		PD_BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
@@ -566,14 +566,14 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ <= GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+	assert((1 << hclk_div) * PERI_HCLK_HZ <=
 		PERI_ACLK_HZ && (hclk_div <= 0x2));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+	assert((1 << pclk_div) * PERI_PCLK_HZ <=
 		PERI_ACLK_HZ && (pclk_div <= 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],

commit 3469bfafc45bb7bb173f1497ed3fe9c51a308e06
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Wed Apr 24 17:48:17 2019 +0800

    configs: rk3399pro: enable avb and dtbo for Android P.
    
    Change-Id: I7e3c95d1dbdfded7c89f70b1df9f38a7468573ed
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 95a3dc9559..e37eeb8030 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
@@ -28,6 +29,7 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -135,5 +137,14 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 94cf1096eeb0e0cb82da8730a3078200e904f351
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 10:11:31 2019 +0800

    power: charge animation: fix cmd compile error
    
    cmd depends on DM_CHARGE_DISPLAY and default y.
    
    Change-Id: I5e685e0020c4aa1da80ffc27e5a576bc8969c3be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8f29f886c4..c2d90640f4 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1299,6 +1299,8 @@ config CMD_REGULATOR
 
 config CMD_CHARGE_DISPLAY
 	bool "Enable Driver Model Charge Display command"
+	depends on DM_CHARGE_DISPLAY
+	default y
 	help
 	  Support U-Boot charge display.
 
diff --git a/cmd/charge.c b/cmd/charge.c
index a06eae90c7..bb7a89d771 100644
--- a/cmd/charge.c
+++ b/cmd/charge.c
@@ -10,8 +10,8 @@
 #include <power/charge_display.h>
 #include <power/charge_animation.h>
 
-static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char *const argv[])
+static int do_charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	int on_soc, on_voltage, screen_voltage;
 	int ret, save[3];
@@ -61,7 +61,7 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-U_BOOT_CMD(charge, 4, 0, charge_display,
+U_BOOT_CMD(charge, 4, 0, do_charge_display,
 	   "Charge display",
 	   "-charge\n"
 	   "-charge <power on soc> <power on voltage> <screen on voltage>"
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index 21ea45e9ea..e1a02e7376 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <power/charge_display.h>
 
-static int charge_display_show(struct udevice *dev)
+int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
 
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 19f0efabbe..3077b7b856 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -12,5 +12,6 @@ struct dm_charge_display_ops {
 };
 
 int charge_display(void);
+int charge_display_show(struct udevice *dev);
 
 #endif

commit 6213b40154e08b6dffe52137bdd3a46a2512655a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 30 10:40:36 2019 +0800

    cmd: CMD_DTMIG: select OF_LIBFDT_OVERLAY
    
    Change-Id: I67d7040d477712169c815273dfaf913a4cf258e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 11e1d8a79a..8f29f886c4 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -233,6 +233,7 @@ config CMD_BOOTMENU
 
 config CMD_DTIMG
 	bool "dtimg"
+	select OF_LIBFDT_OVERLAY
 	help
 	  Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from
 	  image into RAM, dump image structure information, etc. Those dtb/dtbo

commit c9f547d895408bcd9120ba74a2c7a1f14cc9dcb0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 28 16:56:51 2019 +0800

    rockchip: param: add sdupdate variable to indicate card function
    
    Add sdupdate variable to receive card function info from preloader atags.
    If the sd card is updated-card, set sdupdate to bootargs. otherwise test
    whether the sd cart is ROCKCHIP_SD_UPDATE_CARD or not by rkimgtest cmd.
    
    Change-Id: I6c09ade4a31a2e4c8349245e9e345f735afd11e9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index b9028b35d2..bdb6254378 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -41,6 +41,10 @@
 #define BOOT_TYPE_SPI_NAND	(1 << 5)
 #define BOOT_TYPE_RAM		(1 << 6)
 
+/* define sd card function */
+#define SD_UNKNOWN_CARD		0
+#define SD_UPDATE_CARD		1
+
 /* tag_serial.m_mode */
 #define SERIAL_M_MODE_M0	0x0
 #define SERIAL_M_MODE_M1	0x1
@@ -67,7 +71,8 @@ struct tag_bootdev {
 	u32 devtype;
 	u32 devnum;
 	u32 mode;
-	u32 reserved[7];
+	u32 sdupdate;
+	u32 reserved[6];
 	u32 hash;
 } __packed;
 
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 6cf867686e..0d422c92b4 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -170,6 +170,21 @@ int param_parse_bootdev(char **devtype, char **devnum)
 		case BOOT_TYPE_SD1:
 			*devtype = "mmc";
 			*devnum = "1";
+			/*
+			 * If preloader does not pass sdupdate value, we treat it
+			 * as a unknown card and call the rkimgtest cmd to find
+			 * out what it is.
+			 *
+			 * If preloader pass sdupdate value as an update card,
+			 * we just set "sdfwupdate" to bootargs instead of
+			 * calling rkimgtest cmd which consumes time.
+			 */
+			if (t->u.bootdev.sdupdate == SD_UNKNOWN_CARD) {
+				run_command("mmc dev 1", 0);
+				run_command("rkimgtest mmc 1", 0);
+			} else if (t->u.bootdev.sdupdate == SD_UPDATE_CARD) {
+				env_update("bootargs", "sdfwupdate");
+			}
 			break;
 		case BOOT_TYPE_NAND:
 			*devtype = "rknand";

commit ff21a545f585482c9bfef04759ee6ea69553da35
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 15 17:52:53 2019 +0800

    rockchip: resource: fix parse gpio base address error
    
    We should parse node name to identify the gpio port before
    reading base address, it avoids to use miss match address.
    
    Move out gpio_parse_base_address() from sub string parse is
    better.
    
    Set gpio as input mode before reading.
    
    Change-Id: Iffd4ef7f3ceb1bb56a65680265af74ca50b14712
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 50598d89fd..83d0faf584 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -414,6 +414,7 @@ int rockchip_read_resource_file(void *buf, const char *name,
 #define KEY_WORDS_ADC_CTRL	"#_"
 #define KEY_WORDS_ADC_CH	"_ch"
 #define KEY_WORDS_GPIO		"#gpio"
+#define GPIO_SWPORT_DDR		0x04
 #define GPIO_EXT_PORT		0x50
 #define MAX_ADC_CH_NR		10
 #define MAX_GPIO_NR		10
@@ -518,7 +519,8 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 {
 	static int initial;
 	ofnode parent, node;
-	int i = 0;
+	const char *name;
+	int idx, nr = 0;
 
 	if (initial)
 		return 0;
@@ -535,11 +537,19 @@ static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 			continue;
 		}
 
-		gpio_base_addr[i++] = ofnode_get_addr(node);
-		debug("   - gpio%d: 0x%x\n", i - 1, (uint32_t)gpio_base_addr[i - 1]);
+		name = ofnode_get_name(node);
+		if (!is_digit((char)*(name + 4))) {
+			debug("   - bad gpio node name: %s\n", name);
+			continue;
+		}
+
+		nr++;
+		idx = *(name + 4) - '0';
+		gpio_base_addr[idx] = ofnode_get_addr(node);
+		debug("   - gpio%d: 0x%x\n", idx, (uint32_t)gpio_base_addr[idx]);
 	}
 
-	if (i == 0) {
+	if (nr == 0) {
 		debug("   - parse gpio address failed\n");
 		return -EINVAL;
 	}
@@ -574,6 +584,14 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 
 	debug("%s\n", file_name);
 
+	/* Parse gpio address */
+	memset(gpio_base_addr, 0, sizeof(gpio_base_addr));
+	ret = gpio_parse_base_address(gpio_base_addr);
+	if (ret) {
+		debug("   - Can't parse gpio base address: %d\n", ret);
+		return ret;
+	}
+
 	strgpio = strstr(file_name, KEY_WORDS_GPIO);
 	while (strgpio) {
 		debug("   - substr: %s\n", strgpio);
@@ -588,13 +606,6 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 			return -EINVAL;
 		}
 
-		/* Parse gpio address */
-		ret = gpio_parse_base_address(gpio_base_addr);
-		if (ret) {
-			debug("   - Can't parse gpio base address: %d\n", ret);
-			return ret;
-		}
-
 		/* Read gpio value */
 		port = *(p + 0) - '0';
 		bank = *(p + 1) - 'a';
@@ -606,9 +617,20 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 		 * is enough. We use cached_v[] to save what we have read, zero
 		 * means not read before.
 		 */
-		if (cached_v[port] == 0)
+		if (cached_v[port] == 0) {
+			if (!gpio_base_addr[port]) {
+				debug("   - can't find gpio%d base address\n", port);
+				return 0;
+			}
+
+			/* Input mode */
+			val = readl(gpio_base_addr[port] + GPIO_SWPORT_DDR);
+			val &= ~(1 << (bank * 8 + pin));
+			writel(val, gpio_base_addr[port] + GPIO_SWPORT_DDR);
+
 			cached_v[port] =
 				readl(gpio_base_addr[port] + GPIO_EXT_PORT);
+		}
 
 		/* Verify result */
 		bit = bank * 8 + pin;
@@ -623,7 +645,7 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 		}
 
 		debug("   - parse: gpio%d%c%d=%d, read=%d %s\n",
-		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "");
+		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "(N)");
 	}
 
 	return found ? 0 : -ENOENT;

commit efb93541fe4c1a54c73e46cae12ebf460bae6a9e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Mar 25 14:57:59 2019 +0800

    lib: optee_client: add module name in print func
    
    Change-Id: I6cdcb0870bf5a3915009421e5c8b09584ac2bb6c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index 01f24ddb3e..bb8be33945 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -19,12 +19,12 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 
 	status = OpteeClientMemInit();
 	if (status != TEEC_SUCCESS) {
-		printf("OpteeClientMemInit fail!");
+		printf("TEEC: OpteeClientMemInit fail!\n");
 		return status;
 	}
 	status = OpteeClientRkFsInit();
 	if (status != TEEC_SUCCESS) {
-		printf("OpteeClientRkFsInit fail!");
+		printf("TEEC: OpteeClientRkFsInit fail!\n");
 		return status;
 	}
 
@@ -61,7 +61,7 @@ TEEC_Result TEEC_InitializeContext(const char *name,
 	memset(context, 0, sizeof(*context));
 
 exit:
-	debug("TEEC_InitializeContext Exit : teecresult=0x%X\n\n", teecresult);
+	debug("TEEC_InitializeContext Exit : teecresult=0x%X\n", teecresult);
 	return teecresult;
 }
 
@@ -243,7 +243,7 @@ Exit:
 	if (error_origin != NULL)
 		*error_origin = TeecErrorOrigin;
 
-	debug("TEEC_OpenSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+	debug("TEEC_OpenSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
 				TeecResult, TeecErrorOrigin);
 	return TeecResult;
 }
@@ -265,7 +265,7 @@ void TEEC_CloseSession(TEEC_Session *session)
 	TeecResult = TEEC_SMC_CloseSession(session, &TeecErrorOrigin);
 
 Exit:
-	debug("TEEC_CloseSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+	debug("TEEC_CloseSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
 			TeecResult, TeecErrorOrigin);
 	return;
 }
@@ -304,7 +304,7 @@ Exit:
 	if (error_origin != NULL)
 		*error_origin = TeecErrorOrigin;
 
-	debug("TEEC_InvokeCommand Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+	debug("TEEC_InvokeCommand Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
 				TeecResult, TeecErrorOrigin);
 
 	return TeecResult;
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index c2f931ecc3..ba3ce52c16 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1054,7 +1054,6 @@ exit:
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index d290567d83..899be36b58 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -25,7 +25,7 @@ ALLOC_FLAG alloc_flags[50];
 int my_malloc_init(void *start, uint32_t size)
 {
 	if (start == NULL || size == 0) {
-		printf("malloc init fail!");
+		printf("TEEC: malloc init fail!\n");
 		return -1;
 	}
 	memset(start, 0, size);
@@ -34,7 +34,7 @@ int my_malloc_init(void *start, uint32_t size)
 	if (my_flag == NULL) {
 		my_flag = malloc(size/4096);
 		if (my_flag == NULL) {
-			printf("malloc fail!");
+			printf("TEEC: malloc fail!\n");
 			return -1;
 		}
 	}
@@ -100,7 +100,7 @@ void *my_malloc(uint32_t size)
 					memset(my_mem_start +
 						(i + k) * 4096, 0, 4096);
 				}
-				debug(" malloc is: 0x%X  0x%X\n",
+				debug("TEEC: malloc is: 0x%X  0x%X\n",
 					(int)i, (int)num);
 				write_usedblock((my_mem_start + i * 4096),
 					num * 4096);
@@ -127,7 +127,7 @@ void my_free(void *ptr)
 		return;
 
 	num = (size-1)/4096+1;
-	debug(" free is: 0x%X  0x%X\n", i, num);
+	debug("TEEC: free is: 0x%X  0x%X\n", i, num);
 
 	for (j = 0; j < num; j++) {
 		*(my_flag + i + j) = 0;
@@ -152,7 +152,7 @@ int OpteeClientMemInit(void)
 
 	tee_smc_call(&ArmSmcArgs);
 
-	debug("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
+	debug("TEEC: get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
 	      ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
 	return my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index c2ddbc381d..5fb9eeb6c4 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -130,9 +130,9 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy((void *)AllocAddress, ImageData, ImageSize);
 
-	debug("...TA loaded at 0x%zu of size 0x%X bytes\n",
+	debug("TEEC: ...TA loaded at 0x%zu of size 0x%X bytes\n",
 		AllocAddress, ImageSize);
-	debug("...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
+	debug("TEEC: ...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
 		*(char *)AllocAddress, *(char *)(AllocAddress+1));
 
 	TeeLoadTaCmd->va = AllocAddress;
@@ -144,7 +144,7 @@ Exit:
 	TeeSmc32Arg->ret = TeecResult;
 	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
 
-	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
@@ -166,15 +166,15 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy(uuid, (void *)&TeeSmc32Param[0].u.value, 16);
 	for (i = 0; i < 16; i++)
-		debug("uuid 0x%x", uuid[i]);
+		debug("TEEC: uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		debug("return size of TA, keymaster_size = 0\n");
+		debug("TEEC: return size of TA, keymaster_size = 0\n");
 		TeeSmc32Param[1].u.memref.size = 0;
 	} else {
 		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
-		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx\n",
+		debug("TEEC: memref.buf_ptr = 0x%llx; memref.size = 0x%llx\n",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);
 	}
@@ -183,7 +183,7 @@ Exit:
 	TeeSmc32Arg->ret = TeecResult;
 	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
 
-	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
@@ -214,7 +214,7 @@ TEEC_Result OpteeRpcCmdFreeTa(t_teesmc32_arg *TeeSmc32Arg)
 	AllocAddress = TeeSmc32Param[0].u.memref.buf_ptr;
 	ImageSize = TeeSmc32Param[0].u.memref.size;
 
-	debug("OpteeRpcCmdFreeTa Enter: AllocAddress=0x%X, ImageSize=0x%X\n",
+	debug("TEEC: OpteeRpcCmdFreeTa Enter: AllocAddress=0x%X, ImageSize=0x%X\n",
 			(uint32_t) AllocAddress, (uint32_t) ImageSize);
 
 	if (AllocAddress == 0) {
@@ -228,7 +228,7 @@ Exit:
 	TeeSmc32Arg->ret = TeecResult;
 	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
 
-	debug("OpteeRpcCmdFreeTa Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCmdFreeTa Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
@@ -253,7 +253,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	t_teesmc32_param *TeeSmc32Param;
 	struct mmc *mmc;
 
-	debug("Entered RPMB RPC\n");
+	debug("TEEC: Entered RPMB RPC\n");
 
 	if (TeeSmc32Arg->num_params != 2) {
 		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
@@ -308,7 +308,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		RequestMsgType = RPMB_PACKET_DATA_TO_UINT16(
 				RequestPackets->msg_type);
 
-		debug("RPMB Data request %d\n", RequestMsgType);
+		debug("TEEC: RPMB Data request %d\n", RequestMsgType);
 
 		switch (RequestMsgType) {
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM: {
@@ -403,7 +403,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 			TeecResult = TEEC_ERROR_BAD_PARAMETERS;
 			break;
 		}
-		debug("RPMB TeecResult %d\n", TeecResult);
+		debug("TEEC: RPMB TeecResult %d\n", TeecResult);
 		break;
 	}
 
@@ -505,7 +505,7 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 	t_teesmc32_param *TeeSmc32Param;
 
 	if (check_security_exist(0) < 0) {
-		printf("security partition not exist! unable to use RK FS!\n");
+		printf("TEEC: security partition not exist! unable to use RK FS!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -554,7 +554,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
 #endif
 #ifdef CONFIG_OPTEE_V2
-		debug("ArmSmcArgs->Arg1 = 0x%x \n", ArmSmcArgs->Arg1);
+		debug("TEEC: ArmSmcArgs->Arg1 = 0x%x \n", ArmSmcArgs->Arg1);
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
 		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
 		ArmSmcArgs->Arg1 = 0;
@@ -595,7 +595,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
 			(t_teesmc32_arg *)(size_t)((uint64_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
-		debug("TeeSmc32Arg->cmd = 0x%x\n", TeeSmc32Arg->cmd);
+		debug("TEEC: TeeSmc32Arg->cmd = 0x%x\n", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
 #ifdef CONFIG_OPTEE_V1
@@ -635,7 +635,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			uint32_t tempaddr;
 			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
 			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
-			debug("allocsize = 0x%x tempaddr = 0x%x\n", allocsize, tempaddr);
+			debug("TEEC: allocsize = 0x%x tempaddr = 0x%x\n", allocsize, tempaddr);
 			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
 			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
 			TeeSmc32Arg->params[0].u.memref.size = allocsize;
@@ -665,7 +665,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #endif
 
 		default: {
-			printf("...unsupported RPC CMD: cmd=0x%X\n",
+			printf("TEEC: ...unsupported RPC CMD: cmd=0x%X\n",
 				TeeSmc32Arg->cmd);
 			TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
 			break;
@@ -687,14 +687,14 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	default: {
-		printf("...unsupported RPC : Arg0=0x%X\n", ArmSmcArgs->Arg0);
+		printf("TEEC: ...unsupported RPC : Arg0=0x%X\n", ArmSmcArgs->Arg0);
 		TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
 		break;
 	}
 	}
 
 	ArmSmcArgs->Arg0 = TEESMC32_CALL_RETURN_FROM_RPC;
-	debug("OpteeRpcCallback Exit : TeecResult=0x%X\n", TeecResult);
+	debug("TEEC: OpteeRpcCallback Exit : TeecResult=0x%X\n", TeecResult);
 
 	return TeecResult;
 }
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index ce826d25d5..f06f24cd01 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -180,7 +180,7 @@ int check_security_exist(int print_flag)
 	if (!dev_desc) {
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
+			printf("TEEC: %s: Could not find device\n", __func__);
 			return -1;
 		}
 
@@ -188,7 +188,7 @@ int check_security_exist(int print_flag)
 					  "security", &part_info) < 0) {
 			dev_desc = NULL;
 			if (print_flag != 0)
-				printf("Could not find security partition\n");
+				printf("TEEC: Could not find security partition\n");
 			return -1;
 		}
 	}
@@ -221,7 +221,7 @@ static int rkss_begin_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
 	p.backup_enable = RKSS_BACKUP_ENABLE;
 	p.backup_count = 0;
@@ -231,7 +231,7 @@ static int rkss_begin_commit(void)
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -245,12 +245,12 @@ static int rkss_finish_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -269,7 +269,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -294,28 +294,28 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		}
 		if ((info_current.backup_data_index + info_current.backup_num) >
 			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-			printf("Not enough backup sections!");
+			printf("TEEC: Not enough backup sections!\n");
 			goto error;
 		}
-		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
 		backup_data = malloc(num * RKSS_DATA_LEN);
 		if (!backup_data) {
-			printf("malloc backup_data fail\n");
+			printf("TEEC: malloc backup_data fail\n");
 			goto error;
 		}
 
 		ret = blk_dread(dev_desc, index, num, backup_data);
 		if (ret != num) {
-			printf("blk_dread fail\n");
+			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
 		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 		free(backup_data);
@@ -330,7 +330,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 	}
@@ -356,7 +356,7 @@ static int rkss_resume(void)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -369,7 +369,7 @@ static int rkss_resume(void)
 
 			if (info_current.backup_usedflag ==
 			    RKSS_BACKUP_USEDFLAG) {
-				debug("rkss_resume backup_index=0x%x \
+				debug("TEEC: rkss_resume backup_index=0x%x \
 				      backup_num=0x%x \
 				      info_current.backup_data_index=0x%x\n",
 				      info_current.backup_index,
@@ -378,19 +378,19 @@ static int rkss_resume(void)
 				if ((info_current.backup_data_index +
 				    info_current.backup_num) >
 				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-					printf("backup sections error!");
+					printf("TEEC: backup sections error!");
 					goto error;
 				}
 				if ((info_current.backup_index +
 				    info_current.backup_num) >
 				    RKSS_DATA_SECTION_COUNT) {
-					printf("original sections error!");
+					printf("TEEC: original sections error!");
 					goto error;
 				}
 				backup_data = malloc(info_current.backup_num *
 						     RKSS_DATA_LEN);
 				if (!backup_data) {
-					printf("malloc backup_data fail\n");
+					printf("TEEC: malloc backup_data fail\n");
 					goto error;
 				}
 
@@ -399,7 +399,7 @@ static int rkss_resume(void)
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dread fail\n");
+					printf("TEEC: blk_dread fail\n");
 					return -1;
 				}
 
@@ -408,7 +408,7 @@ static int rkss_resume(void)
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dwrite fail\n");
+					printf("TEEC: blk_dwrite fail\n");
 					return -1;
 				}
 				free(backup_data);
@@ -419,7 +419,7 @@ static int rkss_resume(void)
 	memset(data, 0, sizeof(data));
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -438,7 +438,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -451,7 +451,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	result = rkss_backup_sections(index, num);
 	if (result < 0) {
-		printf("rkss_backup_sections fail\n");
+		printf("TEEC: rkss_backup_sections fail\n");
 		return -1;
 	}
 
@@ -460,7 +460,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -475,7 +475,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -504,12 +504,12 @@ static void rkss_dump_ptable(void)
 
 	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_LEN);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return;
 	}
 
@@ -539,7 +539,7 @@ static void rkss_dump_usedflags(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -559,7 +559,7 @@ static int rkss_verify_ptable(unsigned char *table_data)
 
 		if (verify->version != RKSS_VERSION
 				|| verify->checkstr != RKSS_CHECK_STR) {
-			printf("verify [%d] fail, cleanning ....", i);
+			printf("TEEC: verify [%d] fail, cleanning ....", i);
 			memset(cp, 0, RKSS_DATA_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
 			verify->version = RKSS_VERSION;
@@ -567,10 +567,10 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	}
 	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("verify ptable success.\n");
+	debug("TEEC: verify ptable success.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -584,7 +584,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...\n");
+			debug("TEEC: init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -594,14 +594,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.\n", ret);
+				printf("TEEC: clean usedflags section failed!!! ret: %d.\n", ret);
 				return TEEC_ERROR_GENERIC;
 			}
 
 			return TEEC_SUCCESS;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.\n");
+	debug("TEEC: rkss_verify_usedflags: sucess.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -617,7 +617,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -626,10 +626,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section!\n");
+		debug("TEEC: error: unused section!\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
+	debug("TEEC: rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -655,18 +655,18 @@ static int rkss_get_fileinfo_by_name(
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -684,7 +684,7 @@ static int rkss_get_fileinfo_by_name(
 
 			/* Full Matching*/
 			if (!strcmp(p->name, filename)) {
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
+				debug("TEEC: rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -713,14 +713,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while (cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s\n", p->name);
+			debug("TEEC: Matched folder: %s\n", p->name);
 			free(table_data);
 			return TEEC_ERROR_GENERIC;
 UNMATCHFOLDER:
-			debug("Unmatched ...\n");
+			debug("TEEC: Unmatched ...\n");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
+	debug("TEEC: rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return TEEC_ERROR_GENERIC;
 }
@@ -738,18 +738,18 @@ static int rkss_get_dirs_by_name(char *filename)
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -768,14 +768,14 @@ static int rkss_get_dirs_by_name(char *filename)
 
 			/* Full Matching*/
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
+			debug("TEEC: comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename)) {
 				chk = p->name + strlen(filename);
 				if (*chk == '/') {
 					file = p->name + strlen(filename) + 1;
 					subdir = strtok(file, "/");
-					debug("found: %s\n", subdir);
+					debug("TEEC: found: %s\n", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -797,7 +797,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -814,7 +814,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !\n");
+	printf("TEEC: Not enough space available in secure storage !\n");
 	return TEEC_ERROR_GENERIC;
 }
 
@@ -825,14 +825,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -840,7 +840,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -848,7 +848,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -861,21 +861,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -883,7 +883,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -899,13 +899,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -917,16 +917,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p = (struct rkss_file_info *)pdata;
 			p += n;
 			if (p->used == 0) {
-				debug("write ptable in [%d][%d] .\n", i, n);
+				debug("TEEC: write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d,\n",
+				debug("TEEC: write emt ptable : [%d,%d] name:%s, index:%d,\n",
 					i, n, p->name, p->index);
-				debug("size:%d, used:%d\n",  p->size, p->used);
+				debug("TEEC: size:%d, used:%d\n",  p->size, p->used);
 				ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 				if (ret < 0) {
-					printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+					printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 					free(table_data);
 					return TEEC_ERROR_GENERIC;
 				}
@@ -936,7 +936,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			}
 		}
 	}
-	debug("No enough ptable space available in secure storage.\n");
+	debug("TEEC: No enough ptable space available in secure storage.\n");
 	free(table_data);
 	return TEEC_ERROR_GENERIC;
 }
@@ -953,7 +953,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -962,12 +962,12 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+	debug("TEEC: write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i, n, p->name, p->index, p->size, p->used);
 
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 #ifdef DEBUG_RKFSS
@@ -984,7 +984,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 	int fd;
 	struct rkss_file_info p = {0};
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -992,18 +992,18 @@ static uint32_t ree_fs_new_open(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_open: file name too long. %s\n", filename);
+		printf("TEEC: ree_fs_new_open: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_open open file: %s, len: %zu\n", filename, strlen(filename));
+	debug("TEEC: ree_fs_new_open open file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd < 0) {
-		debug("ree_fs_new_open : no such file. %s\n", filename);
+		debug("TEEC: ree_fs_new_open : no such file. %s\n", filename);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
-	debug("ree_fs_new_open! %s, fd: %d\n", filename, fd);
+	debug("TEEC: ree_fs_new_open! %s, fd: %d\n", filename, fd);
 
 	params[2].u.value.a = fd;
 	return TEEC_SUCCESS;
@@ -1021,30 +1021,30 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	 */
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_create: file name too long. %s\n", filename);
+		printf("TEEC: ree_fs_new_create: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_create create file: %s, len: %zu\n", filename, strlen(filename));
+	debug("TEEC: ree_fs_new_create create file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd >= 0) {
-		debug("ree_fs_new_create : file exist, clear it. %s\n", filename);
+		debug("TEEC: ree_fs_new_create : file exist, clear it. %s\n", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
 		ret = rkss_decref_multi_usedflags_sections(p.index, num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !\n");
+			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 			return TEEC_ERROR_GENERIC;
 		}
 
@@ -1052,12 +1052,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		memset(&p, 0, sizeof(struct rkss_file_info));
 		ret = rkss_write_back_ptable(fd, &p);
 		if (ret < 0) {
-			printf("ree_fs_new_create : write back error %d\n", ret);
+			printf("TEEC: ree_fs_new_create : write back error %d\n", ret);
 			return TEEC_ERROR_GENERIC;
 		}
 	}
 
-	debug("ree_fs_new_create create new file: %s\n", filename);
+	debug("TEEC: ree_fs_new_create create new file: %s\n", filename);
 	strcpy(p.name, filename);
 	p.index = 0;
 	p.size = 0;
@@ -1065,17 +1065,17 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	p.flags = RK_FS_R | RK_FS_W;
 	fd = rkss_write_empty_ptable(&p);
 	if (fd < 0) {
-		printf("ree_fs_new_create : write empty ptable error. %s\n", filename);
+		printf("TEEC: ree_fs_new_create : write empty ptable error. %s\n", filename);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
+	debug("TEEC: ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
 
 	params[2].u.value.a = fd;
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 	return TEEC_SUCCESS;
@@ -1084,7 +1084,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 static TEEC_Result ree_fs_new_close(size_t num_params,
 				    struct tee_ioctl_param *params)
 {
-	debug("ree_fs_new_close !\n");
+	debug("TEEC: ree_fs_new_close !\n");
 	UNREFERENCED_PARAMETER(params);
 	UNREFERENCED_PARAMETER(num_params);
 	return TEEC_SUCCESS;
@@ -1106,18 +1106,18 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	offs = params[0].u.value.c;
 
 	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	if (!data)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld\n", fd, len, offs);
+	debug("TEEC: ree_fs_new_read! fd:%d, len:%zu, offs:%ld\n", fd, len, offs);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		debug("unavailable fd: %d!\n", fd);
+		debug("TEEC: unavailable fd: %d!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1128,7 +1128,7 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 	if (ret < 0) {
-		printf("unavailable file index!\n");
+		printf("TEEC: unavailable file index!\n");
 		free(temp_file_data);
 		return TEEC_ERROR_GENERIC;
 	}
@@ -1154,7 +1154,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1162,17 +1162,17 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	offs = params[0].u.value.c;
 
 	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!data)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("ree_fs_new_write ! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+	debug("TEEC: ree_fs_new_write ! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: fd:%d unvailable!\n", fd);
+		printf("TEEC: ree_fs_new_write: fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
@@ -1187,7 +1187,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 		ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 		if (ret < 0) {
-			printf("unavailable file index %d section_num %d\n", p.index, section_num);
+			printf("TEEC: unavailable file index %d section_num %d\n", p.index, section_num);
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -1196,7 +1196,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = 0;
 		ret = rkss_decref_multi_usedflags_sections(p.index, section_num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !\n");
+			printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -1207,18 +1207,18 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	p.size = new_size;
 	section_num = new_size / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(section_num);
-	debug("Get Empty section in %d\n", p.index);
+	debug("TEEC: Get Empty section in %d\n", p.index);
 	p.used = 1;
 	ret = rkss_incref_multi_usedflags_sections(p.index, section_num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
 
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: write ptable error!\n");
+		printf("TEEC: ree_fs_new_write: write ptable error!\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
@@ -1244,7 +1244,7 @@ out:
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1262,40 +1262,40 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
 
-	debug("ree_fs_new_truncate: fd:%d, lenth:%zu\n", fd, len);
+	debug("TEEC: ree_fs_new_truncate: fd:%d, lenth:%zu\n", fd, len);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("fd:%d unvailable!\n", fd);
+		printf("TEEC: fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 	if (len > p.size) {
-		printf("truncate error!\n");
+		printf("TEEC: truncate error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	section_num_old = p.size / RKSS_DATA_LEN + 1;
 	section_num_new = len / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index + section_num_new, section_num_old - section_num_new);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 	}
 	p.size = len;
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_truncate: write ptable error!\n");
+		printf("TEEC: ree_fs_new_truncate: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1311,11 +1311,11 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1324,18 +1324,18 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: no such file. %s\n", filename);
+		printf("TEEC: ree_fs_new_remove: no such file. %s\n", filename);
 		return 0;
 	}
 	fd = ret;
 
-	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
+	debug("TEEC: ree_fs_new_remove! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	/* decrease ref from usedflags */
 	num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1343,7 +1343,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	memset(&p, 0, sizeof(struct rkss_file_info));
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: write back error %d\n", ret);
+		printf("TEEC: ree_fs_new_remove: write back error %d\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1353,7 +1353,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 #endif
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1370,32 +1370,32 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	old_fname = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!old_fname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	new_fname = (char *)(size_t)params[2].u.memref.shm_id;
-	debug("params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
 		params[2].u.memref.shm_id, params[2].u.memref.shm_offs);
 	if (!new_fname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
-		printf("new file name too long. %s\n", new_fname);
+		printf("TEEC: new file name too long. %s\n", new_fname);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("rename: %s -> %s\n", old_fname, new_fname);
+	debug("TEEC: rename: %s -> %s\n", old_fname, new_fname);
 
 	ret = rkss_get_fileinfo_by_name(old_fname, &p);
 	if (ret < 0) {
-		printf("filename: %s no found.\n", old_fname);
+		printf("TEEC: filename: %s no found.\n", old_fname);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
@@ -1403,12 +1403,12 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0) {
-		printf("write ptable error!\n");
+		printf("TEEC: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1421,7 +1421,7 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	char *dirname;
 	int ret;
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1431,11 +1431,11 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	dir_seek = 0;
 	ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0) {
-		printf("ree_fs_new_opendir: error\n");
+		printf("TEEC: ree_fs_new_opendir: error\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
+	debug("TEEC: ree_fs_new_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return TEEC_SUCCESS;
 }
 
@@ -1461,13 +1461,13 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	size_t dirname_len;
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+	debug("TEEC: params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!dirname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("seek/num:%d/%d\n", dir_seek, dir_num);
+	debug("TEEC: seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num) {
 		params[1].u.memref.size = 0;
 		debug("ree_fs_new_readdir: END \n");
@@ -1482,7 +1482,7 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	strcpy(dirname, dir_cache[dir_seek]);
 	++dir_seek;
 
-	debug("ree_fs_new_readdir: %s\n", dirname);
+	debug("TEEC: ree_fs_new_readdir: %s\n", dirname);
 
 	return TEEC_SUCCESS;
 }
@@ -1512,23 +1512,23 @@ int tee_supp_rk_fs_init(void)
 		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_multi_sections(rkss.data, rkss.index, 1);
-		printf("cleaned [%d]", i);
+		printf("TEEC: cleaned [%d]", i);
 	}
 #endif
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1541,12 +1541,12 @@ int tee_supp_rk_fs_init(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0) {
-		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1557,7 +1557,7 @@ int tee_supp_rk_fs_init(void)
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1566,7 +1566,7 @@ int tee_supp_rk_fs_init(void)
 
 int OpteeClientRkFsInit(void)
 {
-	debug(" OpteeClientRkFsInit\n");
+	debug("TEEC: OpteeClientRkFsInit\n");
 	return tee_supp_rk_fs_init();
 }
 bool tee_supp_param_is_value(struct tee_ioctl_param *param)
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 68c59554e8..90d547622f 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -192,7 +192,7 @@ int check_security_exist(int print_flag)
 	if (!dev_desc) {
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
+			printf("TEEC: %s: Could not find device\n", __func__);
 			return -1;
 		}
 
@@ -200,7 +200,7 @@ int check_security_exist(int print_flag)
 					  "security", &part_info) < 0) {
 			dev_desc = NULL;
 			if (print_flag != 0)
-				printf("Could not find security partition\n");
+				printf("TEEC: Could not find security partition\n");
 			return -1;
 		}
 	}
@@ -233,7 +233,7 @@ static int rkss_begin_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
 	p.backup_enable = RKSS_BACKUP_ENABLE;
 	p.backup_count = 0;
@@ -243,7 +243,7 @@ static int rkss_begin_commit(void)
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -257,12 +257,12 @@ static int rkss_finish_commit(void)
 	if (check_security_exist(1) < 0)
 		return -1;
 
-	debug("%s\n", __func__);
+	debug("TEEC: %s\n", __func__);
 	memset(data, 0, sizeof(data));
 
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -281,7 +281,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -306,28 +306,28 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 		}
 		if ((info_current.backup_data_index + info_current.backup_num) >
 			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-			printf("Not enough backup sections!");
+			printf("TEEC: Not enough backup sections!");
 			goto error;
 		}
-		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		debug("TEEC: %s index=0x%lx num=0x%x backup_data_index=0x%x\n",
 		      __func__, index, num, info_current.backup_data_index);
 
 		backup_data = malloc(num * RKSS_DATA_LEN);
 		if (!backup_data) {
-			printf("malloc backup_data fail\n");
+			printf("TEEC: malloc backup_data fail\n");
 			goto error;
 		}
 
 		ret = blk_dread(dev_desc, index, num, backup_data);
 		if (ret != num) {
-			printf("blk_dread fail\n");
+			printf("TEEC: blk_dread fail\n");
 			return -1;
 		}
 
 		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
 				 num, backup_data);
 		if (ret != num) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 		free(backup_data);
@@ -342,7 +342,7 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 
 		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 		if (ret != 1) {
-			printf("blk_dwrite fail\n");
+			printf("TEEC: blk_dwrite fail\n");
 			return -1;
 		}
 	}
@@ -368,7 +368,7 @@ static int rkss_resume(void)
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 
@@ -381,7 +381,7 @@ static int rkss_resume(void)
 
 			if (info_current.backup_usedflag ==
 			    RKSS_BACKUP_USEDFLAG) {
-				debug("rkss_resume backup_index=0x%x \
+				debug("TEEC: rkss_resume backup_index=0x%x \
 				      backup_num=0x%x \
 				      info_current.backup_data_index=0x%x\n",
 				      info_current.backup_index,
@@ -390,19 +390,19 @@ static int rkss_resume(void)
 				if ((info_current.backup_data_index +
 				     info_current.backup_num) >
 				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
-					printf("backup sections error!");
+					printf("TEEC: backup sections error!");
 					goto error;
 				}
 				if ((info_current.backup_index +
 				     info_current.backup_num) >
 				    RKSS_DATA_SECTION_COUNT) {
-					printf("original sections error!");
+					printf("TEEC: original sections error!");
 					goto error;
 				}
 				backup_data = malloc(info_current.backup_num *
 						     RKSS_DATA_LEN);
 				if (!backup_data) {
-					printf("malloc backup_data fail\n");
+					printf("TEEC: malloc backup_data fail\n");
 					goto error;
 				}
 
@@ -411,7 +411,7 @@ static int rkss_resume(void)
 						info_current.backup_num,
 						backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dread fail\n");
+					printf("TEEC: blk_dread fail\n");
 					return -1;
 				}
 
@@ -420,7 +420,7 @@ static int rkss_resume(void)
 						 info_current.backup_num,
 						 backup_data);
 				if (ret != info_current.backup_num) {
-					printf("blk_dwrite fail\n");
+					printf("TEEC: blk_dwrite fail\n");
 					return -1;
 				}
 				free(backup_data);
@@ -431,7 +431,7 @@ static int rkss_resume(void)
 	memset(data, 0, sizeof(data));
 	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -450,7 +450,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -468,7 +468,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	result = rkss_backup_sections(index, num);
 	if (result < 0) {
-		printf("rkss_backup_sections fail\n");
+		printf("TEEC: rkss_backup_sections fail\n");
 		return -1;
 	}
 
@@ -477,7 +477,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail\n");
+		printf("TEEC: blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -497,7 +497,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail\n");
+		printf("TEEC: blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -525,12 +525,12 @@ static void rkss_dump_ptable(void)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return;
 	}
@@ -564,7 +564,7 @@ static void rkss_dump_usedflags(void)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -584,7 +584,7 @@ static int rkss_verify_ptable(unsigned char *table_data)
 
 		if (verify->version != RKSS_VERSION
 				|| verify->checkstr != RKSS_CHECK_STR) {
-			printf("verify [%d] fail, cleanning ....", i);
+			printf("TEEC: verify [%d] fail, cleanning ....", i);
 			memset(cp, 0, RKSS_DATA_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
 			verify->version = RKSS_VERSION;
@@ -594,11 +594,11 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	if (write_table_flag == 1) {
 		ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 		if (ret < 0) {
-			printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
+			printf("TEEC: rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 			return -1;
 		}
 	}
-	debug("verify ptable success.\n");
+	debug("TEEC: verify ptable success.\n");
 	return 0;
 }
 
@@ -612,7 +612,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...\n");
+			debug("TEEC: init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -622,14 +622,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.\n", ret);
+				printf("TEEC: clean usedflags section failed!!! ret: %d.\n", ret);
 				return -1;
 			}
 
 			return 0;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.\n");
+	debug("TEEC: rkss_verify_usedflags: sucess.\n");
 	return 0;
 }
 
@@ -645,7 +645,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -654,10 +654,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section!\n");
+		debug("TEEC: error: unused section!\n");
 		return -1;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
+	debug("TEEC: rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -675,18 +675,18 @@ static int rkss_get_fileinfo_by_name(
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -708,7 +708,7 @@ static int rkss_get_fileinfo_by_name(
 
 			if (!strcmp(p->name, filename))
 			{
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
+				debug("TEEC: rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -739,14 +739,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while(cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s\n", p->name);
+			debug("TEEC: Matched folder: %s\n", p->name);
 			free(table_data);
 			return -100;
 UNMATCHFOLDER:
-			debug("Unmatched ...");
+			debug("TEEC: Unmatched ...");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
+	debug("TEEC: rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return -1;
 }
@@ -761,18 +761,18 @@ static int rkss_get_dirs_by_name(char* filename)
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u\n", len);
+		printf("TEEC: filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -795,7 +795,7 @@ static int rkss_get_dirs_by_name(char* filename)
 
 			// Full Matching
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
+			debug("TEEC: comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename))
 			{
@@ -804,7 +804,7 @@ static int rkss_get_dirs_by_name(char* filename)
 				{
 					char *file = p->name + strlen(filename) + 1;
 					char *subdir = strtok(file, "/");
-					debug("found: %s", subdir);
+					debug("TEEC: found: %s\n", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -822,7 +822,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -846,7 +846,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !\n");
+	printf("TEEC: Not enough space available in secure storage !\n");
 	return -10;
 }
 
@@ -857,14 +857,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -872,7 +872,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -880,7 +880,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -893,21 +893,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.\n", index);
+		printf("TEEC: index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d\n", value);
+			printf("TEEC: reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -915,7 +915,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -928,13 +928,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -953,16 +953,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p += n;
 			if (p->used == 0)
 			{
-				debug("write ptable in [%d][%d] .\n", i, n);
+				debug("TEEC: write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+				debug("TEEC: write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 						i,n,p->name,p->index,p->size,p->used);
 				ret = rkss_write_section(&rkss);
 				if (ret < 0)
 				{
-					printf("rkss_write_section fail ! ret: %d.\n", ret);
+					printf("TEEC: rkss_write_section fail ! ret: %d.\n", ret);
 					free(table_data);
 					return -1;
 				}
@@ -971,7 +971,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			}
 		}
 	}
-	printf("No enough ptable space available in secure storage.\n");
+	printf("TEEC: No enough ptable space available in secure storage.\n");
 	free(table_data);
 	return -1;
 }
@@ -986,7 +986,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_read_section fail ! ret: %d.\n", ret);
+		debug("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -995,13 +995,13 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
+	debug("TEEC: write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i,n,p->name,p->index,p->size,p->used);
 
 	ret = rkss_write_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_write_section fail ! ret: %d.\n", ret);
+		debug("TEEC: rkss_write_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -1034,16 +1034,16 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH)
 	{
-		debug("tee_fs_open: file name too long. %s\n", filename);
+		debug("TEEC: tee_fs_open: file name too long. %s\n", filename);
 		return -1;
 	}
 
-	debug("tee_fs_open open file: %s, len: %zu\n", filename, strlen(filename));
+	debug("TEEC: tee_fs_open open file: %s, len: %zu\n", filename, strlen(filename));
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		debug("tee_fs_open : no such file. %s\n", filename);
+		debug("TEEC: tee_fs_open : no such file. %s\n", filename);
 		make_newfile = 1;
 	}
 	else
@@ -1058,7 +1058,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1066,7 +1066,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 	{
 		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
 		{
-			debug("tee_fs_open create new file: %s\n", filename);
+			debug("TEEC: tee_fs_open create new file: %s\n", filename);
 			strcpy(p.name, filename);
 			p.index = 0;
 			p.size = fsrpc->len;
@@ -1075,7 +1075,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 			ret = rkss_write_empty_ptable(&p);
 			if (ret < 0)
 			{
-				printf("tee_fs_open : error. %s\n", filename);
+				printf("TEEC: tee_fs_open : error. %s\n", filename);
 				return -1;
 			}
 			fsrpc->fd = ret;
@@ -1083,17 +1083,17 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 		}
 		else
 		{
-			debug("and no create flag found.\n");
+			debug("TEEC: and no create flag found.\n");
 			return -1;
 		}
 	}
 
-	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
+	debug("TEEC: tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
 			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1102,38 +1102,38 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_close(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_close !\n");
+	debug("TEEC: tee_fs_close !\n");
 	UNREFERENCED_PARAMETER(fsrpc);
 	return 0;
 }
 
 static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_read! fd:%d, len:%d\n", fsrpc->fd, fsrpc->len);
+	debug("TEEC: tee_fs_read! fd:%d, len:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("unavailable fd !\n");
+		printf("TEEC: unavailable fd !\n");
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.\n");
+		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	int di = 0;
-	debug("reading section[%d], fd:%d, len:%d, filesize:%d\n",
+	debug("TEEC: reading section[%d], fd:%d, len:%d, filesize:%d\n",
 			p.index, fsrpc->fd, fsrpc->len, p.size);
 
 	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, num);
 	if (ret < 0) {
-		printf("unavailable file index\n");
+		printf("TEEC: unavailable file index\n");
 		free(temp_file_data);
 		return -1;
 	}
@@ -1146,50 +1146,50 @@ static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_write ! fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->len);
+	debug("TEEC: tee_fs_write ! fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_write error ! wrong fd : %d\n", fsrpc->fd);
+		printf("TEEC: tee_fs_write error ! wrong fd : %d\n", fsrpc->fd);
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.\n");
+		printf("TEEC: warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: fd unvailable!\n");
+		printf("TEEC: tee_fs_write: fd unvailable!\n");
 		return -1;
 	}
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
 	p.size = fsrpc->len;
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
-	debug("Get Empty section in %d\n", p.index);
+	debug("TEEC: Get Empty section in %d\n", p.index);
 	p.used = 1;
 
 	ret = rkss_incref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
 		ret = -1;
 	}
 
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!\n");
+		printf("TEEC: tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 
@@ -1206,7 +1206,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1215,7 +1215,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x\n", fsrpc->fd, fsrpc->arg, fsrpc->flags);
+	debug("TEEC: tee_fs_seek ! fd:%d, seek:%d, flag:%x\n", fsrpc->fd, fsrpc->arg, fsrpc->flags);
 
 	if (fsrpc->flags == TEE_FS_SEEK_CUR)
 	{
@@ -1232,7 +1232,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 		int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 		if (ret < 0)
 		{
-			printf("unavilable fd.\n");
+			printf("TEEC: unavilable fd.\n");
 			return -1;
 		}
 		file_seek = p.size + fsrpc->arg;
@@ -1240,7 +1240,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 	}
 	else
 	{
-		printf("tee_fs_seek: unsupport seed mode.\n");
+		printf("TEEC: tee_fs_seek: unsupport seed mode.\n");
 		return -1;
 	}
 
@@ -1255,16 +1255,16 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : no such file. %s\n", filename);
+		printf("TEEC: tee_fs_unlink : no such file. %s\n", filename);
 		return 0;
 	}
 	int fd = ret;
 
-	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
+	debug("TEEC: tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1273,7 +1273,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_decref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_decref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -1282,7 +1282,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : write back error %d\n", ret);
+		printf("TEEC: tee_fs_unlink : write back error %d\n", ret);
 		return -1;
 	}
 
@@ -1292,7 +1292,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1304,13 +1304,13 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	char *filename = (char *)(fsrpc + 1);
 	size_t offset_new_fn = strlen(filename) + 1;
 	char *newfilename = filename + offset_new_fn;
-	debug("tee_fs_link ! %s -> %s\n", filename, newfilename);
+	debug("TEEC: tee_fs_link ! %s -> %s\n", filename, newfilename);
 
 	struct rkss_file_info p_old = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p_old);
 	if (ret < 0)
 	{
-		printf("cannot find src file %s.\n", filename);
+		printf("TEEC: cannot find src file %s.\n", filename);
 		return -1;
 	}
 
@@ -1318,12 +1318,12 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
 	if (ret >= 0)
 	{
-		printf("file exist ! %s.\n", newfilename);
+		printf("TEEC: file exist ! %s.\n", newfilename);
 		return -1;
 	}
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1333,7 +1333,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_empty_ptable(&p_new);
 	if (ret < 0)
 	{
-		printf("tee_fs_open : error. %s\n", filename);
+		printf("TEEC: tee_fs_open : error. %s\n", filename);
 		return -1;
 	}
 
@@ -1341,7 +1341,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_incref_multi_usedflags_sections(p_new.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_incref_multi_usedflags_sections error !\n");
+		printf("TEEC: rkss_incref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -1350,7 +1350,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 #endif
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1361,19 +1361,19 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 {
 	char *filenames = (char *)(fsrpc + 1);
 	char *newnames = filenames + strlen(filenames) + 1;
-	debug("rename: %s -> %s\n", filenames, newnames);
+	debug("TEEC: rename: %s -> %s\n", filenames, newnames);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filenames, &p);
 	if (ret < 0)
 	{
-		printf("filename no found .\n");
+		printf("TEEC: filename no found .\n");
 		return -1;
 	}
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1382,13 +1382,13 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0)
 	{
-		printf("write ptable error!\n");
+		printf("TEEC: write ptable error!\n");
 		return -1;
 	}
 
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 
@@ -1397,10 +1397,10 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
+	debug("TEEC: tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_truncate: fd unavilable !\n");
+		printf("TEEC: tee_fs_truncate: fd unavilable !\n");
 		return -1;
 	}
 
@@ -1408,12 +1408,12 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("fd unvailable!\n");
+		printf("TEEC: fd unvailable!\n");
 		return -1;
 	}
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!");
 		return -1;
 	}
 
@@ -1421,12 +1421,12 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!\n");
+		printf("TEEC: tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 	ret = rkss_finish_commit();
 	if (ret < 0) {
-		printf("rkss_finish_commit failed!");
+		printf("TEEC: rkss_finish_commit failed!");
 		return -1;
 	}
 	return 0;
@@ -1436,7 +1436,7 @@ static int tee_fs_mkdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_mkdir: %s\n", dirname);
+	debug("TEEC: tee_fs_mkdir: %s\n", dirname);
 	return 0;
 }
 
@@ -1447,9 +1447,9 @@ static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0)
 	{
-		printf("tee_fs_opendir: error\n");
+		printf("TEEC: tee_fs_opendir: error\n");
 	}
-	debug("tee_fs_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
+	debug("TEEC: tee_fs_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return 0;
 }
 
@@ -1457,7 +1457,7 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_closedir: %s\n", dirname);
+	debug("TEEC: tee_fs_closedir: %s\n", dirname);
 	dir_seek = 0;
 	dir_num = 0;
 	return 0;
@@ -1466,12 +1466,12 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	debug("seek/num:%d/%d\n", dir_seek, dir_num);
+	debug("TEEC: seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num)
 	{
 		dirname = NULL;
 		fsrpc->len = 0;
-		debug("tee_fs_readdir: END\n");
+		debug("TEEC: tee_fs_readdir: END\n");
 		return -1;
 	}
 
@@ -1479,41 +1479,41 @@ static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 	fsrpc->len = strlen(dir_cache[dir_seek]) + 1;
 	++dir_seek;
 
-	debug("tee_fs_readdir: %s\n", dirname);
+	debug("TEEC: tee_fs_readdir: %s\n", dirname);
 	return 0;
 }
 
 static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	debug("tee_fs_rmdir: %s\n", dirname);
+	debug("TEEC: tee_fs_rmdir: %s\n", dirname);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(dirname, &p);
 	if (ret == -100)
 	{
-		printf("dir is not empty.\n");
+		printf("TEEC: dir is not empty.\n");
 		return -1;
 	}
 	else if (ret >= 0)
 	{
-		printf("%s is not a dir.\n", p.name);
+		printf("TEEC: %s is not a dir.\n", p.name);
 		return -1;
 	}
-	debug("rmdir success.\n");
+	debug("TEEC: rmdir success.\n");
 	return 0;
 }
 
 static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 {
 	char *filename = (char *)(fsrpc + 1);
-	debug("tee_fs_access: name:%s,flag:%x\n", filename, fsrpc->flags);
+	debug("TEEC: tee_fs_access: name:%s,flag:%x\n", filename, fsrpc->flags);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0 && ret != -100)
 	{
-		debug("tee_fs_access: %s no such file or directory.\n", filename);
+		debug("TEEC: tee_fs_access: %s no such file or directory.\n", filename);
 		return -1;
 	}
 
@@ -1521,7 +1521,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_R))
 		{
-			printf("tee_fs_access: no permission FS_R_OK in %x.\n", p.flags);
+			printf("TEEC: tee_fs_access: no permission FS_R_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1530,7 +1530,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_W))
 		{
-			printf("tee_fs_access: no permission FS_W_OK in %x.\n", p.flags);
+			printf("TEEC: tee_fs_access: no permission FS_W_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1551,7 +1551,7 @@ int tee_supp_rk_fs_init(void)
 
 	ret = rkss_resume();
 	if (ret < 0) {
-		printf("rkss_resume failed!");
+		printf("TEEC: rkss_resume failed!\n");
 		return -1;
 	}
 #ifdef DEBUG_CLEAN_RKSS // clean secure storage
@@ -1561,25 +1561,25 @@ int tee_supp_rk_fs_init(void)
 		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_section(&rkss);
-		printf("cleaned [%d]", i);
+		printf("TEEC: cleaned [%d]", i);
 	}
 #endif
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!\n");
 		return -1;
 	}
 
 	// Verify Partition Table
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail\n");
+		printf("TEEC: malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1587,7 +1587,7 @@ int tee_supp_rk_fs_init(void)
 	/* Verify Partition Table*/
 	ret = rkss_verify_ptable(table_data);
 	if (ret < 0) {
-		printf("rkss_verify_ptable fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_verify_ptable fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1600,13 +1600,13 @@ int tee_supp_rk_fs_init(void)
 	ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
+		printf("TEEC: rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -1617,7 +1617,7 @@ int tee_supp_rk_fs_init(void)
 
 	ret = rkss_begin_commit();
 	if (ret < 0) {
-		printf("rkss_begin_commit failed!");
+		printf("TEEC: rkss_begin_commit failed!\n");
 		return -1;
 	}
 
@@ -1625,7 +1625,7 @@ int tee_supp_rk_fs_init(void)
 }
 int OpteeClientRkFsInit(void)
 {
-	debug(" OpteeClientRkFsInit\n");
+	debug("TEEC: OpteeClientRkFsInit\n");
 	return tee_supp_rk_fs_init();
 }
 
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index a3848c576a..b4d8007462 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -126,7 +126,7 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 	TeeSmc32Param[1].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
 				OPTEE_MSG_ATTR_META_V2;
 #else
-	printf("Not support! All rockchips use optee v2.5 are 64 bits! \n");
+	printf("TEEC: Not support! All rockchips use optee v2.5 are 64 bits! \n");
 #endif
 #endif
 
@@ -300,18 +300,18 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 #ifdef CONFIG_OPTEE_V1
 #ifdef CONFIG_ARM64
 			attr |= TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-			debug(" OPTEE_OS_V1 ARCH64 attr %x\n", attr);
+			debug("TEEC: OPTEE_OS_V1 ARCH64 attr %x\n", attr);
 #else
-			debug(" OPTEE_OS_V1 ARCH32 attr %x\n", attr);
+			debug("TEEC: OPTEE_OS_V1 ARCH32 attr %x\n", attr);
 #endif
 #endif
 
 #ifdef CONFIG_OPTEE_V2
 #if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
-			debug(" OPTEE_OS_V2 ARCH64 attr %x\n", attr);
+			debug("TEEC: OPTEE_OS_V2 ARCH64 attr %x\n", attr);
 #else
-			printf("Not support! All rockchips use optee v2 are 64 bits! \n");
+			printf("TEEC: Not support! All rockchips use optee v2 are 64 bits! \n");
 #endif
 #endif
 
@@ -376,7 +376,7 @@ TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
 
 	while (1) {
 		tee_smc_call(&ArmSmcArgs);
-		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x \n",
+		debug("TEEC: arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x \n",
 			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
 			(void) OpteeRpcCallback(&ArmSmcArgs);

commit 4f2523c3a0b201ec2c476399b5d5a756c8911c39
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Apr 28 19:10:39 2019 +0800

    lib: avb: load full partition if allow verification error
    
    Change-Id: I506676512a46ec09d6c617f555f735a24fc4a594
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
old mode 100755
new mode 100644
index d6a843853f..3fd45c929c
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -266,7 +266,7 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
    * since it's such a common workflow.
    */
   image_size = hash_desc.image_size;
-  if (0) {
+  if (allow_verification_error) {
     if (ops->get_size_of_partition == NULL) {
       avb_errorv(part_name,
                  ": The get_size_of_partition() operation is "

commit 813227ad543ba285129c80289b4053897560abef
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Apr 12 10:02:07 2019 +0800

    lib: avb: add init ab metadata interface
    
    Change-Id: Ifad6c8ca70568c2dc8eea0a4ead23e3e7a2a0e74
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 441856c33c..7317f1795b 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -306,6 +306,11 @@ int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size);
  */
 int rk_avb_get_pub_key(struct rk_pub_key *pub_key);
 
+/**
+ * init ab metadata
+ */
+int rk_avb_init_ab_metadata(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index f14ff8ad22..cfe5936c50 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -767,3 +767,30 @@ out:
 
 	return lastboot;
 }
+
+int rk_avb_init_ab_metadata(void)
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	memset(&ab_data, 0, sizeof(AvbABData));
+	debug("sizeof(AvbABData) = %d\n", (int)(size_t)sizeof(AvbABData));
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	avb_ab_data_init(&ab_data);
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_init_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+
+	printf("Initialize ab data to misc partition success.\n");
+	avb_ops_user_free(ops);
+
+	return 0;
+}
\ No newline at end of file

commit 350f6a183690c00ad4abdaa7c1e3c7983b192e99
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Apr 1 17:54:17 2019 +0800

    video/drm: rgb: support pinctrl state select
    
    Change-Id: I7eb1204e24e17894d529fc582d3bd4a90a61327a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 60b09df21e..02cf1ba8a0 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -10,6 +10,7 @@
 #include <regmap.h>
 #include <dm/device.h>
 #include <dm/read.h>
+#include <dm/pinctrl.h>
 #include <linux/media-bus-format.h>
 
 #include "rockchip_display.h"
@@ -64,6 +65,8 @@ static int rockchip_rgb_connector_enable(struct display_state *state)
 	int pipe = crtc_state->crtc_id;
 	int ret;
 
+	pinctrl_select_state(rgb->dev, "default");
+
 	if (rgb->funcs && rgb->funcs->enable)
 		rgb->funcs->enable(rgb, pipe);
 
@@ -90,6 +93,8 @@ static int rockchip_rgb_connector_disable(struct display_state *state)
 	if (rgb->funcs && rgb->funcs->disable)
 		rgb->funcs->disable(rgb);
 
+	pinctrl_select_state(rgb->dev, "sleep");
+
 	return 0;
 }
 

commit 88c36f1205caa3d2f8e10077ef4b324a8f2b3836
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Apr 18 16:30:13 2019 +0800

    clk: rockchip: rk3399: fix up the assert error
    
    Change-Id: I8cc4f6b775243fef1f5c8e2c711eb1b16eac79a8
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f11fe3926b..9f88e8a7cd 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -534,15 +534,15 @@ void rk3399_configure_cpu(struct rk3399_cru *cru,
 	rkclk_set_pll(pll_con, apll_cfgs[freq]);
 
 	aclkm_div = apll_hz / ACLKM_CORE_HZ - 1;
-	assert((aclkm_div + 1) * ACLKM_CORE_HZ == apll_hz &&
+	assert((aclkm_div + 1) * ACLKM_CORE_HZ <= apll_hz &&
 	       aclkm_div < 0x1f);
 
 	pclk_dbg_div = apll_hz / PCLK_DBG_HZ - 1;
-	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ == apll_hz &&
+	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ <= apll_hz &&
 	       pclk_dbg_div < 0x1f);
 
 	atclk_div = apll_hz / ATCLK_CORE_HZ - 1;
-	assert((atclk_div + 1) * ATCLK_CORE_HZ == apll_hz &&
+	assert((atclk_div + 1) * ATCLK_CORE_HZ <= apll_hz &&
 	       atclk_div < 0x1f);
 
 	rk_clrsetreg(&cru->clksel_con[con_base],
@@ -1416,11 +1416,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERIHP_ACLK_HZ) - 1;
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
+	assert((hclk_div + 1) * PERIHP_HCLK_HZ <=
 	       PERIHP_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
+	assert((pclk_div + 1) * PERIHP_PCLK_HZ <=
 	       PERIHP_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[14],
@@ -1435,11 +1435,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP0_ACLK_HZ) - 1;
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
+	assert((hclk_div + 1) * PERILP0_HCLK_HZ <=
 	       PERILP0_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
+	assert((pclk_div + 1) * PERILP0_PCLK_HZ <=
 	       PERILP0_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[23],
@@ -1452,11 +1452,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* perilp1 hclk select gpll as source */
 	hclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP1_HCLK_HZ) - 1;
-	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
+	assert((hclk_div + 1) * PERILP1_HCLK_HZ <=
 	       GPLL_HZ && (hclk_div <= 0x1f));
 
 	pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP1_PCLK_HZ ==
+	assert((pclk_div + 1) * PERILP1_PCLK_HZ <=
 	       PERILP1_HCLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[25],

commit f25e3caf73f089c695f05acc56f553f176a0bf88
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Fri Apr 19 09:34:17 2019 +0800

    rkflash: support 4KB page size spi nand
    
    1.support 4KB page size spi nand
    2.add new spi nand: ATO25D1GA, XT26G02B, XT26G01B, HYF4GQ4UAACBE
    
    Change-Id: I331c98341e9aa5f2e15cd7a4a5c6aeb2136d65dd
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index ddde4a609f..01d67fba67 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-02-20
+ * date: 2019-04-19
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -184,73 +184,75 @@ FtlConstantsInit:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r3, r0
 	ldrh	r4, [r0]
-	ldr	r2, .L25
+	ldr	r2, .L26
 	ldrh	r5, [r0, #2]
-	ldrh	r0, [r0, #4]
-	strh	r4, [r2]	@ movhi
-	ldr	r2, .L25+4
-	ldrh	r1, [r3, #6]
 	ldrh	r7, [r3, #14]
-	strh	r5, [r2]	@ movhi
-	ldr	r2, .L25+8
-	ldr	r6, .L25+12
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L26+4
+	ldrh	ip, [r0, #4]
 	cmp	r7, #4
-	strh	r0, [r2]	@ movhi
-	ldr	r2, .L25+16
+	ldr	r0, .L26+8
+	strh	r5, [r2]	@ movhi
+	ldr	r1, .L26+12
+	ldrh	r2, [r3, #6]
+	ldr	r6, .L26+16
+	strh	ip, [r0]	@ movhi
+	strh	r2, [r1]	@ movhi
 	strh	r7, [r6]	@ movhi
-	ldr	r7, .L25+20
-	strh	r1, [r2]	@ movhi
-	itttt	eq
-	lsreq	r1, r1, #1
-	strheq	r1, [r2]	@ movhi
-	moveq	r1, #8
-	strheq	r1, [r6]	@ movhi
-	movs	r1, #0
+	bne	.L16
+	lsrs	r2, r2, #1
+	strh	r2, [r1]	@ movhi
+	movs	r2, #8
+	strh	r2, [r6]	@ movhi
 .L17:
-	strb	r1, [r1, r7]
-	adds	r1, r1, #1
-	cmp	r1, #32
-	bne	.L17
-	ldr	r1, .L25+24
+	ldr	r7, .L26+20
+	movs	r2, #0
+.L18:
+	strb	r2, [r2, r7]
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L18
+	ldr	r2, .L26+24
 	cmp	r4, #1
 	mov	r7, #5
-	smulbb	r5, r5, r0
+	ldrh	r0, [r0]
 	mov	ip, #0
 	str	r3, [sp, #4]
-	strh	r7, [r1]	@ movhi
+	strh	r7, [r2]	@ movhi
 	it	eq
-	strheq	r4, [r1]	@ movhi
+	strheq	r4, [r2]	@ movhi
 	mov	r4, #640
-	ldr	r1, .L25+28
+	ldr	r2, .L26+28
+	smulbb	r5, r5, r0
+	ldr	r7, .L26+32
+	strh	r4, [r2]	@ movhi
 	uxth	r5, r5
-	ldr	r7, .L25+32
-	strh	r4, [r1]	@ movhi
-	ldrh	r4, [r2]
-	ldr	r1, .L25+36
-	ldr	r2, .L25+40
+	ldrh	r4, [r1]
+	ldr	r2, .L26+36
 	strh	ip, [r7]	@ movhi
+	ldr	r7, .L26+40
 	smulbb	r0, r0, r4
-	strh	r5, [r1]	@ movhi
-	ldr	r7, .L25+44
+	strh	r5, [r2]	@ movhi
+	ldr	r2, .L26+44
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
 	bl	Ftl_log2
 	ldr	r3, [sp, #4]
-	ldr	r2, .L25+48
+	ldr	r2, .L26+48
 	ldrh	fp, [r6]
 	ldrh	r8, [r3, #12]
 	strh	r0, [r2]	@ movhi
-	ldr	r2, .L25+52
+	ldr	r2, .L26+52
 	mov	r0, fp
 	strh	r8, [r7]	@ movhi
 	smulbb	r1, r5, r8
-	ldr	r6, .L25+56
+	ldr	r6, .L26+56
 	strh	r8, [r2]	@ movhi
-	ldr	r2, .L25+60
+	ldr	r2, .L26+60
 	strh	r1, [r2]	@ movhi
 	bl	Ftl_log2
 	lsl	r2, fp, #9
-	ldr	r1, .L25+64
+	ldr	r1, .L26+64
 	ldr	r3, [sp, #4]
 	mov	r10, r0
 	uxth	r2, r2
@@ -258,25 +260,25 @@ FtlConstantsInit:
 	mov	r0, #5120
 	strh	r2, [r1]	@ movhi
 	lsrs	r2, r2, #8
-	ldr	r1, .L25+68
+	ldr	r1, .L26+68
 	strh	r2, [r1]	@ movhi
 	mul	r1, r8, fp
 	ldrh	r2, [r3, #20]
-	ldr	r3, .L25+72
+	ldr	r3, .L26+72
 	strh	r2, [r3]	@ movhi
 	mul	r3, r4, r5
-	ldr	r2, .L25+76
+	ldr	r2, .L26+76
 	lsls	r4, r4, #6
 	str	r3, [r2]
 	mul	r3, fp, r3
-	ldr	r2, .L25+80
+	ldr	r2, .L26+80
 	mul	r3, r8, r3
-	ldr	r8, .L25+116
+	ldr	r8, .L26+116
 	asrs	r3, r3, #11
 	str	r3, [r2]
 	bl	__aeabi_idiv
 	uxth	r0, r0
-	ldr	r2, .L25+84
+	ldr	r2, .L26+84
 	mov	r1, r5
 	cmp	r0, #4
 	itet	ls
@@ -287,11 +289,11 @@ FtlConstantsInit:
 	asr	r3, r3, r10
 	add	r10, r10, #9
 	asr	r4, r4, r10
-	ldr	r10, .L25+120
+	ldr	r10, .L26+120
 	adds	r3, r3, #2
 	ldrh	r0, [r8]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L25+88
+	ldr	r3, .L26+88
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r5, r4
@@ -299,7 +301,7 @@ FtlConstantsInit:
 	str	r3, [r10]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L25+92
+	ldr	r4, .L26+92
 	cmp	r5, #1
 	it	eq
 	addeq	r0, r0, #4
@@ -308,9 +310,9 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #0
-	ldr	r3, .L25+96
+	ldr	r3, .L26+96
 	str	r2, [r3]
-	ldr	r3, .L25+100
+	ldr	r3, .L26+100
 	ldr	r2, [r3]
 	ldrh	r3, [r7]
 	lsls	r2, r2, #2
@@ -318,13 +320,13 @@ FtlConstantsInit:
 	ldrh	r2, [r6]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L25+104
+	ldr	r2, .L26+104
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L25+108
+	ldr	r3, .L26+108
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L25+112
+	ldr	r3, .L26+112
 	str	r0, [r3]
 	ldrh	r3, [r8]
 	adds	r3, r3, #3
@@ -335,21 +337,31 @@ FtlConstantsInit:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L26:
+.L16:
+	cmp	r7, #8
+	bne	.L17
+	cmp	ip, #1
+	itttt	eq
+	lsreq	r2, r2, #1
+	strheq	r2, [r1]	@ movhi
+	moveq	r2, #2
+	strheq	r2, [r0]	@ movhi
+	b	.L17
+.L27:
 	.align	2
-.L25:
+.L26:
 	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
-	.word	.LANCHOR12
 	.word	.LANCHOR6
+	.word	.LANCHOR12
 	.word	.LANCHOR13
 	.word	.LANCHOR14
 	.word	.LANCHOR16
 	.word	.LANCHOR15
 	.word	.LANCHOR3
-	.word	.LANCHOR17
 	.word	.LANCHOR19
+	.word	.LANCHOR17
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
@@ -382,29 +394,29 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L34
+	ldr	r3, .L35
 	ldrh	r3, [r3]
-	cbz	r3, .L33
-	ldr	r3, .L34+4
-	ldr	r2, .L34+8
+	cbz	r3, .L34
+	ldr	r3, .L35+4
+	ldr	r2, .L35+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L29:
+.L30:
 	cmp	r3, r2
-	bne	.L30
-.L33:
+	bne	.L31
+.L34:
 	movs	r0, #0
 	bx	lr
-.L30:
+.L31:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L29
+	bne	.L30
 	movs	r0, #1
 	bx	lr
-.L35:
+.L36:
 	.align	2
-.L34:
+.L35:
 	.word	.LANCHOR35
 	.word	.LANCHOR36
 	.word	.LANCHOR27
@@ -436,12 +448,12 @@ sftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L38
+	ldr	r3, .L39
 	ldr	r0, [r3]
 	bx	lr
-.L39:
+.L40:
 	.align	2
-.L38:
+.L39:
 	.word	.LANCHOR34
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__aeabi_uidivmod
@@ -456,14 +468,14 @@ sftl_get_density:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L41
+	ldr	r3, .L42
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L41+4
+	ldr	r4, .L42+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -480,7 +492,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L41+8
+	ldr	r0, .L42+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -489,9 +501,9 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L42:
+.L43:
 	.align	2
-.L41:
+.L42:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LC0
@@ -507,7 +519,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L44
+	ldr	r3, .L45
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -517,7 +529,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L44+4
+	ldr	r3, .L45+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -527,9 +539,9 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L45:
+.L46:
 	.align	2
-.L44:
+.L45:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
@@ -560,12 +572,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L48
+	ldr	r3, .L49
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L48+4
+	ldr	r3, .L49+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -576,9 +588,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L49:
+.L50:
 	.align	2
-.L48:
+.L49:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	V2P_block, .-V2P_block
@@ -593,11 +605,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L51
+	ldr	r3, .L52
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L51+4
+	ldr	r3, .L52+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -607,9 +619,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L52:
+.L53:
 	.align	2
-.L51:
+.L52:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	P2V_plane, .-P2V_plane
@@ -625,18 +637,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L54
+	ldr	r3, .L55
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L54+4
+	ldr	r3, .L55+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L55:
+.L56:
 	.align	2
-.L54:
+.L55:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -653,14 +665,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L57
+	bls	.L58
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L57:
+.L58:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -680,14 +692,14 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L60
+	ldr	r3, .L61
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L61:
+.L62:
 	.align	2
-.L60:
+.L61:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
@@ -702,15 +714,15 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L63
+	ldr	r3, .L64
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L64:
+.L65:
 	.align	2
-.L63:
+.L64:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
@@ -724,28 +736,28 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L74
+	ldr	r3, .L75
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L65
-	ldr	r2, .L74+4
+	cbz	r2, .L66
+	ldr	r2, .L75+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L67:
+.L68:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L68
-	cbz	r5, .L65
+	bgt	.L69
+	cbz	r5, .L66
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L65:
+.L66:
 	pop	{r4, r5, r6, pc}
-.L68:
+.L69:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -755,10 +767,10 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L67
-.L75:
+	b	.L68
+.L76:
 	.align	2
-.L74:
+.L75:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -773,34 +785,34 @@ FtlFreeSysBLkSort:
 IsInFreeQueue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L82
+	ldr	r3, .L83
 	push	{r4, r5, lr}
 	ldrh	r4, [r3, #6]
 	cmp	r4, #1024
-	beq	.L80
+	beq	.L81
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
-.L78:
+.L79:
 	cmp	r1, r4
-	bcc	.L79
-.L80:
+	bcc	.L80
+.L81:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L79:
+.L80:
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
-	beq	.L81
+	beq	.L82
 	adds	r1, r1, #1
-	b	.L78
-.L81:
+	b	.L79
+.L82:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L83:
+.L84:
 	.align	2
-.L82:
+.L83:
 	.word	.LANCHOR38
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",%progbits
@@ -814,12 +826,12 @@ IsInFreeQueue:
 insert_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L99
+	ldr	r3, .L100
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ldrh	r8, [r3]
 	cmp	r8, r0
-	bls	.L86
-	ldr	r3, .L99+4
+	bls	.L87
+	ldr	r3, .L100+4
 	movs	r5, #6
 	muls	r5, r0, r5
 	ldr	r4, [r3]
@@ -827,79 +839,79 @@ insert_data_list:
 	adds	r1, r4, r5
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r5]	@ movhi
-	ldr	r3, .L99+8
+	ldr	r3, .L100+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L87
-.L98:
+	bne	.L88
+.L99:
 	str	r1, [r3]
-.L86:
+.L87:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L87:
-	ldr	r3, .L99+12
+.L88:
+	ldr	r3, .L100+12
 	ldrh	r6, [r1, #4]
 	ldr	r10, [r3]
 	ldrh	r3, [r10, r0, lsl #1]
-	cbz	r6, .L94
+	cbz	r6, .L95
 	muls	r6, r3, r6
-.L88:
+.L89:
 	sub	r2, ip, r4
 	movs	r7, #0
 	asrs	r3, r2, #1
-	ldr	r2, .L99+16
+	ldr	r2, .L100+16
 	muls	r2, r3, r2
 	mov	r3, ip
 	uxth	r2, r2
-.L92:
+.L93:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r8, r7
-	bcc	.L86
+	bcc	.L87
 	cmp	r2, r0
-	beq	.L86
+	beq	.L87
 	ldrh	lr, [r3, #4]
 	cmp	lr, #0
-	beq	.L90
+	beq	.L91
 	ldrh	fp, [r10, r2, lsl #1]
 	mul	lr, lr, fp
 	cmp	r6, lr
-	bls	.L90
+	bls	.L91
 	ldrh	lr, [r3]
 	movw	fp, #65535
 	cmp	lr, fp
-	bne	.L91
+	bne	.L92
 	strh	r2, [r1, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L99+20
-	b	.L98
-.L94:
+	ldr	r3, .L100+20
+	b	.L99
+.L95:
 	mov	r6, #-1
-	b	.L88
-.L91:
+	b	.L89
+.L92:
 	movs	r3, #6
 	mov	r2, lr
 	mla	r3, r3, lr, r4
-	b	.L92
-.L90:
+	b	.L93
+.L91:
 	strh	r2, [r4, r5]	@ movhi
 	cmp	r3, ip
 	ldrh	r2, [r3, #2]
 	strh	r2, [r1, #2]	@ movhi
-	bne	.L93
+	bne	.L94
 	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L99+8
-	b	.L98
-.L93:
+	ldr	r3, .L100+8
+	b	.L99
+.L94:
 	ldrh	r1, [r3, #2]
 	movs	r2, #6
 	muls	r2, r1, r2
 	strh	r0, [r4, r2]	@ movhi
 	strh	r0, [r3, #2]	@ movhi
-	b	.L86
-.L100:
+	b	.L87
+.L101:
 	.align	2
-.L99:
+.L100:
 	.word	.LANCHOR5
 	.word	.LANCHOR40
 	.word	.LANCHOR41
@@ -920,25 +932,25 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L103
+	ldr	r2, .L104
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L103+4
+	ldr	r2, .L104+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L101
+	bcs	.L102
 	movs	r2, #214
-	ldr	r1, .L103+8
-	ldr	r0, .L103+12
+	ldr	r1, .L104+8
+	ldr	r0, .L104+12
 	pop	{r3, lr}
 	b	printf
-.L101:
+.L102:
 	pop	{r3, pc}
-.L104:
+.L105:
 	.align	2
-.L103:
+.L104:
 	.word	.LANCHOR44
 	.word	.LANCHOR5
 	.word	.LANCHOR45
@@ -958,48 +970,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L106
-	ldr	r3, .L112
+	beq	.L107
+	ldr	r3, .L113
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L112+4
+	ldr	r3, .L113+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L107
+	cbnz	r6, .L108
 	str	r5, [r3]
-.L106:
+.L107:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L107:
-	ldr	r3, .L112+8
+.L108:
+	ldr	r3, .L113+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L112+12
+	ldr	r2, .L113+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L110:
+.L111:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L108
+	bcs	.L109
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L109
+	bne	.L110
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L106
-.L109:
+	b	.L107
+.L110:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L110
-.L108:
+	b	.L111
+.L109:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -1014,10 +1026,10 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L106
-.L113:
+	b	.L107
+.L114:
 	.align	2
-.L112:
+.L113:
 	.word	.LANCHOR40
 	.word	.LANCHOR46
 	.word	.LANCHOR47
@@ -1036,25 +1048,25 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L116
+	ldr	r2, .L117
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L116+4
+	ldr	r2, .L117+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L114
+	bcs	.L115
 	movs	r2, #207
-	ldr	r1, .L116+8
-	ldr	r0, .L116+12
+	ldr	r1, .L117+8
+	ldr	r0, .L117+12
 	pop	{r3, lr}
 	b	printf
-.L114:
+.L115:
 	pop	{r3, pc}
-.L117:
+.L118:
 	.align	2
-.L116:
+.L117:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
@@ -1073,7 +1085,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L124
+	ldr	r5, .L125
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1081,20 +1093,20 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L119
+	bne	.L120
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L119
+	beq	.L120
 	mov	r2, #372
-	ldr	r1, .L124+4
-	ldr	r0, .L124+8
+	ldr	r1, .L125+4
+	ldr	r0, .L125+8
 	bl	printf
-.L119:
+.L120:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L120
+	bne	.L121
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -1105,24 +1117,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L122:
+.L123:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L120:
+.L121:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L123
+	bne	.L124
 	cmp	r1, r3
-	beq	.L122
+	beq	.L123
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L122
-.L123:
+	b	.L123
+.L124:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -1130,10 +1142,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L122
-.L125:
+	b	.L123
+.L126:
 	.align	2
-.L124:
+.L125:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
@@ -1151,15 +1163,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L132
-	ldr	r2, .L133
+	cbz	r3, .L133
+	ldr	r2, .L134
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L128:
-	cbnz	r1, .L129
-.L131:
-	ldr	r4, .L133+4
+.L129:
+	cbnz	r1, .L130
+.L132:
+	ldr	r4, .L134+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1167,20 +1179,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L129:
+.L130:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L131
+	beq	.L132
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L128
-.L132:
+	b	.L129
+.L133:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L134:
+.L135:
 	.align	2
-.L133:
+.L134:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -1210,37 +1222,37 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L142
+	ldr	r3, .L143
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L141
-	ldr	r2, .L142+4
+	cbz	r3, .L142
+	ldr	r2, .L143+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L138:
-	cbz	r0, .L139
+.L139:
+	cbz	r0, .L140
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L140
-.L141:
+	bne	.L141
+.L142:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L140:
+.L141:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L138
-.L139:
-	ldr	r0, .L142+8
+	b	.L139
+.L140:
+	ldr	r0, .L143+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L143:
+.L144:
 	.align	2
-.L142:
+.L143:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1256,61 +1268,61 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L155
+	ldr	r3, .L156
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L146
-	ldr	r3, .L155+4
+	beq	.L147
+	ldr	r3, .L156+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L146
-	ldr	r3, .L155+8
+	beq	.L147
+	ldr	r3, .L156+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L146
-	ldr	r7, .L155+12
+	beq	.L147
+	ldr	r7, .L156+12
 	movs	r6, #6
-	ldr	r3, .L155+16
+	ldr	r3, .L156+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L146
-	ldr	r3, .L155+20
+	beq	.L147
+	ldr	r3, .L156+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L153
+	beq	.L154
 	muls	r5, r2, r5
-.L148:
+.L149:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L149
+	bne	.L150
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L149
+	bne	.L150
 	movw	r2, #463
-	ldr	r1, .L155+24
-	ldr	r0, .L155+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L149:
+.L150:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L150
+	bne	.L151
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L146
-.L150:
+	beq	.L147
+.L151:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L155+32
+	ldr	r3, .L156+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -1318,39 +1330,39 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L154
+	cbz	r3, .L155
 	muls	r3, r0, r3
-.L151:
+.L152:
 	cmp	r5, r3
-	bcs	.L146
-	ldr	r5, .L155+36
+	bcs	.L147
+	ldr	r5, .L156+36
 	mov	r1, r4
-	ldr	r0, .L155+16
+	ldr	r0, .L156+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L152
+	cbnz	r3, .L153
 	mov	r2, #474
-	ldr	r1, .L155+24
-	ldr	r0, .L155+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L152:
+.L153:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L146:
+.L147:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L153:
-	mov	r5, #-1
-	b	.L148
 .L154:
+	mov	r5, #-1
+	b	.L149
+.L155:
 	mov	r3, #-1
-	b	.L151
-.L156:
+	b	.L152
+.L157:
 	.align	2
-.L155:
+.L156:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -1375,79 +1387,79 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L167
+	ldr	r3, .L168
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L167+4
+	ldr	r3, .L168+4
 	ldr	r3, [r3]
-.L158:
+.L159:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L160
+	bcc	.L161
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L161:
+.L162:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L163
+	bcc	.L164
 	cmp	r4, r2
-	bcc	.L159
-	ldr	r1, .L167+8
+	bcc	.L160
+	ldr	r1, .L168+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L164:
+.L165:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L166
+	bcc	.L167
 	cmp	r4, r2
-	bcc	.L159
+	bcc	.L160
 	movw	r2, #789
-	ldr	r1, .L167+12
-	ldr	r0, .L167+16
+	ldr	r1, .L168+12
+	ldr	r0, .L168+16
 	bl	printf
-	b	.L159
-.L160:
+	b	.L160
+.L161:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L158
-.L159:
+	bne	.L159
+.L160:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L163:
+.L164:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L162
+	blt	.L163
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L162:
+.L163:
 	adds	r1, r1, #1
-	b	.L161
-.L166:
+	b	.L162
+.L167:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L165
+	bls	.L166
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L165:
+.L166:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L164
-.L168:
+	b	.L165
+.L169:
 	.align	2
-.L167:
+.L168:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR56
@@ -1465,45 +1477,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L179
+	ldr	r2, .L180
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L170
-	cbnz	r0, .L170
+	bhi	.L171
+	cbnz	r0, .L171
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L170:
+.L171:
 	movs	r3, #0
-	ldr	r0, .L179+4
+	ldr	r0, .L180+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L179+8
+	ldr	r1, .L180+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L179+12
+	ldr	r2, .L180+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L171:
+.L172:
 	cmp	r1, r4
-	bne	.L173
-	cbz	r3, .L169
+	bne	.L174
+	cbz	r3, .L170
 	str	r0, [r2]
-.L169:
+.L170:
 	pop	{r4, r5, r6, pc}
-.L173:
+.L174:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L171
-.L180:
+	b	.L172
+.L181:
 	.align	2
-.L179:
+.L180:
 	.word	.LANCHOR58
 	.word	.LANCHOR5
 	.word	.LANCHOR42
@@ -1522,10 +1534,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L182
+	cbz	r1, .L183
 	b	ftl_set_blk_mode.part.6
-.L182:
-	ldr	r2, .L183
+.L183:
+	ldr	r2, .L184
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -1535,9 +1547,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L184:
+.L185:
 	.align	2
-.L183:
+.L184:
 	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -1552,7 +1564,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L186
+	ldr	r3, .L187
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -1560,9 +1572,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L187:
+.L188:
 	.align	2
-.L186:
+.L187:
 	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -1580,14 +1592,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L195
+	ldr	r3, .L196
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L189:
+.L190:
 	cmp	r2, r4
-	bcc	.L191
-	ldr	r3, .L195+4
+	bcc	.L192
+	ldr	r3, .L196+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -1595,12 +1607,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L192:
+.L193:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L194
+	bhi	.L195
 	pop	{r4, r5, r6, pc}
-.L191:
+.L192:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1609,8 +1621,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L189
-.L194:
+	b	.L190
+.L195:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1618,10 +1630,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L192
-.L196:
+	b	.L193
+.L197:
 	.align	2
-.L195:
+.L196:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -1638,24 +1650,24 @@ FtlSlcSuperblockCheck:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
-	cbz	r3, .L197
+	cbz	r3, .L198
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L197
+	beq	.L198
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L203
+	ldr	r2, .L204
 	ldrh	r4, [r2]
 	mov	r2, r3
-.L200:
+.L201:
 	cmp	r1, r2
-	beq	.L202
-.L197:
+	beq	.L203
+.L198:
 	pop	{r4, r5, pc}
-.L202:
+.L203:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1669,10 +1681,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L200
-.L204:
+	b	.L201
+.L205:
 	.align	2
-.L203:
+.L204:
 	.word	.LANCHOR3
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
@@ -1686,32 +1698,32 @@ FtlSlcSuperblockCheck:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L211
+	ldr	r3, .L212
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L206
+	bcc	.L207
 	movw	r2, #2148
-	ldr	r1, .L211+4
-	ldr	r0, .L211+8
+	ldr	r1, .L212+4
+	ldr	r0, .L212+8
 	bl	printf
-.L206:
-	ldr	r3, .L211+12
+.L207:
+	ldr	r3, .L212+12
 	add	r6, r4, #16
-	ldr	r10, .L211+24
+	ldr	r10, .L212+24
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L207:
+.L208:
 	uxth	r3, r5
 	ldrh	r1, [r4]
 	cmp	r8, r3
-	bhi	.L209
-	ldr	r2, .L211+16
+	bhi	.L210
+	ldr	r2, .L212+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
@@ -1719,7 +1731,7 @@ make_superblock:
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L211+20
+	ldr	r3, .L212+20
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r1, lsl #1]
 	movw	r3, #10000
@@ -1728,24 +1740,24 @@ make_superblock:
 	movhi	r3, #1
 	strbhi	r3, [r4, #9]
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L209:
+.L210:
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L208
+	cbnz	r0, .L209
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L208:
+.L209:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L207
-.L212:
+	b	.L208
+.L213:
 	.align	2
-.L211:
+.L212:
 	.word	.LANCHOR5
 	.word	.LANCHOR60
 	.word	.LC1
@@ -1767,46 +1779,46 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L219
+	ldr	r3, .L220
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L219+12
+	ldr	r10, .L220+12
 	ldrh	r7, [r3]
-	ldr	r3, .L219+4
+	ldr	r3, .L220+4
 	ldrh	r8, [r3]
-.L214:
+.L215:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L216
-	cbz	r4, .L218
+	bhi	.L217
+	cbz	r4, .L219
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L217:
-	ldr	r3, .L219+8
+.L218:
+	ldr	r3, .L220+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L216:
+.L217:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L215
+	cbnz	r0, .L216
 	add	r4, r4, r8
 	uxth	r4, r4
-.L215:
+.L216:
 	adds	r5, r5, #1
-	b	.L214
-.L218:
+	b	.L215
+.L219:
 	mov	r0, r4
-	b	.L217
-.L220:
+	b	.L218
+.L221:
 	.align	2
-.L219:
+.L220:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.word	.LANCHOR40
@@ -1824,24 +1836,24 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L224
+	ldr	r3, .L225
 	ldr	r0, [r3]
-	cbz	r0, .L222
-	ldr	r3, .L224+4
+	cbz	r0, .L223
+	ldr	r3, .L225+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L224+8
+	ldr	r3, .L225+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L224+12
+	ldr	r3, .L225+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L222:
+.L223:
 	bx	lr
-.L225:
+.L226:
 	.align	2
-.L224:
+.L225:
 	.word	.LANCHOR46
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1858,11 +1870,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L234
+	ldr	r3, .L235
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L232
-	ldr	r2, .L234+4
+	cbz	r3, .L233
+	ldr	r2, .L235+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -1871,37 +1883,37 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L234+8
+	ldr	r2, .L235+8
 	ldr	r1, [r2]
-	ldr	r2, .L234+12
+	ldr	r2, .L235+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L229:
+.L230:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L231
+	bls	.L232
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L233
-.L231:
-	ldr	r2, .L234+16
+	bne	.L234
+.L232:
+	ldr	r2, .L235+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L233:
+.L234:
 	mov	r3, r4
-	b	.L229
-.L232:
+	b	.L230
+.L233:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L235:
+.L236:
 	.align	2
-.L234:
+.L235:
 	.word	.LANCHOR46
 	.word	.LANCHOR48
 	.word	.LANCHOR40
@@ -1922,18 +1934,18 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L237
-	ldr	r2, .L238
+	beq	.L238
+	ldr	r2, .L239
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L237:
+.L238:
 	movs	r0, #0
 	pop	{r3, pc}
-.L239:
+.L240:
 	.align	2
-.L238:
+.L239:
 	.word	.LANCHOR42
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -1952,45 +1964,45 @@ get_new_active_ppa:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L241
+	bne	.L242
 	movw	r2, #2781
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L241:
-	ldr	r6, .L255+8
+.L242:
+	ldr	r6, .L256+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r6]
 	cmp	r2, r3
-	bne	.L242
+	bne	.L243
 	movw	r2, #2782
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L242:
+.L243:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L243
+	cbnz	r3, .L244
 	movw	r2, #2783
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L243:
+.L244:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	strb	r3, [r4, #10]
 	movw	r5, #65535
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L255+12
+	ldr	r2, .L256+12
 	ldrh	r1, [r2]
 	mov	r2, r3
-.L244:
+.L245:
 	cmp	r0, r5
-	beq	.L246
+	beq	.L247
 	ldrh	r5, [r4, #2]
 	ldrh	r6, [r6]
 	cmp	r5, r6
-	bcs	.L250
+	bcs	.L251
 	ldrh	r2, [r4, #4]
 	orr	r5, r5, r0, lsl #10
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
@@ -1998,7 +2010,7 @@ get_new_active_ppa:
 	subs	r2, r2, #1
 	uxth	r2, r2
 	strh	r2, [r4, #4]	@ movhi
-.L249:
+.L250:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2010,20 +2022,20 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L249
+	beq	.L250
 	strb	r3, [r4, #6]
 	ldrh	r3, [r4, #2]
 	cmp	r3, r6
-	bne	.L240
-	cbz	r2, .L240
+	bne	.L241
+	cbz	r2, .L241
 	movw	r2, #2806
-	ldr	r1, .L255
-	ldr	r0, .L255+4
+	ldr	r1, .L256
+	ldr	r0, .L256+4
 	bl	printf
-.L240:
+.L241:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.L246:
+.L247:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -2037,13 +2049,13 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L244
-.L250:
+	b	.L245
+.L251:
 	movw	r5, #65535
-	b	.L240
-.L256:
+	b	.L241
+.L257:
 	.align	2
-.L255:
+.L256:
 	.word	.LANCHOR61
 	.word	.LC1
 	.word	.LANCHOR19
@@ -2062,54 +2074,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L262
+	ldr	r1, .L263
 	mov	fp, #1
-	ldr	r2, .L262+4
+	ldr	r2, .L263+4
 	ldr	r5, [r1]
-	ldr	r1, .L262+8
+	ldr	r1, .L263+8
 	str	r3, [r2]
-	ldr	r2, .L262+12
+	ldr	r2, .L263+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L262+16
+	ldr	r1, .L263+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L262+20
+	ldr	r1, .L263+20
 	ldr	r10, [r1]
-	ldr	r1, .L262+24
+	ldr	r1, .L263+24
 	ldrh	r7, [r1]
-	ldr	r1, .L262+28
+	ldr	r1, .L263+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L258:
+.L259:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L259
-	ldr	r3, .L262+32
+	bne	.L260
+	ldr	r3, .L263+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L262+8
+	ldr	r3, .L263+8
 	ldr	r4, [r3]
-	ldr	r3, .L262+20
+	ldr	r3, .L263+20
 	ldr	ip, [r3]
-.L260:
+.L261:
 	cmp	r2, r0
-	bcc	.L261
+	bcc	.L262
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L259:
+.L260:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -2123,8 +2135,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-16]
 	mov	r3, ip
 	str	r6, [r4, #-20]
-	b	.L258
-.L261:
+	b	.L259
+.L262:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -2139,10 +2151,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L260
-.L263:
+	b	.L261
+.L264:
 	.align	2
-.L262:
+.L263:
 	.word	.LANCHOR63
 	.word	.LANCHOR62
 	.word	.LANCHOR64
@@ -2164,41 +2176,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L271
+	ldr	r3, .L272
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #20
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L271+4
+	ldr	r3, .L272+4
 	ldr	r5, [r3]
-.L265:
+.L266:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L264
+	bls	.L265
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L266:
+.L267:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L267
+	bls	.L268
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L266
+	bne	.L267
 	str	lr, [r10, #8]
-.L267:
+.L268:
 	adds	r4, r4, #1
-	b	.L265
-.L264:
+	b	.L266
+.L265:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L272:
+.L273:
 	.align	2
-.L271:
+.L272:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -2213,43 +2225,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L280
+	ldr	r3, .L281
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #20
 	ldr	r4, [r3]
-	ldr	r3, .L280+4
+	ldr	r3, .L281+4
 	ldr	r5, [r3]
-.L274:
+.L275:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L278
+	bhi	.L279
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L278:
+.L279:
 	mov	r10, #0
-.L275:
+.L276:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L276
+	bls	.L277
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L275
+	bne	.L276
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L276:
+.L277:
 	adds	r2, r2, #1
-	b	.L274
-.L281:
+	b	.L275
+.L282:
 	.align	2
-.L280:
+.L281:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -2265,25 +2277,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L287
-	ldr	r2, .L287+4
+	ldr	r3, .L288
+	ldr	r2, .L288+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L283:
+.L284:
 	cmp	r3, r2
-	bne	.L285
+	bne	.L286
 	movs	r0, #0
 	bx	lr
-.L285:
+.L286:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L283
+	bne	.L284
 	movs	r0, #1
 	bx	lr
-.L288:
+.L289:
 	.align	2
-.L287:
+.L288:
 	.word	.LANCHOR68
 	.word	.LANCHOR69
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2300,35 +2312,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L293
+	ldr	r4, .L294
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L293+4
+	ldr	r3, .L294+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L290:
+.L291:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L292
-	bne	.L291
+	bcc	.L293
+	bne	.L292
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L291
-.L292:
+	b	.L292
+.L293:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L290
-.L291:
-	ldr	r2, .L293+8
+	bne	.L291
+.L292:
+	ldr	r2, .L294+8
 	movs	r0, #12
-	ldr	r1, .L293+12
+	ldr	r1, .L294+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -2339,9 +2351,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L294:
+.L295:
 	.align	2
-.L293:
+.L294:
 	.word	.LANCHOR69
 	.word	.LANCHOR68
 	.word	.LANCHOR70
@@ -2359,29 +2371,29 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
-	ldr	r4, .L298
+	ldr	r4, .L299
 	ldrh	r5, [r4]
 	cmp	r5, r0
-	beq	.L296
-	ldr	r3, .L298+4
+	beq	.L297
+	ldr	r3, .L299+4
 	ldrh	r1, [r3]
 	cmp	r0, r1
-	beq	.L296
+	beq	.L297
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L297
+	bne	.L298
 	strh	r0, [r4]	@ movhi
-.L296:
+.L297:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L297:
+.L298:
 	cmp	r1, r2
 	it	eq
 	strheq	r0, [r3]	@ movhi
-	b	.L296
-.L299:
+	b	.L297
+.L300:
 	.align	2
-.L298:
+.L299:
 	.word	.LANCHOR72
 	.word	.LANCHOR73
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -2400,33 +2412,33 @@ FtlGcMarkBadPhyBlk:
 	mov	r4, r0
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L304
+	ldr	r2, .L305
 	movs	r1, #0
-	ldr	r5, .L304+4
+	ldr	r5, .L305+4
 	ldrh	r3, [r2]
-.L301:
+.L302:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L303
+	bhi	.L304
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L304+4
+	ldrls	r2, .L305+4
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L302
-.L303:
+	b	.L303
+.L304:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L301
-.L302:
+	bne	.L302
+.L303:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L305:
+.L306:
 	.align	2
-.L304:
+.L305:
 	.word	.LANCHOR74
 	.word	.LANCHOR75
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
@@ -2441,22 +2453,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L312
+	ldr	r3, .L313
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L307
-	ldr	r2, .L312+4
+	cbz	r3, .L308
+	ldr	r2, .L313+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L307
-	ldr	r4, .L312+8
+	bne	.L308
+	ldr	r4, .L313+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L312+12
+	ldr	r3, .L313+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -2464,12 +2476,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L307:
+.L308:
 	movs	r0, #0
 	pop	{r4, pc}
-.L313:
+.L314:
 	.align	2
-.L312:
+.L313:
 	.word	.LANCHOR74
 	.word	.LANCHOR72
 	.word	.LANCHOR76
@@ -2523,48 +2535,48 @@ rknand_print_hex:
 	mov	r10, r3
 	mov	r5, r6
 	mov	r4, r6
-.L317:
+.L318:
 	cmp	r4, r10
-	bcc	.L323
-	ldr	r0, .L326
+	bcc	.L324
+	ldr	r0, .L327
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L323:
-	cbnz	r5, .L318
+.L324:
+	cbnz	r5, .L319
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L326+4
+	ldr	r0, .L327+4
 	bl	printf
-.L318:
+.L319:
 	cmp	r8, #4
-	bne	.L319
+	bne	.L320
 	ldr	r1, [r7, r4, lsl #2]
+.L326:
+	ldr	r0, .L327+8
 .L325:
-	ldr	r0, .L326+8
-.L324:
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L322
+	bls	.L323
 	movs	r5, #0
-	ldr	r0, .L326
+	ldr	r0, .L327
 	bl	printf
-.L322:
+.L323:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L317
-.L319:
+	b	.L318
+.L320:
 	cmp	r8, #2
-	bne	.L321
+	bne	.L322
 	ldrh	r1, [r7, r4, lsl #1]
-	b	.L325
-.L321:
+	b	.L326
+.L322:
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L326+12
-	b	.L324
-.L327:
+	ldr	r0, .L327+12
+	b	.L325
+.L328:
 	.align	2
-.L326:
+.L327:
 	.word	.LC5
 	.word	.LC2
 	.word	.LC3
@@ -2583,41 +2595,41 @@ FlashEraseBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r6, .L344
+	ldr	r6, .L345
 	add	r8, r0, #4
 	movs	r7, #0
-	ldr	fp, .L344+20
+	ldr	fp, .L345+20
 	ldrh	r10, [r6, #12]
 	str	r2, [sp]
 	lsl	r3, r10, #3
 	str	r3, [sp, #4]
-.L329:
+.L330:
 	ldr	r3, [sp]
 	cmp	r7, r3
-	beq	.L343
+	beq	.L344
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r8]
 	bl	l2p_addr_tran.isra.0
 	ldr	r5, [sp, #8]
-	cbnz	r5, .L330
+	cbnz	r5, .L331
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bls	.L330
-	ldr	r6, .L344+4
-	ldr	r7, .L344+8
-.L331:
+	bls	.L331
+	ldr	r6, .L345+4
+	ldr	r7, .L345+8
+.L332:
 	ldr	r3, [sp]
 	adds	r4, r4, #20
 	cmp	r5, r3
-	bne	.L332
-.L343:
+	bne	.L333
+.L344:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L332:
+.L333:
 	mov	r3, #-1
 	ldr	r2, [sp, #12]
 	str	r3, [r4, #-20]
@@ -2628,44 +2640,44 @@ FlashEraseBlocks:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L344+12
+	ldr	r0, .L345+12
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L344+16
+	ldr	r0, .L345+16
 	bl	rknand_print_hex
-	b	.L331
-.L330:
+	b	.L332
+.L331:
 	ldr	r2, [fp, #4]
 	uxtb	r0, r5
 	ldr	r1, [sp, #12]
 	blx	r2
-	cbnz	r0, .L333
+	cbnz	r0, .L334
 	str	r0, [r8, #-4]
-.L334:
+.L335:
 	ldrh	r2, [r6, #14]
 	cmp	r2, #4
-	bne	.L336
+	bne	.L337
 	ldr	r1, [sp, #12]
 	ldr	r2, [fp, #4]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	add	r1, r1, r10
 	blx	r2
-	cbz	r0, .L336
+	cbz	r0, .L337
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-.L336:
+.L337:
 	adds	r7, r7, #1
 	add	r8, r8, #20
-	b	.L329
-.L333:
+	b	.L330
+.L334:
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-	b	.L334
-.L345:
+	b	.L335
+.L346:
 	.align	2
-.L344:
+.L345:
 	.word	.LANCHOR0
 	.word	.LANCHOR77
 	.word	.LC6
@@ -2690,14 +2702,14 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L346
-	ldr	r4, .L355
+	bhi	.L347
+	ldr	r4, .L356
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L346
-	cbz	r1, .L348
+	beq	.L347
+	cbz	r1, .L349
 	bl	P2V_block_in_plane
-	ldr	r3, .L355+4
+	ldr	r3, .L356+4
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -2705,16 +2717,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L355+8
+	ldr	r3, .L356+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L355+12
+	ldr	r2, .L356+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L348:
+.L349:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -2724,11 +2736,11 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L346:
+.L347:
 	pop	{r4, r5, r6, pc}
-.L356:
+.L357:
 	.align	2
-.L355:
+.L356:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
 	.word	.LANCHOR47
@@ -2746,9 +2758,9 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L362
+	ldr	r4, .L363
 	ldrh	r2, [r4, #6]
-	cbz	r2, .L361
+	cbz	r2, .L362
 	ldrh	r3, [r4, #2]
 	subs	r2, r2, #1
 	strh	r2, [r4, #6]	@ movhi
@@ -2759,36 +2771,36 @@ FtlFreeSysBlkQueueOut:
 	ldrh	r5, [r4, r1, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
 	mov	r1, r2
-	ldr	r3, .L362+4
+	ldr	r3, .L363+4
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r2, .L362+8
+	ldr	r2, .L363+8
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L358:
+.L359:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L359
+	bls	.L360
 	ldrh	r2, [r4, #6]
 	mov	r1, r5
-	ldr	r0, .L362+12
+	ldr	r0, .L363+12
 	bl	printf
-.L360:
-	b	.L360
 .L361:
+	b	.L361
+.L362:
 	movw	r5, #65535
-	b	.L358
-.L359:
+	b	.L359
+.L360:
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L363:
+.L364:
 	.align	2
-.L362:
+.L363:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
 	.word	.LANCHOR80
@@ -2810,16 +2822,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L365:
+.L366:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L368
+	bcs	.L369
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L365
+	bne	.L366
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -2827,14 +2839,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L366
-	ldr	r3, .L372
-	ldr	r0, .L372+4
+	bls	.L367
+	ldr	r3, .L373
+	ldr	r0, .L373+4
 	ldrh	r2, [r3, #6]
 	bl	printf
+.L368:
+	b	.L368
 .L367:
-	b	.L367
-.L366:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -2843,20 +2855,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L368:
+.L369:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L370
+	bhi	.L371
 	movw	r2, #578
-	ldr	r1, .L372+8
-	ldr	r0, .L372+12
+	ldr	r1, .L373+8
+	ldr	r0, .L373+12
 	bl	printf
-.L370:
+.L371:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L373:
+.L374:
 	.align	2
-.L372:
+.L373:
 	.word	.LANCHOR38
 	.word	.LC10
 	.word	.LANCHOR81
@@ -2887,102 +2899,102 @@ ftl_memset:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L380
+	ldr	r3, .L381
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L380+4
+	ldr	r2, .L381+4
 	movs	r6, #12
 	str	r4, [r3]
-	ldr	r3, .L380+8
-	ldr	r5, .L380+12
-	ldr	r10, .L380+292
+	ldr	r3, .L381+8
+	ldr	r5, .L381+12
+	ldr	r10, .L381+292
 	str	r4, [r3]
-	ldr	r3, .L380+16
+	ldr	r3, .L381+16
 	ldrh	r0, [r5]
-	ldr	r8, .L380+296
+	ldr	r8, .L381+296
 	str	r4, [r3]
-	ldr	r3, .L380+20
+	ldr	r3, .L381+20
 	lsls	r0, r0, #1
-	ldr	fp, .L380+300
+	ldr	fp, .L381+300
 	str	r4, [r3]
-	ldr	r3, .L380+24
+	ldr	r3, .L381+24
 	str	r4, [r3]
-	ldr	r3, .L380+28
+	ldr	r3, .L381+28
 	str	r4, [r3]
-	ldr	r3, .L380+32
+	ldr	r3, .L381+32
 	str	r4, [r3]
-	ldr	r3, .L380+36
+	ldr	r3, .L381+36
 	str	r4, [r3]
-	ldr	r3, .L380+40
+	ldr	r3, .L381+40
 	str	r4, [r3]
-	ldr	r3, .L380+44
+	ldr	r3, .L381+44
 	str	r4, [r3]
-	ldr	r3, .L380+48
+	ldr	r3, .L381+48
 	str	r4, [r3]
-	ldr	r3, .L380+52
+	ldr	r3, .L381+52
 	str	r4, [r3]
-	ldr	r3, .L380+56
+	ldr	r3, .L381+56
 	str	r4, [r3]
-	ldr	r3, .L380+60
+	ldr	r3, .L381+60
 	str	r4, [r3]
-	ldr	r3, .L380+64
+	ldr	r3, .L381+64
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L380+68
+	ldr	r2, .L381+68
 	str	r4, [r2]
-	ldr	r2, .L380+72
+	ldr	r2, .L381+72
 	str	r4, [r2]
-	ldr	r2, .L380+76
+	ldr	r2, .L381+76
 	str	r4, [r2]
-	ldr	r2, .L380+80
+	ldr	r2, .L381+80
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L380+84
+	ldr	r2, .L381+84
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L380+88
+	ldr	r3, .L381+88
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L380+92
+	ldr	r3, .L381+92
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L380+96
+	ldr	r3, .L381+96
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L380+100
+	ldr	r3, .L381+100
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L380+104
+	ldr	r3, .L381+104
 	strh	r4, [r3]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L380+108
+	ldr	r3, .L381+108
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #20
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+112
+	ldr	r3, .L381+112
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L380+116
+	ldr	r3, .L381+116
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+120
+	ldr	r3, .L381+120
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L380+124
-	ldr	r7, .L380+128
+	ldr	r3, .L381+124
+	ldr	r7, .L381+128
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+132
+	ldr	r3, .L381+132
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+136
+	ldr	r3, .L381+136
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -2991,166 +3003,166 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L380+140
+	ldr	r3, .L381+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+144
+	ldr	r3, .L381+144
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+148
+	ldr	r3, .L381+148
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+152
+	ldr	r3, .L381+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+156
+	ldr	r3, .L381+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+160
+	ldr	r3, .L381+160
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+164
+	ldr	r3, .L381+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+168
+	ldr	r3, .L381+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+172
+	ldr	r3, .L381+172
 	str	r0, [r3]
-	ldr	r3, .L380+176
+	ldr	r3, .L381+176
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+180
+	ldr	r3, .L381+180
 	ldrh	r5, [r10]
-	ldr	r10, .L380+304
+	ldr	r10, .L381+304
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L380+184
+	ldr	r3, .L381+184
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L380+188
+	ldr	r5, .L381+188
 	bl	ftl_malloc
-	ldr	r3, .L380+192
+	ldr	r3, .L381+192
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L380+308
+	ldr	r8, .L381+308
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+196
+	ldr	r3, .L381+196
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L380+200
+	ldr	r3, .L381+200
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L380+204
+	ldr	r0, .L381+204
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L380+208
+	ldr	r3, .L381+208
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L380+212
+	ldr	r3, .L381+212
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L380+216
+	ldr	r3, .L381+216
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L380+220
+	ldr	r3, .L381+220
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L380+224
-	ldr	r8, .L380+312
+	ldr	r3, .L381+224
+	ldr	r8, .L381+312
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L380+228
+	ldr	r3, .L381+228
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L380+232
+	ldr	r3, .L381+232
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L380+236
+	ldr	r3, .L381+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L380+316
+	ldr	r8, .L381+316
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+240
+	ldr	r3, .L381+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L380+244
-	ldr	r4, .L380+248
+	ldr	r3, .L381+244
+	ldr	r4, .L381+248
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L380+252
+	ldr	r3, .L381+252
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+256
+	ldr	r3, .L381+256
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L380+260
+	ldr	r3, .L381+260
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L380+264
+	ldr	r6, .L381+264
 	bl	ftl_malloc
-	ldr	r3, .L380+268
+	ldr	r3, .L381+268
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+272
+	ldr	r3, .L381+272
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L380+276
+	ldr	r5, .L381+276
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L380+280
+	ldr	r3, .L381+280
 	str	r0, [r3]
-	ldr	r3, .L380+284
+	ldr	r3, .L381+284
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -3161,16 +3173,16 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L380+288
+	ldr	r3, .L381+288
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
 	mov	r0, r1
-	b	.L381
-.L382:
+	b	.L382
+.L383:
 	.align	2
-.L380:
+.L381:
 	.word	.LANCHOR82
 	.word	.LANCHOR96
 	.word	.LANCHOR83
@@ -3251,32 +3263,32 @@ FtlMemInit:
 	.word	.LANCHOR116
 	.word	.LANCHOR27
 	.word	.LANCHOR28
-.L381:
-.L376:
+.L382:
+.L377:
 	cmp	r2, r6
-	bcc	.L377
+	bcc	.L378
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L383
+	ldr	r2, .L384
 	movs	r1, #0
 	adds	r3, r3, #24
-.L378:
+.L379:
 	cmp	r3, r2
-	bne	.L379
+	bne	.L380
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L377:
+.L378:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L376
-.L379:
+	b	.L377
+.L380:
 	str	r1, [r3, #4]!
-	b	.L378
-.L384:
+	b	.L379
+.L385:
 	.align	2
-.L383:
+.L384:
 	.word	.LANCHOR37+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
@@ -3290,32 +3302,32 @@ FtlMemInit:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L391
+	ldr	r3, .L392
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L391+4
+	ldr	r7, .L392+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L391+12
+	ldr	r8, .L392+12
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L388:
+.L389:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L385
+	beq	.L386
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L387
+	bhi	.L388
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L391+8
+	ldr	r0, .L392+8
 	bl	printf
-.L387:
+.L388:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -3325,12 +3337,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L388
-.L385:
+	bne	.L389
+.L386:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L392:
+.L393:
 	.align	2
-.L391:
+.L392:
 	.word	.LANCHOR127
 	.word	.LANCHOR17
 	.word	.LC1
@@ -3348,7 +3360,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L394
+	ldr	r0, .L395
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -3357,9 +3369,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L395:
+.L396:
 	.align	2
-.L394:
+.L395:
 	.word	.LANCHOR37
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -3373,7 +3385,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L397
+	ldr	r3, .L398
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -3386,9 +3398,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L398:
+.L399:
 	.align	2
-.L397:
+.L398:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -3413,12 +3425,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L400:
+.L401:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L404
-	ldr	r3, .L419
+	bhi	.L405
+	ldr	r3, .L420
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -3426,59 +3438,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L405:
+.L406:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L409
+	bhi	.L410
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L404:
+.L405:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L401:
+.L402:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L403
+	bhi	.L404
 	adds	r3, r3, #1
-	b	.L400
-.L403:
+	b	.L401
+.L404:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L402
-	cbz	r1, .L402
+	bne	.L403
+	cbz	r1, .L403
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L402:
+.L403:
 	adds	r2, r2, #1
-	b	.L401
-.L409:
+	b	.L402
+.L410:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L406
+	bls	.L407
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L407
-.L408:
+	cbnz	r0, .L408
+.L409:
 	adds	r6, r6, #1
-	b	.L405
-.L406:
+	b	.L406
+.L407:
 	cmp	r3, #0
-	bne	.L408
+	bne	.L409
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L408
-.L410:
+	beq	.L409
+.L411:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -3487,16 +3499,16 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L408
-.L407:
+	b	.L409
+.L408:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L410
-	b	.L408
-.L420:
+	beq	.L411
+	b	.L409
+.L421:
 	.align	2
-.L419:
+.L420:
 	.word	.LANCHOR20
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -3512,14 +3524,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L424
-	ldr	r4, .L424+4
+	ldr	r5, .L425
+	ldr	r4, .L425+4
 	ldr	r2, [r5]
-	ldr	r7, .L424+8
-	ldr	r6, .L424+12
+	ldr	r7, .L425+8
+	ldr	r6, .L425+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L424+44
+	ldr	r8, .L425+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -3527,7 +3539,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L424+16
+	ldr	r3, .L425+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -3538,47 +3550,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L422:
+.L423:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L423
-	ldr	r3, .L424+20
+	bne	.L424
+	ldr	r3, .L425+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L424+24
+	ldr	r2, .L425+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L424+28
+	ldr	r2, .L425+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L424+32
+	ldr	r2, .L425+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L424+36
+	ldr	r2, .L425+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L424+40
+	ldr	r2, .L425+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L423:
+.L424:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L422
-.L425:
+	b	.L423
+.L426:
 	.align	2
-.L424:
+.L425:
 	.word	.LANCHOR30
 	.word	.LANCHOR120
 	.word	.LANCHOR23
@@ -3605,53 +3617,53 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r2, #65535
-	ldr	r3, .L427
+	ldr	r3, .L428
 	movs	r4, #0
 	mov	r1, r4
-	ldr	r5, .L427+4
+	ldr	r5, .L428+4
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L427+8
+	ldr	r3, .L428+8
 	str	r4, [r3]
-	ldr	r3, .L427+12
+	ldr	r3, .L428+12
 	str	r4, [r3]
-	ldr	r3, .L427+16
+	ldr	r3, .L428+16
 	str	r2, [r3]
-	ldr	r3, .L427+20
+	ldr	r3, .L428+20
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L427+24
+	ldr	r3, .L428+24
 	ldrh	r2, [r3]
-	ldr	r3, .L427+28
+	ldr	r3, .L428+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L427+32
+	ldr	r3, .L428+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L427+36
+	ldr	r3, .L428+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L427+40
+	ldr	r0, .L428+40
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L427+44
+	ldr	r0, .L428+44
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L428:
+.L429:
 	.align	2
-.L427:
+.L428:
 	.word	.LANCHOR131
 	.word	.LANCHOR6
 	.word	.LANCHOR132
@@ -3678,10 +3690,10 @@ SupperBlkListInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r3, .L440
+	ldr	r3, .L441
 	movs	r1, #0
 	movs	r4, #0
-	ldr	r6, .L440+4
+	ldr	r6, .L441+4
 	mov	r8, r4
 	ldrh	r3, [r3]
 	mov	r5, r4
@@ -3689,119 +3701,119 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L440+8
-	ldr	r2, .L440+12
+	ldr	r3, .L441+8
+	ldr	r2, .L441+12
 	str	r4, [r3]
-	ldr	r3, .L440+16
+	ldr	r3, .L441+16
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
 	str	r4, [r3]
-	ldr	r3, .L440+20
+	ldr	r3, .L441+20
 	str	r4, [r3]
-	ldr	r3, .L440+24
+	ldr	r3, .L441+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L430:
-	ldr	r3, .L440+28
+.L431:
+	ldr	r3, .L441+28
 	uxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L437
-	ldr	r3, .L440+32
+	bcs	.L438
+	ldr	r3, .L441+32
 	ldrh	r2, [r3]
-	ldr	r3, .L440+36
+	ldr	r3, .L441+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L438
-.L432:
+	b	.L439
+.L433:
 	str	r2, [sp, #12]
 	mov	r1, r7
-	ldr	r2, .L440+40
+	ldr	r2, .L441+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L431
+	cbnz	r0, .L432
 	ldr	r1, [sp]
 	add	r6, r6, r1
 	uxth	r6, r6
-.L431:
+.L432:
 	adds	r3, r3, #1
-.L438:
+.L439:
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L432
+	bhi	.L433
 	uxth	r3, r4
-	cbz	r6, .L433
+	cbz	r6, .L434
 	mov	r1, r6
 	str	r3, [sp]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp]
 	uxth	r6, r0
-.L434:
+.L435:
 	ldr	r1, [r10]
 	movs	r2, #6
 	mla	r2, r2, r3, r1
 	strh	r6, [r2, #4]	@ movhi
-	ldr	r2, .L440+44
+	ldr	r2, .L441+44
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L435
-	ldr	r2, .L440+48
+	beq	.L436
+	ldr	r2, .L441+48
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L435
-	ldr	r2, .L440+52
+	beq	.L436
+	ldr	r2, .L441+52
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L435
-	ldr	r2, .L440+56
+	beq	.L436
+	ldr	r2, .L441+56
 	ldr	r2, [r2]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L436
+	cbnz	r3, .L437
 	add	r8, r8, #1
 	mov	r0, r7
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L435:
+.L436:
 	adds	r4, r4, #1
-	b	.L430
-.L433:
-	ldr	r2, .L440+56
+	b	.L431
+.L434:
+	ldr	r2, .L441+56
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r3, lsl #1]	@ movhi
-	b	.L434
-.L436:
+	b	.L435
+.L437:
 	adds	r5, r5, #1
 	mov	r0, r7
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L435
-.L437:
+	b	.L436
+.L438:
 	ldr	r2, [sp, #4]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r5, r3
-	ble	.L439
+	ble	.L440
 	movw	r2, #2210
-	ldr	r1, .L440+60
-	ldr	r0, .L440+64
+	ldr	r1, .L441+60
+	ldr	r0, .L441+64
 	bl	printf
-.L439:
+.L440:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L441:
+.L442:
 	.align	2
-.L440:
+.L441:
 	.word	.LANCHOR6
 	.word	.LANCHOR40
 	.word	.LANCHOR46
@@ -3831,16 +3843,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L443
+	ldr	r2, .L444
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L443+4
+	ldr	r4, .L444+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L443+8
+	ldr	r2, .L444+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L443+12
+	ldr	r3, .L444+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -3848,14 +3860,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L443+16
+	ldr	r3, .L444+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L444:
+.L445:
 	.align	2
-.L443:
+.L444:
 	.word	.LANCHOR69
 	.word	.LANCHOR21
 	.word	.LANCHOR70
@@ -3879,39 +3891,39 @@ FlashGetBadBlockList:
 	movs	r1, #255
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L452
+	ldr	r3, .L453
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L446
+	bls	.L447
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	ftl_memset
 	movs	r0, #0
-.L446:
-	ldr	r3, .L452+4
+.L447:
+	ldr	r3, .L453+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L451
+	bne	.L452
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L448:
+.L449:
 	cmp	r3, r1
-	bne	.L449
-.L451:
+	bne	.L450
+.L452:
 	pop	{r3, r4, r5, pc}
-.L449:
+.L450:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L448
-.L453:
+	b	.L449
+.L454:
 	.align	2
-.L452:
+.L453:
 	.word	.LANCHOR78
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -3942,48 +3954,48 @@ FlashReadPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r1
-	ldr	r3, .L495
+	ldr	r3, .L496
 	mov	r4, r0
 	mov	r10, #0
 	ldrh	r2, [r3, #12]
 	str	r3, [sp, #4]
 	str	r2, [sp]
-.L456:
+.L457:
 	cmp	r10, fp
-	bne	.L470
+	bne	.L471
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L470:
+.L471:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L457
+	cbz	r3, .L458
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L458
-.L457:
+	cbnz	r3, .L459
+.L458:
 	movs	r2, #90
-	ldr	r1, .L495+4
-	ldr	r0, .L495+8
+	ldr	r1, .L496+4
+	ldr	r0, .L496+8
 	bl	printf
-.L458:
+.L459:
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r0, [sp, #8]
 	cmp	r0, #3
-	bls	.L459
+	bls	.L460
 	mov	r3, #-1
 	str	r3, [r4]
-.L460:
+.L461:
 	add	r10, r10, #1
 	adds	r4, r4, #20
-	b	.L456
-.L459:
+	b	.L457
+.L460:
 	ldr	r5, [r4, #8]
 	uxtb	r0, r0
-	ldr	r8, .L495+32
-	ldr	r7, .L495+12
+	ldr	r8, .L496+32
+	ldr	r7, .L496+12
 	tst	r5, #63
 	ldr	r3, [r4, #12]
 	it	ne
@@ -3996,7 +4008,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L463
+	bne	.L464
 	ldr	r0, [sp]
 	add	r2, r5, #2048
 	ldr	r3, [r4, #12]
@@ -4007,67 +4019,67 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r7
 	adds	r1, r0, #1
-	beq	.L464
+	beq	.L465
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L465
+	bne	.L466
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L465
+	bne	.L466
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L465
-.L464:
+	beq	.L466
+.L465:
 	mov	r3, #-1
 	str	r3, [r4]
-.L465:
+.L466:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L466
+	beq	.L467
 	cmp	r0, #256
 	it	eq
 	streq	r0, [r4]
-.L466:
+.L467:
 	ldr	r3, [r4]
 	adds	r2, r3, #1
-	beq	.L467
+	beq	.L468
 	cmp	r3, #256
-	bne	.L463
-.L467:
+	bne	.L464
+.L468:
 	ldr	r1, [r4, #4]
 	ldr	r2, [sp, #12]
-	ldr	r0, .L495+16
+	ldr	r0, .L496+16
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L469
+	cbz	r1, .L470
 	movs	r3, #4
-	ldr	r0, .L495+20
+	ldr	r0, .L496+20
 	mov	r2, r3
 	bl	rknand_print_hex
-.L469:
+.L470:
 	ldr	r1, [r4, #12]
-	cbz	r1, .L463
+	cbz	r1, .L464
 	movs	r3, #4
-	ldr	r0, .L495+24
+	ldr	r0, .L496+24
 	mov	r2, r3
 	bl	rknand_print_hex
-.L463:
+.L464:
 	ldr	r3, [r8]
 	cmp	r5, r3
-	bne	.L460
+	bne	.L461
 	ldr	r0, [r4, #8]
 	cmp	r5, r0
-	beq	.L460
-	ldr	r3, .L495+28
+	beq	.L461
+	ldr	r3, .L496+28
 	mov	r1, r5
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-	b	.L460
-.L496:
+	b	.L461
+.L497:
 	.align	2
-.L495:
+.L496:
 	.word	.LANCHOR0
 	.word	.LANCHOR137
 	.word	.LC1
@@ -4089,36 +4101,36 @@ FlashReadPages:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L507
+	ldr	r3, .L508
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L507+4
+	ldr	r5, .L508+4
 	ldr	r3, [r3]
-	ldr	r7, .L507+8
-	ldr	r10, .L507+20
+	ldr	r7, .L508+8
+	ldr	r10, .L508+20
 	str	r3, [r5, #8]
-	ldr	r3, .L507+12
+	ldr	r3, .L508+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L498:
-	ldr	r3, .L507+16
+.L499:
+	ldr	r3, .L508+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L503
+	bcc	.L504
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L503:
+.L504:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L507+4
+	ldr	fp, .L508+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L499:
+.L500:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L501
+	bgt	.L502
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -4128,22 +4140,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L500
+	beq	.L501
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L500
+	bne	.L501
 	strh	r4, [r7]	@ movhi
-.L501:
+.L502:
 	adds	r6, r6, #1
-	b	.L498
-.L500:
+	b	.L499
+.L501:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L499
-.L508:
+	b	.L500
+.L509:
 	.align	2
-.L507:
+.L508:
 	.word	.LANCHOR106
 	.word	.LANCHOR138
 	.word	.LANCHOR37+10
@@ -4165,17 +4177,17 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L521
+	ldreq	r3, .L522
 	sub	sp, sp, #88
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L521+4
+	ldrne	r3, .L522+4
 	mov	r6, r1
 	add	r0, sp, #4
 	movs	r1, #1
 	ldrh	r5, [r3]
-	ldr	r3, .L521+8
+	ldr	r3, .L522+8
 	subs	r5, r5, #1
 	ldr	r3, [r3]
 	sxth	r5, r5
@@ -4187,17 +4199,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L512
+	bne	.L513
 	mov	r8, #0
-.L513:
+.L514:
 	cmp	r8, r5
-	ble	.L516
-.L512:
+	ble	.L517
+.L513:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L516:
+.L517:
 	add	r3, r8, r5
 	mov	r2, r6
 	add	r3, r3, r3, lsr #31
@@ -4210,23 +4222,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L514
+	bne	.L515
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L514
+	bne	.L515
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L514
+	beq	.L515
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L513
-.L514:
+	b	.L514
+.L515:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L513
-.L522:
+	b	.L514
+.L523:
 	.align	2
-.L521:
+.L522:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	.LANCHOR112
@@ -4244,69 +4256,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L604
+	ldr	r5, .L605
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L604+4
+	ldr	r3, .L605+4
 	ldr	r2, [r5]
-	ldr	r6, .L604+8
+	ldr	r6, .L605+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L604+12
+	ldr	r3, .L605+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L604+16
+	ldr	r7, .L605+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L604+20
+	ldr	r3, .L605+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L604+24
+	ldr	r3, .L605+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L604+28
+	ldr	r3, .L605+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L604+32
+	ldr	r0, .L605+32
 	bl	ftl_memset
-	ldr	r3, .L604+36
+	ldr	r3, .L605+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L524:
-	ldr	r3, .L604+40
+.L525:
+	ldr	r3, .L605+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L565
-	ldr	r3, .L604+44
+	bls	.L566
+	ldr	r3, .L605+44
 	movs	r5, #0
-	ldr	r1, .L604+48
+	ldr	r1, .L605+48
 	mov	fp, r5
 	movs	r7, #20
 	ldrh	r8, [r3]
-	ldr	r3, .L604+52
+	ldr	r3, .L605+52
 	ldr	r2, [r1]
-	ldr	r1, .L604+56
+	ldr	r1, .L605+56
 	ldr	r6, [r3]
-	ldr	r3, .L604+60
+	ldr	r3, .L605+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L604+64
-	b	.L566
-.L526:
+	ldr	r2, .L605+64
+	b	.L567
+.L527:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -4316,7 +4328,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L525
+	cbnz	r0, .L526
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -4329,31 +4341,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L525:
+.L526:
 	adds	r5, r5, #1
-.L566:
+.L567:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L526
+	bhi	.L527
 	cmp	fp, #0
-	bne	.L527
-.L564:
+	bne	.L528
+.L565:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L524
-.L527:
+	b	.L525
+.L528:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L528:
+.L529:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L564
-	ldr	r3, .L604+52
+	bls	.L565
+	ldr	r3, .L605+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -4363,10 +4375,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L531
+	bne	.L532
 	mov	r10, #16
-.L533:
-	ldr	r3, .L604+52
+.L534:
+	ldr	r3, .L605+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -4378,83 +4390,83 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L604+52
+	ldr	r3, .L605+52
 	ldr	r3, [r3]
-	bne	.L530
+	bne	.L531
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L604+52
+	ldr	r3, .L605+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L531
-.L532:
+	bne	.L532
+.L533:
 	movs	r1, #1
-	b	.L603
-.L530:
+	b	.L604
+.L531:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L531
+	bne	.L532
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L533
-	b	.L532
-.L531:
-	ldr	r3, .L604+68
+	bne	.L534
+	b	.L533
+.L532:
+	ldr	r3, .L605+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L534
+	beq	.L535
 	cmp	r2, r3
-	bhi	.L535
-.L534:
+	bhi	.L536
+.L535:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L604+68
+	ldrne	r1, .L605+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L535:
+.L536:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L537
-	bhi	.L538
+	beq	.L538
+	bhi	.L539
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L539
-.L536:
+	beq	.L540
+.L537:
 	adds	r7, r7, #1
-	b	.L528
-.L538:
+	b	.L529
+.L539:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L540
+	beq	.L541
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L536
+	bne	.L537
 	movs	r1, #0
-.L603:
+.L604:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L536
-.L540:
-	ldr	r3, .L604+8
+	b	.L537
+.L541:
+	ldr	r3, .L605+8
 	ldrh	r2, [r3]
-	ldr	r3, .L604
+	ldr	r3, .L605
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L542
+	bls	.L543
 	movw	r2, #1225
-	ldr	r1, .L604+72
-	ldr	r0, .L604+76
+	ldr	r1, .L605+72
+	ldr	r0, .L605+76
 	bl	printf
-.L542:
+.L543:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L604+12
+	ldr	r2, .L605+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -4462,61 +4474,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L543:
+.L544:
 	cmp	r3, r10
-	bgt	.L549
+	bgt	.L550
 	cmp	r3, #0
-	bge	.L581
-	b	.L536
-.L549:
+	bge	.L582
+	b	.L537
+.L550:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L544
+	bls	.L545
 	ldr	r2, [ip]
-	cbnz	r2, .L545
+	cbnz	r2, .L546
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L604+8
+	ldrne	r2, .L605+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L545:
-	ldr	r2, .L604+20
+.L546:
+	ldr	r2, .L605+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L546:
+.L547:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L547
+	bhi	.L548
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L536
-	ldr	r2, .L604+8
+	blt	.L537
+	ldr	r2, .L605+8
 	ldrh	r0, [r2]
-	ldr	r2, .L604
+	ldr	r2, .L605
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L536
-.L581:
-	ldr	r2, .L604+8
+	bgt	.L537
+.L582:
+	ldr	r2, .L605+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L604+20
-.L601:
+	ldr	r2, .L605+20
+.L602:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L536
-.L547:
+	b	.L537
+.L548:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4524,14 +4536,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L546
-.L544:
+	b	.L547
+.L545:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L543
-.L605:
+	b	.L544
+.L606:
 	.align	2
-.L604:
+.L605:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR130
@@ -4552,72 +4564,72 @@ FtlScanSysBlk:
 	.word	.LANCHOR82
 	.word	.LANCHOR140
 	.word	.LC1
-.L539:
-	ldr	r8, .L606+12
-	ldr	r10, .L606+20
+.L540:
+	ldr	r8, .L607+12
+	ldr	r10, .L607+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L552
+	bls	.L553
 	movw	r2, #1266
-	ldr	r1, .L606
-	ldr	r0, .L606+4
+	ldr	r1, .L607
+	ldr	r0, .L607+4
 	bl	printf
-.L552:
-	ldr	r2, .L606+8
+.L553:
+	ldr	r2, .L607+8
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L553:
+.L554:
 	cmp	r3, r10
-	ble	.L558
+	ble	.L559
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L554
+	bls	.L555
 	ldr	r2, [r0]
-	cbnz	r2, .L555
+	cbnz	r2, .L556
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L606+12
+	ldrne	r2, .L607+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L555:
-	ldr	r2, .L606+16
+.L556:
+	ldr	r2, .L607+16
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L556:
+.L557:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L557
+	bhi	.L558
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L558:
+.L559:
 	cmp	r3, #0
-	blt	.L536
-	ldr	r2, .L606+20
-	ldr	ip, .L606+12
+	blt	.L537
+	ldr	r2, .L607+20
+	ldr	ip, .L607+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L536
+	bgt	.L537
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L606+16
-	b	.L601
-.L557:
+	ldr	r2, .L607+16
+	b	.L602
+.L558:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4625,88 +4637,88 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L556
-.L554:
+	b	.L557
+.L555:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L553
-.L537:
-	ldr	r8, .L606+40
+	b	.L554
+.L538:
+	ldr	r8, .L607+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L560
-.L602:
+	bne	.L561
+.L603:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L536
-.L560:
+	b	.L537
+.L561:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L561
+	beq	.L562
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L561:
+.L562:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L562
+	bcs	.L563
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L602
-.L562:
+	b	.L603
+.L563:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L536
-.L565:
-	ldr	r3, .L606+24
+	b	.L537
+.L566:
+	ldr	r3, .L607+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L567
-.L570:
-	ldr	r3, .L606+16
+	cbz	r3, .L568
+.L571:
+	ldr	r3, .L607+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L568
-.L569:
-	ldr	r3, .L606+28
+	beq	.L569
+.L570:
+	ldr	r3, .L607+28
 	ldrh	r2, [r3]
-	ldr	r3, .L606+32
+	ldr	r3, .L607+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L600
+	bls	.L601
 	movw	r2, #1391
-	ldr	r1, .L606
-	ldr	r0, .L606+4
+	ldr	r1, .L607
+	ldr	r0, .L607+4
 	bl	printf
-.L600:
+.L601:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L567:
-	ldr	r1, .L606+28
+.L568:
+	ldr	r1, .L607+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L570
-	ldr	r5, .L606+32
+	beq	.L571
+	ldr	r5, .L607+32
 	ldr	r0, [r5]
-.L571:
+.L572:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L570
+	bcs	.L571
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L571
-	ldr	r3, .L606+36
+	beq	.L572
+	ldr	r3, .L607+36
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L572:
+.L573:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L570
+	bcs	.L571
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -4715,30 +4727,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L572
-.L568:
-	ldr	r3, .L606+12
+	b	.L573
+.L569:
+	ldr	r3, .L607+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L569
-	ldr	r5, .L606+20
+	beq	.L570
+	ldr	r5, .L607+20
 	ldrh	r1, [r5]
-.L577:
+.L578:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L569
+	bge	.L570
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L577
-	ldr	r2, .L606+8
+	beq	.L578
+	ldr	r2, .L607+8
 	movs	r0, #0
 	ldr	r2, [r2]
-.L578:
+.L579:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L569
+	bge	.L570
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -4747,10 +4759,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L578
-.L607:
+	b	.L579
+.L608:
 	.align	2
-.L606:
+.L607:
 	.word	.LANCHOR140
 	.word	.LC1
 	.word	.LANCHOR122
@@ -4775,24 +4787,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L637+40
-	ldr	r4, .L637
+	ldr	r8, .L638+40
+	ldr	r4, .L638
 	ldr	r3, [r8]
-	ldr	r7, .L637+4
+	ldr	r7, .L638+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L637+8
+	ldr	r3, .L638+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L609:
+.L610:
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L612
+	bgt	.L613
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -4801,7 +4813,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L610
+	bne	.L611
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -4809,101 +4821,101 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L610:
+.L611:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L611
+	beq	.L612
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L611
-	ldr	r3, .L637+12
+	bne	.L612
+	ldr	r3, .L638+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L612:
-	ldr	r5, .L637+12
+.L613:
+	ldr	r5, .L638+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L626
+	beq	.L627
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L616
+	beq	.L617
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L637
+	ldr	r0, .L638
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L616
+	beq	.L617
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L616
+	bne	.L617
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L616
+	bls	.L617
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L616:
-	ldr	r10, .L637
+.L617:
+	ldr	r10, .L638
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L618:
+.L619:
 	cmp	r7, #0
-	bge	.L621
+	bge	.L622
 	movs	r2, #251
-	ldr	r1, .L637+16
-	ldr	r0, .L637+20
+	ldr	r1, .L638+16
+	ldr	r0, .L638+20
 	bl	printf
-.L620:
+.L621:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L623
-	ldr	r3, .L637+24
+	beq	.L624
+	ldr	r3, .L638+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L623
-	ldr	r3, .L637+28
+	beq	.L624
+	ldr	r3, .L638+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L623
+	bcs	.L624
 	cmp	r0, r3
-	bcs	.L623
+	bcs	.L624
 	bl	FtlSysBlkNumInit
-.L623:
-	ldr	r6, .L637+32
-	movs	r5, #0
-	ldr	r7, .L637+36
-	ldr	r8, .L637+44
 .L624:
+	ldr	r6, .L638+32
+	movs	r5, #0
+	ldr	r7, .L638+36
+	ldr	r8, .L638+44
+.L625:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L625
+	bcc	.L626
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L611:
+.L612:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L609
-.L621:
+	b	.L610
+.L622:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -4915,16 +4927,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L619
+	beq	.L620
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L620
-.L619:
+	beq	.L621
+.L620:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L618
-.L625:
+	b	.L619
+.L626:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -4932,13 +4944,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L624
-.L626:
+	b	.L625
+.L627:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L638:
+.L639:
 	.align	2
-.L637:
+.L638:
 	.word	.LANCHOR138
 	.word	.LANCHOR17
 	.word	.LANCHOR114
@@ -4969,26 +4981,26 @@ FlashProgPages:
 	mov	r10, r1
 	mov	r4, r0
 	mov	r5, r0
-	ldr	r3, .L680
+	ldr	r3, .L681
 	mov	r8, #0
-	ldr	fp, .L680+52
+	ldr	fp, .L681+52
 	str	r2, [sp, #8]
 	ldrh	r3, [r3, #12]
 	str	r3, [sp]
 	lsls	r3, r3, #3
 	str	r3, [sp, #4]
-.L640:
+.L641:
 	cmp	r8, r10
-	bne	.L653
+	bne	.L654
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L672
-	ldr	r6, .L680+4
+	beq	.L673
+	ldr	r6, .L681+4
 	movs	r5, #0
-.L655:
+.L656:
 	cmp	r8, r5
-	beq	.L672
-	ldr	r7, .L680+8
+	beq	.L673
+	ldr	r7, .L681+8
 	movs	r1, #0
 	ldr	r2, [r6]
 	add	r0, sp, #28
@@ -5004,81 +5016,81 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r10, [sp, #28]
 	cmp	r10, #-1
-	bne	.L656
+	bne	.L657
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+12
+	ldr	r0, .L681+12
 	bl	printf
 	str	r10, [r4]
-.L656:
+.L657:
 	ldr	r10, [sp, #28]
 	cmp	r10, #256
-	bne	.L657
+	bne	.L658
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+16
+	ldr	r0, .L681+16
 	bl	printf
 	str	r10, [r4]
-.L657:
+.L658:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L658
+	cbz	r3, .L659
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L658
+	beq	.L659
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+20
+	ldr	r0, .L681+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L658:
+.L659:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L659
+	cbz	r3, .L660
 	ldr	r2, [r3]
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L659
+	beq	.L660
 	ldr	r1, [r4, #4]
-	ldr	r0, .L680+24
+	ldr	r0, .L681+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L659:
+.L660:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-	b	.L655
-.L653:
+	b	.L656
+.L654:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L641
+	cbz	r3, .L642
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L642
-.L641:
+	cbnz	r3, .L643
+.L642:
 	movs	r2, #142
-	ldr	r1, .L680+28
-	ldr	r0, .L680+32
+	ldr	r1, .L681+28
+	ldr	r0, .L681+32
 	bl	printf
-.L642:
+.L643:
 	add	r2, sp, #20
 	add	r1, sp, #24
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r6, [sp, #20]
 	cmp	r6, #3
-	bls	.L643
-.L679:
+	bls	.L644
+.L680:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L644
-.L643:
-	cbnz	r6, .L645
+	b	.L645
+.L644:
+	cbnz	r6, .L646
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bls	.L645
-	ldr	r5, .L680+28
-	ldr	r7, .L680+36
-	b	.L678
-.L647:
+	bls	.L646
+	ldr	r5, .L681+28
+	ldr	r7, .L681+36
+	b	.L679
+.L648:
 	mov	r3, #-1
 	ldr	r2, [r4, #-16]
 	str	r3, [r4, #-20]
@@ -5089,49 +5101,49 @@ FlashProgPages:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L680+40
+	ldr	r0, .L681+40
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L680+44
+	ldr	r0, .L681+44
 	bl	rknand_print_hex
-.L678:
+.L679:
 	cmp	r6, r10
 	add	r4, r4, #20
-	bne	.L647
-.L672:
+	bne	.L648
+.L673:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L645:
+.L646:
 	ldr	r1, [r5, #8]
 	lsls	r3, r1, #26
-	beq	.L661
-	ldr	r3, .L680+4
+	beq	.L662
+	ldr	r3, .L681+4
 	ldr	r6, [r3]
 	cmp	r1, r6
-	beq	.L648
-	ldr	r3, .L680+48
+	beq	.L649
+	ldr	r3, .L681+48
 	mov	r0, r6
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L648:
+.L649:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	ldr	r1, [sp, #24]
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	ldr	r7, [fp, #8]
 	blx	r7
-	cbnz	r0, .L649
+	cbnz	r0, .L650
 	str	r0, [r5]
-.L650:
-	ldr	r3, .L680
+.L651:
+	ldr	r3, .L681
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L644
+	bne	.L645
 	ldr	r0, [sp]
 	add	r2, r6, #2048
 	ldr	r3, [r5, #12]
@@ -5142,21 +5154,21 @@ FlashProgPages:
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	blx	r6
 	cmp	r0, #0
-	bne	.L679
-.L644:
+	bne	.L680
+.L645:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L640
-.L661:
+	b	.L641
+.L662:
 	mov	r6, r1
-	b	.L648
-.L649:
+	b	.L649
+.L650:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L650
-.L681:
+	b	.L651
+.L682:
 	.align	2
-.L680:
+.L681:
 	.word	.LANCHOR0
 	.word	.LANCHOR111
 	.word	.LANCHOR113
@@ -5183,133 +5195,133 @@ FlashProgPages:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L725
+	ldr	r3, .L726
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L725+4
+	ldr	r7, .L726+4
 	mov	r8, #0
 	mov	r6, r1
 	mov	r5, r8
 	str	r0, [r3]
 	mov	r4, r8
-	ldr	r3, .L725+8
+	ldr	r3, .L726+8
 	mov	fp, #20
 	ldr	r10, [r7]
 	str	r0, [sp, #4]
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L725+12
+	ldr	r3, .L726+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L725+16
+	ldr	r3, .L726+16
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L725+20
+	ldr	r3, .L726+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L683:
+.L684:
 	ldr	r3, [sp, #12]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L687
+	bhi	.L688
 	cmp	r5, #0
-	beq	.L682
+	beq	.L683
 	mov	r0, r10
 	mov	r8, #0
 	mov	r10, #20
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.L690:
+.L691:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L692
+	bhi	.L693
 	cmp	r6, #0
-	beq	.L708
-	ldr	r3, .L725+24
+	beq	.L709
+	ldr	r3, .L726+24
 	mov	r10, #1
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-.L693:
+.L694:
 	movs	r7, #0
-.L702:
-	ldr	r3, .L725+8
+.L703:
+	ldr	r3, .L726+8
 	mov	r8, #0
 	mov	r5, r8
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L725+4
+	ldr	r3, .L726+4
 	ldr	fp, [r3]
-	ldr	r3, .L725+28
+	ldr	r3, .L726+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L725+12
+	ldr	r3, .L726+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L725+20
+	ldr	r3, .L726+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.L694:
+.L695:
 	ldr	r3, [sp, #16]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L697
-	cbz	r5, .L682
+	bhi	.L698
+	cbz	r5, .L683
 	mov	r0, fp
-	ldr	fp, .L725+4
+	ldr	fp, .L726+4
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r5
 	mov	r8, #0
 	bl	FlashProgPages
 	movs	r3, #20
-.L699:
+.L700:
 	uxth	r2, r8
 	cmp	r5, r2
-	bhi	.L701
+	bhi	.L702
 	adds	r7, r7, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L702
-	ldr	r8, .L725+4
+	bhi	.L703
+	ldr	r8, .L726+4
 	movs	r7, #0
 	mov	fp, #20
-.L703:
+.L704:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L705
+	bhi	.L706
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L706
-	cbz	r6, .L682
-.L706:
-	ldr	r3, .L725+4
+	bls	.L707
+	cbz	r6, .L683
+.L707:
+	ldr	r3, .L726+4
 	mov	r2, r5
 	mov	r1, r10
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L682:
+.L683:
 	mov	r0, r4
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L687:
+.L688:
 	mul	r2, fp, r8
 	movs	r3, #0
 	ldr	r1, [sp, #4]
 	str	r3, [r10, r2]
-	ldr	r3, .L725+32
+	ldr	r3, .L726+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #8]
-	cbz	r6, .L684
+	cbz	r6, .L685
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L685
-.L684:
+	cbnz	r0, .L686
+.L685:
 	ldr	r0, [sp, #8]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L686
+	cbnz	r0, .L687
 	ldr	r3, [sp, #8]
 	mla	r1, fp, r5, r10
 	lsls	r2, r3, #10
@@ -5324,50 +5336,50 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L685:
-	add	r8, r8, #1
-	b	.L683
 .L686:
+	add	r8, r8, #1
+	b	.L684
+.L687:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L685
-.L692:
+	b	.L686
+.L693:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L691
+	bne	.L692
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L691:
+.L692:
 	add	r8, r8, #1
-	b	.L690
-.L708:
+	b	.L691
+.L709:
 	movs	r3, #2
 	mov	r10, r6
 	str	r3, [sp, #8]
-	b	.L693
-.L697:
+	b	.L694
+.L698:
 	movs	r3, #20
 	ldr	r1, [sp, #4]
 	mul	r2, r3, r8
 	movs	r3, #0
 	str	r3, [fp, r2]
-	ldr	r3, .L725+32
+	ldr	r3, .L726+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r6, .L695
+	cbz	r6, .L696
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L696
-.L695:
+	cbnz	r0, .L697
+.L696:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L696
+	cbnz	r0, .L697
 	movs	r3, #20
 	mla	r1, r3, r5, fp
 	ldr	r3, [sp, #12]
@@ -5383,15 +5395,15 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L696:
+.L697:
 	add	r8, r8, #1
-	b	.L694
-.L701:
+	b	.L695
+.L702:
 	mul	r2, r3, r8
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L700
+	cbz	r2, .L701
 	ldr	r0, [r0, #4]
 	adds	r4, r4, #1
 	str	r3, [sp, #12]
@@ -5399,26 +5411,26 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r3, [sp, #12]
-.L700:
+.L701:
 	add	r8, r8, #1
-	b	.L699
-.L705:
-	cbz	r6, .L704
+	b	.L700
+.L706:
+	cbz	r6, .L705
 	mul	r3, fp, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L704
+	cbnz	r3, .L705
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L704:
+.L705:
 	adds	r7, r7, #1
-	b	.L703
-.L726:
+	b	.L704
+.L727:
 	.align	2
-.L725:
+.L726:
 	.word	.LANCHOR99
 	.word	.LANCHOR79
 	.word	.LANCHOR3
@@ -5444,8 +5456,8 @@ FlashTestBlk:
 	push	{r4, r5, lr}
 	mov	r5, r0
 	sub	sp, sp, #92
-	bls	.L730
-	ldr	r4, .L732
+	bls	.L731
+	ldr	r4, .L733
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -5469,7 +5481,7 @@ FlashTestBlk:
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L731
+	cbnz	r3, .L732
 	adds	r3, r5, #1
 	add	r0, sp, #4
 	str	r3, [sp, #8]
@@ -5482,26 +5494,26 @@ FlashTestBlk:
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-.L729:
+.L730:
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
 	str	r5, [sp, #8]
 	bl	FlashEraseBlocks
-.L727:
+.L728:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L731:
+.L732:
 	mov	r4, #-1
-	b	.L729
-.L730:
+	b	.L730
+.L731:
 	movs	r4, #0
-	b	.L727
-.L733:
+	b	.L728
+.L734:
 	.align	2
-.L732:
+.L733:
 	.word	.LANCHOR112
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -5517,28 +5529,28 @@ FtlBbmTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r7, .L748
+	ldr	r7, .L749
 	movs	r4, #0
-	ldr	r5, .L748+4
+	ldr	r5, .L749+4
 	ldr	r3, [r7]
-	ldr	fp, .L748+52
-	ldr	r6, .L748+8
+	ldr	fp, .L749+52
+	ldr	r6, .L749+8
 	str	r3, [r5, #12]
-	ldr	r3, .L748+12
+	ldr	r3, .L749+12
 	ldr	r0, [fp]
-	ldr	r8, .L748+56
+	ldr	r8, .L749+56
 	ldrh	r2, [r3]
 	str	r0, [r5, #8]
 	bl	ftl_memset
 	str	r7, [sp, #12]
-	ldr	r7, .L748+16
-.L735:
+	ldr	r7, .L749+16
+.L736:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L736
+	blt	.L737
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L748+20
+	ldr	r4, .L749+20
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -5555,13 +5567,13 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L748+24
+	ldr	r3, .L749+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-	ldr	r3, .L748+28
+	ldr	r3, .L749+28
 	ldr	r3, [r3]
 	strh	r3, [r6, #14]	@ movhi
-.L737:
+.L738:
 	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
@@ -5576,14 +5588,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L748+32
+	ldr	r0, .L749+32
 	bl	printf
-	ldr	r3, .L748+36
+	ldr	r3, .L749+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L738
+	blt	.L739
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -5594,7 +5606,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L748+40
+	ldr	r2, .L749+40
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -5603,9 +5615,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L738:
+.L739:
 	movs	r3, #1
-	ldr	r0, .L748+4
+	ldr	r0, .L749+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -5614,21 +5626,21 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r2, r3, #1
-	bne	.L739
+	bne	.L740
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L748+44
+	ldr	r0, .L749+44
 	bl	printf
 	cmp	r7, #3
-	bls	.L737
+	bls	.L738
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L748+48
+	ldr	r0, .L749+48
 	bl	printf
-.L741:
-	b	.L741
-.L736:
+.L742:
+	b	.L742
+.L737:
 	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -5637,20 +5649,20 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L735
-.L739:
+	b	.L736
+.L740:
 	add	r8, r8, #1
 	cmp	r8, #1
-	beq	.L737
+	beq	.L738
 	cmp	r3, #256
-	beq	.L737
+	beq	.L738
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L749:
+.L750:
 	.align	2
-.L748:
+.L749:
 	.word	.LANCHOR114
 	.word	.LANCHOR138
 	.word	.LANCHOR37+24
@@ -5680,26 +5692,26 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L751:
-	ldr	r3, .L790
-	ldr	r8, .L790+68
+.L752:
+	ldr	r3, .L791
+	ldr	r8, .L791+68
 	ldrh	r3, [r3]
-	ldr	r10, .L790+72
+	ldr	r10, .L791+72
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L752
+	ble	.L753
 	mov	r2, #2656
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L752:
-	ldr	r3, .L790+12
+.L753:
+	ldr	r3, .L791+12
 	cmp	r4, r3
-	bne	.L778
-	ldr	r3, .L790
-	ldr	r2, .L790+16
+	bne	.L779
+	ldr	r3, .L791
+	ldr	r2, .L791+16
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -5707,118 +5719,118 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L753
+	cbz	r1, .L754
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L753:
-	ldr	r0, .L790+20
+.L754:
+	ldr	r0, .L791+20
 	bl	List_pop_index_node
-	ldr	r3, .L790
+	ldr	r3, .L791
 	mov	r5, r0
 	uxth	r7, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L754
+	cbnz	r3, .L755
 	movw	r2, #2665
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L754:
-	ldr	r3, .L790
-	ldr	r2, .L790
+.L755:
+	ldr	r3, .L791
+	ldr	r2, .L791
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r10]
 	cmp	r3, r7
-	bls	.L751
+	bls	.L752
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L790+24
+	ldr	r3, .L791+24
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L751
+	bne	.L752
 	strh	r7, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L756
-	ldr	r3, .L790+24
+	cbnz	r3, .L757
+	ldr	r3, .L791+24
 	movw	r2, #65535
 	mov	r0, r7
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L790
+	ldr	r3, .L791
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L751
+	ble	.L752
 	movw	r2, #2679
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-	b	.L751
-.L778:
+	b	.L752
+.L779:
 	movs	r1, #0
-	b	.L753
-.L756:
-	ldr	r3, .L790
+	b	.L754
+.L757:
+	ldr	r3, .L791
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L758
+	ble	.L759
 	movw	r2, #2682
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L758:
-	ldr	r3, .L790+28
+.L759:
+	ldr	r3, .L791+28
 	add	lr, r4, #16
-	ldr	r2, .L790+32
+	ldr	r2, .L791+32
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #20
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L759:
+.L760:
 	cmp	r0, r3
-	bne	.L761
-	cbnz	r6, .L762
+	bne	.L762
+	cbnz	r6, .L763
 	movw	r2, #2693
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L762:
-	ldr	r3, .L790+36
+.L763:
+	ldr	r3, .L791+36
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L763
+	bne	.L764
 	movw	r2, #2695
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L763:
+.L764:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L790+40
-	ldr	fp, .L790+76
-	ldr	r8, .L790+80
+	ldr	r3, .L791+40
+	ldr	fp, .L791+76
+	ldr	r8, .L791+80
 	ldr	r1, [r3]
 	cmp	r2, #0
-	bne	.L764
+	bne	.L765
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L765
-	ldr	r0, .L790+44
+	beq	.L766
+	ldr	r0, .L791+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L788:
+.L789:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r7
 	ldr	r2, [fp]
@@ -5827,83 +5839,83 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode
-.L789:
+.L790:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldr	r3, [r3]
 	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L790+48
+	ldr	r3, .L791+48
 	ldr	r2, [r3]
 	cmp	r1, r2
 	it	hi
 	strhi	r1, [r3]
-	ldr	r3, .L790+44
+	ldr	r3, .L791+44
 	ldrh	r1, [r10]
 	ldrh	r2, [r3]
 	ldr	r3, [r8]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L790+52
-	ldr	ip, .L790+84
+	ldr	r3, .L791+52
+	ldr	ip, .L791+84
 	str	r0, [r3]
-	ldr	r3, .L790+56
+	ldr	r3, .L791+56
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
-	ldr	r3, .L790+28
+	ldr	r3, .L791+28
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.L769:
+.L770:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L770
+	bne	.L771
 	mov	r2, r6
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r8, #0
 	bl	FlashEraseBlocks
 	mov	r10, r8
 	movs	r3, #20
-.L771:
+.L772:
 	uxth	r2, r8
 	cmp	r6, r2
-	bhi	.L773
+	bhi	.L774
 	cmp	r10, #0
-	beq	.L774
+	beq	.L775
 	mov	r0, r7
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L774:
+.L775:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L775
-	ldr	r3, .L790+24
+	bne	.L776
+	ldr	r3, .L791+24
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L751
-.L761:
+	b	.L752
+.L762:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L760
+	beq	.L761
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L760:
+.L761:
 	adds	r3, r3, #20
-	b	.L759
-.L765:
+	b	.L760
+.L766:
 	movs	r2, #2
-	b	.L788
-.L764:
+	b	.L789
+.L765:
 	ldrh	r2, [r1, r5, lsl #1]
 	mov	r0, r7
 	str	r3, [sp, #4]
@@ -5913,20 +5925,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r8]
 	bl	ftl_set_blk_mode.part.6
-	b	.L789
-.L770:
+	b	.L790
+.L771:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L769
-.L773:
-	ldr	r1, .L790+28
+	b	.L770
+.L774:
+	ldr	r1, .L791+28
 	mul	r2, r3, r8
 	ldr	r1, [r1]
 	ldr	fp, [r1, r2]
 	adds	r0, r1, r2
 	cmp	fp, #-1
-	bne	.L772
+	bne	.L773
 	ldr	r0, [r0, #4]
 	add	r10, r10, #1
 	str	r3, [sp, #4]
@@ -5938,12 +5950,12 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.L772:
+.L773:
 	add	r8, r8, #1
-	b	.L771
-.L775:
-	ldr	r3, .L790+60
-	ldr	r1, .L790+64
+	b	.L772
+.L776:
+	ldr	r3, .L791+60
+	ldr	r1, .L791+64
 	ldrh	r3, [r3]
 	strh	r7, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -5956,27 +5968,27 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L790+24
+	ldr	r2, .L791+24
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L776
+	cbz	r3, .L777
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L777
-.L776:
+	cbnz	r3, .L778
+.L777:
 	movw	r2, #2748
-	ldr	r1, .L790+4
-	ldr	r0, .L790+8
+	ldr	r1, .L791+4
+	ldr	r0, .L791+8
 	bl	printf
-.L777:
+.L778:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L791:
+.L792:
 	.align	2
-.L790:
+.L791:
 	.word	.LANCHOR48
 	.word	.LANCHOR144
 	.word	.LC1
@@ -6013,43 +6025,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L804
+	ldr	r4, .L805
 	ldrh	r3, [r4]
-	cbz	r3, .L793
-	ldr	r8, .L804+12
+	cbz	r3, .L794
+	ldr	r8, .L805+12
 	movs	r7, #0
-.L794:
-	ldr	r3, .L804+4
+.L795:
+	ldr	r3, .L805+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L800
+	bhi	.L801
 	bl	FtlGcReFreshBadBlk
-.L793:
+.L794:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L800:
-	ldr	r2, .L804+8
+.L801:
+	ldr	r2, .L805+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L795:
+.L796:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L799
+	bhi	.L800
 	adds	r7, r7, #1
-	b	.L794
-.L799:
+	b	.L795
+.L800:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L796
+	bne	.L797
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -6057,23 +6069,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L797:
+.L798:
 	cmp	r5, r2
-	bcc	.L798
+	bcc	.L799
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L796:
+.L797:
 	add	fp, fp, #1
-	b	.L795
-.L798:
+	b	.L796
+.L799:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L797
-.L805:
+	b	.L798
+.L806:
 	.align	2
-.L804:
+.L805:
 	.word	.LANCHOR74
 	.word	.LANCHOR3
 	.word	.LANCHOR13
@@ -6092,41 +6104,41 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L818
+	ldr	r3, .L819
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L807
-	ldr	r3, .L818+4
+	bne	.L808
+	ldr	r3, .L819+4
 	ldrh	r2, [r3]
 	cmp	r2, r0
 	itt	eq
 	movweq	r2, #65535
 	strheq	r2, [r3]	@ movhi
-	ldr	r3, .L818+8
+	ldr	r3, .L819+8
 	ldrh	r2, [r3]
 	cmp	r2, r0
 	itt	eq
 	movweq	r2, #65535
 	strheq	r2, [r3]	@ movhi
-	ldr	r3, .L818+12
+	ldr	r3, .L819+12
 	ldrh	r2, [r3]
 	cmp	r2, r0
-	bne	.L810
+	bne	.L811
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L811:
-	ldr	r5, .L818+16
+.L812:
+	ldr	r5, .L819+16
 	mov	r1, r4
-	ldr	r0, .L818+20
+	ldr	r0, .L819+20
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L813
+	cbnz	r3, .L814
 	movw	r2, #2824
-	ldr	r1, .L818+24
-	ldr	r0, .L818+28
+	ldr	r1, .L819+24
+	ldr	r0, .L819+28
 	bl	printf
-.L813:
+.L814:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -6134,43 +6146,43 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L818+32
+	ldr	r3, .L819+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L818+36
+	ldr	r2, .L819+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L817
+	ble	.L818
 	movw	r2, #2827
-	ldr	r1, .L818+24
-	ldr	r0, .L818+28
+	ldr	r1, .L819+24
+	ldr	r0, .L819+28
 	bl	printf
-.L817:
+.L818:
 	movs	r0, #1
 	pop	{r3, r4, r5, pc}
-.L810:
-	ldr	r3, .L818+40
+.L811:
+	ldr	r3, .L819+40
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L816
-	ldr	r3, .L818+44
+	beq	.L817
+	ldr	r3, .L819+44
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L816
-	ldr	r3, .L818+48
+	beq	.L817
+	ldr	r3, .L819+48
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L811
-.L816:
+	bne	.L812
+.L817:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L807:
+.L808:
 	bl	List_update_data_list
-	b	.L816
-.L819:
+	b	.L817
+.L820:
 	.align	2
-.L818:
+.L819:
 	.word	.LANCHOR42
 	.word	.LANCHOR72
 	.word	.LANCHOR73
@@ -6200,47 +6212,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L821
-	ldr	r5, .L829
+	beq	.L822
+	ldr	r5, .L830
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L822
+	cbnz	r2, .L823
 	mov	r1, r0
-	ldr	r0, .L829+4
+	ldr	r0, .L830+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L823
-.L827:
+	cbz	r5, .L824
+.L828:
 	movs	r5, #0
-.L820:
+.L821:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L823:
+.L824:
 	movw	r2, #2842
-.L828:
-	ldr	r1, .L829+8
-	ldr	r0, .L829+12
+.L829:
+	ldr	r1, .L830+8
+	ldr	r0, .L830+12
 	bl	printf
-	b	.L820
-.L822:
+	b	.L821
+.L823:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L821:
-	ldr	r6, .L829+16
+.L822:
+	ldr	r6, .L830+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L825
+	bne	.L826
 	strh	r4, [r6]	@ movhi
-	b	.L827
-.L825:
+	b	.L828
+.L826:
 	cmp	r4, r0
-	beq	.L827
+	beq	.L828
 	bl	update_vpc_list
-	ldr	r3, .L829+20
+	ldr	r3, .L830+20
 	adds	r5, r0, #0
-	ldr	r2, .L829+24
+	ldr	r2, .L830+24
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -6248,21 +6260,21 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L829+28
+	ldr	r3, .L830+28
 	muls	r3, r2, r3
-	ldr	r2, .L829
+	ldr	r2, .L830
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L820
+	bne	.L821
 	cmp	r4, r1
-	beq	.L820
+	beq	.L821
 	movw	r2, #2858
-	b	.L828
-.L830:
+	b	.L829
+.L831:
 	.align	2
-.L829:
+.L830:
 	.word	.LANCHOR42
 	.word	.LC21
 	.word	.LANCHOR147
@@ -6286,14 +6298,14 @@ FtlSuperblockPowerLostFix:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
 	sub	sp, sp, #24
-	ldr	r2, .L844
+	ldr	r2, .L845
 	movs	r6, #0
 	mov	r4, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L844+4
+	ldr	r3, .L845+4
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r8, .L844+16
+	ldr	r8, .L845+16
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -6314,18 +6326,18 @@ FtlSuperblockPowerLostFix:
 	ite	eq
 	moveq	r7, #6
 	movne	r7, #7
-.L837:
+.L838:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L833
-.L834:
-	ldr	r3, .L844+8
+	cbnz	r3, .L834
+.L835:
+	ldr	r3, .L845+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L844+12
+	ldr	r3, .L845+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -6334,12 +6346,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L833:
+.L834:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L834
+	beq	.L835
 	ldr	r3, [r8]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -6355,11 +6367,11 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
 	subs	r7, r7, #1
-	bne	.L837
-	b	.L834
-.L845:
+	bne	.L838
+	b	.L835
+.L846:
 	.align	2
-.L844:
+.L845:
 	.word	.LANCHOR114
 	.word	.LANCHOR106
 	.word	.LANCHOR42
@@ -6379,61 +6391,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L865
+	ldr	r7, .L866
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L847:
-	ldr	r3, .L865+4
+.L848:
+	ldr	r3, .L866+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L853
-	ldr	r5, .L865+8
+	bcc	.L854
+	ldr	r5, .L866+8
 	movs	r4, #0
-.L854:
+.L855:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L855
-	ldr	r4, .L865+12
+	bhi	.L856
+	ldr	r4, .L866+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L856:
+.L857:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L860
+	bgt	.L861
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L857
+	beq	.L858
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L858
+	beq	.L859
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L857:
+.L858:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L856
-.L853:
-	ldr	r3, .L865+16
-	ldr	r5, .L865+20
+	b	.L857
+.L854:
+	ldr	r3, .L866+16
+	ldr	r5, .L866+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L865+24
+	ldr	r4, .L866+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L865+28
+	ldr	r3, .L866+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L848
+	beq	.L849
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -6450,13 +6462,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L849:
+.L850:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L847
-.L848:
+	b	.L848
+.L849:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -6468,21 +6480,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L850:
+.L851:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L851
+	beq	.L852
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L865+16
+	ldr	r3, .L866+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -6500,42 +6512,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L865+32
+	ldr	r3, .L866+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L865+24
+	ldr	r0, .L866+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L865+24
+	ldr	r0, .L866+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L849
+	bne	.L850
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L850
-.L851:
+	b	.L851
+.L852:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L850
-.L855:
+	b	.L851
+.L856:
 	bl	FtlBbmMapBadBlock
-	b	.L854
-.L858:
+	b	.L855
+.L859:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L859
+	bne	.L860
 	strh	r5, [r4]	@ movhi
-	b	.L857
-.L859:
-	strh	r5, [r4, #4]	@ movhi
+	b	.L858
 .L860:
-	ldr	r3, .L865+36
+	strh	r5, [r4, #4]	@ movhi
+.L861:
+	ldr	r3, .L866+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -6567,9 +6579,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L866:
+.L867:
 	.align	2
-.L865:
+.L866:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -6606,24 +6618,24 @@ ftl_memcmp:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L871
+	ldr	r3, .L872
 	add	r1, r1, r0
 	push	{r4, lr}
-.L869:
+.L870:
 	cmp	r0, r1
-	bne	.L870
+	bne	.L871
 	mov	r0, r3
 	pop	{r4, pc}
-.L870:
+.L871:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L869
-.L872:
+	b	.L870
+.L873:
 	.align	2
-.L871:
+.L872:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -6643,14 +6655,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L874
+	bne	.L875
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L875
+	cbz	r3, .L876
 	movw	r2, #641
-	ldr	r1, .L883
-	ldr	r0, .L883+4
+	ldr	r1, .L884
+	ldr	r0, .L884+4
 	bl	printf
-.L875:
+.L876:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -6662,20 +6674,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L876:
+.L877:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L874:
+.L875:
 	ldrh	r7, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L883+8
-	ldr	r10, .L883+24
+	ldr	r6, .L884+8
+	ldr	r10, .L884+24
 	ldr	r8, [r0, #24]
 	orr	r3, r3, r7, lsl #10
 	ldr	r0, [r10]
 	str	r3, [r6, #4]
-	ldr	r3, .L883+12
+	ldr	r3, .L884+12
 	str	r0, [r6, #8]
 	ldr	r5, [r3]
 	ldr	r3, [r4, #28]
@@ -6686,7 +6698,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r7, [r5, #2]	@ movhi
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L883+16
+	ldr	r3, .L884+16
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -6694,11 +6706,11 @@ Ftl_write_map_blk_to_last_page:
 	movs	r3, #0
 	ldr	r1, [r10]
 	mov	r2, r3
-.L877:
+.L878:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L879
-	ldr	r3, .L883+20
+	bhi	.L880
+	ldr	r3, .L884+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
@@ -6706,30 +6718,30 @@ Ftl_write_map_blk_to_last_page:
 	str	r0, [r5, #12]
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L883+8
+	ldr	r0, .L884+8
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L876
-.L879:
+	b	.L877
+.L880:
 	ldr	r0, [r8, r3, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L878
+	bne	.L879
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	lr, r1, r2, lsl #3
 	ldr	r0, [r8, r3, lsl #2]
 	str	r0, [lr, #4]
-.L878:
+.L879:
 	adds	r3, r3, #1
-	b	.L877
-.L884:
+	b	.L878
+.L885:
 	.align	2
-.L883:
+.L884:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR138
@@ -6751,13 +6763,13 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r8, .L909+32
+	ldr	r8, .L910+32
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp]
 	mov	fp, r8
-.L886:
-	ldr	r2, .L909
+.L887:
+	ldr	r2, .L910
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6765,44 +6777,44 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L887
+	bge	.L888
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L888
-.L887:
+	bne	.L889
+.L888:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L888:
+.L889:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L889
+	cbnz	r3, .L890
 	mov	r2, #700
-	ldr	r1, .L909+4
-	ldr	r0, .L909+8
+	ldr	r1, .L910+4
+	ldr	r0, .L910+8
 	bl	printf
-.L889:
+.L890:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L890
+	bcc	.L891
 	movw	r2, #701
-	ldr	r1, .L909+4
-	ldr	r0, .L909+8
+	ldr	r1, .L910+4
+	ldr	r0, .L910+8
 	bl	printf
-.L890:
+.L891:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L909+12
+	ldr	r5, .L910+12
 	ldrh	r3, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
 	orr	r2, r2, r3, lsl #10
 	ldr	r3, [sp]
 	str	r2, [r5, #4]
-	ldr	r2, .L909+16
+	ldr	r2, .L910+16
 	str	r3, [r5, #8]
 	ldr	r0, [r2]
 	movs	r2, #16
@@ -6815,7 +6827,7 @@ FtlMapWritePage:
 	str	r1, [r10, #4]
 	ldrh	r1, [r4, #4]
 	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, .L909+20
+	ldr	r3, .L910+20
 	strh	r1, [r10]	@ movhi
 	strh	r7, [r10, #8]	@ movhi
 	ldrh	r1, [r3]
@@ -6832,10 +6844,10 @@ FtlMapWritePage:
 	uxth	r2, r2
 	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L891
+	bne	.L892
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L909+24
+	ldr	r0, .L910+24
 	uxth	r6, r6
 	bl	printf
 	ldrh	r2, [r4, #2]
@@ -6845,40 +6857,40 @@ FtlMapWritePage:
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L893
+	bls	.L894
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L909+28
+	ldr	r0, .L910+28
 	bl	printf
+.L895:
+	b	.L895
 .L894:
-	b	.L894
-.L893:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L886
-.L908:
-	b	.L908
-.L891:
+	beq	.L887
+.L909:
+	b	.L909
+.L892:
 	cmp	r2, #1
-	beq	.L897
+	beq	.L898
 	cmp	r1, #256
-	beq	.L897
+	beq	.L898
 	ldr	r0, [r4, #36]
-	cbz	r0, .L898
-.L897:
+	cbz	r0, .L899
+.L898:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L886
-.L898:
+	b	.L887
+.L899:
 	ldr	r2, [r5, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L910:
+.L911:
 	.align	2
-.L909:
+.L910:
 	.word	.LANCHOR88
 	.word	.LANCHOR149
 	.word	.LC1
@@ -6900,31 +6912,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L918
+	ldr	r3, .L919
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L912
+	bcs	.L913
 	movw	r2, #485
-	ldr	r1, .L918+4
-	ldr	r0, .L918+8
+	ldr	r1, .L919+4
+	ldr	r0, .L919+8
 	bl	printf
-.L912:
-	ldr	fp, .L918+48
+.L913:
+	ldr	fp, .L919+48
 	movs	r4, #12
-	ldr	r7, .L918+12
+	ldr	r7, .L919+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L913
+	bne	.L914
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L918+16
+	ldr	r2, .L919+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -6932,21 +6944,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L914:
+.L915:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L913:
+.L914:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L918+20
+	ldr	r6, .L919+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L918+24
+	ldr	r2, .L919+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -6955,55 +6967,55 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L915
+	beq	.L916
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L918+28
+	ldr	r0, .L919+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L918+32
+	ldr	r0, .L919+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L918+36
+	ldr	r0, .L919+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L916:
+.L917:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L917
+	beq	.L918
 	mov	r2, #508
-	ldr	r1, .L918+4
-	ldr	r0, .L918+8
+	ldr	r1, .L919+4
+	ldr	r0, .L919+8
 	bl	printf
-.L917:
+.L918:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L914
-.L915:
+	b	.L915
+.L916:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L916
+	bne	.L917
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L918+40
+	ldr	r0, .L919+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L918+44
+	ldr	r0, .L919+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L916
-.L919:
+	b	.L917
+.L920:
 	.align	2
-.L918:
+.L919:
 	.word	.LANCHOR32
 	.word	.LANCHOR150
 	.word	.LC1
@@ -7039,13 +7051,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L921
+	blt	.L922
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L921
+	beq	.L922
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L921
+	cbnz	r3, .L922
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -7053,39 +7065,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L936
+	ldr	r3, .L937
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L922
+	bcc	.L923
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L922:
-	ldr	r5, .L936+4
-	movs	r6, #0
 .L923:
+	ldr	r5, .L937+4
+	movs	r6, #0
+.L924:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L930
+	bhi	.L931
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L921:
-	ldr	r3, .L936
+.L922:
+	ldr	r3, .L937
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L931
+	bcc	.L932
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L931:
+.L932:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L930:
+.L931:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -7093,53 +7105,53 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L924
-	ldr	r3, .L936+8
+	bne	.L925
+	ldr	r3, .L937+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L936+4
+	ldr	r0, .L937+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L936+12
+	ldr	r1, .L937+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L925
+	beq	.L926
 	movw	r2, #611
-	ldr	r1, .L936+16
-	ldr	r0, .L936+20
+	ldr	r1, .L937+16
+	ldr	r0, .L937+20
 	bl	printf
-.L925:
+.L926:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L926
-.L928:
+	bne	.L927
+.L929:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
+.L928:
+	b	.L928
 .L927:
-	b	.L927
-.L926:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L928
+	bne	.L929
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L928
+	bne	.L929
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L924:
+.L925:
 	adds	r6, r6, #1
-	b	.L923
-.L937:
+	b	.L924
+.L938:
 	.align	2
-.L936:
+.L937:
 	.word	.LANCHOR20
 	.word	.LANCHOR138
 	.word	.LANCHOR107
@@ -7160,9 +7172,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L939
+	ldr	r5, .L940
 	muls	r4, r0, r4
-	ldr	r0, .L939+4
+	ldr	r0, .L940+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7175,9 +7187,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L940:
+.L941:
 	.align	2
-.L939:
+.L940:
 	.word	.LANCHOR55
 	.word	.LANCHOR129
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -7194,30 +7206,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L945
-	ldr	r6, .L945+4
-.L942:
+	ldr	r5, .L946
+	ldr	r6, .L946+4
+.L943:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L944
+	bhi	.L945
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L944:
+.L945:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L943
+	bge	.L944
 	bl	flush_l2p_region
-.L943:
+.L944:
 	adds	r4, r4, #1
-	b	.L942
-.L946:
+	b	.L943
+.L947:
 	.align	2
-.L945:
+.L946:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.size	l2p_flush, .-l2p_flush
@@ -7234,36 +7246,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L960
+	ldr	r4, .L961
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L960+4
+	ldr	r3, .L961+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L948
+	bcc	.L949
 	movw	r2, #813
-	ldr	r1, .L960+8
-	ldr	r0, .L960+12
+	ldr	r1, .L961+8
+	ldr	r0, .L961+12
 	bl	printf
-.L948:
+.L949:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L949
-	ldr	r3, .L960+16
+	bcs	.L950
+	ldr	r3, .L961+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L960+20
+	ldr	r3, .L961+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L950:
+.L951:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L955
+	bcc	.L956
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7274,31 +7286,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L956
+	beq	.L957
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L956
+	bge	.L957
 	bl	flush_l2p_region
-.L956:
+.L957:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L952
-.L949:
+	b	.L953
+.L950:
 	mov	r0, #-1
-	cbnz	r7, .L947
+	cbnz	r7, .L948
 	str	r0, [r5]
-.L947:
+.L948:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L955:
+.L956:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L950
-.L952:
+	bne	.L951
+.L953:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7307,35 +7319,35 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L953
+	cbnz	r7, .L954
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L954:
+.L955:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L958
+	beq	.L959
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L958:
+.L959:
 	movs	r0, #0
-	b	.L947
-.L953:
+	b	.L948
+.L954:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L960+24
+	ldr	r3, .L961+24
 	strh	r6, [r3]	@ movhi
-	b	.L954
-.L961:
+	b	.L955
+.L962:
 	.align	2
-.L960:
+.L961:
 	.word	.LANCHOR152
 	.word	.LANCHOR22
 	.word	.LANCHOR153
@@ -7357,22 +7369,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L972
+	ldr	r5, .L973
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L963
-	ldr	r2, .L972+4
+	cbnz	r3, .L964
+	ldr	r2, .L973+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L964
-	ldr	r2, .L972+8
+	beq	.L965
+	ldr	r2, .L973+8
 	movw	lr, #65535
-	ldr	ip, .L972+24
-	ldr	r0, .L972+12
+	ldr	ip, .L973+24
+	ldr	r0, .L973+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7381,22 +7393,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L965:
+.L966:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L964
+	bls	.L965
 	cmp	r4, r7
-	bne	.L966
+	bne	.L967
 	mov	r1, r4
-	ldr	r0, .L972+4
+	ldr	r0, .L973+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L967
+	cbnz	r3, .L968
 	movw	r2, #1733
-	ldr	r1, .L972+16
-	ldr	r0, .L972+20
+	ldr	r1, .L973+16
+	ldr	r0, .L973+20
 	bl	printf
-.L967:
+.L968:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7404,17 +7416,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L963:
+.L964:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L964
-.L966:
+	b	.L965
+.L967:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L965
-.L964:
+	bne	.L966
+.L965:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7422,9 +7434,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L973:
+.L974:
 	.align	2
-.L972:
+.L973:
 	.word	.LANCHOR42
 	.word	.LANCHOR46
 	.word	.LANCHOR40
@@ -7450,144 +7462,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1106
+	beq	.L1107
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1115
+	ldr	r3, .L1116
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L977
+	bne	.L978
 	strh	r3, [r0, #4]	@ movhi
-.L1113:
+.L1114:
 	strb	r3, [r8, #6]
-.L1106:
+.L1107:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L977:
-	ldrh	r0, [r0, #16]
 .L978:
+	ldrh	r0, [r0, #16]
+.L979:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L979
+	beq	.L980
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L980
-	ldr	r3, .L1115+4
+	beq	.L981
+	ldr	r3, .L1116+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1115+8
+	ldr	r3, .L1116+8
 	ldr	r0, [r3]
-	ldr	r3, .L1115+12
+	ldr	r3, .L1116+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1115+16
+	ldr	r3, .L1116+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1115+20
+	ldr	r3, .L1116+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1115+24
+	ldr	r3, .L1116+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L981:
+.L982:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L985
+	bhi	.L986
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1115+28
+	ldr	r2, .L1116+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1115+8
+	ldr	r3, .L1116+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L986:
+.L987:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L991
-	bne	.L989
+	bhi	.L992
+	bne	.L990
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1107:
+.L1108:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1115
+	ldr	r3, .L1116
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L993
+	bne	.L994
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L993:
+.L994:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L994
+	bne	.L995
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L994
+	bne	.L995
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1114:
+.L1115:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1106
-.L979:
+	b	.L1107
+.L980:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L978
-.L980:
+	b	.L979
+.L981:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L982
+	cbz	r3, .L983
 	mov	r2, #1800
-	ldr	r1, .L1115+32
-	ldr	r0, .L1115+36
+	ldr	r1, .L1116+32
+	ldr	r0, .L1116+36
 	bl	printf
-.L982:
+.L983:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L983
+	cbz	r3, .L984
 	cmp	r5, r3
-	beq	.L983
+	beq	.L984
 	movw	r2, #1801
-	ldr	r1, .L1115+32
-	ldr	r0, .L1115+36
+	ldr	r1, .L1116+32
+	ldr	r0, .L1116+36
 	bl	printf
-.L983:
+.L984:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1113
-.L985:
+	b	.L1114
+.L986:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L984
+	beq	.L985
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -7603,53 +7615,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L984:
+.L985:
 	adds	r2, r2, #1
-	b	.L981
-.L991:
+	b	.L982
+.L992:
 	ldr	r1, [r7]
-	cbnz	r1, .L987
+	cbnz	r1, .L988
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L988
+	beq	.L989
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L988
+	cbz	r0, .L989
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L988:
+.L989:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L990
-.L989:
+	bne	.L991
+.L990:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1107
-.L987:
+	b	.L1108
+.L988:
 	ldr	fp, [sp, #12]
-.L990:
+.L991:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L986
-.L994:
+	b	.L987
+.L995:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L995
+	bne	.L996
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L996
-.L995:
-	ldr	r3, .L1115+40
+	bne	.L997
+.L996:
+	ldr	r3, .L1116+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1115+8
+	ldr	r7, .L1116+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -7662,10 +7674,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L999:
+.L1000:
 	cmp	r4, r6
-	bhi	.L1009
-	ldr	r3, .L1115+4
+	bhi	.L1010
+	ldr	r3, .L1116+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -7674,47 +7686,47 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1010
-.L1001:
+	b	.L1011
+.L1002:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L1000
+	beq	.L1001
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L1000:
+.L1001:
 	adds	r3, r3, #1
-.L1010:
+.L1011:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1001
+	bhi	.L1002
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1115+40
+	ldr	r3, .L1116+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L1002:
+.L1003:
 	cmp	r5, r3
-	bne	.L1007
-	cbz	r0, .L1008
-	ldr	r3, .L1115+40
+	bne	.L1008
+	cbz	r0, .L1009
+	ldr	r3, .L1116+40
 	str	r2, [r3]
-.L1008:
+.L1009:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L999
-.L1116:
+	b	.L1000
+.L1117:
 	.align	2
-.L1115:
+.L1116:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR103
@@ -7726,22 +7738,22 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR155
 	.word	.LC1
 	.word	.LANCHOR134
-.L1007:
+.L1008:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1003
-	cbz	r0, .L996
-.L1108:
-	ldr	r3, .L1117
+	beq	.L1004
+	cbz	r0, .L997
+.L1109:
+	ldr	r3, .L1118
 	str	r2, [r3]
-.L996:
+.L997:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1117+4
-	ldr	r3, .L1117+8
+	ldr	r6, .L1118+4
+	ldr	r3, .L1118+8
 	strh	r2, [r3]	@ movhi
-.L1011:
-	ldr	r3, .L1117+12
+.L1012:
+	ldr	r3, .L1118+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -7749,64 +7761,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1012:
+.L1013:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1014
+	bhi	.L1015
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1112:
+.L1113:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1043
-	ldr	r3, .L1117+16
+	bhi	.L1044
+	ldr	r3, .L1118+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1011
-	ldr	r2, .L1117+12
+	bne	.L1012
+	ldr	r2, .L1118+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1044:
+.L1045:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1106
+	bcs	.L1107
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1113
+	bne	.L1114
 	mov	r3, r1
-	b	.L1044
-.L1003:
+	b	.L1045
+.L1004:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1006
+	beq	.L1007
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1006:
+.L1007:
 	adds	r3, r3, #20
-	b	.L1002
-.L1009:
+	b	.L1003
+.L1010:
 	mov	r2, #-1
-	b	.L1108
-.L1014:
+	b	.L1109
+.L1015:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L1013
+	beq	.L1014
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -7815,10 +7827,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1013:
+.L1014:
 	adds	r3, r3, #1
-	b	.L1012
-.L1043:
+	b	.L1013
+.L1044:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -7831,45 +7843,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1016
+	bcc	.L1017
 	ldr	r3, [sp, #28]
-	bne	.L1017
+	bne	.L1018
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1016
-.L1017:
+	bhi	.L1017
+.L1018:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1018
+	bne	.L1019
 	cmp	r10, r0
-	beq	.L1019
-.L1018:
+	beq	.L1020
+.L1019:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1020
+	beq	.L1021
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1021
+	beq	.L1022
 	ldrh	r0, [r8]
-.L1109:
+.L1110:
 	bl	decrement_vpc_count
-	b	.L1016
-.L1021:
+	b	.L1017
+.L1022:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1022
-	ldr	r2, .L1117+20
+	beq	.L1023
+	ldr	r2, .L1118+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1022
+	cbz	r0, .L1023
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1022:
+.L1023:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -7877,17 +7889,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1117
+	ldr	r3, .L1118
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1023
+	beq	.L1024
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1023
+	beq	.L1024
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1024
+	beq	.L1025
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -7899,119 +7911,119 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1025
-.L1026:
+	bne	.L1026
+.L1027:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1033:
+.L1034:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1016
-.L1047:
+	beq	.L1017
+.L1048:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1117+24
+	ldr	r3, .L1118+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1039
+	bhi	.L1040
 	movw	r2, #2057
-	ldr	r1, .L1117+28
-	ldr	r0, .L1117+32
+	ldr	r1, .L1118+28
+	ldr	r0, .L1118+32
 	bl	printf
-.L1039:
-	ldr	r3, .L1117+36
+.L1040:
+	ldr	r3, .L1118+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1040
+	beq	.L1041
 	mov	r0, r4
-	b	.L1109
-.L1024:
+	b	.L1110
+.L1025:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1016
+	bne	.L1017
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1016:
+.L1017:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1112
-.L1025:
+	b	.L1113
+.L1026:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1026
-	ldr	r0, .L1117
+	bne	.L1027
+	ldr	r0, .L1118
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1026
+	beq	.L1027
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1028
-.L1031:
+	bne	.L1029
+.L1032:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1026
-.L1028:
+	b	.L1027
+.L1029:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1026
+	beq	.L1027
 	adds	r0, r1, #1
-	beq	.L1029
+	beq	.L1030
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1030:
+.L1031:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1031
+	beq	.L1032
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1117
+	ldr	r2, .L1118
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1031
+	beq	.L1032
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1026
-	b	.L1031
-.L1029:
+	beq	.L1027
+	b	.L1032
+.L1030:
 	str	r1, [r2, r5]
-	b	.L1030
-.L1023:
+	b	.L1031
+.L1024:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1033
+	beq	.L1034
 	ldr	r1, [sp, #36]
 	adds	r7, r1, #1
-	beq	.L1035
-	ldr	r3, .L1117+40
+	beq	.L1036
+	ldr	r3, .L1118+40
 	ldr	r3, [r3]
 	cmp	r3, r1, lsr #10
-	bhi	.L1035
-	ldr	r0, .L1117+44
-.L1111:
+	bhi	.L1036
+	ldr	r0, .L1118+44
+.L1112:
 	bl	printf
-	b	.L1016
-.L1118:
+	b	.L1017
+.L1119:
 	.align	2
-.L1117:
+.L1118:
 	.word	.LANCHOR134
 	.word	.LANCHOR103
 	.word	.LANCHOR156
@@ -8024,32 +8036,32 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR42
 	.word	.LANCHOR8
 	.word	.LC27
-.L1035:
+.L1036:
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1033
+	beq	.L1034
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1047
+	beq	.L1048
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1119
+	ldr	r3, .L1120
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1038
-	ldr	r3, .L1119+4
+	beq	.L1039
+	ldr	r3, .L1120+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1038
-	ldr	r3, .L1119+8
+	beq	.L1039
+	ldr	r3, .L1120+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1033
-.L1038:
+	bne	.L1034
+.L1039:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -8059,57 +8071,57 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1033
+	beq	.L1034
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1033
+	bne	.L1034
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1033
-.L1040:
+	b	.L1034
+.L1041:
 	mov	r1, r4
-	ldr	r0, .L1119+12
-	b	.L1111
-.L1020:
-	ldr	r3, .L1119+16
+	ldr	r0, .L1120+12
+	b	.L1112
+.L1021:
+	ldr	r3, .L1120+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1041
-	ldr	r2, .L1119+20
+	bhi	.L1042
+	ldr	r2, .L1120+20
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1119+16
+	ldr	r2, .L1120+16
 	str	r3, [r2]
-.L1041:
+.L1042:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1119+24
+	ldr	r3, .L1120+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1042
+	bne	.L1043
 	ldr	r2, [sp]
-.L1110:
+.L1111:
 	str	r2, [r3]
-	b	.L1016
-.L1042:
+	b	.L1017
+.L1043:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1016
+	bcs	.L1017
 	mov	r2, r1
-	b	.L1110
-.L1019:
+	b	.L1111
+.L1020:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1114
-.L1120:
+	b	.L1115
+.L1121:
 	.align	2
-.L1119:
+.L1120:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -8131,56 +8143,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1145
-	ldr	r5, .L1145+4
-	ldr	r1, .L1145+8
-	ldr	r0, .L1145+12
+	ldr	r6, .L1146
+	ldr	r5, .L1146+4
+	ldr	r1, .L1146+8
+	ldr	r0, .L1146+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1145+4
+	ldr	r0, .L1146+4
 	bl	ftl_memset
-.L1122:
+.L1123:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1124
-	ldr	r10, .L1145+48
+	bcc	.L1125
+	ldr	r10, .L1146+48
 	movs	r4, #0
-	ldr	r7, .L1145+16
+	ldr	r7, .L1146+16
 	mov	r6, r4
-.L1125:
+.L1126:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1127
-	ldr	r3, .L1145+20
+	bhi	.L1128
+	ldr	r3, .L1146+20
 	ldr	r4, [r3]
-	cbz	r4, .L1128
-	ldr	r3, .L1145+24
+	cbz	r4, .L1129
+	ldr	r3, .L1146+24
 	mov	r8, #0
-	ldr	r5, .L1145+28
-	ldr	r10, .L1145+16
+	ldr	r5, .L1146+28
+	ldr	r10, .L1146+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1145+4
+	ldr	fp, .L1146+4
 	subs	r4, r4, r3
-	ldr	r3, .L1145+32
+	ldr	r3, .L1146+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1129:
+.L1130:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1128
+	bls	.L1129
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1130
+	cbz	r2, .L1131
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1145+36
+	ldr	r0, .L1146+36
 	bl	printf
-.L1130:
+.L1131:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -8188,59 +8200,59 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1129
-.L1128:
-	cbz	r6, .L1121
+	bne	.L1130
+.L1129:
+	cbz	r6, .L1122
 	movw	r2, #2383
-	ldr	r1, .L1145+8
-	ldr	r0, .L1145+40
+	ldr	r1, .L1146+8
+	ldr	r0, .L1146+40
 	bl	printf
-.L1121:
+.L1122:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1124:
+.L1125:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1123
+	beq	.L1124
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1123:
+.L1124:
 	adds	r4, r4, #1
-	b	.L1122
-.L1127:
+	b	.L1123
+.L1128:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1145+4
+	ldr	r8, .L1146+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1126
+	beq	.L1127
 	mov	r1, r5
-	ldr	r0, .L1145+44
+	ldr	r0, .L1146+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1126
+	beq	.L1127
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1126:
+.L1127:
 	adds	r4, r4, #1
-	b	.L1125
-.L1146:
+	b	.L1126
+.L1147:
 	.align	2
-.L1145:
+.L1146:
 	.word	.LANCHOR152
 	.word	check_vpc_table
 	.word	.LANCHOR159
@@ -8268,60 +8280,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1161
+	ldr	r7, .L1162
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1161+24
-	ldr	r0, .L1161+4
+	ldr	r8, .L1162+24
+	ldr	r0, .L1162+4
 	bl	printf
-.L1148:
+.L1149:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1154
+	bcc	.L1155
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1154:
+.L1155:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1149
+	cbnz	r3, .L1150
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1149:
+.L1150:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1151
-	ldr	r4, .L1161+8
+	beq	.L1152
+	ldr	r4, .L1162+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1161+12
+	ldr	r3, .L1162+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1161+16
+	ldr	r3, .L1162+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1152
+	beq	.L1153
 	adds	r3, r3, #1
-	beq	.L1152
+	beq	.L1153
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1151
-.L1152:
+	beq	.L1152
+.L1153:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1161+20
+	ldr	r0, .L1162+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8336,12 +8348,12 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1151:
+.L1152:
 	adds	r5, r5, #1
-	b	.L1148
-.L1162:
+	b	.L1149
+.L1163:
 	.align	2
-.L1161:
+.L1162:
 	.word	.LANCHOR152
 	.word	.LC32
 	.word	.LANCHOR138
@@ -8361,7 +8373,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1195
+	ldr	r3, .L1196
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
@@ -8369,29 +8381,29 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	str	r3, [sp, #20]
 	cmp	r5, r2
-	beq	.L1185
-	cbnz	r5, .L1164
-.L1165:
+	beq	.L1186
+	cbnz	r5, .L1165
+.L1166:
 	bl	FtlGcPageVarInit
-	b	.L1166
-.L1185:
+	b	.L1167
+.L1186:
 	movs	r5, #0
-.L1164:
-	ldr	r3, .L1195+4
+.L1165:
+	ldr	r3, .L1196+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L1165
-.L1166:
-	ldr	fp, .L1195+56
-.L1182:
+	beq	.L1166
+.L1167:
+	ldr	fp, .L1196+56
+.L1183:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1167
-.L1184:
-	ldr	r3, .L1195+8
+	beq	.L1168
+.L1185:
+	ldr	r3, .L1196+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r10, r2
@@ -8399,38 +8411,38 @@ FtlGcScanTempBlk:
 	mov	r8, #20
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1195+12
+	ldr	r3, .L1196+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1195+16
+	ldr	r3, .L1196+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1195+20
+	ldr	r3, .L1196+20
 	ldr	r7, [r3]
-	ldr	r3, .L1195+24
+	ldr	r3, .L1196+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1168:
+.L1169:
 	ldr	r1, [sp, #8]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1170
+	bhi	.L1171
 	mov	r8, #0
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.L1171:
+.L1172:
 	uxth	r3, r8
 	cmp	r10, r3
-	bhi	.L1183
-	ldr	r3, .L1195+4
+	bhi	.L1184
+	ldr	r3, .L1196+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L1184
-.L1167:
+	bhi	.L1185
+.L1168:
 	ldr	r2, [sp, #20]
 	movw	r3, #65535
 	mov	r0, r4
@@ -8444,12 +8456,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1170:
+.L1171:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1169
+	beq	.L1170
 	mla	r1, r8, r10, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8466,10 +8478,10 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, r10, #1
 	uxth	r10, r3
-.L1169:
+.L1170:
 	adds	r2, r2, #1
-	b	.L1168
-.L1183:
+	b	.L1169
+.L1184:
 	movs	r3, #20
 	ldr	r2, [fp]
 	mul	r3, r3, r8
@@ -8479,18 +8491,18 @@ FtlGcScanTempBlk:
 	ldr	r7, [r1, #12]
 	str	r0, [sp, #4]
 	cmp	r6, #0
-	bne	.L1172
+	bne	.L1173
 	ldrh	r1, [r7]
 	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L1193
-	ldr	r2, .L1195+28
+	beq	.L1194
+	ldr	r2, .L1196+28
 	ldr	r0, [r7, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L1174
-.L1193:
-	ldr	r3, .L1195+32
+	bls	.L1175
+.L1194:
+	ldr	r3, .L1196+32
 	movs	r1, #0
 	ldrh	r2, [r4]
 	movs	r5, #0
@@ -8498,13 +8510,13 @@ FtlGcScanTempBlk:
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, .L1195+36
+	ldr	r2, .L1196+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
 	strh	r3, [r2]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1182
-.L1174:
+	b	.L1183
+.L1175:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #8]
@@ -8513,59 +8525,59 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #8]
 	cmp	r2, r1
-	beq	.L1176
-.L1178:
+	beq	.L1177
+.L1179:
 	ldr	r2, [r7, #8]
-.L1194:
+.L1195:
 	ldr	r1, [sp, #4]
 	add	r8, r8, #1
 	ldr	r0, [r7, #12]
 	bl	FtlGcUpdatePage
-	b	.L1171
-.L1176:
+	b	.L1172
+.L1177:
 	str	r3, [sp, #8]
 	adds	r3, r2, #1
-	beq	.L1178
+	beq	.L1179
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L1195+40
+	ldr	r2, .L1196+40
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1195+44
+	ldr	r2, .L1196+44
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1195+48
+	ldr	r2, .L1196+48
 	ldr	r1, [fp]
 	ldr	r3, [sp, #8]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1179:
+.L1180:
 	cmp	r6, r2
-	beq	.L1178
+	beq	.L1179
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1180
+	beq	.L1181
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1195+52
+	ldr	r0, .L1196+52
 	bl	printf
-	b	.L1193
-.L1180:
+	b	.L1194
+.L1181:
 	adds	r6, r6, #1
-	b	.L1179
-.L1172:
+	b	.L1180
+.L1173:
 	mov	r2, #-1
-	b	.L1194
-.L1196:
+	b	.L1195
+.L1197:
 	.align	2
-.L1195:
+.L1196:
 	.word	.LANCHOR160
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -8593,7 +8605,7 @@ FtlGcScanTempBlk:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1209
+	ldr	r3, .L1210
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -8602,26 +8614,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1205
-	ldr	r3, .L1209+4
+	bhi	.L1206
+	ldr	r3, .L1210+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1199:
-	cbnz	r5, .L1204
-.L1197:
+.L1200:
+	cbnz	r5, .L1205
+.L1198:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1204:
-	ldr	r3, .L1209+8
+.L1205:
+	ldr	r3, .L1210+8
 	mov	r0, r7
-	ldr	r10, .L1209+24
+	ldr	r10, .L1210+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1209+12
+	ldr	r3, .L1210+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -8635,9 +8647,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1201
+	cbz	r2, .L1202
 	cmp	r4, r3
-	beq	.L1201
+	beq	.L1202
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -8647,7 +8659,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1202:
+.L1203:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -8660,7 +8672,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1209+16
+	ldr	r0, .L1210+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -8671,20 +8683,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1199
-.L1201:
-	ldr	r3, .L1209+20
+	b	.L1200
+.L1202:
+	ldr	r3, .L1210+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1202
-.L1205:
+	b	.L1203
+.L1206:
 	mov	r8, #-1
-	b	.L1197
-.L1210:
+	b	.L1198
+.L1211:
 	.align	2
-.L1209:
+.L1210:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
@@ -8705,57 +8717,57 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1213
-	ldr	r3, .L1213+4
+	ldr	r2, .L1214
+	ldr	r3, .L1214+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1211
-	ldr	r3, .L1213+8
+	bne	.L1212
+	ldr	r3, .L1214+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1213+12
+	ldr	r3, .L1214+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1213+16
+	ldr	r3, .L1214+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1213+20
+	ldr	r3, .L1214+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1213+24
+	ldr	r3, .L1214+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1213+28
+	ldr	r3, .L1214+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1213+32
+	ldr	r3, .L1214+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1213+36
+	ldr	r3, .L1214+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1213+40
+	ldr	r3, .L1214+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1213+44
+	ldr	r3, .L1214+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1213+48
+	ldr	r3, .L1214+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1213+52
+	ldr	r3, .L1214+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1213+56
+	ldr	r3, .L1214+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1211:
+.L1212:
 	bx	lr
-.L1214:
+.L1215:
 	.align	2
-.L1213:
+.L1214:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	1342177352
@@ -8783,7 +8795,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1220
+	ldr	r2, .L1221
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -8792,22 +8804,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1220+4
-	cbnz	r0, .L1217
+	ldr	r2, .L1221+4
+	cbnz	r0, .L1218
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1218
-.L1217:
+	bcc	.L1219
+.L1218:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1220+8
+	ldr	r3, .L1221+8
 	str	r3, [r2]
-	ldr	r3, .L1220+12
+	ldr	r3, .L1221+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -8818,12 +8830,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1218:
+.L1219:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1221:
+.L1222:
 	.align	2
-.L1220:
+.L1221:
 	.word	.LANCHOR164
 	.word	.LANCHOR118
 	.word	1112818501
@@ -8855,7 +8867,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1233
+	ldr	r3, .L1234
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -8864,28 +8876,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1232
-	ldr	r3, .L1233+4
+	bhi	.L1233
+	ldr	r3, .L1234+4
 	mov	r8, #0
-	ldr	fp, .L1233+28
+	ldr	fp, .L1234+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1225:
-	cbnz	r6, .L1231
-.L1223:
+.L1226:
+	cbnz	r6, .L1232
+.L1224:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1231:
-	ldr	r3, .L1233+8
+.L1232:
+	ldr	r3, .L1234+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1233+12
+	ldr	r2, .L1234+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -8900,7 +8912,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1227
+	beq	.L1228
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -8914,28 +8926,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1233+16
+	ldr	r2, .L1234+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1229
+	bne	.L1230
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1233+20
+	ldr	r0, .L1234+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1233+24
+	ldr	r0, .L1234+24
 	bl	FtlMapWritePage
-.L1229:
+.L1230:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1230:
+.L1231:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -8944,19 +8956,19 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1225
-.L1227:
+	b	.L1226
+.L1228:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1230
-.L1232:
+	b	.L1231
+.L1233:
 	mov	r8, #-1
-	b	.L1223
-.L1234:
+	b	.L1224
+.L1235:
 	.align	2
-.L1233:
+.L1234:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
@@ -8979,30 +8991,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1237
-	ldr	r5, .L1237+4
+	ldr	r4, .L1238
+	ldr	r5, .L1238+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1237+8
+	ldr	r3, .L1238+8
 	cmp	r2, r3
-	beq	.L1236
-	ldr	r1, .L1237+12
-	ldr	r0, .L1237+16
+	beq	.L1237
+	ldr	r1, .L1238+12
+	ldr	r0, .L1238+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1236:
+.L1237:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1238:
+.L1239:
 	.align	2
-.L1237:
+.L1238:
 	.word	.LANCHOR118
 	.word	.LANCHOR116
 	.word	1112818501
@@ -9022,75 +9034,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1242
+	ldr	r4, .L1243
 	movs	r0, #0
-	ldr	r5, .L1242+4
+	ldr	r5, .L1243+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1240
+	beq	.L1241
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1240:
+.L1241:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1242+8
-	bne	.L1241
+	ldr	r3, .L1243+8
+	bne	.L1242
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1242+12
+	ldr	r2, .L1243+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1242+16
+	ldr	r2, .L1243+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1242+20
+	ldr	r2, .L1243+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1242+24
+	ldr	r2, .L1243+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1242+28
+	ldr	r2, .L1243+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1242+32
+	ldr	r2, .L1243+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1242+36
+	ldr	r2, .L1243+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1242+40
+	ldr	r2, .L1243+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1242+44
+	ldr	r2, .L1243+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1242+48
+	ldr	r2, .L1243+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1242+52
+	ldr	r2, .L1243+52
 	str	r1, [r2]
-.L1241:
-	ldr	r1, .L1242+56
-	ldr	r2, .L1242+60
+.L1242:
+	ldr	r1, .L1243+56
+	ldr	r2, .L1243+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1242+64
+	ldr	r1, .L1243+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1242+68
+	ldr	r3, .L1243+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1243:
+.L1244:
 	.align	2
-.L1242:
+.L1243:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	.LANCHOR91
@@ -9140,30 +9152,30 @@ FtlMapBlkWriteDump_data:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L1245
+	beq	.L1246
 	movs	r3, #0
-	ldr	r5, .L1257
+	ldr	r5, .L1258
 	str	r3, [r0, #36]
-	ldr	r3, .L1257+4
+	ldr	r3, .L1258+4
 	ldrh	r6, [r0, #6]
 	mov	r7, r5
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	str	r3, [r5, #8]
-	ldr	r3, .L1257+8
+	ldr	r3, .L1258+8
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L1247
-	ldr	r2, .L1257+12
+	cbz	r3, .L1248
+	ldr	r2, .L1258+12
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1247
+	bge	.L1248
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1247
+	beq	.L1248
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -9175,44 +9187,44 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1247
+	beq	.L1248
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1247
+	bne	.L1248
 	ldr	r2, [r5, #8]
-.L1256:
+.L1257:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L1247:
+.L1248:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L1248
+	cbz	r3, .L1249
 	movs	r2, #1
-	ldr	r0, .L1257
+	ldr	r0, .L1258
 	mov	r1, r2
 	bl	FlashReadPages
-.L1249:
+.L1250:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L1256
-.L1248:
-	ldr	r3, .L1257+16
+	b	.L1257
+.L1249:
+	ldr	r3, .L1258+16
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1249
-.L1245:
+	b	.L1250
+.L1246:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1258:
+.L1259:
 	.align	2
-.L1257:
+.L1258:
 	.word	.LANCHOR138
 	.word	.LANCHOR107
 	.word	.LANCHOR114
@@ -9232,10 +9244,10 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, #0
-	ldr	r5, .L1274
-	ldr	r3, .L1274+4
-	ldr	fp, .L1274+76
-	ldr	r6, .L1274+8
+	ldr	r5, .L1275
+	ldr	r3, .L1275+4
+	ldr	fp, .L1275+76
+	ldr	r6, .L1275+8
 	ldr	r7, [r3]
 	ldr	r0, [fp]
 	ldrh	r3, [r5]
@@ -9243,23 +9255,23 @@ FtlVpcTblFlush:
 	str	r0, [r6, #8]
 	strh	r3, [r7, #2]	@ movhi
 	movw	r3, #61604
-	ldr	r4, .L1274+12
+	ldr	r4, .L1275+12
 	strh	r3, [r7]	@ movhi
-	ldr	r2, .L1274+16
+	ldr	r2, .L1275+16
 	ldr	r3, [r5, #8]
-	ldr	ip, .L1274+80
+	ldr	ip, .L1275+80
 	str	r10, [r7, #8]
 	str	r3, [r7, #4]
 	stm	r4, {r2, ip}
 	ldrh	r2, [r5, #6]
 	str	r10, [r7, #12]
-	ldr	r8, .L1274+84
+	ldr	r8, .L1275+84
 	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1274+20
-	ldr	r3, .L1274+24
+	ldr	r2, .L1275+20
+	ldr	r3, .L1275+24
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	ldr	r2, .L1274+28
+	ldr	r2, .L1275+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #14]	@ movhi
@@ -9267,7 +9279,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1274+32
+	ldr	r2, .L1275+32
 	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9276,7 +9288,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #12]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1274+36
+	ldr	r2, .L1275+36
 	strh	r1, [r4, #20]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9285,32 +9297,32 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1274+40
+	ldr	r2, .L1275+40
 	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
 	ldr	r2, [r8]
 	str	r2, [r4, #40]
-	ldr	r2, .L1274+44
+	ldr	r2, .L1275+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r4
-	ldr	r4, .L1274+48
+	ldr	r4, .L1275+48
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r4]
 	ldr	r0, [r6, #8]
-	ldr	r1, .L1274+52
+	ldr	r1, .L1275+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
 	ldrh	r0, [r4]
-	ldr	r1, .L1274+56
+	ldr	r1, .L1275+56
 	ldr	r4, [r6, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -9322,13 +9334,13 @@ FtlVpcTblFlush:
 	mov	r4, r10
 	bl	ftl_memcpy
 	mov	r0, r10
-	ldr	r10, .L1274+4
+	ldr	r10, .L1275+4
 	bl	FtlUpdateVaildLpn
 	movw	r3, #65535
 	str	r3, [sp]
-	ldr	r3, .L1274+24
+	ldr	r3, .L1275+24
 	str	r3, [sp, #4]
-.L1260:
+.L1261:
 	ldr	r3, [fp]
 	ldrh	r1, [r5, #2]
 	ldrh	r2, [r5]
@@ -9337,11 +9349,11 @@ FtlVpcTblFlush:
 	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r6, #4]
-	ldr	r3, .L1274+60
+	ldr	r3, .L1275+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1261
+	blt	.L1262
 	ldrh	r3, [r5, #4]
 	strh	r2, [r5, #4]	@ movhi
 	str	r3, [sp]
@@ -9357,7 +9369,7 @@ FtlVpcTblFlush:
 	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1261:
+.L1262:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldrh	r1, [r3]
@@ -9366,7 +9378,7 @@ FtlVpcTblFlush:
 	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1274+8
+	ldr	r0, .L1275+8
 	bl	FlashProgPages
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r6]
@@ -9374,51 +9386,51 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1262
-	cmp	r3, #1
 	bne	.L1263
+	cmp	r3, #1
+	bne	.L1264
 	movw	r2, #1138
-	ldr	r1, .L1274+64
-	ldr	r0, .L1274+68
+	ldr	r1, .L1275+64
+	ldr	r0, .L1275+68
 	bl	printf
-.L1263:
+.L1264:
 	ldrh	r3, [r5, #2]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1274+60
+	ldreq	r3, .L1275+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r4, #3
-	bls	.L1260
+	bls	.L1261
 	mov	r2, r4
 	ldr	r1, [r6, #4]
-	ldr	r0, .L1274+72
+	ldr	r0, .L1275+72
 	bl	printf
-.L1266:
-	b	.L1266
-.L1262:
+.L1267:
+	b	.L1267
+.L1263:
 	cmp	r3, #1
-	beq	.L1260
+	beq	.L1261
 	cmp	r2, #256
-	beq	.L1260
+	beq	.L1261
 	ldr	r2, [sp]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1267
+	beq	.L1268
 	movs	r1, #1
 	mov	r0, r2
 	bl	FtlFreeSysBlkQueueIn
-.L1267:
+.L1268:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1275:
+.L1276:
 	.align	2
-.L1274:
+.L1275:
 	.word	.LANCHOR139
 	.word	.LANCHOR114
 	.word	.LANCHOR138
@@ -9473,17 +9485,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1279
+	ldr	r3, .L1280
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1278
+	bne	.L1279
 	bl	FtlSysFlush
-.L1278:
+.L1279:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1280:
+.L1281:
 	.align	2
-.L1279:
+.L1280:
 	.word	.LANCHOR166
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -9497,24 +9509,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1296
+	ldr	r3, .L1297
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1289
+	bhi	.L1290
 	cmp	r1, #31
-	bhi	.L1283
-.L1288:
+	bhi	.L1284
+.L1289:
 	movs	r0, #0
-.L1281:
+.L1282:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1283:
-	ldr	r8, .L1296+12
+.L1284:
+	ldr	r8, .L1297+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -9522,7 +9534,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1284
+	cbz	r7, .L1285
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -9530,32 +9542,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1284:
-	ldr	r4, .L1296+4
+.L1285:
+	ldr	r4, .L1297+4
 	mov	r3, #-1
-	ldr	r7, .L1296+8
+	ldr	r7, .L1297+8
 	str	r3, [sp, #4]
-.L1285:
+.L1286:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1287
-	ldr	r3, .L1296+4
+	bcs	.L1288
+	ldr	r3, .L1297+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1288
+	bls	.L1289
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1288
-.L1287:
+	b	.L1289
+.L1288:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1286
+	beq	.L1287
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -9570,17 +9582,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1286:
+.L1287:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1285
-.L1289:
+	b	.L1286
+.L1290:
 	mov	r0, #-1
-	b	.L1281
-.L1297:
+	b	.L1282
+.L1298:
 	.align	2
-.L1296:
+.L1297:
 	.word	.LANCHOR34
 	.word	.LANCHOR167
 	.word	.LANCHOR86
@@ -9597,47 +9609,47 @@ FtlDiscard:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1308
+	ldr	r3, .L1309
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1299
+	bcs	.L1300
 	movw	r2, #2755
-	ldr	r1, .L1308+4
-	ldr	r0, .L1308+8
+	ldr	r1, .L1309+4
+	ldr	r0, .L1309+8
 	bl	printf
-.L1299:
+.L1300:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1300
-	ldr	r3, .L1308+12
+	beq	.L1301
+	ldr	r3, .L1309+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1301
+	cbz	r3, .L1302
 	bl	INSERT_DATA_LIST
-.L1300:
-	ldr	r5, .L1308+16
+.L1301:
+	ldr	r5, .L1309+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1302
+	beq	.L1303
 	cmp	r4, r0
-	bne	.L1303
-	ldr	r3, .L1308+12
+	bne	.L1304
+	ldr	r3, .L1309+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1304
-.L1303:
-	bl	update_vpc_list
+	cbz	r3, .L1305
 .L1304:
+	bl	update_vpc_list
+.L1305:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1302:
+.L1303:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9646,12 +9658,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1301:
+.L1302:
 	bl	INSERT_FREE_LIST
-	b	.L1300
-.L1309:
+	b	.L1301
+.L1310:
 	.align	2
-.L1308:
+.L1309:
 	.word	.LANCHOR5
 	.word	.LANCHOR168
 	.word	.LC1
@@ -9671,31 +9683,31 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r10, .L1329+20
+	ldr	r10, .L1330+20
 	mov	r5, r3
 	movs	r2, #0
 	mov	r4, r0
-	ldr	fp, .L1329
+	ldr	fp, .L1330
 	mov	r8, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-.L1311:
+.L1312:
 	cmp	r6, r8
-	bne	.L1318
-	ldr	r3, .L1329
+	bne	.L1319
+	ldr	r3, .L1330
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1310
-	movw	r2, #997
-	ldr	r1, .L1329+4
-	ldr	r0, .L1329+8
+	bcc	.L1311
+	mov	r2, #1000
+	ldr	r1, .L1330+4
+	ldr	r0, .L1330+8
 	bl	printf
-.L1310:
+.L1311:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1313:
+.L1314:
 	ldr	r1, [r4, #4]
 	mov	r0, r10
 	bl	printf
@@ -9704,10 +9716,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1312
+	cbnz	r3, .L1313
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1312:
+.L1313:
 	mov	r0, r5
 	bl	get_new_active_ppa
 	movs	r2, #0
@@ -9717,21 +9729,21 @@ FtlProgPages:
 	ldrb	r3, [r5, #9]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	FlashProgPages
-.L1318:
+.L1319:
 	ldr	r2, [r4]
 	adds	r3, r2, #1
-	beq	.L1313
+	beq	.L1314
 	cmp	r2, #256
-	beq	.L1313
+	beq	.L1314
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [fp]
 	cmp	r2, r3
-	bcc	.L1314
-	movw	r2, #982
-	ldr	r1, .L1329+4
-	ldr	r0, .L1329+8
+	bcc	.L1315
+	movw	r2, #985
+	ldr	r1, .L1330+4
+	ldr	r0, .L1330+8
 	bl	printf
-.L1314:
+.L1315:
 	ldr	r3, [r4, #4]
 	add	r1, sp, #16
 	movs	r2, #1
@@ -9746,24 +9758,24 @@ FtlProgPages:
 	ldr	r3, [sp, #4]
 	mov	r7, r0
 	adds	r3, r3, #1
-	beq	.L1315
-	ldr	r3, .L1329+12
+	beq	.L1316
+	ldr	r3, .L1330+12
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1316
+	cbnz	r2, .L1317
 	mov	r1, r0
-	ldr	r0, .L1329+16
+	ldr	r0, .L1330+16
 	bl	printf
-.L1316:
+.L1317:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1315:
+.L1316:
 	adds	r6, r6, #1
 	adds	r4, r4, #20
-	b	.L1311
-.L1330:
+	b	.L1312
+.L1331:
 	.align	2
-.L1329:
+.L1330:
 	.word	.LANCHOR3
 	.word	.LANCHOR169
 	.word	.LC1
@@ -9784,66 +9796,66 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r4, .L1346
+	ldr	r4, .L1347
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1332
-	ldr	r3, .L1346+4
+	beq	.L1333
+	ldr	r3, .L1347+4
 	mov	r0, r4
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
-.L1332:
-	ldr	r3, .L1346+8
+.L1333:
+	ldr	r3, .L1347+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1334
-	ldr	r6, .L1346+4
+	beq	.L1335
+	ldr	r6, .L1347+4
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldr	r5, .L1346+12
+	ldr	r5, .L1347+12
 	ldrh	r2, [r6]
 	ldrh	r1, [r5]
 	muls	r2, r0, r2
 	cmp	r1, r2
-	beq	.L1335
+	beq	.L1336
 	movs	r2, #164
-	ldr	r1, .L1346+16
-	ldr	r0, .L1346+20
+	ldr	r1, .L1347+16
+	ldr	r0, .L1347+20
 	bl	printf
-.L1335:
+.L1336:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1346+24
+	ldr	r2, .L1347+24
 	ldrh	r0, [r4]
-	ldr	fp, .L1346+56
+	ldr	fp, .L1347+56
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1346+28
+	ldr	r1, .L1347+28
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1336:
+.L1337:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1340
+	bhi	.L1341
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r4]
 	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1341
+	beq	.L1342
 	bl	INSERT_DATA_LIST
-.L1342:
-	ldr	r2, .L1346+32
+.L1343:
+	ldr	r2, .L1347+32
 	movs	r3, #0
 	movw	r6, #65535
 	strh	r3, [r5]	@ movhi
@@ -9851,38 +9863,38 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1346+36
+	ldr	r3, .L1347+36
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1346+40
+	ldr	r3, .L1347+40
 	ldrh	r2, [r3]
-	ldr	r3, .L1346+44
+	ldr	r3, .L1347+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
 	ittt	gt
-	ldrgt	r3, .L1346+48
+	ldrgt	r3, .L1347+48
 	movgt	r2, #20
 	strhgt	r2, [r3]	@ movhi
-.L1334:
+.L1335:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1340:
+.L1341:
 	uxth	r3, r6
 	mov	r8, #12
 	ldr	r2, [fp]
 	mul	r8, r8, r3
-	ldr	r3, .L1346+52
+	ldr	r3, .L1347+52
 	ldr	r3, [r3]
 	add	r7, r3, r8
 	ldr	r0, [r7, #8]
 	cmp	r0, r2
-	bcc	.L1337
-.L1344:
+	bcc	.L1338
+.L1345:
 	ldrh	r0, [r4]
-	b	.L1345
-.L1337:
+	b	.L1346
+.L1338:
 	movs	r2, #0
 	add	r1, sp, #12
 	str	r3, [sp, #4]
@@ -9891,7 +9903,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L1339
+	bne	.L1340
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -9900,22 +9912,22 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r7, #8]
 	bl	log2phys
 	mov	r0, r8
-.L1345:
+.L1346:
 	bl	decrement_vpc_count
-	b	.L1338
-.L1339:
+	b	.L1339
+.L1340:
 	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L1344
-.L1338:
+	bne	.L1345
+.L1339:
 	adds	r6, r6, #1
-	b	.L1336
-.L1341:
+	b	.L1337
+.L1342:
 	bl	INSERT_FREE_LIST
-	b	.L1342
-.L1347:
+	b	.L1343
+.L1348:
 	.align	2
-.L1346:
+.L1347:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR133
@@ -9944,27 +9956,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1350
-	ldr	r5, .L1350+4
+	ldr	r4, .L1351
+	ldr	r5, .L1351+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1348
-	ldr	r0, .L1350+8
+	bcc	.L1349
+	ldr	r0, .L1351+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1350+12
+	ldr	r3, .L1351+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1348:
+.L1349:
 	pop	{r3, r4, r5, pc}
-.L1351:
+.L1352:
 	.align	2
-.L1350:
+.L1351:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR129
@@ -9983,13 +9995,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1353
-	ldr	r3, .L1353+4
+	ldr	r5, .L1354
+	ldr	r3, .L1354+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1353+8
+	ldr	r5, .L1354+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -10000,9 +10012,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1354:
+.L1355:
 	.align	2
-.L1353:
+.L1354:
 	.word	.LANCHOR51
 	.word	.LANCHOR157
 	.word	.LANCHOR52
@@ -10020,32 +10032,32 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1363
+	ldr	r4, .L1364
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1363+4
+	ldr	r5, .L1364+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1356:
+.L1357:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1359
+	bhi	.L1360
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1363+8
+	ldr	r3, .L1364+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1355
+	cbnz	r3, .L1356
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	movs	r0, #1
-.L1355:
+.L1356:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1359:
+.L1360:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
@@ -10058,10 +10070,10 @@ Ftl_gc_temp_data_write_back:
 	ldrne	r2, [r0, #8]
 	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L1356
-.L1364:
+	b	.L1357
+.L1365:
 	.align	2
-.L1363:
+.L1364:
 	.word	.LANCHOR62
 	.word	.LANCHOR104
 	.word	.LANCHOR53
@@ -10079,34 +10091,34 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1368
+	ldr	r4, .L1369
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1366
+	beq	.L1367
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1367
-.L1366:
+	cbnz	r3, .L1368
+.L1367:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1368
+	ldr	r0, .L1369
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1368+4
+	ldr	r3, .L1369+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1368+8
+	ldr	r3, .L1369+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1367:
-	ldr	r0, .L1368
+.L1368:
+	ldr	r0, .L1369
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1369:
+.L1370:
 	.align	2
-.L1368:
+.L1369:
 	.word	.LANCHOR53
 	.word	.LANCHOR69
 	.word	.LANCHOR70
@@ -10122,188 +10134,188 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1460
+	ldr	r3, .L1461
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	str	r0, [sp, #28]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1427
-	ldr	r3, .L1460+4
+	bne	.L1428
+	ldr	r3, .L1461+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1370
-	ldr	r3, .L1460+8
+	bls	.L1371
+	ldr	r3, .L1461+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	beq	.L1372
-	ldr	r1, .L1460+12
+	beq	.L1373
+	ldr	r1, .L1461+12
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-.L1372:
+.L1373:
 	ldr	r3, [sp, #28]
 	cmp	r3, #0
-	bne	.L1429
-	ldr	r3, .L1460+16
+	bne	.L1430
+	ldr	r3, .L1461+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1430
-	ldr	r2, .L1460+20
+	bhi	.L1431
+	ldr	r2, .L1461+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1375
+	bls	.L1376
 	lsrs	r4, r4, #5
-.L1374:
-	ldr	r2, .L1460+24
+.L1375:
+	ldr	r2, .L1461+24
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1378
-	ldr	r3, .L1460+28
+	bcs	.L1379
+	ldr	r3, .L1461+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1379
-	ldr	r0, .L1460+12
+	bne	.L1380
+	ldr	r0, .L1461+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1379
-	ldr	r3, .L1460+32
+	bne	.L1380
+	ldr	r3, .L1461+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1380
-	ldr	r3, .L1460+36
-	ldr	r4, .L1460+40
+	cbnz	r0, .L1381
+	ldr	r3, .L1461+36
+	ldr	r4, .L1461+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1381
-.L1380:
-	ldr	r3, .L1460+44
+	bcs	.L1382
+.L1381:
+	ldr	r3, .L1461+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1382:
-	ldr	r3, .L1460+48
+.L1383:
+	ldr	r3, .L1461+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1370:
+.L1371:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1375:
+.L1376:
 	cmp	r3, #12
-	bls	.L1376
+	bls	.L1377
 	lsrs	r4, r4, #4
-	b	.L1374
-.L1376:
+	b	.L1375
+.L1377:
 	cmp	r3, #8
-	bls	.L1374
+	bls	.L1375
 	lsrs	r4, r4, #2
-	b	.L1374
-.L1430:
+	b	.L1375
+.L1431:
 	movs	r4, #1
-	b	.L1374
-.L1381:
+	b	.L1375
+.L1382:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1382
-.L1379:
-	ldr	r3, .L1460+44
+	b	.L1383
+.L1380:
+	ldr	r3, .L1461+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1378:
-	ldr	r3, .L1460+52
+.L1379:
+	ldr	r3, .L1461+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1373
+	cbz	r3, .L1374
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1373:
-	ldr	r5, .L1460+56
+.L1374:
+	ldr	r5, .L1461+56
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1385
-	ldr	r3, .L1460+12
+	bne	.L1386
+	ldr	r3, .L1461+12
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1386
-	ldr	r0, .L1460+60
+	beq	.L1387
+	ldr	r0, .L1461+60
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1387
+	cbnz	r1, .L1388
 	strh	r2, [r3]	@ movhi
-.L1387:
+.L1388:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L1386:
+.L1387:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1385
+	beq	.L1386
 	bl	IsBlkInGcList
-	cbz	r0, .L1389
+	cbz	r0, .L1390
 	strh	r6, [r5]	@ movhi
-.L1389:
+.L1390:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1385
-	ldr	r0, .L1460+56
+	beq	.L1386
+	ldr	r0, .L1461+56
 	bl	make_superblock
-	ldr	r2, .L1460+64
+	ldr	r2, .L1461+64
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1460+60
+	ldr	r3, .L1461+60
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1460+68
+	ldr	r3, .L1461+68
 	strh	r2, [r3]	@ movhi
-.L1385:
-	ldr	r2, .L1460+72
+.L1386:
+	ldr	r2, .L1461+72
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1390
-	ldr	r2, .L1460+76
+	beq	.L1391
+	ldr	r2, .L1461+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1390
-	ldr	r2, .L1460+28
+	beq	.L1391
+	ldr	r2, .L1461+28
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1391
-.L1390:
+	bne	.L1392
+.L1391:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1391:
-	ldr	r5, .L1460+56
+.L1392:
+	ldr	r5, .L1461+56
 	mov	r6, r5
-.L1426:
+.L1427:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1392
-	ldr	fp, .L1460+88
+	bne	.L1393
+	ldr	fp, .L1461+88
 	movs	r2, #0
-	ldr	r3, .L1460+48
+	ldr	r3, .L1461+48
 	mov	r8, fp
 	str	r2, [r3]
-.L1393:
+.L1394:
 	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -10311,15 +10323,15 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1394
+	bne	.L1395
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [fp]	@ movhi
-	b	.L1370
-.L1429:
+	b	.L1371
+.L1430:
 	movs	r4, #1
-	b	.L1373
-.L1394:
+	b	.L1374
+.L1395:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -10327,60 +10339,60 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1395
+	cbz	r0, .L1396
 	strh	r7, [fp]	@ movhi
-	b	.L1393
-.L1395:
+	b	.L1394
+.L1396:
 	uxth	r0, r2
-	ldr	r2, .L1460+20
-	ldr	r10, .L1460+60
+	ldr	r2, .L1461+20
+	ldr	r10, .L1461+60
 	uxth	r7, r7
 	ldrh	lr, [r2]
-	ldr	r2, .L1460+80
+	ldr	r2, .L1461+80
 	ldr	r1, [r10]
 	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1397
+	bgt	.L1398
 	cmp	r7, #48
-	bls	.L1398
+	bls	.L1399
 	cmp	ip, #8
-	bls	.L1398
-	ldr	r7, .L1460+84
+	bls	.L1399
+	ldr	r7, .L1461+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1398
-.L1397:
+	bhi	.L1399
+.L1398:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1398:
+.L1399:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1399
+	bgt	.L1400
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1399
+	bhi	.L1400
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1459:
-	ldr	r3, .L1460+32
+.L1460:
+	ldr	r3, .L1461+32
 	ldrh	r0, [r3]
-	b	.L1370
-.L1399:
-	cbnz	r1, .L1400
+	b	.L1371
+.L1400:
+	cbnz	r1, .L1401
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1393
-.L1461:
+	b	.L1394
+.L1462:
 	.align	2
-.L1460:
+.L1461:
 	.word	.LANCHOR94
 	.word	.LANCHOR44
 	.word	.LANCHOR73
@@ -10404,65 +10416,65 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR3
 	.word	.LANCHOR69
 	.word	.LANCHOR102
-.L1400:
+.L1401:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1462
+	ldr	r2, .L1463
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1401
+	bne	.L1402
 	movw	r2, #717
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1401:
-	ldr	r3, .L1462+12
+.L1402:
+	ldr	r3, .L1463+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1402
+	bne	.L1403
 	movw	r2, #718
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1402:
-	ldr	r3, .L1462+16
+.L1403:
+	ldr	r3, .L1463+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1403
+	bne	.L1404
 	movw	r2, #719
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1403:
+.L1404:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1462+20
+	ldr	r2, .L1463+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1462+24
+	ldr	r2, .L1463+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1392:
-	ldr	r3, .L1462+28
+.L1393:
+	ldr	r3, .L1463+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1462+32
+	ldr	r3, .L1463+32
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #28]
-	cbz	r3, .L1404
-	ldr	r3, .L1462+36
+	cbz	r3, .L1405
+	ldr	r3, .L1463+36
 	ldr	r2, [sp, #16]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1462+40
+	ldr	r2, .L1463+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -10470,10 +10482,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1404:
+.L1405:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #16]
-	ldr	fp, .L1462+64
+	ldr	fp, .L1463+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -10483,27 +10495,27 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #24]
-.L1407:
+.L1408:
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1415
-	ldr	r3, .L1462+36
+	bls	.L1416
+	ldr	r3, .L1463+36
 	movw	r10, #65535
 	ldrh	r1, [r5, #2]
 	mov	ip, #20
 	ldr	r0, [fp]
 	ldrh	lr, [r3]
 	ldr	r3, [sp, #24]
-	ldr	r7, .L1462+44
+	ldr	r7, .L1463+44
 	adds	r3, r1, r3
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1416
-.L1409:
+	b	.L1417
+.L1410:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, r10
-	beq	.L1408
+	beq	.L1409
 	ldr	r1, [sp, #12]
 	mla	r8, ip, r1, r0
 	ldr	r1, [sp, #20]
@@ -10513,27 +10525,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1408:
+.L1409:
 	adds	r3, r3, #1
-.L1416:
+.L1417:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1409
+	bhi	.L1410
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1458:
+.L1459:
 	str	r3, [sp, #20]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1414
+	bhi	.L1415
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	str	r3, [sp, #24]
-	b	.L1407
-.L1414:
+	b	.L1408
+.L1415:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
@@ -10541,20 +10553,20 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1411
+	beq	.L1412
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1411
+	bne	.L1412
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L1412
+	bne	.L1413
 	movw	r2, #753
-	ldr	r1, .L1462+4
-	ldr	r0, .L1462+8
+	ldr	r1, .L1463+4
+	ldr	r0, .L1463+8
 	bl	printf
-.L1412:
+.L1413:
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r10
@@ -10564,10 +10576,10 @@ rk_ftl_garbage_collect:
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1411
-	ldr	r2, .L1462+20
-	ldr	r10, .L1462+60
-	ldr	r1, .L1462+48
+	bne	.L1412
+	ldr	r2, .L1463+20
+	ldr	r10, .L1463+60
+	ldr	r1, .L1463+48
 	ldrh	r3, [r2]
 	str	r1, [sp, #36]
 	adds	r3, r3, #1
@@ -10589,7 +10601,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1462+16
+	ldr	r7, .L1463+16
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -10600,7 +10612,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L1462+52
+	ldr	r2, .L1463+52
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
@@ -10608,44 +10620,44 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1413
+	beq	.L1414
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1411
-.L1413:
+	cbnz	r3, .L1412
+.L1414:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1411
-	ldr	r3, .L1462+28
+	cbz	r0, .L1412
+	ldr	r3, .L1463+28
 	movs	r2, #0
 	movw	r1, #65535
 	str	r2, [r3]
-	ldr	r3, .L1462+56
+	ldr	r3, .L1463+56
 	strh	r1, [r3]	@ movhi
 	strh	r2, [r3, #2]	@ movhi
-	b	.L1459
-.L1411:
+	b	.L1460
+.L1412:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1458
-.L1415:
+	b	.L1459
+.L1416:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #16]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L1417
-	ldr	r3, .L1462+60
+	bhi	.L1418
+	ldr	r3, .L1463+60
 	ldr	r3, [r3]
-	cbz	r3, .L1418
+	cbz	r3, .L1419
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1418
-	ldr	r3, .L1462+28
+	cbz	r0, .L1419
+	ldr	r3, .L1463+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1459
-.L1463:
+	b	.L1460
+.L1464:
 	.align	2
-.L1462:
+.L1463:
 	.word	.LANCHOR51
 	.word	.LANCHOR175
 	.word	.LC1
@@ -10663,50 +10675,50 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR145
 	.word	.LANCHOR62
 	.word	.LANCHOR66
-.L1418:
-	ldr	r3, .L1464
+.L1419:
+	ldr	r3, .L1465
 	ldrh	r4, [r3]
 	cmp	r4, #0
-	bne	.L1419
-	ldr	r8, .L1464+28
+	bne	.L1420
+	ldr	r8, .L1465+28
 	ldrh	r1, [r5]
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r1, lsl #1]
 	cmp	r3, #0
-	beq	.L1419
-	ldr	r0, .L1464+4
-	ldr	r10, .L1464+32
+	beq	.L1420
+	ldr	r0, .L1465+4
+	ldr	r10, .L1465+32
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L1464+8
+	ldr	r0, .L1465+8
 	bl	printf
-.L1420:
+.L1421:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcs	.L1422
+	bcs	.L1423
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #44]
 	adds	r3, r7, #1
-	beq	.L1421
+	beq	.L1422
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5]
 	cmp	r3, r0
-	bne	.L1421
+	bne	.L1422
 	mov	r2, r7
 	mov	r1, r4
-	ldr	r0, .L1464+12
+	ldr	r0, .L1465+12
 	bl	printf
-.L1422:
+.L1423:
 	ldr	r3, [r10]
 	cmp	r4, r3
-	bcc	.L1419
+	bcc	.L1420
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r3, [r8]
@@ -10715,32 +10727,32 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1419:
+.L1420:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1417:
-	ldr	r3, .L1464+16
+.L1418:
+	ldr	r3, .L1465+16
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1464+20
+	ldr	r3, .L1465+20
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L1425
-	ldr	r3, .L1464+24
+	bhi	.L1426
+	ldr	r3, .L1465+24
 	ldrh	r4, [r3]
-	b	.L1426
-.L1421:
+	b	.L1427
+.L1422:
 	adds	r4, r4, #1
-	b	.L1420
-.L1425:
+	b	.L1421
+.L1426:
 	adds	r0, r0, #1
-	b	.L1370
-.L1427:
+	b	.L1371
+.L1428:
 	movs	r0, #0
-	b	.L1370
-.L1465:
+	b	.L1371
+.L1466:
 	.align	2
-.L1464:
+.L1465:
 	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LC42
@@ -10768,31 +10780,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1467
+	bne	.L1468
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1466:
+.L1467:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1467:
+.L1468:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1499
+	ldr	r3, .L1500
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1488
-	ldr	r3, .L1499+4
+	bhi	.L1489
+	ldr	r3, .L1500+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1489
-	ldr	r3, .L1499+8
+	beq	.L1490
+	ldr	r3, .L1500+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -10805,7 +10817,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1499+12
+	ldr	r2, .L1500+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -10818,54 +10830,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1499+16
+	ldr	r2, .L1500+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1469:
+.L1470:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1486
-	ldr	r3, .L1499+20
-	ldrh	r3, [r3]
 	cbnz	r3, .L1487
-	ldr	r3, .L1499+24
+	ldr	r3, .L1500+20
+	ldrh	r3, [r3]
+	cbnz	r3, .L1488
+	ldr	r3, .L1500+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1466
-.L1487:
+	bhi	.L1467
+.L1488:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1466
-.L1486:
+	b	.L1467
+.L1487:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1470
-	ldr	fp, .L1499+8
+	bne	.L1471
+	ldr	fp, .L1500+8
 	mov	r10, #0
-.L1471:
+.L1472:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1473
-.L1474:
+	bcc	.L1474
+.L1475:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1478
-	ldr	r3, .L1499+28
+	beq	.L1479
+	ldr	r3, .L1500+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1469
-.L1478:
+	bne	.L1470
+.L1479:
 	cmp	r5, #0
-	beq	.L1469
-	ldr	r3, .L1499+32
+	beq	.L1470
+	ldr	r3, .L1500+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -10879,29 +10891,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1485:
+.L1486:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1499+32
+	ldr	r3, .L1500+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1480
+	bne	.L1481
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1499+36
+	ldr	r2, .L1500+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1481
+	bne	.L1482
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1498:
+.L1499:
 	bl	ftl_memcpy
-.L1481:
-	ldr	r3, .L1499+32
+.L1482:
+	ldr	r3, .L1500+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -10910,49 +10922,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1499+40
+	ldrne	r0, .L1500+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1483
-	ldr	r1, .L1499+40
+	bne	.L1484
+	ldr	r1, .L1500+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1484:
+.L1485:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1485
+	bne	.L1486
 	movs	r5, #0
-	b	.L1469
-.L1473:
+	b	.L1470
+.L1474:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1472
+	bhi	.L1473
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1472
+	bls	.L1473
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1472:
+.L1473:
 	add	r10, r10, #1
-	b	.L1471
-.L1470:
-	ldr	r2, .L1499+32
+	b	.L1472
+.L1471:
+	ldr	r2, .L1500+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1499+8
-	bne	.L1475
-	ldr	r2, .L1499+36
+	ldr	r3, .L1500+8
+	bne	.L1476
+	ldr	r2, .L1500+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -10967,11 +10979,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1476
+	bne	.L1477
 	str	r8, [r10, #8]
-.L1476:
-	ldr	r3, .L1499+44
-	ldr	r2, .L1499+48
+.L1477:
+	ldr	r3, .L1500+44
+	ldr	r2, .L1500+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -10980,12 +10992,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1474
-.L1475:
+	b	.L1475
+.L1476:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1477
-	ldr	r2, .L1499+52
+	bne	.L1478
+	ldr	r2, .L1500+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -10993,49 +11005,49 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1476
-.L1497:
+	bne	.L1477
+.L1498:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1476
-.L1477:
+	b	.L1477
+.L1478:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1497
-.L1480:
+	b	.L1498
+.L1481:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1481
-	ldr	r3, .L1499+52
+	bne	.L1482
+	ldr	r3, .L1500+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1481
-	ldr	r2, .L1499+8
+	bne	.L1482
+	ldr	r2, .L1500+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1498
-.L1483:
+	b	.L1499
+.L1484:
 	cmp	r3, #256
-	bne	.L1484
+	bne	.L1485
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1484
-.L1488:
-	mov	r3, #-1
+	b	.L1485
 .L1489:
+	mov	r3, #-1
+.L1490:
 	str	r3, [sp, #4]
-	b	.L1466
-.L1500:
+	b	.L1467
+.L1501:
 	.align	2
-.L1499:
+.L1500:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR12
@@ -11086,32 +11098,32 @@ FtlWrite:
 	mov	fp, r1
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1503
+	bne	.L1504
 	mov	r2, r3
 	ldr	r1, [sp, #20]
 	add	r0, fp, #256
 	bl	FtlVendorPartWrite
-.L1502:
+.L1503:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1503:
+.L1504:
 	ldr	r3, [sp, #20]
 	adds	r4, r1, r3
-	ldr	r3, .L1547
+	ldr	r3, .L1548
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1536
-	ldr	r3, .L1547+4
+	bhi	.L1537
+	ldr	r3, .L1548+4
 	ldr	r0, [r3]
 	adds	r1, r0, #1
-	beq	.L1502
-	ldr	r3, .L1547+8
+	beq	.L1503
+	ldr	r3, .L1548+8
 	mov	r2, #2048
 	mov	r0, fp
-	ldr	r7, .L1547+12
+	ldr	r7, .L1548+12
 	str	r2, [r3]
-	ldr	r3, .L1547+16
+	ldr	r3, .L1548+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -11123,7 +11135,7 @@ FtlWrite:
 	ldr	r1, [sp, #20]
 	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1547+20
+	ldr	r2, .L1548+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -11132,39 +11144,39 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1547+24
+	ldr	r2, .L1548+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1505:
+.L1506:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1531
-	ldr	r5, .L1547+28
+	cbnz	r3, .L1532
+	ldr	r5, .L1548+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1532
-.L1534:
+	bls	.L1533
+.L1535:
 	movs	r0, #0
-	b	.L1502
-.L1531:
-	ldr	r4, .L1547+32
+	b	.L1503
+.L1532:
+	ldr	r4, .L1548+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1506
-	movw	r2, #1038
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bcc	.L1507
+	movw	r2, #1041
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1506:
+.L1507:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1507
+	cbnz	r3, .L1508
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1507:
+.L1508:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -11179,22 +11191,22 @@ FtlWrite:
 	str	r3, [sp, #44]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1508
-	movw	r2, #1071
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bcc	.L1509
+	movw	r2, #1074
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1508:
-	ldr	r8, .L1547+44
+.L1509:
+	ldr	r8, .L1548+44
 	movs	r3, #0
 	str	r3, [sp, #4]
-.L1509:
+.L1510:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #44]
 	cmp	r3, r2
-	bne	.L1529
-.L1510:
-	ldr	r0, .L1547+44
+	bne	.L1530
+.L1511:
+	ldr	r0, .L1548+44
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #4]
@@ -11203,21 +11215,21 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bls	.L1530
-	movw	r2, #1149
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bls	.L1531
+	mov	r2, #1152
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1530:
+.L1531:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	subs	r3, r3, r2
 	str	r3, [sp, #8]
-	b	.L1505
-.L1529:
+	b	.L1506
+.L1530:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L1510
+	beq	.L1511
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r5
@@ -11225,7 +11237,7 @@ FtlWrite:
 	bl	log2phys
 	mov	r0, r7
 	bl	get_new_active_ppa
-	ldr	r2, .L1547+48
+	ldr	r2, .L1548+48
 	ldr	r1, [sp, #4]
 	ldr	r3, [sp, #4]
 	ldrh	r2, [r2]
@@ -11237,7 +11249,7 @@ FtlWrite:
 	bic	r1, r1, #3
 	str	r5, [r3, #16]
 	str	r1, [sp, #36]
-	ldr	r1, .L1547+52
+	ldr	r1, .L1548+52
 	ldr	r0, [sp, #36]
 	ldr	r1, [r1]
 	add	r10, r1, r0
@@ -11247,12 +11259,12 @@ FtlWrite:
 	mov	r0, r10
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1547+16
+	ldr	r2, .L1548+16
 	cmp	r5, r3
-	beq	.L1511
+	beq	.L1512
 	ldr	r3, [sp, #28]
 	cmp	r5, r3
-	bne	.L1542
+	bne	.L1543
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #20]
 	smulbb	r2, r2, r5
@@ -11261,8 +11273,8 @@ FtlWrite:
 	str	r3, [sp, #24]
 	subs	r4, r4, r2
 	uxth	r4, r4
-	b	.L1514
-.L1511:
+	b	.L1515
+.L1512:
 	ldrh	r4, [r2]
 	mov	r0, fp
 	mov	r1, r4
@@ -11273,42 +11285,42 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1514:
-	ldr	r3, .L1547+16
+.L1515:
+	ldr	r3, .L1548+16
 	ldrh	r3, [r3]
 	cmp	r4, r3
 	ldr	r3, [sp, #12]
-	bne	.L1515
+	bne	.L1516
 	cmp	r5, r3
 	ldr	r3, [r8]
 	add	r6, r6, r3
-	bne	.L1516
+	bne	.L1517
 	ldr	r3, [sp, #16]
-.L1544:
+.L1545:
 	str	r3, [r6, #8]
-	b	.L1517
-.L1516:
+	b	.L1518
+.L1517:
 	muls	r4, r5, r4
 	ldr	r3, [sp, #16]
 	sub	r4, r4, fp
 	add	r4, r3, r4, lsl #9
 	str	r4, [r6, #8]
-.L1517:
-	ldr	r3, .L1547+32
+.L1518:
+	ldr	r3, .L1548+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1526
-	movw	r2, #1140
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	bcc	.L1527
+	movw	r2, #1143
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-.L1526:
+.L1527:
 	ldr	r2, [sp, #40]
 	movw	r3, #61589
 	ldr	r1, [sp, #36]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L1547+56
+	ldr	r2, .L1548+56
 	str	r5, [r10, #8]
 	adds	r5, r5, #1
 	ldr	r3, [r2]
@@ -11325,19 +11337,19 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	str	r3, [sp, #4]
-	b	.L1509
-.L1515:
+	b	.L1510
+.L1516:
 	cmp	r5, r3
 	ldr	r3, [r8]
 	ite	eq
-	ldreq	r2, .L1547+60
-	ldrne	r2, .L1547+64
+	ldreq	r2, .L1548+60
+	ldrne	r2, .L1548+64
 	add	r3, r3, r6
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #48]
 	adds	r2, r3, #1
-	beq	.L1520
+	beq	.L1521
 	str	r3, [sp, #56]
 	movs	r1, #1
 	ldr	r3, [r8]
@@ -11352,61 +11364,61 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1521
-	ldr	r1, .L1547+68
-	ldr	r0, .L1547+72
+	bne	.L1522
+	ldr	r1, .L1548+68
+	ldr	r0, .L1548+72
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
 	mov	r2, r5
 	ldr	r1, [r10, #8]
 	bl	printf
-.L1524:
+.L1525:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r5, r3
-	bne	.L1525
+	bne	.L1526
 	ldr	r3, [r8]
 	ldr	r1, [sp, #16]
 	add	r6, r6, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r6, #8]
 	add	r0, r0, r3, lsl #9
-.L1545:
+.L1546:
 	bl	ftl_memcpy
-	b	.L1517
-.L1521:
+	b	.L1518
+.L1522:
 	ldr	r1, [r10, #8]
 	cmp	r5, r1
-	beq	.L1523
-	ldr	r2, .L1547+68
-	ldr	r0, .L1547+76
+	beq	.L1524
+	ldr	r2, .L1548+68
+	ldr	r0, .L1548+76
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r5
 	bl	printf
-.L1523:
+.L1524:
 	ldr	r3, [r10, #8]
 	cmp	r5, r3
-	beq	.L1524
-	movw	r2, #1125
-	ldr	r1, .L1547+36
-	ldr	r0, .L1547+40
+	beq	.L1525
+	mov	r2, #1128
+	ldr	r1, .L1548+36
+	ldr	r0, .L1548+40
 	bl	printf
-	b	.L1524
-.L1520:
+	b	.L1525
+.L1521:
 	ldr	r3, [r8]
 	movs	r1, #0
-	ldr	r2, .L1547+80
+	ldr	r2, .L1548+80
 	add	r3, r3, r6
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1524
-.L1548:
+	b	.L1525
+.L1549:
 	.align	2
-.L1547:
+.L1548:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR176
@@ -11428,8 +11440,8 @@ FtlWrite:
 	.word	.LC44
 	.word	.LC45
 	.word	.LANCHOR23
-.L1525:
-	ldr	r3, .L1549
+.L1526:
+	ldr	r3, .L1550
 	ldrh	r1, [r3]
 	ldr	r3, [r8]
 	muls	r1, r5, r1
@@ -11438,8 +11450,8 @@ FtlWrite:
 	ldr	r0, [r6, #8]
 	sub	r1, r1, fp
 	add	r1, r3, r1, lsl #9
-	b	.L1545
-.L1542:
+	b	.L1546
+.L1543:
 	ldr	r3, [r8]
 	add	r6, r6, r3
 	ldrh	r3, [r2]
@@ -11447,30 +11459,30 @@ FtlWrite:
 	muls	r3, r5, r3
 	sub	r3, r3, fp
 	add	r3, r2, r3, lsl #9
-	b	.L1544
-.L1532:
-	ldr	r6, .L1549+4
+	b	.L1545
+.L1533:
+	ldr	r6, .L1550+4
 	mov	r4, #256
-	ldr	r7, .L1549+8
-.L1535:
+	ldr	r7, .L1550+8
+.L1536:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1533
+	bne	.L1534
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1533
+	bne	.L1534
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1533:
-	ldr	r2, .L1549+12
+.L1534:
+	ldr	r2, .L1550+12
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1549+16
+	ldr	r2, .L1550+16
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -11478,16 +11490,16 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1534
+	bhi	.L1535
 	subs	r4, r4, #1
-	bne	.L1535
-	b	.L1534
-.L1536:
+	bne	.L1536
+	b	.L1535
+.L1537:
 	mov	r0, #-1
-	b	.L1502
-.L1550:
+	b	.L1503
+.L1551:
 	.align	2
-.L1549:
+.L1550:
 	.word	.LANCHOR12
 	.word	.LANCHOR145
 	.word	.LANCHOR72
@@ -11523,16 +11535,16 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1582+144
+	ldr	r8, .L1583+144
 	sub	sp, sp, #24
-	ldr	r7, .L1582
+	ldr	r7, .L1583
 	ldr	r3, [r8]
-	ldr	r4, .L1582+4
-	ldr	fp, .L1582+148
+	ldr	r4, .L1583+4
+	ldr	fp, .L1583+148
 	ldrh	r2, [r7]
-	ldr	r5, .L1582+8
+	ldr	r5, .L1583+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1582+12
+	ldr	r6, .L1583+12
 	ldr	r3, [fp]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -11542,33 +11554,33 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp, #16]
 	cmp	r0, r3
-	bne	.L1553
-.L1564:
+	bne	.L1554
+.L1565:
 	mov	r0, #-1
-.L1552:
+.L1553:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1553:
+.L1554:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	r10, [r6]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1555:
+.L1556:
 	cmp	r5, #0
-	bge	.L1561
+	bge	.L1562
 	movw	r2, #1465
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+20
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+20
 	bl	printf
-	b	.L1560
-.L1561:
+	b	.L1561
+.L1562:
 	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1582+4
+	ldr	r0, .L1583+4
 	str	r3, [r4, #4]
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
@@ -11576,67 +11588,67 @@ FtlLoadSysInfo:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L1556
+	cbz	r3, .L1557
 	ldr	r2, [r4]
 	adds	r2, r2, #1
-	beq	.L1556
-	ldr	r2, .L1582+24
+	beq	.L1557
+	ldr	r2, .L1583+24
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L1556
+	beq	.L1557
 	str	r0, [sp, #8]
 	mov	r2, r10
 	str	r3, [sp, #4]
 	ldrh	r3, [r6, #4]
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+28
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+28
 	str	r3, [sp]
 	mov	r3, r5
 	bl	printf
-	cbnz	r5, .L1557
+	cbnz	r5, .L1558
 	ldrh	r3, [r6, #4]
 	cmp	r10, r3
-	beq	.L1557
+	beq	.L1558
 	sxth	r10, r3
-	ldr	r3, .L1582+32
+	ldr	r3, .L1583+32
 	ldrh	r5, [r3]
-.L1559:
+.L1560:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1555
-.L1557:
+	b	.L1556
+.L1558:
 	mov	r3, #-1
 	str	r3, [r4]
-.L1556:
+.L1557:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1559
+	beq	.L1560
 	ldr	r3, [r8]
-	ldr	r2, .L1582+36
+	ldr	r2, .L1583+36
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1559
+	bne	.L1560
 	ldr	r3, [fp]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L1559
-.L1560:
-	ldr	r2, .L1582+24
+	bne	.L1560
+.L1561:
+	ldr	r2, .L1583+24
 	ldrh	r3, [r7]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1563
+	bcs	.L1564
 	movw	r2, #1467
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+20
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+20
 	bl	printf
-.L1563:
-	ldr	r5, .L1582+40
+.L1564:
+	ldr	r5, .L1583+40
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r5
@@ -11657,60 +11669,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1582+44
+	ldr	r3, .L1583+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r5]
-	ldr	r3, .L1582+36
+	ldr	r3, .L1583+36
 	cmp	r2, r3
-	bne	.L1564
-	ldr	r3, .L1582+48
+	bne	.L1565
+	ldr	r3, .L1583+48
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r5, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1564
-	ldr	r3, .L1582+52
-	ldr	r2, .L1582+56
+	bne	.L1565
+	ldr	r3, .L1583+52
+	ldr	r2, .L1583+56
 	str	r5, [r3]
-	ldr	r3, .L1582+60
+	ldr	r3, .L1583+60
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1582+64
+	ldr	r2, .L1583+64
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1582+68
+	ldr	r2, .L1583+68
 	str	r3, [r2]
-	ldr	r3, .L1582+72
+	ldr	r3, .L1583+72
 	ldr	r6, [r3]
-	ldr	r3, .L1582+76
+	ldr	r3, .L1583+76
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1582+80
+	ldr	r3, .L1583+80
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1582+84
+	ldr	r3, .L1583+84
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1565
+	bls	.L1566
 	movw	r2, #1489
-	ldr	r1, .L1582+16
-	ldr	r0, .L1582+20
+	ldr	r1, .L1583+16
+	ldr	r0, .L1583+20
 	bl	printf
-.L1565:
+.L1566:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1582+88
+	ldr	r3, .L1583+88
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1582+92
+	ldr	r7, .L1583+92
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1582+96
+	ldr	r1, .L1583+96
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -11729,7 +11741,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1582+100
+	ldr	r2, .L1583+100
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -11739,31 +11751,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1582+104
+	ldr	r5, .L1583+104
 	str	r3, [r5]
-	ldr	r5, .L1582+108
+	ldr	r5, .L1583+108
 	str	r3, [r5]
-	ldr	r5, .L1582+112
+	ldr	r5, .L1583+112
 	str	r3, [r5]
-	ldr	r5, .L1582+116
+	ldr	r5, .L1583+116
 	str	r3, [r5]
-	ldr	r5, .L1582+120
+	ldr	r5, .L1583+120
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1582+124
+	ldr	r5, .L1583+124
 	str	r3, [r5]
-	ldr	r5, .L1582+128
+	ldr	r5, .L1583+128
 	str	r3, [r5]
-	ldr	r5, .L1582+132
+	ldr	r5, .L1583+132
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1582+136
+	ldr	r3, .L1583+136
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1582+140
+	ldr	r3, .L1583+140
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -11771,36 +11783,36 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1568
-	ldr	r0, .L1582+88
-	bl	make_superblock
-.L1568:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
 	beq	.L1569
-	ldr	r0, .L1582+96
+	ldr	r0, .L1583+88
 	bl	make_superblock
 .L1569:
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1570
-	ldr	r0, .L1582+100
+	ldr	r0, .L1583+96
 	bl	make_superblock
 .L1570:
-	ldrh	r2, [r7]
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1571
-	ldr	r0, .L1582+92
+	ldr	r0, .L1583+100
 	bl	make_superblock
 .L1571:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1572
+	ldr	r0, .L1583+92
+	bl	make_superblock
+.L1572:
 	movs	r0, #0
-	b	.L1552
-.L1583:
+	b	.L1553
+.L1584:
 	.align	2
-.L1582:
+.L1583:
 	.word	.LANCHOR5
 	.word	.LANCHOR138
 	.word	.LANCHOR42
@@ -11860,7 +11872,7 @@ FtlMapTblRecovery:
 	movs	r7, #0
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
-	ldr	r6, .L1625
+	ldr	r6, .L1626
 	str	r3, [sp, #24]
 	ldrh	r3, [r0, #6]
 	str	r3, [sp, #12]
@@ -11870,13 +11882,13 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #12]
 	lsls	r2, r3, #2
 	bl	ftl_memset
-	ldr	r3, .L1625+4
+	ldr	r3, .L1626+4
 	str	r7, [r4, #32]
 	str	r7, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #20]
 	str	r2, [r6, #8]
-	ldr	r2, .L1625+8
+	ldr	r2, .L1626+8
 	ldr	fp, [r2]
 	movw	r2, #65535
 	str	fp, [r6, #12]
@@ -11884,20 +11896,20 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L1585:
+.L1586:
 	ldr	r3, [sp, #16]
 	sxth	r5, r7
 	cmp	r5, r3
-	bge	.L1604
+	bge	.L1605
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r5, r3
-	bne	.L1586
+	bne	.L1587
 	movs	r1, #1
 	ldrh	r0, [r8, r5, lsl #1]
 	bl	FtlGetLastWrittenPage
 	sxth	r3, r0
-	ldr	r6, .L1625
+	ldr	r6, .L1626
 	add	r10, r8, r5, lsl #1
 	strh	r7, [r4]	@ movhi
 	str	r3, [sp, #16]
@@ -11907,22 +11919,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r4, #28]
-.L1587:
+.L1588:
 	ldr	r3, [sp, #16]
 	sxth	r8, r7
 	cmp	r8, r3
-	ble	.L1590
-.L1604:
+	ble	.L1591
+.L1605:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1625+12
+	ldr	r3, .L1626+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1592
+	bne	.L1593
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1592:
+.L1593:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -11931,9 +11943,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1590:
+.L1591:
 	ldrh	r2, [r10]
-	ldr	r0, .L1625
+	ldr	r0, .L1626
 	orr	r2, r8, r2, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
@@ -11942,34 +11954,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #20]
-	cbz	r2, .L1588
+	cbz	r2, .L1589
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1588
-	ldr	r3, .L1625+16
+	beq	.L1589
+	ldr	r3, .L1626+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	beq	.L1588
+	beq	.L1589
 	str	r0, [sp, #4]
 	mov	r3, r8
 	str	r2, [sp]
 	mov	r2, r5
-	ldr	r1, .L1625+20
-	ldr	r0, .L1625+24
+	ldr	r1, .L1626+20
+	ldr	r0, .L1626+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1588:
+.L1589:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1589
+	beq	.L1590
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1589
+	bls	.L1590
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -11977,15 +11989,15 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1589:
+.L1590:
 	adds	r7, r7, #1
-	b	.L1587
-.L1586:
+	b	.L1588
+.L1587:
 	ldr	r3, [sp, #20]
-	ldr	r10, .L1625+12
+	ldr	r10, .L1626+12
 	ldrh	r2, [r8, r5, lsl #1]
 	ldr	r3, [r3]
-	ldr	r0, .L1625
+	ldr	r0, .L1626
 	str	r3, [r6, #8]
 	add	r3, r8, r5, lsl #1
 	str	r3, [sp, #28]
@@ -11998,25 +12010,25 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1606
+	beq	.L1607
 	ldrh	r2, [fp]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L1606
+	bne	.L1607
 	ldrh	r2, [fp, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L1594
-.L1606:
+	beq	.L1595
+.L1607:
 	mov	r10, #0
-.L1595:
-	ldr	r2, .L1625+12
+.L1596:
+	ldr	r2, .L1626+12
 	sxth	r3, r10
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1602
+	bge	.L1603
 	ldr	r2, [sp, #28]
-	ldr	r0, .L1625
+	ldr	r0, .L1626
 	str	r3, [sp, #36]
 	ldrh	r2, [r2]
 	orr	r2, r3, r2, lsl #10
@@ -12027,34 +12039,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #32]
-	cbz	r2, .L1599
+	cbz	r2, .L1600
 	ldr	r1, [r6]
 	adds	r1, r1, #1
-	beq	.L1599
-	ldr	r1, .L1625+16
+	beq	.L1600
+	ldr	r1, .L1626+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #32]
 	cmp	r2, r0
-	beq	.L1599
+	beq	.L1600
 	str	r0, [sp, #4]
 	str	r2, [sp]
 	mov	r2, r5
 	ldr	r3, [sp, #36]
-	ldr	r1, .L1625+20
-	ldr	r0, .L1625+28
+	ldr	r1, .L1626+20
+	ldr	r0, .L1626+28
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1599:
+.L1600:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1600
+	beq	.L1601
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1600
+	bls	.L1601
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -12062,39 +12074,39 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1600:
+.L1601:
 	add	r10, r10, #1
-	b	.L1595
-.L1594:
+	b	.L1596
+.L1595:
 	ldr	r3, [sp, #20]
 	movs	r1, #0
 	ldrh	r2, [r10]
 	ldr	r0, [r3]
 	add	lr, r2, #-1
-.L1596:
+.L1597:
 	sxth	r3, r1
 	cmp	r3, lr
-	blt	.L1598
-.L1602:
+	blt	.L1599
+.L1603:
 	adds	r7, r7, #1
-	b	.L1585
-.L1598:
+	b	.L1586
+.L1599:
 	lsls	r5, r3, #3
 	ldr	r3, [r0, r3, lsl #3]
 	ldr	r2, [sp, #12]
 	uxth	ip, r3
 	cmp	r2, ip
-	bls	.L1597
+	bls	.L1598
 	add	r5, r5, r0
 	ldr	r2, [sp, #8]
 	ldr	r5, [r5, #4]
 	str	r5, [r2, ip, lsl #2]
-.L1597:
+.L1598:
 	adds	r1, r1, #1
-	b	.L1596
-.L1626:
+	b	.L1597
+.L1627:
 	.align	2
-.L1625:
+.L1626:
 	.word	.LANCHOR138
 	.word	.LANCHOR106
 	.word	.LANCHOR114
@@ -12116,36 +12128,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1628
-	ldr	r0, .L1628+4
+	ldr	r3, .L1629
+	ldr	r0, .L1629+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1628+8
+	ldr	r3, .L1629+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1628+12
+	ldr	r3, .L1629+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1628+16
+	ldr	r3, .L1629+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L1628+20
+	ldr	r3, .L1629+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L1628+24
+	ldr	r3, .L1629+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L1628+28
+	ldr	r3, .L1629+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1629:
+.L1630:
 	.align	2
-.L1628:
+.L1629:
 	.word	.LANCHOR27
 	.word	.LANCHOR161
 	.word	.LANCHOR35
@@ -12168,13 +12180,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1631
+	ldr	r0, .L1632
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1632:
+.L1633:
 	.align	2
-.L1631:
+.L1632:
 	.word	.LANCHOR129
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
@@ -12190,27 +12202,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1646
+	ldr	r4, .L1647
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L1646+4
+	ldr	r3, .L1647+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1646+8
+	ldr	r3, .L1647+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1634
-.L1636:
+	bne	.L1635
+.L1637:
 	mov	r6, #-1
-.L1633:
+.L1634:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1634:
+.L1635:
 	bl	FtlLoadSysInfo
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1636
+	bne	.L1637
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12220,40 +12232,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1646+12
+	ldr	r3, .L1647+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1646+16
+	ldr	r3, .L1647+16
 	ldr	r2, [r3]
 	mov	r3, r6
-.L1637:
+.L1638:
 	cmp	r3, r1
-	bge	.L1642
+	bge	.L1643
 	mla	r5, r0, r3, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	bge	.L1638
-.L1642:
-	ldr	r0, .L1646+20
+	bge	.L1639
+.L1643:
+	ldr	r0, .L1647+20
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L1644
-.L1639:
-	ldr	r5, .L1646+24
-	ldr	r4, .L1646+28
+	bge	.L1645
+.L1640:
+	ldr	r5, .L1647+24
+	ldr	r4, .L1647+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1646+32
+	ldr	r3, .L1647+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1646+36
+	ldr	r0, .L1647+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r7, [r4, #4]
 	ldrh	r3, [r0]
@@ -12269,27 +12281,27 @@ FtlSysBlkInit:
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
 	strh	r2, [r4, #2]	@ movhi
-	ldr	r2, .L1646+40
+	ldr	r2, .L1647+40
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1645:
+.L1646:
 	bl	FtlVpcTblFlush
-	b	.L1633
-.L1638:
+	b	.L1634
+.L1639:
 	adds	r3, r3, #1
-	b	.L1637
-.L1644:
+	b	.L1638
+.L1645:
 	ldrh	r3, [r4]
 	cmp	r3, #0
-	bne	.L1639
+	bne	.L1640
 	bl	l2p_flush
-	b	.L1645
-.L1647:
+	b	.L1646
+.L1648:
 	.align	2
-.L1646:
+.L1647:
 	.word	.LANCHOR156
 	.word	.LANCHOR4
 	.word	.LANCHOR139
@@ -12315,64 +12327,64 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r2, .L1672
-	ldr	r6, .L1672+4
+	ldr	r2, .L1673
+	ldr	r6, .L1673+4
 	str	r3, [r2]
-	ldr	r5, .L1672+8
-	ldr	r2, .L1672+12
+	ldr	r5, .L1673+8
+	ldr	r2, .L1673+12
 	ldrh	r0, [r6]
 	str	r3, [r5]
 	str	r3, [r2]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1649
+	cbz	r0, .L1650
 	bl	FtlMakeBbt
-.L1649:
-	ldr	r3, .L1672+16
-	ldr	r2, .L1672+20
-	ldr	ip, .L1672+104
+.L1650:
+	ldr	r3, .L1673+16
+	ldr	r2, .L1673+20
+	ldr	ip, .L1673+104
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1672+24
+	ldr	r2, .L1673+24
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1650:
+.L1651:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1651
-	ldr	r3, .L1672+28
+	blt	.L1652
+	ldr	r3, .L1673+28
 	movs	r7, #0
-	ldr	r10, .L1672+108
+	ldr	r10, .L1673+108
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1652:
+.L1653:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1653
-	ldr	r4, .L1672+32
+	bhi	.L1654
+	ldr	r4, .L1673+32
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1654
-.L1658:
+	bgt	.L1655
+.L1659:
 	movs	r6, #0
 	mov	r7, r6
-.L1655:
+.L1656:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1659
+	bhi	.L1660
 	ldrh	r2, [fp]
-	ldr	r3, .L1672+36
+	ldr	r3, .L1673+36
 	ldrh	r4, [r4]
-	ldr	r6, .L1672+40
+	ldr	r6, .L1673+40
 	str	r2, [r3]
-	ldr	r3, .L1672+44
+	ldr	r3, .L1673+44
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -12382,13 +12394,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1672+48
+	ldr	r0, .L1673+48
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1660
+	ble	.L1661
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -12400,11 +12412,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1660:
-	ldr	r2, .L1672+52
+.L1661:
+	ldr	r2, .L1673+52
 	ldrh	r2, [r2]
-	cbz	r2, .L1662
-	ldr	r1, .L1672+48
+	cbz	r2, .L1663
+	ldr	r1, .L1673+48
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -12415,24 +12427,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1662:
+.L1663:
 	ldr	r3, [sp]
-	ldr	r7, .L1672+56
-	ldr	r10, .L1672+112
+	ldr	r7, .L1673+56
+	ldr	r10, .L1673+112
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1672+60
+	ldr	r3, .L1673+60
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1672+64
+	ldr	r6, .L1673+64
 	muls	r4, r3, r4
-	ldr	r3, .L1672+68
+	ldr	r3, .L1673+68
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -12441,13 +12453,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1672+72
+	ldr	r2, .L1673+72
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1672+76
+	ldr	r2, .L1673+76
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -12458,30 +12470,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1672+80
+	ldr	r3, .L1673+80
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1664:
+.L1665:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1665
+	bne	.L1666
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1664
-.L1651:
+	b	.L1665
+.L1652:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1650
-.L1653:
+	b	.L1651
+.L1654:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12489,11 +12501,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1652
-.L1654:
+	b	.L1653
+.L1655:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1672+84
+	ldr	r3, .L1673+84
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -12501,26 +12513,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1656:
+.L1657:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1658
+	bls	.L1659
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1656
-.L1659:
+	b	.L1657
+.L1660:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1655
-.L1665:
+	b	.L1656
+.L1666:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1672+88
+	ldr	r4, .L1673+88
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -12536,19 +12548,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1666:
+.L1667:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1667
+	cbnz	r3, .L1668
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1666
-.L1667:
+	b	.L1667
+.L1668:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -12557,10 +12569,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1672+92
+	ldr	r3, .L1673+92
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1672+96
+	ldr	r3, .L1673+96
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -12573,18 +12585,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1668
-	ldr	r3, .L1672+100
+	cbnz	r0, .L1669
+	ldr	r3, .L1673+100
 	movs	r2, #1
 	str	r2, [r3]
-.L1668:
+.L1669:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1673:
+.L1674:
 	.align	2
-.L1672:
+.L1673:
 	.word	.LANCHOR83
 	.word	.LANCHOR4
 	.word	.LANCHOR82
@@ -12628,40 +12640,40 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r3, #-1
-	ldr	r4, .L1686
+	ldr	r4, .L1687
 	movs	r6, #0
-	ldr	r1, .L1686+4
-	ldr	r0, .L1686+8
+	ldr	r1, .L1687+4
+	ldr	r0, .L1687+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1686+12
+	ldr	r0, .L1687+12
 	bl	FtlConstantsInit
-	ldr	r5, .L1686+16
+	ldr	r5, .L1687+16
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1686+20
+	ldr	r3, .L1687+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.L1675:
+.L1676:
 	bl	FtlLoadBbt
-	cbz	r0, .L1676
-.L1685:
+	cbz	r0, .L1677
+.L1686:
 	ldr	r3, [r5]
 	cmp	r3, #1
-	bne	.L1675
+	bne	.L1676
 	str	r6, [r5]
 	bl	ftl_low_format
-	b	.L1675
-.L1676:
+	b	.L1676
+.L1677:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1685
+	bne	.L1686
 	movs	r3, #1
 	str	r3, [r4]
 	pop	{r4, r5, r6, pc}
-.L1687:
+.L1688:
 	.align	2
-.L1686:
+.L1687:
 	.word	.LANCHOR166
 	.word	.LC49
 	.word	.LC38
@@ -12688,33 +12700,33 @@ FtlWriteToIDB:
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	ldr	r5, .L1758
-	bls	.L1689
+	ldr	r5, .L1759
+	bls	.L1690
 	cmp	r0, #576
-	bcc	.L1690
-.L1689:
+	bcc	.L1691
+.L1690:
 	ldr	r3, [r5]
-	cbnz	r3, .L1691
-.L1757:
+	cbnz	r3, .L1692
+.L1758:
 	movs	r4, #0
-	b	.L1688
-.L1691:
-	ldr	r3, .L1758+4
+	b	.L1689
+.L1692:
+	ldr	r3, .L1759+4
 	ldr	r3, [r3]
 	ldr	r2, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1758+8
+	ldr	r3, .L1759+8
 	cmp	r2, r3
-	bne	.L1693
-	ldr	r3, .L1758+12
+	bne	.L1694
+	ldr	r3, .L1759+12
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [sp, #12]
 	add	r0, r3, #262144
 	movw	r3, #65535
-.L1697:
+.L1698:
 	ldr	r4, [r0, #-4]
-	cbnz	r4, .L1694
+	cbnz	r4, .L1695
 	ldr	r4, [sp, #12]
 	subs	r3, r3, #1
 	ldr	r4, [r4, r2, lsl #2]
@@ -12724,18 +12736,18 @@ FtlWriteToIDB:
 	movhi	r2, #0
 	cmp	r3, #4096
 	str	r4, [r0, #-4]!
-	bne	.L1697
+	bne	.L1698
 	mov	r3, #512
-	b	.L1754
-.L1694:
+	b	.L1755
+.L1695:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1754:
+.L1755:
 	str	r3, [sp, #16]
 	lsls	r1, r1, #2
 	ldr	r3, [sp, #16]
 	uxth	r1, r1
-	ldr	r4, .L1758+16
+	ldr	r4, .L1759+16
 	adds	r0, r3, #4
 	bl	__aeabi_uidiv
 	adds	r3, r0, #1
@@ -12746,53 +12758,53 @@ FtlWriteToIDB:
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [sp, #20]
-.L1719:
-	ldr	r3, .L1758+20
+.L1720:
+	ldr	r3, .L1759+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	ldrh	r6, [r3, #10]
 	ldr	r3, [r4, #16]
 	mul	fp, r10, r6
 	cmp	r3, #0
-	beq	.L1727
+	beq	.L1728
 	ldr	r3, [r4, #20]
 	cmp	r3, #0
 	ite	eq
 	moveq	r3, #6
 	movne	r3, #9
-.L1755:
+.L1756:
 	str	r3, [sp, #28]
 	mov	r1, fp
-	ldr	r3, .L1758+16
+	ldr	r3, .L1759+16
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
 	ldr	r3, [sp, #24]
 	cmp	r3, #1
-	beq	.L1699
-	ldr	r3, .L1758+16
+	beq	.L1700
+	ldr	r3, .L1759+16
 	add	r1, r6, fp
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
-.L1699:
+.L1700:
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1729
-	ldr	r3, .L1758+20
+	bne	.L1730
+	ldr	r3, .L1759+20
 	mov	r2, #1024
 	movs	r1, #0
 	ldr	r5, [r3]
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r2, #4
-	ldr	r3, .L1758+24
+	ldr	r3, .L1759+24
 	strb	r2, [r5, #17]
 	movs	r1, #12
-	ldr	r2, .L1758+12
+	ldr	r2, .L1759+12
 	adds	r0, r5, r1
 	str	r3, [r5]
 	movs	r3, #0
@@ -12807,7 +12819,7 @@ FtlWriteToIDB:
 	strh	r3, [r5, #22]	@ movhi
 	bl	js_hash
 	str	r0, [r5, #8]
-.L1700:
+.L1701:
 	ldr	r3, [sp, #24]
 	mov	r8, fp
 	muls	r3, r6, r3
@@ -12815,10 +12827,10 @@ FtlWriteToIDB:
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #12]
 	str	r3, [sp, #32]
-.L1701:
+.L1702:
 	ldr	r3, [sp, #40]
 	cmp	r6, r3
-	beq	.L1708
+	beq	.L1709
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
 	itet	ne
@@ -12829,10 +12841,10 @@ FtlWriteToIDB:
 	movw	r3, #61424
 	str	r3, [sp, #52]
 	cmp	r6, #0
-	bne	.L1704
+	bne	.L1705
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1704
+	bne	.L1705
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12842,40 +12854,40 @@ FtlWriteToIDB:
 	mov	r0, r6
 	ldr	r7, [r4, #8]
 	blx	r7
-	ldr	r2, .L1758+12
+	ldr	r2, .L1759+12
 	str	r0, [sp, #44]
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1705
-.L1708:
-	ldr	r3, .L1758+20
+	bne	.L1706
+.L1709:
+	ldr	r3, .L1759+20
 	ldr	r2, [r4, #16]
 	ldr	r6, [r3]
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	ldrh	r3, [r3, #10]
 	mul	r8, r10, r3
 	cmp	r2, #0
-	bne	.L1706
+	bne	.L1707
 	mov	fp, #6
-.L1707:
+.L1708:
 	ldr	r2, [sp, #24]
 	movs	r5, #0
 	muls	r3, r2, r3
 	str	r3, [sp, #32]
-.L1710:
+.L1711:
 	ldr	r3, [sp, #32]
 	cmp	r5, r3
-	beq	.L1714
+	beq	.L1715
 	cmp	r5, #0
-	bne	.L1711
+	bne	.L1712
 	cmp	fp, #9
-	bne	.L1711
+	bne	.L1712
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12891,77 +12903,77 @@ FtlWriteToIDB:
 	ldr	r3, [r4, #20]
 	ldr	r0, [sp, #28]
 	blx	r3
-	ldr	r2, .L1758+12
+	ldr	r2, .L1759+12
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r3, [r6]
-	ldr	r2, .L1758+24
+	ldr	r2, .L1759+24
 	cmp	r3, r2
-	beq	.L1712
-.L1714:
-	ldr	r3, .L1758+20
+	beq	.L1713
+.L1715:
+	ldr	r3, .L1759+20
 	movs	r5, #0
 	ldr	r1, [sp, #12]
 	ldr	r0, [r3]
-.L1713:
+.L1714:
 	mov	r8, r1
 	ldr	r2, [r0, r5, lsl #2]
 	ldr	r3, [r8]
 	lsls	r6, r5, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1716
+	beq	.L1717
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1758+20
+	ldr	r3, .L1759+20
 	mov	r1, r10
-	ldr	r0, .L1758+28
+	ldr	r0, .L1759+28
 	ldr	r2, [r3]
 	str	r5, [sp]
 	ldr	r3, [r8]
 	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r3, .L1758+12
+	ldr	r3, .L1759+12
 	movs	r0, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [r4, #4]
 	mul	r1, r10, r1
 	blx	r3
-.L1717:
+.L1718:
 	ldr	r3, [sp, #24]
 	add	r10, r10, r3
 	cmp	r10, #15
-	bls	.L1719
+	bls	.L1720
 	ldr	r3, [sp, #20]
-	cbnz	r3, .L1720
-.L1693:
+	cbnz	r3, .L1721
+.L1694:
 	mov	r3, #-1
 	str	r3, [sp, #16]
-.L1720:
-	ldr	r3, .L1758
+.L1721:
+	ldr	r3, .L1759
 	movs	r2, #0
 	ldr	r4, [sp, #16]
 	str	r2, [r3]
-	ldr	r3, .L1758+4
+	ldr	r3, .L1759+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1758+20
+	ldr	r3, .L1759+20
 	ldr	r0, [r3]
 	bl	free
-.L1688:
+.L1689:
 	mov	r0, r4
 	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1727:
+.L1728:
 	movs	r3, #6
-	b	.L1755
-.L1729:
+	b	.L1756
+.L1730:
 	movs	r5, #0
-	b	.L1700
-.L1704:
+	b	.L1701
+.L1705:
 	add	r3, sp, #48
 	ldr	r2, [sp, #32]
 	mov	r1, r8
@@ -12969,22 +12981,22 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #8]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1708
+	beq	.L1709
 	ldr	r3, [sp, #32]
 	add	r3, r3, #2048
 	str	r3, [sp, #32]
-.L1705:
+.L1706:
 	adds	r6, r6, #1
 	add	r8, r8, #1
-	b	.L1701
-.L1706:
+	b	.L1702
+.L1707:
 	ldr	r2, [r4, #20]
 	cmp	r2, #0
 	ite	eq
 	moveq	fp, #6
 	movne	fp, #9
-	b	.L1707
-.L1711:
+	b	.L1708
+.L1712:
 	add	r3, sp, #48
 	mov	r2, r6
 	add	r1, r8, r5
@@ -12992,18 +13004,18 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #12]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1714
+	beq	.L1715
 	ldr	r2, [sp, #52]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1714
+	bne	.L1715
 	add	r6, r6, #2048
-.L1712:
+.L1713:
 	adds	r5, r5, #1
-	b	.L1710
-.L1759:
+	b	.L1711
+.L1760:
 	.align	2
-.L1758:
+.L1759:
 	.word	.LANCHOR182
 	.word	.LANCHOR183
 	.word	-52655045
@@ -13012,45 +13024,45 @@ FtlWriteToIDB:
 	.word	.LANCHOR184
 	.word	1179535694
 	.word	.LC50
-.L1716:
+.L1717:
 	ldr	r3, [sp, #36]
 	adds	r5, r5, #1
 	cmp	r5, r3
-	bne	.L1713
+	bne	.L1714
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #20]
-	bls	.L1717
-	b	.L1720
-.L1690:
+	bls	.L1718
+	b	.L1721
+.L1691:
 	cmp	r0, #64
-	bne	.L1721
-	ldr	fp, .L1760+4
+	bne	.L1722
+	ldr	fp, .L1761+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1760
+	ldr	r3, .L1761
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1722
-	cbz	r0, .L1722
+	cbz	r3, .L1723
+	cbz	r0, .L1723
 	movs	r2, #1
 	movs	r1, #0
 	str	r2, [r5]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1721:
+.L1722:
 	ldr	r3, [r5]
 	cmp	r3, #0
-	beq	.L1757
-	ldr	r3, .L1760+4
+	beq	.L1758
+	ldr	r3, .L1761+4
 	cmp	r4, #63
 	iteee	hi
-	ldrhi	r5, .L1760+8
+	ldrhi	r5, .L1761+8
 	rsbls	r4, r4, #64
 	subls	r6, r6, r4
 	addls	r7, r7, r4, lsl #9
@@ -13058,7 +13070,7 @@ FtlWriteToIDB:
 	mov	r2, #262144
 	it	hi
 	addhi	r5, r5, r4
-	ldr	r0, .L1760+12
+	ldr	r0, .L1761+12
 	ite	ls
 	movls	r5, r1
 	addhi	r5, r1, r5, lsl #9
@@ -13073,15 +13085,15 @@ FtlWriteToIDB:
 	mov	r1, r7
 	mov	r0, r5
 	bl	ftl_memcpy
-	b	.L1757
-.L1722:
-	ldr	r1, .L1760+16
-	ldr	r0, .L1760+20
+	b	.L1758
+.L1723:
+	ldr	r1, .L1761+16
+	ldr	r0, .L1761+20
 	bl	printf
-	b	.L1721
-.L1761:
+	b	.L1722
+.L1762:
 	.align	2
-.L1760:
+.L1761:
 	.word	.LANCHOR184
 	.word	.LANCHOR183
 	.word	8388544
@@ -14435,215 +14447,215 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10006,"a",%progbits
+	.section	.rodata.__func__.10001,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10006, %object
-	.size	__func__.10006, 23
-__func__.10006:
+	.type	__func__.10001, %object
+	.size	__func__.10001, 23
+__func__.10001:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10278,"a",%progbits
+	.section	.rodata.__func__.10273,"a",%progbits
 	.set	.LANCHOR137,. + 0
-	.type	__func__.10278, %object
-	.size	__func__.10278, 15
-__func__.10278:
+	.type	__func__.10273, %object
+	.size	__func__.10273, 15
+__func__.10273:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10297,"a",%progbits
+	.section	.rodata.__func__.10292,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.10297, %object
-	.size	__func__.10297, 15
-__func__.10297:
+	.type	__func__.10292, %object
+	.size	__func__.10292, 15
+__func__.10292:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10321,"a",%progbits
+	.section	.rodata.__func__.10316,"a",%progbits
 	.set	.LANCHOR77,. + 0
-	.type	__func__.10321, %object
-	.size	__func__.10321, 17
-__func__.10321:
+	.type	__func__.10316, %object
+	.size	__func__.10316, 17
+__func__.10316:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10436,"a",%progbits
+	.section	.rodata.__func__.10431,"a",%progbits
 	.set	.LANCHOR185,. + 0
-	.type	__func__.10436, %object
-	.size	__func__.10436, 14
-__func__.10436:
+	.type	__func__.10431, %object
+	.size	__func__.10431, 14
+__func__.10431:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8930,"a",%progbits
+	.section	.rodata.__func__.8925,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.8930, %object
-	.size	__func__.8930, 13
-__func__.8930:
+	.type	__func__.8925, %object
+	.size	__func__.8925, 13
+__func__.8925:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8958,"a",%progbits
+	.section	.rodata.__func__.8953,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.8958, %object
-	.size	__func__.8958, 9
-__func__.8958:
+	.type	__func__.8953, %object
+	.size	__func__.8953, 9
+__func__.8953:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9033,"a",%progbits
+	.section	.rodata.__func__.9028,"a",%progbits
 	.set	.LANCHOR128,. + 0
-	.type	__func__.9033, %object
-	.size	__func__.9033, 14
-__func__.9033:
+	.type	__func__.9028, %object
+	.size	__func__.9028, 14
+__func__.9028:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9068,"a",%progbits
+	.section	.rodata.__func__.9063,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9068, %object
-	.size	__func__.9068, 11
-__func__.9068:
+	.type	__func__.9063, %object
+	.size	__func__.9063, 11
+__func__.9063:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9183,"a",%progbits
+	.section	.rodata.__func__.9178,"a",%progbits
 	.set	.LANCHOR49,. + 0
+	.type	__func__.9178, %object
+	.size	__func__.9178, 17
+__func__.9178:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.9183,"a",%progbits
+	.set	.LANCHOR45,. + 0
 	.type	__func__.9183, %object
 	.size	__func__.9183, 17
 __func__.9183:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9188,"a",%progbits
-	.set	.LANCHOR45,. + 0
-	.type	__func__.9188, %object
-	.size	__func__.9188, 17
-__func__.9188:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9219,"a",%progbits
+	.section	.rodata.__func__.9214,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9219, %object
-	.size	__func__.9219, 17
-__func__.9219:
+	.type	__func__.9214, %object
+	.size	__func__.9214, 17
+__func__.9214:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9251,"a",%progbits
+	.section	.rodata.__func__.9246,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9251, %object
-	.size	__func__.9251, 22
-__func__.9251:
+	.type	__func__.9246, %object
+	.size	__func__.9246, 22
+__func__.9246:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9260,"a",%progbits
+	.section	.rodata.__func__.9255,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9260, %object
-	.size	__func__.9260, 16
-__func__.9260:
+	.type	__func__.9255, %object
+	.size	__func__.9255, 16
+__func__.9255:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9293,"a",%progbits
+	.section	.rodata.__func__.9288,"a",%progbits
 	.set	.LANCHOR81,. + 0
-	.type	__func__.9293, %object
-	.size	__func__.9293, 26
-__func__.9293:
+	.type	__func__.9288, %object
+	.size	__func__.9288, 26
+__func__.9288:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9304,"a",%progbits
+	.section	.rodata.__func__.9299,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9304, %object
-	.size	__func__.9304, 15
-__func__.9304:
+	.type	__func__.9299, %object
+	.size	__func__.9299, 15
+__func__.9299:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9319,"a",%progbits
+	.section	.rodata.__func__.9314,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9319, %object
-	.size	__func__.9319, 31
-__func__.9319:
+	.type	__func__.9314, %object
+	.size	__func__.9314, 31
+__func__.9314:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9333,"a",%progbits
+	.section	.rodata.__func__.9328,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9333, %object
-	.size	__func__.9333, 16
-__func__.9333:
+	.type	__func__.9328, %object
+	.size	__func__.9328, 16
+__func__.9328:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9358,"a",%progbits
+	.section	.rodata.__func__.9353,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9358, %object
-	.size	__func__.9358, 22
-__func__.9358:
+	.type	__func__.9353, %object
+	.size	__func__.9353, 22
+__func__.9353:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9375,"a",%progbits
+	.section	.rodata.__func__.9370,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.9375, %object
-	.size	__func__.9375, 9
-__func__.9375:
+	.type	__func__.9370, %object
+	.size	__func__.9370, 9
+__func__.9370:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9439,"a",%progbits
+	.section	.rodata.__func__.9434,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9439, %object
-	.size	__func__.9439, 15
-__func__.9439:
+	.type	__func__.9434, %object
+	.size	__func__.9434, 15
+__func__.9434:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9461,"a",%progbits
+	.section	.rodata.__func__.9456,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9461, %object
-	.size	__func__.9461, 14
-__func__.9461:
+	.type	__func__.9456, %object
+	.size	__func__.9456, 14
+__func__.9456:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9517,"a",%progbits
+	.section	.rodata.__func__.9512,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.9517, %object
-	.size	__func__.9517, 15
-__func__.9517:
+	.type	__func__.9512, %object
+	.size	__func__.9512, 15
+__func__.9512:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9539,"a",%progbits
+	.section	.rodata.__func__.9534,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.9539, %object
-	.size	__func__.9539, 18
-__func__.9539:
+	.type	__func__.9534, %object
+	.size	__func__.9534, 18
+__func__.9534:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9585,"a",%progbits
+	.section	.rodata.__func__.9580,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9585, %object
-	.size	__func__.9585, 16
-__func__.9585:
+	.type	__func__.9580, %object
+	.size	__func__.9580, 16
+__func__.9580:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9619,"a",%progbits
+	.section	.rodata.__func__.9614,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9619, %object
-	.size	__func__.9619, 22
-__func__.9619:
+	.type	__func__.9614, %object
+	.size	__func__.9614, 22
+__func__.9614:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9676,"a",%progbits
+	.section	.rodata.__func__.9671,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9676, %object
-	.size	__func__.9676, 16
-__func__.9676:
+	.type	__func__.9671, %object
+	.size	__func__.9671, 16
+__func__.9671:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9697,"a",%progbits
+	.section	.rodata.__func__.9692,"a",%progbits
 	.set	.LANCHOR136,. + 0
-	.type	__func__.9697, %object
-	.size	__func__.9697, 18
-__func__.9697:
+	.type	__func__.9692, %object
+	.size	__func__.9692, 18
+__func__.9692:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9724,"a",%progbits
+	.section	.rodata.__func__.9719,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9724, %object
-	.size	__func__.9724, 14
-__func__.9724:
+	.type	__func__.9719, %object
+	.size	__func__.9719, 14
+__func__.9719:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9789,"a",%progbits
+	.section	.rodata.__func__.9784,"a",%progbits
 	.set	.LANCHOR144,. + 0
-	.type	__func__.9789, %object
-	.size	__func__.9789, 25
-__func__.9789:
+	.type	__func__.9784, %object
+	.size	__func__.9784, 25
+__func__.9784:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9810,"a",%progbits
+	.section	.rodata.__func__.9805,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9810, %object
-	.size	__func__.9810, 29
-__func__.9810:
+	.type	__func__.9805, %object
+	.size	__func__.9805, 29
+__func__.9805:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9817,"a",%progbits
+	.section	.rodata.__func__.9812,"a",%progbits
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9817, %object
-	.size	__func__.9817, 19
-__func__.9817:
+	.type	__func__.9812, %object
+	.size	__func__.9812, 19
+__func__.9812:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9830,"a",%progbits
+	.section	.rodata.__func__.9825,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9830, %object
-	.size	__func__.9830, 16
-__func__.9830:
+	.type	__func__.9825, %object
+	.size	__func__.9825, 16
+__func__.9825:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9837,"a",%progbits
+	.section	.rodata.__func__.9832,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.9837, %object
-	.size	__func__.9837, 20
-__func__.9837:
+	.type	__func__.9832, %object
+	.size	__func__.9832, 20
+__func__.9832:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9907,"a",%progbits
+	.section	.rodata.__func__.9902,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.9907, %object
-	.size	__func__.9907, 19
-__func__.9907:
+	.type	__func__.9902, %object
+	.size	__func__.9902, 19
+__func__.9902:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC21:
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 8298fdd27c..f1ec64e811 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2019-02-20
+ * date: 2019-04-19
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -110,56 +110,57 @@ FtlSysBlkNumInit:
 FtlConstantsInit:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x0
-	adrp	x1, .LANCHOR11
-	adrp	x6, .LANCHOR12
+	adrp	x2, .LANCHOR11
+	adrp	x1, .LANCHOR6
 	add	x29, sp, 0
 	ldrh	w3, [x0]
 	adrp	x0, .LANCHOR9
 	ldrh	w4, [x5, 2]
+	adrp	x6, .LANCHOR12
 	strh	w3, [x0, #:lo12:.LANCHOR9]
 	adrp	x0, .LANCHOR10
 	ldrh	w7, [x5, 14]
 	strh	w4, [x0, #:lo12:.LANCHOR10]
-	ldrh	w0, [x5, 4]
+	ldrh	w8, [x5, 4]
 	cmp	w7, 4
-	strh	w0, [x1, #:lo12:.LANCHOR11]
-	adrp	x1, .LANCHOR6
-	ldrh	w2, [x5, 6]
-	strh	w2, [x1, #:lo12:.LANCHOR6]
+	ldrh	w0, [x5, 6]
+	strh	w8, [x2, #:lo12:.LANCHOR11]
+	strh	w0, [x1, #:lo12:.LANCHOR6]
 	strh	w7, [x6, #:lo12:.LANCHOR12]
 	bne	.L10
-	lsr	w2, w2, 1
-	strh	w2, [x1, #:lo12:.LANCHOR6]
-	mov	w2, 8
-	strh	w2, [x6, #:lo12:.LANCHOR12]
-.L10:
+	lsr	w0, w0, 1
+	strh	w0, [x1, #:lo12:.LANCHOR6]
+	mov	w0, 8
+	strh	w0, [x6, #:lo12:.LANCHOR12]
+.L11:
 	adrp	x7, .LANCHOR13
 	add	x7, x7, :lo12:.LANCHOR13
-	mov	x2, 0
-.L11:
-	strb	w2, [x2, x7]
-	add	x2, x2, 1
-	cmp	x2, 32
-	bne	.L11
-	adrp	x2, .LANCHOR14
+	mov	x0, 0
+.L12:
+	strb	w0, [x0, x7]
+	add	x0, x0, 1
+	cmp	x0, 32
+	bne	.L12
+	adrp	x0, .LANCHOR14
 	mov	w7, 5
 	cmp	w3, 1
-	strh	w7, [x2, #:lo12:.LANCHOR14]
+	strh	w7, [x0, #:lo12:.LANCHOR14]
 	adrp	x7, .LANCHOR15
 	strh	wzr, [x7, #:lo12:.LANCHOR15]
-	bne	.L12
-	strh	w3, [x2, #:lo12:.LANCHOR14]
-.L12:
-	adrp	x2, .LANCHOR16
+	bne	.L13
+	strh	w3, [x0, #:lo12:.LANCHOR14]
+.L13:
+	adrp	x0, .LANCHOR16
 	mov	w3, 640
-	mul	w4, w4, w0
-	strh	w3, [x2, #:lo12:.LANCHOR16]
+	strh	w3, [x0, #:lo12:.LANCHOR16]
+	ldrh	w0, [x2, #:lo12:.LANCHOR11]
 	adrp	x2, .LANCHOR3
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
-	and	w4, w4, 65535
 	adrp	x1, .LANCHOR17
-	strh	w4, [x2, #:lo12:.LANCHOR3]
+	mul	w4, w4, w0
 	mul	w0, w0, w3
+	and	w4, w4, 65535
+	strh	w4, [x2, #:lo12:.LANCHOR3]
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
 	bl	Ftl_log2
@@ -203,8 +204,8 @@ FtlConstantsInit:
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L13
-.L19:
+	bls	.L14
+.L20:
 	strh	w0, [x5, #:lo12:.LANCHOR27]
 	adrp	x1, .LANCHOR28
 	mov	w0, 640
@@ -227,8 +228,8 @@ FtlConstantsInit:
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L15
-.L20:
+	beq	.L16
+.L21:
 	str	w3, [x6, #:lo12:.LANCHOR2]
 	ldrh	w0, [x6, #:lo12:.LANCHOR2]
 	bl	FtlSysBlkNumInit
@@ -260,12 +261,22 @@ FtlConstantsInit:
 	str	w0, [x4, #:lo12:.LANCHOR30]
 	mov	w0, 0
 	ret
-.L13:
+.L10:
+	cmp	w7, 8
+	bne	.L11
+	cmp	w8, 1
+	bne	.L11
+	lsr	w0, w0, 1
+	strh	w0, [x1, #:lo12:.LANCHOR6]
+	mov	w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR11]
+	b	.L11
+.L14:
 	mov	w0, 4
-	b	.L19
-.L15:
-	add	w3, w3, 4
 	b	.L20
+.L16:
+	add	w3, w3, 4
+	b	.L21
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
@@ -275,24 +286,24 @@ IsBlkInVendorPart:
 	adrp	x1, .LANCHOR35
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
-	cbz	w1, .L25
+	cbz	w1, .L26
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
 	adrp	x1, .LANCHOR36
 	ldr	x3, [x1, #:lo12:.LANCHOR36]
 	mov	x1, 0
-.L23:
+.L24:
 	cmp	w2, w1, uxth
-	bhi	.L24
-.L25:
+	bhi	.L25
+.L26:
 	mov	w0, 0
 	ret
-.L24:
+.L25:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L23
+	bne	.L24
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -434,12 +445,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L37
+	bls	.L38
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L37:
+.L38:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -475,7 +486,7 @@ FtlFreeSysBLkSort:
 	adrp	x0, .LANCHOR38
 	add	x1, x0, :lo12:.LANCHOR38
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L41
+	cbz	w2, .L42
 	adrp	x2, .LANCHOR39+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -483,16 +494,16 @@ FtlFreeSysBLkSort:
 	ldrh	w5, [x2, #:lo12:.LANCHOR39+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L43:
+.L44:
 	cmp	w5, w4
-	bgt	.L44
-	cbz	w6, .L41
+	bgt	.L45
+	cbz	w6, .L42
 	add	x0, x0, :lo12:.LANCHOR38
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L41:
+.L42:
 	ret
-.L44:
+.L45:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -504,7 +515,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L43
+	b	.L44
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",@progbits
 	.align	2
@@ -516,25 +527,25 @@ IsInFreeQueue:
 	and	w0, w0, 65535
 	ldrh	w4, [x1, 6]
 	cmp	w4, 1024
-	beq	.L54
+	beq	.L55
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.L52:
+.L53:
 	cmp	w3, w4
-	bcc	.L53
-.L54:
+	bcc	.L54
+.L55:
 	mov	w0, 0
 	ret
-.L53:
+.L54:
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
-	beq	.L55
+	beq	.L56
 	add	w3, w3, 1
-	b	.L52
-.L55:
+	b	.L53
+.L56:
 	mov	w0, 1
 	ret
 	.size	IsInFreeQueue, .-IsInFreeQueue
@@ -547,7 +558,7 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w12, [x1, #:lo12:.LANCHOR5]
 	cmp	w12, w0
-	bls	.L58
+	bls	.L59
 	adrp	x1, .LANCHOR40
 	mov	w8, 6
 	ldr	x4, [x1, #:lo12:.LANCHOR40]
@@ -559,12 +570,12 @@ insert_data_list:
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
 	ldr	x7, [x1, #:lo12:.LANCHOR41]
-	cbnz	x7, .L59
+	cbnz	x7, .L60
 	str	x3, [x1, #:lo12:.LANCHOR41]
-.L58:
+.L59:
 	mov	w0, 0
 	ret
-.L59:
+.L60:
 	adrp	x1, .LANCHOR42
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -582,48 +593,48 @@ insert_data_list:
 	mul	x1, x1, x2
 	mov	x2, x7
 	and	w1, w1, 65535
-.L64:
+.L65:
 	add	w6, w6, 1
 	and	w6, w6, 65535
 	cmp	w12, w6
-	bcc	.L58
+	bcc	.L59
 	cmp	w1, w0
-	beq	.L58
+	beq	.L59
 	ldrh	w14, [x2, 4]
-	cbz	w14, .L62
+	cbz	w14, .L63
 	ubfiz	x11, x1, 1, 16
 	ldrh	w11, [x13, x11]
 	mul	w11, w11, w14
 	cmp	w5, w11
-	bls	.L62
+	bls	.L63
 	ldrh	w11, [x2]
 	cmp	w11, w16
-	bne	.L63
+	bne	.L64
 	strh	w1, [x3, 2]
 	strh	w0, [x2]
 	adrp	x0, .LANCHOR43
 	str	x3, [x0, #:lo12:.LANCHOR43]
-	b	.L58
-.L63:
+	b	.L59
+.L64:
 	umaddl	x2, w11, w8, x4
 	mov	w1, w11
-	b	.L64
-.L62:
+	b	.L65
+.L63:
 	strh	w1, [x4, x10]
 	cmp	x2, x7
 	ldrh	w1, [x2, 2]
 	strh	w1, [x3, 2]
-	bne	.L65
+	bne	.L66
 	strh	w0, [x2, 2]
 	str	x3, [x15, #:lo12:.LANCHOR41]
-	b	.L58
-.L65:
+	b	.L59
+.L66:
 	ldrh	w1, [x2, 2]
 	mov	w3, 6
 	umull	x1, w1, w3
 	strh	w0, [x4, x1]
 	strh	w0, [x2, 2]
-	b	.L58
+	b	.L59
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -641,7 +652,7 @@ INSERT_DATA_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L70
+	bcs	.L71
 	ldp	x29, x30, [sp], 16
 	mov	w2, 214
 	adrp	x1, .LANCHOR45
@@ -649,7 +660,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LANCHOR45
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L70:
+.L71:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -661,7 +672,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L74
+	beq	.L75
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
@@ -673,12 +684,12 @@ insert_free_list:
 	adrp	x1, .LANCHOR46
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	cbnz	x5, .L75
+	cbnz	x5, .L76
 	str	x4, [x1, #:lo12:.LANCHOR46]
-.L74:
+.L75:
 	mov	w0, 0
 	ret
-.L75:
+.L76:
 	adrp	x1, .LANCHOR47
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -690,37 +701,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L78:
+.L79:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L76
+	bcs	.L77
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L77
+	bne	.L78
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L74
-.L77:
+	b	.L75
+.L78:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L78
-.L76:
+	b	.L79
+.L77:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L79
+	bne	.L80
 	strh	w0, [x2, 2]
 	str	x4, [x12, #:lo12:.LANCHOR46]
-	b	.L74
-.L79:
+	b	.L75
+.L80:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L74
+	b	.L75
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -738,7 +749,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L80
+	bcs	.L81
 	ldp	x29, x30, [sp], 16
 	mov	w2, 207
 	adrp	x1, .LANCHOR49
@@ -746,7 +757,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L80:
+.L81:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -770,26 +781,26 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L84
+	bne	.L85
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L84
+	beq	.L85
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L84:
+.L85:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L85
-	cmp	w0, w1
 	bne	.L86
+	cmp	w0, w1
+	bne	.L87
 	str	xzr, [x22]
-.L87:
+.L88:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -799,27 +810,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L86:
+.L87:
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L87
-.L85:
+	b	.L88
+.L86:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L88
+	bne	.L89
 	cmp	w1, w0
-	beq	.L87
+	beq	.L88
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L87
-.L88:
+	b	.L88
+.L89:
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -827,7 +838,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L87
+	b	.L88
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -835,7 +846,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L96
+	cbz	x2, .L97
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
@@ -844,9 +855,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.L92:
-	cbnz	w1, .L93
-.L95:
+.L93:
+	cbnz	w1, .L94
+.L96:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -859,15 +870,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L93:
+.L94:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L95
+	beq	.L96
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L92
-.L96:
+	b	.L93
+.L97:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -887,26 +898,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR41
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	cbz	x1, .L107
+	cbz	x1, .L108
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 65535
-.L104:
-	cbz	w2, .L105
+.L105:
+	cbz	w2, .L106
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L106
+	bne	.L107
 	ret
-.L106:
+.L107:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L104
-.L107:
+	b	.L105
+.L108:
 	mov	w0, 65535
 	ret
-.L105:
+.L106:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -930,15 +941,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L110
+	beq	.L111
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L110
+	beq	.L111
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L110
+	beq	.L111
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
 	adrp	x24, .LANCHOR41
@@ -948,7 +959,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L110
+	beq	.L111
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -961,25 +972,25 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L113
+	bne	.L114
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L113
+	bne	.L114
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L113:
+.L114:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L114
+	bne	.L115
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L110
-.L114:
+	beq	.L111
+.L115:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -995,26 +1006,26 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L110
+	bcs	.L111
 	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
-	cbnz	w0, .L116
+	cbnz	w0, .L117
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L116:
+.L117:
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR44]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L110:
+.L111:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1037,72 +1048,72 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR55
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.L121:
+.L122:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L123
+	bcc	.L124
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L124:
+.L125:
 	cmp	w1, w2
-	bne	.L126
+	bne	.L127
 	cmp	w19, w2
-	bcc	.L122
+	bcc	.L123
 	adrp	x1, .LANCHOR56
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.L127:
+.L128:
 	cmp	w1, w2
-	bne	.L129
+	bne	.L130
 	cmp	w19, w1
-	bcc	.L122
+	bcc	.L123
 	mov	w2, 789
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L122
-.L123:
+	b	.L123
+.L124:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L121
-.L122:
+	bne	.L122
+.L123:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L126:
+.L127:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L125
+	tbnz	w4, #31, .L126
 	cmp	w5, w4
-	bls	.L125
+	bls	.L126
 	mov	w5, w4
 	mov	w19, w1
-.L125:
+.L126:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L124
-.L129:
+	b	.L125
+.L130:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L128
+	bls	.L129
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L128:
+.L129:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L127
+	b	.L128
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -1113,12 +1124,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L132
-	cbnz	w0, .L132
+	bhi	.L133
+	cbnz	w0, .L133
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
 	ret
-.L132:
+.L133:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR59
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
@@ -1130,22 +1141,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L133:
+.L134:
 	cmp	w5, w1, uxth
-	bhi	.L135
-	cbz	w3, .L131
+	bhi	.L136
+	cbz	w3, .L132
 	str	w2, [x0, #:lo12:.LANCHOR59]
-.L131:
+.L132:
 	ret
-.L135:
+.L136:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L134
+	beq	.L135
 	add	w2, w2, w4
 	mov	w3, 1
-.L134:
+.L135:
 	add	x1, x1, 1
-	b	.L133
+	b	.L134
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -1153,9 +1164,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L142
+	cbz	w1, .L143
 	b	ftl_set_blk_mode.part.6
-.L142:
+.L143:
 	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -1195,9 +1206,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
-.L145:
+.L146:
 	cmp	w2, w3
-	bcc	.L147
+	bcc	.L148
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -1208,32 +1219,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L148:
+.L149:
 	cmp	x2, x3
-	bne	.L150
+	bne	.L151
 	ret
-.L147:
+.L148:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L146
+	beq	.L147
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L146:
+.L147:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L145
-.L150:
+	b	.L146
+.L151:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L149
+	beq	.L150
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L149:
+.L150:
 	add	x2, x2, 2
-	b	.L148
+	b	.L149
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -1241,38 +1252,38 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L151
+	cbz	w1, .L152
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L151
+	beq	.L152
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
 	mov	w2, w1
-.L154:
+.L155:
 	cmp	w3, w2
-	beq	.L156
-.L151:
+	beq	.L157
+.L152:
 	ret
-.L156:
+.L157:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L155
+	bne	.L156
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L155:
+.L156:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L154
+	b	.L155
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -1287,14 +1298,14 @@ make_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L158
+	bcc	.L159
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
 	mov	w2, 2148
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L158:
+.L159:
 	adrp	x0, .LANCHOR3
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
@@ -1304,9 +1315,9 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L159:
+.L160:
 	cmp	w8, w5, uxth
-	bhi	.L161
+	bhi	.L162
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
@@ -1319,30 +1330,30 @@ make_superblock:
 	ldrh	w1, [x0, x1, lsl 1]
 	mov	w0, 10000
 	cmp	w1, w0
-	bls	.L162
+	bls	.L163
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L162:
+.L163:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L161:
+.L162:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L160
+	cbnz	w0, .L161
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L160:
+.L161:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L159
+	b	.L160
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -1359,11 +1370,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR13
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
 	cmp	w10, w7, uxth
-	bhi	.L176
-	cbz	w5, .L174
+	bhi	.L177
+	cbz	w5, .L175
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L175:
+.L176:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1371,31 +1382,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L169:
+.L170:
 	mov	w5, 0
-	b	.L168
-.L174:
+	b	.L169
+.L175:
 	mov	w5, 0
-	b	.L175
-.L176:
+	b	.L176
+.L177:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L167:
+.L168:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L166
+	cbnz	w0, .L167
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L166:
+.L167:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L167
-	cbz	w5, .L169
+	bhi	.L168
+	cbz	w5, .L170
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L168:
+.L169:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1412,7 +1423,7 @@ update_multiplier_value:
 GetFreeBlockMinEraseCount:
 	adrp	x0, .LANCHOR46
 	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	cbz	x0, .L179
+	cbz	x0, .L180
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -1425,7 +1436,7 @@ GetFreeBlockMinEraseCount:
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L179:
+.L180:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1437,7 +1448,7 @@ GetFreeBlockMaxEraseCount:
 	adrp	x1, .LANCHOR46
 	and	w0, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR46]
-	cbz	x1, .L187
+	cbz	x1, .L188
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
 	mov	w5, 6
@@ -1456,25 +1467,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L183:
+.L184:
 	cmp	w0, w2
-	beq	.L186
+	beq	.L187
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L184
-.L186:
+	bne	.L185
+.L187:
 	adrp	x0, .LANCHOR47
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	ldrh	w0, [x0, x1]
 	ret
-.L184:
+.L185:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L183
-.L187:
+	b	.L184
+.L188:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -1486,7 +1497,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L191
+	beq	.L192
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -1497,7 +1508,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L191:
+.L192:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -1514,35 +1525,35 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L195
+	bne	.L196
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2781
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L195:
+.L196:
 	adrp	x21, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x21, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L196
+	bne	.L197
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2782
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L196:
+.L197:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L197
+	cbnz	w0, .L198
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2783
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L197:
+.L198:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
@@ -1550,13 +1561,13 @@ get_new_active_ppa:
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L198:
+.L199:
 	cmp	w0, w1
-	beq	.L200
+	beq	.L201
 	ldrh	w20, [x19, 2]
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	cmp	w20, w2
-	bcs	.L204
+	bcs	.L205
 	ldrh	w1, [x19, 4]
 	orr	w20, w20, w0, lsl 10
 	ldrb	w0, [x19, 6]
@@ -1564,56 +1575,56 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L203:
+.L204:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w3, w0
-	bne	.L202
+	bne	.L203
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L202:
+.L203:
 	add	x5, x19, x0, sxtw 1
 	ldrh	w5, [x5, 16]
 	cmp	w5, w4
-	beq	.L203
+	beq	.L204
 	strb	w0, [x19, 6]
 	ldrh	w0, [x19, 2]
 	cmp	w0, w2
-	bne	.L194
-	cbz	w1, .L194
+	bne	.L195
+	cbz	w1, .L195
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
 	mov	w2, 2806
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L194:
+.L195:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L200:
+.L201:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w3
-	bne	.L199
+	bne	.L200
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L199:
+.L200:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L198
-.L204:
+	b	.L199
+.L205:
 	mov	w20, 65535
-	b	.L194
+	b	.L195
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
@@ -1644,21 +1655,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L211:
+.L212:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L212
+	bne	.L213
 	adrp	x1, .LANCHOR67
 	ldr	x7, [x7, #:lo12:.LANCHOR64]
 	ldr	x6, [x6, #:lo12:.LANCHOR65]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR67]
-.L213:
+.L214:
 	cmp	w0, w4
-	bcc	.L214
+	bcc	.L215
 	ret
-.L212:
+.L213:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -1670,8 +1681,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L211
-.L214:
+	b	.L212
+.L215:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -1685,7 +1696,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L213
+	b	.L214
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -1698,31 +1709,31 @@ FtlGcBufFree:
 	ldr	w7, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x5, [x2, #:lo12:.LANCHOR63]
-.L216:
+.L217:
 	cmp	w3, w1
-	bcs	.L215
+	bcs	.L216
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L221
-.L217:
+	b	.L222
+.L218:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L221:
+.L222:
 	cmp	w2, w7
-	bcs	.L218
+	bcs	.L219
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L217
+	bne	.L218
 	str	wzr, [x10, 16]
-.L218:
+.L219:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L216
-.L215:
+	b	.L217
+.L216:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -1737,31 +1748,31 @@ FtlGcBufAlloc:
 	ldr	w5, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x6, [x2, #:lo12:.LANCHOR63]
-.L223:
+.L224:
 	cmp	w3, w1
-	bcs	.L222
+	bcs	.L223
 	mov	w2, 0
-	b	.L228
-.L224:
+	b	.L229
+.L225:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L228:
+.L229:
 	cmp	w2, w5
-	bcs	.L225
+	bcs	.L226
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L224
+	cbnz	w10, .L225
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L225:
+.L226:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L223
-.L222:
+	b	.L224
+.L223:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -1775,17 +1786,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR69
 	ldr	x3, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
-.L230:
+.L231:
 	cmp	w2, w1, uxth
-	bhi	.L232
+	bhi	.L233
 	mov	w0, 0
 	ret
-.L232:
+.L233:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L230
+	bne	.L231
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -1807,24 +1818,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR68]
 	ldr	x5, [x2, #:lo12:.LANCHOR69]
-.L235:
+.L236:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L237
-	bne	.L236
+	bcc	.L238
+	bne	.L237
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR68]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR68]
-	b	.L236
-.L237:
+	b	.L237
+.L238:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L235
-.L236:
+	bne	.L236
+.L237:
 	adrp	x4, .LANCHOR70
 	adrp	x1, .LANCHOR71
 	mov	w3, 12
@@ -1848,23 +1859,23 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w5, [x4, #:lo12:.LANCHOR72]
 	cmp	w5, w0
-	beq	.L240
+	beq	.L241
 	adrp	x1, .LANCHOR73
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w0, w3
-	beq	.L240
+	beq	.L241
 	mov	w2, 65535
 	cmp	w5, w2
-	bne	.L241
+	bne	.L242
 	strh	w0, [x4, #:lo12:.LANCHOR72]
-.L240:
+.L241:
 	mov	w0, 0
 	ret
-.L241:
+.L242:
 	cmp	w3, w2
-	bne	.L240
+	bne	.L241
 	strh	w0, [x1, #:lo12:.LANCHOR73]
-	b	.L240
+	b	.L241
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
@@ -1882,24 +1893,24 @@ FtlGcMarkBadPhyBlk:
 	add	x3, x3, :lo12:.LANCHOR75
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR74]
-.L243:
+.L244:
 	cmp	w0, w2, uxth
-	bhi	.L245
+	bhi	.L246
 	cmp	w0, 15
-	bhi	.L244
+	bhi	.L245
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR74]
 	adrp	x1, .LANCHOR75
 	add	x1, x1, :lo12:.LANCHOR75
 	strh	w6, [x1, w0, sxtw 1]
-	b	.L244
-.L245:
+	b	.L245
+.L246:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w6
-	bne	.L243
-.L244:
+	bne	.L244
+.L245:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -1911,20 +1922,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L254
+	cbz	w0, .L255
 	adrp	x1, .LANCHOR72
 	ldrh	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L254
+	bne	.L255
 	stp	x29, x30, [sp, -16]!
 	adrp	x6, .LANCHOR76
 	add	x29, sp, 0
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	cmp	w1, w0
-	bcc	.L249
+	bcc	.L250
 	strh	wzr, [x6, #:lo12:.LANCHOR76]
-.L249:
+.L250:
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR75
 	add	x0, x0, :lo12:.LANCHOR75
@@ -1937,7 +1948,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x6, #:lo12:.LANCHOR76]
 	mov	w0, 0
 	ret
-.L254:
+.L255:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -1981,9 +1992,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x26, .LC3
-.L260:
+.L261:
 	cmp	w27, w19
-	bhi	.L266
+	bhi	.L267
 	ldp	x19, x20, [sp, 16]
 	adrp	x0, .LC5
 	ldp	x21, x22, [sp, 32]
@@ -1993,40 +2004,40 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L266:
-	cbnz	w20, .L261
+.L267:
+	cbnz	w20, .L262
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L261:
+.L262:
 	cmp	w23, 4
-	bne	.L262
+	bne	.L263
 	ldr	w1, [x22, x19, lsl 2]
-.L269:
+.L270:
 	add	x0, x26, :lo12:.LC3
-.L268:
+.L269:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L265
+	bls	.L266
 	mov	w20, 0
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L265:
+.L266:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L260
-.L262:
+	b	.L261
+.L263:
 	cmp	w23, 2
-	bne	.L264
+	bne	.L265
 	ldrh	w1, [x22, x19, lsl 1]
-	b	.L269
-.L264:
+	b	.L270
+.L265:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L268
+	b	.L269
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -2052,18 +2063,18 @@ FlashEraseBlocks:
 	lsl	w26, w24, 3
 	mov	x22, x0
 	add	x27, x25, :lo12:.LANCHOR78
-.L271:
+.L272:
 	cmp	x19, x23
-	beq	.L285
+	beq	.L286
 	ldr	w0, [x19]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
-	cbnz	w0, .L272
+	cbnz	w0, .L273
 	ldr	w1, [x29, 108]
 	cmp	w26, w1
-	bls	.L272
+	bls	.L273
 	mov	x19, x20
 	add	x21, x20, x21
 	adrp	x22, .LC6
@@ -2071,10 +2082,10 @@ FlashEraseBlocks:
 	add	x22, x22, :lo12:.LC6
 	add	x20, x20, :lo12:.LANCHOR77
 	mov	w23, -1
-.L273:
+.L274:
 	cmp	x19, x21
-	bne	.L274
-.L285:
+	bne	.L275
+.L286:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2083,7 +2094,7 @@ FlashEraseBlocks:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L274:
+.L275:
 	ldr	w2, [x29, 108]
 	mov	x1, x20
 	str	w23, [x19]
@@ -2102,34 +2113,34 @@ FlashEraseBlocks:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-	b	.L273
-.L272:
+	b	.L274
+.L273:
 	add	x1, x25, :lo12:.LANCHOR78
 	ldr	x2, [x1, 8]
 	ldr	w1, [x29, 108]
 	blr	x2
-	cbnz	w0, .L275
+	cbnz	w0, .L276
 	str	wzr, [x19, -4]
-.L276:
+.L277:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L278
+	bne	.L279
 	ldrb	w0, [x29, 104]
 	ldr	x2, [x27, 8]
 	ldr	w1, [x29, 108]
 	add	w1, w24, w1
 	blr	x2
-	cbz	w0, .L278
+	cbz	w0, .L279
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L278:
+.L279:
 	add	x19, x19, 32
-	b	.L271
-.L275:
+	b	.L272
+.L276:
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L276
+	b	.L277
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -2144,15 +2155,15 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L287
+	bcc	.L288
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L287
+	beq	.L288
 	and	w1, w1, 65535
-	cbz	w1, .L289
+	cbz	w1, .L290
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
@@ -2173,7 +2184,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L289:
+.L290:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -2184,7 +2195,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L287:
+.L288:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2202,7 +2213,7 @@ FtlFreeSysBlkQueueOut:
 	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	cbz	w2, .L301
+	cbz	w2, .L302
 	ldrh	w0, [x1, 2]
 	sub	w2, w2, #1
 	strh	w2, [x1, 6]
@@ -2222,23 +2233,23 @@ FtlFreeSysBlkQueueOut:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L298:
+.L299:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L299
+	bcs	.L300
 	add	x0, x19, :lo12:.LANCHOR38
 	mov	w1, w20
 	ldrh	w2, [x0, 6]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L300:
-	b	.L300
 .L301:
+	b	.L301
+.L302:
 	mov	w20, 65535
-	b	.L298
-.L299:
+	b	.L299
+.L300:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2257,27 +2268,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L304:
+.L305:
 	cmp	w20, w1
-	beq	.L308
+	beq	.L309
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L305
+	cbnz	w2, .L306
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L306
+	bcs	.L307
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
+.L308:
+	b	.L308
 .L307:
-	b	.L307
-.L306:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -2286,26 +2297,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L308:
+.L309:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L310
+	bhi	.L311
 	adrp	x1, .LANCHOR81
 	adrp	x0, .LC1
 	mov	w2, 578
 	add	x1, x1, :lo12:.LANCHOR81
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L310:
+.L311:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L305:
+.L306:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L304
+	b	.L305
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -2603,36 +2614,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L314:
+.L315:
 	cmp	w0, w7
-	bcc	.L315
+	bcc	.L316
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
 	mov	x3, 0
-.L316:
+.L317:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L317
+	bne	.L318
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L315:
+.L316:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L314
-.L317:
+	b	.L315
+.L318:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L316
+	b	.L317
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -2658,19 +2669,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L322:
+.L323:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L319
+	beq	.L320
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L321
+	bhi	.L322
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L321:
+.L322:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -2681,8 +2692,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L322
-.L319:
+	bne	.L323
+.L320:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2745,10 +2756,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L330:
+.L331:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L334
+	bhi	.L335
 	adrp	x0, .LANCHOR20
 	mov	w23, 0
 	mov	w20, 0
@@ -2756,10 +2767,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L335:
+.L336:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L339
+	bhi	.L340
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -2767,64 +2778,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L334:
+.L335:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L331:
+.L332:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L333
+	bhi	.L334
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L330
-.L333:
+	b	.L331
+.L334:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L332
-	cbz	w2, .L332
+	bne	.L333
+	cbz	w2, .L333
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L332:
+.L333:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L331
-.L339:
+	b	.L332
+.L340:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L336
+	bls	.L337
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L337
-.L338:
+	cbnz	w0, .L338
+.L339:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L335
-.L336:
-	cbnz	w1, .L338
+	b	.L336
+.L337:
+	cbnz	w1, .L339
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L338
-.L340:
+	cbz	w0, .L339
+.L341:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L338
-.L341:
+	b	.L339
+.L342:
 	mov	w24, 0
-	b	.L340
-.L337:
+	b	.L341
+.L338:
 	mov	w23, w20
-	cbz	w1, .L341
+	cbz	w1, .L342
 	mov	w24, w1
-	b	.L338
+	b	.L339
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -2860,10 +2871,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.L351:
+.L352:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L352
+	bne	.L353
 	adrp	x1, .LANCHOR129
 	add	x0, x1, :lo12:.LANCHOR129
 	ldp	x21, x22, [sp, 32]
@@ -2894,7 +2905,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L352:
+.L353:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -2902,7 +2913,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L351
+	b	.L352
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -2999,33 +3010,33 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR41]
 	adrp	x0, .LANCHOR43
 	str	xzr, [x0, #:lo12:.LANCHOR43]
-.L357:
+.L358:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L364
+	bcs	.L365
 	adrp	x0, .LANCHOR19
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L365
-.L359:
+	b	.L366
+.L360:
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L358
+	cbnz	w0, .L359
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L358:
+.L359:
 	add	x6, x6, 1
-.L365:
+.L366:
 	cmp	w8, w6, uxth
-	bhi	.L359
-	cbz	w5, .L360
+	bhi	.L360
+	cbz	w5, .L361
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L361:
+.L362:
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
@@ -3033,54 +3044,54 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L362
+	beq	.L363
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L362
+	beq	.L363
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L362
+	beq	.L363
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L363
+	cbnz	w0, .L364
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L362:
+.L363:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L357
-.L360:
+	b	.L358
+.L361:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	b	.L361
-.L363:
+	b	.L362
+.L364:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L362
-.L364:
+	b	.L363
+.L365:
 	strh	w20, [x23, #:lo12:.LANCHOR44]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	cmp	w20, w0
-	ble	.L366
+	ble	.L367
 	adrp	x1, .LANCHOR136
 	adrp	x0, .LC1
 	mov	w2, 2210
 	add	x1, x1, :lo12:.LANCHOR136
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L366:
+.L367:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -3140,31 +3151,31 @@ FlashGetBadBlockList:
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L371
+	bls	.L372
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, 0
-.L371:
+.L372:
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L375
+	bne	.L376
 	mov	x1, 0
-.L373:
+.L374:
 	cmp	w0, w1, uxth
-	bhi	.L374
-.L375:
+	bhi	.L375
+.L376:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L374:
+.L375:
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L373
+	b	.L374
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -3196,9 +3207,9 @@ FlashReadPages:
 	add	x24, x24, :lo12:.LANCHOR137
 	adrp	x25, .LC1
 	add	x25, x25, :lo12:.LC1
-.L379:
+.L380:
 	cmp	x23, x19
-	bne	.L392
+	bne	.L393
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3207,36 +3218,36 @@ FlashReadPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L392:
+.L393:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L380
+	cbz	x0, .L381
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L381
-.L380:
+	cbnz	x0, .L382
+.L381:
 	mov	w2, 90
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L381:
+.L382:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
 	cmp	w0, 3
-	bls	.L382
+	bls	.L383
 	mov	w0, -1
 	str	w0, [x19]
-.L383:
+.L384:
 	add	x19, x19, 32
-	b	.L379
-.L382:
+	b	.L380
+.L383:
 	ldr	x20, [x19, 8]
 	adrp	x26, .LANCHOR111
 	tst	x20, 63
-	beq	.L384
+	beq	.L385
 	ldr	x20, [x26, #:lo12:.LANCHOR111]
-.L384:
+.L385:
 	adrp	x22, .LANCHOR78
 	add	x22, x22, :lo12:.LANCHOR78
 	ldr	w1, [x29, 108]
@@ -3248,7 +3259,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L386
+	bne	.L387
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -3258,65 +3269,65 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L387
+	beq	.L388
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L388
+	bne	.L389
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L388
+	bne	.L389
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L388
-.L387:
+	beq	.L389
+.L388:
 	mov	w1, -1
 	str	w1, [x19]
-.L388:
+.L389:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L389
+	beq	.L390
 	cmp	w0, 256
-	bne	.L389
+	bne	.L390
 	str	w0, [x19]
-.L389:
+.L390:
 	ldr	w3, [x19]
 	cmp	w3, 256
 	ccmn	w3, #1, 4, ne
-	bne	.L386
+	bne	.L387
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC11
 	ldr	w2, [x29, 108]
 	add	x0, x0, :lo12:.LC11
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L391
+	cbz	x1, .L392
 	mov	w3, 4
 	adrp	x0, .LC12
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC12
 	bl	rknand_print_hex
-.L391:
+.L392:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L386
+	cbz	x1, .L387
 	mov	w3, 4
 	adrp	x0, .LC13
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC13
 	bl	rknand_print_hex
-.L386:
+.L387:
 	ldr	x0, [x26, #:lo12:.LANCHOR111]
 	cmp	x20, x0
-	bne	.L383
+	bne	.L384
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L383
+	beq	.L384
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L383
+	b	.L384
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -3348,10 +3359,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L419:
+.L420:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L424
+	bcc	.L425
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3360,18 +3371,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L424:
+.L425:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	add	x24, x22, :lo12:.LANCHOR138
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L420:
+.L421:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L422
+	bgt	.L423
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -3383,19 +3394,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L421
+	beq	.L422
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L421
+	bne	.L422
 	strh	w19, [x20]
-.L422:
+.L423:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L419
-.L421:
+	b	.L420
+.L422:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L420
+	b	.L421
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -3409,10 +3420,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L430
+	bne	.L431
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L431:
+.L432:
 	adrp	x1, .LANCHOR112
 	sub	w19, w19, #1
 	sxth	w19, w19
@@ -3429,24 +3440,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L432
+	bne	.L433
 	mov	w22, 0
 	mov	w24, 2
-.L433:
+.L434:
 	cmp	w22, w19
-	ble	.L436
-.L432:
+	ble	.L437
+.L433:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L430:
+.L431:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L431
-.L436:
+	b	.L432
+.L437:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -3458,20 +3469,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L434
+	bne	.L435
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L434
+	bne	.L435
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L434
+	beq	.L435
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L433
-.L434:
+	b	.L434
+.L435:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L433
+	b	.L434
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -3531,12 +3542,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR82
 	str	x0, [x29, 112]
-.L442:
+.L443:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L482
+	bls	.L483
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR103
 	adrp	x6, .LANCHOR13
@@ -3551,14 +3562,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L483
-.L444:
+	b	.L484
+.L445:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L443
+	cbnz	w0, .L444
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -3569,19 +3580,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L443:
+.L444:
 	add	x5, x5, 1
-.L483:
+.L484:
 	cmp	w12, w5, uxth
-	bhi	.L444
-	cbnz	w22, .L445
-.L481:
+	bhi	.L445
+	cbnz	w22, .L446
+.L482:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L442
-.L445:
+	b	.L443
+.L446:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -3592,7 +3603,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 136]
-.L480:
+.L481:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -3600,10 +3611,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L448
+	bne	.L449
 	mov	w5, 16
 	mov	w7, 65535
-.L450:
+.L451:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x6, x25, :lo12:.LANCHOR103
 	mov	w2, 1
@@ -3621,78 +3632,78 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L447
+	bne	.L448
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L448
-.L449:
+	bne	.L449
+.L450:
 	mov	w1, 1
-	b	.L519
-.L447:
+	b	.L520
+.L448:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L448
+	bne	.L449
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L450
-	b	.L449
-.L448:
+	bne	.L451
+	b	.L450
+.L449:
 	adrp	x0, .LANCHOR82
 	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L451
+	beq	.L452
 	cmp	w1, w0
-	bhi	.L452
-.L451:
+	bhi	.L453
+.L452:
 	cmn	w0, #1
-	beq	.L452
+	beq	.L453
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L452:
+.L453:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L454
-	bhi	.L455
+	beq	.L455
+	bhi	.L456
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L456
-.L453:
+	beq	.L457
+.L454:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L480
-	b	.L481
-.L455:
+	bne	.L481
+	b	.L482
+.L456:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L457
+	beq	.L458
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L453
+	bne	.L454
 	mov	w1, 0
-.L519:
+.L520:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L453
-.L457:
+	b	.L454
+.L458:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L459
+	bls	.L460
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1225
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L459:
+.L460:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
@@ -3703,53 +3714,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR125]
 	sxth	w2, w2
-.L460:
+.L461:
 	cmp	w0, w2
-	bgt	.L466
-	tbz	w0, #31, .L500
-	b	.L453
-.L466:
+	bgt	.L467
+	tbz	w0, #31, .L501
+	b	.L454
+.L467:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L461
+	bls	.L462
 	ldr	w2, [x5]
-	cbnz	w2, .L462
+	cbnz	w2, .L463
 	cmp	w6, w1
-	beq	.L462
+	beq	.L463
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
-.L462:
+.L463:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 0
-.L463:
+.L464:
 	cmp	w1, w0
-	bne	.L464
+	bne	.L465
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L453
+	tbnz	w0, #31, .L454
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L453
-.L500:
+	bgt	.L454
+.L501:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR119]
-.L518:
+.L519:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L453
-.L464:
+	b	.L454
+.L465:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -3761,22 +3772,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L463
-.L461:
+	b	.L464
+.L462:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L460
-.L456:
+	b	.L461
+.L457:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L469
+	bls	.L470
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1266
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L469:
+.L470:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -3784,46 +3795,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR122]
-.L470:
+.L471:
 	cmp	w0, w5
-	ble	.L475
+	ble	.L476
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L471
+	bls	.L472
 	ldr	w5, [x1]
-	cbnz	w5, .L472
+	cbnz	w5, .L473
 	cmp	w6, w2
-	beq	.L472
+	beq	.L473
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L472:
+.L473:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L473:
+.L474:
 	cmp	w2, w0
-	bne	.L474
+	bne	.L475
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L475:
-	tbnz	w0, #31, .L453
+.L476:
+	tbnz	w0, #31, .L454
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L453
+	bgt	.L454
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L518
-.L474:
+	b	.L519
+.L475:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -3835,61 +3846,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L473
-.L471:
+	b	.L474
+.L472:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L470
-.L454:
+	b	.L471
+.L455:
 	ldrh	w5, [x24, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR139
 	cmp	w5, w1
-	bne	.L477
+	bne	.L478
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w0, [x2, 8]
-	b	.L453
-.L477:
+	b	.L454
+.L478:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L478
+	beq	.L479
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L478:
+.L479:
 	add	x0, x24, :lo12:.LANCHOR139
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L479
+	bcs	.L480
 	ldrh	w2, [x24, #:lo12:.LANCHOR139]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w1, [x0, 8]
-	b	.L453
-.L479:
+	b	.L454
+.L480:
 	strh	w26, [x0, 4]
-	b	.L453
-.L482:
+	b	.L454
+.L483:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR119]
 	ldrh	w0, [x2]
-	cbz	w0, .L484
-.L487:
+	cbz	w0, .L485
+.L488:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L485
-.L486:
+	cbz	w0, .L486
+.L487:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L516
+	bls	.L517
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
 	mov	w2, 1391
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L516:
+.L517:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3898,24 +3909,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L484:
+.L485:
 	ldrh	w0, [x20, #:lo12:.LANCHOR130]
-	cbz	w0, .L487
+	cbz	w0, .L488
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L488:
+.L489:
 	cmp	w0, w1
-	bcs	.L487
+	bcs	.L488
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L489
+	cbz	w3, .L490
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR125]
 	mov	w1, w0
-.L490:
+.L491:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L487
+	bcs	.L488
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -3927,29 +3938,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L490
-.L489:
+	b	.L491
+.L490:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L488
-.L485:
+	b	.L489
+.L486:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L486
+	cbz	w0, .L487
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L495:
+.L496:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L486
+	bge	.L487
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L496
+	cbz	w3, .L497
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR122]
-.L497:
+.L498:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L486
+	bge	.L487
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -3961,11 +3972,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L497
-.L496:
+	b	.L498
+.L497:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L495
+	b	.L496
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -3993,11 +4004,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L521:
+.L522:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L524
+	bgt	.L525
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -4006,7 +4017,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L522
+	bne	.L523
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -4014,13 +4025,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L522:
+.L523:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L523
+	beq	.L524
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L523
+	bne	.L524
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -4028,16 +4039,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L524:
+.L525:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L538
+	beq	.L539
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L528
+	beq	.L529
 	add	x0, x22, :lo12:.LANCHOR138
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -4046,21 +4057,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L528
+	beq	.L529
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L528
+	bne	.L529
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L528
+	bls	.L529
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L528:
+.L529:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -4070,35 +4081,35 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR138
-.L530:
-	tbz	w20, #31, .L533
+.L531:
+	tbz	w20, #31, .L534
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
 	mov	w2, 251
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L532:
+.L533:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L535
+	beq	.L536
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L535
+	beq	.L536
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L535
+	bcs	.L536
 	cmp	w0, w1
-	bcs	.L535
+	bcs	.L536
 	bl	FtlSysBlkNumInit
-.L535:
+.L536:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
 	adrp	x23, .LANCHOR127
@@ -4107,23 +4118,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR127
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w20, 0
-.L536:
+.L537:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L537
+	bcc	.L538
 	mov	w0, 0
-.L520:
+.L521:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L523:
+.L524:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L521
-.L533:
+	b	.L522
+.L534:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
@@ -4135,15 +4146,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L531
+	beq	.L532
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L532
-.L531:
+	beq	.L533
+.L532:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L530
-.L537:
+	b	.L531
+.L538:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -4152,10 +4163,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L536
-.L538:
+	b	.L537
+.L539:
 	mov	w0, -1
-	b	.L520
+	b	.L521
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -4182,18 +4193,18 @@ FlashProgPages:
 	mov	x25, x0
 	add	x28, x24, :lo12:.LANCHOR78
 	lsl	w27, w23, 3
-.L551:
+.L552:
 	cmp	x25, x20
-	bne	.L564
+	bne	.L565
 	ldr	w0, [x29, 104]
-	cbz	w0, .L578
+	cbz	w0, .L579
 	adrp	x21, .LANCHOR111
 	adrp	x22, .LANCHOR113
 	mov	x23, x21
 	mov	x24, x22
-.L566:
+.L567:
 	cmp	x19, x20
-	beq	.L578
+	beq	.L579
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	x0, [x22, #:lo12:.LANCHOR113]
 	str	wzr, [x1]
@@ -4207,87 +4218,87 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L567
+	bne	.L568
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
 	str	w26, [x19]
-.L567:
+.L568:
 	ldr	w26, [x29, 128]
 	cmp	w26, 256
-	bne	.L568
+	bne	.L569
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
 	str	w26, [x19]
-.L568:
+.L569:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L569
+	cbz	x0, .L570
 	ldr	w2, [x0]
 	ldr	x0, [x24, #:lo12:.LANCHOR113]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L569
+	beq	.L570
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L569:
+.L570:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L570
+	cbz	x0, .L571
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR111]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L570
+	beq	.L571
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L570:
+.L571:
 	add	x19, x19, 32
-	b	.L566
-.L564:
+	b	.L567
+.L565:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L552
+	cbz	x0, .L553
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L553
-.L552:
+	cbnz	x0, .L554
+.L553:
 	adrp	x0, .LC1
 	mov	w2, 142
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L553:
+.L554:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
 	cmp	w0, 3
-	bls	.L554
-.L591:
+	bls	.L555
+.L592:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L555
-.L554:
-	cbnz	w0, .L556
+	b	.L556
+.L555:
+	cbnz	w0, .L557
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L556
+	bls	.L557
 	adrp	x21, .LANCHOR142
 	adrp	x22, .LC6
 	mov	w23, -1
 	add	x21, x21, :lo12:.LANCHOR142
 	add	x22, x22, :lo12:.LC6
-	b	.L589
-.L558:
+	b	.L590
+.L559:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -4306,10 +4317,10 @@ FlashProgPages:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-.L589:
+.L590:
 	cmp	x19, x20
-	bne	.L558
-.L578:
+	bne	.L559
+.L579:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4318,20 +4329,20 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L556:
+.L557:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L572
+	beq	.L573
 	adrp	x0, .LANCHOR111
 	ldr	x26, [x0, #:lo12:.LANCHOR111]
 	cmp	x1, x26
-	beq	.L559
+	beq	.L560
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L559:
+.L560:
 	add	x0, x24, :lo12:.LANCHOR78
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
@@ -4339,13 +4350,13 @@ FlashProgPages:
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L560
+	cbnz	w0, .L561
 	str	wzr, [x25]
-.L561:
+.L562:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L555
+	bne	.L556
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -4354,17 +4365,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbnz	w0, .L591
-.L555:
+	cbnz	w0, .L592
+.L556:
 	add	x25, x25, 32
-	b	.L551
-.L572:
+	b	.L552
+.L573:
 	mov	x26, x1
-	b	.L559
-.L560:
+	b	.L560
+.L561:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L561
+	b	.L562
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -4398,43 +4409,43 @@ FtlLowFormatEraseBlock:
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L593:
+.L594:
 	cmp	w8, w5, uxth
-	bhi	.L597
-	cbz	w24, .L592
+	bhi	.L598
+	cbz	w24, .L593
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L601:
+.L602:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L600
+	bne	.L601
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L600:
+.L601:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L601
-	cbz	w22, .L614
+	bne	.L602
+	cbz	w22, .L615
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L602:
+.L603:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L610:
+.L611:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR79]
@@ -4445,10 +4456,10 @@ FtlLowFormatEraseBlock:
 	ldr	x8, [x0, #:lo12:.LANCHOR109]
 	ldr	x0, [x29, 112]
 	ldr	x10, [x0, #:lo12:.LANCHOR110]
-.L603:
+.L604:
 	cmp	w7, w5, uxth
-	bhi	.L606
-	cbz	w20, .L592
+	bhi	.L607
+	cbz	w20, .L593
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -4456,11 +4467,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L609:
+.L610:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L608
+	cbz	w0, .L609
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -4468,36 +4479,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L608:
+.L609:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L609
+	bne	.L610
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L610
+	bhi	.L611
 	mov	x24, 0
-.L612:
-	cbz	w22, .L611
+.L613:
+	cbz	w22, .L612
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L611
+	cbnz	w0, .L612
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L611:
+.L612:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L612
+	bne	.L613
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L592
+	beq	.L593
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L592:
+.L593:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4506,7 +4517,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L597:
+.L598:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4514,13 +4525,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L594
+	cbz	w22, .L595
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L595
-.L594:
+	cbnz	w0, .L596
+.L595:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L596
+	cbnz	w0, .L597
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -4531,18 +4542,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L595:
-	add	x5, x5, 1
-	b	.L593
 .L596:
+	add	x5, x5, 1
+	b	.L594
+.L597:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L595
-.L614:
+	b	.L596
+.L615:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L602
-.L606:
+	b	.L603
+.L607:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4551,13 +4562,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L604
+	cbz	w22, .L605
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L605
-.L604:
+	cbnz	w0, .L606
+.L605:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L605
+	cbnz	w0, .L606
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -4568,9 +4579,9 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L605:
+.L606:
 	add	x5, x5, 1
-	b	.L603
+	b	.L604
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -4582,7 +4593,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L638
+	bls	.L639
 	adrp	x20, .LANCHOR112
 	mov	w2, 32
 	mov	w1, 165
@@ -4607,7 +4618,7 @@ FlashTestBlk:
 	mov	w1, w3
 	bl	FlashProgPages
 	ldr	w0, [x29, 32]
-	cbnz	w0, .L639
+	cbnz	w0, .L640
 	add	w0, w19, 1
 	mov	w3, 1
 	str	w0, [x29, 36]
@@ -4618,23 +4629,23 @@ FlashTestBlk:
 	ldr	w0, [x29, 32]
 	cmp	w0, 0
 	csetm	w20, ne
-.L637:
+.L638:
 	mov	w2, 1
 	mov	w1, 0
 	add	x0, x29, 32
 	str	w19, [x29, 36]
 	bl	FlashEraseBlocks
-.L635:
+.L636:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L639:
+.L640:
 	mov	w20, -1
-	b	.L637
-.L638:
+	b	.L638
+.L639:
 	mov	w20, 0
-	b	.L635
+	b	.L636
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -4667,10 +4678,10 @@ FtlBbmTblFlush:
 	add	x27, x27, :lo12:.LANCHOR127
 	mov	w1, 0
 	bl	ftl_memset
-.L642:
+.L643:
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L643
+	blt	.L644
 	add	x20, x20, :lo12:.LANCHOR138
 	add	x19, x21, :lo12:.LANCHOR37
 	mov	w2, 16
@@ -4700,7 +4711,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR143
 	ldr	w0, [x0, #:lo12:.LANCHOR143]
 	strh	w0, [x27, 14]
-.L644:
+.L645:
 	ldrh	w1, [x19]
 	ldrh	w4, [x27, 10]
 	ldrh	w2, [x19, 2]
@@ -4718,7 +4729,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L645
+	blt	.L646
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -4737,7 +4748,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L645:
+.L646:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -4748,7 +4759,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L646
+	bne	.L647
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC19
@@ -4756,15 +4767,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC19
 	bl	printf
 	cmp	w21, 3
-	bls	.L644
+	bls	.L645
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC20
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC20
 	bl	printf
-.L648:
-	b	.L648
-.L643:
+.L649:
+	b	.L649
+.L644:
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x19, 8]
@@ -4773,13 +4784,13 @@ FtlBbmTblFlush:
 	add	w24, w24, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L642
-.L646:
+	b	.L643
+.L647:
 	add	w24, w24, 1
 	cmp	w24, 1
-	beq	.L644
+	beq	.L645
 	cmp	w0, 256
-	beq	.L644
+	beq	.L645
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4807,7 +4818,7 @@ allocate_data_superblock:
 	add	x0, x27, :lo12:.LANCHOR44
 	stp	x25, x26, [sp, 64]
 	str	x0, [x29, 104]
-.L657:
+.L658:
 	ldr	x1, [x29, 104]
 	adrp	x23, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -4815,18 +4826,18 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L658
+	ble	.L659
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2656
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L658:
+.L659:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L684
+	bne	.L685
 	adrp	x1, .LANCHOR95
 	ldrh	w0, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR95]
@@ -4835,39 +4846,39 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L659
+	beq	.L660
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L659:
+.L660:
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x24]
-	cbnz	w0, .L660
+	cbnz	w0, .L661
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2665
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L660:
+.L661:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	strh	w0, [x24]
 	ldrh	w0, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w22
-	bls	.L657
+	bls	.L658
 	adrp	x25, .LANCHOR42
 	ubfiz	x20, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w21, [x0, x20]
-	cbnz	w21, .L657
+	cbnz	w21, .L658
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L662
+	cbnz	w0, .L663
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x20]
@@ -4878,31 +4889,31 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L657
+	ble	.L658
 	mov	w2, 2679
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L657
-.L684:
+	b	.L658
+.L685:
 	mov	w1, 0
-	b	.L659
-.L662:
+	b	.L660
+.L663:
 	ldrh	w1, [x27, #:lo12:.LANCHOR44]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L664
+	ble	.L665
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2682
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L664:
+.L665:
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR79
 	add	x26, x19, 16
@@ -4914,40 +4925,40 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L665:
+.L666:
 	cmp	x0, x1
-	bne	.L667
-	cbnz	w21, .L668
+	bne	.L668
+	cbnz	w21, .L669
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2693
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L668:
+.L669:
 	adrp	x0, .LANCHOR145
 	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w22
-	bne	.L669
+	bne	.L670
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2695
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L669:
+.L670:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR47
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR90
 	adrp	x4, .LANCHOR91
 	ldr	x1, [x6, #:lo12:.LANCHOR47]
-	cbnz	w0, .L670
+	cbnz	w0, .L671
 	ldrh	w0, [x1, x20]
-	cbz	w0, .L671
+	cbz	w0, .L672
 	ldrh	w2, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w2
-.L695:
+.L696:
 	strh	w0, [x1, x20]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR90]
@@ -4955,15 +4966,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR90]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L673:
+.L674:
 	ldr	x0, [x6, #:lo12:.LANCHOR47]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR92
 	ldr	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w2
-	bls	.L674
+	bls	.L675
 	str	w1, [x0, #:lo12:.LANCHOR92]
-.L674:
+.L675:
 	ldr	w2, [x5, #:lo12:.LANCHOR90]
 	ldr	w1, [x4, #:lo12:.LANCHOR91]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
@@ -4982,48 +4993,48 @@ allocate_data_superblock:
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L675:
+.L676:
 	cmp	x1, x2
-	bne	.L676
+	bne	.L677
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
 	mov	x23, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L677:
+.L678:
 	cmp	w21, w23, uxth
-	bhi	.L679
-	cbz	w1, .L680
+	bhi	.L680
+	cbz	w1, .L681
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L680:
+.L681:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L681
+	cbnz	w0, .L682
 	adrp	x0, .LANCHOR42
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x20]
-	b	.L657
-.L667:
+	b	.L658
+.L668:
 	ldrh	w2, [x4]
 	stp	xzr, xzr, [x1]
 	cmp	w2, w6
-	beq	.L666
+	beq	.L667
 	ubfiz	x5, x21, 5, 16
 	add	w21, w21, 1
 	add	x5, x3, x5
 	and	w21, w21, 65535
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L666:
+.L667:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L665
-.L671:
+	b	.L666
+.L672:
 	mov	w0, 2
-	b	.L695
-.L670:
+	b	.L696
+.L671:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
@@ -5032,19 +5043,19 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR91]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.6
-	b	.L673
-.L676:
+	b	.L674
+.L677:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L675
-.L679:
+	b	.L676
+.L680:
 	ldr	x2, [x25, #:lo12:.LANCHOR79]
 	lsl	x0, x23, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L678
+	bne	.L679
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 96]
@@ -5055,11 +5066,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L678:
+.L679:
 	add	x23, x23, 1
 	add	x26, x26, 2
-	b	.L677
-.L681:
+	b	.L678
+.L682:
 	adrp	x1, .LANCHOR19
 	adrp	x2, .LANCHOR82
 	strh	wzr, [x19, 2]
@@ -5077,17 +5088,17 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w0, [x1, x20]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L682
+	cbz	w0, .L683
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L683
-.L682:
+	cbnz	w0, .L684
+.L683:
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
 	mov	w2, 2748
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L683:
+.L684:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5112,17 +5123,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L697
+	cbz	w0, .L698
 	adrp	x23, .LANCHOR75
 	add	x24, x23, :lo12:.LANCHOR75
 	mov	w19, 0
-.L698:
+.L699:
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L704
+	bhi	.L705
 	bl	FtlGcReFreshBadBlk
-.L697:
+.L698:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5131,7 +5142,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L704:
+.L705:
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
@@ -5140,19 +5151,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L699:
+.L700:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L703
+	bhi	.L704
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L698
-.L703:
+	b	.L699
+.L704:
 	add	x0, x23, :lo12:.LANCHOR75
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L700
+	bne	.L701
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -5160,22 +5171,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L701:
+.L702:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L702
+	bhi	.L703
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L700:
+.L701:
 	and	w20, w27, 65535
-	b	.L699
-.L702:
+	b	.L700
+.L703:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L701
+	b	.L702
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -5190,42 +5201,42 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L710
+	cbnz	w0, .L711
 	adrp	x0, .LANCHOR72
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w19
-	bne	.L711
+	bne	.L712
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L711:
+.L712:
 	adrp	x0, .LANCHOR73
 	ldrh	w1, [x0, #:lo12:.LANCHOR73]
 	cmp	w1, w19
-	bne	.L712
+	bne	.L713
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR73]
-.L712:
+.L713:
 	adrp	x0, .LANCHOR145
 	ldrh	w1, [x0, #:lo12:.LANCHOR145]
 	cmp	w1, w19
-	bne	.L713
+	bne	.L714
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR145]
-.L714:
+.L715:
 	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
-	cbnz	w0, .L716
+	cbnz	w0, .L717
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	mov	w2, 2824
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L716:
+.L717:
 	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR44]
@@ -5240,39 +5251,39 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L720
+	ble	.L721
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	mov	w2, 2827
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L720:
+.L721:
 	mov	w0, 1
-	b	.L709
-.L713:
+	b	.L710
+.L714:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L719
+	beq	.L720
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L719
+	beq	.L720
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L714
-.L719:
+	bne	.L715
+.L720:
 	mov	w0, 0
-.L709:
+.L710:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L710:
+.L711:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L719
+	b	.L720
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -5286,12 +5297,12 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L723
+	beq	.L724
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L724
+	cbnz	w0, .L725
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC21
@@ -5299,37 +5310,37 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L725
-.L730:
+	cbz	w0, .L726
+.L731:
 	mov	w20, 0
-.L722:
+.L723:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L725:
+.L726:
 	mov	w2, 2842
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L730
-.L724:
+	b	.L731
+.L725:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L723:
+.L724:
 	adrp	x21, .LANCHOR131
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR131]
 	cmp	w0, w1
-	bne	.L727
+	bne	.L728
 	strh	w19, [x21, #:lo12:.LANCHOR131]
-	b	.L730
-.L727:
+	b	.L731
+.L728:
 	cmp	w19, w0
-	beq	.L730
+	beq	.L731
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR40
@@ -5347,16 +5358,16 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L722
+	cbnz	w1, .L723
 	cmp	w19, w0, uxth
-	beq	.L722
+	beq	.L723
 	mov	w2, 2858
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L722
+	b	.L723
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -5393,10 +5404,10 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L737:
+.L738:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L733
-.L734:
+	cbnz	w0, .L734
+.L735:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -5414,12 +5425,12 @@ FtlSuperblockPowerLostFix:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 80
 	ret
-.L733:
+.L734:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 52]
 	cmn	w0, #1
-	beq	.L734
+	beq	.L735
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -5434,8 +5445,8 @@ FtlSuperblockPowerLostFix:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	subs	w20, w20, #1
-	bne	.L737
-	b	.L734
+	bne	.L738
+	b	.L735
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -5461,42 +5472,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L746:
+.L747:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L752
+	bcc	.L753
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L753:
+.L754:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L754
+	bhi	.L755
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L755:
+.L756:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L759
+	bgt	.L760
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L756
+	beq	.L757
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L757
+	cbz	w0, .L758
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L756:
+.L757:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L755
-.L752:
+	b	.L756
+.L753:
 	adrp	x2, .LANCHOR114
 	adrp	x0, .LANCHOR106
 	add	x19, x28, :lo12:.LANCHOR138
@@ -5508,7 +5519,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L747
+	beq	.L748
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -5523,14 +5534,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L748:
+.L749:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L746
-.L747:
+	b	.L747
+.L748:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -5543,12 +5554,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR127
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L749:
+.L750:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L750
+	beq	.L751
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -5586,29 +5597,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L748
+	bne	.L749
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L749
-.L750:
+	b	.L750
+.L751:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L749
-.L754:
+	b	.L750
+.L755:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L753
-.L757:
+	b	.L754
+.L758:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L758
+	bne	.L759
 	strh	w19, [x21]
-	b	.L756
-.L758:
-	strh	w19, [x21, 4]
+	b	.L757
 .L759:
+	strh	w19, [x21, 4]
+.L760:
 	adrp	x0, .LANCHOR79
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -5663,18 +5674,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L767:
+.L768:
 	cmp	w1, w3
-	bhi	.L768
+	bhi	.L769
 	ret
-.L768:
+.L769:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L767
+	b	.L768
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -5691,16 +5702,16 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w0, [x0]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bne	.L770
+	bne	.L771
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L771
+	cbz	w0, .L772
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L771:
+.L772:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -5711,14 +5722,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L772:
+.L773:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L770:
+.L771:
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR114
 	adrp	x24, .LANCHOR106
@@ -5749,9 +5760,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x0, 0
 	ldr	x3, [x24, #:lo12:.LANCHOR106]
 	mov	w1, 0
-.L773:
+.L774:
 	cmp	w4, w0, uxth
-	bhi	.L775
+	bhi	.L776
 	add	x20, x20, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR23
 	ldrh	w1, [x0, #:lo12:.LANCHOR23]
@@ -5768,11 +5779,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L772
-.L775:
+	b	.L773
+.L776:
 	ldr	w2, [x23, x0, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L774
+	bne	.L775
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	ubfiz	x2, x1, 1, 16
@@ -5780,9 +5791,9 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x0, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L774:
+.L775:
 	add	x0, x0, 1
-	b	.L773
+	b	.L774
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
@@ -5806,7 +5817,7 @@ FtlMapWritePage:
 	add	x28, x26, :lo12:.LANCHOR20
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
-.L781:
+.L782:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -5814,35 +5825,35 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L782
+	bge	.L783
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L783
-.L782:
+	bne	.L784
+.L783:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L783:
+.L784:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L784
+	cbnz	w0, .L785
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L784:
+.L785:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L785
+	bcc	.L786
 	adrp	x0, .LC1
 	mov	w2, 701
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L785:
+.L786:
 	ldrh	w1, [x19]
 	adrp	x21, .LANCHOR138
 	ldr	x0, [x19, 16]
@@ -5883,7 +5894,7 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L786
+	bne	.L787
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
@@ -5892,37 +5903,37 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L787
+	bhi	.L788
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L787:
+.L788:
 	cmp	w22, 3
-	bls	.L788
+	bls	.L789
 	add	x21, x21, :lo12:.LANCHOR138
 	adrp	x0, .LC23
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC23
 	ldr	w1, [x21, 4]
 	bl	printf
+.L790:
+	b	.L790
 .L789:
-	b	.L789
-.L788:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L781
-.L803:
-	b	.L803
-.L786:
+	cbz	w0, .L782
+.L804:
+	b	.L804
+.L787:
 	cmp	w0, 1
-	beq	.L792
+	beq	.L793
 	cmp	w1, 256
-	beq	.L792
+	beq	.L793
 	ldr	w0, [x19, 56]
-	cbz	w0, .L793
-.L792:
-	str	wzr, [x19, 56]
-	b	.L781
+	cbz	w0, .L794
 .L793:
+	str	wzr, [x19, 56]
+	b	.L782
+.L794:
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
@@ -5952,20 +5963,20 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L806
+	bcs	.L807
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 485
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L806:
+.L807:
 	adrp	x27, .LANCHOR124
 	ubfiz	x0, x20, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x27, #:lo12:.LANCHOR124]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L807
+	cbnz	w23, .L808
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
@@ -5978,7 +5989,7 @@ load_l2p_region:
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L808:
+.L809:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5987,7 +5998,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L807:
+.L808:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x26, .LANCHOR138
@@ -6006,7 +6017,7 @@ load_l2p_region:
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L809
+	beq	.L810
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC24
@@ -6024,26 +6035,26 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L810:
+.L811:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L811
+	beq	.L812
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 508
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L811:
+.L812:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L808
-.L809:
+	b	.L809
+.L810:
 	ldr	w0, [x26, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L810
+	bne	.L811
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC26
@@ -6056,7 +6067,7 @@ load_l2p_region:
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapWritePage
-	b	.L810
+	b	.L811
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6079,12 +6090,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L814
+	blt	.L815
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L814
+	cbz	w22, .L815
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L814
+	cbnz	w1, .L815
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6094,31 +6105,31 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L815
+	bcc	.L816
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L815:
+.L816:
 	adrp	x26, .LANCHOR138
 	adrp	x23, .LANCHOR151
 	add	x27, x26, :lo12:.LANCHOR138
 	add	x23, x23, :lo12:.LANCHOR151
 	mov	w20, 0
-.L816:
+.L817:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L823
+	bhi	.L824
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L814:
+.L815:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L824
+	bcc	.L825
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L824:
+.L825:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6127,12 +6138,12 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L823:
+.L824:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L817
+	bne	.L818
 	adrp	x2, .LANCHOR107
 	add	x0, x26, :lo12:.LANCHOR138
 	ldr	x2, [x2, #:lo12:.LANCHOR107]
@@ -6146,36 +6157,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L818
+	beq	.L819
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L818:
+.L819:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L819
-.L821:
+	bne	.L820
+.L822:
 	str	wzr, [x28]
+.L821:
+	b	.L821
 .L820:
-	b	.L820
-.L819:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L821
+	bne	.L822
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L821
+	bne	.L822
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L817:
+.L818:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L816
+	b	.L817
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -6217,27 +6228,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR55
-.L833:
+.L834:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L835
+	bhi	.L836
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L835:
+.L836:
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L834
+	tbz	w0, #31, .L835
 	mov	w0, w19
 	bl	flush_l2p_region
-.L834:
+.L835:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L833
+	b	.L834
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
@@ -6259,17 +6270,17 @@ log2phys:
 	ldr	w1, [x0, #:lo12:.LANCHOR152]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L838
+	bcc	.L839
 	adrp	x1, .LANCHOR153
 	adrp	x0, .LC1
 	mov	w2, 813
 	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L838:
+.L839:
 	ldr	w0, [x19, #:lo12:.LANCHOR152]
 	cmp	w25, w0
-	bcs	.L839
+	bcs	.L840
 	adrp	x23, .LANCHOR55
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR33
@@ -6278,10 +6289,10 @@ log2phys:
 	and	w22, w22, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L840:
+.L841:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L845
+	bcc	.L846
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
 	ldr	x2, [x23, #:lo12:.LANCHOR55]
@@ -6291,33 +6302,33 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L846
+	beq	.L847
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L846
+	tbz	w1, #31, .L847
 	bl	flush_l2p_region
-.L846:
+.L847:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L842
-.L839:
+	b	.L843
+.L840:
 	mov	w0, -1
-	cbnz	w21, .L837
+	cbnz	w21, .L838
 	str	w0, [x20]
-.L837:
+.L838:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L845:
+.L846:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L840
-.L842:
+	bne	.L841
+.L843:
 	mov	x0, 1
 	ldr	x1, [x23, #:lo12:.LANCHOR55]
 	lsl	x0, x0, x24
@@ -6325,22 +6336,22 @@ log2phys:
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L843
+	cbnz	w21, .L844
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L844:
+.L845:
 	ldr	x0, [x23, #:lo12:.LANCHOR55]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L848
+	beq	.L849
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L848:
+.L849:
 	mov	w0, 0
-	b	.L837
-.L843:
+	b	.L838
+.L844:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
@@ -6349,7 +6360,7 @@ log2phys:
 	str	w0, [x1, 4]
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L844
+	b	.L845
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6370,10 +6381,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L852
+	cbnz	w1, .L853
 	adrp	x0, .LANCHOR46
 	ldr	x19, [x0, #:lo12:.LANCHOR46]
-	cbz	x19, .L853
+	cbz	x19, .L854
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -6386,23 +6397,23 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L854:
+.L855:
 	cmp	w1, w4
-	beq	.L853
+	beq	.L854
 	cmp	w19, w3
-	bne	.L855
+	bne	.L856
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L856
+	cbnz	w0, .L857
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 1733
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L856:
+.L857:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
@@ -6412,7 +6423,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L853:
+.L854:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6422,18 +6433,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L855:
+.L856:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L853
+	beq	.L854
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L854
-.L852:
+	b	.L855
+.L853:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L853
+	b	.L854
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -6451,7 +6462,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L989
+	beq	.L990
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -6459,11 +6470,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L865
+	bne	.L866
 	strh	wzr, [x19, 4]
-.L996:
+.L997:
 	strb	wzr, [x19, 6]
-.L989:
+.L990:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6472,17 +6483,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L865:
+.L866:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L866:
+.L867:
 	cmp	w0, w1
-	beq	.L867
+	beq	.L868
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L868
+	beq	.L869
 	adrp	x1, .LANCHOR64
 	adrp	x2, .LANCHOR3
 	adrp	x20, .LANCHOR103
@@ -6503,9 +6514,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L869:
+.L870:
 	cmp	x4, x1
-	bne	.L873
+	bne	.L874
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
@@ -6519,69 +6530,69 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L874:
+.L875:
 	cmp	w22, w3
-	bne	.L879
+	bne	.L880
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L991:
+.L992:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L881
+	bne	.L882
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L881:
+.L882:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L882
-.L997:
+	beq	.L883
+.L998:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L989
-.L867:
+	b	.L990
+.L868:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L866
-.L868:
-	cbz	w26, .L870
+	b	.L867
+.L869:
+	cbz	w26, .L871
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1800
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L870:
+.L871:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L871
+	beq	.L872
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1801
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L871:
+.L872:
 	strh	wzr, [x19, 2]
-	b	.L996
-.L873:
+	b	.L997
+.L874:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L872
+	beq	.L873
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -6596,90 +6607,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L872:
+.L873:
 	add	x4, x4, 2
-	b	.L869
-.L879:
+	b	.L870
+.L880:
 	ldr	w0, [x11]
-	cbnz	w0, .L875
+	cbnz	w0, .L876
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L876
+	beq	.L877
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L876
+	cbz	w0, .L877
 	add	w5, w5, 1
 	str	w5, [x7]
-.L876:
+.L877:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L878
+	bne	.L879
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L991
-.L875:
+	b	.L992
+.L876:
 	mov	w6, w10
-.L878:
+.L879:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L874
-.L882:
+	b	.L875
+.L883:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L883
+	bne	.L884
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L884
-.L883:
+	cbnz	w0, .L885
+.L884:
 	adrp	x25, .LANCHOR134
 	and	w28, w23, 65535
 	ldr	w0, [x25, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L885
+	bne	.L886
 	str	w21, [x25, #:lo12:.LANCHOR134]
-.L885:
+.L886:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L935
+	bge	.L936
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L886:
+.L887:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L887:
+.L888:
 	cmp	w24, w28
-	bhi	.L897
+	bhi	.L898
 	ldrh	w1, [x4]
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L898
-.L935:
+	b	.L899
+.L936:
 	mov	w24, w26
-	b	.L886
-.L889:
+	b	.L887
+.L890:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L888
+	beq	.L889
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L888:
+.L889:
 	add	x2, x2, 2
-.L898:
+.L899:
 	cmp	x1, x2
-	bne	.L889
+	bne	.L890
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -6696,21 +6707,21 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L890:
+.L891:
 	cmp	x23, x0
-	bne	.L895
-	cbz	w2, .L896
+	bne	.L896
+	cbz	w2, .L897
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L896:
+.L897:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L887
-.L895:
+	b	.L888
+.L896:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L891
-	cbz	w2, .L884
+	cbz	w6, .L892
+	cbz	w2, .L885
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L884:
+.L885:
 	adrp	x0, .LANCHOR156
 	mov	w23, w26
 	mov	w1, 1
@@ -6718,7 +6729,7 @@ FtlRecoverySuperblock:
 	strh	w1, [x0, #:lo12:.LANCHOR156]
 	add	x0, x28, :lo12:.LANCHOR134
 	str	x0, [x29, 104]
-.L899:
+.L900:
 	ldr	x1, [x29, 152]
 	mov	w24, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
@@ -6727,9 +6738,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L900:
+.L901:
 	cmp	x1, x2
-	bne	.L902
+	bne	.L903
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
@@ -6739,62 +6750,62 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR157
 	add	x0, x0, :lo12:.LANCHOR157
 	str	x0, [x29, 120]
-.L903:
+.L904:
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L929
+	bne	.L930
 	ldr	x0, [x29, 128]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L899
+	bne	.L900
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L930:
+.L931:
 	cmp	w0, w1
-	beq	.L989
+	beq	.L990
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L931
+	beq	.L932
 	strb	w0, [x19, 6]
-	b	.L989
-.L891:
+	b	.L990
+.L892:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L894
+	beq	.L895
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L894:
+.L895:
 	add	x0, x0, 32
-	b	.L890
-.L897:
+	b	.L891
+.L898:
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR134]
-	b	.L884
-.L902:
+	b	.L885
+.L903:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L901
+	beq	.L902
 	ubfiz	x4, x24, 5, 16
 	add	w24, w24, 1
 	add	x4, x0, x4
 	and	w24, w24, 65535
 	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L901:
+.L902:
 	add	x2, x2, 2
-	b	.L900
-.L929:
+	b	.L901
+.L930:
 	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -6803,38 +6814,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L904
+	bcc	.L905
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L904
+	bhi	.L905
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L905
+	beq	.L906
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L906
+	beq	.L907
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L907
+	beq	.L908
 	ldrh	w0, [x19]
-.L993:
+.L994:
 	bl	decrement_vpc_count
-	b	.L904
-.L907:
+	b	.L905
+.L908:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L908
+	beq	.L909
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR83]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L908
+	cbz	w0, .L909
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR83]
-.L908:
+.L909:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
@@ -6844,12 +6855,12 @@ FtlRecoverySuperblock:
 	ldr	w1, [x28, #:lo12:.LANCHOR134]
 	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L909
+	beq	.L910
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L909
+	cbz	w0, .L910
 	cmn	w3, #1
-	beq	.L910
+	beq	.L911
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -6863,15 +6874,15 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L911
-.L912:
+	bne	.L912
+.L913:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L919:
+.L920:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L904
-.L934:
+	beq	.L905
+.L935:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -6879,7 +6890,7 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L925
+	bhi	.L926
 	mov	w2, 2057
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
@@ -6888,50 +6899,50 @@ FtlRecoverySuperblock:
 	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L925:
+.L926:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L926
+	cbz	w0, .L927
 	mov	w0, w3
-	b	.L993
-.L910:
+	b	.L994
+.L911:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L904
+	bne	.L905
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.L904:
+.L905:
 	add	x25, x25, 32
-	b	.L903
-.L911:
+	b	.L904
+.L912:
 	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L912
+	bne	.L913
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 96]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L912
+	cbz	w0, .L913
 	ldp	w0, w1, [x29, 184]
 	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L914
-.L992:
+	bne	.L915
+.L993:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L912
-.L914:
+	b	.L913
+.L915:
 	cmp	w0, w1
-	beq	.L912
+	beq	.L913
 	cmn	w0, #1
-	beq	.L915
+	beq	.L916
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -6940,70 +6951,70 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 96]
-.L916:
+.L917:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L917
+	beq	.L918
 	ldr	x0, [x29, 104]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L917
+	cbz	w0, .L918
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L912
-.L917:
+	cbz	w0, .L913
+.L918:
 	ldr	w1, [x29, 180]
-	b	.L992
-.L915:
+	b	.L993
+.L916:
 	str	w0, [x3]
-	b	.L916
-.L909:
+	b	.L917
+.L910:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L919
+	beq	.L920
 	cmn	w3, #1
-	beq	.L921
+	beq	.L922
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w3, lsr 10
-	bhi	.L921
+	bhi	.L922
 	adrp	x0, .LC27
 	mov	w1, w3
 	add	x0, x0, :lo12:.LC27
-.L995:
+.L996:
 	bl	printf
-	b	.L904
-.L921:
+	b	.L905
+.L922:
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L919
+	beq	.L920
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L934
+	beq	.L935
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L924
+	beq	.L925
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L924
+	beq	.L925
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L919
-.L924:
+	bne	.L920
+.L925:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -7014,54 +7025,54 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L919
+	beq	.L920
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L919
+	cbnz	w0, .L920
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-	b	.L919
-.L926:
+	b	.L920
+.L927:
 	adrp	x0, .LC28
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC28
-	b	.L995
-.L906:
+	b	.L996
+.L907:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L927
+	bhi	.L928
 	adrp	x1, .LANCHOR158
 	add	x1, x1, :lo12:.LANCHOR158
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L927:
+.L928:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L928
-.L994:
+	bne	.L929
+.L995:
 	str	w21, [x28, #:lo12:.LANCHOR134]
-	b	.L904
-.L928:
+	b	.L905
+.L929:
 	cmp	w21, w0
-	bcs	.L904
-	b	.L994
-.L931:
+	bcs	.L905
+	b	.L995
+.L932:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L930
-.L905:
+	b	.L931
+.L906:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L997
+	b	.L998
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -7089,10 +7100,10 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L999:
+.L1000:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L1001
+	bcc	.L1002
 	adrp	x22, .LANCHOR5
 	adrp	x24, .LC30
 	add	x22, x22, :lo12:.LANCHOR5
@@ -7101,13 +7112,13 @@ ftl_check_vpc:
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-.L1002:
+.L1003:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1004
+	bhi	.L1005
 	adrp	x0, .LANCHOR46
 	ldr	x19, [x0, #:lo12:.LANCHOR46]
-	cbz	x19, .L1005
+	cbz	x19, .L1006
 	adrp	x0, .LANCHOR48
 	adrp	x25, .LC31
 	add	x20, x20, :lo12:check_vpc_table
@@ -7125,17 +7136,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L1006:
+.L1007:
 	cmp	w22, w26
-	bne	.L1008
-.L1005:
-	cbz	w23, .L998
+	bne	.L1009
+.L1006:
+	cbz	w23, .L999
 	adrp	x0, .LC1
 	mov	w2, 2383
 	add	x1, x21, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L998:
+.L999:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7143,31 +7154,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1001:
+.L1002:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1000
+	beq	.L1001
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L1000:
+.L1001:
 	add	w22, w22, 1
-	b	.L999
-.L1004:
+	b	.L1000
+.L1005:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L1003
+	beq	.L1004
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -7175,34 +7186,34 @@ ftl_check_vpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L1003
+	beq	.L1004
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L1003:
+.L1004:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1002
-.L1008:
+	b	.L1003
+.L1009:
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1007
+	cbz	w2, .L1008
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L1007:
+.L1008:
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1005
+	beq	.L1006
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L1006
+	b	.L1007
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -7224,32 +7235,32 @@ ftl_scan_all_data:
 	add	x21, x21, :lo12:.LANCHOR152
 	str	x23, [sp, 64]
 	bl	printf
-.L1024:
+.L1025:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1030
+	bcc	.L1031
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L1030:
+.L1031:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L1025
+	bne	.L1026
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC33
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L1025:
+.L1026:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L1027
+	beq	.L1028
 	add	x0, x20, :lo12:.LANCHOR138
 	str	wzr, [x20, #:lo12:.LANCHOR138]
 	mov	w2, 0
@@ -7266,11 +7277,11 @@ ftl_scan_all_data:
 	ldr	w0, [x20, #:lo12:.LANCHOR138]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L1028
+	beq	.L1029
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1027
-.L1028:
+	beq	.L1028
+.L1029:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -7282,9 +7293,9 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC34
 	mov	w1, w19
 	bl	printf
-.L1027:
+.L1028:
 	add	w19, w19, 1
-	b	.L1024
+	b	.L1025
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -7303,28 +7314,28 @@ FtlGcScanTempBlk:
 	stp	x23, x24, [sp, 48]
 	cmp	w20, w0
 	str	x27, [sp, 80]
-	beq	.L1053
-	cbnz	w20, .L1033
-.L1034:
+	beq	.L1054
+	cbnz	w20, .L1034
+.L1035:
 	bl	FtlGcPageVarInit
-	b	.L1035
-.L1053:
+	b	.L1036
+.L1054:
 	mov	w20, 0
-.L1033:
+.L1034:
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w1
-	beq	.L1034
-.L1035:
+	beq	.L1035
+.L1036:
 	adrp	x26, .LANCHOR152
 	add	x26, x26, :lo12:.LANCHOR152
-.L1050:
+.L1051:
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	strb	wzr, [x19, 8]
 	cmp	w1, w0
-	beq	.L1036
-.L1052:
+	beq	.L1037
+.L1053:
 	adrp	x1, .LANCHOR64
 	adrp	x24, .LANCHOR103
 	add	x4, x19, 16
@@ -7342,24 +7353,24 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1037:
+.L1038:
 	cmp	x1, x4
-	bne	.L1039
+	bne	.L1040
 	mov	w1, w21
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L1040:
+.L1041:
 	cmp	x21, x22
-	bne	.L1051
+	bne	.L1052
 	adrp	x0, .LANCHOR19
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w20
-	bhi	.L1052
-.L1036:
+	bhi	.L1053
+.L1037:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
@@ -7376,10 +7387,10 @@ FtlGcScanTempBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1039:
+.L1040:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1038
+	beq	.L1039
 	ubfiz	x2, x21, 5, 16
 	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
@@ -7394,25 +7405,25 @@ FtlGcScanTempBlk:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1038:
+.L1039:
 	add	x4, x4, 2
-	b	.L1037
-.L1051:
+	b	.L1038
+.L1052:
 	ldr	x0, [x24, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w27, [x1, 4]
 	ldr	x23, [x1, 16]
-	cbnz	w0, .L1041
+	cbnz	w0, .L1042
 	ldrh	w1, [x23]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1063
+	beq	.L1064
 	ldr	w0, [x23, 8]
 	ldr	w1, [x26]
 	cmp	w0, w1
-	bls	.L1043
-.L1063:
+	bls	.L1044
+.L1064:
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x19]
 	mov	w20, 0
@@ -7425,26 +7436,26 @@ FtlGcScanTempBlk:
 	strh	w0, [x19]
 	strh	w0, [x1, #:lo12:.LANCHOR145]
 	bl	FtlGcPageVarInit
-	b	.L1050
-.L1043:
+	b	.L1051
+.L1044:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x23, 12]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	beq	.L1045
-.L1047:
+	beq	.L1046
+.L1048:
 	ldr	w2, [x23, 8]
-.L1064:
+.L1065:
 	ldr	w0, [x23, 12]
 	mov	w1, w27
 	add	x22, x22, 32
 	bl	FtlGcUpdatePage
-	b	.L1040
-.L1045:
+	b	.L1041
+.L1046:
 	cmn	w0, #1
-	beq	.L1047
+	beq	.L1048
 	str	w0, [x29, 116]
 	adrp	x0, .LANCHOR110
 	mov	w2, 0
@@ -7463,25 +7474,25 @@ FtlGcScanTempBlk:
 	add	x2, x2, x22
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L1048:
+.L1049:
 	cmp	x0, x1
-	beq	.L1047
+	beq	.L1048
 	ldr	x4, [x2, 8]
 	ldr	w5, [x4, x0]
 	add	x0, x0, 4
 	add	x4, x3, x0
 	ldr	w4, [x4, -4]
 	cmp	w5, w4
-	beq	.L1048
+	beq	.L1049
 	ldrh	w1, [x19]
 	adrp	x0, .LC35
 	ldr	w2, [x29, 116]
 	add	x0, x0, :lo12:.LC35
 	bl	printf
-	b	.L1063
-.L1041:
-	mov	w2, -1
 	b	.L1064
+.L1042:
+	mov	w2, -1
+	b	.L1065
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -7501,7 +7512,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1073
+	bhi	.L1074
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -7511,9 +7522,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1067:
-	cbnz	w20, .L1072
-.L1065:
+.L1068:
+	cbnz	w20, .L1073
+.L1066:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7522,7 +7533,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1072:
+.L1073:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR123
 	adrp	x27, .LANCHOR108
@@ -7535,9 +7546,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1069
+	cbz	w2, .L1070
 	cmp	w19, w1
-	beq	.L1069
+	beq	.L1070
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -7547,7 +7558,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1070:
+.L1071:
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	lsl	w22, w22, 7
@@ -7568,16 +7579,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1067
-.L1069:
+	b	.L1068
+.L1070:
 	ldrh	w2, [x26]
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-	b	.L1070
-.L1073:
+	b	.L1071
+.L1074:
 	mov	w23, -1
-	b	.L1065
+	b	.L1066
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -7590,7 +7601,7 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1078
+	bne	.L1079
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
@@ -7633,7 +7644,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1078:
+.L1079:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -7644,20 +7655,20 @@ FtlEctTblFlush:
 	adrp	x2, .LANCHOR164
 	ldrh	w1, [x2, #:lo12:.LANCHOR164]
 	cmp	w1, 31
-	bhi	.L1084
+	bhi	.L1085
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR164]
 	mov	w1, 1
-.L1081:
+.L1082:
 	adrp	x2, .LANCHOR118
-	cbnz	w0, .L1082
+	cbnz	w0, .L1083
 	ldr	x0, [x2, #:lo12:.LANCHOR118]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1086
-.L1082:
+	bcc	.L1087
+.L1083:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR118]
@@ -7680,10 +7691,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1084:
+.L1085:
 	mov	w1, 32
-	b	.L1081
-.L1086:
+	b	.L1082
+.L1087:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -7713,7 +7724,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1098
+	bhi	.L1099
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
@@ -7723,9 +7734,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1091:
-	cbnz	w21, .L1097
-.L1089:
+.L1092:
+	cbnz	w21, .L1098
+.L1090:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7734,7 +7745,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1097:
+.L1098:
 	ldr	x0, [x27, #:lo12:.LANCHOR123]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
@@ -7747,7 +7758,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1093
+	cbz	w4, .L1094
 	adrp	x28, .LANCHOR108
 	mov	w2, 1
 	str	w4, [x29, 96]
@@ -7767,7 +7778,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L1095
+	bne	.L1096
 	mov	w2, w4
 	mov	w1, w20
 	adrp	x0, .LC36
@@ -7780,28 +7791,28 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR161
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1095:
+.L1096:
 	ldr	x1, [x5, #:lo12:.LANCHOR108]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1096:
+.L1097:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1091
-.L1093:
+	b	.L1092
+.L1094:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1096
-.L1098:
+	b	.L1097
+.L1099:
 	mov	w24, -1
-	b	.L1089
+	b	.L1090
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -7822,7 +7833,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1101
+	beq	.L1102
 	adrp	x1, .LC37
 	adrp	x0, .LC38
 	add	x1, x1, :lo12:.LC37
@@ -7833,7 +7844,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR116]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1101:
+.L1102:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7858,18 +7869,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1104
+	beq	.L1105
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR135]
-.L1104:
+.L1105:
 	ldr	w1, [x19, #:lo12:.LANCHOR135]
 	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
 	adrp	x1, .LANCHOR91
-	bne	.L1105
+	bne	.L1106
 	adrp	x2, .LANCHOR162
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR162]
@@ -7904,7 +7915,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR93
 	str	w2, [x0, #:lo12:.LANCHOR93]
-.L1105:
+.L1106:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR90
 	ldr	w1, [x1, #:lo12:.LANCHOR91]
@@ -7935,7 +7946,7 @@ sftl_vendor_read:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1108
+	cbz	w1, .L1109
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -7956,16 +7967,16 @@ FtlMapBlkWriteDump_data:
 	str	x24, [x21, 16]
 	str	wzr, [x19, 56]
 	ldr	x25, [x19, 40]
-	cbz	w0, .L1110
+	cbz	w0, .L1111
 	adrp	x1, .LANCHOR20
 	ldrh	w1, [x1, #:lo12:.LANCHOR20]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1110
+	bge	.L1111
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1110
+	beq	.L1111
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -7978,16 +7989,16 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1110
+	beq	.L1111
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1110
+	bne	.L1111
 	ldr	x2, [x21, 8]
-.L1122:
+.L1123:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -7995,30 +8006,30 @@ FtlMapBlkWriteDump_data:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1110:
+.L1111:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR138
 	str	w1, [x0, 4]
-	cbz	w1, .L1111
+	cbz	w1, .L1112
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1112:
+.L1113:
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1122
-.L1111:
+	b	.L1123
+.L1112:
 	adrp	x1, .LANCHOR23
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1112
-.L1108:
+	b	.L1113
+.L1109:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
@@ -8138,7 +8149,7 @@ FtlVpcTblFlush:
 	add	x24, x24, :lo12:.LANCHOR20
 	str	w0, [x29, 108]
 	str	x24, [x29, 96]
-.L1124:
+.L1125:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
@@ -8150,7 +8161,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1125
+	blt	.L1126
 	ldrh	w0, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
@@ -8165,7 +8176,7 @@ FtlVpcTblFlush:
 	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1125:
+.L1126:
 	ldrh	w1, [x26, #:lo12:.LANCHOR23]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	bl	js_hash
@@ -8181,49 +8192,49 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1126
-	cmp	w0, 1
 	bne	.L1127
+	cmp	w0, 1
+	bne	.L1128
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	mov	w2, 1138
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1127:
+.L1128:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1128
+	bne	.L1129
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1128:
+.L1129:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w20, 3
-	bls	.L1124
+	bls	.L1125
 	add	x21, x21, :lo12:.LANCHOR138
 	adrp	x0, .LC39
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x21, 4]
 	bl	printf
-.L1130:
-	b	.L1130
-.L1126:
+.L1131:
+	b	.L1131
+.L1127:
 	cmp	w0, 1
-	beq	.L1124
+	beq	.L1125
 	cmp	w1, 256
-	beq	.L1124
+	beq	.L1125
 	ldr	w1, [x29, 108]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1131
+	beq	.L1132
 	ldrh	w0, [x29, 108]
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1131:
+.L1132:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8256,14 +8267,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmp	w0, 1
-	bne	.L1144
+	bne	.L1145
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1144:
+.L1145:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -8282,56 +8293,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1155
+	bhi	.L1156
 	cmp	w19, 31
-	bhi	.L1149
-.L1163:
+	bhi	.L1150
+.L1164:
 	mov	w0, 0
-.L1147:
+.L1148:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1149:
+.L1150:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1150
+	beq	.L1151
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1150:
+.L1151:
 	adrp	x22, .LANCHOR167
 	adrp	x23, .LANCHOR86
 	add	x22, x22, :lo12:.LANCHOR167
 	add	x23, x23, :lo12:.LANCHOR86
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1151:
+.L1152:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1153
+	bcs	.L1154
 	adrp	x0, .LANCHOR167
 	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1163
+	bls	.L1164
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1163
-.L1153:
+	b	.L1164
+.L1154:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1152
+	beq	.L1153
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -8346,14 +8357,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1152:
+.L1153:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1151
-.L1155:
+	b	.L1152
+.L1156:
 	mov	w0, -1
-	b	.L1147
+	b	.L1148
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -8369,25 +8380,25 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1165
+	bcs	.L1166
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
 	mov	w2, 2755
 	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1165:
+.L1166:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1166
+	beq	.L1167
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1167
+	cbz	w0, .L1168
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1166:
+.L1167:
 	adrp	x1, .LANCHOR131
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -8395,20 +8406,20 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR131]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1168
+	beq	.L1169
 	cmp	w19, w0
-	bne	.L1169
+	bne	.L1170
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1170
-.L1169:
-	bl	update_vpc_list
+	cbz	w1, .L1171
 .L1170:
+	bl	update_vpc_list
+.L1171:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR131]
-.L1168:
+.L1169:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8420,10 +8431,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1167:
+.L1168:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1166
+	b	.L1167
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -8449,12 +8460,12 @@ FtlProgPages:
 	add	x23, x23, :lo12:.LC40
 	add	x24, x24, :lo12:.LANCHOR3
 	bl	FlashProgPages
-.L1176:
+.L1177:
 	cmp	x21, x19
-	beq	.L1182
+	beq	.L1183
 	sub	x22, x19, #4
-	b	.L1183
-.L1178:
+	b	.L1184
+.L1179:
 	ldr	w1, [x19]
 	mov	x0, x23
 	bl	printf
@@ -8463,10 +8474,10 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1177
+	cbnz	w0, .L1178
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1177:
+.L1178:
 	mov	x0, x20
 	bl	get_new_active_ppa
 	str	w0, [x19]
@@ -8476,22 +8487,22 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1183:
+.L1184:
 	ldr	w2, [x19, -4]
 	cmp	w2, 256
 	ccmn	w2, #1, 4, ne
-	beq	.L1178
+	beq	.L1179
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x24]
 	cmp	w1, w0
-	bcc	.L1179
+	bcc	.L1180
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 982
+	mov	w2, 985
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1179:
+.L1180:
 	add	x1, x29, 80
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -8505,35 +8516,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1180
+	beq	.L1181
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1181
+	cbnz	w0, .L1182
 	adrp	x0, .LC41
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1181:
+.L1182:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1180:
+.L1181:
 	add	x19, x19, 32
-	b	.L1176
-.L1182:
+	b	.L1177
+.L1183:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1175
+	bcc	.L1176
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 997
+	mov	w2, 1000
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1175:
+.L1176:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8556,20 +8567,20 @@ FtlGcFreeTempBlock:
 	stp	x25, x26, [sp, 64]
 	cmp	w2, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1190
+	beq	.L1191
 	adrp	x1, .LANCHOR19
 	add	x0, x19, :lo12:.LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
-.L1190:
+.L1191:
 	adrp	x0, .LANCHOR133
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	str	wzr, [x0, #:lo12:.LANCHOR133]
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	beq	.L1192
+	beq	.L1193
 	ldrb	w1, [x0, 7]
 	adrp	x0, .LANCHOR19
 	adrp	x20, .LANCHOR70
@@ -8578,14 +8589,14 @@ FtlGcFreeTempBlock:
 	ldrh	w2, [x20, #:lo12:.LANCHOR70]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1193
+	beq	.L1194
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 164
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1193:
+.L1194:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x22, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
@@ -8604,19 +8615,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR84]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR84]
-.L1194:
+.L1195:
 	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L1198
+	bhi	.L1199
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1199
+	cbz	w1, .L1200
 	bl	INSERT_DATA_LIST
-.L1200:
+.L1201:
 	adrp	x0, .LANCHOR68
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR70]
@@ -8632,11 +8643,11 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR171]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1192
+	ble	.L1193
 	adrp	x0, .LANCHOR100
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-.L1192:
+.L1193:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8645,7 +8656,7 @@ FtlGcFreeTempBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1198:
+.L1199:
 	mov	w24, 12
 	ldr	x28, [x27, #:lo12:.LANCHOR71]
 	ldr	w1, [x25]
@@ -8653,18 +8664,18 @@ FtlGcFreeTempBlock:
 	add	x23, x28, x24
 	ldr	w0, [x23, 8]
 	cmp	w0, w1
-	bcc	.L1195
-.L1203:
+	bcc	.L1196
+.L1204:
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1204
-.L1195:
+	b	.L1205
+.L1196:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
 	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1197
+	bne	.L1198
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -8673,20 +8684,20 @@ FtlGcFreeTempBlock:
 	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L1204:
+.L1205:
 	bl	decrement_vpc_count
-	b	.L1196
-.L1197:
+	b	.L1197
+.L1198:
 	ldr	w0, [x23, 4]
 	cmp	w1, w0
-	bne	.L1203
-.L1196:
+	bne	.L1204
+.L1197:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1194
-.L1199:
+	b	.L1195
+.L1200:
 	bl	INSERT_FREE_LIST
-	b	.L1200
+	b	.L1201
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -8705,7 +8716,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1205
+	bcc	.L1206
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapBlkWriteDump_data
@@ -8713,7 +8724,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR133
 	str	wzr, [x0, #:lo12:.LANCHOR133]
-.L1205:
+.L1206:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8765,44 +8776,44 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1211:
+.L1212:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1214
+	bcc	.L1215
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1216
+	cbnz	w0, .L1217
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
 	mov	w0, 1
-.L1210:
+.L1211:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1214:
+.L1215:
 	ldr	x2, [x20, #:lo12:.LANCHOR104]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L1212
-.L1218:
+	bne	.L1213
+.L1219:
 	ldr	w1, [x1, 4]
 	ldr	w0, [x3, 12]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1211
-.L1212:
+	b	.L1212
+.L1213:
 	ldr	w2, [x3, 8]
-	b	.L1218
-.L1216:
+	b	.L1219
+.L1217:
 	mov	w0, 0
-	b	.L1210
+	b	.L1211
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -8817,11 +8828,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1220
+	beq	.L1221
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1221
-.L1220:
+	cbnz	w0, .L1222
+.L1221:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -8835,7 +8846,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1221:
+.L1222:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8855,69 +8866,69 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1280
+	cbnz	w1, .L1281
 	adrp	x1, .LANCHOR44
 	ldrh	w1, [x1, #:lo12:.LANCHOR44]
 	cmp	w1, 47
-	bls	.L1280
+	bls	.L1281
 	adrp	x1, .LANCHOR73
 	mov	w4, 65535
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w3, w4
-	beq	.L1225
+	beq	.L1226
 	adrp	x2, .LANCHOR72
 	ldrh	w5, [x2, #:lo12:.LANCHOR72]
 	cmp	w5, w4
-	bne	.L1225
+	bne	.L1226
 	strh	w3, [x2, #:lo12:.LANCHOR72]
 	mov	w2, -1
 	strh	w2, [x1, #:lo12:.LANCHOR73]
-.L1225:
-	cbnz	w0, .L1281
+.L1226:
+	cbnz	w0, .L1282
 	adrp	x1, .LANCHOR48
 	ldrh	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 24
-	bhi	.L1282
+	bhi	.L1283
 	adrp	x2, .LANCHOR19
 	cmp	w1, 16
 	ldrh	w20, [x2, #:lo12:.LANCHOR19]
-	bls	.L1228
+	bls	.L1229
 	lsr	w20, w20, 5
-.L1227:
+.L1228:
 	adrp	x2, .LANCHOR100
 	ldrh	w3, [x2, #:lo12:.LANCHOR100]
 	cmp	w3, w1
 	mov	x3, x2
-	bcs	.L1231
+	bcs	.L1232
 	adrp	x1, .LANCHOR53
 	mov	w4, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w4
-	bne	.L1232
+	bne	.L1233
 	adrp	x4, .LANCHOR72
 	ldrh	w4, [x4, #:lo12:.LANCHOR72]
 	cmp	w4, w1
-	bne	.L1232
+	bne	.L1233
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1233
+	cbnz	w0, .L1234
 	adrp	x1, .LANCHOR152
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR152]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1234
-.L1233:
+	bcs	.L1235
+.L1234:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1235:
+.L1236:
 	adrp	x1, .LANCHOR95
 	str	wzr, [x1, #:lo12:.LANCHOR95]
-.L1223:
+.L1224:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8925,75 +8936,75 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1228:
+.L1229:
 	cmp	w1, 12
-	bls	.L1229
+	bls	.L1230
 	lsr	w20, w20, 4
-	b	.L1227
-.L1229:
+	b	.L1228
+.L1230:
 	cmp	w1, 8
-	bls	.L1227
+	bls	.L1228
 	lsr	w20, w20, 2
-	b	.L1227
-.L1282:
+	b	.L1228
+.L1283:
 	mov	w20, 1
-	b	.L1227
-.L1234:
+	b	.L1228
+.L1235:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR100]
-	b	.L1235
-.L1232:
+	b	.L1236
+.L1233:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1231:
+.L1232:
 	adrp	x1, .LANCHOR74
 	ldrh	w1, [x1, #:lo12:.LANCHOR74]
-	cbz	w1, .L1226
+	cbz	w1, .L1227
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1226:
+.L1227:
 	adrp	x19, .LANCHOR145
 	str	w0, [x29, 152]
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w2, w0
-	bne	.L1238
+	bne	.L1239
 	adrp	x0, .LANCHOR72
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w2
-	beq	.L1239
+	beq	.L1240
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1240
+	cbnz	w1, .L1241
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1240:
+.L1241:
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	strh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1239:
+.L1240:
 	add	x0, x19, :lo12:.LANCHOR145
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	beq	.L1238
+	beq	.L1239
 	bl	IsBlkInGcList
-	cbz	w0, .L1242
+	cbz	w0, .L1243
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1242:
+.L1243:
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR145
 	cmp	w1, w0
-	beq	.L1238
+	beq	.L1239
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR173
@@ -9006,37 +9017,37 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1238:
+.L1239:
 	adrp	x1, .LANCHOR51
 	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1243
+	beq	.L1244
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1243
+	beq	.L1244
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1244
-.L1243:
+	bne	.L1245
+.L1244:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1244:
+.L1245:
 	adrp	x25, .LANCHOR102
 	add	x26, x25, :lo12:.LANCHOR102
-.L1278:
+.L1279:
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1245
+	bne	.L1246
 	adrp	x0, .LANCHOR95
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR95]
-.L1246:
+.L1247:
 	ldrh	w5, [x25, #:lo12:.LANCHOR102]
 	add	x7, x25, :lo12:.LANCHOR102
 	mov	w0, w5
@@ -9045,21 +9056,21 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1247
+	bne	.L1248
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1223
-.L1281:
+	b	.L1224
+.L1282:
 	mov	w20, 1
-	b	.L1226
-.L1247:
+	b	.L1227
+.L1248:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1248
+	cbz	w0, .L1249
 	strh	w5, [x25, #:lo12:.LANCHOR102]
-	b	.L1246
-.L1248:
+	b	.L1247
+.L1249:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -9071,77 +9082,77 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1250
+	bgt	.L1251
 	cmp	w5, 48
-	bls	.L1251
+	bls	.L1252
 	cmp	w3, 8
-	bls	.L1251
+	bls	.L1252
 	adrp	x3, .LANCHOR68
 	ldrh	w3, [x3, #:lo12:.LANCHOR68]
 	cmp	w3, 35
-	bhi	.L1251
-.L1250:
-	strh	wzr, [x26]
+	bhi	.L1252
 .L1251:
+	strh	wzr, [x26]
+.L1252:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1252
+	bgt	.L1253
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1252
+	bhi	.L1253
 	mov	w0, -1
 	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1311:
+.L1312:
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1223
-.L1252:
-	cbnz	w1, .L1253
+	b	.L1224
+.L1253:
+	cbnz	w1, .L1254
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1246
-.L1253:
+	b	.L1247
+.L1254:
 	add	x0, x19, :lo12:.LANCHOR145
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1254
+	bne	.L1255
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 717
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1254:
+.L1255:
 	adrp	x0, .LANCHOR52
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1255
+	bne	.L1256
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 718
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1255:
+.L1256:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1256
+	bne	.L1257
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 719
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1256:
+.L1257:
 	add	x22, x19, :lo12:.LANCHOR145
 	mov	x0, x22
 	bl	make_superblock
@@ -9154,7 +9165,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR174]
 	strb	wzr, [x22, 6]
-.L1245:
+.L1246:
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR19
@@ -9162,7 +9173,7 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1257
+	cbz	w0, .L1258
 	adrp	x0, .LANCHOR3
 	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
@@ -9175,23 +9186,23 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1257:
+.L1258:
 	add	x0, x19, :lo12:.LANCHOR145
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1258
+	ble	.L1259
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1258:
+.L1259:
 	adrp	x0, .LANCHOR173
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 144]
-.L1259:
+.L1260:
 	cmp	w20, w28, uxth
-	bls	.L1267
+	bls	.L1268
 	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x0, .LANCHOR3
 	adrp	x23, .LANCHOR66
@@ -9203,24 +9214,24 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1268
-.L1261:
+	b	.L1269
+.L1262:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1260
+	beq	.L1261
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1260:
+.L1261:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1268:
+.L1269:
 	cmp	w2, w7
-	bne	.L1261
+	bne	.L1262
 	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x24, .LANCHOR62
 	add	x24, x24, :lo12:.LANCHOR62
@@ -9230,26 +9241,26 @@ rk_ftl_garbage_collect:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L1262:
+.L1263:
 	ldr	x0, [x29, 136]
 	cmp	x22, x0
-	bne	.L1266
+	bne	.L1267
 	add	w28, w28, 1
-	b	.L1259
-.L1266:
+	b	.L1260
+.L1267:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1263
+	beq	.L1264
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1263
+	bne	.L1264
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1264
+	bne	.L1265
 	str	w4, [x29, 112]
 	mov	w2, 753
 	adrp	x1, .LANCHOR175
@@ -9258,7 +9269,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 112]
-.L1264:
+.L1265:
 	mov	w2, 0
 	add	x1, x29, 168
 	mov	w0, w4
@@ -9268,7 +9279,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1263
+	bne	.L1264
 	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR104
 	ldr	x2, [x29, 144]
@@ -9310,22 +9321,22 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1265
+	beq	.L1266
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1263
-.L1265:
+	cbnz	w0, .L1264
+.L1266:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1263
+	cbz	w0, .L1264
 	add	x0, x19, :lo12:.LANCHOR145
 	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR94]
 	strh	w1, [x19, #:lo12:.LANCHOR145]
 	strh	wzr, [x0, 2]
-	b	.L1311
-.L1263:
+	b	.L1312
+.L1264:
 	add	x22, x22, 32
-	b	.L1262
-.L1267:
+	b	.L1263
+.L1268:
 	add	x1, x19, :lo12:.LANCHOR145
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
@@ -9333,25 +9344,25 @@ rk_ftl_garbage_collect:
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1269
+	bhi	.L1270
 	adrp	x0, .LANCHOR62
 	ldr	w0, [x0, #:lo12:.LANCHOR62]
-	cbz	w0, .L1270
+	cbz	w0, .L1271
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1270
+	cbz	w0, .L1271
 	str	wzr, [x21, #:lo12:.LANCHOR94]
-	b	.L1311
-.L1270:
+	b	.L1312
+.L1271:
 	adrp	x0, .LANCHOR173
 	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1271
+	cbnz	w0, .L1272
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x20, .LANCHOR42
 	add	x0, x19, :lo12:.LANCHOR145
 	ldr	x3, [x20, #:lo12:.LANCHOR42]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L1271
+	cbz	w4, .L1272
 	adrp	x2, .LANCHOR174
 	adrp	x22, .LANCHOR152
 	add	x23, x22, :lo12:.LANCHOR152
@@ -9362,31 +9373,31 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L1272:
+.L1273:
 	ldr	w0, [x23]
 	cmp	w24, w0
-	bcs	.L1274
+	bcs	.L1275
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 172]
 	cmn	w3, #1
-	beq	.L1273
+	beq	.L1274
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0, uxth
-	bne	.L1273
+	bne	.L1274
 	adrp	x0, .LC43
 	mov	w2, w3
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1274:
+.L1275:
 	ldr	w0, [x22, #:lo12:.LANCHOR152]
 	cmp	w24, w0
-	bcc	.L1271
+	bcc	.L1272
 	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x20, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
@@ -9394,27 +9405,27 @@ rk_ftl_garbage_collect:
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1271:
+.L1272:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR145]
-.L1269:
+.L1270:
 	adrp	x0, .LANCHOR48
 	str	wzr, [x21, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1277
+	bhi	.L1278
 	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1278
-.L1273:
+	b	.L1279
+.L1274:
 	add	w24, w24, 1
-	b	.L1272
-.L1277:
+	b	.L1273
+.L1278:
 	add	w0, w0, 1
-	b	.L1223
-.L1280:
+	b	.L1224
+.L1281:
 	mov	w0, 0
-	b	.L1223
+	b	.L1224
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
@@ -9433,13 +9444,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1313
+	bne	.L1314
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1312:
+.L1313:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9448,18 +9459,18 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1313:
+.L1314:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1334
+	bhi	.L1335
 	adrp	x0, .LANCHOR166
 	ldr	w21, [x0, #:lo12:.LANCHOR166]
 	cmn	w21, #1
-	beq	.L1312
+	beq	.L1313
 	adrp	x22, .LANCHOR12
 	adrp	x25, .LANCHOR135
 	add	x25, x25, :lo12:.LANCHOR135
@@ -9487,47 +9498,47 @@ FtlRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR89]
-.L1315:
+.L1316:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1332
+	cbnz	w0, .L1333
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L1333
+	cbnz	w0, .L1334
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1312
-.L1333:
+	bhi	.L1313
+.L1334:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1312
-.L1332:
+	b	.L1313
+.L1333:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1316
+	bne	.L1317
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1317:
+.L1318:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1319
-.L1320:
+	bcc	.L1320
+.L1321:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1324
+	beq	.L1325
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1315
-.L1324:
-	cbz	w27, .L1315
+	bne	.L1316
+.L1325:
+	cbz	w27, .L1316
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	mov	w1, w27
 	mov	w2, 0
@@ -9546,57 +9557,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1331:
+.L1332:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1326
+	bne	.L1327
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR109
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1327
+	bne	.L1328
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1345:
+.L1346:
 	bl	ftl_memcpy
-.L1327:
+.L1328:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1328
+	beq	.L1329
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1328:
+.L1329:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1329
+	bne	.L1330
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1330:
+.L1331:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1331
+	bne	.L1332
 	mov	w27, 0
-	b	.L1315
-.L1319:
+	b	.L1316
+.L1320:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1318
+	bhi	.L1319
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1318
+	bls	.L1319
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -9607,17 +9618,17 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1318:
+.L1319:
 	add	w4, w4, 1
-	b	.L1317
-.L1316:
+	b	.L1318
+.L1317:
 	ldr	x2, [x28, #:lo12:.LANCHOR103]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1321
+	bne	.L1322
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	str	x1, [x0, 8]
@@ -9630,9 +9641,9 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1322
+	bne	.L1323
 	str	x23, [x0, 8]
-.L1322:
+.L1323:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR115
 	str	w20, [x0, 24]
@@ -9643,10 +9654,10 @@ FtlRead:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1320
-.L1321:
+	b	.L1321
+.L1322:
 	cmp	w20, w24
-	bne	.L1323
+	bne	.L1324
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	adrp	x1, .LANCHOR110
 	ldr	w3, [x29, 136]
@@ -9656,25 +9667,25 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1322
-.L1344:
+	bne	.L1323
+.L1345:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1322
-.L1323:
+	b	.L1323
+.L1324:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1344
-.L1326:
+	b	.L1345
+.L1327:
 	cmp	w24, w1
-	bne	.L1327
+	bne	.L1328
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	cmp	x1, x0
-	bne	.L1327
+	bne	.L1328
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -9682,18 +9693,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1345
-.L1329:
+	b	.L1346
+.L1330:
 	cmp	w1, 256
-	bne	.L1330
+	bne	.L1331
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1330
-.L1334:
+	b	.L1331
+.L1335:
 	mov	w21, -1
-	b	.L1312
+	b	.L1313
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -9723,12 +9734,12 @@ FtlWrite:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 172]
-	bne	.L1348
+	bne	.L1349
 	add	w0, w1, 256
 	ldr	w1, [x29, 172]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1347:
+.L1348:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9736,7 +9747,7 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1348:
+.L1349:
 	ldr	w0, [x29, 172]
 	add	w0, w1, w0
 	str	w0, [x29, 152]
@@ -9744,11 +9755,11 @@ FtlWrite:
 	ldr	w1, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1380
+	bhi	.L1381
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmn	w0, #1
-	beq	.L1347
+	beq	.L1348
 	adrp	x0, .LANCHOR176
 	mov	w1, 2048
 	ldr	w2, [x29, 152]
@@ -9775,8 +9786,8 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR51
 	add	x20, x0, :lo12:.LANCHOR51
-.L1350:
-	cbnz	w24, .L1375
+.L1351:
+	cbnz	w24, .L1376
 	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
@@ -9784,11 +9795,11 @@ FtlWrite:
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1376
-.L1378:
+	bls	.L1377
+.L1379:
 	mov	w0, 0
-	b	.L1347
-.L1375:
+	b	.L1348
+.L1376:
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	adrp	x1, .LANCHOR3
@@ -9796,19 +9807,19 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR3]
 	cmp	w2, w0
-	bcc	.L1351
+	bcc	.L1352
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1038
+	mov	w2, 1041
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1351:
+.L1352:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1352
+	cbnz	w0, .L1353
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1352:
+.L1353:
 	ldrb	w0, [x20, 7]
 	ldrh	w1, [x20, 4]
 	lsl	w0, w0, 2
@@ -9821,14 +9832,14 @@ FtlWrite:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1353
+	bcc	.L1354
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1071
+	mov	w2, 1074
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1353:
+.L1354:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	mov	x28, 0
@@ -9836,33 +9847,33 @@ FtlWrite:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 96]
-.L1354:
+.L1355:
 	ldr	w0, [x29, 148]
 	mov	w22, w28
 	adrp	x27, .LANCHOR105
 	cmp	w28, w0
-	bcc	.L1373
+	bcc	.L1374
 	mov	x22, x0
-.L1355:
+.L1356:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x3, x20
 	mov	w2, 0
 	mov	w1, w22
 	bl	FtlProgPages
 	cmp	w24, w22
-	bcs	.L1374
+	bcs	.L1375
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1149
+	mov	w2, 1152
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1374:
+.L1375:
 	sub	w24, w24, w22
-	b	.L1350
-.L1373:
+	b	.L1351
+.L1374:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1355
+	cbz	w0, .L1356
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w19
@@ -9891,10 +9902,10 @@ FtlWrite:
 	ldr	w0, [x29, 144]
 	cmp	w19, w25
 	ccmp	w19, w0, 4, ne
-	bne	.L1356
+	bne	.L1357
 	cmp	w19, w25
 	ldr	x0, [x29, 160]
-	bne	.L1357
+	bne	.L1358
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	udiv	w0, w23, w2
 	msub	w0, w0, w2, w23
@@ -9904,30 +9915,30 @@ FtlWrite:
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
 	str	w0, [x29, 168]
-.L1358:
+.L1359:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 168]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
 	cmp	w1, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	bne	.L1359
+	bne	.L1360
 	add	x21, x0, x21
 	cmp	w19, w25
-	bne	.L1360
+	bne	.L1361
 	str	x26, [x21, 8]
-.L1361:
+.L1362:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1370
+	bcc	.L1371
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1140
+	mov	w2, 1143
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1370:
+.L1371:
 	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
 	add	x28, x28, 1
@@ -9944,35 +9955,35 @@ FtlWrite:
 	str	w0, [x22, 12]
 	ldrh	w0, [x20]
 	strh	w0, [x22, 2]
-	b	.L1354
-.L1357:
+	b	.L1355
+.L1358:
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x29, 152]
 	str	wzr, [x29, 156]
 	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
 	str	w0, [x29, 168]
-	b	.L1358
-.L1360:
+	b	.L1359
+.L1361:
 	ldr	w0, [x29, 168]
-.L1388:
+.L1389:
 	mul	w0, w0, w19
 	sub	w0, w0, w23
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x21, 8]
-	b	.L1361
-.L1359:
+	b	.L1362
+.L1360:
 	add	x0, x0, x21
 	cmp	w19, w25
-	bne	.L1362
+	bne	.L1363
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
-.L1387:
+.L1388:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1364
+	beq	.L1365
 	str	w0, [x29, 196]
 	mov	w2, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
@@ -9985,7 +9996,7 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w3, [x29, 192]
 	cmn	w3, #1
-	bne	.L1365
+	bne	.L1366
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
 	mov	w2, w19
@@ -9996,11 +10007,11 @@ FtlWrite:
 	adrp	x0, .LC44
 	add	x0, x0, :lo12:.LC44
 	bl	printf
-.L1368:
+.L1369:
 	ldr	w0, [x29, 168]
 	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1369
+	bne	.L1370
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x1, x26
 	add	x21, x0, x21
@@ -10008,17 +10019,17 @@ FtlWrite:
 	ldr	x3, [x21, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1389:
+.L1390:
 	bl	ftl_memcpy
-	b	.L1361
-.L1362:
+	b	.L1362
+.L1363:
 	adrp	x1, .LANCHOR110
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
-	b	.L1387
-.L1365:
+	b	.L1388
+.L1366:
 	ldr	w1, [x22, 8]
 	cmp	w19, w1
-	beq	.L1367
+	beq	.L1368
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
@@ -10028,18 +10039,18 @@ FtlWrite:
 	mov	w2, w19
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L1367:
+.L1368:
 	ldr	w0, [x22, 8]
 	cmp	w19, w0
-	beq	.L1368
-	mov	w2, 1125
+	beq	.L1369
+	mov	w2, 1128
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1368
-.L1364:
+	b	.L1369
+.L1365:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	ldr	x1, [x29, 96]
 	add	x0, x0, x21
@@ -10047,8 +10058,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1368
-.L1369:
+	b	.L1369
+.L1370:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR12]
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
@@ -10058,14 +10069,14 @@ FtlWrite:
 	ldr	x0, [x21, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1389
-.L1356:
+	b	.L1390
+.L1357:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	add	x21, x0, x21
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1388
-.L1376:
+	b	.L1389
+.L1377:
 	adrp	x23, .LANCHOR72
 	adrp	x20, .LANCHOR101
 	adrp	x21, .LANCHOR100
@@ -10073,19 +10084,19 @@ FtlWrite:
 	add	x20, x20, :lo12:.LANCHOR101
 	add	x21, x21, :lo12:.LANCHOR100
 	mov	w19, 256
-.L1379:
+.L1380:
 	adrp	x0, .LANCHOR145
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	bne	.L1377
+	bne	.L1378
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1377
+	bne	.L1378
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1377:
+.L1378:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -10097,13 +10108,13 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1378
+	bhi	.L1379
 	subs	w19, w19, #1
-	bne	.L1379
-	b	.L1378
-.L1380:
+	bne	.L1380
+	b	.L1379
+.L1381:
 	mov	w0, -1
-	b	.L1347
+	b	.L1348
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
@@ -10145,10 +10156,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1392
-.L1403:
+	bne	.L1393
+.L1404:
 	mov	w0, -1
-.L1391:
+.L1392:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10156,7 +10167,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1392:
+.L1393:
 	add	x24, x20, :lo12:.LANCHOR139
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -10168,28 +10179,28 @@ FtlLoadSysInfo:
 	ldrsh	w24, [x20, #:lo12:.LANCHOR139]
 	add	x26, x26, :lo12:.LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR178
-.L1394:
-	tbz	w28, #31, .L1400
+.L1395:
+	tbz	w28, #31, .L1401
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1465
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1399:
+.L1400:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1402
+	bcs	.L1403
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1467
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1402:
+.L1403:
 	add	x24, x19, :lo12:.LANCHOR138
 	adrp	x19, .LANCHOR39
 	add	x22, x19, :lo12:.LANCHOR39
@@ -10218,7 +10229,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1403
+	bne	.L1404
 	add	x20, x20, :lo12:.LANCHOR139
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x22, 8]
@@ -10226,7 +10237,7 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1403
+	bne	.L1404
 	adrp	x0, .LANCHOR179
 	adrp	x2, .LANCHOR152
 	adrp	x3, .LANCHOR3
@@ -10251,14 +10262,14 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR171
 	strh	w0, [x3, #:lo12:.LANCHOR171]
-	bls	.L1404
+	bls	.L1405
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1489
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1404:
+.L1405:
 	add	x4, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x2, x0, :lo12:.LANCHOR51
@@ -10323,47 +10334,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR82
 	ldr	w4, [x1, #:lo12:.LANCHOR82]
 	cmp	w3, w4
-	bls	.L1405
+	bls	.L1406
 	str	w3, [x1, #:lo12:.LANCHOR82]
-.L1405:
+.L1406:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR83
 	ldr	w3, [x1, #:lo12:.LANCHOR83]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1406
+	bls	.L1407
 	str	w2, [x1, #:lo12:.LANCHOR83]
-.L1406:
+.L1407:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1407
+	beq	.L1408
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L1407:
+.L1408:
 	ldrh	w2, [x20, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1408
+	beq	.L1409
 	bl	make_superblock
-.L1408:
+.L1409:
 	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1409
+	beq	.L1410
 	bl	make_superblock
-.L1409:
+.L1410:
 	ldrh	w2, [x22, #:lo12:.LANCHOR145]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR145
 	cmp	w2, w1
-	beq	.L1410
+	beq	.L1411
 	bl	make_superblock
-.L1410:
+.L1411:
 	mov	w0, 0
-	b	.L1391
-.L1400:
+	b	.L1392
+.L1401:
 	add	x3, x19, :lo12:.LANCHOR138
 	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
@@ -10377,15 +10388,15 @@ FtlLoadSysInfo:
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w8, [x0, 12]
-	cbz	w8, .L1395
+	cbz	w8, .L1396
 	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1395
+	beq	.L1396
 	ldrh	w1, [x26]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w8, w0
-	beq	.L1395
+	beq	.L1396
 	add	x10, x20, :lo12:.LANCHOR139
 	mov	w6, w0
 	mov	w5, w8
@@ -10397,39 +10408,39 @@ FtlLoadSysInfo:
 	add	x0, x0, :lo12:.LC46
 	str	x10, [x29, 104]
 	bl	printf
-	cbnz	w28, .L1396
+	cbnz	w28, .L1397
 	ldr	x10, [x29, 104]
 	ldrh	w0, [x10, 4]
 	cmp	w24, w0
-	beq	.L1396
+	beq	.L1397
 	sxth	w24, w0
 	adrp	x0, .LANCHOR20
 	ldrh	w7, [x0, #:lo12:.LANCHOR20]
 	sub	w7, w7, #1
-.L1422:
+.L1423:
 	sxth	w28, w7
-	b	.L1394
-.L1396:
+	b	.L1395
+.L1397:
 	mov	w0, -1
 	str	w0, [x19, #:lo12:.LANCHOR138]
-.L1395:
+.L1396:
 	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1398
+	beq	.L1399
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L1398
+	bne	.L1399
 	ldr	x0, [x25, #:lo12:.LANCHOR114]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	beq	.L1399
-.L1398:
+	beq	.L1400
+.L1399:
 	sub	w7, w28, #1
-	b	.L1422
+	b	.L1423
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -10478,14 +10489,14 @@ FtlMapTblRecovery:
 	add	x0, x26, :lo12:.LANCHOR20
 	str	w1, [x19, 56]
 	str	x0, [x29, 96]
-.L1424:
+.L1425:
 	ldr	w0, [x29, 152]
 	cmp	w20, w0
-	bge	.L1443
+	bge	.L1444
 	ldr	w0, [x29, 108]
 	sxtw	x28, w20
 	cmp	w20, w0
-	bne	.L1425
+	bne	.L1426
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x26, x24, x0
@@ -10506,21 +10517,21 @@ FtlMapTblRecovery:
 	add	x28, x28, :lo12:.LANCHOR180
 	ldr	x0, [x29, 128]
 	add	x22, x0, :lo12:.LANCHOR138
-.L1426:
+.L1427:
 	ldr	w0, [x29, 152]
 	cmp	w24, w0
-	ble	.L1429
-.L1443:
+	ble	.L1430
+.L1444:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L1431
+	bne	.L1432
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1431:
+.L1432:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -10533,7 +10544,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1429:
+.L1430:
 	ldrh	w0, [x26]
 	mov	w2, 1
 	mov	w1, w2
@@ -10545,16 +10556,16 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1427
+	cbz	w0, .L1428
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1427
+	beq	.L1428
 	ldrh	w1, [x27]
 	ldr	x0, [x22, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1427
+	beq	.L1428
 	mov	w5, w0
 	mov	x4, x1
 	mov	w3, w24
@@ -10565,25 +10576,25 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x22]
-.L1427:
+.L1428:
 	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1428
+	beq	.L1429
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1428
+	bls	.L1429
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1428
+	bne	.L1429
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x22, 4]
 	str	w1, [x23, x0]
-.L1428:
+.L1429:
 	add	w6, w24, 1
 	sxth	w24, w6
-	b	.L1426
-.L1425:
+	b	.L1427
+.L1426:
 	lsl	x2, x28, 1
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	str	x0, [x27, 8]
@@ -10600,16 +10611,16 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1445
+	beq	.L1446
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1445
+	bne	.L1446
 	ldrh	w1, [x21, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L1433
-.L1445:
+	beq	.L1434
+.L1446:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	mov	w28, 0
@@ -10617,11 +10628,11 @@ FtlMapTblRecovery:
 	adrp	x0, .LANCHOR180
 	add	x0, x0, :lo12:.LANCHOR180
 	str	x0, [x29, 112]
-.L1434:
+.L1435:
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	cmp	w28, w0
-	bge	.L1441
+	bge	.L1442
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	mov	w1, w2
@@ -10634,17 +10645,17 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1438
+	cbz	w0, .L1439
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1438
+	beq	.L1439
 	ldr	x0, [x29, 120]
 	ldrh	w1, [x0]
 	ldr	x0, [x27, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1438
+	beq	.L1439
 	mov	x4, x1
 	ldr	x1, [x29, 112]
 	mov	w5, w0
@@ -10655,51 +10666,51 @@ FtlMapTblRecovery:
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1438:
+.L1439:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1439
+	beq	.L1440
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1439
+	bls	.L1440
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1439
+	bne	.L1440
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x23, x0]
-.L1439:
+.L1440:
 	add	w7, w28, 1
 	sxth	w28, w7
-	b	.L1434
-.L1433:
+	b	.L1435
+.L1434:
 	ldrh	w3, [x26, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR106]
 	sub	w3, w3, #1
-.L1435:
+.L1436:
 	cmp	w0, w3
-	blt	.L1437
-.L1441:
+	blt	.L1438
+.L1442:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L1424
-.L1437:
+	b	.L1425
+.L1438:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x4, x1]
 	cmp	w25, w1
-	bls	.L1436
+	bls	.L1437
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x4, x2, lsl 2]
 	str	w2, [x23, x1]
-.L1436:
+.L1437:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1435
+	b	.L1436
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -10773,20 +10784,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR139]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1470
-.L1472:
+	bne	.L1471
+.L1473:
 	mov	w21, -1
-.L1469:
+.L1470:
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1470:
+.L1471:
 	bl	FtlLoadSysInfo
 	mov	w21, w0
-	cbnz	w0, .L1472
+	cbnz	w0, .L1473
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10802,19 +10813,19 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1473:
+.L1474:
 	cmp	w0, w2
-	bge	.L1478
+	bge	.L1479
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1474
-.L1478:
+	tbz	w3, #31, .L1475
+.L1479:
 	adrp	x3, .LANCHOR83
 	cmp	w0, w2
 	ldr	w1, [x3, #:lo12:.LANCHOR83]
 	add	w1, w1, 32
 	str	w1, [x3, #:lo12:.LANCHOR83]
-	bge	.L1480
-.L1475:
+	bge	.L1481
+.L1476:
 	adrp	x23, .LANCHOR51
 	add	x20, x23, :lo12:.LANCHOR51
 	mov	x0, x20
@@ -10853,17 +10864,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1482:
+.L1483:
 	bl	FtlVpcTblFlush
-	b	.L1469
-.L1474:
+	b	.L1470
+.L1475:
 	add	w0, w0, 1
-	b	.L1473
-.L1480:
+	b	.L1474
+.L1481:
 	ldrh	w0, [x19, #:lo12:.LANCHOR156]
-	cbnz	w0, .L1475
+	cbnz	w0, .L1476
 	bl	l2p_flush
-	b	.L1482
+	b	.L1483
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -10886,9 +10897,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR82]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1484
+	cbz	w0, .L1485
 	bl	FtlMakeBbt
-.L1484:
+.L1485:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR109
 	mov	w6, 23752
@@ -10899,31 +10910,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-.L1485:
+.L1486:
 	cmp	w0, w1
-	blt	.L1486
+	blt	.L1487
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1487:
+.L1488:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1488
+	bhi	.L1489
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1489
-.L1493:
+	bgt	.L1490
+.L1494:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1490:
+.L1491:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1494
+	bhi	.L1495
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -10940,28 +10951,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1495
+	ble	.L1496
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR152]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1495:
+.L1496:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1497
+	cbz	w1, .L1498
 	ldrh	w6, [x2, #:lo12:.LANCHOR171]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1497
+	bge	.L1498
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1497:
+.L1498:
 	ldrh	w1, [x2, #:lo12:.LANCHOR171]
 	adrp	x25, .LANCHOR179
 	ldr	w0, [x3, #:lo12:.LANCHOR152]
@@ -11005,20 +11016,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1499:
+.L1500:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1500
+	cbnz	w1, .L1501
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1499
-.L1486:
+	b	.L1500
+.L1487:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -11026,8 +11037,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1485
-.L1488:
+	b	.L1486
+.L1489:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -11035,8 +11046,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1487
-.L1489:
+	b	.L1488
+.L1490:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -11046,17 +11057,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1491:
+.L1492:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1493
+	bls	.L1494
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1491
-.L1494:
+	b	.L1492
+.L1495:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -11064,8 +11075,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1490
-.L1500:
+	b	.L1491
+.L1501:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11085,20 +11096,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1501:
+.L1502:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1502
+	cbnz	w1, .L1503
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1501
-.L1502:
+	b	.L1502
+.L1503:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11124,11 +11135,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1503
+	cbnz	w0, .L1504
 	adrp	x0, .LANCHOR166
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR166]
-.L1503:
+.L1504:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11163,19 +11174,19 @@ sftl_init:
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.L1509:
+.L1510:
 	bl	FtlLoadBbt
-	cbz	w0, .L1510
-.L1520:
+	cbz	w0, .L1511
+.L1521:
 	ldr	w0, [x19]
 	cmp	w0, 1
-	bne	.L1509
+	bne	.L1510
 	str	wzr, [x19]
 	bl	ftl_low_format
-	b	.L1509
-.L1510:
+	b	.L1510
+.L1511:
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1520
+	cbnz	w0, .L1521
 	mov	w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR166]
 	ldp	x19, x20, [sp, 16]
@@ -11198,17 +11209,17 @@ FtlWriteToIDB:
 	stp	x21, x22, [sp, 32]
 	adrp	x24, .LANCHOR182
 	stp	x27, x28, [sp, 80]
-	bls	.L1522
+	bls	.L1523
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1523
-.L1522:
+	bls	.L1524
+.L1523:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbnz	w0, .L1524
-.L1589:
+	cbnz	w0, .L1525
+.L1590:
 	mov	w19, 0
-	b	.L1521
-.L1524:
+	b	.L1522
+.L1525:
 	adrp	x0, .LANCHOR183
 	str	x0, [x29, 120]
 	mov	w1, 35899
@@ -11216,7 +11227,7 @@ FtlWriteToIDB:
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x23]
 	cmp	w2, w1
-	bne	.L1526
+	bne	.L1527
 	adrp	x21, .LANCHOR0
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w19, 65535
@@ -11225,9 +11236,9 @@ FtlWriteToIDB:
 	mov	x0, 262140
 	add	x2, x23, x0
 	mov	w0, 0
-.L1530:
+.L1531:
 	ldr	w4, [x2]
-	cbnz	w4, .L1527
+	cbnz	w4, .L1528
 	ldr	w4, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x2], -4
@@ -11235,13 +11246,13 @@ FtlWriteToIDB:
 	sub	w19, w19, #1
 	csel	w0, w0, wzr, cc
 	cmp	w19, 4096
-	bne	.L1530
+	bne	.L1531
 	mov	w19, 512
-	b	.L1529
-.L1527:
+	b	.L1530
+.L1528:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1529:
+.L1530:
 	add	w0, w19, 4
 	ubfiz	w1, w1, 2, 14
 	mov	w22, 0
@@ -11252,7 +11263,7 @@ FtlWriteToIDB:
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR78
 	add	x20, x0, :lo12:.LANCHOR78
-.L1552:
+.L1553:
 	adrp	x26, .LANCHOR184
 	mov	w1, 0
 	mov	x2, 512
@@ -11265,27 +11276,27 @@ FtlWriteToIDB:
 	add	x0, x0, :lo12:.LANCHOR78
 	ldr	x1, [x0, 32]
 	mul	w25, w27, w22
-	cbz	x1, .L1560
+	cbz	x1, .L1561
 	ldr	x0, [x0, 40]
 	mov	w26, 6
 	cmp	x0, 0
 	mov	w0, 9
 	csel	w26, w26, w0, eq
-.L1531:
+.L1532:
 	ldr	x2, [x20, 8]
 	mov	w1, w25
 	mov	w0, 0
 	blr	x2
 	ldr	w0, [x29, 156]
 	cmp	w0, 1
-	beq	.L1532
+	beq	.L1533
 	ldr	x2, [x20, 8]
 	add	w1, w27, w25
 	mov	w0, 0
 	blr	x2
-.L1532:
+.L1533:
 	cmp	w26, 9
-	bne	.L1562
+	bne	.L1563
 	ldr	x0, [x29, 144]
 	mov	w2, 1024
 	mov	w1, 0
@@ -11310,7 +11321,7 @@ FtlWriteToIDB:
 	add	x0, x28, 12
 	bl	js_hash
 	str	w0, [x28, 8]
-.L1533:
+.L1534:
 	ldr	w0, [x29, 156]
 	mov	x6, x23
 	mul	w0, w0, w27
@@ -11318,22 +11329,22 @@ FtlWriteToIDB:
 	str	w0, [x29, 140]
 	add	w0, w25, 1
 	str	w0, [x29, 132]
-.L1534:
+.L1535:
 	ldr	w0, [x29, 140]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1541
+	bcs	.L1542
 	cmp	w26, 9
-	bne	.L1535
+	bne	.L1536
 	ldr	w0, [x29, 132]
 	add	w0, w0, w1
-.L1588:
+.L1589:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
 	ccmp	w26, 9, 0, eq
-	bne	.L1537
+	bne	.L1538
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	str	x6, [x29, 104]
@@ -11353,8 +11364,8 @@ FtlWriteToIDB:
 	ldr	w1, [x29, 112]
 	ldr	x6, [x29, 104]
 	cmn	w1, #1
-	bne	.L1538
-.L1541:
+	bne	.L1539
+.L1542:
 	ldr	x0, [x29, 144]
 	ldr	x26, [x0, #:lo12:.LANCHOR184]
 	add	x0, x21, :lo12:.LANCHOR0
@@ -11363,21 +11374,21 @@ FtlWriteToIDB:
 	mul	w1, w0, w22
 	str	w1, [x29, 140]
 	ldr	x1, [x20, 32]
-	cbnz	x1, .L1539
+	cbnz	x1, .L1540
 	mov	w25, 6
-.L1540:
+.L1541:
 	ldr	w1, [x29, 156]
 	mov	x27, 0
 	mul	w0, w1, w0
 	str	w0, [x29, 132]
-.L1543:
+.L1544:
 	ldr	w0, [x29, 132]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1547
+	bcs	.L1548
 	cmp	w27, 0
 	ccmp	w25, 9, 0, eq
-	bne	.L1544
+	bne	.L1545
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	blr	x1
@@ -11401,34 +11412,34 @@ FtlWriteToIDB:
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
-	beq	.L1545
-.L1547:
+	beq	.L1546
+.L1548:
 	ldr	x0, [x29, 144]
 	mov	x2, x23
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
-.L1546:
+.L1547:
 	ldr	w3, [x29, 136]
 	mov	w26, w1
 	cmp	w1, w3
-	bcc	.L1550
+	bcc	.L1551
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	cmp	w0, 5
-	bls	.L1549
-	b	.L1553
-.L1560:
+	bls	.L1550
+	b	.L1554
+.L1561:
 	mov	w26, 6
-	b	.L1531
-.L1562:
+	b	.L1532
+.L1563:
 	mov	x28, 0
-	b	.L1533
-.L1535:
+	b	.L1534
+.L1536:
 	add	w0, w1, w25
 	lsl	w0, w0, 2
-	b	.L1588
-.L1537:
+	b	.L1589
+.L1538:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
 	mov	x2, x6
@@ -11437,20 +11448,20 @@ FtlWriteToIDB:
 	str	x6, [x29, 112]
 	blr	x7
 	cmn	w0, #1
-	beq	.L1541
+	beq	.L1542
 	ldr	x6, [x29, 112]
 	add	x6, x6, 2048
-.L1538:
-	add	x27, x27, 1
-	b	.L1534
 .L1539:
+	add	x27, x27, 1
+	b	.L1535
+.L1540:
 	ldr	x1, [x20, 40]
 	mov	w25, 6
 	cmp	x1, 0
 	mov	w1, 9
 	csel	w25, w25, w1, eq
-	b	.L1540
-.L1544:
+	b	.L1541
+.L1545:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
 	ldr	w0, [x29, 140]
@@ -11459,16 +11470,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	beq	.L1547
+	beq	.L1548
 	ldr	w0, [x29, 164]
 	mov	w1, 61424
 	cmp	w0, w1
-	bne	.L1547
+	bne	.L1548
 	add	x26, x26, 2048
-.L1545:
+.L1546:
 	add	x27, x27, 1
-	b	.L1543
-.L1550:
+	b	.L1544
+.L1551:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x27, x1, 2
@@ -11476,7 +11487,7 @@ FtlWriteToIDB:
 	add	x1, x1, 1
 	ldr	w3, [x25]
 	cmp	w4, w3
-	beq	.L1546
+	beq	.L1547
 	mov	x2, 512
 	mov	w1, 0
 	bl	memset
@@ -11495,16 +11506,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	mul	w1, w1, w22
 	blr	x2
-.L1549:
+.L1550:
 	ldr	w0, [x29, 156]
 	add	w22, w22, w0
 	cmp	w22, 15
-	bls	.L1552
+	bls	.L1553
 	ldr	w0, [x29, 152]
-	cbnz	w0, .L1553
-.L1526:
+	cbnz	w0, .L1554
+.L1527:
 	mov	w19, -1
-.L1553:
+.L1554:
 	ldr	x0, [x29, 120]
 	str	wzr, [x24, #:lo12:.LANCHOR182]
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
@@ -11512,7 +11523,7 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	bl	free
-.L1521:
+.L1522:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11521,11 +11532,11 @@ FtlWriteToIDB:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1523:
+.L1524:
 	mov	w21, w1
 	mov	x22, x2
 	cmp	w0, 64
-	bne	.L1554
+	bne	.L1555
 	adrp	x20, .LANCHOR183
 	mov	w0, 262144
 	bl	ftl_malloc
@@ -11536,32 +11547,32 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	str	x1, [x0, #:lo12:.LANCHOR184]
 	ldr	x0, [x20, #:lo12:.LANCHOR183]
-	cbz	x0, .L1555
-	cbz	x1, .L1555
+	cbz	x0, .L1556
+	cbz	x1, .L1556
 	mov	w1, 1
 	mov	w2, 262144
 	str	w1, [x24, #:lo12:.LANCHOR182]
 	mov	w1, 0
 	bl	ftl_memset
-.L1554:
+.L1555:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbz	w0, .L1589
+	cbz	w0, .L1590
 	adrp	x0, .LANCHOR183
 	cmp	w19, 63
 	ldr	x1, [x0, #:lo12:.LANCHOR183]
-	bhi	.L1557
+	bhi	.L1558
 	mov	w0, 64
 	sub	w19, w0, w19
 	sub	w21, w21, w19
 	ubfiz	x19, x19, 9, 25
 	add	x22, x22, x19
 	mov	x20, x1
-.L1558:
+.L1559:
 	cmp	w25, 575
-	bls	.L1559
+	bls	.L1560
 	sub	w21, w21, w23
 	sub	w21, w21, #446
-.L1559:
+.L1560:
 	mov	w4, w21
 	mov	x3, x20
 	mov	w2, 262144
@@ -11572,19 +11583,19 @@ FtlWriteToIDB:
 	mov	x1, x22
 	mov	x0, x20
 	bl	ftl_memcpy
-	b	.L1589
-.L1555:
+	b	.L1590
+.L1556:
 	adrp	x1, .LANCHOR185
 	adrp	x0, .LC51
 	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L1554
-.L1557:
+	b	.L1555
+.L1558:
 	lsl	w20, w19, 7
 	sub	w20, w20, #8192
 	add	x20, x1, x20, lsl 2
-	b	.L1558
+	b	.L1559
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -12927,250 +12938,250 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6243,"a",@progbits
+	.section	.rodata.__func__.6234,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.6243, %object
-	.size	__func__.6243, 13
-__func__.6243:
+	.type	__func__.6234, %object
+	.size	__func__.6234, 13
+__func__.6234:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6271,"a",@progbits
+	.section	.rodata.__func__.6262,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.6271, %object
-	.size	__func__.6271, 9
-__func__.6271:
+	.type	__func__.6262, %object
+	.size	__func__.6262, 9
+__func__.6262:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6346,"a",@progbits
+	.section	.rodata.__func__.6337,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.6346, %object
-	.size	__func__.6346, 14
-__func__.6346:
+	.type	__func__.6337, %object
+	.size	__func__.6337, 14
+__func__.6337:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6381,"a",@progbits
+	.section	.rodata.__func__.6372,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6381, %object
-	.size	__func__.6381, 11
-__func__.6381:
+	.type	__func__.6372, %object
+	.size	__func__.6372, 11
+__func__.6372:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6496,"a",@progbits
+	.section	.rodata.__func__.6487,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6496, %object
-	.size	__func__.6496, 17
-__func__.6496:
+	.type	__func__.6487, %object
+	.size	__func__.6487, 17
+__func__.6487:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6501,"a",@progbits
+	.section	.rodata.__func__.6492,"a",@progbits
 	.align	3
 	.set	.LANCHOR45,. + 0
-	.type	__func__.6501, %object
-	.size	__func__.6501, 17
-__func__.6501:
+	.type	__func__.6492, %object
+	.size	__func__.6492, 17
+__func__.6492:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6532,"a",@progbits
+	.section	.rodata.__func__.6523,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6532, %object
-	.size	__func__.6532, 17
-__func__.6532:
+	.type	__func__.6523, %object
+	.size	__func__.6523, 17
+__func__.6523:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6564,"a",@progbits
+	.section	.rodata.__func__.6555,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6564, %object
-	.size	__func__.6564, 22
-__func__.6564:
+	.type	__func__.6555, %object
+	.size	__func__.6555, 22
+__func__.6555:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6573,"a",@progbits
+	.section	.rodata.__func__.6564,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6573, %object
-	.size	__func__.6573, 16
-__func__.6573:
+	.type	__func__.6564, %object
+	.size	__func__.6564, 16
+__func__.6564:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6606,"a",@progbits
+	.section	.rodata.__func__.6597,"a",@progbits
 	.align	3
 	.set	.LANCHOR81,. + 0
-	.type	__func__.6606, %object
-	.size	__func__.6606, 26
-__func__.6606:
+	.type	__func__.6597, %object
+	.size	__func__.6597, 26
+__func__.6597:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6617,"a",@progbits
+	.section	.rodata.__func__.6608,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6617, %object
-	.size	__func__.6617, 15
-__func__.6617:
+	.type	__func__.6608, %object
+	.size	__func__.6608, 15
+__func__.6608:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6632,"a",@progbits
+	.section	.rodata.__func__.6623,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6632, %object
-	.size	__func__.6632, 31
-__func__.6632:
+	.type	__func__.6623, %object
+	.size	__func__.6623, 31
+__func__.6623:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6646,"a",@progbits
+	.section	.rodata.__func__.6637,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6646, %object
-	.size	__func__.6646, 16
-__func__.6646:
+	.type	__func__.6637, %object
+	.size	__func__.6637, 16
+__func__.6637:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6671,"a",@progbits
+	.section	.rodata.__func__.6662,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6671, %object
-	.size	__func__.6671, 22
-__func__.6671:
+	.type	__func__.6662, %object
+	.size	__func__.6662, 22
+__func__.6662:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6688,"a",@progbits
+	.section	.rodata.__func__.6679,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.6688, %object
-	.size	__func__.6688, 9
-__func__.6688:
+	.type	__func__.6679, %object
+	.size	__func__.6679, 9
+__func__.6679:
 	.string	"log2phys"
-	.section	.rodata.__func__.6752,"a",@progbits
+	.section	.rodata.__func__.6743,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6752, %object
-	.size	__func__.6752, 15
-__func__.6752:
+	.type	__func__.6743, %object
+	.size	__func__.6743, 15
+__func__.6743:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6774,"a",@progbits
+	.section	.rodata.__func__.6765,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6774, %object
-	.size	__func__.6774, 14
-__func__.6774:
+	.type	__func__.6765, %object
+	.size	__func__.6765, 14
+__func__.6765:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6830,"a",@progbits
+	.section	.rodata.__func__.6821,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6830, %object
-	.size	__func__.6830, 15
-__func__.6830:
+	.type	__func__.6821, %object
+	.size	__func__.6821, 15
+__func__.6821:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6852,"a",@progbits
+	.section	.rodata.__func__.6843,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6852, %object
-	.size	__func__.6852, 18
-__func__.6852:
+	.type	__func__.6843, %object
+	.size	__func__.6843, 18
+__func__.6843:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.6898,"a",@progbits
+	.section	.rodata.__func__.6889,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6898, %object
-	.size	__func__.6898, 16
-__func__.6898:
+	.type	__func__.6889, %object
+	.size	__func__.6889, 16
+__func__.6889:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6932,"a",@progbits
+	.section	.rodata.__func__.6923,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6932, %object
-	.size	__func__.6932, 22
-__func__.6932:
+	.type	__func__.6923, %object
+	.size	__func__.6923, 22
+__func__.6923:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6989,"a",@progbits
+	.section	.rodata.__func__.6980,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6989, %object
-	.size	__func__.6989, 16
-__func__.6989:
+	.type	__func__.6980, %object
+	.size	__func__.6980, 16
+__func__.6980:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7010,"a",@progbits
+	.section	.rodata.__func__.7001,"a",@progbits
 	.align	3
 	.set	.LANCHOR136,. + 0
-	.type	__func__.7010, %object
-	.size	__func__.7010, 18
-__func__.7010:
+	.type	__func__.7001, %object
+	.size	__func__.7001, 18
+__func__.7001:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7037,"a",@progbits
+	.section	.rodata.__func__.7028,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7037, %object
-	.size	__func__.7037, 14
-__func__.7037:
+	.type	__func__.7028, %object
+	.size	__func__.7028, 14
+__func__.7028:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7102,"a",@progbits
+	.section	.rodata.__func__.7093,"a",@progbits
 	.align	3
 	.set	.LANCHOR144,. + 0
-	.type	__func__.7102, %object
-	.size	__func__.7102, 25
-__func__.7102:
+	.type	__func__.7093, %object
+	.size	__func__.7093, 25
+__func__.7093:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7123,"a",@progbits
+	.section	.rodata.__func__.7114,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7123, %object
-	.size	__func__.7123, 29
-__func__.7123:
+	.type	__func__.7114, %object
+	.size	__func__.7114, 29
+__func__.7114:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7130,"a",@progbits
+	.section	.rodata.__func__.7121,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.7130, %object
-	.size	__func__.7130, 19
-__func__.7130:
+	.type	__func__.7121, %object
+	.size	__func__.7121, 19
+__func__.7121:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7143,"a",@progbits
+	.section	.rodata.__func__.7134,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7143, %object
-	.size	__func__.7143, 16
-__func__.7143:
+	.type	__func__.7134, %object
+	.size	__func__.7134, 16
+__func__.7134:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7150,"a",@progbits
+	.section	.rodata.__func__.7141,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7150, %object
-	.size	__func__.7150, 20
-__func__.7150:
+	.type	__func__.7141, %object
+	.size	__func__.7141, 20
+__func__.7141:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7220,"a",@progbits
+	.section	.rodata.__func__.7211,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.7220, %object
-	.size	__func__.7220, 19
-__func__.7220:
+	.type	__func__.7211, %object
+	.size	__func__.7211, 19
+__func__.7211:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7319,"a",@progbits
+	.section	.rodata.__func__.7310,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7319, %object
-	.size	__func__.7319, 23
-__func__.7319:
+	.type	__func__.7310, %object
+	.size	__func__.7310, 23
+__func__.7310:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7591,"a",@progbits
+	.section	.rodata.__func__.7582,"a",@progbits
 	.align	3
 	.set	.LANCHOR137,. + 0
-	.type	__func__.7591, %object
-	.size	__func__.7591, 15
-__func__.7591:
+	.type	__func__.7582, %object
+	.size	__func__.7582, 15
+__func__.7582:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7610,"a",@progbits
+	.section	.rodata.__func__.7601,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.7610, %object
-	.size	__func__.7610, 15
-__func__.7610:
+	.type	__func__.7601, %object
+	.size	__func__.7601, 15
+__func__.7601:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7634,"a",@progbits
+	.section	.rodata.__func__.7625,"a",@progbits
 	.align	3
 	.set	.LANCHOR77,. + 0
-	.type	__func__.7634, %object
-	.size	__func__.7634, 17
-__func__.7634:
+	.type	__func__.7625, %object
+	.size	__func__.7625, 17
+__func__.7625:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7749,"a",@progbits
+	.section	.rodata.__func__.7740,"a",@progbits
 	.align	3
 	.set	.LANCHOR185,. + 0
-	.type	__func__.7749, %object
-	.size	__func__.7749, 14
-__func__.7749:
+	.type	__func__.7740, %object
+	.size	__func__.7740, 14
+__func__.7740:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC21:
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 81434126cc..012e1d1d00 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -60,7 +60,15 @@ static struct nand_info spi_nand_tbl[] = {
 	/* EM73C044SNC-G */
 	{0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, 4, 20, NULL},
 	/* EM73D044SNB-G */
-	{0xD520, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL}
+	{0xD520, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL},
+	/* ATO25D1GA */
+	{0x9B12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x40, 18, 1, 0xB0, 0x0, 20, 36, &sfc_nand_ecc_status_sp1},
+	/* XT26G02B */
+	{0x0BF2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	/* XT26G01B */
+	{0x0BF1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	/* HYF4GQ4UAACBE */
+	{0xC9D4, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 4, 0xB0, 0, 32, 64, NULL},
 };
 
 static u8 id_byte[8];
@@ -383,15 +391,20 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u8 status;
-	u32 data_sz = 2048;
+	u32 sec_per_page = p_nand_info->sec_per_page;
 	u32 spare_offs_1 = p_nand_info->spare_offs_1;
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
-
-	memcpy(gp_page_buf, p_data, data_sz);
-	ftl_memset(&gp_page_buf[data_sz / 4], 0xff, 64);
-	gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0];
-	gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1];
-
+	u32 data_size = sec_per_page * 512;
+
+	PRINT_SFC_I("%s %x %x %x\n", __func__, addr, p_data[0], p_spare[0]);
+	memcpy(gp_page_buf, p_data, data_size);
+	ftl_memset(&gp_page_buf[data_size / 4], 0xff, sec_per_page * 16);
+	gp_page_buf[(data_size + spare_offs_1) / 4] = p_spare[0];
+	gp_page_buf[(data_size + spare_offs_2) / 4] = p_spare[1];
+	if (sec_per_page == 8) {
+		gp_page_buf[(data_size + spare_offs_1) / 4 + 1] = p_spare[2];
+		gp_page_buf[(data_size + spare_offs_2) / 4 + 1] = p_spare[3];
+	}
 	sfc_nand_write_en();
 	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
 	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
@@ -401,7 +414,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = sfc_nand_dev.page_prog_cmd;
 	sfcmd.b.addrbits = SFC_ADDR_XBITS;
-	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.datasize = SFC_NAND_SECTOR_FULL_SIZE * sec_per_page;
 	sfcmd.b.rw = SFC_WRITE;
 
 	sfctrl.d32 = 0;
@@ -431,10 +444,12 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u32 ecc_result;
-	u32 data_sz = 2048;
 	u32 spare_offs_1 = p_nand_info->spare_offs_1;
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+	u32 sec_per_page = p_nand_info->sec_per_page;
+	u32 data_size = sec_per_page * 512;
 
+	PRINT_SFC_I("%s %x %x %x\n", __func__, addr, p_data[0], p_spare[0]);
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->page_read_cmd;
 	sfcmd.b.datasize = 0;
@@ -453,18 +468,20 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
-	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.datasize = SFC_NAND_SECTOR_FULL_SIZE * sec_per_page;
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	sfctrl.d32 = 0;
 	sfctrl.b.datalines = sfc_nand_dev.read_lines;
 
 	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
-	memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE);
 	ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, gp_page_buf);
-
-	memcpy(p_data, gp_page_buf, data_sz);
-	p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4];
-	p_spare[1] = gp_page_buf[(data_sz + spare_offs_2) / 4];
+	memcpy(p_data, gp_page_buf, data_size);
+	p_spare[0] = gp_page_buf[(data_size + spare_offs_1) / 4];
+	p_spare[1] = gp_page_buf[(data_size + spare_offs_2) / 4];
+	if (p_nand_info->sec_per_page == 8) {
+		p_spare[2] = gp_page_buf[(data_size + spare_offs_1) / 4 + 1];
+		p_spare[3] = gp_page_buf[(data_size + spare_offs_2) / 4 + 1];
+	}
 	if (ret != SFC_OK)
 		return SFC_NAND_ECC_ERROR;
 
@@ -475,6 +492,7 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 		if (p_spare)
 			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
 	}
+
 	return ecc_result;
 }
 
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 82641acc2f..c3ddf85200 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -15,7 +15,8 @@
 #define SFC_NAND_ECC_REFRESH		NAND_STS_REFRESH
 #define SFC_NAND_ECC_OK			NAND_STS_OK
 
-#define SFC_NAND_PAGE_MAX_SIZE		2112
+#define SFC_NAND_PAGE_MAX_SIZE		4224
+#define SFC_NAND_SECTOR_FULL_SIZE	528
 
 #define FEA_READ_STATUE_MASK    (0x3 << 0)
 #define FEA_STATUE_MODE1        0
@@ -113,8 +114,8 @@ struct nand_info {
 	u8 QE_address;
 	u8 QE_bits;
 
-	u8 spare_offs_1;
-	u8 spare_offs_2;
+	u8 spare_offs_1;	/* 4/8 bytes for 2KB/4KB page size flash */
+	u8 spare_offs_2;	/* 4/8 bytes for 2KB/4KB page size flash */
 	u32 (*ecc_status)(void);
 };
 

commit 12bc9cd8e1c8f306b494aca0859d4ab9cfd98216
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Mon Apr 22 15:01:13 2019 +0800

    rockchip: dts: rk3368: enable sdmmc
    
    Change-Id: I9c9147a952572b36a389dd6ea958f68cdc712121
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 971a3dc5b6..38ba454823 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -22,6 +22,7 @@
 
 &sdmmc {
 	u-boot,dm-pre-reloc;
+	status = "okay";
 };
 
 &emmc {

commit b04f87d753c5493d960bf41862ff3b97a8e72fc8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 17 21:03:43 2019 +0800

    common: spl: support booting bl32
    
    Change-Id: I525f2b3c9ce24464a775291ab8924adbc0da85f0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 5f9aa95e30..e1e7f43f9f 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -31,8 +31,10 @@ static struct bl31_params *bl2_to_bl31_params;
  *
  * @return bl31 params structure pointer
  */
-static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
+static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl32_entry,
+						    uintptr_t bl33_entry)
 {
+	struct entry_point_info *bl32_ep_info;
 	struct entry_point_info *bl33_ep_info;
 
 	/*
@@ -49,17 +51,24 @@ static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
 
-	/* Fill BL32 related information if it exists */
+	if (bl32_entry == -1)
+		goto bl33_setup;
+
+	/* Fill BL32 related information */
 	bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
-	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, ATF_PARAM_EP,
-		       ATF_VERSION_1, 0);
+	bl32_ep_info = &bl31_params_mem.bl32_ep_info;
+	SET_PARAM_HEAD(bl32_ep_info, ATF_PARAM_EP, ATF_VERSION_1,
+		       ATF_EP_SECURE);
+
+	bl32_ep_info->pc = bl32_entry;
+	bl32_ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
+				     DISABLE_ALL_EXECPTIONS);
+
 	bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
-#ifndef BL32_BASE
-	bl2_to_bl31_params->bl32_ep_info->pc = 0;
-#endif /* BL32_BASE */
 
+bl33_setup:
 	/* Fill BL33 related information */
 	bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info;
 	bl33_ep_info = &bl31_params_mem.bl33_ep_info;
@@ -86,13 +95,13 @@ static inline void raw_write_daif(unsigned int daif)
 
 typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
 
-static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
-		       uintptr_t fdt_addr)
+static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl32_entry,
+		       uintptr_t bl33_entry, uintptr_t fdt_addr)
 {
 	struct bl31_params *bl31_params;
 	atf_entry_t  atf_entry = (atf_entry_t)bl31_entry;
 
-	bl31_params = bl2_plat_get_bl31_params(bl33_entry);
+	bl31_params = bl2_plat_get_bl31_params(bl32_entry, bl33_entry);
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
 	dcache_disable();
@@ -100,7 +109,7 @@ static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
 	atf_entry((void *)bl31_params, (void *)fdt_addr);
 }
 
-static int spl_fit_images_find_uboot(void *blob)
+static int spl_fit_images_find(void *blob, int os)
 {
 	int parent, node, ndepth;
 	const void *data;
@@ -122,7 +131,7 @@ static int spl_fit_images_find_uboot(void *blob)
 		if (!data)
 			continue;
 
-		if (genimg_get_os_id(data) == IH_OS_U_BOOT)
+		if (genimg_get_os_id(data) == os)
 			return node;
 	};
 
@@ -143,11 +152,16 @@ uintptr_t spl_fit_images_get_entry(void *blob, int node)
 
 void spl_invoke_atf(struct spl_image_info *spl_image)
 {
+	uintptr_t  bl32_entry = -1;
 	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
 	void *blob = spl_image->fdt_addr;
 	uintptr_t platform_param = (uintptr_t)blob;
 	int node;
 
+	node = spl_fit_images_find(blob, IH_OS_OP_TEE);
+	if (node >= 0)
+		bl32_entry = spl_fit_images_get_entry(blob, node);
+
 	/*
 	 * Find the U-Boot binary (in /fit-images) load addreess or
 	 * entry point (if different) and pass it as the BL3-3 entry
@@ -155,7 +169,7 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	 * This will need to be extended to support Falcon mode.
 	 */
 
-	node = spl_fit_images_find_uboot(blob);
+	node = spl_fit_images_find(blob, IH_OS_U_BOOT);
 	if (node >= 0)
 		bl33_entry = spl_fit_images_get_entry(blob, node);
 
@@ -172,5 +186,6 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	 * We don't provide a BL3-2 entry yet, but this will be possible
 	 * using similar logic.
 	 */
-	bl31_entry(spl_image->entry_point, bl33_entry, platform_param);
+	bl31_entry(spl_image->entry_point, bl32_entry,
+		   bl33_entry, platform_param);
 }

commit 5c391abe02aa2fcbbeef962000584c7bac6ca193
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 22:17:43 2019 +0800

    rockchip: dts: rk3368: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I8ab96fd5300da25d82005ac638e6d2b728ed82ce
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 6e2a2ab2b4..971a3dc5b6 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -65,3 +65,7 @@
 &usb_otg {
 	u-boot,dm-pre-reloc;
 };
+
+&gpio2 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 082954f212..228e8af994 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -251,6 +251,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
 	};

commit b54b76f12afdabdb91bf4fcae5bad640425ab7fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 18 15:20:26 2019 +0800

    configs: add rknpu-lion_defconfig
    
    Change-Id: I89d2cc39febbfd4cab8373f0be6f437957c6b758
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rknpu-lion_defconfig
similarity index 100%
rename from configs/rk3399pro-npu_defconfig
rename to configs/rknpu-lion_defconfig
diff --git a/make.sh b/make.sh
index da072205b9..cad6f3ae4c 100755
--- a/make.sh
+++ b/make.sh
@@ -21,7 +21,7 @@ SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 #
 # Format:           target board               label         loader      trust
 RKCHIP_INI_DESC=("CONFIG_TARGET_GVA_RK3229       NA          RK322XAT     NA"
-                 "CONFIG_COPROCESSOR_RK1808  RK3399PRO-NPU  RK3399PRONPU  RK3399PRONPU"
+                 "CONFIG_COPROCESSOR_RK1808  RKNPU-LION      RKNPULION    RKNPULION"
 # to be add...
                 )
 

commit f992fe3334aa5090acb448261982628b5a3d37a5
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Tue Apr 16 09:06:27 2019 +0800

    clk: rockchip: rk3308: Make DCLK_VOP clock id consistent with kernel
    
    Change-Id: I3e5b042a5e7b4bd4a7724451b30cfa9601955541
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
index 7ba1b86ccd..5f4a34bc0c 100644
--- a/include/dt-bindings/clock/rk3308-cru.h
+++ b/include/dt-bindings/clock/rk3308-cru.h
@@ -132,7 +132,7 @@
 #define SCLK_I2S1_2CH_SRC	119
 
 /* dclk */
-#define DCLK_VOP		120
+#define DCLK_VOP		125
 
 /* aclk */
 #define ACLK_BUS_SRC		130

commit ed73b76733ce7cd243da2ebec965b0e1fca8924d
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Tue Apr 16 08:56:06 2019 +0800

    rockchip: rk3308: release GPIO0_A4 for other usage
    
    After switch to io_vsel3 after system power on, we should release
    GPIO0_A4 for other usage.
    
    Change-Id: I16bc33fd976fe957b57cd3a0f90ff44659ca93f2
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 0d11073ddf..8b4f939885 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -120,6 +120,7 @@ int rk_board_init(void)
 		      VCCIO3_3V3 << IOVSEL3_SHIFT;
 	rk_clrsetreg(&grf->soc_con0, IOVSEL3_CTRL_MASK | IOVSEL3_MASK, val);
 
+	gpio_free(GPIO0_A4);
 	return 0;
 }
 

commit 0436a29d64ac791fefc764fadc7e64ba16bb6b25
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 09:42:58 2019 +0800

    make.sh: use "${RKCHIP_LOADER}MINIALL*.ini" to match ini files
    
    clean: use variant "ini" for default MINIALL.ini path
    
    Change-Id: Ia1583a915ebbbc4ec5299b9ef6d81b04592bd04b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index b2e50ecca6..da072205b9 100755
--- a/make.sh
+++ b/make.sh
@@ -543,17 +543,17 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	local mode=$1 files ini
+	local mode=$1 files ini=${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 
-	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
+	if [ ! -f $ini ]; then
+		echo "pack loader failed! Can't find: $ini"
 		return
 	fi
 
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
-		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}*MINIALL*.ini`
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL*.ini`
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then
@@ -562,8 +562,8 @@ pack_loader_image()
 			fi
 		done
 	else
-		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
-		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
+		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
+		echo "pack loader okay! Input: $ini"
 	fi
 
 	cd - && mv ${RKBIN}/*_loader_*.bin ./

commit f089d907dee8c0ceb2394ba1cdca43cc3cd8d90d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 10 13:05:28 2019 +0800

    make.sh: add max limit size check before packing uboot.img
    
    The uboot.img header is 2KB size.
    
    Change-Id: Ia99b71740423a5809233a3401f5a8698ae463749
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 98b0a00b9c..b2e50ecca6 100755
--- a/make.sh
+++ b/make.sh
@@ -504,8 +504,24 @@ debug_command()
 
 pack_uboot_image()
 {
-	local UBOOT_LOAD_ADDR
+	local UBOOT_LOAD_ADDR UBOOT_MAX_KB UBOOT_KB HEAD_KB=2
 
+	# Check file size
+	UBOOT_KB=`ls -l u-boot.bin | awk '{print $5}'`
+	if [ "$PLATFORM_UBOOT_IMG_SIZE" = "" ]; then
+		UBOOT_MAX_KB=1046528
+	else
+		UBOOT_MAX_KB=`echo $PLATFORM_UBOOT_IMG_SIZE | awk '{print strtonum($2)}'`
+		UBOOT_MAX_KB=$(((UBOOT_MAX_KB-HEAD_KB)*1024))
+	fi
+
+	if [ $UBOOT_KB -gt $UBOOT_MAX_KB ]; then
+		echo
+		echo "ERROR: pack uboot failed! u-boot.bin actual: $UBOOT_KB bytes, max limit: $UBOOT_MAX_KB bytes"
+		exit 1
+	fi
+
+	# Pack image
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	if [ ! $UBOOT_LOAD_ADDR ]; then
 		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/.config|tr -d '\r'`

commit 9ad3008a7cac542073b79097dc7903fd2d5042b2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 14:23:01 2019 +0800

    tools: rockchip: boot/trust_merger: fix prefix append error
    
    - still append prefix if not match legacy prefix;
    - ignore append prefix for output;
    
    Change-Id: I1a8fc77ce73cbf169af49ce40ce3a0731861c617
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index 9a23a7d30f..923bdb75ba 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -143,6 +143,10 @@ static inline void fixPath(char *path)
 			*start = '\0';
 			strcat(path, gNewPath);
 			strcat(path, tmp);
+		} else {
+			strcpy(tmp, path);
+			strcpy(path, gNewPath);
+			strcat(path, tmp);
 		}
 	}
 }
@@ -309,7 +313,6 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
-	fixPath(gOpts.outPath);
 	printf("out:%s\n", gOpts.outPath);
 	return true;
 }
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index fa89d3b5db..81e4da8a9b 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -104,6 +104,10 @@ static inline void fixPath(char *path)
 			*start = '\0';
 			strcat(path, gNewPath);
 			strcat(path, tmp);
+		} else {
+			strcpy(tmp, path);
+			strcpy(path, gNewPath);
+			strcat(path, tmp);
 		}
 	}
 }
@@ -211,7 +215,6 @@ static bool parseOut(FILE *file)
 	}
 	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
 		return false;
-	fixPath(gOpts.outPath);
 	printf("out:%s\n", gOpts.outPath);
 
 	return true;

commit 45c2a034cd1ef3d6670aa94d37bb0ed75ede2b20
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 11 11:56:22 2019 +0800

    tools: rockchip: boot/trust_merge: fix '--replace" missing append new path
    
    Change-Id: Icddfb2ce9c7ba6f4b4e558eb5833ba79d0e7b976
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
index fd8916e2ba..9a23a7d30f 100644
--- a/tools/rockchip/boot_merger.c
+++ b/tools/rockchip/boot_merger.c
@@ -141,6 +141,7 @@ static inline void fixPath(char *path)
 			strcpy(tmp, end);
 			/* Terminate, so path can be dest for strcat() */
 			*start = '\0';
+			strcat(path, gNewPath);
 			strcat(path, tmp);
 		}
 	}
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index b481321973..fa89d3b5db 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -102,6 +102,7 @@ static inline void fixPath(char *path)
 			strcpy(tmp, end);
 			/* Terminate, so path can be dest for strcat() */
 			*start = '\0';
+			strcat(path, gNewPath);
 			strcat(path, tmp);
 		}
 	}

commit 2bbbd780f81ba50df48c3df0b7dec9e1827adf12
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 10 14:12:04 2019 +0800

    tools: rockchip: loaderimage: print file size with KB
    
     load addr is 0x600000!
    pack input ./u-boot.bin
    pack file size: 484551(473 KB)
    crc = 0xfef42a0e
    uboot version: U-Boot 2017.09-02804-ge3e39ee-dirty (Apr 10 2019 - 14:11:39)
    
    Change-Id: If8fbdd943e328db41523ded47deeedfe8c6bde0e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/loaderimage.c b/tools/rockchip/loaderimage.c
index 1a98f72de9..534dd05149 100644
--- a/tools/rockchip/loaderimage.c
+++ b/tools/rockchip/loaderimage.c
@@ -229,7 +229,7 @@ int main(int argc, char *argv[])
 		fseek(fi, 0, SEEK_END);
 		size = ftell(fi);
 		fseek(fi, 0, SEEK_SET);
-		printf("pack file size: %d \n", size);
+		printf("pack file size: %d(%d KB)\n", size, size / 1024);
 		if (size > max_size - sizeof(second_loader_hdr)) {
 			perror(file_out);
 			exit(EXIT_FAILURE);

commit b4ab0d632c2d462e02af26a1987d72acb1dd812c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 9 16:56:50 2019 +0800

    disk: rkparam: fix get disk part size error
    
    The disk part size is defined as number of blocks in partition rather
    than bytes.So delete "<< 9".
    
    Change-Id: I4428e5965c6456fcc69fb601d18a97fc48210617
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    (cherry picked from commit e65f23e90c404d909d0f5d47c829396c247a7986)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 156608cf8b..6d9221f6b6 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -277,7 +277,7 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 	}
 
 	info->start = p->start;
-	info->size = p->size << 9;
+	info->size = p->size;
 	info->blksz = dev_desc->blksz;
 
 	sprintf((char *)info->name, "%s", p->name);

commit e65f23e90c404d909d0f5d47c829396c247a7986
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Apr 9 16:56:50 2019 +0800

    disk: rkparam: fix get disk part size error
    
    The disk part size is defined as number of blocks in partition rather
    than bytes.So delete "<< 9".
    
    Change-Id: I4428e5965c6456fcc69fb601d18a97fc48210617
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 156608cf8b..6d9221f6b6 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -277,7 +277,7 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 	}
 
 	info->start = p->start;
-	info->size = p->size << 9;
+	info->size = p->size;
 	info->blksz = dev_desc->blksz;
 
 	sprintf((char *)info->name, "%s", p->name);

commit e7c691e7c7f2adc936d0d5670e3b1eb245fd5826
Author: Simon Xue <xxm@rock-chips.com>
Date:   Mon Apr 8 18:28:53 2019 +0800

    watchdog: add support for Rockchip watchdog
    
    Change-Id: I6b50f79df12e86453f6defbbddba5f0cf2078d28
    Signed-off-by: Simon Xue <xxm@rock-chips.com>

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index fc46b6774d..629b6523a2 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -78,4 +78,10 @@ config WDT_ORION
 	   Select this to enable Orion watchdog timer, which can be found on some
 	   Marvell Armada chips.
 
+config ROCKCHIP_WATCHDOG
+	bool "Rockchip watchdog"
+	depends on WDT && ARCH_ROCKCHIP
+	help
+	  Say Y here to enable Rockchip watchdog driver.
+
 endmenu
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index ab6a6b79e1..8504408958 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -22,3 +22,6 @@ obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o
 obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o
 obj-$(CONFIG_BCM2835_WDT)       += bcm2835_wdt.o
 obj-$(CONFIG_WDT_ORION) += orion_wdt.o
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ROCKCHIP_WATCHDOG) += rockchip_wdt.o
+endif
diff --git a/drivers/watchdog/rockchip_wdt.c b/drivers/watchdog/rockchip_wdt.c
new file mode 100644
index 0000000000..f2962d9d32
--- /dev/null
+++ b/drivers/watchdog/rockchip_wdt.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/utils.h>
+#include <clk.h>
+#include <dm.h>
+#include <reset.h>
+#include <wdt.h>
+
+#define WDT_CR			0x00
+#define WDT_TORR		0x04
+#define WDT_CRR			0x0C
+#define WDT_EN_MASK		0x01
+#define WDT_MODE_MASK		0x02
+#define WDT_CRR_RESTART_VAL	0x76
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rockchip_wdt_priv {
+	void __iomem *base;
+	struct clk clk;
+	unsigned long rate;
+	struct reset_ctl rst;
+};
+
+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int rockchip_wdt_settimeout(u64 timeout,
+				   struct rockchip_wdt_priv *priv)
+{
+	signed int i;
+
+	/* calculate the timeout range value */
+	i = log_2_n_round_up(timeout * priv->rate / 1000) - 16;
+	if (i > 15)
+		i = 15;
+	if (i < 0)
+		i = 0;
+
+	writel((i | (i << 4)), priv->base + WDT_TORR);
+
+	return 0;
+}
+
+static void rockchip_wdt_enable(struct rockchip_wdt_priv *priv)
+{
+	u32 val = readl(priv->base + WDT_CR);
+
+	/* Disable interrupt mode; always perform system reset. */
+	val &= ~WDT_MODE_MASK;
+	/* Enable watchdog. */
+	val |= WDT_EN_MASK;
+
+	writel(val, priv->base + WDT_CR);
+}
+
+static unsigned int rockchip_wdt_is_enabled(struct rockchip_wdt_priv *priv)
+{
+	unsigned long val;
+
+	val = readl(priv->base + WDT_CR);
+
+	return val & WDT_EN_MASK;
+}
+
+static int rockchip_wdt_reset(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	if (rockchip_wdt_is_enabled(priv))
+		/* restart the watchdog counter */
+		writel(WDT_CRR_RESTART_VAL, priv->base + WDT_CRR);
+
+	return 0;
+}
+
+static int rockchip_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	printf("Rockchip watchdog timeout: %lld sec\n", timeout / 1000);
+
+	reset_deassert(&priv->rst);
+
+	rockchip_wdt_reset(dev);
+	rockchip_wdt_settimeout(timeout, priv);
+	rockchip_wdt_enable(priv);
+	rockchip_wdt_reset(dev);
+
+	return 0;
+}
+
+static int rockchip_wdt_stop(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	reset_assert(&priv->rst);
+	reset_deassert(&priv->rst);
+
+	printf("Rockchip watchdog stop\n");
+
+	return 0;
+}
+
+static const struct wdt_ops rockchip_wdt_ops = {
+	.start = rockchip_wdt_start,
+	.reset = rockchip_wdt_reset,
+	.stop = rockchip_wdt_stop,
+};
+
+static int rockchip_wdt_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+	if (!priv->base)
+		return -ENOENT;
+
+	return 0;
+}
+
+static int rockchip_wdt_probe(struct udevice *dev)
+{
+	struct rockchip_wdt_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = reset_get_by_name(dev, "reset", &priv->rst);
+	if (ret) {
+		pr_err("reset_get_by_name(reset) failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_by_index(dev, 0, &priv->clk);
+	if (ret < 0)
+		return ret;
+
+	/* Need clk framework support */
+	priv->rate = clk_get_rate(&priv->clk);
+	if (priv->rate < 0)
+		return -EINVAL;
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_wdt_ids[] = {
+	{ .compatible = "snps,dw-wdt" },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_wdt) = {
+	.name = "rockchip_wdt",
+	.id = UCLASS_WDT,
+	.of_match = rockchip_wdt_ids,
+	.probe = rockchip_wdt_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_wdt_priv),
+	.ofdata_to_platdata = rockchip_wdt_ofdata_to_platdata,
+	.ops = &rockchip_wdt_ops,
+};

commit 860893596c908bffb1957f9c87cb8b7ce8ac090d
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 10 10:01:18 2019 +0800

    ARM: dts: rk1808-evb: Add gmac support at dts level
    
    Note that the gmac status is disabled.
    
    Change-Id: Ifac56c5d5c1cc10d5f2882fbfd1ef02d97299127
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 728ca1c73b..d857a0b5f2 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include "rk1808.dtsi"
 #include "rk1808-u-boot.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <linux/media-bus-format.h>
 
@@ -30,6 +31,13 @@
 			press-threshold-microvolt = <10000>;
 		};
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &emmc {
@@ -44,6 +52,21 @@
 	status = "okay";
 };
 
+&gmac {
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio0 10 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 20ms, 100ms for rtl8211f */
+	snps,reset-delays-us = <0 20000 100000>;
+	assigned-clocks = <&cru SCLK_GMAC>;
+	assigned-clock-parents = <&gmac_clkin>;
+	tx_delay = <0x50>;
+	rx_delay = <0x3a>;
+	status = "disabled";
+};
+
 &uart2 {
 	clock-frequency = <24000000>;
 	status = "okay";
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 13ff2b5516..47e1975660 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -1302,11 +1302,11 @@
 			rgmii_pins: rgmii-pins {
 				rockchip,pins =
 					/* rgmii_txen */
-					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA1 2 &pcfg_pull_none_4ma>,
 					/* rgmii_txd1 */
-					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA2 2 &pcfg_pull_none_4ma>,
 					/* rgmii_txd0 */
-					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA3 2 &pcfg_pull_none_4ma>,
 					/* rgmii_rxd0 */
 					<2 RK_PA4 2 &pcfg_pull_none>,
 					/* rgmii_rxd1 */
@@ -1314,13 +1314,13 @@
 					/* rgmii_rxdv */
 					<2 RK_PA7 2 &pcfg_pull_none>,
 					/* rgmii_mdio */
-					<2 RK_PB0 2 &pcfg_pull_none>,
+					<2 RK_PB0 2 &pcfg_pull_none_2ma>,
 					/* rgmii_mdc */
-					<2 RK_PB2 2 &pcfg_pull_none>,
+					<2 RK_PB2 2 &pcfg_pull_none_2ma>,
 					/* rgmii_txd3 */
-					<2 RK_PB3 2 &pcfg_pull_none_12ma>,
+					<2 RK_PB3 2 &pcfg_pull_none_4ma>,
 					/* rgmii_txd2 */
-					<2 RK_PB4 2 &pcfg_pull_none_12ma>,
+					<2 RK_PB4 2 &pcfg_pull_none_4ma>,
 					/* rgmii_rxd2 */
 					<2 RK_PB5 2 &pcfg_pull_none>,
 					/* rgmii_rxd3 */
@@ -1328,7 +1328,7 @@
 					/* rgmii_clk */
 					<2 RK_PB7 2 &pcfg_pull_none>,
 					/* rgmii_txclk */
-					<2 RK_PC1 2 &pcfg_pull_none_12ma>,
+					<2 RK_PC1 2 &pcfg_pull_none_4ma>,
 					/* rgmii_rxclk */
 					<2 RK_PC2 2 &pcfg_pull_none>;
 			};
@@ -1336,11 +1336,11 @@
 			rmii_pins: rmii-pins {
 				rockchip,pins =
 					/* rmii_txen */
-					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA1 2 &pcfg_pull_none_4ma>,
 					/* rmii_txd1 */
-					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA2 2 &pcfg_pull_none_4ma>,
 					/* rmii_txd0 */
-					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA3 2 &pcfg_pull_none_4ma>,
 					/* rmii_rxd0 */
 					<2 RK_PA4 2 &pcfg_pull_none>,
 					/* rmii_rxd1 */
@@ -1350,9 +1350,9 @@
 					/* rmii_rxdv */
 					<2 RK_PA7 2 &pcfg_pull_none>,
 					/* rmii_mdio */
-					<2 RK_PB0 2 &pcfg_pull_none>,
+					<2 RK_PB0 2 &pcfg_pull_none_2ma>,
 					/* rmii_mdc */
-					<2 RK_PB2 2 &pcfg_pull_none>,
+					<2 RK_PB2 2 &pcfg_pull_none_2ma>,
 					/* rmii_clk */
 					<2 RK_PB7 2 &pcfg_pull_none>;
 			};

commit 4dad63273a8aa0989a94715320d2195b47a74d50
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 10 09:32:15 2019 +0800

    config: rk1808: Enable GMAC config
    
    Change-Id: I168a1fd36101ef360461adfe0372d1ad490e41fc
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 0f722cb02d..834776a53d 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -38,14 +38,12 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_NET=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
@@ -57,6 +55,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y

commit ff86648dc8c70da71c443c99f66910424831d935
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Apr 10 09:30:55 2019 +0800

    net: Add rk1808 gmac support
    
    Change-Id: Iba89fc63dce6553beb266106f5f6287a2779032f
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 1763089f71..9007e4cdac 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_px30.h>
+#include <asm/arch/grf_rk1808.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3308.h>
@@ -124,6 +125,40 @@ static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rk1808_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct clk clk_speed;
+	int ret;
+
+	ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
+			      &clk_speed);
+	if (ret)
+		return ret;
+
+	switch (priv->phydev->speed) {
+	case 10:
+		ret = clk_set_rate(&clk_speed, 2500000);
+		if (ret)
+			return ret;
+		break;
+	case 100:
+		ret = clk_set_rate(&clk_speed, 25000000);
+		if (ret)
+			return ret;
+		break;
+	case 1000:
+		ret = clk_set_rate(&clk_speed, 125000000);
+		if (ret)
+			return ret;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk322x_grf *grf;
@@ -366,6 +401,46 @@ static void px30_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
 		     px30_GMAC_PHY_INTF_SEL_RMII);
 }
 
+static void rk1808_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk1808_grf *grf;
+	enum {
+		RK1808_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK1808_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK1808_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RK1808_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
+		RK1808_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK1808_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RK1808_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
+		RK1808_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK1808_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+	enum {
+		RK1808_CLK_RX_DL_CFG_GMAC_SHIFT = 0x8,
+		RK1808_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(15, 7),
+
+		RK1808_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK1808_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(7, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con1,
+		     RK1808_GMAC_PHY_INTF_SEL_MASK |
+		     RK1808_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK1808_TXCLK_DLY_ENA_GMAC_MASK,
+		     RK1808_GMAC_PHY_INTF_SEL_RGMII |
+		     RK1808_RXCLK_DLY_ENA_GMAC_ENABLE |
+		     RK1808_TXCLK_DLY_ENA_GMAC_ENABLE);
+
+	rk_clrsetreg(&grf->mac_con0,
+		     RK1808_CLK_RX_DL_CFG_GMAC_MASK |
+		     RK1808_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RK1808_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RK1808_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
 static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk322x_grf *grf;
@@ -663,6 +738,11 @@ const struct rk_gmac_ops px30_gmac_ops = {
 	.set_to_rmii = px30_gmac_set_to_rmii,
 };
 
+const struct rk_gmac_ops rk1808_gmac_ops = {
+	.fix_mac_speed = rk1808_gmac_fix_mac_speed,
+	.set_to_rgmii = rk1808_gmac_set_to_rgmii,
+};
+
 const struct rk_gmac_ops rk3228_gmac_ops = {
 	.fix_mac_speed = rk3228_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3228_gmac_set_to_rgmii,
@@ -701,6 +781,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 static const struct udevice_id rockchip_gmac_ids[] = {
 	{ .compatible = "rockchip,px30-gmac",
 	  .data = (ulong)&px30_gmac_ops },
+	{ .compatible = "rockchip,rk1808-gmac",
+	  .data = (ulong)&rk1808_gmac_ops },
 	{ .compatible = "rockchip,rk3228-gmac",
 	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",

commit 5055cc911ca1682100878e673442bc585546c5cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 9 21:07:36 2019 +0800

    Makefile: generate u-boot.dtb from dt-spl.dtb when using kernel dtb
    
    u-boot.bin doesn't affect u-boot.bin generation, but without this patch,
    it provides a wrong dtb file for user to debug when using kernel dtb.
    
    'FORCE' is necessary to promise update u-boot.bin in every compilation.
    
    Change-Id: I53e6b73cb2a457bde222f8b9c7844f3877d63cdc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index dc812e2d97..e121dbd4d9 100644
--- a/Makefile
+++ b/Makefile
@@ -924,7 +924,11 @@ endif
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
-u-boot.dtb: dts/dt.dtb
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+u-boot.dtb: dts/dt-spl.dtb FORCE
+else
+u-boot.dtb: dts/dt.dtb FORCE
+endif
 	$(call cmd,copy)
 
 OBJCOPYFLAGS_u-boot.hex := -O ihex

commit 6b5ade5a57c8b15b0cd4d0eca60640de0785fae5
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Apr 10 10:16:07 2019 +0800

    clk: rockchip: rk1808: fix up the clk_set_default failed
    
    Change-Id: If49d6def0e16b93238311885217f30a4b7a2e7c3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 9a8b8afe5f..10ff010438 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -995,6 +995,8 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case LSCLK_PERI:
 		ret = rk1808_peri_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_32K_IOE:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -1154,6 +1156,8 @@ static int rk1808_clk_set_parent(struct clk *clk, struct clk *parent)
 	switch (clk->id) {
 	case SCLK_GMAC:
 		return rk1808_gmac_set_parent(clk, parent);
+	case SCLK_32K_IOE:
+		return 0;
 	default:
 		return -ENOENT;
 	}
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index 3dd5c76d52..994896d111 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -111,6 +111,7 @@
 #define SCLK_MIPIDSIPHY_REF	110
 #define SCLK_PCIEPHY_REF	111
 #define SCLK_RTC32K_FRAC	112
+#define SCLK_32K_IOE		113
 
 /* aclk gates */
 #define ACLK_GIC_PRE		145

commit b9f5972251bce5af4c86c8a36c3a970b1174dbd3
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Mar 14 09:37:37 2019 +0800

    clk: rockchip: rk1808: add mac clk interface
    
    support mac clk set rate and set parent.
    
    Change-Id: I3b4626fd3fcc5ffdf3c58add9c1bc002bb56429a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index ad97d41332..c6515a391c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -181,6 +181,19 @@ enum {
 	EMMC_DIV50_SHIFT		= 0,
 	EMMC_DIV50_MASK			= 0xff << EMMC_DIV_SHIFT,
 
+	/* CRU_CLKSEL26_CON */
+	GMAC_PLL_SEL_SHIFT		= 14,
+	GMAC_PLL_SEL_MASK		= 3 << GMAC_PLL_SEL_SHIFT,
+	GMAC_PLL_SEL_CPLL		= 0,
+	GMAC_PLL_SEL_NPLL,
+	GMAC_PLL_SEL_PPLL,
+	CLK_GMAC_DIV_SHIFT		= 8,
+	CLK_GMAC_DIV_MASK		= 0x1f << CLK_GMAC_DIV_SHIFT,
+	SFC_PLL_SEL_SHIFT		= 7,
+	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
+	SFC_DIV_CON_SHIFT		= 0,
+	SFC_DIV_CON_MASK		= 0x7f,
+
 	/* CRU_CLK_SEL27_CON */
 	CLK_BUS_PLL_SEL_GPLL		= 0,
 	CLK_BUS_PLL_SEL_CPLL		= 1,
@@ -188,6 +201,17 @@ enum {
 	CLK_BUS_PLL_SEL_MASK		= 1 << CLK_BUS_PLL_SEL_SHIFT,
 	HSCLK_BUS_DIV_CON_SHIFT		= 8,
 	HSCLK_BUS_DIV_CON_MASK		= 0x1f << HSCLK_BUS_DIV_CON_SHIFT,
+	RGMII_CLK_SEL_SHIFT		= 2,
+	RGMII_CLK_SEL_MASK		= 3 << RGMII_CLK_SEL_SHIFT,
+	RGMII_CLK_SEL_125M		= 0,
+	RGMII_CLK_SEL_2M		= 2,
+	RGMIIC_CLK_SEL_25M		= 3,
+	RMII_CLK_SEL_SHIFT		= 1,
+	RMII_CLK_SEL_MASK		= 1 << RMII_CLK_SEL_SHIFT,
+	RMII_EXTCLK_SEL_SHIFT		= 0,
+	RMII_EXTCLK_SEL_MASK		= 1 << RMII_EXTCLK_SEL_SHIFT,
+	RMII_EXTCLK_SEL_INT		= 0,
+	RMII_EXTCLK_SEL_EXT,
 
 	/* CRU_CLK_SEL28_CON */
 	MSCLK_BUS_DIV_CON_SHIFT		= 8,
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index f9e51d0e04..9a8b8afe5f 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -564,6 +564,67 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 
 	return rk1808_vop_get_clk(priv, clk_id);
 }
+
+static ulong rk1808_mac_set_clk(struct clk *clk, uint hz)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u32 con = readl(&cru->clksel_con[26]);
+	ulong pll_rate;
+	u8 div;
+
+	if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_NPLL)
+		pll_rate = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+						 priv->cru, NPLL);
+	else if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_PPLL)
+		pll_rate = rockchip_pll_get_rate(&rk1808_pll_clks[PPLL],
+						 priv->cru, PPLL);
+	else
+		pll_rate = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
+						 priv->cru, CPLL);
+
+	/*default set 50MHZ for gmac*/
+	if (!hz)
+		hz = 50000000;
+
+	div = DIV_ROUND_UP(pll_rate, hz) - 1;
+	assert(div < 32);
+	rk_clrsetreg(&cru->clksel_con[26], CLK_GMAC_DIV_MASK,
+		     div << CLK_GMAC_DIV_SHIFT);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
+static int rk1808_mac_set_speed_clk(struct clk *clk, ulong clk_id, uint hz)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u32 sel;
+
+	switch (clk_id) {
+	case SCLK_GMAC_RGMII_SPEED:
+		if (hz == 125000000)
+			sel = 0;
+		else if (hz == 2500000)
+			sel = 2;
+		else
+			sel = 3;
+		rk_clrsetreg(&cru->clksel_con[27], RGMII_CLK_SEL_MASK,
+			     sel << RGMII_CLK_SEL_SHIFT);
+		break;
+	case SCLK_GMAC_RMII_SPEED:
+		if (hz == 2500000)
+			sel = 0;
+		else
+			sel = 1;
+		rk_clrsetreg(&cru->clksel_con[27], RMII_CLK_SEL_MASK,
+			     sel << RMII_CLK_SEL_SHIFT);
+		break;
+	default:
+		return -ENOENT;
+	}
+	return 0;
+}
 #endif
 
 static ulong rk1808_bus_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
@@ -916,6 +977,14 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOPLITE:
 		ret = rk1808_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_GMAC:
+	case SCLK_GMAC_SRC:
+		ret = rk1808_mac_set_clk(clk, rate);
+		break;
+	case SCLK_GMAC_RMII_SPEED:
+	case SCLK_GMAC_RGMII_SPEED:
+		ret = rk1808_mac_set_speed_clk(clk, clk->id, rate);
+		break;
 #endif
 	case HSCLK_BUS_PRE:
 	case MSCLK_BUS_PRE:
@@ -1062,11 +1131,43 @@ static int rk1808_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk1808_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+
+	if (parent->id == SCLK_GMAC_SRC) {
+		debug("%s: switching GAMC to SCLK_GMAC_SRC\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[27], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_INT << RMII_EXTCLK_SEL_SHIFT);
+	} else {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[27], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_EXT << RMII_EXTCLK_SEL_SHIFT);
+	}
+	return 0;
+}
+
+static int rk1808_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_GMAC:
+		return rk1808_gmac_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+}
+#endif
+
 static struct clk_ops rk1808_clk_ops = {
 	.get_rate = rk1808_clk_get_rate,
 	.set_rate = rk1808_clk_set_rate,
 	.get_phase	= rk1808_clk_get_phase,
 	.set_phase	= rk1808_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.set_parent	= rk1808_clk_set_parent,
+#endif
 };
 
 static int rk1808_clk_probe(struct udevice *dev)

commit 6078abbb1fd92695252d0047cd6cd71ca5afd227
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 9 18:49:06 2019 +0800

    ARM: dts: px30-evb: Add gmac support at dts level for px30
    
    Change-Id: I21d3b41b488297cb5374f74a1e28ba17f2c441f8
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 43ef6ee50e..906c1f1f72 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -90,8 +90,23 @@
 			248 249 250 251 252 253 254 255>;
 		default-brightness-level = <200>;
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
+&gmac {
+	phy-supply = <&vcc_phy>;
+	clock_in_out = "output";
+	snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 50000 50000>;
+	status = "okay";
+};
 
 &i2c0 {
 	status = "okay";
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index a62bc03a1d..55cd85cc80 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -87,6 +87,13 @@
 		};
 	};
 
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
@@ -792,7 +799,7 @@
 			      "pclk_mac", "clk_mac_speed";
 		phy-mode = "rmii";
 		pinctrl-names = "default";
-		pinctrl-0 = <&rmii_pins>;
+		pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
 		resets = <&cru SRST_GMAC_A>;
 		reset-names = "stmmaceth";
 		power-domains = <&power PX30_PD_GMAC>;
@@ -2177,8 +2184,16 @@
 					/* mac_mdio */
 					<2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>,
 					/* mac_mdc */
-					<2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>,
-					/* mac_clk */
+					<2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			mac_refclk_12ma: mac-refclk-12ma {
+				rockchip,pins =
+					<2 RK_PB2 RK_FUNC_2 &pcfg_pull_none_12ma>;
+			};
+
+			mac_refclk: mac-refclk {
+				rockchip,pins =
 					<2 RK_PB2 RK_FUNC_2 &pcfg_pull_none>;
 			};
 		};

commit 9155f29fd7e004bc1b4313c45e0683f54855d7cf
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 9 18:48:14 2019 +0800

    config: px30: Enable GMAC config
    
    Change-Id: I89e6b2876c6f3269cff626411a38482661f59598
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 98260f19b0..f69bf0d290 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -47,7 +47,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
@@ -70,6 +69,9 @@ CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index d28f6778ae..43449a49b3 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -49,7 +49,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
@@ -71,6 +70,9 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 18ae91c869a8eb55d8680e8180752b551ebe01ab
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 9 18:45:23 2019 +0800

    net: Add px30 gmac support
    
    Change-Id: I2c5618e74ef3e710a498795e31c6fe9e3f8d8e89
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 47605b1b19..1763089f71 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -15,6 +15,7 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_px30.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3308.h>
@@ -82,6 +83,47 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 	return designware_eth_ofdata_to_platdata(dev);
 }
 
+static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct px30_grf *grf;
+	struct clk clk_speed;
+	int speed, ret;
+	enum {
+		PX30_GMAC_SPEED_SHIFT = 0x2,
+		PX30_GMAC_SPEED_MASK  = BIT(2),
+		PX30_GMAC_SPEED_10M   = 0,
+		PX30_GMAC_SPEED_100M  = BIT(2),
+	};
+
+	ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
+			      &clk_speed);
+	if (ret)
+		return ret;
+
+	switch (priv->phydev->speed) {
+	case 10:
+		speed = PX30_GMAC_SPEED_10M;
+		ret = clk_set_rate(&clk_speed, 2500000);
+		if (ret)
+			return ret;
+		break;
+	case 100:
+		speed = PX30_GMAC_SPEED_100M;
+		ret = clk_set_rate(&clk_speed, 25000000);
+		if (ret)
+			return ret;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed);
+
+	return 0;
+}
+
 static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk322x_grf *grf;
@@ -308,6 +350,22 @@ static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static void px30_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct px30_grf *grf;
+	enum {
+		px30_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		px30_GMAC_PHY_INTF_SEL_MASK  = GENMASK(4, 6),
+		px30_GMAC_PHY_INTF_SEL_RMII  = BIT(6),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	rk_clrsetreg(&grf->mac_con1,
+		     px30_GMAC_PHY_INTF_SEL_MASK,
+		     px30_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk322x_grf *grf;
@@ -600,6 +658,11 @@ const struct eth_ops gmac_rockchip_eth_ops = {
 	.write_hwaddr		= designware_eth_write_hwaddr,
 };
 
+const struct rk_gmac_ops px30_gmac_ops = {
+	.fix_mac_speed = px30_gmac_fix_mac_speed,
+	.set_to_rmii = px30_gmac_set_to_rmii,
+};
+
 const struct rk_gmac_ops rk3228_gmac_ops = {
 	.fix_mac_speed = rk3228_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3228_gmac_set_to_rgmii,
@@ -636,6 +699,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 };
 
 static const struct udevice_id rockchip_gmac_ids[] = {
+	{ .compatible = "rockchip,px30-gmac",
+	  .data = (ulong)&px30_gmac_ops },
 	{ .compatible = "rockchip,rk3228-gmac",
 	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",

commit 22d359b877b355666406898e61c67635748721a9
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Mar 14 09:35:13 2019 +0800

    clk: rockchip: px30: add mac clk interface
    
    support mac clk set rate and set parent.
    
    Change-Id: Iaadcb701cf37083d90a37b24f4ffba3bef9c88cd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index ed1253ab24..e3c73932f5 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1055,6 +1055,50 @@ static ulong px30_i2s1_mclk_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 
 	return px30_i2s1_mclk_get_clk(priv, clk_id);
 }
+
+static ulong px30_mac_set_clk(struct clk *clk, uint hz)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+	u32 con = readl(&cru->clksel_con[22]);
+	ulong pll_rate;
+	u8 div;
+
+	if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_CPLL)
+		pll_rate = px30_clk_get_pll_rate(priv, CPLL);
+	else if ((con >> GMAC_PLL_SEL_SHIFT) & GMAC_PLL_SEL_NPLL)
+		pll_rate = px30_clk_get_pll_rate(priv, NPLL);
+	else
+		pll_rate = priv->gpll_hz;
+
+	/*default set 50MHZ for gmac*/
+	if (!hz)
+		hz = 50000000;
+
+	div = DIV_ROUND_UP(pll_rate, hz) - 1;
+	assert(div < 32);
+	rk_clrsetreg(&cru->clksel_con[22], CLK_GMAC_DIV_MASK,
+		     div << CLK_GMAC_DIV_SHIFT);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
+static int px30_mac_set_speed_clk(struct clk *clk, uint hz)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+
+	if (hz != 2500000 && hz != 25000000) {
+		debug("Unsupported mac speed:%d\n", hz);
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[23], RMII_CLK_SEL_MASK,
+		     ((hz == 2500000) ? 0 : 1) << RMII_CLK_SEL_SHIFT);
+
+	return 0;
+}
+
 #endif
 
 static int px30_clk_get_gpll_rate(ulong *rate)
@@ -1295,6 +1339,13 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2S1_OUT:
 		ret = px30_i2s1_mclk_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_GMAC:
+	case SCLK_GMAC_SRC:
+		ret = px30_mac_set_clk(clk, rate);
+		break;
+	case SCLK_GMAC_RMII:
+		ret = px30_mac_set_speed_clk(clk, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1426,11 +1477,43 @@ static int px30_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int px30_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+
+	if (parent->id == SCLK_GMAC_SRC) {
+		debug("%s: switching GAMC to SCLK_GMAC_SRC\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_INT << RMII_EXTCLK_SEL_SHIFT);
+	} else {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK,
+			     RMII_EXTCLK_SEL_EXT << RMII_EXTCLK_SEL_SHIFT);
+	}
+	return 0;
+}
+
+static int px30_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_GMAC:
+		return px30_gmac_set_parent(clk, parent);
+	default:
+		return -ENOENT;
+	}
+}
+#endif
+
 static struct clk_ops px30_clk_ops = {
 	.get_rate = px30_clk_get_rate,
 	.set_rate = px30_clk_set_rate,
 	.get_phase	= px30_clk_get_phase,
 	.set_phase	= px30_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.set_parent	= px30_clk_set_parent,
+#endif
 };
 
 static int px30_clk_probe(struct udevice *dev)

commit 221585fb35bf07a793d0a3471cfe7eacf10bf6be
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:37:45 2019 +0800

    clk: rockchip: rk3308: support pclk_wdt get rate
    
    Change-Id: I001cfef774c9657b6286467dc4ef841771841895
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index e36d64670e..75c78eaa8a 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -576,6 +576,7 @@ static ulong rk3308_bus_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
 		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
 		break;
 	case PCLK_BUS:
+	case PCLK_WDT:
 		con = readl(&cru->clksel_con[6]);
 		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
 		break;
@@ -858,6 +859,7 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case ACLK_BUS:
 	case HCLK_BUS:
 	case PCLK_BUS:
+	case PCLK_WDT:
 		rate = rk3308_bus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PERI:

commit ced960d2b677c2376a5873ae6106eb8db847426c
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:37:06 2019 +0800

    clk: rockchip: rk3288: support pclk_wdt get rate
    
    Change-Id: I99f384344feb68ae5b91ade901df4019790ef8db
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index f7536bac18..b42d36cbd0 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -148,6 +148,10 @@ enum {
 	CLK_CRYPTO_DIV_CON_SHIFT	= 6,
 	CLK_CRYPTO_DIV_CON_MASK		= GENMASK(7, 6),
 
+	/* CLKSEL33 */
+	PCLK_ALIVE_DIV_CON_SHIFT	= 8,
+	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -865,6 +869,17 @@ static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru,
 
 	return rockchip_crypto_get_clk(cru, gclk_rate);
 }
+
+static ulong rk3288_alive_get_clk(struct rk3288_cru *cru, uint gclk_rate)
+{
+	u32 div, con, parent;
+
+	con = readl(&cru->cru_clksel_con[33]);
+	div = (con & PCLK_ALIVE_DIV_CON_MASK) >>
+	      PCLK_ALIVE_DIV_CON_SHIFT;
+	parent = gclk_rate;
+	return DIV_TO_RATE(parent, div);
+}
 #endif
 
 static ulong rk3288_clk_get_rate(struct clk *clk)
@@ -914,6 +929,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case SCLK_CRYPTO:
 		new_rate = rockchip_crypto_get_clk(priv->cru, gclk_rate);
 		break;
+	case PCLK_WDT:
+		new_rate = rk3288_alive_get_clk(priv->cru, gclk_rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 33a03efd7a8193e51a2e10c88cd026a204b25050
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:36:21 2019 +0800

    clk: rockchip: rk3128: support pclk_wdt get rate
    
    Change-Id: Ie5dbfe5bd3fdd7868a5db64b96471a5524bde462
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 493a0a01c7..edfdcef1c4 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -237,6 +237,7 @@ static ulong rk3128_peri_get_clk(struct rk3128_clk_priv *priv, ulong clk_id)
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
+	case PCLK_WDT:
 		con = readl(&cru->cru_clksel_con[10]);
 		div = (con & PCLK_PERI_DIV_MASK) >> PCLK_PERI_DIV_SHIFT;
 		parent = rk3128_peri_get_clk(priv, ACLK_PERI);
@@ -503,6 +504,7 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
+	case PCLK_WDT:
 		rate = rk3128_peri_get_clk(priv, clk->id);
 		break;
 	case ACLK_CPU:

commit 68d8964cb4ed53067599ec6739e8bfa5743e43c2
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:35:43 2019 +0800

    clk: rockchip: rk1808: support pclk_wdt get rate
    
    Change-Id: Ib204b4c014c3b4cbd35d1f335378b0b399689303
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 9639065fc4..f9e51d0e04 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -583,6 +583,7 @@ static ulong rk1808_bus_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
 		parent = priv->gpll_hz;
 		break;
 	case LSCLK_BUS_PRE:
+	case PCLK_WDT:
 		con = readl(&cru->clksel_con[28]);
 		div = (con & LSCLK_BUS_DIV_CON_MASK) >> LSCLK_BUS_DIV_CON_SHIFT;
 		parent = priv->gpll_hz;
@@ -822,6 +823,7 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case HSCLK_BUS_PRE:
 	case MSCLK_BUS_PRE:
 	case LSCLK_BUS_PRE:
+	case PCLK_WDT:
 		rate = rk1808_bus_get_clk(priv, clk->id);
 		break;
 	case MSCLK_PERI:

commit 8afd7ff1e3da102bf2b387ae89a8c702129a85e2
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:34:58 2019 +0800

    clk: rockchip: px30: support pclk_wdt get rate
    
    Change-Id: I1d58d032c6f3843df3fdee65b1ee9cd3614435b1
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index b36f16bc3e..ed1253ab24 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -855,6 +855,7 @@ static ulong px30_bus_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 		parent = priv->gpll_hz;
 		break;
 	case PCLK_BUS_PRE:
+	case PCLK_WDT_NS:
 		parent = px30_bus_get_clk(priv, ACLK_BUS_PRE);
 		con = readl(&cru->clksel_con[24]);
 		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
@@ -1202,6 +1203,7 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
 	case PCLK_BUS_PRE:
+	case PCLK_WDT_NS:
 		rate = px30_bus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PERI_PRE:

commit a4e491228b935c87d7ee42ccc2c5991f7c2a5b09
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:34:11 2019 +0800

    clk: rockchip: rk3368: support pclk_wdt get rate
    
    Change-Id: I8253532cfa6a1d492d68b0e778f625621cad5dab
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index a965129703..db2d777bde 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -130,6 +130,10 @@ enum {
 	ACLK_PERI_DIV_CON_SHIFT		= 0,
 	ACLK_PERI_DIV_CON_MASK		= 0x1f,
 
+	/* CLKSEL10CON */
+	PCLK_ALIVE_DIV_CON_SHIFT	= 8,
+	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
+
 	/* CLKSEL12_CON */
 	MCU_STCLK_DIV_SHIFT		= 8,
 	MCU_STCLK_DIV_MASK		= GENMASK(10, 8),
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index a3419b7945..1ed2bea3f4 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -774,6 +774,18 @@ static ulong rk3368_vop_set_clk(struct rk3368_cru *cru, int clk_id, uint hz)
 
 	return 0;
 }
+
+static ulong rk3368_alive_get_clk(struct rk3368_clk_priv *priv)
+{
+	struct rk3368_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	con = readl(&cru->clksel_con[10]);
+	div = (con & PCLK_ALIVE_DIV_CON_MASK) >>
+	      PCLK_ALIVE_DIV_CON_SHIFT;
+	parent = GPLL_HZ;
+	return DIV_TO_RATE(parent, div);
+}
 #endif
 
 static ulong rk3368_armclk_set_clk(struct rk3368_clk_priv *priv,
@@ -893,6 +905,9 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 	case DCLK_VOP:
 		rate =  rk3368_vop_get_clk(priv->cru, clk->id);
 		break;
+	case PCLK_WDT:
+		rate = rk3368_alive_get_clk(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 981ee0bd7d280a85d8bab4760b3dfc430b0125c9
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Apr 9 17:32:46 2019 +0800

    clk: rockchip: rk3399: support pclk_wdt get rate
    
    Change-Id: I8634beb815d5129534c36861c2f02e62669889e9
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 814f43772e..f11fe3926b 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -252,6 +252,10 @@ enum {
 	DCLK_VOP_DIV_CON_MASK           = 0xff,
 	DCLK_VOP_DIV_CON_SHIFT          = 0,
 
+	/* CLKSEL_CON57 */
+	PCLK_ALIVE_DIV_CON_SHIFT	= 0,
+	PCLK_ALIVE_DIV_CON_MASK		= 0x1f << PCLK_ALIVE_DIV_CON_SHIFT,
+
 	/* CLKSEL_CON58 */
 	CLK_SPI_PLL_SEL_WIDTH = 1,
 	CLK_SPI_PLL_SEL_MASK = ((1 < CLK_SPI_PLL_SEL_WIDTH) - 1),
@@ -1117,6 +1121,17 @@ static ulong rk3399_peri_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
+static ulong rk3399_alive_get_clk(struct rk3399_clk_priv *priv)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	con = readl(&cru->clksel_con[57]);
+	div = (con & PCLK_ALIVE_DIV_CON_MASK) >>
+	      PCLK_ALIVE_DIV_CON_SHIFT;
+	parent = GPLL_HZ;
+	return DIV_TO_RATE(parent, div);
+}
 #endif
 
 static ulong rk3399_clk_get_rate(struct clk *clk)
@@ -1184,6 +1199,10 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case PCLK_PERILP1:
 		rate = rk3399_peri_get_clk(priv, clk->id);
 		break;
+	case PCLK_ALIVE:
+	case PCLK_WDT:
+		rate = rk3399_alive_get_clk(priv);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1620,6 +1639,7 @@ static ulong rk3399_pmuclk_get_rate(struct clk *clk)
 
 	switch (clk->id) {
 	case PCLK_RKPWM_PMU:
+	case PCLK_WDT_M0_PMU:
 		rate = rk3399_pwm_get_clk(priv->pmucru);
 		break;
 	case SCLK_I2C0_PMU:

commit 03a691401ba2ee9f6a21c794803ea3fe90df63da
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 3 17:15:53 2019 +0800

    rockchip: rk3328: update defconfig for spl support
    
    1. rk3328_defconfig output for tpl is too big, remove TPL_MISC
    2. we need to reserve IRAM for ATF binary loading.
    
    Change-Id: Ie3286405d44386e309760b59d502224fb76ce24d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 2f2698ee51..77d757afae 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -3,8 +3,9 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -16,7 +17,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
@@ -40,8 +40,8 @@ CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
-CONFIG_TPL_DM=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -55,12 +55,11 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index b1b5bf7fd2..8b01c1f96b 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
@@ -28,13 +28,11 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
-CONFIG_CMD_CONSOLE=y
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
@@ -82,7 +80,6 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -119,7 +116,9 @@ CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 # CONFIG_IRQ is not set
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_PANIC_HANG=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y

commit 7e72214d51563aaf54c857ac0468b522e0002c9f
Author: Shixiang Zheng <shixiang.zheng@rock-chips.com>
Date:   Thu Mar 28 15:26:28 2019 +0800

    video/drm: logo: the negative height will cause vop register err
    
    the bmp file has been processed when reserved equals BMP_PROCESSED_FLAG
    
    Change-Id: I793582cdd4ee5ee2a774c7a0dee8d36c81ed4f4c
    Signed-off-by: Shixiang Zheng <shixiang.zheng@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 9f8be7d2ba..65378c6db4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -45,6 +45,7 @@
  **********************************************************************/
 
 #define RK_BLK_SIZE 512
+#define BMP_PROCESSED_FLAG 8399
 
 DECLARE_GLOBAL_DATA_PTR;
 static LIST_HEAD(rockchip_display_list);
@@ -923,6 +924,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	void *dst = NULL, *pdst;
 	int size, len;
 	int ret = 0;
+	int reserved = 0;
 
 	if (!logo || !bmp_name)
 		return -EINVAL;
@@ -948,6 +950,9 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
+	reserved = get_unaligned_le32(&header->reserved);
+	if (logo->height < 0)
+	    logo->height = -logo->height;
 	size = get_unaligned_le32(&header->file_size);
 	if (!can_direct_logo(logo->bpp)) {
 		if (size > MEMORY_POOL_SIZE) {
@@ -995,7 +1000,10 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->ymirror = 1;
+		if (reserved == BMP_PROCESSED_FLAG)
+			logo->ymirror = 0;
+		else
+			logo->ymirror = 1;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 1c72aa966f..cc719b8aac 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -129,7 +129,7 @@ struct logo_info {
 	bool ymirror;
 	u32 offset;
 	u32 width;
-	u32 height;
+	int height;
 	u32 bpp;
 };
 

commit 9a272a6177cb77726dc5677adbc49395cbb08b6e
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 13 11:35:54 2019 +0800

    ARM: dts: rk3308-evb: Add mac node support at dts level for rk3308b
    
    Note: the default status of mac is disabled.
    
    Change-Id: I2f3cebb03f19f16c2553579e69e8312943d7ed75
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index dfcd3f2916..7ddcae479f 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -269,6 +269,12 @@
 		status = "okay";
 	};
 
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &display_subsystem {
@@ -283,6 +289,19 @@
 	status = "okay";
 };
 
+&mac {
+	phy-supply = <&vcc_phy>;
+	assigned-clocks = <&cru SCLK_MAC>;
+	assigned-clock-parents = <&mac_clkin>;
+	clock_in_out = "input";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rmii_pins &mac_refclk>;
+	snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 50000 50000>;
+	status = "disabled";
+};
+
 &pwm0 {
 	status = "okay";
 };

commit 22125d78ab01b11a776e1caf82f8b42ab8b0f009
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 13 11:34:50 2019 +0800

    ARM: dts: rk3308: Add mac node support at dtsi level
    
    Change-Id: I8c109a092b0fb1f9df2d7d8da905b38c7e65b0de
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 1e9ec023e6..d51c69a49f 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -67,6 +67,13 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	mac_clkin: external-mac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "mac_clkin";
+		#clock-cells = <0>;
+	};
+
 	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
@@ -446,6 +453,28 @@
 		status = "disabled";
 	};
 
+	mac: ethernet@ff4e0000 {
+		compatible = "rockchip,rk3308-mac";
+		reg = <0x0 0xff4e0000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
+			 <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>,
+			 <&cru SCLK_MAC>, <&cru ACLK_MAC>,
+			 <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac", "clk_mac_speed";
+		phy-mode = "rmii";
+		pinctrl-names = "default";
+		pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
+		resets = <&cru SRST_MAC_A>;
+		reset-names = "stmmaceth";
+		status = "disabled";
+	};
+
 	cru: clock-controller@ff500000 {
 		compatible = "rockchip,rk3308-cru";
 		reg = <0x0 0xff500000 0x0 0x1000>;
@@ -1046,10 +1075,19 @@
 					/* mac_mdio */
 					<1 RK_PB6 3 &pcfg_pull_none>,
 					/* mac_mdc */
-					<1 RK_PB5 3 &pcfg_pull_none>,
-					/* mac_clk */
+					<1 RK_PB5 3 &pcfg_pull_none>;
+			};
+
+			mac_refclk_12ma: mac-refclk-12ma {
+				rockchip,pins =
+					<1 RK_PB4 3 &pcfg_pull_none_12ma>;
+			};
+
+			mac_refclk: mac-refclk {
+				rockchip,pins =
 					<1 RK_PB4 3 &pcfg_pull_none>;
 			};
+
 		};
 
 		lcdc {

commit 200683ea3d1db7d51b77da840b8e8333c04dcdf7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 13 11:33:55 2019 +0800

    clk: rockchip: Add mac clock support for rk3308
    
    Change-Id: I972e2b7977f0f94164c72ae2205ec51780eb7373
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 0f0b5e43bb..8ebd6e1903 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -261,6 +261,23 @@ enum {
 	EMMC_DIV_SHIFT		= 0,
 	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
 
+	/* CRU_CLKSEL43_CON */
+	MAC_CLK_SPEED_SEL_SHIFT = 15,
+	MAC_CLK_SPEED_SEL_MASK = 1 << MAC_CLK_SPEED_SEL_SHIFT,
+	MAC_CLK_SPEED_SEL_10M = 0,
+	MAC_CLK_SPEED_SEL_100M,
+	MAC_CLK_SOURCE_SEL_SHIFT = 14,
+	MAC_CLK_SOURCE_SEL_MASK = 1 << MAC_CLK_SOURCE_SEL_SHIFT,
+	MAC_CLK_SOURCE_SEL_INTERNAL	= 0,
+	MAC_CLK_SOURCE_SEL_EXTERNAL,
+	MAC_PLL_SHIFT		= 6,
+	MAC_PLL_MASK		= 0x3 << MAC_PLL_SHIFT,
+	MAC_SEL_DPLL		= 0,
+	MAC_SEL_VPLL0,
+	MAC_SEL_VPLL1,
+	MAC_DIV_SHIFT		= 0,
+	MAC_DIV_MASK		= 0x1f << MAC_DIV_SHIFT,
+
 	/* CRU_CLK_SEL45_CON */
 	AUDIO_PCLK_DIV_SHIFT	= 8,
 	AUDIO_PCLK_DIV_MASK	= 0x1f << AUDIO_PCLK_DIV_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index fa16d7449c..e36d64670e 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -206,6 +206,52 @@ static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 	return rk3308_i2c_get_clk(clk);
 }
 
+static ulong rk3308_mac_set_clk(struct clk *clk, uint hz)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u32 con = readl(&cru->clksel_con[43]);
+	ulong pll_rate;
+	u8 div;
+
+	if ((con >> MAC_PLL_SHIFT) & MAC_SEL_VPLL0)
+		pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0],
+						 priv->cru, VPLL0);
+	else if ((con >> MAC_PLL_SHIFT) & MAC_SEL_VPLL1)
+		pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1],
+						 priv->cru, VPLL1);
+	else
+		pll_rate = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+						 priv->cru, DPLL);
+
+	/*default set 50MHZ for gmac*/
+	if (!hz)
+		hz = 50000000;
+
+	div = DIV_ROUND_UP(pll_rate, hz) - 1;
+	assert(div < 32);
+	rk_clrsetreg(&cru->clksel_con[43], MAC_DIV_MASK,
+		     div << MAC_DIV_SHIFT);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
+static int rk3308_mac_set_speed_clk(struct clk *clk, uint hz)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+
+	if (hz != 2500000 && hz != 25000000) {
+		debug("Unsupported mac speed:%d\n", hz);
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[43], MAC_CLK_SPEED_SEL_MASK,
+		     ((hz == 2500000) ? 0 : 1) << MAC_CLK_SPEED_SEL_SHIFT);
+
+	return 0;
+}
+
 static ulong rk3308_mmc_get_clk(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -867,6 +913,12 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		ret = rk3308_i2c_set_clk(clk, rate);
 		break;
+	case SCLK_MAC:
+		ret = rk3308_mac_set_clk(clk, rate);
+		break;
+	case SCLK_MAC_RMII:
+		ret = rk3308_mac_set_speed_clk(clk, rate);
+		break;
 	case SCLK_SARADC:
 		ret = rk3308_saradc_set_clk(clk, rate);
 		break;
@@ -1033,11 +1085,46 @@ static int rk3308_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+static int __maybe_unused rk3308_mac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC_SRC, switch to the internal clock.
+	 */
+	if (parent->id == SCLK_MAC_SRC) {
+		debug("%s: switching RMII to SCLK_MAC\n", __func__);
+		rk_clrreg(&priv->cru->clksel_con[43], BIT(14));
+	} else {
+		debug("%s: switching RMII to CLKIN\n", __func__);
+		rk_setreg(&priv->cru->clksel_con[43], BIT(14));
+	}
+
+	return 0;
+}
+
+static int __maybe_unused rk3308_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk3308_mac_set_parent(clk, parent);
+	default:
+		break;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3308_clk_ops = {
 	.get_rate = rk3308_clk_get_rate,
 	.set_rate = rk3308_clk_set_rate,
 	.get_phase	= rk3308_clk_get_phase,
 	.set_phase	= rk3308_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.set_parent = rk3308_clk_set_parent,
+#endif
 };
 
 static void rk3308_clk_init(struct udevice *dev)

commit c4ff7367d6e344ed78dde06b38da64676f0e363c
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 1 20:06:29 2019 +0800

    config: evb-rk3308: Enable GMAC config
    
    Change-Id: I6884fbce580e677981daa142e611248e38ef4952
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index f8510b1e49..1937284b35 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -51,6 +51,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 48af622e47..979823ec75 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -49,6 +49,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 956d0cd2aa..ffa565e3d6 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -55,6 +55,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK816=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index bacbaabd9d..84b02619d3 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -54,6 +54,9 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK816=y

commit 23adb58f0c42ab1bb8baa7ffc4c72734011eaee9
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 1 20:06:00 2019 +0800

    net: Add rk3308 mac support
    
    Change-Id: I143e7847e2249fafdcbcdaf69ff3a88915674836
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 172d423e2e..47605b1b19 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -17,6 +17,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
+#include <asm/arch/grf_rk3308.h>
 #include <asm/arch/grf_rk3328.h>
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/grf_rk3399.h>
@@ -140,6 +141,47 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rk3308_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct rk3308_grf *grf;
+	struct clk clk_speed;
+	int speed, ret;
+	enum {
+		RK3308_GMAC_SPEED_SHIFT = 0x0,
+		RK3308_GMAC_SPEED_MASK  = BIT(0),
+		RK3308_GMAC_SPEED_10M   = 0,
+		RK3308_GMAC_SPEED_100M  = BIT(0),
+	};
+
+	ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
+			      &clk_speed);
+	if (ret)
+		return ret;
+
+	switch (priv->phydev->speed) {
+	case 10:
+		speed = RK3308_GMAC_SPEED_10M;
+		ret = clk_set_rate(&clk_speed, 2500000);
+		if (ret)
+			return ret;
+		break;
+	case 100:
+		speed = RK3308_GMAC_SPEED_100M;
+		ret = clk_set_rate(&clk_speed, 25000000);
+		if (ret)
+			return ret;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con0, RK3308_GMAC_SPEED_MASK, speed);
+
+	return 0;
+}
+
 static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk3328_grf_regs *grf;
@@ -330,6 +372,22 @@ static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rk3308_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3308_grf *grf;
+	enum {
+		RK3308_GMAC_PHY_INTF_SEL_SHIFT = 2,
+		RK3308_GMAC_PHY_INTF_SEL_MASK  = GENMASK(4, 2),
+		RK3308_GMAC_PHY_INTF_SEL_RMII  = BIT(4),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	rk_clrsetreg(&grf->mac_con0,
+		     RK3308_GMAC_PHY_INTF_SEL_MASK,
+		     RK3308_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3328_grf_regs *grf;
@@ -552,6 +610,11 @@ const struct rk_gmac_ops rk3288_gmac_ops = {
 	.set_to_rgmii = rk3288_gmac_set_to_rgmii,
 };
 
+const struct rk_gmac_ops rk3308_gmac_ops = {
+	.fix_mac_speed = rk3308_gmac_fix_mac_speed,
+	.set_to_rmii = rk3308_gmac_set_to_rmii,
+};
+
 const struct rk_gmac_ops rk3328_gmac_ops = {
 	.fix_mac_speed = rk3328_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3328_gmac_set_to_rgmii,
@@ -577,6 +640,8 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
+	{ .compatible = "rockchip,rk3308-mac",
+	  .data = (ulong)&rk3308_gmac_ops },
 	{ .compatible = "rockchip,rk3328-gmac",
 	  .data = (ulong)&rk3328_gmac_ops },
 	{ .compatible = "rockchip,rk3368-gmac",

commit 4862a585bcf0b5993437014f3a91b52a1297568d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 21 10:32:58 2019 +0800

    configs: rk3399pro-npu: enable fan53555 regulator
    
    Change-Id: I71a45e5dc77fefd4278c9fa8ca0dd8f0f31cdd32
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index 7555476382..bcc3cd3703 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -53,6 +53,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 # CONFIG_MMC is not set
 CONFIG_PINCTRL=y
+CONFIG_REGULATOR_FAN53555=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_RAM=y
 CONFIG_DM_RAMDISK=y

commit 2dd104a51f8faae529ea796f22e5178520d5dfdb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 19:59:36 2019 +0800

    rockchip: param: set common reserved memory only for ARM64
    
    Follow legacy U-Boot rules(branch: rkdevelop).
    
    Change-Id: Id181baf1b3fe77f2bf5f15405b1a7618920cbed1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 42d5ef7636..6cf867686e 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -145,9 +145,12 @@ struct memblock param_parse_common_resv_mem(void)
 {
 	struct memblock mem;
 
+#ifdef CONFIG_ARM64
 	mem.base = SDRAM_OFFSET(SZ_1M);
 	mem.size = SZ_1M;
-
+#else
+	mem.size = 0;
+#endif
 	return mem;
 }
 

commit 4e92aae1f9ac4962fe2f928aff4e64767bc8b05b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Apr 4 12:18:05 2019 +0800

    rockchip: param: remove some function compile for TPL/SPL
    
    Change-Id: I828e14d12c056a7dbc8a5a8863f2f0fab4285d22
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 8f88958192..42d5ef7636 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -12,6 +12,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 #define SDRAM_OFFSET(offset)		(CONFIG_SYS_SDRAM_BASE + (offset))
 #define PARAM_DRAM_INFO_OFFSET		(SZ_32M)
 #define PARAM_OPTEE_INFO_OFFSET		(SZ_32M + SZ_2M)
@@ -195,6 +196,7 @@ int param_parse_bootdev(char **devtype, char **devnum)
 
 	return -ENOSYS;
 }
+#endif
 
 struct memblock *param_parse_ddr_mem(int *out_count)
 {

commit 6115fdb3c07a7c9989f25099bc9b0f18c2b255df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 20:01:49 2019 +0800

    common: android: improve os image information
    
    android_image_parse_kernel_comp() doesn't return valid os
    compressed type after android_image_set_kload(), so we add
    the env "os_comp" to record compressed type.
    
    Change-Id: Ie175649d348c0578ce78e139bdbbf4b6f9ea1101
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 68535abbc8..e6da05a098 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -308,14 +308,14 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
-	ulong comp;
-	char kernel_addr_str[12];
-	char *fdt_addr = env_get("fdt_addr");
 	char *kernel_addr_r = env_get("kernel_addr_r");
 	char *kernel_addr_c = env_get("kernel_addr_c");
-
+	char *fdt_addr = env_get("fdt_addr");
+	char kernel_addr_str[12];
+	char comp_str[32] = {0};
+	ulong comp_type;
 	const char *comp_name[] = {
-		[IH_COMP_NONE]  = "",
+		[IH_COMP_NONE]  = "IMAGE",
 		[IH_COMP_GZIP]  = "GZIP",
 		[IH_COMP_BZIP2] = "BZIP2",
 		[IH_COMP_LZMA]  = "LZMA",
@@ -326,15 +326,23 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
-	comp = android_image_get_comp((struct andr_img_hdr *)kernel_address);
+	comp_type = env_get_ulong("os_comp", 10, 0);
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
-	if (comp != IH_COMP_NONE)
-		printf("Booting %s kernel at %s(Uncompress to %s) with fdt at %s...\n\n\n",
-		       comp_name[comp], kernel_addr_c, kernel_addr_r, fdt_addr);
-	else
-		printf("Booting kernel at %s with fdt at %s...\n\n\n",
-		       kernel_addr_r, fdt_addr);
+	if (comp_type != IH_COMP_NONE) {
+		if (comp_type == IH_COMP_ZIMAGE &&
+		    kernel_addr_r && !kernel_addr_c) {
+			kernel_addr_c = kernel_addr_r;
+			kernel_addr_r = __stringify(CONFIG_SYS_SDRAM_BASE);
+		}
+		snprintf(comp_str, 32, "%s%s%s",
+			 "(Uncompress to ", kernel_addr_r, ")");
+	}
+
+	printf("Booting %s kernel at %s%s with fdt at %s...\n\n\n",
+	       comp_name[comp_type],
+	       comp_type != IH_COMP_NONE ? kernel_addr_c : kernel_addr_r,
+	       comp_str, fdt_addr);
 
 	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
 		bidram_dump();
diff --git a/common/image-android.c b/common/image-android.c
index cf436da62c..048de0f7ea 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -419,6 +419,7 @@ long android_image_load(struct blk_desc *dev_desc,
 		if (comp != IH_COMP_NONE) {
 			ulong kernel_addr_c;
 
+			env_set_ulong("os_comp", comp);
 			kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
 			if (kernel_addr_c) {
 				load_address = kernel_addr_c - hdr->page_size;

commit 8d681e4412b383ac32a7768921524eec37f99994
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 15:50:10 2019 +0800

    common: android: only adjust load address for ARM64 compressed kernel
    
    If there is not "kernel_addr_c", using "kernel_addr_r" for Image/zImage
    on 32-bit platform.
    
    If there is not "kernel_addr_c", adjust load address to promise compressed
    kernel can normal boot on 64-bit platform.
    
    Change-Id: I42cc3c9074eb8f1caaa44d9256d2abdae6cd97b8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 64374b10e4..cf436da62c 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -413,15 +413,31 @@ long android_image_load(struct blk_desc *dev_desc,
 			   part_info->blksz - 1) / part_info->blksz;
 		comp = android_image_parse_kernel_comp(hdr);
 		/*
-		 * We should load a compressed kernel Image
-		 * to high memory
+		 * We should load compressed kernel Image to high memory at
+		 * address "kernel_addr_c".
 		 */
 		if (comp != IH_COMP_NONE) {
-			load_address += android_image_get_ksize(hdr) * 3;
-			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
-			load_address -= hdr->page_size;
-			unmap_sysmem(buf);
-			buf = map_sysmem(load_address, 0 /* size */);
+			ulong kernel_addr_c;
+
+			kernel_addr_c = env_get_ulong("kernel_addr_c", 16, 0);
+			if (kernel_addr_c) {
+				load_address = kernel_addr_c - hdr->page_size;
+				unmap_sysmem(buf);
+				buf = map_sysmem(load_address, 0 /* size */);
+			}
+#ifdef CONFIG_ARM64
+			else {
+				printf("Warn: \"kernel_addr_c\" is not defined "
+				       "for compressed kernel Image!\n");
+				load_address += android_image_get_ksize(hdr) * 3;
+				load_address = ALIGN(load_address, ARCH_DMA_MINALIGN);
+				env_set_ulong("kernel_addr_c", load_address);
+
+				load_address -= hdr->page_size;
+				unmap_sysmem(buf);
+				buf = map_sysmem(load_address, 0 /* size */);
+			}
+#endif
 		}
 
 		if (blk_cnt * part_info->blksz > max_size) {

commit 5a54baa79344007142206f4dab5dd46d8ea1dc91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 3 17:22:27 2019 +0800

    dm: key: refactor code
    
    - use standard dm framework to implement all key drivers;
    - all key node to be children and attach to key bus;
    - dm key uclass takes over most work;
    - reduce a lot of driver code size;
    
    Change-Id: I9ea4515249d493eb4434890b90350f694c07404f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 7d48cfe526..e49f23c2d2 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -47,7 +47,7 @@ config I8042_KEYB
 
 config RK8XX_PWRKEY
 	bool "Enable RK805/816/817 pwrkey support"
-	depends on DM_KEY && PMIC_RK8XX
+	depends on DM_KEY && PMIC_RK8XX && IRQ
 	help
 	  This adds a driver for the RK805/816/817 pwrkey support.
 
diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
index 65645d01bc..d3d7df911c 100644
--- a/drivers/input/adc_key.c
+++ b/drivers/input/adc_key.c
@@ -4,92 +4,77 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <dm/read.h>
-#include <adc.h>
 #include <common.h>
-#include <console.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
+#include <dm.h>
 #include <key.h>
-#include <linux/input.h>
 
-static int adc_keys_ofdata_to_platdata(struct udevice *dev)
+static int adc_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct input_key *key;
-	u32 adc_channels[2], microvolt;
+	struct dm_key_uclass_platdata *uc_key;
+	u32 chn[2], mV;
 	int vref, ret;
-	ofnode node;
 
-	/* Get vref */
-	vref = dev_read_u32_default(dev, "keyup-threshold-microvolt", -1);
-	if (vref < 0) {
-		printf("failed to read 'keyup-threshold-microvolt', ret=%d\n",
-		       vref);
-		return -EINVAL;
-	}
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
 
-	/* Get IO channel */
-	ret = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
+	uc_key->type = ADC_KEY;
+	uc_key->name = dev_read_string(dev, "label");
+	ret = dev_read_u32_array(dev_get_parent(dev),
+				 "io-channels", chn, ARRAY_SIZE(chn));
 	if (ret) {
-		printf("failed to read 'io-channels', ret=%d\n", ret);
+		printf("%s: read 'io-channels' failed, ret=%d\n",
+		       uc_key->name, ret);
 		return -EINVAL;
 	}
 
-	/* Parse every adc key data */
-	dev_for_each_subnode(node, dev) {
-		key = calloc(1, sizeof(struct input_key));
-		if (!key)
-			return -ENOMEM;
-
-		key->parent = dev;
-		key->type = ADC_KEY;
-		key->vref = vref;
-		key->channel = adc_channels[1];
-		key->name = ofnode_read_string(node, "label");
-		ret = ofnode_read_u32(node, "linux,code", &key->code);
-		if (ret) {
-			printf("%s: failed to read 'linux,code', ret=%d\n",
-			       key->name, ret);
-			free(key);
-			continue;
-		}
-
-		ret = ofnode_read_u32(node, "press-threshold-microvolt",
-				      &microvolt);
-		if (ret) {
-			printf("%s: failed to read 'press-threshold-microvolt', ret=%d\n",
-			       key->name, ret);
-			free(key);
-			continue;
-		}
+	vref = dev_read_u32_default(dev_get_parent(dev),
+				    "keyup-threshold-microvolt", -ENODATA);
+	if (vref < 0) {
+		printf("%s: read 'keyup-threshold-microvolt' failed, ret=%d\n",
+		       uc_key->name, vref);
+		return -EINVAL;
+	}
 
-		/* Convert microvolt to adc value */
-		key->adcval = microvolt / (key->vref / 1024);
-		key_add(key);
+	uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA);
+	if (uc_key->code < 0) {
+		printf("%s: read 'linux,code' failed\n", uc_key->name);
+		return -EINVAL;
+	}
 
-		debug("%s: name=%s: code=%d, vref=%d, channel=%d, microvolt=%d, adcval=%d\n",
-		      __func__, key->name, key->code, key->vref,
-		      key->channel, microvolt, key->adcval);
+	mV = dev_read_u32_default(dev, "press-threshold-microvolt", -ENODATA);
+	if (mV < 0) {
+		printf("%s: read 'press-threshold-microvolt' failed\n",
+		       uc_key->name);
+		return -EINVAL;
 	}
 
+	uc_key->channel = chn[1];
+	uc_key->adcval = mV / (vref / 1024);
+
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "adc-keys",
+U_BOOT_DRIVER(adc_key) = {
+	.name   = "adc_key",
+	.id     = UCLASS_KEY,
+	.ofdata_to_platdata = adc_key_ofdata_to_platdata,
 };
 
-static const struct udevice_id adc_keys_ids[] = {
+/* Key Bus */
+static int adc_key_bus_bind(struct udevice *dev)
+{
+	return key_bind_children(dev, "adc_key");
+}
+
+static const struct udevice_id adc_key_bus_match[] = {
 	{ .compatible = "adc-keys" },
 	{ },
 };
 
-U_BOOT_DRIVER(adc_keys) = {
-	.name   = "adc-keys",
-	.id     = UCLASS_KEY,
-	.ops	= &key_ops,
-	.of_match = adc_keys_ids,
-	.ofdata_to_platdata = adc_keys_ofdata_to_platdata,
+U_BOOT_DRIVER(adc_key_bus) = {
+	.name	   = "adc_key_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = adc_key_bus_match,
+	.bind	   = adc_key_bus_bind,
 };
diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index 34db0d868d..053c159080 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -4,119 +4,55 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <adc.h>
 #include <common.h>
-#include <console.h>
 #include <dm.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
 #include <key.h>
-#include <linux/input.h>
-#include <errno.h>
-#include <dm/read.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
-
-static void gpio_irq_handler(int irq, void *data)
-{
-	struct input_key *key = data;
-
-	if (key->irq != irq)
-		return;
-
-	/* up event */
-	if (irq_get_gpio_level(irq)) {
-		key->up_t = key_timer(0);
-		debug("%s: key down: %llu ms\n", key->name, key->down_t);
-	/* down event */
-	} else {
-		key->down_t = key_timer(0);
-		debug("%s: key up: %llu ms\n", key->name, key->up_t);
-	}
-	/* Must delay */
-	mdelay(10);
-	irq_revert_irq_type(irq);
-}
 
 static int gpio_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct input_key *key;
-	u32 gpios[2];
-	ofnode node;
-	int irq, ret;
-
-	dev_for_each_subnode(node, dev) {
-		key = calloc(1, sizeof(struct input_key));
-		if (!key)
-			return -ENOMEM;
-
-		key->parent = dev;
-		key->type = GPIO_KEY;
-		key->name = ofnode_read_string(node, "label");
-		ret = ofnode_read_u32(node, "linux,code", &key->code);
-		if (ret) {
-			printf("%s: failed read 'linux,code', ret=%d\n",
-			       key->name, ret);
-			free(key);
-			continue;
-		}
-
-		/* Only register power key as interrupt */
-		if (key->code == KEY_POWER) {
-			ret = ofnode_read_u32_array(node, "gpios", gpios, 2);
-			if (ret) {
-				printf("%s: failed to read 'gpios', ret=%d\n",
-				       key->name, ret);
-				free(key);
-				continue;
-			}
-
-			/* Must register as interrupt, be able to wakeup system */
-			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-			if (irq < 0) {
-				printf("%s: failed to request irq, ret=%d\n",
-				       key->name, irq);
-				free(key);
-				continue;
-			}
-			key->irq = irq;
-			key_add(key);
-			irq_install_handler(irq, gpio_irq_handler, key);
-			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-			irq_handler_enable(irq);
-		} else {
-			ret = gpio_request_by_name_nodev(node, "gpios", 0,
-							 &key->gpio,
-							 GPIOD_IS_IN);
-			if (ret) {
-				printf("%s: failed to request gpio, ret=%d\n",
-				       key->name, ret);
-			}
-
-			key_add(key);
-		}
+	struct dm_key_uclass_platdata *uc_key;
+
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
+
+	uc_key->type = GPIO_KEY;
+	uc_key->name = dev_read_string(dev, "label");
+	uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA);
+	if (uc_key->code < 0) {
+		printf("%s: read 'linux,code' failed\n", uc_key->name);
+		return -EINVAL;
+	}
 
-		debug("%s: name=%s: code=%d\n", __func__, key->name, key->code);
+	if (dev_read_u32_array(dev, "gpios",
+			       uc_key->gpios, ARRAY_SIZE(uc_key->gpios))) {
+		printf("%s: read 'gpios' failed\n", uc_key->name);
+		return -EINVAL;
 	}
 
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "gpio-keys",
+U_BOOT_DRIVER(gpio_key) = {
+	.name   = "gpio_key",
+	.id     = UCLASS_KEY,
+	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
 };
 
-static const struct udevice_id gpio_key_ids[] = {
+/* Key Bus */
+static int gpio_key_bus_bind(struct udevice *dev)
+{
+	return key_bind_children(dev, "gpio_key");
+}
+
+static const struct udevice_id gpio_key_bus_match[] = {
 	{ .compatible = "gpio-keys" },
 	{ },
 };
 
-U_BOOT_DRIVER(gpio_keys) = {
-	.name   = "gpio-keys",
-	.id     = UCLASS_KEY,
-	.of_match = gpio_key_ids,
-	.ops	= &key_ops,
-	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
+U_BOOT_DRIVER(gpio_key_bus) = {
+	.name	   = "gpio_key_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = gpio_key_bus_match,
+	.bind	   = gpio_key_bus_bind,
 };
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 7f369665b2..1a370a5fa9 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -8,15 +8,12 @@
 #include <adc.h>
 #include <dm.h>
 #include <key.h>
+#include <dm/lists.h>
+#include <irq-generic.h>
 
-static LIST_HEAD(key_list);
-
-const char *evt_name[] = {
-	"Not down",
-	"Down",
-	"Long down",
-	"Not exist",
-};
+#define KEY_WARN(fmt, args...)	printf("Key Warn: "fmt, ##args)
+#define KEY_ERR(fmt, args...)	printf("Key Error: "fmt, ##args)
+#define KEY_DBG(fmt, args...)	 debug("Key Debug: "fmt, ##args)
 
 static inline uint64_t arch_counter_get_cntpct(void)
 {
@@ -26,7 +23,7 @@ static inline uint64_t arch_counter_get_cntpct(void)
 #ifdef CONFIG_ARM64
 	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
 #else
-	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
 #endif
 	return cval;
 }
@@ -39,197 +36,263 @@ uint64_t key_timer(uint64_t base)
 	return (cntpct > base) ? (cntpct - base) : 0;
 }
 
-/*
- * What's simple and complex event mean?
- *
- * simple event:   key press down or none;
- * complext event: key press down, long down or none;
- */
-static int key_read_adc_simple_event(struct input_key *key, unsigned int adcval)
+static int key_adc_event(struct dm_key_uclass_platdata *uc_key, int adcval)
 {
-	int max, min, margin = 30;
-	int keyval;
-
-	/* Get min, max */
-	max = key->adcval + margin;
-	if (key->adcval > margin)
-		min = key->adcval - margin;
-	else
-		min = 0;
-
-	debug("%s: '%s' configure adc=%d: range[%d~%d]; hw adcval=%d\n",
-	      __func__, key->name, key->adcval, min, max, adcval);
-
-	/* Check */
-	if ((adcval <= max) && (adcval >= min)) {
-		keyval = KEY_PRESS_DOWN;
-		debug("%s key pressed..\n", key->name);
-	} else {
-		keyval = KEY_PRESS_NONE;
-	}
-
-	return keyval;
+	return (adcval <= uc_key->max && adcval >= uc_key->min) ?
+		KEY_PRESS_DOWN : KEY_PRESS_NONE;
 }
 
-static int key_read_gpio_simple_event(struct input_key *key)
+static int key_gpio_event(struct dm_key_uclass_platdata *uc_key)
 {
-	if (!dm_gpio_is_valid(&key->gpio)) {
-		printf("%s: invalid gpio\n", key->name);
+	if (!dm_gpio_is_valid(&uc_key->gpio)) {
+		KEY_ERR("'%s' Invalid gpio\n", uc_key->name);
 		return KEY_PRESS_NONE;
 	}
 
-	return dm_gpio_get_value(&key->gpio) ? KEY_PRESS_DOWN : KEY_PRESS_NONE;
+	return dm_gpio_get_value(&uc_key->gpio) ?
+	       KEY_PRESS_DOWN : KEY_PRESS_NONE;
 }
 
-static int key_read_gpio_complex_event(struct input_key *key)
+static int key_gpio_interrupt_event(struct dm_key_uclass_platdata *uc_key)
 {
-	int keyval;
+	int event;
 
 	debug("%s: %s: up=%llu, down=%llu, delta=%llu\n",
-	      __func__, key->name, key->up_t, key->down_t,
-	      key->up_t - key->down_t);
+	      __func__, uc_key->name, uc_key->rise_ms, uc_key->fall_ms,
+	      uc_key->rise_ms - uc_key->fall_ms);
 
 	/* Possible this is machine power-on long pressed, so ignore this */
-	if (key->down_t == 0 && key->up_t != 0) {
-		keyval = KEY_PRESS_NONE;
+	if (uc_key->fall_ms == 0 && uc_key->rise_ms != 0) {
+		event = KEY_PRESS_NONE;
 		goto out;
 	}
 
-	if ((key->up_t > key->down_t) &&
-	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_LONG_DOWN;
-		debug("%s key long pressed..\n", key->name);
-	} else if (key->down_t &&
-		   key_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_LONG_DOWN;
-		debug("%s key long pressed(hold)..\n", key->name);
-	} else if ((key->up_t > key->down_t) &&
-		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_DOWN;
-		debug("%s key short pressed..\n", key->name);
+	if ((uc_key->rise_ms > uc_key->fall_ms) &&
+	    (uc_key->rise_ms - uc_key->fall_ms) >= KEY_LONG_DOWN_MS) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_LONG_DOWN;
+		KEY_DBG("%s key long pressed..\n", uc_key->name);
+	} else if (uc_key->fall_ms &&
+		   key_timer(uc_key->fall_ms) >= KEY_LONG_DOWN_MS) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_LONG_DOWN;
+		KEY_DBG("%s key long pressed(hold)..\n", uc_key->name);
+	} else if ((uc_key->rise_ms > uc_key->fall_ms) &&
+		   (uc_key->rise_ms - uc_key->fall_ms) < KEY_LONG_DOWN_MS) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_DOWN;
+		KEY_DBG("%s key short pressed..\n", uc_key->name);
 	/* Possible in charge animation, we enable irq after fuel gauge updated */
-	} else if (key->up_t && key->down_t && (key->up_t == key->down_t)){
-		key->up_t = 0;
-		key->down_t = 0;
-		keyval = KEY_PRESS_DOWN;
-		debug("%s key short pressed..\n", key->name);
+	} else if (uc_key->rise_ms && uc_key->fall_ms &&
+		   (uc_key->rise_ms == uc_key->fall_ms)) {
+		uc_key->rise_ms = 0;
+		uc_key->fall_ms = 0;
+		event = KEY_PRESS_DOWN;
+		KEY_DBG("%s key short pressed..\n", uc_key->name);
 	} else {
-		keyval = KEY_PRESS_NONE;
+		event = KEY_PRESS_NONE;
 	}
 
 out:
-	return keyval;
+	return event;
+}
+
+int key_is_pressed(int event)
+{
+	return (event == KEY_PRESS_DOWN || event == KEY_PRESS_LONG_DOWN);
 }
 
-static int key_read_gpio_interrupt_event(struct input_key *key)
+static int key_core_read(struct dm_key_uclass_platdata *uc_key)
 {
-	debug("%s: %s\n", __func__, key->name);
+	unsigned int adcval;
+
+	if (uc_key->type == ADC_KEY) {
+		if (adc_channel_single_shot("saradc",
+					    uc_key->channel, &adcval)) {
+			KEY_ERR("%s failed to read saradc\n", uc_key->name);
+			return KEY_NOT_EXIST;
+		}
 
-	return key_read_gpio_complex_event(key);
+		return key_adc_event(uc_key, adcval);
+	}
+
+	return (uc_key->code == KEY_POWER) ?
+		key_gpio_interrupt_event(uc_key) :
+		key_gpio_event(uc_key);
 }
 
-int key_is_pressed(int keyval)
+int key_read(int code)
 {
-	return (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN);
+	struct dm_key_uclass_platdata *uc_key;
+	struct udevice *dev;
+	struct uclass *uc;
+	bool allow_pre_reloc = false;
+	int ret, event = KEY_NOT_EXIST;
+
+	ret = uclass_get(UCLASS_KEY, &uc);
+	if (ret)
+		return ret;
+
+try_again:
+	for (uclass_first_device(UCLASS_KEY, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		uc_key = dev_get_uclass_platdata(dev);
+
+		if (!allow_pre_reloc && uc_key->pre_reloc)
+			continue;
+
+		if (uc_key->code != code)
+			continue;
+
+		event = key_core_read(uc_key);
+		if (key_is_pressed(event))
+			return event;
+	}
+
+	/* If not find valid key node from kernel, try from u-boot */
+	if (event == KEY_NOT_EXIST && !allow_pre_reloc) {
+		allow_pre_reloc = true;
+		goto try_again;
+	}
+
+	return event;
 }
 
-void key_add(struct input_key *key)
+#ifdef CONFIG_IRQ
+static void gpio_irq_handler(int irq, void *data)
 {
-	if (!key)
-		return;
+	struct dm_key_uclass_platdata *uc_key = data;
 
-	if (!key->parent) {
-		printf("Err: Can't find key(code=%d) device\n", key->code);
+	if (uc_key->irq != irq)
 		return;
+
+	if (irq_get_gpio_level(irq)) {
+		uc_key->rise_ms = key_timer(0);
+		KEY_DBG("%s: key dn: %llu ms\n", uc_key->name, uc_key->fall_ms);
+	} else {
+		uc_key->fall_ms = key_timer(0);
+		KEY_DBG("%s: key up: %llu ms\n", uc_key->name, uc_key->rise_ms);
 	}
 
-	key->pre_reloc = dev_read_bool(key->parent, "u-boot,dm-pre-reloc");
-	list_add_tail(&key->link, &key_list);
+	/* Must delay */
+	mdelay(10);
+	irq_revert_irq_type(irq);
 }
+#endif
 
-static int __key_read(struct input_key *key)
+int key_bind_children(struct udevice *dev, const char *drv_name)
 {
-	unsigned int adcval;
-	int keyval = KEY_NOT_EXIST;
+	const char *name;
+	ofnode node;
 	int ret;
 
-	/* Is a adc key? */
-	if (key->type & ADC_KEY) {
-		ret = adc_channel_single_shot("saradc",
-					      key->channel, &adcval);
+	dev_for_each_subnode(node, dev) {
+		/*
+		 * If this node has "compatible" property, this is not
+		 * a amp subnode, but a normal device. skip.
+		 */
+		ofnode_get_property(node, "compatible", &ret);
+		if (ret >= 0)
+			continue;
+
+		if (ret != -FDT_ERR_NOTFOUND)
+			return ret;
+
+		name = ofnode_get_name(node);
+		if (!name)
+			return -EINVAL;
+		ret = device_bind_driver_to_node(dev, drv_name, name,
+						 node, NULL);
 		if (ret)
-			printf("%s: failed to read saradc, ret=%d\n",
-			       key->name, ret);
-		else
-			keyval = key_read_adc_simple_event(key, adcval);
-	/* Is a gpio key? */
-	} else if (key->type & GPIO_KEY) {
-		/* All pwrkey must register as an interrupt event */
-		if (key->code == KEY_POWER)
-			keyval = key_read_gpio_interrupt_event(key);
-		else
-			keyval = key_read_gpio_simple_event(key);
-	} else {
-		printf("%s: invalid key type!\n", __func__);
+			return ret;
 	}
 
-	debug("%s: '%s'(code=%d) is %s\n",
-	      __func__, key->name, key->code, evt_name[keyval]);
-
-	return keyval;
+	return 0;
 }
 
-int key_read(int code)
+static int key_post_probe(struct udevice *dev)
 {
-	struct udevice *dev;
-	struct input_key *key;
-	static int initialized;
-	int keyval = KEY_NOT_EXIST;
-
-	/* Initialize all key drivers */
-	if (!initialized) {
-		for (uclass_first_device(UCLASS_KEY, &dev);
-		     dev;
-		     uclass_next_device(&dev)) {
-			debug("%s: have found key driver '%s'\n\n",
-			      __func__, dev->name);
-		}
-	}
+	struct dm_key_uclass_platdata *uc_key;
+	int margin = 30;
+	int ret;
 
-	/* The key from kernel dtb has higher priority */
-	debug("Reading key from kernel\n");
-	list_for_each_entry(key, &key_list, link) {
-		if (key->pre_reloc || (key->code != code))
-			continue;
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
+
+	/* True from U-Boot key node */
+	uc_key->pre_reloc = dev_read_bool(dev, "u-boot,dm-pre-reloc");
 
-		keyval = __key_read(key);
-		if (key_is_pressed(keyval))
-			return keyval;
+	if (uc_key->type == ADC_KEY) {
+		uc_key->max = uc_key->adcval + margin;
+		uc_key->min = uc_key->adcval > margin ?
+					uc_key->adcval - margin : 0;
+	} else {
+		if (uc_key->code == KEY_POWER) {
+			/* The gpio irq has been setup by key driver */
+			if (uc_key->irq)
+				goto finish;
+#ifdef CONFIG_IRQ
+			int irq;
+
+			irq = phandle_gpio_to_irq(uc_key->gpios[0],
+						  uc_key->gpios[1]);
+			if (irq < 0) {
+				KEY_ERR("%s: failed to request irq, ret=%d\n",
+					uc_key->name, irq);
+				return irq;
+			}
+
+			uc_key->irq = irq;
+			irq_install_handler(irq, gpio_irq_handler, uc_key);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+			irq_handler_enable(irq);
+#else
+			KEY_WARN("%s: no IRQ framework available\n", uc_key->name);
+#endif
+		} else {
+			ret = gpio_request_by_name(dev, "gpios", 0,
+						   &uc_key->gpio, GPIOD_IS_IN);
+			if (ret) {
+				KEY_ERR("%s: failed to request gpio, ret=%d\n",
+					uc_key->name, ret);
+				return ret;
+			}
+		}
 	}
 
-	/* If not found any key from kernel dtb, reading from U-Boot dtb */
-	if (keyval == KEY_NOT_EXIST) {
-		debug("Reading key from U-Boot\n");
-		list_for_each_entry(key, &key_list, link) {
-			if (!key->pre_reloc || (key->code != code))
-				continue;
+finish:
+#ifdef DEBUG
+	printf("[%s] (%s, %s, %s):\n", uc_key->name,
+	       uc_key->type == ADC_KEY ? "ADC" : "GPIO",
+	       uc_key->pre_reloc ? "U-Boot" : "Kernel",
+	       dev->parent->name);
+
+	if (uc_key->type == ADC_KEY) {
+		printf("    adcval: %d (%d, %d)\n", uc_key->adcval,
+		       uc_key->min, uc_key->max);
+		printf("   channel: %d\n\n", uc_key->channel);
+	} else {
+		const char *gpio_name =
+		     ofnode_get_name(ofnode_get_by_phandle(uc_key->gpios[0]));
 
-			keyval = __key_read(key);
-			if (key_is_pressed(keyval))
-				return keyval;
-		}
+		printf("       irq: %d\n", uc_key->irq);
+		printf("   gpio[0]: %s\n", gpio_name);
+		printf("   gpio[1]: %d\n\n", uc_key->gpios[1]);
 	}
+#endif
 
-	return keyval;
+	return 0;
 }
 
 UCLASS_DRIVER(key) = {
 	.id		= UCLASS_KEY,
 	.name		= "key",
+	.post_probe	= key_post_probe,
+	.per_device_platdata_auto_alloc_size =
+			sizeof(struct dm_key_uclass_platdata),
 };
diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index fc3ee631e5..14fe5bce3f 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -105,7 +105,7 @@ static void pwrkey_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
 	struct rk8xx_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
+	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	int ret, val, i;
 
 	debug("%s: irq = %d\n", __func__, irq);
@@ -135,14 +135,14 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 	/* fall event */
 	if (val & priv->pwron_fall_int) {
-		key->down_t = key_timer(0);
-		debug("%s: key down: %llu ms\n", __func__, key->down_t);
+		uc_key->fall_ms = key_timer(0);
+		debug("%s: key down: %llu ms\n", __func__, uc_key->fall_ms);
 	}
 
 	/* rise event */
 	if (val & priv->pwron_rise_int) {
-		key->up_t = key_timer(0);
-		debug("%s: key up: %llu ms\n", __func__, key->up_t);
+		uc_key->rise_ms = key_timer(0);
+		debug("%s: key up: %llu ms\n", __func__, uc_key->rise_ms);
 	}
 
 	/* clear intertup */
@@ -162,33 +162,31 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 static int pwrkey_interrupt_init(struct udevice *dev)
 {
-	struct input_key *key = dev_get_platdata(dev);
+	struct dm_key_uclass_platdata *uc_key = dev_get_uclass_platdata(dev);
 	u32 interrupt[2], phandle;
 	int irq, ret;
 
 	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
 	if (phandle < 0) {
-		printf("failed get 'interrupt-parent', ret=%d\n", phandle);
+		printf("read 'interrupt-parent' failed, ret=%d\n", phandle);
 		return phandle;
 	}
 
 	ret = dev_read_u32_array(dev->parent, "interrupts", interrupt, 2);
 	if (ret) {
-		printf("failed get 'interrupt', ret=%d\n", ret);
+		printf("read 'interrupt' failed, ret=%d\n", ret);
 		return ret;
 	}
 
-	key->parent = dev;
-	key->name = "rk8xx_pwrkey";
-	key->code = KEY_POWER;
-	key->type = GPIO_KEY;
+	uc_key->name = "rk8xx_pwr";
+	uc_key->type = GPIO_KEY;
+	uc_key->code = KEY_POWER;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
 	if (irq < 0) {
-		printf("%s: failed to request irq, ret=%d\n", key->name, irq);
+		printf("%s: request irq failed, ret=%d\n", uc_key->name, irq);
 		return irq;
 	}
-	key->irq = irq;
-	key_add(key);
+	uc_key->irq = irq;
 	irq_install_handler(irq, pwrkey_irq_handler, dev);
 	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 	irq_handler_enable(irq);
@@ -196,10 +194,6 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "rk8xx-pwrkey",
-};
-
 static int rk8xx_pwrkey_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
@@ -270,8 +264,6 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 U_BOOT_DRIVER(rk8xx_pwrkey) = {
 	.name   = "rk8xx_pwrkey",
 	.id     = UCLASS_KEY,
-	.ops	= &key_ops,
 	.probe  = rk8xx_pwrkey_probe,
-	.platdata_auto_alloc_size = sizeof(struct input_key),
 	.priv_auto_alloc_size = sizeof(struct rk8xx_key_priv),
 };
diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index 44f2b5d4a7..2619a8e3b0 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -4,145 +4,65 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <adc.h>
 #include <common.h>
-#include <console.h>
 #include <dm.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
 #include <key.h>
-#include <linux/input.h>
-#include <errno.h>
-#include <dm/read.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 
-static void gpio_irq_handler(int irq, void *data)
+static int rk_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct input_key *key = data;
+	struct dm_key_uclass_platdata *uc_key;
+	u32 chn[2];
 
-	if (key->irq != irq)
-		return;
+	uc_key = dev_get_uclass_platdata(dev);
+	if (!uc_key)
+		return -ENXIO;
 
-	/* up event */
-	if (irq_get_gpio_level(irq)) {
-		key->up_t = key_timer(0);
-		debug("%s: key down: %llu ms\n", key->name, key->down_t);
-	/* down event */
-	} else {
-		key->down_t = key_timer(0);
-		debug("%s: key up: %llu ms\n", key->name, key->up_t);
-	}
-	/* Must delay */
-	mdelay(10);
-	irq_revert_irq_type(irq);
-}
+	uc_key->name = dev_read_string(dev, "label");
+	uc_key->code = dev_read_u32_default(dev, "linux,code", -ENODATA);
 
-static int rk_keys_ofdata_to_platdata(struct udevice *dev)
-{
-	struct input_key *key;
-	u32 adc_channels[2], gpios[2], adcval;
-	int irq, ret;
-	ofnode node;
-
-	/* Get IO channel */
-	if (dev_read_u32_array(dev, "io-channels", adc_channels, 2)) {
-		printf("%s: failed to read 'io-channels'\n", __func__);
+	if (dev_read_u32_array(dev_get_parent(dev), "io-channels", chn, 2)) {
+		printf("%s: read 'io-channels' failed\n", uc_key->name);
 		return -EINVAL;
 	}
 
-	dev_for_each_subnode(node, dev) {
-		key = calloc(1, sizeof(struct input_key));
-		if (!key)
-			return -ENOMEM;
-
-		/* This is an ACD key */
-		if (!ofnode_read_u32(node, "rockchip,adc_value", &adcval)) {
-			key->parent = dev;
-			key->name = ofnode_read_string(node, "label");
-			key->type = ADC_KEY;
-			key->adcval = adcval;
-			key->channel = adc_channels[1];
-			if (ofnode_read_u32(node, "linux,code", &key->code)) {
-				printf("%s: failed to read 'linux,code'\n",
-				       key->name);
-				free(key);
-				continue;
-			}
-			key_add(key);
-		/* This is a GPIO key */
-		} else {
-			key->parent = dev;
-			key->type = GPIO_KEY;
-			key->name = ofnode_read_string(node, "label");
-			ret = ofnode_read_u32(node, "linux,code", &key->code);
-			if (ret) {
-				printf("%s: failed read 'linux,code', ret=%d\n",
-				       key->name, ret);
-				free(key);
-				continue;
-			}
-
-			/* Only register power key as interrupt */
-			if (key->code == KEY_POWER) {
-				ret = ofnode_read_u32_array(node, "gpios",
-							    gpios, 2);
-				if (ret) {
-					printf("%s: failed to read 'gpios', ret=%d\n",
-					       key->name, ret);
-					free(key);
-					continue;
-				}
-
-				/* Request irq */
-				irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-				if (irq < 0) {
-					printf("%s: failed to request irq, ret=%d\n",
-					       __func__, irq);
-					free(key);
-					continue;
-				}
-				key->irq = irq;
-				key_add(key);
-				irq_install_handler(irq, gpio_irq_handler, key);
-				irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-				irq_handler_enable(irq);
-			} else {
-				ret = gpio_request_by_name_nodev(node, "gpios",
-						0, &key->gpio, GPIOD_IS_IN);
-				if (ret) {
-					printf("%s: failed to request gpio, ret=%d\n",
-					       key->name, ret);
-					free(key);
-					continue;
-				}
-				key_add(key);
-			}
+	if (dev_read_bool(dev, "rockchip,adc_value")) {
+		uc_key->type = ADC_KEY;
+		uc_key->channel = chn[1];
+		uc_key->adcval =
+			dev_read_u32_default(dev, "rockchip,adc_value", 0);
+	} else {
+		uc_key->type = GPIO_KEY;
+		if (dev_read_u32_array(dev, "gpios",
+				       uc_key->gpios,
+				       ARRAY_SIZE(uc_key->gpios))) {
+			printf("%s: read 'gpios' failed\n", uc_key->name);
+			return -EINVAL;
 		}
-
-		debug("%s: name=%s: code=%d, adcval=%d, channel=%d, type=%d\n",
-		      __func__, key->name, key->code, key->adcval,
-		      key->channel, key->type);
 	}
 
 	return 0;
 }
 
-static const struct dm_key_ops key_ops = {
-	.name = "rk-keys",
+U_BOOT_DRIVER(rk_key) = {
+	.name     = "rk_key",
+	.id       = UCLASS_KEY,
+	.ofdata_to_platdata = rk_key_ofdata_to_platdata,
 };
 
-static const struct udevice_id rk_keys_ids[] = {
+/* Key Bus */
+static int rk_key_bus_bind(struct udevice *dev)
+{
+	return key_bind_children(dev, "rk_key");
+}
+
+static const struct udevice_id rk_key_bus_match[] = {
 	{ .compatible = "rockchip,key" },
 	{ },
 };
 
-U_BOOT_DRIVER(rk_keys) = {
-	.name   = "rk-keys",
-	.id     = UCLASS_KEY,
-	.ops	= &key_ops,
-	.of_match = rk_keys_ids,
-	.ofdata_to_platdata = rk_keys_ofdata_to_platdata,
+U_BOOT_DRIVER(rk_key_bus) = {
+	.name	   = "rk_key_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = rk_key_bus_match,
+	.bind	   = rk_key_bus_bind,
 };
diff --git a/include/key.h b/include/key.h
index f85e1f3164..c9e11bd874 100644
--- a/include/key.h
+++ b/include/key.h
@@ -18,49 +18,43 @@ enum {
 	GPIO_KEY  = 0x2,
 };
 
-enum key_state {
+enum key_event {
 	KEY_PRESS_NONE,	/* press without release */
 	KEY_PRESS_DOWN,	/* press -> release */
 	KEY_PRESS_LONG_DOWN,
 	KEY_NOT_EXIST,
 };
 
-struct input_key {
-	struct udevice *parent;
-	struct list_head link;
+struct dm_key_uclass_platdata {
 	const char *name;
 	bool pre_reloc;
 	u32 code;
 	u8 type;
 
 	/* ADC key */
-	u32 adcval;
-	u32 vref;
 	u8 channel;
+	u32 adcval;
+	u32 min;
+	u32 max;
 
 	/* GPIO key */
 	u32 irq;
+	u32 gpios[2];
 	struct gpio_desc gpio;
 
-	/* Event */
-	u64 up_t;
-	u64 down_t;
-};
-
-struct dm_key_ops {
-	const char *name;
+	u64 rise_ms;
+	u64 fall_ms;
 };
 
 /* Use it instead of get_timer() in key interrupt handler */
 uint64_t key_timer(uint64_t base);
 
-/* Reister you key to dm key framework */
-void key_add(struct input_key *key);
-
 /* Confirm if your key value is a press event */
 int key_is_pressed(int keyval);
 
 /* Read key */
 int key_read(int code);
 
+int key_bind_children(struct udevice *dev, const char *drv_name);
+
 #endif

commit a0ceee92279dd8ae8d6561b24ca83eb310975159
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Apr 2 13:13:31 2019 +0800

    rockchip: support early load dtb from distro images
    
    It is optional to use dtb from distro images to initialize
    periph drivers when kernel dtb function is enabled.
    
    Change-Id: I7119962ba61d84c5ccdf2e515e21bb347e50b91b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 880171f022..040a117dec 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -559,6 +559,22 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
+config ROCKCHIP_EARLY_DISTRO_DTB
+	bool "Enable support for distro dtb early"
+	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB
+	default n
+	help
+	  This enables loading dtb from distro bootable partition when there
+	  is no valid dtb in android boot.img and rockchip resource.img.
+
+if ROCKCHIP_EARLY_DISTRO_DTB
+
+config ROCKCHIP_EARLY_DISTRO_DTB_PATH
+	string "/rk-kernel.dtb"
+	help
+	  "DTB file path in the bootable partition image"
+endif
+
 config ROCKCHIP_VENDOR_PARTITION
 	bool "Rockchip vendor storage partition support"
 	depends on RKIMG_BOOTLOADER
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index d2742fbad7..50598d89fd 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <adc.h>
 #include <asm/io.h>
+#include <fs.h>
 #include <malloc.h>
 #include <sysmem.h>
 #include <linux/list.h>
@@ -628,17 +629,72 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 	return found ? 0 : -ENOENT;
 }
 
+#ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
+static int rockchip_read_distro_dtb_file(char *fdt_addr)
+{
+	const char *cmd = "part list ${devtype} ${devnum} -bootable devplist";
+	char *devnum, *devtype, *devplist;
+	char devnum_part[12];
+	char fdt_hex_str[19];
+	char *fs_argv[5];
+	int ret;
+
+	if (!rockchip_get_bootdev() || !fdt_addr)
+		return -ENODEV;
+
+	ret = run_command_list(cmd, -1, 0);
+	if (ret)
+		return ret;
+
+	devplist = env_get("devplist");
+	if (!devplist)
+		return -ENODEV;
+
+	devtype = env_get("devtype");
+	devnum = env_get("devnum");
+	sprintf(devnum_part, "%s:%s", devnum, devplist);
+	sprintf(fdt_hex_str, "0x%lx", (ulong)fdt_addr);
+
+#ifdef CONFIG_CMD_FS_GENERIC
+	fs_argv[0] = "load";
+	fs_argv[1] = devtype,
+	fs_argv[2] = devnum_part;
+	fs_argv[3] = fdt_hex_str;
+	fs_argv[4] = CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH;
+
+	if (do_load(NULL, 0, 5, fs_argv, FS_TYPE_ANY))
+		return -EIO;
+#endif
+	if (fdt_check_header(fdt_addr))
+		return -EIO;
+
+	return fdt_totalsize(fdt_addr);
+}
+#endif
+
 int rockchip_read_dtb_file(void *fdt_addr)
 {
 	struct resource_file *file;
 	struct list_head *node;
 	char *dtb_name = DTB_FILE;
-	int ret, size;
+	int size = -ENODEV;
 
 	if (list_empty(&entrys_head)) {
-		ret = init_resource_list(NULL);
-		if (ret)
-			return ret;
+		if (init_resource_list(NULL)) {
+#ifdef CONFIG_ROCKCHIP_EARLY_DISTRO_DTB
+			/* Maybe a distro boot.img with dtb ? */
+			printf("Distro DTB: %s\n",
+			       CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH);
+			size = rockchip_read_distro_dtb_file(fdt_addr);
+			if (size < 0)
+				return size;
+			if (!sysmem_alloc_base(MEMBLK_ID_FDT,
+				(phys_addr_t)fdt_addr,
+				ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
+				return -ENOMEM;
+#endif
+			return size;
+		}
 	}
 
 	list_for_each(node, &entrys_head) {
@@ -668,13 +724,13 @@ int rockchip_read_dtb_file(void *fdt_addr)
 			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
-	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
-	if (ret < 0)
-		return ret;
+	size = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+	if (size < 0)
+		return size;
 
 #if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 
-	return ret;
+	return size;
 }

commit 4388deca723e78cda09c928f33f3a4d299e414c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 21 18:22:13 2019 +0800

    dm: add amp uclass and rockchip amp driver support
    
    - add amp uclass;
    - add a simple rockchip amp driver.
    
    An example for amps dts node configure:
    amps {
            compatible = "uboot,rockchip-amp";
            status = "okay";
    
            amp@0 {
                    description  = "mcu-os1";
                    partition    = "mcu1";
                    cpu          = <0x1>; // this is mpidr!
                    load         = <0x800000>;
                    entry        = <0x800000>;
                    memory       = <0x800000 0x400000>;
            };
    
            amp@1 {
                    ......
            };
    
            ......
    };
    
    U-Boot loads "mcu-os1" firmware to "0x800000" address from partiton
    "mcu1" for cpu[1], the cpu[1] entry address is 0x800000. And
    U-Boot reserve memory from 0x800000 with 0x400000 size in order
    to make it invisible for kernel.
    
    Please use rockchip tool "mkkrnlimg" to pack firmware binary, example:
    ./scripts/mkkrnlimg mcu-os1.bin mcu-os1.img
    
    Change-Id: I127d5d9f460ec0c1812a76fb4c3702e82f21c9a6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index efedc288d4..dc812e2d97 100644
--- a/Makefile
+++ b/Makefile
@@ -654,6 +654,7 @@ libs-y += fs/
 libs-y += net/
 libs-y += disk/
 libs-y += drivers/
+libs-y += drivers/cpu/
 libs-y += drivers/dma/
 libs-y += drivers/gpio/
 libs-y += drivers/i2c/
diff --git a/drivers/cpu/Kconfig b/drivers/cpu/Kconfig
index 0d1424d38e..6dfced4f4f 100644
--- a/drivers/cpu/Kconfig
+++ b/drivers/cpu/Kconfig
@@ -6,3 +6,15 @@ config CPU
 	  multiple CPUs, then normally have to be set up in U-Boot so that
 	  they can work correctly in the OS. This provides a framework for
 	  finding out information about available CPUs and making changes.
+
+config AMP
+	bool "Enable AMP drivers using Driver Model"
+	help
+	  This support Asymmetric Multi-Processing, cpus can run on different
+	  firmware.
+
+config ROCKCHIP_AMP
+	bool "Enable Rockchip AMP driver"
+	depends on AMP && ROCKCHIP_SMCCC && RKIMG_BOOTLOADER
+	help
+	  This enable Rockchip AMP driver support.
diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile
index db515f6f17..d50912ffe5 100644
--- a/drivers/cpu/Makefile
+++ b/drivers/cpu/Makefile
@@ -5,5 +5,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 obj-$(CONFIG_CPU) += cpu-uclass.o
+obj-$(CONFIG_AMP) += amp-uclass.o
 
 obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
+obj-$(CONFIG_ROCKCHIP_AMP) += rockchip_amp.o
diff --git a/drivers/cpu/amp-uclass.c b/drivers/cpu/amp-uclass.c
new file mode 100644
index 0000000000..7d52722a2d
--- /dev/null
+++ b/drivers/cpu/amp-uclass.c
@@ -0,0 +1,162 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <amp.h>
+#include <dm.h>
+#include <dm/lists.h>
+
+int amp_cpu_on(u32 cpu)
+{
+	struct dm_amp_uclass_platdata *uc_pdata;
+	const struct dm_amp_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_AMP, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_AMP, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		uc_pdata = dev_get_uclass_platdata(dev);
+		if (!uc_pdata || uc_pdata->cpu != cpu)
+			continue;
+
+		ops = dev_get_driver_ops(dev);
+		if (!ops || !ops->cpu_on)
+			return -ENOSYS;
+
+		return ops->cpu_on(dev);
+	}
+
+	return -ENODEV;
+}
+
+int amp_cpus_on(void)
+{
+	const struct dm_amp_ops *ops;
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_AMP, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_AMP, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ops = dev_get_driver_ops(dev);
+		if (!ops || !ops->cpu_on)
+			continue;
+		ret = ops->cpu_on(dev);
+	}
+
+	return ret;
+}
+
+int amp_bind_children(struct udevice *dev, const char *drv_name)
+{
+	const char *name;
+	ofnode node;
+	int ret;
+
+	dev_for_each_subnode(node, dev) {
+		/*
+		 * If this node has "compatible" property, this is not
+		 * a amp subnode, but a normal device. skip.
+		 */
+		ofnode_get_property(node, "compatible", &ret);
+		if (ret >= 0)
+			continue;
+
+		if (ret != -FDT_ERR_NOTFOUND)
+			return ret;
+
+		name = ofnode_get_name(node);
+		if (!name)
+			return -EINVAL;
+		ret = device_bind_driver_to_node(dev, drv_name, name,
+						 node, NULL);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int amp_pre_probe(struct udevice *dev)
+{
+	struct dm_amp_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	if (!uc_pdata)
+		return -ENXIO;
+
+	uc_pdata->desc = dev_read_string(dev, "description");
+	uc_pdata->partition = dev_read_string(dev, "partition");
+	uc_pdata->cpu = dev_read_u32_default(dev, "cpu", -ENODATA);
+#ifdef CONFIG_ARM64
+	uc_pdata->aarch = dev_read_u32_default(dev, "aarch", 64);
+#else
+	uc_pdata->aarch = dev_read_u32_default(dev, "aarch", 32);
+#endif
+	uc_pdata->load = dev_read_u32_default(dev, "load", -ENODATA);
+	uc_pdata->entry = dev_read_u32_default(dev, "entry", -ENODATA);
+
+	dev_read_u32_array(dev, "memory",
+			   uc_pdata->reserved_mem,
+			   ARRAY_SIZE(uc_pdata->reserved_mem));
+
+	if (!uc_pdata->desc || !uc_pdata->partition ||
+	    uc_pdata->cpu == -ENODATA || uc_pdata->load == -ENODATA ||
+	    uc_pdata->entry == -ENODATA || !uc_pdata->reserved_mem[0] ||
+	    !uc_pdata->reserved_mem[1] ||
+	    (uc_pdata->aarch != 64 && uc_pdata->aarch != 32)) {
+		printf("AMP: \"%s\" is not complete\n", dev->name);
+		return -EINVAL;
+	}
+
+#ifdef DEBUG
+	printf("[%s]:\n", dev_read_name(dev));
+	printf("    descrption: %s\n", uc_pdata->desc);
+	printf("     partition: %s\n", uc_pdata->partition);
+	printf("           cpu: 0x%x\n", uc_pdata->cpu);
+	printf("         aarch: %d\n", uc_pdata->aarch);
+	printf("          load: 0x%08x\n", uc_pdata->load);
+	printf("         entry: 0x%08x\n", uc_pdata->entry);
+	printf("  reserved_mem: 0x%08x - 0x%08x\n\n",
+	       uc_pdata->reserved_mem[0],
+	       uc_pdata->reserved_mem[0] + uc_pdata->reserved_mem[1]);
+#endif
+
+	return 0;
+}
+
+UCLASS_DRIVER(amp) = {
+	.id		= UCLASS_AMP,
+	.name		= "amp",
+	.pre_probe	= amp_pre_probe,
+	.per_device_platdata_auto_alloc_size =
+			sizeof(struct dm_amp_uclass_platdata),
+};
+
+#ifdef DEBUG
+static int do_amp_cpus_on(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	amp_cpus_on();
+	return 0;
+}
+
+U_BOOT_CMD(
+	amp_cpus_on, 1, 1, do_amp_cpus_on,
+	"Brought up all amp cpus",
+	""
+);
+#endif
diff --git a/drivers/cpu/rockchip_amp.c b/drivers/cpu/rockchip_amp.c
new file mode 100644
index 0000000000..9408c8c1b6
--- /dev/null
+++ b/drivers/cpu/rockchip_amp.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <amp.h>
+#include <boot_rkimg.h>
+#include <bidram.h>
+#include <dm.h>
+#include <sysmem.h>
+#include <asm/arch/rockchip_smccc.h>
+
+#define AMP_I(fmt, args...)	printf("AMP: "fmt, ##args)
+#define AMP_E(fmt, args...)	printf("AMP Error: "fmt, ##args)
+
+/*
+ * An example for amps dts node configure:
+ *
+ * amps {
+ *	compatible = "uboot,rockchip-amp";
+ *	status = "okay";
+ *
+ *	amp@0 {
+ *		description  = "mcu-os1";
+ *		partition    = "mcu1";
+ *		cpu          = <0x1>;		// this is mpidr!
+ *		load         = <0x800000>;
+ *		entry        = <0x800000>;
+ *		memory       = <0x800000 0x400000>;
+ *	};
+ *
+ *	amp@1 {
+ *		......
+ *	};
+ *
+ *	......
+ * };
+ *
+ * U-Boot loads "mcu-os1" firmware to "0x800000" address from partiton
+ * "mcu1" for cpu[1], the cpu[1] entry address is 0x800000. And
+ * U-Boot reserve memory from 0x800000 with 0x400000 size in order
+ * to make it invisible for kernel.
+ *
+ * Please use rockchip tool "mkkrnlimg" to pack firmware binary, example:
+ * ./scripts/mkkrnlimg mcu-os1.bin mcu-os1.img
+ */
+
+static int rockchip_amp_cpu_on(struct udevice *dev)
+{
+	struct dm_amp_uclass_platdata *uc_pdata;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	int ret, size;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	if (!uc_pdata)
+		return -ENXIO;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc)
+		return -EEXIST;
+
+	ret = part_get_info_by_name(dev_desc, uc_pdata->partition, &part_info);
+	if (ret < 0) {
+		AMP_E("\"%s\" find partition \"%s\" failed\n",
+		      uc_pdata->desc, uc_pdata->partition);
+		return ret;
+	}
+
+	ret = bidram_reserve_by_name(uc_pdata->partition,
+				     uc_pdata->reserved_mem[0],
+				     uc_pdata->reserved_mem[1]);
+	if (ret) {
+		AMP_E("Reserve \"%s\" region at 0x%08x - 0x%08x failed, ret=%d\n",
+		      uc_pdata->desc, uc_pdata->reserved_mem[0],
+		      uc_pdata->reserved_mem[0] + uc_pdata->reserved_mem[1], ret);
+		return -ENOMEM;
+	}
+
+	size = read_rockchip_image(dev_desc, &part_info,
+				   (void *)(ulong)uc_pdata->load);
+	if (size < 0) {
+		AMP_E("\"%s\" load at 0x%08x failed\n",
+		      uc_pdata->desc, uc_pdata->load);
+		return size;
+	}
+
+	flush_dcache_range(uc_pdata->load,
+			   uc_pdata->load + ALIGN(size, ARCH_DMA_MINALIGN));
+
+	AMP_I("Brought up cpu[%x] on \"%s\" entry 0x%08x ...",
+	      uc_pdata->cpu, uc_pdata->desc, uc_pdata->entry);
+
+	ret = psci_cpu_on(uc_pdata->cpu, uc_pdata->entry);
+	if (ret) {
+		printf("failed\n");
+		return ret;
+	}
+	printf("OK\n");
+
+	return 0;
+}
+
+static const struct dm_amp_ops rockchip_amp_ops = {
+	.cpu_on = rockchip_amp_cpu_on,
+};
+
+U_BOOT_DRIVER(rockchip_amp) = {
+	.name	   = "rockchip_amp",
+	.id	   = UCLASS_AMP,
+	.ops	   = &rockchip_amp_ops,
+};
+
+/* AMP bus driver as all amp parent */
+static int rockchip_amp_bus_bind(struct udevice *dev)
+{
+	return amp_bind_children(dev, "rockchip_amp");
+}
+
+static const struct udevice_id rockchip_amp_bus_match[] = {
+	{ .compatible = "uboot,rockchip-amp", },
+	{},
+};
+
+U_BOOT_DRIVER(rockchip_amp_bus) = {
+	.name	   = "rockchip_amp_bus",
+	.id	   = UCLASS_SIMPLE_BUS,
+	.of_match  = rockchip_amp_bus_match,
+	.bind	   = rockchip_amp_bus_bind,
+};
diff --git a/include/amp.h b/include/amp.h
new file mode 100644
index 0000000000..629dcdcd04
--- /dev/null
+++ b/include/amp.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _AMP_H_
+#define _AMP_H_
+
+#include <dm.h>
+
+struct dm_amp_ops {
+	int (*cpu_on)(struct udevice *dev);
+};
+
+struct dm_amp_uclass_platdata {
+	const char *desc;
+	const char *partition;
+	u32 cpu;		/* cpu mpidr */
+	u32 aarch;
+	u32 load;
+	u32 entry;
+	u32 reserved_mem[2];	/* [0]: start, [1]: size */
+};
+
+int amp_bind_children(struct udevice *dev, const char *drv_name);
+int amp_cpus_on(void);
+int amp_cpu_on(u32 cpu);
+
+#endif	/* _AMP_H_ */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 70910f319e..b51b9873f2 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -31,6 +31,7 @@ enum uclass_id {
 	UCLASS_BLK,		/* Block device */
 	UCLASS_CLK,		/* Clock source, e.g. used by peripherals */
 	UCLASS_CPU,		/* CPU, typically part of an SoC */
+	UCLASS_AMP,		/* Asymmetric Multi-Processing */
 	UCLASS_CODEC,		/* audio codec */
 	UCLASS_CROS_EC,		/* Chrome OS EC */
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */

commit 5ae28c899a83ad1e62e928d6e833cb3f8916e13e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 3 18:12:42 2019 +0800

    rockchip: dts: rk3229-evb: support recovery GPIO key
    
    RK3229 hardware design reference is GPIO3_D1.
    
    Change-Id: I49807081212c77a84d38200a87449eb91dc5a7d3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 376d1e7d22..5b4c97befc 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -34,6 +34,19 @@
 		regulator-always-on;
 		regulator-boot-on;
 	};
+
+	gpio-keys {
+		u-boot,dm-pre-reloc;
+		compatible = "gpio-keys";
+		status = "okay";
+
+		volume-up {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "Volume Up";
+			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &dmc {
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 7034b344e1..3d73382141 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -62,6 +62,16 @@
 	status = "okay";
 };
 
+&pinctrl {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &gpio1 {
 	u-boot,dm-pre-reloc;
 };
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit de573281d825ca91bfe0573343051bfb169d90e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Apr 3 17:40:42 2019 +0800

    rockchip: dts: rk3399-evb: rename key node
    
    Use different name for the volume up key node, dm framework
    can't support the same device node since kernel dtb is enabled.
    
    Change-Id: Ia99c9b8fd46fea63949f9d06072c0ebec0e76a46
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index bbc1c0f4a1..e8e240898c 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -25,7 +25,7 @@
 		status = "okay";
 		io-channels = <&saradc 1>;
 
-		vol-up-key {
+		vol-up-key0 {
 			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
@@ -40,7 +40,7 @@
 		status = "okay";
 		io-channels = <&saradc 2>;
 
-		vol-up-key {
+		vol-up-key1 {
 			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";

commit 04e429a4cdf5db388fc52eb015456b444856383e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 29 18:19:11 2019 +0800

    scripts: add mkkrnlimg tool to pack rockchip format image
    
    sync from kernel develop-4.4:
    (3091608 arm64: dts: rockchip: fixup vccio3-supply for ai-va-v10)
    
    Change-Id: I4c67dfc617c99791d2706e2b260a79fd3419b29d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/mkkrnlimg b/scripts/mkkrnlimg
new file mode 100755
index 0000000000..f8601d3ee0
Binary files /dev/null and b/scripts/mkkrnlimg differ

commit 9ac41981038a7853d10517340630d830b07f0503
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 3 17:15:05 2019 +0800

    rockchip: rk3328: add boot order in chosen
    
    Default boot from sdcard may fail in evb without sd.
    
    Change-Id: Ifde49b6b28e7154a14f5e028d9863446f11cb59c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 7a07362a95..dc5dc68bf5 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -11,6 +11,7 @@
 	};
 
 	chosen {
+		u-boot,spl-boot-order = &sdmmc, &emmc;
 		stdout-path = &uart2;
 	};
 

commit 9560dcb992fdee783bebd208bb8e140a78d47bc2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 29 20:35:08 2019 +0800

    rockchip: rk3368: fix uart2 iomux
    
    RK3368 uart2 iomux config is not correct, fix it.
    
    Change-Id: I992c4b0ae9d8c0a91c5ee1fb3e7850a1e94db206
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 5fe2f3f19f..46e63c9d7f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -242,10 +242,12 @@ void board_debug_uart_init(void)
 		GPIO2A6_MASK		= GENMASK(13, 12),
 		GPIO2A6_GPIO		= 0,
 		GPIO2A6_UART0_SIN      = (1 << 13),
+		GPIO2A6_UART2_SIN	= (2 << 12),
 
 		GPIO2A5_MASK		= GENMASK(11, 10),
 		GPIO2A5_GPIO		= 0,
 		GPIO2A5_UART0_SOUT	 = (1 << 11),
+		GPIO2A5_UART2_SOUT      = (2 << 10),
 	};
 
 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
@@ -276,9 +278,9 @@ void board_debug_uart_init(void)
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
 	/* Enable early UART2 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A6_MASK, GPIO2A6_UART0_SIN);
+		     GPIO2A6_MASK, GPIO2A6_UART2_SIN);
 	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A5_MASK, GPIO2A5_UART0_SOUT);
+		     GPIO2A5_MASK, GPIO2A5_UART2_SOUT);
 #endif
 }
 

commit 305d8903e0837a7762424ebd11848394c864e1ac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 28 15:31:47 2019 +0800

    lib: sysmem: improve kernel reserved-memory alloc
    
    - If the region is out of avaiable dram bank, return success;
    - region can override allocated memblk with attr M_ATTR_OVERLAP;
    
    Change-Id: I02171cdb51462e9cec3dd955ae3e0aaaa0ee7afd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 8b08644a74..952a5e1894 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -194,7 +194,10 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 	phys_addr_t paddr;
 	phys_addr_t alloc_base;
 	phys_size_t alloc_size;
-	bool req_overlap = false;
+	phys_addr_t bank_base;
+	phys_size_t bank_size;
+	bool req_overlap = false; /* Only for kernel reserved-memory */
+	int i;
 
 	if (!sysmem_has_init())
 		return NULL;
@@ -204,8 +207,20 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			SYSMEM_E("NULL name for alloc sysmem\n");
 			return NULL;
 		} else if (id == MEMBLK_ID_FDT_RESV) {
-			req_overlap = true;
-			if (base >= gd->ram_top)
+			for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+				if (!gd->bd->bi_dram[i].size)
+					continue;
+
+				bank_base = gd->bd->bi_dram[i].start;
+				bank_size = gd->bd->bi_dram[i].size;
+				if (sysmem_is_overlap(base, size,
+						      bank_base, bank_size)) {
+					req_overlap = true;
+					break;
+				}
+			}
+
+			if (!req_overlap)
 				return (void *)base;
 		}
 		name = sysmem_alias2name(mem_name, (int *)&id);

commit ba76dc003ef1ce07b28460639347507719df7946
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Wed Feb 13 09:49:38 2019 +0800

    power: pmic: rk8xx: enable under-voltage protection to rk817/rk809
    
    The under-voltage protection will shutdown the LDO3 and reset the PMIC.
    
    Change-Id: Ic84c7ad1a2eed8c1f983e761988ffb903fc878af
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 02ea363e1a..1e5f45bfc0 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -13,17 +13,21 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static struct reg_data rk817_init_reg[] = {
+/* enable the under-voltage protection,
+ * the under-voltage protection will shutdown the LDO3 and reset the PMIC
+ */
+	{ RK817_BUCK4_CMIN, 0x60, 0x60},
 /*
  * Only when system suspend while U-Boot charge needs this config support
  */
 #ifdef CONFIG_DM_CHARGE_DISPLAY
-static struct reg_data rk817_init_reg[] = {
 	/* Set pmic_sleep as sleep function */
 	{ RK817_PMIC_SYS_CFG3, 0x08, 0x18 },
 	/* Set pmic_int active low */
 	{ RK817_GPIO_INT_CFG,  0x00, 0x02 },
-};
 #endif
+};
 
 static const struct pmic_child_info pmic_children_info[] = {
 	{ .prefix = "DCDC", .driver = "rk8xx_buck"},
@@ -213,10 +217,8 @@ static int rk8xx_probe(struct udevice *dev)
 	case RK817_ID:
 		on_source = RK817_ON_SOURCE;
 		off_source = RK817_OFF_SOURCE;
-#ifdef CONFIG_DM_CHARGE_DISPLAY
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
-#endif
 		power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
 		power_en1 = pmic_reg_read(dev, RK817_POWER_EN1);
 		power_en2 = pmic_reg_read(dev, RK817_POWER_EN2);
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index daeebb9665..80bf923732 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -211,6 +211,7 @@ enum {
 
 #define RK8XX_ON_SOURCE		0xae
 #define RK8XX_OFF_SOURCE	0xaf
+#define RK817_BUCK4_CMIN	0xc6
 #define RK817_ON_SOURCE		0xf5
 #define RK817_OFF_SOURCE	0xf6
 

commit 204f7c3926e3cc28fb4211b08735ab9131bf1748
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 29 09:46:12 2019 +0800

    mmc: dw_mmc: fix sd card power enable errror
    
    The sd card power is enabled when PWREN is set low by rockchip hardware design.
    
    Change-Id: I4fb54235bd5235030146f77be1e07dc4e729ae06
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 81981c7911..f8347f0c52 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -584,8 +584,16 @@ static int dwmci_init(struct mmc *mmc)
 
 	if (host->board_init)
 		host->board_init(host);
-
+#ifdef CONFIG_ARCH_ROCKCHIP
+	if (host->dev_index == 0)
+		dwmci_writel(host, DWMCI_PWREN, 1);
+	else if (host->dev_index == 1)
+		dwmci_writel(host, DWMCI_PWREN, 0);
+	else
+		dwmci_writel(host, DWMCI_PWREN, 1);
+#else
 	dwmci_writel(host, DWMCI_PWREN, 1);
+#endif
 
 	if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
 		debug("%s[%d] Fail-reset!!\n", __func__, __LINE__);

commit ca13d12f664966c897e8ef0aab47bd2140c5b9c7
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Mar 15 17:12:19 2019 +0800

    drivers: mtd: nand: add rockchip nandc v9 drivers
    
    Change-Id: I7019f309528d41710c5af6857a4d4f54037dd595
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index b43d86d050..f3372d65f7 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -79,9 +79,17 @@ config NAND_PXA3XX
 config NAND_ROCKCHIP
 	bool "Support for NAND on Rockchip SoCs"
 	select SYS_NAND_SELF_INIT
+	default n
 	---help---
 	Enable support for Rockchip nand.
 
+config NAND_ROCKCHIP_V9
+	bool "Support for NAND V9 on Rockchip SoCs"
+	select SYS_NAND_SELF_INIT
+	default n
+	---help---
+	Enable support for Rockchip nand v9.
+
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 6067b89837..de8675d227 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -70,7 +70,7 @@ obj-$(CONFIG_NAND_PLAT) += nand_plat.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
 obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
 obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand.o
-
+obj-$(CONFIG_NAND_ROCKCHIP_V9) += rockchip_nand_v9.o
 else  # minimal SPL drivers
 
 obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
diff --git a/drivers/mtd/nand/rockchip_nand_v9.c b/drivers/mtd/nand/rockchip_nand_v9.c
new file mode 100644
index 0000000000..b2ff609d33
--- /dev/null
+++ b/drivers/mtd/nand/rockchip_nand_v9.c
@@ -0,0 +1,691 @@
+/*
+ * Copyright (c) 2017 Yifeng Zhao <yifeng.zhao@rock-chips.com>
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <inttypes.h>
+#include <nand.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NANDC_V9_BOOTROM_ECC	70
+#define NANDC_V9_NUM_BANKS	4
+#define NANDC_V9_DEF_TIMEOUT	20000
+#define NANDC_V9_READ		0
+#define NANDC_V9_WRITE		1
+#define NANDC_REG_V9_FMCTL	0x00
+#define NANDC_REG_V9_FMWAIT	0x04
+#define NANDC_REG_V9_FLCTL	0x10
+#define NANDC_REG_V9_BCHCTL	0x20
+#define NANDC_REG_V9_DMA_CFG	0x30
+#define NANDC_REG_V9_DMA_BUF0	0x34
+#define NANDC_REG_V9_DMA_BUF1	0x38
+#define NANDC_REG_V9_DMA_ST	0x40
+#define NANDC_REG_V9_VER	0x80
+#define NANDC_REG_V9_INTEN	0x120
+#define NANDC_REG_V9_INTCLR	0x124
+#define NANDC_REG_V9_INTST	0x128
+#define NANDC_REG_V9_BCHST	0x150
+#define NANDC_REG_V9_SPARE0	0x200
+#define NANDC_REG_V9_SPARE1	0x204
+#define NANDC_REG_V9_RANDMZ	0x208
+#define NANDC_REG_V9_BANK0	0x800
+#define NANDC_REG_V9_SRAM0	0x1000
+#define NANDC_REG_V9_SRAM_SIZE	0x400
+
+#define NANDC_REG_V9_DATA	0x00
+#define NANDC_REG_V9_ADDR	0x04
+#define NANDC_REG_V9_CMD	0x08
+
+/* FMCTL */
+#define NANDC_V9_FM_WP		BIT(8)
+#define NANDC_V9_FM_CE_SEL_M	0xFF
+#define NANDC_V9_FM_CE_SEL(x)	(1 << (x))
+#define NANDC_V9_FM_FREADY	BIT(9)
+
+/* FLCTL */
+#define NANDC_V9_FL_RST		BIT(0)
+#define NANDC_V9_FL_DIR_S	0x1
+#define NANDC_V9_FL_XFER_START	BIT(2)
+#define NANDC_V9_FL_XFER_EN	BIT(3)
+#define NANDC_V9_FL_ST_BUF_S	0x4
+#define NANDC_V9_FL_XFER_COUNT	BIT(5)
+#define NANDC_V9_FL_ACORRECT	BIT(10)
+#define NANDC_V9_FL_XFER_READY	BIT(20)
+
+/* BCHCTL */
+#define NAND_V9_BCH_MODE_S	25
+#define NAND_V9_BCH_MODE_M	0x7
+
+/* BCHST */
+#define NANDC_V9_BCH0_ST_ERR	BIT(2)
+#define NANDC_V9_BCH1_ST_ERR	BIT(18)
+#define NANDC_V9_ECC_ERR_CNT0(x) (((x) & (0x7F << 3)) >> 3)
+#define NANDC_V9_ECC_ERR_CNT1(x) (((x) & (0x7F << 19)) >> 19)
+
+struct rk_nand {
+	uint32_t banks[NANDC_V9_NUM_BANKS];
+	struct nand_hw_control controller;
+	uint32_t ecc_strength;
+	uint32_t max_ecc_strength;
+	struct mtd_info mtd;
+	bool bootromblocks;
+	void __iomem *regs;
+	int selected_bank;
+};
+
+static struct nand_ecclayout nand_oob_fix = {
+	.eccbytes = 24,
+	.eccpos = {
+		4, 5, 6, 7, 8, 9, 10
+        },
+	.oobfree = {
+		{
+			.offset = 0,
+			.length = 4
+                }
+        }
+};
+
+static inline struct rk_nand *to_rknand(struct nand_hw_control *ctrl)
+{
+	return container_of(ctrl, struct rk_nand, controller);
+}
+
+static void rockchip_nand_init(struct rk_nand *rknand)
+{
+	writel(0, rknand->regs + NANDC_REG_V9_RANDMZ);
+	writel(0, rknand->regs + NANDC_REG_V9_DMA_CFG);
+	writel(0, rknand->regs + NANDC_REG_V9_BCHCTL);
+	writel(NANDC_V9_FM_WP, rknand->regs + NANDC_REG_V9_FMCTL);
+	writel(0x1081, rknand->regs + NANDC_REG_V9_FMWAIT);
+}
+
+static void rockchip_nand_select_chip(struct mtd_info *mtd, int chipnr)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base;
+	uint32_t reg;
+	int banknr;
+
+	reg = readl(rknand->regs + NANDC_REG_V9_FMCTL);
+	reg &= ~NANDC_V9_FM_CE_SEL_M;
+
+	if (chipnr == -1) {
+		banknr = -1;
+	} else {
+		banknr = rknand->banks[chipnr];
+		bank_base = rknand->regs + NANDC_REG_V9_BANK0 + banknr * 0x100;
+
+		chip->IO_ADDR_R = bank_base;
+		chip->IO_ADDR_W = bank_base;
+
+		reg |= 1 << banknr;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V9_FMCTL);
+
+	rknand->selected_bank = banknr;
+}
+
+static void rockchip_nand_cmd_ctrl(struct mtd_info *mtd,
+				   int dat,
+				   unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V9_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		if (ctrl & NAND_ALE)
+			bank_base += NANDC_REG_V9_ADDR;
+		else if (ctrl & NAND_CLE)
+			bank_base += NANDC_REG_V9_CMD;
+		chip->IO_ADDR_W = bank_base;
+	}
+
+	if (dat != NAND_CMD_NONE)
+		writeb(dat & 0xFF, chip->IO_ADDR_W);
+}
+
+static void rockchip_nand_read_buf(struct mtd_info *mtd,
+				   uint8_t *buf,
+				   int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V9_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		buf[offs] = readb(bank_base);
+}
+
+static void rockchip_nand_write_buf(struct mtd_info *mtd,
+				    const uint8_t *buf,
+				    int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V9_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		writeb(buf[offs], bank_base);
+}
+
+static uint8_t rockchip_nand_read_byte(struct mtd_info *mtd)
+{
+	uint8_t ret;
+
+	rockchip_nand_read_buf(mtd, &ret, 1);
+
+	return ret;
+}
+
+static int rockchip_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+
+	if (readl(rknand->regs + NANDC_REG_V9_FMCTL) & NANDC_V9_FM_FREADY)
+		return 1;
+
+	return 0;
+}
+
+static int rockchip_nand_hw_ecc_setup(struct mtd_info *mtd,
+				      struct nand_ecc_ctrl *ecc,
+				      uint32_t strength)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	u32 reg;
+
+	ecc->strength = strength;
+	ecc->bytes = DIV_ROUND_UP(ecc->strength * 14, 8);
+	ecc->bytes = ALIGN(ecc->bytes, 2);
+
+	switch (ecc->strength) {
+	case 70:
+		reg = 0x00000001;
+		break;
+	case 60:
+		reg = 0x06000001;
+		break;
+	case 40:
+		reg = 0x04000001;
+		break;
+	case 16:
+		reg = 0x02000001;
+		break;
+	default:
+		return -EINVAL;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V9_BCHCTL);
+
+	return 0;
+}
+
+static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
+					 u8 dir,
+					 u8 st_buf)
+{
+	u32 reg;
+
+	reg = (dir << NANDC_V9_FL_DIR_S) | (st_buf << NANDC_V9_FL_ST_BUF_S) |
+	      NANDC_V9_FL_XFER_EN | NANDC_V9_FL_XFER_COUNT |
+	      NANDC_V9_FL_ACORRECT;
+	writel(reg, rknand->regs + NANDC_REG_V9_FLCTL);
+
+	reg |= NANDC_V9_FL_XFER_START;
+	writel(reg, rknand->regs + NANDC_REG_V9_FLCTL);
+}
+
+static int rockchip_nand_wait_pio_xfer_done(struct rk_nand *rknand)
+{
+	int timeout = NANDC_V9_DEF_TIMEOUT;
+	int reg;
+
+	while (timeout--) {
+		reg = readl(rknand->regs + NANDC_REG_V9_FLCTL);
+
+		if ((reg & NANDC_V9_FL_XFER_READY)  != 0)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout == 0)
+		return -1;
+
+	return 0;
+}
+
+static void rockchip_nand_read_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset + mtd->writesize, -1);
+
+	rockchip_nand_read_buf(mtd, oob + offset, len);
+}
+
+static void rockchip_nand_write_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset + mtd->writesize, -1);
+
+	rockchip_nand_write_buf(mtd, oob + offset, len);
+}
+
+static int rockchip_nand_hw_syndrome_pio_read_page(struct mtd_info *mtd,
+						   struct nand_chip *chip,
+						   uint8_t *buf,
+						   int oob_required,
+						   int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V9_SRAM0;
+	unsigned int max_bitflips = 0;
+	int ret, step, bch_st;
+	int offset = page * mtd->writesize;
+
+	if (rknand->bootromblocks && (offset < (4 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V9_BOOTROM_ECC);
+
+	rockchip_nand_pio_xfer_start(rknand, NANDC_V9_READ, 0);
+
+	for (step = 0; step < ecc->steps; step++) {
+		int data_off = step * ecc->size;
+		int oob_off = step * (ecc->bytes + ecc->prepad);
+		u8 *data = buf + data_off;
+		u8 *oob = chip->oob_poi + oob_off;
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+
+		bch_st = readl(rknand->regs + NANDC_REG_V9_BCHST);
+
+		if (bch_st & NANDC_V9_BCH0_ST_ERR) {
+			mtd->ecc_stats.failed++;
+			max_bitflips = -1;
+		} else {
+			ret = NANDC_V9_ECC_ERR_CNT0(bch_st);
+			mtd->ecc_stats.corrected += ret;
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		if ((step + 1) < ecc->steps)
+			rockchip_nand_pio_xfer_start(rknand, NANDC_V9_READ,
+					      		(step + 1) & 0x1);
+
+		memcpy_fromio(data, sram_base + NANDC_REG_V9_SRAM_SIZE *
+			     				(step & 1), ecc->size);
+
+		if (step & 1)
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V9_SPARE1, 4);
+		else
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V9_SPARE0, 4);
+	}
+
+	rockchip_nand_read_extra_oob(mtd, chip->oob_poi);
+
+	if (rknand->bootromblocks)
+		rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return max_bitflips;
+}
+
+static uint32_t rockchip_nand_make_bootrom_compat(struct mtd_info *mtd,
+						  int page,
+						  const u8 *oob,
+						  bool bootromblocks)
+{
+	int pages_per_block = mtd->erasesize / mtd->writesize;
+	int offset = page * mtd->writesize;
+
+	if ((offset < (2 * mtd->erasesize)) || !(page % 2) ||
+	    (offset >= (7 * mtd->erasesize)) || !bootromblocks)
+		return oob[3] | (oob[2] << 8) | (oob[1] << 16) | (oob[0] << 24);
+
+	return (page % pages_per_block + 1) * 4;
+}
+
+static int rockchip_nand_hw_syndrome_pio_write_page(struct mtd_info *mtd,
+						    struct nand_chip *chip,
+						    const uint8_t *buf,
+						    int oob_required,
+						    int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V9_SRAM0;
+	int ret, index, step = 0;
+	int offset = page * mtd->writesize;
+	int data_off = step * ecc->size;
+	int oob_off = step * (ecc->bytes + ecc->prepad);
+	const u8 *data = buf + data_off;
+	const u8 *oob = chip->oob_poi + oob_off;
+
+	if (rknand->bootromblocks && (offset < (7 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V9_BOOTROM_ECC);
+
+	index = rockchip_nand_make_bootrom_compat(mtd, page, oob,
+					   rknand->bootromblocks);
+
+	memcpy_toio(sram_base, data, ecc->size);
+	memcpy_toio(rknand->regs + NANDC_REG_V9_SPARE0, &index, ecc->prepad);
+
+	for (step = 1; step <= ecc->steps; step++) {
+		rockchip_nand_pio_xfer_start(rknand, NANDC_V9_WRITE,
+					     (step - 1) & 0x1);
+		data_off = step * ecc->size;
+		oob_off = step * (ecc->bytes + ecc->prepad);
+		data = buf + data_off;
+		oob = chip->oob_poi + oob_off;
+
+		if (step < ecc->steps) {
+			memcpy_toio(sram_base + NANDC_REG_V9_SRAM_SIZE *
+				    (step & 1), data, ecc->size);
+			if (step & 1)
+				memcpy_toio(rknand->regs + NANDC_REG_V9_SPARE1,
+					    oob, ecc->prepad);
+			else
+				memcpy_toio(rknand->regs + NANDC_REG_V9_SPARE0,
+					    oob, ecc->prepad);
+		}
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+	}
+
+	rockchip_nand_write_extra_oob(mtd, chip->oob_poi);
+
+	if (rknand->bootromblocks)
+		rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return 0;
+}
+
+static const u8 strengths[] = {70, 60, 40, 16};
+
+static int rockchip_nand_ecc_max_strength(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	uint32_t max_strength, index;
+
+	max_strength = ((mtd->oobsize / ecc->steps) - ecc->prepad) * 8 / 14;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (max_strength >= strengths[index])
+			break;
+
+	if (index >= ARRAY_SIZE(strengths))
+		return -ENOTSUPP;
+
+	return strengths[index];
+}
+
+static bool rockchip_nand_strength_is_valid(int strength)
+{
+	uint32_t index;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (strength == strengths[index])
+			break;
+
+	if (index == ARRAY_SIZE(strengths))
+		return false;
+
+	return true;
+}
+
+static int rockchip_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	uint32_t strength;
+	int index;
+
+	ecc->prepad = 4;
+	ecc->steps = mtd->writesize / ecc->size;
+
+	if (fdtdec_get_bool(gd->fdt_blob, chip->flash_node,
+			    "rockchip,protect-bootrom-blocks"))
+                rknand->bootromblocks = true;
+	else
+		rknand->bootromblocks = false;
+
+	if (rockchip_nand_strength_is_valid(ecc->strength))
+		strength = ecc->strength;
+	else
+		strength = rockchip_nand_ecc_max_strength(mtd, ecc);
+
+	rknand->max_ecc_strength = 70;
+	if (strength > rknand->max_ecc_strength)
+		strength = rknand->max_ecc_strength;
+
+	rockchip_nand_hw_ecc_setup(mtd, ecc, strength);
+
+	rknand->ecc_strength = ecc->strength;
+
+	nand_oob_fix.eccbytes = ecc->bytes * ecc->steps;
+	for (index = 0; index < ecc->bytes; index++)
+		nand_oob_fix.eccpos[index] = index + ecc->prepad;
+	ecc->layout = &nand_oob_fix;
+
+	if (mtd->oobsize < ((ecc->bytes + ecc->prepad) * ecc->steps)) {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_ecc_init(struct mtd_info *mtd,
+				  struct nand_ecc_ctrl *ecc)
+{
+	int ret;
+
+	switch (ecc->mode) {
+	case NAND_ECC_HW_SYNDROME:
+		ret = rockchip_nand_hw_ecc_ctrl_init(mtd, ecc);
+		if (ret)
+			return ret;
+		ecc->read_page =  rockchip_nand_hw_syndrome_pio_read_page;
+		ecc->write_page = rockchip_nand_hw_syndrome_pio_write_page;
+		break;
+	case NAND_ECC_SOFT_BCH:
+	case NAND_ECC_NONE:
+	case NAND_ECC_SOFT:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
+{
+	int page, res = 0, i;
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	u16 bad = 0xff;
+	int chipnr = (int)(ofs >> chip->chip_shift);
+
+	page = (int)(ofs >> chip->page_shift) & chip->pagemask;
+	chip->select_chip(mtd, chipnr);
+	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+	if(rockchip_nand_hw_syndrome_pio_read_page(mtd,
+	   chip, chip->buffers->databuf, 0, page) == -1) {
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
+		for (i = 0; i < 8; i++) {
+			bad = chip->read_byte(mtd);
+			if (bad)
+				break;
+		}
+		if (i >= 8)
+			res = 1;
+	}
+	chip->select_chip(mtd, -1);
+	if (res)
+		printf("%s 0x%x %x %x\n", __func__, page, res, bad);
+	return res;
+}
+
+static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
+{
+	const void *blob = gd->fdt_blob;
+	struct nand_chip *chip;
+	struct mtd_info *mtd;
+	int ret;
+
+	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+
+	chip->chip_delay = 50;
+	chip->flash_node = node;
+	chip->select_chip = rockchip_nand_select_chip;
+	chip->cmd_ctrl = rockchip_nand_cmd_ctrl;
+	chip->read_buf = rockchip_nand_read_buf;
+	chip->write_buf = rockchip_nand_write_buf;
+	chip->read_byte = rockchip_nand_read_byte;
+	chip->dev_ready = rockchip_nand_dev_ready;
+	chip->controller = &rknand->controller;
+	chip->block_bad = rockchip_nand_block_bad;
+	chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
+	chip->options = NAND_NO_SUBPAGE_WRITE;
+
+	rknand->banks[devnum] = fdtdec_get_int(blob, node, "reg", -1);
+
+	if (rknand->banks[devnum] < 0)
+		return -EINVAL;
+
+	mtd = nand_to_mtd(chip);
+	mtd->name = "rknand";
+
+	ret = nand_scan_ident(mtd, 1, NULL);
+	if (ret)
+		return ret;
+
+	ret = rockchip_nand_ecc_init(mtd, &chip->ecc);
+	if (ret) {
+		debug("rockchip_nand_ecc_init failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_scan_tail(mtd);
+	if (ret) {
+		debug("nand_scan_tail failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_register(devnum, mtd);
+	if (ret) {
+		debug("Failed to register mtd device: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
+{
+	const void *blob = gd->fdt_blob;
+	int nand_node;
+	int ret, i = 0;
+
+	for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
+	     nand_node = fdt_next_subnode(blob, nand_node)) {
+		ret = rockchip_nand_chip_init(nand_node, rknand, i++);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+void board_nand_init(void)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand;
+	fdt_addr_t regs;
+	int node;
+	int ret;
+
+	rknand = kzalloc(sizeof(*rknand), GFP_KERNEL);
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		debug("Nand node not found\n");
+		goto err;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		goto err;
+	}
+
+	regs = fdt_get_base_address(blob, node);
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		goto err;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret) {
+		debug("Failed to init nand chips\n");
+		goto err;
+	}
+
+	return;
+err:
+	kfree(rknand);
+}
+
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+	struct mtd_info *mtd;
+	size_t length = size;
+
+	mtd = get_nand_dev_by_index(0);
+	return nand_read_skip_bad(mtd, offs, &length, NULL, size, (u_char *)dst);
+}
+
+void nand_deselect(void) {}

commit 36620717fd5981b5e00c9f2658fca13dada9ecde
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 27 20:43:23 2019 +0800

    arm: stacktrace: imporve guidance message
    
    Change-Id: I186f80f64104b79d35aaae03e99a484bd1191c8f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/stacktrace.c b/arch/arm/lib/stacktrace.c
index 266aeb2265..1520098219 100644
--- a/arch/arm/lib/stacktrace.c
+++ b/arch/arm/lib/stacktrace.c
@@ -503,7 +503,9 @@ void print_stack_arm32(struct unwind_state_arm32 *state,
 	} while (unwind_stack_arm32(state, exidx, exidx_sz,
 				    kernel_stack, stack, stack_size));
 
-	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+	printf("\nCopy above stack info to a file(eg. dump.txt), and\n"
+	       "execute command in your U-Boot project: "
+	       "./scripts/stacktrace.sh dump.txt\n\n");
 }
 
 void dump_core_stack(struct pt_regs *regs)
diff --git a/arch/arm/lib/stacktrace_64.c b/arch/arm/lib/stacktrace_64.c
index 2494684a84..5637926175 100644
--- a/arch/arm/lib/stacktrace_64.c
+++ b/arch/arm/lib/stacktrace_64.c
@@ -90,7 +90,9 @@ void dump_core_stack(struct pt_regs *regs)
 		printf("	[< %08lx >]\n", pc);
 	} while (walk_stackframe(&frame));
 
-	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+	printf("\nCopy above stack info to a file(eg. dump.txt), and\n"
+	       "execute command in your U-Boot project: "
+	       "./scripts/stacktrace.sh dump.txt\n\n");
 }
 
 void dump_stack(void)

commit 5330794924424b7839dd5869a9061ed87256d2b4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 28 14:28:43 2019 +0800

    scripts: stacktrace.sh: dump PC and LR addr2line information
    
    Change-Id: If5c017eb3440b587153fa6b8624bf4acffe5a4e5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
index cb0383254d..39699499ef 100755
--- a/scripts/stacktrace.sh
+++ b/scripts/stacktrace.sh
@@ -41,13 +41,17 @@ do
 	cat u-boot.sym | sort |
 	awk -v foffset=$f_offset_hex '/\.text/ {
 		if (strtonum("0x"$1) > '$frame_pc_str') {
-			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);
+			printf("%s+0x%s/0x%x      ", fname, foffset, fsize);
 			exit
 		}
 		fname=$NF;
 		fsize=strtonum("0x"$5);
 		fpc=strtonum("0x"$1);
 	}'
+
+	func_path=`./make.sh $frame_pc_str | awk '{ print $1 }' | sed -n "/home/p"`
+	func_path=`echo ${func_path##*boot/}`
+	echo $func_path
 done
 echo
 

commit 2cb995bc2ea3681c63d81b053299172173171440
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 29 18:01:51 2019 +0800

    lib: sysmem: allow alloc subset of an allocated memblk
    
    Change-Id: I171c5978faf6fc1b3e95cc46c55a2adfe6df0176
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index f0b486d687..8b08644a74 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -244,6 +244,9 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 			 mem->attr.name, (ulong)mem->base,
 			 (ulong)(mem->base + mem->size));
 		if (!strcmp(mem->attr.name, name)) {
+			if (mem->base <= base && mem->size >= size)
+				return (void *)base;
+
 			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
 			return NULL;
 		} else if (sysmem_is_overlap(mem->base, mem->size, base, size)) {

commit 356575c3e2938bc78c92d884f8e4b72cfa1963f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 27 11:53:16 2019 +0800

    lib: bidram: handle only-one dram bank available situation
    
    LMB default init lmb->reserved.region[0] as zero.
    
    Change-Id: Ib46d9630581bb3a03c5846288b16ae805e3e6944
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/bidram.c b/lib/bidram.c
index d39f5b14ae..b6859150fd 100644
--- a/lib/bidram.c
+++ b/lib/bidram.c
@@ -130,6 +130,20 @@ void bidram_gen_gd_bi_dram(void)
 		return;
 	}
 
+	/*
+	 * LBM default init:
+	 *		lmb->reserved.cnt = 1;
+	 *		lmb->reserved.region[0].base = 0;
+	 *		lmb->reserved.region[0].size = 0;
+	 *
+	 * Here handle that: there is the only one dram bank available.
+	 */
+	if (rsv_cnt == 1 && !res_rgn[0].base && !res_rgn[0].size) {
+		gd->bd->bi_dram[0].start = mem_rgn[0].base;
+		gd->bd->bi_dram[0].size = mem_rgn[0].size;
+		goto done;
+	}
+
 	/* If reserved rgn is not from sdram start */
 	if (res_rgn[0].base != mem_rgn[0].base) {
 		gd->bd->bi_dram[idx].start = mem_rgn[0].base;
@@ -209,7 +223,7 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 	/* Check overlap */
 	list_for_each(node, &bidram->reserved_head) {
 		mem = list_entry(node, struct memblock, node);
-		BIDRAM_D("Reserved: %s 0x%08lx - 0x%08lx\n",
+		BIDRAM_D("Has reserved: %s 0x%08lx - 0x%08lx\n",
 			 mem->attr.name, (ulong)mem->base,
 			 (ulong)(mem->base + mem->size));
 		if (!strcmp(mem->attr.name, name)) {
@@ -224,6 +238,9 @@ static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
 		}
 	}
 
+	BIDRAM_D("Reserve: \"%s\" 0x%08lx - 0x%08lx\n",
+		 name, (ulong)base, (ulong)(base + size));
+
 	ret = lmb_reserve(&bidram->lmb, base, size);
 	if (ret >= 0) {
 		mem = malloc(sizeof(*mem));

commit 623d03d6217fc9b49e4d02fa876d7505d94974f8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 15:22:33 2019 +0800

    make.sh: pack ta trust.img as primary choice
    
    This U-Boot is working with kernel-4.4 at least which
    requires trust.img with ta.
    
    It also avoids user confused with trust.img and trust_with_ta.img.
    
    Change-Id: I18ec538a1f83cbb660e2fda597bf8120863d744f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 88d20109dc..98b0a00b9c 100755
--- a/make.sh
+++ b/make.sh
@@ -592,16 +592,10 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ x$TOS_TA != x -a x$TOS != x ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			echo "Both trust.img and trust_with_ta.img are ready"
-		elif [ $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			echo "trust.img is ready"
-		elif [ $TOS_TA ]; then
+		if [ $TOS_TA ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			echo "trust.img with ta is ready"
+		elif [ $TOS ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS}    ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 		else
 			echo "Can't find any tee bin"
 			exit 1

commit 6be53b633a21a4024eb11bc8e4ccfa7c730ae55e
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 28 19:46:24 2019 +0800

    rockchip: otp: Add support for RK3308
    
    Change-Id: I44391e0f039b1bd347124e90aad67a936ade2f99
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index e773583bd9..c6ec5d9b3f 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -196,6 +196,10 @@ static const struct udevice_id rockchip_otp_ids[] = {
 		.compatible = "rockchip,px30-otp",
 		.data = (ulong)&rockchip_px30_otp_read,
 	},
+	{
+		.compatible = "rockchip,rk3308-otp",
+		.data = (ulong)&rockchip_px30_otp_read,
+	},
 	{}
 };
 

commit 4973d825b84c2eb1da633d671dd287663966d771
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Oct 23 09:46:24 2018 +0800

    rockchip: otp: Add (misc) driver for PX30 non-secure OTP block
    
    This adds a simple driver for reading the OTP block of the PX30.
    
    Change-Id: Ic2c0f4b0886808af87c826e8d0045e5d440521f7
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 3d282d5b14..f936fd791f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -41,6 +41,13 @@ config ROCKCHIP_EFUSE
 	  extended (by porting the read function from the Linux kernel sources)
 	  to support other recent Rockchip devices.
 
+config ROCKCHIP_OTP
+	bool "Rockchip OTP Support"
+	depends on MISC
+	help
+	  This is a simple drive to dump specified values of Rockchip SoC
+	  from otp, such as cpu-leakage.
+
 config CMD_CROS_EC
 	bool "Enable crosec command"
 	depends on CROS_EC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 1e6a58d2f8..72f3156812 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -52,3 +52,4 @@ obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
+obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
new file mode 100644
index 0000000000..e773583bd9
--- /dev/null
+++ b/drivers/misc/rockchip-otp.c
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <command.h>
+#include <dm.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <misc.h>
+
+/* OTP Register Offsets */
+#define OTPC_SBPI_CTRL			0x0020
+#define OTPC_SBPI_CMD_VALID_PRE		0x0024
+#define OTPC_SBPI_CS_VALID_PRE		0x0028
+#define OTPC_SBPI_STATUS		0x002C
+#define OTPC_USER_CTRL			0x0100
+#define OTPC_USER_ADDR			0x0104
+#define OTPC_USER_ENABLE		0x0108
+#define OTPC_USER_Q			0x0124
+#define OTPC_INT_STATUS			0x0304
+#define OTPC_SBPI_CMD0_OFFSET		0x1000
+#define OTPC_SBPI_CMD1_OFFSET		0x1004
+
+/* OTP Register bits and masks */
+#define OTPC_USER_ADDR_MASK		GENMASK(31, 16)
+#define OTPC_USE_USER			BIT(0)
+#define OTPC_USE_USER_MASK		GENMASK(16, 16)
+#define OTPC_USER_FSM_ENABLE		BIT(0)
+#define OTPC_USER_FSM_ENABLE_MASK	GENMASK(16, 16)
+#define OTPC_SBPI_DONE			BIT(1)
+#define OTPC_USER_DONE			BIT(2)
+
+#define SBPI_DAP_ADDR			0x02
+#define SBPI_DAP_ADDR_SHIFT		8
+#define SBPI_DAP_ADDR_MASK		GENMASK(31, 24)
+#define SBPI_CMD_VALID_MASK		GENMASK(31, 16)
+#define SBPI_DAP_CMD_WRF		0xC0
+#define SBPI_DAP_REG_ECC		0x3A
+#define SBPI_ECC_ENABLE			0x00
+#define SBPI_ECC_DISABLE		0x09
+#define SBPI_ENABLE			BIT(0)
+#define SBPI_ENABLE_MASK		GENMASK(16, 16)
+
+#define OTPC_TIMEOUT			10000
+
+typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
+
+struct rockchip_otp_platdata {
+	void __iomem *base;
+};
+
+#if defined(DEBUG)
+static int dump_otps(cmd_tbl_t *cmdtp, int flag,
+		     int argc, char * const argv[])
+{
+	struct udevice *dev;
+	u8 otps[64] = {0};
+	int ret;
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_otp), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return 0;
+	}
+
+	ret = misc_read(dev, 0, &otps, sizeof(otps));
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	printf("otp-contents:\n");
+	print_buffer(0, otps, 1, 64, 16);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rockchip_dump_otps, 1, 1, dump_otps,
+	"Dump the content of the otps",
+	""
+);
+#endif
+
+static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
+				    u32 flag)
+{
+	int delay = OTPC_TIMEOUT;
+
+	while (!(readl(otp->base + OTPC_INT_STATUS) & flag)) {
+		udelay(1);
+		delay--;
+		if (delay <= 0) {
+			printf("%s: wait init status timeout\n", __func__);
+			return -ETIMEDOUT;
+		}
+	}
+
+	/* clean int status */
+	writel(flag, otp->base + OTPC_INT_STATUS);
+
+	return 0;
+}
+
+static int rockchip_otp_ecc_enable(struct rockchip_otp_platdata *otp,
+				   bool enable)
+{
+	int ret = 0;
+
+	writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT),
+	       otp->base + OTPC_SBPI_CTRL);
+
+	writel(SBPI_CMD_VALID_MASK | 0x1, otp->base + OTPC_SBPI_CMD_VALID_PRE);
+	writel(SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC,
+	       otp->base + OTPC_SBPI_CMD0_OFFSET);
+	if (enable)
+		writel(SBPI_ECC_ENABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
+	else
+		writel(SBPI_ECC_DISABLE, otp->base + OTPC_SBPI_CMD1_OFFSET);
+
+	writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
+
+	ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
+	if (ret < 0)
+		printf("%s timeout during ecc_enable\n", __func__);
+
+	return ret;
+}
+
+static int rockchip_px30_otp_read(struct udevice *dev, int offset,
+				  void *buf, int size)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+	u8 *buffer = buf;
+	int ret = 0;
+
+	ret = rockchip_otp_ecc_enable(otp, false);
+	if (ret < 0) {
+		printf("%s rockchip_otp_ecc_enable err\n", __func__);
+		return ret;
+	}
+
+	writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+	udelay(5);
+	while (size--) {
+		writel(offset++ | OTPC_USER_ADDR_MASK,
+		       otp->base + OTPC_USER_ADDR);
+		writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
+		       otp->base + OTPC_USER_ENABLE);
+		ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
+		if (ret < 0) {
+			printf("%s timeout during read setup\n", __func__);
+			goto read_end;
+		}
+		*buffer++ = readb(otp->base + OTPC_USER_Q);
+	}
+
+read_end:
+	writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
+
+	return ret;
+}
+
+static int rockchip_otp_read(struct udevice *dev, int offset,
+			     void *buf, int size)
+{
+	OTP_READ otp_read = NULL;
+
+	otp_read = (OTP_READ)dev_get_driver_data(dev);
+	if (!otp_read)
+		return -ENOSYS;
+
+	return (*otp_read)(dev, offset, buf, size);
+}
+
+static const struct misc_ops rockchip_otp_ops = {
+	.read = rockchip_otp_read,
+};
+
+static int rockchip_otp_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_otp_platdata *otp = dev_get_platdata(dev);
+
+	otp->base = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_otp_ids[] = {
+	{
+		.compatible = "rockchip,px30-otp",
+		.data = (ulong)&rockchip_px30_otp_read,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_otp) = {
+	.name = "rockchip_otp",
+	.id = UCLASS_MISC,
+	.of_match = rockchip_otp_ids,
+	.ops = &rockchip_otp_ops,
+	.ofdata_to_platdata = rockchip_otp_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct rockchip_otp_platdata),
+};

commit b13cc84cd1500488737e1936da4a4015d6bb7b6d
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 28 20:18:42 2019 +0800

    rockchip: efuse: support rk1808 non-secure efuse
    
    Change-Id: I2a7cc8306c5ea45c5586b036cbc13eaa153e4227
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index d23e091940..a2e4da408f 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -16,6 +16,46 @@
 #include <linux/delay.h>
 #include <misc.h>
 
+#define T_CSB_P_S		0
+#define T_PGENB_P_S		0
+#define T_LOAD_P_S		0
+#define T_ADDR_P_S		0
+#define T_STROBE_P_S		(0 + 110) /* 1.1us */
+#define T_CSB_P_L		(0 + 110 + 1000 + 20) /* 200ns */
+#define T_PGENB_P_L		(0 + 110 + 1000 + 20)
+#define T_LOAD_P_L		(0 + 110 + 1000 + 20)
+#define T_ADDR_P_L		(0 + 110 + 1000 + 20)
+#define T_STROBE_P_L		(0 + 110 + 1000) /* 10us */
+#define T_CSB_R_S		0
+#define T_PGENB_R_S		0
+#define T_LOAD_R_S		0
+#define T_ADDR_R_S		2
+#define T_STROBE_R_S		(2 + 3)
+#define T_CSB_R_L		(2 + 3 + 3 + 3)
+#define T_PGENB_R_L		(2 + 3 + 3 + 3)
+#define T_LOAD_R_L		(2 + 3 + 3 + 3)
+#define T_ADDR_R_L		(2 + 3 + 3 + 2)
+#define T_STROBE_R_L		(2 + 3 + 3)
+
+#define T_CSB_P			0x28
+#define T_PGENB_P		0x2c
+#define T_LOAD_P		0x30
+#define T_ADDR_P		0x34
+#define T_STROBE_P		0x38
+#define T_CSB_R			0x3c
+#define T_PGENB_R		0x40
+#define T_LOAD_R		0x44
+#define T_ADDR_R		0x48
+#define T_STROBE_R		0x4c
+
+#define RK1808_USER_MODE	BIT(0)
+#define RK1808_INT_FINISH	BIT(0)
+#define RK1808_AUTO_ENB		BIT(0)
+#define RK1808_AUTO_RD		BIT(1)
+#define RK1808_A_SHIFT		16
+#define RK1808_A_MASK		0x3ff
+#define RK1808_NBYTES		4
+
 #define RK3399_A_SHIFT          16
 #define RK3399_A_MASK           0x3ff
 #define RK3399_NFUSES           32
@@ -106,6 +146,76 @@ U_BOOT_CMD(
 );
 #endif
 
+static void rk1808_efuse_timing_init(void __iomem *base)
+{
+	static bool init;
+
+	if (init)
+		return;
+
+	/* enable auto mode */
+	writel(readl(base) & (~RK1808_USER_MODE), base);
+
+	/* setup efuse timing */
+	writel((T_CSB_P_S << 16) | T_CSB_P_L, base + T_CSB_P);
+	writel((T_PGENB_P_S << 16) | T_PGENB_P_L, base + T_PGENB_P);
+	writel((T_LOAD_P_S << 16) | T_LOAD_P_L, base + T_LOAD_P);
+	writel((T_ADDR_P_S << 16) | T_ADDR_P_L, base + T_ADDR_P);
+	writel((T_STROBE_P_S << 16) | T_STROBE_P_L, base + T_STROBE_P);
+	writel((T_CSB_R_S << 16) | T_CSB_R_L, base + T_CSB_R);
+	writel((T_PGENB_R_S << 16) | T_PGENB_R_L, base + T_PGENB_R);
+	writel((T_LOAD_R_S << 16) | T_LOAD_R_L, base + T_LOAD_R);
+	writel((T_ADDR_R_S << 16) | T_ADDR_R_L, base + T_ADDR_R);
+	writel((T_STROBE_R_S << 16) | T_STROBE_R_L, base + T_STROBE_R);
+
+	init = true;
+}
+
+static int rockchip_rk1808_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value, status;
+	u8 *buffer;
+	int ret = 0, i = 0;
+
+	rk1808_efuse_timing_init(plat->base);
+
+	addr_start = rounddown(offset, RK1808_NBYTES) / RK1808_NBYTES;
+	addr_end = roundup(offset + size, RK1808_NBYTES) / RK1808_NBYTES;
+	addr_offset = offset % RK1808_NBYTES;
+	addr_len = addr_end - addr_start;
+
+	buffer = calloc(1, sizeof(*buffer) * addr_len * RK1808_NBYTES);
+	if (!buffer)
+		return -ENOMEM;
+
+	while (addr_len--) {
+		writel(RK1808_AUTO_RD | RK1808_AUTO_ENB |
+		       ((addr_start++ & RK1808_A_MASK) << RK1808_A_SHIFT),
+		       &efuse->auto_ctrl);
+		udelay(2);
+		status = readl(&efuse->int_status);
+		if (!(status & RK1808_INT_FINISH)) {
+			ret = -EIO;
+			goto err;
+		}
+		out_value = readl(&efuse->dout2);
+		writel(RK1808_INT_FINISH, &efuse->int_status);
+
+		memcpy(&buffer[i], &out_value, RK1808_NBYTES);
+		i += RK1808_NBYTES;
+	}
+	memcpy(buf, buffer + addr_offset, size);
+err:
+	kfree(buffer);
+
+	return ret;
+}
+
 static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
 				      void *buf, int size)
 {
@@ -269,6 +379,10 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 }
 
 static const struct udevice_id rockchip_efuse_ids[] = {
+	{
+		.compatible = "rockchip,rk1808-efuse",
+		.data = (ulong)&rockchip_rk1808_efuse_read,
+	},
 	{
 		.compatible = "rockchip,rockchip-efuse",
 		.data = (ulong)&rockchip_rk3288_efuse_read,

commit 1380460aeec611722e2e9224b49a8941764a8f3b
Author: XiaoDong Huang <derrick.huang@rock-chips.com>
Date:   Thu Mar 28 16:20:49 2019 +0800

    rockchip: rk3368: Use timer0 as timer_irq
    
    Change-Id: I75ee18ee55207ead6a30d588529e7363fe361009
    Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index b07d576057..5ae9e973b1 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -104,7 +104,8 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
-#define IRQ_TIMER1			79
+#define IRQ_TIMER0			98
+#define IRQ_TIMER1			99
 #define IRQ_PWM				110
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index 46133016b3..6de549e281 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -36,8 +36,13 @@
 #define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
 #elif defined(CONFIG_ROCKCHIP_RK3368)
-#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
+/*
+ * Use timer0 and never change, because timer0 will be used in charge animation
+ * driver to support auto wakeup when system suspend. If core poweroff, PMU only
+ * support timer0(not all timer) as wakeup source.
+ */
+#define TIMER_BASE		(0xFF810000 + 0x00)	/* TIMER 0 */
+#define TIMER_IRQ		IRQ_TIMER0
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1

commit 5743ef647faabacaf12f7272c027f0ea6dee8557
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 21:48:53 2019 +0800

    mmc: dw_mmc: support get_cd in struct dm_mmc_ops
    
    Add function get_cd to detect storage device directly instead of detect
    it by mmc command.
    
    Change-Id: I486dee836c62092baabe40fc6de995904849f91d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 3a13b51a41..81981c7911 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -13,6 +13,10 @@
 #include <memalign.h>
 #include <mmc.h>
 #include <dwmmc.h>
+#ifdef CONFIG_DM_GPIO
+#include <asm/gpio.h>
+#include <asm-generic/gpio.h>
+#endif
 
 #define PAGE_SIZE 4096
 
@@ -623,6 +627,24 @@ static int dwmci_init(struct mmc *mmc)
 	return 0;
 }
 
+static int dwmci_get_cd(struct udevice *dev)
+{
+	int ret = -1;
+#ifndef CONFIG_SPL_BUILD
+#ifdef CONFIG_DM_GPIO
+	struct gpio_desc detect;
+
+	ret = gpio_request_by_name(dev, "cd-gpios", 0, &detect, GPIOD_IS_IN);
+	if (ret) {
+		return ret;
+	}
+
+	ret = !dm_gpio_get_value(&detect);
+#endif
+#endif
+	return ret;
+}
+
 #ifdef CONFIG_DM_MMC
 int dwmci_probe(struct udevice *dev)
 {
@@ -635,6 +657,7 @@ const struct dm_mmc_ops dm_dwmci_ops = {
 	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
+	.get_cd         = dwmci_get_cd,
 	.execute_tuning	= dwmci_execute_tuning,
 };
 
@@ -643,6 +666,7 @@ static const struct mmc_ops dwmci_ops = {
 	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
+	.get_cd         = dwmci_get_cd,
 	.init		= dwmci_init,
 	.execute_tuning	= dwmci_execute_tuning,
 };

commit 0476014ebb59f4b6ab5b30c8b192ebec6ac99655
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 19 14:16:19 2019 +0800

    ram: ramdisk: rename "readonly" to "ro"
    
    Change-Id: I4f7c052e5750db78969f37125056906cacd222a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399pro-npu-evb.dts b/arch/arm/dts/rk3399pro-npu-evb.dts
index 752ed00a85..00e521c36b 100644
--- a/arch/arm/dts/rk3399pro-npu-evb.dts
+++ b/arch/arm/dts/rk3399pro-npu-evb.dts
@@ -17,9 +17,9 @@
 		stdout-path = &uart2;
 	};
 
-	ramdisk-readonly {
+	ramdisk-ro {
 		u-boot,dm-pre-reloc;
-		compatible = "ramdisk-readonly";
+		compatible = "ramdisk-ro";
 		status = "okay";
 	};
 };
diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index 7b59efdf56..7555476382 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -56,7 +56,7 @@ CONFIG_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_RAM=y
 CONFIG_DM_RAMDISK=y
-CONFIG_RAMDISK_READONLY=y
+CONFIG_RAMDISK_RO=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff550000
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 2cf8adefb6..3139af0833 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -41,7 +41,7 @@ config DM_RAMDISK
           This enables the Ramdisk uclass support. These appear as block devices
           in U-Boot.
 
-config RAMDISK_READONLY
+config RAMDISK_RO
         bool "Enable read only ramdisk support"
         depends on DM_RAMDISK
         help
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 9d6abb0cfa..b4dd4d3293 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -11,4 +11,4 @@ obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_DM_RAMDISK) += ramdisk-uclass.o
-obj-$(CONFIG_RAMDISK_READONLY) += ramdisk_readonly.o
+obj-$(CONFIG_RAMDISK_RO) += ramdisk_ro.o
diff --git a/drivers/ram/ramdisk_readonly.c b/drivers/ram/ramdisk_ro.c
similarity index 60%
rename from drivers/ram/ramdisk_readonly.c
rename to drivers/ram/ramdisk_ro.c
index 7f2b3b8c7a..e2f5c29b54 100644
--- a/drivers/ram/ramdisk_readonly.c
+++ b/drivers/ram/ramdisk_ro.c
@@ -12,8 +12,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static ulong ramdisk_readonly_bread(struct blk_desc *desc, lbaint_t start,
-				    lbaint_t blkcnt, void *dst)
+static ulong ramdisk_ro_bread(struct blk_desc *desc, lbaint_t start,
+			      lbaint_t blkcnt, void *dst)
 {
 	unsigned long b_size, b_start;
 
@@ -28,7 +28,7 @@ static ulong ramdisk_readonly_bread(struct blk_desc *desc, lbaint_t start,
 	return blkcnt;
 }
 
-static int ramdisk_readonly_bind(struct udevice *dev)
+static int ramdisk_ro_bind(struct udevice *dev)
 {
 	struct udevice *bdev;
 	int ret;
@@ -43,19 +43,19 @@ static int ramdisk_readonly_bind(struct udevice *dev)
 	return 0;
 }
 
-static const struct ramdisk_ops ramdisk_readonly_ops = {
-	.read = ramdisk_readonly_bread,
+static const struct ramdisk_ops ramdisk_ro_ops = {
+	.read = ramdisk_ro_bread,
 };
 
-static const struct udevice_id ramdisk_readonly_ids[] = {
-	{ .compatible = "ramdisk-readonly" },
+static const struct udevice_id ramdisk_ro_ids[] = {
+	{ .compatible = "ramdisk-ro" },
 	{ }
 };
 
-U_BOOT_DRIVER(ramdisk_readonly) = {
-	.name		= "ramdisk-readonly",
+U_BOOT_DRIVER(ramdisk_ro) = {
+	.name		= "ramdisk-ro",
 	.id		= UCLASS_RAMDISK,
-	.ops		= &ramdisk_readonly_ops,
-	.of_match	= ramdisk_readonly_ids,
-	.bind		= ramdisk_readonly_bind,
+	.ops		= &ramdisk_ro_ops,
+	.of_match	= ramdisk_ro_ids,
+	.bind		= ramdisk_ro_bind,
 };

commit b86137850ec8304d443acb4133e25d43643a0d7f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Mar 22 10:11:25 2019 +0800

    lib: optee_client: change condition for file exist
    
    file not exist if ret < 0, file exist if ret >=0
    
    Change-Id: I1a70b0a41773f03d552c5f6cda82b745d6e81421
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 53a2ebcaca..68c59554e8 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -1316,7 +1316,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 
 	struct rkss_file_info p_check = {0};
 	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
-	if (!ret)
+	if (ret >= 0)
 	{
 		printf("file exist ! %s.\n", newfilename);
 		return -1;

commit 327c34ef1dadf06eb5d7b8089833dea439aa94ad
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Wed Mar 13 16:11:23 2019 +0800

    fuel gauge: rk817/rk809: only rk809 need pull-up and pull-down resistor
    
    Change-Id: I9c88a0cf11205ba351305eb37bd1e725ed203dca
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 57ff70e5ec..86eaf93772 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -406,9 +406,10 @@ static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
 	val |= rk817_bat_read(battery, BAT_VOL_L) << 0;
 
 	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
-	vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
-	vol = vol_temp;
-
+	if (battery->variant == RK809_ID) {
+		vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
+		vol = vol_temp;
+	}
 	return vol;
 }
 

commit daa679a7e421fa6b1852298c94c1246fead328b1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Mar 27 18:08:15 2019 +0800

    rockchip: make.sh: get CONFIG_SYS_TEXT_BASE from .config
    
    CONFIG_SYS_TEXT_BASE define in header file has be deprecate on
    mainline, it has been move to Kconfig.
    
    Change-Id: I40ae0ab84dbc6d74eca3450413fc2d11eb098434
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/make.sh b/make.sh
index 023e539dfa..88d20109dc 100755
--- a/make.sh
+++ b/make.sh
@@ -507,6 +507,10 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	if [ ! $UBOOT_LOAD_ADDR ]; then
+		UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/.config|tr -d '\r'`
+	fi
+
 	${RKTOOLS}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
 	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img

commit c5449fd30c8bd2024331ddf912fa467e4487c20b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 11:29:19 2019 +0800

    dm: dvfs: don't print fail message when there is no device
    
    Change-Id: I8ec8920972261e8009dfd9306d8ab898460a71df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/dvfs.c b/cmd/dvfs.c
index 73a6f06a1e..ac51077b7e 100644
--- a/cmd/dvfs.c
+++ b/cmd/dvfs.c
@@ -15,7 +15,8 @@ static int do_dvfs(cmd_tbl_t *cmdtp, int flag,
 
 	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
 	if (ret) {
-		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		if (ret != -ENODEV)
+			printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
 		return ret;
 	}
 
diff --git a/drivers/power/dvfs/dvfs-uclass.c b/drivers/power/dvfs/dvfs-uclass.c
index abd04dcb5e..64778aaa8e 100644
--- a/drivers/power/dvfs/dvfs-uclass.c
+++ b/drivers/power/dvfs/dvfs-uclass.c
@@ -34,7 +34,8 @@ int dvfs_init(bool apply)
 
 	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
 	if (ret) {
-		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		if (ret != -ENODEV)
+			printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
 		return ret;
 	}
 

commit a90f2861de2b6b54441e45664fd03e1cbb7fa567
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 26 20:58:28 2019 +0800

    lib: sysmem: fix NULL attr.name
    
    Change-Id: I93744c28668d1533ec2bcdaafc9198d8557284a1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index b050177af1..f0b486d687 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -210,6 +210,8 @@ static void *sysmem_alloc_align_base(enum memblk_id id,
 		}
 		name = sysmem_alias2name(mem_name, (int *)&id);
 		attr = mem_attr[id];
+		if (!attr.name)
+			attr.name = strdup(name);
 	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
 		attr = mem_attr[id];
 		name = attr.name;

commit 618713d1f2e2bca0ca94522aa5a34b2806d2dfe0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 16:00:00 2018 +0800

    arm64: enable async error handler
    
    Enable the exception handler for async error so that we can get the
    abort before kernel.
    
    Change-Id: Ie0e7c89a0d03adf3b74b0d9ddf8c9117536dac6b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index d34e49cc8a..fad7f518c6 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -65,7 +65,25 @@
  */
 
 ENTRY(_main)
+#if defined(CONFIG_SPL_BUILD) && defined(DEBUG)
+	.equ SCTLR_A_BIT,		(1 << 1)
+	.equ SCTLR_SA_BIT,		(1 << 3)
+	.equ SCTLR_I_BIT,		(1 << 12)
 
+/*
+ * Enable the instruction cache, stack pointer
+ * and data access alignment checks
+ */
+	mov	x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
+	mrs	x0, sctlr_el3
+	orr	x0, x0, x1
+	msr	sctlr_el3, x0
+	isb
+/*
+ * Enable External Abort and SError
+ */
+	msr	daifclr, #4
+#endif
 /*
  * Set up initial C runtime environment and call board_init_f(0).
  */

commit 2d2b0663a109af1f541236e38c01d7b148df05fd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 12 15:19:07 2019 +0800

    rockchip: px5: update defconfig for TPL/SPL
    
    Change-Id: I4dcb2b3712fe87eece374c93cdc22d01edbd503a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index bd59bc3e08..68fbce641d 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -1,29 +1,76 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_MAX_SIZE=32768
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_PX5=y
 CONFIG_TARGET_EVB_PX5=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_PANIC_HANG=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_BOOTSTAGE=y
+CONFIG_SPL_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTSTAGE_FDT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_SPL=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_CACHE=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xFF1c0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit 1d0603dbce3485da9267d83d4b9f353417a48a42
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 12 15:20:47 2019 +0800

    rockchip: px5: update SPL size for spl/tpl
    
    Change-Id: I447976f9030a59f18393027e8392a065d4c6c425
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_px5.h b/include/configs/evb_px5.h
index 4160187d50..b6866b5f0d 100644
--- a/include/configs/evb_px5.h
+++ b/include/configs/evb_px5.h
@@ -10,5 +10,6 @@
 #include <configs/rk3368_common.h>
 
 #define CONFIG_CONSOLE_SCROLL_LINES	10
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 #endif
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 4f9105edac..5ef4a3b9f2 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -28,9 +28,10 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE            0x00000000
-#define CONFIG_SPL_MAX_SIZE             0x40000
+#define CONFIG_SPL_MAX_SIZE             0x60000
 #define CONFIG_SPL_BSS_START_ADDR       0x400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x20000
+#define CONFIG_SPL_STACK		0x00188000
 
 #define GICD_BASE			0xffB71000
 #define GICC_BASE			0xffB72000

commit a739a3a9b7d60a7b5ae7a0b9f9b4a3c7a4eb6d97
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 30 18:08:08 2019 +0800

    rockchip: px5 update dts for spl/tpl
    
    TPL need dmc to init ddr sdram, and emmc, boot-order.
    
    Change-Id: Ia783e1a47a7710bf618c556eefaf354b7097eacd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index 3a5e30ea55..ce515853d0 100644
--- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
@@ -3,6 +3,27 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+	X11
  */
+/ {
+	chosen {
+		u-boot,spl-boot-order = &emmc;
+	};
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+
+	/*
+	 * PX5-evb(2GB) need to use CBRD mode, or else the dram is not correct
+	 * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
+	 * details on the 'rockchip,memory-schedule' property and how it
+	 * affects the physical-address to device-address mapping.
+	 */
+	rockchip,memory-schedule = <DMC_MSCH_CBRD>;
+	rockchip,ddr-frequency = <800000000>;
+	rockchip,ddr-speed-bin = <DDR3_1600K>;
+
+	status = "okay";
+};
 
 &pinctrl {
 	u-boot,dm-pre-reloc;
@@ -21,6 +42,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&sgrf {
+        u-boot,dm-pre-reloc;
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 };
@@ -32,3 +57,7 @@
 &uart4 {
 	u-boot,dm-pre-reloc;
 };
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};

commit d74e8763bbca548e053f60da392498b97717cd52
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 26 16:10:35 2019 +0800

    rockchip: spl: always try to init stimer
    
    We always try to init stimer in case it's not init in previous stage,
    but don't re-init if it already work.
    
    Change-Id: I2133804560c6e31e51e6b2cb0a6e51b9544970d3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index df60b15b93..1db0e2626c 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -64,7 +64,10 @@ u32 spl_boot_mode(const u32 boot_device)
 
 __weak void rockchip_stimer_init(void)
 {
-#ifdef CONFIG_SYS_ARCH_TIMER
+	/* If Timer already enabled, don't re-init it */
+	u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	if ( reg & 0x1 )
+		return;
 #ifndef CONFIG_ARM64
 	asm volatile("mcr p15, 0, %0, c14, c0, 0"
 		     : : "r"(COUNTER_FREQUENCY));
@@ -73,7 +76,6 @@ __weak void rockchip_stimer_init(void)
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
-#endif
 }
 
 __weak int arch_cpu_init(void)
@@ -145,9 +147,7 @@ void board_init_f(ulong dummy)
 #endif
 #endif
 
-#if !defined(CONFIG_SUPPORT_TPL)
 	rockchip_stimer_init();
-#endif
 #define EARLY_UART
 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
 	/*

commit 21379abcb5a9252da69d88c444e8ff407c16ee45
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 26 08:58:45 2019 +0800

    rockchip: tpl: remove arch_cpu_init()
    
    The arch_cpu_init() should be done in SPL only.
    
    Change-Id: If96bad9694dbcb0d9821433d1f2cbead4517633c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 73e4ed386c..a6676e483a 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -114,11 +114,6 @@ __weak void rockchip_stimer_init(void)
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 }
 
-__weak int arch_cpu_init(void)
-{
-	return 0;
-}
-
 void board_init_f(ulong dummy)
 {
 #if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
@@ -127,7 +122,6 @@ void board_init_f(ulong dummy)
 #endif
 
 	rockchip_stimer_init();
-	arch_cpu_init();
 #define EARLY_DEBUG
 #ifdef EARLY_DEBUG
 	/*

commit ddc9405d5b187854d748d65682f593fc8f675dc1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Mar 25 18:10:06 2019 +0800

    rockchip: spl: move arch_cpu_init() after spl_init()
    
    arch_cpu_init() may use DM to get cru handler.
    
    Change-Id: I5f2daa4718bcdcc5a4aa5601d26e9f4f31a01b69
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 2c1ffe5ab0..df60b15b93 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -147,7 +147,6 @@ void board_init_f(ulong dummy)
 
 #if !defined(CONFIG_SUPPORT_TPL)
 	rockchip_stimer_init();
-	arch_cpu_init();
 #endif
 #define EARLY_UART
 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
@@ -183,6 +182,7 @@ void board_init_f(ulong dummy)
 	sdram_init();
 #endif
 
+	arch_cpu_init();
 	rk_board_init_f();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);

commit f67455c9588975a81fabdb8cb13be0a4a9bfaf9e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 11:53:09 2019 +0800

    rockchip: add CONFIG_ROCKCHIP_PX5 soc type variant
    
    Add variant for evb-px5
    
    Change-Id: Id7bfa9719f3283f2dccc674b7e194c16d7ac7f65
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 36ec749a04..880171f022 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -283,6 +283,12 @@ config ROCKCHIP_RK3368
 
 if ROCKCHIP_RK3368
 
+config ROCKCHIP_PX5
+	bool "Support Rockchip PX5"
+	help
+	  PX5 is a variant of RK3368, it shares codes with RK3368, but we still
+	  need this macro to distinguish PX5 and RK3368.
+
 config TPL_LDSCRIPT
 	default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
 
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index e9f2c05265..bd59bc3e08 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3368=y
+CONFIG_ROCKCHIP_PX5=y
 CONFIG_TARGET_EVB_PX5=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
 CONFIG_DEBUG_UART=y

commit 33baa40f0f5304845e01ec5f69ba2293a5e15d4d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 11:51:40 2019 +0800

    rockchip: rk3368: support UART4 in board_debug_uart_init()
    
    PX5 evb is using UART4
    
    Change-Id: I16ae5c7037123ef1c9d1c793e11d48081214b433
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 0bfe39d5f3..5fe2f3f19f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -254,6 +254,25 @@ void board_debug_uart_init(void)
 		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff1c0000)
+	struct rk3368_pmu_grf * const pmugrf __maybe_unused =
+		(struct rk3368_pmu_grf * const)0xff738000;
+
+	enum {
+		/* UART4 */
+		GPIO0D2_MASK		= GENMASK(5, 4),
+		GPIO0D2_GPIO		= 0,
+		GPIO0D2_UART4_SOUT	= (3 << 4),
+
+		GPIO0D3_MASK		= GENMASK(7, 6),
+		GPIO0D3_GPIO		= 0,
+		GPIO0D3_UART4_SIN	= (3 << 6),
+	};
+
+	/* Enable early UART4 on the PX5 */
+	rk_clrsetreg(&pmugrf->gpio0d_iomux,
+		     GPIO0D2_MASK | GPIO0D3_MASK,
+		     GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
 #elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
 	/* Enable early UART2 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2a_iomux,

commit 903381d2b2db2b884dacd54e52c6002a275f1e13
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 11:50:47 2019 +0800

    make.sh: support PX5
    
    Update rule to support PX5
    
    Change-Id: I67660165d78eb388e047fbf2189e493265dd45ad
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/make.sh b/make.sh
index fd9780c237..023e539dfa 100755
--- a/make.sh
+++ b/make.sh
@@ -324,7 +324,7 @@ select_chip_info()
 	#  - PX30, PX3SE
 	#  - RK????, RK????X
 	#  - RV????
-	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{2,5}'
+	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{1,5}'
 	count=`egrep -c ${chip_reg} ${OUTDIR}/.config`
 	# Obtain the matching only
 	RKCHIP=`egrep -o ${chip_reg} ${OUTDIR}/.config`
@@ -345,6 +345,8 @@ select_chip_info()
 			&& RKCHIP=RK3326
 		grep '^CONFIG_ROCKCHIP_RK3128X=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3128X
+		grep '^CONFIG_ROCKCHIP_PX5=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=PX5
 		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3399PRO
 	else

commit 892d0a7f9b16098a22ef0115c3850247a28fb638
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:25:57 2019 +0800

    common: android: remove unnesscessary message
    
    Change-Id: Iaa5da7da492f3fcb8021d175bb9a39a04d7f61d0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2a652e47f5..68535abbc8 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -799,10 +799,8 @@ int android_fdt_overlay_apply(void *fdt_addr)
 	android_print_contents(hdr);
 #endif
 
-	if (android_image_check_header(hdr)) {
-		printf("%s: Invalid Android header %s\n", __func__, hdr->magic);
+	if (android_image_check_header(hdr))
 		return -EINVAL;
-	}
 
 	/* Check header version */
 	if (!hdr->header_version) {

commit 2a14a50bdef4de7604536b8ecdb9183642e131f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:45:22 2019 +0800

    common: rkimg: add hotkey for sysmem and bidram dump
    
    Change-Id: I32ded101c764df18f66916dd863145ace81d35be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 66a5dfebda..49bc241f69 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -15,6 +15,8 @@
 #include <asm/arch/boot_mode.h>
 #include <asm/io.h>
 #include <part.h>
+#include <bidram.h>
+#include <console.h>
 #include <sysmem.h>
 
 #define TAG_KERNEL			0x4C4E524B
@@ -522,6 +524,11 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 
 	fdt_ramdisk_skip_relocation();
 
+	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
+		bidram_dump();
+		sysmem_dump();
+	}
+
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",

commit 32c868cf114c57c821622037ec28147285f3663e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:45:02 2019 +0800

    common: android: add hotkey for sysmem and bidram dump
    
    Change-Id: Ic866dcc2b160ebd92d518e517e0bc8870aec84d0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2b0a5864e4..2a652e47f5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -22,8 +22,12 @@
 #include <keymaster.h>
 #include <linux/libfdt_env.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <bidram.h>
+#include <console.h>
 #include <sysmem.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
 #define ANDROID_PARTITION_OEM  "oem"
@@ -332,6 +336,11 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		printf("Booting kernel at %s with fdt at %s...\n\n\n",
 		       kernel_addr_r, fdt_addr);
 
+	if (gd->console_evt == CONSOLE_EVT_CTRL_M) {
+		bidram_dump();
+		sysmem_dump();
+	}
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;
diff --git a/include/console.h b/include/console.h
index c5eac9cba2..3af98a622a 100644
--- a/include/console.h
+++ b/include/console.h
@@ -13,6 +13,7 @@ extern char console_buffer[];
 #define CONSOLE_EVT_CTRL_B	0x02
 #define CONSOLE_EVT_CTRL_D	0x04
 #define CONSOLE_EVT_CTRL_F	0x06
+#define CONSOLE_EVT_CTRL_M	0x0D
 
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */

commit da051cc8bbb62b506d838dcb8ceb0a7837be305e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 17:21:24 2019 +0800

    rockchip: add ctrl+f hotkey to enter fastboot mode
    
    Change-Id: I1f0a98793307b5a261958fe8c29da3271f2d8e4e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index a738bfd79c..f271c5b945 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -164,6 +164,8 @@ void rockchip_dnl_mode_check(void)
 			printf("recovery key pressed, entering recovery mode!\n");
 			env_set("reboot_mode", "recovery");
 		}
+	} else if (gd->console_evt == CONSOLE_EVT_CTRL_F) {
+		env_set("reboot_mode", "fastboot");
 	}
 }
 
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 9c2aedf03d..66a5dfebda 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -364,9 +364,14 @@ int rockchip_get_boot_mode(void)
 	 * USB attach will do env_set("reboot_mode", "recovery");
 	 */
 	env_reboot_mode = env_get("reboot_mode");
-	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery")) {
-		boot_mode = BOOT_MODE_RECOVERY;
-		printf("boot mode: recovery\n");
+	if (env_reboot_mode) {
+		if (!strcmp(env_reboot_mode, "recovery")) {
+			boot_mode = BOOT_MODE_RECOVERY;
+			printf("boot mode: recovery\n");
+		} else if (!strcmp(env_reboot_mode, "fastboot")) {
+			boot_mode = BOOT_MODE_BOOTLOADER;
+			printf("boot mode: fastboot\n");
+		}
 	}
 
 	if (boot_mode != -1)
diff --git a/include/console.h b/include/console.h
index d72c8cdf35..c5eac9cba2 100644
--- a/include/console.h
+++ b/include/console.h
@@ -12,6 +12,7 @@ extern char console_buffer[];
 
 #define CONSOLE_EVT_CTRL_B	0x02
 #define CONSOLE_EVT_CTRL_D	0x04
+#define CONSOLE_EVT_CTRL_F	0x06
 
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */

commit 309d75e75589415a91feba58ea385e1ec28759b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 15 10:11:45 2019 +0800

    command: board_f/r: add sysmem and bidram
    
    During board_f sequence, it's able to add any count of dram banks
    and validate memory layout after reserve_xxx() done, stop bootflow
    if there is something wrong.
    
    During board_r sequence, it's able to manage all memory blocks and
    add reserve memory blocks for bi_dram[] at late bootflow, it's
    nesscessary for AMP boot.
    
    Change-Id: I4443a809792bb04e205bb26d79870c85cb5fe7bd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index 888dc367ae..f898e42edd 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -40,6 +40,7 @@
 #include <asm/sections.h>
 #include <dm/root.h>
 #include <linux/errno.h>
+#include <sysmem.h>
 
 /*
  * Pointer to initial global data area
@@ -874,6 +875,9 @@ static const init_fnc_t init_sequence_f[] = {
 	reserve_stacks,
 	dram_init_banksize,
 	show_dram_config,
+#ifdef CONFIG_SYSMEM
+	sysmem_init,		/* Validate above reserve memory */
+#endif
 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 	defined(CONFIG_SH)
 	setup_board_part1,
diff --git a/common/board_r.c b/common/board_r.c
index 5d550f0446..e49e30c8c2 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -56,6 +56,7 @@
 #include <linux/err.h>
 #include <efi_loader.h>
 #include <sysmem.h>
+#include <bidram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -767,8 +768,11 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 	initr_barrier,
 	initr_malloc,
+#ifdef CONFIG_BIDRAM
+	bidram_initr,
+#endif
 #ifdef CONFIG_SYSMEM
-	sysmem_init,		/* After malloc setup */
+	sysmem_initr,
 #endif
 	log_init,
 	initr_bootstage,	/* Needs malloc() but has its own timer */

commit 86f870d669efdb2002f01fb2c511e0dd646bf43e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 19:57:18 2019 +0800

    rockchip: board: import bidram for GD board bi_dram[]
    
    Change-Id: I9183f3664aa770bb5139cf635136834a206b75f5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2a79de49ee..16136442df 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -5,8 +5,10 @@
  */
 #include <common.h>
 #include <clk.h>
+#include <bidram.h>
 #include <dm.h>
 #include <debug_uart.h>
+#include <memblk.h>
 #include <ram.h>
 #include <syscon.h>
 #include <sysmem.h>
@@ -481,6 +483,39 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
+#ifdef CONFIG_BIDRAM
+int board_bidram_reserve(struct bidram *bidram)
+{
+	struct memblock mem;
+	int ret;
+
+	/* ATF */
+	mem = param_parse_atf_mem();
+	ret = bidram_reserve(MEMBLK_ID_ATF, mem.base, mem.size);
+	if (ret)
+		return ret;
+
+	/* PSTORE/ATAGS/SHM */
+	mem = param_parse_common_resv_mem();
+	ret = bidram_reserve(MEMBLK_ID_SHM, mem.base, mem.size);
+	if (ret)
+		return ret;
+
+	/* OP-TEE */
+	mem = param_parse_optee_mem();
+	ret = bidram_reserve(MEMBLK_ID_OPTEE, mem.base, mem.size);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+parse_fn_t board_bidram_parse_fn(void)
+{
+	return param_parse_ddr_mem;
+}
+#endif
+
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index cb4e46a9d3..f71aacc9cd 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <memblk.h>
+#include <bidram.h>
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
@@ -18,180 +18,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
 #define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
 
-#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
-
-#define SDRAM_OFFSET(offset)	(CONFIG_SYS_SDRAM_BASE + (offset))
-#define NOT_INITIAL		-1
-static int __dram_init_banksize(int resv_tee)
-{
-	struct memblock prop;
-	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
-			 gd->ram_top);
-	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
-	u64 tos_addr, atf_addr;
-	u64 tos_size, atf_size;
-	int i, idx = NOT_INITIAL;
-
-	prop = param_parse_atf_mem();
-	atf_addr = prop.base;
-	atf_size = prop.size;
-	prop = param_parse_optee_mem();
-	tos_addr = prop.base;
-	tos_size = prop.size;
-
-	/*
-	 * Reserve region for ATF bl31
-	 *
-	 * What ever U-Boot runs on AArch64 or AArch32 mode, the bl31 is always
-	 * present and AArch64 mode, let's reserve it.
-	 *
-	 * Maybe:
-	 *	1. ATF region is from 0x0 offset and 1MB size(legacy);
-	 *	2. ATF region is from 0x0 offset but not 1MB size;
-	 *	3. ATF region is not from 0x0 offset but within 1MB;
-	 *
-	 * 1. The "*****" means visible region to kernel.
-	 * 2. 1M~2M is always reserved in ARM64 for pstore, shmem, etc.
-	 *
-	 *
-	 * Possible memory layout:
-	 *
-	 * Leagcy:
-	 *	 |------------o-------o------------------------|
-	 *	 |     ATF    | RES   |************************|
-	 *	 |------------o-------o------------------------|
-	 *	 0x0          1M      2M                      .....
-	 *
-	 *
-	 * New:
-	 *	 |-----|------o-------o------------------------|
-	 *	 | ATF |******| RES   |************************|
-	 *	 |-----|------o-------o------------------------|
-	 *	 0x0          1M      2M                      .....
-	 *
-	 *
-	 *	 |----|---|---o-------o------------------------|
-	 *	 |****|ATF|***| RES   |************************|
-	 *	 |----|---|---o-------o------------------------|
-	 *	 0x0  64K     1M      2M                      .....
-	 *
-	 * Note: these are only initilized once from dram_init_banksize(),
-	 *       which is before relocation.
-	 */
-	if (atf_size && !(gd->flags & GD_FLG_RELOC)) {
-		idx = 0;
-		memset(size, 0, sizeof(size));
-
-		start[0] = SDRAM_OFFSET(0);
-		 size[0] = atf_addr - start[0];
-		start[1] = atf_addr + atf_size;
-		 size[1] = SDRAM_OFFSET(SZ_1M) - start[1];
-		start[2] = SDRAM_OFFSET(SZ_2M);
-		 size[2] = top - start[2];
-
-		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-			if (!size[i])
-				continue;
-
-			gd->bd->bi_dram[idx].start = start[i];
-			gd->bd->bi_dram[idx].size = size[i];
-			idx++;
-		}
-	/* There is no bl31, fill whole ram size */
-	} else if (!(gd->flags & GD_FLG_RELOC)) {
-		gd->bd->bi_dram[0].start = SDRAM_OFFSET(0);
-		gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
-	} else {
-		/*
-		 * Do nothing for bl31 when called from dram_initr_banksize(),
-		 * which is after relocation.
-		 */
-	}
-
-	/*
-	 * Reserve region for OP-TEE
-	 *
-	 * What ever U-Boot runs on AArch64 or AArch32 mode, the OP-TEE is
-	 * AArch64 mode.
-	 *
-	 * For OP-TEE:
-	 *	AArch64: dcache is enabled;
-	 *	AArch32: dcache is disabled(due to some unknown issues);
-	 *
-	 * For the data coherence, U-Boot has to follow the OP-TEE dcache
-	 * policy to map MMU attributes of OP-TEE region.
-	 *
-	 * For AArch64: MMU translate table is created manual by rkxxx.c file
-	 * and all memory region is mapped, that's good to match OP-TEE policy.
-	 * For AArch32: MMU translate table is setup according to bi_dram[..]
-	 * that OP-TEE region has been reserved and would not be mapped,
-	 * i.e. dcache is disabled, that's also good to match OP-TEE policy.
-	 *
-	 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot runs on AArch32
-	 * while OP-TEE runs on AArch64. U-Boot shouldn't reserved OP-TEE region
-	 * too early and should map MMU translate table of it(in intir_cache()).
-	 * So we reserve the region in dram_initr_banksize() after MMU setup.
-	 *
-	 *
-	 *	The are two kinds of OP-TEE memory layout
-	 *
-	 * legacy:
-	 * 	|----|-------o---------------------------------|
-	 * 	|....| OPTEE |*********************************|
-	 * 	|----|-------o---------------------------------|
-	 * 	0x0 2M      6M(or more)                 .....
-	 *
-	 * new:
-	 * 	|----|-------------------o-------o-------------|
-	 * 	|....|*******************| OPTEE |*************|
-	 * 	|----|-------------------o-------o-------------|
-	 * 	0x0  2M                132M     164M(or less) .....
-	 */
-
-	if (resv_tee && tos_size) {
-		/* If idx is not initialized, calculate idx */
-		if (idx == NOT_INITIAL) {
-			for (idx = 0; idx < CONFIG_NR_DRAM_BANKS; idx++) {
-				if (!gd->bd->bi_dram[idx].size)
-					break;
-			}
-		}
-
-		if (tos_addr == SZ_2M) {
-			gd->bd->bi_dram[idx - 1].start = tos_addr + tos_size;
-			gd->bd->bi_dram[idx - 1].size =
-					top - gd->bd->bi_dram[idx - 1].start;
-		} else {
-			gd->bd->bi_dram[idx - 1].size = tos_addr -
-					gd->bd->bi_dram[idx - 1].start;
-			gd->bd->bi_dram[idx].start = tos_addr + tos_size;
-			gd->bd->bi_dram[idx].size =
-					top - gd->bd->bi_dram[idx].start;
-		}
-#ifdef DEBUG
-		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-			debug("%s: bank[%d]=0x%llx-0x%llx\n",
-			      __func__, i, (u64)gd->bd->bi_dram[i].start,
-			      (u64)gd->bd->bi_dram[i].start +
-			      gd->bd->bi_dram[i].size);
-		}
-#endif
-	}
-
-	return 0;
-}
-
-/*
- * !defined(CONFIG_ARM64_BOOT_AARCH32) means: U-Boot and OP-TEE both run
- * on AArch32 or AArch64, they are same mode. Otherwise OP-TEE is AArch64
- * while U-Boot is AArch32. There is data cache coherence issue to fix.
- */
-int dram_init_banksize(void)
-{
-	return __dram_init_banksize(!IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
-}
-#endif
-
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
 	u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4;
@@ -343,47 +169,18 @@ unsigned int get_ddr_bw(void)
 }
 
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
-int dram_init(void)
+int dram_init_banksize(void)
 {
-	struct ram_info ram;
-	struct udevice *dev;
-	int ret;
-
-	/* New way: atags info */
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	struct tag *t = NULL;
-	int i, count;
-
-	t = atags_get_tag(ATAG_DDR_MEM);
-	if (t && t->u.ddr_mem.count) {
-		gd->ram_size = 0;
-		count = t->u.ddr_mem.count;
+	bidram_gen_gd_bi_dram();
 
-		for (i = 0; i < count; i++) {
-			gd->ram_size += t->u.ddr_mem.bank[i + count];
-			debug("%s: ram[%d] start=0x%08llx, size=0x%08llx, sum=0x%08llx\n",
-			      __func__, i, (u64)gd->bd->bi_dram[i].start,
-			      (u64)gd->bd->bi_dram[i].size, (u64)gd->ram_size);
-		}
-
-		return 0;
-	}
-#endif
+	return 0;
+}
 
-	/* Legacy way: os registers */
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return ret;
-	}
-	ret = ram_get_info(dev, &ram);
-	if (ret) {
-		debug("Cannot get DRAM size: %d\n", ret);
-		return ret;
-	}
-	gd->ram_size = ram.size;
-	debug("SDRAM base=%lx, size=%lx\n",
-	      (unsigned long)ram.base, (unsigned long)ram.size);
+int dram_init(void)
+{
+	gd->ram_size = bidram_get_ram_size();
+	if (!gd->ram_size)
+		return -ENOMEM;
 
 	return 0;
 }

commit b9bc76b4e104a91a212ea42d451dc52d237b5629
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 18 10:15:01 2019 +0800

    rockchip: param: add ddr memory region parse
    
    Change-Id: I7d59ee54a82da57b62970f4bc47faded60ba6ac8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
index 5cd8538e1b..dbfb1fb27f 100644
--- a/arch/arm/include/asm/arch-rockchip/param.h
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -9,6 +9,14 @@
 
 #include <memblk.h>
 
+/**
+ * param_parse_ddr_mem() - Parse ddr memory region
+ *
+ * @out_count: valid count of memblock for memblock list.
+ * @return memblock structure list which contains base and size info.
+ */
+struct memblock *param_parse_ddr_mem(int *out_count);
+
 /**
  * param_parse_atf_mem() - Parse atf memory region
  *
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 3e1bdca38e..8f88958192 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -195,3 +195,69 @@ int param_parse_bootdev(char **devtype, char **devnum)
 
 	return -ENOSYS;
 }
+
+struct memblock *param_parse_ddr_mem(int *out_count)
+{
+	struct udevice *dev;
+	struct memblock *mem;
+	struct ram_info ram;
+	int i, ret, count;
+
+	/*
+	 * Get memory region of DDR
+	 *
+	 * 1. New: atags info;
+	 * 2. Leagcy: os register;
+	 */
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_DDR_MEM);
+	if (t && t->u.ddr_mem.count) {
+		count = t->u.ddr_mem.count;
+		mem = calloc(count, sizeof(*mem));
+		if (!mem) {
+			printf("Calloc ddr memory failed\n");
+			return 0;
+		}
+
+		for (i = 0; i < count; i++) {
+			mem[i].base = t->u.ddr_mem.bank[i];
+			mem[i].size = t->u.ddr_mem.bank[i + count];
+		}
+
+		*out_count = count;
+		return mem;
+	}
+#endif
+
+	/* Leagcy */
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return NULL;
+	}
+	ret = ram_get_info(dev, &ram);
+	if (ret) {
+		debug("Cannot get DRAM size: %d\n", ret);
+		return NULL;
+	}
+
+	debug("SDRAM base=%lx, size=%lx\n",
+	      (unsigned long)ram.base, (unsigned long)ram.size);
+
+	count = 1;
+	mem = calloc(1, sizeof(*mem));
+	if (!mem) {
+		printf("Calloc ddr memory failed\n");
+		return 0;
+	}
+
+	for (i = 0; i < count; i++) {
+		mem[i].base = CONFIG_SYS_SDRAM_BASE;
+		mem[i].size = ram.size;
+	}
+
+	*out_count = count;
+	return mem;
+}

commit 483d0493217503c55708e8f9261c25d700fb87cb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:34:30 2019 +0800

    lib: introduce bidram for GD board bi_dram[] memory management
    
    Some platform provides more than one dram banks and reserved firmware
    regions (eg. ATF, OP-TEE, etc) by pre-loader dynamically. It means
    there are memory holes in board dram layout. What's more, U-Boot will
    reserved regions at the late bootflow(eg. firmware reserved for AMP).
    
    So we introduce bidram mechanism to manage GD board bi_dram[], which
    provides a way to easily manage memory holes and update bi_dram[]. It
    dpends on LMB which provides a good algorithm to manage memory blocks.
    
    What's different from sysmem?
    - bidram manage and pass the avaliable memory blocks to kernel;
    - sysmem is only for U-Boot memory management to avoid ram overlap,
      it doesn't matter about kernel avaliable memory.
    
    Change-Id: I697cbb80bdc961e4ad5ab94548e2dc93feefde6f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/bidram.h b/include/bidram.h
new file mode 100644
index 0000000000..3b39d442fd
--- /dev/null
+++ b/include/bidram.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _BIDRAM_H
+#define _BIDRAM_H
+
+#include <memblk.h>
+
+typedef struct memblock *(*parse_fn_t)(int *);
+
+struct bidram {
+	struct lmb lmb;
+	struct list_head reserved_head;
+	bool has_init;
+};
+
+/**
+ * bidram_initr() - Initial bidram after relocation.
+ *
+ * @return 0 on success, otherwise error
+ */
+int bidram_initr(void);
+
+/**
+ * bidram_get_ram_size() - Initial bidram and get ram size.
+ *
+ * @parse_fn: function to parse ddr memory regions
+ *
+ * @return ram size, 0 on success, otherwise the effect ram size.
+ */
+phys_size_t bidram_get_ram_size(void);
+
+/**
+ * bidram_gen_gd_bi_dram() - Update gd->bd->bi_dram[] according to bidram state.
+ */
+void bidram_gen_gd_bi_dram(void);
+
+/**
+ * bidram_reserve() - Reserve bidram region
+ *
+ * @id: memblk id
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int bidram_reserve(enum memblk_id id, phys_addr_t base, phys_size_t size);
+
+/**
+ * bidram_reserve_by_name() - Reserve bidram region by name
+ *
+ * @name: region name
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int bidram_reserve_by_name(const char *name, phys_addr_t base, phys_size_t size);
+
+/**
+ * bidram_dump_all() - Dump all bidram stat
+ */
+void bidram_dump(void);
+
+/**
+ * board_bidram_parse_fn() - Weak function for board to implement
+ */
+parse_fn_t board_bidram_parse_fn(void);
+
+/**
+ * board_bidram_reserve() - Weak function for board to implement
+ *
+ * @bidram: global bidram point, ignored
+ *
+ * @return 0 on success, otherwise error
+ */
+int board_bidram_reserve(struct bidram *bidram);
+
+#endif /* _BIDRAM_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index 0699984837..c1aca36303 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -105,6 +105,12 @@ config SYSMEM
 	help
 	  This enables support for system permanent memory management.
 
+config BIDRAM
+	bool "GD board bi_dram[] memory management"
+	default y
+	help
+	  This enables support for GD board bi_dram[] memory management.
+
 source lib/dhry/Kconfig
 
 menu "Security support"
diff --git a/lib/Makefile b/lib/Makefile
index e417c794df..30f195b66f 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -31,6 +31,7 @@ obj-y += initcall.o
 obj-$(CONFIG_LMB) += lmb.o
 ifdef CONFIG_LMB
 obj-$(CONFIG_SYSMEM) += sysmem.o
+obj-$(CONFIG_BIDRAM) += bidram.o
 endif
 obj-y += ldiv.o
 obj-$(CONFIG_LZ4) += lz4_wrapper.o
diff --git a/lib/bidram.c b/lib/bidram.c
new file mode 100644
index 0000000000..d39f5b14ae
--- /dev/null
+++ b/lib/bidram.c
@@ -0,0 +1,428 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <lmb.h>
+#include <bidram.h>
+#include <malloc.h>
+#include <sysmem.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_BAD_MEMBLK		8
+
+#define BIDRAM_R(fmt, args...)	printf(fmt, ##args)
+#define BIDRAM_I(fmt, args...)	printf("Bidram: "fmt, ##args)
+#define BIDRAM_W(fmt, args...)	printf("Bidram Warn: "fmt, ##args)
+#define BIDRAM_E(fmt, args...)	printf("Bidram Error: "fmt, ##args)
+#define BIDRAM_D(fmt, args...)	 debug("Bidram Debug: "fmt, ##args)
+
+struct bidram plat_bidram __section(".data") = { .has_init = false, };
+
+static int bidram_has_init(void)
+{
+	if (!plat_bidram.has_init) {
+		BIDRAM_E("Framework is not initialized\n");
+		return 0;
+	}
+
+	return 1;
+}
+
+void bidram_dump(void)
+{
+	struct bidram *bidram = &plat_bidram;
+	struct lmb *lmb = &bidram->lmb;
+	struct memblock *mem;
+	struct list_head *node;
+	ulong memory_size = 0;
+	ulong reserved_size = 0;
+	ulong i;
+
+	if (!bidram_has_init())
+		return;
+
+	printf("\n\nbidram_dump_all:\n");
+
+	/* Memory pool */
+	printf("    --------------------------------------------------------------------\n");
+	for (i = 0; i < lmb->memory.cnt; i++) {
+		memory_size += lmb->memory.region[i].size;
+		printf("    memory.rgn[%ld].addr     = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->memory.region[i].base,
+		       (ulong)lmb->memory.region[i].base +
+		       (ulong)lmb->memory.region[i].size,
+		       (ulong)lmb->memory.region[i].size);
+	}
+	printf("\n    memory.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)memory_size,
+	       SIZE_MB((ulong)memory_size),
+	       SIZE_KB((ulong)memory_size));
+
+	/* Reserved */
+	i = 0;
+	printf("    --------------------------------------------------------------------\n");
+	list_for_each(node, &bidram->reserved_head) {
+		mem = list_entry(node, struct memblock, node);
+		reserved_size += mem->size;
+		printf("    reserved.rgn[%ld].name   = \"%s\"\n", i, mem->attr.name);
+		printf("		   .addr   = 0x%08lx - 0x%08lx (size: 0x%08lx)\n",
+		       (ulong)mem->base, (ulong)mem->base + (ulong)mem->size,
+		       (ulong)mem->size);
+		i++;
+	}
+	printf("\n    reserved.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+
+	/* LMB core reserved */
+	printf("    --------------------------------------------------------------------\n");
+	reserved_size = 0;
+	for (i = 0; i < lmb->reserved.cnt; i++) {
+		reserved_size += lmb->reserved.region[i].size;
+		printf("    LMB.reserved[%ld].addr   = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->reserved.region[i].base,
+		       (ulong)lmb->reserved.region[i].base +
+		       (ulong)lmb->reserved.region[i].size,
+		       (ulong)lmb->reserved.region[i].size);
+	}
+
+	printf("\n    reserved.core.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+	printf("    --------------------------------------------------------------------\n\n");
+}
+
+static int bidram_add(phys_addr_t base, phys_size_t size)
+{
+	struct bidram *bidram = &plat_bidram;
+	int ret;
+
+	if (!bidram_has_init())
+		return -ENOSYS;
+
+	if (!size)
+		return -EINVAL;
+
+	ret = lmb_add(&bidram->lmb, base, size);
+	if (ret < 0)
+		BIDRAM_E("Failed to add bidram at 0x%08lx - 0x%08lx\n",
+			 (ulong)base, (ulong)(base + size));
+
+	return (ret >= 0) ? 0 : ret;
+}
+
+void bidram_gen_gd_bi_dram(void)
+{
+	struct lmb *lmb = &plat_bidram.lmb;
+	struct lmb_property *mem_rgn = lmb->memory.region;
+	struct lmb_property *res_rgn = lmb->reserved.region;
+	int rsv_cnt = lmb->reserved.cnt;
+	int i, idx = 0;
+
+	if (!gd || !gd->bd) {
+		BIDRAM_D("Ignore bi dram bank update\n");
+		return;
+	}
+
+	/* If reserved rgn is not from sdram start */
+	if (res_rgn[0].base != mem_rgn[0].base) {
+		gd->bd->bi_dram[idx].start = mem_rgn[0].base;
+		gd->bd->bi_dram[idx].size  = res_rgn[0].base -
+					     gd->bd->bi_dram[idx].start;
+		idx++;
+	}
+
+	/*
+	 * Note: If reserved rgn is not from sdram start, idx=1 now, otherwise 0.
+	 */
+	for (i = 0; i < rsv_cnt; i++, idx++) {
+		if (res_rgn[i].base + res_rgn[i].size >= gd->ram_top)
+			goto done;
+
+		gd->bd->bi_dram[idx].start = res_rgn[i].base + res_rgn[i].size;
+		if (i + 1 < rsv_cnt)
+			gd->bd->bi_dram[idx].size = res_rgn[i + 1].base -
+					    gd->bd->bi_dram[idx].start;
+		else
+			gd->bd->bi_dram[idx].size = gd->ram_top -
+					    gd->bd->bi_dram[idx].start;
+	}
+done:
+	for (i = 0; i < idx; i++) {
+		BIDRAM_D("gd bi_dram[%d]: start=0x%08lx, end=0x%08lx\n",
+			 i, (ulong)gd->bd->bi_dram[i].start,
+			 (ulong)gd->bd->bi_dram[i].start +
+			 (ulong)gd->bd->bi_dram[i].size);
+	}
+}
+
+static int bidram_is_overlap(phys_addr_t base1, phys_size_t size1,
+			     phys_addr_t base2, phys_size_t size2)
+{
+	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
+}
+
+static int bidram_core_reserve(enum memblk_id id, const char *mem_name,
+			       phys_addr_t base, phys_size_t size)
+{
+	struct bidram *bidram = &plat_bidram;
+	struct memblk_attr attr;
+	struct memblock *mem;
+	struct list_head *node;
+	const char *name;
+	int ret;
+
+	if (!bidram_has_init())
+		return -ENOSYS;
+
+	if (id == MEMBLK_ID_BY_NAME) {
+		if (!mem_name) {
+			BIDRAM_E("NULL name for reserve bidram\n");
+			return -EINVAL;
+		} else {
+			name = mem_name;
+		}
+	} else {
+		if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
+			attr = mem_attr[id];
+			name = attr.name;
+		} else {
+			BIDRAM_E("Unsupport memblk id %d for reserve bidram\n", id);
+			return -EINVAL;
+		}
+	}
+
+	if (!name) {
+		BIDRAM_E("NULL name for reserved bidram\n");
+		return -EINVAL;
+	}
+
+	if (!size)
+		return 0;
+
+	/* Check overlap */
+	list_for_each(node, &bidram->reserved_head) {
+		mem = list_entry(node, struct memblock, node);
+		BIDRAM_D("Reserved: %s 0x%08lx - 0x%08lx\n",
+			 mem->attr.name, (ulong)mem->base,
+			 (ulong)(mem->base + mem->size));
+		if (!strcmp(mem->attr.name, name)) {
+			BIDRAM_E("Failed to double reserve for existence \"%s\"\n", name);
+			return -EEXIST;
+		} else if (bidram_is_overlap(mem->base, mem->size, base, size)) {
+			BIDRAM_D("\"%s\" (0x%08lx - 0x%08lx) reserve is "
+				 "overlap with existence \"%s\" (0x%08lx - "
+				 "0x%08lx)\n",
+				 name, (ulong)base, (ulong)(base + size), mem->attr.name,
+				 (ulong)mem->base, (ulong)(mem->base + mem->size));
+		}
+	}
+
+	ret = lmb_reserve(&bidram->lmb, base, size);
+	if (ret >= 0) {
+		mem = malloc(sizeof(*mem));
+		if (!mem) {
+			BIDRAM_E("No memory for \"%s\" reserve bidram\n", name);
+			return -ENOMEM;
+		}
+
+#ifdef CONFIG_SYSMEM
+		/* Sync to sysmem */
+		if (sysmem_has_init()) {
+			void *paddr;
+
+			if (id == MEMBLK_ID_BY_NAME)
+				paddr = sysmem_alloc_base_by_name(name, base, size);
+			else
+				paddr = sysmem_alloc_base(id, base, size);
+			if (!paddr) {
+				BIDRAM_E("Sync \"%s\" to sysmem failed\n", name);
+				return -ENOMEM;
+			}
+		}
+#endif
+		mem->base = base;
+		mem->size = size;
+		if (id == MEMBLK_ID_BY_NAME) {
+			mem->attr.name = name;
+			mem->attr.flags = 0;
+		} else {
+			mem->attr = attr;
+		}
+		list_add_tail(&mem->node, &bidram->reserved_head);
+	} else {
+		BIDRAM_E("Failed to reserve \"%s\" 0x%08lx - 0x%08lx\n",
+			 name, (ulong)base, (ulong)(base + size));
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+int bidram_reserve(enum memblk_id id, phys_addr_t base, phys_size_t size)
+{
+	int ret;
+
+	ret = bidram_core_reserve(id, NULL, base, size);
+	if (!ret)
+		bidram_gen_gd_bi_dram();
+	else
+		bidram_dump();
+
+	return ret;
+}
+
+int bidram_reserve_by_name(const char *name,
+			   phys_addr_t base, phys_size_t size)
+{
+	int ret;
+
+	ret = bidram_core_reserve(MEMBLK_ID_BY_NAME, name, base, size);
+	if (!ret)
+		bidram_gen_gd_bi_dram();
+	else
+		bidram_dump();
+
+	return ret;
+}
+
+int bidram_initr(void)
+{
+	return !bidram_get_ram_size();
+}
+
+phys_size_t bidram_get_ram_size(void)
+{
+	struct bidram *bidram = &plat_bidram;
+	struct memblock bad[MAX_BAD_MEMBLK];
+	struct memblock *list;
+	phys_size_t ram_addr_end = CONFIG_SYS_SDRAM_BASE;
+	phys_addr_t end_addr;
+	parse_fn_t parse_fn;
+	int i, count, ret;
+	int bad_cnt = 0;
+	char bad_name[12];
+
+	parse_fn = board_bidram_parse_fn();
+	if (!parse_fn) {
+		BIDRAM_E("Can't find dram parse fn\n");
+		return 0;
+	}
+
+	list = parse_fn(&count);
+	if (!list) {
+		BIDRAM_E("Can't get dram banks\n");
+		return 0;
+	}
+
+	if (count > CONFIG_NR_DRAM_BANKS) {
+		BIDRAM_E("Too many dram banks, %d is over max: %d\n",
+			 count, CONFIG_NR_DRAM_BANKS);
+		return 0;
+	}
+
+	/* Initial plat_bidram */
+	lmb_init(&bidram->lmb);
+	INIT_LIST_HEAD(&bidram->reserved_head);
+	bidram->has_init = true;
+
+	/* Initial memory pool */
+	for (i = 0; i < count; i++) {
+		BIDRAM_D("Add bank[%d] start=0x%08lx, end=0x%08lx\n",
+			 i, (ulong)list[i].base,
+			 (ulong)list[i].base + (ulong)list[i].size);
+
+		if (!list[i].size)
+			continue;
+
+		/* We assume the last block gives the ram addr end */
+		if (i == count - 1) {
+			ram_addr_end = list[i].base + list[i].size;
+			ret = bidram_add(CONFIG_SYS_SDRAM_BASE,
+					 ram_addr_end - CONFIG_SYS_SDRAM_BASE);
+			if (ret) {
+				BIDRAM_E("Failed to add bidram from bi_dram[%d]\n", i);
+				return 0;
+			}
+		}
+
+		/* This is a bad dram bank? record it */
+		if (i > 0) {
+			end_addr = list[i - 1].base + list[i - 1].size;
+
+			if (list[i].base != end_addr) {
+				snprintf(bad_name, 12, "%s%d", "BAD_RAM.", i - 1);
+				bad[bad_cnt].attr.name = strdup(bad_name);
+				bad[bad_cnt].base = end_addr;
+				bad[bad_cnt].size = list[i].base - end_addr;
+				bad_cnt++;
+				if (bad_cnt > MAX_BAD_MEMBLK) {
+					BIDRAM_E("Too many bad memory blocks\n");
+					return 0;
+				}
+			}
+		}
+	}
+
+	/* Reserve bad dram bank after bidram_add(), treat as reserved region */
+	for (i = 0; i < bad_cnt; i++) {
+		if (gd->flags & GD_FLG_RELOC)
+			BIDRAM_R("Bad memblk%d: 0x%08lx - 0x%08lx\n",
+				 i, (ulong)bad[i].base,
+				 (ulong)bad[i].base + (ulong)bad[i].size);
+
+		ret = bidram_reserve_by_name(bad[i].attr.name,
+					     bad[i].base, bad[i].size);
+		if (ret) {
+			BIDRAM_E("Failed to add bad memblk[%d]\n", i);
+			return 0;
+		}
+	}
+
+	/* Reserved for board */
+	ret = board_bidram_reserve(bidram);
+	if (ret) {
+		BIDRAM_E("Failed to reserve bidram for board\n");
+		return 0;
+	}
+
+	BIDRAM_D("DRAM size: 0x%08lx\n",
+		 (ulong)ram_addr_end - CONFIG_SYS_SDRAM_BASE);
+
+#ifdef DEBUG
+	bidram_dump();
+#endif
+
+	return (ram_addr_end - CONFIG_SYS_SDRAM_BASE);
+}
+
+__weak parse_fn_t board_bidram_parse_fn(void)
+{
+	/* please define platform specific board_bidram_parse_fn() */
+	return NULL;
+}
+
+__weak int board_bidram_reserve(struct bidram *bidram)
+{
+	/* please define platform specific board_bidram_reserve() */
+	return 0;
+}
+
+static int do_dump_bidram(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
+{
+	bidram_dump();
+	return 0;
+}
+
+U_BOOT_CMD(
+	dump_bidram, 1, 1, do_dump_bidram,
+	"Dump bidram layout",
+	""
+);

commit e3fbd280efbf98ad3f90e9bfcaf63c5453ccb2df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 19:35:41 2019 +0800

    rockchip: board: implement board_initr_caches_fixup()
    
    Remove dram_initr_banksize().
    
    Change-Id: Ie0da0b8ef43d90c52b3ab2a93d1ad13b4928e70a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index fe18ace42c..2a79de49ee 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -379,6 +379,45 @@ int board_fdt_fixup(void *blob)
 	return ret;
 }
 
+#ifdef CONFIG_ARM64_BOOT_AARCH32
+/*
+ * Fixup MMU region attr for OP-TEE on ARMv8 CPU:
+ *
+ * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode.
+ *
+ * Command for OP-TEE:
+ *	64-bit mode: dcache is always enabled;
+ *	32-bit mode: dcache is always disabled(Due to some unknown issue);
+ *
+ * Command for U-Boot:
+ *	64-bit mode: MMU table is static defined in rkxxx.c file, all memory
+ *		     regions are mapped. That's good to match OP-TEE MMU policy.
+ *
+ *	32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where
+ *		     the OP-TEE region has been reserved, so it can not be
+ *		     mapped(i.e. dcache is disabled). That's also good to match
+ *		     OP-TEE MMU policy.
+ *
+ * For the data coherence when communication between U-Boot and OP-TEE, U-Boot
+ * should follow OP-TEE MMU policy.
+ *
+ * Here is the special:
+ *	When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while
+ *	OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE
+ *	region(but OP-TEE requires it cacheable) so we fixup here.
+ */
+int board_initr_caches_fixup(void)
+{
+	struct memblock mem;
+
+	mem = param_parse_optee_mem();
+	if (mem.size)
+		mmu_set_region_dcache_behaviour(mem.base, mem.size,
+						DCACHE_WRITEBACK);
+	return 0;
+}
+#endif
+
 void board_quiesce_devices(void)
 {
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 1ed20cbbfe..cb4e46a9d3 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -190,11 +190,6 @@ int dram_init_banksize(void)
 {
 	return __dram_init_banksize(!IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
 }
-
-int dram_initr_banksize(void)
-{
-	return __dram_init_banksize(IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
-}
 #endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)

commit 505b141795f509aa8d2eb4073560aff41f91a5bc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:35:21 2019 +0800

    common: board_r: add board_initr_caches_fixup()
    
    Remove dram_initr_banksize(), use mmu_set_region_dcache_behaviour()
    in board_initr_caches_fixup() to set region MMU table attr is more
    easily.
    
    Change-Id: I9d9917e938fe5bbab5aa27575a5c8592ff08ab50
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index f8db94c9af..5d550f0446 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -711,7 +711,7 @@ __weak int interrupt_debugger_init(void)
 	return 0;
 }
 
-__weak int dram_initr_banksize(void)
+__weak int board_initr_caches_fixup(void)
 {
 	return 0;
 }
@@ -760,7 +760,7 @@ static init_fnc_t init_sequence_r[] = {
 	 * like other regions, otherwise there would be dcache coherence issue
 	 * between firmware and U-Boot.
 	 */
-	dram_initr_banksize,
+	board_initr_caches_fixup,
 
 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
 	initr_unlock_ram_in_cache,

commit 6e15146effedeaad2a6687afcbf83d1907a0b996
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:23:56 2019 +0800

    lib: sysmem: refactor code
    
    - import memblk id to manage memory blocks;
    - change "sysmem_property" to generic "memblock";
    - use alloc instead of reserve for all memory blocks;
    - clean up and fix some logic;
    - add U-Boot cmd for sysmem;
    
    Change-Id: I614223ce3bf97a7b3566412a9d1864fb30b68fd8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
index 66ba2ac22e..5cd8538e1b 100644
--- a/arch/arm/include/asm/arch-rockchip/param.h
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -7,28 +7,28 @@
 #ifndef __ROCKCHIP_PARAM_H_
 #define __ROCKCHIP_PARAM_H_
 
-#include <sysmem.h>
+#include <memblk.h>
 
 /**
  * param_parse_atf_mem() - Parse atf memory region
  *
- * @return sysmem_property structure which contains base and size info.
+ * @return memblock structure which contains base and size info.
  */
-struct sysmem_property param_parse_atf_mem(void);
+struct memblock param_parse_atf_mem(void);
 
 /**
  * param_parse_atf_mem() - Parse op-tee memory region
  *
- * @return sysmem_property structure which contains base and size info.
+ * @return memblock structure which contains base and size info.
  */
-struct sysmem_property param_parse_optee_mem(void);
+struct memblock param_parse_optee_mem(void);
 
 /**
  * param_parse_atf_mem() - Parse platform common reserved memory region
  *
- * @return sysmem_property structure which contains base and size info.
+ * @return memblock structure which contains base and size info.
  */
-struct sysmem_property param_parse_common_resv_mem(void);
+struct memblock param_parse_common_resv_mem(void);
 
 /**
  * param_parse_bootdev() - Parse boot device info.
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 33618ae6ca..00132884a3 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -24,6 +24,7 @@ obj-y += boot_mode.o
 obj-y += board.o
 obj-y += chip_info.o
 obj-y += iomem.o
+obj-y += memblk.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 573956c118..fe18ace42c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -442,34 +442,6 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
-#ifdef CONFIG_SYSMEM
-int board_sysmem_reserve(struct sysmem *sysmem)
-{
-	struct sysmem_property prop;
-	int ret;
-
-	/* ATF */
-	prop = param_parse_atf_mem();
-	ret = sysmem_reserve(prop.name, prop.base, prop.size);
-	if (ret)
-		return ret;
-
-	/* PSTORE/ATAGS/SHM */
-	prop = param_parse_common_resv_mem();
-	ret = sysmem_reserve(prop.name, prop.base, prop.size);
-	if (ret)
-		return ret;
-
-	/* OP-TEE */
-	prop = param_parse_optee_mem();
-	ret = sysmem_reserve(prop.name, prop.base, prop.size);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-#endif
-
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)
diff --git a/arch/arm/mach-rockchip/memblk.c b/arch/arm/mach-rockchip/memblk.c
new file mode 100644
index 0000000000..7d288ab080
--- /dev/null
+++ b/arch/arm/mach-rockchip/memblk.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <memblk.h>
+
+const static struct memblk_attr plat_mem_attr[MEMBLK_ID_MAX] = {
+	[MEMBLK_ID_DEMO]     =	{
+		.name = "DEMO",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_ATF]      =	{
+		.name = "ATF",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_OPTEE]    =	{
+		.name = "OP-TEE",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_SHM]      =	{
+		.name = "SHM",
+		.flags = M_ATTR_NONE,
+	},
+	[MEMBLK_ID_UBOOT]    =	{
+		.name = "U-Boot",
+		.flags = M_ATTR_OVERLAP,
+	},
+	[MEMBLK_ID_FASTBOOT] =	{
+		.name = "FASTBOOT",
+		.flags = M_ATTR_OVERLAP,
+	},
+	[MEMBLK_ID_STACK]    =	{
+		.name = "STACK",
+		.flags = M_ATTR_HOFC | M_ATTR_OVERLAP,
+	},
+	[MEMBLK_ID_FDT]      =	{
+		.name = "FDT",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_FDT_DTBO] =	{
+		.name = "FDT_DTBO",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_FDT_AOSP] =	{
+		.name = "FDT_AOSP",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_RAMDISK]  =	{
+		.name = "RAMDISK",
+		.alias[0] = "BOOT",
+		.alias[1] = "RECOVERY",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_KERNEL]   =	{
+		.name = "KERNEL",
+		.flags = M_ATTR_OFC,
+	},
+	[MEMBLK_ID_ANDROID]  =	{
+		.name = "ANDROID",
+		.flags = M_ATTR_OFC,
+	},
+};
+
+const struct memblk_attr *mem_attr = plat_mem_attr;
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index c5c28d4955..3e1bdca38e 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <dm.h>
+#include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/arch/param.h>
@@ -47,13 +49,12 @@ static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
 	return checksum;
 }
 
-struct sysmem_property param_parse_atf_mem(void)
+struct memblock param_parse_atf_mem(void)
 {
-	struct sysmem_property prop;
+	struct memblock mem;
 
-	prop.name = "ATF";
-	prop.base = 0;
-	prop.size = 0;
+	mem.base = 0;
+	mem.size = 0;
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t = NULL;
@@ -66,41 +67,40 @@ struct sysmem_property param_parse_atf_mem(void)
 	 */
 	t = atags_get_tag(ATAG_ATF_MEM);
 	if (t && t->u.atf_mem.size) {
-		prop.base = t->u.atf_mem.phy_addr;
-		prop.size = t->u.atf_mem.size;
+		mem.base = t->u.atf_mem.phy_addr;
+		mem.size = t->u.atf_mem.size;
 		/* Sanity */
-		if (prop.base + prop.size > SDRAM_OFFSET(SZ_1M)) {
+		if (mem.base + mem.size > SDRAM_OFFSET(SZ_1M)) {
 			printf("%s: ATF reserved region is not within 0-1MB "
 			       "offset(0x%08llx-0x%08llx)!\n",
-			       __func__, (u64)prop.base, (u64)prop.base + prop.size);
-			return prop;
+			       __func__, (u64)mem.base, (u64)mem.base + mem.size);
+			return mem;
 		}
 	}
 #endif
 
 	/* Legacy */
-	if (!prop.size) {
+	if (!mem.size) {
 		if (IS_ENABLED(CONFIG_ARM64) ||
 		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
-			prop.base = SDRAM_OFFSET(0);
-			prop.size = SZ_1M;
+			mem.base = SDRAM_OFFSET(0);
+			mem.size = SZ_1M;
 		}
 	}
 
-	debug("ATF: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+	debug("ATF: 0x%llx - 0x%llx\n", (u64)mem.base, (u64)mem.base + mem.size);
 
-	return prop;
+	return mem;
 }
 
-struct sysmem_property param_parse_optee_mem(void)
+struct memblock param_parse_optee_mem(void)
 {
 	struct tos_param_t *tos_parameter;
-	struct sysmem_property prop;
+	struct memblock mem;
 	u32 checksum;
 
-	prop.name = "OP-TEE";
-	prop.base = 0;
-	prop.size = 0;
+	mem.base = 0;
+	mem.size = 0;
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t = NULL;
@@ -113,13 +113,13 @@ struct sysmem_property param_parse_optee_mem(void)
 	 */
 	t = atags_get_tag(ATAG_TOS_MEM);
 	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
-		prop.base = t->u.tos_mem.tee_mem.phy_addr;
-		prop.size = t->u.tos_mem.tee_mem.size;
+		mem.base = t->u.tos_mem.tee_mem.phy_addr;
+		mem.size = t->u.tos_mem.tee_mem.size;
 	}
 #endif
 
 	/* Legacy */
-	if (!prop.size) {
+	if (!mem.size) {
 		tos_parameter =
 		(struct tos_param_t *)(SDRAM_OFFSET(PARAM_OPTEE_INFO_OFFSET));
 		checksum =
@@ -127,28 +127,27 @@ struct sysmem_property param_parse_optee_mem(void)
 			       sizeof(struct tos_param_t) - 8);
 		if ((checksum == tos_parameter->checksum) &&
 		    (tos_parameter->tee_mem.flags == 1)) {
-			prop.base = tos_parameter->tee_mem.phy_addr;
-			prop.size = tos_parameter->tee_mem.size;
+			mem.base = tos_parameter->tee_mem.phy_addr;
+			mem.size = tos_parameter->tee_mem.size;
 		}
 	}
 
-	if (prop.size)
+	if (mem.size)
 		gd->flags |= GD_FLG_BL32_ENABLED;
 
-	debug("TOS: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+	debug("TOS: 0x%llx - 0x%llx\n", (u64)mem.base, (u64)mem.base + mem.size);
 
-	return prop;
+	return mem;
 }
 
-struct sysmem_property param_parse_common_resv_mem(void)
+struct memblock param_parse_common_resv_mem(void)
 {
-	struct sysmem_property prop;
+	struct memblock mem;
 
-	prop.name = "PSTORE/ATAGS/SHM";
-	prop.base = SDRAM_OFFSET(SZ_1M);
-	prop.size = SZ_1M;
+	mem.base = SDRAM_OFFSET(SZ_1M);
+	mem.size = SZ_1M;
 
-	return prop;
+	return mem;
 }
 
 int param_parse_bootdev(char **devtype, char **devnum)
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index fced26ff81..d2742fbad7 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -664,7 +664,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (size < 0)
 		return size;
 
-	if (!sysmem_alloc_base("fdt", (phys_addr_t)fdt_addr,
+	if (!sysmem_alloc_base(MEMBLK_ID_FDT, (phys_addr_t)fdt_addr,
 			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index b0e1e4cf6e..1ed20cbbfe 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <memblk.h>
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
@@ -23,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define NOT_INITIAL		-1
 static int __dram_init_banksize(int resv_tee)
 {
-	struct sysmem_property prop;
+	struct memblock prop;
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index bb2f416b78..c9ef71da45 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -65,7 +65,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto exit;
 	}
 
-	if (!sysmem_alloc_base("fastboot",
+	if (!sysmem_alloc_base(MEMBLK_ID_FASTBOOT,
 			       CONFIG_FASTBOOT_BUF_ADDR,
 			       CONFIG_FASTBOOT_BUF_SIZE)) {
 		printf("The fastboot memory space is unusable!\n");
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a5f59dc64f..2b0a5864e4 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -332,8 +332,6 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		printf("Booting kernel at %s with fdt at %s...\n\n\n",
 		       kernel_addr_r, fdt_addr);
 
-	sysmem_dump_check();
-
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;
@@ -813,7 +811,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 		if (sysmem_free((phys_addr_t)fdt_addr))
 			goto out;
 
-		if (!sysmem_alloc_base("fdt(dtbo)",
+		if (!sysmem_alloc_base(MEMBLK_ID_FDT_DTBO,
 				       (phys_addr_t)fdt_addr,
 					fdt_size + CONFIG_SYS_FDT_PAD))
 			goto out;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index ca8c2a42d3..9c2aedf03d 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -88,12 +88,10 @@ static void boot_lmb_init(bootm_headers_t *images)
  * return the image size on success, and a
  * negative value on error.
  */
-static int read_rockchip_image(struct blk_desc *dev_desc,
-			       disk_partition_t *part_info,
-			       void *dst)
+int read_rockchip_image(struct blk_desc *dev_desc,
+			disk_partition_t *part_info, void *dst)
 {
 	struct rockchip_image *img;
-	const char *name;
 	int header_len = 8;
 	int cnt;
 	int ret;
@@ -101,14 +99,6 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	u32 crc32;
 #endif
 
-	if (!strcmp((char *)part_info->name, "kernel"))
-		name = "kernel";
-	else if (!strcmp((char *)part_info->name, "boot") ||
-		 !strcmp((char *)part_info->name, "recovery"))
-		name = "ramdisk";
-	else
-		name = NULL;
-
 	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!img) {
 		printf("out of memory\n");
@@ -133,7 +123,9 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	 * total size  = image size + 8 bytes header + 4 bytes crc32
 	 */
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
-	if (!sysmem_alloc_base(name, (phys_addr_t)dst, cnt * dev_desc->blksz)) {
+	if (!sysmem_alloc_base_by_name((const char *)part_info->name,
+				       (phys_addr_t)dst,
+				       cnt * dev_desc->blksz)) {
 		ret = -ENXIO;
 		goto err;
 	}
@@ -524,7 +516,6 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 
 	fdt_ramdisk_skip_relocation();
-	sysmem_dump_check();
 
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
diff --git a/common/image-android.c b/common/image-android.c
index f37123efaa..64374b10e4 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -290,7 +290,7 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		size = hdr->kernel_size + hdr->page_size;
 		blk_start = part->start;
 		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);
-		if (!sysmem_alloc_base("kernel",
+		if (!sysmem_alloc_base(MEMBLK_ID_KERNEL,
 				       (phys_addr_t)android_load_address,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
@@ -311,7 +311,7 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
 		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
-		if (!sysmem_alloc_base("ramdisk",
+		if (!sysmem_alloc_base(MEMBLK_ID_RAMDISK,
 				       ramdisk_addr_r,
 				       blk_cnt * dev_desc->blksz))
 			return -ENXIO;
@@ -347,7 +347,7 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		       ALIGN(hdr->ramdisk_size, hdr->page_size);
 		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
-		if (!sysmem_alloc_base("fdt(AOSP)",
+		if (!sysmem_alloc_base(MEMBLK_ID_FDT_AOSP,
 				       fdt_addr_r,
 				       blk_cnt * dev_desc->blksz +
 				       CONFIG_SYS_FDT_PAD))
@@ -456,7 +456,7 @@ long android_image_load(struct blk_desc *dev_desc,
 			} else
 #endif
 			{
-				if (!sysmem_alloc_base("android",
+				if (!sysmem_alloc_base(MEMBLK_ID_ANDROID,
 						       (phys_addr_t)buf,
 							blk_cnt * part_info->blksz))
 					return -ENXIO;
diff --git a/common/image-fdt.c b/common/image-fdt.c
index c903d51443..6cabd2eeff 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -143,7 +143,6 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 	static int rsv_done;
 	char resvname[32];
 	const void *prop;
-	int ret;
 
 	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
 		return -EINVAL;
@@ -157,9 +156,8 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 		debug("   sysmem: reserving fdt memory region: addr=%llx size=%llx\n",
 		      (unsigned long long)addr, (unsigned long long)size);
 		sprintf(resvname, "fdt-memory-reserved%d", i);
-		ret = sysmem_reserve(resvname, addr, size);
-		if (ret)
-			return ret;
+		if (!sysmem_fdt_reserve_alloc_base(resvname, addr, size))
+			return -ENOMEM;
 	}
 
 	rsv_offset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory");
@@ -181,10 +179,9 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 		debug("  sysmem: 'reserved-memory' %s: addr=%llx size=%llx\n",
 		      fdt_get_name(fdt_blob, offset, NULL),
 		      (unsigned long long)rsv_addr, (unsigned long long)rsv_size);
-		ret = sysmem_reserve(fdt_get_name(fdt_blob, offset, NULL),
-				     rsv_addr, rsv_size);
-		if (ret)
-			return ret;
+		if (!sysmem_fdt_reserve_alloc_base(fdt_get_name(fdt_blob, offset, NULL),
+					           rsv_addr, rsv_size))
+			return -ENOMEM;
 	}
 
 	return 0;
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index e88375159f..795ad62901 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -29,6 +29,9 @@ enum _boot_mode {
 
 int rockchip_get_boot_mode(void);
 int boot_rockchip_image(struct blk_desc *dev, disk_partition_t *boot_part);
+int read_rockchip_image(struct blk_desc *dev_desc,
+			disk_partition_t *part_info, void *dst);
+
 struct blk_desc *rockchip_get_bootdev(void);
 
 /*
diff --git a/include/image.h b/include/image.h
index 8daffcceee..11c65292ba 100644
--- a/include/image.h
+++ b/include/image.h
@@ -693,6 +693,8 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob);
 #ifdef CONFIG_SYSMEM
 int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob);
+#else
+static inline int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob) { return 0; }
 #endif
 int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size);
 
diff --git a/include/sysmem.h b/include/sysmem.h
index 58de824968..0a5d807f82 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -6,12 +6,7 @@
 #ifndef _SYSMEM_H
 #define _SYSMEM_H
 
-#include <asm/types.h>
-
-#define	MAX_SYSMEM_REGIONS		64
-
-#undef	MAX_LMB_REGIONS
-#define	MAX_LMB_REGIONS			MAX_SYSMEM_REGIONS
+#include <memblk.h>
 
 /*
  * CONFIG_SYS_FDT_PAD default value is sync with bootm framework in:
@@ -21,96 +16,84 @@
 #define CONFIG_SYS_FDT_PAD		0x3000
 #endif
 
-struct sysmem_property {
-	const char *name;
-	phys_addr_t base;
-	phys_size_t size;
-	struct list_head node;
-};
-
 struct sysmem {
 	struct lmb lmb;
 	struct list_head allocated_head;
-	struct list_head reserved_head;
 	ulong allocated_cnt;
-	bool has_init;
+	bool has_initf;
+	bool has_initr;
 };
 
+#ifdef CONFIG_SYSMEM
 /**
- * sysmem_init() - Sysmem initialization
+ * sysmem_has_init() - Is sysmem initialized
  *
- * @return 0 on success, otherwise error
+ * @return true or false
  */
-int sysmem_init(void);
+bool sysmem_has_init(void);
 
 /**
- * sysmem_add() - Add sysmem region
- *
- * @base: region base address
- * @size: region size
+ * sysmem_init() - Sysmem initialization
  *
  * @return 0 on success, otherwise error
  */
-int sysmem_add(phys_addr_t base, phys_size_t size);
+int sysmem_init(void);
 
 /**
- * sysmem_reserve() - Reserve sysmem region
- *
- * @name: region name
- * @base: region base address
- * @size: region size
+ * sysmem_initr() - Sysmem initialization after relocation
  *
  * @return 0 on success, otherwise error
  */
-int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size);
+int sysmem_initr(void);
 
 /**
  * sysmem_alloc() - Alloc sysmem region at anywhere
  *
- * @name: region name
+ * @id: memblk id
  * @size: region size
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc(const char *name, phys_size_t size);
+void *sysmem_alloc(enum memblk_id id, phys_size_t size);
 
 /**
- * sysmem_alloc_align() - Alloc sysmem region at anywhere with addr align down
+ * sysmem_alloc_base() - Alloc sysmem region at the expect addr
  *
- * @name: region name
+ * @id: memblk id
+ * @base: region base
  * @size: region size
- * @align: region base address align (down)
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align);
+void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size);
 
 /**
- * sysmem_alloc_base() - Alloc sysmem region at the expect addr
+ * sysmem_alloc_base_by_name() - Alloc sysmem region at the expect addr by name
  *
- * @name: region name
+ * @name: memblk name
  * @base: region base
  * @size: region size
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size);
+void *sysmem_alloc_base_by_name(const char *name,
+				phys_addr_t base, phys_size_t size);
 
 /**
- * sysmem_alloc_align_base() - Alloc sysmem region at the expect addr with align down
+ * sysmem_fdt_reserve_alloc_base() - Alloc sysmem region at the expect addr by name,
+ *				     called only for reserve memory from fdt.
  *
- * @name: region name
+ * @name: memblk name
  * @base: region base
  * @size: region size
- * @align: region base address align (down)
  *
  * @return NULL on error, otherwise the allocated region address ptr
  */
-void *sysmem_alloc_align_base(const char *name, phys_addr_t base,
-			      phys_size_t size, ulong align);
+void *sysmem_fdt_reserve_alloc_base(const char *name,
+				    phys_addr_t base, phys_size_t size);
 
 /**
- * sysmem_free() - Free sysmem region
+ * sysmem_free() - Free allocated sysmem region
  *
  * @base: region base
  *
@@ -119,22 +102,10 @@ void *sysmem_alloc_align_base(const char *name, phys_addr_t base,
 int sysmem_free(phys_addr_t base);
 
 /**
- * sysmem_check() - Check sysmem regions
- *
- * @return 0 on okay, otherwise something wrong
- */
-int sysmem_check(void);
-
-/**
- * sysmem_dump_all() - Dump all sysmem stat
+ * sysmem_dump() - Dump all sysmem region state and check overflow
  */
 void sysmem_dump(void);
 
-/**
- * sysmem_dump_check() - Dump all sysmem stat and check overflow
- */
-int sysmem_dump_check(void);
-
 /**
  * board_sysmem_reserve() - Weak function for board to implement
  *
@@ -143,14 +114,29 @@ int sysmem_dump_check(void);
  * @return 0 on success, otherwise error
  */
 int board_sysmem_reserve(struct sysmem *sysmem);
-
-/**
- * arch_sysmem_reserve() - Weak function for arch to implement
- *
- * @sysmem: global sysmem point, ignored
- *
- * @return 0 on success, otherwise error
- */
-int arch_sysmem_reserve(struct sysmem *sysmem);
-
+#else
+static inline bool sysmem_has_init(void) { return false; }
+static inline int sysmem_init(void) { return 0; }
+static inline int sysmem_initr(void) { return 0; }
+static inline int sysmem_free(phys_addr_t base) { return 0; }
+static inline void sysmem_dump(void) {}
+__weak int board_sysmem_reserve(struct sysmem *sysmem) { return 0; }
+static inline void *sysmem_alloc_base(enum memblk_id id,
+				      phys_addr_t base, phys_size_t size)
+{
+	return (void *)base;
+}
+static inline void *sysmem_alloc_base_by_name(const char *name,
+					      phys_addr_t base,
+					      phys_size_t size)
+{
+	return (void *)base;
+}
+static inline void *sysmem_fdt_reserve_alloc_base(const char *name,
+						  phys_addr_t base,
+						  phys_size_t size)
+{
+	return (void *)base;
+}
+#endif /* CONFIG_SYSMEM */
 #endif /* _SYSMEM_H */
diff --git a/lib/sysmem.c b/lib/sysmem.c
index 2549de95f2..b050177af1 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -15,45 +15,38 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SYSMEM_ALLOC_ANYWHERE	0
 #define SYSMEM_ALLOC_NO_ALIGN	1
 
-#ifndef CONFIG_SYS_STACK_SIZE
-#define CONFIG_SYS_STACK_SIZE	SZ_2M
-#endif
-
-#define SIZE_MB(len)		((len) >> 20)
-#define SIZE_KB(len)		(((len) % (1 << 20)) >> 10)
-
 #define SYSMEM_I(fmt, args...)	printf("Sysmem: "fmt, ##args)
 #define SYSMEM_W(fmt, args...)	printf("Sysmem Warn: "fmt, ##args)
 #define SYSMEM_E(fmt, args...)	printf("Sysmem Error: "fmt, ##args)
 #define SYSMEM_D(fmt, args...)	 debug("Sysmem Debug: "fmt, ##args)
 
-static struct sysmem plat_sysmem;	/* Global for platform */
-
-struct sysmem_check {
+struct memcheck {
 	uint32_t magic;
 };
 
-static int sysmem_has_init(void)
-{
-	if (!plat_sysmem.has_init) {
-		SYSMEM_E("Framework is not initialized\n");
-		return 0;
-	}
+/* Global for platform, must in data section */
+struct sysmem plat_sysmem __section(".data") = {
+	.has_initf = false,
+	.has_initr = false,
+};
 
-	return 1;
+bool sysmem_has_init(void)
+{
+	return gd->flags & GD_FLG_RELOC ?
+	       plat_sysmem.has_initr : plat_sysmem.has_initf;
 }
 
 void sysmem_dump(void)
 {
-#ifdef DEBUG
 	struct sysmem *sysmem = &plat_sysmem;
 	struct lmb *lmb = &sysmem->lmb;
-	struct sysmem_property *prop;
-	struct sysmem_check *check;
+	struct memblock *mem;
+	struct memcheck *check;
 	struct list_head *node;
 	ulong memory_size = 0;
 	ulong reserved_size = 0;
 	ulong allocated_size = 0;
+	bool overflow = false;
 	ulong i;
 
 	if (!sysmem_has_init())
@@ -62,12 +55,13 @@ void sysmem_dump(void)
 	printf("\nsysmem_dump_all:\n");
 
 	/* Memory pool */
-	printf("    ------------------------------------------------------\n");
+	printf("    --------------------------------------------------------------------\n");
 	for (i = 0; i < lmb->memory.cnt; i++) {
 		memory_size += lmb->memory.region[i].size;
-		printf("    memory.rgn[%ld].base     = 0x%08lx\n", i,
-		       (ulong)lmb->memory.region[i].base);
-		printf("		 .size     = 0x%08lx\n",
+		printf("    memory.rgn[%ld].addr     = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->memory.region[i].base,
+		       (ulong)lmb->memory.region[i].base +
+		       (ulong)lmb->memory.region[i].size,
 		       (ulong)lmb->memory.region[i].size);
 	}
 	printf("\n    memory.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
@@ -75,54 +69,48 @@ void sysmem_dump(void)
 	       SIZE_MB((ulong)memory_size),
 	       SIZE_KB((ulong)memory_size));
 
-	/* Reserved */
-	i = 0;
-	printf("    ------------------------------------------------------\n");
-	list_for_each(node, &sysmem->reserved_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		reserved_size += prop->size;
-		printf("    reserved.rgn[%ld].name   = \"%s\"\n", i, prop->name);
-		printf("		   .base   = 0x%08lx\n",
-		       (ulong)prop->base);
-		printf("		   .size   = 0x%08lx\n",
-		       (ulong)prop->size);
-		i++;
-	}
-	printf("\n    reserved.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
-	       (ulong)reserved_size,
-	       SIZE_MB((ulong)reserved_size),
-	       SIZE_KB((ulong)reserved_size));
-
 	/* Allocated */
 	i = 0;
-	printf("    ------------------------------------------------------\n");
+	printf("    --------------------------------------------------------------------\n");
 	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		allocated_size += prop->size;
-		check = (struct sysmem_check *)
-				(prop->base + prop->size - sizeof(*check));
-		printf("    allocated.rgn[%ld].name  = \"%s\"%s\n",
-		       i, prop->name,
-		       check->magic != SYSMEM_MAGIC ? "	(Overflow)" : "");
-		printf("		    .base  = 0x%08lx\n",
-		       (ulong)prop->base);
-		printf("		    .size  = 0x%08lx\n",
-		       (ulong)prop->size);
+		mem = list_entry(node, struct memblock, node);
+		allocated_size += mem->size;
+		if (mem->attr.flags & M_ATTR_OFC) {
+			check = (struct memcheck *)
+				(mem->base + mem->size - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else if (mem->attr.flags & M_ATTR_HOFC) {
+			check = (struct memcheck *)
+				(mem->base - sizeof(*check));
+			overflow = (check->magic != SYSMEM_MAGIC);
+		} else {
+			overflow = false;
+		}
+
+		printf("    allocated.rgn[%ld].name  = \"%s\" %s\n",
+		       i, mem->attr.name, overflow ? "	   <Overflow!>" : "");
+		printf("		    .addr  = 0x%08lx - 0x%08lx (size: 0x%08lx)\n",
+		       (ulong)mem->base, (ulong)(mem->base + mem->size),
+		       (ulong)mem->size);
 		i++;
 	}
+
+	printf("\n    malloc_r: %d MiB, malloc_f: %d KiB\n",
+	       SIZE_MB(CONFIG_SYS_MALLOC_LEN), SIZE_KB(CONFIG_SYS_MALLOC_F_LEN));
 	printf("\n    allocated.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
 	       (ulong)allocated_size,
 	       SIZE_MB((ulong)allocated_size),
 	       SIZE_KB((ulong)allocated_size));
 
 	/* LMB core reserved */
-	printf("    ------------------------------------------------------\n");
+	printf("    --------------------------------------------------------------------\n");
 	reserved_size = 0;
 	for (i = 0; i < lmb->reserved.cnt; i++) {
 		reserved_size += lmb->reserved.region[i].size;
-		printf("    LMB.reserved[%ld].base   = 0x%08lx\n", i,
-		       (ulong)lmb->reserved.region[i].base);
-		printf("		   .size   = 0x%08lx\n",
+		printf("    LMB.reserved[%ld].addr   = 0x%08lx - 0x%08lx (size: 0x%08lx)\n", i,
+		       (ulong)lmb->reserved.region[i].base,
+		       (ulong)lmb->reserved.region[i].base +
+		       (ulong)lmb->reserved.region[i].size,
 		       (ulong)lmb->reserved.region[i].size);
 	}
 
@@ -130,167 +118,159 @@ void sysmem_dump(void)
 	       (ulong)reserved_size,
 	       SIZE_MB((ulong)reserved_size),
 	       SIZE_KB((ulong)reserved_size));
-	printf("    ------------------------------------------------------\n\n");
-#endif
-}
-
-int sysmem_check(void)
-{
-	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
-	struct sysmem_check *check;
-	struct list_head *node;
-	int ret = 0;
-
-	if (!sysmem_has_init())
-		return -ENOSYS;
-
-	/* Check allocated */
-	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		check = (struct sysmem_check *)
-				(prop->base + prop->size - sizeof(*check));
-		if (check->magic != SYSMEM_MAGIC) {
-			ret = -EOVERFLOW;
-			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) is Overflow!\n",
-				 prop->name, (ulong)prop->base, (ulong)prop->size);
-		}
-	}
-
-	/* Check stack */
-	check = (struct sysmem_check *)(gd->start_addr_sp - CONFIG_SYS_STACK_SIZE);
-	if (check->magic != SYSMEM_MAGIC) {
-		ret = -EOVERFLOW;
-		SYSMEM_E("Runtime stack is Overflow!\n");
-	}
-
-	return ret;
-}
-
-int sysmem_dump_check(void)
-{
-	sysmem_dump();
-
-	return sysmem_check();
+	printf("    --------------------------------------------------------------------\n\n");
 }
 
-static int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
-			     phys_addr_t base2, phys_size_t size2)
+static inline int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
+				    phys_addr_t base2, phys_size_t size2)
 {
 	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
 }
 
-int sysmem_add(phys_addr_t base, phys_size_t size)
+static int sysmem_add(phys_addr_t base, phys_size_t size)
 {
 	struct sysmem *sysmem = &plat_sysmem;
 	int ret;
 
-	if (!sysmem_has_init())
-		return -ENOSYS;
+	if (!size)
+		return -EINVAL;
 
 	ret = lmb_add(&sysmem->lmb, base, size);
 	if (ret < 0)
-		SYSMEM_E("Failed to add sysmem at 0x%lx for 0x%lx size\n",
+		SYSMEM_E("Failed to add sysmem at 0x%08lx for 0x%08lx size\n",
 			 (ulong)base, (ulong)size);
 
 	return (ret >= 0) ? 0 : ret;
 }
 
-int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size)
+static const char *sysmem_alias2name(const char *name, int *id)
 {
-	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
-	struct list_head *node;
-	int ret = 0;
-
-	if (!sysmem_has_init())
-		return -ENOSYS;
+	const char *alias;
+	int n, i, j;
+	int match = 0;
+
+	for (i = 0; i < MEMBLK_ID_MAX; i++) {
+		/* Pirmary name */
+		if (mem_attr[i].name && !strcasecmp(mem_attr[i].name, name)) {
+			match = 1;
+			goto finish;
+		}
 
-	if (!name) {
-		SYSMEM_E("NULL name for reserved sysmem\n");
-		return -EINVAL;
-	}
+		/* Alias name */
+		alias = mem_attr[i].alias[0];
+		if (!alias)
+			continue;
 
-	/* Check overlap */
-	list_for_each(node, &sysmem->reserved_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		if (!strcmp(prop->name, name)) {
-			SYSMEM_E("Failed to double reserve for existence \"%s\"\n", name);
-			return -EEXIST;
-		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
-			SYSMEM_D("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
-				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
-				 name, (ulong)base, (ulong)size, prop->name,
-				 (ulong)prop->base, (ulong)prop->size);
+		n = ARRAY_SIZE(mem_attr[i].alias);
+		for (j = 0; j < n; j++, alias++) {
+			if (alias && !strcasecmp(alias, name)) {
+				match = 1;
+				goto finish;
+			}
 		}
 	}
 
-	ret = lmb_reserve(&sysmem->lmb, base, size);
-	if (ret >= 0) {
-		prop = malloc(sizeof(*prop));
-		if (!prop) {
-			SYSMEM_E("No memory for \"%s\" reserve sysmem\n", name);
-			return -ENOMEM;
-		}
-
-		prop->name = name;
-		prop->base = base;
-		prop->size = size;
-		list_add_tail(&prop->node, &sysmem->reserved_head);
-	} else {
-		SYSMEM_E("Failed to reserve \"%s\" at 0x%lx\n", name, (ulong)base);
-		return -EINVAL;
+finish:
+	if (match) {
+		*id = i;
+		return mem_attr[i].name;
 	}
 
-	return 0;
+	return name;
 }
 
-void *sysmem_alloc_align_base(const char *name,
-			      phys_addr_t base,
-			      phys_size_t size,
-			      ulong align)
+static void *sysmem_alloc_align_base(enum memblk_id id,
+				     const char *mem_name,
+				     phys_addr_t base,
+				     phys_size_t size,
+				     ulong align)
 {
 	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
-	struct sysmem_check *check;
+	struct memblk_attr attr;
+	struct memblock *mem;
+	struct memcheck *check;
 	struct list_head *node;
+	const char *name;
 	phys_addr_t paddr;
 	phys_addr_t alloc_base;
 	phys_size_t alloc_size;
+	bool req_overlap = false;
 
 	if (!sysmem_has_init())
 		return NULL;
 
-	if (!name) {
-		SYSMEM_E("NULL name for alloc sysmem\n");
+	if (id == MEMBLK_ID_BY_NAME || id == MEMBLK_ID_FDT_RESV) {
+		if (!mem_name) {
+			SYSMEM_E("NULL name for alloc sysmem\n");
+			return NULL;
+		} else if (id == MEMBLK_ID_FDT_RESV) {
+			req_overlap = true;
+			if (base >= gd->ram_top)
+				return (void *)base;
+		}
+		name = sysmem_alias2name(mem_name, (int *)&id);
+		attr = mem_attr[id];
+	} else if (id > MEMBLK_ID_UNK && id < MEMBLK_ID_MAX) {
+		attr = mem_attr[id];
+		name = attr.name;
+	} else {
+		SYSMEM_E("Unsupport memblk id %d for alloc sysmem\n", id);
+		return NULL;
+	}
+
+	if (!size) {
+		SYSMEM_E("\"%s\" size is 0 for alloc sysmem\n", name);
 		return NULL;
 	}
 
 	if (!IS_ALIGNED(base, 4)) {
-		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n", name, (ulong)base);
+		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n",
+			 name, (ulong)base);
 		return NULL;
 	}
 
 	/* Must be 4-byte aligned */
 	size = ALIGN(size, 4);
 
+	SYSMEM_D("Enter alloc: \"%s\" 0x%08lx - 0x%08lx\n",
+		 name, (ulong)base, (ulong)(base + size));
+
 	/* Already allocated ? */
 	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		if (!strcmp(prop->name, name)) {
+		mem = list_entry(node, struct memblock, node);
+		SYSMEM_D("Has allcated: %s, 0x%08lx - 0x%08lx\n",
+			 mem->attr.name, (ulong)mem->base,
+			 (ulong)(mem->base + mem->size));
+		if (!strcmp(mem->attr.name, name)) {
 			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
 			return NULL;
-		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
-			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) alloc is "
-				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
-				 name, (ulong)base, (ulong)size,
-				 prop->name, (ulong)prop->base,
-				 (ulong)prop->size);
+		} else if (sysmem_is_overlap(mem->base, mem->size, base, size)) {
+			if (req_overlap && mem->attr.flags & M_ATTR_OVERLAP) {
+				if (lmb_reserve(&sysmem->lmb, base, size))
+					SYSMEM_E("Failed to overlap alloc \"%s\" "
+						 "at 0x%08lx - 0x%08lx\n",
+						 name, (ulong)base,
+						 (ulong)(base + size));
+				return (void *)base;
+			}
+
+			SYSMEM_E("\"%s\" (0x%08lx - 0x%08lx) alloc is "
+				 "overlap with existence \"%s\" (0x%08lx - "
+				 "0x%08lx)\n",
+				 name, (ulong)base, (ulong)(base + size),
+				 mem->attr.name, (ulong)mem->base,
+				 (ulong)(mem->base + mem->size));
 			return NULL;
 		}
 	}
 
-	alloc_size = size + sizeof(*check);
+	/* Add overflow check magic ? */
+	if (attr.flags & M_ATTR_OFC)
+		alloc_size = size + sizeof(*check);
+	else
+		alloc_size = size;
+
+	/* Alloc anywhere ? */
 	if (base == SYSMEM_ALLOC_ANYWHERE)
 		alloc_base = base;
 	else
@@ -298,127 +278,170 @@ void *sysmem_alloc_align_base(const char *name,
 
 	paddr = lmb_alloc_base(&sysmem->lmb, alloc_size, align, alloc_base);
 	if (paddr) {
-		if  ((paddr == base) || (base == SYSMEM_ALLOC_ANYWHERE)) {
-			prop = malloc(sizeof(*prop));
-			if (!prop) {
+		if ((paddr == base) || (base == SYSMEM_ALLOC_ANYWHERE)) {
+			mem = malloc(sizeof(*mem));
+			if (!mem) {
 				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
 				return NULL;
 			}
 
-			prop->name = name;
-			prop->base = paddr;
-			prop->size = alloc_size;
+			mem->base = paddr;
+			mem->size = alloc_size;
+			mem->attr = attr;
 			sysmem->allocated_cnt++;
-
-			check = (struct sysmem_check *)(paddr + size);
-			check->magic = SYSMEM_MAGIC;
-
-			list_add_tail(&prop->node, &sysmem->allocated_head);
+			list_add_tail(&mem->node, &sysmem->allocated_head);
+
+			if (mem->attr.flags & M_ATTR_OFC) {
+				check = (struct memcheck *)(paddr + size);
+				check->magic = SYSMEM_MAGIC;
+			} else if (mem->attr.flags & M_ATTR_HOFC) {
+				check = (struct memcheck *)(paddr - sizeof(*check));
+				check->magic = SYSMEM_MAGIC;
+			}
 		} else {
-			SYSMEM_E("Failed to alloc \"%s\" at expect 0x%lx but "
-				 "alloc at 0x%lx\n",
-				 name, (ulong)base, (ulong)paddr);
+			SYSMEM_E("Failed to alloc \"%s\" expect at 0x%08lx - 0x%08lx "
+				 "but at 0x%08lx - x%08lx\n",
+				 name, (ulong)base, (ulong)(base + size),
+				 (ulong)paddr, (ulong)(paddr + size));
+			if (lmb_free(&sysmem->lmb, paddr, alloc_size))
+				SYSMEM_E("Failed to free \"%s\"\n", name);
+
 			return NULL;
 		}
 	} else {
-		SYSMEM_E("Failed to alloc \"%s\" at 0x%lx\n", name, (ulong)base);
+		SYSMEM_E("Failed to alloc \"%s\" at 0x%08lx - 0x%08lx\n",
+			 name, (ulong)base, (ulong)(base + size));
 	}
 
-	SYSMEM_D("Alloc: \"%s\", paddr=0x%lx, size=0x%lx, align=0x%x, anywhere=%d\n",
+	SYSMEM_D("Exit alloc: \"%s\", paddr=0x%08lx, size=0x%08lx, align=0x%x, anywhere=%d\n",
 		 name, (ulong)paddr, (ulong)size, (u32)align, !base);
 
 	return (void *)paddr;
 }
 
-void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align)
+void *sysmem_alloc_base(enum memblk_id id, phys_addr_t base, phys_size_t size)
 {
-	return sysmem_alloc_align_base(name,
-				       SYSMEM_ALLOC_ANYWHERE,
-				       size,
-				       align);
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(id,
+					NULL,
+					base,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
 }
 
-void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size)
+void *sysmem_alloc_base_by_name(const char *name,
+				phys_addr_t base, phys_size_t size)
 {
-	return sysmem_alloc_align_base(name,
-				       base,
-				       size,
-				       SYSMEM_ALLOC_NO_ALIGN);
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(MEMBLK_ID_BY_NAME,
+					name,
+					base,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
 }
 
-void *sysmem_alloc(const char *name, phys_size_t size)
+void *sysmem_fdt_reserve_alloc_base(const char *name,
+				    phys_addr_t base, phys_size_t size)
 {
-	return sysmem_alloc_align_base(name,
-				       SYSMEM_ALLOC_ANYWHERE,
-				       size,
-				       SYSMEM_ALLOC_NO_ALIGN);
+	void *paddr;
+
+	paddr = sysmem_alloc_align_base(MEMBLK_ID_FDT_RESV,
+					name,
+					base,
+					size,
+					SYSMEM_ALLOC_NO_ALIGN);
+	if (!paddr)
+		sysmem_dump();
+
+	return paddr;
 }
 
 int sysmem_free(phys_addr_t base)
 {
 	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_property *prop;
+	struct memblock *mem;
 	struct list_head *node;
-	int found = 0;
-	int ret;
+	int ret, found = 0;
 
 	if (!sysmem_has_init())
 		return -ENOSYS;
 
 	/* Find existence */
 	list_for_each(node, &sysmem->allocated_head) {
-		prop = list_entry(node, struct sysmem_property, node);
-		if (prop->base == base) {
+		mem = list_entry(node, struct memblock, node);
+		if (mem->base == base) {
 			found = 1;
 			break;
 		}
 	}
 
 	if (!found) {
-		SYSMEM_E("Failed to free no allocated sysmem at 0x%lx\n", (ulong)base);
+		SYSMEM_E("Failed to free no allocated sysmem at 0x%08lx\n",
+			 (ulong)base);
 		return -EINVAL;
 	}
 
-	ret = lmb_free(&sysmem->lmb, prop->base, prop->size);
+	ret = lmb_free(&sysmem->lmb, mem->base, mem->size);
 	if (ret >= 0) {
-		SYSMEM_D("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
-			 prop->name, (ulong)prop->base, (ulong)prop->size);
+		SYSMEM_D("Free: \"%s\" 0x%08lx - 0x%08lx\n",
+			 mem->attr.name, (ulong)mem->base,
+			 (ulong)(mem->base + mem->size));
 		sysmem->allocated_cnt--;
-		list_del(&prop->node);
-		free(prop);
+		list_del(&mem->node);
+		free(mem);
 	} else {
-		SYSMEM_E("Failed to free \"%s\" at 0x%lx\n", prop->name, (ulong)base);
+		SYSMEM_E("Failed to free \"%s\" at 0x%08lx\n",
+			 mem->attr.name, (ulong)base);
 	}
 
 	return (ret >= 0) ? 0 : ret;
 }
 
+int sysmem_initr(void)
+{
+	return sysmem_init();
+}
+
 int sysmem_init(void)
 {
 	struct sysmem *sysmem = &plat_sysmem;
-	struct sysmem_check *check;
 	phys_addr_t mem_start;
 	phys_size_t mem_size;
 	int ret;
 
-	SYSMEM_I("init\n");
-
 	lmb_init(&sysmem->lmb);
 	INIT_LIST_HEAD(&sysmem->allocated_head);
-	INIT_LIST_HEAD(&sysmem->reserved_head);
 	sysmem->allocated_cnt = 0;
-	sysmem->has_init = true;
+	if (gd->flags & GD_FLG_RELOC) {
+		sysmem->has_initr = true;
+	} else {
+		SYSMEM_I("init\n");
+		sysmem->has_initf = true;
+	}
 
 	/* Add all available system memory */
 #ifdef CONFIG_NR_DRAM_BANKS
 	int i;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		if (!gd->bd->bi_dram[i].size)
+			continue;
+
 		ret = sysmem_add(gd->bd->bi_dram[i].start,
 				 gd->bd->bi_dram[i].size);
 		if (ret) {
 			SYSMEM_E("Failed to add sysmem from bi_dram[%d]\n", i);
-			return ret;
+			goto fail;
 		}
 	}
 #else
@@ -427,39 +450,44 @@ int sysmem_init(void)
 	ret = sysmem_add(mem_start, mem_size);
 	if (ret) {
 		SYSMEM_E("Failed to add sysmem from bootm_low/size\n");
-		return ret;
+		goto fail;
 	}
 #endif
-
-	/* Reserved for arch */
-	ret = arch_sysmem_reserve(sysmem);
-	if (ret) {
-		SYSMEM_E("Failed to reserve sysmem for arch\n");
-		return ret;
-	}
-
 	/* Reserved for board */
 	ret = board_sysmem_reserve(sysmem);
 	if (ret) {
 		SYSMEM_E("Failed to reserve sysmem for board\n");
-		return ret;
+		goto fail;
 	}
 
-	/* Reserved for U-boot framework 'reserve_xxx()' */
-	mem_start = gd->start_addr_sp - CONFIG_SYS_STACK_SIZE;
+	/* Reserved for U-boot framework: 'reserve_xxx()' */
+	mem_start = gd->start_addr_sp;
 	mem_size = gd->ram_top - mem_start;
-	check = (struct sysmem_check *)mem_start;
-	check->magic = SYSMEM_MAGIC;
-
-	ret = sysmem_reserve("U-Boot", mem_start, mem_size);
-	if (ret) {
+	if (!sysmem_alloc_base(MEMBLK_ID_UBOOT, mem_start, mem_size)) {
 		SYSMEM_E("Failed to reserve sysmem for U-Boot framework\n");
-		return ret;
+		ret = -ENOMEM;
+		goto fail;
 	}
 
-	sysmem_dump();
+	/* Reserved for U-Boot stack */
+	mem_start = gd->start_addr_sp - CONFIG_SYS_STACK_SIZE;
+	mem_size = CONFIG_SYS_STACK_SIZE;
+	if (!sysmem_alloc_base(MEMBLK_ID_STACK, mem_start, mem_size)) {
+		SYSMEM_E("Failed to reserve sysmem for stack\n");
+		ret = -ENOMEM;
+		goto fail;
+	}
 
 	return 0;
+
+fail:
+	if (ret && !(gd->flags & GD_FLG_RELOC)) {
+		sysmem_dump();
+		SYSMEM_W("Maybe malloc size %d MiB is too large?\n\n",
+			 SIZE_MB(CONFIG_SYS_MALLOC_LEN));
+	}
+
+	return ret;
 }
 
 __weak int board_sysmem_reserve(struct sysmem *sysmem)
@@ -468,8 +496,15 @@ __weak int board_sysmem_reserve(struct sysmem *sysmem)
 	return 0;
 }
 
-__weak int arch_sysmem_reserve(struct sysmem *sysmem)
+static int do_dump_sysmem(cmd_tbl_t *cmdtp, int flag,
+			  int argc, char *const argv[])
 {
-	/* please define platform specific arch_sysmem_reserve() */
+	sysmem_dump();
 	return 0;
 }
+
+U_BOOT_CMD(
+	dump_sysmem, 1, 1, do_dump_sysmem,
+	"Dump sysmem layout",
+	""
+);

commit 88bfa9796376b6f53662a19d128931208d68d4cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:22:19 2019 +0800

    include: add memblk.h
    
    Provide generic id and struct for memory blocks.
    
    Change-Id: I1fe00dfdb8ee8209eca55c8e7ebbedcafa0371a1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/memblk.h b/include/memblk.h
new file mode 100644
index 0000000000..bba5de000e
--- /dev/null
+++ b/include/memblk.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _MEMBLK_H
+#define _MEMBLK_H
+
+enum memblk_id {
+	MEMBLK_ID_UNK,
+
+	/* Preloader */
+	MEMBLK_ID_ATF,
+	MEMBLK_ID_OPTEE,
+	MEMBLK_ID_SHM,
+
+	/* U-Boot self */
+	MEMBLK_ID_UBOOT,
+	MEMBLK_ID_STACK,
+	MEMBLK_ID_FASTBOOT,
+
+	/* Image */
+	MEMBLK_ID_RAMDISK,
+	MEMBLK_ID_FDT,
+	MEMBLK_ID_FDT_DTBO,
+	MEMBLK_ID_FDT_AOSP,
+	MEMBLK_ID_KERNEL,
+	MEMBLK_ID_ANDROID,
+
+	/* Other */
+	MEMBLK_ID_BY_NAME,
+	MEMBLK_ID_FDT_RESV,
+	MEMBLK_ID_DEMO,
+	MEMBLK_ID_MAX,
+};
+
+struct memblk_attr {
+	const char *name;
+	const char *alias[2];
+	u32 flags;
+};
+
+struct memblock {
+	phys_addr_t base;
+	phys_size_t size;
+	struct memblk_attr attr;
+	struct list_head node;
+};
+
+extern const struct memblk_attr *mem_attr;
+
+#define SIZE_MB(len)		((len) >> 20)
+#define SIZE_KB(len)		(((len) % (1 << 20)) >> 10)
+
+#define M_ATTR_NONE		0
+/* Over-Flow-Check for region tail */
+#define M_ATTR_OFC		(1 << 0)
+/* Over-Flow-Check for region Head, only for U-Boot stack */
+#define M_ATTR_HOFC		(1 << 1)
+/* Memory can be overlap by fdt reserved memory */
+#define M_ATTR_OVERLAP		(1 << 2)
+
+#endif /* _MEMBLK_H */

commit a7774f5911624928ed1d9cfed5453aab206c512e
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Sep 6 17:35:16 2018 +0800

    common: boot_rkimg: set "androidboot.mode=" as "normal" or "charger"
    
    - The legacy setting rule is deprecated(Android SDK < 8.1).
    - Provide CONFIG_RKIMG_ANDROID_BOOTMODE_LEGACY to enable legacy setting.
    
    Change-Id: I5c8b442b02df068a0ab98ccc81a4f008ebe540c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 11402c8b42..36ec749a04 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -537,6 +537,14 @@ config RKIMG_BOOTLOADER
 	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
 	  like SN and MAC address.
 
+config RKIMG_ANDROID_BOOTMODE_LEGACY
+	bool "Support set androidboot.mode with legacy rule"
+	depends on RKIMG_BOOTLOADER
+	default n
+	help
+	  Rockchip set "androidboot.mode=" as "charger" or boot media for android,
+	  which is a rockchip private solution(SDK < 8.1) and deprecated.
+
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
 	depends on RKIMG_BOOTLOADER
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index dc7f1a06b6..ca8c2a42d3 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -208,10 +208,21 @@ int get_bootdev_type(void)
 
 	if (!appended && boot_media) {
 		appended = 1;
-		/*
-		 * 1. androidboot.mode=charger has higher priority, not override;
-		 * 2. rknand doesn't need "androidboot.mode=";
-		 */
+
+	/*
+	 * The legacy rockchip Android (SDK < 8.1) requires "androidboot.mode="
+	 * to be "charger" or boot media which is a rockchip private solution.
+	 *
+	 * The official Android rule (SDK >= 8.1) is:
+	 * "androidboot.mode=normal" or "androidboot.mode=charger".
+	 *
+	 * Now that this U-Boot is usually working with higher version
+	 * Android (SDK >= 8.1), we follow the official rules.
+	 *
+	 * Common: androidboot.mode=charger has higher priority, don't override;
+	 */
+#ifdef CONFIG_RKIMG_ANDROID_BOOTMODE_LEGACY
+		/* rknand doesn't need "androidboot.mode="; */
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
 		    (type == IF_TYPE_RKNAND) ||
 		    (type == IF_TYPE_SPINAND) ||
@@ -222,6 +233,15 @@ int get_bootdev_type(void)
 			snprintf(boot_options, sizeof(boot_options),
 				 "storagemedia=%s androidboot.mode=%s",
 				 boot_media, boot_media);
+#else
+		if (env_exist("bootargs", "androidboot.mode=charger"))
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s", boot_media);
+		else
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s androidboot.mode=normal",
+				 boot_media);
+#endif
 		env_update("bootargs", boot_options);
 	}
 

commit e95ee152a4ba4e58e479600ba3c2d430af164a33
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:29:13 2019 +0800

    common: image-fdt: only care about enabled reserved-memory
    
    Change-Id: I2c17cb1a8237e709cf8a528b35be2dcea70d4627
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 6bdbe6c902..c903d51443 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -88,6 +88,7 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 	fdt_addr_t rsv_addr;
 	/* we needn't repeat do reserve, do_bootm_linux would call this again */
 	static int rsv_done;
+	const void *prop;
 
 	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
 		return;
@@ -110,6 +111,10 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
 	     offset >= 0;
 	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		prop = fdt_getprop(fdt_blob, offset, "status", NULL);
+		if (prop && !strcmp(prop, "disabled"))
+			continue;
+
 		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
 							      "reg", 0,
 							      &rsv_size, false);
@@ -137,6 +142,7 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 	fdt_addr_t rsv_addr;
 	static int rsv_done;
 	char resvname[32];
+	const void *prop;
 	int ret;
 
 	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
@@ -163,6 +169,10 @@ int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
 	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
 	     offset >= 0;
 	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		prop = fdt_getprop(fdt_blob, offset, "status", NULL);
+		if (prop && !strcmp(prop, "disabled"))
+			continue;
+
 		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
 							      "reg", 0,
 							      &rsv_size, false);

commit a78c73bb661fb82d665f69745fc5b80d5c32b57f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 18:20:51 2019 +0800

    include: lmb: increase MAX_LMB_REGIONS to 16
    
    Maybe 8 is not enough.
    
    Change-Id: Idc4813fa406def5401fdf423cdf30d47555d1a92
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/lmb.h b/include/lmb.h
index 6b6959fd86..ece2a54e5b 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -11,7 +11,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#define MAX_LMB_REGIONS 8
+#define MAX_LMB_REGIONS 16
 
 struct lmb_property {
 	phys_addr_t base;

commit e5f393836beb9bad70af6cfe5d1549c9d1e4f74f
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Mar 6 14:38:42 2019 +0800

    driver: ram: rv1108: use common code to setup ddr parameter
    
    use rockchip_setup_ddr_param to setup ddr parameter.
    The dram_init() and dram_init_banksize() make use of
    sdram common code.
    
    Change-Id: Icfc6cbef9fcc128e3a835184b46b89b9b22aab16
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 86bfdea237..e88f27f5d9 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -57,24 +57,3 @@ void board_debug_uart_init(void)
 #endif
 #endif /*CONFIG_SPL_BUILD*/
 }
-
-int dram_init(void)
-{
-	struct rv1108_grf *grf = (void *)GRF_BASE;
-
-	gd->ram_size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)(gd->ram_size +
-			      CONFIG_SYS_SDRAM_BASE), gd->ram_top);
-
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
-
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index dc77050846..c605c33a13 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -2,6 +2,8 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
@@ -16,6 +18,7 @@ CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
+CONFIG_PANIC_HANG=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
@@ -35,11 +38,12 @@ CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index fa2b99d24c..db46f5680f 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RV1108) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3308) = rockchip_sdram.o
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
diff --git a/drivers/ram/rockchip/rockchip_sdram.c b/drivers/ram/rockchip/rockchip_sdram.c
index 78e15eb142..437e675e30 100644
--- a/drivers/ram/rockchip/rockchip_sdram.c
+++ b/drivers/ram/rockchip/rockchip_sdram.c
@@ -9,6 +9,7 @@
 #include <syscon.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/grf_px30.h>
+#include <asm/arch/grf_rv1108.h>
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/grf_rk3308.h>
@@ -28,7 +29,13 @@ static int dmc_probe(struct udevice *dev)
 	struct dram_info *priv = dev_get_priv(dev);
 
 	if (!(gd->flags & GD_FLG_RELOC)) {
-#if defined(CONFIG_ROCKCHIP_RK3036)
+#if defined(CONFIG_ROCKCHIP_RV1108)
+		struct rv1108_grf *grf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+#elif defined(CONFIG_ROCKCHIP_RK3036)
 		struct rk3036_grf *grf =
 			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
@@ -81,7 +88,9 @@ static struct ram_ops dmc_ops = {
 };
 
 static const struct udevice_id dmc_ids[] = {
-#if defined(CONFIG_ROCKCHIP_RK3036)
+#if defined(CONFIG_ROCKCHIP_RV1108)
+	{ .compatible = "rockchip,rv1108-dmc" },
+#elif defined(CONFIG_ROCKCHIP_RK3036)
 	{ .compatible = "rockchip,rk3036-dmc" },
 #elif defined(CONFIG_ROCKCHIP_RK3308)
 	{ .compatible = "rockchip,rk3308-dmc" },
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
index d8851adf79..696e24838c 100644
--- a/drivers/ram/rockchip/sdram_rv1108.c
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -112,9 +112,21 @@ void *get_base_addr(unsigned int *reg, unsigned int offset)
 	return (void *)p;
 }
 
+void get_ddr_param(struct dram_info *sdram_priv,
+		   struct ddr_param *ddr_param)
+{
+	size_t ram_size =
+		rockchip_sdram_size((phys_addr_t)&sdram_priv->grf->os_reg2);
+
+	ddr_param->count = 1;
+	ddr_param->para[0] = CONFIG_SYS_SDRAM_BASE;
+	ddr_param->para[1] = ram_size;
+}
+
 int sdram_init(void)
 {
 	int ret;
+	struct ddr_param ddr_param;
 	struct dram_info *sdram_priv = &info;
 	struct driver_info *info =
 		ll_entry_start(struct driver_info, driver_info);
@@ -136,5 +148,8 @@ int sdram_init(void)
 	if (ret)
 		debug("rv1108_sdram_init() fail!");
 
+	get_ddr_param(sdram_priv, &ddr_param);
+	rockchip_setup_ddr_param(&ddr_param);
+
 	return ret;
 }
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 44cd4e3f6f..0463f236b8 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -22,7 +22,7 @@
 /* SPL support */
 #define CONFIG_SPL_STACK		0x10080700
 #define CONFIG_SPL_TEXT_BASE		0x10080800
-#define CONFIG_SPL_MAX_SIZE		0x1700
+#define CONFIG_SPL_MAX_SIZE		0x4000
 
 /* BSS setup */
 #define CONFIG_SPL_BSS_MAX_SIZE		0x100

commit 4cd861d04babddfd85cfe4f082aa568ff97f38e7
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Mar 6 14:28:59 2019 +0800

    arm64: dts: rockchip: rv1108: add u-boot,dm-pre-reloc
    
    The uart, dmc and grf device add "u-boot,dm-pre-reloc".
    Before relocated, u-boot will analyse dram capacity which
    is need the device of "u-boot,dm-pre-reloc" attribute.
    
    Change-Id: I1d18b564b0c521b176a2293a03403139034ccc0b
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index d63e0cf1df..db5aebb6d5 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rv1108.dtsi"
+#include "rv1108-u-boot.dtsi"
 #include "rv1108-sdram-ddr3-400.dtsi"
 #include <dt-bindings/input/input.h>
 
@@ -182,7 +183,6 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	bus-width = <8>;
 	cap-mmc-highspeed;
 	supports-emmc;
diff --git a/arch/arm/dts/rv1108-u-boot.dtsi b/arch/arm/dts/rv1108-u-boot.dtsi
new file mode 100644
index 0000000000..f065afd9d0
--- /dev/null
+++ b/arch/arm/dts/rv1108-u-boot.dtsi
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
+&uart1 {
+	u-boot,dm-pre-reloc;
+};
+&uart0 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 349e72a987..5354ac3b1e 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -682,7 +682,6 @@
 	};
 
 	dmc: dmc@202b0000 {
-                u-boot,dm-pre-reloc;
                 compatible = "rockchip,rv1108-dmc";
                 reg = <0x202b0000 0x400
 		       0x20210000 0x400
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 8b3c477645..dc77050846 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y

commit a0f7ba0595aae57a2ab9266cecc69952e57739f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 21 10:24:47 2019 +0800

    common: fdt support: delete env "initrd="
    
    Fix AB sysmem miss delete env "initrd=".
    
    Change-Id: I77ab135644d3b1d2a2eb3f3be6168cf6ef4417df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index b096762b1b..28caaf0d51 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -315,12 +315,13 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ANDROID_AB
 				env_update_filter("bootargs", bootargs, "root=");
 #else
+				env_update("bootargs", bootargs);
+#endif
 				/*
 				 * Initrd fixup: remove unused "initrd=0x...,0x...",
 				 * this for compatible with legacy parameter.txt
 				 */
-				env_update_filter("bootargs", bootargs, "initrd=");
-#endif
+				env_delete("bootargs", "initrd=", 0);
 			}
 #endif
 		}

commit 6e9d994efbb82d7deee1f42f190a6c49439c4ace
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Tue Mar 19 21:59:37 2019 +0800

    rkflash: support 8KB page size slc flash
    
    comfirm in MT29F16G08ABABA
    
    Change-Id: Ib2a3c62b3a4c9b9880c78fb01d39d4ad8fe2ac87
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index c42e6d887f..835efe7f51 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -525,7 +525,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			    id_byte[0][1] != 0xDA &&
 			    id_byte[0][1] != 0xD1 &&
 			    id_byte[0][1] != 0x95 &&
-			    id_byte[0][1] != 0xDC)
+			    id_byte[0][1] != 0xDC &&
+			    id_byte[0][1] != 0x48)
 
 				return FTL_UNSUPPORTED_FLASH;
 		}
@@ -542,13 +543,18 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
 		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
-			nand_para.blk_per_plane = 1024;;
+			nand_para.blk_per_plane = 1024;
 			nand_para.sec_per_page = 8;
 			nand_para.plane_per_die = 2;
 		} else {
 			nand_para.plane_per_die = 2;
 			nand_para.blk_per_plane = 2048;
 		}
+	} else if (id_byte[0][1] == 0x48) {
+		nand_para.sec_per_page = 8;
+		nand_para.page_per_blk = 128;
+		nand_para.plane_per_die = 2;
+		nand_para.blk_per_plane = 2048;
 	}
 	flash_die_info_init();
 	flash_bch_sel(nand_para.ecc_bits);

commit ee561e345b97338e95a34699274e51caeed75acf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 17:12:53 2019 +0800

    lib: avb: AVB_VBMETA_PUBLIC_KEY_VALIDATE select CONSOLE_DISABLE_CTRLC
    
    Clean coding style by the way.
    
    Change-Id: Ib614175e9ea7ceebc49030235b66d82adc57d3a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index c9a8da265a..6a5a307d4a 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -7,15 +7,16 @@ config AVB_LIBAVB_USER
 	  to fastboot and kernel.
 
 config AVB_VBMETA_PUBLIC_KEY_VALIDATE
-        bool "Support vbmeta public key validate"
-        depends on AVB_LIBAVB_USER
-        help
-          support vbmeta public key validate, system bootflow would be
-          uninterruptale when it is enabled:
-            - only allow "boot_android" as bootcmd;
-            - enter rockusb or fastboot when boot failed;
-            - not allow ctrl+c to enter hush;
-          only the CONFIG_BOOTDELAY can interrupt the bootflow.
+	bool "Support vbmeta public key validate"
+	depends on AVB_LIBAVB_USER
+	select CONSOLE_DISABLE_CTRLC
+	help
+	  support vbmeta public key validate, system bootflow would be
+	  uninterruptale when it is enabled:
+	    - only allow "boot_android" as bootcmd;
+	    - enter rockusb or fastboot when boot failed;
+	    - not allow ctrl+c to enter hush;
+	  only the CONFIG_BOOTDELAY can interrupt the bootflow.
 
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"

commit 590d13d737ce5c2d233367368a2904f40053be91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 17:11:23 2019 +0800

    console: add CONFIG_CONSOLE_DISABLE_CTRLC to disable ctrlc
    
    There are sometimes we would like to disable ctrlc, just enable it.
    
    Change-Id: I2911650b22d47b057a039774d8293cad6317bb6d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index c4ef08fb82..f7a7dd952f 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -249,6 +249,11 @@ config CONSOLE_RECORD_IN_SIZE
 	  The buffer is allocated immediately after the malloc() region is
 	  ready.
 
+config CONSOLE_DISABLE_CTRLC
+	bool "disable ctrlc"
+	help
+	  This disable ctrl+c when CONFIG_BOOTDELAY is 0.
+
 config IDENT_STRING
 	string "Board specific string to be added to uboot version string"
 	help
diff --git a/common/console.c b/common/console.c
index 399f001f27..4990fdd69a 100644
--- a/common/console.c
+++ b/common/console.c
@@ -412,13 +412,6 @@ int getc(void)
 
 int tstc(void)
 {
-/* Don't allow drivers call tstc() to do some "exit" event(maybe enter hush) */
-#if defined(CONFIG_ARCH_ROCKCHIP) && \
-    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) && \
-    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
-	return 0;
-#endif
-
 #ifdef CONFIG_DISABLE_CONSOLE
 	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return 0;
@@ -601,9 +594,8 @@ static int ctrlc_disabled = 0;	/* see disable_ctrl() */
 static int ctrlc_was_pressed = 0;
 int ctrlc(void)
 {
-/* Don't allow drivers call ctrlc() to do some "exit" event(maybe enter hush) */
-#if defined(CONFIG_ARCH_ROCKCHIP) && \
-    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+#if defined(CONFIG_CONSOLE_DISABLE_CTRLC) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
 	return 0;
 #endif
 

commit f3124cd74429849948d85130dff43f77d0f4196f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 5 15:07:51 2019 +0800

    spl: fit: use ddr for mmc read buffer in SPL for rk3368
    
    rk3368 has the same problem with rk3399.
    
    Change-Id: I242385722f864810273708f03dc62359a7bdb81e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f97fa03800..d65cbb1ae6 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -197,7 +197,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			return -ENOENT;
 
 		load_ptr = (load_addr + align_len) & ~align_len;
-#ifdef CONFIG_ROCKCHIP_RK3399
+#if  defined(CONFIG_ROCKCHIP_RK3399) || defined(CONFIG_ROCKCHIP_RK3368)
 		if ((load_ptr & 0xffff0000) == CONFIG_ROCKCHIP_IRAM_START_ADDR)
 			load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len);
 #endif

commit 2e68f6b5f95dc7b49d193cb54ca8737d034d6d43
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 5 09:57:47 2019 +0800

    power: charge animation: support long key event without release
    
    Change-Id: I9d7cd439376f2f4ff89ea6bfe3baedbeaa4deeb9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 3a0e885689..b1a814e02b 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMAGE_RESET_IDX				-1
 #define IMAGE_SOC_100_IDX(n)			((n) - 2)
 #define IMAGE_LOWPOWER_IDX(n)			((n) - 1)
-
+#define SYSTEM_SUSPEND_DELAY_MS			5000
 #define FUEL_GAUGE_POLL_MS			1000
 
 #define LED_CHARGING_NAME			"battery_charging"
@@ -59,7 +59,8 @@ struct charge_animation_priv {
 	int image_num;
 
 	int auto_wakeup_key_state;
-	ulong auto_screen_off_timeout;
+	ulong auto_screen_off_timeout;	/* ms */
+	ulong suspend_delay_timeout;	/* ms */
 };
 
 /*
@@ -170,7 +171,7 @@ static int check_key_press(struct udevice *dev)
  * period timer is useless.
  */
 #ifndef CONFIG_IRQ
-static int system_suspend_enter(struct charge_animation_pdata *pdata)
+static int system_suspend_enter(struct udevice *dev)
 {
 	return 0;
 }
@@ -179,8 +180,23 @@ static void autowakeup_timer_init(struct udevice *dev, uint32_t seconds) {}
 static void autowakeup_timer_uninit(void) {}
 
 #else
-static int system_suspend_enter(struct charge_animation_pdata *pdata)
+static int system_suspend_enter(struct udevice *dev)
 {
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+
+	/*
+	 * When cpu is in wfi and we try to give a long key press event without
+	 * key release, cpu would wakeup and enter wfi again immediately. So
+	 * here is the problem: cpu can only wakeup when long key released.
+	 *
+	 * Actually, we want cpu can detect long key event without key release,
+	 * so we give a suspend delay timeout for cpu to detect this.
+	 */
+	if (priv->suspend_delay_timeout &&
+	    get_timer(priv->suspend_delay_timeout) <= SYSTEM_SUSPEND_DELAY_MS)
+		return 0;
+
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
 		putc('0');
@@ -209,8 +225,11 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 	} else {
 		printf("\nWfi\n");
 		wfi();
+		putc('1');
 	}
 
+	priv->suspend_delay_timeout = get_timer(0);
+
 	/*
 	 * We must wait for key release event finish, otherwise
 	 * we may read key state too early.
@@ -362,7 +381,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 		       pdata->low_power_voltage, voltage);
 
 		/* System suspend */
-		system_suspend_enter(pdata);
+		system_suspend_enter(dev);
 
 		/* Update voltage */
 		voltage = fuel_gauge_get_voltage(fg);
@@ -629,8 +648,7 @@ show_images:
 				priv->auto_screen_off_timeout = get_timer(0);
 		} else {
 			priv->auto_screen_off_timeout = 0;
-
-			system_suspend_enter(pdata);
+			system_suspend_enter(dev);
 		}
 
 		mdelay(5);
@@ -673,14 +691,19 @@ show_images:
 			if (screen_on) {
 				charge_show_bmp(NULL); /* Turn off screen */
 				screen_on = false;
+				priv->suspend_delay_timeout = get_timer(0);
 			} else {
 				screen_on = true;
 			}
+
+			printf("screen %s\n", screen_on ? "on" : "off");
 		} else if (key_state == KEY_PRESS_LONG_DOWN) {
 			/* Set screen_on=true anyway when key long pressed */
 			if (!screen_on)
 				screen_on = true;
 
+			printf("screen %s\n", screen_on ? "on" : "off");
+
 			/* Is able to boot now ? */
 			if (soc < pdata->exit_charge_level) {
 				printf("soc=%d%%, threshold soc=%d%%\n",

commit 6787bf9f0a0a3972da5287523cfe6bf7f1e2e007
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Mar 15 15:32:16 2019 +0800

    configs: rk3326: enable lzo/lz4
    
    Change-Id: I7184cd7020a0bbe18dfa91d5a0cfba2e44ccc40c
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index b4e4487fff..698f4e50a5 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -121,6 +121,8 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set

commit b60f8c855632938690460919ee118478a37a43b3
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Fri Mar 15 14:13:15 2019 +0800

    configs: px30: enable lzo/lz4
    
    Change-Id: Ie914d9181e2ab06f92060b359cb65f6139f946db
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 537eb862a0..98260f19b0 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -127,6 +127,8 @@ CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index fa6f3ca739..d28f6778ae 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -129,6 +129,8 @@ CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set

commit b4a0434fc98903ef97eae434c21a6082a6942e5a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Mar 8 10:14:43 2019 +0800

    lib: optee_client: do not init RK FS if security not exist
    
    Change-Id: I91e780448cee7884c7477cb0b5720f962b2df00d
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs-v2.h b/include/optee_include/OpteeClientRkFs-v2.h
index fa710adb7e..57138a07dd 100644
--- a/include/optee_include/OpteeClientRkFs-v2.h
+++ b/include/optee_include/OpteeClientRkFs-v2.h
@@ -71,5 +71,6 @@ int tee_supp_rk_fs_init(void);
 int tee_supp_rk_fs_process(size_t num_params,
 			struct tee_ioctl_param *params);
 int OpteeClientRkFsInit(void);
+int check_security_exist(int print_flag);
 
 #endif
diff --git a/include/optee_include/OpteeClientRkFs.h b/include/optee_include/OpteeClientRkFs.h
index ed91aa9c11..d70c118c75 100644
--- a/include/optee_include/OpteeClientRkFs.h
+++ b/include/optee_include/OpteeClientRkFs.h
@@ -35,4 +35,6 @@ int tee_supp_rk_fs_process(void *cmd, uint32_t cmd_size);
 
 int OpteeClientRkFsInit(void);
 
+int check_security_exist(int print_flag);
+
 #endif
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 919e89fac1..c2ddbc381d 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -504,6 +504,11 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	t_teesmc32_param *TeeSmc32Param;
 
+	if (check_security_exist(0) < 0) {
+		printf("security partition not exist! unable to use RK FS!\n");
+		return TEEC_ERROR_GENERIC;
+	}
+
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
 #ifdef CONFIG_OPTEE_V1
 	TeecResult = tee_supp_rk_fs_process((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 542e32d720..ce826d25d5 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -174,6 +174,27 @@ static int dir_seek;
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+
+int check_security_exist(int print_flag)
+{
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			if (print_flag != 0)
+				printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+	return 0;
+}
+
 /*
  * action1:
  * rkss_begin_commit	set enable flag
@@ -197,20 +218,8 @@ static int rkss_begin_commit(void)
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
@@ -233,20 +242,8 @@ static int rkss_finish_commit(void)
 	unsigned char data[RKSS_DATA_LEN];
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	memset(data, 0, sizeof(data));
@@ -267,20 +264,8 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	struct rkss_backup_info info_last, info_current;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -366,20 +351,8 @@ static int rkss_resume(void)
 	unsigned int i;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -460,19 +433,9 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dread fail\n");
@@ -492,19 +455,9 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		return -1;
 	}
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dwrite fail\n");
@@ -517,19 +470,9 @@ static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("blk_dread fail\n");
@@ -1553,6 +1496,9 @@ int tee_supp_rk_fs_init(void)
 	struct rk_secure_storage rkss = {0};
 	unsigned char *table_data;
 
+	if (check_security_exist(0) < 0)
+		return 0;
+
 	ret = rkss_resume();
 	if (ret < 0) {
 		printf("rkss_resume failed!");
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index eb9ccfacc5..53a2ebcaca 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -186,6 +186,27 @@ extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+
+int check_security_exist(int print_flag)
+{
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			if (print_flag != 0)
+				printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+	return 0;
+}
+
 /*
  * action1:
  * rkss_begin_commit	set enable flag
@@ -209,20 +230,8 @@ static int rkss_begin_commit(void)
 	struct rkss_backup_verification p;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	p.backup_version = RKSS_BACKUP_VERSION;
@@ -245,20 +254,8 @@ static int rkss_finish_commit(void)
 	unsigned char data[RKSS_DATA_LEN];
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	debug("%s\n", __func__);
 	memset(data, 0, sizeof(data));
@@ -279,20 +276,8 @@ static int rkss_backup_sections(unsigned long index, unsigned int num)
 	struct rkss_backup_info info_last, info_current;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -378,20 +363,8 @@ static int rkss_resume(void)
 	unsigned int i;
 	unsigned long ret;
 
-	if (!dev_desc) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
-
-		if (part_get_info_by_name(dev_desc,
-					  "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
+	if (check_security_exist(1) < 0)
+		return -1;
 
 	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
 	if (ret != 1) {
@@ -472,19 +445,9 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dread fail\n");
@@ -509,19 +472,9 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		return -1;
 	}
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dwrite fail\n");
@@ -539,19 +492,9 @@ static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
 
-	if (dev_desc == NULL) {
-		dev_desc = rockchip_get_bootdev();
-		if (!dev_desc) {
-			printf("%s: Could not find device\n", __func__);
-			return -1;
-		}
+	if (check_security_exist(1) < 0)
+		return -1;
 
-		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-			dev_desc = NULL;
-			printf("Could not find security partition\n");
-			return -1;
-		}
-	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("blk_dread fail\n");
@@ -1603,6 +1546,9 @@ int tee_supp_rk_fs_init(void)
 	unsigned char *table_data;
 	int ret;
 
+	if (check_security_exist(0) < 0)
+		return 0;
+
 	ret = rkss_resume();
 	if (ret < 0) {
 		printf("rkss_resume failed!");

commit 472ddf73a4b045229b692e803fd5735cf5ea26ae
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Jan 23 09:05:37 2019 +0800

    lib: optee_client: add support for power-off protection
    
    Change-Id: I4babcc1989563a3c707a1cac7e93069031f033dd
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index b1f634997d..542e32d720 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -98,7 +98,10 @@
  *	- 512 byte section used refs [128]
  *		- 1 byte = 2 flag
  *	- 895 * 512 byte data	[129 - 1023]
- *	------------------------------
+ *	------ RKSS Backup Structure --------
+ *	- 512 byte backup header  [1024]
+ *		- 1 * rkss_backup_verification + 31 * rkss_backup_info
+ *	- 255 * 512 byte backup data [1025 - 1279]
  *
  */
 #define RKSS_DATA_SECTION_COUNT		1024
@@ -107,6 +110,26 @@
 #define RKSS_EACH_FILEFOLDER_COUNT	4		/* 504 / 126 = 4*/
 #define RKSS_NAME_MAX_LENGTH		117		/* 116 char + "\0"*/
 #define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+#define RKSS_BACKUP_INDEX		RKSS_DATA_SECTION_COUNT
+#define RKSS_BACKUP_COUNT		256
+
+#define RKSS_BACKUP_VERSION		(unsigned int)0x1
+#define RKSS_BACKUP_ENABLE		(unsigned int)0x55667788
+#define RKSS_BACKUP_USEDFLAG		(unsigned int)0xAABBCCDD
+
+struct rkss_backup_verification {
+	unsigned int backup_version;
+	unsigned int backup_count;
+	unsigned int reserve;
+	unsigned int backup_enable;
+};
+
+struct rkss_backup_info {
+	unsigned int backup_index;
+	unsigned int backup_num;
+	unsigned int backup_data_index;
+	unsigned int backup_usedflag;
+};
 
 #define RK_FS_R    0x1
 #define RK_FS_W    0x2
@@ -151,6 +174,288 @@ static int dir_seek;
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+/*
+ * action1:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * blk_dwrite
+ * rkss_finish_commit	clear enable flag, clear backup data
+ * reboot
+ * rkss_resume	not find enable flag, do nothing
+ *
+ * action2:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * power off when blk_dwrite
+ *
+ * power on
+ * rkss_resume	find enable flag, resume all backup data
+ */
+static int rkss_begin_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	struct rkss_backup_verification p;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	p.backup_version = RKSS_BACKUP_VERSION;
+	p.backup_enable = RKSS_BACKUP_ENABLE;
+	p.backup_count = 0;
+
+	memset(data, 0, sizeof(data));
+	memcpy(data, &p, sizeof(p));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_finish_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	memset(data, 0, sizeof(data));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_backup_sections(unsigned long index, unsigned int num)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_last, info_current;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		if (p.backup_count == 0) {
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index = RKSS_BACKUP_INDEX + 1;
+		} else {
+			memcpy(&info_last, data + sizeof(p) +
+			       (p.backup_count - 1) * sizeof(info_last),
+			       sizeof(info_last));
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index =
+				info_last.backup_data_index +
+				info_last.backup_num;
+		}
+		if ((info_current.backup_data_index + info_current.backup_num) >
+			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+			printf("Not enough backup sections!");
+			goto error;
+		}
+		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		      __func__, index, num, info_current.backup_data_index);
+
+		backup_data = malloc(num * RKSS_DATA_LEN);
+		if (!backup_data) {
+			printf("malloc backup_data fail\n");
+			goto error;
+		}
+
+		ret = blk_dread(dev_desc, index, num, backup_data);
+		if (ret != num) {
+			printf("blk_dread fail\n");
+			return -1;
+		}
+
+		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+				 num, backup_data);
+		if (ret != num) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+		free(backup_data);
+		backup_data = NULL;
+
+		p.backup_count += 1;
+
+		memcpy(data, &p, sizeof(p));
+		memcpy(data + sizeof(p) +
+		       (p.backup_count - 1) * sizeof(info_current),
+		       &info_current, sizeof(info_current));
+
+		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		if (ret != 1) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+	}
+
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
+static int rkss_resume(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_current;
+	unsigned int i;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		for (i = p.backup_count; i > 0; i--) {
+			memcpy(&info_current, data + sizeof(p) + (i - 1) *
+			       sizeof(info_current), sizeof(info_current));
+
+			if (info_current.backup_usedflag ==
+			    RKSS_BACKUP_USEDFLAG) {
+				debug("rkss_resume backup_index=0x%x \
+				      backup_num=0x%x \
+				      info_current.backup_data_index=0x%x\n",
+				      info_current.backup_index,
+				      info_current.backup_num,
+				      info_current.backup_data_index);
+				if ((info_current.backup_data_index +
+				    info_current.backup_num) >
+				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+					printf("backup sections error!");
+					goto error;
+				}
+				if ((info_current.backup_index +
+				    info_current.backup_num) >
+				    RKSS_DATA_SECTION_COUNT) {
+					printf("original sections error!");
+					goto error;
+				}
+				backup_data = malloc(info_current.backup_num *
+						     RKSS_DATA_LEN);
+				if (!backup_data) {
+					printf("malloc backup_data fail\n");
+					goto error;
+				}
+
+				ret = blk_dread(dev_desc,
+						info_current.backup_data_index,
+						info_current.backup_num,
+						backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dread fail\n");
+					return -1;
+				}
+
+				ret = blk_dwrite(dev_desc,
+						 info_current.backup_index,
+						 info_current.backup_num,
+						 backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dwrite fail\n");
+					return -1;
+				}
+				free(backup_data);
+				backup_data = NULL;
+			}
+		}
+	}
+	memset(data, 0, sizeof(data));
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
@@ -179,6 +484,13 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
+	int result;
+
+	result = rkss_backup_sections(index, num);
+	if (result < 0) {
+		printf("rkss_backup_sections fail\n");
+		return -1;
+	}
 
 	if (dev_desc == NULL) {
 		dev_desc = rockchip_get_bootdev();
@@ -764,6 +1076,11 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
 	 * if file exists, we must remove it first.
 	 */
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
@@ -812,6 +1129,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	debug("ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
 
 	params[2].u.value.a = fd;
+
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 	return TEEC_SUCCESS;
 }
 
@@ -886,6 +1209,12 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	int section_num;
 	uint8_t *file_data=0, *temp_file_data=0;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
 
@@ -970,6 +1299,11 @@ out:
 		free(temp_file_data);
 		temp_file_data = 0;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -983,6 +1317,12 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 	struct rkss_file_info p = {0};
 	unsigned int section_num_old, section_num_new;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
 
@@ -1010,6 +1350,11 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 		printf("ree_fs_new_truncate: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1021,6 +1366,12 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret, fd, num;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
@@ -1057,6 +1408,11 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	rkss_dump_ptable();
 	rkss_dump_usedflags();
 #endif
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1069,6 +1425,12 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret;
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	old_fname = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
@@ -1101,6 +1463,11 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 		printf("write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1186,6 +1553,12 @@ int tee_supp_rk_fs_init(void)
 	struct rk_secure_storage rkss = {0};
 	unsigned char *table_data;
 
+	ret = rkss_resume();
+	if (ret < 0) {
+		printf("rkss_resume failed!");
+		return TEEC_ERROR_GENERIC;
+	}
+
 	/* clean secure storage*/
 #ifdef DEBUG_CLEAN_RKSS
 	int i = 0;
@@ -1196,6 +1569,11 @@ int tee_supp_rk_fs_init(void)
 		printf("cleaned [%d]", i);
 	}
 #endif
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return TEEC_ERROR_GENERIC;
+	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
@@ -1230,6 +1608,13 @@ int tee_supp_rk_fs_init(void)
 	rkss_dump_ptable();
 	rkss_dump_usedflags();
 #endif
+
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return TEEC_ERROR_GENERIC;
+	}
+
 	return TEEC_SUCCESS;
 }
 
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 25a639c5a8..eb9ccfacc5 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -99,7 +99,10 @@
  *	- 512 byte section used refs [128]
  *		- 1 byte = 2 flag
  *	- 895 * 512 byte data	[129 - 1023]
- *	------------------------------
+ *	------ RKSS Backup Structure --------
+ *	- 512 byte backup header  [1024]
+ *		- 1 * rkss_backup_verification + 31 * rkss_backup_info
+ *	- 255 * 512 byte backup data [1025 - 1279]
  *
  */
 #define RKSS_DATA_SECTION_COUNT		1024
@@ -108,6 +111,26 @@
 #define RKSS_EACH_FILEFOLDER_COUNT	4		// 504 / 126 = 4
 #define RKSS_NAME_MAX_LENGTH		117		// 116 char + "\0"
 #define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+#define RKSS_BACKUP_INDEX		RKSS_DATA_SECTION_COUNT
+#define RKSS_BACKUP_COUNT		256
+
+#define RKSS_BACKUP_VERSION		(unsigned int)0x1
+#define RKSS_BACKUP_ENABLE		(unsigned int)0x55667788
+#define RKSS_BACKUP_USEDFLAG		(unsigned int)0xAABBCCDD
+
+struct rkss_backup_verification {
+	unsigned int backup_version;
+	unsigned int backup_count;
+	unsigned int reserve;
+	unsigned int backup_enable;
+};
+
+struct rkss_backup_info {
+	unsigned int backup_index;
+	unsigned int backup_num;
+	unsigned int backup_data_index;
+	unsigned int backup_usedflag;
+};
 
 typedef struct rkss_file_info
 {
@@ -163,6 +186,288 @@ extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 
 static struct blk_desc *dev_desc = NULL;
 static disk_partition_t part_info;
+/*
+ * action1:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * blk_dwrite
+ * rkss_finish_commit	clear enable flag, clear backup data
+ * reboot
+ * rkss_resume	not find enable flag, do nothing
+ *
+ * action2:
+ * rkss_begin_commit	set enable flag
+ * rkss_backup_sections	backup data
+ * power off when blk_dwrite
+ *
+ * power on
+ * rkss_resume	find enable flag, resume all backup data
+ */
+static int rkss_begin_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	struct rkss_backup_verification p;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	p.backup_version = RKSS_BACKUP_VERSION;
+	p.backup_enable = RKSS_BACKUP_ENABLE;
+	p.backup_count = 0;
+
+	memset(data, 0, sizeof(data));
+	memcpy(data, &p, sizeof(p));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_finish_commit(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	debug("%s\n", __func__);
+	memset(data, 0, sizeof(data));
+
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+}
+
+static int rkss_backup_sections(unsigned long index, unsigned int num)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_last, info_current;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		if (p.backup_count == 0) {
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index = RKSS_BACKUP_INDEX + 1;
+		} else {
+			memcpy(&info_last,
+			       data + sizeof(p) + (p.backup_count - 1) *
+			       sizeof(info_last), sizeof(info_last));
+			info_current.backup_usedflag = RKSS_BACKUP_USEDFLAG;
+			info_current.backup_index = index;
+			info_current.backup_num = num;
+			info_current.backup_data_index =
+				info_last.backup_data_index +
+				info_last.backup_num;
+		}
+		if ((info_current.backup_data_index + info_current.backup_num) >
+			(RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+			printf("Not enough backup sections!");
+			goto error;
+		}
+		debug("%s index=0x%lx num=0x%x backup_data_index=0x%x\n",
+		      __func__, index, num, info_current.backup_data_index);
+
+		backup_data = malloc(num * RKSS_DATA_LEN);
+		if (!backup_data) {
+			printf("malloc backup_data fail\n");
+			goto error;
+		}
+
+		ret = blk_dread(dev_desc, index, num, backup_data);
+		if (ret != num) {
+			printf("blk_dread fail\n");
+			return -1;
+		}
+
+		ret = blk_dwrite(dev_desc, info_current.backup_data_index,
+				 num, backup_data);
+		if (ret != num) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+		free(backup_data);
+		backup_data = NULL;
+
+		p.backup_count += 1;
+
+		memcpy(data, &p, sizeof(p));
+		memcpy(data + sizeof(p) +
+		       (p.backup_count - 1) * sizeof(info_current),
+		       &info_current, sizeof(info_current));
+
+		ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+		if (ret != 1) {
+			printf("blk_dwrite fail\n");
+			return -1;
+		}
+	}
+
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
+static int rkss_resume(void)
+{
+	unsigned char data[RKSS_DATA_LEN];
+	unsigned char *backup_data = NULL;
+	struct rkss_backup_verification p;
+	struct rkss_backup_info info_current;
+	unsigned int i;
+	unsigned long ret;
+
+	if (!dev_desc) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
+
+		if (part_get_info_by_name(dev_desc,
+					  "security", &part_info) < 0) {
+			dev_desc = NULL;
+			printf("Could not find security partition\n");
+			return -1;
+		}
+	}
+
+	ret = blk_dread(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dread fail\n");
+		return -1;
+	}
+
+	memcpy(&p, data, sizeof(p));
+	if (p.backup_version == RKSS_BACKUP_VERSION &&
+	    p.backup_enable == RKSS_BACKUP_ENABLE) {
+		for (i = p.backup_count; i > 0; i--) {
+			memcpy(&info_current, data + sizeof(p) + (i - 1) *
+			       sizeof(info_current), sizeof(info_current));
+
+			if (info_current.backup_usedflag ==
+			    RKSS_BACKUP_USEDFLAG) {
+				debug("rkss_resume backup_index=0x%x \
+				      backup_num=0x%x \
+				      info_current.backup_data_index=0x%x\n",
+				      info_current.backup_index,
+				      info_current.backup_num,
+				      info_current.backup_data_index);
+				if ((info_current.backup_data_index +
+				     info_current.backup_num) >
+				    (RKSS_BACKUP_INDEX + RKSS_BACKUP_COUNT)) {
+					printf("backup sections error!");
+					goto error;
+				}
+				if ((info_current.backup_index +
+				     info_current.backup_num) >
+				    RKSS_DATA_SECTION_COUNT) {
+					printf("original sections error!");
+					goto error;
+				}
+				backup_data = malloc(info_current.backup_num *
+						     RKSS_DATA_LEN);
+				if (!backup_data) {
+					printf("malloc backup_data fail\n");
+					goto error;
+				}
+
+				ret = blk_dread(dev_desc,
+						info_current.backup_data_index,
+						info_current.backup_num,
+						backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dread fail\n");
+					return -1;
+				}
+
+				ret = blk_dwrite(dev_desc,
+						 info_current.backup_index,
+						 info_current.backup_num,
+						 backup_data);
+				if (ret != info_current.backup_num) {
+					printf("blk_dwrite fail\n");
+					return -1;
+				}
+				free(backup_data);
+				backup_data = NULL;
+			}
+		}
+	}
+	memset(data, 0, sizeof(data));
+	ret = blk_dwrite(dev_desc, RKSS_BACKUP_INDEX, 1, data);
+	if (ret != 1) {
+		printf("blk_dwrite fail\n");
+		return -1;
+	}
+	return 0;
+error:
+	if (backup_data)
+		free(backup_data);
+	return -1;
+}
+
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
@@ -196,6 +501,13 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
+	int result;
+
+	result = rkss_backup_sections(index, num);
+	if (result < 0) {
+		printf("rkss_backup_sections fail\n");
+		return -1;
+	}
 
 	if (dev_desc == NULL) {
 		dev_desc = rockchip_get_bootdev();
@@ -549,7 +861,7 @@ static int rkss_get_dirs_by_name(char* filename)
 				{
 					char *file = p->name + strlen(filename) + 1;
 					char *subdir = strtok(file, "/");
-					printf("found: %s", subdir);
+					debug("found: %s", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -801,6 +1113,12 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 		}
 	}
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	if (make_newfile)
 	{
 		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
@@ -830,6 +1148,12 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
 			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
 
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return fsrpc->fd;
 }
 
@@ -901,6 +1225,12 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	p.size = fsrpc->len;
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
@@ -930,6 +1260,13 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 #ifdef DEBUG_RKFSS
 	rkss_dump_usedflags();
 #endif
+
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return fsrpc->len;
 }
 
@@ -982,6 +1319,12 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 
 	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	/* decrease ref from usedflags */
 	int num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
@@ -1004,6 +1347,12 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	rkss_dump_ptable();
 #endif
 
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return 0;
 }
 
@@ -1029,6 +1378,11 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 		printf("file exist ! %s.\n", newfilename);
 		return -1;
 	}
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
 
 	struct rkss_file_info p_new = {0};
 	memcpy(&p_new, &p_old, sizeof(struct rkss_file_info));
@@ -1051,6 +1405,11 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 #ifdef DEBUG_RKFSS
 	rkss_dump_ptable();
 #endif
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 
 	return 0;
 }
@@ -1069,6 +1428,12 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	strcpy(p.name, newnames);
 
 	ret = rkss_write_back_ptable(ret, &p);
@@ -1078,6 +1443,12 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
+
 	return 0;
 }
 
@@ -1097,6 +1468,11 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 		printf("fd unvailable!\n");
 		return -1;
 	}
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
 
 	p.size = fsrpc->arg;
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
@@ -1105,6 +1481,11 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 		printf("tee_fs_write: write ptable error!\n");
 		return -1;
 	}
+	ret = rkss_finish_commit();
+	if (ret < 0) {
+		printf("rkss_finish_commit failed!");
+		return -1;
+	}
 	return 0;
 }
 
@@ -1142,12 +1523,12 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	printf("seek/num:%d/%d\n", dir_seek, dir_num);
+	debug("seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num)
 	{
 		dirname = NULL;
 		fsrpc->len = 0;
-		printf("tee_fs_readdir: END\n");
+		debug("tee_fs_readdir: END\n");
 		return -1;
 	}
 
@@ -1220,6 +1601,13 @@ int tee_supp_rk_fs_init(void)
 
 	__maybe_unused int i = 0;
 	unsigned char *table_data;
+	int ret;
+
+	ret = rkss_resume();
+	if (ret < 0) {
+		printf("rkss_resume failed!");
+		return -1;
+	}
 #ifdef DEBUG_CLEAN_RKSS // clean secure storage
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
 	{
@@ -1231,13 +1619,19 @@ int tee_supp_rk_fs_init(void)
 	}
 #endif
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	// Verify Partition Table
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
 		printf("malloc table_data fail\n");
 		return -1;
 	}
-	int ret = rkss_read_patition_tables(table_data);
+	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
 		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
@@ -1275,6 +1669,12 @@ int tee_supp_rk_fs_init(void)
 	rkss_dump_usedflags();
 #endif
 
+	ret = rkss_begin_commit();
+	if (ret < 0) {
+		printf("rkss_begin_commit failed!");
+		return -1;
+	}
+
 	return 0;
 }
 int OpteeClientRkFsInit(void)

commit 4df150d1285811ed25f627f47c39716f088fa35a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 22:10:29 2019 +0800

    rockchip: dts: rk322x: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I171f4c0d895baf1a1b54c971fc88370a0b10ce3a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 432af90b7c..7034b344e1 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -61,3 +61,7 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&gpio1 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index d022b025f3..e9ee5a2933 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -459,6 +459,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
 		status = "disabled";

commit eef7c6f46aae73db57851c4e329a7eeb997de24a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 14 19:20:11 2019 +0800

    rockchip: board: ignore mmc strength fdt fixup for rk3399pro-npu
    
    Change-Id: Ic2b787e2bff49e73ca3ec3404fc74751d2903aa6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 702fd51df2..573956c118 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -282,7 +282,7 @@ int interrupt_debugger_init(void)
 	return ret;
 }
 
-#ifdef CONFIG_ROCKCHIP_RK1808
+#if defined(CONFIG_ROCKCHIP_RK1808) && !defined(CONFIG_COPROCESSOR_RK1808)
 #define PINCTRL_EMMC_BUS8_PATH		"/pinctrl/emmc/emmc-bus8"
 #define PINCTRL_EMMC_CMD_PATH		"/pinctrl/emmc/emmc-cmd"
 #define PINCTRL_EMMC_CLK_PATH		"/pinctrl/emmc/emmc-clk"
@@ -351,7 +351,7 @@ int board_fdt_fixup(void *blob)
 		if (ret)
 			printf("fdt set compatible failed: %d\n", ret);
 	}
-#elif CONFIG_ROCKCHIP_RK1808
+#elif defined(CONFIG_ROCKCHIP_RK1808) && !defined(CONFIG_COPROCESSOR_RK1808)
 	struct tag *t;
 	u32 ph_pu_2ma;
 

commit 9d2bc40cc004402b9560beebb491530e6fa60a71
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Feb 22 19:12:12 2019 +0800

    boot_rkimg: don't override BOOT_MODE_REG
    
    We should keep the boot mode value, linux
    kernel need it.
    
    Change-Id: Ic31166dffc3fefdf352cac1d1002a91dea319fc5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 0d48232e3e..dc7f1a06b6 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -389,7 +389,6 @@ fallback:
 	} else {
 		/* Mode from boot mode register */
 		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
-		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
 		switch (reg_boot_mode) {
 		case BOOT_NORMAL:

commit 957c1cf2afe1fd48f4f054df0088cae080e84ae9
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Mar 14 15:08:22 2019 +0800

    usb: rockusb: Forbid data beyond 32MB reading
    
    Simply return magic char if one is trying to read data beyond 32MB.
    
    Fixes: 628c827 ("usb: rockusb: forbid reading data beyond addr 32MB")
    
    Change-Id: If2cdf05dbf9d6dcdd4cf8f9605ab84480fbca32d
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 4062f368cf..c25df454a9 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -24,7 +24,7 @@ static int rkusb_read_sector(struct ums *ums_dev,
 	struct blk_desc *block_dev = &ums_dev->block_dev;
 	lbaint_t blkstart = start + ums_dev->start_sector;
 
-	if (blkstart > RKUSB_READ_LIMIT_ADDR) {
+	if ((blkstart + blkcnt) > RKUSB_READ_LIMIT_ADDR) {
 		memset(buf, 0xcc, blkcnt * SECTOR_SIZE);
 		return blkcnt;
 	} else {

commit 7aec704a4e9d9322f1102bcf61ee5c3cf6ec794d
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Mar 5 14:59:06 2019 +0800

    drivers: mtd: nand: rockchip nandc add bad block detect api
    
    The data layout for rockchip nandc is:
        1024 bytes data + 32 obb + 1024 data + 32 obb ...
    The system detect bad block flag locate at 2048, 4096, 8192...
    
    The system checks for bad blocks and gets the wrong bad block.
    Add a bad block detect api to check the bad block.
    
    Change-Id: I8b0f2907a851d3bbb4d1b9f5daf21319bfb047d9
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index 74c4c9a3c8..aa4cf30c3f 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -487,8 +487,10 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf,
 		int ret;
 
 		BUG_ON(bd->options & NAND_BBT_NO_OOB);
-
-		ret = scan_block_fast(mtd, bd, from, buf, numpages);
+		if (this->block_bad)
+			ret = this->block_bad(mtd, from);
+		else
+			ret = scan_block_fast(mtd, bd, from, buf, numpages);
 		if (ret < 0)
 			return ret;
 
diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index 16463e16a1..b8607c82ee 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -307,7 +307,6 @@ static void rockchip_nand_write_extra_oob(struct mtd_info *mtd, u8 *oob)
 	rockchip_nand_write_buf(mtd, oob + offset, len);
 }
 
-
 static int rockchip_nand_hw_syndrome_pio_read_page(struct mtd_info *mtd,
 						   struct nand_chip *chip,
 						   uint8_t *buf,
@@ -535,6 +534,33 @@ static int rockchip_nand_ecc_init(struct mtd_info *mtd,
 	return 0;
 }
 
+static int rockchip_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
+{
+	int page, res = 0, i;
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	u16 bad = 0xff;
+	int chipnr = (int)(ofs >> chip->chip_shift);
+
+	page = (int)(ofs >> chip->page_shift) & chip->pagemask;
+	chip->select_chip(mtd, chipnr);
+	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+	if(rockchip_nand_hw_syndrome_pio_read_page(mtd,
+	   chip, chip->buffers->databuf, 0, page) == -1) {
+		chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
+		for (i = 0; i < 8; i++) {
+			bad = chip->read_byte(mtd);
+			if (bad)
+				break;
+		}
+		if (i >= 8)
+			res = 1;
+	}
+	chip->select_chip(mtd, -1);
+	if (res)
+		printf("%s 0x%x %x %x\n", __func__, page, res, bad);
+	return res;
+}
+
 static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 {
 	const void *blob = gd->fdt_blob;
@@ -553,6 +579,9 @@ static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
 	chip->read_byte = rockchip_nand_read_byte;
 	chip->dev_ready = rockchip_nand_dev_ready;
 	chip->controller = &rknand->controller;
+	chip->block_bad = rockchip_nand_block_bad;
+	chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
+	chip->options = NAND_NO_SUBPAGE_WRITE;
 
 	rknand->banks[devnum] = fdtdec_get_int(blob, node, "reg", -1);
 
@@ -625,7 +654,7 @@ void board_nand_init(void)
 		goto err;
 	}
 
-	regs = fdtdec_get_addr(blob, node, "reg");
+	regs = fdt_get_base_address(blob, node);
 	if (regs == FDT_ADDR_T_NONE) {
 		debug("Nand address not found\n");
 		goto err;

commit 41175141f329f7fc754a84dd8829c36b96efb78c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 14 11:32:37 2019 +0800

    mtd: nand: rockchip: fix incompatible-pointer-types compile err
    
    Fix the following compile error:
    drivers/mtd/nand/rockchip_nand.c: In function ‘nand_spl_load_image’:
    drivers/mtd/nand/rockchip_nand.c:657:39: error: passing argument 3 of
    ‘nand_read_skip_bad’ from incompatible pointer type
    [-Werror=incompatible-pointer-types]
      return nand_read_skip_bad(mtd, offs, &size, NULL, size, (u_char
    *)dst);
                                           ^
    In file included from drivers/mtd/nand/rockchip_nand.c:11:0:
    include/nand.h:101:5: note: expected ‘size_t * {aka long unsigned int
    *}’ but argument is of type ‘unsigned int *’
     int nand_read_skip_bad(struct mtd_info *mtd, loff_t offset, size_t
    *length,
    
    Change-Id: I44c97f21c2c2d40a7dcbdab7ddb96a1025949ee4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
index d8f443972a..16463e16a1 100644
--- a/drivers/mtd/nand/rockchip_nand.c
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -652,9 +652,10 @@ err:
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 {
 	struct mtd_info *mtd;
+	size_t length = size;
 
 	mtd = get_nand_dev_by_index(0);
-	return nand_read_skip_bad(mtd, offs, &size, NULL, size, (u_char *)dst);
+	return nand_read_skip_bad(mtd, offs, &length, NULL, size, (u_char *)dst);
 }
 
 void nand_deselect(void) {}

commit 6a3f8006e0a917eb156f0951c3e41ac3ce3f78ef
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Mar 12 19:46:04 2019 +0800

    usb: phy: rockchip: fix implicit definition warning
    
    When make with rock_defconfig, compile warning for the
    following implicitly defined function are raised due to
    a missing include directive:
    
      drivers/usb/phy/rockchip_usb2_phy.c: In function ‘otg_phy_parse’:
      drivers/usb/phy/rockchip_usb2_phy.c: 102:10: error:
      implicit declaration of function ‘fdt_translate_address’ [-Werror=implicit-function-declaration]
      addr = fdt_translate_address(blob, node, reg);
              ^~~~~~~~~~~~~~~~~~~~~
    This change fixes this by including <fdt_support.h>.
    
    And this patch also fixes the following compile error:
    
      drivers/usb/phy/rockchip_usb2_phy.c:96:1: error:
      label ‘retry’ defined but not used [-Werror=unused-label]
    
    Change-Id: Ia82d0ff02b0f528ddde8a553d457c6c0cb763680
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index bafe3cdf85..31efee297a 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <fdt_support.h>
 #include <syscon.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
@@ -93,7 +94,9 @@ static int otg_phy_parse(struct dwc2_udc *dev)
 	/* Find the usb_otg node */
 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
 
+#if defined(CONFIG_ROCKCHIP_RK3288)
 retry:
+#endif
 	if (node > 0) {
 		reg = fdt_getprop(blob, node, "reg", NULL);
 		if (!reg)

commit 28e9b49d47835df7cbf23b10c90cd05a90d56bc1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 11 14:44:52 2019 +0800

    rockchip: board: fdt fixup mmc strength as 2mA for rk1808
    
    Change-Id: I183e671a6a3ea753f163b2c3f534de85f584bd38
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2244eaffef..702fd51df2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -282,22 +282,98 @@ int interrupt_debugger_init(void)
 	return ret;
 }
 
+#ifdef CONFIG_ROCKCHIP_RK1808
+#define PINCTRL_EMMC_BUS8_PATH		"/pinctrl/emmc/emmc-bus8"
+#define PINCTRL_EMMC_CMD_PATH		"/pinctrl/emmc/emmc-cmd"
+#define PINCTRL_EMMC_CLK_PATH		"/pinctrl/emmc/emmc-clk"
+#define PINCTRL_PCFG_PU_2MA_PATH	"/pinctrl/pcfg-pull-up-2ma"
+#define MAX_ROCKCHIP_PINS_ENTRIES	12
+
+static int rockchip_pinctrl_cfg_fdt_fixup(const char *path, u32 new_phandle)
+{
+	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
+	const u32 *data;
+	int i, count;
+	int node;
+
+	node = fdt_path_offset(gd->fdt_blob, path);
+	if (node < 0) {
+		debug("%s: can't find: %s\n", __func__, path);
+		return node;
+	}
+
+	data = fdt_getprop(gd->fdt_blob, node, "rockchip,pins", &count);
+	if (!data) {
+		debug("%s: can't find prop \"rockchip,pins\"\n", __func__);
+		return -ENODATA;
+	}
+
+	count /= sizeof(u32);
+	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
+		debug("%s: %d is over max count\n", __func__, count);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < count; i++)
+		cells[i] = data[i];
+
+	for (i = 0; i < (count >> 2); i++)
+		cells[4 * i + 3] = cpu_to_fdt32(new_phandle);
+
+	fdt_setprop((void *)gd->fdt_blob, node, "rockchip,pins",
+		    &cells, count * sizeof(u32));
+
+	return 0;
+}
+#endif
+
 int board_fdt_fixup(void *blob)
 {
-	__maybe_unused int ret = 0;
+	int ret = 0;
 
+	/*
+	 * Common fixup for DRM
+	 */
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_display_fixup(blob);
 #endif
 
+	/*
+	 * Platform fixup:
+	 *
+	 * - RK3288: Recognize RK3288W by HDMI Revision ID is 0x1A;
+	 * - RK1808: MMC strength 2mA;
+	 */
 #ifdef CONFIG_ROCKCHIP_RK3288
-	/* RK3288W HDMI Revision ID is 0x1A */
 	if (readl(0xff980004) == 0x1A) {
 		ret = fdt_setprop_string(blob, 0,
 					 "compatible", "rockchip,rk3288w");
 		if (ret)
 			printf("fdt set compatible failed: %d\n", ret);
 	}
+#elif CONFIG_ROCKCHIP_RK1808
+	struct tag *t;
+	u32 ph_pu_2ma;
+
+	t = atags_get_tag(ATAG_SOC_INFO);
+	if (!t)
+		return 0;
+
+	debug("soc=0x%x, flags=0x%x\n", t->u.soc.name, t->u.soc.flags);
+
+	if (t->u.soc.flags != SOC_FLAGS_ET00)
+		return 0;
+
+	ph_pu_2ma = fdt_get_phandle(gd->fdt_blob,
+		    fdt_path_offset(gd->fdt_blob, PINCTRL_PCFG_PU_2MA_PATH));
+	if (!ph_pu_2ma) {
+		debug("Can't find: %s\n", PINCTRL_PCFG_PU_2MA_PATH);
+		return -EINVAL;
+	}
+
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_BUS8_PATH, ph_pu_2ma);
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CMD_PATH, ph_pu_2ma);
+	ret |= rockchip_pinctrl_cfg_fdt_fixup(PINCTRL_EMMC_CLK_PATH, ph_pu_2ma);
 #endif
 
 	return ret;

commit e217fe3cbd101c9a1de6025b4df6ee10ddeb3ed0
Author: Keerthy <j-keerthy@ti.com>
Date:   Fri Dec 21 21:54:30 2018 +0530

    lib: fdtdec: fdtdec_get_addr_size_fixed remove checks
    
    With 8 bytes addressing even on 32 bit machines these checks
    are no longer valid. Remove them.
    
    Signed-off-by: Keerthy <j-keerthy@ti.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    (cherry picked from commit f51f6715a5013f37620c38f0430e21d4736e235a)
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    
    Change-Id: I07d143dbd4dfeff1ce99d081d1279c4f70fa4e8f

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index d06dbdf10b..863d6142e7 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -92,16 +92,6 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
 
 	debug("%s: %s: ", __func__, prop_name);
 
-	if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
-		debug("(na too large for fdt_addr_t type)\n");
-		return FDT_ADDR_T_NONE;
-	}
-
-	if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
-		debug("(ns too large for fdt_size_t type)\n");
-		return FDT_ADDR_T_NONE;
-	}
-
 	prop = fdt_getprop(blob, node, prop_name, &len);
 	if (!prop) {
 		debug("(not found)\n");

commit 841c4e175528e5ce2886586e22431ff2eb1c1f03
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 11 16:24:00 2019 +0800

    rockchip: atags: add tag for SoC information
    
    Change-Id: Ic2f89b8deb5cebeaaa05fb6cd67997429821904c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 20ada99821..b9028b35d2 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -18,6 +18,7 @@
 #define ATAG_RAM_PARTITION	0x54410054
 #define ATAG_ATF_MEM		0x54410055
 #define ATAG_PUB_KEY		0x54410056
+#define ATAG_SOC_INFO		0x54410057
 #define ATAG_MAX		0x544100ff
 
 /* Tag size and offset */
@@ -45,6 +46,11 @@
 #define SERIAL_M_MODE_M1	0x1
 #define SERIAL_M_MODE_M2	0x2
 
+/* tag_soc_info.flags */
+#define SOC_FLAGS_ET00		0x45543030
+#define SOC_FLAGS_ET01		0x45543031
+#define SOC_FLAGS_ET02		0x45543032
+
 struct tag_serial {
 	u32 version;
 	u32 enable;
@@ -126,6 +132,14 @@ struct tag_ram_partition {
 	u32 hash;
 } __packed;
 
+struct tag_soc_info {
+	u32 version;
+	u32 name;	/* Hex: 0x3288, 0x3399... */
+	u32 flags;
+	u32 reserved[6];
+	u32 hash;
+} __packed;
+
 struct tag_core {
 	u32 flags;
 	u32 pagesize;
@@ -149,6 +163,7 @@ struct tag {
 		struct tag_ram_partition ram_part;
 		struct tag_atf_mem	atf_mem;
 		struct tag_pub_key	pub_key;
+		struct tag_soc_info	soc;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 90a6e3ff89..be5dfecad7 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -199,6 +199,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_PUB_KEY:
 		size = tag_size(tag_pub_key);
 		break;
+	case ATAG_SOC_INFO:
+		size = tag_size(tag_soc_info);
+		break;
 	};
 
 	if (!size)
@@ -403,6 +406,17 @@ void atags_print_tag(struct tag *t)
 		printf("   version = 0x%x\n", t->u.pub_key.version);
 		printf("      hash = 0x%x\n", t->u.pub_key.hash);
 		break;
+	case ATAG_SOC_INFO:
+		printf("[soc_info]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.soc.version);
+		printf("      name = 0x%x\n", t->u.soc.name);
+		printf("     flags = 0x%x\n", t->u.soc.flags);
+		for (i = 0; i < ARRAY_SIZE(t->u.soc.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.soc.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.soc.hash);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -445,6 +459,7 @@ void atags_test(void)
 	struct tag_ram_partition t_ram_param;
 	struct tag_atf_mem t_atf_mem;
 	struct tag_pub_key t_pub_key;
+	struct tag_soc_info t_soc;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
@@ -453,6 +468,7 @@ void atags_test(void)
 	memset(&t_ram_param, 0x0, sizeof(t_ram_param));
 	memset(&t_atf_mem, 0x5, sizeof(t_atf_mem));
 	memset(&t_pub_key, 0x6, sizeof(t_pub_key));
+	memset(&t_soc, 0x7, sizeof(t_soc));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
@@ -484,6 +500,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 	atags_set_tag(ATAG_ATF_MEM, &t_atf_mem);
 	atags_set_tag(ATAG_PUB_KEY, &t_pub_key);
+	atags_set_tag(ATAG_SOC_INFO, &t_soc);
 
 	atags_print_all_tags();
 	atags_stat();

commit f44ca27357563e9ed43f1ff76d3bd8dd14f4747e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 7 15:20:30 2019 +0800

    android: fix retry mechanism with ab system
    
    Minus the retry-count in every boot with ab system. If the ab system
    boot success, the system service boot_ctrl reset the retry-count or set
    boot-successful.
    
    Change-Id: Ic37f65b745d1feb978730332835246dc43d72dab
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 58b3815475..a5f59dc64f 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -574,17 +574,18 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
-
-		/* ... and decrement tries remaining, if applicable. */
-		if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-		    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-			ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-		}
 	} else {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
 
 out:
+#ifdef CONFIG_ANDROID_AB
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+	    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+#endif
 	env_update("bootargs", verify_state);
 	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
 		printf("Can not save metadata\n");

commit 74b485fb2bb55e7d9926171a44f5be0a36fa6796
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 23 16:43:43 2019 +0800

    fastboot: delete write perm-attr hash if use pre-loader pub_key
    
    Since we use the pre-loader public key to verify permanent attribute, then
    we do not need to write permanent attribute hash to otp & efuse.
    
    Change-Id: Ic5e19fed2fc9405ab5bc7504dd930fd5f02d847c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b6de1c37f6..896bcac61c 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1742,18 +1742,19 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 static void cb_oem_perm_attr(void)
 {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 	sha256_context ctx;
 	uint8_t digest[SHA256_SUM_LEN] = {0};
 	uint8_t digest_temp[SHA256_SUM_LEN] = {0};
 	uint8_t perm_attr_temp[PERM_ATTR_TOTAL_SIZE] = {0};
 	uint8_t flag = 0;
-
+#endif
 	if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
 		printf("Permanent attribute size is not equal!\n");
 		fastboot_tx_write_str("FAILincorrect perm attribute size");
 		return;
 	}
-
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 	if (rk_avb_read_perm_attr_flag(&flag)) {
 		printf("rk_avb_read_perm_attr_flag error!\n");
 		fastboot_tx_write_str("FAILperm attr read failed");
@@ -1793,7 +1794,7 @@ static void cb_oem_perm_attr(void)
 			return;
 		}
 	}
-
+#endif
 	if (rk_avb_write_permanent_attributes((uint8_t *)
 					      CONFIG_FASTBOOT_BUF_ADDR,
 					      download_bytes)) {
@@ -1804,7 +1805,7 @@ static void cb_oem_perm_attr(void)
 		fastboot_tx_write_str("FAILperm attr write failed");
 		return;
 	}
-
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 	memset(digest, 0, SHA256_SUM_LEN);
 	sha256_starts(&ctx);
 	sha256_update(&ctx, (const uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
@@ -1829,7 +1830,7 @@ static void cb_oem_perm_attr(void)
 			return;
 		}
 	}
-
+#endif
 	if (rk_avb_write_perm_attr_flag(PERM_ATTR_SUCCESS_FLAG)) {
 		fastboot_tx_write_str("FAILperm attr flag write failure");
 		return;
diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
index c51a2bdd33..9695d1b17a 100644
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -71,7 +71,7 @@ static bool verify_permanent_attributes(
     const AvbAtxPermanentAttributes* attributes,
     const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
   uint8_t hash[AVB_SHA256_DIGEST_SIZE];
-#ifdef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
+#ifdef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 #ifdef CONFIG_CRYPTO_ROCKCHIP
   struct rk_pub_key pub_key;
   int i;
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index fca89265ae..9d4db76340 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -354,7 +354,7 @@ AvbIOResult avb_read_perm_attr(AvbAtxOps *atx_ops,
 AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
 				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
 {
-#ifndef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
+#ifndef CONFIG_ROCKCHIP_PRELOADER_PUB_KEY
 #ifdef CONFIG_OPTEE_CLIENT
 	if (trusty_read_attribute_hash((uint32_t *)hash,
 				       AVB_SHA256_DIGEST_SIZE / 4))
diff --git a/lib/avb/rk_avb_user/Kconfig b/lib/avb/rk_avb_user/Kconfig
index b183bfcc72..eb324616bd 100755
--- a/lib/avb/rk_avb_user/Kconfig
+++ b/lib/avb/rk_avb_user/Kconfig
@@ -20,3 +20,10 @@ config TPL_RK_AVB_LIBAVB_USER
 	  This config support the android things system to
 	  read/write hardware image, like vbmeta, misc, and
 	  so on. And it can provide some a/b and avb information
+
+config ROCKCHIP_PRELOADER_PUB_KEY
+	bool "Rockchip AVB use pre-loader public key"
+	depends on AVB_LIBAVB_USER
+	select CRYPTO_ROCKCHIP
+	help
+	  Use pre-loader public key to decode in avb.

commit e84ef14d6d009949d80b0c2d722d8c736814ef4c
Author: lifangyuan <fangyuan.li@rock-chips.com>
Date:   Wed Mar 6 10:59:17 2019 +0800

    configs: rockchip: rk3288: Fdt overlay enabled by default.
    
    Change-Id: I61a127b39b5bbb03da3042b776b5d0fff1a20aed
    Signed-off-by: lifangyuan <fangyuan.li@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 3e80f41644..34c0705cfc 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -21,6 +21,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 # CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -105,6 +106,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit dd9ee2cc6f89aa6ba5de7bad07d981dd3b1d1ccf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 5 14:10:44 2019 +0800

    rockchip: rk3368: correct MMU ram map size
    
    Change-Id: I4884a88613fe5c2fa515360d4c754f4eade84ed3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index e82b631138..0bfe39d5f3 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -66,13 +66,13 @@ static struct mm_region rk3368_mem_map[] = {
 	{
 		.virt = 0x0UL,
 		.phys = 0x0UL,
-		.size = 0x80000000UL,
+		.size = 0xfe000000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_INNER_SHARE
 	}, {
-		.virt = 0xf0000000UL,
-		.phys = 0xf0000000UL,
-		.size = 0x10000000UL,
+		.virt = 0xfe000000UL,
+		.phys = 0xfe000000UL,
+		.size = 0x02000000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index e7f4178f0c..4f9105edac 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -15,7 +15,7 @@
 #include <linux/sizes.h>
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_MAX_SIZE			0xfe000000
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024

commit d17dc7d4856a6600634a6360969468c49240dab6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 8 15:02:36 2019 +0800

    Revert "rockchip: dts: rk3308: add cd-gpios"
    
    This reverts commit 18601cb12a0ced8c672542509b9c3a35fd935607.
    
    Change-Id: I9d1501ab0492a24ddbd6877b3cc735dfbc5a6944
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index fae2d4fb07..4da226322c 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -83,11 +83,6 @@
 	status = "okay";
 };
 
-&gpio0 {
-	u-boot,dm-pre-reloc;
-	status = "disabled";
-};
-
 &route_rgb {
 	status = "disabled";
 };
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 2d50ba881e..1e9ec023e6 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -392,7 +392,6 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
-		cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;

commit 4701d790f43ded37aa9894938b721ab6c93c285c
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 8 15:58:26 2019 +0800

    cmd: bootrkp: return CMD_RET_FAILURE on error
    
    A cmd only returned with CMD_RET_XXX defined
    by command_ret_t can ensure it work well when
    called from shell.
    
    Change-Id: I16e76ed62928380eaaf3c352efb4df9463b7e72d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index f2671045a5..e57cc28a63 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -26,7 +26,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: dev_desc is NULL!\n", __func__);
-		return -ENODEV;
+		return CMD_RET_FAILURE;
 	}
 
 #ifdef CONFIG_ANDROID_KEYMASTER_CA

commit 65f0143b26988548b050df8ca33d26ed26938b0d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 26 15:59:57 2018 +0800

    lib: avb: verify the perm attr by root public key
    
    Change-Id: I7e06152a21325ffcd785223952fe8ffaff4d5f08
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
old mode 100755
new mode 100644
index 74a34fd0fd..c51a2bdd33
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -1,401 +1,473 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_atx_validate.h>
-
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-
-/* The most recent unlock challenge generated. */
-static uint8_t last_unlock_challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
-
-/* Computes the SHA256 |hash| of |length| bytes of |data|. */
-static void sha256(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  AvbSHA256Ctx context;
-  avb_sha256_init(&context);
-  avb_sha256_update(&context, data, length);
-  uint8_t* tmp = avb_sha256_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
-}
-
-/* Computes the SHA512 |hash| of |length| bytes of |data|. */
-static void sha512(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
-  AvbSHA512Ctx context;
-  avb_sha512_init(&context);
-  avb_sha512_update(&context, data, length);
-  uint8_t* tmp = avb_sha512_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
-}
-
-/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
-static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  sha256((const uint8_t*)str, avb_strlen(str), hash);
-}
-
-/* Verifies structure and |expected_hash| of permanent |attributes|. */
-static bool verify_permanent_attributes(
-    const AvbAtxPermanentAttributes* attributes,
-    const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
-  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
-
-  if (attributes->version != 1) {
-    avb_error("Unsupported permanent attributes version.\n");
-    return false;
-  }
-  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
-  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid permanent attributes.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies the format, key version, usage, and signature of a certificate. */
-static bool verify_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_key_version,
-    const uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
-  const AvbAlgorithmData* algorithm_data;
-  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
-
-  if (certificate->signed_data.version != 1) {
-    avb_error("Unsupported certificate format.\n");
-    return false;
-  }
-  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
-  sha512((const uint8_t*)&certificate->signed_data,
-         sizeof(AvbAtxCertificateSignedData),
-         certificate_hash);
-  if (!avb_rsa_verify(authority,
-                      AVB_ATX_PUBLIC_KEY_SIZE,
-                      certificate->signature,
-                      AVB_RSA4096_NUM_BYTES,
-                      certificate_hash,
-                      AVB_SHA512_DIGEST_SIZE,
-                      algorithm_data->padding,
-                      algorithm_data->padding_len)) {
-    avb_error("Invalid certificate signature.\n");
-    return false;
-  }
-  if (certificate->signed_data.key_version < minimum_key_version) {
-    avb_error("Key rollback detected.\n");
-    return false;
-  }
-  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
-                           expected_usage,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid certificate usage.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PIK certificate. */
-static bool verify_pik_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version) {
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot.ca", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PIK certificate.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PSK certificate. */
-static bool verify_psk_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version,
-    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
-  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PSK certificate.\n");
-    return false;
-  }
-  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
-  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
-                           expected_subject,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("PSK: Product ID mismatch.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PUK certificate. */
-static bool verify_puk_certificate(
-    const AvbAtxCertificate* certificate,
-    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version,
-    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
-  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot.unlock", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PUK certificate.\n");
-    return false;
-  }
-  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
-  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
-                           expected_subject,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("PUK: Product ID mismatch.\n");
-    return false;
-  }
-  return true;
-}
-
-AvbIOResult avb_atx_validate_vbmeta_public_key(
-    AvbOps* ops,
-    const uint8_t* public_key_data,
-    size_t public_key_length,
-    const uint8_t* public_key_metadata,
-    size_t public_key_metadata_length,
-    bool* out_is_trusted) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
-  AvbAtxPublicKeyMetadata metadata;
-  uint64_t minimum_version;
-
-  /* Be pessimistic so we can exit early without having to remember to clear.
-   */
-  *out_is_trusted = false;
-
-  /* Read and verify permanent attributes. */
-  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
-                                                   &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = ops->atx_ops->read_permanent_attributes_hash(
-      ops->atx_ops, permanent_attributes_hash);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes hash.\n");
-    return result;
-  }
-  if (!verify_permanent_attributes(&permanent_attributes,
-                                   permanent_attributes_hash)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Sanity check public key metadata. */
-  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
-    avb_error("Invalid public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
-  if (metadata.version != 1) {
-    avb_error("Unsupported public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PIK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PIK minimum version.\n");
-    return result;
-  }
-  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
-                              permanent_attributes.product_root_public_key,
-                              minimum_version)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PSK minimum version.\n");
-    return result;
-  }
-  if (!verify_psk_certificate(
-          &metadata.product_signing_key_certificate,
-          metadata.product_intermediate_key_certificate.signed_data.public_key,
-          minimum_version,
-          permanent_attributes.product_id)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK is the same key that verified vbmeta. */
-  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
-    avb_error("Public key length mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  if (0 != avb_safe_memcmp(
-               metadata.product_signing_key_certificate.signed_data.public_key,
-               public_key_data,
-               AVB_ATX_PUBLIC_KEY_SIZE)) {
-    avb_error("Public key mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Report the key versions used during verification. */
-  ops->atx_ops->set_key_version(
-      ops->atx_ops,
-      AVB_ATX_PIK_VERSION_LOCATION,
-      metadata.product_intermediate_key_certificate.signed_data.key_version);
-  ops->atx_ops->set_key_version(
-      ops->atx_ops,
-      AVB_ATX_PSK_VERSION_LOCATION,
-      metadata.product_signing_key_certificate.signed_data.key_version);
-
-  *out_is_trusted = true;
-  return AVB_IO_RESULT_OK;
-}
-
-AvbIOResult avb_atx_generate_unlock_challenge(
-    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-
-  /* We need the permanent attributes to compute the product_id_hash. */
-  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = atx_ops->get_random(
-      atx_ops, AVB_ATX_UNLOCK_CHALLENGE_SIZE, last_unlock_challenge);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to generate random challenge.\n");
-    return result;
-  }
-  out_unlock_challenge->version = 1;
-  sha256(permanent_attributes.product_id,
-         AVB_ATX_PRODUCT_ID_SIZE,
-         out_unlock_challenge->product_id_hash);
-  avb_memcpy(out_unlock_challenge->challenge,
-             last_unlock_challenge,
-             AVB_ATX_UNLOCK_CHALLENGE_SIZE);
-  return result;
-}
-
-AvbIOResult avb_atx_validate_unlock_credential(
-    AvbAtxOps* atx_ops,
-    const AvbAtxUnlockCredential* unlock_credential,
-    bool* out_is_trusted) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
-  uint64_t minimum_version;
-  const AvbAlgorithmData* algorithm_data;
-  uint8_t challenge_hash[AVB_SHA512_DIGEST_SIZE];
-
-  /* Be pessimistic so we can exit early without having to remember to clear.
-   */
-  *out_is_trusted = false;
-
-  /* Sanity check the credential. */
-  if (unlock_credential->version != 1) {
-    avb_error("Unsupported unlock credential format.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Read and verify permanent attributes. */
-  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = atx_ops->read_permanent_attributes_hash(atx_ops,
-                                                   permanent_attributes_hash);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes hash.\n");
-    return result;
-  }
-  if (!verify_permanent_attributes(&permanent_attributes,
-                                   permanent_attributes_hash)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PIK certificate. */
-  result = atx_ops->ops->read_rollback_index(
-      atx_ops->ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PIK minimum version.\n");
-    return result;
-  }
-  if (!verify_pik_certificate(
-          &unlock_credential->product_intermediate_key_certificate,
-          permanent_attributes.product_root_public_key,
-          minimum_version)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PUK certificate. The minimum version is shared with the PSK. */
-  result = atx_ops->ops->read_rollback_index(
-      atx_ops->ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PSK minimum version.\n");
-    return result;
-  }
-  if (!verify_puk_certificate(
-          &unlock_credential->product_unlock_key_certificate,
-          unlock_credential->product_intermediate_key_certificate.signed_data
-              .public_key,
-          minimum_version,
-          permanent_attributes.product_id)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the challenge signature. */
-  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
-  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
-  if (!avb_rsa_verify(unlock_credential->product_unlock_key_certificate
-                          .signed_data.public_key,
-                      AVB_ATX_PUBLIC_KEY_SIZE,
-                      unlock_credential->challenge_signature,
-                      AVB_RSA4096_NUM_BYTES,
-                      challenge_hash,
-                      AVB_SHA512_DIGEST_SIZE,
-                      algorithm_data->padding,
-                      algorithm_data->padding_len)) {
-    avb_error("Invalid unlock challenge signature.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  *out_is_trusted = true;
-  return AVB_IO_RESULT_OK;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_atx_validate.h>
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
+#include <malloc.h>
+#include <common.h>
+#ifdef CONFIG_CRYPTO_ROCKCHIP
+#include <rockchip_crypto/rockchip_crypto.h>
+#endif
+
+/* The most recent unlock challenge generated. */
+static uint8_t last_unlock_challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
+
+/* Computes the SHA256 |hash| of |length| bytes of |data|. */
+static void sha256(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  AvbSHA256Ctx context;
+  avb_sha256_init(&context);
+  avb_sha256_update(&context, data, length);
+  uint8_t* tmp = avb_sha256_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
+}
+
+/* Computes the SHA512 |hash| of |length| bytes of |data|. */
+static void sha512(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
+  AvbSHA512Ctx context;
+  avb_sha512_init(&context);
+  avb_sha512_update(&context, data, length);
+  uint8_t* tmp = avb_sha512_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
+}
+
+/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
+static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  sha256((const uint8_t*)str, avb_strlen(str), hash);
+}
+
+/* Verifies structure and |expected_hash| of permanent |attributes|. */
+static bool verify_permanent_attributes(
+    const AvbAtxPermanentAttributes* attributes,
+    const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+#ifdef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
+#ifdef CONFIG_CRYPTO_ROCKCHIP
+  struct rk_pub_key pub_key;
+  int i;
+  uint8_t rsa_hash[256] = {0};
+  uint8_t rsa_hash_revert[256] = {0};
+  unsigned int rsaResult_temp[8];
+  unsigned char rsaResult[32] = {0};
+  char *temp;
+  struct rk_crypto_desc crypto_desc;
+  int ret = 0;
+
+  if (rk_crypto_probe())
+    return false;
+
+  memset(&pub_key, 0, sizeof(struct rk_pub_key));
+  ret = rk_avb_get_pub_key(&pub_key);
+  if (ret)
+    return false;
+
+  ret = rk_avb_get_perm_attr_cer(rsa_hash, 256);
+  if (ret) {
+    avb_error("get_perm_attr_cer error\n");
+    return false;
+  }
+
+  for (i = 0; i < 256; i++)
+    rsa_hash_revert[255-i] = rsa_hash[i];
+
+  ret = get_rk_crypto_desc(&crypto_desc);
+  if (ret) {
+    avb_error("get_rk_crypto_desc error\n");
+    return false;
+  }
+
+  ret = rk_crypto_rsa_init(&crypto_desc);
+  if (ret) {
+    avb_error("rk_crypto_rsa_init error\n");
+    return false;
+  }
+
+  ret = rk_crypto_rsa_start(&crypto_desc, (u32 *)(rsa_hash_revert),
+                            pub_key.rsa_n, pub_key.rsa_e, pub_key.rsa_c);
+  if (ret) {
+    avb_error("rk_crypto_rsa_start error\n");
+    return false;
+  }
+
+  ret = rk_crypto_rsa_end(&crypto_desc, rsaResult_temp);
+  if (ret) {
+    avb_error("rk_crypto_rsa_end error\n");
+    return false;
+  }
+
+  temp = (char *)rsaResult_temp;
+  for (i = 0; i < 32; i++)
+    rsaResult[31-i] = temp[i];
+
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (memcmp((void*)rsaResult, (void*)hash, 32) == 0)
+    return true;
+
+  return false;
+#endif
+#else
+  if (attributes->version != 1) {
+    avb_error("Unsupported permanent attributes version.\n");
+    return false;
+  }
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid permanent attributes.\n");
+    return false;
+  }
+  return true;
+#endif
+}
+
+/* Verifies the format, key version, usage, and signature of a certificate. */
+static bool verify_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_key_version,
+    const uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
+
+  if (certificate->signed_data.version != 1) {
+    avb_error("Unsupported certificate format.\n");
+    return false;
+  }
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512((const uint8_t*)&certificate->signed_data,
+         sizeof(AvbAtxCertificateSignedData),
+         certificate_hash);
+  if (!avb_rsa_verify(authority,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      certificate->signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      certificate_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid certificate signature.\n");
+    return false;
+  }
+  if (certificate->signed_data.key_version < minimum_key_version) {
+    avb_error("Key rollback detected.\n");
+    return false;
+  }
+  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
+                           expected_usage,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid certificate usage.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PIK certificate. */
+static bool verify_pik_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version) {
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.ca", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PIK certificate.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PSK certificate. */
+static bool verify_psk_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PSK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("PSK: Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PUK certificate. */
+static bool verify_puk_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.unlock", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PUK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("PUK: Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  AvbAtxPublicKeyMetadata metadata;
+  uint64_t minimum_version;
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Read and verify permanent attributes. */
+  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
+                                                   &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = ops->atx_ops->read_permanent_attributes_hash(
+      ops->atx_ops, permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Sanity check public key metadata. */
+  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
+    avb_error("Invalid public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
+  if (metadata.version != 1) {
+    avb_error("Unsupported public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
+                              permanent_attributes.product_root_public_key,
+                              minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_psk_certificate(
+          &metadata.product_signing_key_certificate,
+          metadata.product_intermediate_key_certificate.signed_data.public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK is the same key that verified vbmeta. */
+  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
+    avb_error("Public key length mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  if (0 != avb_safe_memcmp(
+               metadata.product_signing_key_certificate.signed_data.public_key,
+               public_key_data,
+               AVB_ATX_PUBLIC_KEY_SIZE)) {
+    avb_error("Public key mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Report the key versions used during verification. */
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PIK_VERSION_LOCATION,
+      metadata.product_intermediate_key_certificate.signed_data.key_version);
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PSK_VERSION_LOCATION,
+      metadata.product_signing_key_certificate.signed_data.key_version);
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_atx_generate_unlock_challenge(
+    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+
+  /* We need the permanent attributes to compute the product_id_hash. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->get_random(
+      atx_ops, AVB_ATX_UNLOCK_CHALLENGE_SIZE, last_unlock_challenge);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to generate random challenge.\n");
+    return result;
+  }
+  out_unlock_challenge->version = 1;
+  sha256(permanent_attributes.product_id,
+         AVB_ATX_PRODUCT_ID_SIZE,
+         out_unlock_challenge->product_id_hash);
+  avb_memcpy(out_unlock_challenge->challenge,
+             last_unlock_challenge,
+             AVB_ATX_UNLOCK_CHALLENGE_SIZE);
+  return result;
+}
+
+AvbIOResult avb_atx_validate_unlock_credential(
+    AvbAtxOps* atx_ops,
+    const AvbAtxUnlockCredential* unlock_credential,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  uint64_t minimum_version;
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t challenge_hash[AVB_SHA512_DIGEST_SIZE];
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Sanity check the credential. */
+  if (unlock_credential->version != 1) {
+    avb_error("Unsupported unlock credential format.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Read and verify permanent attributes. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->read_permanent_attributes_hash(atx_ops,
+                                                   permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(
+          &unlock_credential->product_intermediate_key_certificate,
+          permanent_attributes.product_root_public_key,
+          minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PUK certificate. The minimum version is shared with the PSK. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_puk_certificate(
+          &unlock_credential->product_unlock_key_certificate,
+          unlock_credential->product_intermediate_key_certificate.signed_data
+              .public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the challenge signature. */
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
+  if (!avb_rsa_verify(unlock_credential->product_unlock_key_certificate
+                          .signed_data.public_key,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      unlock_credential->challenge_signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      challenge_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid unlock challenge signature.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index ba20a41fc8..fca89265ae 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -354,6 +354,7 @@ AvbIOResult avb_read_perm_attr(AvbAtxOps *atx_ops,
 AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
 				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
 {
+#ifndef ROCKCHIP_USE_PRE_LOADER_PUB_KEY
 #ifdef CONFIG_OPTEE_CLIENT
 	if (trusty_read_attribute_hash((uint32_t *)hash,
 				       AVB_SHA256_DIGEST_SIZE / 4))
@@ -361,6 +362,7 @@ AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
 #else
 	avb_error("Please open the macro!\n");
 	return -1;
+#endif
 #endif
 	return AVB_IO_RESULT_OK;
 }

commit 3cf641a8159f0c5ecdafbcabb79f501fc705ba87
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 26 09:29:35 2018 +0800

    fastboot: support write&read perm attr rsa certificate
    
    Change-Id: Iab2ca981dedc188c61c60cd8cebd0f01c5896d44
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 6613935254..b6de1c37f6 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1841,6 +1841,27 @@ static void cb_oem_perm_attr(void)
 #endif
 }
 
+static void cb_oem_perm_attr_rsa_cer(void)
+{
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	if (download_bytes != 256) {
+		printf("Permanent attribute rsahash size is not equal!\n");
+		fastboot_tx_write_str("FAILperm attribute rsahash size error");
+		return;
+	}
+
+	if (rk_avb_set_perm_attr_cer((uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+				     download_bytes)) {
+		fastboot_tx_write_str("FAILSet perm attr cer fail!");
+		return;
+	}
+
+	fastboot_tx_write_str("OKAY");
+#else
+	fastboot_tx_write_str("FAILnot implemented");
+#endif
+}
+
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
@@ -2078,6 +2099,8 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 		cb_oem_perm_attr();
+	} else if (strncmp("fuse at-rsa-perm-attr", cmd + 4, 25) == 0) {
+		cb_oem_perm_attr_rsa_cer();
 	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		sha256_context ctx;

commit 1f670f7cc95cbebf077a9cf2267f0b26240cde42
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Mar 6 18:18:10 2019 +0800

    lib: avb: get public key by atags
    
    Change-Id: I0d77229585263e81e8be4f5c67a02080c07b0e55
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 39d0058824..441856c33c 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -30,6 +30,13 @@ extern "C" {
 #define RPMB_BASE_ADDR		(64*1024/256)
 #define UBOOT_RB_INDEX_OFFSET 24
 #define TRUST_RB_INDEX_OFFSET 28
+#define ROCHCHIP_RSA_PARAMETER_SIZE 64
+
+struct rk_pub_key {
+	u_int32_t rsa_n[ROCHCHIP_RSA_PARAMETER_SIZE];
+	u_int32_t rsa_e[ROCHCHIP_RSA_PARAMETER_SIZE];
+	u_int32_t rsa_c[ROCHCHIP_RSA_PARAMETER_SIZE];
+};
 
 /**
  * Provided to fastboot to read how many slot in this system.
@@ -292,6 +299,13 @@ int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size);
  */
 int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size);
 
+/**
+ * Get public key
+ *
+ * @param pub_key: public key data
+ */
+int rk_avb_get_pub_key(struct rk_pub_key *pub_key);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 2d4fea47ff..f14ff8ad22 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -24,8 +24,21 @@
 #include <android_avb/avb_atx_validate.h>
 #include <android_avb/rk_avb_ops_user.h>
 #include <boot_rkimg.h>
+#include <asm/arch/rk_atags.h>
 
 /* rk used */
+int rk_avb_get_pub_key(struct rk_pub_key *pub_key)
+{
+	struct tag *t = NULL;
+
+	t = atags_get_tag(ATAG_PUB_KEY);
+	if (!t)
+		return -1;
+
+	memcpy(pub_key, t->u.pub_key.data, sizeof(struct rk_pub_key));
+
+	return 0;
+}
 int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size)
 {
 #ifdef CONFIG_OPTEE_CLIENT

commit 9b83ce70a95b30edde529fabddbbdb3fa91a7d3e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Dec 26 09:20:23 2018 +0800

    lib: avb: add get&set perm-attr cer
    
    Change-Id: I89d3a30f43659ae8c9d107ede5db1590b022440d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index c9f3cd7927..39d0058824 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -267,7 +267,6 @@ int rk_auth_unlock(void *buffer, char *out_is_trusted);
  */
 int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
 
-
 /**
  * Get last boot slot
  *
@@ -275,6 +274,24 @@ int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
  */
 int rk_get_lastboot(void);
 
+/**
+ * Get permanent attribute certificate
+ *
+ * @param cer: certificate data
+ *
+ * @param size: certificate size
+ */
+int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size);
+
+/**
+ * Set permanent attribute certificate
+ *
+ * @param cer: certificate data
+ *
+ * @param size: certificate size
+ */
+int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 3edd428f98..2d4fea47ff 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -26,6 +26,30 @@
 #include <boot_rkimg.h>
 
 /* rk used */
+int rk_avb_get_perm_attr_cer(uint8_t *cer, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_permanent_attributes_cer((uint8_t *)cer, size))
+		return -EIO;
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_set_perm_attr_cer(uint8_t *cer, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_permanent_attributes_cer((uint8_t *)cer, size))
+		return -EIO;
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
 int rk_avb_read_slot_count(char *slot_count)
 {
 	*slot_count = SLOT_NUM;

commit 00e55222d361f674ec304d66029deb603bfe7bfc
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Feb 15 19:37:42 2019 +0800

    driver: ram: rk3399: clear interrupt before data training
    
    Clears the corresponding interrupt bit of the PI_INT_STATUS
    parameter before trigger data training.
    
    Change-Id: Ic25c952a19913cb4332b6cd3405f41474585bfb1
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 2d1e094c2f..11641468cc 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1436,6 +1436,9 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 	u32 rank_mask;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	if (sdram_params->base.dramtype == LPDDR4)
 		rank_mask = (rank == 1) ? 0x5 : 0xf;
 	else
@@ -1493,6 +1496,9 @@ static int data_training_wl(const struct chan_info *chan, u32 channel,
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/* PI_60 PI_WRLVL_EN:RW:8:2 */
@@ -1549,6 +1555,9 @@ static int data_training_rg(const struct chan_info *chan, u32 channel,
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/* PI_80 PI_RDLVL_GATE_EN:RW:24:2 */
@@ -1604,6 +1613,9 @@ static int data_training_rl(const struct chan_info *chan, u32 channel,
 	u32 i, tmp;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/* PI_80 PI_RDLVL_EN:RW:16:2 */
@@ -1646,6 +1658,9 @@ static int data_training_wdql(const struct chan_info *chan, u32 channel,
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
 	u32 rank_mask;
 
+	/* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */
+	writel(0x00003f7c, (&denali_pi[175]));
+
 	if (sdram_params->base.dramtype == LPDDR4)
 		rank_mask = (rank == 1) ? 0x5 : 0xf;
 	else

commit 6f226dcaabe6011b2029079cbe04a3c0af083e00
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 23 18:12:37 2019 -0800

    rkflash: change flash_read_page_raw return to error_ecc_bits
    
    1.increase the number of read retry, Triggered only when the
    readout is wrong, so efficiency affects small
    2.add nand buildin ecc support
    3.skip ECC error block instead of marking as bad block
    4.less debug printing
    5.adjust the way of building tables to increase ftl init
    
    Change-Id: I9cbc369472740d472dfad29449d1fd6529cd9877
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 71ed9694ad..c42e6d887f 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -20,6 +20,7 @@ static u8 g_nand_max_die;
 static u16 g_totle_block;
 static u8 g_nand_flash_ecc_bits;
 static u8 g_nand_idb_res_blk_num;
+static u8 g_nand_ecc_en;
 
 static struct NAND_PARA_INFO_T nand_para = {
 	2,
@@ -145,9 +146,28 @@ static void flash_read_random_dataout_cmd(u8 cs, u32 col_addr)
 	nandc_writel(READ_DP_OUT_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
 }
 
+static u32 flash_read_ecc(u8 cs)
+{
+	u32 ecc0, ecc1;
+
+	nandc_writel(READ_ECC_STATUS_CMD, NANDC_CHIP_CMD(cs));
+	nandc_delayns(80);
+	ecc0 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	ecc1 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	if (ecc1 > ecc0)
+		ecc0 = ecc1;
+	ecc1 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	if (ecc1 > ecc0)
+		ecc0 = ecc1;
+	ecc1 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF;
+	if (ecc1 > ecc0)
+		ecc0 = ecc1;
+
+	return ecc0;
+}
+
 static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 {
-	u32 ret = 0;
 	u32 error_ecc_bits;
 	u32 sec_per_page = nand_para.sec_per_page;
 
@@ -160,34 +180,53 @@ static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 
 	error_ecc_bits = nandc_xfer_data(cs, NANDC_READ, sec_per_page,
 					 p_data, p_spare);
-	if (error_ecc_bits > 2) {
-		PRINT_NANDC_E("FlashReadRawPage %x %x error_ecc_bits %d\n",
-			      cs, page_addr, error_ecc_bits);
+	/*
+	if (error_ecc_bits > 12) {
+		PRINT_NANDC_E("%s %x %x error_ecc_bits %d\n",
+			      __func__, cs, page_addr, error_ecc_bits);
 		if (p_data)
-			PRINT_NANDC_HEX("data:", p_data, 4, 8);
+			PRINT_NANDC_HEX("data:", p_data, 4, 2);
 		if (p_spare)
 			PRINT_NANDC_HEX("spare:", p_spare, 4, 2);
 	}
+	*/
 	nandc_flash_de_cs(cs);
 
 	if (error_ecc_bits != NAND_STS_ECC_ERR) {
-		if (error_ecc_bits >= (u32)nand_para.ecc_bits - 3)
-			ret = NAND_STS_REFRESH;
-		else
-			ret = NAND_STS_OK;
+		if (error_ecc_bits >= (u32)nand_para.ecc_bits - 3) {
+			error_ecc_bits = NAND_STS_REFRESH;
+		} else {
+			error_ecc_bits = NAND_STS_OK;
+			if (g_nand_ecc_en) {
+				u32 nand_ecc = flash_read_ecc(cs);
+
+				if (nand_ecc >= 6) {
+					PRINT_NANDC_E("%s nand ecc %x ecc %d\n",
+						      __func__, page_addr, nand_ecc);
+					error_ecc_bits = NAND_STS_REFRESH;
+				}
+			}
+		}
 	}
 
-	return ret;
+	return error_ecc_bits;
 }
 
 static u32 flash_read_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
 {
-	u32 ret;
+	u32 ret, i;
 
 	ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
-	if (ret == NAND_STS_ECC_ERR)
-		ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
-
+	if (ret == NAND_STS_ECC_ERR) {
+		for (i = 0; i < 50; i++) {
+			ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
+			if (ret != NAND_STS_ECC_ERR) {
+				ret = NAND_STS_REFRESH;
+				break;
+			}
+		}
+		PRINT_NANDC_E("flash_read_page %x err_ecc %d\n", page_addr, ret);
+	}
 	return ret;
 }
 
@@ -471,6 +510,7 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 
 	PRINT_NANDC_I("...%s enter...\n", __func__);
 	g_nand_idb_res_blk_num = MAX_IDB_RESERVED_BLOCK;
+	g_nand_ecc_en = 0;
 
 	nandc_init(nandc_addr);
 
@@ -490,6 +530,8 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 				return FTL_UNSUPPORTED_FLASH;
 		}
 	}
+	if (id_byte[0][0] == 0x98 && (id_byte[0][4] & 0x80))
+		g_nand_ecc_en = 1;
 	nand_para.nand_id[1] = id_byte[0][1];
 	if (id_byte[0][1] == 0xDA) {
 		nand_para.plane_per_die = 2;
@@ -500,8 +542,9 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
 		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
-			nand_para.blk_per_plane = 2048;
+			nand_para.blk_per_plane = 1024;;
 			nand_para.sec_per_page = 8;
+			nand_para.plane_per_die = 2;
 		} else {
 			nand_para.plane_per_die = 2;
 			nand_para.blk_per_plane = 2048;
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
index abc3fe14da..92e9878030 100644
--- a/drivers/rkflash/flash.h
+++ b/drivers/rkflash/flash.h
@@ -42,6 +42,7 @@
 #define BLOCK_ERASE_CMD		0x60d0
 #define READ_CMD		0x0030
 #define READ_DP_OUT_CMD		0x05E0
+#define READ_ECC_STATUS_CMD	0x7A
 
 #define SAMSUNG			0x00	/* SAMSUNG */
 #define TOSHIBA			0x01	/* TOSHIBA */
diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h
index 71055797c8..b60875d382 100644
--- a/drivers/rkflash/flash_com.h
+++ b/drivers/rkflash/flash_com.h
@@ -17,6 +17,11 @@
 #define NAND_STS_EMPTY                  512	/* page is not proged */
 #define NAND_STS_ECC_ERR                NAND_ERROR
 
+#define NAND_IDB_START    64 /* 32 KB*/
+#define NAND_IDB_SIZE    512 /* 256 KB*/
+#define NAND_IDB_END    NAND_IDB_START + NAND_IDB_SIZE - 1
+#define DEFAULT_IDB_RESERVED_BLOCK	16
+
 #define FULL_SLC			0
 #define SLC				1
 
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 294e85db8e..ddde4a609f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-12-27
+ * date: 2019-02-20
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -812,126 +812,100 @@ IsInFreeQueue:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L100
-	ldrh	lr, [r3]
-	cmp	lr, r0
+	ldr	r3, .L99
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldrh	r8, [r3]
+	cmp	r8, r0
 	bls	.L86
-	ldr	r3, .L100+4
+	ldr	r3, .L99+4
 	movs	r5, #6
+	muls	r5, r0, r5
 	ldr	r4, [r3]
-	mul	r3, r5, r0
-	str	r3, [sp, #4]
-	adds	r1, r4, r3
-	ldr	r2, [sp, #4]
 	movw	r3, #65535
+	adds	r1, r4, r5
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L100+8
+	strh	r3, [r4, r5]	@ movhi
+	ldr	r3, .L99+8
 	ldr	ip, [r3]
 	cmp	ip, #0
 	bne	.L87
-.L99:
+.L98:
 	str	r1, [r3]
 .L86:
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L87:
-	ldr	r3, .L100+12
-	lsls	r2, r0, #1
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldrh	r6, [r3, r0, lsl #1]
-	ldrh	r3, [r1, #4]
-	cbz	r3, .L97
-	mul	fp, r3, r6
+	ldr	r3, .L99+12
+	ldrh	r6, [r1, #4]
+	ldr	r10, [r3]
+	ldrh	r3, [r10, r0, lsl #1]
+	cbz	r6, .L94
+	muls	r6, r3, r6
 .L88:
-	sub	r3, ip, r4
-	asrs	r6, r3, #1
-	ldr	r3, .L100+16
-	muls	r3, r6, r3
-	ldr	r6, .L100+20
-	ldr	r8, [r6]
-	movs	r6, #0
-	uxth	r3, r3
-	add	r2, r8, r2
-	str	r2, [sp, #12]
-	mov	r2, ip
-.L95:
-	adds	r6, r6, #1
-	uxth	r6, r6
-	cmp	lr, r6
+	sub	r2, ip, r4
+	movs	r7, #0
+	asrs	r3, r2, #1
+	ldr	r2, .L99+16
+	muls	r2, r3, r2
+	mov	r3, ip
+	uxth	r2, r2
+.L92:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r8, r7
 	bcc	.L86
-	cmp	r3, r0
+	cmp	r2, r0
 	beq	.L86
-	ldr	r7, [sp, #8]
-	lsl	r10, r3, #1
-	ldrh	r7, [r7, r3, lsl #1]
-	mov	r5, r7
-	ldrh	r7, [r2, #4]
-	cbz	r7, .L98
-	muls	r7, r5, r7
-.L90:
-	cmp	fp, r7
+	ldrh	lr, [r3, #4]
+	cmp	lr, #0
+	beq	.L90
+	ldrh	fp, [r10, r2, lsl #1]
+	mul	lr, lr, fp
+	cmp	r6, lr
+	bls	.L90
+	ldrh	lr, [r3]
+	movw	fp, #65535
+	cmp	lr, fp
 	bne	.L91
-	ldr	r5, [sp, #12]
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r5]
-	cmp	r10, r7
-	bcc	.L93
-.L92:
-	ldr	r5, [sp, #4]
-	cmp	r2, ip
-	strh	r3, [r4, r5]	@ movhi
-	ldrh	r3, [r2, #2]
-	strh	r3, [r1, #2]	@ movhi
-	bne	.L96
-	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L100+8
-	b	.L99
-.L97:
-	mov	fp, #-1
+	strh	r2, [r1, #2]	@ movhi
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L99+20
+	b	.L98
+.L94:
+	mov	r6, #-1
 	b	.L88
-.L98:
-	mov	r7, #-1
-	b	.L90
 .L91:
-	bcc	.L92
-.L93:
-	ldrh	r7, [r2]
-	movw	r5, #65535
-	cmp	r7, r5
-	bne	.L94
-	strh	r3, [r1, #2]	@ movhi
-	strh	r0, [r2]	@ movhi
-	ldr	r3, .L100+24
-	b	.L99
-.L94:
-	movs	r3, #6
-	mla	r2, r3, r7, r4
-	mov	r3, r7
-	b	.L95
-.L96:
-	ldrh	r1, [r2, #2]
 	movs	r3, #6
-	muls	r3, r1, r3
-	strh	r0, [r4, r3]	@ movhi
-	strh	r0, [r2, #2]	@ movhi
+	mov	r2, lr
+	mla	r3, r3, lr, r4
+	b	.L92
+.L90:
+	strh	r2, [r4, r5]	@ movhi
+	cmp	r3, ip
+	ldrh	r2, [r3, #2]
+	strh	r2, [r1, #2]	@ movhi
+	bne	.L93
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L99+8
+	b	.L98
+.L93:
+	ldrh	r1, [r3, #2]
+	movs	r2, #6
+	muls	r2, r1, r2
+	strh	r0, [r4, r2]	@ movhi
+	strh	r0, [r3, #2]	@ movhi
 	b	.L86
-.L101:
-	.align	2
 .L100:
+	.align	2
+.L99:
 	.word	.LANCHOR5
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR42
 	.word	-1431655765
 	.word	.LANCHOR43
-	.word	.LANCHOR44
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -946,28 +920,28 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L104
+	ldr	r2, .L103
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L104+4
+	ldr	r2, .L103+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L102
+	bcs	.L101
 	movs	r2, #214
-	ldr	r1, .L104+8
-	ldr	r0, .L104+12
+	ldr	r1, .L103+8
+	ldr	r0, .L103+12
 	pop	{r3, lr}
 	b	printf
-.L102:
+.L101:
 	pop	{r3, pc}
-.L105:
-	.align	2
 .L104:
-	.word	.LANCHOR45
+	.align	2
+.L103:
+	.word	.LANCHOR44
 	.word	.LANCHOR5
-	.word	.LANCHOR46
+	.word	.LANCHOR45
 	.word	.LC1
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
@@ -984,48 +958,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L107
-	ldr	r3, .L113
+	beq	.L106
+	ldr	r3, .L112
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L113+4
+	ldr	r3, .L112+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L108
+	cbnz	r6, .L107
 	str	r5, [r3]
-.L107:
+.L106:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L108:
-	ldr	r3, .L113+8
+.L107:
+	ldr	r3, .L112+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L113+12
+	ldr	r2, .L112+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L111:
+.L110:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L109
+	bcs	.L108
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L110
+	bne	.L109
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L107
-.L110:
+	b	.L106
+.L109:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L111
-.L109:
+	b	.L110
+.L108:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -1040,13 +1014,13 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L107
-.L114:
-	.align	2
+	b	.L106
 .L113:
+	.align	2
+.L112:
 	.word	.LANCHOR40
+	.word	.LANCHOR46
 	.word	.LANCHOR47
-	.word	.LANCHOR43
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -1062,25 +1036,25 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L117
+	ldr	r2, .L116
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L117+4
+	ldr	r2, .L116+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L115
+	bcs	.L114
 	movs	r2, #207
-	ldr	r1, .L117+8
-	ldr	r0, .L117+12
+	ldr	r1, .L116+8
+	ldr	r0, .L116+12
 	pop	{r3, lr}
 	b	printf
-.L115:
+.L114:
 	pop	{r3, pc}
-.L118:
-	.align	2
 .L117:
+	.align	2
+.L116:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
@@ -1099,7 +1073,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L125
+	ldr	r5, .L124
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1107,20 +1081,20 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L120
+	bne	.L119
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L120
+	beq	.L119
 	mov	r2, #372
-	ldr	r1, .L125+4
-	ldr	r0, .L125+8
+	ldr	r1, .L124+4
+	ldr	r0, .L124+8
 	bl	printf
-.L120:
+.L119:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L121
+	bne	.L120
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -1131,24 +1105,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L123:
+.L122:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L121:
+.L120:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L124
+	bne	.L123
 	cmp	r1, r3
-	beq	.L123
+	beq	.L122
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L123
-.L124:
+	b	.L122
+.L123:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -1156,10 +1130,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L123
-.L126:
-	.align	2
+	b	.L122
 .L125:
+	.align	2
+.L124:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
@@ -1177,15 +1151,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L133
-	ldr	r2, .L134
+	cbz	r3, .L132
+	ldr	r2, .L133
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L129:
-	cbnz	r1, .L130
-.L132:
-	ldr	r4, .L134+4
+.L128:
+	cbnz	r1, .L129
+.L131:
+	ldr	r4, .L133+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1193,20 +1167,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L130:
+.L129:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L132
+	beq	.L131
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L129
-.L133:
+	b	.L128
+.L132:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L135:
-	.align	2
 .L134:
+	.align	2
+.L133:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -1236,37 +1210,37 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L143
+	ldr	r3, .L142
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L142
-	ldr	r2, .L143+4
+	cbz	r3, .L141
+	ldr	r2, .L142+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L139:
-	cbz	r0, .L140
+.L138:
+	cbz	r0, .L139
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L141
-.L142:
+	bne	.L140
+.L141:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L141:
+.L140:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L139
-.L140:
-	ldr	r0, .L143+8
+	b	.L138
+.L139:
+	ldr	r0, .L142+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L144:
-	.align	2
 .L143:
+	.align	2
+.L142:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1282,61 +1256,61 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L156
+	ldr	r3, .L155
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r3, .L156+4
+	beq	.L146
+	ldr	r3, .L155+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r3, .L156+8
+	beq	.L146
+	ldr	r3, .L155+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L147
-	ldr	r7, .L156+12
+	beq	.L146
+	ldr	r7, .L155+12
 	movs	r6, #6
-	ldr	r3, .L156+16
+	ldr	r3, .L155+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L147
-	ldr	r3, .L156+20
+	beq	.L146
+	ldr	r3, .L155+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L154
+	beq	.L153
 	muls	r5, r2, r5
-.L149:
+.L148:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L150
+	bne	.L149
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L150
+	bne	.L149
 	movw	r2, #463
-	ldr	r1, .L156+24
-	ldr	r0, .L156+28
+	ldr	r1, .L155+24
+	ldr	r0, .L155+28
 	bl	printf
-.L150:
+.L149:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L151
+	bne	.L150
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L147
-.L151:
+	beq	.L146
+.L150:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L156+32
+	ldr	r3, .L155+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -1344,39 +1318,39 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L155
+	cbz	r3, .L154
 	muls	r3, r0, r3
-.L152:
+.L151:
 	cmp	r5, r3
-	bcs	.L147
-	ldr	r5, .L156+36
+	bcs	.L146
+	ldr	r5, .L155+36
 	mov	r1, r4
-	ldr	r0, .L156+16
+	ldr	r0, .L155+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L153
+	cbnz	r3, .L152
 	mov	r2, #474
-	ldr	r1, .L156+24
-	ldr	r0, .L156+28
+	ldr	r1, .L155+24
+	ldr	r0, .L155+28
 	bl	printf
-.L153:
+.L152:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L147:
+.L146:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L154:
+.L153:
 	mov	r5, #-1
-	b	.L149
-.L155:
+	b	.L148
+.L154:
 	mov	r3, #-1
-	b	.L152
-.L157:
-	.align	2
+	b	.L151
 .L156:
+	.align	2
+.L155:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -1386,7 +1360,7 @@ List_update_data_list:
 	.word	.LANCHOR54
 	.word	.LC1
 	.word	-1431655765
-	.word	.LANCHOR45
+	.word	.LANCHOR44
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -1401,79 +1375,79 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L168
+	ldr	r3, .L167
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L168+4
+	ldr	r3, .L167+4
 	ldr	r3, [r3]
-.L159:
+.L158:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L161
+	bcc	.L160
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L162:
+.L161:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L164
+	bcc	.L163
 	cmp	r4, r2
-	bcc	.L160
-	ldr	r1, .L168+8
+	bcc	.L159
+	ldr	r1, .L167+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L165:
+.L164:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L167
+	bcc	.L166
 	cmp	r4, r2
-	bcc	.L160
+	bcc	.L159
 	movw	r2, #789
-	ldr	r1, .L168+12
-	ldr	r0, .L168+16
+	ldr	r1, .L167+12
+	ldr	r0, .L167+16
 	bl	printf
-	b	.L160
-.L161:
+	b	.L159
+.L160:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L159
-.L160:
+	bne	.L158
+.L159:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L164:
+.L163:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L163
+	blt	.L162
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L163:
+.L162:
 	adds	r1, r1, #1
-	b	.L162
-.L167:
+	b	.L161
+.L166:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L166
+	bls	.L165
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L166:
+.L165:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L165
-.L169:
-	.align	2
+	b	.L164
 .L168:
+	.align	2
+.L167:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR56
@@ -1491,45 +1465,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L180
+	ldr	r2, .L179
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L171
-	cbnz	r0, .L171
+	bhi	.L170
+	cbnz	r0, .L170
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L171:
+.L170:
 	movs	r3, #0
-	ldr	r0, .L180+4
+	ldr	r0, .L179+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L180+8
+	ldr	r1, .L179+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L180+12
+	ldr	r2, .L179+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L172:
+.L171:
 	cmp	r1, r4
-	bne	.L174
-	cbz	r3, .L170
+	bne	.L173
+	cbz	r3, .L169
 	str	r0, [r2]
-.L170:
+.L169:
 	pop	{r4, r5, r6, pc}
-.L174:
+.L173:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L172
-.L181:
-	.align	2
+	b	.L171
 .L180:
+	.align	2
+.L179:
 	.word	.LANCHOR58
 	.word	.LANCHOR5
 	.word	.LANCHOR42
@@ -1548,10 +1522,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L183
+	cbz	r1, .L182
 	b	ftl_set_blk_mode.part.6
-.L183:
-	ldr	r2, .L184
+.L182:
+	ldr	r2, .L183
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -1561,9 +1535,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L185:
-	.align	2
 .L184:
+	.align	2
+.L183:
 	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -1578,7 +1552,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L187
+	ldr	r3, .L186
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -1586,9 +1560,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L188:
-	.align	2
 .L187:
+	.align	2
+.L186:
 	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -1606,14 +1580,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L196
+	ldr	r3, .L195
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L190:
+.L189:
 	cmp	r2, r4
-	bcc	.L192
-	ldr	r3, .L196+4
+	bcc	.L191
+	ldr	r3, .L195+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -1621,12 +1595,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L193:
+.L192:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L195
+	bhi	.L194
 	pop	{r4, r5, r6, pc}
-.L192:
+.L191:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1635,8 +1609,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L190
-.L195:
+	b	.L189
+.L194:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1644,10 +1618,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L193
-.L197:
-	.align	2
+	b	.L192
 .L196:
+	.align	2
+.L195:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -1664,24 +1638,24 @@ FtlSlcSuperblockCheck:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
-	cbz	r3, .L198
+	cbz	r3, .L197
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L198
+	beq	.L197
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L204
+	ldr	r2, .L203
 	ldrh	r4, [r2]
 	mov	r2, r3
-.L201:
+.L200:
 	cmp	r1, r2
-	beq	.L203
-.L198:
+	beq	.L202
+.L197:
 	pop	{r4, r5, pc}
-.L203:
+.L202:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1695,10 +1669,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L201
-.L205:
-	.align	2
+	b	.L200
 .L204:
+	.align	2
+.L203:
 	.word	.LANCHOR3
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
@@ -1718,48 +1692,57 @@ make_superblock:
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L207
-	movw	r2, #2156
+	bcc	.L206
+	movw	r2, #2148
 	ldr	r1, .L211+4
 	ldr	r0, .L211+8
 	bl	printf
-.L207:
+.L206:
 	ldr	r3, .L211+12
 	add	r6, r4, #16
-	ldr	r10, .L211+20
+	ldr	r10, .L211+24
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L208:
+.L207:
 	uxth	r3, r5
+	ldrh	r1, [r4]
 	cmp	r8, r3
-	bhi	.L210
+	bhi	.L209
 	ldr	r2, .L211+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	strb	r0, [r4, #9]
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #9]
+	ldr	r3, .L211+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r1, lsl #1]
+	movw	r3, #10000
+	cmp	r2, r3
+	itt	hi
+	movhi	r3, #1
+	strbhi	r3, [r4, #9]
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L210:
-	ldrh	r1, [r4]
+.L209:
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L209
+	cbnz	r0, .L208
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L209:
+.L208:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L208
+	b	.L207
 .L212:
 	.align	2
 .L211:
@@ -1768,6 +1751,7 @@ make_superblock:
 	.word	.LC1
 	.word	.LANCHOR3
 	.word	.LANCHOR19
+	.word	.LANCHOR47
 	.word	.LANCHOR13
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
@@ -1858,10 +1842,10 @@ GetFreeBlockMinEraseCount:
 .L225:
 	.align	2
 .L224:
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -1918,11 +1902,11 @@ GetFreeBlockMaxEraseCount:
 .L235:
 	.align	2
 .L234:
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -1969,49 +1953,52 @@ get_new_active_ppa:
 	mov	r4, r0
 	cmp	r2, r3
 	bne	.L241
-	movw	r2, #2786
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2781
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L241:
-	ldr	r5, .L254+8
+	ldr	r6, .L255+8
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
+	ldrh	r3, [r6]
 	cmp	r2, r3
 	bne	.L242
-	movw	r2, #2787
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2782
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L242:
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L243
-	movw	r2, #2788
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2783
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L243:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	strb	r3, [r4, #10]
-	movw	r6, #65535
+	movw	r5, #65535
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L254+12
+	ldr	r2, .L255+12
 	ldrh	r1, [r2]
 	mov	r2, r3
 .L244:
-	cmp	r0, r6
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	cmp	r0, r5
 	beq	.L246
+	ldrh	r5, [r4, #2]
+	ldrh	r6, [r6]
+	cmp	r5, r6
+	bcs	.L250
 	ldrh	r2, [r4, #4]
-	ldrh	r6, [r4, #2]
+	orr	r5, r5, r0, lsl #10
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movw	r0, #65535
 	subs	r2, r2, #1
 	uxth	r2, r2
-	orr	r6, r6, r0, lsl #10
-	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L248:
+.L249:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2023,21 +2010,21 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L248
+	beq	.L249
 	strb	r3, [r4, #6]
-	ldrh	r1, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r1, r3
+	ldrh	r3, [r4, #2]
+	cmp	r3, r6
 	bne	.L240
 	cbz	r2, .L240
-	movw	r2, #2809
-	ldr	r1, .L254
-	ldr	r0, .L254+4
+	movw	r2, #2806
+	ldr	r1, .L255
+	ldr	r0, .L255+4
 	bl	printf
 .L240:
-	mov	r0, r6
+	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
 .L246:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2051,9 +2038,12 @@ get_new_active_ppa:
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
 	b	.L244
-.L255:
+.L250:
+	movw	r5, #65535
+	b	.L240
+.L256:
 	.align	2
-.L254:
+.L255:
 	.word	.LANCHOR61
 	.word	.LC1
 	.word	.LANCHOR19
@@ -2072,54 +2062,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L261
+	ldr	r1, .L262
 	mov	fp, #1
-	ldr	r2, .L261+4
+	ldr	r2, .L262+4
 	ldr	r5, [r1]
-	ldr	r1, .L261+8
+	ldr	r1, .L262+8
 	str	r3, [r2]
-	ldr	r2, .L261+12
+	ldr	r2, .L262+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L261+16
+	ldr	r1, .L262+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L261+20
+	ldr	r1, .L262+20
 	ldr	r10, [r1]
-	ldr	r1, .L261+24
+	ldr	r1, .L262+24
 	ldrh	r7, [r1]
-	ldr	r1, .L261+28
+	ldr	r1, .L262+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L257:
+.L258:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L258
-	ldr	r3, .L261+32
+	bne	.L259
+	ldr	r3, .L262+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L261+8
+	ldr	r3, .L262+8
 	ldr	r4, [r3]
-	ldr	r3, .L261+20
+	ldr	r3, .L262+20
 	ldr	ip, [r3]
-.L259:
+.L260:
 	cmp	r2, r0
-	bcc	.L260
+	bcc	.L261
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L258:
+.L259:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -2133,8 +2123,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-16]
 	mov	r3, ip
 	str	r6, [r4, #-20]
-	b	.L257
-.L260:
+	b	.L258
+.L261:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -2149,10 +2139,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L259
-.L262:
+	b	.L260
+.L263:
 	.align	2
-.L261:
+.L262:
 	.word	.LANCHOR63
 	.word	.LANCHOR62
 	.word	.LANCHOR64
@@ -2174,41 +2164,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L270
+	ldr	r3, .L271
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #20
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L270+4
+	ldr	r3, .L271+4
 	ldr	r5, [r3]
-.L264:
+.L265:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L263
+	bls	.L264
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L265:
+.L266:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L266
+	bls	.L267
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L265
+	bne	.L266
 	str	lr, [r10, #8]
-.L266:
+.L267:
 	adds	r4, r4, #1
-	b	.L264
-.L263:
+	b	.L265
+.L264:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L271:
+.L272:
 	.align	2
-.L270:
+.L271:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -2223,43 +2213,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L279
+	ldr	r3, .L280
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #20
 	ldr	r4, [r3]
-	ldr	r3, .L279+4
+	ldr	r3, .L280+4
 	ldr	r5, [r3]
-.L273:
+.L274:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L277
+	bhi	.L278
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L277:
+.L278:
 	mov	r10, #0
-.L274:
+.L275:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L275
+	bls	.L276
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L274
+	bne	.L275
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L275:
+.L276:
 	adds	r2, r2, #1
-	b	.L273
-.L280:
+	b	.L274
+.L281:
 	.align	2
-.L279:
+.L280:
 	.word	.LANCHOR67
 	.word	.LANCHOR63
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -2275,25 +2265,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L286
-	ldr	r2, .L286+4
+	ldr	r3, .L287
+	ldr	r2, .L287+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L282:
+.L283:
 	cmp	r3, r2
-	bne	.L284
+	bne	.L285
 	movs	r0, #0
 	bx	lr
-.L284:
+.L285:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L282
+	bne	.L283
 	movs	r0, #1
 	bx	lr
-.L287:
+.L288:
 	.align	2
-.L286:
+.L287:
 	.word	.LANCHOR68
 	.word	.LANCHOR69
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2310,35 +2300,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L292
+	ldr	r4, .L293
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L292+4
+	ldr	r3, .L293+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L289:
+.L290:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L291
-	bne	.L290
+	bcc	.L292
+	bne	.L291
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L290
-.L291:
+	b	.L291
+.L292:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L289
-.L290:
-	ldr	r2, .L292+8
+	bne	.L290
+.L291:
+	ldr	r2, .L293+8
 	movs	r0, #12
-	ldr	r1, .L292+12
+	ldr	r1, .L293+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -2349,9 +2339,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L293:
+.L294:
 	.align	2
-.L292:
+.L293:
 	.word	.LANCHOR69
 	.word	.LANCHOR68
 	.word	.LANCHOR70
@@ -2369,29 +2359,29 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
-	ldr	r4, .L297
+	ldr	r4, .L298
 	ldrh	r5, [r4]
 	cmp	r5, r0
-	beq	.L295
-	ldr	r3, .L297+4
+	beq	.L296
+	ldr	r3, .L298+4
 	ldrh	r1, [r3]
 	cmp	r0, r1
-	beq	.L295
+	beq	.L296
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L296
+	bne	.L297
 	strh	r0, [r4]	@ movhi
-.L295:
+.L296:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L296:
+.L297:
 	cmp	r1, r2
 	it	eq
 	strheq	r0, [r3]	@ movhi
-	b	.L295
-.L298:
+	b	.L296
+.L299:
 	.align	2
-.L297:
+.L298:
 	.word	.LANCHOR72
 	.word	.LANCHOR73
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -2410,33 +2400,33 @@ FtlGcMarkBadPhyBlk:
 	mov	r4, r0
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L303
+	ldr	r2, .L304
 	movs	r1, #0
-	ldr	r5, .L303+4
+	ldr	r5, .L304+4
 	ldrh	r3, [r2]
-.L300:
+.L301:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L302
+	bhi	.L303
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L303+4
+	ldrls	r2, .L304+4
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L301
-.L302:
+	b	.L302
+.L303:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L300
-.L301:
+	bne	.L301
+.L302:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L304:
+.L305:
 	.align	2
-.L303:
+.L304:
 	.word	.LANCHOR74
 	.word	.LANCHOR75
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
@@ -2451,22 +2441,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L311
+	ldr	r3, .L312
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L306
-	ldr	r2, .L311+4
+	cbz	r3, .L307
+	ldr	r2, .L312+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L306
-	ldr	r4, .L311+8
+	bne	.L307
+	ldr	r4, .L312+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L311+12
+	ldr	r3, .L312+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -2474,12 +2464,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L306:
+.L307:
 	movs	r0, #0
 	pop	{r4, pc}
-.L312:
+.L313:
 	.align	2
-.L311:
+.L312:
 	.word	.LANCHOR74
 	.word	.LANCHOR72
 	.word	.LANCHOR76
@@ -2533,48 +2523,48 @@ rknand_print_hex:
 	mov	r10, r3
 	mov	r5, r6
 	mov	r4, r6
-.L316:
+.L317:
 	cmp	r4, r10
-	bcc	.L322
-	ldr	r0, .L325
+	bcc	.L323
+	ldr	r0, .L326
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L322:
-	cbnz	r5, .L317
+.L323:
+	cbnz	r5, .L318
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L325+4
+	ldr	r0, .L326+4
 	bl	printf
-.L317:
+.L318:
 	cmp	r8, #4
-	bne	.L318
+	bne	.L319
 	ldr	r1, [r7, r4, lsl #2]
+.L325:
+	ldr	r0, .L326+8
 .L324:
-	ldr	r0, .L325+8
-.L323:
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L321
+	bls	.L322
 	movs	r5, #0
-	ldr	r0, .L325
+	ldr	r0, .L326
 	bl	printf
-.L321:
+.L322:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L316
-.L318:
+	b	.L317
+.L319:
 	cmp	r8, #2
-	bne	.L320
+	bne	.L321
 	ldrh	r1, [r7, r4, lsl #1]
-	b	.L324
-.L320:
+	b	.L325
+.L321:
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L325+12
-	b	.L323
-.L326:
+	ldr	r0, .L326+12
+	b	.L324
+.L327:
 	.align	2
-.L325:
+.L326:
 	.word	.LC5
 	.word	.LC2
 	.word	.LC3
@@ -2593,41 +2583,41 @@ FlashEraseBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r6, .L343
+	ldr	r6, .L344
 	add	r8, r0, #4
 	movs	r7, #0
-	ldr	fp, .L343+20
+	ldr	fp, .L344+20
 	ldrh	r10, [r6, #12]
 	str	r2, [sp]
 	lsl	r3, r10, #3
 	str	r3, [sp, #4]
-.L328:
+.L329:
 	ldr	r3, [sp]
 	cmp	r7, r3
-	beq	.L342
+	beq	.L343
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r8]
 	bl	l2p_addr_tran.isra.0
 	ldr	r5, [sp, #8]
-	cbnz	r5, .L329
+	cbnz	r5, .L330
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	cmp	r3, r2
-	bls	.L329
-	ldr	r6, .L343+4
-	ldr	r7, .L343+8
-.L330:
+	bls	.L330
+	ldr	r6, .L344+4
+	ldr	r7, .L344+8
+.L331:
 	ldr	r3, [sp]
 	adds	r4, r4, #20
 	cmp	r5, r3
-	bne	.L331
-.L342:
+	bne	.L332
+.L343:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L331:
+.L332:
 	mov	r3, #-1
 	ldr	r2, [sp, #12]
 	str	r3, [r4, #-20]
@@ -2638,44 +2628,44 @@ FlashEraseBlocks:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L343+12
+	ldr	r0, .L344+12
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L343+16
+	ldr	r0, .L344+16
 	bl	rknand_print_hex
-	b	.L330
-.L329:
+	b	.L331
+.L330:
 	ldr	r2, [fp, #4]
 	uxtb	r0, r5
 	ldr	r1, [sp, #12]
 	blx	r2
-	cbnz	r0, .L332
+	cbnz	r0, .L333
 	str	r0, [r8, #-4]
-.L333:
+.L334:
 	ldrh	r2, [r6, #14]
 	cmp	r2, #4
-	bne	.L335
+	bne	.L336
 	ldr	r1, [sp, #12]
 	ldr	r2, [fp, #4]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	add	r1, r1, r10
 	blx	r2
-	cbz	r0, .L335
+	cbz	r0, .L336
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-.L335:
+.L336:
 	adds	r7, r7, #1
 	add	r8, r8, #20
-	b	.L328
-.L332:
+	b	.L329
+.L333:
 	mov	r2, #-1
 	str	r2, [r8, #-4]
-	b	.L333
-.L344:
+	b	.L334
+.L345:
 	.align	2
-.L343:
+.L344:
 	.word	.LANCHOR0
 	.word	.LANCHOR77
 	.word	.LC6
@@ -2700,14 +2690,14 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L345
-	ldr	r4, .L354
+	bhi	.L346
+	ldr	r4, .L355
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L345
-	cbz	r1, .L347
+	beq	.L346
+	cbz	r1, .L348
 	bl	P2V_block_in_plane
-	ldr	r3, .L354+4
+	ldr	r3, .L355+4
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -2715,16 +2705,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L354+8
+	ldr	r3, .L355+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L354+12
+	ldr	r2, .L355+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L347:
+.L348:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -2734,14 +2724,14 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L345:
+.L346:
 	pop	{r4, r5, r6, pc}
-.L355:
+.L356:
 	.align	2
-.L354:
+.L355:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.word	.LANCHOR80
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
@@ -2756,9 +2746,9 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L361
+	ldr	r4, .L362
 	ldrh	r2, [r4, #6]
-	cbz	r2, .L360
+	cbz	r2, .L361
 	ldrh	r3, [r4, #2]
 	subs	r2, r2, #1
 	strh	r2, [r4, #6]	@ movhi
@@ -2769,36 +2759,36 @@ FtlFreeSysBlkQueueOut:
 	ldrh	r5, [r4, r1, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
 	mov	r1, r2
-	ldr	r3, .L361+4
+	ldr	r3, .L362+4
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r2, .L361+8
+	ldr	r2, .L362+8
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L357:
+.L358:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L358
+	bls	.L359
 	ldrh	r2, [r4, #6]
 	mov	r1, r5
-	ldr	r0, .L361+12
+	ldr	r0, .L362+12
 	bl	printf
-.L359:
-	b	.L359
 .L360:
+	b	.L360
+.L361:
 	movw	r5, #65535
-	b	.L357
-.L358:
+	b	.L358
+.L359:
 	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L362:
+.L363:
 	.align	2
-.L361:
+.L362:
 	.word	.LANCHOR38
 	.word	.LANCHOR79
 	.word	.LANCHOR80
@@ -2820,16 +2810,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L364:
+.L365:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L367
+	bcs	.L368
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L364
+	bne	.L365
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -2837,14 +2827,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L365
-	ldr	r3, .L371
-	ldr	r0, .L371+4
+	bls	.L366
+	ldr	r3, .L372
+	ldr	r0, .L372+4
 	ldrh	r2, [r3, #6]
 	bl	printf
+.L367:
+	b	.L367
 .L366:
-	b	.L366
-.L365:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -2853,20 +2843,20 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L367:
+.L368:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L369
+	bhi	.L370
 	movw	r2, #578
-	ldr	r1, .L371+8
-	ldr	r0, .L371+12
+	ldr	r1, .L372+8
+	ldr	r0, .L372+12
 	bl	printf
-.L369:
+.L370:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L372:
+.L373:
 	.align	2
-.L371:
+.L372:
 	.word	.LANCHOR38
 	.word	.LC10
 	.word	.LANCHOR81
@@ -2897,102 +2887,102 @@ ftl_memset:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L379
+	ldr	r3, .L380
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L379+4
+	ldr	r2, .L380+4
 	movs	r6, #12
 	str	r4, [r3]
-	ldr	r3, .L379+8
-	ldr	r5, .L379+12
-	ldr	r10, .L379+292
+	ldr	r3, .L380+8
+	ldr	r5, .L380+12
+	ldr	r10, .L380+292
 	str	r4, [r3]
-	ldr	r3, .L379+16
+	ldr	r3, .L380+16
 	ldrh	r0, [r5]
-	ldr	r8, .L379+296
+	ldr	r8, .L380+296
 	str	r4, [r3]
-	ldr	r3, .L379+20
+	ldr	r3, .L380+20
 	lsls	r0, r0, #1
-	ldr	fp, .L379+300
+	ldr	fp, .L380+300
 	str	r4, [r3]
-	ldr	r3, .L379+24
+	ldr	r3, .L380+24
 	str	r4, [r3]
-	ldr	r3, .L379+28
+	ldr	r3, .L380+28
 	str	r4, [r3]
-	ldr	r3, .L379+32
+	ldr	r3, .L380+32
 	str	r4, [r3]
-	ldr	r3, .L379+36
+	ldr	r3, .L380+36
 	str	r4, [r3]
-	ldr	r3, .L379+40
+	ldr	r3, .L380+40
 	str	r4, [r3]
-	ldr	r3, .L379+44
+	ldr	r3, .L380+44
 	str	r4, [r3]
-	ldr	r3, .L379+48
+	ldr	r3, .L380+48
 	str	r4, [r3]
-	ldr	r3, .L379+52
+	ldr	r3, .L380+52
 	str	r4, [r3]
-	ldr	r3, .L379+56
+	ldr	r3, .L380+56
 	str	r4, [r3]
-	ldr	r3, .L379+60
+	ldr	r3, .L380+60
 	str	r4, [r3]
-	ldr	r3, .L379+64
+	ldr	r3, .L380+64
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L379+68
+	ldr	r2, .L380+68
 	str	r4, [r2]
-	ldr	r2, .L379+72
+	ldr	r2, .L380+72
 	str	r4, [r2]
-	ldr	r2, .L379+76
+	ldr	r2, .L380+76
 	str	r4, [r2]
-	ldr	r2, .L379+80
+	ldr	r2, .L380+80
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L379+84
+	ldr	r2, .L380+84
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L379+88
+	ldr	r3, .L380+88
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L379+92
+	ldr	r3, .L380+92
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L379+96
+	ldr	r3, .L380+96
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L379+100
+	ldr	r3, .L380+100
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L379+104
+	ldr	r3, .L380+104
 	strh	r4, [r3]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L379+108
+	ldr	r3, .L380+108
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #20
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+112
+	ldr	r3, .L380+112
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L379+116
+	ldr	r3, .L380+116
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+120
+	ldr	r3, .L380+120
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L379+124
-	ldr	r7, .L379+128
+	ldr	r3, .L380+124
+	ldr	r7, .L380+128
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+132
+	ldr	r3, .L380+132
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+136
+	ldr	r3, .L380+136
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -3001,166 +2991,166 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L379+140
+	ldr	r3, .L380+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+144
+	ldr	r3, .L380+144
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+148
+	ldr	r3, .L380+148
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+152
+	ldr	r3, .L380+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+156
+	ldr	r3, .L380+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+160
+	ldr	r3, .L380+160
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+164
+	ldr	r3, .L380+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+168
+	ldr	r3, .L380+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+172
+	ldr	r3, .L380+172
 	str	r0, [r3]
-	ldr	r3, .L379+176
+	ldr	r3, .L380+176
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+180
+	ldr	r3, .L380+180
 	ldrh	r5, [r10]
-	ldr	r10, .L379+304
+	ldr	r10, .L380+304
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L379+184
+	ldr	r3, .L380+184
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L379+188
+	ldr	r5, .L380+188
 	bl	ftl_malloc
-	ldr	r3, .L379+192
+	ldr	r3, .L380+192
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L379+308
+	ldr	r8, .L380+308
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+196
+	ldr	r3, .L380+196
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L379+200
+	ldr	r3, .L380+200
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L379+204
+	ldr	r0, .L380+204
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L379+208
+	ldr	r3, .L380+208
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L379+212
+	ldr	r3, .L380+212
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L379+216
+	ldr	r3, .L380+216
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L379+220
+	ldr	r3, .L380+220
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L379+224
-	ldr	r8, .L379+312
+	ldr	r3, .L380+224
+	ldr	r8, .L380+312
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L379+228
+	ldr	r3, .L380+228
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L379+232
+	ldr	r3, .L380+232
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L379+236
+	ldr	r3, .L380+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L379+316
+	ldr	r8, .L380+316
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+240
+	ldr	r3, .L380+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L379+244
-	ldr	r4, .L379+248
+	ldr	r3, .L380+244
+	ldr	r4, .L380+248
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L379+252
+	ldr	r3, .L380+252
 	ldrh	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+256
+	ldr	r3, .L380+256
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L379+260
+	ldr	r3, .L380+260
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L379+264
+	ldr	r6, .L380+264
 	bl	ftl_malloc
-	ldr	r3, .L379+268
+	ldr	r3, .L380+268
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+272
+	ldr	r3, .L380+272
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L379+276
+	ldr	r5, .L380+276
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L379+280
+	ldr	r3, .L380+280
 	str	r0, [r3]
-	ldr	r3, .L379+284
+	ldr	r3, .L380+284
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -3171,16 +3161,16 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L379+288
+	ldr	r3, .L380+288
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
 	mov	r0, r1
-	b	.L380
-.L381:
+	b	.L381
+.L382:
 	.align	2
-.L379:
+.L380:
 	.word	.LANCHOR82
 	.word	.LANCHOR96
 	.word	.LANCHOR83
@@ -3234,7 +3224,7 @@ FtlMemInit:
 	.word	.LANCHOR117
 	.word	33553920
 	.word	.LANCHOR118
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.word	.LANCHOR42
 	.word	.LANCHOR119
 	.word	.LANCHOR120
@@ -3261,32 +3251,32 @@ FtlMemInit:
 	.word	.LANCHOR116
 	.word	.LANCHOR27
 	.word	.LANCHOR28
-.L380:
-.L375:
+.L381:
+.L376:
 	cmp	r2, r6
-	bcc	.L376
+	bcc	.L377
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L382
+	ldr	r2, .L383
 	movs	r1, #0
 	adds	r3, r3, #24
-.L377:
+.L378:
 	cmp	r3, r2
-	bne	.L378
+	bne	.L379
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L376:
+.L377:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L375
-.L378:
+	b	.L376
+.L379:
 	str	r1, [r3, #4]!
-	b	.L377
-.L383:
+	b	.L378
+.L384:
 	.align	2
-.L382:
+.L383:
 	.word	.LANCHOR37+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
@@ -3300,32 +3290,32 @@ FtlMemInit:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L390
+	ldr	r3, .L391
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L390+4
+	ldr	r7, .L391+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L390+12
+	ldr	r8, .L391+12
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L387:
+.L388:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L384
+	beq	.L385
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L386
+	bhi	.L387
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L390+8
+	ldr	r0, .L391+8
 	bl	printf
-.L386:
+.L387:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -3335,12 +3325,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L387
-.L384:
+	bne	.L388
+.L385:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L391:
+.L392:
 	.align	2
-.L390:
+.L391:
 	.word	.LANCHOR127
 	.word	.LANCHOR17
 	.word	.LC1
@@ -3358,7 +3348,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L393
+	ldr	r0, .L394
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -3367,9 +3357,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L394:
+.L395:
 	.align	2
-.L393:
+.L394:
 	.word	.LANCHOR37
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -3383,7 +3373,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L396
+	ldr	r3, .L397
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -3396,9 +3386,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L397:
+.L398:
 	.align	2
-.L396:
+.L397:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -3423,12 +3413,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L399:
+.L400:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L403
-	ldr	r3, .L418
+	bhi	.L404
+	ldr	r3, .L419
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -3436,59 +3426,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L404:
+.L405:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L408
+	bhi	.L409
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L403:
+.L404:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L400:
+.L401:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L402
+	bhi	.L403
 	adds	r3, r3, #1
-	b	.L399
-.L402:
+	b	.L400
+.L403:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L401
-	cbz	r1, .L401
+	bne	.L402
+	cbz	r1, .L402
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L401:
+.L402:
 	adds	r2, r2, #1
-	b	.L400
-.L408:
+	b	.L401
+.L409:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L405
+	bls	.L406
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L406
-.L407:
+	cbnz	r0, .L407
+.L408:
 	adds	r6, r6, #1
-	b	.L404
-.L405:
+	b	.L405
+.L406:
 	cmp	r3, #0
-	bne	.L407
+	bne	.L408
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L407
-.L409:
+	beq	.L408
+.L410:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -3497,16 +3487,16 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L407
-.L406:
+	b	.L408
+.L407:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L409
-	b	.L407
-.L419:
+	beq	.L410
+	b	.L408
+.L420:
 	.align	2
-.L418:
+.L419:
 	.word	.LANCHOR20
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -3522,14 +3512,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L423
-	ldr	r4, .L423+4
+	ldr	r5, .L424
+	ldr	r4, .L424+4
 	ldr	r2, [r5]
-	ldr	r7, .L423+8
-	ldr	r6, .L423+12
+	ldr	r7, .L424+8
+	ldr	r6, .L424+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L423+44
+	ldr	r8, .L424+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -3537,7 +3527,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L423+16
+	ldr	r3, .L424+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -3548,47 +3538,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L421:
+.L422:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L422
-	ldr	r3, .L423+20
+	bne	.L423
+	ldr	r3, .L424+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L423+24
+	ldr	r2, .L424+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L423+28
+	ldr	r2, .L424+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L423+32
+	ldr	r2, .L424+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L423+36
+	ldr	r2, .L424+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L423+40
+	ldr	r2, .L424+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L422:
+.L423:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L421
-.L424:
+	b	.L422
+.L425:
 	.align	2
-.L423:
+.L424:
 	.word	.LANCHOR30
 	.word	.LANCHOR120
 	.word	.LANCHOR23
@@ -3615,53 +3605,53 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r2, #65535
-	ldr	r3, .L426
+	ldr	r3, .L427
 	movs	r4, #0
 	mov	r1, r4
-	ldr	r5, .L426+4
+	ldr	r5, .L427+4
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L426+8
+	ldr	r3, .L427+8
 	str	r4, [r3]
-	ldr	r3, .L426+12
+	ldr	r3, .L427+12
 	str	r4, [r3]
-	ldr	r3, .L426+16
+	ldr	r3, .L427+16
 	str	r2, [r3]
-	ldr	r3, .L426+20
+	ldr	r3, .L427+20
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L426+24
+	ldr	r3, .L427+24
 	ldrh	r2, [r3]
-	ldr	r3, .L426+28
+	ldr	r3, .L427+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L426+32
+	ldr	r3, .L427+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L426+36
+	ldr	r3, .L427+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L426+40
+	ldr	r0, .L427+40
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L426+44
+	ldr	r0, .L427+44
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L427:
+.L428:
 	.align	2
-.L426:
+.L427:
 	.word	.LANCHOR131
 	.word	.LANCHOR6
 	.word	.LANCHOR132
@@ -3670,7 +3660,7 @@ FtlVariablesInit:
 	.word	.LANCHOR35
 	.word	.LANCHOR27
 	.word	.LANCHOR36
-	.word	.LANCHOR43
+	.word	.LANCHOR47
 	.word	.LANCHOR117
 	.word	.LANCHOR39
 	.word	.LANCHOR135
@@ -3688,10 +3678,10 @@ SupperBlkListInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r2, #6
-	ldr	r3, .L439
+	ldr	r3, .L440
 	movs	r1, #0
 	movs	r4, #0
-	ldr	r6, .L439+4
+	ldr	r6, .L440+4
 	mov	r8, r4
 	ldrh	r3, [r3]
 	mov	r5, r4
@@ -3699,125 +3689,125 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L439+8
-	ldr	r2, .L439+12
+	ldr	r3, .L440+8
+	ldr	r2, .L440+12
 	str	r4, [r3]
-	ldr	r3, .L439+16
+	ldr	r3, .L440+16
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
 	str	r4, [r3]
-	ldr	r3, .L439+20
+	ldr	r3, .L440+20
 	str	r4, [r3]
-	ldr	r3, .L439+24
+	ldr	r3, .L440+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L429:
-	ldr	r3, .L439+28
+.L430:
+	ldr	r3, .L440+28
 	uxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L436
-	ldr	r3, .L439+32
+	bcs	.L437
+	ldr	r3, .L440+32
 	ldrh	r2, [r3]
-	ldr	r3, .L439+36
+	ldr	r3, .L440+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L437
-.L431:
+	b	.L438
+.L432:
 	str	r2, [sp, #12]
 	mov	r1, r7
-	ldr	r2, .L439+40
+	ldr	r2, .L440+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L430
+	cbnz	r0, .L431
 	ldr	r1, [sp]
 	add	r6, r6, r1
 	uxth	r6, r6
-.L430:
+.L431:
 	adds	r3, r3, #1
-.L437:
+.L438:
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L431
+	bhi	.L432
 	uxth	r3, r4
-	cbz	r6, .L432
+	cbz	r6, .L433
 	mov	r1, r6
 	str	r3, [sp]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp]
 	uxth	r6, r0
-.L433:
+.L434:
 	ldr	r1, [r10]
 	movs	r2, #6
 	mla	r2, r2, r3, r1
 	strh	r6, [r2, #4]	@ movhi
-	ldr	r2, .L439+44
+	ldr	r2, .L440+44
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L434
-	ldr	r2, .L439+48
+	beq	.L435
+	ldr	r2, .L440+48
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L434
-	ldr	r2, .L439+52
+	beq	.L435
+	ldr	r2, .L440+52
 	ldrh	r2, [r2]
 	cmp	r2, r7
-	beq	.L434
-	ldr	r2, .L439+56
+	beq	.L435
+	ldr	r2, .L440+56
 	ldr	r2, [r2]
 	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L435
+	cbnz	r3, .L436
 	add	r8, r8, #1
 	mov	r0, r7
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L434:
+.L435:
 	adds	r4, r4, #1
-	b	.L429
-.L432:
-	ldr	r2, .L439+56
+	b	.L430
+.L433:
+	ldr	r2, .L440+56
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r3, lsl #1]	@ movhi
-	b	.L433
-.L435:
+	b	.L434
+.L436:
 	adds	r5, r5, #1
 	mov	r0, r7
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L434
-.L436:
+	b	.L435
+.L437:
 	ldr	r2, [sp, #4]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r5, r3
-	ble	.L438
-	movw	r2, #2216
-	ldr	r1, .L439+60
-	ldr	r0, .L439+64
+	ble	.L439
+	movw	r2, #2210
+	ldr	r1, .L440+60
+	ldr	r0, .L440+64
 	bl	printf
-.L438:
+.L439:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L440:
+.L441:
 	.align	2
-.L439:
+.L440:
 	.word	.LANCHOR6
 	.word	.LANCHOR40
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LANCHOR41
+	.word	.LANCHOR46
 	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR43
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR3
@@ -3841,16 +3831,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L442
+	ldr	r2, .L443
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L442+4
+	ldr	r4, .L443+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L442+8
+	ldr	r2, .L443+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L442+12
+	ldr	r3, .L443+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -3858,14 +3848,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L442+16
+	ldr	r3, .L443+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L443:
+.L444:
 	.align	2
-.L442:
+.L443:
 	.word	.LANCHOR69
 	.word	.LANCHOR21
 	.word	.LANCHOR70
@@ -3889,39 +3879,39 @@ FlashGetBadBlockList:
 	movs	r1, #255
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L451
+	ldr	r3, .L452
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
 	uxth	r0, r0
 	cmp	r0, #50
-	bls	.L445
+	bls	.L446
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
 	bl	ftl_memset
 	movs	r0, #0
-.L445:
-	ldr	r3, .L451+4
+.L446:
+	ldr	r3, .L452+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L450
+	bne	.L451
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L447:
+.L448:
 	cmp	r3, r1
-	bne	.L448
-.L450:
+	bne	.L449
+.L451:
 	pop	{r3, r4, r5, pc}
-.L448:
+.L449:
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L447
-.L452:
+	b	.L448
+.L453:
 	.align	2
-.L451:
+.L452:
 	.word	.LANCHOR78
 	.word	.LANCHOR0
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -3952,48 +3942,48 @@ FlashReadPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r1
-	ldr	r3, .L482
+	ldr	r3, .L495
 	mov	r4, r0
 	mov	r10, #0
 	ldrh	r2, [r3, #12]
 	str	r3, [sp, #4]
 	str	r2, [sp]
-.L455:
+.L456:
 	cmp	r10, fp
-	bne	.L466
+	bne	.L470
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L466:
+.L470:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L456
+	cbz	r3, .L457
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L457
-.L456:
+	cbnz	r3, .L458
+.L457:
 	movs	r2, #90
-	ldr	r1, .L482+4
-	ldr	r0, .L482+8
+	ldr	r1, .L495+4
+	ldr	r0, .L495+8
 	bl	printf
-.L457:
+.L458:
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r0, [sp, #8]
 	cmp	r0, #3
-	bls	.L458
+	bls	.L459
 	mov	r3, #-1
 	str	r3, [r4]
-.L459:
+.L460:
 	add	r10, r10, #1
 	adds	r4, r4, #20
-	b	.L455
-.L458:
+	b	.L456
+.L459:
 	ldr	r5, [r4, #8]
 	uxtb	r0, r0
-	ldr	r8, .L482+20
-	ldr	r7, .L482+12
+	ldr	r8, .L495+32
+	ldr	r7, .L495+12
 	tst	r5, #63
 	ldr	r3, [r4, #12]
 	it	ne
@@ -4006,7 +3996,7 @@ FlashReadPages:
 	str	r0, [r4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L462
+	bne	.L463
 	ldr	r0, [sp]
 	add	r2, r5, #2048
 	ldr	r3, [r4, #12]
@@ -4016,48 +4006,75 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r7
-	adds	r3, r0, #1
-	beq	.L463
+	adds	r1, r0, #1
+	beq	.L464
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L464
+	bne	.L465
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L464
+	bne	.L465
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L464
-.L463:
+	beq	.L465
+.L464:
 	mov	r3, #-1
 	str	r3, [r4]
-.L464:
+.L465:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L462
+	beq	.L466
 	cmp	r0, #256
 	it	eq
 	streq	r0, [r4]
-.L462:
+.L466:
+	ldr	r3, [r4]
+	adds	r2, r3, #1
+	beq	.L467
+	cmp	r3, #256
+	bne	.L463
+.L467:
+	ldr	r1, [r4, #4]
+	ldr	r2, [sp, #12]
+	ldr	r0, .L495+16
+	bl	printf
+	ldr	r1, [r4, #8]
+	cbz	r1, .L469
+	movs	r3, #4
+	ldr	r0, .L495+20
+	mov	r2, r3
+	bl	rknand_print_hex
+.L469:
+	ldr	r1, [r4, #12]
+	cbz	r1, .L463
+	movs	r3, #4
+	ldr	r0, .L495+24
+	mov	r2, r3
+	bl	rknand_print_hex
+.L463:
 	ldr	r3, [r8]
 	cmp	r5, r3
-	bne	.L459
+	bne	.L460
 	ldr	r0, [r4, #8]
 	cmp	r5, r0
-	beq	.L459
-	ldr	r3, .L482+16
+	beq	.L460
+	ldr	r3, .L495+28
 	mov	r1, r5
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-	b	.L459
-.L483:
+	b	.L460
+.L496:
 	.align	2
-.L482:
+.L495:
 	.word	.LANCHOR0
 	.word	.LANCHOR137
 	.word	.LC1
 	.word	.LANCHOR78
+	.word	.LC11
+	.word	.LC12
+	.word	.LC13
 	.word	.LANCHOR12
 	.word	.LANCHOR111
 	.size	FlashReadPages, .-FlashReadPages
@@ -4072,36 +4089,36 @@ FlashReadPages:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L494
+	ldr	r3, .L507
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L494+4
+	ldr	r5, .L507+4
 	ldr	r3, [r3]
-	ldr	r7, .L494+8
-	ldr	r10, .L494+20
+	ldr	r7, .L507+8
+	ldr	r10, .L507+20
 	str	r3, [r5, #8]
-	ldr	r3, .L494+12
+	ldr	r3, .L507+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L485:
-	ldr	r3, .L494+16
+.L498:
+	ldr	r3, .L507+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L490
+	bcc	.L503
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L490:
+.L503:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L494+4
+	ldr	fp, .L507+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L486:
+.L499:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L488
+	bgt	.L501
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -4111,22 +4128,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L487
+	beq	.L500
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L487
+	bne	.L500
 	strh	r4, [r7]	@ movhi
-.L488:
+.L501:
 	adds	r6, r6, #1
-	b	.L485
-.L487:
+	b	.L498
+.L500:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L486
-.L495:
+	b	.L499
+.L508:
 	.align	2
-.L494:
+.L507:
 	.word	.LANCHOR106
 	.word	.LANCHOR138
 	.word	.LANCHOR37+10
@@ -4148,17 +4165,17 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L508
+	ldreq	r3, .L521
 	sub	sp, sp, #88
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L508+4
+	ldrne	r3, .L521+4
 	mov	r6, r1
 	add	r0, sp, #4
 	movs	r1, #1
 	ldrh	r5, [r3]
-	ldr	r3, .L508+8
+	ldr	r3, .L521+8
 	subs	r5, r5, #1
 	ldr	r3, [r3]
 	sxth	r5, r5
@@ -4170,17 +4187,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L499
+	bne	.L512
 	mov	r8, #0
-.L500:
+.L513:
 	cmp	r8, r5
-	ble	.L503
-.L499:
+	ble	.L516
+.L512:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L503:
+.L516:
 	add	r3, r8, r5
 	mov	r2, r6
 	add	r3, r3, r3, lsr #31
@@ -4193,23 +4210,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L501
+	bne	.L514
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L501
+	bne	.L514
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L501
+	beq	.L514
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L500
-.L501:
+	b	.L513
+.L514:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L500
-.L509:
+	b	.L513
+.L522:
 	.align	2
-.L508:
+.L521:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	.LANCHOR112
@@ -4227,69 +4244,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L591
+	ldr	r5, .L604
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L591+4
+	ldr	r3, .L604+4
 	ldr	r2, [r5]
-	ldr	r6, .L591+8
+	ldr	r6, .L604+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L591+12
+	ldr	r3, .L604+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L591+16
+	ldr	r7, .L604+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L591+20
+	ldr	r3, .L604+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L591+24
+	ldr	r3, .L604+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L591+28
+	ldr	r3, .L604+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L591+32
+	ldr	r0, .L604+32
 	bl	ftl_memset
-	ldr	r3, .L591+36
+	ldr	r3, .L604+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L511:
-	ldr	r3, .L591+40
+.L524:
+	ldr	r3, .L604+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L552
-	ldr	r3, .L591+44
+	bls	.L565
+	ldr	r3, .L604+44
 	movs	r5, #0
-	ldr	r1, .L591+48
+	ldr	r1, .L604+48
 	mov	fp, r5
 	movs	r7, #20
 	ldrh	r8, [r3]
-	ldr	r3, .L591+52
+	ldr	r3, .L604+52
 	ldr	r2, [r1]
-	ldr	r1, .L591+56
+	ldr	r1, .L604+56
 	ldr	r6, [r3]
-	ldr	r3, .L591+60
+	ldr	r3, .L604+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L591+64
-	b	.L553
-.L513:
+	ldr	r2, .L604+64
+	b	.L566
+.L526:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -4299,7 +4316,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L512
+	cbnz	r0, .L525
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -4312,31 +4329,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L512:
+.L525:
 	adds	r5, r5, #1
-.L553:
+.L566:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L513
+	bhi	.L526
 	cmp	fp, #0
-	bne	.L514
-.L551:
+	bne	.L527
+.L564:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L511
-.L514:
+	b	.L524
+.L527:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L515:
+.L528:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L551
-	ldr	r3, .L591+52
+	bls	.L564
+	ldr	r3, .L604+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -4346,10 +4363,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L518
+	bne	.L531
 	mov	r10, #16
-.L520:
-	ldr	r3, .L591+52
+.L533:
+	ldr	r3, .L604+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -4361,83 +4378,83 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L591+52
+	ldr	r3, .L604+52
 	ldr	r3, [r3]
-	bne	.L517
+	bne	.L530
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L591+52
+	ldr	r3, .L604+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L518
-.L519:
+	bne	.L531
+.L532:
 	movs	r1, #1
-	b	.L590
-.L517:
+	b	.L603
+.L530:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L518
+	bne	.L531
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L520
-	b	.L519
-.L518:
-	ldr	r3, .L591+68
+	bne	.L533
+	b	.L532
+.L531:
+	ldr	r3, .L604+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L521
+	beq	.L534
 	cmp	r2, r3
-	bhi	.L522
-.L521:
+	bhi	.L535
+.L534:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L591+68
+	ldrne	r1, .L604+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L522:
+.L535:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L524
-	bhi	.L525
+	beq	.L537
+	bhi	.L538
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L526
-.L523:
+	beq	.L539
+.L536:
 	adds	r7, r7, #1
-	b	.L515
-.L525:
+	b	.L528
+.L538:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L527
+	beq	.L540
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L523
+	bne	.L536
 	movs	r1, #0
-.L590:
+.L603:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L523
-.L527:
-	ldr	r3, .L591+8
+	b	.L536
+.L540:
+	ldr	r3, .L604+8
 	ldrh	r2, [r3]
-	ldr	r3, .L591
+	ldr	r3, .L604
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L529
+	bls	.L542
 	movw	r2, #1225
-	ldr	r1, .L591+72
-	ldr	r0, .L591+76
+	ldr	r1, .L604+72
+	ldr	r0, .L604+76
 	bl	printf
-.L529:
+.L542:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L591+12
+	ldr	r2, .L604+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -4445,61 +4462,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L530:
+.L543:
 	cmp	r3, r10
-	bgt	.L536
+	bgt	.L549
 	cmp	r3, #0
-	bge	.L568
-	b	.L523
-.L536:
+	bge	.L581
+	b	.L536
+.L549:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L531
+	bls	.L544
 	ldr	r2, [ip]
-	cbnz	r2, .L532
+	cbnz	r2, .L545
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L591+8
+	ldrne	r2, .L604+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L532:
-	ldr	r2, .L591+20
+.L545:
+	ldr	r2, .L604+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L533:
+.L546:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L534
+	bhi	.L547
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L523
-	ldr	r2, .L591+8
+	blt	.L536
+	ldr	r2, .L604+8
 	ldrh	r0, [r2]
-	ldr	r2, .L591
+	ldr	r2, .L604
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L523
-.L568:
-	ldr	r2, .L591+8
+	bgt	.L536
+.L581:
+	ldr	r2, .L604+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L591+20
-.L588:
+	ldr	r2, .L604+20
+.L601:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L523
-.L534:
+	b	.L536
+.L547:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4507,14 +4524,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L533
-.L531:
+	b	.L546
+.L544:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L530
-.L592:
+	b	.L543
+.L605:
 	.align	2
-.L591:
+.L604:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR130
@@ -4535,72 +4552,72 @@ FtlScanSysBlk:
 	.word	.LANCHOR82
 	.word	.LANCHOR140
 	.word	.LC1
-.L526:
-	ldr	r8, .L593+12
-	ldr	r10, .L593+20
+.L539:
+	ldr	r8, .L606+12
+	ldr	r10, .L606+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L539
+	bls	.L552
 	movw	r2, #1266
-	ldr	r1, .L593
-	ldr	r0, .L593+4
+	ldr	r1, .L606
+	ldr	r0, .L606+4
 	bl	printf
-.L539:
-	ldr	r2, .L593+8
+.L552:
+	ldr	r2, .L606+8
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L540:
+.L553:
 	cmp	r3, r10
-	ble	.L545
+	ble	.L558
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L541
+	bls	.L554
 	ldr	r2, [r0]
-	cbnz	r2, .L542
+	cbnz	r2, .L555
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L593+12
+	ldrne	r2, .L606+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L542:
-	ldr	r2, .L593+16
+.L555:
+	ldr	r2, .L606+16
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L543:
+.L556:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L544
+	bhi	.L557
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L545:
+.L558:
 	cmp	r3, #0
-	blt	.L523
-	ldr	r2, .L593+20
-	ldr	ip, .L593+12
+	blt	.L536
+	ldr	r2, .L606+20
+	ldr	ip, .L606+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L523
+	bgt	.L536
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L593+16
-	b	.L588
-.L544:
+	ldr	r2, .L606+16
+	b	.L601
+.L557:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -4608,88 +4625,88 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L543
-.L541:
+	b	.L556
+.L554:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L540
-.L524:
-	ldr	r8, .L593+40
+	b	.L553
+.L537:
+	ldr	r8, .L606+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L547
-.L589:
+	bne	.L560
+.L602:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L523
-.L547:
+	b	.L536
+.L560:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L548
+	beq	.L561
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L548:
+.L561:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L549
+	bcs	.L562
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L589
-.L549:
+	b	.L602
+.L562:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L523
-.L552:
-	ldr	r3, .L593+24
+	b	.L536
+.L565:
+	ldr	r3, .L606+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L554
-.L557:
-	ldr	r3, .L593+16
+	cbz	r3, .L567
+.L570:
+	ldr	r3, .L606+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L555
-.L556:
-	ldr	r3, .L593+28
+	beq	.L568
+.L569:
+	ldr	r3, .L606+28
 	ldrh	r2, [r3]
-	ldr	r3, .L593+32
+	ldr	r3, .L606+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L587
+	bls	.L600
 	movw	r2, #1391
-	ldr	r1, .L593
-	ldr	r0, .L593+4
+	ldr	r1, .L606
+	ldr	r0, .L606+4
 	bl	printf
-.L587:
+.L600:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L554:
-	ldr	r1, .L593+28
+.L567:
+	ldr	r1, .L606+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L557
-	ldr	r5, .L593+32
+	beq	.L570
+	ldr	r5, .L606+32
 	ldr	r0, [r5]
-.L558:
+.L571:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L557
+	bcs	.L570
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L558
-	ldr	r3, .L593+36
+	beq	.L571
+	ldr	r3, .L606+36
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L559:
+.L572:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L557
+	bcs	.L570
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -4698,30 +4715,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L559
-.L555:
-	ldr	r3, .L593+12
+	b	.L572
+.L568:
+	ldr	r3, .L606+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L556
-	ldr	r5, .L593+20
+	beq	.L569
+	ldr	r5, .L606+20
 	ldrh	r1, [r5]
-.L564:
+.L577:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L556
+	bge	.L569
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L564
-	ldr	r2, .L593+8
+	beq	.L577
+	ldr	r2, .L606+8
 	movs	r0, #0
 	ldr	r2, [r2]
-.L565:
+.L578:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L556
+	bge	.L569
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -4730,10 +4747,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L565
-.L594:
+	b	.L578
+.L607:
 	.align	2
-.L593:
+.L606:
 	.word	.LANCHOR140
 	.word	.LC1
 	.word	.LANCHOR122
@@ -4758,24 +4775,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L624+40
-	ldr	r4, .L624
+	ldr	r8, .L637+40
+	ldr	r4, .L637
 	ldr	r3, [r8]
-	ldr	r7, .L624+4
+	ldr	r7, .L637+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L624+8
+	ldr	r3, .L637+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L596:
+.L609:
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L599
+	bgt	.L612
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -4784,7 +4801,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L597
+	bne	.L610
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -4792,101 +4809,101 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L597:
+.L610:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L598
+	beq	.L611
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L598
-	ldr	r3, .L624+12
+	bne	.L611
+	ldr	r3, .L637+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L599:
-	ldr	r5, .L624+12
+.L612:
+	ldr	r5, .L637+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L613
+	beq	.L626
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L603
+	beq	.L616
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L624
+	ldr	r0, .L637
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L603
+	beq	.L616
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L603
+	bne	.L616
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L603
+	bls	.L616
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L603:
-	ldr	r10, .L624
+.L616:
+	ldr	r10, .L637
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L605:
+.L618:
 	cmp	r7, #0
-	bge	.L608
-	movs	r2, #253
-	ldr	r1, .L624+16
-	ldr	r0, .L624+20
+	bge	.L621
+	movs	r2, #251
+	ldr	r1, .L637+16
+	ldr	r0, .L637+20
 	bl	printf
-.L607:
+.L620:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L610
-	ldr	r3, .L624+24
+	beq	.L623
+	ldr	r3, .L637+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L610
-	ldr	r3, .L624+28
+	beq	.L623
+	ldr	r3, .L637+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L610
+	bcs	.L623
 	cmp	r0, r3
-	bcs	.L610
+	bcs	.L623
 	bl	FtlSysBlkNumInit
-.L610:
-	ldr	r6, .L624+32
+.L623:
+	ldr	r6, .L637+32
 	movs	r5, #0
-	ldr	r7, .L624+36
-	ldr	r8, .L624+44
-.L611:
+	ldr	r7, .L637+36
+	ldr	r8, .L637+44
+.L624:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L612
+	bcc	.L625
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L598:
+.L611:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L596
-.L608:
+	b	.L609
+.L621:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -4898,16 +4915,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L606
+	beq	.L619
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L607
-.L606:
+	beq	.L620
+.L619:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L605
-.L612:
+	b	.L618
+.L625:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -4915,13 +4932,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L611
-.L613:
+	b	.L624
+.L626:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L625:
+.L638:
 	.align	2
-.L624:
+.L637:
 	.word	.LANCHOR138
 	.word	.LANCHOR17
 	.word	.LANCHOR114
@@ -4952,26 +4969,26 @@ FlashProgPages:
 	mov	r10, r1
 	mov	r4, r0
 	mov	r5, r0
-	ldr	r3, .L666
+	ldr	r3, .L680
 	mov	r8, #0
-	ldr	fp, .L666+48
+	ldr	fp, .L680+52
 	str	r2, [sp, #8]
 	ldrh	r3, [r3, #12]
 	str	r3, [sp]
 	lsls	r3, r3, #3
 	str	r3, [sp, #4]
-.L627:
+.L640:
 	cmp	r8, r10
-	bne	.L640
+	bne	.L653
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L658
-	ldr	r6, .L666+4
+	beq	.L672
+	ldr	r6, .L680+4
 	movs	r5, #0
-.L642:
+.L655:
 	cmp	r8, r5
-	beq	.L658
-	ldr	r7, .L666+8
+	beq	.L672
+	ldr	r7, .L680+8
 	movs	r1, #0
 	ldr	r2, [r6]
 	add	r0, sp, #28
@@ -4987,73 +5004,81 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r10, [sp, #28]
 	cmp	r10, #-1
-	bne	.L643
+	bne	.L656
 	ldr	r1, [r4, #4]
-	ldr	r0, .L666+12
+	ldr	r0, .L680+12
 	bl	printf
 	str	r10, [r4]
-.L643:
+.L656:
+	ldr	r10, [sp, #28]
+	cmp	r10, #256
+	bne	.L657
+	ldr	r1, [r4, #4]
+	ldr	r0, .L680+16
+	bl	printf
+	str	r10, [r4]
+.L657:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L644
+	cbz	r3, .L658
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L644
+	beq	.L658
 	ldr	r1, [r4, #4]
-	ldr	r0, .L666+16
+	ldr	r0, .L680+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L644:
+.L658:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L645
+	cbz	r3, .L659
 	ldr	r2, [r3]
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L645
+	beq	.L659
 	ldr	r1, [r4, #4]
-	ldr	r0, .L666+20
+	ldr	r0, .L680+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L645:
+.L659:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-	b	.L642
-.L640:
+	b	.L655
+.L653:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L628
+	cbz	r3, .L641
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L629
-.L628:
-	movs	r2, #134
-	ldr	r1, .L666+24
-	ldr	r0, .L666+28
+	cbnz	r3, .L642
+.L641:
+	movs	r2, #142
+	ldr	r1, .L680+28
+	ldr	r0, .L680+32
 	bl	printf
-.L629:
+.L642:
 	add	r2, sp, #20
 	add	r1, sp, #24
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r6, [sp, #20]
 	cmp	r6, #3
-	bls	.L630
-.L665:
+	bls	.L643
+.L679:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L631
-.L630:
-	cbnz	r6, .L632
+	b	.L644
+.L643:
+	cbnz	r6, .L645
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bls	.L632
-	ldr	r5, .L666+24
-	ldr	r7, .L666+32
-	b	.L664
-.L634:
+	bls	.L645
+	ldr	r5, .L680+28
+	ldr	r7, .L680+36
+	b	.L678
+.L647:
 	mov	r3, #-1
 	ldr	r2, [r4, #-16]
 	str	r3, [r4, #-20]
@@ -5064,49 +5089,49 @@ FlashProgPages:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L666+36
+	ldr	r0, .L680+40
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L666+40
+	ldr	r0, .L680+44
 	bl	rknand_print_hex
-.L664:
+.L678:
 	cmp	r6, r10
 	add	r4, r4, #20
-	bne	.L634
-.L658:
+	bne	.L647
+.L672:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L632:
+.L645:
 	ldr	r1, [r5, #8]
 	lsls	r3, r1, #26
-	beq	.L647
-	ldr	r3, .L666+4
+	beq	.L661
+	ldr	r3, .L680+4
 	ldr	r6, [r3]
 	cmp	r1, r6
-	beq	.L635
-	ldr	r3, .L666+44
+	beq	.L648
+	ldr	r3, .L680+48
 	mov	r0, r6
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L635:
+.L648:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	ldr	r1, [sp, #24]
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	ldr	r7, [fp, #8]
 	blx	r7
-	cbnz	r0, .L636
+	cbnz	r0, .L649
 	str	r0, [r5]
-.L637:
-	ldr	r3, .L666
+.L650:
+	ldr	r3, .L680
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L631
+	bne	.L644
 	ldr	r0, [sp]
 	add	r2, r6, #2048
 	ldr	r3, [r5, #12]
@@ -5117,27 +5142,28 @@ FlashProgPages:
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	blx	r6
 	cmp	r0, #0
-	bne	.L665
-.L631:
+	bne	.L679
+.L644:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L627
-.L647:
+	b	.L640
+.L661:
 	mov	r6, r1
-	b	.L635
-.L636:
+	b	.L648
+.L649:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L637
-.L667:
+	b	.L650
+.L681:
 	.align	2
-.L666:
+.L680:
 	.word	.LANCHOR0
 	.word	.LANCHOR111
 	.word	.LANCHOR113
-	.word	.LC11
-	.word	.LC12
-	.word	.LC13
+	.word	.LC14
+	.word	.LC15
+	.word	.LC16
+	.word	.LC17
 	.word	.LANCHOR142
 	.word	.LC1
 	.word	.LC6
@@ -5157,133 +5183,133 @@ FlashProgPages:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L711
+	ldr	r3, .L725
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L711+4
+	ldr	r7, .L725+4
 	mov	r8, #0
 	mov	r6, r1
 	mov	r5, r8
 	str	r0, [r3]
 	mov	r4, r8
-	ldr	r3, .L711+8
+	ldr	r3, .L725+8
 	mov	fp, #20
 	ldr	r10, [r7]
 	str	r0, [sp, #4]
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L711+12
+	ldr	r3, .L725+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L711+16
+	ldr	r3, .L725+16
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L711+20
+	ldr	r3, .L725+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L669:
+.L683:
 	ldr	r3, [sp, #12]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L673
+	bhi	.L687
 	cmp	r5, #0
-	beq	.L668
+	beq	.L682
 	mov	r0, r10
 	mov	r8, #0
 	mov	r10, #20
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.L676:
+.L690:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L678
+	bhi	.L692
 	cmp	r6, #0
-	beq	.L694
-	ldr	r3, .L711+24
+	beq	.L708
+	ldr	r3, .L725+24
 	mov	r10, #1
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-.L679:
+.L693:
 	movs	r7, #0
-.L688:
-	ldr	r3, .L711+8
+.L702:
+	ldr	r3, .L725+8
 	mov	r8, #0
 	mov	r5, r8
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L711+4
+	ldr	r3, .L725+4
 	ldr	fp, [r3]
-	ldr	r3, .L711+28
+	ldr	r3, .L725+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L711+12
+	ldr	r3, .L725+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L711+20
+	ldr	r3, .L725+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.L680:
+.L694:
 	ldr	r3, [sp, #16]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L683
-	cbz	r5, .L668
+	bhi	.L697
+	cbz	r5, .L682
 	mov	r0, fp
-	ldr	fp, .L711+4
+	ldr	fp, .L725+4
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r5
 	mov	r8, #0
 	bl	FlashProgPages
 	movs	r3, #20
-.L685:
+.L699:
 	uxth	r2, r8
 	cmp	r5, r2
-	bhi	.L687
+	bhi	.L701
 	adds	r7, r7, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L688
-	ldr	r8, .L711+4
+	bhi	.L702
+	ldr	r8, .L725+4
 	movs	r7, #0
 	mov	fp, #20
-.L689:
+.L703:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L691
+	bhi	.L705
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L692
-	cbz	r6, .L668
-.L692:
-	ldr	r3, .L711+4
+	bls	.L706
+	cbz	r6, .L682
+.L706:
+	ldr	r3, .L725+4
 	mov	r2, r5
 	mov	r1, r10
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L668:
+.L682:
 	mov	r0, r4
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L673:
+.L687:
 	mul	r2, fp, r8
 	movs	r3, #0
 	ldr	r1, [sp, #4]
 	str	r3, [r10, r2]
-	ldr	r3, .L711+32
+	ldr	r3, .L725+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #8]
-	cbz	r6, .L670
+	cbz	r6, .L684
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L671
-.L670:
+	cbnz	r0, .L685
+.L684:
 	ldr	r0, [sp, #8]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L672
+	cbnz	r0, .L686
 	ldr	r3, [sp, #8]
 	mla	r1, fp, r5, r10
 	lsls	r2, r3, #10
@@ -5298,50 +5324,50 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L671:
+.L685:
 	add	r8, r8, #1
-	b	.L669
-.L672:
+	b	.L683
+.L686:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L671
-.L678:
+	b	.L685
+.L692:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L677
+	bne	.L691
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L677:
+.L691:
 	add	r8, r8, #1
-	b	.L676
-.L694:
+	b	.L690
+.L708:
 	movs	r3, #2
 	mov	r10, r6
 	str	r3, [sp, #8]
-	b	.L679
-.L683:
+	b	.L693
+.L697:
 	movs	r3, #20
 	ldr	r1, [sp, #4]
 	mul	r2, r3, r8
 	movs	r3, #0
 	str	r3, [fp, r2]
-	ldr	r3, .L711+32
+	ldr	r3, .L725+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r6, .L681
+	cbz	r6, .L695
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L682
-.L681:
+	cbnz	r0, .L696
+.L695:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L682
+	cbnz	r0, .L696
 	movs	r3, #20
 	mla	r1, r3, r5, fp
 	ldr	r3, [sp, #12]
@@ -5357,15 +5383,15 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L682:
+.L696:
 	add	r8, r8, #1
-	b	.L680
-.L687:
+	b	.L694
+.L701:
 	mul	r2, r3, r8
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L686
+	cbz	r2, .L700
 	ldr	r0, [r0, #4]
 	adds	r4, r4, #1
 	str	r3, [sp, #12]
@@ -5373,26 +5399,26 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r3, [sp, #12]
-.L686:
+.L700:
 	add	r8, r8, #1
-	b	.L685
-.L691:
-	cbz	r6, .L690
+	b	.L699
+.L705:
+	cbz	r6, .L704
 	mul	r3, fp, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L690
+	cbnz	r3, .L704
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L690:
+.L704:
 	adds	r7, r7, #1
-	b	.L689
-.L712:
+	b	.L703
+.L726:
 	.align	2
-.L711:
+.L725:
 	.word	.LANCHOR99
 	.word	.LANCHOR79
 	.word	.LANCHOR3
@@ -5418,8 +5444,8 @@ FlashTestBlk:
 	push	{r4, r5, lr}
 	mov	r5, r0
 	sub	sp, sp, #92
-	bls	.L716
-	ldr	r4, .L718
+	bls	.L730
+	ldr	r4, .L732
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -5443,7 +5469,7 @@ FlashTestBlk:
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L717
+	cbnz	r3, .L731
 	adds	r3, r5, #1
 	add	r0, sp, #4
 	str	r3, [sp, #8]
@@ -5456,26 +5482,26 @@ FlashTestBlk:
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-.L715:
+.L729:
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
 	str	r5, [sp, #8]
 	bl	FlashEraseBlocks
-.L713:
+.L727:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L717:
+.L731:
 	mov	r4, #-1
-	b	.L715
-.L716:
+	b	.L729
+.L730:
 	movs	r4, #0
-	b	.L713
-.L719:
+	b	.L727
+.L733:
 	.align	2
-.L718:
+.L732:
 	.word	.LANCHOR112
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -5490,38 +5516,38 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r7, .L729
 	movs	r1, #0
-	ldr	r5, .L729+4
+	ldr	r7, .L748
+	movs	r4, #0
+	ldr	r5, .L748+4
 	ldr	r3, [r7]
-	mov	fp, r7
-	ldr	r8, .L729+48
-	ldr	r6, .L729+8
+	ldr	fp, .L748+52
+	ldr	r6, .L748+8
 	str	r3, [r5, #12]
-	ldr	r7, .L729+12
-	ldr	r3, .L729+16
-	ldr	r10, .L729+52
-	ldr	r0, [r8]
+	ldr	r3, .L748+12
+	ldr	r0, [fp]
+	ldr	r8, .L748+56
 	ldrh	r2, [r3]
 	str	r0, [r5, #8]
 	bl	ftl_memset
-.L721:
+	str	r7, [sp, #12]
+	ldr	r7, .L748+16
+.L735:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L722
+	blt	.L736
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L729+20
+	ldr	r4, .L748+20
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
+	mov	r8, r7
 	bl	ftl_memset
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
 	ldr	r3, [r4, #8]
-	str	r7, [sp, #12]
 	str	r3, [r6, #4]
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
@@ -5529,16 +5555,20 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L729+24
+	ldr	r3, .L748+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L723:
-	ldr	r3, [r8]
+	ldr	r3, .L748+28
+	ldr	r3, [r3]
+	strh	r3, [r6, #14]	@ movhi
+.L737:
+	ldr	r3, [fp]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, [fp]
+	ldr	r3, [sp, #12]
 	ldrh	r0, [r6, #10]
+	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	movs	r3, #0
 	str	r3, [r5]
@@ -5546,14 +5576,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L729+28
+	ldr	r0, .L748+32
 	bl	printf
-	ldr	r3, .L729+32
+	ldr	r3, .L748+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L724
+	blt	.L738
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -5564,7 +5594,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L729+36
+	ldr	r2, .L748+40
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -5573,9 +5603,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L724:
+.L738:
 	movs	r3, #1
-	ldr	r0, .L729+4
+	ldr	r0, .L748+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -5583,23 +5613,23 @@ FtlBbmTblFlush:
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
-	adds	r3, r3, #1
-	bne	.L725
+	adds	r2, r3, #1
+	bne	.L739
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L729+40
+	ldr	r0, .L748+44
 	bl	printf
 	cmp	r7, #3
-	bls	.L723
+	bls	.L737
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L729+44
+	ldr	r0, .L748+48
 	bl	printf
-.L727:
-	b	.L727
-.L722:
-	ldrh	r2, [r10]
+.L741:
+	b	.L741
+.L736:
+	ldrh	r2, [r8]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r4
@@ -5607,34 +5637,33 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L721
-.L728:
-	movs	r3, #1
-	str	r3, [sp, #12]
-	b	.L723
-.L725:
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L728
+	b	.L735
+.L739:
+	add	r8, r8, #1
+	cmp	r8, #1
+	beq	.L737
+	cmp	r3, #256
+	beq	.L737
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L730:
+.L749:
 	.align	2
-.L729:
+.L748:
 	.word	.LANCHOR114
 	.word	.LANCHOR138
 	.word	.LANCHOR37+24
-	.word	.LANCHOR10
 	.word	.LANCHOR23
+	.word	.LANCHOR10
 	.word	.LANCHOR37
 	.word	.LANCHOR2
-	.word	.LC14
+	.word	.LANCHOR143
+	.word	.LC18
 	.word	.LANCHOR20
 	.word	.LANCHOR79
-	.word	.LC15
-	.word	.LC16
+	.word	.LC19
+	.word	.LC20
 	.word	.LANCHOR106
 	.word	.LANCHOR127
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
@@ -5651,26 +5680,26 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L732:
-	ldr	r3, .L771
-	ldr	r8, .L771+68
+.L751:
+	ldr	r3, .L790
+	ldr	r8, .L790+68
 	ldrh	r3, [r3]
-	ldr	r10, .L771+72
+	ldr	r10, .L790+72
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L733
-	movw	r2, #2661
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	ble	.L752
+	mov	r2, #2656
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L733:
-	ldr	r3, .L771+12
+.L752:
+	ldr	r3, .L790+12
 	cmp	r4, r3
-	bne	.L759
-	ldr	r3, .L771
-	ldr	r2, .L771+16
+	bne	.L778
+	ldr	r3, .L790
+	ldr	r2, .L790+16
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -5678,118 +5707,118 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L734
+	cbz	r1, .L753
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L734:
-	ldr	r0, .L771+20
+.L753:
+	ldr	r0, .L790+20
 	bl	List_pop_index_node
-	ldr	r3, .L771
+	ldr	r3, .L790
 	mov	r5, r0
 	uxth	r7, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L735
-	movw	r2, #2670
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	cbnz	r3, .L754
+	movw	r2, #2665
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L735:
-	ldr	r3, .L771
-	ldr	r2, .L771
+.L754:
+	ldr	r3, .L790
+	ldr	r2, .L790
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r10]
 	cmp	r3, r7
-	bls	.L732
+	bls	.L751
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L771+24
+	ldr	r3, .L790+24
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L732
+	bne	.L751
 	strh	r7, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L737
-	ldr	r3, .L771+24
+	cbnz	r3, .L756
+	ldr	r3, .L790+24
 	movw	r2, #65535
 	mov	r0, r7
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L771
+	ldr	r3, .L790
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L732
-	movw	r2, #2684
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	ble	.L751
+	movw	r2, #2679
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-	b	.L732
-.L759:
+	b	.L751
+.L778:
 	movs	r1, #0
-	b	.L734
-.L737:
-	ldr	r3, .L771
+	b	.L753
+.L756:
+	ldr	r3, .L790
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L739
-	movw	r2, #2687
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	ble	.L758
+	movw	r2, #2682
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L739:
-	ldr	r3, .L771+28
+.L758:
+	ldr	r3, .L790+28
 	add	lr, r4, #16
-	ldr	r2, .L771+32
+	ldr	r2, .L790+32
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #20
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L740:
+.L759:
 	cmp	r0, r3
-	bne	.L742
-	cbnz	r6, .L743
-	movw	r2, #2698
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	bne	.L761
+	cbnz	r6, .L762
+	movw	r2, #2693
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L743:
-	ldr	r3, .L771+36
+.L762:
+	ldr	r3, .L790+36
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L744
-	movw	r2, #2700
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	bne	.L763
+	movw	r2, #2695
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L744:
+.L763:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L771+40
-	ldr	fp, .L771+76
-	ldr	r8, .L771+80
+	ldr	r3, .L790+40
+	ldr	fp, .L790+76
+	ldr	r8, .L790+80
 	ldr	r1, [r3]
 	cmp	r2, #0
-	bne	.L745
+	bne	.L764
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L746
-	ldr	r0, .L771+44
+	beq	.L765
+	ldr	r0, .L790+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L769:
+.L788:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r7
 	ldr	r2, [fp]
@@ -5798,83 +5827,83 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode
-.L770:
+.L789:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldr	r3, [r3]
 	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L771+48
+	ldr	r3, .L790+48
 	ldr	r2, [r3]
 	cmp	r1, r2
 	it	hi
 	strhi	r1, [r3]
-	ldr	r3, .L771+44
+	ldr	r3, .L790+44
 	ldrh	r1, [r10]
 	ldrh	r2, [r3]
 	ldr	r3, [r8]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L771+52
-	ldr	ip, .L771+84
+	ldr	r3, .L790+52
+	ldr	ip, .L790+84
 	str	r0, [r3]
-	ldr	r3, .L771+56
+	ldr	r3, .L790+56
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
-	ldr	r3, .L771+28
+	ldr	r3, .L790+28
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.L750:
+.L769:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L751
+	bne	.L770
 	mov	r2, r6
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r8, #0
 	bl	FlashEraseBlocks
 	mov	r10, r8
 	movs	r3, #20
-.L752:
+.L771:
 	uxth	r2, r8
 	cmp	r6, r2
-	bhi	.L754
+	bhi	.L773
 	cmp	r10, #0
-	beq	.L755
+	beq	.L774
 	mov	r0, r7
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L755:
+.L774:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L756
-	ldr	r3, .L771+24
+	bne	.L775
+	ldr	r3, .L790+24
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L732
-.L742:
+	b	.L751
+.L761:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L741
+	beq	.L760
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L741:
+.L760:
 	adds	r3, r3, #20
-	b	.L740
-.L746:
+	b	.L759
+.L765:
 	movs	r2, #2
-	b	.L769
-.L745:
+	b	.L788
+.L764:
 	ldrh	r2, [r1, r5, lsl #1]
 	mov	r0, r7
 	str	r3, [sp, #4]
@@ -5884,20 +5913,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r8]
 	bl	ftl_set_blk_mode.part.6
-	b	.L770
-.L751:
+	b	.L789
+.L770:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L750
-.L754:
-	ldr	r1, .L771+28
+	b	.L769
+.L773:
+	ldr	r1, .L790+28
 	mul	r2, r3, r8
 	ldr	r1, [r1]
 	ldr	fp, [r1, r2]
 	adds	r0, r1, r2
 	cmp	fp, #-1
-	bne	.L753
+	bne	.L772
 	ldr	r0, [r0, #4]
 	add	r10, r10, #1
 	str	r3, [sp, #4]
@@ -5909,12 +5938,12 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.L753:
+.L772:
 	add	r8, r8, #1
-	b	.L752
-.L756:
-	ldr	r3, .L771+60
-	ldr	r1, .L771+64
+	b	.L771
+.L775:
+	ldr	r3, .L790+60
+	ldr	r1, .L790+64
 	ldrh	r3, [r3]
 	strh	r7, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -5927,45 +5956,45 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L771+24
+	ldr	r2, .L790+24
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L757
+	cbz	r3, .L776
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L758
-.L757:
-	movw	r2, #2753
-	ldr	r1, .L771+4
-	ldr	r0, .L771+8
+	cbnz	r3, .L777
+.L776:
+	movw	r2, #2748
+	ldr	r1, .L790+4
+	ldr	r0, .L790+8
 	bl	printf
-.L758:
+.L777:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L772:
+.L791:
 	.align	2
-.L771:
+.L790:
 	.word	.LANCHOR48
-	.word	.LANCHOR143
+	.word	.LANCHOR144
 	.word	.LC1
 	.word	.LANCHOR53
 	.word	.LANCHOR95
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR42
 	.word	.LANCHOR79
 	.word	.LANCHOR3
-	.word	.LANCHOR144
-	.word	.LANCHOR43
+	.word	.LANCHOR145
+	.word	.LANCHOR47
 	.word	.LANCHOR14
 	.word	.LANCHOR92
-	.word	.LANCHOR145
+	.word	.LANCHOR143
 	.word	.LANCHOR118
 	.word	.LANCHOR19
 	.word	.LANCHOR82
-	.word	.LANCHOR45
+	.word	.LANCHOR44
 	.word	.LANCHOR5
 	.word	.LANCHOR90
 	.word	.LANCHOR91
@@ -5984,43 +6013,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L785
+	ldr	r4, .L804
 	ldrh	r3, [r4]
-	cbz	r3, .L774
-	ldr	r8, .L785+12
+	cbz	r3, .L793
+	ldr	r8, .L804+12
 	movs	r7, #0
-.L775:
-	ldr	r3, .L785+4
+.L794:
+	ldr	r3, .L804+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L781
+	bhi	.L800
 	bl	FtlGcReFreshBadBlk
-.L774:
+.L793:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L781:
-	ldr	r2, .L785+8
+.L800:
+	ldr	r2, .L804+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L776:
+.L795:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L780
+	bhi	.L799
 	adds	r7, r7, #1
-	b	.L775
-.L780:
+	b	.L794
+.L799:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L777
+	bne	.L796
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -6028,23 +6057,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L778:
+.L797:
 	cmp	r5, r2
-	bcc	.L779
+	bcc	.L798
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L777:
+.L796:
 	add	fp, fp, #1
-	b	.L776
-.L779:
+	b	.L795
+.L798:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L778
-.L786:
+	b	.L797
+.L805:
 	.align	2
-.L785:
+.L804:
 	.word	.LANCHOR74
 	.word	.LANCHOR3
 	.word	.LANCHOR13
@@ -6063,29 +6092,41 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L797
+	ldr	r3, .L818
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L788
-	ldr	r2, .L797+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L789
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L790:
-	ldr	r5, .L797+8
+	bne	.L807
+	ldr	r3, .L818+4
+	ldrh	r2, [r3]
+	cmp	r2, r0
+	itt	eq
+	movweq	r2, #65535
+	strheq	r2, [r3]	@ movhi
+	ldr	r3, .L818+8
+	ldrh	r2, [r3]
+	cmp	r2, r0
+	itt	eq
+	movweq	r2, #65535
+	strheq	r2, [r3]	@ movhi
+	ldr	r3, .L818+12
+	ldrh	r2, [r3]
+	cmp	r2, r0
+	bne	.L810
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L811:
+	ldr	r5, .L818+16
 	mov	r1, r4
-	ldr	r0, .L797+12
+	ldr	r0, .L818+20
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L792
-	movw	r2, #2823
-	ldr	r1, .L797+16
-	ldr	r0, .L797+20
+	cbnz	r3, .L813
+	movw	r2, #2824
+	ldr	r1, .L818+24
+	ldr	r0, .L818+28
 	bl	printf
-.L792:
+.L813:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -6093,47 +6134,48 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L797+24
+	ldr	r3, .L818+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L797+28
+	ldr	r2, .L818+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L796
-	movw	r2, #2826
-	ldr	r1, .L797+16
-	ldr	r0, .L797+20
+	ble	.L817
+	movw	r2, #2827
+	ldr	r1, .L818+24
+	ldr	r0, .L818+28
 	bl	printf
-.L796:
-	movs	r3, #1
-	b	.L787
-.L789:
-	ldr	r2, .L797+32
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L787
-	ldr	r2, .L797+36
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L787
-	ldr	r2, .L797+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L790
-.L787:
-	mov	r0, r3
+.L817:
+	movs	r0, #1
 	pop	{r3, r4, r5, pc}
-.L788:
+.L810:
+	ldr	r3, .L818+40
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L816
+	ldr	r3, .L818+44
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L816
+	ldr	r3, .L818+48
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L811
+.L816:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L807:
 	bl	List_update_data_list
-	movs	r3, #0
-	b	.L787
-.L798:
+	b	.L816
+.L819:
 	.align	2
-.L797:
+.L818:
 	.word	.LANCHOR42
-	.word	.LANCHOR144
-	.word	.LANCHOR45
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR145
+	.word	.LANCHOR44
 	.word	.LANCHOR41
 	.word	.LANCHOR146
 	.word	.LC1
@@ -6158,47 +6200,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L800
-	ldr	r5, .L808
+	beq	.L821
+	ldr	r5, .L829
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L801
+	cbnz	r2, .L822
 	mov	r1, r0
-	ldr	r0, .L808+4
+	ldr	r0, .L829+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L802
-.L806:
+	cbz	r5, .L823
+.L827:
 	movs	r5, #0
-.L799:
+.L820:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L802:
-	movw	r2, #2841
-.L807:
-	ldr	r1, .L808+8
-	ldr	r0, .L808+12
+.L823:
+	movw	r2, #2842
+.L828:
+	ldr	r1, .L829+8
+	ldr	r0, .L829+12
 	bl	printf
-	b	.L799
-.L801:
+	b	.L820
+.L822:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L800:
-	ldr	r6, .L808+16
+.L821:
+	ldr	r6, .L829+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L804
+	bne	.L825
 	strh	r4, [r6]	@ movhi
-	b	.L806
-.L804:
+	b	.L827
+.L825:
 	cmp	r4, r0
-	beq	.L806
+	beq	.L827
 	bl	update_vpc_list
-	ldr	r3, .L808+20
+	ldr	r3, .L829+20
 	adds	r5, r0, #0
-	ldr	r2, .L808+24
+	ldr	r2, .L829+24
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -6206,23 +6248,23 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L808+28
+	ldr	r3, .L829+28
 	muls	r3, r2, r3
-	ldr	r2, .L808
+	ldr	r2, .L829
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L799
+	bne	.L820
 	cmp	r4, r1
-	beq	.L799
-	movw	r2, #2857
-	b	.L807
-.L809:
+	beq	.L820
+	movw	r2, #2858
+	b	.L828
+.L830:
 	.align	2
-.L808:
+.L829:
 	.word	.LANCHOR42
-	.word	.LC17
+	.word	.LC21
 	.word	.LANCHOR147
 	.word	.LC1
 	.word	.LANCHOR131
@@ -6244,14 +6286,14 @@ FtlSuperblockPowerLostFix:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
 	sub	sp, sp, #24
-	ldr	r2, .L823
+	ldr	r2, .L844
 	movs	r6, #0
 	mov	r4, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L823+4
+	ldr	r3, .L844+4
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r8, .L823+16
+	ldr	r8, .L844+16
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -6272,18 +6314,18 @@ FtlSuperblockPowerLostFix:
 	ite	eq
 	moveq	r7, #6
 	movne	r7, #7
-.L816:
+.L837:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L812
-.L813:
-	ldr	r3, .L823+8
+	cbnz	r3, .L833
+.L834:
+	ldr	r3, .L844+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L823+12
+	ldr	r3, .L844+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -6292,12 +6334,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L812:
+.L833:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L813
+	beq	.L834
 	ldr	r3, [r8]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -6313,11 +6355,11 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
 	subs	r7, r7, #1
-	bne	.L816
-	b	.L813
-.L824:
+	bne	.L837
+	b	.L834
+.L845:
 	.align	2
-.L823:
+.L844:
 	.word	.LANCHOR114
 	.word	.LANCHOR106
 	.word	.LANCHOR42
@@ -6337,61 +6379,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L844
+	ldr	r7, .L865
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L826:
-	ldr	r3, .L844+4
+.L847:
+	ldr	r3, .L865+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L832
-	ldr	r5, .L844+8
+	bcc	.L853
+	ldr	r5, .L865+8
 	movs	r4, #0
-.L833:
+.L854:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L834
-	ldr	r4, .L844+12
+	bhi	.L855
+	ldr	r4, .L865+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L835:
+.L856:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L839
+	bgt	.L860
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L836
+	beq	.L857
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L837
+	beq	.L858
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L836:
+.L857:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L835
-.L832:
-	ldr	r3, .L844+16
-	ldr	r5, .L844+20
+	b	.L856
+.L853:
+	ldr	r3, .L865+16
+	ldr	r5, .L865+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L844+24
+	ldr	r4, .L865+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L844+28
+	ldr	r3, .L865+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L827
+	beq	.L848
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -6408,13 +6450,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L828:
+.L849:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L826
-.L827:
+	b	.L847
+.L848:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -6426,21 +6468,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L829:
+.L850:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L830
+	beq	.L851
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L844+16
+	ldr	r3, .L865+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -6458,42 +6500,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L844+32
+	ldr	r3, .L865+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L844+24
+	ldr	r0, .L865+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L844+24
+	ldr	r0, .L865+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L828
+	bne	.L849
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L829
-.L830:
+	b	.L850
+.L851:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L829
-.L834:
+	b	.L850
+.L855:
 	bl	FtlBbmMapBadBlock
-	b	.L833
-.L837:
+	b	.L854
+.L858:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L838
+	bne	.L859
 	strh	r5, [r4]	@ movhi
-	b	.L836
-.L838:
+	b	.L857
+.L859:
 	strh	r5, [r4, #4]	@ movhi
-.L839:
-	ldr	r3, .L844+36
+.L860:
+	ldr	r3, .L865+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -6525,9 +6567,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L845:
+.L866:
 	.align	2
-.L844:
+.L865:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -6564,24 +6606,24 @@ ftl_memcmp:
 js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L850
+	ldr	r3, .L871
 	add	r1, r1, r0
 	push	{r4, lr}
-.L848:
+.L869:
 	cmp	r0, r1
-	bne	.L849
+	bne	.L870
 	mov	r0, r3
 	pop	{r4, pc}
-.L849:
+.L870:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L848
-.L851:
+	b	.L869
+.L872:
 	.align	2
-.L850:
+.L871:
 	.word	1204201446
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -6601,14 +6643,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L853
+	bne	.L874
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L854
+	cbz	r3, .L875
 	movw	r2, #641
-	ldr	r1, .L862
-	ldr	r0, .L862+4
+	ldr	r1, .L883
+	ldr	r0, .L883+4
 	bl	printf
-.L854:
+.L875:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -6620,20 +6662,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L855:
+.L876:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L853:
+.L874:
 	ldrh	r7, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L862+8
-	ldr	r10, .L862+24
+	ldr	r6, .L883+8
+	ldr	r10, .L883+24
 	ldr	r8, [r0, #24]
 	orr	r3, r3, r7, lsl #10
 	ldr	r0, [r10]
 	str	r3, [r6, #4]
-	ldr	r3, .L862+12
+	ldr	r3, .L883+12
 	str	r0, [r6, #8]
 	ldr	r5, [r3]
 	ldr	r3, [r4, #28]
@@ -6644,7 +6686,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r3, [r4, #4]
 	strh	r7, [r5, #2]	@ movhi
 	strh	r3, [r5]	@ movhi
-	ldr	r3, .L862+16
+	ldr	r3, .L883+16
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -6652,11 +6694,11 @@ Ftl_write_map_blk_to_last_page:
 	movs	r3, #0
 	ldr	r1, [r10]
 	mov	r2, r3
-.L856:
+.L877:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L858
-	ldr	r3, .L862+20
+	bhi	.L879
+	ldr	r3, .L883+20
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
@@ -6664,30 +6706,30 @@ Ftl_write_map_blk_to_last_page:
 	str	r0, [r5, #12]
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L862+8
+	ldr	r0, .L883+8
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L855
-.L858:
+	b	.L876
+.L879:
 	ldr	r0, [r8, r3, lsl #2]
 	cmp	r7, r0, lsr #10
-	bne	.L857
+	bne	.L878
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	lr, r1, r2, lsl #3
 	ldr	r0, [r8, r3, lsl #2]
 	str	r0, [lr, #4]
-.L857:
+.L878:
 	adds	r3, r3, #1
-	b	.L856
-.L863:
+	b	.L877
+.L884:
 	.align	2
-.L862:
+.L883:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR138
@@ -6709,13 +6751,13 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r8, .L888+32
+	ldr	r8, .L909+32
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp]
 	mov	fp, r8
-.L865:
-	ldr	r2, .L888
+.L886:
+	ldr	r2, .L909
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6723,44 +6765,44 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L866
+	bge	.L887
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L867
-.L866:
+	bne	.L888
+.L887:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L867:
+.L888:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L868
+	cbnz	r3, .L889
 	mov	r2, #700
-	ldr	r1, .L888+4
-	ldr	r0, .L888+8
+	ldr	r1, .L909+4
+	ldr	r0, .L909+8
 	bl	printf
-.L868:
+.L889:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L869
+	bcc	.L890
 	movw	r2, #701
-	ldr	r1, .L888+4
-	ldr	r0, .L888+8
+	ldr	r1, .L909+4
+	ldr	r0, .L909+8
 	bl	printf
-.L869:
+.L890:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L888+12
+	ldr	r5, .L909+12
 	ldrh	r3, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
 	orr	r2, r2, r3, lsl #10
 	ldr	r3, [sp]
 	str	r2, [r5, #4]
-	ldr	r2, .L888+16
+	ldr	r2, .L909+16
 	str	r3, [r5, #8]
 	ldr	r0, [r2]
 	movs	r2, #16
@@ -6773,7 +6815,7 @@ FtlMapWritePage:
 	str	r1, [r10, #4]
 	ldrh	r1, [r4, #4]
 	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, .L888+20
+	ldr	r3, .L909+20
 	strh	r1, [r10]	@ movhi
 	strh	r7, [r10, #8]	@ movhi
 	ldrh	r1, [r3]
@@ -6790,10 +6832,10 @@ FtlMapWritePage:
 	uxth	r2, r2
 	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L870
+	bne	.L891
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L888+24
+	ldr	r0, .L909+24
 	uxth	r6, r6
 	bl	printf
 	ldrh	r2, [r4, #2]
@@ -6803,48 +6845,48 @@ FtlMapWritePage:
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L872
+	bls	.L893
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L888+28
+	ldr	r0, .L909+28
 	bl	printf
-.L873:
-	b	.L873
-.L872:
+.L894:
+	b	.L894
+.L893:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L865
-.L887:
-	b	.L887
-.L870:
+	beq	.L886
+.L908:
+	b	.L908
+.L891:
 	cmp	r2, #1
-	beq	.L876
+	beq	.L897
 	cmp	r1, #256
-	beq	.L876
+	beq	.L897
 	ldr	r0, [r4, #36]
-	cbz	r0, .L877
-.L876:
+	cbz	r0, .L898
+.L897:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L865
-.L877:
+	b	.L886
+.L898:
 	ldr	r2, [r5, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L889:
+.L910:
 	.align	2
-.L888:
+.L909:
 	.word	.LANCHOR88
 	.word	.LANCHOR149
 	.word	.LC1
 	.word	.LANCHOR138
 	.word	.LANCHOR114
 	.word	.LANCHOR23
-	.word	.LC18
-	.word	.LC19
+	.word	.LC22
+	.word	.LC23
 	.word	.LANCHOR20
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.load_l2p_region,"ax",%progbits
@@ -6858,31 +6900,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L897
+	ldr	r3, .L918
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L891
+	bcs	.L912
 	movw	r2, #485
-	ldr	r1, .L897+4
-	ldr	r0, .L897+8
+	ldr	r1, .L918+4
+	ldr	r0, .L918+8
 	bl	printf
-.L891:
-	ldr	fp, .L897+48
+.L912:
+	ldr	fp, .L918+48
 	movs	r4, #12
-	ldr	r7, .L897+12
+	ldr	r7, .L918+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L892
+	bne	.L913
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L897+16
+	ldr	r2, .L918+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -6890,21 +6932,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L893:
+.L914:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L892:
+.L913:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L897+20
+	ldr	r6, .L918+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L897+24
+	ldr	r2, .L918+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -6913,55 +6955,55 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L894
+	beq	.L915
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L897+28
+	ldr	r0, .L918+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L897+32
+	ldr	r0, .L918+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L897+36
+	ldr	r0, .L918+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L895:
+.L916:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L896
+	beq	.L917
 	mov	r2, #508
-	ldr	r1, .L897+4
-	ldr	r0, .L897+8
+	ldr	r1, .L918+4
+	ldr	r0, .L918+8
 	bl	printf
-.L896:
+.L917:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L893
-.L894:
+	b	.L914
+.L915:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L895
+	bne	.L916
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L897+40
+	ldr	r0, .L918+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L897+44
+	ldr	r0, .L918+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L895
-.L898:
+	b	.L916
+.L919:
 	.align	2
-.L897:
+.L918:
 	.word	.LANCHOR32
 	.word	.LANCHOR150
 	.word	.LC1
@@ -6969,10 +7011,10 @@ load_l2p_region:
 	.word	.LANCHOR23
 	.word	.LANCHOR138
 	.word	.LANCHOR114
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
+	.word	.LC24
+	.word	.LC13
+	.word	.LC25
+	.word	.LC26
 	.word	.LANCHOR129
 	.word	.LANCHOR124
 	.size	load_l2p_region, .-load_l2p_region
@@ -6997,13 +7039,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L900
+	blt	.L921
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L900
+	beq	.L921
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L900
+	cbnz	r3, .L921
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -7011,39 +7053,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L915
+	ldr	r3, .L936
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L901
+	bcc	.L922
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L901:
-	ldr	r5, .L915+4
+.L922:
+	ldr	r5, .L936+4
 	movs	r6, #0
-.L902:
+.L923:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L909
+	bhi	.L930
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L900:
-	ldr	r3, .L915
+.L921:
+	ldr	r3, .L936
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L910
+	bcc	.L931
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L910:
+.L931:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L909:
+.L930:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -7051,53 +7093,53 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L903
-	ldr	r3, .L915+8
+	bne	.L924
+	ldr	r3, .L936+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L915+4
+	ldr	r0, .L936+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L915+12
+	ldr	r1, .L936+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L904
+	beq	.L925
 	movw	r2, #611
-	ldr	r1, .L915+16
-	ldr	r0, .L915+20
+	ldr	r1, .L936+16
+	ldr	r0, .L936+20
 	bl	printf
-.L904:
+.L925:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L905
-.L907:
+	bne	.L926
+.L928:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
-.L906:
-	b	.L906
-.L905:
+.L927:
+	b	.L927
+.L926:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L907
+	bne	.L928
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L907
+	bne	.L928
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L903:
+.L924:
 	adds	r6, r6, #1
-	b	.L902
-.L916:
+	b	.L923
+.L937:
 	.align	2
-.L915:
+.L936:
 	.word	.LANCHOR20
 	.word	.LANCHOR138
 	.word	.LANCHOR107
@@ -7118,9 +7160,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L918
+	ldr	r5, .L939
 	muls	r4, r0, r4
-	ldr	r0, .L918+4
+	ldr	r0, .L939+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7133,9 +7175,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L919:
+.L940:
 	.align	2
-.L918:
+.L939:
 	.word	.LANCHOR55
 	.word	.LANCHOR129
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -7152,30 +7194,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L924
-	ldr	r6, .L924+4
-.L921:
+	ldr	r5, .L945
+	ldr	r6, .L945+4
+.L942:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L923
+	bhi	.L944
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L923:
+.L944:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L922
+	bge	.L943
 	bl	flush_l2p_region
-.L922:
+.L943:
 	adds	r4, r4, #1
-	b	.L921
-.L925:
+	b	.L942
+.L946:
 	.align	2
-.L924:
+.L945:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.size	l2p_flush, .-l2p_flush
@@ -7192,36 +7234,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L939
+	ldr	r4, .L960
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L939+4
+	ldr	r3, .L960+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L927
+	bcc	.L948
 	movw	r2, #813
-	ldr	r1, .L939+8
-	ldr	r0, .L939+12
+	ldr	r1, .L960+8
+	ldr	r0, .L960+12
 	bl	printf
-.L927:
+.L948:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L928
-	ldr	r3, .L939+16
+	bcs	.L949
+	ldr	r3, .L960+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L939+20
+	ldr	r3, .L960+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L929:
+.L950:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L934
+	bcc	.L955
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7232,31 +7274,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L935
+	beq	.L956
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L935
+	bge	.L956
 	bl	flush_l2p_region
-.L935:
+.L956:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L931
-.L928:
+	b	.L952
+.L949:
 	mov	r0, #-1
-	cbnz	r7, .L926
+	cbnz	r7, .L947
 	str	r0, [r5]
-.L926:
+.L947:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L934:
+.L955:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L929
-.L931:
+	bne	.L950
+.L952:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7265,35 +7307,35 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L932
+	cbnz	r7, .L953
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L933:
+.L954:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L937
+	beq	.L958
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L937:
+.L958:
 	movs	r0, #0
-	b	.L926
-.L932:
+	b	.L947
+.L953:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L939+24
+	ldr	r3, .L960+24
 	strh	r6, [r3]	@ movhi
-	b	.L933
-.L940:
+	b	.L954
+.L961:
 	.align	2
-.L939:
+.L960:
 	.word	.LANCHOR152
 	.word	.LANCHOR22
 	.word	.LANCHOR153
@@ -7315,22 +7357,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L951
+	ldr	r5, .L972
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L942
-	ldr	r2, .L951+4
+	cbnz	r3, .L963
+	ldr	r2, .L972+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L943
-	ldr	r2, .L951+8
+	beq	.L964
+	ldr	r2, .L972+8
 	movw	lr, #65535
-	ldr	ip, .L951+24
-	ldr	r0, .L951+12
+	ldr	ip, .L972+24
+	ldr	r0, .L972+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7339,22 +7381,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L944:
+.L965:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L943
+	bls	.L964
 	cmp	r4, r7
-	bne	.L945
+	bne	.L966
 	mov	r1, r4
-	ldr	r0, .L951+4
+	ldr	r0, .L972+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L946
+	cbnz	r3, .L967
 	movw	r2, #1733
-	ldr	r1, .L951+16
-	ldr	r0, .L951+20
+	ldr	r1, .L972+16
+	ldr	r0, .L972+20
 	bl	printf
-.L946:
+.L967:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7362,17 +7404,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L942:
+.L963:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L943
-.L945:
+	b	.L964
+.L966:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L944
-.L943:
+	bne	.L965
+.L964:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7380,11 +7422,11 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L952:
+.L973:
 	.align	2
-.L951:
+.L972:
 	.word	.LANCHOR42
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR40
 	.word	.LANCHOR48
 	.word	.LANCHOR154
@@ -7408,144 +7450,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1081
+	beq	.L1106
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1091
+	ldr	r3, .L1115
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L956
+	bne	.L977
 	strh	r3, [r0, #4]	@ movhi
-.L1089:
+.L1113:
 	strb	r3, [r8, #6]
-.L1081:
+.L1106:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L956:
+.L977:
 	ldrh	r0, [r0, #16]
-.L957:
+.L978:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L958
+	beq	.L979
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L959
-	ldr	r3, .L1091+4
+	beq	.L980
+	ldr	r3, .L1115+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1091+8
+	ldr	r3, .L1115+8
 	ldr	r0, [r3]
-	ldr	r3, .L1091+12
+	ldr	r3, .L1115+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1091+16
+	ldr	r3, .L1115+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1091+20
+	ldr	r3, .L1115+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1091+24
+	ldr	r3, .L1115+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L960:
+.L981:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L964
+	bhi	.L985
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1091+28
+	ldr	r2, .L1115+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1091+8
+	ldr	r3, .L1115+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L965:
+.L986:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L970
-	bne	.L968
+	bhi	.L991
+	bne	.L989
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1082:
+.L1107:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1091
+	ldr	r3, .L1115
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L972
+	bne	.L993
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L972:
+.L993:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L973
+	bne	.L994
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L973
+	bne	.L994
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1090:
+.L1114:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1081
-.L958:
+	b	.L1106
+.L979:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L957
-.L959:
+	b	.L978
+.L980:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L961
+	cbz	r3, .L982
 	mov	r2, #1800
-	ldr	r1, .L1091+32
-	ldr	r0, .L1091+36
+	ldr	r1, .L1115+32
+	ldr	r0, .L1115+36
 	bl	printf
-.L961:
+.L982:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L962
+	cbz	r3, .L983
 	cmp	r5, r3
-	beq	.L962
+	beq	.L983
 	movw	r2, #1801
-	ldr	r1, .L1091+32
-	ldr	r0, .L1091+36
+	ldr	r1, .L1115+32
+	ldr	r0, .L1115+36
 	bl	printf
-.L962:
+.L983:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1089
-.L964:
+	b	.L1113
+.L985:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L963
+	beq	.L984
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -7561,53 +7603,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L963:
+.L984:
 	adds	r2, r2, #1
-	b	.L960
-.L970:
+	b	.L981
+.L991:
 	ldr	r1, [r7]
-	cbnz	r1, .L966
+	cbnz	r1, .L987
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L967
+	beq	.L988
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L967
+	cbz	r0, .L988
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L967:
+.L988:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L969
-.L968:
+	bne	.L990
+.L989:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1082
-.L966:
+	b	.L1107
+.L987:
 	ldr	fp, [sp, #12]
-.L969:
+.L990:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L965
-.L973:
+	b	.L986
+.L994:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L974
+	bne	.L995
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L975
-.L974:
-	ldr	r3, .L1091+40
+	bne	.L996
+.L995:
+	ldr	r3, .L1115+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1091+8
+	ldr	r7, .L1115+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -7620,10 +7662,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L978:
+.L999:
 	cmp	r4, r6
-	bhi	.L988
-	ldr	r3, .L1091+4
+	bhi	.L1009
+	ldr	r3, .L1115+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -7632,47 +7674,47 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L989
-.L980:
+	b	.L1010
+.L1001:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L979
+	beq	.L1000
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L979:
+.L1000:
 	adds	r3, r3, #1
-.L989:
+.L1010:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L980
+	bhi	.L1001
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1091+40
+	ldr	r3, .L1115+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L981:
+.L1002:
 	cmp	r5, r3
-	bne	.L986
-	cbz	r0, .L987
-	ldr	r3, .L1091+40
+	bne	.L1007
+	cbz	r0, .L1008
+	ldr	r3, .L1115+40
 	str	r2, [r3]
-.L987:
+.L1008:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L978
-.L1092:
+	b	.L999
+.L1116:
 	.align	2
-.L1091:
+.L1115:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR103
@@ -7684,22 +7726,22 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR155
 	.word	.LC1
 	.word	.LANCHOR134
-.L986:
+.L1007:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L982
-	cbz	r0, .L975
-.L1083:
-	ldr	r3, .L1093
+	beq	.L1003
+	cbz	r0, .L996
+.L1108:
+	ldr	r3, .L1117
 	str	r2, [r3]
-.L975:
+.L996:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1093+4
-	ldr	r3, .L1093+8
+	ldr	r6, .L1117+4
+	ldr	r3, .L1117+8
 	strh	r2, [r3]	@ movhi
-.L990:
-	ldr	r3, .L1093+12
+.L1011:
+	ldr	r3, .L1117+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -7707,64 +7749,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L991:
+.L1012:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L993
+	bhi	.L1014
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1088:
+.L1112:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1024
-	ldr	r3, .L1093+16
+	bhi	.L1043
+	ldr	r3, .L1117+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L990
-	ldr	r2, .L1093+12
+	bne	.L1011
+	ldr	r2, .L1117+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1025:
+.L1044:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1081
+	bcs	.L1106
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1089
+	bne	.L1113
 	mov	r3, r1
-	b	.L1025
-.L982:
+	b	.L1044
+.L1003:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L985
+	beq	.L1006
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L985:
+.L1006:
 	adds	r3, r3, #20
-	b	.L981
-.L988:
+	b	.L1002
+.L1009:
 	mov	r2, #-1
-	b	.L1083
-.L993:
+	b	.L1108
+.L1014:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L992
+	beq	.L1013
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -7773,10 +7815,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L992:
+.L1013:
 	adds	r3, r3, #1
-	b	.L991
-.L1024:
+	b	.L1012
+.L1043:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -7789,45 +7831,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L995
+	bcc	.L1016
 	ldr	r3, [sp, #28]
-	bne	.L996
+	bne	.L1017
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L995
-.L996:
+	bhi	.L1016
+.L1017:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L997
+	bne	.L1018
 	cmp	r10, r0
-	beq	.L998
-.L997:
+	beq	.L1019
+.L1018:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L999
+	beq	.L1020
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1000
+	beq	.L1021
 	ldrh	r0, [r8]
-.L1086:
+.L1109:
 	bl	decrement_vpc_count
-	b	.L995
-.L1000:
+	b	.L1016
+.L1021:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1001
-	ldr	r2, .L1093+20
+	beq	.L1022
+	ldr	r2, .L1117+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1001
+	cbz	r0, .L1022
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1001:
+.L1022:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -7835,17 +7877,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1093
+	ldr	r3, .L1117
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1002
+	beq	.L1023
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1002
+	beq	.L1023
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1003
+	beq	.L1024
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -7857,103 +7899,119 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1004
-.L1005:
+	bne	.L1025
+.L1026:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1012:
+.L1033:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L995
-.L1028:
+	beq	.L1016
+.L1047:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1093+24
+	ldr	r3, .L1117+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1020
-	movw	r2, #2065
-	ldr	r1, .L1093+28
-	ldr	r0, .L1093+32
+	bhi	.L1039
+	movw	r2, #2057
+	ldr	r1, .L1117+28
+	ldr	r0, .L1117+32
 	bl	printf
-.L1020:
-	ldr	r3, .L1093+36
+.L1039:
+	ldr	r3, .L1117+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1021
+	beq	.L1040
 	mov	r0, r4
-	b	.L1086
-.L1003:
+	b	.L1109
+.L1024:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L995
+	bne	.L1016
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L995:
+.L1016:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1088
-.L1004:
+	b	.L1112
+.L1025:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1005
-	ldr	r0, .L1093
+	bne	.L1026
+	ldr	r0, .L1117
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1005
+	beq	.L1026
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1007
-.L1010:
+	bne	.L1028
+.L1031:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1005
-.L1007:
+	b	.L1026
+.L1028:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1005
+	beq	.L1026
 	adds	r0, r1, #1
-	beq	.L1008
+	beq	.L1029
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1009:
+.L1030:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1010
+	beq	.L1031
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1093
+	ldr	r2, .L1117
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1010
+	beq	.L1031
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1005
-	b	.L1010
-.L1008:
+	beq	.L1026
+	b	.L1031
+.L1029:
 	str	r1, [r2, r5]
-	b	.L1009
-.L1094:
+	b	.L1030
+.L1023:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	beq	.L1033
+	ldr	r1, [sp, #36]
+	adds	r7, r1, #1
+	beq	.L1035
+	ldr	r3, .L1117+40
+	ldr	r3, [r3]
+	cmp	r3, r1, lsr #10
+	bhi	.L1035
+	ldr	r0, .L1117+44
+.L1111:
+	bl	printf
+	b	.L1016
+.L1118:
 	.align	2
-.L1093:
+.L1117:
 	.word	.LANCHOR134
 	.word	.LANCHOR103
 	.word	.LANCHOR156
@@ -7964,44 +8022,34 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR155
 	.word	.LC1
 	.word	.LANCHOR42
-.L1002:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	beq	.L1012
-	ldr	r2, .L1095
-	ldr	r3, [sp, #36]
-	ldr	r2, [r2]
-	cmp	r2, r3, lsr #10
-	bhi	.L1014
-	adds	r3, r3, #1
-.L1085:
-	bne	.L995
+	.word	.LANCHOR8
+	.word	.LC27
+.L1035:
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1012
+	beq	.L1033
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1028
+	beq	.L1047
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1095+4
+	ldr	r3, .L1119
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1019
-	ldr	r3, .L1095+8
+	beq	.L1038
+	ldr	r3, .L1119+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1019
-	ldr	r3, .L1095+12
+	beq	.L1038
+	ldr	r3, .L1119+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1012
-.L1019:
+	bne	.L1033
+.L1038:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -8011,77 +8059,61 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1012
+	beq	.L1033
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1012
+	bne	.L1033
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1012
-.L1014:
-	ldr	r0, [r6]
-	movs	r2, #0
-	movs	r1, #1
-	ldr	r5, [r0, #12]
-	str	r3, [r0, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5, #8]
-	cmp	r4, r3
-	bne	.L995
-	ldrh	r2, [r5]
-	movw	r3, #61589
-	cmp	r2, r3
-	b	.L1085
-.L1021:
+	b	.L1033
+.L1040:
 	mov	r1, r4
-	ldr	r0, .L1095+16
-	bl	printf
-	b	.L995
-.L999:
-	ldr	r3, .L1095+20
+	ldr	r0, .L1119+12
+	b	.L1111
+.L1020:
+	ldr	r3, .L1119+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1022
-	ldr	r2, .L1095+24
+	bhi	.L1041
+	ldr	r2, .L1119+20
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1095+20
+	ldr	r2, .L1119+16
 	str	r3, [r2]
-.L1022:
+.L1041:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1095+28
+	ldr	r3, .L1119+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1023
+	bne	.L1042
 	ldr	r2, [sp]
-.L1087:
+.L1110:
 	str	r2, [r3]
-	b	.L995
-.L1023:
+	b	.L1016
+.L1042:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L995
+	bcs	.L1016
 	mov	r2, r1
-	b	.L1087
-.L998:
+	b	.L1110
+.L1019:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1090
-.L1096:
+	b	.L1114
+.L1120:
 	.align	2
-.L1095:
-	.word	.LANCHOR8
+.L1119:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LC24
+	.word	.LC28
 	.word	.LANCHOR157
 	.word	.LANCHOR158
 	.word	.LANCHOR134
@@ -8099,56 +8131,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1121
-	ldr	r5, .L1121+4
-	ldr	r1, .L1121+8
-	ldr	r0, .L1121+12
+	ldr	r6, .L1145
+	ldr	r5, .L1145+4
+	ldr	r1, .L1145+8
+	ldr	r0, .L1145+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1121+4
+	ldr	r0, .L1145+4
 	bl	ftl_memset
-.L1098:
+.L1122:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1100
-	ldr	r10, .L1121+48
+	bcc	.L1124
+	ldr	r10, .L1145+48
 	movs	r4, #0
-	ldr	r7, .L1121+16
+	ldr	r7, .L1145+16
 	mov	r6, r4
-.L1101:
+.L1125:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1103
-	ldr	r3, .L1121+20
+	bhi	.L1127
+	ldr	r3, .L1145+20
 	ldr	r4, [r3]
-	cbz	r4, .L1104
-	ldr	r3, .L1121+24
+	cbz	r4, .L1128
+	ldr	r3, .L1145+24
 	mov	r8, #0
-	ldr	r5, .L1121+28
-	ldr	r10, .L1121+16
+	ldr	r5, .L1145+28
+	ldr	r10, .L1145+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1121+4
+	ldr	fp, .L1145+4
 	subs	r4, r4, r3
-	ldr	r3, .L1121+32
+	ldr	r3, .L1145+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1105:
+.L1129:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1104
+	bls	.L1128
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1106
+	cbz	r2, .L1130
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1121+36
+	ldr	r0, .L1145+36
 	bl	printf
-.L1106:
+.L1130:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -8156,71 +8188,71 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1105
-.L1104:
-	cbz	r6, .L1097
-	movw	r2, #2389
-	ldr	r1, .L1121+8
-	ldr	r0, .L1121+40
+	bne	.L1129
+.L1128:
+	cbz	r6, .L1121
+	movw	r2, #2383
+	ldr	r1, .L1145+8
+	ldr	r0, .L1145+40
 	bl	printf
-.L1097:
+.L1121:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1100:
+.L1124:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1099
+	beq	.L1123
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1099:
+.L1123:
 	adds	r4, r4, #1
-	b	.L1098
-.L1103:
+	b	.L1122
+.L1127:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1121+4
+	ldr	r8, .L1145+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1102
+	beq	.L1126
 	mov	r1, r5
-	ldr	r0, .L1121+44
+	ldr	r0, .L1145+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1102
+	beq	.L1126
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1102:
+.L1126:
 	adds	r4, r4, #1
-	b	.L1101
-.L1122:
+	b	.L1125
+.L1146:
 	.align	2
-.L1121:
+.L1145:
 	.word	.LANCHOR152
 	.word	check_vpc_table
 	.word	.LANCHOR159
-	.word	.LC25
+	.word	.LC29
 	.word	.LANCHOR42
-	.word	.LANCHOR47
+	.word	.LANCHOR46
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LC27
+	.word	.LC31
 	.word	.LC1
-	.word	.LC26
+	.word	.LC30
 	.word	.LANCHOR5
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",%progbits
@@ -8236,60 +8268,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1137
+	ldr	r7, .L1161
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1137+24
-	ldr	r0, .L1137+4
+	ldr	r8, .L1161+24
+	ldr	r0, .L1161+4
 	bl	printf
-.L1124:
+.L1148:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1130
+	bcc	.L1154
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1130:
+.L1154:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1125
+	cbnz	r3, .L1149
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1125:
+.L1149:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1127
-	ldr	r4, .L1137+8
+	beq	.L1151
+	ldr	r4, .L1161+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1137+12
+	ldr	r3, .L1161+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1137+16
+	ldr	r3, .L1161+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1128
+	beq	.L1152
 	adds	r3, r3, #1
-	beq	.L1128
+	beq	.L1152
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1127
-.L1128:
+	beq	.L1151
+.L1152:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1137+20
+	ldr	r0, .L1161+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8304,19 +8336,19 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1127:
+.L1151:
 	adds	r5, r5, #1
-	b	.L1124
-.L1138:
+	b	.L1148
+.L1162:
 	.align	2
-.L1137:
+.L1161:
 	.word	.LANCHOR152
-	.word	.LC28
+	.word	.LC32
 	.word	.LANCHOR138
 	.word	.LANCHOR106
 	.word	.LANCHOR114
-	.word	.LC30
-	.word	.LC29
+	.word	.LC34
+	.word	.LC33
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -8329,7 +8361,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1169
+	ldr	r3, .L1195
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
@@ -8337,29 +8369,29 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	str	r3, [sp, #20]
 	cmp	r5, r2
-	beq	.L1161
-	cbnz	r5, .L1140
-.L1141:
+	beq	.L1185
+	cbnz	r5, .L1164
+.L1165:
 	bl	FtlGcPageVarInit
-	b	.L1142
-.L1161:
+	b	.L1166
+.L1185:
 	movs	r5, #0
-.L1140:
-	ldr	r3, .L1169+4
+.L1164:
+	ldr	r3, .L1195+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L1141
-.L1142:
-	ldr	fp, .L1169+52
-.L1143:
+	beq	.L1165
+.L1166:
+	ldr	fp, .L1195+56
+.L1182:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1144
-.L1160:
-	ldr	r3, .L1169+8
+	beq	.L1167
+.L1184:
+	ldr	r3, .L1195+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r10, r2
@@ -8367,38 +8399,38 @@ FtlGcScanTempBlk:
 	mov	r8, #20
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1169+12
+	ldr	r3, .L1195+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1169+16
+	ldr	r3, .L1195+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1169+20
+	ldr	r3, .L1195+20
 	ldr	r7, [r3]
-	ldr	r3, .L1169+24
+	ldr	r3, .L1195+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1145:
+.L1168:
 	ldr	r1, [sp, #8]
 	uxth	r3, r2
 	cmp	r1, r3
-	bhi	.L1147
+	bhi	.L1170
 	mov	r8, #0
 	movs	r2, #0
 	mov	r1, r10
 	bl	FlashReadPages
-.L1148:
+.L1171:
 	uxth	r3, r8
 	cmp	r10, r3
-	bhi	.L1159
-	ldr	r3, .L1169+4
+	bhi	.L1183
+	ldr	r3, .L1195+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L1160
-.L1144:
+	bhi	.L1184
+.L1167:
 	ldr	r2, [sp, #20]
 	movw	r3, #65535
 	mov	r0, r4
@@ -8412,12 +8444,12 @@ FtlGcScanTempBlk:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1147:
+.L1170:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1146
+	beq	.L1169
 	mla	r1, r8, r10, r0
 	orr	r3, r5, r3, lsl #10
 	str	r3, [r1, #4]
@@ -8434,30 +8466,31 @@ FtlGcScanTempBlk:
 	str	r3, [r1, #12]
 	add	r3, r10, #1
 	uxth	r10, r3
-.L1146:
+.L1169:
 	adds	r2, r2, #1
-	b	.L1145
-.L1159:
+	b	.L1168
+.L1183:
 	movs	r3, #20
-	ldr	r1, [fp]
+	ldr	r2, [fp]
 	mul	r3, r3, r8
-	adds	r2, r1, r3
-	ldr	r6, [r1, r3]
-	ldr	r0, [r2, #4]
+	adds	r1, r2, r3
+	ldr	r6, [r2, r3]
+	ldr	r0, [r1, #4]
+	ldr	r7, [r1, #12]
 	str	r0, [sp, #4]
-	cbnz	r6, .L1149
-	ldr	r7, [r2, #12]
-	movw	r2, #65535
+	cmp	r6, #0
+	bne	.L1172
 	ldrh	r1, [r7]
+	movw	r2, #65535
 	cmp	r1, r2
-	beq	.L1149
-	ldr	r2, .L1169+28
+	beq	.L1193
+	ldr	r2, .L1195+28
 	ldr	r0, [r7, #8]
 	ldr	r2, [r2]
 	cmp	r0, r2
-	bls	.L1151
-.L1149:
-	ldr	r3, .L1169+32
+	bls	.L1174
+.L1193:
+	ldr	r3, .L1195+32
 	movs	r1, #0
 	ldrh	r2, [r4]
 	movs	r5, #0
@@ -8465,11 +8498,13 @@ FtlGcScanTempBlk:
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
+	ldr	r2, .L1195+36
 	movw	r3, #65535
 	strh	r3, [r4]	@ movhi
+	strh	r3, [r2]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1143
-.L1151:
+	b	.L1182
+.L1174:
 	mov	r2, r6
 	add	r1, sp, #24
 	str	r3, [sp, #8]
@@ -8478,55 +8513,59 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #8]
 	cmp	r2, r1
-	beq	.L1153
-.L1154:
+	beq	.L1176
+.L1178:
 	ldr	r2, [r7, #8]
-	add	r8, r8, #1
+.L1194:
 	ldr	r1, [sp, #4]
+	add	r8, r8, #1
 	ldr	r0, [r7, #12]
 	bl	FtlGcUpdatePage
-	b	.L1148
-.L1153:
+	b	.L1171
+.L1176:
 	str	r3, [sp, #8]
 	adds	r3, r2, #1
-	beq	.L1154
+	beq	.L1178
 	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r2, .L1169+36
+	ldr	r2, .L1195+40
 	add	r0, sp, #28
 	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1169+40
+	ldr	r2, .L1195+44
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1169+44
+	ldr	r2, .L1195+48
 	ldr	r1, [fp]
 	ldr	r3, [sp, #8]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1155:
+.L1179:
 	cmp	r6, r2
-	beq	.L1154
+	beq	.L1178
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1156
+	beq	.L1180
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1169+48
+	ldr	r0, .L1195+52
 	bl	printf
-	b	.L1149
-.L1156:
+	b	.L1193
+.L1180:
 	adds	r6, r6, #1
-	b	.L1155
-.L1170:
+	b	.L1179
+.L1172:
+	mov	r2, #-1
+	b	.L1194
+.L1196:
 	.align	2
-.L1169:
+.L1195:
 	.word	.LANCHOR160
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -8536,10 +8575,11 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR24
 	.word	.LANCHOR152
 	.word	.LANCHOR42
+	.word	.LANCHOR145
 	.word	.LANCHOR110
 	.word	.LANCHOR115
 	.word	.LANCHOR12
-	.word	.LC31
+	.word	.LC35
 	.word	.LANCHOR103
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
@@ -8553,7 +8593,7 @@ FtlGcScanTempBlk:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1183
+	ldr	r3, .L1209
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -8562,26 +8602,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1179
-	ldr	r3, .L1183+4
+	bhi	.L1205
+	ldr	r3, .L1209+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1173:
-	cbnz	r5, .L1178
-.L1171:
+.L1199:
+	cbnz	r5, .L1204
+.L1197:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1178:
-	ldr	r3, .L1183+8
+.L1204:
+	ldr	r3, .L1209+8
 	mov	r0, r7
-	ldr	r10, .L1183+24
+	ldr	r10, .L1209+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1183+12
+	ldr	r3, .L1209+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -8595,9 +8635,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1175
+	cbz	r2, .L1201
 	cmp	r4, r3
-	beq	.L1175
+	beq	.L1201
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -8607,7 +8647,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1176:
+.L1202:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -8620,7 +8660,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1183+16
+	ldr	r0, .L1209+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -8631,20 +8671,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1173
-.L1175:
-	ldr	r3, .L1183+20
+	b	.L1199
+.L1201:
+	ldr	r3, .L1209+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1176
-.L1179:
+	b	.L1202
+.L1205:
 	mov	r8, #-1
-	b	.L1171
-.L1184:
+	b	.L1197
+.L1210:
 	.align	2
-.L1183:
+.L1209:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
@@ -8665,57 +8705,57 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1187
-	ldr	r3, .L1187+4
+	ldr	r2, .L1213
+	ldr	r3, .L1213+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1185
-	ldr	r3, .L1187+8
+	bne	.L1211
+	ldr	r3, .L1213+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1187+12
+	ldr	r3, .L1213+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1187+16
+	ldr	r3, .L1213+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1187+20
+	ldr	r3, .L1213+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1187+24
+	ldr	r3, .L1213+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1187+28
+	ldr	r3, .L1213+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1187+32
+	ldr	r3, .L1213+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1187+36
+	ldr	r3, .L1213+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1187+40
+	ldr	r3, .L1213+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1187+44
+	ldr	r3, .L1213+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1187+48
+	ldr	r3, .L1213+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1187+52
+	ldr	r3, .L1213+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1187+56
+	ldr	r3, .L1213+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1185:
+.L1211:
 	bx	lr
-.L1188:
+.L1214:
 	.align	2
-.L1187:
+.L1213:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	1342177352
@@ -8743,7 +8783,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1194
+	ldr	r2, .L1220
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -8752,22 +8792,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1194+4
-	cbnz	r0, .L1191
+	ldr	r2, .L1220+4
+	cbnz	r0, .L1217
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1192
-.L1191:
+	bcc	.L1218
+.L1217:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1194+8
+	ldr	r3, .L1220+8
 	str	r3, [r2]
-	ldr	r3, .L1194+12
+	ldr	r3, .L1220+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -8778,12 +8818,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1192:
+.L1218:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1195:
+.L1221:
 	.align	2
-.L1194:
+.L1220:
 	.word	.LANCHOR164
 	.word	.LANCHOR118
 	.word	1112818501
@@ -8815,7 +8855,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1207
+	ldr	r3, .L1233
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -8824,28 +8864,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1206
-	ldr	r3, .L1207+4
+	bhi	.L1232
+	ldr	r3, .L1233+4
 	mov	r8, #0
-	ldr	fp, .L1207+28
+	ldr	fp, .L1233+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1199:
-	cbnz	r6, .L1205
-.L1197:
+.L1225:
+	cbnz	r6, .L1231
+.L1223:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1205:
-	ldr	r3, .L1207+8
+.L1231:
+	ldr	r3, .L1233+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1207+12
+	ldr	r2, .L1233+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -8860,7 +8900,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1201
+	beq	.L1227
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -8874,28 +8914,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1207+16
+	ldr	r2, .L1233+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1203
+	bne	.L1229
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1207+20
+	ldr	r0, .L1233+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1207+24
+	ldr	r0, .L1233+24
 	bl	FtlMapWritePage
-.L1203:
+.L1229:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1204:
+.L1230:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -8904,25 +8944,25 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1199
-.L1201:
+	b	.L1225
+.L1227:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1204
-.L1206:
+	b	.L1230
+.L1232:
 	mov	r8, #-1
-	b	.L1197
-.L1208:
+	b	.L1223
+.L1234:
 	.align	2
-.L1207:
+.L1233:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR123
 	.word	.LANCHOR12
 	.word	.LANCHOR138
-	.word	.LC32
+	.word	.LC36
 	.word	.LANCHOR161
 	.word	.LANCHOR108
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -8939,35 +8979,35 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1211
-	ldr	r5, .L1211+4
+	ldr	r4, .L1237
+	ldr	r5, .L1237+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1211+8
+	ldr	r3, .L1237+8
 	cmp	r2, r3
-	beq	.L1210
-	ldr	r1, .L1211+12
-	ldr	r0, .L1211+16
+	beq	.L1236
+	ldr	r1, .L1237+12
+	ldr	r0, .L1237+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1210:
+.L1236:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1212:
+.L1238:
 	.align	2
-.L1211:
+.L1237:
 	.word	.LANCHOR118
 	.word	.LANCHOR116
 	.word	1112818501
-	.word	.LC33
-	.word	.LC34
+	.word	.LC37
+	.word	.LC38
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -8982,75 +9022,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1216
+	ldr	r4, .L1242
 	movs	r0, #0
-	ldr	r5, .L1216+4
+	ldr	r5, .L1242+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1214
+	beq	.L1240
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1214:
+.L1240:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1216+8
-	bne	.L1215
+	ldr	r3, .L1242+8
+	bne	.L1241
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1216+12
+	ldr	r2, .L1242+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1216+16
+	ldr	r2, .L1242+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1216+20
+	ldr	r2, .L1242+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1216+24
+	ldr	r2, .L1242+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1216+28
+	ldr	r2, .L1242+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1216+32
+	ldr	r2, .L1242+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1216+36
+	ldr	r2, .L1242+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1216+40
+	ldr	r2, .L1242+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1216+44
+	ldr	r2, .L1242+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1216+48
+	ldr	r2, .L1242+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1216+52
+	ldr	r2, .L1242+52
 	str	r1, [r2]
-.L1215:
-	ldr	r1, .L1216+56
-	ldr	r2, .L1216+60
+.L1241:
+	ldr	r1, .L1242+56
+	ldr	r2, .L1242+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1216+64
+	ldr	r1, .L1242+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1216+68
+	ldr	r3, .L1242+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1217:
+.L1243:
 	.align	2
-.L1216:
+.L1242:
 	.word	.LANCHOR135
 	.word	1179929683
 	.word	.LANCHOR91
@@ -9068,7 +9108,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR90
 	.word	.LANCHOR14
 	.word	.LANCHOR5
-	.word	.LANCHOR145
+	.word	.LANCHOR143
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",%progbits
 	.align	1
@@ -9100,30 +9140,30 @@ FtlMapBlkWriteDump_data:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L1219
+	beq	.L1245
 	movs	r3, #0
-	ldr	r5, .L1231
+	ldr	r5, .L1257
 	str	r3, [r0, #36]
-	ldr	r3, .L1231+4
+	ldr	r3, .L1257+4
 	ldrh	r6, [r0, #6]
 	mov	r7, r5
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	str	r3, [r5, #8]
-	ldr	r3, .L1231+8
+	ldr	r3, .L1257+8
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L1221
-	ldr	r2, .L1231+12
+	cbz	r3, .L1247
+	ldr	r2, .L1257+12
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1221
+	bge	.L1247
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1221
+	beq	.L1247
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -9135,44 +9175,44 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1221
+	beq	.L1247
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1221
+	bne	.L1247
 	ldr	r2, [r5, #8]
-.L1230:
+.L1256:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L1221:
+.L1247:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L1222
+	cbz	r3, .L1248
 	movs	r2, #1
-	ldr	r0, .L1231
+	ldr	r0, .L1257
 	mov	r1, r2
 	bl	FlashReadPages
-.L1223:
+.L1249:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L1230
-.L1222:
-	ldr	r3, .L1231+16
+	b	.L1256
+.L1248:
+	ldr	r3, .L1257+16
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1223
-.L1219:
+	b	.L1249
+.L1245:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1232:
+.L1258:
 	.align	2
-.L1231:
+.L1257:
 	.word	.LANCHOR138
 	.word	.LANCHOR107
 	.word	.LANCHOR114
@@ -9192,10 +9232,10 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, #0
-	ldr	r5, .L1248
-	ldr	r3, .L1248+4
-	ldr	fp, .L1248+76
-	ldr	r6, .L1248+8
+	ldr	r5, .L1274
+	ldr	r3, .L1274+4
+	ldr	fp, .L1274+76
+	ldr	r6, .L1274+8
 	ldr	r7, [r3]
 	ldr	r0, [fp]
 	ldrh	r3, [r5]
@@ -9203,23 +9243,23 @@ FtlVpcTblFlush:
 	str	r0, [r6, #8]
 	strh	r3, [r7, #2]	@ movhi
 	movw	r3, #61604
-	ldr	r4, .L1248+12
+	ldr	r4, .L1274+12
 	strh	r3, [r7]	@ movhi
-	ldr	r2, .L1248+16
+	ldr	r2, .L1274+16
 	ldr	r3, [r5, #8]
-	ldr	ip, .L1248+80
+	ldr	ip, .L1274+80
 	str	r10, [r7, #8]
 	str	r3, [r7, #4]
 	stm	r4, {r2, ip}
 	ldrh	r2, [r5, #6]
 	str	r10, [r7, #12]
-	ldr	r8, .L1248+84
+	ldr	r8, .L1274+84
 	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1248+20
-	ldr	r3, .L1248+24
+	ldr	r2, .L1274+20
+	ldr	r3, .L1274+24
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	ldr	r2, .L1248+28
+	ldr	r2, .L1274+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r4, #14]	@ movhi
@@ -9227,7 +9267,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1248+32
+	ldr	r2, .L1274+32
 	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9236,7 +9276,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #12]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1248+36
+	ldr	r2, .L1274+36
 	strh	r1, [r4, #20]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -9245,32 +9285,32 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1248+40
+	ldr	r2, .L1274+40
 	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
 	ldr	r2, [r8]
 	str	r2, [r4, #40]
-	ldr	r2, .L1248+44
+	ldr	r2, .L1274+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r4
-	ldr	r4, .L1248+48
+	ldr	r4, .L1274+48
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r4]
 	ldr	r0, [r6, #8]
-	ldr	r1, .L1248+52
+	ldr	r1, .L1274+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
 	ldrh	r0, [r4]
-	ldr	r1, .L1248+56
+	ldr	r1, .L1274+56
 	ldr	r4, [r6, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -9282,13 +9322,13 @@ FtlVpcTblFlush:
 	mov	r4, r10
 	bl	ftl_memcpy
 	mov	r0, r10
-	ldr	r10, .L1248+4
+	ldr	r10, .L1274+4
 	bl	FtlUpdateVaildLpn
 	movw	r3, #65535
 	str	r3, [sp]
-	ldr	r3, .L1248+24
+	ldr	r3, .L1274+24
 	str	r3, [sp, #4]
-.L1234:
+.L1260:
 	ldr	r3, [fp]
 	ldrh	r1, [r5, #2]
 	ldrh	r2, [r5]
@@ -9297,11 +9337,11 @@ FtlVpcTblFlush:
 	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r6, #4]
-	ldr	r3, .L1248+60
+	ldr	r3, .L1274+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1235
+	blt	.L1261
 	ldrh	r3, [r5, #4]
 	strh	r2, [r5, #4]	@ movhi
 	str	r3, [sp]
@@ -9317,7 +9357,7 @@ FtlVpcTblFlush:
 	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1235:
+.L1261:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldrh	r1, [r3]
@@ -9326,7 +9366,7 @@ FtlVpcTblFlush:
 	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1248+8
+	ldr	r0, .L1274+8
 	bl	FlashProgPages
 	ldrh	r3, [r5, #2]
 	ldr	r2, [r6]
@@ -9334,51 +9374,51 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r5, #2]	@ movhi
-	bne	.L1236
+	bne	.L1262
 	cmp	r3, #1
-	bne	.L1237
+	bne	.L1263
 	movw	r2, #1138
-	ldr	r1, .L1248+64
-	ldr	r0, .L1248+68
+	ldr	r1, .L1274+64
+	ldr	r0, .L1274+68
 	bl	printf
-.L1237:
+.L1263:
 	ldrh	r3, [r5, #2]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1248+60
+	ldreq	r3, .L1274+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r5, #2]	@ movhi
 	cmp	r4, #3
-	bls	.L1234
+	bls	.L1260
 	mov	r2, r4
 	ldr	r1, [r6, #4]
-	ldr	r0, .L1248+72
+	ldr	r0, .L1274+72
 	bl	printf
-.L1240:
-	b	.L1240
-.L1236:
+.L1266:
+	b	.L1266
+.L1262:
 	cmp	r3, #1
-	beq	.L1234
+	beq	.L1260
 	cmp	r2, #256
-	beq	.L1234
+	beq	.L1260
 	ldr	r2, [sp]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1241
+	beq	.L1267
 	movs	r1, #1
 	mov	r0, r2
 	bl	FtlFreeSysBlkQueueIn
-.L1241:
+.L1267:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1249:
+.L1275:
 	.align	2
-.L1248:
+.L1274:
 	.word	.LANCHOR139
 	.word	.LANCHOR114
 	.word	.LANCHOR138
@@ -9397,7 +9437,7 @@ FtlVpcTblFlush:
 	.word	.LANCHOR20
 	.word	.LANCHOR165
 	.word	.LC1
-	.word	.LC35
+	.word	.LC39
 	.word	.LANCHOR106
 	.word	1342177352
 	.word	.LANCHOR82
@@ -9433,17 +9473,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1253
+	ldr	r3, .L1279
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1252
+	bne	.L1278
 	bl	FtlSysFlush
-.L1252:
+.L1278:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1254:
+.L1280:
 	.align	2
-.L1253:
+.L1279:
 	.word	.LANCHOR166
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -9457,24 +9497,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1270
+	ldr	r3, .L1296
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1263
+	bhi	.L1289
 	cmp	r1, #31
-	bhi	.L1257
-.L1262:
+	bhi	.L1283
+.L1288:
 	movs	r0, #0
-.L1255:
+.L1281:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1257:
-	ldr	r8, .L1270+12
+.L1283:
+	ldr	r8, .L1296+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -9482,7 +9522,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1258
+	cbz	r7, .L1284
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -9490,32 +9530,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1258:
-	ldr	r4, .L1270+4
+.L1284:
+	ldr	r4, .L1296+4
 	mov	r3, #-1
-	ldr	r7, .L1270+8
+	ldr	r7, .L1296+8
 	str	r3, [sp, #4]
-.L1259:
+.L1285:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1261
-	ldr	r3, .L1270+4
+	bcs	.L1287
+	ldr	r3, .L1296+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1262
+	bls	.L1288
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1262
-.L1261:
+	b	.L1288
+.L1287:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1260
+	beq	.L1286
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -9530,17 +9570,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1260:
+.L1286:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1259
-.L1263:
+	b	.L1285
+.L1289:
 	mov	r0, #-1
-	b	.L1255
-.L1271:
+	b	.L1281
+.L1297:
 	.align	2
-.L1270:
+.L1296:
 	.word	.LANCHOR34
 	.word	.LANCHOR167
 	.word	.LANCHOR86
@@ -9557,47 +9597,47 @@ FtlDiscard:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1282
+	ldr	r3, .L1308
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1273
-	movw	r2, #2760
-	ldr	r1, .L1282+4
-	ldr	r0, .L1282+8
+	bcs	.L1299
+	movw	r2, #2755
+	ldr	r1, .L1308+4
+	ldr	r0, .L1308+8
 	bl	printf
-.L1273:
+.L1299:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1274
-	ldr	r3, .L1282+12
+	beq	.L1300
+	ldr	r3, .L1308+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1275
+	cbz	r3, .L1301
 	bl	INSERT_DATA_LIST
-.L1274:
-	ldr	r5, .L1282+16
+.L1300:
+	ldr	r5, .L1308+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1276
+	beq	.L1302
 	cmp	r4, r0
-	bne	.L1277
-	ldr	r3, .L1282+12
+	bne	.L1303
+	ldr	r3, .L1308+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1278
-.L1277:
+	cbz	r3, .L1304
+.L1303:
 	bl	update_vpc_list
-.L1278:
+.L1304:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1276:
+.L1302:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9606,12 +9646,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1275:
+.L1301:
 	bl	INSERT_FREE_LIST
-	b	.L1274
-.L1283:
+	b	.L1300
+.L1309:
 	.align	2
-.L1282:
+.L1308:
 	.word	.LANCHOR5
 	.word	.LANCHOR168
 	.word	.LC1
@@ -9627,125 +9667,109 @@ allocate_new_data_superblock:
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1298+24
-	mov	r4, r3
+	ldr	r10, .L1329+20
+	mov	r5, r3
 	movs	r2, #0
-	mov	r5, r0
+	mov	r4, r0
+	ldr	fp, .L1329
+	mov	r8, r1
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	mov	r10, r1
 	bl	FlashProgPages
-.L1285:
-	cmp	r6, r10
-	beq	.L1292
-	ldr	r7, .L1298
-	b	.L1293
-.L1288:
-	ldr	r0, [r5, #4]
+.L1311:
+	cmp	r6, r8
+	bne	.L1318
+	ldr	r3, .L1329
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1310
+	movw	r2, #997
+	ldr	r1, .L1329+4
+	ldr	r0, .L1329+8
+	bl	printf
+.L1310:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1313:
+	ldr	r1, [r4, #4]
+	mov	r0, r10
+	bl	printf
+	ldr	r0, [r4, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldrh	r3, [r4]
-	cmp	r3, r0
-	bne	.L1286
-	ldr	r1, [r8]
-	ldrh	r0, [r4, #4]
-	ldrh	r2, [r1, r3, lsl #1]
-	subs	r2, r2, r0
-	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldrh	r3, [r7]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-.L1286:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1287
-	mov	r0, r4
+	bl	decrement_vpc_count
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1312
+	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1287:
-	ldr	r2, .L1298+4
-	ldr	r3, [r2, #96]
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlGcMarkBadPhyBlk
-	mov	r0, r4
+.L1312:
+	mov	r0, r5
 	bl	get_new_active_ppa
 	movs	r2, #0
-	str	r0, [r5, #4]
-	str	r0, [sp, #4]
+	str	r0, [r4, #4]
+	str	r0, [sp, #12]
 	movs	r1, #1
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r0, r5
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	mov	r0, r4
 	bl	FlashProgPages
-.L1293:
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L1288
-	ldr	r3, .L1298+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+.L1318:
+	ldr	r2, [r4]
+	adds	r3, r2, #1
+	beq	.L1313
+	cmp	r2, #256
+	beq	.L1313
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [fp]
 	cmp	r2, r3
-	bcc	.L1289
-	mov	r2, #960
-	ldr	r1, .L1298+12
-	ldr	r0, .L1298+16
+	bcc	.L1314
+	movw	r2, #982
+	ldr	r1, .L1329+4
+	ldr	r0, .L1329+8
 	bl	printf
-.L1289:
-	ldr	r3, [r5, #4]
-	add	r1, sp, #8
+.L1314:
+	ldr	r3, [r4, #4]
+	add	r1, sp, #16
 	movs	r2, #1
-	ldr	r0, [r5, #16]
+	ldr	r0, [r4, #16]
 	str	r3, [r1, #-4]!
 	bl	log2phys
-	ldr	r3, [r5, #12]
-	ldr	fp, [r3, #12]
-	ubfx	r0, fp, #10, #16
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3, #12]
+	ubfx	r0, r3, #10, #16
+	str	r3, [sp, #4]
 	bl	P2V_block_in_plane
-	cmp	fp, #-1
+	ldr	r3, [sp, #4]
 	mov	r7, r0
-	beq	.L1290
-	ldr	r3, [r8]
+	adds	r3, r3, #1
+	beq	.L1315
+	ldr	r3, .L1329+12
+	ldr	r3, [r3]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1291
+	cbnz	r2, .L1316
 	mov	r1, r0
-	ldr	r0, .L1298+20
+	ldr	r0, .L1329+16
 	bl	printf
-.L1291:
+.L1316:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1290:
+.L1315:
 	adds	r6, r6, #1
-	adds	r5, r5, #20
-	b	.L1285
-.L1292:
-	ldr	r3, .L1298+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1284
-	movw	r2, #975
-	ldr	r1, .L1298+12
-	ldr	r0, .L1298+16
-	bl	printf
-.L1284:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1299:
+	adds	r4, r4, #20
+	b	.L1311
+.L1330:
 	.align	2
-.L1298:
-	.word	.LANCHOR19
-	.word	.LANCHOR135
+.L1329:
 	.word	.LANCHOR3
 	.word	.LANCHOR169
 	.word	.LC1
-	.word	.LC36
 	.word	.LANCHOR42
+	.word	.LC41
+	.word	.LC40
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
@@ -9760,183 +9784,148 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r3, #65535
-	ldr	r0, .L1319
-	ldr	r5, .L1319+4
-	ldrh	r6, [r0]
-	mov	r4, r0
-	cmp	r6, r3
-	beq	.L1301
-	ldr	r3, .L1319+8
+	ldr	r4, .L1346
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L1332
+	ldr	r3, .L1346+4
+	mov	r0, r4
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
-	adds	r0, r0, #1
-	beq	.L1301
-	ldr	r3, .L1319+12
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	cmp	r3, #4
-	bls	.L1302
-	subs	r3, r3, #5
-	movs	r0, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	bl	FtlEctTblFlush
-.L1302:
-	ldr	r3, [r5]
-	cbnz	r3, .L1303
-	ldr	r2, .L1319+16
-	ldr	r0, [sp, #12]
-	ldr	r3, [r2, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1303:
-	movs	r0, #1
-	movs	r3, #0
-	str	r3, [r5]
-.L1300:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1301:
-	ldrh	r2, [r4]
-	movs	r3, #0
-	str	r3, [r5]
+.L1332:
+	ldr	r3, .L1346+8
+	movs	r2, #0
+	str	r2, [r3]
 	movw	r3, #65535
+	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1305
-.L1314:
-	movs	r0, #0
-	b	.L1300
-.L1305:
-	ldr	r6, .L1319+8
+	beq	.L1334
+	ldr	r6, .L1346+4
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldr	r5, .L1319+20
+	ldr	r5, .L1346+12
 	ldrh	r2, [r6]
 	ldrh	r1, [r5]
 	muls	r2, r0, r2
 	cmp	r1, r2
-	beq	.L1306
-	movs	r2, #162
-	ldr	r1, .L1319+24
-	ldr	r0, .L1319+28
+	beq	.L1335
+	movs	r2, #164
+	ldr	r1, .L1346+16
+	ldr	r0, .L1346+20
 	bl	printf
-.L1306:
+.L1335:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1319+32
+	ldr	r2, .L1346+24
 	ldrh	r0, [r4]
-	ldr	fp, .L1319+64
+	ldr	fp, .L1346+56
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
-	str	r2, [sp, #4]
+	mov	r10, r2
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1319+36
+	ldr	r1, .L1346+28
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1307:
+.L1336:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1311
+	bhi	.L1340
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
-	ldr	r3, [r3]
+	ldr	r3, [r10]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1312
+	beq	.L1341
 	bl	INSERT_DATA_LIST
-.L1313:
-	ldr	r3, .L1319+40
+.L1342:
+	ldr	r2, .L1346+32
+	movs	r3, #0
 	movw	r6, #65535
+	strh	r3, [r5]	@ movhi
 	strh	r6, [r4]	@ movhi
-	movs	r4, #0
-	strh	r4, [r5]	@ movhi
-	strh	r4, [r3]	@ movhi
+	strh	r3, [r2]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1319+44
+	ldr	r3, .L1346+36
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1319+48
+	ldr	r3, .L1346+40
 	ldrh	r2, [r3]
-	ldr	r3, .L1319+52
+	ldr	r3, .L1346+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1314
-	ldr	r3, .L1319+56
-	movs	r2, #20
-	mov	r0, r4
-	strh	r2, [r3]	@ movhi
-	b	.L1300
-.L1311:
+	ittt	gt
+	ldrgt	r3, .L1346+48
+	movgt	r2, #20
+	strhgt	r2, [r3]	@ movhi
+.L1334:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1340:
 	uxth	r3, r6
-	movs	r7, #12
+	mov	r8, #12
 	ldr	r2, [fp]
-	muls	r7, r3, r7
-	ldr	r3, .L1319+60
-	ldr	r8, [r3]
-	add	r10, r8, r7
-	ldr	r1, [r10, #8]
-	cmp	r1, r2
-	bcc	.L1308
-	movs	r2, #168
-	ldr	r1, .L1319+24
-	ldr	r0, .L1319+28
-	bl	printf
-.L1308:
+	mul	r8, r8, r3
+	ldr	r3, .L1346+52
+	ldr	r3, [r3]
+	add	r7, r3, r8
+	ldr	r0, [r7, #8]
+	cmp	r0, r2
+	bcc	.L1337
+.L1344:
+	ldrh	r0, [r4]
+	b	.L1345
+.L1337:
 	movs	r2, #0
 	add	r1, sp, #12
-	ldr	r0, [r10, #8]
+	str	r3, [sp, #4]
 	bl	log2phys
+	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #12]
-	ldr	r0, [r8, r7]
+	ldr	r0, [r3, r8]
 	cmp	r0, r2
-	bne	.L1309
+	bne	.L1339
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
-	mov	r7, r0
-	add	r1, r10, #4
-	ldr	r0, [r10, #8]
+	mov	r8, r0
+	adds	r1, r7, #4
+	ldr	r0, [r7, #8]
 	bl	log2phys
-	mov	r0, r7
-.L1318:
+	mov	r0, r8
+.L1345:
 	bl	decrement_vpc_count
-.L1310:
-	adds	r6, r6, #1
-	b	.L1307
-.L1309:
-	ldr	r3, [r10, #4]
+	b	.L1338
+.L1339:
+	ldr	r3, [r7, #4]
 	cmp	r2, r3
-	beq	.L1310
-	ldrh	r0, [r4]
-	b	.L1318
-.L1312:
+	bne	.L1344
+.L1338:
+	adds	r6, r6, #1
+	b	.L1336
+.L1341:
 	bl	INSERT_FREE_LIST
-	b	.L1313
-.L1320:
+	b	.L1342
+.L1347:
 	.align	2
-.L1319:
+.L1346:
 	.word	.LANCHOR53
-	.word	.LANCHOR133
 	.word	.LANCHOR19
-	.word	.LANCHOR43
-	.word	.LANCHOR135
+	.word	.LANCHOR133
 	.word	.LANCHOR70
 	.word	.LANCHOR170
 	.word	.LC1
 	.word	.LANCHOR42
 	.word	.LANCHOR84
 	.word	.LANCHOR69
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR48
 	.word	.LANCHOR171
 	.word	.LANCHOR100
@@ -9955,27 +9944,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1323
-	ldr	r5, .L1323+4
+	ldr	r4, .L1350
+	ldr	r5, .L1350+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1321
-	ldr	r0, .L1323+8
+	bcc	.L1348
+	ldr	r0, .L1350+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1323+12
+	ldr	r3, .L1350+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1321:
+.L1348:
 	pop	{r3, r4, r5, pc}
-.L1324:
+.L1351:
 	.align	2
-.L1323:
+.L1350:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR129
@@ -9994,13 +9983,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1326
-	ldr	r3, .L1326+4
+	ldr	r5, .L1353
+	ldr	r3, .L1353+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1326+8
+	ldr	r5, .L1353+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -10011,9 +10000,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1327:
+.L1354:
 	.align	2
-.L1326:
+.L1353:
 	.word	.LANCHOR51
 	.word	.LANCHOR157
 	.word	.LANCHOR52
@@ -10031,72 +10020,51 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1335
+	ldr	r4, .L1363
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1335+4
+	ldr	r5, .L1363+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1329:
+.L1356:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1332
+	bhi	.L1359
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1335+8
+	ldr	r3, .L1363+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1328
+	cbnz	r3, .L1355
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1334
-.L1332:
+	movs	r0, #1
+.L1355:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1359:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
-	adds	r3, r2, #1
-	bne	.L1330
-	ldr	r3, .L1335+8
-	movs	r5, #0
-	ldr	r0, .L1335+12
-	ldrh	r4, [r3]
-	ldr	r0, [r0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1335+16
-	ldr	r0, [r1, #4]
-	ldr	r3, [r2, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L1334:
-	movs	r0, #1
-.L1328:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1330:
-	ldr	r3, [r1, #12]
+	ldr	r0, [r1, #12]
 	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
+	adds	r3, r2, #1
+	it	ne
+	ldrne	r2, [r0, #8]
+	ldr	r0, [r0, #12]
 	bl	FtlGcUpdatePage
-	b	.L1329
-.L1336:
+	b	.L1356
+.L1364:
 	.align	2
-.L1335:
+.L1363:
 	.word	.LANCHOR62
 	.word	.LANCHOR104
 	.word	.LANCHOR53
-	.word	.LANCHOR42
-	.word	.LANCHOR135
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -10111,34 +10079,34 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1340
+	ldr	r4, .L1368
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1338
+	beq	.L1366
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1339
-.L1338:
+	cbnz	r3, .L1367
+.L1366:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1340
+	ldr	r0, .L1368
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1340+4
+	ldr	r3, .L1368+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1340+8
+	ldr	r3, .L1368+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1339:
-	ldr	r0, .L1340
+.L1367:
+	ldr	r0, .L1368
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1341:
+.L1369:
 	.align	2
-.L1340:
+.L1368:
 	.word	.LANCHOR53
 	.word	.LANCHOR69
 	.word	.LANCHOR70
@@ -10154,184 +10122,188 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1424
+	ldr	r3, .L1460
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
-	str	r0, [sp, #20]
+	sub	sp, sp, #48
+	str	r0, [sp, #28]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1394
-	ldr	r3, .L1424+4
+	bne	.L1427
+	ldr	r3, .L1460+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1342
-	ldr	r3, .L1424+8
+	bls	.L1370
+	ldr	r3, .L1460+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	beq	.L1344
-	ldr	r1, .L1424+12
+	beq	.L1372
+	ldr	r1, .L1460+12
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-.L1344:
-	ldr	r3, [sp, #20]
+.L1372:
+	ldr	r3, [sp, #28]
 	cmp	r3, #0
-	bne	.L1396
-	ldr	r3, .L1424+16
+	bne	.L1429
+	ldr	r3, .L1460+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1397
-	ldr	r2, .L1424+20
+	bhi	.L1430
+	ldr	r2, .L1460+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1347
+	bls	.L1375
 	lsrs	r4, r4, #5
-.L1346:
-	ldr	r2, .L1424+24
+.L1374:
+	ldr	r2, .L1460+24
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1350
-	ldr	r3, .L1424+28
+	bcs	.L1378
+	ldr	r3, .L1460+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1351
-	ldr	r0, .L1424+12
+	bne	.L1379
+	ldr	r0, .L1460+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1351
-	ldr	r3, .L1424+32
+	bne	.L1379
+	ldr	r3, .L1460+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1352
-	ldr	r3, .L1424+36
-	ldr	r4, .L1424+40
+	cbnz	r0, .L1380
+	ldr	r3, .L1460+36
+	ldr	r4, .L1460+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1353
-.L1352:
-	ldr	r3, .L1424+44
+	bcs	.L1381
+.L1380:
+	ldr	r3, .L1460+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1354:
-	ldr	r3, .L1424+48
+.L1382:
+	ldr	r3, .L1460+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1342:
-	add	sp, sp, #40
+.L1370:
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1347:
+.L1375:
 	cmp	r3, #12
-	bls	.L1348
+	bls	.L1376
 	lsrs	r4, r4, #4
-	b	.L1346
-.L1348:
+	b	.L1374
+.L1376:
 	cmp	r3, #8
-	bls	.L1346
+	bls	.L1374
 	lsrs	r4, r4, #2
-	b	.L1346
-.L1397:
+	b	.L1374
+.L1430:
 	movs	r4, #1
-	b	.L1346
-.L1353:
+	b	.L1374
+.L1381:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1354
-.L1351:
-	ldr	r3, .L1424+44
+	b	.L1382
+.L1379:
+	ldr	r3, .L1460+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1350:
-	ldr	r3, .L1424+52
+.L1378:
+	ldr	r3, .L1460+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1345
+	cbz	r3, .L1373
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1345:
-	ldr	r5, .L1424+56
+.L1373:
+	ldr	r5, .L1460+56
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L1357
-	ldr	r3, .L1424+12
+	bne	.L1385
+	ldr	r3, .L1460+12
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1358
-	ldr	r0, .L1424+60
+	beq	.L1386
+	ldr	r0, .L1460+60
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1359
+	cbnz	r1, .L1387
 	strh	r2, [r3]	@ movhi
-.L1359:
+.L1387:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L1358:
+.L1386:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1357
+	beq	.L1385
 	bl	IsBlkInGcList
-	cbz	r0, .L1361
+	cbz	r0, .L1389
 	strh	r6, [r5]	@ movhi
-.L1361:
+.L1389:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1357
-	ldr	r0, .L1424+56
+	beq	.L1385
+	ldr	r0, .L1460+56
 	bl	make_superblock
-	ldr	r2, .L1424+64
+	ldr	r2, .L1460+64
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1424+60
+	ldr	r3, .L1460+60
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1424+68
+	ldr	r3, .L1460+68
 	strh	r2, [r3]	@ movhi
-.L1357:
-	ldr	r2, .L1424+72
+.L1385:
+	ldr	r2, .L1460+72
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1362
-	ldr	r2, .L1424+76
+	beq	.L1390
+	ldr	r2, .L1460+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1363
-.L1362:
+	beq	.L1390
+	ldr	r2, .L1460+28
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L1391
+.L1390:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1363:
-	ldr	r5, .L1424+56
+.L1391:
+	ldr	r5, .L1460+56
 	mov	r6, r5
-.L1393:
+.L1426:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1364
-	ldr	fp, .L1424+88
+	bne	.L1392
+	ldr	fp, .L1460+88
 	movs	r2, #0
-	ldr	r3, .L1424+48
+	ldr	r3, .L1460+48
 	mov	r8, fp
 	str	r2, [r3]
-.L1365:
+.L1393:
 	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -10339,78 +10311,78 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1366
+	bne	.L1394
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [fp]	@ movhi
-	b	.L1342
-.L1396:
+	b	.L1370
+.L1429:
 	movs	r4, #1
-	b	.L1345
-.L1366:
-	str	r0, [sp, #8]
+	b	.L1373
+.L1394:
+	str	r0, [sp, #16]
 	mov	r0, r3
-	str	r3, [sp, #4]
+	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
-	cbz	r0, .L1367
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #16]
+	cbz	r0, .L1395
 	strh	r7, [fp]	@ movhi
-	b	.L1365
-.L1367:
+	b	.L1393
+.L1395:
 	uxth	r0, r2
-	ldr	r2, .L1424+20
-	ldr	r10, .L1424+60
+	ldr	r2, .L1460+20
+	ldr	r10, .L1460+60
 	uxth	r7, r7
 	ldrh	lr, [r2]
-	ldr	r2, .L1424+80
+	ldr	r2, .L1460+80
 	ldr	r1, [r10]
 	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1369
+	bgt	.L1397
 	cmp	r7, #48
-	bls	.L1370
+	bls	.L1398
 	cmp	ip, #8
-	bls	.L1370
-	ldr	r7, .L1424+84
+	bls	.L1398
+	ldr	r7, .L1460+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1370
-.L1369:
+	bhi	.L1398
+.L1397:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1370:
+.L1398:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1371
+	bgt	.L1399
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1371
+	bhi	.L1399
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r8]	@ movhi
-.L1423:
-	ldr	r3, .L1424+32
+.L1459:
+	ldr	r3, .L1460+32
 	ldrh	r0, [r3]
-	b	.L1342
-.L1371:
-	cbnz	r1, .L1372
+	b	.L1370
+.L1399:
+	cbnz	r1, .L1400
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1365
-.L1425:
+	b	.L1393
+.L1461:
 	.align	2
-.L1424:
+.L1460:
 	.word	.LANCHOR94
-	.word	.LANCHOR45
+	.word	.LANCHOR44
 	.word	.LANCHOR73
 	.word	.LANCHOR72
 	.word	.LANCHOR48
@@ -10423,7 +10395,7 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR171
 	.word	.LANCHOR95
 	.word	.LANCHOR74
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR42
 	.word	.LANCHOR173
 	.word	.LANCHOR174
@@ -10432,65 +10404,65 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR3
 	.word	.LANCHOR69
 	.word	.LANCHOR102
-.L1372:
+.L1400:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1426
+	ldr	r2, .L1462
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1373
-	mov	r2, #700
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1401
+	movw	r2, #717
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1373:
-	ldr	r3, .L1426+12
+.L1401:
+	ldr	r3, .L1462+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1374
-	movw	r2, #701
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1402
+	movw	r2, #718
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1374:
-	ldr	r3, .L1426+16
+.L1402:
+	ldr	r3, .L1462+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1375
-	movw	r2, #702
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1403
+	movw	r2, #719
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1375:
+.L1403:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1426+20
+	ldr	r2, .L1462+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1426+24
+	ldr	r2, .L1462+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1364:
-	ldr	r3, .L1426+28
+.L1392:
+	ldr	r3, .L1462+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1426+32
+	ldr	r3, .L1462+32
 	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, [sp, #20]
-	cbz	r3, .L1376
-	ldr	r3, .L1426+36
-	ldr	r2, [sp, #12]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #28]
+	cbz	r3, .L1404
+	ldr	r3, .L1462+36
+	ldr	r2, [sp, #16]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1426+40
+	ldr	r2, .L1462+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -10498,10 +10470,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1376:
+.L1404:
 	ldrh	r3, [r6, #2]
-	ldr	r1, [sp, #12]
-	ldr	fp, .L1426+64
+	ldr	r1, [sp, #16]
+	ldr	fp, .L1462+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -10510,94 +10482,94 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-	str	r3, [sp, #8]
-.L1379:
-	ldrh	r3, [sp, #8]
+	str	r3, [sp, #24]
+.L1407:
+	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1387
-	ldr	r3, .L1426+36
+	bls	.L1415
+	ldr	r3, .L1462+36
 	movw	r10, #65535
 	ldrh	r1, [r5, #2]
 	mov	ip, #20
 	ldr	r0, [fp]
 	ldrh	lr, [r3]
-	ldr	r3, [sp, #8]
-	ldr	r7, .L1426+44
+	ldr	r3, [sp, #24]
+	ldr	r7, .L1462+44
 	adds	r3, r1, r3
-	str	r3, [sp, #16]
+	str	r3, [sp, #20]
 	movs	r3, #0
-	str	r3, [sp, #4]
-	b	.L1388
-.L1381:
+	str	r3, [sp, #12]
+	b	.L1416
+.L1409:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, r10
-	beq	.L1380
-	ldr	r1, [sp, #4]
+	beq	.L1408
+	ldr	r1, [sp, #12]
 	mla	r8, ip, r1, r0
-	ldr	r1, [sp, #16]
+	ldr	r1, [sp, #20]
 	orr	r2, r1, r2, lsl #10
 	str	r2, [r8, #4]
-	ldr	r2, [sp, #4]
+	ldr	r2, [sp, #12]
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp, #4]
-.L1380:
+	str	r2, [sp, #12]
+.L1408:
 	adds	r3, r3, #1
-.L1388:
+.L1416:
 	uxth	r2, r3
 	cmp	lr, r2
-	bhi	.L1381
+	bhi	.L1409
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
+	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1422:
-	str	r3, [sp, #16]
-	ldr	r2, [sp, #4]
-	ldrh	r3, [sp, #16]
+.L1458:
+	str	r3, [sp, #20]
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1386
-	ldr	r3, [sp, #8]
+	bhi	.L1414
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	str	r3, [sp, #8]
-	b	.L1379
-.L1386:
-	ldr	r3, [sp, #16]
+	str	r3, [sp, #24]
+	b	.L1407
+.L1414:
+	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
 	ldr	r3, [fp]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1383
+	beq	.L1411
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1383
+	bne	.L1411
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L1384
-	mov	r2, #736
-	ldr	r1, .L1426+4
-	ldr	r0, .L1426+8
+	bne	.L1412
+	movw	r2, #753
+	ldr	r1, .L1462+4
+	ldr	r0, .L1462+8
 	bl	printf
-.L1384:
+.L1412:
 	movs	r2, #0
-	add	r1, sp, #36
+	add	r1, sp, #40
 	mov	r0, r10
 	bl	log2phys
 	ldr	r0, [fp]
-	ldr	r3, [sp, #36]
+	ldr	r3, [sp, #40]
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1383
-	ldr	r2, .L1426+20
-	ldr	r10, .L1426+56
-	ldr	r1, .L1426+48
+	bne	.L1411
+	ldr	r2, .L1462+20
+	ldr	r10, .L1462+60
+	ldr	r1, .L1462+48
 	ldrh	r3, [r2]
-	str	r1, [sp, #28]
+	str	r1, [sp, #36]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r1]
@@ -10606,10 +10578,10 @@ rk_ftl_garbage_collect:
 	mla	r3, r1, r3, r2
 	ldr	r2, [r0, #16]
 	str	r2, [r3, #16]
-	str	r3, [sp, #24]
+	str	r3, [sp, #32]
 	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #24]
-	ldr	r1, [sp, #28]
+	ldr	r3, [sp, #32]
+	ldr	r1, [sp, #36]
 	str	r0, [r3, #4]
 	ldr	r2, [r1]
 	movs	r1, #20
@@ -10617,18 +10589,18 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1426+16
+	ldr	r7, .L1462+16
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
 	ldr	r1, [r0, #12]
 	str	r1, [r2, #12]
 	movs	r1, #1
-	ldr	r2, [sp, #36]
+	ldr	r2, [sp, #40]
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L1426+52
+	ldr	r2, .L1462+52
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
@@ -10636,90 +10608,148 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1385
+	beq	.L1413
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1383
-.L1385:
+	cbnz	r3, .L1411
+.L1413:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1383
-	ldr	r3, .L1426+28
+	cbz	r0, .L1411
+	ldr	r3, .L1462+28
 	movs	r2, #0
+	movw	r1, #65535
 	str	r2, [r3]
-	b	.L1423
-.L1383:
-	ldr	r3, [sp, #16]
+	ldr	r3, .L1462+56
+	strh	r1, [r3]	@ movhi
+	strh	r2, [r3, #2]	@ movhi
+	b	.L1459
+.L1411:
+	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1422
-.L1387:
+	b	.L1458
+.L1415:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #16]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	ldr	r4, .L1426+28
-	bhi	.L1389
-	ldr	r3, .L1426+56
+	bhi	.L1417
+	ldr	r3, .L1462+60
 	ldr	r3, [r3]
-	cbz	r3, .L1390
+	cbz	r3, .L1418
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1390
-	movs	r3, #0
-	str	r3, [r4]
-	b	.L1423
-.L1390:
-	ldr	r3, .L1426+20
-	ldrh	r1, [r3]
-	cbnz	r1, .L1391
-	ldr	r3, .L1426+40
+	cbz	r0, .L1418
+	ldr	r3, .L1462+28
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L1459
+.L1463:
+	.align	2
+.L1462:
+	.word	.LANCHOR51
+	.word	.LANCHOR175
+	.word	.LC1
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR94
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR42
+	.word	.LANCHOR145+14
+	.word	.LANCHOR104
+	.word	.LANCHOR83
+	.word	.LANCHOR145
+	.word	.LANCHOR62
+	.word	.LANCHOR66
+.L1418:
+	ldr	r3, .L1464
+	ldrh	r4, [r3]
+	cmp	r4, #0
+	bne	.L1419
+	ldr	r8, .L1464+28
+	ldrh	r1, [r5]
+	ldr	r3, [r8]
+	ldrh	r3, [r3, r1, lsl #1]
+	cmp	r3, #0
+	beq	.L1419
+	ldr	r0, .L1464+4
+	ldr	r10, .L1464+32
+	ldrh	r2, [r5, #2]
+	ldrh	r0, [r0]
+	str	r3, [sp]
+	mov	r3, r4
+	str	r0, [sp, #4]
+	ldr	r0, .L1464+8
+	bl	printf
+.L1420:
+	ldr	r3, [r10]
+	cmp	r4, r3
+	bcs	.L1422
+	movs	r2, #0
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #44]
+	adds	r3, r7, #1
+	beq	.L1421
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5]
+	cmp	r3, r0
+	bne	.L1421
+	mov	r2, r7
+	mov	r1, r4
+	ldr	r0, .L1464+12
+	bl	printf
+.L1422:
+	ldr	r3, [r10]
+	cmp	r4, r3
+	bcc	.L1419
 	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1391
+	movs	r1, #0
+	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r5]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1391:
+.L1419:
 	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.L1389:
-	movs	r3, #0
-	str	r3, [r4]
-	ldr	r3, .L1426+60
+	strh	r3, [r5]	@ movhi
+.L1417:
+	ldr	r3, .L1464+16
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r3, .L1464+20
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L1392
-	ldr	r3, .L1426+32
+	bhi	.L1425
+	ldr	r3, .L1464+24
 	ldrh	r4, [r3]
-	b	.L1393
-.L1392:
+	b	.L1426
+.L1421:
+	adds	r4, r4, #1
+	b	.L1420
+.L1425:
 	adds	r0, r0, #1
-	b	.L1342
-.L1394:
-	movs	r0, #0
-	b	.L1342
+	b	.L1370
 .L1427:
+	movs	r0, #0
+	b	.L1370
+.L1465:
 	.align	2
-.L1426:
-	.word	.LANCHOR51
-	.word	.LANCHOR175
-	.word	.LC1
-	.word	.LANCHOR52
-	.word	.LANCHOR53
+.L1464:
 	.word	.LANCHOR173
 	.word	.LANCHOR174
+	.word	.LC42
+	.word	.LC43
 	.word	.LANCHOR94
+	.word	.LANCHOR48
 	.word	.LANCHOR19
-	.word	.LANCHOR3
 	.word	.LANCHOR42
-	.word	.LANCHOR144+14
-	.word	.LANCHOR104
-	.word	.LANCHOR83
-	.word	.LANCHOR62
-	.word	.LANCHOR48
-	.word	.LANCHOR66
+	.word	.LANCHOR152
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",%progbits
 	.align	1
@@ -10738,31 +10768,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1429
+	bne	.L1467
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1428:
+.L1466:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1429:
+.L1467:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1461
+	ldr	r3, .L1499
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1450
-	ldr	r3, .L1461+4
+	bhi	.L1488
+	ldr	r3, .L1499+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1451
-	ldr	r3, .L1461+8
+	beq	.L1489
+	ldr	r3, .L1499+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -10775,7 +10805,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1461+12
+	ldr	r2, .L1499+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -10788,54 +10818,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1461+16
+	ldr	r2, .L1499+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1431:
+.L1469:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1448
-	ldr	r3, .L1461+20
+	cbnz	r3, .L1486
+	ldr	r3, .L1499+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1449
-	ldr	r3, .L1461+24
+	cbnz	r3, .L1487
+	ldr	r3, .L1499+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1428
-.L1449:
+	bhi	.L1466
+.L1487:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1428
-.L1448:
+	b	.L1466
+.L1486:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1432
-	ldr	fp, .L1461+8
+	bne	.L1470
+	ldr	fp, .L1499+8
 	mov	r10, #0
-.L1433:
+.L1471:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1435
-.L1436:
+	bcc	.L1473
+.L1474:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1440
-	ldr	r3, .L1461+28
+	beq	.L1478
+	ldr	r3, .L1499+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1431
-.L1440:
+	bne	.L1469
+.L1478:
 	cmp	r5, #0
-	beq	.L1431
-	ldr	r3, .L1461+32
+	beq	.L1469
+	ldr	r3, .L1499+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -10849,29 +10879,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1447:
+.L1485:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1461+32
+	ldr	r3, .L1499+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1442
+	bne	.L1480
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1461+36
+	ldr	r2, .L1499+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1443
+	bne	.L1481
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1460:
+.L1498:
 	bl	ftl_memcpy
-.L1443:
-	ldr	r3, .L1461+32
+.L1481:
+	ldr	r3, .L1499+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -10880,49 +10910,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1461+40
+	ldrne	r0, .L1499+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1445
-	ldr	r1, .L1461+40
+	bne	.L1483
+	ldr	r1, .L1499+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1446:
+.L1484:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1447
+	bne	.L1485
 	movs	r5, #0
-	b	.L1431
-.L1435:
+	b	.L1469
+.L1473:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1434
+	bhi	.L1472
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1434
+	bls	.L1472
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1434:
+.L1472:
 	add	r10, r10, #1
-	b	.L1433
-.L1432:
-	ldr	r2, .L1461+32
+	b	.L1471
+.L1470:
+	ldr	r2, .L1499+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1461+8
-	bne	.L1437
-	ldr	r2, .L1461+36
+	ldr	r3, .L1499+8
+	bne	.L1475
+	ldr	r2, .L1499+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -10937,11 +10967,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1438
+	bne	.L1476
 	str	r8, [r10, #8]
-.L1438:
-	ldr	r3, .L1461+44
-	ldr	r2, .L1461+48
+.L1476:
+	ldr	r3, .L1499+44
+	ldr	r2, .L1499+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -10950,12 +10980,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1436
-.L1437:
+	b	.L1474
+.L1475:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1439
-	ldr	r2, .L1461+52
+	bne	.L1477
+	ldr	r2, .L1499+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -10963,49 +10993,49 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1438
-.L1459:
+	bne	.L1476
+.L1497:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1438
-.L1439:
+	b	.L1476
+.L1477:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1459
-.L1442:
+	b	.L1497
+.L1480:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1443
-	ldr	r3, .L1461+52
+	bne	.L1481
+	ldr	r3, .L1499+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1443
-	ldr	r2, .L1461+8
+	bne	.L1481
+	ldr	r2, .L1499+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1460
-.L1445:
+	b	.L1498
+.L1483:
 	cmp	r3, #256
-	bne	.L1446
+	bne	.L1484
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1446
-.L1450:
+	b	.L1484
+.L1488:
 	mov	r3, #-1
-.L1451:
+.L1489:
 	str	r3, [sp, #4]
-	b	.L1428
-.L1462:
+	b	.L1466
+.L1500:
 	.align	2
-.L1461:
+.L1499:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR12
@@ -11053,37 +11083,35 @@ FtlWrite:
 	cmp	r0, #16
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	str	r1, [sp, #4]
+	mov	fp, r1
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1465
+	bne	.L1503
 	mov	r2, r3
-	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
-	add	r0, r3, #256
+	add	r0, fp, #256
 	bl	FtlVendorPartWrite
-.L1464:
+.L1502:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1465:
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #20]
-	adds	r4, r3, r2
-	ldr	r3, .L1508
+.L1503:
+	ldr	r3, [sp, #20]
+	adds	r4, r1, r3
+	ldr	r3, .L1547
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1498
-	ldr	r3, .L1508+4
+	bhi	.L1536
+	ldr	r3, .L1547+4
 	ldr	r0, [r3]
-	adds	r5, r0, #1
-	beq	.L1464
-	ldr	r3, .L1508+8
+	adds	r1, r0, #1
+	beq	.L1502
+	ldr	r3, .L1547+8
 	mov	r2, #2048
-	ldr	r0, [sp, #4]
-	ldr	r7, .L1508+12
+	mov	r0, fp
+	ldr	r7, .L1547+12
 	str	r2, [r3]
-	ldr	r3, .L1508+16
+	ldr	r3, .L1547+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -11095,7 +11123,7 @@ FtlWrite:
 	ldr	r1, [sp, #20]
 	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1508+20
+	ldr	r2, .L1547+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -11104,39 +11132,39 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1508+24
+	ldr	r2, .L1547+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1467:
+.L1505:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1493
-	ldr	r5, .L1508+28
+	cbnz	r3, .L1531
+	ldr	r5, .L1547+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1494
-.L1496:
+	bls	.L1532
+.L1534:
 	movs	r0, #0
-	b	.L1464
-.L1493:
-	ldr	r4, .L1508+32
+	b	.L1502
+.L1531:
+	ldr	r4, .L1547+32
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1468
-	mov	r2, #1016
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	bcc	.L1506
+	movw	r2, #1038
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1468:
+.L1506:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1469
+	cbnz	r3, .L1507
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1469:
+.L1507:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -11151,87 +11179,92 @@ FtlWrite:
 	str	r3, [sp, #44]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1470
-	movw	r2, #1049
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	bcc	.L1508
+	movw	r2, #1071
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1470:
-	ldr	r8, .L1508+44
-	mov	fp, #0
-.L1471:
-	ldr	r3, [sp, #44]
-	cmp	fp, r3
-	bne	.L1491
-.L1472:
-	ldr	r0, .L1508+44
+.L1508:
+	ldr	r8, .L1547+44
+	movs	r3, #0
+	str	r3, [sp, #4]
+.L1509:
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #44]
+	cmp	r3, r2
+	bne	.L1529
+.L1510:
+	ldr	r0, .L1547+44
 	mov	r3, r7
 	movs	r2, #0
-	mov	r1, fp
+	ldr	r1, [sp, #4]
 	ldr	r0, [r0]
 	bl	FtlProgPages
-	ldr	r3, [sp, #8]
-	cmp	fp, r3
-	bls	.L1492
-	movw	r2, #1126
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
+	bls	.L1530
+	movw	r2, #1149
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1492:
+.L1530:
 	ldr	r3, [sp, #8]
-	sub	r3, r3, fp
+	ldr	r2, [sp, #4]
+	subs	r3, r3, r2
 	str	r3, [sp, #8]
-	b	.L1467
-.L1491:
-	ldrh	r2, [r7, #4]
-	cmp	r2, #0
-	beq	.L1472
+	b	.L1505
+.L1529:
+	ldrh	r3, [r7, #4]
+	cmp	r3, #0
+	beq	.L1510
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r5
 	movs	r6, #20
 	bl	log2phys
 	mov	r0, r7
-	mul	r6, r6, fp
 	bl	get_new_active_ppa
-	ldr	r2, .L1508+48
-	ldr	r1, [r8]
+	ldr	r2, .L1547+48
+	ldr	r1, [sp, #4]
+	ldr	r3, [sp, #4]
 	ldrh	r2, [r2]
-	add	r1, r1, r6
-	str	r0, [r1, #4]
-	str	r5, [r1, #16]
-	mul	r0, r2, fp
-	bic	r3, r0, #3
-	ldr	r0, .L1508+52
-	str	r3, [sp, #36]
-	ldr	r3, [r0]
+	muls	r6, r3, r6
+	ldr	r3, [r8]
+	muls	r1, r2, r1
+	add	r3, r3, r6
+	str	r0, [r3, #4]
+	bic	r1, r1, #3
+	str	r5, [r3, #16]
+	str	r1, [sp, #36]
+	ldr	r1, .L1547+52
 	ldr	r0, [sp, #36]
-	str	r3, [sp, #40]
-	add	r10, r3, r0
-	str	r10, [r1, #12]
-	mov	r0, r10
+	ldr	r1, [r1]
+	add	r10, r1, r0
+	str	r1, [sp, #40]
+	str	r10, [r3, #12]
 	movs	r1, #0
+	mov	r0, r10
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1508+16
+	ldr	r2, .L1547+16
 	cmp	r5, r3
-	beq	.L1473
+	beq	.L1511
 	ldr	r3, [sp, #28]
 	cmp	r5, r3
-	bne	.L1504
+	bne	.L1542
 	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [sp, #20]
+	ldr	r3, [sp, #20]
 	smulbb	r2, r2, r5
-	adds	r4, r3, r1
+	add	r4, fp, r3
 	movs	r3, #0
-	subs	r4, r4, r2
 	str	r3, [sp, #24]
+	subs	r4, r4, r2
 	uxth	r4, r4
-	b	.L1476
-.L1473:
+	b	.L1514
+.L1511:
 	ldrh	r4, [r2]
-	ldr	r0, [sp, #4]
+	mov	r0, fp
 	mov	r1, r4
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #20]
@@ -11240,144 +11273,140 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1476:
-	ldr	r2, .L1508+16
+.L1514:
+	ldr	r3, .L1547+16
+	ldrh	r3, [r3]
+	cmp	r4, r3
 	ldr	r3, [sp, #12]
-	ldrh	r2, [r2]
-	cmp	r4, r2
-	ldr	r2, [r8]
-	bne	.L1477
+	bne	.L1515
 	cmp	r5, r3
-	add	r6, r6, r2
-	ittet	ne
-	mulne	r4, r4, r5
-	ldrne	r3, [sp, #4]
-	ldreq	r3, [sp, #16]
-	subne	r4, r4, r3
-	itett	ne
-	ldrne	r3, [sp, #16]
-	streq	r3, [r6, #8]
-	addne	r4, r3, r4, lsl #9
-	strne	r4, [r6, #8]
-.L1479:
-	ldr	r2, .L1508+32
-	ldrb	r1, [r7, #6]	@ zero_extendqisi2
-	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcc	.L1488
-	movw	r2, #1117
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+	ldr	r3, [r8]
+	add	r6, r6, r3
+	bne	.L1516
+	ldr	r3, [sp, #16]
+.L1544:
+	str	r3, [r6, #8]
+	b	.L1517
+.L1516:
+	muls	r4, r5, r4
+	ldr	r3, [sp, #16]
+	sub	r4, r4, fp
+	add	r4, r3, r4, lsl #9
+	str	r4, [r6, #8]
+.L1517:
+	ldr	r3, .L1547+32
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1526
+	movw	r2, #1140
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-.L1488:
-	ldr	r3, [sp, #40]
-	movw	r2, #61589
+.L1526:
+	ldr	r2, [sp, #40]
+	movw	r3, #61589
 	ldr	r1, [sp, #36]
-	add	fp, fp, #1
-	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1508+56
+	strh	r3, [r2, r1]	@ movhi
+	ldr	r2, .L1547+56
 	str	r5, [r10, #8]
 	adds	r5, r5, #1
-	ldr	r2, [r1]
-	str	r2, [r10, #4]
-	adds	r2, r2, #1
-	adds	r3, r2, #1
+	ldr	r3, [r2]
+	str	r3, [r10, #4]
+	adds	r3, r3, #1
+	adds	r1, r3, #1
 	it	eq
-	moveq	r2, #0
-	str	r2, [r1]
-	ldr	r2, [sp, #48]
-	str	r2, [r10, #12]
-	ldrh	r2, [r7]
-	strh	r2, [r10, #2]	@ movhi
-	b	.L1471
-.L1477:
+	moveq	r3, #0
+	str	r3, [r2]
+	ldr	r3, [sp, #48]
+	str	r3, [r10, #12]
+	ldrh	r3, [r7]
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	str	r3, [sp, #4]
+	b	.L1509
+.L1515:
 	cmp	r5, r3
-	add	r2, r2, r6
+	ldr	r3, [r8]
 	ite	eq
-	ldreq	r1, .L1508+60
-	ldrne	r1, .L1508+64
-	ldr	r1, [r1]
-	str	r1, [r2, #8]
-	ldr	r2, [sp, #48]
-	adds	r1, r2, #1
-	beq	.L1482
-	str	r2, [sp, #56]
+	ldreq	r2, .L1547+60
+	ldrne	r2, .L1547+64
+	add	r3, r3, r6
+	ldr	r2, [r2]
+	str	r2, [r3, #8]
+	ldr	r3, [sp, #48]
+	adds	r2, r3, #1
+	beq	.L1520
+	str	r3, [sp, #56]
+	movs	r1, #1
+	ldr	r3, [r8]
 	add	r0, sp, #52
-	ldr	r2, [r8]
 	str	r5, [sp, #68]
-	add	r2, r2, r6
-	ldr	r1, [r2, #8]
-	ldr	r2, [r2, #12]
-	str	r1, [sp, #60]
-	movs	r1, #1
-	str	r2, [sp, #64]
+	add	r3, r3, r6
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #60]
 	movs	r2, #0
+	str	r3, [sp, #64]
 	bl	FlashReadPages
-	ldr	r2, [sp, #52]
-	adds	r2, r2, #1
-	bne	.L1483
-	ldr	r1, .L1508+68
+	ldr	r3, [sp, #52]
+	adds	r0, r3, #1
+	bne	.L1521
+	ldr	r1, .L1547+68
+	ldr	r0, .L1547+72
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1486:
+	mov	r2, r5
+	ldr	r1, [r10, #8]
+	bl	printf
+.L1524:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r5, r3
-	bne	.L1487
-	ldr	r1, [r8]
-	ldr	r3, [sp, #24]
-	add	r6, r6, r1
+	bne	.L1525
+	ldr	r3, [r8]
 	ldr	r1, [sp, #16]
+	add	r6, r6, r3
+	ldr	r3, [sp, #24]
 	ldr	r0, [r6, #8]
 	add	r0, r0, r3, lsl #9
-.L1506:
+.L1545:
 	bl	ftl_memcpy
-	b	.L1479
-.L1483:
+	b	.L1517
+.L1521:
 	ldr	r1, [r10, #8]
 	cmp	r5, r1
-	beq	.L1485
-	ldr	r0, .L1508+68
-	ldr	r2, [r0, #72]
-	adds	r2, r2, #1
-	str	r2, [r0, #72]
+	beq	.L1523
+	ldr	r2, .L1547+68
+	ldr	r0, .L1547+76
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
 	mov	r2, r5
-	ldr	r0, .L1508+72
 	bl	printf
-.L1485:
-	ldr	r2, [r10, #8]
-	cmp	r5, r2
-	beq	.L1486
-	movw	r2, #1102
-	ldr	r1, .L1508+36
-	ldr	r0, .L1508+40
+.L1523:
+	ldr	r3, [r10, #8]
+	cmp	r5, r3
+	beq	.L1524
+	movw	r2, #1125
+	ldr	r1, .L1547+36
+	ldr	r0, .L1547+40
 	bl	printf
-	b	.L1486
-.L1482:
-	ldr	r2, [r8]
+	b	.L1524
+.L1520:
+	ldr	r3, [r8]
 	movs	r1, #0
-	adds	r0, r2, r6
-	ldr	r2, .L1508+76
-	ldr	r0, [r0, #8]
+	ldr	r2, .L1547+80
+	add	r3, r3, r6
 	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L1486
-.L1487:
-	ldr	r1, .L1508+16
-	ldr	r3, [sp, #4]
-	ldr	r0, [r8]
-	ldrh	r1, [r1]
-	add	r6, r6, r0
-	ldr	r0, [r6, #8]
-	muls	r1, r5, r1
-	subs	r1, r1, r3
-	ldr	r3, [sp, #16]
-	add	r1, r3, r1, lsl #9
-	b	.L1506
-.L1509:
+	b	.L1524
+.L1548:
 	.align	2
-.L1508:
+.L1547:
 	.word	.LANCHOR34
 	.word	.LANCHOR166
 	.word	.LANCHOR176
@@ -11396,42 +11425,52 @@ FtlWrite:
 	.word	.LANCHOR109
 	.word	.LANCHOR110
 	.word	.LANCHOR135
-	.word	.LC37
+	.word	.LC44
+	.word	.LC45
 	.word	.LANCHOR23
-.L1504:
-	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [r8]
-	muls	r2, r5, r2
-	add	r6, r6, r1
-	subs	r2, r2, r3
+.L1525:
+	ldr	r3, .L1549
+	ldrh	r1, [r3]
+	ldr	r3, [r8]
+	muls	r1, r5, r1
+	add	r6, r6, r3
 	ldr	r3, [sp, #16]
-	add	r2, r3, r2, lsl #9
-	str	r2, [r6, #8]
-	b	.L1479
-.L1494:
-	ldr	r6, .L1510
+	ldr	r0, [r6, #8]
+	sub	r1, r1, fp
+	add	r1, r3, r1, lsl #9
+	b	.L1545
+.L1542:
+	ldr	r3, [r8]
+	add	r6, r6, r3
+	ldrh	r3, [r2]
+	ldr	r2, [sp, #16]
+	muls	r3, r5, r3
+	sub	r3, r3, fp
+	add	r3, r2, r3, lsl #9
+	b	.L1544
+.L1532:
+	ldr	r6, .L1549+4
 	mov	r4, #256
-	ldr	r7, .L1510+4
-.L1497:
+	ldr	r7, .L1549+8
+.L1535:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1495
+	bne	.L1533
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1495
+	bne	.L1533
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1495:
-	ldr	r2, .L1510+8
+.L1533:
+	ldr	r2, .L1549+12
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1510+12
+	ldr	r2, .L1549+16
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -11439,17 +11478,18 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1496
+	bhi	.L1534
 	subs	r4, r4, #1
-	bne	.L1497
-	b	.L1496
-.L1498:
+	bne	.L1535
+	b	.L1534
+.L1536:
 	mov	r0, #-1
-	b	.L1464
-.L1511:
+	b	.L1502
+.L1550:
 	.align	2
-.L1510:
-	.word	.LANCHOR144
+.L1549:
+	.word	.LANCHOR12
+	.word	.LANCHOR145
 	.word	.LANCHOR72
 	.word	.LANCHOR101
 	.word	.LANCHOR100
@@ -11483,16 +11523,16 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1540+144
+	ldr	r8, .L1582+144
 	sub	sp, sp, #24
-	ldr	r7, .L1540
+	ldr	r7, .L1582
 	ldr	r3, [r8]
-	ldr	r4, .L1540+4
-	ldr	fp, .L1540+148
+	ldr	r4, .L1582+4
+	ldr	fp, .L1582+148
 	ldrh	r2, [r7]
-	ldr	r5, .L1540+8
+	ldr	r5, .L1582+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1540+12
+	ldr	r6, .L1582+12
 	ldr	r3, [fp]
 	lsls	r2, r2, #1
 	ldr	r0, [r5]
@@ -11502,33 +11542,33 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r5, [sp, #16]
 	cmp	r0, r3
-	bne	.L1514
-.L1525:
+	bne	.L1553
+.L1564:
 	mov	r0, #-1
-.L1513:
+.L1552:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1514:
+.L1553:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	ldrsh	r10, [r6]
 	sxth	r5, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1516:
+.L1555:
 	cmp	r5, #0
-	bge	.L1522
+	bge	.L1561
 	movw	r2, #1465
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+20
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+20
 	bl	printf
-	b	.L1521
-.L1522:
+	b	.L1560
+.L1561:
 	orr	r3, r5, r10, lsl #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1540+4
+	ldr	r0, .L1582+4
 	str	r3, [r4, #4]
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
@@ -11536,64 +11576,67 @@ FtlLoadSysInfo:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3, #12]
 	str	r3, [sp, #20]
-	cbz	r3, .L1517
-	ldr	r2, .L1540+24
+	cbz	r3, .L1556
+	ldr	r2, [r4]
+	adds	r2, r2, #1
+	beq	.L1556
+	ldr	r2, .L1582+24
 	ldr	r0, [r4, #8]
 	ldrh	r1, [r2]
 	bl	js_hash
 	ldr	r3, [sp, #20]
 	cmp	r3, r0
-	beq	.L1517
+	beq	.L1556
 	str	r0, [sp, #8]
 	mov	r2, r10
 	str	r3, [sp, #4]
 	ldrh	r3, [r6, #4]
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+28
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+28
 	str	r3, [sp]
 	mov	r3, r5
 	bl	printf
-	cbnz	r5, .L1518
+	cbnz	r5, .L1557
 	ldrh	r3, [r6, #4]
 	cmp	r10, r3
-	beq	.L1518
+	beq	.L1557
 	sxth	r10, r3
-	ldr	r3, .L1540+32
+	ldr	r3, .L1582+32
 	ldrh	r5, [r3]
-.L1520:
+.L1559:
 	subs	r5, r5, #1
 	sxth	r5, r5
-	b	.L1516
-.L1518:
+	b	.L1555
+.L1557:
 	mov	r3, #-1
 	str	r3, [r4]
-.L1517:
+.L1556:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1520
+	beq	.L1559
 	ldr	r3, [r8]
-	ldr	r2, .L1540+36
+	ldr	r2, .L1582+36
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1520
+	bne	.L1559
 	ldr	r3, [fp]
 	ldrh	r2, [r3]
 	movw	r3, #61604
 	cmp	r2, r3
-	bne	.L1520
-.L1521:
-	ldr	r2, .L1540+24
+	bne	.L1559
+.L1560:
+	ldr	r2, .L1582+24
 	ldrh	r3, [r7]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1524
+	bcs	.L1563
 	movw	r2, #1467
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+20
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+20
 	bl	printf
-.L1524:
-	ldr	r5, .L1540+40
+.L1563:
+	ldr	r5, .L1582+40
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r5
@@ -11614,60 +11657,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1540+44
+	ldr	r3, .L1582+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r5]
-	ldr	r3, .L1540+36
+	ldr	r3, .L1582+36
 	cmp	r2, r3
-	bne	.L1525
-	ldr	r3, .L1540+48
+	bne	.L1564
+	ldr	r3, .L1582+48
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r5, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1525
-	ldr	r3, .L1540+52
-	ldr	r2, .L1540+56
+	bne	.L1564
+	ldr	r3, .L1582+52
+	ldr	r2, .L1582+56
 	str	r5, [r3]
-	ldr	r3, .L1540+60
+	ldr	r3, .L1582+60
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1540+64
+	ldr	r2, .L1582+64
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1540+68
+	ldr	r2, .L1582+68
 	str	r3, [r2]
-	ldr	r3, .L1540+72
+	ldr	r3, .L1582+72
 	ldr	r6, [r3]
-	ldr	r3, .L1540+76
+	ldr	r3, .L1582+76
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1540+80
+	ldr	r3, .L1582+80
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1540+84
+	ldr	r3, .L1582+84
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1526
+	bls	.L1565
 	movw	r2, #1489
-	ldr	r1, .L1540+16
-	ldr	r0, .L1540+20
+	ldr	r1, .L1582+16
+	ldr	r0, .L1582+20
 	bl	printf
-.L1526:
+.L1565:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1540+88
+	ldr	r3, .L1582+88
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1540+92
+	ldr	r7, .L1582+92
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1540+96
+	ldr	r1, .L1582+96
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -11686,7 +11729,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1540+100
+	ldr	r2, .L1582+100
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -11696,31 +11739,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1540+104
+	ldr	r5, .L1582+104
 	str	r3, [r5]
-	ldr	r5, .L1540+108
+	ldr	r5, .L1582+108
 	str	r3, [r5]
-	ldr	r5, .L1540+112
+	ldr	r5, .L1582+112
 	str	r3, [r5]
-	ldr	r5, .L1540+116
+	ldr	r5, .L1582+116
 	str	r3, [r5]
-	ldr	r5, .L1540+120
+	ldr	r5, .L1582+120
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1540+124
+	ldr	r5, .L1582+124
 	str	r3, [r5]
-	ldr	r5, .L1540+128
+	ldr	r5, .L1582+128
 	str	r3, [r5]
-	ldr	r5, .L1540+132
+	ldr	r5, .L1582+132
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1540+136
+	ldr	r3, .L1582+136
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1540+140
+	ldr	r3, .L1582+140
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -11728,36 +11771,36 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1529
-	ldr	r0, .L1540+88
+	beq	.L1568
+	ldr	r0, .L1582+88
 	bl	make_superblock
-.L1529:
+.L1568:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1530
-	ldr	r0, .L1540+96
+	beq	.L1569
+	ldr	r0, .L1582+96
 	bl	make_superblock
-.L1530:
+.L1569:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1531
-	ldr	r0, .L1540+100
+	beq	.L1570
+	ldr	r0, .L1582+100
 	bl	make_superblock
-.L1531:
+.L1570:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1532
-	ldr	r0, .L1540+92
+	beq	.L1571
+	ldr	r0, .L1582+92
 	bl	make_superblock
-.L1532:
+.L1571:
 	movs	r0, #0
-	b	.L1513
-.L1541:
+	b	.L1552
+.L1583:
 	.align	2
-.L1540:
+.L1582:
 	.word	.LANCHOR5
 	.word	.LANCHOR138
 	.word	.LANCHOR42
@@ -11765,7 +11808,7 @@ FtlLoadSysInfo:
 	.word	.LANCHOR178
 	.word	.LC1
 	.word	.LANCHOR23
-	.word	.LC38
+	.word	.LC46
 	.word	.LANCHOR20
 	.word	1179929683
 	.word	.LANCHOR39
@@ -11781,7 +11824,7 @@ FtlLoadSysInfo:
 	.word	.LANCHOR3
 	.word	.LANCHOR171
 	.word	.LANCHOR51
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR52
 	.word	.LANCHOR53
 	.word	.LANCHOR84
@@ -11817,7 +11860,7 @@ FtlMapTblRecovery:
 	movs	r7, #0
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
-	ldr	r6, .L1577
+	ldr	r6, .L1625
 	str	r3, [sp, #24]
 	ldrh	r3, [r0, #6]
 	str	r3, [sp, #12]
@@ -11827,13 +11870,13 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #12]
 	lsls	r2, r3, #2
 	bl	ftl_memset
-	ldr	r3, .L1577+4
+	ldr	r3, .L1625+4
 	str	r7, [r4, #32]
 	str	r7, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #20]
 	str	r2, [r6, #8]
-	ldr	r2, .L1577+8
+	ldr	r2, .L1625+8
 	ldr	fp, [r2]
 	movw	r2, #65535
 	str	fp, [r6, #12]
@@ -11841,20 +11884,20 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L1543:
+.L1585:
 	ldr	r3, [sp, #16]
 	sxth	r5, r7
 	cmp	r5, r3
-	bge	.L1562
+	bge	.L1604
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r5, r3
-	bne	.L1544
+	bne	.L1586
 	movs	r1, #1
 	ldrh	r0, [r8, r5, lsl #1]
 	bl	FtlGetLastWrittenPage
 	sxth	r3, r0
-	ldr	r6, .L1577
+	ldr	r6, .L1625
 	add	r10, r8, r5, lsl #1
 	strh	r7, [r4]	@ movhi
 	str	r3, [sp, #16]
@@ -11864,22 +11907,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r4, #28]
-.L1545:
+.L1587:
 	ldr	r3, [sp, #16]
 	sxth	r8, r7
 	cmp	r8, r3
-	ble	.L1548
-.L1562:
+	ble	.L1590
+.L1604:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1577+12
+	ldr	r3, .L1625+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1550
+	bne	.L1592
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1550:
+.L1592:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -11888,9 +11931,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1548:
+.L1590:
 	ldrh	r2, [r10]
-	ldr	r0, .L1577
+	ldr	r0, .L1625
 	orr	r2, r8, r2, lsl #10
 	str	r2, [r6, #4]
 	movs	r2, #1
@@ -11899,31 +11942,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #20]
-	cbz	r2, .L1546
-	ldr	r3, .L1577+16
+	cbz	r2, .L1588
+	ldr	r1, [r6]
+	adds	r1, r1, #1
+	beq	.L1588
+	ldr	r3, .L1625+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r3]
 	bl	js_hash
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	beq	.L1546
+	beq	.L1588
 	str	r0, [sp, #4]
 	mov	r3, r8
 	str	r2, [sp]
 	mov	r2, r5
-	ldr	r1, .L1577+20
-	ldr	r0, .L1577+24
+	ldr	r1, .L1625+20
+	ldr	r0, .L1625+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1546:
+.L1588:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1547
+	beq	.L1589
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1547
+	bls	.L1589
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -11931,15 +11977,15 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1547:
+.L1589:
 	adds	r7, r7, #1
-	b	.L1545
-.L1544:
+	b	.L1587
+.L1586:
 	ldr	r3, [sp, #20]
-	ldr	r10, .L1577+12
+	ldr	r10, .L1625+12
 	ldrh	r2, [r8, r5, lsl #1]
 	ldr	r3, [r3]
-	ldr	r0, .L1577
+	ldr	r0, .L1625
 	str	r3, [r6, #8]
 	add	r3, r8, r5, lsl #1
 	str	r3, [sp, #28]
@@ -11952,25 +11998,25 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1564
+	beq	.L1606
 	ldrh	r2, [fp]
 	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L1564
+	bne	.L1606
 	ldrh	r2, [fp, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L1552
-.L1564:
+	beq	.L1594
+.L1606:
 	mov	r10, #0
-.L1553:
-	ldr	r2, .L1577+12
+.L1595:
+	ldr	r2, .L1625+12
 	sxth	r3, r10
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1560
+	bge	.L1602
 	ldr	r2, [sp, #28]
-	ldr	r0, .L1577
+	ldr	r0, .L1625
 	str	r3, [sp, #36]
 	ldrh	r2, [r2]
 	orr	r2, r3, r2, lsl #10
@@ -11981,31 +12027,34 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #12]
 	ldr	r2, [r2, #12]
 	str	r2, [sp, #32]
-	cbz	r2, .L1557
-	ldr	r1, .L1577+16
+	cbz	r2, .L1599
+	ldr	r1, [r6]
+	adds	r1, r1, #1
+	beq	.L1599
+	ldr	r1, .L1625+16
 	ldr	r0, [r6, #8]
 	ldrh	r1, [r1]
 	bl	js_hash
 	ldr	r2, [sp, #32]
 	cmp	r2, r0
-	beq	.L1557
+	beq	.L1599
 	str	r0, [sp, #4]
 	str	r2, [sp]
 	mov	r2, r5
 	ldr	r3, [sp, #36]
-	ldr	r1, .L1577+20
-	ldr	r0, .L1577+28
+	ldr	r1, .L1625+20
+	ldr	r0, .L1625+28
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r6]
-.L1557:
+.L1599:
 	ldr	r3, [r6]
 	adds	r3, r3, #1
-	beq	.L1558
+	beq	.L1600
 	ldrh	r3, [fp, #8]
 	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bls	.L1558
+	bls	.L1600
 	ldrh	r1, [fp]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
@@ -12013,47 +12062,47 @@ FtlMapTblRecovery:
 	ldreq	r2, [r6, #4]
 	ldreq	r1, [sp, #8]
 	streq	r2, [r1, r3, lsl #2]
-.L1558:
+.L1600:
 	add	r10, r10, #1
-	b	.L1553
-.L1552:
+	b	.L1595
+.L1594:
 	ldr	r3, [sp, #20]
 	movs	r1, #0
 	ldrh	r2, [r10]
 	ldr	r0, [r3]
 	add	lr, r2, #-1
-.L1554:
+.L1596:
 	sxth	r3, r1
 	cmp	r3, lr
-	blt	.L1556
-.L1560:
+	blt	.L1598
+.L1602:
 	adds	r7, r7, #1
-	b	.L1543
-.L1556:
+	b	.L1585
+.L1598:
 	lsls	r5, r3, #3
 	ldr	r3, [r0, r3, lsl #3]
 	ldr	r2, [sp, #12]
 	uxth	ip, r3
 	cmp	r2, ip
-	bls	.L1555
+	bls	.L1597
 	add	r5, r5, r0
 	ldr	r2, [sp, #8]
 	ldr	r5, [r5, #4]
 	str	r5, [r2, ip, lsl #2]
-.L1555:
+.L1597:
 	adds	r1, r1, #1
-	b	.L1554
-.L1578:
+	b	.L1596
+.L1626:
 	.align	2
-.L1577:
+.L1625:
 	.word	.LANCHOR138
 	.word	.LANCHOR106
 	.word	.LANCHOR114
 	.word	.LANCHOR20
 	.word	.LANCHOR23
 	.word	.LANCHOR180
-	.word	.LC39
-	.word	.LC40
+	.word	.LC47
+	.word	.LC48
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -12067,36 +12116,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1580
-	ldr	r0, .L1580+4
+	ldr	r3, .L1628
+	ldr	r0, .L1628+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1580+8
+	ldr	r3, .L1628+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1580+12
+	ldr	r3, .L1628+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1580+16
+	ldr	r3, .L1628+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L1580+20
+	ldr	r3, .L1628+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L1580+24
+	ldr	r3, .L1628+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L1580+28
+	ldr	r3, .L1628+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1581:
+.L1629:
 	.align	2
-.L1580:
+.L1628:
 	.word	.LANCHOR27
 	.word	.LANCHOR161
 	.word	.LANCHOR35
@@ -12119,13 +12168,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1583
+	ldr	r0, .L1631
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1584:
+.L1632:
 	.align	2
-.L1583:
+.L1631:
 	.word	.LANCHOR129
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
@@ -12141,27 +12190,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1598
+	ldr	r4, .L1646
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L1598+4
+	ldr	r3, .L1646+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1598+8
+	ldr	r3, .L1646+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1586
-.L1588:
+	bne	.L1634
+.L1636:
 	mov	r6, #-1
-.L1585:
+.L1633:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1586:
+.L1634:
 	bl	FtlLoadSysInfo
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L1588
+	bne	.L1636
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -12171,40 +12220,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1598+12
+	ldr	r3, .L1646+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1598+16
+	ldr	r3, .L1646+16
 	ldr	r2, [r3]
 	mov	r3, r6
-.L1589:
+.L1637:
 	cmp	r3, r1
-	bge	.L1594
+	bge	.L1642
 	mla	r5, r0, r3, r2
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	bge	.L1590
-.L1594:
-	ldr	r0, .L1598+20
+	bge	.L1638
+.L1642:
+	ldr	r0, .L1646+20
 	cmp	r3, r1
 	ldr	r2, [r0]
 	add	r2, r2, #32
 	str	r2, [r0]
-	bge	.L1596
-.L1591:
-	ldr	r5, .L1598+24
-	ldr	r4, .L1598+28
+	bge	.L1644
+.L1639:
+	ldr	r5, .L1646+24
+	ldr	r4, .L1646+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1598+32
+	ldr	r3, .L1646+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1598+36
+	ldr	r0, .L1646+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	r7, [r4, #4]
 	ldrh	r3, [r0]
@@ -12220,27 +12269,27 @@ FtlSysBlkInit:
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
 	strh	r2, [r4, #2]	@ movhi
-	ldr	r2, .L1598+40
+	ldr	r2, .L1646+40
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1597:
+.L1645:
 	bl	FtlVpcTblFlush
-	b	.L1585
-.L1590:
+	b	.L1633
+.L1638:
 	adds	r3, r3, #1
-	b	.L1589
-.L1596:
+	b	.L1637
+.L1644:
 	ldrh	r3, [r4]
 	cmp	r3, #0
-	bne	.L1591
+	bne	.L1639
 	bl	l2p_flush
-	b	.L1597
-.L1599:
+	b	.L1645
+.L1647:
 	.align	2
-.L1598:
+.L1646:
 	.word	.LANCHOR156
 	.word	.LANCHOR4
 	.word	.LANCHOR139
@@ -12266,62 +12315,64 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1624
-	ldr	r2, .L1624+4
-	ldr	r5, .L1624+8
-	ldrh	r0, [r6]
+	ldr	r2, .L1672
+	ldr	r6, .L1672+4
 	str	r3, [r2]
+	ldr	r5, .L1672+8
+	ldr	r2, .L1672+12
+	ldrh	r0, [r6]
 	str	r3, [r5]
+	str	r3, [r2]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1601
+	cbz	r0, .L1649
 	bl	FtlMakeBbt
-.L1601:
-	ldr	r3, .L1624+12
-	ldr	r2, .L1624+16
-	ldr	ip, .L1624+100
+.L1649:
+	ldr	r3, .L1672+16
+	ldr	r2, .L1672+20
+	ldr	ip, .L1672+104
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1624+20
+	ldr	r2, .L1672+24
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1602:
+.L1650:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1603
-	ldr	r3, .L1624+24
+	blt	.L1651
+	ldr	r3, .L1672+28
 	movs	r7, #0
-	ldr	r10, .L1624+104
+	ldr	r10, .L1672+108
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1604:
+.L1652:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1605
-	ldr	r4, .L1624+28
+	bhi	.L1653
+	ldr	r4, .L1672+32
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1606
-.L1610:
+	bgt	.L1654
+.L1658:
 	movs	r6, #0
 	mov	r7, r6
-.L1607:
+.L1655:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1611
+	bhi	.L1659
 	ldrh	r2, [fp]
-	ldr	r3, .L1624+32
+	ldr	r3, .L1672+36
 	ldrh	r4, [r4]
-	ldr	r6, .L1624+36
+	ldr	r6, .L1672+40
 	str	r2, [r3]
-	ldr	r3, .L1624+40
+	ldr	r3, .L1672+44
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -12331,13 +12382,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1624+44
+	ldr	r0, .L1672+48
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1612
+	ble	.L1660
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -12349,11 +12400,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1612:
-	ldr	r2, .L1624+48
+.L1660:
+	ldr	r2, .L1672+52
 	ldrh	r2, [r2]
-	cbz	r2, .L1614
-	ldr	r1, .L1624+44
+	cbz	r2, .L1662
+	ldr	r1, .L1672+48
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -12364,24 +12415,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1614:
+.L1662:
 	ldr	r3, [sp]
-	ldr	r7, .L1624+52
-	ldr	r10, .L1624+108
+	ldr	r7, .L1672+56
+	ldr	r10, .L1672+112
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1624+56
+	ldr	r3, .L1672+60
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1624+60
+	ldr	r6, .L1672+64
 	muls	r4, r3, r4
-	ldr	r3, .L1624+64
+	ldr	r3, .L1672+68
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -12390,13 +12441,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1624+68
+	ldr	r2, .L1672+72
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1624+72
+	ldr	r2, .L1672+76
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -12407,30 +12458,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1624+76
+	ldr	r3, .L1672+80
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1616:
+.L1664:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1617
+	bne	.L1665
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1616
-.L1603:
+	b	.L1664
+.L1651:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1602
-.L1605:
+	b	.L1650
+.L1653:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -12438,11 +12489,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1604
-.L1606:
+	b	.L1652
+.L1654:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1624+80
+	ldr	r3, .L1672+84
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -12450,26 +12501,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1608:
+.L1656:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1610
+	bls	.L1658
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1608
-.L1611:
+	b	.L1656
+.L1659:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1607
-.L1617:
+	b	.L1655
+.L1665:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1624+84
+	ldr	r4, .L1672+88
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -12485,19 +12536,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1618:
+.L1666:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1619
+	cbnz	r3, .L1667
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1618
-.L1619:
+	b	.L1666
+.L1667:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -12506,10 +12557,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1624+88
+	ldr	r3, .L1672+92
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1624+92
+	ldr	r3, .L1672+96
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -12522,21 +12573,22 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1620
-	ldr	r3, .L1624+96
+	cbnz	r0, .L1668
+	ldr	r3, .L1672+100
 	movs	r2, #1
 	str	r2, [r3]
-.L1620:
+.L1668:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1625:
+.L1673:
 	.align	2
-.L1624:
-	.word	.LANCHOR4
+.L1672:
 	.word	.LANCHOR83
+	.word	.LANCHOR4
 	.word	.LANCHOR82
+	.word	.LANCHOR143
 	.word	.LANCHOR12
 	.word	.LANCHOR109
 	.word	.LANCHOR110
@@ -12552,7 +12604,7 @@ ftl_low_format:
 	.word	.LANCHOR51
 	.word	.LANCHOR34
 	.word	.LANCHOR59
-	.word	.LANCHOR144
+	.word	.LANCHOR145
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR52
@@ -12576,60 +12628,46 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r3, #-1
-	ldr	r4, .L1643
+	ldr	r4, .L1686
 	movs	r6, #0
-	ldr	r1, .L1643+4
-	ldr	r0, .L1643+8
+	ldr	r1, .L1686+4
+	ldr	r0, .L1686+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1643+12
+	ldr	r0, .L1686+12
 	bl	FtlConstantsInit
-	ldr	r5, .L1643+16
+	ldr	r5, .L1686+16
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1643+20
+	ldr	r3, .L1686+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.L1627:
+.L1675:
 	bl	FtlLoadBbt
-	cbz	r0, .L1628
-.L1642:
+	cbz	r0, .L1676
+.L1685:
 	ldr	r3, [r5]
 	cmp	r3, #1
-	bne	.L1627
+	bne	.L1675
 	str	r6, [r5]
 	bl	ftl_low_format
-	b	.L1627
-.L1628:
+	b	.L1675
+.L1676:
 	bl	FtlSysBlkInit
 	cmp	r0, #0
-	bne	.L1642
+	bne	.L1685
 	movs	r3, #1
 	str	r3, [r4]
-	ldr	r3, .L1643+24
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L1640
-	movw	r4, #8129
-.L1634:
-	movs	r1, #1
-	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1634
-.L1640:
-	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1644:
+.L1687:
 	.align	2
-.L1643:
+.L1686:
 	.word	.LANCHOR166
-	.word	.LC41
-	.word	.LC34
+	.word	.LC49
+	.word	.LC38
 	.word	.LANCHOR0
 	.word	.LANCHOR181
 	.word	.LANCHOR4
-	.word	.LANCHOR48
 	.size	sftl_init, .-sftl_init
 	.section	.text.FtlWriteToIDB,"ax",%progbits
 	.align	1
@@ -12650,33 +12688,33 @@ FtlWriteToIDB:
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	ldr	r5, .L1715
-	bls	.L1646
+	ldr	r5, .L1758
+	bls	.L1689
 	cmp	r0, #576
-	bcc	.L1647
-.L1646:
+	bcc	.L1690
+.L1689:
 	ldr	r3, [r5]
-	cbnz	r3, .L1648
-.L1714:
+	cbnz	r3, .L1691
+.L1757:
 	movs	r4, #0
-	b	.L1645
-.L1648:
-	ldr	r3, .L1715+4
+	b	.L1688
+.L1691:
+	ldr	r3, .L1758+4
 	ldr	r3, [r3]
 	ldr	r2, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1715+8
+	ldr	r3, .L1758+8
 	cmp	r2, r3
-	bne	.L1650
-	ldr	r3, .L1715+12
+	bne	.L1693
+	ldr	r3, .L1758+12
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [sp, #12]
 	add	r0, r3, #262144
 	movw	r3, #65535
-.L1654:
+.L1697:
 	ldr	r4, [r0, #-4]
-	cbnz	r4, .L1651
+	cbnz	r4, .L1694
 	ldr	r4, [sp, #12]
 	subs	r3, r3, #1
 	ldr	r4, [r4, r2, lsl #2]
@@ -12686,18 +12724,18 @@ FtlWriteToIDB:
 	movhi	r2, #0
 	cmp	r3, #4096
 	str	r4, [r0, #-4]!
-	bne	.L1654
+	bne	.L1697
 	mov	r3, #512
-	b	.L1711
-.L1651:
+	b	.L1754
+.L1694:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1711:
+.L1754:
 	str	r3, [sp, #16]
 	lsls	r1, r1, #2
 	ldr	r3, [sp, #16]
 	uxth	r1, r1
-	ldr	r4, .L1715+16
+	ldr	r4, .L1758+16
 	adds	r0, r3, #4
 	bl	__aeabi_uidiv
 	adds	r3, r0, #1
@@ -12708,53 +12746,53 @@ FtlWriteToIDB:
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [sp, #20]
-.L1676:
-	ldr	r3, .L1715+20
+.L1719:
+	ldr	r3, .L1758+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	ldrh	r6, [r3, #10]
 	ldr	r3, [r4, #16]
 	mul	fp, r10, r6
 	cmp	r3, #0
-	beq	.L1684
+	beq	.L1727
 	ldr	r3, [r4, #20]
 	cmp	r3, #0
 	ite	eq
 	moveq	r3, #6
 	movne	r3, #9
-.L1712:
+.L1755:
 	str	r3, [sp, #28]
 	mov	r1, fp
-	ldr	r3, .L1715+16
+	ldr	r3, .L1758+16
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
 	ldr	r3, [sp, #24]
 	cmp	r3, #1
-	beq	.L1656
-	ldr	r3, .L1715+16
+	beq	.L1699
+	ldr	r3, .L1758+16
 	add	r1, r6, fp
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
-.L1656:
+.L1699:
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1686
-	ldr	r3, .L1715+20
+	bne	.L1729
+	ldr	r3, .L1758+20
 	mov	r2, #1024
 	movs	r1, #0
 	ldr	r5, [r3]
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r2, #4
-	ldr	r3, .L1715+24
+	ldr	r3, .L1758+24
 	strb	r2, [r5, #17]
 	movs	r1, #12
-	ldr	r2, .L1715+12
+	ldr	r2, .L1758+12
 	adds	r0, r5, r1
 	str	r3, [r5]
 	movs	r3, #0
@@ -12769,7 +12807,7 @@ FtlWriteToIDB:
 	strh	r3, [r5, #22]	@ movhi
 	bl	js_hash
 	str	r0, [r5, #8]
-.L1657:
+.L1700:
 	ldr	r3, [sp, #24]
 	mov	r8, fp
 	muls	r3, r6, r3
@@ -12777,10 +12815,10 @@ FtlWriteToIDB:
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #12]
 	str	r3, [sp, #32]
-.L1658:
+.L1701:
 	ldr	r3, [sp, #40]
 	cmp	r6, r3
-	beq	.L1665
+	beq	.L1708
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
 	itet	ne
@@ -12791,10 +12829,10 @@ FtlWriteToIDB:
 	movw	r3, #61424
 	str	r3, [sp, #52]
 	cmp	r6, #0
-	bne	.L1661
+	bne	.L1704
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1661
+	bne	.L1704
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12804,40 +12842,40 @@ FtlWriteToIDB:
 	mov	r0, r6
 	ldr	r7, [r4, #8]
 	blx	r7
-	ldr	r2, .L1715+12
+	ldr	r2, .L1758+12
 	str	r0, [sp, #44]
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1662
-.L1665:
-	ldr	r3, .L1715+20
+	bne	.L1705
+.L1708:
+	ldr	r3, .L1758+20
 	ldr	r2, [r4, #16]
 	ldr	r6, [r3]
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	ldrh	r3, [r3, #10]
 	mul	r8, r10, r3
 	cmp	r2, #0
-	bne	.L1663
+	bne	.L1706
 	mov	fp, #6
-.L1664:
+.L1707:
 	ldr	r2, [sp, #24]
 	movs	r5, #0
 	muls	r3, r2, r3
 	str	r3, [sp, #32]
-.L1667:
+.L1710:
 	ldr	r3, [sp, #32]
 	cmp	r5, r3
-	beq	.L1671
+	beq	.L1714
 	cmp	r5, #0
-	bne	.L1668
+	bne	.L1711
 	cmp	fp, #9
-	bne	.L1668
+	bne	.L1711
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -12853,77 +12891,77 @@ FtlWriteToIDB:
 	ldr	r3, [r4, #20]
 	ldr	r0, [sp, #28]
 	blx	r3
-	ldr	r2, .L1715+12
+	ldr	r2, .L1758+12
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r3, [r6]
-	ldr	r2, .L1715+24
+	ldr	r2, .L1758+24
 	cmp	r3, r2
-	beq	.L1669
-.L1671:
-	ldr	r3, .L1715+20
+	beq	.L1712
+.L1714:
+	ldr	r3, .L1758+20
 	movs	r5, #0
 	ldr	r1, [sp, #12]
 	ldr	r0, [r3]
-.L1670:
+.L1713:
 	mov	r8, r1
 	ldr	r2, [r0, r5, lsl #2]
 	ldr	r3, [r8]
 	lsls	r6, r5, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1673
+	beq	.L1716
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1715+20
+	ldr	r3, .L1758+20
 	mov	r1, r10
-	ldr	r0, .L1715+28
+	ldr	r0, .L1758+28
 	ldr	r2, [r3]
 	str	r5, [sp]
 	ldr	r3, [r8]
 	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r3, .L1715+12
+	ldr	r3, .L1758+12
 	movs	r0, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [r4, #4]
 	mul	r1, r10, r1
 	blx	r3
-.L1674:
+.L1717:
 	ldr	r3, [sp, #24]
 	add	r10, r10, r3
 	cmp	r10, #15
-	bls	.L1676
+	bls	.L1719
 	ldr	r3, [sp, #20]
-	cbnz	r3, .L1677
-.L1650:
+	cbnz	r3, .L1720
+.L1693:
 	mov	r3, #-1
 	str	r3, [sp, #16]
-.L1677:
-	ldr	r3, .L1715
+.L1720:
+	ldr	r3, .L1758
 	movs	r2, #0
 	ldr	r4, [sp, #16]
 	str	r2, [r3]
-	ldr	r3, .L1715+4
+	ldr	r3, .L1758+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1715+20
+	ldr	r3, .L1758+20
 	ldr	r0, [r3]
 	bl	free
-.L1645:
+.L1688:
 	mov	r0, r4
 	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1684:
+.L1727:
 	movs	r3, #6
-	b	.L1712
-.L1686:
+	b	.L1755
+.L1729:
 	movs	r5, #0
-	b	.L1657
-.L1661:
+	b	.L1700
+.L1704:
 	add	r3, sp, #48
 	ldr	r2, [sp, #32]
 	mov	r1, r8
@@ -12931,22 +12969,22 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #8]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1665
+	beq	.L1708
 	ldr	r3, [sp, #32]
 	add	r3, r3, #2048
 	str	r3, [sp, #32]
-.L1662:
+.L1705:
 	adds	r6, r6, #1
 	add	r8, r8, #1
-	b	.L1658
-.L1663:
+	b	.L1701
+.L1706:
 	ldr	r2, [r4, #20]
 	cmp	r2, #0
 	ite	eq
 	moveq	fp, #6
 	movne	fp, #9
-	b	.L1664
-.L1668:
+	b	.L1707
+.L1711:
 	add	r3, sp, #48
 	mov	r2, r6
 	add	r1, r8, r5
@@ -12954,18 +12992,18 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #12]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1671
+	beq	.L1714
 	ldr	r2, [sp, #52]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1671
+	bne	.L1714
 	add	r6, r6, #2048
-.L1669:
+.L1712:
 	adds	r5, r5, #1
-	b	.L1667
-.L1716:
+	b	.L1710
+.L1759:
 	.align	2
-.L1715:
+.L1758:
 	.word	.LANCHOR182
 	.word	.LANCHOR183
 	.word	-52655045
@@ -12973,46 +13011,46 @@ FtlWriteToIDB:
 	.word	.LANCHOR78
 	.word	.LANCHOR184
 	.word	1179535694
-	.word	.LC42
-.L1673:
+	.word	.LC50
+.L1716:
 	ldr	r3, [sp, #36]
 	adds	r5, r5, #1
 	cmp	r5, r3
-	bne	.L1670
+	bne	.L1713
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #20]
-	bls	.L1674
-	b	.L1677
-.L1647:
+	bls	.L1717
+	b	.L1720
+.L1690:
 	cmp	r0, #64
-	bne	.L1678
-	ldr	fp, .L1717+4
+	bne	.L1721
+	ldr	fp, .L1760+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1717
+	ldr	r3, .L1760
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1679
-	cbz	r0, .L1679
+	cbz	r3, .L1722
+	cbz	r0, .L1722
 	movs	r2, #1
 	movs	r1, #0
 	str	r2, [r5]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1678:
+.L1721:
 	ldr	r3, [r5]
 	cmp	r3, #0
-	beq	.L1714
-	ldr	r3, .L1717+4
+	beq	.L1757
+	ldr	r3, .L1760+4
 	cmp	r4, #63
 	iteee	hi
-	ldrhi	r5, .L1717+8
+	ldrhi	r5, .L1760+8
 	rsbls	r4, r4, #64
 	subls	r6, r6, r4
 	addls	r7, r7, r4, lsl #9
@@ -13020,7 +13058,7 @@ FtlWriteToIDB:
 	mov	r2, #262144
 	it	hi
 	addhi	r5, r5, r4
-	ldr	r0, .L1717+12
+	ldr	r0, .L1760+12
 	ite	ls
 	movls	r5, r1
 	addhi	r5, r1, r5, lsl #9
@@ -13035,21 +13073,21 @@ FtlWriteToIDB:
 	mov	r1, r7
 	mov	r0, r5
 	bl	ftl_memcpy
-	b	.L1714
-.L1679:
-	ldr	r1, .L1717+16
-	ldr	r0, .L1717+20
+	b	.L1757
+.L1722:
+	ldr	r1, .L1760+16
+	ldr	r0, .L1760+20
 	bl	printf
-	b	.L1678
-.L1718:
+	b	.L1721
+.L1761:
 	.align	2
-.L1717:
+.L1760:
 	.word	.LANCHOR184
 	.word	.LANCHOR183
 	.word	8388544
-	.word	.LC44
+	.word	.LC52
 	.word	.LANCHOR185
-	.word	.LC43
+	.word	.LC51
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
@@ -13715,7 +13753,7 @@ g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -13778,7 +13816,7 @@ g_nand_phy_info:
 	.space	24
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
@@ -13841,7 +13879,7 @@ g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -14029,21 +14067,21 @@ p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -14312,316 +14350,334 @@ power_up_flag:
 .LC8:
 	.ascii	"not free: w: s:\000"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
-.LC11:
+.LC14:
 	.ascii	"prog read error: = %x\012\000"
-.LC12:
+.LC15:
+	.ascii	"prog read REFRESH: = %x\012\000"
+.LC16:
 	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC13:
+.LC17:
 	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
+.LC11:
+	.ascii	"FlashReadPages %x %x error_ecc_bits %d\012\000"
+.LC12:
+	.ascii	"data:\000"
+.LC13:
+	.ascii	"spare:\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC14:
+.LC18:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC15:
+.LC19:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC16:
+.LC20:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC9:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC31:
+.LC35:
 	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC33:
+.LC37:
 	.ascii	"no ect\000"
-.LC34:
+.LC38:
 	.ascii	"%s\012\000"
 	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",%progbits,1
-.LC38:
+.LC46:
 	.ascii	"%s hash error this.id =%x page =%x pre_id =%x hash "
 	.ascii	"=%x hash_r =%x\012\000"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
-.LC39:
+.LC47:
 	.ascii	"%s last blk_id =%x page =%x hash error hash =%x has"
 	.ascii	"h_r =%x\012\000"
-.LC40:
+.LC48:
 	.ascii	"%s scan blk_id =%x page =%x hash error hash =%x has"
 	.ascii	"h_r =%x\012\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC18:
+.LC22:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC19:
+.LC23:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC36:
+.LC40:
+	.ascii	"FtlProgPages error %x = %d\012\000"
+.LC41:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC24:
+.LC27:
+	.ascii	"data prev_ppa = %x error...................\012\000"
+.LC28:
 	.ascii	"spuer block %x vpn is 0\012 \000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC32:
+.LC36:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC35:
+.LC39:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC37:
+.LC44:
+	.ascii	"FtlWrite: ecc error:%x %x %x\012\000"
+.LC45:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",%progbits,1
-.LC42:
+.LC50:
 	.ascii	"write_idblock fail! %x %x %x %x\012\000"
-.LC43:
+.LC51:
 	.ascii	"%s idb buffer alloc fail\012\000"
-.LC44:
+.LC52:
 	.ascii	"%p %x %p %x\012\000"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10015,"a",%progbits
+	.section	.rodata.__func__.10006,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10015, %object
-	.size	__func__.10015, 23
-__func__.10015:
+	.type	__func__.10006, %object
+	.size	__func__.10006, 23
+__func__.10006:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10277,"a",%progbits
+	.section	.rodata.__func__.10278,"a",%progbits
 	.set	.LANCHOR137,. + 0
-	.type	__func__.10277, %object
-	.size	__func__.10277, 15
-__func__.10277:
+	.type	__func__.10278, %object
+	.size	__func__.10278, 15
+__func__.10278:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10296,"a",%progbits
+	.section	.rodata.__func__.10297,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.10296, %object
-	.size	__func__.10296, 15
-__func__.10296:
+	.type	__func__.10297, %object
+	.size	__func__.10297, 15
+__func__.10297:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10320,"a",%progbits
+	.section	.rodata.__func__.10321,"a",%progbits
 	.set	.LANCHOR77,. + 0
-	.type	__func__.10320, %object
-	.size	__func__.10320, 17
-__func__.10320:
+	.type	__func__.10321, %object
+	.size	__func__.10321, 17
+__func__.10321:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.10435,"a",%progbits
+	.section	.rodata.__func__.10436,"a",%progbits
 	.set	.LANCHOR185,. + 0
-	.type	__func__.10435, %object
-	.size	__func__.10435, 14
-__func__.10435:
+	.type	__func__.10436, %object
+	.size	__func__.10436, 14
+__func__.10436:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.8940,"a",%progbits
+	.section	.rodata.__func__.8930,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.8940, %object
-	.size	__func__.8940, 13
-__func__.8940:
+	.type	__func__.8930, %object
+	.size	__func__.8930, 13
+__func__.8930:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8968,"a",%progbits
+	.section	.rodata.__func__.8958,"a",%progbits
 	.set	.LANCHOR177,. + 0
-	.type	__func__.8968, %object
-	.size	__func__.8968, 9
-__func__.8968:
+	.type	__func__.8958, %object
+	.size	__func__.8958, 9
+__func__.8958:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9043,"a",%progbits
+	.section	.rodata.__func__.9033,"a",%progbits
 	.set	.LANCHOR128,. + 0
-	.type	__func__.9043, %object
-	.size	__func__.9043, 14
-__func__.9043:
+	.type	__func__.9033, %object
+	.size	__func__.9033, 14
+__func__.9033:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9078,"a",%progbits
+	.section	.rodata.__func__.9068,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9078, %object
-	.size	__func__.9078, 11
-__func__.9078:
+	.type	__func__.9068, %object
+	.size	__func__.9068, 11
+__func__.9068:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9193,"a",%progbits
+	.section	.rodata.__func__.9183,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9193, %object
-	.size	__func__.9193, 17
-__func__.9193:
+	.type	__func__.9183, %object
+	.size	__func__.9183, 17
+__func__.9183:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9198,"a",%progbits
-	.set	.LANCHOR46,. + 0
-	.type	__func__.9198, %object
-	.size	__func__.9198, 17
-__func__.9198:
+	.section	.rodata.__func__.9188,"a",%progbits
+	.set	.LANCHOR45,. + 0
+	.type	__func__.9188, %object
+	.size	__func__.9188, 17
+__func__.9188:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9229,"a",%progbits
+	.section	.rodata.__func__.9219,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9229, %object
-	.size	__func__.9229, 17
-__func__.9229:
+	.type	__func__.9219, %object
+	.size	__func__.9219, 17
+__func__.9219:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9261,"a",%progbits
+	.section	.rodata.__func__.9251,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9261, %object
-	.size	__func__.9261, 22
-__func__.9261:
+	.type	__func__.9251, %object
+	.size	__func__.9251, 22
+__func__.9251:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9270,"a",%progbits
+	.section	.rodata.__func__.9260,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9270, %object
-	.size	__func__.9270, 16
-__func__.9270:
+	.type	__func__.9260, %object
+	.size	__func__.9260, 16
+__func__.9260:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9303,"a",%progbits
+	.section	.rodata.__func__.9293,"a",%progbits
 	.set	.LANCHOR81,. + 0
-	.type	__func__.9303, %object
-	.size	__func__.9303, 26
-__func__.9303:
+	.type	__func__.9293, %object
+	.size	__func__.9293, 26
+__func__.9293:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9314,"a",%progbits
+	.section	.rodata.__func__.9304,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9314, %object
-	.size	__func__.9314, 15
-__func__.9314:
+	.type	__func__.9304, %object
+	.size	__func__.9304, 15
+__func__.9304:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9329,"a",%progbits
+	.section	.rodata.__func__.9319,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9329, %object
-	.size	__func__.9329, 31
-__func__.9329:
+	.type	__func__.9319, %object
+	.size	__func__.9319, 31
+__func__.9319:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9343,"a",%progbits
+	.section	.rodata.__func__.9333,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9343, %object
-	.size	__func__.9343, 16
-__func__.9343:
+	.type	__func__.9333, %object
+	.size	__func__.9333, 16
+__func__.9333:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9368,"a",%progbits
+	.section	.rodata.__func__.9358,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9368, %object
-	.size	__func__.9368, 22
-__func__.9368:
+	.type	__func__.9358, %object
+	.size	__func__.9358, 22
+__func__.9358:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9385,"a",%progbits
+	.section	.rodata.__func__.9375,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.9385, %object
-	.size	__func__.9385, 9
-__func__.9385:
+	.type	__func__.9375, %object
+	.size	__func__.9375, 9
+__func__.9375:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9449,"a",%progbits
+	.section	.rodata.__func__.9439,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9449, %object
-	.size	__func__.9449, 15
-__func__.9449:
+	.type	__func__.9439, %object
+	.size	__func__.9439, 15
+__func__.9439:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9471,"a",%progbits
+	.section	.rodata.__func__.9461,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9471, %object
-	.size	__func__.9471, 14
-__func__.9471:
+	.type	__func__.9461, %object
+	.size	__func__.9461, 14
+__func__.9461:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9527,"a",%progbits
+	.section	.rodata.__func__.9517,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.9527, %object
-	.size	__func__.9527, 15
-__func__.9527:
+	.type	__func__.9517, %object
+	.size	__func__.9517, 15
+__func__.9517:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9549,"a",%progbits
+	.section	.rodata.__func__.9539,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.9549, %object
-	.size	__func__.9549, 18
-__func__.9549:
+	.type	__func__.9539, %object
+	.size	__func__.9539, 18
+__func__.9539:
 	.ascii	"FtlMapTblRecovery\000"
-	.section	.rodata.__func__.9595,"a",%progbits
+	.section	.rodata.__func__.9585,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9595, %object
-	.size	__func__.9595, 16
-__func__.9595:
+	.type	__func__.9585, %object
+	.size	__func__.9585, 16
+__func__.9585:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9629,"a",%progbits
+	.section	.rodata.__func__.9619,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9629, %object
-	.size	__func__.9629, 22
-__func__.9629:
+	.type	__func__.9619, %object
+	.size	__func__.9619, 22
+__func__.9619:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9686,"a",%progbits
+	.section	.rodata.__func__.9676,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9686, %object
-	.size	__func__.9686, 16
-__func__.9686:
+	.type	__func__.9676, %object
+	.size	__func__.9676, 16
+__func__.9676:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9707,"a",%progbits
+	.section	.rodata.__func__.9697,"a",%progbits
 	.set	.LANCHOR136,. + 0
-	.type	__func__.9707, %object
-	.size	__func__.9707, 18
-__func__.9707:
+	.type	__func__.9697, %object
+	.size	__func__.9697, 18
+__func__.9697:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9734,"a",%progbits
+	.section	.rodata.__func__.9724,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9734, %object
-	.size	__func__.9734, 14
-__func__.9734:
+	.type	__func__.9724, %object
+	.size	__func__.9724, 14
+__func__.9724:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9799,"a",%progbits
-	.set	.LANCHOR143,. + 0
-	.type	__func__.9799, %object
-	.size	__func__.9799, 25
-__func__.9799:
+	.section	.rodata.__func__.9789,"a",%progbits
+	.set	.LANCHOR144,. + 0
+	.type	__func__.9789, %object
+	.size	__func__.9789, 25
+__func__.9789:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9820,"a",%progbits
+	.section	.rodata.__func__.9810,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9820, %object
-	.size	__func__.9820, 29
-__func__.9820:
+	.type	__func__.9810, %object
+	.size	__func__.9810, 29
+__func__.9810:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9827,"a",%progbits
+	.section	.rodata.__func__.9817,"a",%progbits
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9827, %object
-	.size	__func__.9827, 19
-__func__.9827:
+	.type	__func__.9817, %object
+	.size	__func__.9817, 19
+__func__.9817:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9840,"a",%progbits
+	.section	.rodata.__func__.9830,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9840, %object
-	.size	__func__.9840, 16
-__func__.9840:
+	.type	__func__.9830, %object
+	.size	__func__.9830, 16
+__func__.9830:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9847,"a",%progbits
+	.section	.rodata.__func__.9837,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.9847, %object
-	.size	__func__.9847, 20
-__func__.9847:
+	.type	__func__.9837, %object
+	.size	__func__.9837, 20
+__func__.9837:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9917,"a",%progbits
+	.section	.rodata.__func__.9907,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.9917, %object
-	.size	__func__.9917, 19
-__func__.9917:
+	.type	__func__.9907, %object
+	.size	__func__.9907, 19
+__func__.9907:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC17:
+.LC21:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
-.LC25:
+.LC29:
 	.ascii	"...%s enter...\012\000"
-.LC26:
+.LC30:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC27:
+.LC31:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC10:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC28:
+.LC32:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC29:
+.LC33:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC30:
+.LC34:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC20:
+.LC24:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC21:
-	.ascii	"spare:\000"
-.LC22:
+.LC25:
 	.ascii	"map_ppn:\000"
-.LC23:
+.LC26:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
+.LC42:
+	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
+.LC43:
+	.ascii	"lpa=%x, ppa=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC2:
 	.ascii	"%s 0x%x:\000"
@@ -14632,6 +14688,6 @@ __func__.9917:
 .LC5:
 	.ascii	"\012\000"
 	.section	.rodata.sftl_init.str1.1,"aMS",%progbits,1
-.LC41:
-	.ascii	"SFTL version: 5.0.50 20181227\000"
+.LC49:
+	.ascii	"SFTL version: 5.0.50 20190215\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index d54b12f7b3..8298fdd27c 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-12-27
+ * date: 2019-02-20
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -545,105 +545,84 @@ IsInFreeQueue:
 insert_data_list:
 	adrp	x1, .LANCHOR5
 	and	w0, w0, 65535
-	ldrh	w14, [x1, #:lo12:.LANCHOR5]
-	cmp	w14, w0
-	bls	.L72
+	ldrh	w12, [x1, #:lo12:.LANCHOR5]
+	cmp	w12, w0
+	bls	.L58
 	adrp	x1, .LANCHOR40
-	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR40]
-	umull	x13, w0, w3
+	mov	w8, 6
+	ldr	x4, [x1, #:lo12:.LANCHOR40]
+	umull	x10, w0, w8
 	mov	w1, -1
-	add	x5, x6, x13
-	strh	w1, [x5, 2]
-	strh	w1, [x6, x13]
+	add	x3, x4, x10
+	strh	w1, [x3, 2]
+	strh	w1, [x4, x10]
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR41]
-	cbnz	x12, .L59
-	str	x5, [x1, #:lo12:.LANCHOR41]
-.L72:
+	ldr	x7, [x1, #:lo12:.LANCHOR41]
+	cbnz	x7, .L59
+	str	x3, [x1, #:lo12:.LANCHOR41]
+.L58:
 	mov	w0, 0
 	ret
 .L59:
-	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR42
-	ubfiz	x2, x0, 1, 16
-	mov	x4, -6148914691236517206
-	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR42]
-	movk	x4, 0xaaab, lsl 0
-	ldrh	w1, [x5, 4]
-	mov	w8, -1
-	mov	w11, w8
-	stp	x19, x20, [sp, 16]
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	mov	w6, 0
+	ldr	x13, [x1, #:lo12:.LANCHOR42]
+	ubfiz	x1, x0, 1, 16
+	mov	w16, 65535
+	ldrh	w5, [x13, x1]
+	ldrh	w1, [x3, 4]
 	cmp	w1, 0
-	mov	w20, 65535
-	ldrh	w7, [x16, x2]
-	mul	w7, w7, w1
-	sub	x1, x12, x6
+	mul	w5, w5, w1
+	sub	x1, x7, x4
 	asr	x1, x1, 1
-	csel	w7, w7, w8, ne
-	mov	w8, w3
-	mul	x1, x1, x4
-	adrp	x4, .LANCHOR43
-	ldr	x17, [x4, #:lo12:.LANCHOR43]
+	csinv	w5, w5, wzr, ne
+	mul	x1, x1, x2
+	mov	x2, x7
 	and	w1, w1, 65535
-	mov	x4, x12
-	add	x10, x17, x2
-	mov	w2, 0
-.L67:
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	cmp	w14, w2
+.L64:
+	add	w6, w6, 1
+	and	w6, w6, 65535
+	cmp	w12, w6
 	bcc	.L58
 	cmp	w1, w0
 	beq	.L58
-	ubfiz	x30, x1, 1, 16
-	ldrh	w19, [x4, 4]
-	cmp	w19, 0
-	ldrh	w3, [x16, x30]
-	mul	w3, w3, w19
-	csel	w3, w3, w11, ne
-	cmp	w7, w3
+	ldrh	w14, [x2, 4]
+	cbz	w14, .L62
+	ubfiz	x11, x1, 1, 16
+	ldrh	w11, [x13, x11]
+	mul	w11, w11, w14
+	cmp	w5, w11
+	bls	.L62
+	ldrh	w11, [x2]
+	cmp	w11, w16
 	bne	.L63
-	ldrh	w19, [x17, x30]
-	ldrh	w3, [x10]
-	cmp	w19, w3
-	bcc	.L65
-.L64:
-	strh	w1, [x6, x13]
-	cmp	x4, x12
-	ldrh	w1, [x4, 2]
-	strh	w1, [x5, 2]
-	bne	.L68
-	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR41]
+	strh	w1, [x3, 2]
+	strh	w0, [x2]
+	adrp	x0, .LANCHOR43
+	str	x3, [x0, #:lo12:.LANCHOR43]
 	b	.L58
 .L63:
-	bcc	.L64
+	umaddl	x2, w11, w8, x4
+	mov	w1, w11
+	b	.L64
+.L62:
+	strh	w1, [x4, x10]
+	cmp	x2, x7
+	ldrh	w1, [x2, 2]
+	strh	w1, [x3, 2]
+	bne	.L65
+	strh	w0, [x2, 2]
+	str	x3, [x15, #:lo12:.LANCHOR41]
+	b	.L58
 .L65:
-	ldrh	w3, [x4]
-	cmp	w3, w20
-	bne	.L66
-	strh	w1, [x5, 2]
-	strh	w0, [x4]
-	adrp	x0, .LANCHOR44
-	str	x5, [x0, #:lo12:.LANCHOR44]
-.L58:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L66:
-	umaddl	x4, w3, w8, x6
-	mov	w1, w3
-	b	.L67
-.L68:
-	ldrh	w1, [x4, 2]
-	mov	w2, 6
-	umull	x1, w1, w2
-	strh	w0, [x6, x1]
-	strh	w0, [x4, 2]
+	ldrh	w1, [x2, 2]
+	mov	w3, 6
+	umull	x1, w1, w3
+	strh	w0, [x4, x1]
+	strh	w0, [x2, 2]
 	b	.L58
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
@@ -654,23 +633,23 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR45
-	ldrh	w0, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR44
+	ldrh	w0, [x1, #:lo12:.LANCHOR44]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR45]
+	strh	w0, [x1, #:lo12:.LANCHOR44]
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L74
+	bcs	.L70
 	ldp	x29, x30, [sp], 16
 	mov	w2, 214
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR45
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR45
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L74:
+.L70:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -682,7 +661,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L78
+	beq	.L74
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
@@ -691,19 +670,19 @@ insert_free_list:
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR47
+	adrp	x1, .LANCHOR46
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR47]
-	cbnz	x5, .L79
-	str	x4, [x1, #:lo12:.LANCHOR47]
-.L78:
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	cbnz	x5, .L75
+	str	x4, [x1, #:lo12:.LANCHOR46]
+.L74:
 	mov	w0, 0
 	ret
-.L79:
-	adrp	x1, .LANCHOR43
+.L75:
+	adrp	x1, .LANCHOR47
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR43]
+	ldr	x11, [x1, #:lo12:.LANCHOR47]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -711,37 +690,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L82:
+.L78:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L80
+	bcs	.L76
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L81
+	bne	.L77
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L78
-.L81:
+	b	.L74
+.L77:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L82
-.L80:
+	b	.L78
+.L76:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L83
+	bne	.L79
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR47]
-	b	.L78
-.L83:
+	str	x4, [x12, #:lo12:.LANCHOR46]
+	b	.L74
+.L79:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L78
+	b	.L74
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -759,7 +738,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L84
+	bcs	.L80
 	ldp	x29, x30, [sp], 16
 	mov	w2, 207
 	adrp	x1, .LANCHOR49
@@ -767,7 +746,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L84:
+.L80:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -791,26 +770,26 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L88
+	bne	.L84
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L88
+	beq	.L84
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L88:
+.L84:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L89
+	bne	.L85
 	cmp	w0, w1
-	bne	.L90
+	bne	.L86
 	str	xzr, [x22]
-.L91:
+.L87:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -820,27 +799,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L90:
+.L86:
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L91
-.L89:
+	b	.L87
+.L85:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L92
+	bne	.L88
 	cmp	w1, w0
-	beq	.L91
+	beq	.L87
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L91
-.L92:
+	b	.L87
+.L88:
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -848,7 +827,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L91
+	b	.L87
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -856,7 +835,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L100
+	cbz	x2, .L96
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
@@ -865,9 +844,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.L96:
-	cbnz	w1, .L97
-.L99:
+.L92:
+	cbnz	w1, .L93
+.L95:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -880,15 +859,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L97:
+.L93:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L99
+	beq	.L95
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L96
-.L100:
+	b	.L92
+.L96:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -908,26 +887,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR41
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	cbz	x1, .L111
+	cbz	x1, .L107
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 65535
-.L108:
-	cbz	w2, .L109
+.L104:
+	cbz	w2, .L105
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L110
+	bne	.L106
 	ret
-.L110:
+.L106:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L108
-.L111:
+	b	.L104
+.L107:
 	mov	w0, 65535
 	ret
-.L109:
+.L105:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -951,15 +930,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L114
+	beq	.L110
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L114
+	beq	.L110
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L114
+	beq	.L110
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
 	adrp	x24, .LANCHOR41
@@ -969,7 +948,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L114
+	beq	.L110
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -982,25 +961,25 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L117
+	bne	.L113
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L117
+	bne	.L113
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L117:
+.L113:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L118
+	bne	.L114
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L114
-.L118:
+	beq	.L110
+.L114:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -1016,26 +995,26 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L114
-	adrp	x20, .LANCHOR45
+	bcs	.L110
+	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR41
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L120
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
+	cbnz	w0, .L116
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L120:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+.L116:
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
+	strh	w0, [x20, #:lo12:.LANCHOR44]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L114:
+.L110:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1058,72 +1037,72 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR55
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.L125:
+.L121:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L127
+	bcc	.L123
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L128:
+.L124:
 	cmp	w1, w2
-	bne	.L130
+	bne	.L126
 	cmp	w19, w2
-	bcc	.L126
+	bcc	.L122
 	adrp	x1, .LANCHOR56
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.L131:
+.L127:
 	cmp	w1, w2
-	bne	.L133
+	bne	.L129
 	cmp	w19, w1
-	bcc	.L126
+	bcc	.L122
 	mov	w2, 789
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L126
-.L127:
+	b	.L122
+.L123:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L125
-.L126:
+	bne	.L121
+.L122:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L130:
+.L126:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L129
+	tbnz	w4, #31, .L125
 	cmp	w5, w4
-	bls	.L129
+	bls	.L125
 	mov	w5, w4
 	mov	w19, w1
-.L129:
+.L125:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L128
-.L133:
+	b	.L124
+.L129:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L132
+	bls	.L128
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L132:
+.L128:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L131
+	b	.L127
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -1134,12 +1113,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L136
-	cbnz	w0, .L136
+	bhi	.L132
+	cbnz	w0, .L132
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
 	ret
-.L136:
+.L132:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR59
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
@@ -1151,22 +1130,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L137:
+.L133:
 	cmp	w5, w1, uxth
-	bhi	.L139
-	cbz	w3, .L135
+	bhi	.L135
+	cbz	w3, .L131
 	str	w2, [x0, #:lo12:.LANCHOR59]
-.L135:
+.L131:
 	ret
-.L139:
+.L135:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L138
+	beq	.L134
 	add	w2, w2, w4
 	mov	w3, 1
-.L138:
+.L134:
 	add	x1, x1, 1
-	b	.L137
+	b	.L133
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -1174,9 +1153,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L146
+	cbz	w1, .L142
 	b	ftl_set_blk_mode.part.6
-.L146:
+.L142:
 	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -1216,9 +1195,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
-.L149:
+.L145:
 	cmp	w2, w3
-	bcc	.L151
+	bcc	.L147
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -1229,32 +1208,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L152:
+.L148:
 	cmp	x2, x3
-	bne	.L154
+	bne	.L150
 	ret
-.L151:
+.L147:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L150
+	beq	.L146
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L150:
+.L146:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L149
-.L154:
+	b	.L145
+.L150:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L153
+	beq	.L149
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L153:
+.L149:
 	add	x2, x2, 2
-	b	.L152
+	b	.L148
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -1262,38 +1241,38 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L155
+	cbz	w1, .L151
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L155
+	beq	.L151
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
 	mov	w2, w1
-.L158:
+.L154:
 	cmp	w3, w2
-	beq	.L160
-.L155:
+	beq	.L156
+.L151:
 	ret
-.L160:
+.L156:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L159
+	bne	.L155
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L159:
+.L155:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L158
+	b	.L154
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -1308,14 +1287,14 @@ make_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L162
+	bcc	.L158
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2156
+	mov	w2, 2148
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L162:
+.L158:
 	adrp	x0, .LANCHOR3
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
@@ -1325,35 +1304,45 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L163:
+.L159:
 	cmp	w8, w5, uxth
-	bhi	.L165
+	bhi	.L161
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
+	ldrh	w1, [x19]
 	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR47
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
+	ldrh	w1, [x0, x1, lsl 1]
+	mov	w0, 10000
+	cmp	w1, w0
+	bls	.L162
+	mov	w0, 1
+	strb	w0, [x19, 9]
+.L162:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L165:
+.L161:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L164
+	cbnz	w0, .L160
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L164:
+.L160:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L163
+	b	.L159
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -1370,11 +1359,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR13
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
 	cmp	w10, w7, uxth
-	bhi	.L179
-	cbz	w5, .L177
+	bhi	.L176
+	cbz	w5, .L174
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L178:
+.L175:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1382,31 +1371,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L172:
+.L169:
 	mov	w5, 0
-	b	.L171
-.L177:
+	b	.L168
+.L174:
 	mov	w5, 0
-	b	.L178
-.L179:
+	b	.L175
+.L176:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L170:
+.L167:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L169
+	cbnz	w0, .L166
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L169:
+.L166:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L170
-	cbz	w5, .L172
+	bhi	.L167
+	cbz	w5, .L169
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L171:
+.L168:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1421,9 +1410,9 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR47
-	ldr	x0, [x0, #:lo12:.LANCHOR47]
-	cbz	x0, .L182
+	adrp	x0, .LANCHOR46
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	cbz	x0, .L179
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -1431,12 +1420,12 @@ GetFreeBlockMinEraseCount:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR43
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR47
+	ldr	x1, [x1, #:lo12:.LANCHOR47]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L182:
+.L179:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1445,10 +1434,10 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR47
+	adrp	x1, .LANCHOR46
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR47]
-	cbz	x1, .L190
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	cbz	x1, .L187
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
 	mov	w5, 6
@@ -1467,25 +1456,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L186:
+.L183:
 	cmp	w0, w2
-	beq	.L189
+	beq	.L186
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L187
-.L189:
-	adrp	x0, .LANCHOR43
+	bne	.L184
+.L186:
+	adrp	x0, .LANCHOR47
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	ldrh	w0, [x0, x1]
 	ret
-.L187:
+.L184:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L186
-.L190:
+	b	.L183
+.L187:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -1497,7 +1486,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L194
+	beq	.L191
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -1508,7 +1497,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L194:
+.L191:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -1525,101 +1514,106 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L198
+	bne	.L195
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2786
+	mov	w2, 2781
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L198:
-	adrp	x20, .LANCHOR19
+.L195:
+	adrp	x21, .LANCHOR19
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	ldrh	w0, [x21, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L199
+	bne	.L196
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2787
+	mov	w2, 2782
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L199:
+.L196:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L200
+	cbnz	w0, .L197
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2788
+	mov	w2, 2783
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L200:
+.L197:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
 	add	x0, x0, 8
-	ldrh	w2, [x1, #:lo12:.LANCHOR3]
+	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L201:
+.L198:
 	cmp	w0, w1
-	beq	.L203
-	ldrh	w21, [x19, 2]
-	mov	w3, 65535
+	beq	.L200
+	ldrh	w20, [x19, 2]
+	ldrh	w2, [x21, #:lo12:.LANCHOR19]
+	cmp	w20, w2
+	bcs	.L204
 	ldrh	w1, [x19, 4]
-	orr	w21, w21, w0, lsl 10
+	orr	w20, w20, w0, lsl 10
 	ldrb	w0, [x19, 6]
+	mov	w4, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L205:
+.L203:
 	add	w0, w0, 1
 	and	w0, w0, 255
-	cmp	w2, w0
-	bne	.L204
+	cmp	w3, w0
+	bne	.L202
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L204:
-	add	x4, x19, x0, sxtw 1
-	ldrh	w4, [x4, 16]
-	cmp	w4, w3
-	beq	.L205
+.L202:
+	add	x5, x19, x0, sxtw 1
+	ldrh	w5, [x5, 16]
+	cmp	w5, w4
+	beq	.L203
 	strb	w0, [x19, 6]
-	ldrh	w2, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR19]
-	cmp	w2, w0
-	bne	.L197
-	cbz	w1, .L197
+	ldrh	w0, [x19, 2]
+	cmp	w0, w2
+	bne	.L194
+	cbz	w1, .L194
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2809
+	mov	w2, 2806
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L197:
-	mov	w0, w21
+.L194:
+	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L203:
+.L200:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	cmp	w0, w2
-	bne	.L202
+	cmp	w0, w3
+	bne	.L199
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L202:
+.L199:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L201
+	b	.L198
+.L204:
+	mov	w20, 65535
+	b	.L194
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
@@ -1650,21 +1644,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L213:
+.L211:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L214
+	bne	.L212
 	adrp	x1, .LANCHOR67
 	ldr	x7, [x7, #:lo12:.LANCHOR64]
 	ldr	x6, [x6, #:lo12:.LANCHOR65]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR67]
-.L215:
+.L213:
 	cmp	w0, w4
-	bcc	.L216
+	bcc	.L214
 	ret
-.L214:
+.L212:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -1676,8 +1670,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L213
-.L216:
+	b	.L211
+.L214:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -1691,7 +1685,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L215
+	b	.L213
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -1704,31 +1698,31 @@ FtlGcBufFree:
 	ldr	w7, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x5, [x2, #:lo12:.LANCHOR63]
-.L218:
+.L216:
 	cmp	w3, w1
-	bcs	.L217
+	bcs	.L215
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L223
-.L219:
+	b	.L221
+.L217:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L223:
+.L221:
 	cmp	w2, w7
-	bcs	.L220
+	bcs	.L218
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L219
+	bne	.L217
 	str	wzr, [x10, 16]
-.L220:
+.L218:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L218
-.L217:
+	b	.L216
+.L215:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -1743,31 +1737,31 @@ FtlGcBufAlloc:
 	ldr	w5, [x2, #:lo12:.LANCHOR67]
 	adrp	x2, .LANCHOR63
 	ldr	x6, [x2, #:lo12:.LANCHOR63]
-.L225:
+.L223:
 	cmp	w3, w1
-	bcs	.L224
+	bcs	.L222
 	mov	w2, 0
-	b	.L230
-.L226:
+	b	.L228
+.L224:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L230:
+.L228:
 	cmp	w2, w5
-	bcs	.L227
+	bcs	.L225
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L226
+	cbnz	w10, .L224
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L227:
+.L225:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L225
-.L224:
+	b	.L223
+.L222:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -1781,17 +1775,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR69
 	ldr	x3, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
-.L232:
+.L230:
 	cmp	w2, w1, uxth
-	bhi	.L234
+	bhi	.L232
 	mov	w0, 0
 	ret
-.L234:
+.L232:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L232
+	bne	.L230
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -1813,24 +1807,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR68]
 	ldr	x5, [x2, #:lo12:.LANCHOR69]
-.L237:
+.L235:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L239
-	bne	.L238
+	bcc	.L237
+	bne	.L236
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR68]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR68]
-	b	.L238
-.L239:
+	b	.L236
+.L237:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L237
-.L238:
+	bne	.L235
+.L236:
 	adrp	x4, .LANCHOR70
 	adrp	x1, .LANCHOR71
 	mov	w3, 12
@@ -1854,23 +1848,23 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w5, [x4, #:lo12:.LANCHOR72]
 	cmp	w5, w0
-	beq	.L242
+	beq	.L240
 	adrp	x1, .LANCHOR73
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w0, w3
-	beq	.L242
+	beq	.L240
 	mov	w2, 65535
 	cmp	w5, w2
-	bne	.L243
+	bne	.L241
 	strh	w0, [x4, #:lo12:.LANCHOR72]
-.L242:
+.L240:
 	mov	w0, 0
 	ret
-.L243:
+.L241:
 	cmp	w3, w2
-	bne	.L242
+	bne	.L240
 	strh	w0, [x1, #:lo12:.LANCHOR73]
-	b	.L242
+	b	.L240
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
@@ -1888,24 +1882,24 @@ FtlGcMarkBadPhyBlk:
 	add	x3, x3, :lo12:.LANCHOR75
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR74]
-.L245:
+.L243:
 	cmp	w0, w2, uxth
-	bhi	.L247
+	bhi	.L245
 	cmp	w0, 15
-	bhi	.L246
+	bhi	.L244
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR74]
 	adrp	x1, .LANCHOR75
 	add	x1, x1, :lo12:.LANCHOR75
 	strh	w6, [x1, w0, sxtw 1]
-	b	.L246
-.L247:
+	b	.L244
+.L245:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w6
-	bne	.L245
-.L246:
+	bne	.L243
+.L244:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -1917,20 +1911,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L256
+	cbz	w0, .L254
 	adrp	x1, .LANCHOR72
 	ldrh	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L256
+	bne	.L254
 	stp	x29, x30, [sp, -16]!
 	adrp	x6, .LANCHOR76
 	add	x29, sp, 0
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	cmp	w1, w0
-	bcc	.L251
+	bcc	.L249
 	strh	wzr, [x6, #:lo12:.LANCHOR76]
-.L251:
+.L249:
 	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR75
 	add	x0, x0, :lo12:.LANCHOR75
@@ -1943,7 +1937,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x6, #:lo12:.LANCHOR76]
 	mov	w0, 0
 	ret
-.L256:
+.L254:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -1987,9 +1981,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x26, .LC3
-.L262:
+.L260:
 	cmp	w27, w19
-	bhi	.L268
+	bhi	.L266
 	ldp	x19, x20, [sp, 16]
 	adrp	x0, .LC5
 	ldp	x21, x22, [sp, 32]
@@ -1999,40 +1993,40 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L268:
-	cbnz	w20, .L263
+.L266:
+	cbnz	w20, .L261
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L263:
+.L261:
 	cmp	w23, 4
-	bne	.L264
+	bne	.L262
 	ldr	w1, [x22, x19, lsl 2]
-.L271:
+.L269:
 	add	x0, x26, :lo12:.LC3
-.L270:
+.L268:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L267
+	bls	.L265
 	mov	w20, 0
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L267:
+.L265:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L262
-.L264:
+	b	.L260
+.L262:
 	cmp	w23, 2
-	bne	.L266
+	bne	.L264
 	ldrh	w1, [x22, x19, lsl 1]
-	b	.L271
-.L266:
+	b	.L269
+.L264:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L270
+	b	.L268
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -2058,18 +2052,18 @@ FlashEraseBlocks:
 	lsl	w26, w24, 3
 	mov	x22, x0
 	add	x27, x25, :lo12:.LANCHOR78
-.L273:
+.L271:
 	cmp	x19, x23
-	beq	.L287
+	beq	.L285
 	ldr	w0, [x19]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
-	cbnz	w0, .L274
+	cbnz	w0, .L272
 	ldr	w1, [x29, 108]
 	cmp	w26, w1
-	bls	.L274
+	bls	.L272
 	mov	x19, x20
 	add	x21, x20, x21
 	adrp	x22, .LC6
@@ -2077,10 +2071,10 @@ FlashEraseBlocks:
 	add	x22, x22, :lo12:.LC6
 	add	x20, x20, :lo12:.LANCHOR77
 	mov	w23, -1
-.L275:
+.L273:
 	cmp	x19, x21
-	bne	.L276
-.L287:
+	bne	.L274
+.L285:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2089,7 +2083,7 @@ FlashEraseBlocks:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L276:
+.L274:
 	ldr	w2, [x29, 108]
 	mov	x1, x20
 	str	w23, [x19]
@@ -2108,34 +2102,34 @@ FlashEraseBlocks:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-	b	.L275
-.L274:
+	b	.L273
+.L272:
 	add	x1, x25, :lo12:.LANCHOR78
 	ldr	x2, [x1, 8]
 	ldr	w1, [x29, 108]
 	blr	x2
-	cbnz	w0, .L277
+	cbnz	w0, .L275
 	str	wzr, [x19, -4]
-.L278:
+.L276:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L280
+	bne	.L278
 	ldrb	w0, [x29, 104]
 	ldr	x2, [x27, 8]
 	ldr	w1, [x29, 108]
 	add	w1, w24, w1
 	blr	x2
-	cbz	w0, .L280
+	cbz	w0, .L278
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L280:
+.L278:
 	add	x19, x19, 32
-	b	.L273
-.L277:
+	b	.L271
+.L275:
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L278
+	b	.L276
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -2150,15 +2144,15 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L289
+	bcc	.L287
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L289
+	beq	.L287
 	and	w1, w1, 65535
-	cbz	w1, .L291
+	cbz	w1, .L289
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
@@ -2169,9 +2163,9 @@ FtlFreeSysBlkQueueIn:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR47
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	ldr	x2, [x1, #:lo12:.LANCHOR47]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
@@ -2179,7 +2173,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L291:
+.L289:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -2190,7 +2184,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L289:
+.L287:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2208,7 +2202,7 @@ FtlFreeSysBlkQueueOut:
 	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	cbz	w2, .L303
+	cbz	w2, .L301
 	ldrh	w0, [x1, 2]
 	sub	w2, w2, #1
 	strh	w2, [x1, 6]
@@ -2228,23 +2222,23 @@ FtlFreeSysBlkQueueOut:
 	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR80]
-.L300:
+.L298:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L301
+	bcs	.L299
 	add	x0, x19, :lo12:.LANCHOR38
 	mov	w1, w20
 	ldrh	w2, [x0, 6]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L302:
-	b	.L302
-.L303:
-	mov	w20, 65535
+.L300:
 	b	.L300
 .L301:
+	mov	w20, 65535
+	b	.L298
+.L299:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2263,27 +2257,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L306:
+.L304:
 	cmp	w20, w1
-	beq	.L310
+	beq	.L308
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L307
+	cbnz	w2, .L305
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L308
+	bcs	.L306
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L309:
-	b	.L309
-.L308:
+.L307:
+	b	.L307
+.L306:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -2292,26 +2286,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L310:
+.L308:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L312
+	bhi	.L310
 	adrp	x1, .LANCHOR81
 	adrp	x0, .LC1
 	mov	w2, 578
 	add	x1, x1, :lo12:.LANCHOR81
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L312:
+.L310:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L307:
+.L305:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L306
+	b	.L304
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -2511,9 +2505,9 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR118
 	str	x0, [x1, #:lo12:.LANCHOR118]
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR47
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR43]
+	str	x0, [x1, #:lo12:.LANCHOR47]
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
@@ -2609,36 +2603,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L316:
+.L314:
 	cmp	w0, w7
-	bcc	.L317
+	bcc	.L315
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
 	mov	x3, 0
-.L318:
+.L316:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L319
+	bne	.L317
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L317:
+.L315:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L316
-.L319:
+	b	.L314
+.L317:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L318
+	b	.L316
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -2664,19 +2658,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L324:
+.L322:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L321
+	beq	.L319
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L323
+	bhi	.L321
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L323:
+.L321:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -2687,8 +2681,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L324
-.L321:
+	bne	.L322
+.L319:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2751,10 +2745,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L332:
+.L330:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L336
+	bhi	.L334
 	adrp	x0, .LANCHOR20
 	mov	w23, 0
 	mov	w20, 0
@@ -2762,10 +2756,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L337:
+.L335:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L341
+	bhi	.L339
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -2773,64 +2767,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L336:
+.L334:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L333:
+.L331:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L335
+	bhi	.L333
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L332
-.L335:
+	b	.L330
+.L333:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L334
-	cbz	w2, .L334
+	bne	.L332
+	cbz	w2, .L332
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L334:
+.L332:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L333
-.L341:
+	b	.L331
+.L339:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L338
+	bls	.L336
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L339
-.L340:
+	cbnz	w0, .L337
+.L338:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L337
-.L338:
-	cbnz	w1, .L340
+	b	.L335
+.L336:
+	cbnz	w1, .L338
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L340
-.L342:
+	cbz	w0, .L338
+.L340:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L340
-.L343:
+	b	.L338
+.L341:
 	mov	w24, 0
-	b	.L342
-.L339:
+	b	.L340
+.L337:
 	mov	w23, w20
-	cbz	w1, .L343
+	cbz	w1, .L341
 	mov	w24, w1
-	b	.L340
+	b	.L338
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -2866,10 +2860,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.L353:
+.L351:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L354
+	bne	.L352
 	adrp	x1, .LANCHOR129
 	add	x0, x1, :lo12:.LANCHOR129
 	ldp	x21, x22, [sp, 32]
@@ -2900,7 +2894,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L354:
+.L352:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -2908,7 +2902,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L353
+	b	.L351
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -2938,10 +2932,10 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR47
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR117
@@ -2981,7 +2975,7 @@ SupperBlkListInit:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR40
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR45
+	adrp	x23, .LANCHOR44
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR48
 	mul	w2, w2, w0
@@ -2994,44 +2988,44 @@ SupperBlkListInit:
 	add	x26, x26, :lo12:.LANCHOR13
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR47
+	adrp	x0, .LANCHOR46
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	str	xzr, [x0, #:lo12:.LANCHOR47]
+	strh	wzr, [x23, #:lo12:.LANCHOR44]
+	str	xzr, [x0, #:lo12:.LANCHOR46]
 	adrp	x0, .LANCHOR41
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
 	adrp	x27, .LANCHOR3
 	str	xzr, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR44
-	str	xzr, [x0, #:lo12:.LANCHOR44]
-.L359:
+	adrp	x0, .LANCHOR43
+	str	xzr, [x0, #:lo12:.LANCHOR43]
+.L357:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L366
+	bcs	.L364
 	adrp	x0, .LANCHOR19
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L367
-.L361:
+	b	.L365
+.L359:
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L360
+	cbnz	w0, .L358
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L360:
+.L358:
 	add	x6, x6, 1
-.L367:
+.L365:
 	cmp	w8, w6, uxth
-	bhi	.L361
-	cbz	w5, .L362
+	bhi	.L359
+	cbz	w5, .L360
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L363:
+.L361:
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
@@ -3039,54 +3033,54 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L364
+	beq	.L362
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L364
+	beq	.L362
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L364
+	beq	.L362
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L365
+	cbnz	w0, .L363
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L364:
+.L362:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L359
-.L362:
+	b	.L357
+.L360:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	b	.L363
-.L365:
+	b	.L361
+.L363:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L364
-.L366:
-	strh	w20, [x23, #:lo12:.LANCHOR45]
+	b	.L362
+.L364:
+	strh	w20, [x23, #:lo12:.LANCHOR44]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	cmp	w20, w0
-	ble	.L368
+	ble	.L366
 	adrp	x1, .LANCHOR136
 	adrp	x0, .LC1
-	mov	w2, 2216
+	mov	w2, 2210
 	add	x1, x1, :lo12:.LANCHOR136
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L368:
+.L366:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -3146,31 +3140,31 @@ FlashGetBadBlockList:
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L373
+	bls	.L371
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, 0
-.L373:
+.L371:
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L377
+	bne	.L375
 	mov	x1, 0
-.L375:
+.L373:
 	cmp	w0, w1, uxth
-	bhi	.L376
-.L377:
+	bhi	.L374
+.L375:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L376:
+.L374:
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L375
+	b	.L373
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -3202,7 +3196,7 @@ FlashReadPages:
 	add	x24, x24, :lo12:.LANCHOR137
 	adrp	x25, .LC1
 	add	x25, x25, :lo12:.LC1
-.L381:
+.L379:
 	cmp	x23, x19
 	bne	.L392
 	ldp	x19, x20, [sp, 16]
@@ -3215,34 +3209,34 @@ FlashReadPages:
 	ret
 .L392:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L382
+	cbz	x0, .L380
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L383
-.L382:
+	cbnz	x0, .L381
+.L380:
 	mov	w2, 90
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L383:
+.L381:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
 	cmp	w0, 3
-	bls	.L384
+	bls	.L382
 	mov	w0, -1
 	str	w0, [x19]
-.L385:
+.L383:
 	add	x19, x19, 32
-	b	.L381
-.L384:
+	b	.L379
+.L382:
 	ldr	x20, [x19, 8]
 	adrp	x26, .LANCHOR111
 	tst	x20, 63
-	beq	.L386
+	beq	.L384
 	ldr	x20, [x26, #:lo12:.LANCHOR111]
-.L386:
+.L384:
 	adrp	x22, .LANCHOR78
 	add	x22, x22, :lo12:.LANCHOR78
 	ldr	w1, [x29, 108]
@@ -3254,7 +3248,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L388
+	bne	.L386
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -3264,40 +3258,65 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L389
+	beq	.L387
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L390
+	bne	.L388
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L390
+	bne	.L388
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L390
-.L389:
+	beq	.L388
+.L387:
 	mov	w1, -1
 	str	w1, [x19]
-.L390:
+.L388:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L388
+	beq	.L389
 	cmp	w0, 256
-	bne	.L388
+	bne	.L389
 	str	w0, [x19]
-.L388:
+.L389:
+	ldr	w3, [x19]
+	cmp	w3, 256
+	ccmn	w3, #1, 4, ne
+	bne	.L386
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC11
+	ldr	w2, [x29, 108]
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+	ldr	x1, [x19, 8]
+	cbz	x1, .L391
+	mov	w3, 4
+	adrp	x0, .LC12
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC12
+	bl	rknand_print_hex
+.L391:
+	ldr	x1, [x19, 16]
+	cbz	x1, .L386
+	mov	w3, 4
+	adrp	x0, .LC13
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC13
+	bl	rknand_print_hex
+.L386:
 	ldr	x0, [x26, #:lo12:.LANCHOR111]
 	cmp	x20, x0
-	bne	.L385
+	bne	.L383
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L385
+	beq	.L383
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L385
+	b	.L383
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -3329,10 +3348,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L410:
+.L419:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L415
+	bcc	.L424
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3341,18 +3360,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L415:
+.L424:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	add	x24, x22, :lo12:.LANCHOR138
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L411:
+.L420:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L413
+	bgt	.L422
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -3364,19 +3383,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L412
+	beq	.L421
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L412
+	bne	.L421
 	strh	w19, [x20]
-.L413:
+.L422:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L410
-.L412:
+	b	.L419
+.L421:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L411
+	b	.L420
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -3390,10 +3409,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L421
+	bne	.L430
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L422:
+.L431:
 	adrp	x1, .LANCHOR112
 	sub	w19, w19, #1
 	sxth	w19, w19
@@ -3410,24 +3429,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L423
+	bne	.L432
 	mov	w22, 0
 	mov	w24, 2
-.L424:
+.L433:
 	cmp	w22, w19
-	ble	.L427
-.L423:
+	ble	.L436
+.L432:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L421:
+.L430:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L422
-.L427:
+	b	.L431
+.L436:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -3439,20 +3458,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L425
+	bne	.L434
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L425
+	bne	.L434
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L425
+	beq	.L434
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L424
-.L425:
+	b	.L433
+.L434:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L424
+	b	.L433
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -3512,12 +3531,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR82
 	str	x0, [x29, 112]
-.L433:
+.L442:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L473
+	bls	.L482
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR103
 	adrp	x6, .LANCHOR13
@@ -3532,14 +3551,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L474
-.L435:
+	b	.L483
+.L444:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L434
+	cbnz	w0, .L443
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -3550,19 +3569,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L434:
+.L443:
 	add	x5, x5, 1
-.L474:
+.L483:
 	cmp	w12, w5, uxth
-	bhi	.L435
-	cbnz	w22, .L436
-.L472:
+	bhi	.L444
+	cbnz	w22, .L445
+.L481:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L433
-.L436:
+	b	.L442
+.L445:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -3573,7 +3592,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 136]
-.L471:
+.L480:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -3581,10 +3600,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L439
+	bne	.L448
 	mov	w5, 16
 	mov	w7, 65535
-.L441:
+.L450:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x6, x25, :lo12:.LANCHOR103
 	mov	w2, 1
@@ -3602,78 +3621,78 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L438
+	bne	.L447
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L439
-.L440:
+	bne	.L448
+.L449:
 	mov	w1, 1
-	b	.L510
-.L438:
+	b	.L519
+.L447:
 	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L439
+	bne	.L448
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L441
-	b	.L440
-.L439:
+	bne	.L450
+	b	.L449
+.L448:
 	adrp	x0, .LANCHOR82
 	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L442
+	beq	.L451
 	cmp	w1, w0
-	bhi	.L443
-.L442:
+	bhi	.L452
+.L451:
 	cmn	w0, #1
-	beq	.L443
+	beq	.L452
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L443:
+.L452:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L445
-	bhi	.L446
+	beq	.L454
+	bhi	.L455
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L447
-.L444:
+	beq	.L456
+.L453:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L471
-	b	.L472
-.L446:
+	bne	.L480
+	b	.L481
+.L455:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L448
+	beq	.L457
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L444
+	bne	.L453
 	mov	w1, 0
-.L510:
+.L519:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L444
-.L448:
+	b	.L453
+.L457:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L450
+	bls	.L459
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1225
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L450:
+.L459:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
@@ -3684,53 +3703,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR125]
 	sxth	w2, w2
-.L451:
+.L460:
 	cmp	w0, w2
-	bgt	.L457
-	tbz	w0, #31, .L491
-	b	.L444
-.L457:
+	bgt	.L466
+	tbz	w0, #31, .L500
+	b	.L453
+.L466:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L452
+	bls	.L461
 	ldr	w2, [x5]
-	cbnz	w2, .L453
+	cbnz	w2, .L462
 	cmp	w6, w1
-	beq	.L453
+	beq	.L462
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
-.L453:
+.L462:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 0
-.L454:
+.L463:
 	cmp	w1, w0
-	bne	.L455
+	bne	.L464
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L444
+	tbnz	w0, #31, .L453
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L444
-.L491:
+	bgt	.L453
+.L500:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR119]
-.L509:
+.L518:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L444
-.L455:
+	b	.L453
+.L464:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -3742,22 +3761,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L454
-.L452:
+	b	.L463
+.L461:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L451
-.L447:
+	b	.L460
+.L456:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L460
+	bls	.L469
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1266
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L460:
+.L469:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -3765,46 +3784,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR122]
-.L461:
+.L470:
 	cmp	w0, w5
-	ble	.L466
+	ble	.L475
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L462
+	bls	.L471
 	ldr	w5, [x1]
-	cbnz	w5, .L463
+	cbnz	w5, .L472
 	cmp	w6, w2
-	beq	.L463
+	beq	.L472
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L463:
+.L472:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L464:
+.L473:
 	cmp	w2, w0
-	bne	.L465
+	bne	.L474
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L466:
-	tbnz	w0, #31, .L444
+.L475:
+	tbnz	w0, #31, .L453
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L444
+	bgt	.L453
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L509
-.L465:
+	b	.L518
+.L474:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -3816,61 +3835,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L464
-.L462:
+	b	.L473
+.L471:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L461
-.L445:
+	b	.L470
+.L454:
 	ldrh	w5, [x24, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR139
 	cmp	w5, w1
-	bne	.L468
+	bne	.L477
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w0, [x2, 8]
-	b	.L444
-.L468:
+	b	.L453
+.L477:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L469
+	beq	.L478
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L469:
+.L478:
 	add	x0, x24, :lo12:.LANCHOR139
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L470
+	bcs	.L479
 	ldrh	w2, [x24, #:lo12:.LANCHOR139]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w1, [x0, 8]
-	b	.L444
-.L470:
+	b	.L453
+.L479:
 	strh	w26, [x0, 4]
-	b	.L444
-.L473:
+	b	.L453
+.L482:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR119]
 	ldrh	w0, [x2]
-	cbz	w0, .L475
-.L478:
+	cbz	w0, .L484
+.L487:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L476
-.L477:
+	cbz	w0, .L485
+.L486:
 	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L507
+	bls	.L516
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
 	mov	w2, 1391
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L507:
+.L516:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3879,24 +3898,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L475:
+.L484:
 	ldrh	w0, [x20, #:lo12:.LANCHOR130]
-	cbz	w0, .L478
+	cbz	w0, .L487
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L479:
+.L488:
 	cmp	w0, w1
-	bcs	.L478
+	bcs	.L487
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L480
+	cbz	w3, .L489
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR125]
 	mov	w1, w0
-.L481:
+.L490:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L478
+	bcs	.L487
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -3908,29 +3927,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L481
-.L480:
+	b	.L490
+.L489:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L479
-.L476:
+	b	.L488
+.L485:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L477
+	cbz	w0, .L486
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L486:
+.L495:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L477
+	bge	.L486
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L487
+	cbz	w3, .L496
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR122]
-.L488:
+.L497:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L477
+	bge	.L486
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -3942,11 +3961,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L488
-.L487:
+	b	.L497
+.L496:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L486
+	b	.L495
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -3974,11 +3993,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L512:
+.L521:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L515
+	bgt	.L524
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -3987,7 +4006,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L513
+	bne	.L522
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -3995,13 +4014,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L513:
+.L522:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L514
+	beq	.L523
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L514
+	bne	.L523
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -4009,16 +4028,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L515:
+.L524:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L529
+	beq	.L538
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L519
+	beq	.L528
 	add	x0, x22, :lo12:.LANCHOR138
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -4027,21 +4046,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L519
+	beq	.L528
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L519
+	bne	.L528
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L519
+	bls	.L528
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L519:
+.L528:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -4051,35 +4070,35 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR138
-.L521:
-	tbz	w20, #31, .L524
+.L530:
+	tbz	w20, #31, .L533
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
-	mov	w2, 253
+	mov	w2, 251
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L523:
+.L532:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L526
+	beq	.L535
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L526
+	beq	.L535
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L526
+	bcs	.L535
 	cmp	w0, w1
-	bcs	.L526
+	bcs	.L535
 	bl	FtlSysBlkNumInit
-.L526:
+.L535:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
 	adrp	x23, .LANCHOR127
@@ -4088,23 +4107,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR127
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w20, 0
-.L527:
+.L536:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L528
+	bcc	.L537
 	mov	w0, 0
-.L511:
+.L520:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L514:
+.L523:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L512
-.L524:
+	b	.L521
+.L533:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
@@ -4116,15 +4135,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L522
+	beq	.L531
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L523
-.L522:
+	beq	.L532
+.L531:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L521
-.L528:
+	b	.L530
+.L537:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -4133,10 +4152,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L527
-.L529:
+	b	.L536
+.L538:
 	mov	w0, -1
-	b	.L511
+	b	.L520
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -4163,18 +4182,18 @@ FlashProgPages:
 	mov	x25, x0
 	add	x28, x24, :lo12:.LANCHOR78
 	lsl	w27, w23, 3
-.L542:
+.L551:
 	cmp	x25, x20
-	bne	.L555
+	bne	.L564
 	ldr	w0, [x29, 104]
-	cbz	w0, .L568
+	cbz	w0, .L578
 	adrp	x21, .LANCHOR111
 	adrp	x22, .LANCHOR113
 	mov	x23, x21
 	mov	x24, x22
-.L557:
+.L566:
 	cmp	x19, x20
-	beq	.L568
+	beq	.L578
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	x0, [x22, #:lo12:.LANCHOR113]
 	str	wzr, [x1]
@@ -4188,78 +4207,87 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L558
+	bne	.L567
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
 	bl	printf
 	str	w26, [x19]
-.L558:
+.L567:
+	ldr	w26, [x29, 128]
+	cmp	w26, 256
+	bne	.L568
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+	str	w26, [x19]
+.L568:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L559
+	cbz	x0, .L569
 	ldr	w2, [x0]
 	ldr	x0, [x24, #:lo12:.LANCHOR113]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L559
+	beq	.L569
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L559:
+.L569:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L560
+	cbz	x0, .L570
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR111]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L560
+	beq	.L570
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC13
-	add	x0, x0, :lo12:.LC13
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L560:
+.L570:
 	add	x19, x19, 32
-	b	.L557
-.L555:
+	b	.L566
+.L564:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L543
+	cbz	x0, .L552
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L544
-.L543:
+	cbnz	x0, .L553
+.L552:
 	adrp	x0, .LC1
-	mov	w2, 134
+	mov	w2, 142
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L544:
+.L553:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
 	cmp	w0, 3
-	bls	.L545
-.L581:
+	bls	.L554
+.L591:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L546
-.L545:
-	cbnz	w0, .L547
+	b	.L555
+.L554:
+	cbnz	w0, .L556
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L547
+	bls	.L556
 	adrp	x21, .LANCHOR142
 	adrp	x22, .LC6
 	mov	w23, -1
 	add	x21, x21, :lo12:.LANCHOR142
 	add	x22, x22, :lo12:.LC6
-	b	.L579
-.L549:
+	b	.L589
+.L558:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -4278,10 +4306,10 @@ FlashProgPages:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-.L579:
+.L589:
 	cmp	x19, x20
-	bne	.L549
-.L568:
+	bne	.L558
+.L578:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4290,20 +4318,20 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L547:
+.L556:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L562
+	beq	.L572
 	adrp	x0, .LANCHOR111
 	ldr	x26, [x0, #:lo12:.LANCHOR111]
 	cmp	x1, x26
-	beq	.L550
+	beq	.L559
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L550:
+.L559:
 	add	x0, x24, :lo12:.LANCHOR78
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
@@ -4311,13 +4339,13 @@ FlashProgPages:
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L551
+	cbnz	w0, .L560
 	str	wzr, [x25]
-.L552:
+.L561:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L546
+	bne	.L555
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -4326,17 +4354,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbnz	w0, .L581
-.L546:
+	cbnz	w0, .L591
+.L555:
 	add	x25, x25, 32
-	b	.L542
-.L562:
+	b	.L551
+.L572:
 	mov	x26, x1
-	b	.L550
-.L551:
+	b	.L559
+.L560:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L552
+	b	.L561
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -4370,43 +4398,43 @@ FtlLowFormatEraseBlock:
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L583:
+.L593:
 	cmp	w8, w5, uxth
-	bhi	.L587
-	cbz	w24, .L582
+	bhi	.L597
+	cbz	w24, .L592
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L591:
+.L601:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L590
+	bne	.L600
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L590:
+.L600:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L591
-	cbz	w22, .L604
+	bne	.L601
+	cbz	w22, .L614
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L592:
+.L602:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L600:
+.L610:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR79]
@@ -4417,10 +4445,10 @@ FtlLowFormatEraseBlock:
 	ldr	x8, [x0, #:lo12:.LANCHOR109]
 	ldr	x0, [x29, 112]
 	ldr	x10, [x0, #:lo12:.LANCHOR110]
-.L593:
+.L603:
 	cmp	w7, w5, uxth
-	bhi	.L596
-	cbz	w20, .L582
+	bhi	.L606
+	cbz	w20, .L592
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -4428,11 +4456,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L599:
+.L609:
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L598
+	cbz	w0, .L608
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -4440,36 +4468,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L598:
+.L608:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L599
+	bne	.L609
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L600
+	bhi	.L610
 	mov	x24, 0
-.L602:
-	cbz	w22, .L601
+.L612:
+	cbz	w22, .L611
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L601
+	cbnz	w0, .L611
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L601:
+.L611:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L602
+	bne	.L612
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L582
+	beq	.L592
 	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L582:
+.L592:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4478,7 +4506,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L587:
+.L597:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4486,13 +4514,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L584
+	cbz	w22, .L594
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L585
-.L584:
+	cbnz	w0, .L595
+.L594:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L586
+	cbnz	w0, .L596
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -4503,18 +4531,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L585:
+.L595:
 	add	x5, x5, 1
-	b	.L583
-.L586:
+	b	.L593
+.L596:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L585
-.L604:
+	b	.L595
+.L614:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L592
-.L596:
+	b	.L602
+.L606:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -4523,13 +4551,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L594
+	cbz	w22, .L604
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L595
-.L594:
+	cbnz	w0, .L605
+.L604:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L595
+	cbnz	w0, .L605
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -4540,9 +4568,9 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L595:
+.L605:
 	add	x5, x5, 1
-	b	.L593
+	b	.L603
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -4554,7 +4582,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L628
+	bls	.L638
 	adrp	x20, .LANCHOR112
 	mov	w2, 32
 	mov	w1, 165
@@ -4579,7 +4607,7 @@ FlashTestBlk:
 	mov	w1, w3
 	bl	FlashProgPages
 	ldr	w0, [x29, 32]
-	cbnz	w0, .L629
+	cbnz	w0, .L639
 	add	w0, w19, 1
 	mov	w3, 1
 	str	w0, [x29, 36]
@@ -4590,23 +4618,23 @@ FlashTestBlk:
 	ldr	w0, [x29, 32]
 	cmp	w0, 0
 	csetm	w20, ne
-.L627:
+.L637:
 	mov	w2, 1
 	mov	w1, 0
 	add	x0, x29, 32
 	str	w19, [x29, 36]
 	bl	FlashEraseBlocks
-.L625:
+.L635:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L629:
+.L639:
 	mov	w20, -1
-	b	.L627
-.L628:
+	b	.L637
+.L638:
 	mov	w20, 0
-	b	.L625
+	b	.L635
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -4639,20 +4667,20 @@ FtlBbmTblFlush:
 	add	x27, x27, :lo12:.LANCHOR127
 	mov	w1, 0
 	bl	ftl_memset
-.L632:
+.L642:
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L633
+	blt	.L643
 	add	x20, x20, :lo12:.LANCHOR138
 	add	x19, x21, :lo12:.LANCHOR37
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x24, .LC14
+	adrp	x25, .LC18
 	adrp	x26, .LANCHOR20
 	ldr	x27, [x20, 16]
-	add	x24, x24, :lo12:.LC14
+	add	x25, x25, :lo12:.LC18
 	add	x26, x26, :lo12:.LANCHOR20
-	mov	w25, 0
+	mov	w24, 0
 	mov	x0, x27
 	bl	ftl_memset
 	mov	w0, -3887
@@ -4669,7 +4697,10 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.L634:
+	adrp	x0, .LANCHOR143
+	ldr	w0, [x0, #:lo12:.LANCHOR143]
+	strh	w0, [x27, 14]
+.L644:
 	ldrh	w1, [x19]
 	ldrh	w4, [x27, 10]
 	ldrh	w2, [x19, 2]
@@ -4681,13 +4712,13 @@ FtlBbmTblFlush:
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x20]
 	str	w0, [x20, 4]
-	mov	x0, x24
+	mov	x0, x25
 	bl	printf
 	ldrh	w0, [x26]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L635
+	blt	.L645
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -4706,7 +4737,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L635:
+.L645:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -4717,23 +4748,23 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L636
+	bne	.L646
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC15
+	adrp	x0, .LC19
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC15
+	add	x0, x0, :lo12:.LC19
 	bl	printf
 	cmp	w21, 3
-	bls	.L634
+	bls	.L644
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC16
+	adrp	x0, .LC20
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC20
 	bl	printf
-.L638:
-	b	.L638
-.L633:
+.L648:
+	b	.L648
+.L643:
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x19, 8]
@@ -4742,12 +4773,13 @@ FtlBbmTblFlush:
 	add	w24, w24, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L632
-.L639:
-	mov	w25, 1
-	b	.L634
-.L636:
-	cbz	w25, .L639
+	b	.L642
+.L646:
+	add	w24, w24, 1
+	cmp	w24, 1
+	beq	.L644
+	cmp	w0, 256
+	beq	.L644
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4769,13 +4801,13 @@ allocate_data_superblock:
 	stp	x23, x24, [sp, 48]
 	add	x24, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR45
+	adrp	x27, .LANCHOR44
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	add	x0, x27, :lo12:.LANCHOR45
+	add	x0, x27, :lo12:.LANCHOR44
 	stp	x25, x26, [sp, 64]
 	str	x0, [x29, 104]
-.L642:
+.L657:
 	ldr	x1, [x29, 104]
 	adrp	x23, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -4783,18 +4815,18 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L643
-	adrp	x1, .LANCHOR143
+	ble	.L658
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2661
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2656
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L643:
+.L658:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L669
+	bne	.L684
 	adrp	x1, .LANCHOR95
 	ldrh	w0, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR95]
@@ -4803,74 +4835,74 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L644
+	beq	.L659
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L644:
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
+.L659:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x24]
-	cbnz	w0, .L645
-	adrp	x1, .LANCHOR143
+	cbnz	w0, .L660
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2670
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2665
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L645:
+.L660:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	strh	w0, [x24]
 	ldrh	w0, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w22
-	bls	.L642
+	bls	.L657
 	adrp	x25, .LANCHOR42
 	ubfiz	x20, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w21, [x0, x20]
-	cbnz	w21, .L642
+	cbnz	w21, .L657
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L647
+	cbnz	w0, .L662
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x20]
 	mov	w0, w22
 	bl	INSERT_DATA_LIST
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w1, [x27, #:lo12:.LANCHOR44]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L642
-	mov	w2, 2684
-	adrp	x1, .LANCHOR143
+	ble	.L657
+	mov	w2, 2679
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L642
-.L669:
+	b	.L657
+.L684:
 	mov	w1, 0
-	b	.L644
-.L647:
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	b	.L659
+.L662:
+	ldrh	w1, [x27, #:lo12:.LANCHOR44]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L649
-	adrp	x1, .LANCHOR143
+	ble	.L664
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2687
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2682
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L649:
+.L664:
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR79
 	add	x26, x19, 16
@@ -4882,40 +4914,40 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L650:
+.L665:
 	cmp	x0, x1
-	bne	.L652
-	cbnz	w21, .L653
-	adrp	x1, .LANCHOR143
+	bne	.L667
+	cbnz	w21, .L668
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2698
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2693
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L653:
-	adrp	x0, .LANCHOR144
-	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+.L668:
+	adrp	x0, .LANCHOR145
+	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w22
-	bne	.L654
-	adrp	x1, .LANCHOR143
+	bne	.L669
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2700
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2695
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L654:
+.L669:
 	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR43
+	adrp	x6, .LANCHOR47
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR90
 	adrp	x4, .LANCHOR91
-	ldr	x1, [x6, #:lo12:.LANCHOR43]
-	cbnz	w0, .L655
+	ldr	x1, [x6, #:lo12:.LANCHOR47]
+	cbnz	w0, .L670
 	ldrh	w0, [x1, x20]
-	cbz	w0, .L656
+	cbz	w0, .L671
 	ldrh	w2, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w2
-.L680:
+.L695:
 	strh	w0, [x1, x20]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR90]
@@ -4923,23 +4955,23 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR90]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L658:
-	ldr	x0, [x6, #:lo12:.LANCHOR43]
+.L673:
+	ldr	x0, [x6, #:lo12:.LANCHOR47]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR92
 	ldr	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w2
-	bls	.L659
+	bls	.L674
 	str	w1, [x0, #:lo12:.LANCHOR92]
-.L659:
+.L674:
 	ldr	w2, [x5, #:lo12:.LANCHOR90]
 	ldr	w1, [x4, #:lo12:.LANCHOR91]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR145
-	str	w0, [x1, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR143
+	str	w0, [x1, #:lo12:.LANCHOR143]
 	adrp	x0, .LANCHOR118
 	ldr	x1, [x0, #:lo12:.LANCHOR118]
 	ldr	w0, [x1, 16]
@@ -4950,48 +4982,48 @@ allocate_data_superblock:
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L660:
+.L675:
 	cmp	x1, x2
-	bne	.L661
+	bne	.L676
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
 	mov	x23, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L662:
+.L677:
 	cmp	w21, w23, uxth
-	bhi	.L664
-	cbz	w1, .L665
+	bhi	.L679
+	cbz	w1, .L680
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L665:
+.L680:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L666
+	cbnz	w0, .L681
 	adrp	x0, .LANCHOR42
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x20]
-	b	.L642
-.L652:
+	b	.L657
+.L667:
 	ldrh	w2, [x4]
 	stp	xzr, xzr, [x1]
 	cmp	w2, w6
-	beq	.L651
+	beq	.L666
 	ubfiz	x5, x21, 5, 16
 	add	w21, w21, 1
 	add	x5, x3, x5
 	and	w21, w21, 65535
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L651:
+.L666:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L650
-.L656:
+	b	.L665
+.L671:
 	mov	w0, 2
-	b	.L680
-.L655:
+	b	.L695
+.L670:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
@@ -5000,19 +5032,19 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR91]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.6
-	b	.L658
-.L661:
+	b	.L673
+.L676:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L660
-.L664:
+	b	.L675
+.L679:
 	ldr	x2, [x25, #:lo12:.LANCHOR79]
 	lsl	x0, x23, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L663
+	bne	.L678
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 96]
@@ -5023,11 +5055,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L663:
+.L678:
 	add	x23, x23, 1
 	add	x26, x26, 2
-	b	.L662
-.L666:
+	b	.L677
+.L681:
 	adrp	x1, .LANCHOR19
 	adrp	x2, .LANCHOR82
 	strh	wzr, [x19, 2]
@@ -5045,17 +5077,17 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w0, [x1, x20]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L667
+	cbz	w0, .L682
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L668
-.L667:
-	adrp	x1, .LANCHOR143
+	cbnz	w0, .L683
+.L682:
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC1
-	mov	w2, 2753
-	add	x1, x1, :lo12:.LANCHOR143
+	mov	w2, 2748
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L668:
+.L683:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5080,17 +5112,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L682
+	cbz	w0, .L697
 	adrp	x23, .LANCHOR75
 	add	x24, x23, :lo12:.LANCHOR75
 	mov	w19, 0
-.L683:
+.L698:
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L689
+	bhi	.L704
 	bl	FtlGcReFreshBadBlk
-.L682:
+.L697:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5099,7 +5131,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L689:
+.L704:
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
@@ -5108,19 +5140,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L684:
+.L699:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L688
+	bhi	.L703
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L683
-.L688:
+	b	.L698
+.L703:
 	add	x0, x23, :lo12:.LANCHOR75
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L685
+	bne	.L700
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -5128,22 +5160,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L686:
+.L701:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L687
+	bhi	.L702
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L685:
+.L700:
 	and	w20, w27, 65535
-	b	.L684
-.L687:
+	b	.L699
+.L702:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L686
+	b	.L701
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -5158,75 +5190,89 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L695
-	adrp	x0, .LANCHOR144
-	ldrh	w1, [x0, #:lo12:.LANCHOR144]
+	cbnz	w0, .L710
+	adrp	x0, .LANCHOR72
+	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w19
-	bne	.L696
+	bne	.L711
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR144]
-.L697:
-	adrp	x20, .LANCHOR45
+	strh	w1, [x0, #:lo12:.LANCHOR72]
+.L711:
+	adrp	x0, .LANCHOR73
+	ldrh	w1, [x0, #:lo12:.LANCHOR73]
+	cmp	w1, w19
+	bne	.L712
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR73]
+.L712:
+	adrp	x0, .LANCHOR145
+	ldrh	w1, [x0, #:lo12:.LANCHOR145]
+	cmp	w1, w19
+	bne	.L713
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR145]
+.L714:
+	adrp	x20, .LANCHOR44
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L699
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
+	cbnz	w0, .L716
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 2823
+	mov	w2, 2824
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L699:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+.L716:
+	ldrh	w0, [x20, #:lo12:.LANCHOR44]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
+	strh	w0, [x20, #:lo12:.LANCHOR44]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
 	adrp	x0, .LANCHOR48
-	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w1, [x20, #:lo12:.LANCHOR44]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w1
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L703
+	ble	.L720
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 2826
+	mov	w2, 2827
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L703:
+.L720:
 	mov	w0, 1
-	b	.L694
-.L696:
+	b	.L709
+.L713:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L702
+	beq	.L719
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L702
+	beq	.L719
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L697
-.L702:
+	bne	.L714
+.L719:
 	mov	w0, 0
-.L694:
+.L709:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L695:
+.L710:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L702
+	b	.L719
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -5240,50 +5286,50 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L706
+	beq	.L723
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L707
+	cbnz	w0, .L724
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC17
-	add	x0, x0, :lo12:.LC17
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L708
-.L713:
+	cbz	w0, .L725
+.L730:
 	mov	w20, 0
-.L705:
+.L722:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L708:
-	mov	w2, 2841
+.L725:
+	mov	w2, 2842
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L713
-.L707:
+	b	.L730
+.L724:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L706:
+.L723:
 	adrp	x21, .LANCHOR131
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR131]
 	cmp	w0, w1
-	bne	.L710
+	bne	.L727
 	strh	w19, [x21, #:lo12:.LANCHOR131]
-	b	.L713
-.L710:
+	b	.L730
+.L727:
 	cmp	w19, w0
-	beq	.L713
+	beq	.L730
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR40
@@ -5301,16 +5347,16 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L705
+	cbnz	w1, .L722
 	cmp	w19, w0, uxth
-	beq	.L705
-	mov	w2, 2857
+	beq	.L722
+	mov	w2, 2858
 	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L705
+	b	.L722
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -5347,10 +5393,10 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L720:
+.L737:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L716
-.L717:
+	cbnz	w0, .L733
+.L734:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -5368,12 +5414,12 @@ FtlSuperblockPowerLostFix:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 80
 	ret
-.L716:
+.L733:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 52]
 	cmn	w0, #1
-	beq	.L717
+	beq	.L734
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -5388,8 +5434,8 @@ FtlSuperblockPowerLostFix:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	subs	w20, w20, #1
-	bne	.L720
-	b	.L717
+	bne	.L737
+	b	.L734
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -5415,42 +5461,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L729:
+.L746:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L735
+	bcc	.L752
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L736:
+.L753:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L737
+	bhi	.L754
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L738:
+.L755:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L742
+	bgt	.L759
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L739
+	beq	.L756
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L740
+	cbz	w0, .L757
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L739:
+.L756:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L738
-.L735:
+	b	.L755
+.L752:
 	adrp	x2, .LANCHOR114
 	adrp	x0, .LANCHOR106
 	add	x19, x28, :lo12:.LANCHOR138
@@ -5462,7 +5508,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L730
+	beq	.L747
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -5477,14 +5523,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L731:
+.L748:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L729
-.L730:
+	b	.L746
+.L747:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -5497,12 +5543,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR127
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L732:
+.L749:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L733
+	beq	.L750
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -5540,29 +5586,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L731
+	bne	.L748
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L732
-.L733:
+	b	.L749
+.L750:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L732
-.L737:
+	b	.L749
+.L754:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L736
-.L740:
+	b	.L753
+.L757:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L741
+	bne	.L758
 	strh	w19, [x21]
-	b	.L739
-.L741:
+	b	.L756
+.L758:
 	strh	w19, [x21, 4]
-.L742:
+.L759:
 	adrp	x0, .LANCHOR79
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -5617,18 +5663,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L750:
+.L767:
 	cmp	w1, w3
-	bhi	.L751
+	bhi	.L768
 	ret
-.L751:
+.L768:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L750
+	b	.L767
 	.size	js_hash, .-js_hash
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -5645,16 +5691,16 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w0, [x0]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bne	.L753
+	bne	.L770
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L754
+	cbz	w0, .L771
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L754:
+.L771:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -5665,14 +5711,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L755:
+.L772:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L753:
+.L770:
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR114
 	adrp	x24, .LANCHOR106
@@ -5703,9 +5749,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x0, 0
 	ldr	x3, [x24, #:lo12:.LANCHOR106]
 	mov	w1, 0
-.L756:
+.L773:
 	cmp	w4, w0, uxth
-	bhi	.L758
+	bhi	.L775
 	add	x20, x20, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR23
 	ldrh	w1, [x0, #:lo12:.LANCHOR23]
@@ -5722,11 +5768,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L755
-.L758:
+	b	.L772
+.L775:
 	ldr	w2, [x23, x0, lsl 2]
 	cmp	w22, w2, lsr 10
-	bne	.L757
+	bne	.L774
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	ubfiz	x2, x1, 1, 16
@@ -5734,9 +5780,9 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x2, 1
 	ldr	w5, [x23, x0, lsl 2]
 	str	w5, [x3, x2, lsl 2]
-.L757:
+.L774:
 	add	x0, x0, 1
-	b	.L756
+	b	.L773
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
@@ -5760,7 +5806,7 @@ FtlMapWritePage:
 	add	x28, x26, :lo12:.LANCHOR20
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
-.L764:
+.L781:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -5768,35 +5814,35 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L765
+	bge	.L782
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L766
-.L765:
+	bne	.L783
+.L782:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L766:
+.L783:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L767
+	cbnz	w0, .L784
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L767:
+.L784:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L768
+	bcc	.L785
 	adrp	x0, .LC1
 	mov	w2, 701
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L768:
+.L785:
 	ldrh	w1, [x19]
 	adrp	x21, .LANCHOR138
 	ldr	x0, [x19, 16]
@@ -5837,46 +5883,46 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L769
+	bne	.L786
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC18
-	add	x0, x0, :lo12:.LC18
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L770
+	bhi	.L787
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L770:
+.L787:
 	cmp	w22, 3
-	bls	.L771
+	bls	.L788
 	add	x21, x21, :lo12:.LANCHOR138
-	adrp	x0, .LC19
+	adrp	x0, .LC23
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC23
 	ldr	w1, [x21, 4]
 	bl	printf
-.L772:
-	b	.L772
-.L771:
+.L789:
+	b	.L789
+.L788:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L764
+	cbz	w0, .L781
+.L803:
+	b	.L803
 .L786:
-	b	.L786
-.L769:
 	cmp	w0, 1
-	beq	.L775
+	beq	.L792
 	cmp	w1, 256
-	beq	.L775
+	beq	.L792
 	ldr	w0, [x19, 56]
-	cbz	w0, .L776
-.L775:
+	cbz	w0, .L793
+.L792:
 	str	wzr, [x19, 56]
-	b	.L764
-.L776:
+	b	.L781
+.L793:
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
@@ -5906,20 +5952,20 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L789
+	bcs	.L806
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 485
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L789:
+.L806:
 	adrp	x27, .LANCHOR124
 	ubfiz	x0, x20, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x27, #:lo12:.LANCHOR124]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L790
+	cbnz	w23, .L807
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
@@ -5932,7 +5978,7 @@ load_l2p_region:
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L791:
+.L808:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5941,7 +5987,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L790:
+.L807:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x26, .LANCHOR138
@@ -5960,48 +6006,48 @@ load_l2p_region:
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L792
+	beq	.L809
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
 	ldr	x1, [x21, 16]
 	mov	w3, 4
-	adrp	x0, .LC21
+	adrp	x0, .LC13
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC13
 	bl	rknand_print_hex
 	ldrh	w3, [x24, #:lo12:.LANCHOR32]
-	adrp	x0, .LC22
+	adrp	x0, .LC25
 	ldr	x1, [x27, #:lo12:.LANCHOR124]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L793:
+.L810:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L794
+	beq	.L811
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 508
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L794:
+.L811:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L791
-.L792:
+	b	.L808
+.L809:
 	ldr	w0, [x26, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L793
+	bne	.L810
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	mov	w1, w20
@@ -6010,7 +6056,7 @@ load_l2p_region:
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapWritePage
-	b	.L793
+	b	.L810
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6033,12 +6079,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L797
+	blt	.L814
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L797
+	cbz	w22, .L814
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L797
+	cbnz	w1, .L814
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6048,31 +6094,31 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L798
+	bcc	.L815
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L798:
+.L815:
 	adrp	x26, .LANCHOR138
 	adrp	x23, .LANCHOR151
 	add	x27, x26, :lo12:.LANCHOR138
 	add	x23, x23, :lo12:.LANCHOR151
 	mov	w20, 0
-.L799:
+.L816:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L806
+	bhi	.L823
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L797:
+.L814:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L807
+	bcc	.L824
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L807:
+.L824:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6081,12 +6127,12 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L806:
+.L823:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L800
+	bne	.L817
 	adrp	x2, .LANCHOR107
 	add	x0, x26, :lo12:.LANCHOR138
 	ldr	x2, [x2, #:lo12:.LANCHOR107]
@@ -6100,36 +6146,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L801
+	beq	.L818
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L801:
+.L818:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L802
-.L804:
+	bne	.L819
+.L821:
 	str	wzr, [x28]
-.L803:
-	b	.L803
-.L802:
+.L820:
+	b	.L820
+.L819:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L804
+	bne	.L821
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L804
+	bne	.L821
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L800:
+.L817:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L799
+	b	.L816
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -6171,27 +6217,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR55
-.L816:
+.L833:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L818
+	bhi	.L835
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L818:
+.L835:
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L817
+	tbz	w0, #31, .L834
 	mov	w0, w19
 	bl	flush_l2p_region
-.L817:
+.L834:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L816
+	b	.L833
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
@@ -6213,17 +6259,17 @@ log2phys:
 	ldr	w1, [x0, #:lo12:.LANCHOR152]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L821
+	bcc	.L838
 	adrp	x1, .LANCHOR153
 	adrp	x0, .LC1
 	mov	w2, 813
 	add	x1, x1, :lo12:.LANCHOR153
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L821:
+.L838:
 	ldr	w0, [x19, #:lo12:.LANCHOR152]
 	cmp	w25, w0
-	bcs	.L822
+	bcs	.L839
 	adrp	x23, .LANCHOR55
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR33
@@ -6232,10 +6278,10 @@ log2phys:
 	and	w22, w22, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L823:
+.L840:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L828
+	bcc	.L845
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
 	ldr	x2, [x23, #:lo12:.LANCHOR55]
@@ -6245,33 +6291,33 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L829
+	beq	.L846
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L829
+	tbz	w1, #31, .L846
 	bl	flush_l2p_region
-.L829:
+.L846:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L825
-.L822:
+	b	.L842
+.L839:
 	mov	w0, -1
-	cbnz	w21, .L820
+	cbnz	w21, .L837
 	str	w0, [x20]
-.L820:
+.L837:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L828:
+.L845:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L823
-.L825:
+	bne	.L840
+.L842:
 	mov	x0, 1
 	ldr	x1, [x23, #:lo12:.LANCHOR55]
 	lsl	x0, x0, x24
@@ -6279,22 +6325,22 @@ log2phys:
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L826
+	cbnz	w21, .L843
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L827:
+.L844:
 	ldr	x0, [x23, #:lo12:.LANCHOR55]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L831
+	beq	.L848
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L831:
+.L848:
 	mov	w0, 0
-	b	.L820
-.L826:
+	b	.L837
+.L843:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
@@ -6303,7 +6349,7 @@ log2phys:
 	str	w0, [x1, 4]
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L827
+	b	.L844
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6324,10 +6370,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L835
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L836
+	cbnz	w1, .L852
+	adrp	x0, .LANCHOR46
+	ldr	x19, [x0, #:lo12:.LANCHOR46]
+	cbz	x19, .L853
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -6340,23 +6386,23 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L837:
+.L854:
 	cmp	w1, w4
-	beq	.L836
+	beq	.L853
 	cmp	w19, w3
-	bne	.L838
+	bne	.L855
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR46
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L839
+	cbnz	w0, .L856
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 1733
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L839:
+.L856:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
@@ -6366,7 +6412,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L836:
+.L853:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6376,18 +6422,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L838:
+.L855:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L836
+	beq	.L853
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L837
-.L835:
+	b	.L854
+.L852:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L836
+	b	.L853
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -6405,7 +6451,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L968
+	beq	.L989
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -6413,11 +6459,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L848
+	bne	.L865
 	strh	wzr, [x19, 4]
-.L976:
+.L996:
 	strb	wzr, [x19, 6]
-.L968:
+.L989:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -6426,17 +6472,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L848:
+.L865:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L849:
+.L866:
 	cmp	w0, w1
-	beq	.L850
+	beq	.L867
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L851
+	beq	.L868
 	adrp	x1, .LANCHOR64
 	adrp	x2, .LANCHOR3
 	adrp	x20, .LANCHOR103
@@ -6457,9 +6503,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L852:
+.L869:
 	cmp	x4, x1
-	bne	.L856
+	bne	.L873
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
@@ -6473,69 +6519,69 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L857:
+.L874:
 	cmp	w22, w3
-	bne	.L862
+	bne	.L879
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L970:
+.L991:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L864
+	bne	.L881
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L864:
+.L881:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L865
-.L977:
+	beq	.L882
+.L997:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L968
-.L850:
+	b	.L989
+.L867:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L849
-.L851:
-	cbz	w26, .L853
+	b	.L866
+.L868:
+	cbz	w26, .L870
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1800
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L853:
+.L870:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L854
+	beq	.L871
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	mov	w2, 1801
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L854:
+.L871:
 	strh	wzr, [x19, 2]
-	b	.L976
-.L856:
+	b	.L996
+.L873:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L855
+	beq	.L872
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -6550,90 +6596,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L855:
+.L872:
 	add	x4, x4, 2
-	b	.L852
-.L862:
+	b	.L869
+.L879:
 	ldr	w0, [x11]
-	cbnz	w0, .L858
+	cbnz	w0, .L875
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L859
+	beq	.L876
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L859
+	cbz	w0, .L876
 	add	w5, w5, 1
 	str	w5, [x7]
-.L859:
+.L876:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L861
+	bne	.L878
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L970
-.L858:
+	b	.L991
+.L875:
 	mov	w6, w10
-.L861:
+.L878:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L857
-.L865:
+	b	.L874
+.L882:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L866
+	bne	.L883
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L867
-.L866:
+	cbnz	w0, .L884
+.L883:
 	adrp	x25, .LANCHOR134
 	and	w28, w23, 65535
 	ldr	w0, [x25, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L868
+	bne	.L885
 	str	w21, [x25, #:lo12:.LANCHOR134]
-.L868:
+.L885:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L920
+	bge	.L935
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L869:
+.L886:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L870:
+.L887:
 	cmp	w24, w28
-	bhi	.L880
+	bhi	.L897
 	ldrh	w1, [x4]
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L881
-.L920:
+	b	.L898
+.L935:
 	mov	w24, w26
-	b	.L869
-.L872:
+	b	.L886
+.L889:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L871
+	beq	.L888
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L871:
+.L888:
 	add	x2, x2, 2
-.L881:
+.L898:
 	cmp	x1, x2
-	bne	.L872
+	bne	.L889
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -6650,105 +6696,105 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L873:
+.L890:
 	cmp	x23, x0
-	bne	.L878
-	cbz	w2, .L879
+	bne	.L895
+	cbz	w2, .L896
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L879:
+.L896:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L870
-.L878:
+	b	.L887
+.L895:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L874
-	cbz	w2, .L867
+	cbz	w6, .L891
+	cbz	w2, .L884
 	str	w1, [x25, #:lo12:.LANCHOR134]
-.L867:
+.L884:
 	adrp	x0, .LANCHOR156
-	mov	w24, w26
+	mov	w23, w26
 	mov	w1, 1
 	adrp	x28, .LANCHOR134
 	strh	w1, [x0, #:lo12:.LANCHOR156]
 	add	x0, x28, :lo12:.LANCHOR134
 	str	x0, [x29, 104]
-.L882:
+.L899:
 	ldr	x1, [x29, 152]
-	mov	w23, 0
+	mov	w24, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w5, 65535
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L883:
+.L900:
 	cmp	x1, x2
-	bne	.L885
+	bne	.L902
 	mov	w2, 0
-	mov	w1, w23
+	mov	w1, w24
 	bl	FlashReadPages
 	mov	x25, 0
-	ubfiz	x0, x23, 5, 16
+	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 112]
 	adrp	x0, .LANCHOR157
 	add	x0, x0, :lo12:.LANCHOR157
 	str	x0, [x29, 120]
-.L886:
+.L903:
 	ldr	x0, [x29, 112]
-	cmp	x0, x25
-	bne	.L914
+	cmp	x25, x0
+	bne	.L929
 	ldr	x0, [x29, 128]
-	add	w24, w24, 1
-	and	w24, w24, 65535
+	add	w23, w23, 1
+	and	w23, w23, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w24
-	bne	.L882
+	cmp	w0, w23
+	bne	.L899
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
-	strh	w24, [x19, 2]
+	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L915:
+.L930:
 	cmp	w0, w1
-	beq	.L968
+	beq	.L989
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L916
+	beq	.L931
 	strb	w0, [x19, 6]
-	b	.L968
-.L874:
+	b	.L989
+.L891:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L877
+	beq	.L894
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L877:
+.L894:
 	add	x0, x0, 32
-	b	.L873
-.L880:
+	b	.L890
+.L897:
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR134]
-	b	.L867
-.L885:
+	b	.L884
+.L902:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L884
-	ubfiz	x4, x23, 5, 16
-	add	w23, w23, 1
+	beq	.L901
+	ubfiz	x4, x24, 5, 16
+	add	w24, w24, 1
 	add	x4, x0, x4
-	and	w23, w23, 65535
-	orr	w3, w24, w3, lsl 10
+	and	w24, w24, 65535
+	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L884:
+.L901:
 	add	x2, x2, 2
-	b	.L883
-.L914:
+	b	.L900
+.L929:
 	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -6756,54 +6802,54 @@ FtlRecoverySuperblock:
 	lsr	w0, w5, 10
 	bl	P2V_plane
 	and	w0, w0, 65535
-	cmp	w24, w26
-	bcc	.L887
+	cmp	w23, w26
+	bcc	.L904
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L887
-	cmp	w24, w22
+	bhi	.L904
+	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L888
+	beq	.L905
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L889
+	beq	.L906
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L890
+	beq	.L907
 	ldrh	w0, [x19]
-.L974:
+.L993:
 	bl	decrement_vpc_count
-	b	.L887
-.L890:
+	b	.L904
+.L907:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L891
+	beq	.L908
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR83]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L891
+	cbz	w0, .L908
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR83]
-.L891:
-	ldp	w23, w0, [x3, 8]
+.L908:
+	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
 	mov	w2, 0
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR134]
 	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L892
+	beq	.L909
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L892
+	cbz	w0, .L909
 	cmn	w3, #1
-	beq	.L893
+	beq	.L910
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -6817,75 +6863,75 @@ FtlRecoverySuperblock:
 	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L894
-.L895:
+	bne	.L911
+.L912:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L902:
+.L919:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L887
-.L919:
+	beq	.L904
+.L934:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	and	w23, w0, 65535
+	and	w24, w0, 65535
 	adrp	x0, .LANCHOR5
-	mov	w3, w23
+	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
-	cmp	w0, w23
-	bhi	.L910
-	mov	w2, 2065
+	cmp	w0, w24
+	bhi	.L925
+	mov	w2, 2057
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
-	str	w23, [x29, 136]
+	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L910:
+.L925:
 	adrp	x1, .LANCHOR42
-	ubfiz	x0, x23, 1, 16
+	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L911
+	cbz	w0, .L926
 	mov	w0, w3
-	b	.L974
-.L893:
+	b	.L993
+.L910:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L887
+	bne	.L904
 	mov	w2, 1
 	add	x1, x29, 180
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
-.L887:
+.L904:
 	add	x25, x25, 32
-	b	.L886
-.L894:
+	b	.L903
+.L911:
 	ldr	w0, [x4, 8]
-	cmp	w23, w0
-	bne	.L895
+	cmp	w24, w0
+	bne	.L912
 	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
 	str	x4, [x29, 96]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L895
+	cbz	w0, .L912
 	ldp	w0, w1, [x29, 184]
 	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L897
-.L971:
-	mov	w0, w23
+	bne	.L914
+.L992:
+	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L895
-.L897:
+	b	.L912
+.L914:
 	cmp	w0, w1
-	beq	.L895
+	beq	.L912
 	cmn	w0, #1
-	beq	.L898
+	beq	.L915
 	ldr	x4, [x3, 16]
 	mov	w2, 0
 	str	w0, [x3, 4]
@@ -6894,64 +6940,70 @@ FtlRecoverySuperblock:
 	mov	x0, x3
 	bl	FlashReadPages
 	ldr	x4, [x29, 96]
-.L899:
+.L916:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L900
+	beq	.L917
 	ldr	x0, [x29, 104]
 	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L900
+	cbz	w0, .L917
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L895
-.L900:
+	cbz	w0, .L912
+.L917:
 	ldr	w1, [x29, 180]
-	b	.L971
-.L898:
+	b	.L992
+.L915:
 	str	w0, [x3]
-	b	.L899
-.L892:
+	b	.L916
+.L909:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L902
+	beq	.L919
+	cmn	w3, #1
+	beq	.L921
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	cmp	w0, w3, lsr 10
-	bhi	.L904
-	cmn	w3, #1
-.L973:
-	bne	.L887
+	bhi	.L921
+	adrp	x0, .LC27
+	mov	w1, w3
+	add	x0, x0, :lo12:.LC27
+.L995:
+	bl	printf
+	b	.L904
+.L921:
 	mov	w2, 1
 	add	x1, x29, 188
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L902
+	beq	.L919
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L919
+	beq	.L934
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L909
+	beq	.L924
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L909
+	beq	.L924
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L902
-.L909:
+	bne	.L919
+.L924:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
@@ -6962,71 +7014,54 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L902
+	beq	.L919
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L902
+	cbnz	w0, .L919
 	mov	w2, 1
 	add	x1, x29, 184
-	mov	w0, w23
+	mov	w0, w24
 	bl	log2phys
-	b	.L902
-.L904:
-	ldr	x0, [x20, #:lo12:.LANCHOR103]
-	mov	w2, 0
-	mov	w1, 1
-	ldr	x4, [x0, 16]
-	str	w3, [x0, 4]
-	str	x4, [x29, 136]
-	bl	FlashReadPages
-	ldr	x4, [x29, 136]
-	ldr	w0, [x4, 8]
-	cmp	w23, w0
-	bne	.L887
-	ldrh	w1, [x4]
-	mov	w0, 61589
-	cmp	w1, w0
-	b	.L973
-.L911:
-	mov	w1, w23
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
-	bl	printf
-	b	.L887
-.L889:
+	b	.L919
+.L926:
+	adrp	x0, .LC28
+	mov	w1, w24
+	add	x0, x0, :lo12:.LC28
+	b	.L995
+.L906:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L912
+	bhi	.L927
 	adrp	x1, .LANCHOR158
 	add	x1, x1, :lo12:.LANCHOR158
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L912:
+.L927:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L913
-.L975:
+	bne	.L928
+.L994:
 	str	w21, [x28, #:lo12:.LANCHOR134]
-	b	.L887
-.L913:
+	b	.L904
+.L928:
 	cmp	w21, w0
-	bcs	.L887
-	b	.L975
-.L916:
+	bcs	.L904
+	b	.L994
+.L931:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L915
-.L888:
+	b	.L930
+.L905:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L977
+	b	.L997
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -7034,8 +7069,8 @@ FtlRecoverySuperblock:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR152
@@ -7054,29 +7089,29 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L979:
+.L999:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L981
+	bcc	.L1001
 	adrp	x22, .LANCHOR5
-	adrp	x24, .LC26
+	adrp	x24, .LC30
 	add	x22, x22, :lo12:.LANCHOR5
 	add	x26, x20, :lo12:check_vpc_table
-	add	x24, x24, :lo12:.LC26
+	add	x24, x24, :lo12:.LC30
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-.L982:
+.L1002:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L984
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L985
+	bhi	.L1004
+	adrp	x0, .LANCHOR46
+	ldr	x19, [x0, #:lo12:.LANCHOR46]
+	cbz	x19, .L1005
 	adrp	x0, .LANCHOR48
-	adrp	x25, .LC27
+	adrp	x25, .LC31
 	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC27
+	add	x25, x25, :lo12:.LC31
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR40
 	mov	x24, x0
@@ -7090,17 +7125,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L986:
+.L1006:
 	cmp	w22, w26
-	bne	.L988
-.L985:
-	cbz	w23, .L978
+	bne	.L1008
+.L1005:
+	cbz	w23, .L998
 	adrp	x0, .LC1
-	mov	w2, 2389
+	mov	w2, 2383
 	add	x1, x21, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L978:
+.L998:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7108,31 +7143,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L981:
+.L1001:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L980
+	beq	.L1000
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L980:
+.L1000:
 	add	w22, w22, 1
-	b	.L979
-.L984:
+	b	.L999
+.L1004:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L983
+	beq	.L1003
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -7140,34 +7175,34 @@ ftl_check_vpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L983
+	beq	.L1003
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L983:
+.L1003:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L982
-.L988:
+	b	.L1002
+.L1008:
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L987
+	cbz	w2, .L1007
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L987:
+.L1007:
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L985
+	beq	.L1005
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L986
+	b	.L1006
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -7175,9 +7210,9 @@ ftl_check_vpc:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 	sub	sp, sp, #96
-	adrp	x0, .LC28
+	adrp	x0, .LC32
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC28
+	add	x0, x0, :lo12:.LC32
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
@@ -7189,32 +7224,32 @@ ftl_scan_all_data:
 	add	x21, x21, :lo12:.LANCHOR152
 	str	x23, [sp, 64]
 	bl	printf
-.L1004:
+.L1024:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1010
+	bcc	.L1030
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L1010:
+.L1030:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L1005
+	bne	.L1025
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC29
+	adrp	x0, .LC33
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC29
+	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L1005:
+.L1025:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L1007
+	beq	.L1027
 	add	x0, x20, :lo12:.LANCHOR138
 	str	wzr, [x20, #:lo12:.LANCHOR138]
 	mov	w2, 0
@@ -7231,25 +7266,25 @@ ftl_scan_all_data:
 	ldr	w0, [x20, #:lo12:.LANCHOR138]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L1008
+	beq	.L1028
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L1007
-.L1008:
+	beq	.L1027
+.L1028:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC30
+	adrp	x0, .LC34
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC30
+	add	x0, x0, :lo12:.LC34
 	mov	w1, w19
 	bl	printf
-.L1007:
+.L1027:
 	add	w19, w19, 1
-	b	.L1004
+	b	.L1024
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -7259,37 +7294,37 @@ FtlGcScanTempBlk:
 	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR160
+	adrp	x25, .LANCHOR160
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w20, [x26, #:lo12:.LANCHOR160]
+	ldrh	w20, [x25, #:lo12:.LANCHOR160]
 	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w20, w0
-	stp	x27, x28, [sp, 80]
-	beq	.L1033
-	cbnz	w20, .L1013
-.L1014:
+	str	x27, [sp, 80]
+	beq	.L1053
+	cbnz	w20, .L1033
+.L1034:
 	bl	FtlGcPageVarInit
-	b	.L1015
-.L1033:
+	b	.L1035
+.L1053:
 	mov	w20, 0
-.L1013:
+.L1033:
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w1
-	beq	.L1014
-.L1015:
-	adrp	x27, .LANCHOR152
-	add	x27, x27, :lo12:.LANCHOR152
-.L1016:
-	ldrh	w0, [x19]
-	mov	w23, 65535
+	beq	.L1034
+.L1035:
+	adrp	x26, .LANCHOR152
+	add	x26, x26, :lo12:.LANCHOR152
+.L1050:
+	ldrh	w1, [x19]
+	mov	w0, 65535
 	strb	wzr, [x19, 8]
-	cmp	w0, w23
-	beq	.L1017
-.L1032:
+	cmp	w1, w0
+	beq	.L1036
+.L1052:
 	adrp	x1, .LANCHOR64
 	adrp	x24, .LANCHOR103
 	add	x4, x19, 16
@@ -7297,6 +7332,7 @@ FtlGcScanTempBlk:
 	ldr	x5, [x1, #:lo12:.LANCHOR64]
 	adrp	x1, .LANCHOR23
 	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	mov	w10, 65535
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
 	adrp	x1, .LANCHOR65
 	ldr	x7, [x1, #:lo12:.LANCHOR65]
@@ -7306,44 +7342,44 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1018:
-	cmp	x4, x1
-	bne	.L1020
+.L1037:
+	cmp	x1, x4
+	bne	.L1039
 	mov	w1, w21
 	ubfiz	x21, x21, 5, 16
 	mov	x22, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L1021:
+.L1040:
 	cmp	x21, x22
-	bne	.L1031
+	bne	.L1051
 	adrp	x0, .LANCHOR19
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w20
-	bhi	.L1032
-.L1017:
+	bhi	.L1052
+.L1036:
 	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
 	mov	w1, w20
-	strh	w0, [x26, #:lo12:.LANCHOR160]
+	strh	w0, [x25, #:lo12:.LANCHOR160]
 	mov	w2, 0
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
 	mov	w0, -1
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1020:
+.L1039:
 	ldrh	w3, [x4]
-	cmp	w3, w23
-	beq	.L1019
+	cmp	w3, w10
+	beq	.L1038
 	ubfiz	x2, x21, 5, 16
 	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
@@ -7358,24 +7394,25 @@ FtlGcScanTempBlk:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1019:
+.L1038:
 	add	x4, x4, 2
-	b	.L1018
-.L1031:
-	ldr	x1, [x24, #:lo12:.LANCHOR103]
-	add	x0, x1, x22
-	ldr	w1, [x1, x22]
-	ldr	w28, [x0, 4]
-	cbnz	w1, .L1022
-	ldr	x25, [x0, 16]
-	ldrh	w0, [x25]
-	cmp	w0, w23
-	beq	.L1022
-	ldr	w0, [x25, 8]
-	ldr	w1, [x27]
+	b	.L1037
+.L1051:
+	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	ldr	w27, [x1, 4]
+	ldr	x23, [x1, 16]
+	cbnz	w0, .L1041
+	ldrh	w1, [x23]
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L1063
+	ldr	w0, [x23, 8]
+	ldr	w1, [x26]
 	cmp	w0, w1
-	bls	.L1024
-.L1022:
+	bls	.L1043
+.L1063:
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x19]
 	mov	w20, 0
@@ -7384,26 +7421,30 @@ FtlGcScanTempBlk:
 	ldrh	w0, [x19]
 	bl	INSERT_FREE_LIST
 	mov	w0, -1
+	adrp	x1, .LANCHOR145
 	strh	w0, [x19]
+	strh	w0, [x1, #:lo12:.LANCHOR145]
 	bl	FtlGcPageVarInit
-	b	.L1016
-.L1024:
+	b	.L1050
+.L1043:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x25, 12]
+	ldr	w0, [x23, 12]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	beq	.L1026
-.L1027:
-	ldp	w2, w0, [x25, 8]
-	mov	w1, w28
+	beq	.L1045
+.L1047:
+	ldr	w2, [x23, 8]
+.L1064:
+	ldr	w0, [x23, 12]
+	mov	w1, w27
 	add	x22, x22, 32
 	bl	FtlGcUpdatePage
-	b	.L1021
-.L1026:
+	b	.L1040
+.L1045:
 	cmn	w0, #1
-	beq	.L1027
+	beq	.L1047
 	str	w0, [x29, 116]
 	adrp	x0, .LANCHOR110
 	mov	w2, 0
@@ -7422,22 +7463,25 @@ FtlGcScanTempBlk:
 	add	x2, x2, x22
 	mov	x0, 0
 	ubfiz	x1, x1, 9, 16
-.L1028:
+.L1048:
 	cmp	x0, x1
-	beq	.L1027
+	beq	.L1047
 	ldr	x4, [x2, 8]
 	ldr	w5, [x4, x0]
 	add	x0, x0, 4
 	add	x4, x3, x0
 	ldr	w4, [x4, -4]
 	cmp	w5, w4
-	beq	.L1028
+	beq	.L1048
 	ldrh	w1, [x19]
-	adrp	x0, .LC31
+	adrp	x0, .LC35
 	ldr	w2, [x29, 116]
-	add	x0, x0, :lo12:.LC31
+	add	x0, x0, :lo12:.LC35
 	bl	printf
-	b	.L1022
+	b	.L1063
+.L1041:
+	mov	w2, -1
+	b	.L1064
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -7457,7 +7501,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1051
+	bhi	.L1073
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -7467,9 +7511,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1045:
-	cbnz	w20, .L1050
-.L1043:
+.L1067:
+	cbnz	w20, .L1072
+.L1065:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7478,7 +7522,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1050:
+.L1072:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR123
 	adrp	x27, .LANCHOR108
@@ -7491,9 +7535,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1047
+	cbz	w2, .L1069
 	cmp	w19, w1
-	beq	.L1047
+	beq	.L1069
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -7503,7 +7547,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1048:
+.L1070:
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	lsl	w22, w22, 7
@@ -7524,16 +7568,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1045
-.L1047:
+	b	.L1067
+.L1069:
 	ldrh	w2, [x26]
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-	b	.L1048
-.L1051:
+	b	.L1070
+.L1073:
 	mov	w23, -1
-	b	.L1043
+	b	.L1065
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -7546,7 +7590,7 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1056
+	bne	.L1078
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
@@ -7589,7 +7633,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1056:
+.L1078:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -7600,20 +7644,20 @@ FtlEctTblFlush:
 	adrp	x2, .LANCHOR164
 	ldrh	w1, [x2, #:lo12:.LANCHOR164]
 	cmp	w1, 31
-	bhi	.L1062
+	bhi	.L1084
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR164]
 	mov	w1, 1
-.L1059:
+.L1081:
 	adrp	x2, .LANCHOR118
-	cbnz	w0, .L1060
+	cbnz	w0, .L1082
 	ldr	x0, [x2, #:lo12:.LANCHOR118]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1064
-.L1060:
+	bcc	.L1086
+.L1082:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR118]
@@ -7636,10 +7680,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1062:
+.L1084:
 	mov	w1, 32
-	b	.L1059
-.L1064:
+	b	.L1081
+.L1086:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -7669,7 +7713,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1076
+	bhi	.L1098
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
@@ -7679,9 +7723,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1069:
-	cbnz	w21, .L1075
-.L1067:
+.L1091:
+	cbnz	w21, .L1097
+.L1089:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7690,7 +7734,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1075:
+.L1097:
 	ldr	x0, [x27, #:lo12:.LANCHOR123]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
@@ -7703,7 +7747,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1071
+	cbz	w4, .L1093
 	adrp	x28, .LANCHOR108
 	mov	w2, 1
 	str	w4, [x29, 96]
@@ -7723,12 +7767,12 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L1073
+	bne	.L1095
 	mov	w2, w4
 	mov	w1, w20
-	adrp	x0, .LC32
+	adrp	x0, .LC36
 	str	x28, [x29, 96]
-	add	x0, x0, :lo12:.LC32
+	add	x0, x0, :lo12:.LC36
 	bl	printf
 	ldr	x2, [x28, #:lo12:.LANCHOR108]
 	mov	w1, w20
@@ -7736,28 +7780,28 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR161
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1073:
+.L1095:
 	ldr	x1, [x5, #:lo12:.LANCHOR108]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1074:
+.L1096:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1069
-.L1071:
+	b	.L1091
+.L1093:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1074
-.L1076:
+	b	.L1096
+.L1098:
 	mov	w24, -1
-	b	.L1067
+	b	.L1089
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -7778,18 +7822,18 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1079
-	adrp	x1, .LC33
-	adrp	x0, .LC34
-	add	x1, x1, :lo12:.LC33
-	add	x0, x0, :lo12:.LC34
+	beq	.L1101
+	adrp	x1, .LC37
+	adrp	x0, .LC38
+	add	x1, x1, :lo12:.LC37
+	add	x0, x0, :lo12:.LC38
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR118]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR116]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1079:
+.L1101:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -7814,18 +7858,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1082
+	beq	.L1104
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR135]
-.L1082:
+.L1104:
 	ldr	w1, [x19, #:lo12:.LANCHOR135]
 	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
 	adrp	x1, .LANCHOR91
-	bne	.L1083
+	bne	.L1105
 	adrp	x2, .LANCHOR162
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR162]
@@ -7860,7 +7904,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR93
 	str	w2, [x0, #:lo12:.LANCHOR93]
-.L1083:
+.L1105:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR90
 	ldr	w1, [x1, #:lo12:.LANCHOR91]
@@ -7873,8 +7917,8 @@ Ftl_load_ext_data:
 	ldp	x29, x30, [sp], 48
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR145
-	str	w0, [x1, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR143
+	str	w0, [x1, #:lo12:.LANCHOR143]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",@progbits
@@ -7891,7 +7935,7 @@ sftl_vendor_read:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1086
+	cbz	w1, .L1108
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -7912,16 +7956,16 @@ FtlMapBlkWriteDump_data:
 	str	x24, [x21, 16]
 	str	wzr, [x19, 56]
 	ldr	x25, [x19, 40]
-	cbz	w0, .L1088
+	cbz	w0, .L1110
 	adrp	x1, .LANCHOR20
 	ldrh	w1, [x1, #:lo12:.LANCHOR20]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1088
+	bge	.L1110
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1088
+	beq	.L1110
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -7934,16 +7978,16 @@ FtlMapBlkWriteDump_data:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1088
+	beq	.L1110
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1088
+	bne	.L1110
 	ldr	x2, [x21, 8]
-.L1100:
+.L1122:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -7951,30 +7995,30 @@ FtlMapBlkWriteDump_data:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1088:
+.L1110:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR138
 	str	w1, [x0, 4]
-	cbz	w1, .L1089
+	cbz	w1, .L1111
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1090:
+.L1112:
 	add	x22, x22, :lo12:.LANCHOR138
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1100
-.L1089:
+	b	.L1122
+.L1111:
 	adrp	x1, .LANCHOR23
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1090
-.L1086:
+	b	.L1112
+.L1108:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
@@ -8094,7 +8138,7 @@ FtlVpcTblFlush:
 	add	x24, x24, :lo12:.LANCHOR20
 	str	w0, [x29, 108]
 	str	x24, [x29, 96]
-.L1102:
+.L1124:
 	ldrh	w2, [x28, 2]
 	ldrh	w1, [x28]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
@@ -8106,7 +8150,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1103
+	blt	.L1125
 	ldrh	w0, [x28, 4]
 	strh	wzr, [x28, 2]
 	strh	w1, [x28, 4]
@@ -8121,7 +8165,7 @@ FtlVpcTblFlush:
 	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1103:
+.L1125:
 	ldrh	w1, [x26, #:lo12:.LANCHOR23]
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	bl	js_hash
@@ -8137,49 +8181,49 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1104
+	bne	.L1126
 	cmp	w0, 1
-	bne	.L1105
+	bne	.L1127
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	mov	w2, 1138
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1105:
+.L1127:
 	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1106
+	bne	.L1128
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x28, 2]
-.L1106:
+.L1128:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w20, 3
-	bls	.L1102
+	bls	.L1124
 	add	x21, x21, :lo12:.LANCHOR138
-	adrp	x0, .LC35
+	adrp	x0, .LC39
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC35
+	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x21, 4]
 	bl	printf
-.L1108:
-	b	.L1108
-.L1104:
+.L1130:
+	b	.L1130
+.L1126:
 	cmp	w0, 1
-	beq	.L1102
+	beq	.L1124
 	cmp	w1, 256
-	beq	.L1102
+	beq	.L1124
 	ldr	w1, [x29, 108]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L1109
+	beq	.L1131
 	ldrh	w0, [x29, 108]
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1109:
+.L1131:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8212,14 +8256,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmp	w0, 1
-	bne	.L1122
+	bne	.L1144
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1122:
+.L1144:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -8238,56 +8282,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1133
+	bhi	.L1155
 	cmp	w19, 31
-	bhi	.L1127
-.L1141:
+	bhi	.L1149
+.L1163:
 	mov	w0, 0
-.L1125:
+.L1147:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1127:
+.L1149:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1128
+	beq	.L1150
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1128:
+.L1150:
 	adrp	x22, .LANCHOR167
 	adrp	x23, .LANCHOR86
 	add	x22, x22, :lo12:.LANCHOR167
 	add	x23, x23, :lo12:.LANCHOR86
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1129:
+.L1151:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1131
+	bcs	.L1153
 	adrp	x0, .LANCHOR167
 	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1141
+	bls	.L1163
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1141
-.L1131:
+	b	.L1163
+.L1153:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1130
+	beq	.L1152
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -8302,14 +8346,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1130:
+.L1152:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1129
-.L1133:
+	b	.L1151
+.L1155:
 	mov	w0, -1
-	b	.L1125
+	b	.L1147
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -8325,25 +8369,25 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1143
+	bcs	.L1165
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
-	mov	w2, 2760
+	mov	w2, 2755
 	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1143:
+.L1165:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1144
+	beq	.L1166
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1145
+	cbz	w0, .L1167
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1144:
+.L1166:
 	adrp	x1, .LANCHOR131
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -8351,20 +8395,20 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR131]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1146
+	beq	.L1168
 	cmp	w19, w0
-	bne	.L1147
+	bne	.L1169
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1148
-.L1147:
+	cbz	w1, .L1170
+.L1169:
 	bl	update_vpc_list
-.L1148:
+.L1170:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR131]
-.L1146:
+.L1168:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -8376,96 +8420,79 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1145:
+.L1167:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1144
+	b	.L1166
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
 	.global	FtlProgPages
 	.type	FtlProgPages, %function
 FtlProgPages:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	mov	w2, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x3
-	stp	x23, x24, [sp, 48]
-	add	x20, x0, 4
+	mov	x20, x3
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	str	x25, [sp, 64]
+	stp	x23, x24, [sp, 48]
 	ubfiz	x21, x21, 5, 32
+	mov	x22, x0
 	add	x21, x21, 4
-	adrp	x24, .LANCHOR19
 	ldrb	w3, [x3, 9]
-	adrp	x23, .LANCHOR135
-	add	x21, x0, x21
-	add	x24, x24, :lo12:.LANCHOR19
-	add	x23, x23, :lo12:.LANCHOR135
+	adrp	x23, .LC40
+	adrp	x24, .LANCHOR3
+	add	x19, x22, 4
+	add	x21, x22, x21
+	add	x23, x23, :lo12:.LC40
+	add	x24, x24, :lo12:.LANCHOR3
 	bl	FlashProgPages
-.L1154:
-	cmp	x20, x21
-	beq	.L1161
-	sub	x22, x20, #4
-	adrp	x25, .LANCHOR42
-	b	.L1162
-.L1157:
-	ldr	w0, [x20]
+.L1176:
+	cmp	x21, x19
+	beq	.L1182
+	sub	x22, x19, #4
+	b	.L1183
+.L1178:
+	ldr	w1, [x19]
+	mov	x0, x23
+	bl	printf
+	ldr	w0, [x19]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-	ldrh	w1, [x19]
-	cmp	w1, w0, uxth
-	bne	.L1155
-	ldr	x2, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x1, x1, 1, 16
-	ldrh	w3, [x19, 4]
-	ldrh	w0, [x2, x1]
-	sub	w0, w0, w3
-	strh	w0, [x2, x1]
-	strb	wzr, [x19, 6]
-	ldrh	w0, [x24]
-	strh	w0, [x19, 2]
-	strh	wzr, [x19, 4]
-.L1155:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1156
-	mov	x0, x19
+	bl	decrement_vpc_count
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1177
+	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1156:
-	ldr	w0, [x23, 96]
-	add	w0, w0, 1
-	str	w0, [x23, 96]
-	ldr	w0, [x20]
-	lsr	w0, w0, 10
-	bl	FtlGcMarkBadPhyBlk
-	mov	x0, x19
+.L1177:
+	mov	x0, x20
 	bl	get_new_active_ppa
-	str	w0, [x20]
+	str	w0, [x19]
 	mov	w2, 0
-	str	w0, [x29, 92]
+	str	w0, [x29, 76]
 	mov	w1, 1
-	ldrb	w3, [x19, 9]
+	ldrb	w3, [x20, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1162:
-	ldr	w0, [x20, -4]
-	cmn	w0, #1
-	beq	.L1157
-	adrp	x0, .LANCHOR3
-	ldrb	w1, [x19, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+.L1183:
+	ldr	w2, [x19, -4]
+	cmp	w2, 256
+	ccmn	w2, #1, 4, ne
+	beq	.L1178
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x24]
 	cmp	w1, w0
-	bcc	.L1158
+	bcc	.L1179
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 960
+	mov	w2, 982
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1158:
-	add	x1, x29, 96
+.L1179:
+	add	x1, x29, 80
 	ldr	w0, [x22, 4]
 	mov	w2, 1
 	str	w0, [x1, -4]!
@@ -8478,40 +8505,39 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1159
+	beq	.L1180
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1160
-	adrp	x0, .LC36
+	cbnz	w0, .L1181
+	adrp	x0, .LC41
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC36
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1160:
+.L1181:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1159:
-	add	x20, x20, 32
-	b	.L1154
-.L1161:
+.L1180:
+	add	x19, x19, 32
+	b	.L1176
+.L1182:
 	adrp	x0, .LANCHOR3
-	ldrb	w1, [x19, 6]
+	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1153
+	bcc	.L1175
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 975
+	mov	w2, 997
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1153:
+.L1175:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
@@ -8525,64 +8551,25 @@ FtlGcFreeTempBlock:
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR133
-	ldrh	w20, [x19, #:lo12:.LANCHOR53]
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w20, w1
-	str	x27, [sp, 80]
-	beq	.L1169
+	cmp	w2, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L1190
 	adrp	x1, .LANCHOR19
 	add	x0, x19, :lo12:.LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L1169
-	adrp	x0, .LANCHOR43
-	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR43]
-	ldrh	w0, [x1, x20]
-	cmp	w0, 4
-	bls	.L1170
-	sub	w0, w0, #5
-	strh	w0, [x1, x20]
-	mov	w0, 1
-	bl	FtlEctTblFlush
-.L1170:
-	ldr	w0, [x21, #:lo12:.LANCHOR133]
-	cbnz	w0, .L1171
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
-	ldr	w1, [x0, 96]
-	add	w1, w1, 1
-	str	w1, [x0, 96]
-	ldr	w0, [x29, 108]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1171:
-	str	wzr, [x21, #:lo12:.LANCHOR133]
-	mov	w0, 1
-.L1168:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1169:
+.L1190:
+	adrp	x0, .LANCHOR133
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
-	str	wzr, [x21, #:lo12:.LANCHOR133]
-	add	x0, x19, :lo12:.LANCHOR53
+	str	wzr, [x0, #:lo12:.LANCHOR133]
 	cmp	w2, w1
-	bne	.L1173
-.L1188:
-	mov	w0, 0
-	b	.L1168
-.L1173:
+	add	x0, x19, :lo12:.LANCHOR53
+	beq	.L1192
 	ldrb	w1, [x0, 7]
 	adrp	x0, .LANCHOR19
 	adrp	x20, .LANCHOR70
@@ -8591,25 +8578,25 @@ FtlGcFreeTempBlock:
 	ldrh	w2, [x20, #:lo12:.LANCHOR70]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1174
+	beq	.L1193
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
-	mov	w2, 162
+	mov	w2, 164
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1174:
+.L1193:
 	add	x0, x19, :lo12:.LANCHOR53
-	adrp	x23, .LANCHOR42
+	adrp	x22, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
 	adrp	x25, .LANCHOR152
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LANCHOR170
+	add	x26, x20, :lo12:.LANCHOR70
 	ldrb	w0, [x0, 7]
 	add	x25, x25, :lo12:.LANCHOR152
-	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	add	x26, x26, :lo12:.LANCHOR170
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	mov	w21, 0
+	adrp	x27, .LANCHOR71
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	adrp	x1, .LANCHOR84
@@ -8617,19 +8604,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR84]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR84]
-.L1175:
-	ldrh	w0, [x20, #:lo12:.LANCHOR70]
+.L1194:
+	ldrh	w0, [x26]
 	cmp	w0, w21
-	bhi	.L1179
+	bhi	.L1198
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	ldr	x2, [x23, #:lo12:.LANCHOR42]
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1180
+	cbz	w1, .L1199
 	bl	INSERT_DATA_LIST
-.L1181:
+.L1200:
 	adrp	x0, .LANCHOR68
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR70]
@@ -8637,66 +8624,69 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR68]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR144
-	strh	w21, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
+	strh	w21, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR171
 	ldrh	w0, [x0, #:lo12:.LANCHOR171]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1188
+	ble	.L1192
 	adrp	x0, .LANCHOR100
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1188
-.L1179:
-	adrp	x0, .LANCHOR71
+.L1192:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1198:
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR71]
+	ldr	x28, [x27, #:lo12:.LANCHOR71]
+	ldr	w1, [x25]
 	umull	x24, w21, w24
-	ldr	w0, [x25]
-	add	x22, x27, x24
-	ldr	w1, [x22, 8]
-	cmp	w1, w0
-	bcc	.L1176
-	adrp	x0, .LC1
-	mov	w2, 168
-	mov	x1, x26
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1176:
-	ldr	w0, [x22, 8]
+	add	x23, x28, x24
+	ldr	w0, [x23, 8]
+	cmp	w0, w1
+	bcc	.L1195
+.L1203:
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	b	.L1204
+.L1195:
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x27, x24]
+	ldr	w0, [x28, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1177
+	bne	.L1197
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
-	ldr	w0, [x22, 8]
+	ldr	w0, [x23, 8]
 	mov	w2, 1
-	add	x1, x22, 4
+	add	x1, x23, 4
 	bl	log2phys
 	mov	w0, w24
-.L1187:
+.L1204:
 	bl	decrement_vpc_count
-.L1178:
+	b	.L1196
+.L1197:
+	ldr	w0, [x23, 4]
+	cmp	w1, w0
+	bne	.L1203
+.L1196:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1175
-.L1177:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L1178
-	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1187
-.L1180:
+	b	.L1194
+.L1199:
 	bl	INSERT_FREE_LIST
-	b	.L1181
+	b	.L1200
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -8715,7 +8705,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1189
+	bcc	.L1205
 	adrp	x0, .LANCHOR129
 	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapBlkWriteDump_data
@@ -8723,7 +8713,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR133
 	str	wzr, [x0, #:lo12:.LANCHOR133]
-.L1189:
+.L1205:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -8775,59 +8765,44 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1195:
+.L1211:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1198
+	bcc	.L1214
 	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1199
+	cbnz	w0, .L1216
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1201
-.L1198:
+	mov	w0, 1
+.L1210:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1214:
 	ldr	x2, [x20, #:lo12:.LANCHOR104]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
+	ldr	x3, [x1, 16]
 	cmn	w2, #1
-	bne	.L1196
-	adrp	x0, .LANCHOR53
-	adrp	x3, .LANCHOR42
-	ldrh	w4, [x0, #:lo12:.LANCHOR53]
-	ldr	x3, [x3, #:lo12:.LANCHOR42]
-	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
-	ldr	w2, [x0, 96]
-	add	w2, w2, 1
-	str	w2, [x0, 96]
-	ldr	w0, [x1, 4]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L1201:
-	mov	w0, 1
-.L1194:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L1196:
-	ldr	x0, [x1, 16]
+	bne	.L1212
+.L1218:
 	ldr	w1, [x1, 4]
-	ldp	w2, w0, [x0, 8]
+	ldr	w0, [x3, 12]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1195
-.L1199:
+	b	.L1211
+.L1212:
+	ldr	w2, [x3, 8]
+	b	.L1218
+.L1216:
 	mov	w0, 0
-	b	.L1194
+	b	.L1210
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -8842,11 +8817,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1203
+	beq	.L1220
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1204
-.L1203:
+	cbnz	w0, .L1221
+.L1220:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -8860,7 +8835,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1204:
+.L1221:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8880,69 +8855,69 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1258
-	adrp	x1, .LANCHOR45
-	ldrh	w1, [x1, #:lo12:.LANCHOR45]
+	cbnz	w1, .L1280
+	adrp	x1, .LANCHOR44
+	ldrh	w1, [x1, #:lo12:.LANCHOR44]
 	cmp	w1, 47
-	bls	.L1258
+	bls	.L1280
 	adrp	x1, .LANCHOR73
 	mov	w4, 65535
 	ldrh	w3, [x1, #:lo12:.LANCHOR73]
 	cmp	w3, w4
-	beq	.L1208
+	beq	.L1225
 	adrp	x2, .LANCHOR72
 	ldrh	w5, [x2, #:lo12:.LANCHOR72]
 	cmp	w5, w4
-	bne	.L1208
+	bne	.L1225
 	strh	w3, [x2, #:lo12:.LANCHOR72]
 	mov	w2, -1
 	strh	w2, [x1, #:lo12:.LANCHOR73]
-.L1208:
-	cbnz	w0, .L1259
+.L1225:
+	cbnz	w0, .L1281
 	adrp	x1, .LANCHOR48
 	ldrh	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 24
-	bhi	.L1260
+	bhi	.L1282
 	adrp	x2, .LANCHOR19
 	cmp	w1, 16
 	ldrh	w20, [x2, #:lo12:.LANCHOR19]
-	bls	.L1211
+	bls	.L1228
 	lsr	w20, w20, 5
-.L1210:
+.L1227:
 	adrp	x2, .LANCHOR100
 	ldrh	w3, [x2, #:lo12:.LANCHOR100]
 	cmp	w3, w1
 	mov	x3, x2
-	bcs	.L1214
+	bcs	.L1231
 	adrp	x1, .LANCHOR53
 	mov	w4, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w4
-	bne	.L1215
+	bne	.L1232
 	adrp	x4, .LANCHOR72
 	ldrh	w4, [x4, #:lo12:.LANCHOR72]
 	cmp	w4, w1
-	bne	.L1215
+	bne	.L1232
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1216
+	cbnz	w0, .L1233
 	adrp	x1, .LANCHOR152
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR152]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1217
-.L1216:
+	bcs	.L1234
+.L1233:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1218:
+.L1235:
 	adrp	x1, .LANCHOR95
 	str	wzr, [x1, #:lo12:.LANCHOR95]
-.L1206:
+.L1223:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8950,79 +8925,79 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1211:
+.L1228:
 	cmp	w1, 12
-	bls	.L1212
+	bls	.L1229
 	lsr	w20, w20, 4
-	b	.L1210
-.L1212:
+	b	.L1227
+.L1229:
 	cmp	w1, 8
-	bls	.L1210
+	bls	.L1227
 	lsr	w20, w20, 2
-	b	.L1210
-.L1260:
+	b	.L1227
+.L1282:
 	mov	w20, 1
-	b	.L1210
-.L1217:
+	b	.L1227
+.L1234:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR100]
-	b	.L1218
-.L1215:
+	b	.L1235
+.L1232:
 	adrp	x1, .LANCHOR171
 	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR100]
-.L1214:
+.L1231:
 	adrp	x1, .LANCHOR74
 	ldrh	w1, [x1, #:lo12:.LANCHOR74]
-	cbz	w1, .L1209
+	cbz	w1, .L1226
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1209:
-	adrp	x19, .LANCHOR144
+.L1226:
+	adrp	x19, .LANCHOR145
 	str	w0, [x29, 152]
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR144]
+	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w2, w0
-	bne	.L1221
+	bne	.L1238
 	adrp	x0, .LANCHOR72
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
 	cmp	w1, w2
-	beq	.L1222
+	beq	.L1239
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1223
+	cbnz	w1, .L1240
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1223:
+.L1240:
 	ldrh	w1, [x0, #:lo12:.LANCHOR72]
-	strh	w1, [x19, #:lo12:.LANCHOR144]
+	strh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR72]
-.L1222:
-	add	x0, x19, :lo12:.LANCHOR144
+.L1239:
+	add	x0, x19, :lo12:.LANCHOR145
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	beq	.L1221
+	beq	.L1238
 	bl	IsBlkInGcList
-	cbz	w0, .L1225
+	cbz	w0, .L1242
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1225:
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1242:
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR144
+	add	x22, x19, :lo12:.LANCHOR145
 	cmp	w1, w0
-	beq	.L1221
+	beq	.L1238
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR173
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	strh	wzr, [x22, 2]
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR42
@@ -9031,56 +9006,60 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1221:
+.L1238:
 	adrp	x1, .LANCHOR51
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1226
+	beq	.L1243
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1227
-.L1226:
+	beq	.L1243
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1244
+.L1243:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1227:
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1244:
 	adrp	x25, .LANCHOR102
 	add	x26, x25, :lo12:.LANCHOR102
-.L1256:
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+.L1278:
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1228
+	bne	.L1245
 	adrp	x0, .LANCHOR95
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR95]
-.L1229:
+.L1246:
 	ldrh	w5, [x25, #:lo12:.LANCHOR102]
 	add	x7, x25, :lo12:.LANCHOR102
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR144]
+	strh	w6, [x19, #:lo12:.LANCHOR145]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1230
+	bne	.L1247
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1206
-.L1259:
+	b	.L1223
+.L1281:
 	mov	w20, 1
-	b	.L1209
-.L1230:
+	b	.L1226
+.L1247:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1231
+	cbz	w0, .L1248
 	strh	w5, [x25, #:lo12:.LANCHOR102]
-	b	.L1229
-.L1231:
+	b	.L1246
+.L1248:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -9092,82 +9071,82 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1233
+	bgt	.L1250
 	cmp	w5, 48
-	bls	.L1234
+	bls	.L1251
 	cmp	w3, 8
-	bls	.L1234
+	bls	.L1251
 	adrp	x3, .LANCHOR68
 	ldrh	w3, [x3, #:lo12:.LANCHOR68]
 	cmp	w3, 35
-	bhi	.L1234
-.L1233:
+	bhi	.L1251
+.L1250:
 	strh	wzr, [x26]
-.L1234:
+.L1251:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1235
+	bgt	.L1252
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1235
+	bhi	.L1252
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1286:
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1311:
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1206
-.L1235:
-	cbnz	w1, .L1236
+	b	.L1223
+.L1252:
+	cbnz	w1, .L1253
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1229
-.L1236:
-	add	x0, x19, :lo12:.LANCHOR144
+	b	.L1246
+.L1253:
+	add	x0, x19, :lo12:.LANCHOR145
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1237
+	bne	.L1254
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 700
+	mov	w2, 717
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1237:
+.L1254:
 	adrp	x0, .LANCHOR52
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1238
+	bne	.L1255
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 701
+	mov	w2, 718
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1238:
+.L1255:
 	adrp	x0, .LANCHOR53
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1239
+	bne	.L1256
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 702
+	mov	w2, 719
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1239:
-	add	x22, x19, :lo12:.LANCHOR144
+.L1256:
+	add	x22, x19, :lo12:.LANCHOR145
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR173
-	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
@@ -9175,7 +9154,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR174]
 	strb	wzr, [x22, 6]
-.L1228:
+.L1245:
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR19
@@ -9183,9 +9162,9 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1240
+	cbz	w0, .L1257
 	adrp	x0, .LANCHOR3
-	ldrh	w2, [x19, #:lo12:.LANCHOR144]
+	ldrh	w2, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR42
@@ -9196,24 +9175,24 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1240:
-	add	x0, x19, :lo12:.LANCHOR144
+.L1257:
+	add	x0, x19, :lo12:.LANCHOR145
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1241
+	ble	.L1258
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1241:
+.L1258:
 	adrp	x0, .LANCHOR173
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 144]
-.L1242:
+.L1259:
 	cmp	w20, w28, uxth
-	bls	.L1250
-	add	x1, x19, :lo12:.LANCHOR144
+	bls	.L1267
+	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x0, .LANCHOR3
 	adrp	x23, .LANCHOR66
 	add	x1, x1, 16
@@ -9224,25 +9203,25 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1251
-.L1244:
+	b	.L1268
+.L1261:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1243
+	beq	.L1260
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1243:
+.L1260:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1251:
+.L1268:
 	cmp	w2, w7
-	bne	.L1244
-	add	x1, x19, :lo12:.LANCHOR144
+	bne	.L1261
+	add	x1, x19, :lo12:.LANCHOR145
 	adrp	x24, .LANCHOR62
 	add	x24, x24, :lo12:.LANCHOR62
 	ldrb	w2, [x1, 8]
@@ -9251,45 +9230,45 @@ rk_ftl_garbage_collect:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 136]
-.L1245:
+.L1262:
 	ldr	x0, [x29, 136]
 	cmp	x22, x0
-	bne	.L1249
+	bne	.L1266
 	add	w28, w28, 1
-	b	.L1242
-.L1249:
+	b	.L1259
+.L1266:
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1246
+	beq	.L1263
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1246
+	bne	.L1263
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1247
+	bne	.L1264
 	str	w4, [x29, 112]
-	mov	w2, 736
+	mov	w2, 753
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 112]
-.L1247:
+.L1264:
 	mov	w2, 0
-	add	x1, x29, 172
+	add	x1, x29, 168
 	mov	w0, w4
 	bl	log2phys
 	ldr	x0, [x23, #:lo12:.LANCHOR66]
-	ldr	w1, [x29, 172]
+	ldr	w1, [x29, 168]
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1246
+	bne	.L1263
 	ldr	x1, [x29, 144]
 	adrp	x4, .LANCHOR104
 	ldr	x2, [x29, 144]
@@ -9316,7 +9295,7 @@ rk_ftl_garbage_collect:
 	str	x4, [x2, 8]
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	ldr	w2, [x29, 172]
+	ldr	w2, [x29, 168]
 	str	w2, [x27, 12]
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
@@ -9331,65 +9310,111 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1248
+	beq	.L1265
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1246
-.L1248:
+	cbnz	w0, .L1263
+.L1265:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1246
-.L1287:
+	cbz	w0, .L1263
+	add	x0, x19, :lo12:.LANCHOR145
+	mov	w1, -1
 	str	wzr, [x21, #:lo12:.LANCHOR94]
-	b	.L1286
-.L1246:
+	strh	w1, [x19, #:lo12:.LANCHOR145]
+	strh	wzr, [x0, 2]
+	b	.L1311
+.L1263:
 	add	x22, x22, 32
-	b	.L1245
-.L1250:
-	add	x1, x19, :lo12:.LANCHOR144
+	b	.L1262
+.L1267:
+	add	x1, x19, :lo12:.LANCHOR145
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1252
+	bhi	.L1269
 	adrp	x0, .LANCHOR62
 	ldr	w0, [x0, #:lo12:.LANCHOR62]
-	cbz	w0, .L1253
+	cbz	w0, .L1270
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1287
-.L1253:
+	cbz	w0, .L1270
+	str	wzr, [x21, #:lo12:.LANCHOR94]
+	b	.L1311
+.L1270:
 	adrp	x0, .LANCHOR173
 	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1254
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L1254
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	cbnz	w0, .L1271
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	adrp	x20, .LANCHOR42
+	add	x0, x19, :lo12:.LANCHOR145
+	ldr	x3, [x20, #:lo12:.LANCHOR42]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w4, [x3, x2]
+	cbz	w4, .L1271
+	adrp	x2, .LANCHOR174
+	adrp	x22, .LANCHOR152
+	add	x23, x22, :lo12:.LANCHOR152
+	mov	w24, 0
+	ldrh	w5, [x2, #:lo12:.LANCHOR174]
+	mov	w3, 0
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+.L1272:
+	ldr	w0, [x23]
+	cmp	w24, w0
+	bcs	.L1274
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w24
+	bl	log2phys
+	ldr	w3, [x29, 172]
+	cmn	w3, #1
+	beq	.L1273
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	cmp	w1, w0, uxth
+	bne	.L1273
+	adrp	x0, .LC43
+	mov	w2, w3
+	mov	w1, w24
+	add	x0, x0, :lo12:.LC43
+	bl	printf
+.L1274:
+	ldr	w0, [x22, #:lo12:.LANCHOR152]
+	cmp	w24, w0
+	bcc	.L1271
+	ldrh	w1, [x19, #:lo12:.LANCHOR145]
+	ldr	x0, [x20, #:lo12:.LANCHOR42]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19, #:lo12:.LANCHOR145]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1254:
+.L1271:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR144]
-.L1252:
+	strh	w0, [x19, #:lo12:.LANCHOR145]
+.L1269:
 	adrp	x0, .LANCHOR48
 	str	wzr, [x21, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1255
+	bhi	.L1277
 	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1256
-.L1255:
+	b	.L1278
+.L1273:
+	add	w24, w24, 1
+	b	.L1272
+.L1277:
 	add	w0, w0, 1
-	b	.L1206
-.L1258:
+	b	.L1223
+.L1280:
 	mov	w0, 0
-	b	.L1206
+	b	.L1223
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
@@ -9408,13 +9433,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1289
+	bne	.L1313
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1288:
+.L1312:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9423,18 +9448,18 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1289:
+.L1313:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1310
+	bhi	.L1334
 	adrp	x0, .LANCHOR166
 	ldr	w21, [x0, #:lo12:.LANCHOR166]
 	cmn	w21, #1
-	beq	.L1288
+	beq	.L1312
 	adrp	x22, .LANCHOR12
 	adrp	x25, .LANCHOR135
 	add	x25, x25, :lo12:.LANCHOR135
@@ -9462,47 +9487,47 @@ FtlRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR89]
-.L1291:
+.L1315:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1308
+	cbnz	w0, .L1332
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L1309
+	cbnz	w0, .L1333
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1288
-.L1309:
+	bhi	.L1312
+.L1333:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1288
-.L1308:
+	b	.L1312
+.L1332:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1292
+	bne	.L1316
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1293:
+.L1317:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1295
-.L1296:
+	bcc	.L1319
+.L1320:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1300
+	beq	.L1324
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1291
-.L1300:
-	cbz	w27, .L1291
+	bne	.L1315
+.L1324:
+	cbz	w27, .L1315
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	mov	w1, w27
 	mov	w2, 0
@@ -9521,57 +9546,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1307:
+.L1331:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1302
+	bne	.L1326
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR109
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1303
+	bne	.L1327
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1321:
+.L1345:
 	bl	ftl_memcpy
-.L1303:
+.L1327:
 	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1304
+	beq	.L1328
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1304:
+.L1328:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1305
+	bne	.L1329
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1306:
+.L1330:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1307
+	bne	.L1331
 	mov	w27, 0
-	b	.L1291
-.L1295:
+	b	.L1315
+.L1319:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1294
+	bhi	.L1318
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1294
+	bls	.L1318
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -9582,17 +9607,17 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1294:
+.L1318:
 	add	w4, w4, 1
-	b	.L1293
-.L1292:
+	b	.L1317
+.L1316:
 	ldr	x2, [x28, #:lo12:.LANCHOR103]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1297
+	bne	.L1321
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	str	x1, [x0, 8]
@@ -9605,9 +9630,9 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1298
+	bne	.L1322
 	str	x23, [x0, 8]
-.L1298:
+.L1322:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR115
 	str	w20, [x0, 24]
@@ -9618,10 +9643,10 @@ FtlRead:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1296
-.L1297:
+	b	.L1320
+.L1321:
 	cmp	w20, w24
-	bne	.L1299
+	bne	.L1323
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	adrp	x1, .LANCHOR110
 	ldr	w3, [x29, 136]
@@ -9631,25 +9656,25 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1298
-.L1320:
+	bne	.L1322
+.L1344:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1298
-.L1299:
+	b	.L1322
+.L1323:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1320
-.L1302:
+	b	.L1344
+.L1326:
 	cmp	w24, w1
-	bne	.L1303
+	bne	.L1327
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR110
 	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	cmp	x1, x0
-	bne	.L1303
+	bne	.L1327
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -9657,18 +9682,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1321
-.L1305:
+	b	.L1345
+.L1329:
 	cmp	w1, 256
-	bne	.L1306
+	bne	.L1330
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1306
-.L1310:
+	b	.L1330
+.L1334:
 	mov	w21, -1
-	b	.L1288
+	b	.L1312
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -9690,20 +9715,20 @@ FtlWrite:
 	and	w0, w0, 255
 	cmp	w0, 16
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w1
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
 	stp	x25, x26, [sp, 64]
 	mov	x26, x3
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	str	w2, [x29, 164]
-	bne	.L1324
+	str	w2, [x29, 172]
+	bne	.L1348
 	add	w0, w1, 256
-	ldr	w1, [x29, 164]
+	ldr	w1, [x29, 172]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1323:
+.L1347:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9711,46 +9736,47 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1324:
-	ldr	w0, [x29, 164]
+.L1348:
+	ldr	w0, [x29, 172]
 	add	w0, w1, w0
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR34
 	ldr	w1, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1356
+	bhi	.L1380
 	adrp	x0, .LANCHOR166
 	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmn	w0, #1
-	beq	.L1323
+	beq	.L1347
 	adrp	x0, .LANCHOR176
 	mov	w1, 2048
-	adrp	x22, .LANCHOR12
-	ldr	w2, [x29, 164]
+	ldr	w2, [x29, 152]
 	str	w1, [x0, #:lo12:.LANCHOR176]
-	ldr	w1, [x29, 152]
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	sub	w1, w1, #1
-	udiv	w25, w21, w0
-	udiv	w0, w1, w0
-	adrp	x1, .LANCHOR162
+	adrp	x1, .LANCHOR12
+	sub	w2, w2, #1
+	ldr	w3, [x29, 172]
+	ldrh	w0, [x1, #:lo12:.LANCHOR12]
+	str	x1, [x29, 160]
+	udiv	w25, w23, w0
+	udiv	w0, w2, w0
+	adrp	x2, .LANCHOR162
 	mov	w19, w25
 	str	w0, [x29, 144]
 	sub	w0, w0, w25
 	add	w24, w0, 1
 	str	w0, [x29, 140]
-	ldr	w0, [x1, #:lo12:.LANCHOR162]
-	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR162]
-	adrp	x1, .LANCHOR85
-	ldr	w0, [x1, #:lo12:.LANCHOR85]
+	ldr	w0, [x2, #:lo12:.LANCHOR162]
+	add	w0, w0, w3
+	str	w0, [x2, #:lo12:.LANCHOR162]
+	adrp	x2, .LANCHOR85
+	ldr	w0, [x2, #:lo12:.LANCHOR85]
 	add	w0, w0, w24
-	str	w0, [x1, #:lo12:.LANCHOR85]
+	str	w0, [x2, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR51
 	add	x20, x0, :lo12:.LANCHOR51
-.L1326:
-	cbnz	w24, .L1351
+.L1350:
+	cbnz	w24, .L1375
 	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
@@ -9758,11 +9784,11 @@ FtlWrite:
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1352
-.L1354:
+	bls	.L1376
+.L1378:
 	mov	w0, 0
-	b	.L1323
-.L1351:
+	b	.L1347
+.L1375:
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	adrp	x1, .LANCHOR3
@@ -9770,19 +9796,19 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR3]
 	cmp	w2, w0
-	bcc	.L1327
+	bcc	.L1351
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1016
+	mov	w2, 1038
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1327:
+.L1351:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1328
+	cbnz	w0, .L1352
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1328:
+.L1352:
 	ldrb	w0, [x20, 7]
 	ldrh	w1, [x20, 4]
 	lsl	w0, w0, 2
@@ -9795,244 +9821,251 @@ FtlWrite:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1329
+	bcc	.L1353
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1049
+	mov	w2, 1071
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1329:
+.L1353:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	str	xzr, [x29, 168]
+	mov	x28, 0
 	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 96]
-.L1330:
-	ldr	w1, [x29, 148]
+.L1354:
+	ldr	w0, [x29, 148]
+	mov	w22, w28
 	adrp	x27, .LANCHOR105
-	ldr	w23, [x29, 168]
-	cmp	w23, w1
-	bcc	.L1349
-	mov	x23, x1
-.L1331:
+	cmp	w28, w0
+	bcc	.L1373
+	mov	x22, x0
+.L1355:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x3, x20
 	mov	w2, 0
-	mov	w1, w23
+	mov	w1, w22
 	bl	FtlProgPages
-	cmp	w24, w23
-	bcs	.L1350
+	cmp	w24, w22
+	bcs	.L1374
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1126
+	mov	w2, 1149
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1350:
-	sub	w24, w24, w23
-	b	.L1326
-.L1349:
+.L1374:
+	sub	w24, w24, w22
+	b	.L1350
+.L1373:
 	ldrh	w0, [x20, 4]
-	cbz	w0, .L1331
+	cbz	w0, .L1355
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w19
 	bl	log2phys
 	mov	x0, x20
+	lsl	x21, x28, 5
 	bl	get_new_active_ppa
-	ldr	x1, [x29, 168]
-	lsl	x28, x1, 5
 	ldr	x1, [x27, #:lo12:.LANCHOR105]
-	add	x1, x1, x28
+	add	x1, x1, x21
 	str	w0, [x1, 4]
 	ldr	x0, [x29, 104]
 	str	w19, [x1, 24]
 	ldrh	w2, [x0]
-	mul	w23, w23, w2
-	and	x0, x23, 4294967292
+	mul	w22, w22, w2
+	and	x0, x22, 4294967292
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR115
 	ldr	x3, [x29, 128]
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	str	x0, [x29, 120]
-	add	x23, x0, x3
-	str	x23, [x1, 16]
-	mov	x0, x23
+	add	x22, x0, x3
+	str	x22, [x1, 16]
+	mov	x0, x22
 	mov	w1, 0
 	bl	ftl_memset
 	ldr	w0, [x29, 144]
 	cmp	w19, w25
 	ccmp	w19, w0, 4, ne
-	bne	.L1332
+	bne	.L1356
 	cmp	w19, w25
-	bne	.L1333
-	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	udiv	w0, w21, w2
-	msub	w0, w0, w2, w21
+	ldr	x0, [x29, 160]
+	bne	.L1357
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
+	udiv	w0, w23, w2
+	msub	w0, w0, w2, w23
 	str	w0, [x29, 156]
 	sub	w2, w2, w0
-	ldr	w0, [x29, 164]
+	ldr	w0, [x29, 172]
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
-	str	w0, [x29, 160]
-.L1334:
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	ldr	w1, [x29, 160]
+	str	w0, [x29, 168]
+.L1358:
+	ldr	x0, [x29, 160]
+	ldr	w1, [x29, 168]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
 	cmp	w1, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	bne	.L1335
-	add	x3, x0, x28
+	bne	.L1359
+	add	x21, x0, x21
 	cmp	w19, w25
-	bne	.L1336
-	str	x26, [x3, 8]
-.L1337:
+	bne	.L1360
+	str	x26, [x21, 8]
+.L1361:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1346
+	bcc	.L1370
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1117
+	mov	w2, 1140
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1346:
+.L1370:
 	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
+	add	x28, x28, 1
 	strh	w0, [x1, x2]
 	adrp	x1, .LANCHOR83
 	ldr	w0, [x1, #:lo12:.LANCHOR83]
-	stp	w0, w19, [x23, 4]
+	stp	w0, w19, [x22, 4]
 	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x1, #:lo12:.LANCHOR83]
 	ldr	w0, [x29, 188]
-	str	w0, [x23, 12]
+	str	w0, [x22, 12]
 	ldrh	w0, [x20]
-	strh	w0, [x23, 2]
-	ldr	x0, [x29, 168]
-	add	x0, x0, 1
-	str	x0, [x29, 168]
-	b	.L1330
-.L1333:
+	strh	w0, [x22, 2]
+	b	.L1354
+.L1357:
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x29, 152]
-	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	str	wzr, [x29, 156]
 	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
-	stp	wzr, w0, [x29, 156]
-	b	.L1334
-.L1336:
-	ldr	w0, [x29, 160]
-.L1364:
+	str	w0, [x29, 168]
+	b	.L1358
+.L1360:
+	ldr	w0, [x29, 168]
+.L1388:
 	mul	w0, w0, w19
-	sub	w0, w0, w21
+	sub	w0, w0, w23
 	lsl	w0, w0, 9
 	add	x0, x26, x0
-	str	x0, [x3, 8]
-	b	.L1337
-.L1335:
-	add	x0, x0, x28
+	str	x0, [x21, 8]
+	b	.L1361
+.L1359:
+	add	x0, x0, x21
 	cmp	w19, w25
-	bne	.L1338
+	bne	.L1362
 	adrp	x1, .LANCHOR109
 	ldr	x1, [x1, #:lo12:.LANCHOR109]
-.L1363:
+.L1387:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1340
+	beq	.L1364
 	str	w0, [x29, 196]
 	mov	w2, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	str	w19, [x29, 216]
-	add	x0, x0, x28
+	add	x0, x0, x21
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 200]
 	mov	w1, 1
 	add	x0, x29, 192
 	bl	FlashReadPages
-	ldr	w0, [x29, 192]
-	cmn	w0, #1
-	bne	.L1341
+	ldr	w3, [x29, 192]
+	cmn	w3, #1
+	bne	.L1365
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
+	mov	w2, w19
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1344:
-	ldr	w0, [x29, 160]
+	ldr	w1, [x22, 8]
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	printf
+.L1368:
+	ldr	w0, [x29, 168]
 	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1345
+	bne	.L1369
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x1, x26
-	add	x3, x0, x28
+	add	x21, x0, x21
 	ldr	w0, [x29, 156]
-	ldr	x3, [x3, 8]
+	ldr	x3, [x21, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1365:
+.L1389:
 	bl	ftl_memcpy
-	b	.L1337
-.L1338:
+	b	.L1361
+.L1362:
 	adrp	x1, .LANCHOR110
 	ldr	x1, [x1, #:lo12:.LANCHOR110]
-	b	.L1363
-.L1341:
-	ldr	w1, [x23, 8]
+	b	.L1387
+.L1365:
+	ldr	w1, [x22, 8]
 	cmp	w19, w1
-	beq	.L1343
+	beq	.L1367
 	adrp	x0, .LANCHOR135
 	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC37
+	adrp	x0, .LC45
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC37
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L1343:
-	ldr	w0, [x23, 8]
+.L1367:
+	ldr	w0, [x22, 8]
 	cmp	w19, w0
-	beq	.L1344
-	mov	w2, 1102
+	beq	.L1368
+	mov	w2, 1125
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1344
-.L1340:
+	b	.L1368
+.L1364:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	ldr	x1, [x29, 96]
-	add	x0, x0, x28
+	add	x0, x0, x21
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1344
-.L1345:
-	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	b	.L1368
+.L1369:
+	ldr	x0, [x29, 160]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	add	x3, x0, x28
+	add	x21, x0, x21
 	mul	w1, w1, w19
-	sub	w1, w1, w21
-	ldr	x0, [x3, 8]
+	sub	w1, w1, w23
+	ldr	x0, [x21, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1365
-.L1332:
+	b	.L1389
+.L1356:
 	ldr	x0, [x27, #:lo12:.LANCHOR105]
-	add	x3, x0, x28
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1364
-.L1352:
+	add	x21, x0, x21
+	ldr	x0, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	b	.L1388
+.L1376:
 	adrp	x23, .LANCHOR72
 	adrp	x20, .LANCHOR101
 	adrp	x21, .LANCHOR100
@@ -10040,19 +10073,19 @@ FtlWrite:
 	add	x20, x20, :lo12:.LANCHOR101
 	add	x21, x21, :lo12:.LANCHOR100
 	mov	w19, 256
-.L1355:
-	adrp	x0, .LANCHOR144
+.L1379:
+	adrp	x0, .LANCHOR145
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR145]
 	cmp	w0, w1
-	bne	.L1353
+	bne	.L1377
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1353
+	bne	.L1377
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1353:
+.L1377:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -10064,13 +10097,13 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1354
+	bhi	.L1378
 	subs	w19, w19, #1
-	bne	.L1355
-	b	.L1354
-.L1356:
+	bne	.L1379
+	b	.L1378
+.L1380:
 	mov	w0, -1
-	b	.L1323
+	b	.L1347
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
@@ -10112,10 +10145,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR139]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1368
-.L1379:
+	bne	.L1392
+.L1403:
 	mov	w0, -1
-.L1367:
+.L1391:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10123,7 +10156,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1368:
+.L1392:
 	add	x24, x20, :lo12:.LANCHOR139
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -10135,28 +10168,28 @@ FtlLoadSysInfo:
 	ldrsh	w24, [x20, #:lo12:.LANCHOR139]
 	add	x26, x26, :lo12:.LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR178
-.L1370:
-	tbz	w28, #31, .L1376
+.L1394:
+	tbz	w28, #31, .L1400
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1465
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1375:
+.L1399:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1378
+	bcs	.L1402
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1467
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1378:
+.L1402:
 	add	x24, x19, :lo12:.LANCHOR138
 	adrp	x19, .LANCHOR39
 	add	x22, x19, :lo12:.LANCHOR39
@@ -10185,7 +10218,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1379
+	bne	.L1403
 	add	x20, x20, :lo12:.LANCHOR139
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x22, 8]
@@ -10193,7 +10226,7 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1379
+	bne	.L1403
 	adrp	x0, .LANCHOR179
 	adrp	x2, .LANCHOR152
 	adrp	x3, .LANCHOR3
@@ -10218,18 +10251,18 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR171
 	strh	w0, [x3, #:lo12:.LANCHOR171]
-	bls	.L1380
+	bls	.L1404
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1489
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1380:
+.L1404:
 	add	x4, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x2, x0, :lo12:.LANCHOR51
-	adrp	x5, .LANCHOR144
+	adrp	x5, .LANCHOR145
 	adrp	x20, .LANCHOR52
 	mov	x22, x5
 	ldrh	w1, [x4, 16]
@@ -10240,10 +10273,10 @@ FtlLoadSysInfo:
 	strb	w1, [x2, 6]
 	ldrb	w1, [x4, 11]
 	strb	w1, [x2, 8]
-	add	x1, x5, :lo12:.LANCHOR144
+	add	x1, x5, :lo12:.LANCHOR145
 	strh	w3, [x2, 2]
 	mov	w2, -1
-	strh	w2, [x5, #:lo12:.LANCHOR144]
+	strh	w2, [x5, #:lo12:.LANCHOR145]
 	add	x2, x20, :lo12:.LANCHOR52
 	strh	wzr, [x1, 2]
 	strb	wzr, [x1, 6]
@@ -10290,47 +10323,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR82
 	ldr	w4, [x1, #:lo12:.LANCHOR82]
 	cmp	w3, w4
-	bls	.L1381
+	bls	.L1405
 	str	w3, [x1, #:lo12:.LANCHOR82]
-.L1381:
+.L1405:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR83
 	ldr	w3, [x1, #:lo12:.LANCHOR83]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1382
+	bls	.L1406
 	str	w2, [x1, #:lo12:.LANCHOR83]
-.L1382:
+.L1406:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1383
+	beq	.L1407
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L1383:
+.L1407:
 	ldrh	w2, [x20, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1384
+	beq	.L1408
 	bl	make_superblock
-.L1384:
+.L1408:
 	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1385
+	beq	.L1409
 	bl	make_superblock
-.L1385:
-	ldrh	w2, [x22, #:lo12:.LANCHOR144]
+.L1409:
+	ldrh	w2, [x22, #:lo12:.LANCHOR145]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR144
+	add	x0, x22, :lo12:.LANCHOR145
 	cmp	w2, w1
-	beq	.L1386
+	beq	.L1410
 	bl	make_superblock
-.L1386:
+.L1410:
 	mov	w0, 0
-	b	.L1367
-.L1376:
+	b	.L1391
+.L1400:
 	add	x3, x19, :lo12:.LANCHOR138
 	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
@@ -10344,56 +10377,59 @@ FtlLoadSysInfo:
 	ldr	x3, [x29, 104]
 	ldr	x0, [x3, 16]
 	ldr	w8, [x0, 12]
-	cbz	w8, .L1371
+	cbz	w8, .L1395
+	ldr	w0, [x19, #:lo12:.LANCHOR138]
+	cmn	w0, #1
+	beq	.L1395
 	ldrh	w1, [x26]
 	ldr	x0, [x3, 8]
 	bl	js_hash
 	cmp	w8, w0
-	beq	.L1371
+	beq	.L1395
 	add	x10, x20, :lo12:.LANCHOR139
 	mov	w6, w0
 	mov	w5, w8
-	adrp	x0, .LC38
+	adrp	x0, .LC46
 	mov	w3, w28
 	mov	w2, w24
 	ldrh	w4, [x10, 4]
 	mov	x1, x27
-	add	x0, x0, :lo12:.LC38
+	add	x0, x0, :lo12:.LC46
 	str	x10, [x29, 104]
 	bl	printf
-	cbnz	w28, .L1372
+	cbnz	w28, .L1396
 	ldr	x10, [x29, 104]
 	ldrh	w0, [x10, 4]
 	cmp	w24, w0
-	beq	.L1372
+	beq	.L1396
 	sxth	w24, w0
 	adrp	x0, .LANCHOR20
 	ldrh	w7, [x0, #:lo12:.LANCHOR20]
 	sub	w7, w7, #1
-.L1395:
+.L1422:
 	sxth	w28, w7
-	b	.L1370
-.L1372:
+	b	.L1394
+.L1396:
 	mov	w0, -1
 	str	w0, [x19, #:lo12:.LANCHOR138]
-.L1371:
+.L1395:
 	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L1374
+	beq	.L1398
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w1
-	bne	.L1374
+	bne	.L1398
 	ldr	x0, [x25, #:lo12:.LANCHOR114]
 	ldrh	w1, [x0]
 	mov	w0, 61604
 	cmp	w1, w0
-	beq	.L1375
-.L1374:
+	beq	.L1399
+.L1398:
 	sub	w7, w28, #1
-	b	.L1395
+	b	.L1422
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -10442,21 +10478,21 @@ FtlMapTblRecovery:
 	add	x0, x26, :lo12:.LANCHOR20
 	str	w1, [x19, 56]
 	str	x0, [x29, 96]
-.L1397:
+.L1424:
 	ldr	w0, [x29, 152]
 	cmp	w20, w0
-	bge	.L1416
+	bge	.L1443
 	ldr	w0, [x29, 108]
 	sxtw	x28, w20
 	cmp	w20, w0
-	bne	.L1398
+	bne	.L1425
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x26, x24, x0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
-	mov	w22, 0
 	ldrh	w0, [x24, x0]
+	mov	w24, 0
 	bl	FtlGetLastWrittenPage
 	sxth	w1, w0
 	add	w0, w0, 1
@@ -10469,22 +10505,22 @@ FtlMapTblRecovery:
 	str	w0, [x19, 48]
 	add	x28, x28, :lo12:.LANCHOR180
 	ldr	x0, [x29, 128]
-	add	x24, x0, :lo12:.LANCHOR138
-.L1399:
+	add	x22, x0, :lo12:.LANCHOR138
+.L1426:
 	ldr	w0, [x29, 152]
-	cmp	w22, w0
-	ble	.L1402
-.L1416:
+	cmp	w24, w0
+	ble	.L1429
+.L1443:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L1404
+	bne	.L1431
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1404:
+.L1431:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -10497,54 +10533,57 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1402:
+.L1429:
 	ldrh	w0, [x26]
 	mov	w2, 1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x24, 4]
-	mov	x0, x24
+	orr	w0, w24, w0, lsl 10
+	str	w0, [x22, 4]
+	mov	x0, x22
 	bl	FlashReadPages
-	ldr	x0, [x24, 16]
+	ldr	x0, [x22, 16]
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1400
+	cbz	w0, .L1427
+	ldr	w0, [x22]
+	cmn	w0, #1
+	beq	.L1427
 	ldrh	w1, [x27]
-	ldr	x0, [x24, 8]
+	ldr	x0, [x22, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1400
+	beq	.L1427
 	mov	w5, w0
 	mov	x4, x1
-	mov	w3, w22
+	mov	w3, w24
 	mov	w2, w20
 	mov	x1, x28
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
 	mov	w0, -1
-	str	w0, [x24]
-.L1400:
-	ldr	w0, [x24]
+	str	w0, [x22]
+.L1427:
+	ldr	w0, [x22]
 	cmn	w0, #1
-	beq	.L1401
+	beq	.L1428
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1401
+	bls	.L1428
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1401
+	bne	.L1428
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x24, 4]
+	ldr	w1, [x22, 4]
 	str	w1, [x23, x0]
-.L1401:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L1399
-.L1398:
+.L1428:
+	add	w6, w24, 1
+	sxth	w24, w6
+	b	.L1426
+.L1425:
 	lsl	x2, x28, 1
 	ldr	x0, [x22, #:lo12:.LANCHOR106]
 	str	x0, [x27, 8]
@@ -10561,16 +10600,16 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1418
+	beq	.L1445
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1418
+	bne	.L1445
 	ldrh	w1, [x21, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L1406
-.L1418:
+	beq	.L1433
+.L1445:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	mov	w28, 0
@@ -10578,11 +10617,11 @@ FtlMapTblRecovery:
 	adrp	x0, .LANCHOR180
 	add	x0, x0, :lo12:.LANCHOR180
 	str	x0, [x29, 112]
-.L1407:
+.L1434:
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	cmp	w28, w0
-	bge	.L1414
+	bge	.L1441
 	ldr	x0, [x29, 136]
 	mov	w2, 1
 	mov	w1, w2
@@ -10595,69 +10634,72 @@ FtlMapTblRecovery:
 	ldr	w0, [x0, 12]
 	str	w0, [x29, 156]
 	uxtw	x0, w0
-	cbz	w0, .L1411
+	cbz	w0, .L1438
+	ldr	w0, [x27]
+	cmn	w0, #1
+	beq	.L1438
 	ldr	x0, [x29, 120]
 	ldrh	w1, [x0]
 	ldr	x0, [x27, 8]
 	bl	js_hash
 	ldr	w1, [x29, 156]
 	cmp	w1, w0
-	beq	.L1411
+	beq	.L1438
 	mov	x4, x1
 	ldr	x1, [x29, 112]
 	mov	w5, w0
 	mov	w3, w28
 	mov	w2, w20
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1411:
+.L1438:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L1412
+	beq	.L1439
 	ldrh	w0, [x21, 8]
 	cmp	w25, w0
-	bls	.L1412
+	bls	.L1439
 	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L1412
+	bne	.L1439
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x27, 4]
 	str	w1, [x23, x0]
-.L1412:
+.L1439:
 	add	w7, w28, 1
 	sxth	w28, w7
-	b	.L1407
-.L1406:
+	b	.L1434
+.L1433:
 	ldrh	w3, [x26, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR106]
 	sub	w3, w3, #1
-.L1408:
+.L1435:
 	cmp	w0, w3
-	blt	.L1410
-.L1414:
+	blt	.L1437
+.L1441:
 	add	w20, w20, 1
 	sxth	w20, w20
-	b	.L1397
-.L1410:
+	b	.L1424
+.L1437:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x4, x1]
 	cmp	w25, w1
-	bls	.L1409
+	bls	.L1436
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x4, x2, lsl 2]
 	str	w2, [x23, x1]
-.L1409:
+.L1436:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1408
+	b	.L1435
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -10731,20 +10773,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR139]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1437
-.L1439:
+	bne	.L1470
+.L1472:
 	mov	w21, -1
-.L1436:
+.L1469:
 	mov	w0, w21
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1437:
+.L1470:
 	bl	FtlLoadSysInfo
 	mov	w21, w0
-	cbnz	w0, .L1439
+	cbnz	w0, .L1472
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10760,19 +10802,19 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1440:
+.L1473:
 	cmp	w0, w2
-	bge	.L1445
+	bge	.L1478
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1441
-.L1445:
+	tbz	w3, #31, .L1474
+.L1478:
 	adrp	x3, .LANCHOR83
 	cmp	w0, w2
 	ldr	w1, [x3, #:lo12:.LANCHOR83]
 	add	w1, w1, 32
 	str	w1, [x3, #:lo12:.LANCHOR83]
-	bge	.L1447
-.L1442:
+	bge	.L1480
+.L1475:
 	adrp	x23, .LANCHOR51
 	add	x20, x23, :lo12:.LANCHOR51
 	mov	x0, x20
@@ -10811,17 +10853,17 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1449:
+.L1482:
 	bl	FtlVpcTblFlush
-	b	.L1436
-.L1441:
+	b	.L1469
+.L1474:
 	add	w0, w0, 1
-	b	.L1440
-.L1447:
+	b	.L1473
+.L1480:
 	ldrh	w0, [x19, #:lo12:.LANCHOR156]
-	cbnz	w0, .L1442
+	cbnz	w0, .L1475
 	bl	l2p_flush
-	b	.L1449
+	b	.L1482
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -10834,17 +10876,19 @@ ftl_low_format:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR4
 	str	wzr, [x0, #:lo12:.LANCHOR83]
-	ldrh	w0, [x24, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR143
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR82
+	str	wzr, [x0, #:lo12:.LANCHOR143]
+	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	str	wzr, [x20, #:lo12:.LANCHOR82]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1451
+	cbz	w0, .L1484
 	bl	FtlMakeBbt
-.L1451:
+.L1484:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR109
 	mov	w6, 23752
@@ -10855,31 +10899,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-.L1452:
+.L1485:
 	cmp	w0, w1
-	blt	.L1453
+	blt	.L1486
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1454:
+.L1487:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1455
+	bhi	.L1488
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1456
-.L1460:
+	bgt	.L1489
+.L1493:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1457:
+.L1490:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1461
+	bhi	.L1494
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -10896,28 +10940,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1462
+	ble	.L1495
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR152]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1462:
+.L1495:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1464
+	cbz	w1, .L1497
 	ldrh	w6, [x2, #:lo12:.LANCHOR171]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1464
+	bge	.L1497
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR171]
-.L1464:
+.L1497:
 	ldrh	w1, [x2, #:lo12:.LANCHOR171]
 	adrp	x25, .LANCHOR179
 	ldr	w0, [x3, #:lo12:.LANCHOR152]
@@ -10941,11 +10985,11 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR59
-	adrp	x1, .LANCHOR144
+	adrp	x1, .LANCHOR145
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-	add	x0, x1, :lo12:.LANCHOR144
-	strh	w23, [x1, #:lo12:.LANCHOR144]
+	add	x0, x1, :lo12:.LANCHOR145
+	strh	w23, [x1, #:lo12:.LANCHOR145]
 	mov	w1, 255
 	lsr	w2, w2, 3
 	strh	wzr, [x0, 2]
@@ -10961,20 +11005,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1466:
+.L1499:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1467
+	cbnz	w1, .L1500
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1466
-.L1453:
+	b	.L1499
+.L1486:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -10982,8 +11026,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1452
-.L1455:
+	b	.L1485
+.L1488:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -10991,8 +11035,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1454
-.L1456:
+	b	.L1487
+.L1489:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -11002,17 +11046,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1458:
+.L1491:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1460
+	bls	.L1493
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1458
-.L1461:
+	b	.L1491
+.L1494:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -11020,8 +11064,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1457
-.L1467:
+	b	.L1490
+.L1500:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11041,20 +11085,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1468:
+.L1501:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1469
+	cbnz	w1, .L1502
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1468
-.L1469:
+	b	.L1501
+.L1502:
 	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -11080,11 +11124,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1470
+	cbnz	w0, .L1503
 	adrp	x0, .LANCHOR166
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR166]
-.L1470:
+.L1503:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11099,8 +11143,8 @@ ftl_low_format:
 	.type	sftl_init, %function
 sftl_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC41
-	add	x1, x1, :lo12:.LC41
+	adrp	x1, .LC49
+	add	x1, x1, :lo12:.LC49
 	mov	w0, -1
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11108,8 +11152,8 @@ sftl_init:
 	adrp	x19, .LANCHOR181
 	add	x19, x19, :lo12:.LANCHOR181
 	str	w0, [x20, #:lo12:.LANCHOR166]
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	bl	printf
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
@@ -11119,34 +11163,21 @@ sftl_init:
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.L1476:
+.L1509:
 	bl	FtlLoadBbt
-	cbz	w0, .L1477
-.L1492:
+	cbz	w0, .L1510
+.L1520:
 	ldr	w0, [x19]
 	cmp	w0, 1
-	bne	.L1476
+	bne	.L1509
 	str	wzr, [x19]
 	bl	ftl_low_format
-	b	.L1476
-.L1477:
+	b	.L1509
+.L1510:
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1492
-	mov	w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 15
-	bhi	.L1489
-	mov	w19, 8129
-.L1483:
+	cbnz	w0, .L1520
 	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L1483
-.L1489:
-	mov	w0, 0
+	str	w1, [x20, #:lo12:.LANCHOR166]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -11167,17 +11198,17 @@ FtlWriteToIDB:
 	stp	x21, x22, [sp, 32]
 	adrp	x24, .LANCHOR182
 	stp	x27, x28, [sp, 80]
-	bls	.L1494
+	bls	.L1522
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1495
-.L1494:
+	bls	.L1523
+.L1522:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbnz	w0, .L1496
-.L1561:
+	cbnz	w0, .L1524
+.L1589:
 	mov	w19, 0
-	b	.L1493
-.L1496:
+	b	.L1521
+.L1524:
 	adrp	x0, .LANCHOR183
 	str	x0, [x29, 120]
 	mov	w1, 35899
@@ -11185,7 +11216,7 @@ FtlWriteToIDB:
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x23]
 	cmp	w2, w1
-	bne	.L1498
+	bne	.L1526
 	adrp	x21, .LANCHOR0
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w19, 65535
@@ -11194,9 +11225,9 @@ FtlWriteToIDB:
 	mov	x0, 262140
 	add	x2, x23, x0
 	mov	w0, 0
-.L1502:
+.L1530:
 	ldr	w4, [x2]
-	cbnz	w4, .L1499
+	cbnz	w4, .L1527
 	ldr	w4, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x2], -4
@@ -11204,13 +11235,13 @@ FtlWriteToIDB:
 	sub	w19, w19, #1
 	csel	w0, w0, wzr, cc
 	cmp	w19, 4096
-	bne	.L1502
+	bne	.L1530
 	mov	w19, 512
-	b	.L1501
-.L1499:
+	b	.L1529
+.L1527:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1501:
+.L1529:
 	add	w0, w19, 4
 	ubfiz	w1, w1, 2, 14
 	mov	w22, 0
@@ -11221,7 +11252,7 @@ FtlWriteToIDB:
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR78
 	add	x20, x0, :lo12:.LANCHOR78
-.L1524:
+.L1552:
 	adrp	x26, .LANCHOR184
 	mov	w1, 0
 	mov	x2, 512
@@ -11234,27 +11265,27 @@ FtlWriteToIDB:
 	add	x0, x0, :lo12:.LANCHOR78
 	ldr	x1, [x0, 32]
 	mul	w25, w27, w22
-	cbz	x1, .L1532
+	cbz	x1, .L1560
 	ldr	x0, [x0, 40]
 	mov	w26, 6
 	cmp	x0, 0
 	mov	w0, 9
 	csel	w26, w26, w0, eq
-.L1503:
+.L1531:
 	ldr	x2, [x20, 8]
 	mov	w1, w25
 	mov	w0, 0
 	blr	x2
 	ldr	w0, [x29, 156]
 	cmp	w0, 1
-	beq	.L1504
+	beq	.L1532
 	ldr	x2, [x20, 8]
 	add	w1, w27, w25
 	mov	w0, 0
 	blr	x2
-.L1504:
+.L1532:
 	cmp	w26, 9
-	bne	.L1534
+	bne	.L1562
 	ldr	x0, [x29, 144]
 	mov	w2, 1024
 	mov	w1, 0
@@ -11279,7 +11310,7 @@ FtlWriteToIDB:
 	add	x0, x28, 12
 	bl	js_hash
 	str	w0, [x28, 8]
-.L1505:
+.L1533:
 	ldr	w0, [x29, 156]
 	mov	x6, x23
 	mul	w0, w0, w27
@@ -11287,22 +11318,22 @@ FtlWriteToIDB:
 	str	w0, [x29, 140]
 	add	w0, w25, 1
 	str	w0, [x29, 132]
-.L1506:
+.L1534:
 	ldr	w0, [x29, 140]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1513
+	bcs	.L1541
 	cmp	w26, 9
-	bne	.L1507
+	bne	.L1535
 	ldr	w0, [x29, 132]
 	add	w0, w0, w1
-.L1560:
+.L1588:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
 	ccmp	w26, 9, 0, eq
-	bne	.L1509
+	bne	.L1537
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	str	x6, [x29, 104]
@@ -11322,8 +11353,8 @@ FtlWriteToIDB:
 	ldr	w1, [x29, 112]
 	ldr	x6, [x29, 104]
 	cmn	w1, #1
-	bne	.L1510
-.L1513:
+	bne	.L1538
+.L1541:
 	ldr	x0, [x29, 144]
 	ldr	x26, [x0, #:lo12:.LANCHOR184]
 	add	x0, x21, :lo12:.LANCHOR0
@@ -11332,21 +11363,21 @@ FtlWriteToIDB:
 	mul	w1, w0, w22
 	str	w1, [x29, 140]
 	ldr	x1, [x20, 32]
-	cbnz	x1, .L1511
+	cbnz	x1, .L1539
 	mov	w25, 6
-.L1512:
+.L1540:
 	ldr	w1, [x29, 156]
 	mov	x27, 0
 	mul	w0, w1, w0
 	str	w0, [x29, 132]
-.L1515:
+.L1543:
 	ldr	w0, [x29, 132]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1519
+	bcs	.L1547
 	cmp	w27, 0
 	ccmp	w25, 9, 0, eq
-	bne	.L1516
+	bne	.L1544
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	blr	x1
@@ -11370,34 +11401,34 @@ FtlWriteToIDB:
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
-	beq	.L1517
-.L1519:
+	beq	.L1545
+.L1547:
 	ldr	x0, [x29, 144]
 	mov	x2, x23
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
-.L1518:
+.L1546:
 	ldr	w3, [x29, 136]
 	mov	w26, w1
 	cmp	w1, w3
-	bcc	.L1522
+	bcc	.L1550
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	cmp	w0, 5
-	bls	.L1521
-	b	.L1525
-.L1532:
+	bls	.L1549
+	b	.L1553
+.L1560:
 	mov	w26, 6
-	b	.L1503
-.L1534:
+	b	.L1531
+.L1562:
 	mov	x28, 0
-	b	.L1505
-.L1507:
+	b	.L1533
+.L1535:
 	add	w0, w1, w25
 	lsl	w0, w0, 2
-	b	.L1560
-.L1509:
+	b	.L1588
+.L1537:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
 	mov	x2, x6
@@ -11406,20 +11437,20 @@ FtlWriteToIDB:
 	str	x6, [x29, 112]
 	blr	x7
 	cmn	w0, #1
-	beq	.L1513
+	beq	.L1541
 	ldr	x6, [x29, 112]
 	add	x6, x6, 2048
-.L1510:
+.L1538:
 	add	x27, x27, 1
-	b	.L1506
-.L1511:
+	b	.L1534
+.L1539:
 	ldr	x1, [x20, 40]
 	mov	w25, 6
 	cmp	x1, 0
 	mov	w1, 9
 	csel	w25, w25, w1, eq
-	b	.L1512
-.L1516:
+	b	.L1540
+.L1544:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
 	ldr	w0, [x29, 140]
@@ -11428,16 +11459,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	beq	.L1519
+	beq	.L1547
 	ldr	w0, [x29, 164]
 	mov	w1, 61424
 	cmp	w0, w1
-	bne	.L1519
+	bne	.L1547
 	add	x26, x26, 2048
-.L1517:
+.L1545:
 	add	x27, x27, 1
-	b	.L1515
-.L1522:
+	b	.L1543
+.L1550:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x27, x1, 2
@@ -11445,7 +11476,7 @@ FtlWriteToIDB:
 	add	x1, x1, 1
 	ldr	w3, [x25]
 	cmp	w4, w3
-	beq	.L1518
+	beq	.L1546
 	mov	x2, 512
 	mov	w1, 0
 	bl	memset
@@ -11455,8 +11486,8 @@ FtlWriteToIDB:
 	mov	w4, w26
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	ldr	w2, [x0, x27]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x2, [x20, 8]
@@ -11464,16 +11495,16 @@ FtlWriteToIDB:
 	mov	w0, 0
 	mul	w1, w1, w22
 	blr	x2
-.L1521:
+.L1549:
 	ldr	w0, [x29, 156]
 	add	w22, w22, w0
 	cmp	w22, 15
-	bls	.L1524
+	bls	.L1552
 	ldr	w0, [x29, 152]
-	cbnz	w0, .L1525
-.L1498:
+	cbnz	w0, .L1553
+.L1526:
 	mov	w19, -1
-.L1525:
+.L1553:
 	ldr	x0, [x29, 120]
 	str	wzr, [x24, #:lo12:.LANCHOR182]
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
@@ -11481,7 +11512,7 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	bl	free
-.L1493:
+.L1521:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11490,11 +11521,11 @@ FtlWriteToIDB:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1495:
+.L1523:
 	mov	w21, w1
 	mov	x22, x2
 	cmp	w0, 64
-	bne	.L1526
+	bne	.L1554
 	adrp	x20, .LANCHOR183
 	mov	w0, 262144
 	bl	ftl_malloc
@@ -11505,55 +11536,55 @@ FtlWriteToIDB:
 	adrp	x0, .LANCHOR184
 	str	x1, [x0, #:lo12:.LANCHOR184]
 	ldr	x0, [x20, #:lo12:.LANCHOR183]
-	cbz	x0, .L1527
-	cbz	x1, .L1527
+	cbz	x0, .L1555
+	cbz	x1, .L1555
 	mov	w1, 1
 	mov	w2, 262144
 	str	w1, [x24, #:lo12:.LANCHOR182]
 	mov	w1, 0
 	bl	ftl_memset
-.L1526:
+.L1554:
 	ldr	w0, [x24, #:lo12:.LANCHOR182]
-	cbz	w0, .L1561
+	cbz	w0, .L1589
 	adrp	x0, .LANCHOR183
 	cmp	w19, 63
 	ldr	x1, [x0, #:lo12:.LANCHOR183]
-	bhi	.L1529
+	bhi	.L1557
 	mov	w0, 64
 	sub	w19, w0, w19
 	sub	w21, w21, w19
 	ubfiz	x19, x19, 9, 25
 	add	x22, x22, x19
 	mov	x20, x1
-.L1530:
+.L1558:
 	cmp	w25, 575
-	bls	.L1531
+	bls	.L1559
 	sub	w21, w21, w23
 	sub	w21, w21, #446
-.L1531:
+.L1559:
 	mov	w4, w21
 	mov	x3, x20
 	mov	w2, 262144
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
 	bl	printf
 	lsl	w2, w21, 9
 	mov	x1, x22
 	mov	x0, x20
 	bl	ftl_memcpy
-	b	.L1561
-.L1527:
+	b	.L1589
+.L1555:
 	adrp	x1, .LANCHOR185
-	adrp	x0, .LC43
+	adrp	x0, .LC51
 	add	x1, x1, :lo12:.LANCHOR185
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L1526
-.L1529:
+	b	.L1554
+.L1557:
 	lsl	w20, w19, 7
 	sub	w20, w20, #8192
 	add	x20, x1, x20, lsl 2
-	b	.L1530
+	b	.L1558
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -12218,7 +12249,7 @@ g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -12281,7 +12312,7 @@ g_nand_phy_info:
 	.zero	24
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
@@ -12344,7 +12375,7 @@ g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -12532,21 +12563,21 @@ p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
@@ -12816,345 +12847,363 @@ power_up_flag:
 .LC8:
 	.string	"not free: w: s:"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
-.LC11:
+.LC14:
 	.string	"prog read error: = %x\n"
-.LC12:
+.LC15:
+	.string	"prog read REFRESH: = %x\n"
+.LC16:
 	.string	"prog read s error: = %x %x %x\n"
-.LC13:
+.LC17:
 	.string	"prog read d error: = %x %x %x\n"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
+.LC11:
+	.string	"FlashReadPages %x %x error_ecc_bits %d\n"
+.LC12:
+	.string	"data:"
+.LC13:
+	.string	"spare:"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC14:
+.LC18:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC15:
+.LC19:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC16:
+.LC20:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC9:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC31:
+.LC35:
 	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC33:
+.LC37:
 	.string	"no ect"
-.LC34:
+.LC38:
 	.string	"%s\n"
 	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",@progbits,1
-.LC38:
+.LC46:
 	.string	"%s hash error this.id =%x page =%x pre_id =%x hash =%x hash_r =%x\n"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
-.LC39:
+.LC47:
 	.string	"%s last blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
-.LC40:
+.LC48:
 	.string	"%s scan blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC18:
+.LC22:
 	.string	"FtlMapWritePage error = %x \n"
-.LC19:
+.LC23:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC36:
+.LC40:
+	.string	"FtlProgPages error %x = %d\n"
+.LC41:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC24:
+.LC27:
+	.string	"data prev_ppa = %x error...................\n"
+.LC28:
 	.string	"spuer block %x vpn is 0\n "
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC32:
+.LC36:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC35:
+.LC39:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC37:
+.LC44:
+	.string	"FtlWrite: ecc error:%x %x %x\n"
+.LC45:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1
-.LC42:
+.LC50:
 	.string	"write_idblock fail! %x %x %x %x\n"
-.LC43:
+.LC51:
 	.string	"%s idb buffer alloc fail\n"
-.LC44:
+.LC52:
 	.string	"%p %x %p %x\n"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6241,"a",@progbits
+	.section	.rodata.__func__.6243,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.6241, %object
-	.size	__func__.6241, 13
-__func__.6241:
+	.type	__func__.6243, %object
+	.size	__func__.6243, 13
+__func__.6243:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6269,"a",@progbits
+	.section	.rodata.__func__.6271,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.6269, %object
-	.size	__func__.6269, 9
-__func__.6269:
+	.type	__func__.6271, %object
+	.size	__func__.6271, 9
+__func__.6271:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6344,"a",@progbits
+	.section	.rodata.__func__.6346,"a",@progbits
 	.align	3
 	.set	.LANCHOR128,. + 0
-	.type	__func__.6344, %object
-	.size	__func__.6344, 14
-__func__.6344:
+	.type	__func__.6346, %object
+	.size	__func__.6346, 14
+__func__.6346:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6379,"a",@progbits
+	.section	.rodata.__func__.6381,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6379, %object
-	.size	__func__.6379, 11
-__func__.6379:
+	.type	__func__.6381, %object
+	.size	__func__.6381, 11
+__func__.6381:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6494,"a",@progbits
+	.section	.rodata.__func__.6496,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6494, %object
-	.size	__func__.6494, 17
-__func__.6494:
+	.type	__func__.6496, %object
+	.size	__func__.6496, 17
+__func__.6496:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6499,"a",@progbits
+	.section	.rodata.__func__.6501,"a",@progbits
 	.align	3
-	.set	.LANCHOR46,. + 0
-	.type	__func__.6499, %object
-	.size	__func__.6499, 17
-__func__.6499:
+	.set	.LANCHOR45,. + 0
+	.type	__func__.6501, %object
+	.size	__func__.6501, 17
+__func__.6501:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6530,"a",@progbits
+	.section	.rodata.__func__.6532,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6530, %object
-	.size	__func__.6530, 17
-__func__.6530:
+	.type	__func__.6532, %object
+	.size	__func__.6532, 17
+__func__.6532:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6562,"a",@progbits
+	.section	.rodata.__func__.6564,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6562, %object
-	.size	__func__.6562, 22
-__func__.6562:
+	.type	__func__.6564, %object
+	.size	__func__.6564, 22
+__func__.6564:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6571,"a",@progbits
+	.section	.rodata.__func__.6573,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6571, %object
-	.size	__func__.6571, 16
-__func__.6571:
+	.type	__func__.6573, %object
+	.size	__func__.6573, 16
+__func__.6573:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6604,"a",@progbits
+	.section	.rodata.__func__.6606,"a",@progbits
 	.align	3
 	.set	.LANCHOR81,. + 0
-	.type	__func__.6604, %object
-	.size	__func__.6604, 26
-__func__.6604:
+	.type	__func__.6606, %object
+	.size	__func__.6606, 26
+__func__.6606:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6615,"a",@progbits
+	.section	.rodata.__func__.6617,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6615, %object
-	.size	__func__.6615, 15
-__func__.6615:
+	.type	__func__.6617, %object
+	.size	__func__.6617, 15
+__func__.6617:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6630,"a",@progbits
+	.section	.rodata.__func__.6632,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6630, %object
-	.size	__func__.6630, 31
-__func__.6630:
+	.type	__func__.6632, %object
+	.size	__func__.6632, 31
+__func__.6632:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6644,"a",@progbits
+	.section	.rodata.__func__.6646,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6644, %object
-	.size	__func__.6644, 16
-__func__.6644:
+	.type	__func__.6646, %object
+	.size	__func__.6646, 16
+__func__.6646:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6669,"a",@progbits
+	.section	.rodata.__func__.6671,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6669, %object
-	.size	__func__.6669, 22
-__func__.6669:
+	.type	__func__.6671, %object
+	.size	__func__.6671, 22
+__func__.6671:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6686,"a",@progbits
+	.section	.rodata.__func__.6688,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.6686, %object
-	.size	__func__.6686, 9
-__func__.6686:
+	.type	__func__.6688, %object
+	.size	__func__.6688, 9
+__func__.6688:
 	.string	"log2phys"
-	.section	.rodata.__func__.6750,"a",@progbits
+	.section	.rodata.__func__.6752,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6750, %object
-	.size	__func__.6750, 15
-__func__.6750:
+	.type	__func__.6752, %object
+	.size	__func__.6752, 15
+__func__.6752:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6772,"a",@progbits
+	.section	.rodata.__func__.6774,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6772, %object
-	.size	__func__.6772, 14
-__func__.6772:
+	.type	__func__.6774, %object
+	.size	__func__.6774, 14
+__func__.6774:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6828,"a",@progbits
+	.section	.rodata.__func__.6830,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6828, %object
-	.size	__func__.6828, 15
-__func__.6828:
+	.type	__func__.6830, %object
+	.size	__func__.6830, 15
+__func__.6830:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6850,"a",@progbits
+	.section	.rodata.__func__.6852,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6850, %object
-	.size	__func__.6850, 18
-__func__.6850:
+	.type	__func__.6852, %object
+	.size	__func__.6852, 18
+__func__.6852:
 	.string	"FtlMapTblRecovery"
-	.section	.rodata.__func__.6896,"a",@progbits
+	.section	.rodata.__func__.6898,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6896, %object
-	.size	__func__.6896, 16
-__func__.6896:
+	.type	__func__.6898, %object
+	.size	__func__.6898, 16
+__func__.6898:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6930,"a",@progbits
+	.section	.rodata.__func__.6932,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6930, %object
-	.size	__func__.6930, 22
-__func__.6930:
+	.type	__func__.6932, %object
+	.size	__func__.6932, 22
+__func__.6932:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6987,"a",@progbits
+	.section	.rodata.__func__.6989,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6987, %object
-	.size	__func__.6987, 16
-__func__.6987:
+	.type	__func__.6989, %object
+	.size	__func__.6989, 16
+__func__.6989:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7008,"a",@progbits
+	.section	.rodata.__func__.7010,"a",@progbits
 	.align	3
 	.set	.LANCHOR136,. + 0
-	.type	__func__.7008, %object
-	.size	__func__.7008, 18
-__func__.7008:
+	.type	__func__.7010, %object
+	.size	__func__.7010, 18
+__func__.7010:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7035,"a",@progbits
+	.section	.rodata.__func__.7037,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7035, %object
-	.size	__func__.7035, 14
-__func__.7035:
+	.type	__func__.7037, %object
+	.size	__func__.7037, 14
+__func__.7037:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7100,"a",@progbits
+	.section	.rodata.__func__.7102,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.7100, %object
-	.size	__func__.7100, 25
-__func__.7100:
+	.set	.LANCHOR144,. + 0
+	.type	__func__.7102, %object
+	.size	__func__.7102, 25
+__func__.7102:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7121,"a",@progbits
+	.section	.rodata.__func__.7123,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7121, %object
-	.size	__func__.7121, 29
-__func__.7121:
+	.type	__func__.7123, %object
+	.size	__func__.7123, 29
+__func__.7123:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7128,"a",@progbits
+	.section	.rodata.__func__.7130,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.7128, %object
-	.size	__func__.7128, 19
-__func__.7128:
+	.type	__func__.7130, %object
+	.size	__func__.7130, 19
+__func__.7130:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7141,"a",@progbits
+	.section	.rodata.__func__.7143,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7141, %object
-	.size	__func__.7141, 16
-__func__.7141:
+	.type	__func__.7143, %object
+	.size	__func__.7143, 16
+__func__.7143:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7148,"a",@progbits
+	.section	.rodata.__func__.7150,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7148, %object
-	.size	__func__.7148, 20
-__func__.7148:
+	.type	__func__.7150, %object
+	.size	__func__.7150, 20
+__func__.7150:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7218,"a",@progbits
+	.section	.rodata.__func__.7220,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.7218, %object
-	.size	__func__.7218, 19
-__func__.7218:
+	.type	__func__.7220, %object
+	.size	__func__.7220, 19
+__func__.7220:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7316,"a",@progbits
+	.section	.rodata.__func__.7319,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7316, %object
-	.size	__func__.7316, 23
-__func__.7316:
+	.type	__func__.7319, %object
+	.size	__func__.7319, 23
+__func__.7319:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7578,"a",@progbits
+	.section	.rodata.__func__.7591,"a",@progbits
 	.align	3
 	.set	.LANCHOR137,. + 0
-	.type	__func__.7578, %object
-	.size	__func__.7578, 15
-__func__.7578:
+	.type	__func__.7591, %object
+	.size	__func__.7591, 15
+__func__.7591:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7597,"a",@progbits
+	.section	.rodata.__func__.7610,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.7597, %object
-	.size	__func__.7597, 15
-__func__.7597:
+	.type	__func__.7610, %object
+	.size	__func__.7610, 15
+__func__.7610:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7621,"a",@progbits
+	.section	.rodata.__func__.7634,"a",@progbits
 	.align	3
 	.set	.LANCHOR77,. + 0
-	.type	__func__.7621, %object
-	.size	__func__.7621, 17
-__func__.7621:
+	.type	__func__.7634, %object
+	.size	__func__.7634, 17
+__func__.7634:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7736,"a",@progbits
+	.section	.rodata.__func__.7749,"a",@progbits
 	.align	3
 	.set	.LANCHOR185,. + 0
-	.type	__func__.7736, %object
-	.size	__func__.7736, 14
-__func__.7736:
+	.type	__func__.7749, %object
+	.size	__func__.7749, 14
+__func__.7749:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC17:
+.LC21:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
-.LC25:
+.LC29:
 	.string	"...%s enter...\n"
-.LC26:
+.LC30:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC27:
+.LC31:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC10:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC28:
+.LC32:
 	.string	"ftl_scan_all_data = %x\n"
-.LC29:
+.LC33:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC30:
+.LC34:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC20:
+.LC24:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC21:
-	.string	"spare:"
-.LC22:
+.LC25:
 	.string	"map_ppn:"
-.LC23:
+.LC26:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
+.LC42:
+	.string	"g_gc_superblock_free %x %x %x %x %x\n"
+.LC43:
+	.string	"lpa=%x, ppa=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC2:
 	.string	"%s 0x%x:"
@@ -13165,6 +13214,6 @@ __func__.7736:
 .LC5:
 	.string	"\n"
 	.section	.rodata.sftl_init.str1.1,"aMS",@progbits,1
-.LC41:
-	.string	"SFTL version: 5.0.50 20181227"
+.LC49:
+	.string	"SFTL version: 5.0.50 20190215"
 	.hidden	free

commit 18601cb12a0ced8c672542509b9c3a35fd935607
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 21:46:04 2019 +0800

    rockchip: dts: rk3308: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I6a07ff130e506678a20e5128ef4c8e608e0ec448
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 4da226322c..fae2d4fb07 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -83,6 +83,11 @@
 	status = "okay";
 };
 
+&gpio0 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
 &route_rgb {
 	status = "disabled";
 };
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 1e9ec023e6..2d50ba881e 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -392,6 +392,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;

commit b73a762978a1a7333b0979df5ed6a98418ccc485
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 18:19:45 2019 +0800

    dts: rockchip: rk3288: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: I3d4839180b36de22ce1e5f2b26c9090b0686a8a0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index 42e2b025ea..e51e5e0373 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -65,6 +65,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&gpio6 {
+	u-boot,dm-pre-reloc;
+};
+
 &usbphy0 {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 6e7418378e..10249bcbc9 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -211,6 +211,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio6 RK_PC6 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0c0000 0x4000>;
 		status = "disabled";

commit aa0fd9f34b65b181c5a5baa7057017a139d16482
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 22 21:22:14 2019 +0800

    rockchip: px30: add cd-gpios
    
    Add cd-gpios to test the mmc device whether exit.
    
    Change-Id: Ie1cfffe0f7826eae47fab705d3a3bb7d1a85f8ce
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 668eb51257..a62bc03a1d 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -807,6 +807,7 @@
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
+		cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
 		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;

commit 01ff14b05457e995a5eee4ce4173555171474a0f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 18:03:47 2019 +0800

    rockchip: resource: add return value validation
    
    Change-Id: I3ed362564e7aed48fc212f299f3712fdbc19ee53
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 477aae70b2..fced26ff81 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -212,11 +212,16 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 #ifdef CONFIG_ANDROID_AB
 	char slot_suffix[3] = {0};
 
-	if (rk_avb_get_current_slot(slot_suffix))
+	if (rk_avb_get_current_slot(slot_suffix)) {
+		ret = -ENODEV;
 		goto out;
+	}
+
 	boot_partname = android_str_append(boot_partname, slot_suffix);
-	if (boot_partname == NULL)
+	if (!boot_partname) {
+		ret = -EINVAL;
 		goto out;
+	}
 #endif
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
@@ -235,6 +240,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (ret != 1) {
 		printf("%s: failed to read %s hdr, ret=%d\n",
 		       __func__, part_info.name, ret);
+		ret = -EIO;
 		goto out;
 	}
 	ret = android_image_check_header(andr_hdr);
@@ -274,17 +280,21 @@ next:
 	if (ret != 1) {
 		printf("%s: failed to read resource hdr, ret=%d\n",
 		       __func__, ret);
+		ret = -EIO;
 		goto out;
 	}
 
 	ret = resource_image_check_header(hdr);
-	if (ret < 0)
+	if (ret < 0) {
+		ret = -EINVAL;
 		goto out;
+	}
 
 	content = memalign(ARCH_DMA_MINALIGN,
 			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
 	if (!content) {
 		printf("%s: failed to alloc memory for content\n", __func__);
+		ret = -ENOMEM;
 		goto out;
 	}
 
@@ -294,6 +304,7 @@ next:
 	if (ret != (hdr->e_blks * hdr->e_nums)) {
 		printf("%s: failed to read resource entries, ret=%d\n",
 		       __func__, ret);
+		ret = -EIO;
 		goto err;
 	}
 
@@ -303,13 +314,14 @@ next:
 		add_file_to_list(entry, offset);
 	}
 
+	ret = 0;
 	printf("Load FDT from %s part\n", boot_partname);
 err:
 	free(content);
 out:
 	free(hdr);
 
-	return 0;
+	return ret;
 }
 
 static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
@@ -318,8 +330,10 @@ static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
 	struct resource_file *file;
 	struct list_head *node;
 
-	if (list_empty(&entrys_head))
-		init_resource_list(hdr);
+	if (list_empty(&entrys_head)) {
+		if (init_resource_list(hdr))
+			return NULL;
+	}
 
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);
@@ -621,8 +635,11 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	char *dtb_name = DTB_FILE;
 	int ret, size;
 
-	if (list_empty(&entrys_head))
-		init_resource_list(NULL);
+	if (list_empty(&entrys_head)) {
+		ret = init_resource_list(NULL);
+		if (ret)
+			return ret;
+	}
 
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);

commit f4e1db9544a8994a69fe47e63f7735939641bbe4
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Mar 4 10:35:12 2019 +0800

    lib: optee_client: add judgment of return value
    
    Change-Id: If616f89ffb2c3ea30afb7bced56a1ca28b1232b2
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/optee.c b/cmd/optee.c
index f1140176b6..705ac87433 100644
--- a/cmd/optee.c
+++ b/cmd/optee.c
@@ -30,9 +30,13 @@ int test_secure_storage_default(void)
 	}
 
 	debug("%s start\n", __func__);
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
@@ -164,9 +168,13 @@ int test_secure_storage_security_partition(void)
 	}
 
 	debug("%s start\n", __func__);
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return -1;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index c2e6f90c8f..b99229ee90 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -14,7 +14,7 @@
 #define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
 #define ATTEST_CA_OUT_SIZE     256
 
-void test_optee(void);
+uint32_t test_optee(void);
 uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
 uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
diff --git a/include/optee_include/OpteeClientMem.h b/include/optee_include/OpteeClientMem.h
index ba85f829c3..1b9affbf36 100644
--- a/include/optee_include/OpteeClientMem.h
+++ b/include/optee_include/OpteeClientMem.h
@@ -9,7 +9,7 @@
 
 #include <linux/types.h>
 
-void OpteeClientMemInit(void);
+int OpteeClientMemInit(void);
 
 void *OpteeClientMemAlloc(uint32_t length);
 
diff --git a/include/optee_include/OpteeClientRkFs-v2.h b/include/optee_include/OpteeClientRkFs-v2.h
index a8ee4d6c5b..fa710adb7e 100644
--- a/include/optee_include/OpteeClientRkFs-v2.h
+++ b/include/optee_include/OpteeClientRkFs-v2.h
@@ -70,6 +70,6 @@ int tee_supp_rk_fs_init(void);
 
 int tee_supp_rk_fs_process(size_t num_params,
 			struct tee_ioctl_param *params);
-void OpteeClientRkFsInit(void);
+int OpteeClientRkFsInit(void);
 
 #endif
diff --git a/include/optee_include/OpteeClientRkFs.h b/include/optee_include/OpteeClientRkFs.h
index d7f68bc277..ed91aa9c11 100644
--- a/include/optee_include/OpteeClientRkFs.h
+++ b/include/optee_include/OpteeClientRkFs.h
@@ -33,6 +33,6 @@ int tee_supp_rk_fs_init(void);
 
 int tee_supp_rk_fs_process(void *cmd, uint32_t cmd_size);
 
-void OpteeClientRkFsInit(void);
+int OpteeClientRkFsInit(void);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index a2f8c12ab4..01f24ddb3e 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -17,11 +17,18 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 {
 	TEEC_Result status = TEEC_SUCCESS;
 
-	OpteeClientMemInit();
-
-	OpteeClientRkFsInit();
+	status = OpteeClientMemInit();
+	if (status != TEEC_SUCCESS) {
+		printf("OpteeClientMemInit fail!");
+		return status;
+	}
+	status = OpteeClientRkFsInit();
+	if (status != TEEC_SUCCESS) {
+		printf("OpteeClientRkFsInit fail!");
+		return status;
+	}
 
-	return status;
+	return TEEC_SUCCESS;
 }
 
 /*
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index d2d5c758f4..c2f931ecc3 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -15,7 +15,7 @@
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 
-void test_optee(void)
+uint32_t test_optee(void)
 {
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
@@ -29,13 +29,16 @@ void test_optee(void)
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
 		printf("%s: dev_desc is NULL!\n", __func__);
-		return;
+		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -54,6 +57,8 @@ void test_optee(void)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -61,6 +66,8 @@ void test_optee(void)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "filename_test", SharedMem0.size);
 
@@ -70,6 +77,8 @@ void test_optee(void)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memset(SharedMem1.buffer, 'a', SharedMem1.size);
 
@@ -89,16 +98,14 @@ void test_optee(void)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
-
 	TEEC_CloseSession(&TeecSession);
-
 	TEEC_FinalizeContext(&TeecContext);
-
-	debug("testmm end\n");
-	debug("TeecResult %x\n", TeecResult);
+	return TeecResult;
 }
 
 static uint8_t b2hs_add_base(uint8_t in)
@@ -146,10 +153,14 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -167,8 +178,9 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 				TEEC_LOGIN_PUBLIC,
 				NULL,
 				&TeecOperation,
-
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -176,6 +188,8 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
 
@@ -185,6 +199,8 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -203,15 +219,12 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
-
 	TEEC_CloseSession(&TeecSession);
-
 	TEEC_FinalizeContext(&TeecContext);
 
-	debug("testmm end\n");
 	return TeecResult;
 }
 
@@ -234,9 +247,13 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -255,6 +272,8 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -262,6 +281,8 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
 
@@ -271,6 +292,8 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, (char *)&value, SharedMem1.size);
 
@@ -290,16 +313,14 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
-
 	TEEC_CloseSession(&TeecSession);
-
 	TEEC_FinalizeContext(&TeecContext);
 
-	debug("testmm end\n");
-
 	return TeecResult;
 }
 
@@ -320,10 +341,13 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -342,6 +366,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -349,6 +375,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
 
@@ -358,6 +386,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -377,11 +407,11 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -403,10 +433,13 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -425,6 +458,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -432,6 +467,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
 
@@ -441,6 +478,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
 
@@ -460,12 +499,13 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -489,9 +529,14 @@ uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
 						    TEEC_NONE,
@@ -510,18 +555,24 @@ uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
 				      NULL,
 				      &TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
 	SharedMem0.size = sizeof("rsacer");
 	SharedMem0.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
 	TEEC_SharedMemory SharedMem1 = {0};
 
 	SharedMem1.size = size;
 	SharedMem1.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
 	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
@@ -537,11 +588,11 @@ uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -565,9 +616,14 @@ uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
+
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
 						    TEEC_NONE,
@@ -586,18 +642,24 @@ uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
 				      NULL,
 				      &TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
 	SharedMem0.size = sizeof("rsacer");
 	SharedMem0.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
 	TEEC_SharedMemory SharedMem1 = {0};
 
 	SharedMem1.size = size;
 	SharedMem1.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -612,12 +674,13 @@ uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -639,10 +702,13 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -661,6 +727,8 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -668,6 +736,8 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
 
@@ -677,6 +747,8 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -696,11 +768,11 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -722,10 +794,13 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -744,6 +819,8 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -751,6 +828,8 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
 
@@ -760,6 +839,8 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, &lock_state, SharedMem1.size);
 
@@ -779,12 +860,13 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -806,10 +888,13 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -828,6 +913,8 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -835,6 +922,8 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
 
@@ -844,6 +933,8 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -863,11 +954,11 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -890,10 +981,13 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -912,6 +1006,8 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -919,6 +1015,8 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
 
@@ -928,6 +1026,8 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, &flash_lock_state, SharedMem1.size);
 
@@ -947,7 +1047,9 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
@@ -969,9 +1071,13 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -980,6 +1086,8 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -987,6 +1095,8 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1003,7 +1113,7 @@ uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1023,9 +1133,13 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1034,6 +1148,8 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1041,6 +1157,8 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
 
@@ -1056,7 +1174,9 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1075,9 +1195,13 @@ uint32_t notify_optee_rpmb_ta(void)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1086,6 +1210,8 @@ uint32_t notify_optee_rpmb_ta(void)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
 						TEEC_NONE,
@@ -1096,7 +1222,9 @@ uint32_t notify_optee_rpmb_ta(void)
 					2,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
 
@@ -1115,9 +1243,13 @@ uint32_t notify_optee_efuse_ta(void)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1126,6 +1258,8 @@ uint32_t notify_optee_efuse_ta(void)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
 						TEEC_NONE,
@@ -1136,7 +1270,9 @@ uint32_t notify_optee_efuse_ta(void)
 					2,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
 
@@ -1163,9 +1299,13 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1174,6 +1314,8 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1181,6 +1323,8 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1197,7 +1341,7 @@ uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
 
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1216,9 +1360,13 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1227,6 +1375,8 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1234,6 +1384,8 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
 
@@ -1249,7 +1401,9 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 					4,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1270,9 +1424,13 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
@@ -1281,6 +1439,8 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 				NULL,
 				NULL,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1288,6 +1448,8 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1307,7 +1469,7 @@ uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
 		if (bootflag == 0x000000FF)
 			*flag = 1;
 	}
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
@@ -1332,10 +1494,13 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1354,6 +1519,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1361,6 +1528,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
 
@@ -1370,6 +1539,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1388,11 +1559,11 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
 		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -1414,10 +1585,13 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	debug("testmm start\n");
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1436,6 +1610,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 				NULL,
 				&TeecOperation,
 				&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1443,6 +1619,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
 
@@ -1452,6 +1630,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem1.buffer, (char *)&attributes, SharedMem1.size);
 
@@ -1470,12 +1650,13 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 					1,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
 
 	return TeecResult;
 }
@@ -1500,9 +1681,13 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1521,6 +1706,8 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 				      NULL,
 					&TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1528,6 +1715,8 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1541,14 +1730,15 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 					143,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	*dh_size = TeecOperation.params[0].tmpref.size;
 	memcpy(dh, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
-
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
@@ -1573,9 +1763,13 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1594,6 +1788,8 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 				      NULL,
 					&TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1601,6 +1797,8 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
 	TeecOperation.params[0].tmpref.size = SharedMem0.size;
@@ -1614,14 +1812,15 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 					144,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	*uuid_size = TeecOperation.params[0].tmpref.size;
 	memcpy(uuid, SharedMem0.buffer, SharedMem0.size);
-
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
-
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
@@ -1636,8 +1835,6 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
 
-	OpteeClientApiLibInitialize();
-
 	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
 				{ 0xa8, 0x69, 0x9c, 0xe6,
 				  0x88, 0x6c, 0x5d, 0x5d
@@ -1653,9 +1850,13 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1674,6 +1875,8 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 				      NULL,
 					&TeecOperation,
 				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1681,6 +1884,8 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, operation_start, SharedMem0.size);
 
@@ -1693,6 +1898,8 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	SharedMem1.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
 	TeecOperation.params[1].tmpref.size = SharedMem1.size;
@@ -1706,11 +1913,16 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 					145,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	*out_len = TeecOperation.params[1].tmpref.size;
 	memcpy(out, SharedMem1.buffer, SharedMem1.size);
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
@@ -1734,8 +1946,13 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 		printf("%s: dev_desc is NULL!\n", __func__);
 		return -TEEC_ERROR_GENERIC;
 	}
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						TEEC_NONE,
@@ -1754,6 +1971,8 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 					NULL,
 					&TeecOperation,
 					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
@@ -1761,6 +1980,8 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 	SharedMem0.flags = 0;
 
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
 
 	memcpy(SharedMem0.buffer, ca_response, SharedMem0.size);
 
@@ -1776,11 +1997,12 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 					146,
 					&TeecOperation,
 					&ErrorOrigin);
-
+	if (TeecResult != TEEC_SUCCESS)
+		goto exit;
+exit:
 	TEEC_ReleaseSharedMemory(&SharedMem0);
-
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	return TeecResult;
 }
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index cec5b50c3b..d290567d83 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -14,7 +14,7 @@
 
 void *my_mem_start;
 uint32_t my_count;
-uint8_t *my_flag;
+uint8_t *my_flag = NULL;
 typedef struct {
 	void *addrBlock;
 	uint32_t sizeBlock;
@@ -22,14 +22,25 @@ typedef struct {
 } ALLOC_FLAG;
 ALLOC_FLAG alloc_flags[50];
 
-void my_malloc_init(void *start, uint32_t size)
+int my_malloc_init(void *start, uint32_t size)
 {
+	if (start == NULL || size == 0) {
+		printf("malloc init fail!");
+		return -1;
+	}
 	memset(start, 0, size);
 	my_mem_start = start;
 	my_count = size/4096;
-	my_flag = malloc(size/4096);
+	if (my_flag == NULL) {
+		my_flag = malloc(size/4096);
+		if (my_flag == NULL) {
+			printf("malloc fail!");
+			return -1;
+		}
+	}
 	memset(my_flag, 0, size/4096);
 	memset(alloc_flags, 0, 50 * sizeof(ALLOC_FLAG));
+	return 0;
 }
 
 void write_usedblock(void *addr, uint32_t size)
@@ -75,7 +86,8 @@ void *my_malloc(uint32_t size)
 	uint32_t i, j, k, num;
 
 	num = (size - 1) / 4096 + 1;
-
+	if (my_count < num)
+		return 0;
 	for (i = 0; i < my_count - num; i++) {
 		if (*(my_flag + i) == 0) {
 			for (j = 0; j < num; j++) {
@@ -127,7 +139,7 @@ void my_free(void *ptr)
  * Initlialize the memory component, for example providing the
  * containing drivers handle.
  */
-void OpteeClientMemInit(void)
+int OpteeClientMemInit(void)
 {
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
@@ -143,7 +155,7 @@ void OpteeClientMemInit(void)
 	debug("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
 	      ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
-	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
+	return my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
 }
 
 /*
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 18be31a61f..b1f634997d 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -1233,10 +1233,10 @@ int tee_supp_rk_fs_init(void)
 	return TEEC_SUCCESS;
 }
 
-void OpteeClientRkFsInit(void)
+int OpteeClientRkFsInit(void)
 {
 	debug(" OpteeClientRkFsInit\n");
-	tee_supp_rk_fs_init();
+	return tee_supp_rk_fs_init();
 }
 bool tee_supp_param_is_value(struct tee_ioctl_param *param)
 {
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 55dec3e212..25a639c5a8 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -1277,10 +1277,10 @@ int tee_supp_rk_fs_init(void)
 
 	return 0;
 }
-void OpteeClientRkFsInit(void)
+int OpteeClientRkFsInit(void)
 {
 	debug(" OpteeClientRkFsInit\n");
-	tee_supp_rk_fs_init();
+	return tee_supp_rk_fs_init();
 }
 
 static int rkss_step = 0;

commit d08ece9d972be224bb5c7deae6b3788017ba2035
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:19:36 2019 +0800

    configs: rk3399pro: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I02f68c31399b695a81705b53e8dad161d5366002
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 7e6c7a5231..95a3dc9559 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -48,7 +48,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 2b3bb4e5c81f7f8bf4032a32524624f8002e78fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:10:48 2019 +0800

    configs: rk3308: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: Ifb975cf96cdcc0d1d070bcc39bd4555828fb9fd0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index c1a2d8def6..956d0cd2aa 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -37,7 +37,6 @@ CONFIG_CMD_MMC=y
 # CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 5be3f455a3..bacbaabd9d 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -36,7 +36,6 @@ CONFIG_CMD_MMC=y
 # CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y

commit 688a40e1c9c8e2cc7a83a73c2c7373f3d9cb1fbc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:07:39 2019 +0800

    configs: rk3126: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I3837289269240d383bc3272840e6f27dd9406b00
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 08fcb9b572..669761bf7a 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -36,7 +36,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_BMP=y
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 68373a9aa52803dd4f0c29948456759ffe399d73
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 13:11:57 2019 +0800

    configs: rk322x: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I8435a6f1e0e802072279dabaa6887fd2f074a040
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 7ab87510ae..fd3f6306e0 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -53,7 +53,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 4dc1628ce4572ea32a8511281a7bceb2d7707f01
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 13:10:05 2019 +0800

    configs: rk3368: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: Ie05cdec6c52c0173f2f8e8c2b3f47105b164f2c0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 3f59cb3922..9dcdda9185 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -39,7 +39,6 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y

commit b08c9f9699ef875f725fe635a808524f72a510ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:58:41 2019 +0800

    configs: rk3326: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: Iefe882e6ff0738b3c22272bf284320c9934adb1f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 2593b65933..27a9790679 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -49,7 +49,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 4a80c269bd..b4e4487fff 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -52,7 +52,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit db9bf7701edd1aa66ea2a1ae2fcbd615930aa907
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:54:31 2019 +0800

    configs: px30: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I9fa31901e54f0c1883a84589d717651e7587f59c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 06220ba79f..537eb862a0 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -49,7 +49,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index 70f39c138d..fa6f3ca739 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -51,7 +51,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 27202cf9255531236ac583c5f359bf49d422b663
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:53:38 2019 +0800

    configs: rk3288: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I45e8ed4c18288d4f845c786cdc577396271504f6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 4abb51d34e..3e80f41644 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -39,7 +39,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 # CONFIG_SPL_EFI_PARTITION is not set

commit 834f62e578a151ba39440f0d3164686312474aab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:52:03 2019 +0800

    configs: rk3399: enable CONFIG_DOS_PARTITION for fat fs
    
    Change-Id: I5a03113550f164a3a4b25f04f07e072a117b5926
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 7bc6d8ccb5..ae4d35572b 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -47,7 +47,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y

commit 2a71d5332ec16049b6cb4324a1d17d2c785e03d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 14:06:55 2019 +0800

    configs: rk3126: clean up with make savedefconfig
    
    Change-Id: Ic87ede0857de720e7d228409df95abdf6142c70c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 447b70876f..08fcb9b572 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -54,7 +54,6 @@ CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 92eec20f9179ac87d6c63bc0c9af665bc355cb1c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 13:11:13 2019 +0800

    configs: rk322x: clean up with make savedefconfig
    
    Change-Id: I9105a5118f9658904d412e81cfa6286a4d33d3b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index c7c22af77a..7ab87510ae 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -83,7 +83,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y

commit a050f450945ebaa1faa360216d6c686944e577c9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 12:01:15 2019 +0800

    configs: rk3368: clean up with make savedefconfig
    
    Change-Id: I37708be8dafada4b58202602ab98195727d5e204
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 67b7d03ae7..3f59cb3922 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -55,7 +56,6 @@ CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
@@ -100,13 +100,12 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_ANDROID_AVB=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit b7d1cfcef7b73fcc6fb3a1cc33bc926e58a63496
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:56:03 2019 +0800

    configs: rk3326: clean up with make savedefconfig
    
    Change-Id: Ic34b6424d76743a54b74a59950a797cfdc08c034
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index e9a9db9e24..2593b65933 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -69,7 +69,6 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index ab40b9e0e4..4a80c269bd 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -72,7 +72,6 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit d06ecfaad6ea947d0c6eccaf93a92853770de456
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:54:54 2019 +0800

    configs: evb-px30: clean up with make savedefconfig
    
    Change-Id: I467ec09bda0bd4d2c12ef81ca139a1b67b4da932
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 81f1884d78..06220ba79f 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -69,7 +69,6 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit cd8ac20fc3b7ad6e192fd678039ded8e7f3c041e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:52:47 2019 +0800

    configs: rk3288: clean up with make savedefconfig
    
    Change-Id: Ib787733eef6e225c983a457d5719b5800e20d46a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 9f6672e555..4abb51d34e 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -13,6 +13,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
@@ -105,14 +106,12 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_CMD_MMC=y
-CONFIG_ANDROID_AVB=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit 1927bb37f07b515f2d30b578a3234facd0ed159e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 6 11:51:21 2019 +0800

    config: rk3399: clean up with make savedefconfig
    
    Change-Id: I8a9be3430eb224f8e3ea2dc957dca9439f4dd662
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index cc966e62a5..7bc6d8ccb5 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -76,7 +76,6 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y

commit 641abd2eec0219a9ae0f59014a15039601ba3e76
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jan 31 21:30:25 2019 +0800

    rockchip: atags: pass public key through atags
    
    Change-Id: I202f354a3b48b8e64c7b2ade7e3b65fa3b78500a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 0d0c496f69..20ada99821 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -17,6 +17,7 @@
 #define ATAG_TOS_MEM		0x54410053
 #define ATAG_RAM_PARTITION	0x54410054
 #define ATAG_ATF_MEM		0x54410055
+#define ATAG_PUB_KEY		0x54410056
 #define ATAG_MAX		0x544100ff
 
 /* Tag size and offset */
@@ -102,6 +103,14 @@ struct tag_atf_mem {
 	u32 hash;
 } __packed;
 
+struct tag_pub_key {
+	u32 version;
+	u32 len;
+	u8  data[768];
+	u32 reserved[6];
+	u32 hash;
+} __packed;
+
 struct tag_ram_partition {
 	u32 version;
 	u32 count;
@@ -139,6 +148,7 @@ struct tag {
 		struct tag_tos_mem	tos_mem;
 		struct tag_ram_partition ram_part;
 		struct tag_atf_mem	atf_mem;
+		struct tag_pub_key	pub_key;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index b330a8c897..90a6e3ff89 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -196,6 +196,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_ATF_MEM:
 		size = tag_size(tag_atf_mem);
 		break;
+	case ATAG_PUB_KEY:
+		size = tag_size(tag_pub_key);
+		break;
 	};
 
 	if (!size)
@@ -393,6 +396,13 @@ void atags_print_tag(struct tag *t)
 			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
 		printf("      hash = 0x%x\n", t->u.atf_mem.hash);
 		break;
+	case ATAG_PUB_KEY:
+		printf("[pub_key_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.pub_key.version);
+		printf("      hash = 0x%x\n", t->u.pub_key.hash);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -434,6 +444,7 @@ void atags_test(void)
 	struct tag_tos_mem t_tos_mem;
 	struct tag_ram_partition t_ram_param;
 	struct tag_atf_mem t_atf_mem;
+	struct tag_pub_key t_pub_key;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
@@ -441,6 +452,7 @@ void atags_test(void)
 	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
 	memset(&t_ram_param, 0x0, sizeof(t_ram_param));
 	memset(&t_atf_mem, 0x5, sizeof(t_atf_mem));
+	memset(&t_pub_key, 0x6, sizeof(t_pub_key));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
@@ -471,6 +483,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 	atags_set_tag(ATAG_ATF_MEM, &t_atf_mem);
+	atags_set_tag(ATAG_PUB_KEY, &t_pub_key);
 
 	atags_print_all_tags();
 	atags_stat();

commit d2280c00f25bad13d014c7097b44649f98c4a96b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 21:53:57 2019 +0800

    android: add brackets to fix compile error
    
    There is a compile error when enable AB config. The error message is
    "error: a label can only be part of a statement and a declaration isnot
    a statement". Add brackets to fix this error.
    
    Change-Id: I4ec3af984503e35fc1304d08cd7cd8ab587dfb0a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a0e8921be5..58b3815475 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -969,7 +969,8 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
-#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+#if (defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB))
+	{
 		char root_partition[20] = {0};
 		char guid_buf[UUID_SIZE] = {0};
 		char root_partuuid[70] = "root=PARTUUID=";
@@ -979,6 +980,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
 		strcat(root_partuuid, guid_buf);
 		env_update("bootargs", root_partuuid);
+	}
 #endif
 
 #ifdef CONFIG_ANDROID_AB

commit 332992a7f2a4ec0f131d45858373de314b982144
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 21:17:02 2019 +0800

    android: minus retry in AB system
    
    Change-Id: Icc9764fb10dc87d3c4f2f7417b971338a7f98ca4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 799963c573..a0e8921be5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -919,10 +919,48 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	if (rk_avb_get_current_slot(slot_suffix))
 		return -1;
 
-	if (slot_suffix[0] != '_') {
-		printf("There is no bootable slot!\n");
+	AvbOps *ops;
+	AvbABData ab_data;
+	AvbABData ab_data_orig;
+	size_t slot_index_to_boot = 0;
+
+	if (!strncmp(slot_suffix, "_a", 2))
+		slot_index_to_boot = 0;
+	else if (!strncmp(slot_suffix, "_b", 2))
+		slot_index_to_boot = 1;
+	else
+		slot_index_to_boot = 0;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if(load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not load metadata\n");
 		return -1;
 	}
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+
+	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not save metadata\n");
+		return -1;
+	}
+
+	if (slot_suffix[0] != '_') {
+		printf("###There is no bootable slot, bring up lastboot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(slot_suffix, "_b", 2);
+		else if(rk_get_lastboot() == 0)
+			memcpy(slot_suffix, "_a", 2);
+		else
+			return -1;
+	}
 #endif
 
 	switch (mode) {

commit 7cca3dd4d769349b982f1e5888599796d495c789
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 20:56:46 2019 +0800

    lib: avb: support last boot
    
    Change-Id: I803e3deda068be34061a302c27009db5e444f290
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
index 0ba5ccd47c..152901b7c7 100755
--- a/include/android_avb/avb_ab_flow.h
+++ b/include/android_avb/avb_ab_flow.h
@@ -1,277 +1,278 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
-#endif
-*/
-
-#ifndef AVB_AB_FLOW_H_
-#define AVB_AB_FLOW_H_
-
-#include <android_avb/avb_ab_ops.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Magic for the A/B struct when serialized. */
-#define AVB_AB_MAGIC "\0AB0"
-#define AVB_AB_MAGIC_LEN 4
-
-/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
-#define AVB_AB_MAJOR_VERSION 1
-#define AVB_AB_MINOR_VERSION 0
-
-/* Size of AvbABData struct. */
-#define AVB_AB_DATA_SIZE 32
-
-/* Maximum values for slot data */
-#define AVB_AB_MAX_PRIORITY 15
-#define AVB_AB_MAX_TRIES_REMAINING 7
-
-/* Struct used for recording per-slot metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABSlotData {
-  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
-   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
-   * being the highest. The special value 0 is used to indicate the
-   * slot is unbootable.
-   */
-  uint8_t priority;
-
-  /* Number of times left attempting to boot this slot ranging from 0
-   * to AVB_AB_MAX_TRIES_REMAINING.
-   */
-  uint8_t tries_remaining;
-
-  /* Non-zero if this slot has booted successfully, 0 otherwise. */
-  uint8_t successful_boot;
-
-  /* Reserved for future use. */
-  uint8_t reserved[1];
-} AVB_ATTR_PACKED AvbABSlotData;
-
-/* Struct used for recording A/B metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABData {
-  /* Magic number used for identification - see AVB_AB_MAGIC. */
-  uint8_t magic[AVB_AB_MAGIC_LEN];
-
-  /* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
-  uint8_t version_major;
-  uint8_t version_minor;
-
-  /* Padding to ensure |slots| field start eight bytes in. */
-  uint8_t reserved1[2];
-
-  /* Per-slot metadata. */
-  AvbABSlotData slots[2];
-
-  /* Reserved for future use. */
-  uint8_t reserved2[12];
-
-  /* CRC32 of all 28 bytes preceding this field. */
-  uint32_t crc32;
-} AVB_ATTR_PACKED AvbABData;
-
-/* Copies |src| to |dest|, byte-swapping fields in the
- * process. Returns false if the data is invalid (e.g. wrong magic,
- * wrong CRC32 etc.), true otherwise.
- */
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Copies |src| to |dest|, byte-swapping fields in the process. Also
- * updates the |crc32| field in |dest|.
- */
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Initializes |data| such that it has two slots and both slots have
- * maximum tries remaining. The CRC is not set.
- */
-void avb_ab_data_init(AvbABData* data);
-
-/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
- * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- *
- * If the data read from disk is invalid (e.g. wrong magic or CRC
- * checksum failure), the metadata will be reset using
- * avb_ab_data_init() and then written to disk.
- */
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
-
-/* Writes A/B metadata to the 'misc' partition using |ops|. This will
- * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
-
-/* Return codes used in avb_ab_flow(), see that function for
- * documentation of each value.
- */
-typedef enum {
-  AVB_AB_FLOW_RESULT_OK,
-  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
-  AVB_AB_FLOW_RESULT_ERROR_OOM,
-  AVB_AB_FLOW_RESULT_ERROR_IO,
-  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
-  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
-} AvbABFlowResult;
-
-/* Get a textual representation of |result|. */
-const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
-
-/* High-level function to select a slot to boot. The following
- * algorithm is used:
- *
- * 1. A/B metadata is loaded and validated using the
- * read_ab_metadata() operation. Typically this means it's read from
- * the 'misc' partition and if it's invalid then it's reset using
- * avb_ab_data_init() and this reset metadata is returned.
- *
- * 2. All bootable slots listed in the A/B metadata are verified using
- * avb_slot_verify(). If a slot is invalid or if it fails verification
- * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
- * below), it will be marked as unbootable in the A/B metadata and the
- * metadata will be saved to disk before returning.
- *
- * 3. If there are no bootable slots, the value
- * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
- *
- * 4. For each bootable slot, the Stored Rollback Indexes are updated
- * such that for each rollback index location, the Stored Rollback
- * Index is the largest number smaller than or equal to the Rollback
- * Index of each slot.
- *
- * 5. The bootable slot with the highest priority is selected and
- * returned in |out_data|. If this slot is already marked as
- * successful, the A/B metadata is not modified. However, if the slot
- * is not marked as bootable its |tries_remaining| count is
- * decremented and the A/B metadata is saved to disk before returning.
- * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
- *
- * The partitions to load is given in |requested_partitions| as a
- * NULL-terminated array of NUL-terminated strings. Typically the
- * |requested_partitions| array only contains a single item for the
- * boot partition, 'boot'.
- *
- * If the device is unlocked (and _only_ if it's unlocked), the
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
- * in the |flags| parameter. This will allow considering slots as
- * verified even when avb_slot_verify() returns
- * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
- * question.
- *
- * Note that neither androidboot.slot_suffix nor androidboot.slot are
- * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
- * to pass these yourself.
- *
- * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
- * is returned.
- *
- * If a slot was selected but it didn't verify then
- * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
- * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
- * flag is set.
- *
- * If an I/O operation - such as loading/saving metadata or checking
- * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
- * returned.
- *
- * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
- * returned.
- *
- * If invalid arguments are passed,
- * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
- * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
- *
- * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
- * is to initiate device repair (which is device-dependent).
- */
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data);
-
-/* Marks the slot with the given slot number as active. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater when completing
- * an update. It can also used by the firmware for implementing the
- * "set_active" command.
- */
-AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
-
-/* Marks the slot with the given slot number as unbootable. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater before writing to
- * a slot.
- */
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-/* Marks the slot with the given slot number as having booted
- * successfully. Returns AVB_IO_RESULT_OK on success, error code
- * otherwise.
- *
- * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
- * will be returned yet the function will have no side-effects.
- *
- * This function is typically used by the OS updater after having
- * confirmed that the slot works as intended.
- */
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-/*
- * Load metadata.
- */
-AvbIOResult load_metadata(AvbABOps* ab_ops,
-			  AvbABData* ab_data,
-			  AvbABData* ab_data_orig);
-
-/* Writes A/B metadata to disk only if it has changed - returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- */
-AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
-				     AvbABData* ab_data,
-				     AvbABData* ab_data_orig);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_AB_FLOW_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_FLOW_H_
+#define AVB_AB_FLOW_H_
+
+#include <android_avb/avb_ab_ops.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the A/B struct when serialized. */
+#define AVB_AB_MAGIC "\0AB0"
+#define AVB_AB_MAGIC_LEN 4
+
+/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
+#define AVB_AB_MAJOR_VERSION 1
+#define AVB_AB_MINOR_VERSION 0
+
+/* Size of AvbABData struct. */
+#define AVB_AB_DATA_SIZE 32
+
+/* Maximum values for slot data */
+#define AVB_AB_MAX_PRIORITY 15
+#define AVB_AB_MAX_TRIES_REMAINING 7
+
+/* Struct used for recording per-slot metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABSlotData {
+  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
+   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
+   * being the highest. The special value 0 is used to indicate the
+   * slot is unbootable.
+   */
+  uint8_t priority;
+
+  /* Number of times left attempting to boot this slot ranging from 0
+   * to AVB_AB_MAX_TRIES_REMAINING.
+   */
+  uint8_t tries_remaining;
+
+  /* Non-zero if this slot has booted successfully, 0 otherwise. */
+  uint8_t successful_boot;
+
+  /* Reserved for future use. */
+  uint8_t reserved[1];
+} AVB_ATTR_PACKED AvbABSlotData;
+
+/* Struct used for recording A/B metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABData {
+  /* Magic number used for identification - see AVB_AB_MAGIC. */
+  uint8_t magic[AVB_AB_MAGIC_LEN];
+
+  /* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
+  uint8_t version_major;
+  uint8_t version_minor;
+
+  /* Padding to ensure |slots| field start eight bytes in. */
+  uint8_t reserved1[2];
+
+  /* Per-slot metadata. */
+  AvbABSlotData slots[2];
+
+  /* Reserved for future use. */
+  uint8_t last_boot;
+  uint8_t reserved2[11];
+
+  /* CRC32 of all 28 bytes preceding this field. */
+  uint32_t crc32;
+} AVB_ATTR_PACKED AvbABData;
+
+/* Copies |src| to |dest|, byte-swapping fields in the
+ * process. Returns false if the data is invalid (e.g. wrong magic,
+ * wrong CRC32 etc.), true otherwise.
+ */
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Copies |src| to |dest|, byte-swapping fields in the process. Also
+ * updates the |crc32| field in |dest|.
+ */
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Initializes |data| such that it has two slots and both slots have
+ * maximum tries remaining. The CRC is not set.
+ */
+void avb_ab_data_init(AvbABData* data);
+
+/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
+ * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ *
+ * If the data read from disk is invalid (e.g. wrong magic or CRC
+ * checksum failure), the metadata will be reset using
+ * avb_ab_data_init() and then written to disk.
+ */
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
+
+/* Writes A/B metadata to the 'misc' partition using |ops|. This will
+ * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
+
+/* Return codes used in avb_ab_flow(), see that function for
+ * documentation of each value.
+ */
+typedef enum {
+  AVB_AB_FLOW_RESULT_OK,
+  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
+  AVB_AB_FLOW_RESULT_ERROR_OOM,
+  AVB_AB_FLOW_RESULT_ERROR_IO,
+  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
+  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
+} AvbABFlowResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
+
+/* High-level function to select a slot to boot. The following
+ * algorithm is used:
+ *
+ * 1. A/B metadata is loaded and validated using the
+ * read_ab_metadata() operation. Typically this means it's read from
+ * the 'misc' partition and if it's invalid then it's reset using
+ * avb_ab_data_init() and this reset metadata is returned.
+ *
+ * 2. All bootable slots listed in the A/B metadata are verified using
+ * avb_slot_verify(). If a slot is invalid or if it fails verification
+ * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
+ * below), it will be marked as unbootable in the A/B metadata and the
+ * metadata will be saved to disk before returning.
+ *
+ * 3. If there are no bootable slots, the value
+ * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
+ *
+ * 4. For each bootable slot, the Stored Rollback Indexes are updated
+ * such that for each rollback index location, the Stored Rollback
+ * Index is the largest number smaller than or equal to the Rollback
+ * Index of each slot.
+ *
+ * 5. The bootable slot with the highest priority is selected and
+ * returned in |out_data|. If this slot is already marked as
+ * successful, the A/B metadata is not modified. However, if the slot
+ * is not marked as bootable its |tries_remaining| count is
+ * decremented and the A/B metadata is saved to disk before returning.
+ * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
+ *
+ * The partitions to load is given in |requested_partitions| as a
+ * NULL-terminated array of NUL-terminated strings. Typically the
+ * |requested_partitions| array only contains a single item for the
+ * boot partition, 'boot'.
+ *
+ * If the device is unlocked (and _only_ if it's unlocked), the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
+ * in the |flags| parameter. This will allow considering slots as
+ * verified even when avb_slot_verify() returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
+ * question.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
+ * is returned.
+ *
+ * If a slot was selected but it didn't verify then
+ * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
+ * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+ * flag is set.
+ *
+ * If an I/O operation - such as loading/saving metadata or checking
+ * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
+ * returned.
+ *
+ * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
+ * returned.
+ *
+ * If invalid arguments are passed,
+ * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
+ * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ *
+ * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
+ * is to initiate device repair (which is device-dependent).
+ */
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data);
+
+/* Marks the slot with the given slot number as active. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater when completing
+ * an update. It can also used by the firmware for implementing the
+ * "set_active" command.
+ */
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
+
+/* Marks the slot with the given slot number as unbootable. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater before writing to
+ * a slot.
+ */
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/* Marks the slot with the given slot number as having booted
+ * successfully. Returns AVB_IO_RESULT_OK on success, error code
+ * otherwise.
+ *
+ * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
+ * will be returned yet the function will have no side-effects.
+ *
+ * This function is typically used by the OS updater after having
+ * confirmed that the slot works as intended.
+ */
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/*
+ * Load metadata.
+ */
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+			  AvbABData* ab_data,
+			  AvbABData* ab_data_orig);
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+				     AvbABData* ab_data,
+				     AvbABData* ab_data_orig);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_FLOW_H_ */
diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 0a70e7096b..c9f3cd7927 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -267,6 +267,14 @@ int rk_auth_unlock(void *buffer, char *out_is_trusted);
  */
 int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
 
+
+/**
+ * Get last boot slot
+ *
+ * @return 0 is slot A; 1 is slot B; -1 is error
+ */
+int rk_get_lastboot(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
index 7ed1ab9107..c84131d6c3 100755
--- a/lib/avb/libavb_ab/avb_ab_flow.c
+++ b/lib/avb/libavb_ab/avb_ab_flow.c
@@ -1,531 +1,532 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_ab_flow.h>
-
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest) {
-  /* Ensure magic is correct. */
-  if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
-    avb_error("Magic is incorrect.\n");
-    return false;
-  }
-
-  avb_memcpy(dest, src, sizeof(AvbABData));
-  dest->crc32 = avb_be32toh(dest->crc32);
-
-  /* Ensure we don't attempt to access any fields if the major version
-   * is not supported.
-   */
-  if (dest->version_major > AVB_AB_MAJOR_VERSION) {
-    avb_error("No support for given major version.\n");
-    return false;
-  }
-
-  /* Bail if CRC32 doesn't match. */
-  if (dest->crc32 !=
-      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t))) {
-    avb_error("CRC32 does not match.\n");
-    return false;
-  }
-
-  return true;
-}
-
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
-                                         AvbABData* dest) {
-  avb_memcpy(dest, src, sizeof(AvbABData));
-  dest->crc32 = avb_htobe32(
-      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t)));
-}
-
-void avb_ab_data_init(AvbABData* data) {
-  avb_memset(data, '\0', sizeof(AvbABData));
-  avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
-  data->version_major = AVB_AB_MAJOR_VERSION;
-  data->version_minor = AVB_AB_MINOR_VERSION;
-  data->slots[0].priority = AVB_AB_MAX_PRIORITY;
-  data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-  data->slots[0].successful_boot = 0;
-  data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
-  data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-  data->slots[1].successful_boot = 0;
-}
-
-/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
- * following the 'struct bootloader_message' field. The struct is
- * compatible with the guidelines in bootable/recovery/bootloader.h -
- * e.g. it is stored in the |slot_suffix| field, starts with a
- * NUL-byte, and is 32 bytes long.
- */
-#define AB_METADATA_MISC_PARTITION_OFFSET 2048
-
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data) {
-  AvbOps* ops = ab_ops->ops;
-  AvbABData serialized;
-  AvbIOResult io_ret;
-  size_t num_bytes_read;
-
-  io_ret = ops->read_from_partition(ops,
-                                    "misc",
-                                    AB_METADATA_MISC_PARTITION_OFFSET,
-                                    sizeof(AvbABData),
-                                    &serialized,
-                                    &num_bytes_read);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    return AVB_IO_RESULT_ERROR_OOM;
-  } else if (io_ret != AVB_IO_RESULT_OK ||
-             num_bytes_read != sizeof(AvbABData)) {
-    avb_error("Error reading A/B metadata.\n");
-    return AVB_IO_RESULT_ERROR_IO;
-  }
-
-  if (!avb_ab_data_verify_and_byteswap(&serialized, data)) {
-    avb_error(
-        "Error validating A/B metadata from disk. "
-        "Resetting and writing new A/B metadata to disk.\n");
-    avb_ab_data_init(data);
-    return avb_ab_data_write(ab_ops, data);
-  }
-
-  return AVB_IO_RESULT_OK;
-}
-
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
-  AvbOps* ops = ab_ops->ops;
-  AvbABData serialized;
-  AvbIOResult io_ret;
-
-  avb_ab_data_update_crc_and_byteswap(data, &serialized);
-  io_ret = ops->write_to_partition(ops,
-                                   "misc",
-                                   AB_METADATA_MISC_PARTITION_OFFSET,
-                                   sizeof(AvbABData),
-                                   &serialized);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    return AVB_IO_RESULT_ERROR_OOM;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    avb_error("Error writing A/B metadata.\n");
-    return AVB_IO_RESULT_ERROR_IO;
-  }
-  return AVB_IO_RESULT_OK;
-}
-
-static bool slot_is_bootable(AvbABSlotData* slot) {
-  return slot->priority > 0 &&
-         (slot->successful_boot || (slot->tries_remaining > 0));
-}
-
-static void slot_set_unbootable(AvbABSlotData* slot) {
-  slot->priority = 0;
-  slot->tries_remaining = 0;
-  slot->successful_boot = 0;
-}
-
-/* Ensure all unbootable and/or illegal states are marked as the
- * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
- * and successful_boot=0.
- */
-static void slot_normalize(AvbABSlotData* slot) {
-  if (slot->priority > 0) {
-    if (slot->tries_remaining == 0 && !slot->successful_boot) {
-      /* We've exhausted all tries -> unbootable. */
-      slot_set_unbootable(slot);
-    }
-    if (slot->tries_remaining > 0 && slot->successful_boot) {
-      /* Illegal state - avb_ab_mark_slot_successful() will clear
-       * tries_remaining when setting successful_boot.
-       */
-      slot_set_unbootable(slot);
-    }
-  } else {
-    slot_set_unbootable(slot);
-  }
-}
-
-static const char* slot_suffixes[2] = {"_a", "_b"};
-
-/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult load_metadata(AvbABOps* ab_ops,
-                                 AvbABData* ab_data,
-                                 AvbABData* ab_data_orig) {
-  AvbIOResult io_ret;
-
-  io_ret = ab_ops->read_ab_metadata(ab_ops, ab_data);
-  if (io_ret != AVB_IO_RESULT_OK) {
-    avb_error("I/O error while loading A/B metadata.\n");
-    return io_ret;
-  }
-  *ab_data_orig = *ab_data;
-
-  /* Ensure data is normalized, e.g. illegal states will be marked as
-   * unbootable and all unbootable states are represented with
-   * (priority=0, tries_remaining=0, successful_boot=0).
-   */
-  slot_normalize(&ab_data->slots[0]);
-  slot_normalize(&ab_data->slots[1]);
-  return AVB_IO_RESULT_OK;
-}
-
-/* Writes A/B metadata to disk only if it has changed - returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- */
-AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
-                                            AvbABData* ab_data,
-                                            AvbABData* ab_data_orig) {
-  if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
-    avb_debug("Writing A/B metadata to disk.\n");
-    return ab_ops->write_ab_metadata(ab_ops, ab_data);
-  }
-  return AVB_IO_RESULT_OK;
-}
-
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data) {
-  AvbOps* ops = ab_ops->ops;
-  AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
-  AvbSlotVerifyData* data = NULL;
-  AvbABFlowResult ret;
-  AvbABData ab_data, ab_data_orig;
-  size_t slot_index_to_boot, n;
-  AvbIOResult io_ret;
-  bool saw_and_allowed_verification_error = false;
-
-  io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-    goto out;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-    goto out;
-  }
-
-  /* Validate all bootable slots. */
-  for (n = 0; n < 2; n++) {
-    if (slot_is_bootable(&ab_data.slots[n])) {
-      AvbSlotVerifyResult verify_result;
-      bool set_slot_unbootable = false;
-
-      verify_result = avb_slot_verify(ops,
-                                      requested_partitions,
-                                      slot_suffixes[n],
-                                      flags,
-                                      hashtree_error_mode,
-                                      &slot_data[n]);
-      switch (verify_result) {
-        case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-          goto out;
-
-        case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-          goto out;
-
-        case AVB_SLOT_VERIFY_RESULT_OK:
-          break;
-
-        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-        case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-          /* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
-           * these mean game over.
-           */
-          set_slot_unbootable = true;
-          break;
-
-        /* explicit fallthrough. */
-        case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-        case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-        case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-          if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
-            /* Do nothing since we allow this. */
-            avb_debugv("Allowing slot ",
-                       slot_suffixes[n],
-                       " which verified "
-                       "with result ",
-                       avb_slot_verify_result_to_string(verify_result),
-                       " because "
-                       "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
-                       "is set.\n",
-                       NULL);
-            saw_and_allowed_verification_error = true;
-          } else {
-            set_slot_unbootable = true;
-          }
-          break;
-
-        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-          ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
-          goto out;
-          /* Do not add a 'default:' case here because of -Wswitch. */
-      }
-
-      if (set_slot_unbootable) {
-        avb_errorv("Error verifying slot ",
-                   slot_suffixes[n],
-                   " with result ",
-                   avb_slot_verify_result_to_string(verify_result),
-                   " - setting unbootable.\n",
-                   NULL);
-        slot_set_unbootable(&ab_data.slots[n]);
-      }
-    }
-  }
-
-  if (slot_is_bootable(&ab_data.slots[0]) &&
-      slot_is_bootable(&ab_data.slots[1])) {
-    if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
-      slot_index_to_boot = 1;
-    } else {
-      slot_index_to_boot = 0;
-    }
-  } else if (slot_is_bootable(&ab_data.slots[0])) {
-    slot_index_to_boot = 0;
-  } else if (slot_is_bootable(&ab_data.slots[1])) {
-    slot_index_to_boot = 1;
-  } else {
-    /* No bootable slots! */
-    avb_error("No bootable slots found.\n");
-    ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
-    goto out;
-  }
-
-  /* Update stored rollback index such that the stored rollback index
-   * is the largest value supporting all currently bootable slots. Do
-   * this for every rollback index location.
-   */
-  for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
-    uint64_t rollback_index_value = 0;
-
-    if (slot_data[0] != NULL && slot_data[1] != NULL) {
-      uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
-      uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
-      rollback_index_value =
-          (a_rollback_index < b_rollback_index ? a_rollback_index
-                                               : b_rollback_index);
-    } else if (slot_data[0] != NULL) {
-      rollback_index_value = slot_data[0]->rollback_indexes[n];
-    } else if (slot_data[1] != NULL) {
-      rollback_index_value = slot_data[1]->rollback_indexes[n];
-    }
-
-    if (rollback_index_value != 0) {
-      uint64_t current_rollback_index_value;
-      io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
-      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-        ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-        goto out;
-      } else if (io_ret != AVB_IO_RESULT_OK) {
-        avb_error("Error getting rollback index for slot.\n");
-        ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-        goto out;
-      }
-      if (current_rollback_index_value != rollback_index_value) {
-        io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
-        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-          goto out;
-        } else if (io_ret != AVB_IO_RESULT_OK) {
-          avb_error("Error setting stored rollback index.\n");
-          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-          goto out;
-        }
-      }
-    }
-  }
-
-  /* Finally, select this slot. */
-  avb_assert(slot_data[slot_index_to_boot] != NULL);
-  data = slot_data[slot_index_to_boot];
-  slot_data[slot_index_to_boot] = NULL;
-  if (saw_and_allowed_verification_error) {
-    avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
-    ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
-  } else {
-    ret = AVB_AB_FLOW_RESULT_OK;
-  }
-
-  /* ... and decrement tries remaining, if applicable. */
-  if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-      ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-    ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-  }
-
-out:
-  io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  if (io_ret != AVB_IO_RESULT_OK) {
-    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-    } else {
-      ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-    }
-    if (data != NULL) {
-      avb_slot_verify_data_free(data);
-      data = NULL;
-    }
-  }
-
-  for (n = 0; n < 2; n++) {
-    if (slot_data[n] != NULL) {
-      avb_slot_verify_data_free(slot_data[n]);
-    }
-  }
-
-  if (out_data != NULL) {
-    *out_data = data;
-  } else {
-    if (data != NULL) {
-      avb_slot_verify_data_free(data);
-    }
-  }
-
-  return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops,
-                                    unsigned int slot_number) {
-  AvbABData ab_data, ab_data_orig;
-  unsigned int other_slot_number;
-  AvbIOResult ret;
-
-  avb_assert(slot_number < 2);
-
-  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (ret != AVB_IO_RESULT_OK) {
-    goto out;
-  }
-
-  /* Make requested slot top priority, unsuccessful, and with max tries. */
-  ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
-  ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-  ab_data.slots[slot_number].successful_boot = 0;
-
-  /* Ensure other slot doesn't have as high a priority. */
-  other_slot_number = 1 - slot_number;
-  if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
-    ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
-  }
-
-  ret = AVB_IO_RESULT_OK;
-
-out:
-  if (ret == AVB_IO_RESULT_OK) {
-    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  }
-  return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
-                                        unsigned int slot_number) {
-  AvbABData ab_data, ab_data_orig;
-  AvbIOResult ret;
-
-  avb_assert(slot_number < 2);
-
-  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (ret != AVB_IO_RESULT_OK) {
-    goto out;
-  }
-
-  slot_set_unbootable(&ab_data.slots[slot_number]);
-
-  ret = AVB_IO_RESULT_OK;
-
-out:
-  if (ret == AVB_IO_RESULT_OK) {
-    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  }
-  return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
-                                        unsigned int slot_number) {
-  AvbABData ab_data, ab_data_orig;
-  AvbIOResult ret;
-
-  avb_assert(slot_number < 2);
-
-  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-  if (ret != AVB_IO_RESULT_OK) {
-    goto out;
-  }
-
-  if (!slot_is_bootable(&ab_data.slots[slot_number])) {
-    avb_error("Cannot mark unbootable slot as successful.\n");
-    ret = AVB_IO_RESULT_OK;
-    goto out;
-  }
-
-  ab_data.slots[slot_number].tries_remaining = 0;
-  ab_data.slots[slot_number].successful_boot = 1;
-
-  ret = AVB_IO_RESULT_OK;
-
-out:
-  if (ret == AVB_IO_RESULT_OK) {
-    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-  }
-  return ret;
-}
-
-const char* avb_ab_flow_result_to_string(AvbABFlowResult result) {
-  const char* ret = NULL;
-
-  switch (result) {
-    case AVB_AB_FLOW_RESULT_OK:
-      ret = "OK";
-      break;
-
-    case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
-      ret = "OK_WITH_VERIFICATION_ERROR";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_OOM:
-      ret = "ERROR_OOM";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_IO:
-      ret = "ERROR_IO";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
-      ret = "ERROR_NO_BOOTABLE_SLOTS";
-      break;
-
-    case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
-      ret = "ERROR_INVALID_ARGUMENT";
-      break;
-      /* Do not add a 'default:' case here because of -Wswitch. */
-  }
-
-  if (ret == NULL) {
-    avb_error("Unknown AvbABFlowResult value.\n");
-    ret = "(unknown)";
-  }
-
-  return ret;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_ab_flow.h>
+
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest) {
+  /* Ensure magic is correct. */
+  if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    return false;
+  }
+
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_be32toh(dest->crc32);
+
+  /* Ensure we don't attempt to access any fields if the major version
+   * is not supported.
+   */
+  if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+    avb_error("No support for given major version.\n");
+    return false;
+  }
+
+  /* Bail if CRC32 doesn't match. */
+  if (dest->crc32 !=
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t))) {
+    avb_error("CRC32 does not match.\n");
+    return false;
+  }
+
+  return true;
+}
+
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
+                                         AvbABData* dest) {
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_htobe32(
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t)));
+}
+
+void avb_ab_data_init(AvbABData* data) {
+  avb_memset(data, '\0', sizeof(AvbABData));
+  avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+  data->version_major = AVB_AB_MAJOR_VERSION;
+  data->version_minor = AVB_AB_MINOR_VERSION;
+  data->last_boot = 0;
+  data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+  data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[0].successful_boot = 0;
+  data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+  data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[1].successful_boot = 0;
+}
+
+/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
+ * following the 'struct bootloader_message' field. The struct is
+ * compatible with the guidelines in bootable/recovery/bootloader.h -
+ * e.g. it is stored in the |slot_suffix| field, starts with a
+ * NUL-byte, and is 32 bytes long.
+ */
+#define AB_METADATA_MISC_PARTITION_OFFSET 2048
+
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+  size_t num_bytes_read;
+
+  io_ret = ops->read_from_partition(ops,
+                                    "misc",
+                                    AB_METADATA_MISC_PARTITION_OFFSET,
+                                    sizeof(AvbABData),
+                                    &serialized,
+                                    &num_bytes_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK ||
+             num_bytes_read != sizeof(AvbABData)) {
+    avb_error("Error reading A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+
+  if (!avb_ab_data_verify_and_byteswap(&serialized, data)) {
+    avb_error(
+        "Error validating A/B metadata from disk. "
+        "Resetting and writing new A/B metadata to disk.\n");
+    avb_ab_data_init(data);
+    return avb_ab_data_write(ab_ops, data);
+  }
+
+  return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+
+  avb_ab_data_update_crc_and_byteswap(data, &serialized);
+  io_ret = ops->write_to_partition(ops,
+                                   "misc",
+                                   AB_METADATA_MISC_PARTITION_OFFSET,
+                                   sizeof(AvbABData),
+                                   &serialized);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error writing A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot) {
+  return slot->priority > 0 &&
+         (slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+static void slot_set_unbootable(AvbABSlotData* slot) {
+  slot->priority = 0;
+  slot->tries_remaining = 0;
+  slot->successful_boot = 0;
+}
+
+/* Ensure all unbootable and/or illegal states are marked as the
+ * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
+ * and successful_boot=0.
+ */
+static void slot_normalize(AvbABSlotData* slot) {
+  if (slot->priority > 0) {
+    if (slot->tries_remaining == 0 && !slot->successful_boot) {
+      /* We've exhausted all tries -> unbootable. */
+      slot_set_unbootable(slot);
+    }
+    if (slot->tries_remaining > 0 && slot->successful_boot) {
+      /* Illegal state - avb_ab_mark_slot_successful() will clear
+       * tries_remaining when setting successful_boot.
+       */
+      slot_set_unbootable(slot);
+    }
+  } else {
+    slot_set_unbootable(slot);
+  }
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+                                 AvbABData* ab_data,
+                                 AvbABData* ab_data_orig) {
+  AvbIOResult io_ret;
+
+  io_ret = ab_ops->read_ab_metadata(ab_ops, ab_data);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("I/O error while loading A/B metadata.\n");
+    return io_ret;
+  }
+  *ab_data_orig = *ab_data;
+
+  /* Ensure data is normalized, e.g. illegal states will be marked as
+   * unbootable and all unbootable states are represented with
+   * (priority=0, tries_remaining=0, successful_boot=0).
+   */
+  slot_normalize(&ab_data->slots[0]);
+  slot_normalize(&ab_data->slots[1]);
+  return AVB_IO_RESULT_OK;
+}
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+                                            AvbABData* ab_data,
+                                            AvbABData* ab_data_orig) {
+  if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
+    avb_debug("Writing A/B metadata to disk.\n");
+    return ab_ops->write_ab_metadata(ab_ops, ab_data);
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
+  AvbSlotVerifyData* data = NULL;
+  AvbABFlowResult ret;
+  AvbABData ab_data, ab_data_orig;
+  size_t slot_index_to_boot, n;
+  AvbIOResult io_ret;
+  bool saw_and_allowed_verification_error = false;
+
+  io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    goto out;
+  }
+
+  /* Validate all bootable slots. */
+  for (n = 0; n < 2; n++) {
+    if (slot_is_bootable(&ab_data.slots[n])) {
+      AvbSlotVerifyResult verify_result;
+      bool set_slot_unbootable = false;
+
+      verify_result = avb_slot_verify(ops,
+                                      requested_partitions,
+                                      slot_suffixes[n],
+                                      flags,
+                                      hashtree_error_mode,
+                                      &slot_data[n]);
+      switch (verify_result) {
+        case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_OK:
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+          /* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+           * these mean game over.
+           */
+          set_slot_unbootable = true;
+          break;
+
+        /* explicit fallthrough. */
+        case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+          if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
+            /* Do nothing since we allow this. */
+            avb_debugv("Allowing slot ",
+                       slot_suffixes[n],
+                       " which verified "
+                       "with result ",
+                       avb_slot_verify_result_to_string(verify_result),
+                       " because "
+                       "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
+                       "is set.\n",
+                       NULL);
+            saw_and_allowed_verification_error = true;
+          } else {
+            set_slot_unbootable = true;
+          }
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+          ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
+          goto out;
+          /* Do not add a 'default:' case here because of -Wswitch. */
+      }
+
+      if (set_slot_unbootable) {
+        avb_errorv("Error verifying slot ",
+                   slot_suffixes[n],
+                   " with result ",
+                   avb_slot_verify_result_to_string(verify_result),
+                   " - setting unbootable.\n",
+                   NULL);
+        slot_set_unbootable(&ab_data.slots[n]);
+      }
+    }
+  }
+
+  if (slot_is_bootable(&ab_data.slots[0]) &&
+      slot_is_bootable(&ab_data.slots[1])) {
+    if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+      slot_index_to_boot = 1;
+    } else {
+      slot_index_to_boot = 0;
+    }
+  } else if (slot_is_bootable(&ab_data.slots[0])) {
+    slot_index_to_boot = 0;
+  } else if (slot_is_bootable(&ab_data.slots[1])) {
+    slot_index_to_boot = 1;
+  } else {
+    /* No bootable slots! */
+    avb_error("No bootable slots found.\n");
+    ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+    goto out;
+  }
+
+  /* Update stored rollback index such that the stored rollback index
+   * is the largest value supporting all currently bootable slots. Do
+   * this for every rollback index location.
+   */
+  for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+    uint64_t rollback_index_value = 0;
+
+    if (slot_data[0] != NULL && slot_data[1] != NULL) {
+      uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+      uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+      rollback_index_value =
+          (a_rollback_index < b_rollback_index ? a_rollback_index
+                                               : b_rollback_index);
+    } else if (slot_data[0] != NULL) {
+      rollback_index_value = slot_data[0]->rollback_indexes[n];
+    } else if (slot_data[1] != NULL) {
+      rollback_index_value = slot_data[1]->rollback_indexes[n];
+    }
+
+    if (rollback_index_value != 0) {
+      uint64_t current_rollback_index_value;
+      io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_error("Error getting rollback index for slot.\n");
+        ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+        goto out;
+      }
+      if (current_rollback_index_value != rollback_index_value) {
+        io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
+        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+        } else if (io_ret != AVB_IO_RESULT_OK) {
+          avb_error("Error setting stored rollback index.\n");
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+        }
+      }
+    }
+  }
+
+  /* Finally, select this slot. */
+  avb_assert(slot_data[slot_index_to_boot] != NULL);
+  data = slot_data[slot_index_to_boot];
+  slot_data[slot_index_to_boot] = NULL;
+  if (saw_and_allowed_verification_error) {
+    avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+    ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
+  } else {
+    ret = AVB_AB_FLOW_RESULT_OK;
+  }
+
+  /* ... and decrement tries remaining, if applicable. */
+  if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+      ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+    ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+  }
+
+out:
+  io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    } else {
+      ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    }
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+      data = NULL;
+    }
+  }
+
+  for (n = 0; n < 2; n++) {
+    if (slot_data[n] != NULL) {
+      avb_slot_verify_data_free(slot_data[n]);
+    }
+  }
+
+  if (out_data != NULL) {
+    *out_data = data;
+  } else {
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+    }
+  }
+
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops,
+                                    unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  unsigned int other_slot_number;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  /* Make requested slot top priority, unsuccessful, and with max tries. */
+  ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
+  ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  ab_data.slots[slot_number].successful_boot = 0;
+
+  /* Ensure other slot doesn't have as high a priority. */
+  other_slot_number = 1 - slot_number;
+  if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
+    ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
+  }
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  slot_set_unbootable(&ab_data.slots[slot_number]);
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  if (!slot_is_bootable(&ab_data.slots[slot_number])) {
+    avb_error("Cannot mark unbootable slot as successful.\n");
+    ret = AVB_IO_RESULT_OK;
+    goto out;
+  }
+
+  ab_data.slots[slot_number].tries_remaining = 0;
+  ab_data.slots[slot_number].successful_boot = 1;
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_AB_FLOW_RESULT_OK:
+      ret = "OK";
+      break;
+
+    case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
+      ret = "OK_WITH_VERIFICATION_ERROR";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_OOM:
+      ret = "ERROR_OOM";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_IO:
+      ret = "ERROR_IO";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
+      ret = "ERROR_NO_BOOTABLE_SLOTS";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
+      ret = "ERROR_INVALID_ARGUMENT";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbABFlowResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index b58a81fe95..3edd428f98 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -117,8 +117,14 @@ int rk_avb_get_current_slot(char *select_slot)
 	}
 
 	if (rk_avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
-		printf("get_current_slot error!\n");
-		ret = -1;
+		printf("###There is no bootable slot, bring up last_boot!###\n");
+		if (rk_get_lastboot() == 1)
+			memcpy(select_slot, "_b", 2);
+		else if(rk_get_lastboot() == 0)
+			memcpy(select_slot, "_a", 2);
+		else
+			return -1;
+		ret = 0;
 	}
 
 	avb_ops_user_free(ops);
@@ -697,3 +703,30 @@ int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len)
 	else
 		return -1;
 }
+
+int rk_get_lastboot(void)
+{
+
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	AvbABData ab_data;
+	int lastboot = -1;
+	AvbOps* ops;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	io_ret = ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		goto out;
+	}
+
+	lastboot = ab_data.last_boot;
+out:
+	avb_ops_user_free(ops);
+
+	return lastboot;
+}

commit 4454e90b43786bac3a0d4c3bfddeafddf794d6c0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 20:09:50 2019 +0800

    lib: avb: change the output memssage I/O
    
    Since the stderr is not used in uboot, use printf to print the
    message.
    
    Change-Id: Ib522609e783acf8f407e2f9fb3805b553c543cba
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb/avb_sysdeps_posix.c b/lib/avb/libavb/avb_sysdeps_posix.c
index 638ce9867a..413ac776eb 100755
--- a/lib/avb/libavb/avb_sysdeps_posix.c
+++ b/lib/avb/libavb/avb_sysdeps_posix.c
@@ -1,90 +1,90 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <stdio.h>
-#include <common.h>
-#include <stdarg.h>
-#include <stdlib.h>
-#include <malloc.h>
-#include <errno.h>
-#include <asm/io.h>
-
-#include <android_avb/avb_sysdeps.h>
-
-void abort(void)
-{
-	
-}
-int avb_memcmp(const void* src1, const void* src2, size_t n) {
-  return memcmp(src1, src2, n);
-}
-
-void* avb_memcpy(void* dest, const void* src, size_t n) {
-  return memcpy(dest, src, n);
-}
-
-void* avb_memset(void* dest, const int c, size_t n) {
-  return memset(dest, c, n);
-}
-
-int avb_strcmp(const char* s1, const char* s2) {
-  return strcmp(s1, s2);
-}
-
-size_t avb_strlen(const char* str) {
-  return strlen(str);
-}
-
-void avb_abort(void) {
-  abort();
-}
-
-void avb_print(const char* message) {
-  fprintf(stderr, "%s", message);
-}
-
-void avb_printv(const char* message, ...) {
-  va_list ap;
-  const char* m;
-
-  va_start(ap, message);
-  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
-    fprintf(stderr, "%s", m);
-  }
-  va_end(ap);
-}
-
-void* avb_malloc_(size_t size) {
-  return malloc(size);
-}
-
-void avb_free(void* ptr) {
-  free(ptr);
-}
-
-uint32_t avb_div_by_10(uint64_t* dividend) {
-  uint32_t rem = (uint32_t)(*dividend % 10);
-  *dividend /= 10;
-  return rem;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <common.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#include <android_avb/avb_sysdeps.h>
+
+void abort(void)
+{
+	
+}
+int avb_memcmp(const void* src1, const void* src2, size_t n) {
+  return memcmp(src1, src2, n);
+}
+
+void* avb_memcpy(void* dest, const void* src, size_t n) {
+  return memcpy(dest, src, n);
+}
+
+void* avb_memset(void* dest, const int c, size_t n) {
+  return memset(dest, c, n);
+}
+
+int avb_strcmp(const char* s1, const char* s2) {
+  return strcmp(s1, s2);
+}
+
+size_t avb_strlen(const char* str) {
+  return strlen(str);
+}
+
+void avb_abort(void) {
+  abort();
+}
+
+void avb_print(const char* message) {
+  printf("%s", message);
+}
+
+void avb_printv(const char* message, ...) {
+  va_list ap;
+  const char* m;
+
+  va_start(ap, message);
+  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
+    printf("%s", m);
+  }
+  va_end(ap);
+}
+
+void* avb_malloc_(size_t size) {
+  return malloc(size);
+}
+
+void avb_free(void* ptr) {
+  free(ptr);
+}
+
+uint32_t avb_div_by_10(uint64_t* dividend) {
+  uint32_t rem = (uint32_t)(*dividend % 10);
+  *dividend /= 10;
+  return rem;
+}

commit 2291ec7c6fbffd652da6118e45628578b7650a4a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 1 14:47:18 2019 +0800

    rockchip: atags: add JShash for tag
    
    Since atags is passed between so many pre-loader, it's better
    add hash check for tag.
    
    It compatibles with legacy code and tag data, because 'hash'
    is reserved field in old tag data.
    
    Change-Id: I18b4c46f75b2c5a50194c23576e6f1437c83ccf5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 78c0039b1e..0d0c496f69 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -51,7 +51,8 @@ struct tag_serial {
 	u32 baudrate;
 	u32 m_mode;
 	u32 id;
-	u32 reserved[3];
+	u32 reserved[2];
+	u32 hash;
 } __packed;
 
 struct tag_bootdev {
@@ -59,14 +60,16 @@ struct tag_bootdev {
 	u32 devtype;
 	u32 devnum;
 	u32 mode;
-	u32 reserved[8];
+	u32 reserved[7];
+	u32 hash;
 } __packed;
 
 struct tag_ddr_mem {
 	u32 count;
 	u32 version;
 	u64 bank[20];
-	u32 reserved[4];
+	u32 reserved[3];
+	u32 hash;
 } __packed;
 
 struct tag_tos_mem {
@@ -85,7 +88,9 @@ struct tag_tos_mem {
 		u32 flags;
 	} drm_mem;
 
-	u64 reserved[8];
+	u64 reserved[7];
+	u32 reserved1;
+	u32 hash;
 } __packed;
 
 struct tag_atf_mem {
@@ -93,7 +98,8 @@ struct tag_atf_mem {
 	u64 phy_addr;
 	u32 size;
 	u32 flags;
-	u32 reserved[3];
+	u32 reserved[2];
+	u32 hash;
 } __packed;
 
 struct tag_ram_partition {
@@ -105,7 +111,10 @@ struct tag_ram_partition {
 		char name[16];
 		u64 start;
 		u64 size;
-	} part[16];
+	} part[6];
+
+	u32 reserved1[3];
+	u32 hash;
 } __packed;
 
 struct tag_core {
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 8b9b9273c6..b330a8c897 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -10,6 +10,7 @@
 #include <debug_uart.h>
 #endif
 
+#define HASH_LEN	sizeof(u32)
 #define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
 #define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
 #define for_each_tag(t, base)		\
@@ -72,6 +73,20 @@ void *memcpy(void *dest, const void *src, size_t count)
 }
 #endif
 
+static u32 js_hash(void *buf, u32 len)
+{
+	u32 i, hash = 0x47C6A7E6;
+	char *data = buf;
+
+	if (!buf || !len)
+		return hash;
+
+	for (i = 0; i < len; i++)
+		hash ^= ((hash << 5) + data[i] + (hash >> 2));
+
+	return hash;
+}
+
 static int bad_magic(u32 magic)
 {
 	bool bad;
@@ -121,7 +136,7 @@ int atags_is_available(void)
 
 int atags_set_tag(u32 magic, void *tagdata)
 {
-	u32 length, size = 0;
+	u32 length, size = 0, hash;
 	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
 
 	if (!tagdata)
@@ -152,6 +167,10 @@ int atags_set_tag(u32 magic, void *tagdata)
 			if (bad_magic(t->hdr.magic))
 				return -EINVAL;
 
+			/* This is an old tag, override it */
+			if (t->hdr.magic == magic)
+				break;
+
 			if (t->hdr.magic == ATAG_NONE)
 				break;
 		}
@@ -188,8 +207,10 @@ int atags_set_tag(u32 magic, void *tagdata)
 	/* It's okay to setup a new tag */
 	t->hdr.magic = magic;
 	t->hdr.size = size;
-	length = (t->hdr.size << 2) - sizeof(struct tag_header);
+	length = (t->hdr.size << 2) - sizeof(struct tag_header) - HASH_LEN;
 	memcpy(&t->u, (char *)tagdata, length);
+	hash = js_hash(t, (size << 2) - HASH_LEN);
+	memcpy((char *)&t->u + length, &hash, HASH_LEN);
 
 	/* Next tag */
 	t = tag_next(t);
@@ -203,6 +224,7 @@ int atags_set_tag(u32 magic, void *tagdata)
 
 struct tag *atags_get_tag(u32 magic)
 {
+	u32 *hash, calc_hash, size;
 	struct tag *t;
 
 	if (!atags_is_available())
@@ -215,8 +237,25 @@ struct tag *atags_get_tag(u32 magic)
 		if (bad_magic(t->hdr.magic))
 			return NULL;
 
-		if (t->hdr.magic == magic)
+		if (t->hdr.magic != magic)
+			continue;
+
+		size = t->hdr.size;
+		hash = (u32 *)((ulong)t + (size << 2) - HASH_LEN);
+		if (!*hash) {
+			debug("No hash, magic(%x)\n", magic);
 			return t;
+		} else {
+			calc_hash = js_hash(t, (size << 2) - HASH_LEN);
+			if (calc_hash == *hash) {
+				debug("Hash okay, magic(%x)\n", magic);
+				return t;
+			} else {
+				debug("Hash bad, magic(%x), orgHash=%x, nowHash=%x\n",
+				      magic, *hash, calc_hash);
+				return NULL;
+			}
+		}
 	}
 
 	return NULL;
@@ -236,6 +275,9 @@ void atags_stat(void)
 	u32 start = ATAGS_PHYS_BASE, end = ATAGS_PHYS_BASE + ATAGS_SIZE;
 	struct tag *t;
 
+	if (!atags_is_available())
+		return;
+
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (atags_overflow(t))
 			return;
@@ -275,6 +317,7 @@ void atags_print_tag(struct tag *t)
 		printf("        id = 0x%x\n", t->u.serial.id);
 		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.serial.hash);
 		break;
 	case ATAG_BOOTDEV:
 		printf("[bootdev]:\n");
@@ -287,6 +330,7 @@ void atags_print_tag(struct tag *t)
 		for (i = 0; i < ARRAY_SIZE(t->u.bootdev.reserved); i++)
 			printf("    res[%d] = 0x%x\n",
 			       i, t->u.bootdev.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.bootdev.hash);
 		break;
 	case ATAG_TOS_MEM:
 		printf("[tos_mem]:\n");
@@ -305,6 +349,8 @@ void atags_print_tag(struct tag *t)
 		printf("           flags = 0x%x\n", t->u.tos_mem.drm_mem.flags);
 		for (i = 0; i < ARRAY_SIZE(t->u.tos_mem.reserved); i++)
 			printf("   res[%d] = 0x%llx\n", i, t->u.tos_mem.reserved[i]);
+		printf("     res1 = 0x%x\n", t->u.tos_mem.reserved1);
+		printf("     hash = 0x%x\n", t->u.tos_mem.hash);
 		break;
 	case ATAG_DDR_MEM:
 		printf("[ddr_mem]:\n");
@@ -316,6 +362,7 @@ void atags_print_tag(struct tag *t)
 			printf("  bank[%d] = 0x%llx\n", i, t->u.ddr_mem.bank[i]);
 		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.ddr_mem.hash);
 		break;
 	case ATAG_RAM_PARTITION:
 		printf("[ram_partition]:\n");
@@ -326,11 +373,14 @@ void atags_print_tag(struct tag *t)
 			printf("    res[%d] = 0x%x\n", i, t->u.ram_part.reserved[i]);
 
 		printf("    Part:  Name       Start Addr      Size\t\n");
-		for (i = 0; i < t->u.ram_part.count; i++)
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.part); i++)
 			printf("%16s      0x%08llx      0x%08llx\n",
 			       t->u.ram_part.part[i].name,
 			       t->u.ram_part.part[i].start,
 			       t->u.ram_part.part[i].size);
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved1); i++)
+			printf("   res1[%d] = 0x%x\n", i, t->u.ram_part.reserved1[i]);
+		printf("      hash = 0x%x\n", t->u.ram_part.hash);
 		break;
 	case ATAG_ATF_MEM:
 		printf("[atf_mem]:\n");
@@ -341,6 +391,7 @@ void atags_print_tag(struct tag *t)
 		printf("      size = 0x%x\n", t->u.atf_mem.size);
 		for (i = 0; i < ARRAY_SIZE(t->u.atf_mem.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
+		printf("      hash = 0x%x\n", t->u.atf_mem.hash);
 		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
@@ -361,6 +412,9 @@ void atags_print_all_tags(void)
 {
 	struct tag *t;
 
+	if (!atags_is_available())
+		return;
+
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (atags_overflow(t))
 			return;

commit 716ab2e7e60a2ec837cf870216854108d7cf833f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 11:05:58 2019 +0800

    rockchip: atags: add tag overflow check when tag lookup
    
    Change-Id: I0fca9559a6656338e4c956bffa3734ff744dcc4c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 9c9adad3f7..8b9b9273c6 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -95,6 +95,23 @@ static int inline atags_size_overflow(struct tag *t, u32 tag_size)
 	return (unsigned long)t + (tag_size << 2) - ATAGS_PHYS_BASE > ATAGS_SIZE;
 }
 
+static int atags_overflow(struct tag *t)
+{
+	bool overflow;
+
+	overflow = atags_size_overflow(t, 0) ||
+		   atags_size_overflow(t, t->hdr.size);
+	if (overflow) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+		printf("Tag is overflow\n");
+#else
+		printascii("Tag is overflow\n");
+#endif
+	}
+
+	return overflow;
+}
+
 int atags_is_available(void)
 {
 	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
@@ -129,6 +146,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	} else {
 		/* Find the end, and use it as a new tag */
 		for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+			if (atags_overflow(t))
+				return -EINVAL;
+
 			if (bad_magic(t->hdr.magic))
 				return -EINVAL;
 
@@ -159,16 +179,11 @@ int atags_set_tag(u32 magic, void *tagdata)
 		break;
 	};
 
-	if (atags_size_overflow(t, size)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-		printf("%s: failed! no memory to setup magic(%x), max_mem=0x%x\n",
-		       __func__, magic, ATAGS_SIZE);
-#else
-		printascii("no memory to setup magic\n");
-#endif
+	if (!size)
+		return -EINVAL;
 
+	if (atags_size_overflow(t, size))
 		return -ENOMEM;
-	}
 
 	/* It's okay to setup a new tag */
 	t->hdr.magic = magic;
@@ -194,6 +209,9 @@ struct tag *atags_get_tag(u32 magic)
 		return NULL;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return NULL;
+
 		if (bad_magic(t->hdr.magic))
 			return NULL;
 
@@ -219,6 +237,9 @@ void atags_stat(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return;
+
 		if (bad_magic(t->hdr.magic))
 			return;
 
@@ -341,6 +362,9 @@ void atags_print_all_tags(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (atags_overflow(t))
+			return;
+
 		if (bad_magic(t->hdr.magic))
 			return;
 

commit 7b2d6d6e23cf9b7359349883cfd2480d91c32247
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 10:48:21 2019 +0800

    rockchip: atags: move error message to bad_magic()
    
    Change-Id: I4c41fa05361f4c8ad2e33530764c2ba5090aeb00
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index cde2f23a3e..9c9adad3f7 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -72,11 +72,22 @@ void *memcpy(void *dest, const void *src, size_t count)
 }
 #endif
 
-static int inline bad_magic(u32 magic)
+static int bad_magic(u32 magic)
 {
-	return ((magic != ATAG_CORE) &&
-		(magic != ATAG_NONE) &&
-		(magic < ATAG_SERIAL || magic > ATAG_MAX));
+	bool bad;
+
+	bad = ((magic != ATAG_CORE) &&
+	       (magic != ATAG_NONE) &&
+	       (magic < ATAG_SERIAL || magic > ATAG_MAX));
+	if (bad) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+		printf("Magic(%x) is not support\n", magic);
+#else
+		printascii("Magic is not support\n");
+#endif
+	}
+
+	return bad;
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)
@@ -99,15 +110,8 @@ int atags_set_tag(u32 magic, void *tagdata)
 	if (!tagdata)
 		return -ENODATA;
 
-	if (bad_magic(magic)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-		printf("%s: magic(%x) is not support\n", __func__, magic);
-#else
-		printascii("magic is not support\n");
-#endif
-
+	if (bad_magic(magic))
 		return -EINVAL;
-	}
 
 	/* Not allowed to be set by user directly, so do nothing */
 	if ((magic == ATAG_CORE) || (magic == ATAG_NONE))
@@ -125,21 +129,8 @@ int atags_set_tag(u32 magic, void *tagdata)
 	} else {
 		/* Find the end, and use it as a new tag */
 		for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-			/*
-			 * We had better check magic to avoid traversing an
-			 * unknown tag, in case of atags has been damaged by
-			 * some unknown reason.
-			 */
-			if (bad_magic(t->hdr.magic)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-				printf("%s: find unknown magic(%x)\n",
-				       __func__, t->hdr.magic);
-#else
-				printascii("find unknown magic\n");
-#endif
-
+			if (bad_magic(t->hdr.magic))
 				return -EINVAL;
-			}
 
 			if (t->hdr.magic == ATAG_NONE)
 				break;
@@ -203,15 +194,8 @@ struct tag *atags_get_tag(u32 magic)
 		return NULL;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (bad_magic(t->hdr.magic)) {
-#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
-			printf("%s: find unknown magic(%x)\n",
-			       __func__, t->hdr.magic);
-#else
-			printascii("find unknown magic\n");
-#endif
+		if (bad_magic(t->hdr.magic))
 			return NULL;
-		}
 
 		if (t->hdr.magic == magic)
 			return t;
@@ -235,11 +219,8 @@ void atags_stat(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (bad_magic(t->hdr.magic)) {
-			printf("%s: find unknown magic(%x)\n",
-			       __func__, t->hdr.magic);
+		if (bad_magic(t->hdr.magic))
 			return;
-		}
 
 		in_use += (t->hdr.size << 2);
 	}
@@ -360,11 +341,8 @@ void atags_print_all_tags(void)
 	struct tag *t;
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
-		if (bad_magic(t->hdr.magic)) {
-			printf("%s: find unknown magic(%x)\n",
-			       __func__, t->hdr.magic);
+		if (bad_magic(t->hdr.magic))
 			return;
-		}
 
 		atags_print_tag(t);
 	}

commit 82be0dc462e47efa557e4155a594e01f7eb17e5e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 19:29:08 2019 +0800

    configs: rk3128: add default CONFIG_FASTBOOT_BUF_ADDR
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x60800800.
    
    Change-Id: I14b9e6e28caf6309ac53f3096b3730d5851676dc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 46c4f5da7b..511babf891 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0

commit 591a6a81959525226cb65b98043d85260d79d904
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 19:27:40 2019 +0800

    configs: rk1808: add default CONFIG_FASTBOOT_BUF_SIZE
    
    The CONFIG_FASTBOOT_BUF_SIZE is 0x04000000.
    
    Change-Id: Ic1da0b84fd84c328e062a278eda23c82525723f1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 8ffec5633e..0f722cb02d 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -16,6 +16,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set

commit 2fea0d71b52d427eebfa5714e98716bdc8531cce
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 19:26:11 2019 +0800

    configs: rv1108: change the CONFIG_FASTBOOT_BUF_SIZE value
    
    Change the CONFIG_FASTBOOT_BUF_SIZE value to 0x4000000.
    
    Change-Id: Ia591a0daba78330b9c407f6eb473751135fd8cdf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 4afae952d0..8b3c477645 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -18,7 +18,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set

commit 11980e05e6adfc08d0a48da9dd97cebc13268645
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:14:22 2019 +0800

    configs: rk3399: change the CONFIG_FASTBOOT_BUF_SIZE value
    
    Change the CONFIG_FASTBOOT_BUF_SIZE value to 0x4000000
    
    Change-Id: Ic93057bf55b3ad6825650cd734c64826748e4a97
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 2d3df130a2..c431b34bf8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -20,7 +20,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index af958d7861..cc966e62a5 100755
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -23,7 +23,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 778f0964b5..7e6c7a5231 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -23,7 +23,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set

commit ef6ed4129d66dfa78991d2cd4f421e4115705a1b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:11:56 2019 +0800

    configs: rk3328: add default CONFIG_FASTBOOT_BUF_SIZE
    
    The CONFIG_FASTBOOT_BUF_SIZE is 0x4000000
    
    Change-Id: I813a6b117bbce7029ffe76516ed12b4e0d1e0940
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 7bc65c73e5..2f2698ee51 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -25,6 +25,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 998e53f9f9..b1b5bf7fd2 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -30,6 +30,7 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set

commit 7a7d3f1dc947c36a36a3a748d09785c0bab760eb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:07:55 2019 +0800

    rk3288: add default CONFIG_FASTBOOT_BUF_ADDR & CONFIG_FASTBOOT_BUF_SIZE
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x800800.
    The CONFIG_FASTBOOT_BUF_SIZE is 0x4000000.
    
    Change-Id: Ic70898f61daff16caebdfb94a7e40d45b3bd6359
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index 4c65113ff0..2dfa1e8c40 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -14,6 +14,8 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index e9e178100b..9f6672e555 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -17,6 +17,8 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x4000000
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

commit 3420d534ce2da36e8ec56610f2d5c14bb8c02494
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 18:02:58 2019 +0800

    configs: rk3229: add default CONFIG_FASTBOOT_BUF_ADDR
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x60800800.
    
    Change-Id: I1fc730b09221d226dc38eb9880a6dd676c69a00d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index a6c05c99da..99a232f563 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -30,6 +30,7 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index cc18398c46..c7c22af77a 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -31,6 +31,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0

commit 980e358fa0659ec03991f58d0a3b4d3d0007654f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 17:56:21 2019 +0800

    configs: rk3036: add default CONFIG_FASTBOOT_BUF_ADDR
    
    The CONFIG_FASTBOOT_BUF_ADDR is 0x60800800.
    
    Change-Id: I56c6f5468271ca71fdf8f0b0c5ce6e6fa54fa259
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 2e8fcf21ad..9166b2725f 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -30,6 +30,7 @@ CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index 62e45aa81b..acb901c273 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -32,6 +32,7 @@ CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0

commit a5e3baaa9355e34ae1ebb4a1e2394897f9332b49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 4 20:06:35 2019 +0800

    irq: disable all gpio interrupt by default
    
    Enable gpio irq only when child pin irq is request.
    
    Change-Id: I429839c7dcdcb90cfe58738eeb36c7445fb0152b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gpio-switch.h b/drivers/irq/irq-gpio-switch.h
index 1442825132..a46604fb03 100644
--- a/drivers/irq/irq-gpio-switch.h
+++ b/drivers/irq/irq-gpio-switch.h
@@ -26,6 +26,7 @@ struct gpio_bank {
 	int id;
 	int irq_base;
 	int ngpio;
+	int use_count;
 };
 
 #define GPIO_BANK_REGISTER(ID, GPIO_BANK_NUM)	\
@@ -35,6 +36,7 @@ struct gpio_bank {
 		.id	  = ID,						\
 		.irq_base = PIN_BASE + (ID) * (GPIO_BANK_NUM),		\
 		.ngpio    = GPIO_BANK_NUM,				\
+		.use_count = 0						\
 	}
 
 /* gpio bank[31:8] and pin[7:0] */
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index ce88cc8f7b..3e61d188fa 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -276,6 +276,10 @@ static int gpio_irq_enable(int gpio_irq)
 
 	gpio_irq_unmask(bank->regbase, offset_to_bit(gpio));
 
+	if (bank->use_count == 0)
+		irq_handler_enable(IRQ_GPIO0 + bank->id);
+	bank->use_count++;
+
 	return 0;
 }
 
@@ -293,6 +297,10 @@ static int gpio_irq_disable(int irq)
 
 	gpio_irq_mask(bank->regbase, offset_to_bit(gpio));
 
+	if (bank->use_count == 1)
+		irq_handler_disable(IRQ_GPIO0 + bank->id);
+	bank->use_count--;
+
 	return 0;
 }
 
@@ -311,8 +319,8 @@ static int gpio_irq_init(void)
 			irq_install_handler(IRQ_GPIO0 + bank->id,
 			(interrupt_handler_t *)generic_gpio_handle_irq, NULL);
 
-			/* default enable all gpio group interrupt */
-			irq_handler_enable(IRQ_GPIO0 + bank->id);
+			/* default disable all gpio group interrupt */
+			irq_handler_disable(IRQ_GPIO0 + bank->id);
 		}
 	}
 

commit 005d29a79d84659e0e26de97107a4a3a0a9a510f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Mar 4 14:48:16 2019 +0800

    video/drm: rockchip_display: support get display mode from edid if client is not present
    
    Change-Id: Ib8956972b7bbb6aaaac2e3c8a93e0d38d98abf6a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d5bf157274..9f8be7d2ba 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -465,8 +465,6 @@ bool drm_mode_is_420(const struct drm_display_info *display,
 static int display_get_timing(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *conn = conn_state->connector;
-	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
@@ -485,18 +483,6 @@ static int display_get_timing(struct display_state *state)
 		goto done;
 	}
 
-	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
-		int panel_bits_per_colourp;
-
-		if (!edid_get_drm_mode((void *)&conn_state->edid,
-				     sizeof(conn_state->edid), mode,
-				     &panel_bits_per_colourp)) {
-			printf("Using display timing from edid\n");
-			edid_print_info((void *)&conn_state->edid);
-			goto done;
-		}
-	}
-
 	printf("failed to find display timing\n");
 	return -ENODEV;
 done:
@@ -524,6 +510,7 @@ static int display_init(struct display_state *state)
 	struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
+	int bpc;
 	int ret = 0;
 	static bool __print_once = false;
 
@@ -576,13 +563,9 @@ static int display_init(struct display_state *state)
 			goto deinit;
 	}
 
-	if (conn_funcs->get_timing) {
-		ret = conn_funcs->get_timing(state);
-	} else if (panel_state->panel) {
+	if (panel_state->panel) {
 		ret = display_get_timing(state);
 	} else if (conn_state->bridge) {
-		int bpc;
-
 		ret = video_bridge_read_edid(conn_state->bridge->dev,
 					     conn_state->edid, EDID_SIZE);
 		if (ret > 0) {
@@ -591,6 +574,17 @@ static int display_init(struct display_state *state)
 			if (!ret)
 				edid_print_info((void *)&conn_state->edid);
 		}
+	} else if (conn_funcs->get_timing) {
+		ret = conn_funcs->get_timing(state);
+	} else if (conn_funcs->get_edid) {
+		ret = conn_funcs->get_edid(state);
+		if (!ret) {
+			ret = edid_get_drm_mode((void *)&conn_state->edid,
+						sizeof(conn_state->edid), mode,
+						&bpc);
+			if (!ret)
+				edid_print_info((void *)&conn_state->edid);
+		}
 	}
 
 	if (ret)

commit bdeba276114bfc536d5b80e1dcc28cfef9a5b3d9
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Tue Mar 5 10:30:48 2019 +0800

    common: write_keybox: fix write attestation key compatibility error
    
    Using the same name when write key in new formation and old formation
    cause ta parse key data error when use key in old formation
    
    Change-Id: I7f83efc3672e903e608d89f7dc214465dc321502
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/attestation_key.c b/common/attestation_key.c
index 0cfe2ef12e..3e3ecb64c9 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -199,12 +199,13 @@ static bool validate_ca_header(const uint8_t *buf, uint32_t buf_size)
 
 /* write key to security storage. */
 static uint32_t write_key(keymaster_algorithm_t key_type,
-				const uint8_t *key, uint32_t key_size)
+			  unsigned char *key_name,
+			  const uint8_t *key, uint32_t key_size)
 {
 	char key_file[STORAGE_ID_LENGTH_MAX] = {0};
 
-	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_FILE,
-		get_keyslot_str(key_type));
+	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", key_name,
+		 get_keyslot_str(key_type));
 	write_to_keymaster((uint8_t *)key_file, strlen(key_file),
 				(uint8_t *)key, key_size);
 	return 0;
@@ -243,6 +244,7 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 				disk_partition_t *misc_partition)
 {
 	int ret;
+	unsigned char key_name[STORAGE_ID_LENGTH_MAX] = {0};
 
 	if (!dev_desc) {
 		printf("%s: Could not find device\n", __func__);
@@ -325,7 +327,9 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 		return ATAP_RESULT_ERROR_BUF_COPY;
 	}
 	/* write rsa private key to security storage*/
-	write_key(KM_ALGORITHM_RSA, key.data, key.data_length);
+	memcpy(key_name, ATTESTATION_KEY_PREFIX,
+	       sizeof(ATTESTATION_KEY_PREFIX));
+	write_key(KM_ALGORITHM_RSA, key_name, key.data, key.data_length);
 
 	/* read rsa cert chain */
 	atap_certchain certchain;
@@ -359,7 +363,7 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 	}
 
 	/* write ec private key to security storage*/
-	write_key(KM_ALGORITHM_EC, key.data, key.data_length);
+	write_key(KM_ALGORITHM_EC, key_name, key.data, key.data_length);
 
 	/* read ec cert chain */
 	free_cert_chain(certchain);
@@ -430,12 +434,14 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 						    uint32_t len)
 {
 	unsigned char keybuf[ATTESTATION_DATA_OFFSET] = {0};
+	unsigned char key_name[STORAGE_ID_LENGTH_MAX] = {0};
 	uint32_t device_id_size = 0;
 	uint8_t device_id[32] = {0};
 	uint8_t *key_buf = NULL;
 	uint32_t algorithm;
 	uint8_t *key_data;
 	uint32_t key_data_length = 0;
+
 	/* skip the tag(4 byte) and the size of key(4 byte) */
 	memcpy(keybuf, received_data + 8, ATTESTATION_DATA_OFFSET);
 	key_data = malloc(ATTESTATION_DATA_OFFSET);
@@ -445,11 +451,11 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 		printf("invalidate device_id_size:%d\n", device_id_size);
 		return ATAP_RESULT_ERROR_INVALID_DEVICE_ID;
 	}
-
 	memcpy(device_id, keybuf + CA_HEADER_LEN + sizeof(uint32_t),
 	       device_id_size);
 	printf("device_id:%s\n", device_id);
 
+	memcpy(key_name, ATTESTATION_KEY_FILE, sizeof(ATTESTATION_KEY_FILE));
 	/* read algorithm(RSA) from keybuf */
 	key_buf = keybuf + CA_HEADER_LEN + sizeof(uint32_t) + device_id_size;
 	copy_uint32_from_buf(&key_buf, &algorithm);
@@ -457,7 +463,7 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 	/* read rsa key and certchain */
 	read_key_data(&key_buf, key_data, &key_data_length);
 	printf("write attestation key: RSA\n");
-	write_key(KM_ALGORITHM_RSA, key_data, key_data_length);
+	write_key(KM_ALGORITHM_RSA, key_name, key_data, key_data_length);
 
 	/* read algorithm(EC) from keybuf */
 	copy_uint32_from_buf(&key_buf, &algorithm);
@@ -465,7 +471,7 @@ atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
 	/* read ec key and certchain */
 	read_key_data(&key_buf, key_data, &key_data_length);
 	printf("write attestation key: EC\n");
-	write_key(KM_ALGORITHM_EC, key_data, key_data_length);
+	write_key(KM_ALGORITHM_EC, key_name, key_data, key_data_length);
 
 	memset(keybuf, 0, sizeof(keybuf));
 	free(key_data);

commit 785ce82a19631394ac43821e61acf483ee7600fa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 09:33:40 2019 +0800

    common: android: support misc partition absent
    
    Change-Id: Ida7780a1fd0981d8dbf01c0f25e283dfc6332eca
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index af912f98de..799963c573 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -878,7 +878,7 @@ bool android_avb_is_enabled(void)
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
-	enum android_boot_mode mode;
+	enum android_boot_mode mode = ANDROID_BOOT_MODE_NORMAL;
 	disk_partition_t misc_part_info;
 	int part_num;
 	int ret;
@@ -895,22 +895,23 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_MISC,
 					 &misc_part_info);
 	if (part_num < 0) {
-		printf("%s Could not find misc partition\n", __func__);
-		return -ENODEV;
-	}
-
+		printf("Could not find misc partition\n");
+	} else {
 #ifdef CONFIG_ANDROID_KEYMASTER_CA
-	/* load attestation key from misc partition. */
-	load_attestation_key(dev_desc, &misc_part_info);
+		/* load attestation key from misc partition. */
+		load_attestation_key(dev_desc, &misc_part_info);
 #endif
 
-	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
+		mode = android_bootloader_load_and_clear_mode(dev_desc,
+							      &misc_part_info);
 #ifdef CONFIG_RKIMG_BOOTLOADER
-	if (mode == ANDROID_BOOT_MODE_NORMAL) {
-		if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
-			mode = ANDROID_BOOT_MODE_RECOVERY;
-	}
+		if (mode == ANDROID_BOOT_MODE_NORMAL) {
+			if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+				mode = ANDROID_BOOT_MODE_RECOVERY;
+		}
 #endif
+	}
+
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
 #ifdef CONFIG_ANDROID_AB

commit 30431185982382875ae12b04d831bdf49fe4b712
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 28 10:42:56 2019 +0800

    rockchip: rk3308: disable uart2-m1 configure when pre-loader serial enable
    
    pre-loader has configure it.
    
    Change-Id: I2786ff7c438a38036a7a5be3337052f7e51423a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index c864b31c2e..0d11073ddf 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -10,6 +10,8 @@
 #include <asm/gpio.h>
 #include <debug_uart.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_ARM64
 #include <asm/armv8/mmu.h>
 static struct mm_region rk3308_mem_map[] = {
@@ -125,6 +127,9 @@ void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;
 
+	if (gd && gd->serial.using_pre_serial)
+		return;
+
 	/* Enable early UART2 channel m1 on the rk3308 */
 	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
 		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);

commit a0bf35b5828e532111a10d1b90bf6e9d401ce4a4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Feb 28 11:20:44 2019 +0800

    mmc: rpmb: correct MMC_RSP_R1b to MMC_RSP_R1
    
    According to eMMC spec, the resp_type of MMC_CMD_WRITE_MULTIPLE_BLOCK
    is MMC_RSP_R1 but not MMC_RSP_R1b.
    
    If use MMC_RSP_R1b, this causes rpmb can not work with sdhci drive.
    
    Change-Id: I02ab825a4a526646079be6a7ae27326d1a3b7acf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index dda84de781..88136f0644 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -84,7 +84,7 @@ static int mmc_rpmb_request(struct mmc *mmc, const void *s,
 
 	cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
 	cmd.cmdarg = 0;
-	cmd.resp_type = MMC_RSP_R1b;
+	cmd.resp_type = MMC_RSP_R1;
 
 	data.src = (const char *)s;
 	data.blocks = count;

commit 562a66d432702328bc8db5f42bb5e5811788fec0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Feb 26 22:12:27 2019 +0800

    cmd: fastboot: test the fastboot memory space availability
    
    Use the sysmem to test fastboot memory is available or not.
    
    Change-Id: I021152827b6948fabd5ea41e111ea20adf43167f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 67aa7b8d7b..bb2f416b78 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -13,6 +13,7 @@
 #include <g_dnl.h>
 #include <net.h>
 #include <usb.h>
+#include <sysmem.h>
 
 static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
@@ -21,7 +22,6 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	char *usb_controller;
 	int ret;
 #endif
-
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
@@ -65,6 +65,13 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto exit;
 	}
 
+	if (!sysmem_alloc_base("fastboot",
+			       CONFIG_FASTBOOT_BUF_ADDR,
+			       CONFIG_FASTBOOT_BUF_SIZE)) {
+		printf("The fastboot memory space is unusable!\n");
+		return CMD_RET_FAILURE;
+	}
+
 	printf("OK\n");
 
 	while (1) {
@@ -78,6 +85,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	ret = CMD_RET_SUCCESS;
 
 exit:
+	sysmem_free(CONFIG_FASTBOOT_BUF_ADDR);
 	g_dnl_unregister();
 	g_dnl_clear_detach();
 	board_usb_cleanup(controller_index, USB_INIT_DEVICE);

commit 727ebf6de1e1558b976cad0e510c02f4272d2ef8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Mar 1 10:23:54 2019 +0800

    lib: sysmem: alloc base and size must be 4-byte aligned
    
    Change-Id: Icf59ee6522f2e0793605b03b0bcf05b58585069f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 24bd4f91c9..2549de95f2 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -266,6 +266,14 @@ void *sysmem_alloc_align_base(const char *name,
 		return NULL;
 	}
 
+	if (!IS_ALIGNED(base, 4)) {
+		SYSMEM_E("\"%s\" base=0x%08lx is not 4-byte aligned\n", name, (ulong)base);
+		return NULL;
+	}
+
+	/* Must be 4-byte aligned */
+	size = ALIGN(size, 4);
+
 	/* Already allocated ? */
 	list_for_each(node, &sysmem->allocated_head) {
 		prop = list_entry(node, struct sysmem_property, node);

commit dd20212857596902abbb882c6cc871ac0ae29cbd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 16:30:41 2019 +0800

    configs: rk3308 aarch32/64: enable led gpio support
    
    Change-Id: I833ea6788c036cb27df690cacf55e7b12788b4a2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 0edc1895f0..c1a2d8def6 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 # CONFIG_DOS_PARTITION is not set
@@ -49,6 +50,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index b93cba6549..5be3f455a3 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_LED is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 # CONFIG_DOS_PARTITION is not set
@@ -48,6 +49,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y

commit 19066e99322ef4804b976438e16459c7ace9228c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 16:29:00 2019 +0800

    led: led_gpio: add "default-state" apply
    
    It follows kernel led gpio initialization.
    
    Change-Id: I8c4af429f03bd373e76cd0607306950a2dce33de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 9976635887..56702a1417 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -60,11 +60,29 @@ static int led_gpio_probe(struct udevice *dev)
 {
 	struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev);
 	struct led_gpio_priv *priv = dev_get_priv(dev);
+	const char *state;
+	int ret;
 
 	/* Ignore the top-level LED node */
 	if (!uc_plat->label)
 		return 0;
-	return gpio_request_by_name(dev, "gpios", 0, &priv->gpio, GPIOD_IS_OUT);
+
+	ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio, GPIOD_IS_OUT);
+	if (ret) {
+		printf("Failed to request gpios of led '%s'\n", uc_plat->label);
+		return ret;
+	}
+
+	/* Apply default state */
+	state = dev_read_prop(dev, "default-state", NULL);
+	if (state) {
+		if (!strcmp(state, "on"))
+			ret = gpio_led_set_state(dev, LEDST_ON);
+		else if (!strcmp(state, "off"))
+			ret = gpio_led_set_state(dev, LEDST_OFF);
+	}
+
+	return ret;
 }
 
 static int led_gpio_remove(struct udevice *dev)

commit b3b8e4f06e650129e89736bf5fd63d77c543d687
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Dec 7 17:42:40 2018 +0800

    drivers: rk_nand: support SKHynix 14nm 2D 16GB Nand Flash
    
    support SKHynix 14nm 2D 16GB NAND FLASH H27TDG8T2D8R.
    
    Change-Id: I60bb7aa145d2c6c6be90e91a8288300eacaeabb1
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index b16e02e93b..ff3d230ed4 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-09-5
+ * date: 2019-01-07
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -179,6 +179,38 @@ FlashSetRandomizer:
 	.word	.LANCHOR5
 	.word	.LANCHOR6
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashBlockAlignInit,"ax",%progbits
+	.align	1
+	.global	FlashBlockAlignInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBlockAlignInit, %function
+FlashBlockAlignInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cmp	r0, #256
+	ldr	r3, .L44
+	bls	.L40
+	mov	r2, #512
+.L43:
+	str	r2, [r3]
+	bx	lr
+.L40:
+	cmp	r0, #128
+	bhi	.L42
+	str	r0, [r3]
+	bx	lr
+.L42:
+	mov	r2, #256
+	b	.L43
+.L45:
+	.align	2
+.L44:
+	.word	.LANCHOR3
+	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadCmd
@@ -193,7 +225,7 @@ FlashReadCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L40
+	ldr	r4, .L47
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -211,9 +243,9 @@ FlashReadCmd:
 	str	r2, [r3, #2056]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L41:
+.L48:
 	.align	2
-.L40:
+.L47:
 	.word	.LANCHOR6
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
@@ -228,10 +260,10 @@ FlashReadDpDataOutCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L46
+	ldr	r2, .L53
 	push	{r4, r5, r6}
 	uxtb	r6, r1
-	ldr	r4, .L46+4
+	ldr	r4, .L53+4
 	lsrs	r5, r1, #8
 	ldr	r3, [r2, r0, lsl #3]
 	add	r2, r2, r0, lsl #3
@@ -241,7 +273,7 @@ FlashReadDpDataOutCmd:
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
 	add	r3, r3, r2
-	bne	.L43
+	bne	.L50
 	movs	r2, #6
 	str	r2, [r3, #2056]
 	movs	r2, #0
@@ -250,12 +282,12 @@ FlashReadDpDataOutCmd:
 	str	r6, [r3, #2052]
 	str	r5, [r3, #2052]
 	str	r4, [r3, #2052]
-.L45:
+.L52:
 	movs	r2, #224
 	str	r2, [r3, #2056]
 	pop	{r4, r5, r6}
 	b	FlashSetRandomizer
-.L43:
+.L50:
 	movs	r2, #0
 	str	r2, [r3, #2056]
 	str	r2, [r3, #2052]
@@ -267,73 +299,13 @@ FlashReadDpDataOutCmd:
 	str	r4, [r3, #2056]
 	str	r2, [r3, #2052]
 	str	r2, [r3, #2052]
-	b	.L45
-.L47:
-	.align	2
-.L46:
-	.word	.LANCHOR6
-	.word	.LANCHOR7
-	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
-	.section	.text.flash_enter_slc_mode,"ax",%progbits
-	.align	1
-	.global	flash_enter_slc_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L53
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L48
-	ldr	r3, .L53+4
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	add	r3, r2, r3, lsl #8
-	movs	r2, #218
-	str	r2, [r3, #2056]
-.L48:
-	bx	lr
+	b	.L52
 .L54:
 	.align	2
 .L53:
-	.word	.LANCHOR8
-	.word	.LANCHOR6
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",%progbits
-	.align	1
-	.global	flash_exit_slc_mode
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L55
-	ldr	r3, .L60+4
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	add	r3, r2, r3, lsl #8
-	movs	r2, #223
-	str	r2, [r3, #2056]
-.L55:
-	bx	lr
-.L61:
-	.align	2
-.L60:
-	.word	.LANCHOR8
 	.word	.LANCHOR6
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.word	.LANCHOR7
+	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgFirstCmd
@@ -348,7 +320,7 @@ FlashProgFirstCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L63
+	ldr	r4, .L56
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
@@ -365,9 +337,9 @@ FlashProgFirstCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L64:
+.L57:
 	.align	2
-.L63:
+.L56:
 	.word	.LANCHOR6
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
@@ -382,12 +354,12 @@ FlashEraseCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L70
+	ldr	r4, .L63
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
 	lsls	r0, r0, #8
-	cbz	r2, .L66
+	cbz	r2, .L59
 	adds	r2, r3, r0
 	movs	r4, #96
 	str	r4, [r2, #2056]
@@ -397,10 +369,10 @@ FlashEraseCmd:
 	str	r4, [r2, #2052]
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
-	ldr	r2, .L70+4
+	ldr	r2, .L63+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
-.L66:
+.L59:
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
@@ -413,9 +385,9 @@ FlashEraseCmd:
 	str	r1, [r3, #2052]
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
-.L71:
+.L64:
 	.align	2
-.L70:
+.L63:
 	.word	.LANCHOR6
 	.word	.LANCHOR3
 	.size	FlashEraseCmd, .-FlashEraseCmd
@@ -433,11 +405,11 @@ FlashProgDpSecondCmd:
 	@ link register save eliminated.
 	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L73
+	ldr	r4, .L66
 	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
-	ldr	r4, .L73+4
+	ldr	r4, .L66+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
@@ -451,9 +423,9 @@ FlashProgDpSecondCmd:
 	str	r2, [r3, #2052]
 	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L74:
+.L67:
 	.align	2
-.L73:
+.L66:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
@@ -469,7 +441,7 @@ FlashProgSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L76
+	ldr	r3, .L69
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -477,9 +449,9 @@ FlashProgSecondCmd:
 	movs	r2, #16
 	str	r2, [r3, #2056]
 	bx	lr
-.L77:
+.L70:
 	.align	2
-.L76:
+.L69:
 	.word	.LANCHOR6
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
@@ -494,8 +466,8 @@ FlashProgDpFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L79
-	ldr	r1, .L79+4
+	ldr	r3, .L72
+	ldr	r1, .L72+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
@@ -503,9 +475,9 @@ FlashProgDpFirstCmd:
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
-.L80:
+.L73:
 	.align	2
-.L79:
+.L72:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
@@ -522,7 +494,7 @@ FlashReadStatus:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #112
-	ldr	r3, .L82
+	ldr	r3, .L75
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	movs	r0, #80
@@ -534,42 +506,42 @@ FlashReadStatus:
 	bl	udelay
 	ldr	r0, [r5, r4]
 	pop	{r3, r4, r5, pc}
-.L83:
+.L76:
 	.align	2
-.L82:
+.L75:
 	.word	.LANCHOR6
 	.size	FlashReadStatus, .-FlashReadStatus
-	.section	.text.JSHash,"ax",%progbits
+	.section	.text.js_hash,"ax",%progbits
 	.align	1
-	.global	JSHash
+	.global	js_hash
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	JSHash, %function
-JSHash:
+	.type	js_hash, %function
+js_hash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L87
+	ldr	r3, .L80
 	add	r1, r1, r0
 	push	{r4, lr}
-.L85:
+.L78:
 	cmp	r0, r1
-	bne	.L86
+	bne	.L79
 	mov	r0, r3
 	pop	{r4, pc}
-.L86:
+.L79:
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-	b	.L85
-.L88:
+	b	.L78
+.L81:
 	.align	2
-.L87:
+.L80:
 	.word	1204201446
-	.size	JSHash, .-JSHash
+	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
 	.global	FlashLoadIdbInfo
@@ -612,54 +584,54 @@ ToshibaSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	add	r7, r1, r1, lsl #2
-	ldr	r10, .L99+12
+	ldr	r10, .L92+12
 	mov	r5, r0
 	mov	r6, r1
 	movs	r4, #0
-	ldr	r8, .L99+16
-.L92:
+	ldr	r8, .L92+16
+.L85:
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L96
+	bcc	.L89
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L96:
+.L89:
 	movs	r3, #85
 	movs	r0, #200
 	str	r3, [r5, #8]
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
 	bl	udelay
-	ldr	r3, .L99
+	ldr	r3, .L92
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L93
+	bne	.L86
 	adds	r3, r4, r7
 	add	r3, r3, r8
-.L98:
+.L91:
 	ldrsb	r3, [r3, #5]
-.L97:
+.L90:
 	str	r3, [r5]
 	adds	r4, r4, #1
-	b	.L92
-.L93:
+	b	.L85
+.L86:
 	cmp	r3, #35
-	bne	.L95
-	ldr	r3, .L99+4
+	bne	.L88
+	ldr	r3, .L92+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
-	b	.L98
-.L95:
-	ldr	r3, .L99+8
+	b	.L91
+.L88:
+	ldr	r3, .L92+8
 	ldrsb	r3, [r3, r6]
-	b	.L97
-.L100:
+	b	.L90
+.L93:
 	.align	2
-.L99:
+.L92:
+	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
 	.word	.LANCHOR12
-	.word	.LANCHOR13
-	.word	.LANCHOR9
+	.word	.LANCHOR8
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
@@ -674,18 +646,18 @@ SamsungSetRRPara:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r6, r0
-	ldr	r7, .L104
+	ldr	r7, .L97
 	movs	r4, #0
 	mov	r10, #161
-	ldr	r8, .L104+4
+	ldr	r8, .L97+4
 	add	r1, r7, r1, lsl #2
 	adds	r5, r1, #3
-.L102:
+.L95:
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L103
+	bcc	.L96
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L103:
+.L96:
 	movs	r3, #0
 	str	r10, [r6, #8]
 	str	r3, [r6]
@@ -696,12 +668,12 @@ SamsungSetRRPara:
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
 	bl	udelay
-	b	.L102
-.L105:
+	b	.L95
+.L98:
 	.align	2
-.L104:
-	.word	.LANCHOR14
+.L97:
 	.word	.LANCHOR13
+	.word	.LANCHOR12
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.global	__aeabi_uidiv
 	.global	__aeabi_uidivmod
@@ -718,17 +690,17 @@ LogAddr2PhyAddr:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r6, r3
-	ldr	r3, .L111
+	ldr	r3, .L104
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
-	ldr	r3, .L111+4
+	ldr	r3, .L104+4
 	ldrh	fp, [r3]
 	uxth	r4, r4
-	ldr	r3, .L111+8
+	ldr	r3, .L104+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
 	ldr	r3, [r0, #4]
@@ -751,14 +723,14 @@ LogAddr2PhyAddr:
 	cmp	r8, #1
 	uxth	r1, r1
 	ubfx	r3, r3, #0, #10
-	bne	.L108
-	ldr	r2, .L111+12
+	bne	.L101
+	ldr	r2, .L104+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L108
-	ldr	r2, .L111+16
+	cbnz	r2, .L101
+	ldr	r2, .L104+16
 	ldrh	r3, [r2, r3, lsl #1]
-.L108:
-	ldr	r2, .L111+20
+.L101:
+	ldr	r2, .L104+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
 	add	r1, r1, r3
@@ -766,27 +738,27 @@ LogAddr2PhyAddr:
 	str	r1, [r7]
 	str	r10, [r6]
 	cmp	r3, #1
-	bls	.L110
+	bls	.L103
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
 	subs	r3, r0, r3
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
-.L109:
+.L102:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L110:
+.L103:
 	movs	r0, #0
-	b	.L109
-.L112:
+	b	.L102
+.L105:
 	.align	2
-.L111:
-	.word	.LANCHOR15
+.L104:
+	.word	.LANCHOR14
 	.word	.LANCHOR3
 	.word	.LANCHOR1
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	.LANCHOR17
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
@@ -801,56 +773,56 @@ LogAddr2PhyAddr:
 FlashReadStatusEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L125
+	ldr	r3, .L118
 	push	{r4, r5, r6, lr}
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L125+4
+	ldr	r3, .L118+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	cmp	r3, #2
 	lsl	r3, r4, #8
 	add	r4, r4, #8
-	bne	.L114
-	ldr	r0, .L125+8
-	cbnz	r2, .L115
+	bne	.L107
+	ldr	r0, .L118+8
+	cbnz	r2, .L108
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-.L124:
+.L117:
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
-	cbz	r0, .L119
+	cbz	r0, .L112
 	add	r6, r5, r4, lsl #8
 	movs	r2, #0
-.L118:
+.L111:
 	cmp	r2, r0
-	bcc	.L120
-.L119:
+	bcc	.L113
+.L112:
 	lsls	r4, r4, #8
 	movs	r0, #80
 	bl	udelay
 	ldr	r0, [r5, r4]
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.L115:
+.L108:
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-	b	.L124
-.L120:
+	b	.L117
+.L113:
 	lsls	r3, r2, #3
 	adds	r2, r2, #1
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
-	b	.L118
-.L114:
+	b	.L111
+.L107:
 	add	r3, r3, r5
 	movs	r2, #112
 	str	r2, [r3, #2056]
-	b	.L119
-.L126:
+	b	.L112
+.L119:
 	.align	2
-.L125:
+.L118:
 	.word	.LANCHOR6
 	.word	.LANCHOR18
 	.word	.LANCHOR7
@@ -870,16 +842,16 @@ FlashWaitReadyEN:
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-.L131:
+.L124:
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
 	cmp	r0, #255
 	mov	r3, r0
-	beq	.L131
+	beq	.L124
 	lsls	r3, r3, #25
-	bpl	.L131
+	bpl	.L124
 	pop	{r4, r5, r6, pc}
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
@@ -908,16 +880,16 @@ NandcGetChipIf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L136
+	ldr	r2, .L129
 	add	r3, r2, r0, lsl #3
 	ldr	r0, [r2, r0, lsl #3]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	add	r0, r0, r3, lsl #8
 	bx	lr
-.L137:
+.L130:
 	.align	2
-.L136:
+.L129:
 	.word	.LANCHOR6
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
@@ -932,16 +904,16 @@ NandcSetDdrPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L139
+	ldr	r3, .L132
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
-.L140:
+.L133:
 	.align	2
-.L139:
+.L132:
 	.word	.LANCHOR19
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
@@ -956,14 +928,14 @@ NandcSetDdrDiv:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L142
+	ldr	r3, .L135
 	orr	r0, r0, #16640
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
-.L143:
+.L136:
 	.align	2
-.L142:
+.L135:
 	.word	.LANCHOR19
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
@@ -978,20 +950,20 @@ NandcSetDdrMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L147
+	ldr	r3, .L140
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	cbnz	r0, .L145
+	cbnz	r0, .L138
 	bfi	r3, r0, #13, #1
-.L146:
+.L139:
 	str	r3, [r2]
 	bx	lr
-.L145:
+.L138:
 	orr	r3, r3, #253952
-	b	.L146
-.L148:
+	b	.L139
+.L141:
 	.align	2
-.L147:
+.L140:
 	.word	.LANCHOR19
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
@@ -1006,16 +978,16 @@ NandcSetMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L156
+	ldr	r3, .L149
 	ands	r1, r0, #6
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-	beq	.L150
+	beq	.L143
 	lsls	r1, r0, #29
 	movw	r1, #16641
 	str	r1, [r2, #344]
 	orr	r3, r3, #24576
-	ldr	r1, .L156+4
+	ldr	r1, .L149+4
 	bfc	r3, #15, #1
 	orr	r3, r3, #196608
 	it	mi
@@ -1025,16 +997,16 @@ NandcSetMode:
 	str	r1, [r2, #308]
 	movs	r1, #39
 	str	r1, [r2, #308]
-.L152:
+.L145:
 	str	r3, [r2]
 	movs	r0, #0
 	bx	lr
-.L150:
+.L143:
 	bfi	r3, r1, #13, #1
-	b	.L152
-.L157:
+	b	.L145
+.L150:
 	.align	2
-.L156:
+.L149:
 	.word	.LANCHOR19
 	.word	1710595
 	.size	NandcSetMode, .-NandcSetMode
@@ -1050,7 +1022,7 @@ NandcFlashCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L159
+	ldr	r3, .L152
 	movs	r2, #1
 	ldr	r1, [r3, r0, lsl #3]
 	add	r0, r3, r0, lsl #3
@@ -1060,9 +1032,9 @@ NandcFlashCs:
 	bfi	r3, r2, #0, #8
 	str	r3, [r1]
 	bx	lr
-.L160:
+.L153:
 	.align	2
-.L159:
+.L152:
 	.word	.LANCHOR6
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
@@ -1077,16 +1049,16 @@ NandcFlashDeCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L162
+	ldr	r3, .L155
 	ldr	r2, [r3, r0, lsl #3]
 	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
 	str	r3, [r2]
 	bx	lr
-.L163:
+.L156:
 	.align	2
-.L162:
+.L155:
 	.word	.LANCHOR6
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
@@ -1101,27 +1073,28 @@ HynixSetRRPara:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r3
-	ldr	r3, .L171
+	mov	r6, r3
+	ldr	r3, .L166
 	mov	r5, r0
-	mov	r6, r1
+	mov	r7, r1
 	mov	r10, r2
-	ldr	r4, .L171+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
-	bne	.L165
-	movs	r3, #20
-	add	r3, r3, r0, lsl #6
-	add	r3, r3, r7, lsl #2
-.L170:
+	bne	.L158
+	movs	r4, #20
+	add	r4, r4, r0, lsl #6
+	add	r3, r4, r6, lsl #2
+.L164:
+	ldr	r4, .L166+4
+.L165:
 	add	r4, r4, r3
-.L166:
-	ldr	r3, .L171+8
+.L159:
+	ldr	r3, .L166+8
 	mov	r0, r5
-	subs	r6, r6, #1
+	subs	r7, r7, #1
 	subs	r4, r4, #1
-	add	r6, r6, r10
+	add	r7, r7, r10
 	ldr	r8, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
 	ldrb	fp, [r3, #4]	@ zero_extendqisi2
@@ -1132,35 +1105,42 @@ HynixSetRRPara:
 	str	r3, [r0, #2056]
 	add	r3, r10, #-1
 	mov	r10, r0
-.L168:
-	cmp	r3, r6
-	bne	.L169
+.L162:
+	cmp	r3, r7
+	bne	.L163
 	movs	r3, #22
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L171+12
-	strb	r7, [r3, r5]
+	ldr	r3, .L166+12
+	strb	r6, [r3, r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L165:
+.L158:
 	cmp	r3, #7
-	bne	.L167
+	bne	.L160
+	movs	r4, #28
 	movs	r3, #160
-	movs	r2, #28
-	smlabb	r2, r3, r0, r2
-	movs	r3, #10
-	smlabb	r3, r3, r7, r2
-	b	.L170
-.L167:
-	adds	r3, r7, #2
-	add	r3, r3, r0, lsl #3
+	smlabb	r3, r3, r0, r4
+	movs	r4, #10
+	smlabb	r3, r4, r6, r3
+	b	.L164
+.L160:
+	cmp	r3, #8
+	bne	.L161
+	add	r4, r6, r6, lsl #2
+	ldr	r3, .L166+16
+	b	.L165
+.L161:
+	adds	r4, r6, #2
+	add	r3, r4, r0, lsl #3
+	ldr	r4, .L166+4
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
-	b	.L166
-.L169:
+	b	.L159
+.L163:
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
 	movs	r0, #200
 	str	r2, [r10, #2052]
@@ -1169,14 +1149,15 @@ HynixSetRRPara:
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
 	str	r2, [r10, #2048]
-	b	.L168
-.L172:
+	b	.L162
+.L167:
 	.align	2
-.L171:
+.L166:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR6
 	.word	.LANCHOR21
+	.word	.LANCHOR20+28
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -1189,35 +1170,35 @@ HynixSetRRPara:
 FlashSetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L179
+	ldr	r3, .L174
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L173
-	ldr	r5, .L179+4
+	cmp	r3, #7
+	bhi	.L168
+	ldr	r5, .L174+4
 	movs	r4, #0
 	adds	r6, r5, #4
-.L176:
-	ldr	r3, .L179+8
+.L171:
+	ldr	r3, .L174+8
 	uxtb	r0, r4
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
-	bne	.L175
+	bne	.L170
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L175:
+.L170:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L176
-.L173:
+	bne	.L171
+.L168:
 	pop	{r4, r5, r6, pc}
-.L180:
+.L175:
 	.align	2
-.L179:
+.L174:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
@@ -1233,17 +1214,17 @@ FlashSetReadRetryDefault:
 FlashWaitCmdDone:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L188
+	ldr	r2, .L183
 	lsls	r3, r0, #4
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
-	cbz	r1, .L183
+	cbz	r1, .L178
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r3, .L188+4
+	ldr	r3, .L183+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
 	ldr	r2, [r3, r6, lsl #2]
@@ -1260,15 +1241,15 @@ FlashWaitCmdDone:
 	str	r1, [r3]
 	movs	r3, #0
 	str	r3, [r4, #8]
-	cbz	r2, .L183
+	cbz	r2, .L178
 	str	r1, [r2]
 	str	r3, [r4, #12]
-.L183:
+.L178:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L189:
+.L184:
 	.align	2
-.L188:
+.L183:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
@@ -1288,6 +1269,45 @@ NandcDelayns:
 	movs	r0, #0
 	pop	{r3, pc}
 	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReadyNoDelay,"ax",%progbits
+	.align	1
+	.global	NandcWaitFlashReadyNoDelay
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcWaitFlashReadyNoDelay, %function
+NandcWaitFlashReadyNoDelay:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L191
+	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r4, .L191+4
+	ldr	r5, [r3, r0, lsl #3]
+.L188:
+	ldr	r3, [r5]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L189
+	movs	r0, #10
+	bl	udelay
+	subs	r4, r4, #1
+	bne	.L188
+	mov	r0, #-1
+.L186:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L189:
+	movs	r0, #0
+	b	.L186
+.L192:
+	.align	2
+.L191:
+	.word	.LANCHOR6
+	.word	100000
+	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
 	.global	NandcWaitFlashReady
@@ -1299,31 +1319,33 @@ NandcDelayns:
 NandcWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L196
 	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, .L196+4
+	ldr	r3, .L198
+	ldr	r4, .L198+4
 	ldr	r5, [r3, r0, lsl #3]
-.L193:
-	movs	r0, #100
+	movs	r0, #150
 	bl	udelay
+.L195:
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
-	bmi	.L194
+	bmi	.L196
+	movs	r0, #10
+	bl	udelay
 	subs	r4, r4, #1
-	bne	.L193
+	bne	.L195
 	mov	r0, #-1
-.L191:
+.L193:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, pc}
-.L194:
+.L196:
 	movs	r0, #0
-	b	.L191
-.L197:
+	b	.L193
+.L199:
 	.align	2
-.L196:
+.L198:
 	.word	.LANCHOR6
 	.word	100000
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
@@ -1338,7 +1360,7 @@ NandcWaitFlashReady:
 FlashReset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L199
+	ldr	r3, .L201
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldr	r5, [r3, r0, lsl #3]
@@ -1353,26 +1375,129 @@ FlashReset:
 	mov	r0, r4
 	pop	{r4, r5, r6, lr}
 	b	NandcFlashDeCs
-.L200:
+.L202:
 	.align	2
-.L199:
+.L201:
 	.word	.LANCHOR6
 	.size	FlashReset, .-FlashReset
-	.section	.text.FlashEraseBlock,"ax",%progbits
+	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlock
+	.global	flash_enter_slc_mode
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashEraseBlock, %function
-FlashEraseBlock:
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
+	push	{r3, r4, r5, lr}
+	mov	r5, r0
+	ldr	r3, .L205
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L203
+	bl	NandcFlashCs
+	ldr	r3, .L205+4
+	movs	r0, #100
+	ldr	r4, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r4, r4, r3, lsl #8
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	bl	udelay
+	movs	r3, #0
+	movs	r2, #1
+	str	r3, [r4, #2048]
+	movs	r0, #100
+	str	r2, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	bl	udelay
+	mov	r0, r5
+	bl	NandcWaitFlashReadyNoDelay
+	movs	r3, #218
+	mov	r0, r5
+	str	r3, [r4, #2056]
+	pop	{r3, r4, r5, lr}
+	b	NandcWaitFlashReady
+.L203:
+	pop	{r3, r4, r5, pc}
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR15
+	.word	.LANCHOR6
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_exit_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r5, r0
+	ldr	r3, .L209
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L207
+	bl	NandcFlashCs
+	ldr	r3, .L209+4
+	movs	r0, #100
+	ldr	r4, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r4, r4, r3, lsl #8
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #145
+	str	r3, [r4, #2052]
+	bl	udelay
+	movs	r3, #2
+	movs	r0, #100
+	str	r3, [r4, #2048]
+	movs	r3, #1
+	str	r3, [r4, #2048]
+	movs	r3, #0
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	bl	udelay
+	mov	r0, r5
+	bl	NandcWaitFlashReadyNoDelay
+	movs	r3, #223
+	mov	r0, r5
+	str	r3, [r4, #2056]
+	pop	{r3, r4, r5, lr}
+	b	NandcWaitFlashReady
+.L207:
+	pop	{r3, r4, r5, pc}
+.L210:
+	.align	2
+.L209:
+	.word	.LANCHOR15
+	.word	.LANCHOR6
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.FlashEraseBlock,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
 	bl	NandcWaitFlashReady
 	mov	r0, r4
 	bl	NandcFlashCs
@@ -1402,7 +1527,7 @@ FlashEraseBlock:
 FlashSetInterfaceMode:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L230
+	ldr	r3, .L240
 	mov	ip, #128
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
@@ -1413,39 +1538,39 @@ FlashSetInterfaceMode:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	and	r2, r3, #4
 	and	r3, r3, #1
-	str	r2, [sp]
+	str	r2, [sp, #4]
 	mov	r2, r5
-	str	r3, [sp, #4]
-.L212:
-	ldr	r3, .L230+4
+	str	r3, [sp]
+.L222:
+	ldr	r3, .L240+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
 	cmp	r4, #152
-	beq	.L203
+	beq	.L213
 	cmp	r4, #69
-	beq	.L203
+	beq	.L213
 	cmp	r4, #173
-	beq	.L203
+	beq	.L213
 	cmp	r4, #44
-	bne	.L204
-.L203:
-	ldr	r3, .L230+8
+	bne	.L214
+.L213:
+	ldr	r3, .L240+8
 	cmp	r0, #1
 	ldr	r1, [r5, r3]
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	bne	.L205
-	ldr	r6, [sp, #4]
-	cbz	r6, .L204
+	bne	.L215
+	ldr	r6, [sp]
+	cbz	r6, .L214
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L206
+	bne	.L216
 	str	r0, [fp, #2052]
-.L229:
+.L239:
 	str	r2, [fp, #2048]
-	b	.L210
-.L206:
+	b	.L220
+.L216:
 	cmp	r4, #44
 	ittet	eq
 	moveq	r4, #5
@@ -1454,45 +1579,45 @@ FlashSetInterfaceMode:
 	streq	r4, [fp, #2048]
 	it	ne
 	strne	r0, [fp, #2048]
-.L210:
+.L220:
 	add	r3, r3, r1
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
 	str	r2, [r3, #2048]
-.L204:
+.L214:
 	adds	r5, r5, #8
 	cmp	r5, #32
-	bne	.L212
+	bne	.L222
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L205:
-	ldr	r6, [sp]
+.L215:
+	ldr	r6, [sp, #4]
 	cmp	r6, #0
-	beq	.L204
+	beq	.L214
 	lsls	r3, r3, #8
 	cmp	r4, #173
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	bne	.L209
+	bne	.L219
 	str	lr, [fp, #2052]
 	str	r10, [fp, #2048]
-	b	.L210
-.L209:
+	b	.L220
+.L219:
 	cmp	r4, #44
-	bne	.L211
+	bne	.L221
 	str	lr, [fp, #2052]
 	str	r8, [fp, #2048]
-	b	.L210
-.L211:
+	b	.L220
+.L221:
 	str	ip, [fp, #2052]
-	b	.L229
-.L231:
+	b	.L239
+.L241:
 	.align	2
-.L230:
+.L240:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
 	.word	.LANCHOR6
@@ -1517,21 +1642,21 @@ SandiskSetRRPara:
 	str	r3, [r0, #4]
 	movs	r0, #200
 	bl	udelay
-	ldr	r3, .L238
+	ldr	r3, .L248
 	add	r4, r4, r4, lsl #2
-	ldr	r6, .L238+4
+	ldr	r6, .L248+4
 	movs	r2, #0
-	ldr	r7, .L238+8
+	ldr	r7, .L248+8
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L238+12
+	ldr	r3, .L248+12
 	ldrb	r0, [r3]	@ zero_extendqisi2
-.L233:
+.L243:
 	cmp	r2, r1
-	bcc	.L236
+	bcc	.L246
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, lr}
 	b	NandcWaitFlashReady
-.L236:
+.L246:
 	adds	r3, r2, r4
 	cmp	r0, #67
 	ite	eq
@@ -1540,14 +1665,14 @@ SandiskSetRRPara:
 	ldrsb	r3, [r3, #5]
 	adds	r2, r2, #1
 	str	r3, [r5]
-	b	.L233
-.L239:
+	b	.L243
+.L249:
 	.align	2
-.L238:
-	.word	.LANCHOR13
-	.word	.LANCHOR11
-	.word	.LANCHOR9
+.L248:
+	.word	.LANCHOR12
 	.word	.LANCHOR10
+	.word	.LANCHOR8
+	.word	.LANCHOR9
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",%progbits
 	.align	1
@@ -1564,7 +1689,7 @@ micron_auto_read_calibration_config:
 	mov	r5, r0
 	mov	r6, r1
 	bl	NandcWaitFlashReady
-	ldr	r0, .L241
+	ldr	r0, .L251
 	ldr	r4, [r0, r5, lsl #3]
 	add	r0, r0, r5, lsl #3
 	ldrb	r3, [r0, #4]	@ zero_extendqisi2
@@ -1581,9 +1706,9 @@ micron_auto_read_calibration_config:
 	str	r3, [r4, #2048]
 	str	r3, [r4, #2048]
 	pop	{r4, r5, r6, pc}
-.L242:
+.L252:
 	.align	2
-.L241:
+.L251:
 	.word	.LANCHOR6
 	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
@@ -1599,19 +1724,19 @@ FlashEraseSLc2KBlocks:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r7, r1
-	ldr	r8, .L253+12
+	ldr	r8, .L263+12
 	sub	sp, sp, #20
 	mov	r5, r0
 	movs	r6, #0
-	ldr	r10, .L253+16
-.L244:
+	ldr	r10, .L263+16
+.L254:
 	cmp	r6, r7
-	bne	.L249
+	bne	.L259
 	movs	r0, #0
 	add	sp, sp, #20
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L249:
+.L259:
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -1623,17 +1748,17 @@ FlashEraseSLc2KBlocks:
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L245
+	bhi	.L255
 	mov	r3, #-1
 	str	r3, [r5]
-.L246:
+.L256:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-	b	.L244
-.L245:
+	b	.L254
+.L255:
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L253
+	ldr	r2, .L263
 	mov	r0, r4
 	strb	r4, [r2, r3]
 	bl	NandcWaitFlashReady
@@ -1648,7 +1773,7 @@ FlashEraseSLc2KBlocks:
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-	ldr	r3, .L253+4
+	ldr	r3, .L263+4
 	sbfx	r0, r0, #0, #1
 	str	r0, [r5]
 	movs	r2, #0
@@ -1668,17 +1793,17 @@ FlashEraseSLc2KBlocks:
 	strmi	r3, [r5]
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L248
+	bne	.L258
 	ldr	r1, [sp, #8]
-	ldr	r0, .L253+8
+	ldr	r0, .L263+8
 	bl	printf
-.L248:
+.L258:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	b	.L246
-.L254:
+	b	.L256
+.L264:
 	.align	2
-.L253:
+.L263:
 	.word	.LANCHOR23
 	.word	.LANCHOR3
 	.word	.LC1
@@ -1696,41 +1821,41 @@ FlashEraseSLc2KBlocks:
 FlashEraseBlocks:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L286
+	ldr	r3, .L296
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r0
 	sub	sp, sp, #24
 	mov	fp, r1
 	mov	r7, r2
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	cbnz	r4, .L256
-	ldr	r10, .L286+8
-.L257:
+	cbnz	r4, .L266
+	ldr	r10, .L296+8
+.L267:
 	cmp	r4, r7
-	bcc	.L266
-	ldr	r5, .L286+4
+	bcc	.L276
+	ldr	r5, .L296+4
 	movs	r4, #0
-	ldr	r6, .L286+8
-.L267:
-	ldr	r3, .L286+12
+	ldr	r6, .L296+8
+.L277:
+	ldr	r3, .L296+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L269
-	ldr	r3, .L286+16
+	bcc	.L279
+	ldr	r3, .L296+16
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L270
-.L271:
+	bne	.L280
+.L281:
 	movs	r0, #0
-	b	.L255
-.L256:
+	b	.L265
+.L266:
 	mov	r1, r2
 	bl	FlashEraseSLc2KBlocks
-.L255:
+.L265:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L266:
+.L276:
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -1743,29 +1868,29 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L286+12
+	ldr	r3, .L296+12
 	mov	r6, r0
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L259
+	bhi	.L269
 	mov	r3, #-1
 	str	r3, [r8, r5]
-.L260:
+.L270:
 	adds	r4, r4, #1
-	b	.L257
-.L259:
-	ldr	r3, .L286+20
+	b	.L267
+.L269:
+	ldr	r3, .L296+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	add	r3, r10, r0, lsl #4
 	it	eq
 	moveq	r6, #0
 	ldr	r3, [r3, #8]
-	cbz	r3, .L262
+	cbz	r3, .L272
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L262:
+.L272:
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
@@ -1775,25 +1900,25 @@ FlashEraseBlocks:
 	str	r0, [r3, #12]
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
-	cbz	r6, .L263
+	cbz	r6, .L273
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
-.L263:
-	ldr	r3, .L286+24
+.L273:
+	ldr	r3, .L296+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
 	mov	r0, r5
 	strb	r5, [r10, r2]
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r5
-	bne	.L264
-	ldr	r3, .L286+4
+	bne	.L274
+	ldr	r3, .L296+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L264
+	cbz	r3, .L274
 	bl	flash_enter_slc_mode
-.L265:
-	ldr	r3, .L286+28
+.L275:
+	ldr	r3, .L296+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
 	add	r4, r4, r6
@@ -1809,43 +1934,43 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L260
-.L264:
+	b	.L270
+.L274:
 	bl	flash_exit_slc_mode
-	b	.L265
-.L269:
+	b	.L275
+.L279:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L268
+	bne	.L278
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbz	r3, .L268
+	cbz	r3, .L278
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L268:
+.L278:
 	adds	r4, r4, #1
-	b	.L267
-.L270:
-	ldr	r3, .L286+32
+	b	.L277
+.L280:
+	ldr	r3, .L296+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #69
-	bne	.L271
+	bne	.L281
 	movs	r3, #0
 	movs	r2, #36
 	mov	r1, r3
-.L272:
+.L282:
 	cmp	r3, r7
-	beq	.L271
+	beq	.L281
 	mul	r0, r2, r3
 	adds	r3, r3, #1
 	str	r1, [r8, r0]
-	b	.L272
-.L287:
+	b	.L282
+.L297:
 	.align	2
-.L286:
+.L296:
 	.word	.LANCHOR1
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR23
 	.word	.LANCHOR25
 	.word	.LANCHOR28
@@ -1867,7 +1992,7 @@ FlashReadDpCmd:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r5, r2
-	ldr	r3, .L292
+	ldr	r3, .L302
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
@@ -1876,7 +2001,7 @@ FlashReadDpCmd:
 	ldr	r10, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L292+4
+	ldr	r3, .L302+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
@@ -1885,7 +2010,7 @@ FlashReadDpCmd:
 	cmp	r2, #1
 	lsr	r2, r6, #16
 	str	ip, [r4, #2056]
-	bne	.L289
+	bne	.L299
 	mov	r10, #0
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
@@ -1897,7 +2022,7 @@ FlashReadDpCmd:
 	str	r10, [r4, #2056]
 	str	r10, [r4, #2052]
 	str	r10, [r4, #2052]
-.L291:
+.L301:
 	lsrs	r3, r5, #8
 	lsrs	r5, r5, #16
 	str	r8, [r4, #2052]
@@ -1909,15 +2034,15 @@ FlashReadDpCmd:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FlashSetRandomizer
-.L289:
+.L299:
 	str	lr, [r4, #2052]
 	str	r1, [r4, #2052]
 	str	r2, [r4, #2052]
 	str	r3, [r4, #2056]
-	b	.L291
-.L293:
+	b	.L301
+.L303:
 	.align	2
-.L292:
+.L302:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
@@ -1936,38 +2061,38 @@ FlashDeInit:
 	movs	r0, #0
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldr	r3, .L303
-	ldr	r2, [r3]
-	ldr	r3, .L303+4
-	cmp	r2, r3
-	bne	.L295
+	ldr	r3, .L314
+	ldr	r0, [r3]
+	cbz	r0, .L305
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L295:
-	ldr	r4, .L303+8
+.L306:
+	ldr	r4, .L314+4
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L296
-	ldr	r3, .L303+12
+	cbz	r3, .L307
+	ldr	r3, .L314+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L296
+	bpl	.L307
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
 	strb	r3, [r4]
-.L296:
-	ldr	r3, .L303+16
+.L307:
+	ldr	r3, .L314+12
 	movs	r0, #0
 	ldr	r3, [r3]
 	str	r0, [r3, #336]
 	pop	{r4, pc}
-.L304:
+.L305:
+	bl	flash_exit_slc_mode
+	b	.L306
+.L315:
 	.align	2
-.L303:
+.L314:
 	.word	.LANCHOR29
-	.word	1446522928
 	.word	.LANCHOR30
 	.word	.LANCHOR24
 	.word	.LANCHOR6
@@ -1984,13 +2109,13 @@ NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L306
+	ldr	r3, .L317
 	ldr	r3, [r3, r0, lsl #3]
 	str	r1, [r3, #336]
 	bx	lr
-.L307:
+.L318:
 	.align	2
-.L306:
+.L317:
 	.word	.LANCHOR6
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
@@ -2005,23 +2130,23 @@ NandcTimeCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L313
+	ldr	r3, .L324
 	cmp	r0, #35
 	ldr	r3, [r3]
-	bhi	.L309
+	bhi	.L320
 	movw	r2, #4193
-.L312:
+.L323:
 	str	r2, [r3, #4]
 	bx	lr
-.L309:
+.L320:
 	cmp	r0, #99
 	ite	hi
 	movwhi	r2, #8322
 	movwls	r2, #4225
-	b	.L312
-.L314:
+	b	.L323
+.L325:
 	.align	2
-.L313:
+.L324:
 	.word	.LANCHOR19
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
@@ -2036,12 +2161,12 @@ FlashTimingCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L316
+	ldr	r3, .L327
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L317:
+.L328:
 	.align	2
-.L316:
+.L327:
 	.word	.LANCHOR31
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
@@ -2055,7 +2180,7 @@ FlashTimingCfg:
 NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L326
+	ldr	r3, .L337
 	movs	r1, #0
 	push	{r4, lr}
 	movs	r4, #16
@@ -2063,32 +2188,32 @@ NandcBchSel:
 	ldr	r2, [r3]
 	mov	r3, #1
 	str	r3, [r2, #8]
-	ldr	r3, .L326+4
+	ldr	r3, .L337+4
 	str	r0, [r3]
 	mov	r3, r1
 	bfi	r3, r4, #8, #8
 	bfi	r3, r1, #18, #1
-	bne	.L319
-.L322:
+	bne	.L330
+.L333:
 	bfc	r3, #4, #1
-.L320:
+.L331:
 	orr	r3, r3, #1
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L319:
+.L330:
 	cmp	r0, #24
-	bne	.L321
+	bne	.L332
 	orr	r3, r3, #16
-	b	.L320
-.L321:
+	b	.L331
+.L332:
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L320
-	b	.L322
-.L327:
+	bne	.L331
+	b	.L333
+.L338:
 	.align	2
-.L326:
+.L337:
 	.word	.LANCHOR19
 	.word	.LANCHOR32
 	.size	NandcBchSel, .-NandcBchSel
@@ -2104,12 +2229,12 @@ FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L329
+	ldr	r3, .L340
 	strb	r0, [r3]
 	b	NandcBchSel
-.L330:
+.L341:
 	.align	2
-.L329:
+.L340:
 	.word	.LANCHOR33
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
@@ -2211,7 +2336,7 @@ NandcSendDumpDataStart:
 	@ link register save eliminated.
 	ldr	r2, [r0, #16]
 	sub	sp, sp, #8
-	ldr	r3, .L338
+	ldr	r3, .L349
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2224,9 +2349,9 @@ NandcSendDumpDataStart:
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
-.L339:
+.L350:
 	.align	2
-.L338:
+.L349:
 	.word	538969130
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
@@ -2242,12 +2367,12 @@ NandcSendDumpDataDone:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	sub	sp, sp, #8
-.L341:
+.L352:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L341
+	bpl	.L352
 	add	sp, sp, #8
 	@ sp needed
 	bx	lr
@@ -2270,12 +2395,12 @@ NandcXferStart:
 	str	r2, [sp, #4]
 	ldr	fp, [sp, #56]
 	cmp	r1, #0
-	bne	.L358
+	bne	.L369
 	adds	r5, fp, #0
 	it	ne
 	movne	r5, #1
-.L345:
-	ldr	r1, .L363
+.L356:
+	ldr	r1, .L374
 	movs	r4, #0
 	ldr	r6, [r1, r0, lsl #3]
 	add	r1, r1, r0, lsl #3
@@ -2293,29 +2418,29 @@ NandcXferStart:
 	orr	r4, r4, #536870912
 	orr	r4, r4, #1024
 	bfi	r4, r3, #4, #1
-	ldr	r3, .L363+4
+	ldr	r3, .L374+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L346
+	bls	.L357
 	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
 	cmp	r5, #0
-	beq	.L347
-	ldr	r5, .L363+8
+	beq	.L358
+	ldr	r5, .L374+8
 	cmp	r7, #0
-	bne	.L348
-.L356:
+	bne	.L359
+.L367:
 	ldr	r2, [sp, #4]
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
 	cmp	fp, #0
-	beq	.L349
+	beq	.L360
 	mov	r0, fp
-.L350:
+.L361:
 	ldr	r3, [r5, #4]
 	add	r1, r0, #63
 	ubfx	r10, r4, #22, #5
@@ -2366,10 +2491,10 @@ NandcXferStart:
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L347:
+.L358:
 	ldr	r3, [sp, #20]
 	str	r3, [r6, #16]
-.L346:
+.L357:
 	str	r8, [r6, #12]
 	str	r4, [r6, #8]
 	orr	r4, r4, #4
@@ -2377,11 +2502,11 @@ NandcXferStart:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L358:
+.L369:
 	movs	r5, #1
-	b	.L345
-.L348:
-	ldr	r3, .L363+12
+	b	.L356
+.L359:
+	ldr	r3, .L374+12
 	movs	r1, #0
 	ldr	lr, [r5, #4]
 	mov	r0, r1
@@ -2395,34 +2520,34 @@ NandcXferStart:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
 	ldr	r3, [sp, #60]
-.L352:
+.L363:
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	bcs	.L356
+	bcs	.L367
 	ldr	r2, [sp, #60]
 	bic	r10, r1, #3
-	cbz	r2, .L353
+	cbz	r2, .L364
 	ldrh	ip, [r3]
 	adds	r3, r3, #4
 	ldrh	r2, [r3, #-2]
 	orr	ip, ip, r2, lsl #16
 	str	ip, [lr, r10]
-.L354:
+.L365:
 	ldr	r2, [sp, #8]
 	adds	r0, r0, #1
 	add	r1, r1, r2
-	b	.L352
-.L353:
+	b	.L363
+.L364:
 	mov	r2, #-1
 	str	r2, [lr, r10]
-	b	.L354
-.L349:
-	ldr	r3, .L363+8
+	b	.L365
+.L360:
+	ldr	r3, .L374+8
 	ldr	r0, [r3]
-	b	.L350
-.L364:
+	b	.L361
+.L375:
 	.align	2
-.L363:
+.L374:
 	.word	.LANCHOR6
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -2439,75 +2564,75 @@ NandcXferStart:
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L393
+	ldr	r3, .L404
 	push	{r0, r1, r4, lr}
 	ldr	r1, [r3, r0, lsl #3]
-	ldr	r3, .L393+4
+	ldr	r3, .L404+4
 	ldr	r0, [r3]
 	cmp	r0, #3
-	bls	.L386
+	bls	.L397
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L386
+	bpl	.L397
 	ldr	r3, [r1, #16]
 	tst	r3, #2
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	beq	.L373
-.L369:
+	beq	.L384
+.L380:
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L370
+	bge	.L381
 	cmp	r0, #5
-	bls	.L369
+	bls	.L380
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L369
+	bpl	.L380
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L369
-.L370:
-	ldr	r3, .L393+8
+	bpl	.L380
+.L381:
+	ldr	r3, .L404+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.L365:
+.L376:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, pc}
-.L374:
+.L385:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L373:
+.L384:
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L374
-	ldr	r4, .L393+12
+	bpl	.L385
+	ldr	r4, .L404+12
 	ldr	r2, [r4]
-	cbz	r2, .L375
+	cbz	r2, .L386
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.L375:
+.L386:
 	ldr	r3, [r4]
 	cmp	r3, #0
-	beq	.L370
+	beq	.L381
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
-	b	.L370
-.L386:
+	b	.L381
+.L397:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L386
-	b	.L365
-.L394:
+	bpl	.L397
+	b	.L376
+.L405:
 	.align	2
-.L393:
+.L404:
 	.word	.LANCHOR6
 	.word	.LANCHOR34
 	.word	.LANCHOR35
@@ -2527,17 +2652,17 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r1, #0
 	movs	r2, #1
-.L396:
+.L407:
 	cmp	r2, r0
 	uxth	r3, r1
 	add	r1, r1, #1
-	bls	.L397
+	bls	.L408
 	subs	r0, r3, #1
 	uxth	r0, r0
 	bx	lr
-.L397:
+.L408:
 	lsls	r2, r2, #1
-	b	.L396
+	b	.L407
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -2565,31 +2690,31 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L400
+	ldr	r3, .L411
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L400+4
+	ldr	r2, .L411+4
 	str	r0, [r3]
-	ldr	r3, .L400+8
+	ldr	r3, .L411+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L400+12
+	ldr	r2, .L411+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L400+16
+	ldr	r2, .L411+16
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L400+20
+	ldr	r2, .L411+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L400+24
+	ldr	r2, .L411+24
 	str	r3, [r2]
 	bx	lr
-.L401:
+.L412:
 	.align	2
-.L400:
+.L411:
 	.word	.LANCHOR37
 	.word	.LANCHOR39
 	.word	.LANCHOR38
@@ -2614,122 +2739,118 @@ FtlConstantsInit:
 	mov	r10, r0
 	ldrh	r7, [r0, #8]
 	sub	sp, sp, #24
-	ldr	r3, .L429
-	ldr	r1, .L429+4
-	ldrh	r6, [r10, #14]
-	ldr	r2, .L429+8
+	ldr	r3, .L440
+	ldrh	r2, [r0, #10]
+	ldrh	r6, [r0, #14]
 	strh	r7, [r3]	@ movhi
-	ldrh	r3, [r0, #10]
-	ldrh	r0, [r0, #12]
-	strh	r6, [r1]	@ movhi
-	str	r1, [sp, #20]
-	ldr	r1, .L429+12
-	ldr	r4, .L429+16
-	strh	r0, [r2]	@ movhi
-	movs	r2, #0
-	strh	r3, [r4]	@ movhi
+	ldrh	r3, [r0, #12]
+	ldr	r0, .L440+4
+	ldr	r1, .L440+8
+	ldr	r4, .L440+12
+	strh	r6, [r0]	@ movhi
+	str	r0, [sp, #20]
+	ldr	r0, .L440+16
+	strh	r3, [r1]	@ movhi
+	movs	r1, #0
+	strh	r2, [r4]	@ movhi
 	str	r4, [sp, #8]
-.L403:
-	strb	r2, [r2, r1]
-	adds	r2, r2, #1
-	cmp	r2, #32
-	bne	.L403
-	ldrh	r1, [r10, #14]
-	ldrh	r2, [r10, #20]
-	cmp	r2, r1, lsr #8
-	bcs	.L404
-	uxtb	r8, r0
-	lsl	r2, r8, #1
-	uxtb	r2, r2
-	str	r2, [sp, #4]
-	subs	r2, r3, #1
-	muls	r2, r0, r2
-	str	r2, [sp, #12]
-	movs	r2, #0
-.L405:
-	cmp	r2, r0
-	bcs	.L407
+.L414:
+	strb	r1, [r1, r0]
+	adds	r1, r1, #1
+	cmp	r1, #32
+	bne	.L414
+	ldrh	r0, [r10, #14]
+	ldrh	r1, [r10, #20]
+	cmp	r1, r0, lsr #8
+	bcs	.L415
+	uxtb	r8, r3
+	lsl	r1, r8, #1
+	uxtb	r1, r1
+	str	r1, [sp, #4]
+	subs	r1, r2, #1
+	muls	r1, r3, r1
+	str	r1, [sp, #12]
+	movs	r1, #0
+.L416:
+	cmp	r1, r3
+	bcs	.L418
 	ldr	r4, [sp, #12]
-	sub	fp, r2, r0
-	uxtb	r1, r2
-	adds	r5, r2, r4
-	ldr	r4, .L429+12
+	sub	fp, r1, r3
+	uxtb	r0, r1
+	adds	r5, r1, r4
+	ldr	r4, .L440+16
 	add	r4, r4, r5
 	movs	r5, #0
 	mov	lr, r4
-	ldr	r4, .L429+12
+	ldr	r4, .L440+16
 	mov	ip, r5
 	add	fp, fp, r4
-	b	.L408
-.L406:
-	add	r4, r8, r1
-	strb	r1, [fp, r5]
+	b	.L419
+.L417:
+	add	r4, r8, r0
+	strb	r0, [fp, r5]
 	str	r4, [sp, #16]
 	add	ip, ip, #1
 	ldrb	r4, [sp, #16]	@ zero_extendqisi2
 	strb	r4, [lr, r5]
 	ldr	r4, [sp, #4]
-	add	r1, r1, r4
-	uxtb	r1, r1
-.L408:
-	cmp	ip, r3
-	add	r5, r5, r0
-	bcc	.L406
-	adds	r2, r2, #1
-	b	.L405
-.L407:
-	ldr	r2, [sp, #8]
-	lsls	r3, r3, #1
-	lsrs	r6, r6, #1
-	strh	r3, [r2]	@ movhi
-	ldr	r3, .L429+4
-	strh	r6, [r3]	@ movhi
-.L404:
-	ldr	r3, .L429+20
-	movs	r2, #5
-	cmp	r7, #1
-	mov	r1, #0
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L429+24
+	add	r0, r0, r4
+	uxtb	r0, r0
+.L419:
+	cmp	ip, r2
+	add	r5, r5, r3
+	bcc	.L417
+	adds	r1, r1, #1
+	b	.L416
+.L418:
+	ldr	r1, [sp, #8]
+	lsls	r2, r2, #1
+	lsrs	r6, r6, #1
+	strh	r2, [r1]	@ movhi
+	ldr	r2, .L440+4
+	strh	r6, [r2]	@ movhi
+.L415:
+	ldr	r1, .L440+20
+	movs	r2, #5
+	cmp	r7, #1
+	mov	r0, #0
+	strh	r2, [r1]	@ movhi
+	ldr	r2, .L440+24
 	it	eq
-	strheq	r7, [r3]	@ movhi
-	ldr	r3, .L429+28
-	strh	r1, [r2]	@ movhi
-	mov	r1, #4352
-	strh	r1, [r3]	@ movhi
-	ldr	r1, .L429+32
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	str	r1, [sp, #4]
-	cbz	r1, .L410
-	mov	r1, #384
-	strh	r1, [r3]	@ movhi
-.L410:
-	ldr	r3, [sp, #8]
+	strheq	r7, [r1]	@ movhi
+	ldr	r1, .L440+28
+	strh	r0, [r2]	@ movhi
+	mov	r0, #4352
+	strh	r0, [r1]	@ movhi
+	ldr	r0, .L440+32
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	str	r0, [sp, #4]
+	cbz	r0, .L421
+	mov	r0, #384
+	strh	r0, [r1]	@ movhi
+.L421:
 	str	r2, [sp, #16]
-	ldr	fp, .L429+120
-	ldrh	r5, [r3]
-	ldr	r3, .L429+36
-	ldr	r8, .L429+124
-	smulbb	r5, r5, r0
-	uxth	r5, r5
-	strh	r5, [r3]	@ movhi
-	ldr	r3, [sp, #20]
-	ldrh	r4, [r3]
-	ldr	r3, .L429+40
-	smulbb	r0, r0, r4
-	uxth	r0, r0
-	strh	r0, [r3]	@ movhi
-	bl	Ftl_log2
-	ldr	r3, .L429+44
+	ldr	r2, [sp, #8]
+	ldr	r1, .L440+36
 	ldrh	r6, [r10, #16]
-	ldrh	r1, [r10, #18]
-	strh	r0, [r3]	@ movhi
-	ldr	r3, .L429+48
-	smulbb	r0, r5, r6
+	ldrh	r5, [r2]
+	ldr	r2, [sp, #20]
+	ldr	fp, .L440+116
+	ldr	r8, .L440+120
+	smulbb	r5, r5, r3
+	ldrh	r4, [r2]
 	strh	r6, [fp]	@ movhi
+	uxth	r5, r5
+	smulbb	r3, r3, r4
+	strh	r5, [r1]	@ movhi
+	smulbb	r0, r5, r6
+	ldr	r1, .L440+40
+	strh	r3, [r1]	@ movhi
+	ldrh	r1, [r10, #18]
+	ldr	r3, .L440+44
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	ldr	r3, .L429+52
+	ldr	r3, .L440+48
 	strh	r0, [r3]	@ movhi
 	ldrh	r3, [r10, #20]
 	mov	r0, r3
@@ -2738,9 +2859,9 @@ FtlConstantsInit:
 	bl	Ftl_log2
 	ldr	r3, [sp, #8]
 	mov	r7, r0
-	ldr	ip, .L429+128
+	ldr	ip, .L440+124
 	cmp	r4, #1024
-	ldr	lr, .L429+132
+	ldr	lr, .L440+128
 	ldr	r2, [sp, #16]
 	strh	r0, [ip]	@ movhi
 	lsl	r0, r3, #9
@@ -2748,15 +2869,15 @@ FtlConstantsInit:
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
 	lsr	r0, r0, #8
-	ldr	lr, .L429+136
+	ldr	lr, .L440+132
 	mul	r1, r3, r1
 	strh	r0, [lr]	@ movhi
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-	ldr	r0, .L429+56
+	ldr	r0, .L440+52
 	strh	lr, [r0]	@ movhi
 	mul	lr, r4, r5
-	ldr	r0, .L429+60
+	ldr	r0, .L440+56
 	str	lr, [r0]
 	itt	hi
 	uxtbhi	r0, r4
@@ -2766,16 +2887,16 @@ FtlConstantsInit:
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L429+64
+	ldr	r2, .L440+60
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	ldr	r6, .L429+28
+	ldr	r6, .L440+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L429+68
+	ldr	r6, .L440+64
 	cmp	r0, #4
 	itt	ls
 	movls	r2, #4
@@ -2783,22 +2904,22 @@ FtlConstantsInit:
 	ldr	r2, [sp, #4]
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	cbz	r2, .L414
+	cbz	r2, .L425
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L414:
+.L425:
 	ldrh	r3, [r3]
 	lsls	r4, r4, #6
-	ldr	r2, .L429+72
+	ldr	r2, .L440+68
 	mov	r1, r5
 	ldrh	r0, [r6]
 	asrs	r3, r3, r7
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	ldr	r7, .L429+76
+	ldr	r7, .L440+72
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L429+80
+	ldr	r3, .L440+76
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
 	mul	r3, r4, r5
@@ -2806,9 +2927,9 @@ FtlConstantsInit:
 	str	r3, [r7]
 	bl	__aeabi_uidiv
 	uxtah	r0, r4, r0
-	ldr	r4, .L429+84
+	ldr	r4, .L440+80
 	cmp	r5, #1
-	ldr	r5, .L429+88
+	ldr	r5, .L440+84
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
@@ -2816,10 +2937,10 @@ FtlConstantsInit:
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4]
 	movs	r0, #24
-	ldr	r3, .L429+92
+	ldr	r3, .L440+88
 	ldrb	r5, [r5]	@ zero_extendqisi2
 	str	r2, [r3]
-	ldr	r3, .L429+96
+	ldr	r3, .L440+92
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -2827,14 +2948,14 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L429+100
+	ldr	r2, .L440+96
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L429+104
+	ldr	r2, .L440+100
 	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L429+108
+	ldr	r2, .L440+104
 	str	r0, [r2]
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
@@ -2842,17 +2963,17 @@ FtlConstantsInit:
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	cbz	r5, .L417
+	cbz	r5, .L428
 	adds	r2, r2, #5
 	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
-.L428:
+.L439:
 	str	r2, [r7]
-.L418:
-	ldr	r1, .L429+112
+.L429:
+	ldr	r1, .L440+108
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L429+116
+	ldr	r2, .L440+112
 	ldrh	r0, [r2]
 	lsrs	r2, r0, #3
 	add	r2, r2, r0, lsl #1
@@ -2867,49 +2988,48 @@ FtlConstantsInit:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L417:
+.L428:
 	cmp	r4, #7
-	bhi	.L418
+	bhi	.L429
 	movs	r2, #8
-	b	.L428
-.L430:
+	b	.L439
+.L441:
 	.align	2
-.L429:
+.L440:
 	.word	.LANCHOR44
 	.word	.LANCHOR41
 	.word	.LANCHOR46
-	.word	.LANCHOR47
 	.word	.LANCHOR45
+	.word	.LANCHOR47
 	.word	.LANCHOR48
 	.word	.LANCHOR49
 	.word	.LANCHOR50
 	.word	.LANCHOR1
 	.word	.LANCHOR38
 	.word	.LANCHOR51
-	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR54
-	.word	.LANCHOR55
-	.word	.LANCHOR60
+	.word	.LANCHOR59
 	.word	.LANCHOR43
+	.word	.LANCHOR60
 	.word	.LANCHOR61
 	.word	.LANCHOR62
-	.word	.LANCHOR63
-	.word	.LANCHOR65
 	.word	.LANCHOR64
+	.word	.LANCHOR63
 	.word	.LANCHOR37
-	.word	.LANCHOR8
-	.word	.LANCHOR66
+	.word	.LANCHOR15
+	.word	.LANCHOR65
 	.word	.LANCHOR42
+	.word	.LANCHOR66
 	.word	.LANCHOR67
 	.word	.LANCHOR68
 	.word	.LANCHOR69
-	.word	.LANCHOR70
 	.word	.LANCHOR40
-	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
 	.word	.LANCHOR58
-	.word	.LANCHOR59
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -2923,32 +3043,32 @@ IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L438
+	ldr	r3, .L449
 	ldrh	r3, [r3]
-	cbz	r3, .L437
-	ldr	r3, .L438+4
-	ldr	r2, .L438+8
+	cbz	r3, .L448
+	ldr	r3, .L449+4
+	ldr	r2, .L449+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L433:
+.L444:
 	cmp	r3, r2
-	bne	.L434
-.L437:
+	bne	.L445
+.L448:
 	movs	r0, #0
 	bx	lr
-.L434:
+.L445:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L433
+	bne	.L444
 	movs	r0, #1
 	bx	lr
-.L439:
+.L450:
 	.align	2
-.L438:
+.L449:
+	.word	.LANCHOR70
 	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -2962,13 +3082,13 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L441
+	ldr	r3, .L452
 	ldr	r0, [r3]
 	bx	lr
-.L442:
+.L453:
 	.align	2
-.L441:
-	.word	.LANCHOR69
+.L452:
+	.word	.LANCHOR68
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
@@ -2982,13 +3102,13 @@ FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L444
+	ldr	r3, .L455
 	ldr	r0, [r3]
 	bx	lr
-.L445:
+.L456:
 	.align	2
-.L444:
-	.word	.LANCHOR69
+.L455:
+	.word	.LANCHOR68
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
@@ -3002,13 +3122,13 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L447
+	ldr	r3, .L458
 	ldr	r0, [r3]
 	bx	lr
-.L448:
+.L459:
 	.align	2
-.L447:
-	.word	.LANCHOR69
+.L458:
+	.word	.LANCHOR68
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
@@ -3022,13 +3142,13 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L450
+	ldr	r3, .L461
 	ldr	r0, [r3]
 	bx	lr
-.L451:
+.L462:
 	.align	2
-.L450:
-	.word	.LANCHOR73
+.L461:
+	.word	.LANCHOR72
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -3042,16 +3162,16 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L453
-	ldr	r3, .L453+4
+	ldr	r2, .L464
+	ldr	r3, .L464+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L454:
+.L465:
 	.align	2
-.L453:
-	.word	.LANCHOR74
+.L464:
+	.word	.LANCHOR73
 	.word	.LANCHOR38
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
@@ -3066,15 +3186,15 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L456
-	ldr	r3, .L456+4
+	ldr	r2, .L467
+	ldr	r3, .L467+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L457:
+.L468:
 	.align	2
-.L456:
+.L467:
 	.word	.LANCHOR38
 	.word	.LANCHOR41
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -3089,14 +3209,14 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L459
+	ldr	r3, .L470
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
 	mov	r1, r4
-	ldr	r4, .L459+4
+	ldr	r4, .L470+4
 	uxth	r6, r0
 	mov	r0, r5
 	bl	__aeabi_uidivmod
@@ -3113,7 +3233,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L459+8
+	ldr	r0, .L470+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
@@ -3122,11 +3242,11 @@ FtlBbmMapBadBlock:
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L460:
+.L471:
 	.align	2
-.L459:
+.L470:
 	.word	.LANCHOR51
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LC2
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
@@ -3140,7 +3260,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L462
+	ldr	r3, .L473
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
@@ -3150,7 +3270,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L462+4
+	ldr	r3, .L473+4
 	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
@@ -3160,11 +3280,11 @@ FtlBbmIsBadBlock:
 	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L463:
+.L474:
 	.align	2
-.L462:
+.L473:
 	.word	.LANCHOR51
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -3193,12 +3313,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L466
+	ldr	r3, .L477
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L466+4
+	ldr	r3, .L477+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -3209,9 +3329,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L467:
+.L478:
 	.align	2
-.L466:
+.L477:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	V2P_block, .-V2P_block
@@ -3226,11 +3346,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L469
+	ldr	r3, .L480
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L469+4
+	ldr	r3, .L480+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -3240,9 +3360,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L470:
+.L481:
 	.align	2
-.L469:
+.L480:
 	.word	.LANCHOR46
 	.word	.LANCHOR51
 	.size	P2V_plane, .-P2V_plane
@@ -3258,18 +3378,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L472
+	ldr	r3, .L483
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L472+4
+	ldr	r3, .L483+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L473:
+.L484:
 	.align	2
-.L472:
+.L483:
 	.word	.LANCHOR51
 	.word	.LANCHOR46
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -3286,14 +3406,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L475
+	bls	.L486
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L475:
+.L486:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -3313,15 +3433,15 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L478
+	ldr	r3, .L489
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L479:
+.L490:
 	.align	2
-.L478:
-	.word	.LANCHOR76
+.L489:
+	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -3335,16 +3455,16 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L481
+	ldr	r3, .L492
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L482:
+.L493:
 	.align	2
-.L481:
-	.word	.LANCHOR76
+.L492:
+	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -3363,17 +3483,17 @@ FtlFreeSysBlkQueueIn:
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
 	cmp	r3, r2
-	bhi	.L483
-	ldr	r4, .L492
+	bhi	.L494
+	ldr	r4, .L503
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L483
-	cbz	r1, .L485
-	ldr	r3, .L492+4
+	beq	.L494
+	cbz	r1, .L496
+	ldr	r3, .L503+4
 	ldr	r3, [r3]
-	cbnz	r3, .L485
+	cbnz	r3, .L496
 	bl	P2V_block_in_plane
-	ldr	r3, .L492+8
+	ldr	r3, .L503+8
 	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
@@ -3381,16 +3501,16 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L492+12
+	ldr	r3, .L503+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L492+16
+	ldr	r2, .L503+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L485:
+.L496:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
@@ -3400,16 +3520,16 @@ FtlFreeSysBlkQueueIn:
 	ubfx	r3, r3, #0, #10
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
-.L483:
+.L494:
 	pop	{r4, r5, r6, pc}
-.L493:
+.L504:
 	.align	2
-.L492:
+.L503:
+	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
 	.word	.LANCHOR78
 	.word	.LANCHOR79
-	.word	.LANCHOR80
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -3422,28 +3542,28 @@ FtlFreeSysBlkQueueIn:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L503
+	ldr	r3, .L514
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L494
-	ldr	r2, .L503+4
+	cbz	r2, .L505
+	ldr	r2, .L514+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L496:
+.L507:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L497
-	cbz	r5, .L494
+	bgt	.L508
+	cbz	r5, .L505
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L494:
+.L505:
 	pop	{r4, r5, r6, pc}
-.L497:
+.L508:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -3453,12 +3573,12 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L496
-.L504:
+	b	.L507
+.L515:
 	.align	2
-.L503:
-	.word	.LANCHOR76
-	.word	.LANCHOR81
+.L514:
+	.word	.LANCHOR75
+	.word	.LANCHOR80
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -3472,12 +3592,12 @@ FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r4, .L515
+	ldr	r4, .L526
 	mov	r6, r4
-.L506:
+.L517:
 	ldrh	r1, [r4, #6]
 	cmp	r1, #0
-	beq	.L507
+	beq	.L518
 	ldrh	r3, [r4, #2]
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
@@ -3486,67 +3606,67 @@ FtlFreeSysBlkQueueOut:
 	ubfx	r3, r3, #0, #10
 	ldrh	r5, [r4, r2, lsl #1]
 	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, .L515+4
+	ldr	r3, .L526+4
 	ldr	r10, [r3]
 	cmp	r10, #0
-	bne	.L508
-	ldr	r8, .L515+28
+	bne	.L519
+	ldr	r8, .L526+28
 	mov	r0, r5
 	bl	P2V_block_in_plane
 	mov	r7, r0
 	lsls	r3, r5, #10
 	ldr	r0, [r8]
 	str	r3, [r0, #4]
-	ldr	r3, .L515+8
+	ldr	r3, .L526+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L509
+	cbz	r3, .L520
 	movs	r2, #1
 	mov	r1, r10
 	bl	FlashEraseBlocks
-.L509:
+.L520:
 	movs	r2, #1
 	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L515+12
+	ldr	r3, .L526+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	ldr	r2, .L515+16
+	ldr	r2, .L526+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L508:
+.L519:
 	subs	r3, r5, #1
 	movw	r2, #65533
 	uxth	r3, r3
 	cmp	r3, r2
-	bls	.L511
+	bls	.L522
 	ldrh	r2, [r6, #6]
 	mov	r1, r5
-	ldr	r0, .L515+20
+	ldr	r0, .L526+20
 	bl	printf
-	b	.L506
-.L507:
-	ldr	r0, .L515+24
+	b	.L517
+.L518:
+	ldr	r0, .L526+24
 	bl	printf
-.L510:
-	b	.L510
-.L511:
+.L521:
+	b	.L521
+.L522:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L516:
+.L527:
 	.align	2
-.L515:
+.L526:
+	.word	.LANCHOR75
 	.word	.LANCHOR76
-	.word	.LANCHOR77
-	.word	.LANCHOR8
+	.word	.LANCHOR15
+	.word	.LANCHOR78
 	.word	.LANCHOR79
-	.word	.LANCHOR80
 	.word	.LC4
 	.word	.LC3
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.test_node_in_list,"ax",%progbits
 	.align	1
@@ -3559,35 +3679,35 @@ FtlFreeSysBlkQueueOut:
 test_node_in_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L522
+	ldr	r3, .L533
 	push	{r4, r5, lr}
 	movw	r5, #65535
 	ldr	r2, [r0]
 	ldr	r4, [r3]
 	subs	r3, r2, r4
 	asrs	r0, r3, #1
-	ldr	r3, .L522+4
+	ldr	r3, .L533+4
 	muls	r3, r0, r3
 	movs	r0, #6
 	uxth	r3, r3
-.L519:
+.L530:
 	cmp	r3, r1
-	beq	.L520
+	beq	.L531
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	beq	.L521
+	beq	.L532
 	mla	r2, r0, r3, r4
-	b	.L519
-.L520:
+	b	.L530
+.L531:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L521:
+.L532:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L523:
+.L534:
 	.align	2
-.L522:
-	.word	.LANCHOR82
+.L533:
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	test_node_in_list, .-test_node_in_list
 	.section	.text.insert_data_list,"ax",%progbits
@@ -3602,11 +3722,11 @@ insert_data_list:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L540
+	ldr	r3, .L551
 	ldrh	lr, [r3]
 	cmp	lr, r0
-	bls	.L526
-	ldr	r3, .L540+4
+	bls	.L537
+	ldr	r3, .L551+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
@@ -3616,109 +3736,109 @@ insert_data_list:
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L540+8
+	ldr	r3, .L551+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L527
-.L539:
+	bne	.L538
+.L550:
 	str	r1, [r3]
-.L526:
+.L537:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L527:
-	ldr	r3, .L540+12
+.L538:
+	ldr	r3, .L551+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L537
+	cbz	r3, .L548
 	mul	fp, r3, r6
-.L528:
+.L539:
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-	ldr	r3, .L540+16
+	ldr	r3, .L551+16
 	muls	r3, r6, r3
-	ldr	r6, .L540+20
+	ldr	r6, .L551+20
 	ldr	r8, [r6]
 	movs	r6, #0
 	uxth	r3, r3
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.L535:
+.L546:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	lr, r6
-	bcc	.L526
+	bcc	.L537
 	cmp	r3, r0
-	beq	.L526
+	beq	.L537
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
 	ldrh	r7, [r2, #4]
-	cbz	r7, .L538
+	cbz	r7, .L549
 	muls	r7, r5, r7
-.L530:
+.L541:
 	cmp	fp, r7
-	bne	.L531
+	bne	.L542
 	ldr	r5, [sp, #12]
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
 	cmp	r10, r7
-	bcc	.L533
-.L532:
+	bcc	.L544
+.L543:
 	ldr	r5, [sp, #4]
 	cmp	r2, ip
 	strh	r3, [r4, r5]	@ movhi
 	ldrh	r3, [r2, #2]
 	strh	r3, [r1, #2]	@ movhi
-	bne	.L536
+	bne	.L547
 	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L540+8
-	b	.L539
-.L537:
+	ldr	r3, .L551+8
+	b	.L550
+.L548:
 	mov	fp, #-1
-	b	.L528
-.L538:
+	b	.L539
+.L549:
 	mov	r7, #-1
-	b	.L530
-.L531:
-	bcc	.L532
-.L533:
+	b	.L541
+.L542:
+	bcc	.L543
+.L544:
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
-	bne	.L534
+	bne	.L545
 	strh	r3, [r1, #2]	@ movhi
 	strh	r0, [r2]	@ movhi
-	ldr	r3, .L540+24
-	b	.L539
-.L534:
+	ldr	r3, .L551+24
+	b	.L550
+.L545:
 	movs	r3, #6
 	mla	r2, r3, r7, r4
 	mov	r3, r7
-	b	.L535
-.L536:
+	b	.L546
+.L547:
 	ldrh	r1, [r2, #2]
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
 	strh	r0, [r2, #2]	@ movhi
-	b	.L526
-.L541:
+	b	.L537
+.L552:
 	.align	2
-.L540:
+.L551:
 	.word	.LANCHOR40
+	.word	.LANCHOR81
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	.LANCHOR84
 	.word	-1431655765
-	.word	.LANCHOR79
-	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR84
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -3733,31 +3853,31 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L544
+	ldr	r2, .L555
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L544+4
+	ldr	r2, .L555+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L542
-	ldr	r1, .L544+8
+	bcs	.L553
+	ldr	r1, .L555+8
 	movs	r2, #210
-	ldr	r0, .L544+12
+	ldr	r0, .L555+12
 	bl	printf
-	ldr	r1, .L544+16
-	ldr	r0, .L544+20
+	ldr	r1, .L555+16
+	ldr	r0, .L555+20
 	pop	{r3, lr}
 	b	printf
-.L542:
+.L553:
 	pop	{r3, pc}
-.L545:
+.L556:
 	.align	2
-.L544:
-	.word	.LANCHOR86
+.L555:
+	.word	.LANCHOR85
 	.word	.LANCHOR40
-	.word	.LANCHOR87
+	.word	.LANCHOR86
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -3776,48 +3896,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L547
-	ldr	r3, .L553
+	beq	.L558
+	ldr	r3, .L564
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L553+4
+	ldr	r3, .L564+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L548
+	cbnz	r6, .L559
 	str	r5, [r3]
-.L547:
+.L558:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L548:
-	ldr	r3, .L553+8
+.L559:
+	ldr	r3, .L564+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L553+12
+	ldr	r2, .L564+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L551:
+.L562:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L549
+	bcs	.L560
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L550
+	bne	.L561
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L547
-.L550:
+	b	.L558
+.L561:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L551
-.L549:
+	b	.L562
+.L560:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -3832,13 +3952,13 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L547
-.L554:
+	b	.L558
+.L565:
 	.align	2
-.L553:
-	.word	.LANCHOR82
-	.word	.LANCHOR88
-	.word	.LANCHOR79
+.L564:
+	.word	.LANCHOR81
+	.word	.LANCHOR87
+	.word	.LANCHOR78
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -3854,31 +3974,31 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L557
+	ldr	r2, .L568
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L557+4
+	ldr	r2, .L568+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L555
-	ldr	r1, .L557+8
+	bcs	.L566
+	ldr	r1, .L568+8
 	movs	r2, #203
-	ldr	r0, .L557+12
+	ldr	r0, .L568+12
 	bl	printf
-	ldr	r1, .L557+16
-	ldr	r0, .L557+20
+	ldr	r1, .L568+16
+	ldr	r0, .L568+20
 	pop	{r3, lr}
 	b	printf
-.L555:
+.L566:
 	pop	{r3, pc}
-.L558:
+.L569:
 	.align	2
-.L557:
-	.word	.LANCHOR89
+.L568:
+	.word	.LANCHOR88
 	.word	.LANCHOR40
-	.word	.LANCHOR90
+	.word	.LANCHOR89
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -3896,7 +4016,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L565
+	ldr	r5, .L576
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -3904,23 +4024,23 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L560
+	bne	.L571
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L560
-	ldr	r1, .L565+4
+	beq	.L571
+	ldr	r1, .L576+4
 	mov	r2, #386
-	ldr	r0, .L565+8
+	ldr	r0, .L576+8
 	bl	printf
-	ldr	r1, .L565+12
-	ldr	r0, .L565+16
+	ldr	r1, .L576+12
+	ldr	r0, .L576+16
 	bl	printf
-.L560:
+.L571:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L561
+	bne	.L572
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -3931,24 +4051,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L563:
+.L574:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L561:
+.L572:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L564
+	bne	.L575
 	cmp	r1, r3
-	beq	.L563
+	beq	.L574
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L563
-.L564:
+	b	.L574
+.L575:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -3956,12 +4076,12 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L563
-.L566:
+	b	.L574
+.L577:
 	.align	2
-.L565:
-	.word	.LANCHOR82
-	.word	.LANCHOR91
+.L576:
+	.word	.LANCHOR81
+	.word	.LANCHOR90
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -3979,15 +4099,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L573
-	ldr	r2, .L574
+	cbz	r3, .L584
+	ldr	r2, .L585
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L569:
-	cbnz	r1, .L570
-.L572:
-	ldr	r4, .L574+4
+.L580:
+	cbnz	r1, .L581
+.L583:
+	ldr	r4, .L585+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -3995,21 +4115,21 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L570:
+.L581:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L572
+	beq	.L583
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L569
-.L573:
+	b	.L580
+.L584:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L575:
+.L586:
 	.align	2
-.L574:
-	.word	.LANCHOR82
+.L585:
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
@@ -4023,39 +4143,39 @@ List_pop_index_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L582
+	ldr	r3, .L593
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L581
-	ldr	r2, .L582+4
+	cbz	r3, .L592
+	ldr	r2, .L593+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L578:
-	cbz	r0, .L579
+.L589:
+	cbz	r0, .L590
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L580
-.L581:
+	bne	.L591
+.L592:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L580:
+.L591:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L578
-.L579:
-	ldr	r0, .L582+8
+	b	.L589
+.L590:
+	ldr	r0, .L593+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L583:
+.L594:
 	.align	2
-.L582:
-	.word	.LANCHOR83
+.L593:
 	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
@@ -4069,64 +4189,64 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L595
+	ldr	r3, .L606
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L586
-	ldr	r3, .L595+4
+	beq	.L597
+	ldr	r3, .L606+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L586
-	ldr	r3, .L595+8
+	beq	.L597
+	ldr	r3, .L606+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L586
-	ldr	r7, .L595+12
+	beq	.L597
+	ldr	r7, .L606+12
 	movs	r6, #6
-	ldr	r3, .L595+16
+	ldr	r3, .L606+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L586
-	ldr	r3, .L595+20
+	beq	.L597
+	ldr	r3, .L606+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L593
+	beq	.L604
 	muls	r5, r2, r5
-.L588:
+.L599:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L589
+	bne	.L600
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L589
-	ldr	r1, .L595+24
+	bne	.L600
+	ldr	r1, .L606+24
 	mov	r2, #504
-	ldr	r0, .L595+28
+	ldr	r0, .L606+28
 	bl	printf
-	ldr	r1, .L595+32
-	ldr	r0, .L595+36
+	ldr	r1, .L606+32
+	ldr	r0, .L606+36
 	bl	printf
-.L589:
+.L600:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L590
+	bne	.L601
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L586
-.L590:
+	beq	.L597
+.L601:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L595+40
+	ldr	r3, .L606+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -4134,54 +4254,54 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L594
+	cbz	r3, .L605
 	muls	r3, r0, r3
-.L591:
+.L602:
 	cmp	r5, r3
-	bcs	.L586
-	ldr	r5, .L595+44
+	bcs	.L597
+	ldr	r5, .L606+44
 	mov	r1, r4
-	ldr	r0, .L595+16
+	ldr	r0, .L606+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L592
-	ldr	r1, .L595+24
+	cbnz	r3, .L603
+	ldr	r1, .L606+24
 	movw	r2, #515
-	ldr	r0, .L595+28
+	ldr	r0, .L606+28
 	bl	printf
-	ldr	r1, .L595+32
-	ldr	r0, .L595+36
+	ldr	r1, .L606+32
+	ldr	r0, .L606+36
 	bl	printf
-.L592:
+.L603:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L586:
+.L597:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L593:
+.L604:
 	mov	r5, #-1
-	b	.L588
-.L594:
+	b	.L599
+.L605:
 	mov	r3, #-1
-	b	.L591
-.L596:
+	b	.L602
+.L607:
 	.align	2
-.L595:
+.L606:
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
+	.word	.LANCHOR81
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	.LANCHOR84
-	.word	.LANCHOR95
+	.word	.LANCHOR94
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	-1431655765
-	.word	.LANCHOR86
+	.word	.LANCHOR85
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -4199,16 +4319,16 @@ ftl_map_blk_alloc_new_blk:
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
 	movs	r3, #0
-.L598:
+.L609:
 	uxth	r5, r3
 	cmp	r5, r1
-	bcs	.L601
+	bcs	.L612
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L598
+	bne	.L609
 	bl	FtlFreeSysBlkQueueOut
 	subs	r3, r0, #1
 	movw	r2, #65533
@@ -4216,14 +4336,14 @@ ftl_map_blk_alloc_new_blk:
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
 	cmp	r3, r2
-	bls	.L599
-	ldr	r3, .L605
-	ldr	r0, .L605+4
+	bls	.L610
+	ldr	r3, .L616
+	ldr	r0, .L616+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.L600:
-	b	.L600
-.L599:
+.L611:
+	b	.L611
+.L610:
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	strh	r5, [r4]	@ movhi
@@ -4232,26 +4352,26 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L601:
+.L612:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L603
-	ldr	r1, .L605+8
+	bhi	.L614
+	ldr	r1, .L616+8
 	movw	r2, #629
-	ldr	r0, .L605+12
+	ldr	r0, .L616+12
 	bl	printf
-	ldr	r1, .L605+16
-	ldr	r0, .L605+20
+	ldr	r1, .L616+16
+	ldr	r0, .L616+20
 	bl	printf
-.L603:
+.L614:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L606:
+.L617:
 	.align	2
-.L605:
-	.word	.LANCHOR76
+.L616:
+	.word	.LANCHOR75
 	.word	.LC8
-	.word	.LANCHOR96
+	.word	.LANCHOR95
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4269,86 +4389,86 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L617
+	ldr	r3, .L628
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L617+4
+	ldr	r3, .L628+4
 	ldr	r3, [r3]
-.L608:
+.L619:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L610
+	bcc	.L621
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L611:
+.L622:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L613
+	bcc	.L624
 	cmp	r4, r2
-	bcc	.L609
-	ldr	r1, .L617+8
+	bcc	.L620
+	ldr	r1, .L628+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L614:
+.L625:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L616
+	bcc	.L627
 	cmp	r4, r2
-	bcc	.L609
-	movw	r2, #855
-	ldr	r1, .L617+12
-	ldr	r0, .L617+16
+	bcc	.L620
+	movw	r2, #859
+	ldr	r1, .L628+12
+	ldr	r0, .L628+16
 	bl	printf
-	ldr	r1, .L617+20
-	ldr	r0, .L617+24
+	ldr	r1, .L628+20
+	ldr	r0, .L628+24
 	bl	printf
-	b	.L609
-.L610:
+	b	.L620
+.L621:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L608
-.L609:
+	bne	.L619
+.L620:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L613:
+.L624:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L612
+	blt	.L623
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L612:
+.L623:
 	adds	r1, r1, #1
-	b	.L611
-.L616:
+	b	.L622
+.L627:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L615
+	bls	.L626
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L615:
+.L626:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L614
-.L618:
+	b	.L625
+.L629:
 	.align	2
-.L617:
-	.word	.LANCHOR68
+.L628:
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.word	.LANCHOR99
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -4364,49 +4484,49 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L629
+	ldr	r2, .L640
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L620
-	cbnz	r0, .L620
+	bhi	.L631
+	cbnz	r0, .L631
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L620:
+.L631:
 	movs	r3, #0
-	ldr	r0, .L629+4
+	ldr	r0, .L640+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L629+8
+	ldr	r1, .L640+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L629+12
+	ldr	r2, .L640+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L621:
+.L632:
 	cmp	r1, r4
-	bne	.L623
-	cbz	r3, .L619
+	bne	.L634
+	cbz	r3, .L630
 	str	r0, [r2]
-.L619:
+.L630:
 	pop	{r4, r5, r6, pc}
-.L623:
+.L634:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L621
-.L630:
+	b	.L632
+.L641:
 	.align	2
-.L629:
-	.word	.LANCHOR100
+.L640:
+	.word	.LANCHOR99
 	.word	.LANCHOR40
-	.word	.LANCHOR84
-	.word	.LANCHOR101
+	.word	.LANCHOR83
+	.word	.LANCHOR100
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -4421,10 +4541,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L632
+	cbz	r1, .L643
 	b	ftl_set_blk_mode.part.10
-.L632:
-	ldr	r2, .L633
+.L643:
+	ldr	r2, .L644
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -4434,9 +4554,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L634:
+.L645:
 	.align	2
-.L633:
+.L644:
 	.word	.LANCHOR0
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -4451,7 +4571,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L636
+	ldr	r3, .L647
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -4459,9 +4579,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L637:
+.L648:
 	.align	2
-.L636:
+.L647:
 	.word	.LANCHOR0
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -4479,14 +4599,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L645
+	ldr	r3, .L656
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L639:
+.L650:
 	cmp	r2, r4
-	bcc	.L641
-	ldr	r3, .L645+4
+	bcc	.L652
+	ldr	r3, .L656+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -4494,12 +4614,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L642:
+.L653:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L644
+	bhi	.L655
 	pop	{r4, r5, r6, pc}
-.L641:
+.L652:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -4508,8 +4628,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L639
-.L644:
+	b	.L650
+.L655:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -4517,12 +4637,12 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L642
-.L646:
+	b	.L653
+.L657:
 	.align	2
-.L645:
+.L656:
 	.word	.LANCHOR38
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
@@ -4535,44 +4655,44 @@ ftl_sb_update_avl_pages:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L660
+	ldr	r3, .L671
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L648
-	ldr	r1, .L660+4
-	mov	r2, #2544
-	ldr	r0, .L660+8
+	bcc	.L659
+	ldr	r1, .L671+4
+	movw	r2, #2575
+	ldr	r0, .L671+8
 	bl	printf
-	ldr	r1, .L660+12
-	ldr	r0, .L660+16
+	ldr	r1, .L671+12
+	ldr	r0, .L671+16
 	bl	printf
-.L648:
-	ldr	r3, .L660+20
+.L659:
+	ldr	r3, .L671+20
 	add	r6, r4, #16
-	ldr	r10, .L660+40
+	ldr	r10, .L671+40
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L649:
+.L660:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L651
-	ldr	r2, .L660+24
+	bhi	.L662
+	ldr	r2, .L671+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L660+28
+	ldr	r3, .L671+28
 	ldr	r3, [r3]
-	cbz	r3, .L652
-	ldr	r3, .L660+32
+	cbz	r3, .L663
+	ldr	r3, .L671+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
@@ -4580,43 +4700,43 @@ make_superblock:
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L652:
-	ldr	r3, .L660+36
+.L663:
+	ldr	r3, .L671+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L653
+	cbz	r3, .L664
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L653:
+.L664:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L651:
+.L662:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L650
+	cbnz	r0, .L661
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L650:
+.L661:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L649
-.L661:
+	b	.L660
+.L672:
 	.align	2
-.L660:
+.L671:
 	.word	.LANCHOR40
-	.word	.LANCHOR102
+	.word	.LANCHOR101
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR38
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR28
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR1
 	.word	.LANCHOR47
 	.size	make_superblock, .-make_superblock
@@ -4633,49 +4753,49 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L668
+	ldr	r3, .L679
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L668+12
+	ldr	r10, .L679+12
 	ldrh	r7, [r3]
-	ldr	r3, .L668+4
+	ldr	r3, .L679+4
 	ldrh	r8, [r3]
-.L663:
+.L674:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L665
-	cbz	r4, .L667
+	bhi	.L676
+	cbz	r4, .L678
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L666:
-	ldr	r3, .L668+8
+.L677:
+	ldr	r3, .L679+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L665:
+.L676:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L664
+	cbnz	r0, .L675
 	add	r4, r4, r8
 	uxth	r4, r4
-.L664:
+.L675:
 	adds	r5, r5, #1
-	b	.L663
-.L667:
+	b	.L674
+.L678:
 	mov	r0, r4
-	b	.L666
-.L669:
+	b	.L677
+.L680:
 	.align	2
-.L668:
+.L679:
 	.word	.LANCHOR38
-	.word	.LANCHOR53
-	.word	.LANCHOR82
+	.word	.LANCHOR52
+	.word	.LANCHOR81
 	.word	.LANCHOR47
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
@@ -4690,28 +4810,28 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L673
+	ldr	r3, .L684
 	ldr	r0, [r3]
-	cbz	r0, .L671
-	ldr	r3, .L673+4
+	cbz	r0, .L682
+	ldr	r3, .L684+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L673+8
+	ldr	r3, .L684+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L673+12
+	ldr	r3, .L684+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L671:
+.L682:
 	bx	lr
-.L674:
+.L685:
 	.align	2
-.L673:
-	.word	.LANCHOR88
-	.word	.LANCHOR82
+.L684:
+	.word	.LANCHOR87
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -4724,11 +4844,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L683
+	ldr	r3, .L694
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L681
-	ldr	r2, .L683+4
+	cbz	r3, .L692
+	ldr	r2, .L694+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -4737,42 +4857,42 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L683+8
+	ldr	r2, .L694+8
 	ldr	r1, [r2]
-	ldr	r2, .L683+12
+	ldr	r2, .L694+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L678:
+.L689:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L680
+	bls	.L691
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L682
-.L680:
-	ldr	r2, .L683+16
+	bne	.L693
+.L691:
+	ldr	r2, .L694+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L682:
+.L693:
 	mov	r3, r4
-	b	.L678
-.L681:
+	b	.L689
+.L692:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L684:
+.L695:
 	.align	2
-.L683:
+.L694:
+	.word	.LANCHOR87
 	.word	.LANCHOR88
-	.word	.LANCHOR89
-	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -4788,19 +4908,19 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L686
-	ldr	r2, .L687
+	beq	.L697
+	ldr	r2, .L698
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L686:
+.L697:
 	movs	r0, #0
 	pop	{r3, pc}
-.L688:
+.L699:
 	.align	2
-.L687:
-	.word	.LANCHOR84
+.L698:
+	.word	.LANCHOR83
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -4815,54 +4935,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L694
+	ldr	r1, .L705
 	mov	fp, #1
-	ldr	r2, .L694+4
+	ldr	r2, .L705+4
 	ldr	r5, [r1]
-	ldr	r1, .L694+8
+	ldr	r1, .L705+8
 	str	r3, [r2]
-	ldr	r2, .L694+12
+	ldr	r2, .L705+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L694+16
+	ldr	r1, .L705+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L694+20
+	ldr	r1, .L705+20
 	ldr	r10, [r1]
-	ldr	r1, .L694+24
+	ldr	r1, .L705+24
 	ldrh	r7, [r1]
-	ldr	r1, .L694+28
+	ldr	r1, .L705+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L690:
+.L701:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #36
 	add	lr, r1, r6
-	bne	.L691
-	ldr	r3, .L694+32
+	bne	.L702
+	ldr	r3, .L705+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L694+8
+	ldr	r3, .L705+8
 	ldr	r4, [r3]
-	ldr	r3, .L694+20
+	ldr	r3, .L705+20
 	ldr	ip, [r3]
-.L692:
+.L703:
 	cmp	r2, r0
-	bcc	.L693
+	bcc	.L704
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L691:
+.L702:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -4876,8 +4996,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-32]
 	mov	r3, ip
 	str	r6, [r4, #-36]
-	b	.L690
-.L693:
+	b	.L701
+.L704:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -4892,19 +5012,19 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L692
-.L695:
+	b	.L703
+.L706:
 	.align	2
-.L694:
-	.word	.LANCHOR104
+.L705:
 	.word	.LANCHOR103
-	.word	.LANCHOR105
+	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.word	.LANCHOR38
+	.word	.LANCHOR57
+	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR106
-	.word	.LANCHOR59
 	.word	.LANCHOR107
-	.word	.LANCHOR108
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -4917,43 +5037,43 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L703
+	ldr	r3, .L714
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #36
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L703+4
+	ldr	r3, .L714+4
 	ldr	r5, [r3]
-.L697:
+.L708:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L696
+	bls	.L707
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L698:
+.L709:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L699
+	bls	.L710
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L698
+	bne	.L709
 	str	lr, [r10, #8]
-.L699:
+.L710:
 	adds	r4, r4, #1
-	b	.L697
-.L696:
+	b	.L708
+.L707:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L704:
+.L715:
 	.align	2
-.L703:
-	.word	.LANCHOR108
-	.word	.LANCHOR104
+.L714:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -4966,45 +5086,45 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L712
+	ldr	r3, .L723
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #36
 	ldr	r4, [r3]
-	ldr	r3, .L712+4
+	ldr	r3, .L723+4
 	ldr	r5, [r3]
-.L706:
+.L717:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L710
+	bhi	.L721
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L710:
+.L721:
 	mov	r10, #0
-.L707:
+.L718:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L708
+	bls	.L719
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L707
+	bne	.L718
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L708:
+.L719:
 	adds	r2, r2, #1
-	b	.L706
-.L713:
+	b	.L717
+.L724:
 	.align	2
-.L712:
-	.word	.LANCHOR108
-	.word	.LANCHOR104
+.L723:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -5018,27 +5138,27 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L719
-	ldr	r2, .L719+4
+	ldr	r3, .L730
+	ldr	r2, .L730+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L715:
+.L726:
 	cmp	r3, r2
-	bne	.L717
+	bne	.L728
 	movs	r0, #0
 	bx	lr
-.L717:
+.L728:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L715
+	bne	.L726
 	movs	r0, #1
 	bx	lr
-.L720:
+.L731:
 	.align	2
-.L719:
+.L730:
+	.word	.LANCHOR108
 	.word	.LANCHOR109
-	.word	.LANCHOR110
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -5053,35 +5173,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L725
+	ldr	r4, .L736
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L725+4
+	ldr	r3, .L736+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L722:
+.L733:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L724
-	bne	.L723
+	bcc	.L735
+	bne	.L734
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L723
-.L724:
+	b	.L734
+.L735:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L722
-.L723:
-	ldr	r2, .L725+8
+	bne	.L733
+.L734:
+	ldr	r2, .L736+8
 	movs	r0, #12
-	ldr	r1, .L725+12
+	ldr	r1, .L736+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -5092,13 +5212,13 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L726:
+.L737:
 	.align	2
-.L725:
-	.word	.LANCHOR110
+.L736:
 	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR110
 	.word	.LANCHOR111
-	.word	.LANCHOR112
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
@@ -5111,52 +5231,52 @@ FtlGcUpdatePage:
 FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L732+12
+	ldr	ip, .L743+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L728
-	ldr	r6, .L732
+	beq	.L739
+	ldr	r6, .L743
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L728
-	ldr	r4, .L732+4
+	beq	.L739
+	ldr	r4, .L743+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L728
-	ldr	r2, .L732+8
+	beq	.L739
+	ldr	r2, .L743+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L728
+	beq	.L739
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L729
+	bne	.L740
 	strh	r0, [ip]	@ movhi
-.L728:
+.L739:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L729:
+.L740:
 	cmp	r7, r3
-	bne	.L730
+	bne	.L741
 	strh	r0, [r6]	@ movhi
-	b	.L728
-.L730:
+	b	.L739
+.L741:
 	cmp	r5, r3
-	bne	.L731
+	bne	.L742
 	strh	r0, [r4]	@ movhi
-	b	.L728
-.L731:
+	b	.L739
+.L742:
 	cmp	r1, r3
 	it	eq
 	strheq	r0, [r2]	@ movhi
-	b	.L728
-.L733:
+	b	.L739
+.L744:
 	.align	2
-.L732:
+.L743:
+	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR113
+	.word	.LANCHOR112
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -5169,55 +5289,55 @@ FtlGcRefreshOpenBlock:
 FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	ip, .L744+12
+	ldr	ip, .L755+12
 	push	{r4, r5, r6, r7, lr}
 	ldrh	lr, [ip]
 	cmp	lr, r0
-	beq	.L742
-	ldr	r6, .L744
+	beq	.L753
+	ldr	r6, .L755
 	ldrh	r7, [r6]
 	cmp	r0, r7
-	beq	.L742
-	ldr	r4, .L744+4
+	beq	.L753
+	ldr	r4, .L755+4
 	ldrh	r5, [r4]
 	cmp	r0, r5
-	beq	.L742
-	ldr	r2, .L744+8
+	beq	.L753
+	ldr	r2, .L755+8
 	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L742
+	beq	.L753
 	movw	r3, #65535
 	cmp	lr, r3
-	bne	.L736
+	bne	.L747
 	strh	r0, [ip]	@ movhi
-.L742:
+.L753:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, pc}
-.L736:
+.L747:
 	cmp	r7, r3
-	bne	.L737
+	bne	.L748
 	strh	r0, [r6]	@ movhi
-	b	.L742
-.L737:
+	b	.L753
+.L748:
 	cmp	r5, r3
-	bne	.L738
+	bne	.L749
 	strh	r0, [r4]	@ movhi
-	b	.L742
-.L738:
+	b	.L753
+.L749:
 	cmp	r1, r3
-	bne	.L743
+	bne	.L754
 	strh	r0, [r2]	@ movhi
-	b	.L742
-.L743:
+	b	.L753
+.L754:
 	mov	r0, #-1
 	pop	{r4, r5, r6, r7, pc}
-.L745:
+.L756:
 	.align	2
-.L744:
+.L755:
+	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR113
+	.word	.LANCHOR112
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -5235,48 +5355,48 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L754
+	ldr	r3, .L765
 	ldr	r3, [r3]
-	cbz	r3, .L747
-	ldr	r3, .L754+4
+	cbz	r3, .L758
+	ldr	r3, .L765+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #39
 	itt	hi
 	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L747:
-	ldr	r2, .L754+8
+.L758:
+	ldr	r2, .L765+8
 	movs	r1, #0
-	ldr	r5, .L754+12
+	ldr	r5, .L765+12
 	ldrh	r3, [r2]
-.L748:
+.L759:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L750
+	bhi	.L761
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L754+12
+	ldrls	r2, .L765+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L749
-.L750:
+	b	.L760
+.L761:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L748
-.L749:
+	bne	.L759
+.L760:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L755:
+.L766:
 	.align	2
-.L754:
+.L765:
 	.word	.LANCHOR28
-	.word	.LANCHOR79
+	.word	.LANCHOR78
+	.word	.LANCHOR116
 	.word	.LANCHOR117
-	.word	.LANCHOR118
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -5289,22 +5409,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L762
+	ldr	r3, .L773
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L757
-	ldr	r2, .L762+4
+	cbz	r3, .L768
+	ldr	r2, .L773+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L757
-	ldr	r4, .L762+8
+	bne	.L768
+	ldr	r4, .L773+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L762+12
+	ldr	r3, .L773+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -5312,16 +5432,16 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L757:
+.L768:
 	movs	r0, #0
 	pop	{r4, pc}
-.L763:
+.L774:
 	.align	2
-.L762:
-	.word	.LANCHOR117
-	.word	.LANCHOR113
-	.word	.LANCHOR119
+.L773:
+	.word	.LANCHOR116
+	.word	.LANCHOR112
 	.word	.LANCHOR118
+	.word	.LANCHOR117
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.flash_boot_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -5335,18 +5455,18 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L766
+	ldr	r3, .L777
 	ldr	r2, [r3]
-	ldr	r3, .L766+4
+	ldr	r3, .L777+4
 	cmp	r2, r3
-	bne	.L764
+	bne	.L775
 	b	flash_enter_slc_mode
-.L764:
+.L775:
 	bx	lr
-.L767:
+.L778:
 	.align	2
-.L766:
-	.word	.LANCHOR29
+.L777:
+	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",%progbits
@@ -5361,18 +5481,18 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L770
+	ldr	r3, .L781
 	ldr	r2, [r3]
-	ldr	r3, .L770+4
+	ldr	r3, .L781+4
 	cmp	r2, r3
-	bne	.L768
+	bne	.L779
 	b	flash_exit_slc_mode
-.L768:
+.L779:
 	bx	lr
-.L771:
+.L782:
 	.align	2
-.L770:
-	.word	.LANCHOR29
+.L781:
+	.word	.LANCHOR119
 	.word	1446522928
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",%progbits
@@ -5385,27 +5505,28 @@ flash_boot_exit_slc_mode:
 FW_FlashBlockErase.constprop.41:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L773
-	push	{r4, lr}
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
+	ldr	r3, .L784
 	movs	r0, #0
 	ldr	r3, [r3]
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	ldrb	r5, [r3, #9]	@ zero_extendqisi2
 	bl	flash_boot_enter_slc_mode
 	mov	r0, r4
+	mov	r1, r5
 	bl	__aeabi_uidiv
 	movs	r2, #0
 	mov	r1, r0
 	mov	r0, r2
 	bl	FlashEraseBlock
-	mov	r1, r0
+	mov	r4, r0
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
-	uxtb	r0, r1
-	pop	{r4, pc}
-.L774:
+	uxtb	r0, r4
+	pop	{r3, r4, r5, pc}
+.L785:
 	.align	2
-.L773:
+.L784:
 	.word	.LANCHOR18
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
@@ -5435,54 +5556,54 @@ BuildFlashLsbPageTable:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r1
-	cbnz	r0, .L777
-	ldr	r3, .L814
-.L778:
+	cbnz	r0, .L788
+	ldr	r3, .L828
+.L789:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
 	cmp	r0, #256
-	bne	.L778
-.L784:
+	bne	.L789
+.L795:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L814+4
+	ldr	r0, .L828+4
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r1, .L814
+	ldr	r1, .L828
 	movs	r3, #0
-	ldr	r0, .L814+4
-.L779:
+	ldr	r0, .L828+4
+.L790:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L801
+	bhi	.L814
 	pop	{r4, pc}
-.L777:
+.L788:
 	cmp	r0, #1
-	bne	.L780
-	ldr	r1, .L814
+	bne	.L791
+	ldr	r1, .L828
 	movs	r3, #0
-.L783:
+.L794:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L781
+	bls	.L792
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L781:
+.L792:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L783
-	b	.L784
-.L780:
+	bne	.L794
+	b	.L795
+.L791:
 	cmp	r0, #2
-	bne	.L785
-	ldr	r1, .L814
+	bne	.L796
+	ldr	r1, .L828
 	movs	r2, #0
-.L787:
+.L798:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -5492,34 +5613,34 @@ BuildFlashLsbPageTable:
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #256
-	bne	.L787
-	b	.L784
-.L785:
+	bne	.L798
+	b	.L795
+.L796:
 	cmp	r0, #3
-	bne	.L788
-	ldr	r1, .L814
+	bne	.L799
+	ldr	r1, .L828
 	movs	r3, #0
-.L791:
+.L802:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L789
+	bls	.L800
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L789:
+.L800:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L791
-	b	.L784
-.L788:
+	bne	.L802
+	b	.L795
+.L799:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L792
-	ldr	r2, .L814
+	bne	.L803
+	ldr	r2, .L828
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5534,7 +5655,7 @@ BuildFlashLsbPageTable:
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L794:
+.L805:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -5544,56 +5665,75 @@ BuildFlashLsbPageTable:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #256
-	bne	.L794
-	b	.L784
-.L792:
+	bne	.L805
+	b	.L795
+.L803:
 	cmp	r0, #5
-	bne	.L795
-	ldr	r2, .L814
-.L796:
+	bne	.L806
+	ldr	r2, .L828
+.L807:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L796
-	ldr	r2, .L814+8
-.L797:
+	bne	.L807
+	ldr	r2, .L828+8
+.L808:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L797
-	b	.L784
-.L795:
+	bne	.L808
+	b	.L795
+.L806:
 	cmp	r0, #6
-	bne	.L784
-	ldr	r0, .L814
+	bne	.L809
+	ldr	r0, .L828
 	mov	r1, r3
-.L800:
+.L812:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L798
+	bls	.L810
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L798:
+.L810:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L800
-	b	.L784
-.L801:
+	bne	.L812
+	b	.L795
+.L809:
+	cmp	r0, #9
+	bne	.L795
+	ldr	r2, .L828
+	movw	r1, #509
+	strh	r3, [r2]	@ movhi
+	movs	r3, #1
+	strh	r3, [r2, #2]	@ movhi
+	mov	r3, r2
+	movs	r2, #2
+	strh	r2, [r3, #4]!	@ movhi
+	movs	r2, #3
+.L813:
+	strh	r2, [r3, #2]!	@ movhi
+	adds	r2, r2, #2
+	uxth	r2, r2
+	cmp	r2, r1
+	bne	.L813
+	b	.L795
+.L814:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L779
-.L815:
+	b	.L790
+.L829:
 	.align	2
-.L814:
+.L828:
 	.word	.LANCHOR16
 	.word	.LANCHOR120
 	.word	.LANCHOR16+30
@@ -5609,127 +5749,115 @@ BuildFlashLsbPageTable:
 FlashDieInfoInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L844
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #0
-	ldr	r2, .L834
-	ldr	r4, .L834+4
-	strb	r3, [r2]
-	str	r2, [sp]
-	strb	r3, [r4]
-	ldr	r3, .L834+8
-	ldr	r7, .L834+12
-	ldrh	r3, [r3, #10]
-	cmp	r3, #256
-	bls	.L817
-	mov	r3, #512
-.L833:
+	movs	r4, #0
+	ldr	r5, .L844+4
+	ldr	fp, .L844+36
+	ldrh	r0, [r3, #10]
+	strb	r4, [r5]
+	strb	r4, [fp]
+	bl	FlashBlockAlignInit
 	movs	r2, #8
-	movs	r1, #0
-	ldr	r0, .L834+16
-	movs	r6, #0
-	str	r3, [r7]
+	mov	r1, r4
+	ldr	r0, .L844+8
 	bl	ftl_memset
 	movs	r2, #32
-	movs	r1, #0
-	ldr	r0, .L834+20
+	mov	r1, r4
+	ldr	r0, .L844+12
 	bl	ftl_memset
 	movs	r2, #128
-	movs	r1, #0
-	ldr	r0, .L834+24
+	mov	r1, r4
+	ldr	r0, .L844+16
 	bl	ftl_memset
-	ldr	r3, .L834+28
-	ldr	fp, .L834+36
-	ldr	r5, [r3]
-	ldr	r3, .L834+16
-	ldrb	r10, [r5]	@ zero_extendqisi2
-	add	r8, r5, #1
-.L821:
-	mov	r2, r10
-	add	r1, fp, r6, lsl #3
-	mov	r0, r8
+	ldr	r3, .L844+20
+	ldr	r10, .L844+32
+	ldr	r6, [r3]
+	ldr	r3, .L844+8
+	ldrb	r8, [r6]	@ zero_extendqisi2
+	adds	r7, r6, #1
+.L832:
+	mov	r2, r8
+	add	r1, r10, r4, lsl #3
+	mov	r0, r7
 	str	r3, [sp, #4]
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L820
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	ldr	r1, .L834+20
-	strb	r6, [r3, r2]
+	cbnz	r0, .L831
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r1, .L844+12
+	strb	r4, [r3, r2]
 	str	r0, [r1, r2, lsl #2]
 	adds	r1, r2, #1
-	strb	r1, [r4]
-.L820:
-	adds	r6, r6, #1
-	cmp	r6, #4
-	bne	.L821
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r2, [sp]
-	strb	r3, [r2]
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	strb	r1, [r5]
+.L831:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L832
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	strb	r3, [fp]
+	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L822
-.L826:
-	ldrh	r2, [r5, #14]
-	ldrb	r3, [r4]	@ zero_extendqisi2
+	beq	.L833
+.L837:
+	ldrh	r2, [r6, #14]
+	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	ldrb	r2, [r6, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L834+32
+	ldr	r2, .L844+24
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L817:
-	cmp	r3, #128
-	it	hi
-	movhi	r3, #256
-	b	.L833
-.L822:
-	ldr	fp, [r7]
-	movs	r6, #0
-	ldr	r7, .L834+20
-	ldr	r3, .L834+16
-.L825:
-	str	r3, [sp]
-	mov	r2, r10
-	ldr	r3, .L834+36
-	mov	r0, r8
-	add	r1, r3, r6, lsl #3
+.L833:
+	ldr	r3, .L844+28
+	movs	r4, #0
+	ldr	r10, .L844+12
+	ldr	fp, [r3]
+	ldr	r3, .L844+8
+.L836:
+	str	r3, [sp, #4]
+	mov	r2, r8
+	ldr	r3, .L844+32
+	mov	r0, r7
+	add	r1, r3, r4, lsl #3
 	bl	FlashMemCmp8
-	ldr	r3, [sp]
-	cbnz	r0, .L823
-	ldrh	r2, [r5, #14]
-	ldrb	r1, [r4]	@ zero_extendqisi2
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L834
+	ldrh	r2, [r6, #14]
+	ldrb	r1, [r5]	@ zero_extendqisi2
 	and	r0, r2, #65280
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	ldrb	r2, [r6, #13]	@ zero_extendqisi2
 	mul	r2, fp, r2
 	muls	r2, r0, r2
-	str	r2, [r7, r1, lsl #2]
-	ldrb	r0, [r5, #23]	@ zero_extendqisi2
-	cbz	r0, .L824
+	str	r2, [r10, r1, lsl #2]
+	ldrb	r0, [r6, #23]	@ zero_extendqisi2
+	cbz	r0, .L835
 	lsls	r2, r2, #1
-	str	r2, [r7, r1, lsl #2]
-.L824:
-	adds	r2, r1, #1
-	strb	r6, [r3, r1]
-	strb	r2, [r4]
-.L823:
-	adds	r6, r6, #1
-	cmp	r6, #4
-	bne	.L825
-	b	.L826
+	str	r2, [r10, r1, lsl #2]
 .L835:
-	.align	2
+	adds	r2, r1, #1
+	strb	r4, [r3, r1]
+	strb	r2, [r5]
 .L834:
-	.word	.LANCHOR121
-	.word	.LANCHOR25
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L836
+	b	.L837
+.L845:
+	.align	2
+.L844:
 	.word	.LANCHOR31
-	.word	.LANCHOR3
+	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR122
+	.word	.LANCHOR3
 	.word	.LANCHOR22
+	.word	.LANCHOR121
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
@@ -5747,10 +5875,10 @@ ReadFlashInfo:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L839
+	ldr	r3, .L849
 	movs	r2, #0
 	ldr	r1, [r3]
-	ldr	r3, .L839+4
+	ldr	r3, .L849+4
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	smulbb	r3, r3, r0
@@ -5758,10 +5886,10 @@ ReadFlashInfo:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L839+8
+	ldr	r3, .L849+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L839+12
+	ldr	r3, .L849+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -5775,32 +5903,32 @@ ReadFlashInfo:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L839+16
+	ldr	r0, .L849+16
 	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L839+20
+	ldr	r3, .L849+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L837:
+.L847:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L838
+	bhi	.L848
 	pop	{r4, r5, r6, pc}
-.L838:
+.L848:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L837
-.L840:
+	b	.L847
+.L850:
 	.align	2
-.L839:
+.L849:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
 	.word	.LANCHOR33
-	.word	.LANCHOR69
+	.word	.LANCHOR68
 	.word	.LANCHOR26
 	.word	.LANCHOR25
 	.size	ReadFlashInfo, .-ReadFlashInfo
@@ -5815,35 +5943,35 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L847
+	ldr	r3, .L857
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L847+4
+	ldr	r7, .L857+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L847+20
+	ldr	r8, .L857+20
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L844:
+.L854:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L841
+	beq	.L851
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L843
+	bhi	.L853
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L847+8
+	ldr	r0, .L857+8
 	bl	printf
-	ldr	r1, .L847+12
-	ldr	r0, .L847+16
+	ldr	r1, .L857+12
+	ldr	r0, .L857+16
 	bl	printf
-.L843:
+.L853:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -5853,12 +5981,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L844
-.L841:
+	bne	.L854
+.L851:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L848:
+.L858:
 	.align	2
-.L847:
+.L857:
 	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LC5
@@ -5878,7 +6006,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L850
+	ldr	r0, .L860
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -5887,10 +6015,10 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L851:
+.L861:
 	.align	2
-.L850:
-	.word	.LANCHOR75
+.L860:
+	.word	.LANCHOR74
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -5903,7 +6031,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L853
+	ldr	r3, .L863
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -5916,10 +6044,10 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L854:
+.L864:
 	.align	2
-.L853:
-	.word	.LANCHOR76
+.L863:
+	.word	.LANCHOR75
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -5943,12 +6071,12 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L856:
+.L866:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L860
-	ldr	r3, .L875
+	bhi	.L870
+	ldr	r3, .L885
 	movs	r6, #0
 	mov	r10, r6
 	ldrh	r2, [r3]
@@ -5956,59 +6084,59 @@ ftl_free_no_use_map_blk:
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	mov	r2, r6
 	ldrh	fp, [r5]
-.L861:
+.L871:
 	ldrh	r3, [r4, #10]
 	uxth	ip, r6
 	cmp	r3, ip
-	bhi	.L865
+	bhi	.L875
 	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L860:
+.L870:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L857:
+.L867:
 	ldrh	ip, [r4, #10]
 	uxth	r0, r2
 	cmp	ip, r0
-	bhi	.L859
+	bhi	.L869
 	adds	r3, r3, #1
-	b	.L856
-.L859:
+	b	.L866
+.L869:
 	uxth	r0, r2
 	ldrh	ip, [r7, r0, lsl #1]
 	cmp	ip, r1
-	bne	.L858
-	cbz	r1, .L858
+	bne	.L868
+	cbz	r1, .L868
 	ldrh	ip, [r5, r0, lsl #1]
 	add	ip, ip, #1
 	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L858:
+.L868:
 	adds	r2, r2, #1
-	b	.L857
-.L865:
+	b	.L867
+.L875:
 	uxth	r1, r6
 	ldrh	r3, [r5, r1, lsl #1]
 	lsl	r8, r1, #1
 	cmp	fp, r3
-	bls	.L862
+	bls	.L872
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
-	cbnz	r0, .L863
-.L864:
+	cbnz	r0, .L873
+.L874:
 	adds	r6, r6, #1
-	b	.L861
-.L862:
+	b	.L871
+.L872:
 	cmp	r3, #0
-	bne	.L864
+	bne	.L874
 	ldrh	r0, [r7, r1, lsl #1]
 	add	r8, r8, r7
 	cmp	r0, #0
-	beq	.L864
-.L866:
+	beq	.L874
+.L876:
 	movs	r1, #1
 	str	r2, [sp, #4]
 	bl	FtlFreeSysBlkQueueIn
@@ -6017,17 +6145,17 @@ ftl_free_no_use_map_blk:
 	ldrh	r3, [r4, #8]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L864
-.L863:
+	b	.L874
+.L873:
 	mov	r10, ip
 	mov	fp, r3
 	cmp	r3, #0
-	beq	.L866
-	b	.L864
-.L876:
+	beq	.L876
+	b	.L874
+.L886:
 	.align	2
-.L875:
-	.word	.LANCHOR54
+.L885:
+	.word	.LANCHOR53
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -6042,14 +6170,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L880
-	ldr	r4, .L880+4
+	ldr	r5, .L890
+	ldr	r4, .L890+4
 	ldr	r2, [r5]
-	ldr	r7, .L880+8
-	ldr	r6, .L880+12
+	ldr	r7, .L890+8
+	ldr	r6, .L890+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L880+44
+	ldr	r8, .L890+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -6057,7 +6185,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L880+16
+	ldr	r3, .L890+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -6068,55 +6196,55 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L878:
+.L888:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L879
-	ldr	r3, .L880+20
+	bne	.L889
+	ldr	r3, .L890+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L880+24
+	ldr	r2, .L890+24
 	strh	r0, [r3]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L880+28
+	ldr	r2, .L890+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L880+32
+	ldr	r2, .L890+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L880+36
+	ldr	r2, .L890+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L880+40
+	ldr	r2, .L890+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L879:
+.L889:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L878
-.L881:
+	b	.L888
+.L891:
 	.align	2
-.L880:
-	.word	.LANCHOR65
+.L890:
+	.word	.LANCHOR64
 	.word	.LANCHOR125
-	.word	.LANCHOR58
-	.word	.LANCHOR68
-	.word	.LANCHOR97
+	.word	.LANCHOR57
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.word	.LANCHOR127
 	.word	.LANCHOR128
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.word	.LANCHOR129
 	.word	.LANCHOR130
 	.word	.LANCHOR131
@@ -6135,57 +6263,57 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L883
+	ldr	r3, .L893
 	movw	r2, #65535
 	mov	r1, r4
-	ldr	r5, .L883+4
+	ldr	r5, .L893+4
 	str	r4, [r3]
-	ldr	r3, .L883+8
+	ldr	r3, .L893+8
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L883+12
+	ldr	r3, .L893+12
 	str	r4, [r3]
-	ldr	r3, .L883+16
+	ldr	r3, .L893+16
 	str	r4, [r3]
-	ldr	r3, .L883+20
+	ldr	r3, .L893+20
 	str	r2, [r3]
-	ldr	r3, .L883+24
+	ldr	r3, .L893+24
 	str	r4, [r3]
-	ldr	r3, .L883+28
+	ldr	r3, .L893+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L883+32
+	ldr	r3, .L893+32
 	ldrh	r2, [r3]
-	ldr	r3, .L883+36
+	ldr	r3, .L893+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L883+40
+	ldr	r3, .L893+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L883+44
+	ldr	r3, .L893+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L883+48
+	ldr	r0, .L893+48
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L883+52
+	ldr	r0, .L893+52
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L884:
+.L894:
 	.align	2
-.L883:
+.L893:
 	.word	.LANCHOR132
 	.word	.LANCHOR41
 	.word	.LANCHOR133
@@ -6193,12 +6321,12 @@ FtlVariablesInit:
 	.word	.LANCHOR135
 	.word	.LANCHOR136
 	.word	.LANCHOR28
+	.word	.LANCHOR70
+	.word	.LANCHOR61
 	.word	.LANCHOR71
-	.word	.LANCHOR62
-	.word	.LANCHOR72
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR137
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	.LANCHOR138
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
@@ -6212,11 +6340,11 @@ FtlVariablesInit:
 SupperBlkListInit:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L896
+	ldr	r3, .L906
 	movs	r2, #6
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r6, .L896+4
+	ldr	r6, .L906+4
 	sub	sp, sp, #24
 	movs	r4, #0
 	ldrh	r3, [r3]
@@ -6226,39 +6354,39 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L896+8
-	ldr	r2, .L896+12
-	ldr	r1, .L896+16
+	ldr	r3, .L906+8
+	ldr	r2, .L906+12
+	ldr	r1, .L906+16
 	str	r4, [r3]
-	ldr	r3, .L896+20
+	ldr	r3, .L906+20
 	strh	r4, [r2]	@ movhi
 	strh	r4, [r1]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L896+24
+	ldr	r3, .L906+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L896+28
+	ldr	r3, .L906+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L886:
-	ldr	r3, .L896+32
+.L896:
+	ldr	r3, .L906+32
 	sxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L893
-	ldr	r3, .L896+36
+	bge	.L903
+	ldr	r3, .L906+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
 	ldrh	r2, [r3]
-	ldr	r3, .L896+40
+	ldr	r3, .L906+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L894
-.L888:
+	b	.L904
+.L898:
 	str	r3, [sp, #20]
-	ldr	r3, .L896+44
+	ldr	r3, .L906+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
@@ -6266,101 +6394,101 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L887
+	cbnz	r0, .L897
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
 	sxth	r6, r6
-.L887:
+.L897:
 	adds	r3, r3, #1
-.L894:
+.L904:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L888
+	blt	.L898
 	lsls	r3, r7, #1
-	cbz	r6, .L889
+	cbz	r6, .L899
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L890:
+.L900:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L896+48
+	ldr	r3, .L906+48
 	strh	r6, [r2, #4]	@ movhi
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L891
-	ldr	r3, .L896+52
+	beq	.L901
+	ldr	r3, .L906+52
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L891
-	ldr	r3, .L896+56
+	beq	.L901
+	ldr	r3, .L906+56
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L891
-	ldr	r3, .L896+60
+	beq	.L901
+	ldr	r3, .L906+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L892
+	cbnz	r3, .L902
 	add	r8, r8, #1
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L891:
+.L901:
 	adds	r4, r4, #1
-	b	.L886
-.L889:
-	ldr	r2, .L896+60
+	b	.L896
+.L899:
+	ldr	r2, .L906+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L890
-.L892:
+	b	.L900
+.L902:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L891
-.L893:
+	b	.L901
+.L903:
 	ldr	r2, [sp, #8]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r3, r5
-	bge	.L895
-	ldr	r1, .L896+64
-	movw	r2, #2614
-	ldr	r0, .L896+68
+	bge	.L905
+	ldr	r1, .L906+64
+	movw	r2, #2645
+	ldr	r0, .L906+68
 	bl	printf
-	ldr	r1, .L896+72
-	ldr	r0, .L896+76
+	ldr	r1, .L906+72
+	ldr	r0, .L906+76
 	bl	printf
-.L895:
+.L905:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L897:
+.L907:
 	.align	2
-.L896:
+.L906:
 	.word	.LANCHOR41
+	.word	.LANCHOR81
+	.word	.LANCHOR87
+	.word	.LANCHOR85
+	.word	.LANCHOR139
 	.word	.LANCHOR82
+	.word	.LANCHOR84
 	.word	.LANCHOR88
-	.word	.LANCHOR86
-	.word	.LANCHOR139
-	.word	.LANCHOR83
-	.word	.LANCHOR85
-	.word	.LANCHOR89
 	.word	.LANCHOR40
 	.word	.LANCHOR38
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR47
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LANCHOR140
 	.word	.LC5
 	.word	.LC6
@@ -6377,16 +6505,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L899
+	ldr	r2, .L909
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L899+4
+	ldr	r4, .L909+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L899+8
+	ldr	r2, .L909+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L899+12
+	ldr	r3, .L909+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -6394,19 +6522,19 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L899+16
+	ldr	r3, .L909+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L900:
+.L910:
 	.align	2
-.L899:
+.L909:
+	.word	.LANCHOR109
+	.word	.LANCHOR54
 	.word	.LANCHOR110
-	.word	.LANCHOR55
+	.word	.LANCHOR108
 	.word	.LANCHOR111
-	.word	.LANCHOR109
-	.word	.LANCHOR112
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.idb_init,"ax",%progbits
 	.align	1
@@ -6422,13 +6550,13 @@ idb_init:
 	push	{r3, lr}
 	mov	r2, #262144
 	movs	r1, #0
-	ldr	r0, .L902
+	ldr	r0, .L912
 	bl	ftl_memset
 	movs	r0, #0
 	pop	{r3, pc}
-.L903:
+.L913:
 	.align	2
-.L902:
+.L912:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -6458,13 +6586,13 @@ FlashReadIdbData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	mov	r2, #2048
-	ldr	r1, .L906
+	ldr	r1, .L916
 	bl	ftl_memcpy
 	movs	r0, #0
 	pop	{r3, pc}
-.L907:
+.L917:
 	.align	2
-.L906:
+.L916:
 	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
@@ -6480,58 +6608,61 @@ FlashLoadPhyInfoInRam:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #0
-	ldr	r7, .L916
-	ldr	r5, .L916+4
-.L911:
+	ldr	r7, .L926
+	ldr	r5, .L926+4
+.L921:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
 	mov	r4, r0
-	cbnz	r0, .L909
-	ldr	r5, .L916+8
+	cbnz	r0, .L919
+	ldr	r5, .L926+8
 	mov	r3, r4
-	ldr	r2, .L916+12
+	ldr	r2, .L926+12
 	add	r5, r5, r8
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L910:
+.L920:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L913
+	beq	.L923
 	adds	r3, r3, #1
 	cmp	r3, #4
-	bne	.L910
-.L913:
+	bne	.L920
+.L923:
+	ldr	r6, .L926+16
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L916+16
+	ldr	r0, .L926+20
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L916+20
+	mov	r0, r6
 	bl	ftl_memcpy
-	b	.L908
-.L909:
+	ldrh	r0, [r6, #10]
+	bl	FlashBlockAlignInit
+	b	.L918
+.L919:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
-	cmp	r6, #77
-	bne	.L911
+	cmp	r6, #81
+	bne	.L921
 	mov	r4, #-1
-.L908:
+.L918:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L917:
+.L927:
 	.align	2
-.L916:
+.L926:
 	.word	.LANCHOR142+1
 	.word	.LANCHOR22
 	.word	.LANCHOR142
 	.word	.LANCHOR143
-	.word	.LANCHOR7
 	.word	.LANCHOR31
+	.word	.LANCHOR7
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -6546,15 +6677,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L919:
+.L929:
 	cmp	r3, r2
-	bne	.L920
+	bne	.L930
 	pop	{r4, pc}
-.L920:
+.L930:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L919
+	b	.L929
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6574,15 +6705,15 @@ NandcCopy1KB:
 	add	r6, r0, #512
 	add	r0, r2, r4, lsl #9
 	ldr	r5, [sp, #16]
-	bne	.L922
-	cbz	r3, .L923
+	bne	.L932
+	cbz	r3, .L933
 	lsls	r1, r3, #30
-	bne	.L924
+	bne	.L934
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L923:
-	cbz	r5, .L921
+.L933:
+	cbz	r5, .L931
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsrs	r4, r4, #1
 	ldrb	r3, [r5]	@ zero_extendqisi2
@@ -6595,21 +6726,21 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L924:
+.L934:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L923
-.L922:
-	cbz	r3, .L927
+	b	.L933
+.L932:
+	cbz	r3, .L937
 	lsls	r2, r3, #30
-	bne	.L928
+	bne	.L938
 	mov	r1, r0
 	mov	r2, #256
 	mov	r0, r3
 	bl	ftl_memcpy32
-.L927:
-	cbz	r5, .L921
+.L937:
+	cbz	r5, .L931
 	lsrs	r4, r4, #1
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
@@ -6621,14 +6752,14 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L921:
+.L931:
 	pop	{r4, r5, r6, pc}
-.L928:
+.L938:
 	mov	r1, r0
 	mov	r2, #1024
 	mov	r0, r3
 	bl	ftl_memcpy
-	b	.L927
+	b	.L937
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6643,7 +6774,7 @@ NandcXferData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L975
+	ldr	r3, .L985
 	sub	sp, sp, #96
 	mov	r6, r0
 	mov	r10, r2
@@ -6651,14 +6782,14 @@ NandcXferData:
 	ldr	r5, [r3, r0, lsl #3]
 	lsls	r3, r7, #26
 	ldr	r4, [sp, #128]
-	bne	.L940
-	cbnz	r4, .L941
+	bne	.L950
+	cbnz	r4, .L951
 	add	r4, sp, #32
 	movs	r2, #64
 	movs	r1, #255
 	add	r0, sp, #32
 	bl	ftl_memset
-.L941:
+.L951:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6670,10 +6801,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L965
-	ldr	r2, .L975+4
+	bne	.L975
+	ldr	r2, .L985+4
 	lsr	r0, r10, #1
-	ldr	ip, .L975+12
+	ldr	ip, .L985+12
 	ldr	r3, [r2]
 	cmp	r3, #25
 	ldr	r3, [sp, #12]
@@ -6681,31 +6812,31 @@ NandcXferData:
 	movcc	r7, #64
 	movcs	r7, #128
 	mov	r1, r3
-.L944:
+.L954:
 	cmp	r1, r0
 	add	r4, r4, #4
 	add	r6, r7, r3
-	bcc	.L945
-	ldr	r3, .L975+8
+	bcc	.L955
+	ldr	r3, .L985+8
 	lsr	r4, r10, #2
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L946:
+.L956:
 	cmp	r2, r4
-	bcs	.L942
-	cbnz	r0, .L952
-.L942:
+	bcs	.L952
+	cbnz	r0, .L962
+.L952:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L953:
-	ldr	r3, .L975+8
+.L963:
+	ldr	r3, .L985+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L939
+	bls	.L949
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L939
+	cbnz	r3, .L949
 	ldr	r3, [r5]
 	and	r2, r3, #139264
 	cmp	r2, #139264
@@ -6713,12 +6844,12 @@ NandcXferData:
 	moveq	r8, #-1
 	orreq	r3, r3, #131072
 	streq	r3, [r5]
-.L939:
+.L949:
 	mov	r0, r8
 	add	sp, sp, #96
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L945:
+.L955:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
 	adds	r1, r1, #1
@@ -6731,20 +6862,20 @@ NandcXferData:
 	strb	lr, [r4, #-2]
 	strb	r3, [r4, #-1]
 	mov	r3, r6
-	b	.L944
-.L952:
+	b	.L954
+.L962:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L968
+	bmi	.L978
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L968
+	bne	.L978
 	cmp	r1, #5
-	bls	.L948
+	bls	.L958
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6765,18 +6896,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L974:
+.L984:
 	orr	r3, r3, r6, lsl #5
-.L950:
+.L960:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L947:
+.L957:
 	adds	r2, r2, #1
-	b	.L946
-.L948:
+	b	.L956
+.L958:
 	cmp	r1, #3
-	bls	.L950
+	bls	.L960
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6797,33 +6928,33 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L974
-.L968:
+	b	.L984
+.L978:
 	mov	r8, #-1
-	b	.L947
-.L965:
+	b	.L957
+.L975:
 	mov	r8, #0
-	b	.L942
-.L940:
+	b	.L952
+.L950:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L954
+	bne	.L964
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L955:
+.L965:
 	cmp	r8, r10
-	bcc	.L957
+	bcc	.L967
 	mov	r8, #0
-	b	.L953
-.L957:
+	b	.L963
+.L967:
 	and	fp, r8, #3
-	cbz	r7, .L970
+	cbz	r7, .L980
 	add	r3, r7, r8, lsl #9
-.L956:
+.L966:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
@@ -6842,11 +6973,11 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L955
-.L970:
+	b	.L965
+.L980:
 	mov	r3, r7
-	b	.L956
-.L954:
+	b	.L966
+.L964:
 	mov	r8, #0
 	movs	r2, #2
 	mov	r3, r8
@@ -6862,16 +6993,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L958:
+.L968:
 	cmp	r4, r10
-	bcs	.L953
+	bcs	.L963
 	mov	r0, r6
 	adds	r4, r4, #2
 	bl	NandcXferComp
 	ldr	r3, [r5, #32]
 	cmp	r10, r4
 	str	r3, [sp, #28]
-	bls	.L959
+	bls	.L969
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6880,10 +7011,10 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L959:
+.L969:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L971
+	bmi	.L981
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
@@ -6892,7 +7023,7 @@ NandcXferData:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L960:
+.L970:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -6909,13 +7040,13 @@ NandcXferData:
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L958
-.L971:
+	b	.L968
+.L981:
 	mov	r8, #-1
-	b	.L960
-.L976:
+	b	.L970
+.L986:
 	.align	2
-.L975:
+.L985:
 	.word	.LANCHOR6
 	.word	.LANCHOR32
 	.word	.LANCHOR34
@@ -6934,21 +7065,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L979
+	ldr	r3, .L989
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L978
-	ldr	r3, .L979+4
-	ldr	r2, .L979+8
+	cbnz	r0, .L988
+	ldr	r3, .L989+4
+	ldr	r2, .L989+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L978:
+.L988:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -6971,9 +7102,9 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L980:
+.L990:
 	.align	2
-.L979:
+.L989:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -6991,7 +7122,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1006
+	ldr	r3, .L1016
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -6999,7 +7130,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L1006+4
+	ldr	r3, .L1016+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -7007,9 +7138,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L995
+	beq	.L1005
 	movs	r0, #1
-	ldr	r4, .L1006+8
+	ldr	r4, .L1016+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -7026,37 +7157,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L984
-.L993:
+	bne	.L994
+.L1003:
 	mov	r6, #-1
-.L981:
+.L991:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L984:
+.L994:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L1006+12
+	ldr	r0, .L1016+12
 	bl	printf
-	ldr	r2, .L1006+16
+	ldr	r2, .L1016+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L986
+	bcs	.L996
 	str	r3, [r2]
-	b	.L981
-.L986:
+	b	.L991
+.L996:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L983:
+.L993:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L991:
+.L1001:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7066,72 +7197,72 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L987
-	cmp	r0, #2
 	bhi	.L997
+	cmp	r0, #2
+	bhi	.L1007
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L997
+	bls	.L1007
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L989:
+.L999:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L990:
-	cbz	r5, .L992
+.L1000:
+	cbz	r5, .L1002
 	mov	r1, r5
-	ldr	r0, .L1006+20
+	ldr	r0, .L1016+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L992:
+.L1002:
 	cmp	r8, #0
-	beq	.L981
+	beq	.L991
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L1006+24
+	ldr	r0, .L1016+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L993
+	beq	.L1003
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L981
-.L995:
+	b	.L991
+.L1005:
 	mov	r6, #1024
-	b	.L983
-.L987:
+	b	.L993
+.L997:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L998
+	bls	.L1008
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L990
+	bhi	.L1000
 	str	r4, [sp, #16]
-.L998:
+.L1008:
 	movs	r4, #0
-	b	.L988
-.L997:
+	b	.L998
+.L1007:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L988:
+.L998:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L991
+	bls	.L1001
 	mov	r3, r5
 	mov	r5, r10
-	b	.L989
-.L1007:
+	b	.L999
+.L1017:
 	.align	2
-.L1006:
+.L1016:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
 	.word	.LANCHOR24
@@ -7159,16 +7290,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L1009
-	ldr	r10, .L1027+20
+	bne	.L1019
+	ldr	r10, .L1037+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L1010
-.L1012:
-	ldr	r3, .L1027
+	bne	.L1020
+.L1022:
+	ldr	r3, .L1037
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1009
-	ldr	r3, .L1027+4
+	cbz	r3, .L1019
+	ldr	r3, .L1037+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7180,16 +7311,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L1013
-	ldr	r3, .L1027+8
+	beq	.L1023
+	ldr	r3, .L1037+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1009
-.L1013:
+	bls	.L1019
+.L1023:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L1009
-.L1010:
+	b	.L1019
+.L1020:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7199,15 +7330,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L1012
+	beq	.L1022
 	mov	r4, r0
-.L1009:
-	ldr	r10, .L1027+24
+.L1019:
+	ldr	r10, .L1037+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L1008
+	beq	.L1018
 	adds	r2, r4, #1
-	bne	.L1008
+	bne	.L1018
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7217,13 +7348,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1027+12
+	ldr	r0, .L1037+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L1008
-	ldr	r3, .L1027+16
+	bne	.L1018
+	ldr	r3, .L1037+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1008
+	cbz	r3, .L1018
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7235,19 +7366,19 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1008:
+.L1018:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1028:
+.L1038:
 	.align	2
-.L1027:
+.L1037:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
 	.word	.LC12
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR5
 	.word	.LANCHOR145
 	.size	FlashReadPage, .-FlashReadPage
@@ -7264,7 +7395,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1040
+	ldr	r4, .L1050
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7282,33 +7413,33 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1040+4
+	ldr	r5, .L1050+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1030
+	beq	.L1040
 	cmp	r8, #-1
-	bne	.L1031
-.L1030:
+	bne	.L1041
+.L1040:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1031
+	bpl	.L1041
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1039:
+.L1049:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1031:
-	movs	r3, #1
-	b	.L1039
 .L1041:
+	movs	r3, #1
+	b	.L1049
+.L1051:
 	.align	2
-.L1040:
+.L1050:
 	.word	.LANCHOR24
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -7326,7 +7457,7 @@ FlashLoadPhyInfo:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1057+8
+	ldr	fp, .L1066+32
 	movs	r4, #0
 	movs	r7, #4
 	strb	r3, [sp, #20]
@@ -7335,25 +7466,25 @@ FlashLoadPhyInfo:
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	ldr	r1, .L1057
-	mov	r0, r4
 	strb	r3, [sp, #23]
+	mov	r0, r4
+	ldr	r3, [fp]
 	mov	r6, #-1
-	ldrh	r3, [fp, #10]
-	ldr	r8, .L1057+36
-	ldr	r5, .L1057+4
+	ldr	r8, .L1066+36
+	ldr	r10, .L1066+40
 	str	r3, [sp, #4]
-	ldr	r3, [r1]
-	str	r4, [r8]
+	ldr	r5, .L1066
+	ldr	r3, [r8]
+	str	r4, [r10]
 	str	r3, [r5]
 	bl	flash_enter_slc_mode
-	mov	r10, r1
-	str	r8, [sp, #12]
-.L1043:
+	str	r10, [sp, #12]
+	mov	r10, r8
+.L1053:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1045:
+.L1055:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -7363,95 +7494,96 @@ FlashLoadPhyInfo:
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1044
+	bne	.L1054
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1044
+	bne	.L1054
 	add	r8, r8, #1
 	cmp	r8, #4
-	bne	.L1045
-.L1046:
+	bne	.L1055
+.L1056:
 	ldr	r3, [sp, #4]
 	subs	r7, r7, #1
 	add	r4, r4, r3
-	bne	.L1043
+	bne	.L1053
 	mov	r0, r7
-	b	.L1056
-.L1047:
+	b	.L1065
+.L1057:
 	movw	r1, #2036
 	add	r0, r8, #12
-	bl	JSHash
+	bl	js_hash
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1053
+	bne	.L1063
+	ldr	r6, .L1066+4
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1057+8
+	mov	r0, r6
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1057+12
+	ldr	r0, .L1066+8
 	adds	r1, r1, #192
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1057+16
+	ldr	r0, .L1066+12
 	adds	r1, r1, #224
 	bl	ftl_memcpy
+	ldrh	r0, [r6, #10]
+	bl	FlashBlockAlignInit
 	ldr	r6, [r5]
 	mov	r0, r4
-	ldr	r3, .L1057+20
-	ldrh	r1, [fp, #10]
+	ldr	r3, .L1066+16
+	ldr	r1, [fp]
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1057+24
-	adds	r2, r0, #1
-	cbz	r0, .L1049
-.L1055:
-	str	r2, [r3]
+	ldr	r3, .L1066+20
+	adds	r0, r0, #1
+	cmp	r0, #1
+	itte	ls
+	movls	r2, #2
+	strls	r2, [r3]
+	strhi	r0, [r3]
 	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldr	r3, .L1057+28
+	ldr	r3, .L1066+24
 	strb	r2, [r3]
-	b	.L1046
-.L1049:
-	movs	r2, #2
-	b	.L1055
-.L1053:
+	b	.L1056
+.L1063:
 	mov	r6, #-1
-	b	.L1046
-.L1044:
+	b	.L1056
+.L1054:
 	ldr	r8, [r5]
-	ldr	r2, .L1057+32
+	ldr	r2, .L1066+28
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1046
+	bne	.L1056
 	cmp	r6, #0
-	bne	.L1047
-	ldrh	r1, [fp, #10]
+	bne	.L1057
+	ldr	r1, [fp]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1057+24
+	ldr	r3, .L1066+20
 	adds	r0, r0, #1
 	str	r0, [r3]
 	mov	r0, r6
-.L1056:
+.L1065:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1058:
+.L1067:
 	.align	2
-.L1057:
-	.word	.LANCHOR147
+.L1066:
 	.word	.LANCHOR146
 	.word	.LANCHOR31
 	.word	.LANCHOR7
@@ -7460,6 +7592,8 @@ FlashLoadPhyInfo:
 	.word	.LANCHOR149
 	.word	.LANCHOR150
 	.word	1312902724
+	.word	.LANCHOR3
+	.word	.LANCHOR147
 	.word	.LANCHOR148
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
 	.section	.text.ToshibaReadRetrial,"ax",%progbits
@@ -7480,8 +7614,8 @@ ToshibaReadRetrial:
 	mov	fp, r3
 	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1086
-	ldr	r2, .L1086+4
+	ldr	r3, .L1095
+	ldr	r2, .L1095+4
 	ldr	r4, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
@@ -7491,83 +7625,83 @@ ToshibaReadRetrial:
 	subs	r3, r3, #67
 	add	r5, r4, r5, lsl #8
 	cmp	r3, #1
-	bls	.L1076
-	ldr	r3, .L1086+8
+	bls	.L1085
+	ldr	r3, .L1095+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1077
+	cbz	r3, .L1086
 	movs	r0, #0
 	bl	NandcSetDdrMode
 	movs	r3, #1
-.L1077:
+.L1086:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1060:
+.L1069:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1062:
-	ldr	r3, .L1086+12
+.L1071:
+	ldr	r3, .L1095+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1071
+	bcc	.L1080
 	ldr	r10, [sp, #4]
-.L1070:
+.L1079:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1072
+	bhi	.L1081
 	bl	SandiskSetRRPara
-.L1073:
+.L1082:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1086+16
+	ldr	r2, .L1095+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1074
+	bcc	.L1083
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1074:
+.L1083:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1059
+	cbz	r3, .L1068
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1059:
+.L1068:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1076:
+.L1085:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1060
-.L1071:
+	b	.L1069
+.L1080:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1063
+	bhi	.L1072
 	bl	SandiskSetRRPara
-.L1064:
+.L1073:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1065
-	ldr	r3, .L1086+12
+	bne	.L1074
+	ldr	r3, .L1095+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7575,14 +7709,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1065:
+.L1074:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1066
+	cbz	r3, .L1075
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7593,10 +7727,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1067:
+.L1076:
 	cmp	r10, #-1
-	beq	.L1068
-	ldr	r2, .L1086+16
+	beq	.L1077
+	ldr	r2, .L1095+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7605,31 +7739,31 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1070
+	bcc	.L1079
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1068:
+.L1077:
 	add	r8, r8, #1
-	b	.L1062
-.L1063:
+	b	.L1071
+.L1072:
 	bl	ToshibaSetRRPara
-	b	.L1064
-.L1066:
+	b	.L1073
+.L1075:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1067
-.L1072:
+	b	.L1076
+.L1081:
 	bl	ToshibaSetRRPara
-	b	.L1073
-.L1087:
+	b	.L1082
+.L1096:
 	.align	2
-.L1086:
+.L1095:
 	.word	.LANCHOR6
-	.word	.LANCHOR10
+	.word	.LANCHOR9
 	.word	.LANCHOR30
 	.word	.LANCHOR151
 	.word	.LANCHOR33
@@ -7652,35 +7786,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1101
+	ldr	r2, .L1110
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1089:
-	ldr	r3, .L1101+4
+.L1098:
+	ldr	r3, .L1110+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1093
-.L1092:
+	bcc	.L1102
+.L1101:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1101+8
+	ldr	r3, .L1110+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1088
+	bcc	.L1097
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1088:
+.L1097:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1093:
+.L1102:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7690,26 +7824,26 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1090
-	ldr	r3, .L1101+8
+	beq	.L1099
+	ldr	r3, .L1110+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1096
+	bcc	.L1105
 	mov	r8, #0
 	mov	r10, r8
-.L1090:
+.L1099:
 	adds	r6, r6, #1
-	b	.L1089
-.L1096:
+	b	.L1098
+.L1105:
 	mov	r4, r0
-	b	.L1092
-.L1102:
+	b	.L1101
+.L1111:
 	.align	2
-.L1101:
+.L1110:
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LANCHOR33
@@ -7727,28 +7861,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1128
+	ldr	r3, .L1137
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1128+4
+	ldr	r3, .L1137+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1104
+	bne	.L1113
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1127:
-.L1105:
+.L1136:
+.L1114:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1115:
+.L1124:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1128+8
+	ldr	r3, .L1137+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7756,12 +7890,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1106:
-	ldr	r3, .L1128+12
+.L1115:
+	ldr	r3, .L1137+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1110
-.L1109:
+	bcc	.L1119
+.L1118:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7776,7 +7910,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1111
+	bcc	.L1120
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7784,26 +7918,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1128+16
+	ldr	r0, .L1137+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1113
-	ldr	r3, .L1128+4
+	bne	.L1122
+	ldr	r3, .L1137+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1103
+	beq	.L1112
 	adds	r2, r4, #1
-	bne	.L1103
+	bne	.L1112
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1115
-.L1104:
-	ldr	r3, .L1128+20
+	b	.L1124
+.L1113:
+	ldr	r3, .L1137+20
 	smull	r2, r3, r2, r3
-	b	.L1127
-.L1110:
+	b	.L1136
+.L1119:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -7828,48 +7962,48 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1107
+	beq	.L1116
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1117
+	bcc	.L1126
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1107:
+.L1116:
 	ldr	r10, [sp, #20]
-	b	.L1106
-.L1117:
+	b	.L1115
+.L1126:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1109
-.L1113:
+	b	.L1118
+.L1122:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1103:
+.L1112:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1111:
+.L1120:
 	cmp	r8, #0
-	beq	.L1103
+	beq	.L1112
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1103
-.L1129:
+	b	.L1112
+.L1138:
 	.align	2
-.L1128:
+.L1137:
 	.word	.LANCHOR33
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LC13
@@ -7887,55 +8021,57 @@ HynixReadRetrial:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r2
-	ldr	r4, .L1147
+	mov	r10, r3
+	ldr	r4, .L1156
 	mov	r8, #0
 	mov	r6, #-1
-	mov	r10, r3
+	mov	fp, r2
 	mov	r7, r0
 	str	r1, [sp, #4]
-	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-	adds	r3, r4, r0
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	str	r2, [sp]
-	ldr	r2, .L1147+4
-	ldr	r2, [r2]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	adds	r2, r4, r0
+	ldrb	r5, [r2, #12]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1156+4
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r3, #7
+	cmp	r3, #1
+	it	ls
+	ldrbls	r5, [r2, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1132:
+.L1141:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1137
-.L1136:
-	ldr	r3, .L1147+4
+	bcc	.L1146
+.L1145:
+	ldr	r3, .L1156+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L1147+8
-	ite	eq
-	strbeq	r5, [r4, #20]
-	strbne	r5, [r4, #12]
+	subs	r3, r3, #7
+	cmp	r3, #1
+	ldr	r3, .L1156+8
+	ite	ls
+	strbls	r5, [r4, #20]
+	strbhi	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1130
+	bcc	.L1139
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1130:
+.L1139:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1137:
+.L1146:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1147+12
+	ldr	r2, .L1156+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -7949,26 +8085,26 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1134
-	ldr	r3, .L1147+8
+	beq	.L1143
+	ldr	r3, .L1156+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1141
+	bcc	.L1150
 	mov	r10, #0
 	mov	fp, r10
-.L1134:
+.L1143:
 	add	r8, r8, #1
-	b	.L1132
-.L1141:
+	b	.L1141
+.L1150:
 	mov	r6, r0
-	b	.L1136
-.L1148:
+	b	.L1145
+.L1157:
 	.align	2
-.L1147:
+.L1156:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR33
@@ -7987,24 +8123,24 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1152
+	ldr	r3, .L1161
 	mov	r5, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1150
-	ldr	r3, .L1152+4
-	ldr	r2, .L1152+8
+	cbnz	r0, .L1159
+	ldr	r3, .L1161+4
+	ldr	r2, .L1161+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1150
-	ldr	r3, .L1152+12
+	bls	.L1159
+	ldr	r3, .L1161+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1151
+	cbnz	r3, .L1160
 	subs	r6, r6, #2
-.L1150:
+.L1159:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -8033,12 +8169,12 @@ FlashProgPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1151:
+.L1160:
 	movs	r6, #4
-	b	.L1150
-.L1153:
+	b	.L1159
+.L1162:
 	.align	2
-.L1152:
+.L1161:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -8056,13 +8192,14 @@ FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1163
-	ldr	r4, .L1163+4
+	ldr	r7, .L1172
+	ldr	r4, .L1172+4
 	ldr	r3, [r7]
-	ldr	r10, .L1163+60
-	ldr	r8, .L1163+64
+	ldr	r10, .L1172+56
+	ldr	fp, .L1172+60
 	str	r3, [r4]
-	ldr	r3, .L1163+8
+	ldr	r3, .L1172+8
+	ldr	r8, .L1172+64
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
 	mov	r2, #2048
@@ -8071,60 +8208,58 @@ FlashSavePhyInfo:
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1163+12
-	ldr	r1, .L1163+16
+	ldr	r3, .L1172+12
+	ldr	r1, .L1172+16
 	str	r10, [r0]
 	adds	r0, r0, #16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1163+20
+	ldr	r3, .L1172+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1163+24
+	ldr	r3, .L1172+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1163+28
+	ldr	r1, .L1172+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1163+32
+	ldr	r1, .L1172+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1163+36
+	ldr	r1, .L1172+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1163+40
+	ldr	r1, .L1172+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1163+44
+	ldr	r1, .L1172+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
-	bl	JSHash
-	ldr	r1, .L1163+48
+	bl	js_hash
 	mov	r3, #1592
-	str	r3, [r5, #4]
 	str	r0, [r5, #8]
-	movs	r0, #0
-	ldr	r3, [r1]
+	str	r3, [r5, #4]
 	movs	r5, #0
+	ldr	r3, [fp]
 	mov	r6, r5
+	movs	r0, #0
 	str	r3, [r4]
 	bl	flash_enter_slc_mode
-	mov	fp, r1
-.L1157:
+.L1166:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
@@ -8151,35 +8286,35 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1155
+	beq	.L1164
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1155
+	bne	.L1164
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
 	str	r3, [sp]
-	bl	JSHash
+	bl	js_hash
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1155
-	ldr	r3, .L1163+52
+	bne	.L1164
+	ldr	r3, .L1172+48
 	cmp	r5, #1
 	str	r2, [r3]
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1163+56
+	ldr	r3, .L1172+52
 	str	r6, [r3]
-	beq	.L1158
+	beq	.L1167
 	movs	r5, #1
-.L1155:
+.L1164:
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1157
-.L1156:
+	bne	.L1166
+.L1165:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	clz	r0, r5
@@ -8188,12 +8323,12 @@ FlashSavePhyInfo:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1158:
+.L1167:
 	movs	r5, #2
-	b	.L1156
-.L1164:
+	b	.L1165
+.L1173:
 	.align	2
-.L1163:
+.L1172:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR152
@@ -8206,10 +8341,10 @@ FlashSavePhyInfo:
 	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR153
 	.word	.LANCHOR149
 	.word	.LANCHOR148
 	.word	1312902724
+	.word	.LANCHOR153
 	.word	.LANCHOR3
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
@@ -8221,64 +8356,58 @@ FlashSavePhyInfo:
 	.fpu softvfp
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
-	sub	sp, sp, #24
-	ldr	r2, .L1177
-	mov	r10, r0
-	strb	r3, [sp, #20]
+	strb	r3, [sp, #12]
 	movs	r3, #40
-	strb	r3, [sp, #21]
+	mov	r10, r0
+	strb	r3, [sp, #13]
 	movs	r3, #24
-	strb	r3, [sp, #22]
+	strb	r3, [sp, #14]
 	movs	r3, #16
-	strb	r3, [sp, #23]
-	ldr	r3, .L1177+4
-	ldr	r1, [r2]
-	str	r2, [sp, #8]
+	strb	r3, [sp, #15]
+	ldr	r3, .L1192
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1192+4
+	ldr	r2, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L1177+8
-	cmp	r1, r3
-	str	r3, [sp, #12]
-	bne	.L1166
+	cbz	r2, .L1175
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L1166:
+.L1175:
 	mov	r7, #-1
 	movs	r4, #2
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1167:
-	ldr	r3, .L1177+12
+.L1176:
+	ldr	r3, .L1192+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1172
-.L1171:
-	ldr	r0, [sp, #4]
+	bcc	.L1181
+.L1180:
+	ldr	r0, [sp]
 	bl	FlashBchSel
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
-	cmp	r3, r2
-	bne	.L1165
+	cbz	r3, .L1174
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1165:
+.L1174:
 	mov	r0, r7
-	add	sp, sp, #24
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1172:
-	ldr	r5, .L1177+16
+.L1181:
+	ldr	r5, .L1192+12
 	movs	r6, #0
-	ldr	fp, .L1177+32
-.L1169:
-	add	r3, sp, #20
+	ldr	fp, .L1192+28
+.L1178:
+	add	r3, sp, #12
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
 	bl	FlashBchSel
@@ -8289,47 +8418,46 @@ FlashReadIdbDataRaw:
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1168
+	bne	.L1177
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1169
-.L1170:
+	bne	.L1178
+.L1179:
 	adds	r4, r4, #1
-	b	.L1167
-.L1175:
+	b	.L1176
+.L1184:
 	movs	r7, #0
-	b	.L1171
-.L1168:
+	b	.L1180
+.L1177:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1177+20
+	ldr	r3, .L1192+16
 	cmp	r2, r3
-	bne	.L1170
+	bne	.L1179
 	mov	r1, r8
-	ldr	r0, .L1177+24
+	ldr	r0, .L1192+20
 	bl	printf
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
 	ldr	r3, [r5]
-	ldr	r2, .L1177+12
+	ldr	r2, .L1192+8
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1177+28
+	ldr	r3, .L1192+24
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1175
+	bcs	.L1184
 	str	r4, [r3]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-	b	.L1170
-.L1178:
+	b	.L1179
+.L1193:
 	.align	2
-.L1177:
-	.word	.LANCHOR29
+.L1192:
 	.word	.LANCHOR33
-	.word	1446522928
+	.word	.LANCHOR29
 	.word	.LANCHOR2
 	.word	.LANCHOR147
 	.word	-52655045
@@ -8348,70 +8476,71 @@ FlashReadIdbDataRaw:
 FlashPageProgMsbFFData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r3, .L1210
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	mov	r8, r1
 	mov	r4, r2
-	ldr	r5, .L1189
-	mov	r6, r0
-	mov	r7, r1
-	ldr	r3, [r5]
-	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1189+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1180
-	ldr	r3, .L1189+8
-	ldr	r1, [r3]
-	ldr	r3, .L1189+12
-	cmp	r1, r3
-	beq	.L1179
-.L1180:
-	subs	r3, r2, #5
+	cbz	r3, .L1195
+	ldr	r3, .L1210+4
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1194
+.L1195:
+	ldr	r5, .L1210+8
+	ldr	r3, [r5]
+	ldrb	r6, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r6, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1181
-	ldr	r2, .L1189+16
+	bhi	.L1196
+	ldr	r2, .L1210+12
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1183
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1184:
-	ldrh	r2, [r10, r4, lsl #1]
+	bmi	.L1198
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1201:
+	ldrh	r2, [fp, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1179
+	bne	.L1194
+	cmp	r6, #8
 	mov	r2, #32768
-	movs	r1, #255
-	ldr	r0, [r8]
+	ite	eq
+	moveq	r1, #0
+	movne	r1, #255
+	ldr	r0, [r10]
 	bl	ftl_memset
-	adds	r1, r4, r7
+	ldr	r3, [r10]
+	add	r1, r4, r8
 	adds	r4, r4, #1
+	mov	r0, r7
 	uxth	r4, r4
-	movs	r3, #0
-	ldr	r2, [r8]
-	mov	r0, r6
+	mov	r2, r3
 	bl	FlashProgPage
-.L1185:
+.L1202:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1184
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1181:
-	cmp	r2, #68
-	bne	.L1179
-.L1183:
-	ldr	r10, .L1189+20
-	ldr	r8, .L1189+24
-	b	.L1185
-.L1179:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1190:
+	bhi	.L1201
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1196:
+	cmp	r6, #68
+	bne	.L1194
+.L1198:
+	ldr	fp, .L1210+16
+	ldr	r10, .L1210+20
+	b	.L1202
+.L1194:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1211:
 	.align	2
-.L1189:
-	.word	.LANCHOR18
-	.word	.LANCHOR8
+.L1210:
+	.word	.LANCHOR15
 	.word	.LANCHOR29
-	.word	1446522928
-	.word	1073758215
+	.word	.LANCHOR18
+	.word	1073758223
 	.word	.LANCHOR120
 	.word	.LANCHOR153
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
@@ -8432,45 +8561,45 @@ idb_write_data:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r2, #63
 	sub	sp, sp, #104
-	bls	.L1192
+	bls	.L1213
 	cmp	r0, #576
-	bcs	.L1193
-	ldr	r2, .L1244
+	bcs	.L1214
+	ldr	r2, .L1265
 	cmp	r0, #64
 	mov	r4, #1
 	str	r4, [r2]
-	bhi	.L1194
+	bhi	.L1215
 	rsb	r0, r0, #64
 	subs	r2, r3, r0
 	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1244+4
+	ldr	r0, .L1265+4
 	lsls	r2, r2, #9
-.L1243:
+.L1264:
 	bl	ftl_memcpy
-.L1232:
+.L1253:
 	movs	r0, #0
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1194:
+.L1215:
 	rsb	r2, r0, #576
 	subs	r0, r0, #64
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1244+4
+	ldr	r3, .L1265+4
 	lsls	r2, r2, #9
 	add	r0, r3, r0, lsl #9
-	b	.L1243
-.L1192:
+	b	.L1264
+.L1213:
 	cmp	r0, #576
-	bcc	.L1232
-.L1193:
-	ldr	r3, .L1244
+	bcc	.L1253
+.L1214:
+	ldr	r3, .L1265
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1232
-	ldr	r3, .L1244+8
+	beq	.L1253
+	ldr	r3, .L1265+8
 	ldr	r2, [r3]
 	ldrb	r3, [r2, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2, #10]
@@ -8480,14 +8609,14 @@ idb_write_data:
 	addw	r0, r3, #511
 	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1244+4
+	ldr	r1, .L1265+4
 	movs	r3, #0
 	str	r0, [sp, #20]
 	movw	r2, #65535
 	mov	r0, r1
-.L1198:
+.L1219:
 	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1196
+	cbnz	r4, .L1217
 	ldr	r4, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -8496,13 +8625,13 @@ idb_write_data:
 	str	r4, [r1, r2, lsl #2]
 	subs	r2, r2, #1
 	cmp	r2, #4096
-	bne	.L1198
-.L1196:
+	bne	.L1219
+.L1217:
 	ldr	r1, [r0, r2, lsl #2]
 	mov	r3, #512
-	ldr	r0, .L1244+12
+	ldr	r0, .L1265+12
 	bl	printf
-	ldr	r3, .L1244+16
+	ldr	r3, .L1265+16
 	ldr	r2, [sp, #8]
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
@@ -8513,35 +8642,35 @@ idb_write_data:
 	mul	r4, r3, r2
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1199:
+.L1220:
 	ldr	r3, [sp, #16]
 	cmp	r3, #15
-	bls	.L1216
+	bls	.L1237
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1218
+	cbnz	r3, .L1239
 	mov	r1, r3
-	ldr	r0, .L1244+20
+	ldr	r0, .L1265+20
 	bl	printf
-.L1218:
-	ldr	r3, .L1244
+.L1239:
+	ldr	r3, .L1265
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1232
-.L1245:
+	b	.L1253
+.L1266:
 	.align	2
-.L1244:
+.L1265:
 	.word	.LANCHOR154
 	.word	idb_buf
 	.word	.LANCHOR18
 	.word	.LC15
 	.word	.LANCHOR149
 	.word	.LC17
-.L1216:
+.L1237:
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1246
+	ldr	r0, .L1267
 	bl	memset
-	ldr	r3, .L1246+4
+	ldr	r3, .L1267+4
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
@@ -8550,61 +8679,61 @@ idb_write_data:
 	smulbb	r5, r5, fp
 	uxth	r5, r5
 	cmp	r5, #512
-	bcs	.L1200
+	bcs	.L1221
 	adds	r0, r5, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1200:
-	ldr	r7, .L1246+8
+.L1221:
+	ldr	r7, .L1267+8
 	mov	r1, r5
-	ldr	r10, .L1246+36
+	ldr	r10, .L1267+36
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	mov	r6, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #24]
-.L1204:
+.L1225:
 	lsrs	r2, r6, #2
-	beq	.L1201
-	ldr	r0, .L1246+12
+	beq	.L1222
+	ldr	r0, .L1267+12
 	adds	r1, r2, #1
-	ldr	r3, .L1246+16
+	ldr	r3, .L1267+16
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1202
+	cbz	r0, .L1223
 	ldr	r0, [r10]
-	ldr	r5, .L1246+20
+	ldr	r5, .L1267+20
 	cmp	r0, r5
 	it	eq
 	moveq	r3, r1
-.L1202:
+.L1223:
 	add	r3, r3, #1073741824
 	subs	r3, r3, #1
 	lsls	r3, r3, #2
 	str	r3, [sp, #40]
-.L1201:
+.L1222:
 	movw	r3, #61424
 	str	r3, [sp, #44]
-	ldr	r3, .L1246+16
+	ldr	r3, .L1267+16
 	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1246+12
+	ldr	r3, .L1267+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1203
+	cbz	r3, .L1224
 	ldr	r3, [r10]
-	ldr	r1, .L1246+20
+	ldr	r1, .L1267+20
 	cmp	r3, r1
 	it	eq
 	moveq	r5, r2
-.L1203:
+.L1224:
 	ldr	r3, [sp, #24]
 	adds	r6, r6, #4
-	ldr	r2, .L1246+24
-	ldr	r8, .L1246+4
+	ldr	r2, .L1267+24
+	ldr	r8, .L1267+4
 	mla	r3, r5, fp, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r3, [sp, #32]
 	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1246+28
+	ldr	r2, .L1267+28
 	str	r3, [sp, #28]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8632,12 +8761,12 @@ idb_write_data:
 	mov	r1, r0
 	movs	r0, #0
 	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1246+32
+	ldr	r3, .L1267+32
 	cmp	r7, r3
-	bne	.L1204
+	bne	.L1225
 	ldr	r3, [r8]
 	mov	r0, r4
-	ldr	r7, .L1246
+	ldr	r7, .L1267
 	movs	r6, #0
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #10]
@@ -8649,47 +8778,47 @@ idb_write_data:
 	subs	r3, r4, r1
 	str	r3, [sp, #28]
 	ubfx	r5, r5, #2, #2
-.L1205:
+.L1226:
 	cmp	r6, #512
-	bcs	.L1212
-	ldr	r1, .L1246+12
+	bcs	.L1233
+	ldr	r1, .L1267+12
 	rsb	r3, r5, #4
 	uxth	r3, r3
-	ldr	r2, .L1246+16
+	ldr	r2, .L1267+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
 	add	r3, r10, r6
 	lsrs	r3, r3, #2
 	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1206
-	ldr	r1, .L1246+36
-	ldr	r0, .L1246+20
+	cbz	r1, .L1227
+	ldr	r1, .L1267+36
+	ldr	r0, .L1267+20
 	ldr	r1, [r1]
 	cmp	r1, r0
 	it	eq
 	moveq	r2, r3
-.L1206:
+.L1227:
 	ldr	r3, [sp, #28]
 	add	r5, r5, r3
-	ldr	r3, .L1246+24
+	ldr	r3, .L1267+24
 	mla	r5, r2, r8, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #32]
-	ldr	r3, .L1246+4
+	ldr	r3, .L1267+4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1246+40
+	ldr	r3, .L1267+40
 	ldrh	r2, [r3, #26]
-	ldr	r3, .L1246+44
+	ldr	r3, .L1267+44
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	mul	r3, fp, r3
 	cmp	r5, r3
-	bcs	.L1207
-	ldr	r3, .L1246+28
+	bcs	.L1228
+	ldr	r3, .L1267+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.L1207:
+.L1228:
 	movs	r0, #0
 	bl	flash_boot_enter_slc_mode
 	mov	r1, fp
@@ -8703,11 +8832,11 @@ idb_write_data:
 	bl	FlashReadPage
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1208
-	ldr	r3, .L1246+28
+	bne	.L1229
+	ldr	r3, .L1267+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #40
-	beq	.L1208
+	beq	.L1229
 	movs	r0, #40
 	bl	FlashBchSel
 	add	r3, sp, #40
@@ -8716,7 +8845,7 @@ idb_write_data:
 	movs	r0, #0
 	bl	FlashReadPage
 	mov	r5, r0
-.L1208:
+.L1229:
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r0, [sp, #32]
@@ -8725,74 +8854,74 @@ idb_write_data:
 	mov	r5, #-1
 	it	ne
 	movne	r5, #0
-	cbz	r5, .L1209
-.L1212:
-	ldr	r3, .L1246+8
+	cbz	r5, .L1230
+.L1233:
+	ldr	r3, .L1267+8
 	movs	r5, #0
-	ldr	r6, .L1246
-.L1210:
+	ldr	r6, .L1267
+.L1231:
 	mov	r7, r3
 	ldr	r1, [r6, r5, lsl #2]
 	ldr	r2, [r7]
 	adds	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1213
+	beq	.L1234
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1246
+	ldr	r0, .L1267
 	bl	memset
 	str	r5, [sp]
 	mov	r1, r4
 	ldr	r3, [r7]
 	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1246+48
+	ldr	r0, .L1267+48
 	bl	printf
 	mov	r0, r4
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1214
+	bls	.L1235
 	ldr	r3, [sp, #8]
 	adds	r0, r3, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1214:
+.L1235:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
-	b	.L1199
-.L1209:
+	b	.L1220
+.L1230:
 	ldr	r3, [sp, #24]
 	add	r6, r6, r3
 	add	r7, r7, r3, lsl #9
 	uxth	r6, r6
-	b	.L1205
-.L1213:
+	b	.L1226
+.L1234:
 	adds	r5, r5, #1
 	cmp	r5, #65536
-	bne	.L1210
+	bne	.L1231
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #12]
-	bls	.L1214
-	b	.L1218
-.L1247:
+	bls	.L1235
+	b	.L1239
+.L1268:
 	.align	2
-.L1246:
+.L1267:
 	.word	gp_flash_check_buf
 	.word	.LANCHOR18
 	.word	idb_buf
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	1446522928
 	.word	.LANCHOR33
 	.word	.LANCHOR152
 	.word	idb_buf+262144
-	.word	.LANCHOR29
-	.word	.LANCHOR15
+	.word	.LANCHOR119
+	.word	.LANCHOR14
 	.word	.LANCHOR3
 	.word	.LC16
 	.size	idb_write_data, .-idb_write_data
@@ -8822,11 +8951,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1250
+	ldr	r0, .L1271
 	bx	lr
-.L1251:
+.L1272:
 	.align	2
-.L1250:
+.L1271:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -8857,9 +8986,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L1255
+	ldr	r3, .L1276
 	movs	r4, #0
-	ldr	r5, .L1255+4
+	ldr	r5, .L1276+4
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
@@ -8869,8 +8998,8 @@ NandcInit:
 	str	r0, [r3, #16]
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
-	ldr	r3, .L1255+8
-	ldr	r2, .L1255+12
+	ldr	r3, .L1276+8
+	ldr	r2, .L1276+12
 	str	r0, [r3]
 	ldr	r3, [r0]
 	and	r3, r3, #253952
@@ -8879,7 +9008,7 @@ NandcInit:
 	str	r1, [r2]
 	orr	r3, r3, #256
 	ldr	r2, [r0, #352]
-	ldr	r1, .L1255+16
+	ldr	r1, .L1276+16
 	ubfx	r2, r2, #16, #4
 	str	r2, [r1]
 	ldr	r2, [r0, #352]
@@ -8895,25 +9024,25 @@ NandcInit:
 	str	r3, [r0, #4]
 	movw	r3, #8322
 	str	r3, [r0, #344]
-	ldr	r3, .L1255+20
+	ldr	r3, .L1276+20
 	str	r3, [r0, #304]
 	mov	r0, #36864
 	bl	ftl_malloc
-	ldr	r3, .L1255+24
+	ldr	r3, .L1276+24
 	str	r0, [r3]
-	ldr	r3, .L1255+28
+	ldr	r3, .L1276+28
 	str	r0, [r3]
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
 	str	r4, [r3, #24]
-	ldr	r3, .L1255+32
+	ldr	r3, .L1276+32
 	str	r4, [r3]
 	pop	{r3, r4, r5, pc}
-.L1256:
+.L1277:
 	.align	2
-.L1255:
+.L1276:
 	.word	.LANCHOR6
-	.word	.LANCHOR29
+	.word	.LANCHOR119
 	.word	.LANCHOR19
 	.word	.LANCHOR155
 	.word	.LANCHOR34
@@ -8933,114 +9062,114 @@ NandcInit:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1262
+	ldr	r3, .L1283
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L1262+4
+	ldr	r2, .L1283+4
 	movs	r6, #12
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+8
-	ldr	r5, .L1262+12
-	ldr	r10, .L1262+304
+	ldr	r3, .L1283+8
+	ldr	r5, .L1283+12
+	ldr	r10, .L1283+304
 	str	r4, [r3]
-	ldr	r3, .L1262+16
-	ldr	r8, .L1262+308
-	ldr	fp, .L1262+312
+	ldr	r3, .L1283+16
+	ldr	r8, .L1283+308
+	ldr	fp, .L1283+312
 	str	r4, [r3]
-	ldr	r3, .L1262+20
+	ldr	r3, .L1283+20
 	str	r4, [r3]
-	ldr	r3, .L1262+24
+	ldr	r3, .L1283+24
 	str	r4, [r3]
-	ldr	r3, .L1262+28
+	ldr	r3, .L1283+28
 	str	r4, [r3]
-	ldr	r3, .L1262+32
+	ldr	r3, .L1283+32
 	str	r4, [r3]
-	ldr	r3, .L1262+36
+	ldr	r3, .L1283+36
 	str	r4, [r3]
-	ldr	r3, .L1262+40
+	ldr	r3, .L1283+40
 	str	r4, [r3]
-	ldr	r3, .L1262+44
+	ldr	r3, .L1283+44
 	str	r4, [r3]
-	ldr	r3, .L1262+48
+	ldr	r3, .L1283+48
 	str	r4, [r3]
-	ldr	r3, .L1262+52
+	ldr	r3, .L1283+52
 	str	r4, [r3]
-	ldr	r3, .L1262+56
+	ldr	r3, .L1283+56
 	str	r4, [r3]
-	ldr	r3, .L1262+60
+	ldr	r3, .L1283+60
 	str	r4, [r3]
-	ldr	r3, .L1262+64
+	ldr	r3, .L1283+64
 	str	r4, [r3]
-	ldr	r3, .L1262+68
+	ldr	r3, .L1283+68
 	str	r4, [r3]
-	ldr	r3, .L1262+72
+	ldr	r3, .L1283+72
 	str	r4, [r3]
-	ldr	r3, .L1262+76
+	ldr	r3, .L1283+76
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L1262+80
+	ldr	r2, .L1283+80
 	str	r4, [r2]
-	ldr	r2, .L1262+84
+	ldr	r2, .L1283+84
 	str	r4, [r2]
-	ldr	r2, .L1262+88
+	ldr	r2, .L1283+88
 	str	r4, [r2]
-	ldr	r2, .L1262+92
+	ldr	r2, .L1283+92
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1262+96
+	ldr	r2, .L1283+96
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1262+100
+	ldr	r2, .L1283+100
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1262+104
+	ldr	r2, .L1283+104
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L1262+108
+	ldr	r3, .L1283+108
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L1262+112
+	ldr	r3, .L1283+112
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1262+116
+	ldr	r3, .L1283+116
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+120
+	ldr	r3, .L1283+120
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+124
+	ldr	r3, .L1283+124
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1262+128
+	ldr	r3, .L1283+128
 	strh	r4, [r3]	@ movhi
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+132
+	ldr	r3, .L1283+132
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #36
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+136
+	ldr	r3, .L1283+136
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1262+140
+	ldr	r3, .L1283+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+144
+	ldr	r3, .L1283+144
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1262+148
-	ldr	r7, .L1262+152
+	ldr	r3, .L1283+148
+	ldr	r7, .L1283+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+156
+	ldr	r3, .L1283+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+160
+	ldr	r3, .L1283+160
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -9049,157 +9178,157 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L1262+164
+	ldr	r3, .L1283+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+168
+	ldr	r3, .L1283+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+172
+	ldr	r3, .L1283+172
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+176
+	ldr	r3, .L1283+176
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+180
+	ldr	r3, .L1283+180
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+184
+	ldr	r3, .L1283+184
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+188
+	ldr	r3, .L1283+188
 	ldrh	r5, [r10]
-	ldr	r10, .L1262+316
+	ldr	r10, .L1283+316
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1262+192
+	ldr	r3, .L1283+192
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L1262+196
+	ldr	r5, .L1283+196
 	bl	ftl_malloc
-	ldr	r3, .L1262+200
+	ldr	r3, .L1283+200
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L1262+320
+	ldr	r8, .L1283+320
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+204
+	ldr	r3, .L1283+204
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1262+208
+	ldr	r3, .L1283+208
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L1262+212
+	ldr	r0, .L1283+212
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1262+216
+	ldr	r3, .L1283+216
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L1262+220
+	ldr	r3, .L1283+220
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+224
+	ldr	r3, .L1283+224
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1262+228
+	ldr	r3, .L1283+228
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1262+232
-	ldr	r8, .L1262+324
+	ldr	r3, .L1283+232
+	ldr	r8, .L1283+324
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L1262+236
+	ldr	r3, .L1283+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+240
+	ldr	r3, .L1283+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1262+244
+	ldr	r3, .L1283+244
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L1262+328
+	ldr	r8, .L1283+328
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1262+248
+	ldr	r3, .L1283+248
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L1262+252
+	ldr	r3, .L1283+252
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1262+256
+	ldr	r3, .L1283+256
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1262+260
+	ldr	r3, .L1283+260
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1262+264
-	ldr	r4, .L1262+268
+	ldr	r3, .L1283+264
+	ldr	r4, .L1283+268
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1262+272
+	ldr	r3, .L1283+272
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L1262+276
+	ldr	r6, .L1283+276
 	bl	ftl_malloc
-	ldr	r3, .L1262+280
+	ldr	r3, .L1283+280
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+284
+	ldr	r3, .L1283+284
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L1262+288
+	ldr	r5, .L1283+288
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1262+292
+	ldr	r3, .L1283+292
 	str	r0, [r3]
-	ldr	r3, .L1262+296
+	ldr	r3, .L1283+296
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -9210,19 +9339,19 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L1262+300
+	ldr	r3, .L1283+300
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
-	b	.L1263
-.L1264:
+	b	.L1284
+.L1285:
 	.align	2
-.L1262:
+.L1283:
 	.word	.LANCHOR139
 	.word	.LANCHOR173
 	.word	.LANCHOR157
-	.word	.LANCHOR55
+	.word	.LANCHOR54
 	.word	.LANCHOR158
 	.word	.LANCHOR159
 	.word	.LANCHOR160
@@ -9234,102 +9363,102 @@ FtlMemInit:
 	.word	.LANCHOR166
 	.word	.LANCHOR167
 	.word	.LANCHOR168
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR169
 	.word	.LANCHOR170
 	.word	.LANCHOR171
 	.word	.LANCHOR172
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR74
+	.word	.LANCHOR73
+	.word	.LANCHOR112
 	.word	.LANCHOR113
 	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
 	.word	.LANCHOR176
 	.word	.LANCHOR177
 	.word	.LANCHOR178
-	.word	.LANCHOR117
+	.word	.LANCHOR116
 	.word	.LANCHOR179
-	.word	.LANCHOR119
-	.word	.LANCHOR109
-	.word	.LANCHOR112
+	.word	.LANCHOR118
+	.word	.LANCHOR108
+	.word	.LANCHOR111
 	.word	.LANCHOR180
 	.word	.LANCHOR181
 	.word	.LANCHOR182
-	.word	.LANCHOR58
-	.word	.LANCHOR78
-	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR77
+	.word	.LANCHOR106
 	.word	.LANCHOR183
 	.word	.LANCHOR184
 	.word	.LANCHOR185
-	.word	.LANCHOR105
+	.word	.LANCHOR104
 	.word	.LANCHOR186
 	.word	.LANCHOR187
-	.word	.LANCHOR104
+	.word	.LANCHOR103
 	.word	.LANCHOR188
 	.word	.LANCHOR41
 	.word	.LANCHOR189
-	.word	.LANCHOR106
+	.word	.LANCHOR105
 	.word	.LANCHOR137
 	.word	33553920
 	.word	.LANCHOR191
-	.word	.LANCHOR79
-	.word	.LANCHOR84
+	.word	.LANCHOR78
+	.word	.LANCHOR83
 	.word	.LANCHOR129
 	.word	.LANCHOR125
 	.word	.LANCHOR0
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR192
 	.word	.LANCHOR193
 	.word	.LANCHOR194
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.word	.LANCHOR131
 	.word	.LANCHOR195
-	.word	.LANCHOR68
+	.word	.LANCHOR67
 	.word	.LANCHOR130
 	.word	.LANCHOR45
-	.word	.LANCHOR97
+	.word	.LANCHOR96
 	.word	.LANCHOR126
 	.word	.LANCHOR123
-	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	.LANCHOR51
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LANCHOR38
-	.word	.LANCHOR108
-	.word	.LANCHOR59
-	.word	.LANCHOR65
+	.word	.LANCHOR107
+	.word	.LANCHOR58
+	.word	.LANCHOR64
 	.word	.LANCHOR190
+	.word	.LANCHOR61
 	.word	.LANCHOR62
-	.word	.LANCHOR63
-.L1263:
+.L1284:
 	mov	r0, r1
-.L1258:
+.L1279:
 	cmp	r2, r6
-	bcc	.L1259
+	bcc	.L1280
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1265
+	ldr	r2, .L1286
 	movs	r1, #0
 	adds	r3, r3, #24
-.L1260:
+.L1281:
 	cmp	r3, r2
-	bne	.L1261
+	bne	.L1282
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1259:
+.L1280:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L1258
-.L1261:
+	b	.L1279
+.L1282:
 	str	r1, [r3, #4]!
-	b	.L1260
-.L1266:
+	b	.L1281
+.L1287:
 	.align	2
-.L1265:
-	.word	.LANCHOR75+56
+.L1286:
+	.word	.LANCHOR74+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
 	.align	1
@@ -9428,13 +9557,13 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1273
+	ldr	r3, .L1294
 	ldr	r0, [r3]
 	bx	lr
-.L1274:
+.L1295:
 	.align	2
-.L1273:
-	.word	.LANCHOR69
+.L1294:
+	.word	.LANCHOR68
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -9449,51 +9578,51 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1284
+	ldr	r7, .L1305
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1276:
+.L1297:
 	cmp	r4, r10
-	bne	.L1282
-	ldr	r1, .L1284+4
-	ldr	r0, .L1284+8
+	bne	.L1303
+	ldr	r1, .L1305+4
+	ldr	r0, .L1305+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1282:
-	cbnz	r5, .L1277
+.L1303:
+	cbnz	r5, .L1298
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1284+12
+	ldr	r0, .L1305+12
 	bl	printf
-.L1277:
+.L1298:
 	cmp	r8, #4
-	bne	.L1278
+	bne	.L1299
 	ldr	r1, [r6, r4, lsl #2]
-.L1283:
+.L1304:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1281
+	bls	.L1302
 	movs	r5, #0
-	ldr	r1, .L1284+4
-	ldr	r0, .L1284+8
+	ldr	r1, .L1305+4
+	ldr	r0, .L1305+8
 	bl	printf
-.L1281:
+.L1302:
 	adds	r4, r4, #1
-	b	.L1276
-.L1278:
+	b	.L1297
+.L1299:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1283
-.L1285:
+	b	.L1304
+.L1306:
 	.align	2
-.L1284:
+.L1305:
 	.word	.LC19
 	.word	.LC20
 	.word	.LC7
@@ -9512,7 +9641,7 @@ HynixGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #172
-	ldr	r5, .L1385
+	ldr	r5, .L1425
 	cmp	r0, #2
 	mov	r1, #173
 	mov	r2, #174
@@ -9524,18 +9653,19 @@ HynixGetReadRetryDefault:
 	strb	r1, [r5, #5]
 	strb	r2, [r5, #6]
 	strb	r3, [r5, #7]
-	bne	.L1287
+	bne	.L1308
 	movs	r3, #167
-	movs	r2, #247
+	mov	fp, #7
 	strb	r3, [r5, #4]
-	ldr	r3, .L1385+4
+	movs	r2, #247
+	ldr	r3, .L1425+4
 	strb	r2, [r3, #17]
-.L1343:
-	mov	r10, #7
-	b	.L1379
-.L1287:
+.L1418:
+	mov	r10, #4
+	b	.L1309
+.L1308:
 	cmp	r0, #3
-	bne	.L1289
+	bne	.L1310
 	movs	r3, #176
 	strb	r3, [r5, #4]
 	movs	r3, #177
@@ -9551,31 +9681,31 @@ HynixGetReadRetryDefault:
 	movs	r3, #182
 	strb	r3, [r5, #10]
 	movs	r3, #183
-.L1380:
-	mov	r10, #8
+.L1419:
+	mov	fp, #8
 	strb	r3, [r5, #11]
-	mov	fp, r10
-.L1288:
+	mov	r10, fp
+.L1309:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1293
+	bhi	.L1315
 	mov	r8, #0
-.L1294:
-	ldr	r3, .L1385+8
+.L1316:
+	ldr	r3, .L1425+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1300
-.L1301:
-	ldr	r3, .L1385
-	strb	fp, [r3, #1]
-	strb	r10, [r3, #2]
+	bhi	.L1322
+.L1323:
+	ldr	r3, .L1425
+	strb	r10, [r3, #1]
+	strb	fp, [r3, #2]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1289:
+.L1310:
 	cmp	r0, #4
-	bne	.L1290
+	bne	.L1311
 	movs	r0, #204
 	strb	r1, [r5, #9]
 	strb	r0, [r5, #4]
@@ -9588,12 +9718,12 @@ HynixGetReadRetryDefault:
 	movs	r0, #205
 	strb	r0, [r5, #8]
 	strb	r2, [r5, #10]
-	b	.L1380
-.L1290:
+	b	.L1419
+.L1311:
 	cmp	r0, #5
-	bne	.L1291
+	bne	.L1312
 	movs	r3, #56
-	mov	r10, #8
+	mov	fp, #8
 	strb	r3, [r5, #4]
 	movs	r3, #57
 	strb	r3, [r5, #5]
@@ -9601,14 +9731,12 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #59
 	strb	r3, [r5, #7]
-.L1379:
-	mov	fp, #4
-	b	.L1288
-.L1291:
+	b	.L1418
+.L1312:
 	cmp	r0, #6
-	bne	.L1292
+	bne	.L1313
 	movs	r3, #14
-	mov	r10, #12
+	mov	fp, #12
 	strb	r3, [r5, #4]
 	movs	r3, #15
 	strb	r3, [r5, #5]
@@ -9616,12 +9744,12 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1379
-.L1292:
+	b	.L1418
+.L1313:
 	cmp	r0, #7
-	bne	.L1343
+	bne	.L1314
 	movs	r3, #176
-	mov	r10, #12
+	mov	fp, #12
 	strb	r3, [r5, #4]
 	movs	r3, #177
 	strb	r3, [r5, #5]
@@ -9641,13 +9769,31 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #12]
 	movs	r3, #213
 	strb	r3, [r5, #13]
-	mov	fp, #10
-	b	.L1288
-.L1300:
-	ldr	r2, .L1385+12
+	mov	r10, #10
+	b	.L1309
+.L1314:
+	cmp	r0, #8
+	mov	r3, #7
+	bne	.L1373
+	strb	r3, [r5, #5]
+	movs	r3, #9
+	movs	r2, #6
+	strb	r3, [r5, #7]
+	movs	r3, #10
+	strb	r2, [r5, #4]
+	strb	r0, [r5, #6]
+	mov	fp, #50
+	strb	r3, [r5, #8]
+	mov	r10, #5
+	b	.L1309
+.L1373:
+	mov	fp, r3
+	b	.L1418
+.L1322:
+	ldr	r2, .L1425+12
 	movs	r6, #0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1385+16
+	ldr	r3, .L1425+16
 	ldr	r7, [r3, r2, lsl #3]
 	add	r4, r5, r2, lsl #6
 	add	r3, r3, r2, lsl #3
@@ -9656,41 +9802,41 @@ HynixGetReadRetryDefault:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1295:
+.L1317:
 	adds	r1, r5, r6
 	str	r2, [r3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
 	movs	r0, #80
-	str	r2, [sp, #8]
-	str	r3, [sp, #4]
+	str	r2, [sp, #4]
+	str	r3, [sp]
 	str	r1, [r7, #2052]
 	bl	udelay
 	ldr	r1, [r7, #2048]
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
 	strb	r1, [r4, r6]
 	adds	r6, r6, #1
 	uxtb	r1, r6
-	cmp	fp, r1
-	bhi	.L1295
-	ldr	r7, .L1385+4
+	cmp	r10, r1
+	bhi	.L1317
+	ldr	r7, .L1425+4
 	mov	r1, r4
 	movs	r2, #0
-.L1298:
+.L1320:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1297:
+.L1319:
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1297
+	bne	.L1319
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	cmp	r2, #4
-	bne	.L1298
+	bne	.L1320
 	movs	r3, #0
 	add	r8, r8, #1
 	strb	r3, [r4, #16]
@@ -9700,359 +9846,435 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L1294
-.L1293:
+	b	.L1316
+.L1315:
 	subs	r3, r4, #3
-	cmp	r3, #4
-	bhi	.L1301
-	smulbb	r3, r10, fp
-	asrs	r2, r3, #2
+	cmp	r3, #5
+	bhi	.L1323
+	smulbb	r3, fp, r10
+	asrs	r2, r3, #1
 	lsls	r3, r3, #4
-	str	r3, [sp, #52]
-	lsls	r3, r2, #3
-	str	r2, [sp, #12]
 	str	r3, [sp, #48]
 	lsls	r3, r2, #2
+	str	r2, [sp, #12]
+	str	r3, [sp, #44]
+	lsls	r3, r2, #1
 	str	r3, [sp, #32]
 	movs	r3, #0
-.L1384:
+.L1424:
 	str	r3, [sp, #28]
 	ldrb	r3, [sp, #28]	@ zero_extendqisi2
 	str	r3, [sp, #16]
-	ldr	r3, .L1385+8
+	ldr	r3, .L1425+8
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1301
+	bls	.L1323
 	ldr	r2, [sp, #16]
-	ldr	r3, .L1385+12
+	ldr	r3, .L1425+12
 	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1385+16
+	ldr	r3, .L1425+16
 	mov	r0, r8
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r2, [sp, #4]
-	str	r3, [sp, #8]
+	str	r2, [sp]
+	str	r3, [sp, #4]
 	mov	r3, r2
-	ldr	r2, [sp, #8]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #255
-	str	r2, [r3, #2056]
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
-	ldr	r1, .L1385
 	cmp	r4, #7
-	it	eq
-	moveq	r3, #160
-	ldr	r2, [sp, #8]
-	itete	eq
-	mlaeq	r1, r3, r8, r1
-	addne	r1, r1, r8, lsl #6
-	addeq	r3, r1, #28
-	addne	r3, r1, #20
-	str	r3, [sp, #36]
+	bne	.L1325
+	ldr	r3, .L1425
+	movs	r0, #160
+	mla	r0, r0, r8, r3
+	add	r3, r0, #28
+.L1420:
+	ldr	r2, [sp, #4]
 	cmp	r4, #4
-	ldr	r3, [sp, #4]
+	str	r3, [sp, #20]
+	ldr	r3, [sp]
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1305
+	bne	.L1328
 	movs	r2, #255
 	str	r2, [r3, #2052]
 	movs	r2, #64
 	str	r2, [r3, #2048]
 	movs	r2, #204
-.L1382:
+.L1421:
 	str	r2, [r3, #2052]
 	movs	r2, #77
-	b	.L1383
-.L1305:
-	subs	r2, r4, #5
-	cmp	r2, #1
-	bhi	.L1307
-	ldr	r2, .L1385
-	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	b	.L1422
+.L1325:
+	cmp	r4, #8
+	beq	.L1327
+	ldr	r0, .L1425
+	add	r0, r0, r8, lsl #6
+	add	r3, r0, #20
+	b	.L1420
+.L1426:
+	.align	2
+.L1425:
+	.word	.LANCHOR20
+	.word	.LANCHOR196
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR6
+.L1328:
+	subs	r2, r4, #5
+	cmp	r2, #1
+	bhi	.L1330
+	ldr	r2, .L1427
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
 	movs	r2, #82
-.L1383:
+.L1422:
 	str	r2, [r3, #2048]
+.L1329:
+	ldr	r2, [sp, #4]
 	cmp	r4, #6
-	ldr	r3, [sp, #4]
-	mov	r0, r8
-	ldr	r2, [sp, #8]
-	add	r5, r3, r2, lsl #8
-	mov	r3, #22
-	ldr	r2, [sp, #8]
-	str	r3, [r5, #2056]
-	mov	r3, #23
-	str	r3, [r5, #2056]
-	mov	r3, #4
-	str	r3, [r5, #2056]
-	mov	r3, #25
-	str	r3, [r5, #2056]
-	mov	r3, #0
-	str	r3, [r5, #2056]
-	str	r3, [r5, #2052]
-	str	r3, [r5, #2052]
+	ldr	r3, [sp]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #22
+	str	r2, [r3, #2056]
+	mov	r2, #23
+	str	r2, [r3, #2056]
+	mov	r2, #4
+	str	r2, [r3, #2056]
+	mov	r2, #25
+	str	r2, [r3, #2056]
+	mov	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
 	it	eq
-	moveq	r3, #31
-	str	r3, [r5, #2052]
-	movs	r3, #2
-	str	r3, [r5, #2052]
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	ldr	r3, [sp, #4]
+	moveq	r2, #31
+	str	r2, [r3, #2052]
+	movs	r2, #2
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+.L1372:
+	ldr	r2, [sp, #4]
+	mov	r0, r8
+	ldr	r3, [sp]
 	add	r3, r3, r2, lsl #8
 	movs	r2, #48
 	str	r2, [r3, #2056]
 	bl	NandcWaitFlashReady
 	subs	r3, r4, #5
 	cmp	r3, #1
-	str	r3, [sp, #40]
-	bls	.L1344
+	str	r3, [sp, #36]
+	bls	.L1375
+	cmp	r4, #8
+	beq	.L1375
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1310:
-	ldr	r3, .L1385+20
+.L1333:
+	ldr	r3, .L1427+4
 	subs	r2, r2, #1
+	ldm	sp, {r5, r6}
 	ldr	r3, [r3]
+	add	r5, r5, r6, lsl #8
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1311:
-	ldr	r6, [r5, #2048]
-	strb	r6, [r0, #1]!
-	cmp	r2, r0
-	bne	.L1311
-	cmp	r4, #7
-	bne	.L1312
+	str	r5, [sp, #8]
+.L1334:
+	ldr	r5, [sp, #8]
+	ldr	r5, [r5, #2048]
+	strb	r5, [r0, #1]!
+	cmp	r0, r2
+	bne	.L1334
+	cmp	r4, #8
+	bne	.L1335
 	movs	r2, #0
-.L1314:
+.L1337:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
-	cmp	r0, #12
-	beq	.L1313
+	cmp	r0, #50
+	beq	.L1336
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #10
-	beq	.L1313
+	cmp	r0, #5
+	beq	.L1336
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1314
-.L1315:
+	bne	.L1337
+.L1338:
 	movs	r1, #0
-	ldr	r0, .L1385+24
+	ldr	r0, .L1427+8
 	bl	printf
-.L1317:
-	b	.L1317
-.L1307:
+.L1340:
+	b	.L1340
+.L1330:
+	cmp	r4, #7
+	bne	.L1329
 	movs	r2, #174
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2048]
 	movs	r2, #176
-	b	.L1382
-.L1344:
+	b	.L1421
+.L1375:
 	movs	r2, #16
-	b	.L1310
-.L1386:
-	.align	2
-.L1385:
-	.word	.LANCHOR20
-	.word	.LANCHOR196
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR6
-	.word	.LANCHOR147
-	.word	.LC21
-.L1313:
+	b	.L1333
+.L1336:
 	cmp	r1, #6
-	bhi	.L1315
-.L1316:
-	ldr	r3, .L1387
-	ldr	lr, [r3]
-	mov	r3, lr
-.L1321:
-	ldr	r1, [sp, #52]
-	sub	r2, r3, lr
-	cmp	r1, r2
-	bgt	.L1322
-	ldr	r3, .L1387
+	bhi	.L1338
+.L1339:
+	ldr	r3, .L1427+4
+	ldr	r2, [r3]
+	mov	r3, r2
+.L1349:
+	ldr	r0, [sp, #48]
+	subs	r1, r3, r2
+	cmp	r1, r0
+	blt	.L1350
+	ldr	r3, .L1427+4
 	ldr	r1, [r3]
 	ldr	r3, [sp, #32]
 	adds	r0, r1, r3
 	movs	r3, #8
-.L1324:
-	mov	r7, r0
-	movs	r6, #0
-.L1323:
-	ldr	r2, [r7]
-	adds	r6, r6, #1
-	mvns	r2, r2
-	str	r2, [r7], #4
-	ldr	r2, [sp, #12]
-	cmp	r2, r6
-	bgt	.L1323
-	ldr	r2, [sp, #48]
+.L1352:
+	mov	r6, r0
+	movs	r5, #0
+.L1351:
+	ldrh	r7, [r6]
+	adds	r5, r5, #1
+	mvns	r7, r7
+	strh	r7, [r6], #2	@ movhi
+	ldr	r7, [sp, #12]
+	cmp	r7, r5
+	bgt	.L1351
+	ldr	r5, [sp, #44]
 	subs	r3, r3, #1
-	add	r0, r0, r2
-	bne	.L1324
-	str	r1, [sp, #20]
+	add	r0, r0, r5
+	bne	.L1352
+	mov	r7, r1
 	str	r3, [sp, #24]
-.L1330:
-	movs	r0, #0
-	mov	r2, r0
-.L1329:
+.L1358:
+	movs	r5, #0
+	mov	r0, r5
+.L1357:
 	movs	r3, #1
 	mov	ip, #0
-	lsl	r7, r3, r2
+	lsl	r6, r3, r0
 	movs	r3, #16
-	str	r3, [sp, #44]
+	str	r3, [sp, #40]
+	mov	lr, r6
 	mov	r6, r7
-	ldr	r7, [sp, #20]
-.L1327:
-	ldr	r3, [r7]
-	bics	r3, r6, r3
+.L1355:
+	ldrh	r3, [r6]
+	str	r3, [sp, #52]
+	ldr	r3, [sp, #52]
+	bics	r3, lr, r3
 	ldr	r3, [sp, #32]
 	it	eq
 	addeq	ip, ip, #1
-	add	r7, r7, r3
-	ldr	r3, [sp, #44]
+	add	r6, r6, r3
+	ldr	r3, [sp, #40]
 	subs	r3, r3, #1
-	str	r3, [sp, #44]
-	bne	.L1327
+	str	r3, [sp, #40]
+	bne	.L1355
 	cmp	ip, #8
-	add	r2, r2, #1
-	itt	hi
-	movhi	r3, r6
-	orrhi	r0, r0, r3
-	cmp	r2, #32
-	bne	.L1329
-	ldr	r3, [sp, #20]
-	str	r0, [r3], #4
-	str	r3, [sp, #20]
+	add	r0, r0, #1
+	ittt	hi
+	movhi	r3, lr
+	orrhi	r5, r5, r3
+	uxthhi	r5, r5
+	cmp	r0, #16
+	bne	.L1357
 	ldr	r3, [sp, #24]
+	strh	r5, [r7], #2	@ movhi
 	adds	r3, r3, #1
 	str	r3, [sp, #24]
-	ldr	r2, [sp, #24]
+	ldr	r0, [sp, #24]
 	ldr	r3, [sp, #12]
-	cmp	r3, r2
-	bgt	.L1330
-	subs	r2, r1, #4
-	add	r0, r1, #28
+	cmp	r3, r0
+	bgt	.L1358
+	subs	r0, r1, #4
+	add	r5, r1, #28
 	movs	r3, #0
-.L1333:
-	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1332
+.L1361:
+	ldr	r6, [r0, #4]!
+	cbnz	r6, .L1360
 	adds	r3, r3, #1
-.L1332:
-	cmp	r0, r2
-	bne	.L1333
+.L1360:
+	cmp	r5, r0
+	bne	.L1361
 	cmp	r3, #7
-	ble	.L1334
-	ldr	r0, .L1387+4
+	ble	.L1362
+	ldr	r0, .L1427+12
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1387+8
+	ldr	r0, .L1427+8
 	bl	printf
+.L1363:
+	b	.L1363
 .L1335:
-	b	.L1335
-.L1312:
+	cmp	r4, #7
+	bne	.L1341
+	movs	r2, #0
+.L1343:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1342
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1342
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1343
+.L1344:
+	movs	r1, #0
+	ldr	r0, .L1427+8
+	bl	printf
+.L1345:
+	b	.L1345
+.L1342:
+	cmp	r1, #6
+	bls	.L1339
+	b	.L1344
+.L1341:
 	cmp	r4, #6
-	bne	.L1316
+	bne	.L1339
 	adds	r3, r3, #7
-.L1318:
+.L1346:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1316
+	beq	.L1339
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1316
-	cmp	r3, r1
-	bne	.L1318
+	beq	.L1339
+	cmp	r1, r3
+	bne	.L1346
 	movs	r1, #0
-	ldr	r0, .L1387+8
+	ldr	r0, .L1427+8
 	bl	printf
-.L1320:
-	b	.L1320
-.L1322:
-	ldr	r2, [r5, #2048]
-	strb	r2, [r3], #1
-	b	.L1321
-.L1334:
+.L1348:
+	b	.L1348
+.L1350:
+	ldr	r1, [sp, #8]
+	ldr	r1, [r1, #2048]
+	strb	r1, [r3], #1
+	b	.L1349
+.L1362:
 	cmp	r4, #6
-	beq	.L1346
+	beq	.L1377
 	cmp	r4, #7
+	beq	.L1378
+	cmp	r4, #8
 	ite	eq
-	moveq	ip, #10
-	movne	ip, #8
-.L1336:
-	add	r3, fp, #-1
-	ldr	r1, [sp, #36]
+	moveq	r6, #5
+	movne	r6, #8
+.L1364:
+	add	r3, r10, #-1
+	ldr	r0, [sp, #20]
 	uxtb	r3, r3
-	movs	r0, #0
+	movs	r5, #0
 	adds	r3, r3, #1
-.L1337:
-	mov	r7, r1
-	mov	r2, lr
-.L1338:
-	ldrb	r6, [r2], #1	@ zero_extendqisi2
-	strb	r6, [r7], #1
-	sub	r6, r2, lr
-	uxtb	r6, r6
-	cmp	fp, r6
-	bhi	.L1338
-	adds	r0, r0, #1
-	add	lr, lr, r3
-	cmp	r10, r0
-	add	r1, r1, ip
-	bgt	.L1337
-	ldr	r3, [sp, #4]
+.L1365:
+	mov	ip, r0
+	mov	r1, r2
+.L1366:
+	ldrb	r7, [r1], #1	@ zero_extendqisi2
+	strb	r7, [ip], #1
+	subs	r7, r1, r2
+	uxtb	r7, r7
+	cmp	r10, r7
+	bhi	.L1366
+	adds	r5, r5, #1
+	add	r2, r2, r3
+	cmp	fp, r5
+	add	r0, r0, r6
+	bgt	.L1365
+	ldr	r3, [sp]
 	mov	r0, r8
-	ldr	r2, [sp, #8]
-	add	r6, r3, r2, lsl #8
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
 	movs	r3, #255
-	str	r3, [r6, #2056]
+	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #40]
+	ldr	r3, [sp, #36]
 	cmp	r3, #1
-	bhi	.L1340
+	bhi	.L1368
 	movs	r3, #54
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #2056]
 	mov	r1, #-1
-	str	r3, [r6, #2056]
-	ldr	r3, .L1387+12
+	ldr	r3, .L1427
 	ldr	r0, [sp, #16]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
+	str	r3, [r2, #2052]
 	movs	r3, #0
-	str	r3, [r5, #2048]
+	str	r3, [r2, #2048]
 	movs	r3, #22
-	str	r3, [r6, #2056]
+	str	r3, [r5, #2056]
 	bl	FlashReadCmd
-.L1341:
+.L1369:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1384
-.L1346:
-	mov	ip, #4
-	b	.L1336
-.L1340:
-	movs	r3, #56
-	str	r3, [r6, #2056]
-	b	.L1341
-.L1388:
+	b	.L1424
+.L1377:
+	movs	r6, #4
+	b	.L1364
+.L1378:
+	movs	r6, #10
+	b	.L1364
+.L1368:
+	cmp	r4, #8
+	ite	eq
+	moveq	r3, #190
+	movne	r3, #56
+	str	r3, [r5, #2056]
+	b	.L1369
+.L1327:
+	movs	r3, #120
+	movs	r2, #23
+	str	r3, [r5, #2056]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	movs	r1, #25
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r2, [r5, #2056]
+	movs	r2, #4
+	str	r2, [r5, #2056]
+	str	r1, [r5, #2056]
+	movs	r1, #218
+	str	r1, [r5, #2056]
+	movs	r1, #21
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	str	r1, [r5, #2052]
+	str	r2, [r5, #2052]
+	str	r3, [r5, #2052]
+	ldr	r3, .L1427+16
+	str	r3, [sp, #20]
+	b	.L1372
+.L1428:
 	.align	2
-.L1387:
+.L1427:
+	.word	.LANCHOR20
 	.word	.LANCHOR147
-	.word	.LC22
 	.word	.LC21
-	.word	.LANCHOR20
+	.word	.LC22
+	.word	.LANCHOR20+28
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -10067,76 +10289,76 @@ FlashGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r0, .L1389
+	cbz	r0, .L1429
 	subs	r2, r0, #1
-	cmp	r2, #6
-	bhi	.L1391
+	cmp	r2, #7
+	bhi	.L1431
 	b	HynixGetReadRetryDefault
-.L1391:
+.L1431:
 	cmp	r0, #49
-	bne	.L1392
-	ldr	r0, .L1412
+	bne	.L1432
+	ldr	r0, .L1452
 	movs	r2, #64
-	ldr	r1, .L1412+4
+	ldr	r1, .L1452+4
 	strb	r3, [r0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
-.L1410:
+.L1450:
 	adds	r0, r0, #4
 	b	ftl_memcpy
-.L1392:
+.L1432:
 	cmp	r0, #33
-	beq	.L1393
+	beq	.L1433
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1394
-.L1393:
-	ldr	r0, .L1412
+	bhi	.L1434
+.L1433:
+	ldr	r0, .L1452
 	strb	r3, [r0]
 	movs	r3, #4
-.L1411:
+.L1451:
 	strb	r3, [r0, #1]
 	movs	r3, #7
 	strb	r3, [r0, #2]
 	movs	r2, #45
-	ldr	r1, .L1412+8
-	b	.L1410
-.L1394:
+	ldr	r1, .L1452+8
+	b	.L1450
+.L1434:
 	cmp	r0, #34
-	beq	.L1395
+	beq	.L1435
 	cmp	r0, #67
-	bne	.L1396
-.L1395:
-	ldr	r0, .L1412
+	bne	.L1436
+.L1435:
+	ldr	r0, .L1452
 	strb	r3, [r0]
 	movs	r3, #5
-	b	.L1411
-.L1396:
+	b	.L1451
+.L1436:
 	cmp	r0, #35
-	beq	.L1397
+	beq	.L1437
 	cmp	r0, #68
-	bne	.L1389
-.L1397:
-	ldr	r0, .L1412
+	bne	.L1429
+.L1437:
+	ldr	r0, .L1452
 	movs	r2, #95
-	ldr	r1, .L1412+12
+	ldr	r1, .L1452+12
 	strb	r3, [r0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
-	b	.L1410
-.L1389:
+	b	.L1450
+.L1429:
 	bx	lr
-.L1413:
+.L1453:
 	.align	2
-.L1412:
+.L1452:
 	.word	.LANCHOR20
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LANCHOR11
+	.word	.LANCHOR13
+	.word	.LANCHOR8
+	.word	.LANCHOR10
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",%progbits
 	.align	1
@@ -10155,28 +10377,28 @@ FlashInit:
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1507
-	ldr	r10, .L1507+132
-	ldr	r8, .L1507+136
+	ldr	r3, .L1554
+	ldr	r10, .L1554+120
+	ldr	r8, .L1554+124
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1507+4
-	ldr	r6, .L1507+8
-	ldr	r7, .L1507+12
+	ldr	r3, .L1554+4
+	ldr	r6, .L1554+8
+	ldr	r7, .L1554+12
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1507+16
+	ldr	r3, .L1554+16
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1507+20
+	ldr	r3, .L1554+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1507+24
-	ldr	r2, .L1507+28
+	ldr	r3, .L1554+24
+	ldr	r2, .L1554+28
 	strb	r5, [r8]
 	str	r0, [r3]
 	movs	r3, #50
@@ -10184,32 +10406,33 @@ FlashInit:
 	mov	r0, r4
 	strb	r3, [r2]
 	movs	r2, #128
-	ldr	r3, .L1507+32
-	ldr	r4, .L1507+36
+	ldr	r3, .L1554+32
+	ldr	r4, .L1554+36
 	strb	r5, [r7]
 	str	r5, [r3]
-	ldr	r3, .L1507+40
+	ldr	r3, .L1554+40
 	str	r2, [r3]
-	ldr	r3, .L1507+44
+	ldr	r3, .L1554+44
 	str	r5, [r3]
 	movs	r3, #60
 	strb	r3, [r6]
 	bl	NandcInit
 	str	r10, [sp, #20]
-	ldr	r10, .L1507+140
+	ldr	r10, .L1554+128
 	str	r8, [sp, #16]
 	mov	r8, r6
 	mov	r6, r4
-.L1419:
-	uxtb	fp, r5
-	mov	r0, fp
-	bl	FlashReset
+.L1459:
 	add	r1, r10, r5, lsl #3
+	uxtb	r2, r5
 	ldr	r3, [r10, r5, lsl #3]
-	mov	r0, fp
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	mov	fp, r2
+	mov	r0, r2
 	str	r3, [sp, #28]
 	str	r1, [sp, #24]
+	bl	FlashReset
+	mov	r0, fp
 	bl	NandcFlashCs
 	ldr	r1, [sp, #24]
 	movs	r0, #200
@@ -10240,10 +10463,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1415
+	bhi	.L1455
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1507+48
+	ldr	r0, .L1554+48
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10253,17 +10476,17 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1415:
-	cbnz	r5, .L1416
+.L1455:
+	cbnz	r5, .L1456
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1460
+	bhi	.L1503
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1460
-.L1416:
+	beq	.L1503
+.L1456:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10272,195 +10495,195 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1419
+	bne	.L1459
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L1420
-	ldr	r3, .L1507+52
+	beq	.L1460
+	ldr	r3, .L1554+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1420:
+.L1460:
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1507+56
+	ldr	r0, .L1554+56
 	bl	ftl_memset
-	ldr	r4, .L1507+60
-	ldr	r3, .L1507+64
-	ldr	r5, .L1507+68
+	ldr	r4, .L1554+60
+	movs	r2, #0
+	ldr	r3, .L1554+64
+	ldr	r5, .L1554+68
 	str	r3, [r4]
-	movs	r3, #0
-	strb	r3, [r5]
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
-	cmp	r3, #161
-	beq	.L1421
+	ldr	r3, .L1554+72
+	strb	r2, [r3]
+	mov	r10, r3
+	ldr	r2, .L1554+76
+	ldr	r1, [r2]
+	cmp	r1, r5
+	ittt	eq
+	ldreq	r3, .L1554+80
+	moveq	r2, #1
+	streq	r2, [r3]
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L1462
+	cmp	r3, #241
+	beq	.L1462
 	cmp	r3, #218
-	beq	.L1421
-	and	r2, r3, #223
+	beq	.L1462
+	and	r2, r3, #253
 	cmp	r2, #209
-	beq	.L1421
+	beq	.L1462
 	cmp	r3, #220
-	bne	.L1422
+	bne	.L1463
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1422
-.L1421:
-	ldr	r1, [sp, #16]
+	bne	.L1463
+.L1462:
+	ldr	r0, [sp, #16]
 	movs	r2, #1
-	strb	r2, [r1]
+	strb	r2, [r0]
 	movs	r2, #16
-	ldr	r1, [sp, #20]
+	ldr	r0, [sp, #20]
 	strb	r2, [r8]
-	strb	r2, [r1]
-	ldrb	r1, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1507+72
-	cmp	r1, #152
-	strb	r1, [r2, #1]
+	strb	r2, [r0]
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	ldr	r2, .L1554+84
+	cmp	r0, #152
+	strb	r0, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1423
-	ldrsb	r1, [r6, #4]
-	cmp	r1, #0
+	bne	.L1464
+	ldrsb	r0, [r6, #4]
+	cmp	r0, #0
 	itt	ge
-	movge	r1, #24
-	strbge	r1, [r8]
-.L1423:
-	ldr	r1, .L1507+76
-	ldr	r0, .L1507+80
-	ldr	r1, [r1]
-	cmp	r1, r0
-	beq	.L1424
+	movge	r0, #24
+	strbge	r0, [r8]
+.L1464:
+	cmp	r1, r5
+	beq	.L1465
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1425
-.L1424:
+	bne	.L1466
+.L1465:
 	movs	r1, #16
 	strb	r1, [r8]
-.L1425:
+.L1466:
 	cmp	r3, #218
-	bne	.L1426
+	bne	.L1467
 	mov	r1, #2048
-.L1503:
+.L1550:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1427:
+.L1468:
 	movs	r2, #32
-	ldr	r1, .L1507+84
-	ldr	r0, .L1507+88
+	ldr	r1, .L1554+88
+	ldr	r0, .L1554+92
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1507+72
-	ldr	r0, .L1507+64
+	ldr	r1, .L1554+84
+	ldr	r0, .L1554+64
 	bl	ftl_memcpy
-.L1422:
+.L1463:
 	ldr	r3, [sp, #16]
-	ldr	r8, .L1507+144
+	ldr	r8, .L1554+132
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1429
+	bne	.L1471
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1431
+	cbnz	r0, .L1473
 	ldr	r3, [r4]
-	ldr	r10, .L1507+100
+	ldr	fp, .L1554+104
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
-	strb	r0, [r10]
-	bmi	.L1431
+	strb	r0, [fp]
+	bmi	.L1473
 	movs	r3, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
-	ldrb	r0, [r10]	@ zero_extendqisi2
+	ldrb	r0, [fp]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1431:
+.L1473:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1429
+	beq	.L1471
 	ldr	r3, [r4]
-	ldr	r0, .L1507+92
+	ldr	r0, .L1554+96
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r2, r0, #1
-	beq	.L1414
+	beq	.L1454
 	bl	FlashDieInfoInit
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1507+96
+	ldr	r2, .L1554+100
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1434
+	blt	.L1476
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1435
-.L1434:
+	bge	.L1477
+.L1476:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1435:
-	ldr	r3, .L1507+100
+.L1477:
+	ldr	r3, .L1554+104
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1436
+	beq	.L1478
 	bl	FlashSavePhyInfo
-	ldr	r3, .L1507+104
+	ldr	r3, .L1554+108
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1436:
+.L1478:
 	bl	FlashSavePhyInfo
-.L1429:
+.L1471:
 	ldr	fp, [r4]
-	ldr	r10, .L1507+100
+	ldrh	r2, [fp, #16]
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
 	ldrh	r0, [fp, #10]
+	ubfx	r1, r2, #3, #1
 	strb	r3, [r8]
-	ldrh	r3, [fp, #16]
-	ubfx	r2, r3, #7, #1
-	ubfx	r1, r3, #3, #1
-	strb	r2, [r5]
-	ldr	r2, .L1507+108
-	ldr	r5, .L1507+112
-	strb	r1, [r2]
-	ubfx	r1, r3, #4, #1
-	ldr	r2, .L1507+116
-	ubfx	r3, r3, #8, #3
+	ubfx	r3, r2, #7, #1
 	strb	r3, [r10]
-	movs	r3, #0
-	str	r3, [r5]
-	strb	r1, [r2]
+	ldr	r3, .L1554+112
+	ldr	r10, .L1554+136
+	strb	r1, [r3]
+	ubfx	r1, r2, #4, #1
+	ldr	r3, .L1554+116
+	ubfx	r2, r2, #8, #3
+	strb	r1, [r3]
+	ldr	r3, .L1554+104
 	ldrb	r1, [fp, #12]	@ zero_extendqisi2
+	strb	r2, [r3]
+	movs	r2, #0
+	str	r2, [r10]
+	str	r3, [sp, #24]
 	bl	__aeabi_idiv
 	mov	r1, r0
 	ldrb	r0, [fp, #18]	@ zero_extendqisi2
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
-	ldr	r3, [r4]
-	mov	ip, r5
-	ldrh	r2, [r3, #16]
-	tst	r2, #64
-	beq	.L1438
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1507+120
-	ldr	r2, .L1507+124
-	strb	r0, [r3]
-	ldr	r3, .L1507+56
-	ldrb	r1, [r3, #1]	@ zero_extendqisi2
-	ldrb	lr, [r3, #2]	@ zero_extendqisi2
-	strb	r1, [r2]
-	ldr	r1, .L1507+128
-	strb	lr, [r1]
-	b	.L1508
-.L1509:
-	.align	2
-.L1507:
+	ldr	r2, [r4]
+	ldr	r3, [sp, #24]
+	ldrh	r1, [r2, #16]
+	mov	fp, r3
+	tst	r1, #64
+	mov	r1, r10
+	b	.L1555
+.L1556:
+	.align	2
+.L1554:
 	.word	.LANCHOR147
 	.word	.LANCHOR153
 	.word	.LANCHOR152
@@ -10478,10 +10701,11 @@ FlashInit:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR31
+	.word	1446522928
 	.word	.LANCHOR5
-	.word	.LANCHOR200
+	.word	.LANCHOR119
 	.word	.LANCHOR29
-	.word	1446522928
+	.word	.LANCHOR200
 	.word	.LANCHOR143+32
 	.word	.LANCHOR7
 	.word	.LC24
@@ -10489,94 +10713,112 @@ FlashInit:
 	.word	.LANCHOR24
 	.word	.LANCHOR148
 	.word	.LANCHOR201
-	.word	.LANCHOR145
 	.word	.LANCHOR27
-	.word	.LANCHOR10
-	.word	.LANCHOR13
-	.word	.LANCHOR151
 	.word	.LANCHOR2
 	.word	.LANCHOR1
 	.word	.LANCHOR6
-	.word	.LANCHOR8
-.L1508:
-	add	lr, r0, #-1
-	cmp	lr, #6
-	mov	lr, r1
-	bhi	.L1439
-	ldr	r2, .L1510
-	str	r2, [r5]
-	subs	r2, r0, #5
-	cmp	r2, #1
-	bhi	.L1440
-	ldr	r2, .L1510+4
-	adds	r3, r3, #20
-	movs	r1, #1
-	str	r1, [r2]
-.L1441:
+	.word	.LANCHOR15
+	.word	.LANCHOR145
+.L1555:
+	beq	.L1480
+	ldrb	r0, [r2, #19]	@ zero_extendqisi2
+	ldr	r3, .L1557
+	ldr	ip, .L1557+56
+	strb	r0, [r3]
+	ldrb	r2, [ip, #1]	@ zero_extendqisi2
+	ldr	r3, .L1557+4
+	ldrb	ip, [ip, #2]	@ zero_extendqisi2
+	strb	r2, [r3]
+	ldr	r2, .L1557+8
+	strb	ip, [r2]
+	add	ip, r0, #-1
+	cmp	ip, #7
+	mov	ip, r2
+	bhi	.L1481
+	ldr	r3, .L1557+12
+	str	r3, [r10]
+	subs	r3, r0, #5
+	cmp	r3, #1
+	bls	.L1482
+	cmp	r0, #8
+	bne	.L1483
+.L1482:
+	ldr	r3, .L1557+16
+	movs	r2, #1
+	str	r2, [r3]
+.L1483:
+	cmp	r0, #7
+	ldr	r3, .L1557+20
+	beq	.L1484
+	sub	r2, r3, #8
+	cmp	r0, #8
+	it	ne
+	movne	r3, r2
+.L1484:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1443:
-	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1442
+.L1486:
+	ldrsb	ip, [r1, #1]!
+	cmp	ip, #0
+	bne	.L1485
 	adds	r2, r2, #1
-.L1442:
+.L1485:
 	cmp	r3, r1
-	bne	.L1443
+	bne	.L1486
 	cmp	r2, #27
-	bls	.L1438
+	bls	.L1480
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1438:
-	ldr	r3, .L1510+8
-	ldr	r2, [r3]
-	ldr	r3, .L1510+12
-	cmp	r2, r3
-	bne	.L1454
+.L1480:
+	ldr	r3, .L1557+24
+	ldr	r3, [r3]
+	cmp	r3, r5
+	bne	.L1497
 	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1454
+	cbz	r3, .L1497
 	ldr	r3, [r4]
 	movs	r2, #0
 	strb	r2, [r3, #18]
-.L1454:
+.L1497:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1455
+	bne	.L1498
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1455
+	cbz	r3, .L1498
 	movs	r3, #0
 	movs	r0, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1455:
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	ldrb	r3, [r10]	@ zero_extendqisi2
+.L1498:
+	ldrb	r3, [fp]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1456
+	beq	.L1499
 	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1457
+	cbnz	r2, .L1500
 	lsls	r3, r3, #31
-	bmi	.L1456
-.L1457:
-	ldr	r3, .L1510+16
+	bmi	.L1499
+.L1500:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldr	r3, .L1557+28
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1456:
 	movs	r0, #0
-	movs	r7, #16
 	bl	flash_exit_slc_mode
+.L1499:
 	ldr	r3, [r4]
+	movs	r7, #16
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1510+20
+	ldr	r0, .L1557+32
 	bl	FlashReadIdbDataRaw
 	ldr	r8, [r4]
 	ldr	r3, [sp, #20]
-	ldr	r4, .L1510+24
+	ldr	r4, .L1557+36
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
 	strb	r7, [r3]
 	ldrh	r5, [r8, #10]
@@ -10587,7 +10829,7 @@ FlashInit:
 	ldr	r3, [r6]
 	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	ldr	r3, .L1510+28
+	ldr	r3, .L1557+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r8, #13]	@ zero_extendqisi2
@@ -10607,7 +10849,7 @@ FlashInit:
 	uxth	r5, r5
 	cmp	r2, #1
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1458
+	bne	.L1501
 	lsls	r3, r3, #1
 	lsrs	r2, r6, #1
 	lsls	r5, r5, #1
@@ -10616,104 +10858,108 @@ FlashInit:
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1458:
+.L1501:
 	ldrb	r0, [r8, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-.L1414:
+.L1454:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1426:
+.L1467:
 	cmp	r3, #220
-	bne	.L1427
+	bne	.L1469
 	mov	r1, #4096
-	b	.L1503
-.L1440:
-	add	r2, r3, #28
-	adds	r3, r3, #20
-	cmp	r0, #7
-	it	eq
-	moveq	r3, r2
-	b	.L1441
-.L1439:
-	sub	r3, r0, #17
-	cmp	r3, #2
-	bhi	.L1445
-	ldr	r3, .L1510+32
+	b	.L1550
+.L1469:
+	cmp	r3, #211
+	itttt	eq
+	moveq	r3, #4096
+	strheq	r3, [r2, #14]	@ movhi
+	moveq	r3, #2
+	strbeq	r3, [r2, #13]
+	b	.L1468
+.L1481:
+	sub	lr, r0, #17
+	cmp	lr, #2
+	bhi	.L1488
+	ldr	r3, .L1557+44
 	cmp	r0, #19
-	str	r3, [r5]
+	str	r3, [r10]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
-	strb	r3, [r1]
-	b	.L1438
-.L1445:
-	cmp	r0, #33
-	beq	.L1447
-	sub	r3, r0, #65
-	cmp	r3, #1
-	bhi	.L1448
-.L1447:
-	ldr	r3, .L1510+36
-	str	r3, [ip]
-	movs	r3, #4
 	strb	r3, [r2]
+	b	.L1480
+.L1488:
+	cmp	r0, #33
+	beq	.L1490
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1491
+.L1490:
+	ldr	r2, .L1557+48
+	str	r2, [r1]
+	movs	r2, #4
+	strb	r2, [r3]
 	movs	r3, #7
-	strb	r3, [lr]
-	b	.L1438
-.L1448:
-	sub	r3, r0, #67
-	uxtb	r3, r3
-	cmp	r3, #1
-	bls	.L1449
-	sub	r1, r0, #34
-	cmp	r1, #1
-	bhi	.L1450
-.L1449:
-	ldr	r1, .L1510+36
+	strb	r3, [ip]
+	b	.L1480
+.L1491:
+	sub	r2, r0, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L1492
+	sub	ip, r0, #34
+	cmp	ip, #1
+	bhi	.L1493
+.L1492:
+	ldr	ip, .L1557+48
 	cmp	r0, #35
-	str	r1, [ip]
-	ldr	r1, .L1510+40
-	beq	.L1451
+	str	ip, [r1]
+	ldr	r1, .L1557+8
+	beq	.L1494
 	cmp	r0, #68
-	beq	.L1451
+	beq	.L1494
 	movs	r0, #7
-.L1504:
-	cmp	r3, #1
+.L1551:
+	cmp	r2, #1
 	strb	r0, [r1]
 	ite	ls
-	movls	r3, #4
-	movhi	r3, #5
-	strb	r3, [r2]
-	b	.L1438
-.L1451:
+	movls	r2, #4
+	movhi	r2, #5
+	strb	r2, [r3]
+	b	.L1480
+.L1494:
 	movs	r0, #17
-	b	.L1504
-.L1450:
+	b	.L1551
+.L1493:
 	cmp	r0, #49
 	itt	eq
-	ldreq	r3, .L1510+44
-	streq	r3, [r5]
-	b	.L1438
-.L1460:
+	ldreq	r3, .L1557+52
+	streq	r3, [r10]
+	b	.L1480
+.L1503:
 	mvn	r0, #1
-	b	.L1414
-.L1511:
+	b	.L1454
+.L1558:
 	.align	2
-.L1510:
+.L1557:
+	.word	.LANCHOR9
+	.word	.LANCHOR12
+	.word	.LANCHOR151
 	.word	HynixReadRetrial
 	.word	.LANCHOR36
-	.word	.LANCHOR29
-	.word	1446522928
+	.word	.LANCHOR20+28
+	.word	.LANCHOR119
 	.word	.LANCHOR148
 	.word	.LANCHOR141
-	.word	.LANCHOR15
+	.word	.LANCHOR14
 	.word	.LANCHOR25
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-	.word	.LANCHOR151
 	.word	SamsungReadRetrial
+	.word	.LANCHOR20
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
@@ -10728,19 +10974,19 @@ FlashReadSlc2KPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	r3, .L1541
+	ldr	r3, .L1588
 	mov	fp, r2
 	mov	r4, r0
 	movs	r7, #0
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1513:
+.L1560:
 	cmp	r7, r8
-	bne	.L1526
+	bne	.L1573
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1526:
+.L1573:
 	sub	r3, r8, r7
 	add	r2, sp, #12
 	uxtb	r3, r3
@@ -10749,19 +10995,19 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #8
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1541+4
+	ldr	r2, .L1588+4
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1514
+	bhi	.L1561
 	mov	r3, #-1
 	str	r3, [r4]
-.L1515:
+.L1562:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1513
-.L1514:
-	ldr	r2, .L1541+8
+	b	.L1560
+.L1561:
+	ldr	r2, .L1588+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -10779,7 +11025,7 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1541+12
+	ldr	r3, .L1588+12
 	mov	r6, r0
 	ldr	r1, [sp, #12]
 	mov	r0, r5
@@ -10787,13 +11033,13 @@ FlashReadSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1516
+	cbz	r3, .L1563
 	add	r3, r3, #2048
-.L1516:
+.L1563:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1517
+	cbz	r2, .L1564
 	adds	r2, r2, #8
-.L1517:
+.L1564:
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, r10
@@ -10802,60 +11048,60 @@ FlashReadSlc2KPages:
 	mov	r1, r0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L1541+16
+	ldr	r3, .L1588+16
 	cmp	r6, r1
 	it	cc
 	movcc	r6, r1
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1518
+	bls	.L1565
 	adds	r5, r6, #1
 	it	ne
 	movne	r6, #256
 	str	r6, [r4]
-.L1521:
+.L1568:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1522
+	cbz	r3, .L1569
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1522
+	bne	.L1569
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1522
+	bne	.L1569
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1522:
+.L1569:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1515
+	bne	.L1562
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1541+20
+	ldr	r0, .L1588+20
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1524
+	cbz	r1, .L1571
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1541+24
+	ldr	r0, .L1588+24
 	bl	rknand_print_hex
-.L1524:
+.L1571:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1515
+	beq	.L1562
 	movs	r3, #4
-	ldr	r0, .L1541+28
+	ldr	r0, .L1588+28
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1515
-.L1518:
+	b	.L1562
+.L1565:
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1521
-.L1542:
+	b	.L1568
+.L1589:
 	.align	2
-.L1541:
+.L1588:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -10876,36 +11122,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1634
+	ldr	r3, .L1681
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1544
-	ldr	r2, .L1634+4
+	cbnz	r3, .L1591
+	ldr	r2, .L1681+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1634+8
+	ldr	r2, .L1681+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1545:
+.L1592:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1583
+	bcc	.L1630
 	movs	r0, #0
-	b	.L1543
-.L1544:
+	b	.L1590
+.L1591:
 	bl	FlashReadSlc2KPages
-.L1543:
+.L1590:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1583:
+.L1630:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -10921,85 +11167,86 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1634+12
+	ldr	r2, .L1681+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1547
+	bhi	.L1594
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1548:
+.L1595:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1545
-.L1547:
-	ldr	r2, .L1634+16
+	b	.L1592
+.L1594:
+	ldr	r2, .L1681+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1634+20
+	ldr	r3, .L1681+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1634+24
+	ldr	r3, .L1681+24
 	ldr	r3, [r3]
-	ldrb	r1, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r1, #1
-	cmp	r3, #6
-	bhi	.L1550
-	ldr	r3, .L1634+28
-	cmp	r1, #7
-	add	r2, r3, r4
-	ldrb	r3, [r2, #12]	@ zero_extendqisi2
-	it	eq
-	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
-	ldr	r2, .L1634+32
+	ldrb	r2, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	cmp	r3, #7
+	bhi	.L1597
+	ldr	r3, .L1681+28
+	subs	r2, r2, #7
+	cmp	r2, #1
+	ldr	r2, .L1681+32
+	add	r1, r3, r4
+	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
+	it	ls
+	ldrbls	r3, [r1, #20]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1550
-	ldr	r2, .L1634+36
+	beq	.L1597
+	ldr	r2, .L1681+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1550:
+.L1597:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1552
+	beq	.L1599
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1553
-.L1552:
-	ldr	r3, .L1634+40
+	bge	.L1600
+.L1599:
+	ldr	r3, .L1681+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1553
+	cbz	r3, .L1600
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1560:
+.L1607:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1555
+	bne	.L1602
 	cmp	r4, #255
-	beq	.L1585
-.L1555:
-	cbz	r5, .L1557
-	ldr	r3, .L1634+44
+	beq	.L1632
+.L1602:
+	cbz	r5, .L1604
+	ldr	r3, .L1681+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1558:
+.L1605:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1556
+	cbz	r5, .L1603
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1556:
+.L1603:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -11007,30 +11254,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1634+8
+	ldr	r3, .L1681+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1559
+	cbz	r3, .L1606
 	adds	r0, r0, #1
-	bne	.L1559
-	ldr	r3, .L1634+8
+	bne	.L1606
+	ldr	r3, .L1681+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1560
-.L1553:
+	b	.L1607
+.L1600:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1560
-.L1557:
+	b	.L1607
+.L1604:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1558
-.L1585:
+	b	.L1605
+.L1632:
 	movs	r5, #0
-	b	.L1556
-.L1559:
-	cbz	r5, .L1561
-	ldr	r3, .L1634+44
+	b	.L1603
+.L1606:
+	cbz	r5, .L1608
+	ldr	r3, .L1681+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11049,30 +11296,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1561:
+.L1608:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1634+8
+	ldr	r3, .L1681+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1562
-	ldr	r3, .L1634+48
+	bne	.L1609
+	ldr	r3, .L1681+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1563
-.L1567:
-	ldr	r3, .L1634+52
+	cbnz	r3, .L1610
+.L1614:
+	ldr	r3, .L1681+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1564
+	bne	.L1611
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1633
-.L1563:
-	ldr	r3, .L1634+56
+	b	.L1680
+.L1610:
+	ldr	r3, .L1681+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11084,33 +11331,33 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1566
-	ldr	r3, .L1634+60
+	beq	.L1613
+	ldr	r3, .L1681+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1586
-.L1566:
+	bls	.L1633
+.L1613:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1567
-.L1586:
+	beq	.L1614
+.L1633:
 	movs	r5, #0
-.L1562:
-	ldr	r3, .L1634+60
+.L1609:
+	ldr	r3, .L1681+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1575
-	ldr	r3, .L1634+52
+	bls	.L1622
+	ldr	r3, .L1681+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1575
+	bne	.L1622
 	mov	r6, #256
-	b	.L1570
-.L1635:
+	b	.L1617
+.L1682:
 	.align	2
-.L1634:
+.L1681:
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR5
@@ -11121,13 +11368,13 @@ FlashReadPages:
 	.word	.LANCHOR20
 	.word	.LANCHOR21
 	.word	.LANCHOR20+4
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR3
 	.word	.LANCHOR30
 	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1564:
+.L1611:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11135,133 +11382,133 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1568
-	ldr	r3, .L1636
+	bne	.L1615
+	ldr	r3, .L1683
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1569
-	ldr	r2, .L1636+4
+	cmp	r3, #7
+	bhi	.L1616
+	ldr	r2, .L1683+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1569:
+.L1616:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1636+8
+	ldr	r2, .L1683+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1636+12
+	ldr	r0, .L1683+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1568
-	ldr	r3, .L1636+16
+	bne	.L1615
+	ldr	r3, .L1683+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1570
+	cbz	r5, .L1617
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1571
+	beq	.L1618
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1572
-.L1571:
+	bge	.L1619
+.L1618:
 	bl	flash_enter_slc_mode
-.L1573:
-	ldr	r3, .L1636+20
+.L1620:
+	ldr	r3, .L1683+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1633:
+.L1680:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1575
-.L1570:
+	bne	.L1622
+.L1617:
 	str	r6, [r10, fp]
-.L1576:
+.L1623:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1578
-	ldr	r2, .L1636+8
+	bne	.L1625
+	ldr	r2, .L1683+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1636+24
+	ldr	r0, .L1683+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1578
+	cbz	r1, .L1625
 	movs	r3, #4
-	ldr	r0, .L1636+28
+	ldr	r0, .L1683+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1578:
-	cbz	r5, .L1580
-	ldr	r3, .L1636+8
+.L1625:
+	cbz	r5, .L1627
+	ldr	r3, .L1683+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1581
-	ldr	r3, .L1636+20
+	bls	.L1628
+	ldr	r3, .L1683+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1581:
+.L1628:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1580
+	beq	.L1627
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1580:
+.L1627:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1582
+	beq	.L1629
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1548
-.L1582:
-	ldr	r3, .L1636+16
+	bge	.L1595
+.L1629:
+	ldr	r3, .L1683+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1548
+	beq	.L1595
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1548
-.L1572:
+	b	.L1595
+.L1619:
 	bl	flash_exit_slc_mode
-	b	.L1573
-.L1568:
+	b	.L1620
+.L1615:
 	movs	r5, #0
-.L1575:
+.L1622:
 	cmp	r6, #256
-	beq	.L1570
+	beq	.L1617
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1576
-.L1637:
+	b	.L1623
+.L1684:
 	.align	2
-.L1636:
+.L1683:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
 	.word	.LC28
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR145
 	.word	.LC25
 	.word	.LC27
@@ -11283,23 +11530,23 @@ FlashProgSlc2KPages:
 	mov	r8, r1
 	mov	r4, r0
 	mov	r6, r0
-	ldr	r3, .L1667
+	ldr	r3, .L1714
 	movs	r7, #0
-	ldr	fp, .L1667+28
+	ldr	fp, .L1714+28
 	str	r2, [sp, #8]
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1639:
+.L1686:
 	cmp	r7, r8
-	bne	.L1645
+	bne	.L1692
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L1656
-.L1666:
+	bne	.L1703
+.L1713:
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1645:
+.L1692:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11308,19 +11555,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1667+4
+	ldr	r2, .L1714+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1640
+	bhi	.L1687
 	mov	r3, #-1
 	str	r3, [r6]
-.L1641:
+.L1688:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1639
-.L1640:
-	ldr	r2, .L1667+8
+	b	.L1686
+.L1687:
+	ldr	r2, .L1714+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -11352,13 +11599,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1642
+	cbz	r3, .L1689
 	add	r3, r3, #2048
-.L1642:
+.L1689:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1643
+	cbz	r2, .L1690
 	adds	r2, r2, #8
-.L1643:
+.L1690:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -11380,24 +11627,24 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1641
-.L1652:
+	b	.L1688
+.L1699:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1647
+	bne	.L1694
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+12
+	ldr	r0, .L1714+12
 	bl	printf
-.L1648:
+.L1695:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-.L1646:
+.L1693:
 	cmp	r7, r8
-	bne	.L1652
-	b	.L1666
-.L1647:
+	bne	.L1699
+	b	.L1713
+.L1694:
 	sub	r3, r7, r8
-	ldr	fp, .L1667+32
+	ldr	fp, .L1714+32
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #8]
@@ -11426,46 +11673,46 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1649
+	bne	.L1696
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+16
+	ldr	r0, .L1714+16
 	bl	printf
 	str	r5, [r4]
-.L1649:
+.L1696:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1650
+	cbz	r3, .L1697
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1650
+	beq	.L1697
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+20
+	ldr	r0, .L1714+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1650:
+.L1697:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1648
+	beq	.L1695
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1648
+	beq	.L1695
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1667+24
+	ldr	r0, .L1714+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1648
-.L1656:
+	b	.L1695
+.L1703:
 	mov	r8, #0
-	ldr	r10, .L1667+36
-	b	.L1646
-.L1668:
+	ldr	r10, .L1714+36
+	b	.L1693
+.L1715:
 	.align	2
-.L1667:
+.L1714:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11490,7 +11737,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1721
+	ldr	r5, .L1768
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -11498,36 +11745,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1721+4
+	ldr	r5, .L1768+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1670
-	ldr	r3, .L1721+8
+	cbnz	r7, .L1717
+	ldr	r3, .L1768+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1671:
+.L1718:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1684
-	ldr	r6, .L1721+12
+	bcc	.L1731
+	ldr	r6, .L1768+12
 	movs	r5, #0
-	ldr	r7, .L1721+16
-.L1685:
+	ldr	r7, .L1768+16
+.L1732:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1687
+	bcc	.L1734
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1688
-.L1696:
+	bne	.L1735
+.L1743:
 	movs	r0, #0
-	b	.L1669
-.L1670:
+	b	.L1716
+.L1717:
 	bl	FlashProgSlc2KPages
-.L1669:
+.L1716:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1684:
+.L1731:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -11540,81 +11787,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1721+12
+	ldr	r3, .L1768+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1673
+	bhi	.L1720
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1674:
+.L1721:
 	adds	r7, r7, #1
-	b	.L1671
-.L1673:
-	ldr	r3, .L1721+20
+	b	.L1718
+.L1720:
+	ldr	r3, .L1768+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1721+24
+	ldr	r3, .L1768+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1676
+	cbz	r3, .L1723
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1676:
+.L1723:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1721+24
+	ldr	r2, .L1768+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1677
+	beq	.L1724
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1677:
-	ldr	r2, .L1721+28
+.L1724:
+	ldr	r2, .L1768+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1721+24
+	ldr	r2, .L1768+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1721+12
+	ldr	r3, .L1768+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1678
+	bne	.L1725
 	bl	NandcWaitFlashReady
-.L1679:
+.L1726:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1680
-	ldr	r3, .L1721+32
+	cmp	r3, #7
+	bhi	.L1727
+	ldr	r3, .L1768+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1680
-	ldr	r1, .L1721+36
+	cbz	r3, .L1727
+	ldr	r1, .L1768+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1680:
+.L1727:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1681
-	ldr	r3, .L1721+16
+	bne	.L1728
+	ldr	r3, .L1768+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1681
+	beq	.L1728
 	bl	flash_enter_slc_mode
-.L1682:
+.L1729:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -11626,11 +11873,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1683
+	beq	.L1730
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1721+40
+	ldr	r3, .L1768+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -11641,7 +11888,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1721+44
+	ldr	r3, .L1768+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -11654,19 +11901,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1683:
+.L1730:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1674
-.L1678:
+	b	.L1721
+.L1725:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1721+40
+	ldr	r3, .L1768+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -11675,45 +11922,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1679
-.L1681:
+	b	.L1726
+.L1728:
 	bl	flash_exit_slc_mode
-	b	.L1682
-.L1687:
+	b	.L1729
+.L1734:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1686
+	bne	.L1733
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1686
-	ldr	r2, .L1721+24
+	cbz	r3, .L1733
+	ldr	r2, .L1768+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1686:
+.L1733:
 	adds	r5, r5, #1
-	b	.L1685
-.L1688:
-	ldr	r10, .L1721+64
+	b	.L1732
+.L1735:
+	ldr	r10, .L1768+64
 	movs	r7, #0
-.L1689:
+.L1736:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1696
+	beq	.L1743
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1690
+	bne	.L1737
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+48
+	ldr	r0, .L1768+48
 	bl	printf
-.L1691:
+.L1738:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1689
-.L1690:
+	b	.L1736
+.L1737:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1721+68
+	ldr	fp, .L1768+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -11742,47 +11989,47 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1692
+	bne	.L1739
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+52
+	ldr	r0, .L1768+52
 	bl	printf
 	str	r5, [r4]
-.L1692:
+.L1739:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1693
+	cbz	r3, .L1740
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1693
+	beq	.L1740
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+56
+	ldr	r0, .L1768+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1693:
+.L1740:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1691
+	beq	.L1738
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1691
+	beq	.L1738
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1721+60
+	ldr	r0, .L1768+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1691
-.L1722:
+	b	.L1738
+.L1769:
 	.align	2
-.L1721:
+.L1768:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR25
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR27
 	.word	.LANCHOR23
 	.word	.LANCHOR26
@@ -11808,14 +12055,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1726
+	ldr	r3, .L1773
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1725
-	ldr	r5, .L1726+4
+	bcc	.L1772
+	ldr	r5, .L1773+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -11847,17 +12094,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1723:
+.L1770:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1725:
+.L1772:
 	movs	r4, #0
-	b	.L1723
-.L1727:
+	b	.L1770
+.L1774:
 	.align	2
-.L1726:
+.L1773:
 	.word	.LANCHOR149
 	.word	.LANCHOR153
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -11872,48 +12119,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1773
+	ldr	r3, .L1820
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1755
-	ldr	r2, .L1773+4
+	bne	.L1802
+	ldr	r2, .L1820+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1773+8
+	ldr	r2, .L1820+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1773+12
+	ldr	r2, .L1820+12
 	str	r0, [r2]
-	ldr	r2, .L1773+16
+	ldr	r2, .L1820+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1773+20
+	ldr	r2, .L1820+20
 	ldr	r7, [r2]
-	ldr	r2, .L1773+24
+	ldr	r2, .L1820+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1773+28
+	ldr	r2, .L1820+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1730:
+.L1777:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1734
+	bhi	.L1781
 	cmp	r5, #0
-	beq	.L1728
+	beq	.L1775
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1773+4
+	ldr	r10, .L1820+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1773+20
+	ldr	r7, .L1820+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -11923,44 +12170,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1736:
+.L1783:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1738
+	bhi	.L1785
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1739
+	bne	.L1786
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1740:
+.L1787:
 	mov	r8, #0
-.L1749:
-	ldr	r3, .L1773+16
+.L1796:
+	ldr	r3, .L1820+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1773+20
+	ldr	r3, .L1820+20
 	ldr	r10, [r3]
-	ldr	r3, .L1773+32
+	ldr	r3, .L1820+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1773+36
+	ldr	r3, .L1820+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1773+28
+	ldr	r3, .L1820+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1741:
+.L1788:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1744
-	cbz	r5, .L1728
-	ldr	fp, .L1773+4
+	bhi	.L1791
+	cbz	r5, .L1775
+	ldr	fp, .L1820+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -11969,59 +12216,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1773+20
+	ldr	r10, .L1820+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1746:
+.L1793:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1748
+	bhi	.L1795
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1749
-	ldr	r8, .L1773+20
+	bhi	.L1796
+	ldr	r8, .L1820+20
 	movs	r7, #0
 	mov	r10, #36
-.L1750:
+.L1797:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1752
+	bhi	.L1799
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1753
+	bls	.L1800
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1728
-.L1753:
-	ldr	r3, .L1773+20
+	cbz	r3, .L1775
+.L1800:
+	ldr	r3, .L1820+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1728:
+.L1775:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1734:
+.L1781:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1773+40
+	ldr	r3, .L1820+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1731
+	cbz	r3, .L1778
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1732
-.L1731:
+	cbnz	r0, .L1779
+.L1778:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1733
+	cbnz	r0, .L1780
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -12034,62 +12281,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1732:
+.L1779:
 	add	r10, r10, #1
-	b	.L1730
-.L1733:
+	b	.L1777
+.L1780:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1732
-.L1738:
+	b	.L1779
+.L1785:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1737
+	bne	.L1784
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1737:
+.L1784:
 	add	r8, r8, #1
-	b	.L1736
-.L1739:
-	ldr	r3, .L1773+44
+	b	.L1783
+.L1786:
+	ldr	r3, .L1820+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1773+8
+	ldr	r3, .L1820+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1756
+	cbnz	r3, .L1803
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1740
-.L1756:
+	b	.L1787
+.L1803:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1740
-.L1744:
+	b	.L1787
+.L1791:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1773+40
+	ldr	r3, .L1820+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1742
+	cbz	r3, .L1789
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1743
-.L1742:
+	cbnz	r0, .L1790
+.L1789:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1743
+	cbnz	r0, .L1790
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12104,56 +12351,56 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1743:
+.L1790:
 	add	fp, fp, #1
-	b	.L1741
-.L1748:
+	b	.L1788
+.L1795:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1747
+	cbz	r3, .L1794
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1747:
+.L1794:
 	adds	r7, r7, #1
-	b	.L1746
-.L1752:
+	b	.L1793
+.L1799:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1751
+	cbz	r3, .L1798
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1751
+	cbnz	r3, .L1798
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1751:
+.L1798:
 	adds	r7, r7, #1
-	b	.L1750
-.L1755:
+	b	.L1797
+.L1802:
 	movs	r4, #0
-	b	.L1728
-.L1774:
+	b	.L1775
+.L1821:
 	.align	2
-.L1773:
-	.word	.LANCHOR77
+.L1820:
+	.word	.LANCHOR76
 	.word	.LANCHOR27
-	.word	.LANCHOR8
-	.word	.LANCHOR74
+	.word	.LANCHOR15
+	.word	.LANCHOR73
 	.word	.LANCHOR38
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LANCHOR189
-	.word	.LANCHOR59
+	.word	.LANCHOR58
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR47
-	.word	.LANCHOR54
+	.word	.LANCHOR53
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -12167,33 +12414,33 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1786
+	ldr	r3, .L1833
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1777
-	ldr	r3, .L1786+4
+	bne	.L1824
+	ldr	r3, .L1833+4
 	mov	r1, r4
-	ldr	r7, .L1786+8
-	ldr	r5, .L1786+12
+	ldr	r7, .L1833+8
+	ldr	r5, .L1833+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
 	mov	r8, r7
-	ldr	r6, .L1786+16
+	ldr	r6, .L1833+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1786+20
-	ldr	r3, .L1786+24
-	ldr	r10, .L1786+56
+	ldr	r7, .L1833+20
+	ldr	r3, .L1833+24
+	ldr	r10, .L1833+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1778:
+.L1825:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1779
+	blt	.L1826
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1786+28
+	ldr	r4, .L1833+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -12210,16 +12457,16 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1786+32
+	ldr	r3, .L1833+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1780:
+.L1827:
 	ldr	r3, [r8]
 	mov	fp, #0
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1786+4
+	ldr	r3, .L1833+4
 	ldrh	r0, [r6, #10]
 	str	fp, [r5]
 	ldr	r3, [r3]
@@ -12228,14 +12475,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1786+36
+	ldr	r0, .L1833+36
 	bl	printf
-	ldr	r3, .L1786+40
+	ldr	r3, .L1833+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1781
+	blt	.L1828
 	ldr	r3, [r4, #8]
 	ldrh	r2, [r4]
 	strh	fp, [r4, #2]	@ movhi
@@ -12245,7 +12492,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1786+44
+	ldr	r2, .L1833+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12254,9 +12501,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1781:
+.L1828:
 	movs	r3, #1
-	ldr	r0, .L1786+12
+	ldr	r0, .L1833+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -12265,27 +12512,27 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1782
+	bne	.L1829
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1786+48
+	ldr	r0, .L1833+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1780
+	bls	.L1827
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1786+52
+	ldr	r0, .L1833+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1777:
+.L1824:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1779:
+.L1826:
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -12294,29 +12541,29 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1778
-.L1782:
+	b	.L1825
+.L1829:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1777
+	bne	.L1824
 	movs	r3, #1
 	str	r3, [sp, #8]
-	b	.L1780
-.L1787:
+	b	.L1827
+.L1834:
 	.align	2
-.L1786:
-	.word	.LANCHOR77
+.L1833:
+	.word	.LANCHOR76
 	.word	.LANCHOR188
 	.word	.LANCHOR183
 	.word	.LANCHOR202
-	.word	.LANCHOR75+24
+	.word	.LANCHOR74+24
 	.word	.LANCHOR45
-	.word	.LANCHOR58
-	.word	.LANCHOR75
+	.word	.LANCHOR57
+	.word	.LANCHOR74
 	.word	.LANCHOR37
 	.word	.LC33
-	.word	.LANCHOR54
-	.word	.LANCHOR78
+	.word	.LANCHOR53
+	.word	.LANCHOR77
 	.word	.LC34
 	.word	.LC35
 	.word	.LANCHOR123
@@ -12332,241 +12579,241 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1853
+	ldr	r3, .L1900
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1790
-.L1789:
-	ldr	r3, .L1853+4
-	ldr	r8, .L1853+60
-	ldr	r7, .L1853+8
+	bne	.L1837
+.L1836:
+	ldr	r3, .L1900+4
+	ldr	r8, .L1900+60
+	ldr	r7, .L1900+8
 	ldrh	r3, [r3]
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1791
-	ldr	r1, .L1853+12
-	movw	r2, #3108
-	ldr	r0, .L1853+16
+	ble	.L1838
+	ldr	r1, .L1900+12
+	movw	r2, #3139
+	ldr	r0, .L1900+16
 	bl	printf
-	ldr	r1, .L1853+20
-	ldr	r0, .L1853+24
+	ldr	r1, .L1900+20
+	ldr	r0, .L1900+24
 	bl	printf
-.L1791:
-	ldr	r3, .L1853+28
+.L1838:
+	ldr	r3, .L1900+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1792
-	ldr	r3, .L1853+4
+	bne	.L1839
+	ldr	r3, .L1900+4
 	ldrh	r5, [r3]
-	ldr	r3, .L1853+32
+	ldr	r3, .L1900+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
 	adds	r1, r0, #1
 	mul	r6, r3, r5
 	add	r1, r1, r6, lsr #2
-	ldr	r6, .L1853+36
+	ldr	r6, .L1900+36
 	uxth	r1, r1
 	ldr	r6, [r6]
-	cbz	r6, .L1793
-	ldr	r6, .L1853+40
+	cbz	r6, .L1840
+	ldr	r6, .L1900+40
 	ldr	r6, [r6]
 	cmp	r6, #39
-	bhi	.L1793
+	bhi	.L1840
 	cmp	r6, #2
-	bls	.L1827
+	bls	.L1874
 	lsls	r1, r5, #31
-	bpl	.L1823
+	bpl	.L1870
 	cmp	r3, #0
-	beq	.L1827
-.L1823:
+	beq	.L1874
+.L1870:
 	mov	r1, r0
-	b	.L1793
-.L1792:
+	b	.L1840
+.L1839:
 	cmp	r2, #1
-	bne	.L1827
-	ldr	r3, .L1853+44
+	bne	.L1874
+	ldr	r3, .L1900+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1827
-	ldr	r3, .L1853+48
+	beq	.L1874
+	ldr	r3, .L1900+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1827
-	ldr	r3, .L1853+4
-	ldr	r0, .L1853+36
+	bne	.L1874
+	ldr	r3, .L1900+4
+	ldr	r0, .L1900+36
 	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1793
-	ldr	r0, .L1853+40
+	cbz	r0, .L1840
+	ldr	r0, .L1900+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1793
+	bhi	.L1840
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1793:
-	cbz	r1, .L1794
+.L1840:
+	cbz	r1, .L1841
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1794:
-	ldr	r0, .L1853+52
+.L1841:
+	ldr	r0, .L1900+52
 	bl	List_pop_index_node
-	ldr	r3, .L1853+4
+	ldr	r3, .L1900+4
 	mov	r5, r0
 	uxth	r10, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1795
-	ldr	r1, .L1853+12
-	movw	r2, #3128
-	ldr	r0, .L1853+16
+	cbnz	r3, .L1842
+	ldr	r1, .L1900+12
+	movw	r2, #3159
+	ldr	r0, .L1900+16
 	bl	printf
-	ldr	r1, .L1853+20
-	ldr	r0, .L1853+24
+	ldr	r1, .L1900+20
+	ldr	r0, .L1900+24
 	bl	printf
-.L1795:
-	ldr	r3, .L1853+4
-	ldr	r2, .L1853+4
+.L1842:
+	ldr	r3, .L1900+4
+	ldr	r2, .L1900+4
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
 	cmp	r3, r10
-	bls	.L1789
+	bls	.L1836
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1853+56
+	ldr	r3, .L1900+56
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1789
+	bne	.L1836
 	strh	r10, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1797
-	ldr	r3, .L1853+56
+	bne	.L1844
+	ldr	r3, .L1900+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1853+4
+	ldr	r3, .L1900+4
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1789
-	movw	r2, #3144
-	ldr	r1, .L1853+12
-	ldr	r0, .L1853+16
+	ble	.L1836
+	movw	r2, #3175
+	ldr	r1, .L1900+12
+	ldr	r0, .L1900+16
 	bl	printf
-	ldr	r1, .L1853+20
-	ldr	r0, .L1853+24
+	ldr	r1, .L1900+20
+	ldr	r0, .L1900+24
 	bl	printf
-	b	.L1789
-.L1827:
+	b	.L1836
+.L1874:
 	movs	r1, #0
-	b	.L1794
-.L1854:
+	b	.L1841
+.L1901:
 	.align	2
-.L1853:
-	.word	.LANCHOR77
-	.word	.LANCHOR89
+.L1900:
+	.word	.LANCHOR76
+	.word	.LANCHOR88
 	.word	.LANCHOR40
 	.word	.LANCHOR203
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR94
+	.word	.LANCHOR93
 	.word	.LANCHOR172
 	.word	.LANCHOR28
 	.word	.LANCHOR170
 	.word	.LANCHOR44
-	.word	.LANCHOR8
-	.word	.LANCHOR88
-	.word	.LANCHOR84
-	.word	.LANCHOR86
-.L1797:
-	ldr	r3, .L1855
+	.word	.LANCHOR15
+	.word	.LANCHOR87
+	.word	.LANCHOR83
+	.word	.LANCHOR85
+.L1844:
+	ldr	r3, .L1902
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1799
-	ldr	r1, .L1855+4
-	movw	r2, #3147
-	ldr	r0, .L1855+8
+	ble	.L1846
+	ldr	r1, .L1902+4
+	movw	r2, #3178
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1799:
-	ldr	r3, .L1855+20
+.L1846:
+	ldr	r3, .L1902+20
 	add	lr, r4, #16
-	ldr	r2, .L1855+24
+	ldr	r2, .L1902+24
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #36
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1800:
+.L1847:
 	cmp	r0, r3
-	bne	.L1802
-	cbnz	r6, .L1803
-	ldr	r1, .L1855+4
-	movw	r2, #3159
-	ldr	r0, .L1855+8
+	bne	.L1849
+	cbnz	r6, .L1850
+	ldr	r1, .L1902+4
+	movw	r2, #3190
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1803:
-	ldr	r3, .L1855+28
-	ldr	r8, .L1855+80
+.L1850:
+	ldr	r3, .L1902+28
+	ldr	r8, .L1902+80
 	ldr	r3, [r3]
-	cbz	r3, .L1804
-	ldr	r3, .L1855+32
+	cbz	r3, .L1851
+	ldr	r3, .L1902+32
 	cmp	r4, r3
-	bne	.L1804
+	bne	.L1851
 	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1804:
-	ldr	r3, .L1855+36
+.L1851:
+	ldr	r3, .L1902+36
 	ldrh	r3, [r3]
 	cmp	r3, r10
-	bne	.L1805
-	ldr	r1, .L1855+4
-	movw	r2, #3166
-	ldr	r0, .L1855+8
+	bne	.L1852
+	ldr	r1, .L1902+4
+	movw	r2, #3197
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1805:
+.L1852:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1855+40
-	ldr	fp, .L1855+84
+	ldr	r3, .L1902+40
+	ldr	fp, .L1902+84
 	cmp	r2, #0
-	bne	.L1806
+	bne	.L1853
 	ldr	r1, [r8]
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1807
-	ldr	r0, .L1855+44
+	beq	.L1854
+	ldr	r0, .L1902+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L1850:
+.L1897:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r10
 	ldr	r2, [r3]
@@ -12575,43 +12822,43 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r3]
 	bl	ftl_set_blk_mode
-.L1851:
+.L1898:
 	ldr	r2, [r8]
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1855+48
+	ldr	r2, .L1902+48
 	ldr	r1, [r2]
 	cmp	r0, r1
 	ldrh	r1, [r7]
 	it	hi
 	strhi	r0, [r2]
-	ldr	r2, .L1855+44
+	ldr	r2, .L1902+44
 	ldr	r0, [r3]
 	ldr	r3, [fp]
 	ldrh	r2, [r2]
-	ldr	r7, .L1855+52
+	ldr	r7, .L1902+52
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1855+56
+	ldr	r3, .L1902+56
 	str	r0, [r3]
-	ldr	r3, .L1855+60
+	ldr	r3, .L1902+60
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-	ldr	r3, .L1855+20
+	ldr	r3, .L1902+20
 	ldr	r0, [r3]
 	movs	r3, #36
 	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1811:
+.L1858:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1812
-	ldr	r3, .L1855+64
+	bne	.L1859
+	ldr	r3, .L1902+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1813
+	cbz	r3, .L1860
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -12619,8 +12866,8 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1813:
-	ldr	r3, .L1855+20
+.L1860:
+	ldr	r3, .L1902+20
 	movs	r7, #0
 	mov	r8, r7
 	mov	fp, #36
@@ -12628,43 +12875,43 @@ allocate_data_superblock:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1815:
+.L1862:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L1817
+	bhi	.L1864
 	cmp	r8, #0
-	beq	.L1818
+	beq	.L1865
 	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1818:
+.L1865:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1819
-	ldr	r3, .L1855+68
+	bne	.L1866
+	ldr	r3, .L1902+68
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1789
-.L1802:
+	b	.L1836
+.L1849:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1801
+	beq	.L1848
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1801:
+.L1848:
 	adds	r3, r3, #36
-	b	.L1800
-.L1807:
+	b	.L1847
+.L1854:
 	movs	r2, #2
-	b	.L1850
-.L1806:
+	b	.L1897
+.L1853:
 	ldr	r1, [r8]
 	mov	r0, r10
 	str	r3, [sp, #4]
@@ -12675,20 +12922,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.10
-	b	.L1851
-.L1812:
+	b	.L1898
+.L1859:
 	ldr	r2, [r1, #-36]
 	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1811
-.L1817:
-	ldr	r2, .L1855+20
+	b	.L1858
+.L1864:
+	ldr	r2, .L1902+20
 	mul	r3, fp, r7
 	ldr	r2, [r2]
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1816
+	bne	.L1863
 	ldr	r0, [r1, #4]
 	add	r8, r8, #1
 	str	r2, [sp, #4]
@@ -12700,12 +12947,12 @@ allocate_data_superblock:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	strb	r3, [r4, #7]
-.L1816:
+.L1863:
 	adds	r7, r7, #1
-	b	.L1815
-.L1819:
-	ldr	r3, .L1855+72
-	ldr	r1, .L1855+76
+	b	.L1862
+.L1866:
+	ldr	r3, .L1902+72
+	ldr	r1, .L1902+76
 	ldrh	r3, [r3]
 	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -12718,39 +12965,39 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L1855+68
+	ldr	r2, .L1902+68
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1820
+	cbz	r3, .L1867
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1790
-.L1820:
-	ldr	r1, .L1855+4
-	movw	r2, #3225
-	ldr	r0, .L1855+8
+	cbnz	r3, .L1837
+.L1867:
+	ldr	r1, .L1902+4
+	movw	r2, #3256
+	ldr	r0, .L1902+8
 	bl	printf
-	ldr	r1, .L1855+12
-	ldr	r0, .L1855+16
+	ldr	r1, .L1902+12
+	ldr	r0, .L1902+16
 	bl	printf
-.L1790:
+.L1837:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1856:
+.L1903:
 	.align	2
-.L1855:
-	.word	.LANCHOR89
+.L1902:
+	.word	.LANCHOR88
 	.word	.LANCHOR203
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LANCHOR38
 	.word	.LANCHOR28
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR204
 	.word	.LANCHOR167
 	.word	.LANCHOR48
@@ -12758,11 +13005,11 @@ allocate_data_superblock:
 	.word	-1024
 	.word	.LANCHOR205
 	.word	.LANCHOR191
-	.word	.LANCHOR8
-	.word	.LANCHOR84
-	.word	.LANCHOR53
+	.word	.LANCHOR15
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.word	.LANCHOR159
-	.word	.LANCHOR79
+	.word	.LANCHOR78
 	.word	.LANCHOR168
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
@@ -12778,43 +13025,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1869
+	ldr	r4, .L1916
 	ldrh	r3, [r4]
-	cbz	r3, .L1858
-	ldr	r8, .L1869+12
+	cbz	r3, .L1905
+	ldr	r8, .L1916+12
 	movs	r7, #0
-.L1859:
-	ldr	r3, .L1869+4
+.L1906:
+	ldr	r3, .L1916+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1865
+	bhi	.L1912
 	bl	FtlGcReFreshBadBlk
-.L1858:
+.L1905:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1865:
-	ldr	r2, .L1869+8
+.L1912:
+	ldr	r2, .L1916+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L1860:
+.L1907:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1864
+	bhi	.L1911
 	adds	r7, r7, #1
-	b	.L1859
-.L1864:
+	b	.L1906
+.L1911:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L1861
+	bne	.L1908
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -12822,27 +13069,27 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L1862:
+.L1909:
 	cmp	r5, r2
-	bcc	.L1863
+	bcc	.L1910
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L1861:
+.L1908:
 	add	fp, fp, #1
-	b	.L1860
-.L1863:
+	b	.L1907
+.L1910:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1862
-.L1870:
+	b	.L1909
+.L1917:
 	.align	2
-.L1869:
-	.word	.LANCHOR117
+.L1916:
+	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR47
-	.word	.LANCHOR118
+	.word	.LANCHOR117
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -12857,32 +13104,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1881
+	ldr	r3, .L1928
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1872
-	ldr	r2, .L1881+4
+	bne	.L1919
+	ldr	r2, .L1928+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1873
+	bne	.L1920
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1874:
-	ldr	r5, .L1881+8
+.L1921:
+	ldr	r5, .L1928+8
 	mov	r1, r4
-	ldr	r0, .L1881+12
+	ldr	r0, .L1928+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1876
-	ldr	r1, .L1881+16
-	movw	r2, #3336
-	ldr	r0, .L1881+20
+	cbnz	r3, .L1923
+	ldr	r1, .L1928+16
+	movw	r2, #3367
+	ldr	r0, .L1928+20
 	bl	printf
-	ldr	r1, .L1881+24
-	ldr	r0, .L1881+28
+	ldr	r1, .L1928+24
+	ldr	r0, .L1928+28
 	bl	printf
-.L1876:
+.L1923:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -12890,60 +13137,60 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1881+32
+	ldr	r3, .L1928+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1881+36
+	ldr	r2, .L1928+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1880
-	ldr	r1, .L1881+16
-	movw	r2, #3339
-	ldr	r0, .L1881+20
+	ble	.L1927
+	ldr	r1, .L1928+16
+	movw	r2, #3370
+	ldr	r0, .L1928+20
 	bl	printf
-	ldr	r1, .L1881+24
-	ldr	r0, .L1881+28
+	ldr	r1, .L1928+24
+	ldr	r0, .L1928+28
 	bl	printf
-.L1880:
+.L1927:
 	movs	r3, #1
-	b	.L1871
-.L1873:
-	ldr	r2, .L1881+40
+	b	.L1918
+.L1920:
+	ldr	r2, .L1928+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1871
-	ldr	r2, .L1881+44
+	beq	.L1918
+	ldr	r2, .L1928+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1871
-	ldr	r2, .L1881+48
+	beq	.L1918
+	ldr	r2, .L1928+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1874
-.L1871:
+	bne	.L1921
+.L1918:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1872:
+.L1919:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1871
-.L1882:
+	b	.L1918
+.L1929:
 	.align	2
-.L1881:
-	.word	.LANCHOR84
-	.word	.LANCHOR204
-	.word	.LANCHOR86
+.L1928:
 	.word	.LANCHOR83
+	.word	.LANCHOR204
+	.word	.LANCHOR85
+	.word	.LANCHOR82
 	.word	.LANCHOR206
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR89
+	.word	.LANCHOR88
 	.word	.LANCHOR40
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -12960,47 +13207,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1884
-	ldr	r5, .L1895
+	beq	.L1931
+	ldr	r5, .L1942
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1885
+	bne	.L1932
 	mov	r1, r0
-	ldr	r0, .L1895+4
+	ldr	r0, .L1942+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1886
-	ldr	r1, .L1895+8
-	movw	r2, #3354
-	ldr	r0, .L1895+12
+	cbnz	r3, .L1933
+	ldr	r1, .L1942+8
+	movw	r2, #3385
+	ldr	r0, .L1942+12
 	bl	printf
-	ldr	r1, .L1895+16
-	ldr	r0, .L1895+20
+	ldr	r1, .L1942+16
+	ldr	r0, .L1942+20
 	bl	printf
-.L1886:
+.L1933:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L1895+24
+	ldr	r0, .L1942+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1887
-	ldr	r6, .L1895+28
+	cbz	r0, .L1934
+	ldr	r6, .L1942+28
 	mov	r1, r4
-	ldr	r0, .L1895+24
+	ldr	r0, .L1942+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L1888
-	ldr	r1, .L1895+8
-	movw	r2, #3358
-	ldr	r0, .L1895+12
+	cbnz	r3, .L1935
+	ldr	r1, .L1942+8
+	movw	r2, #3389
+	ldr	r0, .L1942+12
 	bl	printf
-	ldr	r1, .L1895+16
-	ldr	r0, .L1895+20
+	ldr	r1, .L1942+16
+	ldr	r0, .L1942+20
 	bl	printf
-.L1888:
+.L1935:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -13008,33 +13255,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L1895+32
+	ldr	r0, .L1942+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L1887:
+.L1934:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1891:
+.L1938:
 	movs	r5, #0
-	b	.L1883
-.L1885:
+	b	.L1930
+.L1932:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1884:
-	ldr	r6, .L1895+36
+.L1931:
+	ldr	r6, .L1942+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1890
+	bne	.L1937
 	strh	r4, [r6]	@ movhi
-	b	.L1891
-.L1890:
+	b	.L1938
+.L1937:
 	cmp	r4, r0
-	beq	.L1891
+	beq	.L1938
 	bl	update_vpc_list
-	ldr	r3, .L1895+40
+	ldr	r3, .L1942+40
 	adds	r5, r0, #0
-	ldr	r2, .L1895+44
+	ldr	r2, .L1942+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -13042,40 +13289,40 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1895+48
+	ldr	r3, .L1942+48
 	muls	r3, r2, r3
-	ldr	r2, .L1895
+	ldr	r2, .L1942
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1883
+	cbnz	r2, .L1930
 	cmp	r4, r1
-	beq	.L1883
-	ldr	r1, .L1895+8
-	movw	r2, #3379
-	ldr	r0, .L1895+12
+	beq	.L1930
+	ldr	r1, .L1942+8
+	movw	r2, #3410
+	ldr	r0, .L1942+12
 	bl	printf
-	ldr	r1, .L1895+16
-	ldr	r0, .L1895+20
+	ldr	r1, .L1942+16
+	ldr	r0, .L1942+20
 	bl	printf
-.L1883:
+.L1930:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1896:
+.L1943:
 	.align	2
-.L1895:
-	.word	.LANCHOR84
+.L1942:
+	.word	.LANCHOR83
 	.word	.LC36
 	.word	.LANCHOR207
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LANCHOR87
 	.word	.LANCHOR88
-	.word	.LANCHOR89
 	.word	.LC37
 	.word	.LANCHOR133
-	.word	.LANCHOR83
 	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
@@ -13093,71 +13340,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L1897
+	beq	.L1944
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1897
+	beq	.L1944
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1908
-	ldr	r6, .L1908+4
+	ldr	r5, .L1955
+	ldr	r6, .L1955+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L1901:
+.L1948:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1903
+	beq	.L1950
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1904
+	bne	.L1951
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1904
+	cbnz	r1, .L1951
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L1904
+	bne	.L1951
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1903
+	cbnz	r2, .L1950
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1903:
+.L1950:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1908+8
+	ldr	r2, .L1955+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1902
+	bne	.L1949
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1902:
+.L1949:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1901
-.L1904:
+	b	.L1948
+.L1951:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1897
+	cbz	r2, .L1944
 	cmp	r3, #1
-	bne	.L1897
-	ldr	r3, .L1908+12
+	bne	.L1944
+	ldr	r3, .L1955+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1897
-	ldr	r3, .L1908+16
+	bcc	.L1944
+	ldr	r3, .L1955+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13165,22 +13412,22 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L1908+20
+	ldr	r2, .L1955+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L1897:
+.L1944:
 	pop	{r4, r5, r6, pc}
-.L1909:
+.L1956:
 	.align	2
-.L1908:
-	.word	.LANCHOR8
+.L1955:
+	.word	.LANCHOR15
 	.word	.LANCHOR120
 	.word	.LANCHOR38
-	.word	.LANCHOR54
-	.word	.LANCHOR84
 	.word	.LANCHOR53
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
@@ -13198,93 +13445,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1911
-	ldr	r1, .L1932
-	movw	r2, #3276
-	ldr	r0, .L1932+4
+	bne	.L1958
+	ldr	r1, .L1979
+	movw	r2, #3307
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1911:
-	ldr	r5, .L1932+16
+.L1958:
+	ldr	r5, .L1979+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1912
-	ldr	r1, .L1932
-	movw	r2, #3277
-	ldr	r0, .L1932+4
+	bne	.L1959
+	ldr	r1, .L1979
+	movw	r2, #3308
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1912:
+.L1959:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1913
-	ldr	r1, .L1932
-	movw	r2, #3278
-	ldr	r0, .L1932+4
+	cbnz	r3, .L1960
+	ldr	r1, .L1979
+	movw	r2, #3309
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1913:
+.L1960:
 	movs	r3, #0
-	ldr	r7, .L1932+20
+	ldr	r7, .L1979+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L1932+24
+	ldr	r6, .L1979+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L1914:
+.L1961:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L1915
+	beq	.L1962
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L1917
+	bne	.L1964
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L1917
-	ldr	ip, .L1932+28
+	bne	.L1964
+	ldr	ip, .L1979+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L1917
+	bne	.L1964
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1915:
+.L1962:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L1916
+	bne	.L1963
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1916:
+.L1963:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L1914
-.L1917:
-	ldr	r8, .L1932+24
+	b	.L1961
+.L1964:
+	ldr	r8, .L1979+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1918:
+.L1965:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L1920:
+.L1967:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13296,31 +13543,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L1920
+	beq	.L1967
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1921
+	bne	.L1968
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1922
-	ldr	r1, .L1932+28
+	cbnz	r1, .L1969
+	ldr	r1, .L1979+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L1921
+	bne	.L1968
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1921
+	cbz	r3, .L1968
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1918
-.L1922:
-	ldr	r2, .L1932+32
+	b	.L1965
+.L1969:
+	ldr	r2, .L1979+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L1921
-	ldr	r3, .L1932+36
+	bcc	.L1968
+	ldr	r3, .L1979+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13332,36 +13579,36 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L1921:
+.L1968:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1910
+	bne	.L1957
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1910
-	ldr	r1, .L1932
-	movw	r2, #3322
-	ldr	r0, .L1932+4
+	cbz	r3, .L1957
+	ldr	r1, .L1979
+	movw	r2, #3353
+	ldr	r0, .L1979+4
 	bl	printf
-	ldr	r1, .L1932+8
-	ldr	r0, .L1932+12
+	ldr	r1, .L1979+8
+	ldr	r0, .L1979+12
 	bl	printf
-.L1910:
+.L1957:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1933:
+.L1980:
 	.align	2
-.L1932:
+.L1979:
 	.word	.LANCHOR208
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR38
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR120
-	.word	.LANCHOR54
-	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.word	.LANCHOR83
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
@@ -13374,16 +13621,16 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1954
+	ldr	r2, .L2001
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r3, [r2]
 	str	r2, [sp, #4]
 	cmp	r3, #0
-	bne	.L1936
-	ldr	r4, .L1954+4
-	ldr	fp, .L1954+108
-	ldr	r8, .L1954+112
-	ldr	r5, .L1954+8
+	bne	.L1983
+	ldr	r4, .L2001+4
+	ldr	fp, .L2001+108
+	ldr	r8, .L2001+112
+	ldr	r5, .L2001+8
 	ldr	r0, [fp]
 	ldr	r6, [r8]
 	ldrh	r2, [r4]
@@ -13391,21 +13638,21 @@ FtlVpcTblFlush:
 	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r7, .L1954+12
+	ldr	r7, .L2001+12
 	strh	r2, [r6]	@ movhi
 	str	r3, [r6, #12]
-	ldr	ip, .L1954+116
+	ldr	ip, .L2001+116
 	ldr	r2, [r4, #8]
 	str	r3, [r6, #8]
-	ldr	r3, .L1954+16
+	ldr	r3, .L2001+16
 	str	r2, [r6, #4]
 	stm	r7, {r3, ip}
 	ldrh	r3, [r4, #6]
 	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L1954+20
+	ldr	r3, .L2001+20
 	ldrh	r3, [r3]
 	strb	r3, [r7, #10]
-	ldr	r3, .L1954+24
+	ldr	r3, .L2001+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r7, #14]	@ movhi
@@ -13413,7 +13660,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1954+28
+	ldr	r3, .L2001+28
 	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
@@ -13422,7 +13669,7 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1954+32
+	ldr	r3, .L2001+32
 	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
 	strh	r2, [r7, #22]	@ movhi
@@ -13431,33 +13678,33 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1954+36
+	ldr	r3, .L2001+36
 	movs	r1, #255
 	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
 	str	r3, [r7, #32]
-	ldr	r3, .L1954+40
+	ldr	r3, .L2001+40
 	ldr	r3, [r3]
 	str	r3, [r7, #40]
-	ldr	r3, .L1954+44
+	ldr	r3, .L2001+44
 	ldr	r3, [r3]
 	str	r3, [r7, #36]
-	ldr	r3, .L1954+48
+	ldr	r3, .L2001+48
 	ldrh	r3, [r3]
 	strh	r3, [r7, #44]	@ movhi
-	ldr	r3, .L1954+52
+	ldr	r3, .L2001+52
 	ldrh	r3, [r3]
 	strh	r3, [r7, #46]	@ movhi
-	ldr	r3, .L1954+56
+	ldr	r3, .L2001+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
 	mov	r1, r7
-	ldr	r7, .L1954+60
+	ldr	r7, .L2001+60
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r7]
-	ldr	r3, .L1954+64
+	ldr	r3, .L2001+64
 	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
@@ -13465,7 +13712,7 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	ldrh	r0, [r7]
 	ldr	r3, [r5, #8]
-	ldr	r1, .L1954+68
+	ldr	r1, .L2001+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -13474,12 +13721,12 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L1954+72
+	ldr	r3, .L2001+72
 	ldrh	r3, [r3]
-	cbz	r3, .L1937
+	cbz	r3, .L1984
 	ldrh	r0, [r7]
-	ldr	r3, .L1954+76
-	ldr	r1, .L1954+80
+	ldr	r3, .L2001+76
+	ldr	r1, .L2001+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
@@ -13490,12 +13737,12 @@ FtlVpcTblFlush:
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L1937:
+.L1984:
 	movs	r7, #0
 	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-.L1938:
+.L1985:
 	ldr	r3, [fp]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
@@ -13504,18 +13751,18 @@ FtlVpcTblFlush:
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L1954+84
+	ldr	r3, .L2001+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1939
+	blt	.L1986
 	movs	r3, #0
 	ldrh	r10, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1954+40
-	ldr	r1, .L1954+40
+	ldr	r3, .L2001+40
+	ldr	r1, .L2001+40
 	strh	r0, [r4]	@ movhi
 	ldr	r3, [r3]
 	adds	r2, r3, #1
@@ -13525,9 +13772,9 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r6, #4]
 	strh	r0, [r6, #2]	@ movhi
-.L1939:
+.L1986:
 	movs	r3, #1
-	ldr	r0, .L1954+8
+	ldr	r0, .L2001+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -13537,77 +13784,77 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1940
+	bne	.L1987
 	cmp	r3, #1
-	bne	.L1941
-	ldr	r1, .L1954+88
-	movw	r2, #1209
-	ldr	r0, .L1954+92
+	bne	.L1988
+	ldr	r1, .L2001+88
+	movw	r2, #1217
+	ldr	r0, .L2001+92
 	bl	printf
-	ldr	r1, .L1954+96
-	ldr	r0, .L1954+100
+	ldr	r1, .L2001+96
+	ldr	r0, .L2001+100
 	bl	printf
-.L1941:
+.L1988:
 	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1954+84
+	ldreq	r3, .L2001+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L1938
+	bls	.L1985
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1954+104
+	ldr	r0, .L2001+104
 	bl	printf
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L1936:
+.L1983:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1940:
+.L1987:
 	cmp	r3, #1
-	beq	.L1938
+	beq	.L1985
 	cmp	r2, #256
-	beq	.L1938
+	beq	.L1985
 	movw	r3, #65535
 	cmp	r10, r3
-	beq	.L1936
+	beq	.L1983
 	movs	r1, #1
 	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1936
-.L1955:
+	b	.L1983
+.L2002:
 	.align	2
-.L1954:
-	.word	.LANCHOR77
+.L2001:
+	.word	.LANCHOR76
 	.word	.LANCHOR209
 	.word	.LANCHOR202
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	1179929683
 	.word	.LANCHOR45
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.word	.LANCHOR167
 	.word	.LANCHOR159
 	.word	.LANCHOR160
+	.word	.LANCHOR112
 	.word	.LANCHOR113
-	.word	.LANCHOR114
-	.word	.LANCHOR58
+	.word	.LANCHOR57
 	.word	.LANCHOR40
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LANCHOR0
-	.word	.LANCHOR70
-	.word	.LANCHOR67
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR131
-	.word	.LANCHOR54
+	.word	.LANCHOR53
 	.word	.LANCHOR210
 	.word	.LC5
 	.word	.LC6
@@ -13615,7 +13862,7 @@ FtlVpcTblFlush:
 	.word	.LC38
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	1342177360
+	.word	1342177363
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -13628,31 +13875,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1971
+	ldr	r3, .L2018
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L1956
-	ldr	r3, .L1971+4
+	bne	.L2003
+	ldr	r3, .L2018+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1967
+	beq	.L2014
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1967
+	bne	.L2014
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L1958:
+.L2005:
 	mov	r3, #-1
-	ldr	r2, .L1971+8
+	ldr	r2, .L2018+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L1971+12
+	ldr	r3, .L2018+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L1971+24
+	ldr	r10, .L2018+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -13668,38 +13915,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L1959:
+.L2006:
 	adds	r6, r6, #-1
-	bcc	.L1962
+	bcc	.L2009
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1960
-.L1962:
-	ldr	r3, .L1971+16
+	cbnz	r3, .L2007
+.L2009:
+	ldr	r3, .L2018+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1971+20
+	ldr	r3, .L2018+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1956:
+.L2003:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1967:
+.L2014:
 	movs	r6, #12
-	b	.L1958
-.L1960:
+	b	.L2005
+.L2007:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1962
+	beq	.L2009
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -13714,16 +13961,16 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1959
-.L1972:
+	b	.L2006
+.L2019:
 	.align	2
-.L1971:
-	.word	.LANCHOR77
-	.word	.LANCHOR8
+.L2018:
+	.word	.LANCHOR76
+	.word	.LANCHOR15
 	.word	.LANCHOR188
 	.word	.LANCHOR183
-	.word	.LANCHOR84
-	.word	.LANCHOR53
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.word	.LANCHOR160
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
@@ -13737,36 +13984,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1983
+	ldr	r3, .L2030
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L1983+4
+	ldr	r5, .L2030+4
 	ldr	r3, [r3]
-	ldr	r7, .L1983+8
-	ldr	r10, .L1983+20
+	ldr	r7, .L2030+8
+	ldr	r10, .L2030+20
 	str	r3, [r5, #8]
-	ldr	r3, .L1983+12
+	ldr	r3, .L2030+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L1974:
-	ldr	r3, .L1983+16
+.L2021:
+	ldr	r3, .L2030+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1979
+	bcc	.L2026
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1979:
+.L2026:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L1983+4
+	ldr	fp, .L2030+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1975:
+.L2022:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L1977
+	bgt	.L2024
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -13776,25 +14023,25 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1976
+	beq	.L2023
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L1976
+	bne	.L2023
 	strh	r4, [r7]	@ movhi
-.L1977:
+.L2024:
 	adds	r6, r6, #1
-	b	.L1974
-.L1976:
+	b	.L2021
+.L2023:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1975
-.L1984:
+	b	.L2022
+.L2031:
 	.align	2
-.L1983:
+.L2030:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
-	.word	.LANCHOR75+10
+	.word	.LANCHOR74+10
 	.word	.LANCHOR188
 	.word	.LANCHOR45
 	.word	.LANCHOR51
@@ -13813,12 +14060,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L1997
+	ldreq	r3, .L2044
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L1997+4
+	ldrne	r3, .L2044+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -13834,16 +14081,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1988
-.L1989:
+	bne	.L2035
+.L2036:
 	cmp	r6, r5
-	ble	.L1992
-.L1988:
+	ble	.L2039
+.L2035:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1992:
+.L2039:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -13856,25 +14103,25 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1990
+	bne	.L2037
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1990
+	bne	.L2037
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L1990
+	beq	.L2037
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L1989
-.L1990:
+	b	.L2036
+.L2037:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L1989
-.L1998:
+	b	.L2036
+.L2045:
 	.align	2
-.L1997:
-	.word	.LANCHOR54
+.L2044:
 	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -13888,24 +14135,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2028+48
-	ldr	r4, .L2028
+	ldr	r8, .L2075+48
+	ldr	r4, .L2075
 	ldr	r3, [r8]
-	ldr	r7, .L2028+4
+	ldr	r7, .L2075+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2028+8
+	ldr	r3, .L2075+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2000:
+.L2047:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2003
+	bgt	.L2050
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -13914,7 +14161,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2001
+	bne	.L2048
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -13922,104 +14169,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L2001:
+.L2048:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2002
+	beq	.L2049
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2002
-	ldr	r3, .L2028+12
+	bne	.L2049
+	ldr	r3, .L2075+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L2003:
-	ldr	r5, .L2028+12
+.L2050:
+	ldr	r5, .L2075+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L2017
+	beq	.L2064
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L2007
+	beq	.L2054
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2028
+	ldr	r0, .L2075
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2007
+	beq	.L2054
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L2007
+	bne	.L2054
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L2007
+	bls	.L2054
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L2007:
-	ldr	r10, .L2028
+.L2054:
+	ldr	r10, .L2075
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2009:
+.L2056:
 	cmp	r7, #0
-	bge	.L2012
-	ldr	r1, .L2028+16
+	bge	.L2059
+	ldr	r1, .L2075+16
 	movw	r2, #335
-	ldr	r0, .L2028+20
+	ldr	r0, .L2075+20
 	bl	printf
-	ldr	r1, .L2028+24
-	ldr	r0, .L2028+28
+	ldr	r1, .L2075+24
+	ldr	r0, .L2075+28
 	bl	printf
-.L2011:
+.L2058:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L2014
-	ldr	r3, .L2028+32
+	beq	.L2061
+	ldr	r3, .L2075+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L2014
-	ldr	r3, .L2028+36
+	beq	.L2061
+	ldr	r3, .L2075+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L2014
+	bcs	.L2061
 	cmp	r0, r3
-	bcs	.L2014
+	bcs	.L2061
 	bl	FtlSysBlkNumInit
-.L2014:
-	ldr	r6, .L2028+40
+.L2061:
+	ldr	r6, .L2075+40
 	movs	r5, #0
-	ldr	r7, .L2028+44
-	ldr	r8, .L2028+52
-.L2015:
+	ldr	r7, .L2075+44
+	ldr	r8, .L2075+52
+.L2062:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2016
+	bcc	.L2063
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2002:
+.L2049:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2000
-.L2012:
+	b	.L2047
+.L2059:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -14031,16 +14278,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2010
+	beq	.L2057
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L2011
-.L2010:
+	beq	.L2058
+.L2057:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2009
-.L2016:
+	b	.L2056
+.L2063:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14048,24 +14295,24 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L2015
-.L2017:
+	b	.L2062
+.L2064:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2029:
+.L2076:
 	.align	2
-.L2028:
+.L2075:
 	.word	.LANCHOR202
 	.word	.LANCHOR51
 	.word	.LANCHOR188
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LANCHOR211
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR37
 	.word	.LANCHOR41
-	.word	.LANCHOR75+24
+	.word	.LANCHOR74+24
 	.word	.LANCHOR45
 	.word	.LANCHOR183
 	.word	.LANCHOR123
@@ -14091,13 +14338,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L2031
+	blt	.L2078
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L2031
+	beq	.L2078
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2031
+	cbnz	r3, .L2078
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -14105,35 +14352,35 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L2043
+	ldr	r3, .L2090
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2032
+	bcc	.L2079
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2032:
-	ldr	r5, .L2043+4
+.L2079:
+	ldr	r5, .L2090+4
 	movs	r6, #0
-.L2033:
+.L2080:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L2039
+	bhi	.L2086
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2031:
-	ldr	r3, .L2043
+.L2078:
+	ldr	r3, .L2090
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2037
+	bcc	.L2084
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2037
-.L2039:
+	b	.L2084
+.L2086:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -14141,66 +14388,66 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L2034
-	ldr	r3, .L2043+8
+	bne	.L2081
+	ldr	r3, .L2090+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2043+4
+	ldr	r0, .L2090+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2043+12
+	ldr	r1, .L2090+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L2035
-	ldr	r1, .L2043+16
+	beq	.L2082
+	ldr	r1, .L2090+16
 	movw	r2, #661
-	ldr	r0, .L2043+20
+	ldr	r0, .L2090+20
 	bl	printf
-	ldr	r1, .L2043+24
-	ldr	r0, .L2043+28
+	ldr	r1, .L2090+24
+	ldr	r0, .L2090+28
 	bl	printf
-.L2035:
+.L2082:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	ldrh	r2, [r7, #8]
-	bne	.L2036
-.L2038:
+	bne	.L2083
+.L2085:
 	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2043+32
+	ldr	r0, .L2090+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2043+36
+	ldr	r3, .L2090+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2037:
+.L2084:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2036:
+.L2083:
 	cmp	r2, r10
-	bne	.L2038
+	bne	.L2085
 	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2038
+	bne	.L2085
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2034:
+.L2081:
 	adds	r6, r6, #1
-	b	.L2033
-.L2044:
+	b	.L2080
+.L2091:
 	.align	2
-.L2043:
-	.word	.LANCHOR54
+.L2090:
+	.word	.LANCHOR53
 	.word	.LANCHOR202
 	.word	.LANCHOR184
 	.word	.LANCHOR188
@@ -14209,7 +14456,7 @@ ftl_map_blk_gc:
 	.word	.LC6
 	.word	.LC7
 	.word	.LC39
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -14222,26 +14469,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2055
-	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r3, .L2106
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2046
+	cbnz	r5, .L2093
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2047
+	bne	.L2094
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2048
-	ldr	r1, .L2055+4
+	cbz	r3, .L2095
+	ldr	r1, .L2106+4
 	movw	r2, #697
-	ldr	r0, .L2055+8
+	ldr	r0, .L2106+8
 	bl	printf
-	ldr	r1, .L2055+12
-	ldr	r0, .L2055+16
+	ldr	r1, .L2106+12
+	ldr	r0, .L2106+16
 	bl	printf
-.L2048:
+.L2095:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14253,77 +14500,88 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2046:
+.L2093:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L2047:
-	ldrh	r6, [r6, r3, lsl #1]
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2094:
+	ldrh	r8, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L2055+20
-	ldr	r8, .L2055+32
-	ldr	r7, [r0, #24]
-	orr	r3, r3, r6, lsl #10
-	ldr	r0, [r8]
-	str	r3, [r2, #4]
-	ldr	r3, .L2055+24
-	str	r0, [r2, #8]
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r6, [r3, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L2055+28
+	ldr	r7, .L2106+20
+	ldr	fp, .L2106+40
+	ldr	r10, [r0, #24]
+	orr	r3, r3, r8, lsl #10
+	ldr	r0, [fp]
+	str	r3, [r7, #4]
+	ldr	r3, .L2106+24
+	str	r0, [r7, #8]
+	ldr	r6, [r3]
+	ldr	r3, [r4, #28]
+	str	r6, [r7, #12]
+	str	r3, [r6, #4]
+	movw	r3, #64245
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r8, [r6, #2]	@ movhi
+	strh	r3, [r6]	@ movhi
+	ldr	r3, .L2106+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
 	ldrh	ip, [r4, #6]
 	mov	r3, r5
-	ldr	r1, [r8]
+	ldr	r1, [fp]
 	mov	r2, r5
-.L2049:
+.L2096:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2051
+	bhi	.L2098
+	ldr	r3, .L2106+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2099
+	ldr	r3, .L2106+36
+	ldr	r0, [r7, #8]
+	ldrh	r1, [r3]
+	bl	js_hash
+	str	r0, [r6, #12]
+.L2099:
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2055+20
+	ldr	r0, .L2106+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2046
-.L2051:
-	ldr	r0, [r7, r3, lsl #2]
-	cmp	r6, r0, lsr #10
-	bne	.L2050
+	b	.L2093
+.L2098:
+	ldr	r0, [r10, r3, lsl #2]
+	cmp	r8, r0, lsr #10
+	bne	.L2097
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
-	ldr	r0, [r7, r3, lsl #2]
+	ldr	r0, [r10, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2050:
+.L2097:
 	adds	r3, r3, #1
-	b	.L2049
-.L2056:
+	b	.L2096
+.L2107:
 	.align	2
-.L2055:
-	.word	.LANCHOR77
+.L2106:
+	.word	.LANCHOR76
 	.word	.LANCHOR213
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR1
+	.word	.LANCHOR57
 	.word	.LANCHOR183
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
@@ -14339,13 +14597,12 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2079+40
+	ldr	r10, .L2134+44
 	mov	r8, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
-	mov	fp, r10
-.L2058:
-	ldr	r2, .L2079
+.L2109:
+	ldr	r2, .L2134
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -14353,143 +14610,155 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2059
+	bge	.L2110
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2060
-.L2059:
+	bne	.L2111
+.L2110:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2060:
-	ldr	r3, .L2079+4
+.L2111:
+	ldr	r3, .L2134+4
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2075
+	bne	.L2129
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2062
-	ldr	r1, .L2079+8
-	movw	r2, #757
-	ldr	r0, .L2079+12
+	cbnz	r3, .L2113
+	ldr	r1, .L2134+8
+	movw	r2, #759
+	ldr	r0, .L2134+12
 	bl	printf
-	ldr	r1, .L2079+16
-	ldr	r0, .L2079+20
+	ldr	r1, .L2134+16
+	ldr	r0, .L2134+20
 	bl	printf
-.L2062:
+.L2113:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2063
-	ldr	r1, .L2079+8
-	movw	r2, #758
-	ldr	r0, .L2079+12
+	bcc	.L2114
+	ldr	r1, .L2134+8
+	mov	r2, #760
+	ldr	r0, .L2134+12
 	bl	printf
-	ldr	r1, .L2079+16
-	ldr	r0, .L2079+20
+	ldr	r1, .L2134+16
+	ldr	r0, .L2134+20
 	bl	printf
-.L2063:
+.L2114:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2079+24
+	ldr	r5, .L2134+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
+	mov	fp, r5
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #4]
 	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2079+28
+	ldr	r3, .L2134+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
 	ldr	r3, [r5, #12]
-	mov	r0, r5
 	ldr	r2, [r4, #28]
-	strh	r8, [r3, #8]	@ movhi
+	str	r3, [sp, #12]
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
+	strh	r8, [r3, #8]	@ movhi
 	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2134+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2115
+	ldr	r2, .L2134+36
+	ldr	r0, [r5, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	str	r0, [r3, #12]
+.L2115:
 	movs	r3, #1
+	ldr	r0, .L2134+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r1, [r5]
-	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r1, #1
-	mov	r3, r5
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L2064
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r5]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r1, r2, #1
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L2116
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2079+32
+	ldr	r0, .L2134+40
 	uxth	r6, r6
-	str	r5, [sp, #12]
 	bl	printf
-	ldrh	r2, [r4, #2]
-	ldr	r3, [sp, #12]
-	cmp	r2, #2
-	ittt	ls
-	ldrhls	r2, [fp]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
+	ldrh	r3, [r4, #2]
+	cmp	r3, #2
+	itttt	ls
+	ldrls	r3, .L2134+44
+	ldrhls	r3, [r3]
+	addls	r3, r3, #-1
+	strhls	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2058
+	bls	.L2109
 	mov	r2, r6
-	ldr	r1, [r3, #4]
-	ldr	r0, .L2079+36
+	ldr	r1, [fp, #4]
+	ldr	r0, .L2134+48
 	bl	printf
 	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2075:
+.L2129:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2064:
-	cbz	r1, .L2067
-	cmp	r2, #1
+.L2116:
+	cbz	r2, .L2119
+	cmp	r3, #1
 	strh	r7, [r4, #40]	@ movhi
-	bne	.L2068
-.L2069:
+	bne	.L2120
+.L2121:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L2058
-.L2068:
-	cmp	r1, #256
-.L2078:
-	beq	.L2069
-	ldr	r2, [r4, #36]
-	cmp	r2, #0
-	bne	.L2069
-	ldr	r2, [r3, #4]
+	b	.L2109
+.L2120:
+	cmp	r2, #256
+.L2133:
+	beq	.L2121
+	ldr	r3, [r4, #36]
+	cmp	r3, #0
+	bne	.L2121
+	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2075
-.L2067:
-	cmp	r2, #1
-	b	.L2078
-.L2080:
+	b	.L2129
+.L2119:
+	cmp	r3, #1
+	b	.L2133
+.L2135:
 	.align	2
-.L2079:
+.L2134:
 	.word	.LANCHOR165
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.word	.LANCHOR214
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR202
 	.word	.LANCHOR188
+	.word	.LANCHOR1
+	.word	.LANCHOR57
 	.word	.LC40
+	.word	.LANCHOR53
 	.word	.LC41
-	.word	.LANCHOR54
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -14504,9 +14773,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2082
+	ldr	r5, .L2137
 	muls	r4, r0, r4
-	ldr	r0, .L2082+4
+	ldr	r0, .L2137+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -14519,10 +14788,10 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2083:
+.L2138:
 	.align	2
-.L2082:
-	.word	.LANCHOR97
+.L2137:
+	.word	.LANCHOR96
 	.word	.LANCHOR127
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
@@ -14538,32 +14807,32 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2088
-	ldr	r6, .L2088+4
-.L2085:
+	ldr	r5, .L2143
+	ldr	r6, .L2143+4
+.L2140:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2087
+	bhi	.L2142
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2087:
+.L2142:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2086
+	bge	.L2141
 	bl	flush_l2p_region
-.L2086:
+.L2141:
 	adds	r4, r4, #1
-	b	.L2085
-.L2089:
+	b	.L2140
+.L2144:
 	.align	2
-.L2088:
-	.word	.LANCHOR68
-	.word	.LANCHOR97
+.L2143:
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -14576,7 +14845,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2102
+	ldr	r3, .L2157
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -14585,26 +14854,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2098
-	ldr	r3, .L2102+4
+	bhi	.L2153
+	ldr	r3, .L2157+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2092:
-	cbnz	r5, .L2097
-.L2090:
+.L2147:
+	cbnz	r5, .L2152
+.L2145:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2097:
-	ldr	r3, .L2102+8
+.L2152:
+	ldr	r3, .L2157+8
 	mov	r0, r7
-	ldr	r10, .L2102+24
+	ldr	r10, .L2157+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2102+12
+	ldr	r3, .L2157+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -14618,9 +14887,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2094
+	cbz	r2, .L2149
 	cmp	r4, r3
-	beq	.L2094
+	beq	.L2149
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -14630,7 +14899,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2095:
+.L2150:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -14643,7 +14912,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2102+16
+	ldr	r0, .L2157+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -14654,26 +14923,26 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2092
-.L2094:
-	ldr	r3, .L2102+20
+	b	.L2147
+.L2149:
+	ldr	r3, .L2157+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2095
-.L2098:
+	b	.L2150
+.L2153:
 	mov	r8, #-1
-	b	.L2090
-.L2103:
+	b	.L2145
+.L2158:
 	.align	2
-.L2102:
+.L2157:
 	.word	.LANCHOR50
-	.word	.LANCHOR57
-	.word	.LANCHOR194
 	.word	.LANCHOR56
+	.word	.LANCHOR194
+	.word	.LANCHOR55
 	.word	.LANCHOR215
-	.word	.LANCHOR58
+	.word	.LANCHOR57
 	.word	.LANCHOR185
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
@@ -14688,66 +14957,66 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2106
-	ldr	r3, .L2106+4
+	ldr	r2, .L2161
+	ldr	r3, .L2161+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2104
-	ldr	r3, .L2106+8
+	bne	.L2159
+	ldr	r3, .L2161+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2106+12
+	ldr	r3, .L2161+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2106+16
+	ldr	r3, .L2161+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2106+20
+	ldr	r3, .L2161+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2106+24
+	ldr	r3, .L2161+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2106+28
+	ldr	r3, .L2161+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2106+32
+	ldr	r3, .L2161+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2106+36
+	ldr	r3, .L2161+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2106+40
+	ldr	r3, .L2161+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2106+44
+	ldr	r3, .L2161+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2106+48
+	ldr	r3, .L2161+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2106+52
+	ldr	r3, .L2161+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2106+56
+	ldr	r3, .L2161+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2106+60
+	ldr	r3, .L2161+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2106+64
+	ldr	r3, .L2161+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2104:
+.L2159:
 	bx	lr
-.L2107:
+.L2162:
 	.align	2
-.L2106:
+.L2161:
 	.word	.LANCHOR138
 	.word	1179929683
-	.word	1342177360
+	.word	1342177363
 	.word	.LANCHOR216
 	.word	.LANCHOR217
 	.word	.LANCHOR161
@@ -14755,7 +15024,7 @@ Ftl_save_ext_data:
 	.word	.LANCHOR166
 	.word	.LANCHOR165
 	.word	.LANCHOR168
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR169
@@ -14775,40 +15044,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2115
+	ldr	r3, .L2170
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2113
-	ldr	r3, .L2115+4
+	beq	.L2168
+	ldr	r3, .L2170+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2109:
-	ldr	r1, .L2115+8
+.L2164:
+	ldr	r1, .L2170+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2115+12
-	cbnz	r0, .L2111
+	ldr	r2, .L2170+12
+	cbnz	r0, .L2166
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2112
-.L2111:
+	bcc	.L2167
+.L2166:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2115+16
+	ldr	r3, .L2170+16
 	str	r3, [r2]
-	ldr	r3, .L2115+20
+	ldr	r3, .L2170+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -14819,15 +15088,15 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2112:
+.L2167:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2113:
+.L2168:
 	movs	r3, #32
-	b	.L2109
-.L2116:
+	b	.L2164
+.L2171:
 	.align	2
-.L2115:
+.L2170:
 	.word	.LANCHOR28
 	.word	.LANCHOR170
 	.word	.LANCHOR218
@@ -14846,120 +15115,120 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2144
+	ldr	r3, .L2199
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2118
-	ldr	r1, .L2144+4
-	movw	r2, #3233
-	ldr	r0, .L2144+8
+	bcs	.L2173
+	ldr	r1, .L2199+4
+	mov	r2, #3264
+	ldr	r0, .L2199+8
 	bl	printf
-	ldr	r1, .L2144+12
-	ldr	r0, .L2144+16
+	ldr	r1, .L2199+12
+	ldr	r0, .L2199+16
 	bl	printf
-.L2118:
-	ldr	r3, .L2144+20
+.L2173:
+	ldr	r3, .L2199+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2119
+	bne	.L2174
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2120
-	ldr	r3, .L2144+24
+	beq	.L2175
+	ldr	r3, .L2199+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2121
+	cbz	r3, .L2176
 	bl	INSERT_DATA_LIST
-.L2120:
+.L2175:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2144+28
+	ldr	r3, .L2199+28
 	cmp	r4, r3
-	beq	.L2122
-	ldr	r3, .L2144+32
+	beq	.L2177
+	ldr	r3, .L2199+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2122
-	ldr	r3, .L2144+36
+	beq	.L2177
+	ldr	r3, .L2199+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2123
-.L2122:
+	cbz	r3, .L2178
+.L2177:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2124:
-	ldr	r6, .L2144+40
+.L2179:
+	ldr	r6, .L2199+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2129
+	beq	.L2184
 	cmp	r5, r0
-	bne	.L2130
-	ldr	r3, .L2144+24
+	bne	.L2185
+	ldr	r3, .L2199+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2131
-.L2130:
+	cbz	r3, .L2186
+.L2185:
 	bl	update_vpc_list
-.L2131:
+.L2186:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2129:
+.L2184:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2119:
+.L2174:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2121:
+.L2176:
 	bl	INSERT_FREE_LIST
-	b	.L2120
-.L2123:
-	ldr	r3, .L2144+44
+	b	.L2175
+.L2178:
+	ldr	r3, .L2199+44
 	cmp	r4, r3
-	bne	.L2124
+	bne	.L2179
 	cmp	r2, #3
-	beq	.L2126
-	ldr	r2, .L2144+48
+	beq	.L2181
+	ldr	r2, .L2199+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2127
-.L2126:
+	bne	.L2182
+.L2181:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2127:
-	ldr	r2, .L2144+52
+.L2182:
+	ldr	r2, .L2199+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2124
-	ldr	r2, .L2144+56
+	beq	.L2179
+	ldr	r2, .L2199+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2124
-.L2145:
+	b	.L2179
+.L2200:
 	.align	2
-.L2144:
+.L2199:
 	.word	.LANCHOR40
 	.word	.LANCHOR219
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR77
-	.word	.LANCHOR84
-	.word	.LANCHOR93
+	.word	.LANCHOR76
+	.word	.LANCHOR83
+	.word	.LANCHOR92
 	.word	.LANCHOR44
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR133
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR158
 	.word	.LANCHOR28
 	.word	.LANCHOR170
@@ -14975,7 +15244,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2156
+	ldr	r3, .L2211
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -14984,28 +15253,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2155
-	ldr	r3, .L2156+4
+	bhi	.L2210
+	ldr	r3, .L2211+4
 	mov	r8, #0
-	ldr	fp, .L2156+28
+	ldr	fp, .L2211+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2148:
-	cbnz	r6, .L2154
-.L2146:
+.L2203:
+	cbnz	r6, .L2209
+.L2201:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2154:
-	ldr	r3, .L2156+8
+.L2209:
+	ldr	r3, .L2211+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2156+12
+	ldr	r2, .L2211+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15020,7 +15289,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2150
+	beq	.L2205
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15034,28 +15303,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2156+16
+	ldr	r2, .L2211+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2152
+	bne	.L2207
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2156+20
+	ldr	r0, .L2211+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2156+24
+	ldr	r0, .L2211+24
 	bl	FtlMapWritePage
-.L2152:
+.L2207:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2153:
+.L2208:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15064,23 +15333,23 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2148
-.L2150:
+	b	.L2203
+.L2205:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2153
-.L2155:
+	b	.L2208
+.L2210:
 	mov	r8, #-1
-	b	.L2146
-.L2157:
+	b	.L2201
+.L2212:
 	.align	2
-.L2156:
+.L2211:
 	.word	.LANCHOR50
-	.word	.LANCHOR57
-	.word	.LANCHOR194
 	.word	.LANCHOR56
+	.word	.LANCHOR194
+	.word	.LANCHOR55
 	.word	.LANCHOR202
 	.word	.LC42
 	.word	.LANCHOR215
@@ -15099,30 +15368,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2160
-	ldr	r5, .L2160+4
+	ldr	r4, .L2215
+	ldr	r5, .L2215+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2160+8
+	ldr	r3, .L2215+8
 	cmp	r2, r3
-	beq	.L2159
-	ldr	r1, .L2160+12
-	ldr	r0, .L2160+16
+	beq	.L2214
+	ldr	r1, .L2215+12
+	ldr	r0, .L2215+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2159:
+.L2214:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2161:
+.L2216:
 	.align	2
-.L2160:
+.L2215:
 	.word	.LANCHOR191
 	.word	.LANCHOR190
 	.word	1112818501
@@ -15142,92 +15411,92 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2166
+	ldr	r4, .L2221
 	movs	r0, #0
-	ldr	r5, .L2166+4
+	ldr	r5, .L2221+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2163
+	beq	.L2218
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2163:
+.L2218:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2166+8
-	bne	.L2164
+	ldr	r5, .L2221+8
+	bne	.L2219
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2166+12
+	ldr	r3, .L2221+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2166+16
+	ldr	r3, .L2221+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2166+20
+	ldr	r3, .L2221+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2166+24
+	ldr	r3, .L2221+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2166+28
+	ldr	r3, .L2221+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2166+32
+	ldr	r3, .L2221+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2166+36
+	ldr	r3, .L2221+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2166+40
+	ldr	r3, .L2221+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2166+44
+	ldr	r3, .L2221+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2166+48
+	ldr	r3, .L2221+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2166+52
+	ldr	r3, .L2221+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2166+56
+	ldr	r3, .L2221+56
 	str	r2, [r3]
-.L2164:
-	ldr	r3, .L2166+60
+.L2219:
+	ldr	r3, .L2221+60
 	movs	r2, #0
 	str	r2, [r3]
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2166+64
+	ldr	r3, .L2221+64
 	cmp	r2, r3
-	bne	.L2165
-	ldr	r3, .L2166+68
+	bne	.L2220
+	ldr	r3, .L2221+68
 	movs	r2, #1
-	ldr	r1, .L2166+72
-	ldr	r0, .L2166+76
+	ldr	r1, .L2221+72
+	ldr	r0, .L2221+76
 	str	r2, [r3]
 	bl	printf
-.L2165:
-	ldr	r3, .L2166+80
-	ldr	r1, .L2166+84
+.L2220:
+	ldr	r3, .L2221+80
+	ldr	r1, .L2221+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2166+88
+	ldr	r3, .L2221+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2166+92
+	ldr	r3, .L2221+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2167:
+.L2222:
 	.align	2
-.L2166:
+.L2221:
 	.word	.LANCHOR138
 	.word	1179929683
 	.word	.LANCHOR168
@@ -15237,7 +15506,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR162
 	.word	.LANCHOR166
 	.word	.LANCHOR165
-	.word	.LANCHOR80
+	.word	.LANCHOR79
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR169
@@ -15298,34 +15567,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2170
+	beq	.L2225
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2184
+	ldr	r3, .L2239
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2170
-	ldr	r3, .L2184+4
-	ldr	r5, .L2184+8
+	bne	.L2225
+	ldr	r3, .L2239+4
+	ldr	r5, .L2239+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2184+12
+	ldr	r3, .L2239+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2174
-	ldr	r2, .L2184+16
+	cbz	r3, .L2229
+	ldr	r2, .L2239+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2174
+	bge	.L2229
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2174
+	beq	.L2229
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -15337,50 +15606,50 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2174
+	beq	.L2229
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2174
+	bne	.L2229
 	ldr	r2, [r5, #8]
-.L2183:
+.L2238:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2174:
+.L2229:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2175
+	cbz	r3, .L2230
 	movs	r2, #1
-	ldr	r0, .L2184+8
+	ldr	r0, .L2239+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2176:
+.L2231:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2183
-.L2175:
-	ldr	r3, .L2184+20
+	b	.L2238
+.L2230:
+	ldr	r3, .L2239+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2176
-.L2170:
+	b	.L2231
+.L2225:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2185:
+.L2240:
 	.align	2
-.L2184:
-	.word	.LANCHOR77
+.L2239:
+	.word	.LANCHOR76
 	.word	.LANCHOR184
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR54
-	.word	.LANCHOR58
+	.word	.LANCHOR53
+	.word	.LANCHOR57
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -15395,69 +15664,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2268
+	ldr	r5, .L2323
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2268+4
+	ldr	r3, .L2323+4
 	ldr	r2, [r5]
-	ldr	r6, .L2268+8
+	ldr	r6, .L2323+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2268+12
+	ldr	r3, .L2323+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2268+16
+	ldr	r7, .L2323+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2268+20
+	ldr	r3, .L2323+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2268+24
+	ldr	r3, .L2323+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2268+28
+	ldr	r3, .L2323+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-	movs	r2, #12
+	movs	r2, #16
 	movs	r1, #255
-	ldr	r0, .L2268+32
+	ldr	r0, .L2323+32
 	bl	ftl_memset
-	ldr	r3, .L2268+36
+	ldr	r3, .L2323+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2187:
-	ldr	r3, .L2268+40
+.L2242:
+	ldr	r3, .L2323+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2229
-	ldr	r3, .L2268+44
+	bls	.L2284
+	ldr	r3, .L2323+44
 	movs	r5, #0
-	ldr	r1, .L2268+48
+	ldr	r1, .L2323+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2268+52
+	ldr	r3, .L2323+52
 	ldr	r2, [r1]
-	ldr	r1, .L2268+56
+	ldr	r1, .L2323+56
 	ldr	r6, [r3]
-	ldr	r3, .L2268+60
+	ldr	r3, .L2323+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2268+64
-	b	.L2230
-.L2189:
+	ldr	r2, .L2323+64
+	b	.L2285
+.L2244:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -15467,7 +15736,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2188
+	cbnz	r0, .L2243
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -15480,31 +15749,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2188:
+.L2243:
 	adds	r5, r5, #1
-.L2230:
+.L2285:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2189
+	bhi	.L2244
 	cmp	fp, #0
-	bne	.L2190
-.L2228:
+	bne	.L2245
+.L2283:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2187
-.L2190:
+	b	.L2242
+.L2245:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2191:
+.L2246:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2228
-	ldr	r3, .L2268+52
+	bls	.L2283
+	ldr	r3, .L2323+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -15514,10 +15783,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2194
+	bne	.L2249
 	mov	r10, #16
-.L2196:
-	ldr	r3, .L2268+52
+.L2251:
+	ldr	r3, .L2323+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -15529,88 +15798,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2268+52
+	ldr	r3, .L2323+52
 	ldr	r3, [r3]
-	bne	.L2193
+	bne	.L2248
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2268+52
+	ldr	r3, .L2323+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2195
-.L2194:
-	ldr	r3, .L2268+68
+	beq	.L2250
+.L2249:
+	ldr	r3, .L2323+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2197
+	beq	.L2252
 	cmp	r2, r3
-	bhi	.L2198
-.L2197:
+	bhi	.L2253
+.L2252:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2268+68
+	ldrne	r1, .L2323+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2198:
+.L2253:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2200
-	bhi	.L2201
+	beq	.L2255
+	bhi	.L2256
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2202
-.L2199:
+	beq	.L2257
+.L2254:
 	adds	r7, r7, #1
-	b	.L2191
-.L2193:
+	b	.L2246
+.L2248:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2194
+	bne	.L2249
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2196
-.L2195:
-	ldr	r3, .L2268+72
+	bne	.L2251
+.L2250:
+	ldr	r3, .L2323+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2267
-.L2226:
+	cbnz	r1, .L2322
+.L2281:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2199
-.L2201:
+	b	.L2254
+.L2256:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2203
+	beq	.L2258
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2199
-.L2267:
+	bne	.L2254
+.L2322:
 	movs	r1, #0
-	b	.L2226
-.L2203:
-	ldr	r3, .L2268+8
+	b	.L2281
+.L2258:
+	ldr	r3, .L2323+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2268
+	ldr	r3, .L2323
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2205
-	ldr	r1, .L2268+76
-	movw	r2, #1297
-	ldr	r0, .L2268+80
+	bls	.L2260
+	ldr	r1, .L2323+76
+	movw	r2, #1305
+	ldr	r0, .L2323+80
 	bl	printf
-	ldr	r1, .L2268+84
-	ldr	r0, .L2268+88
+	ldr	r1, .L2323+84
+	ldr	r0, .L2323+88
 	bl	printf
-.L2205:
+.L2260:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2268+12
+	ldr	r2, .L2323+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -15618,61 +15887,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2206:
+.L2261:
 	cmp	r3, r10
-	bgt	.L2212
+	bgt	.L2267
 	cmp	r3, #0
-	bge	.L2245
-	b	.L2199
-.L2212:
+	bge	.L2300
+	b	.L2254
+.L2267:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2207
+	bls	.L2262
 	ldr	r2, [ip]
-	cbnz	r2, .L2208
+	cbnz	r2, .L2263
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2268+8
+	ldrne	r2, .L2323+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2208:
-	ldr	r2, .L2268+20
+.L2263:
+	ldr	r2, .L2323+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2209:
+.L2264:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2210
+	bhi	.L2265
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2199
-	ldr	r2, .L2268+8
+	blt	.L2254
+	ldr	r2, .L2323+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2268
+	ldr	r2, .L2323
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2199
-.L2245:
-	ldr	r2, .L2268+8
+	bgt	.L2254
+.L2300:
+	ldr	r2, .L2323+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2268+20
-.L2265:
+	ldr	r2, .L2323+20
+.L2320:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2199
-.L2210:
+	b	.L2254
+.L2265:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15680,106 +15949,106 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2209
-.L2207:
+	b	.L2264
+.L2262:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2206
-.L2269:
+	b	.L2261
+.L2324:
 	.align	2
-.L2268:
-	.word	.LANCHOR65
-	.word	.LANCHOR71
+.L2323:
+	.word	.LANCHOR64
+	.word	.LANCHOR70
 	.word	.LANCHOR128
 	.word	.LANCHOR130
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR129
 	.word	.LANCHOR193
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR209
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR180
-	.word	.LANCHOR59
 	.word	.LANCHOR105
+	.word	.LANCHOR180
+	.word	.LANCHOR58
+	.word	.LANCHOR104
 	.word	.LANCHOR47
 	.word	.LANCHOR159
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2202:
-	ldr	r8, .L2270+20
-	ldr	r10, .L2270+28
+.L2257:
+	ldr	r8, .L2325+20
+	ldr	r10, .L2325+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2215
-	ldr	r1, .L2270
-	mov	r2, #1344
-	ldr	r0, .L2270+4
+	bls	.L2270
+	ldr	r1, .L2325
+	mov	r2, #1352
+	ldr	r0, .L2325+4
 	bl	printf
-	ldr	r1, .L2270+8
-	ldr	r0, .L2270+12
+	ldr	r1, .L2325+8
+	ldr	r0, .L2325+12
 	bl	printf
-.L2215:
-	ldr	r2, .L2270+16
+.L2270:
+	ldr	r2, .L2325+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2216:
+.L2271:
 	cmp	r3, r10
-	ble	.L2221
+	ble	.L2276
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2217
+	bls	.L2272
 	ldr	r2, [r0]
-	cbnz	r2, .L2218
+	cbnz	r2, .L2273
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2270+20
+	ldrne	r2, .L2325+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2218:
-	ldr	r2, .L2270+24
+.L2273:
+	ldr	r2, .L2325+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2219:
+.L2274:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2220
+	bhi	.L2275
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2221:
+.L2276:
 	cmp	r3, #0
-	blt	.L2199
-	ldr	r2, .L2270+28
-	ldr	ip, .L2270+20
+	blt	.L2254
+	ldr	r2, .L2325+28
+	ldr	ip, .L2325+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2199
+	bgt	.L2254
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2270+24
-	b	.L2265
-.L2220:
+	ldr	r2, .L2325+24
+	b	.L2320
+.L2275:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15787,91 +16056,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2219
-.L2217:
+	b	.L2274
+.L2272:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2216
-.L2200:
-	ldr	r8, .L2270+48
+	b	.L2271
+.L2255:
+	ldr	r8, .L2325+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2223
-.L2266:
+	bne	.L2278
+.L2321:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2199
-.L2223:
+	b	.L2254
+.L2278:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2224
+	beq	.L2279
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2224:
+.L2279:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2225
+	bcs	.L2280
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2266
-.L2225:
+	b	.L2321
+.L2280:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2199
-.L2229:
-	ldr	r3, .L2270+32
+	b	.L2254
+.L2284:
+	ldr	r3, .L2325+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2231
-.L2234:
-	ldr	r3, .L2270+24
+	cbz	r3, .L2286
+.L2289:
+	ldr	r3, .L2325+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2232
-.L2233:
-	ldr	r3, .L2270+36
+	beq	.L2287
+.L2288:
+	ldr	r3, .L2325+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2270+40
+	ldr	r3, .L2325+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2264
-	ldr	r1, .L2270
-	movw	r2, #1478
-	ldr	r0, .L2270+4
+	bls	.L2319
+	ldr	r1, .L2325
+	movw	r2, #1486
+	ldr	r0, .L2325+4
 	bl	printf
-	ldr	r1, .L2270+8
-	ldr	r0, .L2270+12
+	ldr	r1, .L2325+8
+	ldr	r0, .L2325+12
 	bl	printf
-.L2264:
+.L2319:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2231:
-	ldr	r1, .L2270+36
+.L2286:
+	ldr	r1, .L2325+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2234
-	ldr	r5, .L2270+40
+	beq	.L2289
+	ldr	r5, .L2325+40
 	ldr	r0, [r5]
-.L2235:
+.L2290:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2234
+	bcs	.L2289
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2235
-	ldr	r3, .L2270+44
+	beq	.L2290
+	ldr	r3, .L2325+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2236:
+.L2291:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2234
+	bcs	.L2289
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -15880,30 +16149,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2236
-.L2232:
-	ldr	r3, .L2270+20
+	b	.L2291
+.L2287:
+	ldr	r3, .L2325+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2233
-	ldr	r5, .L2270+28
+	beq	.L2288
+	ldr	r5, .L2325+28
 	ldrh	r1, [r5]
-.L2241:
+.L2296:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2233
+	bge	.L2288
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2241
-	ldr	r2, .L2270+16
+	beq	.L2296
+	ldr	r2, .L2325+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2242:
+.L2297:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2233
+	bge	.L2288
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -15912,21 +16181,21 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2242
-.L2271:
+	b	.L2297
+.L2326:
 	.align	2
-.L2270:
+.L2325:
 	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR193
+	.word	.LANCHOR70
 	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR129
 	.word	.LANCHOR128
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	.LANCHOR130
 	.word	.LANCHOR209
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -15943,76 +16212,127 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L2297+156
-	ldr	r5, .L2297
+	ldr	r8, .L2361+164
+	ldr	r6, .L2361
 	ldr	r3, [r8]
-	ldr	r4, .L2297+4
-	ldr	r10, .L2297+160
-	ldrh	r2, [r5]
-	ldr	r7, .L2297+8
+	ldr	r4, .L2361+4
+	ldr	r10, .L2361+168
+	ldrh	r2, [r6]
+	ldr	r5, .L2361+8
 	str	r3, [r4, #8]
-	ldr	r6, .L2297+12
+	ldr	r7, .L2361+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
-	ldr	r0, [r7]
+	ldr	r0, [r5]
 	str	r3, [r4, #12]
 	bl	ftl_memset
-	ldrh	r0, [r6]
+	ldrh	r0, [r7]
 	movw	r3, #65535
-	str	r7, [sp]
+	str	r5, [sp]
 	cmp	r0, r3
-	bne	.L2273
-.L2282:
+	bne	.L2328
+.L2340:
 	mov	r0, #-1
-.L2272:
+.L2327:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2273:
+.L2328:
 	movs	r1, #1
-	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L2297+16
-	sxth	r7, r0
+	ldrsh	fp, [r7]
+	sxth	r5, r0
 	adds	r0, r0, #1
-	strh	r0, [r6, #2]	@ movhi
-.L2275:
-	cmp	r7, #0
-	bge	.L2278
-	ldr	r1, .L2297+20
-	movw	r2, #1538
-	ldr	r0, .L2297+24
+	strh	r0, [r7, #2]	@ movhi
+.L2330:
+	cmp	r5, #0
+	bge	.L2336
+	movw	r2, #1555
+	ldr	r1, .L2361+16
+	ldr	r0, .L2361+20
 	bl	printf
-	ldr	r1, .L2297+28
-	ldr	r0, .L2297+32
+	ldr	r1, .L2361+24
+	ldr	r0, .L2361+28
 	bl	printf
-.L2277:
-	ldr	r2, .L2297+36
-	ldrh	r3, [r5]
+	b	.L2335
+.L2336:
+	orr	r2, r5, fp, lsl #10
+	ldr	r0, .L2361+4
+	str	r2, [r4, #4]
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, .L2361+32
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L2331
+	ldr	r2, [r4, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #4]
+	cbz	r2, .L2331
+	ldr	r1, .L2361+36
+	ldr	r0, [r4, #8]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r2, [sp, #4]
+	cmp	r2, r0
+	beq	.L2331
+	cbnz	r5, .L2332
+	ldrh	r2, [r7, #4]
+	cmp	fp, r2
+	beq	.L2332
+	sxth	fp, r2
+	ldr	r2, .L2361+40
+	ldrh	r5, [r2]
+.L2334:
+	subs	r5, r5, #1
+	sxth	r5, r5
+	b	.L2330
+.L2332:
+	mov	r2, #-1
+	str	r2, [r4]
+.L2331:
+	ldr	r2, [r4]
+	adds	r2, r2, #1
+	beq	.L2334
+	ldr	r2, [r8]
+	ldr	r3, .L2361+44
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L2334
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	bne	.L2334
+.L2335:
+	ldr	r2, .L2361+36
+	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2280
-	ldr	r1, .L2297+20
-	movw	r2, #1540
-	ldr	r0, .L2297+24
+	bcs	.L2338
+	ldr	r1, .L2361+16
+	movw	r2, #1557
+	ldr	r0, .L2361+20
 	bl	printf
-	ldr	r1, .L2297+28
-	ldr	r0, .L2297+32
+	ldr	r1, .L2361+24
+	ldr	r0, .L2361+28
 	bl	printf
-.L2280:
+.L2338:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2297+40
+	ldr	r0, .L2361+48
 	bl	ftl_memcpy
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	adds	r1, r1, #48
 	bl	ftl_memcpy
-	ldrh	r1, [r5]
+	ldrh	r1, [r6]
 	ldr	r3, [r4, #8]
 	lsrs	r2, r1, #3
 	adds	r1, r1, #24
@@ -16020,14 +16340,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2297+44
+	ldr	r3, .L2361+52
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2297+48
+	ldr	r3, .L2361+56
 	ldrh	r3, [r3]
-	cbz	r3, .L2281
-	ldrh	r1, [r5]
-	ldr	r3, .L2297+52
+	cbz	r3, .L2339
+	ldrh	r1, [r6]
+	ldr	r3, .L2361+60
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -16036,65 +16356,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2297+56
+	ldr	r3, .L2361+64
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2281:
-	ldr	r4, .L2297+40
-	ldr	r3, .L2297+16
+.L2339:
+	ldr	r4, .L2361+48
+	ldr	r3, .L2361+44
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2282
-	ldr	r3, .L2297+60
+	bne	.L2340
+	ldr	r3, .L2361+68
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
-	strh	r5, [r6, #6]	@ movhi
+	strh	r5, [r7, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2282
-	ldr	r3, .L2297+64
-	ldr	r2, .L2297+68
+	bne	.L2340
+	ldr	r3, .L2361+72
+	ldr	r2, .L2361+76
 	str	r5, [r3]
-	ldr	r3, .L2297+72
+	ldr	r3, .L2361+80
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2297+76
+	ldr	r2, .L2361+84
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2297+80
+	ldr	r2, .L2361+88
 	str	r3, [r2]
-	ldr	r3, .L2297+84
+	ldr	r3, .L2361+92
 	ldr	r6, [r3]
-	ldr	r3, .L2297+88
+	ldr	r3, .L2361+96
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2297+92
+	ldr	r3, .L2361+100
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2297+96
+	ldr	r3, .L2361+104
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2283
-	ldr	r1, .L2297+20
-	movw	r2, #1567
-	ldr	r0, .L2297+24
+	bls	.L2341
+	ldr	r1, .L2361+16
+	mov	r2, #1584
+	ldr	r0, .L2361+20
 	bl	printf
-	ldr	r1, .L2297+28
-	ldr	r0, .L2297+32
+	ldr	r1, .L2361+24
+	ldr	r0, .L2361+28
 	bl	printf
-.L2283:
+.L2341:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2297+100
+	ldr	r3, .L2361+108
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2297+104
+	ldr	r7, .L2361+112
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2297+108
+	ldr	r1, .L2361+116
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16113,7 +16433,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2297+112
+	ldr	r2, .L2361+120
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16123,31 +16443,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2297+116
+	ldr	r5, .L2361+124
 	str	r3, [r5]
-	ldr	r5, .L2297+120
+	ldr	r5, .L2361+128
 	str	r3, [r5]
-	ldr	r5, .L2297+124
+	ldr	r5, .L2361+132
 	str	r3, [r5]
-	ldr	r5, .L2297+128
+	ldr	r5, .L2361+136
 	str	r3, [r5]
-	ldr	r5, .L2297+132
+	ldr	r5, .L2361+140
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2297+136
+	ldr	r5, .L2361+144
 	str	r3, [r5]
-	ldr	r5, .L2297+140
+	ldr	r5, .L2361+148
 	str	r3, [r5]
-	ldr	r5, .L2297+144
+	ldr	r5, .L2361+152
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2297+148
+	ldr	r3, .L2361+156
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2297+152
+	ldr	r3, .L2361+160
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16155,93 +16475,67 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2286
-	ldr	r0, .L2297+100
+	beq	.L2344
+	ldr	r0, .L2361+108
 	bl	make_superblock
-.L2286:
+.L2344:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2287
-	ldr	r0, .L2297+108
+	beq	.L2345
+	ldr	r0, .L2361+116
 	bl	make_superblock
-.L2287:
+.L2345:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2288
-	ldr	r0, .L2297+112
+	beq	.L2346
+	ldr	r0, .L2361+120
 	bl	make_superblock
-.L2288:
+.L2346:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2289
-	ldr	r0, .L2297+104
+	beq	.L2347
+	ldr	r0, .L2361+112
 	bl	make_superblock
-.L2289:
+.L2347:
 	movs	r0, #0
-	b	.L2272
-.L2278:
-	ldrh	r2, [r6]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	ldr	r2, [r8]
-	str	r2, [r4, #8]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2276
-	ldr	r2, [r8]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L2276
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L2277
-.L2276:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L2275
-.L2298:
+	b	.L2327
+.L2362:
 	.align	2
-.L2297:
+.L2361:
 	.word	.LANCHOR40
 	.word	.LANCHOR202
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LANCHOR209
-	.word	1179929683
 	.word	.LANCHOR221
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR58
-	.word	.LANCHOR81
+	.word	.LANCHOR1
+	.word	.LANCHOR57
+	.word	.LANCHOR53
+	.word	1179929683
+	.word	.LANCHOR80
 	.word	.LANCHOR0
-	.word	.LANCHOR70
-	.word	.LANCHOR67
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR195
 	.word	.LANCHOR45
 	.word	.LANCHOR222
-	.word	.LANCHOR73
-	.word	.LANCHOR53
-	.word	.LANCHOR56
-	.word	.LANCHOR69
+	.word	.LANCHOR72
+	.word	.LANCHOR52
+	.word	.LANCHOR55
+	.word	.LANCHOR68
 	.word	.LANCHOR42
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LANCHOR38
 	.word	.LANCHOR223
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR204
+	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.word	.LANCHOR161
 	.word	.LANCHOR162
 	.word	.LANCHOR166
@@ -16268,97 +16562,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2311
+	ldr	r4, .L2375
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2311+4
+	ldr	r1, .L2375+4
 	mov	r6, r0
-	ldr	r0, .L2311+8
+	ldr	r0, .L2375+8
 	bl	printf
-	ldr	r3, .L2311+12
+	ldr	r3, .L2375+12
 	mov	r1, r6
-	ldr	r0, .L2311+16
+	ldr	r0, .L2375+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2311+20
+	ldr	r3, .L2375+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2300
+	cbz	r5, .L2364
 	cmp	r8, #0
-	bne	.L2309
+	bne	.L2373
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2300
-	ldr	r3, .L2311+24
+	bne	.L2364
+	ldr	r3, .L2375+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2300:
+.L2364:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2311+28
+	ldr	r0, .L2375+28
 	bl	printf
-.L2301:
-	ldr	r3, .L2311+32
+.L2365:
+	ldr	r3, .L2375+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2311+36
+	ldr	r3, .L2375+36
 	ldr	r0, [r3]
-	ldr	r3, .L2311+40
+	ldr	r3, .L2375+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2311+44
+	ldr	r3, .L2375+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2311+48
+	ldr	r3, .L2375+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2311+52
+	ldr	r3, .L2375+52
 	ldrh	r8, [r3]
-.L2302:
+.L2366:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2304
-	ldr	fp, .L2311+56
+	bhi	.L2368
+	ldr	fp, .L2375+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2305:
+.L2369:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2306
+	bhi	.L2370
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2301
-.L2307:
+	bne	.L2365
+.L2371:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2309:
+.L2373:
 	movs	r5, #0
-	b	.L2300
-.L2304:
+	b	.L2364
+.L2368:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2303
+	beq	.L2367
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -16375,11 +16669,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2303:
+.L2367:
 	adds	r2, r2, #1
-	b	.L2302
-.L2306:
-	ldr	r3, .L2311+36
+	b	.L2366
+.L2370:
+	ldr	r3, .L2375+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -16403,24 +16697,24 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2305
-.L2312:
+	b	.L2369
+.L2376:
 	.align	2
-.L2311:
-	.word	.LANCHOR53
+.L2375:
+	.word	.LANCHOR52
 	.word	.LANCHOR224
 	.word	.LC45
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LC46
-	.word	.LANCHOR8
-	.word	.LANCHOR54
+	.word	.LANCHOR15
+	.word	.LANCHOR53
 	.word	.LC47
 	.word	.LANCHOR38
 	.word	.LANCHOR180
+	.word	.LANCHOR104
+	.word	.LANCHOR57
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LANCHOR106
-	.word	.LANCHOR59
 	.word	.LC48
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",%progbits
@@ -16436,86 +16730,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2323
-	ldr	r1, .L2323+4
-	ldr	r0, .L2323+8
+	ldr	r6, .L2387
+	ldr	r1, .L2387+4
+	ldr	r0, .L2387+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2314:
-	ldr	r3, .L2323+12
+.L2378:
+	ldr	r3, .L2387+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2322
+	bhi	.L2386
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2322:
+.L2386:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2323+16
+	ldr	r3, .L2387+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2323+20
+	ldr	r0, .L2387+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2323+24
+	ldr	r3, .L2387+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2323+28
+	ldr	r3, .L2387+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2323+32
+	ldr	r3, .L2387+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2323+36
+	ldr	r3, .L2387+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2323+40
+	ldr	r3, .L2387+40
 	ldrh	r8, [r3]
-.L2315:
+.L2379:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2317
-	ldr	r10, .L2323+44
+	bhi	.L2381
+	ldr	r10, .L2387+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2318:
+.L2382:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2319
-	ldr	r10, .L2323+48
+	bhi	.L2383
+	ldr	r10, .L2387+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2320:
+.L2384:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2321
+	bhi	.L2385
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2314
-.L2317:
+	b	.L2378
+.L2381:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2316
+	beq	.L2380
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -16531,10 +16825,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2316:
+.L2380:
 	adds	r2, r2, #1
-	b	.L2315
-.L2319:
+	b	.L2379
+.L2383:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16558,8 +16852,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2318
-.L2321:
+	b	.L2382
+.L2385:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16583,21 +16877,21 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2320
-.L2324:
+	b	.L2384
+.L2388:
 	.align	2
-.L2323:
+.L2387:
 	.word	.LANCHOR180
 	.word	.LANCHOR225
 	.word	.LC45
 	.word	.LANCHOR41
-	.word	.LANCHOR84
+	.word	.LANCHOR83
 	.word	.LC49
 	.word	.LANCHOR38
+	.word	.LANCHOR104
+	.word	.LANCHOR57
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LANCHOR106
-	.word	.LANCHOR59
 	.word	.LC50
 	.word	.LC51
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
@@ -16612,77 +16906,79 @@ FtlScanAllBlock:
 FtlMapTblRecovery:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #16]
+	ldr	r3, [r0, #24]
 	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldrh	fp, [r0, #6]
+	ldrh	r7, [r0, #6]
 	mov	r4, r0
 	movs	r6, #0
-	ldr	r8, [r0, #24]
+	str	r3, [sp]
+	ldr	r3, [r0, #16]
+	ldr	r10, [r0, #12]
+	lsls	r2, r7, #2
 	str	r3, [sp, #12]
 	ldrh	r3, [r0, #8]
-	lsl	r2, fp, #2
-	ldr	r10, [r0, #12]
-	mov	r0, r8
-	ldr	r5, .L2352
+	ldr	r0, [sp]
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L2352+4
+	ldr	r2, .L2430
+	ldr	r3, .L2430+4
 	str	r6, [r4, #32]
+	ldr	r1, [r2]
+	mov	fp, r3
 	str	r6, [r4, #28]
-	ldr	r2, [r3]
-	str	r3, [sp, #8]
-	str	r2, [r5, #8]
-	ldr	r2, .L2352+8
-	ldr	r7, [r2]
-	movw	r2, #65535
-	str	r7, [r5, #12]
-	strh	r2, [r4]	@ movhi
-	strh	r2, [r4, #2]	@ movhi
-	movs	r2, #1
-	str	r2, [r4, #36]
-.L2326:
+	str	r2, [sp, #8]
+	str	r1, [r3, #8]
+	ldr	r1, .L2430+8
+	ldr	r5, [r1]
+	movw	r1, #65535
+	str	r5, [r3, #12]
+	strh	r1, [r4]	@ movhi
+	strh	r1, [r4, #2]	@ movhi
+	movs	r1, #1
+	str	r1, [r4, #36]
+.L2390:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2343
+	bge	.L2409
 	ldr	r2, [sp, #4]
+	lsl	r8, r3, #1
 	subs	r2, r2, #1
 	cmp	r3, r2
-	lsl	r2, r3, #1
-	bne	.L2327
+	bne	.L2391
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
-	add	r5, r10, r2
 	str	r3, [sp, #4]
+	mov	fp, #0
 	bl	FtlGetLastWrittenPage
 	ldr	r3, [sp, #12]
-	sxth	r10, r0
+	add	r8, r8, r10
 	strh	r6, [r4]	@ movhi
-	movs	r6, #0
+	sxth	r10, r0
+	ldr	r6, .L2430+4
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L2352
-.L2328:
-	sxth	r2, r6
+.L2392:
+	sxth	r2, fp
 	cmp	r2, r10
-	ble	.L2330
-.L2343:
+	ble	.L2395
+.L2409:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2352+12
+	ldr	r3, .L2430+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2332
+	bne	.L2397
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2332:
+.L2397:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -16691,125 +16987,157 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2330:
-	ldrh	r1, [r5]
-	ldr	r0, .L2352
-	str	r3, [sp, #4]
+.L2395:
+	ldrh	r1, [r8]
+	ldr	r0, .L2430+4
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #4]
+	str	r2, [r6, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	ldr	r2, [r3]
+	ldr	r3, .L2430+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L2393
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #4]
+	cbz	r2, .L2393
+	ldr	r1, .L2430+20
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r2, [sp, #4]
+	cmp	r2, r0
+	itt	ne
+	movne	r2, #-1
+	strne	r2, [r6]
+.L2393:
+	ldr	r2, [r6]
 	adds	r2, r2, #1
-	beq	.L2329
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L2329
+	beq	.L2394
+	ldrh	r2, [r5, #8]
+	cmp	r7, r2
+	bls	.L2394
 	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
+	ldrh	r0, [r5]
 	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r3, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L2329:
-	adds	r6, r6, #1
-	b	.L2328
-.L2327:
-	ldr	r1, [sp, #8]
-	add	r2, r10, r2
+	ittt	eq
+	ldreq	r1, [r6, #4]
+	ldreq	r3, [sp]
+	streq	r1, [r3, r2, lsl #2]
+.L2394:
+	add	fp, fp, #1
+	b	.L2392
+.L2391:
+	ldr	r2, [sp, #8]
+	ldr	r0, .L2430+4
+	ldr	r2, [r2]
+	str	r2, [fp, #8]
+	add	r2, r10, r8
+	ldr	r8, .L2430+12
 	str	r2, [sp, #16]
-	ldr	r0, .L2352
-	ldr	r1, [r1]
-	str	r1, [r5, #8]
-	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L2352+12
-	ldrh	r2, [r3]
-	str	r3, [sp, #20]
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
+	ldrh	r2, [r10, r3, lsl #1]
+	ldrh	r3, [r8]
+	subs	r3, r3, #1
+	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
+	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r2, [r5]
-	adds	r2, r2, #1
-	beq	.L2345
-	ldrh	r1, [r7]
-	ldrh	r2, [r4, #4]
-	ldr	r3, [sp, #20]
-	cmp	r1, r2
-	bne	.L2345
-	ldrh	r1, [r7, #8]
-	movw	r2, #64245
-	cmp	r1, r2
-	beq	.L2334
-.L2345:
-	movs	r3, #0
-.L2335:
-	ldr	r1, .L2352+12
-	sxth	r2, r3
-	ldrh	r1, [r1]
-	cmp	r2, r1
-	bge	.L2341
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #16]
-	ldr	r0, .L2352
-	ldrh	r1, [r3]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
+	ldr	r3, [fp]
+	adds	r3, r3, #1
+	beq	.L2411
+	ldrh	r2, [r5]
+	ldrh	r3, [r4, #4]
+	cmp	r2, r3
+	bne	.L2411
+	ldrh	r2, [r5, #8]
+	movw	r3, #64245
+	cmp	r2, r3
+	beq	.L2399
+.L2411:
+	mov	r8, #0
+.L2400:
+	ldr	r2, .L2430+12
+	sxth	r3, r8
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bge	.L2407
+	ldr	r2, [sp, #16]
+	ldr	r0, .L2430+4
+	ldrh	r2, [r2]
+	orr	r3, r3, r2, lsl #10
 	movs	r2, #1
 	mov	r1, r2
+	str	r3, [fp, #4]
 	bl	FlashReadPages
-	ldr	r2, [r5]
+	ldr	r3, .L2430+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2404
+	ldr	r3, [fp, #12]
+	ldr	r3, [r3, #12]
+	str	r3, [sp, #20]
+	cbz	r3, .L2404
+	ldr	r2, .L2430+20
+	ldr	r0, [fp, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
 	ldr	r3, [sp, #20]
-	adds	r2, r2, #1
-	beq	.L2339
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L2339
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r5, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L2339:
+	cmp	r3, r0
+	itt	ne
+	movne	r3, #-1
+	strne	r3, [fp]
+.L2404:
+	ldr	r3, [fp]
 	adds	r3, r3, #1
-	b	.L2335
-.L2334:
-	ldrh	r2, [r3]
-	movs	r1, #0
+	beq	.L2405
+	ldrh	r3, [r5, #8]
+	cmp	r7, r3
+	bls	.L2405
+	ldrh	r1, [r5]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	ittt	eq
+	ldreq	r2, [fp, #4]
+	ldreq	r1, [sp]
+	streq	r2, [r1, r3, lsl #2]
+.L2405:
+	add	r8, r8, #1
+	b	.L2400
+.L2399:
 	ldr	r3, [sp, #8]
-	subs	r2, r2, #1
+	movs	r1, #0
+	ldrh	r2, [r8]
 	ldr	ip, [r3]
-.L2336:
+	subs	r2, r2, #1
+.L2401:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2338
-.L2341:
+	blt	.L2403
+.L2407:
 	adds	r6, r6, #1
-	b	.L2326
-.L2338:
+	b	.L2390
+.L2403:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
 	uxth	lr, r3
-	cmp	fp, lr
+	cmp	r7, lr
 	itttt	hi
 	addhi	r0, r0, ip
-	movhi	r3, lr
+	ldrhi	r3, [sp]
 	ldrhi	r0, [r0, #4]
-	strhi	r0, [r8, r3, lsl #2]
-	b	.L2336
-.L2353:
+	strhi	r0, [r3, lr, lsl #2]
+	b	.L2401
+.L2431:
 	.align	2
-.L2352:
-	.word	.LANCHOR202
+.L2430:
 	.word	.LANCHOR183
+	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR1
+	.word	.LANCHOR57
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -16823,41 +17151,41 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2355
-	ldr	r0, .L2355+4
+	ldr	r3, .L2433
+	ldr	r0, .L2433+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2355+8
+	ldr	r3, .L2433+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2355+12
+	ldr	r3, .L2433+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2355+16
+	ldr	r3, .L2433+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2355+20
+	ldr	r3, .L2433+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2355+24
+	ldr	r3, .L2433+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2355+28
+	ldr	r3, .L2433+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2356:
+.L2434:
 	.align	2
-.L2355:
-	.word	.LANCHOR62
+.L2433:
+	.word	.LANCHOR61
 	.word	.LANCHOR215
+	.word	.LANCHOR70
+	.word	.LANCHOR62
 	.word	.LANCHOR71
-	.word	.LANCHOR63
-	.word	.LANCHOR72
 	.word	.LANCHOR193
 	.word	.LANCHOR192
 	.word	.LANCHOR194
@@ -16875,238 +17203,40 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2358
+	ldr	r0, .L2436
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2359:
+.L2437:
 	.align	2
-.L2358:
+.L2436:
 	.word	.LANCHOR127
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	FlashReadFacBbtData
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2387
-	movw	r2, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r5, r0
-	ldrh	r4, [r3]
-	str	r3, [sp, #16]
-	cmp	r4, r2
-	beq	.L2378
-	cbnz	r4, .L2361
-.L2362:
-	bl	FtlGcPageVarInit
-	b	.L2363
-.L2378:
-	movs	r4, #0
-.L2361:
-	ldr	r3, .L2387+4
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	beq	.L2362
-.L2363:
-	ldr	fp, .L2387+44
-	mov	r3, #-1
-	str	r3, [sp, #8]
-.L2375:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	movs	r0, #0
-	strb	r0, [r5, #8]
-	cmp	r2, r3
-	beq	.L2364
-.L2377:
-	ldr	r3, .L2387+8
-	movw	ip, #65535
-	ldr	r0, [fp]
-	mov	lr, #36
-	ldrh	r8, [r3]
-	ldr	r3, .L2387+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L2387+16
-	ldrh	r10, [r3]
-	add	r3, r5, #16
-	str	r3, [sp, #4]
-	movs	r3, #0
-	mov	r6, r3
-.L2365:
-	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L2367
-	movs	r7, #0
-	mov	r10, #36
-	movs	r2, #0
-	mov	r1, r6
-	bl	FlashReadPages
-.L2368:
-	uxth	r3, r7
-	cmp	r6, r3
-	bhi	.L2376
-	ldr	r3, .L2387+4
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ldrh	r3, [r3]
-	cmp	r3, r4
-	bhi	.L2377
-	movs	r0, #0
-	b	.L2364
-.L2367:
-	ldr	r1, [sp, #4]
-	ldrh	r2, [r1], #2
-	cmp	r2, ip
-	str	r1, [sp, #4]
-	beq	.L2366
-	mla	r1, lr, r6, r0
-	orr	r2, r4, r2, lsl #10
-	str	r2, [r1, #4]
-	movs	r2, #0
-	str	r2, [r1, #8]
-	mul	r2, r10, r6
-	adds	r6, r6, #1
-	uxth	r6, r6
-	bic	r2, r2, #3
-	mov	r7, r2
-	ldr	r2, [sp, #12]
-	add	r7, r7, r2
-	str	r7, [r1, #12]
-.L2366:
-	adds	r3, r3, #1
-	b	.L2365
-.L2376:
-	mul	r8, r10, r7
-	ldr	r2, [fp]
-	str	r2, [sp, #20]
-	add	r3, r2, r8
-	ldr	r1, [r3, #4]
-	str	r3, [sp, #12]
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_plane
-	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #4]
-	ldr	r2, [r2, r8]
-	cbnz	r2, .L2369
-	ldr	r3, [sp, #12]
-	movw	ip, #65535
-	adds	r7, r7, #1
-	ldr	r3, [r3, #12]
-	ldrh	r2, [r3]
-	cmp	r2, ip
-	bne	.L2370
-	ldr	r3, .L2387+20
-	movs	r2, #1
-	str	r2, [r3]
-.L2364:
-	ldr	r2, [sp, #16]
-	movw	r3, #65535
-	strb	r0, [r5, #6]
-	mov	r1, r4
-	strh	r4, [r5, #2]	@ movhi
-	strh	r3, [r2]	@ movhi
-	mov	r2, r0
-	mov	r0, r5
-	bl	ftl_sb_update_avl_pages
-	ldr	r0, [sp, #8]
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2370:
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-	b	.L2368
-.L2369:
-	mov	r2, r1
-	ldr	r0, .L2387+24
-	ldrh	r1, [r5]
-	bl	printf
-	ldr	r3, .L2387+28
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	cbnz	r3, .L2371
-	ldr	r3, .L2387+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2372
-.L2371:
-	ldr	r3, .L2387+36
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #159
-	bls	.L2373
-.L2372:
-	ldr	r3, [fp]
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L2374
-.L2373:
-	ldr	r3, [fp]
-	add	r3, r3, r8
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #8]
-.L2374:
-	ldr	r3, .L2387+40
-	movs	r4, #0
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5]
-	bl	INSERT_FREE_LIST
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L2375
-.L2388:
-	.align	2
-.L2387:
-	.word	.LANCHOR226
-	.word	.LANCHOR53
-	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR59
-	.word	.LANCHOR135
-	.word	.LC52
-	.word	.LANCHOR28
-	.word	.LANCHOR8
-	.word	.LANCHOR79
-	.word	.LANCHOR84
-	.word	.LANCHOR180
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
-	.align	1
-	.global	FlashReadFacBbtData
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	@ args = 0, pretend = 0, frame = 48
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2402
+	ldr	r2, .L2451
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2402+4
+	ldr	r7, .L2451+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2402+8
+	ldr	r2, .L2451+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17114,12 +17244,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2390:
+.L2439:
 	cmp	r3, r5
-	ble	.L2397
+	ble	.L2446
 	mov	r0, #-1
-	b	.L2389
-.L2397:
+	b	.L2438
+.L2446:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17131,60 +17261,60 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2391
+	beq	.L2440
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2391
-	cbz	r4, .L2398
-	cbz	r6, .L2393
-.L2396:
+	bne	.L2440
+	cbz	r4, .L2447
+	cbz	r6, .L2442
+.L2445:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2402+12
+	ldr	r0, .L2451+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2389:
+.L2438:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2393:
+.L2442:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2402+16
-.L2394:
+	ldr	r5, .L2451+16
+.L2443:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2396
+	bcs	.L2445
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2394
-.L2391:
+	b	.L2443
+.L2440:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2390
-.L2398:
+	b	.L2439
+.L2447:
 	mov	r0, r4
-	b	.L2389
-.L2403:
+	b	.L2438
+.L2452:
 	.align	2
-.L2402:
-	.word	.LANCHOR15
+.L2451:
+	.word	.LANCHOR14
 	.word	.LANCHOR147
 	.word	.LANCHOR197
-	.word	.LC53
+	.word	.LC52
 	.word	.LANCHOR149
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -17200,8 +17330,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2414
-	ldr	r6, .L2414+4
+	ldr	r3, .L2463
+	ldr	r6, .L2463+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17212,25 +17342,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2405
-.L2409:
+	bne	.L2454
+.L2458:
 	movs	r3, #0
-.L2406:
+.L2455:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2405:
+.L2454:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2407:
+.L2456:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2406
+	bge	.L2455
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17242,11 +17372,11 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2407
-	b	.L2409
-.L2415:
+	bcc	.L2456
+	b	.L2458
+.L2464:
 	.align	2
-.L2414:
+.L2463:
 	.word	.LANCHOR18
 	.word	.LANCHOR153
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17261,66 +17391,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2436
+	ldr	r3, .L2485
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2417
-	ldr	r8, .L2436+40
-	ldr	r4, .L2436+4
+	bne	.L2466
+	ldr	r8, .L2485+40
+	ldr	r4, .L2485+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2418:
-	ldr	r3, .L2436+8
+.L2467:
+	ldr	r3, .L2485+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2424
-	ldr	r5, .L2436+12
+	bcc	.L2473
+	ldr	r5, .L2485+12
 	movs	r4, #0
-.L2425:
+.L2474:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2426
-	ldr	r4, .L2436+16
+	bhi	.L2475
+	ldr	r4, .L2485+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2427:
+.L2476:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2431
+	bgt	.L2480
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2428
+	beq	.L2477
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2429
+	beq	.L2478
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2428:
+.L2477:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2427
-.L2424:
-	ldr	r3, .L2436+20
+	b	.L2476
+.L2473:
+	ldr	r3, .L2485+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2436+24
+	ldr	r3, .L2485+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2436+28
+	ldr	r3, .L2485+28
 	str	fp, [r4, #12]
-	beq	.L2419
+	beq	.L2468
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -17337,13 +17467,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2420:
+.L2469:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2418
-.L2419:
+	b	.L2467
+.L2468:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -17352,17 +17482,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2422:
+.L2471:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2421:
+.L2470:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2422
+	beq	.L2471
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -17382,7 +17512,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2436+32
+	ldr	r3, .L2485+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -17397,23 +17527,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2420
+	bne	.L2469
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2421
-.L2426:
+	b	.L2470
+.L2475:
 	bl	FtlBbmMapBadBlock
-	b	.L2425
-.L2429:
+	b	.L2474
+.L2478:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2430
+	bne	.L2479
 	strh	r5, [r4]	@ movhi
-	b	.L2428
-.L2430:
+	b	.L2477
+.L2479:
 	strh	r5, [r4, #4]	@ movhi
-.L2431:
-	ldr	r3, .L2436+36
+.L2480:
+	ldr	r3, .L2485+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -17441,25 +17571,25 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2417:
+.L2466:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2437:
+.L2486:
 	.align	2
-.L2436:
-	.word	.LANCHOR77
+.L2485:
+	.word	.LANCHOR76
 	.word	.LANCHOR202
 	.word	.LANCHOR45
-	.word	.LANCHOR60
-	.word	.LANCHOR75
+	.word	.LANCHOR59
+	.word	.LANCHOR74
 	.word	.LANCHOR183
 	.word	.LANCHOR188
 	.word	.LANCHOR51
 	.word	.LANCHOR123
-	.word	.LANCHOR78
-	.word	.LANCHOR75+28
+	.word	.LANCHOR77
+	.word	.LANCHOR74+28
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.log2phys,"ax",%progbits
 	.align	1
@@ -17470,43 +17600,44 @@ FtlMakeBbt:
 	.fpu softvfp
 	.type	log2phys, %function
 log2phys:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2457
-	str	r2, [sp, #8]
-	ldrh	r3, [r3]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, .L2505
+	mov	fp, r0
+	str	r2, [sp, #16]
+	ldr	r2, [r4]
+	ldr	r3, .L2505+4
 	str	r1, [sp, #4]
-	adds	r2, r3, #7
-	movs	r3, #1
-	lsls	r3, r3, r2
-	lsr	r7, r0, r2
-	subs	r3, r3, #1
-	uxth	r6, r7
-	ands	r3, r3, r0
-	uxth	fp, r3
-	ldr	r3, .L2457+4
-	ldr	r3, [r3]
-	cmp	r0, r3
-	bcc	.L2439
-	ldr	r1, .L2457+8
-	mov	r2, #880
-	ldr	r0, .L2457+12
+	cmp	r0, r2
+	ldrh	r5, [r3]
+	bcc	.L2488
+	ldr	r1, .L2505+8
+	mov	r2, #884
+	ldr	r0, .L2505+12
 	bl	printf
-	ldr	r1, .L2457+16
-	ldr	r0, .L2457+20
+	ldr	r1, .L2505+16
+	ldr	r0, .L2505+20
 	bl	printf
-.L2439:
-	ldr	r5, .L2457+24
+.L2488:
+	ldr	r3, [r4]
+	cmp	fp, r3
+	bcs	.L2489
+	adds	r3, r5, #7
+	ldr	r5, .L2505+24
+	lsr	r7, fp, r3
+	str	r3, [sp, #8]
+	ldr	r3, .L2505+28
 	movs	r4, #12
-	ldr	r3, .L2457+28
 	ldr	r1, [r5]
+	uxth	r6, r7
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2440:
+.L2490:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2445
+	bcc	.L2495
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
 	ldr	r3, [r5]
@@ -17515,98 +17646,112 @@ log2phys:
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2446
+	beq	.L2496
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2446
+	bge	.L2496
 	bl	flush_l2p_region
-.L2446:
-	ldr	r3, .L2457+32
+.L2496:
+	ldr	r3, .L2505+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	bcs	.L2447
-	ldr	r1, .L2457+36
+	bcs	.L2497
+	ldr	r1, .L2505+36
 	movw	r2, #526
-	ldr	r0, .L2457+12
+	ldr	r0, .L2505+12
 	bl	printf
-	ldr	r1, .L2457+16
-	ldr	r0, .L2457+20
+	ldr	r1, .L2505+16
+	ldr	r0, .L2505+20
 	bl	printf
-.L2447:
-	ldr	r3, .L2457+40
+.L2497:
+	ldr	r3, .L2505+40
 	uxth	r7, r7
 	ldr	r3, [r3]
 	ldr	r3, [r3, r7, lsl #2]
 	cmp	r3, #0
-	bne	.L2448
+	bne	.L2498
 	ldr	r2, [r5]
 	movs	r1, #255
-	str	r3, [sp]
+	str	r3, [sp, #12]
 	adds	r0, r2, r4
-	ldr	r2, .L2457+44
+	ldr	r2, .L2505+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
 	ldr	r2, [r5]
-	ldr	r3, [sp]
+	ldr	r3, [sp, #12]
 	adds	r1, r2, r4
 	strh	r6, [r2, r4]	@ movhi
 	str	r3, [r1, #4]
-	b	.L2441
-.L2445:
+	b	.L2492
+.L2489:
+	ldr	r3, [sp, #16]
+	mov	r0, #-1
+	cbnz	r3, .L2487
+	ldr	r3, [sp, #4]
+	str	r0, [r3]
+.L2487:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2495:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r6
-	bne	.L2440
-.L2441:
+	bne	.L2490
+.L2492:
 	ldr	r2, [sp, #8]
-	movs	r3, #12
-	ldr	r1, .L2457+24
-	cbnz	r2, .L2442
-	ldr	r2, [r1]
-	mla	r3, r3, r10, r2
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, fp, lsl #2]
-	str	r3, [r2]
-.L2443:
-	ldr	r2, [r1]
-	movs	r3, #12
+	movs	r3, #1
+	ldr	r0, [sp, #16]
+	ldr	r1, .L2505+24
+	lsls	r3, r3, r2
+	movs	r2, #12
+	subs	r3, r3, #1
+	and	r3, r3, fp
+	uxth	r3, r3
+	cbnz	r0, .L2493
+	ldr	r0, [r1]
+	mla	r2, r2, r10, r0
+	ldr	r2, [r2, #8]
+	ldr	r3, [r2, r3, lsl #2]
+	ldr	r2, [sp, #4]
+	str	r3, [r2]
+.L2494:
+	ldr	r2, [r1]
+	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2454
+	beq	.L2503
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2454:
+.L2503:
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2442:
-	ldr	r2, [r5]
-	mla	r3, r3, r10, r2
-	ldr	r2, [sp, #4]
-	ldr	r0, [r2]
-	ldr	r2, [r3, #8]
-	str	r0, [r2, fp, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L2457+48
+	b	.L2487
+.L2493:
+	ldr	r0, [r1]
+	mla	r2, r2, r10, r0
+	ldr	r0, [sp, #4]
+	ldr	r4, [r0]
+	ldr	r0, [r2, #8]
+	str	r4, [r0, r3, lsl #2]
+	ldr	r3, [r2, #4]
+	orr	r3, r3, #-2147483648
+	str	r3, [r2, #4]
+	ldr	r3, .L2505+48
 	strh	r6, [r3]	@ movhi
-	b	.L2443
-.L2448:
+	b	.L2494
+.L2498:
 	ldr	r2, [r5]
-	ldr	r8, .L2457+80
-	str	r3, [sp, #12]
+	ldr	r8, .L2505+80
+	str	r3, [sp, #20]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
 	mov	r0, r8
 	str	r3, [r8, #4]
 	str	r2, [r8, #8]
-	ldr	r2, .L2457+52
+	ldr	r2, .L2505+52
 	ldr	r2, [r2]
 	str	r2, [r8, #12]
 	movs	r2, #1
@@ -17614,86 +17759,86 @@ log2phys:
 	bl	FlashReadPages
 	ldr	r3, [r8, #12]
 	ldrh	r2, [r3, #8]
-	str	r3, [sp]
-	ldr	r3, [sp, #12]
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #20]
 	cmp	r2, r6
-	beq	.L2449
+	beq	.L2499
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2457+56
+	ldr	r0, .L2505+56
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2457+60
+	ldr	r0, .L2505+60
 	bl	rknand_print_hex
-	ldr	r3, .L2457+32
+	ldr	r3, .L2505+32
 	movs	r2, #4
-	ldr	r1, .L2457+40
-	ldr	r0, .L2457+64
+	ldr	r1, .L2505+40
+	ldr	r0, .L2505+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2457+68
+	ldr	r3, .L2505+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2450:
-	ldr	r3, [sp]
+.L2500:
+	ldr	r3, [sp, #12]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r6
-	beq	.L2451
-	ldr	r1, .L2457+36
+	beq	.L2501
+	ldr	r1, .L2505+36
 	mov	r2, #552
-	ldr	r0, .L2457+12
+	ldr	r0, .L2505+12
 	bl	printf
-	ldr	r1, .L2457+16
-	ldr	r0, .L2457+20
+	ldr	r1, .L2505+16
+	ldr	r0, .L2505+20
 	bl	printf
-.L2451:
-	ldr	r3, .L2457+24
+.L2501:
+	ldr	r3, .L2505+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r6, [r3, r4]	@ movhi
-	b	.L2441
-.L2449:
+	b	.L2492
+.L2499:
 	ldr	r2, [r8]
 	cmp	r2, #256
-	bne	.L2450
+	bne	.L2500
 	mov	r2, r3
 	mov	r1, r7
-	ldr	r0, .L2457+72
+	ldr	r0, .L2505+72
 	bl	printf
 	ldr	r3, [r5]
 	mov	r1, r7
-	ldr	r0, .L2457+76
+	ldr	r0, .L2505+76
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L2450
-.L2458:
+	b	.L2500
+.L2506:
 	.align	2
-.L2457:
-	.word	.LANCHOR57
-	.word	.LANCHOR73
-	.word	.LANCHOR227
+.L2505:
+	.word	.LANCHOR72
+	.word	.LANCHOR56
+	.word	.LANCHOR226
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR97
-	.word	.LANCHOR68
+	.word	.LANCHOR96
 	.word	.LANCHOR67
-	.word	.LANCHOR228
+	.word	.LANCHOR66
+	.word	.LANCHOR227
 	.word	.LANCHOR131
-	.word	.LANCHOR58
-	.word	.LANCHOR98
+	.word	.LANCHOR57
+	.word	.LANCHOR97
 	.word	.LANCHOR188
-	.word	.LC54
+	.word	.LC53
 	.word	.LC27
+	.word	.LC54
+	.word	.LANCHOR76
 	.word	.LC55
-	.word	.LANCHOR77
-	.word	.LC56
 	.word	.LANCHOR127
 	.word	.LANCHOR202
 	.size	log2phys, .-log2phys
@@ -17710,73 +17855,73 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L2479
+	ldr	r3, .L2527
 	mov	r5, r0
 	mov	r10, r1
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r7, .L2459
-	ldr	r3, .L2479+4
+	cbnz	r7, .L2507
+	ldr	r3, .L2527+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2474
+	cbz	r3, .L2522
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2461:
-	ldr	fp, .L2479+40
+.L2509:
+	ldr	fp, .L2527+40
 	mov	r2, r6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r1, r10
 	mov	r0, r5
 	bl	FlashProgPages
-.L2462:
+.L2510:
 	cmp	r7, r10
-	bne	.L2472
-	ldr	r3, .L2479+8
+	bne	.L2520
+	ldr	r3, .L2527+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2459
-	ldr	r1, .L2479+12
+	bcc	.L2507
+	ldr	r1, .L2527+12
 	mov	r2, #1600
-	ldr	r0, .L2479+16
+	ldr	r0, .L2527+16
 	bl	printf
-	ldr	r1, .L2479+20
-	ldr	r0, .L2479+24
+	ldr	r1, .L2527+20
+	ldr	r0, .L2527+24
 	bl	printf
-.L2459:
+.L2507:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2474:
+.L2522:
 	mov	r6, r7
-	b	.L2461
-.L2465:
+	b	.L2509
+.L2513:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2463
+	bne	.L2511
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2479+28
+	ldr	r3, .L2527+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2463:
+.L2511:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2464
+	cbnz	r3, .L2512
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2464:
-	ldr	r2, .L2479+32
+.L2512:
+	ldr	r2, .L2527+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17794,27 +17939,27 @@ FtlProgPages:
 	bl	FlashProgPages
 	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2459
-.L2472:
+	bne	.L2507
+.L2520:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2465
-	ldr	r3, .L2479+8
+	beq	.L2513
+	ldr	r3, .L2527+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2466
-	ldr	r1, .L2479+12
+	bcc	.L2514
+	ldr	r1, .L2527+12
 	movw	r2, #1583
-	ldr	r0, .L2479+16
+	ldr	r0, .L2527+16
 	bl	printf
-	ldr	r1, .L2479+20
-	ldr	r0, .L2479+24
+	ldr	r1, .L2527+20
+	ldr	r0, .L2527+24
 	bl	printf
-.L2466:
+.L2514:
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2467
-.L2478:
+	cbnz	r6, .L2515
+.L2526:
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
@@ -17828,39 +17973,39 @@ FtlProgPages:
 	ldr	r2, [sp, #4]
 	mov	r3, r0
 	adds	r2, r2, #1
-	beq	.L2469
+	beq	.L2517
 	ldr	r2, [fp]
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2470
+	cbnz	r2, .L2518
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L2479+36
+	ldr	r0, .L2527+36
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2470:
+.L2518:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L2469:
+.L2517:
 	adds	r7, r7, #1
 	adds	r5, r5, #36
-	b	.L2462
-.L2467:
+	b	.L2510
+.L2515:
 	orr	r3, r3, #-2147483648
-	b	.L2478
-.L2480:
+	b	.L2526
+.L2528:
 	.align	2
-.L2479:
-	.word	.LANCHOR77
-	.word	.LANCHOR8
+.L2527:
+	.word	.LANCHOR76
+	.word	.LANCHOR15
 	.word	.LANCHOR38
-	.word	.LANCHOR229
+	.word	.LANCHOR228
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR138
-	.word	.LC57
-	.word	.LANCHOR84
+	.word	.LC56
+	.word	.LANCHOR83
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -17874,27 +18019,27 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r3, .L2486
+	ldr	r3, .L2534
 	ldr	r4, [r3]
-	cbnz	r4, .L2482
-	ldr	r5, .L2486+4
+	cbnz	r4, .L2530
+	ldr	r5, .L2534+4
 	ldr	r0, [r5]
-	cbz	r0, .L2482
-	ldr	r3, .L2486+8
+	cbz	r0, .L2530
+	ldr	r3, .L2534+8
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
 	str	r4, [r5]
-.L2482:
+.L2530:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2487:
+.L2535:
 	.align	2
-.L2486:
-	.word	.LANCHOR77
+.L2534:
+	.word	.LANCHOR76
 	.word	.LANCHOR132
-	.word	.LANCHOR230
+	.word	.LANCHOR229
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -17908,21 +18053,21 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2490
+	ldr	r3, .L2538
 	ldr	r3, [r3]
-	cbnz	r3, .L2489
+	cbnz	r3, .L2537
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2489:
+.L2537:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2491:
+.L2539:
 	.align	2
-.L2490:
-	.word	.LANCHOR77
+.L2538:
+	.word	.LANCHOR76
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
@@ -17936,18 +18081,18 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2494
+	ldr	r3, .L2542
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2493
+	bne	.L2541
 	bl	FtlSysFlush
-.L2493:
+.L2541:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2495:
+.L2543:
 	.align	2
-.L2494:
-	.word	.LANCHOR231
+.L2542:
+	.word	.LANCHOR230
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
 	.align	1
@@ -17977,28 +18122,28 @@ rk_ftl_de_init:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2512
+	ldr	r3, .L2560
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
 	adds	r2, r1, r2
 	mov	r6, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2505
+	bhi	.L2553
 	cmp	r5, #31
-	bhi	.L2499
-.L2500:
+	bhi	.L2547
+.L2548:
 	movs	r0, #0
-.L2497:
+.L2545:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2499:
-	ldr	r3, .L2512+4
+.L2547:
+	ldr	r3, .L2560+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2500
-	ldr	r8, .L2512+16
+	bne	.L2548
+	ldr	r8, .L2560+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r4, [r8]
@@ -18008,7 +18153,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L2501
+	cbz	r6, .L2549
 	subs	r4, r4, r6
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -18016,32 +18161,32 @@ ftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L2501:
-	ldr	r4, .L2512+8
+.L2549:
+	ldr	r4, .L2560+8
 	mov	r3, #-1
-	ldr	r6, .L2512+12
+	ldr	r6, .L2560+12
 	str	r3, [sp, #4]
-.L2502:
+.L2550:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2504
-	ldr	r3, .L2512+8
+	bcs	.L2552
+	ldr	r3, .L2560+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2500
+	bls	.L2548
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2500
-.L2504:
+	b	.L2548
+.L2552:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2503
+	beq	.L2551
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -18056,22 +18201,22 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2503:
+.L2551:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L2502
-.L2505:
+	b	.L2550
+.L2553:
 	mov	r0, #-1
-	b	.L2497
-.L2513:
+	b	.L2545
+.L2561:
 	.align	2
-.L2512:
-	.word	.LANCHOR69
-	.word	.LANCHOR77
-	.word	.LANCHOR232
+.L2560:
+	.word	.LANCHOR68
+	.word	.LANCHOR76
+	.word	.LANCHOR231
 	.word	.LANCHOR163
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.Ftlscanalldata,"ax",%progbits
 	.align	1
@@ -18086,60 +18231,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2528
+	ldr	r7, .L2576
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2528+24
-	ldr	r0, .L2528+4
+	ldr	r8, .L2576+24
+	ldr	r0, .L2576+4
 	bl	printf
-.L2515:
+.L2563:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2521
+	bcc	.L2569
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2521:
+.L2569:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2516
+	cbnz	r3, .L2564
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2516:
+.L2564:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2518
-	ldr	r4, .L2528+8
+	beq	.L2566
+	ldr	r4, .L2576+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2528+12
+	ldr	r3, .L2576+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2528+16
+	ldr	r3, .L2576+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2519
+	beq	.L2567
 	adds	r3, r3, #1
-	beq	.L2519
+	beq	.L2567
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2518
-.L2519:
+	beq	.L2566
+.L2567:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2528+20
+	ldr	r0, .L2576+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18154,19 +18299,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2518:
+.L2566:
 	adds	r5, r5, #1
-	b	.L2515
-.L2529:
+	b	.L2563
+.L2577:
 	.align	2
-.L2528:
-	.word	.LANCHOR73
-	.word	.LC58
+.L2576:
+	.word	.LANCHOR72
+	.word	.LC57
 	.word	.LANCHOR202
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	.LC60
 	.word	.LC59
+	.word	.LC58
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18181,7 +18326,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2540
+	ldr	r5, .L2588
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18189,15 +18334,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2531
-	ldr	r2, .L2540+4
+	bne	.L2579
+	ldr	r2, .L2588+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2532
-	ldr	r2, .L2540+8
+	beq	.L2580
+	ldr	r2, .L2588+8
 	movw	lr, #65535
-	ldr	ip, .L2540+32
-	ldr	r0, .L2540+12
+	ldr	ip, .L2588+32
+	ldr	r0, .L2588+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18206,25 +18351,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2533:
+.L2581:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2532
+	bls	.L2580
 	cmp	r4, r7
-	bne	.L2534
+	bne	.L2582
 	mov	r1, r4
-	ldr	r0, .L2540+4
+	ldr	r0, .L2588+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2535
-	ldr	r1, .L2540+16
-	movw	r2, #2070
-	ldr	r0, .L2540+20
+	cbnz	r3, .L2583
+	ldr	r1, .L2588+16
+	movw	r2, #2097
+	ldr	r0, .L2588+20
 	bl	printf
-	ldr	r1, .L2540+24
-	ldr	r0, .L2540+28
+	ldr	r1, .L2588+24
+	ldr	r0, .L2588+28
 	bl	printf
-.L2535:
+.L2583:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18232,17 +18377,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2531:
+.L2579:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2532
-.L2534:
+	b	.L2580
+.L2582:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2533
-.L2532:
+	bne	.L2581
+.L2580:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18250,14 +18395,14 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2541:
+.L2589:
 	.align	2
-.L2540:
-	.word	.LANCHOR84
+.L2588:
+	.word	.LANCHOR83
+	.word	.LANCHOR87
+	.word	.LANCHOR81
 	.word	.LANCHOR88
-	.word	.LANCHOR82
-	.word	.LANCHOR89
-	.word	.LANCHOR233
+	.word	.LANCHOR232
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
@@ -18280,181 +18425,181 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2702
+	beq	.L2751
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2711
+	ldr	r3, .L2760
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2545
+	bne	.L2593
 	strh	r3, [r0, #4]	@ movhi
-.L2709:
+.L2758:
 	strb	r3, [r10, #6]
-.L2702:
+.L2751:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2545:
+.L2593:
 	ldrh	r0, [r0, #16]
-.L2546:
+.L2594:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2547
+	beq	.L2595
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2548
+	bne	.L2596
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2549
-	ldr	r3, .L2711+4
+	beq	.L2597
+	ldr	r3, .L2760+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2626
-	ldr	r3, .L2711+8
+	bne	.L2675
+	ldr	r3, .L2760+8
 	ldrh	r5, [r3, r0, lsl #1]
-.L2550:
-	ldr	r3, .L2711+12
+.L2598:
+	ldr	r3, .L2760+12
 	movw	r8, #65535
 	mov	fp, #36
 	ldrh	ip, [r3]
-	ldr	r3, .L2711+16
+	ldr	r3, .L2760+16
 	ldr	r0, [r3]
-	ldr	r3, .L2711+20
+	ldr	r3, .L2760+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2711+24
+	ldr	r3, .L2760+24
 	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2551:
+.L2599:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L2555
+	bhi	.L2603
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2627
-	ldr	r3, .L2711+4
+	bne	.L2676
+	ldr	r3, .L2760+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2703:
+.L2752:
 	str	r3, [sp, #36]
 	mov	r1, r6
 	ldr	r2, [sp, #36]
 	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2711+28
+	ldr	r3, .L2760+28
 	movw	fp, #65535
-	ldr	r8, .L2711+16
+	ldr	r8, .L2760+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2557:
+.L2605:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2562
-	bne	.L2560
+	bhi	.L2610
+	bne	.L2608
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2704:
+.L2753:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2564
-	ldr	r2, .L2711+4
+	bne	.L2612
+	ldr	r2, .L2760+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2564
+	cbnz	r2, .L2612
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2711+8
+	ldr	r2, .L2760+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2564:
-	ldr	r2, .L2711
+.L2612:
+	ldr	r2, .L2760
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2565
+	bne	.L2613
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2565:
+.L2613:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2566
+	bne	.L2614
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2566
-.L2710:
+	bne	.L2614
+.L2759:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2702
-.L2547:
+	b	.L2751
+.L2595:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2546
-.L2548:
+	b	.L2594
+.L2596:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2549
-.L2626:
+	beq	.L2597
+.L2675:
 	mov	r5, r4
-	b	.L2550
-.L2549:
+	b	.L2598
+.L2597:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2552
-	ldr	r1, .L2711+32
-	movw	r2, #2141
-	ldr	r0, .L2711+36
+	cbz	r3, .L2600
+	ldr	r1, .L2760+32
+	movw	r2, #2168
+	ldr	r0, .L2760+36
 	bl	printf
-	ldr	r1, .L2711+40
-	ldr	r0, .L2711+44
+	ldr	r1, .L2760+40
+	ldr	r0, .L2760+44
 	bl	printf
-.L2552:
+.L2600:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2553
+	cbz	r3, .L2601
 	cmp	r5, r3
-	beq	.L2553
-	ldr	r1, .L2711+32
-	movw	r2, #2142
-	ldr	r0, .L2711+36
+	beq	.L2601
+	ldr	r1, .L2760+32
+	movw	r2, #2169
+	ldr	r0, .L2760+36
 	bl	printf
-	ldr	r1, .L2711+40
-	ldr	r0, .L2711+44
+	ldr	r1, .L2760+40
+	ldr	r0, .L2760+44
 	bl	printf
-.L2553:
+.L2601:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2709
-.L2555:
+	b	.L2758
+.L2603:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2554
+	beq	.L2602
 	mla	r1, fp, r6, r0
 	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
@@ -18468,36 +18613,36 @@ FtlRecoverySuperblock:
 	ldr	r2, [sp, #8]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2554:
+.L2602:
 	adds	r3, r3, #1
-	b	.L2551
-.L2627:
+	b	.L2599
+.L2676:
 	movs	r3, #0
-	b	.L2703
-.L2562:
+	b	.L2752
+.L2610:
 	movs	r3, #36
 	ldr	r1, [r8]
 	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2558
+	cbnz	r3, .L2606
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2559
-	ldr	r1, .L2711+28
+	beq	.L2607
+	ldr	r1, .L2760+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2559
-	ldr	r1, .L2711+28
+	cbz	r0, .L2607
+	ldr	r1, .L2760+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2559:
+.L2607:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2561
-.L2560:
+	bne	.L2609
+.L2608:
 	uxth	r3, r4
 	uxth	r7, r7
 	str	r3, [sp, #8]
@@ -18505,26 +18650,26 @@ FtlRecoverySuperblock:
 	ldr	r3, [r8]
 	mla	r7, r2, r7, r3
 	ldr	r0, [r7, #4]
-	b	.L2704
-.L2558:
+	b	.L2753
+.L2606:
 	ldr	r1, [r2, #4]
 	uxth	fp, r5
-	ldr	r0, .L2711+48
+	ldr	r0, .L2760+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2711+52
+	ldr	r3, .L2760+52
 	strh	r2, [r3]	@ movhi
-.L2561:
+.L2609:
 	adds	r7, r7, #1
-	b	.L2557
-.L2566:
+	b	.L2605
+.L2614:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2567
+	bne	.L2615
 	cmp	r3, #0
-	bne	.L2568
-.L2567:
-	ldr	r3, .L2711+56
+	bne	.L2616
+.L2615:
+	ldr	r3, .L2760+56
 	uxth	fp, r5
 	uxth	r5, r5
 	mov	r7, #-1
@@ -18543,193 +18688,193 @@ FtlRecoverySuperblock:
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2571:
+.L2619:
 	cmp	r4, fp
-	bhi	.L2586
-	ldr	r3, .L2711+12
+	bhi	.L2634
+	ldr	r3, .L2760+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2711+16
+	ldr	r3, .L2760+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2587
-.L2573:
+	b	.L2635
+.L2621:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2572
+	beq	.L2620
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2572:
+.L2620:
 	adds	r3, r3, #1
-.L2587:
+.L2635:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2573
+	bhi	.L2621
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2711+4
+	ldr	r2, .L2760+4
 	movs	r1, #36
-	ldr	r3, .L2711+56
+	ldr	r3, .L2760+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2711+16
+	ldr	r2, .L2760+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2574:
+.L2622:
 	cmp	r5, r2
-	bne	.L2584
-	cbz	r0, .L2585
-	ldr	r2, .L2711+56
+	bne	.L2632
+	cbz	r0, .L2633
+	ldr	r2, .L2760+56
 	str	r3, [r2]
-.L2585:
+.L2633:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2571
-.L2712:
+	b	.L2619
+.L2761:
 	.align	2
-.L2711:
-	.word	.LANCHOR53
-	.word	.LANCHOR8
+.L2760:
+	.word	.LANCHOR52
+	.word	.LANCHOR15
 	.word	.LANCHOR16
 	.word	.LANCHOR38
 	.word	.LANCHOR180
-	.word	.LANCHOR106
-	.word	.LANCHOR59
+	.word	.LANCHOR105
+	.word	.LANCHOR58
 	.word	.LANCHOR160
-	.word	.LANCHOR234
+	.word	.LANCHOR233
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC61
-	.word	.LANCHOR235
+	.word	.LC60
+	.word	.LANCHOR234
 	.word	.LANCHOR136
-.L2584:
+.L2632:
 	ldr	r1, [r2]
-	cbnz	r1, .L2575
+	cbnz	r1, .L2623
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2630
+	beq	.L2679
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2630
+	beq	.L2679
 	adds	r0, r7, #1
-	bne	.L2632
-	ldr	r0, .L2713
+	bne	.L2681
+	ldr	r0, .L2762
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2577
+	bne	.L2625
 	cmp	lr, #0
-	beq	.L2632
-.L2577:
+	beq	.L2681
+.L2625:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2632:
+.L2681:
 	movs	r0, #1
-	b	.L2576
-.L2575:
-	cbz	r0, .L2578
-	ldr	r2, .L2713+4
+	b	.L2624
+.L2623:
+	cbz	r0, .L2626
+	ldr	r2, .L2762+4
 	str	r3, [r2]
-.L2578:
-	ldr	r3, .L2713+8
+.L2626:
+	ldr	r3, .L2762+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2568
-	ldr	r3, .L2713
+	cbnz	r3, .L2616
+	ldr	r3, .L2762
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2580
+	bne	.L2628
 	adds	r1, r7, #1
-	ldr	r3, .L2713+4
-	beq	.L2581
+	ldr	r3, .L2762+4
+	beq	.L2629
 	str	r7, [r3]
-.L2568:
+.L2616:
 	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r6, .L2713+12
-	ldr	r3, .L2713+16
+	ldr	r6, .L2762+12
+	ldr	r3, .L2762+16
 	strh	r2, [r3]	@ movhi
-.L2588:
-	ldr	r3, .L2713+20
+.L2636:
+	ldr	r3, .L2762+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2713+24
+	ldr	r3, .L2762+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2589:
+.L2637:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2592
+	bcc	.L2640
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2708:
+.L2757:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2620
+	bhi	.L2669
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2621
-	ldr	r3, .L2713+24
+	bne	.L2670
+	ldr	r3, .L2762+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2621
-	ldr	r3, .L2713+28
+	cbz	r3, .L2670
+	ldr	r3, .L2762+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2621
+	bne	.L2670
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2597
-.L2621:
-	ldr	r3, .L2713+32
+	beq	.L2645
+.L2670:
+	ldr	r3, .L2762+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2588
-	ldr	r2, .L2713+20
+	bne	.L2636
+	ldr	r2, .L2762+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2622:
+.L2671:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2702
+	bcs	.L2751
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2709
+	bne	.L2758
 	mov	r3, r1
-	b	.L2622
-.L2581:
+	b	.L2671
+.L2629:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -18737,62 +18882,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2705:
+.L2754:
 	str	r2, [r3]
-	b	.L2568
-.L2580:
+	b	.L2616
+.L2628:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2583
+	beq	.L2631
 	adds	r2, r6, #1
-	beq	.L2568
-	ldr	r3, .L2713+4
+	beq	.L2616
+	ldr	r3, .L2762+4
 	str	r6, [r3]
-	b	.L2568
-.L2583:
-	ldr	r2, .L2713+4
+	b	.L2616
+.L2631:
+	ldr	r2, .L2762+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2568
+	beq	.L2616
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2568
-.L2630:
+	b	.L2616
+.L2679:
 	mov	r1, r3
 	mov	r3, r6
-.L2576:
+.L2624:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2574
-.L2586:
+	b	.L2622
+.L2634:
 	mov	r2, #-1
-	ldr	r3, .L2713+4
-	b	.L2705
-.L2592:
+	ldr	r3, .L2762+4
+	b	.L2754
+.L2640:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2590
+	beq	.L2638
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2591
-	cbz	r7, .L2591
+	bne	.L2639
+	cbz	r7, .L2639
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2591:
+.L2639:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2590:
+.L2638:
 	adds	r2, r2, #1
-	b	.L2589
-.L2620:
+	b	.L2637
+.L2669:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -18804,45 +18949,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2594
-	bne	.L2595
+	bcc	.L2642
+	bne	.L2643
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2594
-.L2595:
+	bhi	.L2642
+.L2643:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2596
+	bne	.L2644
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2597
-.L2596:
+	beq	.L2645
+.L2644:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2598
+	beq	.L2646
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2599
+	beq	.L2647
 	ldrh	r0, [r10]
-.L2706:
+.L2755:
 	bl	decrement_vpc_count
-	b	.L2594
-.L2599:
+	b	.L2642
+.L2647:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2600
-	ldr	r2, .L2713+36
+	beq	.L2648
+	ldr	r2, .L2762+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2600
+	cbz	r0, .L2648
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2600:
+.L2648:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -18850,17 +18995,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2713+4
+	ldr	r3, .L2762+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2601
+	beq	.L2649
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2601
+	beq	.L2649
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2602
+	beq	.L2650
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -18872,152 +19017,160 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2603
-.L2604:
+	bne	.L2651
+.L2652:
 	mov	r3, #-1
 	str	r3, [sp, #44]
-.L2611:
+.L2659:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2594
-.L2625:
+	beq	.L2642
+.L2674:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2713+40
+	ldr	r3, .L2762+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2616
-	ldr	r1, .L2713+44
-	movw	r2, #2425
-	ldr	r0, .L2713+48
+	bhi	.L2665
+	ldr	r1, .L2762+44
+	movw	r2, #2456
+	ldr	r0, .L2762+48
 	bl	printf
-	ldr	r1, .L2713+52
-	ldr	r0, .L2713+56
+	ldr	r1, .L2762+52
+	ldr	r0, .L2762+56
 	bl	printf
-.L2616:
-	ldr	r3, .L2713+60
+.L2665:
+	ldr	r3, .L2762+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2617
+	beq	.L2666
 	mov	r0, r4
-	b	.L2706
-.L2602:
+	b	.L2755
+.L2650:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2594
+	bne	.L2642
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.L2594:
+.L2642:
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
-	b	.L2708
-.L2603:
+	b	.L2757
+.L2651:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L2604
+	bne	.L2652
 	ldr	r8, [r7, #4]
-	ldr	r0, .L2713+4
+	ldr	r0, .L2762+4
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2604
+	beq	.L2652
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2606
-.L2609:
+	bne	.L2654
+.L2657:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2604
-.L2714:
+	b	.L2652
+.L2763:
 	.align	2
-.L2713:
+.L2762:
 	.word	.LANCHOR120
 	.word	.LANCHOR136
-	.word	.LANCHOR235
+	.word	.LANCHOR234
 	.word	.LANCHOR180
-	.word	.LANCHOR236
+	.word	.LANCHOR235
 	.word	.LANCHOR38
-	.word	.LANCHOR8
-	.word	.LANCHOR54
+	.word	.LANCHOR15
 	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR160
 	.word	.LANCHOR40
-	.word	.LANCHOR234
+	.word	.LANCHOR233
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR84
-.L2606:
+	.word	.LANCHOR83
+.L2654:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2604
+	beq	.L2652
 	adds	r0, r1, #1
-	beq	.L2607
+	beq	.L2655
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2608:
+.L2656:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2609
+	beq	.L2657
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2715
+	ldr	r2, .L2764
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2609
+	beq	.L2657
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2604
-	b	.L2609
-.L2607:
+	beq	.L2652
+	b	.L2657
+.L2655:
 	str	r1, [r2, r5]
-	b	.L2608
-.L2601:
+	b	.L2656
+.L2649:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2611
+	beq	.L2659
+	ldr	r2, .L2764+4
+	ldr	r3, [sp, #44]
+	ldr	r2, [r2]
+	cmp	r2, r3, lsr #10
+	bhi	.L2661
+	adds	r3, r3, #1
+	bne	.L2642
+.L2661:
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2611
+	beq	.L2659
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2625
+	beq	.L2674
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2715+4
+	ldr	r3, .L2764+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2615
-	ldr	r3, .L2715+8
+	beq	.L2664
+	ldr	r3, .L2764+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2615
-	ldr	r3, .L2715+12
+	beq	.L2664
+	ldr	r3, .L2764+16
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2611
-.L2615:
+	bne	.L2659
+.L2664:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19027,76 +19180,339 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2611
+	beq	.L2659
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2611
+	bne	.L2659
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2611
-.L2617:
+	b	.L2659
+.L2666:
 	mov	r1, r4
-	ldr	r0, .L2715+16
+	ldr	r0, .L2764+20
 	bl	printf
-	b	.L2594
-.L2598:
+	b	.L2642
+.L2646:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2715+20
-	ldr	r0, .L2715+24
+	ldr	r2, .L2764+24
+	ldr	r0, .L2764+28
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2715+28
+	ldr	r2, .L2764+32
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2618
+	bhi	.L2667
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2715+32
+	ldr	r1, .L2764+36
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2618:
+.L2667:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2715
+	ldr	r3, .L2764
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2619
+	bne	.L2668
 	ldr	r2, [sp, #4]
-.L2707:
+.L2756:
 	str	r2, [r3]
-	b	.L2594
-.L2619:
+	b	.L2642
+.L2668:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2594
+	bcs	.L2642
 	mov	r2, r1
-	b	.L2707
-.L2597:
+	b	.L2756
+.L2645:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2710
-.L2716:
+	b	.L2759
+.L2765:
 	.align	2
-.L2715:
+.L2764:
 	.word	.LANCHOR136
+	.word	.LANCHOR43
+	.word	.LANCHOR91
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
+	.word	.LC61
+	.word	.LANCHOR234
 	.word	.LC62
-	.word	.LANCHOR235
-	.word	.LC63
+	.word	.LANCHOR236
 	.word	.LANCHOR237
-	.word	.LANCHOR238
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2804
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	sub	sp, sp, #64
+	ldrh	r5, [r3]
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L2792
+	cbnz	r5, .L2767
+.L2768:
+	bl	FtlGcPageVarInit
+	b	.L2769
+.L2792:
+	movs	r5, #0
+.L2767:
+	ldr	r3, .L2804+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L2768
+.L2769:
+	ldr	r8, .L2804+72
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L2770:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2771
+.L2791:
+	ldr	r3, .L2804+8
+	movs	r2, #0
+	ldr	r0, [r8]
+	mov	fp, r2
+	movw	ip, #65535
+	mov	lr, #36
+	ldrh	r10, [r3]
+	ldr	r3, .L2804+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2804+16
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L2804+20
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L2804+24
+	ldrh	r7, [r3]
+	add	r3, r4, #16
+	str	r3, [sp, #4]
+.L2772:
+	uxth	r3, r2
+	cmp	r10, r3
+	bhi	.L2774
+	mov	r10, #0
+	movs	r2, #0
+	mov	r1, fp
+	bl	FlashReadPages
+.L2775:
+	uxth	r3, r10
+	cmp	fp, r3
+	bhi	.L2790
+	ldr	r3, .L2804+4
+	adds	r5, r5, #1
+	uxth	r5, r5
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bhi	.L2791
+.L2771:
+	ldr	r3, .L2804
+	movw	r2, #65535
+	mov	r0, r4
+	strh	r5, [r4, #2]	@ movhi
+	mov	r1, r5
+	strh	r2, [r3]	@ movhi
+	movs	r2, #0
+	strb	r2, [r4, #6]
+	bl	ftl_sb_update_avl_pages
+	ldr	r0, [sp, #8]
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2774:
+	ldr	r1, [sp, #4]
+	ldrh	r3, [r1], #2
+	cmp	r3, ip
+	str	r1, [sp, #4]
+	beq	.L2773
+	mla	r1, lr, fp, r0
+	ldr	r6, [sp, #12]
+	orr	r3, r5, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #16]
+	mul	r3, r3, fp
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	ldr	r6, [sp, #20]
+	str	r3, [r1, #8]
+	mul	r3, r7, fp
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+	add	r3, fp, #1
+	uxth	fp, r3
+.L2773:
+	adds	r2, r2, #1
+	b	.L2772
+.L2790:
+	movs	r7, #36
+	ldr	r2, [r8]
+	mul	r7, r7, r10
+	adds	r3, r2, r7
+	ldr	r6, [r2, r7]
+	ldr	r1, [r3, #4]
+	str	r1, [sp, #4]
+	cmp	r6, #0
+	bne	.L2776
+	ldr	r3, [r3, #12]
+	movw	r2, #65535
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2803
+	ldr	r2, .L2804+28
+	ldr	r0, [r3, #8]
+	ldr	r2, [r2]
+	cmp	r0, r2
+	bls	.L2778
+.L2803:
+	ldrh	r2, [r4]
+.L2789:
+	ldr	r3, .L2804+32
+	movs	r1, #0
+	movs	r5, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L2770
+.L2778:
+	ldr	r2, .L2804+36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2780
+.L2781:
+	ldr	r2, [r3, #8]
+	add	r10, r10, #1
+	ldr	r1, [sp, #4]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2775
+.L2780:
+	mov	r2, r6
+	add	r1, sp, #24
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r3, [sp, #12]
+	ldr	r1, [sp, #24]
+	ldr	r2, [r3, #12]
+	cmp	r2, r1
+	bne	.L2781
+	adds	r1, r2, #1
+	beq	.L2781
+	str	r2, [sp, #32]
+	movs	r1, #1
+	ldr	r2, .L2804+40
+	add	r0, sp, #28
+	ldr	r2, [r2]
+	str	r2, [sp, #36]
+	ldr	r2, .L2804+44
+	ldr	r2, [r2]
+	str	r2, [sp, #40]
+	mov	r2, r6
+	bl	FlashReadPages
+	ldr	r2, .L2804+48
+	ldr	r1, [r8]
+	ldr	r0, [sp, #36]
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #12]
+	add	r7, r7, r1
+	lsl	ip, r2, #7
+.L2782:
+	cmp	r6, ip
+	beq	.L2781
+	ldr	r1, [r7, #8]
+	ldr	r2, [r0, r6, lsl #2]
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r1, r2
+	beq	.L2783
+	ldr	r2, [sp, #32]
+	ldrh	r1, [r4]
+	ldr	r0, .L2804+52
+	bl	printf
+	b	.L2803
+.L2783:
+	adds	r6, r6, #1
+	b	.L2782
+.L2776:
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r4]
+	ldr	r0, .L2804+56
+	bl	printf
+	ldr	r3, .L2804+60
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
+	cbnz	r3, .L2786
+	ldr	r3, .L2804+64
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2787
+.L2786:
+	ldr	r3, .L2804+68
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #159
+	bls	.L2788
+.L2787:
+	ldr	r3, [r8]
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	bne	.L2789
+.L2788:
+	ldr	r3, [r8]
+	add	r7, r7, r3
+	ldr	r3, [r7, #4]
+	str	r3, [sp, #8]
+	b	.L2789
+.L2805:
+	.align	2
+.L2804:
+	.word	.LANCHOR238
+	.word	.LANCHOR52
+	.word	.LANCHOR38
+	.word	.LANCHOR104
+	.word	.LANCHOR57
+	.word	.LANCHOR105
+	.word	.LANCHOR58
+	.word	.LANCHOR72
+	.word	.LANCHOR83
+	.word	.LANCHOR1
+	.word	.LANCHOR187
+	.word	.LANCHOR189
+	.word	.LANCHOR55
+	.word	.LC63
+	.word	.LC64
+	.word	.LANCHOR28
+	.word	.LANCHOR15
+	.word	.LANCHOR78
+	.word	.LANCHOR180
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
 	.global	FtlGcFreeTempBlock
@@ -19109,42 +19525,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2740
+	ldr	r3, .L2829
 	ldr	r3, [r3]
-	cbz	r3, .L2718
-.L2723:
+	cbz	r3, .L2807
+.L2812:
 	movs	r0, #0
-.L2717:
+.L2806:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2718:
-	ldr	r0, .L2740+4
+.L2807:
+	ldr	r0, .L2829+4
 	movw	r3, #65535
-	ldr	r5, .L2740+8
+	ldr	r5, .L2829+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2720
-	ldr	r3, .L2740+12
+	beq	.L2809
+	ldr	r3, .L2829+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2720
-	ldr	r3, .L2740+16
+	beq	.L2809
+	ldr	r3, .L2829+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2721
+	bls	.L2810
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2721:
+.L2810:
 	ldr	r3, [r5]
-	cbnz	r3, .L2722
-	ldr	r2, .L2740+20
+	cbnz	r3, .L2811
+	ldr	r2, .L2829+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19152,73 +19568,73 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2722:
+.L2811:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2717
-.L2720:
+	b	.L2806
+.L2809:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2723
-	ldr	r6, .L2740+12
+	beq	.L2812
+	ldr	r6, .L2829+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2740+24
+	ldr	r5, .L2829+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2724
-	ldr	r1, .L2740+28
+	beq	.L2813
+	ldr	r1, .L2829+28
 	movs	r2, #163
-	ldr	r0, .L2740+32
+	ldr	r0, .L2829+32
 	bl	printf
-	ldr	r1, .L2740+36
-	ldr	r0, .L2740+40
+	ldr	r1, .L2829+36
+	ldr	r0, .L2829+40
 	bl	printf
-.L2724:
+.L2813:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2740+44
+	ldr	r2, .L2829+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2740+84
+	ldr	fp, .L2829+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2740+48
+	ldr	r1, .L2829+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2725:
+.L2814:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2729
+	bhi	.L2818
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2740+52
+	ldr	r3, .L2829+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2730
+	cbz	r3, .L2819
 	ldrh	r1, [r4]
-	ldr	r0, .L2740+56
+	ldr	r0, .L2829+56
 	bl	printf
-.L2730:
+.L2819:
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2731
+	beq	.L2820
 	bl	INSERT_DATA_LIST
-.L2732:
-	ldr	r3, .L2740+60
+.L2821:
+	ldr	r3, .L2829+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -19226,39 +19642,39 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2740+64
+	ldr	r3, .L2829+64
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2740+68
+	ldr	r3, .L2829+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2740+72
+	ldr	r3, .L2829+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2723
-	ldr	r3, .L2740+76
+	ble	.L2812
+	ldr	r3, .L2829+76
 	movs	r2, #20
 	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L2717
-.L2729:
+	b	.L2806
+.L2818:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L2740+80
+	ldr	r3, .L2829+80
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L2726
-	ldr	r1, .L2740+28
+	bcc	.L2815
+	ldr	r1, .L2829+28
 	movs	r2, #168
-	ldr	r0, .L2740+32
+	ldr	r0, .L2829+32
 	bl	printf
-	ldr	r1, .L2740+36
-	ldr	r0, .L2740+40
+	ldr	r1, .L2829+36
+	ldr	r0, .L2829+40
 	bl	printf
-.L2726:
+.L2815:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -19266,7 +19682,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L2727
+	bne	.L2816
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -19275,46 +19691,192 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L2739:
+.L2828:
 	bl	decrement_vpc_count
-.L2728:
+.L2817:
 	adds	r6, r6, #1
-	b	.L2725
-.L2727:
+	b	.L2814
+.L2816:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L2728
+	beq	.L2817
 	ldrh	r0, [r4]
-	b	.L2739
-.L2731:
+	b	.L2828
+.L2820:
 	bl	INSERT_FREE_LIST
-	b	.L2732
-.L2741:
+	b	.L2821
+.L2830:
 	.align	2
-.L2740:
-	.word	.LANCHOR77
-	.word	.LANCHOR94
+.L2829:
+	.word	.LANCHOR76
+	.word	.LANCHOR93
 	.word	.LANCHOR135
-	.word	.LANCHOR53
-	.word	.LANCHOR79
+	.word	.LANCHOR52
+	.word	.LANCHOR78
+	.word	.LANCHOR138
+	.word	.LANCHOR110
+	.word	.LANCHOR239
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR83
+	.word	.LANCHOR161
+	.word	.LANCHOR15
+	.word	.LC65
+	.word	.LANCHOR109
+	.word	.LANCHOR204
+	.word	.LANCHOR88
+	.word	.LANCHOR223
+	.word	.LANCHOR176
+	.word	.LANCHOR111
+	.word	.LANCHOR72
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r4, .L2834
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L2832
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2833
+.L2832:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	movs	r5, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L2834
+	strb	r5, [r4, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L2834+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2834+8
+	strh	r5, [r3]	@ movhi
+	bl	l2p_flush
+	mov	r0, r5
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2833:
+	ldr	r0, .L2834
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L2835:
+	.align	2
+.L2834:
+	.word	.LANCHOR93
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L2851
+	ldr	r3, [r3]
+	cbz	r3, .L2837
+.L2840:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2837:
+	ldr	r3, .L2851+4
+	ldr	r5, .L2851+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2839
+	ldr	r3, [r5]
+	lsls	r2, r3, #31
+	bpl	.L2839
+	ldr	r3, .L2851+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2840
+.L2839:
+	ldr	r4, .L2851+16
+	movs	r3, #0
+	movs	r6, #0
+	movs	r7, #36
+	mov	r2, r3
+	ldr	r1, [r5]
+	ldr	r0, [r4]
+	bl	FlashProgPages
+.L2841:
+	ldr	r1, [r5]
+	uxth	r3, r6
+	cmp	r3, r1
+	bcc	.L2843
+	ldr	r0, [r4]
+	bl	FtlGcBufFree
+	movs	r3, #0
+	str	r3, [r5]
+	ldr	r3, .L2851+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2840
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+	b	.L2850
+.L2843:
+	muls	r3, r7, r3
+	ldr	r2, [r4]
+	adds	r6, r6, #1
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L2842
+	ldr	r3, .L2851+12
+	movs	r5, #0
+	ldr	r0, .L2851+20
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2851+24
+	ldr	r0, [r1, #4]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2850:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2842:
+	ldr	r3, [r1, #12]
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2841
+.L2852:
+	.align	2
+.L2851:
+	.word	.LANCHOR76
+	.word	.LANCHOR15
+	.word	.LANCHOR102
+	.word	.LANCHOR93
+	.word	.LANCHOR181
+	.word	.LANCHOR83
 	.word	.LANCHOR138
-	.word	.LANCHOR111
-	.word	.LANCHOR239
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR84
-	.word	.LANCHOR161
-	.word	.LANCHOR8
-	.word	.LC64
-	.word	.LANCHOR110
-	.word	.LANCHOR204
-	.word	.LANCHOR89
-	.word	.LANCHOR223
-	.word	.LANCHOR176
-	.word	.LANCHOR112
-	.word	.LANCHOR73
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
 	.global	FtlGcPageRecovery
@@ -19327,29 +19889,29 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2744
-	ldr	r5, .L2744+4
+	ldr	r4, .L2855
+	ldr	r5, .L2855+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2742
-	ldr	r0, .L2744+8
+	bcc	.L2853
+	ldr	r0, .L2855+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2744+12
+	ldr	r3, .L2855+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2742:
+.L2853:
 	pop	{r3, r4, r5, pc}
-.L2745:
+.L2856:
 	.align	2
-.L2744:
-	.word	.LANCHOR53
-	.word	.LANCHOR94
+.L2855:
+	.word	.LANCHOR52
+	.word	.LANCHOR93
 	.word	.LANCHOR127
 	.word	.LANCHOR135
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -19366,13 +19928,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2747
-	ldr	r3, .L2747+4
+	ldr	r5, .L2858
+	ldr	r3, .L2858+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2747+8
+	ldr	r5, .L2858+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -19383,12 +19945,12 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2748:
+.L2859:
 	.align	2
-.L2747:
+.L2858:
+	.word	.LANCHOR91
+	.word	.LANCHOR236
 	.word	.LANCHOR92
-	.word	.LANCHOR237
-	.word	.LANCHOR93
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -19403,30 +19965,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2758
+	ldr	r4, .L2869
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2758+4
+	ldr	r3, .L2869+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2758+8
+	ldr	r3, .L2869+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2758+12
+	ldr	r3, .L2869+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2750
-.L2752:
+	bne	.L2861
+.L2863:
 	mov	r4, #-1
-.L2749:
+.L2860:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2750:
+.L2861:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2752
+	bne	.L2863
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -19436,34 +19998,34 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2758+16
+	ldr	r3, .L2869+16
 	movs	r0, #12
 	ldrh	r2, [r3]
-	ldr	r3, .L2758+20
+	ldr	r3, .L2869+20
 	ldr	r1, [r3]
 	mov	r3, r4
-.L2753:
+.L2864:
 	cmp	r3, r2
-	blt	.L2755
+	blt	.L2866
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	beq	.L2756
-.L2754:
-	ldr	r3, .L2758+24
+	beq	.L2867
+.L2865:
+	ldr	r3, .L2869+24
 	ldr	r1, [r3]
-	ldr	r3, .L2758+28
+	ldr	r3, .L2869+28
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2758+32
+	ldr	r5, .L2869+32
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2758+36
+	ldr	r3, .L2869+36
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
@@ -19472,40 +20034,40 @@ FtlSysBlkInit:
 	strb	r2, [r3, #6]
 	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L2758+40
+	ldr	r2, .L2869+40
 	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2757:
+.L2868:
 	bl	FtlVpcTblFlush
-	b	.L2749
-.L2755:
+	b	.L2860
+.L2866:
 	mla	r6, r0, r3, r1
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	blt	.L2754
+	blt	.L2865
 	adds	r3, r3, #1
-	b	.L2753
-.L2756:
+	b	.L2864
+.L2867:
 	bl	l2p_flush
-	b	.L2757
-.L2759:
+	b	.L2868
+.L2870:
 	.align	2
-.L2758:
-	.word	.LANCHOR236
+.L2869:
 	.word	.LANCHOR235
+	.word	.LANCHOR234
 	.word	.LANCHOR39
 	.word	.LANCHOR209
-	.word	.LANCHOR68
-	.word	.LANCHOR97
-	.word	.LANCHOR84
+	.word	.LANCHOR67
+	.word	.LANCHOR96
+	.word	.LANCHOR83
+	.word	.LANCHOR91
+	.word	.LANCHOR52
 	.word	.LANCHOR92
-	.word	.LANCHOR53
-	.word	.LANCHOR93
-	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -19518,87 +20080,87 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2791
+	ldr	r3, .L2902
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2762
-	ldr	r5, .L2791+4
+	bne	.L2873
+	ldr	r5, .L2902+4
 	mov	r1, r4
-	ldr	r3, .L2791+8
-	ldr	r6, .L2791+12
+	ldr	r3, .L2902+8
+	ldr	r6, .L2902+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2791+16
-	ldr	r5, .L2791+20
+	ldr	r3, .L2902+16
+	ldr	r5, .L2902+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2791+24
+	ldr	r3, .L2902+24
 	ldrh	r0, [r6]
 	str	r4, [r5]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2763
+	cbz	r0, .L2874
 	bl	FtlMakeBbt
-.L2763:
-	ldr	r3, .L2791+28
-	ldr	r2, .L2791+32
-	ldr	ip, .L2791+112
+.L2874:
+	ldr	r3, .L2902+28
+	ldr	r2, .L2902+32
+	ldr	ip, .L2902+112
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2791+36
+	ldr	r2, .L2902+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L2764:
+.L2875:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2765
-	ldr	r3, .L2791+40
+	blt	.L2876
+	ldr	r3, .L2902+40
 	movs	r7, #0
-	ldr	fp, .L2791+116
+	ldr	fp, .L2902+116
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
-.L2766:
+.L2877:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2767
-	ldr	r4, .L2791+44
+	bhi	.L2878
+	ldr	r4, .L2902+44
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2768
-.L2772:
+	bgt	.L2879
+.L2883:
 	movs	r7, #0
 	mov	r6, r7
-.L2769:
+.L2880:
 	ldrh	r3, [r8]
 	uxth	r0, r7
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2773
+	bhi	.L2884
 	ldrh	r2, [r10]
-	ldr	r3, .L2791+48
+	ldr	r3, .L2902+48
 	ldrh	r4, [r4]
-	ldr	r7, .L2791+52
+	ldr	r7, .L2902+52
 	str	r2, [r3]
-	ldr	r3, .L2791+56
+	ldr	r3, .L2902+56
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2791+60
+	ldr	r1, .L2902+60
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -19609,7 +20171,7 @@ FtlLowFormat:
 	str	r3, [sp, #4]
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2774
+	ble	.L2885
 	ldr	r3, [sp, #16]
 	mov	r1, r4
 	subs	r0, r3, r6
@@ -19619,12 +20181,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2774:
-	ldr	r3, .L2791+64
+.L2885:
+	ldr	r3, .L2902+64
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2775
-	ldr	r2, .L2791+60
+	bne	.L2886
+	ldr	r2, .L2902+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19636,11 +20198,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2775:
-	ldr	r3, .L2791+68
+.L2886:
+	ldr	r3, .L2902+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2776
-	ldr	r2, .L2791+60
+	cbz	r3, .L2887
+	ldr	r2, .L2902+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19652,55 +20214,55 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2776:
-	ldr	r3, .L2791+72
+.L2887:
+	ldr	r3, .L2902+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2778
-	ldr	r2, .L2791+60
+	cbz	r3, .L2889
+	ldr	r2, .L2902+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2778
+	bge	.L2889
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #32
 	str	fp, [r7]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2778:
+.L2889:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2791+76
+	ldr	r6, .L2902+76
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2791+80
+	ldr	r3, .L2902+80
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2791+84
+	ldr	r7, .L2902+84
 	muls	r4, r3, r4
-	ldr	r3, .L2791+88
+	ldr	r3, .L2902+88
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2791+120
+	ldr	r10, .L2902+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2791+92
+	ldr	r2, .L2902+92
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2791+96
+	ldr	r2, .L2902+96
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -19711,30 +20273,30 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2791+100
+	ldr	r3, .L2902+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2780:
+.L2891:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2781
+	bne	.L2892
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2780
-.L2765:
+	b	.L2891
+.L2876:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L2764
-.L2767:
+	b	.L2875
+.L2878:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -19742,11 +20304,11 @@ FtlLowFormat:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L2766
-.L2768:
+	b	.L2877
+.L2879:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2791+104
+	ldr	r3, .L2902+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -19754,26 +20316,26 @@ FtlLowFormat:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L2770:
+.L2881:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2772
+	bls	.L2883
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L2770
-.L2773:
+	b	.L2881
+.L2884:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2769
-.L2781:
+	b	.L2880
+.L2892:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2791+108
+	ldr	r4, .L2902+108
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -19789,240 +20351,94 @@ FtlLowFormat:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2782:
+.L2893:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2783
+	bne	.L2894
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2782
-.L2792:
+	b	.L2893
+.L2903:
 	.align	2
-.L2791:
-	.word	.LANCHOR77
-	.word	.LANCHOR67
+.L2902:
+	.word	.LANCHOR76
+	.word	.LANCHOR66
 	.word	.LANCHOR195
 	.word	.LANCHOR39
 	.word	.LANCHOR131
 	.word	.LANCHOR159
 	.word	.LANCHOR160
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR40
 	.word	.LANCHOR38
-	.word	.LANCHOR74
 	.word	.LANCHOR73
+	.word	.LANCHOR72
 	.word	.LANCHOR42
 	.word	.LANCHOR223
 	.word	.LANCHOR28
-	.word	.LANCHOR8
+	.word	.LANCHOR15
 	.word	.LANCHOR49
 	.word	.LANCHOR222
-	.word	.LANCHOR53
-	.word	.LANCHOR92
-	.word	.LANCHOR69
-	.word	.LANCHOR101
-	.word	.LANCHOR204
-	.word	.LANCHOR0
-	.word	.LANCHOR66
-	.word	.LANCHOR93
-	.word	168778952
-	.word	.LANCHOR41
-	.word	.LANCHOR84
-.L2783:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #4]
-	str	r3, [r4, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	movw	r4, #65535
-	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2793
-	strh	r4, [r3]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2793+4
-	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, [r6]
-	strh	r0, [r3]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, [r5]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r5]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	r0, .L2762
-	ldr	r3, .L2793+8
-	movs	r2, #1
-	str	r2, [r3]
-.L2762:
-	movs	r0, #0
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2794:
-	.align	2
-.L2793:
-	.word	.LANCHOR94
-	.word	.LANCHOR209
-	.word	.LANCHOR231
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
-	.align	1
-	.global	Ftl_get_new_temp_ppa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movw	r3, #65535
-	ldr	r4, .L2798
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	beq	.L2796
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2797
-.L2796:
-	bl	FtlCacheWriteBack
-	movs	r0, #0
-	movs	r5, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2798
-	strb	r5, [r4, #8]
-	bl	allocate_data_superblock
-	ldr	r3, .L2798+4
-	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2798+8
-	strh	r5, [r3]	@ movhi
-	bl	l2p_flush
-	mov	r0, r5
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2797:
-	ldr	r0, .L2798
-	pop	{r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L2799:
-	.align	2
-.L2798:
-	.word	.LANCHOR94
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
-	.align	1
-	.global	Ftl_gc_temp_data_write_back
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2815
-	ldr	r3, [r3]
-	cbz	r3, .L2801
-.L2804:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2801:
-	ldr	r3, .L2815+4
-	ldr	r5, .L2815+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2803
-	ldr	r3, [r5]
-	lsls	r2, r3, #31
-	bpl	.L2803
-	ldr	r3, .L2815+12
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L2804
-.L2803:
-	ldr	r4, .L2815+16
-	movs	r3, #0
-	movs	r6, #0
-	movs	r7, #36
-	mov	r2, r3
-	ldr	r1, [r5]
-	ldr	r0, [r4]
-	bl	FlashProgPages
-.L2805:
-	ldr	r1, [r5]
-	uxth	r3, r6
-	cmp	r3, r1
-	bcc	.L2807
-	ldr	r0, [r4]
-	bl	FtlGcBufFree
-	movs	r3, #0
-	str	r3, [r5]
-	ldr	r3, .L2815+12
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L2804
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-	b	.L2814
-.L2807:
-	muls	r3, r7, r3
-	ldr	r2, [r4]
-	adds	r6, r6, #1
-	adds	r1, r2, r3
-	ldr	r2, [r2, r3]
-	adds	r3, r2, #1
-	bne	.L2806
-	ldr	r3, .L2815+12
-	movs	r5, #0
-	ldr	r0, .L2815+20
-	ldrh	r4, [r3]
-	ldr	r0, [r0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2815+24
-	ldr	r0, [r1, #4]
-	ldr	r3, [r2, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L2814:
-	movs	r0, #1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2806:
-	ldr	r3, [r1, #12]
-	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-	b	.L2805
-.L2816:
+	.word	.LANCHOR52
+	.word	.LANCHOR91
+	.word	.LANCHOR68
+	.word	.LANCHOR100
+	.word	.LANCHOR204
+	.word	.LANCHOR0
+	.word	.LANCHOR65
+	.word	.LANCHOR92
+	.word	168778952
+	.word	.LANCHOR41
+	.word	.LANCHOR83
+.L2894:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2904
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2904+4
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r6]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2873
+	ldr	r3, .L2904+8
+	movs	r2, #1
+	str	r2, [r3]
+.L2873:
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2905:
 	.align	2
-.L2815:
-	.word	.LANCHOR77
-	.word	.LANCHOR8
-	.word	.LANCHOR103
-	.word	.LANCHOR94
-	.word	.LANCHOR181
-	.word	.LANCHOR84
-	.word	.LANCHOR138
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+.L2904:
+	.word	.LANCHOR93
+	.word	.LANCHOR209
+	.word	.LANCHOR230
+	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -20034,34 +20450,34 @@ Ftl_gc_temp_data_write_back:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2907
+	ldr	r3, .L2996
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2869
-	ldr	r3, .L2907+4
+	bne	.L2958
+	ldr	r3, .L2996+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2869
-	ldr	r2, .L2907+8
+	bne	.L2958
+	ldr	r2, .L2996+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2871
-	ldr	r5, .L2907+12
+	bls	.L2960
+	ldr	r5, .L2996+12
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L2819
-	ldr	r7, .L2907+16
+	beq	.L2908
+	ldr	r7, .L2996+16
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L2819
-	ldr	r1, .L2907+20
+	bne	.L2908
+	ldr	r1, .L2996+20
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L2819
-	ldr	r2, .L2907+24
+	beq	.L2908
+	ldr	r2, .L2996+24
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20069,164 +20485,164 @@ rk_ftl_garbage_collect:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L2819:
+.L2908:
 	cmp	r0, #0
-	bne	.L2872
-	ldr	r3, .L2907+28
+	bne	.L2961
+	ldr	r3, .L2996+28
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2873
-	ldr	r2, .L2907+32
+	bhi	.L2962
+	ldr	r2, .L2996+32
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L2822
+	bls	.L2911
 	lsrs	r4, r4, #5
-.L2821:
-	ldr	r2, .L2907+36
+.L2910:
+	ldr	r2, .L2996+36
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2825
-	ldr	r3, .L2907+40
+	bcs	.L2914
+	ldr	r3, .L2996+40
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2826
-	ldr	r0, .L2907+16
+	bne	.L2915
+	ldr	r0, .L2996+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2826
-	ldr	r3, .L2907+44
+	bne	.L2915
+	ldr	r3, .L2996+44
 	ldrh	r0, [r3]
-	cbnz	r0, .L2827
-	ldr	r3, .L2907+48
-	ldr	r4, .L2907+52
+	cbnz	r0, .L2916
+	ldr	r3, .L2996+48
+	ldr	r4, .L2996+52
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2828
-.L2827:
-	ldr	r3, .L2907+56
+	bcs	.L2917
+.L2916:
+	ldr	r3, .L2996+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2829:
-	ldr	r3, .L2907+60
+.L2918:
+	ldr	r3, .L2996+60
 	movs	r2, #0
 	str	r2, [r3]
-.L2817:
+.L2906:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2822:
+.L2911:
 	cmp	r3, #12
-	bls	.L2823
+	bls	.L2912
 	lsrs	r4, r4, #4
-	b	.L2821
-.L2823:
+	b	.L2910
+.L2912:
 	cmp	r3, #8
-	bls	.L2821
+	bls	.L2910
 	lsrs	r4, r4, #2
-	b	.L2821
-.L2873:
+	b	.L2910
+.L2962:
 	movs	r4, #1
-	b	.L2821
-.L2828:
+	b	.L2910
+.L2917:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2829
-.L2826:
-	ldr	r3, .L2907+56
+	b	.L2918
+.L2915:
+	ldr	r3, .L2996+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2825:
-	ldr	r3, .L2907+64
+.L2914:
+	ldr	r3, .L2996+64
 	ldrh	r3, [r3]
-	cbz	r3, .L2820
+	cbz	r3, .L2909
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L2820:
-	ldr	r5, .L2907+68
+.L2909:
+	ldr	r5, .L2996+68
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2832
-	ldr	r3, .L2907+16
+	bne	.L2921
+	ldr	r3, .L2996+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2833
-	ldr	r0, .L2907+72
+	beq	.L2922
+	ldr	r0, .L2996+72
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2834
+	cbnz	r1, .L2923
 	strh	r2, [r3]	@ movhi
-.L2834:
+.L2923:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2833:
+.L2922:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L2832
+	beq	.L2921
 	bl	IsBlkInGcList
-	cbz	r0, .L2836
+	cbz	r0, .L2925
 	strh	r6, [r5]	@ movhi
-.L2836:
-	ldr	r3, .L2907+76
+.L2925:
+	ldr	r3, .L2996+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2837
+	cbz	r3, .L2926
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L2837:
+.L2926:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2832
-	ldr	r0, .L2907+68
+	beq	.L2921
+	ldr	r0, .L2996+68
 	bl	make_superblock
-	ldr	r2, .L2907+80
+	ldr	r2, .L2996+80
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2907+72
+	ldr	r3, .L2996+72
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2907+84
+	ldr	r3, .L2996+84
 	strh	r2, [r3]	@ movhi
-.L2832:
-	ldr	r2, .L2907+88
+.L2921:
+	ldr	r2, .L2996+88
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2838
-	ldr	r2, .L2907+92
+	beq	.L2927
+	ldr	r2, .L2996+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2838
-	ldr	r5, .L2907+68
+	beq	.L2927
+	ldr	r5, .L2996+68
 	mov	r6, r5
-.L2839:
+.L2928:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2840
-	ldr	r10, .L2907+100
+	bne	.L2929
+	ldr	r10, .L2996+100
 	movs	r2, #0
-	ldr	r3, .L2907+60
+	ldr	r3, .L2996+60
 	mov	r7, r10
 	str	r2, [r3]
-.L2841:
+.L2930:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -20234,36 +20650,36 @@ rk_ftl_garbage_collect:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L2842
+	bne	.L2931
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L2817
-.L2872:
+	b	.L2906
+.L2961:
 	movs	r4, #1
-	b	.L2820
-.L2838:
+	b	.L2909
+.L2927:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2905:
-	ldr	r3, .L2907+44
+.L2994:
+	ldr	r3, .L2996+44
 	ldrh	r0, [r3]
-	b	.L2817
-.L2842:
+	b	.L2906
+.L2931:
 	str	r0, [sp, #8]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
 	ldr	r2, [sp, #8]
-	cbz	r0, .L2843
+	cbz	r0, .L2932
 	strh	r3, [r10]	@ movhi
-	b	.L2841
-.L2843:
-	ldr	r1, .L2907+32
+	b	.L2930
+.L2932:
+	ldr	r1, .L2996+32
 	uxth	r3, r3
-	ldr	lr, .L2907+104
+	ldr	lr, .L2996+104
 	uxth	r2, r2
-	ldr	r8, .L2907+72
+	ldr	r8, .L2996+72
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -20271,146 +20687,149 @@ rk_ftl_garbage_collect:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2845
+	bgt	.L2934
 	cmp	r3, #48
-	bls	.L2846
+	bls	.L2935
 	cmp	ip, #8
-	bls	.L2846
-	ldr	r3, .L2907+96
+	bls	.L2935
+	ldr	r3, .L2996+96
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2846
-.L2845:
+	bhi	.L2935
+.L2934:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2846:
+.L2935:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2847
+	bgt	.L2936
+	ldrh	r2, [r7]
+	cmp	r2, #3
+	bhi	.L2936
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2905
-.L2847:
+	b	.L2994
+.L2936:
 	cmp	r3, #0
-	bne	.L2848
+	bne	.L2937
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2841
-.L2908:
+	b	.L2930
+.L2997:
 	.align	2
-.L2907:
-	.word	.LANCHOR77
+.L2996:
+	.word	.LANCHOR76
 	.word	.LANCHOR171
-	.word	.LANCHOR86
-	.word	.LANCHOR114
+	.word	.LANCHOR85
 	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR114
 	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR89
-	.word	.LANCHOR53
+	.word	.LANCHOR88
+	.word	.LANCHOR52
 	.word	.LANCHOR176
-	.word	.LANCHOR94
+	.word	.LANCHOR93
 	.word	.LANCHOR240
-	.word	.LANCHOR73
-	.word	.LANCHOR101
+	.word	.LANCHOR72
+	.word	.LANCHOR100
 	.word	.LANCHOR223
 	.word	.LANCHOR172
-	.word	.LANCHOR117
+	.word	.LANCHOR116
 	.word	.LANCHOR204
-	.word	.LANCHOR84
-	.word	.LANCHOR8
+	.word	.LANCHOR83
+	.word	.LANCHOR15
 	.word	.LANCHOR241
 	.word	.LANCHOR242
+	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR110
+	.word	.LANCHOR109
 	.word	.LANCHOR178
 	.word	.LANCHOR38
-.L2848:
+.L2937:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L2909
+	ldr	r3, .L2998
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2849
+	cbz	r3, .L2938
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L2849:
-	ldr	r3, .L2909+4
+.L2938:
+	ldr	r3, .L2998+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2850
-	ldr	r1, .L2909+8
-	movw	r2, #857
-	ldr	r0, .L2909+12
+	bne	.L2939
+	ldr	r1, .L2998+8
+	movw	r2, #893
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2850:
-	ldr	r3, .L2909+24
+.L2939:
+	ldr	r3, .L2998+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2851
-	ldr	r1, .L2909+8
-	movw	r2, #858
-	ldr	r0, .L2909+12
+	bne	.L2940
+	ldr	r1, .L2998+8
+	movw	r2, #894
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2851:
-	ldr	r3, .L2909+28
+.L2940:
+	ldr	r3, .L2998+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2852
-	ldr	r1, .L2909+8
-	movw	r2, #859
-	ldr	r0, .L2909+12
+	bne	.L2941
+	ldr	r1, .L2998+8
+	movw	r2, #895
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2852:
+.L2941:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L2909+32
+	ldr	r2, .L2998+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2909+36
+	ldr	r2, .L2998+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L2840:
-	ldr	r3, .L2909+40
+.L2929:
+	ldr	r3, .L2998+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2909+44
+	ldr	r3, .L2998+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2909
+	ldr	r3, .L2998
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2853
+	cbz	r3, .L2942
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L2909+48
+	ldreq	r3, .L2998+48
 	ldrheq	r3, [r3]
 	streq	r3, [sp, #12]
-.L2853:
+.L2942:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #12]
-	ldr	fp, .L2909+84
+	ldr	fp, .L2998+84
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -20420,11 +20839,11 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #20]
-.L2855:
+.L2944:
 	ldrh	r3, [sp, #20]
 	cmp	r4, r3
-	bls	.L2863
-	ldr	r3, .L2909+52
+	bls	.L2952
+	ldr	r3, .L2998+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
@@ -20432,17 +20851,17 @@ rk_ftl_garbage_collect:
 	ldrh	r7, [r3]
 	ldr	r3, [sp, #20]
 	add	lr, lr, r3
-	ldr	r3, .L2909+56
+	ldr	r3, .L2998+56
 	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L2864
-.L2857:
+	b	.L2953
+.L2946:
 	ldr	r1, [sp, #16]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
 	str	r1, [sp, #16]
-	beq	.L2856
+	beq	.L2945
 	ldr	r1, [sp, #8]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
@@ -20451,27 +20870,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #8]
-.L2856:
+.L2945:
 	adds	r3, r3, #1
-.L2864:
+.L2953:
 	uxth	r2, r3
 	cmp	r2, r7
-	bcc	.L2857
+	bcc	.L2946
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #8]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2904:
+.L2993:
 	str	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L2862
+	bhi	.L2951
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	str	r3, [sp, #20]
-	b	.L2855
-.L2862:
+	b	.L2944
+.L2951:
 	ldr	r3, [sp, #16]
 	movs	r7, #36
 	muls	r7, r3, r7
@@ -20479,23 +20898,23 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2859
+	beq	.L2948
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L2859
+	bne	.L2948
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L2860
-	ldr	r1, .L2909+8
-	movw	r2, #898
-	ldr	r0, .L2909+12
+	bne	.L2949
+	ldr	r1, .L2998+8
+	movw	r2, #934
+	ldr	r0, .L2998+12
 	bl	printf
-	ldr	r1, .L2909+16
-	ldr	r0, .L2909+20
+	ldr	r1, .L2998+16
+	ldr	r0, .L2998+20
 	bl	printf
-.L2860:
+.L2949:
 	movs	r2, #0
 	add	r1, sp, #36
 	mov	r0, r10
@@ -20506,10 +20925,10 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2859
-	ldr	r2, .L2909+32
-	ldr	r1, .L2909+60
-	ldr	r10, .L2909+68
+	bne	.L2948
+	ldr	r2, .L2998+32
+	ldr	r1, .L2998+60
+	ldr	r10, .L2998+68
 	ldrh	r3, [r2]
 	str	r1, [sp, #28]
 	adds	r3, r3, #1
@@ -20531,7 +20950,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L2909+28
+	ldr	r7, .L2998+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -20542,62 +20961,62 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2909+64
+	ldr	r2, .L2998+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2909
+	ldr	r3, .L2998
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2861
+	cbnz	r3, .L2950
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L2861
+	beq	.L2950
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2859
-.L2861:
+	cbnz	r3, .L2948
+.L2950:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2859
-.L2906:
-	ldr	r3, .L2909+40
+	cbz	r0, .L2948
+.L2995:
+	ldr	r3, .L2998+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L2905
-.L2859:
+	b	.L2994
+.L2948:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L2904
-.L2863:
+	b	.L2993
+.L2952:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L2865
-	ldr	r3, .L2909+68
+	bhi	.L2954
+	ldr	r3, .L2998+68
 	ldr	r3, [r3]
-	cbz	r3, .L2866
+	cbz	r3, .L2955
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L2906
-.L2866:
-	ldr	r3, .L2909+32
+	bne	.L2995
+.L2955:
+	ldr	r3, .L2998+32
 	ldrh	r4, [r3]
-	cbnz	r4, .L2867
-	ldr	r7, .L2909+72
+	cbnz	r4, .L2956
+	ldr	r7, .L2998+72
 	ldrh	r1, [r5]
 	ldr	r3, [r7]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L2867
-	ldr	r0, .L2909+36
+	cbz	r3, .L2956
+	ldr	r0, .L2998+36
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L2909+76
+	ldr	r0, .L2998+76
 	bl	printf
 	ldrh	r2, [r5]
 	ldr	r3, [r7]
@@ -20607,54 +21026,54 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2867:
+.L2956:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2865:
-	ldr	r3, .L2909+80
+.L2954:
+	ldr	r3, .L2998+80
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L2868
-	ldr	r3, .L2909+44
+	bhi	.L2957
+	ldr	r3, .L2998+44
 	ldrh	r4, [r3]
-	b	.L2839
-.L2868:
-	ldr	r3, .L2909+40
+	b	.L2928
+.L2957:
+	ldr	r3, .L2998+40
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L2817
-.L2910:
+	b	.L2906
+.L2999:
 	.align	2
-.L2909:
-	.word	.LANCHOR8
-	.word	.LANCHOR92
+.L2998:
+	.word	.LANCHOR15
+	.word	.LANCHOR91
 	.word	.LANCHOR243
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR94
 	.word	.LANCHOR241
 	.word	.LANCHOR242
 	.word	.LANCHOR171
+	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR54
 	.word	.LANCHOR38
 	.word	.LANCHOR204+14
 	.word	.LANCHOR181
 	.word	.LANCHOR160
-	.word	.LANCHOR103
-	.word	.LANCHOR84
-	.word	.LC65
-	.word	.LANCHOR89
-	.word	.LANCHOR107
-.L2869:
+	.word	.LANCHOR102
+	.word	.LANCHOR83
+	.word	.LC66
+	.word	.LANCHOR88
+	.word	.LANCHOR106
+.L2958:
 	movs	r0, #0
-	b	.L2817
-.L2871:
+	b	.L2906
+.L2960:
 	mov	r0, r3
-	b	.L2817
+	b	.L2906
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -20669,68 +21088,68 @@ FtlInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r4, .L2920
+	ldr	r4, .L3009
 	mov	r5, r0
-	ldr	r2, .L2920+4
+	ldr	r2, .L3009+4
 	str	r3, [r4]
 	movs	r3, #0
-	ldr	r1, .L2920+8
+	ldr	r1, .L3009+8
 	str	r3, [r2]
-	ldr	r2, .L2920+12
-	ldr	r0, .L2920+16
+	ldr	r2, .L3009+12
+	ldr	r0, .L3009+16
 	str	r3, [r2]
 	bl	printf
 	mov	r0, r5
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L2920+20
+	ldr	r3, .L3009+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2912
-	ldr	r1, .L2920+24
-	ldr	r0, .L2920+28
-.L2919:
+	cbz	r0, .L3001
+	ldr	r1, .L3009+24
+	ldr	r0, .L3009+28
+.L3008:
 	bl	printf
-.L2913:
+.L3002:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2912:
+.L3001:
 	bl	FtlSysBlkInit
-	cbz	r0, .L2914
-	ldr	r1, .L2920+24
-	ldr	r0, .L2920+32
-	b	.L2919
-.L2914:
+	cbz	r0, .L3003
+	ldr	r1, .L3009+24
+	ldr	r0, .L3009+32
+	b	.L3008
+.L3003:
 	movs	r1, #1
 	str	r1, [r4]
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L2920+36
+	ldr	r3, .L3009+36
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L2913
+	bhi	.L3002
 	mov	r4, #1024
-.L2916:
+.L3005:
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L2916
-	b	.L2913
-.L2921:
+	bne	.L3005
+	b	.L3002
+.L3010:
 	.align	2
-.L2920:
-	.word	.LANCHOR231
+.L3009:
+	.word	.LANCHOR230
 	.word	.LANCHOR244
-	.word	.LC66
-	.word	.LANCHOR77
+	.word	.LC67
+	.word	.LANCHOR76
 	.word	.LC7
 	.word	.LANCHOR39
 	.word	.LANCHOR245
-	.word	.LC67
 	.word	.LC68
-	.word	.LANCHOR89
+	.word	.LC69
+	.word	.LANCHOR88
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
@@ -20746,21 +21165,21 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2923
-	ldr	r0, .L2924
+	cbnz	r0, .L3012
+	ldr	r0, .L3013
 	bl	FtlInit
-.L2923:
+.L3012:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L2924+4
+	ldr	r0, .L3013+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2925:
+.L3014:
 	.align	2
-.L2924:
-	.word	.LANCHOR15
-	.word	.LC69
+.L3013:
+	.word	.LANCHOR14
+	.word	.LC70
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -20773,20 +21192,20 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2940
+	ldr	r3, .L3029
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2926
-	ldr	r7, .L2940+4
-	ldr	r6, .L2940+8
-	ldr	r10, .L2940+32
+	beq	.L3015
+	ldr	r7, .L3029+4
+	ldr	r6, .L3029+8
+	ldr	r10, .L3029+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L2940+12
+	ldr	r4, .L3029+12
 	mov	r1, r5
-	ldr	r0, .L2940+16
+	ldr	r0, .L3029+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
@@ -20800,44 +21219,44 @@ ftl_fix_nand_power_lost_error:
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L2928:
+.L3017:
 	subs	r4, r4, #1
-	beq	.L2932
+	beq	.L3021
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L2928
-.L2932:
+	bne	.L3017
+.L3021:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2940+16
+	ldr	r0, .L3029+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2930
+	cbnz	r4, .L3019
 	add	r0, sp, #56
-	ldr	r7, .L2940+20
+	ldr	r7, .L3029+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L2940+24
+	ldr	r3, .L3029+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L2933:
+.L3022:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2935
+	bhi	.L3024
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2940+28
+	ldr	r0, .L3029+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -20848,18 +21267,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L2930:
+.L3019:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L2926:
+.L3015:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2935:
+.L3024:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L2934
+	beq	.L3023
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -20867,21 +21286,21 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L2934:
+.L3023:
 	adds	r2, r2, #1
-	b	.L2933
-.L2941:
+	b	.L3022
+.L3030:
 	.align	2
-.L2940:
-	.word	.LANCHOR8
-	.word	.LANCHOR235
-	.word	.LANCHOR84
-	.word	.LANCHOR93
-	.word	.LC70
-	.word	.LANCHOR78
-	.word	.LANCHOR38
-	.word	.LC71
+.L3029:
+	.word	.LANCHOR15
+	.word	.LANCHOR234
+	.word	.LANCHOR83
 	.word	.LANCHOR92
+	.word	.LC71
+	.word	.LANCHOR77
+	.word	.LANCHOR38
+	.word	.LC72
+	.word	.LANCHOR91
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -20900,34 +21319,34 @@ ftl_read:
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #52]
-	bne	.L2943
+	bne	.L3032
 	mov	r2, r3
 	ldr	r1, [sp, #52]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #32]
-.L2942:
+.L3031:
 	ldr	r0, [sp, #32]
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2943:
+.L3032:
 	ldr	r3, [sp, #52]
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
-	ldr	r3, .L2981
+	ldr	r3, .L3070
 	ldr	r2, [sp, #36]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2966
-	ldr	r3, .L2981+4
+	bhi	.L3055
+	ldr	r3, .L3070+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L2967
+	beq	.L3056
 	bl	FtlCacheWriteBack
-	ldr	r3, .L2981+8
+	ldr	r3, .L3070+8
 	mov	r0, r6
-	ldr	r10, .L2981+52
+	ldr	r10, .L3070+52
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -20937,7 +21356,7 @@ ftl_read:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #40]
-	ldr	r2, .L2981+12
+	ldr	r2, .L3070+12
 	ldr	r4, [sp, #40]
 	rsb	r3, r3, #1
 	str	r0, [sp, #44]
@@ -20952,44 +21371,44 @@ ftl_read:
 	str	r3, [sp, #24]
 	str	r3, [sp, #48]
 	str	r3, [sp, #32]
-.L2945:
+.L3034:
 	ldr	r3, [sp, #28]
-	cbnz	r3, .L2965
-	ldr	r3, .L2981+16
+	cbnz	r3, .L3054
+	ldr	r3, .L3070+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2942
+	beq	.L3031
 	movs	r1, #1
 	ldr	r0, [sp, #28]
 	bl	rk_ftl_garbage_collect
-	b	.L2942
-.L2965:
+	b	.L3031
+.L3054:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r0, r3, #1
-	bne	.L2946
-	ldr	fp, .L2981+8
+	bne	.L3035
+	ldr	fp, .L3070+8
 	mov	r8, #0
-.L2947:
+.L3036:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L2949
-.L2950:
+	bcc	.L3038
+.L3039:
 	ldr	r3, [sp, #28]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	beq	.L2954
-	ldr	r3, .L2981+20
+	beq	.L3043
+	ldr	r3, .L3070+20
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L2945
-.L2954:
+	bne	.L3034
+.L3043:
 	cmp	r5, #0
-	beq	.L2945
+	beq	.L3034
 	movs	r2, #0
 	mov	r1, r5
 	ldr	r0, [r10]
@@ -21004,7 +21423,7 @@ ftl_read:
 	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L2964:
+.L3053:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -21012,27 +21431,27 @@ ftl_read:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L2956
+	bne	.L3045
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2981+24
+	ldr	r3, .L3070+24
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2957
+	bne	.L3046
 	ldr	r3, [sp, #60]
 	mov	r0, r7
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L2980:
+.L3069:
 	bl	ftl_memcpy
-.L2957:
+.L3046:
 	ldr	r2, [r10]
 	add	r2, r2, r8
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L2958
-	ldr	ip, .L2981+32
+	beq	.L3047
+	ldr	ip, .L3070+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -21048,52 +21467,52 @@ ftl_read:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L2981+28
+	ldr	r0, .L3070+28
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L2958:
+.L3047:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r1, r3, #1
-	bne	.L2959
-	ldr	r1, .L2981+32
+	bne	.L3048
+	ldr	r1, .L3070+32
 	str	r3, [sp, #32]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L2960:
+.L3049:
 	add	fp, fp, #1
 	cmp	r5, fp
-	bne	.L2964
+	bne	.L3053
 	movs	r5, #0
-	b	.L2945
-.L2949:
+	b	.L3034
+.L3038:
 	mla	r0, r0, r4, r8
 	cmp	r6, r0
-	bhi	.L2948
+	bhi	.L3037
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L2948
+	bls	.L3037
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L2948:
+.L3037:
 	add	r8, r8, #1
-	b	.L2947
-.L2946:
+	b	.L3036
+.L3035:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r5, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #40]
 	cmp	r4, r3
-	ldr	r3, .L2981+8
-	bne	.L2951
-	ldr	r2, .L2981+24
+	ldr	r3, .L3070+8
+	bne	.L3040
+	ldr	r2, .L3070+24
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -21108,11 +21527,11 @@ ftl_read:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #48]
-	bne	.L2952
+	bne	.L3041
 	str	r7, [r8, #8]
-.L2952:
-	ldr	r3, .L2981+36
-	ldr	r2, .L2981+40
+.L3041:
+	ldr	r3, .L3070+36
+	ldr	r2, .L3070+40
 	str	r4, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -21121,12 +21540,12 @@ ftl_read:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L2950
-.L2951:
+	b	.L3039
+.L3040:
 	ldr	r2, [sp, #44]
 	cmp	r4, r2
-	bne	.L2953
-	ldr	r2, .L2981+44
+	bne	.L3042
+	ldr	r2, .L3070+44
 	ldr	r1, [sp, #36]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -21135,50 +21554,50 @@ ftl_read:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #24]
-	bne	.L2952
-.L2979:
+	bne	.L3041
+.L3068:
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L2952
-.L2953:
+	b	.L3041
+.L3042:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L2979
-.L2956:
+	b	.L3068
+.L3045:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L2957
+	bne	.L3046
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2981+44
+	ldr	r3, .L3070+44
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2957
-	ldr	r3, .L2981+8
+	bne	.L3046
+	ldr	r3, .L3070+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L2980
-.L2959:
+	b	.L3069
+.L3048:
 	cmp	r3, #256
-	bne	.L2960
+	bne	.L3049
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L2981+48
+	ldr	r2, .L3070+48
 	movw	r3, #2049
-.L2962:
+.L3051:
 	subs	r3, r3, #1
-	bne	.L2961
-.L2963:
+	bne	.L3050
+.L3052:
 	bl	FtlSysFlush
-	b	.L2960
-.L2961:
+	b	.L3049
+.L3050:
 	movs	r1, #1
 	str	r2, [sp, #76]
 	mov	r0, r1
@@ -21188,26 +21607,26 @@ ftl_read:
 	ldr	r3, [sp, #72]
 	ldrh	r1, [r2]
 	cmp	r1, r8
-	beq	.L2962
-	b	.L2963
-.L2966:
+	beq	.L3051
+	b	.L3052
+.L3055:
 	mov	r3, #-1
-.L2967:
+.L3056:
 	str	r3, [sp, #32]
-	b	.L2942
-.L2982:
+	b	.L3031
+.L3071:
 	.align	2
-.L2981:
-	.word	.LANCHOR69
-	.word	.LANCHOR231
-	.word	.LANCHOR56
+.L3070:
+	.word	.LANCHOR68
+	.word	.LANCHOR230
+	.word	.LANCHOR55
 	.word	.LANCHOR166
-	.word	.LANCHOR117
+	.word	.LANCHOR116
 	.word	.LANCHOR38
 	.word	.LANCHOR186
-	.word	.LC60
+	.word	.LC59
 	.word	.LANCHOR138
-	.word	.LANCHOR59
+	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR187
 	.word	.LANCHOR204
@@ -21226,39 +21645,39 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r3, .L3031
+	ldr	r3, .L3120
 	sub	sp, sp, #80
 	mov	r6, r1
 	str	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3016
+	bne	.L3105
 	cmp	r0, #16
-	bne	.L2985
+	bne	.L3074
 	mov	r2, r10
 	ldr	r1, [sp, #12]
 	add	r0, r6, #256
 	bl	FtlVendorPartWrite
-.L2983:
+.L3072:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2985:
+.L3074:
 	ldr	r3, [sp, #12]
 	adds	r5, r1, r3
-	ldr	r3, .L3031+4
+	ldr	r3, .L3120+4
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L3017
-	ldr	r3, .L3031+8
+	bhi	.L3106
+	ldr	r3, .L3120+8
 	ldr	r0, [r3]
 	adds	r4, r0, #1
-	beq	.L2983
-	ldr	r3, .L3031+12
+	beq	.L3072
+	ldr	r3, .L3120+12
 	mov	r2, #2048
 	mov	r0, r6
 	str	r2, [r3]
-	ldr	r3, .L3031+16
+	ldr	r3, .L3120+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21266,7 +21685,7 @@ FtlWrite:
 	mov	r8, r0
 	subs	r0, r5, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3031+20
+	ldr	r2, .L3120+20
 	sub	r5, r0, r8
 	adds	r3, r5, #1
 	adds	r1, r5, #1
@@ -21275,29 +21694,29 @@ FtlWrite:
 	str	r0, [sp, #16]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L3031+24
+	ldr	r3, .L3120+24
 	ldr	fp, [r3]
 	cmp	fp, #0
-	beq	.L2987
+	beq	.L3076
 	ldr	r3, [fp, #16]
 	cmp	r8, r3
-	beq	.L2988
+	beq	.L3077
 	bl	FtlCacheWriteBack
-.L2987:
-	ldr	r7, .L3031+28
+.L3076:
+	ldr	r7, .L3120+28
 	mov	r4, r8
-.L2989:
+.L3078:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L3015
+	cbnz	r3, .L3104
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #4]
 	sub	r1, r3, r8
 	bl	rk_ftl_garbage_collect
-.L3016:
+.L3105:
 	movs	r0, #0
-	b	.L2983
-.L2988:
-	ldr	r2, .L3031+32
+	b	.L3072
+.L3077:
+	ldr	r2, .L3120+32
 	mov	r1, r4
 	mov	r0, r6
 	ldr	r3, [r2]
@@ -21317,7 +21736,7 @@ FtlWrite:
 	mov	r2, r7
 	bl	ftl_memcpy
 	cmp	r5, #0
-	beq	.L3016
+	beq	.L3105
 	ldr	r3, [sp, #12]
 	add	r6, r6, r4
 	add	r10, r10, r7
@@ -21326,27 +21745,27 @@ FtlWrite:
 	str	r3, [sp, #12]
 	bl	FtlCacheWriteBack
 	str	r5, [sp, #4]
-	b	.L2987
-.L3015:
-	ldr	r5, .L3031+36
+	b	.L3076
+.L3104:
+	ldr	r5, .L3120+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2990
-	ldr	r1, .L3031+40
+	bcc	.L3079
+	ldr	r1, .L3120+40
 	movw	r2, #1668
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L2990:
+.L3079:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2991
+	cbnz	r3, .L3080
 	bl	FtlCacheWriteBack
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L2991:
+.L3080:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -21361,24 +21780,24 @@ FtlWrite:
 	str	r3, [sp, #36]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2992
-	ldr	r1, .L3031+40
+	bcc	.L3081
+	ldr	r1, .L3120+40
 	movw	r2, #1701
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L2992:
+.L3081:
 	movs	r3, #0
-.L3030:
+.L3119:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #36]
 	cmp	r3, r2
-	bne	.L3013
-.L2994:
-	ldr	r0, .L3031+56
+	bne	.L3102
+.L3083:
+	ldr	r0, .L3120+56
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #8]
@@ -21387,24 +21806,24 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bcs	.L3014
-	ldr	r1, .L3031+40
+	bcs	.L3103
+	ldr	r1, .L3120+40
 	movw	r2, #1790
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L3014:
+.L3103:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	subs	r3, r3, r2
 	str	r3, [sp, #4]
-	b	.L2989
-.L3013:
+	b	.L3078
+.L3102:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L2994
+	beq	.L3083
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
@@ -21413,9 +21832,9 @@ FtlWrite:
 	mov	r0, r7
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #8]
-	ldr	r2, .L3031+60
+	ldr	r2, .L3120+60
 	muls	r5, r3, r5
-	ldr	r3, .L3031+56
+	ldr	r3, .L3120+56
 	ldrh	r2, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #20]
@@ -21425,7 +21844,7 @@ FtlWrite:
 	str	r4, [r1, #16]
 	mul	r0, r2, r3
 	bic	r3, r0, #3
-	ldr	r0, .L3031+64
+	ldr	r0, .L3120+64
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -21436,12 +21855,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	r4, r8
-	ldr	r1, .L3031+16
-	beq	.L2995
+	ldr	r1, .L3120+16
+	beq	.L3084
 	ldr	r3, [sp, #16]
 	cmp	r3, r4
 	ldr	r3, [sp, #20]
-	bne	.L3026
+	bne	.L3115
 	ldr	r3, [sp, #12]
 	adds	r2, r6, r3
 	ldrh	r3, [r1]
@@ -21452,8 +21871,8 @@ FtlWrite:
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L2998
-.L2995:
+	b	.L3087
+.L3084:
 	ldrh	r2, [r1]
 	mov	r0, r6
 	mov	r1, r2
@@ -21468,14 +21887,14 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #20]
-.L2998:
-	ldr	r3, .L3031+16
+.L3087:
+	ldr	r3, .L3120+16
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	ldr	r3, .L3031+56
+	ldr	r3, .L3120+56
 	ldr	r3, [r3]
-	bne	.L2999
+	bne	.L3088
 	cmp	r4, r8
 	add	r5, r5, r3
 	itett	ne
@@ -21486,25 +21905,25 @@ FtlWrite:
 	itt	ne
 	addne	r2, r10, r2, lsl #9
 	strne	r2, [r5, #8]
-.L3001:
-	ldr	r3, .L3031+36
+.L3090:
+	ldr	r3, .L3120+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L3010
-	ldr	r1, .L3031+40
+	bcc	.L3099
+	ldr	r1, .L3120+40
 	movw	r2, #1775
-	ldr	r0, .L3031+44
+	ldr	r0, .L3120+44
 	bl	printf
-	ldr	r1, .L3031+48
-	ldr	r0, .L3031+52
+	ldr	r1, .L3120+48
+	ldr	r0, .L3120+52
 	bl	printf
-.L3010:
+.L3099:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3031+68
+	ldr	r2, .L3120+68
 	str	r4, [fp, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -21520,18 +21939,18 @@ FtlWrite:
 	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3030
-.L3032:
+	b	.L3119
+.L3121:
 	.align	2
-.L3031:
-	.word	.LANCHOR77
-	.word	.LANCHOR69
-	.word	.LANCHOR231
+.L3120:
+	.word	.LANCHOR76
+	.word	.LANCHOR68
+	.word	.LANCHOR230
 	.word	.LANCHOR246
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR162
 	.word	.LANCHOR132
-	.word	.LANCHOR92
+	.word	.LANCHOR91
 	.word	.LANCHOR164
 	.word	.LANCHOR38
 	.word	.LANCHOR247
@@ -21539,21 +21958,21 @@ FtlWrite:
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR182
-	.word	.LANCHOR59
+	.word	.LANCHOR58
 	.word	.LANCHOR189
 	.word	.LANCHOR160
-.L2999:
+.L3088:
 	cmp	r4, r8
 	add	r3, r3, r5
 	ite	eq
-	ldreq	r2, .L3033
-	ldrne	r2, .L3033+4
+	ldreq	r2, .L3122
+	ldrne	r2, .L3122+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r2, [sp, #40]
-	ldr	r3, .L3033+8
+	ldr	r3, .L3122+8
 	adds	r0, r2, #1
-	beq	.L3004
+	beq	.L3093
 	ldr	r3, [r3]
 	movs	r1, #1
 	str	r2, [sp, #48]
@@ -21568,60 +21987,60 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L3005
-	ldr	r2, .L3033+12
+	bne	.L3094
+	ldr	r2, .L3122+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L3008:
+.L3097:
 	ldr	r2, [sp, #20]
 	cmp	r4, r8
-	ldr	r3, .L3033+8
+	ldr	r3, .L3122+8
 	lsl	r2, r2, #9
-	bne	.L3009
+	bne	.L3098
 	ldr	r3, [r3]
 	mov	r1, r10
 	add	r5, r5, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r5, #8]
 	add	r0, r0, r3, lsl #9
-.L3028:
+.L3117:
 	bl	ftl_memcpy
-	b	.L3001
-.L3005:
+	b	.L3090
+.L3094:
 	ldr	r1, [fp, #8]
 	cmp	r4, r1
-	beq	.L3007
-	ldr	r2, .L3033+12
-	ldr	r0, .L3033+16
+	beq	.L3096
+	ldr	r2, .L3122+12
+	ldr	r0, .L3122+16
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L3007:
+.L3096:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L3008
+	beq	.L3097
 	movw	r2, #1754
-	ldr	r1, .L3033+20
-	ldr	r0, .L3033+24
+	ldr	r1, .L3122+20
+	ldr	r0, .L3122+24
 	bl	printf
-	ldr	r1, .L3033+28
-	ldr	r0, .L3033+32
+	ldr	r1, .L3122+28
+	ldr	r0, .L3122+32
 	bl	printf
-	b	.L3008
-.L3004:
+	b	.L3097
+.L3093:
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L3033+36
+	ldr	r2, .L3122+36
 	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L3008
-.L3009:
-	ldr	r1, .L3033+40
+	b	.L3097
+.L3098:
+	ldr	r1, .L3122+40
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
 	add	r5, r5, r3
@@ -21629,8 +22048,8 @@ FtlWrite:
 	muls	r1, r4, r1
 	subs	r1, r1, r6
 	add	r1, r10, r1, lsl #9
-	b	.L3028
-.L3026:
+	b	.L3117
+.L3115:
 	ldr	r3, [r3]
 	add	r5, r5, r3
 	ldrh	r3, [r1]
@@ -21638,24 +22057,24 @@ FtlWrite:
 	subs	r3, r3, r6
 	add	r3, r10, r3, lsl #9
 	str	r3, [r5, #8]
-	b	.L3001
-.L3017:
+	b	.L3090
+.L3106:
 	mov	r0, #-1
-	b	.L2983
-.L3034:
+	b	.L3072
+.L3123:
 	.align	2
-.L3033:
+.L3122:
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR182
 	.word	.LANCHOR138
-	.word	.LC72
+	.word	.LC73
 	.word	.LANCHOR247
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LANCHOR58
-	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR55
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",%progbits
 	.align	1
@@ -21745,11 +22164,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3040
+	cbnz	r0, .L3129
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3040:
+.L3129:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -21770,69 +22189,69 @@ FtlCheckVpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L3065
-	ldr	r5, .L3065+4
-	ldr	r1, .L3065+8
-	ldr	r0, .L3065+12
+	ldr	r6, .L3154
+	ldr	r5, .L3154+4
+	ldr	r1, .L3154+8
+	ldr	r0, .L3154+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L3065+4
+	ldr	r0, .L3154+4
 	bl	memset
-.L3042:
+.L3131:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L3044
-	ldr	r7, .L3065+16
+	bcc	.L3133
+	ldr	r7, .L3154+16
 	movs	r4, #0
-	ldr	r5, .L3065+20
+	ldr	r5, .L3154+20
 	movs	r2, #2
-	ldr	r10, .L3065+4
+	ldr	r10, .L3154+4
 	mov	r6, r4
-	ldr	fp, .L3065+60
+	ldr	fp, .L3154+60
 	mov	r8, r7
 	ldrh	r3, [r7]
 	ldr	r1, [r5]
-	ldr	r0, .L3065+24
+	ldr	r0, .L3154+24
 	bl	rknand_print_hex
 	ldrh	r3, [r7]
 	movs	r2, #2
-	ldr	r1, .L3065+4
-	ldr	r0, .L3065+28
+	ldr	r1, .L3154+4
+	ldr	r0, .L3154+28
 	bl	rknand_print_hex
-.L3045:
+.L3134:
 	ldrh	r2, [r8]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L3047
-	ldr	r3, .L3065+32
+	bhi	.L3136
+	ldr	r3, .L3154+32
 	ldr	r4, [r3]
-	cbz	r4, .L3048
-	ldr	r3, .L3065+36
+	cbz	r4, .L3137
+	ldr	r3, .L3154+36
 	mov	r8, #0
-	ldr	r7, .L3065+40
-	ldr	fp, .L3065+64
+	ldr	r7, .L3154+40
+	ldr	fp, .L3154+64
 	ldrh	r10, [r3]
 	ldr	r3, [r7]
 	subs	r4, r4, r3
-	ldr	r3, .L3065+44
+	ldr	r3, .L3154+44
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L3049:
+.L3138:
 	uxth	r3, r8
 	cmp	r10, r3
-	bls	.L3048
+	bls	.L3137
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L3050
-	ldr	r3, .L3065+4
+	cbz	r2, .L3139
+	ldr	r3, .L3154+4
 	movs	r6, #1
 	mov	r1, r4
 	mov	r0, fp
 	ldrh	r3, [r3, r4, lsl #1]
 	bl	printf
-.L3050:
+.L3139:
 	movs	r3, #6
 	ldr	r2, [r7]
 	muls	r4, r3, r4
@@ -21840,43 +22259,43 @@ FtlCheckVpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L3049
-.L3048:
-	cbz	r6, .L3041
-	ldr	r1, .L3065+8
-	movw	r2, #1669
-	ldr	r0, .L3065+48
+	bne	.L3138
+.L3137:
+	cbz	r6, .L3130
+	ldr	r1, .L3154+8
+	movw	r2, #1686
+	ldr	r0, .L3154+48
 	bl	printf
-	ldr	r1, .L3065+52
-	ldr	r0, .L3065+56
+	ldr	r1, .L3154+52
+	ldr	r0, .L3154+56
 	bl	printf
-.L3041:
+.L3130:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3044:
+.L3133:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L3043
+	beq	.L3132
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L3043:
+.L3132:
 	adds	r4, r4, #1
-	b	.L3042
-.L3047:
+	b	.L3131
+.L3136:
 	ldr	r3, [r5]
 	uxth	r7, r4
 	ldrh	r2, [r3, r7, lsl #1]
 	ldrh	r3, [r10, r7, lsl #1]
 	cmp	r2, r3
-	beq	.L3046
+	beq	.L3135
 	mov	r1, r7
 	mov	r0, fp
 	bl	printf
@@ -21884,34 +22303,34 @@ FtlCheckVpc:
 	movw	r2, #65535
 	ldrh	r3, [r3, r7, lsl #1]
 	cmp	r3, r2
-	beq	.L3046
+	beq	.L3135
 	ldrh	r2, [r10, r7, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L3046:
+.L3135:
 	adds	r4, r4, #1
-	b	.L3045
-.L3066:
+	b	.L3134
+.L3155:
 	.align	2
-.L3065:
-	.word	.LANCHOR73
+.L3154:
+	.word	.LANCHOR72
 	.word	check_valid_page_count_table
 	.word	.LANCHOR248
 	.word	.LC45
 	.word	.LANCHOR40
-	.word	.LANCHOR84
-	.word	.LC73
+	.word	.LANCHOR83
 	.word	.LC74
+	.word	.LC75
+	.word	.LANCHOR87
 	.word	.LANCHOR88
-	.word	.LANCHOR89
-	.word	.LANCHOR82
+	.word	.LANCHOR81
 	.word	-1431655765
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC75
 	.word	.LC76
+	.word	.LC77
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",%progbits
 	.align	1
@@ -21926,27 +22345,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3074
+	ldr	r5, .L3163
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3074+4
+	ldr	r4, .L3163+4
 	ldr	r3, [r5]
-	ldr	r8, .L3074+20
+	ldr	r8, .L3163+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3074+8
+	ldr	r3, .L3163+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3068:
+.L3157:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3070
+	blt	.L3159
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3070:
+.L3159:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -21956,7 +22375,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3074+12
+	ldr	r0, .L3163+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -21972,24 +22391,24 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3069
+	beq	.L3158
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3074+16
+	ldr	r0, .L3163+16
 	bl	rknand_print_hex
-.L3069:
+.L3158:
 	adds	r6, r6, #1
-	b	.L3068
-.L3075:
+	b	.L3157
+.L3164:
 	.align	2
-.L3074:
+.L3163:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LC77
 	.word	.LC78
-	.word	.LANCHOR54
+	.word	.LC79
+	.word	.LANCHOR53
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",%progbits
 	.align	1
@@ -22002,32 +22421,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3090
+	ldr	r3, .L3179
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3090+72
+	ldr	r8, .L3179+72
 	ldrh	r5, [r3]
-.L3077:
-	ldr	r3, .L3090+4
+.L3166:
+	ldr	r3, .L3179+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3084
-	ldr	r4, .L3090+8
+	bhi	.L3173
+	ldr	r4, .L3179+8
 	movs	r7, #0
-.L3085:
-	ldr	r3, .L3090+12
+.L3174:
+	ldr	r3, .L3179+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3088
+	bge	.L3177
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3090+76
-	b	.L3089
-.L3079:
+	ldr	r8, .L3179+76
+	b	.L3178
+.L3168:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3090+16
+	ldr	r3, .L3179+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -22035,7 +22454,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3078
+	cbnz	r0, .L3167
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -22048,29 +22467,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3078:
+.L3167:
 	adds	r6, r6, #1
-.L3086:
+.L3175:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3079
-	cbnz	r4, .L3080
-.L3083:
+	bhi	.L3168
+	cbnz	r4, .L3169
+.L3172:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3077
-.L3080:
-	ldr	r10, .L3090+80
+	b	.L3166
+.L3169:
+	ldr	r10, .L3179+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3081:
+.L3170:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3083
+	bls	.L3172
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22091,24 +22510,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3081
-.L3084:
-	ldr	r1, .L3090+20
+	b	.L3170
+.L3173:
+	ldr	r1, .L3179+20
 	movs	r6, #0
-	ldr	r3, .L3090+24
+	ldr	r3, .L3179+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3090+28
+	ldr	r3, .L3179+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3090+32
+	ldr	r1, .L3179+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3086
-.L3087:
-	ldr	r10, .L3090+44
+	b	.L3175
+.L3176:
+	ldr	r10, .L3179+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22124,7 +22543,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3090+36
+	ldr	r0, .L3179+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22136,62 +22555,62 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3089:
+.L3178:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3087
+	blt	.L3176
 	adds	r7, r7, #1
-	b	.L3085
-.L3088:
-	ldr	r3, .L3090+40
+	b	.L3174
+.L3177:
+	ldr	r3, .L3179+40
 	movs	r2, #2
-	ldr	r1, .L3090+44
-	ldr	r0, .L3090+48
+	ldr	r1, .L3179+44
+	ldr	r0, .L3179+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3090+52
+	ldr	r4, .L3179+52
 	movs	r2, #4
-	ldr	r1, .L3090+56
-	ldr	r0, .L3090+60
+	ldr	r1, .L3179+56
+	ldr	r0, .L3179+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3090+64
+	ldr	r1, .L3179+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3090+68
+	ldr	r0, .L3179+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3091:
+.L3180:
 	.align	2
-.L3090:
+.L3179:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR202
 	.word	.LANCHOR128
 	.word	.LANCHOR47
-	.word	.LANCHOR106
-	.word	.LANCHOR38
 	.word	.LANCHOR105
-	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LANCHOR104
+	.word	.LANCHOR58
 	.word	.LC48
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	.LANCHOR129
-	.word	.LC80
-	.word	.LANCHOR67
-	.word	.LANCHOR131
 	.word	.LC81
-	.word	.LANCHOR195
+	.word	.LANCHOR66
+	.word	.LANCHOR131
 	.word	.LC82
+	.word	.LANCHOR195
+	.word	.LC83
 	.word	.LANCHOR180
-	.word	.LANCHOR54
-	.word	.LC79
+	.word	.LANCHOR53
+	.word	.LC80
 	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -22357,7 +22776,6 @@ dump_map_info:
 	.global	c_ftl_nand_ext_blk_pre_plane
 	.global	c_ftl_nand_blk_pre_plane
 	.global	c_ftl_nand_planes_num
-	.global	c_ftl_nand_blks_per_die_shift
 	.global	c_ftl_nand_blks_per_die
 	.global	c_ftl_nand_planes_per_die
 	.global	c_ftl_nand_die_num
@@ -22374,6 +22792,7 @@ dump_map_info:
 	.global	gNandcVer
 	.global	gNandChipMap
 	.global	gNandIDataBuf
+	.global	idb_flash_slc_mode
 	.global	FlashDdrTunningReadCount
 	.global	FlashWaitBusyScheduleEn
 	.global	gNandPhyInfo
@@ -22420,7 +22839,7 @@ dump_map_info:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -22460,7 +22879,7 @@ FtlMallocBuffer:
 	.space	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -22492,24 +22911,17 @@ c_ftl_nand_blk_pre_plane:
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
-	.space	2
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
-	.align	1
-	.set	.LANCHOR52,. + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
@@ -22544,28 +22956,28 @@ c_ftl_nand_ext_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
@@ -22579,7 +22991,7 @@ c_ftl_nand_max_data_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
@@ -22593,28 +23005,28 @@ c_ftl_nand_max_sys_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
@@ -22635,21 +23047,21 @@ c_ftl_nand_planes_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
@@ -22677,7 +23089,7 @@ c_ftl_nand_type:
 	.space	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
@@ -22691,7 +23103,7 @@ c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -22718,7 +23130,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
@@ -22789,7 +23201,7 @@ gFlashProgCheckSpareBuffer:
 gFlashSdrModeEn:
 	.space	1
 	.section	.bss.gFlashSlcMode,"aw",%nobits
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	gFlashSlcMode, %object
 	.size	gFlashSlcMode, 1
 gFlashSlcMode:
@@ -22923,7 +23335,7 @@ gNandOptPara:
 	.space	32
 	.section	.bss.gNandPhyInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	gNandPhyInfo, %object
 	.size	gNandPhyInfo, 28
 gNandPhyInfo:
@@ -22963,7 +23375,7 @@ gReadRetryInfo:
 	.space	852
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -22972,9 +23384,9 @@ gSysFreeQueue:
 	.align	2
 	.set	.LANCHOR209,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.space	12
+	.space	16
 	.section	.bss.gToggleModeClkDiv,"aw",%nobits
 	.align	2
 	.type	gToggleModeClkDiv, %object
@@ -23018,7 +23430,7 @@ g_LowFormat:
 	.space	4
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -23032,7 +23444,7 @@ g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -23046,14 +23458,14 @@ g_SlcPartLbaEndSector:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
@@ -23067,14 +23479,14 @@ g_all_blk_used_slc_mode:
 	.space	4
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -23095,7 +23507,7 @@ g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_flash_read_only_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
@@ -23116,21 +23528,21 @@ g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -23144,7 +23556,7 @@ g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
@@ -23193,42 +23605,42 @@ g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_next_blk_2,"aw",%nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	g_gc_next_blk_2, %object
 	.size	g_gc_next_blk_2, 2
 g_gc_next_blk_2:
 	.space	2
 	.section	.bss.g_gc_next_blk_3,"aw",%nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_next_blk_3, %object
 	.size	g_gc_next_blk_3, 2
 g_gc_next_blk_3:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
@@ -23262,7 +23674,7 @@ g_gc_superblock:
 	.space	48
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
@@ -23290,13 +23702,13 @@ g_inkDie_check_enable:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
@@ -23323,42 +23735,42 @@ g_min_erase_count:
 	.space	4
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_page_map_check_enable,"aw",%nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.space	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR234,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -23372,14 +23784,14 @@ g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -23392,7 +23804,7 @@ g_recovery_ppa_tbl:
 g_req_cache:
 	.space	4
 	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -23412,7 +23824,7 @@ g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -23503,14 +23915,14 @@ g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
@@ -23531,7 +23943,7 @@ g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
@@ -23592,14 +24004,14 @@ gp_flash_check_buf:
 	.space	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR229,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -23610,6 +24022,13 @@ gp_last_act_superblock:
 	.size	idb_buf, 262144
 idb_buf:
 	.space	262144
+	.section	.bss.idb_flash_slc_mode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR29,. + 0
+	.type	idb_flash_slc_mode, %object
+	.size	idb_flash_slc_mode, 4
+idb_flash_slc_mode:
+	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
 	.set	.LANCHOR154,. + 0
@@ -23633,63 +24052,63 @@ p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
@@ -23724,7 +24143,7 @@ p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -23806,14 +24225,14 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
@@ -23854,14 +24273,14 @@ read_retry_cur_offset:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -23917,7 +24336,7 @@ LastWritenPbaAddr:
 	.align	1
 	.set	.LANCHOR142,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2464
+	.size	NandFlashParaTbl, 2592
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -24494,6 +24913,58 @@ NandFlashParaTbl:
 	.byte	5
 	.byte	44
 	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	1
+	.short	2184
+	.short	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	1
+	.short	2184
+	.short	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
 	.byte	-60
 	.byte	52
 	.byte	-86
@@ -24543,6 +25014,32 @@ NandFlashParaTbl:
 	.byte	1
 	.byte	0
 	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -24882,6 +25379,32 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
+	.byte	-83
+	.byte	58
+	.byte	20
+	.byte	3
+	.byte	8
+	.byte	80
+	.byte	2
+	.byte	1
+	.byte	32
+	.short	388
+	.byte	2
+	.byte	2
+	.short	1362
+	.short	473
+	.byte	9
+	.byte	8
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
 	.byte	-119
 	.byte	100
 	.byte	68
@@ -25078,7 +25601,7 @@ NandFlashParaTbl:
 	.byte	1
 	.short	1024
 	.short	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -26003,7 +26526,7 @@ NandOptPara:
 	.byte	0
 	.space	14
 	.section	.data.SamsungRefValue,"aw",%progbits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	SamsungRefValue, %object
 	.size	SamsungRefValue, 64
 SamsungRefValue:
@@ -26072,7 +26595,7 @@ SamsungRefValue:
 	.byte	2
 	.byte	0
 	.section	.data.Toshiba15RefValue,"aw",%progbits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	Toshiba15RefValue, %object
 	.size	Toshiba15RefValue, 95
 Toshiba15RefValue:
@@ -26172,7 +26695,7 @@ Toshiba15RefValue:
 	.byte	114
 	.byte	0
 	.section	.data.ToshibaA19RefValue,"aw",%progbits
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	ToshibaA19RefValue, %object
 	.size	ToshibaA19RefValue, 45
 ToshibaA19RefValue:
@@ -26222,7 +26745,7 @@ ToshibaA19RefValue:
 	.byte	124
 	.byte	0
 	.section	.data.ToshibaRefValue,"aw",%progbits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	ToshibaRefValue, %object
 	.size	ToshibaRefValue, 8
 ToshibaRefValue:
@@ -26236,14 +26759,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR226,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR230,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -26506,7 +27029,7 @@ refValueDefault:
 .LC32:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC53:
+.LC52:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
 .LC14:
@@ -26536,13 +27059,13 @@ refValueDefault:
 .LC35:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC73:
-	.ascii	"vpc1\000"
 .LC74:
-	.ascii	"vpc2\000"
+	.ascii	"vpc1\000"
 .LC75:
-	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+	.ascii	"vpc2\000"
 .LC76:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC77:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
 .LC45:
@@ -26555,10 +27078,10 @@ refValueDefault:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
-.LC77:
+.LC78:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
 	.ascii	"\000"
-.LC78:
+.LC79:
 	.ascii	":\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC3:
@@ -26567,18 +27090,20 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC64:
+.LC65:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC52:
+.LC63:
+	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
+.LC64:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC66:
-	.ascii	"FTL version: 5.0.50 20180905\000"
 .LC67:
+	.ascii	"FTL version: 5.0.53 20190107\000"
+.LC68:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC68:
+.LC69:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
 .LC43:
@@ -26589,14 +27114,14 @@ refValueDefault:
 .LC41:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC57:
+.LC56:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC61:
+.LC60:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC62:
+.LC61:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC63:
+.LC62:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
 .LC49:
@@ -26614,17 +27139,17 @@ refValueDefault:
 .LC38:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC72:
+.LC73:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
 .LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC58:
+.LC57:
 	.ascii	"Ftlscanalldata = %x\012\000"
-.LC59:
+.LC58:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC60:
+.LC59:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
@@ -26642,203 +27167,203 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10408,"a",%progbits
+	.section	.rodata.__func__.10518,"a",%progbits
 	.set	.LANCHOR245,. + 0
-	.type	__func__.10408, %object
-	.size	__func__.10408, 8
-__func__.10408:
+	.type	__func__.10518, %object
+	.size	__func__.10518, 8
+__func__.10518:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10468,"a",%progbits
-	.set	.LANCHOR229,. + 0
-	.type	__func__.10468, %object
-	.size	__func__.10468, 13
-__func__.10468:
+	.section	.rodata.__func__.10578,"a",%progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.10578, %object
+	.size	__func__.10578, 13
+__func__.10578:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10494,"a",%progbits
+	.section	.rodata.__func__.10604,"a",%progbits
 	.set	.LANCHOR247,. + 0
-	.type	__func__.10494, %object
-	.size	__func__.10494, 9
-__func__.10494:
+	.type	__func__.10604, %object
+	.size	__func__.10604, 9
+__func__.10604:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10577,"a",%progbits
+	.section	.rodata.__func__.10687,"a",%progbits
 	.set	.LANCHOR124,. + 0
-	.type	__func__.10577, %object
-	.size	__func__.10577, 14
-__func__.10577:
+	.type	__func__.10687, %object
+	.size	__func__.10687, 14
+__func__.10687:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10623,"a",%progbits
+	.section	.rodata.__func__.10733,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10623, %object
-	.size	__func__.10623, 11
-__func__.10623:
+	.type	__func__.10733, %object
+	.size	__func__.10733, 11
+__func__.10733:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10716,"a",%progbits
-	.set	.LANCHOR90,. + 0
-	.type	__func__.10716, %object
-	.size	__func__.10716, 17
-__func__.10716:
+	.section	.rodata.__func__.10826,"a",%progbits
+	.set	.LANCHOR89,. + 0
+	.type	__func__.10826, %object
+	.size	__func__.10826, 17
+__func__.10826:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10720,"a",%progbits
-	.set	.LANCHOR87,. + 0
-	.type	__func__.10720, %object
-	.size	__func__.10720, 17
-__func__.10720:
+	.section	.rodata.__func__.10830,"a",%progbits
+	.set	.LANCHOR86,. + 0
+	.type	__func__.10830, %object
+	.size	__func__.10830, 17
+__func__.10830:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10757,"a",%progbits
-	.set	.LANCHOR91,. + 0
-	.type	__func__.10757, %object
-	.size	__func__.10757, 17
-__func__.10757:
+	.section	.rodata.__func__.10867,"a",%progbits
+	.set	.LANCHOR90,. + 0
+	.type	__func__.10867, %object
+	.size	__func__.10867, 17
+__func__.10867:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10787,"a",%progbits
-	.set	.LANCHOR95,. + 0
-	.type	__func__.10787, %object
-	.size	__func__.10787, 22
-__func__.10787:
+	.section	.rodata.__func__.10897,"a",%progbits
+	.set	.LANCHOR94,. + 0
+	.type	__func__.10897, %object
+	.size	__func__.10897, 22
+__func__.10897:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10794,"a",%progbits
-	.set	.LANCHOR228,. + 0
-	.type	__func__.10794, %object
-	.size	__func__.10794, 20
-__func__.10794:
+	.section	.rodata.__func__.10904,"a",%progbits
+	.set	.LANCHOR227,. + 0
+	.type	__func__.10904, %object
+	.size	__func__.10904, 20
+__func__.10904:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10825,"a",%progbits
-	.set	.LANCHOR96,. + 0
-	.type	__func__.10825, %object
-	.size	__func__.10825, 26
-__func__.10825:
+	.section	.rodata.__func__.10935,"a",%progbits
+	.set	.LANCHOR95,. + 0
+	.type	__func__.10935, %object
+	.size	__func__.10935, 26
+__func__.10935:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10835,"a",%progbits
+	.section	.rodata.__func__.10945,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10835, %object
-	.size	__func__.10835, 15
-__func__.10835:
+	.type	__func__.10945, %object
+	.size	__func__.10945, 15
+__func__.10945:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10848,"a",%progbits
+	.section	.rodata.__func__.10958,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10848, %object
-	.size	__func__.10848, 31
-__func__.10848:
+	.type	__func__.10958, %object
+	.size	__func__.10958, 31
+__func__.10958:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10861,"a",%progbits
+	.section	.rodata.__func__.10971,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10861, %object
-	.size	__func__.10861, 16
-__func__.10861:
+	.type	__func__.10971, %object
+	.size	__func__.10971, 16
+__func__.10971:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10881,"a",%progbits
-	.set	.LANCHOR99,. + 0
-	.type	__func__.10881, %object
-	.size	__func__.10881, 22
-__func__.10881:
+	.section	.rodata.__func__.10991,"a",%progbits
+	.set	.LANCHOR98,. + 0
+	.type	__func__.10991, %object
+	.size	__func__.10991, 22
+__func__.10991:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10897,"a",%progbits
-	.set	.LANCHOR227,. + 0
-	.type	__func__.10897, %object
-	.size	__func__.10897, 9
-__func__.10897:
+	.section	.rodata.__func__.11007,"a",%progbits
+	.set	.LANCHOR226,. + 0
+	.type	__func__.11007, %object
+	.size	__func__.11007, 9
+__func__.11007:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10959,"a",%progbits
+	.section	.rodata.__func__.11069,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.10959, %object
-	.size	__func__.10959, 15
-__func__.10959:
+	.type	__func__.11069, %object
+	.size	__func__.11069, 15
+__func__.11069:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10978,"a",%progbits
+	.section	.rodata.__func__.11088,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10978, %object
-	.size	__func__.10978, 14
-__func__.10978:
+	.type	__func__.11088, %object
+	.size	__func__.11088, 14
+__func__.11088:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11032,"a",%progbits
+	.section	.rodata.__func__.11143,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11032, %object
-	.size	__func__.11032, 15
-__func__.11032:
+	.type	__func__.11143, %object
+	.size	__func__.11143, 15
+__func__.11143:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11043,"a",%progbits
+	.section	.rodata.__func__.11154,"a",%progbits
 	.set	.LANCHOR248,. + 0
-	.type	__func__.11043, %object
-	.size	__func__.11043, 12
-__func__.11043:
+	.type	__func__.11154, %object
+	.size	__func__.11154, 12
+__func__.11154:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11075,"a",%progbits
+	.section	.rodata.__func__.11186,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.11075, %object
-	.size	__func__.11075, 17
-__func__.11075:
+	.type	__func__.11186, %object
+	.size	__func__.11186, 17
+__func__.11186:
 	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11094,"a",%progbits
+	.section	.rodata.__func__.11205,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11094, %object
-	.size	__func__.11094, 16
-__func__.11094:
+	.type	__func__.11205, %object
+	.size	__func__.11205, 16
+__func__.11205:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11199,"a",%progbits
-	.set	.LANCHOR233,. + 0
-	.type	__func__.11199, %object
-	.size	__func__.11199, 16
-__func__.11199:
+	.section	.rodata.__func__.11310,"a",%progbits
+	.set	.LANCHOR232,. + 0
+	.type	__func__.11310, %object
+	.size	__func__.11310, 16
+__func__.11310:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11232,"a",%progbits
-	.set	.LANCHOR234,. + 0
-	.type	__func__.11232, %object
-	.size	__func__.11232, 22
-__func__.11232:
+	.section	.rodata.__func__.11343,"a",%progbits
+	.set	.LANCHOR233,. + 0
+	.type	__func__.11343, %object
+	.size	__func__.11343, 22
+__func__.11343:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11286,"a",%progbits
-	.set	.LANCHOR102,. + 0
-	.type	__func__.11286, %object
-	.size	__func__.11286, 16
-__func__.11286:
+	.section	.rodata.__func__.11397,"a",%progbits
+	.set	.LANCHOR101,. + 0
+	.type	__func__.11397, %object
+	.size	__func__.11397, 16
+__func__.11397:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11306,"a",%progbits
+	.section	.rodata.__func__.11417,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.11306, %object
-	.size	__func__.11306, 18
-__func__.11306:
+	.type	__func__.11417, %object
+	.size	__func__.11417, 18
+__func__.11417:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11383,"a",%progbits
+	.section	.rodata.__func__.11494,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11383, %object
-	.size	__func__.11383, 25
-__func__.11383:
+	.type	__func__.11494, %object
+	.size	__func__.11494, 25
+__func__.11494:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11397,"a",%progbits
+	.section	.rodata.__func__.11508,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11397, %object
-	.size	__func__.11397, 29
-__func__.11397:
+	.type	__func__.11508, %object
+	.size	__func__.11508, 29
+__func__.11508:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11403,"a",%progbits
+	.section	.rodata.__func__.11514,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.11403, %object
-	.size	__func__.11403, 19
-__func__.11403:
+	.type	__func__.11514, %object
+	.size	__func__.11514, 19
+__func__.11514:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11414,"a",%progbits
+	.section	.rodata.__func__.11525,"a",%progbits
 	.set	.LANCHOR206,. + 0
-	.type	__func__.11414, %object
-	.size	__func__.11414, 16
-__func__.11414:
+	.type	__func__.11525, %object
+	.size	__func__.11525, 16
+__func__.11525:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11419,"a",%progbits
+	.section	.rodata.__func__.11530,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.11419, %object
-	.size	__func__.11419, 20
-__func__.11419:
+	.type	__func__.11530, %object
+	.size	__func__.11530, 20
+__func__.11530:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11487,"a",%progbits
+	.section	.rodata.__func__.11598,"a",%progbits
 	.set	.LANCHOR239,. + 0
-	.type	__func__.11487, %object
-	.size	__func__.11487, 19
-__func__.11487:
+	.type	__func__.11598, %object
+	.size	__func__.11598, 19
+__func__.11598:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11581,"a",%progbits
+	.section	.rodata.__func__.11697,"a",%progbits
 	.set	.LANCHOR243,. + 0
-	.type	__func__.11581, %object
-	.size	__func__.11581, 23
-__func__.11581:
+	.type	__func__.11697, %object
+	.size	__func__.11697, 23
+__func__.11697:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC36:
@@ -26846,19 +27371,19 @@ __func__.11581:
 .LC37:
 	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
 	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
-.LC79:
+.LC80:
 	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC80:
-	.ascii	"Mblk:\000"
 .LC81:
-	.ascii	"L2P:\000"
+	.ascii	"Mblk:\000"
 .LC82:
+	.ascii	"L2P:\000"
+.LC83:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC70:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
 .LC71:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC72:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
@@ -26874,17 +27399,17 @@ __func__.11581:
 .LC17:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC54:
+.LC53:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC55:
+.LC54:
 	.ascii	"map_ppn:\000"
-.LC56:
+.LC55:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC65:
+.LC66:
 	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC69:
+.LC70:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index d2d1e42d45..06eaf15721 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-09-05
+ * date: 2019-01-07
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.c"
@@ -138,6 +138,25 @@ FlashSetRandomizer:
 	str	w4, [x0, 336]
 	ret
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashBlockAlignInit,"ax",@progbits
+	.align	2
+	.global	FlashBlockAlignInit
+	.type	FlashBlockAlignInit, %function
+FlashBlockAlignInit:
+	and	w0, w0, 65535
+	adrp	x1, .LANCHOR3
+	cmp	w0, 256
+	bls	.L36
+	mov	w0, 512
+.L39:
+	str	w0, [x1, #:lo12:.LANCHOR3]
+	ret
+.L36:
+	cmp	w0, 128
+	bls	.L39
+	mov	w0, 256
+	b	.L39
+	.size	FlashBlockAlignInit, .-FlashBlockAlignInit
 	.section	.text.FlashReadCmd,"ax",@progbits
 	.align	2
 	.global	FlashReadCmd
@@ -183,7 +202,7 @@ FlashReadDpDataOutCmd:
 	ldrb	w2, [x4, 8]
 	lsr	w4, w1, 8
 	add	x2, x6, x2, lsl 8
-	bne	.L37
+	bne	.L42
 	mov	w6, 6
 	str	w6, [x2, 2056]
 	str	wzr, [x2, 2052]
@@ -191,11 +210,11 @@ FlashReadDpDataOutCmd:
 	str	w5, [x2, 2052]
 	str	w4, [x2, 2052]
 	str	w3, [x2, 2052]
-.L39:
+.L44:
 	mov	w3, 224
 	str	w3, [x2, 2056]
 	b	FlashSetRandomizer
-.L37:
+.L42:
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
@@ -206,52 +225,8 @@ FlashReadDpDataOutCmd:
 	str	w3, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
-	b	.L39
+	b	.L44
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
-	.section	.text.flash_enter_slc_mode,"ax",@progbits
-	.align	2
-	.global	flash_enter_slc_mode
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	adrp	x1, .LANCHOR8
-	and	w0, w0, 255
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L40
-	sbfiz	x0, x0, 4, 32
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
-	add	x2, x1, x0
-	ldr	x1, [x1, x0]
-	ldrb	w0, [x2, 8]
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	mov	w1, 218
-	str	w1, [x0, 8]
-.L40:
-	ret
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",@progbits
-	.align	2
-	.global	flash_exit_slc_mode
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	adrp	x1, .LANCHOR8
-	and	w0, w0, 255
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L45
-	sbfiz	x0, x0, 4, 32
-	adrp	x1, .LANCHOR6
-	add	x1, x1, :lo12:.LANCHOR6
-	add	x2, x1, x0
-	ldr	x1, [x1, x0]
-	ldrb	w0, [x2, 8]
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	mov	w1, 223
-	str	w1, [x0, 8]
-.L45:
-	ret
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",@progbits
 	.align	2
 	.global	FlashProgFirstCmd
@@ -288,7 +263,7 @@ FlashEraseCmd:
 	add	x4, x3, x0
 	ldr	x3, [x3, x0]
 	ldrb	w0, [x4, 8]
-	cbz	w2, .L52
+	cbz	w2, .L47
 	add	x2, x3, x0, lsl 8
 	mov	w4, 96
 	str	w4, [x2, 2056]
@@ -301,7 +276,7 @@ FlashEraseCmd:
 	adrp	x2, .LANCHOR3
 	ldr	w2, [x2, #:lo12:.LANCHOR3]
 	add	w1, w1, w2
-.L52:
+.L47:
 	add	x0, x3, x0, lsl 8
 	mov	w2, 96
 	str	w2, [x0, 2056]
@@ -400,28 +375,28 @@ FlashReadStatus:
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	FlashReadStatus, .-FlashReadStatus
-	.section	.text.JSHash,"ax",@progbits
+	.section	.text.js_hash,"ax",@progbits
 	.align	2
-	.global	JSHash
-	.type	JSHash, %function
-JSHash:
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
 	mov	x4, x0
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L62:
+.L57:
 	cmp	w1, w3
-	bhi	.L63
+	bhi	.L58
 	ret
-.L63:
+.L58:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L62
-	.size	JSHash, .-JSHash
+	b	.L57
+	.size	js_hash, .-js_hash
 	.section	.text.FlashLoadIdbInfo,"ax",@progbits
 	.align	2
 	.global	FlashLoadIdbInfo
@@ -451,27 +426,27 @@ ToshibaSetRRPara:
 	mov	x21, x0
 	mov	w0, 5
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR9
+	adrp	x20, .LANCHOR8
 	umull	x2, w2, w0
 	stp	x23, x24, [sp, 48]
-	adrp	x0, .LANCHOR10
-	add	x20, x20, :lo12:.LANCHOR9
-	add	x24, x0, :lo12:.LANCHOR10
+	adrp	x0, .LANCHOR9
+	add	x20, x20, :lo12:.LANCHOR8
+	add	x24, x0, :lo12:.LANCHOR9
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR13
-	adrp	x25, .LANCHOR11
-	adrp	x26, .LANCHOR12
-	add	x23, x23, :lo12:.LANCHOR13
-	add	x25, x25, :lo12:.LANCHOR11
-	add	x26, x26, :lo12:.LANCHOR12
+	adrp	x23, .LANCHOR12
+	adrp	x25, .LANCHOR10
+	adrp	x26, .LANCHOR11
+	add	x23, x23, :lo12:.LANCHOR12
+	add	x25, x25, :lo12:.LANCHOR10
+	add	x26, x26, :lo12:.LANCHOR11
 	add	x20, x20, x2
 	add	x24, x24, x2
 	mov	x22, x0
 	mov	x19, 0
-.L67:
+.L62:
 	ldrb	w0, [x23]
 	cmp	w0, w19
-	bhi	.L71
+	bhi	.L66
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -479,30 +454,30 @@ ToshibaSetRRPara:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L71:
+.L66:
 	mov	w0, 85
 	str	w0, [x21, 8]
-	add	x0, x22, :lo12:.LANCHOR10
+	add	x0, x22, :lo12:.LANCHOR9
 	ldrsb	w0, [x19, x0]
 	str	w0, [x21, 4]
 	mov	x0, 200
 	bl	udelay
 	ldrb	w0, [x25]
 	cmp	w0, 34
-	bne	.L68
+	bne	.L63
 	ldrsb	w0, [x24, x19]
-.L73:
+.L68:
 	add	x19, x19, 1
 	str	w0, [x21]
-	b	.L67
-.L68:
+	b	.L62
+.L63:
 	cmp	w0, 35
-	bne	.L70
+	bne	.L65
 	ldrsb	w0, [x20, x19]
-	b	.L73
-.L70:
+	b	.L68
+.L65:
 	ldrsb	w0, [x26, w27, sxtw]
-	b	.L73
+	b	.L68
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",@progbits
 	.align	2
@@ -515,26 +490,26 @@ SamsungSetRRPara:
 	ubfiz	x21, x1, 2, 8
 	mov	x22, x0
 	add	x21, x21, 4
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
 	stp	x19, x20, [sp, 16]
 	add	x21, x0, x21
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
-	adrp	x23, .LANCHOR13
-	add	x23, x23, :lo12:.LANCHOR13
+	adrp	x23, .LANCHOR12
+	add	x23, x23, :lo12:.LANCHOR12
 	mov	x20, 0
 	mov	w24, 161
-.L75:
+.L70:
 	ldrb	w0, [x23]
 	cmp	w0, w20
-	bhi	.L76
+	bhi	.L71
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L76:
+.L71:
 	str	w24, [x22, 8]
 	str	wzr, [x22]
 	ldrsb	w0, [x20, x19]
@@ -544,15 +519,15 @@ SamsungSetRRPara:
 	str	w0, [x22]
 	mov	x0, 300
 	bl	udelay
-	b	.L75
+	b	.L70
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.section	.text.LogAddr2PhyAddr,"ax",@progbits
 	.align	2
 	.global	LogAddr2PhyAddr
 	.type	LogAddr2PhyAddr, %function
 LogAddr2PhyAddr:
-	adrp	x6, .LANCHOR15
-	add	x6, x6, :lo12:.LANCHOR15
+	adrp	x6, .LANCHOR14
+	add	x6, x6, :lo12:.LANCHOR14
 	and	w4, w4, 255
 	ldrh	w8, [x6, 12]
 	ldrh	w5, [x6, 14]
@@ -573,14 +548,14 @@ LogAddr2PhyAddr:
 	and	w10, w5, 65535
 	msub	w5, w5, w8, w11
 	and	w5, w5, 65535
-	bne	.L80
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbnz	w1, .L80
+	bne	.L75
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbnz	w1, .L75
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	ldrh	w6, [x1, w6, sxtw 1]
-.L80:
+.L75:
 	uxtw	x8, w10
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
@@ -590,14 +565,14 @@ LogAddr2PhyAddr:
 	add	w5, w5, w6
 	str	w5, [x2]
 	str	w10, [x3]
-	bls	.L82
+	bls	.L77
 	ldr	w1, [x0, 4]
 	ldr	w0, [x0, 60]
 	add	w1, w1, 1024
 	cmp	w1, w0
 	cset	w0, eq
 	ret
-.L82:
+.L77:
 	mov	w0, 0
 	ret
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
@@ -619,26 +594,26 @@ FlashReadStatusEN:
 	ldrb	w19, [x4, 8]
 	ldrb	w0, [x0, 8]
 	cmp	w0, 2
-	bne	.L84
+	bne	.L79
 	and	w2, w2, 255
 	adrp	x0, .LANCHOR7
-	cbnz	w2, .L85
+	cbnz	w2, .L80
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 13]
-.L95:
+.L90:
 	add	x2, x19, 8
 	add	x0, x0, :lo12:.LANCHOR7
 	add	x2, x20, x2, lsl 8
 	str	w3, [x2, 8]
 	ldrb	w4, [x0, 15]
-	cbz	w4, .L89
+	cbz	w4, .L84
 	add	x3, x19, 8
 	mov	w2, 0
 	add	x3, x20, x3, lsl 8
-.L88:
+.L83:
 	cmp	w2, w4
-	bcc	.L90
-.L89:
+	bcc	.L85
+.L84:
 	add	x19, x19, 8
 	mov	x0, 80
 	lsl	x19, x19, 8
@@ -648,23 +623,23 @@ FlashReadStatusEN:
 	and	w0, w0, 255
 	ldp	x29, x30, [sp], 32
 	ret
-.L85:
+.L80:
 	add	x2, x0, :lo12:.LANCHOR7
 	ldrb	w3, [x2, 14]
-	b	.L95
-.L90:
+	b	.L90
+.L85:
 	lsl	w0, w2, 3
 	add	w2, w2, 1
 	lsr	w0, w1, w0
 	and	w0, w0, 255
 	str	w0, [x3, 4]
-	b	.L88
-.L84:
+	b	.L83
+.L79:
 	add	x0, x19, 8
 	mov	w1, 112
 	add	x0, x20, x0, lsl 8
 	str	w1, [x0, 8]
-	b	.L89
+	b	.L84
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",@progbits
 	.align	2
@@ -678,15 +653,15 @@ FlashWaitReadyEN:
 	str	x21, [sp, 32]
 	mov	w20, w1
 	and	w21, w2, 255
-.L100:
+.L95:
 	mov	w1, w20
 	mov	w2, w21
 	mov	w0, w19
 	bl	FlashReadStatusEN
 	mov	w1, w0
 	cmp	w0, 255
-	beq	.L100
-	tbz	x1, 6, .L100
+	beq	.L95
+	tbz	x1, 6, .L95
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -766,7 +741,7 @@ NandcSetMode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x2]
-	beq	.L112
+	beq	.L107
 	orr	w1, w1, 24576
 	tst	x0, 4
 	and	w1, w1, -32769
@@ -782,13 +757,13 @@ NandcSetMode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-.L114:
+.L109:
 	mov	w0, 0
 	str	w1, [x2]
 	ret
-.L112:
+.L107:
 	and	w1, w1, -8193
-	b	.L114
+	b	.L109
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",@progbits
 	.align	2
@@ -835,22 +810,22 @@ HynixSetRRPara:
 	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	mov	x21, x2
+	mov	x20, x2
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	and	w26, w1, 255
 	stp	x23, x24, [sp, 48]
-	and	w20, w3, 255
+	and	w21, w3, 255
 	adrp	x19, .LANCHOR20
 	ldrb	w0, [x0, 19]
 	cmp	w0, 6
-	bne	.L120
+	bne	.L115
 	add	x0, x19, :lo12:.LANCHOR20
 	ubfiz	x19, x22, 6, 8
 	add	x19, x19, 20
-	add	x19, x19, x20, uxtw 2
-.L126:
+	add	x19, x19, x21, uxtw 2
+.L122:
 	add	x19, x0, x19
-.L121:
+.L116:
 	sxtw	x25, w22
 	adrp	x0, .LANCHOR6
 	lsl	x1, x25, 4
@@ -866,48 +841,57 @@ HynixSetRRPara:
 	add	x23, x23, x5
 	mov	w0, 54
 	str	w0, [x23, 2056]
-.L123:
+.L119:
 	cmp	x24, x26
-	bne	.L124
+	bne	.L120
 	mov	w0, 22
 	str	w0, [x23, 2056]
 	mov	w0, w22
 	bl	NandcFlashDeCs
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
-	strb	w20, [x0, x25]
+	strb	w21, [x0, x25]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L120:
+.L115:
 	cmp	w0, 7
+	bne	.L117
 	add	x0, x19, :lo12:.LANCHOR20
-	bne	.L122
-	mov	w19, 160
 	mov	x1, 28
+	mov	w19, 160
 	umaddl	x1, w19, w22, x1
 	mov	w19, 10
-	umaddl	x19, w20, w19, x1
-	b	.L126
-.L122:
-	and	x19, x20, 255
+	umaddl	x19, w21, w19, x1
+	b	.L122
+.L117:
+	cmp	w0, 8
+	bne	.L118
+	add	x19, x19, :lo12:.LANCHOR20
+	add	x0, x19, 28
+	add	w19, w21, w21, lsl 2
+	add	x19, x0, x19, sxtw
+	b	.L116
+.L118:
+	add	x0, x19, :lo12:.LANCHOR20
+	and	x19, x21, 255
 	add	x19, x19, 2
 	add	x19, x19, x22, uxtw 3
 	add	x19, x0, x19, lsl 3
 	add	x19, x19, 4
-	b	.L121
-.L124:
-	ldrb	w0, [x21, x24]
+	b	.L116
+.L120:
+	ldrb	w0, [x20, x24]
 	str	w0, [x23, 2052]
 	mov	x0, 200
 	bl	udelay
 	ldrsb	w0, [x19, x24]
 	add	x24, x24, 1
 	str	w0, [x23, 2048]
-	b	.L123
+	b	.L119
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -919,8 +903,8 @@ FlashSetReadRetryDefault:
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L134
+	cmp	w0, 7
+	bhi	.L130
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -931,25 +915,25 @@ FlashSetReadRetryDefault:
 	add	x22, x20, 4
 	add	x21, x21, :lo12:.LANCHOR22
 	mov	x19, 0
-.L130:
+.L126:
 	lsl	x1, x19, 3
 	and	w0, w19, 255
 	ldrb	w1, [x1, x21]
 	cmp	w1, 173
-	bne	.L129
+	bne	.L125
 	ldrb	w1, [x20, 1]
 	mov	w3, 0
 	mov	x2, x22
 	bl	HynixSetRRPara
-.L129:
+.L125:
 	add	x19, x19, 1
 	cmp	x19, 4
-	bne	.L130
+	bne	.L126
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L134:
+.L130:
 	ret
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",@progbits
@@ -967,7 +951,7 @@ FlashWaitCmdDone:
 	stp	x19, x20, [sp, 16]
 	add	x19, x1, x0
 	ldr	x2, [x19, 8]
-	cbz	x2, .L139
+	cbz	x2, .L135
 	ldrb	w20, [x1, x0]
 	mov	w0, w20
 	bl	NandcFlashCs
@@ -987,10 +971,10 @@ FlashWaitCmdDone:
 	str	w0, [x1]
 	ldr	x1, [x19, 16]
 	str	xzr, [x19, 8]
-	cbz	x1, .L139
+	cbz	x1, .L135
 	str	w0, [x1]
 	str	xzr, [x19, 16]
-.L139:
+.L135:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -1009,6 +993,38 @@ NandcDelayns:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReadyNoDelay,"ax",@progbits
+	.align	2
+	.global	NandcWaitFlashReadyNoDelay
+	.type	NandcWaitFlashReadyNoDelay, %function
+NandcWaitFlashReadyNoDelay:
+	stp	x29, x30, [sp, -48]!
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	ldr	x20, [x1, x0]
+	movk	w19, 0x1, lsl 16
+.L145:
+	ldr	w0, [x20]
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L146
+	mov	x0, 10
+	bl	udelay
+	subs	w19, w19, #1
+	bne	.L145
+	mov	w0, -1
+.L143:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L146:
+	mov	w0, 0
+	b	.L143
+	.size	NandcWaitFlashReadyNoDelay, .-NandcWaitFlashReadyNoDelay
 	.section	.text.NandcWaitFlashReady,"ax",@progbits
 	.align	2
 	.global	NandcWaitFlashReady
@@ -1021,25 +1037,27 @@ NandcWaitFlashReady:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 34464
-	ldr	x20, [x1, x0]
 	movk	w19, 0x1, lsl 16
-.L149:
-	mov	x0, 100
+	ldr	x20, [x1, x0]
+	mov	x0, 150
 	bl	udelay
+.L151:
 	ldr	w0, [x20]
 	str	w0, [x29, 40]
 	ldr	w0, [x29, 40]
-	tbnz	x0, 9, .L150
+	tbnz	x0, 9, .L152
+	mov	x0, 10
+	bl	udelay
 	subs	w19, w19, #1
-	bne	.L149
+	bne	.L151
 	mov	w0, -1
-.L147:
+.L149:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L150:
+.L152:
 	mov	w0, 0
-	b	.L147
+	b	.L149
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",@progbits
 	.align	2
@@ -1069,6 +1087,101 @@ FlashReset:
 	ldp	x29, x30, [sp], 32
 	b	NandcFlashDeCs
 	.size	FlashReset, .-FlashReset
+	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_enter_slc_mode
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L157
+	mov	w0, w20
+	bl	NandcFlashCs
+	sbfiz	x1, x20, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x0, [x0, x1]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 145
+	str	w0, [x19, 2052]
+	mov	x0, 100
+	bl	udelay
+	str	wzr, [x19, 2048]
+	mov	w0, 1
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	mov	x0, 100
+	str	wzr, [x19, 2048]
+	bl	udelay
+	mov	w0, w20
+	bl	NandcWaitFlashReadyNoDelay
+	mov	w0, 218
+	str	w0, [x19, 2056]
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	NandcWaitFlashReady
+.L157:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_exit_slc_mode
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L160
+	mov	w0, w20
+	bl	NandcFlashCs
+	sbfiz	x1, x20, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x0, [x0, x1]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 145
+	str	w0, [x19, 2052]
+	mov	x0, 100
+	bl	udelay
+	mov	w0, 2
+	str	w0, [x19, 2048]
+	mov	w0, 1
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	mov	x0, 100
+	str	wzr, [x19, 2048]
+	bl	udelay
+	mov	w0, w20
+	bl	NandcWaitFlashReadyNoDelay
+	mov	w0, 223
+	str	w0, [x19, 2056]
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	NandcWaitFlashReady
+.L160:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashEraseBlock,"ax",@progbits
 	.align	2
 	.global	FlashEraseBlock
@@ -1128,71 +1241,71 @@ FlashSetInterfaceMode:
 	mov	w15, 32
 	mov	w16, 5
 	mov	w17, 44
-.L167:
+.L175:
 	ldrb	w3, [x5, x7]
 	ldrb	w4, [x2]
 	cmp	w3, 152
 	ccmp	w3, w13, 4, ne
-	beq	.L158
+	beq	.L166
 	cmp	w3, 173
 	ccmp	w3, w17, 4, ne
-	bne	.L159
-.L158:
+	bne	.L167
+.L166:
 	cmp	w0, 1
 	ldr	x1, [x2, -8]
-	bne	.L160
-	cbz	w6, .L159
+	bne	.L168
+	cbz	w6, .L167
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L161
+	bne	.L169
 	str	w0, [x1, 2052]
-.L179:
+.L187:
 	str	wzr, [x1, 2048]
-	b	.L165
-.L161:
+	b	.L173
+.L169:
 	cmp	w3, 44
-	bne	.L163
+	bne	.L171
 	str	w0, [x1, 2052]
 	str	w16, [x1, 2048]
-.L165:
+.L173:
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
-.L159:
+.L167:
 	add	x5, x5, 8
 	add	x2, x2, 16
 	cmp	x5, 32
-	bne	.L167
+	bne	.L175
 	mov	w0, 0
 	bl	NandcWaitFlashReady
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L163:
+.L171:
 	str	w10, [x1, 2052]
 	str	w0, [x1, 2048]
-	b	.L165
-.L160:
-	cbz	w12, .L159
+	b	.L173
+.L168:
+	cbz	w12, .L167
 	ubfiz	x4, x4, 8, 8
 	cmp	w3, 173
 	add	x1, x1, x4
 	str	w8, [x1, 2056]
-	bne	.L164
+	bne	.L172
 	str	w11, [x1, 2052]
 	str	w15, [x1, 2048]
-	b	.L165
-.L164:
+	b	.L173
+.L172:
 	cmp	w3, 44
-	bne	.L166
+	bne	.L174
 	str	w11, [x1, 2052]
 	str	w14, [x1, 2048]
-	b	.L165
-.L166:
+	b	.L173
+.L174:
 	str	w10, [x1, 2052]
-	b	.L179
+	b	.L187
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",@progbits
 	.align	2
@@ -1210,38 +1323,38 @@ SandiskSetRRPara:
 	str	w0, [x20, 4]
 	mov	x0, 200
 	bl	udelay
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR12
 	add	w1, w19, 1
-	adrp	x2, .LANCHOR9
-	add	x2, x2, :lo12:.LANCHOR9
-	ldrb	w3, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR11
-	ldrb	w4, [x0, #:lo12:.LANCHOR11]
+	adrp	x2, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR8
+	ldrb	w3, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LANCHOR10
+	ldrb	w4, [x0, #:lo12:.LANCHOR10]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
+	adrp	x0, .LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR9
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L181:
+.L189:
 	cmp	w3, w0
-	bhi	.L184
+	bhi	.L192
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
 	b	NandcWaitFlashReady
-.L184:
+.L192:
 	cmp	w4, 67
-	bne	.L182
+	bne	.L190
 	ldrsb	w5, [x1, x0]
-.L186:
+.L194:
 	add	x0, x0, 1
 	str	w5, [x20]
-	b	.L181
-.L182:
+	b	.L189
+.L190:
 	ldrsb	w5, [x2, x0]
-	b	.L186
+	b	.L194
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.micron_auto_read_calibration_config,"ax",@progbits
 	.align	2
@@ -1293,16 +1406,16 @@ FlashEraseSLc2KBlocks:
 	mov	x20, x0
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x24, .LANCHOR26
-.L190:
+.L198:
 	cmp	x20, x22
-	bne	.L195
+	bne	.L203
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L195:
+.L203:
 	mov	w1, 0
 	mov	w4, w21
 	add	x3, x29, 76
@@ -1312,15 +1425,15 @@ FlashEraseSLc2KBlocks:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 76]
 	cmp	w1, w0
-	bhi	.L191
+	bhi	.L199
 	mov	w0, -1
 	str	w0, [x20]
-.L192:
+.L200:
 	sub	w21, w21, #1
 	add	x20, x20, 56
 	and	w21, w21, 255
-	b	.L190
-.L191:
+	b	.L198
+.L199:
 	uxtw	x0, w0
 	add	x1, x24, :lo12:.LANCHOR26
 	ldrb	w19, [x1, x0]
@@ -1356,21 +1469,21 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29, 72]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L193
+	tbz	x0, 0, .L201
 	mov	w0, -1
 	str	w0, [x20]
-.L193:
+.L201:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L194
+	bne	.L202
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L194:
+.L202:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L192
+	b	.L200
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -1387,42 +1500,42 @@ FlashEraseBlocks:
 	mov	w22, w2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	stp	x25, x26, [sp, 64]
-	cbnz	w1, .L201
+	cbnz	w1, .L209
 	adrp	x25, .LANCHOR23
 	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
 	mov	w20, 0
-.L202:
+.L210:
 	cmp	w20, w22
 	adrp	x13, .LANCHOR25
-	bcc	.L211
-	adrp	x21, .LANCHOR8
+	bcc	.L219
+	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x13, :lo12:.LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L212:
+.L220:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L214
+	bhi	.L222
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L215
-.L216:
+	cbnz	w0, .L223
+.L224:
 	mov	w0, 0
-	b	.L200
-.L201:
+	b	.L208
+.L209:
 	mov	w1, w2
 	bl	FlashEraseSLc2KBlocks
-.L200:
+.L208:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L211:
+.L219:
 	mov	w12, 56
 	mov	w1, 0
 	sub	w4, w22, w20
@@ -1436,13 +1549,13 @@ FlashEraseBlocks:
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
-	bhi	.L204
+	bhi	.L212
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L205:
+.L213:
 	add	w20, w20, 1
-	b	.L202
-.L204:
+	b	.L210
+.L212:
 	adrp	x1, .LANCHOR27
 	add	x2, x25, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -1452,20 +1565,20 @@ FlashEraseBlocks:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L207
+	cbz	x1, .L215
 	bl	FlashWaitCmdDone
-.L207:
+.L215:
 	ldp	w2, w1, [x29, 88]
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
 	stp	x21, xzr, [x0, 8]
-	cbz	w23, .L208
+	cbz	w23, .L216
 	add	w2, w20, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L208:
+.L216:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, x1]
@@ -1475,13 +1588,13 @@ FlashEraseBlocks:
 	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
-	bne	.L209
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L209
+	bne	.L217
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L217
 	mov	w0, w21
 	bl	flash_enter_slc_mode
-.L210:
+.L218:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
@@ -1498,37 +1611,37 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	w0, w21
 	bl	NandcFlashDeCs
-	b	.L205
-.L209:
+	b	.L213
+.L217:
 	mov	w0, w21
 	bl	flash_exit_slc_mode
-	b	.L210
-.L214:
+	b	.L218
+.L222:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
-	bne	.L213
+	bne	.L221
 	ldrb	w0, [x21]
-	cbz	w0, .L213
+	cbz	w0, .L221
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L213:
+.L221:
 	add	x20, x20, 1
-	b	.L212
-.L215:
+	b	.L220
+.L223:
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 69
-	bne	.L216
+	bne	.L224
 	mov	w0, 56
 	umaddl	x22, w22, w0, x19
-.L217:
+.L225:
 	cmp	x22, x19
-	beq	.L216
+	beq	.L224
 	str	wzr, [x19], 56
-	b	.L217
+	b	.L225
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1562,7 +1675,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L233
+	bne	.L241
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1574,7 +1687,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L236:
+.L244:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1587,12 +1700,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L233:
+.L241:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L236
+	b	.L244
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1606,26 +1719,23 @@ FlashDeInit:
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
 	adrp	x0, .LANCHOR29
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
-	mov	w0, 12336
-	movk	w0, 0x5638, lsl 16
-	cmp	w1, w0
-	bne	.L238
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L246
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L238:
+.L247:
 	adrp	x19, .LANCHOR30
 	ldrb	w0, [x19, #:lo12:.LANCHOR30]
-	cbz	w0, .L239
+	cbz	w0, .L248
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L239
+	tbz	x0, 0, .L248
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x19, #:lo12:.LANCHOR30]
-.L239:
+.L248:
 	adrp	x0, .LANCHOR6
 	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	str	wzr, [x0, 336]
@@ -1633,6 +1743,10 @@ FlashDeInit:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
+.L246:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	b	.L247
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",@progbits
 	.align	2
@@ -1653,21 +1767,21 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L249
+	bhi	.L258
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L252:
+.L261:
 	str	w1, [x0, 4]
 	ret
-.L249:
+.L258:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L251
+	bls	.L260
 	mov	w1, 8322
-	b	.L252
-.L251:
+	b	.L261
+.L260:
 	mov	w1, 4225
-	b	.L252
+	b	.L261
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
@@ -1692,24 +1806,24 @@ NandcBchSel:
 	adrp	x1, .LANCHOR32
 	str	w0, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 4096
-	bne	.L255
-.L258:
+	bne	.L264
+.L267:
 	and	w1, w1, -17
-.L256:
+.L265:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L255:
+.L264:
 	cmp	w0, 24
-	bne	.L257
+	bne	.L266
 	orr	w1, w1, 16
-	b	.L256
-.L257:
+	b	.L265
+.L266:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L256
-	b	.L258
+	bne	.L265
+	b	.L267
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
@@ -1791,11 +1905,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L272:
+.L281:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L272
+	tbz	x1, 20, .L281
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1833,7 +1947,7 @@ NandcXferStart:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L277
+	bls	.L286
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1841,11 +1955,11 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L278
+	beq	.L287
 	and	w2, w2, 255
 	adrp	x20, .LANCHOR35
-	cbnz	w24, .L279
-.L287:
+	cbnz	w24, .L288
+.L296:
 	ldr	x0, [x20, #:lo12:.LANCHOR35]
 	add	w2, w2, 1
 	cmp	x4, 0
@@ -1887,12 +2001,12 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L288
+	bne	.L297
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L288:
+.L297:
 	ldr	w0, [x29, 88]
 	cmp	w24, 0
 	cset	w1, eq
@@ -1904,10 +2018,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L278:
+.L287:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L277:
+.L286:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -1918,7 +2032,7 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L279:
+.L288:
 	adrp	x0, .LANCHOR32
 	mov	w6, 64
 	lsr	w11, w2, 1
@@ -1932,24 +2046,24 @@ NandcXferStart:
 	csel	w6, w6, w0, cc
 	add	x0, x20, :lo12:.LANCHOR35
 	ldr	x10, [x0, 8]
-.L283:
+.L292:
 	cmp	w3, w11
-	bcs	.L287
+	bcs	.L296
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L284
+	cbz	x5, .L293
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L285:
+.L294:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L283
-.L284:
+	b	.L292
+.L293:
 	str	w12, [x10, x0]
-	b	.L285
+	b	.L294
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -1965,57 +2079,57 @@ NandcXferComp:
 	adrp	x0, .LANCHOR34
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, 3
-	bls	.L316
+	bls	.L325
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L316
+	tbz	x0, 2, .L325
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L304
+	tbz	x0, 1, .L313
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
-.L299:
+.L308:
 	ldr	w1, [x3, 28]
 	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L300
+	bge	.L309
 	cmp	w2, 5
-	bls	.L299
+	bls	.L308
 	ldr	w0, [x3]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbz	x0, 13, .L299
+	tbz	x0, 13, .L308
 	ldr	w0, [x29, 24]
-	tbz	x0, 17, .L299
-.L300:
+	tbz	x0, 17, .L308
+.L309:
 	adrp	x0, .LANCHOR35+40
 	str	wzr, [x0, #:lo12:.LANCHOR35+40]
-.L295:
+.L304:
 	ldp	x29, x30, [sp], 32
 	ret
-.L304:
+.L313:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L304
+	tbz	x0, 20, .L313
 	adrp	x0, .LANCHOR36
 	mov	x4, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR36]
-	cbz	w1, .L305
+	cbz	w1, .L314
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L305:
+.L314:
 	ldr	w0, [x4, #:lo12:.LANCHOR36]
-	cbz	w0, .L300
+	cbz	w0, .L309
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
-	b	.L300
-.L316:
+	b	.L309
+.L325:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L316
-	b	.L295
+	tbz	x0, 20, .L325
+	b	.L304
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -2024,16 +2138,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L325:
+.L334:
 	cmp	w2, w0
-	bls	.L326
+	bls	.L335
 	sub	w0, w1, #1
 	ret
-.L326:
+.L335:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L325
+	b	.L334
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2096,28 +2210,28 @@ FtlConstantsInit:
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
 	str	x19, [sp, 16]
-.L330:
+.L339:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L330
+	bne	.L339
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L331
+	bcs	.L340
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
 	add	x1, x1, :lo12:.LANCHOR47
 	mov	w7, 0
-.L332:
+.L341:
 	cmp	w7, w0
-	bcs	.L334
+	bcs	.L343
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L335
-.L333:
+	b	.L344
+.L342:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2126,223 +2240,219 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L335:
+.L344:
 	cmp	w12, w2
-	bcc	.L333
+	bcc	.L342
 	add	w7, w7, 1
-	b	.L332
-.L334:
+	b	.L341
+.L343:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
 	strh	w2, [x4, #:lo12:.LANCHOR45]
 	strh	w8, [x6, #:lo12:.LANCHOR41]
-.L331:
+.L340:
 	adrp	x1, .LANCHOR48
 	adrp	x13, .LANCHOR49
 	mov	w2, 5
 	cmp	w11, 1
 	strh	w2, [x1, #:lo12:.LANCHOR48]
 	strh	wzr, [x13, #:lo12:.LANCHOR49]
-	bne	.L336
+	bne	.L345
 	strh	w11, [x1, #:lo12:.LANCHOR48]
-.L336:
+.L345:
 	adrp	x8, .LANCHOR50
 	mov	w1, 4352
 	strh	w1, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR1
 	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L337
+	cbz	w11, .L346
 	mov	w1, 384
 	strh	w1, [x8, #:lo12:.LANCHOR50]
-.L337:
+.L346:
 	ldrh	w4, [x4, #:lo12:.LANCHOR45]
 	adrp	x1, .LANCHOR38
 	ldrh	w3, [x6, #:lo12:.LANCHOR41]
+	adrp	x7, .LANCHOR52
+	ldrh	w19, [x5, 16]
+	adrp	x15, .LANCHOR55
+	ldrh	w10, [x5, 20]
 	mul	w4, w0, w4
+	ldrh	w14, [x5, 18]
 	mul	w0, w0, w3
+	strh	w19, [x7, #:lo12:.LANCHOR52]
 	and	w4, w4, 65535
 	strh	w4, [x1, #:lo12:.LANCHOR38]
 	adrp	x1, .LANCHOR51
-	and	w0, w0, 65535
+	strh	w10, [x15, #:lo12:.LANCHOR55]
 	strh	w0, [x1, #:lo12:.LANCHOR51]
-	bl	Ftl_log2
-	ldrh	w19, [x5, 16]
-	adrp	x1, .LANCHOR52
-	ldrh	w10, [x5, 20]
-	adrp	x7, .LANCHOR53
-	strh	w0, [x1, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR54
-	ldrh	w14, [x5, 18]
-	adrp	x15, .LANCHOR56
 	mul	w1, w4, w19
-	strh	w14, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR55
-	strh	w19, [x7, #:lo12:.LANCHOR53]
-	strh	w10, [x15, #:lo12:.LANCHOR56]
-	strh	w1, [x0, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR53
+	strh	w14, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR54
+	strh	w1, [x0, #:lo12:.LANCHOR54]
 	mov	w0, w10
 	bl	Ftl_log2
 	and	w12, w0, 65535
-	adrp	x6, .LANCHOR57
+	adrp	x6, .LANCHOR56
 	ubfiz	w2, w10, 9, 7
 	ldrh	w1, [x5, 26]
 	cmp	w3, 1024
-	strh	w0, [x6, #:lo12:.LANCHOR57]
+	strh	w0, [x6, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR57
+	strh	w2, [x0, #:lo12:.LANCHOR57]
 	adrp	x0, .LANCHOR58
+	ubfx	w2, w2, 8, 8
 	strh	w2, [x0, #:lo12:.LANCHOR58]
 	adrp	x0, .LANCHOR59
-	ubfx	w2, w2, 8, 8
-	strh	w2, [x0, #:lo12:.LANCHOR59]
-	adrp	x0, .LANCHOR60
-	strh	w1, [x0, #:lo12:.LANCHOR60]
+	strh	w1, [x0, #:lo12:.LANCHOR59]
 	adrp	x0, .LANCHOR43
 	mul	w1, w4, w3
 	str	w1, [x0, #:lo12:.LANCHOR43]
-	bls	.L338
+	bls	.L347
 	and	w0, w3, 255
 	strh	w0, [x13, #:lo12:.LANCHOR49]
-.L338:
+.L347:
 	ldrh	w0, [x13, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR60
 	sub	w0, w3, w0
 	mul	w0, w0, w4
 	mul	w0, w0, w10
 	mul	w0, w0, w19
 	asr	w0, w0, 11
-	str	w0, [x1, #:lo12:.LANCHOR61]
+	str	w0, [x1, #:lo12:.LANCHOR60]
 	ldrh	w0, [x8, #:lo12:.LANCHOR50]
 	mul	w1, w14, w10
-	adrp	x10, .LANCHOR62
+	adrp	x10, .LANCHOR61
 	lsl	w0, w0, 3
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L339
-.L355:
-	strh	w0, [x10, #:lo12:.LANCHOR62]
-	cbz	w11, .L341
+	bls	.L348
+.L364:
+	strh	w0, [x10, #:lo12:.LANCHOR61]
+	cbz	w11, .L350
 	mov	w0, 640
 	strh	w0, [x8, #:lo12:.LANCHOR50]
-.L341:
+.L350:
 	ldrh	w0, [x8, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR62
 	lsl	w3, w3, 6
 	cmp	w4, 1
 	adrp	x8, .LANCHOR37
 	asr	w0, w0, w12
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR63]
+	strh	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w12, 9
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR64
 	asr	w3, w3, w0
-	adrp	x0, .LANCHOR64
-	strh	w3, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR63
+	strh	w3, [x0, #:lo12:.LANCHOR63]
 	and	w3, w3, 65535
 	mul	w0, w4, w3
 	add	w3, w3, 8
-	str	w0, [x1, #:lo12:.LANCHOR65]
-	ldrh	w0, [x10, #:lo12:.LANCHOR62]
+	str	w0, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x10, #:lo12:.LANCHOR61]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L342
-.L356:
+	beq	.L351
+.L365:
 	str	w3, [x8, #:lo12:.LANCHOR37]
 	ldrh	w0, [x8, #:lo12:.LANCHOR37]
 	bl	FtlSysBlkNumInit
 	ldr	w1, [x8, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR66
+	adrp	x0, .LANCHOR65
 	mov	w2, 24
-	str	w1, [x0, #:lo12:.LANCHOR66]
+	str	w1, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR42
-	ldrh	w1, [x7, #:lo12:.LANCHOR53]
+	ldrh	w1, [x7, #:lo12:.LANCHOR52]
 	ldr	w0, [x0, #:lo12:.LANCHOR42]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x6, #:lo12:.LANCHOR57]
-	adrp	x6, .LANCHOR8
+	ldrh	w1, [x6, #:lo12:.LANCHOR56]
+	adrp	x6, .LANCHOR15
 	add	w1, w1, 9
-	ldrb	w6, [x6, #:lo12:.LANCHOR8]
+	ldrb	w6, [x6, #:lo12:.LANCHOR15]
 	lsr	w0, w0, w1
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR67]
+	strh	w0, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR67
+	strh	w2, [x1, #:lo12:.LANCHOR67]
 	adrp	x1, .LANCHOR68
-	strh	w2, [x1, #:lo12:.LANCHOR68]
-	adrp	x1, .LANCHOR69
-	ldrh	w2, [x10, #:lo12:.LANCHOR62]
-	str	wzr, [x1, #:lo12:.LANCHOR69]
+	ldrh	w2, [x10, #:lo12:.LANCHOR61]
+	str	wzr, [x1, #:lo12:.LANCHOR68]
 	add	w1, w2, 3
-	strh	w1, [x10, #:lo12:.LANCHOR62]
-	ldr	w1, [x4, #:lo12:.LANCHOR65]
+	strh	w1, [x10, #:lo12:.LANCHOR61]
+	ldr	w1, [x4, #:lo12:.LANCHOR64]
 	add	w3, w1, 3
-	str	w3, [x4, #:lo12:.LANCHOR65]
-	cbz	w6, .L344
+	str	w3, [x4, #:lo12:.LANCHOR64]
+	cbz	w6, .L353
 	add	w1, w1, 5
 	add	w2, w2, 4
-	strh	w2, [x10, #:lo12:.LANCHOR62]
-.L357:
-	str	w1, [x4, #:lo12:.LANCHOR65]
-.L345:
+	strh	w2, [x10, #:lo12:.LANCHOR61]
+.L366:
+	str	w1, [x4, #:lo12:.LANCHOR64]
+.L354:
 	adrp	x1, .LANCHOR40
-	adrp	x3, .LANCHOR70
+	adrp	x3, .LANCHOR69
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
-	strh	wzr, [x3, #:lo12:.LANCHOR70]
+	strh	wzr, [x3, #:lo12:.LANCHOR69]
 	lsl	w2, w1, 1
 	lsr	w1, w1, 3
 	add	w2, w2, 48
 	add	w1, w1, 4
 	add	w0, w2, w0, lsl 2
 	add	w0, w0, w1
-	ldrh	w1, [x15, #:lo12:.LANCHOR56]
+	ldrh	w1, [x15, #:lo12:.LANCHOR55]
 	cmp	w0, w1, lsl 9
-	bcs	.L346
+	bcs	.L355
 	mov	w0, 1
-	strh	w0, [x3, #:lo12:.LANCHOR70]
-.L346:
+	strh	w0, [x3, #:lo12:.LANCHOR69]
+.L355:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L339:
+.L348:
 	mov	w0, 4
-	b	.L355
-.L342:
+	b	.L364
+.L351:
 	add	w3, w3, 4
-	b	.L356
-.L344:
+	b	.L365
+.L353:
 	cmp	w3, 7
-	bhi	.L345
+	bhi	.L354
 	mov	w1, 8
-	b	.L357
+	b	.L366
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	adrp	x1, .LANCHOR71
+	adrp	x1, .LANCHOR70
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
-	cbz	w1, .L362
-	adrp	x1, .LANCHOR62
-	ldrh	w2, [x1, #:lo12:.LANCHOR62]
-	adrp	x1, .LANCHOR72
-	ldr	x3, [x1, #:lo12:.LANCHOR72]
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
+	cbz	w1, .L371
+	adrp	x1, .LANCHOR61
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR71
+	ldr	x3, [x1, #:lo12:.LANCHOR71]
 	mov	x1, 0
-.L360:
+.L369:
 	cmp	w2, w1, uxth
-	bhi	.L361
-.L362:
+	bhi	.L370
+.L371:
 	mov	w0, 0
 	ret
-.L361:
+.L370:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L360
+	bne	.L369
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2351,8 +2461,8 @@ IsBlkInVendorPart:
 	.global	FtlGetCap
 	.type	FtlGetCap, %function
 FtlGetCap:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",@progbits
@@ -2360,8 +2470,8 @@ FtlGetCap:
 	.global	FtlGetCapacity
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",@progbits
@@ -2369,8 +2479,8 @@ FtlGetCapacity:
 	.global	ftl_get_density
 	.type	ftl_get_density, %function
 ftl_get_density:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",@progbits
@@ -2378,8 +2488,8 @@ ftl_get_density:
 	.global	FtlGetLpn
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-	adrp	x0, .LANCHOR73
-	ldr	w0, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR72
+	ldr	w0, [x0, #:lo12:.LANCHOR72]
 	ret
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
@@ -2389,8 +2499,8 @@ FtlGetLpn:
 FtlGetCurEraseBlock:
 	adrp	x0, .LANCHOR38
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR74
-	ldr	w0, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -2418,8 +2528,8 @@ FtlBbmMapBadBlock:
 	add	x29, sp, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR75
-	add	x19, x19, :lo12:.LANCHOR75
+	adrp	x19, .LANCHOR74
+	add	x19, x19, :lo12:.LANCHOR74
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -2454,8 +2564,8 @@ FtlBbmIsBadBlock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR75
-	add	x1, x1, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR74
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -2529,12 +2639,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L378
+	bls	.L387
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L378:
+.L387:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2545,8 +2655,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR76+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -2556,8 +2666,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR76+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -2575,40 +2685,40 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L382
-	adrp	x0, .LANCHOR76
-	add	x2, x0, :lo12:.LANCHOR76
+	bcc	.L391
+	adrp	x0, .LANCHOR75
+	add	x2, x0, :lo12:.LANCHOR75
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L382
+	beq	.L391
 	and	w1, w1, 65535
-	cbz	w1, .L384
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L384
+	cbz	w1, .L393
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L393
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR77
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR79]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR80
-	ldr	w0, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR80]
-.L384:
-	add	x0, x19, :lo12:.LANCHOR76
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L393:
+	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2618,7 +2728,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L382:
+.L391:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2629,27 +2739,27 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	adrp	x0, .LANCHOR76
-	add	x1, x0, :lo12:.LANCHOR76
+	adrp	x0, .LANCHOR75
+	add	x1, x0, :lo12:.LANCHOR75
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L392
-	adrp	x2, .LANCHOR81+28
+	cbz	w2, .L401
+	adrp	x2, .LANCHOR80+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
 	mov	w4, 0
-	ldrh	w5, [x2, #:lo12:.LANCHOR81+28]
+	ldrh	w5, [x2, #:lo12:.LANCHOR80+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L394:
+.L403:
 	cmp	w5, w4
-	bgt	.L395
-	cbz	w6, .L392
-	add	x0, x0, :lo12:.LANCHOR76
+	bgt	.L404
+	cbz	w6, .L401
+	add	x0, x0, :lo12:.LANCHOR75
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L392:
+.L401:
 	ret
-.L395:
+.L404:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -2661,7 +2771,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L394
+	b	.L403
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
@@ -2671,16 +2781,16 @@ FtlFreeSysBlkQueueOut:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR76
-	add	x19, x19, :lo12:.LANCHOR76
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR77
+	adrp	x22, .LANCHOR76
 	mov	x23, x19
-	add	x22, x22, :lo12:.LANCHOR77
-.L402:
+	add	x22, x22, :lo12:.LANCHOR76
+.L411:
 	ldrh	w1, [x19, 6]
-	cbz	w1, .L403
+	cbz	w1, .L412
 	ldrh	w0, [x19, 2]
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
@@ -2690,55 +2800,55 @@ FtlFreeSysBlkQueueOut:
 	strh	w0, [x19, 2]
 	ldr	w0, [x22]
 	ldrh	w20, [x2, 8]
-	cbnz	w0, .L404
+	cbnz	w0, .L413
 	mov	w0, w20
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR77
 	and	w21, w0, 65535
 	lsl	w2, w20, 10
 	mov	x24, x1
-	ldr	x0, [x1, #:lo12:.LANCHOR78]
+	ldr	x0, [x1, #:lo12:.LANCHOR77]
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L405
+	adrp	x2, .LANCHOR15
+	ldrb	w2, [x2, #:lo12:.LANCHOR15]
+	cbz	w2, .L414
 	mov	w2, 1
 	mov	w1, 0
 	bl	FlashEraseBlocks
-.L405:
-	ldr	x0, [x24, #:lo12:.LANCHOR78]
+.L414:
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR79]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR80
-	ldr	w0, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR80]
-.L404:
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L413:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L407
+	bcs	.L416
 	ldrh	w2, [x23, 6]
 	mov	w1, w20
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-	b	.L402
-.L403:
+	b	.L411
+.L412:
 	adrp	x0, .LC3
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L406:
-	b	.L406
-.L407:
+.L415:
+	b	.L415
+.L416:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2752,10 +2862,10 @@ FtlFreeSysBlkQueueOut:
 	.type	test_node_in_list, %function
 test_node_in_list:
 	ldr	x2, [x0]
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR81
 	mov	x4, -6148914691236517206
 	and	w1, w1, 65535
-	ldr	x3, [x0, #:lo12:.LANCHOR82]
+	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	movk	x4, 0xaaab, lsl 0
 	mov	w5, 65535
 	sub	x0, x2, x3
@@ -2763,18 +2873,18 @@ test_node_in_list:
 	mul	x0, x0, x4
 	mov	w4, 6
 	and	w0, w0, 65535
-.L414:
+.L423:
 	cmp	w0, w1
-	beq	.L415
+	beq	.L424
 	ldrh	w0, [x2]
 	cmp	w0, w5
-	beq	.L416
+	beq	.L425
 	umaddl	x2, w0, w4, x3
-	b	.L414
-.L415:
+	b	.L423
+.L424:
 	mov	w0, 1
 	ret
-.L416:
+.L425:
 	mov	w0, 0
 	ret
 	.size	test_node_in_list, .-test_node_in_list
@@ -2787,30 +2897,30 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w14, [x1, #:lo12:.LANCHOR40]
 	cmp	w14, w0
-	bls	.L433
-	adrp	x1, .LANCHOR82
+	bls	.L442
+	adrp	x1, .LANCHOR81
 	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR82]
+	ldr	x6, [x1, #:lo12:.LANCHOR81]
 	umull	x13, w0, w3
 	mov	w1, -1
 	add	x5, x6, x13
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR82
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR83]
-	cbnz	x12, .L420
-	str	x5, [x1, #:lo12:.LANCHOR83]
-.L433:
+	ldr	x12, [x1, #:lo12:.LANCHOR82]
+	cbnz	x12, .L429
+	str	x5, [x1, #:lo12:.LANCHOR82]
+.L442:
 	mov	w0, 0
 	ret
-.L420:
+.L429:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ubfiz	x2, x0, 1, 16
 	mov	x4, -6148914691236517206
 	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR84]
+	ldr	x16, [x1, #:lo12:.LANCHOR83]
 	movk	x4, 0xaaab, lsl 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
@@ -2825,19 +2935,19 @@ insert_data_list:
 	csel	w7, w7, w8, ne
 	mov	w8, w3
 	mul	x1, x1, x4
-	adrp	x4, .LANCHOR79
-	ldr	x17, [x4, #:lo12:.LANCHOR79]
+	adrp	x4, .LANCHOR78
+	ldr	x17, [x4, #:lo12:.LANCHOR78]
 	and	w1, w1, 65535
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L428:
+.L437:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L419
+	bcc	.L428
 	cmp	w1, w0
-	beq	.L419
+	beq	.L428
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2845,46 +2955,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L424
+	bne	.L433
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L426
-.L425:
+	bcc	.L435
+.L434:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L429
+	bne	.L438
 	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR83]
-	b	.L419
-.L424:
-	bcc	.L425
-.L426:
+	str	x5, [x15, #:lo12:.LANCHOR82]
+	b	.L428
+.L433:
+	bcc	.L434
+.L435:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L427
+	bne	.L436
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
-	adrp	x0, .LANCHOR85
-	str	x5, [x0, #:lo12:.LANCHOR85]
-.L419:
+	adrp	x0, .LANCHOR84
+	str	x5, [x0, #:lo12:.LANCHOR84]
+.L428:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L427:
+.L436:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L428
-.L429:
+	b	.L437
+.L438:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L419
+	b	.L428
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -2894,19 +3004,19 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR86
-	ldrh	w0, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR85
+	ldrh	w0, [x1, #:lo12:.LANCHOR85]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR86]
+	strh	w0, [x1, #:lo12:.LANCHOR85]
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L435
+	bcs	.L444
 	mov	w2, 210
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR86
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR87
+	add	x1, x1, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
@@ -2915,7 +3025,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L435:
+.L444:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -2927,28 +3037,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L439
-	adrp	x1, .LANCHOR82
+	beq	.L448
+	adrp	x1, .LANCHOR81
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR82]
+	ldr	x3, [x1, #:lo12:.LANCHOR81]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR88
+	adrp	x1, .LANCHOR87
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR88]
-	cbnz	x5, .L440
-	str	x4, [x1, #:lo12:.LANCHOR88]
-.L439:
+	ldr	x5, [x1, #:lo12:.LANCHOR87]
+	cbnz	x5, .L449
+	str	x4, [x1, #:lo12:.LANCHOR87]
+.L448:
 	mov	w0, 0
 	ret
-.L440:
-	adrp	x1, .LANCHOR79
+.L449:
+	adrp	x1, .LANCHOR78
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR79]
+	ldr	x11, [x1, #:lo12:.LANCHOR78]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -2956,37 +3066,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L443:
+.L452:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L441
+	bcs	.L450
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L442
+	bne	.L451
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L439
-.L442:
+	b	.L448
+.L451:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L443
-.L441:
+	b	.L452
+.L450:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L444
+	bne	.L453
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR88]
-	b	.L439
-.L444:
+	str	x4, [x12, #:lo12:.LANCHOR87]
+	b	.L448
+.L453:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L439
+	b	.L448
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -2996,19 +3106,19 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR89
-	ldrh	w0, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR88
+	ldrh	w0, [x1, #:lo12:.LANCHOR88]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR89]
+	strh	w0, [x1, #:lo12:.LANCHOR88]
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L445
+	bcs	.L454
 	mov	w2, 203
-	adrp	x1, .LANCHOR90
+	adrp	x1, .LANCHOR89
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR90
+	add	x1, x1, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
@@ -3017,7 +3127,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	b	printf
-.L445:
+.L454:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3030,25 +3140,25 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR82
+	adrp	x20, .LANCHOR81
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR82]
+	ldr	x23, [x20, #:lo12:.LANCHOR81]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L449
+	bne	.L458
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L449
+	beq	.L458
 	mov	w2, 386
-	adrp	x1, .LANCHOR91
+	adrp	x1, .LANCHOR90
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR91
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3056,16 +3166,16 @@ List_remove_node:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L449:
+.L458:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L450
+	bne	.L459
 	cmp	w0, w1
-	bne	.L451
+	bne	.L460
 	str	xzr, [x22]
-.L452:
+.L461:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3075,35 +3185,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L451:
-	ldr	x1, [x20, #:lo12:.LANCHOR82]
+.L460:
+	ldr	x1, [x20, #:lo12:.LANCHOR81]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L452
-.L450:
+	b	.L461
+.L459:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L453
+	bne	.L462
 	cmp	w1, w0
-	beq	.L452
+	beq	.L461
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR82]
+	ldr	x0, [x20, #:lo12:.LANCHOR81]
 	strh	w2, [x0, x1]
-	b	.L452
-.L453:
-	ldr	x2, [x20, #:lo12:.LANCHOR82]
+	b	.L461
+.L462:
+	ldr	x2, [x20, #:lo12:.LANCHOR81]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L452
+	b	.L461
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3111,18 +3221,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L461
+	cbz	x2, .L470
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR82
+	adrp	x3, .LANCHOR81
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR82]
-.L457:
-	cbnz	w1, .L458
-.L460:
+	ldr	x19, [x3, #:lo12:.LANCHOR81]
+.L466:
+	cbnz	w1, .L467
+.L469:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3135,15 +3245,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L458:
+.L467:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L460
+	beq	.L469
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L457
-.L461:
+	b	.L466
+.L470:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3153,28 +3263,28 @@ List_pop_index_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR83
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
-	cbz	x1, .L471
 	adrp	x0, .LANCHOR82
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	cbz	x1, .L480
+	adrp	x0, .LANCHOR81
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR82]
+	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
-.L468:
-	cbz	w2, .L469
+.L477:
+	cbz	w2, .L478
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L470
+	bne	.L479
 	ret
-.L470:
+.L479:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L468
-.L471:
+	b	.L477
+.L480:
 	mov	w0, 65535
 	ret
-.L469:
+.L478:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3192,35 +3302,35 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR92
+	adrp	x0, .LANCHOR91
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L474
+	beq	.L483
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w19
+	beq	.L483
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L474
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	cmp	w0, w19
-	beq	.L474
-	adrp	x0, .LANCHOR82
+	beq	.L483
+	adrp	x0, .LANCHOR81
 	mov	w21, 6
-	adrp	x24, .LANCHOR83
+	adrp	x24, .LANCHOR82
 	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x0, #:lo12:.LANCHOR82]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	ldr	x23, [x0, #:lo12:.LANCHOR81]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L474
-	adrp	x1, .LANCHOR84
+	beq	.L483
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
@@ -3229,14 +3339,14 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L477
+	bne	.L486
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L477
+	bne	.L486
 	mov	w2, 504
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3244,41 +3354,41 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L477:
+.L486:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L478
+	bne	.L487
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L474
-.L478:
+	beq	.L483
+.L487:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	umull	x0, w0, w1
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	ldr	x2, [x25, #:lo12:.LANCHOR84]
+	ldr	x2, [x25, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR82]
+	ldr	x2, [x26, #:lo12:.LANCHOR81]
 	add	x0, x2, x0
 	ldrh	w2, [x0, 4]
 	cmp	w2, 0
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L474
-	adrp	x20, .LANCHOR86
+	bcs	.L483
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	add	x0, x24, :lo12:.LANCHOR83
+	add	x0, x24, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
-	cbnz	w0, .L480
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L489
 	mov	w2, 515
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3286,13 +3396,13 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L480:
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+.L489:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR86]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L474:
+.L483:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3314,27 +3424,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L485:
+.L494:
 	cmp	w20, w1
-	beq	.L489
+	beq	.L498
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L486
+	cbnz	w2, .L495
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L487
-	adrp	x0, .LANCHOR76+6
-	ldrh	w2, [x0, #:lo12:.LANCHOR76+6]
+	bcs	.L496
+	adrp	x0, .LANCHOR75+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L488:
-	b	.L488
-.L487:
+.L497:
+	b	.L497
+.L496:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3343,14 +3453,14 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L489:
+.L498:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L491
+	bhi	.L500
 	mov	w2, 629
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR95
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR96
+	add	x1, x1, :lo12:.LANCHOR95
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3358,16 +3468,16 @@ ftl_map_blk_alloc_new_blk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L491:
+.L500:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L486:
+.L495:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L485
+	b	.L494
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3375,41 +3485,41 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR67
 	mov	x1, 0
 	mov	w3, 65535
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR97
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR96
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-.L494:
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
+.L503:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L496
+	bcc	.L505
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L497:
+.L506:
 	cmp	w1, w2
-	bne	.L499
+	bne	.L508
 	cmp	w19, w2
-	bcc	.L495
-	adrp	x1, .LANCHOR98
+	bcc	.L504
+	adrp	x1, .LANCHOR97
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR98]
+	ldrh	w4, [x1, #:lo12:.LANCHOR97]
 	mov	w1, 0
-.L500:
+.L509:
 	cmp	w1, w2
-	bne	.L502
+	bne	.L511
 	cmp	w19, w1
-	bcc	.L495
-	mov	w2, 855
-	adrp	x1, .LANCHOR99
+	bcc	.L504
+	mov	w2, 859
+	adrp	x1, .LANCHOR98
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR99
+	add	x1, x1, :lo12:.LANCHOR98
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3417,86 +3527,86 @@ select_l2p_ram_region:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L495
-.L496:
+	b	.L504
+.L505:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L494
-.L495:
+	bne	.L503
+.L504:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L499:
+.L508:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L498
+	tbnz	w4, #31, .L507
 	cmp	w5, w4
-	bls	.L498
+	bls	.L507
 	mov	w5, w4
 	mov	w19, w1
-.L498:
+.L507:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L497
-.L502:
+	b	.L506
+.L511:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L501
+	bls	.L510
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L501:
+.L510:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L500
+	b	.L509
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR99
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR100]
+	ldrh	w1, [x2, #:lo12:.LANCHOR99]
 	cmp	w1, 4
-	bhi	.L505
-	cbnz	w0, .L505
+	bhi	.L514
+	cbnz	w0, .L514
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR100]
+	strh	w1, [x2, #:lo12:.LANCHOR99]
 	ret
-.L505:
+.L514:
 	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR101
-	strh	wzr, [x3, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR100
+	strh	wzr, [x3, #:lo12:.LANCHOR99]
 	mov	w2, 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR84
-	str	wzr, [x0, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR83
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR84]
+	ldr	x6, [x1, #:lo12:.LANCHOR83]
 	mov	w7, 65535
 	mov	x1, 0
-.L506:
+.L515:
 	cmp	w5, w1, uxth
-	bhi	.L508
-	cbz	w3, .L504
-	str	w2, [x0, #:lo12:.LANCHOR101]
-.L504:
+	bhi	.L517
+	cbz	w3, .L513
+	str	w2, [x0, #:lo12:.LANCHOR100]
+.L513:
 	ret
-.L508:
+.L517:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L507
+	beq	.L516
 	add	w2, w2, w4
 	mov	w3, 1
-.L507:
+.L516:
 	add	x1, x1, 1
-	b	.L506
+	b	.L515
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3504,9 +3614,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L515
+	cbz	w1, .L524
 	b	ftl_set_blk_mode.part.10
-.L515:
+.L524:
 	adrp	x1, .LANCHOR0
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -3548,45 +3658,45 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR38]
 	mov	w1, 65535
-.L518:
+.L527:
 	cmp	w2, w3
-	bcc	.L520
-	adrp	x1, .LANCHOR53
+	bcc	.L529
+	adrp	x1, .LANCHOR52
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	add	x3, x0, x3
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L521:
+.L530:
 	cmp	x2, x3
-	bne	.L523
+	bne	.L532
 	ret
-.L520:
+.L529:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L519
+	beq	.L528
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L519:
+.L528:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L518
-.L523:
+	b	.L527
+.L532:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L522
+	beq	.L531
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L522:
+.L531:
 	add	x2, x2, 2
-	b	.L521
+	b	.L530
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3601,11 +3711,11 @@ make_superblock:
 	adrp	x0, .LANCHOR40
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcc	.L525
-	mov	w2, 2544
-	adrp	x1, .LANCHOR102
+	bcc	.L534
+	mov	w2, 2575
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR102
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -3613,7 +3723,7 @@ make_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L525:
+.L534:
 	adrp	x0, .LANCHOR38
 	adrp	x7, .LANCHOR47
 	add	x6, x19, 16
@@ -3623,53 +3733,53 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L526:
+.L535:
 	cmp	w8, w5, uxth
-	bhi	.L528
-	adrp	x1, .LANCHOR53
+	bhi	.L537
+	adrp	x1, .LANCHOR52
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L529
-	adrp	x0, .LANCHOR79
+	cbz	w0, .L538
+	adrp	x0, .LANCHOR78
 	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w0, 79
-	bhi	.L529
+	bhi	.L538
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L529:
+.L538:
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L530
+	cbz	w0, .L539
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L530:
+.L539:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L528:
+.L537:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L527
+	cbnz	w0, .L536
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L527:
+.L536:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L526
+	b	.L535
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3681,51 +3791,51 @@ update_multiplier_value:
 	mov	x7, 0
 	adrp	x8, .LANCHOR47
 	ldrh	w10, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	mov	w5, 0
 	add	x8, x8, :lo12:.LANCHOR47
-	ldrh	w11, [x0, #:lo12:.LANCHOR53]
+	ldrh	w11, [x0, #:lo12:.LANCHOR52]
 	cmp	w10, w7, uxth
-	bhi	.L550
-	cbz	w5, .L548
+	bhi	.L559
+	cbz	w5, .L557
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L549:
-	adrp	x0, .LANCHOR82
+.L558:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L543:
+.L552:
 	mov	w5, 0
-	b	.L542
-.L548:
+	b	.L551
+.L557:
 	mov	w5, 0
-	b	.L549
-.L550:
+	b	.L558
+.L559:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L541:
+.L550:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L540
+	cbnz	w0, .L549
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L540:
+.L549:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L541
-	cbz	w5, .L543
+	bhi	.L550
+	cbz	w5, .L552
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L542:
-	adrp	x0, .LANCHOR82
+.L551:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -3737,22 +3847,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR88
-	ldr	x0, [x0, #:lo12:.LANCHOR88]
-	cbz	x0, .L553
-	adrp	x1, .LANCHOR82
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR87
+	ldr	x0, [x0, #:lo12:.LANCHOR87]
+	cbz	x0, .L562
+	adrp	x1, .LANCHOR81
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR79
-	ldr	x1, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR78
+	ldr	x1, [x1, #:lo12:.LANCHOR78]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L553:
+.L562:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3761,21 +3871,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR88
+	adrp	x1, .LANCHOR87
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR88]
-	cbz	x1, .L561
-	adrp	x2, .LANCHOR89
+	ldr	x1, [x1, #:lo12:.LANCHOR87]
+	cbz	x1, .L570
+	adrp	x2, .LANCHOR88
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR89]
+	ldrh	w2, [x2, #:lo12:.LANCHOR88]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR82
-	ldr	x3, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR81
+	ldr	x3, [x2, #:lo12:.LANCHOR81]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -3783,25 +3893,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L557:
+.L566:
 	cmp	w0, w2
-	beq	.L560
+	beq	.L569
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L558
-.L560:
-	adrp	x0, .LANCHOR79
+	bne	.L567
+.L569:
+	adrp	x0, .LANCHOR78
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1]
 	ret
-.L558:
+.L567:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L557
-.L561:
+	b	.L566
+.L570:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3813,18 +3923,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L565
+	beq	.L574
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L565:
+.L574:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3833,45 +3943,45 @@ free_data_superblock:
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR104
-	adrp	x0, .LANCHOR103
-	adrp	x7, .LANCHOR105
-	adrp	x6, .LANCHOR106
-	ldr	x5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR58
-	str	wzr, [x0, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR103
+	adrp	x0, .LANCHOR102
+	adrp	x7, .LANCHOR104
+	adrp	x6, .LANCHOR105
+	ldr	x5, [x1, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR57
+	str	wzr, [x0, #:lo12:.LANCHOR102]
 	adrp	x0, .LANCHOR38
-	ldrh	w10, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR59
+	ldrh	w10, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	mov	w8, 24
-	ldrh	w11, [x1, #:lo12:.LANCHOR59]
-	adrp	x1, .LANCHOR107
-	ldr	x14, [x7, #:lo12:.LANCHOR105]
+	ldrh	w11, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR106
+	ldr	x14, [x7, #:lo12:.LANCHOR104]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR107]
+	ldr	x4, [x1, #:lo12:.LANCHOR106]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR106]
+	ldr	x15, [x6, #:lo12:.LANCHOR105]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L569:
+.L578:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L570
-	adrp	x1, .LANCHOR108
-	ldr	x7, [x7, #:lo12:.LANCHOR105]
-	ldr	x6, [x6, #:lo12:.LANCHOR106]
+	bne	.L579
+	adrp	x1, .LANCHOR107
+	ldr	x7, [x7, #:lo12:.LANCHOR104]
+	ldr	x6, [x6, #:lo12:.LANCHOR105]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR108]
-.L571:
+	ldr	w4, [x1, #:lo12:.LANCHOR107]
+.L580:
 	cmp	w0, w4
-	bcc	.L572
+	bcc	.L581
 	ret
-.L570:
+.L579:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3883,8 +3993,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L569
-.L572:
+	b	.L578
+.L581:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -3898,44 +4008,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L571
+	b	.L580
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR108
+	adrp	x2, .LANCHOR107
 	mov	w3, 0
 	mov	w7, 56
 	mov	w10, 24
-	ldr	w8, [x2, #:lo12:.LANCHOR108]
-	adrp	x2, .LANCHOR104
-	ldr	x4, [x2, #:lo12:.LANCHOR104]
-.L574:
+	ldr	w8, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
+	ldr	x4, [x2, #:lo12:.LANCHOR103]
+.L583:
 	cmp	w3, w1
-	bcs	.L573
+	bcs	.L582
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L579
-.L575:
+	b	.L588
+.L584:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L579:
+.L588:
 	cmp	w2, w8
-	bcs	.L576
+	bcs	.L585
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L575
+	bne	.L584
 	str	wzr, [x11, 16]
-.L576:
+.L585:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L574
-.L573:
+	b	.L583
+.L582:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -3943,38 +4053,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR108
+	adrp	x2, .LANCHOR107
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR108]
-	adrp	x2, .LANCHOR104
+	ldr	w5, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
 	mov	w10, 56
-	ldr	x6, [x2, #:lo12:.LANCHOR104]
-.L581:
+	ldr	x6, [x2, #:lo12:.LANCHOR103]
+.L590:
 	cmp	w3, w1
-	bcs	.L580
+	bcs	.L589
 	mov	w2, 0
-	b	.L586
-.L582:
+	b	.L595
+.L591:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L586:
+.L595:
 	cmp	w2, w5
-	bcs	.L583
+	bcs	.L592
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L582
+	cbnz	w11, .L591
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L583:
+.L592:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L581
-.L580:
+	b	.L590
+.L589:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -3982,23 +4092,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR109
+	adrp	x1, .LANCHOR108
 	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR109]
-	adrp	x1, .LANCHOR110
-	ldr	x3, [x1, #:lo12:.LANCHOR110]
+	ldrh	w2, [x1, #:lo12:.LANCHOR108]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	x1, 0
-.L588:
+.L597:
 	cmp	w2, w1, uxth
-	bhi	.L590
+	bhi	.L599
 	mov	w0, 0
 	ret
-.L590:
+.L599:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L588
+	bne	.L597
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -4015,40 +4125,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR109
-	adrp	x2, .LANCHOR110
+	adrp	x4, .LANCHOR108
+	adrp	x2, .LANCHOR109
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR109]
-	ldr	x5, [x2, #:lo12:.LANCHOR110]
-.L593:
+	ldrh	w1, [x4, #:lo12:.LANCHOR108]
+	ldr	x5, [x2, #:lo12:.LANCHOR109]
+.L602:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L595
-	bne	.L594
+	bcc	.L604
+	bne	.L603
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR109]
+	ldrh	w0, [x4, #:lo12:.LANCHOR108]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR109]
-	b	.L594
-.L595:
+	strh	w0, [x4, #:lo12:.LANCHOR108]
+	b	.L603
+.L604:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L593
-.L594:
-	adrp	x4, .LANCHOR111
-	adrp	x1, .LANCHOR112
+	bne	.L602
+.L603:
+	adrp	x4, .LANCHOR110
+	adrp	x1, .LANCHOR111
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR111]
-	ldr	x5, [x1, #:lo12:.LANCHOR112]
+	ldrh	w0, [x4, #:lo12:.LANCHOR110]
+	ldr	x5, [x1, #:lo12:.LANCHOR111]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR111]
+	strh	w0, [x4, #:lo12:.LANCHOR110]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -4057,91 +4167,91 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshOpenBlock
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
-	adrp	x8, .LANCHOR113
+	adrp	x8, .LANCHOR112
 	and	w0, w0, 65535
-	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L598
-	adrp	x6, .LANCHOR114
-	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	beq	.L607
+	adrp	x6, .LANCHOR113
+	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L598
-	adrp	x4, .LANCHOR115
-	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	beq	.L607
+	adrp	x4, .LANCHOR114
+	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L598
-	adrp	x2, .LANCHOR116
-	ldrh	w3, [x2, #:lo12:.LANCHOR116]
+	beq	.L607
+	adrp	x2, .LANCHOR115
+	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L598
+	beq	.L607
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L599
-	strh	w0, [x8, #:lo12:.LANCHOR113]
-.L598:
+	bne	.L608
+	strh	w0, [x8, #:lo12:.LANCHOR112]
+.L607:
 	mov	w0, 0
 	ret
-.L599:
+.L608:
 	cmp	w7, w1
-	bne	.L600
-	strh	w0, [x6, #:lo12:.LANCHOR114]
-	b	.L598
-.L600:
+	bne	.L609
+	strh	w0, [x6, #:lo12:.LANCHOR113]
+	b	.L607
+.L609:
 	cmp	w5, w1
-	bne	.L601
-	strh	w0, [x4, #:lo12:.LANCHOR115]
-	b	.L598
-.L601:
+	bne	.L610
+	strh	w0, [x4, #:lo12:.LANCHOR114]
+	b	.L607
+.L610:
 	cmp	w3, w1
-	bne	.L598
-	strh	w0, [x2, #:lo12:.LANCHOR116]
-	b	.L598
+	bne	.L607
+	strh	w0, [x2, #:lo12:.LANCHOR115]
+	b	.L607
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	adrp	x8, .LANCHOR113
+	adrp	x8, .LANCHOR112
 	and	w0, w0, 65535
-	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	ldrh	w10, [x8, #:lo12:.LANCHOR112]
 	cmp	w10, w0
-	beq	.L610
-	adrp	x6, .LANCHOR114
-	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	beq	.L619
+	adrp	x6, .LANCHOR113
+	ldrh	w7, [x6, #:lo12:.LANCHOR113]
 	cmp	w0, w7
-	beq	.L610
-	adrp	x4, .LANCHOR115
-	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	beq	.L619
+	adrp	x4, .LANCHOR114
+	ldrh	w5, [x4, #:lo12:.LANCHOR114]
 	cmp	w0, w5
-	beq	.L610
-	adrp	x2, .LANCHOR116
-	ldrh	w3, [x2, #:lo12:.LANCHOR116]
+	beq	.L619
+	adrp	x2, .LANCHOR115
+	ldrh	w3, [x2, #:lo12:.LANCHOR115]
 	cmp	w0, w3
-	beq	.L610
+	beq	.L619
 	mov	w1, 65535
 	cmp	w10, w1
-	bne	.L604
-	strh	w0, [x8, #:lo12:.LANCHOR113]
-.L610:
+	bne	.L613
+	strh	w0, [x8, #:lo12:.LANCHOR112]
+.L619:
 	mov	w0, 0
 	ret
-.L604:
+.L613:
 	cmp	w7, w1
-	bne	.L605
-	strh	w0, [x6, #:lo12:.LANCHOR114]
-	b	.L610
-.L605:
+	bne	.L614
+	strh	w0, [x6, #:lo12:.LANCHOR113]
+	b	.L619
+.L614:
 	cmp	w5, w1
-	bne	.L606
-	strh	w0, [x4, #:lo12:.LANCHOR115]
-	b	.L610
-.L606:
+	bne	.L615
+	strh	w0, [x4, #:lo12:.LANCHOR114]
+	b	.L619
+.L615:
 	cmp	w3, w1
-	bne	.L611
-	strh	w0, [x2, #:lo12:.LANCHOR116]
-	b	.L610
-.L611:
+	bne	.L620
+	strh	w0, [x2, #:lo12:.LANCHOR115]
+	b	.L619
+.L620:
 	mov	w0, -1
 	ret
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4159,39 +4269,39 @@ FtlGcMarkBadPhyBlk:
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L613
-	adrp	x1, .LANCHOR79
+	cbz	w0, .L622
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x11, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR79]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 39
-	bls	.L613
+	bls	.L622
 	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L613:
-	adrp	x1, .LANCHOR117
-	adrp	x3, .LANCHOR118
-	add	x3, x3, :lo12:.LANCHOR118
+.L622:
+	adrp	x1, .LANCHOR116
+	adrp	x3, .LANCHOR117
+	add	x3, x3, :lo12:.LANCHOR117
 	mov	x2, 0
-	ldrh	w0, [x1, #:lo12:.LANCHOR117]
-.L614:
+	ldrh	w0, [x1, #:lo12:.LANCHOR116]
+.L623:
 	cmp	w0, w2, uxth
-	bhi	.L616
+	bhi	.L625
 	cmp	w0, 15
-	bhi	.L615
+	bhi	.L624
 	add	w2, w0, 1
-	strh	w2, [x1, #:lo12:.LANCHOR117]
-	adrp	x1, .LANCHOR118
-	add	x1, x1, :lo12:.LANCHOR118
+	strh	w2, [x1, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR117
+	add	x1, x1, :lo12:.LANCHOR117
 	strh	w12, [x1, w0, sxtw 1]
-	b	.L615
-.L616:
+	b	.L624
+.L625:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w12
-	bne	.L614
-.L615:
+	bne	.L623
+.L624:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4201,35 +4311,35 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR117
-	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L628
-	adrp	x1, .LANCHOR113
-	ldrh	w2, [x1, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR116
+	ldrh	w0, [x0, #:lo12:.LANCHOR116]
+	cbz	w0, .L637
+	adrp	x1, .LANCHOR112
+	ldrh	w2, [x1, #:lo12:.LANCHOR112]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L628
+	bne	.L637
 	stp	x29, x30, [sp, -16]!
-	adrp	x11, .LANCHOR119
+	adrp	x11, .LANCHOR118
 	add	x29, sp, 0
-	ldrh	w1, [x11, #:lo12:.LANCHOR119]
+	ldrh	w1, [x11, #:lo12:.LANCHOR118]
 	cmp	w1, w0
-	bcc	.L623
-	strh	wzr, [x11, #:lo12:.LANCHOR119]
-.L623:
-	ldrh	w1, [x11, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR118
-	add	x0, x0, :lo12:.LANCHOR118
+	bcc	.L632
+	strh	wzr, [x11, #:lo12:.LANCHOR118]
+.L632:
+	ldrh	w1, [x11, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x11, #:lo12:.LANCHOR119]
+	ldrh	w0, [x11, #:lo12:.LANCHOR118]
 	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x11, #:lo12:.LANCHOR119]
+	strh	w0, [x11, #:lo12:.LANCHOR118]
 	mov	w0, 0
 	ret
-.L628:
+.L637:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4238,15 +4348,15 @@ FtlGcReFreshBadBlk:
 	.global	flash_boot_enter_slc_mode
 	.type	flash_boot_enter_slc_mode, %function
 flash_boot_enter_slc_mode:
-	adrp	x1, .LANCHOR29
+	adrp	x1, .LANCHOR119
 	and	w0, w0, 255
-	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	ldr	w2, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L631
+	bne	.L640
 	b	flash_enter_slc_mode
-.L631:
+.L640:
 	ret
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
@@ -4254,38 +4364,40 @@ flash_boot_enter_slc_mode:
 	.global	flash_boot_exit_slc_mode
 	.type	flash_boot_exit_slc_mode, %function
 flash_boot_exit_slc_mode:
-	adrp	x1, .LANCHOR29
+	adrp	x1, .LANCHOR119
 	and	w0, w0, 255
-	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	ldr	w2, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L633
+	bne	.L642
 	b	flash_exit_slc_mode
-.L633:
+.L642:
 	ret
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
 	.align	2
 	.type	FW_FlashBlockErase.constprop.41, %function
 FW_FlashBlockErase.constprop.41:
-	stp	x29, x30, [sp, -16]!
-	mov	w4, w0
-	adrp	x0, .LANCHOR18
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR18
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
-	ldrb	w3, [x0, 9]
+	ldrb	w19, [x0, 9]
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
-	udiv	w1, w4, w3
 	mov	w2, 0
 	mov	w0, 0
+	udiv	w1, w20, w19
 	bl	FlashEraseBlock
-	mov	w3, w0
+	mov	w19, w0
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
-	and	w0, w3, 255
-	ldp	x29, x30, [sp], 16
+	and	w0, w19, 255
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",@progbits
@@ -4305,16 +4417,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L639
+	cbnz	w0, .L648
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L640:
+.L649:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L640
-.L646:
+	bne	.L649
+.L655:
 	adrp	x19, .LANCHOR120
 	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
@@ -4325,41 +4437,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L641:
+.L650:
 	cmp	w20, w0, uxth
-	bhi	.L663
+	bhi	.L674
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L639:
+.L648:
 	cmp	w0, 1
-	bne	.L642
+	bne	.L651
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L645:
+.L654:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L643
+	bls	.L652
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L643:
+.L652:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L645
-	b	.L646
-.L642:
+	bne	.L654
+	b	.L655
+.L651:
 	cmp	w0, 2
-	bne	.L647
+	bne	.L656
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L649:
+.L658:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4368,32 +4480,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L649
-	b	.L646
-.L647:
+	bne	.L658
+	b	.L655
+.L656:
 	cmp	w0, 3
-	bne	.L650
+	bne	.L659
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L653:
+.L662:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L651
+	bls	.L660
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L651:
+.L660:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L653
-	b	.L646
-.L650:
+	bne	.L662
+	b	.L655
+.L659:
 	cmp	w0, 4
-	bne	.L654
+	bne	.L663
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4412,7 +4524,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L656:
+.L665:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4421,57 +4533,76 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L656
-	b	.L646
-.L654:
+	bne	.L665
+	b	.L655
+.L663:
 	cmp	w0, 5
-	bne	.L657
+	bne	.L666
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L658:
+.L667:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L658
+	bne	.L667
 	add	x1, x1, 32
-.L659:
+.L668:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L659
-	b	.L646
-.L657:
+	bne	.L668
+	b	.L655
+.L666:
 	cmp	w0, 6
-	bne	.L646
+	bne	.L669
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L662:
+.L672:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L660
+	bls	.L670
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L660:
+.L670:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L662
-	b	.L646
-.L663:
+	bne	.L672
+	b	.L655
+.L669:
+	cmp	w0, 9
+	bne	.L655
+	adrp	x1, .LANCHOR16
+	add	x0, x1, :lo12:.LANCHOR16
+	strh	wzr, [x1, #:lo12:.LANCHOR16]
+	mov	w1, 1
+	strh	w1, [x0, 2]
+	mov	w1, 2
+	strh	w1, [x0, 4]
+	add	x1, x0, 6
+	mov	w0, 3
+.L673:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 509
+	bne	.L673
+	b	.L655
+.L674:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L641
+	b	.L650
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4481,32 +4612,28 @@ FlashDieInfoInit:
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR31+10
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR25
-	adrp	x20, .LANCHOR121
-	stp	x23, x24, [sp, 48]
 	ldrh	w0, [x0, #:lo12:.LANCHOR31+10]
-	adrp	x23, .LANCHOR3
-	stp	x21, x22, [sp, 32]
-	strb	wzr, [x19, #:lo12:.LANCHOR25]
-	cmp	w0, 256
-	strb	wzr, [x20, #:lo12:.LANCHOR121]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR121
 	str	x25, [sp, 64]
-	bls	.L679
-	mov	w0, 512
-.L696:
-	adrp	x25, .LANCHOR26
-	add	x22, x25, :lo12:.LANCHOR26
-	str	w0, [x23, #:lo12:.LANCHOR3]
+	adrp	x25, .LANCHOR25
+	stp	x21, x22, [sp, 32]
+	mov	x22, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR26
+	strb	wzr, [x19, #:lo12:.LANCHOR121]
+	add	x21, x24, :lo12:.LANCHOR26
+	strb	wzr, [x25, #:lo12:.LANCHOR25]
+	bl	FlashBlockAlignInit
 	mov	w2, 8
 	mov	w1, 0
-	mov	x0, x22
-	adrp	x24, .LANCHOR17
+	adrp	x23, .LANCHOR17
+	mov	x0, x21
+	add	x20, x23, :lo12:.LANCHOR17
 	bl	ftl_memset
-	add	x21, x24, :lo12:.LANCHOR17
 	mov	w2, 32
 	mov	w1, 0
-	mov	x0, x21
+	mov	x0, x20
 	bl	ftl_memset
 	mov	w2, 192
 	mov	w1, 0
@@ -4514,35 +4641,34 @@ FlashDieInfoInit:
 	add	x0, x0, :lo12:.LANCHOR23
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x12, .LANCHOR22
-	add	x14, x19, :lo12:.LANCHOR25
-	add	x15, x12, :lo12:.LANCHOR22
+	adrp	x13, .LANCHOR22
+	add	x15, x25, :lo12:.LANCHOR25
+	add	x10, x13, :lo12:.LANCHOR22
 	ldr	x7, [x0, #:lo12:.LANCHOR18]
-	mov	x8, 0
-	add	x10, x7, 1
-	ldrb	w11, [x7]
-.L683:
-	mov	w2, w11
-	add	x1, x15, x8, lsl 3
-	mov	x0, x10
+	add	x11, x7, 1
+	ldrb	w12, [x7]
+.L692:
+	mov	w2, w12
+	add	x1, x10, x22, lsl 3
+	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L682
-	ldrb	w1, [x14]
+	cbnz	w0, .L691
+	ldrb	w1, [x15]
 	add	w0, w1, 1
-	strb	w0, [x14]
-	str	wzr, [x21, x1, lsl 2]
-	strb	w8, [x22, x1]
-.L682:
-	add	x8, x8, 1
-	cmp	x8, 4
-	bne	.L683
-	ldrb	w0, [x19, #:lo12:.LANCHOR25]
-	strb	w0, [x20, #:lo12:.LANCHOR121]
+	strb	w0, [x15]
+	str	wzr, [x20, x1, lsl 2]
+	strb	w22, [x21, x1]
+.L691:
+	add	x22, x22, 1
+	cmp	x22, 4
+	bne	.L692
+	ldrb	w0, [x25, #:lo12:.LANCHOR25]
+	strb	w0, [x19, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L684
-.L688:
-	ldrb	w0, [x19, #:lo12:.LANCHOR25]
+	beq	.L693
+.L697:
+	ldrb	w0, [x25, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4555,45 +4681,41 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L679:
-	cmp	w0, 128
-	bls	.L696
-	mov	w0, 256
-	b	.L696
-.L684:
-	ldr	w20, [x23, #:lo12:.LANCHOR3]
-	add	x12, x12, :lo12:.LANCHOR22
-	add	x14, x19, :lo12:.LANCHOR25
-	add	x24, x24, :lo12:.LANCHOR17
-	add	x13, x25, :lo12:.LANCHOR26
-	mov	x15, 0
-.L687:
-	mov	w2, w11
-	add	x1, x12, x15, lsl 3
-	mov	x0, x10
+.L693:
+	adrp	x0, .LANCHOR3
+	add	x13, x13, :lo12:.LANCHOR22
+	add	x15, x25, :lo12:.LANCHOR25
+	add	x23, x23, :lo12:.LANCHOR17
+	ldr	w20, [x0, #:lo12:.LANCHOR3]
+	add	x14, x24, :lo12:.LANCHOR26
+	mov	x19, 0
+.L696:
+	mov	w2, w12
+	add	x1, x13, x19, lsl 3
+	mov	x0, x11
 	bl	FlashMemCmp8
-	cbnz	w0, .L685
+	cbnz	w0, .L694
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
-	ldrb	w1, [x14]
+	ldrb	w1, [x15]
 	and	w0, w0, 65280
 	mul	w2, w2, w20
 	mul	w0, w0, w2
 	sxtw	x2, w1
-	str	w0, [x24, x2, lsl 2]
+	str	w0, [x23, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L686
+	cbz	w3, .L695
 	lsl	w0, w0, 1
-	str	w0, [x24, x2, lsl 2]
-.L686:
+	str	w0, [x23, x2, lsl 2]
+.L695:
 	add	w1, w1, 1
-	strb	w15, [x13, x2]
-	strb	w1, [x14]
-.L685:
-	add	x15, x15, 1
-	cmp	x15, 4
-	bne	.L687
-	b	.L688
+	strb	w19, [x14, x2]
+	strb	w1, [x15]
+.L694:
+	add	x19, x19, 1
+	cmp	x19, 4
+	bne	.L696
+	b	.L697
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4608,7 +4730,7 @@ ReadFlashInfo:
 	mov	x19, x0
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x3, .LANCHOR69
+	adrp	x3, .LANCHOR68
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR3
@@ -4621,8 +4743,8 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR69
-	ldrb	w3, [x3, #:lo12:.LANCHOR69]
+	add	x0, x3, :lo12:.LANCHOR68
+	ldrb	w3, [x3, #:lo12:.LANCHOR68]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -4641,20 +4763,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L698:
+.L706:
 	cmp	w3, w1, uxtb
-	bhi	.L699
+	bhi	.L707
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L699:
+.L707:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L698
+	b	.L706
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4680,13 +4802,13 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L704:
+.L712:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L701
+	beq	.L709
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L703
+	bhi	.L711
 	mov	w2, 79
 	mov	x1, x23
 	adrp	x0, .LC5
@@ -4697,7 +4819,7 @@ FtlBbt2Bitmap:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L703:
+.L711:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4709,8 +4831,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L704
-.L701:
+	bne	.L712
+.L709:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4722,11 +4844,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR75
-	add	x0, x1, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR75]
+	strh	w2, [x1, #:lo12:.LANCHOR74]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -4738,11 +4860,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR76
-	add	x3, x1, :lo12:.LANCHOR76
+	adrp	x1, .LANCHOR75
+	add	x3, x1, :lo12:.LANCHOR75
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR76]
+	strh	w0, [x1, #:lo12:.LANCHOR75]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -4773,21 +4895,21 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L712:
+.L720:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L716
-	adrp	x0, .LANCHOR54
+	bhi	.L724
+	adrp	x0, .LANCHOR53
 	mov	w23, 0
 	mov	w20, 0
-	ldrh	w1, [x0, #:lo12:.LANCHOR54]
+	ldrh	w1, [x0, #:lo12:.LANCHOR53]
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L717:
+.L725:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L721
+	bhi	.L729
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -4795,64 +4917,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L716:
+.L724:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L713:
+.L721:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L715
+	bhi	.L723
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L712
-.L715:
+	b	.L720
+.L723:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L714
-	cbz	w2, .L714
+	bne	.L722
+	cbz	w2, .L722
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L714:
+.L722:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L713
-.L721:
+	b	.L721
+.L729:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L718
+	bls	.L726
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L719
-.L720:
+	cbnz	w0, .L727
+.L728:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L717
-.L718:
-	cbnz	w1, .L720
+	b	.L725
+.L726:
+	cbnz	w1, .L728
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L720
-.L722:
+	cbz	w0, .L728
+.L730:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L720
-.L723:
+	b	.L728
+.L731:
 	mov	w24, 0
-	b	.L722
-.L719:
+	b	.L730
+.L727:
 	mov	w23, w20
-	cbz	w1, .L723
+	cbz	w1, .L731
 	mov	w24, w1
-	b	.L720
+	b	.L728
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4864,39 +4986,39 @@ FtlL2PDataInit:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR125
-	adrp	x20, .LANCHOR65
+	adrp	x20, .LANCHOR64
 	stp	x21, x22, [sp, 32]
 	ldr	x0, [x19, #:lo12:.LANCHOR125]
-	adrp	x22, .LANCHOR58
-	ldr	w2, [x20, #:lo12:.LANCHOR65]
-	adrp	x21, .LANCHOR68
+	adrp	x22, .LANCHOR57
+	ldr	w2, [x20, #:lo12:.LANCHOR64]
+	adrp	x21, .LANCHOR67
 	str	x23, [sp, 48]
 	adrp	x23, .LANCHOR126
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR68]
+	ldrh	w0, [x21, #:lo12:.LANCHOR67]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR58]
+	ldrh	w2, [x22, #:lo12:.LANCHOR57]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR126]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR97
-	ldrh	w3, [x21, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR96
+	ldrh	w3, [x21, #:lo12:.LANCHOR67]
 	ldr	x6, [x23, #:lo12:.LANCHOR126]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR58]
+	ldrh	w5, [x22, #:lo12:.LANCHOR57]
 	add	x3, x0, x3, lsl 4
-.L733:
+.L741:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L734
+	bne	.L742
 	adrp	x1, .LANCHOR127
 	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
 	strh	w2, [x1, #:lo12:.LANCHOR127]
-	ldr	w1, [x20, #:lo12:.LANCHOR65]
+	ldr	w1, [x20, #:lo12:.LANCHOR64]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
@@ -4905,8 +5027,8 @@ FtlL2PDataInit:
 	strh	w2, [x0, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR128]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR67
-	ldrh	w1, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR66
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
 	strh	w1, [x0, 6]
 	adrp	x1, .LANCHOR129
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
@@ -4922,7 +5044,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L734:
+.L742:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4930,7 +5052,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L733
+	b	.L741
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4956,18 +5078,18 @@ FtlVariablesInit:
 	adrp	x0, .LANCHOR28
 	mov	w1, 0
 	str	wzr, [x0, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR70
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR61
+	ldrh	w2, [x0, #:lo12:.LANCHOR61]
 	adrp	x0, .LANCHOR71
-	strh	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR62
-	ldrh	w2, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	ldr	x0, [x0, #:lo12:.LANCHOR71]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR78
 	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR137
@@ -4978,8 +5100,8 @@ FtlVariablesInit:
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
@@ -5005,13 +5127,13 @@ SupperBlkListInit:
 	ldrh	w2, [x0, #:lo12:.LANCHOR41]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR82
+	adrp	x24, .LANCHOR81
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR86
+	adrp	x23, .LANCHOR85
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR89
+	adrp	x22, .LANCHOR88
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR40
 	str	x27, [sp, 80]
@@ -5020,95 +5142,95 @@ SupperBlkListInit:
 	add	x26, x26, :lo12:.LANCHOR47
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR88
+	adrp	x0, .LANCHOR87
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR86]
-	str	xzr, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR83
-	strh	wzr, [x22, #:lo12:.LANCHOR89]
+	strh	wzr, [x23, #:lo12:.LANCHOR85]
+	str	xzr, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x22, #:lo12:.LANCHOR88]
 	adrp	x27, .LANCHOR38
-	str	xzr, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR85
-	str	xzr, [x0, #:lo12:.LANCHOR85]
+	str	xzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR84
+	str	xzr, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR139
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
-.L739:
+.L747:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L746
-	adrp	x0, .LANCHOR53
+	bge	.L754
+	adrp	x0, .LANCHOR52
 	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR53]
-	b	.L747
-.L741:
+	ldrh	w7, [x0, #:lo12:.LANCHOR52]
+	b	.L755
+.L749:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L740
+	cbnz	w0, .L748
 	add	w5, w7, w5
 	sxth	w5, w5
-.L740:
+.L748:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L747:
+.L755:
 	cmp	w6, w8
-	blt	.L741
-	cbz	w5, .L742
+	blt	.L749
+	cbz	w5, .L750
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L743:
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+.L751:
+	ldr	x1, [x24, #:lo12:.LANCHOR81]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w19, w0
+	beq	.L752
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L744
+	beq	.L752
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L744
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	cmp	w19, w0
-	beq	.L744
-	adrp	x0, .LANCHOR84
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	beq	.L752
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L745
+	cbnz	w0, .L753
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L744:
+.L752:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L739
-.L742:
-	adrp	x0, .LANCHOR84
+	b	.L747
+.L750:
+	adrp	x0, .LANCHOR83
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L743
-.L745:
+	b	.L751
+.L753:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L744
-.L746:
-	strh	w20, [x23, #:lo12:.LANCHOR86]
+	b	.L752
+.L754:
+	strh	w20, [x23, #:lo12:.LANCHOR85]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR89]
+	strh	w21, [x22, #:lo12:.LANCHOR88]
 	cmp	w0, w20
-	bge	.L748
-	mov	w2, 2614
+	bge	.L756
+	mov	w2, 2645
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR140
@@ -5119,7 +5241,7 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L748:
+.L756:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5135,25 +5257,25 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR109
+	adrp	x0, .LANCHOR108
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR111
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR55
-	strh	wzr, [x0, #:lo12:.LANCHOR111]
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR110
-	ldrh	w2, [x19, #:lo12:.LANCHOR55]
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR54
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR55]
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR112
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR111
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5203,7 +5325,7 @@ FlashReadIdbData:
 	.global	FlashLoadPhyInfoInRam
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
 	adrp	x0, .LANCHOR142
 	add	x8, x0, :lo12:.LANCHOR142
 	adrp	x11, .LANCHOR22
@@ -5213,57 +5335,62 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L760:
+	str	x21, [sp, 32]
+.L768:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
-	lsl	x20, x10, 5
+	lsl	x21, x10, 5
 	mov	x1, x11
 	mov	x0, x8
 	bl	FlashMemCmp8
-	mov	w19, w0
-	cbnz	w0, .L758
+	mov	w20, w0
+	cbnz	w0, .L766
 	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
-	add	x20, x0, x20
+	add	x21, x0, x21
 	add	x0, x0, x12
 	adrp	x1, .LANCHOR143
 	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L759:
+.L767:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L762
+	beq	.L770
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L759
+	bne	.L767
 	mov	w2, w0
-.L762:
+.L770:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR143
+	adrp	x19, .LANCHOR31
+	add	x19, x19, :lo12:.LANCHOR31
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
 	mov	w2, 32
-	mov	x1, x20
-	adrp	x0, .LANCHOR31
-	add	x0, x0, :lo12:.LANCHOR31
+	mov	x1, x21
+	mov	x0, x19
 	bl	ftl_memcpy
-	b	.L757
-.L758:
+	ldrh	w0, [x19, 10]
+	bl	FlashBlockAlignInit
+	b	.L765
+.L766:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 77
-	bne	.L760
-	mov	w19, -1
-.L757:
-	mov	w0, w19
+	cmp	x10, 81
+	bne	.L768
+	mov	w20, -1
+.L765:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x29, x30, [sp], 48
 	ret
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",@progbits
@@ -5272,15 +5399,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L767:
+.L775:
 	cmp	w2, w3
-	bhi	.L768
+	bhi	.L776
 	ret
-.L768:
+.L776:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L767
+	b	.L775
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5299,15 +5426,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L770
-	cbz	x3, .L771
+	bne	.L778
+	cbz	x3, .L779
 	tst	x3, 3
-	bne	.L772
+	bne	.L780
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L771:
-	cbz	x20, .L769
+.L779:
+	cbz	x20, .L777
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5319,26 +5446,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L769:
+.L777:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L772:
+.L780:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L771
-.L770:
-	cbz	x3, .L775
+	b	.L779
+.L778:
+	cbz	x3, .L783
 	tst	x3, 3
-	bne	.L776
+	bne	.L784
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L775:
-	cbz	x20, .L769
+.L783:
+	cbz	x20, .L777
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5350,13 +5477,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L769
-.L776:
+	b	.L777
+.L784:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L775
+	b	.L783
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5380,14 +5507,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L789
-	cbnz	x4, .L790
+	bne	.L797
+	cbnz	x4, .L798
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L790:
+.L798:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5397,7 +5524,7 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L814
+	cbnz	w20, .L822
 	adrp	x0, .LANCHOR32
 	adrp	x4, .LANCHOR35
 	mov	x1, x0
@@ -5410,38 +5537,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L793:
+.L801:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L794
+	bne	.L802
 	adrp	x0, .LANCHOR34
 	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
 	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L795:
+.L803:
 	cmp	w2, w24
-	bcs	.L791
-	cbnz	w4, .L801
-.L791:
+	bcs	.L799
+	cbnz	w4, .L809
+.L799:
 	str	wzr, [x19, 16]
-.L802:
+.L810:
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L788
-	cbnz	w20, .L788
+	bls	.L796
+	cbnz	w20, .L796
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L788
+	bne	.L796
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L788:
+.L796:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5450,7 +5577,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L794:
+.L802:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5463,18 +5590,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L793
-.L801:
+	b	.L801
+.L809:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L817
+	tbnz	x0, 2, .L825
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L817
+	tbnz	x0, 15, .L825
 	cmp	w3, 5
-	bls	.L797
+	bls	.L805
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5487,26 +5614,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L798
+	bls	.L806
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L823:
+.L831:
 	orr	w0, w1, w0, lsl 5
-.L799:
+.L807:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L796:
+.L804:
 	add	w2, w2, 1
-	b	.L795
-.L798:
+	b	.L803
+.L806:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L823
-.L797:
+	b	.L831
+.L805:
 	cmp	w3, 3
-	bls	.L818
+	bls	.L826
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5519,45 +5646,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L800
+	bls	.L808
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L823
-.L800:
+	b	.L831
+.L808:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L823
-.L818:
+	b	.L831
+.L826:
 	mov	w0, 0
-	b	.L799
-.L817:
+	b	.L807
+.L825:
 	mov	w22, -1
-	b	.L796
-.L814:
+	b	.L804
+.L822:
 	mov	w22, 0
-	b	.L791
-.L789:
+	b	.L799
+.L797:
 	cmp	w20, 1
-	bne	.L803
+	bne	.L811
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L804:
+.L812:
 	cmp	w22, w24
-	bcc	.L806
+	bcc	.L814
 	mov	w22, 0
-	b	.L802
-.L806:
+	b	.L810
+.L814:
 	and	w28, w22, 3
-	cbz	x26, .L819
+	cbz	x26, .L827
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L805:
+.L813:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5574,11 +5701,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L804
-.L819:
+	b	.L812
+.L827:
 	mov	x3, 0
-	b	.L805
-.L803:
+	b	.L813
+.L811:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5594,16 +5721,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L807:
+.L815:
 	cmp	w24, w23
-	bls	.L802
+	bls	.L810
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L808
+	bls	.L816
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5611,9 +5738,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L808:
+.L816:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L820
+	tbnz	x0, 2, .L828
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5621,12 +5748,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L809:
+.L817:
 	and	w2, w23, 3
-	cbz	x26, .L821
+	cbz	x26, .L829
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L810:
+.L818:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5634,13 +5761,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L807
-.L820:
+	b	.L815
+.L828:
 	mov	w22, -1
-	b	.L809
-.L821:
+	b	.L817
+.L829:
 	mov	x3, 0
-	b	.L810
+	b	.L818
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5658,7 +5785,7 @@ FlashReadRawPage:
 	mov	x22, x2
 	mov	x23, x3
 	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
-	bne	.L825
+	bne	.L833
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5667,7 +5794,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L825:
+.L833:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5720,7 +5847,7 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L841
+	cbz	w4, .L849
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5739,10 +5866,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L830
-.L839:
+	bne	.L838
+.L847:
 	mov	w21, -1
-.L827:
+.L835:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5751,7 +5878,7 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L830:
+.L838:
 	mov	w1, w25
 	mov	w2, w21
 	adrp	x0, .LC9
@@ -5761,20 +5888,20 @@ FlashDdrTunningRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L832
+	bhi	.L840
 	str	w0, [x1, #:lo12:.LANCHOR144]
-	b	.L827
-.L832:
+	b	.L835
+.L840:
 	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L829:
+.L837:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L837:
+.L845:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5786,65 +5913,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L833
+	bhi	.L841
 	cmp	w0, 2
-	bhi	.L843
+	bhi	.L851
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L843
+	bls	.L851
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L835:
+.L843:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L836:
-	cbz	w20, .L838
+.L844:
+	cbz	w20, .L846
 	mov	w1, w20
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L838:
-	cbz	w27, .L827
+.L846:
+	cbz	w27, .L835
 	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L839
+	cbz	w26, .L847
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L827
-.L841:
+	b	.L835
+.L849:
 	mov	w21, 1024
-	b	.L829
-.L833:
+	b	.L837
+.L841:
 	cmp	w19, w6
-	bls	.L844
+	bls	.L852
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L836
+	bhi	.L844
 	mov	w6, w19
-.L844:
+.L852:
 	mov	w19, 0
-	b	.L834
-.L843:
+	b	.L842
+.L851:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L834:
+.L842:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L837
+	bls	.L845
 	mov	w1, w20
 	mov	w20, w5
-	b	.L835
+	b	.L843
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5865,14 +5992,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L854
+	bne	.L862
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L855
-.L857:
+	cbnz	w25, .L863
+.L865:
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L854
+	cbz	w0, .L862
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5884,16 +6011,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L858
+	beq	.L866
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L854
-.L858:
+	bls	.L862
+.L866:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L854
-.L855:
+	b	.L862
+.L863:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5902,14 +6029,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L857
+	beq	.L865
 	mov	w19, w0
-.L854:
+.L862:
 	adrp	x24, .LANCHOR145
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
-	cbz	x4, .L853
+	cbz	x4, .L861
 	cmn	w19, #1
-	bne	.L853
+	bne	.L861
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5923,10 +6050,10 @@ FlashReadPage:
 	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L853
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L853
+	bne	.L861
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L861
 	mov	w0, w20
 	bl	flash_enter_slc_mode
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
@@ -5938,7 +6065,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L853:
+.L861:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5977,27 +6104,27 @@ FlashDdrParaScan:
 	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L874
+	beq	.L882
 	cmn	w22, #1
-	bne	.L875
-.L874:
+	bne	.L883
+.L882:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L875
+	tbz	x0, 0, .L883
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
-.L876:
+.L884:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L875:
+.L883:
 	mov	w0, 1
 	strb	w0, [x20, #:lo12:.LANCHOR30]
-	b	.L876
+	b	.L884
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -6007,10 +6134,10 @@ FlashLoadPhyInfo:
 	stp	x29, x30, [sp, -128]!
 	mov	w0, 60
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR31
 	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR3
 	adrp	x22, .LANCHOR147
+	stp	x19, x20, [sp, 16]
 	strb	w0, [x29, 120]
 	mov	w0, 40
 	strb	w0, [x29, 121]
@@ -6018,28 +6145,27 @@ FlashLoadPhyInfo:
 	strb	w0, [x29, 122]
 	mov	w0, 16
 	strb	w0, [x29, 123]
-	add	x0, x20, :lo12:.LANCHOR31
+	adrp	x20, .LANCHOR146
+	ldr	w0, [x21, #:lo12:.LANCHOR3]
+	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR146
 	adrp	x24, .LANCHOR148
-	stp	x25, x26, [sp, 64]
-	ldrh	w0, [x0, 10]
-	adrp	x26, .LANCHOR7
 	str	w0, [x29, 108]
-	mov	w19, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR147]
-	mov	w25, 4
-	str	x0, [x21, #:lo12:.LANCHOR146]
 	mov	w23, -1
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR31
+	str	x0, [x20, #:lo12:.LANCHOR146]
+	mov	w26, 4
 	stp	x27, x28, [sp, 80]
-	add	x26, x26, :lo12:.LANCHOR7
+	add	x25, x25, :lo12:.LANCHOR31
 	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L885:
+.L893:
 	add	w28, w19, 1
 	mov	x27, 0
-.L887:
+.L895:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
@@ -6049,85 +6175,86 @@ FlashLoadPhyInfo:
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L886
+	bne	.L894
 	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L886
+	bne	.L894
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L887
-.L888:
+	bne	.L895
+.L896:
 	ldr	w0, [x29, 108]
-	subs	w25, w25, #1
+	subs	w26, w26, #1
 	add	w19, w19, w0
-	bne	.L885
-	b	.L893
-.L889:
+	bne	.L893
+	b	.L901
+.L897:
 	mov	w1, 2036
 	add	x0, x6, 12
-	bl	JSHash
+	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L895
-	add	x23, x20, :lo12:.LANCHOR31
+	bne	.L903
 	add	x1, x6, 160
 	mov	w2, 32
-	mov	x0, x23
+	mov	x0, x25
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR146]
+	ldr	x1, [x20, #:lo12:.LANCHOR146]
 	mov	w2, 32
-	mov	x0, x26
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
 	add	x1, x1, 192
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR146]
+	ldr	x1, [x20, #:lo12:.LANCHOR146]
 	mov	w2, 852
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x1, x1, 224
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR30
+	ldrh	w0, [x25, 10]
+	bl	FlashBlockAlignInit
 	str	w19, [x24, #:lo12:.LANCHOR148]
+	ldr	x1, [x20, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR30
 	ldr	w2, [x1, 1076]
 	strb	w2, [x0, #:lo12:.LANCHOR30]
-	ldrh	w0, [x23, 10]
+	ldr	w0, [x21, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
-	add	w3, w0, 1
-	cbz	w0, .L891
-	str	w3, [x2, #:lo12:.LANCHOR149]
-.L892:
+	add	w0, w0, 1
+	cmp	w0, 1
+	bls	.L899
+.L906:
+	str	w0, [x2, #:lo12:.LANCHOR149]
 	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
 	strb	w1, [x0, #:lo12:.LANCHOR150]
-	b	.L888
-.L891:
+	b	.L896
+.L899:
 	mov	w0, 2
-	str	w0, [x2, #:lo12:.LANCHOR149]
-	b	.L892
-.L895:
+	b	.L906
+.L903:
 	mov	w23, -1
-	b	.L888
-.L886:
-	ldr	x6, [x21, #:lo12:.LANCHOR146]
+	b	.L896
+.L894:
+	ldr	x6, [x20, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L888
-	cbnz	w23, .L889
-	add	x20, x20, :lo12:.LANCHOR31
-	ldrh	w0, [x20, 10]
+	bne	.L896
+	cbnz	w23, .L897
+	ldr	w0, [x21, #:lo12:.LANCHOR3]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
 	str	w19, [x0, #:lo12:.LANCHOR149]
-.L893:
+.L901:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6162,9 +6289,9 @@ ToshibaReadRetrial:
 	add	x0, x0, :lo12:.LANCHOR6
 	add	x2, x0, x1
 	ldr	x22, [x0, x1]
-	adrp	x1, .LANCHOR11
+	adrp	x1, .LANCHOR10
 	ldrb	w27, [x2, 8]
-	ldrb	w0, [x1, #:lo12:.LANCHOR11]
+	ldrb	w0, [x1, #:lo12:.LANCHOR10]
 	str	x1, [x29, 112]
 	add	x19, x27, 8
 	sub	w0, w0, #67
@@ -6172,44 +6299,44 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L915
+	bls	.L924
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L916
+	cbz	w0, .L925
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L900:
+.L909:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L899:
+.L908:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L901:
+.L910:
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L910
+	bcc	.L919
 	mov	w28, w24
-.L909:
+.L918:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L911
+	bhi	.L920
 	bl	SandiskSetRRPara
-.L912:
+.L921:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
@@ -6219,17 +6346,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L913
+	bcc	.L922
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L913:
+.L922:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L898
+	cbz	w23, .L907
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L898:
+.L907:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6238,42 +6365,42 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L916:
+.L925:
 	mov	w23, 0
-	b	.L900
-.L915:
+	b	.L909
+.L924:
 	mov	w23, 0
-	b	.L899
-.L910:
+	b	.L908
+.L919:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L902
+	bhi	.L911
 	bl	SandiskSetRRPara
-.L903:
+.L912:
 	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
 	cmp	w0, 34
-	bne	.L904
+	bne	.L913
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L904
+	bne	.L913
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L904:
+.L913:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L905
+	cbz	w23, .L914
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6284,35 +6411,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L906:
+.L915:
 	cmn	w28, #1
-	beq	.L907
+	beq	.L916
 	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L909
+	bcc	.L918
 	mov	x26, 0
 	mov	x25, 0
-.L907:
+.L916:
 	add	w20, w20, 1
-	b	.L901
-.L902:
+	b	.L910
+.L911:
 	bl	ToshibaSetRRPara
-	b	.L903
-.L905:
+	b	.L912
+.L914:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L906
-.L911:
+	b	.L915
+.L920:
 	bl	ToshibaSetRRPara
-	b	.L912
+	b	.L921
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6346,12 +6473,12 @@ SamsungReadRetrial:
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L927:
+.L936:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L931
-.L930:
+	bcc	.L940
+.L939:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
@@ -6359,11 +6486,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L926
+	bcc	.L935
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L926:
+.L935:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6372,7 +6499,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L931:
+.L940:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6382,21 +6509,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L928
+	beq	.L937
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L933
+	bcc	.L942
 	mov	x25, 0
 	mov	x24, 0
-.L928:
+.L937:
 	add	w21, w21, 1
-	b	.L927
-.L933:
+	b	.L936
+.L942:
 	mov	w19, w0
-	b	.L930
+	b	.L939
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6412,23 +6539,23 @@ MicronReadRetrial:
 	str	w1, [x29, 140]
 	mov	x24, x2
 	ldrb	w19, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR8
+	adrp	x0, .LANCHOR15
 	stp	x25, x26, [sp, 64]
 	mov	x25, x3
-	ldrb	w1, [x0, #:lo12:.LANCHOR8]
+	ldrb	w1, [x0, #:lo12:.LANCHOR15]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 128]
-	cbnz	w1, .L941
+	cbnz	w1, .L950
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
-.L942:
+.L951:
 	adrp	x21, .LANCHOR6
 	add	x21, x21, :lo12:.LANCHOR6
 	add	x21, x21, x20, sxtw 4
 	mov	w23, 0
 	mov	w28, 137
-.L952:
+.L961:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldrb	w4, [x21, 8]
@@ -6438,11 +6565,11 @@ MicronReadRetrial:
 	mov	w22, 0
 	mov	w26, -1
 	add	x27, x8, x4, lsl 8
-.L943:
+.L952:
 	ldrb	w0, [x7]
 	cmp	w22, w0
-	bcc	.L947
-.L946:
+	bcc	.L956
+.L955:
 	add	x4, x8, x4, lsl 8
 	mov	w0, 239
 	str	x4, [x29, 120]
@@ -6456,14 +6583,14 @@ MicronReadRetrial:
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
-	bcc	.L948
+	bcc	.L957
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L948:
+.L957:
 	cmp	w26, 256
 	ccmn	w26, #1, 4, ne
-	bne	.L949
+	bne	.L958
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC13
 	mov	w4, w26
@@ -6471,22 +6598,22 @@ MicronReadRetrial:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-	cbnz	w23, .L950
+	cbnz	w23, .L959
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L940
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L949
 	cmn	w26, #1
-	bne	.L940
+	bne	.L949
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	micron_auto_read_calibration_config
-	b	.L952
-.L941:
+	b	.L961
+.L950:
 	mov	w0, 3
 	sdiv	w19, w19, w0
-	b	.L942
-.L947:
+	b	.L951
+.L956:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w28, [x27, 2052]
@@ -6509,29 +6636,29 @@ MicronReadRetrial:
 	ldr	w10, [x29, 120]
 	ldp	x4, x7, [x29, 96]
 	ldr	x8, [x29, 112]
-	beq	.L944
+	beq	.L953
 	cmn	w26, #1
 	csel	w26, w26, w0, ne
 	cmp	w0, w19
-	bcc	.L954
+	bcc	.L963
 	mov	x25, 0
 	mov	x24, 0
-.L944:
+.L953:
 	mov	w22, w10
-	b	.L943
-.L954:
+	b	.L952
+.L963:
 	mov	w26, w0
 	mov	x25, 0
 	mov	x24, 0
-	b	.L946
-.L950:
+	b	.L955
+.L959:
 	mov	w0, w20
 	mov	w1, 0
 	bl	micron_auto_read_calibration_config
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L940:
+.L949:
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6540,13 +6667,13 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L949:
-	cbz	w23, .L940
+.L958:
+	cbz	w23, .L949
 	mov	w1, 0
 	mov	w0, w20
 	mov	w26, 256
 	bl	micron_auto_read_calibration_config
-	b	.L940
+	b	.L949
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6555,58 +6682,62 @@ MicronReadRetrial:
 HynixReadRetrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w1
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR20
-	add	x1, x19, :lo12:.LANCHOR20
 	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR18
-	stp	x23, x24, [sp, 48]
 	and	x28, x0, 255
-	add	x0, x1, x28
-	mov	x23, x28
-	ldrb	w24, [x1, 2]
-	mov	x26, x2
-	ldr	x1, [x22, #:lo12:.LANCHOR18]
-	mov	x27, x3
-	ldrb	w20, [x0, 12]
-	ldrb	w1, [x1, 19]
-	cmp	w1, 7
-	bne	.L966
-	ldrb	w20, [x0, 20]
-.L966:
-	mov	w0, w23
+	add	x0, x19, :lo12:.LANCHOR20
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	mov	w22, w1
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR18
+	add	x1, x0, x28
+	mov	x20, x28
+	ldrb	w21, [x0, 2]
+	mov	x23, x2
+	ldr	x0, [x25, #:lo12:.LANCHOR18]
+	mov	x24, x3
+	ldrb	w26, [x1, 12]
+	ldrb	w0, [x0, 19]
+	sub	w0, w0, #7
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L975
+	ldrb	w26, [x1, 20]
+.L975:
+	mov	w0, w20
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
 	adrp	x5, .LANCHOR33
 	add	x7, x6, 4
 	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
-	mov	w21, -1
-.L967:
-	cmp	w4, w24
-	bcc	.L972
-.L971:
-	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	mov	w27, -1
+.L976:
+	cmp	w4, w21
+	bcc	.L981
+.L980:
+	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
-	cmp	w0, 7
-	bne	.L973
-	strb	w20, [x19, 20]
-.L974:
+	sub	w0, w0, #7
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L982
+	strb	w26, [x19, 20]
+.L983:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
-	cmp	w21, w0, lsr 2
-	bcc	.L965
-	cmn	w21, #1
+	cmp	w27, w0, lsr 2
+	bcc	.L974
+	cmn	w27, #1
 	mov	w0, 256
-	csel	w21, w21, w0, eq
-.L965:
-	mov	w0, w21
+	csel	w27, w27, w0, eq
+.L974:
+	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6614,46 +6745,46 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L972:
-	add	w20, w20, 1
+.L981:
+	add	w26, w26, 1
 	ldrb	w1, [x6, 1]
-	and	w20, w20, 255
+	and	w26, w26, 255
 	mov	x2, x7
-	cmp	w24, w20
+	cmp	w21, w26
 	str	x5, [x29, 96]
-	csel	w20, w20, wzr, hi
+	csel	w26, w26, wzr, hi
 	str	w4, [x29, 108]
 	stp	x7, x6, [x29, 112]
-	mov	w3, w20
-	mov	w0, w23
+	mov	w3, w26
+	mov	w0, w20
 	bl	HynixSetRRPara
-	mov	x3, x27
-	mov	x2, x26
-	mov	w1, w25
-	mov	w0, w23
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L969
+	beq	.L978
 	ldrb	w1, [x5]
-	cmn	w21, #1
-	csel	w21, w21, w0, ne
+	cmn	w27, #1
+	csel	w27, w27, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L976
-	mov	x27, 0
-	mov	x26, 0
-.L969:
+	bcc	.L985
+	mov	x24, 0
+	mov	x23, 0
+.L978:
 	add	w4, w4, 1
-	b	.L967
-.L976:
-	mov	w21, w0
-	b	.L971
-.L973:
-	strb	w20, [x19, 12]
-	b	.L974
+	b	.L976
+.L985:
+	mov	w27, w0
+	b	.L980
+.L982:
+	strb	w26, [x19, 12]
+	b	.L983
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6671,19 +6802,19 @@ FlashProgPage:
 	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L984
+	bne	.L993
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L984
+	bls	.L993
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L985
+	cbnz	w0, .L994
 	sub	w21, w21, #2
-.L984:
+.L993:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6714,9 +6845,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L985:
+.L994:
 	mov	w21, 4
-	b	.L984
+	b	.L993
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6798,7 +6929,7 @@ FlashSavePhyInfo:
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	mov	w1, 2036
 	add	x0, x6, 12
-	bl	JSHash
+	bl	js_hash
 	str	w0, [x6, 8]
 	mov	w0, 1592
 	str	w0, [x6, 4]
@@ -6806,7 +6937,7 @@ FlashSavePhyInfo:
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L990:
+.L999:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6833,30 +6964,30 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L988
+	beq	.L997
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L988
+	bne	.L997
 	mov	w1, 2036
 	add	x0, x6, 12
-	bl	JSHash
+	bl	js_hash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L988
+	bne	.L997
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
 	adrp	x0, .LANCHOR148
 	str	w20, [x0, #:lo12:.LANCHOR148]
-	beq	.L991
+	beq	.L1000
 	mov	w23, 1
-.L988:
+.L997:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L990
-.L989:
+	bne	.L999
+.L998:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6867,9 +6998,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L991:
+.L1000:
 	mov	w23, 2
-	b	.L989
+	b	.L998
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6877,8 +7008,6 @@ FlashSavePhyInfo:
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
 	stp	x29, x30, [sp, -144]!
-	mov	w1, 12336
-	movk	w1, 0x5638, lsl 16
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	x23, x0
@@ -6896,14 +7025,13 @@ FlashReadIdbDataRaw:
 	ldrb	w26, [x0, #:lo12:.LANCHOR33]
 	adrp	x0, .LANCHOR29
 	stp	x21, x22, [sp, 32]
-	ldr	w2, [x0, #:lo12:.LANCHOR29]
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
-	cmp	w2, w1
-	bne	.L998
+	cbz	w1, .L1007
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L998:
+.L1007:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6915,22 +7043,19 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L999:
+.L1008:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L1004
-.L1003:
+	bcc	.L1013
+.L1012:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
-	mov	w0, 12336
-	movk	w0, 0x5638, lsl 16
-	cmp	w1, w0
-	bne	.L997
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L1006
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L997:
+.L1006:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6939,10 +7064,10 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1004:
+.L1013:
 	mov	x4, 0
 	adrp	x25, .LANCHOR147
-.L1001:
+.L1010:
 	ldrb	w5, [x4, x27]
 	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
@@ -6957,24 +7082,24 @@ FlashReadIdbDataRaw:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L1000
+	bne	.L1009
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L1001
-.L1002:
+	bne	.L1010
+.L1011:
 	add	w19, w19, 1
-	b	.L999
-.L1007:
+	b	.L1008
+.L1016:
 	mov	w20, 0
-	b	.L1003
-.L1000:
+	b	.L1012
+.L1009:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L1002
+	bne	.L1011
 	mov	w1, w5
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
@@ -6989,11 +7114,11 @@ FlashReadIdbDataRaw:
 	adrp	x0, .LANCHOR149
 	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L1007
+	bcs	.L1016
 	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L1002
+	b	.L1011
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -7001,69 +7126,72 @@ FlashReadIdbDataRaw:
 	.type	FlashPageProgMsbFFData, %function
 FlashPageProgMsbFFData:
 	stp	x29, x30, [sp, -80]!
-	adrp	x3, .LANCHOR8
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
-	and	w19, w2, 65535
-	adrp	x2, .LANCHOR18
 	stp	x21, x22, [sp, 32]
-	ldrb	w3, [x3, #:lo12:.LANCHOR8]
-	and	w21, w0, 255
-	ldr	x0, [x2, #:lo12:.LANCHOR18]
-	mov	x22, x2
-	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-	ldrb	w0, [x0, 19]
-	cbz	w3, .L1011
-	adrp	x2, .LANCHOR29
-	ldr	w3, [x2, #:lo12:.LANCHOR29]
-	mov	w2, 12336
-	movk	w2, 0x5638, lsl 16
-	cmp	w3, w2
-	beq	.L1010
-.L1011:
-	sub	w0, w0, #5
-	and	w0, w0, 255
-	cmp	w0, 63
-	bhi	.L1010
-	mov	x2, 16391
+	and	w19, w2, 65535
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	stp	x25, x26, [sp, 64]
+	cbz	w0, .L1026
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cbnz	w0, .L1025
+.L1026:
+	adrp	x2, .LANCHOR18
+	mov	x25, x2
+	ldr	x0, [x2, #:lo12:.LANCHOR18]
+	ldrb	w23, [x0, 19]
+	sub	w0, w23, #5
+	and	w3, w0, 255
+	cmp	w3, 63
+	bhi	.L1025
+	mov	x2, 16399
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
-	lsr	x0, x2, x0
-	tbz	x0, 0, .L1010
+	lsr	x0, x2, x3
+	tbz	x0, 0, .L1025
 	adrp	x20, .LANCHOR120
-	mov	w24, w1
+	mov	w22, w1
 	add	x20, x20, :lo12:.LANCHOR120
-	mov	w23, 65535
-	adrp	x25, .LANCHOR153
-.L1013:
-	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	mov	w26, 65535
+	adrp	x21, .LANCHOR153
+.L1028:
+	ldr	x0, [x25, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L1014
-.L1010:
+	bhi	.L1031
+.L1025:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1014:
+.L1031:
 	ldrh	w0, [x20, w19, sxtw 1]
-	cmp	w0, w23
-	bne	.L1010
-	ldr	x0, [x25, #:lo12:.LANCHOR153]
+	cmp	w0, w26
+	bne	.L1025
 	mov	w2, 32768
-	mov	w1, 255
+	cmp	w23, 8
+	bne	.L1029
+	mov	w1, 0
+.L1036:
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	bl	ftl_memset
-	ldr	x2, [x25, #:lo12:.LANCHOR153]
-	add	w1, w19, w24
+	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	add	w1, w19, w22
 	add	w19, w19, 1
-	mov	x3, 0
-	mov	w0, w21
+	mov	w0, w24
+	mov	x2, x3
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L1013
+	b	.L1028
+.L1029:
+	mov	w1, 255
+	b	.L1036
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -7080,16 +7208,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1020
+	bls	.L1038
 	cmp	w1, 575
-	bhi	.L1021
+	bhi	.L1039
 	adrp	x0, .LANCHOR154
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
 	str	w2, [x0, #:lo12:.LANCHOR154]
 	adrp	x0, idb_buf
-	bhi	.L1022
+	bhi	.L1040
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -7097,9 +7225,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1072:
+.L1090:
 	bl	ftl_memcpy
-.L1055:
+.L1073:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7108,7 +7236,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1022:
+.L1040:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -7118,15 +7246,15 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1072
-.L1020:
+	b	.L1090
+.L1038:
 	cmp	w1, 575
-	bls	.L1055
-.L1021:
+	bls	.L1073
+.L1039:
 	adrp	x0, .LANCHOR154
-	str	x0, [x29, 112]
+	str	x0, [x29, 104]
 	ldr	w1, [x0, #:lo12:.LANCHOR154]
-	cbz	w1, .L1055
+	cbz	w1, .L1073
 	adrp	x21, .LANCHOR18
 	adrp	x1, idb_buf+262140
 	adrp	x25, idb_buf
@@ -7143,9 +7271,9 @@ idb_write_data:
 	udiv	w0, w0, w20
 	str	w0, [x29, 172]
 	mov	w0, 0
-.L1026:
+.L1044:
 	ldr	w4, [x1]
-	cbnz	w4, .L1024
+	cbnz	w4, .L1042
 	ldr	w4, [x5, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1], -4
@@ -7153,8 +7281,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1026
-.L1024:
+	bne	.L1044
+.L1042:
 	add	x0, x25, :lo12:idb_buf
 	mov	w3, 512
 	mov	w23, 0
@@ -7167,23 +7295,23 @@ idb_write_data:
 	ldr	w0, [x29, 172]
 	mul	w19, w20, w24
 	mul	w0, w20, w0
-	str	w0, [x29, 120]
+	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 160]
-.L1027:
+.L1045:
 	cmp	w24, 15
-	bls	.L1045
-	cbnz	w23, .L1047
+	bls	.L1063
+	cbnz	w23, .L1065
 	adrp	x0, .LC17
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC17
 	bl	printf
-.L1047:
-	ldr	x0, [x29, 112]
+.L1065:
+	ldr	x0, [x29, 104]
 	str	wzr, [x0, #:lo12:.LANCHOR154]
-	b	.L1055
-.L1045:
+	b	.L1073
+.L1063:
 	adrp	x27, gp_flash_check_buf
 	mov	x2, 512
 	mov	w1, 0
@@ -7194,98 +7322,104 @@ idb_write_data:
 	ldrh	w26, [x0, 10]
 	mov	w0, w19
 	bl	FW_FlashBlockErase.constprop.41
-	str	x27, [x29, 136]
+	str	x27, [x29, 128]
 	mul	w26, w22, w26
 	and	w26, w26, 65535
 	cmp	w26, 511
-	bhi	.L1028
+	bhi	.L1046
 	add	w0, w26, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1028:
+.L1046:
 	udiv	w4, w19, w26
-	adrp	x5, .LANCHOR8
-	add	x5, x5, :lo12:.LANCHOR8
+	adrp	x5, .LANCHOR15
+	add	x5, x5, :lo12:.LANCHOR15
 	mov	x28, 0
 	msub	w4, w4, w26, w19
 	sub	w26, w19, w4
-.L1029:
-	add	x6, x25, :lo12:idb_buf
+.L1047:
+	add	x2, x25, :lo12:idb_buf
 	cmp	x28, 128
-	add	x6, x6, x28, lsl 11
-	bne	.L1033
+	add	x2, x2, x28, lsl 11
+	bne	.L1051
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
 	mov	w26, 0
-	ldr	x1, [x29, 136]
+	ldr	x1, [x29, 128]
 	add	x27, x1, :lo12:gp_flash_check_buf
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	ldrb	w28, [x0, 9]
-	add	x1, x1, :lo12:.LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR15
 	ldrh	w22, [x0, 10]
-	str	x1, [x29, 104]
+	str	x1, [x29, 96]
 	mul	w22, w28, w22
 	and	w0, w22, 65535
 	udiv	w22, w19, w0
 	msub	w22, w22, w0, w19
 	sub	w0, w19, w22
-	str	w0, [x29, 128]
+	str	w0, [x29, 120]
 	mul	w0, w22, w28
 	ubfx	x0, x0, 2, 2
-.L1034:
+.L1052:
 	cmp	w26, 511
-	bhi	.L1041
-	ldr	x3, [x29, 104]
+	bhi	.L1059
+	ldr	x3, [x29, 96]
 	mov	w1, 4
 	sub	w1, w1, w0
-	add	w2, w22, w26
+	ldr	x2, [x29, 160]
 	and	w1, w1, 65535
 	str	w1, [x29, 144]
-	ldr	x1, [x29, 160]
-	lsr	w2, w2, 2
+	add	w1, w22, w26
 	ldrb	w3, [x3]
-	ldrh	w1, [x1, w2, sxtw 1]
-	cbz	w3, .L1035
-	adrp	x3, .LANCHOR29
+	lsr	w1, w1, 2
+	ldrh	w2, [x2, w1, sxtw 1]
+	cbz	w3, .L1053
+	adrp	x3, .LANCHOR119
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
-	ldr	w3, [x3, #:lo12:.LANCHOR29]
+	ldr	w3, [x3, #:lo12:.LANCHOR119]
 	cmp	w3, w4
-	csel	w1, w1, w2, ne
-.L1035:
-	ldr	w2, [x29, 128]
-	add	w0, w0, w2
-	madd	w3, w28, w1, w0
-	adrp	x0, .LANCHOR33
+	csel	w2, w2, w1, ne
+.L1053:
+	ldr	w1, [x29, 120]
+	add	w0, w0, w1
 	adrp	x1, .LANCHOR3
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	madd	w0, w28, w2, w0
+	str	w0, [x29, 168]
+	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
-	str	w0, [x29, 124]
+	str	w0, [x29, 112]
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
-	ldr	w1, [x1, #:lo12:.LANCHOR3]
-	ldrb	w4, [x0, 9]
-	adrp	x0, .LANCHOR15+26
-	ldrh	w0, [x0, #:lo12:.LANCHOR15+26]
+	ldrb	w0, [x0, 9]
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR14+26
+	ldrh	w0, [x0, #:lo12:.LANCHOR14+26]
 	mul	w0, w0, w1
-	mul	w0, w0, w4
-	cmp	w3, w0
-	bcs	.L1036
+	ldr	w1, [x29, 140]
+	mul	w0, w0, w1
+	ldr	w1, [x29, 168]
+	cmp	w1, w0
+	bcs	.L1054
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	bl	FlashBchSel
-.L1036:
+.L1054:
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
-	udiv	w1, w3, w4
+	ldr	w0, [x29, 168]
 	add	x3, x29, 176
+	ldr	w1, [x29, 140]
 	mov	x2, x27
+	udiv	w1, w0, w1
 	mov	w0, 0
 	str	w1, [x29, 168]
 	bl	FlashReadPage
-	mov	w3, w0
+	mov	w1, w0
 	cmn	w0, #1
-	bne	.L1037
+	bne	.L1055
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	cmp	w0, 40
-	beq	.L1037
+	beq	.L1055
 	mov	w0, 40
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
@@ -7293,27 +7427,29 @@ idb_write_data:
 	mov	x2, x27
 	mov	w0, 0
 	bl	FlashReadPage
-	mov	w3, w0
-.L1037:
+	mov	w1, w0
+.L1055:
+	str	w1, [x29, 168]
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
-	ldrb	w0, [x29, 124]
+	ldrb	w0, [x29, 112]
 	bl	FlashBchSel
-	cmn	w3, #1
-	bne	.L1038
-.L1041:
-	ldr	x0, [x29, 136]
+	ldr	w1, [x29, 168]
+	cmn	w1, #1
+	bne	.L1056
+.L1059:
+	ldr	x0, [x29, 128]
 	add	x1, x25, :lo12:idb_buf
 	mov	x22, 0
 	add	x26, x0, :lo12:gp_flash_check_buf
-.L1039:
+.L1057:
 	lsl	x0, x22, 2
 	mov	w27, w22
 	add	x28, x0, x1
 	ldr	w2, [x0, x26]
 	ldr	w0, [x0, x1]
 	cmp	w2, w0
-	beq	.L1042
+	beq	.L1060
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x26
@@ -7329,80 +7465,81 @@ idb_write_data:
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	w0, [x29, 172]
 	cmp	w0, 1
-	bls	.L1043
+	bls	.L1061
 	add	w0, w20, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1043:
+.L1061:
 	ldr	w0, [x29, 172]
 	add	w24, w24, w0
-	ldr	w0, [x29, 120]
+	ldr	w0, [x29, 136]
 	add	w19, w19, w0
-	b	.L1027
-.L1033:
+	b	.L1045
+.L1051:
 	add	w1, w4, w28, lsl 2
 	lsr	w1, w1, 2
-	cbz	w1, .L1030
+	cbz	w1, .L1048
 	ldr	x0, [x29, 160]
-	add	w2, w1, 1
-	ldrb	w3, [x5]
-	ldrh	w0, [x0, w2, sxtw 1]
-	cbz	w3, .L1031
-	adrp	x3, .LANCHOR29
+	add	w3, w1, 1
+	ldrb	w6, [x5]
+	ldrh	w0, [x0, w3, sxtw 1]
+	cbz	w6, .L1049
+	adrp	x6, .LANCHOR119
 	mov	w7, 12336
 	movk	w7, 0x5638, lsl 16
-	ldr	w3, [x3, #:lo12:.LANCHOR29]
-	cmp	w3, w7
-	csel	w0, w0, w2, ne
-.L1031:
+	ldr	w6, [x6, #:lo12:.LANCHOR119]
+	cmp	w6, w7
+	csel	w0, w0, w3, ne
+.L1049:
 	lsl	w0, w0, 2
 	sub	w0, w0, #4
 	str	w0, [x29, 176]
-.L1030:
+.L1048:
 	mov	w0, 61424
 	str	w0, [x29, 180]
 	ldr	x0, [x29, 160]
 	ldrh	w27, [x0, w1, sxtw 1]
 	ldrb	w0, [x5]
-	cbz	w0, .L1032
-	adrp	x0, .LANCHOR29
-	mov	w2, 12336
-	movk	w2, 0x5638, lsl 16
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cmp	w0, w2
+	cbz	w0, .L1050
+	adrp	x0, .LANCHOR119
+	mov	w3, 12336
+	movk	w3, 0x5638, lsl 16
+	ldr	w0, [x0, #:lo12:.LANCHOR119]
+	cmp	w0, w3
 	csel	w27, w27, w1, ne
-.L1032:
+.L1050:
 	adrp	x0, .LANCHOR33
-	madd	w8, w22, w27, w26
-	str	x5, [x29, 128]
+	madd	w1, w22, w27, w26
+	stp	x5, x2, [x29, 112]
 	add	x28, x28, 1
-	ldrb	w7, [x0, #:lo12:.LANCHOR33]
+	ldrb	w6, [x0, #:lo12:.LANCHOR33]
 	adrp	x0, .LANCHOR152
-	str	w4, [x29, 168]
+	stp	w4, w6, [x29, 140]
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
-	str	w7, [x29, 144]
+	str	w1, [x29, 168]
 	bl	FlashBchSel
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
-	mov	x2, x6
 	add	x3, x29, 176
-	ldrb	w1, [x0, 9]
+	ldr	w1, [x29, 168]
+	ldr	x2, [x29, 120]
+	ldrb	w0, [x0, 9]
+	udiv	w1, w1, w0
 	mov	w0, 0
-	udiv	w1, w8, w1
 	bl	FlashProgPage
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
-	ldr	w7, [x29, 144]
-	mov	w0, w7
+	ldr	w6, [x29, 144]
+	mov	w0, w6
 	bl	FlashBchSel
 	udiv	w1, w26, w22
 	add	w2, w27, 1
 	mov	w0, 0
 	bl	FlashPageProgMsbFFData
-	ldr	w4, [x29, 168]
-	ldr	x5, [x29, 128]
-	b	.L1029
-.L1038:
+	ldr	w4, [x29, 140]
+	ldr	x5, [x29, 112]
+	b	.L1047
+.L1056:
 	ldr	x0, [x29, 144]
 	ubfiz	x0, x0, 9, 16
 	add	x27, x27, x0
@@ -7410,15 +7547,15 @@ idb_write_data:
 	add	w26, w0, w26
 	mov	w0, 0
 	and	w26, w26, 65535
-	b	.L1034
-.L1042:
+	b	.L1052
+.L1060:
 	add	x22, x22, 1
 	cmp	x22, 65536
-	bne	.L1039
+	bne	.L1057
 	add	w23, w23, 1
 	cmp	w23, 5
-	bls	.L1043
-	b	.L1047
+	bls	.L1061
+	b	.L1065
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7454,7 +7591,7 @@ NandcInit:
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR6
 	add	x1, x2, :lo12:.LANCHOR6
-	adrp	x4, .LANCHOR29
+	adrp	x4, .LANCHOR119
 	add	x29, sp, 0
 	str	x0, [x2, #:lo12:.LANCHOR6]
 	mov	w2, 1
@@ -7480,12 +7617,12 @@ NandcInit:
 	ubfx	x2, x2, 16, 4
 	str	w2, [x3, #:lo12:.LANCHOR34]
 	ldr	w2, [x0, 352]
-	str	w2, [x4, #:lo12:.LANCHOR29]
+	str	w2, [x4, #:lo12:.LANCHOR119]
 	cmp	w2, 2049
-	bne	.L1077
+	bne	.L1095
 	mov	w2, 8
 	str	w2, [x3, #:lo12:.LANCHOR34]
-.L1077:
+.L1095:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -7522,7 +7659,7 @@ FtlMemInit:
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
 	adrp	x0, .LANCHOR157
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR55
+	adrp	x19, .LANCHOR54
 	str	wzr, [x0, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR158
 	stp	x21, x22, [sp, 32]
@@ -7530,10 +7667,10 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR159
 	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR58
+	adrp	x21, .LANCHOR57
 	str	wzr, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR160
-	adrp	x23, .LANCHOR59
+	adrp	x23, .LANCHOR58
 	str	wzr, [x0, #:lo12:.LANCHOR160]
 	adrp	x0, .LANCHOR161
 	str	wzr, [x0, #:lo12:.LANCHOR161]
@@ -7551,8 +7688,8 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR168
 	str	wzr, [x0, #:lo12:.LANCHOR168]
-	adrp	x0, .LANCHOR80
-	str	wzr, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR79
+	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR169
 	str	wzr, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR170
@@ -7564,20 +7701,20 @@ FtlMemInit:
 	adrp	x0, .LANCHOR173
 	str	w1, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR174
-	adrp	x1, .LANCHOR113
+	adrp	x1, .LANCHOR112
 	str	wzr, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR175
 	str	wzr, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR74
-	str	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
 	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR113
 	strh	w0, [x1, #:lo12:.LANCHOR113]
 	adrp	x1, .LANCHOR114
 	strh	w0, [x1, #:lo12:.LANCHOR114]
 	adrp	x1, .LANCHOR115
 	strh	w0, [x1, #:lo12:.LANCHOR115]
-	adrp	x1, .LANCHOR116
-	strh	w0, [x1, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR176
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR176]
@@ -7586,24 +7723,24 @@ FtlMemInit:
 	strh	w1, [x0, #:lo12:.LANCHOR177]
 	adrp	x0, .LANCHOR178
 	strh	wzr, [x0, #:lo12:.LANCHOR178]
-	adrp	x0, .LANCHOR117
-	strh	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR116
+	strh	wzr, [x0, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR179
 	strh	wzr, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LANCHOR119
-	strh	wzr, [x0, #:lo12:.LANCHOR119]
-	ldrh	w0, [x19, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR118
+	strh	wzr, [x0, #:lo12:.LANCHOR118]
+	ldrh	w0, [x19, #:lo12:.LANCHOR54]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR110
-	str	x0, [x1, #:lo12:.LANCHOR110]
+	adrp	x1, .LANCHOR109
+	str	x0, [x1, #:lo12:.LANCHOR109]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR55]
+	ldrh	w1, [x19, #:lo12:.LANCHOR54]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	ldrh	w19, [x22, #:lo12:.LANCHOR38]
-	adrp	x1, .LANCHOR112
-	str	x0, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
 	mov	w0, 56
 	mul	w19, w19, w0
 	lsl	w20, w19, 2
@@ -7617,22 +7754,22 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR181]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR108
+	adrp	x20, .LANCHOR107
 	adrp	x1, .LANCHOR182
 	str	x0, [x1, #:lo12:.LANCHOR182]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR78
-	str	x0, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR77]
 	mov	w0, w19
 	bl	ftl_malloc
-	ldrh	w19, [x21, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR107
-	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldrh	w19, [x21, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
 	ldrh	w0, [x22, #:lo12:.LANCHOR38]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR108]
+	str	w0, [x20, #:lo12:.LANCHOR107]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR183
@@ -7645,11 +7782,11 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR185
 	str	x0, [x1, #:lo12:.LANCHOR185]
-	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR105
-	str	x0, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR186
@@ -7659,14 +7796,14 @@ FtlMemInit:
 	adrp	x1, .LANCHOR187
 	str	x0, [x1, #:lo12:.LANCHOR187]
 	mov	w0, 24
-	ldr	w1, [x20, #:lo12:.LANCHOR108]
+	ldr	w1, [x20, #:lo12:.LANCHOR107]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x23, #:lo12:.LANCHOR59]
-	adrp	x1, .LANCHOR104
-	str	x0, [x1, #:lo12:.LANCHOR104]
+	ldrh	w19, [x23, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR103
+	str	x0, [x1, #:lo12:.LANCHOR103]
 	ldrh	w0, [x22, #:lo12:.LANCHOR38]
-	adrp	x22, .LANCHOR65
+	adrp	x22, .LANCHOR64
 	mul	w19, w19, w0
 	mov	w0, w19
 	bl	ftl_malloc
@@ -7677,13 +7814,13 @@ FtlMemInit:
 	adrp	x19, .LANCHOR41
 	adrp	x1, .LANCHOR189
 	str	x0, [x1, #:lo12:.LANCHOR189]
-	ldrh	w1, [x23, #:lo12:.LANCHOR59]
-	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	ldrh	w1, [x23, #:lo12:.LANCHOR58]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
 	adrp	x20, .LANCHOR190
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR106
-	str	x0, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
 	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x20, #:lo12:.LANCHOR190]
@@ -7699,15 +7836,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR191
 	str	x0, [x1, #:lo12:.LANCHOR191]
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR78
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR79]
+	str	x0, [x1, #:lo12:.LANCHOR78]
 	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR84
-	str	x0, [x1, #:lo12:.LANCHOR84]
+	ldr	w20, [x22, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR83]
 	lsl	w20, w20, 1
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7715,7 +7852,7 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR129]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR62
+	adrp	x20, .LANCHOR61
 	adrp	x1, .LANCHOR125
 	str	x0, [x1, #:lo12:.LANCHOR125]
 	ldrh	w0, [x19, #:lo12:.LANCHOR41]
@@ -7724,33 +7861,33 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR72
-	str	x0, [x1, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR71
+	str	x0, [x1, #:lo12:.LANCHOR71]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR192
 	str	x0, [x1, #:lo12:.LANCHOR192]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
-	adrp	x20, .LANCHOR63
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	adrp	x20, .LANCHOR62
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR193
 	str	x0, [x1, #:lo12:.LANCHOR193]
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR63]
+	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	adrp	x1, .LANCHOR194
 	str	x0, [x1, #:lo12:.LANCHOR194]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR67
-	ldrh	w20, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR66
+	ldrh	w20, [x0, #:lo12:.LANCHOR66]
 	lsl	w20, w20, 2
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7758,22 +7895,22 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR131]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR68
+	adrp	x20, .LANCHOR67
 	adrp	x1, .LANCHOR195
 	str	x0, [x1, #:lo12:.LANCHOR195]
-	ldr	w0, [x22, #:lo12:.LANCHOR65]
+	ldr	w0, [x22, #:lo12:.LANCHOR64]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR130
 	str	x0, [x1, #:lo12:.LANCHOR130]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	ldrh	w0, [x20, #:lo12:.LANCHOR67]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR97
-	str	x0, [x1, #:lo12:.LANCHOR97]
-	ldrh	w1, [x20, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR96
+	str	x0, [x1, #:lo12:.LANCHOR96]
+	ldrh	w1, [x20, #:lo12:.LANCHOR67]
 	adrp	x20, .LANCHOR45
-	ldrh	w0, [x21, #:lo12:.LANCHOR58]
+	ldrh	w0, [x21, #:lo12:.LANCHOR57]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR126
@@ -7783,8 +7920,8 @@ FtlMemInit:
 	adrp	x19, .LANCHOR123
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR82
-	str	x0, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR81
+	str	x0, [x1, #:lo12:.LANCHOR81]
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
@@ -7794,44 +7931,44 @@ FtlMemInit:
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR74
 	ldrh	w5, [x19, #:lo12:.LANCHOR123]
-	add	x2, x1, :lo12:.LANCHOR75
+	add	x2, x1, :lo12:.LANCHOR74
 	ldrh	w7, [x20, #:lo12:.LANCHOR45]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L1080:
+.L1098:
 	cmp	w0, w7
-	bcc	.L1081
+	bcc	.L1099
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR74
 	mov	x3, 0
-.L1082:
+.L1100:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L1083
+	bne	.L1101
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1081:
+.L1099:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L1080
-.L1083:
+	b	.L1098
+.L1101:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L1082
+	b	.L1100
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7892,8 +8029,8 @@ rk_nand_de_init:
 	.global	rk_ftl_get_capacity
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7919,9 +8056,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC20
-.L1093:
+.L1111:
 	cmp	x25, x19
-	bne	.L1099
+	bne	.L1117
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
@@ -7933,38 +8070,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1099:
-	cbnz	w20, .L1094
+.L1117:
+	cbnz	w20, .L1112
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1094:
+.L1112:
 	cmp	w24, 4
-	bne	.L1095
+	bne	.L1113
 	ldr	w1, [x22, x19, lsl 2]
-.L1101:
+.L1119:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1098
+	bls	.L1116
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC20
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1098:
+.L1116:
 	add	x19, x19, 1
-	b	.L1093
-.L1095:
+	b	.L1111
+.L1113:
 	cmp	w24, 2
-	bne	.L1097
+	bne	.L1115
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1101
-.L1097:
+	b	.L1119
+.L1115:
 	ldrb	w1, [x22, x19]
-	b	.L1101
+	b	.L1119
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7991,18 +8128,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1103
+	bne	.L1121
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR196+17]
-.L1159:
+.L1186:
 	mov	w27, 7
-	b	.L1194
-.L1103:
+	b	.L1230
+.L1121:
 	cmp	w26, 3
-	bne	.L1105
+	bne	.L1123
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8018,14 +8155,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1195:
+.L1229:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1104:
+.L1122:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1109
+	bhi	.L1128
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -8033,11 +8170,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1110:
+.L1129:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1116
-.L1117:
+	bhi	.L1135
+.L1136:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -8048,9 +8185,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1105:
+.L1123:
 	cmp	w26, 4
-	bne	.L1106
+	bne	.L1124
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -8063,10 +8200,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1195
-.L1106:
+	b	.L1229
+.L1124:
 	cmp	w26, 5
-	bne	.L1107
+	bne	.L1125
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -8076,12 +8213,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1194:
+.L1230:
 	mov	w28, 4
-	b	.L1104
-.L1107:
+	b	.L1122
+.L1125:
 	cmp	w26, 6
-	bne	.L1108
+	bne	.L1126
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -8091,10 +8228,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1194
-.L1108:
+	b	.L1230
+.L1126:
 	cmp	w26, 7
-	bne	.L1159
+	bne	.L1127
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8117,8 +8254,23 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1104
-.L1116:
+	b	.L1122
+.L1127:
+	cmp	w26, 8
+	bne	.L1186
+	mov	w1, 6
+	strb	w1, [x0, 4]
+	mov	w1, 7
+	strb	w1, [x0, 5]
+	mov	w1, 9
+	strb	w26, [x0, 6]
+	strb	w1, [x0, 7]
+	mov	w27, 50
+	mov	w1, 10
+	mov	w28, 5
+	strb	w1, [x0, 8]
+	b	.L1122
+.L1135:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -8132,7 +8284,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1111:
+.L1130:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -8147,15 +8299,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1111
+	bhi	.L1130
 	adrp	x2, .LANCHOR196
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1114:
+.L1133:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1113:
+.L1132:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -8164,10 +8316,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1113
+	bne	.L1132
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1114
+	bne	.L1133
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8177,32 +8329,32 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1110
-.L1109:
+	b	.L1129
+.L1128:
 	sub	w0, w26, #3
-	cmp	w0, 4
-	bhi	.L1117
+	cmp	w0, 5
+	bhi	.L1136
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
 	mov	w21, 0
 	and	x22, x22, 255
 	lsl	w0, w24, 4
-	asr	w23, w24, 2
+	asr	w23, w24, 1
 	str	w0, [x29, 128]
 	lsl	w0, w23, 1
-	sbfiz	x24, x23, 2, 32
+	sbfiz	x24, x23, 1, 32
 	str	w0, [x29, 140]
 	add	x0, x25, :lo12:.LANCHOR25
 	sub	w25, w26, #5
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1118:
+.L1137:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1117
+	bls	.L1136
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -8217,40 +8369,44 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
-	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1119
-	ubfiz	x0, x22, 6, 8
-	add	x0, x0, 20
-.L1196:
-	add	x3, x1, x0
+	bne	.L1138
+	mov	x1, 28
+	mov	w0, 160
+	add	x3, x20, :lo12:.LANCHOR20
+	umaddl	x0, w0, w22, x1
+.L1231:
+	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1121
+	bne	.L1141
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1197:
+.L1232:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1198
-.L1119:
-	mov	x3, 28
-	mov	w0, 160
-	umaddl	x0, w0, w22, x3
-	b	.L1196
-.L1121:
+	b	.L1233
+.L1138:
+	cmp	w26, 8
+	beq	.L1140
+	ubfiz	x0, x22, 6, 8
+	add	x3, x20, :lo12:.LANCHOR20
+	add	x0, x0, 20
+	b	.L1231
+.L1141:
 	cmp	w25, 1
-	bhi	.L1123
+	bhi	.L1143
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1198:
+.L1233:
 	str	w0, [x19, 2048]
+.L1142:
 	mov	w0, 22
 	str	w0, [x19, 2056]
 	mov	w0, 23
@@ -8259,139 +8415,144 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, 25
 	str	w0, [x19, 2056]
-	cmp	w26, 6
 	str	wzr, [x19, 2056]
+	cmp	w26, 6
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1124
+	bne	.L1144
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1125:
-	mov	w7, 2
-	str	w7, [x19, 2052]
+.L1145:
+	mov	w0, 2
+	str	w0, [x19, 2052]
 	str	wzr, [x19, 2052]
+.L1185:
 	mov	w0, 48
 	str	w0, [x19, 2056]
-	mov	w0, w22
 	str	x3, [x29, 104]
-	str	w7, [x29, 136]
+	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1160
-	ldr	w7, [x29, 136]
+	ccmp	w26, 8, 4, hi
+	beq	.L1187
 	cmp	w26, 7
+	mov	w0, 2
 	mov	w1, 32
-	csel	w1, w1, w7, eq
-.L1126:
+	csel	w1, w1, w0, eq
+.L1146:
 	adrp	x8, .LANCHOR147
 	mov	x7, 0
 	ldr	x0, [x8, #:lo12:.LANCHOR147]
-.L1127:
+.L1147:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1127
-	cmp	w26, 7
-	bne	.L1128
+	bhi	.L1147
+	cmp	w26, 8
+	bne	.L1148
 	mov	w1, 0
-.L1130:
+.L1150:
 	ldrb	w7, [x0]
-	cmp	w7, 12
-	beq	.L1129
+	cmp	w7, 50
+	beq	.L1149
 	ldrb	w7, [x0, 1]
-	cmp	w7, 10
-	beq	.L1129
+	cmp	w7, 5
+	beq	.L1149
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1130
-.L1131:
+	bne	.L1150
+.L1151:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1133:
-	b	.L1133
-.L1123:
+.L1153:
+	b	.L1153
+.L1143:
+	cmp	w26, 7
+	bne	.L1142
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1197
-.L1124:
+	b	.L1232
+.L1144:
 	str	wzr, [x19, 2052]
-	b	.L1125
-.L1160:
+	b	.L1145
+.L1187:
 	mov	w1, 16
-	b	.L1126
-.L1129:
+	b	.L1146
+.L1149:
 	cmp	w1, 6
-	bhi	.L1131
-.L1132:
+	bhi	.L1151
+.L1152:
 	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1137:
+.L1162:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1138
+	bgt	.L1163
 	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1140:
+.L1165:
 	mov	x0, 0
-.L1139:
-	ldr	w11, [x8, x0, lsl 2]
+.L1164:
+	ldrh	w11, [x8, x0, lsl 1]
 	mvn	w11, w11
-	str	w11, [x8, x0, lsl 2]
+	strh	w11, [x8, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1139
+	bgt	.L1164
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
-	add	x8, x8, x0, uxtw 2
-	bne	.L1140
-	mov	x11, x1
-	mov	w12, 0
+	add	x8, x8, x0, uxtw 1
+	bne	.L1165
+	mov	x10, x1
+	mov	w11, 0
 	mov	w16, 1
-.L1146:
-	mov	w8, 0
+.L1171:
 	mov	w0, 0
-.L1145:
-	mov	x15, x11
-	lsl	w10, w16, w0
-	mov	w14, 16
-	mov	w13, 0
-.L1143:
-	ldr	w17, [x15]
-	add	x15, x15, x24
-	bics	wzr, w10, w17
-	cinc	w13, w13, eq
-	subs	w14, w14, #1
-	bne	.L1143
-	cmp	w13, 9
-	orr	w10, w8, w10
-	add	w0, w0, 1
-	csel	w8, w10, w8, cs
-	cmp	w0, 32
-	bne	.L1145
-	str	w8, [x11], 4
-	add	w12, w12, 1
-	cmp	w23, w12
-	bgt	.L1146
+	mov	w8, 0
+.L1170:
+	mov	x14, x10
+	lsl	w15, w16, w8
+	mov	w13, 16
+	mov	w12, 0
+.L1168:
+	ldrh	w17, [x14]
+	add	x14, x14, x24
+	bics	wzr, w15, w17
+	cinc	w12, w12, eq
+	subs	w13, w13, #1
+	bne	.L1168
+	cmp	w12, 8
+	bls	.L1169
+	orr	w0, w0, w15
+	and	w0, w0, 65535
+.L1169:
+	add	w8, w8, 1
+	cmp	w8, 16
+	bne	.L1170
+	strh	w0, [x10], 2
+	add	w11, w11, 1
+	cmp	w23, w11
+	bgt	.L1171
 	mov	x0, 0
 	mov	w8, 0
-.L1149:
+.L1174:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1149
+	bne	.L1174
 	cmp	w8, 7
-	ble	.L1150
+	ble	.L1175
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC22
@@ -8401,64 +8562,92 @@ HynixGetReadRetryDefault:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1151:
-	b	.L1151
-.L1128:
+.L1176:
+	b	.L1176
+.L1148:
+	cmp	w26, 7
+	bne	.L1154
+	mov	w1, 0
+.L1156:
+	ldrb	w7, [x0]
+	cmp	w7, 12
+	beq	.L1155
+	ldrb	w7, [x0, 1]
+	cmp	w7, 10
+	beq	.L1155
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1156
+.L1157:
+	adrp	x0, .LC21
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+.L1158:
+	b	.L1158
+.L1155:
+	cmp	w1, 6
+	bls	.L1152
+	b	.L1157
+.L1154:
 	cmp	w26, 6
-	bne	.L1132
+	bne	.L1152
 	mov	x1, 0
-.L1134:
+.L1159:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1132
+	beq	.L1152
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1132
+	beq	.L1152
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1134
+	bne	.L1159
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1136:
-	b	.L1136
-.L1138:
+.L1161:
+	b	.L1161
+.L1163:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1137
-.L1150:
+	b	.L1162
+.L1175:
 	cmp	w26, 6
-	beq	.L1162
+	beq	.L1189
 	cmp	w26, 7
+	beq	.L1190
+	cmp	w26, 8
 	mov	x1, 8
-	mov	x0, 10
+	mov	x0, 5
 	csel	x0, x0, x1, eq
-.L1152:
-	mov	x1, x3
+.L1177:
 	mov	w8, 0
-.L1153:
-	mov	x3, 0
-.L1154:
-	ldrb	w10, [x7, x3]
-	strb	w10, [x1, x3]
-	add	x3, x3, 1
-	cmp	w28, w3, uxtb
-	bhi	.L1154
-	ldr	x2, [x29, 112]
+.L1178:
+	mov	x1, 0
+.L1179:
+	ldrb	w10, [x7, x1]
+	strb	w10, [x3, x1]
+	add	x1, x1, 1
+	cmp	w28, w1, uxtb
+	bhi	.L1179
+	ldr	x1, [x29, 112]
 	add	w8, w8, 1
-	add	x1, x1, x0
+	add	x3, x3, x0
 	cmp	w27, w8
-	add	x7, x7, x2
-	bgt	.L1153
+	add	x7, x7, x1
+	bgt	.L1178
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1156
+	bhi	.L1181
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -8470,19 +8659,52 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1157:
+.L1182:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1118
-.L1162:
+	b	.L1137
+.L1189:
 	mov	x0, 4
-	b	.L1152
-.L1156:
+	b	.L1177
+.L1190:
+	mov	x0, 10
+	b	.L1177
+.L1181:
+	cmp	w26, 8
+	bne	.L1183
+	mov	w0, 190
+.L1234:
+	str	w0, [x19, 2056]
+	b	.L1182
+.L1183:
 	mov	w0, 56
+	b	.L1234
+.L1140:
+	mov	w0, 120
 	str	w0, [x19, 2056]
-	b	.L1157
+	str	wzr, [x19, 2052]
+	mov	w0, 23
+	str	wzr, [x19, 2052]
+	mov	w1, 25
+	str	wzr, [x19, 2052]
+	add	x3, x20, :lo12:.LANCHOR20
+	str	w0, [x19, 2056]
+	mov	w0, 4
+	str	w0, [x19, 2056]
+	add	x3, x3, 28
+	str	w1, [x19, 2056]
+	mov	w1, 218
+	str	w1, [x19, 2056]
+	mov	w1, 21
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w1, [x19, 2052]
+	str	w0, [x19, 2052]
+	str	wzr, [x19, 2052]
+	b	.L1185
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8490,14 +8712,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1199
+	cbz	w0, .L1235
 	sub	w2, w0, #1
-	cmp	w2, 6
-	bhi	.L1201
+	cmp	w2, 7
+	bhi	.L1237
 	b	HynixGetReadRetryDefault
-.L1201:
+.L1237:
 	cmp	w0, 49
-	bne	.L1202
+	bne	.L1238
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8505,44 +8727,44 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 1]
 	mov	w1, 15
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
+	adrp	x1, .LANCHOR13
+	add	x1, x1, :lo12:.LANCHOR13
 	mov	w2, 64
-.L1211:
+.L1247:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1202:
+.L1238:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1203
+	bhi	.L1239
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1212:
+.L1248:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1211
-.L1203:
+	adrp	x1, .LANCHOR9
+	add	x1, x1, :lo12:.LANCHOR9
+	b	.L1247
+.L1239:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1204
+	bne	.L1240
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1212
-.L1204:
+	b	.L1248
+.L1240:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1199
+	bne	.L1235
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8551,10 +8773,10 @@ FlashGetReadRetryDefault:
 	mov	w1, 17
 	mov	w2, 95
 	strb	w1, [x0, 2]
-	adrp	x1, .LANCHOR9
-	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1211
-.L1199:
+	adrp	x1, .LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR8
+	b	.L1247
+.L1235:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8562,30 +8784,28 @@ FlashGetReadRetryDefault:
 	.global	FlashInit
 	.type	FlashInit, %function
 FlashInit:
-	stp	x29, x30, [sp, -112]!
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	mov	w0, 32768
+	adrp	x22, .LANCHOR30
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR2
+	adrp	x24, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR152
+	adrp	x23, .LANCHOR1
 	stp	x27, x28, [sp, 80]
+	adrp	x25, .LANCHOR152
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR147
-	adrp	x21, .LANCHOR30
-	adrp	x22, .LANCHOR1
-	adrp	x20, .LANCHOR22
+	adrp	x21, .LANCHOR22
+	adrp	x26, .LC23
+	mov	w28, 0
 	str	x0, [x1, #:lo12:.LANCHOR147]
 	mov	w0, 32768
 	bl	ftl_malloc
-	adrp	x25, .LANCHOR6
 	adrp	x1, .LANCHOR153
-	add	x25, x25, :lo12:.LANCHOR6
-	adrp	x26, .LC23
-	mov	w28, 0
 	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 4096
 	bl	ftl_malloc
@@ -8597,13 +8817,13 @@ FlashInit:
 	str	x0, [x1, #:lo12:.LANCHOR198]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x21, #:lo12:.LANCHOR30]
+	strb	wzr, [x22, #:lo12:.LANCHOR30]
 	adrp	x1, .LANCHOR199
-	strb	wzr, [x22, #:lo12:.LANCHOR1]
+	strb	wzr, [x23, #:lo12:.LANCHOR1]
 	str	x0, [x1, #:lo12:.LANCHOR199]
 	adrp	x1, .LANCHOR150
 	mov	w0, 50
-	strb	w0, [x23, #:lo12:.LANCHOR2]
+	strb	w0, [x24, #:lo12:.LANCHOR2]
 	strb	w0, [x1, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR149
 	mov	w1, 128
@@ -8613,41 +8833,43 @@ FlashInit:
 	adrp	x0, .LANCHOR144
 	str	wzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 60
-	strb	w0, [x24, #:lo12:.LANCHOR152]
+	strb	w0, [x25, #:lo12:.LANCHOR152]
 	mov	x0, x19
-	add	x19, x20, :lo12:.LANCHOR22
 	bl	NandcInit
-	mov	x27, x19
+	add	x19, x21, :lo12:.LANCHOR22
+	adrp	x10, .LANCHOR6
+	add	x27, x10, :lo12:.LANCHOR6
 	add	x0, x26, :lo12:.LC23
-	str	x0, [x29, 104]
-.L1218:
-	and	w26, w28, 255
-	mov	w0, w26
+	stp	x0, x19, [x29, 112]
+.L1254:
+	ldrb	w2, [x27, 8]
+	and	w1, w28, 255
+	mov	w26, w1
+	mov	w0, w1
+	str	w2, [x29, 108]
+	ldr	x20, [x27]
 	bl	FlashReset
-	ldrb	w5, [x25, 8]
 	mov	w0, w26
-	ldr	x4, [x25]
 	bl	NandcFlashCs
-	ubfiz	x1, x5, 8, 8
-	add	x1, x4, x1
+	ldr	w2, [x29, 108]
 	mov	w0, 144
-	str	x1, [x29, 96]
-	str	w0, [x1, 2056]
+	ubfiz	x2, x2, 8, 8
+	add	x20, x20, x2
+	str	w0, [x20, 2056]
 	mov	x0, 200
-	str	wzr, [x1, 2052]
+	str	wzr, [x20, 2052]
 	bl	udelay
-	ldr	x1, [x29, 96]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 1]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 2]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 3]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 4]
-	ldr	w0, [x1, 2048]
+	ldr	w0, [x20, 2048]
 	strb	w0, [x19, 5]
 	mov	w0, w26
 	bl	NandcFlashDeCs
@@ -8655,303 +8877,331 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1214
+	bhi	.L1250
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
 	ldrb	w5, [x19, 3]
 	ldrb	w4, [x19, 2]
 	ldrb	w3, [x19, 1]
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	bl	printf
-.L1214:
-	cbnz	w28, .L1215
-	ldrb	w0, [x27]
+.L1250:
+	cbnz	w28, .L1251
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1256
-	ldrb	w0, [x27, 1]
+	bhi	.L1295
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, 1]
 	cmp	w0, 255
-	beq	.L1256
-.L1215:
+	beq	.L1295
+.L1251:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1217
+	bne	.L1253
 	mov	w0, 44
 	strb	w0, [x19]
-.L1217:
+.L1253:
 	add	w28, w28, 1
-	add	x25, x25, 16
+	add	x27, x27, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1218
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	bne	.L1254
+	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1219
+	beq	.L1255
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1219:
+.L1255:
+	adrp	x20, .LANCHOR18
+	adrp	x28, .LANCHOR5
+	adrp	x26, .LANCHOR119
+	adrp	x19, .LANCHOR20
 	mov	w2, 852
-	adrp	x26, .LANCHOR20
 	mov	w1, 0
-	add	x0, x26, :lo12:.LANCHOR20
-	adrp	x19, .LANCHOR18
+	add	x0, x19, :lo12:.LANCHOR20
 	bl	ftl_memset
-	adrp	x28, .LANCHOR31
-	add	x0, x28, :lo12:.LANCHOR31
-	str	x0, [x19, #:lo12:.LANCHOR18]
-	add	x0, x20, :lo12:.LANCHOR22
-	adrp	x27, .LANCHOR5
-	ldrb	w2, [x0, 1]
-	strb	wzr, [x27, #:lo12:.LANCHOR5]
-	cmp	w2, 161
-	beq	.L1220
-	cmp	w2, 218
-	beq	.L1220
-	and	w1, w2, -33
-	cmp	w1, 209
-	beq	.L1220
-	cmp	w2, 220
-	bne	.L1221
+	adrp	x3, .LANCHOR31
+	ldr	w4, [x26, #:lo12:.LANCHOR119]
+	add	x0, x3, :lo12:.LANCHOR31
+	strb	wzr, [x28, #:lo12:.LANCHOR5]
+	str	x0, [x20, #:lo12:.LANCHOR18]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w4, w0
+	bne	.L1256
+	adrp	x0, .LANCHOR29
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR29]
+.L1256:
+	add	x0, x21, :lo12:.LANCHOR22
+	ldrb	w1, [x0, 1]
+	add	w0, w1, 95
+	and	w2, w0, 255
+	mov	x0, 1
+	cmp	w2, 57
+	bhi	.L1257
+	movk	x0, 0x205, lsl 48
+	lsr	x0, x0, x2
+	mvn	x0, x0
+.L1257:
+	cmp	w1, 241
+	and	w0, w0, 1
+	cset	w2, eq
+	eor	w0, w0, 1
+	orr	w0, w2, w0
+	cbnz	w0, .L1258
+	cmp	w1, 220
+	bne	.L1259
+	add	x0, x21, :lo12:.LANCHOR22
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1221
-.L1220:
+	bne	.L1259
+.L1258:
 	mov	w0, 1
-	adrp	x25, .LANCHOR200
-	add	x1, x25, :lo12:.LANCHOR200
-	strb	w0, [x22, #:lo12:.LANCHOR1]
+	adrp	x27, .LANCHOR200
+	add	x2, x27, :lo12:.LANCHOR200
+	strb	w0, [x23, #:lo12:.LANCHOR1]
 	mov	w0, 16
-	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-	add	x3, x20, :lo12:.LANCHOR22
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
-	strb	w0, [x1, 1]
-	strb	w2, [x1, 2]
+	strb	w0, [x24, #:lo12:.LANCHOR2]
+	strb	w0, [x25, #:lo12:.LANCHOR152]
+	add	x5, x21, :lo12:.LANCHOR22
+	ldrb	w0, [x21, #:lo12:.LANCHOR22]
+	strb	w0, [x2, 1]
+	strb	w1, [x2, 2]
 	cmp	w0, 152
-	bne	.L1222
-	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1222
+	bne	.L1260
+	ldrsb	w0, [x5, 4]
+	tbnz	w0, #31, .L1260
 	mov	w0, 24
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1222:
-	adrp	x0, .LANCHOR29
-	mov	w1, 12336
-	movk	w1, 0x5638, lsl 16
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	cmp	w0, 2049
-	ccmp	w0, w1, 4, ne
-	bne	.L1223
+	strb	w0, [x25, #:lo12:.LANCHOR152]
+.L1260:
+	cmp	w4, 2049
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	ccmp	w4, w0, 4, ne
+	bne	.L1261
 	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1223:
-	cmp	w2, 218
-	bne	.L1224
-	add	x0, x25, :lo12:.LANCHOR200
+	strb	w0, [x25, #:lo12:.LANCHOR152]
+.L1261:
+	cmp	w1, 218
+	bne	.L1262
+	add	x0, x27, :lo12:.LANCHOR200
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1294:
+.L1329:
 	strb	w1, [x0, 2]
-.L1225:
+.L1263:
 	adrp	x1, .LANCHOR143
 	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
 	add	x1, x1, 32
+	str	x3, [x29, 120]
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
+	ldr	x3, [x29, 120]
 	mov	w2, 32
-	add	x1, x25, :lo12:.LANCHOR200
-	add	x0, x28, :lo12:.LANCHOR31
+	add	x1, x27, :lo12:.LANCHOR200
+	add	x0, x3, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1221:
-	ldrb	w0, [x22, #:lo12:.LANCHOR1]
-	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1227
+.L1259:
+	ldrb	w0, [x23, #:lo12:.LANCHOR1]
+	adrp	x27, .LANCHOR15
+	cbnz	w0, .L1266
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1229
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
-	adrp	x24, .LANCHOR24
+	cbnz	w0, .L1268
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
+	adrp	x25, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
-	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1229
+	strb	w0, [x25, #:lo12:.LANCHOR24]
+	tbnz	x1, 0, .L1268
 	mov	w1, 1
-	strb	w1, [x21, #:lo12:.LANCHOR30]
+	strb	w1, [x22, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
-	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	ldrb	w0, [x25, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1229:
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+.L1268:
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
-	strb	w0, [x25, #:lo12:.LANCHOR8]
+	strb	w0, [x27, #:lo12:.LANCHOR15]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1227
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	cbz	w0, .L1266
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1213
+	beq	.L1249
 	bl	FlashDieInfoInit
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	bl	FlashGetReadRetryDefault
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	adrp	x1, .LANCHOR122
 	ldrh	w1, [x1, #:lo12:.LANCHOR122]
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1232
+	blt	.L1271
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1233
-.L1232:
+	bge	.L1272
+.L1271:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1233:
+.L1272:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1234
+	beq	.L1273
 	bl	FlashSavePhyInfo
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1234:
+.L1273:
 	bl	FlashSavePhyInfo
-.L1227:
-	ldr	x2, [x19, #:lo12:.LANCHOR18]
-	adrp	x24, .LANCHOR24
+.L1266:
+	ldr	x2, [x20, #:lo12:.LANCHOR18]
+	adrp	x25, .LANCHOR24
 	ldrb	w0, [x2, 26]
-	strb	w0, [x25, #:lo12:.LANCHOR8]
+	strb	w0, [x27, #:lo12:.LANCHOR15]
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
-	strb	w1, [x27, #:lo12:.LANCHOR5]
+	strb	w1, [x28, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR201
 	ubfx	x3, x0, 3, 1
-	adrp	x27, .LANCHOR145
+	adrp	x28, .LANCHOR145
 	strb	w3, [x1, #:lo12:.LANCHOR201]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
 	strb	w3, [x1, #:lo12:.LANCHOR27]
-	strb	w0, [x24, #:lo12:.LANCHOR24]
+	strb	w0, [x25, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
-	str	xzr, [x27, #:lo12:.LANCHOR145]
+	str	xzr, [x28, #:lo12:.LANCHOR145]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1236
-	adrp	x1, .LANCHOR11
+	tbz	x1, 6, .L1275
+	add	x3, x19, :lo12:.LANCHOR20
+	adrp	x1, .LANCHOR10
 	ldrb	w0, [x0, 19]
-	adrp	x3, .LANCHOR13
-	strb	w0, [x1, #:lo12:.LANCHOR11]
-	add	x1, x26, :lo12:.LANCHOR20
-	ldrb	w2, [x1, 1]
-	strb	w2, [x3, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR151
-	ldrb	w4, [x1, 2]
-	strb	w4, [x2, #:lo12:.LANCHOR151]
-	sub	w4, w0, #1
-	and	w4, w4, 255
-	cmp	w4, 6
-	mov	x4, x3
-	bhi	.L1237
-	adrp	x2, HynixReadRetrial
-	add	x2, x2, :lo12:HynixReadRetrial
-	str	x2, [x27, #:lo12:.LANCHOR145]
-	sub	w2, w0, #5
-	and	w2, w2, 255
-	cmp	w2, 1
-	bhi	.L1238
-	adrp	x2, .LANCHOR36
-	add	x1, x1, 20
-	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR36]
-.L1239:
-	mov	x2, 0
-	mov	w3, 0
-.L1241:
-	ldrsb	w4, [x1, x2]
-	add	x2, x2, 1
-	cmp	w4, 0
-	cinc	w3, w3, eq
-	cmp	x2, 32
-	bne	.L1241
-	cmp	w3, 27
-	bls	.L1236
+	adrp	x2, .LANCHOR12
+	strb	w0, [x1, #:lo12:.LANCHOR10]
+	mov	x4, x2
+	ldrb	w1, [x3, 1]
+	strb	w1, [x2, #:lo12:.LANCHOR12]
+	adrp	x1, .LANCHOR151
+	ldrb	w3, [x3, 2]
+	strb	w3, [x1, #:lo12:.LANCHOR151]
+	sub	w3, w0, #1
+	and	w3, w3, 255
+	cmp	w3, 7
+	bhi	.L1276
+	adrp	x1, HynixReadRetrial
+	add	x1, x1, :lo12:HynixReadRetrial
+	str	x1, [x28, #:lo12:.LANCHOR145]
+	sub	w1, w0, #5
+	and	w1, w1, 255
+	cmp	w1, 1
+	ccmp	w0, 8, 4, hi
+	bne	.L1277
+	adrp	x1, .LANCHOR36
+	mov	w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR36]
+.L1277:
+	add	x19, x19, :lo12:.LANCHOR20
+	cmp	w0, 7
+	beq	.L1330
+	cmp	w0, 8
+	bne	.L1298
+.L1330:
+	add	x19, x19, 28
+.L1278:
+	mov	x1, 0
+	mov	w2, 0
+.L1280:
+	ldrsb	w3, [x19, x1]
+	add	x1, x1, 1
+	cmp	w3, 0
+	cinc	w2, w2, eq
+	cmp	x1, 32
+	bne	.L1280
+	cmp	w2, 27
+	bls	.L1275
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1236:
-	adrp	x0, .LANCHOR29
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
+.L1275:
+	ldr	w1, [x26, #:lo12:.LANCHOR119]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1250
-	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1250
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	bne	.L1289
+	ldrb	w0, [x27, #:lo12:.LANCHOR15]
+	cbz	w0, .L1289
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1250:
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+.L1289:
+	ldrb	w0, [x21, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1251
-	ldrb	w0, [x21, #:lo12:.LANCHOR30]
-	cbz	w0, .L1251
-	strb	wzr, [x21, #:lo12:.LANCHOR30]
+	bne	.L1290
+	ldrb	w0, [x22, #:lo12:.LANCHOR30]
+	cbz	w0, .L1290
+	strb	wzr, [x22, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1251:
+.L1290:
+	ldrb	w0, [x25, #:lo12:.LANCHOR24]
+	tst	w0, 6
+	beq	.L1291
+	ldrb	w1, [x22, #:lo12:.LANCHOR30]
+	cbnz	w1, .L1292
+	tbnz	x0, 0, .L1291
+.L1292:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-	ldrb	w0, [x24, #:lo12:.LANCHOR24]
-	tst	w0, 6
-	beq	.L1252
-	ldrb	w1, [x21, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1253
-	tbnz	x0, 0, .L1252
-.L1253:
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1252:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-	ldr	x0, [x19, #:lo12:.LANCHOR18]
+.L1291:
+	ldr	x0, [x20, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
 	adrp	x0, .LANCHOR141
 	add	x0, x0, :lo12:.LANCHOR141
 	bl	FlashReadIdbDataRaw
-	ldr	x2, [x19, #:lo12:.LANCHOR18]
+	ldr	x2, [x20, #:lo12:.LANCHOR18]
 	mov	w0, 16
-	adrp	x1, .LANCHOR15
-	strb	w0, [x23, #:lo12:.LANCHOR2]
-	add	x0, x1, :lo12:.LANCHOR15
+	adrp	x1, .LANCHOR14
+	strb	w0, [x24, #:lo12:.LANCHOR2]
+	add	x0, x1, :lo12:.LANCHOR14
 	ldrb	w3, [x2, 12]
 	strh	w3, [x0, 8]
 	ldrb	w4, [x2, 7]
 	str	w4, [x0, 4]
-	ldr	w4, [x20, #:lo12:.LANCHOR22]
-	str	w4, [x1, #:lo12:.LANCHOR15]
+	ldr	w4, [x21, #:lo12:.LANCHOR22]
+	str	w4, [x1, #:lo12:.LANCHOR14]
 	adrp	x1, .LANCHOR25
 	ldrh	w4, [x2, 14]
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
@@ -8973,9 +9223,9 @@ FlashInit:
 	and	w1, w1, 65535
 	strh	w5, [x0, 26]
 	strh	w1, [x0, 22]
-	ldrb	w5, [x22, #:lo12:.LANCHOR1]
+	ldrb	w5, [x23, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1254
+	bne	.L1293
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8984,102 +9234,108 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1254:
+.L1293:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1213:
+.L1249:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L1224:
-	cmp	w2, 220
-	bne	.L1225
-	add	x0, x25, :lo12:.LANCHOR200
+.L1262:
+	cmp	w1, 220
+	bne	.L1264
+	add	x0, x27, :lo12:.LANCHOR200
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1294
-.L1238:
-	add	x2, x1, 20
-	cmp	w0, 7
-	add	x1, x1, 28
-	csel	x1, x1, x2, eq
-	b	.L1239
-.L1237:
-	sub	w1, w0, #17
-	and	w1, w1, 255
-	cmp	w1, 2
-	bhi	.L1243
-	adrp	x1, MicronReadRetrial
-	add	x1, x1, :lo12:MicronReadRetrial
-	str	x1, [x27, #:lo12:.LANCHOR145]
-	cmp	w0, 19
-	beq	.L1244
+	b	.L1329
+.L1264:
+	cmp	w1, 211
+	bne	.L1263
+	add	x0, x27, :lo12:.LANCHOR200
+	mov	w1, 4096
+	strh	w1, [x0, 14]
+	mov	w1, 2
+	strb	w1, [x0, 13]
+	b	.L1263
 .L1298:
+	add	x19, x19, 20
+	b	.L1278
+.L1276:
+	sub	w3, w0, #17
+	and	w3, w3, 255
+	cmp	w3, 2
+	bhi	.L1282
+	adrp	x2, MicronReadRetrial
+	add	x2, x2, :lo12:MicronReadRetrial
+	str	x2, [x28, #:lo12:.LANCHOR145]
+	cmp	w0, 19
+	beq	.L1283
+.L1334:
 	mov	w0, 7
-	b	.L1296
-.L1244:
+	b	.L1332
+.L1283:
 	mov	w0, 15
-.L1296:
-	strb	w0, [x2, #:lo12:.LANCHOR151]
-	b	.L1236
-.L1243:
-	sub	w1, w0, #65
+.L1332:
+	strb	w0, [x1, #:lo12:.LANCHOR151]
+	b	.L1275
+.L1282:
+	sub	w3, w0, #65
 	cmp	w0, 33
-	and	w1, w1, 255
-	ccmp	w1, 1, 0, ne
-	bhi	.L1245
+	and	w3, w3, 255
+	ccmp	w3, 1, 0, ne
+	bhi	.L1284
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR145]
+	str	x0, [x28, #:lo12:.LANCHOR145]
 	mov	w0, 4
-	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1298
-.L1245:
+	strb	w0, [x2, #:lo12:.LANCHOR12]
+	b	.L1334
+.L1284:
 	sub	w3, w0, #34
-	sub	w1, w0, #67
+	sub	w2, w0, #67
 	and	w3, w3, 255
-	and	w1, w1, 255
+	and	w2, w2, 255
 	cmp	w3, 1
-	ccmp	w1, 1, 0, hi
-	bhi	.L1246
+	ccmp	w2, 1, 0, hi
+	bhi	.L1285
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
-	str	x3, [x27, #:lo12:.LANCHOR145]
+	str	x3, [x28, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1247
+	beq	.L1286
 	mov	w0, 7
-.L1295:
-	strb	w0, [x2, #:lo12:.LANCHOR151]
-	cmp	w1, 1
-	bhi	.L1249
+.L1331:
+	strb	w0, [x1, #:lo12:.LANCHOR151]
+	cmp	w2, 1
+	bhi	.L1288
 	mov	w0, 4
-.L1297:
-	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1236
-.L1247:
+.L1333:
+	strb	w0, [x4, #:lo12:.LANCHOR12]
+	b	.L1275
+.L1286:
 	mov	w0, 17
-	b	.L1295
-.L1249:
+	b	.L1331
+.L1288:
 	mov	w0, 5
-	b	.L1297
-.L1246:
+	b	.L1333
+.L1285:
 	cmp	w0, 49
-	bne	.L1236
+	bne	.L1275
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR145]
-	b	.L1236
-.L1256:
+	str	x0, [x28, #:lo12:.LANCHOR145]
+	b	.L1275
+.L1295:
 	mov	w0, -2
-	b	.L1213
+	b	.L1249
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -9104,9 +9360,9 @@ FlashReadSlc2KPages:
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1300:
+.L1336:
 	cmp	x22, x19
-	bne	.L1312
+	bne	.L1348
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9115,7 +9371,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1312:
+.L1348:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -9125,15 +9381,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1301
+	bhi	.L1337
 	mov	w0, -1
 	str	w0, [x19]
-.L1302:
+.L1338:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1300
-.L1301:
+	b	.L1336
+.L1337:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -9178,51 +9434,51 @@ FlashReadSlc2KPages:
 	ldrb	w2, [x1, #:lo12:.LANCHOR33]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1305
+	bls	.L1341
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1305:
+.L1341:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1308
+	cbz	x0, .L1344
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1308
+	bne	.L1344
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1308
+	bne	.L1344
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1308
+	beq	.L1344
 	str	w1, [x19]
-.L1308:
+.L1344:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1302
+	bne	.L1338
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1310
+	cbz	x1, .L1346
 	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1310:
+.L1346:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1302
+	cbz	x1, .L1338
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1302
+	b	.L1338
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9239,7 +9495,7 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1331
+	cbnz	w3, .L1367
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9255,15 +9511,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1332:
+.L1368:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1366
+	bcc	.L1402
 	mov	w0, 0
-	b	.L1330
-.L1331:
+	b	.L1366
+.L1367:
 	bl	FlashReadSlc2KPages
-.L1330:
+.L1366:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9271,7 +9527,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1366:
+.L1402:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9287,13 +9543,13 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1334
+	bhi	.L1370
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1335:
+.L1371:
 	add	w22, w22, 1
-	b	.L1332
-.L1334:
+	b	.L1368
+.L1370:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9303,72 +9559,74 @@ FlashReadPages:
 	mov	w0, w19
 	csel	w20, w20, wzr, ne
 	bl	NandcWaitFlashReady
-	adrp	x1, .LANCHOR18
-	str	x1, [x29, 120]
-	ldr	x0, [x1, #:lo12:.LANCHOR18]
-	ldrb	w2, [x0, 19]
-	sub	w0, w2, #1
+	adrp	x2, .LANCHOR18
+	str	x2, [x29, 120]
+	ldr	x0, [x2, #:lo12:.LANCHOR18]
+	ldrb	w1, [x0, 19]
+	sub	w0, w1, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L1337
+	cmp	w0, 7
+	bhi	.L1373
 	add	x0, x27, :lo12:.LANCHOR20
-	sxtw	x1, w19
-	add	x0, x0, x1
-	cmp	w2, 7
+	sxtw	x2, w19
+	add	x0, x0, x2
+	sub	w1, w1, #7
+	and	w1, w1, 255
+	cmp	w1, 1
 	ldrb	w3, [x0, 12]
-	bne	.L1338
+	bhi	.L1374
 	ldrb	w3, [x0, 20]
-.L1338:
+.L1374:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
-	ldrb	w0, [x0, x1]
+	ldrb	w0, [x0, x2]
 	cmp	w0, w3
-	beq	.L1337
+	beq	.L1373
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1337:
+.L1373:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1339
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1339
+	cbz	w24, .L1375
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1375
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1340:
+.L1376:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1346:
+.L1382:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1341
+	bne	.L1377
 	cmp	w19, 255
-	beq	.L1368
-.L1341:
-	cbz	w20, .L1343
+	beq	.L1404
+.L1377:
+	cbz	w20, .L1379
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1344:
+.L1380:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1342
+	cbz	w20, .L1378
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1342:
+.L1378:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9377,26 +9635,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1345
+	cbz	w0, .L1381
 	cmn	w28, #1
-	bne	.L1345
+	bne	.L1381
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1346
-.L1339:
+	b	.L1382
+.L1375:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1340
-.L1343:
+	b	.L1376
+.L1379:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1344
-.L1368:
+	b	.L1380
+.L1404:
 	mov	w20, 0
-	b	.L1342
-.L1345:
-	cbz	w20, .L1347
+	b	.L1378
+.L1381:
+	cbz	w20, .L1383
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -9415,27 +9673,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1347:
+.L1383:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1348
+	bne	.L1384
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1349
-.L1353:
+	cbnz	w0, .L1385
+.L1389:
 	adrp	x20, .LANCHOR145
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1350
+	cbnz	x4, .L1386
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1405
-.L1349:
+	b	.L1441
+.L1385:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9446,36 +9704,36 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1352
+	beq	.L1388
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1369
-.L1352:
+	bls	.L1405
+.L1388:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1353
-.L1369:
+	beq	.L1389
+.L1405:
 	mov	w20, 0
-.L1348:
+.L1384:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1354
+	bls	.L1390
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1354:
+.L1390:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1361
+	bne	.L1397
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
@@ -9483,25 +9741,25 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1361
+	cbz	x1, .L1397
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1361:
-	cbz	w20, .L1363
+.L1397:
+	cbz	w20, .L1399
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1364
+	bls	.L1400
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1364:
+.L1400:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9509,37 +9767,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1363:
+.L1399:
 	add	w22, w22, w20
-	cbz	w24, .L1335
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1335
+	cbz	w24, .L1371
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1371
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1335
-.L1350:
+	b	.L1371
+.L1386:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1372
+	bne	.L1408
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L1355
+	cmp	w0, 7
+	bhi	.L1391
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1355:
+.L1391:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9553,27 +9811,27 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1372
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1372
+	bne	.L1408
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1408
 	mov	w0, w19
-	cbz	w24, .L1356
+	cbz	w24, .L1392
 	bl	flash_enter_slc_mode
-.L1357:
+.L1393:
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1405:
+.L1441:
 	mov	w28, w0
-.L1372:
+.L1408:
 	mov	w20, 0
-	b	.L1354
-.L1356:
+	b	.L1390
+.L1392:
 	bl	flash_exit_slc_mode
-	b	.L1357
+	b	.L1393
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9600,12 +9858,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1407:
+.L1443:
 	cmp	x20, x23
-	bne	.L1413
+	bne	.L1449
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1414
-.L1433:
+	cbnz	w0, .L1450
+.L1469:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9614,7 +9872,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1413:
+.L1449:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9625,15 +9883,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1408
+	bhi	.L1444
 	mov	w0, -1
 	str	w0, [x20]
-.L1409:
+.L1445:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1407
-.L1408:
+	b	.L1443
+.L1444:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9686,30 +9944,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1412
+	tbz	x0, 0, .L1448
 	mov	w0, -1
 	str	w0, [x20]
-.L1412:
+.L1448:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1409
-.L1420:
+	b	.L1445
+.L1456:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1415
+	bne	.L1451
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1416:
+.L1452:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1434:
+.L1470:
 	cmp	x27, x20
-	bne	.L1420
-	b	.L1433
-.L1415:
+	bne	.L1456
+	b	.L1469
+.L1451:
 	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9732,45 +9990,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1417
+	bne	.L1453
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1417:
+.L1453:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1418
+	cbz	x0, .L1454
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1418
+	beq	.L1454
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1418:
+.L1454:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1416
+	cbz	x0, .L1452
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1416
+	beq	.L1452
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1416
-.L1414:
+	b	.L1452
+.L1450:
 	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1434
+	b	.L1470
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9790,7 +10048,7 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1437
+	cbnz	w4, .L1473
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -9800,28 +10058,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1438:
+.L1474:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1451
-	adrp	x21, .LANCHOR8
+	bcc	.L1487
+	adrp	x21, .LANCHOR15
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR15
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1452:
+.L1488:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1454
+	bhi	.L1490
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1455
-.L1463:
+	cbnz	w0, .L1491
+.L1499:
 	mov	w0, 0
-	b	.L1436
-.L1437:
+	b	.L1472
+.L1473:
 	bl	FlashProgSlc2KPages
-.L1436:
+.L1472:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9829,7 +10087,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1451:
+.L1487:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9843,13 +10101,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1440
+	bhi	.L1476
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1441:
+.L1477:
 	add	w21, w21, 1
-	b	.L1438
-.L1440:
+	b	.L1474
+.L1476:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9859,20 +10117,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1443
+	cbz	x1, .L1479
 	bl	FlashWaitCmdDone
-.L1443:
+.L1479:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1444
+	cbz	w23, .L1480
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1444:
+.L1480:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9882,17 +10140,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1445
+	bne	.L1481
 	bl	NandcWaitFlashReady
-.L1446:
+.L1482:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
-	cmp	w0, 6
-	bhi	.L1447
+	cmp	w0, 7
+	bhi	.L1483
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1447
+	cbz	w0, .L1483
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9900,17 +10158,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1447:
+.L1483:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1448
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1448
+	bne	.L1484
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1484
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1449:
+.L1485:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9919,7 +10177,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1450
+	cbz	w23, .L1486
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9947,15 +10205,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1450:
+.L1486:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1441
-.L1445:
+	b	.L1477
+.L1481:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9968,47 +10226,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1446
-.L1448:
+	b	.L1482
+.L1484:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1449
-.L1454:
+	b	.L1485
+.L1490:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1453
+	bne	.L1489
 	ldrb	w0, [x21]
-	cbz	w0, .L1453
+	cbz	w0, .L1489
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1453:
+.L1489:
 	add	x20, x20, 1
-	b	.L1452
-.L1455:
+	b	.L1488
+.L1491:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1456:
+.L1492:
 	cmp	x24, x19
-	beq	.L1463
+	beq	.L1499
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1457
+	bne	.L1493
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1458:
+.L1494:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1456
-.L1457:
+	b	.L1492
+.L1493:
 	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
@@ -10031,41 +10289,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1459
+	bne	.L1495
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1459:
+.L1495:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1460
+	cbz	x0, .L1496
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1460
+	beq	.L1496
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1460:
+.L1496:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1458
+	cbz	x0, .L1494
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1458
+	beq	.L1494
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1458
+	b	.L1494
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10079,7 +10337,7 @@ FlashTestBlk:
 	adrp	x0, .LANCHOR149
 	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1491
+	bcc	.L1527
 	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
@@ -10110,14 +10368,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1489:
+.L1525:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1491:
+.L1527:
 	mov	w19, 0
-	b	.L1489
+	b	.L1525
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10128,42 +10386,42 @@ FtlLowFormatEraseBlock:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1516
+	cbnz	w0, .L1552
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
-	adrp	x20, .LANCHOR8
+	adrp	x20, .LANCHOR15
 	adrp	x1, .LANCHOR38
 	ldrb	w0, [x23, #:lo12:.LANCHOR27]
-	adrp	x21, .LANCHOR78
+	adrp	x21, .LANCHOR77
 	str	w0, [x29, 136]
 	mov	x8, 56
-	adrp	x0, .LANCHOR74
-	ldrb	w10, [x20, #:lo12:.LANCHOR8]
+	adrp	x0, .LANCHOR73
+	ldrb	w10, [x20, #:lo12:.LANCHOR15]
 	ldrh	w11, [x1, #:lo12:.LANCHOR38]
 	adrp	x7, .LANCHOR47
-	str	w26, [x0, #:lo12:.LANCHOR74]
+	str	w26, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR189
-	ldr	x6, [x21, #:lo12:.LANCHOR78]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
 	add	x7, x7, :lo12:.LANCHOR47
 	ldr	x12, [x0, #:lo12:.LANCHOR189]
-	adrp	x0, .LANCHOR59
+	adrp	x0, .LANCHOR58
 	mov	w14, w8
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR59]
+	ldrh	w13, [x0, #:lo12:.LANCHOR58]
 	mov	w24, 0
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1495:
+.L1531:
 	cmp	w11, w5, uxth
-	bhi	.L1499
-	cbz	w24, .L1493
+	bhi	.L1535
+	cbz	w24, .L1529
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -10176,34 +10434,34 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1502:
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+.L1538:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1501
+	bne	.L1537
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1501:
+.L1537:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1502
-	cbnz	w25, .L1503
+	bne	.L1538
+	cbnz	w25, .L1539
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1504:
+.L1540:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1512:
+.L1548:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR78]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
 	mov	w20, 0
 	mov	w12, 56
 	ldrh	w7, [x0, #:lo12:.LANCHOR38]
@@ -10212,11 +10470,11 @@ FtlLowFormatEraseBlock:
 	adrp	x0, .LANCHOR187
 	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
-	ldrh	w11, [x0, #:lo12:.LANCHOR59]
-.L1505:
+	ldrh	w11, [x0, #:lo12:.LANCHOR58]
+.L1541:
 	cmp	w7, w5, uxth
-	bhi	.L1508
-	cbz	w20, .L1493
+	bhi	.L1544
+	cbz	w20, .L1529
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -10228,11 +10486,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1511:
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+.L1547:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1510
+	cbz	w0, .L1546
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10240,39 +10498,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1510:
+.L1546:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1511
+	bne	.L1547
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1512
+	bhi	.L1548
 	mov	x23, 0
-.L1514:
-	cbz	w25, .L1513
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+.L1550:
+	cbz	w25, .L1549
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1513
+	cbnz	w0, .L1549
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1513:
+.L1549:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1514
+	bne	.L1550
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1493
-	ldr	x0, [x21, #:lo12:.LANCHOR78]
+	beq	.L1529
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1493:
+.L1529:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10281,7 +10539,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1499:
+.L1535:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10289,13 +10547,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1496
+	cbz	w25, .L1532
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1497
-.L1496:
+	cbnz	w0, .L1533
+.L1532:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1498
+	cbnz	w0, .L1534
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10305,26 +10563,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1497:
+.L1533:
 	add	x5, x5, 1
-	b	.L1495
-.L1498:
+	b	.L1531
+.L1534:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1497
-.L1503:
-	adrp	x0, .LANCHOR54
-	ldrh	w27, [x0, #:lo12:.LANCHOR54]
-	ldrb	w0, [x20, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1517
+	b	.L1533
+.L1539:
+	adrp	x0, .LANCHOR53
+	ldrh	w27, [x0, #:lo12:.LANCHOR53]
+	ldrb	w0, [x20, #:lo12:.LANCHOR15]
+	cbnz	w0, .L1553
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1504
-.L1517:
+	b	.L1540
+.L1553:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1504
-.L1508:
+	b	.L1540
+.L1544:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10334,13 +10592,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1506
+	cbz	w25, .L1542
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1507
-.L1506:
+	cbnz	w0, .L1543
+.L1542:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1507
+	cbnz	w0, .L1543
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10350,12 +10608,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1507:
+.L1543:
 	add	x5, x5, 1
-	b	.L1505
-.L1516:
+	b	.L1541
+.L1552:
 	mov	w19, 0
-	b	.L1493
+	b	.L1529
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10365,45 +10623,45 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR77
+	adrp	x22, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x22, #:lo12:.LANCHOR77]
+	ldr	w0, [x22, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1540
+	cbnz	w0, .L1576
 	adrp	x24, .LANCHOR188
 	adrp	x23, .LANCHOR183
 	adrp	x20, .LANCHOR202
 	add	x19, x20, :lo12:.LANCHOR202
 	ldr	x1, [x24, #:lo12:.LANCHOR188]
-	adrp	x21, .LANCHOR75
+	adrp	x21, .LANCHOR74
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	add	x26, x21, :lo12:.LANCHOR75
+	add	x26, x21, :lo12:.LANCHOR74
 	stp	x0, x1, [x19, 8]
-	adrp	x1, .LANCHOR58
+	adrp	x1, .LANCHOR57
 	adrp	x27, .LANCHOR45
 	adrp	x28, .LANCHOR123
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	add	x26, x26, 32
 	mov	w25, 0
 	add	x27, x27, :lo12:.LANCHOR45
 	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1541:
+.L1577:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1542
+	blt	.L1578
 	add	x20, x20, :lo12:.LANCHOR202
-	add	x19, x21, :lo12:.LANCHOR75
+	add	x19, x21, :lo12:.LANCHOR74
 	mov	w2, 16
 	mov	w1, 255
 	adrp	x25, .LC33
-	adrp	x27, .LANCHOR54
+	adrp	x27, .LANCHOR53
 	ldr	x28, [x20, 16]
 	add	x25, x25, :lo12:.LC33
-	add	x27, x27, :lo12:.LANCHOR54
+	add	x27, x27, :lo12:.LANCHOR53
 	mov	w26, 0
 	mov	x0, x28
 	bl	ftl_memset
@@ -10411,7 +10669,7 @@ FtlBbmTblFlush:
 	strh	w0, [x28]
 	ldr	w0, [x19, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR75]
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	mov	w21, 0
 	strh	w0, [x28, 2]
 	ldrh	w0, [x19, 4]
@@ -10421,7 +10679,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1543:
+.L1579:
 	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
 	ldrh	w2, [x19, 2]
@@ -10439,7 +10697,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1544
+	blt	.L1580
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -10449,16 +10707,16 @@ FtlBbmTblFlush:
 	ldrh	w0, [x19]
 	strh	w0, [x28, 8]
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR77
 	strh	w1, [x19]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x20, 4]
 	strh	wzr, [x19, 2]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1544:
+.L1580:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -10469,7 +10727,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1545
+	bne	.L1581
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC34
@@ -10477,15 +10735,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1543
+	bls	.L1579
 	ldr	w1, [x20, 4]
 	mov	w2, w21
 	adrp	x0, .LC35
 	add	x0, x0, :lo12:.LC35
 	bl	printf
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR77]
-.L1540:
+	str	w0, [x22, #:lo12:.LANCHOR76]
+.L1576:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10494,7 +10752,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1542:
+.L1578:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x19, 8]
@@ -10503,44 +10761,44 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1541
-.L1545:
-	cbnz	w26, .L1540
+	b	.L1577
+.L1581:
+	cbnz	w26, .L1576
 	mov	w26, 1
-	b	.L1543
+	b	.L1579
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	adrp	x1, .LANCHOR77
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1614
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1650
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR86
-	add	x0, x27, :lo12:.LANCHOR86
+	adrp	x27, .LANCHOR85
+	add	x0, x27, :lo12:.LANCHOR85
 	stp	x23, x24, [sp, 48]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR89
-	add	x23, x0, :lo12:.LANCHOR89
+	adrp	x0, .LANCHOR88
+	add	x23, x0, :lo12:.LANCHOR88
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1605:
+.L1641:
 	ldr	x1, [x29, 120]
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR88
 	adrp	x24, .LANCHOR40
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1553
-	mov	w2, 3108
+	ble	.L1589
+	mov	w2, 3139
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10551,11 +10809,11 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1553:
-	adrp	x0, .LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR94
+.L1589:
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1554
+	bne	.L1590
 	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
 	ldr	w3, [x1, #:lo12:.LANCHOR172]
@@ -10566,54 +10824,54 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1555
+	cbz	w4, .L1591
 	adrp	x4, .LANCHOR170
 	ldr	w4, [x4, #:lo12:.LANCHOR170]
 	cmp	w4, 39
-	bhi	.L1555
+	bhi	.L1591
 	cmp	w4, 2
-	bls	.L1589
-	tbz	x2, 0, .L1585
-	cbz	w3, .L1589
-.L1585:
+	bls	.L1625
+	tbz	x2, 0, .L1621
+	cbz	w3, .L1625
+.L1621:
 	mov	w1, w0
-	b	.L1555
-.L1554:
+	b	.L1591
+.L1590:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1589
+	bne	.L1625
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1589
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1589
+	beq	.L1625
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L1625
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1555
+	cbz	w2, .L1591
 	adrp	x2, .LANCHOR170
 	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1555
+	bhi	.L1591
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1555:
-	cbz	w1, .L1556
+.L1591:
+	cbz	w1, .L1592
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1556:
+.L1592:
 	ldrb	w2, [x19, 8]
-	adrp	x0, .LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR88
+	adrp	x0, .LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1557
-	mov	w2, 3128
+	cbnz	w0, .L1593
+	mov	w2, 3159
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10624,33 +10882,33 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1557:
+.L1593:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
 	ldrh	w0, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w22
-	bls	.L1605
-	adrp	x25, .LANCHOR84
+	bls	.L1641
+	adrp	x25, .LANCHOR83
 	ubfiz	x21, x22, 1, 16
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	ldrh	w20, [x0, x21]
-	cbnz	w20, .L1605
+	cbnz	w20, .L1641
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1559
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	cbnz	w0, .L1595
+	ldr	x0, [x25, #:lo12:.LANCHOR83]
 	mov	w1, -1
 	strh	w1, [x0, x21]
-	ldrh	w1, [x27, #:lo12:.LANCHOR86]
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1605
-	mov	w2, 3144
+	ble	.L1641
+	mov	w2, 3175
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10661,18 +10919,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1605
-.L1589:
+	b	.L1641
+.L1625:
 	mov	w1, 0
-	b	.L1556
-.L1559:
-	ldrh	w1, [x27, #:lo12:.LANCHOR86]
+	b	.L1592
+.L1595:
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1561
-	mov	w2, 3147
+	ble	.L1597
+	mov	w2, 3178
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10683,24 +10941,24 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1561:
+.L1597:
 	adrp	x1, .LANCHOR38
-	adrp	x25, .LANCHOR78
+	adrp	x25, .LANCHOR77
 	mov	w2, 56
 	mov	x3, 8
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x26, x19, 16
-	ldr	x4, [x25, #:lo12:.LANCHOR78]
+	ldr	x4, [x25, #:lo12:.LANCHOR77]
 	mov	x5, x26
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1562:
+.L1598:
 	cmp	x1, x0
-	bne	.L1564
-	cbnz	w20, .L1565
-	mov	w2, 3159
+	bne	.L1600
+	cbnz	w20, .L1601
+	mov	w2, 3190
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10711,26 +10969,26 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1565:
+.L1601:
 	adrp	x0, .LANCHOR28
-	adrp	x28, .LANCHOR79
+	adrp	x28, .LANCHOR78
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1566
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	cbz	w0, .L1602
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
 	cmp	x19, x0
-	bne	.L1566
-	ldr	x0, [x28, #:lo12:.LANCHOR79]
+	bne	.L1602
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1566
+	bls	.L1602
 	strb	wzr, [x19, 8]
-.L1566:
+.L1602:
 	adrp	x0, .LANCHOR204
 	ldrh	w0, [x0, #:lo12:.LANCHOR204]
 	cmp	w0, w22
-	bne	.L1567
-	mov	w2, 3166
+	bne	.L1603
+	mov	w2, 3197
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10741,18 +10999,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1567:
+.L1603:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
 	adrp	x5, .LANCHOR167
 	adrp	x4, .LANCHOR168
-	ldr	x1, [x28, #:lo12:.LANCHOR79]
-	cbnz	w0, .L1568
+	ldr	x1, [x28, #:lo12:.LANCHOR78]
+	cbnz	w0, .L1604
 	ldrh	w0, [x1, x21]
-	cbz	w0, .L1569
+	cbz	w0, .L1605
 	ldrh	w2, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w2
-.L1617:
+.L1653:
 	strh	w0, [x1, x21]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR167]
@@ -10760,15 +11018,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR167]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1571:
-	ldr	x0, [x28, #:lo12:.LANCHOR79]
+.L1607:
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w1, [x0, x21]
 	adrp	x0, .LANCHOR169
 	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1572
+	bls	.L1608
 	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1572:
+.L1608:
 	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
 	ldr	w1, [x4, #:lo12:.LANCHOR168]
@@ -10784,65 +11042,65 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x25, #:lo12:.LANCHOR78]
+	ldr	x0, [x25, #:lo12:.LANCHOR77]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1573:
+.L1609:
 	cmp	x1, x2
-	bne	.L1574
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1575
+	bne	.L1610
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L1611
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1576
+	bne	.L1612
 	mov	w1, 0
-.L1618:
+.L1654:
 	bl	FlashEraseBlocks
-.L1575:
+.L1611:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x25, #:lo12:.LANCHOR78]
+	ldr	x0, [x25, #:lo12:.LANCHOR77]
 	mov	x24, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1577:
+.L1613:
 	cmp	w20, w24, uxth
-	bhi	.L1579
-	cbz	w1, .L1580
+	bhi	.L1615
+	cbz	w1, .L1616
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1580:
+.L1616:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1581
-	adrp	x0, .LANCHOR84
+	cbnz	w0, .L1617
+	adrp	x0, .LANCHOR83
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, x21]
-	b	.L1605
-.L1564:
+	b	.L1641
+.L1600:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1563
+	beq	.L1599
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1563:
+.L1599:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1562
-.L1569:
+	b	.L1598
+.L1605:
 	mov	w0, 2
-	b	.L1617
-.L1568:
+	b	.L1653
+.L1604:
 	ldrh	w0, [x1, x21]
 	add	w0, w0, 1
 	strh	w0, [x1, x21]
@@ -10851,22 +11109,22 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR168]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.10
-	b	.L1571
-.L1574:
+	b	.L1607
+.L1610:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1573
-.L1576:
+	b	.L1609
+.L1612:
 	mov	w1, 1
-	b	.L1618
-.L1579:
+	b	.L1654
+.L1615:
 	mul	x0, x24, x3
-	ldr	x2, [x25, #:lo12:.LANCHOR78]
+	ldr	x2, [x25, #:lo12:.LANCHOR77]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1578
+	bne	.L1614
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10879,15 +11137,15 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1578:
+.L1614:
 	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1577
-.L1581:
-	adrp	x1, .LANCHOR53
+	b	.L1613
+.L1617:
+	adrp	x1, .LANCHOR52
 	adrp	x2, .LANCHOR159
 	strh	wzr, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	strh	w22, [x19]
 	strb	wzr, [x19, 6]
 	mul	w0, w0, w1
@@ -10895,17 +11153,17 @@ allocate_data_superblock:
 	str	w1, [x19, 12]
 	add	w1, w1, 1
 	str	w1, [x2, #:lo12:.LANCHOR159]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1582
+	cbz	w0, .L1618
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1552
-.L1582:
-	mov	w2, 3225
+	cbnz	w0, .L1588
+.L1618:
+	mov	w2, 3256
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10916,7 +11174,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1552:
+.L1588:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10925,7 +11183,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1614:
+.L1650:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10937,24 +11195,24 @@ FtlGcFreeBadSuperBlk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR117
+	adrp	x21, .LANCHOR116
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR117]
+	ldrh	w0, [x21, #:lo12:.LANCHOR116]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1620
-	adrp	x23, .LANCHOR118
-	add	x24, x23, :lo12:.LANCHOR118
+	cbz	w0, .L1656
+	adrp	x23, .LANCHOR117
+	add	x24, x23, :lo12:.LANCHOR117
 	mov	w19, 0
-.L1621:
+.L1657:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1627
+	bhi	.L1663
 	bl	FtlGcReFreshBadBlk
-.L1620:
+.L1656:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10963,28 +11221,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1627:
+.L1663:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR117
+	add	x22, x21, :lo12:.LANCHOR116
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1622:
+.L1658:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1626
+	bhi	.L1662
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1621
-.L1626:
-	add	x0, x23, :lo12:.LANCHOR118
+	b	.L1657
+.L1662:
+	add	x0, x23, :lo12:.LANCHOR117
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1623
+	bne	.L1659
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10992,22 +11250,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1624:
+.L1660:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1625
+	bhi	.L1661
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1623:
+.L1659:
 	and	w20, w27, 65535
-	b	.L1622
-.L1625:
+	b	.L1658
+.L1661:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1624
+	b	.L1660
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -11015,29 +11273,29 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1633
+	cbnz	w0, .L1669
 	adrp	x0, .LANCHOR204
 	ldrh	w1, [x0, #:lo12:.LANCHOR204]
 	cmp	w1, w19
-	bne	.L1634
+	bne	.L1670
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR204]
-.L1635:
-	adrp	x20, .LANCHOR86
+.L1671:
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
-	cbnz	w0, .L1637
-	mov	w2, 3336
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L1673
+	mov	w2, 3367
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11048,23 +11306,23 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1637:
-	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+.L1673:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR86]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR89
-	ldrh	w1, [x20, #:lo12:.LANCHOR86]
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x20, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	add	w0, w0, w1
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1641
-	mov	w2, 3339
+	ble	.L1677
+	mov	w2, 3370
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11075,32 +11333,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1641:
+.L1677:
 	mov	w0, 1
-	b	.L1632
-.L1634:
+	b	.L1668
+.L1670:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w0, w19
+	beq	.L1676
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1640
+	beq	.L1676
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L1640
-	adrp	x0, .LANCHOR94
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
-	cmp	w0, w19
-	bne	.L1635
-.L1640:
+	bne	.L1671
+.L1676:
 	mov	w0, 0
-.L1632:
+.L1668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1633:
+.L1669:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1640
+	b	.L1676
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11114,21 +11372,21 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1644
-	adrp	x20, .LANCHOR84
+	beq	.L1680
+	adrp	x20, .LANCHOR83
 	ubfiz	x21, x19, 1, 16
-	ldr	x1, [x20, #:lo12:.LANCHOR84]
+	ldr	x1, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1645
+	cbnz	w0, .L1681
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1646
-	mov	w2, 3354
+	cbnz	w0, .L1682
+	mov	w2, 3385
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11139,23 +11397,23 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1646:
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
-	adrp	x6, .LANCHOR88
-	add	x6, x6, :lo12:.LANCHOR88
+.L1682:
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
+	adrp	x6, .LANCHOR87
+	add	x6, x6, :lo12:.LANCHOR87
 	mov	w1, 32
 	strh	w1, [x0, x21]
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1647
-	adrp	x22, .LANCHOR89
+	cbz	w0, .L1683
+	adrp	x22, .LANCHOR88
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
-	ldrh	w0, [x22, #:lo12:.LANCHOR89]
-	cbnz	w0, .L1648
-	mov	w2, 3358
+	ldrh	w0, [x22, #:lo12:.LANCHOR88]
+	cbnz	w0, .L1684
+	mov	w2, 3389
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11166,59 +11424,59 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1648:
-	ldrh	w0, [x22, #:lo12:.LANCHOR89]
+.L1684:
+	ldrh	w0, [x22, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
-	strh	w0, [x22, #:lo12:.LANCHOR89]
+	strh	w0, [x22, #:lo12:.LANCHOR88]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	mov	w1, w19
 	ldrh	w2, [x0, x21]
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1647:
+.L1683:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1651:
+.L1687:
 	mov	w20, 0
-	b	.L1643
-.L1645:
+	b	.L1679
+.L1681:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1644:
+.L1680:
 	adrp	x21, .LANCHOR133
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1650
+	bne	.L1686
 	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1651
-.L1650:
+	b	.L1687
+.L1686:
 	cmp	w19, w0
-	beq	.L1651
+	beq	.L1687
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR82
-	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR81
+	adrp	x0, .LANCHOR82
 	strh	w19, [x21, #:lo12:.LANCHOR133]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR84
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR83
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1643
+	cbnz	w1, .L1679
 	cmp	w19, w0, uxth
-	beq	.L1643
-	mov	w2, 3379
+	beq	.L1679
+	mov	w2, 3410
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11229,7 +11487,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1643:
+.L1679:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11242,7 +11500,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1668
+	cbz	w1, .L1704
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11251,46 +11509,46 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1656
+	beq	.L1692
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
-	adrp	x22, .LANCHOR8
+	adrp	x22, .LANCHOR15
 	adrp	x21, .LANCHOR120
 	add	x0, x0, 8
-	add	x23, x22, :lo12:.LANCHOR8
+	add	x23, x22, :lo12:.LANCHOR15
 	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1660:
+.L1696:
 	cmp	w0, w20
-	beq	.L1662
+	beq	.L1698
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1663
+	bne	.L1699
 	ldrb	w1, [x23]
-	cbnz	w1, .L1663
+	cbnz	w1, .L1699
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1663
+	bne	.L1699
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1662
+	cbnz	w0, .L1698
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1671:
+.L1707:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1656:
+.L1692:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1662:
+.L1698:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11298,39 +11556,39 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1661
+	bne	.L1697
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1661:
+.L1697:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1660
-.L1663:
-	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1656
+	b	.L1696
+.L1699:
+	ldrb	w1, [x22, #:lo12:.LANCHOR15]
+	cbz	w1, .L1692
 	cmp	w0, 1
-	bne	.L1656
-	adrp	x0, .LANCHOR54
+	bne	.L1692
+	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1656
+	bcc	.L1692
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	b	.L1671
-.L1668:
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	b	.L1707
+.L1704:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11348,8 +11606,8 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1673
-	mov	w2, 3276
+	bne	.L1709
+	mov	w2, 3307
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11360,13 +11618,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1673:
-	adrp	x20, .LANCHOR53
+.L1709:
+	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1674
-	mov	w2, 3277
+	bne	.L1710
+	mov	w2, 3308
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11377,10 +11635,10 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1674:
+.L1710:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1675
-	mov	w2, 3278
+	cbnz	w0, .L1711
+	mov	w2, 3309
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11391,120 +11649,120 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1675:
+.L1711:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
-	adrp	x23, .LANCHOR8
+	adrp	x23, .LANCHOR15
 	add	x0, x0, 8
 	adrp	x24, .LANCHOR120
-	add	x23, x23, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR15
 	add	x24, x24, :lo12:.LANCHOR120
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1676:
+.L1712:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1677
+	beq	.L1713
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1679
+	bne	.L1715
 	ldrb	w3, [x23]
-	cbnz	w3, .L1679
+	cbnz	w3, .L1715
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1679
+	bne	.L1715
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1677:
+.L1713:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1678
+	bne	.L1714
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1678:
+.L1714:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1676
-.L1679:
-	adrp	x23, .LANCHOR8
+	b	.L1712
+.L1715:
+	adrp	x23, .LANCHOR15
 	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
-	add	x23, x23, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR15
 	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1680:
+.L1716:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1682:
+.L1718:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1681
+	bne	.L1717
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1681:
+.L1717:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1682
+	beq	.L1718
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1683
+	bne	.L1719
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1684
+	cbnz	w2, .L1720
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1683
+	bne	.L1719
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1683
+	cbz	w0, .L1719
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1680
-.L1684:
-	adrp	x1, .LANCHOR54
-	ldrh	w1, [x1, #:lo12:.LANCHOR54]
+	b	.L1716
+.L1720:
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1683
+	bcc	.L1719
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1683:
+.L1719:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1672
+	bne	.L1708
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1672
-	mov	w2, 3322
+	cbz	w0, .L1708
+	mov	w2, 3353
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11515,7 +11773,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1672:
+.L1708:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11532,14 +11790,14 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR77
+	adrp	x24, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x24, #:lo12:.LANCHOR77]
+	ldr	w0, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x24, [x29, 104]
-	cbnz	w0, .L1697
+	cbnz	w0, .L1733
 	adrp	x26, .LANCHOR188
 	adrp	x28, .LANCHOR202
 	adrp	x23, .LANCHOR209
@@ -11560,20 +11818,20 @@ FtlVpcTblFlush:
 	adrp	x27, .LANCHOR40
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
-	adrp	x2, .LANCHOR81
-	add	x19, x2, :lo12:.LANCHOR81
+	adrp	x2, .LANCHOR80
+	add	x19, x2, :lo12:.LANCHOR80
 	str	wzr, [x20, 12]
-	str	w3, [x2, #:lo12:.LANCHOR81]
-	mov	w2, 80
+	str	w3, [x2, #:lo12:.LANCHOR80]
+	mov	w2, 83
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR45
 	str	w2, [x19, 4]
-	adrp	x2, .LANCHOR92
+	adrp	x2, .LANCHOR91
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	strb	w1, [x19, 10]
-	add	x1, x2, :lo12:.LANCHOR92
-	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	add	x1, x2, :lo12:.LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	strh	w2, [x19, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -11581,9 +11839,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 16]
-	adrp	x2, .LANCHOR93
-	add	x1, x2, :lo12:.LANCHOR93
-	ldrh	w2, [x2, #:lo12:.LANCHOR93]
+	adrp	x2, .LANCHOR92
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
@@ -11591,9 +11849,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 20]
-	adrp	x2, .LANCHOR94
-	add	x1, x2, :lo12:.LANCHOR94
-	ldrh	w2, [x2, #:lo12:.LANCHOR94]
+	adrp	x2, .LANCHOR93
+	add	x1, x2, :lo12:.LANCHOR93
+	ldrh	w2, [x2, #:lo12:.LANCHOR93]
 	strh	w2, [x19, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -11609,14 +11867,14 @@ FtlVpcTblFlush:
 	adrp	x1, .LANCHOR160
 	ldr	w1, [x1, #:lo12:.LANCHOR160]
 	str	w1, [x19, 36]
+	adrp	x1, .LANCHOR112
+	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	strh	w1, [x19, 44]
 	adrp	x1, .LANCHOR113
 	ldrh	w1, [x1, #:lo12:.LANCHOR113]
-	strh	w1, [x19, 44]
-	adrp	x1, .LANCHOR114
-	ldrh	w1, [x1, #:lo12:.LANCHOR114]
 	strh	w1, [x19, 46]
-	adrp	x1, .LANCHOR58
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR57
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x21, 8]
@@ -11624,10 +11882,10 @@ FtlVpcTblFlush:
 	mov	w2, 48
 	mov	x19, x28
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w2, [x27, #:lo12:.LANCHOR40]
 	ldr	x0, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
@@ -11642,13 +11900,13 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L1698
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L1734
 	ldrh	w0, [x27, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	ldr	x3, [x21, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR67]
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
 	adrp	x1, .LANCHOR131
@@ -11658,17 +11916,17 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1698:
+.L1734:
 	add	x28, x19, :lo12:.LANCHOR202
 	mov	w0, 0
 	add	x24, x23, :lo12:.LANCHOR209
 	bl	FtlUpdateVaildLpn
-	adrp	x23, .LANCHOR54
+	adrp	x23, .LANCHOR53
 	mov	w21, 0
-	add	x23, x23, :lo12:.LANCHOR54
+	add	x23, x23, :lo12:.LANCHOR53
 	mov	w27, 65535
 	str	x23, [x29, 96]
-.L1699:
+.L1735:
 	ldrh	w2, [x24, 2]
 	ldrh	w1, [x24]
 	ldr	x0, [x25, #:lo12:.LANCHOR183]
@@ -11680,7 +11938,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1700
+	blt	.L1736
 	ldrh	w27, [x24, 4]
 	strh	wzr, [x24, 2]
 	strh	w1, [x24, 4]
@@ -11694,7 +11952,7 @@ FtlVpcTblFlush:
 	strh	w0, [x24]
 	strh	w0, [x20, 2]
 	str	w1, [x20, 4]
-.L1700:
+.L1736:
 	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
@@ -11706,10 +11964,10 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x24, 2]
 	cmn	w1, #1
-	bne	.L1701
+	bne	.L1737
 	cmp	w0, 1
-	bne	.L1702
-	mov	w2, 1209
+	bne	.L1738
+	mov	w2, 1217
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR210
@@ -11720,19 +11978,19 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1702:
+.L1738:
 	ldrh	w0, [x24, 2]
 	cmp	w0, 1
-	bne	.L1703
+	bne	.L1739
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x24, 2]
-.L1703:
+.L1739:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1699
+	bls	.L1735
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, w21
 	adrp	x0, .LC38
@@ -11741,8 +11999,8 @@ FtlVpcTblFlush:
 	bl	printf
 	ldr	x1, [x29, 104]
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR77]
-.L1697:
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.L1733:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11751,18 +12009,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1701:
+.L1737:
 	cmp	w0, 1
-	beq	.L1699
+	beq	.L1735
 	cmp	w1, 256
-	beq	.L1699
+	beq	.L1735
 	mov	w0, 65535
 	cmp	w27, w0
-	beq	.L1697
+	beq	.L1733
 	mov	w1, 1
 	mov	w0, w27
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1697
+	b	.L1733
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11770,22 +12028,22 @@ FtlVpcTblFlush:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	stp	x29, x30, [sp, -128]!
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
 	str	x23, [sp, 48]
-	ldr	w23, [x1, #:lo12:.LANCHOR77]
+	ldr	w23, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1716
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1727
+	cbnz	w23, .L1752
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L1763
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1727
+	bne	.L1763
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1718:
+.L1754:
 	adrp	x1, .LANCHOR188
 	mov	x19, x0
 	mov	w0, -1
@@ -11809,41 +12067,41 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1719:
+.L1755:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1722
+	beq	.L1758
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1720
-.L1722:
+	cbnz	w0, .L1756
+.L1758:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR84]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
-.L1716:
+.L1752:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1727:
+.L1763:
 	mov	w21, 12
-	b	.L1718
-.L1720:
+	b	.L1754
+.L1756:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1722
+	beq	.L1758
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -11857,7 +12115,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1719
+	b	.L1755
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11877,9 +12135,9 @@ FtlLoadFactoryBbt:
 	stp	x27, x28, [sp, 80]
 	add	x28, x26, :lo12:.LANCHOR51
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR75
+	adrp	x20, .LANCHOR74
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR75
+	add	x20, x20, :lo12:.LANCHOR74
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR188
 	adrp	x23, .LANCHOR45
@@ -11889,10 +12147,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1733:
+.L1769:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1738
+	bcc	.L1774
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11901,18 +12159,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1738:
+.L1774:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
 	add	x24, x22, :lo12:.LANCHOR202
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1734:
+.L1770:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1736
+	bgt	.L1772
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11924,19 +12182,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1735
+	beq	.L1771
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1735
+	bne	.L1771
 	strh	w19, [x20]
-.L1736:
+.L1772:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1733
-.L1735:
+	b	.L1769
+.L1771:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1734
+	b	.L1770
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11950,10 +12208,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1744
-	adrp	x1, .LANCHOR54
-	ldrh	w19, [x1, #:lo12:.LANCHOR54]
-.L1745:
+	bne	.L1780
+	adrp	x1, .LANCHOR53
+	ldrh	w19, [x1, #:lo12:.LANCHOR53]
+.L1781:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11967,24 +12225,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1746
+	bne	.L1782
 	mov	w22, 0
 	mov	w24, 2
-.L1747:
+.L1783:
 	cmp	w22, w19
-	ble	.L1750
-.L1746:
+	ble	.L1786
+.L1782:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1744:
-	adrp	x1, .LANCHOR53
-	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-	b	.L1745
-.L1750:
+.L1780:
+	adrp	x1, .LANCHOR52
+	ldrh	w19, [x1, #:lo12:.LANCHOR52]
+	b	.L1781
+.L1786:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11996,20 +12254,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1748
+	bne	.L1784
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1748
+	bne	.L1784
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1748
+	beq	.L1784
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1747
-.L1748:
+	b	.L1783
+.L1784:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1747
+	b	.L1783
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12037,11 +12295,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1756:
+.L1792:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1759
+	bgt	.L1795
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12050,7 +12308,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1757
+	bne	.L1793
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12058,30 +12316,30 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1757:
+.L1793:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1758
+	beq	.L1794
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1758
-	adrp	x1, .LANCHOR75
-	add	x0, x1, :lo12:.LANCHOR75
-	strh	w19, [x1, #:lo12:.LANCHOR75]
+	bne	.L1794
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
+	strh	w19, [x1, #:lo12:.LANCHOR74]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1759:
-	adrp	x19, .LANCHOR75
+.L1795:
+	adrp	x19, .LANCHOR74
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR75
-	ldrh	w1, [x19, #:lo12:.LANCHOR75]
+	add	x20, x19, :lo12:.LANCHOR74
+	ldrh	w1, [x19, #:lo12:.LANCHOR74]
 	cmp	w1, w0
-	beq	.L1773
+	beq	.L1809
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1763
+	beq	.L1799
 	add	x0, x22, :lo12:.LANCHOR202
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -12090,23 +12348,23 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1763
+	beq	.L1799
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1763
+	bne	.L1799
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1763
+	bls	.L1799
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR75]
+	strh	w1, [x19, #:lo12:.LANCHOR74]
 	strh	w0, [x20, 4]
-.L1763:
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
-	add	x24, x19, :lo12:.LANCHOR75
+.L1799:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
+	add	x24, x19, :lo12:.LANCHOR74
 	mov	w1, 1
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
@@ -12114,8 +12372,8 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR202
-.L1765:
-	tbz	w20, #31, .L1768
+.L1801:
+	tbz	w20, #31, .L1804
 	mov	w2, 335
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC5
@@ -12127,28 +12385,28 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1767:
-	add	x0, x19, :lo12:.LANCHOR75
+.L1803:
+	add	x0, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1770
+	beq	.L1806
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1770
+	beq	.L1806
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1770
+	bcs	.L1806
 	cmp	w0, w1
-	bcs	.L1770
+	bcs	.L1806
 	bl	FtlSysBlkNumInit
-.L1770:
-	add	x19, x19, :lo12:.LANCHOR75
+.L1806:
+	add	x19, x19, :lo12:.LANCHOR74
 	adrp	x21, .LANCHOR45
 	adrp	x23, .LANCHOR123
 	add	x19, x19, 32
@@ -12156,24 +12414,24 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR123
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w20, 0
-.L1771:
+.L1807:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1772
+	bcc	.L1808
 	mov	w0, 0
-.L1755:
+.L1791:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1758:
+.L1794:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1756
-.L1768:
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	b	.L1792
+.L1804:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
@@ -12184,15 +12442,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1766
+	beq	.L1802
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1767
-.L1766:
+	beq	.L1803
+.L1802:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1765
-.L1772:
+	b	.L1801
+.L1808:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12201,10 +12459,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1771
-.L1773:
+	b	.L1807
+.L1809:
 	mov	w0, -1
-	b	.L1755
+	b	.L1791
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12216,7 +12474,7 @@ ftl_map_blk_gc:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR54
+	adrp	x25, .LANCHOR53
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
@@ -12227,12 +12485,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L1786
+	blt	.L1822
 	ubfiz	x0, x0, 1, 16
 	ldrh	w21, [x20, x0]
-	cbz	w21, .L1786
+	cbz	w21, .L1822
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1786
+	cbnz	w1, .L1822
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12240,41 +12498,41 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x25, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1787
+	bcc	.L1823
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1787:
+.L1823:
 	adrp	x22, .LANCHOR202
 	adrp	x24, .LANCHOR212
 	mov	x23, x22
 	add	x27, x22, :lo12:.LANCHOR202
 	add	x24, x24, :lo12:.LANCHOR212
 	mov	w20, 0
-.L1788:
+.L1824:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1794
+	bhi	.L1830
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1786:
+.L1822:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x25, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1792
+	bcc	.L1828
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1792
-.L1794:
+	b	.L1828
+.L1830:
 	ubfiz	x0, x20, 2, 16
 	add	x1, x26, x0
 	str	x1, [x29, 104]
 	ldr	w1, [x26, x0]
 	cmp	w21, w1, lsr 10
-	bne	.L1789
+	bne	.L1825
 	adrp	x2, .LANCHOR184
 	add	x0, x22, :lo12:.LANCHOR202
 	ldr	x2, [x2, #:lo12:.LANCHOR184]
@@ -12288,7 +12546,7 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1790
+	beq	.L1826
 	mov	w2, 661
 	mov	x1, x24
 	adrp	x0, .LC5
@@ -12299,12 +12557,12 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1790:
+.L1826:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1791
-.L1793:
+	bne	.L1827
+.L1829:
 	ldr	x0, [x29, 104]
 	add	x23, x23, :lo12:.LANCHOR202
 	str	wzr, [x0]
@@ -12312,10 +12570,10 @@ ftl_map_blk_gc:
 	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x23, 4]
 	bl	printf
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR77]
-.L1792:
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L1828:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12324,30 +12582,30 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1791:
+.L1827:
 	cmp	w2, w20
-	bne	.L1793
+	bne	.L1829
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1793
+	bne	.L1829
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1789:
+.L1825:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1788
+	b	.L1824
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	adrp	x1, .LANCHOR77
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1810
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1850
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12355,12 +12613,12 @@ Ftl_write_map_blk_to_last_page:
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
 	ldrh	w0, [x0]
-	ldr	x20, [x19, 16]
-	str	x23, [sp, 48]
+	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bne	.L1801
+	ldr	x20, [x19, 16]
+	bne	.L1837
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1802
+	cbz	w0, .L1838
 	mov	w2, 697
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC5
@@ -12372,7 +12630,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1802:
+.L1838:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12383,73 +12641,83 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1800:
+.L1836:
 	mov	w0, 0
-	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1801:
+.L1837:
 	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR188
-	adrp	x23, .LANCHOR183
-	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR188]
-	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR202
+	adrp	x2, .LANCHOR188
+	adrp	x21, .LANCHOR202
+	add	x1, x21, :lo12:.LANCHOR202
+	adrp	x24, .LANCHOR183
+	ldr	x23, [x19, 40]
+	ldrh	w22, [x20, x0]
 	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR202
-	orr	w0, w0, w21, lsl 10
-	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	str	x1, [x2, 16]
-	str	x0, [x2, 8]
-	ldr	w2, [x19, 48]
-	str	w2, [x1, 4]
-	mov	w2, -1291
-	strh	w2, [x1, 8]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1]
-	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR54
-	ldrh	w2, [x1, #:lo12:.LANCHOR54]
+	ldr	x20, [x2, #:lo12:.LANCHOR188]
+	str	x20, [x1, 16]
+	orr	w0, w0, w22, lsl 10
+	str	w0, [x1, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	str	x0, [x1, 8]
+	ldr	w1, [x19, 48]
+	str	w1, [x20, 4]
+	mov	w1, -1291
+	strh	w1, [x20, 8]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x20]
+	adrp	x1, .LANCHOR53
+	strh	w22, [x20, 2]
+	ldrh	w2, [x1, #:lo12:.LANCHOR53]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR183]
-	mov	w2, 0
-.L1803:
+	ldr	x3, [x24, #:lo12:.LANCHOR183]
+	mov	w0, 0
+.L1839:
 	cmp	w4, w1, uxth
-	bhi	.L1805
+	bhi	.L1841
+	adrp	x0, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbz	w0, .L1842
+	add	x0, x21, :lo12:.LANCHOR202
+	adrp	x1, .LANCHOR57
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	ldr	x0, [x0, 8]
+	bl	js_hash
+	str	w0, [x20, 12]
+.L1842:
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR202
+	add	x0, x21, :lo12:.LANCHOR202
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1800
-.L1805:
-	ldr	w0, [x22, x1, lsl 2]
-	cmp	w21, w0, lsr 10
-	bne	.L1804
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	ubfiz	x0, x2, 1, 16
-	str	w1, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	ldr	w5, [x22, x1, lsl 2]
-	str	w5, [x3, x0, lsl 2]
-.L1804:
+	b	.L1836
+.L1841:
+	ldr	w2, [x23, x1, lsl 2]
+	cmp	w22, w2, lsr 10
+	bne	.L1840
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	ubfiz	x2, x0, 1, 16
+	str	w1, [x3, x2, lsl 2]
+	add	x2, x2, 1
+	ldr	w5, [x23, x1, lsl 2]
+	str	w5, [x3, x2, lsl 2]
+.L1840:
 	add	x1, x1, 1
-	b	.L1803
-.L1810:
+	b	.L1839
+.L1850:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12460,45 +12728,46 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR165
-	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR165
+	stp	x19, x20, [sp, 16]
+	mov	w19, 0
 	stp	x25, x26, [sp, 64]
-	mov	w23, w1
+	adrp	x26, .LANCHOR53
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR77
-	add	x27, x25, :lo12:.LANCHOR77
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR54
-	mov	x19, x0
-	mov	w21, 0
-	add	x0, x24, :lo12:.LANCHOR54
-	stp	x0, x2, [x29, 96]
-.L1814:
-	ldr	w0, [x22]
-	ldrh	w1, [x19, 2]
+	mov	w25, w1
+	stp	x21, x22, [sp, 32]
+	mov	x27, x0
+	adrp	x22, .LANCHOR202
+	stp	x23, x24, [sp, 48]
+	mov	x20, x22
+	add	x23, x22, :lo12:.LANCHOR202
+	add	x28, x26, :lo12:.LANCHOR53
+	str	x2, [x29, 104]
+.L1854:
+	adrp	x1, .LANCHOR165
+	ldr	w0, [x1, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
-	str	w0, [x22]
-	ldrh	w0, [x24, #:lo12:.LANCHOR54]
+	str	w0, [x1, #:lo12:.LANCHOR165]
+	ldrh	w0, [x26, #:lo12:.LANCHOR53]
+	ldrh	w1, [x27, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1815
-	ldrh	w1, [x19]
+	bge	.L1855
+	ldrh	w1, [x27]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1816
-.L1815:
-	mov	x0, x19
+	bne	.L1856
+.L1855:
+	mov	x0, x27
 	bl	Ftl_write_map_blk_to_last_page
-.L1816:
-	ldr	w0, [x27]
-	cbnz	w0, .L1829
-	ldrh	w1, [x19]
-	ldr	x0, [x19, 16]
+.L1856:
+	adrp	x21, .LANCHOR76
+	ldr	w0, [x21, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1871
+	ldrh	w1, [x27]
+	ldr	x0, [x27, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1818
-	mov	w2, 757
+	cbnz	w0, .L1858
+	mov	w2, 759
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12509,12 +12778,12 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1818:
-	ldrh	w1, [x19]
-	ldrh	w0, [x19, 10]
+.L1858:
+	ldrh	w1, [x27]
+	ldrh	w0, [x27, 10]
 	cmp	w1, w0
-	bcc	.L1819
-	mov	w2, 758
+	bcc	.L1859
+	mov	w2, 760
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12525,67 +12794,76 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1819:
-	ldrh	w1, [x19]
-	adrp	x20, .LANCHOR202
-	ldr	x0, [x19, 16]
-	add	x28, x20, :lo12:.LANCHOR202
+.L1859:
+	ldrh	w1, [x27]
+	add	x3, x22, :lo12:.LANCHOR202
+	ldr	x0, [x27, 16]
 	mov	w2, 16
-	ldrh	w26, [x0, x1, lsl 1]
+	str	x3, [x29, 96]
+	ldrh	w24, [x0, x1, lsl 1]
 	mov	w1, 0
-	ldrh	w0, [x19, 2]
-	orr	w0, w0, w26, lsl 10
-	str	w0, [x28, 4]
+	ldrh	w0, [x27, 2]
+	orr	w0, w0, w24, lsl 10
+	str	w0, [x3, 4]
 	ldr	x0, [x29, 104]
-	str	x0, [x28, 8]
+	str	x0, [x3, 8]
 	adrp	x0, .LANCHOR188
 	ldr	x0, [x0, #:lo12:.LANCHOR188]
-	str	x0, [x28, 16]
+	str	x0, [x3, 16]
 	bl	ftl_memset
-	ldr	x0, [x28, 16]
+	ldr	x3, [x29, 96]
+	ldr	w0, [x27, 48]
+	ldr	x6, [x3, 16]
+	str	w0, [x6, 4]
+	ldrh	w0, [x27, 4]
+	strh	w0, [x6]
+	adrp	x0, .LANCHOR1
+	strh	w25, [x6, 8]
+	strh	w24, [x6, 2]
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbz	w0, .L1860
+	adrp	x0, .LANCHOR57
+	ldrh	w1, [x0, #:lo12:.LANCHOR57]
+	ldr	x0, [x3, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
+.L1860:
 	mov	w3, 1
-	ldr	w1, [x19, 48]
-	mov	w2, w3
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	strh	w1, [x0]
+	mov	x0, x23
 	mov	w1, w3
-	strh	w23, [x0, 8]
-	strh	w26, [x0, 2]
-	mov	x0, x28
+	mov	w2, w3
 	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x20, #:lo12:.LANCHOR202]
+	ldrh	w0, [x27, 2]
+	ldr	w1, [x23]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 2]
+	strh	w0, [x27, 2]
 	cmn	w1, #1
-	bne	.L1820
-	ldr	w1, [x28, 4]
+	bne	.L1861
+	ldr	w1, [x23, 4]
 	adrp	x0, .LC40
 	add	x0, x0, :lo12:.LC40
-	add	w21, w21, 1
-	and	w21, w21, 65535
+	add	w19, w19, 1
+	and	w19, w19, 65535
 	bl	printf
-	ldrh	w0, [x19, 2]
+	ldrh	w0, [x27, 2]
 	cmp	w0, 2
-	bhi	.L1821
-	ldr	x0, [x29, 96]
-	ldrh	w0, [x0]
+	bhi	.L1862
+	ldrh	w0, [x28]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L1821:
-	cmp	w21, 3
-	bls	.L1814
+	strh	w0, [x27, 2]
+.L1862:
+	cmp	w19, 3
+	bls	.L1854
 	add	x20, x20, :lo12:.LANCHOR202
-	mov	w2, w21
+	mov	w2, w19
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
-	str	w0, [x25, #:lo12:.LANCHOR77]
-.L1829:
+	str	w0, [x21, #:lo12:.LANCHOR76]
+.L1871:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12594,28 +12872,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1820:
-	cbz	w1, .L1823
-	strh	w26, [x19, 60]
+.L1861:
+	cbz	w1, .L1864
+	strh	w24, [x27, 60]
 	cmp	w0, 1
-	bne	.L1824
-.L1825:
-	str	wzr, [x19, 56]
-	b	.L1814
-.L1824:
+	bne	.L1865
+.L1866:
+	str	wzr, [x27, 56]
+	b	.L1854
+.L1865:
 	cmp	w1, 256
-.L1835:
-	beq	.L1825
-	ldr	w0, [x19, 56]
-	cbnz	w0, .L1825
+.L1879:
+	beq	.L1866
+	ldr	w0, [x27, 56]
+	cbnz	w0, .L1866
 	add	x20, x20, :lo12:.LANCHOR202
-	ldr	x0, [x19, 40]
+	ldr	x0, [x27, 40]
 	ldr	w1, [x20, 4]
-	str	w1, [x0, w23, uxtw 2]
-	b	.L1829
-.L1823:
+	str	w1, [x0, w25, uxtw 2]
+	b	.L1871
+.L1864:
 	cmp	w0, 1
-	b	.L1835
+	b	.L1879
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12625,16 +12903,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
+	adrp	x20, .LANCHOR96
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -12652,32 +12930,32 @@ l2p_flush:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR68
-	add	x20, x20, :lo12:.LANCHOR68
+	adrp	x20, .LANCHOR67
+	add	x20, x20, :lo12:.LANCHOR67
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR97
-.L1839:
+	adrp	x21, .LANCHOR96
+.L1883:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1841
+	bhi	.L1885
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1841:
-	ldr	x1, [x21, #:lo12:.LANCHOR97]
+.L1885:
+	ldr	x1, [x21, #:lo12:.LANCHOR96]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1840
+	tbz	w0, #31, .L1884
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1840:
+.L1884:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1839
+	b	.L1883
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12697,19 +12975,19 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1851
-	adrp	x0, .LANCHOR57
-	adrp	x26, .LANCHOR56
-	adrp	x27, .LANCHOR58
+	bhi	.L1895
+	adrp	x0, .LANCHOR56
+	adrp	x26, .LANCHOR55
+	adrp	x27, .LANCHOR57
 	mov	x25, x2
-	ldrh	w21, [x0, #:lo12:.LANCHOR57]
-	add	x26, x26, :lo12:.LANCHOR56
-	add	x27, x27, :lo12:.LANCHOR58
+	ldrh	w21, [x0, #:lo12:.LANCHOR56]
+	add	x26, x26, :lo12:.LANCHOR55
+	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1845:
-	cbnz	w20, .L1850
-.L1843:
+.L1889:
+	cbnz	w20, .L1894
+.L1887:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12718,7 +12996,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1850:
+.L1894:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR194
 	adrp	x28, .LANCHOR185
@@ -12731,9 +13009,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1847
+	cbz	w2, .L1891
 	cmp	w19, w1
-	beq	.L1847
+	beq	.L1891
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -12741,7 +13019,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1848:
+.L1892:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
@@ -12762,16 +13040,16 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1845
-.L1847:
+	b	.L1889
+.L1891:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1848
-.L1851:
+	b	.L1892
+.L1895:
 	mov	w24, -1
-	b	.L1843
+	b	.L1887
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -12784,8 +13062,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1856
-	mov	w0, 80
+	bne	.L1900
+	mov	w0, 83
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12810,8 +13088,8 @@ Ftl_save_ext_data:
 	adrp	x0, .LANCHOR168
 	ldr	w0, [x0, #:lo12:.LANCHOR168]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR80
-	ldr	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR79
+	ldr	w0, [x0, #:lo12:.LANCHOR79]
 	str	w0, [x2, 32]
 	adrp	x0, .LANCHOR163
 	ldr	w0, [x0, #:lo12:.LANCHOR163]
@@ -12833,7 +13111,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1856:
+.L1900:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12843,31 +13121,31 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1863
+	cbz	w1, .L1907
 	adrp	x1, .LANCHOR170
 	mov	w2, 4
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1859:
+.L1903:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1860
+	bhi	.L1904
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1860:
+.L1904:
 	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1861
+	cbnz	w0, .L1905
 	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1866
-.L1861:
+	bcc	.L1910
+.L1905:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR191]
@@ -12890,10 +13168,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1863:
+.L1907:
 	mov	w1, 32
-	b	.L1859
-.L1866:
+	b	.L1903
+.L1910:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12911,8 +13189,8 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1869
-	mov	w2, 3233
+	bcs	.L1913
+	mov	w2, 3264
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR219
@@ -12923,99 +13201,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1869:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L1870
+.L1913:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1914
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1871
-	adrp	x1, .LANCHOR84
+	beq	.L1915
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x20, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1872
+	cbz	w0, .L1916
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1871:
+.L1915:
 	strb	wzr, [x19, 8]
-	adrp	x0, .LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR93
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	beq	.L1873
+	beq	.L1917
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1873
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1874
-.L1873:
+	beq	.L1917
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L1918
+.L1917:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1875:
+.L1919:
 	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1880
+	beq	.L1924
 	cmp	w20, w0
-	bne	.L1881
-	adrp	x2, .LANCHOR84
+	bne	.L1925
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1882
-.L1881:
+	cbz	w1, .L1926
+.L1925:
 	bl	update_vpc_list
-.L1882:
+.L1926:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1880:
+.L1924:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1870:
+.L1914:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1872:
+.L1916:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1871
-.L1874:
-	adrp	x0, .LANCHOR92
-	add	x2, x0, :lo12:.LANCHOR92
+	b	.L1915
+.L1918:
+	adrp	x0, .LANCHOR91
+	add	x2, x0, :lo12:.LANCHOR91
 	cmp	x19, x2
-	bne	.L1875
+	bne	.L1919
 	cmp	w1, 3
-	beq	.L1877
+	beq	.L1921
 	adrp	x1, .LANCHOR158
 	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1878
-.L1877:
-	add	x1, x0, :lo12:.LANCHOR92
+	bne	.L1922
+.L1921:
+	add	x1, x0, :lo12:.LANCHOR91
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1878:
+.L1922:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1875
+	cbz	w1, .L1919
 	adrp	x1, .LANCHOR170
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
-	bhi	.L1875
-	add	x0, x0, :lo12:.LANCHOR92
+	bhi	.L1919
+	add	x0, x0, :lo12:.LANCHOR91
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1875
+	b	.L1919
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13035,20 +13313,20 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1905
-	adrp	x0, .LANCHOR57
+	bhi	.L1949
+	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR185
 	mov	x25, x2
 	mov	x28, x26
-	ldrh	w20, [x0, #:lo12:.LANCHOR57]
+	ldrh	w20, [x0, #:lo12:.LANCHOR56]
 	mov	w24, 0
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1898:
-	cbnz	w21, .L1904
-.L1896:
+.L1942:
+	cbnz	w21, .L1948
+.L1940:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13057,7 +13335,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1904:
+.L1948:
 	adrp	x0, .LANCHOR194
 	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13071,7 +13349,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1900
+	cbz	w3, .L1944
 	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13087,7 +13365,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L1902
+	bne	.L1946
 	mov	w2, w3
 	mov	w1, w20
 	adrp	x0, .LC42
@@ -13098,28 +13376,28 @@ FtlVendorPartRead:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1902:
+.L1946:
 	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1903:
+.L1947:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1898
-.L1900:
+	b	.L1942
+.L1944:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1903
-.L1905:
+	b	.L1947
+.L1949:
 	mov	w24, -1
-	b	.L1896
+	b	.L1940
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13140,7 +13418,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1908
+	beq	.L1952
 	adrp	x1, .LC43
 	adrp	x0, .LC7
 	add	x1, x1, :lo12:.LC43
@@ -13151,7 +13429,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1908:
+.L1952:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13176,18 +13454,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1911
+	beq	.L1955
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1911:
+.L1955:
 	ldr	w1, [x19, #:lo12:.LANCHOR138]
 	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
 	adrp	x20, .LANCHOR168
-	bne	.L1912
+	bne	.L1956
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
@@ -13208,8 +13486,8 @@ Ftl_load_ext_data:
 	str	w2, [x1, #:lo12:.LANCHOR165]
 	ldp	w1, w2, [x0, 28]
 	str	w1, [x20, #:lo12:.LANCHOR168]
-	adrp	x1, .LANCHOR80
-	str	w2, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR79
+	str	w2, [x1, #:lo12:.LANCHOR79]
 	adrp	x1, .LANCHOR163
 	ldr	w2, [x0, 36]
 	str	w2, [x1, #:lo12:.LANCHOR163]
@@ -13225,7 +13503,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x0, 60]
 	adrp	x0, .LANCHOR158
 	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1912:
+.L1956:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR157
 	str	wzr, [x0, #:lo12:.LANCHOR157]
@@ -13233,7 +13511,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1913
+	bne	.L1957
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
@@ -13242,7 +13520,7 @@ Ftl_load_ext_data:
 	add	x1, x1, :lo12:.LC44
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1913:
+.L1957:
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
@@ -13281,11 +13559,11 @@ ftl_sys_read:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1931
+	cbz	w1, .L1975
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -13293,7 +13571,7 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1917
+	cbnz	w1, .L1961
 	mov	x19, x0
 	adrp	x0, .LANCHOR184
 	adrp	x23, .LANCHOR202
@@ -13305,16 +13583,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1921
-	adrp	x1, .LANCHOR54
-	ldrh	w1, [x1, #:lo12:.LANCHOR54]
+	cbz	w0, .L1965
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1921
+	bge	.L1965
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1921
+	beq	.L1965
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13327,16 +13605,16 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1921
+	beq	.L1965
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1921
+	bne	.L1965
 	ldr	x2, [x21, 8]
-.L1934:
+.L1978:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13344,37 +13622,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1921:
+.L1965:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR202
 	str	w1, [x0, 4]
-	cbz	w1, .L1922
+	cbz	w1, .L1966
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1923:
+.L1967:
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1934
-.L1922:
-	adrp	x1, .LANCHOR58
+	b	.L1978
+.L1966:
+	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1923
-.L1917:
+	b	.L1967
+.L1961:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1931:
+.L1975:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13388,39 +13666,39 @@ FtlScanSysBlk:
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR130
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR65
+	adrp	x21, .LANCHOR64
 	ldr	x0, [x25, #:lo12:.LANCHOR130]
 	adrp	x22, .LANCHOR193
-	ldr	w2, [x21, #:lo12:.LANCHOR65]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR128
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR71
+	adrp	x23, .LANCHOR70
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR129
 	lsl	w2, w2, 2
 	strh	wzr, [x20, #:lo12:.LANCHOR128]
-	strh	wzr, [x23, #:lo12:.LANCHOR71]
+	strh	wzr, [x23, #:lo12:.LANCHOR70]
 	bl	ftl_memset
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
-	ldr	w2, [x21, #:lo12:.LANCHOR65]
-	adrp	x19, .LANCHOR62
-	adrp	x28, .LANCHOR72
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	adrp	x19, .LANCHOR61
+	adrp	x28, .LANCHOR71
 	adrp	x24, .LANCHOR209
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR193]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x28, #:lo12:.LANCHOR72]
+	ldr	x0, [x28, #:lo12:.LANCHOR71]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	mov	w2, 12
+	mov	w2, 16
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR209
 	bl	ftl_memset
@@ -13435,35 +13713,35 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR159
 	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1936:
+.L1980:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1977
+	bls	.L2021
 	adrp	x0, .LANCHOR38
 	adrp	x25, .LANCHOR180
 	adrp	x6, .LANCHOR47
 	mov	x5, 0
 	ldrh	w13, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR104
 	ldr	x7, [x25, #:lo12:.LANCHOR180]
 	mov	w22, 0
-	ldr	x12, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR106
+	ldr	x12, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR105
 	add	x6, x6, :lo12:.LANCHOR47
 	mov	w8, 56
-	ldr	x11, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR59
-	ldrh	w10, [x0, #:lo12:.LANCHOR59]
-	b	.L1978
-.L1938:
+	ldr	x11, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR58
+	ldrh	w10, [x0, #:lo12:.LANCHOR58]
+	b	.L2022
+.L1982:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1937
+	cbnz	w0, .L1981
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13473,19 +13751,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1937:
+.L1981:
 	add	x5, x5, 1
-.L1978:
+.L2022:
 	cmp	w13, w5, uxth
-	bhi	.L1938
-	cbnz	w22, .L1939
-.L1976:
+	bhi	.L1982
+	cbnz	w22, .L1983
+.L2020:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1936
-.L1939:
+	b	.L1980
+.L1983:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13497,7 +13775,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR220
 	add	x0, x0, :lo12:.LANCHOR220
 	str	x0, [x29, 136]
-.L1975:
+.L2019:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -13505,10 +13783,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1942
+	bne	.L1986
 	mov	w5, 16
 	mov	w7, 65535
-.L1944:
+.L1988:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
@@ -13526,71 +13804,71 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1941
+	bne	.L1985
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2014
-.L1942:
+	beq	.L2058
+.L1986:
 	adrp	x0, .LANCHOR159
 	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1945
+	beq	.L1989
 	cmp	w1, w0
-	bhi	.L1946
-.L1945:
+	bhi	.L1990
+.L1989:
 	cmn	w0, #1
-	beq	.L1946
+	beq	.L1990
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1946:
+.L1990:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1948
-	bhi	.L1949
+	beq	.L1992
+	bhi	.L1993
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1950
-.L1947:
+	beq	.L1994
+.L1991:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1975
-	b	.L1976
-.L1941:
+	bne	.L2019
+	b	.L2020
+.L1985:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1942
+	bne	.L1986
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1944
-.L2014:
+	bne	.L1988
+.L2058:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1947
-.L1949:
+	b	.L1991
+.L1993:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1951
+	beq	.L1995
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2014
-	b	.L1947
-.L1951:
+	beq	.L2058
+	b	.L1991
+.L1995:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
-	ldr	w0, [x21, #:lo12:.LANCHOR65]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L1953
+	bls	.L1997
 	ldr	x1, [x29, 136]
-	mov	w2, 1297
+	mov	w2, 1305
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13599,8 +13877,8 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1953:
-	ldr	w6, [x21, #:lo12:.LANCHOR65]
+.L1997:
+	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	and	w2, w6, 65535
@@ -13610,53 +13888,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1954:
+.L1998:
 	cmp	w0, w2
-	bgt	.L1960
-	tbz	w0, #31, .L1995
-	b	.L1947
-.L1960:
+	bgt	.L2004
+	tbz	w0, #31, .L2039
+	b	.L1991
+.L2004:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1955
+	bls	.L1999
 	ldr	w2, [x5]
-	cbnz	w2, .L1956
+	cbnz	w2, .L2000
 	cmp	w6, w1
-	beq	.L1956
+	beq	.L2000
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L1956:
+.L2000:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L1957:
+.L2001:
 	cmp	w1, w0
-	bne	.L1958
+	bne	.L2002
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1947
+	tbnz	w0, #31, .L1991
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
-	ldr	w2, [x21, #:lo12:.LANCHOR65]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1947
-.L1995:
+	bgt	.L1991
+.L2039:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2013:
+.L2057:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1947
-.L1958:
+	b	.L1991
+.L2002:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13668,18 +13946,18 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1957
-.L1955:
+	b	.L2001
+.L1999:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1954
-.L1950:
-	ldrh	w1, [x23, #:lo12:.LANCHOR71]
-	ldrh	w0, [x19, #:lo12:.LANCHOR62]
+	b	.L1998
+.L1994:
+	ldrh	w1, [x23, #:lo12:.LANCHOR70]
+	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L1963
+	bls	.L2007
 	ldr	x1, [x29, 136]
-	mov	w2, 1344
+	mov	w2, 1352
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13688,54 +13966,54 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1963:
-	ldrh	w6, [x19, #:lo12:.LANCHOR62]
-	ldrh	w2, [x23, #:lo12:.LANCHOR71]
+.L2007:
+	ldrh	w6, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L1964:
+.L2008:
 	cmp	w0, w5
-	ble	.L1969
+	ble	.L2013
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1965
+	bls	.L2009
 	ldr	w5, [x1]
-	cbnz	w5, .L1966
+	cbnz	w5, .L2010
 	cmp	w6, w2
-	beq	.L1966
+	beq	.L2010
 	add	w2, w2, 1
-	strh	w2, [x23, #:lo12:.LANCHOR71]
-.L1966:
-	ldr	x6, [x28, #:lo12:.LANCHOR72]
+	strh	w2, [x23, #:lo12:.LANCHOR70]
+.L2010:
+	ldr	x6, [x28, #:lo12:.LANCHOR71]
 	mov	w2, 0
-.L1967:
+.L2011:
 	cmp	w2, w0
-	bne	.L1968
+	bne	.L2012
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1969:
-	tbnz	w0, #31, .L1947
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
-	ldrh	w5, [x23, #:lo12:.LANCHOR71]
+.L2013:
+	tbnz	w0, #31, .L1991
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1947
+	bgt	.L1991
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
-	strh	w5, [x23, #:lo12:.LANCHOR71]
+	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
-	b	.L2013
-.L1968:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	b	.L2057
+.L2012:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13747,55 +14025,55 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1967
-.L1965:
+	b	.L2011
+.L2009:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1964
-.L1948:
+	b	.L2008
+.L1992:
 	ldrh	w5, [x24, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR209
 	cmp	w5, w1
-	bne	.L1971
+	bne	.L2015
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w0, [x2, 8]
-	b	.L1947
-.L1971:
+	b	.L1991
+.L2015:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1972
+	beq	.L2016
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1972:
+.L2016:
 	add	x0, x24, :lo12:.LANCHOR209
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1973
+	bcs	.L2017
 	ldrh	w2, [x24, #:lo12:.LANCHOR209]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w1, [x0, 8]
-	b	.L1947
-.L1973:
+	b	.L1991
+.L2017:
 	strh	w26, [x0, 4]
-	b	.L1947
-.L1977:
+	b	.L1991
+.L2021:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L1979
-.L1982:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	cbz	w0, .L2023
+.L2026:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
 	ldrh	w0, [x1]
-	cbz	w0, .L1980
-.L1981:
+	cbz	w0, .L2024
+.L2025:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
-	ldr	w0, [x21, #:lo12:.LANCHOR65]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2011
-	mov	w2, 1478
+	bls	.L2055
+	mov	w2, 1486
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR220
@@ -13806,7 +14084,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2011:
+.L2055:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13815,24 +14093,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1979:
+.L2023:
 	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L1982
-	ldr	w1, [x21, #:lo12:.LANCHOR65]
+	cbz	w0, .L2026
+	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L1983:
+.L2027:
 	cmp	w0, w1
-	bcs	.L1982
+	bcs	.L2026
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1984
+	cbz	w3, .L2028
 	ldr	x1, [x29, 152]
-	add	x7, x21, :lo12:.LANCHOR65
+	add	x7, x21, :lo12:.LANCHOR64
 	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L1985:
+.L2029:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1982
+	bcs	.L2026
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13844,29 +14122,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1985
-.L1984:
+	b	.L2029
+.L2028:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1983
-.L1980:
-	ldrh	w0, [x23, #:lo12:.LANCHOR71]
-	cbz	w0, .L1981
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	b	.L2027
+.L2024:
+	ldrh	w0, [x23, #:lo12:.LANCHOR70]
+	cbz	w0, .L2025
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L1990:
+.L2034:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1981
+	bge	.L2025
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1991
+	cbz	w3, .L2035
 	ldr	x2, [x29, 144]
-	add	x19, x19, :lo12:.LANCHOR62
+	add	x19, x19, :lo12:.LANCHOR61
 	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L1992:
+.L2036:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1981
+	bge	.L2025
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13878,67 +14156,69 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1992
-.L1991:
+	b	.L2036
+.L2035:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1990
+	b	.L2034
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadSysInfo
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-	stp	x29, x30, [sp, -96]!
-	mov	w1, 0
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR183
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR202
-	stp	x23, x24, [sp, 48]
-	add	x20, x19, :lo12:.LANCHOR202
-	adrp	x24, .LANCHOR183
+	add	x0, x19, :lo12:.LANCHOR202
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR188
+	adrp	x25, .LANCHOR188
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR84
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	adrp	x24, .LANCHOR83
+	ldr	x1, [x23, #:lo12:.LANCHOR183]
 	adrp	x22, .LANCHOR40
-	str	x0, [x20, 8]
+	str	x1, [x0, 8]
 	adrp	x21, .LANCHOR209
-	ldr	x0, [x26, #:lo12:.LANCHOR188]
-	str	x0, [x20, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldr	x1, [x25, #:lo12:.LANCHOR188]
+	str	x1, [x0, 16]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2016
-.L2025:
+	bne	.L2060
+.L2072:
 	mov	w0, -1
-.L2015:
+.L2059:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 112
 	ret
-.L2016:
-	add	x27, x21, :lo12:.LANCHOR209
+.L2060:
+	add	x26, x21, :lo12:.LANCHOR209
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-	sxth	w23, w0
+	ldrsh	w28, [x21, #:lo12:.LANCHOR209]
+	sxth	w20, w0
+	adrp	x27, .LANCHOR57
 	add	w0, w0, 1
-	mov	w28, 61604
-	strh	w0, [x27, 2]
-	mov	w27, 19539
-	movk	w27, 0x4654, lsl 16
-.L2018:
-	tbz	w23, #31, .L2021
-	mov	w2, 1538
+	add	x27, x27, :lo12:.LANCHOR57
+	strh	w0, [x26, 2]
+	adrp	x26, .LANCHOR1
+	add	x26, x26, :lo12:.LANCHOR1
+.L2062:
+	tbz	w20, #31, .L2068
+	mov	w2, 1555
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13949,14 +14229,67 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2020:
-	adrp	x1, .LANCHOR58
+	b	.L2067
+.L2068:
+	add	x3, x19, :lo12:.LANCHOR202
+	orr	w0, w20, w28, lsl 10
+	mov	w2, 1
+	str	x3, [x29, 104]
+	mov	w1, w2
+	str	w0, [x3, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	str	x0, [x3, 8]
+	mov	x0, x3
+	bl	FlashReadPages
+	ldrb	w0, [x26]
+	cbz	w0, .L2063
+	ldr	x3, [x29, 104]
+	ldr	x0, [x3, 16]
+	ldr	w6, [x0, 12]
+	cbz	w6, .L2063
+	ldrh	w1, [x27]
+	ldr	x0, [x3, 8]
+	bl	js_hash
+	cmp	w6, w0
+	beq	.L2063
+	cbnz	w20, .L2064
+	add	x0, x21, :lo12:.LANCHOR209
+	ldrh	w0, [x0, 4]
+	cmp	w28, w0
+	beq	.L2064
+	sxth	w28, w0
+	adrp	x0, .LANCHOR53
+	ldrh	w20, [x0, #:lo12:.LANCHOR53]
+.L2066:
+	sub	w20, w20, #1
+	sxth	w20, w20
+	b	.L2062
+.L2064:
+	mov	w0, -1
+	str	w0, [x19, #:lo12:.LANCHOR202]
+.L2063:
+	ldr	w0, [x19, #:lo12:.LANCHOR202]
+	cmn	w0, #1
+	beq	.L2066
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	mov	w1, 19539
+	movk	w1, 0x4654, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w1
+	bne	.L2066
+	ldr	x0, [x25, #:lo12:.LANCHOR188]
+	ldrh	w1, [x0]
+	mov	w0, 61604
+	cmp	w1, w0
+	bne	.L2066
+.L2067:
+	adrp	x1, .LANCHOR57
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2023
-	mov	w2, 1540
+	bcs	.L2070
+	mov	w2, 1557
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13967,14 +14300,14 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2023:
+.L2070:
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, 48
-	adrp	x20, .LANCHOR81
-	add	x0, x20, :lo12:.LANCHOR81
+	adrp	x20, .LANCHOR80
+	add	x0, x20, :lo12:.LANCHOR80
 	ldr	x1, [x19, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	ldr	x1, [x19, 8]
 	lsl	w2, w2, 1
@@ -13991,12 +14324,12 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR70
-	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L2024
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2071
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR67
-	ldrh	w2, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR66
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
 	lsr	w0, w1, 3
 	add	w1, w0, w1, lsl 1
 	ldr	x0, [x19, 8]
@@ -14007,13 +14340,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR195
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2024:
-	ldr	w2, [x20, #:lo12:.LANCHOR81]
+.L2071:
+	ldr	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	add	x0, x20, :lo12:.LANCHOR81
+	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	bne	.L2025
+	bne	.L2072
 	add	x21, x21, :lo12:.LANCHOR209
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
@@ -14021,33 +14354,33 @@ FtlLoadSysInfo:
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2025
+	bne	.L2072
 	adrp	x0, .LANCHOR222
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR72
 	adrp	x3, .LANCHOR38
 	str	w1, [x0, #:lo12:.LANCHOR222]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	ldrh	w3, [x3, #:lo12:.LANCHOR38]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR56
-	ldrh	w2, [x2, #:lo12:.LANCHOR56]
+	str	w0, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR55
+	ldrh	w2, [x2, #:lo12:.LANCHOR55]
 	mul	w0, w2, w0
-	adrp	x2, .LANCHOR69
-	str	w0, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR68
+	str	w0, [x2, #:lo12:.LANCHOR68]
 	adrp	x0, .LANCHOR42
 	ldr	w2, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR223
 	strh	w0, [x3, #:lo12:.LANCHOR223]
-	bls	.L2026
-	mov	w2, 1567
+	bls	.L2073
+	mov	w2, 1584
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -14058,136 +14391,111 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2026:
-	add	x1, x20, :lo12:.LANCHOR81
-	adrp	x0, .LANCHOR92
-	add	x3, x0, :lo12:.LANCHOR92
-	adrp	x19, .LANCHOR204
-	ldrh	w2, [x1, 16]
-	ldrh	w6, [x1, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR92]
-	lsr	w4, w2, 6
-	and	w2, w2, 63
-	strb	w2, [x3, 6]
-	ldrb	w2, [x1, 11]
-	strb	w2, [x3, 8]
-	add	x2, x19, :lo12:.LANCHOR204
-	strh	w4, [x3, 2]
-	mov	w3, -1
-	strh	w3, [x19, #:lo12:.LANCHOR204]
-	strh	wzr, [x2, 2]
-	strb	wzr, [x2, 6]
-	strb	wzr, [x2, 8]
+.L2073:
+	add	x4, x20, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR91
+	add	x2, x0, :lo12:.LANCHOR91
+	adrp	x5, .LANCHOR204
+	adrp	x19, .LANCHOR92
+	mov	x22, x5
+	ldrh	w1, [x4, 16]
+	ldrh	w6, [x4, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR91]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 11]
+	strb	w1, [x2, 8]
+	add	x1, x5, :lo12:.LANCHOR204
+	strh	w3, [x2, 2]
+	mov	w2, -1
+	strh	w2, [x5, #:lo12:.LANCHOR204]
+	add	x2, x19, :lo12:.LANCHOR92
+	strh	wzr, [x1, 2]
+	strb	wzr, [x1, 6]
+	strb	wzr, [x1, 8]
+	ldrh	w1, [x4, 18]
+	strh	w1, [x19, #:lo12:.LANCHOR92]
+	ldrh	w1, [x4, 20]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 12]
+	strh	w3, [x2, 2]
+	strb	w1, [x2, 8]
 	adrp	x2, .LANCHOR93
-	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR93
-	strh	w3, [x2, #:lo12:.LANCHOR93]
+	ldrh	w1, [x4, 22]
+	add	x3, x2, :lo12:.LANCHOR93
+	strh	w1, [x2, #:lo12:.LANCHOR93]
 	mov	x21, x2
-	ldrh	w3, [x1, 20]
-	lsr	w5, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x4, 6]
-	ldrb	w3, [x1, 12]
-	strh	w5, [x4, 2]
-	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR94
-	ldrh	w3, [x1, 22]
-	add	x5, x4, :lo12:.LANCHOR94
-	strh	w3, [x4, #:lo12:.LANCHOR94]
-	mov	x22, x4
-	ldrh	w3, [x1, 24]
-	lsr	w7, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x5, 6]
-	ldrb	w3, [x1, 13]
-	strb	w3, [x5, 8]
-	adrp	x3, .LANCHOR161
-	strh	w7, [x5, 2]
-	ldr	w5, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR161]
-	adrp	x3, .LANCHOR162
-	str	wzr, [x3, #:lo12:.LANCHOR162]
-	adrp	x3, .LANCHOR166
-	str	wzr, [x3, #:lo12:.LANCHOR166]
-	adrp	x3, .LANCHOR165
-	str	wzr, [x3, #:lo12:.LANCHOR165]
-	adrp	x3, .LANCHOR167
-	str	w5, [x3, #:lo12:.LANCHOR167]
-	adrp	x3, .LANCHOR168
-	str	wzr, [x3, #:lo12:.LANCHOR168]
-	adrp	x3, .LANCHOR169
-	str	wzr, [x3, #:lo12:.LANCHOR169]
-	adrp	x3, .LANCHOR164
-	str	wzr, [x3, #:lo12:.LANCHOR164]
-	ldr	w3, [x1, 40]
+	ldrh	w1, [x4, 24]
+	lsr	w7, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x3, 6]
+	ldrb	w1, [x4, 13]
+	strb	w1, [x3, 8]
+	adrp	x1, .LANCHOR161
+	strh	w7, [x3, 2]
+	ldr	w3, [x4, 32]
+	str	wzr, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR162
+	str	wzr, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR166
+	str	wzr, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR165
+	str	wzr, [x1, #:lo12:.LANCHOR165]
+	adrp	x1, .LANCHOR167
+	str	w3, [x1, #:lo12:.LANCHOR167]
+	adrp	x1, .LANCHOR168
+	str	wzr, [x1, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR169
+	str	wzr, [x1, #:lo12:.LANCHOR169]
+	adrp	x1, .LANCHOR164
+	ldr	w3, [x4, 40]
+	str	wzr, [x1, #:lo12:.LANCHOR164]
 	adrp	x1, .LANCHOR159
-	ldr	w5, [x1, #:lo12:.LANCHOR159]
-	cmp	w3, w5
-	bls	.L2027
+	ldr	w4, [x1, #:lo12:.LANCHOR159]
+	cmp	w3, w4
+	bls	.L2074
 	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2027:
-	add	x20, x20, :lo12:.LANCHOR81
+.L2074:
+	add	x20, x20, :lo12:.LANCHOR80
 	adrp	x1, .LANCHOR160
 	ldr	w3, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2028
+	bls	.L2075
 	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2028:
+.L2075:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2029
-	add	x0, x0, :lo12:.LANCHOR92
+	beq	.L2076
+	add	x0, x0, :lo12:.LANCHOR91
 	bl	make_superblock
-.L2029:
-	ldrh	w2, [x21, #:lo12:.LANCHOR93]
+.L2076:
+	ldrh	w2, [x19, #:lo12:.LANCHOR92]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR93
+	add	x0, x19, :lo12:.LANCHOR92
 	cmp	w2, w1
-	beq	.L2030
+	beq	.L2077
 	bl	make_superblock
-.L2030:
-	ldrh	w2, [x22, #:lo12:.LANCHOR94]
+.L2077:
+	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR94
+	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2031
+	beq	.L2078
 	bl	make_superblock
-.L2031:
-	ldrh	w2, [x19, #:lo12:.LANCHOR204]
+.L2078:
+	ldrh	w2, [x22, #:lo12:.LANCHOR204]
 	mov	w1, 65535
-	add	x0, x19, :lo12:.LANCHOR204
+	add	x0, x22, :lo12:.LANCHOR204
 	cmp	w2, w1
-	beq	.L2032
+	beq	.L2079
 	bl	make_superblock
-.L2032:
+.L2079:
 	mov	w0, 0
-	b	.L2015
-.L2021:
-	ldrh	w0, [x21, #:lo12:.LANCHOR209]
-	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w23, w0, lsl 10
-	str	w0, [x20, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
-	str	x0, [x20, 8]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
-	beq	.L2019
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L2019
-	ldr	x0, [x26, #:lo12:.LANCHOR188]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	beq	.L2020
-.L2019:
-	sub	w23, w23, #1
-	sxth	w23, w23
-	b	.L2018
+	b	.L2059
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14199,7 +14507,7 @@ FtlDumpBlockInfo:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR52
 	stp	x21, x22, [sp, 48]
 	and	w22, w1, 255
 	stp	x23, x24, [sp, 64]
@@ -14207,16 +14515,16 @@ FtlDumpBlockInfo:
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
 	bl	P2V_block_in_plane
-	ldrh	w25, [x19, #:lo12:.LANCHOR53]
+	ldrh	w25, [x19, #:lo12:.LANCHOR52]
 	and	w21, w0, 65535
 	adrp	x1, .LANCHOR224
 	adrp	x0, .LC45
 	add	x1, x1, :lo12:.LANCHOR224
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-	adrp	x1, .LANCHOR84
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x21, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w2, [x1, x0]
 	mov	w1, w21
 	adrp	x0, .LC46
@@ -14225,19 +14533,19 @@ FtlDumpBlockInfo:
 	strh	w21, [x23, -48]!
 	mov	x0, x23
 	bl	make_superblock
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2051
-	cbnz	w22, .L2051
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2104
+	cbnz	w22, .L2104
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2042
-	adrp	x0, .LANCHOR54
-	ldrh	w25, [x0, #:lo12:.LANCHOR54]
-.L2042:
-	ldrh	w3, [x19, #:lo12:.LANCHOR53]
+	bne	.L2095
+	adrp	x0, .LANCHOR53
+	ldrh	w25, [x0, #:lo12:.LANCHOR53]
+.L2095:
+	ldrh	w3, [x19, #:lo12:.LANCHOR52]
 	adrp	x26, .LC48
 	add	x26, x26, :lo12:.LC48
 	mov	w20, 0
@@ -14247,39 +14555,39 @@ FtlDumpBlockInfo:
 	adrp	x0, .LC47
 	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L2043:
-	adrp	x1, .LANCHOR105
+.L2096:
+	adrp	x1, .LANCHOR104
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR180
 	add	x3, x23, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR58
+	ldr	x6, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR57
 	ldrh	w5, [x0, #:lo12:.LANCHOR38]
 	mov	w19, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR106
+	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR105
 	ldr	x0, [x24, #:lo12:.LANCHOR180]
 	mov	w11, 65535
-	ldr	x8, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR59
-	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	ldr	x8, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2044:
+.L2097:
 	cmp	w1, w5
-	bne	.L2046
+	bne	.L2099
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2047:
+.L2100:
 	cmp	x22, x19
-	bne	.L2048
+	bne	.L2101
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2043
-.L2049:
+	bne	.L2096
+.L2102:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14289,13 +14597,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2051:
+.L2104:
 	mov	w21, 0
-	b	.L2042
-.L2046:
+	b	.L2095
+.L2099:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2045
+	beq	.L2098
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14309,12 +14617,12 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2045:
+.L2098:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2044
-.L2048:
+	b	.L2097
+.L2101:
 	ldr	x8, [x24, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
@@ -14330,7 +14638,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2047
+	b	.L2100
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14354,10 +14662,10 @@ FtlScanAllBlock:
 	add	x24, x24, :lo12:.LC50
 	str	x25, [sp, 80]
 	bl	printf
-.L2055:
+.L2108:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2063
+	bhi	.L2116
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14366,16 +14674,16 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2063:
+.L2116:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
 	mov	w3, w0
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x20, 1, 16
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	adrp	x22, .LANCHOR180
 	mov	w19, 0
 	ldrh	w2, [x2, x1]
@@ -14383,33 +14691,33 @@ FtlScanAllBlock:
 	bl	printf
 	add	x0, x29, 80
 	bl	make_superblock
-	adrp	x1, .LANCHOR105
+	adrp	x1, .LANCHOR104
 	adrp	x0, .LANCHOR38
 	add	x3, x29, 96
 	mov	w11, 65535
-	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR58
+	ldr	x6, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR57
 	ldrh	w5, [x0, #:lo12:.LANCHOR38]
 	mov	w12, 56
-	ldrh	w7, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR106
+	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR105
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	ldr	x8, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR59
-	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	ldr	x8, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w10, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 0
-.L2056:
+.L2109:
 	cmp	w1, w5
-	bne	.L2058
+	bne	.L2111
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2059:
+.L2112:
 	cmp	x21, x25
-	bne	.L2060
+	bne	.L2113
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	adrp	x25, .LC51
 	add	x25, x25, :lo12:.LC51
@@ -14417,16 +14725,16 @@ FtlScanAllBlock:
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2061:
+.L2114:
 	cmp	x21, x19
-	bne	.L2062
+	bne	.L2115
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2055
-.L2058:
+	b	.L2108
+.L2111:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2057
+	beq	.L2110
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14440,12 +14748,12 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2057:
+.L2110:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2056
-.L2060:
+	b	.L2109
+.L2113:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
@@ -14461,8 +14769,8 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2059
-.L2062:
+	b	.L2112
+.L2115:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
@@ -14478,96 +14786,99 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2061
+	b	.L2114
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
 	.global	FtlMapTblRecovery
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-	stp	x29, x30, [sp, -144]!
+	stp	x29, x30, [sp, -160]!
 	mov	w1, 0
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	stp	x27, x28, [sp, 80]
+	mov	x28, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR202
-	ldrh	w23, [x0, 6]
-	adrp	x24, .LANCHOR54
+	ldrh	w24, [x0, 6]
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, 40]
-	ldr	x22, [x0, 16]
-	lsl	w2, w23, 2
+	adrp	x21, .LANCHOR183
+	ldr	x22, [x0, 40]
+	ldr	x23, [x0, 16]
+	lsl	w2, w24, 2
 	ldr	x0, [x0, 24]
-	str	x0, [x29, 128]
-	ldrh	w0, [x19, 8]
+	str	x0, [x29, 144]
+	ldrh	w0, [x28, 8]
+	stp	x19, x20, [sp, 16]
+	mov	w19, 0
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	str	w0, [x29, 140]
-	mov	x0, x21
+	adrp	x25, .LANCHOR53
+	str	w0, [x29, 156]
+	mov	x0, x22
 	bl	ftl_memset
-	str	x20, [x29, 120]
-	adrp	x7, .LANCHOR183
-	add	x3, x20, :lo12:.LANCHOR202
-	mov	x26, x7
-	mov	x20, x3
-	ldr	x0, [x7, #:lo12:.LANCHOR183]
-	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR188
-	stp	wzr, wzr, [x19, 48]
-	ldr	x25, [x0, #:lo12:.LANCHOR188]
-	mov	w0, -1
-	str	x25, [x3, 16]
-	strh	w0, [x19]
-	strh	w0, [x19, 2]
-	mov	w0, 1
-	str	w0, [x19, 56]
-	ldr	w0, [x29, 140]
+	stp	wzr, wzr, [x28, 48]
+	adrp	x0, .LANCHOR202
+	add	x4, x0, :lo12:.LANCHOR202
+	ldr	x1, [x21, #:lo12:.LANCHOR183]
+	mov	x27, x4
+	str	x0, [x29, 128]
+	str	x1, [x4, 8]
+	adrp	x1, .LANCHOR188
+	ldr	w0, [x29, 156]
+	ldr	x20, [x1, #:lo12:.LANCHOR188]
+	mov	w1, -1
+	str	x20, [x4, 16]
 	sub	w0, w0, #1
-	str	w0, [x29, 136]
-	add	x0, x24, :lo12:.LANCHOR54
-	str	x0, [x29, 112]
-.L2066:
-	ldr	w0, [x29, 140]
-	cmp	w27, w0
-	bge	.L2083
-	ldr	w0, [x29, 136]
-	sxtw	x28, w27
-	cmp	w27, w0
-	bne	.L2067
-	lsl	x0, x28, 1
+	strh	w1, [x28]
+	strh	w1, [x28, 2]
 	mov	w1, 1
-	add	x24, x22, x0
-	ldrh	w0, [x22, x0]
-	mov	w22, 0
+	str	w0, [x29, 116]
+	add	x0, x25, :lo12:.LANCHOR53
+	str	w1, [x28, 56]
+	str	x0, [x29, 104]
+.L2119:
+	ldr	w0, [x29, 156]
+	cmp	w19, w0
+	bge	.L2138
+	ldr	w0, [x29, 116]
+	sxtw	x26, w19
+	cmp	w19, w0
+	bne	.L2120
+	lsl	x0, x26, 1
+	mov	w1, 1
+	add	x21, x23, x0
+	adrp	x27, .LANCHOR57
+	add	x27, x27, :lo12:.LANCHOR57
+	mov	w25, 0
+	ldrh	w0, [x23, x0]
 	bl	FtlGetLastWrittenPage
-	sxth	w26, w0
+	sxth	w23, w0
 	add	w0, w0, 1
-	strh	w0, [x19, 2]
+	strh	w0, [x28, 2]
+	ldr	x0, [x29, 144]
+	strh	w19, [x28]
+	ldr	w0, [x0, x26, lsl 2]
+	adrp	x26, .LANCHOR1
+	str	w0, [x28, 48]
+	add	x26, x26, :lo12:.LANCHOR1
 	ldr	x0, [x29, 128]
-	strh	w27, [x19]
-	ldr	w0, [x0, x28, lsl 2]
-	str	w0, [x19, 48]
-	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR202
-.L2068:
-	cmp	w22, w26
-	ble	.L2070
-.L2083:
-	mov	x0, x19
+	add	x19, x0, :lo12:.LANCHOR202
+.L2121:
+	cmp	w25, w23
+	ble	.L2124
+.L2138:
+	mov	x0, x28
 	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR54
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR53
+	ldrh	w1, [x28, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2072
-	mov	x0, x19
+	bne	.L2126
+	mov	x0, x28
 	bl	ftl_map_blk_alloc_new_blk
-.L2072:
-	mov	x0, x19
+.L2126:
+	mov	x0, x28
 	bl	ftl_map_blk_gc
-	mov	x0, x19
+	mov	x0, x28
 	bl	ftl_map_blk_gc
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -14575,118 +14886,160 @@ FtlMapTblRecovery:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 160
 	ret
-.L2070:
-	ldrh	w0, [x24]
+.L2124:
+	ldrh	w0, [x21]
 	mov	w2, 1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
+	orr	w0, w25, w0, lsl 10
+	str	w0, [x19, 4]
+	mov	x0, x19
 	bl	FlashReadPages
-	ldr	w0, [x20]
+	ldrb	w0, [x26]
+	cbz	w0, .L2122
+	ldr	x0, [x19, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 156]
+	uxtw	x0, w0
+	cbz	w0, .L2122
+	ldrh	w1, [x27]
+	ldr	x0, [x19, 8]
+	bl	js_hash
+	ldr	w1, [x29, 156]
+	cmp	w1, w0
+	beq	.L2122
+	mov	w0, -1
+	str	w0, [x19]
+.L2122:
+	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2069
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L2069
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
+	beq	.L2123
+	ldrh	w0, [x20, 8]
+	cmp	w24, w0
+	bls	.L2123
+	ldrh	w2, [x20]
+	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2069
+	bne	.L2123
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L2069:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L2068
-.L2067:
-	ldr	x0, [x26, #:lo12:.LANCHOR183]
+	ldr	w1, [x19, 4]
+	str	w1, [x22, x0]
+.L2123:
+	add	w25, w25, 1
+	sxth	w25, w25
+	b	.L2121
+.L2120:
+	lsl	x26, x26, 1
+	ldr	x0, [x21, #:lo12:.LANCHOR183]
+	str	x0, [x27, 8]
+	add	x0, x23, x26
+	ldrh	w1, [x25, #:lo12:.LANCHOR53]
 	mov	w2, 1
-	str	x0, [x20, 8]
-	lsl	x0, x28, 1
-	ldrh	w1, [x24, #:lo12:.LANCHOR54]
-	add	x28, x22, x0
-	ldrh	w0, [x22, x0]
+	str	x0, [x29, 136]
+	ldrh	w0, [x23, x26]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
-	str	w0, [x20, 4]
-	mov	x0, x20
+	str	w0, [x27, 4]
+	mov	x0, x27
 	bl	FlashReadPages
-	ldr	w0, [x20]
+	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2085
-	ldrh	w1, [x25]
-	ldrh	w0, [x19, 4]
+	beq	.L2140
+	ldrh	w1, [x20]
+	ldrh	w0, [x28, 4]
 	cmp	w1, w0
-	bne	.L2085
-	ldrh	w1, [x25, 8]
+	bne	.L2140
+	ldrh	w1, [x20, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2074
-.L2085:
+	beq	.L2128
+.L2140:
+	adrp	x26, .LANCHOR57
+	add	x26, x26, :lo12:.LANCHOR57
+	adrp	x0, .LANCHOR1
 	mov	w5, 0
-.L2075:
-	ldr	x0, [x29, 112]
+	add	x0, x0, :lo12:.LANCHOR1
+	str	x0, [x29, 120]
+.L2129:
+	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2081
-	ldrh	w0, [x28]
+	bge	.L2136
+	ldr	x0, [x29, 136]
 	mov	w2, 1
-	str	w5, [x29, 108]
+	str	w5, [x29, 152]
 	mov	w1, w2
+	ldrh	w0, [x0]
 	orr	w0, w5, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
+	str	w0, [x27, 4]
+	mov	x0, x27
 	bl	FlashReadPages
-	ldr	w0, [x20]
-	ldr	w5, [x29, 108]
+	ldr	x0, [x29, 120]
+	ldr	w5, [x29, 152]
+	ldrb	w0, [x0]
+	cbz	w0, .L2133
+	ldr	x0, [x27, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 152]
+	uxtw	x0, w0
+	cbz	w0, .L2133
+	ldrh	w1, [x26]
+	ldr	x0, [x27, 8]
+	str	w5, [x29, 112]
+	bl	js_hash
+	ldr	w1, [x29, 152]
+	ldr	w5, [x29, 112]
+	cmp	w1, w0
+	beq	.L2133
+	mov	w0, -1
+	str	w0, [x27]
+.L2133:
+	ldr	w0, [x27]
 	cmn	w0, #1
-	beq	.L2079
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L2079
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
+	beq	.L2134
+	ldrh	w0, [x20, 8]
+	cmp	w24, w0
+	bls	.L2134
+	ldrh	w2, [x20]
+	ldrh	w1, [x28, 4]
 	cmp	w2, w1
-	bne	.L2079
+	bne	.L2134
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L2079:
+	ldr	w1, [x27, 4]
+	str	w1, [x22, x0]
+.L2134:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2075
-.L2074:
-	ldrh	w5, [x24, #:lo12:.LANCHOR54]
+	b	.L2129
+.L2128:
+	ldrh	w5, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR183]
+	ldr	x6, [x21, #:lo12:.LANCHOR183]
 	sub	w5, w5, #1
-.L2076:
+.L2130:
 	cmp	w0, w5
-	blt	.L2078
-.L2081:
-	add	w4, w27, 1
-	sxth	w27, w4
-	b	.L2066
-.L2078:
+	blt	.L2132
+.L2136:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L2119
+.L2132:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
-	ldrh	w1, [x10, x1]
-	cmp	w23, w1
-	bls	.L2077
+	ldrh	w1, [x6, x1]
+	cmp	w24, w1
+	bls	.L2131
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x21, x1]
-.L2077:
+	ldr	w2, [x6, x2, lsl 2]
+	str	w2, [x22, x1]
+.L2131:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2076
+	b	.L2130
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -14694,22 +15047,22 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR62
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR62]
+	ldrh	w1, [x1, #:lo12:.LANCHOR61]
 	strh	w1, [x0, 10]
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR71
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR70
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR63
-	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR62
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR72
-	ldr	x1, [x1, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR71
+	ldr	x1, [x1, #:lo12:.LANCHOR71]
 	str	x1, [x0, 16]
 	adrp	x1, .LANCHOR193
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
@@ -14740,188 +15093,19 @@ FtlLoadMapInfo:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
 	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -96]!
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR226
-	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	ldrh	w19, [x23, #:lo12:.LANCHOR226]
-	mov	w0, 65535
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	cmp	w19, w0
-	stp	x27, x28, [sp, 80]
-	beq	.L2115
-	cbnz	w19, .L2098
-.L2099:
-	bl	FtlGcPageVarInit
-	b	.L2100
-.L2115:
-	mov	w19, 0
-.L2098:
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w1
-	beq	.L2099
-.L2100:
-	adrp	x25, .LANCHOR59
-	add	x25, x25, :lo12:.LANCHOR59
-	mov	w26, -1
-	mov	w24, 65535
-.L2112:
-	ldrh	w0, [x20]
-	strb	wzr, [x20, 8]
-	cmp	w0, w24
-	beq	.L2116
-	mov	w27, 56
-.L2114:
-	adrp	x1, .LANCHOR106
-	adrp	x22, .LANCHOR180
-	ldrh	w6, [x25]
-	add	x3, x20, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR38
-	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	mov	w21, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
-	add	x1, x1, 8
-	add	x1, x20, x1, lsl 1
-.L2102:
-	cmp	x3, x1
-	bne	.L2104
-	mov	w1, w21
-	umull	x21, w21, w27
-	mov	x28, 0
-	mov	w2, 0
-	bl	FlashReadPages
-.L2105:
-	cmp	x28, x21
-	bne	.L2113
-	adrp	x0, .LANCHOR53
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	bhi	.L2114
-.L2116:
-	mov	w2, 0
-	b	.L2101
-.L2104:
-	ldrh	w2, [x3]
-	cmp	w2, w24
-	beq	.L2103
-	umaddl	x4, w21, w27, x0
-	orr	w2, w19, w2, lsl 10
-	str	w2, [x4, 4]
-	mul	w2, w21, w6
-	add	w21, w21, 1
-	str	xzr, [x4, 8]
-	and	w21, w21, 65535
-	asr	w2, w2, 2
-	add	x2, x5, x2, sxtw 2
-	str	x2, [x4, 16]
-.L2103:
-	add	x3, x3, 2
-	b	.L2102
-.L2113:
-	ldr	x6, [x22, #:lo12:.LANCHOR180]
-	add	x5, x6, x28
-	ldr	w4, [x5, 4]
-	lsr	w0, w4, 10
-	bl	P2V_plane
-	and	w2, w0, 65535
-	ldr	w0, [x6, x28]
-	cbnz	w0, .L2106
-	ldr	x0, [x5, 16]
-	add	x28, x28, 56
-	ldrh	w1, [x0]
-	cmp	w1, w24
-	bne	.L2107
-	adrp	x0, .LANCHOR135
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR135]
-.L2101:
-	strb	w2, [x20, 6]
-	mov	w0, -1
-	strh	w19, [x20, 2]
-	mov	w1, w19
-	strh	w0, [x23, #:lo12:.LANCHOR226]
-	mov	x0, x20
-	bl	ftl_sb_update_avl_pages
-	mov	w0, w26
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2107:
-	ldp	w2, w0, [x0, 8]
-	mov	w1, w4
-	bl	FtlGcUpdatePage
-	b	.L2105
-.L2106:
-	ldrh	w1, [x20]
-	mov	w2, w4
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
-	bl	printf
-	adrp	x0, .LANCHOR28
-	ldr	w1, [x0, #:lo12:.LANCHOR28]
-	ldrh	w0, [x20]
-	cbnz	w1, .L2108
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2109
-.L2108:
-	adrp	x2, .LANCHOR79
-	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR79]
-	ldrh	w1, [x2, x1]
-	cmp	w1, 159
-	bls	.L2110
-.L2109:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	ldr	w1, [x1, x28]
-	cmn	w1, #1
-	bne	.L2111
-.L2110:
-	ldr	x1, [x22, #:lo12:.LANCHOR180]
-	add	x28, x1, x28
-	ldr	w26, [x28, 4]
-.L2111:
-	adrp	x1, .LANCHOR84
-	ubfiz	x0, x0, 1, 16
-	mov	w19, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x20]
-	bl	INSERT_FREE_LIST
-	mov	w0, -1
-	strh	w0, [x20]
-	bl	FtlGcPageVarInit
-	b	.L2112
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
-	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	stp	x29, x30, [sp, -160]!
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w1
-	adrp	x1, .LANCHOR15
-	add	x1, x1, :lo12:.LANCHOR15
-	stp	x23, x24, [sp, 48]
-	mov	x23, x0
+	mov	x23, x0
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR147
 	ldrh	w0, [x1, 14]
@@ -14942,11 +15126,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2126:
+.L2165:
 	cmp	w19, w20
-	ble	.L2133
+	ble	.L2172
 	mov	w0, -1
-.L2125:
+.L2164:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14954,7 +15138,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2133:
+.L2172:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -14964,37 +15148,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2127
+	beq	.L2166
 	ldr	x0, [x22, #:lo12:.LANCHOR197]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2127
-	cbz	x23, .L2134
-	cbz	w25, .L2129
-.L2132:
+	bne	.L2166
+	cbz	x23, .L2173
+	cbz	w25, .L2168
+.L2171:
 	ldr	x1, [x21, #:lo12:.LANCHOR147]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC53
+	adrp	x0, .LC52
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC53
+	add	x0, x0, :lo12:.LC52
 	bl	rknand_print_hex
-.L2134:
+.L2173:
 	mov	w0, 0
-	b	.L2125
-.L2129:
+	b	.L2164
+.L2168:
 	ldr	x5, [x21, #:lo12:.LANCHOR147]
 	adrp	x2, .LANCHOR149
 	add	x2, x2, :lo12:.LANCHOR149
 	mov	w0, 0
 	mov	w6, 1
-.L2130:
+.L2169:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2132
+	bcs	.L2171
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -15004,11 +15188,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2130
-.L2127:
+	b	.L2169
+.L2166:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2126
+	b	.L2165
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15032,10 +15216,10 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2140
-.L2144:
+	bne	.L2179
+.L2183:
 	mov	w0, 0
-.L2141:
+.L2180:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15044,32 +15228,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2140:
+.L2179:
 	ldr	x4, [x21, #:lo12:.LANCHOR153]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2142:
+.L2181:
 	cmp	w1, w19
-	bge	.L2141
+	bge	.L2180
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2143
+	beq	.L2182
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2143:
+.L2182:
 	cmp	w0, w5
-	bcs	.L2144
+	bcs	.L2183
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2142
+	b	.L2181
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15077,18 +15261,18 @@ FlashGetBadBlockList:
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	w21, [x0, #:lo12:.LANCHOR77]
+	ldr	w21, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2151
+	cbnz	w21, .L2190
 	bl	FtlBbtMemInit
-	adrp	x20, .LANCHOR75
-	add	x22, x20, :lo12:.LANCHOR75
+	adrp	x20, .LANCHOR74
+	add	x22, x20, :lo12:.LANCHOR74
 	bl	FtlLoadFactoryBbt
 	add	x24, x22, 32
 	adrp	x28, .LANCHOR202
@@ -15097,42 +15281,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2152:
+.L2191:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2158
-	adrp	x21, .LANCHOR60
-	add	x21, x21, :lo12:.LANCHOR60
+	bcc	.L2197
+	adrp	x21, .LANCHOR59
+	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2159:
+.L2198:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2160
-	add	x21, x20, :lo12:.LANCHOR75
+	bhi	.L2199
+	add	x21, x20, :lo12:.LANCHOR74
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2161:
+.L2200:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2165
+	bgt	.L2204
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2162
+	beq	.L2201
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2163
+	cbz	w0, .L2202
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2162:
+.L2201:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2161
-.L2158:
+	b	.L2200
+.L2197:
 	adrp	x2, .LANCHOR188
 	adrp	x0, .LANCHOR183
 	add	x19, x28, :lo12:.LANCHOR202
@@ -15144,7 +15328,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2153
+	beq	.L2192
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15159,14 +15343,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2154:
+.L2193:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2152
-.L2153:
+	b	.L2191
+.L2192:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -15179,12 +15363,12 @@ FtlMakeBbt:
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2155:
+.L2194:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2156
+	beq	.L2195
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -15217,34 +15401,34 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2154
+	bne	.L2193
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2155
-.L2156:
+	b	.L2194
+.L2195:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2155
-.L2160:
+	b	.L2194
+.L2199:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2159
-.L2163:
+	b	.L2198
+.L2202:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2164
+	bne	.L2203
 	strh	w19, [x21]
-	b	.L2162
-.L2164:
+	b	.L2201
+.L2203:
 	strh	w19, [x21, 4]
-.L2165:
-	adrp	x0, .LANCHOR78
-	add	x19, x20, :lo12:.LANCHOR75
-	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+.L2204:
+	adrp	x0, .LANCHOR77
+	add	x19, x20, :lo12:.LANCHOR74
+	ldrh	w1, [x20, #:lo12:.LANCHOR74]
 	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	wzr, [x19, 8]
 	lsl	w1, w1, 10
 	strh	wzr, [x19, 2]
@@ -15254,7 +15438,7 @@ FtlMakeBbt:
 	str	w1, [x0, 60]
 	mov	w1, 1
 	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmMapBadBlock
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
@@ -15264,11 +15448,11 @@ FtlMakeBbt:
 	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR75]
+	strh	w1, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmTblFlush
-.L2151:
+.L2190:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15285,31 +15469,25 @@ FtlMakeBbt:
 log2phys:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR56
 	stp	x23, x24, [sp, 48]
-	mov	x23, x1
-	adrp	x1, .LANCHOR57
 	stp	x19, x20, [sp, 16]
+	mov	x26, x1
+	ldrh	w24, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR72
 	stp	x21, x22, [sp, 32]
-	ldrh	w20, [x1, #:lo12:.LANCHOR57]
-	stp	x25, x26, [sp, 64]
-	add	w1, w20, 7
-	mov	x20, 1
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	stp	x27, x28, [sp, 80]
-	lsl	x20, x20, x1
-	sub	w20, w20, #1
-	and	w20, w20, w0
-	lsr	w22, w0, w1
-	and	w1, w20, 65535
-	stp	w2, w1, [x29, 120]
-	adrp	x1, .LANCHOR73
-	and	w21, w22, 65535
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
-	cmp	w0, w1
-	bcc	.L2172
-	mov	w2, 880
-	adrp	x1, .LANCHOR227
+	str	w2, [x29, 116]
+	cmp	w25, w1
+	bcc	.L2211
+	mov	w2, 884
+	adrp	x1, .LANCHOR226
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR227
+	add	x1, x1, :lo12:.LANCHOR226
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15317,37 +15495,44 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2172:
-	adrp	x19, .LANCHOR97
-	adrp	x0, .LANCHOR68
-	ldr	x2, [x19, #:lo12:.LANCHOR97]
-	ldrh	w1, [x0, #:lo12:.LANCHOR68]
+.L2211:
+	ldr	w0, [x19, #:lo12:.LANCHOR72]
+	cmp	w25, w0
+	bcs	.L2212
+	adrp	x19, .LANCHOR96
+	add	w24, w24, 7
+	adrp	x0, .LANCHOR67
+	ldr	x2, [x19, #:lo12:.LANCHOR96]
+	lsr	w23, w25, w24
+	and	w22, w23, 65535
+	ldrh	w1, [x0, #:lo12:.LANCHOR67]
 	mov	x0, 0
-.L2173:
-	and	x25, x0, 65535
-	cmp	w25, w1
-	bcc	.L2178
+.L2213:
+	and	x20, x0, 65535
+	cmp	w20, w1
+	bcc	.L2218
 	bl	select_l2p_ram_region
-	and	x25, x0, 65535
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ubfiz	x26, x25, 4, 16
-	add	x2, x1, x26
-	ldrh	w3, [x1, x26]
+	and	x20, x0, 65535
+	ldr	x1, [x19, #:lo12:.LANCHOR96]
+	ubfiz	x21, x20, 4, 16
+	add	x2, x1, x21
+	ldrh	w3, [x1, x21]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2179
+	beq	.L2219
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2179
+	tbz	w1, #31, .L2219
 	bl	flush_l2p_region
-.L2179:
-	adrp	x28, .LANCHOR67
-	ldrh	w0, [x28, #:lo12:.LANCHOR67]
-	cmp	w0, w21
-	bcs	.L2180
+.L2219:
+	adrp	x0, .LANCHOR66
+	str	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR66]
+	cmp	w1, w22
+	bcs	.L2220
 	mov	w2, 526
-	adrp	x1, .LANCHOR228
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15355,118 +15540,133 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2180:
-	adrp	x24, .LANCHOR131
-	ubfiz	x0, x21, 2, 16
-	ldr	x1, [x24, #:lo12:.LANCHOR131]
+.L2220:
+	adrp	x27, .LANCHOR131
+	ubfiz	x0, x22, 2, 16
+	ldr	x1, [x27, #:lo12:.LANCHOR131]
 	ldr	w3, [x1, x0]
-	cbnz	w3, .L2181
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR58
-	add	x0, x0, x26
-	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	cbnz	w3, .L2221
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	adrp	x1, .LANCHOR57
+	add	x0, x0, x21
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x26
-	strh	w21, [x0, x26]
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x21
+	strh	w22, [x0, x21]
 	str	wzr, [x1, 4]
-	b	.L2174
-.L2178:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w21
-	bne	.L2173
-.L2174:
-	ldp	w0, w20, [x29, 120]
-	cbnz	w0, .L2175
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x0, x0, x25, lsl 4
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x23]
-.L2176:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x25, x0, x25, lsl 4
-	ldr	w0, [x25, 4]
-	cmn	w0, #1
-	beq	.L2186
-	add	w0, w0, 1
-	str	w0, [x25, 4]
-.L2186:
+	b	.L2215
+.L2212:
+	ldr	w1, [x29, 116]
+	mov	w0, -1
+	cbnz	w1, .L2210
+	str	w0, [x26]
+.L2210:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2175:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldr	w2, [x23]
-	add	x0, x0, x25, lsl 4
+.L2218:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L2213
+.L2215:
+	mov	x0, 1
+	lsl	x24, x0, x24
+	ldr	w0, [x29, 116]
+	sub	w24, w24, #1
+	and	w25, w24, w25
+	and	x25, x25, 65535
+	cbnz	w0, .L2216
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x0, x0, x20, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x25, lsl 2]
+	str	w0, [x26]
+.L2217:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x20, x0, x20, lsl 4
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L2226
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L2226:
+	mov	w0, 0
+	b	.L2210
+.L2216:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	ldr	w2, [x26]
+	add	x0, x0, x20, lsl 4
 	ldr	x1, [x0, 8]
-	str	w2, [x1, x20, lsl 2]
+	str	w2, [x1, x25, lsl 2]
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR98
-	strh	w21, [x0, #:lo12:.LANCHOR98]
-	b	.L2176
-.L2181:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR97
+	strh	w22, [x0, #:lo12:.LANCHOR97]
+	b	.L2217
+.L2221:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
 	adrp	x5, .LANCHOR202
-	add	x20, x5, :lo12:.LANCHOR202
+	add	x28, x5, :lo12:.LANCHOR202
 	mov	w2, 1
-	add	x0, x0, x26
-	str	x5, [x29, 104]
-	str	w3, [x29, 116]
+	add	x0, x0, x21
+	str	x5, [x29, 96]
+	str	w3, [x29, 112]
 	mov	w1, w2
-	str	w3, [x20, 4]
+	str	w3, [x28, 4]
 	ldr	x0, [x0, 8]
-	str	x0, [x20, 8]
+	str	x0, [x28, 8]
 	adrp	x0, .LANCHOR188
 	ldr	x0, [x0, #:lo12:.LANCHOR188]
-	str	x0, [x20, 16]
-	mov	x0, x20
+	str	x0, [x28, 16]
+	mov	x0, x28
 	bl	FlashReadPages
-	ldr	x27, [x20, 16]
-	ldr	w3, [x29, 116]
-	ldr	x5, [x29, 104]
-	ldrh	w0, [x27, 8]
-	cmp	w0, w21
-	beq	.L2182
+	ldr	x0, [x28, 16]
+	str	x0, [x29, 120]
+	ldr	w3, [x29, 112]
+	ldr	x5, [x29, 96]
+	ldrh	w0, [x0, 8]
+	cmp	w0, w22
+	beq	.L2222
 	mov	w2, w3
-	and	w1, w22, 65535
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	and	w1, w23, 65535
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-	ldr	x1, [x20, 16]
+	ldr	x1, [x28, 16]
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	ldr	x1, [x24, #:lo12:.LANCHOR131]
+	ldr	x0, [x29, 104]
 	mov	w2, 4
-	ldrh	w3, [x28, #:lo12:.LANCHOR67]
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
+	ldr	x1, [x27, #:lo12:.LANCHOR131]
+	ldrh	w3, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR77]
-.L2183:
-	ldrh	w0, [x27, 8]
-	cmp	w0, w21
-	beq	.L2184
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L2223:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, 8]
+	cmp	w0, w22
+	beq	.L2224
 	mov	w2, 552
-	adrp	x1, .LANCHOR228
+	adrp	x1, .LANCHOR227
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR228
+	add	x1, x1, :lo12:.LANCHOR227
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15474,30 +15674,30 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2184:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x26
+.L2224:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x21
 	str	wzr, [x1, 4]
-	strh	w21, [x0, x26]
-	b	.L2174
-.L2182:
+	strh	w22, [x0, x21]
+	b	.L2215
+.L2222:
 	ldr	w0, [x5, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L2183
-	and	w22, w22, 65535
+	bne	.L2223
+	and	w23, w23, 65535
 	mov	w2, w3
-	mov	w1, w22
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	mov	w1, w23
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w1, w22
-	add	x0, x0, x26
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	mov	w1, w23
+	add	x0, x0, x21
 	ldr	x2, [x0, 8]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	b	.L2183
+	b	.L2223
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -15507,47 +15707,47 @@ FtlProgPages:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR77
+	adrp	x23, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w2, [x23, #:lo12:.LANCHOR77]
+	ldr	w2, [x23, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2191
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2206
+	cbnz	w2, .L2229
+	adrp	x2, .LANCHOR15
+	ldrb	w2, [x2, #:lo12:.LANCHOR15]
+	cbz	w2, .L2244
 	ldrb	w2, [x3, 8]
 	cmp	w2, 1
 	cset	w22, eq
-.L2193:
+.L2231:
 	mov	x20, x3
 	ldrb	w3, [x3, 9]
 	mov	w21, w1
 	mov	x19, x0
 	mov	w2, w22
-	adrp	x25, .LANCHOR53
+	adrp	x25, .LANCHOR52
 	adrp	x24, .LANCHOR138
-	add	x25, x25, :lo12:.LANCHOR53
+	add	x25, x25, :lo12:.LANCHOR52
 	bl	FlashProgPages
 	add	x24, x24, :lo12:.LANCHOR138
 	mov	w1, 56
 	umaddl	x21, w21, w1, x19
-.L2194:
+.L2232:
 	cmp	x19, x21
-	beq	.L2203
-	adrp	x26, .LANCHOR84
-	b	.L2204
-.L2206:
+	beq	.L2241
+	adrp	x26, .LANCHOR83
+	b	.L2242
+.L2244:
 	mov	w22, 0
-	b	.L2193
-.L2197:
+	b	.L2231
+.L2235:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2195
-	ldr	x2, [x26, #:lo12:.LANCHOR84]
+	bne	.L2233
+	ldr	x2, [x26, #:lo12:.LANCHOR83]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20, 4]
 	ldrh	w0, [x2, x1]
@@ -15557,12 +15757,12 @@ FtlProgPages:
 	ldrh	w0, [x25]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L2195:
+.L2233:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2196
+	cbnz	w0, .L2234
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2196:
+.L2234:
 	ldr	w0, [x24, 96]
 	add	w0, w0, 1
 	str	w0, [x24, 96]
@@ -15578,21 +15778,21 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x19
 	bl	FlashProgPages
-	ldr	w0, [x23, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2191
-.L2204:
+	ldr	w0, [x23, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2229
+.L2242:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2197
+	beq	.L2235
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2198
+	bcc	.L2236
 	mov	w2, 1583
-	adrp	x1, .LANCHOR229
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR229
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15600,10 +15800,10 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2198:
+.L2236:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L2199
-.L2211:
+	cbnz	w22, .L2237
+.L2249:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -15616,35 +15816,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w26, w1
 	cmn	w3, #1
-	beq	.L2201
-	adrp	x2, .LANCHOR84
+	beq	.L2239
+	adrp	x2, .LANCHOR83
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2202
-	adrp	x0, .LC57
+	cbnz	w0, .L2240
+	adrp	x0, .LC56
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC57
+	add	x0, x0, :lo12:.LC56
 	bl	printf
-.L2202:
+.L2240:
 	mov	w0, w26
 	bl	decrement_vpc_count
-.L2201:
+.L2239:
 	add	x19, x19, 56
-	b	.L2194
-.L2199:
+	b	.L2232
+.L2237:
 	orr	w0, w0, -2147483648
-	b	.L2211
-.L2203:
+	b	.L2249
+.L2241:
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2191
+	bcc	.L2229
 	mov	w2, 1600
-	adrp	x1, .LANCHOR229
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR229
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15652,7 +15852,7 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2191:
+.L2229:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15665,27 +15865,27 @@ FtlProgPages:
 	.global	FtlCacheWriteBack
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2218
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2256
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR132
 	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2213
-	adrp	x1, .LANCHOR230
+	cbz	x0, .L2251
+	adrp	x1, .LANCHOR229
 	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR230]
+	ldr	x3, [x1, #:lo12:.LANCHOR229]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2213:
+.L2251:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2218:
+.L2256:
 	mov	w0, 0
 	ret
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -15694,9 +15894,9 @@ FtlCacheWriteBack:
 	.global	FtlSysFlush
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2224
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2262
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -15707,7 +15907,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2224:
+.L2262:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -15716,17 +15916,17 @@ FtlSysFlush:
 	.global	FtlDeInit
 	.type	FtlDeInit, %function
 FtlDeInit:
-	adrp	x0, .LANCHOR231
-	ldr	w0, [x0, #:lo12:.LANCHOR231]
+	adrp	x0, .LANCHOR230
+	ldr	w0, [x0, #:lo12:.LANCHOR230]
 	cmp	w0, 1
-	bne	.L2230
+	bne	.L2268
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2230:
+.L2268:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -15748,70 +15948,70 @@ rk_ftl_de_init:
 	.type	ftl_discard, %function
 ftl_discard:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	add	w1, w1, w2
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L2243
+	bhi	.L2281
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L2237
-.L2251:
+	bhi	.L2275
+.L2289:
 	mov	w0, 0
-.L2235:
+.L2273:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2237:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2251
-	adrp	x22, .LANCHOR56
+.L2275:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2289
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L2239
+	beq	.L2277
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L2239:
-	adrp	x20, .LANCHOR232
+.L2277:
+	adrp	x20, .LANCHOR231
 	adrp	x23, .LANCHOR163
-	add	x20, x20, :lo12:.LANCHOR232
+	add	x20, x20, :lo12:.LANCHOR231
 	add	x23, x23, :lo12:.LANCHOR163
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L2240:
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+.L2278:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	cmp	w19, w0
-	bcs	.L2242
-	adrp	x0, .LANCHOR232
-	ldr	w1, [x0, #:lo12:.LANCHOR232]
+	bcs	.L2280
+	adrp	x0, .LANCHOR231
+	ldr	w1, [x0, #:lo12:.LANCHOR231]
 	cmp	w1, 32
-	bls	.L2251
-	str	wzr, [x0, #:lo12:.LANCHOR232]
+	bls	.L2289
+	str	wzr, [x0, #:lo12:.LANCHOR231]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2251
-.L2242:
+	b	.L2289
+.L2280:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L2241
+	beq	.L2279
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -15826,14 +16026,14 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2241:
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+.L2279:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L2240
-.L2243:
+	b	.L2278
+.L2281:
 	mov	w0, -1
-	b	.L2235
+	b	.L2273
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
@@ -15841,46 +16041,46 @@ ftl_discard:
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC58
+	adrp	x0, .LC57
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC57
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	adrp	x20, .LANCHOR202
 	stp	x21, x22, [sp, 48]
 	mov	w19, 0
-	adrp	x21, .LANCHOR73
+	adrp	x21, .LANCHOR72
 	add	x22, x20, :lo12:.LANCHOR202
-	add	x21, x21, :lo12:.LANCHOR73
+	add	x21, x21, :lo12:.LANCHOR72
 	str	x23, [sp, 64]
 	bl	printf
-.L2253:
+.L2291:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2259
+	bcc	.L2297
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2259:
+.L2297:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2254
+	bne	.L2292
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC59
+	adrp	x0, .LC58
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L2254:
+.L2292:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2256
+	beq	.L2294
 	add	x0, x20, :lo12:.LANCHOR202
 	str	wzr, [x20, #:lo12:.LANCHOR202]
 	mov	w2, 0
@@ -15897,25 +16097,25 @@ Ftlscanalldata:
 	ldr	w0, [x20, #:lo12:.LANCHOR202]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2257
+	beq	.L2295
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2256
-.L2257:
+	beq	.L2294
+.L2295:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC60
+	adrp	x0, .LC59
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC59
 	mov	w1, w19
 	bl	printf
-.L2256:
+.L2294:
 	add	w19, w19, 1
-	b	.L2253
+	b	.L2291
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -15925,47 +16125,47 @@ FtlReUsePrevPpa:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR84
+	adrp	x22, .LANCHOR83
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
 	lsr	w0, w1, 10
 	str	x23, [sp, 48]
 	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR84]
+	ldr	x2, [x22, #:lo12:.LANCHOR83]
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2262
-	adrp	x0, .LANCHOR88
-	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2263
-	adrp	x2, .LANCHOR82
+	cbnz	w1, .L2300
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L2301
+	adrp	x2, .LANCHOR81
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR89
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	adrp	x23, .LANCHOR88
+	ldr	x2, [x2, #:lo12:.LANCHOR81]
 	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR89]
+	ldrh	w4, [x23, #:lo12:.LANCHOR88]
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2264:
+.L2302:
 	cmp	w1, w4
-	beq	.L2263
+	beq	.L2301
 	cmp	w19, w3
-	bne	.L2265
+	bne	.L2303
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR89]
-	cbnz	w0, .L2266
-	mov	w2, 2070
-	adrp	x1, .LANCHOR233
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
+	cbnz	w0, .L2304
+	mov	w2, 2097
+	adrp	x1, .LANCHOR232
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR233
+	add	x1, x1, :lo12:.LANCHOR232
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -15973,17 +16173,17 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2266:
-	ldrh	w0, [x23, #:lo12:.LANCHOR89]
+.L2304:
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR89]
+	strh	w0, [x23, #:lo12:.LANCHOR88]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR84]
+	ldr	x1, [x22, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2263:
+.L2301:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -15993,18 +16193,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2265:
+.L2303:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2263
+	beq	.L2301
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2264
-.L2262:
+	b	.L2302
+.L2300:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2263
+	b	.L2301
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16022,19 +16222,19 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2430
+	beq	.L2469
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR52
 	ldrh	w26, [x19, 2]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR53]
+	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2275
+	bne	.L2313
 	strh	wzr, [x19, 4]
-.L2437:
+.L2476:
 	strb	wzr, [x19, 6]
-.L2430:
+.L2469:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16043,35 +16243,35 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2275:
+.L2313:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2276:
+.L2314:
 	cmp	w0, w1
-	beq	.L2277
+	beq	.L2315
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2278
+	bne	.L2316
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2279
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2355
+	beq	.L2317
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L2394
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2280:
-	adrp	x1, .LANCHOR106
+.L2318:
+	adrp	x1, .LANCHOR105
 	adrp	x2, .LANCHOR38
 	adrp	x22, .LANCHOR180
 	add	x4, x19, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR59
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w27, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR59]
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
 	add	x1, x19, 16
 	str	x1, [x29, 184]
 	mov	w8, 65535
@@ -16080,24 +16280,24 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2281:
+.L2319:
 	cmp	x1, x4
-	bne	.L2285
+	bne	.L2323
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2356
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	bne	.L2395
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2286:
+.L2324:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC61
-	adrp	x25, .LANCHOR235
-	add	x24, x24, :lo12:.LC61
-	add	x25, x25, :lo12:.LANCHOR235
+	adrp	x24, .LC60
+	adrp	x25, .LANCHOR234
+	add	x24, x24, :lo12:.LC60
+	add	x25, x25, :lo12:.LANCHOR234
 	mov	x28, 0
 	bl	FlashReadPages
 	adrp	x0, .LANCHOR160
@@ -16105,71 +16305,71 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 168]
 	ldr	w21, [x0, #:lo12:.LANCHOR160]
 	sub	w21, w21, #1
-.L2287:
+.L2325:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2292
-	bne	.L2290
+	bhi	.L2330
+	bne	.L2328
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2432:
+.L2471:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2294
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2294
+	bne	.L2332
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L2332
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2294:
+.L2332:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2295
+	bne	.L2333
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2295:
+.L2333:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2296
-.L2438:
+	beq	.L2334
+.L2477:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2430
-.L2277:
+	b	.L2469
+.L2315:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2276
-.L2278:
+	b	.L2314
+.L2316:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2279
-.L2355:
+	beq	.L2317
+.L2394:
 	mov	w23, w20
-	b	.L2280
-.L2279:
-	cbz	w26, .L2282
-	mov	w2, 2141
-	adrp	x1, .LANCHOR234
+	b	.L2318
+.L2317:
+	cbz	w26, .L2320
+	mov	w2, 2168
+	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR234
+	add	x1, x1, :lo12:.LANCHOR233
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16177,15 +16377,15 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2282:
+.L2320:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2283
-	mov	w2, 2142
-	adrp	x1, .LANCHOR234
+	beq	.L2321
+	mov	w2, 2169
+	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR234
+	add	x1, x1, :lo12:.LANCHOR233
 	add	x0, x0, :lo12:.LC5
 	bl	printf
 	adrp	x1, .LC6
@@ -16193,13 +16393,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2283:
+.L2321:
 	strh	wzr, [x19, 2]
-	b	.L2437
-.L2285:
+	b	.L2476
+.L2323:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2284
+	beq	.L2322
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16210,81 +16410,81 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2284:
+.L2322:
 	add	x4, x4, 2
-	b	.L2281
-.L2356:
+	b	.L2319
+.L2395:
 	str	wzr, [x29, 176]
-	b	.L2286
-.L2292:
+	b	.L2324
+.L2330:
 	mov	x0, 56
 	ldr	x2, [x22, #:lo12:.LANCHOR180]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2288
+	cbnz	w0, .L2326
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2289
+	beq	.L2327
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2289
+	cbz	w0, .L2327
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
 	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2289:
+.L2327:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2291
-.L2290:
+	bne	.L2329
+.L2328:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2432
-.L2288:
+	b	.L2471
+.L2326:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2291:
+.L2329:
 	add	x28, x28, 1
-	b	.L2287
-.L2296:
+	b	.L2325
+.L2334:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2297
-	cbnz	w1, .L2298
-.L2297:
+	bne	.L2335
+	cbnz	w1, .L2336
+.L2335:
 	adrp	x24, .LANCHOR136
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2299
+	bne	.L2337
 	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2299:
+.L2337:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR136]
 	cmp	w0, w23, uxth
-	bge	.L2357
+	bge	.L2396
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2300:
+.L2338:
 	mov	w3, -1
 	adrp	x5, .LANCHOR120
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR120
 	mov	w4, 65535
-.L2301:
+.L2339:
 	cmp	w23, w6
-	bhi	.L2316
+	bhi	.L2354
 	ldr	x1, [x29, 160]
 	mov	w25, 0
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16293,24 +16493,24 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2317
-.L2357:
+	b	.L2355
+.L2396:
 	mov	w23, w26
-	b	.L2300
-.L2303:
+	b	.L2338
+.L2341:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2302
+	beq	.L2340
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2302:
+.L2340:
 	add	x2, x2, 2
-.L2317:
+.L2355:
 	cmp	x2, x1
-	bne	.L2303
+	bne	.L2341
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16319,11 +16519,11 @@ FtlRecoverySuperblock:
 	str	w6, [x29, 136]
 	str	w3, [x29, 152]
 	bl	FlashReadPages
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	mov	w2, 56
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	sxtw	x12, w23
-	ldrb	w10, [x1, #:lo12:.LANCHOR8]
+	ldrb	w10, [x1, #:lo12:.LANCHOR15]
 	mov	w11, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	ldr	w4, [x29, 120]
@@ -16334,81 +16534,81 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2304:
+.L2342:
 	cmp	x25, x1
-	bne	.L2314
-	cbz	w2, .L2315
+	bne	.L2352
+	cbz	w2, .L2353
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2315:
+.L2353:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2301
-.L2314:
+	b	.L2339
+.L2352:
 	ldr	w8, [x1]
-	cbnz	w8, .L2305
+	cbnz	w8, .L2343
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2359
+	beq	.L2398
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2359
+	beq	.L2398
 	cmn	w3, #1
-	bne	.L2361
+	bne	.L2400
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2307
-	cbz	w10, .L2361
-.L2307:
+	bne	.L2345
+	cbz	w10, .L2400
+.L2345:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2306:
+.L2344:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2304
-.L2305:
-	cbz	w2, .L2308
+	b	.L2342
+.L2343:
+	cbz	w2, .L2346
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2308:
-	adrp	x0, .LANCHOR235
+.L2346:
+	adrp	x0, .LANCHOR234
 	ldrh	w1, [x19]
-	strh	w1, [x0, #:lo12:.LANCHOR235]
+	strh	w1, [x0, #:lo12:.LANCHOR234]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2298
+	cbnz	w0, .L2336
 	adrp	x0, .LANCHOR120
 	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2310
+	bne	.L2348
 	cmn	w3, #1
-	beq	.L2311
+	beq	.L2349
 	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2298:
-	adrp	x0, .LANCHOR236
+.L2336:
+	adrp	x0, .LANCHOR235
 	mov	w23, w26
 	mov	w1, 1
 	adrp	x28, .LANCHOR136
-	strh	w1, [x0, #:lo12:.LANCHOR236]
+	strh	w1, [x0, #:lo12:.LANCHOR235]
 	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2318:
+.L2356:
 	ldr	x2, [x29, 160]
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w24, 0
-	ldrb	w5, [x1, #:lo12:.LANCHOR8]
+	ldrb	w5, [x1, #:lo12:.LANCHOR15]
 	mov	w6, 65535
 	ldr	x3, [x29, 184]
 	ldrh	w2, [x2, #:lo12:.LANCHOR38]
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2319:
+.L2357:
 	cmp	x2, x3
-	bne	.L2322
+	bne	.L2360
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16416,103 +16616,103 @@ FtlRecoverySuperblock:
 	mov	w0, 56
 	umull	x0, w24, w0
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR235
-	add	x0, x0, :lo12:.LANCHOR235
+	adrp	x0, .LANCHOR234
+	add	x0, x0, :lo12:.LANCHOR234
 	str	x0, [x29, 120]
-.L2323:
+.L2361:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2348
+	bne	.L2387
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2349
+	bne	.L2388
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2349
-	adrp	x0, .LANCHOR54
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2388
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2349
+	bne	.L2388
 	cmp	w20, w23
-	beq	.L2325
-.L2349:
+	beq	.L2363
+.L2388:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2318
+	bne	.L2356
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2350:
+.L2389:
 	cmp	w0, w1
-	beq	.L2430
+	beq	.L2469
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2351
+	beq	.L2390
 	strb	w0, [x19, 6]
-	b	.L2430
-.L2311:
+	b	.L2469
+.L2349:
 	cmp	w21, w7
-	beq	.L2312
+	beq	.L2350
 	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2298
-.L2312:
+	b	.L2336
+.L2350:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2439:
+.L2478:
 	sub	w0, w0, #1
-.L2433:
+.L2472:
 	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2298
-.L2310:
+	b	.L2336
+.L2348:
 	cmp	w28, w21
-	beq	.L2313
+	beq	.L2351
 	cmn	w28, #1
-	beq	.L2298
+	beq	.L2336
 	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2298
-.L2313:
+	b	.L2336
+.L2351:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2439
-	b	.L2298
-.L2359:
+	bne	.L2478
+	b	.L2336
+.L2398:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2306
-.L2361:
+	b	.L2344
+.L2400:
 	mov	w2, 1
-	b	.L2306
-.L2316:
+	b	.L2344
+.L2354:
 	mov	w0, -1
-	b	.L2433
-.L2322:
+	b	.L2472
+.L2360:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2320
+	beq	.L2358
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2321
-	cbz	w5, .L2321
+	bne	.L2359
+	cbz	w5, .L2359
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2321:
+.L2359:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2320:
+.L2358:
 	add	x3, x3, 2
-	b	.L2319
-.L2348:
+	b	.L2357
+.L2387:
 	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -16521,38 +16721,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2324
+	bcc	.L2362
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2324
+	bhi	.L2362
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2325
+	beq	.L2363
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2326
+	beq	.L2364
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2327
+	beq	.L2365
 	ldrh	w0, [x19]
-.L2435:
+.L2474:
 	bl	decrement_vpc_count
-	b	.L2324
-.L2327:
+	b	.L2362
+.L2365:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2328
+	beq	.L2366
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2328
+	cbz	w0, .L2366
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2328:
+.L2366:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -16560,36 +16760,36 @@ FtlRecoverySuperblock:
 	mov	w0, w24
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR136]
+	ldr	w3, [x29, 196]
 	cmn	w1, #1
-	beq	.L2329
+	beq	.L2367
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2329
-	ldr	w1, [x29, 196]
-	cmn	w1, #1
-	beq	.L2330
+	cbz	w0, .L2367
+	cmn	w3, #1
+	beq	.L2368
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
-	add	x0, x0, x25
-	ldr	x3, [x0, 16]
-	str	w1, [x0, 4]
 	mov	w1, 1
-	str	x3, [x29, 152]
+	add	x0, x0, x25
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 152]
 	bl	FlashReadPages
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	ldr	x3, [x29, 152]
-	add	x4, x0, x25
+	ldr	x4, [x29, 152]
+	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2331
-.L2332:
+	bne	.L2369
+.L2370:
 	mov	w0, -1
 	str	w0, [x29, 196]
-.L2339:
+.L2377:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2324
-.L2354:
+	beq	.L2362
+.L2393:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -16597,11 +16797,11 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2344
-	mov	w2, 2425
-	adrp	x1, .LANCHOR234
+	bhi	.L2383
+	mov	w2, 2456
+	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
-	add	x1, x1, :lo12:.LANCHOR234
+	add	x1, x1, :lo12:.LANCHOR233
 	add	x0, x0, :lo12:.LC5
 	str	w24, [x29, 152]
 	bl	printf
@@ -16611,109 +16811,116 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2344:
-	adrp	x1, .LANCHOR84
+.L2383:
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2345
+	cbz	w0, .L2384
 	mov	w0, w3
-	b	.L2435
-.L2330:
+	b	.L2474
+.L2368:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2324
+	bne	.L2362
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-.L2324:
+.L2362:
 	add	x25, x25, 56
-	b	.L2323
-.L2331:
-	ldr	w0, [x3, 8]
+	b	.L2361
+.L2369:
+	ldr	w0, [x4, 8]
 	cmp	w24, w0
-	bne	.L2332
-	ldr	w0, [x3, 4]
+	bne	.L2370
+	ldr	w0, [x4, 4]
 	str	w0, [x29, 152]
-	str	x3, [x29, 104]
+	str	x4, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2332
+	cbz	w0, .L2370
 	ldp	w0, w1, [x29, 200]
-	ldr	x3, [x29, 104]
+	ldr	x4, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2334
-.L2434:
+	bne	.L2372
+.L2473:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2332
-.L2334:
+	b	.L2370
+.L2372:
 	cmp	w0, w1
-	beq	.L2332
+	beq	.L2370
 	cmn	w0, #1
-	beq	.L2335
-	ldr	x3, [x4, 16]
+	beq	.L2373
+	ldr	x4, [x3, 16]
 	mov	w2, 0
-	str	w0, [x4, 4]
+	str	w0, [x3, 4]
 	mov	w1, 1
-	str	x3, [x29, 104]
-	mov	x0, x4
+	str	x4, [x29, 104]
+	mov	x0, x3
 	bl	FlashReadPages
-	ldr	x3, [x29, 104]
-.L2336:
+	ldr	x4, [x29, 104]
+.L2374:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2337
+	beq	.L2375
 	ldr	x0, [x29, 112]
-	ldr	w3, [x3, 4]
+	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2337
+	cbz	w0, .L2375
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2332
-.L2337:
+	cbz	w0, .L2370
+.L2375:
 	ldr	w1, [x29, 196]
-	b	.L2434
-.L2335:
-	str	w0, [x4]
-	b	.L2336
-.L2329:
+	b	.L2473
+.L2373:
+	str	w0, [x3]
+	b	.L2374
+.L2367:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2339
+	beq	.L2377
+	adrp	x0, .LANCHOR43
+	ldr	w0, [x0, #:lo12:.LANCHOR43]
+	cmp	w0, w3, lsr 10
+	bhi	.L2379
+	cmn	w3, #1
+	bne	.L2362
+.L2379:
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2339
+	beq	.L2377
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2354
+	beq	.L2393
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR91
 	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	beq	.L2382
+	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2343
+	beq	.L2382
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	beq	.L2343
-	adrp	x1, .LANCHOR94
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
-	cmp	w1, w0
-	bne	.L2339
-.L2343:
+	bne	.L2377
+.L2382:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16724,108 +16931,343 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2339
+	beq	.L2377
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2339
+	cbnz	w0, .L2377
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2339
-.L2345:
+	b	.L2377
+.L2384:
 	mov	w1, w24
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
 	bl	printf
-	b	.L2324
-.L2326:
+	b	.L2362
+.L2364:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	adrp	x2, .LANCHOR237
-	ldr	w0, [x2, #:lo12:.LANCHOR237]
+	adrp	x2, .LANCHOR236
+	ldr	w0, [x2, #:lo12:.LANCHOR236]
 	cmp	w0, 31
-	bhi	.L2346
-	adrp	x1, .LANCHOR238
-	add	x1, x1, :lo12:.LANCHOR238
+	bhi	.L2385
+	adrp	x1, .LANCHOR237
+	add	x1, x1, :lo12:.LANCHOR237
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x2, #:lo12:.LANCHOR237]
-.L2346:
+	str	w0, [x2, #:lo12:.LANCHOR236]
+.L2385:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2347
-.L2436:
+	bne	.L2386
+.L2475:
 	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2324
-.L2347:
+	b	.L2362
+.L2386:
 	cmp	w21, w0
-	bcs	.L2324
-	b	.L2436
-.L2351:
+	bcs	.L2362
+	b	.L2475
+.L2390:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2350
-.L2325:
+	b	.L2389
+.L2363:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2438
+	b	.L2477
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR238
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x23, #:lo12:.LANCHOR238]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	cmp	w20, w0
+	stp	x27, x28, [sp, 80]
+	beq	.L2504
+	cbnz	w20, .L2480
+.L2481:
+	bl	FtlGcPageVarInit
+	b	.L2482
+.L2504:
+	mov	w20, 0
+.L2480:
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w1
+	beq	.L2481
+.L2482:
+	adrp	x24, .LANCHOR72
+	add	x24, x24, :lo12:.LANCHOR72
+	mov	w26, -1
+.L2483:
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	strb	wzr, [x19, 8]
+	cmp	w1, w0
+	beq	.L2484
+	mov	w27, 56
+.L2503:
+	adrp	x1, .LANCHOR104
+	adrp	x22, .LANCHOR180
+	add	x3, x19, 16
+	mov	w21, 0
+	ldr	x5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR57
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w10, 65535
+	ldrh	w6, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR105
+	ldr	x7, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w8, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L2485:
+	cmp	x3, x1
+	bne	.L2487
+	mov	w1, w21
+	mov	w2, 0
+	bl	FlashReadPages
+	adrp	x25, .LANCHOR1
+	umull	x0, w21, w27
+	mov	x21, 0
+	str	x0, [x29, 104]
+	add	x0, x25, :lo12:.LANCHOR1
+	str	x0, [x29, 96]
+.L2488:
+	ldr	x0, [x29, 104]
+	cmp	x0, x21
+	bne	.L2502
+	adrp	x0, .LANCHOR52
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w20
+	bhi	.L2503
+.L2484:
+	strh	w20, [x19, 2]
+	mov	w0, -1
+	strb	wzr, [x19, 6]
+	mov	w1, w20
+	strh	w0, [x23, #:lo12:.LANCHOR238]
+	mov	w2, 0
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L2487:
+	ldrh	w2, [x3]
+	cmp	w2, w10
+	beq	.L2486
+	umaddl	x4, w21, w27, x0
+	orr	w2, w20, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w21, w6
+	asr	w2, w2, 2
+	add	x2, x5, x2, sxtw 2
+	str	x2, [x4, 8]
+	mul	w2, w21, w8
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	asr	w2, w2, 2
+	add	x2, x7, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2486:
+	add	x3, x3, 2
+	b	.L2485
+.L2502:
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	add	x0, x1, x21
+	ldr	w1, [x1, x21]
+	ldr	w28, [x0, 4]
+	cbnz	w1, .L2489
+	ldr	x25, [x0, 16]
+	mov	w0, 65535
+	ldrh	w1, [x25]
+	cmp	w1, w0
+	beq	.L2518
+	ldr	w1, [x24]
+	ldr	w0, [x25, 8]
+	cmp	w0, w1
+	bls	.L2491
+.L2518:
+	adrp	x0, .LANCHOR83
+	ldrh	w1, [x19]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	strh	wzr, [x0, x1, lsl 1]
+.L2517:
+	ldrh	w0, [x19]
+	mov	w20, 0
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	bl	FtlGcPageVarInit
+	b	.L2483
+.L2491:
+	ldr	x1, [x29, 96]
+	ldrb	w1, [x1]
+	cbnz	w1, .L2493
+.L2494:
+	ldp	w2, w0, [x25, 8]
+	mov	w1, w28
+	add	x21, x21, 56
+	bl	FtlGcUpdatePage
+	b	.L2488
+.L2493:
+	add	x1, x29, 116
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x25, 12]
+	ldr	w1, [x29, 116]
+	cmp	w0, w1
+	bne	.L2494
+	cmn	w0, #1
+	beq	.L2494
+	str	w0, [x29, 124]
+	adrp	x0, .LANCHOR187
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR187]
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR189
+	ldr	x0, [x0, #:lo12:.LANCHOR189]
+	str	x0, [x29, 136]
+	add	x0, x29, 120
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR55
+	ldr	x2, [x22, #:lo12:.LANCHOR180]
+	ldr	x5, [x29, 128]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
+	add	x2, x2, x21
+	mov	x0, 0
+	ubfiz	x1, x1, 9, 16
+.L2495:
+	cmp	x0, x1
+	beq	.L2494
+	ldr	x6, [x2, 8]
+	ldr	w7, [x6, x0]
+	add	x0, x0, 4
+	add	x6, x5, x0
+	ldr	w6, [x6, -4]
+	cmp	w7, w6
+	beq	.L2495
+	ldrh	w1, [x19]
+	adrp	x0, .LC63
+	ldr	w2, [x29, 124]
+	add	x0, x0, :lo12:.LC63
+	bl	printf
+	b	.L2518
+.L2489:
+	ldrh	w1, [x19]
+	mov	w2, w28
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
+	bl	printf
+	adrp	x0, .LANCHOR28
+	ldr	w1, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2498
+	adrp	x1, .LANCHOR15
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L2499
+.L2498:
+	adrp	x2, .LANCHOR78
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR78]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 159
+	bls	.L2500
+.L2499:
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	ldr	w1, [x1, x21]
+	cmn	w1, #1
+	bne	.L2501
+.L2500:
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	add	x3, x1, x21
+	ldr	w26, [x3, 4]
+.L2501:
+	adrp	x1, .LANCHOR83
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	strh	wzr, [x1, x0]
+	b	.L2517
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2441
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbz	w0, .L2520
 	mov	w0, 0
 	ret
-.L2441:
+.L2520:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR94
+	adrp	x19, .LANCHOR93
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR94
-	ldrh	w20, [x19, #:lo12:.LANCHOR94]
+	add	x0, x19, :lo12:.LANCHOR93
+	ldrh	w20, [x19, #:lo12:.LANCHOR93]
 	adrp	x21, .LANCHOR135
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	str	x27, [sp, 80]
-	beq	.L2443
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	beq	.L2522
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2443
-	adrp	x0, .LANCHOR79
+	beq	.L2522
+	adrp	x0, .LANCHOR78
 	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR79]
+	ldr	x1, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2444
+	bls	.L2523
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2444:
+.L2523:
 	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2445
+	cbnz	w0, .L2524
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 96]
@@ -16835,10 +17277,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2445:
+.L2524:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 1
-.L2440:
+.L2519:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16846,23 +17288,23 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2443:
+.L2522:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 65535
-	ldrh	w1, [x19, #:lo12:.LANCHOR94]
-	add	x21, x19, :lo12:.LANCHOR94
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	add	x21, x19, :lo12:.LANCHOR93
 	cmp	w1, w0
-	beq	.L2466
+	beq	.L2545
 	bl	FtlCacheWriteBack
-	adrp	x20, .LANCHOR111
-	adrp	x0, .LANCHOR53
+	adrp	x20, .LANCHOR110
+	adrp	x0, .LANCHOR52
 	ldrb	w1, [x21, 7]
-	ldrh	w2, [x20, #:lo12:.LANCHOR111]
+	ldrh	w2, [x20, #:lo12:.LANCHOR110]
 	mov	x21, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR53]
+	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2447
+	beq	.L2526
 	mov	w2, 163
 	adrp	x1, .LANCHOR239
 	adrp	x0, .LC5
@@ -16874,78 +17316,78 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2447:
-	add	x0, x19, :lo12:.LANCHOR94
-	adrp	x23, .LANCHOR84
-	ldrh	w3, [x21, #:lo12:.LANCHOR53]
-	adrp	x25, .LANCHOR73
-	ldrh	w2, [x19, #:lo12:.LANCHOR94]
+.L2526:
+	add	x0, x19, :lo12:.LANCHOR93
+	adrp	x23, .LANCHOR83
+	ldrh	w3, [x21, #:lo12:.LANCHOR52]
+	adrp	x25, .LANCHOR72
+	ldrh	w2, [x19, #:lo12:.LANCHOR93]
 	adrp	x26, .LANCHOR239
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR73
-	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x25, x25, :lo12:.LANCHOR72
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	add	x26, x26, :lo12:.LANCHOR239
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	adrp	x1, .LANCHOR161
-	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
 	ldr	w2, [x1, #:lo12:.LANCHOR161]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2448:
-	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+.L2527:
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
 	cmp	w0, w21
-	bhi	.L2452
+	bhi	.L2531
 	mov	w0, -1
 	bl	decrement_vpc_count
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2453
-	ldrh	w1, [x19, #:lo12:.LANCHOR94]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2532
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-.L2453:
-	ldrh	w0, [x19, #:lo12:.LANCHOR94]
-	ldr	x2, [x23, #:lo12:.LANCHOR84]
+.L2532:
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	ldr	x2, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2454
+	cbz	w1, .L2533
 	bl	INSERT_DATA_LIST
-.L2455:
-	adrp	x0, .LANCHOR109
+.L2534:
+	adrp	x0, .LANCHOR108
 	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR111]
-	strh	w21, [x19, #:lo12:.LANCHOR94]
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	strh	wzr, [x20, #:lo12:.LANCHOR110]
+	strh	w21, [x19, #:lo12:.LANCHOR93]
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	adrp	x0, .LANCHOR204
 	strh	w21, [x0, #:lo12:.LANCHOR204]
-	adrp	x0, .LANCHOR89
-	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2466
+	ble	.L2545
 	adrp	x0, .LANCHOR176
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2466:
+.L2545:
 	mov	w0, 0
-	b	.L2440
-.L2452:
-	adrp	x0, .LANCHOR112
+	b	.L2519
+.L2531:
+	adrp	x0, .LANCHOR111
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR112]
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
 	umull	x24, w21, w24
 	ldr	w0, [x25]
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L2449
+	bcc	.L2528
 	mov	w2, 168
 	mov	x1, x26
 	adrp	x0, .LC5
@@ -16956,7 +17398,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2449:
+.L2528:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -16964,31 +17406,156 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2450
+	bne	.L2529
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	mov	w24, w0
+	ldr	w0, [x22, 8]
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+	mov	w0, w24
+.L2544:
+	bl	decrement_vpc_count
+.L2530:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2527
+.L2529:
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L2530
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	b	.L2544
+.L2533:
+	bl	INSERT_FREE_LIST
+	b	.L2534
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
+	.align	2
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR93
+	mov	w2, 65535
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR93]
+	cmp	w3, w2
+	beq	.L2547
+	add	x1, x0, :lo12:.LANCHOR93
+	ldrh	w0, [x1, 4]
+	cbnz	w0, .L2548
+.L2547:
+	bl	FtlCacheWriteBack
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	add	x0, x19, :lo12:.LANCHOR93
+	strb	wzr, [x0, 8]
+	bl	allocate_data_superblock
+	adrp	x0, .LANCHOR108
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	bl	l2p_flush
+	mov	w0, 0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2548:
+	add	x0, x19, :lo12:.LANCHOR93
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	get_new_active_ppa
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
+	.align	2
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbz	w0, .L2551
+	mov	w0, 0
+	ret
+.L2554:
+	mov	w0, 0
+.L2550:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2551:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR15
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR102
+	cbz	w0, .L2553
+	ldr	w0, [x19, #:lo12:.LANCHOR102]
+	tbz	x0, 0, .L2553
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbnz	w0, .L2554
+.L2553:
+	adrp	x20, .LANCHOR181
+	ldr	w1, [x19, #:lo12:.LANCHOR102]
+	mov	w3, 0
+	mov	w2, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
+	add	x19, x19, :lo12:.LANCHOR102
+	bl	FlashProgPages
+	mov	w11, 0
+	mov	w12, 56
+.L2555:
+	ldr	w1, [x19]
+	cmp	w11, w1
+	bcc	.L2557
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
+	bl	FtlGcBufFree
+	str	wzr, [x19]
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbnz	w0, .L2554
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+	b	.L2567
+.L2557:
+	umull	x0, w11, w12
+	ldr	x2, [x20, #:lo12:.LANCHOR181]
+	add	x1, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L2556
+	adrp	x0, .LANCHOR93
+	adrp	x3, .LANCHOR83
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	ldr	x3, [x3, #:lo12:.LANCHOR83]
+	strh	wzr, [x3, x4, lsl 1]
+	strh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
+	ldr	w2, [x0, 96]
+	add	w2, w2, 1
+	str	w2, [x0, 96]
+	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	mov	w24, w0
-	ldr	w0, [x22, 8]
-	mov	w2, 1
-	add	x1, x22, 4
-	bl	log2phys
-	mov	w0, w24
-.L2465:
-	bl	decrement_vpc_count
-.L2451:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2448
-.L2450:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L2451
-	ldrh	w0, [x19, #:lo12:.LANCHOR94]
-	b	.L2465
-.L2454:
-	bl	INSERT_FREE_LIST
-	b	.L2455
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2567:
+	mov	w0, 1
+	b	.L2550
+.L2556:
+	ldr	x0, [x1, 16]
+	ldr	w1, [x1, 4]
+	ldp	w2, w0, [x0, 8]
+	bl	FtlGcUpdatePage
+	add	w11, w11, 1
+	and	w11, w11, 65535
+	b	.L2555
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
 	.global	FtlGcPageRecovery
@@ -16997,16 +17564,16 @@ FtlGcPageRecovery:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR53
-	adrp	x19, .LANCHOR94
-	add	x19, x19, :lo12:.LANCHOR94
-	ldrh	w1, [x20, #:lo12:.LANCHOR53]
+	adrp	x20, .LANCHOR52
+	adrp	x19, .LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR93
+	ldrh	w1, [x20, #:lo12:.LANCHOR52]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2467
+	bcc	.L2568
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
@@ -17014,7 +17581,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2467:
+.L2568:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17025,18 +17592,18 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR237
+	adrp	x0, .LANCHOR236
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR92
-	add	x19, x19, :lo12:.LANCHOR92
-	str	wzr, [x0, #:lo12:.LANCHOR237]
+	adrp	x19, .LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR91
+	str	wzr, [x0, #:lo12:.LANCHOR236]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
-	adrp	x19, .LANCHOR93
+	adrp	x19, .LANCHOR92
 	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR92
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -17055,33 +17622,33 @@ FtlPowerLostRecovery:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR235
+	adrp	x0, .LANCHOR234
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR235]
+	strh	w1, [x0, #:lo12:.LANCHOR234]
 	adrp	x0, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR236
+	adrp	x20, .LANCHOR235
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	strh	wzr, [x20, #:lo12:.LANCHOR236]
+	strh	wzr, [x20, #:lo12:.LANCHOR235]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
 	adrp	x0, .LANCHOR209
 	ldrh	w1, [x0, #:lo12:.LANCHOR209]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2473
-.L2475:
+	bne	.L2574
+.L2576:
 	mov	w19, -1
-.L2472:
+.L2573:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2473:
+.L2574:
 	bl	FtlLoadSysInfo
 	mov	w19, w0
-	cbnz	w0, .L2475
+	cbnz	w0, .L2576
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17091,80 +17658,80 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR68
-	adrp	x0, .LANCHOR97
+	adrp	x2, .LANCHOR67
+	adrp	x0, .LANCHOR96
 	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR68]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldrh	w2, [x2, #:lo12:.LANCHOR67]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	add	x2, x3, x2, uxtw 4
 	add	x1, x0, 4
 	add	x0, x0, x2
-.L2476:
+.L2577:
 	cmp	x1, x0
-	bne	.L2478
-	ldrh	w0, [x20, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2477
+	bne	.L2579
+	ldrh	w0, [x20, #:lo12:.LANCHOR235]
+	cbnz	w0, .L2578
 	bl	l2p_flush
-	b	.L2481
-.L2478:
+	b	.L2582
+.L2579:
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2476
-.L2477:
-	adrp	x0, .LANCHOR84
-	adrp	x1, .LANCHOR92
-	ldr	x2, [x0, #:lo12:.LANCHOR84]
-	add	x0, x1, :lo12:.LANCHOR92
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	tbz	w2, #31, .L2577
+.L2578:
+	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR91
+	ldr	x2, [x0, #:lo12:.LANCHOR83]
+	add	x0, x1, :lo12:.LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	ldrh	w4, [x0, 4]
 	lsl	x1, x1, 1
 	ldrh	w3, [x2, x1]
 	sub	w3, w3, w4
-	adrp	x4, .LANCHOR53
+	adrp	x4, .LANCHOR52
 	strh	w3, [x2, x1]
 	strh	wzr, [x0, 4]
-	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	ldrh	w1, [x4, #:lo12:.LANCHOR52]
 	strh	w1, [x0, 2]
-	adrp	x1, .LANCHOR93
+	adrp	x1, .LANCHOR92
 	strb	wzr, [x0, 6]
-	add	x0, x1, :lo12:.LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	add	x0, x1, :lo12:.LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	ldrh	w5, [x0, 4]
 	lsl	x1, x1, 1
 	ldrh	w3, [x2, x1]
 	sub	w3, w3, w5
 	strh	w3, [x2, x1]
 	strb	wzr, [x0, 6]
-	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	ldrh	w1, [x4, #:lo12:.LANCHOR52]
 	strh	w1, [x0, 2]
 	strh	wzr, [x0, 4]
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	ldrh	w1, [x0, 30]
 	add	w1, w1, 1
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2481:
+.L2582:
 	bl	FtlVpcTblFlush
-	b	.L2472
+	b	.L2573
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
 	.global	FtlLowFormat
 	.type	FtlLowFormat, %function
 FtlLowFormat:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2514
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2615
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR195
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR67
+	adrp	x19, .LANCHOR66
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	adrp	x20, .LANCHOR159
-	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR39
 	stp	x21, x22, [sp, 32]
@@ -17172,7 +17739,7 @@ FtlLowFormat:
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	adrp	x0, .LANCHOR131
-	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	lsl	w2, w2, 2
@@ -17183,127 +17750,127 @@ FtlLowFormat:
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2485
+	cbz	w0, .L2586
 	bl	FtlMakeBbt
-.L2485:
-	adrp	x22, .LANCHOR56
+.L2586:
+	adrp	x22, .LANCHOR55
 	adrp	x0, .LANCHOR186
 	mov	w6, 23752
-	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	movk	w6, 0xa0f, lsl 16
 	ldr	x4, [x0, #:lo12:.LANCHOR186]
 	adrp	x0, .LANCHOR187
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 0
-.L2486:
+.L2587:
 	cmp	w0, w1
-	blt	.L2487
+	blt	.L2588
 	adrp	x21, .LANCHOR40
 	adrp	x19, .LANCHOR41
 	add	x26, x19, :lo12:.LANCHOR41
 	mov	w23, 0
 	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2488:
+.L2589:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2489
+	bhi	.L2590
 	adrp	x24, .LANCHOR38
 	sub	w1, w23, #2
 	ldrh	w0, [x24, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2490
-.L2494:
+	bgt	.L2591
+.L2595:
 	add	x26, x21, :lo12:.LANCHOR40
 	mov	w23, 0
 	mov	w25, 0
-.L2491:
+.L2592:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2495
-	adrp	x0, .LANCHOR74
+	bhi	.L2596
+	adrp	x0, .LANCHOR73
 	ldrh	w1, [x19, #:lo12:.LANCHOR41]
 	ldrh	w3, [x24, #:lo12:.LANCHOR38]
-	str	w1, [x0, #:lo12:.LANCHOR74]
+	str	w1, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR42
 	adrp	x1, .LANCHOR223
 	ldr	w2, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR72
 	udiv	w6, w2, w3
 	ubfx	x5, x6, 5, 16
-	str	w6, [x0, #:lo12:.LANCHOR73]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w4, w5, 36
 	strh	w4, [x1, #:lo12:.LANCHOR223]
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2496
+	ble	.L2597
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
-	str	w2, [x0, #:lo12:.LANCHOR73]
+	str	w2, [x0, #:lo12:.LANCHOR72]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2496:
+.L2597:
 	adrp	x2, .LANCHOR28
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2497
+	bne	.L2598
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2497:
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2498
+.L2598:
+	adrp	x2, .LANCHOR15
+	ldrb	w2, [x2, #:lo12:.LANCHOR15]
+	cbz	w2, .L2599
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2498:
+.L2599:
 	adrp	x2, .LANCHOR49
 	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2500
+	cbz	w2, .L2601
 	ldrh	w4, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2, lsr 1
 	strh	w4, [x1, #:lo12:.LANCHOR223]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2500
+	bge	.L2601
 	add	w2, w2, 32
-	str	w6, [x0, #:lo12:.LANCHOR73]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w2, w5, w2
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2500:
+.L2601:
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	adrp	x25, .LANCHOR222
-	ldr	w1, [x0, #:lo12:.LANCHOR73]
-	adrp	x24, .LANCHOR84
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	adrp	x24, .LANCHOR83
 	mov	w23, -1
 	sub	w1, w1, w2
 	mul	w3, w1, w3
-	adrp	x1, .LANCHOR53
+	adrp	x1, .LANCHOR52
 	str	w3, [x25, #:lo12:.LANCHOR222]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w3, w1, w3
-	str	w3, [x0, #:lo12:.LANCHOR73]
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	str	w3, [x0, #:lo12:.LANCHOR72]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w3, w0, w3
-	adrp	x0, .LANCHOR69
-	str	w3, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	str	w3, [x0, #:lo12:.LANCHOR68]
 	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR84]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR100
 	adrp	x1, .LANCHOR204
 	ldrh	w2, [x21, #:lo12:.LANCHOR40]
-	str	wzr, [x0, #:lo12:.LANCHOR101]
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	add	x0, x1, :lo12:.LANCHOR204
 	strh	w23, [x1, #:lo12:.LANCHOR204]
 	mov	w1, 255
@@ -17311,9 +17878,9 @@ FtlLowFormat:
 	strh	wzr, [x0, 2]
 	strb	wzr, [x0, 6]
 	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR92
-	add	x19, x0, :lo12:.LANCHOR92
-	strh	wzr, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR91
+	add	x19, x0, :lo12:.LANCHOR91
+	strh	wzr, [x0, #:lo12:.LANCHOR91]
 	mov	w0, 1
 	strb	w0, [x19, 8]
 	adrp	x0, .LANCHOR0
@@ -17321,20 +17888,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2502:
+.L2603:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2503
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	cbnz	w1, .L2604
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2502
-.L2487:
+	b	.L2603
+.L2588:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -17342,8 +17909,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2486
-.L2489:
+	b	.L2587
+.L2590:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -17351,28 +17918,28 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2488
-.L2490:
+	b	.L2589
+.L2591:
 	udiv	w0, w23, w0
-	adrp	x1, .LANCHOR66
-	ldr	w23, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR65
+	ldr	w23, [x1, #:lo12:.LANCHOR65]
 	add	w0, w0, w23
 	bl	FtlSysBlkNumInit
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	add	x25, x19, :lo12:.LANCHOR41
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2492:
+.L2593:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2494
+	bls	.L2595
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2492
-.L2495:
+	b	.L2593
+.L2596:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -17380,215 +17947,90 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2491
-.L2503:
+	b	.L2592
+.L2604:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	mov	w23, -1
 	add	w1, w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR159]
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR93
-	add	x0, x2, :lo12:.LANCHOR93
+	adrp	x2, .LANCHOR92
+	add	x0, x2, :lo12:.LANCHOR92
 	ldrh	w1, [x19]
 	mov	x19, x0
 	add	w1, w1, 1
 	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR93]
+	strh	w1, [x2, #:lo12:.LANCHOR92]
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2504:
+.L2605:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2505
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
-	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
-	ldrh	w0, [x19]
-	add	w0, w0, 1
-	strh	w0, [x19]
-	b	.L2504
-.L2505:
-	ldr	w1, [x20, #:lo12:.LANCHOR159]
-	ubfiz	x0, x0, 1, 16
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR159]
-	ldr	x1, [x24, #:lo12:.LANCHOR84]
-	ldrh	w2, [x19, 4]
-	mov	w19, -1
-	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR94
-	strh	w19, [x0, #:lo12:.LANCHOR94]
-	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR209
-	add	x1, x2, :lo12:.LANCHOR209
-	strh	w0, [x2, #:lo12:.LANCHOR209]
-	ldr	w0, [x25, #:lo12:.LANCHOR222]
-	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR159]
-	str	w0, [x1, 8]
-	add	w0, w0, 1
-	strh	wzr, [x1, 2]
-	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR159]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	w0, .L2484
-	adrp	x0, .LANCHOR231
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR231]
-.L2484:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2514:
-	mov	w0, 0
-	ret
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
-	.align	2
-	.global	Ftl_get_new_temp_ppa
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR94
-	mov	w2, 65535
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR94]
-	cmp	w3, w2
-	beq	.L2518
-	add	x1, x0, :lo12:.LANCHOR94
-	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2519
-.L2518:
-	bl	FtlCacheWriteBack
-	mov	w0, 0
-	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR94
-	strb	wzr, [x0, 8]
-	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR109
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR111
-	strh	wzr, [x0, #:lo12:.LANCHOR111]
-	bl	l2p_flush
-	mov	w0, 0
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L2519:
-	add	x0, x19, :lo12:.LANCHOR94
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	get_new_active_ppa
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
-	.align	2
-	.global	Ftl_gc_temp_data_write_back
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2522
-	mov	w0, 0
-	ret
-.L2525:
-	mov	w0, 0
-.L2521:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L2522:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR8
-	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR103
-	cbz	w0, .L2524
-	ldr	w0, [x19, #:lo12:.LANCHOR103]
-	tbz	x0, 0, .L2524
-	adrp	x0, .LANCHOR94+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2525
-.L2524:
-	adrp	x20, .LANCHOR181
-	ldr	w1, [x19, #:lo12:.LANCHOR103]
-	mov	w3, 0
-	mov	w2, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR181]
-	add	x19, x19, :lo12:.LANCHOR103
-	bl	FlashProgPages
-	mov	w11, 0
-	mov	w12, 56
-.L2526:
-	ldr	w1, [x19]
-	cmp	w11, w1
-	bcc	.L2528
-	ldr	x0, [x20, #:lo12:.LANCHOR181]
-	bl	FtlGcBufFree
-	str	wzr, [x19]
-	adrp	x0, .LANCHOR94+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2525
-	mov	w0, 1
-	bl	FtlGcFreeTempBlock
-	b	.L2538
-.L2528:
-	umull	x0, w11, w12
-	ldr	x2, [x20, #:lo12:.LANCHOR181]
-	add	x1, x2, x0
-	ldr	w2, [x2, x0]
-	cmn	w2, #1
-	bne	.L2527
-	adrp	x0, .LANCHOR94
-	adrp	x3, .LANCHOR84
-	ldrh	w4, [x0, #:lo12:.LANCHOR94]
-	ldr	x3, [x3, #:lo12:.LANCHOR84]
-	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
-	ldr	w2, [x0, 96]
-	add	w2, w2, 1
-	str	w2, [x0, 96]
-	ldr	w0, [x1, 4]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-.L2538:
-	mov	w0, 1
-	b	.L2521
-.L2527:
-	ldr	x0, [x1, 16]
-	ldr	w1, [x1, 4]
-	ldp	w2, w0, [x0, 8]
-	bl	FtlGcUpdatePage
-	add	w11, w11, 1
-	and	w11, w11, 65535
-	b	.L2526
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	cbnz	w1, .L2606
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2605
+.L2606:
+	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR159]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, 4]
+	mov	w19, -1
+	strh	w2, [x1, x0]
+	adrp	x0, .LANCHOR93
+	strh	w19, [x0, #:lo12:.LANCHOR93]
+	bl	FtlFreeSysBlkQueueOut
+	adrp	x2, .LANCHOR209
+	add	x1, x2, :lo12:.LANCHOR209
+	strh	w0, [x2, #:lo12:.LANCHOR209]
+	ldr	w0, [x25, #:lo12:.LANCHOR222]
+	strh	w0, [x1, 6]
+	ldr	w0, [x20, #:lo12:.LANCHOR159]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	strh	wzr, [x1, 2]
+	strh	w19, [x1, 4]
+	str	w0, [x20, #:lo12:.LANCHOR159]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	w0, .L2585
+	adrp	x0, .LANCHOR230
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR230]
+.L2585:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2615:
+	mov	w0, 0
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	adrp	x1, .LANCHOR77
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L2591
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L2670
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
@@ -17598,79 +18040,79 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2593
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	cbnz	w1, .L2672
+	adrp	x1, .LANCHOR85
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, 47
-	bls	.L2593
-	adrp	x5, .LANCHOR114
+	bls	.L2672
+	adrp	x5, .LANCHOR113
 	mov	w2, 65535
-	ldrh	w8, [x5, #:lo12:.LANCHOR114]
+	ldrh	w8, [x5, #:lo12:.LANCHOR113]
 	cmp	w8, w2
-	beq	.L2541
-	adrp	x7, .LANCHOR113
-	ldrh	w1, [x7, #:lo12:.LANCHOR113]
+	beq	.L2620
+	adrp	x7, .LANCHOR112
+	ldrh	w1, [x7, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	bne	.L2541
-	adrp	x3, .LANCHOR115
-	ldrh	w6, [x3, #:lo12:.LANCHOR115]
+	bne	.L2620
+	adrp	x3, .LANCHOR114
+	ldrh	w6, [x3, #:lo12:.LANCHOR114]
 	cmp	w6, w1
-	beq	.L2541
-	adrp	x2, .LANCHOR116
-	ldrh	w4, [x2, #:lo12:.LANCHOR116]
+	beq	.L2620
+	adrp	x2, .LANCHOR115
+	ldrh	w4, [x2, #:lo12:.LANCHOR115]
 	cmp	w4, w1
-	beq	.L2541
+	beq	.L2620
 	mov	w1, -1
-	strh	w8, [x7, #:lo12:.LANCHOR113]
-	strh	w6, [x5, #:lo12:.LANCHOR114]
-	strh	w4, [x3, #:lo12:.LANCHOR115]
-	strh	w1, [x2, #:lo12:.LANCHOR116]
-.L2541:
-	cbnz	w0, .L2594
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	strh	w8, [x7, #:lo12:.LANCHOR112]
+	strh	w6, [x5, #:lo12:.LANCHOR113]
+	strh	w4, [x3, #:lo12:.LANCHOR114]
+	strh	w1, [x2, #:lo12:.LANCHOR115]
+.L2620:
+	cbnz	w0, .L2673
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 24
-	bhi	.L2595
-	adrp	x1, .LANCHOR53
+	bhi	.L2674
+	adrp	x1, .LANCHOR52
 	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR53]
-	bls	.L2544
+	ldrh	w20, [x1, #:lo12:.LANCHOR52]
+	bls	.L2623
 	lsr	w20, w20, 5
-.L2543:
+.L2622:
 	adrp	x2, .LANCHOR176
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2547
-	adrp	x0, .LANCHOR94
+	bcs	.L2626
+	adrp	x0, .LANCHOR93
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bne	.L2548
-	adrp	x1, .LANCHOR113
-	ldrh	w1, [x1, #:lo12:.LANCHOR113]
+	bne	.L2627
+	adrp	x1, .LANCHOR112
+	ldrh	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w1, w0
-	bne	.L2548
+	bne	.L2627
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	cbnz	w0, .L2549
-	adrp	x1, .LANCHOR73
-	adrp	x4, .LANCHOR101
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
-	ldr	w4, [x4, #:lo12:.LANCHOR101]
+	cbnz	w0, .L2628
+	adrp	x1, .LANCHOR72
+	adrp	x4, .LANCHOR100
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	ldr	w4, [x4, #:lo12:.LANCHOR100]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2550
-.L2549:
+	bcs	.L2629
+.L2628:
 	adrp	x1, .LANCHOR223
 	ldrh	w1, [x1, #:lo12:.LANCHOR223]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR176]
-.L2551:
+.L2630:
 	adrp	x1, .LANCHOR172
 	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2539:
+.L2618:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17678,206 +18120,204 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2544:
+.L2623:
 	cmp	w0, 12
-	bls	.L2545
+	bls	.L2624
 	lsr	w20, w20, 4
-	b	.L2543
-.L2545:
+	b	.L2622
+.L2624:
 	cmp	w0, 8
-	bls	.L2543
+	bls	.L2622
 	lsr	w20, w20, 2
-	b	.L2543
-.L2595:
+	b	.L2622
+.L2674:
 	mov	w20, 1
-	b	.L2543
-.L2550:
+	b	.L2622
+.L2629:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2551
-.L2548:
+	b	.L2630
+.L2627:
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2547:
-	adrp	x0, .LANCHOR117
-	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2542
+.L2626:
+	adrp	x0, .LANCHOR116
+	ldrh	w0, [x0, #:lo12:.LANCHOR116]
+	cbz	w0, .L2621
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2542:
+.L2621:
 	adrp	x19, .LANCHOR204
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	cmp	w2, w0
-	bne	.L2554
-	adrp	x0, .LANCHOR113
-	ldrh	w1, [x0, #:lo12:.LANCHOR113]
+	bne	.L2633
+	adrp	x0, .LANCHOR112
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	beq	.L2555
-	adrp	x2, .LANCHOR84
+	beq	.L2634
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2556
+	cbnz	w1, .L2635
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2556:
-	ldrh	w1, [x0, #:lo12:.LANCHOR113]
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2635:
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	strh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2555:
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2634:
 	add	x0, x19, :lo12:.LANCHOR204
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2554
+	beq	.L2633
 	bl	IsBlkInGcList
-	cbz	w0, .L2558
+	cbz	w0, .L2637
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2558:
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2559
+.L2637:
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2638
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	add	x3, x19, :lo12:.LANCHOR204
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2559:
+.L2638:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR204
 	cmp	w1, w0
-	beq	.L2554
+	beq	.L2633
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR241
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x22, 2]
 	strh	wzr, [x0, #:lo12:.LANCHOR241]
-	adrp	x0, .LANCHOR84
+	adrp	x0, .LANCHOR83
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR242
 	strh	w1, [x0, #:lo12:.LANCHOR242]
-.L2554:
-	adrp	x0, .LANCHOR92
+.L2633:
+	adrp	x0, .LANCHOR91
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	beq	.L2560
-	adrp	x0, .LANCHOR93
+	beq	.L2639
+	adrp	x0, .LANCHOR92
 	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR93]
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2560
-	adrp	x23, .LANCHOR178
-	add	x0, x23, :lo12:.LANCHOR178
-	str	x0, [x29, 168]
-.L2561:
+	beq	.L2639
+	adrp	x25, .LANCHOR178
+	add	x26, x25, :lo12:.LANCHOR178
+.L2640:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2562
+	bne	.L2641
 	adrp	x0, .LANCHOR172
-	adrp	x22, .LANCHOR53
-	add	x22, x22, :lo12:.LANCHOR53
+	adrp	x22, .LANCHOR52
+	add	x22, x22, :lo12:.LANCHOR52
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2563:
-	ldrh	w5, [x23, #:lo12:.LANCHOR178]
-	add	x7, x23, :lo12:.LANCHOR178
+.L2642:
+	ldrh	w5, [x25, #:lo12:.LANCHOR178]
+	add	x7, x25, :lo12:.LANCHOR178
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2564
+	bne	.L2643
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2539
-.L2594:
+	b	.L2618
+.L2673:
 	mov	w20, 1
-	b	.L2542
-.L2560:
+	b	.L2621
+.L2639:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2630:
+.L2709:
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	b	.L2539
-.L2564:
+	b	.L2618
+.L2643:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2565
-	strh	w5, [x23, #:lo12:.LANCHOR178]
-	b	.L2563
-.L2565:
-	adrp	x24, .LANCHOR84
+	cbz	w0, .L2644
+	strh	w5, [x25, #:lo12:.LANCHOR178]
+	b	.L2642
+.L2644:
+	adrp	x23, .LANCHOR83
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x24, #:lo12:.LANCHOR84]
+	ldr	x2, [x23, #:lo12:.LANCHOR83]
 	and	w5, w5, 65535
 	ldrh	w4, [x4, #:lo12:.LANCHOR38]
-	strh	w5, [x23, #:lo12:.LANCHOR178]
+	strh	w5, [x25, #:lo12:.LANCHOR178]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2567
+	bgt	.L2646
 	cmp	w5, 48
-	bls	.L2568
+	bls	.L2647
 	cmp	w3, 8
-	bls	.L2568
-	adrp	x3, .LANCHOR109
-	ldrh	w3, [x3, #:lo12:.LANCHOR109]
+	bls	.L2647
+	adrp	x3, .LANCHOR108
+	ldrh	w3, [x3, #:lo12:.LANCHOR108]
 	cmp	w3, 35
-	bhi	.L2568
-.L2567:
-	ldr	x3, [x29, 168]
-	strh	wzr, [x3]
-.L2568:
+	bhi	.L2647
+.L2646:
+	strh	wzr, [x26]
+.L2647:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2569
+	bgt	.L2648
+	ldrh	w0, [x26]
+	cmp	w0, 3
+	bhi	.L2648
 	mov	w0, -1
+	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-	adrp	x0, .LANCHOR178
-	strh	wzr, [x0, #:lo12:.LANCHOR178]
-	b	.L2630
-.L2569:
-	cbnz	w1, .L2570
+	b	.L2709
+.L2648:
+	cbnz	w1, .L2649
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldr	x0, [x29, 168]
-	ldr	x1, [x29, 168]
-	ldrh	w0, [x0]
+	ldrh	w0, [x26]
 	add	w0, w0, 1
-	strh	w0, [x1]
-	b	.L2563
-.L2570:
-	adrp	x0, .LANCHOR8
+	strh	w0, [x26]
+	b	.L2642
+.L2649:
+	adrp	x0, .LANCHOR15
 	add	x3, x19, :lo12:.LANCHOR204
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2571
+	cbz	w0, .L2650
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2571:
+.L2650:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w6
-	bne	.L2572
-	mov	w2, 857
+	bne	.L2651
+	mov	w2, 893
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17888,13 +18328,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2572:
+.L2651:
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2573
-	mov	w2, 858
+	bne	.L2652
+	mov	w2, 894
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17905,13 +18345,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2573:
-	adrp	x0, .LANCHOR94
+.L2652:
+	adrp	x0, .LANCHOR93
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2574
-	mov	w2, 859
+	bne	.L2653
+	mov	w2, 895
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17922,82 +18362,86 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2574:
+.L2653:
 	add	x22, x19, :lo12:.LANCHOR204
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR241
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x0, #:lo12:.LANCHOR241]
-	ldr	x0, [x24, #:lo12:.LANCHOR84]
+	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR242
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR242]
 	strb	wzr, [x22, 6]
-.L2562:
+.L2641:
+	adrp	x1, .LANCHOR52
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR171]
-	adrp	x0, .LANCHOR8
-	adrp	x1, .LANCHOR53
-	stp	x0, x1, [x29, 120]
-	ldrb	w2, [x0, #:lo12:.LANCHOR8]
-	ldrh	w26, [x1, #:lo12:.LANCHOR53]
-	cbz	w2, .L2575
+	ldrh	w0, [x1, #:lo12:.LANCHOR52]
+	str	w0, [x29, 172]
+	adrp	x0, .LANCHOR15
+	str	x1, [x29, 128]
+	str	x0, [x29, 120]
+	ldrb	w2, [x0, #:lo12:.LANCHOR15]
+	cbz	w2, .L2654
 	add	x0, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2575
-	adrp	x0, .LANCHOR54
-	ldrh	w26, [x0, #:lo12:.LANCHOR54]
-.L2575:
+	bne	.L2654
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	str	w0, [x29, 172]
+.L2654:
 	add	x0, x19, :lo12:.LANCHOR204
+	ldr	w2, [x29, 172]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
-	cmp	w1, w26
-	ble	.L2576
-	sub	w20, w26, w0
+	cmp	w1, w2
+	ble	.L2655
+	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L2576:
+.L2655:
 	adrp	x0, .LANCHOR241
-	mov	w27, 0
+	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR241
 	str	x0, [x29, 160]
-.L2577:
-	cmp	w20, w27, uxth
-	bls	.L2585
+.L2656:
+	cmp	w20, w28, uxth
+	bls	.L2664
 	add	x1, x19, :lo12:.LANCHOR204
 	adrp	x0, .LANCHOR38
-	adrp	x24, .LANCHOR107
+	adrp	x23, .LANCHOR106
 	add	x1, x1, 16
 	ldrh	w7, [x0, #:lo12:.LANCHOR38]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	mov	w6, 65535
-	add	w4, w4, w27
+	add	w4, w4, w28
 	mov	w5, 56
-	b	.L2586
-.L2579:
+	b	.L2665
+.L2658:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2578
+	beq	.L2657
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2578:
+.L2657:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2586:
+.L2665:
 	cmp	w2, w7
-	bne	.L2579
+	bne	.L2658
 	add	x1, x19, :lo12:.LANCHOR204
-	adrp	x25, .LANCHOR103
-	add	x25, x25, :lo12:.LANCHOR103
+	adrp	x24, .LANCHOR102
+	add	x24, x24, :lo12:.LANCHOR102
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
@@ -18005,27 +18449,27 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2580:
+.L2659:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2584
-	add	w27, w27, 1
-	b	.L2577
-.L2584:
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	bne	.L2663
+	add	w28, w28, 1
+	b	.L2656
+.L2663:
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2581
-	ldr	x28, [x1, 16]
+	beq	.L2660
+	ldr	x27, [x1, 16]
 	mov	w0, 61589
-	ldrh	w1, [x28]
+	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L2581
-	ldr	w4, [x28, 8]
+	bne	.L2660
+	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L2582
-	mov	w2, 898
+	bne	.L2661
+	mov	w2, 934
 	str	w4, [x29, 112]
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
@@ -18038,43 +18482,41 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 112]
-.L2582:
+.L2661:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x22
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2581
+	bne	.L2660
 	ldr	x1, [x29, 160]
 	adrp	x4, .LANCHOR181
 	ldr	x2, [x29, 160]
 	ldr	x5, [x4, #:lo12:.LANCHOR181]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
-	str	x4, [x29, 96]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	ldr	w2, [x25]
+	ldr	w2, [x24]
 	mov	w1, 56
-	str	w1, [x29, 108]
+	str	w1, [x29, 168]
 	nop // between mem op and mult-accumulate
 	umaddl	x2, w2, w1, x5
-	str	x2, [x29, 112]
+	stp	x4, x2, [x29, 104]
 	str	w0, [x2, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldr	x4, [x29, 96]
-	ldr	x2, [x29, 112]
-	ldr	w1, [x29, 108]
+	ldp	x4, x2, [x29, 104]
+	ldr	w1, [x29, 168]
 	str	w0, [x2, 4]
 	ldr	x0, [x4, #:lo12:.LANCHOR181]
-	ldr	w2, [x25]
+	ldr	w2, [x24]
 	umaddl	x1, w2, w1, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	add	w2, w2, 1
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
@@ -18082,95 +18524,96 @@ rk_ftl_garbage_collect:
 	ldr	x4, [x0, 16]
 	str	x4, [x1, 16]
 	ldr	w1, [x29, 188]
-	str	w1, [x28, 12]
-	adrp	x1, .LANCHOR94
-	add	x12, x1, :lo12:.LANCHOR94
-	ldrh	w1, [x1, #:lo12:.LANCHOR94]
-	strh	w1, [x28, 2]
+	str	w1, [x27, 12]
+	adrp	x1, .LANCHOR93
+	add	x12, x1, :lo12:.LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	strh	w1, [x27, 2]
 	adrp	x1, .LANCHOR160
-	str	w2, [x25]
+	str	w2, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR160]
-	str	w1, [x28, 4]
+	str	w1, [x27, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2583
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbnz	w0, .L2662
 	ldrb	w1, [x12, 7]
-	ldr	w0, [x25]
+	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L2583
+	beq	.L2662
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2581
-.L2583:
+	cbnz	w0, .L2660
+.L2662:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2581
-.L2631:
+	cbz	w0, .L2660
+.L2710:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2630
-.L2581:
+	b	.L2709
+.L2660:
 	add	x22, x22, 56
-	b	.L2580
-.L2585:
+	b	.L2659
+.L2664:
 	add	x1, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
+	ldr	w0, [x29, 172]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
-	cmp	w26, w20
-	bhi	.L2587
-	adrp	x0, .LANCHOR103
-	ldr	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L2588
+	cmp	w0, w20
+	bhi	.L2666
+	adrp	x0, .LANCHOR102
+	ldr	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L2667
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2631
-.L2588:
+	cbnz	w0, .L2710
+.L2667:
 	adrp	x0, .LANCHOR241
 	ldrh	w0, [x0, #:lo12:.LANCHOR241]
-	cbnz	w0, .L2589
+	cbnz	w0, .L2668
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	adrp	x20, .LANCHOR84
+	adrp	x20, .LANCHOR83
 	add	x0, x19, :lo12:.LANCHOR204
-	ldr	x3, [x20, #:lo12:.LANCHOR84]
+	ldr	x3, [x20, #:lo12:.LANCHOR83]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L2589
+	cbz	w4, .L2668
 	adrp	x2, .LANCHOR242
 	mov	w3, 0
 	ldrh	w5, [x2, #:lo12:.LANCHOR242]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	bl	printf
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
-	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldr	x0, [x20, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2589:
+.L2668:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2587:
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+.L2666:
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 2
-	bhi	.L2590
+	bhi	.L2669
 	ldr	x0, [x29, 128]
-	ldrh	w20, [x0, #:lo12:.LANCHOR53]
-	b	.L2561
-.L2590:
+	ldrh	w20, [x0, #:lo12:.LANCHOR52]
+	b	.L2640
+.L2669:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2539
-.L2591:
+	b	.L2618
+.L2670:
 	mov	w0, 0
 	ret
-.L2593:
+.L2672:
 	mov	w0, 0
-	b	.L2539
+	b	.L2618
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -18178,18 +18621,18 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC66
-	add	x1, x1, :lo12:.LC66
+	adrp	x1, .LC67
+	add	x1, x1, :lo12:.LC67
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR231
+	adrp	x19, .LANCHOR230
 	mov	x20, x0
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR231]
+	str	w0, [x19, #:lo12:.LANCHOR230]
 	adrp	x0, .LANCHOR244
 	str	wzr, [x0, #:lo12:.LANCHOR244]
-	adrp	x0, .LANCHOR77
-	str	wzr, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR76
+	str	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
@@ -18201,42 +18644,42 @@ FtlInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2633
+	cbz	w0, .L2712
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC67
+	adrp	x0, .LC68
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC67
-.L2641:
+	add	x0, x0, :lo12:.LC68
+.L2720:
 	bl	printf
-.L2634:
+.L2713:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2633:
+.L2712:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2635
+	cbz	w0, .L2714
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC68
+	adrp	x0, .LC69
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC68
-	b	.L2641
-.L2635:
+	add	x0, x0, :lo12:.LC69
+	b	.L2720
+.L2714:
 	mov	w1, 1
-	str	w1, [x19, #:lo12:.LANCHOR231]
+	str	w1, [x19, #:lo12:.LANCHOR230]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 15
-	bhi	.L2634
+	bhi	.L2713
 	mov	w19, 1024
-.L2637:
+.L2716:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2637
-	b	.L2634
+	bne	.L2716
+	b	.L2713
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -18248,15 +18691,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2643
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+	cbnz	w0, .L2722
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
 	bl	FtlInit
-.L2643:
+.L2722:
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC69
-	add	x0, x0, :lo12:.LC69
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18268,110 +18711,110 @@ rk_ftl_init:
 	.global	ftl_fix_nand_power_lost_error
 	.type	ftl_fix_nand_power_lost_error, %function
 ftl_fix_nand_power_lost_error:
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2660
+	adrp	x0, .LANCHOR15
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	cbz	w0, .L2739
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR235
+	adrp	x25, .LANCHOR234
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR84
-	ldrh	w23, [x25, #:lo12:.LANCHOR235]
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	adrp	x21, .LANCHOR83
+	ldrh	w23, [x25, #:lo12:.LANCHOR234]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC70
+	adrp	x19, .LC71
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC70
+	add	x0, x19, :lo12:.LC71
 	bl	printf
+	adrp	x0, .LANCHOR91
+	add	x11, x0, :lo12:.LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bl	FtlGcRefreshOpenBlock
 	adrp	x0, .LANCHOR92
-	add	x11, x0, :lo12:.LANCHOR92
+	add	x20, x0, :lo12:.LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	bl	FtlGcRefreshOpenBlock
-	adrp	x0, .LANCHOR93
-	add	x20, x0, :lo12:.LANCHOR93
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
-	bl	FtlGcRefreshOpenBlock
 	mov	x0, x11
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2647:
+.L2726:
 	subs	w20, w20, #1
-	beq	.L2651
+	beq	.L2730
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2647
-.L2651:
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	cbnz	w0, .L2726
+.L2730:
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC70
+	add	x0, x19, :lo12:.LC71
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2649
+	cbnz	w19, .L2728
 	add	x20, x29, 128
-	adrp	x22, .LANCHOR78
+	adrp	x22, .LANCHOR77
 	strh	w23, [x20, -48]!
 	mov	x0, x20
 	bl	make_superblock
 	adrp	x0, .LANCHOR38
-	ldr	x4, [x22, #:lo12:.LANCHOR78]
+	ldr	x4, [x22, #:lo12:.LANCHOR77]
 	add	x20, x20, 16
 	mov	w5, 65535
 	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2652:
+.L2731:
 	cmp	w0, w3
-	bne	.L2654
-	ldr	x0, [x21, #:lo12:.LANCHOR84]
+	bne	.L2733
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR78]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 0
 	bl	FlashEraseBlocks
-	ldr	x0, [x22, #:lo12:.LANCHOR78]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2649:
+.L2728:
 	mov	w0, -1
-	strh	w0, [x25, #:lo12:.LANCHOR235]
+	strh	w0, [x25, #:lo12:.LANCHOR234]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2654:
+.L2733:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2653
+	beq	.L2732
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2653:
+.L2732:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2652
-.L2660:
+	b	.L2731
+.L2739:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -18392,13 +18835,13 @@ ftl_read:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L2664
+	bne	.L2743
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2663:
+.L2742:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18408,23 +18851,23 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2664:
+.L2743:
 	add	w0, w1, w2
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR68
 	add	w1, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2687
-	adrp	x0, .LANCHOR231
-	ldr	w21, [x0, #:lo12:.LANCHOR231]
+	bhi	.L2766
+	adrp	x0, .LANCHOR230
+	ldr	w21, [x0, #:lo12:.LANCHOR230]
 	cmn	w21, #1
-	beq	.L2663
-	adrp	x22, .LANCHOR56
+	beq	.L2742
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	adrp	x25, .LANCHOR138
 	add	x25, x25, :lo12:.LANCHOR138
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mov	w24, 0
 	mov	w21, 0
 	adrp	x26, .LANCHOR180
@@ -18445,42 +18888,42 @@ ftl_read:
 	ldr	w2, [x29, 172]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2666:
+.L2745:
 	ldr	w0, [x29, 172]
-	cbnz	w0, .L2686
-	adrp	x0, .LANCHOR117
-	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2663
+	cbnz	w0, .L2765
+	adrp	x0, .LANCHOR116
+	ldrh	w0, [x0, #:lo12:.LANCHOR116]
+	cbz	w0, .L2742
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2663
-.L2686:
+	b	.L2742
+.L2765:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2667
-	add	x3, x22, :lo12:.LANCHOR56
+	bne	.L2746
+	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2668:
+.L2747:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2670
-.L2671:
+	bcc	.L2749
+.L2750:
 	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 172]
-	beq	.L2675
+	beq	.L2754
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w24, w0, lsl 2
-	bne	.L2666
-.L2675:
-	cbz	w24, .L2666
+	bne	.L2745
+.L2754:
+	cbz	w24, .L2745
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w1, w24
 	mov	w2, 0
@@ -18499,35 +18942,35 @@ ftl_read:
 	umull	x0, w24, w0
 	mov	x24, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LC60
-	add	x0, x0, :lo12:.LC60
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
 	str	x0, [x29, 112]
-.L2685:
+.L2764:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w2, [x29, 168]
 	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2677
+	bne	.L2756
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2678
+	bne	.L2757
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2702:
+.L2781:
 	bl	ftl_memcpy
-.L2678:
+.L2757:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x0, x0, x24
 	ldr	x2, [x0, 16]
 	ldr	w1, [x0, 24]
 	ldr	w3, [x2, 8]
 	cmp	w1, w3
-	beq	.L2679
+	beq	.L2758
 	ldr	w3, [x25, 72]
 	add	w3, w3, 1
 	str	w3, [x25, 72]
@@ -18541,30 +18984,30 @@ ftl_read:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L2679:
+.L2758:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2680
+	bne	.L2759
 	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L2681:
+.L2760:
 	ldr	x0, [x29, 120]
 	add	x24, x24, 56
 	cmp	x0, x24
-	bne	.L2685
+	bne	.L2764
 	mov	w24, 0
-	b	.L2666
-.L2670:
+	b	.L2745
+.L2749:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2669
+	bhi	.L2748
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2669
+	bls	.L2748
 	sub	w0, w0, w19
 	str	x3, [x29, 136]
 	lsl	w0, w0, 9
@@ -18573,21 +19016,21 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 136]
-.L2669:
+.L2748:
 	add	w28, w28, 1
-	b	.L2668
-.L2667:
+	b	.L2747
+.L2746:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
 	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2672
+	bne	.L2751
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
@@ -18596,25 +19039,25 @@ ftl_read:
 	csel	w2, w27, w2, ls
 	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2673
+	bne	.L2752
 	str	x23, [x0, 8]
-.L2673:
-	adrp	x1, .LANCHOR59
+.L2752:
+	adrp	x1, .LANCHOR58
 	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR59]
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	ldr	x2, [x2, #:lo12:.LANCHOR189]
 	mul	w1, w1, w24
 	add	w24, w24, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2671
-.L2672:
+	b	.L2750
+.L2751:
 	ldr	w1, [x29, 164]
 	cmp	w20, w1
-	bne	.L2674
-	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	bne	.L2753
+	ldrh	w2, [x22, #:lo12:.LANCHOR55]
 	adrp	x1, .LANCHOR187
 	ldr	w3, [x29, 148]
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
@@ -18623,35 +19066,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2673
-.L2701:
+	bne	.L2752
+.L2780:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2673
-.L2674:
-	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	b	.L2752
+.L2753:
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	mul	w1, w1, w20
-	b	.L2701
-.L2677:
+	b	.L2780
+.L2756:
 	ldr	w2, [x29, 164]
 	cmp	w2, w1
-	bne	.L2678
+	bne	.L2757
 	ldr	x1, [x0, 8]
 	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2678
-	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	bne	.L2757
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w0, w0, w2
 	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2702
-.L2680:
+	b	.L2781
+.L2759:
 	cmp	w0, 256
-	bne	.L2681
+	bne	.L2760
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -18660,13 +19103,13 @@ ftl_read:
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
 	adrp	x3, .LANCHOR204
-.L2683:
+.L2762:
 	subs	w2, w2, #1
-	bne	.L2682
-.L2684:
+	bne	.L2761
+.L2763:
 	bl	FtlSysFlush
-	b	.L2681
-.L2682:
+	b	.L2760
+.L2761:
 	mov	w1, 1
 	str	x3, [x29, 96]
 	mov	w0, w1
@@ -18677,11 +19120,11 @@ ftl_read:
 	ldr	w2, [x29, 108]
 	ldrh	w0, [x3, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2683
-	b	.L2684
-.L2687:
+	beq	.L2762
+	b	.L2763
+.L2766:
 	mov	w21, -1
-	b	.L2663
+	b	.L2742
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
@@ -18692,23 +19135,23 @@ FtlWrite:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR76
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2735
+	cbnz	w1, .L2814
 	and	w0, w0, 255
 	mov	w23, w2
 	mov	x24, x3
 	cmp	w0, 16
-	bne	.L2705
+	bne	.L2784
 	mov	x2, x3
 	mov	w1, w23
 	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2703:
+.L2782:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18716,22 +19159,22 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2705:
-	adrp	x0, .LANCHOR69
+.L2784:
+	adrp	x0, .LANCHOR68
 	add	w2, w21, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
-	bhi	.L2736
-	adrp	x0, .LANCHOR231
-	ldr	w0, [x0, #:lo12:.LANCHOR231]
+	bhi	.L2815
+	adrp	x0, .LANCHOR230
+	ldr	w0, [x0, #:lo12:.LANCHOR230]
 	cmn	w0, #1
-	beq	.L2703
+	beq	.L2782
 	adrp	x0, .LANCHOR246
-	adrp	x26, .LANCHOR56
+	adrp	x26, .LANCHOR55
 	mov	w1, 2048
 	sub	w2, w2, #1
 	str	w1, [x0, #:lo12:.LANCHOR246]
-	ldrh	w1, [x26, #:lo12:.LANCHOR56]
+	ldrh	w1, [x26, #:lo12:.LANCHOR55]
 	str	x26, [x29, 160]
 	udiv	w0, w2, w1
 	adrp	x2, .LANCHOR162
@@ -18744,25 +19187,25 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR132
 	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2707
+	cbz	x2, .L2786
 	ldr	w0, [x2, 24]
 	cmp	w20, w0
-	beq	.L2708
+	beq	.L2787
 	bl	FtlCacheWriteBack
-.L2707:
-	adrp	x0, .LANCHOR92
+.L2786:
+	adrp	x0, .LANCHOR91
 	mov	w19, w20
-	add	x22, x0, :lo12:.LANCHOR92
-.L2709:
-	cbnz	w25, .L2734
+	add	x22, x0, :lo12:.LANCHOR91
+.L2788:
+	cbnz	w25, .L2813
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w20
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2735:
+.L2814:
 	mov	w0, 0
-	b	.L2703
-.L2708:
+	b	.L2782
+.L2787:
 	adrp	x3, .LANCHOR164
 	ldr	w0, [x3, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
@@ -18778,23 +19221,23 @@ FtlWrite:
 	mov	x1, x24
 	mov	w2, w22
 	bl	ftl_memcpy
-	cbz	w27, .L2735
+	cbz	w27, .L2814
 	sub	w23, w23, w19
 	add	w21, w21, w19
 	add	x24, x24, x22
 	add	w20, w20, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w27
-	b	.L2707
-.L2734:
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	b	.L2786
+.L2813:
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
 	adrp	x1, .LANCHOR38
 	str	x1, [x29, 120]
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2710
+	bcc	.L2789
 	mov	w2, 1668
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18806,13 +19249,13 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2710:
+.L2789:
 	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2711
+	cbnz	w0, .L2790
 	bl	FtlCacheWriteBack
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2711:
+.L2790:
 	ldrb	w0, [x22, 7]
 	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
@@ -18825,7 +19268,7 @@ FtlWrite:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2712
+	bcc	.L2791
 	mov	w2, 1701
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18837,29 +19280,29 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2712:
-	adrp	x0, .LANCHOR59
-	add	x0, x0, :lo12:.LANCHOR59
-	str	xzr, [x29, 168]
-	str	x0, [x29, 112]
+.L2791:
 	adrp	x0, .LANCHOR58
 	add	x0, x0, :lo12:.LANCHOR58
+	str	xzr, [x29, 168]
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
 	str	x0, [x29, 104]
-.L2713:
+.L2792:
 	ldr	w1, [x29, 144]
 	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2732
+	bcc	.L2811
 	mov	x27, x1
-.L2714:
+.L2793:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x3, x22
 	mov	w2, 0
 	mov	w1, w27
 	bl	FtlProgPages
 	cmp	w25, w27
-	bcs	.L2733
+	bcs	.L2812
 	mov	w2, 1790
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18871,12 +19314,12 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2733:
+.L2812:
 	sub	w25, w25, w27
-	b	.L2709
-.L2732:
+	b	.L2788
+.L2811:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L2714
+	cbz	w0, .L2793
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -18907,11 +19350,11 @@ FtlWrite:
 	ldr	w0, [x29, 152]
 	cmp	w19, w20
 	ccmp	w0, w19, 4, ne
-	bne	.L2715
+	bne	.L2794
 	cmp	w19, w20
-	bne	.L2716
+	bne	.L2795
 	ldr	x0, [x29, 160]
-	ldrh	w2, [x0, #:lo12:.LANCHOR56]
+	ldrh	w2, [x0, #:lo12:.LANCHOR55]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
 	str	w0, [x29, 148]
@@ -18919,23 +19362,23 @@ FtlWrite:
 	cmp	w2, w23
 	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2717:
+.L2796:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
-	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	cmp	w0, w1
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2718
+	bne	.L2797
 	add	x3, x0, x26
 	cmp	w19, w20
-	bne	.L2719
+	bne	.L2798
 	str	x24, [x3, 8]
-.L2720:
+.L2799:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x22, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2729
+	bcc	.L2808
 	mov	w2, 1775
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18947,7 +19390,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2729:
+.L2808:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -18966,36 +19409,36 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2713
-.L2716:
+	b	.L2792
+.L2795:
 	ldr	x0, [x29, 160]
 	add	w2, w21, w23
 	str	wzr, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2717
-.L2719:
+	b	.L2796
+.L2798:
 	ldr	w0, [x29, 156]
-.L2747:
+.L2826:
 	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x24, x0
 	str	x0, [x3, 8]
-	b	.L2720
-.L2718:
+	b	.L2799
+.L2797:
 	add	x0, x0, x26
 	cmp	w19, w20
-	bne	.L2721
+	bne	.L2800
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2746:
+.L2825:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2723
+	beq	.L2802
 	str	w0, [x29, 188]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19008,17 +19451,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2724
+	bne	.L2803
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2727:
+.L2806:
 	ldr	w0, [x29, 156]
 	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2728
+	bne	.L2807
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x1, x24
 	add	x3, x0, x26
@@ -19026,30 +19469,30 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L2748:
+.L2827:
 	bl	ftl_memcpy
-	b	.L2720
-.L2721:
+	b	.L2799
+.L2800:
 	adrp	x1, .LANCHOR187
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2746
-.L2724:
+	b	.L2825
+.L2803:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2726
+	beq	.L2805
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC72
+	adrp	x0, .LC73
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC72
+	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2726:
+.L2805:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2727
+	beq	.L2806
 	mov	w2, 1754
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -19061,8 +19504,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2727
-.L2723:
+	b	.L2806
+.L2802:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x26
@@ -19070,10 +19513,10 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2727
-.L2728:
+	b	.L2806
+.L2807:
 	ldr	x0, [x29, 160]
-	ldrh	w1, [x0, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	mul	w1, w1, w19
@@ -19081,16 +19524,16 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x24, x1
-	b	.L2748
-.L2715:
+	b	.L2827
+.L2794:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	ldr	x0, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR56]
-	b	.L2747
-.L2736:
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
+	b	.L2826
+.L2815:
 	mov	w0, -1
-	b	.L2703
+	b	.L2782
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19149,12 +19592,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L2754
+	bne	.L2833
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L2754:
+.L2833:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -19174,8 +19617,8 @@ FtlCheckVpc:
 	add	x0, x0, :lo12:.LC45
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR73
-	add	x23, x23, :lo12:.LANCHOR73
+	adrp	x23, .LANCHOR72
+	add	x23, x23, :lo12:.LANCHOR72
 	stp	x21, x22, [sp, 32]
 	mov	w21, 0
 	stp	x19, x20, [sp, 16]
@@ -19190,47 +19633,47 @@ FtlCheckVpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-.L2757:
+.L2836:
 	ldr	w0, [x23]
 	cmp	w21, w0
-	bcc	.L2759
+	bcc	.L2838
 	adrp	x24, .LANCHOR40
-	adrp	x23, .LANCHOR84
+	adrp	x23, .LANCHOR83
 	mov	w2, 2
-	adrp	x0, .LC73
+	adrp	x0, .LC74
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	add	x0, x0, :lo12:.LC73
-	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x0, x0, :lo12:.LC74
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	add	x21, x20, :lo12:check_valid_page_count_table
-	adrp	x26, .LC75
-	add	x26, x26, :lo12:.LC75
+	adrp	x26, .LC76
+	add	x26, x26, :lo12:.LC76
 	mov	w25, 0
 	mov	w19, 0
 	bl	rknand_print_hex
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
 	mov	w2, 2
 	mov	x1, x21
-	adrp	x0, .LC74
+	adrp	x0, .LC75
 	add	x24, x24, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC74
+	add	x0, x0, :lo12:.LC75
 	bl	rknand_print_hex
 	mov	w4, 65535
-.L2760:
+.L2839:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bhi	.L2762
+	bhi	.L2841
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L2842
 	adrp	x0, .LANCHOR88
-	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2763
-	adrp	x0, .LANCHOR89
-	adrp	x26, .LC76
+	adrp	x26, .LC77
 	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x26, x26, :lo12:.LC76
-	ldrh	w27, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR82
+	add	x26, x26, :lo12:.LC77
+	ldrh	w27, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR81
 	mov	x24, x0
 	mov	w21, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	ldr	x1, [x0, #:lo12:.LANCHOR81]
 	mov	w28, 6
 	mov	w4, 65535
 	sub	x19, x19, x1
@@ -19239,12 +19682,12 @@ FtlCheckVpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L2764:
+.L2843:
 	cmp	w21, w27
-	bne	.L2766
-.L2763:
-	cbz	w25, .L2756
-	mov	w2, 1669
+	bne	.L2845
+.L2842:
+	cbz	w25, .L2835
+	mov	w2, 1686
 	add	x1, x22, :lo12:.LANCHOR248
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
@@ -19254,7 +19697,7 @@ FtlCheckVpc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2756:
+.L2835:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19262,52 +19705,52 @@ FtlCheckVpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2759:
+.L2838:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L2758
+	beq	.L2837
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L2758:
+.L2837:
 	add	w21, w21, 1
-	b	.L2757
-.L2762:
-	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	b	.L2836
+.L2841:
+	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x21, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L2761
+	beq	.L2840
 	str	w4, [x29, 108]
 	mov	w1, w19
 	mov	x0, x26
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	ldr	x0, [x23, #:lo12:.LANCHOR83]
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L2761
+	beq	.L2840
 	ldrh	w1, [x21, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w25, w25, wzr, ls
-.L2761:
+.L2840:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2760
-.L2766:
-	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	b	.L2839
+.L2845:
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L2765
+	cbz	w2, .L2844
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w1, w19
 	str	w4, [x29, 108]
@@ -19315,15 +19758,15 @@ FtlCheckVpc:
 	mov	w25, 1
 	bl	printf
 	ldr	w4, [x29, 108]
-.L2765:
+.L2844:
 	umull	x19, w19, w28
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
 	ldrh	w19, [x0, x19]
 	cmp	w19, w4
-	beq	.L2763
+	beq	.L2842
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2764
+	b	.L2843
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",@progbits
 	.align	2
@@ -19340,26 +19783,26 @@ FtlDumpSysBlock:
 	adrp	x21, .LANCHOR202
 	add	x1, x21, :lo12:.LANCHOR202
 	ldr	x2, [x0, #:lo12:.LANCHOR183]
-	adrp	x22, .LANCHOR54
+	adrp	x22, .LANCHOR53
 	stp	x23, x24, [sp, 64]
 	lsl	w26, w25, 10
 	stp	x19, x20, [sp, 32]
-	adrp	x23, .LC77
+	adrp	x23, .LC78
 	str	x27, [sp, 96]
-	adrp	x24, .LC78
+	adrp	x24, .LC79
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR188
-	add	x22, x22, :lo12:.LANCHOR54
-	add	x23, x23, :lo12:.LC77
+	add	x22, x22, :lo12:.LANCHOR53
+	add	x23, x23, :lo12:.LC78
 	ldr	x2, [x2, #:lo12:.LANCHOR188]
-	add	x24, x24, :lo12:.LC78
+	add	x24, x24, :lo12:.LC79
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2782:
+.L2861:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2784
+	blt	.L2863
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19368,7 +19811,7 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2784:
+.L2863:
 	add	x20, x21, :lo12:.LANCHOR202
 	orr	w0, w19, w26
 	mov	w2, 1
@@ -19389,16 +19832,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2783
+	beq	.L2862
 	ldr	x1, [x27, #:lo12:.LANCHOR183]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2783:
+.L2862:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2782
+	b	.L2861
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -19419,33 +19862,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2790:
+.L2869:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2796
+	bhi	.L2875
 	adrp	x25, .LANCHOR128
 	adrp	x19, .LANCHOR202
 	add	x25, x25, :lo12:.LANCHOR128
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w26, 0
-.L2797:
+.L2876:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2800
-	adrp	x21, .LANCHOR54
+	bge	.L2879
+	adrp	x21, .LANCHOR53
 	adrp	x0, .LC48
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
-	add	x21, x21, :lo12:.LANCHOR54
+	add	x21, x21, :lo12:.LANCHOR53
 	add	x24, x0, :lo12:.LC48
-	b	.L2801
-.L2792:
+	b	.L2880
+.L2871:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2791
+	cbnz	w0, .L2870
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -19455,27 +19898,27 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2791:
+.L2870:
 	add	x5, x5, 1
-.L2798:
+.L2877:
 	cmp	w12, w5, uxth
-	bhi	.L2792
-	cbnz	w19, .L2793
-.L2795:
+	bhi	.L2871
+	cbnz	w19, .L2872
+.L2874:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2790
-.L2793:
+	b	.L2869
+.L2872:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
 	bl	FlashReadPages
 	mov	w0, 56
-	adrp	x26, .LC79
-	add	x26, x26, :lo12:.LC79
+	adrp	x26, .LC80
+	add	x26, x26, :lo12:.LC80
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2794:
+.L2873:
 	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	add	x0, x0, x25
 	add	x25, x25, 56
@@ -19491,23 +19934,23 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2794
-	b	.L2795
-.L2796:
-	adrp	x0, .LANCHOR105
+	bne	.L2873
+	b	.L2874
+.L2875:
+	adrp	x0, .LANCHOR104
 	adrp	x21, .LANCHOR180
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
 	mov	x5, 0
-	ldr	x11, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR106
+	ldr	x11, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR105
 	ldr	x6, [x21, #:lo12:.LANCHOR180]
 	mov	w19, 0
-	ldr	x10, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR59
+	ldr	x10, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR58
 	mov	w7, 56
-	ldrh	w8, [x0, #:lo12:.LANCHOR59]
-	b	.L2798
-.L2799:
+	ldrh	w8, [x0, #:lo12:.LANCHOR58]
+	b	.L2877
+.L2878:
 	adrp	x22, .LANCHOR129
 	mov	w2, 1
 	mov	w1, w2
@@ -19531,38 +19974,38 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2801:
+.L2880:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2799
+	blt	.L2878
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2797
-.L2800:
-	adrp	x0, .LANCHOR65
+	b	.L2876
+.L2879:
+	adrp	x0, .LANCHOR64
 	mov	w2, 2
-	adrp	x19, .LANCHOR67
-	ldr	w3, [x0, #:lo12:.LANCHOR65]
+	adrp	x19, .LANCHOR66
+	ldr	w3, [x0, #:lo12:.LANCHOR64]
 	adrp	x0, .LANCHOR129
 	ldr	x1, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR131
-	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR195
-	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	ldrh	w3, [x19, #:lo12:.LANCHOR66]
 	ldp	x21, x22, [sp, 48]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR195]
-	adrp	x0, .LC82
+	adrp	x0, .LC83
 	ldp	x19, x20, [sp, 32]
-	add	x0, x0, :lo12:.LC82
+	add	x0, x0, :lo12:.LC83
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x29, x30, [sp, 16]
@@ -19733,7 +20176,6 @@ dump_map_info:
 	.global	c_ftl_nand_ext_blk_pre_plane
 	.global	c_ftl_nand_blk_pre_plane
 	.global	c_ftl_nand_planes_num
-	.global	c_ftl_nand_blks_per_die_shift
 	.global	c_ftl_nand_blks_per_die
 	.global	c_ftl_nand_planes_per_die
 	.global	c_ftl_nand_die_num
@@ -19750,6 +20192,7 @@ dump_map_info:
 	.global	gNandcVer
 	.global	gNandChipMap
 	.global	gNandIDataBuf
+	.global	idb_flash_slc_mode
 	.global	FlashDdrTunningReadCount
 	.global	FlashWaitBusyScheduleEn
 	.global	gNandPhyInfo
@@ -19796,7 +20239,7 @@ dump_map_info:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",@nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -19836,7 +20279,7 @@ FtlMallocBuffer:
 	.zero	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -19868,24 +20311,17 @@ c_ftl_nand_blk_pre_plane:
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
-	.zero	2
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
-	.align	1
-	.set	.LANCHOR52,. + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
@@ -19920,28 +20356,28 @@ c_ftl_nand_ext_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
@@ -19955,7 +20391,7 @@ c_ftl_nand_max_data_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
@@ -19969,28 +20405,28 @@ c_ftl_nand_max_sys_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
@@ -20011,21 +20447,21 @@ c_ftl_nand_planes_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
@@ -20053,7 +20489,7 @@ c_ftl_nand_type:
 	.zero	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
@@ -20067,7 +20503,7 @@ c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -20094,7 +20530,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
@@ -20165,7 +20601,7 @@ gFlashProgCheckSpareBuffer:
 gFlashSdrModeEn:
 	.zero	1
 	.section	.bss.gFlashSlcMode,"aw",@nobits
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	gFlashSlcMode, %object
 	.size	gFlashSlcMode, 1
 gFlashSlcMode:
@@ -20300,7 +20736,7 @@ gNandOptPara:
 	.zero	32
 	.section	.bss.gNandPhyInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	gNandPhyInfo, %object
 	.size	gNandPhyInfo, 28
 gNandPhyInfo:
@@ -20341,7 +20777,7 @@ gReadRetryInfo:
 	.zero	852
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -20350,9 +20786,9 @@ gSysFreeQueue:
 	.align	3
 	.set	.LANCHOR209,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.zero	12
+	.zero	16
 	.section	.bss.gToggleModeClkDiv,"aw",@nobits
 	.align	2
 	.type	gToggleModeClkDiv, %object
@@ -20396,7 +20832,7 @@ g_LowFormat:
 	.zero	4
 	.section	.bss.g_MaxLbaSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -20410,7 +20846,7 @@ g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -20424,14 +20860,14 @@ g_SlcPartLbaEndSector:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
@@ -20445,14 +20881,14 @@ g_all_blk_used_slc_mode:
 	.zero	4
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -20473,7 +20909,7 @@ g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_flash_read_only_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
@@ -20494,21 +20930,21 @@ g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -20522,7 +20958,7 @@ g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
@@ -20571,42 +21007,42 @@ g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_next_blk_2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	g_gc_next_blk_2, %object
 	.size	g_gc_next_blk_2, 2
 g_gc_next_blk_2:
 	.zero	2
 	.section	.bss.g_gc_next_blk_3,"aw",@nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_next_blk_3, %object
 	.size	g_gc_next_blk_3, 2
 g_gc_next_blk_3:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
@@ -20640,7 +21076,7 @@ g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
@@ -20668,13 +21104,13 @@ g_inkDie_check_enable:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
@@ -20701,42 +21137,42 @@ g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.zero	4
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_page_map_check_enable,"aw",@nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.zero	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR234,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -20750,14 +21186,14 @@ g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR238,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -20770,7 +21206,7 @@ g_recovery_ppa_tbl:
 g_req_cache:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
@@ -20790,7 +21226,7 @@ g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -20881,14 +21317,14 @@ g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_vendor_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
@@ -20909,7 +21345,7 @@ g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
@@ -20970,14 +21406,14 @@ gp_flash_check_buf:
 	.zero	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR229,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
@@ -20988,6 +21424,13 @@ gp_last_act_superblock:
 	.size	idb_buf, 262144
 idb_buf:
 	.zero	262144
+	.section	.bss.idb_flash_slc_mode,"aw",@nobits
+	.align	2
+	.set	.LANCHOR29,. + 0
+	.type	idb_flash_slc_mode, %object
+	.size	idb_flash_slc_mode, 4
+idb_flash_slc_mode:
+	.zero	4
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
 	.set	.LANCHOR154,. + 0
@@ -21011,63 +21454,63 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
@@ -21102,7 +21545,7 @@ p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
@@ -21185,14 +21628,14 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
 	.zero	8
 	.section	.bss.p_vendor_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 8
 p_vendor_block_table:
@@ -21234,14 +21677,14 @@ read_retry_cur_offset:
 	.zero	4
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
@@ -21297,7 +21740,7 @@ LastWritenPbaAddr:
 	.align	3
 	.set	.LANCHOR142,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2464
+	.size	NandFlashParaTbl, 2592
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -21874,6 +22317,58 @@ NandFlashParaTbl:
 	.byte	5
 	.byte	44
 	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
 	.byte	-60
 	.byte	52
 	.byte	-86
@@ -21923,6 +22418,32 @@ NandFlashParaTbl:
 	.byte	1
 	.byte	0
 	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -22262,6 +22783,32 @@ NandFlashParaTbl:
 	.byte	0
 	.zero	4
 	.byte	6
+	.byte	-83
+	.byte	58
+	.byte	20
+	.byte	3
+	.byte	8
+	.byte	80
+	.byte	2
+	.byte	1
+	.byte	32
+	.hword	388
+	.byte	2
+	.byte	2
+	.hword	1362
+	.hword	473
+	.byte	9
+	.byte	8
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.byte	6
 	.byte	-119
 	.byte	100
 	.byte	68
@@ -22458,7 +23005,7 @@ NandFlashParaTbl:
 	.byte	1
 	.hword	1024
 	.hword	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -23385,7 +23932,7 @@ NandOptPara:
 	.zero	14
 	.section	.data.SamsungRefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	SamsungRefValue, %object
 	.size	SamsungRefValue, 64
 SamsungRefValue:
@@ -23455,7 +24002,7 @@ SamsungRefValue:
 	.byte	0
 	.section	.data.Toshiba15RefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	Toshiba15RefValue, %object
 	.size	Toshiba15RefValue, 95
 Toshiba15RefValue:
@@ -23556,7 +24103,7 @@ Toshiba15RefValue:
 	.byte	0
 	.section	.data.ToshibaA19RefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	ToshibaA19RefValue, %object
 	.size	ToshibaA19RefValue, 45
 ToshibaA19RefValue:
@@ -23607,7 +24154,7 @@ ToshibaA19RefValue:
 	.byte	0
 	.section	.data.ToshibaRefValue,"aw",@progbits
 	.align	3
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	ToshibaRefValue, %object
 	.size	ToshibaRefValue, 8
 ToshibaRefValue:
@@ -23621,14 +24168,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR226,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR230,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
@@ -23892,7 +24439,7 @@ refValueDefault:
 .LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC53:
+.LC52:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
 .LC14:
@@ -23921,13 +24468,13 @@ refValueDefault:
 .LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC73:
-	.string	"vpc1"
 .LC74:
-	.string	"vpc2"
+	.string	"vpc1"
 .LC75:
-	.string	"FtlCheckVpc2 %x = %x  %x\n"
+	.string	"vpc2"
 .LC76:
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
+.LC77:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
 .LC45:
@@ -23939,9 +24486,9 @@ refValueDefault:
 .LC48:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
-.LC77:
-	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
 .LC78:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
+.LC79:
 	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC3:
@@ -23949,17 +24496,19 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC64:
+.LC65:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC52:
+.LC63:
+	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
+.LC64:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC66:
-	.string	"FTL version: 5.0.50 20180905"
 .LC67:
-	.string	"...%s: no bad block mapping table, format device\n"
+	.string	"FTL version: 5.0.53 20190107"
 .LC68:
+	.string	"...%s: no bad block mapping table, format device\n"
+.LC69:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
 .LC43:
@@ -23970,14 +24519,14 @@ refValueDefault:
 .LC41:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC57:
+.LC56:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC61:
+.LC60:
 	.string	"RSB refresh addr %x\n"
-.LC62:
+.LC61:
 	.string	"spuer block %x vpn is 0\n "
-.LC63:
+.LC62:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
 .LC49:
@@ -23993,17 +24542,17 @@ refValueDefault:
 .LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC72:
+.LC73:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
 .LC44:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC58:
+.LC57:
 	.string	"Ftlscanalldata = %x\n"
-.LC59:
+.LC58:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC60:
+.LC59:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
 .LC21:
@@ -24020,255 +24569,255 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10011,"a",@progbits
+	.section	.rodata.__func__.10005,"a",@progbits
+	.align	3
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10005, %object
+	.size	__func__.10005, 14
+__func__.10005:
+	.string	"FtlScanSysBlk"
+	.section	.rodata.__func__.10060,"a",@progbits
+	.align	3
+	.set	.LANCHOR221,. + 0
+	.type	__func__.10060, %object
+	.size	__func__.10060, 15
+__func__.10060:
+	.string	"FtlLoadSysInfo"
+	.section	.rodata.__func__.10071,"a",@progbits
+	.align	3
+	.set	.LANCHOR248,. + 0
+	.type	__func__.10071, %object
+	.size	__func__.10071, 12
+__func__.10071:
+	.string	"FtlCheckVpc"
+	.section	.rodata.__func__.10103,"a",@progbits
+	.align	3
+	.set	.LANCHOR224,. + 0
+	.type	__func__.10103, %object
+	.size	__func__.10103, 17
+__func__.10103:
+	.string	"FtlDumpBlockInfo"
+	.section	.rodata.__func__.10122,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.10011, %object
-	.size	__func__.10011, 16
-__func__.10011:
+	.type	__func__.10122, %object
+	.size	__func__.10122, 16
+__func__.10122:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10116,"a",@progbits
+	.section	.rodata.__func__.10227,"a",@progbits
 	.align	3
-	.set	.LANCHOR233,. + 0
-	.type	__func__.10116, %object
-	.size	__func__.10116, 16
-__func__.10116:
+	.set	.LANCHOR232,. + 0
+	.type	__func__.10227, %object
+	.size	__func__.10227, 16
+__func__.10227:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10149,"a",@progbits
+	.section	.rodata.__func__.10260,"a",@progbits
 	.align	3
-	.set	.LANCHOR234,. + 0
-	.type	__func__.10149, %object
-	.size	__func__.10149, 22
-__func__.10149:
+	.set	.LANCHOR233,. + 0
+	.type	__func__.10260, %object
+	.size	__func__.10260, 22
+__func__.10260:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10203,"a",@progbits
+	.section	.rodata.__func__.10314,"a",@progbits
 	.align	3
-	.set	.LANCHOR102,. + 0
-	.type	__func__.10203, %object
-	.size	__func__.10203, 16
-__func__.10203:
+	.set	.LANCHOR101,. + 0
+	.type	__func__.10314, %object
+	.size	__func__.10314, 16
+__func__.10314:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10223,"a",@progbits
+	.section	.rodata.__func__.10334,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.10223, %object
-	.size	__func__.10223, 18
-__func__.10223:
+	.type	__func__.10334, %object
+	.size	__func__.10334, 18
+__func__.10334:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10300,"a",@progbits
+	.section	.rodata.__func__.10411,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.10300, %object
-	.size	__func__.10300, 25
-__func__.10300:
+	.type	__func__.10411, %object
+	.size	__func__.10411, 25
+__func__.10411:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10314,"a",@progbits
+	.section	.rodata.__func__.10425,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10314, %object
-	.size	__func__.10314, 29
-__func__.10314:
+	.type	__func__.10425, %object
+	.size	__func__.10425, 29
+__func__.10425:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10320,"a",@progbits
+	.section	.rodata.__func__.10431,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10320, %object
-	.size	__func__.10320, 19
-__func__.10320:
+	.type	__func__.10431, %object
+	.size	__func__.10431, 19
+__func__.10431:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10331,"a",@progbits
+	.section	.rodata.__func__.10442,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.10331, %object
-	.size	__func__.10331, 16
-__func__.10331:
+	.type	__func__.10442, %object
+	.size	__func__.10442, 16
+__func__.10442:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10336,"a",@progbits
+	.section	.rodata.__func__.10447,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10336, %object
-	.size	__func__.10336, 20
-__func__.10336:
+	.type	__func__.10447, %object
+	.size	__func__.10447, 20
+__func__.10447:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10404,"a",@progbits
+	.section	.rodata.__func__.10515,"a",@progbits
 	.align	3
 	.set	.LANCHOR239,. + 0
-	.type	__func__.10404, %object
-	.size	__func__.10404, 19
-__func__.10404:
+	.type	__func__.10515, %object
+	.size	__func__.10515, 19
+__func__.10515:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10498,"a",@progbits
+	.section	.rodata.__func__.10614,"a",@progbits
 	.align	3
 	.set	.LANCHOR243,. + 0
-	.type	__func__.10498, %object
-	.size	__func__.10498, 23
-__func__.10498:
+	.type	__func__.10614, %object
+	.size	__func__.10614, 23
+__func__.10614:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9325,"a",@progbits
+	.section	.rodata.__func__.9435,"a",@progbits
 	.align	3
 	.set	.LANCHOR245,. + 0
-	.type	__func__.9325, %object
-	.size	__func__.9325, 8
-__func__.9325:
+	.type	__func__.9435, %object
+	.size	__func__.9435, 8
+__func__.9435:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9385,"a",@progbits
+	.section	.rodata.__func__.9495,"a",@progbits
 	.align	3
-	.set	.LANCHOR229,. + 0
-	.type	__func__.9385, %object
-	.size	__func__.9385, 13
-__func__.9385:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9495, %object
+	.size	__func__.9495, 13
+__func__.9495:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9411,"a",@progbits
+	.section	.rodata.__func__.9521,"a",@progbits
 	.align	3
 	.set	.LANCHOR247,. + 0
-	.type	__func__.9411, %object
-	.size	__func__.9411, 9
-__func__.9411:
+	.type	__func__.9521, %object
+	.size	__func__.9521, 9
+__func__.9521:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9494,"a",@progbits
+	.section	.rodata.__func__.9604,"a",@progbits
 	.align	3
 	.set	.LANCHOR124,. + 0
-	.type	__func__.9494, %object
-	.size	__func__.9494, 14
-__func__.9494:
+	.type	__func__.9604, %object
+	.size	__func__.9604, 14
+__func__.9604:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9540,"a",@progbits
+	.section	.rodata.__func__.9650,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9540, %object
-	.size	__func__.9540, 11
-__func__.9540:
+	.type	__func__.9650, %object
+	.size	__func__.9650, 11
+__func__.9650:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9633,"a",@progbits
+	.section	.rodata.__func__.9743,"a",@progbits
 	.align	3
-	.set	.LANCHOR90,. + 0
-	.type	__func__.9633, %object
-	.size	__func__.9633, 17
-__func__.9633:
+	.set	.LANCHOR89,. + 0
+	.type	__func__.9743, %object
+	.size	__func__.9743, 17
+__func__.9743:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9637,"a",@progbits
+	.section	.rodata.__func__.9747,"a",@progbits
 	.align	3
-	.set	.LANCHOR87,. + 0
-	.type	__func__.9637, %object
-	.size	__func__.9637, 17
-__func__.9637:
+	.set	.LANCHOR86,. + 0
+	.type	__func__.9747, %object
+	.size	__func__.9747, 17
+__func__.9747:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9674,"a",@progbits
+	.section	.rodata.__func__.9784,"a",@progbits
 	.align	3
-	.set	.LANCHOR91,. + 0
-	.type	__func__.9674, %object
-	.size	__func__.9674, 17
-__func__.9674:
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9784, %object
+	.size	__func__.9784, 17
+__func__.9784:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9704,"a",@progbits
+	.section	.rodata.__func__.9814,"a",@progbits
 	.align	3
-	.set	.LANCHOR95,. + 0
-	.type	__func__.9704, %object
-	.size	__func__.9704, 22
-__func__.9704:
+	.set	.LANCHOR94,. + 0
+	.type	__func__.9814, %object
+	.size	__func__.9814, 22
+__func__.9814:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9711,"a",@progbits
+	.section	.rodata.__func__.9821,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.9711, %object
-	.size	__func__.9711, 20
-__func__.9711:
+	.set	.LANCHOR227,. + 0
+	.type	__func__.9821, %object
+	.size	__func__.9821, 20
+__func__.9821:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9742,"a",@progbits
+	.section	.rodata.__func__.9852,"a",@progbits
 	.align	3
-	.set	.LANCHOR96,. + 0
-	.type	__func__.9742, %object
-	.size	__func__.9742, 26
-__func__.9742:
+	.set	.LANCHOR95,. + 0
+	.type	__func__.9852, %object
+	.size	__func__.9852, 26
+__func__.9852:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9752,"a",@progbits
+	.section	.rodata.__func__.9862,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.9752, %object
-	.size	__func__.9752, 15
-__func__.9752:
+	.type	__func__.9862, %object
+	.size	__func__.9862, 15
+__func__.9862:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9765,"a",@progbits
+	.section	.rodata.__func__.9875,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9765, %object
-	.size	__func__.9765, 31
-__func__.9765:
+	.type	__func__.9875, %object
+	.size	__func__.9875, 31
+__func__.9875:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9778,"a",@progbits
+	.section	.rodata.__func__.9888,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9778, %object
-	.size	__func__.9778, 16
-__func__.9778:
+	.type	__func__.9888, %object
+	.size	__func__.9888, 16
+__func__.9888:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9798,"a",@progbits
+	.section	.rodata.__func__.9908,"a",@progbits
 	.align	3
-	.set	.LANCHOR99,. + 0
-	.type	__func__.9798, %object
-	.size	__func__.9798, 22
-__func__.9798:
+	.set	.LANCHOR98,. + 0
+	.type	__func__.9908, %object
+	.size	__func__.9908, 22
+__func__.9908:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9814,"a",@progbits
+	.section	.rodata.__func__.9924,"a",@progbits
 	.align	3
-	.set	.LANCHOR227,. + 0
-	.type	__func__.9814, %object
-	.size	__func__.9814, 9
-__func__.9814:
+	.set	.LANCHOR226,. + 0
+	.type	__func__.9924, %object
+	.size	__func__.9924, 9
+__func__.9924:
 	.string	"log2phys"
-	.section	.rodata.__func__.9876,"a",@progbits
+	.section	.rodata.__func__.9986,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9876, %object
-	.size	__func__.9876, 15
-__func__.9876:
+	.type	__func__.9986, %object
+	.size	__func__.9986, 15
+__func__.9986:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9895,"a",@progbits
-	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.9895, %object
-	.size	__func__.9895, 14
-__func__.9895:
-	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9949,"a",@progbits
-	.align	3
-	.set	.LANCHOR221,. + 0
-	.type	__func__.9949, %object
-	.size	__func__.9949, 15
-__func__.9949:
-	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.9960,"a",@progbits
-	.align	3
-	.set	.LANCHOR248,. + 0
-	.type	__func__.9960, %object
-	.size	__func__.9960, 12
-__func__.9960:
-	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.9992,"a",@progbits
-	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.9992, %object
-	.size	__func__.9992, 17
-__func__.9992:
-	.string	"FtlDumpBlockInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC36:
 	.string	"decrement_vpc_count %x = %d\n"
 .LC37:
 	.string	"decrement_vpc_count %x = %d in free list\n"
 	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
-.LC79:
-	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC80:
-	.string	"Mblk:"
+	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 .LC81:
-	.string	"L2P:"
+	.string	"Mblk:"
 .LC82:
+	.string	"L2P:"
+.LC83:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC70:
-	.string	"fix power lost blk = %x vpc=%x\n"
 .LC71:
+	.string	"fix power lost blk = %x vpc=%x\n"
+.LC72:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
@@ -24284,17 +24833,17 @@ __func__.9992:
 .LC17:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC54:
+.LC53:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC55:
+.LC54:
 	.string	"map_ppn:"
-.LC56:
+.LC55:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC65:
+.LC66:
 	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC69:
+.LC70:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 125ba6d30c..8e0423e3d2 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,10 +5,10 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-09-08
+ * date: 2019-01-07
  */
 	.arch armv8-a
-	.file	"rk_zftl_arm_v8.S"
+	.file	"rk_zftl_arm_v8.c"
 	.section	.text.flash_mem_cmp8,"ax",@progbits
 	.align	2
 	.type	flash_mem_cmp8, %function
@@ -540,10 +540,10 @@ zftl_get_gc_node.part.9:
 	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
 	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
-	.section	.text.nandc_de_cs.constprop.29,"ax",@progbits
+	.section	.text.nandc_de_cs.constprop.28,"ax",@progbits
 	.align	2
-	.type	nandc_de_cs.constprop.29, %function
-nandc_de_cs.constprop.29:
+	.type	nandc_de_cs.constprop.28, %function
+nandc_de_cs.constprop.28:
 	adrp	x0, .LANCHOR13
 	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
@@ -551,7 +551,7 @@ nandc_de_cs.constprop.29:
 	and	w0, w0, -131073
 	str	w0, [x1]
 	ret
-	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
+	.size	nandc_de_cs.constprop.28, .-nandc_de_cs.constprop.28
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -957,43 +957,47 @@ toshiba_set_rr_para:
 hynix_set_rr_para:
 	adrp	x2, .LANCHOR26
 	and	w1, w1, 255
-	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR26]
-	mov	x4, 0
-	add	x6, x2, 128
-	add	x2, x2, 112
-	ldrb	w5, [x2, 1]
-	cmp	w5, w4, uxtb
-	umaddl	x3, w1, w5, x3
-	mov	w1, 160
-	umaddl	x1, w1, w0, x3
+	ldr	x3, [x2, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR13
+	add	x6, x3, 128
+	add	x4, x3, 112
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	ldrb	w5, [x3, 113]
+	ldrb	w3, [x3, 112]
+	cmp	w3, 8
+	mov	x3, 32
+	umaddl	x1, w1, w5, x3
+	beq	.L223
+	mov	w3, 160
+	umaddl	x1, w3, w0, x1
+.L223:
 	ubfiz	x0, x0, 8, 8
-	add	x2, x2, x1
-	adrp	x1, .LANCHOR13
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
-	add	x3, x3, x0
+	mov	x3, 0
+	add	x2, x2, x0
 	mov	w0, 54
-	str	w0, [x3, 2056]
-	bhi	.L228
+	add	x4, x4, x1
+	cmp	w5, w3, uxtb
+	str	w0, [x2, 2056]
+	bhi	.L230
 	mov	w0, 22
-	str	w0, [x3, 2056]
+	str	w0, [x2, 2056]
 	ret
-.L228:
+.L230:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L224:
-	ldrb	w0, [x6, x4]
-	str	w0, [x3, 2052]
+.L226:
+	ldrb	w0, [x6, x3]
+	str	w0, [x2, 2052]
 	mov	w0, 120
 	bl	timer_delay_ns
-	ldrsb	w0, [x2, x4]
-	str	w0, [x3, 2048]
-	add	x4, x4, 1
-	cmp	w5, w4, uxtb
-	bhi	.L224
+	ldrsb	w0, [x4, x3]
+	str	w0, [x2, 2048]
+	add	x3, x3, 1
+	cmp	w5, w3, uxtb
+	bhi	.L226
 	mov	w0, 22
-	str	w0, [x3, 2056]
+	str	w0, [x2, 2056]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	hynix_set_rr_para, .-hynix_set_rr_para
@@ -1006,15 +1010,15 @@ hynix_reconfig_rr_para:
 	ldrb	w1, [x1, #:lo12:.LANCHOR23]
 	sub	w1, w1, #1
 	and	w1, w1, 255
-	cmp	w1, 6
-	bhi	.L235
+	cmp	w1, 7
+	bhi	.L237
 	adrp	x8, .LANCHOR26
 	and	w0, w0, 255
 	sxtw	x7, w0
 	ldr	x1, [x8, #:lo12:.LANCHOR26]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L235
+	cbz	w1, .L237
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
@@ -1024,7 +1028,7 @@ hynix_reconfig_rr_para:
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L235:
+.L237:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -1042,10 +1046,10 @@ nandc_set_ddr_para:
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L239
+	bne	.L241
 	str	w1, [x2, 80]
 	ret
-.L239:
+.L241:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1059,14 +1063,14 @@ nandc_get_ddr_para:
 	cmp	w0, 9
 	adrp	x0, .LANCHOR13
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L242
+	bne	.L244
 	ldr	w0, [x0, 80]
-.L244:
+.L246:
 	ubfx	x0, x0, 8, 8
 	ret
-.L242:
+.L244:
 	ldr	w0, [x0, 304]
-	b	.L244
+	b	.L246
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
@@ -1078,7 +1082,7 @@ nandc_set_if_mode:
 	tst	w0, 6
 	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L246
+	beq	.L248
 	tst	x0, 4
 	orr	w1, w1, 24576
 	adrp	x0, .LANCHOR27
@@ -1090,7 +1094,7 @@ nandc_set_if_mode:
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L248
+	bne	.L250
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1098,10 +1102,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L249:
+.L251:
 	str	w1, [x2]
 	ret
-.L248:
+.L250:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1109,10 +1113,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L249
-.L246:
+	b	.L251
+.L248:
 	and	w1, w1, -8193
-	b	.L249
+	b	.L251
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
@@ -1143,14 +1147,14 @@ flash_wait_device_ready_raw:
 	mov	w20, w2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bhi	.L254
+	bhi	.L256
 	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 606
+	mov	w2, 677
 	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L254:
+.L256:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w21, sxtw]
@@ -1164,7 +1168,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L257:
+.L259:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1174,10 +1178,10 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L257
+	bne	.L259
 	cmp	w3, 255
-	beq	.L257
-	bl	nandc_de_cs.constprop.29
+	beq	.L259
+	bl	nandc_de_cs.constprop.28
 	ldr	x21, [sp, 32]
 	mov	w0, w3
 	ldp	x19, x20, [sp, 16]
@@ -1193,31 +1197,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L261
+	bne	.L263
 	adrp	x0, .LANCHOR0
 	adrp	x5, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L262
+	cbz	w0, .L264
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
-	cbz	w0, .L261
-.L262:
+	cbz	w0, .L263
+.L264:
 	adrp	x0, .LANCHOR2
 	ldrh	w3, [x0, #:lo12:.LANCHOR2]
 	ldrb	w0, [x5, #:lo12:.LANCHOR1]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L263
+	cbz	w0, .L265
 	add	w1, w4, w3, lsl 1
-.L261:
+.L263:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L263:
+.L265:
 	adrp	x5, .LANCHOR3
 	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L261
+	b	.L263
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_de_cs,"ax",@progbits
 	.align	2
@@ -1232,33 +1236,289 @@ nandc_de_cs:
 	str	w0, [x1]
 	ret
 	.size	nandc_de_cs, .-nandc_de_cs
-	.section	.text.nandc_wait_flash_ready,"ax",@progbits
+	.section	.text.nandc_wait_flash_ready_no_delay,"ax",@progbits
 	.align	2
-	.global	nandc_wait_flash_ready
-	.type	nandc_wait_flash_ready, %function
-nandc_wait_flash_ready:
+	.global	nandc_wait_flash_ready_no_delay
+	.type	nandc_wait_flash_ready_no_delay, %function
+nandc_wait_flash_ready_no_delay:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
 	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
+.L275:
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbnz	x0, 9, .L276
+	mov	w0, 10
+	bl	timer_delay_ns
+	subs	w2, w2, #1
+	bne	.L275
+	mov	w0, -1
 .L273:
-	mov	w0, 100
+	ldp	x29, x30, [sp], 32
+	ret
+.L276:
+	mov	w0, 0
+	b	.L273
+	.size	nandc_wait_flash_ready_no_delay, .-nandc_wait_flash_ready_no_delay
+	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	zftl_flash_enter_slc_mode
+	.type	zftl_flash_enter_slc_mode, %function
+zftl_flash_enter_slc_mode:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L279
+	adrp	x2, .LANCHOR13
+	and	x0, x0, 255
+	cmp	w1, 1
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	bne	.L282
+.L302:
+	adrp	x1, .LANCHOR30+29
+	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
+	cbz	w1, .L279
+	add	x0, x0, 8
+	add	x0, x4, x0, lsl 8
+	str	w1, [x0, 8]
+	ret
+.L282:
+	cmp	w1, 2
+	bne	.L284
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
+	ldrb	w2, [x1, x0]
+	cbz	w2, .L279
+	strb	wzr, [x1, x0]
+	b	.L302
+.L284:
+	cmp	w1, 3
+	bne	.L279
+	adrp	x1, .LANCHOR31
+	sxtw	x2, w0
+	add	x1, x1, :lo12:.LANCHOR31
+	ldrb	w3, [x1, x2]
+	cbz	w3, .L279
+	ubfiz	x0, x0, 8, 8
+	stp	x29, x30, [sp, -16]!
+	add	x4, x4, x0
+	mov	w0, 239
+	add	x29, sp, 0
+	strb	wzr, [x1, x2]
+	str	w0, [x4, 2056]
+	mov	w0, 145
+	str	w0, [x4, 2052]
+	mov	w0, 50
+	bl	timer_delay_ns
+	str	wzr, [x4, 2048]
+	mov	w0, 1
+	str	w0, [x4, 2048]
+	str	wzr, [x4, 2048]
+	mov	w0, 150
+	str	wzr, [x4, 2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	mov	w0, 218
+	str	w0, [x4, 2056]
+	mov	w0, 150
+	bl	timer_delay_ns
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready_no_delay
+.L279:
+	ret
+	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
+	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	zftl_flash_exit_slc_mode
+	.type	zftl_flash_exit_slc_mode, %function
+zftl_flash_exit_slc_mode:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L303
+	adrp	x2, .LANCHOR13
+	and	x0, x0, 255
+	cmp	w1, 1
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	bne	.L306
+	adrp	x1, .LANCHOR30+30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30+30]
+.L328:
+	cbz	w1, .L303
+	add	x0, x0, 8
+	add	x0, x4, x0, lsl 8
+	str	w1, [x0, 8]
+	ret
+.L306:
+	cmp	w1, 2
+	bne	.L308
+	adrp	x2, .LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR31
+	ldrb	w1, [x2, x0]
+	cbnz	w1, .L303
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
+	mov	w5, 4
+	ldrb	w3, [x1, 12]
+	ldrb	w1, [x1, 30]
+	cmp	w3, 2
+	csel	w3, w3, w5, eq
+	strb	w3, [x2, x0]
+	b	.L328
+.L308:
+	cmp	w1, 3
+	bne	.L303
+	adrp	x2, .LANCHOR31
+	sxtw	x5, w0
+	add	x2, x2, :lo12:.LANCHOR31
+	ldrb	w1, [x2, x5]
+	cbnz	w1, .L303
+	adrp	x3, .LANCHOR30
+	add	x3, x3, :lo12:.LANCHOR30
+	stp	x29, x30, [sp, -16]!
+	ubfiz	x0, x0, 8, 8
+	add	x4, x4, x0
+	mov	w6, 4
+	add	x29, sp, 0
+	ldrb	w1, [x3, 12]
+	mov	w0, 239
+	str	w0, [x4, 2056]
+	mov	w0, 145
+	cmp	w1, 2
+	str	w0, [x4, 2052]
+	csel	w1, w1, w6, eq
+	mov	w0, 50
+	strb	w1, [x2, x5]
+	bl	timer_delay_ns
+	ldrb	w0, [x3, 7]
+	cmp	w0, 9
+	mov	w0, 1
+	bne	.L311
+	str	w0, [x4, 2048]
+.L312:
+	str	w0, [x4, 2048]
+	mov	w0, 150
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	bl	timer_delay_ns
+	bl	nandc_wait_flash_ready_no_delay
+	mov	w0, 223
+	str	w0, [x4, 2056]
+	mov	w0, 150
+	bl	timer_delay_ns
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready_no_delay
+.L311:
+	ldrb	w1, [x2, x5]
+	str	w1, [x4, 2048]
+	b	.L312
+.L303:
+	ret
+	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
+	.section	.text.flash_start_page_read,"ax",@progbits
+	.align	2
+	.global	flash_start_page_read
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x21, x22, [sp, 32]
+	ubfx	x22, x1, 21, 3
+	and	w19, w1, 2097151
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	ubfx	x21, x1, 24, 2
+	cmp	w0, w22
+	bhi	.L330
+	adrp	x1, .LANCHOR32
+	adrp	x0, .LC0
+	mov	w2, 845
+	add	x1, x1, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L330:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w8, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x7, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w8
+	bl	nandc_cs
+	cbnz	w21, .L331
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L332
+	mov	w0, w8
+	bl	zftl_flash_enter_slc_mode
+.L332:
+	ubfiz	x1, x8, 8, 8
+	and	w0, w19, 255
+	add	x1, x7, x1
+	ldp	x21, x22, [sp, 32]
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w0, [x1, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x1, 2052]
+	lsr	w19, w19, 16
+	str	w19, [x1, 2052]
+	str	w20, [x1, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.28
+.L331:
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L333
+	sxtw	x0, w8
+	add	x0, x0, 8
+	add	x0, x7, x0, lsl 8
+	str	w21, [x0, 8]
+	b	.L332
+.L333:
+	mov	w0, w8
+	bl	zftl_flash_exit_slc_mode
+	b	.L332
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.nandc_wait_flash_ready,"ax",@progbits
+	.align	2
+	.global	nandc_wait_flash_ready
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	stp	x29, x30, [sp, -32]!
+	mov	w0, 150
+	add	x29, sp, 0
 	bl	timer_delay_ns
+	mov	w2, 34464
+	adrp	x3, .LANCHOR13
+	movk	w2, 0x1, lsl 16
+.L340:
 	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L274
+	tbnz	x0, 9, .L341
+	mov	w0, 10
+	bl	timer_delay_ns
 	subs	w2, w2, #1
-	bne	.L273
+	bne	.L340
 	mov	w0, -1
-.L271:
+.L338:
 	ldp	x29, x30, [sp], 32
 	ret
-.L274:
+.L341:
 	mov	w0, 0
-	b	.L271
+	b	.L338
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1289,22 +1549,22 @@ sandisk_set_rr_para:
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L278:
+.L345:
 	cmp	w4, w0
-	bhi	.L281
+	bhi	.L348
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L281:
+.L348:
 	cmp	w5, 67
-	bne	.L279
+	bne	.L346
 	ldrsb	w6, [x1, x0]
-.L283:
+.L350:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L278
-.L279:
+	b	.L345
+.L346:
 	ldrsb	w6, [x2, x0]
-	b	.L283
+	b	.L350
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1323,8 +1583,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR33
+	add	x0, x0, :lo12:.LANCHOR33
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1359,8 +1619,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR31
-	add	x2, x2, :lo12:.LANCHOR31
+	adrp	x2, .LANCHOR34
+	add	x2, x2, :lo12:.LANCHOR34
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1376,7 +1636,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L288
+	cbz	w2, .L355
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1385,8 +1645,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR35
+	add	x0, x0, :lo12:.LANCHOR35
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1408,215 +1668,22 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L291:
+.L358:
 	b	nandc_wait_flash_ready
-.L288:
+.L355:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR33
-	add	x2, x2, :lo12:.LANCHOR33
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L291
+	b	.L358
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
-	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
-	.align	2
-	.global	zftl_flash_enter_slc_mode
-	.type	zftl_flash_enter_slc_mode, %function
-zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR0
-	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR0]
-	cbz	w2, .L294
-	adrp	x1, .LANCHOR13
-	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L297
-.L314:
-	adrp	x2, .LANCHOR34+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR34+29]
-	cbz	w2, .L294
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	str	w2, [x0, 8]
-	ret
-.L297:
-	cmp	w2, 2
-	bne	.L299
-	adrp	x2, .LANCHOR35
-	add	x2, x2, :lo12:.LANCHOR35
-	ldrb	w3, [x2, x0]
-	cbz	w3, .L294
-	strb	wzr, [x2, x0]
-	b	.L314
-.L299:
-	cmp	w2, 3
-	bne	.L294
-	adrp	x2, .LANCHOR35
-	sxtw	x3, w0
-	add	x2, x2, :lo12:.LANCHOR35
-	ldrb	w4, [x2, x3]
-	cbz	w4, .L294
-	ubfiz	x0, x0, 8, 8
-	strb	wzr, [x2, x3]
-	add	x0, x1, x0
-	mov	w1, 239
-	str	w1, [x0, 2056]
-	mov	w1, 145
-	str	w1, [x0, 2052]
-	mov	w1, 1
-	str	wzr, [x0, 2048]
-	str	w1, [x0, 2048]
-	str	wzr, [x0, 2048]
-	str	wzr, [x0, 2048]
-	b	nandc_wait_flash_ready
-.L294:
-	ret
-	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
-	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
-	.align	2
-	.global	zftl_flash_exit_slc_mode
-	.type	zftl_flash_exit_slc_mode, %function
-zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR0
-	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR0]
-	cbz	w2, .L315
-	adrp	x1, .LANCHOR13
-	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L318
-	adrp	x2, .LANCHOR34+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR34+30]
-.L335:
-	cbz	w2, .L315
-	add	x0, x0, 8
-	add	x0, x1, x0, lsl 8
-	str	w2, [x0, 8]
-	ret
-.L318:
-	cmp	w2, 2
-	bne	.L320
-	adrp	x3, .LANCHOR35
-	add	x3, x3, :lo12:.LANCHOR35
-	ldrb	w2, [x3, x0]
-	cbnz	w2, .L315
-	adrp	x2, .LANCHOR34
-	add	x2, x2, :lo12:.LANCHOR34
-	mov	w5, 4
-	ldrb	w4, [x2, 12]
-	ldrb	w2, [x2, 30]
-	cmp	w4, 2
-	csel	w4, w4, w5, eq
-	strb	w4, [x3, x0]
-	b	.L335
-.L320:
-	cmp	w2, 3
-	bne	.L315
-	adrp	x3, .LANCHOR35
-	sxtw	x4, w0
-	add	x3, x3, :lo12:.LANCHOR35
-	ldrb	w2, [x3, x4]
-	cbnz	w2, .L315
-	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR34+12
-	add	x0, x1, x0
-	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR34+12]
-	mov	w5, 4
-	str	w1, [x0, 2056]
-	cmp	w2, 2
-	mov	w1, 145
-	str	w1, [x0, 2052]
-	csel	w2, w2, w5, eq
-	str	w2, [x0, 2048]
-	mov	w1, 1
-	str	w1, [x0, 2048]
-	str	wzr, [x0, 2048]
-	str	wzr, [x0, 2048]
-	strb	w2, [x3, x4]
-	b	nandc_wait_flash_ready
-.L315:
-	ret
-	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
-	.section	.text.flash_start_page_read,"ax",@progbits
-	.align	2
-	.global	flash_start_page_read
-	.type	flash_start_page_read, %function
-flash_start_page_read:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR18
-	stp	x21, x22, [sp, 32]
-	ubfx	x22, x1, 21, 3
-	and	w19, w1, 2097151
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	ubfx	x21, x1, 24, 2
-	cmp	w0, w22
-	bhi	.L337
-	adrp	x1, .LANCHOR36
-	adrp	x0, .LC0
-	mov	w2, 748
-	add	x1, x1, :lo12:.LANCHOR36
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L337:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w7, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w7
-	bl	nandc_cs
-	cbnz	w21, .L338
-	mov	w0, w19
-	bl	slc_phy_page_address_calc
-	mov	w19, w0
-	adrp	x0, .LANCHOR0
-	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L339
-	mov	w0, w7
-	bl	zftl_flash_enter_slc_mode
-.L339:
-	ubfiz	x1, x7, 8, 8
-	and	w0, w19, 255
-	add	x1, x6, x1
-	ldp	x21, x22, [sp, 32]
-	str	wzr, [x1, 2056]
-	str	wzr, [x1, 2052]
-	str	wzr, [x1, 2052]
-	str	w0, [x1, 2052]
-	lsr	w0, w19, 8
-	str	w0, [x1, 2052]
-	lsr	w19, w19, 16
-	str	w19, [x1, 2052]
-	str	w20, [x1, 2056]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.29
-.L338:
-	adrp	x0, .LANCHOR16
-	ldr	x0, [x0, #:lo12:.LANCHOR16]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L340
-	sxtw	x0, w7
-	add	x0, x0, 8
-	add	x0, x6, x0, lsl 8
-	str	w21, [x0, 8]
-	b	.L339
-.L340:
-	mov	w0, w7
-	bl	zftl_flash_exit_slc_mode
-	b	.L339
-	.size	flash_start_page_read, .-flash_start_page_read
-	.section	.text.flash_erase_duplane_block,"ax",@progbits
+	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
 	.global	flash_erase_duplane_block
 	.type	flash_erase_duplane_block, %function
@@ -1634,14 +1701,14 @@ flash_erase_duplane_block:
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L346
+	bhi	.L362
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 517
+	mov	w2, 588
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L346:
+.L362:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w19, sxtw]
@@ -1652,21 +1719,21 @@ flash_erase_duplane_block:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L347
+	tbz	x0, 4, .L363
 	adrp	x0, .LC31
 	mov	w3, w20
 	mov	w2, w21
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L347:
+.L363:
 	bl	nandc_wait_flash_ready
 	mov	w0, w22
 	bl	nandc_cs
 	mov	w0, w22
-	cbnz	w25, .L348
+	cbnz	w25, .L364
 	bl	zftl_flash_enter_slc_mode
-.L349:
+.L365:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
@@ -1678,7 +1745,7 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	adrp	x0, .LANCHOR38
 	ldrb	w0, [x0, #:lo12:.LANCHOR38]
-	cbnz	w0, .L352
+	cbnz	w0, .L368
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1686,7 +1753,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L350:
+.L366:
 	mov	w0, 96
 	str	w0, [x24, 2056]
 	and	w0, w20, 255
@@ -1702,15 +1769,15 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L351
+	cbz	w19, .L367
 	adrp	x0, .LC32
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L351:
+.L367:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1718,12 +1785,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L348:
+.L364:
 	bl	zftl_flash_exit_slc_mode
-	b	.L349
-.L352:
+	b	.L365
+.L368:
 	mov	w5, 0
-	b	.L350
+	b	.L366
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1743,14 +1810,14 @@ flash_erase_block_en:
 	stp	x19, x20, [sp, 16]
 	and	w22, w2, 2097151
 	cmp	w0, w23
-	bhi	.L361
+	bhi	.L377
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
-	mov	w2, 562
+	mov	w2, 633
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L361:
+.L377:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w23, sxtw]
@@ -1761,21 +1828,21 @@ flash_erase_block_en:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x24, x19, 8
 	add	x24, x25, x24, lsl 8
-	tbz	x0, 4, .L362
+	tbz	x0, 4, .L378
 	adrp	x0, .LC33
 	mov	w3, w26
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L362:
+.L378:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w26, .L363
+	cbnz	w26, .L379
 	bl	zftl_flash_enter_slc_mode
-.L364:
+.L380:
 	add	x0, x25, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1791,10 +1858,10 @@ flash_erase_block_en:
 	mov	x0, x24
 	bl	flash_read_status
 	mov	w19, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L365
+	beq	.L381
 	adrp	x0, .LANCHOR2
 	mov	w3, w19
 	mov	w1, w23
@@ -1803,7 +1870,7 @@ flash_erase_block_en:
 	add	x0, x0, :lo12:.LC34
 	udiv	w2, w21, w2
 	bl	printf
-.L365:
+.L381:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1811,9 +1878,9 @@ flash_erase_block_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L363:
+.L379:
 	bl	zftl_flash_exit_slc_mode
-	b	.L364
+	b	.L380
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1830,8 +1897,8 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
@@ -1847,10 +1914,10 @@ flash_erase_all:
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L375:
+.L391:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L378
+	bhi	.L394
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1860,23 +1927,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L378:
+.L394:
 	add	x0, x24, :lo12:.LANCHOR29
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L376:
+.L392:
 	cmp	w20, w21, uxth
-	bhi	.L377
+	bhi	.L393
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L375
-.L377:
+	b	.L391
+.L393:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L376
+	b	.L392
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_start_plane_read,"ax",@progbits
 	.align	2
@@ -1894,23 +1961,23 @@ flash_start_plane_read:
 	and	w20, w1, 2097151
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w22
-	bhi	.L381
+	bhi	.L397
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 843
+	mov	w2, 940
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L381:
+.L397:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w6, [x0, w22, sxtw]
+	ldrb	w7, [x0, w22, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x8, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w6
+	ldr	x10, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w7
 	bl	nandc_cs
-	adrp	x7, .LANCHOR16
-	cbnz	w19, .L382
+	adrp	x8, .LANCHOR16
+	cbnz	w19, .L398
 	mov	w0, w21
 	bl	slc_phy_page_address_calc
 	mov	w21, w0
@@ -1919,25 +1986,25 @@ flash_start_plane_read:
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L383
-	mov	w0, w6
+	cbz	w0, .L399
+	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
-.L383:
-	and	x4, x6, 255
+.L399:
 	adrp	x0, .LANCHOR19
+	and	x4, x7, 255
 	add	x1, x0, :lo12:.LANCHOR19
-	add	x4, x8, x4, lsl 8
+	add	x4, x10, x4, lsl 8
 	and	w3, w21, 255
 	and	w6, w20, 255
 	lsr	w5, w20, 8
 	lsr	w20, w20, 16
-	ldrb	w10, [x1, 8]
+	ldrb	w11, [x1, 8]
 	ldrb	w2, [x1, 16]
-	str	w10, [x4, 2056]
+	str	w11, [x4, 2056]
 	cmp	w2, 1
 	lsr	w2, w21, 8
 	lsr	w21, w21, 16
-	bne	.L385
+	bne	.L401
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
 	str	w3, [x4, 2052]
@@ -1946,17 +2013,17 @@ flash_start_plane_read:
 	str	w21, [x4, 2052]
 	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L386
-	cbz	w19, .L386
+	bne	.L402
+	cbz	w19, .L402
 	str	w19, [x4, 2056]
-.L386:
+.L402:
 	str	wzr, [x4, 2056]
 	str	wzr, [x4, 2052]
 	str	wzr, [x4, 2052]
-.L399:
+.L415:
 	ldp	x21, x22, [sp, 32]
 	str	w6, [x4, 2052]
 	str	w5, [x4, 2052]
@@ -1965,36 +2032,36 @@ flash_start_plane_read:
 	str	w0, [x4, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs.constprop.29
-.L382:
-	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	b	nandc_de_cs.constprop.28
+.L398:
+	ldr	x0, [x8, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L384
-	sxtw	x0, w6
+	bne	.L400
+	sxtw	x0, w7
 	add	x0, x0, 8
-	add	x0, x8, x0, lsl 8
+	add	x0, x10, x0, lsl 8
 	str	w19, [x0, 8]
-	b	.L383
-.L384:
-	mov	w0, w6
+	b	.L399
+.L400:
+	mov	w0, w7
 	bl	zftl_flash_exit_slc_mode
-	b	.L383
-.L385:
+	b	.L399
+.L401:
 	str	w3, [x4, 2052]
-	ldr	x1, [x7, #:lo12:.LANCHOR16]
+	ldr	x1, [x8, #:lo12:.LANCHOR16]
 	str	w2, [x4, 2052]
 	str	w21, [x4, 2052]
 	ldrb	w1, [x1, 12]
 	cmp	w1, 3
-	bne	.L388
-	cbz	w19, .L388
+	bne	.L404
+	cbz	w19, .L404
 	str	w19, [x4, 2056]
-.L388:
+.L404:
 	add	x0, x0, :lo12:.LANCHOR19
 	ldrb	w0, [x0, 9]
 	str	w0, [x4, 2056]
-	b	.L399
+	b	.L415
 	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -2004,61 +2071,70 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
+	adrp	x22, .LANCHOR41
+	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	add	x22, x22, :lo12:.LANCHOR42
-	adrp	x24, .LANCHOR41
-	adrp	x23, .LANCHOR14
+	adrp	x20, .LANCHOR42
+	mov	w23, w0
+	add	x22, x22, :lo12:.LANCHOR41
+	add	x20, x20, :lo12:.LANCHOR42
+	add	x21, x21, :lo12:.LANCHOR14
 	str	x25, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR41
-	add	x23, x23, :lo12:.LANCHOR14
-	mov	w25, w0
-	stp	x19, x20, [sp, 16]
-	mov	x21, 0
-.L410:
-	lsl	x0, x21, 3
-	ldrb	w19, [x0, x24]
-	mov	w0, 69
-	cmp	w19, 152
-	ccmp	w19, w0, 4, ne
-	beq	.L401
-	cmp	w19, 44
-	mov	w0, 137
-	ccmp	w19, w0, 4, ne
-	bne	.L402
-.L401:
+	mov	x25, 0
+.L429:
 	adrp	x0, .LANCHOR13
-	ldrb	w1, [x22]
-	cmp	w25, 1
-	ldr	x20, [x0, #:lo12:.LANCHOR13]
-	bne	.L403
-	tbz	x1, 0, .L402
-	ldr	w0, [x23]
-	tbz	x0, 12, .L404
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	lsl	x0, x25, 3
+	ldrb	w24, [x0, x22]
+	cmp	w24, 69
+	beq	.L417
+	add	w0, w24, 119
+	cmp	w24, 44
+	and	w1, w0, 255
+	cset	w2, eq
+	cmp	w1, 18
+	bhi	.L430
+	mov	x0, 32769
+	movk	x0, 0x4, lsl 16
+	lsr	x0, x0, x1
+	mvn	x0, x0
+.L418:
+	and	w0, w0, 1
+	eor	w0, w0, 1
+	orr	w0, w2, w0
+	cbz	w0, .L419
+.L417:
+	ldrb	w1, [x20]
+	cmp	w23, 1
+	bne	.L420
+	tbz	x1, 0, .L419
+	ldr	w0, [x21]
+	tbz	x0, 12, .L421
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L404:
-	add	x0, x20, x21, lsl 8
+.L421:
+	add	x0, x19, x25, lsl 8
 	mov	w1, 239
-	cmp	w19, 44
+	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
-	ccmp	w19, w1, 4, ne
+	ccmp	w24, w1, 4, ne
 	mov	w1, 1
-	bne	.L405
+	bne	.L422
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L428:
+.L452:
 	str	w1, [x0, 2048]
-.L409:
+.L427:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L402:
-	add	x21, x21, 1
-	cmp	x21, 4
-	bne	.L410
+.L419:
+	add	x25, x25, 1
+	cmp	x25, 4
+	bne	.L429
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -2067,34 +2143,50 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L405:
+.L430:
+	mov	x0, 1
+	b	.L418
+.L422:
+	cmp	w24, 155
+	bne	.L424
+	str	w1, [x0, 2052]
+	mov	w1, 3
+	b	.L452
+.L424:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L428
-.L403:
-	tbz	x1, 2, .L402
-	ldr	w0, [x23]
-	tbz	x0, 12, .L407
+	b	.L452
+.L420:
+	tbz	x1, 2, .L419
+	ldr	w0, [x21]
+	tbz	x0, 12, .L425
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L407:
-	add	x0, x20, x21, lsl 8
+.L425:
+	add	x0, x19, x25, lsl 8
 	mov	w1, 239
-	cmp	w19, 44
+	cmp	w24, 44
 	str	w1, [x0, 2056]
 	mov	w1, 137
-	ccmp	w19, w1, 4, ne
-	bne	.L408
+	ccmp	w24, w1, 4, ne
+	bne	.L426
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L428
-.L408:
+	b	.L452
+.L426:
+	cmp	w24, 155
+	bne	.L428
+	mov	w1, 1
+	str	w1, [x0, 2052]
+	mov	w1, 37
+	b	.L452
+.L428:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L409
+	b	.L427
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
@@ -2148,12 +2240,12 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L430
+	bhi	.L454
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2164,7 +2256,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L430:
+.L454:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2175,10 +2267,10 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR34+9
+	adrp	x2, .LANCHOR30+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR34+9]
+	ldrb	w3, [x2, #:lo12:.LANCHOR30+9]
 	adrp	x2, .LANCHOR13
 	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
@@ -2201,6 +2293,81 @@ flash_read_spare:
 	strb	w0, [x5]
 	ret
 	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.flash_read_otp_data,"ax",@progbits
+	.align	2
+	.global	flash_read_otp_data
+	.type	flash_read_otp_data, %function
+flash_read_otp_data:
+	stp	x29, x30, [sp, -48]!
+	and	w4, w0, 255
+	adrp	x0, .LANCHOR13
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w4
+	str	x21, [sp, 32]
+	mov	x21, x2
+	bl	nandc_cs
+	ubfiz	x4, x4, 8, 8
+	add	x19, x19, x4
+	mov	w0, 239
+	mov	w4, 144
+	str	w0, [x19, 2056]
+	mov	w0, 50
+	str	w4, [x19, 2052]
+	bl	timer_delay_ns
+	mov	w0, 1
+	str	w0, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bl	nandc_wait_flash_ready
+	mov	w0, 238
+	str	w0, [x19, 2056]
+	str	w4, [x19, 2052]
+	mov	w1, w20
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	ldr	w2, [x19, 2048]
+	ldr	w3, [x19, 2048]
+	ldr	w4, [x19, 2048]
+	bl	printf
+	bl	nandc_wait_flash_ready
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w20, w20, 16
+	str	w20, [x19, 2052]
+	mov	w0, 48
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, 0
+.L460:
+	ldr	w1, [x19, 2048]
+	strb	w1, [x21, x0]
+	add	x0, x0, 1
+	cmp	x0, 16384
+	bne	.L460
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 144
+	str	w0, [x19, 2052]
+	mov	w0, 50
+	bl	timer_delay_ns
+	ldr	x21, [sp, 32]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.28
+	.size	flash_read_otp_data, .-flash_read_otp_data
 	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
 	.align	2
 	.global	sandisk_prog_test_bad_block
@@ -2212,14 +2379,14 @@ sandisk_prog_test_bad_block:
 	and	x2, x0, 255
 	add	x29, sp, 0
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR34+29
+	adrp	x1, .LANCHOR30+29
 	str	x19, [sp, 16]
 	mov	x0, x2
-	ldrb	w1, [x1, #:lo12:.LANCHOR34+29]
+	ldrb	w1, [x1, #:lo12:.LANCHOR30+29]
 	add	x2, x2, 8
 	add	x2, x4, x2, lsl 8
-	cbz	w1, .L436
-.L446:
+	cbz	w1, .L464
+.L474:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x4, x4, x0
@@ -2243,22 +2410,22 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x4, 2048]
 	mov	w0, 5
 	ands	w19, w2, w0
-	beq	.L435
+	beq	.L463
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L435
-	adrp	x0, .LC39
+	tbz	x0, 12, .L463
+	adrp	x0, .LC40
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC39
+	add	x0, x0, :lo12:.LC40
 	bl	printf
-.L435:
+.L463:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L436:
+.L464:
 	mov	w1, 162
-	b	.L446
+	b	.L474
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
@@ -2288,48 +2455,48 @@ nandc_bch_sel:
 	cmp	w2, 9
 	adrp	x2, .LANCHOR13
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	bne	.L450
+	bne	.L478
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L457
+	beq	.L485
 	cmp	w0, 60
-	beq	.L458
+	beq	.L486
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L451:
+.L479:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L457:
+.L485:
 	mov	w1, 0
-	b	.L451
-.L458:
+	b	.L479
+.L486:
 	mov	w1, 3
-	b	.L451
-.L450:
+	b	.L479
+.L478:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L453
-.L456:
+	bne	.L481
+.L484:
 	and	w1, w1, -17
-.L454:
+.L482:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L453:
+.L481:
 	cmp	w0, 24
-	bne	.L455
+	bne	.L483
 	orr	w1, w1, 16
-	b	.L454
-.L455:
+	b	.L482
+.L483:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L454
-	b	.L456
+	bne	.L482
+	b	.L484
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2339,10 +2506,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L464
+	bne	.L492
 	ldr	w0, [x0, 296]
 	ret
-.L464:
+.L492:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2385,7 +2552,7 @@ nandc_xfer_start:
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L470
+	bne	.L498
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
@@ -2398,13 +2565,13 @@ nandc_xfer_start:
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L471
+	cbz	w0, .L499
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x0, #:lo12:.LANCHOR45]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L471:
+.L499:
 	add	x21, x4, :lo12:.LANCHOR46
 	add	x0, x2, 63
 	and	w20, w20, 63
@@ -2447,13 +2614,13 @@ nandc_xfer_start:
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L469:
+.L497:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L470:
+.L498:
 	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
@@ -2469,7 +2636,7 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L473
+	cbz	w23, .L501
 	adrp	x0, .LANCHOR43
 	ubfx	x1, x1, 1, 7
 	ldr	x8, [x4, #:lo12:.LANCHOR46]
@@ -2480,11 +2647,11 @@ nandc_xfer_start:
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L475:
+.L503:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L476
-.L477:
+	bne	.L504
+.L505:
 	add	x21, x4, :lo12:.LANCHOR46
 	ldr	x0, [x4, #:lo12:.LANCHOR46]
 	and	w20, w20, 63
@@ -2520,8 +2687,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L469
-.L476:
+	b	.L497
+.L504:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2529,11 +2696,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L475
-.L473:
+	b	.L503
+.L501:
 	ldr	x1, [x4, #:lo12:.LANCHOR46]
 	str	w0, [x1]
-	b	.L477
+	b	.L505
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2554,10 +2721,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L487
+	bne	.L515
 	str	w0, [x1, 520]
 	ret
-.L487:
+.L515:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2570,29 +2737,37 @@ zftl_flash_de_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L520
+	adrp	x0, .LANCHOR49
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	cbnz	w0, .L520
+	bl	zftl_flash_exit_slc_mode
+.L520:
 	adrp	x19, .LANCHOR20
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR20]
-	cbz	w0, .L492
+	cbz	w0, .L521
 	adrp	x0, .LANCHOR42
 	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	tbz	x0, 0, .L492
+	tbz	x0, 0, .L521
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L492:
+.L521:
 	adrp	x3, .LANCHOR45
 	ldrb	w0, [x3, #:lo12:.LANCHOR45]
-	cbz	w0, .L493
+	cbz	w0, .L522
 	mov	w0, 0
 	strb	wzr, [x3, #:lo12:.LANCHOR45]
 	bl	nandc_set_seed
 	mov	w0, 1
 	strb	w0, [x3, #:lo12:.LANCHOR45]
-.L493:
+.L522:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2624,10 +2799,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR49
-	add	x1, x0, :lo12:.LANCHOR49
+	adrp	x0, .LANCHOR50
+	add	x1, x0, :lo12:.LANCHOR50
 	mov	w2, 0
-.L507:
+.L539:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2637,14 +2812,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L507
-	add	x0, x0, :lo12:.LANCHOR49
+	bne	.L539
+	add	x0, x0, :lo12:.LANCHOR50
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR50
-	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	adrp	x0, .LANCHOR51
-	strb	w2, [x0, #:lo12:.LANCHOR51]
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR52
+	strb	w2, [x0, #:lo12:.LANCHOR52]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2662,49 +2837,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L515
+	bne	.L547
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L511
-	adrp	x1, .LANCHOR52
+	bne	.L543
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L511:
+.L543:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L509:
+.L541:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L515:
-	adrp	x0, .LANCHOR49
-	add	x2, x0, :lo12:.LANCHOR49
+.L547:
+	adrp	x0, .LANCHOR50
+	add	x2, x0, :lo12:.LANCHOR50
 	mov	x19, x0
-.L516:
+.L548:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L516
+	bne	.L548
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L513
-	adrp	x1, .LANCHOR52
+	bne	.L545
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L513:
-	add	x0, x19, :lo12:.LANCHOR49
+.L545:
+	add	x0, x19, :lo12:.LANCHOR50
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L509
+	b	.L541
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -2723,9 +2898,9 @@ queue_read_cmd:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	ldr	x19, [sp, 16]
-	add	x0, x0, :lo12:.LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR54
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
 	.size	queue_read_cmd, .-queue_read_cmd
@@ -2735,33 +2910,33 @@ queue_read_cmd:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR50
+	adrp	x2, .LANCHOR51
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L521
+	cbz	w1, .L553
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L521
+	beq	.L553
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR50
+	add	x0, x2, :lo12:.LANCHOR51
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR51]
+	ldrb	w0, [x1, #:lo12:.LANCHOR52]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR51]
+	strb	w0, [x1, #:lo12:.LANCHOR52]
 	ret
-.L521:
-	ldrb	w1, [x2, #:lo12:.LANCHOR50]
+.L553:
+	ldrb	w1, [x2, #:lo12:.LANCHOR51]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR50]
-	ldrb	w0, [x1, #:lo12:.LANCHOR51]
+	strb	w0, [x2, #:lo12:.LANCHOR51]
+	ldrb	w0, [x1, #:lo12:.LANCHOR52]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR51]
+	strb	w0, [x1, #:lo12:.LANCHOR52]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2772,29 +2947,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
+	adrp	x19, .LANCHOR52
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L534
-.L537:
-	adrp	x2, .LANCHOR50
-	adrp	x1, .LANCHOR49
-	add	x0, x1, :lo12:.LANCHOR49
-	ldrb	w3, [x2, #:lo12:.LANCHOR50]
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbz	w0, .L566
+.L569:
+	adrp	x2, .LANCHOR51
+	adrp	x1, .LANCHOR50
+	add	x0, x1, :lo12:.LANCHOR50
+	ldrb	w3, [x2, #:lo12:.LANCHOR51]
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L535
-.L536:
-	add	x1, x1, :lo12:.LANCHOR49
+	cbz	w20, .L567
+.L568:
+	add	x1, x1, :lo12:.LANCHOR50
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
 	ldrb	w5, [x1, x3]
-	strb	w5, [x4, #:lo12:.LANCHOR50]
-	ldrb	w4, [x19, #:lo12:.LANCHOR51]
+	strb	w5, [x4, #:lo12:.LANCHOR51]
+	ldrb	w4, [x19, #:lo12:.LANCHOR52]
 	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR51]
+	strb	w4, [x19, #:lo12:.LANCHOR52]
 	mov	w4, 1
 	strb	wzr, [x2, 56]
 	strb	w4, [x2, 2]
@@ -2804,27 +2979,27 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L533
-.L534:
+	b	.L565
+.L566:
 	mov	w2, 121
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR54
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L537
-.L539:
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbnz	w0, .L569
+.L571:
 	mov	x0, 0
-.L533:
+.L565:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L535:
-	ldrb	w2, [x19, #:lo12:.LANCHOR51]
+.L567:
+	ldrb	w2, [x19, #:lo12:.LANCHOR52]
 	cmp	w2, 1
-	bne	.L536
-	b	.L539
+	bne	.L568
+	b	.L571
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2834,30 +3009,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L547
+	bne	.L579
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L551:
+.L583:
 	mov	w0, 1
 	ret
-.L548:
+.L580:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L549
+	bne	.L581
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L551
-.L547:
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
-.L549:
+	b	.L583
+.L579:
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
+.L581:
 	cmp	w2, 255
-	bne	.L548
+	bne	.L580
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2869,32 +3044,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
+	adrp	x19, .LANCHOR52
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L553
-	adrp	x1, .LANCHOR55
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbnz	w0, .L585
+	adrp	x1, .LANCHOR56
 	adrp	x0, .LC0
 	mov	w2, 172
-	add	x1, x1, :lo12:.LANCHOR55
+	add	x1, x1, :lo12:.LANCHOR56
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L553:
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L552
+.L585:
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
+	cbz	w0, .L584
 	mov	x1, x20
-	adrp	x0, .LANCHOR50
-	add	x0, x0, :lo12:.LANCHOR50
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L552
-	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	bne	.L584
+	ldrb	w0, [x19, #:lo12:.LANCHOR52]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR51]
+	strb	w0, [x19, #:lo12:.LANCHOR52]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L552:
+.L584:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -2904,8 +3079,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR34
-	add	x3, x3, :lo12:.LANCHOR34
+	adrp	x3, .LANCHOR30
+	add	x3, x3, :lo12:.LANCHOR30
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -2936,14 +3111,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR34
-	add	x0, x0, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -2979,15 +3154,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR57
+	adrp	x1, .LANCHOR58
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR57]
+	ldrb	w0, [x1, #:lo12:.LANCHOR58]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR57]
+	strb	w0, [x1, #:lo12:.LANCHOR58]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -3002,11 +3177,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L565
-	adrp	x0, .LANCHOR58
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
+	cbnz	w0, .L597
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
-.L565:
+.L597:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3031,8 +3206,8 @@ vpn_check:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR59
-	ldrh	w0, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR60
+	ldrh	w0, [x0, #:lo12:.LANCHOR60]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -3070,14 +3245,14 @@ gc_add_sblk:
 	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L574
-	adrp	x1, .LANCHOR60
+	bhi	.L606
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 259
-	add	x1, x1, :lo12:.LANCHOR60
+	mov	w2, 339
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L574:
+.L606:
 	adrp	x22, .LANCHOR9
 	uxtw	x19, w20
 	lsl	x26, x19, 1
@@ -3086,127 +3261,127 @@ gc_add_sblk:
 	adrp	x27, .LANCHOR7
 	ldrh	w21, [x0, x26]
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L575
+	tbz	x0, 8, .L607
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	mov	w4, w21
 	mov	w2, w24
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR61
-	ldrh	w6, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR62+56
+	adrp	x0, .LANCHOR62
+	ldrh	w6, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR62+56]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L575:
+.L607:
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, lsl 2
 	ldrb	w2, [x19, 2]
 	tst	w2, 224
-	bne	.L576
-	cbz	w21, .L596
-	adrp	x1, .LANCHOR60
+	bne	.L608
+	cbz	w21, .L628
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 264
-	add	x1, x1, :lo12:.LANCHOR60
+	mov	w2, 344
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L596:
+.L628:
 	mov	w0, 0
-	b	.L573
-.L576:
-	adrp	x0, .LANCHOR62
-	add	x1, x0, :lo12:.LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	b	.L605
+.L608:
+	adrp	x0, .LANCHOR63
+	add	x1, x0, :lo12:.LANCHOR63
+	ldrh	w0, [x0, #:lo12:.LANCHOR63]
 	cmp	w0, w20
-	beq	.L596
+	beq	.L628
 	adrp	x21, .LANCHOR10
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w3, [x0, 48]
 	cmp	w3, w20
-	beq	.L596
+	beq	.L628
 	ldrh	w3, [x0, 16]
 	cmp	w3, w20
-	beq	.L596
+	beq	.L628
 	ldrh	w3, [x0, 80]
 	cmp	w3, w20
-	beq	.L596
+	beq	.L628
 	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
 	mov	w3, 0
-.L578:
+.L610:
 	cmp	w3, w4
-	bcc	.L579
-	cbnz	w24, .L583
-	adrp	x1, .LANCHOR63
-	ldrh	w5, [x1, #:lo12:.LANCHOR63]
+	bcc	.L611
+	cbnz	w24, .L615
+	adrp	x1, .LANCHOR64
+	ldrh	w5, [x1, #:lo12:.LANCHOR64]
 	cmp	w20, w5
-	beq	.L596
-	adrp	x3, .LANCHOR64
-	add	x3, x3, :lo12:.LANCHOR64
+	beq	.L628
+	adrp	x3, .LANCHOR65
+	add	x3, x3, :lo12:.LANCHOR65
 	mov	x1, 0
-.L582:
+.L614:
 	ldrh	w6, [x1, x3]
 	cmp	w20, w6
-	bne	.L581
+	bne	.L613
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L596
+	tbz	x0, 8, .L628
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w4, w20
 	ubfx	x2, x2, 5, 3
 	mov	w1, w20
 	ldrh	w3, [x0, x26]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	b	.L596
-.L579:
+	b	.L628
+.L611:
 	ldrh	w5, [x1], 2
 	cmp	w5, w20
-	beq	.L596
+	beq	.L628
 	add	w3, w3, 1
-	b	.L578
-.L581:
+	b	.L610
+.L613:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L582
+	bne	.L614
 	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L584:
+.L616:
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L585
+	tbz	x0, 8, .L617
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR62
 	mov	w5, w4
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR61]
+	ldrh	w6, [x1, #:lo12:.LANCHOR62]
 	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
-.L585:
+.L617:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L588:
+.L620:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L586
+	bne	.L618
 	strh	w20, [x0]
-	cbz	w24, .L587
+	cbz	w24, .L619
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L606:
+.L638:
 	mov	w0, 1
-.L573:
+.L605:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3214,30 +3389,30 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L583:
+.L615:
 	add	x19, x0, 392
-	b	.L584
-.L587:
+	b	.L616
+.L619:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x25, x0, x25, uxth 1
 	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
 	strh	w0, [x25, 120]
-	b	.L606
-.L586:
+	b	.L638
+.L618:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L588
-	b	.L606
+	bne	.L620
+	b	.L638
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR66
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR65]
+	ldr	x1, [x1, #:lo12:.LANCHOR66]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3248,19 +3423,19 @@ gc_get_src_ppa_from_index:
 gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR66
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR49
-	add	x23, x23, :lo12:.LANCHOR66
-	add	x22, x24, :lo12:.LANCHOR49
+	adrp	x22, .LANCHOR67
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR67
+	adrp	x23, .LANCHOR50
+	add	x21, x23, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L609:
-	ldrb	w19, [x23]
-	cmp	w19, 255
-	bne	.L620
+.L641:
+	ldrb	w0, [x22]
+	cmp	w0, 255
+	bne	.L654
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3268,117 +3443,138 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L620:
-	lsl	x1, x19, 6
-	add	x0, x24, :lo12:.LANCHOR49
-	add	x2, x0, x1
-	ldrb	w0, [x0, x1]
+.L654:
+	sxtw	x26, w0
+	add	x1, x23, :lo12:.LANCHOR50
+	lsl	x3, x26, 6
+	add	x2, x1, x3
+	ldrb	w0, [x1, x3]
 	ldr	w1, [x2, 52]
-	strb	w0, [x23]
-	ldrh	w25, [x2, 48]
-	cbz	w1, .L610
+	strb	w0, [x22]
+	ldrh	w24, [x2, 48]
+	cbz	w1, .L642
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR62
-	add	x0, x0, :lo12:.LANCHOR62
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 324]
 	strh	w3, [x0, 320]
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
-	adrp	x1, .LANCHOR67
+	adrp	x1, .LANCHOR68
 	adrp	x0, .LC0
-	mov	w2, 545
-	add	x1, x1, :lo12:.LANCHOR67
+	mov	w2, 625
+	add	x1, x1, :lo12:.LANCHOR68
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L610:
-	adrp	x26, .LANCHOR68
-	ldrb	w0, [x26, #:lo12:.LANCHOR68]
+.L642:
+	adrp	x25, .LANCHOR69
+	ldrb	w0, [x25, #:lo12:.LANCHOR69]
 	cmp	w0, 3
-	bne	.L621
+	bne	.L643
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldrb	w20, [x0, 89]
-	add	w20, w20, w20, lsl 1
-	and	w20, w20, 1023
-.L611:
+	ldrb	w19, [x0, 89]
+	add	w19, w19, w19, lsl 1
+	and	w19, w19, 1023
+.L644:
 	adrp	x0, .LANCHOR14
-	adrp	x28, .LANCHOR69
-	and	x21, x25, 65535
+	adrp	x28, .LANCHOR72
+	and	x20, x24, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L612
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
-	add	x0, x22, x19, lsl 6
-	mov	w3, w25
+	tbz	x0, 8, .L645
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	add	x0, x21, x26, lsl 6
+	mov	w3, w24
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC44
-	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC44
-	mov	w1, w25
+	adrp	x0, .LC45
+	ldrb	w4, [x1, x20]
+	add	x0, x0, :lo12:.LC45
+	mov	w1, w24
 	bl	printf
-.L612:
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
-	add	x0, x22, x19, lsl 6
-	mov	x27, x21
+.L645:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	add	x0, x21, x26, lsl 6
+	mov	x27, x20
 	ldrb	w0, [x0, 1]
-	ldrb	w1, [x1, x21]
+	ldrb	w1, [x1, x20]
 	cmp	w1, w0
-	beq	.L613
-	adrp	x1, .LANCHOR67
+	beq	.L646
+	adrp	x1, .LANCHOR68
 	adrp	x0, .LC0
-	mov	w2, 552
-	add	x1, x1, :lo12:.LANCHOR67
+	mov	w2, 634
+	add	x1, x1, :lo12:.LANCHOR68
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L613:
-	add	x19, x22, x19, lsl 6
-	ldrb	w0, [x19, 61]
+.L646:
+	add	x0, x21, x26, lsl 6
+	ldrb	w0, [x0, 61]
 	cmp	w0, 3
-	beq	.L614
-	ldrb	w0, [x26, #:lo12:.LANCHOR68]
+	beq	.L647
+	ldrb	w0, [x25, #:lo12:.LANCHOR69]
 	cmp	w0, 3
-	bne	.L614
+	bne	.L647
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L647
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L614
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
+	cbz	w0, .L648
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L647
+.L648:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	mov	x0, 0
-	add	x21, x1, x21
-.L615:
-	cmp	w20, w0, uxth
-	bls	.L609
-	ldrb	w1, [x21, x0]
+	add	x20, x1, x20
+.L649:
+	cmp	w19, w0, uxth
+	bls	.L641
+	ldrb	w1, [x20, x0]
 	add	x0, x0, 1
-	add	x1, x22, x1, lsl 6
+	add	x1, x21, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L615
-.L621:
-	mov	w20, 1
-	b	.L611
-.L614:
-	adrp	x19, .LANCHOR62
-	add	x19, x19, :lo12:.LANCHOR62
-	add	x20, x21, x20, uxth
-	mov	w21, -1
-	strh	w25, [x19, 316]
-.L616:
-	cmp	x20, x27
-	beq	.L609
-	ldr	x1, [x28, #:lo12:.LANCHOR69]
+	b	.L649
+.L643:
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L656
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbz	w0, .L656
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w19, [x0, 89]
+	ubfiz	w19, w19, 1, 8
+	b	.L644
+.L656:
+	mov	w19, 1
+	b	.L644
+.L647:
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
+	add	x19, x20, x19, uxth
+	mov	x20, x0
+	strh	w24, [x0, 316]
+	mov	w24, -1
+.L650:
+	cmp	x19, x27
+	beq	.L641
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrb	w0, [x1, x27]
-	strb	w21, [x1, x27]
+	strb	w24, [x1, x27]
 	add	x27, x27, 1
 	sbfiz	x1, x0, 6, 32
 	ubfiz	x0, x0, 6, 8
-	add	x1, x22, x1
-	add	x0, x22, x0
+	add	x1, x21, x1
+	add	x0, x21, x0
 	strb	wzr, [x1, 61]
 	bl	buf_free
-	ldrb	w0, [x19, 7]
+	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
-	strb	w0, [x19, 7]
-	b	.L616
+	strb	w0, [x20, 7]
+	b	.L650
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3387,47 +3583,47 @@ gc_write_completed:
 gc_get_src_blk:
 	adrp	x0, .LANCHOR10
 	ldr	x2, [x0, #:lo12:.LANCHOR10]
-	adrp	x0, .LANCHOR71
-	ldrb	w3, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR74
+	ldrb	w3, [x0, #:lo12:.LANCHOR74]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L633
+	cbz	w0, .L671
 	add	x1, x2, 392
 	mov	w4, 1
-.L634:
+.L672:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L638:
+.L676:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L636
+	beq	.L674
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L637
+	cbz	w4, .L675
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L633:
+.L671:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L639
+	cbz	w0, .L677
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L634
-.L637:
+	b	.L672
+.L675:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L636:
+.L674:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L638
+	bne	.L676
 	ret
-.L639:
+.L677:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3439,90 +3635,90 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR62
-	add	x0, x20, :lo12:.LANCHOR62
+	adrp	x20, .LANCHOR63
+	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L648
-	adrp	x1, .LANCHOR51
-	ldrb	w1, [x1, #:lo12:.LANCHOR51]
+	cbz	w1, .L686
+	adrp	x1, .LANCHOR52
+	ldrb	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, 1
-	bhi	.L648
+	bhi	.L686
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR73
-	adrp	x0, .LANCHOR72
-	adrp	x21, .LANCHOR69
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	adrp	x21, .LANCHOR72
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR72]
-	ldr	x4, [x21, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldr	x4, [x21, #:lo12:.LANCHOR72]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
-.L643:
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
+.L681:
 	cmp	w19, w1
-	bcc	.L646
-.L648:
+	bcc	.L684
+.L686:
 	mov	w0, 0
-	b	.L641
-.L646:
+	b	.L679
+.L684:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L644
+	beq	.L682
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L644
+	cbnz	w3, .L682
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L645
-	ldr	x0, [x21, #:lo12:.LANCHOR69]
+	tbz	x0, 8, .L683
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	bl	printf
-.L645:
-	ldr	x0, [x21, #:lo12:.LANCHOR69]
-	add	x20, x20, :lo12:.LANCHOR62
+.L683:
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L641:
+.L679:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L644:
+.L682:
 	add	w19, w19, 1
-	b	.L643
+	b	.L681
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR74
-	adrp	x1, .LANCHOR62
-	add	x0, x1, :lo12:.LANCHOR62
-	ldrh	w6, [x2, #:lo12:.LANCHOR74]
-	adrp	x2, .LANCHOR51
-	ldrh	w1, [x1, #:lo12:.LANCHOR62]
+	adrp	x2, .LANCHOR77
+	adrp	x1, .LANCHOR63
+	add	x0, x1, :lo12:.LANCHOR63
+	ldrh	w6, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR51]
+	ldrb	w4, [x2, #:lo12:.LANCHOR52]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3533,21 +3729,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L658
+	bne	.L696
 	mov	w1, w0
-	adrp	x0, .LANCHOR75
-	ldr	x0, [x0, #:lo12:.LANCHOR75]
-.L660:
+	adrp	x0, .LANCHOR78
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
+.L698:
 	b	_list_get_gc_head_node.isra.2
-.L658:
+.L696:
 	cmp	w1, 2
-	bne	.L659
+	bne	.L697
 	b	zftl_get_gc_node.part.9
-.L659:
+.L697:
 	mov	w1, w0
-	adrp	x0, .LANCHOR76
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L660
+	adrp	x0, .LANCHOR79
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	b	.L698
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3568,9 +3764,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L662
+	cbz	w19, .L700
 	mov	w0, w19
-.L661:
+.L699:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3578,72 +3774,72 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L662:
+.L700:
 	and	w20, w2, 255
-	cbnz	w21, .L664
-	adrp	x24, .LANCHOR77
+	cbnz	w21, .L702
+	adrp	x24, .LANCHOR80
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC47
+	adrp	x27, .LC48
 	and	w22, w20, 65535
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC47
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	add	x27, x27, :lo12:.LC48
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
 	mov	w23, 0
 	mov	w25, 0
-.L665:
+.L703:
 	cmp	w25, w22
-	bcs	.L670
-	ldrh	w6, [x24, #:lo12:.LANCHOR77]
-	add	x7, x24, :lo12:.LANCHOR77
+	bcs	.L708
+	ldrh	w6, [x24, #:lo12:.LANCHOR80]
+	add	x7, x24, :lo12:.LANCHOR80
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR77]
+	strh	w2, [x24, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L666
+	beq	.L704
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L667
+	tbz	x0, 8, .L705
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L667:
+.L705:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR61
-	ldrh	w0, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bcs	.L668
+	bcs	.L706
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L669
+	cbz	w0, .L707
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L669
-.L670:
+	bcs	.L707
+.L708:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L672
-	adrp	x25, .LANCHOR79
-	adrp	x24, .LANCHOR78
-	add	x27, x25, :lo12:.LANCHOR79
-	add	x24, x24, :lo12:.LANCHOR78
+	tbz	x0, 1, .L710
+	adrp	x25, .LANCHOR82
+	adrp	x24, .LANCHOR81
+	add	x27, x25, :lo12:.LANCHOR82
+	add	x24, x24, :lo12:.LANCHOR81
 	mov	w28, 0
 	mov	w26, 65535
-.L673:
+.L711:
 	cmp	w28, w22
-	beq	.L677
+	beq	.L715
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3652,219 +3848,219 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L674
+	beq	.L712
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L674
+	bcs	.L712
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L676
+	cbz	w0, .L714
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L676
-.L677:
+	bcs	.L714
+.L715:
 	cmp	w23, w22
-	adrp	x0, .LANCHOR80
-	bcs	.L679
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x3, .LANCHOR73
-	adrp	x0, .LANCHOR72
-	ldrh	w2, [x25, #:lo12:.LANCHOR79]
-	ldrb	w3, [x3, #:lo12:.LANCHOR73]
-	ldrh	w0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR83
+	bcs	.L717
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x3, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L672
+	bge	.L710
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L672:
+	strh	w1, [x25, #:lo12:.LANCHOR82]
+.L710:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L680
+	tbz	x0, 0, .L718
 	cmp	w23, w22
-	bcs	.L680
-	adrp	x24, .LANCHOR81
-	add	x24, x24, :lo12:.LANCHOR81
+	bcs	.L718
+	adrp	x24, .LANCHOR84
+	add	x24, x24, :lo12:.LANCHOR84
 	mov	w25, 65535
-.L685:
+.L723:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L681
+	beq	.L719
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L682
+	cbz	w0, .L720
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L682
-.L683:
-	adrp	x0, .LANCHOR80
-	adrp	x1, .LANCHOR61
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	bhi	.L720
+.L721:
+	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w2, [x1, #:lo12:.LANCHOR62]
 	cmp	w2, w0, lsr 1
-	bls	.L680
+	bls	.L718
 	sub	w0, w2, w0, lsr 3
-	b	.L760
-.L668:
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L670
-.L666:
+	b	.L798
+.L706:
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	b	.L708
+.L704:
 	strh	wzr, [x7]
-	b	.L670
-.L669:
+	b	.L708
+.L707:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L665
-.L674:
+	b	.L703
+.L712:
 	strh	wzr, [x24]
-	b	.L677
-.L676:
+	b	.L715
+.L714:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L673
-.L679:
-	ldrh	w1, [x25, #:lo12:.LANCHOR79]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	b	.L711
+.L717:
+	ldrh	w1, [x25, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bls	.L672
+	bls	.L710
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L672
-.L681:
+	strh	w0, [x25, #:lo12:.LANCHOR82]
+	b	.L710
+.L719:
 	strh	wzr, [x24]
-.L684:
+.L722:
 	cmp	w23, w22
-	bcs	.L683
-	adrp	x1, .LANCHOR61
-	adrp	x0, .LANCHOR80
-	ldrh	w2, [x1, #:lo12:.LANCHOR61]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bcs	.L721
+	adrp	x1, .LANCHOR62
+	adrp	x0, .LANCHOR83
+	ldrh	w2, [x1, #:lo12:.LANCHOR62]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w2, w0
-	bcs	.L680
+	bcs	.L718
 	add	w0, w2, w0, lsr 3
-.L760:
-	strh	w0, [x1, #:lo12:.LANCHOR61]
-.L680:
+.L798:
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+.L718:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L707
+	tbz	x0, 8, .L745
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC48
+	adrp	x0, .LC49
 	mov	w4, w20
 	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC48
+	add	x0, x0, :lo12:.LC49
 	bl	printf
-.L707:
+.L745:
 	mov	w0, w23
-	b	.L661
-.L682:
+	b	.L699
+.L720:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L685
-	b	.L684
-.L664:
-	adrp	x0, .LANCHOR62+318
-	strh	wzr, [x0, #:lo12:.LANCHOR62+318]
-	adrp	x0, .LANCHOR82
-	strh	wzr, [x0, #:lo12:.LANCHOR82]
+	bne	.L723
+	b	.L722
+.L702:
+	adrp	x0, .LANCHOR63+318
+	strh	wzr, [x0, #:lo12:.LANCHOR63+318]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	ldr	w0, [x29, 112]
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L710
-	adrp	x1, .LANCHOR84
-	adrp	x25, .LANCHOR83
+	tbz	x0, 0, .L748
+	adrp	x1, .LANCHOR87
+	adrp	x25, .LANCHOR86
 	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR85
-	ldrh	w0, [x25, #:lo12:.LANCHOR83]
-	ldrh	w2, [x1, #:lo12:.LANCHOR84]
+	adrp	x26, .LANCHOR88
+	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w2, lsr 2
-	bcc	.L687
-	ldrh	w1, [x26, #:lo12:.LANCHOR85]
+	bcc	.L725
+	ldrh	w1, [x26, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bls	.L711
-.L687:
-	ldrh	w0, [x26, #:lo12:.LANCHOR85]
-	adrp	x22, .LANCHOR81
+	bls	.L749
+.L725:
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	adrp	x22, .LANCHOR84
 	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR81]
+	strh	w0, [x22, #:lo12:.LANCHOR84]
 	mov	w0, 0
 	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L713
+	beq	.L751
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
-	adrp	x2, .LANCHOR80
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L713
-	strh	wzr, [x22, #:lo12:.LANCHOR81]
+	bcs	.L751
+	strh	wzr, [x22, #:lo12:.LANCHOR84]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L689:
-	add	x22, x22, :lo12:.LANCHOR81
+.L727:
+	add	x22, x22, :lo12:.LANCHOR84
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L691:
+.L729:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L688
+	beq	.L726
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L690
+	cbz	w0, .L728
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L688
-.L690:
+	bcs	.L726
+.L728:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L691
-.L688:
+	bne	.L729
+.L726:
 	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR83]
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	ldrh	w1, [x25, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0, lsr 3
-	bhi	.L708
-	ldrh	w0, [x26, #:lo12:.LANCHOR85]
+	bhi	.L746
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L686
-.L708:
-	adrp	x24, .LANCHOR77
+	ble	.L724
+.L746:
+	adrp	x24, .LANCHOR80
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	add	x24, x24, :lo12:.LANCHOR77
-.L693:
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	add	x24, x24, :lo12:.LANCHOR80
+.L731:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3872,31 +4068,31 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L686
+	beq	.L724
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L692
+	cbz	w0, .L730
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L686
-.L692:
+	bcs	.L724
+.L730:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L693
-.L686:
+	bne	.L731
+.L724:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L694
-	adrp	x24, .LANCHOR78
-	adrp	x28, .LANCHOR86
-	adrp	x25, .LANCHOR73
-	add	x26, x24, :lo12:.LANCHOR78
-	add	x27, x28, :lo12:.LANCHOR86
-	add	x25, x25, :lo12:.LANCHOR73
-	strh	wzr, [x24, #:lo12:.LANCHOR78]
+	tbz	x0, 1, .L732
+	adrp	x24, .LANCHOR81
+	adrp	x28, .LANCHOR89
+	adrp	x25, .LANCHOR76
+	add	x26, x24, :lo12:.LANCHOR81
+	add	x27, x28, :lo12:.LANCHOR89
+	add	x25, x25, :lo12:.LANCHOR76
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
 	mov	w22, 64
-.L699:
+.L737:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -3906,159 +4102,159 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L695
+	beq	.L733
 	cmp	w20, 1
-	bne	.L696
-	adrp	x3, .LANCHOR72
+	bne	.L734
+	adrp	x3, .LANCHOR75
 	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR72]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
 	mul	w3, w2, w3
-	adrp	x2, .LANCHOR80
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L696:
+.L734:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L697
+	bcs	.L735
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L698
+	cbz	w0, .L736
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L698
-.L695:
+	bcc	.L736
+.L733:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR80
-	adrp	x3, .LANCHOR73
-	bcc	.L700
-	cbnz	w19, .L701
-	adrp	x1, .LANCHOR87
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR88
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR83
+	adrp	x3, .LANCHOR76
+	bcc	.L738
+	cbnz	w19, .L739
+	adrp	x1, .LANCHOR90
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	bls	.L701
-.L700:
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w3, [x3, #:lo12:.LANCHOR73]
-	ldrh	w0, [x0, #:lo12:.LANCHOR72]
-	ldrh	w1, [x28, #:lo12:.LANCHOR86]
+	bls	.L739
+.L738:
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR75
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrh	w1, [x28, #:lo12:.LANCHOR89]
 	lsr	w2, w2, 3
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L694
+	bge	.L732
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR86]
-.L694:
+	strh	w1, [x28, #:lo12:.LANCHOR89]
+.L732:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L680
-	adrp	x25, .LANCHOR77
-	adrp	x22, .LANCHOR89
-	adrp	x26, .LANCHOR84
-	adrp	x27, .LANCHOR83
-	add	x28, x22, :lo12:.LANCHOR89
-	add	x26, x26, :lo12:.LANCHOR84
-	add	x27, x27, :lo12:.LANCHOR83
-	strh	wzr, [x25, #:lo12:.LANCHOR77]
+	cbz	w0, .L718
+	adrp	x25, .LANCHOR80
+	adrp	x22, .LANCHOR92
+	adrp	x26, .LANCHOR87
+	adrp	x27, .LANCHOR86
+	add	x28, x22, :lo12:.LANCHOR92
+	add	x26, x26, :lo12:.LANCHOR87
+	add	x27, x27, :lo12:.LANCHOR86
+	strh	wzr, [x25, #:lo12:.LANCHOR80]
 	mov	w24, 64
-.L705:
-	ldrh	w6, [x25, #:lo12:.LANCHOR77]
+.L743:
+	ldrh	w6, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR77]
+	strh	w6, [x25, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L702
+	beq	.L740
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L703
+	bls	.L741
 	cmp	w1, 2
-	bls	.L703
+	bls	.L741
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L702
-.L703:
+	bls	.L740
+.L741:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L704
+	cbz	w0, .L742
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L702
-.L704:
+	bcs	.L740
+.L742:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L705
-.L702:
+	bne	.L743
+.L740:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR80
-	bcs	.L706
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	ldrh	w1, [x22, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR83
+	bcs	.L744
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w1, [x22, #:lo12:.LANCHOR92]
 	cmp	w1, w0, lsr 1
-	bls	.L680
+	bls	.L718
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR89]
-	b	.L680
-.L713:
+	strh	w0, [x22, #:lo12:.LANCHOR92]
+	b	.L718
+.L751:
 	mov	w23, 0
-	b	.L689
-.L710:
+	b	.L727
+.L748:
 	mov	w23, 0
-	b	.L686
-.L697:
-	strh	wzr, [x24, #:lo12:.LANCHOR78]
-	b	.L695
-.L698:
+	b	.L724
+.L735:
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	b	.L733
+.L736:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L699
-	b	.L695
-.L701:
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	ldrb	w1, [x3, #:lo12:.LANCHOR73]
-	ldrh	w2, [x28, #:lo12:.LANCHOR86]
+	bne	.L737
+	b	.L733
+.L739:
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrb	w1, [x3, #:lo12:.LANCHOR76]
+	ldrh	w2, [x28, #:lo12:.LANCHOR89]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L694
+	ble	.L732
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR86]
-	b	.L694
-.L706:
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR73
-	ldrh	w2, [x22, #:lo12:.LANCHOR89]
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	strh	w0, [x28, #:lo12:.LANCHOR89]
+	b	.L732
+.L744:
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrh	w2, [x22, #:lo12:.LANCHOR92]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L680
+	bge	.L718
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR89]
-	b	.L680
-.L711:
+	strh	w1, [x22, #:lo12:.LANCHOR92]
+	b	.L718
+.L749:
 	mov	w23, 0
-	b	.L688
+	b	.L726
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4071,27 +4267,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L762
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR91
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR91
-.L764:
+	bne	.L800
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+.L802:
 	b	_insert_free_list
-.L762:
+.L800:
 	cmp	w0, 16
-	bne	.L763
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
-	b	.L764
-.L763:
-	adrp	x2, .LANCHOR94
-	adrp	x0, .LANCHOR95
-	add	x2, x2, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L764
+	bne	.L801
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L802
+.L801:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L802
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4105,30 +4301,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L766
-	adrp	x2, .LANCHOR85
+	bne	.L804
+	adrp	x2, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR85
+	add	x2, x2, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
-.L769:
+.L807:
 	b	_insert_data_list
-.L766:
+.L804:
 	cmp	w2, 96
-	bne	.L767
-	adrp	x2, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L769
-.L767:
+	bne	.L805
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L807
+.L805:
 	cmp	w2, 160
-	bne	.L765
-	adrp	x2, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L769
-.L765:
+	bne	.L803
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L807
+.L803:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4147,55 +4343,55 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L771
-	cbnz	w21, .L771
+	beq	.L809
+	cbnz	w21, .L809
 	mov	w1, w19
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L772:
+.L810:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L771:
-	adrp	x2, .LANCHOR92
-	adrp	x20, .LANCHOR94
-	ldrh	w0, [x2, #:lo12:.LANCHOR92]
-	ldrh	w1, [x20, #:lo12:.LANCHOR94]
+.L809:
+	adrp	x2, .LANCHOR95
+	adrp	x20, .LANCHOR97
+	ldrh	w0, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w1
-	bls	.L773
+	bls	.L811
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR93
+	adrp	x0, .LANCHOR96
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
-.L787:
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+.L825:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L778
-	adrp	x0, .LANCHOR90
-	ldrh	w5, [x20, #:lo12:.LANCHOR94]
+	bne	.L816
+	adrp	x0, .LANCHOR93
+	ldrh	w5, [x20, #:lo12:.LANCHOR97]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldr	x3, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-.L778:
-	cbz	w21, .L772
+.L816:
+	cbz	w21, .L810
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L772
+	tbz	x0, 8, .L810
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4209,26 +4405,26 @@ zftl_gc_get_free_sblk:
 	ldrh	w5, [x1, x0]
 	ubfx	x4, x4, 11, 8
 	mov	w1, w19
-	adrp	x0, .LC51
+	adrp	x0, .LC52
 	ubfx	x3, x2, 3, 2
 	and	w5, w5, 2047
 	ubfx	x2, x2, 5, 3
-	add	x0, x0, :lo12:.LC51
+	add	x0, x0, :lo12:.LC52
 	bl	printf
-	b	.L772
-.L773:
-	cbnz	w21, .L776
+	b	.L810
+.L811:
+	cbnz	w21, .L814
 	lsr	w1, w1, 2
-.L777:
-	adrp	x0, .LANCHOR95
-	add	x2, x20, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L787
-.L776:
+.L815:
+	adrp	x0, .LANCHOR98
+	add	x2, x20, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L825
+.L814:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L777
+	b	.L815
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4241,99 +4437,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L789
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR94
-	ldrh	w3, [x2, #:lo12:.LANCHOR92]
-	ldrh	w1, [x0, #:lo12:.LANCHOR94]
+	bne	.L827
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR97
+	ldrh	w3, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
 	cmp	w3, w1
-	bcc	.L790
-	adrp	x4, .LANCHOR90
-	ldrh	w4, [x4, #:lo12:.LANCHOR90]
+	bcc	.L828
+	adrp	x4, .LANCHOR93
+	ldrh	w4, [x4, #:lo12:.LANCHOR93]
 	cmp	w4, w3
-	bls	.L791
-	cbz	w1, .L791
-.L790:
-	add	x2, x0, :lo12:.LANCHOR94
+	bls	.L829
+	cbz	w1, .L829
+.L828:
+	add	x2, x0, :lo12:.LANCHOR97
 	lsr	w1, w1, 1
-.L810:
-	adrp	x0, .LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L809
-.L791:
-	adrp	x0, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
+.L848:
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L847
+.L829:
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
 	mov	w1, 0
-.L809:
+.L847:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L794
-	adrp	x0, .LANCHOR94
+	bne	.L832
+	adrp	x0, .LANCHOR97
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR94]
-	adrp	x0, .LANCHOR90
-	ldrh	w4, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldr	x3, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	ldrh	w5, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR93
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L794
-.L789:
+	b	.L832
+.L827:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L793
+	beq	.L831
 	cmp	w20, 1
-	beq	.L793
+	beq	.L831
 	mov	w1, w19
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L794:
+.L832:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L793:
-	adrp	x2, .LANCHOR90
-	adrp	x4, .LANCHOR94
-	ldrh	w1, [x2, #:lo12:.LANCHOR90]
-	ldrh	w3, [x4, #:lo12:.LANCHOR94]
+.L831:
+	adrp	x2, .LANCHOR93
+	adrp	x4, .LANCHOR97
+	ldrh	w1, [x2, #:lo12:.LANCHOR93]
+	ldrh	w3, [x4, #:lo12:.LANCHOR97]
 	cmp	w1, w3
-	bcc	.L795
-	adrp	x5, .LANCHOR92
-	ldrh	w5, [x5, #:lo12:.LANCHOR92]
+	bcc	.L833
+	adrp	x5, .LANCHOR95
+	ldrh	w5, [x5, #:lo12:.LANCHOR95]
 	cmp	w5, w1
-	bls	.L796
-	cbz	w3, .L796
-.L795:
+	bls	.L834
+	cbz	w3, .L834
+.L833:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR94
+	add	x2, x4, :lo12:.LANCHOR97
 	mov	w1, w0
-	b	.L810
-.L796:
+	b	.L848
+.L834:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR93
 	mov	w1, w0
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
-	b	.L809
+	adrp	x0, .LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L847
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4347,30 +4543,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L812
-	adrp	x2, .LANCHOR85
+	bne	.L850
+	adrp	x2, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR85
+	add	x2, x2, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
-.L815:
+.L853:
 	b	_list_remove_node
-.L812:
+.L850:
 	cmp	w2, 96
-	bne	.L813
-	adrp	x2, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L815
-.L813:
+	bne	.L851
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L853
+.L851:
 	cmp	w2, 160
-	bne	.L811
-	adrp	x2, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L815
-.L811:
+	bne	.L849
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L853
+.L849:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4384,27 +4580,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L817
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR91
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR91
-.L819:
+	bne	.L855
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+.L857:
 	b	_list_remove_node
-.L817:
+.L855:
 	cmp	w0, 16
-	bne	.L818
-	adrp	x2, .LANCHOR92
-	adrp	x0, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
-	b	.L819
-.L818:
-	adrp	x2, .LANCHOR94
-	adrp	x0, .LANCHOR95
-	add	x2, x2, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L819
+	bne	.L856
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L857
+.L856:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L857
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4418,30 +4614,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L821
-	adrp	x2, .LANCHOR85
+	bne	.L859
+	adrp	x2, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x2, x2, :lo12:.LANCHOR85
+	add	x2, x2, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
-.L824:
+.L862:
 	b	_list_update_data_list
-.L821:
+.L859:
 	cmp	w2, 96
-	bne	.L822
-	adrp	x2, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L824
-.L822:
+	bne	.L860
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L862
+.L860:
 	cmp	w2, 160
-	bne	.L820
-	adrp	x2, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L824
-.L820:
+	bne	.L858
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L862
+.L858:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4457,21 +4653,21 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC53
+	adrp	x0, .LC54
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC53
+	add	x0, x0, :lo12:.LC54
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L825
+	cbz	x19, .L863
 	mov	x24, -6148914691236517206
-	adrp	x22, .LC54
-	adrp	x21, .LANCHOR96
-	add	x22, x22, :lo12:.LC54
-	add	x21, x21, :lo12:.LANCHOR96
+	adrp	x22, .LC55
+	adrp	x21, .LANCHOR99
+	add	x22, x22, :lo12:.LC55
+	add	x21, x21, :lo12:.LANCHOR99
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L829:
+.L867:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -4504,7 +4700,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L825
+	beq	.L863
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -4512,8 +4708,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L829
-.L825:
+	bcs	.L867
+.L863:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4527,37 +4723,37 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR91
-	add	x1, x1, :lo12:.LANCHOR90
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x1, x1, :lo12:.LANCHOR93
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR94
 	bl	print_list_info
-	adrp	x1, .LANCHOR92
-	adrp	x0, .LANCHOR93
-	add	x1, x1, :lo12:.LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR93
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
 	bl	print_list_info
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LANCHOR95
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR95
+	adrp	x1, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x1, x1, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
 	bl	print_list_info
-	adrp	x1, .LANCHOR85
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LANCHOR12
-	add	x1, x1, :lo12:.LANCHOR85
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR83
-	adrp	x0, .LANCHOR76
-	add	x1, x1, :lo12:.LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR76
+	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR79
+	add	x1, x1, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR79
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR87
-	adrp	x0, .LANCHOR75
-	add	x1, x1, :lo12:.LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -4565,40 +4761,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L834
+	bls	.L872
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L834:
+.L872:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L835
+	bls	.L873
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L835:
+.L873:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L836
+	bls	.L874
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L836:
+.L874:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L833
+	bls	.L871
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L833:
+.L871:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4608,35 +4804,35 @@ ftl_tmp_into_update:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR99
-	add	x7, x7, :lo12:.LANCHOR99
+	adrp	x7, .LANCHOR102
+	add	x7, x7, :lo12:.LANCHOR102
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR73
-	ldrb	w10, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR98
-	ldrb	w6, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR76
+	ldrb	w10, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR101
+	ldrb	w6, [x2, #:lo12:.LANCHOR101]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L839:
+.L877:
 	cmp	w3, w10
-	blt	.L843
+	blt	.L881
 	sxtw	x2, w0
 	mov	w3, -1
-.L844:
+.L882:
 	cmp	w10, w2
-	bgt	.L845
+	bgt	.L883
 	ret
-.L843:
+.L881:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L840
+	tbnz	x2, 0, .L878
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4645,21 +4841,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L841
-.L846:
+	bhi	.L879
+.L884:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L840:
+.L878:
 	add	w3, w3, 1
-	b	.L839
-.L841:
+	b	.L877
+.L879:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L846
-.L845:
+	b	.L884
+.L883:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L844
+	b	.L882
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4678,14 +4874,14 @@ ftl_free_sblk:
 	mov	x19, x23
 	add	x20, x4, x21
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L849
-	adrp	x1, .LANCHOR97
+	tbz	x0, 3, .L887
+	adrp	x1, .LANCHOR100
 	ldrh	w2, [x4, x21]
-	adrp	x8, .LANCHOR100
-	ldr	x7, [x1, #:lo12:.LANCHOR97]
+	adrp	x8, .LANCHOR103
+	ldr	x7, [x1, #:lo12:.LANCHOR100]
 	and	w3, w2, 2047
 	ldr	w2, [x4, x21]
-	ldrh	w8, [x8, #:lo12:.LANCHOR100]
+	ldrh	w8, [x8, #:lo12:.LANCHOR103]
 	ldrh	w1, [x7, 74]
 	ubfx	x6, x2, 11, 8
 	adrp	x2, .LANCHOR8
@@ -4698,26 +4894,26 @@ ftl_free_sblk:
 	and	w1, w1, 65535
 	add	w7, w7, w1
 	cmp	w7, w8
-	ble	.L850
-	adrp	x1, .LANCHOR88
-	adrp	x7, .LANCHOR92
-	ldrh	w5, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR87
-	ldrh	w7, [x7, #:lo12:.LANCHOR92]
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	ble	.L888
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L851
-.L866:
+	blt	.L889
+.L904:
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
-.L864:
+.L902:
 	strb	w0, [x20, 2]
-.L852:
+.L890:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L856
+	bne	.L894
 	mul	w2, w6, w2
 	ldrh	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4725,7 +4921,7 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 9
 	bfi	w0, w2, 0, 11
 	strh	w0, [x4, x21]
-.L849:
+.L887:
 	mov	w0, w19
 	bl	zftl_remove_data_node
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
@@ -4737,78 +4933,78 @@ ftl_free_sblk:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x23, lsl 1]
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L858
+	tbz	x0, 3, .L896
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	cmp	w1, w19
-	bne	.L859
+	bne	.L897
 	mov	w1, -1
 	ldrh	w2, [x0, 588]
 	strh	w1, [x0, 584]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L858
+	bne	.L896
 	strh	w19, [x0, 588]
 	mov	w1, w19
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
-.L865:
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+.L903:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L851:
-	adrp	x1, .LANCHOR101
-	adrp	x7, .LANCHOR90
-	ldrh	w5, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR85
-	ldrh	w7, [x7, #:lo12:.LANCHOR90]
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+.L889:
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR83
-	ldrh	w7, [x7, #:lo12:.LANCHOR83]
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L866
-.L855:
+	blt	.L904
+.L893:
 	and	w0, w0, -25
-	b	.L864
-.L850:
+	b	.L902
+.L888:
 	madd	w1, w2, w1, w5
-	adrp	x5, .LANCHOR102
-	ldrh	w5, [x5, #:lo12:.LANCHOR102]
+	adrp	x5, .LANCHOR105
+	ldrh	w5, [x5, #:lo12:.LANCHOR105]
 	cmp	w1, w5
-	ble	.L852
-	adrp	x1, .LANCHOR101
-	adrp	x7, .LANCHOR90
-	ldrh	w5, [x1, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR85
-	ldrh	w7, [x7, #:lo12:.LANCHOR90]
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	ble	.L890
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR83
-	ldrh	w7, [x7, #:lo12:.LANCHOR83]
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
 	add	w1, w1, w7
 	cmp	w5, w1
-	bge	.L855
-	adrp	x1, .LANCHOR88
-	adrp	x7, .LANCHOR92
-	ldrh	w5, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR87
-	ldrh	w7, [x7, #:lo12:.LANCHOR92]
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	bge	.L893
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L855
-	b	.L866
-.L856:
+	blt	.L893
+	b	.L904
+.L894:
 	cmp	w0, 16
-	bne	.L849
+	bne	.L887
 	sdiv	w2, w3, w2
 	ldr	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4816,23 +5012,23 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 6
 	bfi	w0, w2, 11, 8
 	str	w0, [x4, x21]
-	b	.L849
-.L859:
+	b	.L887
+.L897:
 	ldrh	w1, [x0, 586]
 	cmp	w1, w19
-	bne	.L858
+	bne	.L896
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L858
+	bne	.L896
 	strh	w19, [x0, 590]
 	mov	w1, w19
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
-	b	.L865
-.L858:
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
+	b	.L903
+.L896:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -4848,20 +5044,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR62
+	adrp	x21, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC57
+	adrp	x22, .LC58
 	adrp	x23, .LANCHOR9
-	add	x21, x21, :lo12:.LANCHOR62
+	add	x21, x21, :lo12:.LANCHOR63
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC57
+	add	x22, x22, :lo12:.LC58
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L868:
+.L906:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L882
+	bhi	.L920
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4869,18 +5065,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L882:
+.L920:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L869
+	cbz	w2, .L907
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L869:
+.L907:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR7
@@ -4888,95 +5084,95 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L870
+	tbz	x0, 8, .L908
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC58
+	adrp	x0, .LC59
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC59
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L870:
+.L908:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L871
+	beq	.L909
 	tst	w0, 192
-	bne	.L872
-.L871:
-	adrp	x1, .LANCHOR103
+	bne	.L910
+.L909:
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 799
-	add	x1, x1, :lo12:.LANCHOR103
+	mov	w2, 884
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L872:
+.L910:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L873
+	cbz	w2, .L911
 	add	x3, x0, 392
 	mov	w1, 0
-.L875:
+.L913:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L874
+	bne	.L912
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L873:
+.L911:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L876
+	cbz	w2, .L914
 	add	x3, x0, 136
 	mov	w1, 0
-.L878:
+.L916:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L877
+	bne	.L915
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L876:
+.L914:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L879
+	cbz	w2, .L917
 	add	x3, x0, 264
 	mov	w1, 0
-.L881:
+.L919:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L880
+	bne	.L918
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L879:
+.L917:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L868
-.L874:
+	b	.L906
+.L912:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L875
-	b	.L873
-.L877:
+	bne	.L913
+	b	.L911
+.L915:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L878
-	b	.L876
-.L880:
+	bne	.L916
+	b	.L914
+.L918:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L881
-	b	.L879
+	bne	.L919
+	b	.L917
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4988,29 +5184,32 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR99
+	adrp	x1, .LANCHOR102
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR105
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	adrp	x22, .LANCHOR107
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR70
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L906
-	ldrh	w2, [x22, #:lo12:.LANCHOR105]
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L944
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L944
+	ldrh	w2, [x22, #:lo12:.LANCHOR107]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L906:
-	ldrh	w2, [x22, #:lo12:.LANCHOR105]
+.L944:
+	ldrh	w2, [x22, #:lo12:.LANCHOR107]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -5031,56 +5230,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
-	adrp	x25, .LANCHOR106
+	adrp	x25, .LANCHOR108
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR98
+	adrp	x24, .LANCHOR101
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR106
+	add	x25, x25, :lo12:.LANCHOR108
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR98
+	add	x24, x24, :lo12:.LANCHOR101
 	add	x27, x29, 112
 	mov	w19, 0
-.L912:
+.L950:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L923
+	bge	.L961
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR107
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR105]
+	ldrh	w3, [x0, #:lo12:.LANCHOR107]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L924
-.L914:
+	b	.L962
+.L952:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L913
+	tbnz	x2, 0, .L951
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L913:
+.L951:
 	add	w0, w0, 1
-.L924:
+.L962:
 	cmp	w0, w1
-	blt	.L914
+	blt	.L952
 	cmp	w1, 4
-	bne	.L915
+	bne	.L953
 	mov	x3, 0
-.L916:
+.L954:
 	cmp	w21, w3
-	bgt	.L917
-.L918:
+	bgt	.L955
+.L956:
 	add	w19, w19, 1
-	b	.L912
-.L917:
+	b	.L950
+.L955:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5088,59 +5287,65 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L916
-.L915:
+	b	.L954
+.L953:
 	cmp	w21, 2
-	bne	.L919
-	adrp	x0, .LANCHOR104
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L920
+	bne	.L957
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L958
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L958
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L920:
+.L958:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L918
-.L919:
+	b	.L956
+.L957:
 	cmp	w21, 1
-	bne	.L918
-	adrp	x0, .LANCHOR104
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L922
+	bne	.L956
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L960
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L960
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L922:
+.L960:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L918
-.L923:
-	adrp	x2, .LANCHOR97
+	b	.L956
+.L961:
+	adrp	x2, .LANCHOR100
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L925
+	cbnz	w20, .L963
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L927
+	bge	.L965
 	strh	w0, [x1, 96]
-.L927:
+.L965:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5149,7 +5354,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L925:
+.L963:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5157,15 +5362,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L927
+	bcs	.L965
 	strh	w0, [x1, 98]
-	b	.L927
+	b	.L965
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5173,44 +5378,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L937
+	bls	.L975
 	strh	wzr, [x1, 136]
-.L937:
+.L975:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L938
-	adrp	x1, .LANCHOR107
+	cbnz	w0, .L976
+	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
 	mov	w2, 1117
-	add	x1, x1, :lo12:.LANCHOR107
+	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L938:
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+.L976:
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	mov	w5, 65535
-.L941:
+.L979:
 	ldrh	w2, [x1, 136]
-.L939:
+.L977:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L940
+	ble	.L978
 	strh	wzr, [x1, 136]
-	b	.L941
-.L940:
+	b	.L979
+.L978:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L944
+	bne	.L982
 	mov	x2, x4
-	b	.L939
-.L944:
+	b	.L977
+.L982:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5231,40 +5436,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L947
+	bls	.L985
 	strh	wzr, [x1, 138]
-.L947:
+.L985:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L948
-	adrp	x1, .LANCHOR108
+	bls	.L986
+	adrp	x1, .LANCHOR110
 	adrp	x0, .LC0
 	mov	w2, 1141
-	add	x1, x1, :lo12:.LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR110
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L948:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L986:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w4, 65535
-.L951:
+.L989:
 	ldrh	w1, [x0, 138]
-.L949:
+.L987:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L950
+	ble	.L988
 	strh	wzr, [x0, 138]
-	b	.L951
-.L950:
+	b	.L989
+.L988:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L952
+	bne	.L990
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5274,9 +5479,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L952:
+.L990:
 	mov	x1, x3
-	b	.L949
+	b	.L987
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5286,7 +5491,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L965
+	beq	.L1003
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5297,25 +5502,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L955
+	bne	.L993
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR97
-	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	tbz	x0, 3, .L959
+	adrp	x1, .LANCHOR100
+	ldr	x3, [x1, #:lo12:.LANCHOR100]
+	tbz	x0, 3, .L997
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L960:
+.L998:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L962
+	bne	.L1000
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5323,44 +5528,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L955:
+.L993:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L959:
+.L997:
 	tst	w0, 24
-	bne	.L961
+	bne	.L999
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L960
-.L961:
+	b	.L998
+.L999:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L960
-.L962:
+	b	.L998
+.L1000:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L963
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L1001
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L955
-.L963:
+	b	.L993
+.L1001:
 	cmp	w0, 96
-	bne	.L955
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L993
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L955
-.L965:
+	b	.L993
+.L1003:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5370,19 +5575,19 @@ ftl_info_data_recovery:
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR10
-	adrp	x3, .LANCHOR73
+	adrp	x3, .LANCHOR76
 	and	w0, w0, 65535
 	add	x29, sp, 0
 	ldr	x2, [x1, #:lo12:.LANCHOR10]
-	adrp	x1, .LANCHOR80
-	ldrb	w3, [x3, #:lo12:.LANCHOR73]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR83
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L969
+	bge	.L1007
 	add	x2, x2, 16
-.L970:
+.L1008:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5390,25 +5595,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L971
-	adrp	x1, .LANCHOR109
+	bne	.L1009
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1528
-	add	x1, x1, :lo12:.LANCHOR109
+	mov	w2, 1580
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L971:
-	adrp	x0, .LANCHOR105
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+.L1009:
+	adrp	x0, .LANCHOR107
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L969:
+.L1007:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L970
+	b	.L1008
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5416,29 +5621,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR110
-	add	x1, x1, :lo12:.LANCHOR110
+	adrp	x1, .LANCHOR112
+	add	x1, x1, :lo12:.LANCHOR112
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR111
-	ldr	x4, [x2, #:lo12:.LANCHOR111]
-	adrp	x2, .LANCHOR112
-	ldr	x5, [x2, #:lo12:.LANCHOR112]
-.L974:
+	adrp	x2, .LANCHOR113
+	ldr	x4, [x2, #:lo12:.LANCHOR113]
+	adrp	x2, .LANCHOR114
+	ldr	x5, [x2, #:lo12:.LANCHOR114]
+.L1012:
 	cmp	w1, w3
-	bne	.L976
+	bne	.L1014
 	mov	w0, -1
 	ret
-.L976:
+.L1014:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L975
+	bne	.L1013
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L975:
+.L1013:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L974
+	b	.L1012
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5452,50 +5657,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L978
-	adrp	x1, .LANCHOR113
+	bne	.L1016
+	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1643
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 1695
+	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L978:
-	adrp	x0, .LANCHOR80
+.L1016:
+	adrp	x0, .LANCHOR83
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bne	.L979
-	adrp	x1, .LANCHOR113
+	bne	.L1017
+	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1644
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 1696
+	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L979:
+.L1017:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L980
-	adrp	x1, .LANCHOR113
+	cbnz	w0, .L1018
+	adrp	x1, .LANCHOR115
 	adrp	x0, .LC0
-	mov	w2, 1645
-	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 1697
+	add	x1, x1, :lo12:.LANCHOR115
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L980:
+.L1018:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR73
-	ldrb	w4, [x0, #:lo12:.LANCHOR73]
-.L981:
+	adrp	x0, .LANCHOR76
+	ldrb	w4, [x0, #:lo12:.LANCHOR76]
+.L1019:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L983
-	adrp	x0, .LANCHOR105
+	beq	.L1021
+	adrp	x0, .LANCHOR107
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5506,29 +5711,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L977
+	bne	.L1015
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L977:
+.L1015:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L983:
+.L1021:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L982
+	bne	.L1020
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L982:
+.L1020:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L981
+	b	.L1019
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5544,22 +5749,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L987
-	adrp	x1, .LANCHOR114
+	bcs	.L1025
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1676
-	add	x1, x1, :lo12:.LANCHOR114
+	mov	w2, 1728
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L987:
-	adrp	x20, .LANCHOR97
+.L1025:
+	adrp	x20, .LANCHOR100
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5572,18 +5777,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR115
+	adrp	x2, .LANCHOR117
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR115]
+	ldrh	w1, [x2, #:lo12:.LANCHOR117]
 	cmp	w1, 4
-	bhi	.L990
-	cbnz	w0, .L990
+	bhi	.L1028
+	cbnz	w0, .L1028
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR115]
+	strh	w1, [x2, #:lo12:.LANCHOR117]
 	ret
-.L990:
+.L1028:
 	adrp	x0, .LANCHOR6
-	strh	wzr, [x3, #:lo12:.LANCHOR115]
+	strh	wzr, [x3, #:lo12:.LANCHOR117]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
@@ -5593,37 +5798,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L992:
+.L1030:
 	cmp	w5, w1, uxth
-	bhi	.L995
+	bhi	.L1033
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L989
+	cbz	w2, .L1027
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L989:
+.L1027:
 	ret
-.L995:
+.L1033:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L993
+	beq	.L1031
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L994
+	bne	.L1032
 	add	w0, w0, w3
-.L993:
+.L1031:
 	add	x1, x1, 1
-	b	.L992
-.L994:
+	b	.L1030
+.L1032:
 	add	w2, w2, w3
-	b	.L993
+	b	.L1031
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5648,17 +5853,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1003
-	adrp	x1, .LANCHOR116
+	cbnz	w0, .L1041
+	adrp	x1, .LANCHOR118
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR116]
-.L1001:
+	str	w0, [x1, #:lo12:.LANCHOR118]
+.L1039:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1003:
+.L1041:
 	mov	w0, 0
-	b	.L1001
+	b	.L1039
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5671,57 +5876,57 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1006
+	beq	.L1044
 	adrp	x0, .LANCHOR9
 	uxtw	x1, w19
 	lsl	x2, x1, 1
 	ldr	x3, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x3, x2]
-	cbnz	w0, .L1007
+	cbnz	w0, .L1045
 	adrp	x0, .LANCHOR7
 	mov	w2, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x1, x0, x1, lsl 2
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	ldrb	w3, [x1, 2]
 	mov	w1, w19
 	ubfx	x3, x3, 5, 3
 	bl	printf
-.L1012:
+.L1050:
 	mov	w0, 0
-	b	.L1005
-.L1007:
+	b	.L1043
+.L1045:
 	sub	w0, w0, #1
 	strh	w0, [x3, x2]
-.L1006:
-	adrp	x20, .LANCHOR63
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+.L1044:
+	adrp	x20, .LANCHOR64
+	ldrh	w0, [x20, #:lo12:.LANCHOR64]
 	cmp	w19, w0
-	beq	.L1012
+	beq	.L1050
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1009
-	strh	w19, [x20, #:lo12:.LANCHOR63]
-	b	.L1012
-.L1009:
+	bne	.L1047
+	strh	w19, [x20, #:lo12:.LANCHOR64]
+	b	.L1050
+.L1047:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR119
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR63]
-	ldrh	w2, [x1, #:lo12:.LANCHOR117]
-	strh	w19, [x20, #:lo12:.LANCHOR63]
+	ldrh	w3, [x20, #:lo12:.LANCHOR64]
+	ldrh	w2, [x1, #:lo12:.LANCHOR119]
+	strh	w19, [x20, #:lo12:.LANCHOR64]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR117]
+	strh	w2, [x1, #:lo12:.LANCHOR119]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR64
-	add	x1, x1, :lo12:.LANCHOR64
+	adrp	x1, .LANCHOR65
+	add	x1, x1, :lo12:.LANCHOR65
 	strh	w3, [x1, x2, lsl 1]
-.L1005:
+.L1043:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5731,50 +5936,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR110
+	adrp	x3, .LANCHOR112
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR110
+	add	x4, x3, :lo12:.LANCHOR112
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR111
-	ldr	x8, [x4, #:lo12:.LANCHOR111]
-	adrp	x4, .LANCHOR112
-	ldr	x4, [x4, #:lo12:.LANCHOR112]
-.L1015:
+	adrp	x4, .LANCHOR113
+	ldr	x8, [x4, #:lo12:.LANCHOR113]
+	adrp	x4, .LANCHOR114
+	ldr	x4, [x4, #:lo12:.LANCHOR114]
+.L1053:
 	cmp	w6, w12
-	beq	.L1019
+	beq	.L1057
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1016
+	bne	.L1054
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1017
-	add	x6, x3, :lo12:.LANCHOR110
+	bne	.L1055
+	add	x6, x3, :lo12:.LANCHOR112
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1018:
+.L1056:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1019:
+.L1057:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR110
+	add	x3, x3, :lo12:.LANCHOR112
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1026
+	beq	.L1064
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR102
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5782,22 +5987,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1017:
+.L1055:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1018
-.L1016:
+	b	.L1056
+.L1054:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1015
-.L1026:
+	b	.L1053
+.L1064:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5807,10 +6012,10 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR99
+	adrp	x1, .LANCHOR102
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR99]
+	ldrh	w3, [x1, #:lo12:.LANCHOR102]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -5819,23 +6024,23 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w2, w2, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L1030
-	adrp	x0, .LC60
+	tbz	x0, 14, .L1068
+	adrp	x0, .LC61
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC61
 	bl	printf
-.L1030:
+.L1068:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bls	.L1029
+	bls	.L1067
 	adrp	x0, .LANCHOR7
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5844,7 +6049,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L1029:
+.L1067:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5855,52 +6060,57 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR87
-	adrp	x0, .LANCHOR10
-	adrp	x7, .LANCHOR118
+	adrp	x2, .LANCHOR86
+	adrp	x8, .LANCHOR120
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w6, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR10]
-	ldr	w7, [x7, #:lo12:.LANCHOR118]
-	ldrh	w5, [x1, #:lo12:.LANCHOR83]
-	adrp	x1, .LANCHOR85
-	str	w7, [sp, 8]
-	ldrh	w4, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR94
-	ldr	w7, [x0, 528]
-	ldrh	w3, [x1, #:lo12:.LANCHOR94]
-	adrp	x1, .LANCHOR92
-	str	w7, [sp]
-	ldrh	w2, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR90
-	ldr	w7, [x0, 524]
-	adrp	x0, .LC61
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	add	x0, x0, :lo12:.LC61
-	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR97
+	ldrh	w7, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR88
+	stp	x19, x20, [sp, 48]
+	adrp	x19, .LANCHOR100
+	adrp	x20, .LANCHOR10
+	ldrh	w6, [x2, #:lo12:.LANCHOR88]
+	adrp	x2, .LANCHOR97
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldrh	w5, [x2, #:lo12:.LANCHOR97]
+	adrp	x2, .LANCHOR95
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	ldrh	w4, [x2, #:lo12:.LANCHOR95]
+	adrp	x2, .LANCHOR93
+	ldr	w8, [x8, #:lo12:.LANCHOR120]
+	ldrh	w3, [x2, #:lo12:.LANCHOR93]
+	ldrh	w2, [x1, 146]
+	ldrh	w1, [x1, 148]
+	str	w8, [sp, 24]
+	ldr	w8, [x0, 528]
+	str	w8, [sp, 16]
+	ldr	w0, [x0, 524]
+	str	w0, [sp, 8]
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	str	w0, [sp]
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR119
-	ldrb	w3, [x1, #:lo12:.LANCHOR119]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	adrp	x1, .LANCHOR121
+	ldrb	w3, [x1, #:lo12:.LANCHOR121]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5913,24 +6123,32 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-	ldr	x19, [sp, 48]
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR77
+	ldrh	w5, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR82
+	ldrh	w4, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR62
+	ldrh	w3, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	ldp	x29, x30, [sp, 32]
+	ldp	x19, x20, [sp, 48]
 	add	sp, sp, 64
-	ldrh	w5, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR79
-	ldrh	w4, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR61
-	ldrh	w3, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR89
-	ldrh	w2, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	ldrh	w4, [x0, 590]
+	ldrh	w3, [x0, 588]
+	ldrh	w2, [x0, 586]
+	ldrh	w1, [x0, 584]
+	adrp	x0, .LC67
+	add	x0, x0, :lo12:.LC67
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -5942,65 +6160,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1039
-	adrp	x1, .LANCHOR120
-	add	x1, x1, :lo12:.LANCHOR120
-	mov	w2, 662
+	cbnz	x0, .L1077
+	adrp	x1, .LANCHOR122
+	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 667
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1038:
+.L1076:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1042:
+.L1080:
 	mov	x1, x19
-	adrp	x0, .LANCHOR56
-	add	x0, x0, :lo12:.LANCHOR56
+	adrp	x0, .LANCHOR57
+	add	x0, x0, :lo12:.LANCHOR57
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR100
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR57]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldrb	w0, [x21, #:lo12:.LANCHOR58]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR57]
+	strb	w0, [x21, #:lo12:.LANCHOR58]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1038
-.L1039:
+	b	.L1076
+.L1077:
 	mov	x19, x0
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1044
-	adrp	x1, .LANCHOR120
+	bls	.L1082
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 667
-	add	x1, x1, :lo12:.LANCHOR120
+	mov	w2, 672
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1044:
+.L1082:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR57
-	cbz	w0, .L1041
-	ldrb	w1, [x20, #:lo12:.LANCHOR121]
+	adrp	x21, .LANCHOR58
+	cbz	w0, .L1079
+	ldrb	w1, [x20, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bcs	.L1042
-.L1041:
+	bcs	.L1080
+.L1079:
 	mov	x0, x19
 	bl	buf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR57]
-	b	.L1038
+	ldrb	w0, [x21, #:lo12:.LANCHOR58]
+	b	.L1076
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -6010,26 +6228,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR122
+	adrp	x20, .LANCHOR124
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR49
-	adrp	x22, .LANCHOR99
-	add	x20, x20, :lo12:.LANCHOR122
-	add	x19, x19, :lo12:.LANCHOR49
-	add	x22, x22, :lo12:.LANCHOR99
+	adrp	x19, .LANCHOR50
+	adrp	x22, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR124
+	add	x19, x19, :lo12:.LANCHOR50
+	add	x22, x22, :lo12:.LANCHOR102
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L1050:
+.L1088:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1056
+	bne	.L1094
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1056:
+.L1094:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -6038,7 +6256,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L1051
+	bne	.L1089
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -6048,11 +6266,11 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w0
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	and	w24, w1, 65535
 	mov	w1, w24
 	bl	printf
@@ -6067,32 +6285,32 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1052
+	bne	.L1090
 	strh	wzr, [x0, 22]
-.L1053:
+.L1091:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L1050
-.L1052:
+	b	.L1088
+.L1090:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1053
+	bne	.L1091
 	strh	wzr, [x0, 54]
-	b	.L1053
-.L1051:
+	b	.L1091
+.L1089:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1055
+	tbz	x0, 2, .L1093
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1050
-.L1055:
+	b	.L1088
+.L1093:
 	mov	x0, x21
 	bl	buf_free
-	b	.L1050
+	b	.L1088
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6102,40 +6320,40 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1059
-	mov	w2, 949
-	adrp	x1, .LANCHOR123
+	cbnz	x0, .L1097
+	mov	w2, 954
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR123
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1059:
+.L1097:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
-	adrp	x0, .LANCHOR121
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bls	.L1061
-	adrp	x1, .LANCHOR123
+	bls	.L1099
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 954
-	add	x1, x1, :lo12:.LANCHOR123
+	mov	w2, 959
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1061:
+.L1099:
 	mov	x1, x19
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR125
+	adrp	x1, .LANCHOR127
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w0, [x1, #:lo12:.LANCHOR125]
+	ldrb	w0, [x1, #:lo12:.LANCHOR127]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR125]
+	strb	w0, [x1, #:lo12:.LANCHOR127]
 	ret
 	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
@@ -6158,39 +6376,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1066
+	beq	.L1104
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1067
-	adrp	x1, .LANCHOR126
+	beq	.L1105
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
 	mov	w2, 827
-	add	x1, x1, :lo12:.LANCHOR126
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1067:
+.L1105:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1068:
+.L1106:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1066:
+.L1104:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC67
+	adrp	x21, .LC69
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC67
+	add	x21, x21, :lo12:.LC69
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -6204,27 +6422,27 @@ ftl_alloc_sblk:
 	bl	printf
 	bl	dump_all_list_info
 	mov	w2, 837
-	adrp	x1, .LANCHOR126
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR126
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1068
+	b	.L1106
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR53
+	adrp	x1, .LANCHOR54
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR122
-	strb	w0, [x1, #:lo12:.LANCHOR122]
-	adrp	x1, .LANCHOR127
-	strb	w0, [x1, #:lo12:.LANCHOR127]
-	adrp	x1, .LANCHOR66
-	strb	w0, [x1, #:lo12:.LANCHOR66]
+	strb	w0, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR124
+	strb	w0, [x1, #:lo12:.LANCHOR124]
+	adrp	x1, .LANCHOR129
+	strb	w0, [x1, #:lo12:.LANCHOR129]
+	adrp	x1, .LANCHOR67
+	strb	w0, [x1, #:lo12:.LANCHOR67]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6234,25 +6452,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR54
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR53]
+	ldrb	w1, [x19, #:lo12:.LANCHOR54]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR53]
+	ldrb	w19, [x19, #:lo12:.LANCHOR54]
 	cmp	w19, 255
-	beq	.L1075
-	adrp	x1, .LANCHOR49
+	beq	.L1113
+	adrp	x1, .LANCHOR50
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR49
-	adrp	x21, .LC69
+	add	x1, x1, :lo12:.LANCHOR50
+	adrp	x21, .LC71
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC69
+	add	x21, x21, :lo12:.LC71
 	mov	x20, x1
-.L1077:
+.L1115:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6260,11 +6478,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1075
+	beq	.L1113
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1077
-.L1075:
+	b	.L1115
+.L1113:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6275,82 +6493,82 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR53
-	ldrb	w2, [x2, #:lo12:.LANCHOR53]
+	adrp	x2, .LANCHOR54
+	ldrb	w2, [x2, #:lo12:.LANCHOR54]
 	cmp	w2, 255
-	beq	.L1093
-	adrp	x3, .LANCHOR99
-	adrp	x7, .LANCHOR49
-	add	x7, x7, :lo12:.LANCHOR49
-	adrp	x10, .L1089
-	ldrh	w8, [x3, #:lo12:.LANCHOR99]
+	beq	.L1131
+	adrp	x3, .LANCHOR102
+	adrp	x7, .LANCHOR50
+	add	x7, x7, :lo12:.LANCHOR50
+	adrp	x10, .L1127
+	ldrh	w8, [x3, #:lo12:.LANCHOR102]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1089
+	add	x10, x10, :lo12:.L1127
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR98
+	adrp	x4, .LANCHOR101
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR98]
+	ldrb	w6, [x4, #:lo12:.LANCHOR101]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1092:
+.L1130:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1087
+	bne	.L1125
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1088
+	bne	.L1126
 	cmp	w1, 1
-	bne	.L1085
-	cmp	w0, 6
-	ccmp	w0, 8, 4, ne
-	beq	.L1087
+	bne	.L1123
+	cmp	w0, 7
+	ccmp	w0, 9, 4, ne
+	beq	.L1125
 	ret
-.L1088:
+.L1126:
 	cmp	w1, 3
-	bhi	.L1087
+	bhi	.L1125
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1089
+	adr	x13, .Lrtx1127
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1089:
+.Lrtx1127:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1089:
-	.byte	(.L1085 - .Lrtx1089) / 4
-	.byte	(.L1090 - .Lrtx1089) / 4
-	.byte	(.L1091 - .Lrtx1089) / 4
-	.byte	(.L1085 - .Lrtx1089) / 4
+.L1127:
+	.byte	(.L1123 - .Lrtx1127) / 4
+	.byte	(.L1128 - .Lrtx1127) / 4
+	.byte	(.L1129 - .Lrtx1127) / 4
+	.byte	(.L1123 - .Lrtx1127) / 4
 	.section	.text.queue_lun_state
-.L1090:
-	cmp	w0, 6
-	ccmp	w0, 8, 4, ne
-	beq	.L1087
+.L1128:
+	cmp	w0, 7
+	ccmp	w0, 9, 4, ne
+	beq	.L1125
 	ret
-.L1091:
-	cmp	w0, 10
-	bne	.L1085
-.L1087:
+.L1129:
+	cmp	w0, 11
+	bne	.L1123
+.L1125:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1092
-.L1093:
+	bne	.L1130
+.L1131:
 	mov	w0, 0
-.L1085:
+.L1123:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6358,87 +6576,87 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x4, .LANCHOR122
-	adrp	x8, .LANCHOR66
-	adrp	x1, .LANCHOR53
-	adrp	x7, .LANCHOR127
-	adrp	x3, .LANCHOR49
-	ldrb	w14, [x4, #:lo12:.LANCHOR122]
-	add	x5, x3, :lo12:.LANCHOR49
-	ldrb	w2, [x1, #:lo12:.LANCHOR53]
-	ldrb	w12, [x8, #:lo12:.LANCHOR66]
+	adrp	x4, .LANCHOR124
+	adrp	x8, .LANCHOR67
+	adrp	x1, .LANCHOR54
+	adrp	x7, .LANCHOR129
+	adrp	x3, .LANCHOR50
+	ldrb	w14, [x4, #:lo12:.LANCHOR124]
+	add	x5, x3, :lo12:.LANCHOR50
+	ldrb	w2, [x1, #:lo12:.LANCHOR54]
+	ldrb	w12, [x8, #:lo12:.LANCHOR67]
 	mov	x11, x5
-	ldrb	w13, [x7, #:lo12:.LANCHOR127]
-	add	x16, x8, :lo12:.LANCHOR66
-	add	x7, x7, :lo12:.LANCHOR127
-	add	x10, x4, :lo12:.LANCHOR122
+	ldrb	w13, [x7, #:lo12:.LANCHOR129]
+	add	x16, x8, :lo12:.LANCHOR67
+	add	x7, x7, :lo12:.LANCHOR129
+	add	x10, x4, :lo12:.LANCHOR124
 	mov	w6, 0
 	mov	w15, -1
-.L1096:
+.L1134:
 	cmp	w2, 255
-	beq	.L1097
+	beq	.L1135
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
 	ldrb	w4, [x4, 58]
-	sub	w4, w4, #11
+	sub	w4, w4, #12
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1098
-	cbz	w6, .L1095
-	strb	w2, [x1, #:lo12:.LANCHOR53]
+	bls	.L1136
+	cbz	w6, .L1133
+	strb	w2, [x1, #:lo12:.LANCHOR54]
 	ret
-.L1098:
+.L1136:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1101
+	bne	.L1139
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1109
+	cbnz	w4, .L1147
 	mov	w4, w14
 	mov	x6, x10
-.L1102:
+.L1140:
 	cmp	w4, 255
-	bne	.L1107
-	add	x3, x3, :lo12:.LANCHOR49
-	strb	w2, [x1, #:lo12:.LANCHOR53]
+	bne	.L1145
+	add	x3, x3, :lo12:.LANCHOR50
+	strb	w2, [x1, #:lo12:.LANCHOR54]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1101:
-	cbnz	w6, .L1103
+.L1139:
+	cbnz	w6, .L1141
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1103
+	beq	.L1141
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1102
-.L1109:
+	b	.L1140
+.L1147:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1102
-.L1107:
+	b	.L1140
+.L1145:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1107
+	bne	.L1145
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1103:
+.L1141:
 	mov	w6, 1
-	b	.L1096
-.L1097:
-	cbz	w6, .L1095
+	b	.L1134
+.L1135:
+	cbz	w6, .L1133
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR53]
-.L1095:
+	strb	w0, [x1, #:lo12:.LANCHOR54]
+.L1133:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6447,42 +6665,42 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR76
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
+	adrp	x20, .LANCHOR100
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1120
+	bls	.L1158
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1121
-.L1120:
-	adrp	x19, .LC70
-	add	x19, x19, :lo12:.LC70
+	bne	.L1159
+.L1158:
+	adrp	x19, .LC72
+	add	x19, x19, :lo12:.LC72
 	adrp	x23, .LANCHOR7
-.L1133:
+.L1171:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR97
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	add	x14, x20, :lo12:.LANCHOR100
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1122
+	bne	.L1160
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -6491,58 +6709,58 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1133
-.L1122:
+	b	.L1171
+.L1160:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR128
+	adrp	x1, .LANCHOR130
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR128]
+	str	w2, [x1, #:lo12:.LANCHOR130]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1124:
+.L1162:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1123
+	beq	.L1161
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1124
-	adrp	x1, .LANCHOR129
+	bne	.L1162
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 194
-	add	x1, x1, :lo12:.LANCHOR129
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1123:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1161:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1121:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L1159:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1126
-	adrp	x1, .LANCHOR129
+	bcs	.L1164
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
 	mov	w2, 199
-	add	x1, x1, :lo12:.LANCHOR129
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1126:
-	adrp	x1, .LANCHOR99
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1164:
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
@@ -6550,17 +6768,17 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1129
+	tbz	x0, 12, .L1167
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC71
+	adrp	x0, .LC73
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC71
+	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L1129:
+.L1167:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6574,73 +6792,87 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR130
-	add	x0, x0, :lo12:.LANCHOR130
+	adrp	x0, .LANCHOR132
+	add	x0, x0, :lo12:.LANCHOR132
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1138:
+.L1176:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1137
+	beq	.L1175
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1138
+	bne	.L1176
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1140:
+.L1178:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1139
+	tbnz	x3, 15, .L1177
 	cmp	w3, w4
-	bcs	.L1139
+	bcs	.L1177
 	mov	w4, w3
 	mov	w19, w1
-.L1139:
+.L1177:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1140
+	bne	.L1178
 	cmp	w19, 32
-	bne	.L1137
-	adrp	x1, .LANCHOR131
+	bne	.L1175
+	adrp	x1, .LANCHOR133
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR131]
+	ldrb	w3, [x1, #:lo12:.LANCHOR133]
 	mov	w1, 0
-.L1142:
+.L1180:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1141
+	bcs	.L1179
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1141:
+.L1179:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1142
+	bne	.L1180
 	cmp	w19, 32
-	bne	.L1137
-	adrp	x1, .LANCHOR132
+	bne	.L1175
+	adrp	x1, .LANCHOR134
 	adrp	x0, .LC0
 	mov	w2, 297
-	add	x1, x1, :lo12:.LANCHOR132
+	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1137:
+.L1175:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.idb_init,"ax",@progbits
+	.align	2
+	.global	idb_init
+	.type	idb_init, %function
+idb_init:
+	adrp	x0, .LANCHOR135
+	str	xzr, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	str	wzr, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR137
+	str	xzr, [x0, #:lo12:.LANCHOR137]
+	mov	w0, 0
+	ret
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
@@ -6658,59 +6890,59 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1149
+	cbnz	w0, .L1188
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1150:
+.L1189:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1150
-.L1156:
-	adrp	x20, .LANCHOR133
-	add	x20, x20, :lo12:.LANCHOR133
+	bne	.L1189
+.L1195:
+	adrp	x20, .LANCHOR138
+	add	x20, x20, :lo12:.LANCHOR138
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1151:
+.L1190:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1151
+	bne	.L1190
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1149:
+.L1188:
 	cmp	w0, 1
-	bne	.L1152
+	bne	.L1191
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1155:
+.L1194:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1153
+	bls	.L1192
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1153:
+.L1192:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1155
-	b	.L1156
-.L1152:
+	bne	.L1194
+	b	.L1195
+.L1191:
 	cmp	w0, 2
-	bne	.L1157
+	bne	.L1196
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1159:
+.L1198:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6719,31 +6951,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1159
-	b	.L1156
-.L1157:
+	bne	.L1198
+	b	.L1195
+.L1196:
 	cmp	w0, 3
-	bne	.L1160
+	bne	.L1199
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1163:
+.L1202:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1161
+	bls	.L1200
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1161:
+.L1200:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1163
-	b	.L1156
-.L1160:
+	bne	.L1202
+	b	.L1195
+.L1199:
 	cmp	w0, 4
-	bne	.L1164
+	bne	.L1203
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6761,7 +6993,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1166:
+.L1205:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6770,37 +7002,55 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1166
-	b	.L1156
-.L1164:
+	bne	.L1205
+	b	.L1195
+.L1203:
 	cmp	w0, 5
-	bne	.L1167
+	bne	.L1206
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1168:
+.L1207:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1168
+	bne	.L1207
 	add	x1, x1, 32
-.L1169:
+.L1208:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1169
-	b	.L1156
-.L1167:
+	bne	.L1208
+	b	.L1195
+.L1206:
 	cmp	w0, 8
-	bne	.L1156
+	bne	.L1209
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1170:
+.L1210:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1170
-	b	.L1156
+	bne	.L1210
+	b	.L1195
+.L1209:
+	cmp	w0, 9
+	bne	.L1195
+	add	x0, x19, :lo12:.LANCHOR3
+	mov	w1, 1
+	add	x0, x0, 6
+	strh	wzr, [x19, #:lo12:.LANCHOR3]
+	strh	w1, [x0, -4]
+	mov	w1, 2
+	strh	w1, [x0, -2]
+	mov	w1, 3
+.L1211:
+	strh	w1, [x0], 2
+	add	w1, w1, 2
+	and	w1, w1, 65535
+	cmp	w1, 509
+	bne	.L1211
+	b	.L1195
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6814,54 +7064,54 @@ flash_die_info_init:
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L1186
-	adrp	x1, .LANCHOR134
+	tbz	x0, 12, .L1228
+	adrp	x1, .LANCHOR139
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR134
+	add	x1, x1, :lo12:.LANCHOR139
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1186:
-	adrp	x22, .LANCHOR34
-	add	x19, x22, :lo12:.LANCHOR34
+.L1228:
+	adrp	x22, .LANCHOR30
+	add	x19, x22, :lo12:.LANCHOR30
 	adrp	x23, .LANCHOR2
 	adrp	x24, .LANCHOR18
 	adrp	x21, .LANCHOR29
 	mov	w2, 8
 	ldrh	w0, [x19, 26]
-	adrp	x20, .LANCHOR136
+	adrp	x20, .LANCHOR141
 	ldrb	w1, [x19, 12]
 	strh	w0, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 10]
 	strb	wzr, [x24, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR135
-	strh	w0, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR140
+	strh	w0, [x1, #:lo12:.LANCHOR140]
 	mov	w1, 0
 	add	x0, x21, :lo12:.LANCHOR29
 	bl	ftl_memset
-	add	x0, x20, :lo12:.LANCHOR136
+	add	x0, x20, :lo12:.LANCHOR141
 	mov	w2, 32
 	mov	w1, 0
 	bl	ftl_memset
 	mov	x15, x21
 	mov	x11, x20
-	adrp	x12, .LANCHOR35
+	adrp	x12, .LANCHOR31
 	adrp	x14, .LANCHOR41
 	mov	x7, x22
-	add	x12, x12, :lo12:.LANCHOR35
+	add	x12, x12, :lo12:.LANCHOR31
 	add	x20, x14, :lo12:.LANCHOR41
 	add	x21, x19, 1
 	mov	x10, 0
-.L1188:
+.L1230:
 	ldrb	w2, [x19]
 	mov	w0, 2
 	strb	w0, [x10, x12]
 	add	x1, x20, x10, lsl 3
 	mov	x0, x21
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1187
+	cbnz	w0, .L1229
 	ldrb	w2, [x24, #:lo12:.LANCHOR18]
-	add	x1, x11, :lo12:.LANCHOR136
+	add	x1, x11, :lo12:.LANCHOR141
 	add	w0, w2, 1
 	strb	w0, [x24, #:lo12:.LANCHOR18]
 	and	w0, w10, 255
@@ -6869,16 +7119,16 @@ flash_die_info_init:
 	add	x1, x15, :lo12:.LANCHOR29
 	strb	w0, [x1, x2]
 	bl	zftl_flash_enter_slc_mode
-.L1187:
+.L1229:
 	add	x10, x10, 1
 	cmp	x10, 4
-	bne	.L1188
-	add	x0, x7, :lo12:.LANCHOR34
+	bne	.L1230
+	add	x0, x7, :lo12:.LANCHOR30
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1189
-.L1193:
-	add	x7, x7, :lo12:.LANCHOR34
+	beq	.L1231
+.L1235:
+	add	x7, x7, :lo12:.LANCHOR30
 	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
@@ -6888,18 +7138,18 @@ flash_die_info_init:
 	ldrh	w1, [x7, 14]
 	ldp	x29, x30, [sp], 64
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR137
-	strh	w0, [x1, #:lo12:.LANCHOR137]
+	adrp	x1, .LANCHOR142
+	strh	w0, [x1, #:lo12:.LANCHOR142]
 	ret
-.L1189:
+.L1231:
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	x14, x14, :lo12:.LANCHOR41
 	ldrb	w12, [x0, 13]
 	add	x10, x0, 1
-	ldrb	w20, [x7, #:lo12:.LANCHOR34]
+	ldrb	w20, [x7, #:lo12:.LANCHOR30]
 	add	x19, x24, :lo12:.LANCHOR18
 	ldrb	w21, [x0, 23]
-	add	x11, x11, :lo12:.LANCHOR136
+	add	x11, x11, :lo12:.LANCHOR141
 	add	x15, x15, :lo12:.LANCHOR29
 	mov	x13, 0
 	mul	w12, w12, w1
@@ -6907,12 +7157,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w12, w12, w1
 	lsl	w22, w12, 1
-.L1192:
+.L1234:
 	mov	w2, w20
 	add	x1, x14, x13, lsl 3
 	mov	x0, x10
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1190
+	cbnz	w0, .L1232
 	ldrb	w1, [x19]
 	cmp	w21, 0
 	csel	w2, w12, w22, eq
@@ -6920,11 +7170,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x11, x1, lsl 2]
 	strb	w13, [x15, x1]
-.L1190:
+.L1232:
 	add	x13, x13, 1
 	cmp	x13, 4
-	bne	.L1192
-	b	.L1193
+	bne	.L1234
+	b	.L1235
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6934,19 +7184,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR112
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR110
+	add	x0, x0, :lo12:.LANCHOR112
 	bl	ftl_memset
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR83
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR112
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6961,59 +7211,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1206
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC72
+	tbz	x0, 12, .L1248
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC74
 	mov	w3, 0
-	mov	w2, 222
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC72
+	mov	w2, 224
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC74
 	bl	printf
-.L1206:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR73
-	adrp	x19, .LANCHOR110
-	add	x19, x19, :lo12:.LANCHOR110
+.L1248:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR76
+	adrp	x19, .LANCHOR112
+	add	x19, x19, :lo12:.LANCHOR112
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR112
-	ldrb	w0, [x22, #:lo12:.LANCHOR73]
+	ldrh	w2, [x20, #:lo12:.LANCHOR83]
+	adrp	x21, .LANCHOR114
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR83
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR114]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR111
-	ldrb	w3, [x22, #:lo12:.LANCHOR73]
-	ldr	x5, [x21, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR113
+	ldrb	w3, [x22, #:lo12:.LANCHOR76]
+	ldr	x5, [x21, #:lo12:.LANCHOR114]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR111]
-.L1207:
+	ldr	x4, [x0, #:lo12:.LANCHOR113]
+.L1249:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1209
+	blt	.L1251
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1209:
+.L1251:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1208
+	beq	.L1250
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1208:
+.L1250:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1207
+	b	.L1249
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7027,10 +7277,10 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR34
-	add	x1, x1, :lo12:.LANCHOR34
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
 	adrp	x0, .LANCHOR2
-	adrp	x3, .LANCHOR58
+	adrp	x3, .LANCHOR59
 	strb	wzr, [x19, 10]
 	mov	w4, 1
 	ldrb	w2, [x1, 9]
@@ -7042,8 +7292,8 @@ zftl_read_flash_info:
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR58
-	ldrb	w3, [x3, #:lo12:.LANCHOR58]
+	add	x0, x3, :lo12:.LANCHOR59
+	ldrb	w3, [x3, #:lo12:.LANCHOR59]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -7061,20 +7311,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1218:
+.L1260:
 	cmp	w3, w1, uxtb
-	bhi	.L1219
+	bhi	.L1261
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1219:
+.L1261:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1218
+	b	.L1260
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7084,18 +7334,18 @@ gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR97
+	adrp	x25, .LANCHOR100
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1222
+	bls	.L1264
 	bl	ftl_tmp_into_update
-.L1222:
+.L1264:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7103,15 +7353,15 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1223
-	ldr	x3, [x25, #:lo12:.LANCHOR97]
+	bhi	.L1265
+	ldr	x3, [x25, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1272
-.L1223:
-	ldr	x1, [x25, #:lo12:.LANCHOR97]
+	bls	.L1314
+.L1265:
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
 	mov	w21, w20
@@ -7130,10 +7380,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1225:
+.L1267:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1234
+	bhi	.L1276
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -7148,14 +7398,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1235
+	tbz	x3, 10, .L1277
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7163,22 +7413,22 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1235:
+.L1277:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1236
+	tbz	x0, 3, .L1278
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1237
+	bne	.L1279
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR62+318
+	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1236:
+	strh	w1, [x0, #:lo12:.LANCHOR63+318]
+.L1278:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w3, [x24, #:lo12:.LANCHOR14]
 	ldr	x2, [x23, #:lo12:.LANCHOR7]
@@ -7186,14 +7436,14 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1238
+	tbz	x3, 10, .L1280
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
 	ldrh	w7, [x6, x5, lsl 1]
 	ubfx	x3, x3, 11, 8
 	ldrb	w6, [x26, 3]
@@ -7201,24 +7451,24 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1238:
+.L1280:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1239
+	tbz	x0, 3, .L1281
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1240
+	bne	.L1282
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR62+318
+	adrp	x0, .LANCHOR63+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1239:
+	strh	w1, [x0, #:lo12:.LANCHOR63+318]
+.L1281:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1241
+	tbz	x0, 10, .L1283
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7227,9 +7477,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC76
+	adrp	x0, .LC78
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC76
+	add	x0, x0, :lo12:.LC78
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 128]
@@ -7238,9 +7488,9 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1241:
+.L1283:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1242
+	tbz	x0, 10, .L1284
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7249,9 +7499,9 @@ gc_static_wearleveling:
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
 	ldrh	w2, [x1, x0]
-	adrp	x0, .LC77
+	adrp	x0, .LC79
 	ldrh	w7, [x7, x6, lsl 1]
-	add	x0, x0, :lo12:.LC77
+	add	x0, x0, :lo12:.LC79
 	ldrb	w6, [x5, 3]
 	ubfx	x3, x3, 11, 8
 	ldr	w1, [x29, 136]
@@ -7260,8 +7510,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1242:
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
+.L1284:
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 148]
@@ -7274,126 +7524,126 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1243
-	adrp	x0, .LC78
+	tbz	x0, 10, .L1285
+	adrp	x0, .LC80
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC80
 	bl	printf
-.L1243:
+.L1285:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1244
-	adrp	x0, .LANCHOR139
+	tbz	x0, 10, .L1286
+	adrp	x0, .LANCHOR144
 	ldr	w3, [x29, 156]
 	mov	w4, w22
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR139]
-	adrp	x0, .LANCHOR140
+	ldrh	w6, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
+	ldrh	w5, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1244:
+.L1286:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR139
+	adrp	x0, .LANCHOR144
 	ldr	w1, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR139]
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w1, w0
-	bgt	.L1245
-	adrp	x1, .LANCHOR140
+	bgt	.L1287
+	adrp	x1, .LANCHOR145
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR140]
+	ldrh	w1, [x1, #:lo12:.LANCHOR145]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1273
-.L1245:
+	ble	.L1315
+.L1287:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x28, .LANCHOR62
-	add	x28, x28, :lo12:.LANCHOR62
+	adrp	x28, .LANCHOR63
+	add	x28, x28, :lo12:.LANCHOR63
 	mov	w27, 0
 	mov	w22, 0
 	ldrh	w26, [x0, 580]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 134]
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
+	adrp	x0, .LANCHOR145
+	add	x0, x0, :lo12:.LANCHOR145
 	str	x0, [x29, 128]
-.L1247:
+.L1289:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1257
-.L1256:
+	bcc	.L1299
+.L1298:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1246:
-	cbz	w21, .L1259
-	ldr	x2, [x25, #:lo12:.LANCHOR97]
+.L1288:
+	cbz	w21, .L1301
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1260:
+.L1302:
 	cmp	w1, w5
-	bcc	.L1262
+	bcc	.L1304
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1259
+	bcs	.L1301
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1259:
-	cbz	w20, .L1265
-	ldr	x2, [x25, #:lo12:.LANCHOR97]
+.L1301:
+	cbz	w20, .L1307
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1266:
+.L1308:
 	cmp	w1, w6
-	bcc	.L1268
+	bcc	.L1310
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1265
+	bcs	.L1307
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1265:
+.L1307:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1224
+	beq	.L1266
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR80
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR83
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	cmp	w2, w1
-	bhi	.L1224
+	bhi	.L1266
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1224:
+.L1266:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7402,7 +7652,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1234:
+.L1276:
 	uxtw	x7, w24
 	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -7410,40 +7660,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1226
+	beq	.L1268
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1227
+	tbz	x4, 0, .L1269
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1228:
+.L1270:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1271
+	bls	.L1313
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1271:
+.L1313:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1231
+	bcs	.L1273
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1231:
+.L1273:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1230
-.L1232:
+	bne	.L1272
+.L1274:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1226
+	bhi	.L1268
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1226
+	tbz	x0, 8, .L1268
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -7455,82 +7705,82 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	stp	x8, x10, [x29, 112]
 	ldrh	w7, [x0, x7, lsl 1]
-	adrp	x0, .LC73
+	adrp	x0, .LC75
 	ubfx	x5, x5, 5, 3
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC75
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1226:
+.L1268:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1225
-.L1227:
+	b	.L1267
+.L1269:
 	tst	w0, 24
-	bne	.L1229
+	bne	.L1271
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1228
-.L1229:
+	b	.L1270
+.L1271:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1230:
+.L1272:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1233
+	bls	.L1275
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1233:
+.L1275:
 	cmp	w22, w0
-	bcs	.L1232
+	bcs	.L1274
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1232
-.L1237:
+	b	.L1274
+.L1279:
 	tst	w0, 224
-	bne	.L1236
+	bne	.L1278
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 590]
 	cmp	w2, w0
-	bne	.L1236
+	bne	.L1278
 	ldrh	w0, [x1, 586]
 	ldrh	w1, [x1, 588]
 	cmp	w1, w0
-	beq	.L1236
+	beq	.L1278
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1236
-.L1240:
+	b	.L1278
+.L1282:
 	tst	w0, 224
-	bne	.L1239
+	bne	.L1281
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	mov	w0, 65535
 	ldrh	w2, [x1, 588]
 	cmp	w2, w0
-	bne	.L1239
+	bne	.L1281
 	ldrh	w0, [x1, 584]
 	ldrh	w1, [x1, 590]
 	cmp	w1, w0
-	beq	.L1239
+	beq	.L1281
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1239
-.L1257:
+	b	.L1281
+.L1299:
 	add	w7, w26, 1
 	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
@@ -7541,31 +7791,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1249
+	beq	.L1291
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1249
+	beq	.L1291
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1250
+	tbz	x0, 0, .L1292
 	cmp	w2, 160
-.L1337:
-	bne	.L1252
-	adrp	x0, .LANCHOR139
+.L1379:
+	bne	.L1294
+	adrp	x0, .LANCHOR144
 	ldr	w2, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR139]
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w0
-	ble	.L1253
+	ble	.L1295
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1254
-	cbz	w1, .L1253
+	bls	.L1296
+	cbz	w1, .L1295
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1253
-.L1254:
+	bgt	.L1295
+.L1296:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7578,7 +7828,7 @@ gc_static_wearleveling:
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1253
+	tbz	x0, 10, .L1295
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7588,46 +7838,46 @@ gc_static_wearleveling:
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1338:
+.L1380:
 	bl	printf
-.L1253:
+.L1295:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1256
-.L1249:
+	bhi	.L1298
+.L1291:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1247
-.L1250:
+	b	.L1289
+.L1292:
 	cmp	w0, 2
-	b	.L1337
-.L1252:
+	b	.L1379
+.L1294:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1253
+	ble	.L1295
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1255
-	cbz	w1, .L1253
+	ble	.L1297
+	cbz	w1, .L1295
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1253
-.L1255:
+	bgt	.L1295
+.L1297:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7640,7 +7890,7 @@ gc_static_wearleveling:
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1253
+	tbz	x0, 10, .L1295
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7650,54 +7900,54 @@ gc_static_wearleveling:
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	ldrb	w2, [x3, 2]
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1338
-.L1273:
+	b	.L1380
+.L1315:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1246
-.L1262:
+	b	.L1288
+.L1304:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1261
+	bhi	.L1303
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1261
+	beq	.L1303
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1261:
+.L1303:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1260
-.L1268:
+	b	.L1302
+.L1310:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1267
+	blt	.L1309
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1267
+	beq	.L1309
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1267:
+.L1309:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1266
-.L1272:
+	b	.L1308
+.L1314:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1224
+	b	.L1266
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7713,80 +7963,80 @@ zftl_sblk_list_init:
 	adrp	x28, .LANCHOR4
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x27, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR87
+	adrp	x20, .LANCHOR90
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR83
+	adrp	x19, .LANCHOR86
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR94
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR97
+	adrp	x25, .LANCHOR100
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR4]
-	adrp	x24, .LANCHOR90
-	adrp	x23, .LANCHOR92
-	adrp	x21, .LANCHOR85
+	adrp	x24, .LANCHOR93
+	adrp	x23, .LANCHOR95
+	adrp	x21, .LANCHOR88
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR96
-	adrp	x2, .LANCHOR73
-	adrp	x3, .LANCHOR72
+	adrp	x0, .LANCHOR99
+	adrp	x2, .LANCHOR76
+	adrp	x3, .LANCHOR75
 	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR96]
-	adrp	x10, .LANCHOR91
-	ldrb	w0, [x2, #:lo12:.LANCHOR73]
-	adrp	x8, .LANCHOR93
-	ldrh	w1, [x3, #:lo12:.LANCHOR72]
-	adrp	x7, .LANCHOR95
-	adrp	x6, .LANCHOR76
+	strh	w1, [x0, #:lo12:.LANCHOR99]
+	adrp	x10, .LANCHOR94
+	ldrb	w0, [x2, #:lo12:.LANCHOR76]
+	adrp	x8, .LANCHOR96
+	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	adrp	x7, .LANCHOR98
+	adrp	x6, .LANCHOR79
 	adrp	x5, .LANCHOR12
-	adrp	x4, .LANCHOR75
-	str	xzr, [x10, #:lo12:.LANCHOR91]
-	str	xzr, [x8, #:lo12:.LANCHOR93]
+	adrp	x4, .LANCHOR78
+	str	xzr, [x10, #:lo12:.LANCHOR94]
+	str	xzr, [x8, #:lo12:.LANCHOR96]
 	adrp	x28, .LANCHOR7
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR95]
-	str	xzr, [x6, #:lo12:.LANCHOR76]
+	str	xzr, [x7, #:lo12:.LANCHOR98]
+	str	xzr, [x6, #:lo12:.LANCHOR79]
 	str	xzr, [x5, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR75]
-	strh	wzr, [x24, #:lo12:.LANCHOR90]
-	strh	wzr, [x23, #:lo12:.LANCHOR92]
-	strh	wzr, [x22, #:lo12:.LANCHOR94]
+	str	xzr, [x4, #:lo12:.LANCHOR78]
+	strh	wzr, [x24, #:lo12:.LANCHOR93]
+	strh	wzr, [x23, #:lo12:.LANCHOR95]
+	strh	wzr, [x22, #:lo12:.LANCHOR97]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	strh	wzr, [x21, #:lo12:.LANCHOR85]
-	strh	wzr, [x20, #:lo12:.LANCHOR87]
-	strh	wzr, [x19, #:lo12:.LANCHOR83]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	strh	wzr, [x21, #:lo12:.LANCHOR88]
+	strh	wzr, [x20, #:lo12:.LANCHOR90]
+	strh	wzr, [x19, #:lo12:.LANCHOR86]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR6
-	adrp	x27, .LC82
-	add	x27, x27, :lo12:.LC82
+	adrp	x27, .LC84
+	add	x27, x27, :lo12:.LC84
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1340:
+.L1382:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1356
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	ldrh	w1, [x24, #:lo12:.LANCHOR90]
+	blt	.L1398
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w1, [x24, #:lo12:.LANCHOR93]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR92]
+	ldrh	w1, [x23, #:lo12:.LANCHOR95]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR94]
+	ldrh	w1, [x22, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR85]
+	ldrh	w1, [x21, #:lo12:.LANCHOR88]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR87]
+	ldrh	w1, [x20, #:lo12:.LANCHOR90]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR83]
+	ldrh	w1, [x19, #:lo12:.LANCHOR86]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7794,28 +8044,28 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1356:
+.L1398:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1357
+	cbz	w6, .L1399
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR97]
-	ldrb	w8, [x0, #:lo12:.LANCHOR73]
+	ldr	x7, [x25, #:lo12:.LANCHOR100]
+	ldrb	w8, [x0, #:lo12:.LANCHOR76]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR72]
+	ldrh	w10, [x0, #:lo12:.LANCHOR75]
 	mov	w0, 0
-.L1342:
+.L1384:
 	cmp	w1, w8
-	blt	.L1345
-	cbz	w0, .L1346
+	blt	.L1387
+	cbz	w0, .L1388
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1341:
+.L1383:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -7830,44 +8080,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1347
+	beq	.L1389
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1347
+	beq	.L1389
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1347
+	beq	.L1389
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1347
+	beq	.L1389
 	cmp	w0, 64
-	bne	.L1348
+	bne	.L1390
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR85
+	add	x2, x21, :lo12:.LANCHOR88
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1360:
+.L1402:
 	bl	_insert_data_list
-.L1347:
+.L1389:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1340
-.L1345:
+	b	.L1382
+.L1387:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1343
+	tbnz	x5, 0, .L1385
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1344:
+.L1386:
 	add	w1, w1, 1
-	b	.L1342
-.L1343:
+	b	.L1384
+.L1385:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1344
-.L1346:
+	b	.L1386
+.L1388:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -7875,75 +8125,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1341
-.L1357:
+	b	.L1383
+.L1399:
 	ldr	w0, [x29, 188]
-	b	.L1341
-.L1348:
+	b	.L1383
+.L1390:
 	cmp	w0, 96
-	bne	.L1349
+	bne	.L1391
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR83
+	add	x2, x19, :lo12:.LANCHOR86
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1360
-.L1349:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L1402
+.L1391:
 	cmp	w0, 160
-	bne	.L1350
+	bne	.L1392
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR87
+	add	x2, x20, :lo12:.LANCHOR90
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR75
-	b	.L1360
-.L1350:
-	cbnz	w0, .L1347
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L1402
+.L1392:
+	cbnz	w0, .L1389
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1351
+	cbz	w2, .L1393
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1352
+	tbz	x0, 4, .L1394
 	mov	w1, 5
-.L1359:
+.L1401:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1347
-.L1352:
+	b	.L1389
+.L1394:
 	mov	w1, 2
-	b	.L1359
-.L1351:
+	b	.L1401
+.L1393:
 	ands	w1, w1, 24
-	bne	.L1354
+	bne	.L1396
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR90
+	add	x2, x24, :lo12:.LANCHOR93
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR91
-.L1361:
+	add	x0, x0, :lo12:.LANCHOR94
+.L1403:
 	bl	_insert_free_list
-	b	.L1347
-.L1354:
+	b	.L1389
+.L1396:
 	cmp	w1, 16
-	bne	.L1355
+	bne	.L1397
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR92
+	add	x2, x23, :lo12:.LANCHOR95
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR93
-	b	.L1361
-.L1355:
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L1403
+.L1397:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR94
+	add	x2, x22, :lo12:.LANCHOR97
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR95
-	b	.L1361
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L1403
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7953,19 +8203,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR73
+	adrp	x20, .LANCHOR76
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC70
-	adrp	x23, .LANCHOR80
+	adrp	x21, .LC72
+	adrp	x23, .LANCHOR83
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR80
-	add	x20, x20, :lo12:.LANCHOR73
-	add	x21, x21, :lo12:.LC70
+	add	x23, x23, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR76
+	add	x21, x21, :lo12:.LC72
 	stp	x25, x26, [sp, 64]
-.L1363:
-.L1366:
+.L1405:
+.L1408:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7985,18 +8235,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1367
+	beq	.L1409
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1364:
+.L1406:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR111
-	ldr	x3, [x1, #:lo12:.LANCHOR111]
+	adrp	x1, .LANCHOR113
+	ldr	x3, [x1, #:lo12:.LANCHOR113]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -8005,7 +8255,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1362
+	cbnz	w0, .L1404
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -8014,11 +8264,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1366
-.L1367:
+	b	.L1408
+.L1409:
 	mov	w0, 0
-	b	.L1364
-.L1362:
+	b	.L1406
+.L1404:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8034,34 +8284,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR141
+	adrp	x20, .LANCHOR146
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR141]
+	ldrh	w0, [x20, #:lo12:.LANCHOR146]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1370
-	adrp	x1, .LANCHOR142
+	bls	.L1412
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC0
 	mov	w2, 78
-	add	x1, x1, :lo12:.LANCHOR142
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1370:
+.L1412:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR98
-	adrp	x5, .LANCHOR97
-	adrp	x0, .LANCHOR99
+	adrp	x23, .LANCHOR101
+	adrp	x5, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR98]
-	ldr	x7, [x5, #:lo12:.LANCHOR97]
-	ldrh	w11, [x0, #:lo12:.LANCHOR99]
-	ldrh	w13, [x20, #:lo12:.LANCHOR141]
+	ldrb	w12, [x23, #:lo12:.LANCHOR101]
+	ldr	x7, [x5, #:lo12:.LANCHOR100]
+	ldrh	w11, [x0, #:lo12:.LANCHOR102]
+	ldrh	w13, [x20, #:lo12:.LANCHOR146]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -8070,26 +8320,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1371:
+.L1413:
 	cmp	x4, x1
-	bne	.L1375
-	adrp	x24, .LANCHOR73
-	adrp	x25, .LANCHOR80
+	bne	.L1417
+	adrp	x24, .LANCHOR76
+	adrp	x25, .LANCHOR83
 	adrp	x26, .LANCHOR14
-	adrp	x27, .LC83
-	ldrb	w22, [x24, #:lo12:.LANCHOR73]
-	add	x20, x20, :lo12:.LANCHOR141
-	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	adrp	x27, .LC85
+	ldrb	w22, [x24, #:lo12:.LANCHOR76]
+	add	x20, x20, :lo12:.LANCHOR146
+	ldrh	w0, [x25, #:lo12:.LANCHOR83]
 	add	x26, x26, :lo12:.LANCHOR14
-	add	x27, x27, :lo12:.LC83
+	add	x27, x27, :lo12:.LC85
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1376:
+.L1418:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1382
+	bhi	.L1424
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8098,7 +8348,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1375:
+.L1417:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -8106,47 +8356,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1372:
+.L1414:
 	cmp	w13, w3, uxth
-	bhi	.L1374
+	bhi	.L1416
 	add	x4, x4, 4
-	b	.L1371
-.L1374:
+	b	.L1413
+.L1416:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1373
+	bne	.L1415
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1373:
+.L1415:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1372
-.L1382:
-	ldr	x1, [x5, #:lo12:.LANCHOR97]
+	b	.L1414
+.L1424:
+	ldr	x1, [x5, #:lo12:.LANCHOR100]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR98]
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1377
-	ldrb	w0, [x24, #:lo12:.LANCHOR73]
-	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	bne	.L1419
+	ldrb	w0, [x24, #:lo12:.LANCHOR76]
+	ldrh	w2, [x25, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1377:
+.L1419:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1378
-	cbnz	w0, .L1383
-.L1380:
+	bls	.L1420
+	cbnz	w0, .L1425
+.L1422:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1379
+	beq	.L1421
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1381
+	tbz	x0, 12, .L1423
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8154,47 +8404,31 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1381:
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+.L1423:
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1379
-.L1378:
-	cbz	w0, .L1380
-.L1379:
+	b	.L1421
+.L1420:
+	cbz	w0, .L1422
+.L1421:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1376
-.L1383:
+	b	.L1418
+.L1425:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1379
+	b	.L1421
 	.size	pm_free_sblk, .-pm_free_sblk
-	.section	.text.idb_init,"ax",@progbits
-	.align	2
-	.global	idb_init
-	.type	idb_init, %function
-idb_init:
-	stp	x29, x30, [sp, -16]!
-	mov	w2, 262144
-	mov	w1, 0
-	adrp	x0, idb_buf
-	add	x29, sp, 0
-	add	x0, x0, :lo12:idb_buf
-	bl	ftl_memset
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
@@ -8213,14 +8447,14 @@ flash_info_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1392
-	adrp	x2, .LANCHOR143
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR143
-	mov	w1, 100
-	add	x0, x0, :lo12:.LC84
+	tbz	x0, 12, .L1432
+	adrp	x2, .LANCHOR148
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR148
+	mov	w1, 105
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1392:
+.L1432:
 	adrp	x19, .LANCHOR26
 	mov	w2, 2048
 	mov	w1, 0
@@ -8242,9 +8476,9 @@ flash_info_data_init:
 	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR34
+	adrp	x1, .LANCHOR30
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR30
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_info_data_init, .-flash_info_data_init
@@ -8254,15 +8488,15 @@ flash_info_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1398:
+.L1438:
 	cmp	w2, w3
-	bhi	.L1399
+	bhi	.L1439
 	ret
-.L1399:
+.L1439:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1398
+	b	.L1438
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8303,14 +8537,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1404
-	adrp	x1, .LANCHOR144
-	adrp	x0, .LC85
+	tbz	x0, 12, .L1444
+	adrp	x1, .LANCHOR149
+	adrp	x0, .LC87
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR144
-	add	x0, x0, :lo12:.LC85
+	add	x1, x1, :lo12:.LANCHOR149
+	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1404:
+.L1444:
 	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -8321,22 +8555,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1405
+	bne	.L1445
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1405:
+.L1445:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1406
+	bne	.L1446
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1406:
+.L1446:
 	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR44
-	bne	.L1407
+	bne	.L1447
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x29, 56]
@@ -8361,17 +8595,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1409
+	tbz	x0, 12, .L1449
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1422:
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+.L1462:
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	printf
-.L1409:
+.L1449:
 	adrp	x0, .LANCHOR45
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR45]
@@ -8380,17 +8614,17 @@ nandc_init:
 	adrp	x0, .LANCHOR43
 	strb	wzr, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1403
+	tbz	x0, 12, .L1443
 	ldrb	w1, [x20, #:lo12:.LANCHOR27]
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
 	bl	printf
-.L1403:
+.L1443:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1407:
+.L1447:
 	strb	wzr, [x0, #:lo12:.LANCHOR44]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
@@ -8418,14 +8652,14 @@ nandc_init:
 	adrp	x1, .LANCHOR46
 	str	x0, [x1, #:lo12:.LANCHOR46]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1409
+	tbz	x0, 12, .L1449
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1422
+	b	.L1462
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8433,16 +8667,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR49
+	add	x19, x0, :lo12:.LANCHOR50
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR121
-	add	x22, x22, :lo12:.LANCHOR121
+	adrp	x22, .LANCHOR123
+	add	x22, x22, :lo12:.LANCHOR123
 	mov	w21, 0
-.L1424:
+.L1464:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8460,15 +8694,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1424
-	add	x0, x20, :lo12:.LANCHOR49
+	bne	.L1464
+	add	x0, x20, :lo12:.LANCHOR50
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR50
-	strb	wzr, [x0, #:lo12:.LANCHOR50]
 	adrp	x0, .LANCHOR51
+	strb	wzr, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR52
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR51]
+	strb	w21, [x0, #:lo12:.LANCHOR52]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -8479,91 +8713,91 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR74
 	mov	w2, 328
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR145
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR150
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR62
-	strb	wzr, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR146
-	add	x19, x20, :lo12:.LANCHOR62
-	str	wzr, [x0, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR82
-	strh	wzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x20, .LANCHOR63
+	strb	wzr, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR151
+	add	x19, x20, :lo12:.LANCHOR63
+	str	wzr, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR80
-	adrp	x4, .LANCHOR89
-	adrp	x20, .LANCHOR72
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	strh	w0, [x20, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR83
+	adrp	x4, .LANCHOR92
+	adrp	x20, .LANCHOR75
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR81
+	adrp	x2, .LANCHOR84
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR73
-	strh	wzr, [x2, #:lo12:.LANCHOR81]
-	adrp	x2, .LANCHOR77
-	ldrb	w3, [x19, #:lo12:.LANCHOR73]
-	strh	wzr, [x2, #:lo12:.LANCHOR77]
-	adrp	x2, .LANCHOR78
-	strh	wzr, [x2, #:lo12:.LANCHOR78]
+	adrp	x19, .LANCHOR76
+	strh	wzr, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR80
+	ldrb	w3, [x19, #:lo12:.LANCHOR76]
+	strh	wzr, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR81
+	strh	wzr, [x2, #:lo12:.LANCHOR81]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR89]
-	adrp	x4, .LANCHOR86
-	strh	w2, [x4, #:lo12:.LANCHOR86]
-	adrp	x2, .LANCHOR79
-	strh	w1, [x2, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR61
-	strh	w0, [x1, #:lo12:.LANCHOR61]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	strh	w5, [x4, #:lo12:.LANCHOR92]
+	adrp	x4, .LANCHOR89
+	strh	w2, [x4, #:lo12:.LANCHOR89]
+	adrp	x2, .LANCHOR82
+	strh	w1, [x2, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR62
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR147
-	str	x0, [x1, #:lo12:.LANCHOR147]
-	ldrb	w1, [x19, #:lo12:.LANCHOR73]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR152
+	str	x0, [x1, #:lo12:.LANCHOR152]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR148
-	str	x0, [x1, #:lo12:.LANCHOR148]
-	ldrh	w1, [x20, #:lo12:.LANCHOR72]
-	ldrb	w0, [x19, #:lo12:.LANCHOR73]
+	adrp	x1, .LANCHOR153
+	str	x0, [x1, #:lo12:.LANCHOR153]
+	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR69
-	str	x0, [x1, #:lo12:.LANCHOR69]
-	ldrb	w1, [x19, #:lo12:.LANCHOR73]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR72
+	str	x0, [x1, #:lo12:.LANCHOR72]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR65
-	str	x0, [x1, #:lo12:.LANCHOR65]
-	ldrb	w1, [x19, #:lo12:.LANCHOR73]
-	ldrh	w0, [x20, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR66
+	str	x0, [x1, #:lo12:.LANCHOR66]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR149
+	adrp	x1, .LANCHOR154
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR149]
-	adrp	x0, .LANCHOR84
-	adrp	x1, .LANCHOR74
+	str	x0, [x1, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR87
+	adrp	x1, .LANCHOR77
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR74]
+	strh	w0, [x1, #:lo12:.LANCHOR77]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -8582,18 +8816,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1431:
+.L1471:
 	cmp	w1, w3
-	bhi	.L1432
+	bhi	.L1472
 	ret
-.L1432:
+.L1472:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1431
+	b	.L1471
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8630,8 +8864,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR58
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -8642,592 +8876,634 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC89
+	adrp	x21, .LC91
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC88
+	adrp	x23, .LC90
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC88
-	add	x21, x21, :lo12:.LC89
+	add	x23, x23, :lo12:.LC90
+	add	x21, x21, :lo12:.LC91
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC90
-.L1439:
+	adrp	x27, .LC92
+.L1479:
 	cmp	x25, x19
-	bne	.L1445
+	bne	.L1485
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC90
+	adrp	x1, .LC92
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC90
+	add	x1, x1, :lo12:.LC92
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC91
+	adrp	x0, .LC93
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC91
+	add	x0, x0, :lo12:.LC93
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1445:
-	cbnz	w20, .L1440
+.L1485:
+	cbnz	w20, .L1480
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1440:
+.L1480:
 	cmp	w24, 4
-	bne	.L1441
+	bne	.L1481
 	ldr	w1, [x22, x19, lsl 2]
-.L1447:
+.L1487:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1444
+	bls	.L1484
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC90
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	add	x1, x27, :lo12:.LC92
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1444:
+.L1484:
 	add	x19, x19, 1
-	b	.L1439
-.L1441:
+	b	.L1479
+.L1481:
 	cmp	w24, 2
-	bne	.L1443
+	bne	.L1483
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1447
-.L1443:
+	b	.L1487
+.L1483:
 	ldrb	w1, [x22, x19]
-	b	.L1447
+	b	.L1487
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
 	.global	hynix_get_read_retry_default
 	.type	hynix_get_read_retry_default, %function
 hynix_get_read_retry_default:
-	stp	x29, x30, [sp, -144]!
+	stp	x29, x30, [sp, -96]!
+	mov	w8, w0
+	adrp	x0, .LANCHOR26
 	mov	w2, -83
-	mov	w1, -82
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR26
+	ldr	x7, [x0, #:lo12:.LANCHOR26]
+	mov	w0, -84
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR26]
+	mov	w1, -82
+	stp	x21, x22, [sp, 32]
+	add	x6, x7, 128
 	stp	x23, x24, [sp, 48]
-	add	x0, x28, 112
-	str	x0, [x29, 112]
-	ldrb	w0, [x29, 140]
-	add	x22, x28, 128
+	add	x12, x7, 112
 	stp	x25, x26, [sp, 64]
-	strb	w0, [x28, 112]
-	mov	w0, -84
-	ldr	w3, [x29, 140]
-	strb	w0, [x28, 128]
+	cmp	w8, 2
+	str	x27, [sp, 80]
+	strb	w0, [x7, 128]
 	mov	w0, -81
-	strb	w2, [x28, 129]
-	cmp	w3, 2
-	strb	w1, [x28, 130]
-	strb	w0, [x28, 131]
-	bne	.L1449
+	strb	w8, [x7, 112]
+	strb	w2, [x7, 129]
+	strb	w1, [x7, 130]
+	strb	w0, [x7, 131]
+	bne	.L1489
 	mov	w0, -89
-	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR150+17
+	strb	w0, [x12, 16]
+	adrp	x0, .LANCHOR155+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR150+17]
-.L1504:
-	mov	w0, 7
-	b	.L1539
-.L1449:
-	ldr	w3, [x29, 140]
-	cmp	w3, 3
-	bne	.L1451
-	mov	x7, 0
-.L1452:
-	sub	w0, w7, #80
-	strb	w0, [x22, x7]
-	add	x7, x7, 1
-	cmp	x7, 8
-	bne	.L1452
-	stp	w7, w7, [x29, 132]
-.L1450:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
+	strb	w1, [x0, #:lo12:.LANCHOR155+17]
+.L1553:
+	mov	w23, 7
+	b	.L1596
+.L1489:
+	cmp	w8, 3
+	bne	.L1491
+	mov	x10, 0
+.L1492:
+	sub	w0, w10, #80
+	strb	w0, [x6, x10]
+	add	x10, x10, 1
+	cmp	x10, 8
+	bne	.L1492
+	mov	w23, w10
+.L1490:
+	sub	w0, w8, #1
 	cmp	w0, 1
-	bhi	.L1457
-	adrp	x6, .LANCHOR18
+	bhi	.L1498
+	adrp	x7, .LANCHOR18
 	adrp	x8, .LANCHOR29
-	add	x24, x6, :lo12:.LANCHOR18
-	add	x25, x8, :lo12:.LANCHOR29
-	mov	w20, 0
-	mov	w26, 55
-.L1458:
-	ldrb	w0, [x24]
-	cmp	w0, w20
-	bhi	.L1464
-.L1465:
-	ldr	x0, [x29, 112]
-	ldrb	w1, [x29, 136]
-	strb	w1, [x0, 1]
-	ldrb	w1, [x29, 132]
-	strb	w1, [x0, 2]
+	add	x7, x7, :lo12:.LANCHOR18
+	add	x8, x8, :lo12:.LANCHOR29
+	mov	w5, 0
+	mov	w11, 55
+.L1499:
+	ldrb	w0, [x7]
+	cmp	w0, w5
+	bhi	.L1505
+.L1506:
+	strb	w10, [x12, 1]
+	strb	w23, [x12, 2]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1451:
-	ldr	w3, [x29, 140]
-	cmp	w3, 4
-	bne	.L1453
+.L1491:
+	cmp	w8, 4
+	bne	.L1493
 	mov	w3, -52
-	strb	w3, [x28, 128]
+	strb	w3, [x7, 128]
 	mov	w3, -65
-	strb	w3, [x28, 129]
+	strb	w3, [x7, 129]
 	mov	w3, -86
-	strb	w3, [x28, 130]
+	strb	w3, [x7, 130]
 	mov	w3, -85
-	strb	w0, [x28, 135]
-	strb	w3, [x28, 131]
-	mov	w0, 8
+	mov	w23, 8
+	strb	w3, [x7, 131]
+	mov	w10, w23
 	mov	w3, -51
-	strb	w2, [x28, 133]
-	strb	w3, [x28, 132]
-	strb	w1, [x28, 134]
-	str	w0, [x29, 132]
-.L1540:
-	str	w0, [x29, 136]
-	b	.L1450
-.L1453:
-	ldr	w0, [x29, 140]
-	cmp	w0, 5
-	bne	.L1454
+	strb	w2, [x7, 133]
+	strb	w3, [x7, 132]
+	strb	w1, [x7, 134]
+	strb	w0, [x7, 135]
+	b	.L1490
+.L1493:
+	cmp	w8, 5
+	bne	.L1494
 	mov	w0, 56
-	strb	w0, [x28, 128]
+	strb	w0, [x7, 128]
 	mov	w0, 57
-	strb	w0, [x28, 129]
+	strb	w0, [x7, 129]
 	mov	w0, 58
-	strb	w0, [x28, 130]
+	mov	w23, 8
+	strb	w0, [x7, 130]
 	mov	w0, 59
-	strb	w0, [x28, 131]
-	mov	w0, 8
-.L1539:
-	str	w0, [x29, 132]
-	mov	w0, 4
-	b	.L1540
-.L1454:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	bne	.L1455
+	strb	w0, [x7, 131]
+.L1596:
+	mov	w10, 4
+	b	.L1490
+.L1494:
+	cmp	w8, 6
+	bne	.L1495
 	mov	w0, 14
-	strb	w0, [x28, 128]
+	strb	w0, [x7, 128]
 	mov	w0, 15
-	strb	w0, [x28, 129]
+	strb	w0, [x7, 129]
 	mov	w0, 16
-	strb	w0, [x28, 130]
+	mov	w23, 12
+	strb	w0, [x7, 130]
 	mov	w0, 17
-	strb	w0, [x28, 131]
-	mov	w0, 12
-	b	.L1539
-.L1455:
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
-	bne	.L1504
+	strb	w0, [x7, 131]
+	b	.L1596
+.L1495:
+	cmp	w8, 7
+	bne	.L1496
 	mov	x0, 0
-.L1456:
+.L1497:
 	sub	w1, w0, #80
-	strb	w1, [x22, x0]
+	strb	w1, [x6, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1456
+	bne	.L1497
 	mov	w0, -44
-	strb	w0, [x28, 136]
+	mov	w23, 12
+	strb	w0, [x7, 136]
+	mov	w10, 10
 	mov	w0, -43
-	strb	w0, [x28, 137]
-	mov	w0, 12
-	str	w0, [x29, 132]
+	strb	w0, [x7, 137]
+	b	.L1490
+.L1496:
+	cmp	w8, 8
+	bne	.L1553
+	mov	w0, 6
+	strb	w0, [x7, 128]
+	mov	w0, 7
+	strb	w0, [x7, 129]
+	mov	w0, 9
+	strb	w8, [x7, 130]
+	strb	w0, [x7, 131]
+	mov	w23, 50
 	mov	w0, 10
-	b	.L1540
-.L1464:
-	ldrb	w0, [x25, w20, sxtw]
+	mov	w10, 5
+	strb	w0, [x7, 132]
+	b	.L1490
+.L1505:
+	ldrb	w0, [x8, w5, sxtw]
 	mov	x1, 32
 	mov	w2, 160
-	mov	x21, 0
+	mov	x3, 0
 	umaddl	x2, w2, w0, x1
-	ldr	x1, [x29, 112]
-	ubfiz	x0, x0, 8, 8
-	add	x19, x1, x2
 	adrp	x1, .LANCHOR13
+	ubfiz	x0, x0, 8, 8
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
-	add	x23, x4, x0
-.L1459:
-	str	w26, [x23, 2056]
-	ldrb	w0, [x22, x21]
-	str	w0, [x23, 2052]
+	add	x2, x12, x2
+	add	x4, x4, x0
+.L1500:
+	str	w11, [x4, 2056]
+	ldrb	w0, [x6, x3]
+	str	w0, [x4, 2052]
 	mov	w0, 80
 	bl	timer_delay_ns
-	ldr	w0, [x23, 2048]
-	strb	w0, [x19, x21]
-	add	x21, x21, 1
-	ldr	w0, [x29, 136]
-	cmp	w0, w21, uxtb
-	bhi	.L1459
-	adrp	x3, .LANCHOR150
-	add	x3, x3, :lo12:.LANCHOR150
+	ldr	w0, [x4, 2048]
+	strb	w0, [x2, x3]
+	add	x3, x3, 1
+	cmp	w10, w3, uxtb
+	bhi	.L1500
+	adrp	x3, .LANCHOR155
+	add	x3, x3, :lo12:.LANCHOR155
 	mov	x0, 0
-.L1462:
-	add	x15, x19, x0
-	add	x14, x3, x0
+.L1503:
+	add	x14, x2, x0
+	add	x13, x3, x0
 	mov	x1, 1
-.L1461:
+.L1502:
 	lsl	x4, x1, 2
-	lsl	x16, x1, 3
-	ldrb	w17, [x19, x0]
+	lsl	x15, x1, 3
+	ldrb	w16, [x2, x0]
 	add	x1, x1, 1
 	cmp	x1, 7
-	ldrb	w4, [x14, x4]
-	add	w4, w4, w17
-	strb	w4, [x15, x16]
-	bne	.L1461
+	ldrb	w4, [x13, x4]
+	add	w4, w4, w16
+	strb	w4, [x14, x15]
+	bne	.L1502
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1462
-	add	w5, w20, 1
-	strb	wzr, [x19, 16]
-	strb	wzr, [x19, 24]
-	and	w20, w5, 255
-	strb	wzr, [x19, 32]
-	strb	wzr, [x19, 40]
-	strb	wzr, [x19, 48]
-	strb	wzr, [x19, 41]
-	strb	wzr, [x19, 49]
-	b	.L1458
-.L1457:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #3
-	cmp	w0, 4
-	bhi	.L1465
-	ldp	w0, w1, [x29, 132]
+	bne	.L1503
+	add	w5, w5, 1
+	strb	wzr, [x2, 16]
+	strb	wzr, [x2, 24]
+	and	w5, w5, 255
+	strb	wzr, [x2, 32]
+	strb	wzr, [x2, 40]
+	strb	wzr, [x2, 48]
+	strb	wzr, [x2, 41]
+	strb	wzr, [x2, 49]
+	b	.L1499
+.L1498:
+	sub	w0, w8, #3
+	cmp	w0, 5
+	bhi	.L1506
+	mul	w15, w23, w10
+	sub	w13, w10, #1
+	and	x13, x13, 255
 	adrp	x19, .LANCHOR18
+	sub	w20, w8, #5
 	add	x19, x19, :lo12:.LANCHOR18
-	sub	w13, w1, #1
-	mul	w15, w0, w1
-	and	x13, x13, 255
-	asr	w0, w15, 2
-	stp	w0, wzr, [x29, 124]
-	lsl	w0, w15, 4
-	str	w0, [x29, 120]
-	ldr	w0, [x29, 124]
-	lsl	w22, w0, 1
-	sbfiz	x21, x0, 2, 32
-	ldr	w0, [x29, 140]
-	sub	w20, w0, #5
-	add	x0, x13, 1
-	str	x0, [x29, 96]
-.L1466:
+	asr	w14, w15, 1
+	add	x13, x13, 1
+	lsl	w15, w15, 4
+	lsl	w22, w14, 1
+	sbfiz	x21, x14, 1, 32
+	mov	w11, 0
+.L1507:
 	ldrb	w0, [x19]
-	ldr	w1, [x29, 128]
-	cmp	w0, w1
-	bls	.L1465
-	ldr	w1, [x29, 128]
+	cmp	w0, w11
+	bls	.L1506
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w23, [x0, w1, sxtw]
-	mov	w0, w23
+	ldrb	w24, [x0, w11, sxtw]
+	mov	w0, w24
 	bl	zftl_flash_exit_slc_mode
-	mov	x0, 32
-	mov	w5, 160
-	umaddl	x5, w5, w23, x0
-	ldr	x0, [x29, 112]
-	ubfiz	x23, x23, 8, 8
-	add	x0, x0, x5
-	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR13
+	mov	x5, 32
+	mov	w1, 160
+	mov	w6, 255
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	add	x27, x4, x23
-	mov	w23, 255
-	str	w23, [x27, 2056]
+	nop // between mem op and mult-accumulate
+	umaddl	x1, w1, w24, x5
+	ubfiz	x24, x24, 8, 8
+	add	x4, x4, x24
+	add	x5, x12, x1
+	str	w6, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldr	w0, [x29, 140]
-	cmp	w0, 4
-	bne	.L1467
-	mov	w0, 64
-	str	w23, [x27, 2052]
-	str	w0, [x27, 2048]
-	mov	w0, 204
-.L1541:
-	str	w0, [x27, 2052]
-	mov	w0, 77
-	b	.L1542
-.L1467:
-	cmp	w20, 1
-	bhi	.L1469
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	mov	w0, 82
-.L1542:
-	str	w0, [x27, 2048]
-	mov	w0, 22
-	str	w0, [x27, 2056]
+	cmp	w8, 8
+	bne	.L1508
+	mov	w0, 120
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
 	mov	w0, 23
-	str	w0, [x27, 2056]
+	str	wzr, [x4, 2052]
+	mov	w1, 25
+	str	wzr, [x4, 2052]
+	add	x5, x7, 144
+	str	w0, [x4, 2056]
 	mov	w0, 4
-	str	w0, [x27, 2056]
-	mov	w0, 25
-	str	w0, [x27, 2056]
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	ldr	w0, [x29, 140]
-	str	wzr, [x27, 2052]
-	cmp	w0, 6
-	bne	.L1470
-	mov	w0, 31
-	str	w0, [x27, 2052]
-.L1471:
-	mov	w23, 2
-	str	w23, [x27, 2052]
-	str	wzr, [x27, 2052]
+	str	w0, [x4, 2056]
+	str	w1, [x4, 2056]
+	mov	w1, 218
+	str	w1, [x4, 2056]
+	mov	w1, 21
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w1, [x4, 2052]
+.L1599:
+	str	w0, [x4, 2052]
 	mov	w0, 48
-	str	w0, [x27, 2056]
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1505
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
+	ccmp	w8, 8, 4, hi
+	beq	.L1554
+	cmp	w8, 7
 	mov	w0, 32
-	csel	w23, w23, w0, ne
-.L1472:
-	adrp	x3, .LANCHOR151
-	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR151]
-.L1473:
-	ldr	w2, [x27, 2048]
-	strb	w2, [x0, x1]
-	add	x1, x1, 1
-	cmp	w23, w1, uxtb
-	bhi	.L1473
-	ldr	w1, [x29, 140]
-	cmp	w1, 7
-	bne	.L1474
+	mov	w1, 2
+	csel	w1, w1, w0, ne
+.L1515:
+	adrp	x6, .LANCHOR156
+	mov	x2, 0
+	ldr	x0, [x6, #:lo12:.LANCHOR156]
+.L1516:
+	ldr	w3, [x4, 2048]
+	strb	w3, [x0, x2]
+	add	x2, x2, 1
+	cmp	w1, w2, uxtb
+	bhi	.L1516
+	cmp	w8, 8
+	bne	.L1517
 	mov	w1, 0
-.L1476:
+.L1519:
 	ldrb	w2, [x0]
-	cmp	w2, 12
-	beq	.L1475
+	cmp	w2, 50
+	beq	.L1518
 	ldrb	w2, [x0, 1]
-	cmp	w2, 10
-	beq	.L1475
+	cmp	w2, 5
+	beq	.L1518
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1476
-.L1477:
-	adrp	x0, .LC92
+	bne	.L1519
+.L1520:
+	adrp	x0, .LC94
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1479:
-	b	.L1479
-.L1469:
+.L1522:
+	b	.L1522
+.L1508:
+	mov	w0, 54
+	str	w0, [x4, 2056]
+	cmp	w8, 4
+	bne	.L1510
+	mov	w0, 64
+	str	w6, [x4, 2052]
+	str	w0, [x4, 2048]
+	mov	w0, 204
+.L1597:
+	str	w0, [x4, 2052]
+	mov	w0, 77
+	b	.L1598
+.L1510:
+	cmp	w20, 1
+	bhi	.L1512
+	ldrb	w0, [x7, 128]
+	str	w0, [x4, 2052]
+	mov	w0, 82
+.L1598:
+	str	w0, [x4, 2048]
+.L1511:
+	mov	w0, 22
+	str	w0, [x4, 2056]
+	mov	w0, 23
+	str	w0, [x4, 2056]
+	mov	w0, 4
+	str	w0, [x4, 2056]
+	mov	w0, 25
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2056]
+	cmp	w8, 6
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	bne	.L1513
+	mov	w0, 31
+	str	w0, [x4, 2052]
+.L1514:
+	mov	w0, 2
+	b	.L1599
+.L1512:
+	cmp	w8, 7
+	bne	.L1511
 	mov	w0, 174
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
+	str	w0, [x4, 2052]
+	str	wzr, [x4, 2048]
 	mov	w0, 176
-	b	.L1541
-.L1470:
-	str	wzr, [x27, 2052]
-	b	.L1471
-.L1505:
-	mov	w23, 16
-	b	.L1472
-.L1475:
+	b	.L1597
+.L1513:
+	str	wzr, [x4, 2052]
+	b	.L1514
+.L1554:
+	mov	w1, 16
+	b	.L1515
+.L1518:
 	cmp	w1, 6
-	bhi	.L1477
-.L1478:
-	ldr	x2, [x3, #:lo12:.LANCHOR151]
+	bhi	.L1520
+.L1521:
+	ldr	x3, [x6, #:lo12:.LANCHOR156]
 	mov	x0, 0
-.L1483:
-	ldr	w1, [x29, 120]
-	cmp	w1, w0
-	bgt	.L1484
-	ldr	x1, [x3, #:lo12:.LANCHOR151]
-	mov	w16, 8
-	add	x3, x1, x21
-.L1486:
+.L1531:
+	cmp	w15, w0
+	bgt	.L1532
+	ldr	x1, [x6, #:lo12:.LANCHOR156]
+	mov	w6, 8
+	add	x2, x1, x21
+.L1534:
 	mov	x0, 0
-.L1485:
-	ldr	w17, [x3, x0, lsl 2]
-	ldr	w4, [x29, 124]
-	mvn	w17, w17
-	str	w17, [x3, x0, lsl 2]
+.L1533:
+	ldrh	w16, [x2, x0, lsl 1]
+	mvn	w16, w16
+	strh	w16, [x2, x0, lsl 1]
 	add	x0, x0, 1
-	cmp	w4, w0
-	bgt	.L1485
-	add	x3, x3, x22, uxtw 2
-	subs	w16, w16, #1
-	bne	.L1486
-	mov	x17, x1
-	mov	w23, 0
+	cmp	w14, w0
+	bgt	.L1533
+	add	x2, x2, x22, uxtw 1
+	subs	w6, w6, #1
+	bne	.L1534
+	mov	x6, x1
+	mov	w16, 0
 	mov	w26, 1
-.L1487:
-	mov	w3, 0
+.L1535:
 	mov	w0, 0
-.L1491:
-	mov	x25, x17
-	lsl	w16, w26, w0
+	mov	w2, 0
+.L1539:
+	mov	x30, x6
+	lsl	w25, w26, w2
 	mov	w24, 16
-	mov	w30, 0
-.L1489:
-	ldr	w4, [x25]
-	add	x25, x25, x21
-	bics	wzr, w16, w4
-	cinc	w30, w30, eq
+	mov	w17, 0
+.L1537:
+	ldrh	w27, [x30]
+	add	x30, x30, x21
+	bics	wzr, w25, w27
+	cinc	w17, w17, eq
 	subs	w24, w24, #1
-	bne	.L1489
-	cmp	w30, 9
-	orr	w16, w3, w16
-	add	w0, w0, 1
-	csel	w3, w16, w3, cs
-	cmp	w0, 32
-	bne	.L1491
-	ldr	w0, [x29, 124]
-	add	w23, w23, 1
-	str	w3, [x17], 4
-	cmp	w0, w23
-	bgt	.L1487
+	bne	.L1537
+	cmp	w17, 8
+	bls	.L1538
+	orr	w0, w0, w25
+	and	w0, w0, 65535
+.L1538:
+	add	w2, w2, 1
+	cmp	w2, 16
+	bne	.L1539
+	strh	w0, [x6], 2
+	add	w16, w16, 1
+	cmp	w14, w16
+	bgt	.L1535
 	mov	x0, 0
-	mov	w3, 0
-.L1494:
-	ldr	w16, [x1, x0]
+	mov	w2, 0
+.L1542:
+	ldr	w6, [x1, x0]
 	add	x0, x0, 4
-	cmp	w16, 0
-	cinc	w3, w3, eq
+	cmp	w6, 0
+	cinc	w2, w2, eq
 	cmp	x0, 32
-	bne	.L1494
-	cmp	w3, 7
-	ble	.L1495
+	bne	.L1542
+	cmp	w2, 7
+	ble	.L1543
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
 	bl	rknand_print_hex
-	adrp	x0, .LC92
+	adrp	x0, .LC94
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1496:
-	b	.L1496
-.L1474:
-	ldr	w1, [x29, 140]
+.L1544:
+	b	.L1544
+.L1517:
+	cmp	w8, 7
+	bne	.L1523
+	mov	w1, 0
+.L1525:
+	ldrb	w2, [x0]
+	cmp	w2, 12
+	beq	.L1524
+	ldrb	w2, [x0, 1]
+	cmp	w2, 10
+	beq	.L1524
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1525
+.L1526:
+	adrp	x0, .LC94
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC94
+	bl	printf
+.L1527:
+	b	.L1527
+.L1524:
 	cmp	w1, 6
-	bne	.L1478
+	bls	.L1521
+	b	.L1526
+.L1523:
+	cmp	w8, 6
+	bne	.L1521
 	mov	x1, 0
-.L1480:
+.L1528:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1478
+	beq	.L1521
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1478
+	beq	.L1521
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1480
-	adrp	x0, .LC92
+	bne	.L1528
+	adrp	x0, .LC94
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC92
+	add	x0, x0, :lo12:.LC94
 	bl	printf
-.L1482:
-	b	.L1482
-.L1484:
-	ldr	w1, [x27, 2048]
-	strb	w1, [x2, x0]
+.L1530:
+	b	.L1530
+.L1532:
+	ldr	w1, [x4, 2048]
+	strb	w1, [x3, x0]
 	add	x0, x0, 1
-	b	.L1483
-.L1495:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	beq	.L1507
-	cmp	w0, 7
-	mov	x1, 10
+	b	.L1531
+.L1543:
+	cmp	w8, 6
+	beq	.L1556
+	cmp	w8, 7
+	beq	.L1557
+	cmp	w8, 8
+	mov	x1, 5
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1497:
-	ldr	x5, [x29, 104]
-	mov	w3, 0
-.L1498:
-	mov	x1, 0
-.L1499:
-	ldrb	w16, [x2, x1]
-	ldr	w4, [x29, 136]
-	strb	w16, [x5, x1]
-	add	x1, x1, 1
-	cmp	w4, w1, uxtb
-	bhi	.L1499
-	ldr	x1, [x29, 96]
-	add	w3, w3, 1
-	add	x5, x5, x0
-	add	x2, x2, x1
-	ldr	w1, [x29, 132]
-	cmp	w1, w3
-	bgt	.L1498
-	mov	w23, 255
-	str	w23, [x27, 2056]
+.L1545:
+	mov	x1, x5
+	mov	w5, 0
+.L1546:
+	mov	x2, 0
+.L1547:
+	ldrb	w6, [x3, x2]
+	strb	w6, [x1, x2]
+	add	x2, x2, 1
+	cmp	w10, w2, uxtb
+	bhi	.L1547
+	add	w5, w5, 1
+	add	x3, x3, x13
+	add	x1, x1, x0
+	cmp	w23, w5
+	bgt	.L1546
+	mov	w5, 255
+	str	w5, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1501
+	bhi	.L1549
 	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
+	str	w0, [x4, 2056]
+	ldrb	w0, [x7, 128]
+	str	w0, [x4, 2052]
+	str	wzr, [x4, 2048]
 	mov	w0, 22
-	str	w0, [x27, 2056]
+	str	w0, [x4, 2056]
 	mov	w0, 48
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	str	wzr, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-.L1543:
-	str	w0, [x27, 2056]
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w5, [x4, 2052]
+	str	w5, [x4, 2052]
+	str	w5, [x4, 2052]
+.L1600:
+	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
-	ldr	w0, [x29, 128]
-	add	w11, w0, 1
-	and	w0, w11, 255
-	str	w0, [x29, 128]
-	b	.L1466
-.L1507:
+	add	w11, w11, 1
+	and	w11, w11, 255
+	b	.L1507
+.L1556:
 	mov	x0, 4
-	b	.L1497
-.L1501:
+	b	.L1545
+.L1557:
+	mov	x0, 10
+	b	.L1545
+.L1549:
+	cmp	w8, 8
+	bne	.L1551
+	mov	w0, 190
+	b	.L1600
+.L1551:
 	mov	w0, 56
-	b	.L1543
+	b	.L1600
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR34+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR34+19]
+	adrp	x0, .LANCHOR30+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
-	cmp	w1, 6
-	bhi	.L1544
+	cmp	w1, 7
+	bhi	.L1601
 	b	hynix_get_read_retry_default
-.L1544:
+.L1601:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9236,7 +9512,7 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR157
 	adrp	x1, .LANCHOR27
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -9245,28 +9521,28 @@ nandc_xfer_done:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR152]
-	bne	.L1547
+	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	bne	.L1604
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1548
-	adrp	x22, .LC97
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC96
-.L1549:
+	tbnz	x0, 1, .L1605
+	adrp	x22, .LC99
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC99
+	add	x23, x23, :lo12:.LC98
+.L1606:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1552
+	tbnz	x0, 20, .L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1549
+	bne	.L1606
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -9278,39 +9554,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1549
-.L1548:
-	adrp	x22, .LC95
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC95
-	add	x23, x23, :lo12:.LC96
-.L1550:
+	b	.L1606
+.L1605:
+	adrp	x22, .LC97
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC98
+.L1607:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1552
+	bge	.L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1551
+	tbz	x0, 13, .L1608
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1551
+	tbz	x0, 17, .L1608
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
 	ubfx	x1, x1, 17, 1
-.L1584:
+.L1641:
 	bl	printf
-	b	.L1552
-.L1551:
+	b	.L1609
+.L1608:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1550
+	bne	.L1607
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9324,10 +9600,10 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1550
+	tbz	x0, 13, .L1607
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1552:
+	strb	w0, [x24, #:lo12:.LANCHOR157]
+.L1609:
 	adrp	x0, .LANCHOR46+32
 	ldp	x19, x20, [sp, 16]
 	str	wzr, [x0, #:lo12:.LANCHOR46+32]
@@ -9335,26 +9611,26 @@ nandc_xfer_done:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1547:
+.L1604:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1558
-	adrp	x22, .LC97
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC97
-	add	x23, x23, :lo12:.LC96
-.L1559:
+	tbnz	x0, 1, .L1615
+	adrp	x22, .LC99
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC99
+	add	x23, x23, :lo12:.LC98
+.L1616:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1552
+	tbnz	x0, 20, .L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1559
+	bne	.L1616
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -9366,34 +9642,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1559
-.L1558:
-	adrp	x22, .LC95
-	adrp	x23, .LC96
-	add	x22, x22, :lo12:.LC95
-	add	x23, x23, :lo12:.LC96
-.L1560:
+	b	.L1616
+.L1615:
+	adrp	x22, .LC97
+	adrp	x23, .LC98
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC98
+.L1617:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1552
+	bge	.L1609
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1561
+	tbz	x0, 13, .L1618
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1561
-	adrp	x0, .LC98
+	tbz	x0, 17, .L1618
+	adrp	x0, .LC100
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC98
-	b	.L1584
-.L1561:
+	add	x0, x0, :lo12:.LC100
+	b	.L1641
+.L1618:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1560
+	bne	.L1617
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9406,7 +9682,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1560
+	b	.L1617
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9427,20 +9703,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1604
+	cbnz	w22, .L1661
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1587
+	bne	.L1644
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1588:
+.L1645:
 	cmp	w2, w19
-	bcc	.L1592
+	bcc	.L1649
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9449,35 +9725,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1594
+	bne	.L1651
 	mov	w1, w19
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1594:
-	tbz	x19, 13, .L1595
-	adrp	x1, .LANCHOR152
-	ldrb	w1, [x1, #:lo12:.LANCHOR152]
-	cbz	w1, .L1595
+.L1651:
+	tbz	x19, 13, .L1652
+	adrp	x1, .LANCHOR157
+	ldrb	w1, [x1, #:lo12:.LANCHOR157]
+	cbz	w1, .L1652
 	mov	w1, w19
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1623:
+.L1680:
 	mov	w0, -1
-.L1586:
+.L1643:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1592:
+.L1649:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9488,30 +9764,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1606
+	tbnz	x1, 2, .L1663
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1606
+	tbnz	x1, 18, .L1663
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1590
+	ble	.L1647
 	ubfx	x1, x1, 3, 7
-.L1591:
+.L1648:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1589:
+.L1646:
 	add	w2, w2, 1
-	b	.L1588
-.L1590:
+	b	.L1645
+.L1647:
 	ubfx	x1, x1, 19, 7
-	b	.L1591
-.L1606:
+	b	.L1648
+.L1663:
 	mov	w0, -1
-	b	.L1589
-.L1587:
+	b	.L1646
+.L1644:
 	adrp	x0, .LANCHOR43
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -9523,34 +9799,34 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1597:
+.L1654:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1598
+	bcc	.L1655
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1599:
+.L1656:
 	cmp	w3, w19
-	bcc	.L1603
+	bcc	.L1660
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1595
+	bne	.L1652
 	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1623
-.L1598:
+	b	.L1680
+.L1655:
 	ldr	x7, [x6, #:lo12:.LANCHOR46]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -9567,16 +9843,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1597
-.L1603:
+	b	.L1654
+.L1660:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1609
+	tbnz	x1, 2, .L1666
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1609
+	tbnz	x1, 15, .L1666
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9589,42 +9865,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1601
+	bls	.L1658
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1622:
+.L1679:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1600:
+.L1657:
 	add	w3, w3, 1
-	b	.L1599
-.L1601:
+	b	.L1656
+.L1658:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1622
-.L1609:
+	b	.L1679
+.L1666:
 	mov	w0, -1
-	b	.L1600
-.L1595:
+	b	.L1657
+.L1652:
 	cmn	w0, #1
-	beq	.L1586
+	beq	.L1643
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1586
+	bne	.L1643
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1586
+	bne	.L1643
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1586
-.L1604:
+	b	.L1643
+.L1661:
 	mov	w0, 0
-	b	.L1586
+	b	.L1643
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9648,22 +9924,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1625
+	tbz	x0, 4, .L1682
 	mov	w3, w1
-	adrp	x0, .LC102
+	adrp	x0, .LC104
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC102
+	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1625:
+.L1682:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR16
-	cbnz	w23, .L1626
+	adrp	x7, .LANCHOR16
+	cbnz	w23, .L1683
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1627:
+.L1684:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9677,15 +9953,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR16]
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1629
-	cbz	w23, .L1629
+	bne	.L1686
+	cbz	w23, .L1686
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1638:
+.L1695:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9701,7 +9977,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9709,23 +9985,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1626:
-	ldr	x0, [x6, #:lo12:.LANCHOR16]
+.L1683:
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1628
+	bne	.L1685
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1627
-.L1628:
+	b	.L1684
+.L1685:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1627
-.L1629:
+	b	.L1684
+.L1686:
 	mov	w0, w20
-	b	.L1638
+	b	.L1695
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -9755,20 +10031,20 @@ micron_read_retrial:
 	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	asr	w20, w20, 2
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR154
-	add	x0, x0, :lo12:.LANCHOR154
+	adrp	x0, .LANCHOR159
+	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 104]
 	ldr	x0, [x29, 120]
 	add	x23, x0, x19, lsl 8
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1640:
+.L1697:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1645
-.L1644:
+	bcc	.L1702
+.L1701:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -9782,22 +10058,23 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1646
+	bcc	.L1703
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1646:
+.L1703:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1639
-	adrp	x0, .LC104
+	bne	.L1704
+	adrp	x0, .LC106
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC106
 	bl	printf
-.L1639:
+.L1704:
+	bl	nandc_wait_flash_ready
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9806,7 +10083,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1645:
+.L1702:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -9827,33 +10104,33 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1641
+	tbz	x0, 12, .L1698
 	mov	w4, w7
 	str	w7, [x29, 112]
 	mov	w3, w28
 	mov	w2, w22
 	mov	w1, w21
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1641:
+.L1698:
 	cmn	w7, #1
-	beq	.L1642
-	adrp	x0, .LANCHOR151
+	beq	.L1699
+	adrp	x0, .LANCHOR156
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x25, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x26, [x0, #:lo12:.LANCHOR153]
-	bcc	.L1648
-.L1642:
+	ldr	x25, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x26, [x0, #:lo12:.LANCHOR158]
+	bcc	.L1705
+.L1699:
 	mov	w21, w27
-	b	.L1640
-.L1648:
+	b	.L1697
+.L1705:
 	mov	w28, w7
-	b	.L1644
+	b	.L1701
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9894,17 +10171,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR23
-	cbnz	w4, .L1663
+	cbnz	w4, .L1720
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1670:
+.L1727:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1664
+	bne	.L1721
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9912,7 +10189,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1665:
+.L1722:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9922,60 +10199,60 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1666
+	tbz	x0, 4, .L1723
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1666:
+.L1723:
 	cmn	w4, #1
-	beq	.L1667
-	adrp	x0, .LANCHOR151
+	beq	.L1724
+	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	ldr	x26, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x27, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1685
-.L1667:
+	bcc	.L1742
+.L1724:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1670
-.L1669:
+	bne	.L1727
+.L1726:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1671
+	bne	.L1728
 	mov	w2, 0
-.L1708:
+.L1765:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1672
-.L1664:
+	b	.L1729
+.L1721:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1665
-.L1685:
+	b	.L1722
+.L1742:
 	mov	w19, w4
-	b	.L1669
-.L1671:
+	b	.L1726
+.L1728:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1672:
+.L1729:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1681
+	bne	.L1738
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9984,27 +10261,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1681:
+.L1738:
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1682
+	bcc	.L1739
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1682:
+.L1739:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1683
-	adrp	x0, .LC107
+	bne	.L1740
+	adrp	x0, .LC109
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1683:
+.L1740:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -10014,23 +10291,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1663:
+.L1720:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1679:
+.L1736:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1673
+	bne	.L1730
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1707:
+.L1764:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10042,54 +10319,54 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1675
+	tbz	x0, 4, .L1732
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1675:
+.L1732:
 	cmn	w4, #1
-	beq	.L1676
-	adrp	x0, .LANCHOR151
+	beq	.L1733
+	adrp	x0, .LANCHOR156
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	ldr	x26, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x27, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1686
-.L1676:
+	bcc	.L1743
+.L1733:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1679
-.L1678:
+	bne	.L1736
+.L1735:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1680
+	bne	.L1737
 	mov	w2, 1
-	b	.L1708
-.L1673:
+	b	.L1765
+.L1730:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1707
-.L1686:
+	b	.L1764
+.L1743:
 	mov	w19, w4
-	b	.L1678
-.L1680:
+	b	.L1735
+.L1737:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1672
+	b	.L1729
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10121,35 +10398,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1727
+	bls	.L1784
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1728
+	cbz	w0, .L1785
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1711:
+.L1768:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1710:
+.L1767:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1712:
-	adrp	x0, .LANCHOR154
-	ldrb	w0, [x0, #:lo12:.LANCHOR154]
+.L1769:
+	adrp	x0, .LANCHOR159
+	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1721
+	bcc	.L1778
 	mov	w28, w24
-.L1720:
+.L1777:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10157,9 +10434,9 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1722
+	bhi	.L1779
 	bl	sandisk_set_rr_para
-.L1723:
+.L1780:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -10169,27 +10446,27 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1724
+	bcc	.L1781
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1724:
+.L1781:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1725
-	adrp	x0, .LC107
+	bne	.L1782
+	adrp	x0, .LC109
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1725:
+.L1782:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1709
+	cbz	w23, .L1766
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1709:
+.L1766:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10198,13 +10475,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1728:
+.L1785:
 	mov	w23, 0
-	b	.L1711
-.L1727:
+	b	.L1768
+.L1784:
 	mov	w23, 0
-	b	.L1710
-.L1721:
+	b	.L1767
+.L1778:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10212,22 +10489,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1713
+	bhi	.L1770
 	bl	sandisk_set_rr_para
-.L1714:
+.L1771:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	cmp	w0, 34
-	bne	.L1715
-	adrp	x0, .LANCHOR154
-	ldrb	w0, [x0, #:lo12:.LANCHOR154]
+	bne	.L1772
+	adrp	x0, .LANCHOR159
+	ldrb	w0, [x0, #:lo12:.LANCHOR159]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1715
+	bne	.L1772
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1715:
+.L1772:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10242,27 +10519,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1718
+	beq	.L1775
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR151
-	ldr	x26, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR156
+	ldr	x26, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x27, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1720
-.L1718:
+	bcc	.L1777
+.L1775:
 	add	w20, w20, 1
-	b	.L1712
-.L1713:
+	b	.L1769
+.L1770:
 	bl	toshiba_set_rr_para
-	b	.L1714
-.L1722:
+	b	.L1771
+.L1779:
 	bl	toshiba_set_rr_para
-	b	.L1723
+	b	.L1780
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10293,34 +10570,35 @@ hynix_read_retrial:
 	adrp	x6, .LANCHOR43
 	add	x6, x6, :lo12:.LANCHOR43
 	mov	w5, 0
-	adrp	x7, .LANCHOR151
-	adrp	x8, .LANCHOR153
-.L1742:
+	adrp	x7, .LANCHOR156
+	adrp	x8, .LANCHOR158
+.L1799:
 	cmp	w5, w24
-	bcc	.L1747
-.L1746:
+	bcc	.L1804
+.L1803:
 	adrp	x0, .LANCHOR43
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1748
+	bcc	.L1805
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1748:
+.L1805:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1741
-	adrp	x0, .LC108
+	bne	.L1806
+	adrp	x0, .LC110
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC110
 	bl	printf
-.L1741:
+.L1806:
+	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10329,7 +10607,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1747:
+.L1804:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10350,21 +10628,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1744
+	beq	.L1801
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR151]
-	ldr	x26, [x8, #:lo12:.LANCHOR153]
+	ldr	x25, [x7, #:lo12:.LANCHOR156]
+	ldr	x26, [x8, #:lo12:.LANCHOR158]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1750
-.L1744:
+	bcc	.L1807
+.L1801:
 	add	w5, w5, 1
-	b	.L1742
-.L1750:
+	b	.L1799
+.L1807:
 	mov	w19, w0
-	b	.L1746
+	b	.L1803
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10392,15 +10670,15 @@ flash_ddr_tuning_read:
 	mov	w28, 0
 	str	x0, [x29, 120]
 	mov	w26, 0
-	adrp	x0, .LC109
+	adrp	x0, .LC111
 	mov	w27, 0
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC111
 	mov	w19, 1024
 	mov	w21, -1
 	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1766:
+.L1823:
 	mov	w0, w7
 	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
@@ -10414,7 +10692,7 @@ flash_ddr_tuning_read:
 	ldr	x0, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1761
+	tbz	x0, 4, .L1818
 	ldr	x0, [x29, 112]
 	mov	w3, w4
 	mov	w1, w7
@@ -10424,47 +10702,47 @@ flash_ddr_tuning_read:
 	bl	printf
 	ldr	w4, [x29, 108]
 	ldr	w7, [x29, 128]
-.L1761:
+.L1818:
 	add	w0, w19, 1
 	cmp	w4, w0
-	bhi	.L1762
-	adrp	x0, .LANCHOR151
-	ldr	x23, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR153
-	ldr	x24, [x0, #:lo12:.LANCHOR153]
+	bhi	.L1819
+	adrp	x0, .LANCHOR156
+	ldr	x23, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR158
+	ldr	x24, [x0, #:lo12:.LANCHOR158]
 	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1772
+	bcs	.L1829
 	add	w27, w27, 1
 	cmp	w27, 7
-	bls	.L1772
+	bls	.L1829
 	sub	w28, w7, w27
 	mov	w19, w4
 	mov	w21, 0
-.L1764:
+.L1821:
 	ldr	w0, [x29, 140]
 	cmp	w27, w26
 	csel	w28, w28, w0, cs
-.L1765:
-	cbz	w28, .L1767
+.L1822:
+	cbz	w28, .L1824
 	adrp	x0, .LANCHOR43
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
 	cmp	w0, w19
-	bls	.L1767
+	bls	.L1824
 	mov	w1, w28
-	adrp	x0, .LC110
-	add	x0, x0, :lo12:.LC110
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
 	mov	w0, w28
-.L1783:
+.L1840:
 	bl	nandc_set_ddr_para
-	cbz	w21, .L1760
+	cbz	w21, .L1817
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
 	mov	w0, w20
 	bl	flash_reset
@@ -10472,8 +10750,8 @@ flash_ddr_tuning_read:
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	adrp	x0, .LANCHOR35
-	add	x0, x0, :lo12:.LANCHOR35
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	mov	w1, 2
 	strb	w1, [x0, w20, sxtw]
 	mov	w0, w20
@@ -10488,22 +10766,22 @@ flash_ddr_tuning_read:
 	mov	w3, w0
 	mov	w2, w22
 	mov	w1, w20
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	cmp	w19, w0
-	bhi	.L1774
-	adrp	x1, .LANCHOR155
-	ldr	w0, [x1, #:lo12:.LANCHOR155]
+	bhi	.L1831
+	adrp	x1, .LANCHOR160
+	ldr	w0, [x1, #:lo12:.LANCHOR160]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR155]
+	str	w0, [x1, #:lo12:.LANCHOR160]
 	cmp	w0, 100
-	bls	.L1770
+	bls	.L1827
 	adrp	x0, .LANCHOR20
 	strb	wzr, [x0, #:lo12:.LANCHOR20]
-.L1760:
+.L1817:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10512,180 +10790,177 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1762:
+.L1819:
 	cmp	w27, w26
-	bls	.L1773
+	bls	.L1830
 	sub	w0, w28, w27
 	str	w0, [x29, 140]
 	cmp	w27, 7
-	bhi	.L1765
+	bhi	.L1822
 	mov	w26, w27
-.L1773:
+.L1830:
 	mov	w27, 0
-	b	.L1763
-.L1772:
+	b	.L1820
+.L1829:
 	mov	w28, w7
 	mov	w19, w4
 	mov	w21, 0
-.L1763:
+.L1820:
 	add	w7, w7, 2
 	cmp	w7, 50
-	bne	.L1766
-	b	.L1764
-.L1767:
+	bne	.L1823
+	b	.L1821
+.L1824:
 	ldrb	w0, [x29, 132]
-	b	.L1783
-.L1774:
+	b	.L1840
+.L1831:
 	mov	w19, w21
-.L1770:
+.L1827:
 	adrp	x20, .LANCHOR42
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	flash_set_interface_mode
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	b	.L1760
+	b	.L1817
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
 	.global	flash_read_page_en
 	.type	flash_read_page_en, %function
 flash_read_page_en:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	mov	x22, x2
-	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
 	mov	w19, w1
-	str	x27, [sp, 80]
-	mov	x23, x3
+	str	x25, [sp, 64]
+	mov	x22, x2
 	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	x23, x3
 	mov	w24, w4
-	ubfx	x26, x19, 24, 2
 	mov	x25, x0
-	cmp	w1, w21
-	bhi	.L1785
-	adrp	x1, .LANCHOR156
+	cmp	w1, w20
+	bhi	.L1842
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 382
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 398
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1785:
+.L1842:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w20, [x0, w21, sxtw]
+	ldrb	w21, [x0, w20, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
-	cmp	w0, w21
-	bcs	.L1786
+	cmp	w0, w20
+	bcs	.L1843
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 6, .L1786
-	adrp	x0, .LC113
+	tbnz	x0, 6, .L1844
+.L1868:
+	mov	w0, -1
+.L1841:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1844:
 	mov	w3, w19
-	mov	w2, w21
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC113
+	mov	w2, w20
+	mov	w1, w21
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1786:
-	cbnz	w26, .L1787
+	b	.L1868
+.L1843:
+	tst	x19, 50331648
+	bne	.L1846
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1788
+	cbz	w0, .L1847
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1787
-.L1788:
+	cbz	w0, .L1846
+.L1847:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1789
+	cbz	w1, .L1848
 	add	w19, w0, w19, lsl 1
-.L1787:
+.L1846:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_read_page
-	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1784
-	adrp	x25, .LANCHOR45
-	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR45]
-	cbnz	w27, .L1791
-.L1794:
-	adrp	x0, .LANCHOR157
-	ldr	x5, [x0, #:lo12:.LANCHOR157]
-	cbnz	x5, .L1792
-.L1793:
-	ldrb	w4, [x26, #:lo12:.LANCHOR45]
+	bne	.L1841
+	adrp	x20, .LANCHOR45
+	ldrb	w25, [x20, #:lo12:.LANCHOR45]
+	cbnz	w25, .L1849
+.L1852:
+	adrp	x0, .LANCHOR162
+	ldr	x5, [x0, #:lo12:.LANCHOR162]
+	cbnz	x5, .L1850
+.L1851:
+	ldrb	w4, [x20, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1784
+	cbz	w0, .L1868
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
-	ldr	x27, [sp, 80]
+	mov	w0, w21
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	b	flash_ddr_tuning_read
-.L1789:
+.L1848:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1787
-.L1791:
-	strb	wzr, [x25, #:lo12:.LANCHOR45]
+	b	.L1846
+.L1849:
+	strb	wzr, [x20, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR45]
+	strb	w25, [x20, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1794
-.L1812:
-	mov	w21, w0
-.L1784:
-	mov	w0, w21
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1792:
+	beq	.L1852
+	b	.L1841
+.L1850:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w21
 	blr	x5
 	cmn	w0, #1
-	beq	.L1793
-	b	.L1812
+	beq	.L1851
+	b	.L1841
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10696,15 +10971,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR135
+	adrp	x0, .LANCHOR140
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR34+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR30+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR34+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR30+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -10715,23 +10990,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1814
+	bne	.L1870
 	mov	w27, 0
 	mov	w28, 2
-.L1815:
+.L1871:
 	cmp	w27, w19
-	ble	.L1818
-.L1814:
+	ble	.L1874
+.L1870:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1819
+	tbz	x0, 12, .L1875
 	ldr	w3, [x22]
-	adrp	x0, .LC115
+	adrp	x0, .LC117
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-.L1819:
+.L1875:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10740,7 +11015,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1818:
+.L1874:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10750,25 +11025,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1816
+	bne	.L1872
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1815
-.L1816:
+	b	.L1871
+.L1872:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1815
+	b	.L1871
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR99
+	adrp	x4, .LANCHOR102
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR99]
+	ldrh	w4, [x4, #:lo12:.LANCHOR102]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -10779,165 +11054,6 @@ flash_get_last_written_page_ext:
 	asr	w0, w0, w6
 	b	flash_get_last_written_page
 	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
-	.section	.text.flash_info_blk_init,"ax",@progbits
-	.align	2
-	.global	flash_info_blk_init
-	.type	flash_info_blk_init, %function
-flash_info_blk_init:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR14
-	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR26
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	tbz	x0, 12, .L1826
-	ldr	x4, [x20, #:lo12:.LANCHOR26]
-	adrp	x2, .LANCHOR158
-	adrp	x0, .LC116
-	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR158
-	mov	w1, 49
-	add	x0, x0, :lo12:.LC116
-	bl	printf
-.L1826:
-	adrp	x21, .LANCHOR159
-	adrp	x23, .LANCHOR2
-	mov	w24, 21321
-	add	x26, x23, :lo12:.LANCHOR2
-	mov	x22, x21
-	mov	w19, 4
-	movk	w24, 0x5359, lsl 16
-.L1829:
-	ldrh	w1, [x26]
-	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR159]
-	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	add	x27, x21, :lo12:.LANCHOR159
-	add	x25, x20, :lo12:.LANCHOR26
-	mul	w1, w1, w19
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1827
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	ldr	w0, [x2]
-	cmp	w0, w24
-	beq	.L1828
-.L1827:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L1829
-.L1853:
-	mov	w0, -1
-.L1825:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1837:
-	ldr	x0, [x25]
-	ldr	w1, [x0]
-	cmp	w1, w24
-	bne	.L1838
-	ldr	w19, [x0, 4]
-.L1831:
-	add	x24, x21, :lo12:.LANCHOR160
-	ldrh	w0, [x23, #:lo12:.LANCHOR2]
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	ldrb	w1, [x24, 1]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1832
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
-	mov	w1, 21321
-	movk	w1, 0x5359, lsl 16
-	ldr	w2, [x0]
-	cmp	w2, w1
-	bne	.L1832
-	ldr	w1, [x0, 4]
-	cmp	w19, w1
-	bcs	.L1832
-	ldrb	w1, [x0, 37]
-	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR160]
-	strb	w0, [x24, 1]
-.L1832:
-	ldrb	w1, [x21, #:lo12:.LANCHOR160]
-	add	x24, x21, :lo12:.LANCHOR160
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	mov	w0, 0
-	bl	flash_get_last_written_page
-	sxth	w19, w0
-	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR160]
-	strh	w0, [x24, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR2]
-	mov	w23, 21321
-	movk	w23, 0x5359, lsl 16
-	madd	w21, w21, w0, w19
-.L1833:
-	tbz	w19, #31, .L1835
-	cmn	w19, #1
-	bne	.L1836
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
-	ldr	w1, [x0]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
-	bl	printf
-	b	.L1853
-.L1835:
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	mov	w1, w21
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1834
-	ldr	x0, [x20, #:lo12:.LANCHOR26]
-	ldr	w0, [x0]
-	cmp	w0, w23
-	bne	.L1834
-.L1836:
-	mov	w0, 0
-	b	.L1825
-.L1834:
-	sub	w19, w19, #1
-	sub	w21, w21, #1
-	sxth	w19, w19
-	b	.L1833
-.L1828:
-	adrp	x21, .LANCHOR160
-	add	x1, x21, :lo12:.LANCHOR160
-	ldrb	w3, [x2, 37]
-	mov	w4, 4
-	ldrb	w0, [x2, 36]
-	strb	w3, [x1, 1]
-	ldrh	w1, [x26]
-	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR160]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	bne	.L1837
-.L1838:
-	mov	w19, 0
-	b	.L1831
-	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
 	.global	flash_ddr_para_scan
@@ -10956,34 +11072,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR20]
-	adrp	x24, .LANCHOR162
+	adrp	x24, .LANCHOR164
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR161
+	adrp	x25, .LANCHOR163
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR161]
+	ldr	x3, [x25, #:lo12:.LANCHOR163]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR162]
+	ldr	x2, [x24, #:lo12:.LANCHOR164]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR161]
+	ldr	x3, [x25, #:lo12:.LANCHOR163]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR162]
+	ldr	x2, [x24, #:lo12:.LANCHOR164]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1855
+	bne	.L1882
 	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1855
+	tbz	x1, 0, .L1882
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1856:
+.L1883:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10991,10 +11107,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1855:
+.L1882:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1856
+	b	.L1883
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -11014,14 +11130,14 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1862
-	adrp	x1, .LANCHOR163
+	bhi	.L1889
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 886
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1862:
+.L1889:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w6, [x0, w23, sxtw]
@@ -11029,11 +11145,11 @@ flash_complete_plane_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1863
+	cbnz	w20, .L1890
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1863:
+.L1890:
 	adrp	x0, .LANCHOR19+16
 	and	x1, x6, 255
 	and	w3, w19, 255
@@ -11042,53 +11158,53 @@ flash_complete_plane_page_read:
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1864
+	bne	.L1891
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1875:
+.L1902:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1873:
+.L1900:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1867
-	cbz	w20, .L1867
+	bne	.L1894
+	cbz	w20, .L1894
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1874:
+.L1901:
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
+	adrp	x0, .LANCHOR30+9
 	mov	x4, x22
 	mov	x3, x21
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR34+9]
+	ldrb	w2, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, w6
 	bl	nandc_xfer
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	ldr	x23, [sp, 48]
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1864:
+.L1891:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1866
+	bne	.L1893
 	mov	w4, 5
-	b	.L1875
-.L1866:
+	b	.L1902
+.L1893:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11099,10 +11215,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1873
-.L1867:
+	b	.L1900
+.L1894:
 	mov	w0, w19
-	b	.L1874
+	b	.L1901
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11125,14 +11241,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1877
-	adrp	x1, .LANCHOR164
+	bhi	.L1904
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
-	mov	w2, 911
-	add	x1, x1, :lo12:.LANCHOR164
+	mov	w2, 1008
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1877:
+.L1904:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
@@ -11140,11 +11256,11 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1878
+	cbnz	w21, .L1905
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1878:
+.L1905:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11163,14 +11279,14 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1879
-	cbz	w21, .L1879
+	bne	.L1906
+	cbz	w21, .L1906
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1906:
-	adrp	x20, .LANCHOR34
-	add	x28, x20, :lo12:.LANCHOR34
+.L1933:
+	adrp	x20, .LANCHOR30
+	add	x28, x20, :lo12:.LANCHOR30
 	bl	nandc_set_seed
 	mov	x4, x25
 	mov	x3, x24
@@ -11179,10 +11295,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1881
+	bne	.L1908
 	adrp	x26, .LANCHOR45
 	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1882
+	cbz	w27, .L1909
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR45]
@@ -11191,24 +11307,24 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1883
-.L1888:
+	cbnz	w21, .L1910
+.L1915:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1883
+	cbz	w1, .L1910
 	adrp	x1, .LANCHOR43
 	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1883
-	add	x20, x20, :lo12:.LANCHOR34
+	blt	.L1910
+	add	x20, x20, :lo12:.LANCHOR30
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
-	cmp	w1, 3
+	cmp	w1, 4
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1876:
+.L1903:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11216,17 +11332,17 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1879:
+.L1906:
 	mov	w0, w19
-	b	.L1906
-.L1883:
+	b	.L1933
+.L1910:
 	cmn	w0, #1
-	bne	.L1876
-.L1889:
-	adrp	x0, .LANCHOR157
-	ldr	x5, [x0, #:lo12:.LANCHOR157]
-	cbnz	x5, .L1885
-.L1887:
+	bne	.L1903
+.L1916:
+	adrp	x0, .LANCHOR162
+	ldr	x5, [x0, #:lo12:.LANCHOR162]
+	cbnz	x5, .L1912
+.L1914:
 	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
@@ -11237,11 +11353,11 @@ flash_complete_page_read:
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1886
+	cbnz	w0, .L1913
 	mov	w0, -1
-	b	.L1876
-.L1885:
-	add	x0, x20, :lo12:.LANCHOR34
+	b	.L1903
+.L1912:
+	add	x0, x20, :lo12:.LANCHOR30
 	mov	x3, x25
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
@@ -11249,10 +11365,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1887
-	b	.L1876
-.L1886:
-	add	x20, x20, :lo12:.LANCHOR34
+	beq	.L1914
+	b	.L1903
+.L1913:
+	add	x20, x20, :lo12:.LANCHOR30
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -11265,120 +11381,121 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1881:
-	cbz	w21, .L1888
-	b	.L1876
-.L1882:
-	cbnz	w21, .L1889
-	b	.L1888
+.L1908:
+	cbz	w21, .L1915
+	b	.L1903
+.L1909:
+	cbnz	w21, .L1916
+	b	.L1915
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR53]
+	ldrb	w0, [x0, #:lo12:.LANCHOR54]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1908
-.L1937:
+	bne	.L1935
+.L1964:
 	mov	w21, 0
-	b	.L1907
-.L1908:
-	adrp	x19, .LANCHOR49
+	b	.L1934
+.L1935:
+	adrp	x19, .LANCHOR50
 	sxtw	x20, w0
-	add	x1, x19, :lo12:.LANCHOR49
+	add	x1, x19, :lo12:.LANCHOR50
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w24, [x1, 40]
 	sub	w3, w2, #1
-	cmp	w3, 9
-	bhi	.L1937
-	adrp	x1, .L1911
-	add	x1, x1, :lo12:.L1911
+	cmp	w3, 10
+	bhi	.L1964
+	adrp	x1, .L1938
+	add	x1, x1, :lo12:.L1938
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1911
+	adr	x3, .Lrtx1938
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1911:
+.Lrtx1938:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1911:
-	.2byte	(.L1910 - .Lrtx1911) / 4
-	.2byte	(.L1912 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1914 - .Lrtx1911) / 4
-	.2byte	(.L1915 - .Lrtx1911) / 4
-	.2byte	(.L1916 - .Lrtx1911) / 4
-	.2byte	(.L1913 - .Lrtx1911) / 4
-	.2byte	(.L1916 - .Lrtx1911) / 4
+.L1938:
+	.2byte	(.L1937 - .Lrtx1938) / 4
+	.2byte	(.L1939 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1941 - .Lrtx1938) / 4
+	.2byte	(.L1942 - .Lrtx1938) / 4
+	.2byte	(.L1943 - .Lrtx1938) / 4
+	.2byte	(.L1940 - .Lrtx1938) / 4
+	.2byte	(.L1943 - .Lrtx1938) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1910:
+.L1937:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1937
-	add	x0, x19, :lo12:.LANCHOR49
+	tbz	x0, 6, .L1964
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1918
+	cbz	x2, .L1945
 	ldrb	w3, [x0, 56]
-	adrp	x0, .LANCHOR121
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1918:
-	add	x19, x19, :lo12:.LANCHOR49
+.L1945:
+	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, w24
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
 	str	w0, [x20, 52]
-	mov	w0, 12
+	mov	w0, 13
 	strb	w0, [x20, 58]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1937
-.L1912:
+	b	.L1964
+.L1939:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1937
-	add	x0, x19, :lo12:.LANCHOR49
+	tbz	x0, 6, .L1964
+	add	x0, x19, :lo12:.LANCHOR50
 	lsl	x2, x20, 6
 	add	x1, x0, x2
 	ldrb	w21, [x0, x2]
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1919
+	cbz	x0, .L1946
 	ldrb	w2, [x1, 56]
-	adrp	x1, .LANCHOR121
-	ldrb	w1, [x1, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR123
+	ldrb	w1, [x1, #:lo12:.LANCHOR123]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1919:
-	add	x0, x19, :lo12:.LANCHOR49
+.L1946:
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1920
+	cbz	x1, .L1947
 	ldrb	w2, [x0, 56]
-	adrp	x0, .LANCHOR121
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1920:
-	add	x22, x19, :lo12:.LANCHOR49
+.L1947:
+	add	x22, x19, :lo12:.LANCHOR50
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
 	add	x22, x22, x21, lsl 6
@@ -11392,19 +11509,19 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1921
+	beq	.L1948
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1922
+	beq	.L1949
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1922
-.L1921:
-	add	x22, x19, :lo12:.LANCHOR49
-	adrp	x2, .LANCHOR121
+	beq	.L1949
+.L1948:
+	add	x22, x19, :lo12:.LANCHOR50
+	adrp	x2, .LANCHOR123
 	add	x22, x22, x20, lsl 6
-	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
 	mov	x2, x26
 	ldr	x3, [x22, 24]
 	ldr	w1, [x22, 40]
@@ -11414,38 +11531,38 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1923
+	beq	.L1950
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1923
+	beq	.L1950
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1923
+	tbz	x1, 6, .L1950
 	ldr	w3, [x0]
 	adrp	x0, .LC119
 	ldr	w1, [x22, 40]
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1923:
-	add	x0, x19, :lo12:.LANCHOR49
+.L1950:
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1922
+	beq	.L1949
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1922
-	adrp	x1, .LANCHOR165
+	beq	.L1949
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
-	mov	w2, 338
-	add	x1, x1, :lo12:.LANCHOR165
+	mov	w2, 360
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1922:
-	add	x0, x19, :lo12:.LANCHOR49
-	mov	w1, 12
+.L1949:
+	add	x0, x19, :lo12:.LANCHOR50
+	mov	w1, 13
 	add	x20, x0, x20, lsl 6
 	cmn	w25, #1
 	strb	w1, [x20, 58]
@@ -11453,20 +11570,20 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1924
+	beq	.L1951
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1926
+	beq	.L1953
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1926
-.L1924:
-	add	x20, x19, :lo12:.LANCHOR49
-	adrp	x2, .LANCHOR121
+	beq	.L1953
+.L1951:
+	add	x20, x19, :lo12:.LANCHOR50
+	adrp	x2, .LANCHOR123
 	add	x20, x20, x21, lsl 6
-	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	ldrb	w4, [x2, #:lo12:.LANCHOR123]
 	mov	x2, x24
 	ldr	x3, [x20, 24]
 	ldr	w1, [x20, 40]
@@ -11475,127 +11592,127 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1928
+	beq	.L1955
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1928
+	beq	.L1955
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1928
+	tbz	x1, 6, .L1955
 	ldr	w3, [x0]
 	adrp	x0, .LC119
 	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1928:
-	add	x0, x19, :lo12:.LANCHOR49
+.L1955:
+	add	x0, x19, :lo12:.LANCHOR50
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1926
+	beq	.L1953
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1926
-	adrp	x1, .LANCHOR165
+	beq	.L1953
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
-	mov	w2, 353
-	add	x1, x1, :lo12:.LANCHOR165
+	mov	w2, 375
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1926:
-	add	x19, x19, :lo12:.LANCHOR49
-	mov	w0, 12
+.L1953:
+	add	x19, x19, :lo12:.LANCHOR50
+	mov	w0, 13
 	add	x21, x19, x21, lsl 6
 	strb	w0, [x21, 58]
 	ldrb	w0, [x21, 2]
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1937
-.L1913:
+	b	.L1964
+.L1940:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1937
-	add	x19, x19, :lo12:.LANCHOR49
+	tbz	x21, 6, .L1964
+	add	x19, x19, :lo12:.LANCHOR50
 	mov	w0, 5
 	add	x20, x19, x20, lsl 6
 	tst	w21, w0
-	beq	.L1936
+	beq	.L1963
 	ldrb	w1, [x20, 1]
-	mov	w0, 11
+	mov	w0, 12
 	ldr	w3, [x20, 40]
-	mov	w4, 11
+	mov	w4, 12
 	strb	w0, [x20, 58]
 	mov	w2, w21
 	adrp	x0, .LC120
 	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1997:
+.L2024:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1907
-.L1916:
-	cmp	w2, 10
-	add	x21, x19, :lo12:.LANCHOR49
+	b	.L1934
+.L1943:
+	cmp	w2, 11
+	add	x21, x19, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
-	mov	w2, 9
+	mov	w2, 10
 	add	x0, x21, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x24, 21, 3
 	mov	x22, x21
-.L1931:
+.L1958:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1935
+	bne	.L1962
 	mov	w21, -1
-	b	.L1907
-.L1935:
+	b	.L1934
+.L1962:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1931
+	bne	.L1958
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1931
+	bne	.L1958
 	mov	w0, w24
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1933
+	tbz	x24, 6, .L1960
 	add	x22, x22, x20, lsl 6
 	ands	w21, w0, 15
-	beq	.L1934
+	beq	.L1961
 	ldrb	w1, [x22, 1]
 	mov	w2, w0
 	ldr	w3, [x22, 40]
-	mov	w4, 11
+	mov	w4, 12
 	adrp	x0, .LC121
 	add	x0, x0, :lo12:.LC121
 	mov	w21, w24
 	bl	printf
-	mov	w0, 11
+	mov	w0, 12
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L1933:
-	add	x1, x19, :lo12:.LANCHOR49
+.L1960:
+	add	x1, x19, :lo12:.LANCHOR50
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1907:
+.L1934:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11604,40 +11721,40 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1934:
-	mov	w0, 12
+.L1961:
+	mov	w0, 13
 	str	wzr, [x22, 52]
 	strb	w0, [x22, 58]
-	b	.L1933
-.L1914:
+	b	.L1960
+.L1941:
 	mov	w1, 32
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1937
-	add	x19, x19, :lo12:.LANCHOR49
+	tbz	x21, 5, .L1964
+	add	x19, x19, :lo12:.LANCHOR50
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1936
-	mov	w0, 11
-	strb	w0, [x20, 58]
-	b	.L1997
-.L1936:
+	beq	.L1963
 	mov	w0, 12
+	strb	w0, [x20, 58]
+	b	.L2024
+.L1963:
+	mov	w0, 13
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1937
-.L1915:
+	b	.L1964
+.L1942:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1937
-	add	x19, x19, :lo12:.LANCHOR49
+	tbz	x0, 6, .L1964
+	add	x19, x19, :lo12:.LANCHOR50
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
-	mov	w0, 6
+	mov	w0, 7
 	strb	w0, [x19, 58]
-	b	.L1937
+	b	.L1964
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11647,19 +11764,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR53
-	add	x19, x19, :lo12:.LANCHOR53
-.L1999:
+	adrp	x19, .LANCHOR54
+	add	x19, x19, :lo12:.LANCHOR54
+.L2026:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L2000
+	bne	.L2027
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2000:
+.L2027:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1999
+	b	.L2026
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11722,24 +11839,24 @@ sblk_read_page:
 	stp	x21, x22, [sp, 32]
 	and	w22, w1, 255
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR49
+	adrp	x21, .LANCHOR50
 	stp	x23, x24, [sp, 48]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x26, .LANCHOR166
+	adrp	x26, .LANCHOR168
 	mov	w20, w22
-	add	x26, x26, :lo12:.LANCHOR166
-	add	x21, x21, :lo12:.LANCHOR49
+	add	x26, x26, :lo12:.LANCHOR168
+	add	x21, x21, :lo12:.LANCHOR50
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR105
-.L2007:
-	cbnz	w20, .L2017
-.L2030:
-	adrp	x19, .LANCHOR49
-	add	x19, x19, :lo12:.LANCHOR49
-.L2018:
-	cbnz	w22, .L2020
+	adrp	x27, .LANCHOR107
+.L2034:
+	cbnz	w20, .L2044
+.L2057:
+	adrp	x19, .LANCHOR50
+	add	x19, x19, :lo12:.LANCHOR50
+.L2045:
+	cbnz	w22, .L2047
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11748,55 +11865,55 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2017:
+.L2044:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2008:
+.L2035:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2009
+	cbnz	w0, .L2036
 	cmp	w20, 1
-	beq	.L2014
+	beq	.L2041
 	ldrb	w0, [x26]
-	cbnz	w0, .L2011
-.L2014:
+	cbnz	w0, .L2038
+.L2041:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2012
-.L2009:
+	b	.L2039
+.L2036:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2008
-.L2011:
+	b	.L2035
+.L2038:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2013
+	bne	.L2040
 	str	w4, [x29, 124]
-	mov	w2, 624
-	adrp	x1, .LANCHOR167
+	mov	w2, 652
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2013:
+.L2040:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2014
-	ldrh	w0, [x27, #:lo12:.LANCHOR105]
+	bne	.L2041
+	ldrh	w0, [x27, #:lo12:.LANCHOR107]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2014
+	bne	.L2041
 	ldr	w0, [x19, 40]
-	adrp	x25, .LANCHOR53
+	adrp	x25, .LANCHOR54
 	ldrb	w24, [x21, x2]
-	add	x25, x25, :lo12:.LANCHOR53
+	add	x25, x25, :lo12:.LANCHOR54
 	stp	x3, x2, [x29, 104]
 	sub	w20, w20, #1
 	bl	flash_start_plane_read
@@ -11818,26 +11935,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2012:
+.L2039:
 	subs	w20, w20, #1
-	beq	.L2030
+	beq	.L2057
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2007
-.L2020:
+	b	.L2034
+.L2047:
 	ldrb	w0, [x23, 58]
-	cmp	w0, 12
-	bne	.L2019
+	cmp	w0, 13
+	bne	.L2046
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2019
+	beq	.L2046
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2019:
+.L2046:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2018
+	b	.L2045
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11848,86 +11965,84 @@ flash_prog_page:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	stp	x21, x22, [sp, 32]
 	adrp	x0, .LANCHOR13
-	adrp	x22, .LANCHOR14
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	and	x19, x20, 255
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
 	stp	x25, x26, [sp, 64]
-	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	mov	w21, w1
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	and	x19, x20, 255
-	stp	x23, x24, [sp, 48]
-	add	x23, x19, 8
-	stp	x27, x28, [sp, 80]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	add	x22, x19, 8
+	str	x27, [sp, 80]
 	mov	x26, x2
+	add	x22, x24, x22, lsl 8
+	and	w23, w1, 2097151
+	ubfx	x25, x21, 24, 2
 	mov	x27, x3
-	add	x23, x25, x23, lsl 8
-	and	w24, w1, 2097151
-	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2033
+	tbz	x0, 4, .L2060
 	adrp	x0, .LC122
 	mov	w3, w4
-	mov	w2, w28
+	mov	w2, w25
 	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2033:
+.L2060:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2034
+	cbnz	w25, .L2061
 	bl	zftl_flash_enter_slc_mode
-.L2035:
-	add	x19, x25, x19, lsl 8
+.L2062:
+	add	x19, x24, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
 	and	w0, w21, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w24, 8
+	lsr	w0, w23, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w24, 16
+	lsr	w0, w23, 16
 	str	w0, [x19, 2052]
-	mov	w0, w24
+	mov	w0, w23
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
+	adrp	x0, .LANCHOR30+9
 	mov	x3, x27
 	mov	x2, x26
-	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	mov	w0, 16
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x23
+	mov	x0, x22
 	bl	flash_read_status
 	mov	w2, w0
-	bl	nandc_de_cs.constprop.29
+	bl	nandc_de_cs.constprop.28
 	and	w19, w2, 4
-	tbz	x2, 2, .L2032
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2032
+	tbz	x2, 2, .L2059
 	adrp	x0, .LC123
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L2032:
+.L2059:
 	mov	w0, w19
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2034:
+.L2061:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2035
+	b	.L2062
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11938,16 +12053,16 @@ flash_test_blk:
 	mov	w2, 32
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR151
+	adrp	x22, .LANCHOR156
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	ldr	x0, [x22, #:lo12:.LANCHOR151]
-	adrp	x21, .LANCHOR153
+	ldr	x0, [x22, #:lo12:.LANCHOR156]
+	adrp	x21, .LANCHOR158
 	and	w19, w1, 65535
 	str	x23, [sp, 48]
 	mov	w1, 165
 	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	ldr	x0, [x21, #:lo12:.LANCHOR158]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -11958,10 +12073,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2048
-.L2050:
+	bne	.L2072
+.L2074:
 	mov	w21, -1
-.L2049:
+.L2073:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -11971,38 +12086,38 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2048:
-	adrp	x23, .LANCHOR34
-	add	x23, x23, :lo12:.LANCHOR34
-	ldr	x3, [x21, #:lo12:.LANCHOR153]
+.L2072:
+	adrp	x23, .LANCHOR30
+	add	x23, x23, :lo12:.LANCHOR30
+	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w1, w19
-	ldr	x2, [x22, #:lo12:.LANCHOR151]
+	ldr	x2, [x22, #:lo12:.LANCHOR156]
 	mov	w0, w20
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2050
+	beq	.L2074
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
-	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w0, w20
-	ldr	x2, [x22, #:lo12:.LANCHOR151]
+	ldr	x2, [x22, #:lo12:.LANCHOR156]
 	bl	flash_read_page
 	cmn	w0, #1
-	beq	.L2050
-	ldr	x0, [x22, #:lo12:.LANCHOR151]
+	beq	.L2074
+	ldr	x0, [x22, #:lo12:.LANCHOR156]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2050
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	bne	.L2074
+	ldr	x0, [x21, #:lo12:.LANCHOR158]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2049
+	b	.L2073
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12013,50 +12128,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR168
+	adrp	x0, .LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2058
-	adrp	x20, .LANCHOR34
-	add	x20, x20, :lo12:.LANCHOR34
+	cbnz	w0, .L2082
+	adrp	x20, .LANCHOR30
+	add	x20, x20, :lo12:.LANCHOR30
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2058
+	bhi	.L2082
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2058
-	adrp	x21, .LANCHOR133
+	tbz	x0, 0, .L2082
+	adrp	x21, .LANCHOR138
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR133
+	add	x21, x21, :lo12:.LANCHOR138
 	mov	w25, 65535
-	adrp	x24, .LANCHOR151
-.L2060:
+	adrp	x24, .LANCHOR156
+.L2084:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2061
-.L2058:
+	bhi	.L2085
+.L2082:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2061:
+.L2085:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2058
-	ldr	x0, [x24, #:lo12:.LANCHOR151]
+	bne	.L2082
+	ldr	x0, [x24, #:lo12:.LANCHOR156]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR151]
+	ldr	x3, [x24, #:lo12:.LANCHOR156]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -12064,497 +12179,707 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2060
+	b	.L2084
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.flash_dual_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_dual_page_prog
+	.type	flash_dual_page_prog, %function
+flash_dual_page_prog:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	and	x19, x22, 255
+	ldr	x23, [x0, #:lo12:.LANCHOR13]
+	add	x0, x19, 8
+	stp	x27, x28, [sp, 80]
+	mov	x27, x2
+	stp	x25, x26, [sp, 64]
+	mov	w21, w1
+	add	x0, x23, x0, lsl 8
+	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR14
+	str	x0, [x29, 96]
+	mov	x28, x3
+	mov	x25, x4
+	ldr	w2, [x0, #:lo12:.LANCHOR14]
+	mov	x26, x5
+	and	w20, w1, 2097151
+	ubfx	x24, x21, 24, 2
+	tbz	x2, 4, .L2088
+	adrp	x0, .LC122
+	mov	w3, w6
+	mov	w2, w24
+	add	x0, x0, :lo12:.LC122
+	bl	printf
+.L2088:
+	bl	nandc_wait_flash_ready
+	mov	w0, w22
+	bl	nandc_cs
+	mov	w0, w22
+	cbnz	w24, .L2089
+	bl	zftl_flash_enter_slc_mode
+.L2090:
+	add	x19, x23, x19, lsl 8
+	mov	w24, 128
+	and	w0, w21, 255
+	adrp	x22, .LANCHOR30
+	add	x22, x22, :lo12:.LANCHOR30
+	mov	w23, 16
+	str	w24, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
+	bl	nandc_set_seed
+	ldrb	w1, [x22, 9]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w23, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	str	w24, [x19, 2056]
+	str	wzr, [x19, 2052]
+	add	w0, w20, 1
+	str	wzr, [x19, 2052]
+	and	w1, w0, 255
+	str	w1, [x19, 2052]
+	lsr	w1, w0, 8
+	str	w1, [x19, 2052]
+	lsr	w1, w0, 16
+	str	w1, [x19, 2052]
+	bl	nandc_set_seed
+	ldrb	w1, [x22, 9]
+	mov	x3, x26
+	mov	x2, x25
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w23, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x29, 104]
+	bl	flash_read_status
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.28
+	and	w19, w2, 4
+	tbz	x2, 2, .L2087
+	ldr	x0, [x29, 96]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2087
+	adrp	x0, .LC123
+	mov	w2, w19
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+.L2087:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2089:
+	bl	zftl_flash_exit_slc_mode
+	b	.L2090
+	.size	flash_dual_page_prog, .-flash_dual_page_prog
+	.section	.text.fw_flash_page_prog.constprop.25,"ax",@progbits
+	.align	2
+	.type	fw_flash_page_prog.constprop.25, %function
+fw_flash_page_prog.constprop.25:
+	stp	x29, x30, [sp, -64]!
+	adrp	x4, .LANCHOR30
+	add	x4, x4, :lo12:.LANCHOR30
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x2
+	str	x23, [sp, 48]
+	ldrb	w19, [x4, 9]
+	udiv	w19, w0, w19
+	adrp	x0, .LANCHOR43
+	ldrb	w23, [x0, #:lo12:.LANCHOR43]
+	adrp	x0, .LANCHOR17
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	bl	nandc_bch_sel
+	ldrb	w0, [x4, 7]
+	cmp	w0, 9
+	bne	.L2103
+	adrp	x22, .LANCHOR156
+	mov	w2, 16384
+	mov	w1, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR156]
+	bl	ftl_memset
+	ldr	x5, [x22, #:lo12:.LANCHOR156]
+	mov	w6, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	x4, x5
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_dual_page_prog
+.L2106:
+	mov	w3, w0
+	mov	w0, w23
+	bl	nandc_bch_sel
+	ldr	x23, [sp, 48]
+	mov	w0, w3
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2103:
+	mov	w4, 4
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_prog_page
+	b	.L2106
+	.size	fw_flash_page_prog.constprop.25, .-fw_flash_page_prog.constprop.25
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
 	.global	idb_write_data
 	.type	idb_write_data, %function
 idb_write_data:
-	stp	x29, x30, [sp, -256]!
+	stp	x29, x30, [sp, -272]!
 	add	w0, w1, w3
-	mov	w4, w1
 	cmp	w0, 63
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
+	mov	w19, w1
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR135
+	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	bls	.L2064
+	ldr	x28, [x22, #:lo12:.LANCHOR135]
+	bls	.L2108
 	cmp	w1, 575
-	bhi	.L2065
-	adrp	x0, .LANCHOR169
-	mov	x1, x2
-	mov	w2, 1
-	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR169]
-	adrp	x0, idb_buf
-	bhi	.L2066
-	mov	w2, 64
-	sub	w4, w2, w4
-	sub	w2, w3, w4
-	ubfiz	x4, x4, 9, 25
-	lsl	w2, w2, 9
-	add	x1, x1, x4
-	add	x0, x0, :lo12:idb_buf
-.L2142:
-	bl	ftl_memcpy
-.L2121:
+	bhi	.L2109
+	mov	x21, x2
+	mov	w20, w3
+	cbnz	x28, .L2110
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x22, #:lo12:.LANCHOR135]
+	cbnz	x0, .L2111
+.L2116:
+	mov	w0, -1
+.L2107:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 256
+	ldp	x29, x30, [sp], 272
 	ret
-.L2066:
+.L2111:
+	mov	w2, 262144
+	mov	w1, 0
+	bl	ftl_memset
+.L2110:
+	adrp	x23, .LANCHOR137
+	ldr	x0, [x23, #:lo12:.LANCHOR137]
+	cbz	x0, .L2113
+.L2117:
+	adrp	x1, .LANCHOR136
+	mov	w2, 1
+	ldr	x0, [x22, #:lo12:.LANCHOR135]
+	cmp	w19, 64
+	str	w2, [x1, #:lo12:.LANCHOR136]
+	bhi	.L2213
+	mov	w1, 64
+	sub	w19, w1, w19
+	sub	w2, w20, w19
+	ubfiz	x19, x19, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x21, x19
+.L2219:
+	bl	ftl_memcpy
+.L2218:
+	mov	w0, 0
+	b	.L2107
+.L2113:
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x23, #:lo12:.LANCHOR137]
+	cbnz	x0, .L2117
+	b	.L2116
+.L2213:
 	mov	w2, 576
-	sub	w2, w2, w4
-	cmp	w3, w2
-	sub	w4, w4, #64
-	csel	w2, w3, w2, ls
-	ubfiz	x4, x4, 9, 25
-	add	x0, x0, :lo12:idb_buf
+	sub	w2, w2, w19
+	cmp	w20, w2
+	sub	w19, w19, #64
+	csel	w2, w20, w2, ls
+	ubfiz	x19, x19, 9, 25
 	lsl	w2, w2, 9
-	add	x0, x0, x4
-	b	.L2142
-.L2064:
+	mov	x1, x21
+	add	x0, x0, x19
+	b	.L2219
+.L2108:
 	cmp	w1, 575
-	bls	.L2121
-.L2065:
-	adrp	x0, .LANCHOR169
-	ldr	w0, [x0, #:lo12:.LANCHOR169]
-	cbz	w0, .L2121
-	adrp	x0, idb_buf
-	mov	w1, 35899
-	movk	w1, 0xfcdc, lsl 16
-	ldr	w2, [x0, #:lo12:idb_buf]
-	cmp	w2, w1
-	bne	.L2069
-	adrp	x3, .LANCHOR34
-	add	x1, x3, :lo12:.LANCHOR34
-	str	x3, [x29, 176]
-	add	x6, x0, :lo12:idb_buf
-	adrp	x3, idb_buf+262140
-	add	x3, x3, :lo12:idb_buf+262140
-	ldrh	w2, [x1, 10]
-	ldrb	w4, [x1, 12]
-	ldrb	w20, [x1, 9]
-	lsl	w2, w2, 2
-	ldrh	w19, [x1, 26]
-	mov	w1, 0
-	sdiv	w27, w2, w4
-	mov	w2, 512
-	mov	w4, 4097
-	cmp	w27, 512
-	csel	w27, w27, w2, lt
+	bls	.L2218
+.L2109:
+	adrp	x0, .LANCHOR136
+	ldr	w0, [x0, #:lo12:.LANCHOR136]
+	cbz	w0, .L2218
+	adrp	x1, .LANCHOR30
+	add	x0, x1, :lo12:.LANCHOR30
+	str	x1, [x29, 152]
+	adrp	x8, .LANCHOR49
+	ldrb	w20, [x0, 9]
+	ldrh	w19, [x0, 26]
+	adrp	x0, .LANCHOR0
+	mov	x7, x0
+	ldrb	w2, [x0, #:lo12:.LANCHOR0]
+	str	w2, [x29, 160]
+	uxtw	x0, w2
+	cbz	w0, .L2166
+	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	cmp	w0, 0
+	cset	w0, eq
+	str	w0, [x29, 164]
+.L2119:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	ldrb	w0, [x8, #:lo12:.LANCHOR49]
+	strb	w0, [x7, #:lo12:.LANCHOR0]
+	mov	w0, 35899
+	ldr	w1, [x28]
+	movk	w0, 0xfcdc, lsl 16
+	cmp	w1, w0
+	bne	.L2121
+	ldr	x0, [x29, 152]
 	mov	w2, 65535
-.L2073:
-	ldr	w5, [x3]
-	cbnz	w5, .L2071
-	ldr	w5, [x6, w1, uxtw 2]
-	add	w1, w1, 1
-	str	w5, [x3], -4
-	cmp	w1, w4
+	mov	w3, 4097
+	add	x1, x0, :lo12:.LANCHOR30
+	ldrh	w0, [x1, 10]
+	ldrb	w1, [x1, 12]
+	lsl	w0, w0, 2
+	sdiv	w25, w0, w1
+	mov	w0, 512
+	cmp	w25, 512
+	csel	w25, w25, w0, lt
+	mov	x0, 262140
+	add	x1, x28, x0
+	mov	w0, 0
+.L2125:
+	ldr	w4, [x1]
+	cbnz	w4, .L2123
+	ldr	w4, [x28, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w4, [x1], -4
+	cmp	w0, w3
 	sub	w2, w2, #1
-	csel	w1, w1, wzr, cc
+	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L2073
-.L2071:
-	add	x0, x0, :lo12:idb_buf
+	bne	.L2125
+.L2123:
+	ldr	w1, [x28, w2, uxtw 2]
 	mul	w19, w19, w20
-	mov	w3, w27
-	ldr	w1, [x0, w2, uxtw 2]
+	mov	w3, w25
 	adrp	x0, .LC124
 	add	x0, x0, :lo12:.LC124
 	bl	printf
-	stp	wzr, wzr, [x29, 168]
+	stp	wzr, wzr, [x29, 192]
 	and	w0, w19, 65535
-	str	w0, [x29, 132]
-	adrp	x0, gp_flash_check_buf
-	add	x0, x0, :lo12:gp_flash_check_buf
-	str	x0, [x29, 184]
-.L2107:
-	adrp	x0, gp_flash_check_buf
-	add	x20, x0, :lo12:gp_flash_check_buf
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	str	x0, [x29, 200]
+.L2162:
+	adrp	x20, .LANCHOR137
 	mov	w1, 0
 	mov	w2, 512
-	mov	x0, x20
+	ldr	x0, [x20, #:lo12:.LANCHOR137]
 	bl	ftl_memset
 	adrp	x0, .LANCHOR26
-	ldr	w1, [x29, 172]
+	ldr	w1, [x29, 196]
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2074
-	ldr	w1, [x29, 132]
-	adrp	x19, .LANCHOR45
+	beq	.L2126
+	ldr	w1, [x29, 140]
 	mul	w26, w0, w1
-	ldr	x0, [x29, 176]
-	add	x25, x0, :lo12:.LANCHOR34
-	ldrb	w0, [x19, #:lo12:.LANCHOR45]
-	str	w0, [x29, 128]
-	strb	wzr, [x19, #:lo12:.LANCHOR45]
+	ldr	w0, [x29, 164]
+	cbz	w0, .L2127
 	mov	w0, 0
-	ldrb	w21, [x25, 9]
-	ldrh	w23, [x25, 26]
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	strb	wzr, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+.L2127:
+	ldr	x0, [x29, 152]
+	add	x24, x0, :lo12:.LANCHOR30
+	ldr	x0, [x29, 200]
+	ldrb	w21, [x24, 9]
+	ldrb	w0, [x0]
+	str	w0, [x29, 136]
+	ldr	x0, [x29, 200]
 	udiv	w1, w26, w21
-	mul	w23, w21, w23
-	and	w22, w23, 65535
+	ldrh	w22, [x24, 26]
+	strb	wzr, [x0]
+	mov	w0, 0
 	bl	flash_erase_block
-	udiv	w23, w26, w22
-	msub	w23, w23, w22, w26
-	sub	w24, w26, w23
-	cmp	w26, w24
-	bne	.L2111
+	mul	w22, w21, w22
+	ldrh	w0, [x24, 10]
+	and	w19, w22, 65535
+	ldrb	w1, [x24, 12]
+	lsl	w0, w0, 2
+	udiv	w22, w26, w19
+	sdiv	w0, w0, w1
+	msub	w22, w22, w19, w26
+	str	w0, [x29, 184]
+	sub	w23, w26, w22
+	cmp	w26, w23
+	bne	.L2169
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2111
+	bne	.L2169
+	ldr	x27, [x20, #:lo12:.LANCHOR137]
 	mov	w2, 1024
 	mov	w1, 0
-	mov	x0, x20
+	mov	x0, x27
 	bl	ftl_memset
-	adrp	x1, gp_flash_check_buf
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
-	ldrb	w2, [x25, 12]
-	str	w0, [x1, #:lo12:gp_flash_check_buf]
-	cmp	w21, 8
-	ldrb	w0, [x25, 29]
-	mov	w1, 12
-	strb	w0, [x20, 16]
+	str	w0, [x27]
+	mov	w0, 12
+	str	w0, [x27, 4]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x27, 16]
+	str	wzr, [x27, 12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	cbz	w0, .L2129
+	ldrb	w0, [x24, 29]
+	strb	w0, [x27, 16]
+.L2129:
 	mov	w0, 4
-	strb	w0, [x20, 17]
-	ldrh	w0, [x25, 10]
-	str	w1, [x20, 4]
-	strb	wzr, [x20, 20]
-	str	wzr, [x20, 12]
-	sdiv	w0, w0, w2
-	mov	w2, 16
-	strh	w0, [x20, 18]
+	strb	w0, [x27, 17]
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
+	cmp	w21, 8
+	strb	wzr, [x27, 20]
+	strh	wzr, [x27, 22]
+	ldrh	w1, [x0, 10]
+	ldrb	w0, [x0, 12]
+	sdiv	w0, w1, w0
+	mov	w1, 16
+	strh	w0, [x27, 18]
 	mov	w0, 70
-	csel	w0, w0, w2, hi
-	ldr	x2, [x29, 184]
-	strb	w0, [x2, 21]
-	adrp	x0, gp_flash_check_buf+12
-	strh	wzr, [x2, 22]
-	add	x0, x0, :lo12:gp_flash_check_buf+12
+	csel	w0, w0, w1, hi
+	strb	w0, [x27, 21]
+	mov	w1, 12
+	add	x0, x27, 12
 	bl	js_hash
-	ldr	x1, [x29, 184]
-	mov	x6, x1
-	str	w0, [x1, 8]
-	sub	w0, w27, #4
-	str	w0, [x29, 164]
-.L2075:
-	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR168
-	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR168
-	adrp	x25, .LANCHOR3
-	str	x0, [x29, 152]
-	mov	w20, 0
-	add	x0, x25, :lo12:.LANCHOR3
-	str	x0, [x29, 144]
-.L2077:
-	cmp	w27, w20
-	bhi	.L2088
-	ldr	x0, [x29, 176]
-	add	x25, x19, :lo12:.LANCHOR45
-	strb	wzr, [x19, #:lo12:.LANCHOR45]
+	str	w0, [x27, 8]
+	sub	w0, w25, #4
+	str	w0, [x29, 188]
+.L2128:
+	adrp	x0, .LANCHOR49
+	mov	x24, x28
+	add	x0, x0, :lo12:.LANCHOR49
+	mov	w19, 0
+	str	x0, [x29, 176]
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	str	x0, [x29, 168]
+.L2131:
+	ldr	w0, [x29, 184]
+	cmp	w0, w19
+	bhi	.L2142
+	ldr	x0, [x29, 152]
 	mov	w21, 4
-	add	x0, x0, :lo12:.LANCHOR34
+	ldr	x20, [x20, #:lo12:.LANCHOR137]
 	mov	w22, 0
-	str	wzr, [x29, 144]
+	add	x0, x0, :lo12:.LANCHOR30
+	str	wzr, [x29, 176]
 	ldrb	w1, [x0, 9]
-	ldrh	w28, [x0, 26]
+	ldrh	w27, [x0, 26]
 	uxtw	x0, w1
-	mul	w28, w0, w28
-	and	w28, w28, 65535
-	udiv	w0, w26, w28
-	msub	w28, w0, w28, w26
-	sub	w0, w26, w28
-	stp	w0, w1, [x29, 136]
-	and	w0, w28, 3
-	str	w0, [x29, 152]
-	ldr	w0, [x29, 164]
-	str	w0, [x29, 160]
-	adrp	x0, gp_flash_check_buf
-	add	x20, x0, :lo12:gp_flash_check_buf
+	mul	w27, w0, w27
+	adrp	x0, .LANCHOR45
+	and	w27, w27, 65535
+	strb	wzr, [x0, #:lo12:.LANCHOR45]
+	udiv	w0, w26, w27
+	msub	w27, w0, w27, w26
+	sub	w0, w26, w27
+	stp	w0, w1, [x29, 144]
+	and	w0, w27, 3
+	str	w0, [x29, 184]
+	ldr	w0, [x29, 188]
+	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	str	x0, [x29, 104]
-.L2089:
-	ldr	w0, [x29, 160]
+	str	x0, [x29, 112]
+.L2143:
+	ldr	w0, [x29, 168]
 	cmp	w22, w0
-	bcc	.L2103
-	adrp	x0, .LANCHOR45
-	ldrb	w1, [x29, 128]
-	adrp	x3, idb_buf
-	add	x3, x3, :lo12:idb_buf
-	strb	w1, [x0, #:lo12:.LANCHOR45]
-	mov	x1, 0
-	ldr	w0, [x29, 164]
-	lsl	w0, w0, 7
-.L2104:
-	mov	w19, w1
-	cmp	w1, w0
-	bcc	.L2105
-	ldr	w0, [x29, 168]
+	bcc	.L2157
+	ldr	x0, [x29, 200]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0]
+	ldr	w0, [x29, 164]
+	cbz	w0, .L2158
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	adrp	x0, .LANCHOR0
+	strb	wzr, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+.L2158:
+	ldr	w0, [x29, 188]
+	mov	x2, 0
+	lsl	w1, w0, 7
+	adrp	x0, .LANCHOR137
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
+.L2159:
+	mov	w19, w2
+	cmp	w2, w1
+	bcc	.L2160
+	ldr	w0, [x29, 192]
 	add	w0, w0, 1
-	str	w0, [x29, 168]
+	str	w0, [x29, 192]
 	cmp	w0, 5
-	bls	.L2074
-	b	.L2069
-.L2111:
-	mov	x6, 0
-	str	w27, [x29, 164]
-	b	.L2075
-.L2088:
-	ldr	x2, [x29, 152]
-	add	w5, w23, w20
-	lsr	w5, w5, 2
-	add	x0, x25, :lo12:.LANCHOR3
-	add	w1, w5, 1
+	bls	.L2126
+	b	.L2165
+.L2166:
+	str	wzr, [x29, 164]
+	b	.L2119
+.L2169:
+	mov	x27, 0
+	str	w25, [x29, 188]
+	b	.L2128
+.L2142:
+	ldr	x2, [x29, 176]
+	add	w4, w22, w19
+	lsr	w4, w4, 2
+	adrp	x0, .LANCHOR3
+	add	w1, w4, 1
+	add	x0, x0, :lo12:.LANCHOR3
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2079
+	cbz	w2, .L2133
 	adrp	x0, .LANCHOR1
-	ldrb	w3, [x0, #:lo12:.LANCHOR1]
+	ldrb	w5, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
-	cmp	w3, 0
+	cmp	w5, 0
 	csel	w0, w0, w1, ne
-.L2079:
+.L2133:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2081
-.L2140:
-	str	w0, [x29, 192]
+	bne	.L2135
+.L2216:
+	str	w0, [x29, 208]
 	mov	w0, 61424
-	str	w0, [x29, 196]
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2083
-	mov	w5, w0
-.L2084:
-	mul	w1, w21, w5
-	adrp	x2, .LANCHOR43
-	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2085
-	ldr	x3, [x29, 176]
-	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR43]
-	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
-	str	w5, [x29, 140]
-	str	w7, [x29, 160]
-	ldrb	w6, [x3, 9]
-	udiv	w6, w1, w6
-	bl	nandc_bch_sel
-	mov	w1, w6
-	mov	w4, 4
-	add	x3, x29, 192
-	mov	x2, x22
-	mov	w0, 0
-	bl	flash_prog_page
-	ldr	w7, [x29, 160]
-	mov	w0, w7
-	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR168]
-	ldr	w5, [x29, 140]
-	cbnz	w0, .L2086
-	udiv	w1, w24, w21
-	add	w2, w5, 1
+	str	w0, [x29, 212]
+	ldr	x0, [x29, 168]
+	ldrh	w0, [x0, w4, sxtw 1]
+	cbnz	w2, .L2137
+	mov	w4, w0
+.L2138:
+	mul	w0, w21, w4
+	cbnz	x27, .L2139
+	str	w4, [x29, 148]
+	add	x2, x29, 208
+	mov	x1, x24
+	add	w0, w0, w23
+	bl	fw_flash_page_prog.constprop.25
+	adrp	x0, .LANCHOR49
+	ldr	w4, [x29, 148]
+	ldrb	w0, [x0, #:lo12:.LANCHOR49]
+	cbnz	w0, .L2140
+	udiv	w1, w23, w21
+	add	w2, w4, 1
 	bl	id_block_prog_msb_ff_data
-.L2086:
-	add	x22, x22, 2048
-.L2087:
-	add	w20, w20, 4
-	mov	x6, 0
-	and	w20, w20, 65535
-	b	.L2077
-.L2081:
+.L2140:
+	add	x24, x24, 2048
+.L2141:
+	add	w19, w19, 4
+	mov	x27, 0
+	and	w19, w19, 65535
+	b	.L2131
+.L2135:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2140
-.L2083:
+	b	.L2216
+.L2137:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	lsl	w0, w5, 1
+	lsl	w0, w4, 1
 	cmp	w1, 0
-	csel	w5, w0, w5, ne
-	b	.L2084
-.L2085:
-	ldr	x3, [x29, 176]
-	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR43]
-	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
-	str	w7, [x29, 160]
-	ldrb	w5, [x3, 9]
-	udiv	w5, w1, w5
-	bl	nandc_bch_sel
-	mov	x2, x6
-	mov	w4, 4
-	add	x3, x29, 192
-	mov	w1, w5
-	mov	w0, 0
-	bl	flash_prog_page
-	ldr	w7, [x29, 160]
-	mov	w0, w7
-	bl	nandc_bch_sel
-	b	.L2087
-.L2103:
-	add	w19, w28, w22
-	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR168
+	csel	w4, w0, w4, ne
+	b	.L2138
+.L2139:
+	add	x2, x29, 208
+	mov	x1, x27
+	add	w0, w0, w23
+	bl	fw_flash_page_prog.constprop.25
+	b	.L2141
+.L2157:
+	add	w19, w27, w22
+	ldr	w0, [x29, 184]
+	adrp	x1, .LANCHOR49
 	sub	w24, w21, w0
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR49]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2090
+	cbnz	w1, .L2144
 	mov	w19, w0
-.L2091:
+.L2145:
 	adrp	x0, .LANCHOR17
-	ldr	w1, [x29, 136]
+	ldr	w1, [x29, 144]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
-	ldr	w0, [x29, 152]
+	ldr	w0, [x29, 184]
 	add	w0, w0, w1
-	ldr	w1, [x29, 140]
+	ldr	w1, [x29, 148]
 	madd	w19, w1, w19, w0
-	ldr	x0, [x29, 176]
-	add	x0, x0, :lo12:.LANCHOR34
-	ldrb	w0, [x0, 9]
+	adrp	x0, .LANCHOR30+9
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
-	str	w0, [x29, 124]
+	str	w0, [x29, 132]
 	mov	w0, w23
 	bl	nandc_bch_sel
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
-	str	x0, [x29, 112]
-.L2092:
+	str	x0, [x29, 120]
+.L2146:
 	mov	w4, w21
-	add	x3, x29, 192
+	add	x3, x29, 208
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2093
-	ldrb	w6, [x25]
-	cbnz	w6, .L2094
-.L2097:
-	adrp	x0, .LANCHOR157
-	ldr	x6, [x0, #:lo12:.LANCHOR157]
-	cbnz	x6, .L2095
-.L2096:
-	ldr	x0, [x29, 112]
+	bne	.L2147
+	ldr	x0, [x29, 200]
+	ldrb	w6, [x0]
+	cbnz	w6, .L2148
+.L2151:
+	adrp	x0, .LANCHOR162
+	ldr	x6, [x0, #:lo12:.LANCHOR162]
+	cbnz	x6, .L2149
+.L2150:
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
-	cbz	w0, .L2093
+	cbz	w0, .L2147
 	mov	w4, w21
-	add	x3, x29, 192
+	add	x3, x29, 208
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2141
-.L2090:
+	b	.L2217
+.L2144:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2091
-.L2094:
-	str	w6, [x29, 100]
+	b	.L2145
+.L2148:
+	ldr	x0, [x29, 200]
+	mov	w1, w19
+	str	w6, [x29, 108]
 	mov	w4, w21
-	str	w5, [x29, 120]
-	add	x3, x29, 192
-	strb	wzr, [x25]
+	str	w5, [x29, 128]
+	add	x3, x29, 208
 	mov	x2, x20
-	mov	w1, w19
+	strb	wzr, [x0]
 	mov	w0, 0
 	bl	flash_read_page
 	cmn	w0, #1
-	ldr	w6, [x29, 100]
-	strb	w6, [x25]
-	ldr	w5, [x29, 120]
-	beq	.L2097
-.L2141:
+	ldr	x1, [x29, 200]
+	ldr	w6, [x29, 108]
+	ldr	w5, [x29, 128]
+	strb	w6, [x1]
+	beq	.L2151
+.L2217:
 	mov	w5, w0
-.L2093:
+.L2147:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2099
+	beq	.L2153
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2092
-.L2095:
-	str	w5, [x29, 120]
+	b	.L2146
+.L2149:
+	str	w5, [x29, 128]
 	mov	w4, w21
-	add	x3, x29, 192
+	add	x3, x29, 208
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	ldr	w5, [x29, 120]
-	beq	.L2096
-	b	.L2141
-.L2099:
-	ldr	w0, [x29, 124]
+	ldr	w5, [x29, 128]
+	beq	.L2150
+	b	.L2217
+.L2153:
+	ldr	w0, [x29, 132]
 	bl	nandc_bch_sel
 	cmp	w3, 0
-	ldr	w0, [x29, 144]
+	ldr	w0, [x29, 176]
 	csinv	w0, w0, wzr, eq
-	str	w0, [x29, 144]
-	ldr	w0, [x29, 136]
+	str	w0, [x29, 176]
+	ldr	w0, [x29, 144]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2101
-	ldr	w0, [x29, 144]
-	cbnz	w0, .L2101
+	bne	.L2155
+	ldr	w0, [x29, 176]
+	cbnz	w0, .L2155
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2101
-	ldr	w0, [x29, 160]
+	bne	.L2155
+	ldr	w0, [x29, 168]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
-	str	w0, [x29, 160]
-.L2102:
+	str	w0, [x29, 168]
+.L2156:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2089
-.L2101:
+	b	.L2143
+.L2155:
 	ubfiz	x0, x24, 9, 16
-	str	wzr, [x29, 152]
+	str	wzr, [x29, 184]
 	add	x20, x20, x0
-	b	.L2102
-.L2105:
-	ldr	x4, [x29, 184]
-	lsl	x2, x1, 2
-	add	x1, x1, 1
-	ldr	w4, [x2, x4]
-	ldr	w2, [x3, x2]
-	cmp	w4, w2
-	beq	.L2104
-	ldr	x0, [x29, 184]
+	b	.L2156
+.L2160:
+	ldr	w4, [x0, x2, lsl 2]
+	add	x2, x2, 1
+	add	x3, x28, x2, lsl 2
+	ldr	w3, [x3, -4]
+	cmp	w4, w3
+	beq	.L2159
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
@@ -12565,22 +12890,42 @@ idb_write_data:
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2074:
-	ldr	w0, [x29, 172]
+.L2126:
+	ldr	w0, [x29, 196]
 	add	w0, w0, 1
-	str	w0, [x29, 172]
+	str	w0, [x29, 196]
 	cmp	w0, 4
-	bne	.L2107
-	ldr	w0, [x29, 168]
-	cbnz	w0, .L2069
+	bne	.L2162
+.L2165:
+	ldrb	w1, [x29, 160]
+	adrp	x0, .LANCHOR0
+	strb	w1, [x0, #:lo12:.LANCHOR0]
+	mov	w1, 2
+	adrp	x0, .LANCHOR31
+	strb	w1, [x0, #:lo12:.LANCHOR31]
+	mov	w0, 0
+	bl	zftl_flash_enter_slc_mode
+	ldr	w0, [x29, 192]
+	cbnz	w0, .L2121
 	adrp	x0, .LC126
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2069:
-	adrp	x0, .LANCHOR169
-	str	wzr, [x0, #:lo12:.LANCHOR169]
-	b	.L2121
+.L2121:
+	adrp	x0, .LANCHOR136
+	adrp	x19, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR136]
+	ldr	x0, [x19, #:lo12:.LANCHOR135]
+	cbz	x0, .L2164
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR135]
+.L2164:
+	adrp	x19, .LANCHOR137
+	ldr	x0, [x19, #:lo12:.LANCHOR137]
+	cbz	x0, .L2218
+	bl	free
+	str	xzr, [x19, #:lo12:.LANCHOR137]
+	b	.L2218
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12603,14 +12948,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2144
+	bhi	.L2221
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 655
+	mov	w2, 726
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2144:
+.L2221:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12618,12 +12963,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2145
+	cbz	w25, .L2222
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2145:
+.L2222:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12641,10 +12986,10 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
+	adrp	x0, .LANCHOR30+9
 	mov	x3, x24
 	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -12654,7 +12999,7 @@ flash_start_tlc_page_prog:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs.constprop.29
+	b	nandc_de_cs.constprop.28
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
@@ -12705,8 +13050,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -12723,21 +13068,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2153:
+.L2230:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2154
+	cbnz	w0, .L2231
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2154:
+.L2231:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2153
+	b	.L2230
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12754,13 +13099,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2157:
+.L2234:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2158
+	cbnz	w0, .L2235
 	cmp	w24, 2
-	bne	.L2159
+	bne	.L2236
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12837,83 +13182,113 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-.L2160:
+.L2237:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2158:
+.L2235:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2157
-.L2159:
+	b	.L2234
+.L2236:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2160
+	b	.L2237
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.flash_start_page_prog,"ax",@progbits
+	.section	.text.sblk_3d_tlc_dump_prog,"ax",@progbits
 	.align	2
-	.global	flash_start_page_prog
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	stp	x29, x30, [sp, -96]!
+	.global	sblk_3d_tlc_dump_prog
+	.type	sblk_3d_tlc_dump_prog, %function
+sblk_3d_tlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR18
-	stp	x25, x26, [sp, 64]
-	and	w24, w0, 255
 	stp	x19, x20, [sp, 16]
-	mov	x25, x2
+	mov	x19, x0
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	ldr	w3, [x19, 40]
+	str	x21, [sp, 32]
+	and	w20, w3, 2097151
+	mov	w2, w3
+	ubfx	x21, x3, 21, 3
+	mov	w1, w20
+	bl	printf
+	ldr	x5, [x19, 8]
+	mov	w4, w20
+	ldr	x6, [x19, 24]
+	mov	w3, w21
+	mov	w2, 26
+	mov	w1, 1
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x19, 8]
+	mov	w4, w20
+	ldr	x6, [x19, 24]
+	mov	w3, w21
+	mov	w2, 26
+	mov	w1, 2
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x5, [x19, 8]
+	mov	w4, w20
+	ldr	x6, [x19, 24]
+	mov	w3, w21
+	mov	w2, 16
+	mov	w1, 3
+	mov	w0, 0
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x21, [sp, 32]
+	ldr	w0, [x19, 40]
+	mov	w1, 64
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_wait_device_ready
+	.size	sblk_3d_tlc_dump_prog, .-sblk_3d_tlc_dump_prog
+	.section	.text.flash_start_3d_mlc_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_3d_mlc_page_prog
+	.type	flash_start_3d_mlc_page_prog, %function
+flash_start_3d_mlc_page_prog:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	and	w20, w1, 2097151
-	str	x27, [sp, 80]
-	ubfx	x27, x1, 21, 3
-	ubfx	x22, x1, 24, 2
-	cmp	w0, w27
-	bhi	.L2163
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	str	x23, [sp, 48]
+	and	w19, w1, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	mov	w20, w2
+	mov	x22, x3
+	mov	x23, x4
+	cmp	w0, w19
+	bhi	.L2242
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 706
+	mov	w2, 756
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2163:
+.L2242:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w21, [x0, w27, sxtw]
+	ldrb	w4, [x0, w19, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	bl	nandc_rdy_status
-	cbnz	w0, .L2164
-	ldrb	w0, [x23, #:lo12:.LANCHOR18]
-	cmp	w0, 1
-	bne	.L2165
-	bl	nandc_wait_flash_ready
-.L2164:
-	mov	w0, w21
-	bl	hynix_reconfig_rr_para
-	mov	w0, w21
+	mov	w0, w4
 	bl	nandc_cs
-	cbnz	w22, .L2166
-	mov	w0, w20
-	bl	slc_phy_page_address_calc
-	mov	w20, w0
-	adrp	x0, .LANCHOR0
-	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2167
-	mov	w0, w21
-	bl	zftl_flash_enter_slc_mode
-.L2167:
-	ubfiz	x21, x21, 8, 8
+	ubfiz	x4, x4, 8, 8
+	add	x19, x19, x4
 	mov	w0, 128
-	add	x19, x19, x21
 	str	w0, [x19, 2056]
 	and	w0, w20, 255
 	str	wzr, [x19, 2052]
@@ -12925,37 +13300,225 @@ flash_start_page_prog:
 	str	w0, [x19, 2052]
 	mov	w0, w20
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR34+9
-	mov	x3, x26
-	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
+	adrp	x0, .LANCHOR30+9
+	mov	x3, x23
+	mov	x2, x22
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	x27, [sp, 80]
-	ldp	x21, x22, [sp, 32]
-	ldp	x25, x26, [sp, 64]
-	str	w24, [x19, 2056]
+	ldr	x23, [sp, 48]
+	str	w21, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs.constprop.29
-.L2165:
-	mov	w2, 64
-	mov	w1, w20
-	mov	w0, w27
-	bl	flash_wait_device_ready_raw
-	b	.L2164
-.L2166:
-	mov	w0, w21
-	bl	zftl_flash_exit_slc_mode
-	b	.L2167
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",@progbits
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	flash_start_3d_mlc_page_prog, .-flash_start_3d_mlc_page_prog
+	.section	.text.sblk_3d_mlc_prog_pages,"ax",@progbits
 	.align	2
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
-	stp	x29, x30, [sp, -32]!
+	.global	sblk_3d_mlc_prog_pages
+	.type	sblk_3d_mlc_prog_pages, %function
+sblk_3d_mlc_prog_pages:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	ldr	x0, [x0]
+	ldr	w19, [x0, 40]
+	str	x21, [sp, 32]
+.L2245:
+	mov	w1, 1
+	mov	w0, w19
+	bl	queue_lun_state
+	cbnz	w0, .L2246
+	ldr	x0, [x20]
+	ldr	w19, [x0, 40]
+	and	w21, w19, 2097151
+	ubfx	x19, x19, 21, 3
+	mov	w0, w19
+	bl	zftl_flash_exit_slc_mode
+	ldr	x0, [x20]
+	mov	w2, w21
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x20, 8]
+	add	w2, w21, 1
+	mov	w1, w19
+	ldr	x3, [x0, 8]
+	ldr	x4, [x0, 24]
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_de_cs.constprop.28
+	ldr	x1, [x20]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
+	bl	buf_add_tail
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2246:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2245
+	.size	sblk_3d_mlc_prog_pages, .-sblk_3d_mlc_prog_pages
+	.section	.text.sblk_mlc_dump_prog,"ax",@progbits
+	.align	2
+	.global	sblk_mlc_dump_prog
+	.type	sblk_mlc_dump_prog, %function
+sblk_mlc_dump_prog:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w20, [x0, 40]
+	str	x21, [sp, 32]
+	and	w21, w20, 2097151
+	ubfx	x20, x20, 21, 3
+	mov	w0, w20
+	bl	zftl_flash_exit_slc_mode
+	ldr	w2, [x19, 40]
+	mov	w1, w21
+	adrp	x0, .LC128
+	add	x0, x0, :lo12:.LC128
+	add	w3, w2, 1
+	bl	printf
+	ldr	x3, [x19, 8]
+	mov	w2, w21
+	ldr	x4, [x19, 24]
+	mov	w1, w20
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x3, [x19, 8]
+	add	w2, w21, 1
+	ldr	x4, [x19, 24]
+	mov	w1, w20
+	mov	w0, 16
+	bl	flash_start_3d_mlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x19, 40]
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.28
+	ldr	x21, [sp, 32]
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	sblk_mlc_dump_prog, .-sblk_mlc_dump_prog
+	.section	.text.flash_start_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR18
+	stp	x25, x26, [sp, 64]
+	and	w24, w0, 255
+	stp	x19, x20, [sp, 16]
+	mov	x25, x2
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	and	w20, w1, 2097151
+	str	x27, [sp, 80]
+	ubfx	x27, x1, 21, 3
+	ubfx	x22, x1, 24, 2
+	cmp	w0, w27
+	bhi	.L2251
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 803
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2251:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w21, [x0, w27, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	bl	nandc_rdy_status
+	cbnz	w0, .L2252
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	cmp	w0, 1
+	bne	.L2253
+	bl	nandc_wait_flash_ready
+.L2252:
+	mov	w0, w21
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	cbnz	w22, .L2254
+	mov	w0, w20
+	bl	slc_phy_page_address_calc
+	mov	w20, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2255
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+.L2255:
+	ubfiz	x21, x21, 8, 8
+	mov	w0, 128
+	add	x19, x19, x21
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR30+9
+	mov	x3, x26
+	mov	x2, x25
+	ldrb	w1, [x0, #:lo12:.LANCHOR30+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	ldr	x27, [sp, 80]
+	ldp	x21, x22, [sp, 32]
+	ldp	x25, x26, [sp, 64]
+	str	w24, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 96
+	b	nandc_de_cs.constprop.28
+.L2253:
+	mov	w2, 64
+	mov	w1, w20
+	mov	w0, w27
+	bl	flash_wait_device_ready_raw
+	b	.L2252
+.L2254:
+	mov	w0, w21
+	bl	zftl_flash_exit_slc_mode
+	b	.L2255
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	w1, [x0, 40]
 	ldr	x3, [x0, 24]
@@ -12964,27 +13527,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR53]
+	ldrb	w1, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, 255
-	beq	.L2173
-	adrp	x2, .LANCHOR49
-	add	x2, x2, :lo12:.LANCHOR49
+	beq	.L2261
+	adrp	x2, .LANCHOR50
+	add	x2, x2, :lo12:.LANCHOR50
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2175:
+.L2263:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2174
+	bne	.L2262
 	ldrb	w5, [x4, 58]
-	cmp	w5, 6
-	bne	.L2174
+	cmp	w5, 7
+	bne	.L2262
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2173:
+.L2261:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12992,16 +13555,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR54
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2174:
+.L2262:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2175
-	b	.L2173
+	bne	.L2263
+	b	.L2261
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -13018,25 +13581,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2182
+	cbz	w0, .L2270
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2182
+	tbz	x0, 8, .L2270
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC127
+	adrp	x0, .LC129
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2182:
+.L2270:
 	adrp	x25, .LANCHOR38
-	adrp	x23, .LANCHOR49
+	adrp	x23, .LANCHOR50
 	add	x25, x25, :lo12:.LANCHOR38
-	add	x23, x23, :lo12:.LANCHOR49
+	add	x23, x23, :lo12:.LANCHOR50
 	mov	w21, 0
 	mov	w24, 1
-.L2183:
-	cbnz	w20, .L2194
-.L2207:
+.L2271:
+	cbnz	w20, .L2282
+.L2295:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13045,53 +13608,53 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2194:
+.L2282:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2184:
+.L2272:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2185
+	cbnz	w0, .L2273
 	cmp	w20, 1
-	beq	.L2186
+	beq	.L2274
 	ldrb	w0, [x25]
-	cbnz	w0, .L2187
-.L2186:
+	cbnz	w0, .L2275
+.L2274:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2188:
+.L2276:
 	subs	w20, w20, #1
-	beq	.L2207
+	beq	.L2295
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2183
-.L2185:
+	b	.L2271
+.L2273:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2184
-.L2187:
+	b	.L2272
+.L2275:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2189
-	adrp	x1, .LANCHOR172
+	bne	.L2277
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 574
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2189:
+.L2277:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2190
-	adrp	x0, .LANCHOR99
-	ldrh	w2, [x0, #:lo12:.LANCHOR99]
-	adrp	x0, .LANCHOR98
-	ldrb	w3, [x0, #:lo12:.LANCHOR98]
+	bne	.L2278
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR101
+	ldrb	w3, [x0, #:lo12:.LANCHOR101]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -13110,9 +13673,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2190
+	bne	.L2278
 	cmp	w21, w3
-	beq	.L2190
+	beq	.L2278
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13120,20 +13683,20 @@ sblk_prog_page:
 	ldr	x3, [x19, 24]
 	bl	flash_start_page_prog
 	strb	w24, [x19, 59]
-	mov	w0, 8
+	mov	w0, 9
 	strb	w0, [x19, 58]
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	b	.L2188
-.L2190:
+	b	.L2276
+.L2278:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2188
+	b	.L2276
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13141,22 +13704,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR121
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR119]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR173
-	cbz	w1, .L2210
-	ldrb	w2, [x20, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	adrp	x20, .LANCHOR174
+	cbz	w1, .L2298
+	ldrb	w2, [x20, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2210:
+.L2298:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR173]
+	strb	wzr, [x19, #:lo12:.LANCHOR121]
+	strb	w0, [x20, #:lo12:.LANCHOR174]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13169,146 +13732,167 @@ ftl_flush:
 	.global	flash_prog_page_en
 	.type	flash_prog_page_en, %function
 flash_prog_page_en:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR18
+	and	w23, w0, 255
+	and	w0, w5, 255
 	stp	x19, x20, [sp, 16]
+	str	w0, [x29, 124]
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	mov	w20, w1
-	stp	x25, x26, [sp, 64]
-	mov	x23, x2
+	stp	x27, x28, [sp, 80]
+	mov	x22, x2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	mov	x22, x3
-	mov	w25, w4
-	and	w21, w5, 255
+	mov	x21, x3
+	stp	x25, x26, [sp, 64]
+	mov	w28, w4
 	ubfx	x19, x20, 24, 2
-	cmp	w0, w24
-	bhi	.L2216
-	adrp	x1, .LANCHOR174
+	cmp	w0, w23
+	bhi	.L2304
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 478
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 546
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2216:
+.L2304:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w26, [x0, w24, sxtw]
-	cbnz	w19, .L2226
+	ldrb	w27, [x0, w23, sxtw]
+	cbnz	w19, .L2315
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2218
+	cbz	w1, .L2306
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2226
-.L2218:
+	cbz	w1, .L2315
+.L2306:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2219
+	cbz	w0, .L2307
 	add	w19, w19, w1, lsl 1
-.L2217:
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2220
-	adrp	x0, .LC128
+.L2305:
+	adrp	x24, .LANCHOR14
+	adrp	x25, .LC130
+	add	x24, x24, :lo12:.LANCHOR14
+	add	x25, x25, :lo12:.LC130
+	adrp	x26, .LANCHOR163
+.L2311:
+	ldr	w0, [x24]
+	tbz	x0, 4, .L2308
+	mov	w3, w19
 	mov	w2, w20
-	mov	w1, w26
-	add	x0, x0, :lo12:.LC128
+	mov	w1, w27
+	mov	x0, x25
 	bl	printf
-.L2220:
+.L2308:
+	mov	w4, w28
+	mov	x3, x21
+	mov	x2, x22
 	mov	w1, w19
-	mov	w4, w25
-	mov	x3, x22
-	mov	x2, x23
-	mov	w0, w26
+	mov	w0, w27
 	bl	flash_prog_page
-	mov	w19, w0
-	cbz	w21, .L2221
-	adrp	x26, .LANCHOR161
-	adrp	x21, .LANCHOR162
-	mov	w4, w25
+	mov	w5, w0
+	ldr	w0, [x29, 124]
+	cbz	w0, .L2309
+	adrp	x6, .LANCHOR164
+	ldr	x3, [x26, #:lo12:.LANCHOR163]
+	mov	w4, w28
+	str	x6, [x29, 112]
+	ldr	x2, [x6, #:lo12:.LANCHOR164]
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR161]
-	mov	w0, w24
-	ldr	x2, [x21, #:lo12:.LANCHOR162]
+	mov	w0, w23
+	str	w5, [x29, 104]
 	bl	flash_read_page_en
 	cmp	w0, 512
+	ldr	x6, [x29, 112]
+	mov	w4, w0
 	ccmn	w0, #1, 4, ne
-	beq	.L2222
-	ldr	x0, [x21, #:lo12:.LANCHOR162]
-	ldr	w1, [x23]
+	mov	x7, x6
+	beq	.L2310
+	ldr	x0, [x6, #:lo12:.LANCHOR164]
+	ldr	w1, [x22]
+	ldr	w5, [x29, 104]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2222
-	ldr	x0, [x26, #:lo12:.LANCHOR161]
-	ldr	w1, [x22]
+	bne	.L2310
+	ldr	x0, [x26, #:lo12:.LANCHOR163]
+	ldr	w1, [x21]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2221
-.L2222:
+	beq	.L2309
+.L2310:
+	str	w4, [x29, 112]
 	mov	w3, 4
-	mov	x1, x23
+	str	x7, [x29, 104]
 	mov	w2, w3
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
-	bl	rknand_print_hex
-	mov	w3, 4
 	mov	x1, x22
-	mov	w2, w3
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
-	bl	rknand_print_hex
-	ldr	x1, [x26, #:lo12:.LANCHOR161]
-	mov	w3, 4
 	adrp	x0, .LC131
-	mov	w2, w3
 	add	x0, x0, :lo12:.LC131
 	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR162]
 	mov	w3, 4
-	adrp	x0, .LC132
+	mov	x1, x21
 	mov	w2, w3
+	adrp	x0, .LC132
 	add	x0, x0, :lo12:.LC132
 	bl	rknand_print_hex
-.L2223:
-	mov	w1, w20
+	adrp	x0, .LANCHOR163
+	mov	w3, 4
+	mov	w2, w3
+	ldr	x1, [x0, #:lo12:.LANCHOR163]
 	adrp	x0, .LC133
 	add	x0, x0, :lo12:.LC133
+	bl	rknand_print_hex
+	ldr	x7, [x29, 104]
+	mov	w3, 4
+	adrp	x0, .LC134
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC134
+	ldr	x1, [x7, #:lo12:.LANCHOR164]
+	bl	rknand_print_hex
+	ldr	w4, [x29, 112]
+	cmp	w4, 512
+	beq	.L2311
+.L2313:
+	mov	w1, w20
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-	mov	w2, 506
-	adrp	x1, .LANCHOR174
+	mov	w2, 577
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR174
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2224
-.L2219:
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
-	ldrh	w0, [x0, w1, uxtw 1]
-	add	w19, w0, w19
-	b	.L2217
-.L2226:
-	mov	w19, w20
-	b	.L2217
-.L2221:
-	mov	w0, w19
-	cmn	w19, #1
-	beq	.L2223
-.L2224:
+.L2312:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
+.L2307:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrh	w0, [x0, w1, uxtw 1]
+	add	w19, w0, w19
+	b	.L2305
+.L2315:
+	mov	w19, w20
+	b	.L2305
+.L2309:
+	mov	w0, w5
+	cmn	w5, #1
+	bne	.L2312
+	b	.L2313
 	.size	flash_prog_page_en, .-flash_prog_page_en
 	.section	.text.ftl_test_block,"ax",@progbits
 	.align	2
@@ -13320,113 +13904,113 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR175
+	adrp	x25, .LANCHOR176
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR106
+	adrp	x26, .LANCHOR108
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR106
+	add	x0, x26, :lo12:.LANCHOR108
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR98
+	adrp	x27, .LANCHOR101
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR175]
+	add	x0, x27, :lo12:.LANCHOR101
+	str	wzr, [x25, #:lo12:.LANCHOR176]
 	str	x0, [x29, 96]
-.L2238:
+.L2332:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2248
-	add	x0, x27, :lo12:.LANCHOR98
+	bls	.L2342
+	add	x0, x27, :lo12:.LANCHOR101
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2249
-.L2247:
+	b	.L2343
+.L2341:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2239
-	adrp	x0, .LC134
+	tbz	x0, 12, .L2333
+	adrp	x0, .LC136
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC134
+	add	x0, x0, :lo12:.LC136
 	bl	printf
-.L2239:
+.L2333:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2240
+	cbnz	w20, .L2334
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2241
-.L2240:
+	bcs	.L2335
+.L2334:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2241
-	adrp	x0, .LANCHOR105
+	cbnz	w0, .L2335
+	adrp	x0, .LANCHOR107
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR105]
+	ldrh	w7, [x0, #:lo12:.LANCHOR107]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2242
-	adrp	x0, .LANCHOR68
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L2336
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 2
-	bne	.L2264
+	bne	.L2358
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2264
+	cbz	w0, .L2358
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2264
-.L2246:
-	adrp	x0, .LANCHOR68
+	cbnz	w0, .L2358
+.L2340:
+	adrp	x0, .LANCHOR69
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	add	w26, w26, w0, lsl 24
-.L2245:
-	adrp	x0, .LANCHOR121
+.L2339:
+	adrp	x0, .LANCHOR123
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR175
+	add	x3, x25, :lo12:.LANCHOR176
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR121]
+	ldrb	w4, [x0, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2241
-.L2264:
+	cbz	w0, .L2335
+.L2358:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2241:
+.L2335:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2249:
+.L2343:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2247
+	bhi	.L2341
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2238
-.L2242:
-	cbz	w23, .L2245
-	b	.L2246
-.L2248:
-	cbz	w23, .L2250
+	b	.L2332
+.L2336:
+	cbz	w23, .L2339
+	b	.L2340
+.L2342:
+	cbz	w23, .L2344
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -13434,7 +14018,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2250:
+.L2344:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13469,18 +14053,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2265
-	mov	w2, 2150
-	adrp	x1, .LANCHOR176
+	bne	.L2359
+	mov	w2, 2203
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC133
+	adrp	x0, .LC135
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC133
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2265:
+.L2359:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13497,68 +14081,68 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR121
+	adrp	x21, .LANCHOR123
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR178
+	adrp	x22, .LANCHOR179
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR105
+	adrp	x23, .LANCHOR107
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR178
-	add	x28, x23, :lo12:.LANCHOR105
+	ldrb	w2, [x21, #:lo12:.LANCHOR123]
+	add	x25, x22, :lo12:.LANCHOR179
+	add	x28, x23, :lo12:.LANCHOR107
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR177
+	adrp	x20, .LANCHOR178
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR177
+	add	x0, x20, :lo12:.LANCHOR178
 	bl	ftl_memset
-.L2269:
-	add	x0, x22, :lo12:.LANCHOR178
-	ldrb	w6, [x22, #:lo12:.LANCHOR178]
-	ldrh	w19, [x23, #:lo12:.LANCHOR105]
+.L2363:
+	add	x0, x22, :lo12:.LANCHOR179
+	ldrb	w6, [x22, #:lo12:.LANCHOR179]
+	ldrh	w19, [x23, #:lo12:.LANCHOR107]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR177
-	str	w27, [x20, #:lo12:.LANCHOR177]
+	add	x0, x20, :lo12:.LANCHOR178
+	str	w27, [x20, #:lo12:.LANCHOR178]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2270
+	tbz	x0, 12, .L2364
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC135
+	adrp	x0, .LC137
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC135
+	add	x0, x0, :lo12:.LC137
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2270:
-	adrp	x1, .LANCHOR80
+.L2364:
+	adrp	x1, .LANCHOR83
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bhi	.L2271
-	adrp	x19, .LANCHOR179
+	bhi	.L2365
+	adrp	x19, .LANCHOR180
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR179
+	add	x19, x19, :lo12:.LANCHOR180
 	add	x3, x3, :lo12:.LC0
-.L2278:
+.L2372:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2272
+	bls	.L2366
 	mov	x0, 0
-.L2277:
+.L2371:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13567,32 +14151,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2273
+	bhi	.L2367
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2276:
+.L2370:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2272:
+.L2366:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2278
+	beq	.L2372
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR121]
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13600,53 +14184,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2279:
-	ldrb	w4, [x21, #:lo12:.LANCHOR121]
+.L2373:
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR180
+	adrp	x0, .LANCHOR181
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2280
-	ldrb	w1, [x0, #:lo12:.LANCHOR180]
-	cbz	w1, .L2281
-.L2280:
-	strb	wzr, [x0, #:lo12:.LANCHOR180]
-	b	.L2269
-.L2273:
+	beq	.L2374
+	ldrb	w1, [x0, #:lo12:.LANCHOR181]
+	cbz	w1, .L2375
+.L2374:
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	b	.L2363
+.L2367:
 	cmp	w2, 255
-	bne	.L2276
+	bne	.L2370
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2277
+	bne	.L2371
 	mov	w24, w0
-	b	.L2276
-.L2271:
+	b	.L2370
+.L2365:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2279
+	cbnz	w0, .L2373
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2279
-.L2281:
-	cbnz	w24, .L2282
-.L2290:
-	adrp	x0, .LANCHOR178
-	ldrb	w0, [x0, #:lo12:.LANCHOR178]
+	b	.L2373
+.L2375:
+	cbnz	w24, .L2376
+.L2384:
+	adrp	x0, .LANCHOR179
+	ldrb	w0, [x0, #:lo12:.LANCHOR179]
 	cmp	w0, 255
-	bne	.L2284
-	adrp	x1, .LANCHOR179
+	bne	.L2378
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2284:
+.L2378:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13655,17 +14239,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2282:
+.L2376:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR179
+	adrp	x20, .LANCHOR180
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR179
+	add	x20, x20, :lo12:.LANCHOR180
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2285:
+.L2379:
 	cmp	w19, 7
-	bhi	.L2290
+	bhi	.L2384
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13673,24 +14257,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2286
+	bhi	.L2380
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2287:
-	ldrh	w1, [x26, #:lo12:.LANCHOR105]
+.L2381:
+	ldrh	w1, [x26, #:lo12:.LANCHOR107]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2288
-.L2286:
+	b	.L2382
+.L2380:
 	cmp	w23, 255
-	bne	.L2287
-.L2288:
+	bne	.L2381
+.L2382:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2285
+	b	.L2379
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13698,32 +14282,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR181
-	adrp	x1, .LANCHOR180
+	adrp	x0, .LANCHOR182
+	adrp	x1, .LANCHOR181
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR180]
-	adrp	x1, .LANCHOR182
+	strb	w0, [x1, #:lo12:.LANCHOR181]
+	adrp	x1, .LANCHOR183
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR182]
+	strb	w0, [x1, #:lo12:.LANCHOR183]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR7]
 	adrp	x1, .LANCHOR6
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR100
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR178
+	adrp	x21, .LANCHOR179
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR105
+	adrp	x26, .LANCHOR107
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR97]
+	str	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -13731,19 +14315,19 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR121
+	adrp	x25, .LANCHOR123
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR178
+	add	x0, x21, :lo12:.LANCHOR179
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR105
-	add	x25, x25, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LANCHOR107
+	add	x25, x25, :lo12:.LANCHOR123
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strh	wzr, [x0, 2]
-.L2306:
+.L2400:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13751,31 +14335,31 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2305
-.L2310:
+	bne	.L2399
+.L2404:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2306
+	bne	.L2400
 	mov	w24, 0
-.L2307:
+.L2401:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2311
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	tbz	x0, 12, .L2405
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2311:
+.L2405:
 	cmn	w19, #1
-	bne	.L2312
+	bne	.L2406
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
@@ -13783,7 +14367,7 @@ ftl_info_blk_init:
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2304:
+.L2398:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13791,12 +14375,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2305:
+.L2399:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR177
-	add	x7, x7, :lo12:.LANCHOR177
+	adrp	x7, .LANCHOR178
+	add	x7, x7, :lo12:.LANCHOR178
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13809,7 +14393,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2308
+	bne	.L2402
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13817,58 +14401,58 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2308:
+.L2402:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2309
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	tbz	x0, 12, .L2403
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2309:
+.L2403:
 	cmn	w5, #1
-	beq	.L2310
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2404
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2310
+	bne	.L2404
 	mov	w19, w24
-	b	.L2307
-.L2312:
+	b	.L2401
+.L2406:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR121
+	adrp	x26, .LANCHOR123
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LANCHOR123
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR178
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	add	x0, x21, :lo12:.LANCHOR179
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR177
-	add	x24, x24, :lo12:.LANCHOR177
+	adrp	x24, .LANCHOR178
+	add	x24, x24, :lo12:.LANCHOR178
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR178]
-	ldrh	w0, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR107
+	ldrb	w25, [x21, #:lo12:.LANCHOR179]
+	ldrh	w0, [x0, #:lo12:.LANCHOR107]
 	madd	w25, w25, w0, w23
-.L2314:
-	tbnz	w23, #31, .L2317
+.L2408:
+	tbnz	w23, #31, .L2411
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13876,16 +14460,16 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2315
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2409
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2315
-.L2317:
-	add	x21, x21, :lo12:.LANCHOR178
+	bne	.L2409
+.L2411:
+	add	x21, x21, :lo12:.LANCHOR179
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -13894,12 +14478,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2304
-.L2315:
+	b	.L2398
+.L2409:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2314
+	b	.L2408
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13916,48 +14500,48 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2333
+	cbz	w1, .L2427
 	str	wzr, [x0, 520]
-.L2333:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR183
-	adrp	x21, .LANCHOR99
-	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR183
-	add	x21, x21, :lo12:.LANCHOR99
+.L2427:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR184
+	adrp	x21, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR83
+	add	x22, x22, :lo12:.LANCHOR184
+	add	x21, x21, :lo12:.LANCHOR102
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2334:
-	adrp	x23, .LANCHOR97
+.L2428:
+	adrp	x23, .LANCHOR100
 	mov	x24, x23
-.L2337:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2431:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2335
+	bcc	.L2429
 	bl	ftl_ext_alloc_new_blk
-.L2335:
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+.L2429:
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2336
+	bne	.L2430
 	adrp	x0, .LC0
-	mov	w2, 1746
+	mov	w2, 1798
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2336:
-	ldr	x1, [x24, #:lo12:.LANCHOR97]
+.L2430:
+	ldr	x1, [x24, #:lo12:.LANCHOR100]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR177
-	add	x25, x27, :lo12:.LANCHOR177
+	adrp	x26, .LANCHOR123
+	adrp	x27, .LANCHOR178
+	add	x25, x27, :lo12:.LANCHOR178
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13965,43 +14549,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR105
-	ldrh	w2, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR107
+	ldrh	w2, [x0, #:lo12:.LANCHOR107]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR121]
+	ldrb	w2, [x26, #:lo12:.LANCHOR123]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR121]
+	ldrb	w4, [x26, #:lo12:.LANCHOR123]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR177]
+	str	wzr, [x27, #:lo12:.LANCHOR178]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR97]
+	ldr	x2, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2337
+	beq	.L2431
 	cmn	w0, #1
-	adrp	x0, .LANCHOR182
-	beq	.L2338
-	ldrb	w1, [x0, #:lo12:.LANCHOR182]
-	cbz	w1, .L2339
-.L2338:
-	strb	wzr, [x0, #:lo12:.LANCHOR182]
-	b	.L2334
-.L2339:
+	adrp	x0, .LANCHOR183
+	beq	.L2432
+	ldrb	w1, [x0, #:lo12:.LANCHOR183]
+	cbz	w1, .L2433
+.L2432:
+	strb	wzr, [x0, #:lo12:.LANCHOR183]
+	b	.L2428
+.L2433:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14017,23 +14601,23 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR117
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
-	strh	wzr, [x0, #:lo12:.LANCHOR115]
+	adrp	x20, .LANCHOR100
+	strh	wzr, [x0, #:lo12:.LANCHOR117]
 	mov	w19, 21
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR177
+	adrp	x24, .LANCHOR178
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR102
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR177
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	add	x3, x24, :lo12:.LANCHOR178
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w19, w0
@@ -14049,33 +14633,33 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2350
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR184
+	tbz	x0, 12, .L2444
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	adrp	x1, .LANCHOR185
 	and	w4, w21, 65535
 	mov	w3, w22
-	mov	w2, 1790
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 1842
+	add	x1, x1, :lo12:.LANCHOR185
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2350:
-	adrp	x26, .LANCHOR121
-	adrp	x28, .LANCHOR105
+.L2444:
+	adrp	x26, .LANCHOR123
+	adrp	x28, .LANCHOR107
 	mov	w5, 20038
-	add	x26, x26, :lo12:.LANCHOR121
-	add	x28, x28, :lo12:.LANCHOR105
+	add	x26, x26, :lo12:.LANCHOR123
+	add	x28, x28, :lo12:.LANCHOR107
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2351:
+.L2445:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2356
+	tbnz	x0, 15, .L2450
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR177
+	add	x3, x24, :lo12:.LANCHOR178
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14084,22 +14668,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2352
+	beq	.L2446
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2352
-.L2356:
+	bne	.L2446
+.L2450:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2354
+	bgt	.L2448
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2354:
+.L2448:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14115,14 +14699,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR63
-	strh	w1, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR64
+	strh	w1, [x0, #:lo12:.LANCHOR64]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2352:
+.L2446:
 	add	w23, w23, 1
-	b	.L2351
+	b	.L2445
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14139,44 +14723,44 @@ ftl_low_format_data_init:
 	str	x21, [sp, 32]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	mov	w21, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2365
-	adrp	x1, .LANCHOR185
+	bcs	.L2459
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 1973
-	add	x1, x1, :lo12:.LANCHOR185
+	mov	w2, 2025
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2365:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2459:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	adrp	x1, .LANCHOR99
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w2, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldrh	w2, [x1, #:lo12:.LANCHOR102]
 	mov	w1, 21
 	sub	w1, w1, w2
 	strh	w21, [x0, 416]
@@ -14186,8 +14770,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR186
-	ldrh	w1, [x1, #:lo12:.LANCHOR186]
+	adrp	x1, .LANCHOR187
+	ldrh	w1, [x1, #:lo12:.LANCHOR187]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14197,7 +14781,7 @@ ftl_low_format_data_init:
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	mov	w20, -1
@@ -14213,7 +14797,7 @@ ftl_low_format_data_init:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -14254,13 +14838,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR187
+	adrp	x20, .LANCHOR188
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR187
+	add	x20, x20, :lo12:.LANCHOR188
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14268,30 +14852,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2370:
+.L2464:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2368
-	mov	w2, 2027
+	bhi	.L2462
+	mov	w2, 2079
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2368:
+.L2462:
 	cmp	w21, 255
-	beq	.L2369
-	adrp	x0, .LANCHOR105
-	ldrh	w1, [x0, #:lo12:.LANCHOR105]
+	beq	.L2463
+	adrp	x0, .LANCHOR107
+	ldrh	w1, [x0, #:lo12:.LANCHOR107]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2369:
+.L2463:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2370
+	bne	.L2464
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14305,29 +14889,29 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2371:
+.L2465:
 	cmp	x0, x2
-	bne	.L2372
-	adrp	x21, .LANCHOR97
+	bne	.L2466
+	adrp	x21, .LANCHOR100
 	mov	w1, 21574
-	adrp	x24, .LANCHOR59
-	add	x24, x24, :lo12:.LANCHOR59
-	ldr	x0, [x21, #:lo12:.LANCHOR97]
+	adrp	x24, .LANCHOR60
+	add	x24, x24, :lo12:.LANCHOR60
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
 	movk	w1, 0x494c, lsl 16
 	mov	w20, 0
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2373:
+.L2467:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
-	adrp	x23, .LANCHOR98
+	adrp	x23, .LANCHOR101
 	cmp	w0, w20
-	bhi	.L2381
+	bhi	.L2476
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR98]
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR97]
+	ldr	x6, [x21, #:lo12:.LANCHOR100]
 	cmp	w2, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 47]
@@ -14341,7 +14925,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2384:
+.L2479:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14350,10 +14934,10 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2384
+	bne	.L2479
 	mul	w5, w5, w8
 	mov	w4, 16
-	add	w0, w3, w8
+	add	w0, w8, w3
 	sdiv	w4, w4, w2
 	add	w0, w5, w0, uxth
 	strh	w0, [x6, 148]
@@ -14362,28 +14946,28 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2385
-	adrp	x0, .LC140
+	tbz	x0, 12, .L2480
+	adrp	x0, .LC142
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2073
-	add	x0, x0, :lo12:.LC140
+	mov	w1, 2126
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2385:
-	ldr	x0, [x21, #:lo12:.LANCHOR97]
+.L2480:
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	adrp	x0, .LANCHOR106
-	ldrb	w13, [x23, #:lo12:.LANCHOR98]
-	ldr	x2, [x21, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR108
+	ldrb	w13, [x23, #:lo12:.LANCHOR101]
+	ldr	x2, [x21, #:lo12:.LANCHOR100]
 	mov	w4, 21
-	ldrb	w15, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR99
+	ldrb	w15, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR102
 	and	w16, w13, 65535
 	ldr	x14, [x22, #:lo12:.LANCHOR7]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
 	mov	w3, 0
 	ldrh	w12, [x2, 134]
 	sub	w0, w4, w0
@@ -14392,9 +14976,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2386:
+.L2481:
 	cmp	w20, w12
-	bcc	.L2392
+	bcc	.L2487
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14410,37 +14994,41 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2372:
+.L2466:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2371
-.L2381:
+	b	.L2465
+.L2476:
+	adrp	x0, .LANCHOR71
 	strh	w20, [x24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbnz	w0, .L2468
 	mov	w0, w20
 	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR98]
-	adrp	x0, .LANCHOR106
+.L2468:
+	ldrb	w11, [x23, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR108
 	ldr	x6, [x22, #:lo12:.LANCHOR7]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR106]
+	ldrb	w14, [x0, #:lo12:.LANCHOR108]
 	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR97]
+	ldr	x13, [x21, #:lo12:.LANCHOR100]
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2374:
+.L2469:
 	cmp	w8, w14
-	bcs	.L2378
+	bcs	.L2473
 	add	w15, w11, w7
-	b	.L2379
-.L2377:
+	b	.L2474
+.L2472:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2375
+	cbz	w0, .L2470
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14448,29 +15036,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2376:
+.L2471:
 	add	w7, w7, 1
-.L2379:
+.L2474:
 	cmp	w7, w15
-	bne	.L2377
+	bne	.L2472
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2374
-.L2375:
+	b	.L2469
+.L2470:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2376
-.L2378:
-	cbnz	w10, .L2380
+	b	.L2471
+.L2473:
+	cbnz	w10, .L2475
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2380:
+.L2475:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2373
-.L2392:
+	b	.L2467
+.L2487:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14478,48 +15066,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2387:
+.L2482:
 	cmp	w5, w15
-	bcc	.L2394
+	bcc	.L2489
 	add	w20, w20, 1
-	add	w1, w16, w1
+	add	w1, w1, w16
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2386
-.L2390:
+	b	.L2481
+.L2485:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2388
+	tbnz	x11, 0, .L2483
 	cmp	w13, 1
-	bls	.L2393
+	bls	.L2488
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2389:
+.L2484:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2388:
+.L2483:
 	add	x7, x7, 1
-.L2391:
+.L2486:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2390
+	bcc	.L2485
 	add	w5, w5, 1
-	add	w6, w6, w4
+	add	w6, w4, w6
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2387
-.L2393:
+	b	.L2482
+.L2488:
 	mov	w0, w1
-	b	.L2389
-.L2394:
+	b	.L2484
+.L2489:
 	mov	x7, 0
-	b	.L2391
+	b	.L2486
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14528,27 +15116,27 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	adrp	x2, .LANCHOR6
 	mov	w3, 0
 	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	mov	w5, 0
 	ldrh	w7, [x2, #:lo12:.LANCHOR6]
 	adrp	x2, .LANCHOR7
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2405:
+.L2500:
 	cmp	w1, w7
-	bcc	.L2409
+	bcc	.L2504
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14559,29 +15147,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2409:
+.L2504:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2406
+	bne	.L2501
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2407:
+.L2502:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2405
-.L2406:
+	b	.L2500
+.L2501:
 	cmp	w6, 16
-	bne	.L2408
+	bne	.L2503
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2407
-.L2408:
+	b	.L2502
+.L2503:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2407
+	b	.L2502
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14603,50 +15191,50 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2414
+	bne	.L2509
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR111
+	adrp	x1, .LANCHOR113
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR111]
+	ldr	x20, [x1, #:lo12:.LANCHOR113]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2415
+	beq	.L2510
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR175
+	adrp	x0, .LANCHOR176
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR175
+	add	x6, x0, :lo12:.LANCHOR176
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR83
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	mov	x0, x20
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR121]
+	ldrb	w3, [x0, #:lo12:.LANCHOR123]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2415:
+.L2510:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2414:
+.L2509:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14655,377 +15243,502 @@ ftl_write_last_log_page:
 	.global	ftl_open_sblk_recovery
 	.type	ftl_open_sblk_recovery, %function
 ftl_open_sblk_recovery:
-	stp	x29, x30, [sp, -144]!
+	stp	x29, x30, [sp, -224]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR14
-	stp	x27, x28, [sp, 80]
-	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	adrp	x21, .LANCHOR14
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x25, x26, [sp, 64]
 	mov	x25, x1
-	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2421
-	ldrh	w1, [x28, 2]
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
-	bl	printf
-.L2421:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2422
-	ldrb	w1, [x28, 5]
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
-	bl	printf
-.L2422:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2423
-	ldrh	w1, [x28]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2516
+	ldrh	w1, [x19, 2]
 	adrp	x0, .LC144
 	add	x0, x0, :lo12:.LC144
 	bl	printf
-.L2423:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2424
-	ldrh	w2, [x28, 18]
+.L2516:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2517
+	ldrb	w1, [x19, 5]
 	adrp	x0, .LC145
-	ldrh	w1, [x28, 16]
 	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2424:
-	ldrh	w0, [x28, 10]
-	strh	w0, [x28, 14]
+.L2517:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2518
+	ldrh	w1, [x19]
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
+	bl	printf
+.L2518:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2519
+	ldrh	w2, [x19, 18]
+	adrp	x0, .LC147
+	ldrh	w1, [x19, 16]
+	add	x0, x0, :lo12:.LC147
+	bl	printf
+.L2519:
+	ldrh	w0, [x19, 10]
+	strh	w0, [x19, 14]
 	adrp	x0, .LANCHOR6
-	ldrh	w1, [x28]
+	ldrh	w1, [x19]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2420
+	bcs	.L2515
 	mov	w0, 1
+	add	x26, x29, 160
 	bl	buf_alloc
-	ldrb	w20, [x28, 5]
-	mov	x19, x0
-	ldrh	w21, [x28, 2]
-	adrp	x26, .LANCHOR121
-	mov	w27, 0
-	add	x0, x26, :lo12:.LANCHOR121
-	adrp	x23, .LANCHOR80
+	mov	x20, x0
+	mov	w2, 64
+	mov	w1, 255
+	mov	x0, x26
+	bl	ftl_memset
+	ldrb	w22, [x19, 5]
+	adrp	x0, .LANCHOR123
+	ldrh	w23, [x19, 2]
+	add	x0, x0, :lo12:.LANCHOR123
+	mov	w27, 2
+	adrp	x24, .LANCHOR83
 	str	x0, [x29, 128]
-.L2427:
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
-	cmp	w0, w21
-	bhi	.L2440
-.L2430:
-	ldrh	w0, [x28, 10]
-	ldrh	w1, [x28, 6]
-	ldrh	w2, [x23, #:lo12:.LANCHOR80]
+	str	wzr, [x29, 152]
+.L2521:
+	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	cmp	w0, w23
+	bhi	.L2534
+.L2524:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrh	w2, [x24, #:lo12:.LANCHOR83]
 	add	w1, w1, w0
-	ldrb	w0, [x28, 9]
-	strh	w21, [x28, 2]
-	strb	w20, [x28, 5]
+	ldrb	w0, [x19, 9]
+	strh	w23, [x19, 2]
+	strb	w22, [x19, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2441
-	adrp	x1, .LANCHOR188
+	beq	.L2535
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1472
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1480
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2441:
-	adrp	x21, .LANCHOR111
-	ldrh	w3, [x28, 10]
+.L2535:
+	adrp	x2, .LANCHOR113
+	ldrh	w3, [x19, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2442:
+	ldr	x4, [x2, #:lo12:.LANCHOR113]
+	str	x2, [x29, 136]
+.L2536:
 	cmp	w1, w3
-	bcc	.L2444
-	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR9
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
-	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	sub	w20, w20, w3
-	and	w20, w20, 65535
-	tbz	x0, 12, .L2445
-	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR9]
+	bcc	.L2538
+	ldrb	w22, [x19, 9]
+	adrp	x23, .LANCHOR9
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	madd	w22, w22, w1, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	sub	w22, w22, w3
+	and	w22, w22, 65535
+	tbz	x0, 12, .L2539
+	ldrh	w1, [x19]
+	ldr	x2, [x23, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC146
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC148
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-.L2445:
-	ldr	x0, [x24, #:lo12:.LANCHOR9]
-	adrp	x25, .LANCHOR121
-	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR73
-	adrp	x26, .LC147
-	add	x24, x24, :lo12:.LANCHOR73
-	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC147
-	strh	w20, [x0, x1, lsl 1]
-	mov	w20, 0
-	mov	x0, x19
+.L2539:
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
+	ldrh	w1, [x19]
+	strh	w22, [x0, x1, lsl 1]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2540
+	ldp	w1, w2, [x29, 160]
+	adrp	x0, .LC149
+	ldp	w3, w4, [x29, 168]
+	add	x0, x0, :lo12:.LC149
+	bl	printf
+.L2540:
+	adrp	x25, .LANCHOR123
+	ldr	x0, [x20, 8]
+	mov	w1, 0
+	mov	x23, 0
+	ldrb	w2, [x25, #:lo12:.LANCHOR123]
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR76
+	add	x0, x0, :lo12:.LANCHOR76
+	str	x0, [x29, 112]
+.L2541:
+	adrp	x0, .LANCHOR76
+	str	w23, [x29, 148]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	mul	w0, w0, w27
+	cmp	w23, w0
+	bcc	.L2554
+	mov	x0, x20
 	bl	buf_free
-.L2446:
-	ldrb	w0, [x24]
-	cmp	w20, w0, lsl 1
-	bcc	.L2449
-	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
-	ldrb	w2, [x28, 9]
+	ldrh	w1, [x19, 12]
+	ldrh	w0, [x24, #:lo12:.LANCHOR83]
+	ldrb	w2, [x19, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR111]
+	ldr	x1, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR113]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2450
-	adrp	x1, .LANCHOR188
+	beq	.L2555
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1502
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1554
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2450:
-	ldrh	w0, [x28, 6]
+.L2555:
+	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2420
+	bne	.L2515
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+.L2515:
 	ldp	x19, x20, [sp, 16]
-	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	b	ftl_write_last_log_page
-.L2440:
-	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR105
-	add	x0, x24, :lo12:.LANCHOR105
+	ldp	x29, x30, [sp], 224
+	ret
+.L2534:
+	ldrb	w22, [x19, 5]
+	adrp	x0, .LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR107
 	str	x0, [x29, 136]
-.L2428:
-	ldrb	w0, [x28, 9]
-	cmp	w0, w20
-	bhi	.L2439
-	add	w21, w21, 1
-	strb	wzr, [x28, 5]
-	and	w21, w21, 65535
-	b	.L2427
-.L2439:
-	add	x0, x28, x20, sxtw 1
+.L2522:
+	ldrb	w0, [x19, 9]
+	cmp	w0, w22
+	bhi	.L2533
+	add	w23, w23, 1
+	strb	wzr, [x19, 5]
+	and	w23, w23, 65535
+	b	.L2521
+.L2533:
+	add	x0, x19, x22, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2429
+	beq	.L2523
 	ldr	x1, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR121]
-	ldr	x2, [x19, 24]
-	ldrh	w5, [x1]
-	ldr	x1, [x19, 8]
-	madd	w0, w5, w0, w21
+	ldr	x2, [x20, 24]
+	ldrh	w1, [x1]
+	madd	w0, w1, w0, w23
+	ldr	x1, [x20, 8]
+	str	w0, [x29, 148]
+	adrp	x0, .LANCHOR123
+	ldrb	w3, [x0, #:lo12:.LANCHOR123]
+	ldr	w0, [x29, 148]
 	bl	ftl_read_ppa_page
-	mov	w24, w0
+	mov	w28, w0
 	cmp	w0, 512
-	beq	.L2430
+	beq	.L2524
 	cmn	w0, #1
-	beq	.L2431
-	ldr	x0, [x19, 24]
+	beq	.L2525
+	ldr	x0, [x20, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2431
+	bne	.L2525
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2431
-	ldr	x0, [x19, 8]
+	bne	.L2525
+	ldr	x0, [x20, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2430
-.L2431:
-	adrp	x0, .LANCHOR181
+	beq	.L2524
+.L2525:
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
-	ldrb	w0, [x28, 9]
-	ldrh	w1, [x28, 10]
-	madd	w0, w0, w21, w20
+	strb	w1, [x0, #:lo12:.LANCHOR182]
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x19, 10]
+	madd	w0, w0, w23, w22
 	cmp	w1, w0
-	beq	.L2432
-	adrp	x1, .LANCHOR188
+	beq	.L2526
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1395
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1399
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2432:
-	ldrh	w0, [x28, 10]
-	ldrh	w1, [x28, 6]
-	ldrb	w2, [x28, 9]
+.L2526:
+	ldrh	w0, [x19, 10]
+	ldrh	w1, [x19, 6]
+	ldrb	w2, [x19, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrh	w0, [x24, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2433
-	adrp	x1, .LANCHOR188
+	beq	.L2527
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
-	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1400
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2433:
-	cmn	w24, #1
-	beq	.L2435
-	ldr	x0, [x19, 24]
+.L2527:
+	cmn	w28, #1
+	beq	.L2529
+	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2435
+	beq	.L2529
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2437
-	ldr	x3, [x19, 24]
+	cbz	x25, .L2531
+	ldr	x3, [x20, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2437
+	beq	.L2531
 	cmn	w0, #1
-	beq	.L2437
-	adrp	x6, .LANCHOR99
-	mov	w5, 21
+	beq	.L2531
+	adrp	x4, .LANCHOR102
+	mov	w28, 21
 	mov	w27, 1
-	ldrh	w7, [x6, #:lo12:.LANCHOR99]
-	sub	w1, w5, w7
-	lsr	w2, w0, w7
-	adrp	x7, .LANCHOR98
+	ldrh	w5, [x4, #:lo12:.LANCHOR102]
+	sub	w1, w28, w5
+	lsr	w2, w0, w5
+	adrp	x5, .LANCHOR101
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x7, #:lo12:.LANCHOR98]
+	ldrb	w2, [x5, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2437
+	bne	.L2531
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR177
-	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR177
-	stp	w5, w10, [x29, 112]
-	str	x8, [x29, 120]
+	adrp	x6, .LANCHOR178
+	ldr	w7, [x3]
+	add	x2, x6, :lo12:.LANCHOR178
+	str	w7, [x29, 120]
+	str	x6, [x29, 152]
 	ldrb	w3, [x1]
-	ldr	x1, [x19, 8]
-	stp	x7, x6, [x29, 96]
+	ldr	x1, [x20, 8]
+	stp	x5, x4, [x29, 104]
 	bl	ftl_read_ppa_page
-	ldr	x8, [x29, 120]
-	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR177]
-	cmp	w10, w0
-	bhi	.L2437
-	ldr	x0, [x19, 24]
+	ldr	x6, [x29, 152]
+	ldr	w7, [x29, 120]
+	ldr	w0, [x6, #:lo12:.LANCHOR178]
+	cmp	w7, w0
+	bhi	.L2531
+	ldr	x0, [x20, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2435
-	ldp	x7, x6, [x29, 96]
-	ldr	w5, [x29, 112]
-	ldrh	w1, [x6, #:lo12:.LANCHOR99]
-	sub	w5, w5, w1
+	beq	.L2529
+	ldp	x5, x4, [x29, 104]
+	ldrh	w1, [x4, #:lo12:.LANCHOR102]
+	sub	w28, w28, w1
 	lsr	w0, w0, w1
-	lsl	w27, w27, w5
+	lsl	w27, w27, w28
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x7, #:lo12:.LANCHOR98]
+	ldrb	w0, [x5, #:lo12:.LANCHOR101]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2435:
-	ldrh	w0, [x28, 6]
-	mov	w27, 1
+.L2529:
+	ldrh	w0, [x19, 6]
+	mov	w27, 4
 	sub	w0, w0, #1
-	strh	w0, [x28, 6]
-	ldrh	w0, [x28, 10]
+	strh	w0, [x19, 6]
+	ldrh	w0, [x19, 10]
 	add	w0, w0, 1
-	strh	w0, [x28, 10]
-.L2429:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2428
-.L2444:
-	ldrh	w2, [x28, 12]
+	strh	w0, [x19, 10]
+	mov	w0, 1
+	str	w0, [x29, 152]
+.L2523:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L2522
+.L2538:
+	ldrh	w2, [x19, 12]
 	add	w2, w2, w1
-	ldr	w2, [x5, x2, lsl 2]
+	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2443
-	add	w20, w0, 1
-	and	w0, w20, 65535
-.L2443:
+	beq	.L2537
+	add	w22, w0, 1
+	and	w0, w22, 65535
+.L2537:
 	add	w1, w1, 1
-	b	.L2442
-.L2449:
-	cbz	w27, .L2447
-	ldrh	w0, [x28, 6]
+	b	.L2536
+.L2554:
+	ldr	w0, [x26, x23, lsl 2]
+	adrp	x28, .LANCHOR100
+	cmn	w0, #1
+	bne	.L2542
+.L2546:
+	ldr	x1, [x28, #:lo12:.LANCHOR100]
+	mov	w22, -1
+	ldr	x0, [x20, 24]
+	ldr	w1, [x1, 8]
+	stp	w1, w22, [x0]
+	stp	w22, wzr, [x0, 8]
+	ldr	x0, [x20, 8]
+	str	wzr, [x0]
+.L2543:
+	ldr	w0, [x29, 152]
+	cbz	w0, .L2548
+	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bls	.L2447
-	mov	x0, x28
+	bls	.L2548
+	add	x0, x21, :lo12:.LANCHOR14
+	mov	x28, x0
+	add	x0, x25, :lo12:.LANCHOR123
+	str	x0, [x29, 128]
+.L2595:
+	mov	x0, x19
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2448
+	ldr	w0, [x28]
+	tbz	x0, 14, .L2550
+	ldr	x0, [x20, 24]
 	mov	w1, w4
-	str	w4, [x29, 136]
-	mov	x0, x26
+	str	w4, [x29, 104]
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	w4, [x29, 136]
-.L2448:
-	adrp	x0, .LANCHOR97
-	ldr	x2, [x19, 24]
-	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	ldr	w0, [x0, 8]
-	str	w0, [x2]
-	str	wzr, [x2, 12]
-	mov	w0, -1
-	stp	w0, w0, [x2, 4]
+	ldr	w4, [x29, 104]
+.L2550:
+	ldr	x0, [x29, 112]
+	ldr	w2, [x29, 148]
+	ldrh	w1, [x19, 6]
+	ldrb	w0, [x0]
+	mul	w0, w0, w27
+	add	w0, w0, 1
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bls	.L2548
+	ldr	x0, [x29, 128]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	ldrb	w3, [x0]
 	mov	w0, w4
-	str	wzr, [x1]
-	ldrb	w3, [x25]
 	bl	ftl_prog_ppa_page
-	ldrh	w0, [x28]
+	mov	w1, w0
+	ldrh	w0, [x19]
+	str	w1, [x29, 104]
 	bl	ftl_vpn_decrement
-.L2447:
-	add	w20, w20, 1
-	b	.L2446
-.L2437:
-	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR118
-	ldr	w0, [x0, #:lo12:.LANCHOR118]
+	ldr	w1, [x29, 104]
+	cmn	w22, #1
+	ccmn	w1, #1, 4, ne
+	beq	.L2551
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2552
+	ldr	x0, [x20, 24]
+	ldrh	w1, [x19, 12]
+	ldrh	w3, [x19, 10]
+	add	w3, w3, w1
+	ldp	w1, w2, [x0, 4]
+	sub	w3, w3, #1
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	bl	printf
+.L2552:
+	ldr	x0, [x20, 24]
+	ldrh	w1, [x19, 12]
+	ldrh	w2, [x19, 10]
+	add	w2, w2, w1
+	ldr	w1, [x0, 8]
+	ldr	w0, [x0, 4]
+	sub	w2, w2, #1
+	bl	lpa_hash_update_ppa
+.L2548:
+	add	x23, x23, 1
+	b	.L2541
+.L2542:
+	ldrb	w3, [x25, #:lo12:.LANCHOR123]
+	ldr	x1, [x20, 8]
+	ldr	x2, [x20, 24]
+	bl	ftl_read_ppa_page
+	mov	w22, w0
+	ldr	x0, [x20, 24]
+	ldr	w0, [x0, 4]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 14, .L2544
+	ldr	x0, [x20, 24]
+	mov	w1, w4
+	ldr	w2, [x26, x23, lsl 2]
+	str	w4, [x29, 128]
+	ldr	w3, [x0, 4]
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+	ldr	w4, [x29, 128]
+.L2544:
+	ldr	x2, [x28, #:lo12:.LANCHOR100]
+	ldr	w0, [x26, x23, lsl 2]
+	cmp	w4, w0
+	ldr	x0, [x20, 24]
+	ldr	w1, [x2, 8]
+	csinv	w22, w22, wzr, eq
+	cmn	w22, #1
+	add	w3, w1, 1
+	str	w3, [x2, 8]
+	str	w1, [x0]
+	mov	w1, 1
+	str	w4, [x0, 8]
+	str	w1, [x0, 12]
+	bne	.L2543
+	b	.L2546
+.L2551:
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bls	.L2548
+	cmn	w22, #1
+	bne	.L2595
+	b	.L2548
+.L2531:
+	ldr	x3, [x20, 24]
+	adrp	x0, .LANCHOR120
+	ldr	w0, [x0, #:lo12:.LANCHOR120]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2435
-	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
-	ldrh	w2, [x28, 10]
+	bcs	.L2529
+	ldrb	w0, [x19, 9]
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2435
-	adrp	x0, .LANCHOR97
+	bge	.L2529
+	adrp	x0, .LANCHOR100
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	ldr	w5, [x0, 8]
-	cmp	w1, w5
-	bls	.L2438
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L2532
 	str	w1, [x0, 8]
-.L2438:
-	ldrh	w0, [x28, 12]
+.L2532:
+	ldrh	w0, [x19, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2435
-.L2420:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
+	ldr	w0, [x29, 164]
+	str	w0, [x29, 160]
+	ldr	w0, [x29, 168]
+	str	w0, [x29, 164]
+	ldr	w0, [x29, 172]
+	str	w0, [x29, 168]
+	ldr	w0, [x29, 148]
+	str	w0, [x29, 172]
+	b	.L2529
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
 	.align	2
@@ -15037,103 +15750,379 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR105
+	adrp	x22, .LANCHOR107
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR97
+	adrp	x23, .LANCHOR100
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR80
+	add	x21, x21, :lo12:.LANCHOR83
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR105
+	add	x22, x22, :lo12:.LANCHOR107
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2500:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2618:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2501
+	bcs	.L2619
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2502
-.L2501:
+	bne	.L2620
+.L2619:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2502:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L2620:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2503
-	adrp	x1, .LANCHOR189
+	bne	.L2621
+	adrp	x1, .LANCHOR190
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR190
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2503:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR190
+.L2621:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	adrp	x27, .LANCHOR191
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR190]
+	ldr	x0, [x27, #:lo12:.LANCHOR191]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR190]
+	ldr	x3, [x27, #:lo12:.LANCHOR191]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR121
-	ldrb	w4, [x1, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR123
+	ldrb	w4, [x1, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR191
-	beq	.L2504
-	ldrb	w3, [x1, #:lo12:.LANCHOR191]
-	cbz	w3, .L2505
-.L2504:
-	strb	wzr, [x1, #:lo12:.LANCHOR191]
-	b	.L2500
-.L2505:
+	adrp	x1, .LANCHOR192
+	beq	.L2622
+	ldrb	w3, [x1, #:lo12:.LANCHOR192]
+	cbz	w3, .L2623
+.L2622:
+	strb	wzr, [x1, #:lo12:.LANCHOR192]
+	b	.L2618
+.L2623:
 	cmn	w0, #1
-	bne	.L2507
+	bne	.L2625
 	mov	w1, w26
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+	b	.L2618
+.L2625:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2626
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2626:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.ftl_dump_write_open_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_dump_write_open_sblk
+	.type	ftl_dump_write_open_sblk, %function
+ftl_dump_write_open_sblk:
+	sub	sp, sp, #224
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR6
+	stp	x21, x22, [sp, 80]
+	stp	x23, x24, [sp, 96]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	cmp	w0, w20
+	bls	.L2631
+	adrp	x25, .LANCHOR73
+	str	x25, [x29, 136]
+	ldrb	w0, [x25, #:lo12:.LANCHOR73]
+	cbnz	w0, .L2633
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L2631
+.L2633:
+	adrp	x0, .LANCHOR7
+	ubfiz	x14, x20, 2, 16
+	mov	x15, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	add	x1, x1, x14
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2653
+	adrp	x0, .LANCHOR69
+	ldrb	w10, [x0, #:lo12:.LANCHOR69]
+.L2634:
+	add	x22, x29, 176
+	adrp	x23, .LANCHOR83
+	str	w10, [x29, 128]
+	mov	w0, w20
+	mov	w24, 0
+	mov	w25, 0
+	strh	w20, [x22, -32]!
+	mov	w27, 0
+	add	x1, x22, 16
+	bl	ftl_get_blk_list_in_sblk
+	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	and	w0, w0, 255
+	strb	w0, [x29, 153]
+	strb	wzr, [x29, 149]
+	strh	wzr, [x29, 146]
+	mul	w0, w0, w1
+	strh	wzr, [x29, 154]
+	strh	w0, [x29, 150]
+	ldr	x0, [x15, #:lo12:.LANCHOR7]
+	add	x1, x0, x14
+	ldr	w5, [x0, x14]
+	ldrb	w2, [x1, 2]
+	mov	w1, w20
+	ldrh	w4, [x0, x14]
+	adrp	x0, .LC154
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC154
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
+	bl	printf
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x19, x0
+	ldr	w10, [x29, 128]
+	adrp	x12, .LANCHOR107
+	add	x14, x23, :lo12:.LANCHOR83
+	add	x12, x12, :lo12:.LANCHOR107
+.L2635:
+	ldrh	w0, [x14]
+	cmp	w0, w25
+	bls	.L2641
+	lsl	w11, w25, 1
+	adrp	x26, .LC155
+	sub	w11, w11, #1
+	mov	w27, 0
+	add	x26, x26, :lo12:.LC155
+	b	.L2645
+.L2653:
+	mov	w10, 1
+	b	.L2634
+.L2643:
+	ldrh	w13, [x22, x28]
+	mov	w0, 65535
+	cmp	w13, w0
+	bne	.L2636
+.L2642:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+.L2637:
+	cmp	w10, w24
+	bcs	.L2643
+	add	w27, w27, 1
+	and	w27, w27, 65535
+.L2645:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w27
+	bls	.L2644
+	sxtw	x28, w27
+	mov	w24, 1
+	add	x28, x28, 8
+	lsl	x28, x28, 1
+	b	.L2637
+.L2636:
+	ldrh	w21, [x12]
+	cmp	w10, 3
+	mul	w21, w21, w13
+	bne	.L2638
+	add	w21, w25, w21
+	orr	w21, w21, w24, lsl 24
+.L2639:
+	str	w21, [x19, 40]
+	mov	w1, 1
+	stp	x12, x14, [x29, 96]
+	mov	x0, x19
+	stp	w11, w10, [x29, 116]
+	str	w13, [x29, 124]
+	bl	sblk_read_page
+	ldr	x1, [x19, 24]
+	mov	w3, w21
+	ldr	x0, [x19, 8]
+	ldr	w15, [x19, 52]
+	ldr	w13, [x29, 124]
+	ldr	w2, [x1, 12]
+	mov	w4, w15
+	str	w2, [sp, 32]
+	str	w15, [x29, 128]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w25
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w13
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	mov	x0, x26
+	bl	printf
+	ldr	w15, [x29, 128]
+	ldp	w11, w10, [x29, 116]
+	cmp	w15, 512
+	ldp	x12, x14, [x29, 96]
+	bne	.L2642
+.L2641:
+	mov	w4, w24
+	mov	w3, w27
+	mov	w2, w25
+	mov	w1, w20
+	adrp	x24, .LANCHOR123
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	printf
-	b	.L2500
-.L2507:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L2508
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L2508:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldr	x0, [x19, 8]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR123]
+	adrp	x26, .LC157
+	adrp	x27, .LANCHOR69
+	add	x26, x26, :lo12:.LC157
+	add	x27, x27, :lo12:.LANCHOR69
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldr	x0, [x19, 24]
+	mov	w1, 0
+	ldrb	w2, [x24, #:lo12:.LANCHOR123]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.L2646:
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+	cmp	w0, w25
+	bls	.L2651
+	ldr	x0, [x29, 136]
+	lsl	w28, w25, 1
+	mov	w21, 0
+	add	x0, x0, :lo12:.LANCHOR73
+	str	x0, [x29, 128]
+	b	.L2652
+.L2638:
+	cmp	w10, 2
+	bne	.L2640
+	adrp	x0, .LANCHOR69
+	add	w21, w21, w11
+	add	w21, w21, w24
+	ldrb	w3, [x0, #:lo12:.LANCHOR69]
+	orr	w21, w21, w3, lsl 24
+	b	.L2639
+.L2640:
+	add	w21, w25, w21
+	b	.L2639
+.L2644:
+	add	w8, w25, 1
+	and	w25, w8, 65535
+	b	.L2635
+.L2650:
+	mov	w2, w21
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
+	ldr	x0, [x29, 128]
+	adrp	x2, .LANCHOR107
+	ldrb	w1, [x0]
+	sxtw	x0, w21
+	cbz	w1, .L2647
+	add	x0, x0, 8
+	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	ldrh	w0, [x22, x0, lsl 1]
+	mul	w0, w0, w1
+	orr	w0, w0, w25
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_3d_tlc_dump_prog
+.L2648:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+.L2652:
+	ldrb	w0, [x29, 153]
+	cmp	w0, w21
+	bhi	.L2650
+	add	w8, w25, 1
+	and	w25, w8, 65535
+	b	.L2646
+.L2647:
+	ldrb	w1, [x27]
+	add	x0, x0, 8
+	cmp	w1, 2
+	bne	.L2649
+	ldrh	w0, [x22, x0, lsl 1]
+	ldrh	w1, [x2, #:lo12:.LANCHOR107]
+	mul	w0, w0, w1
+	orr	w0, w0, w28
+	orr	w0, w0, 33554432
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_mlc_dump_prog
+	b	.L2648
+.L2649:
+	ldrh	w1, [x22, x0, lsl 1]
+	mov	w5, 0
+	ldrh	w0, [x2, #:lo12:.LANCHOR107]
+	ldrb	w4, [x24, #:lo12:.LANCHOR123]
+	ldr	x2, [x19, 8]
+	ldr	x3, [x19, 24]
+	mul	w1, w1, w0
+	orr	w1, w1, w25
+	str	w1, [x19, 40]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_prog_page_en
+	b	.L2648
+.L2651:
+	mov	x0, x19
+	bl	buf_free
+	adrp	x0, .LC158
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC158
+	bl	printf
+.L2631:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 224
 	ret
-	.size	pm_write_page, .-pm_write_page
+	.size	ftl_dump_write_open_sblk, .-ftl_dump_write_open_sblk
 	.section	.text.flash_info_flush,"ax",@progbits
 	.align	2
 	.global	flash_info_flush
@@ -15148,33 +16137,33 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2514
-	adrp	x2, .LANCHOR192
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 250
-	add	x0, x0, :lo12:.LC84
-	bl	printf
-.L2514:
-	adrp	x23, .LANCHOR159
+	tbz	x0, 12, .L2662
+	adrp	x2, .LANCHOR193
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 324
+	add	x0, x0, :lo12:.LC86
+	bl	printf
+.L2662:
+	adrp	x23, .LANCHOR194
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR159]
-	adrp	x21, .LANCHOR160
+	ldr	x0, [x23, #:lo12:.LANCHOR194]
+	adrp	x21, .LANCHOR195
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC150
-	adrp	x25, .LANCHOR135
+	adrp	x24, .LC160
+	adrp	x25, .LANCHOR140
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC150
-	add	x25, x25, :lo12:.LANCHOR135
+	add	x24, x24, :lo12:.LC160
+	add	x25, x25, :lo12:.LANCHOR140
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR160
+	add	x27, x21, :lo12:.LANCHOR195
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15182,9 +16171,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2515:
-	add	x28, x21, :lo12:.LANCHOR160
-	ldrb	w4, [x21, #:lo12:.LANCHOR160]
+.L2663:
+	add	x28, x21, :lo12:.LANCHOR195
+	ldrb	w4, [x21, #:lo12:.LANCHOR195]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -15197,7 +16186,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2516
+	blt	.L2664
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15205,32 +16194,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR160]
+	ldrb	w0, [x21, #:lo12:.LANCHOR195]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR160]
+	strb	w7, [x21, #:lo12:.LANCHOR195]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2525:
+.L2673:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2517
-.L2520:
+	b	.L2665
+.L2668:
 	mov	w26, 1
-	b	.L2515
-.L2516:
+	b	.L2663
+.L2664:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2525
-.L2517:
+	cbz	w1, .L2673
+.L2665:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR159]
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -15244,14 +16233,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2518
+	bne	.L2666
 	mov	w1, w19
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
-	b	.L2515
-.L2518:
-	cbz	w26, .L2520
+	b	.L2663
+.L2666:
+	cbz	w26, .L2668
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15261,6 +16250,171 @@ flash_info_flush:
 	ldp	x29, x30, [sp], 112
 	ret
 	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR14
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR26
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L2675
+	ldr	x4, [x20, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR196
+	adrp	x0, .LC162
+	mov	w3, 2048
+	add	x2, x2, :lo12:.LANCHOR196
+	mov	w1, 50
+	add	x0, x0, :lo12:.LC162
+	bl	printf
+.L2675:
+	adrp	x21, .LANCHOR194
+	adrp	x24, .LANCHOR2
+	mov	w22, 21321
+	add	x26, x24, :lo12:.LANCHOR2
+	mov	x23, x21
+	mov	w19, 4
+	movk	w22, 0x5359, lsl 16
+.L2678:
+	ldrh	w1, [x26]
+	mov	w4, 4
+	ldr	x3, [x21, #:lo12:.LANCHOR194]
+	mov	w0, 0
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	add	x27, x21, :lo12:.LANCHOR194
+	add	x25, x20, :lo12:.LANCHOR26
+	mul	w1, w1, w19
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2676
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldr	w0, [x2]
+	cmp	w0, w22
+	beq	.L2677
+.L2676:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L2678
+.L2703:
+	mov	w0, -1
+.L2674:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2686:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w22
+	bne	.L2687
+	ldr	w21, [x0, 4]
+.L2680:
+	add	x22, x19, :lo12:.LANCHOR195
+	ldrh	w0, [x24, #:lo12:.LANCHOR2]
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	ldrb	w1, [x22, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2681
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L2681
+	ldr	w1, [x0, 4]
+	cmp	w21, w1
+	bcs	.L2681
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x19, #:lo12:.LANCHOR195]
+	strb	w0, [x22, 1]
+.L2681:
+	ldrb	w1, [x19, #:lo12:.LANCHOR195]
+	add	x21, x19, :lo12:.LANCHOR195
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	and	w25, w0, 65535
+	add	w1, w25, 1
+	ldrb	w22, [x19, #:lo12:.LANCHOR195]
+	strh	w1, [x21, 2]
+	mov	w21, 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR2]
+	mov	w24, 21321
+	movk	w24, 0x5359, lsl 16
+	mul	w22, w22, w1
+	add	w22, w22, w0, sxth
+.L2682:
+	sub	w0, w25, w21
+	sxth	w19, w0
+	tbz	w19, #31, .L2685
+	cmn	w19, #1
+	bne	.L2684
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	ldr	w1, [x0]
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
+	bl	printf
+	b	.L2703
+.L2685:
+	ldr	x3, [x23, #:lo12:.LANCHOR194]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	sub	w1, w22, w21
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L2683
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
+	ldr	w0, [x0]
+	cmp	w0, w24
+	beq	.L2684
+.L2683:
+	add	w21, w21, 1
+	b	.L2682
+.L2684:
+	cmp	w21, 1
+	bls	.L2688
+	bl	flash_info_flush
+.L2688:
+	mov	w0, 0
+	b	.L2674
+.L2677:
+	adrp	x19, .LANCHOR195
+	add	x1, x19, :lo12:.LANCHOR195
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x26]
+	ldr	x3, [x27]
+	strb	w0, [x19, #:lo12:.LANCHOR195]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L2686
+.L2687:
+	mov	w21, 0
+	b	.L2680
+	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.nand_flash_init,"ax",@progbits
 	.align	2
 	.global	nand_flash_init
@@ -15268,35 +16422,35 @@ flash_info_flush:
 nand_flash_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR14
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2527
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2239
-	add	x0, x0, :lo12:.LC84
+	tbz	x0, 12, .L2705
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2459
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2527:
-	adrp	x0, .LANCHOR155
+.L2705:
+	adrp	x0, .LANCHOR160
 	adrp	x23, .LANCHOR16
 	adrp	x22, .LANCHOR41
 	add	x24, x22, :lo12:.LANCHOR41
-	str	wzr, [x0, #:lo12:.LANCHOR155]
+	str	wzr, [x0, #:lo12:.LANCHOR160]
 	mov	x0, x19
 	bl	nandc_init
-	adrp	x19, .LANCHOR34
-	add	x0, x19, :lo12:.LANCHOR34
+	adrp	x19, .LANCHOR30
+	add	x0, x19, :lo12:.LANCHOR30
 	mov	x25, x24
 	str	x0, [x23, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
 	mov	w1, 1
-	mov	w20, 0
+	mov	w21, 0
 	mov	w26, 44
 	strb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w2, 8
@@ -15306,22 +16460,22 @@ nand_flash_init:
 	bl	ftl_memset
 	mov	w2, 32
 	mov	w1, 0
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
 	bl	ftl_memset
-.L2533:
+.L2711:
 	mov	x1, x24
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_read_id
-	cbnz	w20, .L2528
+	cbnz	w21, .L2706
 	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2529
-.L2531:
+	bls	.L2707
+.L2709:
 	mov	w19, -2
-.L2526:
+.L2704:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15329,326 +16483,344 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2529:
+.L2707:
 	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2531
-.L2528:
+	beq	.L2709
+.L2706:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2532
+	bne	.L2710
 	strb	w26, [x24]
-.L2532:
-	add	w20, w20, 1
+.L2710:
+	add	w21, w21, 1
 	add	x24, x24, 8
-	and	w20, w20, 255
-	cmp	w20, 4
-	bne	.L2533
-	adrp	x0, .LANCHOR194
-	add	x8, x0, :lo12:.LANCHOR194
+	and	w21, w21, 255
+	cmp	w21, 4
+	bne	.L2711
+	adrp	x0, .LANCHOR198
+	add	x8, x0, :lo12:.LANCHOR198
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x22, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2536:
+.L2714:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2534
-	add	x0, x7, :lo12:.LANCHOR194
+	cbnz	w0, .L2712
+	add	x0, x7, :lo12:.LANCHOR198
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR195
-	add	x4, x1, :lo12:.LANCHOR195
+	adrp	x1, .LANCHOR199
+	add	x4, x1, :lo12:.LANCHOR199
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2535:
+.L2713:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2537
+	beq	.L2715
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2535
+	bne	.L2713
 	mov	w2, w0
-.L2537:
+.L2715:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR195
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
 	add	x0, x0, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	add	x20, x19, :lo12:.LANCHOR34
+	add	x21, x19, :lo12:.LANCHOR30
 	mov	x1, x24
 	adrp	x24, .LANCHOR27
 	mov	w2, 32
-	mov	x0, x20
+	mov	x0, x21
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2538
-	ldrb	w1, [x20, 20]
+	bhi	.L2716
+	ldrb	w1, [x21, 20]
 	cmp	w1, 60
-	bls	.L2539
+	bls	.L2717
 	mov	w1, 60
-	strb	w1, [x20, 20]
-.L2539:
+	strb	w1, [x21, 20]
+.L2717:
 	cmp	w0, 8
-	bne	.L2538
+	bne	.L2716
 	ldrb	w0, [x22, #:lo12:.LANCHOR41]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2538
-	add	x0, x19, :lo12:.LANCHOR34
+	bne	.L2716
+	add	x0, x19, :lo12:.LANCHOR30
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2538
+	bne	.L2716
 	strb	wzr, [x0, 28]
-.L2538:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2540
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2264
-	add	x0, x0, :lo12:.LC84
+.L2716:
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2718
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2484
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2540:
+.L2718:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR162
+	adrp	x1, .LANCHOR164
 	adrp	x22, .LANCHOR26
-	add	x20, x19, :lo12:.LANCHOR34
-	str	x0, [x1, #:lo12:.LANCHOR162]
+	add	x21, x19, :lo12:.LANCHOR30
+	str	x0, [x1, #:lo12:.LANCHOR164]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR151
-	str	x0, [x1, #:lo12:.LANCHOR151]
+	adrp	x1, .LANCHOR156
+	str	x0, [x1, #:lo12:.LANCHOR156]
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR161
-	str	x0, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR163
+	str	x0, [x1, #:lo12:.LANCHOR163]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR153
-	str	x0, [x1, #:lo12:.LANCHOR153]
+	adrp	x1, .LANCHOR158
+	str	x0, [x1, #:lo12:.LANCHOR158]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR159
-	str	x0, [x1, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR196
-	strb	wzr, [x0, #:lo12:.LANCHOR196]
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
+	adrp	x0, .LANCHOR200
+	strb	wzr, [x0, #:lo12:.LANCHOR200]
 	bl	flash_die_info_init
-	ldrb	w0, [x20, 18]
+	ldrb	w0, [x21, 18]
 	bl	flash_lsb_page_tbl_build
-	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR157
+	ldrb	w0, [x21, 20]
+	adrp	x21, .LANCHOR162
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR157]
+	str	xzr, [x21, #:lo12:.LANCHOR162]
 	ldr	x1, [x23, #:lo12:.LANCHOR16]
 	adrp	x23, .LANCHOR42
 	ldrh	w0, [x1, 16]
+	ldrb	w1, [x1, 28]
 	ubfx	x2, x0, 8, 3
 	strb	w2, [x23, #:lo12:.LANCHOR42]
-	adrp	x2, .LANCHOR166
+	adrp	x2, .LANCHOR168
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR166]
+	strb	w3, [x2, #:lo12:.LANCHOR168]
 	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR70
+	adrp	x2, .LANCHOR73
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR70]
-	adrp	x2, .LANCHOR104
+	strb	w3, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR70
 	ubfx	x3, x0, 13, 1
-	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR104]
+	strb	w3, [x2, #:lo12:.LANCHOR70]
 	adrp	x2, .LANCHOR1
-	strb	w0, [x2, #:lo12:.LANCHOR1]
+	ubfx	x3, x0, 14, 1
+	lsr	w0, w0, 15
+	strb	w3, [x2, #:lo12:.LANCHOR1]
+	adrp	x2, .LANCHOR71
+	strb	w0, [x2, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR0
 	mov	w2, 60
-	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR0
-	strb	w0, [x1, #:lo12:.LANCHOR0]
-	adrp	x1, .LANCHOR17
-	strb	w2, [x1, #:lo12:.LANCHOR17]
+	strb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR17
+	strb	w2, [x0, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2541
+	bne	.L2719
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2541:
-	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR168
+	strb	w2, [x0, #:lo12:.LANCHOR17]
+.L2719:
+	adrp	x0, .LANCHOR49
+	strb	w1, [x0, #:lo12:.LANCHOR49]
+	add	x1, x19, :lo12:.LANCHOR30
+	ldrb	w1, [x1, 7]
+	cmp	w1, 9
+	bne	.L2720
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+.L2720:
+	add	x19, x19, :lo12:.LANCHOR30
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR168]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2542
+	tbz	x1, 6, .L2722
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2543
-	adrp	x0, micron_read_retrial
+	ccmp	w0, 21, 4, hi
+	bne	.L2723
+	adrp	x1, micron_read_retrial
+	add	x1, x1, :lo12:micron_read_retrial
+	str	x1, [x21, #:lo12:.LANCHOR162]
+	cmp	w0, 21
+	adrp	x0, .LANCHOR159
+	beq	.L2724
 	mov	w1, 15
-	add	x0, x0, :lo12:micron_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
-.L2593:
-	adrp	x0, .LANCHOR154
-	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2542
-.L2534:
+.L2771:
+	strb	w1, [x0, #:lo12:.LANCHOR159]
+	b	.L2722
+.L2712:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 36
-	bne	.L2536
-	b	.L2531
-.L2543:
+	cmp	x10, 38
+	bne	.L2714
+	b	.L2709
+.L2724:
+	mov	w1, 4
+	b	.L2771
+.L2723:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2544
+	bhi	.L2726
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
+	str	x0, [x21, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2592:
+.L2773:
 	mov	w1, 7
-	b	.L2593
-.L2544:
+	adrp	x0, .LANCHOR159
+	b	.L2771
+.L2726:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2545
+	bhi	.L2727
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR157]
+	str	x2, [x21, #:lo12:.LANCHOR162]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR154
-	beq	.L2546
+	adrp	x0, .LANCHOR159
+	beq	.L2728
 	mov	w2, 7
-.L2591:
-	strb	w2, [x0, #:lo12:.LANCHOR154]
+.L2770:
+	strb	w2, [x0, #:lo12:.LANCHOR159]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2548
+	bhi	.L2730
 	mov	w1, 4
-.L2594:
+.L2772:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2542:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2549
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2312
-	add	x0, x0, :lo12:.LC84
+.L2722:
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2731
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2537
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2549:
+.L2731:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2550
+	tbz	x0, 0, .L2732
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2595:
+.L2774:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2552
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2553
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2347
-	add	x0, x0, :lo12:.LC84
+	bne	.L2734
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2735
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2568
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2553:
+.L2735:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2526
-.L2546:
+	mov	w0, 0
+	bl	zftl_flash_exit_slc_mode
+	b	.L2704
+.L2728:
 	mov	w2, 17
-	b	.L2591
-.L2548:
+	b	.L2770
+.L2730:
 	mov	w1, 5
-	b	.L2594
-.L2545:
+	b	.L2772
+.L2727:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2542
+	bhi	.L2722
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
-	b	.L2592
-.L2550:
+	str	x0, [x21, #:lo12:.LANCHOR162]
+	b	.L2773
+.L2732:
 	mov	w0, 4
-	b	.L2595
-.L2552:
+	b	.L2774
+.L2734:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L2554
+	cmp	w0, 7
+	bhi	.L2736
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR157]
-.L2554:
+	str	x0, [x21, #:lo12:.LANCHOR162]
+.L2736:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2556
+	tbz	x0, 2, .L2738
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2556
-	adrp	x0, .LANCHOR160
-	ldrb	w1, [x0, #:lo12:.LANCHOR160]
+	cbz	w0, .L2738
+	adrp	x0, .LANCHOR195
+	ldrb	w1, [x0, #:lo12:.LANCHOR195]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2556
+	cbnz	w0, .L2738
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2556:
-	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2558
-	adrp	x2, .LANCHOR193
-	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2404
-	add	x0, x0, :lo12:.LC84
+.L2738:
+	ldr	w0, [x20, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2740
+	adrp	x2, .LANCHOR197
+	adrp	x0, .LC86
+	add	x2, x2, :lo12:.LANCHOR197
+	mov	w1, 2634
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L2558:
+.L2740:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2526
+	b	.L2704
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15665,31 +16837,31 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR80
+	adrp	x26, .LANCHOR83
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR105
-	adrp	x28, .LANCHOR121
+	adrp	x27, .LANCHOR107
+	adrp	x28, .LANCHOR123
 	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR80
-	add	x27, x27, :lo12:.LANCHOR105
-	add	x28, x28, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LANCHOR83
+	add	x27, x27, :lo12:.LANCHOR107
+	add	x28, x28, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2597:
+.L2776:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2599
+	bhi	.L2778
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2600
-	adrp	x1, .LANCHOR197
+	cbz	w20, .L2779
+	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
 	mov	w2, 1338
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2600:
+.L2779:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15699,7 +16871,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2599:
+.L2778:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15728,19 +16900,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2597
+	b	.L2776
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15748,35 +16920,35 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC154
+	ldrb	w1, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LC165
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC165
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR100
 	adrp	x19, .LANCHOR10
-	adrp	x20, .LANCHOR80
+	adrp	x20, .LANCHOR83
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR178
-	add	x1, x0, :lo12:.LANCHOR178
+	adrp	x0, .LANCHOR179
+	add	x1, x0, :lo12:.LANCHOR179
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR178]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	ldrb	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -15784,8 +16956,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15793,36 +16965,36 @@ dump_ftl_info:
 	ldrh	w1, [x1, 48]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x19, .LANCHOR73
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x19, .LANCHOR76
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR73]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR111
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC160
+	adrp	x0, .LANCHOR113
+	ldr	x1, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LC171
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC171
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15830,28 +17002,28 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR110
-	adrp	x0, .LC163
-	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC163
+	adrp	x1, .LANCHOR112
+	adrp	x0, .LC174
+	add	x1, x1, :lo12:.LANCHOR112
+	add	x0, x0, :lo12:.LC174
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR73]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR114
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15859,17 +17031,17 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR99
+	adrp	x3, .LANCHOR102
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	ldrh	w3, [x3, #:lo12:.LANCHOR102]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR98
-	ldrb	w3, [x3, #:lo12:.LANCHOR98]
+	adrp	x3, .LANCHOR101
+	ldrb	w3, [x3, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w3
 	adrp	x3, .LANCHOR7
 	ldr	x3, [x3, #:lo12:.LANCHOR7]
@@ -15878,20 +17050,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2611
+	bne	.L2790
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2611:
+.L2790:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15907,113 +17079,113 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2617
-	adrp	x1, .LANCHOR198
+	bls	.L2796
+	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2617:
-	adrp	x22, .LANCHOR97
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+.L2796:
+	adrp	x22, .LANCHOR100
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2618
+	bcs	.L2797
 	mov	w1, w19
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR203
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR203]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2620
+	bcs	.L2799
 	mov	w2, 35
-.L2625:
-	adrp	x1, .LANCHOR198
+.L2804:
+	adrp	x1, .LANCHOR202
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR202
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2620
-.L2618:
+	b	.L2799
+.L2797:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR130
-	add	x0, x0, :lo12:.LANCHOR130
+	adrp	x0, .LANCHOR132
+	add	x0, x0, :lo12:.LANCHOR132
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2621
+	cbnz	w21, .L2800
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR203
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR203]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2620:
+.L2799:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2621:
-	adrp	x20, .LANCHOR190
-	adrp	x24, .LANCHOR121
+.L2800:
+	adrp	x20, .LANCHOR191
+	adrp	x24, .LANCHOR123
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR190]
-	ldrb	w3, [x24, #:lo12:.LANCHOR121]
+	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2622
+	beq	.L2801
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
-	adrp	x0, .LC171
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	adrp	x0, .LC182
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC171
+	add	x0, x0, :lo12:.LC182
 	bl	rknand_print_hex
-.L2622:
-	ldr	x0, [x20, #:lo12:.LANCHOR190]
+.L2801:
+	ldr	x0, [x20, #:lo12:.LANCHOR191]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2620
+	beq	.L2799
 	mov	w2, 59
-	b	.L2625
+	b	.L2804
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -16023,73 +17195,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
-	adrp	x19, .LANCHOR141
+	adrp	x20, .LANCHOR100
+	adrp	x19, .LANCHOR146
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR141]
+	ldrh	w0, [x19, #:lo12:.LANCHOR146]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2628
+	blt	.L2807
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
-	ldrh	w1, [x19, #:lo12:.LANCHOR141]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldrh	w1, [x19, #:lo12:.LANCHOR146]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2628
+	blt	.L2807
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2630
-	adrp	x1, .LANCHOR200
-	add	x1, x1, :lo12:.LANCHOR200
+	bne	.L2809
+	adrp	x1, .LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR204
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2630:
+.L2809:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR130
+	adrp	x1, .LANCHOR132
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR130
+	add	x2, x1, :lo12:.LANCHOR132
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2631
+	beq	.L2810
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2631
+	cbz	x1, .L2810
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2631
+	tbz	w2, #31, .L2810
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2631:
-	add	x1, x23, :lo12:.LANCHOR130
-	adrp	x25, .LANCHOR99
+.L2810:
+	add	x1, x23, :lo12:.LANCHOR132
+	adrp	x25, .LANCHOR102
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR99
+	add	x25, x25, :lo12:.LANCHOR102
 	mov	w19, 0
-.L2632:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L2811:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2634
+	bhi	.L2813
 	bl	pm_free_sblk
-.L2628:
+.L2807:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16097,7 +17269,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2634:
+.L2813:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16108,11 +17280,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w1, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2633
+	bne	.L2812
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16121,10 +17293,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2633:
+.L2812:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2632
+	b	.L2811
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16133,8 +17305,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR130
-	add	x2, x2, :lo12:.LANCHOR130
+	adrp	x2, .LANCHOR132
+	add	x2, x2, :lo12:.LANCHOR132
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -16144,12 +17316,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR128
-	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2640
+	adrp	x19, .LANCHOR130
+	ldr	w0, [x19, #:lo12:.LANCHOR130]
+	cbz	w0, .L2819
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2640:
+	str	wzr, [x19, #:lo12:.LANCHOR130]
+.L2819:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16163,21 +17335,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR130
-	add	x19, x19, :lo12:.LANCHOR130
+	adrp	x19, .LANCHOR132
+	add	x19, x19, :lo12:.LANCHOR132
 	mov	w20, 0
 	add	x19, x19, 2
-.L2647:
+.L2826:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2646
+	tbz	w0, #31, .L2825
 	mov	w0, w20
 	bl	pm_flush_id
-.L2646:
+.L2825:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2647
+	bne	.L2826
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16226,83 +17398,90 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR128
+	adrp	x0, .LANCHOR130
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR130
-	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR191
+	adrp	x19, .LANCHOR132
+	str	wzr, [x0, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR192
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR191]
+	add	x21, x19, :lo12:.LANCHOR132
+	strb	w1, [x0, #:lo12:.LANCHOR192]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
-	adrp	x22, .LANCHOR121
-	add	x23, x19, 512
-	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR190]
+	adrp	x1, .LANCHOR191
+	mov	x20, x19
+	add	x23, x21, 512
+	adrp	x19, .LANCHOR123
+	mov	x22, x1
+	add	x19, x19, :lo12:.LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w25, -1
-.L2657:
-	strh	w25, [x19]
-	strh	wzr, [x19, 2]
-	cbz	w24, .L2656
-	ldrb	w0, [x22]
+.L2836:
+	strh	w25, [x21]
+	strh	wzr, [x21, 2]
+	cbz	w24, .L2835
+	ldrb	w0, [x19]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	str	x0, [x19, 8]
-.L2656:
-	add	x19, x19, 16
-	cmp	x19, x23
-	bne	.L2657
-	add	x0, x20, :lo12:.LANCHOR130
-	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR190]
+	str	x0, [x21, 8]
+.L2835:
+	add	x21, x21, 16
+	cmp	x21, x23
+	bne	.L2836
+	add	x0, x20, :lo12:.LANCHOR132
+	adrp	x19, .LANCHOR100
+	ldr	x24, [x22, #:lo12:.LANCHOR191]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2658
+	bgt	.L2837
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC172
-	add	x0, x0, :lo12:.LC172
-	adrp	x27, .LANCHOR105
-	adrp	x28, .LANCHOR121
-	add	x27, x27, :lo12:.LANCHOR105
-	add	x28, x28, :lo12:.LANCHOR121
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
+	adrp	x27, .LANCHOR107
+	adrp	x28, .LANCHOR123
+	add	x27, x27, :lo12:.LANCHOR107
+	add	x28, x28, :lo12:.LANCHOR123
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrsh	w21, [x0, 696]
-.L2659:
+.L2838:
 	cmp	w21, w26
-	ble	.L2661
-	adrp	x0, .LANCHOR181
+	ble	.L2840
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	strb	w1, [x0, #:lo12:.LANCHOR182]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
+.L2837:
+	add	x20, x20, :lo12:.LANCHOR132
+	mov	w0, -1
+	ldr	x1, [x20, 8]
+	bl	pm_write_page
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2658:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16313,8 +17492,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2661:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2840:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -16325,138 +17504,143 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2660
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2839
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2660
+	bcs	.L2839
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2660:
+.L2839:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2659
+	b	.L2838
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
 	.global	pm_log2phys
 	.type	pm_log2phys, %function
 pm_log2phys:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x1
-	adrp	x1, .LANCHOR121
-	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR121]
+	mov	w25, w0
+	adrp	x0, .LANCHOR120
 	stp	x23, x24, [sp, 48]
-	mov	w23, w2
-	lsl	w21, w1, 7
-	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR118
-	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR118]
-	cmp	w0, w2
-	and	w25, w21, 65535
-	msub	w20, w25, w20, w0
-	bcc	.L2671
-	mov	w1, w0
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	stp	x19, x20, [sp, 16]
+	mov	w24, w2
+	stp	x21, x22, [sp, 32]
+	mov	x23, x1
+	ldr	w2, [x0, #:lo12:.LANCHOR120]
+	str	x27, [sp, 80]
+	cmp	w25, w2
+	bcc	.L2850
+	mov	w1, w25
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
 	mov	w0, -1
-.L2670:
+	cbnz	w24, .L2849
+	str	w0, [x23]
+.L2849:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2671:
-	adrp	x24, .LANCHOR130
-	add	x0, x24, :lo12:.LANCHOR130
-	and	x20, x20, 65535
-	add	x0, x0, 8
+.L2850:
+	adrp	x0, .LANCHOR123
+	adrp	x21, .LANCHOR132
 	mov	x19, 0
-.L2677:
+	ldrb	w20, [x0, #:lo12:.LANCHOR123]
+	add	x0, x21, :lo12:.LANCHOR132
+	add	x0, x0, 8
+	lsl	w22, w20, 7
+	udiv	w22, w25, w22
+	and	w26, w22, 65535
+.L2856:
 	ldr	x1, [x0]
-	cbz	x1, .L2673
+	cbz	x1, .L2852
 	ldrh	w1, [x0, -8]
-	cmp	w1, w25
-	bne	.L2673
-.L2674:
-	cbnz	w23, .L2675
-	add	x0, x24, :lo12:.LANCHOR130
+	cmp	w1, w26
+	bne	.L2852
+.L2853:
+	ubfiz	w20, w20, 7, 9
+	msub	w25, w26, w20, w25
+	and	x25, x25, 65535
+	cbnz	w24, .L2854
+	add	x0, x21, :lo12:.LANCHOR132
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x22]
-.L2676:
-	add	x24, x24, :lo12:.LANCHOR130
-	add	x19, x24, x19, lsl 4
+	ldr	w0, [x0, x25, lsl 2]
+	str	w0, [x23]
+.L2855:
+	add	x21, x21, :lo12:.LANCHOR132
+	add	x19, x21, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2679
+	beq	.L2859
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2679:
+.L2859:
 	mov	w0, 0
-	b	.L2670
-.L2675:
-	add	x0, x24, :lo12:.LANCHOR130
-	ldr	w2, [x22]
+	b	.L2849
+.L2854:
+	add	x0, x21, :lo12:.LANCHOR132
+	ldr	w2, [x23]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
-	str	w2, [x1, x20, lsl 2]
+	str	w2, [x1, x25, lsl 2]
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR131
-	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2676
-.L2673:
+	adrp	x0, .LANCHOR133
+	strb	w22, [x0, #:lo12:.LANCHOR133]
+	b	.L2855
+.L2852:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2677
+	bne	.L2856
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR130
+	add	x2, x21, :lo12:.LANCHOR132
 	add	x3, x2, x1
-	mov	w26, w0
+	mov	w27, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2678
+	beq	.L2857
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2678
+	tbz	w1, #31, .L2857
 	bl	pm_flush_id
-.L2678:
-	adrp	x0, .LANCHOR201
-	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR201]
-	mov	w0, w25
+.L2857:
+	adrp	x0, .LANCHOR205
+	mov	w1, w27
+	strb	w19, [x0, #:lo12:.LANCHOR205]
+	mov	w0, w26
 	bl	load_l2p_region
-	b	.L2674
+	b	.L2853
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16464,17 +17648,17 @@ pm_log2phys:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
 	adrp	x21, .LANCHOR10
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR10]
-	strb	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR145
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR150
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR145]
+	strb	wzr, [x0, #:lo12:.LANCHOR150]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -16484,7 +17668,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2686
+	beq	.L2866
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16492,41 +17676,41 @@ gc_recovery:
 	mov	x26, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR105
-	adrp	x2, .LANCHOR68
+	adrp	x3, .LANCHOR107
+	adrp	x2, .LANCHOR69
 	sub	w0, w0, #1
 	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR105]
+	ldrh	w1, [x3, #:lo12:.LANCHOR107]
 	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR68]
+	ldrb	w0, [x2, #:lo12:.LANCHOR69]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2687
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2867
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2731:
+.L2911:
 	str	w0, [x26, 40]
-.L2688:
+.L2868:
 	mov	w1, 1
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2689
+	beq	.L2869
 	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2690
-.L2689:
+	beq	.L2870
+.L2869:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x1, [x26, 24]
@@ -16539,13 +17723,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC175
+	adrp	x0, .LC186
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC175
+	add	x0, x0, :lo12:.LC186
 	ldr	w1, [x26, 40]
 	ldr	w2, [x26, 52]
 	bl	printf
-.L2735:
+.L2915:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -16554,11 +17738,13 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2691:
+.L2871:
+	ldrh	w0, [x20, 80]
+	bl	ftl_dump_write_open_sblk
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16568,18 +17754,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2718
+	beq	.L2898
 	bl	ftl_free_sblk
-.L2718:
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+.L2898:
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2685:
+.L2865:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16588,64 +17774,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2687:
+.L2867:
 	cmp	w0, 2
-	bne	.L2688
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2868
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2731
-.L2690:
-	adrp	x28, .LANCHOR72
-	adrp	x22, .LANCHOR73
-	adrp	x27, .LANCHOR147
+	b	.L2911
+.L2870:
+	adrp	x28, .LANCHOR75
+	adrp	x22, .LANCHOR76
+	adrp	x27, .LANCHOR152
 	ldr	x1, [x26, 8]
-	ldrb	w0, [x22, #:lo12:.LANCHOR73]
-	adrp	x24, .LANCHOR148
-	ldrh	w2, [x28, #:lo12:.LANCHOR72]
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	adrp	x24, .LANCHOR153
+	ldrh	w2, [x28, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x22, #:lo12:.LANCHOR73]
-	ldrh	w0, [x28, #:lo12:.LANCHOR72]
+	ldrb	w1, [x22, #:lo12:.LANCHOR76]
+	ldrh	w0, [x28, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	ldr	x1, [x26, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x24, #:lo12:.LANCHOR148]
+	ldr	x0, [x24, #:lo12:.LANCHOR153]
 	bl	ftl_memcpy
 	str	x28, [x29, 144]
-	adrp	x0, .LANCHOR80
-	ldrh	w14, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR83
+	ldrh	w14, [x0, #:lo12:.LANCHOR83]
 	ldr	x0, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 2
-	beq	.L2692
-.L2732:
+	beq	.L2872
+.L2912:
 	str	w0, [x29, 184]
-	adrp	x25, .LC176
+	adrp	x25, .LC187
 	ldr	x0, [x29, 152]
 	mov	w23, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR107
 	str	x0, [x29, 128]
-	add	x0, x25, :lo12:.LC176
+	add	x0, x25, :lo12:.LC187
 	str	x0, [x29, 120]
-.L2694:
+.L2874:
 	sub	w0, w23, #1
 	str	w0, [x29, 188]
 	cmp	w23, w14
-	beq	.L2703
+	beq	.L2883
 	mov	x19, 0
-	b	.L2704
-.L2692:
+	b	.L2884
+.L2872:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2732
-.L2700:
+	b	.L2912
+.L2880:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16655,29 +17841,29 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2695
+	bne	.L2875
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2733:
+.L2913:
 	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
 	mov	x0, x26
 	bl	sblk_read_page
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w14, [x29, 112]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2698
-	ldr	x1, [x24, #:lo12:.LANCHOR148]
+	bne	.L2878
+	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2699
-.L2698:
-	ldr	x1, [x24, #:lo12:.LANCHOR148]
+	beq	.L2879
+.L2878:
+	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w14, [x29, 112]
@@ -16688,51 +17874,51 @@ gc_recovery:
 	ldr	w2, [x26, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2699
+	beq	.L2879
 	mov	x0, x26
 	bl	buf_free
-	b	.L2735
-.L2695:
+	b	.L2915
+.L2875:
 	cmp	w1, 2
-	bne	.L2697
+	bne	.L2877
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2733
-.L2697:
+	b	.L2913
+.L2877:
 	add	w0, w23, w0
-	b	.L2733
-.L2699:
+	b	.L2913
+.L2879:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2702:
+.L2882:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2700
+	bcs	.L2880
 	add	x19, x19, 1
-.L2704:
+.L2884:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2701
+	ble	.L2881
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
 	sbfiz	x28, x22, 2, 32
 	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR68
+	add	x0, x0, :lo12:.LANCHOR69
 	str	x0, [x29, 136]
-	b	.L2702
-.L2701:
+	b	.L2882
+.L2881:
 	add	w23, w23, 1
-	b	.L2694
-.L2703:
+	b	.L2874
+.L2883:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -16742,30 +17928,30 @@ gc_recovery:
 	ldrh	w2, [x20, 80]
 	mov	w28, 0
 	ldr	x1, [x25, #:lo12:.LANCHOR9]
-	ldrh	w3, [x3, #:lo12:.LANCHOR72]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
 	ldrb	w0, [x0, 9]
 	str	x25, [x29, 144]
 	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	str	x0, [x29, 112]
-.L2705:
+.L2885:
 	sub	w0, w28, #1
 	str	w0, [x29, 136]
 	cmp	w23, w28
-	beq	.L2716
+	beq	.L2896
 	mov	x26, 0
-	b	.L2717
-.L2713:
+	b	.L2897
+.L2893:
 	ldr	w0, [x29, 188]
-	ldr	x1, [x27, #:lo12:.LANCHOR147]
+	ldr	x1, [x27, #:lo12:.LANCHOR152]
 	sbfiz	x0, x0, 2, 32
 	ldr	w5, [x1, x0]
 	cmn	w5, #1
-	beq	.L2706
-	ldr	x1, [x24, #:lo12:.LANCHOR148]
+	beq	.L2886
+	ldr	x1, [x24, #:lo12:.LANCHOR153]
 	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 160]
@@ -16774,26 +17960,26 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	bne	.L2707
+	bne	.L2887
 	mov	w0, w5
 	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w5, [x29, 108]
-.L2707:
+.L2887:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	cmp	w1, 3
-	bne	.L2708
+	bne	.L2888
 	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2734:
+.L2914:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16811,14 +17997,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2711
+	bne	.L2891
 	add	x1, x29, 200
 	mov	w0, w5
 	bl	pm_log2phys
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2712:
+.L2892:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16827,82 +18013,82 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2706
+	bne	.L2886
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2706
+	cbz	w1, .L2886
 	strh	wzr, [x0, x19]
-.L2706:
+.L2886:
 	add	w25, w25, 1
-.L2715:
+.L2895:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2713
+	bcs	.L2893
 	add	x26, x26, 1
-.L2717:
+.L2897:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2714
+	ble	.L2894
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR98
-	add	x0, x0, :lo12:.LANCHOR98
+	adrp	x0, .LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR101
 	str	x0, [x29, 120]
-	b	.L2715
-.L2708:
+	b	.L2895
+.L2888:
 	cmp	w1, 2
-	bne	.L2710
+	bne	.L2890
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2734
-.L2710:
+	b	.L2914
+.L2890:
 	add	w0, w28, w0
-	b	.L2734
-.L2711:
+	b	.L2914
+.L2891:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2712
-.L2714:
+	b	.L2892
+.L2894:
 	add	w28, w28, 1
-	b	.L2705
-.L2716:
+	b	.L2885
+.L2896:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w22, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L2691
-.L2686:
+	b	.L2871
+.L2866:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2685
-	adrp	x19, .LANCHOR97
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2865
+	adrp	x19, .LANCHOR100
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2720
+	bne	.L2900
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2720:
+.L2900:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2685
+	b	.L2865
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16910,232 +18096,232 @@ gc_recovery:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR56
+	adrp	x1, .LANCHOR57
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR56]
-	adrp	x1, .LANCHOR57
+	strb	w0, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR80
-	strb	wzr, [x1, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR124
+	adrp	x22, .LANCHOR83
+	strb	wzr, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR126
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR73
-	strb	w0, [x1, #:lo12:.LANCHOR124]
-	adrp	x1, .LANCHOR125
+	adrp	x21, .LANCHOR76
+	strb	w0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR127
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR199
-	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR173
+	adrp	x20, .LANCHOR203
+	strb	wzr, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR174
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR119
+	strb	w0, [x1, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR121
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR202
-	str	w1, [x0, #:lo12:.LANCHOR202]
-	adrp	x1, .LC178
-	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC178
-	add	x0, x0, :lo12:.LC91
-	bl	printf
-	adrp	x1, .LANCHOR34
-	add	x1, x1, :lo12:.LANCHOR34
-	adrp	x0, .LANCHOR68
-	adrp	x2, .LANCHOR121
-	adrp	x3, .LANCHOR72
-	adrp	x4, .LANCHOR98
+	strb	wzr, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR206
+	str	w1, [x0, #:lo12:.LANCHOR206]
+	adrp	x1, .LC189
+	adrp	x0, .LC93
+	add	x1, x1, :lo12:.LC189
+	add	x0, x0, :lo12:.LC93
+	bl	printf
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR69
+	adrp	x2, .LANCHOR123
+	adrp	x3, .LANCHOR75
+	adrp	x4, .LANCHOR101
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR68]
+	strb	w5, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR121]
+	strb	w0, [x2, #:lo12:.LANCHOR123]
 	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR72]
+	strh	w2, [x3, #:lo12:.LANCHOR75]
 	adrp	x3, .LANCHOR18
 	ldrh	w7, [x1, 14]
 	ubfiz	w10, w0, 9, 7
 	ldrb	w6, [x3, #:lo12:.LANCHOR18]
-	adrp	x3, .LANCHOR106
+	adrp	x3, .LANCHOR108
 	sdiv	w8, w2, w5
 	strh	w7, [x23, #:lo12:.LANCHOR6]
-	strb	w6, [x3, #:lo12:.LANCHOR106]
+	strb	w6, [x3, #:lo12:.LANCHOR108]
 	ldrb	w3, [x1, 13]
 	adrp	x1, .LANCHOR2
-	strb	w3, [x4, #:lo12:.LANCHOR98]
+	strb	w3, [x4, #:lo12:.LANCHOR101]
 	ldrh	w4, [x1, #:lo12:.LANCHOR2]
-	adrp	x1, .LANCHOR105
-	strh	w8, [x22, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR107
+	strh	w8, [x22, #:lo12:.LANCHOR83]
 	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR199]
+	strh	w4, [x1, #:lo12:.LANCHOR107]
+	strh	w10, [x20, #:lo12:.LANCHOR203]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2737:
+	strb	w6, [x21, #:lo12:.LANCHOR76]
+.L2917:
 	cmp	w4, w3
-	bcs	.L2738
+	bcs	.L2918
 	mul	w2, w0, w2
-	adrp	x3, .LANCHOR99
+	adrp	x3, .LANCHOR102
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR99]
+	strh	w1, [x3, #:lo12:.LANCHOR102]
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2739:
+.L2919:
 	cmp	w11, w1
-	bcs	.L2740
+	bcs	.L2920
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
 	mul	w3, w3, w6
-	adrp	x28, .LANCHOR118
+	adrp	x28, .LANCHOR120
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR186
+	adrp	x24, .LANCHOR187
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR204
+	adrp	x27, .LANCHOR208
 	mul	w2, w2, w6
-	adrp	x26, .LANCHOR141
+	adrp	x26, .LANCHOR146
 	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR58
+	adrp	x4, .LANCHOR59
 	sub	w2, w2, #1
-	adrp	x25, .LANCHOR84
-	str	w1, [x4, #:lo12:.LANCHOR58]
-	adrp	x4, .LANCHOR203
-	str	w3, [x4, #:lo12:.LANCHOR203]
+	adrp	x25, .LANCHOR87
+	str	w1, [x4, #:lo12:.LANCHOR59]
+	adrp	x4, .LANCHOR207
+	str	w3, [x4, #:lo12:.LANCHOR207]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR204]
+	str	w3, [x27, #:lo12:.LANCHOR208]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR101
-	str	w0, [x28, #:lo12:.LANCHOR118]
+	adrp	x2, .LANCHOR104
+	str	w0, [x28, #:lo12:.LANCHOR120]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR186]
+	strh	w0, [x24, #:lo12:.LANCHOR187]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR88
+	adrp	x8, .LANCHOR91
 	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR88]
-	strh	w0, [x26, #:lo12:.LANCHOR141]
+	strh	w3, [x8, #:lo12:.LANCHOR91]
+	strh	w0, [x26, #:lo12:.LANCHOR146]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR101]
+	strh	w0, [x2, #:lo12:.LANCHOR104]
 	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR84]
+	strh	w0, [x25, #:lo12:.LANCHOR87]
 	cmp	w0, 79
-	bhi	.L2741
+	bhi	.L2921
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2741:
-	adrp	x7, .LANCHOR102
+	strh	w0, [x25, #:lo12:.LANCHOR87]
+.L2921:
+	adrp	x7, .LANCHOR105
 	mov	w0, 2000
-	adrp	x3, .LANCHOR100
-	adrp	x6, .LANCHOR140
-	strh	w0, [x7, #:lo12:.LANCHOR102]
+	adrp	x3, .LANCHOR103
+	adrp	x6, .LANCHOR145
+	strh	w0, [x7, #:lo12:.LANCHOR105]
 	mov	w0, 50
-	adrp	x2, .LANCHOR139
-	strh	w0, [x3, #:lo12:.LANCHOR100]
+	adrp	x2, .LANCHOR144
+	strh	w0, [x3, #:lo12:.LANCHOR103]
 	mov	w0, 256
-	strh	w0, [x6, #:lo12:.LANCHOR140]
+	strh	w0, [x6, #:lo12:.LANCHOR145]
 	mov	w0, 48
-	strh	w0, [x2, #:lo12:.LANCHOR139]
+	strh	w0, [x2, #:lo12:.LANCHOR144]
 	adrp	x0, .LANCHOR8
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2742
-	adrp	x5, .LANCHOR70
-	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2743
-.L2742:
+	beq	.L2922
+	adrp	x5, .LANCHOR73
+	ldrb	w5, [x5, #:lo12:.LANCHOR73]
+	cbz	w5, .L2923
+.L2922:
 	mov	w5, 150
-	strh	w5, [x3, #:lo12:.LANCHOR100]
+	strh	w5, [x3, #:lo12:.LANCHOR103]
 	mov	w3, 64
-	strh	w3, [x2, #:lo12:.LANCHOR139]
+	strh	w3, [x2, #:lo12:.LANCHOR144]
 	mov	w2, 12
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2743
+	cbnz	w2, .L2923
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR102]
+	strh	w0, [x7, #:lo12:.LANCHOR105]
 	mov	w0, 128
-	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2743:
+	strh	w0, [x6, #:lo12:.LANCHOR145]
+.L2923:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2745
+	tbz	x0, 12, .L2925
 	str	x4, [x29, 96]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2745:
+.L2925:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2746
-	ldr	w1, [x4, #:lo12:.LANCHOR203]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	tbz	x0, 12, .L2926
+	ldr	w1, [x4, #:lo12:.LANCHOR207]
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2746:
+.L2926:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2747
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	tbz	x0, 12, .L2927
+	ldr	w1, [x28, #:lo12:.LANCHOR120]
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2747:
+.L2927:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2748
-	ldr	w1, [x27, #:lo12:.LANCHOR204]
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	tbz	x0, 12, .L2928
+	ldr	w1, [x27, #:lo12:.LANCHOR208]
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	bl	printf
-.L2748:
+.L2928:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2749
-	ldrh	w1, [x24, #:lo12:.LANCHOR186]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	tbz	x0, 12, .L2929
+	ldrh	w1, [x24, #:lo12:.LANCHOR187]
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2749:
+.L2929:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2750
-	ldrh	w1, [x20, #:lo12:.LANCHOR199]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	tbz	x0, 12, .L2930
+	ldrh	w1, [x20, #:lo12:.LANCHOR203]
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
-.L2750:
+.L2930:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2751
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	tbz	x0, 12, .L2931
+	ldrh	w1, [x26, #:lo12:.LANCHOR146]
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2751:
+.L2931:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2752
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	tbz	x0, 12, .L2932
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2752:
+.L2932:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2753
+	tbz	x0, 12, .L2933
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-.L2753:
+.L2933:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17144,19 +18330,19 @@ zftl_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR4
 	str	x0, [x1, #:lo12:.LANCHOR4]
-	ldrb	w1, [x21, #:lo12:.LANCHOR73]
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR76]
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR112
+	adrp	x1, .LANCHOR114
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR111
-	ldrh	w1, [x22, #:lo12:.LANCHOR80]
-	str	x2, [x0, #:lo12:.LANCHOR111]
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
+	str	x0, [x1, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldrh	w1, [x22, #:lo12:.LANCHOR83]
+	str	x2, [x0, #:lo12:.LANCHOR113]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
 	adrp	x1, .LANCHOR9
@@ -17167,15 +18353,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2754
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	tbz	x0, 12, .L2934
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2754:
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
-	ldrb	w21, [x21, #:lo12:.LANCHOR73]
+.L2934:
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	ldrb	w21, [x21, #:lo12:.LANCHOR76]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR186]
+	ldrh	w22, [x24, #:lo12:.LANCHOR187]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17184,39 +18370,39 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2755
-	ldrh	w3, [x20, #:lo12:.LANCHOR199]
-	adrp	x0, .LC189
+	tbz	x0, 12, .L2935
+	ldrh	w3, [x20, #:lo12:.LANCHOR203]
+	adrp	x0, .LC200
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC200
 	bl	printf
-.L2755:
-	ldrh	w0, [x20, #:lo12:.LANCHOR199]
+.L2935:
+	ldrh	w0, [x20, #:lo12:.LANCHOR203]
 	cmp	w21, w0
-	bhi	.L2756
+	bhi	.L2936
 	cmp	w22, w0
-	bls	.L2757
-.L2756:
-.L2800:
-	b	.L2800
-.L2738:
+	bls	.L2937
+.L2936:
+.L2980:
+	b	.L2980
+.L2918:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2737
-.L2740:
+	b	.L2917
+.L2920:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2739
-.L2757:
+	b	.L2919
+.L2937:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2736
+	beq	.L2916
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
@@ -17228,7 +18414,7 @@ zftl_init:
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
@@ -17245,20 +18431,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR181
-	ldrb	w0, [x0, #:lo12:.LANCHOR181]
-	cbz	w0, .L2759
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR182
+	ldrb	w0, [x0, #:lo12:.LANCHOR182]
+	cbz	w0, .L2939
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2759:
+.L2939:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2736:
+.L2916:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17276,14 +18462,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2804
+	cbnz	w0, .L2984
 	bl	zftl_init
-.L2804:
+.L2984:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17297,12 +18483,12 @@ rk_ftl_init:
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
 	adrp	x0, .LANCHOR10
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR75
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR72]
+	ldrh	w26, [x1, #:lo12:.LANCHOR75]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR14
@@ -17312,12 +18498,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2807
+	tbz	x1, 8, .L2987
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	bl	printf
-.L2807:
+.L2987:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17325,15 +18511,15 @@ gc_update_l2p_map_new:
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR121
-	add	x0, x0, :lo12:.LANCHOR121
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	str	x0, [x29, 104]
-.L2808:
+.L2988:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2818
+	bhi	.L2998
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2819
+	tbz	x0, 8, .L2999
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17341,22 +18527,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC194
-	add	x0, x0, :lo12:.LC194
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L2819:
+.L2999:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2820
-	adrp	x1, .LANCHOR205
+	beq	.L3000
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 569
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2820:
+.L3000:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17369,77 +18555,77 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2818:
-	adrp	x27, .LANCHOR147
+.L2998:
+	adrp	x27, .LANCHOR152
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2809
-	adrp	x0, .LANCHOR121
-	ldrb	w20, [x0, #:lo12:.LANCHOR121]
+	beq	.L2989
+	adrp	x0, .LANCHOR123
+	ldrb	w20, [x0, #:lo12:.LANCHOR123]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2810
+	tbz	x0, 8, .L2990
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC192
+	adrp	x0, .LC203
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC192
+	add	x0, x0, :lo12:.LC203
 	bl	printf
-.L2810:
+.L2990:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	str	x0, [x29, 112]
-.L2811:
+.L2991:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2817
-.L2809:
+	bne	.L2997
+.L2989:
 	add	x22, x22, 1
-	b	.L2808
-.L2817:
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	b	.L2988
+.L2997:
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2812
+	beq	.L2992
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2812
-	adrp	x0, .LANCHOR148
-	ldr	x0, [x0, #:lo12:.LANCHOR148]
+	bne	.L2992
+	adrp	x0, .LANCHOR153
+	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2813
+	bne	.L2993
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2813:
+.L2993:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2814
-	adrp	x0, .LANCHOR149
+	bne	.L2994
+	adrp	x0, .LANCHOR154
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR149]
+	ldr	x0, [x0, #:lo12:.LANCHOR154]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
@@ -17453,28 +18639,28 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w0, w28, w0
-.L2840:
+.L3020:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR152]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2812:
+.L2992:
 	add	x19, x19, 4
-	b	.L2811
-.L2814:
+	b	.L2991
+.L2994:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2816
+	tbz	x0, 8, .L2996
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2816:
+.L2996:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2840
+	b	.L3020
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17487,56 +18673,56 @@ gc_scan_src_blk_one_page:
 	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR62
-	add	x1, x19, :lo12:.LANCHOR62
+	adrp	x19, .LANCHOR63
+	add	x1, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR73
+	adrp	x20, .LANCHOR76
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	ldrb	w6, [x20, #:lo12:.LANCHOR73]
+	ldrb	w6, [x20, #:lo12:.LANCHOR76]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w21, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L2842:
+.L3022:
 	cmp	w21, w5
-	beq	.L2844
-	cbz	w4, .L2845
-	add	x1, x19, :lo12:.LANCHOR62
+	beq	.L3024
+	cbz	w4, .L3025
+	add	x1, x19, :lo12:.LANCHOR63
 	strh	w2, [x1, 2]
-.L2845:
-	cbz	w3, .L2846
-	add	x1, x19, :lo12:.LANCHOR62
+.L3025:
+	cbz	w3, .L3026
+	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L2846:
+.L3026:
 	mov	w0, 1
-	adrp	x22, .LANCHOR105
+	adrp	x22, .LANCHOR107
 	bl	buf_alloc
-	adrp	x23, .LANCHOR68
+	adrp	x23, .LANCHOR69
 	mov	x24, x0
-	add	x22, x22, :lo12:.LANCHOR105
-	add	x23, x23, :lo12:.LANCHOR68
+	add	x22, x22, :lo12:.LANCHOR107
+	add	x23, x23, :lo12:.LANCHOR69
 	mov	w26, 1
-.L2847:
-	add	x25, x19, :lo12:.LANCHOR62
+.L3027:
+	add	x25, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x25, 6]
 	cmp	w26, w1
-	ble	.L2855
+	ble	.L3035
 	mov	x0, x24
 	bl	buf_free
 	ldrb	w0, [x25, 4]
-	ldrb	w1, [x20, #:lo12:.LANCHOR73]
+	ldrb	w1, [x20, #:lo12:.LANCHOR76]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 4]
 	cmp	w1, w0
-	bne	.L2841
+	bne	.L3021
 	ldrh	w0, [x25, 2]
 	strb	wzr, [x25, 4]
 	add	w0, w0, 1
 	strh	w0, [x25, 2]
-.L2841:
+.L3021:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17544,29 +18730,29 @@ gc_scan_src_blk_one_page:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2844:
+.L3024:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w6
-	bne	.L2843
+	bne	.L3023
 	add	w2, w2, 1
 	mov	w0, 0
 	and	w2, w2, 65535
 	mov	w4, 1
-.L2843:
+.L3023:
 	add	x3, x1, x0, sxtw 1
 	ldrh	w21, [x3, 40]
 	mov	w3, 1
-	b	.L2842
-.L2855:
+	b	.L3022
+.L3035:
 	ldrh	w0, [x22]
 	cmp	w1, 3
 	mul	w2, w0, w21
 	ldrh	w0, [x25, 2]
-	bne	.L2848
+	bne	.L3028
 	add	w0, w0, w2
 	orr	w0, w0, w26, lsl 24
-.L2864:
+.L3044:
 	str	w0, [x24, 40]
 	mov	w1, 1
 	mov	x0, x24
@@ -17575,51 +18761,51 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x24, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2852
+	beq	.L3032
 	ldr	x0, [x24, 24]
 	ldr	w27, [x0, 4]
 	mov	w0, w27
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L2853
+	bne	.L3033
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w27
 	bl	pm_log2phys
-.L2853:
+.L3033:
 	ldr	w1, [x24, 40]
 	ldr	w0, [x29, 108]
 	cmp	w1, w0
-	bne	.L2852
-	add	x1, x19, :lo12:.LANCHOR62
-	adrp	x3, .LANCHOR65
-	ldr	x3, [x3, #:lo12:.LANCHOR65]
+	bne	.L3032
+	add	x1, x19, :lo12:.LANCHOR63
+	adrp	x3, .LANCHOR66
+	ldr	x3, [x3, #:lo12:.LANCHOR66]
 	ldrh	w0, [x1, 24]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w25, [x3, x2]
 	strh	w0, [x1, 24]
-.L2852:
-	add	x1, x19, :lo12:.LANCHOR62
+.L3032:
+	add	x1, x19, :lo12:.LANCHOR63
 	add	w26, w26, 1
 	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
 	strh	w0, [x1, 26]
-	b	.L2847
-.L2848:
+	b	.L3027
+.L3028:
 	cmp	w1, 2
-	bne	.L2850
+	bne	.L3030
 	lsl	w0, w0, 1
 	sub	w1, w0, #1
 	add	w0, w26, w2
 	add	w0, w1, w0
 	ldrb	w1, [x23]
 	orr	w0, w0, w1, lsl 24
-	b	.L2864
-.L2850:
+	b	.L3044
+.L3030:
 	add	w0, w0, w2
-	b	.L2864
+	b	.L3044
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17630,50 +18816,50 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR62
+	adrp	x19, .LANCHOR63
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2866
-	adrp	x1, .LANCHOR206
+	bne	.L3046
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 919
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 1004
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2866:
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+.L3046:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2886
+	beq	.L3066
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2868
+	tbz	x0, 8, .L3048
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	printf
-.L2868:
-	ldrh	w0, [x19, #:lo12:.LANCHOR62]
-	add	x14, x19, :lo12:.LANCHOR62
+.L3048:
+	ldrh	w0, [x19, #:lo12:.LANCHOR63]
+	add	x14, x19, :lo12:.LANCHOR63
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2869
+	cbnz	w1, .L3049
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2886:
+	strh	w0, [x19, #:lo12:.LANCHOR63]
+.L3066:
 	mov	w0, 0
-	b	.L2865
-.L2869:
+	b	.L3045
+.L3049:
 	adrp	x4, .LANCHOR7
-	ldrh	w3, [x19, #:lo12:.LANCHOR62]
+	ldrh	w3, [x19, #:lo12:.LANCHOR63]
 	mov	x22, x4
 	ldr	x1, [x4, #:lo12:.LANCHOR7]
 	mov	x2, x3
@@ -17681,67 +18867,67 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2870
+	beq	.L3050
 	cmp	w1, 224
-	beq	.L2870
-	cbz	w1, .L2871
+	beq	.L3050
+	cbz	w1, .L3051
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2870
+	beq	.L3050
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2870
+	beq	.L3050
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2900
-.L2870:
-	add	x0, x19, :lo12:.LANCHOR62
+	bne	.L3080
+.L3050:
+	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR62]
+	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L2886
-.L2871:
+	b	.L3066
+.L3051:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2873
-	adrp	x1, .LANCHOR206
+	cbz	w1, .L3053
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 939
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 1024
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2873:
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+.L3053:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2870
-.L2900:
+	b	.L3050
+.L3080:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2874
-	adrp	x1, .LANCHOR206
+	bne	.L3054
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 947
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 1032
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2874:
-	adrp	x1, .LANCHOR105
+.L3054:
+	adrp	x1, .LANCHOR107
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR80
-	adrp	x23, .LANCHOR72
-	ldrh	w20, [x1, #:lo12:.LANCHOR105]
+	adrp	x2, .LANCHOR83
+	adrp	x23, .LANCHOR75
+	ldrh	w20, [x1, #:lo12:.LANCHOR107]
 	mov	x24, x2
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
-	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	ldrh	w0, [x2, #:lo12:.LANCHOR83]
 	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -17749,15 +18935,15 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2887
-	adrp	x1, .LANCHOR68
-	ldrb	w21, [x1, #:lo12:.LANCHOR68]
+	bne	.L3067
+	adrp	x1, .LANCHOR69
+	ldrb	w21, [x1, #:lo12:.LANCHOR69]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2876
+	beq	.L3056
 	and	w21, w21, 65535
-.L2875:
-	add	x22, x19, :lo12:.LANCHOR62
+.L3055:
+	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
 	strb	w21, [x22, 6]
@@ -17769,106 +18955,106 @@ gc_scan_src_blk:
 	str	w20, [x0, 40]
 	mov	x25, x0
 	mov	w1, 1
-	adrp	x20, .LANCHOR65
+	adrp	x20, .LANCHOR66
 	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR72]
-	adrp	x23, .LANCHOR73
+	ldrh	w2, [x23, #:lo12:.LANCHOR75]
+	adrp	x23, .LANCHOR76
 	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR73]
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR65]
+	ldr	x0, [x20, #:lo12:.LANCHOR66]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2877
-.L2902:
+	bne	.L3057
+.L3082:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2865:
+.L3045:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2876:
-	ldrh	w0, [x23, #:lo12:.LANCHOR72]
+.L3056:
+	ldrh	w0, [x23, #:lo12:.LANCHOR75]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2875
-.L2887:
+	b	.L3055
+.L3067:
 	mov	w21, 1
-	b	.L2875
-.L2877:
+	b	.L3055
+.L3057:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2878
-	mov	w2, 980
-	adrp	x1, .LANCHOR206
+	beq	.L3058
+	mov	w2, 1065
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2902
-.L2878:
-	ldrb	w0, [x23, #:lo12:.LANCHOR73]
-	adrp	x22, .LANCHOR99
-	ldrh	w1, [x24, #:lo12:.LANCHOR80]
-	adrp	x23, .LANCHOR98
+	b	.L3082
+.L3058:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	adrp	x22, .LANCHOR102
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	adrp	x23, .LANCHOR101
 	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR99
-	add	x23, x23, :lo12:.LANCHOR98
+	add	x22, x22, :lo12:.LANCHOR102
+	add	x23, x23, :lo12:.LANCHOR101
 	mov	x26, 0
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2879:
+.L3059:
 	cmp	w21, w26
-	bgt	.L2884
+	bgt	.L3064
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
-	ldrh	w1, [x19, #:lo12:.LANCHOR62]
-	add	x3, x19, :lo12:.LANCHOR62
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	add	x3, x19, :lo12:.LANCHOR63
 	mov	x20, x0
 	ldr	x4, [x0, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2885
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	beq	.L3065
+	adrp	x0, .LC207
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2885:
-	add	x0, x19, :lo12:.LANCHOR62
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+.L3065:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2865
-.L2884:
+	b	.L3045
+.L3064:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2881
+	beq	.L3061
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2882
+	bne	.L3062
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2882:
+.L3062:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17879,20 +19065,20 @@ gc_scan_src_blk:
 	lsr	w1, w3, w1
 	and	w0, w0, w1
 	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR62
+	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L2881
+	bne	.L3061
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR65]
+	ldr	x4, [x20, #:lo12:.LANCHOR66]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2881:
+.L3061:
 	add	x26, x26, 1
-	b	.L2879
+	b	.L3059
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17908,13 +19094,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2904
-	adrp	x21, .LANCHOR207
+	beq	.L3084
+	adrp	x21, .LANCHOR211
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR207
+	add	x21, x21, :lo12:.LANCHOR211
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2912:
+.L3092:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -17922,7 +19108,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2905
+	beq	.L3085
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17932,45 +19118,45 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2906
-	adrp	x0, .LANCHOR99
+	bne	.L3086
+	adrp	x0, .LANCHOR102
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR98
-	ldrb	w3, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR101
+	ldrb	w3, [x2, #:lo12:.LANCHOR101]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2906:
+.L3086:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2907
-	mov	w2, 1419
+	beq	.L3087
+	mov	w2, 1504
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2907:
+.L3087:
 	mov	x0, x23
 	bl	buf_free
-.L2905:
+.L3085:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	adrp	x2, .LANCHOR118
-	ldr	w2, [x2, #:lo12:.LANCHOR118]
+	adrp	x2, .LANCHOR120
+	ldr	w2, [x2, #:lo12:.LANCHOR120]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2908
+	bcc	.L3088
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17981,42 +19167,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2903:
+.L3083:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2908:
+.L3088:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2903
+	bne	.L3083
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2912
-	b	.L2903
-.L2904:
+	bne	.L3092
+	b	.L3083
+.L3084:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR97
+	adrp	x3, .LANCHOR100
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2914
-	ldr	x4, [x3, #:lo12:.LANCHOR97]
+	bhi	.L3094
+	ldr	x4, [x3, #:lo12:.LANCHOR100]
+	mov	w5, 5000
 	ldr	w1, [x0, 540]
-	add	w1, w1, 98304
+	add	w1, w1, w5
 	ldr	w4, [x4, 44]
-	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2903
-.L2914:
-	ldr	x1, [x3, #:lo12:.LANCHOR97]
+	bls	.L3083
+.L3094:
+	ldr	x1, [x3, #:lo12:.LANCHOR100]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2903
+	b	.L3083
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -18042,49 +19228,49 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC197
+	adrp	x0, .LC208
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC208
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2941
+	beq	.L3121
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2941
+	bls	.L3121
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2942
-	adrp	x0, .LANCHOR68
-	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2922:
+	bne	.L3122
+	adrp	x0, .LANCHOR69
+	ldrb	w25, [x0, #:lo12:.LANCHOR69]
+.L3102:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR80
+	adrp	x19, .LANCHOR83
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w2, [x19, #:lo12:.LANCHOR83]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC198
+	adrp	x0, .LC209
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC209
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18096,39 +19282,39 @@ ftl_sblk_dump:
 	str	x19, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 164]
-	adrp	x0, .LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR105
+	adrp	x0, .LANCHOR107
+	add	x0, x0, :lo12:.LANCHOR107
 	str	x0, [x29, 112]
-.L2923:
+.L3103:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w0, w20
-	bls	.L2938
+	bls	.L3118
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	str	x0, [x29, 120]
-	b	.L2939
-.L2942:
+	b	.L3119
+.L3122:
 	mov	w25, 1
-	b	.L2922
-.L2935:
+	b	.L3102
+.L3115:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2924
+	beq	.L3104
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2925
+	bne	.L3105
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2926:
+.L3106:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18170,22 +19356,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2924
+	beq	.L3104
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2929
+	bne	.L3109
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2929:
+.L3109:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2930
+	bne	.L3110
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18193,81 +19379,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2930:
+.L3110:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2932
+	cbz	x0, .L3112
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2933
+	beq	.L3113
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2933
-	adrp	x0, .LC200
+	tbz	x0, 12, .L3113
+	adrp	x0, .LC211
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L2933:
+.L3113:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2932
+	beq	.L3112
 	cmn	w0, #1
-	beq	.L2932
-	adrp	x1, .LANCHOR208
+	beq	.L3112
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
 	mov	w2, 1299
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2932:
+.L3112:
 	add	w27, w27, 1
-.L2924:
+.L3104:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2937:
+.L3117:
 	cmp	w25, w22
-	bcs	.L2935
+	bcs	.L3115
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2939:
+.L3119:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2936
+	bls	.L3116
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2937
-.L2925:
+	b	.L3117
+.L3105:
 	cmp	w25, 2
-	bne	.L2927
+	bne	.L3107
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR69
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	orr	w19, w19, w0, lsl 24
-	b	.L2926
-.L2927:
+	b	.L3106
+.L3107:
 	add	w19, w20, w19
-	b	.L2926
-.L2936:
+	b	.L3106
+.L3116:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2923
-.L2938:
+	b	.L3103
+.L3118:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18276,11 +19462,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2920:
+.L3100:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18289,92 +19475,94 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2941:
+.L3121:
 	mov	w0, 0
-	b	.L2920
+	b	.L3100
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
 	.global	zftl_read
 	.type	zftl_read, %function
 zftl_read:
-	stp	x29, x30, [sp, -192]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
+	sub	sp, sp, #208
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
 	mov	w20, w0
 	adrp	x0, .LANCHOR14
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 48]
+	stp	x25, x26, [sp, 80]
 	mov	w19, w1
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w26, w2
-	stp	x23, x24, [sp, 48]
+	stp	x23, x24, [sp, 64]
 	mov	x22, x3
-	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2953
+	stp	x27, x28, [sp, 96]
+	tbz	x0, 12, .L3133
 	mov	w3, w2
-	adrp	x0, .LC202
+	adrp	x0, .LC213
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC202
+	add	x0, x0, :lo12:.LC213
 	mov	w1, w20
 	bl	printf
-.L2953:
-	cbnz	w20, .L2954
-	adrp	x0, .LANCHOR58
+.L3133:
+	cbnz	w20, .L3134
+	adrp	x0, .LANCHOR59
 	mov	w20, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2955:
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L3135:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2983
-	adrp	x1, .LANCHOR97
+	bcc	.L3163
+	adrp	x1, .LANCHOR100
 	add	w20, w20, w19
 	add	w3, w26, w20
 	stp	w3, wzr, [x29, 160]
-	ldr	x2, [x1, #:lo12:.LANCHOR97]
+	ldr	x2, [x1, #:lo12:.LANCHOR100]
 	sub	w3, w3, #1
 	str	x1, [x29, 120]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w26
 	str	w0, [x2, 24]
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 168]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR125
-	add	x28, x0, :lo12:.LANCHOR125
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR127
+	add	x28, x0, :lo12:.LANCHOR127
 	udiv	w27, w20, w2
 	udiv	w2, w3, w2
 	mov	w21, w27
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2957:
-	cbnz	w25, .L2981
+.L3137:
+	cbnz	w25, .L3161
 	ldr	w0, [x29, 164]
-.L2952:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+.L3132:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 208
 	ret
-.L2954:
+.L3134:
 	cmp	w20, 3
-	bhi	.L2983
+	bhi	.L3163
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2955
-.L2981:
+	b	.L3135
+.L3161:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L2984
+	bne	.L3164
 	cmp	w21, w27
-	bne	.L2959
+	bne	.L3139
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18383,18 +19571,18 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2958:
-	adrp	x23, .LANCHOR49
-	add	x1, x23, :lo12:.LANCHOR49
+.L3138:
+	adrp	x23, .LANCHOR50
+	add	x1, x23, :lo12:.LANCHOR50
 	add	x1, x1, 2
 	mov	w0, 0
-.L2962:
+.L3142:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2960
+	bne	.L3140
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2960
-	add	x1, x23, :lo12:.LANCHOR49
+	tbz	x2, 3, .L3140
+	add	x1, x23, :lo12:.LANCHOR50
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
 	lsl	w2, w19, 9
@@ -18405,89 +19593,89 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2961:
+.L3141:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L2968:
-	adrp	x0, .LANCHOR51
-	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+.L3148:
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 2
-	bls	.L2969
-	cbnz	w25, .L2957
-.L2969:
-	adrp	x0, .LANCHOR125
-	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2957
-	adrp	x24, .LANCHOR124
-	add	x0, x23, :lo12:.LANCHOR49
-	ldrb	w2, [x24, #:lo12:.LANCHOR124]
+	bls	.L3149
+	cbnz	w25, .L3137
+.L3149:
+	adrp	x0, .LANCHOR127
+	ldrb	w1, [x0, #:lo12:.LANCHOR127]
+	cbz	w1, .L3137
+	adrp	x24, .LANCHOR126
+	add	x0, x23, :lo12:.LANCHOR50
+	ldrb	w2, [x24, #:lo12:.LANCHOR126]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR209
-	add	x0, x0, :lo12:.LANCHOR209
+	adrp	x0, .LANCHOR213
+	add	x0, x0, :lo12:.LANCHOR213
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L2971:
+.L3151:
 	ldrb	w0, [x28]
-	cbnz	w0, .L2980
+	cbnz	w0, .L3160
 	mov	w0, -1
 	strb	wzr, [x28]
-	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2957
-.L2959:
+	strb	w0, [x24, #:lo12:.LANCHOR126]
+	b	.L3137
+.L3139:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2984:
+.L3164:
 	mov	w24, 0
-	b	.L2958
-.L2960:
+	b	.L3138
+.L3140:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2962
+	bne	.L3142
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2963
+	bne	.L3143
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2963:
+.L3143:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2964
+	bne	.L3144
 	ldr	x0, [x29, 168]
 	mov	w19, 0
-	add	x24, x0, :lo12:.LANCHOR121
-.L2965:
+	add	x24, x0, :lo12:.LANCHOR123
+.L3145:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2961
+	bcs	.L3141
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L2966
+	bhi	.L3146
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2966
+	bls	.L3146
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2966:
+.L3146:
 	add	w19, w19, 1
-	b	.L2965
-.L2964:
+	b	.L3145
+.L3144:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L2968
+	cbz	x0, .L3148
 	ldr	x2, [x29, 120]
-	ldr	x3, [x2, #:lo12:.LANCHOR97]
+	ldr	x3, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x3, 40]
 	add	w2, w2, 1
 	str	w2, [x3, 40]
@@ -18500,58 +19688,61 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2961
-.L2980:
-	ldrb	w0, [x24, #:lo12:.LANCHOR124]
+	b	.L3141
+.L3160:
+	ldrb	w0, [x24, #:lo12:.LANCHOR126]
 	cmp	w0, 255
-	bne	.L2972
+	bne	.L3152
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1065
+	mov	w2, 1070
 	bl	printf
-.L2972:
-	ldrb	w19, [x24, #:lo12:.LANCHOR124]
-	add	x0, x23, :lo12:.LANCHOR49
+.L3152:
+	ldrb	w19, [x24, #:lo12:.LANCHOR126]
+	add	x0, x23, :lo12:.LANCHOR50
 	ubfiz	x1, x19, 6, 8
 	lsl	x2, x19, 6
 	add	x1, x0, x1
 	str	x1, [x29, 144]
 	add	x1, x0, x2
 	ldrb	w0, [x0, x2]
-	strb	w0, [x24, #:lo12:.LANCHOR124]
+	strb	w0, [x24, #:lo12:.LANCHOR126]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L2973
+	bne	.L3153
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2974:
-	add	x10, x23, :lo12:.LANCHOR49
+.L3154:
+	add	x10, x23, :lo12:.LANCHOR50
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
-	ldr	w2, [x10, 36]
+	ldr	w3, [x10, 36]
 	ldr	w1, [x0, 4]
-	cmp	w1, w2
-	beq	.L2975
+	cmp	w1, w3
+	beq	.L3155
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
-	ldr	x3, [x1, #:lo12:.LANCHOR10]
-	ldr	w1, [x3, 552]
+	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	ldr	w1, [x2, 552]
 	add	w1, w1, 1
-	str	w1, [x3, 552]
+	str	w1, [x2, 552]
 	ldrb	w1, [x10, 1]
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC204
-	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC204
+	ldr	w2, [x0, 12]
+	str	w2, [sp]
+	mov	w2, w8
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC215
+	ldr	w4, [x10, 40]
+	add	x0, x0, :lo12:.LC215
 	bl	printf
 	ldr	x10, [x29, 112]
-	adrp	x0, .LANCHOR99
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR102
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	ldr	w1, [x10, 40]
 	sub	w2, w0, w3
@@ -18560,34 +19751,34 @@ zftl_read:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L2975:
-	add	x0, x23, :lo12:.LANCHOR49
+.L3155:
+	add	x0, x23, :lo12:.LANCHOR50
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L2976
+	bne	.L3156
 	cmn	w8, #1
-	bne	.L2977
-.L2976:
+	bne	.L3157
+.L3156:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1086
+	mov	w2, 1091
 	bl	printf
-.L2977:
-	add	x0, x23, :lo12:.LANCHOR49
+.L3157:
+	add	x0, x23, :lo12:.LANCHOR50
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	cmp	w0, w2
-	bls	.L2978
+	bls	.L3158
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18595,55 +19786,55 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2979:
+.L3159:
 	ldr	x1, [x29, 144]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	bl	buf_remove_buf
 	ldr	x0, [x29, 144]
 	bl	buf_free
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L2971
-.L2973:
+	b	.L3151
+.L3153:
 	cmp	w8, 256
-	bne	.L2974
-	adrp	x0, .LANCHOR99
+	bne	.L3154
+	adrp	x0, .LANCHOR102
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
 	mov	w5, 1
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	str	w5, [x29, 152]
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	stp	w8, w5, [x29, 108]
 	sub	w4, w4, w0
 	lsr	w0, w3, w0
 	lsl	w4, w5, w4
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w0
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
-	stp	w8, w4, [x29, 108]
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	and	w1, w4, 65535
+	str	w4, [x29, 152]
 	bl	printf
-	ldr	w4, [x29, 112]
+	ldr	w5, [x29, 112]
 	mov	w2, 0
-	ldr	w5, [x29, 152]
-	mov	w0, w4
+	ldr	w4, [x29, 152]
 	mov	w1, w5
+	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L2974
-.L2978:
+	b	.L3154
+.L3158:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L2979
-.L2983:
+	b	.L3159
+.L3163:
 	mov	w0, -1
-	b	.L2952
+	b	.L3132
 	.size	zftl_read, .-zftl_read
 	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18717,125 +19908,125 @@ gc_check_data_one_wl:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR62
+	adrp	x19, .LANCHOR63
 	stp	x21, x22, [sp, 48]
-	add	x22, x19, :lo12:.LANCHOR62
+	add	x22, x19, :lo12:.LANCHOR63
 	adrp	x20, .LANCHOR10
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3006
+	cbnz	x0, .L3186
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3006:
-	add	x0, x19, :lo12:.LANCHOR62
+.L3186:
+	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3007
-	adrp	x1, .LANCHOR210
+	cbnz	x22, .L3187
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
-	mov	w2, 367
-	add	x1, x1, :lo12:.LANCHOR210
+	mov	w2, 447
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3007:
-	adrp	x2, .LANCHOR105
+.L3187:
+	adrp	x2, .LANCHOR107
 	add	x28, x21, 96
 	add	x27, x21, 80
-	add	x2, x2, :lo12:.LANCHOR105
+	add	x2, x2, :lo12:.LANCHOR107
 	mov	w26, 0
-.L3008:
+.L3188:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3017
-	adrp	x25, .LANCHOR68
+	bge	.L3197
+	adrp	x25, .LANCHOR69
 	mov	w24, 1
-	add	x23, x19, :lo12:.LANCHOR62
-	add	x25, x25, :lo12:.LANCHOR68
-	b	.L3018
-.L3016:
+	add	x23, x19, :lo12:.LANCHOR63
+	add	x25, x25, :lo12:.LANCHOR69
+	b	.L3198
+.L3196:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3009
+	bne	.L3189
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3030:
+.L3210:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
 	mov	x0, x22
 	bl	sblk_read_page
 	ldr	w0, [x22, 52]
-	adrp	x1, .LANCHOR147
+	adrp	x1, .LANCHOR152
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3012
+	beq	.L3192
 	ldrh	w0, [x23, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR147]
+	ldr	x4, [x1, #:lo12:.LANCHOR152]
 	ldr	x3, [x22, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3012
-	adrp	x4, .LANCHOR148
-	ldr	x4, [x4, #:lo12:.LANCHOR148]
+	bne	.L3192
+	adrp	x4, .LANCHOR153
+	ldr	x4, [x4, #:lo12:.LANCHOR153]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3013
-.L3012:
-	add	x4, x1, :lo12:.LANCHOR147
+	beq	.L3193
+.L3192:
+	add	x4, x1, :lo12:.LANCHOR152
 	ldrh	w0, [x23, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR147]
+	ldr	x1, [x1, #:lo12:.LANCHOR152]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3013
-	adrp	x19, .LANCHOR72
+	beq	.L3193
+	adrp	x19, .LANCHOR75
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
-	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mul	w3, w3, w0
-	adrp	x0, .LC205
-	add	x0, x0, :lo12:.LC205
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	rknand_print_hex
-	ldrh	w0, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR148
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	adrp	x19, .LANCHOR153
 	ldrb	w3, [x27, 9]
 	mov	w2, 4
-	ldr	x1, [x19, #:lo12:.LANCHOR148]
+	ldr	x1, [x19, #:lo12:.LANCHOR153]
 	mul	w3, w3, w0
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3014
+	tbz	x0, 10, .L3194
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
-	ldr	x3, [x19, #:lo12:.LANCHOR148]
+	ldr	x3, [x19, #:lo12:.LANCHOR153]
 	lsl	x0, x0, 2
 	ldr	w4, [x1, 12]
 	str	w4, [sp]
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC207
+	adrp	x0, .LC218
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC218
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3014:
+.L3194:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -18845,7 +20036,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3005:
+.L3185:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18854,43 +20045,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3009:
+.L3189:
 	cmp	w3, 2
-	bne	.L3011
+	bne	.L3191
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3030
-.L3011:
+	b	.L3210
+.L3191:
 	add	w0, w0, w1
-	b	.L3030
-.L3013:
+	b	.L3210
+.L3193:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3018:
+.L3198:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3016
+	ble	.L3196
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3008
-.L3017:
-	add	x19, x19, :lo12:.LANCHOR62
+	b	.L3188
+.L3197:
+	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
-	adrp	x1, .LANCHOR104
-	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbz	w1, .L3019
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	cbz	w1, .L3199
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3019:
-.L3015:
+.L3199:
+.L3195:
 	mov	w0, 0
-	b	.L3005
+	b	.L3185
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18902,50 +20093,50 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR83
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR83]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR113
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	ldr	x1, [x0, #:lo12:.LANCHOR113]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3032
-	adrp	x1, .LANCHOR211
+	beq	.L3212
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 1575
-	add	x1, x1, :lo12:.LANCHOR211
+	mov	w2, 1627
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3032:
-	adrp	x27, .LANCHOR121
+.L3212:
+	adrp	x27, .LANCHOR123
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR121
+	add	x0, x27, :lo12:.LANCHOR123
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3033:
+.L3213:
 	cmp	w24, w23
-	blt	.L3039
+	blt	.L3219
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3040
+	tbz	x0, 12, .L3220
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC211
+	adrp	x0, .LC222
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3040:
+.L3220:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -18956,38 +20147,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3039:
+.L3219:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3034
-	ldrb	w20, [x27, #:lo12:.LANCHOR121]
+	beq	.L3214
+	ldrb	w20, [x27, #:lo12:.LANCHOR123]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3035
-	adrp	x0, .LC208
+	tbz	x0, 12, .L3215
+	adrp	x0, .LC219
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3035:
-	adrp	x25, .LANCHOR105
-	adrp	x26, .LC209
+.L3215:
+	adrp	x25, .LANCHOR107
+	adrp	x26, .LC220
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC209
-.L3038:
+	add	x25, x25, :lo12:.LANCHOR107
+	add	x26, x26, :lo12:.LC220
+.L3218:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3036
+	beq	.L3216
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3036
+	bne	.L3216
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18999,15 +20190,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3037
+	cbz	w0, .L3217
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	ldr	x1, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LC221
+	add	x0, x0, :lo12:.LC221
 	bl	rknand_print_hex
-.L3037:
+.L3217:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -19016,13 +20207,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3036:
+.L3216:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3038
-.L3034:
+	bgt	.L3218
+.L3214:
 	add	x24, x24, 1
-	b	.L3033
+	b	.L3213
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -19038,9 +20229,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3062
+	beq	.L3242
 	bl	zftl_insert_data_list
-.L3062:
+.L3242:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -19064,54 +20255,54 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x23, x0, :lo12:.LANCHOR49
+	add	x23, x0, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3067:
-	adrp	x2, .LANCHOR57
-	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3069
-	adrp	x3, .LANCHOR56
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+.L3247:
+	adrp	x2, .LANCHOR58
+	ldrb	w1, [x2, #:lo12:.LANCHOR58]
+	cbz	w1, .L3249
+	adrp	x3, .LANCHOR57
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR56]
-	strb	w1, [x2, #:lo12:.LANCHOR57]
+	ldrb	w4, [x3, #:lo12:.LANCHOR57]
+	strb	w1, [x2, #:lo12:.LANCHOR58]
 	ubfiz	x27, x4, 6, 8
 	add	x5, x0, x27
 	stp	x4, x5, [x29, 112]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR118
+	strb	w0, [x3, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR120
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR118]
+	ldr	w1, [x0, #:lo12:.LANCHOR120]
 	cmp	w2, w1
-	bcc	.L3071
-	adrp	x1, .LANCHOR212
+	bcc	.L3251
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 496
-	add	x1, x1, :lo12:.LANCHOR212
+	mov	w2, 501
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3071:
+.L3251:
 	ldr	x0, [x29, 112]
-	ldr	w1, [x19, #:lo12:.LANCHOR118]
+	ldr	w1, [x19, #:lo12:.LANCHOR120]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3072
+	bcc	.L3252
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3066:
+.L3246:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19119,25 +20310,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3072:
+.L3252:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR121
 	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3074
-	adrp	x0, .LANCHOR173
-	ldrb	w1, [x0, #:lo12:.LANCHOR173]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	cbz	w1, .L3254
+	adrp	x0, .LANCHOR174
+	ldrb	w1, [x0, #:lo12:.LANCHOR174]
 	add	x1, x23, x1, lsl 6
-.L3075:
+.L3255:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3076
+	bne	.L3256
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3074
+	bne	.L3254
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19146,33 +20337,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3067
-.L3076:
+	b	.L3247
+.L3256:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3075
-.L3074:
+	b	.L3255
+.L3254:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3078
+	bne	.L3258
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3078:
+.L3258:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3081:
+.L3261:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3079
+	bne	.L3259
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3079
+	tbz	x2, 3, .L3259
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19180,50 +20371,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3080:
-	adrp	x0, .LANCHOR121
+.L3260:
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w1
-	bcs	.L3105
+	bcs	.L3285
 	add	w20, w21, w20
-	cbz	x24, .L3083
-	cbz	w21, .L3084
+	cbz	x24, .L3263
+	cbz	w21, .L3264
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3084:
+.L3264:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3085
+	bcc	.L3265
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3105:
+.L3285:
 	mov	w24, 0
-	b	.L3082
-.L3079:
+	b	.L3262
+.L3259:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3081
+	bne	.L3261
 	mov	x24, 0
-	b	.L3080
-.L3085:
+	b	.L3260
+.L3265:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3105
-.L3083:
+	b	.L3285
+.L3263:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3086
+	beq	.L3266
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19236,11 +20427,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3087
+	bne	.L3267
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3088
-.L3087:
+	bne	.L3268
+.L3267:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19248,73 +20439,73 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC223
+	add	x0, x0, :lo12:.LC223
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC171
+	adrp	x0, .LC182
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC171
+	add	x0, x0, :lo12:.LC182
 	bl	rknand_print_hex
-.L3088:
+.L3268:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3089
+	bne	.L3269
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3090
-.L3089:
-	adrp	x1, .LANCHOR212
+	bne	.L3270
+.L3269:
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 567
-	add	x1, x1, :lo12:.LANCHOR212
+	mov	w2, 572
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3090:
-	cbz	w21, .L3091
+.L3270:
+	cbz	w21, .L3271
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3092
+	beq	.L3272
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3093:
+.L3273:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3091:
+.L3271:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L3094
-	bls	.L3095
+	bcc	.L3274
+	bls	.L3275
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3095:
-	cbz	x27, .L3082
+.L3275:
+	cbz	x27, .L3262
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3082:
+.L3262:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3097
+	cbnz	w0, .L3277
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3097:
+.L3277:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR173
+	adrp	x20, .LANCHOR174
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19335,94 +20526,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR173
+	add	x0, x20, :lo12:.LANCHOR174
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR119]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR213
+	strb	w2, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR217
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR213]
+	str	wzr, [x0, #:lo12:.LANCHOR217]
 	ldrh	w0, [x19, 6]
-	bhi	.L3098
+	bhi	.L3278
 	cmp	w0, 1
-	bne	.L3070
-.L3098:
+	bne	.L3250
+.L3278:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR173]
+	ldrb	w0, [x20, #:lo12:.LANCHOR174]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3102:
+.L3282:
 	cmp	w1, w4
-	bne	.L3103
-	strb	w3, [x20, #:lo12:.LANCHOR173]
+	bne	.L3283
+	strb	w3, [x20, #:lo12:.LANCHOR174]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x23, x0
-	strb	w2, [x3, #:lo12:.LANCHOR119]
+	strb	w2, [x3, #:lo12:.LANCHOR121]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3070
+	bne	.L3250
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3070:
-	adrp	x0, .LANCHOR57
-	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3067
-.L3069:
+.L3250:
+	adrp	x0, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR58]
+	cbnz	w0, .L3247
+.L3249:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3066
-.L3094:
+	b	.L3246
+.L3274:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3096
+	beq	.L3276
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3095
-.L3096:
+	b	.L3275
+.L3276:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3095
-.L3103:
+	b	.L3275
+.L3283:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3102
-.L3104:
+	b	.L3282
+.L3284:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3092:
+.L3272:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3093
-.L3086:
-	cbnz	w21, .L3104
+	b	.L3273
+.L3266:
+	cbnz	w21, .L3284
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3091
+	b	.L3271
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19430,21 +20621,21 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3128
+	cbnz	w0, .L3308
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3127
-	adrp	x20, .LANCHOR62
-	add	x3, x20, :lo12:.LANCHOR62
+	cbz	x0, .L3307
+	adrp	x20, .LANCHOR63
+	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -19458,52 +20649,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3130
-	adrp	x1, .LANCHOR214
+	bne	.L3310
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 601
-	add	x1, x1, :lo12:.LANCHOR214
+	mov	w2, 684
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3130:
+.L3310:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3131
+	bne	.L3311
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3131:
+.L3311:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3132
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	bne	.L3312
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3135:
+.L3315:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3133
+	bne	.L3313
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3133
+	tbz	x2, 1, .L3313
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3127
-	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC213
+	tbz	x0, 8, .L3307
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LC224
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC213
+	add	x0, x0, :lo12:.LC224
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3127:
+.L3307:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19512,14 +20703,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3133:
+.L3313:
 	add	x1, x1, 64
-	cmp	x0, x1
-	bne	.L3135
-	adrp	x0, .LANCHOR121
+	cmp	x1, x0
+	bne	.L3315
+	adrp	x0, .LANCHOR123
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19530,65 +20721,65 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3136
+	tbz	x0, 8, .L3316
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR62
+	add	x1, x20, :lo12:.LANCHOR63
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC214
+	adrp	x0, .LC225
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC225
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3136:
+.L3316:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3127
-.L3132:
+	b	.L3307
+.L3312:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3137
-	add	x20, x20, :lo12:.LANCHOR62
+	tbz	x0, 8, .L3317
+	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC214
+	adrp	x0, .LC225
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC225
 	bl	printf
-.L3137:
+.L3317:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3127
-.L3128:
+	b	.L3307
+.L3308:
 	adrp	x1, .LANCHOR10
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR69
 	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR62
+	adrp	x24, .LANCHOR63
 	ldr	x22, [x1, #:lo12:.LANCHOR10]
-	ldrb	w25, [x0, #:lo12:.LANCHOR68]
+	ldrb	w25, [x0, #:lo12:.LANCHOR69]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3138
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3139
-	add	x0, x24, :lo12:.LANCHOR62
+	bne	.L3318
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L3319
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
 	add	w21, w19, w19, lsl 1
@@ -19596,30 +20787,30 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3140:
-	adrp	x1, .LANCHOR72
+.L3320:
+	adrp	x1, .LANCHOR75
 	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR62
+	add	x4, x24, :lo12:.LANCHOR63
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR72]
+	ldrh	w3, [x1, #:lo12:.LANCHOR75]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR148
-	ldr	x7, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR153
+	ldr	x7, [x0, #:lo12:.LANCHOR153]
 	sub	w3, w3, #1
-.L3143:
+.L3323:
 	cmp	w2, w8
-	blt	.L3145
-.L3172:
+	blt	.L3325
+.L3354:
 	mov	w23, 1
-	b	.L3141
-.L3139:
-	add	x0, x24, :lo12:.LANCHOR62
+	b	.L3321
+.L3319:
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
+	adrp	x0, .LANCHOR219
+	add	x0, x0, :lo12:.LANCHOR219
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19630,110 +20821,106 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3140
-.L3141:
+	beq	.L3320
+.L3321:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3146
-	adrp	x0, .LANCHOR148
+	tbz	x1, 8, .L3326
+	adrp	x0, .LANCHOR153
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR148]
-	add	x0, x24, :lo12:.LANCHOR62
+	ldr	x2, [x0, #:lo12:.LANCHOR153]
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC215
+	adrp	x0, .LC226
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC226
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3146:
-	adrp	x0, .LANCHOR49
+.L3326:
+	adrp	x0, .LANCHOR50
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR50
 	str	x0, [x29, 120]
-.L3147:
-	ldrb	w2, [x22, 9]
+.L3327:
+	ldrb	w1, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
 	and	w0, w0, 65535
 	str	w0, [x29, 156]
-	mul	w1, w25, w2
-	cmp	w0, w1
-	blt	.L3159
+	mul	w3, w25, w1
+	cmp	w0, w3
+	blt	.L3339
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3160
-	sub	w3, w1, #1
-	mov	w2, 0
-.L3161:
-	cmp	w2, w3
-	blt	.L3167
-	ldr	x0, [x0, w3, sxtw 3]
-	mov	w2, -1
-	strb	w2, [x0]
-	ldr	x0, [x29, 160]
-	bl	sblk_prog_page
-	b	.L3166
-.L3138:
-	adrp	x0, .LANCHOR104
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3142
-	add	x0, x24, :lo12:.LANCHOR62
+	bne	.L3340
+	adrp	x2, .LANCHOR73
+	ldr	x3, [x29, 160]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	cbz	w2, .L3341
+.L3344:
+	strb	wzr, [x3, 60]
+	b	.L3342
+.L3318:
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbnz	w0, .L3322
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3140
-.L3142:
-	add	x0, x24, :lo12:.LANCHOR62
+	b	.L3320
+.L3322:
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3140
-.L3145:
+	b	.L3320
+.L3325:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3172
+	beq	.L3354
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3144
+	bne	.L3324
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3127
+	bcs	.L3307
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3144:
+.L3324:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3143
-.L3159:
+	b	.L3323
+.L3339:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR69
-	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3148
+	bne	.L3328
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3149
+	cbnz	x0, .L3329
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19741,17 +20928,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3127
-.L3149:
-	adrp	x0, .LANCHOR69
+	cbz	x0, .L3307
+.L3329:
+	adrp	x0, .LANCHOR72
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR72
-	adrp	x6, .LANCHOR148
-	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	adrp	x5, .LANCHOR75
+	adrp	x6, .LANCHOR153
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR62
+	add	x1, x24, :lo12:.LANCHOR63
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR72]
+	ldrh	w7, [x5, #:lo12:.LANCHOR75]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -19762,32 +20949,32 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3150
-	adrp	x0, .LANCHOR147
-	adrp	x4, .LANCHOR73
+	bne	.L3330
+	adrp	x0, .LANCHOR152
+	adrp	x4, .LANCHOR76
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR147]
+	ldr	x1, [x0, #:lo12:.LANCHOR152]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR73]
+	ldrb	w2, [x4, #:lo12:.LANCHOR76]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR72]
-	ldrb	w1, [x4, #:lo12:.LANCHOR73]
+	ldrh	w0, [x5, #:lo12:.LANCHOR75]
+	ldrb	w1, [x4, #:lo12:.LANCHOR76]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR148]
+	ldr	x1, [x6, #:lo12:.LANCHOR153]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR123
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19796,9 +20983,9 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR72]
+	ldrh	w1, [x5, #:lo12:.LANCHOR75]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR73]
+	ldrb	w0, [x4, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
@@ -19808,29 +20995,29 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3148:
-	adrp	x0, .LANCHOR69
+.L3328:
+	adrp	x0, .LANCHOR72
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR49
-	add	x3, x0, :lo12:.LANCHOR49
+	ldr	x4, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR50
+	add	x3, x0, :lo12:.LANCHOR50
 	ldrb	w2, [x4, x27]
 	ubfiz	x0, x2, 6, 8
 	add	x0, x3, x0
 	add	x3, x3, x2, lsl 6
 	str	x0, [x1, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR149
+	adrp	x5, .LANCHOR154
 	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x3, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w0, 3
-	bne	.L3154
+	bne	.L3334
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR105
-	ldrh	w6, [x6, #:lo12:.LANCHOR105]
+	adrp	x6, .LANCHOR107
+	ldrh	w6, [x6, #:lo12:.LANCHOR107]
 	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x1, x22, x1, sxtw 1
@@ -19842,18 +21029,18 @@ gc_do_copy_back:
 	ldrh	w6, [x3, 48]
 	orr	w1, w1, w21
 	str	w1, [x3, 40]
-	ldr	x3, [x5, #:lo12:.LANCHOR149]
+	ldr	x3, [x5, #:lo12:.LANCHOR154]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3155:
+.L3335:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3158
+	tbz	x0, 8, .L3338
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
 	add	x2, x0, x2, lsl 6
-	add	x0, x24, :lo12:.LANCHOR62
+	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w3, [x0, 6]
 	ldr	x0, [x2, 24]
 	ldrb	w7, [x2, 1]
@@ -19862,22 +21049,22 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC227
+	add	x0, x0, :lo12:.LC227
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3158:
+.L3338:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3147
-.L3150:
+	b	.L3327
+.L3330:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR148]
+	ldr	x0, [x6, #:lo12:.LANCHOR153]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19887,10 +21074,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3152
-	adrp	x0, .LANCHOR99
+	bne	.L3332
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR99]
+	ldrh	w4, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -19898,146 +21085,164 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3152
+	bne	.L3332
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3152
-	adrp	x1, .LANCHOR214
+	bne	.L3332
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
-	mov	w2, 716
-	add	x1, x1, :lo12:.LANCHOR214
+	mov	w2, 799
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3152:
+.L3332:
 	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR118
-	ldr	w1, [x1, #:lo12:.LANCHOR118]
+	adrp	x1, .LANCHOR120
+	ldr	w1, [x1, #:lo12:.LANCHOR120]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3153
+	bcc	.L3333
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3153:
-	adrp	x1, .LANCHOR147
+.L3333:
+	adrp	x1, .LANCHOR152
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR147]
+	ldr	x1, [x1, #:lo12:.LANCHOR152]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3148
-.L3154:
+	b	.L3328
+.L3334:
 	cmp	w0, 2
-	bne	.L3156
-	adrp	x0, .LANCHOR104
-	adrp	x1, .LANCHOR105
-	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3157
+	bne	.L3336
+	adrp	x0, .LANCHOR70
+	adrp	x1, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbnz	w0, .L3337
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3215:
+.L3398:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3156:
+.L3336:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR149]
+	ldr	x0, [x5, #:lo12:.LANCHOR154]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3155
-.L3157:
+	b	.L3335
+.L3337:
 	add	w0, w19, w26, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR105]
+	ldrh	w1, [x1, #:lo12:.LANCHOR107]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3215
-.L3160:
-	adrp	x1, .LANCHOR70
-	ldrb	w3, [x1, #:lo12:.LANCHOR70]
-	ldr	x1, [x29, 160]
-	cbz	w3, .L3162
-.L3165:
-	strb	wzr, [x1, 60]
-	b	.L3163
-.L3162:
+	b	.L3398
+.L3341:
 	cmp	w23, 1
-	bne	.L3164
-	mov	w3, 9
-.L3214:
-	strb	w3, [x1, 60]
-.L3163:
+	bne	.L3343
+	mov	w2, 9
+.L3397:
+	strb	w2, [x3, 60]
+.L3342:
+	mov	w2, w1
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3166:
-	adrp	x1, .LANCHOR70
+.L3345:
+	adrp	x1, .LANCHOR73
 	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
 	and	w0, w3, 65535
-	cbz	w1, .L3168
+	cbz	w1, .L3350
 	add	w0, w0, w0, lsl 1
-.L3169:
-	adrp	x1, .LANCHOR97
-	add	x24, x24, :lo12:.LANCHOR62
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+.L3351:
+	adrp	x1, .LANCHOR100
+	add	x24, x24, :lo12:.LANCHOR63
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
 	ldrh	w1, [x24, 314]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR75
 	and	w0, w0, 65535
 	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR72]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3170
+	blt	.L3352
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3170:
+.L3352:
 	bl	gc_write_completed
-	b	.L3127
-.L3164:
+	b	.L3307
+.L3343:
 	cmp	w23, 2
-	bne	.L3165
-	mov	w3, 13
-	b	.L3214
-.L3167:
+	bne	.L3344
+	mov	w2, 13
+	b	.L3397
+.L3340:
+	adrp	x2, .LANCHOR70
+	ldrb	w2, [x2, #:lo12:.LANCHOR70]
+	cbz	w2, .L3355
+	adrp	x2, .LANCHOR71
+	ldrb	w2, [x2, #:lo12:.LANCHOR71]
+	cbnz	w2, .L3347
+.L3346:
+	sub	w1, w3, #1
+.L3348:
+	cmp	w2, w1
+	blt	.L3349
+	ldr	x0, [x0, w1, sxtw 3]
+	mov	w1, -1
+	strb	w1, [x0]
+	mov	w1, w3
+	ldr	x0, [x29, 160]
+	bl	sblk_prog_page
+	b	.L3345
+.L3355:
+	mov	w2, 0
+	b	.L3346
+.L3347:
+	bl	sblk_3d_mlc_prog_pages
+	b	.L3345
+.L3349:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3161
-.L3168:
-	adrp	x1, .LANCHOR104
-	ldrb	w2, [x1, #:lo12:.LANCHOR104]
+	b	.L3348
+.L3350:
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3169
+	b	.L3351
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -20045,231 +21250,247 @@ gc_do_copy_back:
 	.type	zftl_do_gc, %function
 zftl_do_gc:
 	sub	sp, sp, #128
-	adrp	x1, .LANCHOR94
+	adrp	x1, .LANCHOR97
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	stp	x21, x22, [sp, 48]
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR145
-	ldrh	w22, [x1, #:lo12:.LANCHOR94]
-	adrp	x1, .LANCHOR90
+	adrp	x19, .LANCHOR150
+	stp	x21, x22, [sp, 48]
+	ldrh	w22, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR93
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR10
-	ldrh	w21, [x1, #:lo12:.LANCHOR90]
+	ldrh	w21, [x1, #:lo12:.LANCHOR93]
 	stp	x25, x26, [sp, 80]
-	ldrb	w1, [x19, #:lo12:.LANCHOR145]
+	ldrb	w1, [x19, #:lo12:.LANCHOR150]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
-	ldr	x24, [x23, #:lo12:.LANCHOR10]
+	ldr	x20, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3323
-	mov	w26, w0
+	bhi	.L3507
+	mov	w25, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3219
-	add	x0, x0, :lo12:.L3219
+	adrp	x0, .L3402
+	add	x0, x0, :lo12:.L3402
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3219
+	adr	x1, .Lrtx3402
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3219:
+.Lrtx3402:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3219:
-	.2byte	(.L3218 - .Lrtx3219) / 4
-	.2byte	(.L3220 - .Lrtx3219) / 4
-	.2byte	(.L3221 - .Lrtx3219) / 4
-	.2byte	(.L3222 - .Lrtx3219) / 4
-	.2byte	(.L3223 - .Lrtx3219) / 4
-	.2byte	(.L3224 - .Lrtx3219) / 4
-	.2byte	(.L3225 - .Lrtx3219) / 4
+.L3402:
+	.2byte	(.L3401 - .Lrtx3402) / 4
+	.2byte	(.L3403 - .Lrtx3402) / 4
+	.2byte	(.L3404 - .Lrtx3402) / 4
+	.2byte	(.L3405 - .Lrtx3402) / 4
+	.2byte	(.L3406 - .Lrtx3402) / 4
+	.2byte	(.L3407 - .Lrtx3402) / 4
+	.2byte	(.L3408 - .Lrtx3402) / 4
 	.section	.text.zftl_do_gc
-.L3224:
-	adrp	x20, .LANCHOR62
-	add	x24, x20, :lo12:.LANCHOR62
+.L3407:
+	adrp	x20, .LANCHOR63
+	add	x24, x20, :lo12:.LANCHOR63
 	mov	w22, 0
-.L3226:
+.L3409:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3319
+	cbz	w0, .L3503
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x20, :lo12:.LANCHOR62
+	add	x20, x20, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR145]
+	strb	wzr, [x19, #:lo12:.LANCHOR150]
 	str	xzr, [x20, 8]
-	b	.L3387
-.L3218:
-	adrp	x0, .LANCHOR92
-	adrp	x28, .LANCHOR85
-	adrp	x27, .LANCHOR83
-	ldrh	w1, [x24, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
-	ldrh	w25, [x28, #:lo12:.LANCHOR85]
+	b	.L3574
+.L3401:
+	adrp	x0, .LANCHOR95
+	adrp	x27, .LANCHOR88
+	ldrh	w2, [x20, 80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w24, [x27, #:lo12:.LANCHOR88]
 	add	w22, w22, w0
-	ldrh	w0, [x27, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR86
+	str	x0, [x29, 104]
 	and	w22, w22, 65535
-	add	w25, w25, w0
-	mov	w0, 65535
-	and	w25, w25, 65535
-	cmp	w1, w0
-	beq	.L3227
-	cbnz	w26, .L3228
-	adrp	x0, .LANCHOR74
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	add	w24, w24, w1
+	mov	w1, 65535
+	and	w24, w24, 65535
+	cmp	w2, w1
+	beq	.L3410
+	cbnz	w25, .L3411
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
 	cmp	w21, w0, lsl 1
-	blt	.L3228
-.L3323:
+	blt	.L3411
+.L3507:
 	mov	w20, 16
-	b	.L3216
-.L3228:
-	adrp	x5, .LANCHOR82
+	b	.L3399
+.L3411:
+	adrp	x5, .LANCHOR85
 	mov	w1, 5
-	adrp	x26, .LANCHOR71
-	ldrh	w0, [x5, #:lo12:.LANCHOR82]
+	adrp	x25, .LANCHOR74
+	ldrh	w0, [x5, #:lo12:.LANCHOR85]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR82]
+	strh	w0, [x5, #:lo12:.LANCHOR85]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3229
+	beq	.L3412
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR146
-	mov	x20, x1
+	adrp	x1, .LANCHOR151
+	mov	x26, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR146]
+	ldr	w2, [x1, #:lo12:.LANCHOR151]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR146]
+	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR80
-	ldrh	w4, [x4, #:lo12:.LANCHOR80]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
 	cmp	w4, w3
-	bcs	.L3230
+	bcs	.L3413
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3229
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	bls	.L3412
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w1, w3
-	bls	.L3229
-.L3230:
-	ldrb	w2, [x26, #:lo12:.LANCHOR71]
+	bls	.L3412
+.L3413:
+	ldrb	w2, [x25, #:lo12:.LANCHOR74]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3231
+	cbz	w0, .L3414
 	mov	w0, 1
-	str	wzr, [x20, #:lo12:.LANCHOR146]
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3229:
-	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3231:
+	str	wzr, [x26, #:lo12:.LANCHOR151]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3412:
+	strh	wzr, [x5, #:lo12:.LANCHOR85]
+.L3414:
 	cmp	w22, 15
-	bls	.L3325
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L3509
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	bhi	.L3325
-	cmp	w25, 0
-	cset	w20, eq
-	add	w20, w20, 1
-.L3232:
+	bhi	.L3509
+	cmp	w24, 0
+	cset	w24, eq
+	add	w24, w24, 1
+.L3415:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3233
+	tbz	x0, 8, .L3416
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x26, #:lo12:.LANCHOR71]
+	ldrb	w2, [x25, #:lo12:.LANCHOR74]
 	mov	w3, w21
-	mov	w1, 1850
+	mov	w1, 1935
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
-	ldrh	w0, [x24, 80]
+	ldrh	w0, [x20, 80]
 	str	w0, [sp]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
 	bl	printf
-.L3233:
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+.L3416:
+	ldrb	w0, [x25, #:lo12:.LANCHOR74]
 	mov	w2, 1
-	mov	w1, w20
+	mov	w1, w24
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3234
-.L3235:
+	ble	.L3417
+.L3418:
 	mov	w0, 1
-.L3389:
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3325:
-	mov	w20, 2
-	b	.L3232
-.L3234:
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+.L3576:
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3509:
+	mov	w24, 2
+	b	.L3415
+.L3417:
+	ldrb	w0, [x25, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3235
-	b	.L3323
-.L3227:
-	cmp	w26, 1
-	bne	.L3237
+	bgt	.L3418
+	b	.L3507
+.L3410:
+	adrp	x28, .LANCHOR14
+	ldr	w0, [x28, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3420
+	adrp	x0, .LANCHOR74
+	ldrh	w7, [x20, 122]
+	ldrh	w6, [x20, 120]
+	mov	w4, w22
+	ldrh	w5, [x20, 124]
+	mov	w3, w21
+	ldrb	w2, [x0, #:lo12:.LANCHOR74]
+	mov	w1, 1947
+	str	w25, [sp]
+	adrp	x0, .LC228
+	add	x0, x0, :lo12:.LC228
+	bl	printf
+.L3420:
+	cmp	w25, 1
+	bne	.L3421
 	bl	gc_scan_static_data
-	adrp	x24, .LANCHOR71
+	adrp	x26, .LANCHOR74
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3238
-.L3239:
+	cbz	w0, .L3422
+.L3423:
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3389
-.L3238:
+	strb	w0, [x26, #:lo12:.LANCHOR74]
+	b	.L3576
+.L3422:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3239
-	cbnz	w22, .L3240
-.L3244:
+	cbnz	w0, .L3423
+	cbnz	w22, .L3424
+.L3428:
 	mov	w20, 16
-.L3241:
+.L3425:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	adrp	x3, .LANCHOR71
+	adrp	x3, .LANCHOR74
 	mov	w1, 1
 	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR71]
+	strb	w1, [x3, #:lo12:.LANCHOR74]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3249
-	strb	w1, [x19, #:lo12:.LANCHOR145]
-	adrp	x1, .LANCHOR14
-	strb	wzr, [x3, #:lo12:.LANCHOR71]
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3216
+	cbz	w5, .L3433
+	strb	w1, [x19, #:lo12:.LANCHOR150]
+	ldr	w1, [x28, #:lo12:.LANCHOR14]
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	tbz	x1, 8, .L3399
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC218
+	adrp	x0, .LC229
 	mov	w2, 0
-	mov	w1, 1948
-	add	x0, x0, :lo12:.LC218
+	mov	w1, 2037
+	add	x0, x0, :lo12:.LC229
 	bl	printf
-.L3216:
+.L3399:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20279,663 +21500,662 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3240:
-	cmp	w21, w25
-	adrp	x1, .LANCHOR87
-	adrp	x2, .LANCHOR84
-	bcs	.L3242
-	ldrh	w0, [x2, #:lo12:.LANCHOR84]
-	cmp	w21, w0, lsl 1
-	blt	.L3243
-.L3242:
-	ldrh	w2, [x2, #:lo12:.LANCHOR84]
-	add	w0, w21, w25
-	cmp	w0, w2, lsl 1
-	blt	.L3243
-	adrp	x0, .LANCHOR88
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+.L3424:
+	cmp	w21, w24
+	adrp	x1, .LANCHOR90
+	adrp	x2, .LANCHOR87
+	bcs	.L3426
+	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	cmp	w0, w21
+	bhi	.L3427
+.L3426:
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	add	w0, w21, w24
+	cmp	w0, w2
+	blt	.L3427
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w0
-	bcc	.L3244
-.L3243:
-	adrp	x5, .LANCHOR146
+	bcc	.L3428
+.L3427:
+	adrp	x5, .LANCHOR151
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
-	strb	w6, [x24, #:lo12:.LANCHOR71]
-	ldr	w0, [x5, #:lo12:.LANCHOR146]
+	strb	w6, [x26, #:lo12:.LANCHOR74]
+	ldr	w0, [x5, #:lo12:.LANCHOR151]
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR146]
+	str	w0, [x5, #:lo12:.LANCHOR151]
 	cmp	w0, w2, lsr 5
-	bls	.L3245
-	ldrh	w0, [x1, #:lo12:.LANCHOR87]
+	bls	.L3429
+	ldrh	w0, [x1, #:lo12:.LANCHOR90]
 	cmp	w0, w22
-	bls	.L3245
+	bls	.L3429
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3244
+	beq	.L3428
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR76
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3244
+	bgt	.L3428
 	mov	w0, w6
-	str	wzr, [x5, #:lo12:.LANCHOR146]
+	str	wzr, [x5, #:lo12:.LANCHOR151]
 	mov	w2, 4
 	mov	w1, 2
-.L3377:
+.L3564:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3244
-	b	.L3235
-.L3245:
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	cbz	w0, .L3428
+	b	.L3418
+.L3429:
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	bcc	.L3247
+	bcc	.L3431
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3377
-.L3247:
-	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3248
-	ldrh	w0, [x27, #:lo12:.LANCHOR83]
+	b	.L3564
+.L3431:
+	ldrh	w0, [x27, #:lo12:.LANCHOR88]
+	cbnz	w0, .L3432
+	ldr	x0, [x29, 104]
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 8
-	bls	.L3241
-.L3248:
+	bls	.L3425
+.L3432:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3377
-.L3237:
-	adrp	x0, .LANCHOR74
-	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	b	.L3564
+.L3421:
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
 	cmp	w0, w21
-	bcc	.L3323
-	b	.L3244
-.L3249:
-	adrp	x2, .LANCHOR74
-	mov	x24, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR74]
+	bcc	.L3507
+	b	.L3428
+.L3433:
+	adrp	x2, .LANCHOR77
+	mov	x26, x2
+	ldrh	w4, [x2, #:lo12:.LANCHOR77]
 	cmp	w21, w4
-	bcs	.L3250
-	cbz	w22, .L3251
+	bcs	.L3434
+	cbz	w22, .L3435
 	cmp	w22, 16
-	bls	.L3252
-	adrp	x0, .LANCHOR87
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L3436
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w0
-	bhi	.L3252
+	bhi	.L3436
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3253
-	ldrb	w0, [x3, #:lo12:.LANCHOR71]
+	bne	.L3437
+	ldrb	w0, [x3, #:lo12:.LANCHOR74]
 	mov	w2, 4
 	mov	w1, 3
-.L3379:
+.L3570:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3254:
-	cbnz	w0, .L3256
-	b	.L3216
-.L3253:
+.L3438:
+	cbnz	w0, .L3440
+	b	.L3399
+.L3437:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3256
+	beq	.L3440
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR146
+	adrp	x1, .LANCHOR151
 	mov	x21, x1
 	ldr	x4, [x4, #:lo12:.LANCHOR9]
-	ldr	w2, [x1, #:lo12:.LANCHOR146]
+	ldr	w2, [x1, #:lo12:.LANCHOR151]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR146]
+	str	w2, [x1, #:lo12:.LANCHOR151]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR80
-	ldrh	w4, [x4, #:lo12:.LANCHOR80]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
 	cmp	w4, w3
-	bcs	.L3257
+	bcs	.L3441
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3256
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	bls	.L3440
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w1, w3
-	bls	.L3256
-.L3257:
-	ldrb	w2, [x23, #:lo12:.LANCHOR71]
+	bls	.L3440
+.L3441:
+	ldrb	w2, [x23, #:lo12:.LANCHOR74]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR146]
-	adrp	x0, .LANCHOR116
+	str	wzr, [x21, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR118
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3256:
+	str	w1, [x0, #:lo12:.LANCHOR118]
+.L3440:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3216
-.L3252:
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	b	.L3399
+.L3436:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3386:
+.L3573:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3256
+	bne	.L3440
 	mov	w2, 2
-.L3382:
-	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3379
-.L3251:
-	adrp	x1, .LANCHOR14
-	strb	wzr, [x3, #:lo12:.LANCHOR71]
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3259
+	b	.L3566
+.L3435:
+	ldr	w1, [x28, #:lo12:.LANCHOR14]
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	tbz	x1, 8, .L3443
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC218
+	adrp	x0, .LC229
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1978
-	add	x0, x0, :lo12:.LC218
+	mov	w1, 2067
+	add	x0, x0, :lo12:.LC229
 	bl	printf
-.L3259:
+.L3443:
 	cmp	w21, 16
-	bls	.L3260
+	bls	.L3444
 	mov	w2, 4
-	b	.L3382
-.L3260:
+.L3566:
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	b	.L3570
+.L3444:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR71]
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, w2
-	b	.L3386
-.L3250:
-	cmp	w26, 1
-	bne	.L3216
+	b	.L3573
+.L3434:
+	cmp	w25, 1
+	bne	.L3399
 	cmp	w21, w4, lsl 1
-	bge	.L3261
-	cmp	w25, w22, lsr 1
-	bcs	.L3262
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bge	.L3445
+	cmp	w24, w22, lsr 1
+	bcs	.L3446
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	bcs	.L3262
-	adrp	x0, .LANCHOR84
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	bcs	.L3446
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3216
-.L3262:
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3399
+.L3446:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
-	and	w26, w0, 65535
+	and	w25, w0, 65535
 	mov	w1, 65535
-	mov	w3, w26
-	cmp	w26, w1
-	bne	.L3263
-.L3268:
+	mov	w28, w25
+	cmp	w25, w1
+	bne	.L3447
+.L3452:
 	cmp	w22, 1
-	bhi	.L3264
-.L3265:
-	cmp	w21, w25
-	adrp	x21, .LANCHOR84
-	bcs	.L3272
-	strb	wzr, [x23, #:lo12:.LANCHOR71]
+	bhi	.L3448
+.L3449:
+	cmp	w21, w24
+	adrp	x21, .LANCHOR87
+	bcs	.L3456
+	strb	wzr, [x23, #:lo12:.LANCHOR74]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3272
+	beq	.L3456
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR76
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
-	ldrb	w2, [x2, #:lo12:.LANCHOR73]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3274
-.L3272:
-	ldrh	w0, [x21, #:lo12:.LANCHOR84]
+	ble	.L3458
+.L3456:
+	ldrh	w0, [x21, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3216
-.L3263:
-	adrp	x2, .LANCHOR146
-	adrp	x4, .LANCHOR6
-	uxtw	x26, w26
-	ldr	w1, [x2, #:lo12:.LANCHOR146]
-	ldrh	w4, [x4, #:lo12:.LANCHOR6]
+	strh	w0, [x26, #:lo12:.LANCHOR77]
+	b	.L3399
+.L3447:
+	adrp	x2, .LANCHOR151
+	adrp	x3, .LANCHOR6
+	uxtw	x25, w25
+	ldr	w1, [x2, #:lo12:.LANCHOR151]
+	ldrh	w3, [x3, #:lo12:.LANCHOR6]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR146]
-	cmp	w1, w4, lsr 4
-	adrp	x4, .LANCHOR9
-	bls	.L3266
-	ldr	x1, [x4, #:lo12:.LANCHOR9]
-	str	wzr, [x2, #:lo12:.LANCHOR146]
-	ldrh	w2, [x1, x26, lsl 1]
-	adrp	x1, .LANCHOR86
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	str	w1, [x2, #:lo12:.LANCHOR151]
+	cmp	w1, w3, lsr 4
+	adrp	x3, .LANCHOR9
+	bls	.L3450
+	ldr	x1, [x3, #:lo12:.LANCHOR9]
+	str	wzr, [x2, #:lo12:.LANCHOR151]
+	ldrh	w2, [x1, x25, lsl 1]
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w2, w1
-	bcs	.L3266
-	str	x4, [x29, 96]
+	bcs	.L3450
+	str	x3, [x29, 96]
 	mov	w2, 1
-	str	w3, [x29, 104]
 	mov	w1, 0
 	bl	gc_add_sblk
-	ldr	w3, [x29, 104]
-	ldr	x4, [x29, 96]
-	cbnz	w0, .L3256
-.L3266:
-	ldr	x0, [x4, #:lo12:.LANCHOR9]
-	ldrh	w1, [x0, x26, lsl 1]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldr	x3, [x29, 96]
+	cbnz	w0, .L3440
+.L3450:
+	ldr	x0, [x3, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, x25, lsl 1]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0, lsr 1
-	bhi	.L3267
+	bhi	.L3451
 	mov	w2, 0
 	mov	w1, 1
-	mov	w0, w3
+	mov	w0, w28
 	bl	gc_add_sblk
-	b	.L3256
-.L3267:
-	ldrh	w2, [x27, #:lo12:.LANCHOR83]
-	ldrh	w0, [x28, #:lo12:.LANCHOR85]
+	b	.L3440
+.L3451:
+	ldr	x2, [x29, 104]
+	ldrh	w0, [x27, #:lo12:.LANCHOR88]
+	ldrh	w2, [x2, #:lo12:.LANCHOR86]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR84
-	ldrh	w2, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
 	cmp	w0, w2, lsl 1
-	ble	.L3268
-	adrp	x0, .LANCHOR86
-	ldrh	w0, [x0, #:lo12:.LANCHOR86]
+	ble	.L3452
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, w1
-	bcc	.L3265
-	b	.L3268
-.L3264:
+	bcc	.L3449
+	b	.L3452
+.L3448:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR71]
+	strb	w1, [x23, #:lo12:.LANCHOR74]
 	cmp	w22, 16
-	bls	.L3269
-	adrp	x0, .LANCHOR87
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L3453
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w0
-	bhi	.L3269
+	bhi	.L3453
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3270
+	bne	.L3454
 	mov	w2, 4
-.L3378:
-	ldrb	w0, [x23, #:lo12:.LANCHOR71]
+.L3565:
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3270:
-	adrp	x1, .LANCHOR84
-	cmp	w21, w25, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3380
+.L3454:
+	adrp	x1, .LANCHOR87
+	cmp	w21, w24, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	bls	.L3568
 	lsr	w1, w1, 2
-.L3381:
-	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3254
-.L3269:
+.L3569:
+	strh	w1, [x26, #:lo12:.LANCHOR77]
+	b	.L3438
+.L3453:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3270
+	bne	.L3454
 	mov	w2, 2
-	b	.L3378
-.L3274:
+	b	.L3565
+.L3458:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR84]
+	ldrh	w1, [x21, #:lo12:.LANCHOR87]
 	and	w0, w0, 65535
-.L3380:
+.L3568:
 	lsr	w1, w1, 1
-	b	.L3381
-.L3261:
-	adrp	x0, .LANCHOR84
+	b	.L3569
+.L3445:
+	adrp	x0, .LANCHOR87
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3216
-.L3220:
-	adrp	x7, .LANCHOR62
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3399
+.L3403:
+	adrp	x7, .LANCHOR63
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR62]
+	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L3275
+	bne	.L3459
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3275:
-	ldrh	w3, [x7, #:lo12:.LANCHOR62]
+	strh	w0, [x7, #:lo12:.LANCHOR63]
+.L3459:
+	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR62
+	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L3388
+	beq	.L3575
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3277
+	cbz	w5, .L3461
 	add	x1, x1, 58
 	mov	w0, 0
-.L3279:
+.L3463:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3278
-.L3283:
-	adrp	x0, .LANCHOR62
+	bne	.L3462
+.L3467:
+	adrp	x0, .LANCHOR63
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3323
-.L3278:
+	strh	w1, [x0, #:lo12:.LANCHOR63]
+	b	.L3507
+.L3462:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3279
-.L3277:
+	bne	.L3463
+.L3461:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3280
+	beq	.L3464
 	tst	w0, 192
-	bne	.L3281
-.L3280:
+	bne	.L3465
+.L3464:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3283
-	mov	w2, 2211
-	adrp	x1, .LANCHOR216
+	cbz	w0, .L3467
+	mov	w2, 2300
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR216
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3283
-.L3281:
+	b	.L3467
+.L3465:
 	mov	w0, 2
-	b	.L3389
-.L3221:
+	b	.L3576
+.L3404:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3284
+	bne	.L3468
 	mov	w0, 3
-	b	.L3389
-.L3284:
-	adrp	x20, .LANCHOR62
+	b	.L3576
+.L3468:
+	adrp	x20, .LANCHOR63
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR62
-	ldrh	w1, [x20, #:lo12:.LANCHOR62]
+	add	x0, x20, :lo12:.LANCHOR63
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	cmp	w1, w2
-	beq	.L3235
+	beq	.L3418
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3285
+	cbz	w2, .L3469
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3285:
+	strb	w1, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3469:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
 	adrp	x0, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3286
-	adrp	x1, .LANCHOR216
+	cbz	w1, .L3470
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2239
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2328
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3286:
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
-	add	x21, x20, :lo12:.LANCHOR62
+.L3470:
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	add	x21, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldrh	w1, [x20, #:lo12:.LANCHOR62]
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3287
+	bhi	.L3471
 	strh	w0, [x21, 30]
-	b	.L3283
-.L3287:
+	b	.L3467
+.L3471:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3283
-.L3222:
-	adrp	x20, .LANCHOR62
-	adrp	x23, .LANCHOR80
-	add	x22, x20, :lo12:.LANCHOR62
-	add	x23, x23, :lo12:.LANCHOR80
-.L3358:
+	b	.L3467
+.L3405:
+	adrp	x20, .LANCHOR63
+	adrp	x23, .LANCHOR83
+	add	x22, x20, :lo12:.LANCHOR63
+	add	x23, x23, :lo12:.LANCHOR83
+.L3544:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3289
+	bcs	.L3473
 	cmp	w21, 7
-	bls	.L3358
-	b	.L3323
-.L3289:
+	bls	.L3544
+	b	.L3507
+.L3473:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3290
+	cbz	w3, .L3474
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR145]
+	strb	w1, [x19, #:lo12:.LANCHOR150]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3291
+	tbz	x0, 8, .L3475
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
+	adrp	x0, .LC230
+	add	x0, x0, :lo12:.LC230
 	bl	printf
-.L3291:
-	ldrh	w2, [x20, #:lo12:.LANCHOR62]
-	add	x0, x20, :lo12:.LANCHOR62
+.L3475:
+	ldrh	w2, [x20, #:lo12:.LANCHOR63]
+	add	x0, x20, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3292
-	adrp	x1, .LANCHOR216
+	beq	.L3476
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2273
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2362
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3292:
-	add	x0, x20, :lo12:.LANCHOR62
-	ldrh	w1, [x20, #:lo12:.LANCHOR62]
+.L3476:
+	add	x0, x20, :lo12:.LANCHOR63
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3323
-.L3290:
+	b	.L3507
+.L3474:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
 	ldr	x21, [x2, #:lo12:.LANCHOR7]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR145]
+	strb	w2, [x19, #:lo12:.LANCHOR150]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3293
+	tbz	x0, 8, .L3477
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC220
-	add	x0, x0, :lo12:.LC220
+	adrp	x0, .LC231
+	add	x0, x0, :lo12:.LC231
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3293:
+.L3477:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3294
+	beq	.L3478
 	tst	w0, 192
-	bne	.L3295
-.L3294:
-	adrp	x1, .LANCHOR216
+	bne	.L3479
+.L3478:
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2283
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2372
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3295:
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
-	add	x19, x20, :lo12:.LANCHOR62
+.L3479:
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	add	x19, x20, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR62]
+	strh	w0, [x20, #:lo12:.LANCHOR63]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3296
+	bhi	.L3480
 	strh	w0, [x19, 30]
-	b	.L3323
-.L3296:
+	b	.L3507
+.L3480:
 	strh	wzr, [x19, 30]
-.L3387:
+.L3574:
 	bl	flt_sys_flush
-	b	.L3323
-.L3223:
-	ldrh	w1, [x24, 80]
+	b	.L3507
+.L3406:
+	ldrh	w1, [x20, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3297
-	adrp	x0, .LANCHOR71
-	ldrb	w22, [x0, #:lo12:.LANCHOR71]
+	bne	.L3481
+	adrp	x0, .LANCHOR74
+	ldrb	w22, [x0, #:lo12:.LANCHOR74]
 	cmp	w22, 1
-	bne	.L3297
+	bne	.L3481
 	bl	ftl_flush
-	adrp	x0, .LANCHOR62
-	add	x1, x0, :lo12:.LANCHOR62
-	mov	x20, x0
+	adrp	x0, .LANCHOR63
+	add	x1, x0, :lo12:.LANCHOR63
+	mov	x21, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3298
+	cbz	w1, .L3482
 	mov	w0, w22
 	mov	w1, 5
-.L3384:
+.L3571:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3300
+	beq	.L3484
 	adrp	x0, .LANCHOR7
-	ldr	x21, [x0, #:lo12:.LANCHOR7]
-	add	x21, x21, x19, uxth 2
-	ldrb	w0, [x21, 2]
+	ldr	x22, [x0, #:lo12:.LANCHOR7]
+	add	x22, x22, x19, uxth 2
+	ldrb	w0, [x22, 2]
 	tst	w0, 224
-	beq	.L3301
-	adrp	x1, .LANCHOR216
+	beq	.L3485
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2312
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2401
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3301:
-	ldrb	w0, [x21, 2]
+.L3485:
+	ldrb	w0, [x22, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
-	strb	w0, [x21, 2]
-.L3322:
+	strb	w0, [x22, 2]
+.L3506:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR72
+	adrp	x22, .LANCHOR75
 	mov	w0, 5
-	strb	w0, [x24, 84]
-	add	x1, x24, 96
+	strb	w0, [x20, 84]
+	add	x1, x20, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR80
-	adrp	x21, .LANCHOR73
-	strb	w0, [x24, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrh	w2, [x22, #:lo12:.LANCHOR72]
-	strh	w19, [x24, 80]
-	strh	wzr, [x24, 82]
+	adrp	x1, .LANCHOR83
+	strb	w0, [x20, 89]
+	strh	w19, [x20, 80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	strh	wzr, [x20, 82]
+	strb	wzr, [x20, 85]
+	strh	wzr, [x20, 90]
 	mul	w0, w0, w1
-	strb	wzr, [x24, 85]
-	strh	w0, [x24, 86]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	strh	w0, [x20, 86]
+	adrp	x20, .LANCHOR76
 	mov	w1, 255
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
-	strh	wzr, [x24, 90]
+	ldrb	w0, [x20, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR152
+	ldr	x0, [x0, #:lo12:.LANCHOR152]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
+	ldrb	w0, [x20, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR72]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR148
-	ldr	x0, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR153
+	ldr	x0, [x0, #:lo12:.LANCHOR153]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR73]
+	ldrb	w0, [x20, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR72]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR69
-	ldr	x0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	bl	ftl_memset
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
@@ -20944,11 +22164,11 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 126]
-	add	x0, x20, :lo12:.LANCHOR62
+	add	x0, x21, :lo12:.LANCHOR63
 	str	w1, [x0, 324]
 	strh	wzr, [x0, 314]
 	strh	wzr, [x0, 56]
@@ -20956,217 +22176,217 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3323
-.L3298:
+	b	.L3507
+.L3482:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3384
-.L3297:
-	cmp	w26, 1
+	b	.L3571
+.L3481:
+	cmp	w25, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR71
-	adrp	x21, .LANCHOR62
+	adrp	x25, .LANCHOR74
+	adrp	x24, .LANCHOR63
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR71
-	add	x20, x21, :lo12:.LANCHOR62
-	add	x26, x24, 80
-.L3304:
+	add	x25, x25, :lo12:.LANCHOR74
+	add	x21, x24, :lo12:.LANCHOR63
+	add	x26, x20, 80
+.L3488:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3323
+	beq	.L3507
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3305
-	adrp	x0, .LANCHOR51
-	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+	cbnz	w0, .L3489
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, 3
-	bhi	.L3306
+	bhi	.L3490
 	bl	ftl_write_commit
-.L3306:
-	ldrh	w1, [x20, 26]
-	ldrh	w0, [x20, 24]
+.L3490:
+	ldrh	w1, [x21, 26]
+	ldrh	w0, [x21, 24]
 	cmp	w1, w0
-	bcc	.L3304
+	bcc	.L3488
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	adrp	x0, .LANCHOR9
-	ldrh	w2, [x20]
+	ldrh	w2, [x21]
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3308
-	adrp	x1, .LANCHOR216
+	cbz	w1, .L3492
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	mov	w2, 2387
-	add	x1, x1, :lo12:.LANCHOR216
+	mov	w2, 2476
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3308:
-	ldrh	w0, [x21, #:lo12:.LANCHOR62]
+.L3492:
+	ldrh	w0, [x24, #:lo12:.LANCHOR63]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3309
+	cbnz	w1, .L3493
 	bl	ftl_free_sblk
-	b	.L3283
-.L3309:
+	b	.L3467
+.L3493:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3283
-.L3305:
-	ldrh	w0, [x20, 320]
-	cbz	w0, .L3310
-	strh	wzr, [x20, 320]
+	b	.L3467
+.L3489:
+	ldrh	w0, [x21, 320]
+	cbz	w0, .L3494
+	strh	wzr, [x21, 320]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	w0, [x20, 324]
+	ldr	w0, [x21, 324]
 	cmn	w0, #1
-	beq	.L3311
+	beq	.L3495
 	bl	ftl_mask_bad_block
-.L3311:
+.L3495:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	add	x20, x21, :lo12:.LANCHOR62
+	add	x20, x24, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3312
+	cbz	x0, .L3496
 	bl	buf_free
-.L3312:
-	add	x21, x21, :lo12:.LANCHOR62
-	str	xzr, [x21, 8]
+.L3496:
+	add	x24, x24, :lo12:.LANCHOR63
+	str	xzr, [x24, 8]
 	bl	flt_sys_flush
-	mov	w2, 2425
-	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	adrp	x1, .LANCHOR216
+	mov	w2, 2514
+	strb	wzr, [x19, #:lo12:.LANCHOR150]
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR216
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3323
-.L3310:
+	b	.L3507
+.L3494:
 	ldrh	w0, [x26, 6]
-	ldrh	w1, [x20, 26]
+	ldrh	w1, [x21, 26]
 	cmp	w0, 1
-	ldrh	w0, [x20, 24]
-	bls	.L3313
+	ldrh	w0, [x21, 24]
+	bls	.L3497
 	cmp	w1, w0
-	bcc	.L3304
+	bcc	.L3488
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR145]
-	ldrh	w0, [x20, 56]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
+	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x21, 56]
+	add	x0, x21, x0, sxtw 1
+	ldrh	w1, [x21]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-	b	.L3323
-.L3313:
+	strh	w0, [x21]
+	b	.L3507
+.L3497:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR145]
+	strb	w2, [x19, #:lo12:.LANCHOR150]
 	cmp	w1, w0
-	bcc	.L3314
-	ldrh	w0, [x20, 56]
+	bcc	.L3498
+	ldrh	w0, [x21, 56]
 	add	w1, w0, 1
-	strh	w1, [x20, 56]
-	add	x0, x20, x0, sxtw 1
-	ldrh	w1, [x20]
+	strh	w1, [x21, 56]
+	add	x0, x21, x0, sxtw 1
+	ldrh	w1, [x21]
 	strh	w1, [x0, 58]
 	mov	w0, -1
-	strh	w0, [x20]
-.L3314:
+	strh	w0, [x21]
+.L3498:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
-	ldrh	w1, [x24, 80]
+	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x21, :lo12:.LANCHOR62
-	adrp	x1, .LANCHOR80
-	adrp	x2, .LANCHOR68
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrb	w2, [x2, #:lo12:.LANCHOR68]
+	add	x0, x24, :lo12:.LANCHOR63
+	adrp	x1, .LANCHOR83
+	adrp	x2, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3316
+	bne	.L3500
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
-	adrp	x1, .LANCHOR104
-	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbnz	w1, .L3316
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	cbnz	w1, .L3500
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3316:
-	add	x21, x21, :lo12:.LANCHOR62
-	strh	wzr, [x21, 22]
-	b	.L3323
-.L3319:
+.L3500:
+	add	x24, x24, :lo12:.LANCHOR63
+	strh	wzr, [x24, 22]
+	b	.L3507
+.L3503:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3320
+	bcc	.L3504
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR150]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3323
-.L3320:
+	b	.L3507
+.L3504:
 	cmp	w21, 15
-	bls	.L3226
-	cmp	w26, 1
-	bne	.L3323
+	bls	.L3409
+	cmp	w25, 1
+	bne	.L3507
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3226
-	b	.L3323
-.L3225:
+	bls	.L3409
+	b	.L3507
+.L3408:
 	bl	gc_update_l2p_map_new
-	mov	w20, -1
+	mov	w21, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x24, 80]
+	strh	w21, [x20, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	strh	w20, [x0, 126]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	strh	w21, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3388:
-	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3323
-.L3300:
-	mov	w2, 2318
-	adrp	x1, .LANCHOR216
+.L3575:
+	strb	wzr, [x19, #:lo12:.LANCHOR150]
+	b	.L3507
+.L3484:
+	mov	w2, 2407
+	adrp	x1, .LANCHOR220
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR216
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3322
+	b	.L3506
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21184,31 +22404,32 @@ zftl_write:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
-	mov	x24, x3
+	mov	x23, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3391
+	tbz	x0, 12, .L3578
+	ldr	w4, [x23]
 	mov	w3, w2
-	adrp	x0, .LC221
+	adrp	x0, .LC232
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC221
+	add	x0, x0, :lo12:.LC232
 	mov	w1, w27
 	bl	printf
-.L3391:
-	cbnz	w27, .L3392
-	adrp	x0, .LANCHOR58
+.L3578:
+	cbnz	w27, .L3579
+	adrp	x0, .LANCHOR59
 	mov	w27, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3393:
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L3580:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3407
-	adrp	x23, .LANCHOR121
+	bcc	.L3594
+	adrp	x24, .LANCHOR123
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR97
-	ldrb	w0, [x23, #:lo12:.LANCHOR121]
+	adrp	x25, .LANCHOR100
+	ldrb	w0, [x24, #:lo12:.LANCHOR123]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR121
+	add	x24, x24, :lo12:.LANCHOR123
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -21216,25 +22437,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3395:
-	cbnz	w21, .L3403
-	adrp	x20, .LANCHOR90
-	adrp	x19, .LANCHOR94
-	add	x20, x20, :lo12:.LANCHOR90
-	add	x19, x19, :lo12:.LANCHOR94
+.L3582:
+	cbnz	w21, .L3590
+	adrp	x20, .LANCHOR93
+	adrp	x19, .LANCHOR97
+	add	x20, x20, :lo12:.LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR97
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3404:
+.L3591:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3405
+	ble	.L3592
 	mov	w0, 0
-.L3390:
+.L3577:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21242,28 +22463,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3392:
+.L3579:
 	cmp	w27, 3
-	bhi	.L3407
+	bhi	.L3594
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3393
-.L3403:
+	b	.L3580
+.L3590:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3396
+	cbnz	x0, .L3583
 	bl	ftl_write_commit
-	b	.L3395
-.L3396:
-	ldrb	w3, [x23]
+	b	.L3582
+.L3583:
+	ldrb	w3, [x24]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3399
+	bne	.L3586
 	cmp	w26, w22
-	bne	.L3400
+	bne	.L3587
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21272,11 +22493,11 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3412:
+.L3599:
 	strb	w3, [x28, 56]
-.L3399:
+.L3586:
 	ldr	x3, [x28, 8]
-	mov	x1, x24
+	mov	x1, x23
 	ldrb	w0, [x28, 57]
 	sub	w21, w21, #1
 	ldrb	w2, [x28, 56]
@@ -21284,7 +22505,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR97]
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -21295,20 +22516,20 @@ zftl_write:
 	bl	ftl_write_buf
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
-	add	x24, x24, x0
-	b	.L3395
-.L3400:
+	add	x23, x23, x0
+	b	.L3582
+.L3587:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3412
-.L3405:
+	b	.L3599
+.L3592:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3404
-.L3407:
+	b	.L3591
+.L3594:
 	mov	w0, -1
-	b	.L3390
+	b	.L3577
 	.size	zftl_write, .-zftl_write
 	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
@@ -21367,12 +22588,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3418
+	bne	.L3605
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3418:
+.L3605:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21388,46 +22609,46 @@ ftl_write:
 	.type	zftl_discard, %function
 zftl_discard:
 	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR58
+	adrp	x2, .LANCHOR59
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR58]
+	ldr	w2, [x2, #:lo12:.LANCHOR59]
 	add	w1, w0, w1
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3441
-	adrp	x24, .LANCHOR217
+	bcc	.L3628
+	adrp	x24, .LANCHOR221
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR217]
+	ldr	w1, [x24, #:lo12:.LANCHOR221]
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR217]
-	tbz	x2, 12, .L3422
-	adrp	x0, .LC222
+	str	w1, [x24, #:lo12:.LANCHOR221]
+	tbz	x2, 12, .L3609
+	adrp	x0, .LC233
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC233
 	bl	printf
-.L3422:
-	adrp	x23, .LANCHOR97
-	adrp	x26, .LANCHOR121
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L3609:
+	adrp	x23, .LANCHOR100
+	adrp	x26, .LANCHOR123
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR121]
+	ldrb	w21, [x26, #:lo12:.LANCHOR123]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3423
+	cbz	w25, .L3610
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21435,20 +22656,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3424
+	bne	.L3611
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3424:
+.L3611:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3426
+	beq	.L3613
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3426
+	cbz	x0, .L3613
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21463,57 +22684,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3426:
+.L3613:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3423:
-	cbz	w19, .L3428
+.L3610:
+	cbz	w19, .L3615
 	bl	ftl_flush
-.L3428:
-	adrp	x25, .LANCHOR99
-	add	x21, x26, :lo12:.LANCHOR121
-	add	x25, x25, :lo12:.LANCHOR99
+.L3615:
+	adrp	x25, .LANCHOR102
+	add	x21, x26, :lo12:.LANCHOR123
+	add	x25, x25, :lo12:.LANCHOR102
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3429:
+.L3616:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3434
-	cbz	w19, .L3436
+	bcs	.L3621
+	cbz	w19, .L3623
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3437
+	bne	.L3624
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3437:
+.L3624:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3436
+	beq	.L3623
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3436
+	cbz	x0, .L3623
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR121]
+	ldrb	w0, [x26, #:lo12:.LANCHOR123]
 	cmp	w19, w0
-	bcc	.L3439
-	adrp	x1, .LANCHOR218
+	bcc	.L3626
+	adrp	x1, .LANCHOR222
 	adrp	x0, .LC0
-	mov	w2, 1236
-	add	x1, x1, :lo12:.LANCHOR218
+	mov	w2, 1241
+	add	x1, x1, :lo12:.LANCHOR222
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3439:
+.L3626:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21521,42 +22742,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3436:
-	ldr	w1, [x24, #:lo12:.LANCHOR217]
+.L3623:
+	ldr	w1, [x24, #:lo12:.LANCHOR221]
 	cmp	w1, 8192
-	bls	.L3442
+	bls	.L3629
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3440
-	adrp	x0, .LC222
+	tbz	x0, 12, .L3627
+	adrp	x0, .LC233
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC222
+	add	x0, x0, :lo12:.LC233
 	bl	printf
-.L3440:
-	str	wzr, [x24, #:lo12:.LANCHOR217]
+.L3627:
+	str	wzr, [x24, #:lo12:.LANCHOR221]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR116
+	adrp	x0, .LANCHOR118
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3442:
+	str	w1, [x0, #:lo12:.LANCHOR118]
+.L3629:
 	mov	w0, 0
-	b	.L3420
-.L3434:
+	b	.L3607
+.L3621:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3430
+	beq	.L3617
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3432
+	cbz	x0, .L3619
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21568,24 +22789,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3468:
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+.L3655:
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3432:
+.L3619:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3429
-.L3430:
+	b	.L3616
+.L3617:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3432
+	beq	.L3619
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21599,14 +22820,14 @@ zftl_discard:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR98
-	ldrb	w1, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3468
-.L3441:
+	b	.L3655
+.L3628:
 	mov	w0, -1
-.L3420:
+.L3607:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21764,6 +22985,7 @@ ftl_discard:
 	.global	g_flash_interface_mode
 	.global	g_idb_ecc_bits
 	.global	g_idb_slc_mode_enable
+	.global	g_one_pass_program
 	.global	g_slc_mode_addr2
 	.global	g_slc_mode_enable
 	.global	g_flash_cur_mode
@@ -21794,21 +23016,21 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21820,73 +23042,73 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
@@ -21900,49 +23122,49 @@ _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -21961,28 +23183,28 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR217,. + 0
+	.set	.LANCHOR221,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
@@ -21996,41 +23218,41 @@ fill_spare_size:
 	.zero	2
 	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	flash_ddr_tuning_sdr_read_count, %object
 	.size	flash_ddr_tuning_sdr_read_count, 4
 flash_ddr_tuning_sdr_read_count:
 	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -22042,14 +23264,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR213,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -22062,41 +23284,41 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
@@ -22110,13 +23332,13 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22129,14 +23351,14 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -22150,14 +23372,14 @@ g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -22170,27 +23392,27 @@ g_die_addr:
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
@@ -22208,20 +23430,20 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22234,28 +23456,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -22268,14 +23490,14 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
@@ -22287,7 +23509,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22306,14 +23528,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
@@ -22338,7 +23560,7 @@ g_nand_opt_para:
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
@@ -22355,10 +23577,16 @@ g_nandc_v6_master_info:
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
+	.zero	1
+	.section	.bss.g_one_pass_program,"aw",@nobits
+	.set	.LANCHOR71,. + 0
+	.type	g_one_pass_program, %object
+	.size	g_one_pass_program, 1
+g_one_pass_program:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22382,131 +23610,131 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
@@ -22520,7 +23748,7 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
@@ -22534,17 +23762,18 @@ gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR137,. + 0
 	.type	gp_flash_check_buf, %object
-	.size	gp_flash_check_buf, 262144
+	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR26,. + 0
@@ -22554,21 +23783,21 @@ gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
@@ -22582,7 +23811,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -22610,27 +23839,28 @@ gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR135,. + 0
 	.type	idb_buf, %object
-	.size	idb_buf, 262144
+	.size	idb_buf, 8
 idb_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -22654,7 +23884,7 @@ nandc_hw_seed:
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -22666,135 +23896,135 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.read_buf_count,"aw",@nobits
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	read_buf_count, %object
 	.size	read_buf_count, 1
 read_buf_count:
 	.zero	1
 	.section	.bss.read_buf_head,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	read_buf_head, %object
 	.size	read_buf_head, 1
 read_buf_head:
 	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -22828,7 +24058,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -22862,7 +24092,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22944,7 +24174,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -22975,7 +24205,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -23310,7 +24540,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR219,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -23707,9 +24937,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1152
+	.size	zftl_nand_flash_para_tbl, 1216
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -24428,7 +25658,7 @@ zftl_nand_flash_para_tbl:
 	.hword	9671
 	.byte	5
 	.byte	19
-	.byte	60
+	.byte	70
 	.byte	32
 	.byte	1
 	.byte	0
@@ -24456,7 +25686,7 @@ zftl_nand_flash_para_tbl:
 	.hword	9671
 	.byte	5
 	.byte	19
-	.byte	60
+	.byte	70
 	.byte	32
 	.byte	1
 	.byte	0
@@ -24496,6 +25726,34 @@ zftl_nand_flash_para_tbl:
 	.byte	-33
 	.byte	0
 	.byte	6
+	.byte	-101
+	.byte	73
+	.byte	1
+	.byte	0
+	.byte	-101
+	.byte	73
+	.byte	9
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	1
+	.hword	2144
+	.hword	-23097
+	.byte	8
+	.byte	21
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	8
+	.byte	0
+	.hword	256
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
 	.byte	-83
 	.byte	-34
 	.byte	20
@@ -24644,24 +25902,52 @@ zftl_nand_flash_para_tbl:
 	.byte	74
 	.byte	2
 	.byte	1
-	.byte	16
-	.hword	256
+	.byte	16
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1056
+	.hword	473
+	.byte	2
+	.byte	5
+	.byte	40
+	.byte	32
+	.byte	4
+	.byte	1
+	.byte	3
+	.byte	0
+	.hword	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	-83
+	.byte	58
+	.byte	20
+	.byte	3
+	.byte	8
+	.byte	80
+	.byte	2
+	.byte	1
+	.byte	32
+	.hword	388
 	.byte	2
 	.byte	2
-	.hword	1056
+	.hword	1362
 	.hword	473
-	.byte	2
-	.byte	5
+	.byte	9
+	.byte	8
 	.byte	40
 	.byte	32
-	.byte	4
-	.byte	1
 	.byte	3
+	.byte	1
+	.byte	4
 	.byte	0
-	.hword	256
-	.byte	0
-	.byte	0
-	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-65
+	.byte	-66
 	.byte	0
 	.byte	5
 	.byte	-119
@@ -24678,7 +25964,7 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.hword	1024
 	.hword	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -24706,7 +25992,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.hword	1024
 	.hword	455
-	.byte	3
+	.byte	4
 	.byte	17
 	.byte	40
 	.byte	32
@@ -24719,489 +26005,496 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	0
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10010,"a",@progbits
+	.align	3
+	.set	.LANCHOR211,. + 0
+	.type	__func__.10010, %object
+	.size	__func__.10010, 20
+__func__.10010:
+	.string	"gc_scan_static_data"
+	.section	.rodata.__func__.10077,"a",@progbits
+	.align	3
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10077, %object
+	.size	__func__.10077, 11
+__func__.10077:
+	.string	"zftl_do_gc"
+	.section	.rodata.__func__.10170,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 18
-__func__.10060:
+	.type	__func__.10170, %object
+	.size	__func__.10170, 18
+__func__.10170:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10085,"a",@progbits
+	.section	.rodata.__func__.10195,"a",@progbits
 	.align	3
 	.set	.LANCHOR11,. + 0
-	.type	__func__.10085, %object
-	.size	__func__.10085, 23
-__func__.10085:
+	.type	__func__.10195, %object
+	.size	__func__.10195, 23
+__func__.10195:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10193,"a",@progbits
+	.section	.rodata.__func__.10303,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.10193, %object
-	.size	__func__.10193, 15
-__func__.10193:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10303, %object
+	.size	__func__.10303, 15
+__func__.10303:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10225,"a",@progbits
+	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR126,. + 0
-	.type	__func__.10225, %object
-	.size	__func__.10225, 15
-__func__.10225:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.10335, %object
+	.size	__func__.10335, 15
+__func__.10335:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10266,"a",@progbits
+	.section	.rodata.__func__.10376,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.10266, %object
-	.size	__func__.10266, 18
-__func__.10266:
+	.set	.LANCHOR109,. + 0
+	.type	__func__.10376, %object
+	.size	__func__.10376, 18
+__func__.10376:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10276,"a",@progbits
+	.section	.rodata.__func__.10386,"a",@progbits
 	.align	3
-	.set	.LANCHOR108,. + 0
-	.type	__func__.10276, %object
-	.size	__func__.10276, 17
-__func__.10276:
+	.set	.LANCHOR110,. + 0
+	.type	__func__.10386, %object
+	.size	__func__.10386, 17
+__func__.10386:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10311,"a",@progbits
+	.section	.rodata.__func__.10421,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.10311, %object
-	.size	__func__.10311, 14
-__func__.10311:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10421, %object
+	.size	__func__.10421, 14
+__func__.10421:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10335,"a",@progbits
+	.section	.rodata.__func__.10445,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
-	.type	__func__.10335, %object
-	.size	__func__.10335, 16
-__func__.10335:
+	.set	.LANCHOR201,. + 0
+	.type	__func__.10445, %object
+	.size	__func__.10445, 16
+__func__.10445:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10354,"a",@progbits
+	.section	.rodata.__func__.10467,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.10354, %object
-	.size	__func__.10354, 23
-__func__.10354:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.10467, %object
+	.size	__func__.10467, 23
+__func__.10467:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10380,"a",@progbits
+	.section	.rodata.__func__.10497,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10380, %object
-	.size	__func__.10380, 23
-__func__.10380:
+	.set	.LANCHOR111,. + 0
+	.type	__func__.10497, %object
+	.size	__func__.10497, 23
+__func__.10497:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10401,"a",@progbits
+	.section	.rodata.__func__.10518,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.10401, %object
-	.size	__func__.10401, 19
-__func__.10401:
+	.set	.LANCHOR215,. + 0
+	.type	__func__.10518, %object
+	.size	__func__.10518, 19
+__func__.10518:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10419,"a",@progbits
+	.section	.rodata.__func__.10536,"a",@progbits
 	.align	3
-	.set	.LANCHOR113,. + 0
-	.type	__func__.10419, %object
-	.size	__func__.10419, 22
-__func__.10419:
+	.set	.LANCHOR115,. + 0
+	.type	__func__.10536, %object
+	.size	__func__.10536, 22
+__func__.10536:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10430,"a",@progbits
+	.section	.rodata.__func__.10547,"a",@progbits
 	.align	3
-	.set	.LANCHOR114,. + 0
-	.type	__func__.10430, %object
-	.size	__func__.10430, 22
-__func__.10430:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.10547, %object
+	.size	__func__.10547, 22
+__func__.10547:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10455,"a",@progbits
+	.section	.rodata.__func__.10572,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.10455, %object
-	.size	__func__.10455, 19
-__func__.10455:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.10572, %object
+	.size	__func__.10572, 19
+__func__.10572:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10467,"a",@progbits
+	.section	.rodata.__func__.10584,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.10467, %object
-	.size	__func__.10467, 18
-__func__.10467:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.10584, %object
+	.size	__func__.10584, 18
+__func__.10584:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10504,"a",@progbits
+	.section	.rodata.__func__.10621,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
-	.type	__func__.10504, %object
-	.size	__func__.10504, 25
-__func__.10504:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.10621, %object
+	.size	__func__.10621, 25
+__func__.10621:
 	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.10519,"a",@progbits
+	.section	.rodata.__func__.10636,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.10519, %object
-	.size	__func__.10519, 15
-__func__.10519:
+	.set	.LANCHOR188,. + 0
+	.type	__func__.10636, %object
+	.size	__func__.10636, 15
+__func__.10636:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.10567,"a",@progbits
-	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.10567, %object
-	.size	__func__.10567, 14
-__func__.10567:
-	.string	"ftl_prog_page"
 	.section	.rodata.__func__.10684,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	__func__.10684, %object
-	.size	__func__.10684, 31
+	.size	__func__.10684, 14
 __func__.10684:
+	.string	"ftl_prog_page"
+	.section	.rodata.__func__.10806,"a",@progbits
+	.align	3
+	.set	.LANCHOR167,. + 0
+	.type	__func__.10806, %object
+	.size	__func__.10806, 31
+__func__.10806:
 	.string	"queue_wait_first_req_completed"
-	.section	.rodata.__func__.10737,"a",@progbits
+	.section	.rodata.__func__.10860,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.10737, %object
-	.size	__func__.10737, 15
-__func__.10737:
+	.set	.LANCHOR173,. + 0
+	.type	__func__.10860, %object
+	.size	__func__.10860, 15
+__func__.10860:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10764,"a",@progbits
+	.section	.rodata.__func__.10887,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
-	.type	__func__.10764, %object
-	.size	__func__.10764, 15
-__func__.10764:
+	.set	.LANCHOR169,. + 0
+	.type	__func__.10887, %object
+	.size	__func__.10887, 15
+__func__.10887:
 	.string	"sblk_read_page"
-	.section	.rodata.__func__.10803,"a",@progbits
+	.section	.rodata.__func__.10947,"a",@progbits
 	.align	3
-	.set	.LANCHOR198,. + 0
-	.type	__func__.10803, %object
-	.size	__func__.10803, 16
-__func__.10803:
+	.set	.LANCHOR202,. + 0
+	.type	__func__.10947, %object
+	.size	__func__.10947, 16
+__func__.10947:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10817,"a",@progbits
+	.section	.rodata.__func__.10961,"a",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
-	.type	__func__.10817, %object
-	.size	__func__.10817, 13
-__func__.10817:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.10961, %object
+	.size	__func__.10961, 13
+__func__.10961:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10837,"a",@progbits
+	.section	.rodata.__func__.10981,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
-	.type	__func__.10837, %object
-	.size	__func__.10837, 6
-__func__.10837:
+	.set	.LANCHOR204,. + 0
+	.type	__func__.10981, %object
+	.size	__func__.10981, 6
+__func__.10981:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10853,"a",@progbits
+	.section	.rodata.__func__.10997,"a",@progbits
 	.align	3
-	.set	.LANCHOR129,. + 0
-	.type	__func__.10853, %object
-	.size	__func__.10853, 17
-__func__.10853:
+	.set	.LANCHOR131,. + 0
+	.type	__func__.10997, %object
+	.size	__func__.10997, 17
+__func__.10997:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10863,"a",@progbits
+	.section	.rodata.__func__.11007,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.10863, %object
-	.size	__func__.10863, 14
-__func__.10863:
+	.set	.LANCHOR190,. + 0
+	.type	__func__.11007, %object
+	.size	__func__.11007, 14
+__func__.11007:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10881,"a",@progbits
+	.section	.rodata.__func__.11025,"a",@progbits
 	.align	3
-	.set	.LANCHOR132,. + 0
-	.type	__func__.10881, %object
-	.size	__func__.10881, 21
-__func__.10881:
+	.set	.LANCHOR134,. + 0
+	.type	__func__.11025, %object
+	.size	__func__.11025, 21
+__func__.11025:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8530,"a",@progbits
+	.section	.rodata.__func__.8556,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.8530, %object
-	.size	__func__.8530, 19
-__func__.8530:
+	.set	.LANCHOR161,. + 0
+	.type	__func__.8556, %object
+	.size	__func__.8556, 19
+__func__.8556:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8559,"a",@progbits
+	.section	.rodata.__func__.8598,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.8559, %object
-	.size	__func__.8559, 19
-__func__.8559:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.8598, %object
+	.size	__func__.8598, 19
+__func__.8598:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8574,"a",@progbits
+	.section	.rodata.__func__.8614,"a",@progbits
 	.align	3
 	.set	.LANCHOR37,. + 0
-	.type	__func__.8574, %object
-	.size	__func__.8574, 26
-__func__.8574:
+	.type	__func__.8614, %object
+	.size	__func__.8614, 26
+__func__.8614:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8585,"a",@progbits
+	.section	.rodata.__func__.8625,"a",@progbits
 	.align	3
 	.set	.LANCHOR39,. + 0
-	.type	__func__.8585, %object
-	.size	__func__.8585, 21
-__func__.8585:
+	.type	__func__.8625, %object
+	.size	__func__.8625, 21
+__func__.8625:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8599,"a",@progbits
+	.section	.rodata.__func__.8639,"a",@progbits
 	.align	3
 	.set	.LANCHOR28,. + 0
-	.type	__func__.8599, %object
-	.size	__func__.8599, 28
-__func__.8599:
+	.type	__func__.8639, %object
+	.size	__func__.8639, 28
+__func__.8639:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8623,"a",@progbits
+	.section	.rodata.__func__.8663,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.8623, %object
-	.size	__func__.8623, 26
-__func__.8623:
+	.type	__func__.8663, %object
+	.size	__func__.8663, 26
+__func__.8663:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8641,"a",@progbits
+	.section	.rodata.__func__.8674,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.8641, %object
-	.size	__func__.8641, 22
-__func__.8641:
+	.type	__func__.8674, %object
+	.size	__func__.8674, 29
+__func__.8674:
+	.string	"flash_start_3d_mlc_page_prog"
+	.section	.rodata.__func__.8692,"a",@progbits
+	.align	3
+	.set	.LANCHOR172,. + 0
+	.type	__func__.8692, %object
+	.size	__func__.8692, 22
+__func__.8692:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8652,"a",@progbits
+	.section	.rodata.__func__.8703,"a",@progbits
 	.align	3
-	.set	.LANCHOR36,. + 0
-	.type	__func__.8652, %object
-	.size	__func__.8652, 22
-__func__.8652:
+	.set	.LANCHOR32,. + 0
+	.type	__func__.8703, %object
+	.size	__func__.8703, 22
+__func__.8703:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8665,"a",@progbits
+	.section	.rodata.__func__.8716,"a",@progbits
 	.align	3
-	.set	.LANCHOR163,. + 0
-	.type	__func__.8665, %object
-	.size	__func__.8665, 31
-__func__.8665:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.8716, %object
+	.size	__func__.8716, 31
+__func__.8716:
 	.string	"flash_complete_plane_page_read"
-	.section	.rodata.__func__.8677,"a",@progbits
+	.section	.rodata.__func__.8728,"a",@progbits
 	.align	3
 	.set	.LANCHOR40,. + 0
-	.type	__func__.8677, %object
-	.size	__func__.8677, 23
-__func__.8677:
+	.type	__func__.8728, %object
+	.size	__func__.8728, 23
+__func__.8728:
 	.string	"flash_start_plane_read"
-	.section	.rodata.__func__.8690,"a",@progbits
+	.section	.rodata.__func__.8741,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.8690, %object
-	.size	__func__.8690, 25
-__func__.8690:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.8741, %object
+	.size	__func__.8741, 25
+__func__.8741:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.9001,"a",@progbits
+	.section	.rodata.__func__.9073,"a",@progbits
 	.align	3
-	.set	.LANCHOR134,. + 0
-	.type	__func__.9001, %object
-	.size	__func__.9001, 20
-__func__.9001:
+	.set	.LANCHOR139,. + 0
+	.type	__func__.9073, %object
+	.size	__func__.9073, 20
+__func__.9073:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.9011,"a",@progbits
+	.section	.rodata.__func__.9083,"a",@progbits
 	.align	3
 	.set	.LANCHOR15,. + 0
-	.type	__func__.9011, %object
-	.size	__func__.9011, 22
-__func__.9011:
+	.type	__func__.9083, %object
+	.size	__func__.9083, 22
+__func__.9083:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.9056,"a",@progbits
+	.section	.rodata.__func__.9128,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.9056, %object
-	.size	__func__.9056, 16
-__func__.9056:
+	.set	.LANCHOR197,. + 0
+	.type	__func__.9128, %object
+	.size	__func__.9128, 16
+__func__.9128:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9079,"a",@progbits
+	.section	.rodata.__func__.9151,"a",@progbits
 	.align	3
-	.set	.LANCHOR144,. + 0
-	.type	__func__.9079, %object
-	.size	__func__.9079, 11
-__func__.9079:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.9151, %object
+	.size	__func__.9151, 11
+__func__.9151:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9239,"a",@progbits
+	.section	.rodata.__func__.9320,"a",@progbits
 	.align	3
-	.set	.LANCHOR52,. + 0
-	.type	__func__.9239, %object
-	.size	__func__.9239, 13
-__func__.9239:
+	.set	.LANCHOR53,. + 0
+	.type	__func__.9320, %object
+	.size	__func__.9320, 13
+__func__.9320:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9252,"a",@progbits
+	.section	.rodata.__func__.9333,"a",@progbits
 	.align	3
-	.set	.LANCHOR54,. + 0
-	.type	__func__.9252, %object
-	.size	__func__.9252, 10
-__func__.9252:
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9333, %object
+	.size	__func__.9333, 10
+__func__.9333:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9266,"a",@progbits
+	.section	.rodata.__func__.9347,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.9266, %object
-	.size	__func__.9266, 16
-__func__.9266:
+	.set	.LANCHOR56,. + 0
+	.type	__func__.9347, %object
+	.size	__func__.9347, 16
+__func__.9347:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9278,"a",@progbits
+	.section	.rodata.__func__.9360,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.9278, %object
-	.size	__func__.9278, 20
-__func__.9278:
+	.set	.LANCHOR196,. + 0
+	.type	__func__.9360, %object
+	.size	__func__.9360, 20
+__func__.9360:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9289,"a",@progbits
+	.section	.rodata.__func__.9371,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.9289, %object
-	.size	__func__.9289, 21
-__func__.9289:
+	.set	.LANCHOR148,. + 0
+	.type	__func__.9371, %object
+	.size	__func__.9371, 21
+__func__.9371:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.9311,"a",@progbits
+	.section	.rodata.__func__.9393,"a",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
-	.type	__func__.9311, %object
-	.size	__func__.9311, 17
-__func__.9311:
+	.set	.LANCHOR193,. + 0
+	.type	__func__.9393, %object
+	.size	__func__.9393, 17
+__func__.9393:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9387,"a",@progbits
+	.section	.rodata.__func__.9469,"a",@progbits
 	.align	3
-	.set	.LANCHOR138,. + 0
-	.type	__func__.9387, %object
-	.size	__func__.9387, 17
-__func__.9387:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9469, %object
+	.size	__func__.9469, 17
+__func__.9469:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9434,"a",@progbits
+	.section	.rodata.__func__.9516,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9434, %object
-	.size	__func__.9434, 17
-__func__.9434:
+	.set	.LANCHOR216,. + 0
+	.type	__func__.9516, %object
+	.size	__func__.9516, 17
+__func__.9516:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9452,"a",@progbits
+	.section	.rodata.__func__.9534,"a",@progbits
 	.align	3
-	.set	.LANCHOR120,. + 0
-	.type	__func__.9452, %object
-	.size	__func__.9452, 14
-__func__.9452:
+	.set	.LANCHOR122,. + 0
+	.type	__func__.9534, %object
+	.size	__func__.9534, 14
+__func__.9534:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9496,"a",@progbits
+	.section	.rodata.__func__.9578,"a",@progbits
 	.align	3
-	.set	.LANCHOR123,. + 0
-	.type	__func__.9496, %object
-	.size	__func__.9496, 18
-__func__.9496:
+	.set	.LANCHOR125,. + 0
+	.type	__func__.9578, %object
+	.size	__func__.9578, 18
+__func__.9578:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9529,"a",@progbits
+	.section	.rodata.__func__.9611,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.9529, %object
-	.size	__func__.9529, 10
-__func__.9529:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9611, %object
+	.size	__func__.9611, 10
+__func__.9611:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9560,"a",@progbits
+	.section	.rodata.__func__.9642,"a",@progbits
 	.align	3
-	.set	.LANCHOR218,. + 0
-	.type	__func__.9560, %object
-	.size	__func__.9560, 13
-__func__.9560:
+	.set	.LANCHOR222,. + 0
+	.type	__func__.9642, %object
+	.size	__func__.9642, 13
+__func__.9642:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9679,"a",@progbits
+	.section	.rodata.__func__.9789,"a",@progbits
 	.align	3
-	.set	.LANCHOR60,. + 0
-	.type	__func__.9679, %object
-	.size	__func__.9679, 12
-__func__.9679:
+	.set	.LANCHOR61,. + 0
+	.type	__func__.9789, %object
+	.size	__func__.9789, 12
+__func__.9789:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9700,"a",@progbits
+	.section	.rodata.__func__.9810,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
-	.type	__func__.9700, %object
-	.size	__func__.9700, 21
-__func__.9700:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9810, %object
+	.size	__func__.9810, 21
+__func__.9810:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9734,"a",@progbits
+	.section	.rodata.__func__.9844,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
-	.type	__func__.9734, %object
-	.size	__func__.9734, 22
-__func__.9734:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9844, %object
+	.size	__func__.9844, 22
+__func__.9844:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9747,"a",@progbits
+	.section	.rodata.__func__.9857,"a",@progbits
 	.align	3
-	.set	.LANCHOR67,. + 0
-	.type	__func__.9747, %object
-	.size	__func__.9747, 19
-__func__.9747:
+	.set	.LANCHOR68,. + 0
+	.type	__func__.9857, %object
+	.size	__func__.9857, 19
+__func__.9857:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9776,"a",@progbits
+	.section	.rodata.__func__.9886,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
-	.type	__func__.9776, %object
-	.size	__func__.9776, 16
-__func__.9776:
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9886, %object
+	.size	__func__.9886, 16
+__func__.9886:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9798,"a",@progbits
+	.section	.rodata.__func__.9908,"a",@progbits
 	.align	3
-	.set	.LANCHOR103,. + 0
-	.type	__func__.9798, %object
-	.size	__func__.9798, 16
-__func__.9798:
+	.set	.LANCHOR106,. + 0
+	.type	__func__.9908, %object
+	.size	__func__.9908, 16
+__func__.9908:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9842,"a",@progbits
+	.section	.rodata.__func__.9952,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.9842, %object
-	.size	__func__.9842, 16
-__func__.9842:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9952, %object
+	.size	__func__.9952, 16
+__func__.9952:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9900,"a",@progbits
-	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.9900, %object
-	.size	__func__.9900, 20
-__func__.9900:
-	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9967,"a",@progbits
-	.align	3
-	.set	.LANCHOR216,. + 0
-	.type	__func__.9967, %object
-	.size	__func__.9967, 11
-__func__.9967:
-	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC154:
+.LC165:
 	.string	"free_buf_count: %d\n"
-.LC155:
+.LC166:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC156:
+.LC167:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC157:
+.LC168:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC158:
+.LC169:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC159:
+.LC170:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC160:
+.LC171:
 	.string	"lpa:"
-.LC161:
+.LC172:
 	.string	"vpn:"
-.LC162:
+.LC173:
 	.string	"sblk:"
-.LC163:
+.LC174:
 	.string	"lpa_hash:"
-.LC164:
+.LC175:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC68:
+.LC70:
 	.string	"dump_sblk_queue: %d\n"
-.LC69:
+.LC71:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
 .LC118:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
-.LC109:
+.LC111:
 	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
-.LC110:
+.LC112:
 	.string	"sync para %d\n"
-.LC111:
+.LC113:
 	.string	"DDR mode Read error %x %x\n"
-.LC112:
+.LC114:
 	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
@@ -25217,25 +26510,25 @@ __func__.9967:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC115:
+.LC117:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC116:
+.LC162:
 	.string	"...%d @ %s %d %p\n"
-.LC117:
+.LC163:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
-.LC84:
+.LC86:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC149:
+.LC159:
 	.string	"finfo:"
-.LC150:
+.LC160:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC151:
+.LC161:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC40:
+.LC41:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
 .LC122:
@@ -25243,28 +26536,31 @@ __func__.9967:
 .LC123:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC128:
-	.string	"flash_prog_page_en:%x %x\n"
-.LC129:
-	.string	"w d:"
 .LC130:
-	.string	"w s:"
+	.string	"flash_prog_page_en:%x %x %x\n"
 .LC131:
-	.string	"spare"
+	.string	"w d:"
 .LC132:
-	.string	"data"
+	.string	"w s:"
 .LC133:
+	.string	"spare"
+.LC134:
+	.string	"data"
+.LC135:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
+	.section	.rodata.flash_read_otp_data.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"otp:%x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC102:
+.LC104:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC113:
+.LC115:
 	.string	"flash_read_page_en %x %x %x\n"
-.LC114:
+.LC116:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -25272,171 +26568,186 @@ __func__.9967:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC67:
+.LC69:
 	.string	"alloc sblk %x %d\n"
+	.section	.rodata.ftl_dump_write_open_sblk.str1.1,"aMS",@progbits,1
+.LC154:
+	.string	"ftl_sblk_dump_write = %x %d %d %d %d\n"
+.LC155:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC156:
+	.string	"ftl_sblk_dump_write2 = %x %d %d %d\n"
+.LC157:
+	.string	"ftl_sblk_dump_write = %x %x\n"
+.LC158:
+	.string	"ftl_sblk_dump_write done = %x\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC138:
+.LC140:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
-.LC55:
-	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
 .LC56:
+	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
+.LC57:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC136:
+.LC138:
 	.string	"%d %x @%d %x\n"
-.LC137:
+.LC139:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC135:
+.LC137:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC139:
+.LC141:
 	.string	"ftl_low_format %d\n"
-.LC140:
+.LC142:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC60:
+.LC61:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC142:
+.LC144:
 	.string	"saved_active_page  = %x\n"
-.LC143:
+.LC145:
 	.string	"saved_active_plane = %x\n"
-.LC144:
+.LC146:
 	.string	"sblk = %x\n"
-.LC145:
+.LC147:
 	.string	"phy_blk = %x %x\n"
-.LC146:
+.LC148:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC147:
-	.string	"dump write = %x\n"
+.LC149:
+	.string	"dump_write_lpa = %x %x %x %x\n"
+.LC150:
+	.string	"dump write new ppa = %x, last ppa = %x lpa = %x\n"
+.LC151:
+	.string	"dump write = %x %x\n"
+.LC152:
+	.string	"dump write hash update = %x %x %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC141:
+.LC143:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC197:
+.LC208:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC198:
+.LC209:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC199:
+.LC210:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC200:
+.LC211:
 	.string	"index= %x, lpa=%x\n"
-.LC201:
+.LC212:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC152:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC153:
+.LC164:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC134:
+.LC136:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC208:
+.LC219:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC209:
+.LC220:
 	.string	"ftl_update_l2p_map"
-.LC210:
+.LC221:
 	.string	"lpa_tbl:"
-.LC211:
+.LC222:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC59:
+.LC60:
 	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC212:
+.LC223:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC66:
+.LC68:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC41:
-	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 .LC42:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+.LC43:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC205:
+.LC216:
 	.string	"gc_lpa:"
-.LC206:
+.LC217:
 	.string	"gc_ppa:"
-.LC207:
+.LC218:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC213:
+.LC224:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC214:
+.LC225:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC215:
+.LC226:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC216:
+.LC227:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC57:
-	.string	"gc_free_src_blk = %x, vpn = %d\n"
 .LC58:
+	.string	"gc_free_src_blk = %x, vpn = %d\n"
+.LC59:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC45:
+.LC46:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC175:
+.LC186:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC176:
+.LC187:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC177:
+.LC188:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC195:
+.LC206:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC196:
+.LC207:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC47:
-	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
 .LC48:
+	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
+.LC49:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC73:
+.LC75:
 	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC74:
+.LC76:
 	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC75:
+.LC77:
 	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC76:
+.LC78:
 	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC77:
+.LC79:
 	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
-.LC78:
+.LC80:
 	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC79:
+.LC81:
 	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC80:
+.LC82:
 	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
-.LC81:
+.LC83:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC191:
+.LC202:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC192:
+.LC203:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC193:
+.LC204:
 	.string	"lpa: %x %x %x\n"
-.LC194:
+.LC205:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC43:
-	.string	"status: %x, ppa: %x\n"
 .LC44:
+	.string	"status: %x, ppa: %x\n"
+.LC45:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC92:
+.LC94:
 	.string	"otp error! %d"
-.LC93:
+.LC95:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC108:
+.LC110:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
 .LC124:
@@ -25446,25 +26757,25 @@ __func__.9967:
 .LC126:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC166:
+.LC177:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC167:
+.LC178:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC168:
+.LC179:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC169:
+.LC180:
 	.string	"pm_ppa:"
-.LC170:
+.LC181:
 	.string	"data:"
-.LC171:
+.LC182:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC72:
+.LC74:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC103:
+.LC105:
 	.string	"micron %d row=%x,last status %d,status = %d\n"
-.LC104:
+.LC106:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -25528,70 +26839,72 @@ __func__.9967:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC85:
+.LC87:
 	.string	"...%s enter... %p\n"
-.LC86:
+.LC88:
 	.string	"0:%x %x %x %x %x\n"
-.LC87:
+.LC89:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC99:
+.LC101:
 	.string	"dqs data abort %x\n"
-.LC100:
+.LC102:
 	.string	"dqs data timeout %x\n"
-.LC101:
+.LC103:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC94:
+.LC96:
 	.string	"flash_abort_clear = %d\n"
-.LC95:
+.LC97:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC96:
+.LC98:
 	.string	"nandc:"
-.LC97:
+.LC99:
 	.string	"%d flReg.d32=%x %x\n"
-.LC98:
+.LC100:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC70:
+.LC72:
 	.string	"blk %x is bad block\n"
-.LC71:
+.LC73:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC83:
+.LC85:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC172:
+.LC183:
 	.string	"pm_init posr %x %x %x\n"
-.LC173:
+.LC184:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC174:
+.LC185:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC165:
+.LC176:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC148:
+.LC153:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC61:
-	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
 .LC62:
-	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
+	.string	"bad blk = %x, %x free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
 .LC63:
-	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
+	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
 .LC64:
-	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
 .LC65:
+	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+.LC66:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
+.LC67:
+	.string	"swl : %x %x %x %x\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC46:
+.LC47:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC53:
-	.string	"list count:%p %d\n"
 .LC54:
+	.string	"list count:%p %d\n"
+.LC55:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
 .LC119:
@@ -25735,22 +27048,28 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC190:
+.LC201:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC88:
+.LC90:
 	.string	"%s 0x%x:"
-.LC89:
+.LC91:
 	.string	"%x "
-.LC90:
+.LC92:
 	.string	""
-.LC91:
+.LC93:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
-.LC39:
+.LC40:
 	.string	"bad block test:%x %x\n"
-	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
+	.section	.rodata.sblk_3d_tlc_dump_prog.str1.1,"aMS",@progbits,1
 .LC127:
+	.string	"sblk_3d_tlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
+	.section	.rodata.sblk_mlc_dump_prog.str1.1,"aMS",@progbits,1
+.LC128:
+	.string	"sblk_mlc_dump_prog wl_addr= %x ppa = %x ppa = %x\n"
+	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
+.LC129:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -25855,7 +27174,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -25872,7 +27191,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -26276,11 +27595,11 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC105:
+.LC107:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC106:
+.LC108:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC107:
+.LC109:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
@@ -26348,63 +27667,63 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC222:
+.LC233:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC217:
+.LC228:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC218:
+.LC229:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC219:
+.LC230:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC220:
+.LC231:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC49:
-	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
 .LC50:
-	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
 .LC51:
+	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+.LC52:
 	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC52:
+.LC53:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC178:
-	.string	"FTL version: 6.0.14 20180908"
-.LC179:
+.LC189:
+	.string	"FTL version: 6.0.14 20181128"
+.LC190:
 	.string	"_c_user_data_density := %d\n"
-.LC180:
+.LC191:
 	.string	"_c_totle_phy_density := %d\n"
-.LC181:
+.LC192:
 	.string	"_c_totle_log_page := %d\n"
-.LC182:
+.LC193:
 	.string	"_c_totle_data_density := %d\n"
-.LC183:
+.LC194:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC184:
+.LC195:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC185:
+.LC196:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC186:
+.LC197:
 	.string	"_min_slc_super_block := %d\n"
-.LC187:
+.LC198:
 	.string	"_max_xlc_super_block := %d\n"
-.LC188:
+.LC199:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC189:
+.LC200:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC202:
+.LC213:
 	.string	"ftl_read %x %x %x\n"
-.LC203:
+.LC214:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC204:
-	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
+.LC215:
+	.string	"id=%d, status = %x, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC82:
+.LC84:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC221:
-	.string	"ftlwrite %x %x %x\n"
+.LC232:
+	.string	"ftlwrite %x %x %x %x\n"
 	.hidden	free

commit 4f11086738999c35edfe5d4d093f6f0ce875dade
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 21 15:18:49 2019 +0800

    Kconfig: disable SYS_MALLOC_CLEAR_ON_INIT for rockchip
    
    It really saves a lot of boot time.
    
    Change-Id: I22b1259c865f91816f54f87fe7b3d893d8c70522
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Kconfig b/Kconfig
index 03153dd933..082dab44ea 100644
--- a/Kconfig
+++ b/Kconfig
@@ -133,7 +133,7 @@ menuconfig EXPERT
 if EXPERT
 	config SYS_MALLOC_CLEAR_ON_INIT
 	bool "Init with zeros the memory reserved for malloc (slow)"
-	default y
+	default y if !ARCH_ROCKCHIP
 	help
 	  This setting is enabled by default. The reserved malloc
 	  memory is initialized with zeros, so first malloc calls

commit 628c8271948b899f8b016e16d4c310ee40547c5d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 25 17:13:51 2019 +0800

    usb: rockusb: forbid reading data beyond addr 32MB
    
    Forbid reading data beyong addr 32MB to protect user data & firmware. Excess
    partial is filled with 0xcc. The addr 32MB is quoted from pre-loader.
    
    Change-Id: I96f4fb3bb0d88a309fef20650863011cd9f0dfd9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 35d7020db8..4062f368cf 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -24,7 +24,12 @@ static int rkusb_read_sector(struct ums *ums_dev,
 	struct blk_desc *block_dev = &ums_dev->block_dev;
 	lbaint_t blkstart = start + ums_dev->start_sector;
 
-	return blk_dread(block_dev, blkstart, blkcnt, buf);
+	if (blkstart > RKUSB_READ_LIMIT_ADDR) {
+		memset(buf, 0xcc, blkcnt * SECTOR_SIZE);
+		return blkcnt;
+	} else {
+		return blk_dread(block_dev, blkstart, blkcnt, buf);
+	}
 }
 
 static int rkusb_write_sector(struct ums *ums_dev,
diff --git a/include/rockusb.h b/include/rockusb.h
index 48eb9d6152..2eace128cf 100644
--- a/include/rockusb.h
+++ b/include/rockusb.h
@@ -75,6 +75,8 @@ static inline int rkusb_cmd_process(struct fsg_common *common,
 #define RKUSB_CABLE_READY_TIMEOUT	60
 #define SECTOR_SIZE			0x200
 
+#define RKUSB_READ_LIMIT_ADDR	        (32 * 2048)	/* 32MB */
+
 struct rockusb {
 	struct ums *ums;
 	int ums_cnt;

commit b671af0a931aa9f53843c2580d8e18e7496cbd5c
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Feb 21 19:54:01 2019 +0800

    common: write keybox: fix some non-standard code style
    
    Change-Id: If202eb86ceed4a358939e1f4d6f36c678afee3e9
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 54f73f0f3e..164d802353 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -4,15 +4,18 @@
  */
 
 #include <common.h>
-#include <optee_include/OpteeClientApiLib.h>
-#include <optee_include/tee_client_api.h>
-#include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
 #include <stdlib.h>
 #include <attestation_key.h>
-#include "write_keybox.h"
+#include <write_keybox.h>
 #include <keymaster.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
 
+#define STORAGE_CMD_WRITE	6
+#define	SIZE_OF_TAG		4
+#define	SIZE_OF_USB_CMD	8
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
 #define	ATTESTATION_TAG	"ATTE"
@@ -23,12 +26,15 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      uint8_t *key, uint32_t key_size,
 			      uint8_t *data, uint32_t data_size)
 {
+	uint32_t ErrorOrigin;
 	TEEC_Result TeecResult;
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
 	TEEC_UUID *TeecUuid = &uuid;
 	TEEC_Operation TeecOperation = {0};
+	TEEC_SharedMemory SharedMem0 = {0};
+	TEEC_SharedMemory SharedMem1 = {0};
+	TEEC_SharedMemory SharedMem2 = {0};
 	struct blk_desc *dev_desc;
 
 	dev_desc = rockchip_get_bootdev();
@@ -37,8 +43,12 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 		return -TEEC_ERROR_GENERIC;
 	}
 
-	OpteeClientApiLibInitialize();
+	TeecResult = OpteeClientApiLibInitialize();
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
 						    TEEC_NONE,
 						    TEEC_NONE,
@@ -57,24 +67,28 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 				      NULL,
 				      &TeecOperation,
 				      &ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 
 	SharedMem0.size = filename_size;
 	SharedMem0.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-	TEEC_SharedMemory SharedMem1 = {0};
 
 	SharedMem1.size = key_size;
 	SharedMem1.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	memcpy(SharedMem1.buffer, key, SharedMem1.size);
-	TEEC_SharedMemory SharedMem2 = {0};
 
 	SharedMem2.size = data_size;
 	SharedMem2.flags = 0;
 	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	if (TeecResult != TEEC_SUCCESS)
+		return TeecResult;
 	memcpy(SharedMem2.buffer, data, SharedMem2.size);
 
 	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
@@ -91,7 +105,7 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 
 	printf("write keybox to secure storage\n");
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					6,
+					STORAGE_CMD_WRITE,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS)
@@ -113,21 +127,22 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 {
 	uint32_t key_size;
 	uint32_t data_size;
-	TEEC_Result ret;
 	int rc = 0;
+	TEEC_Result ret;
 
-	if (memcmp(received_data, WIDEVINE_TAG, 4) == 0) {
+	if (memcmp(received_data, WIDEVINE_TAG, SIZE_OF_TAG) == 0) {
 		/* widevine keybox */
 		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
 			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 
-		key_size = *(received_data + 4);
-		data_size = *(received_data + 8);
+		key_size = *(received_data + SIZE_OF_TAG);
+		data_size = *(received_data + SIZE_OF_TAG + sizeof(key_size));
 
 		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
 					   sizeof("widevine_keybox"),
 					   widevine_uuid,
-					   received_data + 12,
+					   received_data + SIZE_OF_TAG +
+					   sizeof(key_size) + sizeof(data_size),
 					   key_size,
 					   received_data + 12 + key_size,
 					   data_size);
@@ -138,7 +153,7 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write widevine keybox to secure storage fail\n");
 		}
-	} else if (memcmp(received_data, ATTESTATION_TAG, 4) == 0) {
+	} else if (memcmp(received_data, ATTESTATION_TAG, SIZE_OF_TAG) == 0) {
 		/* attestation key */
 		atap_result ret;
 
@@ -150,14 +165,16 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write attestation key to secure storage fail\n");
 		}
-	} else if (memcmp(received_data, PLAYREADY30_TAG, 4) == 0) {
+	} else if (memcmp(received_data, PLAYREADY30_TAG, SIZE_OF_TAG) == 0) {
 		/* PlayReady SL3000 root key */
 		uint32_t ret;
 
-		data_size = *(received_data + 4);
+		data_size = *(received_data + SIZE_OF_TAG);
 		ret = write_to_keymaster((uint8_t *)"PlayReady_SL3000",
 					 sizeof("PlayReady_SL3000"),
-					 received_data + 8, data_size);
+					 received_data + SIZE_OF_TAG +
+					 sizeof(data_size),
+					 data_size);
 		if (ret == TEEC_SUCCESS) {
 			rc = 0;
 			printf("write PlayReady SL3000 root key to secure storage success\n");
@@ -187,10 +204,10 @@ uint32_t read_raw_data_from_secure_storage(uint8_t *data, uint32_t data_size)
 	uint32_t rc;
 
 	rc = read_from_keymaster((uint8_t *)"raw_data", sizeof("raw_data"),
-				 data, data_size - 8);
+				 data, data_size - SIZE_OF_USB_CMD);
 	if (rc != TEEC_SUCCESS)
 		return 0;
-	rc = data_size - 8;
+	rc = data_size - SIZE_OF_USB_CMD;
 
 	return rc;
 }

commit 269512fdf664a9334e63d8da8a58d2b0323eff68
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 09:14:05 2019 +0800

    irq: clean up code
    
    - using IRQ_X() to print message;
    - update some comment;
    - rename some function;
    - add more strict irq sanity;
    
    Change-Id: If5432818d4bc12fc1aa0b8aca6898bbf79dfa9fb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 7fffacff6b..4d9406b278 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -21,16 +21,19 @@ static struct irq_desc irqs_desc[PLATFORM_MAX_IRQS_NR];
 static struct irq_chip *gic_irq_chip, *gpio_irq_chip;
 static bool initialized;
 
-static int irq_bad(int irq)
+static int bad_irq(int irq)
 {
 	if (irq >= PLATFORM_MAX_IRQS_NR) {
-		printf("WARN: IRQ %d is out of max supported IRQ %d\n",
-		       irq, PLATFORM_MAX_IRQS_NR);
+		IRQ_W("IRQ %d is out of max supported IRQ(%d)\n",
+		      irq, PLATFORM_MAX_IRQS_NR);
 		return -EINVAL;
 	}
 
+	if (!irqs_desc[irq].handle_irq)
+		return -EINVAL;
+
 	if (!initialized) {
-		printf("WARN: Interrupt framework is not initialized\n");
+		IRQ_W("Interrupt framework is not initialized\n");
 		return -EINVAL;
 	}
 
@@ -38,13 +41,13 @@ static int irq_bad(int irq)
 }
 
 /* general interrupt handler for gpio chip */
-void _generic_gpio_handle_irq(int irq)
+void __generic_gpio_handle_irq(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return;
 
 	if (irq < PLATFORM_GIC_IRQS_NR) {
-		printf("WRAN: IRQ %d is not a GPIO irq\n", irq);
+		IRQ_W("IRQ %d is not a GPIO irq\n", irq);
 		return;
 	}
 
@@ -52,7 +55,7 @@ void _generic_gpio_handle_irq(int irq)
 		irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
 }
 
-void _do_generic_irq_handler(void)
+void __do_generic_irq_handler(void)
 {
 	u32 irq = gic_irq_chip->irq_get();
 
@@ -69,7 +72,7 @@ int irq_is_busy(int irq)
 	return (irq >= 0 && irqs_desc[irq].handle_irq) ? -EBUSY : 0;
 }
 
-static int chip_irq_bad(struct irq_chip *chip)
+static int bad_irq_chip(struct irq_chip *chip)
 {
 	if (!chip->name ||
 	    !chip->irq_init ||
@@ -81,19 +84,19 @@ static int chip_irq_bad(struct irq_chip *chip)
 	return 0;
 }
 
-static int _do_arch_irq_init(void)
+static int __do_arch_irq_init(void)
 {
 	int irq, err = -EINVAL;
 
 	/* After relocation done, bss data initialized */
 	if (!(gd->flags & GD_FLG_RELOC)) {
-		printf("WARN: interrupt should be init after reloc\n");
+		IRQ_W("Interrupt framework should initialize after reloc\n");
 		return -EINVAL;
 	}
 
 	/*
-	 * should set true before arch_gpio_irq_init(), otherwise
-	 *  can't request irqs for gpio banks.
+	 * We set true before arch_gpio_irq_init() to avoid fail when
+	 * request irq for gpio banks.
 	 */
 	initialized = true;
 
@@ -103,26 +106,26 @@ static int _do_arch_irq_init(void)
 	}
 
 	gic_irq_chip = arch_gic_irq_init();
-	if (chip_irq_bad(gic_irq_chip)) {
-		printf("ERROR: bad gic irq chip\n");
+	if (bad_irq_chip(gic_irq_chip)) {
+		IRQ_E("Bad gic irq chip\n");
 		goto out;
 	}
 
 	gpio_irq_chip = arch_gpio_irq_init();
-	if (chip_irq_bad(gpio_irq_chip)) {
-		printf("ERROR: bad gpio irq chip\n");
+	if (bad_irq_chip(gpio_irq_chip)) {
+		IRQ_E("Bad gpio irq chip\n");
 		goto out;
 	}
 
 	err = gic_irq_chip->irq_init();
 	if (err) {
-		printf("ERROR: gic interrupt init failed\n");
+		IRQ_E("GIC interrupt initial failed, ret=%d\n", err);
 		goto out;
 	}
 
 	err = gpio_irq_chip->irq_init();
 	if (err) {
-		printf("ERROR: gpio interrupt init failed\n");
+		IRQ_E("GPIO interrupt initial failed, ret=%d\n", err);
 		goto out;
 	}
 
@@ -136,7 +139,7 @@ out:
 
 int irq_handler_enable(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -147,7 +150,7 @@ int irq_handler_enable(int irq)
 
 int irq_handler_disable(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -158,7 +161,7 @@ int irq_handler_disable(int irq)
 
 int irq_set_irq_type(int irq, unsigned int type)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -169,7 +172,7 @@ int irq_set_irq_type(int irq, unsigned int type)
 
 int irq_revert_irq_type(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -180,7 +183,7 @@ int irq_revert_irq_type(int irq)
 
 int irq_get_gpio_level(int irq)
 {
-	if (irq_bad(irq))
+	if (bad_irq(irq))
 		return -EINVAL;
 
 	if (irq < PLATFORM_GIC_IRQS_NR)
@@ -191,9 +194,20 @@ int irq_get_gpio_level(int irq)
 
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 {
-	if (irq_bad(irq))
+	if (irq >= PLATFORM_MAX_IRQS_NR) {
+		IRQ_W("IRQ %d is out of max supported IRQ(%d)\n",
+		      irq, PLATFORM_MAX_IRQS_NR);
+		return;
+	}
+
+	if (!handler || irqs_desc[irq].handle_irq)
 		return;
 
+	if (!initialized) {
+		IRQ_W("Interrupt framework is not initialized\n");
+		return;
+	}
+
 	irqs_desc[irq].handle_irq = handler;
 	irqs_desc[irq].data = data;
 }
@@ -213,7 +227,7 @@ int irqs_suspend(void)
 
 	err = gic_irq_chip->irq_suspend();
 	if (err) {
-		printf("ERROR: irqs suspend failed\n");
+		IRQ_E("IRQs suspend failed, ret=%d\n", err);
 		return err;
 	}
 
@@ -226,7 +240,7 @@ int irqs_resume(void)
 
 	err = gic_irq_chip->irq_resume();
 	if (err) {
-		printf("ERROR: irqs resume failed\n");
+		IRQ_E("IRQs resume failed, ret=%d\n", err);
 		return err;
 	}
 
@@ -242,7 +256,6 @@ static void cpu_local_irq_enable(void)
 static int cpu_local_irq_disable(void)
 {
 	asm volatile("msr daifset, #0x02");
-
 	return 0;
 }
 
@@ -253,7 +266,7 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 	show_regs(pt_regs);
 #endif
 
-	_do_generic_irq_handler();
+	__do_generic_irq_handler();
 }
 #else
 static void cpu_local_irq_enable(void)
@@ -287,7 +300,7 @@ void do_irq(struct pt_regs *pt_regs)
 	show_regs(pt_regs);
 #endif
 
-	_do_generic_irq_handler();
+	__do_generic_irq_handler();
 }
 #endif
 
@@ -318,7 +331,7 @@ int arch_interrupt_init(void)
 			     : "r" (cpsr)
 			     : "memory");
 #endif
-	return _do_arch_irq_init();
+	return __do_arch_irq_init();
 }
 
 int interrupt_init(void)
diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 4be2f2c158..dbd515cb0a 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -211,10 +211,8 @@ static void gic_irq_eoi(int irq)
 #ifdef CONFIG_GICV2
 	gicc_writel(irq, GICC_EOIR);
 #else
-	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0"
-			: : "r" ((u64)irq));
-	asm volatile("msr " __stringify(ICC_DIR_EL1) ", %0"
-			: : "r" ((u64)irq));
+	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0" : : "r" ((u64)irq));
+	asm volatile("msr " __stringify(ICC_DIR_EL1) ", %0" : : "r" ((u64)irq));
 	isb();
 #endif
 }
diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index c8bc722d8a..cb228a2f61 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -45,16 +45,18 @@ static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
 
 static int gpio_is_valid(u32 gpio)
 {
-	if ((gpio == EINVAL_GPIO) || !GPIO_BANK_VALID(gpio) ||
+	if ((gpio == EINVAL_GPIO) ||
+	    !GPIO_BANK_VALID(gpio) ||
 	    !GPIO_PIN_VALID(gpio)) {
-		printf("gpio = 0x%x is not valid!\n", gpio);
+		IRQ_E("gpio-%d(bank-%d, pin-%d) is invalid!\n",
+		      gpio, GPIO_BANK(gpio), GPIO_PIN(gpio));
 		return 0;
 	}
 
 	return 1;
 }
 
-static int _hard_gpio_to_irq(u32 gpio)
+static int __hard_gpio_to_irq(u32 gpio)
 {
 	int idx, bank = 0, pin = 0;
 	int irq;
@@ -77,36 +79,36 @@ static int _hard_gpio_to_irq(u32 gpio)
 	return -EINVAL;
 }
 
-static int _phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
+static int __phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
 {
 	int irq_gpio, bank, ret = EINVAL_GPIO;
-	bool found;
 	const char *name;
 	char *name_tok;
+	bool found;
 	int node;
 
 	node = fdt_node_offset_by_phandle(gd->fdt_blob, gpio_phandle);
 	if (node < 0) {
-		printf("can't find node by gpio_phandle %d, ret=%d\n",
-		       gpio_phandle, node);
+		IRQ_E("Can't find node by gpio_phandle=%d, ret=%d\n",
+		      gpio_phandle, node);
 		return EINVAL_GPIO;
 	}
 
 	name = fdt_get_name(gd->fdt_blob, node, NULL);
 	if (!name) {
-		printf("can't find device name for the gpio bank\n");
+		IRQ_E("Can't find gpio bank for phandle=%d\n", gpio_phandle);
 		return EINVAL_GPIO;
 	}
 
 	name_tok = strdup(name);
 	if (!name_tok) {
-		printf("Error: strdup in %s failed!\n", __func__);
+		IRQ_E("Strdup '%s' failed!\n", name);
 		return -ENOMEM;
 	}
 
 	name = strtok(name_tok, "@");
 	if (!name) {
-		printf("can't find correct device name for the gpio bank\n");
+		IRQ_E("Can't strtok '@' for '%s'\n", name_tok);
 		goto out;
 	}
 
@@ -118,24 +120,24 @@ static int _phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
 	}
 
 	if (!found) {
-		printf("irq gpio framework can't find %s\n", name);
+		IRQ_E("GPIO irq framework can't find '%s'\n", name);
 		goto out;
 	}
 
-	debug("%s: gpio%d-%d\n", __func__, bank, offset);
+	IRQ_D("%s: gpio%d-%d\n", __func__, bank, offset);
 	irq_gpio = RK_IRQ_GPIO(bank, offset);
 	if (!gpio_is_valid(irq_gpio))
 		goto out;
 
 	free(name_tok);
-	return _hard_gpio_to_irq(irq_gpio);
+	return __hard_gpio_to_irq(irq_gpio);
 
 out:
 	free(name_tok);
 	return ret;
 }
 
-static int _irq_to_gpio(int irq)
+static int __irq_to_gpio(int irq)
 {
 	int bank, pin, idx;
 
@@ -155,23 +157,23 @@ static int _irq_to_gpio(int irq)
 int gpio_to_irq(struct gpio_desc *gpio)
 {
 	int irq_gpio, bank, ret = EINVAL_GPIO;
-	bool found;
 	char *name, *name_tok;
+	bool found;
 
 	if (!gpio->dev->name) {
-		printf("can't find device name for the gpio bank\n");
+		IRQ_E("Can't find dev name for gpio bank\n");
 		return EINVAL_GPIO;
 	}
 
 	name_tok = strdup(gpio->dev->name);
 	if (!name_tok) {
-		printf("Error: strdup in %s failed!\n", __func__);
+		IRQ_E("Strdup '%s' failed!\n", gpio->dev->name);
 		return -ENOMEM;
 	}
 
 	name = strtok(name_tok, "@");
 	if (!name) {
-		printf("can't find correct device name for the gpio bank\n");
+		IRQ_E("Can't strtok '@' for '%s'\n", name_tok);
 		goto out;
 	}
 
@@ -183,7 +185,7 @@ int gpio_to_irq(struct gpio_desc *gpio)
 	}
 
 	if (!found) {
-		printf("irq gpio framework can't find %s\n", name);
+		IRQ_E("GPIO irq framework can't find '%s'\n", name);
 		goto out;
 	}
 
@@ -192,7 +194,7 @@ int gpio_to_irq(struct gpio_desc *gpio)
 		goto out;
 
 	free(name_tok);
-	return _hard_gpio_to_irq(irq_gpio);
+	return __hard_gpio_to_irq(irq_gpio);
 
 out:
 	free(name_tok);
@@ -204,7 +206,7 @@ int hard_gpio_to_irq(u32 gpio)
 	if (!gpio_is_valid(gpio))
 		return EINVAL_GPIO;
 
-	return _hard_gpio_to_irq(gpio);
+	return __hard_gpio_to_irq(gpio);
 }
 
 int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
@@ -212,12 +214,12 @@ int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
 	if (gpio_phandle < 0)
 		return EINVAL_GPIO;
 
-	return _phandle_gpio_to_irq(gpio_phandle, pin);
+	return __phandle_gpio_to_irq(gpio_phandle, pin);
 }
 
 int irq_to_gpio(int irq)
 {
-	return _irq_to_gpio(irq);
+	return __irq_to_gpio(irq);
 }
 
 struct gpio_bank *gpio_id_to_bank(u32 id)
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index 7a2a22248d..ce88cc8f7b 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -101,15 +101,15 @@ static void generic_gpio_handle_irq(int irq, void *data __always_unused)
 		gpio_irq_ack(bank->regbase, offset_to_bit(pin));
 
 		/*
-		 * if gpio is edge triggered, clear condition before executing
-		 * the handler so that we don't miss edges
+		 * If gpio is edge triggered, clear condition before executing
+		 * the handler, so that we don't miss next edges trigger.
 		 */
 		if (ilr & (1 << pin)) {
 			unmasked = 1;
 			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
 		}
 
-		_generic_gpio_handle_irq(gpio_irq + pin);
+		__generic_gpio_handle_irq(gpio_irq + pin);
 
 		isr &= ~(1 << pin);
 
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 62e611b33d..41b8c1223c 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -11,6 +11,11 @@
 #include <common.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 
+#define IRQ_I(fmt, args...)	printf("IRQ: "fmt, ##args)
+#define IRQ_W(fmt, args...)	printf("IRQ Warn: "fmt, ##args)
+#define IRQ_E(fmt, args...)	printf("IRQ Err: "fmt, ##args)
+#define IRQ_D(fmt, args...)	 debug("IRQ Debug "fmt, ##args)
+
 /*
  * IRQ line status.
  *
@@ -84,10 +89,11 @@ int gpio_to_irq(struct gpio_desc *gpio);
  */
 #define GPIO_BANK_SHIFT			8
 #define RK_IRQ_GPIO(bank, pin) 		(((bank) << GPIO_BANK_SHIFT) | (pin))
+
 int hard_gpio_to_irq(unsigned gpio);
 int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
 
-/* only irq-gpio.c can use it */
-void _generic_gpio_handle_irq(int irq);
+/* Only irq-gpio.c can call it */
+void __generic_gpio_handle_irq(int irq);
 
 #endif /* _IRQ_GENERIC_H */

commit ebe3d004b5204f9b59ee847789b50de99cba5bdc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 15:12:41 2019 +0800

    power: charge animation: clean up code
    
    Change-Id: I0d76d7ad28ef3683bbc78f36d4a0f00d5517e2fa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 1b90421f00..3a0e885689 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -32,7 +32,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define IMAGE_SHOW_RESET			-1
+#define IMAGE_RESET_IDX				-1
+#define IMAGE_SOC_100_IDX(n)			((n) - 2)
+#define IMAGE_LOWPOWER_IDX(n)			((n) - 1)
+
 #define FUEL_GAUGE_POLL_MS			1000
 
 #define LED_CHARGING_NAME			"battery_charging"
@@ -143,7 +146,7 @@ static int check_key_press(struct udevice *dev)
 
 	/* Fixup key state for following cases */
 	if (pdata->auto_wakeup_interval) {
-		if  (pdata->auto_wakeup_screen_invert) {
+		if (pdata->auto_wakeup_screen_invert) {
 			if (priv->auto_wakeup_key_state == KEY_PRESS_DOWN) {
 				/* Value is updated in timer interrupt */
 				priv->auto_wakeup_key_state = KEY_PRESS_NONE;
@@ -216,6 +219,7 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 
 	return 0;
 }
+
 static void timer_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -387,7 +391,7 @@ static int charge_animation_show(struct udevice *dev)
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
 	ulong delta;
 	ulong ms = 0, sec = 0;
-	int start_idx = 0, show_idx = -1, old_show_idx = IMAGE_SHOW_RESET;
+	int start_idx = 0, show_idx = -1, old_show_idx = IMAGE_RESET_IDX;
 	int soc, voltage, current, key_state;
 	int i, charging = 1, ret;
 	int boot_mode;
@@ -496,8 +500,8 @@ static int charge_animation_show(struct udevice *dev)
 
 		/*
 		 * Most fuel gauge is I2C interface, it shouldn't be interrupted
-		 * during tansfer. The power key event depends on interrupt, so
-		 * so we should disable local irq when update fuel gauge.
+		 * during transfer. The power key event depends on interrupt, so
+		 * we should disable local irq when update fuel gauge.
 		 */
 		local_irq_disable();
 
@@ -537,8 +541,8 @@ static int charge_animation_show(struct udevice *dev)
 			printf("get current failed: %d\n", current);
 			continue;
 		}
-		first_poll_fg = 0;
 
+		first_poll_fg = 0;
 		local_irq_enable();
 
 show_images:
@@ -550,7 +554,8 @@ show_images:
 			debug_start = get_timer(0);
 		if (get_timer(debug_start) > 20000) {
 			debug_start = get_timer(0);
-			printf("[%8ld]: soc=%d%%, vol=%dmv, c=%dma, online=%d, screen_on=%d\n",
+			printf("[%8ld]: soc=%d%%, vol=%dmv, c=%dma, "
+			       "online=%d, screen_on=%d\n",
 			       get_timer(0)/1000, soc, voltage,
 			       current, charging, screen_on);
 		}
@@ -570,24 +575,24 @@ show_images:
 
 		/*
 		 * Auto turn on screen when voltage higher than Vol screen on.
-		 * 'ever_lowpower_screen_off' means enter while loop with
+		 * 'ever_lowpower_screen_off' means enter the while(1) loop with
 		 * screen off.
 		 */
 		if ((ever_lowpower_screen_off) &&
 		    (voltage > pdata->screen_on_voltage)) {
 			ever_lowpower_screen_off = false;
 			screen_on = true;
-			show_idx = IMAGE_SHOW_RESET;
+			show_idx = IMAGE_RESET_IDX;
 		}
 
 		/*
-		 * IMAGE_SHOW_RESET means show_idx show be update by start_idx.
+		 * IMAGE_RESET_IDX means show_idx show be update by start_idx.
 		 * When short key pressed event trigged, we will set show_idx
-		 * as IMAGE_SHOW_RESET which updates images index from start_idx
+		 * as IMAGE_RESET_IDX which updates images index from start_idx
 		 * that calculate by current soc.
 		 */
-		if (show_idx == IMAGE_SHOW_RESET) {
-			for (i = 0; i < image_num - 2; i++) {
+		if (show_idx == IMAGE_RESET_IDX) {
+			for (i = 0; i < IMAGE_SOC_100_IDX(image_num); i++) {
 				/* Find out which image we start to show */
 				if ((soc >= image[i].soc) &&
 				    (soc < image[i + 1].soc)) {
@@ -596,7 +601,7 @@ show_images:
 				}
 
 				if (soc >= 100) {
-					start_idx = image_num - 2;
+					start_idx = IMAGE_SOC_100_IDX(image_num);
 					break;
 				}
 			}
@@ -619,7 +624,7 @@ show_images:
 				debug("SHOW: %s\n", image[show_idx].name);
 				charge_show_bmp(image[show_idx].name);
 			}
-			/* Re calculate timeout to off screen */
+			/* Re-calculate timeout to off screen */
 			if (priv->auto_screen_off_timeout == 0)
 				priv->auto_screen_off_timeout = get_timer(0);
 		} else {
@@ -635,8 +640,8 @@ show_images:
 			show_start = get_timer(0);
 			/* Update to next image */
 			show_idx++;
-			if (show_idx > (image_num - 2))
-				show_idx = IMAGE_SHOW_RESET;
+			if (show_idx > IMAGE_SOC_100_IDX(image_num))
+				show_idx = IMAGE_RESET_IDX;
 		}
 
 		debug("step4 (%d)... \n", screen_on);
@@ -649,21 +654,15 @@ show_images:
 		 */
 		key_state = check_key_press(dev);
 		if (key_state == KEY_PRESS_DOWN) {
-			old_show_idx = IMAGE_SHOW_RESET;
-
-			/* NULL means show nothing, ie. turn off screen */
-			if (screen_on)
-				charge_show_bmp(NULL);
-
 			/*
 			 * Clear current image index, and show image
 			 * from start_idx
 			 */
-			show_idx = IMAGE_SHOW_RESET;
+			old_show_idx = IMAGE_RESET_IDX;
+			show_idx = IMAGE_RESET_IDX;
 
 			/*
-			 * We turn off screen by charge_show_bmp(NULL), so we
-			 * should tell while loop to stop show images any more.
+			 *	Reverse the screen state
 			 *
 			 * If screen_on=false, means this short key pressed
 			 * event turn on the screen and we need show images.
@@ -671,12 +670,14 @@ show_images:
 			 * If screen_on=true, means this short key pressed
 			 * event turn off the screen and we never show images.
 			 */
-			if (screen_on)
+			if (screen_on) {
+				charge_show_bmp(NULL); /* Turn off screen */
 				screen_on = false;
-			else
+			} else {
 				screen_on = true;
+			}
 		} else if (key_state == KEY_PRESS_LONG_DOWN) {
-			/* Only long pressed while screen off needs screen_on true */
+			/* Set screen_on=true anyway when key long pressed */
 			if (!screen_on)
 				screen_on = true;
 
@@ -685,7 +686,7 @@ show_images:
 				printf("soc=%d%%, threshold soc=%d%%\n",
 				       soc, pdata->exit_charge_level);
 				printf("Low power, unable to boot, charging...\n");
-				show_idx = image_num - 1;
+				show_idx = IMAGE_LOWPOWER_IDX(image_num);
 				continue;
 			}
 
@@ -693,7 +694,7 @@ show_images:
 				printf("voltage=%dmv, threshold voltage=%dmv\n",
 				       voltage, pdata->exit_charge_voltage);
 				printf("Low power, unable to boot, charging...\n");
-				show_idx = image_num - 1;
+				show_idx = IMAGE_LOWPOWER_IDX(image_num);
 				continue;
 			}
 
@@ -738,11 +739,10 @@ static const struct dm_charge_display_ops charge_animation_ops = {
 static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	struct udevice *fg, *pmic, *rtc;
 	int ret, soc;
 
 	/* Get PMIC: used for power off system  */
-	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
+	ret = uclass_get_device(UCLASS_PMIC, 0, &priv->pmic);
 	if (ret) {
 		if (ret == -ENODEV)
 			printf("Can't find PMIC\n");
@@ -750,10 +750,9 @@ static int charge_animation_probe(struct udevice *dev)
 			printf("Get UCLASS PMIC failed: %d\n", ret);
 		return ret;
 	}
-	priv->pmic = pmic;
 
 	/* Get fuel gauge: used for charging */
-	ret = uclass_get_device(UCLASS_FG, 0, &fg);
+	ret = uclass_get_device(UCLASS_FG, 0, &priv->fg);
 	if (ret) {
 		if (ret == -ENODEV)
 			debug("Can't find FG\n");
@@ -761,17 +760,15 @@ static int charge_animation_probe(struct udevice *dev)
 			debug("Get UCLASS FG failed: %d\n", ret);
 		return ret;
 	}
-	priv->fg = fg;
 
 	/* Get rtc: used for power on */
-	ret = uclass_get_device(UCLASS_RTC, 0, &rtc);
+	ret = uclass_get_device(UCLASS_RTC, 0, &priv->rtc);
 	if (ret) {
 		if (ret == -ENODEV)
 			debug("Can't find RTC\n");
 		else
 			debug("Get UCLASS RTC failed: %d\n", ret);
 	}
-	priv->rtc = rtc;
 
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
 	if (key_read(KEY_POWER) == KEY_NOT_EXIST) {
@@ -780,7 +777,7 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 
 	/* Initialize charge current */
-	soc = fuel_gauge_get_soc(fg);
+	soc = fuel_gauge_get_soc(priv->fg);
 	if (soc < 0 || soc > 100) {
 		debug("get soc failed: %d\n", soc);
 		return -EINVAL;
diff --git a/include/power/charge_animation.h b/include/power/charge_animation.h
index a0a3c1565c..9288718cf7 100644
--- a/include/power/charge_animation.h
+++ b/include/power/charge_animation.h
@@ -8,18 +8,18 @@
 #define _CHARGE_ANIMATION_H_
 
 struct charge_animation_pdata {
-	int android_charge;
-	int uboot_charge;
+	int android_charge;	/* android charge, 1: enable, 0: disable */
+	int uboot_charge;	/* u-boot charge, 1: enable, 0: disable */
 
-	int exit_charge_voltage;
-	int exit_charge_level;
-	int low_power_voltage;
-	int screen_on_voltage;
+	int exit_charge_voltage;/* lowest voltage allowed to exit charging */
+	int exit_charge_level;  /* lowest soc level allowed to exit charging */
+	int low_power_voltage;	/* below this voltage, force system into charge mode anyway */
+	int screen_on_voltage;	/* lowest voltage allowed to turn on screen */
 
-	int system_suspend;
-	int auto_wakeup_interval;
-	int auto_wakeup_screen_invert;
-	int auto_off_screen_interval;
+	int system_suspend;	/* enter ATF system suspend, 1: enable, 0: disable */
+	int auto_wakeup_interval;/* timeout seconds to auto wakeup system */
+	int auto_wakeup_screen_invert;/* auto wakeup system, 1: enable, 0: disable */
+	int auto_off_screen_interval;/* timeout seconds to auto turn off screen */
 };
 
 #endif

commit 1b3009debef44d7904f509dd74d65ffcf15d23e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 16:16:37 2019 +0800

    power: charge animation: add leds support
    
    It supports charging and charging-full leds which
    depends on soc value.
    
    Change-Id: I6b37919c5bedf9b81d388853996cf83c6f75a73a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index eac327c61d..1b90421f00 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <led.h>
 #include <rtc.h>
 #include <pwm.h>
 #include <asm/arch/rockchip_smccc.h>
@@ -34,6 +35,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMAGE_SHOW_RESET			-1
 #define FUEL_GAUGE_POLL_MS			1000
 
+#define LED_CHARGING_NAME			"battery_charging"
+#define LED_CHARGING_FULL_NAME			"battery_full"
+
 struct charge_image {
 	const char *name;
 	int soc;
@@ -44,6 +48,10 @@ struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
 	struct udevice *rtc;
+#ifdef CONFIG_LED
+	struct udevice *led_charging;
+	struct udevice *led_full;
+#endif
 	const struct charge_image *image;
 	int image_num;
 
@@ -259,6 +267,43 @@ static void charge_show_bmp(const char *name) {}
 static void charge_show_logo(void) {}
 #endif
 
+#ifdef CONFIG_LED
+static int leds_update(struct udevice *dev, int soc)
+{
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	static int old_soc = -1;
+	int ret, ledst;
+
+	if (old_soc == soc)
+		return 0;
+
+	old_soc = soc;
+	if (priv->led_charging) {
+		ledst = (soc < 100) ? LEDST_ON : LEDST_OFF;
+		ret = led_set_state(priv->led_charging, ledst);
+		if (ret) {
+			printf("set charging led %s failed, ret=%d\n",
+			       (ledst == LEDST_ON) ? "ON" : "OFF", ret);
+			return ret;
+		}
+	}
+
+	if (priv->led_full) {
+		ledst = (soc == 100) ? LEDST_ON : LEDST_OFF;
+		ret = led_set_state(priv->led_full, ledst);
+		if (ret) {
+			printf("set charging full led %s failed, ret=%d\n",
+			       ledst == LEDST_ON ? "ON" : "OFF", ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+#else
+static int leds_update(struct udevice *dev, int soc) { return 0; }
+#endif
+
 static int charge_extrem_low_power(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -267,6 +312,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 	struct udevice *fg = priv->fg;
 	int voltage, soc, charging = 1;
 	static int timer_initialized;
+	int ret;
 
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0)
@@ -303,6 +349,11 @@ static int charge_extrem_low_power(struct udevice *dev)
 			continue;
 		}
 
+		/* Update led */
+		ret = leds_update(dev, soc);
+		if (ret)
+			printf("update led failed: %d\n", ret);
+
 		printf("Extrem low power, force charging... threshold=%dmv, now=%dmv\n",
 		       pdata->low_power_voltage, voltage);
 
@@ -504,6 +555,11 @@ show_images:
 			       current, charging, screen_on);
 		}
 
+		/* Update leds */
+		ret = leds_update(dev, soc);
+		if (ret)
+			printf("update led failed: %d\n", ret);
+
 		/*
 		 * If ever lowpower screen off, force screen_on=false, which
 		 * means key event can't modify screen_on, only voltage higher
@@ -730,6 +786,16 @@ static int charge_animation_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	/* Get leds */
+#ifdef CONFIG_LED
+	ret = led_get_by_label(LED_CHARGING_NAME, &priv->led_charging);
+	if (!ret)
+		printf("Found Charging LED\n");
+	ret = led_get_by_label(LED_CHARGING_FULL_NAME, &priv->led_full);
+	if (!ret)
+		printf("Found Charging-Full LED\n");
+#endif
+
 	/* Get charge images */
 	priv->image = image;
 	priv->image_num = ARRAY_SIZE(image);

commit 0023d94b4b4c60ffb8c6c01cac46d5fbeab0b1f9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 21 16:54:05 2019 +0800

    arm: dts: rk3399pro-npu-evb: remove unused node
    
    Change-Id: Ib8ee8e69b6fb92038ad6fb7cd6bf5eac456bb1d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399pro-npu-evb.dts b/arch/arm/dts/rk3399pro-npu-evb.dts
index 939baf5842..752ed00a85 100644
--- a/arch/arm/dts/rk3399pro-npu-evb.dts
+++ b/arch/arm/dts/rk3399pro-npu-evb.dts
@@ -6,7 +6,6 @@
 
 /dts-v1/;
 #include "rk1808.dtsi"
-#include "rk1808-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 #include <linux/media-bus-format.h>
 
@@ -23,36 +22,26 @@
 		compatible = "ramdisk-readonly";
 		status = "okay";
 	};
+};
 
-	xin24m: xin24m {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-		clock-output-names = "xin24m";
-	};
+&dmc {
+	u-boot,dm-pre-reloc;
 };
 
-&emmc {
-	fifo-mode;
-	bus-width = <8>;
-	cap-mmc-highspeed;
-	supports-emmc;
-	disable-wp;
-	non-removable;
-	num-slots = <1>;
+&cru {
+	u-boot,dm-pre-reloc;
+};
 
-	status = "okay";
+&grf {
+	u-boot,dm-pre-reloc;
 };
 
-&sdmmc {
-	supports-sd;
-	status = "disabled";
+&pmugrf {
+	u-boot,dm-pre-reloc;
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
-	clocks = <&xin24m>, <&xin24m>;
-	clock-names = "baudclk", "apb_pclk";
-
 	status = "okay";
 };

commit b1d40cc9b72c260960a3ab8c9013bc8dec4ea766
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 22 10:53:46 2019 +0800

    configs: rk3399pro-npu: remove unused modules
    
    Change-Id: I4ca66fab70b042e407805061950cc857bc51579a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index e0d6fab83e..7b59efdf56 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -2,9 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK1808=y
+CONFIG_COPROCESSOR_RK1808=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_COPROCESSOR_RK1808=y
 CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-npu-evb"
 CONFIG_DEBUG_UART=y
@@ -19,6 +19,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTI is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -34,14 +35,12 @@ CONFIG_RANDOM_UUID=y
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_PART=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -53,7 +52,6 @@ CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 # CONFIG_MMC is not set
-CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_RAM=y

commit 73595a322aa5c9532c3202d400520316d42d2ae5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 22 10:53:17 2019 +0800

    rockchip: rk1808: select GICV3 if !COPROCESSOR_RK1808
    
    Change-Id: Id2593e1172e02c8a8aa296efd43bc7e6c1e0d88d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8cb2a4c10d..11402c8b42 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -358,7 +358,7 @@ config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
 	select ARM_SMCCC
-	select GICV3
+	select GICV3 if !COPROCESSOR_RK1808
 	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual

commit 2549364d441deeb8557bd34754384657a088f6ab
Author: lanshh <lsh@rock-chips.com>
Date:   Thu Feb 21 15:28:16 2019 +0800

    rockchip: board: set macaddr from vendor storage
    
    Change-Id: Ic80a036977fb67fb22892664d9c69ac7a38704de
    Signed-off-by: lanshh <lsh@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 1130dc46a6..2244eaffef 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -50,6 +50,22 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CPUID_LEN       0x10
 #define CPUID_OFF       0x7
 
+static int rockchip_set_ethaddr(void)
+{
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	int ret;
+	u8 ethaddr[ARP_HLEN];
+	char buf[ARP_HLEN_ASCII + 1];
+
+	ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr));
+	if (ret > 0 && is_valid_ethaddr(ethaddr)) {
+		sprintf(buf, "%pM", ethaddr);
+		env_set("ethaddr", buf);
+	}
+#endif
+	return 0;
+}
+
 static int rockchip_set_serialno(void)
 {
 	char serialno_str[VENDOR_SN_MAX];
@@ -137,6 +153,7 @@ __weak int set_armclk_rate(void)
 
 int board_late_init(void)
 {
+	rockchip_set_ethaddr();
 	rockchip_set_serialno();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();

commit 8b436ce576efdf257ebd79c2b3ded29790c0aecc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Feb 5 03:00:55 2019 +0800

    power: charge animation: add rtc alarm check
    
    Under the charging interface,if the rtc alarm is
    triggered, boot on the system.
    
    Change-Id: I6a921bd5c6971c45b02b2be84d9d6d79e9b17a36
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 9d147de49a..eac327c61d 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <rtc.h>
 #include <pwm.h>
 #include <asm/arch/rockchip_smccc.h>
 #include <asm/suspend.h>
@@ -42,6 +43,7 @@ struct charge_image {
 struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
+	struct udevice *rtc;
 	const struct charge_image *image;
 	int image_num;
 
@@ -112,7 +114,16 @@ static int check_key_press(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	u32 state;
+	u32 state, rtc_state = 0;
+
+#ifdef CONFIG_DM_RTC
+	if (priv->rtc)
+		rtc_state = rtc_alarm_trigger(priv->rtc);
+#endif
+	if (rtc_state) {
+		printf("rtc alarm trigger...\n");
+		return KEY_PRESS_LONG_DOWN;
+	}
 
 	state = key_read(KEY_POWER);
 	if (state < 0)
@@ -671,7 +682,7 @@ static const struct dm_charge_display_ops charge_animation_ops = {
 static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	struct udevice *fg, *pmic;
+	struct udevice *fg, *pmic, *rtc;
 	int ret, soc;
 
 	/* Get PMIC: used for power off system  */
@@ -696,6 +707,16 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->fg = fg;
 
+	/* Get rtc: used for power on */
+	ret = uclass_get_device(UCLASS_RTC, 0, &rtc);
+	if (ret) {
+		if (ret == -ENODEV)
+			debug("Can't find RTC\n");
+		else
+			debug("Get UCLASS RTC failed: %d\n", ret);
+	}
+	priv->rtc = rtc;
+
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
 	if (key_read(KEY_POWER) == KEY_NOT_EXIST) {
 		debug("Can't find power key\n");

commit 47bc0dad56f5a93b28a4a644068fb9424cfc5975
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Feb 5 02:59:49 2019 +0800

    rtc: add rk8xx rtc support
    
    support rtc alarm interrupt and alarm trigger power up.
    
    Change-Id: I7752f173d524f579b57b862d2788296ab1486c14
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index d7ae6caa17..02ea363e1a 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -37,6 +37,11 @@ static const struct pmic_child_info power_key_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info rtc_info[] = {
+	{ .prefix = "rtc", .driver = "rk8xx_rtc"},
+	{ },
+};
+
 static const struct pmic_child_info fuel_gauge_info[] = {
 	{ .prefix = "battery", .driver = "rk818_fg"},
 	{ .prefix = "battery", .driver = "rk817_fg"},
@@ -147,6 +152,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, rtc_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	children = pmic_bind_children(dev, dev->node, fuel_gauge_info);
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index d06130c7a2..81f81e68be 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -30,4 +30,10 @@ config RTC_DS1307
 	  Support for Dallas Semiconductor (now Maxim) DS1307 and DS1338/9 and
 	  compatible Real Time Clock devices.
 
+config RTC_RK8XX
+	bool "Enable RK808/RK818/RK805/816/817 rtc support"
+	depends on DM_RTC && PMIC_RK8XX
+	help
+	  This adds a driver for the RK808/RK818/RK805/816/817 rtc support.
+
 endmenu
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 003e31aeba..c129d90ded 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
 obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
 obj-$(CONFIG_RTC_PL031) += pl031.o
 obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
+obj-$(CONFIG_RTC_RK8XX) += rk8xx_rtc.o
 obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
 obj-$(CONFIG_RTC_RV3029) += rv3029.o
 obj-$(CONFIG_RTC_RX8025) += rx8025.o
diff --git a/drivers/rtc/rk8xx_rtc.c b/drivers/rtc/rk8xx_rtc.c
new file mode 100644
index 0000000000..7d9152a889
--- /dev/null
+++ b/drivers/rtc/rk8xx_rtc.c
@@ -0,0 +1,232 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+#include <irq-generic.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+#include <rtc.h>
+
+#define	RK817_INT_STS_REG0	0xf8
+#define	RK817_INT_MSK_REG0	0xf9
+
+#define	RK816_INT_STS_REG2	0x4c
+#define	RK816_INT_MSK_REG2	0x4d
+
+#define	RK808_INT_STS_REG1	0x4c
+#define	RK808_INT_MSK_REG1	0x4d
+
+#define	RK805_INT_STS_REG	0x4c
+#define	RK805_INT_MSK_REG	0x4d
+
+#define RK808_RTC_CTRL_REG	0x10
+#define RK808_RTC_STATUS_REG	0x11
+#define RK808_RTC_INT_REG	0x12
+
+#define RK817_RTC_CTRL_REG	0x0d
+#define RK817_RTC_STATUS_REG	0x0e
+#define RK817_RTC_INT_REG	0x0f
+
+#define RTC_ALARM_EN		5
+#define RTC_ALARM_STATUS	BIT(6)
+
+struct rk8xx_rtc_priv {
+	u8 rtc_int_sts_reg;
+	u8 rtc_int_msk_reg;
+	u8 int_sts_reg;
+	u8 int_msk_reg;
+	int rtc_alarm_trigger;
+	int irq_is_busy;
+};
+
+static void rtc_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	int ret, val;
+
+	debug("%s: irq = %d\n", __func__, irq);
+
+	if (priv->rtc_int_sts_reg) {
+		val = pmic_reg_read(dev->parent, priv->rtc_int_sts_reg);
+		if (val < 0) {
+			printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, val);
+			return;
+		}
+
+		if (val & RTC_ALARM_STATUS) {
+			priv->rtc_alarm_trigger = 1;
+			printf("RTC: alarm interrupt\n");
+		}
+
+		ret = pmic_reg_write(dev->parent,
+				     priv->rtc_int_sts_reg, 0xfe);
+		if (ret < 0) {
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, ret);
+			return;
+		}
+	}
+
+	ret = pmic_reg_write(dev->parent,
+			     priv->int_sts_reg, 0xff);
+	if (ret < 0) {
+		printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_sts_reg, ret);
+		return;
+	}
+	debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->int_sts_reg,
+	      pmic_reg_read(dev->parent, priv->int_sts_reg));
+}
+
+static int rtc_interrupt_init(struct udevice *dev)
+{
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	u32 interrupt[2], phandle;
+	int irq, ret;
+
+	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
+	if (phandle < 0) {
+		printf("failed get 'interrupt-parent', ret=%d\n", phandle);
+		return phandle;
+	}
+
+	ret = dev_read_u32_array(dev->parent, "interrupts", interrupt, 2);
+	if (ret) {
+		printf("failed get 'interrupt', ret=%d\n", ret);
+		return ret;
+	}
+
+	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
+	if (irq < 0) {
+		if (irq == -EBUSY) {
+			priv->irq_is_busy = 1;
+			return 0;
+		}
+		return irq;
+	}
+	irq_install_handler(irq, rtc_irq_handler, dev);
+	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+	irq_handler_enable(irq);
+
+	return 0;
+}
+
+static int rk8xx_rtc_alarm_trigger(struct udevice *dev)
+{
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	int val, ret, alarm_trigger = 0;
+
+	if (priv->irq_is_busy) {
+		val = pmic_reg_read(dev->parent, priv->rtc_int_sts_reg);
+		if (val < 0) {
+			printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, val);
+			return val;
+		}
+		if (val & RTC_ALARM_STATUS) {
+			alarm_trigger = 1;
+			printf("rtc alarm interrupt\n");
+		}
+		ret = pmic_reg_write(dev->parent,
+				     priv->rtc_int_sts_reg, 0xfe);
+		if (ret < 0) {
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, priv->rtc_int_sts_reg, ret);
+			return ret;
+		}
+		return alarm_trigger;
+	} else {
+		return priv->rtc_alarm_trigger;
+	}
+}
+
+static struct rtc_ops rk8xx_rtc_ops = {
+	.alarm_trigger = rk8xx_rtc_alarm_trigger,
+};
+
+static int rk8xx_rtc_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct rk8xx_rtc_priv *priv = dev_get_priv(dev);
+	int ret, val;
+
+	priv->rtc_int_sts_reg = RK808_RTC_STATUS_REG;
+	priv->rtc_int_msk_reg = RK808_RTC_INT_REG;
+	switch (rk8xx->variant) {
+	case RK808_ID:
+	case RK818_ID:
+		priv->int_msk_reg = RK808_INT_MSK_REG1;
+		priv->int_sts_reg = RK808_INT_STS_REG1;
+		break;
+	case RK805_ID:
+		priv->int_msk_reg = RK805_INT_MSK_REG;
+		priv->int_sts_reg = RK805_INT_STS_REG;
+		break;
+	case RK816_ID:
+		priv->int_msk_reg = RK816_INT_MSK_REG2;
+		priv->int_sts_reg = RK816_INT_STS_REG2;
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		priv->rtc_int_sts_reg = RK817_RTC_STATUS_REG;
+		priv->rtc_int_msk_reg = RK817_RTC_INT_REG;
+		priv->int_msk_reg = RK817_INT_MSK_REG0;
+		priv->int_sts_reg = RK817_INT_STS_REG0;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	priv->rtc_alarm_trigger = 0;
+	priv->irq_is_busy = 0;
+	/* mask and clear interrupt */
+	val = pmic_reg_read(dev->parent, priv->int_msk_reg);
+	if (val < 0) {
+		printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_msk_reg, val);
+		return val;
+	}
+	ret = pmic_reg_write(dev->parent,
+			     priv->int_msk_reg, val | 0xc1);
+	if (ret < 0) {
+		printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_msk_reg, ret);
+		return ret;
+	}
+	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
+	if (val < 0) {
+		printf("%s: i2c read reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_sts_reg, val);
+		return val;
+	}
+	ret = pmic_reg_write(dev->parent,
+			     priv->int_sts_reg,
+			     val | (1 << RTC_ALARM_EN));
+	if (ret < 0) {
+		printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+		       __func__, priv->int_sts_reg, ret);
+		return ret;
+	}
+	debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->int_msk_reg,
+	      pmic_reg_read(dev->parent, priv->int_msk_reg));
+	debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->int_sts_reg,
+	      pmic_reg_read(dev->parent, priv->int_sts_reg));
+
+	return rtc_interrupt_init(dev);
+}
+
+U_BOOT_DRIVER(rk8xx_rtc) = {
+	.name   = "rk8xx_rtc",
+	.id     = UCLASS_RTC,
+	.probe  = rk8xx_rtc_probe,
+	.ops	= &rk8xx_rtc_ops,
+	.priv_auto_alloc_size = sizeof(struct rk8xx_rtc_priv),
+};
diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c
index 89312c51ff..38e6b73839 100644
--- a/drivers/rtc/rtc-uclass.c
+++ b/drivers/rtc/rtc-uclass.c
@@ -120,6 +120,16 @@ int rtc_write32(struct udevice *dev, unsigned int reg, u32 value)
 	return 0;
 }
 
+int rtc_alarm_trigger(struct udevice *dev)
+{
+	const struct rtc_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->alarm_trigger)
+		return 0;
+
+	return ops->alarm_trigger(dev);
+}
+
 UCLASS_DRIVER(rtc) = {
 	.name		= "rtc",
 	.id		= UCLASS_RTC,
diff --git a/include/rtc.h b/include/rtc.h
index 49142b6e18..e429c7899f 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -72,6 +72,13 @@ struct rtc_ops {
 	* @return 0 if OK, -ve on error
 	*/
 	int (*write8)(struct udevice *dev, unsigned int reg, int val);
+
+	/**
+	 * alarm_trigger()
+	 * @dev:		Device to write to
+	 * @return 1 if rtc alarm trigger boot on
+	 */
+	int (*alarm_trigger)(struct udevice *dev);
 };
 
 /* Access the operations for an RTC device */
@@ -167,6 +174,13 @@ int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep);
  */
 int rtc_write32(struct udevice *dev, unsigned int reg, u32 value);
 
+/**
+ * rtc_alarm_trigger()
+ *
+ * @dev:	Device to write to
+ * @return 1 if rtc alarm trigger boot on
+ */
+int rtc_alarm_trigger(struct udevice *dev);
 #else
 int rtc_get (struct rtc_time *);
 int rtc_set (struct rtc_time *);

commit 8696cc387516eca1bf061458d593868dcc1fc20b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 11:10:52 2019 +0800

    irq: add irq busy validation
    
    return -EBUSY when this irq is occupied.
    
    Change-Id: I75ad6c0b13e167762cab2b8f9a2b786e588b2ade
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index b4362e9d77..7fffacff6b 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -64,6 +64,11 @@ void _do_generic_irq_handler(void)
 	gic_irq_chip->irq_eoi(irq);
 }
 
+int irq_is_busy(int irq)
+{
+	return (irq >= 0 && irqs_desc[irq].handle_irq) ? -EBUSY : 0;
+}
+
 static int chip_irq_bad(struct irq_chip *chip)
 {
 	if (!chip->name ||
diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index c1529ef62d..c8bc722d8a 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -57,6 +57,7 @@ static int gpio_is_valid(u32 gpio)
 static int _hard_gpio_to_irq(u32 gpio)
 {
 	int idx, bank = 0, pin = 0;
+	int irq;
 
 	if (!gpio_is_valid(gpio))
 		return -EINVAL;
@@ -65,8 +66,12 @@ static int _hard_gpio_to_irq(u32 gpio)
 	pin = (gpio & GPIO_PIN_MASK) >> GPIO_PIN_OFFSET;
 
 	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
-		if (gpio_banks[idx].id == bank)
-			return (gpio_banks[idx].irq_base + pin);
+		if (gpio_banks[idx].id == bank) {
+			irq = (gpio_banks[idx].irq_base + pin);
+			if (irq_is_busy(irq))
+				return -EBUSY;
+			return irq;
+		}
 	}
 
 	return -EINVAL;
diff --git a/include/irq-generic.h b/include/irq-generic.h
index eaa7331686..62e611b33d 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -69,6 +69,7 @@ int irq_handler_disable(int irq);
 int irq_get_gpio_level(int irq);
 int irqs_suspend(void);
 int irqs_resume(void);
+int irq_is_busy(int irq);
 int gpio_to_irq(struct gpio_desc *gpio);
 
 /*

commit 0a53d515e64d3f82c23f3fc7c84e5f630e1aa7a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 20 20:14:25 2019 +0800

    lib: initcall: add system total boot time debug
    
    Change-Id: I3d4cd151acf699b25c9caab0452e40fddb6c31e1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index 58b72b01e6..888dc367ae 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -702,8 +702,6 @@ static int initf_bootstage(void)
 			IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
 	int ret;
 
-	gd->sys_start_tick = get_ticks();
-
 	ret = bootstage_init(!from_spl);
 	if (ret)
 		return ret;
diff --git a/lib/initcall.c b/lib/initcall.c
index 73c72cf1a5..6a625ad24e 100644
--- a/lib/initcall.c
+++ b/lib/initcall.c
@@ -10,7 +10,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define SYS_TICKS_TO_US(ticks)	 ((ticks) / (COUNTER_FREQUENCY / 1000000))
+#define TICKS_TO_US(ticks)	((ticks) / (COUNTER_FREQUENCY / 1000000))
+#define US_TO_MS(ticks)		((ticks) / 1000)
+#define US_TO_US(ticks)		((ticks) % 1000)
 
 #ifdef DEBUG
 static inline void call_get_ticks(ulong *ticks) { *ticks = get_ticks(); }
@@ -21,7 +23,10 @@ static inline void call_get_ticks(ulong *ticks) { }
 int initcall_run_list(const init_fnc_t init_sequence[])
 {
 	const init_fnc_t *init_fnc_ptr;
-	__maybe_unused ulong start = 0, end = 0;
+	ulong start = 0, end = 0, sum = 0;
+
+	if (!gd->sys_start_tick)
+		gd->sys_start_tick = get_ticks();
 
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
 		unsigned long reloc_ofs = 0;
@@ -40,8 +45,12 @@ int initcall_run_list(const init_fnc_t init_sequence[])
 		call_get_ticks(&start);
 		ret = (*init_fnc_ptr)();
 		call_get_ticks(&end);
-		if (start != end)
-			debug("\t\t\t\t\t\t\t\t#%6ld us\n", SYS_TICKS_TO_US(end - start));
+
+		if (start != end) {
+			sum = TICKS_TO_US(end - gd->sys_start_tick);
+			debug("\t\t\t\t\t\t\t\t#%8ld us #%4ld.%3ld ms\n",
+			      TICKS_TO_US(end - start), US_TO_MS(sum), US_TO_US(sum));
+		}
 		if (ret) {
 			printf("initcall sequence %p failed at call %p (err=%d)\n",
 			       init_sequence,

commit 79d3f33751d70d2a6a1ad2187d835a332d7a5a53
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 15:54:53 2019 +0800

    irq: gic v2/v3: support set target cpu by mpidr dynamiclly
    
    Change-Id: I4a45ad1d81ab9b2e8ae958e6307030200bb405f1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 95491e1b56..4be2f2c158 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <common.h>
 #include <asm/io.h>
 #include <asm/gic.h>
 #include <config.h>
@@ -15,6 +16,9 @@
 #define gicd_writel(v, offset)	writel(v, (void *)GICD_BASE + (offset))
 #define gicc_writel(v, offset)	writel(v, (void *)GICC_BASE + (offset))
 
+/* 64-bit write */
+#define gicd_writeq(v, offset)	writeq(v, (void *)GICD_BASE + (offset))
+
 #define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
 #define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
 #define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
@@ -22,6 +26,14 @@
 #define IRQ_REG_X16_OFFSET(irq)	((irq) % 16)
 #define IRQ_REG_X32_OFFSET(irq)	((irq) % 32)
 
+#define MPIDR_CPU_MASK		0xff
+
+#define IROUTER_IRM_SHIFT	31
+#define IROUTER_IRM_MASK	0x1
+#define gicd_irouter_val_from_mpidr(mpidr, irm)		\
+	((mpidr & ~(0xff << 24)) |			\
+	 (irm & IROUTER_IRM_MASK) << IROUTER_IRM_SHIFT)
+
 typedef enum INT_TRIG {
 	INT_LEVEL_TRIGGER,
 	INT_EDGE_TRIGGER
@@ -45,27 +57,6 @@ struct gic_cpu_data {
 static struct gic_dist_data gicd_save;
 static struct gic_cpu_data gicc_save;
 
-__maybe_unused static u8 g_gic_cpumask = 0x01;
-
-__maybe_unused static u32 gic_get_cpumask(void)
-{
-	u32 mask = 0, i;
-
-	for (i = mask = 0; i < 32; i += 4) {
-		mask = gicd_readl(GICD_ITARGETSRn + 4 * i);
-		mask |= mask >> 16;
-		mask |= mask >> 8;
-		if (mask)
-			break;
-	}
-
-	if (!mask)
-		printf("GIC CPU mask not found.\n");
-
-	debug("GIC CPU mask = 0x%08x\n", mask);
-	return mask;
-}
-
 static inline void int_set_prio_filter(u32 priority)
 {
 	gicc_writel(priority & 0xff, GICC_PMR);
@@ -145,7 +136,7 @@ static int gic_irq_set_trigger(int irq, eINT_TRIG trig)
 static int gic_irq_enable(int irq)
 {
 #ifdef CONFIG_GICV2
-	u32 val;
+	u32 val, cpu_mask;
 	u32 shift = (irq % 4) * 8;
 
 	if (irq >= PLATFORM_GIC_IRQS_NR)
@@ -156,19 +147,24 @@ static int gic_irq_enable(int irq)
 	val |= 1 << IRQ_REG_X32_OFFSET(irq);
 	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
 
-
 	/* set target */
+	cpu_mask = 1 << (read_mpidr() & MPIDR_CPU_MASK);
 	val = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
 	val &= ~(0xFF << shift);
-	val |= (g_gic_cpumask << shift);
+	val |= (cpu_mask << shift);
 	gicd_writel(val, GICD_ITARGETSRn + IRQ_REG_X4(irq));
-
 #else
 	u32 val;
+	u64 affinity_val;
 
+	/* set enable */
 	val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
 	val |= 1 << IRQ_REG_X32_OFFSET(irq);
 	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
+
+	/* set itouter(target) */
+	affinity_val = gicd_irouter_val_from_mpidr(read_mpidr(), 0);
+	gicd_writeq(affinity_val, GICD_IROUTERn + (irq << 3));
 #endif
 
 	return 0;
@@ -360,8 +356,6 @@ static int gic_irq_init(void)
 	int_enable_secure_signal();
 	int_enable_nosecure_signal();
 	int_enable_distributor();
-
-	g_gic_cpumask = gic_get_cpumask();
 #endif
 
 	return 0;

commit f2835bc289af9ef3158072e33bf13fa306f16f3a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 15:54:13 2019 +0800

    arm: asm: add read_mpidr() for 32-bit ARM
    
    Change-Id: I2556d589802d2290da129e03bb33ec11536119cd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index e2af2969e0..ac42cf80ca 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -405,6 +405,14 @@ static inline void set_dacr(unsigned int val)
 	isb();
 }
 
+static inline unsigned int read_mpidr(void)
+{
+	unsigned int mpidr;
+
+	asm volatile ("mrc p15, 0, %[mpidr], c0, c0, 5" : [mpidr] "=r" (mpidr));
+	return mpidr;
+}
+
 #ifdef CONFIG_ARMV7_LPAE
 /* Long-Descriptor Translation Table Level 1/2 Bits */
 #define TTB_SECT_XN_MASK	(1ULL << 54)

commit 595f057c4e84a39938ae345246bdfc1b8520debf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 19 12:58:20 2019 +0800

    lib: Kconfig: set SYS_STACK_SIZE 2MB size
    
    128KB maybe not enough at sometimes.
    
    Change-Id: I06746b98e005955d4b88904c04ed0af753db6acf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index ec9212de0b..0699984837 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -37,7 +37,7 @@ config SYS_HZ
 
 config SYS_STACK_SIZE
 	hex
-	default 0x20000
+	default 0x200000
 	help
 	 The system stack size.
 
@@ -316,5 +316,4 @@ source lib/avb/libavb_atx/Kconfig
 source lib/avb/libavb_user/Kconfig
 source lib/avb/rk_avb_user/Kconfig
 source lib/optee_clientApi/Kconfig
-
 endmenu

commit ba70cc538e6f964b9109152b83125bcd50ef087a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 19:23:28 2019 +0800

    rockchip: boot_mode: fix enter recovery mode failed
    
    enter recovery mode when recovery key is pressed but usb is absent.
    
    Change-Id: I4e29d657e6c42f04db1076a2eaed23974e375404
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index daccbcf587..a738bfd79c 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -145,14 +145,18 @@ void rockchip_dnl_mode_check(void)
 			/* If there is no recovery partition, just boot on */
 			struct blk_desc *dev_desc;
 			disk_partition_t part_info;
+			int ret;
 
 			dev_desc = rockchip_get_bootdev();
 			if (!dev_desc) {
 				printf("%s: dev_desc is NULL!\n", __func__);
 				return;
 			}
-			if (part_get_info_by_name(dev_desc, PART_RECOVERY,
-						  &part_info)) {
+
+			ret = part_get_info_by_name(dev_desc,
+						    PART_RECOVERY,
+						    &part_info);
+			if (ret < 0) {
 				debug("%s: no recovery partition\n", __func__);
 				return;
 			}

commit 75d7f9972ba6d2aa0291785471d214c92807cd61
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Jan 24 15:33:35 2019 +0800

    common: write keybox: write Playready SL3000 root key to secure storage
    
    Change-Id: Ia202f7f81c7c618e7d6fc8ecb28ceb8a65157a1c
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 91a8b4e736..54f73f0f3e 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -16,6 +16,7 @@
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
 #define	ATTESTATION_TAG	"ATTE"
+#define PLAYREADY30_TAG	"SL30"
 
 uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      TEEC_UUID uuid,
@@ -149,7 +150,23 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			rc = -EIO;
 			printf("write attestation key to secure storage fail\n");
 		}
+	} else if (memcmp(received_data, PLAYREADY30_TAG, 4) == 0) {
+		/* PlayReady SL3000 root key */
+		uint32_t ret;
+
+		data_size = *(received_data + 4);
+		ret = write_to_keymaster((uint8_t *)"PlayReady_SL3000",
+					 sizeof("PlayReady_SL3000"),
+					 received_data + 8, data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write PlayReady SL3000 root key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write PlayReady SL3000 root key to secure storage fail\n");
+		}
 	}
+
 	/* write all data to secure storage for readback check */
 	if (!rc) {
 		uint32_t ret;

commit b68be486b3f753dfd38b304cdf2f4e8c1b8a4a19
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 25 09:01:35 2019 +0800

    cmd: optee: remove write data to efuse
    
    Preventing customer misoperation causing efuse unused.
    
    Change-Id: Ie0fc3e5d73fb005d73beb0c035580ca13b9b3ba1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index a853d97e4d..f802f6b9e1 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -168,20 +168,8 @@ static int do_mmc_test_secure_storage(cmd_tbl_t *cmdtp,
 static int do_mmc_testefuse(cmd_tbl_t *cmdtp,
 		int flag, int argc, char * const argv[])
 {
-	uint32_t buf32[8];
 	uint32_t outbuf32[8];
 
-	buf32[0] = 0x01020304;
-	buf32[1] = 0x05060708;
-	buf32[2] = 0x090a0b0c;
-	buf32[3] = 0x0d0e0f10;
-	buf32[4] = 0x11121314;
-	buf32[5] = 0x15161718;
-	buf32[6] = 0x191a1b1c;
-	buf32[7] = 0x1d1e1f20;
-
-	trusty_write_attribute_hash(buf32, 8);
-
 	trusty_read_attribute_hash(outbuf32, 8);
 
 	printf(" 0x%x  0x%x  0x%x  0x%x \n",

commit af5a20123463b447fd35ae438828df990208d9c3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Feb 12 15:29:38 2019 +0800

    usb: gadget: rockusb: test IF_TYPE_SD when read capacity
    
    Since the sd card is similar to mmc device.
    
    Change-Id: Ifb21a58f96f806388f5e2bb50b607678fce0d97b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index f85b5b75f8..39e0a30c3a 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -467,7 +467,7 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	 * bit[5:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
-	if (type == IF_TYPE_MMC)
+	if (type == IF_TYPE_MMC || type == IF_TYPE_SD)
 		buf[0] = BIT(0) | BIT(2) | BIT(4);
 	else
 		buf[0] = BIT(0) | BIT(4);

commit 8a127f59e0ceb1970f6cad34b85439fce4094dd6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 26 12:02:06 2019 +0800

    common: rkimg: skip ramdisk and fdt relocation
    
    It saves boot time and make final load address is where we expect.
    
    Change-Id: I1e7c3bba48c9b318e7016bf15acf0a3bc8047cb3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index acd27024f1..0d48232e3e 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -425,6 +425,25 @@ fallback:
 	return boot_mode;
 }
 
+static void fdt_ramdisk_skip_relocation(void)
+{
+	char *ramdisk_high = env_get("initrd_high");
+	char *fdt_high = env_get("fdt_high");
+
+	if (!fdt_high) {
+		env_set_hex("fdt_high", -1UL);
+		printf("Fdt ");
+	}
+
+	if (!ramdisk_high) {
+		env_set_hex("initrd_high", -1UL);
+		printf("Ramdisk ");
+	}
+
+	if (!fdt_high || !ramdisk_high)
+		printf("skip relocation\n");
+}
+
 int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 {
 	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
@@ -485,6 +504,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 
+	fdt_ramdisk_skip_relocation();
 	sysmem_dump_check();
 
 #if defined(CONFIG_ARM64)

commit cf0aae68390104bafe919ec6f2d5c344119e0937
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Feb 19 08:46:14 2019 +0800

    video/drm: rk618_lvds: Add support for MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA bus format
    
    Change-Id: I12480932e3f5fa6ea1dc4684be697989eff304fc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rk618_lvds.c b/drivers/video/drm/rk618_lvds.c
index ad1e35979d..4584147325 100644
--- a/drivers/video/drm/rk618_lvds.c
+++ b/drivers/video/drm/rk618_lvds.c
@@ -44,17 +44,18 @@ static void rk618_lvds_bridge_enable(struct rockchip_bridge *bridge)
 	rk618_frc_dclk_invert(priv->parent);
 
 	switch (panel->bus_format) {
-	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:	/* jeida-18 */
 		format = LVDS_6BIT_MODE;
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
 		format = LVDS_8BIT_MODE_FORMAT_2;
 		break;
-	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
-		format = LVDS_8BIT_MODE_FORMAT_1;
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* vesa-18 */
+		format = LVDS_8BIT_MODE_FORMAT_3;
 		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
 	default:
-		format = LVDS_8BIT_MODE_FORMAT_3;
+		format = LVDS_8BIT_MODE_FORMAT_1;
 		break;
 	}
 

commit 9c5e1148eced9edc91e5226bbc26f715f2e4add6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:38:44 2019 +0800

    video/drm: vop: Add support lvds bus format
    
    Change-Id: I9674d3478d279f0e0fd47529f96d336c4027cd13
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 8113a4e395..c46b705cc9 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -339,6 +339,8 @@ static int rockchip_vop_init(struct display_state *state)
 		break;
 	case MEDIA_BUS_FMT_RGB666_1X18:
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
+	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:
 		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666);
 		break;
 	case MEDIA_BUS_FMT_YUV8_1X24:
@@ -350,6 +352,8 @@ static int rockchip_vop_init(struct display_state *state)
 		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 	default:
 		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
 		break;

commit 4888f8a48ab3553e384a7696c98b863ca15bbad6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:27:46 2019 +0800

    video/drm: lvds: Add support for MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA bus format
    
    Change-Id: Id8b17e482036ce7c8eb543a673eb1b745958c7c3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index a29bf0a7f7..698a017158 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -100,12 +100,15 @@ static int rockchip_lvds_connector_init(struct display_state *state)
 	lvds->phy = conn_state->phy;
 
 	switch (panel->bus_format) {
-	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+	case MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA:	/* jeida-18 */
 		lvds->format = LVDS_6BIT_MODE;
 		break;
 	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
 		lvds->format = LVDS_8BIT_MODE_FORMAT_2;
 		break;
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* vesa-18 */
+		lvds->format = LVDS_8BIT_MODE_FORMAT_3;
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
 	default:
 		lvds->format = LVDS_8BIT_MODE_FORMAT_1;

commit cfb50d9acf53f8d5c833d9da69d239789c5ecdb6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:23:26 2019 +0800

    media: Add MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA media bus code definitions
    
    This patch adds a new RGB media bus formats that describe
    18-bit samples transferred over an LVDS bus with three
    differential data pairs, serialized into 7 time slots,
    using standard JEIDA data ordering.
    
    Change-Id: I54b674aa8b067452007de076010dbd6a3c7f4a52
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index 37ca603fe2..56265cf85b 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -34,7 +34,7 @@
 
 #define MEDIA_BUS_FMT_FIXED			0x0001
 
-/* RGB - next is	0x1018 */
+/* RGB - next is	0x101c */
 #define MEDIA_BUS_FMT_RGB444_1X12		0x1016
 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE	0x1001
 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE	0x1002
@@ -61,6 +61,7 @@
 #define MEDIA_BUS_FMT_RGB101010_1X30		0x1018
 #define MEDIA_BUS_FMT_RGB121212_1X36		0x1019
 #define MEDIA_BUS_FMT_RGB161616_1X48		0x101a
+#define MEDIA_BUS_FMT_RGB666_1X7X3_JEIDA	0x101b
 
 /* YUV (including grey) - next is	0x2026 */
 #define MEDIA_BUS_FMT_Y8_1X8			0x2001

commit 31018a86a8e54592f3733266e8e85df9ae7240db
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 18 17:07:11 2019 +0800

    video/drm: lvds: Correct P2S_EN register field on px30
    
    Change-Id: I464df20abe7a3fb1d1fb5f275a9c79a672008a96
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 4e81a3549d..a29bf0a7f7 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -27,7 +27,7 @@
 #define PX30_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
 #define PX30_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
 #define PX30_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
-#define PX30_LVDS_P2S_EN(x)		HIWORD_UPDATE(x, 10, 10)
+#define PX30_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  6,  6)
 #define PX30_LVDS_VOP_SEL(x)		HIWORD_UPDATE(x,  1,  1)
 
 #define RK3126_GRF_LVDS_CON0		0x0150

commit e7c5611148b57eb7f5d11a361e3c6230303d7359
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Feb 15 15:27:19 2019 +0800

    power: fuel gauge: fix rk818/rk816 gpio_desc null pointer issue
    
    Change-Id: I2289eed51eadb0b7b11e9c81d6154f27f138c97f
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 64b10f3cdd..0f0798ca92 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -153,7 +153,7 @@ struct battery_priv {
 	int		dts_cur_input;
 	int		dts_cur_sel;
 	int		max_soc_offset;
-	struct gpio_desc *dc_det;
+	struct gpio_desc dc_det;
 	int		dc_type;
 	int		dc_det_adc;
 	ulong		vol_mode_base;
@@ -946,7 +946,7 @@ static int rk816_bat_get_dc_state(struct battery_priv *di)
 		*/
 		return NO_CHARGER;
 	} else {
-		return (dm_gpio_get_value(di->dc_det)) ?
+		return (dm_gpio_get_value(&di->dc_det)) ?
 			DC_CHARGER : NO_CHARGER;
 	}
 }
@@ -1423,7 +1423,7 @@ static int rk816_fg_ofdata_to_platdata(struct udevice *dev)
 	di->dc_det_adc = dev_read_u32_default(dev, "dc_det_adc", 0);
 	if (di->dc_det_adc <= 0) {
 		if (!gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
-						0, di->dc_det, GPIOD_IS_IN)) {
+						0, &di->dc_det, GPIOD_IS_IN)) {
 			di->dc_type = DC_TYPE_OF_GPIO;
 		} else {
 			di->dc_type = DC_TYPE_OF_NONE;
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index b45388020a..d77a5341fb 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -203,7 +203,7 @@ struct battery_priv {
 	int		max_soc_offset;
 	int		sample_res;
 	int		res_div;
-	struct gpio_desc *dc_det;
+	struct gpio_desc dc_det;
 	int		dc_det_adc;
 	ulong		finish_chrg_base;
 	ulong		term_sig_base;
@@ -1232,7 +1232,7 @@ static int rk818_bat_get_dc_state(struct battery_priv *di)
 	if (!di->dc_is_valid)
 		return NO_CHARGER;
 
-	return dm_gpio_get_value(di->dc_det) ? DC_CHARGER : NO_CHARGER;
+	return dm_gpio_get_value(&di->dc_det) ? DC_CHARGER : NO_CHARGER;
 }
 
 static int rk818_bat_get_charger_type(struct battery_priv *di)
@@ -1821,7 +1821,7 @@ static int rk818_fg_ofdata_to_platdata(struct udevice *dev)
 				SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
 
 	ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
-					 0, di->dc_det, GPIOD_IS_IN);
+					 0, &di->dc_det, GPIOD_IS_IN);
 	if (!ret) {
 		di->dc_is_valid = 1;
 		debug("DC is valid\n");

commit 2c9d117912719dca97b8973eeed469b5fa5dce1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 29 21:22:38 2019 +0800

    sysmem: fdt: reserve more CONFIG_SYS_FDT_PAD size for fdt
    
    Sometimes, framework or user would call fdt_increase_size() to update
    fdt size, it's better reserve more space to avoid sysmem gives the fdt
    region overflow report.
    
    The CONFIG_SYS_FDT_PAD default value is sync with bootm framework
    in: common/image-fdt.c
    
    Change-Id: I363e9a4182e13b1628a76666acd8272d25db659d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 20d3c61c36..477aae70b2 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -648,7 +648,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 		return size;
 
 	if (!sysmem_alloc_base("fdt", (phys_addr_t)fdt_addr,
-			       ALIGN(size, RK_BLK_SIZE)))
+			       ALIGN(size, RK_BLK_SIZE) + CONFIG_SYS_FDT_PAD))
 		return -ENOMEM;
 
 	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index feec2fda13..af912f98de 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -811,9 +811,10 @@ int android_fdt_overlay_apply(void *fdt_addr)
 				fdt_totalsize((void *)fdt_dtbo);
 		if (sysmem_free((phys_addr_t)fdt_addr))
 			goto out;
+
 		if (!sysmem_alloc_base("fdt(dtbo)",
 				       (phys_addr_t)fdt_addr,
-					fdt_size))
+					fdt_size + CONFIG_SYS_FDT_PAD))
 			goto out;
 		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
 		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
diff --git a/common/image-android.c b/common/image-android.c
index e980f7eb6d..f37123efaa 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -349,7 +349,8 @@ static int android_image_load_separate(struct blk_desc *dev_desc,
 		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
 		if (!sysmem_alloc_base("fdt(AOSP)",
 				       fdt_addr_r,
-				       blk_cnt * dev_desc->blksz))
+				       blk_cnt * dev_desc->blksz +
+				       CONFIG_SYS_FDT_PAD))
 			return -ENXIO;
 
 		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
diff --git a/include/sysmem.h b/include/sysmem.h
index 308b8e2653..58de824968 100644
--- a/include/sysmem.h
+++ b/include/sysmem.h
@@ -13,6 +13,14 @@
 #undef	MAX_LMB_REGIONS
 #define	MAX_LMB_REGIONS			MAX_SYSMEM_REGIONS
 
+/*
+ * CONFIG_SYS_FDT_PAD default value is sync with bootm framework in:
+ * common/image-fdt.c
+ */
+#ifndef CONFIG_SYS_FDT_PAD
+#define CONFIG_SYS_FDT_PAD		0x3000
+#endif
+
 struct sysmem_property {
 	const char *name;
 	phys_addr_t base;
diff --git a/lib/sysmem.c b/lib/sysmem.c
index f44b78ca61..24bd4f91c9 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -373,7 +373,7 @@ int sysmem_free(phys_addr_t base)
 
 	ret = lmb_free(&sysmem->lmb, prop->base, prop->size);
 	if (ret >= 0) {
-		SYSMEM_I("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
+		SYSMEM_D("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
 			 prop->name, (ulong)prop->base, (ulong)prop->size);
 		sysmem->allocated_cnt--;
 		list_del(&prop->node);

commit d01ceddd38f3aecff8122c3fc4a88847c0bf12c7
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:46:08 2018 +0800

    configs: rk3328_defconfig: enable avb
    
    Change-Id: I1eb26f5f643e6ce5898e17a6a18ca6c37579e7c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index dbc6b370a7..998e53f9f9 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
@@ -120,4 +121,11 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 039b194e004ee0a427d9abe022ecb2c796eb21c8
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Feb 18 12:53:57 2019 +0800

    rockchip: dts: rv1108: add nandc node
    
    Change-Id: I1256b84cc40fc2836d301027b1c1ef25aa537ec4
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 5331c9a9ee..349e72a987 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -268,6 +268,16 @@
 		reg = <0x202a0000 0x1000>;
 	};
 
+	nandc: nandc@30100000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x30100000 0x1000>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	emmc: dwmmc@30110000 {
 		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
 		clock-freq-min-max = <400000 150000000>;

commit e72a66c380254d5fbc029605e6d597fe2d86f286
Author: Leo Wen <leo.wen@rock-chips.com>
Date:   Wed Feb 13 15:08:14 2019 +0800

    configs: evb-rk3326: disable CONFIG_FASTBOOT_OEM_UNLOCK
    
    Change-Id: I509a19819fa687cdc87148181865595380900aaa
    Signed-off-by: Leo Wen <leo.wen@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 7f0192c2bb..e9a9db9e24 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -29,7 +29,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_OEM_UNLOCK=y
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

commit db7863d082b058e1e569beaafc0ed6fa3fadb400
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 15 14:50:22 2019 +0800

    video/drm: lvds: Remove unused file
    
    Change-Id: If7398e132de477079a366e0b1df82b83856e9b05
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
deleted file mode 100644
index 2d56410478..0000000000
--- a/drivers/video/drm/rockchip_lvds.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _ROCKCHIP_LVDS_H_
-#define _ROCKCHIP_LVDS_H_
-
-#define LVDS_24BIT				(0 << 1)
-#define LVDS_18BIT				(1 << 1)
-#define LVDS_FORMAT_VESA			(0 << 0)
-#define LVDS_FORMAT_JEIDA			(1 << 0)
-
-#define DISPLAY_OUTPUT_LVDS		1
-#define DISPLAY_OUTPUT_DUAL_LVDS	2
-
-#endif

commit deebadb707945dabc9fd1bcb59e8723f3765177c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 16 14:33:57 2019 +0800

    cmd: fastboot: print mode state
    
    This avoids user misunderstanding the system is hang
    when enter fastboot mode without any warning message.
    
    Change-Id: Ie6238c825342c8e322b2a5be746e4bba020e1ec9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index ce5ac1e55b..67aa7b8d7b 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -25,6 +25,8 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
+	printf("Enter fastboot...");
+
 	if (!strcmp(argv[1], "udp")) {
 #ifndef CONFIG_UDP_FUNCTION_FASTBOOT
 		pr_err("Fastboot UDP not enabled\n");
@@ -41,6 +43,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	pr_err("Fastboot USB not enabled\n");
 	return -1;
 #else
+
 	usb_controller = argv[2];
 	controller_index = simple_strtoul(usb_controller, NULL, 0);
 
@@ -62,6 +65,8 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto exit;
 	}
 
+	printf("OK\n");
+
 	while (1) {
 		if (g_dnl_detach())
 			break;

commit 3befe43d907ef2b615f68ddeb032ba74e0375df1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 14 16:50:12 2019 +0800

    lib: sysmem: ignore sysmem reserve warning
    
    Change-Id: I970da1456388f825a351dc26d725bb3ba10d41a4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/sysmem.c b/lib/sysmem.c
index 705ba34771..f44b78ca61 100644
--- a/lib/sysmem.c
+++ b/lib/sysmem.c
@@ -218,7 +218,7 @@ int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size)
 			SYSMEM_E("Failed to double reserve for existence \"%s\"\n", name);
 			return -EEXIST;
 		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
-			SYSMEM_W("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
+			SYSMEM_D("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
 				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
 				 name, (ulong)base, (ulong)size, prop->name,
 				 (ulong)prop->base, (ulong)prop->size);

commit 1485a1b3384e1b38fd019ee6216e39218af6c6e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 18 11:49:10 2019 +0800

    common: boot rkimg: print boot mode
    
    Change-Id: I75ddae437315a148871756ef88ff03cdca0c301d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d6326ae933..acd27024f1 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -352,8 +352,10 @@ int rockchip_get_boot_mode(void)
 	 * USB attach will do env_set("reboot_mode", "recovery");
 	 */
 	env_reboot_mode = env_get("reboot_mode");
-	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery"))
+	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery")) {
 		boot_mode = BOOT_MODE_RECOVERY;
+		printf("boot mode: recovery\n");
+	}
 
 	if (boot_mode != -1)
 		return boot_mode;
@@ -383,6 +385,7 @@ fallback:
 	/* Mode from misc partition */
 	if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		boot_mode = BOOT_MODE_RECOVERY;
+		printf("boot mode: recovery\n");
 	} else {
 		/* Mode from boot mode register */
 		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);

commit 4faa6c1a351356fc6229b2c2cef9f572a73110e8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Feb 15 11:09:48 2019 +0800

    rockchip: px3se: extend SYS_MALLOC_F_LEN to 0x1000
    
    Change-Id: I5f57a15d50ac685dccfae462cfc9fbc30c07fe34
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index 43e453a914..f122ef935a 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_PX3SE=y
 CONFIG_RKIMG_BOOTLOADER=y

commit 1953e619473876f2a3732065877a2599a0b6e3b6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 31 10:07:23 2019 +0800

    video/drm: Sync MIPI DSI Bus helper from Linux 4.9
    
    This imports drivers/gpu/drm/drm_mipi_dsi.c from Linux kernel 4.9.
    It can be very helpful when porting Linux mipi dsi driver to U-Boot.
    
    DSI hosts expose operations which can be used by DSI peripheral drivers
    to access associated devices.
    
    Change-Id: Iccfa9d946f33458867f4d4db0ce04aeb1918e855
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 56a0ce3177..d2f5f0f998 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -13,7 +13,8 @@ menuconfig DRM_ROCKCHIP
 
 config DRM_ROCKCHIP_PANEL
 	bool "Rockchip Panel Support"
-	select DRM_ROCKCHIP_MIPI_DSI
+	depends on DRM_ROCKCHIP
+	select DRM_MIPI_DSI
 
 config DRM_ROCKCHIP_DW_HDMI
 	bool "Rockchip specific extensions for Synopsys DW HDMI"
@@ -52,13 +53,14 @@ config DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
 	  Enable this to support the Rockchip MIPI/LVDS/TTL PHY
 	  with Innosilicon IP block.
 
-config DRM_ROCKCHIP_MIPI_DSI
+config DRM_MIPI_DSI
 	bool
+	depends on DRM_ROCKCHIP
 
 config DRM_ROCKCHIP_DW_MIPI_DSI
 	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
 	depends on DRM_ROCKCHIP
-	select DRM_ROCKCHIP_MIPI_DSI
+	select DRM_MIPI_DSI
 	select DRM_ROCKCHIP_PANEL
 	help
 	 This selects support for Rockchip SoC specific extensions
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 1cb4c53d03..46ae58c942 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -7,7 +7,7 @@
 obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
-obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
+obj-$(CONFIG_DRM_MIPI_DSI) += drm_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
diff --git a/drivers/video/drm/drm_mipi_dsi.c b/drivers/video/drm/drm_mipi_dsi.c
new file mode 100644
index 0000000000..106f9f37c0
--- /dev/null
+++ b/drivers/video/drm/drm_mipi_dsi.c
@@ -0,0 +1,744 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Andrzej Hajda <a.hajda@samsung.com>
+ */
+
+#include <drm/drm_mipi_dsi.h>
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+	const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+	if (!ops || !ops->attach)
+		return -ENOSYS;
+
+	return ops->attach(dsi->host, dsi);
+}
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+	const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+	if (!ops || !ops->detach)
+		return -ENOSYS;
+
+	return ops->detach(dsi->host, dsi);
+}
+
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+					struct mipi_dsi_msg *msg)
+{
+	const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+	if (!ops || !ops->transfer)
+		return -ENOSYS;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+		msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+	return ops->transfer(dsi->host, msg);
+}
+
+/**
+ * mipi_dsi_packet_format_is_short - check if a packet is of the short format
+ * @type: MIPI DSI data type of the packet
+ *
+ * Return: true if the packet for the given data type is a short packet, false
+ * otherwise.
+ */
+bool mipi_dsi_packet_format_is_short(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_V_SYNC_START:
+	case MIPI_DSI_V_SYNC_END:
+	case MIPI_DSI_H_SYNC_START:
+	case MIPI_DSI_H_SYNC_END:
+	case MIPI_DSI_END_OF_TRANSMISSION:
+	case MIPI_DSI_COLOR_MODE_OFF:
+	case MIPI_DSI_COLOR_MODE_ON:
+	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
+	case MIPI_DSI_TURN_ON_PERIPHERAL:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_DCS_READ:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * mipi_dsi_packet_format_is_long - check if a packet is of the long format
+ * @type: MIPI DSI data type of the packet
+ *
+ * Return: true if the packet for the given data type is a long packet, false
+ * otherwise.
+ */
+bool mipi_dsi_packet_format_is_long(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_NULL_PACKET:
+	case MIPI_DSI_BLANKING_PACKET:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_30:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_36:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_18:
+	case MIPI_DSI_PIXEL_STREAM_3BYTE_18:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_24:
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * mipi_dsi_create_packet - create a packet from a message according to the
+ *	DSI protocol
+ * @packet: pointer to a DSI packet structure
+ * @msg: message to translate into a packet
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg)
+{
+	if (!packet || !msg)
+		return -EINVAL;
+
+	/* do some minimum sanity checking */
+	if (!mipi_dsi_packet_format_is_short(msg->type) &&
+	    !mipi_dsi_packet_format_is_long(msg->type))
+		return -EINVAL;
+
+	if (msg->channel > 3)
+		return -EINVAL;
+
+	memset(packet, 0, sizeof(*packet));
+	packet->header[0] = ((msg->channel & 0x3) << 6) | (msg->type & 0x3f);
+	if (mipi_dsi_packet_format_is_long(msg->type)) {
+		packet->header[1] = (msg->tx_len >> 0) & 0xff;
+		packet->header[2] = (msg->tx_len >> 8) & 0xff;
+
+		packet->payload_length = msg->tx_len;
+		packet->payload = msg->tx_buf;
+	} else {
+		const u8 *tx = msg->tx_buf;
+
+		packet->header[1] = (msg->tx_len > 0) ? tx[0] : 0;
+		packet->header[2] = (msg->tx_len > 1) ? tx[1] : 0;
+	}
+
+	packet->size = sizeof(packet->header) + packet->payload_length;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_shutdown_peripheral() - sends a Shutdown Peripheral command
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_SHUTDOWN_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+	};
+	int ret = mipi_dsi_device_transfer(dsi, &msg);
+
+	return (ret < 0) ? ret : 0;
+}
+
+/**
+ * mipi_dsi_turn_on_peripheral() - sends a Turn On Peripheral command
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_TURN_ON_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+	};
+	int ret = mipi_dsi_device_transfer(dsi, &msg);
+
+	return (ret < 0) ? ret : 0;
+}
+
+/*
+ * mipi_dsi_set_maximum_return_packet_size() - specify the maximum size of the
+ *	the payload in a long packet transmitted from the peripheral back to the
+ *	host processor
+ * @dsi: DSI peripheral device
+ * @value: the maximum size of the payload
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
+					    u16 value)
+{
+	u8 tx[2] = { value & 0xff, value >> 8 };
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
+		.tx_len = sizeof(tx),
+		.tx_buf = tx,
+	};
+	int ret = mipi_dsi_device_transfer(dsi, &msg);
+
+	return (ret < 0) ? ret : 0;
+}
+
+/**
+ * mipi_dsi_generic_write() - transmit data using a generic write packet
+ * @dsi: DSI peripheral device
+ * @payload: buffer containing the payload
+ * @size: size of payload buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the payload length.
+ *
+ * Return: The number of bytes transmitted on success or a negative error code
+ * on failure.
+ */
+ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
+			       size_t size)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.tx_buf = payload,
+		.tx_len = size
+	};
+
+	switch (size) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
+		break;
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
+		break;
+	default:
+		msg.type = MIPI_DSI_GENERIC_LONG_WRITE;
+		break;
+	}
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_generic_read() - receive data using a generic read packet
+ * @dsi: DSI peripheral device
+ * @params: buffer containing the request parameters
+ * @num_params: number of request parameters
+ * @data: buffer in which to return the received data
+ * @size: size of receive buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the number of parameters passed in.
+ *
+ * Return: The number of bytes successfully read or a negative error code on
+ * failure.
+ */
+ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
+			      size_t num_params, void *data, size_t size)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.tx_len = num_params,
+		.tx_buf = params,
+		.rx_len = size,
+		.rx_buf = data
+	};
+
+	switch (num_params) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
+		break;
+
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
+		break;
+
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_dcs_write_buffer() - transmit a DCS command with payload
+ * @dsi: DSI peripheral device
+ * @data: buffer containing data to be transmitted
+ * @len: size of transmission buffer
+ *
+ * This function will automatically choose the right data type depending on
+ * the command payload length.
+ *
+ * Return: The number of bytes successfully transmitted or a negative error
+ * code on failure.
+ */
+ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
+				  const void *data, size_t len)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.tx_buf = data,
+		.tx_len = len
+	};
+
+	switch (len) {
+	case 0:
+		return -EINVAL;
+
+	case 1:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE;
+		break;
+
+	case 2:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
+		break;
+
+	default:
+		msg.type = MIPI_DSI_DCS_LONG_WRITE;
+		break;
+	}
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_dcs_write() - send DCS write command
+ * @dsi: DSI peripheral device
+ * @cmd: DCS command
+ * @data: buffer containing the command payload
+ * @len: command payload length
+ *
+ * This function will automatically choose the right data type depending on
+ * the command payload length.
+ *
+ * Return: The number of bytes successfully transmitted or a negative error
+ * code on failure.
+ */
+ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
+			   const void *data, size_t len)
+{
+	ssize_t err;
+	size_t size;
+	u8 *tx;
+
+	if (len > 0) {
+		size = 1 + len;
+
+		tx = malloc(size);
+		if (!tx)
+			return -ENOMEM;
+
+		/* concatenate the DCS command byte and the payload */
+		tx[0] = cmd;
+		memcpy(&tx[1], data, len);
+	} else {
+		tx = &cmd;
+		size = 1;
+	}
+
+	err = mipi_dsi_dcs_write_buffer(dsi, tx, size);
+
+	if (len > 0)
+		free(tx);
+
+	return err;
+}
+
+/**
+ * mipi_dsi_dcs_read() - send DCS read request command
+ * @dsi: DSI peripheral device
+ * @cmd: DCS command
+ * @data: buffer in which to receive data
+ * @len: size of receive buffer
+ * Return: The number of bytes read or a negative error code on failure.
+ */
+ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
+			  size_t len)
+{
+	struct mipi_dsi_msg msg = {
+		.channel = dsi->channel,
+		.type = MIPI_DSI_DCS_READ,
+		.tx_buf = &cmd,
+		.tx_len = 1,
+		.rx_buf = data,
+		.rx_len = len
+	};
+
+	return mipi_dsi_device_transfer(dsi, &msg);
+}
+
+/**
+ * mipi_dsi_dcs_nop() - send DCS nop packet
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_soft_reset() - perform a software reset of the display module
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SOFT_RESET, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_get_power_mode() - query the display module's current power
+ *	mode
+ * @dsi: DSI peripheral device
+ * @mode: return location for the current power mode
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_POWER_MODE, mode,
+				sizeof(*mode));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_get_pixel_format() - gets the pixel format for the RGB image
+ *	data used by the interface
+ * @dsi: DSI peripheral device
+ * @format: return location for the pixel format
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_PIXEL_FORMAT, format,
+				sizeof(*format));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_enter_sleep_mode() - disable all unnecessary blocks inside the
+ *	display module except interface communication
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_ENTER_SLEEP_MODE, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_exit_sleep_mode() - enable all blocks inside the display
+ *	module
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_EXIT_SLEEP_MODE, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_display_off() - stop displaying the image data on the
+ *	display device
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_OFF, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_display_on() - start displaying the image data on the
+ *	display device
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_ON, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_column_address() - define the column extent of the frame
+ *	memory accessed by the host processor
+ * @dsi: DSI peripheral device
+ * @start: first column of frame memory
+ * @end: last column of frame memory
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
+				    u16 end)
+{
+	u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff };
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_COLUMN_ADDRESS, payload,
+				 sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_page_address() - define the page extent of the frame
+ *	memory accessed by the host processor
+ * @dsi: DSI peripheral device
+ * @start: first page of frame memory
+ * @end: last page of frame memory
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
+				  u16 end)
+{
+	u8 payload[4] = { start >> 8, start & 0xff, end >> 8, end & 0xff };
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PAGE_ADDRESS, payload,
+				 sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_tear_off() - turn off the display module's Tearing Effect
+ *	output signal on the TE signal line
+ * @dsi: DSI peripheral device
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_OFF, NULL, 0);
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_tear_on() - turn on the display module's Tearing Effect
+ *	output signal on the TE signal line.
+ * @dsi: DSI peripheral device
+ * @mode: the Tearing Effect Output Line mode
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
+			     enum mipi_dsi_dcs_tear_mode mode)
+{
+	u8 value = mode;
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_ON, &value,
+				 sizeof(value));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_pixel_format() - sets the pixel format for the RGB image
+ *	data used by the interface
+ * @dsi: DSI peripheral device
+ * @format: pixel format
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_PIXEL_FORMAT, &format,
+				 sizeof(format));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_tear_scanline() - set the scanline to use as trigger for
+ *	the Tearing Effect output signal of the display module
+ * @dsi: DSI peripheral device
+ * @scanline: scanline to use as trigger
+ *
+ * Return: 0 on success or a negative error code on failure
+ */
+int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline)
+{
+	u8 payload[3] = { MIPI_DCS_SET_TEAR_SCANLINE, scanline >> 8,
+				scanline & 0xff };
+	ssize_t err;
+
+	err = mipi_dsi_generic_write(dsi, payload, sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_set_display_brightness() - sets the brightness value of the
+ *	display
+ * @dsi: DSI peripheral device
+ * @brightness: brightness value
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
+					u16 brightness)
+{
+	u8 payload[2] = { brightness & 0xff, brightness >> 8 };
+	ssize_t err;
+
+	err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_BRIGHTNESS,
+				 payload, sizeof(payload));
+	if (err < 0)
+		return err;
+
+	return 0;
+}
+
+/**
+ * mipi_dsi_dcs_get_display_brightness() - gets the current brightness value
+ *	of the display
+ * @dsi: DSI peripheral device
+ * @brightness: brightness value
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
+					u16 *brightness)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(dsi, MIPI_DCS_GET_DISPLAY_BRIGHTNESS,
+				brightness, sizeof(*brightness));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
diff --git a/drivers/video/drm/dw_mipi_dsi.c b/drivers/video/drm/dw_mipi_dsi.c
index ed831ed371..263bb7ac44 100644
--- a/drivers/video/drm/dw_mipi_dsi.c
+++ b/drivers/video/drm/dw_mipi_dsi.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <drm/drm_mipi_dsi.h>
+
 #include <config.h>
 #include <common.h>
 #include <errno.h>
@@ -15,13 +17,15 @@
 #include <dm/of_access.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
+#include <linux/iopoll.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 #include "rockchip_panel.h"
 #include "rockchip_phy.h"
-#include "rockchip_mipi_dsi.h"
+
+#define UPDATE(v, h, l)		(((v) << (l)) & GENMASK((h), (l)))
 
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
@@ -300,7 +304,7 @@ static int genif_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 	int ret;
 
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, !(sts & GEN_PLD_W_FULL), 10,
+				 sts, !(sts & GEN_PLD_W_FULL),
 				 CMD_PKT_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("generic write payload fifo is full\n");
@@ -316,7 +320,7 @@ static int genif_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
 	int ret;
 
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, !(sts & GEN_CMD_FULL), 10,
+				 sts, !(sts & GEN_CMD_FULL),
 				 CMD_PKT_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("generic write cmd fifo is full\n");
@@ -334,7 +338,7 @@ static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 
 	mask = GEN_CMD_EMPTY | GEN_PLD_W_EMPTY;
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, (sts & mask) == mask, 10,
+				 sts, (sts & mask) == mask,
 				 CMD_PKT_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("generic write fifo is full\n");
@@ -469,8 +473,7 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	}
 
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & PHY_LOCK,
-				 1000, PHY_STATUS_TIMEOUT_US);
+				 val, val & PHY_LOCK, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "PHY is not locked\n");
 		return ret;
@@ -481,7 +484,7 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mask = PHY_STOPSTATELANE;
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, (val & mask) == mask,
-				 1000, PHY_STATUS_TIMEOUT_US);
+				 PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "lane module is not in stop state\n");
 		return ret;
@@ -525,7 +528,7 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	testif_write(dsi, 0x44, HSFREQRANGE(hsfreqrange));
 
 	txbyteclkhs = dsi->lane_mbps >> 3;
-	counter = txbyteclkhs * 60 / NSEC_PER_USEC;
+	counter = txbyteclkhs * 60 / 1000;
 	testif_write(dsi, 0x60, 0x80 | counter);
 	testif_write(dsi, 0x70, 0x80 | counter);
 
@@ -549,7 +552,7 @@ static unsigned long dw_mipi_dsi_get_lane_rate(struct dw_mipi_dsi *dsi)
 	/* optional override of the desired bandwidth */
 	value = dev_read_u32_default(dsi->dev, "rockchip,lane-rate", 0);
 	if (value > 0)
-		return value * USEC_PER_SEC;
+		return value * 1000 * 1000;
 
 	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
 	if (bpp < 0)
@@ -629,7 +632,7 @@ static void dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi, unsigned long rate)
 		}
 	}
 
-	dsi->lane_mbps = best_freq / USEC_PER_SEC;
+	dsi->lane_mbps = best_freq / 1000 / 1000;
 	dsi->dphy.input_div = best_prediv;
 	dsi->dphy.feedback_div = best_fbdiv;
 	if (dsi->slave) {
@@ -648,7 +651,7 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	int ret;
 
 	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-				 val, !(val & GEN_RD_CMD_BUSY), 50, 5000);
+				 val, !(val & GEN_RD_CMD_BUSY), 5000);
 	if (ret) {
 		printf("entire response isn't stored in the FIFO\n");
 		return ret;
@@ -657,8 +660,7 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	/* Receive payload */
 	for (length = msg->rx_len; length; length -= 4) {
 		ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
-					 val, !(val & GEN_PLD_R_EMPTY),
-					 50, 5000);
+					 val, !(val & GEN_PLD_R_EMPTY), 5000);
 		if (ret) {
 			printf("Read payload FIFO is empty\n");
 			return ret;
@@ -713,7 +715,7 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	int ret;
 	int val;
 
-	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
+	if (msg->flags & MIPI_DSI_MSG_USE_LPM) {
 		dsi_update_bits(dsi, DSI_VID_MODE_CFG, LP_CMD_EN, LP_CMD_EN);
 		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
 	} else {
@@ -858,15 +860,6 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	return msg->rx_len ? msg->rx_len : msg->tx_len;
 }
 
-static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
-					      const struct mipi_dsi_msg *msg)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
-
-	return dw_mipi_dsi_transfer(dsi, msg);
-}
-
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
 	u32 val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN |
@@ -1017,7 +1010,7 @@ static int dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
 {
 	u32 lbcc;
 
-	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
+	lbcc = hcomponent * dsi->lane_mbps * 1000 / 8;
 
 	if (dsi->mode->clock == 0) {
 		printf("dsi mode clock is 0!\n");
@@ -1089,20 +1082,9 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
-	struct rockchip_panel *panel = state_get_panel(state);
 
 	dsi->dphy.phy = conn_state->phy;
 
-	dsi->lanes = dev_read_u32_default(panel->dev, "dsi,lanes", 4);
-	dsi->format = dev_read_u32_default(panel->dev, "dsi,format",
-					   MIPI_DSI_FMT_RGB888);
-	dsi->mode_flags = dev_read_u32_default(panel->dev, "dsi,flags",
-					       MIPI_DSI_MODE_VIDEO |
-					       MIPI_DSI_MODE_VIDEO_BURST |
-					       MIPI_DSI_MODE_LPM |
-					       MIPI_DSI_MODE_EOT_PACKET);
-	dsi->channel = dev_read_u32_default(panel->dev, "reg", 0);
-
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 	conn_state->type = DRM_MODE_CONNECTOR_DSI;
@@ -1122,7 +1104,7 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 static void dw_mipi_dsi_set_hs_clk(struct dw_mipi_dsi *dsi, unsigned long rate)
 {
 	rate = rockchip_phy_set_pll(dsi->dphy.phy, rate);
-	dsi->lane_mbps = rate / USEC_PER_SEC;
+	dsi->lane_mbps = rate / 1000 / 1000;
 }
 
 static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
@@ -1256,7 +1238,6 @@ static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
 	.unprepare = dw_mipi_dsi_connector_unprepare,
 	.enable = dw_mipi_dsi_connector_enable,
 	.disable = dw_mipi_dsi_connector_disable,
-	.transfer = dw_mipi_dsi_connector_transfer,
 };
 
 static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
@@ -1515,11 +1496,89 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 	{}
 };
 
+static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
+					 const struct mipi_dsi_msg *msg)
+{
+	struct dw_mipi_dsi *dsi = dev_get_priv(host->dev);
+
+	return dw_mipi_dsi_transfer(dsi, msg);
+}
+
+static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
+				   struct mipi_dsi_device *device)
+{
+	struct dw_mipi_dsi *dsi = dev_get_priv(host->dev);
+
+	if (device->lanes < 1 || device->lanes > 8)
+		return -EINVAL;
+
+	dsi->lanes = device->lanes;
+	dsi->channel = device->channel;
+	dsi->format = device->format;
+	dsi->mode_flags = device->mode_flags;
+
+	return 0;
+}
+
+static const struct mipi_dsi_host_ops dw_mipi_dsi_host_ops = {
+	.attach = dw_mipi_dsi_host_attach,
+	.transfer = dw_mipi_dsi_host_transfer,
+};
+
+static int dw_mipi_dsi_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev);
+
+	host->dev = dev;
+	host->ops = &dw_mipi_dsi_host_ops;
+
+	return dm_scan_fdt_dev(dev);
+}
+
+static int dw_mipi_dsi_child_post_bind(struct udevice *dev)
+{
+	struct mipi_dsi_host *host = dev_get_platdata(dev->parent);
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+
+	device->dev = dev;
+	device->host = host;
+	device->lanes = dev_read_u32_default(dev, "dsi,lanes", 4);
+	device->format = dev_read_u32_default(dev, "dsi,format",
+					      MIPI_DSI_FMT_RGB888);
+	device->mode_flags = dev_read_u32_default(dev, "dsi,flags",
+						  MIPI_DSI_MODE_VIDEO |
+						  MIPI_DSI_MODE_VIDEO_BURST |
+						  MIPI_DSI_MODE_VIDEO_HBP |
+						  MIPI_DSI_MODE_LPM |
+						  MIPI_DSI_MODE_EOT_PACKET);
+	device->channel = dev_read_u32_default(dev, "reg", 0);
+
+	return 0;
+}
+
+static int dw_mipi_dsi_child_pre_probe(struct udevice *dev)
+{
+	struct mipi_dsi_device *device = dev_get_parent_platdata(dev);
+	int ret;
+
+	ret = mipi_dsi_attach(device);
+	if (ret) {
+		dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 U_BOOT_DRIVER(dw_mipi_dsi) = {
 	.name = "dw_mipi_dsi",
 	.id = UCLASS_DISPLAY,
 	.of_match = dw_mipi_dsi_ids,
 	.probe = dw_mipi_dsi_probe,
-	.bind = dm_scan_fdt_dev,
+	.bind = dw_mipi_dsi_bind,
 	.priv_auto_alloc_size = sizeof(struct dw_mipi_dsi),
+	.per_child_platdata_auto_alloc_size = sizeof(struct mipi_dsi_device),
+	.platdata_auto_alloc_size = sizeof(struct mipi_dsi_host),
+	.child_post_bind = dw_mipi_dsi_child_post_bind,
+	.child_pre_probe = dw_mipi_dsi_child_pre_probe,
 };
diff --git a/drivers/video/drm/rockchip-inno-hdmi-phy.c b/drivers/video/drm/rockchip-inno-hdmi-phy.c
index 783280083d..71c710fc86 100644
--- a/drivers/video/drm/rockchip-inno-hdmi-phy.c
+++ b/drivers/video/drm/rockchip-inno-hdmi-phy.c
@@ -20,11 +20,10 @@
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
-#include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
 #define INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT	1000
-/*#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))*/
+#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))
 
 /* REG: 0x00 */
 #define PRE_PLL_REFCLK_SEL_MASK			BIT(0)
diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index 1ed54647c5..642238b1a7 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -7,8 +7,6 @@
 #ifndef _ROCKCHIP_CONNECTOR_H_
 #define _ROCKCHIP_CONNECTOR_H_
 
-#include "rockchip_mipi_dsi.h"
-
 struct rockchip_connector {
 	const struct rockchip_connector_funcs *funcs;
 
@@ -58,9 +56,6 @@ struct rockchip_connector_funcs {
 	 * Save data to dts, then you can share data to kernel space.
 	 */
 	int (*fixup_dts)(struct display_state *state, void *blob);
-	/* transmit a DSI packet */
-	ssize_t (*transfer)(struct display_state *state,
-			    const struct mipi_dsi_msg *msg);
 };
 
 const struct rockchip_connector *
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index b36c30d2f0..4e81a3549d 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -20,7 +20,8 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
-#include "rockchip_lvds.h"
+
+#define HIWORD_UPDATE(v, h, l)		(((v) << (l)) | (GENMASK(h, l) << 16))
 
 #define PX30_GRF_PD_VO_CON1		0x0438
 #define PX30_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
deleted file mode 100644
index 649f74281a..0000000000
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
-#include "rockchip_mipi_dsi.h"
-
-void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
-				  unsigned long period)
-{
-	/* Global Operation Timing Parameters */
-	timing->clkmiss = 0;
-	timing->clkpost = 70 + 52 * period;
-	timing->clkpre = 8 * period;
-	timing->clkprepare = 65;
-	timing->clksettle = 95;
-	timing->clktermen = 0;
-	timing->clktrail = 80;
-	timing->clkzero = 260;
-	timing->dtermen = 0;
-	timing->eot = 0;
-	timing->hsexit = 120;
-	timing->hsprepare = 65 + 4 * period;
-	timing->hszero = 145 + 6 * period;
-	timing->hssettle = 85 + 6 * period;
-	timing->hsskip = 40;
-	timing->hstrail = max(8 * period, 60 + 4 * period);
-	timing->init = 100000;
-	timing->lpx = 60;
-	timing->taget = 5 * timing->lpx;
-	timing->tago = 4 * timing->lpx;
-	timing->tasure = 2 * timing->lpx;
-	timing->wakeup = 1000000;
-}
-
-ssize_t mipi_dsi_generic_write(struct display_state *state,
-			       const void *payload, size_t size)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.tx_buf = payload;
-	msg.tx_len = size;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	switch (size) {
-	case 0:
-		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
-		break;
-	case 1:
-		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
-		break;
-	case 2:
-		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
-		break;
-	default:
-		msg.type = MIPI_DSI_GENERIC_LONG_WRITE;
-		break;
-	}
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_dcs_write(struct display_state *state,
-			   const void *payload, size_t size)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.tx_buf = payload;
-	msg.tx_len = size;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	switch (size) {
-	case 0:
-		return -EINVAL;
-	case 1:
-		msg.type = MIPI_DSI_DCS_SHORT_WRITE;
-		break;
-	case 2:
-		msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
-		break;
-	default:
-		msg.type = MIPI_DSI_DCS_LONG_WRITE;
-		break;
-	}
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
-			      size_t num_params, void *data, size_t size)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.tx_buf = params;
-	msg.tx_len = num_params;
-	msg.rx_len = size;
-	msg.rx_buf = data;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	switch (num_params) {
-	case 0:
-		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
-		break;
-	case 1:
-		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
-		break;
-	case 2:
-		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
-			  size_t len)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg;
-
-	if (!connector || !connector->funcs || !connector->funcs->transfer) {
-		printf("%s: failed to find connector transfer funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	memset(&msg, 0, sizeof(msg));
-	msg.channel = 0;
-	msg.type = MIPI_DSI_DCS_READ;
-	msg.tx_buf = &cmd;
-	msg.tx_len = 1;
-	msg.rx_len = len;
-	msg.rx_buf = data;
-	msg.flags |= MIPI_DSI_MSG_USE_LPM;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg = {
-		.channel = 0,
-		.type = MIPI_DSI_SHUTDOWN_PERIPHERAL,
-		.tx_buf = (u8 [2]) { 0, 0 },
-		.tx_len = 2,
-		.flags = MIPI_DSI_MSG_USE_LPM,
-	};
-
-	if (!connector)
-		return -ENODEV;
-
-	if (!connector->funcs || !connector->funcs->transfer)
-		return -ENOSYS;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	struct mipi_dsi_msg msg = {
-		.channel = 0,
-		.type = MIPI_DSI_TURN_ON_PERIPHERAL,
-		.tx_buf = (u8 [2]) { 0, 0 },
-		.tx_len = 2,
-		.flags = MIPI_DSI_MSG_USE_LPM,
-	};
-
-	if (!connector)
-		return -ENODEV;
-
-	if (!connector->funcs || !connector->funcs->transfer)
-		return -ENOSYS;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-int mipi_dsi_dcs_get_power_mode(struct display_state *state, u8 *mode)
-{
-	ssize_t err;
-
-	err = mipi_dsi_dcs_read(state, MIPI_DCS_GET_POWER_MODE, mode,
-				sizeof(*mode));
-	if (err <= 0) {
-		if (err == 0)
-			err = -ENODATA;
-
-		return err;
-	}
-
-	return 0;
-}
-
-int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
-					    u16 value)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	u8 tx[2] = { value & 0xff, value >> 8 };
-	struct mipi_dsi_msg msg = {
-		.channel = 0,
-		.type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
-		.tx_len = sizeof(tx),
-		.tx_buf = tx,
-	};
-
-	if (!connector)
-		return -ENODEV;
-
-	if (!connector->funcs || !connector->funcs->transfer)
-		return -ENOSYS;
-
-	return connector->funcs->transfer(state, &msg);
-}
-
-static bool mipi_dsi_packet_format_is_short(u8 type)
-{
-	switch (type) {
-	case MIPI_DSI_V_SYNC_START:
-	case MIPI_DSI_V_SYNC_END:
-	case MIPI_DSI_H_SYNC_START:
-	case MIPI_DSI_H_SYNC_END:
-	case MIPI_DSI_END_OF_TRANSMISSION:
-	case MIPI_DSI_COLOR_MODE_OFF:
-	case MIPI_DSI_COLOR_MODE_ON:
-	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
-	case MIPI_DSI_TURN_ON_PERIPHERAL:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
-	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
-	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
-	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
-	case MIPI_DSI_DCS_SHORT_WRITE:
-	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
-	case MIPI_DSI_DCS_READ:
-	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
-		return true;
-	}
-
-	return false;
-}
-
-static bool mipi_dsi_packet_format_is_long(u8 type)
-{
-	switch (type) {
-	case MIPI_DSI_NULL_PACKET:
-	case MIPI_DSI_BLANKING_PACKET:
-	case MIPI_DSI_GENERIC_LONG_WRITE:
-	case MIPI_DSI_DCS_LONG_WRITE:
-	case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_30:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_36:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_16:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_18:
-	case MIPI_DSI_PIXEL_STREAM_3BYTE_18:
-	case MIPI_DSI_PACKED_PIXEL_STREAM_24:
-		return true;
-	}
-
-	return false;
-}
-
-int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
-			   const struct mipi_dsi_msg *msg)
-{
-	if (!packet || !msg)
-		return -EINVAL;
-
-	/* do some minimum sanity checking */
-	if (!mipi_dsi_packet_format_is_short(msg->type) &&
-	    !mipi_dsi_packet_format_is_long(msg->type))
-		return -EINVAL;
-
-	if (msg->channel > 3)
-		return -EINVAL;
-
-	memset(packet, 0, sizeof(*packet));
-	packet->header[0] = ((msg->channel & 0x3) << 6) | (msg->type & 0x3f);
-	if (mipi_dsi_packet_format_is_long(msg->type)) {
-		packet->header[1] = (msg->tx_len >> 0) & 0xff;
-		packet->header[2] = (msg->tx_len >> 8) & 0xff;
-		packet->payload_length = msg->tx_len;
-		packet->payload = msg->tx_buf;
-	} else {
-		const u8 *tx = msg->tx_buf;
-		packet->header[1] = (msg->tx_len > 0) ? tx[0] : 0;
-		packet->header[2] = (msg->tx_len > 1) ? tx[1] : 0;
-	}
-
-	packet->size = sizeof(packet->header) + packet->payload_length;
-
-	return 0;
-}
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
deleted file mode 100644
index b3919a86a8..0000000000
--- a/drivers/video/drm/rockchip_mipi_dsi.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ROCKCHIP_MIPI_DSI_H__
-#define __ROCKCHIP_MIPI_DSI_H__
-
-#include <mipi_display.h>
-
-#define MSEC_PER_SEC	1000L
-#define USEC_PER_MSEC	1000L
-#define NSEC_PER_USEC	1000L
-#define NSEC_PER_MSEC	1000000L
-#define USEC_PER_SEC	1000000L
-#define NSEC_PER_SEC	1000000000L
-#define FSEC_PER_SEC	1000000000000000LL
-
-#define GENMASK(h, l)	(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
-#define UPDATE(v, h, l)	(((v) << (l)) & GENMASK((h), (l)))
-#define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK(h, l) << 16))
-
-#define readl_poll_timeout(addr, val, cond, sleep_us, timeout_us)	\
-({ \
-	int try = 100; \
-	for (;;) { \
-		(val) = readl(addr); \
-		if (cond) \
-			break; \
-		try--; \
-		if (!try) \
-			break; \
-		if (sleep_us) \
-			udelay(sleep_us >> 2); \
-	} \
-	(cond) ? 0 : -ETIMEDOUT; \
-})
-
-/* request ACK from peripheral */
-#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
-/* use Low Power Mode to transmit message */
-#define MIPI_DSI_MSG_USE_LPM	BIT(1)
-
-/**
- * struct mipi_dsi_msg - read/write DSI buffer
- * @channel: virtual channel id
- * @type: payload data type
- * @flags: flags controlling this message transmission
- * @tx_len: length of @tx_buf
- * @tx_buf: data to be written
- * @rx_len: length of @rx_buf
- * @rx_buf: data to be read, or NULL
- */
-struct mipi_dsi_msg {
-	u8 channel;
-	u8 type;
-	u16 flags;
-
-	size_t tx_len;
-	const void *tx_buf;
-
-	size_t rx_len;
-	void *rx_buf;
-};
-
-/**
- * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
- * @size: size (in bytes) of the packet
- * @header: the four bytes that make up the header (Data ID, Word Count or
- *     Packet Data, and ECC)
- * @payload_length: number of bytes in the payload
- * @payload: a pointer to a buffer containing the payload, if any
- */
-struct mipi_dsi_packet {
-	size_t size;
-	u8 header[4];
-	size_t payload_length;
-	const u8 *payload;
-};
-
-
-/* DSI mode flags */
-
-/* video mode */
-#define MIPI_DSI_MODE_VIDEO		BIT(0)
-/* video burst mode */
-#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
-/* video pulse mode */
-#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
-/* enable auto vertical count mode */
-#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
-/* enable hsync-end packets in vsync-pulse and v-porch area */
-#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
-/* disable hfront-porch area */
-#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
-/* disable hback-porch area */
-#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
-/* disable hsync-active area */
-#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
-/* flush display FIFO on vsync pulse */
-#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
-/* disable EoT packets in HS mode */
-#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
-/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
-#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
-/* transmit data in low power */
-#define MIPI_DSI_MODE_LPM		BIT(11)
-
-enum mipi_dsi_pixel_format {
-	MIPI_DSI_FMT_RGB888,
-	MIPI_DSI_FMT_RGB666,
-	MIPI_DSI_FMT_RGB666_PACKED,
-	MIPI_DSI_FMT_RGB565,
-};
-
-/**
- * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
- *                                given pixel format defined by the MIPI DSI
- *                                specification
- * @fmt: MIPI DSI pixel format
- *
- * Returns: The number of bits per pixel of the given pixel format.
- */
-static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
-{
-	switch (fmt) {
-	case MIPI_DSI_FMT_RGB888:
-	case MIPI_DSI_FMT_RGB666:
-		return 24;
-
-	case MIPI_DSI_FMT_RGB666_PACKED:
-		return 18;
-
-	case MIPI_DSI_FMT_RGB565:
-		return 16;
-	}
-
-	return -EINVAL;
-}
-
-/**
- * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
- * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
- *    information only
- * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
- *    V-Blanking and H-Blanking information
- */
-enum mipi_dsi_dcs_tear_mode {
-	MIPI_DSI_DCS_TEAR_MODE_VBLANK,
-	MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
-};
-
-#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
-#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
-#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
-#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
-#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
-
-struct mipi_dphy_timing {
-	unsigned int clkmiss;
-	unsigned int clkpost;
-	unsigned int clkpre;
-	unsigned int clkprepare;
-	unsigned int clksettle;
-	unsigned int clktermen;
-	unsigned int clktrail;
-	unsigned int clkzero;
-	unsigned int dtermen;
-	unsigned int eot;
-	unsigned int hsexit;
-	unsigned int hsprepare;
-	unsigned int hszero;
-	unsigned int hssettle;
-	unsigned int hsskip;
-	unsigned int hstrail;
-	unsigned int init;
-	unsigned int lpx;
-	unsigned int taget;
-	unsigned int tago;
-	unsigned int tasure;
-	unsigned int wakeup;
-};
-
-void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
-				  unsigned long period);
-ssize_t mipi_dsi_dcs_write(struct display_state *state,
-			   const void *payload, size_t size);
-ssize_t mipi_dsi_generic_write(struct display_state *state,
-			       const void *payload, size_t size);
-int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
-			   const struct mipi_dsi_msg *msg);
-ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
-			  size_t len);
-ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
-			      size_t num_params, void *data, size_t size);
-ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state);
-ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state);
-int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
-					    u16 value);
-int mipi_dsi_dcs_get_pixel_format(struct display_state *state, u8 *format);
-#endif /* __ROCKCHIP_MIPI_DSI__ */
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 8f953ee141..57bf479c74 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <drm/drm_mipi_dsi.h>
+
 #include <config.h>
 #include <common.h>
 #include <errno.h>
@@ -21,7 +23,6 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
-#include "rockchip_mipi_dsi.h"
 #include "rockchip_panel.h"
 
 struct rockchip_cmd_header {
@@ -209,7 +210,7 @@ static int rockchip_panel_send_spi_cmds(struct display_state *state,
 	return 0;
 }
 
-static int rockchip_panel_send_dsi_cmds(struct display_state *state,
+static int rockchip_panel_send_dsi_cmds(struct mipi_dsi_device *dsi,
 					struct rockchip_panel_cmds *cmds)
 {
 	int i, ret;
@@ -219,24 +220,25 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 
 	for (i = 0; i < cmds->cmd_cnt; i++) {
 		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+		const struct rockchip_cmd_header *header = &desc->header;
 
-		switch (desc->header.data_type) {
+		switch (header->data_type) {
 		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
 		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
 		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
 		case MIPI_DSI_GENERIC_LONG_WRITE:
-			ret = mipi_dsi_generic_write(state, desc->payload,
-						     desc->header.payload_length);
+			ret = mipi_dsi_generic_write(dsi, desc->payload,
+						     header->payload_length);
 			break;
 		case MIPI_DSI_DCS_SHORT_WRITE:
 		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
 		case MIPI_DSI_DCS_LONG_WRITE:
-			ret = mipi_dsi_dcs_write(state, desc->payload,
-						 desc->header.payload_length);
+			ret = mipi_dsi_dcs_write_buffer(dsi, desc->payload,
+							header->payload_length);
 			break;
 		default:
 			printf("unsupport command data type: %d\n",
-			       desc->header.data_type);
+			       header->data_type);
 			return -EINVAL;
 		}
 
@@ -245,8 +247,8 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 			return ret;
 		}
 
-		if (desc->header.delay_ms)
-			mdelay(desc->header.delay_ms);
+		if (header->delay_ms)
+			mdelay(header->delay_ms);
 	}
 
 	return 0;
@@ -256,6 +258,7 @@ static void panel_simple_prepare(struct rockchip_panel *panel)
 {
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
+	struct mipi_dsi_device *dsi = dev_get_parent_platdata(panel->dev);
 	int ret;
 
 	if (priv->prepared)
@@ -290,8 +293,7 @@ static void panel_simple_prepare(struct rockchip_panel *panel)
 			ret = rockchip_panel_send_mcu_cmds(panel->state,
 							   plat->on_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(panel->state,
-							   plat->on_cmds);
+			ret = rockchip_panel_send_dsi_cmds(dsi, plat->on_cmds);
 		if (ret)
 			printf("failed to send on cmds: %d\n", ret);
 	}
@@ -303,6 +305,7 @@ static void panel_simple_unprepare(struct rockchip_panel *panel)
 {
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
+	struct mipi_dsi_device *dsi = dev_get_parent_platdata(panel->dev);
 	int ret;
 
 	if (!priv->prepared)
@@ -316,8 +319,7 @@ static void panel_simple_unprepare(struct rockchip_panel *panel)
 			ret = rockchip_panel_send_mcu_cmds(panel->state,
 							   plat->off_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(panel->state,
-							   plat->off_cmds);
+			ret = rockchip_panel_send_dsi_cmds(dsi, plat->off_cmds);
 		if (ret)
 			printf("failed to send off cmds: %d\n", ret);
 	}
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 95fcad5023..60b09df21e 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -17,6 +17,8 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
+#define HIWORD_UPDATE(v, h, l)		(((v) << (l)) | (GENMASK(h, l) << 16))
+
 #define PX30_GRF_PD_VO_CON1		0x0438
 #define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
 #define PX30_RGB_VOP_SEL(v)		HIWORD_UPDATE(v, 2, 2)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
new file mode 100644
index 0000000000..d05c07b7f5
--- /dev/null
+++ b/include/drm/drm_mipi_dsi.h
@@ -0,0 +1,252 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Andrzej Hajda <a.hajda@samsung.com>
+ */
+
+#ifndef __DRM_MIPI_DSI_H__
+#define __DRM_MIPI_DSI_H__
+
+#include <mipi_display.h>
+#include <dm/device.h>
+
+struct mipi_dsi_host;
+struct mipi_dsi_device;
+
+/* request ACK from peripheral */
+#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
+/* use Low Power Mode to transmit message */
+#define MIPI_DSI_MSG_USE_LPM	BIT(1)
+
+/**
+ * struct mipi_dsi_msg - read/write DSI buffer
+ * @channel: virtual channel id
+ * @type: payload data type
+ * @flags: flags controlling this message transmission
+ * @tx_len: length of @tx_buf
+ * @tx_buf: data to be written
+ * @rx_len: length of @rx_buf
+ * @rx_buf: data to be read, or NULL
+ */
+struct mipi_dsi_msg {
+	u8 channel;
+	u8 type;
+	u16 flags;
+
+	size_t tx_len;
+	const void *tx_buf;
+
+	size_t rx_len;
+	void *rx_buf;
+};
+
+bool mipi_dsi_packet_format_is_short(u8 type);
+bool mipi_dsi_packet_format_is_long(u8 type);
+
+/**
+ * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
+ * @size: size (in bytes) of the packet
+ * @header: the four bytes that make up the header (Data ID, Word Count or
+ *     Packet Data, and ECC)
+ * @payload_length: number of bytes in the payload
+ * @payload: a pointer to a buffer containing the payload, if any
+ */
+struct mipi_dsi_packet {
+	size_t size;
+	u8 header[4];
+	size_t payload_length;
+	const u8 *payload;
+};
+
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg);
+
+/**
+ * struct mipi_dsi_host_ops - DSI bus operations
+ * @attach: attach DSI device to DSI host
+ * @detach: detach DSI device from DSI host
+ * @transfer: transmit a DSI packet
+ *
+ * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
+ * structures. This structure contains information about the type of packet
+ * being transmitted as well as the transmit and receive buffers. When an
+ * error is encountered during transmission, this function will return a
+ * negative error code. On success it shall return the number of bytes
+ * transmitted for write packets or the number of bytes received for read
+ * packets.
+ *
+ * Note that typically DSI packet transmission is atomic, so the .transfer()
+ * function will seldomly return anything other than the number of bytes
+ * contained in the transmit buffer on success.
+ */
+struct mipi_dsi_host_ops {
+	int (*attach)(struct mipi_dsi_host *host,
+		      struct mipi_dsi_device *dsi);
+	int (*detach)(struct mipi_dsi_host *host,
+		      struct mipi_dsi_device *dsi);
+	ssize_t (*transfer)(struct mipi_dsi_host *host,
+			    const struct mipi_dsi_msg *msg);
+};
+
+/**
+ * struct mipi_dsi_host - DSI host device
+ * @dev: driver model device node for this DSI host
+ * @ops: DSI host operations
+ * @list: list management
+ */
+struct mipi_dsi_host {
+	struct udevice *dev;
+	const struct mipi_dsi_host_ops *ops;
+};
+
+/* DSI mode flags */
+
+/* video mode */
+#define MIPI_DSI_MODE_VIDEO		BIT(0)
+/* video burst mode */
+#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
+/* video pulse mode */
+#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
+/* enable auto vertical count mode */
+#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
+/* enable hsync-end packets in vsync-pulse and v-porch area */
+#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
+/* disable hfront-porch area */
+#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
+/* disable hback-porch area */
+#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
+/* disable hsync-active area */
+#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
+/* flush display FIFO on vsync pulse */
+#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
+/* disable EoT packets in HS mode */
+#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM		BIT(11)
+
+enum mipi_dsi_pixel_format {
+	MIPI_DSI_FMT_RGB888,
+	MIPI_DSI_FMT_RGB666,
+	MIPI_DSI_FMT_RGB666_PACKED,
+	MIPI_DSI_FMT_RGB565,
+};
+
+#define DSI_DEV_NAME_SIZE		20
+
+/**
+ * struct mipi_dsi_device - DSI peripheral device
+ * @host: DSI host for this peripheral
+ * @dev: driver model device node for this peripheral
+ * @name: DSI peripheral chip type
+ * @channel: virtual channel assigned to the peripheral
+ * @format: pixel format for video mode
+ * @lanes: number of active data lanes
+ * @mode_flags: DSI operation mode related flags
+ * @hs_rate: maximum lane frequency for high speed mode in hertz, this should
+ * be set to the real limits of the hardware, zero is only accepted for
+ * legacy drivers
+ * @lp_rate: maximum lane frequency for low power mode in hertz, this should
+ * be set to the real limits of the hardware, zero is only accepted for
+ * legacy drivers
+ */
+struct mipi_dsi_device {
+	struct mipi_dsi_host *host;
+	struct udevice *dev;
+
+	char name[DSI_DEV_NAME_SIZE];
+	unsigned int channel;
+	unsigned int lanes;
+	enum mipi_dsi_pixel_format format;
+	unsigned long mode_flags;
+	unsigned long hs_rate;
+	unsigned long lp_rate;
+};
+
+/**
+ * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
+ *                                given pixel format defined by the MIPI DSI
+ *                                specification
+ * @fmt: MIPI DSI pixel format
+ *
+ * Returns: The number of bits per pixel of the given pixel format.
+ */
+static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
+{
+	switch (fmt) {
+	case MIPI_DSI_FMT_RGB888:
+	case MIPI_DSI_FMT_RGB666:
+		return 24;
+
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		return 18;
+
+	case MIPI_DSI_FMT_RGB565:
+		return 16;
+	}
+
+	return -EINVAL;
+}
+
+int mipi_dsi_attach(struct mipi_dsi_device *dsi);
+int mipi_dsi_detach(struct mipi_dsi_device *dsi);
+int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi);
+int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi);
+int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
+					    u16 value);
+
+ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload,
+			       size_t size);
+ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params,
+			      size_t num_params, void *data, size_t size);
+
+/**
+ * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
+ * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
+ *    information only
+ * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
+ *    V-Blanking and H-Blanking information
+ */
+enum mipi_dsi_dcs_tear_mode {
+	MIPI_DSI_DCS_TEAR_MODE_VBLANK,
+	MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
+};
+
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY BIT(2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL  BIT(3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP   BIT(4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL BIT(5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE    BIT(6)
+
+ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi,
+				  const void *data, size_t len);
+ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd,
+			   const void *data, size_t len);
+ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
+			  size_t len);
+int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode);
+int mipi_dsi_dcs_get_pixel_format(struct mipi_dsi_device *dsi, u8 *format);
+int mipi_dsi_dcs_enter_sleep_mode(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_exit_sleep_mode(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_display_off(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_display_on(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_column_address(struct mipi_dsi_device *dsi, u16 start,
+				    u16 end);
+int mipi_dsi_dcs_set_page_address(struct mipi_dsi_device *dsi, u16 start,
+				  u16 end);
+int mipi_dsi_dcs_set_tear_off(struct mipi_dsi_device *dsi);
+int mipi_dsi_dcs_set_tear_on(struct mipi_dsi_device *dsi,
+			     enum mipi_dsi_dcs_tear_mode mode);
+int mipi_dsi_dcs_set_pixel_format(struct mipi_dsi_device *dsi, u8 format);
+int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline);
+int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi,
+					u16 brightness);
+int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi,
+					u16 *brightness);
+
+#endif /* __DRM_MIPI_DSI__ */

commit c5bb939d42fe776e1a5d44803fd616d8ac407b16
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 31 14:15:59 2019 +0800

    include: mipi_display: Add new DCS commands in the enum list
    
    Adding new DCS commands which are specified in the
    DCS 1.3 spec related to CABC.
    
    Change-Id: I42aeb4189f3444a8387a868ae25c8518a2f8d596
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/include/mipi_display.h b/include/mipi_display.h
index ddcc8ca731..c86be58bb2 100644
--- a/include/mipi_display.h
+++ b/include/mipi_display.h
@@ -115,6 +115,14 @@ enum {
 	MIPI_DCS_READ_MEMORY_CONTINUE	= 0x3E,
 	MIPI_DCS_SET_TEAR_SCANLINE	= 0x44,
 	MIPI_DCS_GET_SCANLINE		= 0x45,
+	MIPI_DCS_SET_DISPLAY_BRIGHTNESS	= 0x51,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_DISPLAY_BRIGHTNESS	= 0x52,		/* MIPI DCS 1.3 */
+	MIPI_DCS_WRITE_CONTROL_DISPLAY	= 0x53,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_CONTROL_DISPLAY	= 0x54,		/* MIPI DCS 1.3 */
+	MIPI_DCS_WRITE_POWER_SAVE	= 0x55,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_POWER_SAVE		= 0x56,		/* MIPI DCS 1.3 */
+	MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E,	/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F,	/* MIPI DCS 1.3 */
 	MIPI_DCS_READ_DDB_START		= 0xA1,
 	MIPI_DCS_READ_DDB_CONTINUE	= 0xA8,
 };

commit 85e15df95e1008d95d0fe725b30986161a7c52dd
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 31 08:58:51 2019 +0800

    video/drm: Rename rockchip-inno-mipi-dphy.c to inno_mipi_phy.c
    
    Change-Id: I20b9c24fc7df3f4fb74eb8ce7b722b945ac7d245
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 635e66b4ef..56a0ce3177 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -31,6 +31,13 @@ config ROCKCHIP_INNO_HDMI_PHY
 	 use HDMI or TVE in RK322XH or RK322X, you should selet
 	 this option.
 
+config DRM_ROCKCHIP_INNO_MIPI_PHY
+	tristate "Rockchip INNO MIPI PHY driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Enable this to support the Rockchip MIPI PHY
+	  with Innosilicon IP block.
+
 config DRM_ROCKCHIP_INNO_VIDEO_PHY
 	tristate "Rockchip INNO LVDS/TTL PHY driver"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index ca4579c88f..1cb4c53d03 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -8,10 +8,10 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o \
-					  rockchip-inno-mipi-dphy.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY) += inno_mipi_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY) += inno_video_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/inno_mipi_phy.c
similarity index 91%
rename from drivers/video/drm/rockchip-inno-mipi-dphy.c
rename to drivers/video/drm/inno_mipi_phy.c
index 4ef418c060..9f41260c0b 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/inno_mipi_phy.c
@@ -17,11 +17,13 @@
 #include <dm/uclass.h>
 #include <dm/uclass-id.h>
 
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
 #include "rockchip_phy.h"
-#include "rockchip_mipi_dsi.h"
+
+#define NSEC_PER_USEC		1000L
+#define USEC_PER_SEC		1000000L
+#define NSEC_PER_SEC		1000000000L
+
+#define UPDATE(v, h, l)		(((v) << (l)) & GENMASK((h), (l)))
 
 /* Innosilicon MIPI D-PHY registers */
 #define INNO_PHY_LANE_CTRL	0x00000
@@ -115,6 +117,31 @@ enum lane_type {
 	DATA_LANE_3,
 };
 
+struct mipi_dphy_timing {
+	unsigned int clkmiss;
+	unsigned int clkpost;
+	unsigned int clkpre;
+	unsigned int clkprepare;
+	unsigned int clksettle;
+	unsigned int clktermen;
+	unsigned int clktrail;
+	unsigned int clkzero;
+	unsigned int dtermen;
+	unsigned int eot;
+	unsigned int hsexit;
+	unsigned int hsprepare;
+	unsigned int hszero;
+	unsigned int hssettle;
+	unsigned int hsskip;
+	unsigned int hstrail;
+	unsigned int init;
+	unsigned int lpx;
+	unsigned int taget;
+	unsigned int tago;
+	unsigned int tasure;
+	unsigned int wakeup;
+};
+
 struct inno_mipi_dphy_timing {
 	u8 lpx;
 	u8 hs_prepare;
@@ -205,6 +232,34 @@ static inline void inno_update_bits(struct inno_mipi_dphy *inno, u32 reg,
 	inno_write(inno, reg, tmp);
 }
 
+static void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+					 unsigned long period)
+{
+	/* Global Operation Timing Parameters */
+	timing->clkmiss = 0;
+	timing->clkpost = 70 + 52 * period;
+	timing->clkpre = 8 * period;
+	timing->clkprepare = 65;
+	timing->clksettle = 95;
+	timing->clktermen = 0;
+	timing->clktrail = 80;
+	timing->clkzero = 260;
+	timing->dtermen = 0;
+	timing->eot = 0;
+	timing->hsexit = 120;
+	timing->hsprepare = 65 + 4 * period;
+	timing->hszero = 145 + 6 * period;
+	timing->hssettle = 85 + 6 * period;
+	timing->hsskip = 40;
+	timing->hstrail = max(8 * period, 60 + 4 * period);
+	timing->init = 100000;
+	timing->lpx = 60;
+	timing->taget = 5 * timing->lpx;
+	timing->tago = 4 * timing->lpx;
+	timing->tasure = 2 * timing->lpx;
+	timing->wakeup = 1000000;
+}
+
 static void inno_mipi_dphy_timing_update(struct inno_mipi_dphy *inno,
 					 enum lane_type lane_type,
 					 struct inno_mipi_dphy_timing *t)

commit a492b30692db39dd0829b4f78a32d320b2a81485
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Mon Jan 7 16:42:04 2019 +0800

    cmd: ddr_tool: update ddr tool to version 1.01
    
    Change-Id: I05ffb164dfa6bb8aa997ab5783c274215dc938f5
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/ddr_tool/Makefile b/cmd/ddr_tool/Makefile
index 1fd808bbdd..08fab7e45b 100644
--- a/cmd/ddr_tool/Makefile
+++ b/cmd/ddr_tool/Makefile
@@ -17,4 +17,7 @@ endif
 ifdef CONFIG_ROCKCHIP_RK1808
 obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_rk1808.o
 endif
-
+ifndef CONFIG_CMD_MEMTESTER
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ../memtester/ddr_tester_common.o
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ../memtester/io_map.o
+endif
diff --git a/cmd/ddr_tool/ddr_test_px30.S b/cmd/ddr_tool/ddr_test_px30.S
index 985d7be5cb..a6c7352e3a 100644
--- a/cmd/ddr_tool/ddr_test_px30.S
+++ b/cmd/ddr_tool/ddr_test_px30.S
@@ -1,324 +1,388 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
 	.arch armv8-a+nosimd
 	.file	"ddr_test_code.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.set_ddr_freq,"ax",@progbits
+	.section	.text.crosstalk,"ax",@progbits
 	.align	2
-	.type	set_ddr_freq, %function
-set_ddr_freq:
-.LFB256:
-	.file 1 "cmd/ddr_tool/ddr_tool.c"
-	.loc 1 147 0
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 1 "cmd/ddr_tool/crosstalk.c"
+	.loc 1 46 0
 	.cfi_startproc
 .LVL0:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 1 149 0
-	mov	x1, 16959
-	movk	x1, 0xf, lsl 16
-	cmp	x0, x1
-	.loc 1 147 0
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 1 149 0
-	bhi	.L2
-	.loc 1 150 0
-	add	x1, x1, 1
-	mul	x0, x0, x1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 66 0
+	adrp	x22, .LC2
+	.loc 1 46 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	mov	x23, x0
+	stp	x19, x20, [sp, 16]
+	mov	x24, x1
+	stp	x25, x26, [sp, 64]
+	.loc 1 63 0
+	adrp	x0, .LC1
 .LVL1:
-	.loc 1 151 0
-	cbz	x0, .L3
-.L2:
-	.loc 1 152 0
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 1 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 1 63 0
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .LVL2:
-	.loc 1 153 0
-	bl	rockchip_ddrclk_sip_set_rate_v2
+	.loc 1 71 0
+	add	x21, x29, 112
+	.loc 1 66 0
+	add	x0, x22, :lo12:.LC2
+	.loc 1 68 0
+	adrp	x25, .LC3
+	.loc 1 66 0
+	str	x0, [x29, 104]
+	.loc 1 64 0
+	mov	w20, 0
+	.loc 1 68 0
+	add	x0, x25, :lo12:.LC3
+	str	x0, [x29, 96]
 .LVL3:
-.L3:
-	.loc 1 155 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.L6:
+	.loc 1 66 0
+	ldr	x0, [x29, 104]
+	.loc 1 71 0
+	mov	w26, 1
+	.loc 1 66 0
+	mov	w1, w20
+	.loc 1 71 0
+	lsl	w26, w26, w20
+	.loc 1 65 0
+	mov	w28, -1
+	.loc 1 67 0
+	mov	w27, 0
+	.loc 1 66 0
+	bl	printf
 .LVL4:
-	mov	x19, x0
+.L5:
+	.loc 1 68 0
+	ldr	x0, [x29, 96]
+	mov	w1, w27
+	.loc 1 69 0
+	mvn	w28, w28
 .LVL5:
-	.loc 1 156 0
-	mov	x1, x0
-	adrp	x0, .LC1
-.LVL6:
-	add	x0, x0, :lo12:.LC1
+	mov	x19, 0
+	.loc 1 68 0
 	bl	printf
+.LVL6:
+.L2:
+	.loc 1 71 0 discriminator 3
+	eor	w0, w26, w28
+	str	w0, [x19, x21]
+	add	x19, x19, 4
+	.loc 1 72 0 discriminator 3
+	mvn	w28, w28
 .LVL7:
-	.loc 1 162 0
-	mov	w0, w19
-	ldr	x19, [sp, 16]
+	.loc 1 70 0 discriminator 3
+	cmp	x19, 32
+	bne	.L2
+	.loc 1 74 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
 .LVL8:
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE256:
-	.size	set_ddr_freq, .-set_ddr_freq
-	.section	.text.set_vdd_logic,"ax",@progbits
-	.align	2
-	.type	set_vdd_logic, %function
-set_vdd_logic:
-.LFB257:
-	.loc 1 165 0
-	.cfi_startproc
+	.loc 1 75 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
 .LVL9:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 1 169 0
-	add	x1, x29, 40
-	.loc 1 165 0
-	mov	w20, w0
-	.loc 1 169 0
-	adrp	x0, .LC2
+	.loc 1 76 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
 .LVL10:
-	add	x0, x0, :lo12:.LC2
-	bl	regulator_get_by_platname
+	cbz	x0, .L3
 .LVL11:
-	.loc 1 170 0
-	cbz	w0, .L9
-	mov	w19, w0
-	.loc 1 171 0
-	adrp	x0, .LC3
-.LVL12:
-	add	x0, x0, :lo12:.LC3
-.LVL13:
-.L15:
-	.loc 1 179 0
-	bl	printf
-.LVL14:
-.L8:
-	.loc 1 181 0
-	mov	w0, w19
+.L11:
+	.loc 1 78 0
+	mov	w0, -1
+.L1:
+	.loc 1 111 0
 	ldp	x19, x20, [sp, 16]
-.LVL15:
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL12:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL16:
-.L9:
+.LVL13:
+.L3:
 	.cfi_restore_state
-	.loc 1 176 0
-	ldr	x0, [x29, 40]
+	.loc 1 67 0 discriminator 2
+	add	w27, w27, 1
+.LVL14:
+	cmp	w27, 2
+	bne	.L5
+	.loc 1 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL15:
+	cmp	w20, 32
+	bne	.L6
+	.loc 1 85 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL16:
+	.loc 1 86 0
+	mov	x0, 128
+	bl	malloc
 .LVL17:
-	mov	w1, w20
-	bl	regulator_set_value
+	mov	x21, x0
 .LVL18:
-	mov	w19, w0
+	.loc 1 87 0
+	cbnz	x0, .L7
+	.loc 1 88 0
+	adrp	x0, .LC5
 .LVL19:
-	.loc 1 177 0
-	mov	x0, 100
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC5
+	bl	printf
 .LVL20:
-	bl	udelay
+.L7:
+	adrp	x26, .LANCHOR0
+	.loc 1 91 0
+	add	x27, x22, :lo12:.LC2
 .LVL21:
-	.loc 1 178 0
-	cbz	w19, .L8
-	.loc 1 179 0
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	b	.L15
+	.loc 1 93 0
+	add	x25, x25, :lo12:.LC3
+	.loc 1 98 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 1 69 0
+	mov	w20, 0
+.LVL22:
+.L14:
+	.loc 1 92 0
+	mov	w22, 0
+	.loc 1 96 0
+	mov	w28, 1
+	.loc 1 91 0
+	mov	w1, w20
+	mov	x0, x27
+	bl	printf
+.LVL23:
+.L13:
+	.loc 1 93 0
+	mov	w1, w22
+	mov	x0, x25
+	bl	printf
+.LVL24:
+	.loc 1 96 0
+	mov	x19, 0
+	lsl	w1, w28, w22
+.LVL25:
+.L10:
+	ldr	w0, [x19, x26]
+	.loc 1 95 0
+	cbz	w20, .L8
+	.loc 1 96 0
+	eor	w0, w0, w1
+.L8:
+	.loc 1 98 0
+	str	w0, [x21, x19]
+	add	x19, x19, 4
+	.loc 1 94 0
+	cmp	x19, 128
+	bne	.L10
+	.loc 1 100 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL26:
+	.loc 1 101 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL27:
+	.loc 1 103 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL28:
+	cbnz	x0, .L11
+	.loc 1 106 0
+	cbz	w20, .L12
+	.loc 1 92 0 discriminator 2
+	add	w22, w22, 1
+.LVL29:
+	cmp	w22, 32
+	bne	.L13
+.L12:
+	.loc 1 90 0 discriminator 2
+	add	w20, w20, 1
+.LVL30:
+	cmp	w20, 2
+	bne	.L14
+	.loc 1 110 0
+	mov	w0, 0
+	b	.L1
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.weak	set_ddr_freq
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB253:
+	.file 2 "cmd/ddr_tool/ddr_tool.c"
+	.loc 2 45 0
+	.cfi_startproc
+.LVL31:
+	.loc 2 47 0
+	mov	w0, 0
+.LVL32:
+	ret
+	.cfi_endproc
+.LFE253:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.weak	set_vdd_logic
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB254:
+	.loc 2 50 0
+	.cfi_startproc
+.LVL33:
+	.loc 2 52 0
+	mov	w0, -1
+.LVL34:
+	ret
 	.cfi_endproc
-.LFE257:
+.LFE254:
 	.size	set_vdd_logic, .-set_vdd_logic
-	.section	.text.random_test,"ax",@progbits
+	.section	.text.diagonalscan,"ax",@progbits
 	.align	2
-	.global	random_test
-	.type	random_test, %function
-random_test:
-.LFB274:
-	.file 2 "cmd/ddr_tool/random_test.c"
-	.loc 2 88 0
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB268:
+	.file 3 "cmd/ddr_tool/diagonalscan.c"
+	.loc 3 16 0
 	.cfi_startproc
-.LVL22:
+.LVL35:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-.LBB12:
-.LBB13:
-	.loc 2 18 0
-	mov	x2, x1
-.LBE13:
-.LBE12:
-	.loc 2 88 0
+	.loc 3 19 0
+	mov	x2, 32
+	.loc 3 16 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	mov	x22, x0
-.LVL23:
+	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-.LBB18:
-.LBB14:
-	.loc 2 37 0
-	adrp	x21, .LC6
-.LBE14:
-.LBE18:
-	.loc 2 88 0
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	mov	x23, x1
-.LVL24:
+	sub	x23, x1, #32
+	.loc 3 19 0
+	adrp	x1, .LANCHOR1
+.LVL36:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 3 16 0
 	stp	x19, x20, [sp, 16]
-.LBB19:
-.LBB15:
-	.loc 2 18 0
-	mov	w1, -2139062144
-.LVL25:
-.LBE15:
-.LBE19:
-	.loc 2 88 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-.LBB20:
-.LBB16:
-	.loc 2 23 0
-	adrp	x24, .LC5
-	.loc 2 18 0
-	bl	memset
-.LVL26:
-	.loc 2 23 0
-	add	x24, x24, :lo12:.LC5
-	.loc 2 37 0
-	add	x21, x21, :lo12:.LC6
-	.loc 2 24 0
-	lsr	x0, x23, 2
-	.loc 2 14 0
-	mov	w27, 0
-	.loc 2 20 0
-	mov	w25, 1077952576
-	.loc 2 19 0
-	mov	w20, -2139062144
-	.loc 2 22 0
-	mov	w28, 0
-	.loc 2 24 0
-	str	x0, [x29, 96]
-.LVL27:
-.L22:
-	.loc 2 23 0
-	mov	w1, w28
-	mov	x0, x24
-	bl	printf
-.LVL28:
-	.loc 2 24 0
-	mov	w1, 0
-.LVL29:
-.L17:
-	ldr	x2, [x29, 96]
-	uxtw	x0, w1
-	cmp	x0, x2
-	bcc	.L21
-.LVL30:
-.L20:
-	.loc 2 37 0
-	mov	x0, x21
-	.loc 2 22 0
-	add	w28, w28, 1
-.LVL31:
-	.loc 2 37 0
+	.loc 3 16 0
+	mov	x25, x0
+	.loc 3 19 0
+	add	x0, x29, 80
+.LVL37:
+	bl	memcpy
+.LVL38:
+	.loc 3 24 0
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL32:
-	.loc 2 35 0
-	lsr	w25, w25, 1
-.LVL33:
-	.loc 2 36 0
-	lsr	w20, w20, 1
-.LVL34:
-	.loc 2 22 0
-	cmp	w28, 8
-	bne	.L22
-	mov	x19, -1
-	b	.L19
-.LVL35:
-.L21:
-	.loc 2 25 0
-	lsl	x0, x0, 2
-	add	x19, x22, x0
-	ldr	w2, [x22, x0]
-	str	w2, [x29, 108]
-	.loc 2 26 0
-	uxtw	x2, w2
-	cmp	w2, w20
-	beq	.L18
-.LVL36:
-	.loc 2 28 0
-	ldr	w27, [x19]
-	.loc 2 33 0
-	cmn	x19, #1
-	beq	.L20
-.LVL37:
-.L19:
-	.loc 2 39 0
+.LVL39:
+	.loc 3 25 0
+	bl	get_page_size
+.LVL40:
+	sxtw	x19, w0
+.LVL41:
+	.loc 3 27 0
+	tbz	w19, #31, .L28
+	.loc 3 28 0
+	mov	w1, w19
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.LVL38:
-	.loc 2 40 0
-	cmn	x19, #1
-	beq	.L23
-	.loc 2 41 0
-	ldr	w2, [x29, 108]
-	adrp	x0, .LC8
-	mov	w4, w20
-	mov	w3, w27
-	mov	x1, x19
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.LVL39:
-.L36:
-.LBE16:
-.LBE20:
-.LBB21:
-.LBB22:
-	.loc 2 82 0
+.LVL42:
+	.loc 3 29 0
 	mov	w0, -1
-.L16:
-.LBE22:
-.LBE21:
-	.loc 2 96 0
+.L31:
+.LVL43:
+.L27:
+	.loc 3 64 0
 	ldp	x19, x20, [sp, 16]
+.LVL44:
 	ldp	x21, x22, [sp, 32]
-.LVL40:
 	ldp	x23, x24, [sp, 48]
-.LVL41:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+.LVL45:
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -329,295 +393,276 @@ random_test:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL42:
-.L18:
-	.cfi_restore_state
-.LBB24:
-.LBB17:
-	.loc 2 31 0
-	str	w25, [x22, x0]
-	.loc 2 24 0
-	add	w1, w1, 1
-.LVL43:
-	b	.L17
-.LVL44:
-.L23:
-.LBE17:
-.LBE24:
-.LBB25:
-.LBB23:
-	.loc 2 58 0
-	adrp	x25, .LC9
-.LVL45:
-	.loc 2 76 0
-	adrp	x24, .LC10
-	.loc 2 66 0
-	lsr	x28, x23, 3
 .LVL46:
-	.loc 2 58 0
-	add	x25, x25, :lo12:.LC9
-	.loc 2 76 0
-	add	x24, x24, :lo12:.LC10
-	.loc 2 66 0
-	mov	x27, 0
-	mov	x19, 0
+.L28:
+	.cfi_restore_state
+	.loc 3 40 0
+	lsr	x22, x22, 1
 .LVL47:
-.L30:
-	.loc 2 58 0
-	mov	x1, x19
-	mov	x0, x25
-	bl	printf
+	add	x23, x25, x23
 .LVL48:
-	.loc 2 60 0
-	lsl	x20, x19, 8
-	lsl	x0, x19, 24
-	orr	x20, x20, x19, lsl 16
-	orr	x0, x0, x19, lsl 32
-	.loc 2 64 0
-	mov	x2, x23
-	.loc 2 60 0
-	orr	x20, x20, x0
-	lsl	x0, x19, 40
-	orr	x0, x0, x19, lsl 48
-	orr	x20, x20, x0
-	orr	x0, x19, x19, lsl 56
-	orr	x20, x20, x0
+	mov	w21, 0
+	mov	x20, 0
+	.loc 3 37 0
+	mov	w1, 32
+	add	x0, x29, 80
+	bl	data_cpu_2_io
 .LVL49:
-	.loc 2 64 0
-	mov	x0, x22
-	mov	w1, w20
-	bl	memset
+	.loc 3 39 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x25
+	bl	memcpy
 .LVL50:
-	.loc 2 66 0
+.L30:
+	.loc 3 40 0 discriminator 1
+	cmp	x20, x22
+	bcc	.L34
 	mov	x0, 0
 .LVL51:
-.L25:
-	cmp	x0, x28
-	bne	.L29
+	.loc 3 63 0
+	b	.L27
 .LVL52:
-.L28:
-	.loc 2 76 0
-	mov	x0, x24
+.L34:
+	.loc 3 41 0
+	uxtw	x24, w21
+	mov	x2, 32
+	sub	x26, x23, x24
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
 .LVL53:
-	.loc 2 57 0
-	add	x19, x19, 1
+	.loc 3 44 0
+	add	x2, x20, x25
+	.loc 3 43 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x24
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
 .LVL54:
-	.loc 2 76 0
-	bl	printf
+	.loc 3 45 0
+	cbnz	x0, .L27
+	.loc 3 48 0
+	add	x24, x24, 40
+	add	x20, x20, x19
 .LVL55:
-	.loc 2 57 0
-	cmp	x19, 256
-	bne	.L30
-	mov	x21, -1
-	b	.L27
+	cmp	x19, x24
+	add	w21, w21, 8
 .LVL56:
-.L29:
-	lsl	x1, x0, 3
-	add	x21, x1, x22
-	.loc 2 67 0
-	ldr	x26, [x1, x22]
+	csel	w21, w21, wzr, cs
 .LVL57:
-	.loc 2 68 0
-	cmp	x20, x26
-	beq	.L26
+	.loc 3 50 0
+	cmp	x22, x20
+	bls	.L33
+	.loc 3 51 0
+	add	x0, x25, x20
 .LVL58:
-	.loc 2 70 0
-	ldr	x27, [x21]
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
 .LVL59:
-	.loc 2 74 0
-	cmn	x21, #1
-	beq	.L28
-.LVL60:
-.L27:
-	.loc 2 78 0
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
-	bl	printf
-.LVL61:
-	.loc 2 84 0
-	mov	w0, 0
-	.loc 2 79 0
-	cmn	x21, #1
-	beq	.L16
-	.loc 2 80 0
-	mov	x4, x20
-	mov	x3, x27
+.L33:
+	.loc 3 53 0
+	mov	x3, 32
+	mov	w4, 1
 	mov	x2, x26
-	mov	x1, x21
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
-	bl	printf
-.LVL62:
-	b	.L36
-.LVL63:
-.L26:
-	.loc 2 66 0
-	add	x0, x0, 1
-.LVL64:
-	b	.L25
-.LBE23:
-.LBE25:
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x23, x23, x19
+	bl	cmp_buf_data
+.LVL60:
+	.loc 3 56 0
+	cbz	x0, .L30
+	b	.L27
 	.cfi_endproc
-.LFE274:
-	.size	random_test, .-random_test
-	.section	.text.scan_freq,"ax",@progbits
+.LFE268:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.random_test,"ax",@progbits
 	.align	2
-	.type	scan_freq, %function
-scan_freq:
-.LFB255:
-	.loc 1 104 0
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB271:
+	.file 4 "cmd/ddr_tool/random_test.c"
+	.loc 4 97 0
 	.cfi_startproc
-.LVL65:
-	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
+.LVL61:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB6:
+.LBB7:
+	.loc 4 19 0
+	mov	x2, x1
+.LBE7:
+.LBE6:
+	.loc 4 97 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	mov	w20, w0
-	stp	x23, x24, [sp, 48]
-	.loc 1 111 0
-	mov	w0, 16960
-.LVL66:
-	.loc 1 104 0
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x1
 	stp	x21, x22, [sp, 32]
-	.loc 1 111 0
-	movk	w0, 0xf, lsl 16
-	.loc 1 104 0
+	mov	x19, x0
+.LVL62:
+	stp	x23, x24, [sp, 48]
+.LBB12:
+.LBB8:
+	.loc 4 19 0
+	mov	w1, -2139062144
+.LVL63:
+.LBE8:
+.LBE12:
+	.loc 4 97 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+.LBB13:
+.LBB9:
+	.loc 4 24 0
+	adrp	x24, .LC8
+.LBE9:
+.LBE13:
+	.loc 4 97 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	mov	x24, x2
-	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	.loc 1 111 0
-	cmp	w20, w0
-	bls	.L38
-	.loc 1 112 0
-	udiv	w20, w20, w0
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB14:
+.LBB10:
+	.loc 4 19 0
+	bl	memset
+.LVL64:
+	.loc 4 25 0
+	lsr	x0, x20, 2
+	.loc 4 24 0
+	add	x24, x24, :lo12:.LC8
+	.loc 4 25 0
+	str	x0, [x29, 104]
+	.loc 4 15 0
+	mov	w27, 0
+	.loc 4 41 0
+	adrp	x0, .LC9
+	.loc 4 21 0
+	mov	w23, 1077952576
+	.loc 4 41 0
+	add	x0, x0, :lo12:.LC9
+	.loc 4 20 0
+	mov	w21, -2139062144
+	.loc 4 23 0
+	mov	w22, 0
+	.loc 4 41 0
+	str	x0, [x29, 96]
+.LVL65:
+.L43:
+	.loc 4 24 0
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
+.LVL66:
+	.loc 4 25 0
+	mov	w1, 0
 .LVL67:
 .L38:
-	.loc 1 113 0
-	cmp	w1, w0
-	bls	.L39
-	.loc 1 114 0
-	udiv	w1, w1, w0
+	ldr	x2, [x29, 104]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L42
 .LVL68:
-.L39:
-	.loc 1 116 0
-	cmp	w20, w1
-	bls	.L40
-	mov	w0, w20
-	mov	w20, w1
+.L41:
+	.loc 4 41 0
+	ldr	x0, [x29, 96]
+	.loc 4 23 0
+	add	w22, w22, 1
 .LVL69:
-	mov	w1, w0
+	.loc 4 39 0
+	lsr	w23, w23, 1
 .LVL70:
-.L40:
-	.loc 1 125 0
-	mov	w25, 16960
-	.loc 1 126 0
-	adrp	x22, .LC13
-	.loc 1 129 0
-	adrp	x23, .LC14
-	.loc 1 121 0
-	sub	w19, w1, w20
+	.loc 4 40 0
+	lsr	w21, w21, 1
 .LVL71:
-	.loc 1 126 0
-	add	x22, x22, :lo12:.LC13
-	.loc 1 129 0
-	add	x23, x23, :lo12:.LC14
-	.loc 1 123 0
-	mov	w21, 0
-	.loc 1 125 0
-	movk	w25, 0xf, lsl 16
+	.loc 4 41 0
+	bl	printf
 .LVL72:
-.L41:
-	.loc 1 123 0 discriminator 1
-	cmp	x24, x21, uxtw
-	bhi	.L45
-	.loc 1 123 0 is_stmt 0 discriminator 3
-	cbnz	x24, .L46
-.L45:
-	.loc 1 124 0 is_stmt 1
-	bl	rand
+	.loc 4 23 0
+	cmp	w22, 8
+	bne	.L43
+	mov	x28, -1
+	b	.L40
 .LVL73:
-	udiv	w1, w0, w19
-	msub	w0, w1, w19, w0
+.L42:
+	.loc 4 26 0
+	lsl	x0, x0, 2
+	add	x5, x19, x0
+	ldr	w26, [x19, x0]
+	.loc 4 27 0
+	cmp	w26, w21
+	beq	.L39
+	.loc 4 28 0
+	mov	x28, x5
 .LVL74:
-	add	w0, w0, w20
-	.loc 1 125 0
-	mul	w0, w0, w25
-	and	x0, x0, 4294967232
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 4 29 0
+	add	x1, x5, 4
 .LVL75:
-	.loc 1 126 0
-	mov	w1, w21
-	mov	w2, w0
-	.loc 1 125 0
-	mov	x26, x0
+	mov	x0, x5
+	bl	flush_dcache_range
 .LVL76:
-	.loc 1 126 0
-	mov	x0, x22
+	.loc 4 37 0
+	cmn	x28, #1
+	.loc 4 32 0
+	ldr	w27, [x28]
+	.loc 4 37 0
+	beq	.L41
 .LVL77:
+.L40:
+	.loc 4 43 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
 .LVL78:
-	.loc 1 127 0
-	uxtw	x0, w26
-	bl	rockchip_ddrclk_sip_set_rate_v2
-.LVL79:
-	.loc 1 128 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
-.LVL80:
-	.loc 1 129 0
-	mov	w1, w0
-	.loc 1 128 0
-	mov	x27, x0
-.LVL81:
-	.loc 1 129 0
-	mov	x0, x23
-.LVL82:
-	bl	printf
-.LVL83:
-	.loc 1 132 0
-	ldr	x0, [x18]
-	mov	x1, 1048576
-	ldr	x0, [x0, 136]
-	bl	random_test
-.LVL84:
-	mov	w26, w0
-.LVL85:
-	.loc 1 133 0
-	cbz	w0, .L42
-	.loc 1 134 0
-	adrp	x0, .LC15
-.LVL86:
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC15
+	.loc 4 44 0
+	cmn	x28, #1
+	beq	.L44
+	.loc 4 45 0
+	adrp	x0, .LC11
+	mov	w4, w21
+	mov	w3, w27
+	mov	w2, w26
+	mov	x1, x28
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.LVL87:
+.LVL79:
+.L57:
+.LBE10:
+.LBE14:
+.LBB15:
+.LBB16:
+	.loc 4 91 0
+	mov	w0, -1
 .L37:
-	.loc 1 144 0
-	mov	w0, w26
-	ldr	x27, [sp, 80]
+.LBE16:
+.LBE15:
+	.loc 4 105 0
 	ldp	x19, x20, [sp, 16]
-.LVL88:
+.LVL80:
 	ldp	x21, x22, [sp, 32]
-.LVL89:
 	ldp	x23, x24, [sp, 48]
-.LVL90:
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
+	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -628,328 +673,275 @@ scan_freq:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL91:
-.L42:
+.LVL81:
+.L39:
 	.cfi_restore_state
-	.loc 1 137 0
-	bl	ctrlc
-.LVL92:
-	cbz	w0, .L44
-.LVL93:
-.L46:
-	.loc 1 123 0
-	mov	w26, 0
-	b	.L37
-.LVL94:
+.LBB18:
+.LBB11:
+	.loc 4 35 0
+	str	w23, [x19, x0]
+	.loc 4 25 0
+	add	w1, w1, 1
+.LVL82:
+	b	.L38
+.LVL83:
 .L44:
-	.loc 1 123 0 is_stmt 0 discriminator 2
-	add	w21, w21, 1
-.LVL95:
-	b	.L41
-	.cfi_endproc
-.LFE255:
-	.size	scan_freq, .-scan_freq
-	.section	.text.cpu_2_io,"ax",@progbits
-	.align	2
-	.global	cpu_2_io
-	.type	cpu_2_io, %function
-cpu_2_io:
-.LFB275:
-	.file 3 "cmd/ddr_tool/tool_common.c"
-	.loc 3 11 0 is_stmt 1
-	.cfi_startproc
-.LVL96:
-	ret
-	.cfi_endproc
-.LFE275:
-	.size	cpu_2_io, .-cpu_2_io
-	.section	.text.write_buf_to_ddr,"ax",@progbits
-	.align	2
-	.global	write_buf_to_ddr
-	.type	write_buf_to_ddr, %function
-write_buf_to_ddr:
-.LFB276:
-	.loc 3 29 0
-	.cfi_startproc
+.LBE11:
+.LBE18:
+.LBB19:
+.LBB17:
+	.loc 4 64 0
+	adrp	x26, .LC12
+	.loc 4 84 0
+	adrp	x24, .LC13
+	.loc 4 72 0
+	lsr	x28, x20, 3
+	.loc 4 64 0
+	add	x26, x26, :lo12:.LC12
+	.loc 4 84 0
+	add	x24, x24, :lo12:.LC13
+	.loc 4 72 0
+	mov	x27, 0
+	mov	x21, 0
+.LVL84:
+.L51:
+	.loc 4 64 0
+	mov	x1, x21
+	mov	x0, x26
+	bl	printf
+.LVL85:
+	.loc 4 66 0
+	lsl	x22, x21, 24
+	lsl	x0, x21, 8
+	orr	x22, x22, x21, lsl 32
+	orr	x0, x0, x21, lsl 16
+	.loc 4 70 0
+	mov	x2, x20
+	.loc 4 66 0
+	orr	x22, x22, x0
+	lsl	x0, x21, 40
+	orr	x0, x0, x21, lsl 48
+	orr	x22, x22, x0
+	orr	x0, x21, x21, lsl 56
+	orr	x22, x22, x0
+.LVL86:
+	.loc 4 70 0
+	mov	x0, x19
+	mov	w1, w22
+	bl	memset
+.LVL87:
+	.loc 4 72 0
+	mov	x0, 0
+.LVL88:
+.L46:
+	cmp	x0, x28
+	bne	.L50
+.LVL89:
+.L49:
+	.loc 4 84 0
+	mov	x0, x24
+	.loc 4 63 0
+	add	x21, x21, 1
+.LVL90:
+	.loc 4 84 0
+	bl	printf
+.LVL91:
+	.loc 4 63 0
+	cmp	x21, 256
+	bne	.L51
+	mov	x23, -1
+	b	.L48
+.LVL92:
+.L50:
+	lsl	x1, x0, 3
+	add	x23, x1, x19
+	.loc 4 73 0
+	ldr	x25, [x1, x19]
+.LVL93:
+	.loc 4 74 0
+	cmp	x22, x25
+	beq	.L47
+.LVL94:
+	.loc 4 76 0
+	add	x1, x23, 4
+	mov	x0, x23
+.LVL95:
+	bl	flush_dcache_range
+.LVL96:
+	.loc 4 78 0
+	ldr	x27, [x23]
 .LVL97:
-	.loc 3 37 0
-	lsr	w1, w1, 3
+	.loc 4 82 0
+	cmn	x23, #1
+	beq	.L49
 .LVL98:
-	.loc 3 39 0
-	lsr	x3, x3, 3
+.L48:
+	.loc 4 86 0
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
 .LVL99:
-	.loc 3 37 0
-	sub	w1, w1, #1
+	.loc 4 93 0
+	mov	w0, 0
+	.loc 4 87 0
+	cmn	x23, #1
+	beq	.L37
+	.loc 4 88 0
+	mov	x4, x22
+	mov	x3, x27
+	mov	x2, x25
+	mov	x1, x23
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
 .LVL100:
-	.loc 3 39 0
-	mov	w4, 0
-	mov	w5, 0
+	b	.L57
 .LVL101:
-.L53:
-	.loc 3 39 0 is_stmt 0 discriminator 1
-	uxtw	x6, w5
-	cmp	x6, x3
-	bcc	.L54
-	.loc 3 44 0 is_stmt 1
-	ret
-.L54:
-	.loc 3 40 0 discriminator 3
-	ldr	x7, [x0, w4, uxtw 3]
-	.loc 3 41 0 discriminator 3
-	add	w4, w4, 1
+.L47:
+	.loc 4 72 0
+	add	x0, x0, 1
 .LVL102:
-	.loc 3 40 0 discriminator 3
-	str	x7, [x2, x6, lsl 3]
-	.loc 3 42 0 discriminator 3
-	and	w4, w1, w4
-.LVL103:
-	.loc 3 39 0 discriminator 3
-	add	w5, w5, 1
-.LVL104:
-	b	.L53
+	b	.L46
+.LBE17:
+.LBE19:
 	.cfi_endproc
-.LFE276:
-	.size	write_buf_to_ddr, .-write_buf_to_ddr
-	.section	.text.cmp_buf_data,"ax",@progbits
+.LFE271:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
 	.align	2
-	.global	cmp_buf_data
-	.type	cmp_buf_data, %function
-cmp_buf_data:
-.LFB277:
-	.loc 3 48 0
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 2 55 0
 	.cfi_startproc
-.LVL105:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 60 0
-	lsr	w1, w1, 3
-.LVL106:
-	.loc 3 48 0
-	mov	w10, w4
-	.loc 3 60 0
-	sub	w1, w1, #1
-	.loc 3 48 0
+.LVL103:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 62 0
-	lsr	x3, x3, 3
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	.loc 2 61 0
+	mov	w0, 16960
+.LVL104:
+	.loc 2 55 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 61 0
+	movk	w0, 0xf, lsl 16
+	.loc 2 55 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 55 0
+	mov	x22, x2
+	.loc 2 61 0
+	cmp	w19, w0
+	bls	.L59
+	.loc 2 62 0
+	udiv	w19, w19, w0
+.LVL105:
+.L59:
+	.loc 2 63 0
+	cmp	w1, w0
+	bls	.L60
+	.loc 2 64 0
+	udiv	w1, w1, w0
+.LVL106:
+.L60:
+	.loc 2 66 0
+	cmp	w19, w1
+	bls	.L61
+	mov	w0, w19
+	mov	w19, w1
 .LVL107:
-	.loc 3 48 0
-	mov	x8, x2
+	mov	w1, w0
 .LVL108:
-	.loc 3 62 0
-	mov	w6, 0
-	.loc 3 56 0
-	mov	x2, 0
+.L61:
+	.loc 2 75 0
+	mov	w25, 16960
+	adrp	x24, .LC16
+	.loc 2 71 0
+	sub	w21, w1, w19
 .LVL109:
-	.loc 3 62 0
-	mov	w7, 0
-	.loc 3 48 0
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
+	.loc 2 75 0
+	add	x24, x24, :lo12:.LC16
+	.loc 2 73 0
+	mov	w23, 0
+	.loc 2 75 0
+	movk	w25, 0xf, lsl 16
 .LVL110:
-.L56:
-	.loc 3 62 0 discriminator 1
-	uxtw	x5, w7
-	cmp	x5, x3
-	bcc	.L59
-	.loc 3 61 0
-	mov	x19, 0
-	.loc 3 54 0
-	mov	x3, 0
-	.loc 3 55 0
-	mov	x4, 0
-	b	.L58
-.L59:
-	.loc 3 63 0
-	lsl	x5, x5, 3
-	.loc 3 64 0
-	ldr	x4, [x0, w6, uxtw 3]
-	.loc 3 63 0
-	add	x19, x8, x5
-	ldr	x2, [x8, x5]
+.L62:
+	.loc 2 73 0 discriminator 1
+	cmp	x22, x23, uxtw
+	bhi	.L66
+	.loc 2 73 0 is_stmt 0 discriminator 3
+	cbnz	x22, .L67
+.L66:
+	.loc 2 74 0 is_stmt 1
+	bl	rand
 .LVL111:
-	.loc 3 64 0
-	cmp	x2, x4
-	beq	.L57
-	.loc 3 65 0
-	ldr	x3, [x19]
+	udiv	w20, w0, w21
+	.loc 2 75 0
+	mov	w1, w23
+	.loc 2 74 0
+	msub	w20, w20, w21, w0
+	.loc 2 75 0
+	mov	x0, x24
 .LVL112:
-.L58:
-	.loc 3 73 0
-	cmp	x19, 0
-	ccmp	w10, 0, 4, ne
-	beq	.L55
-	.loc 3 74 0
-	adrp	x0, .LC16
+	.loc 2 74 0
+	add	w20, w20, w19
+	.loc 2 75 0
+	mul	w20, w20, w25
+	mov	w2, w20
+	bl	printf
 .LVL113:
-	mov	x1, x19
+	.loc 2 76 0
+	and	x0, x20, 4294967232
+	bl	set_ddr_freq
 .LVL114:
-	add	x0, x0, :lo12:.LC16
-	bl	printf
+	mov	w26, w0
 .LVL115:
-.L55:
-	.loc 3 78 0
-	mov	x0, x19
-	ldr	x19, [sp, 16]
+	.loc 2 79 0
+	ldr	x0, [x18]
 .LVL116:
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
 .LVL117:
-.L57:
-	.cfi_restore_state
-	.loc 3 70 0 discriminator 2
-	add	w6, w6, 1
+	mov	w20, w0
 .LVL118:
-	.loc 3 62 0 discriminator 2
-	add	w7, w7, 1
-.LVL119:
-	.loc 3 71 0 discriminator 2
-	and	w6, w1, w6
-.LVL120:
-	b	.L56
-	.cfi_endproc
-.LFE277:
-	.size	cmp_buf_data, .-cmp_buf_data
-	.section	.text.crosstalk,"ax",@progbits
-	.align	2
-	.global	crosstalk
-	.type	crosstalk, %function
-crosstalk:
-.LFB200:
-	.file 4 "cmd/ddr_tool/crosstalk.c"
-	.loc 4 46 0
-	.cfi_startproc
-.LVL121:
-	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
-	.loc 4 71 0
-	add	x20, x29, 112
-	.loc 4 46 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	.loc 4 63 0
+	.loc 2 80 0
+	cbz	w0, .L63
+	.loc 2 81 0
 	adrp	x0, .LC17
-.LVL122:
-	.loc 4 46 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	mov	x23, x1
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.loc 4 63 0
-	add	x0, x0, :lo12:.LC17
-	.loc 4 68 0
-	adrp	x24, .LC19
-	.loc 4 63 0
-	bl	printf
-.LVL123:
-	.loc 4 68 0
-	add	x27, x24, :lo12:.LC19
-	.loc 4 66 0
-	adrp	x21, .LC18
-	.loc 4 64 0
-	mov	w19, 0
-	.loc 4 66 0
-	add	x0, x21, :lo12:.LC18
-	str	x0, [x29, 104]
-.LVL124:
-.L70:
-	ldr	x0, [x29, 104]
-	.loc 4 71 0
-	mov	w25, 1
-	.loc 4 66 0
-	mov	w1, w19
-	.loc 4 71 0
-	lsl	w25, w25, w19
-	.loc 4 65 0
-	mov	w28, -1
-	.loc 4 67 0
-	mov	w26, 0
-	.loc 4 66 0
-	bl	printf
-.LVL125:
-.L69:
-	.loc 4 68 0
+.LVL119:
 	mov	w1, w26
-	mov	x0, x27
-	.loc 4 69 0
-	mvn	w28, w28
-.LVL126:
-	.loc 4 68 0
+	add	x0, x0, :lo12:.LC17
 	bl	printf
-.LVL127:
-	.loc 4 69 0
-	mov	x8, 0
-.LVL128:
-.L66:
-	.loc 4 71 0 discriminator 3
-	eor	w0, w25, w28
-	str	w0, [x8, x20]
-	add	x8, x8, 4
-	.loc 4 72 0 discriminator 3
-	mvn	w28, w28
-.LVL129:
-	.loc 4 70 0 discriminator 3
-	cmp	x8, 32
-	bne	.L66
-	.loc 4 77 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
-.LVL130:
-	.loc 4 78 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
-.LVL131:
-	cbz	x0, .L67
-.LVL132:
-.L75:
-	.loc 4 80 0
-	mov	w0, -1
-.L65:
-	.loc 4 115 0
+.LVL120:
+.L58:
+	.loc 2 91 0
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
+.LVL121:
 	ldp	x21, x22, [sp, 32]
-.LVL133:
+.LVL122:
 	ldp	x23, x24, [sp, 48]
-.LVL134:
+.LVL123:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-.LVL135:
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -960,1114 +952,623 @@ crosstalk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL136:
-.L67:
+.LVL124:
+.L63:
 	.cfi_restore_state
-	.loc 4 67 0 discriminator 2
-	add	w26, w26, 1
-.LVL137:
-	cmp	w26, 2
-	bne	.L69
-	.loc 4 64 0 discriminator 2
-	add	w19, w19, 1
-.LVL138:
-	cmp	w19, 32
-	bne	.L70
-	.loc 4 87 0
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	.loc 2 84 0
+	bl	ctrlc
+.LVL125:
+	cbz	w0, .L65
+.LVL126:
+.L67:
+	.loc 2 73 0
+	mov	w20, 0
+	b	.L58
+.LVL127:
+.L65:
+	.loc 2 73 0 is_stmt 0 discriminator 2
+	add	w23, w23, 1
+.LVL128:
+	b	.L62
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB256:
+	.loc 2 100 0 is_stmt 1
+	.cfi_startproc
+.LVL129:
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+	.loc 2 113 0
+	adrp	x0, .LC18
+.LVL130:
+	add	x0, x0, :lo12:.LC18
+	.loc 2 100 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+	.loc 2 115 0
+	add	x20, x29, 152
+	.loc 2 100 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+	.loc 2 115 0
+	add	x21, x29, 120
+	.loc 2 100 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	mov	w23, w2
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+	.loc 2 103 0
+	stp	xzr, xzr, [x29, 184]
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
+.LVL131:
+	.loc 2 113 0
 	bl	printf
-.LVL139:
-	.loc 4 88 0
-	mov	x0, 128
-	bl	malloc
-.LVL140:
-	mov	x20, x0
+.LVL132:
+	.loc 2 115 0
+	mov	w2, 1
+	mov	x1, x20
+	mov	x0, x21
+	bl	get_print_available_addr
+.LVL133:
+	.loc 2 117 0
+	cmp	w23, 1
+	ble	.L160
+	.loc 2 121 0
+	adrp	x24, .LANCHOR2
+	add	x27, x24, :lo12:.LANCHOR2
+	mov	x25, 0
+	str	x24, [x29, 104]
+.L75:
+	ldr	x1, [x27, x25, lsl 3]
+	mov	w19, w25
+.LVL134:
+	ldr	x0, [x26, 8]
+	bl	strcasecmp
+.LVL135:
+	cbz	w0, .L74
+.LVL136:
+	add	x25, x25, 1
+	.loc 2 120 0 discriminator 2
+	cmp	x25, 7
+	bne	.L75
+	.loc 2 128 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L161
+.LVL137:
+.L112:
+	.loc 2 133 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+.LVL138:
+.L161:
+	.loc 2 128 0
+	bl	printf
+.LVL139:
+.L160:
+	.loc 2 129 0
+	mov	w23, -1
+	b	.L72
+.LVL140:
+.L78:
+	.loc 2 138 0
+	add	x0, x26, x27
+	add	x1, x29, 184
+	add	x2, x1, x27
+	mov	w1, 0
+	add	x27, x27, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
 .LVL141:
-	.loc 4 89 0
-	cbnz	x0, .L71
-	.loc 4 90 0
-	adrp	x0, .LC21
+	tbz	w0, #31, .L77
+	.loc 2 139 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	b	.L161
 .LVL142:
-	mov	x1, 128
-	add	x0, x0, :lo12:.LC21
-	bl	printf
+.L79:
+	.loc 2 157 0
+	bl	data_cpu_2_io_init
 .LVL143:
-.L71:
-	adrp	x25, .LANCHOR0
-	.loc 4 93 0
-	add	x26, x21, :lo12:.LC18
+	.loc 2 159 0
+	cbnz	w19, .L80
+	.loc 2 161 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L81
+	.loc 2 162 0
+	bl	set_vdd_logic
 .LVL144:
-	.loc 4 95 0
-	add	x24, x24, :lo12:.LC19
-	.loc 4 100 0
-	add	x25, x25, :lo12:.LANCHOR0
-	.loc 4 69 0
-	mov	w19, 0
+.L81:
+	.loc 2 163 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL145:
-.L78:
-	.loc 4 94 0
-	mov	w21, 0
-	.loc 4 98 0
-	mov	w27, 1
-	.loc 4 93 0
-	mov	w1, w19
-	mov	x0, x26
+.L82:
+	.loc 2 305 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 .LVL146:
-.L77:
-	.loc 4 95 0
-	mov	w1, w21
-	mov	x0, x24
-	bl	printf
+	b	.L72
 .LVL147:
-	.loc 4 98 0
-	lsl	w1, w27, w21
-	mov	x8, 0
+.L80:
+	.loc 2 164 0
+	cmp	w19, 1
+	bne	.L83
+	.loc 2 166 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L84
+	.loc 2 167 0
+	bl	set_vdd_logic
 .LVL148:
-.L74:
-	ldr	w0, [x8, x25]
-	.loc 4 97 0
-	cbz	w19, .L72
-	.loc 4 98 0
-	eor	w0, w0, w1
-.L72:
-	.loc 4 100 0
-	str	w0, [x20, x8]
-	add	x8, x8, 4
-	.loc 4 96 0
-	cmp	x8, 128
-	bne	.L74
-	.loc 4 105 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
+.L84:
+	.loc 2 168 0
+	ldr	w0, [x29, 184]
+	ldr	w1, [x29, 192]
+	ldr	x2, [x29, 200]
+	bl	scan_freq
 .LVL149:
-	.loc 4 107 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
+	b	.L82
+.L83:
+	.loc 2 169 0
+	sub	w25, w25, #5
+	cmp	w25, 1
+	bhi	.L85
+	.loc 2 171 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L86
+	.loc 2 172 0
+	bl	set_vdd_logic
 .LVL150:
-	cbnz	x0, .L75
-	.loc 4 110 0
-	cbz	w19, .L76
-	.loc 4 94 0 discriminator 2
-	add	w21, w21, 1
+.L86:
+	.loc 2 173 0
+	cmp	w19, 5
+	bne	.L114
+	.loc 2 175 0
+	mov	x1, 65535
+	mov	x0, 0
+	movk	x1, 0x9f, lsl 16
+.L90:
 .LVL151:
-	cmp	w21, 32
-	bne	.L77
-.L76:
-	.loc 4 92 0 discriminator 2
-	add	w19, w19, 1
+	ldr	x2, [x20, x0, lsl 3]
+	cmp	x2, x1
+	bls	.L88
+	.loc 2 176 0
+	mov	w1, w0
 .LVL152:
-	cmp	w19, 2
-	bne	.L78
-	.loc 4 114 0
-	mov	w0, 0
-	b	.L65
-	.cfi_endproc
-.LFE200:
-	.size	crosstalk, .-crosstalk
-	.section	.text.diagonalscan,"ax",@progbits
-	.align	2
-	.global	diagonalscan
-	.type	diagonalscan, %function
-diagonalscan:
-.LFB271:
-	.file 5 "cmd/ddr_tool/diagonalscan.c"
-	.loc 5 49 0
-	.cfi_startproc
+	.loc 2 185 0
+	mov	x2, 10485760
+	str	x2, [x20, w0, uxtw 3]
 .LVL153:
-	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 55 0
-	mov	x2, 32
-	.loc 5 49 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	mov	x19, x1
-	.loc 5 55 0
-	adrp	x1, .LANCHOR1
+.L89:
+	.loc 2 108 0 discriminator 1
+	mov	x0, 0
 .LVL154:
-	add	x1, x1, :lo12:.LANCHOR1
-	.loc 5 49 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	.loc 5 55 0
-	add	x0, x29, 80
+.L93:
+	.loc 2 188 0
+	cmp	w1, w0
+	beq	.L92
+	.loc 2 190 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 2 191 0
+	str	xzr, [x20, x0, lsl 3]
+.L92:
 .LVL155:
-	.loc 5 49 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 55 0
-	bl	memcpy
+	add	x0, x0, 1
 .LVL156:
-	.loc 5 60 0
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
-	bl	printf
+	.loc 2 187 0 discriminator 2
+	cmp	x0, 4
+	bne	.L93
+	.loc 2 193 0
+	mov	w28, 60
+.L87:
 .LVL157:
-.LBB29:
-.LBB30:
-.LBB31:
-	.loc 5 19 0
-	mov	x0, 520
-	movk	x0, 0xff01, lsl 16
-	ldr	w20, [x0]
+	.loc 2 201 0
+	adrp	x26, .LC22
 .LVL158:
-#APP
-// 19 "cmd/ddr_tool/diagonalscan.c" 1
-	dmb sy
-// 0 "" 2
+	.loc 2 205 0
+	adrp	x27, .LC23
+	.loc 2 201 0
+	add	x26, x26, :lo12:.LC22
+	.loc 2 205 0
+	add	x27, x27, :lo12:.LC23
+	.loc 2 198 0
+	mov	w25, 0
 .LVL159:
-#NO_APP
-.LBE31:
-.LBE30:
-.LBE29:
-	.loc 5 75 0
-	mov	x2, 32
-	add	x1, x29, 80
-	mov	x0, x23
-	bl	memcpy
+.L94:
+	.loc 2 199 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L100
+	.loc 2 199 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bls	.L82
+.L100:
+	.loc 2 201 0 is_stmt 1
+	mov	x19, 0
+	.loc 2 200 0
+	add	w25, w25, 1
 .LVL160:
-.LBB34:
-.LBB32:
-	.loc 5 40 0
-	ubfx	x0, x20, 9, 2
-	.loc 5 41 0
-	ubfx	x20, x20, 2, 2
+	.loc 2 201 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL161:
-	.loc 5 40 0
-	add	w0, w0, 9
-	.loc 5 41 0
-	mov	w1, 2
-	asr	w20, w1, w20
-.LBE32:
-.LBE34:
-	.loc 5 76 0
-	lsr	x24, x19, 1
-.LBB35:
-.LBB33:
-	.loc 5 43 0
-	add	w0, w0, w20
-	sub	x19, x19, #32
+.L98:
+	.loc 2 203 0
+	ldr	x3, [x20, x19, lsl 3]
+	cbz	x3, .L95
+	.loc 2 205 0
+	ldr	x2, [x21, x19, lsl 3]
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
 .LVL162:
-	mov	w25, 1
-	add	x19, x19, x23
+	.loc 2 207 0
+	ldr	x0, [x29, 192]
+	bl	set_ddr_freq
 .LVL163:
-	lsl	w25, w25, w0
-.LBE33:
-.LBE35:
-	.loc 5 76 0
-	mov	w21, 0
-	mov	x20, 0
+	.loc 2 208 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL164:
-.L90:
-	.loc 5 76 0 is_stmt 0 discriminator 1
-	cmp	x20, x24
-	bcc	.L94
-	mov	x0, 0
-	b	.L91
-.L94:
-	.loc 5 77 0 is_stmt 1
-	uxtw	x22, w21
-	mov	x2, 32
-	sub	x26, x19, x22
-	add	x1, x29, 80
-	mov	x0, x26
-	bl	memcpy
+	mov	w24, w0
 .LVL165:
-	.loc 5 80 0
-	add	x2, x20, x23
-	.loc 5 79 0
-	mov	x3, 32
-	mov	w4, 1
-	add	x2, x2, x22
-	mov	w1, w3
-	add	x0, x29, 80
-	bl	cmp_buf_data
+	.loc 2 210 0
+	cbnz	w0, .L115
+	.loc 2 211 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL166:
-	.loc 5 81 0
-	cbnz	x0, .L91
-	.loc 5 84 0
-	add	x22, x22, 40
-	add	x20, x20, x25
+	bl	crosstalk
 .LVL167:
-	cmp	x25, x22
-	add	w21, w21, 8
+	mov	w24, w0
 .LVL168:
-	csel	w21, w21, wzr, cs
+	.loc 2 215 0
+	cbnz	w0, .L116
+	.loc 2 216 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL169:
-	.loc 5 86 0
-	cmp	x24, x20
-	bls	.L93
-	.loc 5 87 0
-	add	x0, x23, x20
+	bl	diagonalscan
 .LVL170:
-	mov	x2, 32
-	add	x1, x29, 80
-	add	x0, x0, x21, uxtw
-	bl	memcpy
+	mov	w24, w0
 .LVL171:
-.L93:
-	.loc 5 89 0
-	mov	x3, 32
-	mov	w4, 1
-	mov	x2, x26
-	mov	w1, w3
-	add	x0, x29, 80
-	sub	x19, x19, x25
-	bl	cmp_buf_data
+	.loc 2 220 0
+	cbnz	w0, .L117
+	.loc 2 221 0
+	ldr	w0, [x29, 184]
 .LVL172:
-	.loc 5 92 0
-	cbz	x0, .L90
+	and	x2, x28, 1020
+	ldr	w1, [x29, 192]
+	.loc 2 224 0
+	mov	w22, 1
+	.loc 2 221 0
+	bl	scan_freq
 .LVL173:
-.L91:
-	.loc 5 100 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	mov	w24, w0
 .LVL174:
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE271:
-	.size	diagonalscan, .-diagonalscan
-	.section	.text.do_ddr_test,"ax",@progbits
-	.align	2
-	.type	do_ddr_test, %function
-do_ddr_test:
-.LFB258:
-	.loc 1 190 0
-	.cfi_startproc
+.L96:
+	.loc 2 226 0
+	ldr	x0, [x29, 184]
 .LVL175:
-	stp	x29, x30, [sp, -240]!
-	.cfi_def_cfa_offset 240
-	.cfi_offset 29, -240
-	.cfi_offset 30, -232
-.LBB40:
-.LBB41:
-	.loc 1 50 0
-	mov	x0, 0
+	bl	set_ddr_freq
 .LVL176:
-.LBE41:
-.LBE40:
-	.loc 1 190 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -208
-	.cfi_offset 22, -200
-	mov	w22, w2
-	stp	x19, x20, [sp, 16]
-.LBB48:
-.LBB42:
-	.loc 1 50 0
-	mov	x2, x18
+	.loc 2 227 0
+	cbnz	w24, .L118
+	.loc 2 228 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL177:
-.LBE42:
-.LBE48:
-	.loc 1 190 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
-.LBB49:
-.LBB43:
-	.loc 1 52 0
-	add	x20, x29, 136
-.LBE43:
-.LBE49:
-	.loc 1 190 0
-	mov	x25, x3
-.LBB50:
-.LBB44:
-	.loc 1 53 0
-	add	x21, x29, 168
-.LBE44:
-.LBE50:
-	.loc 1 190 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-.LBB51:
-.LBB45:
-	.loc 1 47 0
-	mov	w24, 0
-.LBE45:
-.LBE51:
-	.loc 1 190 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -160
-	.cfi_offset 28, -152
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 200]
-	stp	xzr, xzr, [x29, 216]
-	str	xzr, [x29, 232]
+	mov	w2, w0
 .LVL178:
-.L99:
-.LBB52:
-.LBB46:
-	.loc 1 50 0
-	ldr	x1, [x2]
-	ubfiz	x3, x0, 4, 32
-	.loc 1 52 0
-	str	xzr, [x20, x0, lsl 3]
-	.loc 1 50 0
-	add	x1, x1, x3
-	.loc 1 53 0
-	str	xzr, [x21, x0, lsl 3]
-	.loc 1 50 0
-	ldr	x1, [x1, 136]
-	cmp	x1, 0
-	csinc	w24, w24, w0, eq
+	.loc 2 232 0
+	cbnz	w0, .L119
+	.loc 2 233 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL179:
-	add	x0, x0, 1
+	str	w2, [x29, 100]
+	bl	crosstalk
 .LVL180:
-	.loc 1 49 0
-	cmp	x0, 4
-	bne	.L99
-	mov	x0, 0
-.L100:
+	mov	w22, w0
 .LVL181:
-	.loc 1 56 0
-	cmp	w0, w24
-	bcc	.L101
-	.loc 1 61 0
-	sub	w1, w24, #1
-	ldr	x0, [x2, 128]
+	.loc 2 237 0
+	ldr	w2, [x29, 100]
+	cbnz	w0, .L120
+	.loc 2 238 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL182:
-	lsl	x1, x1, 3
-	.loc 1 67 0
-	adrp	x26, .LC25
-	.loc 1 61 0
-	sub	x0, x0, #1048576
-	.loc 1 64 0
-	mov	x23, 0
-	.loc 1 67 0
-	add	x26, x26, :lo12:.LC25
-	.loc 1 61 0
-	ldr	x2, [x20, x1]
-	sub	x0, x0, x2
-	.loc 1 62 0
-	and	x0, x0, -4096
-	.loc 1 61 0
-	str	x0, [x21, x1]
-	.loc 1 63 0
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	bl	printf
+	bl	diagonalscan
 .LVL183:
-	.loc 1 64 0
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
-	bl	printf
+	mov	w24, w0
 .LVL184:
-.L102:
-	.loc 1 65 0
-	cmp	w24, w23
-	bhi	.L104
+	.loc 2 243 0
+	cbnz	w0, .L121
+	.loc 2 245 0
+	bl	ctrlc
 .LVL185:
-.LBE46:
-.LBE52:
-	.loc 1 205 0
-	cmp	w22, 1
-	ble	.L214
-	.loc 1 209 0
-	adrp	x0, .LANCHOR2
-	add	x26, x0, :lo12:.LANCHOR2
-	mov	x24, 0
-	str	x0, [x29, 120]
-.L107:
-	ldr	x1, [x26, x24, lsl 3]
-	mov	w23, w24
+	cbnz	w0, .L122
+	.loc 2 240 0
+	mov	w22, 4
 .LVL186:
-	ldr	x0, [x25, 8]
-	bl	strcasecmp
+.L95:
+	add	x19, x19, 1
 .LVL187:
-	cbz	w0, .L106
+	.loc 2 202 0 discriminator 2
+	cmp	x19, 4
+	bne	.L98
+	mov	w2, 0
+	mov	w24, 0
 .LVL188:
-	add	x24, x24, 1
-	.loc 1 208 0 discriminator 2
-	cmp	x24, 7
-	bne	.L107
-	.loc 1 216 0
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
-	b	.L215
+.L97:
+	.loc 2 250 0
+	orr	w2, w24, w2
 .LVL189:
-.L101:
-.LBB53:
-.LBB47:
-	.loc 1 57 0
-	ubfiz	x1, x0, 4, 32
-	ldr	x3, [x2]
-	add	x1, x1, 128
-	add	x3, x3, x1
-	ldr	x3, [x3, 8]
-	str	x3, [x20, x0, lsl 3]
-	.loc 1 58 0
-	ldr	x3, [x2]
-	add	x1, x3, x1
-	ldr	x1, [x1, 16]
-	str	x1, [x21, x0, lsl 3]
+	cbz	w2, .L94
 .LVL190:
-	add	x0, x0, 1
+.L99:
+	.loc 2 302 0
+	cbz	w24, .L82
+	.loc 2 303 0
+	ldr	x0, [x29, 104]
+	add	x24, x0, :lo12:.LANCHOR2
 .LVL191:
-	b	.L100
-.LVL192:
-.L104:
-	.loc 1 66 0
-	ldr	x1, [x20, x23, lsl 3]
-	cbz	x1, .L103
-	.loc 1 67 0
-	ldr	x3, [x21, x23, lsl 3]
-	mov	x0, x26
-	add	x2, x1, x3
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	ldr	x1, [x24, w22, sxtw 3]
 	bl	printf
+.LVL192:
+	b	.L72
 .LVL193:
-.L103:
-	add	x23, x23, 1
+.L88:
+	add	x0, x0, 1
 .LVL194:
-	b	.L102
+	.loc 2 174 0 discriminator 2
+	cmp	x0, 4
+	bne	.L90
+	.loc 2 181 0
+	ldr	x2, [x29, 152]
+	mov	w1, 10
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
+	lsr	x2, x2, 20
+	bl	printf
 .LVL195:
-.L150:
-.LBE47:
-.LBE53:
-	.loc 1 221 0
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	.loc 2 108 0
+	mov	w1, 0
+	b	.L89
+.L114:
+	.loc 2 195 0
+	mov	w28, 1000
+	b	.L87
 .LVL196:
-.L215:
-	.loc 1 216 0
-	bl	printf
+.L115:
+	.loc 2 209 0
+	mov	w22, 2
+	b	.L96
 .LVL197:
-.L214:
-	.loc 1 217 0
-	mov	w22, -1
-	b	.L97
+.L116:
+	.loc 2 213 0
+	mov	w22, 3
+	b	.L96
 .LVL198:
-.L110:
-	.loc 1 226 0
-	add	x0, x25, x26
-	add	x1, x29, 200
-	add	x2, x1, x26
-	mov	w1, 0
-	add	x26, x26, 8
-	ldr	x0, [x0, 16]
-	bl	strict_strtoul
+.L117:
+	.loc 2 218 0
+	mov	w22, 4
+	b	.L96
 .LVL199:
-	tbz	w0, #31, .L109
-	.loc 1 227 0
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
-	b	.L215
+.L118:
+	mov	w2, 0
+	b	.L97
 .LVL200:
-.L111:
-	.loc 1 247 0
-	cbnz	w23, .L112
-	.loc 1 249 0
-	ldr	x0, [x29, 208]
+.L119:
+	.loc 2 228 0
+	mov	w24, w0
+	mov	w2, 0
+	.loc 2 230 0
+	mov	w22, 2
+	b	.L97
 .LVL201:
-	cbz	x0, .L113
-	.loc 1 250 0
-	bl	set_vdd_logic
+.L120:
+	.loc 2 233 0
+	mov	w24, w0
+	.loc 2 235 0
+	mov	w22, 3
+	b	.L97
 .LVL202:
-.L113:
-	.loc 1 251 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L121:
+	mov	w2, w22
 .LVL203:
-.L114:
-	.loc 1 384 0
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
-	bl	printf
-.LVL204:
+.L158:
+	.loc 2 240 0
+	mov	w22, 4
 	b	.L97
+.L122:
+	.loc 2 246 0
+	mov	w2, -1
+	b	.L158
+.LVL204:
+.L85:
+	.loc 2 259 0
+	mov	x2, x20
+	mov	x1, x21
+	add	x0, x29, 200
+	bl	judge_test_addr
 .LVL205:
-.L112:
-	.loc 1 252 0
-	cmp	w23, 1
-	bne	.L115
-	.loc 1 254 0
-	ldr	x0, [x29, 224]
+	mov	w27, w0
 .LVL206:
-	cbz	x0, .L116
-	.loc 1 255 0
-	bl	set_vdd_logic
+	.loc 2 260 0
+	cbz	w0, .L123
+	.loc 2 263 0
+	ldr	x0, [x29, 184]
 .LVL207:
-.L116:
-	.loc 1 256 0
-	ldr	w0, [x29, 200]
-	ldr	w1, [x29, 208]
-	ldr	x2, [x29, 216]
-	bl	scan_freq
+	bl	set_ddr_freq
 .LVL208:
-	b	.L114
+	.loc 2 265 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L102
+	.loc 2 266 0
+	bl	set_vdd_logic
 .LVL209:
-.L115:
-	.loc 1 257 0
-	sub	w24, w24, #5
-	cmp	w24, 1
-	bls	.L117
+.L102:
+	.loc 2 270 0
+	adrp	x26, .LC24
 .LVL210:
-.LBB54:
-.LBB55:
-	.loc 1 79 0
-	ldr	x0, [x29, 144]
+	mov	w25, 0
+	add	x26, x26, :lo12:.LC24
+	b	.L110
 .LVL211:
-	.loc 1 82 0
-	ldr	x3, [x29, 224]
-	.loc 1 79 0
-	cmp	x0, 0
-	ldr	x0, [x29, 152]
-	ldr	x1, [x29, 160]
-	cset	w24, ne
-	.loc 1 80 0
-	cmp	x0, 0
-	mov	w0, 3
-	csinc	w0, w0, w24, ne
+.L111:
+	.loc 2 271 0
+	mov	x28, 0
+	.loc 2 269 0
+	add	w25, w25, 1
 .LVL212:
-	cmp	x1, 0
-	mov	w1, 4
-	csel	w0, w0, w1, eq
+	.loc 2 270 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL213:
-	.loc 1 82 0
-	cbnz	x3, .L209
-	.loc 1 83 0
-	mov	w24, w0
+.L103:
+	.loc 2 271 0 discriminator 1
+	cmp	w27, w28
+	bhi	.L109
+	mov	w0, 0
+	mov	w24, 0
 .LVL214:
-.L134:
-.LBE55:
-.LBE54:
-	.loc 1 342 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L108:
+	.loc 2 297 0
+	orr	w0, w24, w0
 .LVL215:
-	.loc 1 344 0
-	ldr	x0, [x29, 232]
-	cbz	x0, .L140
-	.loc 1 345 0
-	bl	set_vdd_logic
+	cbnz	w0, .L99
 .LVL216:
-.L140:
-	.loc 1 349 0
-	adrp	x26, .LC34
-	mov	w25, 0
+.L110:
+	.loc 2 268 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L111
+	.loc 2 268 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L111
+	b	.L82
 .LVL217:
-	add	x26, x26, :lo12:.LC34
-	b	.L148
+.L109:
+	.loc 2 278 0 is_stmt 1
+	ldr	x1, [x20, x28, lsl 3]
+	.loc 2 272 0
+	cmp	w19, 3
+	.loc 2 278 0
+	ldr	x0, [x21, x28, lsl 3]
+	.loc 2 272 0
+	beq	.L105
+	cmp	w19, 4
+	beq	.L106
+	.loc 2 274 0
+	bl	random_test
 .LVL218:
-.L117:
-	.loc 1 259 0
-	ldr	x0, [x29, 224]
+.L159:
+	.loc 2 282 0
+	mov	w24, w0
 .LVL219:
-	cbz	x0, .L123
-	.loc 1 260 0
-	bl	set_vdd_logic
+	.loc 2 290 0
+	bl	ctrlc
 .LVL220:
-.L123:
-	.loc 1 261 0
-	cmp	w23, 5
-	bne	.L155
-	.loc 1 262 0
-	ldr	x1, [x29, 168]
-	mov	x0, 65535
-	movk	x0, 0x9f, lsl 16
-	cmp	x1, x0
-	bhi	.L125
-	.loc 1 263 0
-	lsr	x2, x1, 20
-	adrp	x0, .LC30
-	mov	w1, 10
-	add	x0, x0, :lo12:.LC30
-	bl	printf
+	cbnz	w0, .L124
+	add	x28, x28, 1
 .LVL221:
-.L211:
-	.loc 1 272 0
-	mov	w27, 60
+	mov	w22, w19
+	.loc 2 294 0
+	cbz	w24, .L103
+	mov	w22, w19
+	b	.L108
 .LVL222:
-.L124:
-	.loc 1 280 0
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
-	.loc 1 284 0
-	adrp	x28, .LC32
-	.loc 1 280 0
-	str	x0, [x29, 112]
-	.loc 1 277 0
-	mov	w26, 0
-	.loc 1 284 0
-	add	x0, x28, :lo12:.LC32
-	str	x0, [x29, 104]
+.L105:
+	.loc 2 278 0
+	bl	crosstalk
 .LVL223:
-.L126:
-	.loc 1 278 0
-	ldr	x0, [x29, 216]
-	cbz	x0, .L132
-	.loc 1 278 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bls	.L114
-.L132:
-	.loc 1 280 0 is_stmt 1
-	ldr	x0, [x29, 112]
-	.loc 1 279 0
-	add	w26, w26, 1
+	b	.L159
+.L106:
+	.loc 2 282 0
+	bl	diagonalscan
 .LVL224:
-	.loc 1 280 0
-	mov	w1, w26
-	mov	x25, 0
-	bl	printf
+	b	.L159
 .LVL225:
-.L130:
-	.loc 1 282 0
-	ldr	x23, [x20, x25, lsl 3]
-	cbz	x23, .L127
-	.loc 1 284 0
-	ldr	x0, [x29, 104]
-	mov	x2, x23
-	ldr	x24, [x21, x25, lsl 3]
-	mov	w1, w25
-	mov	x3, x24
-	bl	printf
+.L124:
+	mov	w22, w19
+	.loc 2 291 0
+	mov	w0, -1
+	b	.L108
 .LVL226:
-	.loc 1 286 0
-	ldr	x0, [x29, 208]
-	bl	set_ddr_freq
+.L123:
+	.loc 2 261 0
+	mov	w23, 1
 .LVL227:
-	.loc 1 287 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
+	b	.L72
 .LVL228:
-	mov	w28, w0
-.LVL229:
-	.loc 1 289 0
-	cbnz	w0, .L156
-	.loc 1 290 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL230:
-	bl	crosstalk
-.LVL231:
-	mov	w28, w0
-.LVL232:
-	.loc 1 294 0
-	cbnz	w0, .L157
-	.loc 1 295 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL233:
-	bl	diagonalscan
-.LVL234:
-	mov	w28, w0
-.LVL235:
-	.loc 1 299 0
-	cbnz	w0, .L158
-	.loc 1 300 0
-	ldr	w0, [x29, 200]
-.LVL236:
-	and	x2, x27, 1020
-	ldr	w1, [x29, 208]
-	.loc 1 303 0
-	mov	w19, 1
-	.loc 1 300 0
-	bl	scan_freq
-.LVL237:
-	mov	w28, w0
-.LVL238:
-.L128:
-	.loc 1 305 0
-	ldr	x0, [x29, 200]
-.LVL239:
-	bl	set_ddr_freq
-.LVL240:
-	.loc 1 306 0
-	cbnz	w28, .L159
-	.loc 1 307 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
-.LVL241:
-	mov	w2, w0
-.LVL242:
-	.loc 1 311 0
-	cbnz	w0, .L160
-	str	w2, [x29, 100]
-	.loc 1 312 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL243:
-	bl	crosstalk
-.LVL244:
-	.loc 1 316 0
-	ldr	w2, [x29, 100]
-	.loc 1 312 0
-	mov	w19, w0
-.LVL245:
-	.loc 1 316 0
-	cbnz	w0, .L161
-	.loc 1 317 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL246:
-	bl	diagonalscan
-.LVL247:
-	mov	w28, w0
-.LVL248:
-	.loc 1 322 0
-	cbnz	w0, .L162
-	.loc 1 324 0
-	bl	ctrlc
-.LVL249:
-	cbnz	w0, .L163
-	.loc 1 319 0
-	mov	w19, 4
-.LVL250:
-.L127:
-	add	x25, x25, 1
-.LVL251:
-	.loc 1 281 0 discriminator 2
-	cmp	x25, 4
-	bne	.L130
-	mov	w2, 0
-	mov	w28, 0
-.LVL252:
-.L129:
-	.loc 1 329 0
-	orr	w2, w28, w2
-.LVL253:
-	cbz	w2, .L126
-.LVL254:
-.L131:
-	.loc 1 381 0
-	cbz	w28, .L114
-	.loc 1 382 0
-	ldr	x0, [x29, 120]
-	add	x0, x0, :lo12:.LANCHOR2
-	ldr	x1, [x0, w19, sxtw 3]
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
-	bl	printf
-.LVL255:
-	b	.L97
-.LVL256:
-.L125:
-	.loc 1 266 0
-	mov	x0, 10485760
-	.loc 1 268 0
-	stp	xzr, xzr, [x29, 144]
-	.loc 1 266 0
-	stp	xzr, x0, [x29, 160]
-.LVL257:
-	.loc 1 269 0
-	stp	xzr, xzr, [x29, 176]
-.LVL258:
-	str	xzr, [x29, 192]
-	b	.L211
-.LVL259:
-.L155:
-	.loc 1 274 0
-	mov	w27, 1000
-	b	.L124
-.LVL260:
-.L156:
-	.loc 1 288 0
-	mov	w19, 2
-	b	.L128
-.LVL261:
-.L157:
-	.loc 1 292 0
-	mov	w19, 3
-	b	.L128
-.LVL262:
-.L158:
-	.loc 1 297 0
-	mov	w19, 4
-	b	.L128
-.LVL263:
-.L159:
-	mov	w2, 0
-	b	.L129
-.LVL264:
-.L160:
-	.loc 1 307 0
-	mov	w28, w0
-	mov	w2, 0
-	.loc 1 309 0
-	mov	w19, 2
-	b	.L129
-.LVL265:
-.L161:
-	.loc 1 312 0
-	mov	w28, w0
-	.loc 1 314 0
-	mov	w19, 3
-	b	.L129
-.LVL266:
-.L162:
-	mov	w2, w19
-.LVL267:
-.L212:
-	.loc 1 319 0
-	mov	w19, 4
-	b	.L129
-.L163:
-	.loc 1 325 0
-	mov	w2, -1
-	b	.L212
-.LVL268:
-.L209:
-.LBB58:
-.LBB56:
-	.loc 1 86 0
-	ldr	x4, [x29, 216]
-	.loc 1 87 0
-	mov	x1, 0
-	mov	w24, 0
-	.loc 1 88 0
-	mov	w6, 1
-	.loc 1 87 0
-	add	x5, x3, x4
-.LVL269:
-.L136:
-	.loc 1 86 0
-	ldr	x2, [x20, x1, lsl 3]
-	cmp	x4, x2
-	bcc	.L135
-	.loc 1 87 0
-	ldr	x7, [x21, x1, lsl 3]
-	add	x2, x2, x7
-	.loc 1 88 0
-	cmp	x5, x2
-	csel	w24, w24, w6, hi
-.LVL270:
-.L135:
-	add	x1, x1, 1
-.LVL271:
-	.loc 1 85 0
-	cmp	w0, w1
-	bhi	.L136
-	.loc 1 89 0
-	cbnz	w24, .L137
-	.loc 1 90 0
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.LVL272:
-.L138:
-.LBE56:
-.LBE58:
-	.loc 1 339 0
-	cbnz	w24, .L134
-	.loc 1 340 0
-	mov	w22, 1
-.LVL273:
-	b	.L97
-.LVL274:
-.L137:
-.LBB59:
-.LBB57:
-	.loc 1 92 0
-	str	x4, [x29, 136]
-	.loc 1 94 0
-	cmp	w0, 1
-	.loc 1 93 0
-	str	x3, [x29, 168]
-.LVL275:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 144]
-	.loc 1 94 0
-	cmp	w0, 2
-	.loc 1 96 0
-	str	xzr, [x29, 176]
-.LVL276:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 152]
-	.loc 1 94 0
-	cmp	w0, 4
-	.loc 1 96 0
-	str	xzr, [x29, 184]
-.LVL277:
-	.loc 1 94 0
-	bne	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 160]
-	.loc 1 96 0
-	str	xzr, [x29, 192]
-.LVL278:
-	b	.L138
-.LVL279:
-.L149:
-.LBE57:
-.LBE59:
-	.loc 1 350 0
-	mov	x27, 0
-	.loc 1 348 0
-	add	w25, w25, 1
-.LVL280:
-	.loc 1 349 0
-	mov	w1, w25
-	mov	x0, x26
-	bl	printf
-.LVL281:
-.L141:
-	.loc 1 350 0 discriminator 1
-	cmp	w24, w27
-	bhi	.L147
-	mov	w0, 0
-	mov	w28, 0
-.LVL282:
-.L146:
-	.loc 1 376 0
-	orr	w0, w28, w0
-.LVL283:
-	cbnz	w0, .L131
-.LVL284:
-.L148:
-	.loc 1 347 0
-	ldr	x0, [x29, 208]
-	cbz	x0, .L149
-	.loc 1 347 0 is_stmt 0 discriminator 1
-	cmp	x0, x25, uxtw
-	bhi	.L149
-	b	.L114
-.LVL285:
-.L147:
-	.loc 1 357 0 is_stmt 1
-	ldr	x1, [x21, x27, lsl 3]
-	.loc 1 351 0
-	cmp	w23, 3
-	.loc 1 357 0
-	ldr	x0, [x20, x27, lsl 3]
-	.loc 1 351 0
-	beq	.L143
-	cmp	w23, 4
-	beq	.L144
-	.loc 1 353 0
-	bl	random_test
-.LVL286:
-.L213:
-	.loc 1 361 0
-	mov	w28, w0
-.LVL287:
-	.loc 1 369 0
-	bl	ctrlc
-.LVL288:
-	cbnz	w0, .L166
-	add	x27, x27, 1
-.LVL289:
-	mov	w19, w23
-	.loc 1 373 0
-	cbz	w28, .L141
-.LVL290:
-	mov	w19, w23
-.LVL291:
-	b	.L146
-.LVL292:
-.L143:
-	.loc 1 357 0
-	bl	crosstalk
-.LVL293:
-	b	.L213
-.L144:
-	.loc 1 361 0
-	bl	diagonalscan
-.LVL294:
-	b	.L213
-.LVL295:
-.L166:
-	mov	w19, w23
-	.loc 1 370 0
-	mov	w0, -1
-	b	.L146
-.LVL296:
-.L106:
-	.loc 1 220 0
+.L74:
+	.loc 2 132 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	ldrb	w0, [x0, w24, sxtw]
-	cmp	w22, w0
-	blt	.L150
-	sub	w22, w22, #2
-.LVL297:
-	.loc 1 220 0 is_stmt 0 discriminator 1
-	mov	x26, 0
-	lsl	x22, x22, 3
-.LVL298:
-.L109:
-	.loc 1 225 0 is_stmt 1 discriminator 1
-	cmp	x26, x22
-	bne	.L110
-	.loc 1 232 0
-	ldp	x2, x3, [x29, 200]
-	mov	w1, w23
-	ldp	x4, x5, [x29, 216]
-	adrp	x0, .LC28
-	ldr	x6, [x29, 232]
-	add	x0, x0, :lo12:.LC28
-	bl	printf
-.LVL299:
-	.loc 1 238 0
-	add	x2, x29, 128
+	ldrb	w0, [x0, w25, sxtw]
+	cmp	w23, w0
+	blt	.L112
+	sub	w23, w23, #2
+.LVL229:
+	.loc 2 132 0 is_stmt 0 discriminator 1
+	mov	x27, 0
+	lsl	x23, x23, 3
+.LVL230:
+.L77:
+	.loc 2 137 0 is_stmt 1 discriminator 1
+	cmp	x27, x23
+	bne	.L78
+	.loc 2 147 0
+	add	x2, x29, 112
 	mov	w1, 0
 	mov	w0, 53
 	bl	uclass_get_device
-.LVL300:
-	mov	w22, w0
-.LVL301:
-	.loc 1 239 0
-	cbz	w0, .L111
-	.loc 1 240 0
+.LVL231:
+	mov	w23, w0
+.LVL232:
+	.loc 2 148 0
+	cbz	w0, .L79
+	.loc 2 149 0
 	mov	w1, w0
-	adrp	x0, .LC29
-.LVL302:
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC21
+.LVL233:
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.LVL303:
-.L97:
-	.loc 1 387 0
-	mov	w0, w22
+.LVL234:
+.L72:
+	.loc 2 308 0
+	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
+	ldp	x29, x30, [sp], 224
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
@@ -2083,83 +1584,8 @@ do_ddr_test:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE258:
+.LFE256:
 	.size	do_ddr_test, .-do_ddr_test
-	.section	.text.print_memory,"ax",@progbits
-	.align	2
-	.global	print_memory
-	.type	print_memory, %function
-print_memory:
-.LFB278:
-	.loc 3 81 0
-	.cfi_startproc
-.LVL304:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	mov	x20, x0
-.LVL305:
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 86 0
-	adrp	x21, .LC38
-	.loc 3 85 0
-	lsr	x22, x1, 2
-	.loc 3 86 0
-	add	x21, x21, :lo12:.LC38
-	.loc 3 85 0
-	mov	w19, 0
-.LVL306:
-.L217:
-	.loc 3 85 0 is_stmt 0 discriminator 1
-	uxtw	x1, w19
-	cmp	x1, x22
-	bcc	.L218
-	.loc 3 89 0 is_stmt 1
-	ldp	x19, x20, [sp, 16]
-.LVL307:
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL308:
-.L218:
-	.cfi_restore_state
-	.loc 3 87 0 discriminator 3
-	add	w3, w19, 3
-	add	w2, w19, 2
-	add	w0, w19, 1
-	lsl	x1, x1, 2
-	.loc 3 85 0 discriminator 3
-	add	w19, w19, 4
-.LVL309:
-	.loc 3 86 0 discriminator 3
-	ldr	w5, [x20, x3, lsl 2]
-	ldr	w4, [x20, x2, lsl 2]
-	ldr	w3, [x20, x0, lsl 2]
-	mov	x0, x21
-	ldr	w2, [x20, x1]
-	add	x1, x20, x1
-	bl	printf
-.LVL310:
-	b	.L217
-	.cfi_endproc
-.LFE278:
-	.size	print_memory, .-print_memory
 	.global	_u_boot_list_2_cmd_2_ddr_test
 	.section	.rodata
 	.align	3
@@ -2173,54 +1599,45 @@ print_memory:
 	.word	267448335
 	.word	0
 	.word	-1
-	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
-.LC16:
-	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
-.LC17:
+.LC1:
 	.string	"\nbitflip:   \n"
-.LC18:
+.LC2:
 	.string	"\b\b\b%3u"
-.LC19:
+.LC3:
 	.string	"%3u\b\b\b"
-.LC20:
+.LC4:
 	.string	"\nISI:\n"
-.LC21:
+.LC5:
 	.string	"malloc %lu byte fail\n"
 	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
-.LC22:
+.LC6:
 	.string	"\nDiagonalScan\n"
+.LC7:
+	.string	"get page size fail:0x%x\n"
 	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
-.LC23:
-	.string	"available memory for test:\n"
-.LC24:
-	.string	"\tstart\t\t end\tlength\n"
-.LC25:
-	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
-.LC26:
+.LC18:
+	.string	"ddr tester version 1.0.1\n"
+.LC19:
 	.string	"test parameters error\n"
-.LC27:
+.LC20:
 	.string	"test pattern error\n"
-.LC28:
-	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
-.LC29:
+.LC21:
 	.string	"rockchip dmc probe fail: %d\n"
-.LC30:
-	.string	"fasttest need %uMB, but actually only %luMB\n"
-.LC31:
+.LC22:
 	.string	"\rtimes:%08u:\n"
-.LC32:
+.LC23:
 	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
-.LC33:
-	.string	"Invalid test address\n"
-.LC34:
+.LC24:
 	.string	"\rtimes:%08u, "
-.LC35:
+.LC25:
 	.string	"\n%s test fail\n"
-.LC36:
+.LC26:
 	.string	"\ntest pass\n"
-.LC37:
+.LC27:
 	.string	"test pattern unsupported\n"
+.LC28:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
 	.section	.rodata.g_isi_pattern,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -2259,49 +1676,34 @@ g_isi_pattern:
 	.word	0
 	.word	0
 	.word	0
-	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
-.LC38:
-	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
 	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
-.LC5:
+.LC8:
 	.string	"%u"
-.LC6:
+.LC9:
 	.string	"\b"
-.LC7:
+.LC10:
 	.string	" "
-.LC8:
+.LC11:
 	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
-.LC9:
+.LC12:
 	.string	"%4lu"
-.LC10:
+.LC13:
 	.string	"\b\b\b\b"
-.LC11:
+.LC14:
 	.string	"    "
-.LC12:
+.LC15:
 	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
-.LC13:
+.LC16:
 	.string	"% d:change freq to %d Hz\n"
-.LC14:
-	.string	"\tchange freq success: %d Hz\n"
-.LC15:
+.LC17:
 	.string	"check data fail at %d Hz\n"
-	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
-.LC1:
-	.string	"current freq:%lu Hz\n"
-	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
-.LC2:
-	.string	"vdd_logic"
-.LC3:
-	.string	"Cannot set regulator name\n"
-.LC4:
-	.string	"set vdd_logic fail\n"
 	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC39:
+.LC29:
 	.string	"ddr_test"
-.LC40:
+.LC30:
 	.string	"for dram simple test\n"
-.LC41:
+.LC31:
 	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
 	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
 	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
@@ -2324,19 +1726,19 @@ g_isi_pattern:
 	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
 	.ascii	"start from"
 	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
-.LC42:
+.LC32:
 	.string	"changefreq"
-.LC43:
+.LC33:
 	.string	"scanfreq"
-.LC44:
+.LC34:
 	.string	"random"
-.LC45:
+.LC35:
 	.string	"crosstalk"
-.LC46:
+.LC36:
 	.string	"diagonalscan"
-.LC47:
+.LC37:
 	.string	"fast_test"
-.LC48:
+.LC38:
 	.string	"full_test"
 	.section	.rodata.test_pat_param,"a",@progbits
 	.align	3
@@ -2357,44 +1759,45 @@ test_pat_param:
 	.type	test_pattern, %object
 	.size	test_pattern, 56
 test_pattern:
-	.xword	.LC42
-	.xword	.LC43
-	.xword	.LC44
-	.xword	.LC45
-	.xword	.LC46
-	.xword	.LC47
-	.xword	.LC48
+	.xword	.LC32
+	.xword	.LC33
+	.xword	.LC34
+	.xword	.LC35
+	.xword	.LC36
+	.xword	.LC37
+	.xword	.LC38
 	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_cmd_2_ddr_test, %object
 	.size	_u_boot_list_2_cmd_2_ddr_test, 48
 _u_boot_list_2_cmd_2_ddr_test:
-	.8byte	.LC39
+	.8byte	.LC29
 	.word	7
 	.word	1
 	.8byte	do_ddr_test
-	.8byte	.LC40
-	.8byte	.LC41
+	.8byte	.LC30
+	.8byte	.LC31
 	.8byte	0
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/dm/device.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/linux/list.h"
-	.file 15 "include/part.h"
-	.file 16 "include/flash.h"
-	.file 17 "include/lmb.h"
-	.file 18 "include/asm-generic/u-boot.h"
-	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 20 "include/command.h"
-	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 22 "include/libfdt_env.h"
+	.file 5 "include/common.h"
+	.file 6 "./arch/arm/include/asm/types.h"
+	.file 7 "include/linux/types.h"
+	.file 8 "include/errno.h"
+	.file 9 "include/linux/string.h"
+	.file 10 "include/efi.h"
+	.file 11 "include/dm/device.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/linux/list.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/command.h"
+	.file 20 "include/linux/libfdt_env.h"
+	.file 21 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/linux/libfdt.h"
 	.file 23 "include/image.h"
 	.file 24 "include/dm/uclass-id.h"
 	.file 25 "./arch/arm/include/asm/global_data.h"
@@ -2410,27 +1813,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 35 "include/iomux.h"
 	.file 36 "include/log.h"
 	.file 37 "include/stdio.h"
-	.file 38 "include/vsprintf.h"
-	.file 39 "include/power/regulator.h"
-	.file 40 "include/linux/delay.h"
-	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.file 38 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 39 "cmd/ddr_tool/../memtester/io_map.h"
+	.file 40 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
+	.file 41 "include/vsprintf.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x2c16
+	.4byte	0x27ad
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF486
+	.4byte	.LASF478
 	.byte	0xc
-	.4byte	.LASF487
-	.4byte	.LASF488
-	.4byte	.Ldebug_ranges0+0x190
+	.4byte	.LASF479
+	.4byte	.LASF480
+	.4byte	.Ldebug_ranges0+0x90
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x5
 	.byte	0xd
 	.4byte	0x34
 	.uleb128 0x3
@@ -2449,7 +1852,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF2
 	.uleb128 0x5
 	.4byte	.LASF21
-	.byte	0x9
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x59
 	.uleb128 0x6
@@ -2462,7 +1865,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF3
 	.uleb128 0x2
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x34
 	.uleb128 0x3
@@ -2471,7 +1874,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF6
 	.uleb128 0x2
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x6
 	.byte	0x12
 	.4byte	0x84
 	.uleb128 0x3
@@ -2488,26 +1891,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF10
 	.uleb128 0x7
 	.string	"u8"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x1f
 	.4byte	0x34
 	.uleb128 0x8
 	.4byte	0x99
 	.uleb128 0x7
 	.string	"u32"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x25
 	.4byte	0x84
 	.uleb128 0x4
 	.4byte	0xa8
 	.uleb128 0x2
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x6
 	.byte	0x31
 	.4byte	0x92
 	.uleb128 0x2
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x6
 	.byte	0x32
 	.4byte	0x92
 	.uleb128 0x3
@@ -2536,34 +1939,34 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.uleb128 0x2
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x7
 	.byte	0x59
 	.4byte	0x47
 	.uleb128 0x2
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x7
 	.byte	0x5b
 	.4byte	0x3b
 	.uleb128 0x2
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x7
 	.byte	0x69
 	.4byte	0x67
 	.uleb128 0x2
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x7
 	.byte	0x6b
 	.4byte	0x79
 	.uleb128 0x2
 	.4byte	.LASF20
-	.byte	0x8
+	.byte	0x7
 	.byte	0x97
 	.4byte	0x79
 	.uleb128 0xa
 	.byte	0x8
 	.uleb128 0x5
 	.4byte	.LASF22
-	.byte	0xa
+	.byte	0x9
 	.byte	0xb
 	.4byte	0xf3
 	.uleb128 0x3
@@ -2577,130 +1980,130 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xd
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x140
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF26
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xe
 	.4byte	.LASF45
 	.byte	0xa0
-	.byte	0xc
+	.byte	0xb
 	.byte	0x80
 	.4byte	0x25d
 	.uleb128 0xf
 	.4byte	.LASF27
-	.byte	0xc
+	.byte	0xb
 	.byte	0x81
-	.4byte	0x1505
+	.4byte	0x1517
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0x82
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF29
-	.byte	0xc
+	.byte	0xb
 	.byte	0x83
 	.4byte	0x135
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF30
-	.byte	0xc
+	.byte	0xb
 	.byte	0x84
 	.4byte	0x135
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF31
-	.byte	0xc
+	.byte	0xb
 	.byte	0x85
 	.4byte	0x135
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF32
-	.byte	0xc
+	.byte	0xb
 	.byte	0x86
-	.4byte	0x14d0
+	.4byte	0x14e2
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF33
-	.byte	0xc
+	.byte	0xb
 	.byte	0x87
 	.4byte	0x109
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF34
-	.byte	0xc
+	.byte	0xb
 	.byte	0x88
 	.4byte	0x25d
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF35
-	.byte	0xc
+	.byte	0xb
 	.byte	0x89
 	.4byte	0x135
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF36
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8a
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF37
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8b
 	.4byte	0x135
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF38
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8c
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF39
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8d
 	.4byte	0x290
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF40
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8e
 	.4byte	0x290
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF41
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8f
 	.4byte	0x290
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0x90
 	.4byte	0x11f
 	.byte	0x90
 	.uleb128 0xf
 	.4byte	.LASF43
-	.byte	0xc
+	.byte	0xb
 	.byte	0x91
 	.4byte	0x59
 	.byte	0x94
 	.uleb128 0x10
 	.string	"seq"
-	.byte	0xc
+	.byte	0xb
 	.byte	0x92
 	.4byte	0x59
 	.byte	0x98
@@ -2719,7 +2122,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF44
-	.byte	0xd
+	.byte	0xc
 	.byte	0x10
 	.4byte	0x26a
 	.uleb128 0xb
@@ -2732,18 +2135,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF46
 	.byte	0x10
-	.byte	0xe
+	.byte	0xd
 	.byte	0x16
 	.4byte	0x2b5
 	.uleb128 0xf
 	.4byte	.LASF47
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF48
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0x8
@@ -2754,18 +2157,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF49
 	.byte	0x10
-	.byte	0xf
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x2e0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xf
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF50
-	.byte	0xf
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x2f9
 	.byte	0x8
@@ -2792,41 +2195,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x2ff
 	.uleb128 0x5
 	.4byte	.LASF49
-	.byte	0xf
+	.byte	0xe
 	.byte	0xce
 	.4byte	0x30a
 	.uleb128 0x15
 	.2byte	0x1218
-	.byte	0x10
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x361
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x109
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfe
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x109
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x361
 	.byte	0x18
 	.uleb128 0x16
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x372
 	.2byte	0x1018
@@ -2847,7 +2250,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x31a
 	.uleb128 0xb
@@ -2857,7 +2260,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x38e
 	.uleb128 0x3
@@ -2867,18 +2270,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF59
 	.byte	0x10
-	.byte	0x11
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x3d0
 	.uleb128 0xf
 	.4byte	.LASF60
-	.byte	0x11
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xc3
 	.byte	0x8
@@ -2886,24 +2289,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF61
 	.byte	0xa0
-	.byte	0x11
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x401
 	.uleb128 0x10
 	.string	"cnt"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF62
-	.byte	0x11
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x401
 	.byte	0x10
@@ -2918,41 +2321,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x437
 	.uleb128 0xf
 	.4byte	.LASF63
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x3d0
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF64
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x3d0
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x19
 	.string	"lmb"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x411
 	.uleb128 0x1a
 	.byte	0x10
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x463
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xc3
 	.byte	0x8
@@ -2960,120 +2363,120 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF65
 	.byte	0xc8
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x554
 	.uleb128 0xf
 	.4byte	.LASF66
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF67
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF68
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF69
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF70
-	.byte	0x12
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF71
-	.byte	0x12
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF72
-	.byte	0x12
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x280
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x47
 	.byte	0x66
 	.uleb128 0xf
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3b
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x109
 	.byte	0x78
 	.uleb128 0xf
 	.4byte	.LASF83
-	.byte	0x12
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x109
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF84
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x554
 	.byte	0x88
@@ -3087,89 +2490,89 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF85
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x463
 	.uleb128 0x5
 	.4byte	.LASF86
-	.byte	0x13
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF87
-	.byte	0x13
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF88
-	.byte	0x13
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF89
-	.byte	0x13
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF90
-	.byte	0x13
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF91
-	.byte	0x13
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF92
-	.byte	0x13
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x109
 	.uleb128 0xe
 	.4byte	.LASF93
 	.byte	0x30
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1e
 	.4byte	0x61d
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1f
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x13
 	.byte	0x20
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x13
 	.byte	0x21
 	.4byte	0x59
 	.byte	0xc
 	.uleb128 0x10
 	.string	"cmd"
-	.byte	0x14
+	.byte	0x13
 	.byte	0x23
 	.4byte	0x647
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x13
 	.byte	0x24
 	.4byte	0xf3
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x13
 	.byte	0x26
 	.4byte	0xf3
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2a
 	.4byte	0x676
 	.byte	0x28
@@ -3217,14 +2620,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x64d
 	.uleb128 0x2
 	.4byte	.LASF99
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2e
 	.4byte	0x5bc
 	.uleb128 0x1b
 	.4byte	.LASF167
 	.byte	0x4
 	.4byte	0x59
-	.byte	0x14
+	.byte	0x13
 	.byte	0x7a
 	.4byte	0x6aa
 	.uleb128 0x1c
@@ -3237,92 +2640,92 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF102
 	.sleb128 -1
 	.byte	0
-	.uleb128 0xe
+	.uleb128 0x2
 	.4byte	.LASF103
+	.byte	0x14
+	.byte	0x11
+	.4byte	0x12a
+	.uleb128 0xe
+	.4byte	.LASF104
 	.byte	0x28
 	.byte	0x15
 	.byte	0x39
-	.4byte	0x72f
+	.4byte	0x73a
 	.uleb128 0xf
-	.4byte	.LASF104
+	.4byte	.LASF105
 	.byte	0x15
 	.byte	0x3a
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF105
+	.4byte	.LASF106
 	.byte	0x15
 	.byte	0x3b
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF106
+	.4byte	.LASF107
 	.byte	0x15
 	.byte	0x3c
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF107
+	.4byte	.LASF108
 	.byte	0x15
 	.byte	0x3d
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF108
+	.4byte	.LASF109
 	.byte	0x15
 	.byte	0x3e
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF109
+	.4byte	.LASF110
 	.byte	0x15
 	.byte	0x3f
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x14
 	.uleb128 0xf
-	.4byte	.LASF110
+	.4byte	.LASF111
 	.byte	0x15
 	.byte	0x40
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF111
+	.4byte	.LASF112
 	.byte	0x15
 	.byte	0x43
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x1c
 	.uleb128 0xf
-	.4byte	.LASF112
+	.4byte	.LASF113
 	.byte	0x15
 	.byte	0x46
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF113
+	.4byte	.LASF114
 	.byte	0x15
 	.byte	0x49
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x24
 	.byte	0
-	.uleb128 0x5
-	.4byte	.LASF114
+	.uleb128 0xd
+	.4byte	.LASF115
 	.byte	0x16
-	.byte	0xf
-	.4byte	0x73a
+	.2byte	0x136
+	.4byte	0x746
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x6aa
-	.uleb128 0x2
-	.4byte	.LASF115
-	.byte	0x16
-	.byte	0x12
-	.4byte	0x12a
+	.4byte	0x6b5
 	.uleb128 0x1e
 	.4byte	.LASF116
 	.byte	0x40
 	.byte	0x17
 	.2byte	0x134
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.uleb128 0x1f
 	.4byte	.LASF117
 	.byte	0x17
@@ -3393,12 +2796,12 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF128
 	.byte	0x17
 	.2byte	0x140
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.byte	0x20
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x114
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
@@ -3407,13 +2810,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF129
 	.byte	0x17
 	.2byte	0x141
-	.4byte	0x74b
+	.4byte	0x74c
 	.uleb128 0x1e
 	.4byte	.LASF130
 	.byte	0x30
 	.byte	0x17
 	.2byte	0x143
-	.4byte	0x893
+	.4byte	0x894
 	.uleb128 0x1f
 	.4byte	.LASF54
 	.byte	0x17
@@ -3473,24 +2876,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF137
 	.byte	0x17
 	.2byte	0x149
-	.4byte	0x811
+	.4byte	0x812
 	.uleb128 0x22
 	.4byte	.LASF138
 	.2byte	0x280
 	.byte	0x17
 	.2byte	0x14f
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.uleb128 0x1f
 	.4byte	.LASF139
 	.byte	0x17
 	.2byte	0x155
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.byte	0
 	.uleb128 0x1f
 	.4byte	.LASF140
 	.byte	0x17
 	.2byte	0x156
-	.4byte	0x805
+	.4byte	0x806
 	.byte	0x8
 	.uleb128 0x1f
 	.4byte	.LASF141
@@ -3580,7 +2983,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"os"
 	.byte	0x17
 	.2byte	0x16e
-	.4byte	0x893
+	.4byte	0x894
 	.byte	0xb8
 	.uleb128 0x21
 	.string	"ep"
@@ -3640,7 +3043,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"kbd"
 	.byte	0x17
 	.2byte	0x17a
-	.4byte	0xa42
+	.4byte	0xa43
 	.2byte	0x130
 	.uleb128 0x23
 	.4byte	.LASF163
@@ -3663,7 +3066,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0x564
@@ -3671,19 +3074,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF165
 	.byte	0x17
 	.2byte	0x18f
-	.4byte	0x89f
+	.4byte	0x8a0
 	.uleb128 0xd
 	.4byte	.LASF166
 	.byte	0x17
 	.2byte	0x191
-	.4byte	0xa48
+	.4byte	0xa49
 	.uleb128 0x1b
 	.4byte	.LASF168
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xc75
+	.4byte	0xc7c
 	.uleb128 0x1c
 	.4byte	.LASF169
 	.byte	0
@@ -3939,8 +3342,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1c
 	.4byte	.LASF253
 	.byte	0x54
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF254
+	.byte	0x55
+	.uleb128 0x1d
+	.4byte	.LASF255
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x25
@@ -3948,19 +3354,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0x24
 	.byte	0xe0
-	.4byte	0xc88
+	.4byte	0xc8f
 	.uleb128 0x1c
-	.4byte	.LASF255
+	.4byte	.LASF256
 	.byte	0x5
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF256
+	.4byte	.LASF257
 	.byte	0x40
 	.byte	0x19
 	.byte	0xc
-	.4byte	0xd01
+	.4byte	0xd08
 	.uleb128 0xf
-	.4byte	.LASF257
+	.4byte	.LASF258
 	.byte	0x19
 	.byte	0x22
 	.4byte	0x3b
@@ -3978,50 +3384,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF258
+	.4byte	.LASF259
 	.byte	0x19
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF259
+	.4byte	.LASF260
 	.byte	0x19
 	.byte	0x26
 	.4byte	0x92
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF260
+	.4byte	.LASF261
 	.byte	0x19
 	.byte	0x28
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF261
+	.4byte	.LASF262
 	.byte	0x19
 	.byte	0x29
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF262
+	.4byte	.LASF263
 	.byte	0x19
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF263
+	.4byte	.LASF264
 	.byte	0x19
 	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x38
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF265
 	.byte	0x18
 	.byte	0x1a
 	.byte	0x22
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xf
-	.4byte	.LASF265
+	.4byte	.LASF266
 	.byte	0x1a
 	.byte	0x23
 	.4byte	0xa8
@@ -4033,29 +3439,29 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xa8
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x25
 	.4byte	0xa8
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF267
+	.4byte	.LASF268
 	.byte	0x1a
 	.byte	0x26
 	.4byte	0x109
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF268
-	.2byte	0x198
+	.4byte	.LASF269
+	.2byte	0x1a0
 	.byte	0x1a
 	.byte	0x29
-	.4byte	0xf28
+	.4byte	0xf3c
 	.uleb128 0x10
 	.string	"bd"
 	.byte	0x1a
 	.byte	0x2a
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF42
@@ -4064,193 +3470,193 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x3b
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x2c
 	.4byte	0x84
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF269
+	.4byte	.LASF270
 	.byte	0x1a
 	.byte	0x2d
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF270
+	.4byte	.LASF271
 	.byte	0x1a
 	.byte	0x2e
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF271
+	.4byte	.LASF272
 	.byte	0x1a
 	.byte	0x30
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF272
+	.4byte	.LASF273
 	.byte	0x1a
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF273
+	.4byte	.LASF274
 	.byte	0x1a
 	.byte	0x33
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF274
+	.4byte	.LASF275
 	.byte	0x1a
 	.byte	0x3d
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF275
+	.4byte	.LASF276
 	.byte	0x1a
 	.byte	0x41
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF276
+	.4byte	.LASF277
 	.byte	0x1a
 	.byte	0x42
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF277
+	.4byte	.LASF278
 	.byte	0x1a
 	.byte	0x44
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF278
+	.4byte	.LASF279
 	.byte	0x1a
 	.byte	0x45
 	.4byte	0x3b
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF279
+	.4byte	.LASF280
 	.byte	0x1a
 	.byte	0x46
 	.4byte	0xc3
 	.byte	0x68
 	.uleb128 0xf
-	.4byte	.LASF280
+	.4byte	.LASF281
 	.byte	0x1a
 	.byte	0x47
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
-	.4byte	.LASF281
+	.4byte	.LASF282
 	.byte	0x1a
 	.byte	0x48
 	.4byte	0x3b
 	.byte	0x78
 	.uleb128 0xf
-	.4byte	.LASF282
+	.4byte	.LASF283
 	.byte	0x1a
 	.byte	0x49
 	.4byte	0x3b
 	.byte	0x80
 	.uleb128 0xf
-	.4byte	.LASF283
+	.4byte	.LASF284
 	.byte	0x1a
 	.byte	0x4a
 	.4byte	0x3b
 	.byte	0x88
 	.uleb128 0xf
-	.4byte	.LASF284
+	.4byte	.LASF285
 	.byte	0x1a
 	.byte	0x4b
-	.4byte	0xf28
+	.4byte	0xf3c
 	.byte	0x90
 	.uleb128 0xf
-	.4byte	.LASF285
+	.4byte	.LASF286
 	.byte	0x1a
 	.byte	0x4e
 	.4byte	0x25d
 	.byte	0x98
 	.uleb128 0xf
-	.4byte	.LASF286
+	.4byte	.LASF287
 	.byte	0x1a
 	.byte	0x4f
 	.4byte	0x25d
 	.byte	0xa0
 	.uleb128 0xf
-	.4byte	.LASF287
+	.4byte	.LASF288
 	.byte	0x1a
 	.byte	0x50
 	.4byte	0x290
 	.byte	0xa8
 	.uleb128 0xf
-	.4byte	.LASF288
+	.4byte	.LASF289
 	.byte	0x1a
 	.byte	0x56
 	.4byte	0x263
 	.byte	0xb8
 	.uleb128 0xf
-	.4byte	.LASF289
+	.4byte	.LASF290
 	.byte	0x1a
 	.byte	0x57
 	.4byte	0x135
 	.byte	0xc0
 	.uleb128 0xf
-	.4byte	.LASF290
+	.4byte	.LASF291
 	.byte	0x1a
 	.byte	0x58
 	.4byte	0x3b
 	.byte	0xc8
 	.uleb128 0xf
-	.4byte	.LASF291
+	.4byte	.LASF292
 	.byte	0x1a
 	.byte	0x5a
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0xd0
 	.uleb128 0x10
 	.string	"jt"
 	.byte	0x1a
 	.byte	0x5c
-	.4byte	0xfab
+	.4byte	0xfbf
 	.byte	0xd8
 	.uleb128 0xf
-	.4byte	.LASF292
+	.4byte	.LASF293
 	.byte	0x1a
 	.byte	0x5d
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0xe0
 	.uleb128 0x16
-	.4byte	.LASF293
+	.4byte	.LASF294
 	.byte	0x1a
 	.byte	0x67
 	.4byte	0x84
 	.2byte	0x100
 	.uleb128 0x16
-	.4byte	.LASF294
+	.4byte	.LASF295
 	.byte	0x1a
 	.byte	0x68
 	.4byte	0x84
 	.2byte	0x104
 	.uleb128 0x16
-	.4byte	.LASF295
+	.4byte	.LASF296
 	.byte	0x1a
 	.byte	0x6a
 	.4byte	0x3b
 	.2byte	0x108
 	.uleb128 0x16
-	.4byte	.LASF296
+	.4byte	.LASF297
 	.byte	0x1a
 	.byte	0x6b
 	.4byte	0x3b
 	.2byte	0x110
 	.uleb128 0x16
-	.4byte	.LASF297
+	.4byte	.LASF298
 	.byte	0x1a
 	.byte	0x6c
 	.4byte	0x3b
 	.2byte	0x118
 	.uleb128 0x16
-	.4byte	.LASF298
+	.4byte	.LASF299
 	.byte	0x1a
 	.byte	0x75
 	.4byte	0x25d
@@ -4259,42 +3665,48 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF136
 	.byte	0x1a
 	.byte	0x76
-	.4byte	0xc88
+	.4byte	0xc8f
 	.2byte	0x128
 	.uleb128 0x16
-	.4byte	.LASF299
+	.4byte	.LASF300
 	.byte	0x1a
 	.byte	0x7c
 	.4byte	0x109
 	.2byte	0x168
 	.uleb128 0x16
-	.4byte	.LASF300
+	.4byte	.LASF301
 	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x109
 	.2byte	0x170
 	.uleb128 0x16
-	.4byte	.LASF301
+	.4byte	.LASF302
 	.byte	0x1a
 	.byte	0x83
 	.4byte	0xb8
 	.2byte	0x178
 	.uleb128 0x16
-	.4byte	.LASF302
+	.4byte	.LASF303
 	.byte	0x1a
 	.byte	0x88
-	.4byte	0xd01
+	.4byte	0xd08
 	.2byte	0x180
+	.uleb128 0x16
+	.4byte	.LASF304
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x109
+	.2byte	0x198
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xe
-	.4byte	.LASF303
+	.4byte	.LASF305
 	.byte	0x40
 	.byte	0x1b
 	.byte	0x2c
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4308,109 +3720,109 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0x2f
-	.4byte	0x1448
+	.4byte	0x145c
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF305
+	.4byte	.LASF307
 	.byte	0x1b
 	.byte	0x30
 	.4byte	0xd5
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF306
+	.4byte	.LASF308
 	.byte	0x1b
 	.byte	0x32
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF34
 	.byte	0x1b
 	.byte	0x33
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF307
+	.4byte	.LASF309
 	.byte	0x1b
 	.byte	0x34
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF308
+	.4byte	.LASF310
 	.byte	0x1b
 	.byte	0x35
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x38
 	.byte	0
 	.uleb128 0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x27
-	.4byte	.LASF489
+	.4byte	.LASF481
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfa6
+	.4byte	0xfba
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x1a
-	.byte	0x8e
-	.4byte	0xd3d
+	.byte	0x8f
+	.4byte	0xd44
 	.uleb128 0x4
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x5
-	.4byte	.LASF310
-	.byte	0x6
+	.4byte	.LASF312
+	.byte	0x5
 	.byte	0xab
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0xfe7
+	.4byte	0xffb
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF311
-	.byte	0x6
+	.4byte	.LASF313
+	.byte	0x5
 	.byte	0xad
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF312
-	.byte	0x6
+	.4byte	.LASF314
+	.byte	0x5
 	.byte	0xae
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF313
-	.byte	0x6
+	.4byte	.LASF315
+	.byte	0x5
 	.byte	0xfc
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF314
-	.byte	0x6
+	.4byte	.LASF316
+	.byte	0x5
 	.byte	0xfd
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF315
-	.byte	0x6
+	.4byte	.LASF317
+	.byte	0x5
 	.byte	0xfe
 	.4byte	0x109
 	.uleb128 0xe
-	.4byte	.LASF316
+	.4byte	.LASF318
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x2e
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xf
-	.4byte	.LASF317
+	.4byte	.LASF319
 	.byte	0x1c
 	.byte	0x2f
 	.4byte	0x12a
@@ -4420,25 +3832,25 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x8
 	.4byte	0x29
 	.uleb128 0xe
-	.4byte	.LASF318
+	.4byte	.LASF320
 	.byte	0x68
 	.byte	0x1c
 	.byte	0xa6
-	.4byte	0x10da
+	.4byte	0x10ee
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1c
 	.byte	0xa8
-	.4byte	0x10da
+	.4byte	0x10ee
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF319
+	.4byte	.LASF321
 	.byte	0x1c
 	.byte	0xa9
 	.4byte	0x280
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF320
+	.4byte	.LASF322
 	.byte	0x1c
 	.byte	0xaa
 	.4byte	0xb8
@@ -4450,43 +3862,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x59
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x1c
 	.byte	0xad
-	.4byte	0x1104
+	.4byte	0x1118
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF322
+	.4byte	.LASF324
 	.byte	0x1c
 	.byte	0xae
-	.4byte	0x1123
+	.4byte	0x1137
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF323
+	.4byte	.LASF325
 	.byte	0x1c
 	.byte	0xaf
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF324
+	.4byte	.LASF326
 	.byte	0x1c
 	.byte	0xb0
-	.4byte	0x1149
+	.4byte	0x115d
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF325
+	.4byte	.LASF327
 	.byte	0x1c
 	.byte	0xb4
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1c
 	.byte	0xb5
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF326
+	.4byte	.LASF328
 	.byte	0x1c
 	.byte	0xb6
 	.4byte	0x59
@@ -4500,30 +3912,30 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0xf
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x103d
+	.4byte	0x1051
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1123
+	.4byte	0x1137
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
@@ -4531,248 +3943,248 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x110a
+	.4byte	0x111e
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1138
+	.4byte	0x114c
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1129
+	.4byte	0x113d
 	.uleb128 0x28
-	.4byte	0x1149
+	.4byte	0x115d
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x113e
+	.4byte	0x1152
 	.uleb128 0x5
-	.4byte	.LASF327
+	.4byte	.LASF329
 	.byte	0x1c
 	.byte	0xbd
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x28
-	.4byte	0x116a
+	.4byte	0x117e
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
 	.4byte	0x59
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF328
+	.4byte	.LASF330
 	.byte	0x1c
 	.2byte	0x11e
-	.4byte	0x1176
+	.4byte	0x118a
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x115a
+	.4byte	0x116e
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0x118c
+	.4byte	0x11a0
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF329
+	.4byte	.LASF331
 	.byte	0x1c
 	.2byte	0x1fd
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF330
+	.4byte	.LASF332
 	.byte	0x1c
 	.2byte	0x1fe
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF331
+	.4byte	.LASF333
 	.byte	0x1c
 	.2byte	0x200
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF332
+	.4byte	.LASF334
 	.byte	0x1c
 	.2byte	0x205
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xd
-	.4byte	.LASF333
+	.4byte	.LASF335
 	.byte	0x1c
 	.2byte	0x206
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x11d8
+	.4byte	0x11ec
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF334
+	.4byte	.LASF336
 	.byte	0x1c
 	.2byte	0x207
-	.4byte	0x11c8
+	.4byte	0x11dc
 	.uleb128 0xd
-	.4byte	.LASF335
+	.4byte	.LASF337
 	.byte	0x1c
 	.2byte	0x209
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF336
+	.4byte	.LASF338
 	.byte	0x1c
 	.2byte	0x20a
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF337
+	.4byte	.LASF339
 	.byte	0x1c
 	.2byte	0x20b
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF338
+	.4byte	.LASF340
 	.byte	0x1c
 	.2byte	0x20c
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF339
+	.4byte	.LASF341
 	.byte	0x1c
 	.2byte	0x20d
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xb
-	.4byte	0x1037
-	.4byte	0x1230
+	.4byte	0x104b
+	.4byte	0x1244
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF340
+	.4byte	.LASF342
 	.byte	0x1c
 	.2byte	0x20e
-	.4byte	0x1220
+	.4byte	0x1234
 	.uleb128 0xd
-	.4byte	.LASF341
+	.4byte	.LASF343
 	.byte	0x1c
 	.2byte	0x20f
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xd
-	.4byte	.LASF342
+	.4byte	.LASF344
 	.byte	0x1c
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1254
+	.4byte	0x1268
 	.uleb128 0xd
-	.4byte	.LASF343
+	.4byte	.LASF345
 	.byte	0x1c
 	.2byte	0x211
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF344
+	.4byte	.LASF346
 	.byte	0x1c
 	.2byte	0x212
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF345
+	.4byte	.LASF347
 	.byte	0x1c
 	.2byte	0x216
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF346
+	.4byte	.LASF348
 	.byte	0x1c
 	.2byte	0x217
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF347
+	.4byte	.LASF349
 	.byte	0x1c
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x12b6
+	.4byte	0x12ca
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF348
+	.4byte	.LASF350
 	.byte	0x1c
 	.2byte	0x220
-	.4byte	0x12a5
+	.4byte	0x12b9
 	.uleb128 0xd
-	.4byte	.LASF349
+	.4byte	.LASF351
 	.byte	0x1c
 	.2byte	0x222
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF350
+	.4byte	.LASF352
 	.byte	0x1c
 	.2byte	0x224
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF351
+	.4byte	.LASF353
 	.byte	0x1c
 	.2byte	0x230
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0x29
-	.4byte	.LASF352
+	.4byte	.LASF354
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1c
 	.2byte	0x286
-	.4byte	0x1310
+	.4byte	0x1324
 	.uleb128 0x1c
-	.4byte	.LASF353
+	.4byte	.LASF355
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF354
+	.4byte	.LASF356
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF355
+	.4byte	.LASF357
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF356
+	.4byte	.LASF358
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF357
+	.4byte	.LASF359
 	.byte	0x1c
 	.2byte	0x28c
-	.4byte	0x12e6
+	.4byte	0x12fa
 	.uleb128 0xd
-	.4byte	.LASF358
+	.4byte	.LASF360
 	.byte	0x1d
 	.2byte	0x3ba
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF359
+	.4byte	.LASF361
 	.byte	0x1d
 	.2byte	0x3bb
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF360
+	.4byte	.LASF362
 	.byte	0x1d
 	.2byte	0x3bc
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x1350
+	.4byte	0x1364
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF415
-	.byte	0x4
+	.4byte	.LASF379
+	.byte	0x1
 	.byte	0xa
-	.4byte	0x1340
+	.4byte	0x1354
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_isi_pattern
@@ -4782,125 +4194,125 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF27
 	.byte	0x78
-	.byte	0xc
+	.byte	0xb
 	.byte	0xee
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0xef
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0x10
 	.string	"id"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xf0
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF361
-	.byte	0xc
+	.4byte	.LASF363
+	.byte	0xb
 	.byte	0xf1
-	.4byte	0x1578
+	.4byte	0x158a
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF362
-	.byte	0xc
+	.4byte	.LASF364
+	.byte	0xb
 	.byte	0xf2
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF363
-	.byte	0xc
+	.4byte	.LASF365
+	.byte	0xb
 	.byte	0xf3
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF364
-	.byte	0xc
+	.4byte	.LASF366
+	.byte	0xb
 	.byte	0xf4
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF365
-	.byte	0xc
+	.4byte	.LASF367
+	.byte	0xb
 	.byte	0xf5
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF366
-	.byte	0xc
+	.4byte	.LASF368
+	.byte	0xb
 	.byte	0xf6
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF367
-	.byte	0xc
+	.4byte	.LASF369
+	.byte	0xb
 	.byte	0xf7
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF368
-	.byte	0xc
+	.4byte	.LASF370
+	.byte	0xb
 	.byte	0xf8
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF369
-	.byte	0xc
+	.4byte	.LASF371
+	.byte	0xb
 	.byte	0xf9
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
-	.byte	0xc
+	.4byte	.LASF372
+	.byte	0xb
 	.byte	0xfa
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF371
-	.byte	0xc
+	.4byte	.LASF373
+	.byte	0xb
 	.byte	0xfb
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF372
-	.byte	0xc
+	.4byte	.LASF374
+	.byte	0xb
 	.byte	0xfc
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF373
-	.byte	0xc
+	.4byte	.LASF375
+	.byte	0xb
 	.byte	0xfd
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0x10
 	.string	"ops"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xfe
 	.4byte	0x263
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0xff
 	.4byte	0x11f
 	.byte	0x70
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x136b
+	.4byte	0x137f
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0xf
 	.4byte	0xa8
 	.uleb128 0xe
-	.4byte	.LASF374
+	.4byte	.LASF376
 	.byte	0x20
 	.byte	0x1b
 	.byte	0x19
-	.4byte	0x1490
+	.4byte	0x14a4
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4908,13 +4320,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF375
+	.4byte	.LASF377
 	.byte	0x1b
 	.byte	0x1b
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF376
+	.4byte	.LASF378
 	.byte	0x1b
 	.byte	0x1c
 	.4byte	0x135
@@ -4923,53 +4335,51 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF47
 	.byte	0x1b
 	.byte	0x1d
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x18
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1453
+	.4byte	0x1467
 	.uleb128 0x2b
 	.string	"gd"
 	.byte	0x1b
 	.byte	0x57
-	.4byte	0x14a2
-	.uleb128 0x1
-	.byte	0x62
+	.4byte	0x14b4
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfcc
+	.4byte	0xfe0
 	.uleb128 0x2c
-	.4byte	.LASF490
+	.4byte	.LASF482
 	.byte	0x8
 	.byte	0x1e
 	.byte	0x33
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2d
 	.string	"np"
 	.byte	0x1e
 	.byte	0x34
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2e
-	.4byte	.LASF377
+	.4byte	.LASF380
 	.byte	0x1e
 	.byte	0x35
 	.4byte	0xec
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0x2
-	.4byte	.LASF378
+	.4byte	.LASF381
 	.byte	0x1e
 	.byte	0x36
-	.4byte	0x14a8
+	.4byte	0x14ba
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF382
 	.byte	0x4
 	.byte	0x1f
 	.byte	0xc
-	.4byte	0x14f4
+	.4byte	0x1506
 	.uleb128 0x10
 	.string	"pid"
 	.byte	0x1f
@@ -4978,22 +4388,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF380
+	.4byte	.LASF383
 	.byte	0x1f
 	.byte	0x10
-	.4byte	0x14ff
+	.4byte	0x1511
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14db
+	.4byte	0x14ed
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0x30
 	.byte	0x20
 	.byte	0x23
-	.4byte	0x1548
+	.4byte	0x155a
 	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x20
@@ -5001,13 +4411,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF381
+	.4byte	.LASF384
 	.byte	0x20
 	.byte	0x25
-	.4byte	0x1677
+	.4byte	0x1689
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF382
+	.4byte	.LASF385
 	.byte	0x20
 	.byte	0x26
 	.4byte	0x290
@@ -5021,46 +4431,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x150b
+	.4byte	0x151d
 	.uleb128 0xe
-	.4byte	.LASF383
+	.4byte	.LASF386
 	.byte	0x10
-	.byte	0xc
+	.byte	0xb
 	.byte	0xb5
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0xf
-	.4byte	.LASF384
-	.byte	0xc
+	.4byte	.LASF387
+	.byte	0xb
 	.byte	0xb6
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF385
-	.byte	0xc
+	.4byte	.LASF388
+	.byte	0xb
 	.byte	0xb7
 	.4byte	0x109
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x154e
+	.4byte	0x1560
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.uleb128 0x14
 	.4byte	0x25d
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x157e
+	.4byte	0x1590
 	.uleb128 0xe
-	.4byte	.LASF386
+	.4byte	.LASF389
 	.byte	0x80
 	.byte	0x20
 	.byte	0x54
-	.4byte	0x1677
+	.4byte	0x1689
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x20
@@ -5071,88 +4481,88 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"id"
 	.byte	0x20
 	.byte	0x56
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF387
+	.4byte	.LASF390
 	.byte	0x20
 	.byte	0x57
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF388
+	.4byte	.LASF391
 	.byte	0x20
 	.byte	0x58
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF389
+	.4byte	.LASF392
 	.byte	0x20
 	.byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF390
+	.4byte	.LASF393
 	.byte	0x20
 	.byte	0x5a
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF391
+	.4byte	.LASF394
 	.byte	0x20
 	.byte	0x5b
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF367
+	.4byte	.LASF369
 	.byte	0x20
 	.byte	0x5c
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF368
+	.4byte	.LASF370
 	.byte	0x20
 	.byte	0x5d
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x20
 	.byte	0x5e
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF392
+	.4byte	.LASF395
 	.byte	0x20
 	.byte	0x5f
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
+	.4byte	.LASF372
 	.byte	0x20
 	.byte	0x60
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF393
+	.4byte	.LASF396
 	.byte	0x20
 	.byte	0x61
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF394
+	.4byte	.LASF397
 	.byte	0x20
 	.byte	0x62
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF372
+	.4byte	.LASF374
 	.byte	0x20
 	.byte	0x63
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF373
+	.4byte	.LASF375
 	.byte	0x20
 	.byte	0x64
 	.4byte	0x59
@@ -5172,27 +4582,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1593
+	.4byte	0x15a5
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x168c
+	.4byte	0x169e
 	.uleb128 0x14
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x167d
+	.4byte	0x168f
 	.uleb128 0x5
-	.4byte	.LASF395
+	.4byte	.LASF398
 	.byte	0x21
 	.byte	0xb
 	.4byte	0x149
 	.uleb128 0xe
-	.4byte	.LASF396
+	.4byte	.LASF399
 	.byte	0x70
 	.byte	0x22
 	.byte	0x16
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x22
@@ -5209,43 +4619,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF28
 	.byte	0x22
 	.byte	0x19
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF54
 	.byte	0x22
 	.byte	0x1d
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF397
+	.4byte	.LASF400
 	.byte	0x22
 	.byte	0x1e
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF398
+	.4byte	.LASF401
 	.byte	0x22
 	.byte	0x23
-	.4byte	0x1759
+	.4byte	0x176b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF399
+	.4byte	.LASF402
 	.byte	0x22
 	.byte	0x25
-	.4byte	0x176f
+	.4byte	0x1781
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF400
+	.4byte	.LASF403
 	.byte	0x22
 	.byte	0x2a
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF401
+	.4byte	.LASF404
 	.byte	0x22
 	.byte	0x2b
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF35
@@ -5254,7 +4664,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF402
+	.4byte	.LASF405
 	.byte	0x22
 	.byte	0x30
 	.4byte	0x290
@@ -5262,1038 +4672,844 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x169d
+	.4byte	0x16af
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0x28
-	.4byte	0x1759
+	.4byte	0x176b
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xe7
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1749
+	.4byte	0x175b
 	.uleb128 0x28
-	.4byte	0x176f
+	.4byte	0x1781
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x175f
+	.4byte	0x1771
 	.uleb128 0xb
-	.4byte	0x173d
-	.4byte	0x1780
+	.4byte	0x174f
+	.4byte	0x1792
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF403
+	.4byte	.LASF406
 	.byte	0x22
 	.byte	0x48
-	.4byte	0x1775
+	.4byte	0x1787
 	.uleb128 0xb
 	.4byte	0xf3
-	.4byte	0x179b
+	.4byte	0x17ad
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF404
+	.4byte	.LASF407
 	.byte	0x22
 	.byte	0x49
-	.4byte	0x178b
+	.4byte	0x179d
 	.uleb128 0xb
-	.4byte	0x17b6
-	.4byte	0x17b6
+	.4byte	0x17c8
+	.4byte	0x17c8
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x5
-	.4byte	.LASF405
+	.4byte	.LASF408
 	.byte	0x23
 	.byte	0x15
-	.4byte	0x17a6
+	.4byte	0x17b8
 	.uleb128 0xb
 	.4byte	0x59
-	.4byte	0x17d7
+	.4byte	0x17e9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF406
+	.4byte	.LASF409
 	.byte	0x23
 	.byte	0x1a
-	.4byte	0x17c7
+	.4byte	0x17d9
 	.uleb128 0x25
 	.byte	0x4
 	.4byte	0x84
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x181f
+	.byte	0x2
+	.byte	0x13
+	.4byte	0x1831
 	.uleb128 0x1c
-	.4byte	.LASF407
+	.4byte	.LASF410
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF408
+	.4byte	.LASF411
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF409
+	.4byte	.LASF412
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF410
+	.4byte	.LASF413
 	.byte	0x3
 	.uleb128 0x1c
-	.4byte	.LASF411
+	.4byte	.LASF414
 	.byte	0x4
 	.uleb128 0x1c
-	.4byte	.LASF412
+	.4byte	.LASF415
 	.byte	0x5
 	.uleb128 0x1c
-	.4byte	.LASF413
+	.4byte	.LASF416
 	.byte	0x6
 	.uleb128 0x1c
-	.4byte	.LASF414
+	.4byte	.LASF417
 	.byte	0x7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xdb
-	.4byte	0x182f
+	.4byte	0x1841
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x181f
+	.4byte	0x1831
 	.uleb128 0x2a
-	.4byte	.LASF416
-	.byte	0x1
-	.byte	0x1f
-	.4byte	0x182f
+	.4byte	.LASF418
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0x1841
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pattern
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1859
+	.4byte	0x186b
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1849
+	.4byte	0x185b
 	.uleb128 0x2a
-	.4byte	.LASF417
-	.byte	0x1
-	.byte	0x29
-	.4byte	0x1859
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x28
+	.4byte	0x186b
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pat_param
 	.uleb128 0x2f
-	.4byte	.LASF418
-	.byte	0x1
-	.2byte	0x185
+	.4byte	.LASF420
+	.byte	0x2
+	.2byte	0x136
 	.4byte	0x67c
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	_u_boot_list_2_cmd_2_ddr_test
 	.uleb128 0x30
-	.4byte	.LASF426
-	.byte	0x3
-	.byte	0x50
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
+	.4byte	.LASF429
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x59
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1904
+	.4byte	0x1b4f
 	.uleb128 0x31
-	.4byte	.LASF267
-	.byte	0x3
-	.byte	0x50
-	.4byte	0x135
-	.4byte	.LLST76
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x109
+	.4byte	.LLST15
 	.uleb128 0x31
-	.4byte	.LASF51
-	.byte	0x3
-	.byte	0x50
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0x60
 	.4byte	0x109
-	.4byte	.LLST77
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x52
-	.4byte	0x1365
-	.4byte	.LLST78
+	.4byte	.LLST16
 	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x53
-	.4byte	0xa8
-	.4byte	.LLST79
-	.uleb128 0x33
-	.8byte	.LVL310
-	.4byte	0x2b65
-	.uleb128 0x34
+	.string	"ret"
+	.byte	0x4
+	.byte	0x62
+	.4byte	0x59
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x33
+	.4byte	0x1bc3
+	.8byte	.LBB6
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x4
+	.byte	0x64
+	.4byte	0x1a2b
 	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xd
-	.byte	0x83
-	.sleb128 -4
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0
-	.byte	0
+	.4byte	0x1bde
+	.4byte	.LLST17
+	.uleb128 0x34
+	.4byte	0x1bd3
+	.4byte	.LLST18
 	.uleb128 0x35
-	.4byte	.LASF428
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a04
+	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x36
-	.string	"buf"
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x1365
-	.4byte	.LLST29
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0xa8
-	.4byte	.LLST30
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST31
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST32
-	.uleb128 0x31
-	.4byte	.LASF421
-	.byte	0x3
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST33
-	.uleb128 0x37
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x31
-	.4byte	0x1a04
-	.4byte	.LLST34
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x32
-	.4byte	0x1a0a
-	.4byte	.LLST35
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST36
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST37
-	.uleb128 0x32
-	.string	"val"
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST38
-	.uleb128 0x37
-	.4byte	.LASF423
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST39
-	.uleb128 0x37
-	.4byte	.LASF424
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST40
+	.4byte	0x1be9
+	.4byte	.LLST19
+	.uleb128 0x36
+	.4byte	0x1bf2
+	.4byte	.LLST20
+	.uleb128 0x36
+	.4byte	0x1bfb
+	.4byte	.LLST21
+	.uleb128 0x36
+	.4byte	0x1c06
+	.4byte	.LLST22
 	.uleb128 0x37
-	.4byte	.LASF425
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST41
-	.uleb128 0x33
-	.8byte	.LVL115
-	.4byte	0x2b65
-	.uleb128 0x34
+	.4byte	0x1c11
+	.uleb128 0x36
+	.4byte	0x1c1c
+	.4byte	.LLST23
+	.uleb128 0x36
+	.4byte	0x1c27
+	.4byte	.LLST24
+	.uleb128 0x36
+	.4byte	0x1c32
+	.4byte	.LLST25
+	.uleb128 0x38
+	.8byte	.LVL64
+	.4byte	0x26e7
+	.4byte	0x1981
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC16
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL66
+	.4byte	0x26f3
+	.4byte	0x199f
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
 	.byte	0
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x109
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x42
-	.uleb128 0x30
-	.4byte	.LASF427
-	.byte	0x3
-	.byte	0x1c
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
+	.uleb128 0x38
+	.8byte	.LVL72
+	.4byte	0x26f3
+	.4byte	0x19b9
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a98
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.byte	0
 	.uleb128 0x38
-	.string	"buf"
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x1365
+	.8byte	.LVL76
+	.4byte	0x26fe
+	.4byte	0x19d7
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0xa8
-	.4byte	.LLST25
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
 	.uleb128 0x39
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
-	.4byte	.LLST26
-	.uleb128 0x2a
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x1e
-	.4byte	0x1a04
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 4
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL78
+	.4byte	0x26f3
+	.4byte	0x19f6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
 	.uleb128 0x3a
-	.string	"p"
+	.8byte	.LVL79
+	.4byte	0x26f3
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
 	.byte	0x3
-	.byte	0x1f
-	.4byte	0x1a04
+	.8byte	.LC11
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST27
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST28
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.byte	0
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF491
-	.byte	0x3
-	.byte	0xa
-	.byte	0x1
-	.4byte	0x1aae
+	.4byte	0x1b4f
+	.8byte	.LBB15
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x4
+	.byte	0x66
 	.uleb128 0x3c
-	.string	"p"
-	.byte	0x3
-	.byte	0xa
-	.4byte	0x1365
-	.byte	0
+	.4byte	0x1b6a
+	.uleb128 0x3c
+	.4byte	0x1b5f
 	.uleb128 0x35
-	.4byte	.LASF429
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x59
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1d27
-	.uleb128 0x31
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
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-	.8byte	.LVL157
-	.4byte	0x2b65
-	.4byte	0x1f64
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL39
+	.4byte	0x26f3
+	.4byte	0x1d41
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC22
+	.8byte	.LC6
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL160
-	.4byte	0x2b85
-	.4byte	0x1f89
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
+	.uleb128 0x45
+	.8byte	.LVL40
+	.4byte	0x2713
+	.uleb128 0x38
+	.8byte	.LVL42
+	.4byte	0x26f3
+	.4byte	0x1d73
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL49
+	.4byte	0x271e
+	.4byte	0x1d92
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL50
+	.4byte	0x2729
+	.4byte	0x1db7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL165
-	.4byte	0x2b85
-	.4byte	0x1fae
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL53
+	.4byte	0x2729
+	.4byte	0x1ddc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL166
-	.4byte	0x1904
-	.4byte	0x1fe4
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL54
+	.4byte	0x2735
+	.4byte	0x1e12
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x84
 	.sleb128 0
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL171
-	.4byte	0x2b85
-	.4byte	0x2015
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL59
+	.4byte	0x2729
+	.4byte	0x1e43
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xe
@@ -6305,50 +5521,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x84
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL172
-	.4byte	0x1904
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL60
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
@@ -6357,623 +5573,448 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x2052
+	.4byte	0x1e80
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x7
 	.byte	0
 	.uleb128 0x46
-	.4byte	.LASF443
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x209b
-	.uleb128 0x49
-	.4byte	.LASF444
-	.byte	0x5
-	.byte	0xe
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"col"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"bw"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF440
-	.byte	0x5
-	.byte	0x10
-	.4byte	0x59
-	.uleb128 0x4c
-	.uleb128 0x48
-	.string	"__v"
-	.byte	0x5
-	.byte	0x13
-	.4byte	0xa8
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF455
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF448
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x25c1
+	.4byte	0x2293
 	.uleb128 0x31
-	.4byte	.LASF445
-	.byte	0x1
-	.byte	0xbc
-	.4byte	0x25c1
-	.4byte	.LLST58
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0x62
+	.4byte	0x2293
+	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	.LASF446
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF438
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST59
+	.4byte	.LLST38
 	.uleb128 0x31
-	.4byte	.LASF447
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF439
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST60
+	.4byte	.LLST39
 	.uleb128 0x31
-	.4byte	.LASF448
-	.byte	0x1
-	.byte	0xbd
+	.4byte	.LASF440
+	.byte	0x2
+	.byte	0x63
 	.4byte	0x641
-	.4byte	.LLST61
-	.uleb128 0x32
+	.4byte	.LLST40
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x1
-	.byte	0xbf
+	.byte	0x2
+	.byte	0x65
 	.4byte	0x59
-	.4byte	.LLST62
-	.uleb128 0x37
-	.4byte	.LASF449
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST41
+	.uleb128 0x42
+	.4byte	.LASF441
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST63
-	.uleb128 0x37
-	.4byte	.LASF450
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST42
+	.uleb128 0x42
+	.4byte	.LASF442
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST64
-	.uleb128 0x3a
+	.4byte	.LLST43
+	.uleb128 0x32
 	.string	"arg"
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x25c7
+	.byte	0x2
+	.byte	0x67
+	.4byte	0x2299
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x2a
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x25d7
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x68
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x2a
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0xc3
-	.4byte	0x25d7
+	.4byte	.LASF377
+	.byte	0x2
+	.byte	0x69
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -72
-	.uleb128 0x37
-	.4byte	.LASF451
-	.byte	0x1
-	.byte	0xc4
+	.uleb128 0x42
+	.4byte	.LASF443
+	.byte	0x2
+	.byte	0x6a
 	.4byte	0xa8
-	.4byte	.LLST65
-	.uleb128 0x37
-	.4byte	.LASF452
-	.byte	0x1
-	.byte	0xc5
+	.4byte	.LLST44
+	.uleb128 0x42
+	.4byte	.LASF444
+	.byte	0x2
+	.byte	0x6b
 	.4byte	0xa8
-	.4byte	.LLST66
-	.uleb128 0x32
+	.4byte	.LLST45
+	.uleb128 0x42
+	.4byte	.LASF445
+	.byte	0x2
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xc6
+	.byte	0x2
+	.byte	0x6d
 	.4byte	0x59
-	.4byte	.LLST67
-	.uleb128 0x37
-	.4byte	.LASF453
-	.byte	0x1
-	.byte	0xc7
+	.4byte	.LLST47
+	.uleb128 0x42
+	.4byte	.LASF446
+	.byte	0x2
+	.byte	0x6e
 	.4byte	0x59
-	.4byte	.LLST68
-	.uleb128 0x37
-	.4byte	.LASF454
-	.byte	0x1
-	.byte	0xc8
+	.4byte	.LLST48
+	.uleb128 0x42
+	.4byte	.LASF447
+	.byte	0x2
+	.byte	0x6f
 	.4byte	0xa8
-	.4byte	.LLST69
-	.uleb128 0x3a
+	.4byte	.LLST49
+	.uleb128 0x32
 	.string	"dev"
-	.byte	0x1
-	.byte	0xec
+	.byte	0x2
+	.byte	0x91
 	.4byte	0x25d
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -112
-	.uleb128 0x3d
-	.4byte	0x28ba
-	.8byte	.LBB40
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x1
-	.byte	0xcb
-	.4byte	0x223d
-	.uleb128 0x3e
-	.4byte	0x28d1
-	.4byte	.LLST70
-	.uleb128 0x3e
-	.4byte	0x28c6
-	.4byte	.LLST71
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x40
-	.4byte	0x28dc
-	.4byte	.LLST72
-	.uleb128 0x40
-	.4byte	0x28e5
-	.4byte	.LLST73
-	.uleb128 0x42
-	.8byte	.LVL183
-	.4byte	0x2b65
-	.4byte	0x2208
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC23
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL184
-	.4byte	0x2b65
-	.4byte	0x2227
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL132
+	.4byte	0x26f3
+	.4byte	0x1fbc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC24
+	.8byte	.LC18
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL193
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL133
+	.4byte	0x2740
+	.4byte	0x1fdf
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4e
-	.4byte	0x2869
-	.8byte	.LBB54
-	.4byte	.Ldebug_ranges0+0x150
-	.byte	0x1
-	.2byte	0x152
-	.4byte	0x229d
-	.uleb128 0x44
-	.4byte	0x288f
-	.uleb128 0x44
-	.4byte	0x2884
-	.uleb128 0x44
-	.4byte	0x2879
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x40
-	.4byte	0x289a
-	.4byte	.LLST74
-	.uleb128 0x41
-	.4byte	0x28a3
-	.uleb128 0x40
-	.4byte	0x28ae
-	.4byte	.LLST75
-	.uleb128 0x33
-	.8byte	.LVL272
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC33
-	.byte	0
-	.byte	0
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL187
-	.4byte	0x2b91
-	.4byte	0x22bb
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL135
+	.4byte	0x274b
+	.4byte	0x1ffd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0x33
 	.byte	0x24
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL197
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL199
-	.4byte	0x2b9c
-	.4byte	0x22eb
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL139
+	.4byte	0x26f3
+	.uleb128 0x38
+	.8byte	.LVL141
+	.4byte	0x2756
+	.4byte	0x202d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x8f
 	.sleb128 0
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
-	.uleb128 0x130
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL202
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL203
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL204
-	.4byte	0x2b65
-	.4byte	0x2324
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC36
+	.uleb128 0x110
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL207
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL208
-	.4byte	0x270b
-	.uleb128 0x4f
-	.8byte	.LVL215
-	.4byte	0x2692
-	.uleb128 0x4f
-	.8byte	.LVL216
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL220
-	.4byte	0x25e7
-	.uleb128 0x42
-	.8byte	.LVL221
-	.4byte	0x2b65
-	.4byte	0x2389
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL143
+	.4byte	0x2761
+	.uleb128 0x45
+	.8byte	.LVL144
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL145
+	.4byte	0x241b
+	.uleb128 0x38
+	.8byte	.LVL146
+	.4byte	0x26f3
+	.4byte	0x2073
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC30
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x3a
+	.8byte	.LC26
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL225
-	.4byte	0x2b65
-	.4byte	0x23a9
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL148
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL149
+	.4byte	0x22b9
+	.uleb128 0x45
+	.8byte	.LVL150
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL161
+	.4byte	0x26f3
+	.4byte	0x20b8
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 224
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL226
-	.4byte	0x2b65
-	.4byte	0x23d5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL162
+	.4byte	0x26f3
+	.4byte	0x20d6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 216
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL163
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL164
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL167
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL170
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL173
+	.4byte	0x22b9
+	.4byte	0x2126
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
+	.uleb128 0x6
+	.byte	0x8c
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL176
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL177
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL180
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL183
+	.4byte	0x1c44
+	.uleb128 0x45
+	.8byte	.LVL185
+	.4byte	0x276c
+	.uleb128 0x38
+	.8byte	.LVL192
+	.4byte	0x26f3
+	.4byte	0x2198
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xe
+	.byte	0x86
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
 	.byte	0x88
 	.sleb128 0
+	.byte	0x22
+	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL227
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL228
-	.4byte	0x1aae
-	.4byte	0x2400
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL195
+	.4byte	0x26f3
+	.4byte	0x21bc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.uleb128 0x1
+	.byte	0x3a
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL231
-	.4byte	0x28f1
-	.4byte	0x241e
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL205
+	.4byte	0x2777
+	.4byte	0x21e1
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 296
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL234
-	.4byte	0x1e16
-	.4byte	0x243c
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL208
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL209
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL213
+	.4byte	0x26f3
+	.4byte	0x2219
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL237
-	.4byte	0x270b
-	.4byte	0x2458
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x6
-	.byte	0x8b
-	.sleb128 0
-	.byte	0xa
-	.2byte	0x3fc
-	.byte	0x1a
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL240
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL241
-	.4byte	0x1aae
-	.4byte	0x2483
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL244
-	.4byte	0x28f1
-	.4byte	0x24a1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL247
-	.4byte	0x1e16
-	.4byte	0x24bf
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL249
-	.4byte	0x2ba7
-	.uleb128 0x42
-	.8byte	.LVL255
-	.4byte	0x2b65
-	.4byte	0x2504
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC35
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x15
-	.byte	0x83
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x26
-	.byte	0x3
-	.8byte	.LANCHOR2
-	.byte	0x22
-	.byte	0x6
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL281
-	.4byte	0x2b65
-	.4byte	0x2522
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL286
-	.4byte	0x1aae
-	.uleb128 0x4f
-	.8byte	.LVL288
-	.4byte	0x2ba7
-	.uleb128 0x4f
-	.8byte	.LVL293
-	.4byte	0x28f1
-	.uleb128 0x4f
-	.8byte	.LVL294
-	.4byte	0x1e16
-	.uleb128 0x42
-	.8byte	.LVL299
-	.4byte	0x2b65
-	.4byte	0x257b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC28
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL300
-	.4byte	0x2bb2
-	.4byte	0x259f
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL218
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL220
+	.4byte	0x276c
+	.uleb128 0x45
+	.8byte	.LVL223
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL224
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL231
+	.4byte	0x2782
+	.4byte	0x2271
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x35
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x8f
-	.sleb128 240
+	.sleb128 208
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL303
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL234
+	.4byte	0x26f3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC29
-	.uleb128 0x34
+	.8byte	.LC21
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
 	.byte	0
 	.byte	0
@@ -6982,736 +6023,625 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x67c
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25d7
+	.4byte	0x22a9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x4
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25e7
+	.4byte	0x22b9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF456
-	.byte	0x1
-	.byte	0xa4
+	.uleb128 0x46
+	.4byte	.LASF449
+	.byte	0x2
+	.byte	0x36
 	.4byte	0x59
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2692
-	.uleb128 0x36
-	.string	"uv"
-	.byte	0x1
-	.byte	0xa4
-	.4byte	0x59
-	.4byte	.LLST1
-	.uleb128 0x3a
-	.string	"dev"
-	.byte	0x1
-	.byte	0xa6
-	.4byte	0x25d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x32
+	.4byte	0x23eb
+	.uleb128 0x31
+	.4byte	.LASF450
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF451
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF452
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x43
+	.string	"i"
+	.byte	0x2
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST32
+	.uleb128 0x42
+	.4byte	.LASF453
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x42
+	.4byte	.LASF454
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST34
+	.uleb128 0x42
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST35
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xa7
+	.byte	0x2
+	.byte	0x3b
 	.4byte	0x59
-	.4byte	.LLST2
-	.uleb128 0x42
-	.8byte	.LVL11
-	.4byte	0x2bbd
-	.4byte	0x2658
-	.uleb128 0x34
+	.4byte	.LLST36
+	.uleb128 0x45
+	.8byte	.LVL111
+	.4byte	0x278d
+	.uleb128 0x38
+	.8byte	.LVL113
+	.4byte	0x26f3
+	.4byte	0x2381
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC2
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 56
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL14
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL18
-	.4byte	0x2bc9
-	.4byte	0x267d
-	.uleb128 0x34
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL21
-	.4byte	0x2bd5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL114
+	.4byte	0x241b
+	.4byte	0x239f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x64
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffc0
+	.byte	0x1a
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL117
+	.4byte	0x189b
+	.4byte	0x23b8
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF457
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x59
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x270b
-	.uleb128 0x31
-	.4byte	.LASF458
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x109
-	.4byte	.LLST0
-	.uleb128 0x4f
-	.8byte	.LVL2
-	.4byte	0x2be0
-	.uleb128 0x4f
-	.8byte	.LVL3
-	.4byte	0x2beb
-	.uleb128 0x4f
-	.8byte	.LVL4
-	.4byte	0x2bf6
-	.uleb128 0x33
-	.8byte	.LVL7
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL120
+	.4byte	0x26f3
+	.4byte	0x23dd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x34
+	.8byte	.LC17
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL125
+	.4byte	0x276c
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF459
-	.byte	0x1
-	.byte	0x67
+	.uleb128 0x30
+	.4byte	.LASF456
+	.byte	0x2
+	.byte	0x31
 	.4byte	0x59
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x241b
+	.uleb128 0x47
+	.string	"uv"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xa8
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF457
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x59
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2869
+	.4byte	0x244c
 	.uleb128 0x31
-	.4byte	.LASF460
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x109
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF458
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST17
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26d2
 	.uleb128 0x31
-	.4byte	.LASF461
+	.4byte	.LASF431
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST18
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	.LASF462
+	.4byte	.LASF377
 	.byte	0x1
-	.byte	0x67
+	.byte	0x2d
 	.4byte	0x109
-	.4byte	.LLST19
-	.uleb128 0x32
-	.string	"i"
+	.4byte	.LLST1
+	.uleb128 0x42
+	.4byte	.LASF459
 	.byte	0x1
-	.byte	0x6b
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST20
-	.uleb128 0x37
-	.4byte	.LASF463
+	.4byte	.LLST2
+	.uleb128 0x43
+	.string	"i"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST21
-	.uleb128 0x37
-	.4byte	.LASF464
+	.4byte	.LLST3
+	.uleb128 0x43
+	.string	"j"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST22
-	.uleb128 0x37
-	.4byte	.LASF458
+	.4byte	.LLST4
+	.uleb128 0x43
+	.string	"q"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST23
+	.4byte	.LLST5
 	.uleb128 0x32
-	.string	"ret"
+	.string	"buf"
 	.byte	0x1
-	.byte	0x6d
-	.4byte	0x59
-	.4byte	.LLST24
-	.uleb128 0x4f
-	.8byte	.LVL73
-	.4byte	0x2c01
-	.uleb128 0x4f
-	.8byte	.LVL75
-	.4byte	0x2be0
-	.uleb128 0x42
-	.8byte	.LVL78
-	.4byte	0x2b65
-	.4byte	0x27da
-	.uleb128 0x34
+	.byte	0x30
+	.4byte	0x1e70
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x43
+	.string	"p"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x1379
+	.4byte	.LLST6
+	.uleb128 0x48
+	.4byte	.LASF460
+	.4byte	0x26e2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x38
+	.8byte	.LVL2
+	.4byte	0x26f3
+	.4byte	0x250e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL4
+	.4byte	0x26f3
+	.4byte	0x252e
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x84
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL6
+	.4byte	0x26f3
+	.4byte	0x254e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL79
-	.4byte	0x2beb
-	.4byte	0x27f8
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL8
+	.4byte	0x271e
+	.4byte	0x256c
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x8
-	.byte	0x8a
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
 	.sleb128 0
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL80
-	.4byte	0x2bf6
-	.uleb128 0x42
-	.8byte	.LVL83
-	.4byte	0x2b65
-	.4byte	0x281d
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL9
+	.4byte	0x2799
+	.4byte	0x2596
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL84
-	.4byte	0x1aae
-	.4byte	0x2836
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x3
-	.byte	0x40
-	.byte	0x40
-	.byte	0x24
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL87
-	.4byte	0x2b65
-	.4byte	0x285b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL10
+	.4byte	0x2735
+	.4byte	0x25c5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC15
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
 	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL92
-	.4byte	0x2ba7
+	.uleb128 0x38
+	.8byte	.LVL16
+	.4byte	0x26f3
+	.4byte	0x25e4
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF465
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x28ba
-	.uleb128 0x3c
-	.string	"arg"
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF467
-	.byte	0x1
-	.byte	0x4c
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF493
-	.byte	0x1
-	.byte	0x2d
-	.byte	0x1
-	.4byte	0x28f1
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF468
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x59
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
+	.uleb128 0x38
+	.8byte	.LVL17
+	.4byte	0x27a4
+	.4byte	0x25fc
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b2d
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST42
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST43
-	.uleb128 0x37
-	.4byte	.LASF469
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST44
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST45
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST46
-	.uleb128 0x32
-	.string	"q"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST47
-	.uleb128 0x3a
-	.string	"buf"
-	.byte	0x4
-	.byte	0x30
-	.4byte	0x2042
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x4
-	.byte	0x31
-	.4byte	0x1365
-	.4byte	.LLST48
-	.uleb128 0x51
-	.4byte	.LASF470
-	.4byte	0x2b3d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC45
-	.uleb128 0x42
-	.8byte	.LVL123
-	.4byte	0x2b65
-	.4byte	0x29b3
-	.uleb128 0x34
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL20
+	.4byte	0x26f3
+	.4byte	0x2621
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC17
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL125
-	.4byte	0x2b65
-	.4byte	0x29d3
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 200
-	.byte	0x6
-	.uleb128 0x34
+	.8byte	.LC5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
+	.byte	0x8
+	.byte	0x80
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL127
-	.4byte	0x2b65
-	.4byte	0x29f1
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL23
+	.4byte	0x26f3
+	.4byte	0x263f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL130
-	.4byte	0x1a10
-	.4byte	0x2a1b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL24
+	.4byte	0x26f3
+	.4byte	0x265d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x70
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL26
+	.4byte	0x271e
+	.4byte	0x267b
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x72
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL131
-	.4byte	0x1904
-	.4byte	0x2a44
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL27
+	.4byte	0x2799
+	.4byte	0x26a5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL139
-	.4byte	0x2b65
-	.4byte	0x2a63
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL140
-	.4byte	0x2c0d
-	.4byte	0x2a7b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL143
-	.4byte	0x2b65
-	.4byte	0x2aa0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC21
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x53
 	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL146
-	.4byte	0x2b65
-	.4byte	0x2abe
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL28
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL147
-	.4byte	0x2b65
-	.4byte	0x2adc
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL149
-	.4byte	0x1a10
-	.4byte	0x2b06
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL150
-	.4byte	0x1904
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x88
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe7
-	.4byte	0x2b3d
+	.4byte	0x26e2
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x9
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x2b2d
-	.uleb128 0x52
-	.4byte	0x1a98
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b65
-	.uleb128 0x53
-	.4byte	0x1aa4
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF471
-	.4byte	.LASF471
+	.4byte	0x26d2
+	.uleb128 0x49
+	.4byte	.LASF461
+	.4byte	.LASF461
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x4a
+	.4byte	.LASF462
+	.4byte	.LASF462
 	.byte	0x25
 	.byte	0x12
-	.uleb128 0x55
+	.uleb128 0x49
+	.4byte	.LASF463
+	.4byte	.LASF463
+	.byte	0x5
+	.2byte	0x258
+	.uleb128 0x4b
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.uleb128 0x4a
+	.4byte	.LASF464
+	.4byte	.LASF464
+	.byte	0x26
+	.byte	0x5f
+	.uleb128 0x4a
+	.4byte	.LASF465
+	.4byte	.LASF465
+	.byte	0x27
+	.byte	0xb
+	.uleb128 0x49
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x4a
+	.4byte	.LASF467
+	.4byte	.LASF467
+	.byte	0x28
+	.byte	0xe
+	.uleb128 0x4a
+	.4byte	.LASF468
+	.4byte	.LASF468
+	.byte	0x28
+	.byte	0x11
+	.uleb128 0x4a
+	.4byte	.LASF469
+	.4byte	.LASF469
+	.byte	0x9
+	.byte	0x2d
+	.uleb128 0x4a
+	.4byte	.LASF470
+	.4byte	.LASF470
+	.byte	0x29
+	.byte	0x29
+	.uleb128 0x4a
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x27
+	.byte	0xc
+	.uleb128 0x4a
 	.4byte	.LASF472
 	.4byte	.LASF472
-	.byte	0x1d
-	.2byte	0x16c
-	.uleb128 0x56
-	.4byte	.LASF473
-	.4byte	.LASF473
-	.uleb128 0x55
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x4a
 	.4byte	.LASF473
 	.4byte	.LASF473
-	.byte	0x1d
-	.2byte	0x16d
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0x12
+	.uleb128 0x4a
 	.4byte	.LASF474
 	.4byte	.LASF474
-	.byte	0xa
-	.byte	0x2d
-	.uleb128 0x54
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x49
 	.4byte	.LASF475
 	.4byte	.LASF475
-	.byte	0x26
-	.byte	0x29
-	.uleb128 0x54
+	.byte	0x5
+	.2byte	0x2b9
+	.uleb128 0x4a
 	.4byte	.LASF476
 	.4byte	.LASF476
-	.byte	0x21
-	.byte	0x11
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0xd
+	.uleb128 0x49
 	.4byte	.LASF477
 	.4byte	.LASF477
-	.byte	0x20
-	.byte	0x94
-	.uleb128 0x55
-	.4byte	.LASF478
-	.4byte	.LASF478
-	.byte	0x27
-	.2byte	0x1da
-	.uleb128 0x55
-	.4byte	.LASF479
-	.4byte	.LASF479
-	.byte	0x27
-	.2byte	0x116
-	.uleb128 0x54
-	.4byte	.LASF480
-	.4byte	.LASF480
-	.byte	0x28
-	.byte	0xb
-	.uleb128 0x54
-	.4byte	.LASF481
-	.4byte	.LASF481
-	.byte	0x29
-	.byte	0xc
-	.uleb128 0x54
-	.4byte	.LASF482
-	.4byte	.LASF482
-	.byte	0x29
-	.byte	0xa
-	.uleb128 0x54
-	.4byte	.LASF483
-	.4byte	.LASF483
-	.byte	0x29
-	.byte	0xb
-	.uleb128 0x55
-	.4byte	.LASF484
-	.4byte	.LASF484
-	.byte	0x6
-	.2byte	0x2b9
-	.uleb128 0x55
-	.4byte	.LASF485
-	.4byte	.LASF485
 	.byte	0x1d
 	.2byte	0x398
 	.byte	0
@@ -8252,8 +7182,6 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.uleb128 0x3f
 	.uleb128 0x19
-	.uleb128 0x2
-	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x2c
@@ -8327,6 +7255,8 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x27
 	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x12
@@ -8366,64 +7296,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x33
-	.uleb128 0x4109
+	.uleb128 0x1d
 	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.uleb128 0x410a
+	.uleb128 0x5
 	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x18
-	.uleb128 0x2111
-	.uleb128 0x18
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.uleb128 0x5
+	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x2
 	.uleb128 0x17
@@ -8432,156 +7344,40 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3a
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
-	.uleb128 0x2e
+	.uleb128 0x4109
 	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
-	.uleb128 0x1d
-	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x40
-	.uleb128 0x34
+	.uleb128 0x39
+	.uleb128 0x410a
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x41
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x3a
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x3b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8596,14 +7392,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x3c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8612,7 +7408,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8631,7 +7427,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8644,7 +7440,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8657,7 +7453,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8668,9 +7477,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8683,21 +7509,16 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x45
+	.uleb128 0x4109
+	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8722,50 +7543,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x47
 	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
 	.byte	0
-	.uleb128 0x50
-	.uleb128 0x2e
-	.byte	0x1
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
+	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8778,33 +7571,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x54
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8818,10 +7585,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8835,10 +7602,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8854,2991 +7621,2320 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST76:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST15:
+	.8byte	.LVL61
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST77:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST16:
+	.8byte	.LVL61
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL306
-	.8byte	.LFE278
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST78:
-	.8byte	.LVL305
-	.8byte	.LVL306
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LFE271
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST79:
-	.8byte	.LVL305
-	.8byte	.LVL306
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL306
-	.8byte	.LVL307
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL307
-	.8byte	.LVL308
+.LLST17:
+	.8byte	.LVL62
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL308
-	.8byte	.LVL309
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL309
-	.8byte	.LVL310
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL310
-	.8byte	.LFE278
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x63
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+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
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-	.8byte	.LVL105
-	.8byte	.LVL113
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+	.8byte	.LVL62
+	.8byte	.LVL64-1
 	.2byte	0x1
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-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
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+	.8byte	.LFE271
+	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL105
-	.8byte	.LVL106
-	.2byte	0x1
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-	.8byte	.LVL106
-	.8byte	.LVL108
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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+	.8byte	.LVL66
+	.8byte	.LVL67
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-	.8byte	.LVL114
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
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-	.8byte	.LVL117
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
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+	.8byte	.LVL75
+	.2byte	0x1
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-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL81
+	.8byte	.LVL83
 	.2byte	0x1
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-	.8byte	.LVL105
-	.8byte	.LVL109
-	.2byte	0x1
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-	.8byte	.LVL115-1
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+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x2
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+	.8byte	.LVL69
 	.2byte	0x1
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-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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+	.8byte	.LVL72
+	.2byte	0x3
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 	.byte	0x9f
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-	.8byte	.LFE277
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+	.8byte	.LVL79
 	.2byte	0x1
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+	.8byte	.LVL84
+	.2byte	0x1
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-	.8byte	.LVL105
-	.8byte	.LVL107
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+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
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+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
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-	.8byte	.LFE277
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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+	.8byte	.LVL84
+	.2byte	0x1
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-	.8byte	.LVL105
-	.8byte	.LVL110
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+	.8byte	.LVL64
+	.8byte	.LVL65
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+	.8byte	.LVL79
 	.2byte	0x1
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-	.8byte	.LVL115-1
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+	.8byte	.LVL84
 	.2byte	0x1
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-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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+	.8byte	.LVL62
+	.8byte	.LVL65
+	.2byte	0x2
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-	.8byte	.LFE277
-	.2byte	0x1
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-	.8byte	.LVL108
-	.8byte	.LVL113
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+	.8byte	.LVL64
+	.8byte	.LVL80
 	.2byte	0x1
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-	.8byte	.LVL117
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+	.8byte	.LVL81
 	.2byte	0x4
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 	.byte	0x50
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-	.8byte	.LVL117
-	.8byte	.LFE277
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+	.8byte	.LFE271
 	.2byte	0x1
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-	.8byte	.LVL108
-	.8byte	.LVL109
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+	.8byte	.LVL62
+	.8byte	.LVL68
+	.2byte	0x3
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+	.8byte	.LVL74
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 	.2byte	0x1
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-	.8byte	.LVL109
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 	.2byte	0x1
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-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
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+	.8byte	.LVL81
+	.8byte	.LFE271
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-	.8byte	.LFE277
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-	.8byte	.LVL108
-	.8byte	.LVL110
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+	.8byte	.LVL87
+	.8byte	.LVL88
 	.2byte	0x2
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+	.8byte	.LVL89
 	.2byte	0x1
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 	.2byte	0x1
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-	.2byte	0x3
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-	.sleb128 -1
-	.byte	0x9f
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-	.8byte	.LFE277
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+	.8byte	.LFE271
 	.2byte	0x1
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-	.8byte	.LVL108
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-	.2byte	0x2
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-	.2byte	0x1
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-	.8byte	.LFE277
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+	.8byte	.LVL84
+	.8byte	.LVL90
 	.2byte	0x1
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-	.8byte	.LVL108
-	.8byte	.LVL110
-	.2byte	0x2
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+	.8byte	.LVL91
+	.2byte	0x3
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 	.byte	0x9f
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-	.8byte	.LVL115-1
-	.2byte	0x1
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-	.8byte	.LFE277
+	.8byte	.LVL91
+	.8byte	.LFE271
 	.2byte	0x1
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-	.8byte	.LVL108
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-	.2byte	0x2
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-	.2byte	0x1
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-	.8byte	.LFE277
-	.2byte	0x2
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+	.8byte	.LVL84
+	.8byte	.LVL89
+	.2byte	0x3
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-	.8byte	0
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-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
+	.8byte	.LVL91
+	.8byte	.LVL94
+	.2byte	0x3
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-	.8byte	.LVL112
-	.8byte	.LVL115-1
+	.8byte	.LVL94
+	.8byte	.LVL101
 	.2byte	0x1
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-	.8byte	.LFE277
-	.2byte	0x2
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+	.8byte	.LFE271
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 	.8byte	0
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-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
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-	.8byte	.LVL116
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+	.8byte	.LVL35
+	.8byte	.LVL37
 	.2byte	0x1
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-	.8byte	.LVL117
+	.byte	0x50
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 	.2byte	0x1
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+	.2byte	0x4
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-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
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 	.byte	0x9f
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+	.8byte	.LFE268
+	.2byte	0x1
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-	.8byte	.LVL97
-	.8byte	.LVL98
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+	.8byte	.LVL35
+	.8byte	.LVL36
 	.2byte	0x1
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-	.8byte	.LVL100
+	.8byte	.LVL36
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+	.2byte	0x1
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 	.2byte	0x4
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 	.byte	0x51
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-	.8byte	.LFE276
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+	.8byte	.LVL47
 	.2byte	0x1
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+	.8byte	.LVL48
+	.2byte	0x3
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 	.8byte	0
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-	.8byte	.LVL97
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+	.8byte	.LVL50
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 	.2byte	0x1
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-	.8byte	.LFE276
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-	.byte	0xf3
-	.uleb128 0x1
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+	.8byte	.LVL41
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+	.8byte	.LVL50
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 	.8byte	0
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-	.8byte	.LVL100
-	.8byte	.LVL101
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+	.8byte	.LVL38
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 	.2byte	0x2
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-	.8byte	.LFE276
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 	.2byte	0x1
-	.byte	0x55
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-	.8byte	.LVL100
-	.8byte	.LVL101
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 	.2byte	0x2
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-	.8byte	.LFE276
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+	.8byte	.LVL58
 	.2byte	0x1
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+	.8byte	.LFE268
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-	.8byte	.LVL22
-	.8byte	.LVL26-1
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+	.8byte	.LVL129
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 	.2byte	0x1
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-	.2byte	0x1
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-	.8byte	.LVL42
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 	.2byte	0x4
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 	.byte	0x50
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-	.8byte	.LFE274
-	.2byte	0x1
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-	.8byte	.LVL22
-	.8byte	.LVL25
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+	.8byte	.LVL129
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 	.2byte	0x1
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+	.8byte	.LVL129
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 	.2byte	0x1
 	.byte	0x67
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-	.8byte	.LVL42
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 	.2byte	0x4
 	.byte	0xf3
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-	.byte	0x51
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-	.8byte	.LFE274
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 	.2byte	0x1
 	.byte	0x67
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+	.2byte	0x4
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 	.8byte	0
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-	.8byte	.LVL24
-	.8byte	.LVL25
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+	.8byte	.LVL129
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 	.2byte	0x1
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 	.2byte	0x1
-	.byte	0x52
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-	.2byte	0x1
-	.byte	0x67
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-	.8byte	.LFE274
-	.2byte	0x1
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-	.8byte	.LVL23
-	.8byte	.LVL26-1
-	.2byte	0x1
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-	.2byte	0x1
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-	.8byte	.LFE274
-	.2byte	0x1
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-	.8byte	.LVL28
-	.8byte	.LVL29
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-	.2byte	0x1
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 	.2byte	0x1
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-	.8byte	.LVL26
-	.8byte	.LVL27
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+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL31
+	.8byte	.LVL193
+	.8byte	.LVL196
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL31
-	.8byte	.LVL34
-	.2byte	0x3
-	.byte	0x8c
-	.sleb128 -1
+	.byte	0x6a
+	.8byte	.LVL196
+	.8byte	.LVL204
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL39
+	.8byte	.LVL204
+	.8byte	.LVL210
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL42
-	.8byte	.LVL46
+	.byte	0x6a
+	.8byte	.LVL210
+	.8byte	.LVL226
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL226
+	.8byte	.LVL234
 	.2byte	0x1
-	.byte	0x6c
+	.byte	0x6a
+	.8byte	.LVL234
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0x9e
-	.uleb128 0x4
-	.4byte	0x80808080
-	.8byte	.LVL27
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL42
-	.8byte	.LVL47
+.LLST41:
+	.8byte	.LVL134
+	.8byte	.LVL136
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40404040
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL137
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL39
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL42
-	.8byte	.LVL45
+	.byte	0x63
+	.8byte	.LVL151
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL24
-	.8byte	.LVL27
+	.byte	0x50
+	.8byte	.LVL153
+	.8byte	.LVL154
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST12:
-	.8byte	.LVL26
-	.8byte	.LVL40
+	.8byte	.LVL154
+	.8byte	.LVL155
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL40
-	.8byte	.LVL42
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL156
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
+	.8byte	.LVL161
+	.8byte	.LVL186
 	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL24
-	.8byte	.LVL30
+	.byte	0x63
+	.8byte	.LVL186
+	.8byte	.LVL187
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL36
+	.8byte	.LVL193
+	.8byte	.LVL194
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL36
-	.8byte	.LVL39
+	.8byte	.LVL196
+	.8byte	.LVL204
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL50
-	.8byte	.LVL51
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL51
-	.8byte	.LVL53
+	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL56
-	.8byte	.LVL60
+	.byte	0x6c
+	.8byte	.LVL217
+	.8byte	.LVL221
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL63
-	.8byte	.LFE274
+	.byte	0x6c
+	.8byte	.LVL222
+	.8byte	.LVL226
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x6c
+	.8byte	.LVL228
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST15:
-	.8byte	.LVL47
-	.8byte	.LVL54
+.LLST42:
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL54
-	.8byte	.LVL55
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LFE274
+	.8byte	.LVL140
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL147
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL204
+	.8byte	.LVL234
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST16:
-	.8byte	.LVL47
-	.8byte	.LVL52
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LVL58
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST43:
+	.8byte	.LVL165
+	.8byte	.LVL168
+	.2byte	0x2
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL58
-	.8byte	.LVL63
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL63
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL168
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x33
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL153
-	.8byte	.LVL155
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL155
-	.8byte	.LVL174
-	.2byte	0x1
-	.byte	0x67
+	.8byte	.LVL171
 	.8byte	.LVL174
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.2byte	0x2
+	.byte	0x34
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL153
-	.8byte	.LVL154
+	.8byte	.LVL178
+	.8byte	.LVL181
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL184
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL184
+	.8byte	.LVL186
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL201
+	.8byte	.LVL202
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL202
+	.8byte	.LVL204
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL219
+	.8byte	.LVL222
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL154
-	.8byte	.LVL162
+	.byte	0x63
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL162
-	.8byte	.LVL163
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 32
-	.byte	0x9f
-	.8byte	.LVL163
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST51:
-	.8byte	.LVL160
-	.8byte	.LVL164
+.LLST44:
+	.8byte	.LVL157
+	.8byte	.LVL159
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL164
-	.8byte	.LVL167
+	.8byte	.LVL159
+	.8byte	.LVL193
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x69
+	.8byte	.LVL196
+	.8byte	.LVL204
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL211
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST52:
-	.8byte	.LVL167
-	.8byte	.LVL173
+.LLST45:
+	.8byte	.LVL131
+	.8byte	.LVL145
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL147
+	.8byte	.LVL190
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL193
+	.8byte	.LVL206
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL206
+	.8byte	.LVL207
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x50
+	.8byte	.LVL207
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL226
+	.8byte	.LVL228
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL228
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST53:
-	.8byte	.LVL160
-	.8byte	.LVL164
+.LLST46:
+	.8byte	.LVL131
+	.8byte	.LVL145
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL164
-	.8byte	.LVL168
+	.8byte	.LVL147
+	.8byte	.LVL152
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL152
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL168
-	.8byte	.LVL169
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -8
+	.byte	0x50
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL169
-	.8byte	.LVL173
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -40
+	.8byte	.LVL204
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST54:
-	.8byte	.LVL169
-	.8byte	.LVL173
+.LLST47:
+	.8byte	.LVL131
+	.8byte	.LVL142
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL142
+	.8byte	.LVL143-1
 	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST55:
-	.8byte	.LVL156
-	.8byte	.LVL166
+	.byte	0x50
+	.8byte	.LVL143-1
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL147
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL159
+	.8byte	.LVL165
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL165
 	.8byte	.LVL166
-	.8byte	.LVL170
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL172
-	.8byte	.LFE271
+	.8byte	.LVL166
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL168
+	.8byte	.LVL169
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST56:
-	.8byte	.LVL159
-	.8byte	.LVL161
+	.8byte	.LVL169
+	.8byte	.LVL171
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST57:
-	.8byte	.LVL158
-	.8byte	.LVL159
+	.byte	0x68
+	.8byte	.LVL171
+	.8byte	.LVL172
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST58:
+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL174
 	.8byte	.LVL175
-	.8byte	.LVL176
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL176
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST59:
 	.8byte	.LVL175
 	.8byte	.LVL178
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x68
 	.8byte	.LVL178
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST60:
-	.8byte	.LVL175
-	.8byte	.LVL177
+	.8byte	.LVL179
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL177
-	.8byte	.LVL196
+	.byte	0x50
+	.8byte	.LVL179
+	.8byte	.LVL180-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL196
-	.8byte	.LVL296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL296
-	.8byte	.LVL297
+	.8byte	.LVL180-1
+	.8byte	.LVL181
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 196
+	.8byte	.LVL181
+	.8byte	.LVL182
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL182
+	.8byte	.LVL184
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL297
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.8byte	.LVL184
+	.8byte	.LVL185-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL185-1
+	.8byte	.LVL186
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL186
+	.8byte	.LVL188
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST61:
-	.8byte	.LVL175
-	.8byte	.LVL178
+	.8byte	.LVL188
+	.8byte	.LVL191
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL178
+	.byte	0x68
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL196
+	.8byte	.LVL199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL199
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL200
 	.8byte	.LVL203
 	.2byte	0x1
-	.byte	0x69
+	.byte	0x50
 	.8byte	.LVL203
-	.8byte	.LVL205
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL217
+	.8byte	.LVL204
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL217
-	.8byte	.LVL218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL218
-	.8byte	.LVL223
+	.byte	0x68
+	.8byte	.LVL204
+	.8byte	.LVL211
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL223
-	.8byte	.LVL256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x67
+	.8byte	.LVL211
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL256
-	.8byte	.LVL260
+	.8byte	.LVL214
+	.8byte	.LVL216
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL260
-	.8byte	.LVL268
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x68
+	.8byte	.LVL216
+	.8byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL268
-	.8byte	.LVL279
+	.8byte	.LVL219
+	.8byte	.LVL220-1
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL279
-	.8byte	.LVL296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL296
-	.8byte	.LVL303
+	.byte	0x50
+	.8byte	.LVL220-1
+	.8byte	.LVL222
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL303
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x68
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL186
-	.8byte	.LVL188
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
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-	.8byte	.LVL189
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 1
-	.byte	0x9f
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 	.2byte	0x1
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+	.8byte	.LVL232
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 	.2byte	0x1
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-	.8byte	.LVL251
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
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-	.8byte	.LVL258
+	.byte	0x50
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+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL131
+	.8byte	.LVL145
 	.2byte	0x2
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 	.2byte	0x2
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-	.2byte	0x1
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-	.8byte	.LVL285
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-	.2byte	0x1
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+	.8byte	.LVL189
 	.2byte	0x1
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+	.2byte	0x2
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+	.8byte	.LVL215
 	.2byte	0x1
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+	.2byte	0x2
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-	.8byte	.LVL195
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+	.8byte	.LVL157
+	.8byte	.LVL190
+	.2byte	0x1
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 	.2byte	0x1
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+	.8byte	.LVL103
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 	.2byte	0x1
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 	.2byte	0x1
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+	.byte	0x63
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+	.8byte	.LVL108
 	.2byte	0x1
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+	.byte	0x50
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+	.8byte	.LVL121
 	.2byte	0x1
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-	.8byte	.LVL291
+	.byte	0x63
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+	.8byte	.LFE255
 	.2byte	0x1
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL103
+	.8byte	.LVL106
 	.2byte	0x1
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+	.2byte	0x1
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-	.8byte	.LVL229
-	.8byte	.LVL232
-	.2byte	0x2
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-	.8byte	.LVL232
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-	.2byte	0x2
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-	.2byte	0x2
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-	.2byte	0x2
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-	.2byte	0x2
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-	.2byte	0x2
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-	.8byte	.LVL261
-	.2byte	0x2
-	.byte	0x32
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-	.8byte	.LVL261
-	.8byte	.LVL262
-	.2byte	0x2
-	.byte	0x33
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-	.8byte	.LVL262
-	.8byte	.LVL263
-	.2byte	0x2
-	.byte	0x34
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-	.8byte	.LVL264
-	.8byte	.LVL265
-	.2byte	0x2
-	.byte	0x32
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-	.8byte	.LVL265
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-	.2byte	0x2
-	.byte	0x33
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-	.8byte	.LVL266
-	.8byte	.LVL268
-	.2byte	0x2
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-	.8byte	.LVL287
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+	.8byte	.LVL103
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 	.2byte	0x1
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 	.2byte	0x1
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+	.byte	0x66
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+	.2byte	0x4
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+	.uleb128 0x1
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+	.8byte	.LFE255
 	.2byte	0x1
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-	.8byte	.LVL222
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+	.8byte	.LVL109
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-	.2byte	0x1
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 	.2byte	0x1
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-	.8byte	.LVL178
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+	.8byte	.LVL109
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-	.8byte	.LVL178
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-	.2byte	0x2
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+	.8byte	.LVL111
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+	.8byte	.LVL115
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+	.8byte	.LVL103
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+	.8byte	.LVL33
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+	.8byte	.LVL31
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+	.8byte	.LFE253
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+	.8byte	.LVL0
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 	.2byte	0x1
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+	.2byte	0x4
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 	.2byte	0x1
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+	.8byte	.LVL0
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 	.2byte	0x1
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+	.8byte	.LVL2
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 	.2byte	0x1
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-	.8byte	.LVL178
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+	.8byte	.LVL24
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-	.8byte	.LVL222
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+	.8byte	.LVL4
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 	.2byte	0x1
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-	.8byte	.LVL178
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-	.8byte	.LVL178
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-	.8byte	.LVL178
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+	.8byte	.LVL3
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 	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL181
-	.8byte	.LVL182
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL189
-	.8byte	.LVL190
+	.8byte	.LVL4
+	.8byte	.LVL5
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL190
-	.8byte	.LVL191
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
+	.byte	0x6c
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LVL193
+	.8byte	.LVL6
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL193
-	.8byte	.LVL194
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 1
-	.byte	0x9f
+	.byte	0x6c
+	.8byte	.LVL13
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST73:
-	.8byte	.LVL178
-	.8byte	.LVL185
+.LLST6:
+	.8byte	.LVL18
+	.8byte	.LVL19
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL189
-	.8byte	.LVL195
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST74:
-	.8byte	.LVL210
-	.8byte	.LVL212
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL212
-	.8byte	.LVL213
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL213
-	.8byte	.LVL214
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL268
-	.8byte	.LVL269
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL269
-	.8byte	.LVL270
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL270
-	.8byte	.LVL271
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL275
-	.8byte	.LVL276
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL276
-	.8byte	.LVL277
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL277
-	.8byte	.LVL278
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL278
-	.8byte	.LVL279
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x8c
 	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.8byte	0
 	.8byte	0
-.LLST75:
-	.8byte	.LVL269
-	.8byte	.LVL272
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL274
-	.8byte	.LVL279
-	.2byte	0x1
-	.byte	0x68
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB6
+	.8byte	.LBE6
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB13
+	.8byte	.LBE13
+	.8byte	.LBB14
+	.8byte	.LBE14
+	.8byte	.LBB18
+	.8byte	.LBE18
 	.8byte	0
 	.8byte	0
-.LLST1:
-	.8byte	.LVL9
-	.8byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL10
-	.8byte	.LVL15
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL15
-	.8byte	.LVL16
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LBB15
+	.8byte	.LBE15
+	.8byte	.LBB19
+	.8byte	.LBE19
 	.8byte	0
 	.8byte	0
-.LLST2:
-	.8byte	.LVL11
-	.8byte	.LVL12
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL16
-	.8byte	.LVL17
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL19
-	.8byte	.LVL20
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL20
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1
-	.8byte	.LVL2-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2
-	.8byte	.LVL3-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL5
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL6
-	.8byte	.LVL7-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL7-1
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST17:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL66
-	.8byte	.LVL69
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL69
-	.8byte	.LVL70
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL70
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST18:
-	.8byte	.LVL65
-	.8byte	.LVL68
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL68
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST19:
-	.8byte	.LVL65
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL72
-	.8byte	.LVL90
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL90
-	.8byte	.LVL91
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL71
-	.8byte	.LVL72
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL89
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST21:
-	.8byte	.LVL71
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST22:
-	.8byte	.LVL73
-	.8byte	.LVL74
-	.2byte	0x9
-	.byte	0x70
-	.sleb128 0
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST23:
-	.8byte	.LVL76
-	.8byte	.LVL77
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL77
-	.8byte	.LVL78-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LVL83-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST24:
-	.8byte	.LVL65
-	.8byte	.LVL85
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL85
-	.8byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL86
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL91
-	.8byte	.LVL92-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL92-1
-	.8byte	.LVL93
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL94
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST42:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL122
-	.8byte	.LVL133
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL133
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL121
-	.8byte	.LVL123-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL123-1
-	.8byte	.LVL134
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL134
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST44:
-	.8byte	.LVL123
-	.8byte	.LVL124
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL124
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL136
-	.8byte	.LVL145
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL146
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL147
-	.8byte	.LVL148
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL125
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL136
-	.8byte	.LVL144
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL145
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL124
-	.8byte	.LVL125
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL125
-	.8byte	.LVL126
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL126
-	.8byte	.LVL127
-	.2byte	0x4
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x20
-	.byte	0x9f
-	.8byte	.LVL127
-	.8byte	.LVL135
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST48:
-	.8byte	.LVL141
-	.8byte	.LVL142
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL142
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-	.section	.debug_aranges,"",@progbits
-	.4byte	0xcc
-	.2byte	0x2
-	.4byte	.Ldebug_info0
-	.byte	0x8
-	.byte	0
-	.2byte	0
-	.2byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.8byte	0
-	.8byte	0
-	.section	.debug_ranges,"",@progbits
-.Ldebug_ranges0:
-	.8byte	.LBB12
-	.8byte	.LBE12
-	.8byte	.LBB18
-	.8byte	.LBE18
-	.8byte	.LBB19
-	.8byte	.LBE19
-	.8byte	.LBB20
-	.8byte	.LBE20
-	.8byte	.LBB24
-	.8byte	.LBE24
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB21
-	.8byte	.LBE21
-	.8byte	.LBB25
-	.8byte	.LBE25
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB29
-	.8byte	.LBE29
-	.8byte	.LBB34
-	.8byte	.LBE34
-	.8byte	.LBB35
-	.8byte	.LBE35
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB40
-	.8byte	.LBE40
-	.8byte	.LBB48
-	.8byte	.LBE48
-	.8byte	.LBB49
-	.8byte	.LBE49
-	.8byte	.LBB50
-	.8byte	.LBE50
-	.8byte	.LBB51
-	.8byte	.LBE51
-	.8byte	.LBB52
-	.8byte	.LBE52
-	.8byte	.LBB53
-	.8byte	.LBE53
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB54
-	.8byte	.LBE54
-	.8byte	.LBB58
-	.8byte	.LBE58
-	.8byte	.LBB59
-	.8byte	.LBE59
-	.8byte	0
-	.8byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256
-	.8byte	.LFB257
-	.8byte	.LFE257
-	.8byte	.LFB274
-	.8byte	.LFE274
-	.8byte	.LFB255
-	.8byte	.LFE255
-	.8byte	.LFB275
-	.8byte	.LFE275
-	.8byte	.LFB276
-	.8byte	.LFE276
-	.8byte	.LFB277
-	.8byte	.LFE277
-	.8byte	.LFB200
-	.8byte	.LFE200
-	.8byte	.LFB271
-	.8byte	.LFE271
-	.8byte	.LFB258
-	.8byte	.LFE258
-	.8byte	.LFB278
-	.8byte	.LFE278
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB253
+	.8byte	.LFE253
+	.8byte	.LFB254
+	.8byte	.LFE254
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB256
+	.8byte	.LFE256
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF416:
-	.string	"test_pattern"
-.LASF399:
-	.string	"puts"
-.LASF64:
-	.string	"reserved"
-.LASF470:
+.LASF30:
+	.string	"parent_platdata"
+.LASF109:
+	.string	"off_mem_rsvmap"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF481:
+	.string	"jt_funcs"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF159:
+	.string	"initrd_start"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF335:
+	.string	"net_hostname"
+.LASF330:
+	.string	"push_packet"
+.LASF54:
+	.string	"start"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF309:
+	.string	"child"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF356:
+	.string	"NETLOOP_RESTART"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF253:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF266:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF379:
+	.string	"g_isi_pattern"
+.LASF117:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF425:
+	.string	"err_addr"
+.LASF370:
+	.string	"child_pre_probe"
+.LASF302:
+	.string	"pm_ctx_phys"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF307:
+	.string	"full_name"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF460:
 	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF301:
+	.string	"video_bottom"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF5:
+	.string	"__u8"
+.LASF355:
+	.string	"NETLOOP_CONTINUE"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF296:
+	.string	"malloc_base"
 .LASF464:
-	.string	"target_freq"
-.LASF138:
-	.string	"bootm_headers"
-.LASF227:
-	.string	"UCLASS_RAMDISK"
-.LASF156:
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-	.string	"eth_device"
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-	.string	"test_banks"
-.LASF127:
-	.string	"ih_comp"
-.LASF23:
-	.string	"_Bool"
-.LASF334:
-	.string	"net_root_path"
+	.string	"get_page_size"
+.LASF56:
+	.string	"flash_info_t"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF134:
+	.string	"comp"
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+	.string	"image_header_t"
+.LASF164:
+	.string	"state"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
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+	.string	"bi_dsp_freq"
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+	.string	"image_start"
 .LASF445:
-	.string	"cmdtp"
-.LASF365:
-	.string	"unbind"
-.LASF145:
-	.string	"fit_noffset_os"
+	.string	"fast_test_bank"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF430:
+	.string	"diagonalscan"
+.LASF65:
+	.string	"bd_info"
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+	.string	"uclass_id"
+.LASF121:
+	.string	"ih_load"
+.LASF314:
+	.string	"__dtb_dt_spl_begin"
+.LASF394:
+	.string	"pre_remove"
+.LASF427:
+	.string	"random_test1"
+.LASF426:
+	.string	"random_test2"
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+	.string	"__u32"
 .LASF35:
 	.string	"priv"
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-	.ascii	"GNU C11 6.3.1 20170404 -ms"
-	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
-.LASF22:
-	.string	"___strtok"
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-	.string	"UCLASS_SPI_GENERIC"
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-	.string	"capacity"
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-	.string	"ram_size"
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-	.string	"net_nis_domain"
-.LASF438:
-	.string	"diagonalscan"
-.LASF36:
-	.string	"uclass"
+.LASF299:
+	.string	"cur_serial_dev"
+.LASF469:
+	.string	"strcasecmp"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF341:
+	.string	"net_tx_packet"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF340:
+	.string	"net_server_ip"
+.LASF482:
+	.string	"ofnode_union"
+.LASF348:
+	.string	"net_native_vlan"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
 .LASF185:
 	.string	"UCLASS_CODEC"
-.LASF47:
-	.string	"next"
-.LASF375:
-	.string	"length"
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-	.string	"uc_drv"
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-	.string	"UCLASS_AHCI"
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-	.string	"UCLASS_I2C_MUX"
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-	.string	"uclass_id"
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-	.string	"cpu_2_io"
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-	.string	"net_netmask"
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-	.string	"CMD_RET_FAILURE"
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-	.string	"UCLASS_RTC"
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-	.string	"bi_memsize"
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-	.string	"bi_flashstart"
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-	.string	"child_post_remove"
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-	.string	"recv"
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-	.string	"fit_uname_setup"
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-	.string	"rockchip_ddrclk_sip_round_rate_v2"
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-	.string	"UCLASS_SYSCON"
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-	.string	"UCLASS_DISPLAY"
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-	.string	"malloc_ptr"
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-	.string	"UCLASS_I2C_EEPROM"
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-	.string	"_u_boot_list_2_cmd_2_ddr_test"
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-	.string	"NETLOOP_CONTINUE"
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-	.string	"UCLASS_SPI"
-.LASF473:
-	.string	"memcpy"
-.LASF245:
-	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF478:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF293:
+	.string	"env_buf"
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+	.string	"errno"
+.LASF15:
+	.string	"long int"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF401:
+	.string	"putc"
+.LASF29:
+	.string	"platdata"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF113:
+	.string	"size_dt_strings"
 .LASF243:
 	.string	"UCLASS_VIDEO"
-.LASF357:
-	.string	"net_state"
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-	.string	"cmd/ddr_tool/ddr_test_code.c"
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-	.string	"verify"
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-	.string	"err_case"
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-	.string	"command_ret_t"
-.LASF236:
-	.string	"UCLASS_SYSRESET"
+.LASF402:
+	.string	"puts"
+.LASF475:
+	.string	"rand"
+.LASF279:
+	.string	"relocaddr"
+.LASF385:
+	.string	"dev_head"
+.LASF351:
+	.string	"net_boot_file_size"
+.LASF407:
+	.string	"stdio_names"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
 .LASF169:
 	.string	"UCLASS_ROOT"
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-	.string	"pm_ctx_phys"
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-	.string	"UCLASS_CROS_EC"
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-	.string	"freq"
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-	.string	"UCLASS_KEY"
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-	.string	"SCANFREQ"
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-	.string	"_datarel_start_ofs"
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-	.string	"pci_clk"
-.LASF180:
-	.string	"UCLASS_ADC"
-.LASF366:
-	.string	"ofdata_to_platdata"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF419:
+	.string	"test_pat_param"
+.LASF338:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF18:
+	.string	"uint8_t"
+.LASF375:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
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+	.string	"cmp_buf_data"
 .LASF125:
 	.string	"ih_arch"
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-	.string	"gd_t"
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-	.string	"UCLASS_IRQ"
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-	.string	"__u8"
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-	.string	"net_gateway"
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-	.string	"net_ping_ip"
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-	.string	"type"
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-	.string	"print_memory"
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-	.string	"UCLASS_TEST"
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-	.string	"net_boot_file_expected_size_in_blocks"
-.LASF24:
-	.string	"image_base"
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-	.string	"legacy_hdr_valid"
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+	.string	"totalsize"
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+	.string	"abort"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF281:
+	.string	"mon_len"
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+	.string	"load"
 .LASF239:
 	.string	"UCLASS_TPM"
-.LASF100:
-	.string	"CMD_RET_SUCCESS"
-.LASF397:
-	.string	"stop"
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-	.string	"err_addr"
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-	.string	"baudrate"
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-	.string	"UCLASS_VIDEO_CRTC"
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-	.string	"bi_ethspeed"
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-	.string	"dev_head"
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-	.string	"phys_addr_t"
-.LASF126:
-	.string	"ih_type"
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+	.string	"cmp_value"
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+	.string	"lmb_property"
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+	.string	"last_comp_version"
 .LASF0:
 	.string	"unsigned char"
-.LASF409:
+.LASF392:
+	.string	"pre_probe"
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+	.string	"delta_freq"
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 	.string	"RANDOM"
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-	.string	"legacy_hdr_os_copy"
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-	.string	"bus_clk"
-.LASF173:
-	.string	"UCLASS_TEST_BUS"
-.LASF73:
-	.string	"bi_arm_freq"
+.LASF166:
+	.string	"images"
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+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
 .LASF200:
 	.string	"UCLASS_LED"
-.LASF379:
+.LASF120:
+	.string	"ih_size"
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+	.string	"uclass_node"
+.LASF23:
+	.string	"_Bool"
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+	.string	"property"
+.LASF359:
+	.string	"net_state"
+.LASF378:
+	.string	"value"
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+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF418:
+	.string	"test_pattern"
+.LASF357:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
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 	.string	"p_current"
-.LASF342:
-	.string	"net_rx_packet_len"
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-.LASF53:
-	.string	"flash_id"
-.LASF313:
-	.string	"load_addr"
-.LASF424:
-	.string	"reread"
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+	.string	"uc_drv"
+.LASF354:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
+.LASF310:
+	.string	"sibling"
+.LASF287:
+	.string	"dm_root_f"
 .LASF321:
-	.string	"init"
-.LASF251:
-	.string	"UCLASS_CHARGE_DISPLAY"
+	.string	"enetaddr"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF452:
+	.string	"times"
+.LASF454:
+	.string	"target_freq"
+.LASF380:
+	.string	"of_offset"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF349:
+	.string	"net_restart_wrap"
+.LASF404:
+	.string	"getc"
+.LASF337:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
 .LASF437:
-	.string	"cmp_value"
-.LASF178:
-	.string	"UCLASS_USB_EMUL"
-.LASF363:
-	.string	"probe"
-.LASF378:
-	.string	"ofnode"
-.LASF269:
+	.string	"cmdtp"
+.LASF126:
+	.string	"ih_type"
+.LASF107:
+	.string	"off_dt_struct"
+.LASF458:
+	.string	"crosstalk"
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+	.string	"bi_flashoffset"
+.LASF350:
+	.string	"net_boot_file_name"
+.LASF387:
+	.string	"compatible"
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+	.string	"UCLASS_TEST"
+.LASF119:
+	.string	"ih_time"
+.LASF274:
+	.string	"fb_base"
+.LASF271:
+	.string	"bus_clk"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
+.LASF130:
+	.string	"image_info"
+.LASF408:
+	.string	"console_devices"
+.LASF136:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF476:
+	.string	"write_buf_to_ddr"
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 	.string	"cpu_clk"
-.LASF308:
-	.string	"sibling"
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-	.string	"using_pre_serial"
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-	.string	"UCLASS_PINCTRL"
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-	.string	"value"
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-	.string	"UCLASS_WDT"
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-	.string	"page_size"
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-	.string	"image_len"
-.LASF280:
-	.string	"mon_len"
+.LASF50:
+	.string	"select_hwpart"
+.LASF342:
+	.string	"net_rx_packets"
+.LASF360:
+	.string	"mem_malloc_start"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF17:
+	.string	"ulong"
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+	.string	"ih_ep"
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+	.string	"lmb_region"
+.LASF448:
+	.string	"do_ddr_test"
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+	.string	"printf"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF339:
+	.string	"net_ip"
+.LASF291:
+	.string	"fdt_size"
+.LASF333:
+	.string	"net_dns_server"
+.LASF353:
+	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
-.LASF492:
-	.string	"exit"
+.LASF104:
+	.string	"fdt_header"
+.LASF361:
+	.string	"mem_malloc_end"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF156:
+	.string	"rd_end"
+.LASF364:
+	.string	"bind"
+.LASF282:
+	.string	"irq_sp"
+.LASF161:
+	.string	"cmdline_start"
+.LASF328:
+	.string	"index"
+.LASF269:
+	.string	"global_data"
+.LASF400:
+	.string	"stop"
+.LASF396:
+	.string	"per_device_auto_alloc_size"
+.LASF472:
+	.string	"ctrlc"
+.LASF95:
+	.string	"repeatable"
+.LASF229:
+	.string	"UCLASS_SCSI"
 .LASF241:
 	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF248:
-	.string	"UCLASS_FG"
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-	.string	"test_times"
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-	.string	"per_child_platdata_auto_alloc_size"
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-	.string	"shift"
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-	.string	"errno"
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-	.string	"size"
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-	.string	"net_hostname"
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-	.string	"uclass_platdata"
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-	.string	"stdio_dev"
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-	.string	"legacy_hdr_os"
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-	.string	"bi_bootflags"
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-	.string	"ih_hcrc"
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-	.string	"destroy"
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-	.string	"max_freq"
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-	.string	"UCLASS_PANEL"
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-	.string	"priv_auto_alloc_size"
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-	.string	"UCLASS_USB"
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-	.string	"UCLASS_TEST_FDT"
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-	.string	"bi_dsp_freq"
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-	.string	"uchar"
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-	.string	"ih_size"
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-	.string	"addr"
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-	.string	"UCLASS_PCI_GENERIC"
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-	.string	"FIQ_STACK_START"
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-	.string	"pre_probe"
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-	.string	"enetaddr"
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-	.string	"UCLASS_PINCONFIG"
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-	.string	"prt_en"
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-	.string	"UCLASS_RESET"
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-	.string	"UCLASS_DEMO"
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-	.string	"irq_sp"
-.LASF402:
-	.string	"list"
-.LASF182:
-	.string	"UCLASS_BLK"
-.LASF282:
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF1:
+	.string	"long unsigned int"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF455:
+	.string	"freq"
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+	.string	"gd_t"
+.LASF334:
+	.string	"net_nis_domain"
+.LASF398:
+	.string	"console_buffer"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF432:
+	.string	"next_adr"
+.LASF423:
+	.string	"wr_value"
+.LASF459:
+	.string	"shift"
+.LASF358:
+	.string	"NETLOOP_FAIL"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF260:
+	.string	"timer_reset_value"
+.LASF283:
 	.string	"start_addr_sp"
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-	.string	"net_ip"
-.LASF475:
-	.string	"strict_strtoul"
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-	.string	"iobase"
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-	.string	"ih_dcrc"
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-	.string	"flash_info_t"
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-	.string	"os_reg"
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-	.string	"bi_intfreq"
-.LASF314:
-	.string	"save_addr"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF284:
+	.string	"reloc_off"
+.LASF473:
+	.string	"judge_test_addr"
+.LASF112:
+	.string	"boot_cpuid_phys"
 .LASF259:
-	.string	"timer_reset_value"
-.LASF377:
-	.string	"of_offset"
-.LASF201:
-	.string	"UCLASS_LPC"
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-	.string	"bi_flashoffset"
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-	.string	"video_bottom"
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-	.string	"scan_freq_loop"
-.LASF202:
-	.string	"UCLASS_MAILBOX"
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-	.string	"g_isi_pattern"
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-	.string	"off_mem_rsvmap"
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-	.string	"bind"
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-	.string	"UCLASS_KEYBOARD"
-.LASF206:
-	.string	"UCLASS_MOD_EXP"
-.LASF116:
-	.string	"image_header"
-.LASF110:
-	.string	"last_comp_version"
+	.string	"lastinc"
+.LASF263:
+	.string	"tlb_fillptr"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF347:
+	.string	"net_our_vlan"
+.LASF303:
+	.string	"serial"
+.LASF365:
+	.string	"probe"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF137:
+	.string	"image_info_t"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF439:
+	.string	"argc"
+.LASF261:
+	.string	"tlb_addr"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF440:
+	.string	"argv"
+.LASF132:
+	.string	"image_len"
 .LASF77:
 	.string	"bi_ip_addr"
-.LASF414:
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF324:
+	.string	"send"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF417:
 	.string	"TESTCASSMAX"
-.LASF298:
-	.string	"cur_serial_dev"
-.LASF57:
-	.string	"flash_info"
-.LASF16:
-	.string	"ushort"
-.LASF395:
-	.string	"console_buffer"
-.LASF104:
-	.string	"magic"
-.LASF305:
-	.string	"full_name"
-.LASF472:
-	.string	"memset"
-.LASF331:
-	.string	"net_dns_server"
-.LASF482:
-	.string	"rockchip_ddrclk_sip_set_rate_v2"
-.LASF403:
-	.string	"stdio_devices"
-.LASF462:
-	.string	"times"
-.LASF355:
-	.string	"NETLOOP_SUCCESS"
-.LASF28:
-	.string	"name"
+.LASF443:
+	.string	"test_times"
+.LASF167:
+	.string	"command_ret_t"
+.LASF290:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF352:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF451:
+	.string	"max_freq"
+.LASF363:
+	.string	"of_match"
+.LASF209:
+	.string	"UCLASS_NVME"
 .LASF264:
-	.string	"pre_serial"
-.LASF90:
-	.string	"_datarellocal_start_ofs"
-.LASF96:
-	.string	"usage"
-.LASF152:
-	.string	"fit_hdr_setup"
-.LASF183:
-	.string	"UCLASS_CLK"
-.LASF41:
-	.string	"sibling_node"
-.LASF160:
-	.string	"initrd_end"
-.LASF310:
-	.string	"monitor_flash_len"
-.LASF398:
-	.string	"putc"
-.LASF360:
-	.string	"mem_malloc_brk"
-.LASF12:
-	.string	"phys_size_t"
-.LASF83:
-	.string	"bi_boot_params"
+	.string	"tlb_emerg"
+.LASF138:
+	.string	"bootm_headers"
+.LASF470:
+	.string	"strict_strtoul"
+.LASF55:
+	.string	"protect"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF447:
+	.string	"scan_freq_loop"
+.LASF389:
+	.string	"uclass_driver"
 .LASF250:
 	.string	"UCLASS_RC"
-.LASF72:
-	.string	"bi_sramsize"
-.LASF293:
-	.string	"timebase_h"
 .LASF294:
+	.string	"timebase_h"
+.LASF295:
 	.string	"timebase_l"
-.LASF13:
-	.string	"sizetype"
-.LASF78:
-	.string	"bi_enetaddr"
-.LASF341:
-	.string	"net_rx_packet"
-.LASF459:
-	.string	"scan_freq"
-.LASF393:
-	.string	"per_device_auto_alloc_size"
-.LASF229:
-	.string	"UCLASS_SCSI"
-.LASF2:
-	.string	"short unsigned int"
-.LASF3:
-	.string	"signed char"
-.LASF339:
-	.string	"net_tx_packet"
-.LASF54:
-	.string	"start"
-.LASF380:
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF346:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
+.LASF416:
+	.string	"FULLTEST"
+.LASF34:
+	.string	"parent"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF38:
+	.string	"parent_priv"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF315:
+	.string	"load_addr"
+.LASF98:
+	.string	"complete"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF97:
+	.string	"help"
+.LASF268:
+	.string	"addr"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF320:
+	.string	"eth_device"
+.LASF372:
+	.string	"priv_auto_alloc_size"
+.LASF297:
+	.string	"malloc_limit"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF422:
+	.string	"capacity"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF108:
+	.string	"off_dt_strings"
+.LASF312:
+	.string	"monitor_flash_len"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF438:
+	.string	"flag"
+.LASF24:
+	.string	"image_base"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF383:
 	.string	"current"
-.LASF412:
-	.string	"FASTTEST"
-.LASF255:
-	.string	"LOGF_MAX_CATEGORIES"
-.LASF134:
-	.string	"comp"
-.LASF179:
-	.string	"UCLASS_SIMPLE_BUS"
-.LASF286:
-	.string	"dm_root_f"
-.LASF37:
-	.string	"uclass_priv"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF450:
+	.string	"min_freq"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF405:
+	.string	"list"
+.LASF306:
+	.string	"phandle"
+.LASF300:
+	.string	"video_top"
+.LASF397:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
 .LASF224:
 	.string	"UCLASS_REMOTEPROC"
-.LASF149:
-	.string	"fit_hdr_fdt"
-.LASF407:
-	.string	"CHANGEFREQ"
-.LASF299:
-	.string	"video_top"
+.LASF465:
+	.string	"data_cpu_2_io"
+.LASF325:
+	.string	"recv"
+.LASF135:
+	.string	"type"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF449:
+	.string	"scan_freq"
+.LASF431:
+	.string	"start_adr"
+.LASF288:
+	.string	"uclass_root"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF444:
+	.string	"test_banks"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF421:
+	.string	"baseaddr"
+.LASF480:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF155:
+	.string	"rd_start"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF317:
+	.string	"save_size"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF322:
+	.string	"iobase"
+.LASF429:
+	.string	"random_test"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF265:
+	.string	"pre_serial"
+.LASF128:
+	.string	"ih_name"
+.LASF435:
+	.string	"next_col"
+.LASF124:
+	.string	"ih_os"
+.LASF162:
+	.string	"cmdline_end"
 .LASF343:
-	.string	"net_bcast_ethaddr"
-.LASF164:
-	.string	"state"
-.LASF69:
-	.string	"bi_flashsize"
+	.string	"net_rx_packet"
+.LASF256:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF289:
+	.string	"fdt_blob"
+.LASF386:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF395:
+	.string	"destroy"
+.LASF116:
+	.string	"image_header"
+.LASF377:
+	.string	"length"
 .LASF20:
 	.string	"__be32"
-.LASF162:
-	.string	"cmdline_end"
-.LASF38:
-	.string	"parent_priv"
-.LASF340:
-	.string	"net_rx_packets"
-.LASF184:
-	.string	"UCLASS_CPU"
-.LASF277:
-	.string	"ram_top"
-.LASF89:
-	.string	"_datarelrolocal_start_ofs"
-.LASF442:
-	.string	"next_col"
-.LASF348:
-	.string	"net_boot_file_name"
-.LASF391:
-	.string	"pre_remove"
-.LASF324:
-	.string	"halt"
-.LASF117:
-	.string	"ih_magic"
-.LASF285:
-	.string	"dm_root"
-.LASF17:
-	.string	"ulong"
-.LASF62:
-	.string	"region"
-.LASF7:
-	.string	"__u32"
-.LASF338:
-	.string	"net_server_ip"
-.LASF364:
-	.string	"remove"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF327:
+	.string	"write_hwaddr"
+.LASF479:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF255:
+	.string	"UCLASS_INVALID"
+.LASF471:
+	.string	"data_cpu_2_io_init"
+.LASF94:
+	.string	"maxargs"
 .LASF242:
 	.string	"UCLASS_USB_HUB"
-.LASF291:
+.LASF414:
+	.string	"DIAGONALSCAN"
+.LASF371:
+	.string	"child_post_remove"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF41:
+	.string	"sibling_node"
+.LASF292:
 	.string	"of_root"
-.LASF91:
-	.string	"_datarelro_start_ofs"
-.LASF367:
-	.string	"child_post_bind"
+.LASF461:
+	.string	"memset"
+.LASF57:
+	.string	"flash_info"
+.LASF110:
+	.string	"version"
+.LASF326:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF114:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF304:
+	.string	"sys_start_tick"
+.LASF308:
+	.string	"properties"
 .LASF207:
 	.string	"UCLASS_MTD"
-.LASF165:
-	.string	"bootm_headers_t"
-.LASF15:
-	.string	"long int"
-.LASF174:
-	.string	"UCLASS_TEST_PROBE"
-.LASF212:
-	.string	"UCLASS_PCH"
-.LASF213:
-	.string	"UCLASS_PCI"
-.LASF188:
-	.string	"UCLASS_DMA"
-.LASF446:
-	.string	"flag"
-.LASF401:
-	.string	"getc"
-.LASF237:
-	.string	"UCLASS_THERMAL"
+.LASF103:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF468:
+	.string	"get_print_available_addr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF477:
+	.string	"malloc"
+.LASF369:
+	.string	"child_post_bind"
+.LASF483:
+	.string	"exit"
+.LASF318:
+	.string	"in_addr"
+.LASF344:
+	.string	"net_rx_packet_len"
+.LASF323:
+	.string	"init"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF313:
+	.string	"__dtb_dt_begin"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF148:
+	.string	"fit_noffset_rd"
 .LASF436:
-	.string	"random_test1"
-.LASF435:
-	.string	"random_test2"
-.LASF456:
-	.string	"set_vdd_logic"
-.LASF449:
-	.string	"test_case"
+	.string	"err_adr"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF381:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
 .LASF441:
+	.string	"test_case"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF424:
+	.string	"reread_val"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF434:
 	.string	"pattern"
-.LASF387:
-	.string	"post_bind"
-.LASF335:
-	.string	"net_ethaddr"
-.LASF316:
-	.string	"in_addr"
-.LASF19:
-	.string	"uint32_t"
-.LASF130:
-	.string	"image_info"
-.LASF119:
-	.string	"ih_time"
-.LASF467:
-	.string	"available"
-.LASF489:
-	.string	"jt_funcs"
-.LASF490:
-	.string	"ofnode_union"
-.LASF474:
-	.string	"strcasecmp"
-.LASF58:
-	.string	"long double"
-.LASF112:
-	.string	"size_dt_strings"
-.LASF137:
-	.string	"image_info_t"
-.LASF302:
-	.string	"serial"
-.LASF443:
-	.string	"get_page_size"
-.LASF1:
-	.string	"long unsigned int"
-.LASF192:
-	.string	"UCLASS_I2C"
 .LASF176:
 	.string	"UCLASS_I2C_EMUL"
-.LASF50:
-	.string	"select_hwpart"
-.LASF346:
-	.string	"net_native_vlan"
-.LASF196:
-	.string	"UCLASS_I2S"
-.LASF336:
-	.string	"net_server_ethaddr"
-.LASF244:
-	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF166:
-	.string	"images"
-.LASF428:
-	.string	"cmp_buf_data"
-.LASF288:
-	.string	"fdt_blob"
-.LASF14:
-	.string	"char"
-.LASF144:
-	.string	"fit_uname_os"
-.LASF143:
-	.string	"fit_hdr_os"
-.LASF476:
-	.string	"ctrlc"
-.LASF400:
-	.string	"tstc"
-.LASF29:
-	.string	"platdata"
-.LASF433:
-	.string	"reread_val"
-.LASF133:
-	.string	"load"
-.LASF352:
-	.string	"net_loop_state"
 .LASF232:
 	.string	"UCLASS_SPMI"
-.LASF230:
-	.string	"UCLASS_SERIAL"
-.LASF429:
-	.string	"random_test"
-.LASF411:
-	.string	"DIAGONALSCAN"
-.LASF215:
-	.string	"UCLASS_PHY"
-.LASF75:
-	.string	"bi_ddr_freq"
-.LASF32:
-	.string	"node"
-.LASF289:
-	.string	"new_fdt"
-.LASF420:
-	.string	"start_adr"
-.LASF136:
-	.string	"arch"
-.LASF274:
-	.string	"have_console"
-.LASF151:
-	.string	"fit_noffset_fdt"
-.LASF147:
-	.string	"fit_uname_rd"
-.LASF98:
-	.string	"complete"
-.LASF261:
-	.string	"tlb_size"
-.LASF146:
-	.string	"fit_hdr_rd"
-.LASF356:
-	.string	"NETLOOP_FAIL"
-.LASF410:
+.LASF96:
+	.string	"usage"
+.LASF366:
+	.string	"remove"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF316:
+	.string	"save_addr"
+.LASF374:
+	.string	"per_child_auto_alloc_size"
+.LASF463:
+	.string	"flush_dcache_range"
+.LASF413:
 	.string	"CROSSTALK"
-.LASF191:
-	.string	"UCLASS_FIRMWARE"
-.LASF283:
-	.string	"reloc_off"
-.LASF154:
-	.string	"fit_noffset_setup"
-.LASF359:
-	.string	"mem_malloc_end"
-.LASF220:
-	.string	"UCLASS_POWER_DOMAIN"
-.LASF203:
-	.string	"UCLASS_MASS_STORAGE"
+.LASF298:
+	.string	"malloc_ptr"
+.LASF160:
+	.string	"initrd_end"
+.LASF391:
+	.string	"pre_unbind"
+.LASF267:
+	.string	"baudrate"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF257:
+	.string	"arch_global_data"
+.LASF254:
+	.string	"UCLASS_COUNT"
+.LASF399:
+	.string	"stdio_dev"
+.LASF272:
+	.string	"pci_clk"
 .LASF49:
 	.string	"block_drvr"
-.LASF208:
-	.string	"UCLASS_NORTHBRIDGE"
-.LASF485:
-	.string	"malloc"
-.LASF404:
-	.string	"stdio_names"
-.LASF27:
-	.string	"driver"
-.LASF457:
-	.string	"set_ddr_freq"
-.LASF194:
-	.string	"UCLASS_I2C_GENERIC"
-.LASF322:
-	.string	"send"
-.LASF325:
-	.string	"write_hwaddr"
-.LASF483:
-	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
-.LASF275:
-	.string	"env_addr"
-.LASF384:
-	.string	"compatible"
-.LASF290:
-	.string	"fdt_size"
-.LASF272:
-	.string	"mem_clk"
-.LASF25:
-	.string	"_binary_u_boot_bin_start"
-.LASF447:
-	.string	"argc"
-.LASF480:
-	.string	"udelay"
+.LASF466:
+	.string	"memcpy"
+.LASF53:
+	.string	"flash_id"
+.LASF305:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF115:
+	.string	"working_fdt"
+.LASF336:
+	.string	"net_root_path"
+.LASF188:
+	.string	"UCLASS_DMA"
 .LASF85:
 	.string	"bd_t"
-.LASF122:
-	.string	"ih_ep"
+.LASF319:
+	.string	"s_addr"
+.LASF393:
+	.string	"post_probe"
+.LASF345:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF19:
+	.string	"uint32_t"
+.LASF362:
+	.string	"mem_malloc_brk"
+.LASF331:
+	.string	"net_gateway"
+.LASF373:
+	.string	"platdata_auto_alloc_size"
+.LASF403:
+	.string	"tstc"
 .LASF66:
 	.string	"bi_memstart"
-.LASF306:
-	.string	"properties"
-.LASF448:
-	.string	"argv"
-.LASF150:
-	.string	"fit_uname_fdt"
-.LASF222:
-	.string	"UCLASS_RAM"
-.LASF46:
-	.string	"list_head"
-.LASF388:
-	.string	"pre_unbind"
-.LASF303:
-	.string	"device_node"
-.LASF157:
-	.string	"ft_addr"
-.LASF258:
-	.string	"lastinc"
-.LASF385:
-	.string	"data"
-.LASF311:
-	.string	"__dtb_dt_begin"
-.LASF254:
-	.string	"UCLASS_INVALID"
-.LASF422:
-	.string	"buful"
-.LASF304:
-	.string	"phandle"
-.LASF40:
-	.string	"child_head"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF406:
+	.string	"stdio_devices"
+.LASF329:
+	.string	"eth_current"
+.LASF420:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF368:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF410:
+	.string	"CHANGEFREQ"
+.LASF433:
+	.string	"page_size"
+.LASF415:
+	.string	"FASTTEST"
+.LASF409:
+	.string	"cd_count"
+.LASF84:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF105:
+	.string	"magic"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF411:
+	.string	"SCANFREQ"
 .LASF60:
 	.string	"base"
-.LASF278:
-	.string	"relocaddr"
-.LASF142:
-	.string	"fit_uname_cfg"
-.LASF161:
-	.string	"cmdline_start"
-.LASF374:
-	.string	"property"
-.LASF455:
-	.string	"do_ddr_test"
-.LASF284:
-	.string	"new_gd"
-.LASF189:
-	.string	"UCLASS_ETH"
-.LASF276:
-	.string	"env_valid"
-.LASF312:
-	.string	"__dtb_dt_spl_begin"
-.LASF10:
-	.string	"long long unsigned int"
-.LASF34:
-	.string	"parent"
-.LASF190:
-	.string	"UCLASS_GPIO"
-.LASF107:
-	.string	"off_dt_strings"
-.LASF432:
-	.string	"wr_value"
-.LASF82:
-	.string	"bi_arch_number"
-.LASF460:
-	.string	"min_freq"
-.LASF44:
-	.string	"ide_bus_offset"
-.LASF273:
-	.string	"fb_base"
+.LASF442:
+	.string	"err_case"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF258:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF127:
+	.string	"ih_comp"
 .LASF390:
-	.string	"post_probe"
-.LASF425:
-	.string	"err_adr"
-.LASF95:
-	.string	"repeatable"
-.LASF102:
-	.string	"CMD_RET_USAGE"
-.LASF253:
-	.string	"UCLASS_COUNT"
-.LASF209:
-	.string	"UCLASS_NVME"
-.LASF347:
-	.string	"net_restart_wrap"
-.LASF111:
-	.string	"boot_cpuid_phys"
-.LASF59:
-	.string	"lmb_property"
-.LASF488:
-	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
-.LASF484:
-	.string	"rand"
-.LASF218:
-	.string	"UCLASS_PMIC"
-.LASF361:
-	.string	"of_match"
-.LASF9:
-	.string	"long long int"
-.LASF478:
-	.string	"regulator_get_by_platname"
-.LASF493:
-	.string	"print_available_addr"
-.LASF159:
-	.string	"initrd_start"
-.LASF233:
-	.string	"UCLASS_SPI_FLASH"
-.LASF238:
-	.string	"UCLASS_TIMER"
-.LASF386:
-	.string	"uclass_driver"
-.LASF479:
-	.string	"regulator_set_value"
-.LASF466:
-	.string	"max_bank"
-.LASF30:
-	.string	"parent_platdata"
-.LASF252:
-	.string	"UCLASS_DVFS"
-.LASF45:
-	.string	"udevice"
-.LASF345:
-	.string	"net_our_vlan"
-.LASF419:
-	.string	"buf_len"
-.LASF124:
-	.string	"ih_os"
-.LASF219:
-	.string	"UCLASS_PWM"
-.LASF43:
-	.string	"req_seq"
-.LASF205:
-	.string	"UCLASS_MMC"
-.LASF197:
-	.string	"UCLASS_IDE"
-.LASF315:
-	.string	"save_size"
-.LASF109:
-	.string	"version"
-.LASF26:
-	.string	"_binary_u_boot_bin_end"
-.LASF394:
-	.string	"per_device_platdata_auto_alloc_size"
-.LASF8:
-	.string	"unsigned int"
-.LASF413:
-	.string	"FULLTEST"
-.LASF430:
-	.string	"baseaddr"
-.LASF114:
-	.string	"working_fdt"
-.LASF468:
-	.string	"crosstalk"
-.LASF328:
-	.string	"push_packet"
-.LASF113:
-	.string	"size_dt_struct"
-.LASF128:
-	.string	"ih_name"
-.LASF221:
-	.string	"UCLASS_PWRSEQ"
-.LASF6:
-	.string	"short int"
-.LASF307:
-	.string	"child"
-.LASF262:
-	.string	"tlb_fillptr"
-.LASF97:
-	.string	"help"
-.LASF48:
-	.string	"prev"
-.LASF349:
-	.string	"net_boot_file_size"
+	.string	"post_bind"
+.LASF367:
+	.string	"unbind"
+.LASF157:
+	.string	"ft_addr"
+.LASF474:
+	.string	"uclass_get_device"
+.LASF4:
+	.string	"uchar"
 .LASF158:
 	.string	"ft_len"
-.LASF105:
-	.string	"totalsize"
-.LASF295:
-	.string	"malloc_base"
-.LASF223:
-	.string	"UCLASS_REGULATOR"
-.LASF42:
-	.string	"flags"
-.LASF155:
-	.string	"rd_start"
+.LASF47:
+	.string	"next"
+.LASF388:
+	.string	"data"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF332:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF262:
+	.string	"tlb_size"
+.LASF150:
+	.string	"fit_uname_fdt"
 	.hidden	malloc
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk1808.S b/cmd/ddr_tool/ddr_test_rk1808.S
index a898fe976b..6e8e95f038 100644
--- a/cmd/ddr_tool/ddr_test_rk1808.S
+++ b/cmd/ddr_tool/ddr_test_rk1808.S
@@ -1,262 +1,388 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
 	.arch armv8-a+nosimd
 	.file	"ddr_test_code.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.set_vdd_logic,"ax",@progbits
+	.section	.text.crosstalk,"ax",@progbits
 	.align	2
-	.type	set_vdd_logic, %function
-set_vdd_logic:
-.LFB258:
-	.file 1 "cmd/ddr_tool/ddr_tool.c"
-	.loc 1 165 0
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB201:
+	.file 1 "cmd/ddr_tool/crosstalk.c"
+	.loc 1 46 0
 	.cfi_startproc
 .LVL0:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 66 0
+	adrp	x22, .LC2
+	.loc 1 46 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	mov	x23, x0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 1 169 0
-	add	x1, x29, 40
-	.loc 1 165 0
-	mov	w20, w0
-	.loc 1 169 0
+	mov	x24, x1
+	stp	x25, x26, [sp, 64]
+	.loc 1 63 0
 	adrp	x0, .LC1
 .LVL1:
+	.loc 1 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 1 63 0
 	add	x0, x0, :lo12:.LC1
-	bl	regulator_get_by_platname
+	bl	printf
 .LVL2:
-	.loc 1 170 0
-	cbz	w0, .L2
-	mov	w19, w0
-	.loc 1 171 0
-	adrp	x0, .LC2
+	.loc 1 71 0
+	add	x21, x29, 112
+	.loc 1 66 0
+	add	x0, x22, :lo12:.LC2
+	.loc 1 68 0
+	adrp	x25, .LC3
+	.loc 1 66 0
+	str	x0, [x29, 104]
+	.loc 1 64 0
+	mov	w20, 0
+	.loc 1 68 0
+	add	x0, x25, :lo12:.LC3
+	str	x0, [x29, 96]
 .LVL3:
-	add	x0, x0, :lo12:.LC2
-.LVL4:
-.L8:
-	.loc 1 179 0
+.L6:
+	.loc 1 66 0
+	ldr	x0, [x29, 104]
+	.loc 1 71 0
+	mov	w26, 1
+	.loc 1 66 0
+	mov	w1, w20
+	.loc 1 71 0
+	lsl	w26, w26, w20
+	.loc 1 65 0
+	mov	w28, -1
+	.loc 1 67 0
+	mov	w27, 0
+	.loc 1 66 0
 	bl	printf
+.LVL4:
+.L5:
+	.loc 1 68 0
+	ldr	x0, [x29, 96]
+	mov	w1, w27
+	.loc 1 69 0
+	mvn	w28, w28
 .LVL5:
+	mov	x19, 0
+	.loc 1 68 0
+	bl	printf
+.LVL6:
+.L2:
+	.loc 1 71 0 discriminator 3
+	eor	w0, w26, w28
+	str	w0, [x19, x21]
+	add	x19, x19, 4
+	.loc 1 72 0 discriminator 3
+	mvn	w28, w28
+.LVL7:
+	.loc 1 70 0 discriminator 3
+	cmp	x19, 32
+	bne	.L2
+	.loc 1 74 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL8:
+	.loc 1 75 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL9:
+	.loc 1 76 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL10:
+	cbz	x0, .L3
+.LVL11:
+.L11:
+	.loc 1 78 0
+	mov	w0, -1
 .L1:
-	.loc 1 181 0
-	mov	w0, w19
+	.loc 1 111 0
 	ldp	x19, x20, [sp, 16]
-.LVL6:
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL12:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL7:
-.L2:
+.LVL13:
+.L3:
 	.cfi_restore_state
-	.loc 1 176 0
-	ldr	x0, [x29, 40]
-.LVL8:
+	.loc 1 67 0 discriminator 2
+	add	w27, w27, 1
+.LVL14:
+	cmp	w27, 2
+	bne	.L5
+	.loc 1 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL15:
+	cmp	w20, 32
+	bne	.L6
+	.loc 1 85 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL16:
+	.loc 1 86 0
+	mov	x0, 128
+	bl	malloc
+.LVL17:
+	mov	x21, x0
+.LVL18:
+	.loc 1 87 0
+	cbnz	x0, .L7
+	.loc 1 88 0
+	adrp	x0, .LC5
+.LVL19:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.LVL20:
+.L7:
+	adrp	x26, .LANCHOR0
+	.loc 1 91 0
+	add	x27, x22, :lo12:.LC2
+.LVL21:
+	.loc 1 93 0
+	add	x25, x25, :lo12:.LC3
+	.loc 1 98 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 1 69 0
+	mov	w20, 0
+.LVL22:
+.L14:
+	.loc 1 92 0
+	mov	w22, 0
+	.loc 1 96 0
+	mov	w28, 1
+	.loc 1 91 0
 	mov	w1, w20
-	bl	regulator_set_value
-.LVL9:
-	mov	w19, w0
-.LVL10:
-	.loc 1 177 0
-	mov	x0, 100
-.LVL11:
-	bl	udelay
-.LVL12:
-	.loc 1 178 0
-	cbz	w19, .L1
-	.loc 1 179 0
-	adrp	x0, .LC3
-	add	x0, x0, :lo12:.LC3
-	b	.L8
+	mov	x0, x27
+	bl	printf
+.LVL23:
+.L13:
+	.loc 1 93 0
+	mov	w1, w22
+	mov	x0, x25
+	bl	printf
+.LVL24:
+	.loc 1 96 0
+	mov	x19, 0
+	lsl	w1, w28, w22
+.LVL25:
+.L10:
+	ldr	w0, [x19, x26]
+	.loc 1 95 0
+	cbz	w20, .L8
+	.loc 1 96 0
+	eor	w0, w0, w1
+.L8:
+	.loc 1 98 0
+	str	w0, [x21, x19]
+	add	x19, x19, 4
+	.loc 1 94 0
+	cmp	x19, 128
+	bne	.L10
+	.loc 1 100 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL26:
+	.loc 1 101 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL27:
+	.loc 1 103 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL28:
+	cbnz	x0, .L11
+	.loc 1 106 0
+	cbz	w20, .L12
+	.loc 1 92 0 discriminator 2
+	add	w22, w22, 1
+.LVL29:
+	cmp	w22, 32
+	bne	.L13
+.L12:
+	.loc 1 90 0 discriminator 2
+	add	w20, w20, 1
+.LVL30:
+	cmp	w20, 2
+	bne	.L14
+	.loc 1 110 0
+	mov	w0, 0
+	b	.L1
+	.cfi_endproc
+.LFE201:
+	.size	crosstalk, .-crosstalk
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.weak	set_ddr_freq
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB254:
+	.file 2 "cmd/ddr_tool/ddr_tool.c"
+	.loc 2 45 0
+	.cfi_startproc
+.LVL31:
+	.loc 2 47 0
+	mov	w0, 0
+.LVL32:
+	ret
+	.cfi_endproc
+.LFE254:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.weak	set_vdd_logic
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB255:
+	.loc 2 50 0
+	.cfi_startproc
+.LVL33:
+	.loc 2 52 0
+	mov	w0, -1
+.LVL34:
+	ret
 	.cfi_endproc
-.LFE258:
+.LFE255:
 	.size	set_vdd_logic, .-set_vdd_logic
-	.section	.text.random_test,"ax",@progbits
+	.section	.text.diagonalscan,"ax",@progbits
 	.align	2
-	.global	random_test
-	.type	random_test, %function
-random_test:
-.LFB275:
-	.file 2 "cmd/ddr_tool/random_test.c"
-	.loc 2 88 0
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB269:
+	.file 3 "cmd/ddr_tool/diagonalscan.c"
+	.loc 3 16 0
 	.cfi_startproc
-.LVL13:
+.LVL35:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-.LBB18:
-.LBB19:
-	.loc 2 18 0
-	mov	x2, x1
-.LBE19:
-.LBE18:
-	.loc 2 88 0
+	.loc 3 19 0
+	mov	x2, 32
+	.loc 3 16 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	mov	x22, x0
-.LVL14:
+	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-.LBB24:
-.LBB20:
-	.loc 2 37 0
-	adrp	x21, .LC5
-.LBE20:
-.LBE24:
-	.loc 2 88 0
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	mov	x23, x1
-.LVL15:
+	sub	x23, x1, #32
+	.loc 3 19 0
+	adrp	x1, .LANCHOR1
+.LVL36:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 3 16 0
 	stp	x19, x20, [sp, 16]
-.LBB25:
-.LBB21:
-	.loc 2 18 0
-	mov	w1, -2139062144
-.LVL16:
-.LBE21:
-.LBE25:
-	.loc 2 88 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-.LBB26:
-.LBB22:
-	.loc 2 23 0
-	adrp	x24, .LC4
-	.loc 2 18 0
-	bl	memset
-.LVL17:
-	.loc 2 23 0
-	add	x24, x24, :lo12:.LC4
-	.loc 2 37 0
-	add	x21, x21, :lo12:.LC5
-	.loc 2 24 0
-	lsr	x0, x23, 2
-	.loc 2 14 0
-	mov	w27, 0
-	.loc 2 20 0
-	mov	w25, 1077952576
-	.loc 2 19 0
-	mov	w20, -2139062144
-	.loc 2 22 0
-	mov	w28, 0
-	.loc 2 24 0
-	str	x0, [x29, 96]
-.LVL18:
-.L15:
-	.loc 2 23 0
-	mov	w1, w28
-	mov	x0, x24
-	bl	printf
-.LVL19:
-	.loc 2 24 0
-	mov	w1, 0
-.LVL20:
-.L10:
-	ldr	x2, [x29, 96]
-	uxtw	x0, w1
-	cmp	x0, x2
-	bcc	.L14
-.LVL21:
-.L13:
-	.loc 2 37 0
-	mov	x0, x21
-	.loc 2 22 0
-	add	w28, w28, 1
-.LVL22:
-	.loc 2 37 0
-	bl	printf
-.LVL23:
-	.loc 2 35 0
-	lsr	w25, w25, 1
-.LVL24:
-	.loc 2 36 0
-	lsr	w20, w20, 1
-.LVL25:
-	.loc 2 22 0
-	cmp	w28, 8
-	bne	.L15
-	mov	x19, -1
-	b	.L12
-.LVL26:
-.L14:
-	.loc 2 25 0
-	lsl	x0, x0, 2
-	add	x19, x22, x0
-	ldr	w2, [x22, x0]
-	str	w2, [x29, 108]
-	.loc 2 26 0
-	uxtw	x2, w2
-	cmp	w2, w20
-	beq	.L11
-.LVL27:
-	.loc 2 28 0
-	ldr	w27, [x19]
-	.loc 2 33 0
-	cmn	x19, #1
-	beq	.L13
-.LVL28:
-.L12:
-	.loc 2 39 0
+	.loc 3 16 0
+	mov	x25, x0
+	.loc 3 19 0
+	add	x0, x29, 80
+.LVL37:
+	bl	memcpy
+.LVL38:
+	.loc 3 24 0
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL29:
-	.loc 2 40 0
-	cmn	x19, #1
-	beq	.L16
-	.loc 2 41 0
-	ldr	w2, [x29, 108]
+.LVL39:
+	.loc 3 25 0
+	bl	get_page_size
+.LVL40:
+	sxtw	x19, w0
+.LVL41:
+	.loc 3 27 0
+	tbz	w19, #31, .L28
+	.loc 3 28 0
+	mov	w1, w19
 	adrp	x0, .LC7
-	mov	w4, w20
-	mov	w3, w27
-	mov	x1, x19
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.LVL30:
-.L29:
-.LBE22:
-.LBE26:
-.LBB27:
-.LBB28:
-	.loc 2 82 0
+.LVL42:
+	.loc 3 29 0
 	mov	w0, -1
-.L9:
-.LBE28:
-.LBE27:
-	.loc 2 96 0
+.L31:
+.LVL43:
+.L27:
+	.loc 3 64 0
 	ldp	x19, x20, [sp, 16]
+.LVL44:
 	ldp	x21, x22, [sp, 32]
-.LVL31:
 	ldp	x23, x24, [sp, 48]
-.LVL32:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+.LVL45:
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -267,1620 +393,996 @@ random_test:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL33:
-.L11:
+.LVL46:
+.L28:
 	.cfi_restore_state
-.LBB30:
-.LBB23:
-	.loc 2 31 0
-	str	w25, [x22, x0]
-	.loc 2 24 0
-	add	w1, w1, 1
-.LVL34:
-	b	.L10
-.LVL35:
-.L16:
-.LBE23:
-.LBE30:
-.LBB31:
-.LBB29:
-	.loc 2 58 0
-	adrp	x25, .LC8
-.LVL36:
-	.loc 2 76 0
-	adrp	x24, .LC9
-	.loc 2 66 0
-	lsr	x28, x23, 3
-.LVL37:
-	.loc 2 58 0
-	add	x25, x25, :lo12:.LC8
-	.loc 2 76 0
-	add	x24, x24, :lo12:.LC9
-	.loc 2 66 0
-	mov	x27, 0
-	mov	x19, 0
-.LVL38:
-.L23:
-	.loc 2 58 0
-	mov	x1, x19
-	mov	x0, x25
-	bl	printf
-.LVL39:
-	.loc 2 60 0
-	lsl	x20, x19, 8
-	lsl	x0, x19, 24
-	orr	x20, x20, x19, lsl 16
-	orr	x0, x0, x19, lsl 32
-	.loc 2 64 0
-	mov	x2, x23
-	.loc 2 60 0
-	orr	x20, x20, x0
-	lsl	x0, x19, 40
-	orr	x0, x0, x19, lsl 48
-	orr	x20, x20, x0
-	orr	x0, x19, x19, lsl 56
-	orr	x20, x20, x0
-.LVL40:
-	.loc 2 64 0
-	mov	x0, x22
-	mov	w1, w20
-	bl	memset
-.LVL41:
-	.loc 2 66 0
-	mov	x0, 0
-.LVL42:
-.L18:
-	cmp	x0, x28
-	bne	.L22
-.LVL43:
-.L21:
-	.loc 2 76 0
-	mov	x0, x24
-.LVL44:
-	.loc 2 57 0
-	add	x19, x19, 1
-.LVL45:
-	.loc 2 76 0
-	bl	printf
-.LVL46:
-	.loc 2 57 0
-	cmp	x19, 256
-	bne	.L23
-	mov	x21, -1
-	b	.L20
+	.loc 3 40 0
+	lsr	x22, x22, 1
 .LVL47:
-.L22:
-	lsl	x1, x0, 3
-	add	x21, x1, x22
-	.loc 2 67 0
-	ldr	x26, [x1, x22]
+	add	x23, x25, x23
 .LVL48:
-	.loc 2 68 0
-	cmp	x20, x26
-	beq	.L19
+	mov	w21, 0
+	mov	x20, 0
+	.loc 3 37 0
+	mov	w1, 32
+	add	x0, x29, 80
+	bl	data_cpu_2_io
 .LVL49:
-	.loc 2 70 0
-	ldr	x27, [x21]
+	.loc 3 39 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x25
+	bl	memcpy
 .LVL50:
-	.loc 2 74 0
-	cmn	x21, #1
-	beq	.L21
+.L30:
+	.loc 3 40 0 discriminator 1
+	cmp	x20, x22
+	bcc	.L34
+	mov	x0, 0
 .LVL51:
-.L20:
-	.loc 2 78 0
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
-	bl	printf
+	.loc 3 63 0
+	b	.L27
 .LVL52:
-	.loc 2 84 0
-	mov	w0, 0
-	.loc 2 79 0
-	cmn	x21, #1
-	beq	.L9
-	.loc 2 80 0
-	mov	x4, x20
-	mov	x3, x27
-	mov	x2, x26
-	mov	x1, x21
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
-	bl	printf
+.L34:
+	.loc 3 41 0
+	uxtw	x24, w21
+	mov	x2, 32
+	sub	x26, x23, x24
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
 .LVL53:
-	b	.L29
+	.loc 3 44 0
+	add	x2, x20, x25
+	.loc 3 43 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x24
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
 .LVL54:
-.L19:
-	.loc 2 66 0
-	add	x0, x0, 1
+	.loc 3 45 0
+	cbnz	x0, .L27
+	.loc 3 48 0
+	add	x24, x24, 40
+	add	x20, x20, x19
 .LVL55:
-	b	.L18
-.LBE29:
-.LBE31:
-	.cfi_endproc
-.LFE275:
-	.size	random_test, .-random_test
-	.section	.text.cpu_2_io,"ax",@progbits
-	.align	2
-	.global	cpu_2_io
-	.type	cpu_2_io, %function
-cpu_2_io:
-.LFB276:
-	.file 3 "cmd/ddr_tool/tool_common.c"
-	.loc 3 11 0
-	.cfi_startproc
+	cmp	x19, x24
+	add	w21, w21, 8
 .LVL56:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 19 0
-	mov	x2, 0
-	.loc 3 11 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	add	x1, x29, 16
+	csel	w21, w21, wzr, cs
 .LVL57:
-.L31:
-	.loc 3 19 0 discriminator 1
-	cmp	x2, 16
-	bne	.L32
-	.loc 3 22 0
-	bl	memcpy
+	.loc 3 50 0
+	cmp	x22, x20
+	bls	.L33
+	.loc 3 51 0
+	add	x0, x25, x20
 .LVL58:
-	.loc 3 26 0
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
 .LVL59:
-.L32:
-	.cfi_restore_state
-	.loc 3 20 0 discriminator 3
-	ubfiz	w3, w2, 2, 2
-	add	w3, w3, w2, asr 2
-	ldrb	w3, [x0, w3, sxtw]
-	strb	w3, [x1, x2]
+.L33:
+	.loc 3 53 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x23, x23, x19
+	bl	cmp_buf_data
 .LVL60:
-	add	x2, x2, 1
-.LVL61:
-	b	.L31
+	.loc 3 56 0
+	cbz	x0, .L30
+	b	.L27
 	.cfi_endproc
-.LFE276:
-	.size	cpu_2_io, .-cpu_2_io
-	.section	.text.write_buf_to_ddr,"ax",@progbits
+.LFE269:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.random_test,"ax",@progbits
 	.align	2
-	.global	write_buf_to_ddr
-	.type	write_buf_to_ddr, %function
-write_buf_to_ddr:
-.LFB277:
-	.loc 3 29 0
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB272:
+	.file 4 "cmd/ddr_tool/random_test.c"
+	.loc 4 97 0
 	.cfi_startproc
+.LVL61:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB10:
+.LBB11:
+	.loc 4 19 0
+	mov	x2, x1
+.LBE11:
+.LBE10:
+	.loc 4 97 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x1
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
 .LVL62:
-	.loc 3 37 0
-	lsr	w1, w1, 3
+	stp	x23, x24, [sp, 48]
+.LBB16:
+.LBB12:
+	.loc 4 19 0
+	mov	w1, -2139062144
 .LVL63:
-	.loc 3 39 0
-	lsr	x3, x3, 3
+.LBE12:
+.LBE16:
+	.loc 4 97 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+.LBB17:
+.LBB13:
+	.loc 4 24 0
+	adrp	x24, .LC8
+.LBE13:
+.LBE17:
+	.loc 4 97 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB18:
+.LBB14:
+	.loc 4 19 0
+	bl	memset
 .LVL64:
-	.loc 3 37 0
-	sub	w1, w1, #1
+	.loc 4 25 0
+	lsr	x0, x20, 2
+	.loc 4 24 0
+	add	x24, x24, :lo12:.LC8
+	.loc 4 25 0
+	str	x0, [x29, 104]
+	.loc 4 15 0
+	mov	w27, 0
+	.loc 4 41 0
+	adrp	x0, .LC9
+	.loc 4 21 0
+	mov	w23, 1077952576
+	.loc 4 41 0
+	add	x0, x0, :lo12:.LC9
+	.loc 4 20 0
+	mov	w21, -2139062144
+	.loc 4 23 0
+	mov	w22, 0
+	.loc 4 41 0
+	str	x0, [x29, 96]
 .LVL65:
-	.loc 3 39 0
-	mov	w4, 0
-	mov	w5, 0
+.L43:
+	.loc 4 24 0
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
 .LVL66:
-.L35:
-	.loc 3 39 0 is_stmt 0 discriminator 1
-	uxtw	x6, w5
-	cmp	x6, x3
-	bcc	.L36
-	.loc 3 44 0 is_stmt 1
-	ret
-.L36:
-	.loc 3 40 0 discriminator 3
-	ldr	x7, [x0, w4, uxtw 3]
-	.loc 3 41 0 discriminator 3
-	add	w4, w4, 1
+	.loc 4 25 0
+	mov	w1, 0
 .LVL67:
-	.loc 3 40 0 discriminator 3
-	str	x7, [x2, x6, lsl 3]
-	.loc 3 42 0 discriminator 3
-	and	w4, w1, w4
+.L38:
+	ldr	x2, [x29, 104]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L42
 .LVL68:
-	.loc 3 39 0 discriminator 3
-	add	w5, w5, 1
+.L41:
+	.loc 4 41 0
+	ldr	x0, [x29, 96]
+	.loc 4 23 0
+	add	w22, w22, 1
 .LVL69:
-	b	.L35
-	.cfi_endproc
-.LFE277:
-	.size	write_buf_to_ddr, .-write_buf_to_ddr
-	.section	.text.cmp_buf_data,"ax",@progbits
-	.align	2
-	.global	cmp_buf_data
-	.type	cmp_buf_data, %function
-cmp_buf_data:
-.LFB278:
-	.loc 3 48 0
-	.cfi_startproc
+	.loc 4 39 0
+	lsr	w23, w23, 1
 .LVL70:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 60 0
-	lsr	w1, w1, 3
+	.loc 4 40 0
+	lsr	w21, w21, 1
 .LVL71:
-	.loc 3 48 0
-	mov	w10, w4
-	.loc 3 60 0
-	sub	w1, w1, #1
-	.loc 3 48 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 62 0
-	lsr	x3, x3, 3
+	.loc 4 41 0
+	bl	printf
 .LVL72:
-	.loc 3 48 0
-	mov	x8, x2
+	.loc 4 23 0
+	cmp	w22, 8
+	bne	.L43
+	mov	x28, -1
+	b	.L40
 .LVL73:
-	.loc 3 62 0
-	mov	w6, 0
-	.loc 3 56 0
-	mov	x2, 0
+.L42:
+	.loc 4 26 0
+	lsl	x0, x0, 2
+	add	x5, x19, x0
+	ldr	w26, [x19, x0]
+	.loc 4 27 0
+	cmp	w26, w21
+	beq	.L39
+	.loc 4 28 0
+	mov	x28, x5
 .LVL74:
-	.loc 3 62 0
-	mov	w7, 0
-	.loc 3 48 0
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
+	.loc 4 29 0
+	add	x1, x5, 4
 .LVL75:
-.L38:
-	.loc 3 62 0 discriminator 1
-	uxtw	x5, w7
-	cmp	x5, x3
-	bcc	.L41
-	.loc 3 61 0
-	mov	x19, 0
-	.loc 3 54 0
-	mov	x3, 0
-	.loc 3 55 0
-	mov	x4, 0
-	b	.L40
-.L41:
-	.loc 3 63 0
-	lsl	x5, x5, 3
-	.loc 3 64 0
-	ldr	x4, [x0, w6, uxtw 3]
-	.loc 3 63 0
-	add	x19, x8, x5
-	ldr	x2, [x8, x5]
+	mov	x0, x5
+	bl	flush_dcache_range
 .LVL76:
-	.loc 3 64 0
-	cmp	x2, x4
-	beq	.L39
-	.loc 3 65 0
-	ldr	x3, [x19]
+	.loc 4 37 0
+	cmn	x28, #1
+	.loc 4 32 0
+	ldr	w27, [x28]
+	.loc 4 37 0
+	beq	.L41
 .LVL77:
 .L40:
-	.loc 3 73 0
-	cmp	x19, 0
-	ccmp	w10, 0, 4, ne
-	beq	.L37
-	.loc 3 74 0
-	adrp	x0, .LC12
+	.loc 4 43 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
 .LVL78:
-	mov	x1, x19
-.LVL79:
-	add	x0, x0, :lo12:.LC12
+	.loc 4 44 0
+	cmn	x28, #1
+	beq	.L44
+	.loc 4 45 0
+	adrp	x0, .LC11
+	mov	w4, w21
+	mov	w3, w27
+	mov	w2, w26
+	mov	x1, x28
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.LVL80:
+.LVL79:
+.L57:
+.LBE14:
+.LBE18:
+.LBB19:
+.LBB20:
+	.loc 4 91 0
+	mov	w0, -1
 .L37:
-	.loc 3 78 0
-	mov	x0, x19
-	ldr	x19, [sp, 16]
-.LVL81:
-	ldp	x29, x30, [sp], 32
+.LBE20:
+.LBE19:
+	.loc 4 105 0
+	ldp	x19, x20, [sp, 16]
+.LVL80:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
+	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL82:
+.LVL81:
 .L39:
 	.cfi_restore_state
-	.loc 3 70 0 discriminator 2
-	add	w6, w6, 1
+.LBB22:
+.LBB15:
+	.loc 4 35 0
+	str	w23, [x19, x0]
+	.loc 4 25 0
+	add	w1, w1, 1
+.LVL82:
+	b	.L38
 .LVL83:
-	.loc 3 62 0 discriminator 2
-	add	w7, w7, 1
+.L44:
+.LBE15:
+.LBE22:
+.LBB23:
+.LBB21:
+	.loc 4 64 0
+	adrp	x26, .LC12
+	.loc 4 84 0
+	adrp	x24, .LC13
+	.loc 4 72 0
+	lsr	x28, x20, 3
+	.loc 4 64 0
+	add	x26, x26, :lo12:.LC12
+	.loc 4 84 0
+	add	x24, x24, :lo12:.LC13
+	.loc 4 72 0
+	mov	x27, 0
+	mov	x21, 0
 .LVL84:
-	.loc 3 71 0 discriminator 2
-	and	w6, w1, w6
+.L51:
+	.loc 4 64 0
+	mov	x1, x21
+	mov	x0, x26
+	bl	printf
 .LVL85:
-	b	.L38
-	.cfi_endproc
-.LFE278:
-	.size	cmp_buf_data, .-cmp_buf_data
-	.section	.text.crosstalk,"ax",@progbits
-	.align	2
-	.global	crosstalk
-	.type	crosstalk, %function
-crosstalk:
-.LFB201:
-	.file 4 "cmd/ddr_tool/crosstalk.c"
-	.loc 4 46 0
-	.cfi_startproc
+	.loc 4 66 0
+	lsl	x22, x21, 24
+	lsl	x0, x21, 8
+	orr	x22, x22, x21, lsl 32
+	orr	x0, x0, x21, lsl 16
+	.loc 4 70 0
+	mov	x2, x20
+	.loc 4 66 0
+	orr	x22, x22, x0
+	lsl	x0, x21, 40
+	orr	x0, x0, x21, lsl 48
+	orr	x22, x22, x0
+	orr	x0, x21, x21, lsl 56
+	orr	x22, x22, x0
 .LVL86:
-	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-	.loc 4 71 0
-	add	x19, x29, 128
-	.loc 4 46 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -128
-	.cfi_offset 22, -120
-	mov	x21, x0
-	stp	x23, x24, [sp, 48]
-	mov	x22, x1
-	stp	x25, x26, [sp, 64]
-	.loc 4 63 0
-	adrp	x0, .LC13
+	.loc 4 70 0
+	mov	x0, x19
+	mov	w1, w22
+	bl	memset
 .LVL87:
-	.loc 4 46 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -112
-	.cfi_offset 24, -104
-	.cfi_offset 25, -96
-	.cfi_offset 26, -88
-	.cfi_offset 27, -80
-	.cfi_offset 28, -72
-	.loc 4 63 0
-	add	x0, x0, :lo12:.LC13
-	bl	printf
+	.loc 4 72 0
+	mov	x0, 0
 .LVL88:
-	.loc 4 66 0
-	adrp	x23, .LC14
-	add	x0, x23, :lo12:.LC14
-	.loc 4 64 0
-	mov	w20, 0
-	.loc 4 66 0
-	str	x0, [x29, 112]
-	.loc 4 76 0
-	add	x0, x19, 16
-	str	x0, [x29, 104]
+.L46:
+	cmp	x0, x28
+	bne	.L50
 .LVL89:
-.L52:
-	.loc 4 66 0
-	ldr	x0, [x29, 112]
-	mov	w1, w20
-	.loc 4 68 0
-	adrp	x24, .LC15
-	add	x28, x24, :lo12:.LC15
-	.loc 4 65 0
-	mov	w26, -1
-	.loc 4 67 0
-	mov	w25, 0
-	.loc 4 66 0
-	bl	printf
-.LVL90:
-	.loc 4 71 0
-	mov	w0, 1
-	lsl	w0, w0, w20
-	str	w0, [x29, 120]
-.LVL91:
-.L51:
-	.loc 4 69 0
-	mvn	w26, w26
-.LVL92:
-	mov	x27, 0
-	.loc 4 68 0
-	mov	w1, w25
-	mov	x0, x28
+.L49:
+	.loc 4 84 0
+	mov	x0, x24
+	.loc 4 63 0
+	add	x21, x21, 1
+.LVL90:
+	.loc 4 84 0
 	bl	printf
+.LVL91:
+	.loc 4 63 0
+	cmp	x21, 256
+	bne	.L51
+	mov	x23, -1
+	b	.L48
+.LVL92:
+.L50:
+	lsl	x1, x0, 3
+	add	x23, x1, x19
+	.loc 4 73 0
+	ldr	x25, [x1, x19]
 .LVL93:
-.L48:
-	.loc 4 71 0 discriminator 3
-	ldr	w0, [x29, 120]
-	eor	w0, w0, w26
-	str	w0, [x27, x19]
-	add	x27, x27, 4
-	.loc 4 72 0 discriminator 3
-	mvn	w26, w26
+	.loc 4 74 0
+	cmp	x22, x25
+	beq	.L47
 .LVL94:
-	.loc 4 70 0 discriminator 3
-	cmp	x27, 32
-	bne	.L48
+	.loc 4 76 0
+	add	x1, x23, 4
+	mov	x0, x23
 .LVL95:
-	.loc 4 76 0 discriminator 1
-	mov	x0, x19
-	bl	cpu_2_io
+	bl	flush_dcache_range
 .LVL96:
-	ldr	x0, [x29, 104]
-	bl	cpu_2_io
+	.loc 4 78 0
+	ldr	x27, [x23]
 .LVL97:
-	.loc 4 77 0 discriminator 1
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w27
-	mov	x0, x19
-	bl	write_buf_to_ddr
+	.loc 4 82 0
+	cmn	x23, #1
+	beq	.L49
 .LVL98:
-	.loc 4 78 0 discriminator 1
-	mov	w4, 1
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w27
-	mov	x0, x19
-	bl	cmp_buf_data
+.L48:
+	.loc 4 86 0
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
 .LVL99:
-	cbz	x0, .L49
+	.loc 4 93 0
+	mov	w0, 0
+	.loc 4 87 0
+	cmn	x23, #1
+	beq	.L37
+	.loc 4 88 0
+	mov	x4, x22
+	mov	x3, x27
+	mov	x2, x25
+	mov	x1, x23
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
 .LVL100:
-.L58:
-	.loc 4 80 0
-	mov	w0, -1
-.L47:
-	.loc 4 115 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+	b	.L57
 .LVL101:
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
+.L47:
+	.loc 4 72 0
+	add	x0, x0, 1
 .LVL102:
-.L49:
-	.cfi_restore_state
-	.loc 4 67 0 discriminator 2
-	add	w25, w25, 1
+	b	.L46
+.LBE21:
+.LBE23:
+	.cfi_endproc
+.LFE272:
+	.size	random_test, .-random_test
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB257:
+	.loc 2 100 0
+	.cfi_startproc
 .LVL103:
-	cmp	w25, 2
-	bne	.L51
-	.loc 4 64 0 discriminator 2
-	add	w20, w20, 1
-.LVL104:
-	cmp	w20, 32
-	bne	.L52
-	.loc 4 87 0
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+	.loc 2 113 0
 	adrp	x0, .LC16
+.LVL104:
 	add	x0, x0, :lo12:.LC16
-	bl	printf
+	.loc 2 100 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+	.loc 2 115 0
+	add	x20, x29, 152
+	.loc 2 100 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+	.loc 2 115 0
+	add	x21, x29, 120
+	.loc 2 100 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	w26, w2
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+	mov	x27, x3
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	.loc 2 103 0
+	stp	xzr, xzr, [x29, 184]
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
 .LVL105:
-	.loc 4 88 0
-	mov	x0, 128
-	bl	malloc
+	.loc 2 113 0
+	bl	printf
 .LVL106:
-	mov	x19, x0
+	.loc 2 115 0
+	mov	w2, 1
+	mov	x1, x20
+	mov	x0, x21
+	bl	get_print_available_addr
 .LVL107:
-	.loc 4 89 0
-	cbnz	x0, .L53
-	.loc 4 90 0
-	adrp	x0, .LC17
+	.loc 2 117 0
+	cmp	w26, 1
+	ble	.L143
+	.loc 2 121 0
+	adrp	x24, .LANCHOR2
+	add	x28, x24, :lo12:.LANCHOR2
+	mov	x19, 0
+.L61:
+	ldr	x1, [x28, x19, lsl 3]
+	mov	w25, w19
 .LVL108:
-	mov	x1, 128
-	add	x0, x0, :lo12:.LC17
-	bl	printf
+	ldr	x0, [x27, 8]
+	bl	strcasecmp
 .LVL109:
-.L53:
-	adrp	x26, .LANCHOR0
+	mov	w23, w0
+	cbz	w0, .L60
 .LVL110:
-	.loc 4 93 0
-	add	x23, x23, :lo12:.LC14
-	.loc 4 95 0
-	add	x24, x24, :lo12:.LC15
-	.loc 4 100 0
-	add	x26, x26, :lo12:.LANCHOR0
-	.loc 4 69 0
-	mov	w20, 0
+	add	x19, x19, 1
 .LVL111:
-.L61:
-	.loc 4 94 0
-	mov	w25, 0
-	.loc 4 98 0
-	mov	w27, 1
-	.loc 4 93 0
-	mov	w1, w20
-	mov	x0, x23
-	bl	printf
+	.loc 2 120 0 discriminator 2
+	cmp	x19, 7
+	bne	.L61
+	.loc 2 128 0
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	b	.L144
 .LVL112:
-.L60:
-	.loc 4 95 0
-	mov	w1, w25
-	mov	x0, x24
-	bl	printf
+.L96:
+	.loc 2 133 0
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
 .LVL113:
-	.loc 4 98 0
-	lsl	w2, w27, w25
-	mov	x0, 0
+.L144:
+	.loc 2 128 0
+	bl	printf
 .LVL114:
-.L56:
-	ldr	w1, [x0, x26]
-	.loc 4 97 0
-	cbz	w20, .L54
-	.loc 4 98 0
-	eor	w1, w1, w2
-.L54:
-	.loc 4 100 0
-	str	w1, [x19, x0]
-	add	x0, x0, 4
-	.loc 4 96 0
-	cmp	x0, 128
-	bne	.L56
-	mov	x28, x19
-	add	x1, x19, 128
-.L57:
-	.loc 4 104 0
-	mov	x0, x28
-	str	x1, [x29, 120]
-	bl	cpu_2_io
+.L143:
+	.loc 2 129 0
+	mov	w23, -1
+	b	.L58
 .LVL115:
-	add	x28, x28, 16
-	.loc 4 102 0
-	ldr	x1, [x29, 120]
-	cmp	x28, x1
-	bne	.L57
-	.loc 4 105 0
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, 128
-	mov	x0, x19
-	bl	write_buf_to_ddr
+.L64:
+	.loc 2 138 0
+	add	x0, x27, x28
+	add	x1, x29, 184
+	add	x2, x1, x28
+	mov	w1, 0
+	add	x28, x28, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
 .LVL116:
-	.loc 4 107 0
-	mov	w4, 1
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, 128
-	mov	x0, x19
-	bl	cmp_buf_data
+	tbz	w0, #31, .L63
+	.loc 2 139 0
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	b	.L144
+.L65:
+	.loc 2 164 0
+	cmp	w25, 1
+	bne	.L68
+	.loc 2 166 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L67
+	.loc 2 167 0
+	bl	set_vdd_logic
 .LVL117:
-	cbnz	x0, .L58
-	.loc 4 110 0
-	cbz	w20, .L59
-	.loc 4 94 0 discriminator 2
-	add	w25, w25, 1
+	b	.L67
+.L68:
+	.loc 2 169 0
+	sub	w19, w19, #5
 .LVL118:
-	cmp	w25, 32
-	bne	.L60
-.L59:
-	.loc 4 92 0 discriminator 2
-	add	w20, w20, 1
+	cmp	w19, 1
+	bhi	.L70
+	.loc 2 171 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L71
+	.loc 2 172 0
+	bl	set_vdd_logic
 .LVL119:
-	cmp	w20, 2
-	bne	.L61
-	.loc 4 114 0
-	mov	w0, 0
-	b	.L47
-	.cfi_endproc
-.LFE201:
-	.size	crosstalk, .-crosstalk
-	.section	.text.diagonalscan,"ax",@progbits
-	.align	2
-	.global	diagonalscan
-	.type	diagonalscan, %function
-diagonalscan:
-.LFB272:
-	.file 5 "cmd/ddr_tool/diagonalscan.c"
-	.loc 5 49 0
-	.cfi_startproc
+.L71:
+	.loc 2 173 0
+	cmp	w25, 5
+	bne	.L72
+	.loc 2 175 0
+	mov	x1, 65535
+	mov	x0, 0
+	movk	x1, 0x9f, lsl 16
+.L75:
 .LVL120:
-	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 55 0
-	mov	x2, 32
-	.loc 5 49 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	mov	x19, x1
-	.loc 5 55 0
-	adrp	x1, .LANCHOR1
+	ldr	x2, [x20, x0, lsl 3]
+	cmp	x2, x1
+	bls	.L73
+	.loc 2 176 0
+	mov	w1, w0
 .LVL121:
-	add	x1, x1, :lo12:.LANCHOR1
-	.loc 5 49 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	.loc 5 55 0
-	add	x0, x29, 80
+	.loc 2 185 0
+	mov	x2, 10485760
+	str	x2, [x20, w0, uxtw 3]
 .LVL122:
-	.loc 5 49 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 55 0
-	bl	memcpy
+.L74:
+	.loc 2 108 0 discriminator 1
+	mov	x0, 0
 .LVL123:
-	.loc 5 60 0
-	adrp	x0, .LC18
-	add	x0, x0, :lo12:.LC18
-	bl	printf
+.L78:
+	.loc 2 188 0
+	cmp	w1, w0
+	beq	.L77
+	.loc 2 190 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 2 191 0
+	str	xzr, [x20, x0, lsl 3]
+.L77:
 .LVL124:
-.LBB35:
-.LBB36:
-.LBB37:
-	.loc 5 35 0
-	mov	x0, 520
-	movk	x0, 0xfe02, lsl 16
-	ldr	w20, [x0]
+	add	x0, x0, 1
 .LVL125:
-#APP
-// 35 "cmd/ddr_tool/diagonalscan.c" 1
-	dmb sy
-// 0 "" 2
+	.loc 2 187 0 discriminator 2
+	cmp	x0, 4
+	bne	.L78
+.L72:
+	.loc 2 201 0
+	adrp	x26, .LC20
+	.loc 2 205 0
+	adrp	x27, .LC21
 .LVL126:
-#NO_APP
-.LBE37:
-.LBE36:
-.LBE35:
-	.loc 5 73 0
-	add	x0, x29, 80
-	bl	cpu_2_io
+	.loc 2 201 0
+	add	x26, x26, :lo12:.LC20
+	.loc 2 205 0
+	add	x27, x27, :lo12:.LC21
+	mov	w25, 0
 .LVL127:
-	.loc 5 75 0
-	add	x1, x29, 80
-	mov	x2, 32
-	mov	x0, x23
-	bl	memcpy
+.L84:
+	.loc 2 199 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L85
+	.loc 2 199 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bls	.L67
+.L85:
+	.loc 2 201 0 is_stmt 1
+	mov	x28, 0
+	.loc 2 200 0
+	add	w25, w25, 1
 .LVL128:
-.LBB40:
-.LBB38:
-	.loc 5 40 0
-	ubfx	x0, x20, 9, 2
-	.loc 5 41 0
-	ubfx	x20, x20, 2, 2
+	.loc 2 201 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL129:
-	.loc 5 40 0
-	add	w0, w0, 9
-	.loc 5 41 0
-	mov	w1, 2
-	asr	w20, w1, w20
-.LBE38:
-.LBE40:
-	.loc 5 76 0
-	lsr	x24, x19, 1
-.LBB41:
-.LBB39:
-	.loc 5 43 0
-	add	w0, w0, w20
-	sub	x19, x19, #32
+.L82:
+	.loc 2 203 0
+	ldr	x3, [x20, x28, lsl 3]
+	cbz	x3, .L79
+	.loc 2 205 0
+	ldr	x2, [x21, x28, lsl 3]
+	mov	w1, w28
+	mov	x0, x27
+	bl	printf
 .LVL130:
-	mov	w25, 1
-	add	x19, x19, x23
+	.loc 2 207 0
+	ldr	x0, [x29, 192]
+	bl	set_ddr_freq
 .LVL131:
-	lsl	w25, w25, w0
-.LBE39:
-.LBE41:
-	.loc 5 76 0
-	mov	w21, 0
-	mov	x20, 0
+	.loc 2 208 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
+	bl	random_test
 .LVL132:
-.L74:
-	.loc 5 76 0 is_stmt 0 discriminator 1
-	cmp	x20, x24
-	bcc	.L78
-	mov	x0, 0
-	b	.L75
-.L78:
-	.loc 5 77 0 is_stmt 1
-	uxtw	x22, w21
-	mov	x2, 32
-	sub	x26, x19, x22
-	add	x1, x29, 80
-	mov	x0, x26
-	bl	memcpy
+	mov	w19, w0
 .LVL133:
-	.loc 5 80 0
-	add	x2, x20, x23
-	.loc 5 79 0
-	mov	x3, 32
-	mov	w4, 1
-	add	x2, x2, x22
-	mov	w1, w3
-	add	x0, x29, 80
-	bl	cmp_buf_data
+	.loc 2 210 0
+	cbnz	w0, .L98
+	.loc 2 211 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL134:
-	.loc 5 81 0
-	cbnz	x0, .L75
-	.loc 5 84 0
-	add	x22, x22, 40
-	add	x20, x20, x25
+	bl	crosstalk
 .LVL135:
-	cmp	x25, x22
-	add	w21, w21, 8
+	mov	w19, w0
 .LVL136:
-	csel	w21, w21, wzr, cs
+	.loc 2 215 0
+	cbnz	w0, .L99
+	.loc 2 216 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL137:
-	.loc 5 86 0
-	cmp	x24, x20
-	bls	.L77
-	.loc 5 87 0
-	add	x0, x23, x20
+	bl	diagonalscan
 .LVL138:
-	mov	x2, 32
-	add	x1, x29, 80
-	add	x0, x0, x21, uxtw
-	bl	memcpy
+	.loc 2 218 0
+	cmp	w0, 0
+	.loc 2 216 0
+	mov	w19, w0
 .LVL139:
-.L77:
-	.loc 5 89 0
-	mov	x3, 32
-	mov	w4, 1
-	mov	x2, x26
-	mov	w1, w3
-	add	x0, x29, 80
-	sub	x19, x19, x25
-	bl	cmp_buf_data
+	.loc 2 218 0
+	mov	w0, 4
 .LVL140:
-	.loc 5 92 0
-	cbz	x0, .L74
+	csinc	w22, w0, wzr, ne
 .LVL141:
-.L75:
-	.loc 5 100 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+.L80:
+	.loc 2 226 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL142:
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE272:
-	.size	diagonalscan, .-diagonalscan
-	.section	.text.do_ddr_test,"ax",@progbits
-	.align	2
-	.type	do_ddr_test, %function
-do_ddr_test:
-.LFB259:
-	.loc 1 190 0
-	.cfi_startproc
+	.loc 2 227 0
+	cbnz	w19, .L101
 .LVL143:
-	stp	x29, x30, [sp, -224]!
-	.cfi_def_cfa_offset 224
-	.cfi_offset 29, -224
-	.cfi_offset 30, -216
-.LBB46:
-.LBB47:
-	.loc 1 50 0
-	mov	x0, 0
+	.loc 2 228 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
+	bl	random_test
 .LVL144:
-.LBE47:
-.LBE46:
-	.loc 1 190 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -208
-	.cfi_offset 20, -200
-.LBB54:
-.LBB48:
-	.loc 1 52 0
-	add	x20, x29, 120
-.LBE48:
-.LBE54:
-	.loc 1 190 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -192
-	.cfi_offset 22, -184
-.LBB55:
-.LBB49:
-	.loc 1 53 0
-	add	x21, x29, 152
-.LBE49:
-.LBE55:
-	.loc 1 190 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -160
-	.cfi_offset 26, -152
-	mov	w26, w2
-	stp	x27, x28, [sp, 80]
-.LBB56:
-.LBB50:
-	.loc 1 50 0
-	mov	x2, x18
+	mov	w2, w0
 .LVL145:
-	.cfi_offset 27, -144
-	.cfi_offset 28, -136
-.LBE50:
-.LBE56:
-	.loc 1 190 0
-	mov	x27, x3
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -176
-	.cfi_offset 24, -168
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 184]
-.LBB57:
-.LBB51:
-	.loc 1 47 0
-	mov	w23, 0
-.LBE51:
-.LBE57:
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 200]
-	str	xzr, [x29, 216]
+	.loc 2 232 0
+	cbnz	w0, .L102
+	.loc 2 233 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL146:
-.L83:
-.LBB58:
-.LBB52:
-	.loc 1 50 0
-	ldr	x1, [x2]
-	ubfiz	x3, x0, 4, 32
-	.loc 1 52 0
-	str	xzr, [x20, x0, lsl 3]
-	.loc 1 50 0
-	add	x1, x1, x3
-	.loc 1 53 0
-	str	xzr, [x21, x0, lsl 3]
-	.loc 1 50 0
-	ldr	x1, [x1, 136]
-	cmp	x1, 0
-	csinc	w23, w23, w0, eq
+	str	w2, [x29, 104]
+	bl	crosstalk
 .LVL147:
-	add	x0, x0, 1
+	mov	w22, w0
 .LVL148:
-	.loc 1 49 0
-	cmp	x0, 4
-	bne	.L83
-	mov	x0, 0
-.L84:
+	.loc 2 237 0
+	ldr	w2, [x29, 104]
+	cbnz	w0, .L103
+	.loc 2 238 0
+	ldr	x1, [x20, x28, lsl 3]
+	ldr	x0, [x21, x28, lsl 3]
 .LVL149:
-	.loc 1 56 0
-	cmp	w0, w23
-	bcc	.L85
-	.loc 1 61 0
-	sub	w1, w23, #1
-	ldr	x0, [x2, 128]
+	bl	diagonalscan
 .LVL150:
-	lsl	x1, x1, 3
-	.loc 1 67 0
-	adrp	x24, .LC21
-	.loc 1 61 0
-	sub	x0, x0, #1048576
-	.loc 1 64 0
-	mov	x22, 0
-	.loc 1 67 0
-	add	x24, x24, :lo12:.LC21
-	.loc 1 61 0
-	ldr	x2, [x20, x1]
-	sub	x0, x0, x2
-	.loc 1 62 0
-	and	x0, x0, -4096
-	.loc 1 61 0
-	str	x0, [x21, x1]
-	.loc 1 63 0
-	adrp	x0, .LC19
-	add	x0, x0, :lo12:.LC19
-	bl	printf
+	mov	w19, w0
 .LVL151:
-	.loc 1 64 0
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
-	bl	printf
+	.loc 2 243 0
+	cbnz	w0, .L104
+	.loc 2 245 0
+	bl	ctrlc
 .LVL152:
-.L86:
-	.loc 1 65 0
-	cmp	w23, w22
-	bhi	.L88
+	cbnz	w0, .L105
+	.loc 2 240 0
+	mov	w22, 4
 .LVL153:
-.LBE52:
-.LBE58:
-	.loc 1 205 0
-	cmp	w26, 1
-	ble	.L194
-	.loc 1 209 0
-	adrp	x24, .LANCHOR2
-	add	x28, x24, :lo12:.LANCHOR2
-	mov	x25, 0
-	str	x24, [x29, 104]
-.L91:
-	ldr	x1, [x28, x25, lsl 3]
-	mov	w22, w25
+.L79:
+	add	x28, x28, 1
 .LVL154:
-	ldr	x0, [x27, 8]
-	bl	strcasecmp
+	.loc 2 202 0 discriminator 2
+	cmp	x28, 4
+	bne	.L82
+	mov	w2, 0
+	mov	w19, 0
 .LVL155:
-	mov	w23, w0
-	cbz	w0, .L90
+.L81:
+	.loc 2 250 0
+	orr	w2, w19, w2
 .LVL156:
-	add	x25, x25, 1
-	.loc 1 208 0 discriminator 2
-	cmp	x25, 7
-	bne	.L91
-	.loc 1 216 0
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
-	b	.L195
+	cbz	w2, .L84
 .LVL157:
-.L85:
-.LBB59:
-.LBB53:
-	.loc 1 57 0
-	ubfiz	x1, x0, 4, 32
-	ldr	x3, [x2]
-	add	x1, x1, 128
-	add	x3, x3, x1
-	ldr	x3, [x3, 8]
-	str	x3, [x20, x0, lsl 3]
-	.loc 1 58 0
-	ldr	x3, [x2]
-	add	x1, x3, x1
-	ldr	x1, [x1, 16]
-	str	x1, [x21, x0, lsl 3]
+.L83:
+	.loc 2 302 0
+	cbz	w19, .L67
+	.loc 2 303 0
+	add	x24, x24, :lo12:.LANCHOR2
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	ldr	x1, [x24, w22, sxtw 3]
+	bl	printf
 .LVL158:
-	add	x0, x0, 1
+.L58:
+	.loc 2 308 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
 .LVL159:
-	b	.L84
+.L73:
+	.cfi_restore_state
+	add	x0, x0, 1
 .LVL160:
-.L88:
-	.loc 1 66 0
-	ldr	x1, [x20, x22, lsl 3]
-	cbz	x1, .L87
-	.loc 1 67 0
-	ldr	x3, [x21, x22, lsl 3]
-	mov	x0, x24
-	add	x2, x1, x3
+	.loc 2 174 0 discriminator 2
+	cmp	x0, 4
+	bne	.L75
+	.loc 2 181 0
+	ldr	x2, [x29, 152]
+	mov	w1, 10
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	lsr	x2, x2, 20
 	bl	printf
 .LVL161:
-.L87:
-	add	x22, x22, 1
+	.loc 2 108 0
+	mov	w1, 0
+	b	.L74
 .LVL162:
-	b	.L86
+.L98:
+	.loc 2 209 0
+	mov	w22, 2
+	b	.L80
 .LVL163:
-.L131:
-.LBE53:
-.LBE59:
-	.loc 1 221 0
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
+.L99:
+	.loc 2 213 0
+	mov	w22, 3
+	b	.L80
 .LVL164:
-.L195:
-	.loc 1 216 0
-	bl	printf
+.L101:
+	mov	w2, 0
+	b	.L81
 .LVL165:
-.L194:
-	.loc 1 217 0
-	mov	w23, -1
+.L102:
+	.loc 2 228 0
+	mov	w19, w0
+	mov	w2, 0
+	.loc 2 230 0
+	mov	w22, 2
 	b	.L81
 .LVL166:
-.L94:
-	.loc 1 226 0
-	add	x0, x27, x28
-	add	x1, x29, 184
-	add	x2, x1, x28
-	mov	w1, 0
-	add	x28, x28, 8
-	ldr	x0, [x0, 16]
-	bl	strict_strtoul
+.L103:
+	.loc 2 233 0
+	mov	w19, w0
+	.loc 2 235 0
+	mov	w22, 3
+	b	.L81
 .LVL167:
-	tbz	w0, #31, .L93
-	.loc 1 227 0
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	b	.L195
-.L95:
-	.loc 1 252 0
-	cmp	w22, 1
-	bne	.L98
-	.loc 1 254 0
-	ldr	x0, [x29, 208]
-	b	.L197
-.L98:
-	.loc 1 257 0
-	sub	w25, w25, #5
-	cmp	w25, 1
-	bls	.L99
+.L104:
+	mov	w2, w22
 .LVL168:
-.LBB60:
-.LBB61:
-	.loc 1 79 0
-	ldr	x0, [x29, 128]
-	.loc 1 82 0
-	ldr	x3, [x29, 208]
-	.loc 1 79 0
-	cmp	x0, 0
-	ldr	x0, [x29, 136]
-	ldr	x1, [x29, 144]
-	cset	w25, ne
-	.loc 1 80 0
-	cmp	x0, 0
-	mov	w0, 3
-	csinc	w0, w0, w25, ne
+.L141:
+	.loc 2 240 0
+	mov	w22, 4
+	b	.L81
+.L105:
+	.loc 2 246 0
+	mov	w2, -1
+	b	.L141
 .LVL169:
-	cmp	x1, 0
-	mov	w1, 4
-	csel	w0, w0, w1, eq
+.L70:
+	.loc 2 259 0
+	mov	x2, x20
+	mov	x1, x21
+	add	x0, x29, 200
+	bl	judge_test_addr
 .LVL170:
-	.loc 1 82 0
-	cbnz	x3, .L187
-	.loc 1 83 0
-	mov	w25, w0
+	mov	w28, w0
 .LVL171:
-.L115:
-.LBE61:
-.LBE60:
-	.loc 1 344 0
-	ldr	x0, [x29, 216]
-	cbz	x0, .L121
-	.loc 1 345 0
-	bl	set_vdd_logic
+	.loc 2 260 0
+	cbz	w0, .L106
+	.loc 2 263 0
+	ldr	x0, [x29, 184]
 .LVL172:
-.L121:
-	.loc 1 349 0
-	adrp	x27, .LC30
+	bl	set_ddr_freq
 .LVL173:
-	mov	w26, 0
-	add	x27, x27, :lo12:.LC30
-	b	.L129
-.LVL174:
-.L99:
-	.loc 1 259 0
-	ldr	x0, [x29, 208]
-	cbz	x0, .L105
-	.loc 1 260 0
+	.loc 2 265 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L86
+	.loc 2 266 0
 	bl	set_vdd_logic
+.LVL174:
+.L86:
+	.loc 2 270 0
+	adrp	x27, .LC22
 .LVL175:
-.L105:
-	.loc 1 261 0
-	cmp	w22, 5
-	bne	.L106
-	.loc 1 262 0
-	ldr	x1, [x29, 152]
-	mov	x0, 65535
-	movk	x0, 0x9f, lsl 16
-	cmp	x1, x0
-	bhi	.L107
-	.loc 1 263 0
-	lsr	x2, x1, 20
-	adrp	x0, .LC26
-	mov	w1, 10
-	add	x0, x0, :lo12:.LC26
-	bl	printf
-.LVL176:
-.L106:
-	.loc 1 284 0
-	adrp	x28, .LC28
-	add	x28, x28, :lo12:.LC28
-	.loc 1 280 0
-	adrp	x27, .LC27
-.LVL177:
-	.loc 1 288 0
 	mov	w26, 0
-	.loc 1 280 0
-	add	x0, x27, :lo12:.LC27
-	str	x0, [x29, 96]
-.LVL178:
-.L113:
-	.loc 1 278 0
-	ldr	x0, [x29, 200]
-	cbz	x0, .L114
-	.loc 1 278 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bls	.L97
-.L114:
-	.loc 1 280 0 is_stmt 1
-	ldr	x0, [x29, 96]
-	.loc 1 279 0
+	add	x0, x27, :lo12:.LC22
+	str	x0, [x29, 104]
+	b	.L94
+.LVL176:
+.L95:
+	ldr	x0, [x29, 104]
+	.loc 2 269 0
 	add	w26, w26, 1
-.LVL179:
-	.loc 1 280 0
+.LVL177:
+	.loc 2 270 0
 	mov	w1, w26
-	mov	x25, 0
+	.loc 2 271 0
+	mov	x27, 0
+	.loc 2 270 0
 	bl	printf
+.LVL178:
+.L87:
+	.loc 2 271 0 discriminator 1
+	cmp	w28, w27
+	bhi	.L93
+	mov	w0, 0
+	mov	w19, 0
+.LVL179:
+.L92:
+	.loc 2 297 0
+	orr	w0, w19, w0
 .LVL180:
-.L111:
-	.loc 1 282 0
-	ldr	x22, [x20, x25, lsl 3]
-	cbz	x22, .L108
-	.loc 1 284 0
-	ldr	x19, [x21, x25, lsl 3]
-	mov	x2, x22
-	mov	w1, w25
-	mov	x0, x28
-	mov	x3, x19
-	bl	printf
+	cbnz	w0, .L83
 .LVL181:
-	.loc 1 287 0
-	mov	x1, x19
-	mov	x0, x22
-	bl	random_test
+.L94:
+	.loc 2 268 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L95
+	.loc 2 268 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bhi	.L95
+	b	.L67
 .LVL182:
-	mov	w24, w0
+.L93:
+	.loc 2 278 0 is_stmt 1
+	ldr	x1, [x20, x27, lsl 3]
+	.loc 2 272 0
+	cmp	w25, 3
+	.loc 2 278 0
+	ldr	x0, [x21, x27, lsl 3]
+	.loc 2 272 0
+	beq	.L89
+	cmp	w25, 4
+	beq	.L90
+	.loc 2 274 0
+	bl	random_test
 .LVL183:
-	.loc 1 289 0
-	cbnz	w0, .L137
-	.loc 1 290 0
-	mov	x1, x19
-	mov	x0, x22
+.L142:
+	.loc 2 282 0
+	mov	w19, w0
 .LVL184:
-	bl	crosstalk
+	.loc 2 290 0
+	bl	ctrlc
 .LVL185:
-	.loc 1 294 0
-	cbnz	w0, .L138
-	.loc 1 295 0
-	mov	x1, x19
-	mov	x0, x22
+	cbnz	w0, .L107
+	add	x27, x27, 1
 .LVL186:
-	bl	diagonalscan
+	mov	w22, w25
+	.loc 2 294 0
+	cbz	w19, .L87
 .LVL187:
-	mov	w27, w0
+	mov	w22, w25
 .LVL188:
-	.loc 1 299 0
-	cbz	w0, .L110
-	.loc 1 295 0
-	mov	w24, w0
-	mov	w27, 0
+	b	.L92
 .LVL189:
-.L190:
-	.loc 1 319 0
-	mov	w19, 4
-	b	.L109
+.L89:
+	.loc 2 278 0
+	bl	crosstalk
 .LVL190:
-.L107:
-	.loc 1 266 0
-	mov	x0, 10485760
-	.loc 1 268 0
-	stp	xzr, xzr, [x29, 128]
-	.loc 1 266 0
-	stp	xzr, x0, [x29, 144]
+	b	.L142
+.L90:
+	.loc 2 282 0
+	bl	diagonalscan
 .LVL191:
-	.loc 1 269 0
-	stp	xzr, xzr, [x29, 160]
+	b	.L142
 .LVL192:
-	str	xzr, [x29, 176]
+.L107:
+	mov	w22, w25
+	.loc 2 291 0
+	mov	w0, -1
+	b	.L92
 .LVL193:
-	b	.L106
+.L106:
+	.loc 2 261 0
+	mov	w23, 1
+	b	.L58
 .LVL194:
-.L137:
-	mov	w27, 0
-.L189:
-	.loc 1 309 0
-	mov	w19, 2
-	b	.L109
+.L60:
+	.loc 2 132 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w19, sxtw]
+	cmp	w26, w0
+	blt	.L96
+	sub	w26, w26, #2
 .LVL195:
-.L138:
-	.loc 1 290 0
-	mov	w24, w0
-	mov	w27, 0
-.L191:
-	.loc 1 314 0
-	mov	w19, 3
-	b	.L109
+	.loc 2 132 0 is_stmt 0 discriminator 1
+	mov	x28, 0
+	lsl	x26, x26, 3
 .LVL196:
-.L139:
-	.loc 1 312 0
-	mov	w24, w0
-	mov	w27, 0
-	b	.L191
+.L63:
+	.loc 2 137 0 is_stmt 1 discriminator 1
+	cmp	x26, x28
+	bne	.L64
+	.loc 2 153 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	bl	printf
 .LVL197:
-.L141:
-	.loc 1 325 0
-	mov	w27, -1
-	b	.L190
+	.loc 2 157 0
+	bl	data_cpu_2_io_init
 .LVL198:
-.L187:
-.LBB64:
-.LBB62:
-	.loc 1 86 0
-	ldr	x4, [x29, 200]
-	.loc 1 87 0
-	mov	x1, 0
-	mov	w25, 0
-	.loc 1 88 0
-	mov	w6, 1
-	.loc 1 87 0
-	add	x5, x3, x4
+	.loc 2 159 0
+	cbnz	w25, .L65
+	.loc 2 161 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L66
+	.loc 2 162 0
+	bl	set_vdd_logic
 .LVL199:
-.L117:
-	.loc 1 86 0
-	ldr	x2, [x20, x1, lsl 3]
-	cmp	x4, x2
-	bcc	.L116
-	.loc 1 87 0
-	ldr	x7, [x21, x1, lsl 3]
-	add	x2, x2, x7
-	.loc 1 88 0
-	cmp	x5, x2
-	csel	w25, w25, w6, hi
+.L66:
+	.loc 2 163 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL200:
-.L116:
-	add	x1, x1, 1
-.LVL201:
-	.loc 1 85 0
-	cmp	w0, w1
-	bhi	.L117
-	.loc 1 89 0
-	cbnz	w25, .L118
-	.loc 1 90 0
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+.L67:
+	.loc 2 305 0
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
-.LVL202:
-.L119:
-.LBE62:
-.LBE64:
-	.loc 1 339 0
-	cbnz	w25, .L115
-	.loc 1 340 0
-	mov	w23, 1
-	b	.L81
-.LVL203:
-.L118:
-.LBB65:
-.LBB63:
-	.loc 1 92 0
-	str	x4, [x29, 120]
-	.loc 1 94 0
-	cmp	w0, 1
-	.loc 1 93 0
-	str	x3, [x29, 152]
-.LVL204:
-	.loc 1 94 0
-	beq	.L119
-	.loc 1 95 0
-	str	xzr, [x29, 128]
-	.loc 1 94 0
-	cmp	w0, 2
-	.loc 1 96 0
-	str	xzr, [x29, 160]
-.LVL205:
-	.loc 1 94 0
-	beq	.L119
-	.loc 1 95 0
-	str	xzr, [x29, 136]
-	.loc 1 94 0
-	cmp	w0, 4
-	.loc 1 96 0
-	str	xzr, [x29, 168]
-.LVL206:
-	.loc 1 94 0
-	bne	.L119
-	.loc 1 95 0
-	str	xzr, [x29, 144]
-	.loc 1 96 0
-	str	xzr, [x29, 176]
-.LVL207:
-	b	.L119
-.LVL208:
-.L130:
-.LBE63:
-.LBE65:
-	.loc 1 350 0
-	mov	x28, 0
-	.loc 1 348 0
-	add	w26, w26, 1
-.LVL209:
-	.loc 1 349 0
-	mov	w1, w26
-	mov	x0, x27
-	bl	printf
-.LVL210:
-.L122:
-	.loc 1 350 0 discriminator 1
-	cmp	w25, w28
-	bhi	.L128
-	mov	w0, 0
-	mov	w24, 0
-.LVL211:
-.L127:
-	.loc 1 376 0
-	orr	w0, w24, w0
-.LVL212:
-	cbnz	w0, .L112
-.LVL213:
-.L129:
-	.loc 1 347 0
-	ldr	x0, [x29, 192]
-	cbz	x0, .L130
-	.loc 1 347 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bhi	.L130
-	b	.L97
-.LVL214:
-.L128:
-	.loc 1 357 0 is_stmt 1
-	ldr	x1, [x21, x28, lsl 3]
-	.loc 1 351 0
-	cmp	w22, 3
-	.loc 1 357 0
-	ldr	x0, [x20, x28, lsl 3]
-	.loc 1 351 0
-	beq	.L124
-	cmp	w22, 4
-	beq	.L125
-	.loc 1 353 0
-	bl	random_test
-.LVL215:
-.L192:
-	.loc 1 361 0
-	mov	w24, w0
-.LVL216:
-	.loc 1 369 0
-	bl	ctrlc
-.LVL217:
-	cbnz	w0, .L144
-	add	x28, x28, 1
-.LVL218:
-	mov	w19, w22
-	.loc 1 373 0
-	cbz	w24, .L122
-.LVL219:
-	mov	w19, w22
-.LVL220:
-	b	.L127
-.LVL221:
-.L124:
-	.loc 1 357 0
-	bl	crosstalk
-.LVL222:
-	b	.L192
-.L125:
-	.loc 1 361 0
-	bl	diagonalscan
-.LVL223:
-	b	.L192
-.LVL224:
-.L144:
-	mov	w19, w22
-	.loc 1 370 0
-	mov	w0, -1
-	b	.L127
-.LVL225:
-.L90:
-	.loc 1 220 0
-	adrp	x0, .LANCHOR3
-	add	x0, x0, :lo12:.LANCHOR3
-	ldrb	w0, [x0, w25, sxtw]
-	cmp	w26, w0
-	blt	.L131
-	sub	w26, w26, #2
-.LVL226:
-	.loc 1 220 0 is_stmt 0 discriminator 1
-	mov	x28, 0
-	lsl	x26, x26, 3
-.LVL227:
-.L93:
-	.loc 1 225 0 is_stmt 1 discriminator 1
-	cmp	x28, x26
-	bne	.L94
-	.loc 1 232 0
-	ldp	x2, x3, [x29, 184]
-	mov	w1, w22
-	ldp	x4, x5, [x29, 200]
-	adrp	x0, .LC24
-	ldr	x6, [x29, 216]
-	add	x0, x0, :lo12:.LC24
-	bl	printf
-.LVL228:
-	.loc 1 244 0
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
-	bl	printf
-.LVL229:
-	.loc 1 247 0
-	cbnz	w22, .L95
-	.loc 1 249 0
-	ldr	x0, [x29, 192]
-.L197:
-	.loc 1 254 0
-	cbz	x0, .L97
-	.loc 1 255 0
-	bl	set_vdd_logic
-.LVL230:
-.L97:
-	.loc 1 384 0
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
-	bl	printf
-.LVL231:
-	b	.L81
-.LVL232:
-.L110:
-	.loc 1 307 0
-	mov	x1, x19
-	mov	x0, x22
-	bl	random_test
-.LVL233:
-	mov	w24, w0
-.LVL234:
-	.loc 1 311 0
-	cbnz	w0, .L189
-	.loc 1 312 0
-	mov	x1, x19
-	mov	x0, x22
-.LVL235:
-	bl	crosstalk
-.LVL236:
-	mov	w27, w0
-.LVL237:
-	.loc 1 316 0
-	cbnz	w0, .L139
-	.loc 1 317 0
-	mov	x1, x19
-	mov	x0, x22
-.LVL238:
-	bl	diagonalscan
-.LVL239:
-	mov	w24, w0
-.LVL240:
-	.loc 1 322 0
-	cbnz	w0, .L190
-	.loc 1 324 0
-	bl	ctrlc
-.LVL241:
-	cbnz	w0, .L141
-	.loc 1 319 0
-	mov	w19, 4
-.LVL242:
-.L108:
-	add	x25, x25, 1
-.LVL243:
-	.loc 1 281 0 discriminator 2
-	cmp	x25, 4
-	bne	.L111
-	mov	w27, 0
-	mov	w24, 0
-.LVL244:
-.L109:
-	.loc 1 329 0
-	orr	w2, w24, w27
-	cbz	w2, .L113
-.LVL245:
-.L112:
-	.loc 1 381 0
-	cbz	w24, .L97
-	.loc 1 382 0
-	ldr	x0, [x29, 104]
-	add	x24, x0, :lo12:.LANCHOR2
-.LVL246:
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
-	ldr	x1, [x24, w19, sxtw 3]
-	bl	printf
-.LVL247:
-.L81:
-	.loc 1 387 0
-	mov	w0, w23
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 224
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
+.LVL201:
+	b	.L58
 	.cfi_endproc
-.LFE259:
+.LFE257:
 	.size	do_ddr_test, .-do_ddr_test
-	.section	.text.print_memory,"ax",@progbits
-	.align	2
-	.global	print_memory
-	.type	print_memory, %function
-print_memory:
-.LFB279:
-	.loc 3 81 0
-	.cfi_startproc
-.LVL248:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	mov	x20, x0
-.LVL249:
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 86 0
-	adrp	x21, .LC34
-	.loc 3 85 0
-	lsr	x22, x1, 2
-	.loc 3 86 0
-	add	x21, x21, :lo12:.LC34
-	.loc 3 85 0
-	mov	w19, 0
-.LVL250:
-.L199:
-	.loc 3 85 0 is_stmt 0 discriminator 1
-	uxtw	x1, w19
-	cmp	x1, x22
-	bcc	.L200
-	.loc 3 89 0 is_stmt 1
-	ldp	x19, x20, [sp, 16]
-.LVL251:
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL252:
-.L200:
-	.cfi_restore_state
-	.loc 3 87 0 discriminator 3
-	add	w3, w19, 3
-	add	w2, w19, 2
-	add	w0, w19, 1
-	lsl	x1, x1, 2
-	.loc 3 85 0 discriminator 3
-	add	w19, w19, 4
-.LVL253:
-	.loc 3 86 0 discriminator 3
-	ldr	w5, [x20, x3, lsl 2]
-	ldr	w4, [x20, x2, lsl 2]
-	ldr	w3, [x20, x0, lsl 2]
-	mov	x0, x21
-	ldr	w2, [x20, x1]
-	add	x1, x20, x1
-	bl	printf
-.LVL254:
-	b	.L199
-	.cfi_endproc
-.LFE279:
-	.size	print_memory, .-print_memory
 	.global	_u_boot_list_2_cmd_2_ddr_test
 	.section	.rodata
 	.align	3
@@ -1894,54 +1396,45 @@ print_memory:
 	.word	267448335
 	.word	0
 	.word	-1
-	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
-.LC12:
-	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
-.LC13:
+.LC1:
 	.string	"\nbitflip:   \n"
-.LC14:
+.LC2:
 	.string	"\b\b\b%3u"
-.LC15:
+.LC3:
 	.string	"%3u\b\b\b"
-.LC16:
+.LC4:
 	.string	"\nISI:\n"
-.LC17:
+.LC5:
 	.string	"malloc %lu byte fail\n"
 	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
-.LC18:
+.LC6:
 	.string	"\nDiagonalScan\n"
+.LC7:
+	.string	"get page size fail:0x%x\n"
 	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"ddr tester version 1.0.1\n"
+.LC17:
+	.string	"test parameters error\n"
+.LC18:
+	.string	"test pattern error\n"
 .LC19:
-	.string	"available memory for test:\n"
+	.string	"rockchip DMC didn't enable,can't change freq and freq scanning\n"
 .LC20:
-	.string	"\tstart\t\t end\tlength\n"
+	.string	"\rtimes:%08u:\n"
 .LC21:
-	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
 .LC22:
-	.string	"test parameters error\n"
+	.string	"\rtimes:%08u, "
 .LC23:
-	.string	"test pattern error\n"
+	.string	"\n%s test fail\n"
 .LC24:
-	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+	.string	"\ntest pass\n"
 .LC25:
-	.string	"rockchip DMC didn't enable, can't change freq and freq scanning\n"
+	.string	"test pattern unsupported\n"
 .LC26:
 	.string	"fasttest need %uMB, but actually only %luMB\n"
-.LC27:
-	.string	"\rtimes:%08u:\n"
-.LC28:
-	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
-.LC29:
-	.string	"Invalid test address\n"
-.LC30:
-	.string	"\rtimes:%08u, "
-.LC31:
-	.string	"\n%s test fail\n"
-.LC32:
-	.string	"\ntest pass\n"
-.LC33:
-	.string	"test pattern unsupported\n"
 	.section	.rodata.g_isi_pattern,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -1980,39 +1473,29 @@ g_isi_pattern:
 	.word	0
 	.word	0
 	.word	0
-	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
-.LC34:
-	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
 	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
-.LC4:
+.LC8:
 	.string	"%u"
-.LC5:
+.LC9:
 	.string	"\b"
-.LC6:
+.LC10:
 	.string	" "
-.LC7:
+.LC11:
 	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
-.LC8:
+.LC12:
 	.string	"%4lu"
-.LC9:
+.LC13:
 	.string	"\b\b\b\b"
-.LC10:
+.LC14:
 	.string	"    "
-.LC11:
+.LC15:
 	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
-	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
-.LC1:
-	.string	"vdd_logic"
-.LC2:
-	.string	"Cannot set regulator name\n"
-.LC3:
-	.string	"set vdd_logic fail\n"
 	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC35:
+.LC27:
 	.string	"ddr_test"
-.LC36:
+.LC28:
 	.string	"for dram simple test\n"
-.LC37:
+.LC29:
 	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
 	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
 	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
@@ -2035,19 +1518,19 @@ g_isi_pattern:
 	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
 	.ascii	"start from"
 	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
-.LC38:
+.LC30:
 	.string	"changefreq"
-.LC39:
+.LC31:
 	.string	"scanfreq"
-.LC40:
+.LC32:
 	.string	"random"
-.LC41:
+.LC33:
 	.string	"crosstalk"
-.LC42:
+.LC34:
 	.string	"diagonalscan"
-.LC43:
+.LC35:
 	.string	"fast_test"
-.LC44:
+.LC36:
 	.string	"full_test"
 	.section	.rodata.test_pat_param,"a",@progbits
 	.align	3
@@ -2068,44 +1551,45 @@ test_pat_param:
 	.type	test_pattern, %object
 	.size	test_pattern, 56
 test_pattern:
-	.xword	.LC38
-	.xword	.LC39
-	.xword	.LC40
-	.xword	.LC41
-	.xword	.LC42
-	.xword	.LC43
-	.xword	.LC44
+	.xword	.LC30
+	.xword	.LC31
+	.xword	.LC32
+	.xword	.LC33
+	.xword	.LC34
+	.xword	.LC35
+	.xword	.LC36
 	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_cmd_2_ddr_test, %object
 	.size	_u_boot_list_2_cmd_2_ddr_test, 48
 _u_boot_list_2_cmd_2_ddr_test:
-	.8byte	.LC35
+	.8byte	.LC27
 	.word	7
 	.word	1
 	.8byte	do_ddr_test
-	.8byte	.LC36
-	.8byte	.LC37
+	.8byte	.LC28
+	.8byte	.LC29
 	.8byte	0
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/dm/device.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/linux/list.h"
-	.file 15 "include/part.h"
-	.file 16 "include/flash.h"
-	.file 17 "include/lmb.h"
-	.file 18 "include/asm-generic/u-boot.h"
-	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 20 "include/command.h"
-	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 22 "include/libfdt_env.h"
+	.file 5 "include/common.h"
+	.file 6 "./arch/arm/include/asm/types.h"
+	.file 7 "include/linux/types.h"
+	.file 8 "include/errno.h"
+	.file 9 "include/linux/string.h"
+	.file 10 "include/efi.h"
+	.file 11 "include/dm/device.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/linux/list.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/command.h"
+	.file 20 "include/linux/libfdt_env.h"
+	.file 21 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/linux/libfdt.h"
 	.file 23 "include/image.h"
 	.file 24 "include/dm/uclass-id.h"
 	.file 25 "./arch/arm/include/asm/global_data.h"
@@ -2119,26 +1603,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 33 "include/console.h"
 	.file 34 "include/log.h"
 	.file 35 "include/stdio.h"
-	.file 36 "include/vsprintf.h"
-	.file 37 "include/power/regulator.h"
-	.file 38 "include/linux/delay.h"
+	.file 36 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 37 "cmd/ddr_tool/../memtester/io_map.h"
+	.file 38 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
+	.file 39 "include/vsprintf.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x28ec
+	.4byte	0x24cb
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF468
+	.4byte	.LASF461
 	.byte	0xc
-	.4byte	.LASF469
-	.4byte	.LASF470
-	.4byte	.Ldebug_ranges0+0x190
+	.4byte	.LASF462
+	.4byte	.LASF463
+	.4byte	.Ldebug_ranges0+0x90
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x5
 	.byte	0xd
 	.4byte	0x34
 	.uleb128 0x3
@@ -2157,7 +1642,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF2
 	.uleb128 0x5
 	.4byte	.LASF21
-	.byte	0x9
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x59
 	.uleb128 0x6
@@ -2170,7 +1655,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF3
 	.uleb128 0x2
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x34
 	.uleb128 0x3
@@ -2179,7 +1664,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF6
 	.uleb128 0x2
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x6
 	.byte	0x12
 	.4byte	0x84
 	.uleb128 0x3
@@ -2196,26 +1681,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF10
 	.uleb128 0x7
 	.string	"u8"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x1f
 	.4byte	0x34
 	.uleb128 0x8
 	.4byte	0x99
 	.uleb128 0x7
 	.string	"u32"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x25
 	.4byte	0x84
 	.uleb128 0x4
 	.4byte	0xa8
 	.uleb128 0x2
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x6
 	.byte	0x31
 	.4byte	0x92
 	.uleb128 0x2
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x6
 	.byte	0x32
 	.4byte	0x92
 	.uleb128 0x3
@@ -2244,252 +1729,245 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.uleb128 0x2
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x7
 	.byte	0x59
 	.4byte	0x47
 	.uleb128 0x2
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x7
 	.byte	0x5b
 	.4byte	0x3b
 	.uleb128 0x2
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x7
 	.byte	0x69
 	.4byte	0x67
 	.uleb128 0x2
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x7
 	.byte	0x6b
 	.4byte	0x79
 	.uleb128 0x2
 	.4byte	.LASF20
-	.byte	0x8
+	.byte	0x7
 	.byte	0x97
 	.4byte	0x79
 	.uleb128 0xa
 	.byte	0x8
 	.uleb128 0x5
 	.4byte	.LASF22
-	.byte	0xa
+	.byte	0x9
 	.byte	0xb
 	.4byte	0xf3
-	.uleb128 0xb
-	.4byte	0x99
-	.4byte	0x152
-	.uleb128 0xc
-	.4byte	0xce
-	.byte	0xf
-	.byte	0
 	.uleb128 0x3
 	.byte	0x1
 	.byte	0x2
 	.4byte	.LASF23
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x164
-	.uleb128 0xd
+	.4byte	0x154
+	.uleb128 0xc
 	.byte	0
-	.uleb128 0xe
+	.uleb128 0xd
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x140
-	.4byte	0x159
-	.uleb128 0xe
+	.4byte	0x149
+	.uleb128 0xd
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
-	.4byte	0x159
-	.uleb128 0xe
+	.4byte	0x149
+	.uleb128 0xd
 	.4byte	.LASF26
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
-	.4byte	0x159
-	.uleb128 0xf
+	.4byte	0x149
+	.uleb128 0xe
 	.4byte	.LASF45
 	.byte	0xa0
-	.byte	0xc
+	.byte	0xb
 	.byte	0x80
-	.4byte	0x26d
-	.uleb128 0x10
+	.4byte	0x25d
+	.uleb128 0xf
 	.4byte	.LASF27
-	.byte	0xc
+	.byte	0xb
 	.byte	0x81
-	.4byte	0x14f9
+	.4byte	0x14f5
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0x82
 	.4byte	0xd5
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF29
-	.byte	0xc
+	.byte	0xb
 	.byte	0x83
 	.4byte	0x135
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF30
-	.byte	0xc
+	.byte	0xb
 	.byte	0x84
 	.4byte	0x135
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF31
-	.byte	0xc
+	.byte	0xb
 	.byte	0x85
 	.4byte	0x135
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF32
-	.byte	0xc
+	.byte	0xb
 	.byte	0x86
-	.4byte	0x14c4
+	.4byte	0x14c0
 	.byte	0x28
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF33
-	.byte	0xc
+	.byte	0xb
 	.byte	0x87
 	.4byte	0x109
 	.byte	0x30
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF34
-	.byte	0xc
+	.byte	0xb
 	.byte	0x88
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0x38
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF35
-	.byte	0xc
+	.byte	0xb
 	.byte	0x89
 	.4byte	0x135
 	.byte	0x40
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF36
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8a
-	.4byte	0x153c
+	.4byte	0x1538
 	.byte	0x48
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF37
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8b
 	.4byte	0x135
 	.byte	0x50
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF38
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8c
 	.4byte	0x135
 	.byte	0x58
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF39
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8d
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x60
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF40
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8e
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x70
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF41
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8f
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x80
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0x90
 	.4byte	0x11f
 	.byte	0x90
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF43
-	.byte	0xc
+	.byte	0xb
 	.byte	0x91
 	.4byte	0x59
 	.byte	0x94
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"seq"
-	.byte	0xc
+	.byte	0xb
 	.byte	0x92
 	.4byte	0x59
 	.byte	0x98
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x188
+	.4byte	0x178
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x279
-	.uleb128 0x12
+	.4byte	0x269
+	.uleb128 0x11
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x285
-	.uleb128 0xd
+	.4byte	0x275
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF44
-	.byte	0xd
+	.byte	0xc
 	.byte	0x10
-	.4byte	0x27a
+	.4byte	0x26a
 	.uleb128 0xb
 	.4byte	0x34
-	.4byte	0x2a0
-	.uleb128 0xc
+	.4byte	0x290
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF46
 	.byte	0x10
-	.byte	0xe
+	.byte	0xd
 	.byte	0x16
-	.4byte	0x2c5
-	.uleb128 0x10
+	.4byte	0x2b5
+	.uleb128 0xf
 	.4byte	.LASF47
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
-	.4byte	0x2c5
+	.4byte	0x2b5
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF48
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
-	.4byte	0x2c5
+	.4byte	0x2b5
 	.byte	0x8
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x2a0
-	.uleb128 0xf
+	.4byte	0x290
+	.uleb128 0xe
 	.4byte	.LASF49
 	.byte	0x10
+	.byte	0xe
 	.byte	0xf
-	.byte	0xf
-	.4byte	0x2f0
-	.uleb128 0x10
+	.4byte	0x2e0
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xf
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF50
-	.byte	0xf
+	.byte	0xe
 	.byte	0x11
-	.4byte	0x309
+	.4byte	0x2f9
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x2cb
+	.4byte	0x2bb
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x309
+	.4byte	0x2f9
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
@@ -2497,451 +1975,451 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x2f5
+	.4byte	0x2e5
 	.uleb128 0xb
-	.4byte	0x2f0
-	.4byte	0x31a
-	.uleb128 0xd
+	.4byte	0x2e0
+	.4byte	0x30a
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x30f
+	.4byte	0x2ff
 	.uleb128 0x5
 	.4byte	.LASF49
-	.byte	0xf
+	.byte	0xe
 	.byte	0xce
-	.4byte	0x31a
+	.4byte	0x30a
 	.uleb128 0x15
 	.2byte	0x1218
-	.byte	0x10
+	.byte	0xf
 	.byte	0x13
-	.4byte	0x371
-	.uleb128 0x10
+	.4byte	0x361
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x109
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfe
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x109
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0xf
 	.byte	0x17
-	.4byte	0x371
+	.4byte	0x361
 	.byte	0x18
 	.uleb128 0x16
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0xf
 	.byte	0x18
-	.4byte	0x382
+	.4byte	0x372
 	.2byte	0x1018
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x382
+	.4byte	0x372
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x29
-	.4byte	0x393
+	.4byte	0x383
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x1ff
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0xf
 	.byte	0x32
-	.4byte	0x32a
+	.4byte	0x31a
 	.uleb128 0xb
-	.4byte	0x393
-	.4byte	0x3a9
-	.uleb128 0xd
+	.4byte	0x383
+	.4byte	0x399
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0xf
 	.byte	0x34
-	.4byte	0x39e
+	.4byte	0x38e
 	.uleb128 0x3
 	.byte	0x10
 	.byte	0x4
 	.4byte	.LASF58
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF59
 	.byte	0x10
-	.byte	0x11
 	.byte	0x10
-	.4byte	0x3e0
-	.uleb128 0x10
+	.byte	0x10
+	.4byte	0x3d0
+	.uleb128 0xf
 	.4byte	.LASF60
-	.byte	0x11
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xb8
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xc3
 	.byte	0x8
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF61
 	.byte	0xa0
-	.byte	0x11
+	.byte	0x10
 	.byte	0x15
-	.4byte	0x411
-	.uleb128 0x11
+	.4byte	0x401
+	.uleb128 0x10
 	.string	"cnt"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3b
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xc3
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF62
-	.byte	0x11
+	.byte	0x10
 	.byte	0x18
-	.4byte	0x411
+	.4byte	0x401
 	.byte	0x10
 	.byte	0
 	.uleb128 0xb
-	.4byte	0x3bb
-	.4byte	0x421
-	.uleb128 0xc
+	.4byte	0x3ab
+	.4byte	0x411
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x8
 	.byte	0
 	.uleb128 0x18
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1b
-	.4byte	0x447
-	.uleb128 0x10
+	.4byte	0x437
+	.uleb128 0xf
 	.4byte	.LASF63
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1c
-	.4byte	0x3e0
+	.4byte	0x3d0
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF64
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1d
-	.4byte	0x3e0
+	.4byte	0x3d0
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x19
 	.string	"lmb"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x20
-	.4byte	0x421
+	.4byte	0x411
 	.uleb128 0x1a
 	.byte	0x10
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5a
-	.4byte	0x473
-	.uleb128 0x10
+	.4byte	0x463
+	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xb8
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xc3
 	.byte	0x8
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF65
 	.byte	0xc8
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1b
-	.4byte	0x564
-	.uleb128 0x10
+	.4byte	0x554
+	.uleb128 0xf
 	.4byte	.LASF66
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3b
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF67
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xc3
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF68
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3b
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF69
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3b
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF70
-	.byte	0x12
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3b
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF71
-	.byte	0x12
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3b
 	.byte	0x28
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF72
-	.byte	0x12
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0x30
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3b
 	.byte	0x38
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x40
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3b
 	.byte	0x48
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x50
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3b
 	.byte	0x58
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x11
 	.byte	0x33
-	.4byte	0x290
+	.4byte	0x280
 	.byte	0x60
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x47
 	.byte	0x66
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3b
 	.byte	0x68
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3b
 	.byte	0x70
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x109
 	.byte	0x78
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF83
-	.byte	0x12
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x109
 	.byte	0x80
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF84
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5d
-	.4byte	0x564
+	.4byte	0x554
 	.byte	0x88
 	.byte	0
 	.uleb128 0xb
-	.4byte	0x452
-	.4byte	0x574
-	.uleb128 0xc
-	.4byte	0xce
+	.4byte	0x442
+	.4byte	0x564
+	.uleb128 0x12
+	.4byte	0xce
 	.byte	0x3
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF85
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5f
-	.4byte	0x473
+	.4byte	0x463
 	.uleb128 0x5
 	.4byte	.LASF86
-	.byte	0x13
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF87
-	.byte	0x13
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF88
-	.byte	0x13
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF89
-	.byte	0x13
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF90
-	.byte	0x13
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF91
-	.byte	0x13
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF92
-	.byte	0x13
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x109
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF93
 	.byte	0x30
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1e
-	.4byte	0x62d
-	.uleb128 0x10
+	.4byte	0x61d
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1f
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x13
 	.byte	0x20
 	.4byte	0x59
 	.byte	0x8
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x13
 	.byte	0x21
 	.4byte	0x59
 	.byte	0xc
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"cmd"
-	.byte	0x14
+	.byte	0x13
 	.byte	0x23
-	.4byte	0x657
+	.4byte	0x647
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x13
 	.byte	0x24
 	.4byte	0xf3
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x13
 	.byte	0x26
 	.4byte	0xf3
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2a
-	.4byte	0x686
+	.4byte	0x676
 	.byte	0x28
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x64b
+	.4byte	0x63b
 	.uleb128 0x14
-	.4byte	0x64b
+	.4byte	0x63b
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
-	.4byte	0x651
+	.4byte	0x641
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x5cc
+	.4byte	0x5bc
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0xf9
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x62d
+	.4byte	0x61d
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x680
+	.4byte	0x670
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
-	.4byte	0x651
+	.4byte	0x641
 	.uleb128 0x14
 	.4byte	0xe0
 	.uleb128 0x14
 	.4byte	0x59
 	.uleb128 0x14
-	.4byte	0x680
+	.4byte	0x670
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0xf3
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x65d
+	.4byte	0x64d
 	.uleb128 0x2
 	.4byte	.LASF99
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2e
-	.4byte	0x5cc
+	.4byte	0x5bc
 	.uleb128 0x1b
 	.4byte	.LASF167
 	.byte	0x4
 	.4byte	0x59
-	.byte	0x14
+	.byte	0x13
 	.byte	0x7a
-	.4byte	0x6ba
+	.4byte	0x6aa
 	.uleb128 0x1c
 	.4byte	.LASF100
 	.byte	0
@@ -2952,92 +2430,92 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF102
 	.sleb128 -1
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0x2
 	.4byte	.LASF103
+	.byte	0x14
+	.byte	0x11
+	.4byte	0x12a
+	.uleb128 0xe
+	.4byte	.LASF104
 	.byte	0x28
 	.byte	0x15
 	.byte	0x39
-	.4byte	0x73f
-	.uleb128 0x10
-	.4byte	.LASF104
+	.4byte	0x73a
+	.uleb128 0xf
+	.4byte	.LASF105
 	.byte	0x15
 	.byte	0x3a
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF105
+	.uleb128 0xf
+	.4byte	.LASF106
 	.byte	0x15
 	.byte	0x3b
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF106
+	.uleb128 0xf
+	.4byte	.LASF107
 	.byte	0x15
 	.byte	0x3c
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF107
+	.uleb128 0xf
+	.4byte	.LASF108
 	.byte	0x15
 	.byte	0x3d
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF108
+	.uleb128 0xf
+	.4byte	.LASF109
 	.byte	0x15
 	.byte	0x3e
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF109
+	.uleb128 0xf
+	.4byte	.LASF110
 	.byte	0x15
 	.byte	0x3f
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF110
+	.uleb128 0xf
+	.4byte	.LASF111
 	.byte	0x15
 	.byte	0x40
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF111
+	.uleb128 0xf
+	.4byte	.LASF112
 	.byte	0x15
 	.byte	0x43
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF112
+	.uleb128 0xf
+	.4byte	.LASF113
 	.byte	0x15
 	.byte	0x46
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF113
+	.uleb128 0xf
+	.4byte	.LASF114
 	.byte	0x15
 	.byte	0x49
-	.4byte	0x750
+	.4byte	0x6aa
 	.byte	0x24
 	.byte	0
-	.uleb128 0x5
-	.4byte	.LASF114
+	.uleb128 0xd
+	.4byte	.LASF115
 	.byte	0x16
-	.byte	0xf
-	.4byte	0x74a
+	.2byte	0x136
+	.4byte	0x746
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x6ba
-	.uleb128 0x2
-	.4byte	.LASF115
-	.byte	0x16
-	.byte	0x12
-	.4byte	0x12a
+	.4byte	0x6b5
 	.uleb128 0x1e
 	.4byte	.LASF116
 	.byte	0x40
 	.byte	0x17
 	.2byte	0x134
-	.4byte	0x805
+	.4byte	0x7f6
 	.uleb128 0x1f
 	.4byte	.LASF117
 	.byte	0x17
@@ -3108,13 +2586,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF128
 	.byte	0x17
 	.2byte	0x140
-	.4byte	0x805
+	.4byte	0x7f6
 	.byte	0x20
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x114
-	.4byte	0x815
-	.uleb128 0xc
+	.4byte	0x806
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
@@ -3122,13 +2600,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF129
 	.byte	0x17
 	.2byte	0x141
-	.4byte	0x75b
+	.4byte	0x74c
 	.uleb128 0x1e
 	.4byte	.LASF130
 	.byte	0x30
 	.byte	0x17
 	.2byte	0x143
-	.4byte	0x8a3
+	.4byte	0x894
 	.uleb128 0x1f
 	.4byte	.LASF54
 	.byte	0x17
@@ -3188,24 +2666,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF137
 	.byte	0x17
 	.2byte	0x149
-	.4byte	0x821
+	.4byte	0x812
 	.uleb128 0x22
 	.4byte	.LASF138
 	.2byte	0x280
 	.byte	0x17
 	.2byte	0x14f
-	.4byte	0xa4c
+	.4byte	0xa3d
 	.uleb128 0x1f
 	.4byte	.LASF139
 	.byte	0x17
 	.2byte	0x155
-	.4byte	0xa4c
+	.4byte	0xa3d
 	.byte	0
 	.uleb128 0x1f
 	.4byte	.LASF140
 	.byte	0x17
 	.2byte	0x156
-	.4byte	0x815
+	.4byte	0x806
 	.byte	0x8
 	.uleb128 0x1f
 	.4byte	.LASF141
@@ -3295,7 +2773,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"os"
 	.byte	0x17
 	.2byte	0x16e
-	.4byte	0x8a3
+	.4byte	0x894
 	.byte	0xb8
 	.uleb128 0x21
 	.string	"ep"
@@ -3355,7 +2833,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"kbd"
 	.byte	0x17
 	.2byte	0x17a
-	.4byte	0xa52
+	.4byte	0xa43
 	.2byte	0x130
 	.uleb128 0x23
 	.4byte	.LASF163
@@ -3373,32 +2851,32 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"lmb"
 	.byte	0x17
 	.2byte	0x18d
-	.4byte	0x421
+	.4byte	0x411
 	.2byte	0x140
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x815
+	.4byte	0x806
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x574
+	.4byte	0x564
 	.uleb128 0x20
 	.4byte	.LASF165
 	.byte	0x17
 	.2byte	0x18f
-	.4byte	0x8af
-	.uleb128 0xe
+	.4byte	0x8a0
+	.uleb128 0xd
 	.4byte	.LASF166
 	.byte	0x17
 	.2byte	0x191
-	.4byte	0xa58
+	.4byte	0xa49
 	.uleb128 0x1b
 	.4byte	.LASF168
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xc85
+	.4byte	0xc7c
 	.uleb128 0x1c
 	.4byte	.LASF169
 	.byte	0
@@ -3654,8 +3132,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1c
 	.4byte	.LASF253
 	.byte	0x54
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF254
+	.byte	0x55
+	.uleb128 0x1d
+	.4byte	.LASF255
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x25
@@ -3663,469 +3144,475 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0x22
 	.byte	0xe0
-	.4byte	0xc98
+	.4byte	0xc8f
 	.uleb128 0x1c
-	.4byte	.LASF255
+	.4byte	.LASF256
 	.byte	0x5
 	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF256
+	.uleb128 0xe
+	.4byte	.LASF257
 	.byte	0x40
 	.byte	0x19
 	.byte	0xc
-	.4byte	0xd11
-	.uleb128 0x10
-	.4byte	.LASF257
+	.4byte	0xd08
+	.uleb128 0xf
+	.4byte	.LASF258
 	.byte	0x19
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"tbu"
 	.byte	0x19
 	.byte	0x23
 	.4byte	0x84
 	.byte	0x8
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"tbl"
 	.byte	0x19
 	.byte	0x24
 	.4byte	0x84
 	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF258
+	.uleb128 0xf
+	.4byte	.LASF259
 	.byte	0x19
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF259
+	.uleb128 0xf
+	.4byte	.LASF260
 	.byte	0x19
 	.byte	0x26
 	.4byte	0x92
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF260
+	.uleb128 0xf
+	.4byte	.LASF261
 	.byte	0x19
 	.byte	0x28
 	.4byte	0x3b
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF261
+	.uleb128 0xf
+	.4byte	.LASF262
 	.byte	0x19
 	.byte	0x29
 	.4byte	0x3b
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF262
+	.uleb128 0xf
+	.4byte	.LASF263
 	.byte	0x19
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF263
+	.uleb128 0xf
+	.4byte	.LASF264
 	.byte	0x19
 	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x38
 	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF264
+	.uleb128 0xe
+	.4byte	.LASF265
 	.byte	0x18
 	.byte	0x1a
 	.byte	0x22
-	.4byte	0xd4d
-	.uleb128 0x10
-	.4byte	.LASF265
+	.4byte	0xd44
+	.uleb128 0xf
+	.4byte	.LASF266
 	.byte	0x1a
 	.byte	0x23
 	.4byte	0xa8
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"id"
 	.byte	0x1a
 	.byte	0x24
 	.4byte	0xa8
 	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF266
+	.uleb128 0xf
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x25
 	.4byte	0xa8
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF267
+	.uleb128 0xf
+	.4byte	.LASF268
 	.byte	0x1a
 	.byte	0x26
 	.4byte	0x109
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF268
-	.2byte	0x198
+	.4byte	.LASF269
+	.2byte	0x1a0
 	.byte	0x1a
 	.byte	0x29
-	.4byte	0xf38
-	.uleb128 0x11
+	.4byte	0xf3c
+	.uleb128 0x10
 	.string	"bd"
 	.byte	0x1a
 	.byte	0x2a
-	.4byte	0xa52
+	.4byte	0xa43
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x1a
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF266
+	.uleb128 0xf
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x2c
 	.4byte	0x84
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF269
+	.uleb128 0xf
+	.4byte	.LASF270
 	.byte	0x1a
 	.byte	0x2d
 	.4byte	0x3b
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF270
+	.uleb128 0xf
+	.4byte	.LASF271
 	.byte	0x1a
 	.byte	0x2e
 	.4byte	0x3b
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF271
+	.uleb128 0xf
+	.4byte	.LASF272
 	.byte	0x1a
 	.byte	0x30
 	.4byte	0x3b
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF272
+	.uleb128 0xf
+	.4byte	.LASF273
 	.byte	0x1a
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF273
+	.uleb128 0xf
+	.4byte	.LASF274
 	.byte	0x1a
 	.byte	0x33
 	.4byte	0x3b
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF274
+	.uleb128 0xf
+	.4byte	.LASF275
 	.byte	0x1a
 	.byte	0x3d
 	.4byte	0x3b
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF275
+	.uleb128 0xf
+	.4byte	.LASF276
 	.byte	0x1a
 	.byte	0x41
 	.4byte	0x3b
 	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF276
+	.uleb128 0xf
+	.4byte	.LASF277
 	.byte	0x1a
 	.byte	0x42
 	.4byte	0x3b
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF277
+	.uleb128 0xf
+	.4byte	.LASF278
 	.byte	0x1a
 	.byte	0x44
 	.4byte	0x3b
 	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF278
+	.uleb128 0xf
+	.4byte	.LASF279
 	.byte	0x1a
 	.byte	0x45
 	.4byte	0x3b
 	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF279
+	.uleb128 0xf
+	.4byte	.LASF280
 	.byte	0x1a
 	.byte	0x46
 	.4byte	0xc3
 	.byte	0x68
-	.uleb128 0x10
-	.4byte	.LASF280
+	.uleb128 0xf
+	.4byte	.LASF281
 	.byte	0x1a
 	.byte	0x47
 	.4byte	0x3b
 	.byte	0x70
-	.uleb128 0x10
-	.4byte	.LASF281
+	.uleb128 0xf
+	.4byte	.LASF282
 	.byte	0x1a
 	.byte	0x48
 	.4byte	0x3b
 	.byte	0x78
-	.uleb128 0x10
-	.4byte	.LASF282
+	.uleb128 0xf
+	.4byte	.LASF283
 	.byte	0x1a
 	.byte	0x49
 	.4byte	0x3b
 	.byte	0x80
-	.uleb128 0x10
-	.4byte	.LASF283
+	.uleb128 0xf
+	.4byte	.LASF284
 	.byte	0x1a
 	.byte	0x4a
 	.4byte	0x3b
 	.byte	0x88
-	.uleb128 0x10
-	.4byte	.LASF284
+	.uleb128 0xf
+	.4byte	.LASF285
 	.byte	0x1a
 	.byte	0x4b
-	.4byte	0xf38
+	.4byte	0xf3c
 	.byte	0x90
-	.uleb128 0x10
-	.4byte	.LASF285
+	.uleb128 0xf
+	.4byte	.LASF286
 	.byte	0x1a
 	.byte	0x4e
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0x98
-	.uleb128 0x10
-	.4byte	.LASF286
+	.uleb128 0xf
+	.4byte	.LASF287
 	.byte	0x1a
 	.byte	0x4f
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0xa0
-	.uleb128 0x10
-	.4byte	.LASF287
+	.uleb128 0xf
+	.4byte	.LASF288
 	.byte	0x1a
 	.byte	0x50
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0xa8
-	.uleb128 0x10
-	.4byte	.LASF288
+	.uleb128 0xf
+	.4byte	.LASF289
 	.byte	0x1a
 	.byte	0x56
-	.4byte	0x273
+	.4byte	0x263
 	.byte	0xb8
-	.uleb128 0x10
-	.4byte	.LASF289
+	.uleb128 0xf
+	.4byte	.LASF290
 	.byte	0x1a
 	.byte	0x57
 	.4byte	0x135
 	.byte	0xc0
-	.uleb128 0x10
-	.4byte	.LASF290
+	.uleb128 0xf
+	.4byte	.LASF291
 	.byte	0x1a
 	.byte	0x58
 	.4byte	0x3b
 	.byte	0xc8
-	.uleb128 0x10
-	.4byte	.LASF291
+	.uleb128 0xf
+	.4byte	.LASF292
 	.byte	0x1a
 	.byte	0x5a
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0xd0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"jt"
 	.byte	0x1a
 	.byte	0x5c
-	.4byte	0xfbb
+	.4byte	0xfbf
 	.byte	0xd8
-	.uleb128 0x10
-	.4byte	.LASF292
+	.uleb128 0xf
+	.4byte	.LASF293
 	.byte	0x1a
 	.byte	0x5d
-	.4byte	0xfc1
+	.4byte	0xfc5
 	.byte	0xe0
 	.uleb128 0x16
-	.4byte	.LASF293
+	.4byte	.LASF294
 	.byte	0x1a
 	.byte	0x67
 	.4byte	0x84
 	.2byte	0x100
 	.uleb128 0x16
-	.4byte	.LASF294
+	.4byte	.LASF295
 	.byte	0x1a
 	.byte	0x68
 	.4byte	0x84
 	.2byte	0x104
 	.uleb128 0x16
-	.4byte	.LASF295
+	.4byte	.LASF296
 	.byte	0x1a
 	.byte	0x6a
 	.4byte	0x3b
 	.2byte	0x108
 	.uleb128 0x16
-	.4byte	.LASF296
+	.4byte	.LASF297
 	.byte	0x1a
 	.byte	0x6b
 	.4byte	0x3b
 	.2byte	0x110
 	.uleb128 0x16
-	.4byte	.LASF297
+	.4byte	.LASF298
 	.byte	0x1a
 	.byte	0x6c
 	.4byte	0x3b
 	.2byte	0x118
 	.uleb128 0x16
-	.4byte	.LASF298
+	.4byte	.LASF299
 	.byte	0x1a
 	.byte	0x75
-	.4byte	0x26d
+	.4byte	0x25d
 	.2byte	0x120
 	.uleb128 0x16
 	.4byte	.LASF136
 	.byte	0x1a
 	.byte	0x76
-	.4byte	0xc98
+	.4byte	0xc8f
 	.2byte	0x128
 	.uleb128 0x16
-	.4byte	.LASF299
+	.4byte	.LASF300
 	.byte	0x1a
 	.byte	0x7c
 	.4byte	0x109
 	.2byte	0x168
 	.uleb128 0x16
-	.4byte	.LASF300
+	.4byte	.LASF301
 	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x109
 	.2byte	0x170
 	.uleb128 0x16
-	.4byte	.LASF301
+	.4byte	.LASF302
 	.byte	0x1a
 	.byte	0x83
 	.4byte	0xb8
 	.2byte	0x178
 	.uleb128 0x16
-	.4byte	.LASF302
+	.4byte	.LASF303
 	.byte	0x1a
 	.byte	0x88
-	.4byte	0xd11
+	.4byte	0xd08
 	.2byte	0x180
+	.uleb128 0x16
+	.4byte	.LASF304
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x109
+	.2byte	0x198
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xd4d
-	.uleb128 0xf
-	.4byte	.LASF303
+	.4byte	0xd44
+	.uleb128 0xe
+	.4byte	.LASF305
 	.byte	0x40
 	.byte	0x1b
 	.byte	0x2c
-	.4byte	0xfab
-	.uleb128 0x10
+	.4byte	0xfaf
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
 	.byte	0x2d
 	.4byte	0xd5
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF135
 	.byte	0x1b
 	.byte	0x2e
 	.4byte	0xd5
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF304
+	.uleb128 0xf
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0x2f
-	.4byte	0x143c
+	.4byte	0x143a
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF305
+	.uleb128 0xf
+	.4byte	.LASF307
 	.byte	0x1b
 	.byte	0x30
 	.4byte	0xd5
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF306
+	.uleb128 0xf
+	.4byte	.LASF308
 	.byte	0x1b
 	.byte	0x32
-	.4byte	0x1484
+	.4byte	0x1482
 	.byte	0x20
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF34
 	.byte	0x1b
 	.byte	0x33
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF307
+	.uleb128 0xf
+	.4byte	.LASF309
 	.byte	0x1b
 	.byte	0x34
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF308
+	.uleb128 0xf
+	.4byte	.LASF310
 	.byte	0x1b
 	.byte	0x35
-	.4byte	0xfb0
+	.4byte	0xfb4
 	.byte	0x38
 	.byte	0
 	.uleb128 0x8
-	.4byte	0xf3e
+	.4byte	0xf42
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf3e
+	.4byte	0xf42
 	.uleb128 0x27
-	.4byte	.LASF471
+	.4byte	.LASF464
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfb6
+	.4byte	0xfba
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0xfd1
-	.uleb128 0xc
+	.4byte	0xfd5
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x1a
-	.byte	0x8e
-	.4byte	0xd4d
+	.byte	0x8f
+	.4byte	0xd44
 	.uleb128 0x4
-	.4byte	0xfd1
+	.4byte	0xfd5
 	.uleb128 0x5
-	.4byte	.LASF310
-	.byte	0x6
+	.4byte	.LASF312
+	.byte	0x5
 	.byte	0xab
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0xff7
-	.uleb128 0xd
+	.4byte	0xffb
+	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF311
-	.byte	0x6
+	.4byte	.LASF313
+	.byte	0x5
 	.byte	0xad
-	.4byte	0xfec
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF312
-	.byte	0x6
+	.4byte	.LASF314
+	.byte	0x5
 	.byte	0xae
-	.4byte	0xfec
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF313
-	.byte	0x6
+	.4byte	.LASF315
+	.byte	0x5
 	.byte	0xfc
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF314
-	.byte	0x6
+	.4byte	.LASF316
+	.byte	0x5
 	.byte	0xfd
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF315
-	.byte	0x6
+	.4byte	.LASF317
+	.byte	0x5
 	.byte	0xfe
 	.4byte	0x109
-	.uleb128 0xf
-	.4byte	.LASF316
+	.uleb128 0xe
+	.4byte	.LASF318
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x2e
-	.4byte	0x1047
-	.uleb128 0x10
-	.4byte	.LASF317
+	.4byte	0x104b
+	.uleb128 0xf
+	.4byte	.LASF319
 	.byte	0x1c
 	.byte	0x2f
 	.4byte	0x12a
@@ -4134,79 +3621,79 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0x29
-	.uleb128 0xf
-	.4byte	.LASF318
+	.uleb128 0xe
+	.4byte	.LASF320
 	.byte	0x68
 	.byte	0x1c
 	.byte	0xa6
-	.4byte	0x10ea
-	.uleb128 0x10
+	.4byte	0x10ee
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1c
 	.byte	0xa8
-	.4byte	0x10ea
+	.4byte	0x10ee
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF319
+	.uleb128 0xf
+	.4byte	.LASF321
 	.byte	0x1c
 	.byte	0xa9
-	.4byte	0x290
+	.4byte	0x280
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF320
+	.uleb128 0xf
+	.4byte	.LASF322
 	.byte	0x1c
 	.byte	0xaa
 	.4byte	0xb8
 	.byte	0x18
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF164
 	.byte	0x1c
 	.byte	0xab
 	.4byte	0x59
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF321
+	.uleb128 0xf
+	.4byte	.LASF323
 	.byte	0x1c
 	.byte	0xad
-	.4byte	0x1114
+	.4byte	0x1118
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF322
+	.uleb128 0xf
+	.4byte	.LASF324
 	.byte	0x1c
 	.byte	0xae
-	.4byte	0x1133
+	.4byte	0x1137
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF323
+	.uleb128 0xf
+	.4byte	.LASF325
 	.byte	0x1c
 	.byte	0xaf
-	.4byte	0x1148
+	.4byte	0x114c
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF324
+	.uleb128 0xf
+	.4byte	.LASF326
 	.byte	0x1c
 	.byte	0xb0
-	.4byte	0x1159
+	.4byte	0x115d
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF325
+	.uleb128 0xf
+	.4byte	.LASF327
 	.byte	0x1c
 	.byte	0xb4
-	.4byte	0x1148
+	.4byte	0x114c
 	.byte	0x48
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1c
 	.byte	0xb5
-	.4byte	0x110e
+	.4byte	0x1112
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF326
+	.uleb128 0xf
+	.4byte	.LASF328
 	.byte	0x1c
 	.byte	0xb6
 	.4byte	0x59
 	.byte	0x58
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x1c
 	.byte	0xb7
@@ -4215,30 +3702,30 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x10fa
-	.uleb128 0xc
+	.4byte	0x10fe
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0xf
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0xa52
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x104d
+	.4byte	0x1051
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x10fa
+	.4byte	0x10fe
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1133
+	.4byte	0x1137
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
@@ -4246,434 +3733,429 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x111a
+	.4byte	0x111e
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1148
+	.4byte	0x114c
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1139
+	.4byte	0x113d
 	.uleb128 0x28
-	.4byte	0x1159
+	.4byte	0x115d
 	.uleb128 0x14
-	.4byte	0x110e
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x114e
+	.4byte	0x1152
 	.uleb128 0x5
-	.4byte	.LASF327
+	.4byte	.LASF329
 	.byte	0x1c
 	.byte	0xbd
-	.4byte	0x110e
+	.4byte	0x1112
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0x117a
-	.uleb128 0xc
+	.4byte	0x117e
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF328
+	.uleb128 0xd
+	.4byte	.LASF330
 	.byte	0x1c
 	.2byte	0x1fd
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF329
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF331
 	.byte	0x1c
 	.2byte	0x1fe
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF330
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF332
 	.byte	0x1c
 	.2byte	0x200
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF331
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF333
 	.byte	0x1c
 	.2byte	0x205
-	.4byte	0xfc1
-	.uleb128 0xe
-	.4byte	.LASF332
+	.4byte	0xfc5
+	.uleb128 0xd
+	.4byte	.LASF334
 	.byte	0x1c
 	.2byte	0x206
-	.4byte	0xfc1
+	.4byte	0xfc5
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x11c6
-	.uleb128 0xc
+	.4byte	0x11ca
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3f
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF333
+	.uleb128 0xd
+	.4byte	.LASF335
 	.byte	0x1c
 	.2byte	0x207
-	.4byte	0x11b6
-	.uleb128 0xe
-	.4byte	.LASF334
+	.4byte	0x11ba
+	.uleb128 0xd
+	.4byte	.LASF336
 	.byte	0x1c
 	.2byte	0x209
-	.4byte	0x116a
-	.uleb128 0xe
-	.4byte	.LASF335
+	.4byte	0x116e
+	.uleb128 0xd
+	.4byte	.LASF337
 	.byte	0x1c
 	.2byte	0x20a
-	.4byte	0x116a
-	.uleb128 0xe
-	.4byte	.LASF336
+	.4byte	0x116e
+	.uleb128 0xd
+	.4byte	.LASF338
 	.byte	0x1c
 	.2byte	0x20b
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF337
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF339
 	.byte	0x1c
 	.2byte	0x20c
-	.4byte	0x102e
-	.uleb128 0xe
-	.4byte	.LASF338
+	.4byte	0x1032
+	.uleb128 0xd
+	.4byte	.LASF340
 	.byte	0x1c
 	.2byte	0x20d
-	.4byte	0x1047
+	.4byte	0x104b
 	.uleb128 0xb
-	.4byte	0x1047
-	.4byte	0x121e
-	.uleb128 0xc
+	.4byte	0x104b
+	.4byte	0x1222
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF339
+	.uleb128 0xd
+	.4byte	.LASF341
 	.byte	0x1c
 	.2byte	0x20e
-	.4byte	0x120e
-	.uleb128 0xe
-	.4byte	.LASF340
+	.4byte	0x1212
+	.uleb128 0xd
+	.4byte	.LASF342
 	.byte	0x1c
 	.2byte	0x20f
-	.4byte	0x1047
-	.uleb128 0xe
-	.4byte	.LASF341
+	.4byte	0x104b
+	.uleb128 0xd
+	.4byte	.LASF343
 	.byte	0x1c
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1252
-	.uleb128 0xc
+	.4byte	0x1256
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1242
-	.uleb128 0xe
-	.4byte	.LASF342
+	.4byte	0x1246
+	.uleb128 0xd
+	.4byte	.LASF344
 	.byte	0x1c
 	.2byte	0x211
-	.4byte	0x1252
-	.uleb128 0xe
-	.4byte	.LASF343
+	.4byte	0x1256
+	.uleb128 0xd
+	.4byte	.LASF345
 	.byte	0x1c
 	.2byte	0x212
-	.4byte	0x1252
-	.uleb128 0xe
-	.4byte	.LASF344
+	.4byte	0x1256
+	.uleb128 0xd
+	.4byte	.LASF346
 	.byte	0x1c
 	.2byte	0x216
 	.4byte	0xfe
-	.uleb128 0xe
-	.4byte	.LASF345
+	.uleb128 0xd
+	.4byte	.LASF347
 	.byte	0x1c
 	.2byte	0x217
 	.4byte	0xfe
-	.uleb128 0xe
-	.4byte	.LASF346
+	.uleb128 0xd
+	.4byte	.LASF348
 	.byte	0x1c
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x12a4
+	.4byte	0x12a8
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x3ff
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF347
+	.uleb128 0xd
+	.4byte	.LASF349
 	.byte	0x1c
 	.2byte	0x220
-	.4byte	0x1293
-	.uleb128 0xe
-	.4byte	.LASF348
+	.4byte	0x1297
+	.uleb128 0xd
+	.4byte	.LASF350
 	.byte	0x1c
 	.2byte	0x222
 	.4byte	0xa8
-	.uleb128 0xe
-	.4byte	.LASF349
+	.uleb128 0xd
+	.4byte	.LASF351
 	.byte	0x1c
 	.2byte	0x224
 	.4byte	0xa8
-	.uleb128 0xe
-	.4byte	.LASF350
+	.uleb128 0xd
+	.4byte	.LASF352
 	.byte	0x1c
 	.2byte	0x230
-	.4byte	0x102e
+	.4byte	0x1032
 	.uleb128 0x29
-	.4byte	.LASF351
+	.4byte	.LASF353
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1c
 	.2byte	0x286
-	.4byte	0x12fe
+	.4byte	0x1302
 	.uleb128 0x1c
-	.4byte	.LASF352
+	.4byte	.LASF354
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF353
+	.4byte	.LASF355
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF354
+	.4byte	.LASF356
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF355
+	.4byte	.LASF357
 	.byte	0x3
 	.byte	0
-	.uleb128 0xe
-	.4byte	.LASF356
+	.uleb128 0xd
+	.4byte	.LASF358
 	.byte	0x1c
 	.2byte	0x28c
-	.4byte	0x12d4
-	.uleb128 0xe
-	.4byte	.LASF357
+	.4byte	0x12d8
+	.uleb128 0xd
+	.4byte	.LASF359
 	.byte	0x1d
 	.2byte	0x3ba
 	.4byte	0x109
-	.uleb128 0xe
-	.4byte	.LASF358
+	.uleb128 0xd
+	.4byte	.LASF360
 	.byte	0x1d
 	.2byte	0x3bb
 	.4byte	0x109
-	.uleb128 0xe
-	.4byte	.LASF359
+	.uleb128 0xd
+	.4byte	.LASF361
 	.byte	0x1d
 	.2byte	0x3bc
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x133e
-	.uleb128 0xc
+	.4byte	0x1342
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF403
-	.byte	0x4
+	.4byte	.LASF378
+	.byte	0x1
 	.byte	0xa
-	.4byte	0x132e
+	.4byte	0x1332
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_isi_pattern
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x99
-	.uleb128 0x9
-	.byte	0x8
 	.4byte	0xa8
-	.uleb128 0xf
+	.uleb128 0xe
 	.4byte	.LASF27
 	.byte	0x78
-	.byte	0xc
+	.byte	0xb
 	.byte	0xee
-	.4byte	0x1437
-	.uleb128 0x10
+	.4byte	0x1435
+	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0xef
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"id"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xf0
-	.4byte	0xa70
+	.4byte	0xa61
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF360
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF362
+	.byte	0xb
 	.byte	0xf1
-	.4byte	0x156c
+	.4byte	0x1568
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF361
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF363
+	.byte	0xb
 	.byte	0xf2
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF362
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF364
+	.byte	0xb
 	.byte	0xf3
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF363
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF365
+	.byte	0xb
 	.byte	0xf4
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF364
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF366
+	.byte	0xb
 	.byte	0xf5
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF365
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF367
+	.byte	0xb
 	.byte	0xf6
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF366
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF368
+	.byte	0xb
 	.byte	0xf7
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF367
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF369
+	.byte	0xb
 	.byte	0xf8
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF368
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF370
+	.byte	0xb
 	.byte	0xf9
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF369
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF371
+	.byte	0xb
 	.byte	0xfa
 	.4byte	0x59
 	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF370
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF372
+	.byte	0xb
 	.byte	0xfb
 	.4byte	0x59
 	.byte	0x5c
-	.uleb128 0x10
-	.4byte	.LASF371
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0xb
 	.byte	0xfc
 	.4byte	0x59
 	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF372
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF374
+	.byte	0xb
 	.byte	0xfd
 	.4byte	0x59
 	.byte	0x64
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"ops"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xfe
-	.4byte	0x273
+	.4byte	0x263
 	.byte	0x68
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0xff
 	.4byte	0x11f
 	.byte	0x70
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x135f
+	.4byte	0x135d
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0xf
 	.4byte	0xa8
-	.uleb128 0xf
-	.4byte	.LASF373
+	.uleb128 0xe
+	.4byte	.LASF375
 	.byte	0x20
 	.byte	0x1b
 	.byte	0x19
-	.4byte	0x1484
-	.uleb128 0x10
+	.4byte	0x1482
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
 	.byte	0x1a
 	.4byte	0xf3
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF374
+	.uleb128 0xf
+	.4byte	.LASF376
 	.byte	0x1b
 	.byte	0x1b
 	.4byte	0x59
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF375
+	.uleb128 0xf
+	.4byte	.LASF377
 	.byte	0x1b
 	.byte	0x1c
 	.4byte	0x135
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1b
 	.byte	0x1d
-	.4byte	0x1484
+	.4byte	0x1482
 	.byte	0x18
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1447
+	.4byte	0x1445
 	.uleb128 0x2b
 	.string	"gd"
 	.byte	0x1b
 	.byte	0x57
-	.4byte	0x1496
-	.uleb128 0x1
-	.byte	0x62
+	.4byte	0x1492
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfdc
+	.4byte	0xfe0
 	.uleb128 0x2c
-	.4byte	.LASF472
+	.4byte	.LASF465
 	.byte	0x8
 	.byte	0x1e
 	.byte	0x33
-	.4byte	0x14be
+	.4byte	0x14ba
 	.uleb128 0x2d
 	.string	"np"
 	.byte	0x1e
 	.byte	0x34
-	.4byte	0x14be
+	.4byte	0x14ba
 	.uleb128 0x2e
-	.4byte	.LASF376
+	.4byte	.LASF379
 	.byte	0x1e
 	.byte	0x35
 	.4byte	0xec
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfab
+	.4byte	0xfaf
 	.uleb128 0x2
-	.4byte	.LASF377
+	.4byte	.LASF380
 	.byte	0x1e
 	.byte	0x36
-	.4byte	0x149c
-	.uleb128 0xf
-	.4byte	.LASF378
+	.4byte	0x1498
+	.uleb128 0xe
+	.4byte	.LASF381
 	.byte	0x4
 	.byte	0x1f
 	.byte	0xc
-	.4byte	0x14e8
-	.uleb128 0x11
+	.4byte	0x14e4
+	.uleb128 0x10
 	.string	"pid"
 	.byte	0x1f
 	.byte	0xd
@@ -4681,192 +4163,192 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF379
+	.4byte	.LASF382
 	.byte	0x1f
 	.byte	0x10
-	.4byte	0x14f3
+	.4byte	0x14ef
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14cf
+	.4byte	0x14cb
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1437
-	.uleb128 0xf
+	.4byte	0x1435
+	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0x30
 	.byte	0x20
 	.byte	0x23
-	.4byte	0x153c
-	.uleb128 0x10
+	.4byte	0x1538
+	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x20
 	.byte	0x24
 	.4byte	0x135
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF380
+	.uleb128 0xf
+	.4byte	.LASF383
 	.byte	0x20
 	.byte	0x25
-	.4byte	0x166b
+	.4byte	0x1667
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF381
+	.uleb128 0xf
+	.4byte	.LASF384
 	.byte	0x20
 	.byte	0x26
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x10
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF41
 	.byte	0x20
 	.byte	0x27
-	.4byte	0x2a0
+	.4byte	0x290
 	.byte	0x20
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14ff
-	.uleb128 0xf
-	.4byte	.LASF382
+	.4byte	0x14fb
+	.uleb128 0xe
+	.4byte	.LASF385
 	.byte	0x10
-	.byte	0xc
+	.byte	0xb
 	.byte	0xb5
-	.4byte	0x1567
-	.uleb128 0x10
-	.4byte	.LASF383
-	.byte	0xc
+	.4byte	0x1563
+	.uleb128 0xf
+	.4byte	.LASF386
+	.byte	0xb
 	.byte	0xb6
 	.4byte	0xd5
 	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF384
-	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF387
+	.byte	0xb
 	.byte	0xb7
 	.4byte	0x109
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1542
+	.4byte	0x153e
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1567
+	.4byte	0x1563
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1581
+	.4byte	0x157d
 	.uleb128 0x14
-	.4byte	0x26d
+	.4byte	0x25d
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1572
-	.uleb128 0xf
-	.4byte	.LASF385
+	.4byte	0x156e
+	.uleb128 0xe
+	.4byte	.LASF388
 	.byte	0x80
 	.byte	0x20
 	.byte	0x54
-	.4byte	0x166b
-	.uleb128 0x10
+	.4byte	0x1667
+	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x20
 	.byte	0x55
 	.4byte	0xd5
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"id"
 	.byte	0x20
 	.byte	0x56
-	.4byte	0xa70
+	.4byte	0xa61
 	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF386
+	.uleb128 0xf
+	.4byte	.LASF389
 	.byte	0x20
 	.byte	0x57
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF387
+	.uleb128 0xf
+	.4byte	.LASF390
 	.byte	0x20
 	.byte	0x58
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF388
+	.uleb128 0xf
+	.4byte	.LASF391
 	.byte	0x20
 	.byte	0x59
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF389
+	.uleb128 0xf
+	.4byte	.LASF392
 	.byte	0x20
 	.byte	0x5a
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF390
+	.uleb128 0xf
+	.4byte	.LASF393
 	.byte	0x20
 	.byte	0x5b
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF366
+	.uleb128 0xf
+	.4byte	.LASF368
 	.byte	0x20
 	.byte	0x5c
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF367
+	.uleb128 0xf
+	.4byte	.LASF369
 	.byte	0x20
 	.byte	0x5d
-	.4byte	0x1581
+	.4byte	0x157d
 	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF321
+	.uleb128 0xf
+	.4byte	.LASF323
 	.byte	0x20
 	.byte	0x5e
-	.4byte	0x1680
+	.4byte	0x167c
 	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF391
+	.uleb128 0xf
+	.4byte	.LASF394
 	.byte	0x20
 	.byte	0x5f
-	.4byte	0x1680
+	.4byte	0x167c
 	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF369
+	.uleb128 0xf
+	.4byte	.LASF371
 	.byte	0x20
 	.byte	0x60
 	.4byte	0x59
 	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF392
+	.uleb128 0xf
+	.4byte	.LASF395
 	.byte	0x20
 	.byte	0x61
 	.4byte	0x59
 	.byte	0x5c
-	.uleb128 0x10
-	.4byte	.LASF393
+	.uleb128 0xf
+	.4byte	.LASF396
 	.byte	0x20
 	.byte	0x62
 	.4byte	0x59
 	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF371
+	.uleb128 0xf
+	.4byte	.LASF373
 	.byte	0x20
 	.byte	0x63
 	.4byte	0x59
 	.byte	0x64
-	.uleb128 0x10
-	.4byte	.LASF372
+	.uleb128 0xf
+	.4byte	.LASF374
 	.byte	0x20
 	.byte	0x64
 	.4byte	0x59
 	.byte	0x68
-	.uleb128 0x11
+	.uleb128 0x10
 	.string	"ops"
 	.byte	0x20
 	.byte	0x65
-	.4byte	0x273
+	.4byte	0x263
 	.byte	0x70
-	.uleb128 0x10
+	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x20
 	.byte	0x66
@@ -4875,1012 +4357,780 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1587
+	.4byte	0x1583
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1680
+	.4byte	0x167c
 	.uleb128 0x14
-	.4byte	0x153c
+	.4byte	0x1538
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1671
+	.4byte	0x166d
 	.uleb128 0x5
-	.4byte	.LASF394
+	.4byte	.LASF397
 	.byte	0x21
 	.byte	0xb
-	.4byte	0x159
+	.4byte	0x149
 	.uleb128 0x25
 	.byte	0x4
 	.4byte	0x84
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x16ce
+	.byte	0x2
+	.byte	0x13
+	.4byte	0x16ca
 	.uleb128 0x1c
-	.4byte	.LASF395
+	.4byte	.LASF398
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF396
+	.4byte	.LASF399
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF397
+	.4byte	.LASF400
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF398
+	.4byte	.LASF401
 	.byte	0x3
 	.uleb128 0x1c
-	.4byte	.LASF399
+	.4byte	.LASF402
 	.byte	0x4
 	.uleb128 0x1c
-	.4byte	.LASF400
+	.4byte	.LASF403
 	.byte	0x5
 	.uleb128 0x1c
-	.4byte	.LASF401
+	.4byte	.LASF404
 	.byte	0x6
 	.uleb128 0x1c
-	.4byte	.LASF402
+	.4byte	.LASF405
 	.byte	0x7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xdb
-	.4byte	0x16de
-	.uleb128 0xc
+	.4byte	0x16da
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x16ce
+	.4byte	0x16ca
 	.uleb128 0x2a
-	.4byte	.LASF404
-	.byte	0x1
-	.byte	0x1f
-	.4byte	0x16de
+	.4byte	.LASF406
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0x16da
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pattern
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1708
-	.uleb128 0xc
+	.4byte	0x1704
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x16f8
+	.4byte	0x16f4
 	.uleb128 0x2a
-	.4byte	.LASF405
-	.byte	0x1
-	.byte	0x29
-	.4byte	0x1708
+	.4byte	.LASF407
+	.byte	0x2
+	.byte	0x28
+	.4byte	0x1704
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pat_param
 	.uleb128 0x2f
-	.4byte	.LASF406
-	.byte	0x1
-	.2byte	0x185
-	.4byte	0x68c
+	.4byte	.LASF408
+	.byte	0x2
+	.2byte	0x136
+	.4byte	0x67c
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	_u_boot_list_2_cmd_2_ddr_test
 	.uleb128 0x30
-	.4byte	.LASF414
-	.byte	0x3
-	.byte	0x50
-	.8byte	.LFB279
-	.8byte	.LFE279-.LFB279
+	.4byte	.LASF417
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x59
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x17b3
+	.4byte	0x19e8
 	.uleb128 0x31
-	.4byte	.LASF267
-	.byte	0x3
-	.byte	0x50
-	.4byte	0x135
-	.4byte	.LLST69
+	.4byte	.LASF409
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x109
+	.4byte	.LLST15
 	.uleb128 0x31
-	.4byte	.LASF51
-	.byte	0x3
-	.byte	0x50
+	.4byte	.LASF410
+	.byte	0x4
+	.byte	0x60
 	.4byte	0x109
-	.4byte	.LLST70
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x52
-	.4byte	0x1359
-	.4byte	.LLST71
+	.4byte	.LLST16
 	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x53
-	.4byte	0xa8
-	.4byte	.LLST72
-	.uleb128 0x33
-	.8byte	.LVL254
-	.4byte	0x2873
-	.uleb128 0x34
+	.string	"ret"
+	.byte	0x4
+	.byte	0x62
+	.4byte	0x59
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x33
+	.4byte	0x1a5c
+	.8byte	.LBB10
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x4
+	.byte	0x64
+	.4byte	0x18c4
 	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xd
-	.byte	0x83
-	.sleb128 -4
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0
-	.byte	0
+	.4byte	0x1a77
+	.4byte	.LLST17
+	.uleb128 0x34
+	.4byte	0x1a6c
+	.4byte	.LLST18
 	.uleb128 0x35
-	.4byte	.LASF417
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x18b3
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+	.uleb128 0x41
+	.4byte	.LASF377
+	.byte	0x4
+	.byte	0x39
 	.4byte	0x109
-	.uleb128 0x48
-	.4byte	.LASF422
-	.byte	0x2
-	.byte	0x34
+	.uleb128 0x41
+	.4byte	.LASF412
+	.byte	0x4
+	.byte	0x3a
 	.4byte	0x109
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"p"
-	.byte	0x2
-	.byte	0x35
-	.4byte	0x18b9
-	.uleb128 0x48
-	.4byte	.LASF423
-	.byte	0x2
-	.byte	0x36
+	.byte	0x4
+	.byte	0x3b
+	.4byte	0x1a56
+	.uleb128 0x41
+	.4byte	.LASF413
+	.byte	0x4
+	.byte	0x3c
 	.4byte	0x109
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF425
-	.byte	0x2
-	.byte	0xa
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x3e
+	.4byte	.LASF415
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x59
 	.byte	0x1
-	.4byte	0x1d0b
-	.uleb128 0x46
-	.4byte	.LASF419
-	.byte	0x2
-	.byte	0xa
+	.4byte	0x1ad7
+	.uleb128 0x3f
+	.4byte	.LASF409
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x109
-	.uleb128 0x46
-	.4byte	.LASF420
-	.byte	0x2
-	.byte	0xa
+	.uleb128 0x3f
+	.4byte	.LASF410
+	.byte	0x4
+	.byte	0xb
 	.4byte	0x109
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"i"
-	.byte	0x2
-	.byte	0xc
+	.byte	0x4
+	.byte	0xd
 	.4byte	0xa8
-	.uleb128 0x47
+	.uleb128 0x40
 	.string	"j"
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF426
-	.byte	0x2
+	.byte	0x4
 	.byte	0xd
 	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF421
-	.byte	0x2
-	.byte	0xd
+	.uleb128 0x41
+	.4byte	.LASF416
+	.byte	0x4
+	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF375
-	.byte	0x2
-	.byte	0xd
+	.uleb128 0x41
+	.4byte	.LASF411
+	.byte	0x4
+	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF422
-	.byte	0x2
+	.uleb128 0x41
+	.4byte	.LASF377
+	.byte	0x4
 	.byte	0xe
 	.4byte	0xa8
-	.uleb128 0x47
-	.string	"p32"
-	.byte	0x2
+	.uleb128 0x41
+	.4byte	.LASF412
+	.byte	0x4
 	.byte	0xf
-	.4byte	0x1d0b
-	.uleb128 0x48
-	.4byte	.LASF423
-	.byte	0x2
+	.4byte	0xa8
+	.uleb128 0x40
+	.string	"p32"
+	.byte	0x4
 	.byte	0x10
+	.4byte	0x1ad7
+	.uleb128 0x41
+	.4byte	.LASF413
+	.byte	0x4
+	.byte	0x11
 	.4byte	0x109
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0xb3
-	.uleb128 0x35
-	.4byte	.LASF427
-	.byte	0x5
-	.byte	0x30
+	.uleb128 0x30
+	.4byte	.LASF418
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x59
-	.8byte	.LFB272
-	.8byte	.LFE272-.LFB272
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1f56
+	.4byte	0x1d09
 	.uleb128 0x31
-	.4byte	.LASF408
-	.byte	0x5
-	.byte	0x30
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x109
-	.4byte	.LLST43
+	.4byte	.LLST9
 	.uleb128 0x31
-	.4byte	.LASF374
-	.byte	0x5
-	.byte	0x30
-	.4byte	0x109
-	.4byte	.LLST44
-	.uleb128 0x37
-	.4byte	.LASF267
-	.byte	0x5
-	.byte	0x35
+	.4byte	.LASF376
+	.byte	0x3
+	.byte	0xf
 	.4byte	0x109
-	.4byte	.LLST45
-	.uleb128 0x37
-	.4byte	.LASF428
-	.byte	0x5
-	.byte	0x35
+	.4byte	.LLST10
+	.uleb128 0x42
+	.4byte	.LASF268
+	.byte	0x3
+	.byte	0x11
 	.4byte	0x109
-	.4byte	.LLST46
-	.uleb128 0x48
-	.4byte	.LASF429
-	.byte	0x5
-	.byte	0x36
+	.4byte	.LLST11
+	.uleb128 0x2a
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x11
+	.4byte	0x109
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x42
+	.4byte	.LASF421
+	.byte	0x3
+	.byte	0x12
 	.4byte	0x59
+	.4byte	.LLST12
 	.uleb128 0x2a
-	.4byte	.LASF430
-	.byte	0x5
-	.byte	0x37
-	.4byte	0x1f56
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x13
+	.4byte	0x1d09
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x32
+	.uleb128 0x43
 	.string	"col"
-	.byte	0x5
-	.byte	0x39
+	.byte	0x3
+	.byte	0x15
 	.4byte	0xa8
-	.4byte	.LLST47
-	.uleb128 0x37
-	.4byte	.LASF431
-	.byte	0x5
-	.byte	0x39
+	.4byte	.LLST13
+	.uleb128 0x2a
+	.4byte	.LASF423
+	.byte	0x3
+	.byte	0x15
 	.4byte	0xa8
-	.4byte	.LLST48
-	.uleb128 0x37
-	.4byte	.LASF413
-	.byte	0x5
-	.byte	0x3a
+	.uleb128 0x1
+	.byte	0x65
+	.uleb128 0x42
+	.4byte	.LASF424
+	.byte	0x3
+	.byte	0x16
 	.4byte	0x109
-	.4byte	.LLST49
-	.uleb128 0x49
-	.4byte	.LASF473
-	.byte	0x5
-	.byte	0x62
-	.8byte	.L75
-	.uleb128 0x3c
-	.4byte	0x1f66
-	.8byte	.LBB35
-	.4byte	.Ldebug_ranges0+0x90
-	.byte	0x5
-	.byte	0x3d
-	.4byte	0x1e14
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x90
-	.uleb128 0x3f
-	.4byte	0x1f76
-	.4byte	.LLST50
-	.uleb128 0x40
-	.4byte	0x1f81
-	.uleb128 0x40
-	.4byte	0x1f8c
-	.uleb128 0x40
-	.4byte	0x1f96
-	.uleb128 0x4a
-	.8byte	.LBB37
-	.8byte	.LBE37-.LBB37
-	.uleb128 0x3f
-	.4byte	0x1fa2
-	.4byte	.LLST51
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL123
-	.4byte	0x2896
-	.4byte	0x1e40
-	.uleb128 0x34
+	.4byte	.LLST14
+	.uleb128 0x44
+	.4byte	.LASF466
+	.byte	0x3
+	.byte	0x3e
+	.8byte	.L31
+	.uleb128 0x38
+	.8byte	.LVL38
+	.4byte	0x243f
+	.4byte	0x1bbb
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	.LANCHOR1
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL124
-	.4byte	0x2873
-	.4byte	0x1e5f
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL39
+	.4byte	0x2428
+	.4byte	0x1bda
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC18
+	.8byte	.LC6
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL127
-	.4byte	0x1947
-	.4byte	0x1e78
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL40
+	.4byte	0x2448
+	.uleb128 0x38
+	.8byte	.LVL42
+	.4byte	0x2428
+	.4byte	0x1c0c
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL49
+	.4byte	0x2453
+	.4byte	0x1c2b
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL128
-	.4byte	0x287e
-	.4byte	0x1e9d
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL50
+	.4byte	0x245e
+	.4byte	0x1c50
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL133
-	.4byte	0x287e
-	.4byte	0x1ec2
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL53
+	.4byte	0x245e
+	.4byte	0x1c75
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL134
-	.4byte	0x17b3
-	.4byte	0x1ef8
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL54
+	.4byte	0x246a
+	.4byte	0x1cab
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x84
 	.sleb128 0
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL139
-	.4byte	0x287e
-	.4byte	0x1f29
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL59
+	.4byte	0x245e
+	.4byte	0x1cdc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xe
@@ -5892,50 +5142,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x84
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL140
-	.4byte	0x17b3
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL60
+	.4byte	0x246a
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
@@ -5944,250 +5194,164 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x1f66
-	.uleb128 0xc
+	.4byte	0x1d19
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x7
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF432
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x1faf
-	.uleb128 0x48
-	.4byte	.LASF433
-	.byte	0x5
-	.byte	0xe
-	.4byte	0xa8
-	.uleb128 0x47
-	.string	"col"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x47
-	.string	"bw"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF429
-	.byte	0x5
-	.byte	0x10
-	.4byte	0x59
-	.uleb128 0x4b
-	.uleb128 0x47
-	.string	"__v"
-	.byte	0x5
-	.byte	0x23
-	.4byte	0xa8
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF444
-	.byte	0x1
-	.byte	0xbc
+	.uleb128 0x46
+	.4byte	.LASF467
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.8byte	.LFB259
-	.8byte	.LFE259-.LFB259
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2425
+	.4byte	0x20c8
 	.uleb128 0x31
-	.4byte	.LASF434
-	.byte	0x1
-	.byte	0xbc
-	.4byte	0x2425
-	.4byte	.LLST52
+	.4byte	.LASF425
+	.byte	0x2
+	.byte	0x62
+	.4byte	0x20c8
+	.4byte	.LLST29
 	.uleb128 0x31
-	.4byte	.LASF435
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF426
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST53
+	.4byte	.LLST30
 	.uleb128 0x31
-	.4byte	.LASF436
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF427
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST54
+	.4byte	.LLST31
 	.uleb128 0x31
-	.4byte	.LASF437
-	.byte	0x1
-	.byte	0xbd
-	.4byte	0x651
-	.4byte	.LLST55
-	.uleb128 0x32
+	.4byte	.LASF428
+	.byte	0x2
+	.byte	0x63
+	.4byte	0x641
+	.4byte	.LLST32
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x1
-	.byte	0xbf
+	.byte	0x2
+	.byte	0x65
 	.4byte	0x59
-	.4byte	.LLST56
-	.uleb128 0x37
-	.4byte	.LASF438
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST33
+	.uleb128 0x42
+	.4byte	.LASF429
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST57
-	.uleb128 0x37
-	.4byte	.LASF439
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST34
+	.uleb128 0x42
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST58
-	.uleb128 0x3a
+	.4byte	.LLST35
+	.uleb128 0x32
 	.string	"arg"
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x242b
+	.byte	0x2
+	.byte	0x67
+	.4byte	0x20ce
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x2a
-	.4byte	.LASF408
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x243b
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x68
+	.4byte	0x20de
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x2a
-	.4byte	.LASF374
-	.byte	0x1
-	.byte	0xc3
-	.4byte	0x243b
+	.4byte	.LASF376
+	.byte	0x2
+	.byte	0x69
+	.4byte	0x20de
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -72
-	.uleb128 0x37
-	.4byte	.LASF440
-	.byte	0x1
-	.byte	0xc4
+	.uleb128 0x42
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x6a
 	.4byte	0xa8
-	.4byte	.LLST59
-	.uleb128 0x37
-	.4byte	.LASF441
-	.byte	0x1
-	.byte	0xc5
+	.4byte	.LLST36
+	.uleb128 0x42
+	.4byte	.LASF432
+	.byte	0x2
+	.byte	0x6b
 	.4byte	0xa8
-	.4byte	.LLST60
-	.uleb128 0x32
+	.4byte	.LLST37
+	.uleb128 0x42
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST38
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xc6
+	.byte	0x2
+	.byte	0x6d
 	.4byte	0x59
-	.4byte	.LLST61
-	.uleb128 0x37
-	.4byte	.LASF442
-	.byte	0x1
-	.byte	0xc7
+	.4byte	.LLST39
+	.uleb128 0x42
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x6e
 	.4byte	0x59
-	.4byte	.LLST62
-	.uleb128 0x48
-	.4byte	.LASF443
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0xa8
-	.uleb128 0x3c
-	.4byte	0x2595
-	.8byte	.LBB46
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x1
-	.byte	0xcb
-	.4byte	0x213e
-	.uleb128 0x3d
-	.4byte	0x25ac
-	.4byte	.LLST63
-	.uleb128 0x3d
-	.4byte	0x25a1
-	.4byte	.LLST64
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x3f
-	.4byte	0x25b7
-	.4byte	.LLST65
-	.uleb128 0x3f
-	.4byte	0x25c0
-	.4byte	.LLST66
+	.4byte	.LLST40
 	.uleb128 0x41
-	.8byte	.LVL151
-	.4byte	0x2873
-	.4byte	0x2109
-	.uleb128 0x34
+	.4byte	.LASF435
+	.byte	0x2
+	.byte	0x6f
+	.4byte	0xa8
+	.uleb128 0x38
+	.8byte	.LVL106
+	.4byte	0x2428
+	.4byte	0x1e42
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC19
+	.8byte	.LC16
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL152
-	.4byte	0x2873
-	.4byte	0x2128
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL107
+	.4byte	0x2475
+	.4byte	0x1e65
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL161
-	.4byte	0x2873
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x84
 	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	0x2544
-	.8byte	.LBB60
-	.4byte	.Ldebug_ranges0+0x150
-	.byte	0x1
-	.2byte	0x152
-	.4byte	0x219e
-	.uleb128 0x43
-	.4byte	0x256a
-	.uleb128 0x43
-	.4byte	0x255f
-	.uleb128 0x43
-	.4byte	0x2554
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x3f
-	.4byte	0x2575
-	.4byte	.LLST67
-	.uleb128 0x40
-	.4byte	0x257e
-	.uleb128 0x3f
-	.4byte	0x2589
-	.4byte	.LLST68
-	.uleb128 0x33
-	.8byte	.LVL202
-	.4byte	0x2873
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC29
-	.byte	0
-	.byte	0
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL155
-	.4byte	0x289f
-	.4byte	0x21bc
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL109
+	.4byte	0x2480
+	.4byte	0x1e83
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x8
-	.byte	0x89
+	.byte	0x83
 	.sleb128 0
 	.byte	0x33
 	.byte	0x24
@@ -6196,19 +5360,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x22
 	.byte	0x6
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL165
-	.4byte	0x2873
-	.uleb128 0x41
-	.8byte	.LVL167
-	.4byte	0x28aa
-	.4byte	0x21ec
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL114
+	.4byte	0x2428
+	.uleb128 0x38
+	.8byte	.LVL116
+	.4byte	0x248b
+	.4byte	0x1eb3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
@@ -6220,876 +5384,714 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x23
 	.uleb128 0x110
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL172
-	.4byte	0x244b
-	.uleb128 0x3b
-	.8byte	.LVL175
-	.4byte	0x244b
-	.uleb128 0x41
-	.8byte	.LVL176
-	.4byte	0x2873
-	.4byte	0x222a
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC26
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x3a
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL180
-	.4byte	0x2873
-	.4byte	0x224a
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL117
+	.4byte	0x2120
+	.uleb128 0x45
+	.8byte	.LVL119
+	.4byte	0x2120
+	.uleb128 0x38
+	.8byte	.LVL129
+	.4byte	0x2428
+	.4byte	0x1eeb
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 192
-	.byte	0x6
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL181
-	.4byte	0x2873
-	.4byte	0x2274
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL130
+	.4byte	0x2428
+	.4byte	0x1f09
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL182
-	.4byte	0x19a9
-	.4byte	0x2292
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL131
+	.4byte	0x2150
+	.uleb128 0x45
+	.8byte	.LVL132
+	.4byte	0x1734
+	.uleb128 0x45
+	.8byte	.LVL135
+	.4byte	0x2181
+	.uleb128 0x45
+	.8byte	.LVL138
+	.4byte	0x1add
+	.uleb128 0x45
+	.8byte	.LVL142
+	.4byte	0x2150
+	.uleb128 0x45
+	.8byte	.LVL144
+	.4byte	0x1734
+	.uleb128 0x45
+	.8byte	.LVL147
+	.4byte	0x2181
+	.uleb128 0x45
+	.8byte	.LVL150
+	.4byte	0x1add
+	.uleb128 0x45
+	.8byte	.LVL152
+	.4byte	0x2496
+	.uleb128 0x38
+	.8byte	.LVL158
+	.4byte	0x2428
+	.4byte	0x1faf
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL185
-	.4byte	0x25cc
-	.4byte	0x22b0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL187
-	.4byte	0x1d11
-	.4byte	0x22ce
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
+	.uleb128 0xe
 	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL210
-	.4byte	0x2873
-	.4byte	0x22ec
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x88
 	.sleb128 0
+	.byte	0x22
+	.byte	0x6
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL215
-	.4byte	0x19a9
-	.uleb128 0x3b
-	.8byte	.LVL217
-	.4byte	0x28b5
-	.uleb128 0x3b
-	.8byte	.LVL222
-	.4byte	0x25cc
-	.uleb128 0x3b
-	.8byte	.LVL223
-	.4byte	0x1d11
-	.uleb128 0x41
-	.8byte	.LVL228
-	.4byte	0x2873
-	.4byte	0x2345
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL161
+	.4byte	0x2428
+	.4byte	0x1fd3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC24
-	.uleb128 0x34
+	.8byte	.LC26
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL229
-	.4byte	0x2873
-	.4byte	0x2364
-	.uleb128 0x34
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC25
+	.byte	0x3a
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL230
-	.4byte	0x244b
-	.uleb128 0x41
-	.8byte	.LVL231
-	.4byte	0x2873
-	.4byte	0x2390
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL170
+	.4byte	0x24a1
+	.4byte	0x1ff8
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC32
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL233
-	.4byte	0x19a9
-	.4byte	0x23ae
-	.uleb128 0x34
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 296
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL236
-	.4byte	0x25cc
-	.4byte	0x23cc
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL173
+	.4byte	0x2150
+	.uleb128 0x45
+	.8byte	.LVL174
+	.4byte	0x2120
+	.uleb128 0x38
+	.8byte	.LVL178
+	.4byte	0x2428
+	.4byte	0x2032
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL239
-	.4byte	0x1d11
-	.4byte	0x23ea
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL183
+	.4byte	0x1734
+	.uleb128 0x45
+	.8byte	.LVL185
+	.4byte	0x2496
+	.uleb128 0x45
+	.8byte	.LVL190
+	.4byte	0x2181
+	.uleb128 0x45
+	.8byte	.LVL191
+	.4byte	0x1add
+	.uleb128 0x38
+	.8byte	.LVL197
+	.4byte	0x2428
+	.4byte	0x2085
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC19
 	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL241
-	.4byte	0x28b5
-	.uleb128 0x33
-	.8byte	.LVL247
-	.4byte	0x2873
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL198
+	.4byte	0x24ac
+	.uleb128 0x45
+	.8byte	.LVL199
+	.4byte	0x2120
+	.uleb128 0x45
+	.8byte	.LVL200
+	.4byte	0x2150
+	.uleb128 0x3a
+	.8byte	.LVL201
+	.4byte	0x2428
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC31
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xe
-	.byte	0x83
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x26
-	.byte	0x88
-	.sleb128 0
-	.byte	0x22
-	.byte	0x6
+	.8byte	.LC24
 	.byte	0
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x68c
+	.4byte	0x67c
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x243b
-	.uleb128 0xc
+	.4byte	0x20de
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x4
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x244b
-	.uleb128 0xc
+	.4byte	0x20ee
+	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0x4c
-	.4byte	.LASF445
+	.uleb128 0x3e
+	.4byte	.LASF436
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x59
 	.byte	0x1
-	.byte	0xa4
+	.4byte	0x2120
+	.uleb128 0x3f
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.uleb128 0x3f
+	.4byte	.LASF438
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.uleb128 0x3f
+	.4byte	.LASF439
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF440
+	.byte	0x2
+	.byte	0x31
 	.4byte	0x59
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x24f6
-	.uleb128 0x36
+	.4byte	0x2150
+	.uleb128 0x47
 	.string	"uv"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xa8
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF441
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x59
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2181
+	.uleb128 0x31
+	.4byte	.LASF442
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x109
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF443
 	.byte	0x1
-	.byte	0xa4
+	.byte	0x2d
 	.4byte	0x59
-	.4byte	.LLST0
-	.uleb128 0x3a
-	.string	"dev"
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2407
+	.uleb128 0x31
+	.4byte	.LASF419
 	.byte	0x1
-	.byte	0xa6
-	.4byte	0x26d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x32
-	.string	"ret"
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST0
+	.uleb128 0x31
+	.4byte	.LASF376
 	.byte	0x1
-	.byte	0xa7
-	.4byte	0x59
+	.byte	0x2d
+	.4byte	0x109
 	.4byte	.LLST1
-	.uleb128 0x41
-	.8byte	.LVL2
-	.4byte	0x28c0
-	.4byte	0x24bc
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 56
-	.byte	0
-	.uleb128 0x3b
-	.8byte	.LVL5
-	.4byte	0x2873
-	.uleb128 0x41
-	.8byte	.LVL9
-	.4byte	0x28cc
-	.4byte	0x24e1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL12
-	.4byte	0x28d8
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x64
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF446
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x2512
-	.uleb128 0x46
-	.4byte	.LASF447
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x109
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF448
-	.byte	0x1
-	.byte	0x67
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x2544
-	.uleb128 0x46
-	.4byte	.LASF449
-	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.uleb128 0x46
-	.4byte	.LASF450
-	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.uleb128 0x46
-	.4byte	.LASF451
-	.byte	0x1
-	.byte	0x67
-	.4byte	0x109
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF452
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x2595
-	.uleb128 0x4e
-	.string	"arg"
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x18b3
-	.uleb128 0x46
-	.4byte	.LASF408
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x18b3
-	.uleb128 0x46
-	.4byte	.LASF374
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x18b3
-	.uleb128 0x47
-	.string	"i"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF453
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF454
-	.byte	0x1
-	.byte	0x4c
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF474
-	.byte	0x1
-	.byte	0x2d
-	.byte	0x1
-	.4byte	0x25cc
-	.uleb128 0x46
-	.4byte	.LASF408
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x18b3
-	.uleb128 0x46
-	.4byte	.LASF374
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x18b3
-	.uleb128 0x47
-	.string	"i"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.uleb128 0x48
-	.4byte	.LASF453
+	.uleb128 0x42
+	.4byte	.LASF444
 	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF455
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x59
-	.8byte	.LFB201
-	.8byte	.LFE201-.LFB201
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x285e
-	.uleb128 0x31
-	.4byte	.LASF408
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST36
-	.uleb128 0x31
-	.4byte	.LASF374
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST37
-	.uleb128 0x37
-	.4byte	.LASF456
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST38
-	.uleb128 0x32
+	.4byte	.LLST2
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST39
-	.uleb128 0x32
+	.4byte	.LLST3
+	.uleb128 0x43
 	.string	"j"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST40
-	.uleb128 0x32
+	.4byte	.LLST4
+	.uleb128 0x43
 	.string	"q"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST41
-	.uleb128 0x3a
+	.4byte	.LLST5
+	.uleb128 0x32
 	.string	"buf"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x30
-	.4byte	0x1f56
+	.4byte	0x1d09
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x32
+	.uleb128 0x43
 	.string	"p"
-	.byte	0x4
+	.byte	0x1
 	.byte	0x31
-	.4byte	0x1359
-	.4byte	.LLST42
-	.uleb128 0x50
-	.4byte	.LASF457
-	.4byte	0x286e
+	.4byte	0x1357
+	.4byte	.LLST6
+	.uleb128 0x48
+	.4byte	.LASF445
+	.4byte	0x2417
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC41
-	.uleb128 0x41
-	.8byte	.LVL88
-	.4byte	0x2873
-	.4byte	0x268e
-	.uleb128 0x34
+	.8byte	.LC33
+	.uleb128 0x38
+	.8byte	.LVL2
+	.4byte	0x2428
+	.4byte	0x2243
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC13
+	.8byte	.LC1
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL90
-	.4byte	0x2873
-	.4byte	0x26ae
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL4
+	.4byte	0x2428
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x8f
-	.sleb128 224
+	.sleb128 200
 	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL93
-	.4byte	0x2873
-	.4byte	0x26cc
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL6
+	.4byte	0x2428
+	.4byte	0x2283
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL96
-	.4byte	0x1947
-	.4byte	0x26e4
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL8
+	.4byte	0x2453
+	.4byte	0x22a1
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
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 	.sleb128 0
-	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL97
-	.4byte	0x1947
-	.4byte	0x26fe
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
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+	.uleb128 0x2
+	.byte	0x83
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 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL98
-	.4byte	0x18bf
-	.4byte	0x2728
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL9
+	.4byte	0x24b7
+	.4byte	0x22cb
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
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 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
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-	.byte	0x8b
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 	.sleb128 0
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 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x72
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 	.sleb128 0
-	.uleb128 0x34
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 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x86
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 	.sleb128 0
 	.byte	0
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-	.8byte	.LVL99
-	.4byte	0x17b3
-	.4byte	0x2757
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL10
+	.4byte	0x246a
+	.4byte	0x22fa
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
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 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL105
-	.4byte	0x2873
-	.4byte	0x2776
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL16
+	.4byte	0x2428
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC16
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 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL106
-	.4byte	0x28e3
-	.4byte	0x278e
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL17
+	.4byte	0x24c2
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x80
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL109
-	.4byte	0x2873
-	.4byte	0x27b3
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL20
+	.4byte	0x2428
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC17
-	.uleb128 0x34
+	.8byte	.LC5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x80
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL112
-	.4byte	0x2873
-	.4byte	0x27d1
-	.uleb128 0x34
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+	.4byte	0x2428
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
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 	.sleb128 0
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 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL113
-	.4byte	0x2873
-	.4byte	0x27ef
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL24
+	.4byte	0x2428
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x88
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 	.sleb128 0
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+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
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 	.sleb128 0
 	.byte	0
-	.uleb128 0x41
-	.8byte	.LVL115
-	.4byte	0x1947
-	.4byte	0x2807
-	.uleb128 0x34
+	.uleb128 0x38
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+	.4byte	0x2453
+	.4byte	0x23b0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8c
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x83
 	.sleb128 0
 	.byte	0
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-	.8byte	.LVL116
-	.4byte	0x18bf
-	.4byte	0x2831
-	.uleb128 0x34
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+	.8byte	.LVL27
+	.4byte	0x24b7
+	.4byte	0x23da
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x70
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 	.sleb128 0
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 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
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 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
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 	.sleb128 0
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 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
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 	.sleb128 0
 	.byte	0
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 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
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 	.sleb128 0
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 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
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 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
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 	.sleb128 0
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 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
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 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x8b
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 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe7
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-	.uleb128 0xc
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+	.uleb128 0x12
 	.4byte	0xce
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 	.byte	0
 	.uleb128 0x8
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-	.4byte	.LASF458
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+	.4byte	.LASF446
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+	.4byte	.LASF447
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 	.byte	0x12
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-	.byte	0x24
+	.uleb128 0x4a
+	.4byte	.LASF455
+	.4byte	.LASF455
+	.byte	0x27
 	.byte	0x29
-	.uleb128 0x51
-	.4byte	.LASF463
-	.4byte	.LASF463
+	.uleb128 0x4a
+	.4byte	.LASF456
+	.4byte	.LASF456
 	.byte	0x21
 	.byte	0x11
-	.uleb128 0x52
-	.4byte	.LASF464
-	.4byte	.LASF464
-	.byte	0x25
-	.2byte	0x1da
-	.uleb128 0x52
-	.4byte	.LASF465
-	.4byte	.LASF465
+	.uleb128 0x4a
+	.4byte	.LASF457
+	.4byte	.LASF457
+	.byte	0x26
+	.byte	0x12
+	.uleb128 0x4a
+	.4byte	.LASF458
+	.4byte	.LASF458
 	.byte	0x25
-	.2byte	0x116
-	.uleb128 0x51
-	.4byte	.LASF466
-	.4byte	.LASF466
+	.byte	0xc
+	.uleb128 0x4a
+	.4byte	.LASF459
+	.4byte	.LASF459
 	.byte	0x26
-	.byte	0xb
-	.uleb128 0x52
-	.4byte	.LASF467
-	.4byte	.LASF467
+	.byte	0xd
+	.uleb128 0x49
+	.4byte	.LASF460
+	.4byte	.LASF460
 	.byte	0x1d
 	.2byte	0x398
 	.byte	0
@@ -7221,18 +6223,9 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xc
 	.uleb128 0x21
 	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
 	.byte	0
 	.byte	0
 	.uleb128 0xd
-	.uleb128 0x21
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xe
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -7249,7 +6242,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0xf
+	.uleb128 0xe
 	.uleb128 0x13
 	.byte	0x1
 	.uleb128 0x3
@@ -7264,7 +6257,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x10
+	.uleb128 0xf
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7279,7 +6272,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x11
+	.uleb128 0x10
 	.uleb128 0xd
 	.byte	0
 	.uleb128 0x3
@@ -7294,11 +6287,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x12
+	.uleb128 0x11
 	.uleb128 0x26
 	.byte	0
 	.byte	0
 	.byte	0
+	.uleb128 0x12
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
 	.uleb128 0x13
 	.uleb128 0x15
 	.byte	0x1
@@ -7630,8 +6632,6 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.uleb128 0x3f
 	.uleb128 0x19
-	.uleb128 0x2
-	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x2c
@@ -7705,6 +6705,8 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x27
 	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x12
@@ -7744,140 +6746,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x33
-	.uleb128 0x4109
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.uleb128 0x410a
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0x18
-	.uleb128 0x2111
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x35
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x37
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3a
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
-	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x1d
+	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
@@ -7893,7 +6766,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3d
+	.uleb128 0x34
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -7902,14 +6775,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
+	.uleb128 0x35
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x3f
+	.uleb128 0x36
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7918,14 +6791,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x40
+	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x41
+	.uleb128 0x38
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
@@ -7936,7 +6809,25 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x39
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -7951,14 +6842,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x3c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -7967,7 +6858,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -7986,7 +6877,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -7999,7 +6890,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8012,7 +6903,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8023,9 +6927,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8038,21 +6959,16 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x45
+	.uleb128 0x4109
+	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8077,24 +6993,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x47
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8105,26 +7004,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x50
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8137,7 +7021,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8151,10 +7035,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8168,10 +7052,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8187,2732 +7071,2075 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST69:
-	.8byte	.LVL248
-	.8byte	.LVL250
-	.2byte	0x1
+.LLST15:
+	.8byte	.LVL61
+	.8byte	.LVL64-1
+	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL250
-	.8byte	.LVL251
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL251
-	.8byte	.LVL252
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LFE279
+	.8byte	.LVL81
+	.8byte	.LFE272
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST70:
-	.8byte	.LVL248
-	.8byte	.LVL250
+.LLST16:
+	.8byte	.LVL61
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL250
-	.8byte	.LFE279
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST71:
-	.8byte	.LVL249
-	.8byte	.LVL250
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL250
-	.8byte	.LVL251
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL251
-	.8byte	.LVL252
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LFE279
+	.8byte	.LVL81
+	.8byte	.LFE272
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL249
-	.8byte	.LVL250
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL250
-	.8byte	.LVL251
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL251
-	.8byte	.LVL252
+.LLST17:
+	.8byte	.LVL62
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL252
-	.8byte	.LVL253
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL253
-	.8byte	.LVL254
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL254
-	.8byte	.LFE279
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST23:
-	.8byte	.LVL70
-	.8byte	.LVL78
+.LLST18:
+	.8byte	.LVL62
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL78
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST24:
-	.8byte	.LVL70
-	.8byte	.LVL71
+.LLST19:
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
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-	.8byte	.LVL71
-	.8byte	.LVL73
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
 	.8byte	.LVL73
-	.8byte	.LVL79
+	.8byte	.LVL75
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL79
-	.8byte	.LVL82
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x33
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LVL83
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL70
-	.8byte	.LVL74
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL74
-	.8byte	.LVL80-1
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+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
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+	.8byte	.LVL65
+	.8byte	.LVL69
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL80-1
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x66
+	.8byte	.LVL69
+	.8byte	.LVL72
+	.2byte	0x3
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+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL72
+	.8byte	.LVL79
 	.2byte	0x1
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+	.8byte	.LVL84
+	.2byte	0x1
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-	.8byte	.LVL70
-	.8byte	.LVL72
+.LLST21:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
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+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
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-	.8byte	.LFE278
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
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+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
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-	.8byte	.LVL70
-	.8byte	.LVL75
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+	.8byte	.LVL64
+	.8byte	.LVL65
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+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
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-	.8byte	.LVL75
-	.8byte	.LVL80-1
+	.byte	0x67
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+	.8byte	.LVL84
 	.2byte	0x1
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-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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+	.8byte	0
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+	.8byte	.LVL62
+	.8byte	.LVL65
+	.2byte	0x2
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-	.8byte	.LFE278
-	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL73
-	.8byte	.LVL78
+.LLST24:
+	.8byte	.LVL64
+	.8byte	.LVL80
 	.2byte	0x1
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-	.8byte	.LVL78
-	.8byte	.LVL82
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
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 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LFE272
 	.2byte	0x1
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-	.8byte	.LVL73
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+	.8byte	.LVL62
+	.8byte	.LVL68
+	.2byte	0x3
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+	.byte	0x9f
+	.8byte	.LVL72
 	.8byte	.LVL74
-	.2byte	0x1
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+	.byte	0x9
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+	.byte	0x9f
 	.8byte	.LVL74
-	.8byte	.LVL80-1
+	.8byte	.LVL76-1
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL80-1
-	.8byte	.LVL82
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL82
-	.8byte	.LFE278
+	.byte	0x55
+	.8byte	.LVL76-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x6c
+	.8byte	.LVL81
+	.8byte	.LFE272
+	.2byte	0x3
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+	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL73
-	.8byte	.LVL75
+.LLST26:
+	.8byte	.LVL87
+	.8byte	.LVL88
 	.2byte	0x2
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-	.8byte	.LVL75
-	.8byte	.LVL80-1
+	.8byte	.LVL88
+	.8byte	.LVL89
 	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL82
-	.8byte	.LVL84
+	.byte	0x50
+	.8byte	.LVL92
+	.8byte	.LVL95
 	.2byte	0x1
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+	.8byte	.LFE272
+	.2byte	0x1
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+	.8byte	0
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 	.8byte	.LVL84
-	.8byte	.LVL85
+	.8byte	.LVL90
+	.2byte	0x1
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+	.8byte	.LVL90
+	.8byte	.LVL91
 	.2byte	0x3
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 	.byte	0x9f
-	.8byte	.LVL85
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL73
-	.8byte	.LVL75
-	.2byte	0x2
-	.byte	0x30
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-	.8byte	.LVL75
-	.8byte	.LVL80-1
-	.2byte	0x1
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-	.8byte	.LFE278
-	.2byte	0x1
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-	.8byte	0
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-	.8byte	.LVL73
-	.8byte	.LVL75
-	.2byte	0x2
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-	.byte	0x9f
-	.8byte	.LVL75
-	.8byte	.LVL80-1
-	.2byte	0x1
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-	.8byte	.LVL82
-	.8byte	.LFE278
+	.8byte	.LVL91
+	.8byte	.LFE272
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL73
-	.8byte	.LVL77
-	.2byte	0x2
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-	.8byte	.LVL77
-	.8byte	.LVL80-1
-	.2byte	0x1
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-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x2
-	.byte	0x30
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+	.8byte	.LVL84
+	.8byte	.LVL89
+	.2byte	0x3
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 	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL73
-	.8byte	.LVL77
-	.2byte	0x2
-	.byte	0x30
+	.8byte	.LVL91
+	.8byte	.LVL94
+	.2byte	0x3
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 	.byte	0x9f
-	.8byte	.LVL77
-	.8byte	.LVL80-1
+	.8byte	.LVL94
+	.8byte	.LVL101
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x2
-	.byte	0x30
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+	.8byte	.LVL101
+	.8byte	.LFE272
+	.2byte	0x3
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 	.8byte	0
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-	.8byte	.LVL73
-	.8byte	.LVL77
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL77
-	.8byte	.LVL81
+.LLST9:
+	.8byte	.LVL35
+	.8byte	.LVL37
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL81
-	.8byte	.LVL82
+	.byte	0x50
+	.8byte	.LVL37
+	.8byte	.LVL45
 	.2byte	0x1
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+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LFE278
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE269
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL62
-	.8byte	.LVL63
+.LLST10:
+	.8byte	.LVL35
+	.8byte	.LVL36
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL63
-	.8byte	.LVL65
+	.8byte	.LVL36
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x66
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+	.8byte	.LVL46
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
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-	.8byte	.LVL65
-	.8byte	.LFE277
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL62
-	.8byte	.LVL64
+	.8byte	.LVL46
+	.8byte	.LVL47
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL64
-	.8byte	.LFE277
+	.byte	0x66
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LFE269
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL66
-	.8byte	.LFE277
+.LLST11:
+	.8byte	.LVL50
+	.8byte	.LVL55
 	.2byte	0x1
-	.byte	0x55
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 	.8byte	0
 	.8byte	0
-.LLST22:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL66
-	.8byte	.LFE277
+.LLST12:
+	.8byte	.LVL41
+	.8byte	.LVL44
 	.2byte	0x1
-	.byte	0x54
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+	.8byte	.LVL46
+	.8byte	.LFE269
+	.2byte	0x1
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 	.8byte	0
 	.8byte	0
-.LLST16:
+.LLST13:
+	.8byte	.LVL50
 	.8byte	.LVL56
-	.8byte	.LVL58-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL58-1
-	.8byte	.LVL59
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
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+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x3
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+	.sleb128 -8
+	.byte	0x9f
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+	.8byte	.LFE269
+	.2byte	0x3
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+	.sleb128 -40
 	.byte	0x9f
-	.8byte	.LVL59
-	.8byte	.LFE276
-	.2byte	0x1
-	.byte	0x50
 	.8byte	0
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-	.8byte	.LVL56
-	.8byte	.LVL58-1
-	.2byte	0x1
-	.byte	0x50
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-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
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+	.8byte	.LVL38
+	.8byte	.LVL43
+	.2byte	0x2
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-	.8byte	.LVL59
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL51
+	.2byte	0x2
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+	.8byte	.LVL52
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL56
-	.8byte	.LVL57
+	.8byte	.LVL52
+	.8byte	.LVL54
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL57
-	.8byte	.LVL58-1
+	.8byte	.LVL54
+	.8byte	.LVL58
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL59
+	.byte	0x50
 	.8byte	.LVL60
+	.8byte	.LFE269
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL60
-	.8byte	.LVL61
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
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 	.8byte	0
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-	.8byte	.LVL13
-	.8byte	.LVL17-1
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+	.8byte	.LVL103
+	.8byte	.LVL104
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL17-1
-	.8byte	.LVL31
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL31
-	.8byte	.LVL33
+	.8byte	.LVL104
+	.8byte	.LFE257
 	.2byte	0x4
 	.byte	0xf3
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 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST3:
-	.8byte	.LVL13
-	.8byte	.LVL16
+.LLST30:
+	.8byte	.LVL103
+	.8byte	.LVL106-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL16
-	.8byte	.LVL17-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL17-1
-	.8byte	.LVL32
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL32
-	.8byte	.LVL33
+	.8byte	.LVL106-1
+	.8byte	.LFE257
 	.2byte	0x4
 	.byte	0xf3
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 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL15
-	.8byte	.LVL16
+.LLST31:
+	.8byte	.LVL103
+	.8byte	.LVL106-1
 	.2byte	0x1
-	.byte	0x51
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-	.8byte	.LVL17-1
+	.byte	0x52
+	.8byte	.LVL106-1
+	.8byte	.LVL113
 	.2byte	0x1
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+	.8byte	.LVL113
+	.8byte	.LVL194
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x52
-	.8byte	.LVL17-1
-	.8byte	.LVL30
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL195
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x67
+	.byte	0x6a
+	.8byte	.LVL195
+	.8byte	.LFE257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST5:
-	.8byte	.LVL14
-	.8byte	.LVL17-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL17-1
-	.8byte	.LVL30
+.LLST32:
+	.8byte	.LVL103
+	.8byte	.LVL106-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL33
-	.8byte	.LFE275
+	.byte	0x53
+	.8byte	.LVL106-1
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 	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL19
-	.8byte	.LVL20
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6b
+	.8byte	.LVL126
+	.8byte	.LVL159
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL20
-	.8byte	.LVL23-1
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+	.8byte	.LVL162
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL26
-	.8byte	.LVL28
+	.byte	0x6b
+	.8byte	.LVL162
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL33
-	.8byte	.LVL35
+	.byte	0x6b
+	.8byte	.LVL175
+	.8byte	.LVL193
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
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 	.2byte	0x1
-	.byte	0x51
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+	.8byte	.LFE257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST7:
-	.8byte	.LVL17
-	.8byte	.LVL18
+.LLST33:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL110
+	.8byte	.LVL111
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL123
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL18
-	.8byte	.LVL22
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL124
+	.8byte	.LVL125
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL129
+	.8byte	.LVL153
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL22
-	.8byte	.LVL25
+	.8byte	.LVL153
+	.8byte	.LVL154
 	.2byte	0x3
 	.byte	0x8c
-	.sleb128 -1
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL25
-	.8byte	.LVL30
+	.8byte	.LVL159
+	.8byte	.LVL160
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL162
+	.8byte	.LVL169
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL33
-	.8byte	.LVL37
+	.8byte	.LVL178
+	.8byte	.LVL179
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL17
-	.8byte	.LVL18
-	.2byte	0x6
-	.byte	0x9e
-	.uleb128 0x4
-	.4byte	0x80808080
-	.8byte	.LVL18
-	.8byte	.LVL30
+	.byte	0x6b
+	.8byte	.LVL182
+	.8byte	.LVL186
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL33
-	.8byte	.LVL38
+	.byte	0x6b
+	.8byte	.LVL189
+	.8byte	.LVL193
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x6b
+	.8byte	.LVL194
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL17
-	.8byte	.LVL18
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40404040
-	.byte	0x9f
-	.8byte	.LVL18
-	.8byte	.LVL30
+.LLST34:
+	.8byte	.LVL112
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL115
+	.8byte	.LVL118
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL118
+	.8byte	.LVL127
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL33
-	.8byte	.LVL36
+	.8byte	.LVL159
+	.8byte	.LVL162
 	.2byte	0x1
 	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL15
-	.8byte	.LVL18
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL17
-	.8byte	.LVL31
+	.8byte	.LVL169
+	.8byte	.LVL187
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL31
-	.8byte	.LVL33
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL33
-	.8byte	.LFE275
+	.byte	0x69
+	.8byte	.LVL187
+	.8byte	.LVL188
 	.2byte	0x1
 	.byte	0x66
+	.8byte	.LVL188
+	.8byte	.LVL194
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL194
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST12:
-	.8byte	.LVL15
-	.8byte	.LVL21
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST35:
+	.8byte	.LVL133
+	.8byte	.LVL136
+	.2byte	0x2
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL25
-	.8byte	.LVL27
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL136
+	.8byte	.LVL139
+	.2byte	0x2
+	.byte	0x33
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL30
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL33
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL139
+	.8byte	.LVL141
+	.2byte	0x2
+	.byte	0x34
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL41
-	.8byte	.LVL42
+	.8byte	.LVL145
+	.8byte	.LVL148
 	.2byte	0x2
-	.byte	0x30
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LVL44
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL47
-	.8byte	.LVL51
+	.8byte	.LVL148
+	.8byte	.LVL151
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL151
+	.8byte	.LVL153
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL162
+	.8byte	.LVL163
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL165
+	.8byte	.LVL166
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL167
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL167
+	.8byte	.LVL169
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL184
+	.8byte	.LVL187
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL54
-	.8byte	.LFE275
+	.byte	0x69
+	.8byte	.LVL187
+	.8byte	.LVL189
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x66
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST14:
-	.8byte	.LVL38
-	.8byte	.LVL45
+.LLST36:
+	.8byte	.LVL127
+	.8byte	.LVL157
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL45
-	.8byte	.LVL46
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL46
-	.8byte	.LFE275
+	.byte	0x69
+	.8byte	.LVL162
+	.8byte	.LVL169
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x69
+	.8byte	.LVL176
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST15:
-	.8byte	.LVL38
-	.8byte	.LVL43
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL46
-	.8byte	.LVL49
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST37:
+	.8byte	.LVL105
+	.8byte	.LVL157
+	.2byte	0x2
+	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL49
-	.8byte	.LVL54
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL54
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL159
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x31
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL120
-	.8byte	.LVL122
+	.8byte	.LVL171
+	.8byte	.LVL172
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL122
-	.8byte	.LVL142
+	.8byte	.LVL172
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL193
+	.8byte	.LVL194
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL142
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x50
+	.8byte	.LVL194
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST44:
-	.8byte	.LVL120
-	.8byte	.LVL121
-	.2byte	0x1
-	.byte	0x51
+.LLST38:
+	.8byte	.LVL105
 	.8byte	.LVL121
-	.8byte	.LVL130
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL130
-	.8byte	.LVL131
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 32
-	.byte	0x9f
-	.8byte	.LVL131
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL128
-	.8byte	.LVL132
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL135
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL135
-	.8byte	.LVL141
+	.8byte	.LVL121
+	.8byte	.LVL122
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL128
-	.8byte	.LVL132
+	.byte	0x50
+	.8byte	.LVL159
+	.8byte	.LVL162
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL132
-	.8byte	.LVL136
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL136
-	.8byte	.LVL137
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -8
-	.byte	0x9f
-	.8byte	.LVL137
-	.8byte	.LVL141
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -40
+	.8byte	.LVL169
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL137
-	.8byte	.LVL141
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL123
-	.8byte	.LVL134
+.LLST39:
+	.8byte	.LVL105
+	.8byte	.LVL133
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL133
 	.8byte	.LVL134
-	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL140
-	.8byte	.LFE272
+	.8byte	.LVL134
+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL137
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL126
-	.8byte	.LVL129
+	.8byte	.LVL137
+	.8byte	.LVL139
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST51:
-	.8byte	.LVL125
-	.8byte	.LVL126
+	.byte	0x63
+	.8byte	.LVL139
+	.8byte	.LVL140
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST52:
+	.byte	0x50
+	.8byte	.LVL140
 	.8byte	.LVL143
-	.8byte	.LVL144
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL144
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST53:
+	.byte	0x63
 	.8byte	.LVL143
+	.8byte	.LVL145
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL145
 	.8byte	.LVL146
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x50
 	.8byte	.LVL146
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST54:
-	.8byte	.LVL143
-	.8byte	.LVL145
+	.8byte	.LVL147-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL145
-	.8byte	.LVL164
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL164
-	.8byte	.LVL225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LVL226
+	.8byte	.LVL147-1
+	.8byte	.LVL148
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 200
+	.8byte	.LVL148
+	.8byte	.LVL149
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL226
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST55:
-	.8byte	.LVL143
-	.8byte	.LVL146
+	.byte	0x50
+	.8byte	.LVL149
+	.8byte	.LVL151
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL146
-	.8byte	.LVL173
+	.byte	0x66
+	.8byte	.LVL151
+	.8byte	.LVL152-1
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL173
-	.8byte	.LVL174
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL174
-	.8byte	.LVL177
+	.byte	0x50
+	.8byte	.LVL152-1
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL177
-	.8byte	.LVL190
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x63
+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL190
-	.8byte	.LVL194
+	.8byte	.LVL155
+	.8byte	.LVL158
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL194
-	.8byte	.LVL198
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x63
+	.8byte	.LVL159
+	.8byte	.LVL162
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL198
-	.8byte	.LVL208
+	.8byte	.LVL162
+	.8byte	.LVL164
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL208
-	.8byte	.LVL225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LVL230
+	.byte	0x50
+	.8byte	.LVL164
+	.8byte	.LVL165
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL230
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x63
+	.8byte	.LVL165
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL169
+	.8byte	.LVL179
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST56:
-	.8byte	.LVL154
-	.8byte	.LVL156
+	.8byte	.LVL179
+	.8byte	.LVL181
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL156
-	.8byte	.LVL157
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 1
+	.byte	0x63
+	.8byte	.LVL181
+	.8byte	.LVL184
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL163
-	.8byte	.LVL164
+	.8byte	.LVL184
+	.8byte	.LVL185-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL180
-	.8byte	.LVL190
+	.byte	0x50
+	.8byte	.LVL185-1
+	.8byte	.LVL189
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL191
+	.byte	0x63
+	.8byte	.LVL189
 	.8byte	.LVL192
 	.2byte	0x2
-	.byte	0x31
+	.byte	0x30
 	.byte	0x9f
 	.8byte	.LVL192
 	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL193
+	.8byte	.LVL200
 	.2byte	0x2
-	.byte	0x33
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL193
-	.8byte	.LVL194
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL105
+	.8byte	.LVL155
 	.2byte	0x2
-	.byte	0x34
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL198
+	.8byte	.LVL155
+	.8byte	.LVL156
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL210
-	.8byte	.LVL211
+	.byte	0x52
+	.8byte	.LVL159
+	.8byte	.LVL179
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL179
+	.8byte	.LVL180
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL214
-	.8byte	.LVL218
+	.byte	0x50
+	.8byte	.LVL181
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL33
+	.8byte	.LVL34
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL221
-	.8byte	.LVL225
+	.byte	0x50
+	.8byte	.LVL34
+	.8byte	.LFE255
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL31
+	.8byte	.LVL32
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL225
-	.8byte	.LVL227
+	.byte	0x50
+	.8byte	.LVL32
+	.8byte	.LFE254
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL232
-	.8byte	.LVL242
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL12
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL242
-	.8byte	.LVL243
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
+	.byte	0x67
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST57:
-	.8byte	.LVL163
-	.8byte	.LVL164
+.LLST1:
+	.8byte	.LVL0
+	.8byte	.LVL2-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL166
-	.8byte	.LVL178
+	.byte	0x51
+	.8byte	.LVL2-1
+	.8byte	.LVL12
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL190
-	.8byte	.LVL194
+	.byte	0x68
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LFE201
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL198
-	.8byte	.LVL219
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL2
+	.8byte	.LVL3
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL3
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL219
-	.8byte	.LVL220
+	.byte	0x64
+	.8byte	.LVL13
+	.8byte	.LVL22
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL220
-	.8byte	.LVL230
+	.byte	0x64
+	.8byte	.LVL23
+	.8byte	.LFE201
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST58:
-	.8byte	.LVL183
-	.8byte	.LVL185
+.LLST3:
+	.8byte	.LVL24
+	.8byte	.LVL25
 	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL185
-	.8byte	.LVL188
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL188
-	.8byte	.LVL190
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL195
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL195
-	.8byte	.LVL197
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL197
-	.8byte	.LVL198
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL216
-	.8byte	.LVL219
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL219
-	.8byte	.LVL221
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL224
-	.8byte	.LVL225
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL232
-	.8byte	.LVL234
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL234
-	.8byte	.LVL237
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL237
-	.8byte	.LVL240
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL240
-	.8byte	.LVL242
-	.2byte	0x2
-	.byte	0x34
+	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST59:
-	.8byte	.LVL178
-	.8byte	.LVL190
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL194
-	.8byte	.LVL198
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL208
-	.8byte	.LVL225
+	.byte	0x6b
+	.8byte	.LVL13
+	.8byte	.LVL21
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL232
-	.8byte	.LVL247
+	.byte	0x6b
+	.8byte	.LVL22
+	.8byte	.LFE201
 	.2byte	0x1
-	.byte	0x6a
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST60:
-	.8byte	.LVL146
-	.8byte	.LVL171
-	.2byte	0x2
-	.byte	0x31
+.LLST5:
+	.8byte	.LVL3
+	.8byte	.LVL4
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL171
-	.8byte	.LVL174
+	.8byte	.LVL4
+	.8byte	.LVL5
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL174
-	.8byte	.LVL202
-	.2byte	0x2
-	.byte	0x31
+	.byte	0x6c
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL202
-	.8byte	.LVL203
+	.8byte	.LVL6
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL203
-	.8byte	.LVL208
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL208
-	.8byte	.LVL225
+	.byte	0x6c
+	.8byte	.LVL13
+	.8byte	.LVL22
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL225
-	.8byte	.LVL230
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL245
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST61:
-	.8byte	.LVL146
-	.8byte	.LVL183
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL183
-	.8byte	.LVL184
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL185
-	.8byte	.LVL186
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL188
-	.8byte	.LVL189
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL189
-	.8byte	.LVL190
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL190
-	.8byte	.LVL194
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL194
-	.8byte	.LVL197
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL197
-	.8byte	.LVL198
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL198
-	.8byte	.LVL211
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL211
-	.8byte	.LVL213
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL213
-	.8byte	.LVL216
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL216
-	.8byte	.LVL217-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL217-1
-	.8byte	.LVL221
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL221
-	.8byte	.LVL224
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL224
-	.8byte	.LVL225
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL225
-	.8byte	.LVL230
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL234
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL234
-	.8byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL235
-	.8byte	.LVL237
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL237
-	.8byte	.LVL238
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL238
-	.8byte	.LVL240
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL240
-	.8byte	.LVL241-1
+.LLST6:
+	.8byte	.LVL18
+	.8byte	.LVL19
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL241-1
-	.8byte	.LVL242
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL242
-	.8byte	.LVL244
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL244
-	.8byte	.LVL246
+	.8byte	.LVL19
+	.8byte	.LFE201
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST62:
-	.8byte	.LVL146
-	.8byte	.LVL211
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL211
-	.8byte	.LVL212
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL213
-	.8byte	.LVL230
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL244
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x7c
 	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL244
-	.8byte	.LVL245
-	.2byte	0x1
-	.byte	0x6b
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
 	.8byte	0
 	.8byte	0
-.LLST63:
-	.8byte	.LVL146
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL157
-	.8byte	.LVL163
-	.2byte	0x1
-	.byte	0x65
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB10
+	.8byte	.LBE10
+	.8byte	.LBB16
+	.8byte	.LBE16
+	.8byte	.LBB17
+	.8byte	.LBE17
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB22
+	.8byte	.LBE22
 	.8byte	0
 	.8byte	0
-.LLST64:
-	.8byte	.LVL146
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL157
-	.8byte	.LVL163
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LBB19
+	.8byte	.LBE19
+	.8byte	.LBB23
+	.8byte	.LBE23
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL146
-	.8byte	.LVL147
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL147
-	.8byte	.LVL148
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL149
-	.8byte	.LVL150
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL152
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL157
-	.8byte	.LVL158
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL158
-	.8byte	.LVL159
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL160
-	.8byte	.LVL161
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL161
-	.8byte	.LVL162
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST66:
-	.8byte	.LVL146
-	.8byte	.LVL153
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL157
-	.8byte	.LVL163
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST67:
-	.8byte	.LVL168
-	.8byte	.LVL169
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL169
-	.8byte	.LVL170
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL170
-	.8byte	.LVL171
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL198
-	.8byte	.LVL199
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL199
-	.8byte	.LVL200
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL200
-	.8byte	.LVL201
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL204
-	.8byte	.LVL205
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL206
-	.8byte	.LVL207
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL207
-	.8byte	.LVL208
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST68:
-	.8byte	.LVL199
-	.8byte	.LVL202
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL203
-	.8byte	.LVL208
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL6
-	.8byte	.LVL7
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL7
-	.8byte	.LFE258
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST1:
-	.8byte	.LVL2
-	.8byte	.LVL3
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL3
-	.8byte	.LVL4
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL7
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL10
-	.8byte	.LVL11
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL11
-	.8byte	.LFE258
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST36:
-	.8byte	.LVL86
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL87
-	.8byte	.LVL101
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL102
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST37:
-	.8byte	.LVL86
-	.8byte	.LVL88-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL88-1
-	.8byte	.LVL101
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL102
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST38:
-	.8byte	.LVL88
-	.8byte	.LVL89
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL89
-	.8byte	.LVL100
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL102
-	.8byte	.LVL111
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL112
-	.8byte	.LFE201
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST39:
-	.8byte	.LVL95
-	.8byte	.LVL96
-	.2byte	0x2
-	.byte	0x30
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+	.string	"UCLASS_VIDEO"
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+.LASF279:
+	.string	"relocaddr"
+.LASF384:
+	.string	"dev_head"
+.LASF350:
+	.string	"net_boot_file_size"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF169:
+	.string	"UCLASS_ROOT"
 .LASF44:
 	.string	"ide_bus_offset"
-.LASF52:
-	.string	"sector_count"
-.LASF154:
-	.string	"fit_noffset_setup"
-.LASF131:
-	.string	"image_start"
-.LASF56:
-	.string	"flash_info_t"
-.LASF236:
-	.string	"UCLASS_SYSRESET"
-.LASF395:
-	.string	"CHANGEFREQ"
-.LASF473:
-	.string	"exit"
-.LASF336:
-	.string	"net_ip"
-.LASF384:
-	.string	"data"
-.LASF299:
-	.string	"video_top"
-.LASF255:
-	.string	"LOGF_MAX_CATEGORIES"
-.LASF356:
-	.string	"net_state"
-.LASF282:
-	.string	"start_addr_sp"
-.LASF144:
-	.string	"fit_uname_os"
+.LASF407:
+	.string	"test_pat_param"
+.LASF337:
+	.string	"net_server_ethaddr"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF3:
+	.string	"signed char"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
 .LASF18:
 	.string	"uint8_t"
-.LASF7:
-	.string	"__u32"
-.LASF426:
-	.string	"cmp_value"
-.LASF364:
-	.string	"unbind"
-.LASF280:
+.LASF374:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF45:
+	.string	"udevice"
+.LASF125:
+	.string	"ih_arch"
+.LASF106:
+	.string	"totalsize"
+.LASF434:
+	.string	"abort"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF281:
 	.string	"mon_len"
-.LASF355:
-	.string	"NETLOOP_FAIL"
-.LASF455:
-	.string	"crosstalk"
-.LASF366:
-	.string	"child_post_bind"
-.LASF305:
-	.string	"full_name"
+.LASF133:
+	.string	"load"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF416:
+	.string	"cmp_value"
+.LASF59:
+	.string	"lmb_property"
+.LASF111:
+	.string	"last_comp_version"
+.LASF0:
+	.string	"unsigned char"
+.LASF391:
+	.string	"pre_probe"
 .LASF400:
-	.string	"FASTTEST"
-.LASF193:
-	.string	"UCLASS_I2C_EEPROM"
-.LASF296:
-	.string	"malloc_limit"
-.LASF138:
-	.string	"bootm_headers"
-.LASF272:
-	.string	"mem_clk"
-.LASF438:
-	.string	"test_case"
-.LASF168:
-	.string	"uclass_id"
-.LASF344:
-	.string	"net_our_vlan"
-.LASF95:
-	.string	"repeatable"
-.LASF319:
-	.string	"enetaddr"
+	.string	"RANDOM"
+.LASF166:
+	.string	"images"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF120:
+	.string	"ih_size"
+.LASF39:
+	.string	"uclass_node"
+.LASF23:
+	.string	"_Bool"
+.LASF375:
+	.string	"property"
+.LASF358:
+	.string	"net_state"
+.LASF377:
+	.string	"value"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF14:
+	.string	"char"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF406:
+	.string	"test_pattern"
+.LASF356:
+	.string	"NETLOOP_SUCCESS"
+.LASF36:
+	.string	"uclass"
+.LASF381:
+	.string	"p_current"
+.LASF383:
+	.string	"uc_drv"
+.LASF353:
+	.string	"net_loop_state"
+.LASF43:
+	.string	"req_seq"
 .LASF310:
-	.string	"monitor_flash_len"
-.LASF368:
-	.string	"child_post_remove"
-.LASF371:
-	.string	"per_child_auto_alloc_size"
+	.string	"sibling"
+.LASF287:
+	.string	"dm_root_f"
+.LASF321:
+	.string	"enetaddr"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF439:
+	.string	"times"
+.LASF379:
+	.string	"of_offset"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF348:
+	.string	"net_restart_wrap"
+.LASF336:
+	.string	"net_ethaddr"
+.LASF42:
+	.string	"flags"
+.LASF425:
+	.string	"cmdtp"
+.LASF126:
+	.string	"ih_type"
+.LASF107:
+	.string	"off_dt_struct"
+.LASF443:
+	.string	"crosstalk"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF349:
+	.string	"net_boot_file_name"
+.LASF386:
+	.string	"compatible"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF119:
+	.string	"ih_time"
+.LASF274:
+	.string	"fb_base"
+.LASF271:
+	.string	"bus_clk"
 .LASF222:
 	.string	"UCLASS_RAM"
-.LASF325:
-	.string	"write_hwaddr"
-.LASF365:
-	.string	"ofdata_to_platdata"
-.LASF217:
-	.string	"UCLASS_PINCTRL"
-.LASF469:
-	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
 .LASF130:
 	.string	"image_info"
-.LASF29:
-	.string	"platdata"
-.LASF257:
-	.string	"timer_rate_hz"
-.LASF89:
-	.string	"_datarelrolocal_start_ofs"
-.LASF175:
-	.string	"UCLASS_SPI_EMUL"
-.LASF206:
-	.string	"UCLASS_MOD_EXP"
-.LASF105:
-	.string	"totalsize"
-.LASF385:
-	.string	"uclass_driver"
-.LASF432:
-	.string	"get_page_size"
-.LASF73:
-	.string	"bi_arm_freq"
-.LASF324:
-	.string	"halt"
-.LASF414:
-	.string	"print_memory"
-.LASF129:
-	.string	"image_header_t"
-.LASF93:
-	.string	"cmd_tbl_s"
-.LASF68:
-	.string	"bi_flashstart"
+.LASF136:
+	.string	"arch"
+.LASF273:
+	.string	"mem_clk"
+.LASF459:
+	.string	"write_buf_to_ddr"
+.LASF270:
+	.string	"cpu_clk"
+.LASF50:
+	.string	"select_hwpart"
+.LASF341:
+	.string	"net_rx_packets"
+.LASF359:
+	.string	"mem_malloc_start"
 .LASF91:
 	.string	"_datarelro_start_ofs"
-.LASF410:
-	.string	"buful"
-.LASF346:
-	.string	"net_restart_wrap"
-.LASF383:
-	.string	"compatible"
-.LASF176:
-	.string	"UCLASS_I2C_EMUL"
-.LASF271:
-	.string	"pci_clk"
-.LASF184:
-	.string	"UCLASS_CPU"
-.LASF343:
-	.string	"net_null_ethaddr"
-.LASF250:
-	.string	"UCLASS_RC"
-.LASF337:
-	.string	"net_server_ip"
-.LASF402:
-	.string	"TESTCASSMAX"
-.LASF51:
-	.string	"size"
-.LASF58:
-	.string	"long double"
-.LASF401:
-	.string	"FULLTEST"
+.LASF17:
+	.string	"ulong"
+.LASF122:
+	.string	"ih_ep"
+.LASF61:
+	.string	"lmb_region"
+.LASF467:
+	.string	"do_ddr_test"
+.LASF447:
+	.string	"printf"
+.LASF144:
+	.string	"fit_uname_os"
 .LASF76:
 	.string	"bi_bootflags"
-.LASF83:
-	.string	"bi_boot_params"
-.LASF55:
-	.string	"protect"
-.LASF412:
-	.string	"reread"
-.LASF295:
-	.string	"malloc_base"
+.LASF338:
+	.string	"net_ip"
+.LASF291:
+	.string	"fdt_size"
+.LASF332:
+	.string	"net_dns_server"
+.LASF352:
+	.string	"net_ping_ip"
+.LASF63:
+	.string	"memory"
+.LASF104:
+	.string	"fdt_header"
+.LASF360:
+	.string	"mem_malloc_end"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF156:
+	.string	"rd_end"
+.LASF363:
+	.string	"bind"
+.LASF282:
+	.string	"irq_sp"
+.LASF161:
+	.string	"cmdline_start"
+.LASF328:
+	.string	"index"
+.LASF269:
+	.string	"global_data"
+.LASF395:
+	.string	"per_device_auto_alloc_size"
+.LASF456:
+	.string	"ctrlc"
+.LASF95:
+	.string	"repeatable"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
 .LASF1:
 	.string	"long unsigned int"
-.LASF170:
-	.string	"UCLASS_DEMO"
-.LASF116:
-	.string	"image_header"
-.LASF110:
-	.string	"last_comp_version"
-.LASF311:
-	.string	"__dtb_dt_begin"
 .LASF179:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF189:
-	.string	"UCLASS_ETH"
-.LASF394:
+.LASF442:
+	.string	"freq"
+.LASF311:
+	.string	"gd_t"
+.LASF333:
+	.string	"net_nis_domain"
+.LASF397:
 	.string	"console_buffer"
-.LASF162:
-	.string	"cmdline_end"
-.LASF436:
-	.string	"argc"
-.LASF75:
-	.string	"bi_ddr_freq"
-.LASF106:
-	.string	"off_dt_struct"
-.LASF302:
-	.string	"serial"
-.LASF329:
-	.string	"net_netmask"
-.LASF65:
-	.string	"bd_info"
-.LASF161:
-	.string	"cmdline_start"
-.LASF166:
-	.string	"images"
-.LASF265:
-	.string	"using_pre_serial"
-.LASF139:
-	.string	"legacy_hdr_os"
-.LASF202:
-	.string	"UCLASS_MAILBOX"
-.LASF226:
-	.string	"UCLASS_RKNAND"
-.LASF147:
-	.string	"fit_uname_rd"
-.LASF403:
-	.string	"g_isi_pattern"
-.LASF223:
-	.string	"UCLASS_REGULATOR"
-.LASF77:
-	.string	"bi_ip_addr"
-.LASF301:
-	.string	"pm_ctx_phys"
-.LASF251:
-	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF33:
-	.string	"driver_data"
-.LASF396:
-	.string	"SCANFREQ"
-.LASF392:
-	.string	"per_device_auto_alloc_size"
-.LASF11:
-	.string	"phys_addr_t"
-.LASF444:
-	.string	"do_ddr_test"
-.LASF387:
-	.string	"pre_unbind"
-.LASF13:
-	.string	"sizetype"
-.LASF338:
-	.string	"net_tx_packet"
-.LASF159:
-	.string	"initrd_start"
-.LASF99:
-	.string	"cmd_tbl_t"
-.LASF34:
-	.string	"parent"
-.LASF6:
-	.string	"short int"
-.LASF415:
-	.string	"write_buf_to_ddr"
-.LASF125:
-	.string	"ih_arch"
-.LASF452:
-	.string	"get_test_addr"
-.LASF306:
-	.string	"properties"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF420:
+	.string	"next_adr"
+.LASF411:
+	.string	"wr_value"
+.LASF357:
+	.string	"NETLOOP_FAIL"
 .LASF247:
 	.string	"UCLASS_WDT"
-.LASF454:
-	.string	"available"
-.LASF397:
-	.string	"RANDOM"
-.LASF374:
-	.string	"length"
-.LASF331:
-	.string	"net_nis_domain"
-.LASF121:
-	.string	"ih_load"
-.LASF292:
-	.string	"env_buf"
-.LASF354:
-	.string	"NETLOOP_SUCCESS"
-.LASF472:
-	.string	"ofnode_union"
+.LASF260:
+	.string	"timer_reset_value"
+.LASF283:
+	.string	"start_addr_sp"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF284:
+	.string	"reloc_off"
+.LASF457:
+	.string	"judge_test_addr"
+.LASF112:
+	.string	"boot_cpuid_phys"
+.LASF259:
+	.string	"lastinc"
+.LASF263:
+	.string	"tlb_fillptr"
+.LASF440:
+	.string	"set_vdd_logic"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF346:
+	.string	"net_our_vlan"
+.LASF303:
+	.string	"serial"
+.LASF364:
+	.string	"probe"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF137:
+	.string	"image_info_t"
 .LASF178:
 	.string	"UCLASS_USB_EMUL"
-.LASF172:
-	.string	"UCLASS_TEST_FDT"
-.LASF115:
-	.string	"fdt32_t"
+.LASF427:
+	.string	"argc"
+.LASF261:
+	.string	"tlb_addr"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF428:
+	.string	"argv"
+.LASF132:
+	.string	"image_len"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF324:
+	.string	"send"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF405:
+	.string	"TESTCASSMAX"
+.LASF431:
+	.string	"test_times"
+.LASF167:
+	.string	"command_ret_t"
 .LASF290:
-	.string	"fdt_size"
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF351:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF438:
+	.string	"max_freq"
+.LASF362:
+	.string	"of_match"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF264:
+	.string	"tlb_emerg"
+.LASF138:
+	.string	"bootm_headers"
+.LASF455:
+	.string	"strict_strtoul"
+.LASF55:
+	.string	"protect"
+.LASF240:
+	.string	"UCLASS_USB"
 .LASF435:
-	.string	"flag"
+	.string	"scan_freq_loop"
+.LASF388:
+	.string	"uclass_driver"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF294:
+	.string	"timebase_h"
+.LASF295:
+	.string	"timebase_l"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF345:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
 .LASF404:
-	.string	"test_pattern"
-.LASF434:
-	.string	"cmdtp"
-.LASF17:
-	.string	"ulong"
-.LASF119:
-	.string	"ih_time"
-.LASF120:
-	.string	"ih_size"
-.LASF188:
-	.string	"UCLASS_DMA"
+	.string	"FULLTEST"
+.LASF34:
+	.string	"parent"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF38:
+	.string	"parent_priv"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF315:
+	.string	"load_addr"
+.LASF98:
+	.string	"complete"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
 .LASF97:
 	.string	"help"
-.LASF445:
-	.string	"set_vdd_logic"
+.LASF268:
+	.string	"addr"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
 .LASF320:
-	.string	"iobase"
-.LASF224:
-	.string	"UCLASS_REMOTEPROC"
-.LASF352:
-	.string	"NETLOOP_CONTINUE"
-.LASF228:
-	.string	"UCLASS_RTC"
-.LASF259:
-	.string	"timer_reset_value"
-.LASF96:
-	.string	"usage"
+	.string	"eth_device"
+.LASF371:
+	.string	"priv_auto_alloc_size"
+.LASF297:
+	.string	"malloc_limit"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF410:
+	.string	"capacity"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF108:
+	.string	"off_dt_strings"
+.LASF312:
+	.string	"monitor_flash_len"
 .LASF204:
 	.string	"UCLASS_MISC"
-.LASF62:
-	.string	"region"
-.LASF157:
-	.string	"ft_addr"
-.LASF398:
-	.string	"CROSSTALK"
-.LASF470:
-	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
-.LASF28:
-	.string	"name"
-.LASF54:
-	.string	"start"
-.LASF153:
-	.string	"fit_uname_setup"
-.LASF123:
-	.string	"ih_dcrc"
+.LASF67:
+	.string	"bi_memsize"
+.LASF426:
+	.string	"flag"
 .LASF24:
 	.string	"image_base"
-.LASF390:
-	.string	"pre_remove"
-.LASF169:
-	.string	"UCLASS_ROOT"
-.LASF104:
-	.string	"magic"
-.LASF248:
-	.string	"UCLASS_FG"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF382:
+	.string	"current"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF437:
+	.string	"min_freq"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF306:
+	.string	"phandle"
+.LASF300:
+	.string	"video_top"
+.LASF396:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF450:
+	.string	"data_cpu_2_io"
+.LASF325:
+	.string	"recv"
+.LASF135:
+	.string	"type"
 .LASF146:
 	.string	"fit_hdr_rd"
-.LASF149:
-	.string	"fit_hdr_fdt"
-.LASF461:
-	.string	"strcasecmp"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF436:
+	.string	"scan_freq"
+.LASF419:
+	.string	"start_adr"
+.LASF288:
+	.string	"uclass_root"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF432:
+	.string	"test_banks"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF409:
+	.string	"baseaddr"
+.LASF463:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF155:
+	.string	"rd_start"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF317:
+	.string	"save_size"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF322:
+	.string	"iobase"
 .LASF417:
-	.string	"cmp_buf_data"
-.LASF122:
-	.string	"ih_ep"
-.LASF283:
-	.string	"reloc_off"
-.LASF321:
-	.string	"init"
-.LASF246:
-	.string	"UCLASS_VIDEO_CRTC"
-.LASF243:
-	.string	"UCLASS_VIDEO"
-.LASF214:
-	.string	"UCLASS_PCI_GENERIC"
-.LASF440:
-	.string	"test_times"
-.LASF5:
-	.string	"__u8"
-.LASF376:
-	.string	"of_offset"
+	.string	"random_test"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF265:
+	.string	"pre_serial"
+.LASF128:
+	.string	"ih_name"
+.LASF423:
+	.string	"next_col"
+.LASF124:
+	.string	"ih_os"
+.LASF162:
+	.string	"cmdline_end"
+.LASF342:
+	.string	"net_rx_packet"
 .LASF256:
-	.string	"arch_global_data"
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF289:
+	.string	"fdt_blob"
+.LASF385:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF394:
+	.string	"destroy"
+.LASF116:
+	.string	"image_header"
+.LASF376:
+	.string	"length"
+.LASF20:
+	.string	"__be32"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF327:
+	.string	"write_hwaddr"
+.LASF462:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF255:
+	.string	"UCLASS_INVALID"
+.LASF458:
+	.string	"data_cpu_2_io_init"
 .LASF94:
 	.string	"maxargs"
-.LASF88:
-	.string	"_datarel_start_ofs"
-.LASF25:
-	.string	"_binary_u_boot_bin_start"
-.LASF303:
-	.string	"device_node"
-.LASF261:
-	.string	"tlb_size"
-.LASF66:
-	.string	"bi_memstart"
-.LASF118:
-	.string	"ih_hcrc"
-.LASF443:
-	.string	"scan_freq_loop"
-.LASF82:
-	.string	"bi_arch_number"
-.LASF112:
-	.string	"size_dt_strings"
-.LASF339:
-	.string	"net_rx_packets"
-.LASF63:
-	.string	"memory"
-.LASF27:
-	.string	"driver"
-.LASF156:
-	.string	"rd_end"
-.LASF203:
-	.string	"UCLASS_MASS_STORAGE"
-.LASF316:
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF402:
+	.string	"DIAGONALSCAN"
+.LASF370:
+	.string	"child_post_remove"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF41:
+	.string	"sibling_node"
+.LASF292:
+	.string	"of_root"
+.LASF446:
+	.string	"memset"
+.LASF57:
+	.string	"flash_info"
+.LASF110:
+	.string	"version"
+.LASF326:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF114:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF304:
+	.string	"sys_start_tick"
+.LASF308:
+	.string	"properties"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF103:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF453:
+	.string	"get_print_available_addr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF460:
+	.string	"malloc"
+.LASF368:
+	.string	"child_post_bind"
+.LASF466:
+	.string	"exit"
+.LASF318:
 	.string	"in_addr"
-.LASF449:
-	.string	"min_freq"
-.LASF430:
-	.string	"pattern"
-.LASF92:
-	.string	"IRQ_STACK_START_IN"
-.LASF160:
-	.string	"initrd_end"
-.LASF135:
-	.string	"type"
-.LASF341:
+.LASF343:
 	.string	"net_rx_packet_len"
-.LASF0:
-	.string	"unsigned char"
-.LASF229:
-	.string	"UCLASS_SCSI"
-.LASF16:
-	.string	"ushort"
-.LASF213:
-	.string	"UCLASS_PCI"
-.LASF348:
-	.string	"net_boot_file_size"
-.LASF391:
-	.string	"destroy"
-.LASF428:
-	.string	"next_adr"
-.LASF274:
-	.string	"have_console"
-.LASF281:
-	.string	"irq_sp"
-.LASF185:
-	.string	"UCLASS_CODEC"
+.LASF323:
+	.string	"init"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF313:
+	.string	"__dtb_dt_begin"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF424:
+	.string	"err_adr"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF163:
+	.string	"verify"
 .LASF380:
-	.string	"uc_drv"
-.LASF240:
-	.string	"UCLASS_USB"
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
+.LASF429:
+	.string	"test_case"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF412:
+	.string	"reread_val"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF422:
+	.string	"pattern"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF96:
+	.string	"usage"
+.LASF365:
+	.string	"remove"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF316:
+	.string	"save_addr"
+.LASF373:
+	.string	"per_child_auto_alloc_size"
+.LASF448:
+	.string	"flush_dcache_range"
+.LASF401:
+	.string	"CROSSTALK"
 .LASF298:
-	.string	"cur_serial_dev"
+	.string	"malloc_ptr"
+.LASF160:
+	.string	"initrd_end"
+.LASF390:
+	.string	"pre_unbind"
 .LASF267:
-	.string	"addr"
-.LASF46:
-	.string	"list_head"
-.LASF164:
-	.string	"state"
-.LASF20:
-	.string	"__be32"
-.LASF216:
-	.string	"UCLASS_PINCONFIG"
-.LASF241:
-	.string	"UCLASS_USB_DEV_GENERIC"
-.LASF342:
-	.string	"net_bcast_ethaddr"
-.LASF145:
-	.string	"fit_noffset_os"
-.LASF231:
-	.string	"UCLASS_SPI"
-.LASF422:
-	.string	"reread_val"
-.LASF468:
-	.ascii	"GNU C11 6.3.1 20170404 -ms"
-	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
-.LASF419:
-	.string	"baseaddr"
+	.string	"baudrate"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF257:
+	.string	"arch_global_data"
+.LASF254:
+	.string	"UCLASS_COUNT"
+.LASF272:
+	.string	"pci_clk"
+.LASF49:
+	.string	"block_drvr"
+.LASF451:
+	.string	"memcpy"
+.LASF53:
+	.string	"flash_id"
+.LASF305:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF115:
+	.string	"working_fdt"
 .LASF335:
-	.string	"net_server_ethaddr"
-.LASF439:
-	.string	"err_case"
-.LASF252:
-	.string	"UCLASS_DVFS"
-.LASF425:
-	.string	"random_test1"
-.LASF318:
-	.string	"eth_device"
-.LASF323:
-	.string	"recv"
-.LASF50:
-	.string	"select_hwpart"
-.LASF4:
-	.string	"uchar"
-.LASF69:
-	.string	"bi_flashsize"
-.LASF381:
-	.string	"dev_head"
-.LASF2:
-	.string	"short unsigned int"
-.LASF389:
+	.string	"net_root_path"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF85:
+	.string	"bd_t"
+.LASF319:
+	.string	"s_addr"
+.LASF392:
 	.string	"post_probe"
+.LASF344:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF19:
+	.string	"uint32_t"
+.LASF361:
+	.string	"mem_malloc_brk"
+.LASF330:
+	.string	"net_gateway"
+.LASF372:
+	.string	"platdata_auto_alloc_size"
+.LASF452:
+	.string	"cmp_buf_data"
+.LASF66:
+	.string	"bi_memstart"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF329:
+	.string	"eth_current"
+.LASF408:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
 .LASF367:
-	.string	"child_pre_probe"
-.LASF74:
-	.string	"bi_dsp_freq"
-.LASF411:
-	.string	"wr_val"
-.LASF459:
-	.string	"memcpy"
-.LASF347:
-	.string	"net_boot_file_name"
-.LASF254:
-	.string	"UCLASS_INVALID"
-.LASF379:
-	.string	"current"
-.LASF457:
-	.string	"__func__"
+	.string	"ofdata_to_platdata"
 .LASF64:
 	.string	"reserved"
-.LASF192:
-	.string	"UCLASS_I2C"
-.LASF128:
-	.string	"ih_name"
-.LASF277:
-	.string	"ram_top"
-.LASF180:
-	.string	"UCLASS_ADC"
-.LASF43:
-	.string	"req_seq"
-.LASF279:
-	.string	"ram_size"
-.LASF423:
-	.string	"err_addr"
-.LASF446:
-	.string	"set_ddr_freq"
-.LASF196:
-	.string	"UCLASS_I2S"
-.LASF369:
-	.string	"priv_auto_alloc_size"
-.LASF30:
-	.string	"parent_platdata"
-.LASF163:
-	.string	"verify"
-.LASF87:
-	.string	"FIQ_STACK_START"
-.LASF451:
-	.string	"times"
-.LASF464:
-	.string	"regulator_get_by_platname"
+.LASF398:
+	.string	"CHANGEFREQ"
+.LASF421:
+	.string	"page_size"
+.LASF403:
+	.string	"FASTTEST"
 .LASF84:
 	.string	"bi_dram"
-.LASF134:
-	.string	"comp"
-.LASF345:
-	.string	"net_native_vlan"
-.LASF429:
-	.string	"page_size"
-.LASF220:
-	.string	"UCLASS_POWER_DOMAIN"
-.LASF269:
-	.string	"cpu_clk"
-.LASF406:
-	.string	"_u_boot_list_2_cmd_2_ddr_test"
-.LASF244:
-	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF370:
-	.string	"platdata_auto_alloc_size"
-.LASF124:
-	.string	"ih_os"
-.LASF61:
-	.string	"lmb_region"
-.LASF249:
-	.string	"UCLASS_KEY"
+.LASF2:
+	.string	"short unsigned int"
+.LASF105:
+	.string	"magic"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF399:
+	.string	"SCANFREQ"
+.LASF60:
+	.string	"base"
+.LASF430:
+	.string	"err_case"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF258:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF127:
+	.string	"ih_comp"
+.LASF389:
+	.string	"post_bind"
+.LASF366:
+	.string	"unbind"
+.LASF157:
+	.string	"ft_addr"
+.LASF4:
+	.string	"uchar"
+.LASF158:
+	.string	"ft_len"
+.LASF47:
+	.string	"next"
+.LASF387:
+	.string	"data"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF331:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF262:
+	.string	"tlb_size"
+.LASF150:
+	.string	"fit_uname_fdt"
 	.hidden	malloc
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk3328.S b/cmd/ddr_tool/ddr_test_rk3328.S
index 985d7be5cb..a6c7352e3a 100644
--- a/cmd/ddr_tool/ddr_test_rk3328.S
+++ b/cmd/ddr_tool/ddr_test_rk3328.S
@@ -1,324 +1,388 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
 	.arch armv8-a+nosimd
 	.file	"ddr_test_code.c"
 	.text
 .Ltext0:
 	.cfi_sections	.debug_frame
-	.section	.text.set_ddr_freq,"ax",@progbits
+	.section	.text.crosstalk,"ax",@progbits
 	.align	2
-	.type	set_ddr_freq, %function
-set_ddr_freq:
-.LFB256:
-	.file 1 "cmd/ddr_tool/ddr_tool.c"
-	.loc 1 147 0
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 1 "cmd/ddr_tool/crosstalk.c"
+	.loc 1 46 0
 	.cfi_startproc
 .LVL0:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 1 149 0
-	mov	x1, 16959
-	movk	x1, 0xf, lsl 16
-	cmp	x0, x1
-	.loc 1 147 0
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 1 149 0
-	bhi	.L2
-	.loc 1 150 0
-	add	x1, x1, 1
-	mul	x0, x0, x1
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 66 0
+	adrp	x22, .LC2
+	.loc 1 46 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	mov	x23, x0
+	stp	x19, x20, [sp, 16]
+	mov	x24, x1
+	stp	x25, x26, [sp, 64]
+	.loc 1 63 0
+	adrp	x0, .LC1
 .LVL1:
-	.loc 1 151 0
-	cbz	x0, .L3
-.L2:
-	.loc 1 152 0
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 1 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 1 63 0
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .LVL2:
-	.loc 1 153 0
-	bl	rockchip_ddrclk_sip_set_rate_v2
+	.loc 1 71 0
+	add	x21, x29, 112
+	.loc 1 66 0
+	add	x0, x22, :lo12:.LC2
+	.loc 1 68 0
+	adrp	x25, .LC3
+	.loc 1 66 0
+	str	x0, [x29, 104]
+	.loc 1 64 0
+	mov	w20, 0
+	.loc 1 68 0
+	add	x0, x25, :lo12:.LC3
+	str	x0, [x29, 96]
 .LVL3:
-.L3:
-	.loc 1 155 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.L6:
+	.loc 1 66 0
+	ldr	x0, [x29, 104]
+	.loc 1 71 0
+	mov	w26, 1
+	.loc 1 66 0
+	mov	w1, w20
+	.loc 1 71 0
+	lsl	w26, w26, w20
+	.loc 1 65 0
+	mov	w28, -1
+	.loc 1 67 0
+	mov	w27, 0
+	.loc 1 66 0
+	bl	printf
 .LVL4:
-	mov	x19, x0
+.L5:
+	.loc 1 68 0
+	ldr	x0, [x29, 96]
+	mov	w1, w27
+	.loc 1 69 0
+	mvn	w28, w28
 .LVL5:
-	.loc 1 156 0
-	mov	x1, x0
-	adrp	x0, .LC1
-.LVL6:
-	add	x0, x0, :lo12:.LC1
+	mov	x19, 0
+	.loc 1 68 0
 	bl	printf
+.LVL6:
+.L2:
+	.loc 1 71 0 discriminator 3
+	eor	w0, w26, w28
+	str	w0, [x19, x21]
+	add	x19, x19, 4
+	.loc 1 72 0 discriminator 3
+	mvn	w28, w28
 .LVL7:
-	.loc 1 162 0
-	mov	w0, w19
-	ldr	x19, [sp, 16]
+	.loc 1 70 0 discriminator 3
+	cmp	x19, 32
+	bne	.L2
+	.loc 1 74 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
 .LVL8:
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE256:
-	.size	set_ddr_freq, .-set_ddr_freq
-	.section	.text.set_vdd_logic,"ax",@progbits
-	.align	2
-	.type	set_vdd_logic, %function
-set_vdd_logic:
-.LFB257:
-	.loc 1 165 0
-	.cfi_startproc
+	.loc 1 75 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
 .LVL9:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 1 169 0
-	add	x1, x29, 40
-	.loc 1 165 0
-	mov	w20, w0
-	.loc 1 169 0
-	adrp	x0, .LC2
+	.loc 1 76 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
 .LVL10:
-	add	x0, x0, :lo12:.LC2
-	bl	regulator_get_by_platname
+	cbz	x0, .L3
 .LVL11:
-	.loc 1 170 0
-	cbz	w0, .L9
-	mov	w19, w0
-	.loc 1 171 0
-	adrp	x0, .LC3
-.LVL12:
-	add	x0, x0, :lo12:.LC3
-.LVL13:
-.L15:
-	.loc 1 179 0
-	bl	printf
-.LVL14:
-.L8:
-	.loc 1 181 0
-	mov	w0, w19
+.L11:
+	.loc 1 78 0
+	mov	w0, -1
+.L1:
+	.loc 1 111 0
 	ldp	x19, x20, [sp, 16]
-.LVL15:
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL12:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL16:
-.L9:
+.LVL13:
+.L3:
 	.cfi_restore_state
-	.loc 1 176 0
-	ldr	x0, [x29, 40]
+	.loc 1 67 0 discriminator 2
+	add	w27, w27, 1
+.LVL14:
+	cmp	w27, 2
+	bne	.L5
+	.loc 1 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL15:
+	cmp	w20, 32
+	bne	.L6
+	.loc 1 85 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.LVL16:
+	.loc 1 86 0
+	mov	x0, 128
+	bl	malloc
 .LVL17:
-	mov	w1, w20
-	bl	regulator_set_value
+	mov	x21, x0
 .LVL18:
-	mov	w19, w0
+	.loc 1 87 0
+	cbnz	x0, .L7
+	.loc 1 88 0
+	adrp	x0, .LC5
 .LVL19:
-	.loc 1 177 0
-	mov	x0, 100
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC5
+	bl	printf
 .LVL20:
-	bl	udelay
+.L7:
+	adrp	x26, .LANCHOR0
+	.loc 1 91 0
+	add	x27, x22, :lo12:.LC2
 .LVL21:
-	.loc 1 178 0
-	cbz	w19, .L8
-	.loc 1 179 0
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	b	.L15
+	.loc 1 93 0
+	add	x25, x25, :lo12:.LC3
+	.loc 1 98 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 1 69 0
+	mov	w20, 0
+.LVL22:
+.L14:
+	.loc 1 92 0
+	mov	w22, 0
+	.loc 1 96 0
+	mov	w28, 1
+	.loc 1 91 0
+	mov	w1, w20
+	mov	x0, x27
+	bl	printf
+.LVL23:
+.L13:
+	.loc 1 93 0
+	mov	w1, w22
+	mov	x0, x25
+	bl	printf
+.LVL24:
+	.loc 1 96 0
+	mov	x19, 0
+	lsl	w1, w28, w22
+.LVL25:
+.L10:
+	ldr	w0, [x19, x26]
+	.loc 1 95 0
+	cbz	w20, .L8
+	.loc 1 96 0
+	eor	w0, w0, w1
+.L8:
+	.loc 1 98 0
+	str	w0, [x21, x19]
+	add	x19, x19, 4
+	.loc 1 94 0
+	cmp	x19, 128
+	bne	.L10
+	.loc 1 100 0
+	mov	w1, w19
+	mov	x0, x21
+	bl	data_cpu_2_io
+.LVL26:
+	.loc 1 101 0
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	write_buf_to_ddr
+.LVL27:
+	.loc 1 103 0
+	mov	w4, 1
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w19
+	mov	x0, x21
+	bl	cmp_buf_data
+.LVL28:
+	cbnz	x0, .L11
+	.loc 1 106 0
+	cbz	w20, .L12
+	.loc 1 92 0 discriminator 2
+	add	w22, w22, 1
+.LVL29:
+	cmp	w22, 32
+	bne	.L13
+.L12:
+	.loc 1 90 0 discriminator 2
+	add	w20, w20, 1
+.LVL30:
+	cmp	w20, 2
+	bne	.L14
+	.loc 1 110 0
+	mov	w0, 0
+	b	.L1
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.weak	set_ddr_freq
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB253:
+	.file 2 "cmd/ddr_tool/ddr_tool.c"
+	.loc 2 45 0
+	.cfi_startproc
+.LVL31:
+	.loc 2 47 0
+	mov	w0, 0
+.LVL32:
+	ret
+	.cfi_endproc
+.LFE253:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.weak	set_vdd_logic
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB254:
+	.loc 2 50 0
+	.cfi_startproc
+.LVL33:
+	.loc 2 52 0
+	mov	w0, -1
+.LVL34:
+	ret
 	.cfi_endproc
-.LFE257:
+.LFE254:
 	.size	set_vdd_logic, .-set_vdd_logic
-	.section	.text.random_test,"ax",@progbits
+	.section	.text.diagonalscan,"ax",@progbits
 	.align	2
-	.global	random_test
-	.type	random_test, %function
-random_test:
-.LFB274:
-	.file 2 "cmd/ddr_tool/random_test.c"
-	.loc 2 88 0
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB268:
+	.file 3 "cmd/ddr_tool/diagonalscan.c"
+	.loc 3 16 0
 	.cfi_startproc
-.LVL22:
+.LVL35:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-.LBB12:
-.LBB13:
-	.loc 2 18 0
-	mov	x2, x1
-.LBE13:
-.LBE12:
-	.loc 2 88 0
+	.loc 3 19 0
+	mov	x2, 32
+	.loc 3 16 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	mov	x22, x0
-.LVL23:
+	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-.LBB18:
-.LBB14:
-	.loc 2 37 0
-	adrp	x21, .LC6
-.LBE14:
-.LBE18:
-	.loc 2 88 0
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	mov	x23, x1
-.LVL24:
+	sub	x23, x1, #32
+	.loc 3 19 0
+	adrp	x1, .LANCHOR1
+.LVL36:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 3 16 0
 	stp	x19, x20, [sp, 16]
-.LBB19:
-.LBB15:
-	.loc 2 18 0
-	mov	w1, -2139062144
-.LVL25:
-.LBE15:
-.LBE19:
-	.loc 2 88 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-.LBB20:
-.LBB16:
-	.loc 2 23 0
-	adrp	x24, .LC5
-	.loc 2 18 0
-	bl	memset
-.LVL26:
-	.loc 2 23 0
-	add	x24, x24, :lo12:.LC5
-	.loc 2 37 0
-	add	x21, x21, :lo12:.LC6
-	.loc 2 24 0
-	lsr	x0, x23, 2
-	.loc 2 14 0
-	mov	w27, 0
-	.loc 2 20 0
-	mov	w25, 1077952576
-	.loc 2 19 0
-	mov	w20, -2139062144
-	.loc 2 22 0
-	mov	w28, 0
-	.loc 2 24 0
-	str	x0, [x29, 96]
-.LVL27:
-.L22:
-	.loc 2 23 0
-	mov	w1, w28
-	mov	x0, x24
-	bl	printf
-.LVL28:
-	.loc 2 24 0
-	mov	w1, 0
-.LVL29:
-.L17:
-	ldr	x2, [x29, 96]
-	uxtw	x0, w1
-	cmp	x0, x2
-	bcc	.L21
-.LVL30:
-.L20:
-	.loc 2 37 0
-	mov	x0, x21
-	.loc 2 22 0
-	add	w28, w28, 1
-.LVL31:
-	.loc 2 37 0
+	.loc 3 16 0
+	mov	x25, x0
+	.loc 3 19 0
+	add	x0, x29, 80
+.LVL37:
+	bl	memcpy
+.LVL38:
+	.loc 3 24 0
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
 	bl	printf
-.LVL32:
-	.loc 2 35 0
-	lsr	w25, w25, 1
-.LVL33:
-	.loc 2 36 0
-	lsr	w20, w20, 1
-.LVL34:
-	.loc 2 22 0
-	cmp	w28, 8
-	bne	.L22
-	mov	x19, -1
-	b	.L19
-.LVL35:
-.L21:
-	.loc 2 25 0
-	lsl	x0, x0, 2
-	add	x19, x22, x0
-	ldr	w2, [x22, x0]
-	str	w2, [x29, 108]
-	.loc 2 26 0
-	uxtw	x2, w2
-	cmp	w2, w20
-	beq	.L18
-.LVL36:
-	.loc 2 28 0
-	ldr	w27, [x19]
-	.loc 2 33 0
-	cmn	x19, #1
-	beq	.L20
-.LVL37:
-.L19:
-	.loc 2 39 0
+.LVL39:
+	.loc 3 25 0
+	bl	get_page_size
+.LVL40:
+	sxtw	x19, w0
+.LVL41:
+	.loc 3 27 0
+	tbz	w19, #31, .L28
+	.loc 3 28 0
+	mov	w1, w19
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.LVL38:
-	.loc 2 40 0
-	cmn	x19, #1
-	beq	.L23
-	.loc 2 41 0
-	ldr	w2, [x29, 108]
-	adrp	x0, .LC8
-	mov	w4, w20
-	mov	w3, w27
-	mov	x1, x19
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.LVL39:
-.L36:
-.LBE16:
-.LBE20:
-.LBB21:
-.LBB22:
-	.loc 2 82 0
+.LVL42:
+	.loc 3 29 0
 	mov	w0, -1
-.L16:
-.LBE22:
-.LBE21:
-	.loc 2 96 0
+.L31:
+.LVL43:
+.L27:
+	.loc 3 64 0
 	ldp	x19, x20, [sp, 16]
+.LVL44:
 	ldp	x21, x22, [sp, 32]
-.LVL40:
 	ldp	x23, x24, [sp, 48]
-.LVL41:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+.LVL45:
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -329,295 +393,276 @@ random_test:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL42:
-.L18:
-	.cfi_restore_state
-.LBB24:
-.LBB17:
-	.loc 2 31 0
-	str	w25, [x22, x0]
-	.loc 2 24 0
-	add	w1, w1, 1
-.LVL43:
-	b	.L17
-.LVL44:
-.L23:
-.LBE17:
-.LBE24:
-.LBB25:
-.LBB23:
-	.loc 2 58 0
-	adrp	x25, .LC9
-.LVL45:
-	.loc 2 76 0
-	adrp	x24, .LC10
-	.loc 2 66 0
-	lsr	x28, x23, 3
 .LVL46:
-	.loc 2 58 0
-	add	x25, x25, :lo12:.LC9
-	.loc 2 76 0
-	add	x24, x24, :lo12:.LC10
-	.loc 2 66 0
-	mov	x27, 0
-	mov	x19, 0
+.L28:
+	.cfi_restore_state
+	.loc 3 40 0
+	lsr	x22, x22, 1
 .LVL47:
-.L30:
-	.loc 2 58 0
-	mov	x1, x19
-	mov	x0, x25
-	bl	printf
+	add	x23, x25, x23
 .LVL48:
-	.loc 2 60 0
-	lsl	x20, x19, 8
-	lsl	x0, x19, 24
-	orr	x20, x20, x19, lsl 16
-	orr	x0, x0, x19, lsl 32
-	.loc 2 64 0
-	mov	x2, x23
-	.loc 2 60 0
-	orr	x20, x20, x0
-	lsl	x0, x19, 40
-	orr	x0, x0, x19, lsl 48
-	orr	x20, x20, x0
-	orr	x0, x19, x19, lsl 56
-	orr	x20, x20, x0
+	mov	w21, 0
+	mov	x20, 0
+	.loc 3 37 0
+	mov	w1, 32
+	add	x0, x29, 80
+	bl	data_cpu_2_io
 .LVL49:
-	.loc 2 64 0
-	mov	x0, x22
-	mov	w1, w20
-	bl	memset
+	.loc 3 39 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x25
+	bl	memcpy
 .LVL50:
-	.loc 2 66 0
+.L30:
+	.loc 3 40 0 discriminator 1
+	cmp	x20, x22
+	bcc	.L34
 	mov	x0, 0
 .LVL51:
-.L25:
-	cmp	x0, x28
-	bne	.L29
+	.loc 3 63 0
+	b	.L27
 .LVL52:
-.L28:
-	.loc 2 76 0
-	mov	x0, x24
+.L34:
+	.loc 3 41 0
+	uxtw	x24, w21
+	mov	x2, 32
+	sub	x26, x23, x24
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
 .LVL53:
-	.loc 2 57 0
-	add	x19, x19, 1
+	.loc 3 44 0
+	add	x2, x20, x25
+	.loc 3 43 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x24
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
 .LVL54:
-	.loc 2 76 0
-	bl	printf
+	.loc 3 45 0
+	cbnz	x0, .L27
+	.loc 3 48 0
+	add	x24, x24, 40
+	add	x20, x20, x19
 .LVL55:
-	.loc 2 57 0
-	cmp	x19, 256
-	bne	.L30
-	mov	x21, -1
-	b	.L27
+	cmp	x19, x24
+	add	w21, w21, 8
 .LVL56:
-.L29:
-	lsl	x1, x0, 3
-	add	x21, x1, x22
-	.loc 2 67 0
-	ldr	x26, [x1, x22]
+	csel	w21, w21, wzr, cs
 .LVL57:
-	.loc 2 68 0
-	cmp	x20, x26
-	beq	.L26
+	.loc 3 50 0
+	cmp	x22, x20
+	bls	.L33
+	.loc 3 51 0
+	add	x0, x25, x20
 .LVL58:
-	.loc 2 70 0
-	ldr	x27, [x21]
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
 .LVL59:
-	.loc 2 74 0
-	cmn	x21, #1
-	beq	.L28
-.LVL60:
-.L27:
-	.loc 2 78 0
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
-	bl	printf
-.LVL61:
-	.loc 2 84 0
-	mov	w0, 0
-	.loc 2 79 0
-	cmn	x21, #1
-	beq	.L16
-	.loc 2 80 0
-	mov	x4, x20
-	mov	x3, x27
+.L33:
+	.loc 3 53 0
+	mov	x3, 32
+	mov	w4, 1
 	mov	x2, x26
-	mov	x1, x21
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
-	bl	printf
-.LVL62:
-	b	.L36
-.LVL63:
-.L26:
-	.loc 2 66 0
-	add	x0, x0, 1
-.LVL64:
-	b	.L25
-.LBE23:
-.LBE25:
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x23, x23, x19
+	bl	cmp_buf_data
+.LVL60:
+	.loc 3 56 0
+	cbz	x0, .L30
+	b	.L27
 	.cfi_endproc
-.LFE274:
-	.size	random_test, .-random_test
-	.section	.text.scan_freq,"ax",@progbits
+.LFE268:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.random_test,"ax",@progbits
 	.align	2
-	.type	scan_freq, %function
-scan_freq:
-.LFB255:
-	.loc 1 104 0
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB271:
+	.file 4 "cmd/ddr_tool/random_test.c"
+	.loc 4 97 0
 	.cfi_startproc
-.LVL65:
-	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
+.LVL61:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB6:
+.LBB7:
+	.loc 4 19 0
+	mov	x2, x1
+.LBE7:
+.LBE6:
+	.loc 4 97 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	mov	w20, w0
-	stp	x23, x24, [sp, 48]
-	.loc 1 111 0
-	mov	w0, 16960
-.LVL66:
-	.loc 1 104 0
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x1
 	stp	x21, x22, [sp, 32]
-	.loc 1 111 0
-	movk	w0, 0xf, lsl 16
-	.loc 1 104 0
+	mov	x19, x0
+.LVL62:
+	stp	x23, x24, [sp, 48]
+.LBB12:
+.LBB8:
+	.loc 4 19 0
+	mov	w1, -2139062144
+.LVL63:
+.LBE8:
+.LBE12:
+	.loc 4 97 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+.LBB13:
+.LBB9:
+	.loc 4 24 0
+	adrp	x24, .LC8
+.LBE9:
+.LBE13:
+	.loc 4 97 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	mov	x24, x2
-	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	.loc 1 111 0
-	cmp	w20, w0
-	bls	.L38
-	.loc 1 112 0
-	udiv	w20, w20, w0
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB14:
+.LBB10:
+	.loc 4 19 0
+	bl	memset
+.LVL64:
+	.loc 4 25 0
+	lsr	x0, x20, 2
+	.loc 4 24 0
+	add	x24, x24, :lo12:.LC8
+	.loc 4 25 0
+	str	x0, [x29, 104]
+	.loc 4 15 0
+	mov	w27, 0
+	.loc 4 41 0
+	adrp	x0, .LC9
+	.loc 4 21 0
+	mov	w23, 1077952576
+	.loc 4 41 0
+	add	x0, x0, :lo12:.LC9
+	.loc 4 20 0
+	mov	w21, -2139062144
+	.loc 4 23 0
+	mov	w22, 0
+	.loc 4 41 0
+	str	x0, [x29, 96]
+.LVL65:
+.L43:
+	.loc 4 24 0
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
+.LVL66:
+	.loc 4 25 0
+	mov	w1, 0
 .LVL67:
 .L38:
-	.loc 1 113 0
-	cmp	w1, w0
-	bls	.L39
-	.loc 1 114 0
-	udiv	w1, w1, w0
+	ldr	x2, [x29, 104]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L42
 .LVL68:
-.L39:
-	.loc 1 116 0
-	cmp	w20, w1
-	bls	.L40
-	mov	w0, w20
-	mov	w20, w1
+.L41:
+	.loc 4 41 0
+	ldr	x0, [x29, 96]
+	.loc 4 23 0
+	add	w22, w22, 1
 .LVL69:
-	mov	w1, w0
+	.loc 4 39 0
+	lsr	w23, w23, 1
 .LVL70:
-.L40:
-	.loc 1 125 0
-	mov	w25, 16960
-	.loc 1 126 0
-	adrp	x22, .LC13
-	.loc 1 129 0
-	adrp	x23, .LC14
-	.loc 1 121 0
-	sub	w19, w1, w20
+	.loc 4 40 0
+	lsr	w21, w21, 1
 .LVL71:
-	.loc 1 126 0
-	add	x22, x22, :lo12:.LC13
-	.loc 1 129 0
-	add	x23, x23, :lo12:.LC14
-	.loc 1 123 0
-	mov	w21, 0
-	.loc 1 125 0
-	movk	w25, 0xf, lsl 16
+	.loc 4 41 0
+	bl	printf
 .LVL72:
-.L41:
-	.loc 1 123 0 discriminator 1
-	cmp	x24, x21, uxtw
-	bhi	.L45
-	.loc 1 123 0 is_stmt 0 discriminator 3
-	cbnz	x24, .L46
-.L45:
-	.loc 1 124 0 is_stmt 1
-	bl	rand
+	.loc 4 23 0
+	cmp	w22, 8
+	bne	.L43
+	mov	x28, -1
+	b	.L40
 .LVL73:
-	udiv	w1, w0, w19
-	msub	w0, w1, w19, w0
+.L42:
+	.loc 4 26 0
+	lsl	x0, x0, 2
+	add	x5, x19, x0
+	ldr	w26, [x19, x0]
+	.loc 4 27 0
+	cmp	w26, w21
+	beq	.L39
+	.loc 4 28 0
+	mov	x28, x5
 .LVL74:
-	add	w0, w0, w20
-	.loc 1 125 0
-	mul	w0, w0, w25
-	and	x0, x0, 4294967232
-	bl	rockchip_ddrclk_sip_round_rate_v2
+	.loc 4 29 0
+	add	x1, x5, 4
 .LVL75:
-	.loc 1 126 0
-	mov	w1, w21
-	mov	w2, w0
-	.loc 1 125 0
-	mov	x26, x0
+	mov	x0, x5
+	bl	flush_dcache_range
 .LVL76:
-	.loc 1 126 0
-	mov	x0, x22
+	.loc 4 37 0
+	cmn	x28, #1
+	.loc 4 32 0
+	ldr	w27, [x28]
+	.loc 4 37 0
+	beq	.L41
 .LVL77:
+.L40:
+	.loc 4 43 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
 .LVL78:
-	.loc 1 127 0
-	uxtw	x0, w26
-	bl	rockchip_ddrclk_sip_set_rate_v2
-.LVL79:
-	.loc 1 128 0
-	bl	rockchip_ddrclk_sip_recalc_rate_v2
-.LVL80:
-	.loc 1 129 0
-	mov	w1, w0
-	.loc 1 128 0
-	mov	x27, x0
-.LVL81:
-	.loc 1 129 0
-	mov	x0, x23
-.LVL82:
-	bl	printf
-.LVL83:
-	.loc 1 132 0
-	ldr	x0, [x18]
-	mov	x1, 1048576
-	ldr	x0, [x0, 136]
-	bl	random_test
-.LVL84:
-	mov	w26, w0
-.LVL85:
-	.loc 1 133 0
-	cbz	w0, .L42
-	.loc 1 134 0
-	adrp	x0, .LC15
-.LVL86:
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC15
+	.loc 4 44 0
+	cmn	x28, #1
+	beq	.L44
+	.loc 4 45 0
+	adrp	x0, .LC11
+	mov	w4, w21
+	mov	w3, w27
+	mov	w2, w26
+	mov	x1, x28
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.LVL87:
+.LVL79:
+.L57:
+.LBE10:
+.LBE14:
+.LBB15:
+.LBB16:
+	.loc 4 91 0
+	mov	w0, -1
 .L37:
-	.loc 1 144 0
-	mov	w0, w26
-	ldr	x27, [sp, 80]
+.LBE16:
+.LBE15:
+	.loc 4 105 0
 	ldp	x19, x20, [sp, 16]
-.LVL88:
+.LVL80:
 	ldp	x21, x22, [sp, 32]
-.LVL89:
 	ldp	x23, x24, [sp, 48]
-.LVL90:
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
+	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -628,328 +673,275 @@ scan_freq:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL91:
-.L42:
+.LVL81:
+.L39:
 	.cfi_restore_state
-	.loc 1 137 0
-	bl	ctrlc
-.LVL92:
-	cbz	w0, .L44
-.LVL93:
-.L46:
-	.loc 1 123 0
-	mov	w26, 0
-	b	.L37
-.LVL94:
+.LBB18:
+.LBB11:
+	.loc 4 35 0
+	str	w23, [x19, x0]
+	.loc 4 25 0
+	add	w1, w1, 1
+.LVL82:
+	b	.L38
+.LVL83:
 .L44:
-	.loc 1 123 0 is_stmt 0 discriminator 2
-	add	w21, w21, 1
-.LVL95:
-	b	.L41
-	.cfi_endproc
-.LFE255:
-	.size	scan_freq, .-scan_freq
-	.section	.text.cpu_2_io,"ax",@progbits
-	.align	2
-	.global	cpu_2_io
-	.type	cpu_2_io, %function
-cpu_2_io:
-.LFB275:
-	.file 3 "cmd/ddr_tool/tool_common.c"
-	.loc 3 11 0 is_stmt 1
-	.cfi_startproc
-.LVL96:
-	ret
-	.cfi_endproc
-.LFE275:
-	.size	cpu_2_io, .-cpu_2_io
-	.section	.text.write_buf_to_ddr,"ax",@progbits
-	.align	2
-	.global	write_buf_to_ddr
-	.type	write_buf_to_ddr, %function
-write_buf_to_ddr:
-.LFB276:
-	.loc 3 29 0
-	.cfi_startproc
+.LBE11:
+.LBE18:
+.LBB19:
+.LBB17:
+	.loc 4 64 0
+	adrp	x26, .LC12
+	.loc 4 84 0
+	adrp	x24, .LC13
+	.loc 4 72 0
+	lsr	x28, x20, 3
+	.loc 4 64 0
+	add	x26, x26, :lo12:.LC12
+	.loc 4 84 0
+	add	x24, x24, :lo12:.LC13
+	.loc 4 72 0
+	mov	x27, 0
+	mov	x21, 0
+.LVL84:
+.L51:
+	.loc 4 64 0
+	mov	x1, x21
+	mov	x0, x26
+	bl	printf
+.LVL85:
+	.loc 4 66 0
+	lsl	x22, x21, 24
+	lsl	x0, x21, 8
+	orr	x22, x22, x21, lsl 32
+	orr	x0, x0, x21, lsl 16
+	.loc 4 70 0
+	mov	x2, x20
+	.loc 4 66 0
+	orr	x22, x22, x0
+	lsl	x0, x21, 40
+	orr	x0, x0, x21, lsl 48
+	orr	x22, x22, x0
+	orr	x0, x21, x21, lsl 56
+	orr	x22, x22, x0
+.LVL86:
+	.loc 4 70 0
+	mov	x0, x19
+	mov	w1, w22
+	bl	memset
+.LVL87:
+	.loc 4 72 0
+	mov	x0, 0
+.LVL88:
+.L46:
+	cmp	x0, x28
+	bne	.L50
+.LVL89:
+.L49:
+	.loc 4 84 0
+	mov	x0, x24
+	.loc 4 63 0
+	add	x21, x21, 1
+.LVL90:
+	.loc 4 84 0
+	bl	printf
+.LVL91:
+	.loc 4 63 0
+	cmp	x21, 256
+	bne	.L51
+	mov	x23, -1
+	b	.L48
+.LVL92:
+.L50:
+	lsl	x1, x0, 3
+	add	x23, x1, x19
+	.loc 4 73 0
+	ldr	x25, [x1, x19]
+.LVL93:
+	.loc 4 74 0
+	cmp	x22, x25
+	beq	.L47
+.LVL94:
+	.loc 4 76 0
+	add	x1, x23, 4
+	mov	x0, x23
+.LVL95:
+	bl	flush_dcache_range
+.LVL96:
+	.loc 4 78 0
+	ldr	x27, [x23]
 .LVL97:
-	.loc 3 37 0
-	lsr	w1, w1, 3
+	.loc 4 82 0
+	cmn	x23, #1
+	beq	.L49
 .LVL98:
-	.loc 3 39 0
-	lsr	x3, x3, 3
+.L48:
+	.loc 4 86 0
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
 .LVL99:
-	.loc 3 37 0
-	sub	w1, w1, #1
+	.loc 4 93 0
+	mov	w0, 0
+	.loc 4 87 0
+	cmn	x23, #1
+	beq	.L37
+	.loc 4 88 0
+	mov	x4, x22
+	mov	x3, x27
+	mov	x2, x25
+	mov	x1, x23
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
 .LVL100:
-	.loc 3 39 0
-	mov	w4, 0
-	mov	w5, 0
+	b	.L57
 .LVL101:
-.L53:
-	.loc 3 39 0 is_stmt 0 discriminator 1
-	uxtw	x6, w5
-	cmp	x6, x3
-	bcc	.L54
-	.loc 3 44 0 is_stmt 1
-	ret
-.L54:
-	.loc 3 40 0 discriminator 3
-	ldr	x7, [x0, w4, uxtw 3]
-	.loc 3 41 0 discriminator 3
-	add	w4, w4, 1
+.L47:
+	.loc 4 72 0
+	add	x0, x0, 1
 .LVL102:
-	.loc 3 40 0 discriminator 3
-	str	x7, [x2, x6, lsl 3]
-	.loc 3 42 0 discriminator 3
-	and	w4, w1, w4
-.LVL103:
-	.loc 3 39 0 discriminator 3
-	add	w5, w5, 1
-.LVL104:
-	b	.L53
+	b	.L46
+.LBE17:
+.LBE19:
 	.cfi_endproc
-.LFE276:
-	.size	write_buf_to_ddr, .-write_buf_to_ddr
-	.section	.text.cmp_buf_data,"ax",@progbits
+.LFE271:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
 	.align	2
-	.global	cmp_buf_data
-	.type	cmp_buf_data, %function
-cmp_buf_data:
-.LFB277:
-	.loc 3 48 0
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 2 55 0
 	.cfi_startproc
-.LVL105:
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 60 0
-	lsr	w1, w1, 3
-.LVL106:
-	.loc 3 48 0
-	mov	w10, w4
-	.loc 3 60 0
-	sub	w1, w1, #1
-	.loc 3 48 0
+.LVL103:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 62 0
-	lsr	x3, x3, 3
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	.loc 2 61 0
+	mov	w0, 16960
+.LVL104:
+	.loc 2 55 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 61 0
+	movk	w0, 0xf, lsl 16
+	.loc 2 55 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 55 0
+	mov	x22, x2
+	.loc 2 61 0
+	cmp	w19, w0
+	bls	.L59
+	.loc 2 62 0
+	udiv	w19, w19, w0
+.LVL105:
+.L59:
+	.loc 2 63 0
+	cmp	w1, w0
+	bls	.L60
+	.loc 2 64 0
+	udiv	w1, w1, w0
+.LVL106:
+.L60:
+	.loc 2 66 0
+	cmp	w19, w1
+	bls	.L61
+	mov	w0, w19
+	mov	w19, w1
 .LVL107:
-	.loc 3 48 0
-	mov	x8, x2
+	mov	w1, w0
 .LVL108:
-	.loc 3 62 0
-	mov	w6, 0
-	.loc 3 56 0
-	mov	x2, 0
+.L61:
+	.loc 2 75 0
+	mov	w25, 16960
+	adrp	x24, .LC16
+	.loc 2 71 0
+	sub	w21, w1, w19
 .LVL109:
-	.loc 3 62 0
-	mov	w7, 0
-	.loc 3 48 0
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
+	.loc 2 75 0
+	add	x24, x24, :lo12:.LC16
+	.loc 2 73 0
+	mov	w23, 0
+	.loc 2 75 0
+	movk	w25, 0xf, lsl 16
 .LVL110:
-.L56:
-	.loc 3 62 0 discriminator 1
-	uxtw	x5, w7
-	cmp	x5, x3
-	bcc	.L59
-	.loc 3 61 0
-	mov	x19, 0
-	.loc 3 54 0
-	mov	x3, 0
-	.loc 3 55 0
-	mov	x4, 0
-	b	.L58
-.L59:
-	.loc 3 63 0
-	lsl	x5, x5, 3
-	.loc 3 64 0
-	ldr	x4, [x0, w6, uxtw 3]
-	.loc 3 63 0
-	add	x19, x8, x5
-	ldr	x2, [x8, x5]
+.L62:
+	.loc 2 73 0 discriminator 1
+	cmp	x22, x23, uxtw
+	bhi	.L66
+	.loc 2 73 0 is_stmt 0 discriminator 3
+	cbnz	x22, .L67
+.L66:
+	.loc 2 74 0 is_stmt 1
+	bl	rand
 .LVL111:
-	.loc 3 64 0
-	cmp	x2, x4
-	beq	.L57
-	.loc 3 65 0
-	ldr	x3, [x19]
+	udiv	w20, w0, w21
+	.loc 2 75 0
+	mov	w1, w23
+	.loc 2 74 0
+	msub	w20, w20, w21, w0
+	.loc 2 75 0
+	mov	x0, x24
 .LVL112:
-.L58:
-	.loc 3 73 0
-	cmp	x19, 0
-	ccmp	w10, 0, 4, ne
-	beq	.L55
-	.loc 3 74 0
-	adrp	x0, .LC16
+	.loc 2 74 0
+	add	w20, w20, w19
+	.loc 2 75 0
+	mul	w20, w20, w25
+	mov	w2, w20
+	bl	printf
 .LVL113:
-	mov	x1, x19
+	.loc 2 76 0
+	and	x0, x20, 4294967232
+	bl	set_ddr_freq
 .LVL114:
-	add	x0, x0, :lo12:.LC16
-	bl	printf
+	mov	w26, w0
 .LVL115:
-.L55:
-	.loc 3 78 0
-	mov	x0, x19
-	ldr	x19, [sp, 16]
+	.loc 2 79 0
+	ldr	x0, [x18]
 .LVL116:
-	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
 .LVL117:
-.L57:
-	.cfi_restore_state
-	.loc 3 70 0 discriminator 2
-	add	w6, w6, 1
+	mov	w20, w0
 .LVL118:
-	.loc 3 62 0 discriminator 2
-	add	w7, w7, 1
-.LVL119:
-	.loc 3 71 0 discriminator 2
-	and	w6, w1, w6
-.LVL120:
-	b	.L56
-	.cfi_endproc
-.LFE277:
-	.size	cmp_buf_data, .-cmp_buf_data
-	.section	.text.crosstalk,"ax",@progbits
-	.align	2
-	.global	crosstalk
-	.type	crosstalk, %function
-crosstalk:
-.LFB200:
-	.file 4 "cmd/ddr_tool/crosstalk.c"
-	.loc 4 46 0
-	.cfi_startproc
-.LVL121:
-	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
-	.loc 4 71 0
-	add	x20, x29, 112
-	.loc 4 46 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	.loc 4 63 0
+	.loc 2 80 0
+	cbz	w0, .L63
+	.loc 2 81 0
 	adrp	x0, .LC17
-.LVL122:
-	.loc 4 46 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	mov	x23, x1
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.loc 4 63 0
-	add	x0, x0, :lo12:.LC17
-	.loc 4 68 0
-	adrp	x24, .LC19
-	.loc 4 63 0
-	bl	printf
-.LVL123:
-	.loc 4 68 0
-	add	x27, x24, :lo12:.LC19
-	.loc 4 66 0
-	adrp	x21, .LC18
-	.loc 4 64 0
-	mov	w19, 0
-	.loc 4 66 0
-	add	x0, x21, :lo12:.LC18
-	str	x0, [x29, 104]
-.LVL124:
-.L70:
-	ldr	x0, [x29, 104]
-	.loc 4 71 0
-	mov	w25, 1
-	.loc 4 66 0
-	mov	w1, w19
-	.loc 4 71 0
-	lsl	w25, w25, w19
-	.loc 4 65 0
-	mov	w28, -1
-	.loc 4 67 0
-	mov	w26, 0
-	.loc 4 66 0
-	bl	printf
-.LVL125:
-.L69:
-	.loc 4 68 0
+.LVL119:
 	mov	w1, w26
-	mov	x0, x27
-	.loc 4 69 0
-	mvn	w28, w28
-.LVL126:
-	.loc 4 68 0
+	add	x0, x0, :lo12:.LC17
 	bl	printf
-.LVL127:
-	.loc 4 69 0
-	mov	x8, 0
-.LVL128:
-.L66:
-	.loc 4 71 0 discriminator 3
-	eor	w0, w25, w28
-	str	w0, [x8, x20]
-	add	x8, x8, 4
-	.loc 4 72 0 discriminator 3
-	mvn	w28, w28
-.LVL129:
-	.loc 4 70 0 discriminator 3
-	cmp	x8, 32
-	bne	.L66
-	.loc 4 77 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
-.LVL130:
-	.loc 4 78 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
-.LVL131:
-	cbz	x0, .L67
-.LVL132:
-.L75:
-	.loc 4 80 0
-	mov	w0, -1
-.L65:
-	.loc 4 115 0
+.LVL120:
+.L58:
+	.loc 2 91 0
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
+.LVL121:
 	ldp	x21, x22, [sp, 32]
-.LVL133:
+.LVL122:
 	ldp	x23, x24, [sp, 48]
-.LVL134:
+.LVL123:
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-.LVL135:
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
 	.cfi_restore 25
 	.cfi_restore 26
 	.cfi_restore 23
@@ -960,1114 +952,623 @@ crosstalk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL136:
-.L67:
+.LVL124:
+.L63:
 	.cfi_restore_state
-	.loc 4 67 0 discriminator 2
-	add	w26, w26, 1
-.LVL137:
-	cmp	w26, 2
-	bne	.L69
-	.loc 4 64 0 discriminator 2
-	add	w19, w19, 1
-.LVL138:
-	cmp	w19, 32
-	bne	.L70
-	.loc 4 87 0
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	.loc 2 84 0
+	bl	ctrlc
+.LVL125:
+	cbz	w0, .L65
+.LVL126:
+.L67:
+	.loc 2 73 0
+	mov	w20, 0
+	b	.L58
+.LVL127:
+.L65:
+	.loc 2 73 0 is_stmt 0 discriminator 2
+	add	w23, w23, 1
+.LVL128:
+	b	.L62
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB256:
+	.loc 2 100 0 is_stmt 1
+	.cfi_startproc
+.LVL129:
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+	.loc 2 113 0
+	adrp	x0, .LC18
+.LVL130:
+	add	x0, x0, :lo12:.LC18
+	.loc 2 100 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+	.loc 2 115 0
+	add	x20, x29, 152
+	.loc 2 100 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+	.loc 2 115 0
+	add	x21, x29, 120
+	.loc 2 100 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	mov	w23, w2
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+	.loc 2 103 0
+	stp	xzr, xzr, [x29, 184]
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
+.LVL131:
+	.loc 2 113 0
 	bl	printf
-.LVL139:
-	.loc 4 88 0
-	mov	x0, 128
-	bl	malloc
-.LVL140:
-	mov	x20, x0
+.LVL132:
+	.loc 2 115 0
+	mov	w2, 1
+	mov	x1, x20
+	mov	x0, x21
+	bl	get_print_available_addr
+.LVL133:
+	.loc 2 117 0
+	cmp	w23, 1
+	ble	.L160
+	.loc 2 121 0
+	adrp	x24, .LANCHOR2
+	add	x27, x24, :lo12:.LANCHOR2
+	mov	x25, 0
+	str	x24, [x29, 104]
+.L75:
+	ldr	x1, [x27, x25, lsl 3]
+	mov	w19, w25
+.LVL134:
+	ldr	x0, [x26, 8]
+	bl	strcasecmp
+.LVL135:
+	cbz	w0, .L74
+.LVL136:
+	add	x25, x25, 1
+	.loc 2 120 0 discriminator 2
+	cmp	x25, 7
+	bne	.L75
+	.loc 2 128 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L161
+.LVL137:
+.L112:
+	.loc 2 133 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+.LVL138:
+.L161:
+	.loc 2 128 0
+	bl	printf
+.LVL139:
+.L160:
+	.loc 2 129 0
+	mov	w23, -1
+	b	.L72
+.LVL140:
+.L78:
+	.loc 2 138 0
+	add	x0, x26, x27
+	add	x1, x29, 184
+	add	x2, x1, x27
+	mov	w1, 0
+	add	x27, x27, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
 .LVL141:
-	.loc 4 89 0
-	cbnz	x0, .L71
-	.loc 4 90 0
-	adrp	x0, .LC21
+	tbz	w0, #31, .L77
+	.loc 2 139 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	b	.L161
 .LVL142:
-	mov	x1, 128
-	add	x0, x0, :lo12:.LC21
-	bl	printf
+.L79:
+	.loc 2 157 0
+	bl	data_cpu_2_io_init
 .LVL143:
-.L71:
-	adrp	x25, .LANCHOR0
-	.loc 4 93 0
-	add	x26, x21, :lo12:.LC18
+	.loc 2 159 0
+	cbnz	w19, .L80
+	.loc 2 161 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L81
+	.loc 2 162 0
+	bl	set_vdd_logic
 .LVL144:
-	.loc 4 95 0
-	add	x24, x24, :lo12:.LC19
-	.loc 4 100 0
-	add	x25, x25, :lo12:.LANCHOR0
-	.loc 4 69 0
-	mov	w19, 0
+.L81:
+	.loc 2 163 0
+	ldr	x0, [x29, 184]
+	bl	set_ddr_freq
 .LVL145:
-.L78:
-	.loc 4 94 0
-	mov	w21, 0
-	.loc 4 98 0
-	mov	w27, 1
-	.loc 4 93 0
-	mov	w1, w19
-	mov	x0, x26
+.L82:
+	.loc 2 305 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 .LVL146:
-.L77:
-	.loc 4 95 0
-	mov	w1, w21
-	mov	x0, x24
-	bl	printf
+	b	.L72
 .LVL147:
-	.loc 4 98 0
-	lsl	w1, w27, w21
-	mov	x8, 0
+.L80:
+	.loc 2 164 0
+	cmp	w19, 1
+	bne	.L83
+	.loc 2 166 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L84
+	.loc 2 167 0
+	bl	set_vdd_logic
 .LVL148:
-.L74:
-	ldr	w0, [x8, x25]
-	.loc 4 97 0
-	cbz	w19, .L72
-	.loc 4 98 0
-	eor	w0, w0, w1
-.L72:
-	.loc 4 100 0
-	str	w0, [x20, x8]
-	add	x8, x8, 4
-	.loc 4 96 0
-	cmp	x8, 128
-	bne	.L74
-	.loc 4 105 0
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w8
-	mov	x0, x20
-	bl	write_buf_to_ddr
+.L84:
+	.loc 2 168 0
+	ldr	w0, [x29, 184]
+	ldr	w1, [x29, 192]
+	ldr	x2, [x29, 200]
+	bl	scan_freq
 .LVL149:
-	.loc 4 107 0
-	mov	w1, w8
-	mov	w4, 1
-	mov	x3, x23
-	mov	x2, x22
-	mov	x0, x20
-	bl	cmp_buf_data
+	b	.L82
+.L83:
+	.loc 2 169 0
+	sub	w25, w25, #5
+	cmp	w25, 1
+	bhi	.L85
+	.loc 2 171 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L86
+	.loc 2 172 0
+	bl	set_vdd_logic
 .LVL150:
-	cbnz	x0, .L75
-	.loc 4 110 0
-	cbz	w19, .L76
-	.loc 4 94 0 discriminator 2
-	add	w21, w21, 1
+.L86:
+	.loc 2 173 0
+	cmp	w19, 5
+	bne	.L114
+	.loc 2 175 0
+	mov	x1, 65535
+	mov	x0, 0
+	movk	x1, 0x9f, lsl 16
+.L90:
 .LVL151:
-	cmp	w21, 32
-	bne	.L77
-.L76:
-	.loc 4 92 0 discriminator 2
-	add	w19, w19, 1
+	ldr	x2, [x20, x0, lsl 3]
+	cmp	x2, x1
+	bls	.L88
+	.loc 2 176 0
+	mov	w1, w0
 .LVL152:
-	cmp	w19, 2
-	bne	.L78
-	.loc 4 114 0
-	mov	w0, 0
-	b	.L65
-	.cfi_endproc
-.LFE200:
-	.size	crosstalk, .-crosstalk
-	.section	.text.diagonalscan,"ax",@progbits
-	.align	2
-	.global	diagonalscan
-	.type	diagonalscan, %function
-diagonalscan:
-.LFB271:
-	.file 5 "cmd/ddr_tool/diagonalscan.c"
-	.loc 5 49 0
-	.cfi_startproc
+	.loc 2 185 0
+	mov	x2, 10485760
+	str	x2, [x20, w0, uxtw 3]
 .LVL153:
-	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 55 0
-	mov	x2, 32
-	.loc 5 49 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	mov	x19, x1
-	.loc 5 55 0
-	adrp	x1, .LANCHOR1
+.L89:
+	.loc 2 108 0 discriminator 1
+	mov	x0, 0
 .LVL154:
-	add	x1, x1, :lo12:.LANCHOR1
-	.loc 5 49 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	.loc 5 55 0
-	add	x0, x29, 80
+.L93:
+	.loc 2 188 0
+	cmp	w1, w0
+	beq	.L92
+	.loc 2 190 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 2 191 0
+	str	xzr, [x20, x0, lsl 3]
+.L92:
 .LVL155:
-	.loc 5 49 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 55 0
-	bl	memcpy
+	add	x0, x0, 1
 .LVL156:
-	.loc 5 60 0
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
-	bl	printf
+	.loc 2 187 0 discriminator 2
+	cmp	x0, 4
+	bne	.L93
+	.loc 2 193 0
+	mov	w28, 60
+.L87:
 .LVL157:
-.LBB29:
-.LBB30:
-.LBB31:
-	.loc 5 19 0
-	mov	x0, 520
-	movk	x0, 0xff01, lsl 16
-	ldr	w20, [x0]
+	.loc 2 201 0
+	adrp	x26, .LC22
 .LVL158:
-#APP
-// 19 "cmd/ddr_tool/diagonalscan.c" 1
-	dmb sy
-// 0 "" 2
+	.loc 2 205 0
+	adrp	x27, .LC23
+	.loc 2 201 0
+	add	x26, x26, :lo12:.LC22
+	.loc 2 205 0
+	add	x27, x27, :lo12:.LC23
+	.loc 2 198 0
+	mov	w25, 0
 .LVL159:
-#NO_APP
-.LBE31:
-.LBE30:
-.LBE29:
-	.loc 5 75 0
-	mov	x2, 32
-	add	x1, x29, 80
-	mov	x0, x23
-	bl	memcpy
+.L94:
+	.loc 2 199 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L100
+	.loc 2 199 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bls	.L82
+.L100:
+	.loc 2 201 0 is_stmt 1
+	mov	x19, 0
+	.loc 2 200 0
+	add	w25, w25, 1
 .LVL160:
-.LBB34:
-.LBB32:
-	.loc 5 40 0
-	ubfx	x0, x20, 9, 2
-	.loc 5 41 0
-	ubfx	x20, x20, 2, 2
+	.loc 2 201 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL161:
-	.loc 5 40 0
-	add	w0, w0, 9
-	.loc 5 41 0
-	mov	w1, 2
-	asr	w20, w1, w20
-.LBE32:
-.LBE34:
-	.loc 5 76 0
-	lsr	x24, x19, 1
-.LBB35:
-.LBB33:
-	.loc 5 43 0
-	add	w0, w0, w20
-	sub	x19, x19, #32
+.L98:
+	.loc 2 203 0
+	ldr	x3, [x20, x19, lsl 3]
+	cbz	x3, .L95
+	.loc 2 205 0
+	ldr	x2, [x21, x19, lsl 3]
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
 .LVL162:
-	mov	w25, 1
-	add	x19, x19, x23
+	.loc 2 207 0
+	ldr	x0, [x29, 192]
+	bl	set_ddr_freq
 .LVL163:
-	lsl	w25, w25, w0
-.LBE33:
-.LBE35:
-	.loc 5 76 0
-	mov	w21, 0
-	mov	x20, 0
+	.loc 2 208 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL164:
-.L90:
-	.loc 5 76 0 is_stmt 0 discriminator 1
-	cmp	x20, x24
-	bcc	.L94
-	mov	x0, 0
-	b	.L91
-.L94:
-	.loc 5 77 0 is_stmt 1
-	uxtw	x22, w21
-	mov	x2, 32
-	sub	x26, x19, x22
-	add	x1, x29, 80
-	mov	x0, x26
-	bl	memcpy
+	mov	w24, w0
 .LVL165:
-	.loc 5 80 0
-	add	x2, x20, x23
-	.loc 5 79 0
-	mov	x3, 32
-	mov	w4, 1
-	add	x2, x2, x22
-	mov	w1, w3
-	add	x0, x29, 80
-	bl	cmp_buf_data
+	.loc 2 210 0
+	cbnz	w0, .L115
+	.loc 2 211 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL166:
-	.loc 5 81 0
-	cbnz	x0, .L91
-	.loc 5 84 0
-	add	x22, x22, 40
-	add	x20, x20, x25
+	bl	crosstalk
 .LVL167:
-	cmp	x25, x22
-	add	w21, w21, 8
+	mov	w24, w0
 .LVL168:
-	csel	w21, w21, wzr, cs
+	.loc 2 215 0
+	cbnz	w0, .L116
+	.loc 2 216 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL169:
-	.loc 5 86 0
-	cmp	x24, x20
-	bls	.L93
-	.loc 5 87 0
-	add	x0, x23, x20
+	bl	diagonalscan
 .LVL170:
-	mov	x2, 32
-	add	x1, x29, 80
-	add	x0, x0, x21, uxtw
-	bl	memcpy
+	mov	w24, w0
 .LVL171:
-.L93:
-	.loc 5 89 0
-	mov	x3, 32
-	mov	w4, 1
-	mov	x2, x26
-	mov	w1, w3
-	add	x0, x29, 80
-	sub	x19, x19, x25
-	bl	cmp_buf_data
+	.loc 2 220 0
+	cbnz	w0, .L117
+	.loc 2 221 0
+	ldr	w0, [x29, 184]
 .LVL172:
-	.loc 5 92 0
-	cbz	x0, .L90
+	and	x2, x28, 1020
+	ldr	w1, [x29, 192]
+	.loc 2 224 0
+	mov	w22, 1
+	.loc 2 221 0
+	bl	scan_freq
 .LVL173:
-.L91:
-	.loc 5 100 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	mov	w24, w0
 .LVL174:
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE271:
-	.size	diagonalscan, .-diagonalscan
-	.section	.text.do_ddr_test,"ax",@progbits
-	.align	2
-	.type	do_ddr_test, %function
-do_ddr_test:
-.LFB258:
-	.loc 1 190 0
-	.cfi_startproc
+.L96:
+	.loc 2 226 0
+	ldr	x0, [x29, 184]
 .LVL175:
-	stp	x29, x30, [sp, -240]!
-	.cfi_def_cfa_offset 240
-	.cfi_offset 29, -240
-	.cfi_offset 30, -232
-.LBB40:
-.LBB41:
-	.loc 1 50 0
-	mov	x0, 0
+	bl	set_ddr_freq
 .LVL176:
-.LBE41:
-.LBE40:
-	.loc 1 190 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -208
-	.cfi_offset 22, -200
-	mov	w22, w2
-	stp	x19, x20, [sp, 16]
-.LBB48:
-.LBB42:
-	.loc 1 50 0
-	mov	x2, x18
+	.loc 2 227 0
+	cbnz	w24, .L118
+	.loc 2 228 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
+	bl	random_test
 .LVL177:
-.LBE42:
-.LBE48:
-	.loc 1 190 0
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
-.LBB49:
-.LBB43:
-	.loc 1 52 0
-	add	x20, x29, 136
-.LBE43:
-.LBE49:
-	.loc 1 190 0
-	mov	x25, x3
-.LBB50:
-.LBB44:
-	.loc 1 53 0
-	add	x21, x29, 168
-.LBE44:
-.LBE50:
-	.loc 1 190 0
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-.LBB51:
-.LBB45:
-	.loc 1 47 0
-	mov	w24, 0
-.LBE45:
-.LBE51:
-	.loc 1 190 0
-	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -160
-	.cfi_offset 28, -152
-	.loc 1 193 0
-	stp	xzr, xzr, [x29, 200]
-	stp	xzr, xzr, [x29, 216]
-	str	xzr, [x29, 232]
+	mov	w2, w0
 .LVL178:
-.L99:
-.LBB52:
-.LBB46:
-	.loc 1 50 0
-	ldr	x1, [x2]
-	ubfiz	x3, x0, 4, 32
-	.loc 1 52 0
-	str	xzr, [x20, x0, lsl 3]
-	.loc 1 50 0
-	add	x1, x1, x3
-	.loc 1 53 0
-	str	xzr, [x21, x0, lsl 3]
-	.loc 1 50 0
-	ldr	x1, [x1, 136]
-	cmp	x1, 0
-	csinc	w24, w24, w0, eq
+	.loc 2 232 0
+	cbnz	w0, .L119
+	.loc 2 233 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL179:
-	add	x0, x0, 1
+	str	w2, [x29, 100]
+	bl	crosstalk
 .LVL180:
-	.loc 1 49 0
-	cmp	x0, 4
-	bne	.L99
-	mov	x0, 0
-.L100:
+	mov	w22, w0
 .LVL181:
-	.loc 1 56 0
-	cmp	w0, w24
-	bcc	.L101
-	.loc 1 61 0
-	sub	w1, w24, #1
-	ldr	x0, [x2, 128]
+	.loc 2 237 0
+	ldr	w2, [x29, 100]
+	cbnz	w0, .L120
+	.loc 2 238 0
+	ldr	x1, [x20, x19, lsl 3]
+	ldr	x0, [x21, x19, lsl 3]
 .LVL182:
-	lsl	x1, x1, 3
-	.loc 1 67 0
-	adrp	x26, .LC25
-	.loc 1 61 0
-	sub	x0, x0, #1048576
-	.loc 1 64 0
-	mov	x23, 0
-	.loc 1 67 0
-	add	x26, x26, :lo12:.LC25
-	.loc 1 61 0
-	ldr	x2, [x20, x1]
-	sub	x0, x0, x2
-	.loc 1 62 0
-	and	x0, x0, -4096
-	.loc 1 61 0
-	str	x0, [x21, x1]
-	.loc 1 63 0
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	bl	printf
+	bl	diagonalscan
 .LVL183:
-	.loc 1 64 0
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
-	bl	printf
+	mov	w24, w0
 .LVL184:
-.L102:
-	.loc 1 65 0
-	cmp	w24, w23
-	bhi	.L104
+	.loc 2 243 0
+	cbnz	w0, .L121
+	.loc 2 245 0
+	bl	ctrlc
 .LVL185:
-.LBE46:
-.LBE52:
-	.loc 1 205 0
-	cmp	w22, 1
-	ble	.L214
-	.loc 1 209 0
-	adrp	x0, .LANCHOR2
-	add	x26, x0, :lo12:.LANCHOR2
-	mov	x24, 0
-	str	x0, [x29, 120]
-.L107:
-	ldr	x1, [x26, x24, lsl 3]
-	mov	w23, w24
+	cbnz	w0, .L122
+	.loc 2 240 0
+	mov	w22, 4
 .LVL186:
-	ldr	x0, [x25, 8]
-	bl	strcasecmp
+.L95:
+	add	x19, x19, 1
 .LVL187:
-	cbz	w0, .L106
+	.loc 2 202 0 discriminator 2
+	cmp	x19, 4
+	bne	.L98
+	mov	w2, 0
+	mov	w24, 0
 .LVL188:
-	add	x24, x24, 1
-	.loc 1 208 0 discriminator 2
-	cmp	x24, 7
-	bne	.L107
-	.loc 1 216 0
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
-	b	.L215
+.L97:
+	.loc 2 250 0
+	orr	w2, w24, w2
 .LVL189:
-.L101:
-.LBB53:
-.LBB47:
-	.loc 1 57 0
-	ubfiz	x1, x0, 4, 32
-	ldr	x3, [x2]
-	add	x1, x1, 128
-	add	x3, x3, x1
-	ldr	x3, [x3, 8]
-	str	x3, [x20, x0, lsl 3]
-	.loc 1 58 0
-	ldr	x3, [x2]
-	add	x1, x3, x1
-	ldr	x1, [x1, 16]
-	str	x1, [x21, x0, lsl 3]
+	cbz	w2, .L94
 .LVL190:
-	add	x0, x0, 1
+.L99:
+	.loc 2 302 0
+	cbz	w24, .L82
+	.loc 2 303 0
+	ldr	x0, [x29, 104]
+	add	x24, x0, :lo12:.LANCHOR2
 .LVL191:
-	b	.L100
-.LVL192:
-.L104:
-	.loc 1 66 0
-	ldr	x1, [x20, x23, lsl 3]
-	cbz	x1, .L103
-	.loc 1 67 0
-	ldr	x3, [x21, x23, lsl 3]
-	mov	x0, x26
-	add	x2, x1, x3
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	ldr	x1, [x24, w22, sxtw 3]
 	bl	printf
+.LVL192:
+	b	.L72
 .LVL193:
-.L103:
-	add	x23, x23, 1
+.L88:
+	add	x0, x0, 1
 .LVL194:
-	b	.L102
+	.loc 2 174 0 discriminator 2
+	cmp	x0, 4
+	bne	.L90
+	.loc 2 181 0
+	ldr	x2, [x29, 152]
+	mov	w1, 10
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
+	lsr	x2, x2, 20
+	bl	printf
 .LVL195:
-.L150:
-.LBE47:
-.LBE53:
-	.loc 1 221 0
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	.loc 2 108 0
+	mov	w1, 0
+	b	.L89
+.L114:
+	.loc 2 195 0
+	mov	w28, 1000
+	b	.L87
 .LVL196:
-.L215:
-	.loc 1 216 0
-	bl	printf
+.L115:
+	.loc 2 209 0
+	mov	w22, 2
+	b	.L96
 .LVL197:
-.L214:
-	.loc 1 217 0
-	mov	w22, -1
-	b	.L97
+.L116:
+	.loc 2 213 0
+	mov	w22, 3
+	b	.L96
 .LVL198:
-.L110:
-	.loc 1 226 0
-	add	x0, x25, x26
-	add	x1, x29, 200
-	add	x2, x1, x26
-	mov	w1, 0
-	add	x26, x26, 8
-	ldr	x0, [x0, 16]
-	bl	strict_strtoul
+.L117:
+	.loc 2 218 0
+	mov	w22, 4
+	b	.L96
 .LVL199:
-	tbz	w0, #31, .L109
-	.loc 1 227 0
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
-	b	.L215
+.L118:
+	mov	w2, 0
+	b	.L97
 .LVL200:
-.L111:
-	.loc 1 247 0
-	cbnz	w23, .L112
-	.loc 1 249 0
-	ldr	x0, [x29, 208]
+.L119:
+	.loc 2 228 0
+	mov	w24, w0
+	mov	w2, 0
+	.loc 2 230 0
+	mov	w22, 2
+	b	.L97
 .LVL201:
-	cbz	x0, .L113
-	.loc 1 250 0
-	bl	set_vdd_logic
+.L120:
+	.loc 2 233 0
+	mov	w24, w0
+	.loc 2 235 0
+	mov	w22, 3
+	b	.L97
 .LVL202:
-.L113:
-	.loc 1 251 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L121:
+	mov	w2, w22
 .LVL203:
-.L114:
-	.loc 1 384 0
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
-	bl	printf
-.LVL204:
+.L158:
+	.loc 2 240 0
+	mov	w22, 4
 	b	.L97
+.L122:
+	.loc 2 246 0
+	mov	w2, -1
+	b	.L158
+.LVL204:
+.L85:
+	.loc 2 259 0
+	mov	x2, x20
+	mov	x1, x21
+	add	x0, x29, 200
+	bl	judge_test_addr
 .LVL205:
-.L112:
-	.loc 1 252 0
-	cmp	w23, 1
-	bne	.L115
-	.loc 1 254 0
-	ldr	x0, [x29, 224]
+	mov	w27, w0
 .LVL206:
-	cbz	x0, .L116
-	.loc 1 255 0
-	bl	set_vdd_logic
+	.loc 2 260 0
+	cbz	w0, .L123
+	.loc 2 263 0
+	ldr	x0, [x29, 184]
 .LVL207:
-.L116:
-	.loc 1 256 0
-	ldr	w0, [x29, 200]
-	ldr	w1, [x29, 208]
-	ldr	x2, [x29, 216]
-	bl	scan_freq
+	bl	set_ddr_freq
 .LVL208:
-	b	.L114
+	.loc 2 265 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L102
+	.loc 2 266 0
+	bl	set_vdd_logic
 .LVL209:
-.L115:
-	.loc 1 257 0
-	sub	w24, w24, #5
-	cmp	w24, 1
-	bls	.L117
+.L102:
+	.loc 2 270 0
+	adrp	x26, .LC24
 .LVL210:
-.LBB54:
-.LBB55:
-	.loc 1 79 0
-	ldr	x0, [x29, 144]
+	mov	w25, 0
+	add	x26, x26, :lo12:.LC24
+	b	.L110
 .LVL211:
-	.loc 1 82 0
-	ldr	x3, [x29, 224]
-	.loc 1 79 0
-	cmp	x0, 0
-	ldr	x0, [x29, 152]
-	ldr	x1, [x29, 160]
-	cset	w24, ne
-	.loc 1 80 0
-	cmp	x0, 0
-	mov	w0, 3
-	csinc	w0, w0, w24, ne
+.L111:
+	.loc 2 271 0
+	mov	x28, 0
+	.loc 2 269 0
+	add	w25, w25, 1
 .LVL212:
-	cmp	x1, 0
-	mov	w1, 4
-	csel	w0, w0, w1, eq
+	.loc 2 270 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
 .LVL213:
-	.loc 1 82 0
-	cbnz	x3, .L209
-	.loc 1 83 0
-	mov	w24, w0
+.L103:
+	.loc 2 271 0 discriminator 1
+	cmp	w27, w28
+	bhi	.L109
+	mov	w0, 0
+	mov	w24, 0
 .LVL214:
-.L134:
-.LBE55:
-.LBE54:
-	.loc 1 342 0
-	ldr	x0, [x29, 200]
-	bl	set_ddr_freq
+.L108:
+	.loc 2 297 0
+	orr	w0, w24, w0
 .LVL215:
-	.loc 1 344 0
-	ldr	x0, [x29, 232]
-	cbz	x0, .L140
-	.loc 1 345 0
-	bl	set_vdd_logic
+	cbnz	w0, .L99
 .LVL216:
-.L140:
-	.loc 1 349 0
-	adrp	x26, .LC34
-	mov	w25, 0
+.L110:
+	.loc 2 268 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L111
+	.loc 2 268 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L111
+	b	.L82
 .LVL217:
-	add	x26, x26, :lo12:.LC34
-	b	.L148
+.L109:
+	.loc 2 278 0 is_stmt 1
+	ldr	x1, [x20, x28, lsl 3]
+	.loc 2 272 0
+	cmp	w19, 3
+	.loc 2 278 0
+	ldr	x0, [x21, x28, lsl 3]
+	.loc 2 272 0
+	beq	.L105
+	cmp	w19, 4
+	beq	.L106
+	.loc 2 274 0
+	bl	random_test
 .LVL218:
-.L117:
-	.loc 1 259 0
-	ldr	x0, [x29, 224]
+.L159:
+	.loc 2 282 0
+	mov	w24, w0
 .LVL219:
-	cbz	x0, .L123
-	.loc 1 260 0
-	bl	set_vdd_logic
+	.loc 2 290 0
+	bl	ctrlc
 .LVL220:
-.L123:
-	.loc 1 261 0
-	cmp	w23, 5
-	bne	.L155
-	.loc 1 262 0
-	ldr	x1, [x29, 168]
-	mov	x0, 65535
-	movk	x0, 0x9f, lsl 16
-	cmp	x1, x0
-	bhi	.L125
-	.loc 1 263 0
-	lsr	x2, x1, 20
-	adrp	x0, .LC30
-	mov	w1, 10
-	add	x0, x0, :lo12:.LC30
-	bl	printf
+	cbnz	w0, .L124
+	add	x28, x28, 1
 .LVL221:
-.L211:
-	.loc 1 272 0
-	mov	w27, 60
+	mov	w22, w19
+	.loc 2 294 0
+	cbz	w24, .L103
+	mov	w22, w19
+	b	.L108
 .LVL222:
-.L124:
-	.loc 1 280 0
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
-	.loc 1 284 0
-	adrp	x28, .LC32
-	.loc 1 280 0
-	str	x0, [x29, 112]
-	.loc 1 277 0
-	mov	w26, 0
-	.loc 1 284 0
-	add	x0, x28, :lo12:.LC32
-	str	x0, [x29, 104]
+.L105:
+	.loc 2 278 0
+	bl	crosstalk
 .LVL223:
-.L126:
-	.loc 1 278 0
-	ldr	x0, [x29, 216]
-	cbz	x0, .L132
-	.loc 1 278 0 is_stmt 0 discriminator 1
-	cmp	x0, x26, uxtw
-	bls	.L114
-.L132:
-	.loc 1 280 0 is_stmt 1
-	ldr	x0, [x29, 112]
-	.loc 1 279 0
-	add	w26, w26, 1
+	b	.L159
+.L106:
+	.loc 2 282 0
+	bl	diagonalscan
 .LVL224:
-	.loc 1 280 0
-	mov	w1, w26
-	mov	x25, 0
-	bl	printf
+	b	.L159
 .LVL225:
-.L130:
-	.loc 1 282 0
-	ldr	x23, [x20, x25, lsl 3]
-	cbz	x23, .L127
-	.loc 1 284 0
-	ldr	x0, [x29, 104]
-	mov	x2, x23
-	ldr	x24, [x21, x25, lsl 3]
-	mov	w1, w25
-	mov	x3, x24
-	bl	printf
+.L124:
+	mov	w22, w19
+	.loc 2 291 0
+	mov	w0, -1
+	b	.L108
 .LVL226:
-	.loc 1 286 0
-	ldr	x0, [x29, 208]
-	bl	set_ddr_freq
+.L123:
+	.loc 2 261 0
+	mov	w23, 1
 .LVL227:
-	.loc 1 287 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
+	b	.L72
 .LVL228:
-	mov	w28, w0
-.LVL229:
-	.loc 1 289 0
-	cbnz	w0, .L156
-	.loc 1 290 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL230:
-	bl	crosstalk
-.LVL231:
-	mov	w28, w0
-.LVL232:
-	.loc 1 294 0
-	cbnz	w0, .L157
-	.loc 1 295 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL233:
-	bl	diagonalscan
-.LVL234:
-	mov	w28, w0
-.LVL235:
-	.loc 1 299 0
-	cbnz	w0, .L158
-	.loc 1 300 0
-	ldr	w0, [x29, 200]
-.LVL236:
-	and	x2, x27, 1020
-	ldr	w1, [x29, 208]
-	.loc 1 303 0
-	mov	w19, 1
-	.loc 1 300 0
-	bl	scan_freq
-.LVL237:
-	mov	w28, w0
-.LVL238:
-.L128:
-	.loc 1 305 0
-	ldr	x0, [x29, 200]
-.LVL239:
-	bl	set_ddr_freq
-.LVL240:
-	.loc 1 306 0
-	cbnz	w28, .L159
-	.loc 1 307 0
-	mov	x1, x24
-	mov	x0, x23
-	bl	random_test
-.LVL241:
-	mov	w2, w0
-.LVL242:
-	.loc 1 311 0
-	cbnz	w0, .L160
-	str	w2, [x29, 100]
-	.loc 1 312 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL243:
-	bl	crosstalk
-.LVL244:
-	.loc 1 316 0
-	ldr	w2, [x29, 100]
-	.loc 1 312 0
-	mov	w19, w0
-.LVL245:
-	.loc 1 316 0
-	cbnz	w0, .L161
-	.loc 1 317 0
-	mov	x1, x24
-	mov	x0, x23
-.LVL246:
-	bl	diagonalscan
-.LVL247:
-	mov	w28, w0
-.LVL248:
-	.loc 1 322 0
-	cbnz	w0, .L162
-	.loc 1 324 0
-	bl	ctrlc
-.LVL249:
-	cbnz	w0, .L163
-	.loc 1 319 0
-	mov	w19, 4
-.LVL250:
-.L127:
-	add	x25, x25, 1
-.LVL251:
-	.loc 1 281 0 discriminator 2
-	cmp	x25, 4
-	bne	.L130
-	mov	w2, 0
-	mov	w28, 0
-.LVL252:
-.L129:
-	.loc 1 329 0
-	orr	w2, w28, w2
-.LVL253:
-	cbz	w2, .L126
-.LVL254:
-.L131:
-	.loc 1 381 0
-	cbz	w28, .L114
-	.loc 1 382 0
-	ldr	x0, [x29, 120]
-	add	x0, x0, :lo12:.LANCHOR2
-	ldr	x1, [x0, w19, sxtw 3]
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
-	bl	printf
-.LVL255:
-	b	.L97
-.LVL256:
-.L125:
-	.loc 1 266 0
-	mov	x0, 10485760
-	.loc 1 268 0
-	stp	xzr, xzr, [x29, 144]
-	.loc 1 266 0
-	stp	xzr, x0, [x29, 160]
-.LVL257:
-	.loc 1 269 0
-	stp	xzr, xzr, [x29, 176]
-.LVL258:
-	str	xzr, [x29, 192]
-	b	.L211
-.LVL259:
-.L155:
-	.loc 1 274 0
-	mov	w27, 1000
-	b	.L124
-.LVL260:
-.L156:
-	.loc 1 288 0
-	mov	w19, 2
-	b	.L128
-.LVL261:
-.L157:
-	.loc 1 292 0
-	mov	w19, 3
-	b	.L128
-.LVL262:
-.L158:
-	.loc 1 297 0
-	mov	w19, 4
-	b	.L128
-.LVL263:
-.L159:
-	mov	w2, 0
-	b	.L129
-.LVL264:
-.L160:
-	.loc 1 307 0
-	mov	w28, w0
-	mov	w2, 0
-	.loc 1 309 0
-	mov	w19, 2
-	b	.L129
-.LVL265:
-.L161:
-	.loc 1 312 0
-	mov	w28, w0
-	.loc 1 314 0
-	mov	w19, 3
-	b	.L129
-.LVL266:
-.L162:
-	mov	w2, w19
-.LVL267:
-.L212:
-	.loc 1 319 0
-	mov	w19, 4
-	b	.L129
-.L163:
-	.loc 1 325 0
-	mov	w2, -1
-	b	.L212
-.LVL268:
-.L209:
-.LBB58:
-.LBB56:
-	.loc 1 86 0
-	ldr	x4, [x29, 216]
-	.loc 1 87 0
-	mov	x1, 0
-	mov	w24, 0
-	.loc 1 88 0
-	mov	w6, 1
-	.loc 1 87 0
-	add	x5, x3, x4
-.LVL269:
-.L136:
-	.loc 1 86 0
-	ldr	x2, [x20, x1, lsl 3]
-	cmp	x4, x2
-	bcc	.L135
-	.loc 1 87 0
-	ldr	x7, [x21, x1, lsl 3]
-	add	x2, x2, x7
-	.loc 1 88 0
-	cmp	x5, x2
-	csel	w24, w24, w6, hi
-.LVL270:
-.L135:
-	add	x1, x1, 1
-.LVL271:
-	.loc 1 85 0
-	cmp	w0, w1
-	bhi	.L136
-	.loc 1 89 0
-	cbnz	w24, .L137
-	.loc 1 90 0
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.LVL272:
-.L138:
-.LBE56:
-.LBE58:
-	.loc 1 339 0
-	cbnz	w24, .L134
-	.loc 1 340 0
-	mov	w22, 1
-.LVL273:
-	b	.L97
-.LVL274:
-.L137:
-.LBB59:
-.LBB57:
-	.loc 1 92 0
-	str	x4, [x29, 136]
-	.loc 1 94 0
-	cmp	w0, 1
-	.loc 1 93 0
-	str	x3, [x29, 168]
-.LVL275:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 144]
-	.loc 1 94 0
-	cmp	w0, 2
-	.loc 1 96 0
-	str	xzr, [x29, 176]
-.LVL276:
-	.loc 1 94 0
-	beq	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 152]
-	.loc 1 94 0
-	cmp	w0, 4
-	.loc 1 96 0
-	str	xzr, [x29, 184]
-.LVL277:
-	.loc 1 94 0
-	bne	.L138
-	.loc 1 95 0
-	str	xzr, [x29, 160]
-	.loc 1 96 0
-	str	xzr, [x29, 192]
-.LVL278:
-	b	.L138
-.LVL279:
-.L149:
-.LBE57:
-.LBE59:
-	.loc 1 350 0
-	mov	x27, 0
-	.loc 1 348 0
-	add	w25, w25, 1
-.LVL280:
-	.loc 1 349 0
-	mov	w1, w25
-	mov	x0, x26
-	bl	printf
-.LVL281:
-.L141:
-	.loc 1 350 0 discriminator 1
-	cmp	w24, w27
-	bhi	.L147
-	mov	w0, 0
-	mov	w28, 0
-.LVL282:
-.L146:
-	.loc 1 376 0
-	orr	w0, w28, w0
-.LVL283:
-	cbnz	w0, .L131
-.LVL284:
-.L148:
-	.loc 1 347 0
-	ldr	x0, [x29, 208]
-	cbz	x0, .L149
-	.loc 1 347 0 is_stmt 0 discriminator 1
-	cmp	x0, x25, uxtw
-	bhi	.L149
-	b	.L114
-.LVL285:
-.L147:
-	.loc 1 357 0 is_stmt 1
-	ldr	x1, [x21, x27, lsl 3]
-	.loc 1 351 0
-	cmp	w23, 3
-	.loc 1 357 0
-	ldr	x0, [x20, x27, lsl 3]
-	.loc 1 351 0
-	beq	.L143
-	cmp	w23, 4
-	beq	.L144
-	.loc 1 353 0
-	bl	random_test
-.LVL286:
-.L213:
-	.loc 1 361 0
-	mov	w28, w0
-.LVL287:
-	.loc 1 369 0
-	bl	ctrlc
-.LVL288:
-	cbnz	w0, .L166
-	add	x27, x27, 1
-.LVL289:
-	mov	w19, w23
-	.loc 1 373 0
-	cbz	w28, .L141
-.LVL290:
-	mov	w19, w23
-.LVL291:
-	b	.L146
-.LVL292:
-.L143:
-	.loc 1 357 0
-	bl	crosstalk
-.LVL293:
-	b	.L213
-.L144:
-	.loc 1 361 0
-	bl	diagonalscan
-.LVL294:
-	b	.L213
-.LVL295:
-.L166:
-	mov	w19, w23
-	.loc 1 370 0
-	mov	w0, -1
-	b	.L146
-.LVL296:
-.L106:
-	.loc 1 220 0
+.L74:
+	.loc 2 132 0
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
-	ldrb	w0, [x0, w24, sxtw]
-	cmp	w22, w0
-	blt	.L150
-	sub	w22, w22, #2
-.LVL297:
-	.loc 1 220 0 is_stmt 0 discriminator 1
-	mov	x26, 0
-	lsl	x22, x22, 3
-.LVL298:
-.L109:
-	.loc 1 225 0 is_stmt 1 discriminator 1
-	cmp	x26, x22
-	bne	.L110
-	.loc 1 232 0
-	ldp	x2, x3, [x29, 200]
-	mov	w1, w23
-	ldp	x4, x5, [x29, 216]
-	adrp	x0, .LC28
-	ldr	x6, [x29, 232]
-	add	x0, x0, :lo12:.LC28
-	bl	printf
-.LVL299:
-	.loc 1 238 0
-	add	x2, x29, 128
+	ldrb	w0, [x0, w25, sxtw]
+	cmp	w23, w0
+	blt	.L112
+	sub	w23, w23, #2
+.LVL229:
+	.loc 2 132 0 is_stmt 0 discriminator 1
+	mov	x27, 0
+	lsl	x23, x23, 3
+.LVL230:
+.L77:
+	.loc 2 137 0 is_stmt 1 discriminator 1
+	cmp	x27, x23
+	bne	.L78
+	.loc 2 147 0
+	add	x2, x29, 112
 	mov	w1, 0
 	mov	w0, 53
 	bl	uclass_get_device
-.LVL300:
-	mov	w22, w0
-.LVL301:
-	.loc 1 239 0
-	cbz	w0, .L111
-	.loc 1 240 0
+.LVL231:
+	mov	w23, w0
+.LVL232:
+	.loc 2 148 0
+	cbz	w0, .L79
+	.loc 2 149 0
 	mov	w1, w0
-	adrp	x0, .LC29
-.LVL302:
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC21
+.LVL233:
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.LVL303:
-.L97:
-	.loc 1 387 0
-	mov	w0, w22
+.LVL234:
+.L72:
+	.loc 2 308 0
+	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
+	ldp	x29, x30, [sp], 224
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_restore 27
@@ -2083,83 +1584,8 @@ do_ddr_test:
 	.cfi_def_cfa 31, 0
 	ret
 	.cfi_endproc
-.LFE258:
+.LFE256:
 	.size	do_ddr_test, .-do_ddr_test
-	.section	.text.print_memory,"ax",@progbits
-	.align	2
-	.global	print_memory
-	.type	print_memory, %function
-print_memory:
-.LFB278:
-	.loc 3 81 0
-	.cfi_startproc
-.LVL304:
-	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	mov	x20, x0
-.LVL305:
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -16
-	.cfi_offset 22, -8
-	.loc 3 86 0
-	adrp	x21, .LC38
-	.loc 3 85 0
-	lsr	x22, x1, 2
-	.loc 3 86 0
-	add	x21, x21, :lo12:.LC38
-	.loc 3 85 0
-	mov	w19, 0
-.LVL306:
-.L217:
-	.loc 3 85 0 is_stmt 0 discriminator 1
-	uxtw	x1, w19
-	cmp	x1, x22
-	bcc	.L218
-	.loc 3 89 0 is_stmt 1
-	ldp	x19, x20, [sp, 16]
-.LVL307:
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL308:
-.L218:
-	.cfi_restore_state
-	.loc 3 87 0 discriminator 3
-	add	w3, w19, 3
-	add	w2, w19, 2
-	add	w0, w19, 1
-	lsl	x1, x1, 2
-	.loc 3 85 0 discriminator 3
-	add	w19, w19, 4
-.LVL309:
-	.loc 3 86 0 discriminator 3
-	ldr	w5, [x20, x3, lsl 2]
-	ldr	w4, [x20, x2, lsl 2]
-	ldr	w3, [x20, x0, lsl 2]
-	mov	x0, x21
-	ldr	w2, [x20, x1]
-	add	x1, x20, x1
-	bl	printf
-.LVL310:
-	b	.L217
-	.cfi_endproc
-.LFE278:
-	.size	print_memory, .-print_memory
 	.global	_u_boot_list_2_cmd_2_ddr_test
 	.section	.rodata
 	.align	3
@@ -2173,54 +1599,45 @@ print_memory:
 	.word	267448335
 	.word	0
 	.word	-1
-	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
-.LC16:
-	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
-.LC17:
+.LC1:
 	.string	"\nbitflip:   \n"
-.LC18:
+.LC2:
 	.string	"\b\b\b%3u"
-.LC19:
+.LC3:
 	.string	"%3u\b\b\b"
-.LC20:
+.LC4:
 	.string	"\nISI:\n"
-.LC21:
+.LC5:
 	.string	"malloc %lu byte fail\n"
 	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
-.LC22:
+.LC6:
 	.string	"\nDiagonalScan\n"
+.LC7:
+	.string	"get page size fail:0x%x\n"
 	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
-.LC23:
-	.string	"available memory for test:\n"
-.LC24:
-	.string	"\tstart\t\t end\tlength\n"
-.LC25:
-	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
-.LC26:
+.LC18:
+	.string	"ddr tester version 1.0.1\n"
+.LC19:
 	.string	"test parameters error\n"
-.LC27:
+.LC20:
 	.string	"test pattern error\n"
-.LC28:
-	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
-.LC29:
+.LC21:
 	.string	"rockchip dmc probe fail: %d\n"
-.LC30:
-	.string	"fasttest need %uMB, but actually only %luMB\n"
-.LC31:
+.LC22:
 	.string	"\rtimes:%08u:\n"
-.LC32:
+.LC23:
 	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
-.LC33:
-	.string	"Invalid test address\n"
-.LC34:
+.LC24:
 	.string	"\rtimes:%08u, "
-.LC35:
+.LC25:
 	.string	"\n%s test fail\n"
-.LC36:
+.LC26:
 	.string	"\ntest pass\n"
-.LC37:
+.LC27:
 	.string	"test pattern unsupported\n"
+.LC28:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
 	.section	.rodata.g_isi_pattern,"a",@progbits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -2259,49 +1676,34 @@ g_isi_pattern:
 	.word	0
 	.word	0
 	.word	0
-	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
-.LC38:
-	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
 	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
-.LC5:
+.LC8:
 	.string	"%u"
-.LC6:
+.LC9:
 	.string	"\b"
-.LC7:
+.LC10:
 	.string	" "
-.LC8:
+.LC11:
 	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
-.LC9:
+.LC12:
 	.string	"%4lu"
-.LC10:
+.LC13:
 	.string	"\b\b\b\b"
-.LC11:
+.LC14:
 	.string	"    "
-.LC12:
+.LC15:
 	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
 	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
-.LC13:
+.LC16:
 	.string	"% d:change freq to %d Hz\n"
-.LC14:
-	.string	"\tchange freq success: %d Hz\n"
-.LC15:
+.LC17:
 	.string	"check data fail at %d Hz\n"
-	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
-.LC1:
-	.string	"current freq:%lu Hz\n"
-	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
-.LC2:
-	.string	"vdd_logic"
-.LC3:
-	.string	"Cannot set regulator name\n"
-.LC4:
-	.string	"set vdd_logic fail\n"
 	.section	.rodata.str1.1,"aMS",@progbits,1
-.LC39:
+.LC29:
 	.string	"ddr_test"
-.LC40:
+.LC30:
 	.string	"for dram simple test\n"
-.LC41:
+.LC31:
 	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
 	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
 	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
@@ -2324,19 +1726,19 @@ g_isi_pattern:
 	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
 	.ascii	"start from"
 	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
-.LC42:
+.LC32:
 	.string	"changefreq"
-.LC43:
+.LC33:
 	.string	"scanfreq"
-.LC44:
+.LC34:
 	.string	"random"
-.LC45:
+.LC35:
 	.string	"crosstalk"
-.LC46:
+.LC36:
 	.string	"diagonalscan"
-.LC47:
+.LC37:
 	.string	"fast_test"
-.LC48:
+.LC38:
 	.string	"full_test"
 	.section	.rodata.test_pat_param,"a",@progbits
 	.align	3
@@ -2357,44 +1759,45 @@ test_pat_param:
 	.type	test_pattern, %object
 	.size	test_pattern, 56
 test_pattern:
-	.xword	.LC42
-	.xword	.LC43
-	.xword	.LC44
-	.xword	.LC45
-	.xword	.LC46
-	.xword	.LC47
-	.xword	.LC48
+	.xword	.LC32
+	.xword	.LC33
+	.xword	.LC34
+	.xword	.LC35
+	.xword	.LC36
+	.xword	.LC37
+	.xword	.LC38
 	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
 	.align	2
 	.type	_u_boot_list_2_cmd_2_ddr_test, %object
 	.size	_u_boot_list_2_cmd_2_ddr_test, 48
 _u_boot_list_2_cmd_2_ddr_test:
-	.8byte	.LC39
+	.8byte	.LC29
 	.word	7
 	.word	1
 	.8byte	do_ddr_test
-	.8byte	.LC40
-	.8byte	.LC41
+	.8byte	.LC30
+	.8byte	.LC31
 	.8byte	0
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/dm/device.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/linux/list.h"
-	.file 15 "include/part.h"
-	.file 16 "include/flash.h"
-	.file 17 "include/lmb.h"
-	.file 18 "include/asm-generic/u-boot.h"
-	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 20 "include/command.h"
-	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 22 "include/libfdt_env.h"
+	.file 5 "include/common.h"
+	.file 6 "./arch/arm/include/asm/types.h"
+	.file 7 "include/linux/types.h"
+	.file 8 "include/errno.h"
+	.file 9 "include/linux/string.h"
+	.file 10 "include/efi.h"
+	.file 11 "include/dm/device.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/linux/list.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/command.h"
+	.file 20 "include/linux/libfdt_env.h"
+	.file 21 "include/linux/../../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/linux/libfdt.h"
 	.file 23 "include/image.h"
 	.file 24 "include/dm/uclass-id.h"
 	.file 25 "./arch/arm/include/asm/global_data.h"
@@ -2410,27 +1813,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.file 35 "include/iomux.h"
 	.file 36 "include/log.h"
 	.file 37 "include/stdio.h"
-	.file 38 "include/vsprintf.h"
-	.file 39 "include/power/regulator.h"
-	.file 40 "include/linux/delay.h"
-	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.file 38 "./arch/arm/include/asm/arch/sdram_common.h"
+	.file 39 "cmd/ddr_tool/../memtester/io_map.h"
+	.file 40 "cmd/ddr_tool/../memtester/ddr_tester_common.h"
+	.file 41 "include/vsprintf.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0x2c16
+	.4byte	0x27ad
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF486
+	.4byte	.LASF478
 	.byte	0xc
-	.4byte	.LASF487
-	.4byte	.LASF488
-	.4byte	.Ldebug_ranges0+0x190
+	.4byte	.LASF479
+	.4byte	.LASF480
+	.4byte	.Ldebug_ranges0+0x90
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x5
 	.byte	0xd
 	.4byte	0x34
 	.uleb128 0x3
@@ -2449,7 +1852,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF2
 	.uleb128 0x5
 	.4byte	.LASF21
-	.byte	0x9
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x59
 	.uleb128 0x6
@@ -2462,7 +1865,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF3
 	.uleb128 0x2
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x34
 	.uleb128 0x3
@@ -2471,7 +1874,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF6
 	.uleb128 0x2
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x6
 	.byte	0x12
 	.4byte	0x84
 	.uleb128 0x3
@@ -2488,26 +1891,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF10
 	.uleb128 0x7
 	.string	"u8"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x1f
 	.4byte	0x34
 	.uleb128 0x8
 	.4byte	0x99
 	.uleb128 0x7
 	.string	"u32"
-	.byte	0x7
+	.byte	0x6
 	.byte	0x25
 	.4byte	0x84
 	.uleb128 0x4
 	.4byte	0xa8
 	.uleb128 0x2
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x6
 	.byte	0x31
 	.4byte	0x92
 	.uleb128 0x2
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x6
 	.byte	0x32
 	.4byte	0x92
 	.uleb128 0x3
@@ -2536,34 +1939,34 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.uleb128 0x2
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x7
 	.byte	0x59
 	.4byte	0x47
 	.uleb128 0x2
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x7
 	.byte	0x5b
 	.4byte	0x3b
 	.uleb128 0x2
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x7
 	.byte	0x69
 	.4byte	0x67
 	.uleb128 0x2
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x7
 	.byte	0x6b
 	.4byte	0x79
 	.uleb128 0x2
 	.4byte	.LASF20
-	.byte	0x8
+	.byte	0x7
 	.byte	0x97
 	.4byte	0x79
 	.uleb128 0xa
 	.byte	0x8
 	.uleb128 0x5
 	.4byte	.LASF22
-	.byte	0xa
+	.byte	0x9
 	.byte	0xb
 	.4byte	0xf3
 	.uleb128 0x3
@@ -2577,130 +1980,130 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xd
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x140
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xd
 	.4byte	.LASF26
-	.byte	0xb
+	.byte	0xa
 	.2byte	0x143
 	.4byte	0x149
 	.uleb128 0xe
 	.4byte	.LASF45
 	.byte	0xa0
-	.byte	0xc
+	.byte	0xb
 	.byte	0x80
 	.4byte	0x25d
 	.uleb128 0xf
 	.4byte	.LASF27
-	.byte	0xc
+	.byte	0xb
 	.byte	0x81
-	.4byte	0x1505
+	.4byte	0x1517
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0x82
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF29
-	.byte	0xc
+	.byte	0xb
 	.byte	0x83
 	.4byte	0x135
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF30
-	.byte	0xc
+	.byte	0xb
 	.byte	0x84
 	.4byte	0x135
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF31
-	.byte	0xc
+	.byte	0xb
 	.byte	0x85
 	.4byte	0x135
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF32
-	.byte	0xc
+	.byte	0xb
 	.byte	0x86
-	.4byte	0x14d0
+	.4byte	0x14e2
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF33
-	.byte	0xc
+	.byte	0xb
 	.byte	0x87
 	.4byte	0x109
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF34
-	.byte	0xc
+	.byte	0xb
 	.byte	0x88
 	.4byte	0x25d
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF35
-	.byte	0xc
+	.byte	0xb
 	.byte	0x89
 	.4byte	0x135
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF36
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8a
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF37
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8b
 	.4byte	0x135
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF38
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8c
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF39
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8d
 	.4byte	0x290
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF40
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8e
 	.4byte	0x290
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF41
-	.byte	0xc
+	.byte	0xb
 	.byte	0x8f
 	.4byte	0x290
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0x90
 	.4byte	0x11f
 	.byte	0x90
 	.uleb128 0xf
 	.4byte	.LASF43
-	.byte	0xc
+	.byte	0xb
 	.byte	0x91
 	.4byte	0x59
 	.byte	0x94
 	.uleb128 0x10
 	.string	"seq"
-	.byte	0xc
+	.byte	0xb
 	.byte	0x92
 	.4byte	0x59
 	.byte	0x98
@@ -2719,7 +2122,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF44
-	.byte	0xd
+	.byte	0xc
 	.byte	0x10
 	.4byte	0x26a
 	.uleb128 0xb
@@ -2732,18 +2135,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF46
 	.byte	0x10
-	.byte	0xe
+	.byte	0xd
 	.byte	0x16
 	.4byte	0x2b5
 	.uleb128 0xf
 	.4byte	.LASF47
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF48
-	.byte	0xe
+	.byte	0xd
 	.byte	0x17
 	.4byte	0x2b5
 	.byte	0x8
@@ -2754,18 +2157,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF49
 	.byte	0x10
-	.byte	0xf
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x2e0
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xf
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF50
-	.byte	0xf
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x2f9
 	.byte	0x8
@@ -2792,41 +2195,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x2ff
 	.uleb128 0x5
 	.4byte	.LASF49
-	.byte	0xf
+	.byte	0xe
 	.byte	0xce
 	.4byte	0x30a
 	.uleb128 0x15
 	.2byte	0x1218
-	.byte	0x10
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x361
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x109
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfe
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x109
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x361
 	.byte	0x18
 	.uleb128 0x16
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x372
 	.2byte	0x1018
@@ -2847,7 +2250,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x31a
 	.uleb128 0xb
@@ -2857,7 +2260,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x5
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x38e
 	.uleb128 0x3
@@ -2867,18 +2270,18 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF59
 	.byte	0x10
-	.byte	0x11
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x3d0
 	.uleb128 0xf
 	.4byte	.LASF60
-	.byte	0x11
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xc3
 	.byte	0x8
@@ -2886,24 +2289,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF61
 	.byte	0xa0
-	.byte	0x11
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x401
 	.uleb128 0x10
 	.string	"cnt"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x11
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF62
-	.byte	0x11
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x401
 	.byte	0x10
@@ -2918,41 +2321,41 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x437
 	.uleb128 0xf
 	.4byte	.LASF63
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x3d0
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF64
-	.byte	0x11
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x3d0
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x19
 	.string	"lmb"
-	.byte	0x11
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x411
 	.uleb128 0x1a
 	.byte	0x10
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x463
 	.uleb128 0xf
 	.4byte	.LASF54
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xb8
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF51
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xc3
 	.byte	0x8
@@ -2960,120 +2363,120 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF65
 	.byte	0xc8
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x554
 	.uleb128 0xf
 	.4byte	.LASF66
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3b
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF67
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xc3
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF68
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF69
-	.byte	0x12
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF70
-	.byte	0x12
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF71
-	.byte	0x12
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
 	.4byte	.LASF72
-	.byte	0x12
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x280
 	.byte	0x60
 	.uleb128 0xf
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x47
 	.byte	0x66
 	.uleb128 0xf
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3b
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x109
 	.byte	0x78
 	.uleb128 0xf
 	.4byte	.LASF83
-	.byte	0x12
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x109
 	.byte	0x80
 	.uleb128 0xf
 	.4byte	.LASF84
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x554
 	.byte	0x88
@@ -3087,89 +2490,89 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x2
 	.4byte	.LASF85
-	.byte	0x12
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x463
 	.uleb128 0x5
 	.4byte	.LASF86
-	.byte	0x13
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF87
-	.byte	0x13
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF88
-	.byte	0x13
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF89
-	.byte	0x13
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF90
-	.byte	0x13
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF91
-	.byte	0x13
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x109
 	.uleb128 0x5
 	.4byte	.LASF92
-	.byte	0x13
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x109
 	.uleb128 0xe
 	.4byte	.LASF93
 	.byte	0x30
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1e
 	.4byte	0x61d
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0x14
+	.byte	0x13
 	.byte	0x1f
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x13
 	.byte	0x20
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x13
 	.byte	0x21
 	.4byte	0x59
 	.byte	0xc
 	.uleb128 0x10
 	.string	"cmd"
-	.byte	0x14
+	.byte	0x13
 	.byte	0x23
 	.4byte	0x647
 	.byte	0x10
 	.uleb128 0xf
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x13
 	.byte	0x24
 	.4byte	0xf3
 	.byte	0x18
 	.uleb128 0xf
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x13
 	.byte	0x26
 	.4byte	0xf3
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2a
 	.4byte	0x676
 	.byte	0x28
@@ -3217,14 +2620,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x64d
 	.uleb128 0x2
 	.4byte	.LASF99
-	.byte	0x14
+	.byte	0x13
 	.byte	0x2e
 	.4byte	0x5bc
 	.uleb128 0x1b
 	.4byte	.LASF167
 	.byte	0x4
 	.4byte	0x59
-	.byte	0x14
+	.byte	0x13
 	.byte	0x7a
 	.4byte	0x6aa
 	.uleb128 0x1c
@@ -3237,92 +2640,92 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF102
 	.sleb128 -1
 	.byte	0
-	.uleb128 0xe
+	.uleb128 0x2
 	.4byte	.LASF103
+	.byte	0x14
+	.byte	0x11
+	.4byte	0x12a
+	.uleb128 0xe
+	.4byte	.LASF104
 	.byte	0x28
 	.byte	0x15
 	.byte	0x39
-	.4byte	0x72f
+	.4byte	0x73a
 	.uleb128 0xf
-	.4byte	.LASF104
+	.4byte	.LASF105
 	.byte	0x15
 	.byte	0x3a
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF105
+	.4byte	.LASF106
 	.byte	0x15
 	.byte	0x3b
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF106
+	.4byte	.LASF107
 	.byte	0x15
 	.byte	0x3c
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF107
+	.4byte	.LASF108
 	.byte	0x15
 	.byte	0x3d
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF108
+	.4byte	.LASF109
 	.byte	0x15
 	.byte	0x3e
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF109
+	.4byte	.LASF110
 	.byte	0x15
 	.byte	0x3f
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x14
 	.uleb128 0xf
-	.4byte	.LASF110
+	.4byte	.LASF111
 	.byte	0x15
 	.byte	0x40
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF111
+	.4byte	.LASF112
 	.byte	0x15
 	.byte	0x43
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x1c
 	.uleb128 0xf
-	.4byte	.LASF112
+	.4byte	.LASF113
 	.byte	0x15
 	.byte	0x46
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF113
+	.4byte	.LASF114
 	.byte	0x15
 	.byte	0x49
-	.4byte	0x740
+	.4byte	0x6aa
 	.byte	0x24
 	.byte	0
-	.uleb128 0x5
-	.4byte	.LASF114
+	.uleb128 0xd
+	.4byte	.LASF115
 	.byte	0x16
-	.byte	0xf
-	.4byte	0x73a
+	.2byte	0x136
+	.4byte	0x746
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x6aa
-	.uleb128 0x2
-	.4byte	.LASF115
-	.byte	0x16
-	.byte	0x12
-	.4byte	0x12a
+	.4byte	0x6b5
 	.uleb128 0x1e
 	.4byte	.LASF116
 	.byte	0x40
 	.byte	0x17
 	.2byte	0x134
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.uleb128 0x1f
 	.4byte	.LASF117
 	.byte	0x17
@@ -3393,12 +2796,12 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF128
 	.byte	0x17
 	.2byte	0x140
-	.4byte	0x7f5
+	.4byte	0x7f6
 	.byte	0x20
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x114
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
@@ -3407,13 +2810,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF129
 	.byte	0x17
 	.2byte	0x141
-	.4byte	0x74b
+	.4byte	0x74c
 	.uleb128 0x1e
 	.4byte	.LASF130
 	.byte	0x30
 	.byte	0x17
 	.2byte	0x143
-	.4byte	0x893
+	.4byte	0x894
 	.uleb128 0x1f
 	.4byte	.LASF54
 	.byte	0x17
@@ -3473,24 +2876,24 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF137
 	.byte	0x17
 	.2byte	0x149
-	.4byte	0x811
+	.4byte	0x812
 	.uleb128 0x22
 	.4byte	.LASF138
 	.2byte	0x280
 	.byte	0x17
 	.2byte	0x14f
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.uleb128 0x1f
 	.4byte	.LASF139
 	.byte	0x17
 	.2byte	0x155
-	.4byte	0xa3c
+	.4byte	0xa3d
 	.byte	0
 	.uleb128 0x1f
 	.4byte	.LASF140
 	.byte	0x17
 	.2byte	0x156
-	.4byte	0x805
+	.4byte	0x806
 	.byte	0x8
 	.uleb128 0x1f
 	.4byte	.LASF141
@@ -3580,7 +2983,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"os"
 	.byte	0x17
 	.2byte	0x16e
-	.4byte	0x893
+	.4byte	0x894
 	.byte	0xb8
 	.uleb128 0x21
 	.string	"ep"
@@ -3640,7 +3043,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"kbd"
 	.byte	0x17
 	.2byte	0x17a
-	.4byte	0xa42
+	.4byte	0xa43
 	.2byte	0x130
 	.uleb128 0x23
 	.4byte	.LASF163
@@ -3663,7 +3066,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x805
+	.4byte	0x806
 	.uleb128 0x9
 	.byte	0x8
 	.4byte	0x564
@@ -3671,19 +3074,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF165
 	.byte	0x17
 	.2byte	0x18f
-	.4byte	0x89f
+	.4byte	0x8a0
 	.uleb128 0xd
 	.4byte	.LASF166
 	.byte	0x17
 	.2byte	0x191
-	.4byte	0xa48
+	.4byte	0xa49
 	.uleb128 0x1b
 	.4byte	.LASF168
 	.byte	0x4
 	.4byte	0x59
 	.byte	0x18
 	.byte	0xe
-	.4byte	0xc75
+	.4byte	0xc7c
 	.uleb128 0x1c
 	.4byte	.LASF169
 	.byte	0
@@ -3939,8 +3342,11 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1c
 	.4byte	.LASF253
 	.byte	0x54
-	.uleb128 0x1d
+	.uleb128 0x1c
 	.4byte	.LASF254
+	.byte	0x55
+	.uleb128 0x1d
+	.4byte	.LASF255
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x25
@@ -3948,19 +3354,19 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0x24
 	.byte	0xe0
-	.4byte	0xc88
+	.4byte	0xc8f
 	.uleb128 0x1c
-	.4byte	.LASF255
+	.4byte	.LASF256
 	.byte	0x5
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF256
+	.4byte	.LASF257
 	.byte	0x40
 	.byte	0x19
 	.byte	0xc
-	.4byte	0xd01
+	.4byte	0xd08
 	.uleb128 0xf
-	.4byte	.LASF257
+	.4byte	.LASF258
 	.byte	0x19
 	.byte	0x22
 	.4byte	0x3b
@@ -3978,50 +3384,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x84
 	.byte	0xc
 	.uleb128 0xf
-	.4byte	.LASF258
+	.4byte	.LASF259
 	.byte	0x19
 	.byte	0x25
 	.4byte	0x3b
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF259
+	.4byte	.LASF260
 	.byte	0x19
 	.byte	0x26
 	.4byte	0x92
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF260
+	.4byte	.LASF261
 	.byte	0x19
 	.byte	0x28
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF261
+	.4byte	.LASF262
 	.byte	0x19
 	.byte	0x29
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF262
+	.4byte	.LASF263
 	.byte	0x19
 	.byte	0x2b
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF263
+	.4byte	.LASF264
 	.byte	0x19
 	.byte	0x2c
 	.4byte	0x3b
 	.byte	0x38
 	.byte	0
 	.uleb128 0xe
-	.4byte	.LASF264
+	.4byte	.LASF265
 	.byte	0x18
 	.byte	0x1a
 	.byte	0x22
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xf
-	.4byte	.LASF265
+	.4byte	.LASF266
 	.byte	0x1a
 	.byte	0x23
 	.4byte	0xa8
@@ -4033,29 +3439,29 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xa8
 	.byte	0x4
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x25
 	.4byte	0xa8
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF267
+	.4byte	.LASF268
 	.byte	0x1a
 	.byte	0x26
 	.4byte	0x109
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF268
-	.2byte	0x198
+	.4byte	.LASF269
+	.2byte	0x1a0
 	.byte	0x1a
 	.byte	0x29
-	.4byte	0xf28
+	.4byte	0xf3c
 	.uleb128 0x10
 	.string	"bd"
 	.byte	0x1a
 	.byte	0x2a
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0xf
 	.4byte	.LASF42
@@ -4064,193 +3470,193 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x3b
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF266
+	.4byte	.LASF267
 	.byte	0x1a
 	.byte	0x2c
 	.4byte	0x84
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF269
+	.4byte	.LASF270
 	.byte	0x1a
 	.byte	0x2d
 	.4byte	0x3b
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF270
+	.4byte	.LASF271
 	.byte	0x1a
 	.byte	0x2e
 	.4byte	0x3b
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF271
+	.4byte	.LASF272
 	.byte	0x1a
 	.byte	0x30
 	.4byte	0x3b
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF272
+	.4byte	.LASF273
 	.byte	0x1a
 	.byte	0x31
 	.4byte	0x3b
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF273
+	.4byte	.LASF274
 	.byte	0x1a
 	.byte	0x33
 	.4byte	0x3b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF274
+	.4byte	.LASF275
 	.byte	0x1a
 	.byte	0x3d
 	.4byte	0x3b
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF275
+	.4byte	.LASF276
 	.byte	0x1a
 	.byte	0x41
 	.4byte	0x3b
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF276
+	.4byte	.LASF277
 	.byte	0x1a
 	.byte	0x42
 	.4byte	0x3b
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF277
+	.4byte	.LASF278
 	.byte	0x1a
 	.byte	0x44
 	.4byte	0x3b
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF278
+	.4byte	.LASF279
 	.byte	0x1a
 	.byte	0x45
 	.4byte	0x3b
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF279
+	.4byte	.LASF280
 	.byte	0x1a
 	.byte	0x46
 	.4byte	0xc3
 	.byte	0x68
 	.uleb128 0xf
-	.4byte	.LASF280
+	.4byte	.LASF281
 	.byte	0x1a
 	.byte	0x47
 	.4byte	0x3b
 	.byte	0x70
 	.uleb128 0xf
-	.4byte	.LASF281
+	.4byte	.LASF282
 	.byte	0x1a
 	.byte	0x48
 	.4byte	0x3b
 	.byte	0x78
 	.uleb128 0xf
-	.4byte	.LASF282
+	.4byte	.LASF283
 	.byte	0x1a
 	.byte	0x49
 	.4byte	0x3b
 	.byte	0x80
 	.uleb128 0xf
-	.4byte	.LASF283
+	.4byte	.LASF284
 	.byte	0x1a
 	.byte	0x4a
 	.4byte	0x3b
 	.byte	0x88
 	.uleb128 0xf
-	.4byte	.LASF284
+	.4byte	.LASF285
 	.byte	0x1a
 	.byte	0x4b
-	.4byte	0xf28
+	.4byte	0xf3c
 	.byte	0x90
 	.uleb128 0xf
-	.4byte	.LASF285
+	.4byte	.LASF286
 	.byte	0x1a
 	.byte	0x4e
 	.4byte	0x25d
 	.byte	0x98
 	.uleb128 0xf
-	.4byte	.LASF286
+	.4byte	.LASF287
 	.byte	0x1a
 	.byte	0x4f
 	.4byte	0x25d
 	.byte	0xa0
 	.uleb128 0xf
-	.4byte	.LASF287
+	.4byte	.LASF288
 	.byte	0x1a
 	.byte	0x50
 	.4byte	0x290
 	.byte	0xa8
 	.uleb128 0xf
-	.4byte	.LASF288
+	.4byte	.LASF289
 	.byte	0x1a
 	.byte	0x56
 	.4byte	0x263
 	.byte	0xb8
 	.uleb128 0xf
-	.4byte	.LASF289
+	.4byte	.LASF290
 	.byte	0x1a
 	.byte	0x57
 	.4byte	0x135
 	.byte	0xc0
 	.uleb128 0xf
-	.4byte	.LASF290
+	.4byte	.LASF291
 	.byte	0x1a
 	.byte	0x58
 	.4byte	0x3b
 	.byte	0xc8
 	.uleb128 0xf
-	.4byte	.LASF291
+	.4byte	.LASF292
 	.byte	0x1a
 	.byte	0x5a
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0xd0
 	.uleb128 0x10
 	.string	"jt"
 	.byte	0x1a
 	.byte	0x5c
-	.4byte	0xfab
+	.4byte	0xfbf
 	.byte	0xd8
 	.uleb128 0xf
-	.4byte	.LASF292
+	.4byte	.LASF293
 	.byte	0x1a
 	.byte	0x5d
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0xe0
 	.uleb128 0x16
-	.4byte	.LASF293
+	.4byte	.LASF294
 	.byte	0x1a
 	.byte	0x67
 	.4byte	0x84
 	.2byte	0x100
 	.uleb128 0x16
-	.4byte	.LASF294
+	.4byte	.LASF295
 	.byte	0x1a
 	.byte	0x68
 	.4byte	0x84
 	.2byte	0x104
 	.uleb128 0x16
-	.4byte	.LASF295
+	.4byte	.LASF296
 	.byte	0x1a
 	.byte	0x6a
 	.4byte	0x3b
 	.2byte	0x108
 	.uleb128 0x16
-	.4byte	.LASF296
+	.4byte	.LASF297
 	.byte	0x1a
 	.byte	0x6b
 	.4byte	0x3b
 	.2byte	0x110
 	.uleb128 0x16
-	.4byte	.LASF297
+	.4byte	.LASF298
 	.byte	0x1a
 	.byte	0x6c
 	.4byte	0x3b
 	.2byte	0x118
 	.uleb128 0x16
-	.4byte	.LASF298
+	.4byte	.LASF299
 	.byte	0x1a
 	.byte	0x75
 	.4byte	0x25d
@@ -4259,42 +3665,48 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF136
 	.byte	0x1a
 	.byte	0x76
-	.4byte	0xc88
+	.4byte	0xc8f
 	.2byte	0x128
 	.uleb128 0x16
-	.4byte	.LASF299
+	.4byte	.LASF300
 	.byte	0x1a
 	.byte	0x7c
 	.4byte	0x109
 	.2byte	0x168
 	.uleb128 0x16
-	.4byte	.LASF300
+	.4byte	.LASF301
 	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x109
 	.2byte	0x170
 	.uleb128 0x16
-	.4byte	.LASF301
+	.4byte	.LASF302
 	.byte	0x1a
 	.byte	0x83
 	.4byte	0xb8
 	.2byte	0x178
 	.uleb128 0x16
-	.4byte	.LASF302
+	.4byte	.LASF303
 	.byte	0x1a
 	.byte	0x88
-	.4byte	0xd01
+	.4byte	0xd08
 	.2byte	0x180
+	.uleb128 0x16
+	.4byte	.LASF304
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x109
+	.2byte	0x198
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xd3d
+	.4byte	0xd44
 	.uleb128 0xe
-	.4byte	.LASF303
+	.4byte	.LASF305
 	.byte	0x40
 	.byte	0x1b
 	.byte	0x2c
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4308,109 +3720,109 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xd5
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0x2f
-	.4byte	0x1448
+	.4byte	0x145c
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF305
+	.4byte	.LASF307
 	.byte	0x1b
 	.byte	0x30
 	.4byte	0xd5
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF306
+	.4byte	.LASF308
 	.byte	0x1b
 	.byte	0x32
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x20
 	.uleb128 0xf
 	.4byte	.LASF34
 	.byte	0x1b
 	.byte	0x33
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF307
+	.4byte	.LASF309
 	.byte	0x1b
 	.byte	0x34
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF308
+	.4byte	.LASF310
 	.byte	0x1b
 	.byte	0x35
-	.4byte	0xfa0
+	.4byte	0xfb4
 	.byte	0x38
 	.byte	0
 	.uleb128 0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf2e
+	.4byte	0xf42
 	.uleb128 0x27
-	.4byte	.LASF489
+	.4byte	.LASF481
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfa6
+	.4byte	0xfba
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2
-	.4byte	.LASF309
+	.4byte	.LASF311
 	.byte	0x1a
-	.byte	0x8e
-	.4byte	0xd3d
+	.byte	0x8f
+	.4byte	0xd44
 	.uleb128 0x4
-	.4byte	0xfc1
+	.4byte	0xfd5
 	.uleb128 0x5
-	.4byte	.LASF310
-	.byte	0x6
+	.4byte	.LASF312
+	.byte	0x5
 	.byte	0xab
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0xfe7
+	.4byte	0xffb
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF311
-	.byte	0x6
+	.4byte	.LASF313
+	.byte	0x5
 	.byte	0xad
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF312
-	.byte	0x6
+	.4byte	.LASF314
+	.byte	0x5
 	.byte	0xae
-	.4byte	0xfdc
+	.4byte	0xff0
 	.uleb128 0x5
-	.4byte	.LASF313
-	.byte	0x6
+	.4byte	.LASF315
+	.byte	0x5
 	.byte	0xfc
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF314
-	.byte	0x6
+	.4byte	.LASF316
+	.byte	0x5
 	.byte	0xfd
 	.4byte	0x109
 	.uleb128 0x5
-	.4byte	.LASF315
-	.byte	0x6
+	.4byte	.LASF317
+	.byte	0x5
 	.byte	0xfe
 	.4byte	0x109
 	.uleb128 0xe
-	.4byte	.LASF316
+	.4byte	.LASF318
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x2e
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xf
-	.4byte	.LASF317
+	.4byte	.LASF319
 	.byte	0x1c
 	.byte	0x2f
 	.4byte	0x12a
@@ -4420,25 +3832,25 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x8
 	.4byte	0x29
 	.uleb128 0xe
-	.4byte	.LASF318
+	.4byte	.LASF320
 	.byte	0x68
 	.byte	0x1c
 	.byte	0xa6
-	.4byte	0x10da
+	.4byte	0x10ee
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1c
 	.byte	0xa8
-	.4byte	0x10da
+	.4byte	0x10ee
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF319
+	.4byte	.LASF321
 	.byte	0x1c
 	.byte	0xa9
 	.4byte	0x280
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF320
+	.4byte	.LASF322
 	.byte	0x1c
 	.byte	0xaa
 	.4byte	0xb8
@@ -4450,43 +3862,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x59
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x1c
 	.byte	0xad
-	.4byte	0x1104
+	.4byte	0x1118
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF322
+	.4byte	.LASF324
 	.byte	0x1c
 	.byte	0xae
-	.4byte	0x1123
+	.4byte	0x1137
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF323
+	.4byte	.LASF325
 	.byte	0x1c
 	.byte	0xaf
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF324
+	.4byte	.LASF326
 	.byte	0x1c
 	.byte	0xb0
-	.4byte	0x1149
+	.4byte	0x115d
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF325
+	.4byte	.LASF327
 	.byte	0x1c
 	.byte	0xb4
-	.4byte	0x1138
+	.4byte	0x114c
 	.byte	0x48
 	.uleb128 0xf
 	.4byte	.LASF47
 	.byte	0x1c
 	.byte	0xb5
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF326
+	.4byte	.LASF328
 	.byte	0x1c
 	.byte	0xb6
 	.4byte	0x59
@@ -4500,30 +3912,30 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0xf
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
-	.4byte	0xa42
+	.4byte	0xa43
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x103d
+	.4byte	0x1051
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x10ea
+	.4byte	0x10fe
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1123
+	.4byte	0x1137
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
@@ -4531,248 +3943,248 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x110a
+	.4byte	0x111e
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x1138
+	.4byte	0x114c
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1129
+	.4byte	0x113d
 	.uleb128 0x28
-	.4byte	0x1149
+	.4byte	0x115d
 	.uleb128 0x14
-	.4byte	0x10fe
+	.4byte	0x1112
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x113e
+	.4byte	0x1152
 	.uleb128 0x5
-	.4byte	.LASF327
+	.4byte	.LASF329
 	.byte	0x1c
 	.byte	0xbd
-	.4byte	0x10fe
+	.4byte	0x1112
 	.uleb128 0x28
-	.4byte	0x116a
+	.4byte	0x117e
 	.uleb128 0x14
 	.4byte	0x135
 	.uleb128 0x14
 	.4byte	0x59
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF328
+	.4byte	.LASF330
 	.byte	0x1c
 	.2byte	0x11e
-	.4byte	0x1176
+	.4byte	0x118a
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x115a
+	.4byte	0x116e
 	.uleb128 0xb
 	.4byte	0x99
-	.4byte	0x118c
+	.4byte	0x11a0
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF329
+	.4byte	.LASF331
 	.byte	0x1c
 	.2byte	0x1fd
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF330
+	.4byte	.LASF332
 	.byte	0x1c
 	.2byte	0x1fe
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF331
+	.4byte	.LASF333
 	.byte	0x1c
 	.2byte	0x200
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF332
+	.4byte	.LASF334
 	.byte	0x1c
 	.2byte	0x205
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xd
-	.4byte	.LASF333
+	.4byte	.LASF335
 	.byte	0x1c
 	.2byte	0x206
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x11d8
+	.4byte	0x11ec
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3f
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF334
+	.4byte	.LASF336
 	.byte	0x1c
 	.2byte	0x207
-	.4byte	0x11c8
+	.4byte	0x11dc
 	.uleb128 0xd
-	.4byte	.LASF335
+	.4byte	.LASF337
 	.byte	0x1c
 	.2byte	0x209
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF336
+	.4byte	.LASF338
 	.byte	0x1c
 	.2byte	0x20a
-	.4byte	0x117c
+	.4byte	0x1190
 	.uleb128 0xd
-	.4byte	.LASF337
+	.4byte	.LASF339
 	.byte	0x1c
 	.2byte	0x20b
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF338
+	.4byte	.LASF340
 	.byte	0x1c
 	.2byte	0x20c
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0xd
-	.4byte	.LASF339
+	.4byte	.LASF341
 	.byte	0x1c
 	.2byte	0x20d
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xb
-	.4byte	0x1037
-	.4byte	0x1230
+	.4byte	0x104b
+	.4byte	0x1244
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF340
+	.4byte	.LASF342
 	.byte	0x1c
 	.2byte	0x20e
-	.4byte	0x1220
+	.4byte	0x1234
 	.uleb128 0xd
-	.4byte	.LASF341
+	.4byte	.LASF343
 	.byte	0x1c
 	.2byte	0x20f
-	.4byte	0x1037
+	.4byte	0x104b
 	.uleb128 0xd
-	.4byte	.LASF342
+	.4byte	.LASF344
 	.byte	0x1c
 	.2byte	0x210
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x5
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1254
+	.4byte	0x1268
 	.uleb128 0xd
-	.4byte	.LASF343
+	.4byte	.LASF345
 	.byte	0x1c
 	.2byte	0x211
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF344
+	.4byte	.LASF346
 	.byte	0x1c
 	.2byte	0x212
-	.4byte	0x1264
+	.4byte	0x1278
 	.uleb128 0xd
-	.4byte	.LASF345
+	.4byte	.LASF347
 	.byte	0x1c
 	.2byte	0x216
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF346
+	.4byte	.LASF348
 	.byte	0x1c
 	.2byte	0x217
 	.4byte	0xfe
 	.uleb128 0xd
-	.4byte	.LASF347
+	.4byte	.LASF349
 	.byte	0x1c
 	.2byte	0x219
 	.4byte	0x59
 	.uleb128 0xb
 	.4byte	0xe0
-	.4byte	0x12b6
+	.4byte	0x12ca
 	.uleb128 0x17
 	.4byte	0xce
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF348
+	.4byte	.LASF350
 	.byte	0x1c
 	.2byte	0x220
-	.4byte	0x12a5
+	.4byte	0x12b9
 	.uleb128 0xd
-	.4byte	.LASF349
+	.4byte	.LASF351
 	.byte	0x1c
 	.2byte	0x222
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF350
+	.4byte	.LASF352
 	.byte	0x1c
 	.2byte	0x224
 	.4byte	0xa8
 	.uleb128 0xd
-	.4byte	.LASF351
+	.4byte	.LASF353
 	.byte	0x1c
 	.2byte	0x230
-	.4byte	0x101e
+	.4byte	0x1032
 	.uleb128 0x29
-	.4byte	.LASF352
+	.4byte	.LASF354
 	.byte	0x4
 	.4byte	0x84
 	.byte	0x1c
 	.2byte	0x286
-	.4byte	0x1310
+	.4byte	0x1324
 	.uleb128 0x1c
-	.4byte	.LASF353
+	.4byte	.LASF355
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF354
+	.4byte	.LASF356
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF355
+	.4byte	.LASF357
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF356
+	.4byte	.LASF358
 	.byte	0x3
 	.byte	0
 	.uleb128 0xd
-	.4byte	.LASF357
+	.4byte	.LASF359
 	.byte	0x1c
 	.2byte	0x28c
-	.4byte	0x12e6
+	.4byte	0x12fa
 	.uleb128 0xd
-	.4byte	.LASF358
+	.4byte	.LASF360
 	.byte	0x1d
 	.2byte	0x3ba
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF359
+	.4byte	.LASF361
 	.byte	0x1d
 	.2byte	0x3bb
 	.4byte	0x109
 	.uleb128 0xd
-	.4byte	.LASF360
+	.4byte	.LASF362
 	.byte	0x1d
 	.2byte	0x3bc
 	.4byte	0x109
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x1350
+	.4byte	0x1364
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x2a
-	.4byte	.LASF415
-	.byte	0x4
+	.4byte	.LASF379
+	.byte	0x1
 	.byte	0xa
-	.4byte	0x1340
+	.4byte	0x1354
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_isi_pattern
@@ -4782,125 +4194,125 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xe
 	.4byte	.LASF27
 	.byte	0x78
-	.byte	0xc
+	.byte	0xb
 	.byte	0xee
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xf
 	.4byte	.LASF28
-	.byte	0xc
+	.byte	0xb
 	.byte	0xef
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0x10
 	.string	"id"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xf0
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF361
-	.byte	0xc
+	.4byte	.LASF363
+	.byte	0xb
 	.byte	0xf1
-	.4byte	0x1578
+	.4byte	0x158a
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF362
-	.byte	0xc
+	.4byte	.LASF364
+	.byte	0xb
 	.byte	0xf2
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF363
-	.byte	0xc
+	.4byte	.LASF365
+	.byte	0xb
 	.byte	0xf3
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF364
-	.byte	0xc
+	.4byte	.LASF366
+	.byte	0xb
 	.byte	0xf4
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF365
-	.byte	0xc
+	.4byte	.LASF367
+	.byte	0xb
 	.byte	0xf5
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF366
-	.byte	0xc
+	.4byte	.LASF368
+	.byte	0xb
 	.byte	0xf6
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF367
-	.byte	0xc
+	.4byte	.LASF369
+	.byte	0xb
 	.byte	0xf7
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF368
-	.byte	0xc
+	.4byte	.LASF370
+	.byte	0xb
 	.byte	0xf8
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF369
-	.byte	0xc
+	.4byte	.LASF371
+	.byte	0xb
 	.byte	0xf9
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
-	.byte	0xc
+	.4byte	.LASF372
+	.byte	0xb
 	.byte	0xfa
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF371
-	.byte	0xc
+	.4byte	.LASF373
+	.byte	0xb
 	.byte	0xfb
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF372
-	.byte	0xc
+	.4byte	.LASF374
+	.byte	0xb
 	.byte	0xfc
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF373
-	.byte	0xc
+	.4byte	.LASF375
+	.byte	0xb
 	.byte	0xfd
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0x10
 	.string	"ops"
-	.byte	0xc
+	.byte	0xb
 	.byte	0xfe
 	.4byte	0x263
 	.byte	0x68
 	.uleb128 0xf
 	.4byte	.LASF42
-	.byte	0xc
+	.byte	0xb
 	.byte	0xff
 	.4byte	0x11f
 	.byte	0x70
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x136b
+	.4byte	0x137f
 	.uleb128 0x2
-	.4byte	.LASF304
+	.4byte	.LASF306
 	.byte	0x1b
 	.byte	0xf
 	.4byte	0xa8
 	.uleb128 0xe
-	.4byte	.LASF374
+	.4byte	.LASF376
 	.byte	0x20
 	.byte	0x1b
 	.byte	0x19
-	.4byte	0x1490
+	.4byte	0x14a4
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x1b
@@ -4908,13 +4320,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0xf3
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF375
+	.4byte	.LASF377
 	.byte	0x1b
 	.byte	0x1b
 	.4byte	0x59
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF376
+	.4byte	.LASF378
 	.byte	0x1b
 	.byte	0x1c
 	.4byte	0x135
@@ -4923,53 +4335,51 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF47
 	.byte	0x1b
 	.byte	0x1d
-	.4byte	0x1490
+	.4byte	0x14a4
 	.byte	0x18
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1453
+	.4byte	0x1467
 	.uleb128 0x2b
 	.string	"gd"
 	.byte	0x1b
 	.byte	0x57
-	.4byte	0x14a2
-	.uleb128 0x1
-	.byte	0x62
+	.4byte	0x14b4
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xfcc
+	.4byte	0xfe0
 	.uleb128 0x2c
-	.4byte	.LASF490
+	.4byte	.LASF482
 	.byte	0x8
 	.byte	0x1e
 	.byte	0x33
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2d
 	.string	"np"
 	.byte	0x1e
 	.byte	0x34
-	.4byte	0x14ca
+	.4byte	0x14dc
 	.uleb128 0x2e
-	.4byte	.LASF377
+	.4byte	.LASF380
 	.byte	0x1e
 	.byte	0x35
 	.4byte	0xec
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0xf9b
+	.4byte	0xfaf
 	.uleb128 0x2
-	.4byte	.LASF378
+	.4byte	.LASF381
 	.byte	0x1e
 	.byte	0x36
-	.4byte	0x14a8
+	.4byte	0x14ba
 	.uleb128 0xe
-	.4byte	.LASF379
+	.4byte	.LASF382
 	.byte	0x4
 	.byte	0x1f
 	.byte	0xc
-	.4byte	0x14f4
+	.4byte	0x1506
 	.uleb128 0x10
 	.string	"pid"
 	.byte	0x1f
@@ -4978,22 +4388,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF380
+	.4byte	.LASF383
 	.byte	0x1f
 	.byte	0x10
-	.4byte	0x14ff
+	.4byte	0x1511
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x14db
+	.4byte	0x14ed
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1443
+	.4byte	0x1457
 	.uleb128 0xe
 	.4byte	.LASF36
 	.byte	0x30
 	.byte	0x20
 	.byte	0x23
-	.4byte	0x1548
+	.4byte	0x155a
 	.uleb128 0xf
 	.4byte	.LASF35
 	.byte	0x20
@@ -5001,13 +4411,13 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF381
+	.4byte	.LASF384
 	.byte	0x20
 	.byte	0x25
-	.4byte	0x1677
+	.4byte	0x1689
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF382
+	.4byte	.LASF385
 	.byte	0x20
 	.byte	0x26
 	.4byte	0x290
@@ -5021,46 +4431,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x150b
+	.4byte	0x151d
 	.uleb128 0xe
-	.4byte	.LASF383
+	.4byte	.LASF386
 	.byte	0x10
-	.byte	0xc
+	.byte	0xb
 	.byte	0xb5
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0xf
-	.4byte	.LASF384
-	.byte	0xc
+	.4byte	.LASF387
+	.byte	0xb
 	.byte	0xb6
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0xf
-	.4byte	.LASF385
-	.byte	0xc
+	.4byte	.LASF388
+	.byte	0xb
 	.byte	0xb7
 	.4byte	0x109
 	.byte	0x8
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x154e
+	.4byte	0x1560
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1573
+	.4byte	0x1585
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.uleb128 0x14
 	.4byte	0x25d
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x157e
+	.4byte	0x1590
 	.uleb128 0xe
-	.4byte	.LASF386
+	.4byte	.LASF389
 	.byte	0x80
 	.byte	0x20
 	.byte	0x54
-	.4byte	0x1677
+	.4byte	0x1689
 	.uleb128 0xf
 	.4byte	.LASF28
 	.byte	0x20
@@ -5071,88 +4481,88 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.string	"id"
 	.byte	0x20
 	.byte	0x56
-	.4byte	0xa60
+	.4byte	0xa61
 	.byte	0x8
 	.uleb128 0xf
-	.4byte	.LASF387
+	.4byte	.LASF390
 	.byte	0x20
 	.byte	0x57
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x10
 	.uleb128 0xf
-	.4byte	.LASF388
+	.4byte	.LASF391
 	.byte	0x20
 	.byte	0x58
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x18
 	.uleb128 0xf
-	.4byte	.LASF389
+	.4byte	.LASF392
 	.byte	0x20
 	.byte	0x59
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x20
 	.uleb128 0xf
-	.4byte	.LASF390
+	.4byte	.LASF393
 	.byte	0x20
 	.byte	0x5a
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF391
+	.4byte	.LASF394
 	.byte	0x20
 	.byte	0x5b
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF367
+	.4byte	.LASF369
 	.byte	0x20
 	.byte	0x5c
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF368
+	.4byte	.LASF370
 	.byte	0x20
 	.byte	0x5d
-	.4byte	0x158d
+	.4byte	0x159f
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF321
+	.4byte	.LASF323
 	.byte	0x20
 	.byte	0x5e
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF392
+	.4byte	.LASF395
 	.byte	0x20
 	.byte	0x5f
-	.4byte	0x168c
+	.4byte	0x169e
 	.byte	0x50
 	.uleb128 0xf
-	.4byte	.LASF370
+	.4byte	.LASF372
 	.byte	0x20
 	.byte	0x60
 	.4byte	0x59
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF393
+	.4byte	.LASF396
 	.byte	0x20
 	.byte	0x61
 	.4byte	0x59
 	.byte	0x5c
 	.uleb128 0xf
-	.4byte	.LASF394
+	.4byte	.LASF397
 	.byte	0x20
 	.byte	0x62
 	.4byte	0x59
 	.byte	0x60
 	.uleb128 0xf
-	.4byte	.LASF372
+	.4byte	.LASF374
 	.byte	0x20
 	.byte	0x63
 	.4byte	0x59
 	.byte	0x64
 	.uleb128 0xf
-	.4byte	.LASF373
+	.4byte	.LASF375
 	.byte	0x20
 	.byte	0x64
 	.4byte	0x59
@@ -5172,27 +4582,27 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1593
+	.4byte	0x15a5
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x168c
+	.4byte	0x169e
 	.uleb128 0x14
-	.4byte	0x1548
+	.4byte	0x155a
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x167d
+	.4byte	0x168f
 	.uleb128 0x5
-	.4byte	.LASF395
+	.4byte	.LASF398
 	.byte	0x21
 	.byte	0xb
 	.4byte	0x149
 	.uleb128 0xe
-	.4byte	.LASF396
+	.4byte	.LASF399
 	.byte	0x70
 	.byte	0x22
 	.byte	0x16
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0xf
 	.4byte	.LASF42
 	.byte	0x22
@@ -5209,43 +4619,43 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	.LASF28
 	.byte	0x22
 	.byte	0x19
-	.4byte	0xfb1
+	.4byte	0xfc5
 	.byte	0x8
 	.uleb128 0xf
 	.4byte	.LASF54
 	.byte	0x22
 	.byte	0x1d
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x28
 	.uleb128 0xf
-	.4byte	.LASF397
+	.4byte	.LASF400
 	.byte	0x22
 	.byte	0x1e
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x30
 	.uleb128 0xf
-	.4byte	.LASF398
+	.4byte	.LASF401
 	.byte	0x22
 	.byte	0x23
-	.4byte	0x1759
+	.4byte	0x176b
 	.byte	0x38
 	.uleb128 0xf
-	.4byte	.LASF399
+	.4byte	.LASF402
 	.byte	0x22
 	.byte	0x25
-	.4byte	0x176f
+	.4byte	0x1781
 	.byte	0x40
 	.uleb128 0xf
-	.4byte	.LASF400
+	.4byte	.LASF403
 	.byte	0x22
 	.byte	0x2a
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x48
 	.uleb128 0xf
-	.4byte	.LASF401
+	.4byte	.LASF404
 	.byte	0x22
 	.byte	0x2b
-	.4byte	0x1743
+	.4byte	0x1755
 	.byte	0x50
 	.uleb128 0xf
 	.4byte	.LASF35
@@ -5254,7 +4664,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x135
 	.byte	0x58
 	.uleb128 0xf
-	.4byte	.LASF402
+	.4byte	.LASF405
 	.byte	0x22
 	.byte	0x30
 	.4byte	0x290
@@ -5262,1038 +4672,844 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0x13
 	.4byte	0x59
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x169d
+	.4byte	0x16af
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x172e
+	.4byte	0x1740
 	.uleb128 0x28
-	.4byte	0x1759
+	.4byte	0x176b
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xe7
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x1749
+	.4byte	0x175b
 	.uleb128 0x28
-	.4byte	0x176f
+	.4byte	0x1781
 	.uleb128 0x14
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x14
 	.4byte	0xd5
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x175f
+	.4byte	0x1771
 	.uleb128 0xb
-	.4byte	0x173d
-	.4byte	0x1780
+	.4byte	0x174f
+	.4byte	0x1792
 	.uleb128 0xc
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF403
+	.4byte	.LASF406
 	.byte	0x22
 	.byte	0x48
-	.4byte	0x1775
+	.4byte	0x1787
 	.uleb128 0xb
 	.4byte	0xf3
-	.4byte	0x179b
+	.4byte	0x17ad
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF404
+	.4byte	.LASF407
 	.byte	0x22
 	.byte	0x49
-	.4byte	0x178b
+	.4byte	0x179d
 	.uleb128 0xb
-	.4byte	0x17b6
-	.4byte	0x17b6
+	.4byte	0x17c8
+	.4byte	0x17c8
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x9
 	.byte	0x8
-	.4byte	0x173d
+	.4byte	0x174f
 	.uleb128 0x5
-	.4byte	.LASF405
+	.4byte	.LASF408
 	.byte	0x23
 	.byte	0x15
-	.4byte	0x17a6
+	.4byte	0x17b8
 	.uleb128 0xb
 	.4byte	0x59
-	.4byte	0x17d7
+	.4byte	0x17e9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x2
 	.byte	0
 	.uleb128 0x5
-	.4byte	.LASF406
+	.4byte	.LASF409
 	.byte	0x23
 	.byte	0x1a
-	.4byte	0x17c7
+	.4byte	0x17d9
 	.uleb128 0x25
 	.byte	0x4
 	.4byte	0x84
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x181f
+	.byte	0x2
+	.byte	0x13
+	.4byte	0x1831
 	.uleb128 0x1c
-	.4byte	.LASF407
+	.4byte	.LASF410
 	.byte	0
 	.uleb128 0x1c
-	.4byte	.LASF408
+	.4byte	.LASF411
 	.byte	0x1
 	.uleb128 0x1c
-	.4byte	.LASF409
+	.4byte	.LASF412
 	.byte	0x2
 	.uleb128 0x1c
-	.4byte	.LASF410
+	.4byte	.LASF413
 	.byte	0x3
 	.uleb128 0x1c
-	.4byte	.LASF411
+	.4byte	.LASF414
 	.byte	0x4
 	.uleb128 0x1c
-	.4byte	.LASF412
+	.4byte	.LASF415
 	.byte	0x5
 	.uleb128 0x1c
-	.4byte	.LASF413
+	.4byte	.LASF416
 	.byte	0x6
 	.uleb128 0x1c
-	.4byte	.LASF414
+	.4byte	.LASF417
 	.byte	0x7
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xdb
-	.4byte	0x182f
+	.4byte	0x1841
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x181f
+	.4byte	0x1831
 	.uleb128 0x2a
-	.4byte	.LASF416
-	.byte	0x1
-	.byte	0x1f
-	.4byte	0x182f
+	.4byte	.LASF418
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0x1841
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pattern
 	.uleb128 0xb
 	.4byte	0xa3
-	.4byte	0x1859
+	.4byte	0x186b
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x6
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x1849
+	.4byte	0x185b
 	.uleb128 0x2a
-	.4byte	.LASF417
-	.byte	0x1
-	.byte	0x29
-	.4byte	0x1859
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x28
+	.4byte	0x186b
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	test_pat_param
 	.uleb128 0x2f
-	.4byte	.LASF418
-	.byte	0x1
-	.2byte	0x185
+	.4byte	.LASF420
+	.byte	0x2
+	.2byte	0x136
 	.4byte	0x67c
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	_u_boot_list_2_cmd_2_ddr_test
 	.uleb128 0x30
-	.4byte	.LASF426
-	.byte	0x3
-	.byte	0x50
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
+	.4byte	.LASF429
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x59
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x1904
+	.4byte	0x1b4f
 	.uleb128 0x31
-	.4byte	.LASF267
-	.byte	0x3
-	.byte	0x50
-	.4byte	0x135
-	.4byte	.LLST76
+	.4byte	.LASF421
+	.byte	0x4
+	.byte	0x60
+	.4byte	0x109
+	.4byte	.LLST15
 	.uleb128 0x31
-	.4byte	.LASF51
-	.byte	0x3
-	.byte	0x50
+	.4byte	.LASF422
+	.byte	0x4
+	.byte	0x60
 	.4byte	0x109
-	.4byte	.LLST77
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x52
-	.4byte	0x1365
-	.4byte	.LLST78
+	.4byte	.LLST16
 	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x53
-	.4byte	0xa8
-	.4byte	.LLST79
-	.uleb128 0x33
-	.8byte	.LVL310
-	.4byte	0x2b65
-	.uleb128 0x34
+	.string	"ret"
+	.byte	0x4
+	.byte	0x62
+	.4byte	0x59
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
+	.uleb128 0x33
+	.4byte	0x1bc3
+	.8byte	.LBB6
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x4
+	.byte	0x64
+	.4byte	0x1a2b
 	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xd
-	.byte	0x83
-	.sleb128 -4
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0
-	.byte	0
+	.4byte	0x1bde
+	.4byte	.LLST17
+	.uleb128 0x34
+	.4byte	0x1bd3
+	.4byte	.LLST18
 	.uleb128 0x35
-	.4byte	.LASF428
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a04
+	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x36
-	.string	"buf"
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x1365
-	.4byte	.LLST29
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0xa8
-	.4byte	.LLST30
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST31
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x2e
-	.4byte	0x109
-	.4byte	.LLST32
-	.uleb128 0x31
-	.4byte	.LASF421
-	.byte	0x3
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST33
-	.uleb128 0x37
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x31
-	.4byte	0x1a04
-	.4byte	.LLST34
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x3
-	.byte	0x32
-	.4byte	0x1a0a
-	.4byte	.LLST35
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST36
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x33
-	.4byte	0xa8
-	.4byte	.LLST37
-	.uleb128 0x32
-	.string	"val"
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST38
-	.uleb128 0x37
-	.4byte	.LASF423
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST39
-	.uleb128 0x37
-	.4byte	.LASF424
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST40
+	.4byte	0x1be9
+	.4byte	.LLST19
+	.uleb128 0x36
+	.4byte	0x1bf2
+	.4byte	.LLST20
+	.uleb128 0x36
+	.4byte	0x1bfb
+	.4byte	.LLST21
+	.uleb128 0x36
+	.4byte	0x1c06
+	.4byte	.LLST22
 	.uleb128 0x37
-	.4byte	.LASF425
-	.byte	0x3
-	.byte	0x34
-	.4byte	0x109
-	.4byte	.LLST41
-	.uleb128 0x33
-	.8byte	.LVL115
-	.4byte	0x2b65
-	.uleb128 0x34
+	.4byte	0x1c11
+	.uleb128 0x36
+	.4byte	0x1c1c
+	.4byte	.LLST23
+	.uleb128 0x36
+	.4byte	0x1c27
+	.4byte	.LLST24
+	.uleb128 0x36
+	.4byte	0x1c32
+	.4byte	.LLST25
+	.uleb128 0x38
+	.8byte	.LVL64
+	.4byte	0x26e7
+	.4byte	0x1981
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC16
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x84
 	.sleb128 0
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL66
+	.4byte	0x26f3
+	.4byte	0x199f
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
 	.byte	0
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x109
-	.uleb128 0x9
-	.byte	0x8
-	.4byte	0x42
-	.uleb128 0x30
-	.4byte	.LASF427
-	.byte	0x3
-	.byte	0x1c
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
+	.uleb128 0x38
+	.8byte	.LVL72
+	.4byte	0x26f3
+	.4byte	0x19b9
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1a98
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.byte	0
 	.uleb128 0x38
-	.string	"buf"
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x1365
+	.8byte	.LVL76
+	.4byte	0x26fe
+	.4byte	0x19d7
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x31
-	.4byte	.LASF419
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0xa8
-	.4byte	.LLST25
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
 	.uleb128 0x39
-	.4byte	.LASF420
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x3
-	.byte	0x1c
-	.4byte	0x109
-	.4byte	.LLST26
-	.uleb128 0x2a
-	.4byte	.LASF422
-	.byte	0x3
-	.byte	0x1e
-	.4byte	0x1a04
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 4
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL78
+	.4byte	0x26f3
+	.4byte	0x19f6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
 	.uleb128 0x3a
-	.string	"p"
+	.8byte	.LVL79
+	.4byte	0x26f3
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
 	.byte	0x3
-	.byte	0x1f
-	.4byte	0x1a04
+	.8byte	.LC11
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST27
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x3
-	.byte	0x20
-	.4byte	0xa8
-	.4byte	.LLST28
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.byte	0
 	.byte	0
 	.uleb128 0x3b
-	.4byte	.LASF491
-	.byte	0x3
-	.byte	0xa
-	.byte	0x1
-	.4byte	0x1aae
+	.4byte	0x1b4f
+	.8byte	.LBB15
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x4
+	.byte	0x66
 	.uleb128 0x3c
-	.string	"p"
-	.byte	0x3
-	.byte	0xa
-	.4byte	0x1365
-	.byte	0
+	.4byte	0x1b6a
+	.uleb128 0x3c
+	.4byte	0x1b5f
 	.uleb128 0x35
-	.4byte	.LASF429
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x59
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1d27
-	.uleb128 0x31
-	.4byte	.LASF430
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST3
-	.uleb128 0x31
-	.4byte	.LASF431
-	.byte	0x2
-	.byte	0x57
-	.4byte	0x109
-	.4byte	.LLST4
-	.uleb128 0x3a
-	.string	"ret"
-	.byte	0x2
-	.byte	0x59
-	.4byte	0x59
-	.uleb128 0x1
-	.byte	0x50
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x36
+	.4byte	0x1b75
+	.4byte	.LLST26
+	.uleb128 0x36
+	.4byte	0x1b7e
+	.4byte	.LLST27
 	.uleb128 0x3d
-	.4byte	0x1d95
-	.8byte	.LBB12
-	.4byte	.Ldebug_ranges0+0
-	.byte	0x2
-	.byte	0x5b
-	.4byte	0x1c21
-	.uleb128 0x3e
-	.4byte	0x1db0
-	.4byte	.LLST5
-	.uleb128 0x3e
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+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL49
+	.4byte	0x271e
+	.4byte	0x1d92
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL50
+	.4byte	0x2729
+	.4byte	0x1db7
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL165
-	.4byte	0x2b85
-	.4byte	0x1fae
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL53
+	.4byte	0x2729
+	.4byte	0x1ddc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL166
-	.4byte	0x1904
-	.4byte	0x1fe4
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL54
+	.4byte	0x2735
+	.4byte	0x1e12
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x84
 	.sleb128 0
-	.byte	0x86
+	.byte	0x88
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL171
-	.4byte	0x2b85
-	.4byte	0x2015
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL59
+	.4byte	0x2729
+	.4byte	0x1e43
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0xe
@@ -6305,50 +5521,50 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0x84
 	.sleb128 0
 	.byte	0x22
-	.byte	0x87
+	.byte	0x89
 	.sleb128 0
 	.byte	0x22
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL172
-	.4byte	0x1904
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL60
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
 	.sleb128 144
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x20
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x1
@@ -6357,623 +5573,448 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xa8
-	.4byte	0x2052
+	.4byte	0x1e80
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x7
 	.byte	0
 	.uleb128 0x46
-	.4byte	.LASF443
-	.byte	0x5
-	.byte	0xc
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x209b
-	.uleb128 0x49
-	.4byte	.LASF444
-	.byte	0x5
-	.byte	0xe
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"col"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x48
-	.string	"bw"
-	.byte	0x5
-	.byte	0xf
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF440
-	.byte	0x5
-	.byte	0x10
-	.4byte	0x59
-	.uleb128 0x4c
-	.uleb128 0x48
-	.string	"__v"
-	.byte	0x5
-	.byte	0x13
-	.4byte	0xa8
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF455
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF448
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x25c1
+	.4byte	0x2293
 	.uleb128 0x31
-	.4byte	.LASF445
-	.byte	0x1
-	.byte	0xbc
-	.4byte	0x25c1
-	.4byte	.LLST58
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0x62
+	.4byte	0x2293
+	.4byte	.LLST37
 	.uleb128 0x31
-	.4byte	.LASF446
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF438
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST59
+	.4byte	.LLST38
 	.uleb128 0x31
-	.4byte	.LASF447
-	.byte	0x1
-	.byte	0xbc
+	.4byte	.LASF439
+	.byte	0x2
+	.byte	0x62
 	.4byte	0x59
-	.4byte	.LLST60
+	.4byte	.LLST39
 	.uleb128 0x31
-	.4byte	.LASF448
-	.byte	0x1
-	.byte	0xbd
+	.4byte	.LASF440
+	.byte	0x2
+	.byte	0x63
 	.4byte	0x641
-	.4byte	.LLST61
-	.uleb128 0x32
+	.4byte	.LLST40
+	.uleb128 0x43
 	.string	"i"
-	.byte	0x1
-	.byte	0xbf
+	.byte	0x2
+	.byte	0x65
 	.4byte	0x59
-	.4byte	.LLST62
-	.uleb128 0x37
-	.4byte	.LASF449
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST41
+	.uleb128 0x42
+	.4byte	.LASF441
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST63
-	.uleb128 0x37
-	.4byte	.LASF450
-	.byte	0x1
-	.byte	0xc0
+	.4byte	.LLST42
+	.uleb128 0x42
+	.4byte	.LASF442
+	.byte	0x2
+	.byte	0x66
 	.4byte	0x59
-	.4byte	.LLST64
-	.uleb128 0x3a
+	.4byte	.LLST43
+	.uleb128 0x32
 	.string	"arg"
-	.byte	0x1
-	.byte	0xc1
-	.4byte	0x25c7
+	.byte	0x2
+	.byte	0x67
+	.4byte	0x2299
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x2a
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0xc2
-	.4byte	0x25d7
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x68
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x2a
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0xc3
-	.4byte	0x25d7
+	.4byte	.LASF377
+	.byte	0x2
+	.byte	0x69
+	.4byte	0x22a9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -72
-	.uleb128 0x37
-	.4byte	.LASF451
-	.byte	0x1
-	.byte	0xc4
+	.uleb128 0x42
+	.4byte	.LASF443
+	.byte	0x2
+	.byte	0x6a
 	.4byte	0xa8
-	.4byte	.LLST65
-	.uleb128 0x37
-	.4byte	.LASF452
-	.byte	0x1
-	.byte	0xc5
+	.4byte	.LLST44
+	.uleb128 0x42
+	.4byte	.LASF444
+	.byte	0x2
+	.byte	0x6b
 	.4byte	0xa8
-	.4byte	.LLST66
-	.uleb128 0x32
+	.4byte	.LLST45
+	.uleb128 0x42
+	.4byte	.LASF445
+	.byte	0x2
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xc6
+	.byte	0x2
+	.byte	0x6d
 	.4byte	0x59
-	.4byte	.LLST67
-	.uleb128 0x37
-	.4byte	.LASF453
-	.byte	0x1
-	.byte	0xc7
+	.4byte	.LLST47
+	.uleb128 0x42
+	.4byte	.LASF446
+	.byte	0x2
+	.byte	0x6e
 	.4byte	0x59
-	.4byte	.LLST68
-	.uleb128 0x37
-	.4byte	.LASF454
-	.byte	0x1
-	.byte	0xc8
+	.4byte	.LLST48
+	.uleb128 0x42
+	.4byte	.LASF447
+	.byte	0x2
+	.byte	0x6f
 	.4byte	0xa8
-	.4byte	.LLST69
-	.uleb128 0x3a
+	.4byte	.LLST49
+	.uleb128 0x32
 	.string	"dev"
-	.byte	0x1
-	.byte	0xec
+	.byte	0x2
+	.byte	0x91
 	.4byte	0x25d
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -112
-	.uleb128 0x3d
-	.4byte	0x28ba
-	.8byte	.LBB40
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x1
-	.byte	0xcb
-	.4byte	0x223d
-	.uleb128 0x3e
-	.4byte	0x28d1
-	.4byte	.LLST70
-	.uleb128 0x3e
-	.4byte	0x28c6
-	.4byte	.LLST71
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x40
-	.4byte	0x28dc
-	.4byte	.LLST72
-	.uleb128 0x40
-	.4byte	0x28e5
-	.4byte	.LLST73
-	.uleb128 0x42
-	.8byte	.LVL183
-	.4byte	0x2b65
-	.4byte	0x2208
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC23
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL184
-	.4byte	0x2b65
-	.4byte	0x2227
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL132
+	.4byte	0x26f3
+	.4byte	0x1fbc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC24
+	.8byte	.LC18
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL193
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL133
+	.4byte	0x2740
+	.4byte	0x1fdf
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4e
-	.4byte	0x2869
-	.8byte	.LBB54
-	.4byte	.Ldebug_ranges0+0x150
-	.byte	0x1
-	.2byte	0x152
-	.4byte	0x229d
-	.uleb128 0x44
-	.4byte	0x288f
-	.uleb128 0x44
-	.4byte	0x2884
-	.uleb128 0x44
-	.4byte	0x2879
-	.uleb128 0x3f
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x40
-	.4byte	0x289a
-	.4byte	.LLST74
-	.uleb128 0x41
-	.4byte	0x28a3
-	.uleb128 0x40
-	.4byte	0x28ae
-	.4byte	.LLST75
-	.uleb128 0x33
-	.8byte	.LVL272
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC33
-	.byte	0
-	.byte	0
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL187
-	.4byte	0x2b91
-	.4byte	0x22bb
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL135
+	.4byte	0x274b
+	.4byte	0x1ffd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x8
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0x33
 	.byte	0x24
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL197
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL199
-	.4byte	0x2b9c
-	.4byte	0x22eb
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL139
+	.4byte	0x26f3
+	.uleb128 0x38
+	.8byte	.LVL141
+	.4byte	0x2756
+	.4byte	0x202d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x8
 	.byte	0x8f
 	.sleb128 0
-	.byte	0x8a
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
-	.uleb128 0x130
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL202
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL203
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL204
-	.4byte	0x2b65
-	.4byte	0x2324
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC36
+	.uleb128 0x110
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL207
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL208
-	.4byte	0x270b
-	.uleb128 0x4f
-	.8byte	.LVL215
-	.4byte	0x2692
-	.uleb128 0x4f
-	.8byte	.LVL216
-	.4byte	0x25e7
-	.uleb128 0x4f
-	.8byte	.LVL220
-	.4byte	0x25e7
-	.uleb128 0x42
-	.8byte	.LVL221
-	.4byte	0x2b65
-	.4byte	0x2389
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL143
+	.4byte	0x2761
+	.uleb128 0x45
+	.8byte	.LVL144
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL145
+	.4byte	0x241b
+	.uleb128 0x38
+	.8byte	.LVL146
+	.4byte	0x26f3
+	.4byte	0x2073
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC30
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x3a
+	.8byte	.LC26
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL225
-	.4byte	0x2b65
-	.4byte	0x23a9
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL148
+	.4byte	0x23eb
+	.uleb128 0x45
+	.8byte	.LVL149
+	.4byte	0x22b9
+	.uleb128 0x45
+	.8byte	.LVL150
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL161
+	.4byte	0x26f3
+	.4byte	0x20b8
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 224
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL226
-	.4byte	0x2b65
-	.4byte	0x23d5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL162
+	.4byte	0x26f3
+	.4byte	0x20d6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 216
-	.byte	0x6
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL163
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL164
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL167
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL170
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL173
+	.4byte	0x22b9
+	.4byte	0x2126
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
+	.uleb128 0x6
+	.byte	0x8c
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL176
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL177
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL180
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL183
+	.4byte	0x1c44
+	.uleb128 0x45
+	.8byte	.LVL185
+	.4byte	0x276c
+	.uleb128 0x38
+	.8byte	.LVL192
+	.4byte	0x26f3
+	.4byte	0x2198
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xe
+	.byte	0x86
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
 	.byte	0x88
 	.sleb128 0
+	.byte	0x22
+	.byte	0x6
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL227
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL228
-	.4byte	0x1aae
-	.4byte	0x2400
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL195
+	.4byte	0x26f3
+	.4byte	0x21bc
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.uleb128 0x1
+	.byte	0x3a
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL231
-	.4byte	0x28f1
-	.4byte	0x241e
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL205
+	.4byte	0x2777
+	.4byte	0x21e1
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 296
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL234
-	.4byte	0x1e16
-	.4byte	0x243c
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL208
+	.4byte	0x241b
+	.uleb128 0x45
+	.8byte	.LVL209
+	.4byte	0x23eb
+	.uleb128 0x38
+	.8byte	.LVL213
+	.4byte	0x26f3
+	.4byte	0x2219
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x8a
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x89
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL237
-	.4byte	0x270b
-	.4byte	0x2458
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x6
-	.byte	0x8b
-	.sleb128 0
-	.byte	0xa
-	.2byte	0x3fc
-	.byte	0x1a
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL240
-	.4byte	0x2692
-	.uleb128 0x42
-	.8byte	.LVL241
-	.4byte	0x1aae
-	.4byte	0x2483
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL244
-	.4byte	0x28f1
-	.4byte	0x24a1
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL247
-	.4byte	0x1e16
-	.4byte	0x24bf
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL249
-	.4byte	0x2ba7
-	.uleb128 0x42
-	.8byte	.LVL255
-	.4byte	0x2b65
-	.4byte	0x2504
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC35
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x15
-	.byte	0x83
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x24
-	.byte	0x9
-	.byte	0xe5
-	.byte	0x26
-	.byte	0x3
-	.8byte	.LANCHOR2
-	.byte	0x22
-	.byte	0x6
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL281
-	.4byte	0x2b65
-	.4byte	0x2522
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL286
-	.4byte	0x1aae
-	.uleb128 0x4f
-	.8byte	.LVL288
-	.4byte	0x2ba7
-	.uleb128 0x4f
-	.8byte	.LVL293
-	.4byte	0x28f1
-	.uleb128 0x4f
-	.8byte	.LVL294
-	.4byte	0x1e16
-	.uleb128 0x42
-	.8byte	.LVL299
-	.4byte	0x2b65
-	.4byte	0x257b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC28
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL300
-	.4byte	0x2bb2
-	.4byte	0x259f
-	.uleb128 0x34
+	.uleb128 0x45
+	.8byte	.LVL218
+	.4byte	0x189b
+	.uleb128 0x45
+	.8byte	.LVL220
+	.4byte	0x276c
+	.uleb128 0x45
+	.8byte	.LVL223
+	.4byte	0x244c
+	.uleb128 0x45
+	.8byte	.LVL224
+	.4byte	0x1c44
+	.uleb128 0x38
+	.8byte	.LVL231
+	.4byte	0x2782
+	.4byte	0x2271
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8
 	.byte	0x35
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0x8f
-	.sleb128 240
+	.sleb128 208
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL303
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL234
+	.4byte	0x26f3
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC29
-	.uleb128 0x34
+	.8byte	.LC21
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x87
 	.sleb128 0
 	.byte	0
 	.byte	0
@@ -6982,736 +6023,625 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.4byte	0x67c
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25d7
+	.4byte	0x22a9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x4
 	.byte	0
 	.uleb128 0xb
 	.4byte	0x109
-	.4byte	0x25e7
+	.4byte	0x22b9
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x3
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF456
-	.byte	0x1
-	.byte	0xa4
+	.uleb128 0x46
+	.4byte	.LASF449
+	.byte	0x2
+	.byte	0x36
 	.4byte	0x59
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2692
-	.uleb128 0x36
-	.string	"uv"
-	.byte	0x1
-	.byte	0xa4
-	.4byte	0x59
-	.4byte	.LLST1
-	.uleb128 0x3a
-	.string	"dev"
-	.byte	0x1
-	.byte	0xa6
-	.4byte	0x25d
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x32
+	.4byte	0x23eb
+	.uleb128 0x31
+	.4byte	.LASF450
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF451
+	.byte	0x2
+	.byte	0x36
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF452
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x43
+	.string	"i"
+	.byte	0x2
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST32
+	.uleb128 0x42
+	.4byte	.LASF453
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x42
+	.4byte	.LASF454
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST34
+	.uleb128 0x42
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x3a
+	.4byte	0xa8
+	.4byte	.LLST35
+	.uleb128 0x43
 	.string	"ret"
-	.byte	0x1
-	.byte	0xa7
+	.byte	0x2
+	.byte	0x3b
 	.4byte	0x59
-	.4byte	.LLST2
-	.uleb128 0x42
-	.8byte	.LVL11
-	.4byte	0x2bbd
-	.4byte	0x2658
-	.uleb128 0x34
+	.4byte	.LLST36
+	.uleb128 0x45
+	.8byte	.LVL111
+	.4byte	0x278d
+	.uleb128 0x38
+	.8byte	.LVL113
+	.4byte	0x26f3
+	.4byte	0x2381
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC2
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 56
-	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL14
-	.4byte	0x2b65
-	.uleb128 0x42
-	.8byte	.LVL18
-	.4byte	0x2bc9
-	.4byte	0x267d
-	.uleb128 0x34
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL21
-	.4byte	0x2bd5
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL114
+	.4byte	0x241b
+	.4byte	0x239f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x64
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffc0
+	.byte	0x1a
 	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL117
+	.4byte	0x189b
+	.4byte	0x23b8
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF457
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x59
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x270b
-	.uleb128 0x31
-	.4byte	.LASF458
-	.byte	0x1
-	.byte	0x92
-	.4byte	0x109
-	.4byte	.LLST0
-	.uleb128 0x4f
-	.8byte	.LVL2
-	.4byte	0x2be0
-	.uleb128 0x4f
-	.8byte	.LVL3
-	.4byte	0x2beb
-	.uleb128 0x4f
-	.8byte	.LVL4
-	.4byte	0x2bf6
-	.uleb128 0x33
-	.8byte	.LVL7
-	.4byte	0x2b65
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL120
+	.4byte	0x26f3
+	.4byte	0x23dd
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x34
+	.8byte	.LC17
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL125
+	.4byte	0x276c
 	.byte	0
-	.uleb128 0x4d
-	.4byte	.LASF459
-	.byte	0x1
-	.byte	0x67
+	.uleb128 0x30
+	.4byte	.LASF456
+	.byte	0x2
+	.byte	0x31
 	.4byte	0x59
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x241b
+	.uleb128 0x47
+	.string	"uv"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xa8
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF457
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x59
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2869
+	.4byte	0x244c
 	.uleb128 0x31
-	.4byte	.LASF460
+	.4byte	.LASF455
+	.byte	0x2
+	.byte	0x2c
+	.4byte	0x109
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF458
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST17
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26d2
 	.uleb128 0x31
-	.4byte	.LASF461
+	.4byte	.LASF431
 	.byte	0x1
-	.byte	0x67
-	.4byte	0xa8
-	.4byte	.LLST18
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST0
 	.uleb128 0x31
-	.4byte	.LASF462
+	.4byte	.LASF377
 	.byte	0x1
-	.byte	0x67
+	.byte	0x2d
 	.4byte	0x109
-	.4byte	.LLST19
-	.uleb128 0x32
-	.string	"i"
+	.4byte	.LLST1
+	.uleb128 0x42
+	.4byte	.LASF459
 	.byte	0x1
-	.byte	0x6b
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST20
-	.uleb128 0x37
-	.4byte	.LASF463
+	.4byte	.LLST2
+	.uleb128 0x43
+	.string	"i"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST21
-	.uleb128 0x37
-	.4byte	.LASF464
+	.4byte	.LLST3
+	.uleb128 0x43
+	.string	"j"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST22
-	.uleb128 0x37
-	.4byte	.LASF458
+	.4byte	.LLST4
+	.uleb128 0x43
+	.string	"q"
 	.byte	0x1
-	.byte	0x6c
+	.byte	0x2f
 	.4byte	0xa8
-	.4byte	.LLST23
+	.4byte	.LLST5
 	.uleb128 0x32
-	.string	"ret"
+	.string	"buf"
 	.byte	0x1
-	.byte	0x6d
-	.4byte	0x59
-	.4byte	.LLST24
-	.uleb128 0x4f
-	.8byte	.LVL73
-	.4byte	0x2c01
-	.uleb128 0x4f
-	.8byte	.LVL75
-	.4byte	0x2be0
-	.uleb128 0x42
-	.8byte	.LVL78
-	.4byte	0x2b65
-	.4byte	0x27da
-	.uleb128 0x34
+	.byte	0x30
+	.4byte	0x1e70
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x43
+	.string	"p"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x1379
+	.4byte	.LLST6
+	.uleb128 0x48
+	.4byte	.LASF460
+	.4byte	0x26e2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x38
+	.8byte	.LVL2
+	.4byte	0x26f3
+	.4byte	0x250e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL4
+	.4byte	0x26f3
+	.4byte	0x252e
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x84
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL6
+	.4byte	0x26f3
+	.4byte	0x254e
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x8b
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL79
-	.4byte	0x2beb
-	.4byte	0x27f8
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL8
+	.4byte	0x271e
+	.4byte	0x256c
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x8
-	.byte	0x8a
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
 	.sleb128 0
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL80
-	.4byte	0x2bf6
-	.uleb128 0x42
-	.8byte	.LVL83
-	.4byte	0x2b65
-	.4byte	0x281d
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL9
+	.4byte	0x2799
+	.4byte	0x2596
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x85
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL84
-	.4byte	0x1aae
-	.4byte	0x2836
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x3
-	.byte	0x40
-	.byte	0x40
-	.byte	0x24
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL87
-	.4byte	0x2b65
-	.4byte	0x285b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL10
+	.4byte	0x2735
+	.4byte	0x25c5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC15
-	.uleb128 0x34
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
 	.sleb128 0
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
-	.uleb128 0x4f
-	.8byte	.LVL92
-	.4byte	0x2ba7
+	.uleb128 0x38
+	.8byte	.LVL16
+	.4byte	0x26f3
+	.4byte	0x25e4
+	.uleb128 0x39
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF465
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x59
-	.byte	0x1
-	.4byte	0x28ba
-	.uleb128 0x3c
-	.string	"arg"
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x49
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF467
-	.byte	0x1
-	.byte	0x4c
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF493
-	.byte	0x1
-	.byte	0x2d
-	.byte	0x1
-	.4byte	0x28f1
-	.uleb128 0x47
-	.4byte	.LASF420
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x47
-	.4byte	.LASF375
-	.byte	0x1
-	.byte	0x2d
-	.4byte	0x1a04
-	.uleb128 0x48
-	.string	"i"
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.uleb128 0x49
-	.4byte	.LASF466
-	.byte	0x1
-	.byte	0x2f
-	.4byte	0xa8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF468
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x59
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
+	.uleb128 0x38
+	.8byte	.LVL17
+	.4byte	0x27a4
+	.4byte	0x25fc
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b2d
-	.uleb128 0x31
-	.4byte	.LASF420
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST42
-	.uleb128 0x31
-	.4byte	.LASF375
-	.byte	0x4
-	.byte	0x2d
-	.4byte	0x109
-	.4byte	.LLST43
-	.uleb128 0x37
-	.4byte	.LASF469
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST44
-	.uleb128 0x32
-	.string	"i"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST45
-	.uleb128 0x32
-	.string	"j"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST46
-	.uleb128 0x32
-	.string	"q"
-	.byte	0x4
-	.byte	0x2f
-	.4byte	0xa8
-	.4byte	.LLST47
-	.uleb128 0x3a
-	.string	"buf"
-	.byte	0x4
-	.byte	0x30
-	.4byte	0x2042
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x32
-	.string	"p"
-	.byte	0x4
-	.byte	0x31
-	.4byte	0x1365
-	.4byte	.LLST48
-	.uleb128 0x51
-	.4byte	.LASF470
-	.4byte	0x2b3d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC45
-	.uleb128 0x42
-	.8byte	.LVL123
-	.4byte	0x2b65
-	.4byte	0x29b3
-	.uleb128 0x34
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL20
+	.4byte	0x26f3
+	.4byte	0x2621
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC17
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL125
-	.4byte	0x2b65
-	.4byte	0x29d3
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 200
-	.byte	0x6
-	.uleb128 0x34
+	.8byte	.LC5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
+	.byte	0x8
+	.byte	0x80
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL127
-	.4byte	0x2b65
-	.4byte	0x29f1
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL23
+	.4byte	0x26f3
+	.4byte	0x263f
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8b
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x84
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL130
-	.4byte	0x1a10
-	.4byte	0x2a1b
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL24
+	.4byte	0x26f3
+	.4byte	0x265d
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x70
+	.byte	0x89
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x78
+	.byte	0x86
 	.sleb128 0
-	.uleb128 0x34
+	.byte	0
+	.uleb128 0x38
+	.8byte	.LVL26
+	.4byte	0x271e
+	.4byte	0x267b
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x2
-	.byte	0x72
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x83
 	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL131
-	.4byte	0x1904
-	.4byte	0x2a44
-	.uleb128 0x34
+	.uleb128 0x38
+	.8byte	.LVL27
+	.4byte	0x2799
+	.4byte	0x26a5
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x84
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x51
 	.uleb128 0x2
-	.byte	0x86
+	.byte	0x83
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x53
+	.byte	0x52
 	.uleb128 0x2
 	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL139
-	.4byte	0x2b65
-	.4byte	0x2a63
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL140
-	.4byte	0x2c0d
-	.4byte	0x2a7b
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL143
-	.4byte	0x2b65
-	.4byte	0x2aa0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC21
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x53
 	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
+	.byte	0x88
+	.sleb128 0
 	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL146
-	.4byte	0x2b65
-	.4byte	0x2abe
-	.uleb128 0x34
+	.uleb128 0x3a
+	.8byte	.LVL28
+	.4byte	0x2735
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x85
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL147
-	.4byte	0x2b65
-	.4byte	0x2adc
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x2
-	.byte	0x88
+	.byte	0x87
 	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x42
-	.8byte	.LVL149
-	.4byte	0x1a10
-	.4byte	0x2b06
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x33
-	.8byte	.LVL150
-	.4byte	0x1904
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x34
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x87
+	.byte	0x88
 	.sleb128 0
-	.uleb128 0x34
+	.uleb128 0x39
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x8c
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0xb
 	.4byte	0xe7
-	.4byte	0x2b3d
+	.4byte	0x26e2
 	.uleb128 0x12
 	.4byte	0xce
 	.byte	0x9
 	.byte	0
 	.uleb128 0x8
-	.4byte	0x2b2d
-	.uleb128 0x52
-	.4byte	0x1a98
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2b65
-	.uleb128 0x53
-	.4byte	0x1aa4
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF471
-	.4byte	.LASF471
+	.4byte	0x26d2
+	.uleb128 0x49
+	.4byte	.LASF461
+	.4byte	.LASF461
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x4a
+	.4byte	.LASF462
+	.4byte	.LASF462
 	.byte	0x25
 	.byte	0x12
-	.uleb128 0x55
+	.uleb128 0x49
+	.4byte	.LASF463
+	.4byte	.LASF463
+	.byte	0x5
+	.2byte	0x258
+	.uleb128 0x4b
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.uleb128 0x4a
+	.4byte	.LASF464
+	.4byte	.LASF464
+	.byte	0x26
+	.byte	0x5f
+	.uleb128 0x4a
+	.4byte	.LASF465
+	.4byte	.LASF465
+	.byte	0x27
+	.byte	0xb
+	.uleb128 0x49
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x4a
+	.4byte	.LASF467
+	.4byte	.LASF467
+	.byte	0x28
+	.byte	0xe
+	.uleb128 0x4a
+	.4byte	.LASF468
+	.4byte	.LASF468
+	.byte	0x28
+	.byte	0x11
+	.uleb128 0x4a
+	.4byte	.LASF469
+	.4byte	.LASF469
+	.byte	0x9
+	.byte	0x2d
+	.uleb128 0x4a
+	.4byte	.LASF470
+	.4byte	.LASF470
+	.byte	0x29
+	.byte	0x29
+	.uleb128 0x4a
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x27
+	.byte	0xc
+	.uleb128 0x4a
 	.4byte	.LASF472
 	.4byte	.LASF472
-	.byte	0x1d
-	.2byte	0x16c
-	.uleb128 0x56
-	.4byte	.LASF473
-	.4byte	.LASF473
-	.uleb128 0x55
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x4a
 	.4byte	.LASF473
 	.4byte	.LASF473
-	.byte	0x1d
-	.2byte	0x16d
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0x12
+	.uleb128 0x4a
 	.4byte	.LASF474
 	.4byte	.LASF474
-	.byte	0xa
-	.byte	0x2d
-	.uleb128 0x54
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x49
 	.4byte	.LASF475
 	.4byte	.LASF475
-	.byte	0x26
-	.byte	0x29
-	.uleb128 0x54
+	.byte	0x5
+	.2byte	0x2b9
+	.uleb128 0x4a
 	.4byte	.LASF476
 	.4byte	.LASF476
-	.byte	0x21
-	.byte	0x11
-	.uleb128 0x54
+	.byte	0x28
+	.byte	0xd
+	.uleb128 0x49
 	.4byte	.LASF477
 	.4byte	.LASF477
-	.byte	0x20
-	.byte	0x94
-	.uleb128 0x55
-	.4byte	.LASF478
-	.4byte	.LASF478
-	.byte	0x27
-	.2byte	0x1da
-	.uleb128 0x55
-	.4byte	.LASF479
-	.4byte	.LASF479
-	.byte	0x27
-	.2byte	0x116
-	.uleb128 0x54
-	.4byte	.LASF480
-	.4byte	.LASF480
-	.byte	0x28
-	.byte	0xb
-	.uleb128 0x54
-	.4byte	.LASF481
-	.4byte	.LASF481
-	.byte	0x29
-	.byte	0xc
-	.uleb128 0x54
-	.4byte	.LASF482
-	.4byte	.LASF482
-	.byte	0x29
-	.byte	0xa
-	.uleb128 0x54
-	.4byte	.LASF483
-	.4byte	.LASF483
-	.byte	0x29
-	.byte	0xb
-	.uleb128 0x55
-	.4byte	.LASF484
-	.4byte	.LASF484
-	.byte	0x6
-	.2byte	0x2b9
-	.uleb128 0x55
-	.4byte	.LASF485
-	.4byte	.LASF485
 	.byte	0x1d
 	.2byte	0x398
 	.byte	0
@@ -8252,8 +7182,6 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.uleb128 0x3f
 	.uleb128 0x19
-	.uleb128 0x2
-	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x2c
@@ -8327,6 +7255,8 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x27
 	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x12
@@ -8366,64 +7296,46 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x49
 	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
+	.uleb128 0x18
 	.byte	0
 	.byte	0
 	.uleb128 0x33
-	.uleb128 0x4109
+	.uleb128 0x1d
 	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.uleb128 0x410a
+	.uleb128 0x5
 	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x18
-	.uleb128 0x2111
-	.uleb128 0x18
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.uleb128 0x5
+	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x2
 	.uleb128 0x17
@@ -8432,156 +7344,40 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x37
 	.uleb128 0x34
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
+	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
 	.byte	0
 	.byte	0
 	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3a
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x3b
-	.uleb128 0x2e
+	.uleb128 0x4109
 	.byte	0x1
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
+	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x3d
-	.uleb128 0x1d
-	.byte	0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
-	.uleb128 0xb
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x3e
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x3f
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x40
-	.uleb128 0x34
+	.uleb128 0x39
+	.uleb128 0x410a
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
 	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x41
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x42
+	.uleb128 0x3a
 	.uleb128 0x4109
 	.byte	0x1
 	.uleb128 0x11
 	.uleb128 0x1
 	.uleb128 0x31
 	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x43
+	.uleb128 0x3b
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -8596,14 +7392,14 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x44
+	.uleb128 0x3c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x45
+	.uleb128 0x3d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -8612,7 +7408,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x3e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8631,7 +7427,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x3f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -8644,7 +7440,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x40
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8657,7 +7453,20 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
 	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8668,9 +7477,26 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0xb
 	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x43
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x44
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -8683,21 +7509,16 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x45
+	.uleb128 0x4109
+	.byte	0
 	.uleb128 0x11
 	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x4c
-	.uleb128 0xb
-	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x46
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3
@@ -8722,50 +7543,22 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
-	.uleb128 0x1d
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x52
-	.uleb128 0x1
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x58
-	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x47
 	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x4109
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.byte	0
 	.byte	0
-	.uleb128 0x50
-	.uleb128 0x2e
-	.byte	0x1
 	.uleb128 0x3
-	.uleb128 0xe
+	.uleb128 0x8
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
 	.uleb128 0xb
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x20
-	.uleb128 0xb
-	.uleb128 0x1
+	.uleb128 0x49
 	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x48
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -8778,33 +7571,7 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.uleb128 0x2e
-	.byte	0x1
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x40
-	.uleb128 0x18
-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
-	.byte	0
-	.byte	0
-	.uleb128 0x54
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8818,10 +7585,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0xb
+	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8835,10 +7602,10 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.uleb128 0x3a
 	.uleb128 0xb
 	.uleb128 0x3b
-	.uleb128 0x5
+	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x4b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -8854,2991 +7621,2320 @@ _u_boot_list_2_cmd_2_ddr_test:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST76:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST15:
+	.8byte	.LVL61
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST77:
-	.8byte	.LVL304
-	.8byte	.LVL306
+.LLST16:
+	.8byte	.LVL61
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL306
-	.8byte	.LFE278
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST78:
-	.8byte	.LVL305
-	.8byte	.LVL306
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL307
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL80
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL307
-	.8byte	.LVL308
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL308
-	.8byte	.LFE278
+	.8byte	.LVL81
+	.8byte	.LFE271
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST79:
-	.8byte	.LVL305
-	.8byte	.LVL306
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL306
-	.8byte	.LVL307
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL307
-	.8byte	.LVL308
+.LLST17:
+	.8byte	.LVL62
+	.8byte	.LVL63
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL308
-	.8byte	.LVL309
+	.8byte	.LVL63
+	.8byte	.LVL64-1
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL309
-	.8byte	.LVL310
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL310
-	.8byte	.LFE278
+	.byte	0x52
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x63
+	.byte	0x64
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST29:
-	.8byte	.LVL105
-	.8byte	.LVL113
+.LLST18:
+	.8byte	.LVL62
+	.8byte	.LVL64-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL113
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL64-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL105
-	.8byte	.LVL106
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL106
-	.8byte	.LVL108
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
+.LLST19:
+	.8byte	.LVL66
+	.8byte	.LVL67
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL108
-	.8byte	.LVL114
+	.8byte	.LVL67
+	.8byte	.LVL68
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL114
-	.8byte	.LVL117
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x1
 	.byte	0x51
-	.byte	0x33
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL81
+	.8byte	.LVL83
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL105
-	.8byte	.LVL109
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL109
-	.8byte	.LVL115-1
+.LLST20:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
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+	.8byte	.LVL65
+	.8byte	.LVL69
 	.2byte	0x1
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-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x66
+	.8byte	.LVL69
+	.8byte	.LVL72
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL72
+	.8byte	.LVL79
 	.2byte	0x1
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+	.byte	0x66
+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL105
-	.8byte	.LVL107
+.LLST21:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
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+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL107
-	.8byte	.LFE277
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
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+	.8byte	.LVL81
+	.8byte	.LVL84
+	.2byte	0x1
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-	.8byte	.LVL105
-	.8byte	.LVL110
+.LLST22:
+	.8byte	.LVL64
+	.8byte	.LVL65
+	.2byte	0x6
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+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LVL79
 	.2byte	0x1
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-	.8byte	.LVL110
-	.8byte	.LVL115-1
+	.byte	0x67
+	.8byte	.LVL81
+	.8byte	.LVL84
 	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x54
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+	.8byte	0
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+	.8byte	.LVL62
+	.8byte	.LVL65
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL108
-	.8byte	.LVL113
+.LLST24:
+	.8byte	.LVL64
+	.8byte	.LVL80
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL113
-	.8byte	.LVL117
+	.byte	0x63
+	.8byte	.LVL80
+	.8byte	.LVL81
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL81
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x63
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL108
-	.8byte	.LVL109
+.LLST25:
+	.8byte	.LVL62
+	.8byte	.LVL68
+	.2byte	0x3
+	.byte	0x9
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+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL74
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL74
+	.8byte	.LVL76-1
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL109
-	.8byte	.LVL115-1
+	.byte	0x55
+	.8byte	.LVL76-1
+	.8byte	.LVL79
 	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL115-1
-	.8byte	.LVL117
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.byte	0x6c
+	.8byte	.LVL81
+	.8byte	.LFE271
+	.2byte	0x3
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+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x1
-	.byte	0x58
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL108
-	.8byte	.LVL110
+.LLST26:
+	.8byte	.LVL87
+	.8byte	.LVL88
 	.2byte	0x2
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 	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
+	.8byte	.LVL88
+	.8byte	.LVL89
 	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL117
-	.8byte	.LVL119
+	.byte	0x50
+	.8byte	.LVL92
+	.8byte	.LVL95
 	.2byte	0x1
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-	.8byte	.LVL120
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL120
-	.8byte	.LFE277
+	.byte	0x50
+	.8byte	.LVL101
+	.8byte	.LFE271
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL108
-	.8byte	.LVL110
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL117
-	.8byte	.LFE277
+.LLST27:
+	.8byte	.LVL84
+	.8byte	.LVL90
 	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL108
-	.8byte	.LVL110
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x65
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL110
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL117
-	.8byte	.LFE277
+	.8byte	.LVL91
+	.8byte	.LFE271
 	.2byte	0x1
-	.byte	0x52
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 	.8byte	0
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-.LLST39:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL115-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
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+	.8byte	.LVL84
+	.8byte	.LVL89
+	.2byte	0x3
+	.byte	0x9
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 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST40:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
+	.8byte	.LVL91
+	.8byte	.LVL94
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL115-1
+	.8byte	.LVL94
+	.8byte	.LVL101
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x67
+	.8byte	.LVL101
+	.8byte	.LFE271
+	.2byte	0x3
+	.byte	0x9
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 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL108
-	.8byte	.LVL112
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL112
-	.8byte	.LVL116
+.LLST9:
+	.8byte	.LVL35
+	.8byte	.LVL37
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL116
-	.8byte	.LVL117
+	.byte	0x50
+	.8byte	.LVL37
+	.8byte	.LVL45
 	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL117
-	.8byte	.LFE277
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST25:
-	.8byte	.LVL97
-	.8byte	.LVL98
+.LLST10:
+	.8byte	.LVL35
+	.8byte	.LVL36
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL98
-	.8byte	.LVL100
+	.8byte	.LVL36
+	.8byte	.LVL43
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL43
+	.8byte	.LVL46
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL100
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL47
 	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x51
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST26:
-	.8byte	.LVL97
-	.8byte	.LVL99
+.LLST11:
+	.8byte	.LVL50
+	.8byte	.LVL55
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL99
-	.8byte	.LFE276
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x64
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL41
+	.8byte	.LVL44
+	.2byte	0x1
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+	.8byte	.LVL46
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL50
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LFE268
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 -40
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST27:
-	.8byte	.LVL100
-	.8byte	.LVL101
+.LLST14:
+	.8byte	.LVL38
+	.8byte	.LVL43
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL101
-	.8byte	.LFE276
+	.8byte	.LVL46
+	.8byte	.LVL51
+	.2byte	0x2
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+	.8byte	.LVL51
+	.8byte	.LVL52
 	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST28:
-	.8byte	.LVL100
-	.8byte	.LVL101
+	.byte	0x50
+	.8byte	.LVL52
+	.8byte	.LVL54
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL101
-	.8byte	.LFE276
+	.8byte	.LVL54
+	.8byte	.LVL58
 	.2byte	0x1
-	.byte	0x54
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+	.8byte	.LVL60
+	.8byte	.LFE268
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST3:
-	.8byte	.LVL22
-	.8byte	.LVL26-1
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+	.8byte	.LVL129
+	.8byte	.LVL130
 	.2byte	0x1
 	.byte	0x50
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-	.8byte	.LVL40
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL40
-	.8byte	.LVL42
+	.8byte	.LVL130
+	.8byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
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 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST4:
-	.8byte	.LVL22
-	.8byte	.LVL25
+.LLST38:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL25
-	.8byte	.LVL26-1
+	.8byte	.LVL132-1
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL26-1
-	.8byte	.LVL41
+	.8byte	.LVL132-1
+	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL41
-	.8byte	.LVL42
+	.8byte	.LVL138
+	.8byte	.LVL228
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
+	.8byte	.LVL228
+	.8byte	.LVL229
 	.2byte	0x1
 	.byte	0x67
+	.8byte	.LVL229
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST5:
-	.8byte	.LVL24
-	.8byte	.LVL25
+.LLST40:
+	.8byte	.LVL129
+	.8byte	.LVL132-1
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL25
-	.8byte	.LVL26-1
+	.byte	0x53
+	.8byte	.LVL132-1
+	.8byte	.LVL145
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL26-1
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL23
-	.8byte	.LVL26-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL26-1
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST7:
-	.8byte	.LVL28
-	.8byte	.LVL29
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6a
+	.8byte	.LVL145
+	.8byte	.LVL147
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL29
-	.8byte	.LVL32-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL35
-	.8byte	.LVL37
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL42
-	.8byte	.LVL44
+	.8byte	.LVL147
+	.8byte	.LVL158
 	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x6a
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+	.8byte	.LVL193
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
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-	.8byte	.LVL31
+	.8byte	.LVL193
+	.8byte	.LVL196
 	.2byte	0x1
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-	.8byte	.LVL31
-	.8byte	.LVL34
-	.2byte	0x3
-	.byte	0x8c
-	.sleb128 -1
+	.byte	0x6a
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL39
+	.8byte	.LVL204
+	.8byte	.LVL210
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL42
-	.8byte	.LVL46
+	.byte	0x6a
+	.8byte	.LVL210
+	.8byte	.LVL226
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL226
+	.8byte	.LVL234
 	.2byte	0x1
-	.byte	0x6c
+	.byte	0x6a
+	.8byte	.LVL234
+	.8byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST9:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0x9e
-	.uleb128 0x4
-	.4byte	0x80808080
-	.8byte	.LVL27
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL42
-	.8byte	.LVL47
+.LLST41:
+	.8byte	.LVL134
+	.8byte	.LVL136
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL26
-	.8byte	.LVL27
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x40404040
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL137
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL27
-	.8byte	.LVL39
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL42
-	.8byte	.LVL45
+	.byte	0x63
+	.8byte	.LVL151
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL24
-	.8byte	.LVL27
+	.byte	0x50
+	.8byte	.LVL153
+	.8byte	.LVL154
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST12:
-	.8byte	.LVL26
-	.8byte	.LVL40
+	.8byte	.LVL154
+	.8byte	.LVL155
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL40
-	.8byte	.LVL42
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL156
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL42
-	.8byte	.LFE274
+	.8byte	.LVL161
+	.8byte	.LVL186
 	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL24
-	.8byte	.LVL30
+	.byte	0x63
+	.8byte	.LVL186
+	.8byte	.LVL187
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x83
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL34
-	.8byte	.LVL36
+	.8byte	.LVL193
+	.8byte	.LVL194
 	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.byte	0x70
+	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL36
-	.8byte	.LVL39
+	.8byte	.LVL196
+	.8byte	.LVL204
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL42
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL50
-	.8byte	.LVL51
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL51
-	.8byte	.LVL53
+	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL56
-	.8byte	.LVL60
+	.byte	0x6c
+	.8byte	.LVL217
+	.8byte	.LVL221
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL63
-	.8byte	.LFE274
+	.byte	0x6c
+	.8byte	.LVL222
+	.8byte	.LVL226
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x6c
+	.8byte	.LVL228
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST15:
-	.8byte	.LVL47
-	.8byte	.LVL54
+.LLST42:
+	.8byte	.LVL137
+	.8byte	.LVL138
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL54
-	.8byte	.LVL55
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LFE274
+	.8byte	.LVL140
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL147
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL204
+	.8byte	.LVL234
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST16:
-	.8byte	.LVL47
-	.8byte	.LVL52
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL55
-	.8byte	.LVL58
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST43:
+	.8byte	.LVL165
+	.8byte	.LVL168
+	.2byte	0x2
+	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL58
-	.8byte	.LVL63
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL63
-	.8byte	.LFE274
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.8byte	.LVL168
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x33
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL153
-	.8byte	.LVL155
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL155
-	.8byte	.LVL174
-	.2byte	0x1
-	.byte	0x67
+	.8byte	.LVL171
 	.8byte	.LVL174
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+	.2byte	0x2
+	.byte	0x34
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL153
-	.8byte	.LVL154
+	.8byte	.LVL178
+	.8byte	.LVL181
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL184
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL184
+	.8byte	.LVL186
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL201
+	.8byte	.LVL202
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL202
+	.8byte	.LVL204
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL219
+	.8byte	.LVL222
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL154
-	.8byte	.LVL162
+	.byte	0x63
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL162
-	.8byte	.LVL163
-	.2byte	0x3
-	.byte	0x83
-	.sleb128 32
-	.byte	0x9f
-	.8byte	.LVL163
-	.8byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST51:
-	.8byte	.LVL160
-	.8byte	.LVL164
+.LLST44:
+	.8byte	.LVL157
+	.8byte	.LVL159
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL164
-	.8byte	.LVL167
+	.8byte	.LVL159
+	.8byte	.LVL193
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x69
+	.8byte	.LVL196
+	.8byte	.LVL204
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL211
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST52:
-	.8byte	.LVL167
-	.8byte	.LVL173
+.LLST45:
+	.8byte	.LVL131
+	.8byte	.LVL145
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL147
+	.8byte	.LVL190
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL193
+	.8byte	.LVL206
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL206
+	.8byte	.LVL207
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x50
+	.8byte	.LVL207
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL226
+	.8byte	.LVL228
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL228
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST53:
-	.8byte	.LVL160
-	.8byte	.LVL164
+.LLST46:
+	.8byte	.LVL131
+	.8byte	.LVL145
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL164
-	.8byte	.LVL168
+	.8byte	.LVL147
+	.8byte	.LVL152
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL152
+	.8byte	.LVL153
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL168
-	.8byte	.LVL169
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -8
+	.byte	0x50
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL169
-	.8byte	.LVL173
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -40
+	.8byte	.LVL204
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST54:
-	.8byte	.LVL169
-	.8byte	.LVL173
+.LLST47:
+	.8byte	.LVL131
+	.8byte	.LVL142
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL142
+	.8byte	.LVL143-1
 	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST55:
-	.8byte	.LVL156
-	.8byte	.LVL166
+	.byte	0x50
+	.8byte	.LVL143-1
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL147
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL159
+	.8byte	.LVL165
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL165
 	.8byte	.LVL166
-	.8byte	.LVL170
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL172
-	.8byte	.LFE271
+	.8byte	.LVL166
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL168
+	.8byte	.LVL169
 	.2byte	0x1
 	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST56:
-	.8byte	.LVL159
-	.8byte	.LVL161
+	.8byte	.LVL169
+	.8byte	.LVL171
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST57:
-	.8byte	.LVL158
-	.8byte	.LVL159
+	.byte	0x68
+	.8byte	.LVL171
+	.8byte	.LVL172
 	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST58:
+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL174
 	.8byte	.LVL175
-	.8byte	.LVL176
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL176
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST59:
 	.8byte	.LVL175
 	.8byte	.LVL178
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x68
 	.8byte	.LVL178
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST60:
-	.8byte	.LVL175
-	.8byte	.LVL177
+	.8byte	.LVL179
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL177
-	.8byte	.LVL196
+	.byte	0x50
+	.8byte	.LVL179
+	.8byte	.LVL180-1
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL196
-	.8byte	.LVL296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL296
-	.8byte	.LVL297
+	.8byte	.LVL180-1
+	.8byte	.LVL181
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 196
+	.8byte	.LVL181
+	.8byte	.LVL182
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL182
+	.8byte	.LVL184
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL297
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
+	.8byte	.LVL184
+	.8byte	.LVL185-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL185-1
+	.8byte	.LVL186
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL186
+	.8byte	.LVL188
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST61:
-	.8byte	.LVL175
-	.8byte	.LVL178
+	.8byte	.LVL188
+	.8byte	.LVL191
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL178
+	.byte	0x68
+	.8byte	.LVL193
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL196
+	.8byte	.LVL199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL199
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL200
 	.8byte	.LVL203
 	.2byte	0x1
-	.byte	0x69
+	.byte	0x50
 	.8byte	.LVL203
-	.8byte	.LVL205
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL217
+	.8byte	.LVL204
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL217
-	.8byte	.LVL218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL218
-	.8byte	.LVL223
+	.byte	0x68
+	.8byte	.LVL204
+	.8byte	.LVL211
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL223
-	.8byte	.LVL256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x67
+	.8byte	.LVL211
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL256
-	.8byte	.LVL260
+	.8byte	.LVL214
+	.8byte	.LVL216
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL260
-	.8byte	.LVL268
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x68
+	.8byte	.LVL216
+	.8byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL268
-	.8byte	.LVL279
+	.8byte	.LVL219
+	.8byte	.LVL220-1
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL279
-	.8byte	.LVL296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL296
-	.8byte	.LVL303
+	.byte	0x50
+	.8byte	.LVL220-1
+	.8byte	.LVL222
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL303
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
+	.byte	0x68
+	.8byte	.LVL222
+	.8byte	.LVL225
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST62:
-	.8byte	.LVL186
-	.8byte	.LVL188
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL188
-	.8byte	.LVL189
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL195
-	.8byte	.LVL196
+	.byte	0x68
+	.8byte	.LVL226
+	.8byte	.LVL227
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL221
-	.8byte	.LVL222
+	.8byte	.LVL228
+	.8byte	.LVL232
 	.2byte	0x2
-	.byte	0x34
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LVL250
+	.8byte	.LVL232
+	.8byte	.LVL233
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL250
-	.8byte	.LVL251
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL257
-	.8byte	.LVL258
+	.byte	0x50
+	.8byte	.LVL233
+	.8byte	.LVL234-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL234-1
+	.8byte	.LVL234
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL131
+	.8byte	.LVL145
 	.2byte	0x2
-	.byte	0x31
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL258
-	.8byte	.LVL259
+	.8byte	.LVL147
+	.8byte	.LVL188
 	.2byte	0x2
-	.byte	0x33
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL260
-	.8byte	.LVL268
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL281
-	.8byte	.LVL282
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL285
-	.8byte	.LVL289
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL292
-	.8byte	.LVL296
+	.8byte	.LVL188
+	.8byte	.LVL189
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL296
-	.8byte	.LVL298
+	.byte	0x52
+	.8byte	.LVL193
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL214
+	.8byte	.LVL215
 	.2byte	0x1
-	.byte	0x67
+	.byte	0x50
+	.8byte	.LVL216
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST63:
-	.8byte	.LVL195
+.LLST49:
+	.8byte	.LVL157
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x6c
 	.8byte	.LVL196
+	.8byte	.LVL204
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL198
-	.8byte	.LVL203
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL103
+	.8byte	.LVL104
 	.2byte	0x1
-	.byte	0x67
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-	.8byte	.LVL223
+	.byte	0x50
+	.8byte	.LVL104
+	.8byte	.LVL107
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL256
-	.8byte	.LVL260
+	.byte	0x63
+	.8byte	.LVL107
+	.8byte	.LVL108
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL268
-	.8byte	.LVL290
+	.byte	0x50
+	.8byte	.LVL108
+	.8byte	.LVL121
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL290
-	.8byte	.LVL291
+	.byte	0x63
+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL291
-	.8byte	.LVL303
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL103
+	.8byte	.LVL106
 	.2byte	0x1
-	.byte	0x67
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+	.8byte	.LVL106
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST64:
-	.8byte	.LVL229
-	.8byte	.LVL232
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL235
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL235
-	.8byte	.LVL238
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL242
-	.8byte	.LVL245
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL245
-	.8byte	.LVL248
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL248
-	.8byte	.LVL250
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL260
-	.8byte	.LVL261
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL261
-	.8byte	.LVL262
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL262
-	.8byte	.LVL263
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL264
-	.8byte	.LVL265
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL265
-	.8byte	.LVL266
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL266
-	.8byte	.LVL268
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL287
-	.8byte	.LVL290
+.LLST31:
+	.8byte	.LVL103
+	.8byte	.LVL110
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL290
-	.8byte	.LVL292
+	.byte	0x52
+	.8byte	.LVL110
+	.8byte	.LVL122
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL295
-	.8byte	.LVL296
+	.byte	0x66
+	.8byte	.LVL122
+	.8byte	.LVL124
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x67
+	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL222
-	.8byte	.LVL223
+.LLST32:
+	.8byte	.LVL109
+	.8byte	.LVL110
 	.2byte	0x2
 	.byte	0x30
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-	.8byte	.LVL254
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL260
-	.8byte	.LVL268
+	.8byte	.LVL110
+	.8byte	.LVL123
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL279
-	.8byte	.LVL296
+	.byte	0x67
+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL178
-	.8byte	.LVL203
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL205
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-	.2byte	0x2
-	.byte	0x31
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-	.8byte	.LVL214
-	.8byte	.LVL218
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL218
-	.8byte	.LVL254
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL256
-	.8byte	.LVL272
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL272
-	.8byte	.LVL274
+.LLST33:
+	.8byte	.LVL109
+	.8byte	.LVL122
 	.2byte	0x1
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-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL279
-	.8byte	.LVL296
+	.byte	0x65
+	.8byte	.LVL124
+	.8byte	.LFE255
 	.2byte	0x1
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-	.8byte	.LVL296
-	.8byte	.LVL303
-	.2byte	0x2
-	.byte	0x31
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 	.8byte	0
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-.LLST67:
-	.8byte	.LVL178
-	.8byte	.LVL200
-	.2byte	0x2
-	.byte	0x30
+.LLST34:
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL200
-	.8byte	.LVL201
-	.2byte	0x1
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-	.8byte	.LVL201
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-	.2byte	0x1
-	.byte	0x66
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-	.8byte	.LVL206
-	.2byte	0x1
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-	.8byte	.LVL209
-	.2byte	0x1
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-	.8byte	.LVL209
-	.8byte	.LVL211
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL115
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 	.2byte	0x1
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+	.8byte	.LVL116
+	.8byte	.LVL120
 	.2byte	0x1
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-	.8byte	.LVL219
+	.byte	0x6a
+	.8byte	.LVL124
+	.8byte	.LVL126
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL219
-	.8byte	.LVL223
+	.byte	0x6a
+	.8byte	.LVL127
+	.8byte	.LFE255
 	.2byte	0x1
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-	.8byte	.LVL229
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL103
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 	.2byte	0x2
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-	.8byte	.LVL230
+	.8byte	.LVL118
+	.8byte	.LVL119
 	.2byte	0x1
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+	.8byte	.LVL119
+	.8byte	.LVL120
 	.2byte	0x1
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-	.8byte	.LVL233
+	.byte	0x64
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 	.2byte	0x1
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-	.2byte	0x1
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-	.8byte	.LVL235
-	.8byte	.LVL236
+	.8byte	.LVL125-1
+	.8byte	.LVL126
 	.2byte	0x1
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-	.8byte	.LVL236
-	.8byte	.LVL238
+	.byte	0x64
+	.8byte	.LVL127
+	.8byte	.LFE255
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL238
-	.8byte	.LVL239
+	.byte	0x64
+	.8byte	0
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+	.8byte	.LVL33
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 	.2byte	0x1
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-	.8byte	.LVL242
-	.2byte	0x1
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-	.8byte	.LVL242
-	.8byte	.LVL243
-	.2byte	0x1
+	.8byte	.LVL34
+	.8byte	.LFE254
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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-	.8byte	.LVL243
-	.8byte	.LVL244-1
-	.2byte	0x1
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-	.8byte	.LVL245
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 212
-	.8byte	.LVL245
-	.8byte	.LVL246
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL31
+	.8byte	.LVL32
 	.2byte	0x1
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-	.8byte	.LVL246
-	.8byte	.LVL248
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL248
-	.8byte	.LVL249-1
-	.2byte	0x1
+	.8byte	.LVL32
+	.8byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL249-1
-	.8byte	.LVL250
-	.2byte	0x1
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-	.8byte	.LVL250
-	.8byte	.LVL252
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL252
-	.8byte	.LVL256
-	.2byte	0x1
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-	.8byte	.LVL256
-	.8byte	.LVL260
-	.2byte	0x1
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-	.8byte	.LVL260
-	.8byte	.LVL263
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL0
+	.8byte	.LVL1
 	.2byte	0x1
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-	.8byte	.LVL264
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL264
-	.8byte	.LVL267
+	.8byte	.LVL1
+	.8byte	.LVL12
 	.2byte	0x1
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+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x50
-	.8byte	.LVL267
-	.8byte	.LVL268
-	.2byte	0x1
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-	.8byte	.LVL273
-	.2byte	0x1
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-	.8byte	.LVL279
-	.2byte	0x1
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-	.8byte	.LVL282
-	.2byte	0x2
-	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL282
-	.8byte	.LVL284
+	.8byte	.LVL13
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL284
-	.8byte	.LVL287
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL287
-	.8byte	.LVL288-1
+	.byte	0x67
+	.8byte	0
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+	.8byte	.LVL0
+	.8byte	.LVL2-1
 	.2byte	0x1
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-	.8byte	.LVL292
+	.byte	0x51
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+	.8byte	.LVL12
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL292
-	.8byte	.LVL295
-	.2byte	0x2
-	.byte	0x30
+	.byte	0x68
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
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-	.8byte	.LVL296
+	.8byte	.LVL13
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL296
-	.8byte	.LVL301
+	.byte	0x68
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL2
+	.8byte	.LVL3
 	.2byte	0x2
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 	.byte	0x9f
-	.8byte	.LVL301
-	.8byte	.LVL302
+	.8byte	.LVL3
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL302
-	.8byte	.LVL303-1
+	.byte	0x64
+	.8byte	.LVL13
+	.8byte	.LVL22
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL303-1
-	.8byte	.LVL303
+	.byte	0x64
+	.8byte	.LVL23
+	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL178
-	.8byte	.LVL203
-	.2byte	0x2
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-	.2byte	0x2
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-	.8byte	.LVL253
-	.2byte	0x1
-	.byte	0x52
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-	.2byte	0x2
-	.byte	0x30
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-	.2byte	0x1
-	.byte	0x50
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-	.8byte	.LVL303
+.LLST3:
+	.8byte	.LVL24
+	.8byte	.LVL25
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL222
-	.8byte	.LVL254
+.LLST4:
+	.8byte	.LVL4
+	.8byte	.LVL11
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL260
-	.8byte	.LVL268
+	.8byte	.LVL13
+	.8byte	.LVL21
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL178
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x65
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-	.2byte	0x1
-	.byte	0x65
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-	.8byte	0
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-	.8byte	.LVL178
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL189
-	.8byte	.LVL195
+	.8byte	.LVL22
+	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL178
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-	.2byte	0x1
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+	.8byte	.LVL3
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 	.2byte	0x3
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-	.2byte	0x1
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-	.2byte	0x1
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+	.8byte	.LVL4
+	.8byte	.LVL5
 	.2byte	0x1
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-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
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+	.sleb128 0
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-	.8byte	.LVL192
-	.8byte	.LVL193
+	.8byte	.LVL6
+	.8byte	.LVL11
 	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL193
-	.8byte	.LVL194
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 1
-	.byte	0x9f
+	.byte	0x6c
+	.8byte	.LVL13
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST73:
-	.8byte	.LVL178
-	.8byte	.LVL185
+.LLST6:
+	.8byte	.LVL18
+	.8byte	.LVL19
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL189
-	.8byte	.LVL195
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LFE200
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST74:
-	.8byte	.LVL210
-	.8byte	.LVL212
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL212
-	.8byte	.LVL213
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL213
-	.8byte	.LVL214
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL268
-	.8byte	.LVL269
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.8byte	.LVL269
-	.8byte	.LVL270
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL270
-	.8byte	.LVL271
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL275
-	.8byte	.LVL276
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL276
-	.8byte	.LVL277
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL277
-	.8byte	.LVL278
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.8byte	.LVL278
-	.8byte	.LVL279
+	.section	.debug_aranges,"",@progbits
+	.4byte	0x8c
 	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
 	.8byte	0
 	.8byte	0
-.LLST75:
-	.8byte	.LVL269
-	.8byte	.LVL272
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL274
-	.8byte	.LVL279
-	.2byte	0x1
-	.byte	0x68
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB6
+	.8byte	.LBE6
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB13
+	.8byte	.LBE13
+	.8byte	.LBB14
+	.8byte	.LBE14
+	.8byte	.LBB18
+	.8byte	.LBE18
 	.8byte	0
 	.8byte	0
-.LLST1:
-	.8byte	.LVL9
-	.8byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL10
-	.8byte	.LVL15
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL15
-	.8byte	.LVL16
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x64
+	.8byte	.LBB15
+	.8byte	.LBE15
+	.8byte	.LBB19
+	.8byte	.LBE19
 	.8byte	0
 	.8byte	0
-.LLST2:
-	.8byte	.LVL11
-	.8byte	.LVL12
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL16
-	.8byte	.LVL17
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL19
-	.8byte	.LVL20
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL20
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL0
-	.8byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1
-	.8byte	.LVL2-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2
-	.8byte	.LVL3-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL5
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL6
-	.8byte	.LVL7-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL7-1
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST17:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL66
-	.8byte	.LVL69
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL69
-	.8byte	.LVL70
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL70
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST18:
-	.8byte	.LVL65
-	.8byte	.LVL68
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL68
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST19:
-	.8byte	.LVL65
-	.8byte	.LVL72
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL72
-	.8byte	.LVL90
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL90
-	.8byte	.LVL91
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL71
-	.8byte	.LVL72
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL89
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST21:
-	.8byte	.LVL71
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL91
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST22:
-	.8byte	.LVL73
-	.8byte	.LVL74
-	.2byte	0x9
-	.byte	0x70
-	.sleb128 0
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST23:
-	.8byte	.LVL76
-	.8byte	.LVL77
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL77
-	.8byte	.LVL78-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL82
-	.8byte	.LVL83-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST24:
-	.8byte	.LVL65
-	.8byte	.LVL85
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL85
-	.8byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL86
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL91
-	.8byte	.LVL92-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL92-1
-	.8byte	.LVL93
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL94
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST42:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL122
-	.8byte	.LVL133
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL133
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL121
-	.8byte	.LVL123-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL123-1
-	.8byte	.LVL134
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL134
-	.8byte	.LVL136
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST44:
-	.8byte	.LVL123
-	.8byte	.LVL124
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL124
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL136
-	.8byte	.LVL145
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL146
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL147
-	.8byte	.LVL148
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL125
-	.8byte	.LVL132
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL136
-	.8byte	.LVL144
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL145
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL124
-	.8byte	.LVL125
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL125
-	.8byte	.LVL126
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL126
-	.8byte	.LVL127
-	.2byte	0x4
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x20
-	.byte	0x9f
-	.8byte	.LVL127
-	.8byte	.LVL135
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL136
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST48:
-	.8byte	.LVL141
-	.8byte	.LVL142
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL142
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-	.section	.debug_aranges,"",@progbits
-	.4byte	0xcc
-	.2byte	0x2
-	.4byte	.Ldebug_info0
-	.byte	0x8
-	.byte	0
-	.2byte	0
-	.2byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
-	.8byte	.LFB258
-	.8byte	.LFE258-.LFB258
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.8byte	0
-	.8byte	0
-	.section	.debug_ranges,"",@progbits
-.Ldebug_ranges0:
-	.8byte	.LBB12
-	.8byte	.LBE12
-	.8byte	.LBB18
-	.8byte	.LBE18
-	.8byte	.LBB19
-	.8byte	.LBE19
-	.8byte	.LBB20
-	.8byte	.LBE20
-	.8byte	.LBB24
-	.8byte	.LBE24
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB21
-	.8byte	.LBE21
-	.8byte	.LBB25
-	.8byte	.LBE25
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB29
-	.8byte	.LBE29
-	.8byte	.LBB34
-	.8byte	.LBE34
-	.8byte	.LBB35
-	.8byte	.LBE35
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB40
-	.8byte	.LBE40
-	.8byte	.LBB48
-	.8byte	.LBE48
-	.8byte	.LBB49
-	.8byte	.LBE49
-	.8byte	.LBB50
-	.8byte	.LBE50
-	.8byte	.LBB51
-	.8byte	.LBE51
-	.8byte	.LBB52
-	.8byte	.LBE52
-	.8byte	.LBB53
-	.8byte	.LBE53
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB54
-	.8byte	.LBE54
-	.8byte	.LBB58
-	.8byte	.LBE58
-	.8byte	.LBB59
-	.8byte	.LBE59
-	.8byte	0
-	.8byte	0
-	.8byte	.LFB256
-	.8byte	.LFE256
-	.8byte	.LFB257
-	.8byte	.LFE257
-	.8byte	.LFB274
-	.8byte	.LFE274
-	.8byte	.LFB255
-	.8byte	.LFE255
-	.8byte	.LFB275
-	.8byte	.LFE275
-	.8byte	.LFB276
-	.8byte	.LFE276
-	.8byte	.LFB277
-	.8byte	.LFE277
-	.8byte	.LFB200
-	.8byte	.LFE200
-	.8byte	.LFB271
-	.8byte	.LFE271
-	.8byte	.LFB258
-	.8byte	.LFE258
-	.8byte	.LFB278
-	.8byte	.LFE278
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB253
+	.8byte	.LFE253
+	.8byte	.LFB254
+	.8byte	.LFE254
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB256
+	.8byte	.LFE256
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF416:
-	.string	"test_pattern"
-.LASF399:
-	.string	"puts"
-.LASF64:
-	.string	"reserved"
-.LASF470:
+.LASF30:
+	.string	"parent_platdata"
+.LASF109:
+	.string	"off_mem_rsvmap"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF481:
+	.string	"jt_funcs"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF159:
+	.string	"initrd_start"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF13:
+	.string	"sizetype"
+.LASF335:
+	.string	"net_hostname"
+.LASF330:
+	.string	"push_packet"
+.LASF54:
+	.string	"start"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF309:
+	.string	"child"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF356:
+	.string	"NETLOOP_RESTART"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF253:
+	.string	"UCLASS_IO_DOMAIN"
+.LASF266:
+	.string	"using_pre_serial"
+.LASF37:
+	.string	"uclass_priv"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF379:
+	.string	"g_isi_pattern"
+.LASF117:
+	.string	"ih_magic"
+.LASF46:
+	.string	"list_head"
+.LASF425:
+	.string	"err_addr"
+.LASF370:
+	.string	"child_pre_probe"
+.LASF302:
+	.string	"pm_ctx_phys"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF307:
+	.string	"full_name"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF460:
 	.string	"__func__"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF301:
+	.string	"video_bottom"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF5:
+	.string	"__u8"
+.LASF355:
+	.string	"NETLOOP_CONTINUE"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF296:
+	.string	"malloc_base"
 .LASF464:
-	.string	"target_freq"
-.LASF138:
-	.string	"bootm_headers"
-.LASF227:
-	.string	"UCLASS_RAMDISK"
-.LASF156:
-	.string	"rd_end"
-.LASF318:
-	.string	"eth_device"
-.LASF452:
-	.string	"test_banks"
-.LASF127:
-	.string	"ih_comp"
-.LASF23:
-	.string	"_Bool"
-.LASF334:
-	.string	"net_root_path"
+	.string	"get_page_size"
+.LASF56:
+	.string	"flash_info_t"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF134:
+	.string	"comp"
+.LASF129:
+	.string	"image_header_t"
+.LASF164:
+	.string	"state"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF131:
+	.string	"image_start"
 .LASF445:
-	.string	"cmdtp"
-.LASF365:
-	.string	"unbind"
-.LASF145:
-	.string	"fit_noffset_os"
+	.string	"fast_test_bank"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
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+	.string	"diagonalscan"
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+	.string	"bd_info"
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+	.string	"uclass_id"
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+	.string	"ih_load"
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+	.string	"__dtb_dt_spl_begin"
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+	.string	"pre_remove"
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+	.string	"random_test1"
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+	.string	"random_test2"
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+	.string	"__u32"
 .LASF35:
 	.string	"priv"
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-	.ascii	"GNU C11 6.3.1 20170404 -ms"
-	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
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-	.string	"net_nis_domain"
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-	.string	"diagonalscan"
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-	.string	"uclass"
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+	.string	"cur_serial_dev"
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+	.string	"strcasecmp"
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+	.string	"fit_hdr_os"
+.LASF341:
+	.string	"net_tx_packet"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF340:
+	.string	"net_server_ip"
+.LASF482:
+	.string	"ofnode_union"
+.LASF348:
+	.string	"net_native_vlan"
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+	.string	"UCLASS_VIDEO_CRTC"
 .LASF185:
 	.string	"UCLASS_CODEC"
-.LASF47:
-	.string	"next"
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-	.string	"length"
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-	.string	"uc_drv"
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-	.string	"UCLASS_AHCI"
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-	.string	"UCLASS_SPI"
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-	.string	"memcpy"
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-	.string	"UCLASS_VIDEO_CONSOLE"
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+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF293:
+	.string	"env_buf"
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+	.string	"errno"
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+	.string	"long int"
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+	.string	"bi_flashsize"
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+	.string	"putc"
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+	.string	"platdata"
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+	.string	"UCLASS_PHY"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
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+	.string	"size_dt_strings"
 .LASF243:
 	.string	"UCLASS_VIDEO"
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-	.string	"net_state"
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-	.string	"cmd/ddr_tool/ddr_test_code.c"
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-	.string	"err_case"
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-	.string	"command_ret_t"
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-	.string	"UCLASS_SYSRESET"
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+	.string	"puts"
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+	.string	"rand"
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+	.string	"relocaddr"
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+	.string	"dev_head"
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+	.string	"net_boot_file_size"
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+	.string	"stdio_names"
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+	.string	"ih_dcrc"
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+	.string	"bi_ethspeed"
 .LASF169:
 	.string	"UCLASS_ROOT"
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-	.string	"pci_clk"
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-	.string	"UCLASS_ADC"
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-	.string	"ofdata_to_platdata"
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+	.string	"ide_bus_offset"
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+	.string	"test_pat_param"
+.LASF338:
+	.string	"net_server_ethaddr"
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+	.string	"bi_arch_number"
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+	.string	"signed char"
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+	.string	"UCLASS_KEYBOARD"
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+	.string	"uint8_t"
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+	.string	"per_child_platdata_auto_alloc_size"
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+	.string	"udevice"
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+	.string	"cmp_buf_data"
 .LASF125:
 	.string	"ih_arch"
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-	.string	"image_base"
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-	.string	"legacy_hdr_valid"
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+	.string	"totalsize"
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+	.string	"abort"
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+	.string	"ih_hcrc"
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+	.string	"mon_len"
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+	.string	"load"
 .LASF239:
 	.string	"UCLASS_TPM"
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-	.string	"CMD_RET_SUCCESS"
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-	.string	"stop"
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-	.string	"UCLASS_VIDEO_CRTC"
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-	.string	"dev_head"
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-	.string	"ih_type"
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+	.string	"cmp_value"
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+	.string	"lmb_property"
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+	.string	"last_comp_version"
 .LASF0:
 	.string	"unsigned char"
-.LASF409:
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+	.string	"pre_probe"
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+	.string	"delta_freq"
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 	.string	"RANDOM"
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-	.string	"legacy_hdr_os_copy"
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-	.string	"UCLASS_TEST_BUS"
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-	.string	"bi_arm_freq"
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+	.string	"images"
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+	.string	"UCLASS_DVFS"
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+	.string	"bi_ddr_freq"
 .LASF200:
 	.string	"UCLASS_LED"
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+	.string	"ih_size"
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+	.string	"uclass_node"
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+	.string	"_Bool"
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+	.string	"property"
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+	.string	"net_state"
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+	.string	"value"
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+	.string	"UCLASS_I2C_MUX"
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+	.string	"char"
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+	.string	"_binary_u_boot_bin_start"
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+	.string	"test_pattern"
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+	.string	"NETLOOP_SUCCESS"
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+	.string	"uclass"
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 	.string	"p_current"
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-	.string	"net_rx_packet_len"
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-	.string	"flash_id"
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-	.string	"load_addr"
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-	.string	"reread"
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+	.string	"uc_drv"
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+	.string	"net_loop_state"
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+	.string	"req_seq"
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+	.string	"sibling"
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+	.string	"dm_root_f"
 .LASF321:
-	.string	"init"
-.LASF251:
-	.string	"UCLASS_CHARGE_DISPLAY"
+	.string	"enetaddr"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
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+	.string	"times"
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+	.string	"target_freq"
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+	.string	"of_offset"
+.LASF149:
+	.string	"fit_hdr_fdt"
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+	.string	"net_restart_wrap"
+.LASF404:
+	.string	"getc"
+.LASF337:
+	.string	"net_ethaddr"
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+	.string	"flags"
 .LASF437:
-	.string	"cmp_value"
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-	.string	"UCLASS_USB_EMUL"
-.LASF363:
-	.string	"probe"
-.LASF378:
-	.string	"ofnode"
-.LASF269:
+	.string	"cmdtp"
+.LASF126:
+	.string	"ih_type"
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+	.string	"off_dt_struct"
+.LASF458:
+	.string	"crosstalk"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF350:
+	.string	"net_boot_file_name"
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+	.string	"compatible"
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+	.string	"UCLASS_TEST"
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+	.string	"ih_time"
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+	.string	"fb_base"
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+	.string	"bus_clk"
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+	.string	"UCLASS_RAM"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF32:
+	.string	"node"
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+	.string	"image_info"
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+	.string	"console_devices"
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+	.string	"arch"
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+	.string	"mem_clk"
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+	.string	"write_buf_to_ddr"
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 	.string	"cpu_clk"
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-	.string	"page_size"
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-	.string	"image_len"
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-	.string	"mon_len"
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+	.string	"select_hwpart"
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+	.string	"net_rx_packets"
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+	.string	"mem_malloc_start"
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+	.string	"_datarelro_start_ofs"
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+	.string	"ulong"
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+	.string	"ih_ep"
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+	.string	"lmb_region"
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+	.string	"do_ddr_test"
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+	.string	"printf"
+.LASF144:
+	.string	"fit_uname_os"
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+	.string	"bi_bootflags"
+.LASF339:
+	.string	"net_ip"
+.LASF291:
+	.string	"fdt_size"
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+	.string	"net_dns_server"
+.LASF353:
+	.string	"net_ping_ip"
 .LASF63:
 	.string	"memory"
-.LASF492:
-	.string	"exit"
+.LASF104:
+	.string	"fdt_header"
+.LASF361:
+	.string	"mem_malloc_end"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF156:
+	.string	"rd_end"
+.LASF364:
+	.string	"bind"
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+	.string	"irq_sp"
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+	.string	"cmdline_start"
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+	.string	"index"
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+	.string	"global_data"
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+	.string	"stop"
+.LASF396:
+	.string	"per_device_auto_alloc_size"
+.LASF472:
+	.string	"ctrlc"
+.LASF95:
+	.string	"repeatable"
+.LASF229:
+	.string	"UCLASS_SCSI"
 .LASF241:
 	.string	"UCLASS_USB_DEV_GENERIC"
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-	.string	"UCLASS_FG"
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-	.string	"UCLASS_PCI_GENERIC"
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-	.string	"UCLASS_RESET"
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-	.string	"irq_sp"
-.LASF402:
-	.string	"list"
-.LASF182:
-	.string	"UCLASS_BLK"
-.LASF282:
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
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+	.string	"long unsigned int"
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+	.string	"UCLASS_SIMPLE_BUS"
+.LASF455:
+	.string	"freq"
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+	.string	"gd_t"
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+	.string	"net_nis_domain"
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+	.string	"console_buffer"
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+	.string	"fit_noffset_fdt"
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+	.string	"next_adr"
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+	.string	"wr_value"
+.LASF459:
+	.string	"shift"
+.LASF358:
+	.string	"NETLOOP_FAIL"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF260:
+	.string	"timer_reset_value"
+.LASF283:
 	.string	"start_addr_sp"
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-	.string	"net_ip"
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-	.string	"strict_strtoul"
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-	.string	"iobase"
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-	.string	"os_reg"
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-	.string	"bi_intfreq"
-.LASF314:
-	.string	"save_addr"
+.LASF71:
+	.string	"bi_sramstart"
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+	.string	"_binary_u_boot_bin_end"
+.LASF284:
+	.string	"reloc_off"
+.LASF473:
+	.string	"judge_test_addr"
+.LASF112:
+	.string	"boot_cpuid_phys"
 .LASF259:
-	.string	"timer_reset_value"
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-	.string	"of_offset"
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-	.string	"UCLASS_LPC"
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-	.string	"bi_flashoffset"
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-	.string	"video_bottom"
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-	.string	"scan_freq_loop"
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-	.string	"UCLASS_MAILBOX"
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-	.string	"g_isi_pattern"
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-	.string	"off_mem_rsvmap"
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-	.string	"bind"
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-	.string	"UCLASS_KEYBOARD"
-.LASF206:
-	.string	"UCLASS_MOD_EXP"
-.LASF116:
-	.string	"image_header"
-.LASF110:
-	.string	"last_comp_version"
+	.string	"lastinc"
+.LASF263:
+	.string	"tlb_fillptr"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF347:
+	.string	"net_our_vlan"
+.LASF303:
+	.string	"serial"
+.LASF365:
+	.string	"probe"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF137:
+	.string	"image_info_t"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF439:
+	.string	"argc"
+.LASF261:
+	.string	"tlb_addr"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF440:
+	.string	"argv"
+.LASF132:
+	.string	"image_len"
 .LASF77:
 	.string	"bi_ip_addr"
-.LASF414:
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF324:
+	.string	"send"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF9:
+	.string	"long long int"
+.LASF417:
 	.string	"TESTCASSMAX"
-.LASF298:
-	.string	"cur_serial_dev"
-.LASF57:
-	.string	"flash_info"
-.LASF16:
-	.string	"ushort"
-.LASF395:
-	.string	"console_buffer"
-.LASF104:
-	.string	"magic"
-.LASF305:
-	.string	"full_name"
-.LASF472:
-	.string	"memset"
-.LASF331:
-	.string	"net_dns_server"
-.LASF482:
-	.string	"rockchip_ddrclk_sip_set_rate_v2"
-.LASF403:
-	.string	"stdio_devices"
-.LASF462:
-	.string	"times"
-.LASF355:
-	.string	"NETLOOP_SUCCESS"
-.LASF28:
-	.string	"name"
+.LASF443:
+	.string	"test_times"
+.LASF167:
+	.string	"command_ret_t"
+.LASF290:
+	.string	"new_fdt"
+.LASF22:
+	.string	"___strtok"
+.LASF352:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF451:
+	.string	"max_freq"
+.LASF363:
+	.string	"of_match"
+.LASF209:
+	.string	"UCLASS_NVME"
 .LASF264:
-	.string	"pre_serial"
-.LASF90:
-	.string	"_datarellocal_start_ofs"
-.LASF96:
-	.string	"usage"
-.LASF152:
-	.string	"fit_hdr_setup"
-.LASF183:
-	.string	"UCLASS_CLK"
-.LASF41:
-	.string	"sibling_node"
-.LASF160:
-	.string	"initrd_end"
-.LASF310:
-	.string	"monitor_flash_len"
-.LASF398:
-	.string	"putc"
-.LASF360:
-	.string	"mem_malloc_brk"
-.LASF12:
-	.string	"phys_size_t"
-.LASF83:
-	.string	"bi_boot_params"
+	.string	"tlb_emerg"
+.LASF138:
+	.string	"bootm_headers"
+.LASF470:
+	.string	"strict_strtoul"
+.LASF55:
+	.string	"protect"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF447:
+	.string	"scan_freq_loop"
+.LASF389:
+	.string	"uclass_driver"
 .LASF250:
 	.string	"UCLASS_RC"
-.LASF72:
-	.string	"bi_sramsize"
-.LASF293:
-	.string	"timebase_h"
 .LASF294:
+	.string	"timebase_h"
+.LASF295:
 	.string	"timebase_l"
-.LASF13:
-	.string	"sizetype"
-.LASF78:
-	.string	"bi_enetaddr"
-.LASF341:
-	.string	"net_rx_packet"
-.LASF459:
-	.string	"scan_freq"
-.LASF393:
-	.string	"per_device_auto_alloc_size"
-.LASF229:
-	.string	"UCLASS_SCSI"
-.LASF2:
-	.string	"short unsigned int"
-.LASF3:
-	.string	"signed char"
-.LASF339:
-	.string	"net_tx_packet"
-.LASF54:
-	.string	"start"
-.LASF380:
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF346:
+	.string	"net_null_ethaddr"
+.LASF277:
+	.string	"env_valid"
+.LASF416:
+	.string	"FULLTEST"
+.LASF34:
+	.string	"parent"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF38:
+	.string	"parent_priv"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF315:
+	.string	"load_addr"
+.LASF98:
+	.string	"complete"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF97:
+	.string	"help"
+.LASF268:
+	.string	"addr"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF8:
+	.string	"unsigned int"
+.LASF16:
+	.string	"ushort"
+.LASF320:
+	.string	"eth_device"
+.LASF372:
+	.string	"priv_auto_alloc_size"
+.LASF297:
+	.string	"malloc_limit"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF422:
+	.string	"capacity"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF108:
+	.string	"off_dt_strings"
+.LASF312:
+	.string	"monitor_flash_len"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF438:
+	.string	"flag"
+.LASF24:
+	.string	"image_base"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF383:
 	.string	"current"
-.LASF412:
-	.string	"FASTTEST"
-.LASF255:
-	.string	"LOGF_MAX_CATEGORIES"
-.LASF134:
-	.string	"comp"
-.LASF179:
-	.string	"UCLASS_SIMPLE_BUS"
-.LASF286:
-	.string	"dm_root_f"
-.LASF37:
-	.string	"uclass_priv"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF450:
+	.string	"min_freq"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF405:
+	.string	"list"
+.LASF306:
+	.string	"phandle"
+.LASF300:
+	.string	"video_top"
+.LASF397:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF73:
+	.string	"bi_arm_freq"
 .LASF224:
 	.string	"UCLASS_REMOTEPROC"
-.LASF149:
-	.string	"fit_hdr_fdt"
-.LASF407:
-	.string	"CHANGEFREQ"
-.LASF299:
-	.string	"video_top"
+.LASF465:
+	.string	"data_cpu_2_io"
+.LASF325:
+	.string	"recv"
+.LASF135:
+	.string	"type"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF276:
+	.string	"env_addr"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF449:
+	.string	"scan_freq"
+.LASF431:
+	.string	"start_adr"
+.LASF288:
+	.string	"uclass_root"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF444:
+	.string	"test_banks"
+.LASF58:
+	.string	"long double"
+.LASF278:
+	.string	"ram_top"
+.LASF421:
+	.string	"baseaddr"
+.LASF480:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF155:
+	.string	"rd_start"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF317:
+	.string	"save_size"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF322:
+	.string	"iobase"
+.LASF429:
+	.string	"random_test"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF265:
+	.string	"pre_serial"
+.LASF128:
+	.string	"ih_name"
+.LASF435:
+	.string	"next_col"
+.LASF124:
+	.string	"ih_os"
+.LASF162:
+	.string	"cmdline_end"
 .LASF343:
-	.string	"net_bcast_ethaddr"
-.LASF164:
-	.string	"state"
-.LASF69:
-	.string	"bi_flashsize"
+	.string	"net_rx_packet"
+.LASF256:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF289:
+	.string	"fdt_blob"
+.LASF386:
+	.string	"udevice_id"
+.LASF51:
+	.string	"size"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF395:
+	.string	"destroy"
+.LASF116:
+	.string	"image_header"
+.LASF377:
+	.string	"length"
 .LASF20:
 	.string	"__be32"
-.LASF162:
-	.string	"cmdline_end"
-.LASF38:
-	.string	"parent_priv"
-.LASF340:
-	.string	"net_rx_packets"
-.LASF184:
-	.string	"UCLASS_CPU"
-.LASF277:
-	.string	"ram_top"
-.LASF89:
-	.string	"_datarelrolocal_start_ofs"
-.LASF442:
-	.string	"next_col"
-.LASF348:
-	.string	"net_boot_file_name"
-.LASF391:
-	.string	"pre_remove"
-.LASF324:
-	.string	"halt"
-.LASF117:
-	.string	"ih_magic"
-.LASF285:
-	.string	"dm_root"
-.LASF17:
-	.string	"ulong"
-.LASF62:
-	.string	"region"
-.LASF7:
-	.string	"__u32"
-.LASF338:
-	.string	"net_server_ip"
-.LASF364:
-	.string	"remove"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF327:
+	.string	"write_hwaddr"
+.LASF479:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF255:
+	.string	"UCLASS_INVALID"
+.LASF471:
+	.string	"data_cpu_2_io_init"
+.LASF94:
+	.string	"maxargs"
 .LASF242:
 	.string	"UCLASS_USB_HUB"
-.LASF291:
+.LASF414:
+	.string	"DIAGONALSCAN"
+.LASF371:
+	.string	"child_post_remove"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF41:
+	.string	"sibling_node"
+.LASF292:
 	.string	"of_root"
-.LASF91:
-	.string	"_datarelro_start_ofs"
-.LASF367:
-	.string	"child_post_bind"
+.LASF461:
+	.string	"memset"
+.LASF57:
+	.string	"flash_info"
+.LASF110:
+	.string	"version"
+.LASF326:
+	.string	"halt"
+.LASF62:
+	.string	"region"
+.LASF114:
+	.string	"size_dt_struct"
+.LASF286:
+	.string	"dm_root"
+.LASF304:
+	.string	"sys_start_tick"
+.LASF308:
+	.string	"properties"
 .LASF207:
 	.string	"UCLASS_MTD"
-.LASF165:
-	.string	"bootm_headers_t"
-.LASF15:
-	.string	"long int"
-.LASF174:
-	.string	"UCLASS_TEST_PROBE"
-.LASF212:
-	.string	"UCLASS_PCH"
-.LASF213:
-	.string	"UCLASS_PCI"
-.LASF188:
-	.string	"UCLASS_DMA"
-.LASF446:
-	.string	"flag"
-.LASF401:
-	.string	"getc"
-.LASF237:
-	.string	"UCLASS_THERMAL"
+.LASF103:
+	.string	"fdt32_t"
+.LASF285:
+	.string	"new_gd"
+.LASF468:
+	.string	"get_print_available_addr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF477:
+	.string	"malloc"
+.LASF369:
+	.string	"child_post_bind"
+.LASF483:
+	.string	"exit"
+.LASF318:
+	.string	"in_addr"
+.LASF344:
+	.string	"net_rx_packet_len"
+.LASF323:
+	.string	"init"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF313:
+	.string	"__dtb_dt_begin"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF148:
+	.string	"fit_noffset_rd"
 .LASF436:
-	.string	"random_test1"
-.LASF435:
-	.string	"random_test2"
-.LASF456:
-	.string	"set_vdd_logic"
-.LASF449:
-	.string	"test_case"
+	.string	"err_adr"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF12:
+	.string	"phys_size_t"
+.LASF27:
+	.string	"driver"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF381:
+	.string	"ofnode"
+.LASF28:
+	.string	"name"
 .LASF441:
+	.string	"test_case"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF424:
+	.string	"reread_val"
+.LASF275:
+	.string	"have_console"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF6:
+	.string	"short int"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF434:
 	.string	"pattern"
-.LASF387:
-	.string	"post_bind"
-.LASF335:
-	.string	"net_ethaddr"
-.LASF316:
-	.string	"in_addr"
-.LASF19:
-	.string	"uint32_t"
-.LASF130:
-	.string	"image_info"
-.LASF119:
-	.string	"ih_time"
-.LASF467:
-	.string	"available"
-.LASF489:
-	.string	"jt_funcs"
-.LASF490:
-	.string	"ofnode_union"
-.LASF474:
-	.string	"strcasecmp"
-.LASF58:
-	.string	"long double"
-.LASF112:
-	.string	"size_dt_strings"
-.LASF137:
-	.string	"image_info_t"
-.LASF302:
-	.string	"serial"
-.LASF443:
-	.string	"get_page_size"
-.LASF1:
-	.string	"long unsigned int"
-.LASF192:
-	.string	"UCLASS_I2C"
 .LASF176:
 	.string	"UCLASS_I2C_EMUL"
-.LASF50:
-	.string	"select_hwpart"
-.LASF346:
-	.string	"net_native_vlan"
-.LASF196:
-	.string	"UCLASS_I2S"
-.LASF336:
-	.string	"net_server_ethaddr"
-.LASF244:
-	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF166:
-	.string	"images"
-.LASF428:
-	.string	"cmp_buf_data"
-.LASF288:
-	.string	"fdt_blob"
-.LASF14:
-	.string	"char"
-.LASF144:
-	.string	"fit_uname_os"
-.LASF143:
-	.string	"fit_hdr_os"
-.LASF476:
-	.string	"ctrlc"
-.LASF400:
-	.string	"tstc"
-.LASF29:
-	.string	"platdata"
-.LASF433:
-	.string	"reread_val"
-.LASF133:
-	.string	"load"
-.LASF352:
-	.string	"net_loop_state"
 .LASF232:
 	.string	"UCLASS_SPMI"
-.LASF230:
-	.string	"UCLASS_SERIAL"
-.LASF429:
-	.string	"random_test"
-.LASF411:
-	.string	"DIAGONALSCAN"
-.LASF215:
-	.string	"UCLASS_PHY"
-.LASF75:
-	.string	"bi_ddr_freq"
-.LASF32:
-	.string	"node"
-.LASF289:
-	.string	"new_fdt"
-.LASF420:
-	.string	"start_adr"
-.LASF136:
-	.string	"arch"
-.LASF274:
-	.string	"have_console"
-.LASF151:
-	.string	"fit_noffset_fdt"
-.LASF147:
-	.string	"fit_uname_rd"
-.LASF98:
-	.string	"complete"
-.LASF261:
-	.string	"tlb_size"
-.LASF146:
-	.string	"fit_hdr_rd"
-.LASF356:
-	.string	"NETLOOP_FAIL"
-.LASF410:
+.LASF96:
+	.string	"usage"
+.LASF366:
+	.string	"remove"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF316:
+	.string	"save_addr"
+.LASF374:
+	.string	"per_child_auto_alloc_size"
+.LASF463:
+	.string	"flush_dcache_range"
+.LASF413:
 	.string	"CROSSTALK"
-.LASF191:
-	.string	"UCLASS_FIRMWARE"
-.LASF283:
-	.string	"reloc_off"
-.LASF154:
-	.string	"fit_noffset_setup"
-.LASF359:
-	.string	"mem_malloc_end"
-.LASF220:
-	.string	"UCLASS_POWER_DOMAIN"
-.LASF203:
-	.string	"UCLASS_MASS_STORAGE"
+.LASF298:
+	.string	"malloc_ptr"
+.LASF160:
+	.string	"initrd_end"
+.LASF391:
+	.string	"pre_unbind"
+.LASF267:
+	.string	"baudrate"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF40:
+	.string	"child_head"
+.LASF257:
+	.string	"arch_global_data"
+.LASF254:
+	.string	"UCLASS_COUNT"
+.LASF399:
+	.string	"stdio_dev"
+.LASF272:
+	.string	"pci_clk"
 .LASF49:
 	.string	"block_drvr"
-.LASF208:
-	.string	"UCLASS_NORTHBRIDGE"
-.LASF485:
-	.string	"malloc"
-.LASF404:
-	.string	"stdio_names"
-.LASF27:
-	.string	"driver"
-.LASF457:
-	.string	"set_ddr_freq"
-.LASF194:
-	.string	"UCLASS_I2C_GENERIC"
-.LASF322:
-	.string	"send"
-.LASF325:
-	.string	"write_hwaddr"
-.LASF483:
-	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
-.LASF275:
-	.string	"env_addr"
-.LASF384:
-	.string	"compatible"
-.LASF290:
-	.string	"fdt_size"
-.LASF272:
-	.string	"mem_clk"
-.LASF25:
-	.string	"_binary_u_boot_bin_start"
-.LASF447:
-	.string	"argc"
-.LASF480:
-	.string	"udelay"
+.LASF466:
+	.string	"memcpy"
+.LASF53:
+	.string	"flash_id"
+.LASF305:
+	.string	"device_node"
+.LASF280:
+	.string	"ram_size"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF115:
+	.string	"working_fdt"
+.LASF336:
+	.string	"net_root_path"
+.LASF188:
+	.string	"UCLASS_DMA"
 .LASF85:
 	.string	"bd_t"
-.LASF122:
-	.string	"ih_ep"
+.LASF319:
+	.string	"s_addr"
+.LASF393:
+	.string	"post_probe"
+.LASF345:
+	.string	"net_bcast_ethaddr"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF19:
+	.string	"uint32_t"
+.LASF362:
+	.string	"mem_malloc_brk"
+.LASF331:
+	.string	"net_gateway"
+.LASF373:
+	.string	"platdata_auto_alloc_size"
+.LASF403:
+	.string	"tstc"
 .LASF66:
 	.string	"bi_memstart"
-.LASF306:
-	.string	"properties"
-.LASF448:
-	.string	"argv"
-.LASF150:
-	.string	"fit_uname_fdt"
-.LASF222:
-	.string	"UCLASS_RAM"
-.LASF46:
-	.string	"list_head"
-.LASF388:
-	.string	"pre_unbind"
-.LASF303:
-	.string	"device_node"
-.LASF157:
-	.string	"ft_addr"
-.LASF258:
-	.string	"lastinc"
-.LASF385:
-	.string	"data"
-.LASF311:
-	.string	"__dtb_dt_begin"
-.LASF254:
-	.string	"UCLASS_INVALID"
-.LASF422:
-	.string	"buful"
-.LASF304:
-	.string	"phandle"
-.LASF40:
-	.string	"child_head"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF406:
+	.string	"stdio_devices"
+.LASF329:
+	.string	"eth_current"
+.LASF420:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF368:
+	.string	"ofdata_to_platdata"
+.LASF64:
+	.string	"reserved"
+.LASF410:
+	.string	"CHANGEFREQ"
+.LASF433:
+	.string	"page_size"
+.LASF415:
+	.string	"FASTTEST"
+.LASF409:
+	.string	"cd_count"
+.LASF84:
+	.string	"bi_dram"
+.LASF2:
+	.string	"short unsigned int"
+.LASF105:
+	.string	"magic"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF411:
+	.string	"SCANFREQ"
 .LASF60:
 	.string	"base"
-.LASF278:
-	.string	"relocaddr"
-.LASF142:
-	.string	"fit_uname_cfg"
-.LASF161:
-	.string	"cmdline_start"
-.LASF374:
-	.string	"property"
-.LASF455:
-	.string	"do_ddr_test"
-.LASF284:
-	.string	"new_gd"
-.LASF189:
-	.string	"UCLASS_ETH"
-.LASF276:
-	.string	"env_valid"
-.LASF312:
-	.string	"__dtb_dt_spl_begin"
-.LASF10:
-	.string	"long long unsigned int"
-.LASF34:
-	.string	"parent"
-.LASF190:
-	.string	"UCLASS_GPIO"
-.LASF107:
-	.string	"off_dt_strings"
-.LASF432:
-	.string	"wr_value"
-.LASF82:
-	.string	"bi_arch_number"
-.LASF460:
-	.string	"min_freq"
-.LASF44:
-	.string	"ide_bus_offset"
-.LASF273:
-	.string	"fb_base"
+.LASF442:
+	.string	"err_case"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF258:
+	.string	"timer_rate_hz"
+.LASF52:
+	.string	"sector_count"
+.LASF127:
+	.string	"ih_comp"
 .LASF390:
-	.string	"post_probe"
-.LASF425:
-	.string	"err_adr"
-.LASF95:
-	.string	"repeatable"
-.LASF102:
-	.string	"CMD_RET_USAGE"
-.LASF253:
-	.string	"UCLASS_COUNT"
-.LASF209:
-	.string	"UCLASS_NVME"
-.LASF347:
-	.string	"net_restart_wrap"
-.LASF111:
-	.string	"boot_cpuid_phys"
-.LASF59:
-	.string	"lmb_property"
-.LASF488:
-	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
-.LASF484:
-	.string	"rand"
-.LASF218:
-	.string	"UCLASS_PMIC"
-.LASF361:
-	.string	"of_match"
-.LASF9:
-	.string	"long long int"
-.LASF478:
-	.string	"regulator_get_by_platname"
-.LASF493:
-	.string	"print_available_addr"
-.LASF159:
-	.string	"initrd_start"
-.LASF233:
-	.string	"UCLASS_SPI_FLASH"
-.LASF238:
-	.string	"UCLASS_TIMER"
-.LASF386:
-	.string	"uclass_driver"
-.LASF479:
-	.string	"regulator_set_value"
-.LASF466:
-	.string	"max_bank"
-.LASF30:
-	.string	"parent_platdata"
-.LASF252:
-	.string	"UCLASS_DVFS"
-.LASF45:
-	.string	"udevice"
-.LASF345:
-	.string	"net_our_vlan"
-.LASF419:
-	.string	"buf_len"
-.LASF124:
-	.string	"ih_os"
-.LASF219:
-	.string	"UCLASS_PWM"
-.LASF43:
-	.string	"req_seq"
-.LASF205:
-	.string	"UCLASS_MMC"
-.LASF197:
-	.string	"UCLASS_IDE"
-.LASF315:
-	.string	"save_size"
-.LASF109:
-	.string	"version"
-.LASF26:
-	.string	"_binary_u_boot_bin_end"
-.LASF394:
-	.string	"per_device_platdata_auto_alloc_size"
-.LASF8:
-	.string	"unsigned int"
-.LASF413:
-	.string	"FULLTEST"
-.LASF430:
-	.string	"baseaddr"
-.LASF114:
-	.string	"working_fdt"
-.LASF468:
-	.string	"crosstalk"
-.LASF328:
-	.string	"push_packet"
-.LASF113:
-	.string	"size_dt_struct"
-.LASF128:
-	.string	"ih_name"
-.LASF221:
-	.string	"UCLASS_PWRSEQ"
-.LASF6:
-	.string	"short int"
-.LASF307:
-	.string	"child"
-.LASF262:
-	.string	"tlb_fillptr"
-.LASF97:
-	.string	"help"
-.LASF48:
-	.string	"prev"
-.LASF349:
-	.string	"net_boot_file_size"
+	.string	"post_bind"
+.LASF367:
+	.string	"unbind"
+.LASF157:
+	.string	"ft_addr"
+.LASF474:
+	.string	"uclass_get_device"
+.LASF4:
+	.string	"uchar"
 .LASF158:
 	.string	"ft_len"
-.LASF105:
-	.string	"totalsize"
-.LASF295:
-	.string	"malloc_base"
-.LASF223:
-	.string	"UCLASS_REGULATOR"
-.LASF42:
-	.string	"flags"
-.LASF155:
-	.string	"rd_start"
+.LASF47:
+	.string	"next"
+.LASF388:
+	.string	"data"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF48:
+	.string	"prev"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF332:
+	.string	"net_netmask"
+.LASF33:
+	.string	"driver_data"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF262:
+	.string	"tlb_size"
+.LASF150:
+	.string	"fit_uname_fdt"
 	.hidden	malloc
 	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
 	.section	.note.GNU-stack,"",@progbits

commit fa655666130ec32a4615c6685c83336111607f45
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Feb 1 10:05:44 2019 +0800

    cmd: memtester: fix print available address bug
    
    Available address for testing may start from 0x00.
    
    Change-Id: If3468c11a096c55cf7fff93dff0034679791b3a9
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/ddr_tester_common.c b/cmd/memtester/ddr_tester_common.c
index 93f9f09e99..713d1a99f9 100644
--- a/cmd/memtester/ddr_tester_common.c
+++ b/cmd/memtester/ddr_tester_common.c
@@ -92,7 +92,7 @@ void get_print_available_addr(ulong *start_adr, ulong *length, int print_en)
 		printf("available memory for test:\n");
 		printf("	start		 end	length\n");
 		for (i = 0; i < max_bank; i++)
-			if (start_adr[i])
+			if (length[i])
 				printf("	0x%08lx - 0x%08lx 0x%08lx\n",
 				       start_adr[i], start_adr[i] + length[i],
 				       length[i]);

commit d0c76e678b9c9b7249f7437d73886215daf04d17
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Feb 1 09:51:18 2019 +0800

    cmd: memtester: add each DQ mask function
    
    Fix DQ to exact level when doing memtester by argument fix_bit and
    fix_level.
    
    Change-Id: I4b67b5e499f3e0c4d500d658bc05574f5e50543a
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 8f624edbd2..7936c03303 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -61,7 +61,8 @@ off_t physaddrbase;
  * err_exit: 1: exit test when found fail.
  * return 0: success, other: fail
  */
-int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
+int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit,
+		    ul fix_bit, ul fix_level)
 {
 	ul loop, i, j;
 	ul start_adr[CONFIG_NR_DRAM_BANKS], length[CONFIG_NR_DRAM_BANKS];
@@ -115,7 +116,8 @@ int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
 				if (testenable && (!((1 << i) & testenable)))
 					continue;
 				printf("  %-20s: ", tests[i].name);
-				if (!tests[i].fp(bufa[j], bufb[j], count[j])) {
+				if (!tests[i].fp(bufa[j], bufb[j], count[j],
+						 fix_bit, fix_level)) {
 					printf("ok\n");
 				} else {
 					exit_code |= EXIT_FAIL_OTHERTEST;
@@ -157,6 +159,8 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	ul loops = 0;
 	ul testenable = 0;
 	ul err_exit = 0;
+	ul fix_bit = 0;
+	ul fix_level = 0;
 
 	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
 	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
@@ -184,18 +188,26 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 			return CMD_RET_USAGE;
 
 	if (argc > 5)
-		if (strict_strtoul(argv[5], 0, &loops) < 0)
+		if (strict_strtoul(argv[5], 0, &fix_bit) < 0)
 			return CMD_RET_USAGE;
 
-	doing_memtester(arg, testenable, loops, err_exit);
+	if (argc > 6)
+		if (strict_strtoul(argv[6], 0, &fix_level) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 7)
+		if (strict_strtoul(argv[7], 0, &loops) < 0)
+			return CMD_RET_USAGE;
+
+	doing_memtester(arg, testenable, loops, err_exit, fix_bit, fix_level);
 
 	printf("Done.\n");
 	return 0;
 }
 
-U_BOOT_CMD(memtester, 6, 1, do_memtester,
+U_BOOT_CMD(memtester, 8, 1, do_memtester,
 	   "do memtester",
-	   "[start length [testenable err_exit [loop]]]\n"
+	   "[start length [testenable err_exit fix_bit fix_level [loop]]]\n"
 	   "start: start address, should be 4k align\n"
 	   "length: test length, should be 4k align, if 0 testing full space\n"
 	   "testenable[option]: enable pattern by set bit to 1, null or 0"
@@ -220,6 +232,8 @@ U_BOOT_CMD(memtester, 6, 1, do_memtester,
 	   "	bit17: test stuck address\n"
 	   "	example: testenable=0x1000,enable Bit Flip only\n"
 	   "err_exit: if 1 stop testing immediately when finding error\n"
+	   "fix_bit: fixed bit to a exact level\n"
+	   "fix_level: fix_bit's level, 0: low, 1: high\n"
 	   "loop[option]: testing loop, if 0 or null endless loop\n"
 	   "example:\n"
 	   "	memtester 0x200000 0x1000000: start address: 0x200000 length:"
diff --git a/cmd/memtester/memtester.h b/cmd/memtester/memtester.h
index 779a1ece41..5275a8cf82 100644
--- a/cmd/memtester/memtester.h
+++ b/cmd/memtester/memtester.h
@@ -23,5 +23,6 @@ extern int use_phys;
 extern off_t physaddrbase;
 
 int doing_memtester(unsigned long *arg, unsigned long testenable,
-		    unsigned long loops, unsigned long err_exit);
+		    unsigned long loops, unsigned long err_exit,
+		    unsigned long fix_bit, unsigned long fix_level);
 #endif /* _CMD_MEMTESTER_H */
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
index f50db4c19e..4f27c1c4cd 100644
--- a/cmd/memtester/tests.c
+++ b/cmd/memtester/tests.c
@@ -114,7 +114,8 @@ int test_stuck_address(u32v *bufa, size_t count)
 	return 0;
 }
 
-int test_random_value(u32v *bufa, u32v *bufb, size_t count)
+int test_random_value(u32v *bufa, u32v *bufb, size_t count,
+		      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -136,7 +137,9 @@ int test_random_value(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
+
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -150,7 +153,8 @@ int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -164,7 +168,8 @@ int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -178,7 +183,8 @@ int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_div_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_div_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -194,7 +200,8 @@ int test_div_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_or_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_or_comparison(u32v *bufa, u32v *bufb, size_t count,
+		       ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -208,7 +215,8 @@ int test_or_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_and_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_and_comparison(u32v *bufa, u32v *bufb, size_t count,
+			ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -222,7 +230,8 @@ int test_and_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -234,7 +243,8 @@ int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -248,6 +258,10 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? UL_ONEBITS : 0;
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
 		data[0] = data[2] = q;
 		data[1] = data[3] = ~q;
 		data_cpu_2_io(data, sizeof(data));
@@ -268,7 +282,8 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count,
+				 ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -282,6 +297,11 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
 		data[0] = data[2] = q;
 		data[1] = data[3] = ~q;
 		data_cpu_2_io(data, sizeof(data));
@@ -302,12 +322,14 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count,
+			     ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 data[4];
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -318,8 +340,17 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
-		data[0] = data[2] = (u32)UL_BYTE(j);
-		data[1] = data[3] = (u32)UL_BYTE(j);
+		q = (u32)UL_BYTE(j);
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
+		data[0] = q;
+		data[1] = q;
+		data[2] = q;
+		data[3] = q;
+
 		data_cpu_2_io(data, sizeof(data));
 
 		for (i = 0; i < count; i++)
@@ -335,12 +366,14 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 data[4];
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -352,12 +385,19 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 		printf("setting %3u", j);
 		fflush(stdout);
 		if (j < UL_LEN)
-			data[0] = ONE << j;
+			q = ONE << j;
 		else
-			data[0] = ONE << (UL_LEN * 2 - j - 1);
-		data[1] = data[0];
-		data[2] = data[0];
-		data[3] = data[0];
+			q = ONE << (UL_LEN * 2 - j - 1);
+
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
+		data[0] = q;
+		data[1] = q;
+		data[2] = q;
+		data[3] = q;
 		data_cpu_2_io(data, sizeof(data));
 
 		for (i = 0; i < count; i++) {
@@ -374,12 +414,14 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 data[4];
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -391,12 +433,18 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 		printf("setting %3u", j);
 		fflush(stdout);
 		if (j < UL_LEN)
-			data[0] = UL_ONEBITS ^ (ONE << j);
+			q = UL_ONEBITS ^ (ONE << j);
 		else
-			data[0] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
-		data[1] = data[0];
-		data[2] = data[0];
-		data[3] = data[0];
+			q = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
+		if (fix_level)
+			q |= fix_bit;
+		else
+			q &= ~fix_bit;
+
+		data[0] = q;
+		data[1] = q;
+		data[2] = q;
+		data[3] = q;
 		data_cpu_2_io(data, sizeof(data));
 
 		for (i = 0; i < count; i++) {
@@ -413,7 +461,8 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -438,6 +487,13 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 			data[1] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
 						| (ONE << (UL_LEN * 2 + 1 - j)));
 		}
+		if (fix_level) {
+			data[0] |= fix_bit;
+			data[1] |= fix_bit;
+		} else {
+			data[0] &= ~fix_bit;
+			data[1] &= ~fix_bit;
+		}
 		data[2] = data[0];
 		data[3] = data[1];
 		data_cpu_2_io(data, sizeof(data));
@@ -456,7 +512,8 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
+int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count,
+			    ul fix_bit, ul fix_level)
 {
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
@@ -474,6 +531,11 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 			q = ~q;
 			printf("setting %3u", k * 8 + j);
 			fflush(stdout);
+			if (fix_level)
+				q |= fix_bit;
+			else
+				q &= ~fix_bit;
+
 			data[0] = data[2] = q;
 			data[1] = data[3] = ~q;
 			data_cpu_2_io(data, sizeof(data));
@@ -494,7 +556,8 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 }
 
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
+int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			  ul fix_bit, ul fix_level)
 {
 	u8v *p1, *t;
 	u32v *p2;
@@ -531,7 +594,8 @@ int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
 	return 0;
 }
 
-int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
+int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level)
 {
 	u16v *p1, *t;
 	u32v *p2;
diff --git a/cmd/memtester/tests.h b/cmd/memtester/tests.h
index cfd096e560..b3ddcaed2e 100644
--- a/cmd/memtester/tests.h
+++ b/cmd/memtester/tests.h
@@ -19,38 +19,38 @@
 
 int test_stuck_address(u32v *bufa, size_t count);
 int test_random_value(u32v *bufa,
-		      u32v *bufb, size_t count);
+		      u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_xor_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_sub_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_mul_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_div_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_or_comparison(u32v *bufa,
-		       u32v *bufb, size_t count);
+		       u32v *bufb, size_t count, ul fix_bit, ul fix_level);
 int test_and_comparison(u32v *bufa,
-			u32v *bufb, size_t count);
-int test_seqinc_comparison(u32v *bufa,
-			   u32v *bufb, size_t count);
-int test_solidbits_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_checkerboard_comparison(u32v *bufa,
-				 u32v *bufb, size_t count);
-int test_blockseq_comparison(u32v *bufa,
-			     u32v *bufb, size_t count);
-int test_walkbits0_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_walkbits1_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_bitspread_comparison(u32v *bufa,
-			      u32v *bufb, size_t count);
-int test_bitflip_comparison(u32v *bufa,
-			    u32v *bufb, size_t count);
+			u32v *bufb, size_t count, ul fix_bit, ul fix_level);
+int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level);
+int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count,
+				 ul fix_bit, ul fix_level);
+int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count,
+			     ul fix_bit, ul fix_level);
+int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count,
+			      ul fix_bit, ul fix_level);
+int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count,
+			    ul fix_bit, ul fix_level);
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(u32v *bufa,
-			  u32v *bufb, size_t count);
-int test_16bit_wide_random(u32v *bufa,
-			   u32v *bufb, size_t count);
+int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			  ul fix_bit, ul fix_level);
+int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count,
+			   ul fix_bit, ul fix_level);
 #endif
diff --git a/cmd/memtester/types.h b/cmd/memtester/types.h
index 4442eb3c2e..3fa4ca5c9d 100644
--- a/cmd/memtester/types.h
+++ b/cmd/memtester/types.h
@@ -24,7 +24,8 @@ typedef unsigned short volatile u16v;
 
 struct test {
 	char *name;
-	int (*fp)(u32v *bufa, u32v *bufb, size_t count);
+	int (*fp)(u32v *bufa, u32v *bufb, size_t count,
+		  ul fix_bit, ul fix_level);
 };
 
 #endif /* __MEMTESTER_TYPES_H */

commit 07ea4f345b408e5848acd98a553ba968c7563e1f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 14 11:31:32 2019 +0800

    rockchip: param: fix bl32 enable flag not set when atags effect
    
    Change-Id: I3a57dcdbd3e247fbe7f2230d70dd9687251cce0a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
index 148899298e..c5c28d4955 100644
--- a/arch/arm/mach-rockchip/param.c
+++ b/arch/arm/mach-rockchip/param.c
@@ -129,10 +129,12 @@ struct sysmem_property param_parse_optee_mem(void)
 		    (tos_parameter->tee_mem.flags == 1)) {
 			prop.base = tos_parameter->tee_mem.phy_addr;
 			prop.size = tos_parameter->tee_mem.size;
-			gd->flags |= GD_FLG_BL32_ENABLED;
 		}
 	}
 
+	if (prop.size)
+		gd->flags |= GD_FLG_BL32_ENABLED;
+
 	debug("TOS: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
 
 	return prop;

commit fd810b8003bdef7ec4485fb08cbe2d7bef7f284d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 14 11:21:23 2019 +0800

    android: return fail if not found misc partition
    
    Return directly and do not continue read from misc partition
    if there is no partition.
    
    Change-Id: I549d123632aecc5bd29ebdc2c4c7917c76750247
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 532cca5e9f..feec2fda13 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -893,8 +893,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	 */
 	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_MISC,
 					 &misc_part_info);
-	if (part_num < 0)
+	if (part_num < 0) {
 		printf("%s Could not find misc partition\n", __func__);
+		return -ENODEV;
+	}
 
 #ifdef CONFIG_ANDROID_KEYMASTER_CA
 	/* load attestation key from misc partition. */

commit 644804ed624b08dd6529c4a1b4e8eb762fc975fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 25 19:29:52 2019 +0800

    rockchip: board: support enter download mode by hotkey
    
    - ctrl+b: enter bootrom download mode, ('b': bootrom);
    - ctrl+d: enter rockusb download mode; ('d': default download, ie. rockusb);
    
    This patch provides convenience for download when rockusb/recovery-key is
    absent or not work, or U-Boot early panic.
    
    Change-Id: I7709183c645400f60af3d480f84f6e6887ddc20e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 8108e3acc2..1130dc46a6 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -39,6 +39,7 @@
 #endif
 #include <of_live.h>
 #include <dm/root.h>
+#include <console.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 /* define serialno max length, the max length is 512 Bytes
@@ -202,11 +203,30 @@ void board_env_fixup(void)
 		env_set_hex("kernel_addr_r", kernel_addr_r);
 }
 
+static void early_bootrom_download(void)
+{
+	if (!tstc())
+		return;
+
+	gd->console_evt = getc();
+#if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
+	/* ctrl+b */
+	if (gd->console_evt == CONSOLE_EVT_CTRL_B) {
+		printf("Enter bootrom download...");
+		mdelay(100);
+		writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		do_reset(NULL, 0, 0, NULL);
+		printf("failed!\n");
+	}
+#endif
+}
+
 int board_init(void)
 {
 	int ret;
 
 	board_debug_uart_init();
+	early_bootrom_download();
 
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 072e69e48e..daccbcf587 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -19,6 +19,7 @@
 #include <ramdisk.h>
 #endif
 #include <mmc.h>
+#include <console.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -128,7 +129,9 @@ void boot_devtype_init(void)
 
 void rockchip_dnl_mode_check(void)
 {
-	if (rockchip_dnl_key_pressed()) {
+	/* recovery key or "ctrl+d" */
+	if (rockchip_dnl_key_pressed() ||
+	    gd->console_evt == CONSOLE_EVT_CTRL_D) {
 		printf("download key pressed... ");
 		if (rockchip_u2phy_vbus_detect() > 0) {
 			printf("entering download mode...\n");

commit 13f190efecf4ab29827f436c4e6bd7ba522f2963
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 29 20:55:18 2019 +0800

    console: add console event key definition and gd->console_evt
    
    "console event" is similar to some hotkey event(mainly long press),
    we can make something triggered by hotkey.
    
    Change-Id: I845d9820997b4a90d55c9575e424b0eaafbc7b0c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 343c1e7841..ea3f8e5252 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -135,6 +135,7 @@ typedef struct global_data {
 #endif
 	struct pre_serial serial;
 	ulong sys_start_tick;		/* For report system start-up time */
+	int console_evt;		/* Console event, maybe some hotkey  */
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */
diff --git a/include/console.h b/include/console.h
index cea29ed6dc..d72c8cdf35 100644
--- a/include/console.h
+++ b/include/console.h
@@ -10,6 +10,9 @@
 
 extern char console_buffer[];
 
+#define CONSOLE_EVT_CTRL_B	0x02
+#define CONSOLE_EVT_CTRL_D	0x04
+
 /* common/console.c */
 int console_init_f(void);	/* Before relocation; uses the serial  stuff */
 int console_init_r(void);	/* After  relocation; uses the console stuff */

commit 68ba937304746771093b2178ed2ccd2e07d8825f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Jan 22 19:25:40 2019 +0800

    lib: optee_client: recover original partition after error
    
    1.switch to RPMB partition when call init rpmb
    2.switch to original partition when call finish rpmb
    3.it will not switch to original partition when error
      occurred, we should recover original partition after error
    
    Change-Id: I41927e82fb2db690058a809f008ca1f59d334011
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 316765cccd..919e89fac1 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -312,8 +312,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 
 		switch (RequestMsgType) {
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
@@ -321,12 +320,11 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 			EfiStatus = do_programkey((struct s_rpmb *)
 				RequestPackets_back);
 
-			if (EfiStatus != 0) {
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
@@ -336,20 +334,19 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		}
 
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_WRITE_COUNTER_VAL_READ: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
 			EfiStatus = do_readcounter((struct s_rpmb *)
 				RequestPackets_back);
-			if (EfiStatus != 0) {
+
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
@@ -359,21 +356,19 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		}
 
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_WRITE: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
 			EfiStatus = do_authenticatedwrite((struct s_rpmb *)
 				RequestPackets_back);
-			if (EfiStatus != 0) {
+
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
-
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
@@ -383,21 +378,19 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 		}
 
 		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_READ: {
-			EfiStatus = init_rpmb();
-			if (EfiStatus != 0) {
+			if (init_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
 			EfiStatus = do_authenticatedread((struct s_rpmb *)
 				RequestPackets_back, global_block_count);
-			if (EfiStatus != 0) {
+
+			if (finish_rpmb() != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;
 			}
 
-			EfiStatus = finish_rpmb();
-
 			if (EfiStatus != 0) {
 				TeecResult = TEEC_ERROR_GENERIC;
 				break;

commit df99e5808c66671ed209e51fcabe120dd29d726b
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jan 4 19:48:19 2019 +0800

    cmd: add test case for secure storage
    
    1.mmc testsecurestorage to test secure storage
    2.test secure storage in rpmb and test secure storage in
      security partition when use emmc
    3.test secure storage in security partition when use nand
    
    Change-Id: Id6f72893c002c5040cb1790051c9685911878df7
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/Makefile b/cmd/Makefile
index 8cb26cccd8..6ac48171a1 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -156,6 +156,8 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
 obj-$(CONFIG_CMD_GPT) += gpt.o
 obj-$(CONFIG_CMD_ETHSW) += ethsw.o
 
+obj-$(CONFIG_OPTEE_CLIENT) += optee.o
+
 # Power
 obj-$(CONFIG_CMD_PMIC) += pmic.o
 obj-$(CONFIG_CMD_REGULATOR) += regulator.o
diff --git a/cmd/mmc.c b/cmd/mmc.c
index 18008fd1c7..a853d97e4d 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -10,6 +10,7 @@
 #include <mmc.h>
 #include <optee_include/OpteeClientInterface.h>
 #include <optee_include/OpteeClientApiLib.h>
+#include <optee_test.h>
 
 static int curr_device = -1;
 
@@ -125,8 +126,8 @@ static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 
 #ifdef CONFIG_OPTEE_CLIENT
-static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
-		int flag, int argc, char * const argv[])
+static int do_mmc_test_secure_storage(cmd_tbl_t *cmdtp,
+				      int flag, int argc, char * const argv[])
 {
 	struct mmc *mmc;
 
@@ -144,29 +145,23 @@ static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
 	if (!mmc)
 		return CMD_RET_FAILURE;
 
-	uint64_t value;
-	trusty_write_rollback_index(0x87654321, 0x1122334455667788);
-	trusty_read_rollback_index(0x87654321, &value);
-	debug("sizeof(value) %zu\n ", sizeof(value));
-	if (value == 0x1122334455667788)
-		printf("good ! value==0x1122334455667788\n ");
-	else
-		printf("error ! value!=0x1122334455667788\n ");
-
-	uint8_t data[] = "just a data";
-	uint8_t data_read[11];
-	trusty_write_permanent_attributes(data, sizeof(data));
-	trusty_read_permanent_attributes(data_read, sizeof(data));
-	printf("attribute: %s\n ", data_read);
-
-	trusty_notify_optee_uboot_end();
-	printf(" tell_optee_uboot_end \n ");
-	value = 0;
-	trusty_read_rollback_index(0x87654321, &value);
-	if (value == 0x1122334455667788)
-		printf(" value==0x1122334455667788 read still enable\n ");
-	else
-		printf(" good! value!=0x1122334455667788 read denied\n ");
+	int i, count = 100;
+
+	for (i = 1; i <= count; i++) {
+		if (test_secure_storage_default() == 0) {
+			printf("test_secure_storage_default success! %d/%d\n", i, count);
+		} else {
+			printf("test_secure_storage_default fail! %d/%d\n", i, count);
+			break;
+		}
+		if (test_secure_storage_security_partition() == 0) {
+			printf("test_secure_storage_security_partition success! %d/%d\n", i, count);
+		} else {
+			printf("test_secure_storage_security_partition fail! %d/%d\n", i, count);
+			break;
+		}
+	}
+
 	return CMD_RET_SUCCESS;
 }
 
@@ -960,7 +955,7 @@ static cmd_tbl_t cmd_mmc[] = {
 	U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""),
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
-	U_BOOT_CMD_MKENT(testrpmb, 1, 0, do_mmc_testrpmb, "", ""),
+	U_BOOT_CMD_MKENT(testsecurestorage, 1, 0, do_mmc_test_secure_storage, "", ""),
 	U_BOOT_CMD_MKENT(testefuse, 1, 0, do_mmc_testefuse, "", ""),
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
@@ -1028,7 +1023,7 @@ U_BOOT_CMD(
 	"   WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
-	"mmc testrpmb - test CA call static TA,and TA call rpmb in uboot\n"
+	"mmc testsecurestorage - test CA call static TA to store data in security\n"
 	"mmc testefuse - test CA call static TA,and TA read or write efuse\n"
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
diff --git a/cmd/optee.c b/cmd/optee.c
new file mode 100644
index 0000000000..f1140176b6
--- /dev/null
+++ b/cmd/optee.c
@@ -0,0 +1,279 @@
+/* SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright 2019, Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+#include <boot_rkimg.h>
+#include <stdlib.h>
+
+int test_secure_storage_default(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -1;
+	}
+
+	debug("%s start\n", __func__);
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_OpenSession fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("filename_test_secure_storage_default");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memcpy(SharedMem0.buffer,
+	       "filename_test_secure_storage_default",
+	       SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1024 * 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memset(SharedMem1.buffer, 'a', SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//write data
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = 1024 * 8;
+	SharedMem2.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem2.size;
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//read data
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+	if (memcmp(SharedMem1.buffer, SharedMem2.buffer,
+	    SharedMem1.size) != 0) {
+		printf("error! %s read not equal to write!\n", __func__);
+		return -1;
+	}
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TEEC_FinalizeContext(&TeecContext);
+
+	debug("%s end\n", __func__);
+	return 0;
+}
+
+int test_secure_storage_security_partition(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -1;
+	}
+
+	debug("%s start\n", __func__);
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = 0;//use security partition
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_OpenSession fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("filename_test_secure_storage_security_partition");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memcpy(SharedMem0.buffer,
+	       "filename_test_secure_storage_security_partition",
+	       SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1024 * 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	memset(SharedMem1.buffer, 'b', SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//write data
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = 1024 * 8;
+	SharedMem2.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_AllocateSharedMemory fail!\n", __func__);
+		return -1;
+	}
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem2.size;
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,//read data
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("%s TEEC_InvokeCommand fail!\n", __func__);
+		return -1;
+	}
+	if (memcmp(SharedMem1.buffer, SharedMem2.buffer,
+	    SharedMem1.size) != 0) {
+		printf("error! %s read not equal to write!\n", __func__);
+		return -1;
+	}
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TEEC_FinalizeContext(&TeecContext);
+
+	debug("%s end\n", __func__);
+	return 0;
+}
diff --git a/include/optee_test.h b/include/optee_test.h
new file mode 100644
index 0000000000..537ad7f282
--- /dev/null
+++ b/include/optee_test.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright 2019, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ */
+#ifndef _OPTEE_TEST_H_
+#define _OPTEE_TEST_H_
+
+/*
+ * test secure storage in rpmb when use emmc
+ * test secure storage in security partition when use nand
+ */
+int test_secure_storage_default(void);
+
+/*
+ * test secure storage in security partition
+ */
+int test_secure_storage_security_partition(void);
+
+#endif /*_OPTEE_TEST_H_*/
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index b811179caa..cec5b50c3b 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -140,8 +140,8 @@ void OpteeClientMemInit(void)
 
 	tee_smc_call(&ArmSmcArgs);
 
-	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
-			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
+	debug("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
+	      ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
 	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
 }

commit 2e08e069625040c6bf65b1d9864256a0619ca4cd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 12 16:49:50 2019 +0800

    rockchip: make.sh: convert chip id RV1108 to RV110X
    
    Change-Id: I93ff273109bcccdb499957dd1b02a5dcca941acf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/make.sh b/make.sh
index fd96860b71..fd9780c237 100755
--- a/make.sh
+++ b/make.sh
@@ -333,6 +333,8 @@ select_chip_info()
 		RKCHIP=${RKCHIP##*_}
 		grep '^CONFIG_ROCKCHIP_RK3368=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3368H
+		grep '^CONFIG_ROCKCHIP_RV1108=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RV110X
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant
 		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \

commit 3ebdbc6a7caa052ce2b2959d9fc40f5116fa35c3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 17:20:00 2019 +0800

    rockchip: config: evb-rv1108: enable mmc and aosp image
    
    Change-Id: I464460f1386acfecadc7a116f11ef3b3bb66d3cb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 6a5c098770..4afae952d0 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -4,7 +4,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -14,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
@@ -23,7 +23,9 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
 CONFIG_RANDOM_UUID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -40,6 +42,8 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -48,11 +52,9 @@ CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
-CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
@@ -85,8 +87,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x110a
-CONFIG_DISPLAY=y
 CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_SPL_TINY_MEMSET=y

commit 1feaf21adf802000e106199a46ead6fc104fc56b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 17:19:19 2019 +0800

    rockchip: dts: rv1108: enable emmc
    
    Enable emmc node.
    
    Change-Id: I4ee5b078429e8e0686f301d03602e0875a613ee2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 75e4d4d607..d63e0cf1df 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -181,6 +181,17 @@
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
 };
 
+&emmc {
+	u-boot,dm-pre-reloc;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
 &mipi_dphy {
 	status = "okay";
 };

commit a059684b230de0815e3ccd6a419dda35c4a0106d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 18:37:23 2019 +0800

    armv7: sleep.S: support other v7 cpu
    
    Change-Id: Ib1b1cb973054c9faa6a11da8fc1ad7f1d5aec214
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/sleep.S b/arch/arm/cpu/armv7/sleep.S
index 5c3d385396..1d57b1fb41 100644
--- a/arch/arm/cpu/armv7/sleep.S
+++ b/arch/arm/cpu/armv7/sleep.S
@@ -57,15 +57,16 @@ ENTRY(cpu_do_suspend)
 
 	read_midr r4
 	ubfx	r5, r4, #4, #12
+
 	ldr     r4, CORTEX_A7_PART_NUM
 	cmp	r5, r4
 	beq	a7_suspend
+
 	ldr     r4, CORTEX_A9_PART_NUM
 	cmp	r5, r4
 	beq	a9_suspend
 
-	/* cpu not supported */
-	b	.
+	b	other_suspend
 
 	/* A9 needs PCR/DIAG */
 a9_suspend:
@@ -78,6 +79,7 @@ a7_suspend:
 	read_tpidruro r5
 	stmia	r0!, {r4 - r5}
 
+other_suspend:
 	read_dacr  r4
 	read_ttbr0 r5
 	read_ttbr1 r6
@@ -122,10 +124,24 @@ ENDPROC(cpu_resume)
 ENTRY(cpu_do_resume)
 	read_midr r4
 	ubfx	r5, r4, #4, #12
+
+	ldr	r4, CORTEX_A9_PART_NUM
+	cmp	r5, r4
+	beq	a9_resume
+
 	ldr     r4, CORTEX_A7_PART_NUM
 	cmp	r5, r4
 	beq	a7_resume
 
+	/* v7 resume */
+	mov	ip, #0
+	/* Invalidate icache to PoU */
+	write_iciallu
+	/* set reserved context */
+	write_contextidr ip
+	b	other_resume
+
+a9_resume:
 	/*
 	 * A9 needs PCR/DIAG
 	 */
@@ -146,6 +162,7 @@ a7_resume:
 	write_fcseidr r4
 	write_tpidruro r5
 
+other_resume:
 	ldmia	r0!, {r4 - r10}
 	/* Invalidate entire TLB */
 	write_tlbiall

commit abf4f551161df5ae2d6b87d75deeb1b3ed5cdd4e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 13 18:36:39 2019 +0800

    armv7: sleep.S: rename _suspend_gd to __suspend_gd
    
    Change-Id: I97911822c5616dbcbb3b28a156a3759f3b6b2af3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/sleep.S b/arch/arm/cpu/armv7/sleep.S
index b3ea3c1b88..5c3d385396 100644
--- a/arch/arm/cpu/armv7/sleep.S
+++ b/arch/arm/cpu/armv7/sleep.S
@@ -30,8 +30,8 @@ ENTRY(cpu_suspend)
 	sub	sp, sp, #PM_CTX_SIZE
 	push	{r0, r1}
 
-	/* r9 is gd, save it to _suspend_gd !!! */
-	adr	r4, _suspend_gd
+	/* r9 is gd, save it to __suspend_gd !!! */
+	adr	r4, __suspend_gd
 	str	r9, [r4]
 
 	mov	r1, r5
@@ -102,7 +102,7 @@ ENTRY(cpu_resume)
 	cpsid	aif
 
 	/* Load gd !! */
-	adr r1, _suspend_gd
+	adr r1, __suspend_gd
 	ldr r2, [r1]
 
 	/* Get pm_ctx */
@@ -177,7 +177,7 @@ a7_resume:
 ENDPROC(cpu_do_resume)
 
 .align 4
-_suspend_gd:
+__suspend_gd:
 	.word	0x0
 CORTEX_A7_PART_NUM:
 	.word	0xC07

commit 50ad91b70cecd814c460428de42cd9930fac27e9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 1 17:00:56 2019 +0800

    configs: evb-px30: remove clock-names
    
    Since the clock-names will be used by mmc module, so remove it from
    CONFIG_OF_SPL_REMOVE_PROPS.
    
    Change-Id: Ie42897b6b9eadfea86724ea1e25a6d47b57113af
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index d85444a6cd..81f1884d78 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -55,7 +55,7 @@ CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 438f1a786fe2bfe08843324385c54f73bb696be5
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Jan 7 14:17:18 2019 +0800

    configs: rk322x_defconfig: enable CONFIG_RKNAND
    
    Change-Id: Ifbb79f72cf04dfe601cd03fa3c06b5042dbd2ac3
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index ecf9243c17..cc18398c46 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -95,6 +95,7 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit d95f6a1c40fe0f7fc45d51fa6aee899c7af2f565
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Jan 7 14:35:08 2019 +0800

    configs: rk3128x_defconfig: enable CONFIG_RKNAND
    
    Change-Id: If64e5cf2dccd2fe7c9621e4ff456c49de484d399
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 449db10e89..46c4f5da7b 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -98,6 +98,7 @@ CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 0a5f26cb4beb9491fb0fe861f0185118c5445555
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Jan 7 14:32:56 2019 +0800

    rockchip: dts: rk322x: enable nandc
    
    Change-Id: I495bc11aa8db9f6a916aaad3c5dad40f4c07b8e2
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index d137064283..376d1e7d22 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -67,6 +67,10 @@
 	status = "okay";
 };
 
+&nandc {
+	status = "okay";
+};
+
 &sdmmc {
 	status = "okay";
 	bus-width = <4>;
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 608eec99a2..432af90b7c 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -35,6 +35,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&nandc {
+	u-boot,dm-pre-reloc;
+};
+
 &sdmmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index f5fb16b6e1..d022b025f3 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -851,4 +851,14 @@
 		compatible = "rockchip,rk3228-msch", "syscon";
 		reg = <0x31090000 0x2000>;
 	};
+
+	nandc: nandc@30030000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x30030000 0x4000>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
 };

commit 8b09909151c221a33a281c9b37df6d127914fcd6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 12 11:30:37 2019 +0800

    pack_resource.sh: move to ./scripts/ folder
    
    Adding copyright and license
    
    Change-Id: Ia3e83797fa968e1cb8916f26ecae3c6f50835a49
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/pack_resource.sh b/scripts/pack_resource.sh
similarity index 93%
rename from pack_resource.sh
rename to scripts/pack_resource.sh
index 03b8d30f7d..ba8adca665 100755
--- a/pack_resource.sh
+++ b/scripts/pack_resource.sh
@@ -1,4 +1,10 @@
 #!/bin/sh
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
 OLD_IMAGE=$1
 IMAGE=resource.img
 TOOL=../rkbin/tools/resource_tool

commit 2ba1365e25e8b8d95de5b7c70bde9830b66585eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 31 18:08:42 2019 +0800

    make.sh: support "--ignore-bl32" for trust_merger
    
    Change-Id: I8428787c7218b3dd546283f6b5888d09a35623e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 454b380957..fd96860b71 100755
--- a/make.sh
+++ b/make.sh
@@ -67,6 +67,9 @@ PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 PLATFORM_AARCH32=
+
+# Out env param
+PACK_IGNORE_BL32=$TRUST_PACK_IGNORE_BL32	# Value only: "--ignore-bl32"
 #########################################################################################################
 help()
 {
@@ -554,7 +557,8 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} \
+					${PACK_IGNORE_BL32} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
 
 		cd - && mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"

commit 7582895812818840ac90b8471a90c21f97813e22
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 31 17:48:29 2019 +0800

    tools: rockchip: trust_merger: support "--ignore-bl32"
    
    Change-Id: Ia8385dc1b41893d475b4f14c222dca98c9d52aba
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
index a73ea81f96..b481321973 100644
--- a/tools/rockchip/trust_merger.c
+++ b/tools/rockchip/trust_merger.c
@@ -53,6 +53,7 @@ static char *gLegacyPath;
 static char *gNewPath;
 static uint8_t gRSAmode = RSA_SEL_2048;
 static uint8_t gSHAmode = SHA_SEL_256;
+static bool gIgnoreBL32;
 
 const uint8_t gBl3xID[BL_MAX_SEC][4] = { { 'B', 'L', '3', '0' },
 	{ 'B', 'L', '3', '1' },
@@ -151,6 +152,11 @@ static bool parseBL3x(FILE *file, int bl3x_id)
 			sec = 1;
 			printf("BL3%d adjust sec from 0 to 1\n", bl3x_id);
 		}
+	} else if (gIgnoreBL32 && (bl3x_id == BL32_SEC)) {
+		if (sec == 1) {
+			sec = 0;
+			printf("BL3%d adjust sec from 1 to 0\n", bl3x_id);
+		}
 	}
 	pbl3x->sec = sec;
 	LOGD("bl3%d sec: %d\n", bl3x_id, pbl3x->sec);
@@ -893,6 +899,8 @@ int main(int argc, char **argv)
 
 			/* Total backup numbers */
 			g_trust_max_num = strtoul(argv[++i], NULL, 10);
+		} else if (!strcmp(OPT_IGNORE_BL32, argv[i])) {
+			gIgnoreBL32 = true;
 		} else {
 			if (optPath) {
 				fprintf(stderr, "only need one path arg, but we have:\n%s\n%s.\n",
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
index 42628fe09f..2a46e60dfc 100644
--- a/tools/rockchip/trust_merger.h
+++ b/tools/rockchip/trust_merger.h
@@ -47,6 +47,7 @@
 #define OPT_RSA		    "--rsa"
 #define OPT_SHA		    "--sha"
 #define OPT_SIZE	    "--size"
+#define OPT_IGNORE_BL32     "--ignore-bl32"
 
 #define DEF_MAJOR           0
 #define DEF_MINOR           0

commit 4a673710d2c7066171db8b070708924bab33a627
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 30 15:45:57 2019 +0800

    rockchip: evb-rk3288: disable SPL_BACKTO_BROM
    
    We get TPL and no need back to bootrom in SPL.
    
    Change-Id: I27b9793acc1a8d311dc9b518e73150c3af711808
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index ab15591951..c45348aea1 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000

commit 620cb656015341bc2fdab5b7217890014051f242
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 29 20:29:02 2019 +0800

    cmd: rbrom: fix to fit the MACRO SCOPE
    
    Both cmd and its implement shoud be in the same MACRO.
    
    Change-Id: I93587c425f999d9701d88b1d278fcc2a70d64133
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot.c b/cmd/boot.c
index 28070d6b47..5790255a3a 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -64,14 +64,14 @@ U_BOOT_CMD(
 	"      passing 'arg' as arguments"
 );
 
-#endif
-
 U_BOOT_CMD(
 	rbrom, 1, 0,	do_reboot_brom,
 	"Perform RESET of the CPU",
 	""
 );
 
+#endif
+
 U_BOOT_CMD(
         reset, 1, 0,    do_reset,
         "Perform RESET of the CPU",

commit f7bec22852fa3b6a7397108afc1a31b030acd0d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 12 11:22:30 2019 +0800

    make.sh: add copyright and license
    
    Change-Id: I9f5fcfe33134e901a77899f70a103d1a3fda26cd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index f2a1293a98..454b380957 100755
--- a/make.sh
+++ b/make.sh
@@ -1,4 +1,10 @@
 #!/bin/bash
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
 set -e
 BOARD=$1
 SUBCMD=$1

commit d554a7b28ef6e524d1edf0db3236b5ae0d6a0d48
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:17:02 2019 +0800

    arm: interrupt: add stacktrace dump for all exceptions routine
    
    show_regs() is called by all exceptions.
    
    Change-Id: Iac271d8d7b5d42ed9cf3d8a860a17f8080acf3bc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index dcc7f5d17b..b178554fc5 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -24,6 +24,7 @@
 #include <asm/u-boot-arm.h>
 #include <efi_loader.h>
 #include <iomem.h>
+#include <stacktrace.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -99,6 +100,7 @@ void show_regs (struct pt_regs *regs)
 		thumb_mode (regs) ? " (T)" : "");
 
 	iomem_show("sp", regs->ARM_sp, 0x00, 0xfc);
+	dump_core_stack(regs);
 }
 
 /* fixup PC to point to the instruction leading to the exception */
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index d88a62232f..cb36d0364b 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,6 +9,7 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 #include <iomem.h>
+#include <stacktrace.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
@@ -219,6 +220,7 @@ void show_regs(struct pt_regs *regs)
 	iomem_show_by_compatible("-pmugrf", 0, 0x400);
 	/* tobe add here ... */
 #endif
+	dump_core_stack(regs);
 }
 
 #else
@@ -237,6 +239,8 @@ void show_regs(struct pt_regs *regs)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
 	printf("\n");
+
+	dump_core_stack(regs);
 }
 #endif
 

commit 6aa65bb1ee0951865e27da81dde1de76c6d4687e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:15:30 2019 +0800

    armv7: add -funwind-tables compile option to support stacktrace
    
    Change-Id: Icfa223397e05dcd42ea3c12275385104bf275213
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 1a77779db4..42a1d9c490 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -139,7 +139,8 @@ OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
 		-j .u_boot_list -j .rela.dyn -j .got -j .got.plt
 else
 OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-		-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn
+		-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \
+		-j .ARM.exidx -j .ARM.extab
 endif
 
 # if a dtb section exists we always have to include it
diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 63591d4a29..63ae71cd4c 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -11,3 +11,7 @@
 # of our decision.
 PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
 PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+PLATFORM_CPPFLAGS += -mabi=aapcs-linux -funwind-tables
+endif
diff --git a/examples/Makefile b/examples/Makefile
index 8e329d7cd5..3b75f41fb9 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -8,6 +8,10 @@ ifdef FTRACE
 subdir-ccflags-y += -finstrument-functions -DFTRACE
 endif
 
+# Here is an compile issue: "undefined reference to `__aeabi_unwind_cpp_pr0'..."
+# when -funwind-tables is enabled, so make it compile depends on -funwind-tables.
+ifeq (,$(findstring -funwind-tables,$(PLATFORM_CPPFLAGS)))
 subdir-y += standalone
 subdir-$(CONFIG_API) += api
 endif
+endif

commit d0df954bf3d4978ee3feb94b80ec863063c704cc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:09:20 2019 +0800

    arm: lib: add arm32/64 stacktrace support
    
    This patch supports dump arm32/64 stacktrace as the format of raw
    address info. The U-Boot symbol table is not available now, please
    use ./scripts/stacktrace.sh script to parse stacktrace info with command:
    
        ./scripts/stacktrace.sh <file>       // stacktrace info file
    
    Example on RK3399:
        Call trace:
         PC:   [< 00258a7c >]  dwc3_gadget_uboot_handle_interrupt+0xa0/0x5bc
         LR:   [< 002052f8 >]  usb_gadget_handle_interrupts+0x10/0x1c
    
        Stack:
               [< 00258a7c >]  dwc3_gadget_uboot_handle_interrupt+0xa0/0x5bc
               [< 0025bd6c >]  sleep_thread.isra.20+0xb0/0x114
               [< 0025cf58 >]  fsg_main_thread+0x2c8/0x1814
               [< 0020db58 >]  do_rkusb+0x250/0x338
               [< 00226a00 >]  cmd_process+0xac/0xe0
               [< 00212df4 >]  run_list_real+0x6fc/0x72c
               [< 00212f94 >]  parse_stream_outer+0x170/0x67c
               [< 002126e0 >]  parse_string_outer+0xdc/0xf4
               [< 00212bb0 >]  run_list_real+0x4b8/0x72c
               [< 00212f94 >]  parse_stream_outer+0x170/0x67c
               [< 00212698 >]  parse_string_outer+0x94/0xf4
               [< 00225f30 >]  run_command_list+0x38/0x90
               [< 00202d08 >]  rockchip_dnl_mode_check+0x4c/0xd4
               [< 00202db0 >]  setup_boot_mode+0x20/0xf0
               [< 00203010 >]  board_late_init+0x10/0x40
               [< 0027071c >]  initcall_run_list+0x44/0x80
               [< 00213d68 >]  board_init_r+0x20/0x24
    
    The "dump_stack()" is available to trigger stacktrace.
    
    Change-Id: Ib1423269dd255fa4a34231489cd3b7e6ddd22540
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 37d4c605ac..515e0fea6f 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -135,6 +135,23 @@ SECTIONS
 		KEEP(*(SORT(.u_boot_list*)));
 	}
 
+	/*
+	 * Stack unwinding tables
+	 */
+	. = ALIGN(8);
+	/* .ARM.exidx is sorted, so has to go in its own output section. */
+	.ARM.exidx : {
+		__exidx_start = .;
+		*(.ARM.exidx*)
+		__exidx_end = .;
+	}
+
+	.ARM.extab : {
+		__extab_start = .;
+		*(.ARM.extab*)
+		__extab_end = .;
+	}
+
 	. = ALIGN(4);
 
 	.__efi_runtime_start : {
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index abffa10c85..d4b5f29eb1 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -55,8 +55,10 @@ ifneq ($(CONFIG_GICV2)$(CONFIG_GICV3),)
 obj-y	+= gic_64.o
 endif
 obj-y	+= interrupts_64.o
+obj-y	+= stacktrace_64.o
 else
 obj-y	+= interrupts.o
+obj-y	+= stacktrace.o
 endif
 ifndef CONFIG_SYSRESET
 obj-y	+= reset.o
diff --git a/arch/arm/lib/stacktrace.c b/arch/arm/lib/stacktrace.c
new file mode 100644
index 0000000000..266aeb2265
--- /dev/null
+++ b/arch/arm/lib/stacktrace.c
@@ -0,0 +1,550 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is taken and modified from the OP-TEE project.
+ */
+
+#include <common.h>
+#include <stacktrace.h>
+#include <asm/sections.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* The register names */
+#define	FP	11
+#define	SP	13
+#define	LR	14
+#define	PC	15
+
+/*
+ * Definitions for the instruction interpreter.
+ *
+ * The ARM EABI specifies how to perform the frame unwinding in the
+ * Exception Handling ABI for the ARM Architecture document. To perform
+ * the unwind we need to know the initial frame pointer, stack pointer,
+ * link register and program counter. We then find the entry within the
+ * index table that points to the function the program counter is within.
+ * This gives us either a list of three instructions to process, a 31-bit
+ * relative offset to a table of instructions, or a value telling us
+ * we can't unwind any further.
+ *
+ * When we have the instructions to process we need to decode them
+ * following table 4 in section 9.3. This describes a collection of bit
+ * patterns to encode that steps to take to update the stack pointer and
+ * link register to the correct values at the start of the function.
+ */
+
+/* A special case when we are unable to unwind past this function */
+#define	EXIDX_CANTUNWIND	1
+
+/*
+ * Entry types.
+ * These are the only entry types that have been seen in the kernel.
+ */
+#define	ENTRY_MASK		0xff000000
+#define	ENTRY_ARM_SU16		0x80000000
+#define	ENTRY_ARM_LU16		0x81000000
+
+/* Instruction masks. */
+#define	INSN_VSP_MASK		0xc0
+#define	INSN_VSP_SIZE_MASK	0x3f
+#define	INSN_STD_MASK		0xf0
+#define	INSN_STD_DATA_MASK	0x0f
+#define	INSN_POP_TYPE_MASK	0x08
+#define	INSN_POP_COUNT_MASK	0x07
+#define	INSN_VSP_LARGE_INC_MASK	0xff
+
+/* Instruction definitions */
+#define	INSN_VSP_INC		0x00
+#define	INSN_VSP_DEC		0x40
+#define	INSN_POP_MASKED		0x80
+#define	INSN_VSP_REG		0x90
+#define	INSN_POP_COUNT		0xa0
+#define	INSN_FINISH		0xb0
+#define	INSN_POP_REGS		0xb1
+#define	INSN_VSP_LARGE_INC	0xb2
+
+#define SHIFT_U32(v, shift)	((uint32_t)(v) << (shift))
+
+/* The state of the unwind process (32-bit mode) */
+struct unwind_state_arm32 {
+	uint32_t registers[16];
+	uint32_t start_pc;
+	ulong insn;
+	unsigned int entries;
+	unsigned int byte;
+	uint16_t update_mask;
+};
+
+/* An item in the exception index table */
+struct unwind_idx {
+	uint32_t offset;
+	uint32_t insn;
+};
+
+static __always_inline uint32_t read_pc(void)
+{
+	uint32_t val;
+
+	asm volatile ("adr %0, ." : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_sp(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, sp" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_lr(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, lr" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_fp(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, fp" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint32_t read_r7(void)
+{
+	uint32_t val;
+
+	asm volatile ("mov %0, r7" : "=r" (val));
+	return val;
+}
+
+static bool copy_in(void *dst, const void *src, size_t n, bool kernel_data)
+{
+	if (!kernel_data)
+		return false;
+
+	memcpy(dst, src, n);
+
+	return true;
+}
+
+/* Expand a 31-bit signed value to a 32-bit signed value */
+static int32_t expand_prel31(uint32_t prel31)
+{
+	return prel31 | SHIFT_U32(prel31 & BIT(30), 1);
+}
+
+/*
+ * Perform a binary search of the index table to find the function
+ * with the largest address that doesn't exceed addr.
+ */
+static struct unwind_idx *find_index(uint32_t addr, ulong exidx,
+				     size_t exidx_sz)
+{
+	ulong idx_start, idx_end;
+	unsigned int min, mid, max;
+	struct unwind_idx *start;
+	struct unwind_idx *item;
+	int32_t prel31_addr;
+	ulong func_addr;
+
+	start = (struct unwind_idx *)exidx;
+	idx_start = exidx;
+	idx_end = exidx + exidx_sz;
+
+	min = 0;
+	max = (idx_end - idx_start) / sizeof(struct unwind_idx);
+
+	while (min != max) {
+		mid = min + (max - min + 1) / 2;
+
+		item = &start[mid];
+
+		prel31_addr = expand_prel31(item->offset);
+		func_addr = (ulong)&item->offset + prel31_addr;
+
+		if (func_addr <= addr) {
+			min = mid;
+		} else {
+			max = mid - 1;
+		}
+	}
+
+	return &start[min];
+}
+
+/* Reads the next byte from the instruction list */
+static bool unwind_exec_read_byte(struct unwind_state_arm32 *state,
+				  uint32_t *ret_insn, bool kernel_stack)
+{
+	uint32_t insn;
+
+	if (!copy_in(&insn, (void *)state->insn, sizeof(insn), kernel_stack))
+		return false;
+
+	/* Read the unwind instruction */
+	*ret_insn = (insn >> (state->byte * 8)) & 0xff;
+
+	/* Update the location of the next instruction */
+	if (state->byte == 0) {
+		state->byte = 3;
+		state->insn += sizeof(uint32_t);
+		state->entries--;
+	} else {
+		state->byte--;
+	}
+
+	return true;
+}
+
+static bool pop_vsp(uint32_t *reg, ulong *vsp, bool kernel_stack,
+		    ulong stack, size_t stack_size)
+{
+	if (*vsp > gd->start_addr_sp ||
+	    *vsp < gd->start_addr_sp - CONFIG_SYS_STACK_SIZE)
+		return false;
+
+	if (!copy_in(reg, (void *)*vsp, sizeof(*reg), kernel_stack))
+		return false;
+
+	(*vsp) += sizeof(*reg);
+
+	return true;
+}
+
+/* Executes the next instruction on the list */
+static bool unwind_exec_insn(struct unwind_state_arm32 *state,
+			     bool kernel_stack, ulong stack,
+			     size_t stack_size)
+{
+	uint32_t insn;
+	ulong vsp = state->registers[SP];
+	int update_vsp = 0;
+
+	/* Read the next instruction */
+	if (!unwind_exec_read_byte(state, &insn, kernel_stack))
+		return false;
+
+	if ((insn & INSN_VSP_MASK) == INSN_VSP_INC) {
+		state->registers[SP] += ((insn & INSN_VSP_SIZE_MASK) << 2) + 4;
+
+	} else if ((insn & INSN_VSP_MASK) == INSN_VSP_DEC) {
+		state->registers[SP] -= ((insn & INSN_VSP_SIZE_MASK) << 2) + 4;
+
+	} else if ((insn & INSN_STD_MASK) == INSN_POP_MASKED) {
+		uint32_t mask;
+		unsigned int reg;
+
+		/* Load the mask */
+		if (!unwind_exec_read_byte(state, &mask, kernel_stack))
+			return false;
+		mask |= (insn & INSN_STD_DATA_MASK) << 8;
+
+		/* We have a refuse to unwind instruction */
+		if (mask == 0)
+			return false;
+
+		/* Update SP */
+		update_vsp = 1;
+
+		/* Load the registers */
+		for (reg = 4; mask && reg < 16; mask >>= 1, reg++) {
+			if (mask & 1) {
+				if (!pop_vsp(&state->registers[reg], &vsp,
+					     kernel_stack, stack, stack_size))
+					return false;
+				state->update_mask |= 1 << reg;
+
+				/* If we have updated SP kep its value */
+				if (reg == SP)
+					update_vsp = 0;
+			}
+		}
+
+	} else if ((insn & INSN_STD_MASK) == INSN_VSP_REG &&
+	    ((insn & INSN_STD_DATA_MASK) != 13) &&
+	    ((insn & INSN_STD_DATA_MASK) != 15)) {
+		/* sp = register */
+		state->registers[SP] =
+		    state->registers[insn & INSN_STD_DATA_MASK];
+
+	} else if ((insn & INSN_STD_MASK) == INSN_POP_COUNT) {
+		unsigned int count, reg;
+
+		/* Read how many registers to load */
+		count = insn & INSN_POP_COUNT_MASK;
+
+		/* Update sp */
+		update_vsp = 1;
+
+		/* Pop the registers */
+		for (reg = 4; reg <= 4 + count; reg++) {
+			if (!pop_vsp(&state->registers[reg], &vsp,
+				     kernel_stack, stack, stack_size))
+				return false;
+			state->update_mask |= 1 << reg;
+		}
+
+		/* Check if we are in the pop r14 version */
+		if ((insn & INSN_POP_TYPE_MASK) != 0) {
+			if (!pop_vsp(&state->registers[14], &vsp, kernel_stack,
+				     stack, stack_size))
+				return false;
+		}
+
+	} else if (insn == INSN_FINISH) {
+		/* Stop processing */
+		state->entries = 0;
+
+	} else if (insn == INSN_POP_REGS) {
+		uint32_t mask;
+		unsigned int reg;
+
+		if (!unwind_exec_read_byte(state, &mask, kernel_stack))
+			return false;
+		if (mask == 0 || (mask & 0xf0) != 0)
+			return false;
+
+		/* Update SP */
+		update_vsp = 1;
+
+		/* Load the registers */
+		for (reg = 0; mask && reg < 4; mask >>= 1, reg++) {
+			if (mask & 1) {
+				if (!pop_vsp(&state->registers[reg], &vsp,
+					     kernel_stack, stack, stack_size))
+					return false;
+				state->update_mask |= 1 << reg;
+			}
+		}
+
+	} else if ((insn & INSN_VSP_LARGE_INC_MASK) == INSN_VSP_LARGE_INC) {
+		uint32_t uleb128;
+
+		/* Read the increment value */
+		if (!unwind_exec_read_byte(state, &uleb128, kernel_stack))
+			return false;
+
+		state->registers[SP] += 0x204 + (uleb128 << 2);
+
+	} else {
+		/* We hit a new instruction that needs to be implemented */
+		printf("Unhandled instruction %.2x\n", insn);
+		return false;
+	}
+
+	if (update_vsp)
+		state->registers[SP] = vsp;
+
+	return true;
+}
+
+/* Performs the unwind of a function */
+static bool unwind_tab(struct unwind_state_arm32 *state, bool kernel_stack,
+		       ulong stack, size_t stack_size)
+{
+	uint32_t entry;
+	uint32_t insn;
+
+	/* Set PC to a known value */
+	state->registers[PC] = 0;
+
+	if (!copy_in(&insn, (void *)state->insn, sizeof(insn), kernel_stack)) {
+		printf("Bad insn addr %p", (void *)state->insn);
+		return true;
+	}
+
+	/* Read the personality */
+	entry = insn & ENTRY_MASK;
+
+	if (entry == ENTRY_ARM_SU16) {
+		state->byte = 2;
+		state->entries = 1;
+	} else if (entry == ENTRY_ARM_LU16) {
+		state->byte = 1;
+		state->entries = ((insn >> 16) & 0xFF) + 1;
+	} else {
+		printf("Unknown entry: %x\n", entry);
+		return true;
+	}
+
+	while (state->entries > 0) {
+		if (!unwind_exec_insn(state, kernel_stack, stack, stack_size))
+			return true;
+	}
+
+	/*
+	 * The program counter was not updated, load it from the link register.
+	 */
+	if (state->registers[PC] == 0) {
+		state->registers[PC] = state->registers[LR];
+
+		/*
+		 * If the program counter changed, flag it in the update mask.
+		 */
+		if (state->start_pc != state->registers[PC])
+			state->update_mask |= 1 << PC;
+
+		/* Check again */
+		if (state->registers[PC] == 0)
+			return true;
+	}
+
+	return false;
+}
+
+bool unwind_stack_arm32(struct unwind_state_arm32 *state, ulong exidx,
+			size_t exidx_sz, bool kernel_stack, ulong stack,
+			size_t stack_size)
+{
+	struct unwind_idx *index;
+	bool finished;
+
+	if (!exidx_sz)
+		return false;
+
+	/* Reset the mask of updated registers */
+	state->update_mask = 0;
+
+	/* The pc value is correct and will be overwritten, save it */
+	state->start_pc = state->registers[PC];
+
+	/* Find the item to run */
+	index = find_index(state->start_pc, exidx, exidx_sz);
+
+	finished = false;
+	if (index->insn != EXIDX_CANTUNWIND) {
+		if (index->insn & (1U << 31)) {
+			/* The data is within the instruction */
+			state->insn = (ulong)&index->insn;
+		} else {
+			/* A prel31 offset to the unwind table */
+			state->insn = (ulong)&index->insn +
+				      expand_prel31(index->insn);
+		}
+
+		/* Run the unwind function */
+		finished = unwind_tab(state, kernel_stack, stack, stack_size);
+	}
+
+	/* This is the top of the stack, finish */
+	if (index->insn == EXIDX_CANTUNWIND)
+		finished = true;
+
+	return !finished;
+}
+
+static uint32_t offset_prel31(uint32_t addr, int32_t offset)
+{
+	return (addr + offset) & 0x7FFFFFFFUL;
+}
+
+int relocate_exidx(void *exidx, size_t exidx_sz, int32_t offset)
+{
+	size_t num_items = exidx_sz / sizeof(struct unwind_idx);
+	struct unwind_idx *start = (struct unwind_idx *)exidx;
+	size_t n;
+
+	for (n = 0; n < num_items; n++) {
+		struct unwind_idx *item = &start[n];
+
+		if (item->offset & BIT(31))
+			return -EINVAL;
+
+		/* Offset to the start of the function has to be adjusted */
+		item->offset = offset_prel31(item->offset, offset);
+
+		if (item->insn == EXIDX_CANTUNWIND)
+			continue;
+		if (item->insn & BIT(31)) {
+			/* insn is a table entry itself */
+			continue;
+		}
+		/*
+		 * insn is an offset to an entry in .ARM.extab so it has to be
+		 * adjusted
+		 */
+		item->insn = offset_prel31(item->insn, offset);
+	}
+	return 0;
+}
+
+void print_stack_arm32(struct unwind_state_arm32 *state,
+		       ulong exidx, size_t exidx_sz, bool kernel_stack,
+		       ulong stack, size_t stack_size)
+{
+	ulong pc, lr;
+
+	if (gd->flags & GD_FLG_RELOC) {
+		pc = (ulong)state->registers[PC] - gd->reloc_off;
+		lr = (ulong)state->registers[LR] - gd->reloc_off;
+	} else {
+		pc = (ulong)state->registers[PC];
+		lr = (ulong)state->registers[LR];
+	}
+
+	printf("\nCall trace:\n");
+	printf("  PC:	[< %08lx >]\n", pc);
+	printf("  LR:	[< %08lx >]\n", lr);
+
+	printf("\nStack:\n");
+	do {
+		if (gd->flags & GD_FLG_RELOC)
+			pc = (ulong)state->registers[PC] - gd->reloc_off;
+		else
+			pc = (ulong)state->registers[PC];
+
+		printf("	[< %08lx >]\n", pc);
+	} while (unwind_stack_arm32(state, exidx, exidx_sz,
+				    kernel_stack, stack, stack_size));
+
+	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+}
+
+void dump_core_stack(struct pt_regs *regs)
+{
+	struct unwind_state_arm32 state;
+	ulong exidx = (ulong)__exidx_start;
+	size_t exidx_sz = (ulong)__exidx_end - (ulong)__exidx_start;
+	ulong stack = gd->start_addr_sp;
+	size_t stack_size = CONFIG_SYS_STACK_SIZE;
+	int i;
+
+	/* Don't use memset(), which updates LR ! */
+	for (i = 0; i < 16; i++)
+		state.registers[i] = 0;
+	state.update_mask = 0;
+	state.start_pc = 0;
+	state.entries = 0;
+	state.insn = 0;
+	state.byte = 0;
+
+	/* r7: Thumb-style frame pointer */
+	state.registers[7] = regs->ARM_r7;
+	/* r11: ARM-style frame pointer */
+	state.registers[FP] = regs->ARM_ip;
+	state.registers[SP] = regs->ARM_sp;
+	state.registers[LR] = regs->ARM_lr;
+	state.registers[PC] = regs->ARM_pc;
+
+	print_stack_arm32(&state, exidx, exidx_sz,
+			  true, stack, stack_size);
+}
+
+void dump_stack(void)
+{
+	struct pt_regs regs;
+
+	regs.ARM_r7 = read_r7();
+	regs.ARM_ip = read_fp();
+	regs.ARM_sp = read_sp();
+	regs.ARM_lr = read_lr();
+	regs.ARM_pc = (uint32_t)dump_stack;
+
+	dump_core_stack(&regs);
+}
diff --git a/arch/arm/lib/stacktrace_64.c b/arch/arm/lib/stacktrace_64.c
new file mode 100644
index 0000000000..2494684a84
--- /dev/null
+++ b/arch/arm/lib/stacktrace_64.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <stacktrace.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct stackframe {
+	uint64_t fp;
+	uint64_t sp;
+	uint64_t pc;
+};
+
+static __always_inline uint64_t read_fp(void)
+{
+	uint64_t val;
+
+	asm volatile ("mov %0, x29" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint64_t read_lr(void)
+{
+	uint64_t val;
+
+	asm volatile ("mov %0, x30" : "=r" (val));
+	return val;
+}
+
+static __always_inline uint64_t read_pc(void)
+{
+	uint64_t val;
+
+	asm volatile ("adr %0, ." : "=r" (val));
+	return val;
+}
+
+/* It's not allowed to access sp_el2 in EL2, so always return a valid sp */
+static __always_inline uint64_t read_sp(void)
+{
+	return gd->start_addr_sp - (CONFIG_SYS_STACK_SIZE / 2);
+}
+
+static bool walk_stackframe(struct stackframe *frame)
+{
+	ulong fp = frame->fp;
+
+	if (fp > gd->start_addr_sp ||
+	    fp < gd->start_addr_sp - CONFIG_SYS_STACK_SIZE)
+		return false;
+
+	frame->sp = fp + 0x10;
+	frame->fp = *(ulong *)(fp);
+	frame->pc = *(ulong *)(fp + 8);
+
+	return true;
+}
+
+void dump_core_stack(struct pt_regs *regs)
+{
+	struct stackframe frame;
+	ulong pc, lr;
+
+	frame.fp = regs->regs[29];
+	frame.sp = regs->sp;
+	frame.pc = regs->elr;
+
+	if (gd->flags & GD_FLG_RELOC) {
+		pc = (ulong)frame.pc - gd->reloc_off;
+		lr = (ulong)regs->regs[30] - gd->reloc_off;
+	} else {
+		pc = (ulong)frame.pc;
+		lr = (ulong)regs->regs[30];
+	}
+
+	printf("\nCall trace:\n");
+	printf("  PC:	[< %08lx >]\n", pc);
+	printf("  LR:	[< %08lx >]\n", lr);
+
+	printf("\nStack:\n");
+	do {
+		if (gd->flags & GD_FLG_RELOC)
+			pc = (ulong)frame.pc - gd->reloc_off;
+		else
+			pc = (ulong)frame.pc;
+
+		printf("	[< %08lx >]\n", pc);
+	} while (walk_stackframe(&frame));
+
+	printf("\nNOTE: Please use ./scripts/stacktrace.sh to parse trace info\n");
+}
+
+void dump_stack(void)
+{
+	struct pt_regs regs;
+
+	regs.regs[29] = read_fp();
+	regs.regs[30] = read_lr();
+	regs.sp = read_sp();
+	regs.elr = read_pc();
+
+	dump_core_stack(&regs);
+}
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index daf021b647..1d140ac110 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -28,6 +28,10 @@ extern char __efi_hello_world_end[];
 /* Start and end of .ctors section - used for constructor calls. */
 extern char __ctors_start[], __ctors_end[];
 
+/* .ARM.exidx is sorted, so has to go in its own output section. */
+extern char __exidx_start[], __exidx_end[];
+extern char __extab_start[], __extab_end[];
+
 /* function descriptor handling (if any).  Override
  * in asm/sections.h */
 #ifndef dereference_function_descriptor
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 8711fe2b48..0de9ff0bd0 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -5,6 +5,7 @@
 #include <linux/types.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
+#include <stacktrace.h>
 
 struct unused {};
 typedef struct unused unused_t;
@@ -194,8 +195,6 @@ typedef unsigned long blkcnt_t;
 #define wait_event_interruptible(...)	0
 #define wake_up_interruptible(...)	do { } while (0)
 #define print_hex_dump(...)		do { } while (0)
-#define dump_stack(...)			do { } while (0)
-
 #define task_pid_nr(x)			0
 #define set_freezable(...)		do { } while (0)
 #define try_to_freeze(...)		0
diff --git a/include/stacktrace.h b/include/stacktrace.h
new file mode 100644
index 0000000000..6ca8225298
--- /dev/null
+++ b/include/stacktrace.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _STACKTRACE_
+#define _STACKTRACE_
+
+#include <common.h>
+
+/* User should never call it */
+void dump_core_stack(struct pt_regs *regs);
+
+/* User API */
+void dump_stack(void);
+
+#endif

commit b97fba2cf2716521c8ba93aba769e218a367de21
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 1 15:19:25 2019 +0800

    scripts: add stacktrace.sh to parse stacktrace info
    
    Usage:
            ./scripts/stacktrace.sh <file>
    
            @<file>: stacktrace info file
    
    Change-Id: I1a7b4798d9826d87ce03186958c51b30784d03e1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/scripts/stacktrace.sh b/scripts/stacktrace.sh
new file mode 100755
index 0000000000..cb0383254d
--- /dev/null
+++ b/scripts/stacktrace.sh
@@ -0,0 +1,80 @@
+#!/bin/bash
+#
+# Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+set -e
+ARGS_N=$#
+INPUT_FILE=$1
+SYMBOL_FILE=`find -name u-boot.sym`
+
+echo
+if [ $ARGS_N -eq 0 ]; then
+	echo "Usage: "
+	echo "	./scripts/stacktrace.sh <file>  // u-boot stacktrace info file"
+	exit 1
+elif [ ! -f $INPUT_FILE ]; then
+	echo "Can't find input file: $INPUT_FILE"
+	exit 1
+elif [ "$SYMBOL_FILE" = '' ] || [ ! -f $SYMBOL_FILE ]; then
+	echo "Can't find symbol file: u-boot.sym"
+	exit 1
+fi
+
+# Parse PC and LR
+echo "Call trace:"
+sed -n "/:   \[</p" $INPUT_FILE | while read line
+do
+	echo -n " ${line}  "
+
+	frame_pc_str=`echo $line | awk '{ print "0x"$3 }'`
+	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$3); }'`
+	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+	f_offset_dec=$((frame_pc_dec-f_pc_dec))
+	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	cat u-boot.sym | sort |
+	awk -v foffset=$f_offset_hex '/\.text/ {
+		if (strtonum("0x"$1) > '$frame_pc_str') {
+			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);
+			exit
+		}
+		fname=$NF;
+		fsize=strtonum("0x"$5);
+		fpc=strtonum("0x"$1);
+	}'
+done
+echo
+
+# Parse stack
+echo "Stack:"
+sed -n "/        \[</p" $INPUT_FILE | while read line
+do
+	echo -n "       ${line}  "
+
+	frame_pc_str=`echo $line | awk '{ print "0x"$2 }'`
+	frame_pc_dec=`echo $line | awk '{ print strtonum("0x"$2); }'`
+	frame_pc_hex=`echo "obase=16;${frame_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	f_pc_dec=`cat u-boot.sym | sort | awk '/\.text/ { if (strtonum("0x"$1) > '$frame_pc_str') { print fpc; exit; } fpc=strtonum("0x"$1); }'`
+	f_pc_hex=`echo "obase=16;${f_pc_dec}"|bc |tr '[A-Z]' '[a-z]'`
+	f_offset_dec=$((frame_pc_dec-f_pc_dec))
+	f_offset_hex=`echo "obase=16;${f_offset_dec}"|bc |tr '[A-Z]' '[a-z]'`
+
+	cat u-boot.sym | sort |
+	awk -v foffset=$f_offset_hex '/\.text/ {
+		if (strtonum("0x"$1) > '$frame_pc_str') {
+			printf("%s+0x%s/0x%x\n", fname, foffset, fsize);
+			exit
+		}
+		fname=$NF;
+		fsize=strtonum("0x"$5);
+		fpc=strtonum("0x"$1);
+	}'
+done
+echo

commit 7f28cbb61ee8de46a34ac30e2ef249f9e095026a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 25 19:48:42 2019 +0800

    lib: Kconfig: add CONFIG_SYS_STACK_SIZE
    
    Change-Id: I37cb4ffea5ef6aa2475a3ca7a87f58f23fcff76a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index 12b597d104..ec9212de0b 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -35,6 +35,12 @@ config SYS_HZ
 	  get_timer() must operate in milliseconds and this option must be
 	  set to 1000.
 
+config SYS_STACK_SIZE
+	hex
+	default 0x20000
+	help
+	 The system stack size.
+
 config USE_TINY_PRINTF
 	bool "Enable tiny printf() version"
 	help

commit 5315192f6084894aa039cd451a48ef83f127d84b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 12 17:35:32 2019 +0800

    rockchip: resource: add resource hdr magic validation
    
    It fixes the dead loop issue of "bootrkp" command:
            ......
            =Booting Rockchip format image=
            boot: invalid image tag(0x0)
            boot_rockchip_image ramdisk part boot read error
            bad resource image magic:
            DTB: rk-kernel.dtb
            invalid entry tag
            invalid entry tag
            invalid entry tag
            invalid entry tag
            ......
    
    Change-Id: Ia15f315eee94dce06800139ff547ebeee3847cae
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 27be5249a5..20d3c61c36 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -177,6 +177,9 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 #endif
 
 	if (hdr) {
+		if (resource_image_check_header(hdr))
+			return -EEXIST;
+
 		content = (void *)((char *)hdr
 				   + (hdr->c_offset) * RK_BLK_SIZE);
 		for (e_num = 0; e_num < hdr->e_nums; e_num++) {

commit 5561190119af2afc614623105648ea752a441418
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Jan 24 11:11:19 2019 +0800

    clk: rockchip: rk3288: add clk_set_default
    
    support aclk_vio\hclk_vio clk setting.
    
    Change-Id: Ie826c770670598161f22208f504d8762b8597811
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 87dce2eddf..4ebf05d082 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -25,6 +25,8 @@
 #define PERI_HCLK_HZ	148500000
 #define PERI_PCLK_HZ	74250000
 
+#define HCLK_VIO_HZ	100000000
+
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3288_clk_priv {
 	struct rk3288_grf *grf;
@@ -155,6 +157,12 @@ enum {
 	DCLK_VOP0_SELECT_NPLL	= 2,
 };
 
+/* CRU_CLKSEL28_CON */
+enum {
+	HCLK_VIO_DIV_SHIFT	= 8,
+	HCLK_VIO_DIV_MASK	= 0x1f << HCLK_VIO_DIV_SHIFT,
+};
+
 /* CRU_CLKSEL29_CON */
 enum {
 	DCLK_VOP1_DIV_SHIFT	= 8,
@@ -168,17 +176,17 @@ enum {
 
 /* CRU_CLKSEL31_CON */
 enum {
-	ACLK_VOP_SELECT_CPLL	= 0,
-	ACLK_VOP_SELECT_GPLL	= 1,
-	ACLK_VOP_SELECT_USB480	= 2,
-	ACLK_VOP1_PLL_SHIFT	= 14,
-	ACLK_VOP1_PLL_MASK	= 3 << ACLK_VOP1_PLL_SHIFT,
-	ACLK_VOP1_DIV_SHIFT	= 8,
-	ACLK_VOP1_DIV_MASK	= 0x1f << ACLK_VOP1_DIV_SHIFT,
-	ACLK_VOP0_PLL_SHIFT	= 6,
-	ACLK_VOP0_PLL_MASK	= 3 << ACLK_VOP0_PLL_SHIFT,
-	ACLK_VOP0_DIV_SHIFT	= 0,
-	ACLK_VOP0_DIV_MASK	= 0x1f << ACLK_VOP0_DIV_SHIFT,
+	ACLK_VIO_SELECT_CPLL	= 0,
+	ACLK_VIO_SELECT_GPLL	= 1,
+	ACLK_VIO_SELECT_USB480	= 2,
+	ACLK_VIO1_PLL_SHIFT	= 14,
+	ACLK_VIO1_PLL_MASK	= 3 << ACLK_VIO1_PLL_SHIFT,
+	ACLK_VIO1_DIV_SHIFT	= 8,
+	ACLK_VIO1_DIV_MASK	= 0x1f << ACLK_VIO1_DIV_SHIFT,
+	ACLK_VIO0_PLL_SHIFT	= 6,
+	ACLK_VIO0_PLL_MASK	= 3 << ACLK_VIO0_PLL_SHIFT,
+	ACLK_VIO0_DIV_SHIFT	= 0,
+	ACLK_VIO0_DIV_MASK	= 0x1f << ACLK_VIO0_DIV_SHIFT,
 };
 
 /* CRU_CLKSEL37_CON */
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 73667de9cd..f7536bac18 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -406,7 +406,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 	struct pll_div cpll_config = {0};
 	u32 lcdc_div, parent;
 	int ret;
-	unsigned int gpll_rate, npll_rate, cpll_rate;
+	unsigned int gpll_rate, npll_rate;
 
 	gpll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
 	npll_rate = rkclk_pll_get_rate(cru, CLK_NEW);
@@ -488,21 +488,24 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			     ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) |
 			     (parent << DCLK_VOP1_PLL_SHIFT));
 		break;
-	case ACLK_VOP0:
-		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
-		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+	case ACLK_VIO0:
+		lcdc_div = DIV_ROUND_UP(gpll_rate, rate_hz);
 		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     ACLK_VOP0_PLL_MASK | ACLK_VOP0_DIV_MASK,
-			     ACLK_VOP_SELECT_CPLL << ACLK_VOP0_PLL_SHIFT |
-			     (lcdc_div - 1) << ACLK_VOP0_DIV_SHIFT);
+			     ACLK_VIO0_PLL_MASK | ACLK_VIO0_DIV_MASK,
+			     ACLK_VIO_SELECT_GPLL << ACLK_VIO0_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VIO0_DIV_SHIFT);
 		break;
-	case ACLK_VOP1:
-		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
-		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+	case ACLK_VIO1:
+		lcdc_div = DIV_ROUND_UP(gpll_rate, rate_hz);
 		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     ACLK_VOP1_PLL_MASK | ACLK_VOP1_DIV_MASK,
-			     ACLK_VOP_SELECT_CPLL << ACLK_VOP1_PLL_SHIFT |
-			     (lcdc_div - 1) << ACLK_VOP1_DIV_SHIFT);
+			     ACLK_VIO1_PLL_MASK | ACLK_VIO1_DIV_MASK,
+			     ACLK_VIO_SELECT_GPLL << ACLK_VIO1_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VIO1_DIV_SHIFT);
+
+		lcdc_div = DIV_ROUND_UP(rate_hz, HCLK_VIO_HZ);
+		rk_clrsetreg(&cru->cru_clksel_con[28],
+			     HCLK_VIO_DIV_MASK,
+			     (lcdc_div - 1) << HCLK_VIO_DIV_SHIFT);
 		break;
 	}
 
@@ -956,8 +959,8 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case DCLK_VOP0:
 	case DCLK_VOP1:
-	case ACLK_VOP0:
-	case ACLK_VOP1:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
 		new_rate = rockchip_vop_set_clk(cru, priv->grf, clk->id, rate);
 		break;
 	case SCLK_EDP_24M:
@@ -1244,6 +1247,7 @@ static int rk3288_clk_probe(struct udevice *dev)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(dev);
 	bool init_clocks = false;
+	int ret;
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(priv->grf))
@@ -1287,6 +1291,12 @@ static int rk3288_clk_probe(struct udevice *dev)
 			priv->armclk_init_hz = priv->armclk_enter_hz;
 	}
 
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
+
 	return 0;
 }
 
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index 4011fd9682..c41745d28b 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -105,6 +105,8 @@
 #define ACLK_VCODEC		208
 #define ACLK_CPU		209
 #define ACLK_PERI		210
+#define ACLK_VIO0		211
+#define ACLK_VIO1		212
 
 /* pclk gates */
 #define PCLK_GPIO0		320

commit 544e79360dece50ce3616060277d196941c18ab0
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Feb 1 12:04:16 2019 +0800

    configs: rockchip: px30: remove clock-names
    
    Since the clock-names will be used by mmc module, so remove it from
    CONFIG_OF_SPL_REMOVE_PROPS.
    
    Change-Id: I7f1b4d9353564c5aa87cf33783e814b5390710ef
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/px30_defconfig b/configs/px30_defconfig
index bc3a35a1b5..70f39c138d 100644
--- a/configs/px30_defconfig
+++ b/configs/px30_defconfig
@@ -57,7 +57,7 @@ CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 683a8d16becc9fea5da237a9ff2ffd6249b212db
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 15:39:47 2019 +0800

    arm: interrupt: clean up registers show
    
    Change-Id: I0ecb11c5e67cb7e0e95d3fcaad9220628fddbfc6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 69cf54bd59..dcc7f5d17b 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -23,6 +23,7 @@
 #include <asm/proc-armv/ptrace.h>
 #include <asm/u-boot-arm.h>
 #include <efi_loader.h>
+#include <iomem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,6 +56,7 @@ void bad_mode (void)
 
 void show_regs (struct pt_regs *regs)
 {
+	ulong pc, lr;
 	unsigned long __maybe_unused flags;
 	const char __maybe_unused *processor_modes[] = {
 	"USER_26",	"FIQ_26",	"IRQ_26",	"SVC_26",
@@ -69,15 +71,17 @@ void show_regs (struct pt_regs *regs)
 
 	flags = condition_codes (regs);
 
-	printf("pc : [<%08lx>]	   lr : [<%08lx>]\n",
-	       instruction_pointer(regs), regs->ARM_lr);
 	if (gd->flags & GD_FLG_RELOC) {
-		printf("reloc pc : [<%08lx>]	   lr : [<%08lx>]\n",
-		       instruction_pointer(regs) - gd->reloc_off,
-		       regs->ARM_lr - gd->reloc_off);
+		pc = instruction_pointer(regs) - gd->reloc_off;
+		lr = regs->ARM_lr - gd->reloc_off;
+	} else {
+		pc = instruction_pointer(regs);
+		lr = regs->ARM_lr;
 	}
-	printf("sp : %08lx  ip : %08lx	 fp : %08lx\n",
-	       regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
+
+	printf ("pc : %08lx  lr : %08lx\n", pc, lr);
+	printf ("sp : %08lx  ip : %08lx	 fp : %08lx\n",
+	        regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
 	printf ("r10: %08lx  r9 : %08lx	 r8 : %08lx\n",
 		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
 	printf ("r7 : %08lx  r6 : %08lx	 r5 : %08lx  r4 : %08lx\n",
@@ -88,11 +92,13 @@ void show_regs (struct pt_regs *regs)
 		flags & CC_N_BIT ? 'N' : 'n',
 		flags & CC_Z_BIT ? 'Z' : 'z',
 		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
-	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
+	printf ("  IRQs %s  FIQs %s  Mode %s%s\n\n",
 		interrupts_enabled (regs) ? "on" : "off",
 		fast_interrupts_enabled (regs) ? "on" : "off",
 		processor_modes[processor_mode (regs)],
 		thumb_mode (regs) ? " (T)" : "");
+
+	iomem_show("sp", regs->ARM_sp, 0x00, 0xfc);
 }
 
 /* fixup PC to point to the instruction leading to the exception */

commit 9fa74d15b8bbfcd01422cbb0d3be7683aa5fcca1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 14:39:05 2019 +0800

    arm: vectors: irq context get svc_lr and svc_sp
    
    Without this patch, the irq context get the irq_lr and irq_sp
    which doesn't make any sense, what we need are svc_lr and svc_sp.
    
    Change-Id: I4c07e3688e818cd4516824a78d57ff092fdbe2b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 9896b60652..c6a3c0db87 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -179,6 +179,7 @@ IRQ_STACK_START:
 #define S_R1		4
 #define S_R0		0
 
+#define MODE_IRQ 0x12
 #define MODE_SVC 0x13
 #define I_BIT	 0x80
 
@@ -206,7 +207,15 @@ IRQ_STACK_START:
 	stmia	sp, {r0 - r12}			@ Calling r0-r12
 	@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 	add	r8, sp, #S_PC
-	stmdb	r8, {sp, lr}^		@ Calling SP, LR
+
+	cps	#MODE_SVC	@ SVC-Mode
+	isb
+	mov	r1, sp		@ svc_sp
+	mov	r2, lr		@ svc_lr
+	cps	#MODE_IRQ	@ IRQ-Mode
+	isb
+
+	stmdb	r8, {r1, r2}^		@ Calling svc_sp, svc_lr
 	str	lr, [r8, #0]		@ Save calling PC
 	mrs	r6, spsr
 	str	r6, [r8, #4]		@ Save CPSR

commit c15709b516ea8d4af9769fe216230d790126d236
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 14:35:28 2019 +0800

    irq: init IRQ_STACK_START_IN
    
    IRQ_STACK_START_IN is default 0x0badc0de which is a invalid address,
    this patch makes all exceptions routine work normally.
    
    Change-Id: I3f4d75b90d840f7ea1cb7a2e1cbc7ad452aef15b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 9bf3d6411f..b4362e9d77 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -293,6 +293,7 @@ int arch_interrupt_init(void)
 
 	/* stack has been reserved in: arch_reserve_stacks() */
 	IRQ_STACK_START = gd->irq_sp;
+	IRQ_STACK_START_IN = gd->irq_sp;
 
 	__asm__ __volatile__("mrs %0, cpsr\n"
 			     : "=r" (cpsr)

commit 9e9e0e07b5b01a59c9f0f230e9fe2cdae0b98c96
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Wed Jan 30 10:05:06 2019 +0800

    power: pmic: rk8xx: save PMIC_POWER_EN register for rk817/rk809
    
    rk817/rk809 must restore the PMIC_POWER_EN OTP value before the system reboot.
    
    Change-Id: Ia62cb8f5b0dc9fef8a32a3af5f087c55a9888d78
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index d5669695ea..d7ae6caa17 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -168,6 +168,8 @@ static int rk8xx_probe(struct udevice *dev)
 	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
 	uint8_t on_source = 0, off_source = 0;
+	uint8_t power_en0, power_en1, power_en2, power_en3;
+	uint8_t value;
 
 	/* read Chip variant */
 	if (device_is_compatible(dev, "rockchip,rk817") ||
@@ -206,6 +208,15 @@ static int rk8xx_probe(struct udevice *dev)
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
 #endif
+		power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
+		power_en1 = pmic_reg_read(dev, RK817_POWER_EN1);
+		power_en2 = pmic_reg_read(dev, RK817_POWER_EN2);
+		power_en3 = pmic_reg_read(dev, RK817_POWER_EN3);
+
+		value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4);
+		pmic_reg_write(dev, RK817_POWER_EN_SAVE0, value);
+		value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4);
+		pmic_reg_write(dev, RK817_POWER_EN_SAVE1, value);
 		break;
 	default:
 		printf("Unknown PMIC: RK%x!!\n", priv->variant);
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 81b58a88c1..daeebb9665 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -192,6 +192,16 @@ enum {
 	RK818_ID = 0x8180,
 };
 
+enum {
+	RK817_POWER_EN0 = 0xb1,
+	RK817_POWER_EN1,
+	RK817_POWER_EN2,
+	RK817_POWER_EN3,
+};
+
+#define RK817_POWER_EN_SAVE0	0x99
+#define RK817_POWER_EN_SAVE1	0xa4
+
 #define RK817_ID_MSB	0xed
 #define RK817_ID_LSB	0xee
 #define RK8XX_ID_MSK	0xfff0

commit 10e1f9ebb762908382aaaf4ea6f1f8cc03375512
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 31 09:25:30 2019 +0800

    android: fix avb enable state set error
    
    Fixes: 8e66ecd25d0f14cbfc6ba88243b5b0b28331c345
    (android: fix get wrong ramdisk address when avb verify)
    
    Change-Id: I6b28ee32824e97e7eaed4aa8a530903d8486004b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 91d2bdf5ab..532cca5e9f 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -969,7 +969,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	if (vboot_flag) {
 		printf("SecureBoot enabled, AVB verify\n");
-		android_avb_set_enabled(false);
+		android_avb_set_enabled(true);
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;

commit da1b89c5ac05401e4d39016c1dbcd32b62de5c88
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Jan 29 15:19:41 2019 +0800

    usb: phy: rockchip: get the otg node correctly
    
    In the commit 525293385cca ("rockchip: board: rework board
    usb init"), it correct the way to find the otg node. This
    patch do the same thing here.
    
    Change-Id: I27c66f48d9f6c99f1d6e45c2b83d2bcd6365a1f3
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index a6e071290a..bafe3cdf85 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
+#include <dm.h>
 #include <fdtdec.h>
 #include <syscon.h>
 
@@ -84,34 +85,44 @@ static int otg_phy_parse(struct dwc2_udc *dev)
 {
 	int node, phy_node;
 	u32 grf_base, grf_offset;
-	const char *mode;
-	bool matched = false;
 	const void *blob = gd->fdt_blob;
+	const fdt32_t *reg;
+	fdt_addr_t addr;
 	struct dwc2_plat_otg_data *pdata = dev->pdata;
 
 	/* Find the usb_otg node */
 	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
 
-		node = fdt_node_offset_by_compatible(blob, node, "snps,dwc2");
-	}
+retry:
+	if (node > 0) {
+		reg = fdt_getprop(blob, node, "reg", NULL);
+		if (!reg)
+			return -EINVAL;
+
+		addr = fdt_translate_address(blob, node, reg);
+		if (addr == OF_BAD_ADDR) {
+			pr_err("Not found usb_otg address\n");
+			return -EINVAL;
+		}
 
-	if (!matched) {
+#if defined(CONFIG_ROCKCHIP_RK3288)
+		if (addr != 0xff580000) {
+			node = fdt_node_offset_by_compatible(blob, node,
+							     "snps,dwc2");
+			goto retry;
+		}
+#endif
+	} else {
 		/*
 		 * With kernel dtb support, rk3288 dwc2 otg node
 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
 		 * with the compatible "rockchip,rk3288_usb20_otg".
 		 */
+#if defined(CONFIG_ROCKCHIP_RK3288)
 		node = fdt_node_offset_by_compatible(blob, -1,
 				"rockchip,rk3288_usb20_otg");
-		if (node > 0) {
-			matched = true;
-		} else {
+#endif
+		if (node < 0) {
 			pr_err("Not found usb_otg device\n");
 			return -ENODEV;
 		}

commit 294ad6176b9344c6c6c89924c3e10bb27bf21891
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Jan 29 14:26:12 2019 +0800

    rockchip: board: rework board usb init
    
    Currently, usb 2.0 otg node was found by the compatible
    "snps,dwc2" and the property "dr_mode". However, the
    "dr_mode" isn't a necessary condition, more seriously,
    if the dr_mode is set to "host" or "peripheral", we
    will fail to get the otg node.
    
    This patch finds otg node by the compatible "snps,dwc2"
    for most of Rockchip SoCs supported only one DWC2 controller.
    For RK3288, it supports two DWC2 controllers with the
    same compatible "snps,dwc2", so we add another condition
    (reg addr = 0xff580000) to get the otg node.
    
    Change-Id: I16acbf3e8da9bec19b8ec0a331b9114cb5462ac0
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index c864378f03..8108e3acc2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -393,28 +393,33 @@ static struct dwc2_plat_otg_data otg_data = {
 int board_usb_init(int index, enum usb_init_type init)
 {
 	int node;
-	const char *mode;
 	fdt_addr_t addr;
 	const fdt32_t *reg;
-	bool matched = false;
 	const void *blob = gd->fdt_blob;
 
 	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"snps,dwc2");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
+	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
+
+retry:
+	if (node > 0) {
+		reg = fdt_getprop(blob, node, "reg", NULL);
+		if (!reg)
+			return -EINVAL;
+
+		addr = fdt_translate_address(blob, node, reg);
+		if (addr == OF_BAD_ADDR) {
+			pr_err("Not found usb_otg address\n");
+			return -EINVAL;
 		}
 
-		node = fdt_node_offset_by_compatible(blob, node,
-					"snps,dwc2");
-	}
-
-	if (!matched) {
+#if defined(CONFIG_ROCKCHIP_RK3288)
+		if (addr != 0xff580000) {
+			node = fdt_node_offset_by_compatible(blob, node,
+							     "snps,dwc2");
+			goto retry;
+		}
+#endif
+	} else {
 		/*
 		 * With kernel dtb support, rk3288 dwc2 otg node
 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
@@ -429,25 +434,14 @@ int board_usb_init(int index, enum usb_init_type init)
 		node = fdt_node_offset_by_compatible(blob, -1,
 				"rockchip,rk3368-usb");
 #endif
-
 		if (node > 0) {
-			matched = true;
+			goto retry;
 		} else {
 			pr_err("Not found usb_otg device\n");
 			return -ENODEV;
 		}
 	}
 
-	reg = fdt_getprop(blob, node, "reg", NULL);
-	if (!reg)
-		return -EINVAL;
-
-	addr = fdt_translate_address(blob, node, reg);
-	if (addr == OF_BAD_ADDR) {
-		pr_err("Not found usb_otg address\n");
-		return -EINVAL;
-	}
-
 	otg_data.regs_otg = (uintptr_t)addr;
 
 	return dwc2_udc_probe(&otg_data);

commit dddde95be472ff27022fdd353f5019e62caafc92
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 18:38:07 2019 +0800

    video/drm: analogix_dp: add edp reset control support
    
    This patch adds eDP software reset operation to make sure
    register access successfully on RK3288 and it fixes possible
    register default value abnormal issue during boot up.
    
    1) normal case:
    Rockchip UBOOT DRM driver version: v1.0.1
    0x120: 0x00000007
    0x390: 0x00000003
    Using display timing dts
    Detailed mode clock 200000 kHz, flags[a]
    H: 1536 1548 1564 1612
    V: 2048 2056 2060 2068
    bus_format: 100e
    Link Training success!
    final link rate = 0x06, lane count = 0x04
    
    2) abnormal case:
    Rockchip UBOOT DRM driver version: v1.0.1
    0x120: 0x00000066
    0x390: 0x00000202
    Using display timing dts
    Detailed mode clock 200000 kHz, flags[a]
    H: 1536 1548 1564 1612
    V: 2048 2056 2060 2068
    bus_format: 100e
    failed to get Rx Max Link Rate
    failed to init training
    unable to do link train
    
    Change-Id: Idacbb0c72a40442da3a87e60bfe1d9965f3ca79c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index e38f411f15..2726acb1ef 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -828,6 +828,11 @@ static int analogix_dp_connector_init(struct display_state *state)
 		break;
 	}
 
+	/* eDP software reset request */
+	reset_assert(&dp->reset);
+	udelay(1);
+	reset_deassert(&dp->reset);
+
 	analogix_dp_init_dp(dp);
 
 	return 0;
@@ -917,6 +922,12 @@ static int analogix_dp_probe(struct udevice *dev)
 	if (IS_ERR(dp->grf))
 		return PTR_ERR(dp->grf);
 
+	ret = reset_get_by_name(dev, "dp", &dp->reset);
+	if (ret) {
+		dev_err(dev, "failed to get reset control: %d\n", ret);
+		return ret;
+	}
+
 	ret = gpio_request_by_name(dev, "hpd-gpios", 0, &dp->hpd_gpio,
 				   GPIOD_IS_IN);
 	if (ret && ret != -ENOENT) {
diff --git a/drivers/video/drm/analogix_dp.h b/drivers/video/drm/analogix_dp.h
index 68295d01f2..adde139fd7 100644
--- a/drivers/video/drm/analogix_dp.h
+++ b/drivers/video/drm/analogix_dp.h
@@ -7,6 +7,8 @@
 #ifndef __DRM_ANALOGIX_DP_H__
 #define __DRM_ANALOGIX_DP_H__
 
+#include <reset.h>
+
 /*
  * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
  * DP and DPCD versions are independent.  Differences from 1.0 are not noted,
@@ -1071,6 +1073,7 @@ struct analogix_dp_device {
 	struct udevice *dev;
 	void *reg_base;
 	void *grf;
+	struct reset_ctl reset;
 	struct gpio_desc hpd_gpio;
 	struct video_info	video_info;
 	struct link_train	link_train;

commit 9136a2d39ceb4838b7c35f93433277ee20c3a455
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jan 22 17:06:04 2019 +0800

    rockchip: dts: px30/rk3326: add emmc hs200 support
    
    Change-Id: I0080a12452dd7fa77b8b7fd26a61bc429b3cfa27
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 83e93d015a..43ef6ee50e 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -389,6 +389,7 @@
 	fifo-mode;
 	bus-width = <8>;
 	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
 	supports-emmc;
 	disable-wp;
 	non-removable;

commit 700a366893696d3e8cd8369c95e2f10b79012bcd
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Jan 31 10:09:50 2019 +0800

    drivers: usb: Add readback check when write keybox
    
    Change-Id: I969012e391bd8b6b764d259379d610853cd163b5
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 1e9e982762..f85b5b75f8 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -362,15 +362,11 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 					return -EIO;
 			} else {
 				/* RPMB */
-#ifdef CONFIG_OPTEE_V1
-#ifdef CONFIG_ANDROID_KEYMASTER_CA
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
 				if (rc < 0)
 					return -EIO;
-#endif
-#endif
 			}
 
 			common->residue -= common->data_size;
@@ -436,6 +432,12 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 			vhead->size = rc;
 		} else {
 			/* RPMB */
+			rc =
+			read_raw_data_from_secure_storage((u8 *)data,
+							  common->data_size);
+			if (!rc)
+				return -EIO;
+			vhead->size = rc;
 		}
 
 		common->residue   -= common->data_size;

commit 9780bd18ce6416b02af392f4e75017396df6e8de
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Wed Jan 23 15:09:49 2019 +0800

    common: write keybox: Add readback check interface
    
    Change-Id: Ic020bd7e80869c2e3096637fce0adced654d3ce4
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 6198793bc1..91a8b4e736 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <attestation_key.h>
 #include "write_keybox.h"
+#include <keymaster.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
@@ -149,5 +150,30 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			printf("write attestation key to secure storage fail\n");
 		}
 	}
+	/* write all data to secure storage for readback check */
+	if (!rc) {
+		uint32_t ret;
+
+		ret = write_to_keymaster((uint8_t *)"raw_data",
+					 sizeof("raw_data"),
+					 received_data, len);
+		if (ret == TEEC_SUCCESS)
+			rc = 0;
+		else
+			rc = -EIO;
+	}
+	return rc;
+}
+
+uint32_t read_raw_data_from_secure_storage(uint8_t *data, uint32_t data_size)
+{
+	uint32_t rc;
+
+	rc = read_from_keymaster((uint8_t *)"raw_data", sizeof("raw_data"),
+				 data, data_size - 8);
+	if (rc != TEEC_SUCCESS)
+		return 0;
+	rc = data_size - 8;
+
 	return rc;
 }
diff --git a/include/write_keybox.h b/include/write_keybox.h
index 59991f83a5..445562948c 100644
--- a/include/write_keybox.h
+++ b/include/write_keybox.h
@@ -8,6 +8,7 @@
 
 #include <common.h>
 
+#if defined CONFIG_ANDROID_WRITE_KEYBOX && defined CONFIG_ANDROID_KEYMASTER_CA
 /*
  * write_keybox_to_secure_storage
  *
@@ -17,5 +18,28 @@
  * @return a negative number in case of error, or 0 on success.
  */
 uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len);
-#endif
 
+/*
+ * read_raw_data_from_secure_storege
+ *
+ * @raw_data:	the data read from secure storage
+ * @data_size:	size of raw data
+ *
+ * @return size of raw_data in case of success, or 0 on fail
+ */
+uint32_t read_raw_data_from_secure_storage(uint8_t *received_data,
+					   uint32_t len);
+#else
+inline uint32_t write_keybox_to_secure_storage(uint8_t *raw_data,
+					       uint32_t data_size)
+{
+	return -EPERM;
+}
+
+inline uint32_t read_raw_data_from_secure_storage(uint8_t *received_data,
+						  uint32_t len)
+{
+	return -EPERM;
+}
+#endif
+#endif

commit b4ab4a0f328f6abaea83d53b59fba80294b2a1ba
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 18:31:15 2019 +0800

    reset: rockchip: convert to use live dt
    
    Change-Id: I70b17b0d9c4ded215cb58f0b65303fc3dea64f7e
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c
index 322ac27762..7638c28426 100644
--- a/drivers/reset/reset-rockchip.c
+++ b/drivers/reset/reset-rockchip.c
@@ -79,7 +79,7 @@ static int rockchip_reset_probe(struct udevice *dev)
 	fdt_addr_t addr;
 	fdt_size_t size;
 
-	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	addr = dev_read_addr_size(dev, "reg", &size);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 

commit 611de31725939e6e0e4b53f1a322c9662d483219
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jan 28 09:05:18 2019 +0800

    video/drm: analogix_dp: Fix color depth configuration
    
    Change-Id: Iea7fb59a2eb811d3db09cb6d0d8be03cd98a4645
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c
index 181d5661cf..e38f411f15 100644
--- a/drivers/video/drm/analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -20,6 +20,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_panel.h"
 #include "analogix_dp.h"
 
 /**
@@ -804,11 +805,29 @@ static int analogix_dp_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
+	struct video_info *video = &dp->video_info;
+	struct rockchip_panel *panel = state_get_panel(state);
 
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
+	switch (panel->bpc) {
+	case 12:
+		video->color_depth = COLOR_12;
+		break;
+	case 10:
+		video->color_depth = COLOR_10;
+		break;
+	case 6:
+		video->color_depth = COLOR_6;
+		break;
+	case 8:
+	default:
+		video->color_depth = COLOR_8;
+		break;
+	}
+
 	analogix_dp_init_dp(dp);
 
 	return 0;

commit 00cdbd6c886cdaafe19da1f3be22c061c449d8a9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jan 28 08:57:26 2019 +0800

    video/drm: panel: Allow to configure bpc (bits per color) from DT
    
    Change-Id: Iad86b7121e4cdfbd981daba6f860fd8b97bca52a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 33e7b3b362..8f953ee141 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -43,6 +43,7 @@ struct rockchip_panel_cmds {
 struct rockchip_panel_plat {
 	bool power_invert;
 	u32 bus_format;
+	unsigned int bpc;
 
 	struct {
 		unsigned int prepare;
@@ -404,6 +405,7 @@ static int rockchip_panel_ofdata_to_platdata(struct udevice *dev)
 
 	plat->bus_format = dev_read_u32_default(dev, "bus-format",
 						MEDIA_BUS_FMT_RBG888_1X24);
+	plat->bpc = dev_read_u32_default(dev, "bpc", 8);
 
 	data = dev_read_prop(dev, "panel-init-sequence", &len);
 	if (data) {
@@ -515,6 +517,7 @@ static int rockchip_panel_probe(struct udevice *dev)
 
 	panel->dev = dev;
 	panel->bus_format = plat->bus_format;
+	panel->bpc = plat->bpc;
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index d4d5ef113a..3a7587f710 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -21,6 +21,7 @@ struct rockchip_panel_funcs {
 struct rockchip_panel {
 	struct udevice *dev;
 	u32 bus_format;
+	unsigned int bpc;
 	const struct rockchip_panel_funcs *funcs;
 	const void *data;
 

commit 74e39389794fc0129c8b92e8ce414b87db5f5b06
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 11:41:31 2019 +0800

    video/drm: Rename rockchip-dw-mipi-dsi.c to dw_mipi_dsi.c
    
    Change-Id: I409b32e945a2182e2948255b02644a98d16fcc21
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index f5ceca0364..ca4579c88f 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -8,7 +8,7 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/dw_mipi_dsi.c
similarity index 100%
rename from drivers/video/drm/rockchip-dw-mipi-dsi.c
rename to drivers/video/drm/dw_mipi_dsi.c

commit 98e497fd55e2e5d2a6dae4647f2b34d9f9981e75
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 15:56:27 2019 +0800

    arm: arm32_macros: fix coding style
    
    Change-Id: I736139237d184aa7a35c840ea0ed3214d7e47e44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arm32_macros.S b/arch/arm/include/asm/arm32_macros.S
index e6d4f0745e..ce2f2dbdf3 100644
--- a/arch/arm/include/asm/arm32_macros.S
+++ b/arch/arm/include/asm/arm32_macros.S
@@ -248,17 +248,17 @@
 
 	/* Cortex A9: pcr, diag registers */
 	.macro write_pcr reg
-       mcr  p15, 0, \reg, c15, c0, 0
-       .endm
+	mcr  p15, 0, \reg, c15, c0, 0
+	.endm
 
-       .macro read_pcr reg
-       mrc  p15, 0, \reg, c15, c0, 0
-       .endm
+	.macro read_pcr reg
+	mrc  p15, 0, \reg, c15, c0, 0
+	.endm
 
-       .macro write_diag reg
-       mcr  p15, 0, \reg, c15, c0, 1
-       .endm
+	.macro write_diag reg
+	mcr  p15, 0, \reg, c15, c0, 1
+	.endm
 
-       .macro read_diag reg
-       mrc  p15, 0, \reg, c15, c0, 1
-       .endm
+	.macro read_diag reg
+	mrc  p15, 0, \reg, c15, c0, 1
+	.endm

commit 8b8b9c4b96f25e21b046845cfbdef5260bbe468f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Jan 30 11:38:06 2019 +0800

    video/drm: dsi: fix pll clock setting for synopsys phy
    
    Fixes: 1c3c799444b5 ("video/drm: dsi: fix pll clock setting for synopsys phy")
    Change-Id: I1b5ef22c6c63a99dd3f10ea03f31d50d3bfeea06
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 0674772996..ed831ed371 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -463,8 +463,10 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mipi_dphy_rstz_deassert(dsi);
 	mdelay(2);
 
-	if (dsi->dphy.phy)
+	if (dsi->dphy.phy) {
+		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
 		rockchip_phy_power_on(dsi->dphy.phy);
+	}
 
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & PHY_LOCK,

commit d84edf5f5c91f2790bfe3ed76183ca5bd35461af
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Wed Jan 30 11:39:17 2019 +0800

    android: dtbo: enabled by default
    
    Change-Id: I711a9f341b8126e159d4ab07f3fb7fb5e2fab9a2
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
old mode 100644
new mode 100755
index 5c6b6b96f1..af958d7861
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -28,6 +28,7 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -127,6 +128,7 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit 8e66ecd25d0f14cbfc6ba88243b5b0b28331c345
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 29 17:54:31 2019 +0800

    android: fix get wrong ramdisk address when avb verify
    
    - add interface to get android avb enable state;
    - get ramdisk from "ramdisk_addr_r" only when android avb disabled
      and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE is enabled;
    
    (fixes: 644e344 android: support loading android image separate)
    
    Change-Id: I7280f911a0c5db851d119acb458b3f335dc28bce
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index b539aef080..91d2bdf5ab 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -863,6 +863,17 @@ static int load_android_image(struct blk_desc *dev_desc,
 	return 0;
 }
 
+static bool avb_enabled;
+void android_avb_set_enabled(bool enable)
+{
+	avb_enabled = enable;
+}
+
+bool android_avb_is_enabled(void)
+{
+	return avb_enabled;
+}
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -958,6 +969,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	if (vboot_flag) {
 		printf("SecureBoot enabled, AVB verify\n");
+		android_avb_set_enabled(false);
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;
@@ -970,11 +982,13 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			printf("SecureBoot disabled, AVB skip\n");
 			env_update("bootargs",
 				   "androidboot.verifiedbootstate=orange");
+			android_avb_set_enabled(false);
 			if (load_android_image(dev_desc, boot_partname,
 					       slot_suffix, &load_address))
 				return -1;
 		} else {
 			printf("SecureBoot enabled, AVB verify\n");
+			android_avb_set_enabled(true);
 			if (android_slot_verify(boot_partname, &load_address,
 						slot_suffix))
 				return -1;
diff --git a/common/image-android.c b/common/image-android.c
index 3033178706..e980f7eb6d 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <image.h>
 #include <android_image.h>
+#include <android_bootloader.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <errno.h>
@@ -193,30 +194,37 @@ ulong android_image_get_kload(const struct andr_img_hdr *hdr)
 int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len)
 {
+	bool avb_enabled = false;
+
+#ifdef CONFIG_ANDROID_BOOTLOADER
+	avb_enabled = android_avb_is_enabled();
+#endif
+
 	if (!hdr->ramdisk_size) {
 		*rd_data = *rd_len = 0;
 		return -1;
 	}
 
-/*
- * We load ramdisk at "ramdisk_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
- * CONFIG_USING_KERNEL_DTB is enabled.
- */
-#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-	ulong ramdisk_addr_r;
+	/*
+	 * We have load ramdisk at "ramdisk_addr_r" when android avb is
+	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled.
+	 */
+	if (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE)) {
+		ulong ramdisk_addr_r;
 
-	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	if (!ramdisk_addr_r) {
-		printf("No Found Ramdisk Load Address.\n");
-		return -1;
+		ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+		if (!ramdisk_addr_r) {
+			printf("No Found Ramdisk Load Address.\n");
+			return -1;
+		}
+
+		*rd_data = ramdisk_addr_r;
+	} else {
+		*rd_data = (unsigned long)hdr;
+		*rd_data += hdr->page_size;
+		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	}
 
-	*rd_data = ramdisk_addr_r;
-#else
-	*rd_data = (unsigned long)hdr;
-	*rd_data += hdr->page_size;
-	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-#endif
 	*rd_len = hdr->ramdisk_size;
 
 	printf("RAM disk load addr 0x%08lx size %u KiB\n",
@@ -228,31 +236,39 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 int android_image_get_fdt(const struct andr_img_hdr *hdr,
 			      ulong *rd_data)
 {
+	bool avb_enabled = false;
+
+#ifdef CONFIG_ANDROID_BOOTLOADER
+	avb_enabled = android_avb_is_enabled();
+#endif
+
 	if (!hdr->second_size) {
 		*rd_data = 0;
 		return -1;
 	}
-/*
- * We load fdt at "fdt_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE or
- * or CONFIG_USING_KERNEL_DTB is enabled.
- */
-#if defined(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE) || \
-	defined(CONFIG_USING_KERNEL_DTB)
-	ulong fdt_addr_r;
 
-	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr_r) {
-		printf("No Found FDT Load Address.\n");
-		return -1;
-	}
+	/*
+	 * We have load fdt at "fdt_addr_r" when android avb is
+	 * disabled and CONFIG_ANDROID_BOOT_IMAGE_SEPARATE enabled;
+	 * or CONFIG_USING_KERNEL_DTB is enabled.
+	 */
+	if (IS_ENABLED(CONFIG_USING_KERNEL_DTB) ||
+	    (!avb_enabled && IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE))) {
+		ulong fdt_addr_r;
+
+		fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+		if (!fdt_addr_r) {
+			printf("No Found FDT Load Address.\n");
+			return -1;
+		}
 
-	*rd_data = fdt_addr_r;
-#else
-	*rd_data = (unsigned long)hdr;
-	*rd_data += hdr->page_size;
-	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-#endif
+		*rd_data = fdt_addr_r;
+	} else {
+		*rd_data = (unsigned long)hdr;
+		*rd_data += hdr->page_size;
+		*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+		*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+	}
 
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
@@ -361,7 +377,6 @@ long android_image_load(struct blk_desc *dev_desc,
 	u32 kload_addr;
 	u32 blkcnt;
 	struct andr_img_hdr *hdr;
-	__maybe_unused uint8_t vboot_flag = 0;
 
 	if (max_size < part_info->blksz)
 		return -1;
@@ -417,13 +432,8 @@ long android_image_load(struct blk_desc *dev_desc,
 			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
 			      blk_cnt, load_address);
 
-#if defined(CONFIG_ANDROID_AVB) && defined(CONFIG_OPTEE_CLIENT)
-			if (trusty_read_vbootkey_enable_flag(&vboot_flag))
-				return -1;
-#endif
-
 #ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
-			if (!vboot_flag) {
+			if (!android_avb_is_enabled()) {
 				char *fdt_high = env_get("fdt_high");
 				char *ramdisk_high = env_get("initrd_high");
 
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 15498b7fe3..c591390434 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -94,4 +94,10 @@ char *android_str_append(char *base_name, char *slot_suffix);
  */
 int android_fdt_overlay_apply(void *fdt_addr);
 
+/** android_avb_is_enabled- get avb enable state.
+ * *
+ * @return true on enabled, otherwise disabled;
+ */
+bool android_avb_is_enabled(void);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit ecc8fa7230619cbab12a538f7bf559d065d5514b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 30 09:20:01 2019 +0800

    configs: rk3368: increase sys malloc_f len
    
    Avoid malloc_f space for pre-reloc is not enough which
    may cause memory override.
    
    Change-Id: Ifa358f5700dfa8b1dc1240a210e414fb69fca914
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index db8b307d00..67b7d03ae7 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y

commit 49ae8667cc08fb72340ee2b4058b67de5bcce69f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jan 24 10:18:17 2019 +0800

    video/drm: display: atomic display enable handling
    
    Change-Id: If71e8590fb4e1b1e743d4b085e42b7530f518084
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 46f4d98514..d5bf157274 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -660,7 +660,6 @@ static int display_enable(struct display_state *state)
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct panel_state *panel_state = &state->panel_state;
-	int ret = 0;
 
 	display_init(state);
 
@@ -670,17 +669,11 @@ static int display_enable(struct display_state *state)
 	if (state->is_enable)
 		return 0;
 
-	if (crtc_funcs->prepare) {
-		ret = crtc_funcs->prepare(state);
-		if (ret)
-			return ret;
-	}
+	if (crtc_funcs->prepare)
+		crtc_funcs->prepare(state);
 
-	if (conn_funcs->prepare) {
-		ret = conn_funcs->prepare(state);
-		if (ret)
-			goto unprepare_crtc;
-	}
+	if (conn_funcs->prepare)
+		conn_funcs->prepare(state);
 
 	if (conn_state->bridge)
 		rockchip_bridge_pre_enable(conn_state->bridge);
@@ -688,17 +681,11 @@ static int display_enable(struct display_state *state)
 	if (panel_state->panel)
 		rockchip_panel_prepare(panel_state->panel);
 
-	if (crtc_funcs->enable) {
-		ret = crtc_funcs->enable(state);
-		if (ret)
-			goto unprepare_conn;
-	}
+	if (crtc_funcs->enable)
+		crtc_funcs->enable(state);
 
-	if (conn_funcs->enable) {
-		ret = conn_funcs->enable(state);
-		if (ret)
-			goto disable_crtc;
-	}
+	if (conn_funcs->enable)
+		conn_funcs->enable(state);
 
 	if (conn_state->bridge)
 		rockchip_bridge_enable(conn_state->bridge);
@@ -707,18 +694,8 @@ static int display_enable(struct display_state *state)
 		rockchip_panel_enable(panel_state->panel);
 
 	state->is_enable = true;
-	return 0;
 
-disable_crtc:
-	if (crtc_funcs->disable)
-		crtc_funcs->disable(state);
-unprepare_conn:
-	if (conn_funcs->unprepare)
-		conn_funcs->unprepare(state);
-unprepare_crtc:
-	if (crtc_funcs->unprepare)
-		crtc_funcs->unprepare(state);
-	return ret;
+	return 0;
 }
 
 static int display_disable(struct display_state *state)

commit 81681b40b9160c7fb27f19f8a374b968d4839bda
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Jun 15 18:04:08 2018 +0800

    rockchip: dts: rv1108-evb: Fix gmac dts configuration
    
    Add the phy regulator supply for rv1108-evb, and fix the
    configuration of clock_in_out.
    
    But the phy will init failed because the phy-reset pin is
    the same as the mipi data pin.
    
    Change-Id: I14b0accd083742ca6eb4ae6bec1139ef5ba65db0
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 338a04534b..75e4d4d607 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -80,6 +80,16 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		regulator-name = "vcc_phy";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &display_subsystem {
@@ -164,7 +174,8 @@
 
 &gmac {
 	status = "okay";
-	clock_in_out = <0>;
+	clock_in_out ="output";
+	phy-supply = <&vcc_phy>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 10000 1000000>;
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;

commit 0b06bacceb1f964634aef4b5aeb20dc1a0baab79
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 21 15:13:11 2019 +0800

    configs: rk3128x: enable CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    Since sd does not have RPMB, so store secure data in security partition
    for sdboot.
    
    Change-Id: Ibf4557b5b2721657a6abf2f9e70e1b6c8893d7fc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index daad03c077..449db10e89 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -132,3 +132,4 @@ CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit 726087de6e9654badb496347ba46d88eba53a01f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 10 17:01:03 2018 +0800

    crypto: support rockchip hardware crypto
    
    Support: rsa & sha algorithm
    Usage: Set CONFIG_RK_CRYPTO to enable rk crypto.
    
    Change-Id: I2b6a920308fcdf46481bcf38fc6be532a02255bd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 1ea116be75..709268c8c7 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -1,5 +1,6 @@
 menu "Hardware crypto devices"
 
 source drivers/crypto/fsl/Kconfig
+source drivers/crypto/rockchip/Kconfig
 
 endmenu
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index fb8c10b38c..0b770fcd64 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -8,3 +8,4 @@
 obj-$(CONFIG_EXYNOS_ACE_SHA)	+= ace_sha.o
 obj-y += rsa_mod_exp/
 obj-y += fsl/
+obj-$(CONFIG_CRYPTO_ROCKCHIP) += rockchip/
diff --git a/drivers/crypto/rockchip/Kconfig b/drivers/crypto/rockchip/Kconfig
new file mode 100644
index 0000000000..40b332e41d
--- /dev/null
+++ b/drivers/crypto/rockchip/Kconfig
@@ -0,0 +1,5 @@
+config CRYPTO_ROCKCHIP
+	bool "Support Rockchip Hardware Crypto"
+	help
+	  The module supports Rockchip Hardware Crypto.
+	  This accelerates algorithmic operations.
\ No newline at end of file
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
new file mode 100644
index 0000000000..bb1557984d
--- /dev/null
+++ b/drivers/crypto/rockchip/Makefile
@@ -0,0 +1,8 @@
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+#  Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+#
+
+obj-y += rockchip_crypto_hd.o
+obj-y += rockchip_crypto.o
diff --git a/drivers/crypto/rockchip/rockchip_crypto.c b/drivers/crypto/rockchip/rockchip_crypto.c
new file mode 100644
index 0000000000..208d3619e0
--- /dev/null
+++ b/drivers/crypto/rockchip/rockchip_crypto.c
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <config.h>
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <errno.h>
+#include <rockchip_crypto/rockchip_crypto_hd.h>
+#include <rockchip_crypto/rockchip_crypto.h>
+
+int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc)
+{
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto",
+					&crypto_desc->dev);
+	if (ret) {
+		printf("%s: Can not get crypto dev.\n", __func__);
+		return ret;
+	}
+
+	crypto_desc->ops = crypto_get_ops(crypto_desc->dev);
+
+	return 0;
+}
+
+int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
+		       int hash_bits)
+{
+	return rk_crypto->ops->sha_init(rk_crypto->dev, msg_len, msg_len);
+}
+
+int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en)
+{
+	return rk_crypto->ops->sha_byte_swap(rk_crypto->dev, en);
+}
+
+int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
+			u32 data_len)
+{
+	return rk_crypto->ops->sha_start(rk_crypto->dev, data, data_len);
+}
+
+int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result)
+{
+	return rk_crypto->ops->sha_end(rk_crypto->dev, result);
+}
+
+int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash)
+{
+	int ret;
+	u32 data_hash[8];
+
+	ret = rk_crypto_sha_end(rk_crypto, data_hash);
+	if (ret)
+		return -1;
+
+	return memcmp(in_hash, data_hash, 32);
+}
+
+int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto)
+{
+	return rk_crypto->ops->rsa_init(rk_crypto->dev);
+}
+
+int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto,
+			u32 *m, u32 *n, u32 *e, u32 *c)
+{
+	return rk_crypto->ops->rsa_start(rk_crypto->dev, m, n, e, c);
+}
+
+int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result)
+{
+	return rk_crypto->ops->rsa_end(rk_crypto->dev, result);
+}
+
+int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto)
+{
+	u32 datahash[8];
+	u32 rsa_result[8];
+	int ret = 0;
+
+	ret = rk_crypto_sha_end(rk_crypto, datahash);
+	if (ret)
+		return ret;
+
+	ret = rk_crypto_rsa_end(rk_crypto, rsa_result);
+	if (ret)
+		return ret;
+
+	return memcmp(rsa_result, datahash, 32);
+}
+
+int rk_crypto_probe(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device_by_name(UCLASS_RKCRYPTO, "crypto", &dev);
+	if (ret) {
+		printf("%s: Can not get crypto dev.\n", __func__);
+		return -1;
+	}
+
+	ret = device_probe(dev);
+	if (ret) {
+		printf("%s: Crypto probe error.\n", __func__);
+		return -1;
+	}
+
+	return 0;
+}
+
+UCLASS_DRIVER(crypto) = {
+	.id		= UCLASS_RKCRYPTO,
+	.name		= "crypto",
+};
diff --git a/drivers/crypto/rockchip/rockchip_crypto_hd.c b/drivers/crypto/rockchip/rockchip_crypto_hd.c
new file mode 100644
index 0000000000..d765411bbc
--- /dev/null
+++ b/drivers/crypto/rockchip/rockchip_crypto_hd.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bouncebuf.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <linux/errno.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <rockchip_crypto/rockchip_crypto_hd.h>
+#include <rockchip_crypto/rockchip_crypto.h>
+
+struct rockchip_crypto_plat {
+	fdt_addr_t base;
+	s32 frequency;
+};
+
+struct rockchip_crypto_priv {
+	volatile struct rk_crypto_reg *regbase;
+	struct clk clk;
+	unsigned int max_freq;
+};
+
+static int rockchip_crypto_ofdata_to_platdata(struct udevice *bus)
+{
+	struct rockchip_crypto_plat *plat = dev_get_platdata(bus);
+	struct rockchip_crypto_priv *priv = dev_get_priv(bus);
+	int ret = 0;
+
+	plat->base = dev_read_u32_default(bus, "default-addr", 0);
+	debug("Crypto base address is %x\n", (int)(size_t)plat->base);
+	ret = clk_get_by_index(bus, 0, &priv->clk);
+	if (ret < 0) {
+		printf("Could not get clock for %s: %d\n", bus->name, ret);
+		return ret;
+	}
+
+	plat->frequency = dev_read_u32_default(bus, "default-frequency",
+					       CRYPTO_DEFAULT_CLK);
+	debug("Crypto clock frequency is %x\n", (int)(size_t)plat->frequency);
+
+	return 0;
+}
+
+static int rockchip_crypto_probe(struct udevice *dev)
+{
+	struct rockchip_crypto_plat *plat = dev_get_platdata(dev);
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int ret = 0;
+
+	priv->regbase = (volatile struct rk_crypto_reg *)
+				(plat->base & 0xffffffff);
+	priv->max_freq = plat->frequency;
+	ret = clk_set_rate(&priv->clk, priv->max_freq);
+	if (ret < 0) {
+		printf("%s: Failed to set clock: %d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_init(struct udevice *dev, u32 msg_len,
+				    int hash_bits)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	priv->regbase->crypto_hash_meg_len = msg_len;
+	if (hash_bits == SHA_256_BIT) {
+		priv->regbase->crypto_hash_ctrl = HASH_SWAP_DO | ENGINE_SELECTION_SHA256;
+		priv->regbase->crypto_conf &= ~(BYTESWAP_HRFIFO);
+	} else {
+		printf("Do not support that hash_bits is not equal to 256");
+		return -ENOTSUPP;
+	}
+
+	rk_setreg(&priv->regbase->crypto_ctrl, HASH_FLUSH);
+	do {} while (priv->regbase->crypto_ctrl & HASH_FLUSH);
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_byte_swap(struct udevice *dev, int en)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (en)
+		priv->regbase->crypto_conf |= BYTESWAP_HRFIFO;
+	else
+		priv->regbase->crypto_conf &= ~BYTESWAP_HRFIFO;
+	return 0;
+}
+
+static int rockchip_crypto_sha_start(struct udevice *dev, u32 *data,
+				     u32 data_len)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	if (data_len == 0)
+		return 0;
+
+	flush_cache((unsigned long)data, data_len);
+	do {} while (priv->regbase->crypto_ctrl & HASH_START);
+	priv->regbase->crypto_intsts = HASH_DONE_INT;
+	priv->regbase->crypto_hrdmas = (u32)(unsigned long)data;
+	priv->regbase->crypto_hrdmal = ((data_len + 3) >> 2);
+	rk_setreg(&priv->regbase->crypto_ctrl, HASH_START);
+
+	return 0;
+}
+
+static int rockchip_crypto_sha_end(struct udevice *dev, u32 *result)
+{
+	int i;
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	do {} while (priv->regbase->crypto_ctrl & HASH_START);
+	do {} while (!priv->regbase->crypto_hash_sts);
+	for (i = 0; i < 8; i++)
+		*result++ = priv->regbase->crypto_hash_dout[i];
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_init(struct udevice *dev)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	priv->regbase->crypto_pka_ctrl = PKA_BLOCK_SIZE_2048;
+	rk_setreg(&priv->regbase->crypto_ctrl, PKA_HASH_CTRL);
+	priv->regbase->crypto_intsts = 0xffffffff;
+	do {} while (priv->regbase->crypto_ctrl & PKA_CTRL);
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_start(struct udevice *dev, u32 *m,
+				     u32 *n, u32 *e, u32 *c)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+
+	priv->regbase->crypto_intsts = PKA_DONE_INT;
+	memcpy((void *)&priv->regbase->crypto_pka_m, (void *)m, 256);
+	memcpy((void *)&priv->regbase->crypto_pka_n, (void *)n, 256);
+	memcpy((void *)&priv->regbase->crypto_pka_e, (void *)e, 256);
+	memcpy((void *)&priv->regbase->crypto_pka_c, (void *)c, 256);
+	do {} while (priv->regbase->crypto_ctrl & PKA_START);
+	rk_setreg(&priv->regbase->crypto_ctrl, PKA_START);
+
+	return 0;
+}
+
+static int rockchip_crypto_rsa_end(struct udevice *dev, u32 *result)
+{
+	struct rockchip_crypto_priv *priv = dev_get_priv(dev);
+	int i;
+
+	do {} while (priv->regbase->crypto_ctrl & PKA_START);
+	for (i = 0; i < 8; i++)
+		*result++ = *((u32 *)(&priv->regbase->crypto_pka_m + i));
+
+	return 0;
+}
+
+static const struct dm_rk_crypto_ops rockchip_crypto_ops = {
+	.sha_init = rockchip_crypto_sha_init,
+	.sha_byte_swap = rockchip_crypto_sha_byte_swap,
+	.sha_start = rockchip_crypto_sha_start,
+	.sha_end = rockchip_crypto_sha_end,
+	.rsa_init = rockchip_crypto_rsa_init,
+	.rsa_start = rockchip_crypto_rsa_start,
+	.rsa_end = rockchip_crypto_rsa_end,
+};
+
+static const struct udevice_id rockchip_crypto_ids[] = {
+	{ .compatible = "rockchip,rk3399-crypto" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_crypto_drv) = {
+	.name		= "rockchip_crypto",
+	.id		= UCLASS_RKCRYPTO,
+	.of_match	= rockchip_crypto_ids,
+	.ops = &rockchip_crypto_ops,
+	.ofdata_to_platdata = rockchip_crypto_ofdata_to_platdata,
+	.probe		= rockchip_crypto_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_crypto_priv),
+	.platdata_auto_alloc_size = sizeof(struct rockchip_crypto_plat),
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 76c5eb7d88..70910f319e 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -100,7 +100,7 @@ enum uclass_id {
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 	UCLASS_DVFS,		/* DVFS policy */
 	UCLASS_IO_DOMAIN,	/* IO domain */
-
+	UCLASS_RKCRYPTO,        /* Rockchip Crypto */
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
 };
diff --git a/include/rockchip_crypto/rockchip_crypto.h b/include/rockchip_crypto/rockchip_crypto.h
new file mode 100644
index 0000000000..ca7fbb01df
--- /dev/null
+++ b/include/rockchip_crypto/rockchip_crypto.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_H_
+#define _ROCKCHIP_CRYPTO_H_
+
+#define crypto_get_ops(dev)	((struct dm_rk_crypto_ops *)(dev)->driver->ops)
+
+struct rk_crypto_desc {
+	struct udevice *dev;
+	struct dm_rk_crypto_ops *ops;
+};
+
+int get_rk_crypto_desc(struct rk_crypto_desc *crypto_desc);
+int rk_crypto_sha_init(struct rk_crypto_desc *rk_crypto, u32 msg_len,
+		       int hash_bits);
+int rk_crypto_sha_byte_swap(struct rk_crypto_desc *rk_crypto, int en);
+int rk_crypto_sha_start(struct rk_crypto_desc *rk_crypto, u32 *data,
+			u32 data_len);
+int rk_crypto_sha_end(struct rk_crypto_desc *rk_crypto, u32 *result);
+int rk_crypto_sha_check(struct rk_crypto_desc *rk_crypto, u32 *in_hash);
+int rk_crypto_rsa_init(struct rk_crypto_desc *rk_crypto);
+int rk_crypto_rsa_start(struct rk_crypto_desc *rk_crypto, u32 *m,
+			u32 *n, u32 *e, u32 *c);
+int rk_crypto_rsa_end(struct rk_crypto_desc *rk_crypto, u32 *result);
+int rk_crypto_rsa_check(struct rk_crypto_desc *rk_crypto);
+int rk_crypto_probe(void);
+
+#endif
diff --git a/include/rockchip_crypto/rockchip_crypto_hd.h b/include/rockchip_crypto/rockchip_crypto_hd.h
new file mode 100644
index 0000000000..c34fbdb90d
--- /dev/null
+++ b/include/rockchip_crypto/rockchip_crypto_hd.h
@@ -0,0 +1,112 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_CRYPTO_HD_H_
+#define _ROCKCHIP_CRYPTO_HD_H_
+
+struct rk_crypto_reg {
+	u32 crypto_intsts;
+	u32 crypto_intena;
+	u32 crypto_ctrl;
+	u32 crypto_conf;
+	u32 crypto_brdmas;
+	u32 crypto_btdmas;
+	u32 crypto_brdmal;
+	u32 crypto_hrdmas;
+	u32 crypto_hrdmal;
+	u32 reserved0[(0x80 - 0x24) / 4];
+
+	u32 crypto_aes_ctrl;
+	u32 crypto_aes_sts;
+	u32 crypto_aes_din[4];
+	u32 crypto_aes_dout[4];
+	u32 crypto_aes_iv[4];
+	u32 crypto_aes_key[8];
+	u32 crypto_aes_cnt[4];
+	u32 reserved1[(0x100 - 0xe8) / 4];
+
+	u32 crypto_tdes_ctrl;
+	u32 crypto_tdes_sts;
+	u32 crypto_tdes_din[2];
+	u32 crypto_tdes_dout[2];
+	u32 crypto_tdes_iv[2];
+	u32 crypto_tdes_key1[2];
+	u32 crypto_tdes_key2[2];
+	u32 crypto_tdes_key3[2];
+	u32 reserved2[(0x180 - 0x138) / 4];
+
+	u32 crypto_hash_ctrl;
+	u32 crypto_hash_sts;
+	u32 crypto_hash_meg_len;
+	u32 crypto_hash_dout[8];
+	u32 crypto_hash_seed[5];
+	u32 reserved3[(0x200 - 0x1c0) / 4];
+
+	u32 crypto_trng_ctrl;
+	u32 crypto_trng_dout[8];
+	u32 reserved4[(0x280 - 0x224) / 4];
+
+	u32 crypto_pka_ctrl;
+	u32 reserved5[(0x400 - 0x284) / 4];
+
+	u32 crypto_pka_m;
+	u32 reserved6[(0x500 - 0x404) / 4];
+
+	u32 crypto_pka_c;
+	u32 reserved7[(0x600 - 0x504) / 4];
+
+	u32 crypto_pka_n;
+	u32 reserved8[(0x700 - 0x604) / 4];
+
+	u32 crypto_pka_e;
+};
+
+#define CRYPTO_DEFAULT_CLK           10000000
+#define SHA_256_BIT                  256
+/* crypto_hash_ctrl */
+#define HASH_SWAP_DO                 0x8
+#define ENGINE_SELECTION_SHA256      0x2
+/* crypto_conf */
+#define HR_ADDR_MODE                 (1 << 8)
+#define BT_ADDR_MODE                 (1 << 7)
+#define BR_ADDR_MODE                 (1 << 6)
+#define BYTESWAP_HRFIFO              (1 << 5)
+#define BYTESWAP_BTFIFO              (1 << 4)
+#define BYTESWAP_BRFIFO              (1 << 3)
+#define DESSEL                       (1 << 2)
+/* crypto_ctrl */
+#define TRNG_FLUSH                   (1 << 9)
+#define TRNG_START                   (1 << 8)
+#define PKA_FLUSH                    (1 << 7)
+#define HASH_FLUSH                   (1 << 6)
+#define BLOCK_FLUSH                  (1 << 5)
+#define PKA_START                    (1 << 4)
+#define HASH_START                   (1 << 3)
+#define BLOCK_START                  (1 << 2)
+#define TDES_START                   (1 << 1)
+#define AES_START                    (1 << 0)
+#define PKA_HASH_CTRL                (PKA_FLUSH | HASH_FLUSH)
+#define PKA_CTRL                     (PKA_FLUSH | PKA_START)
+/* crypto_intsts */
+#define PKA_DONE_INT                 (1 << 5)
+#define HASH_DONE_INT                (1 << 4)
+#define HRDMA_ERR_INT                (1 << 3)
+#define HRDMA_DONE_INT               (1 << 2)
+#define BCDMA_ERR_INT                (1 << 1)
+#define BCDMA_DONE_INT               (1 << 0)
+/* crypto_pka_ctrl */
+#define PKA_BLOCK_SIZE_2048          2
+
+struct dm_rk_crypto_ops {
+	int (*sha_init)(struct udevice *dev, u32 msg_len, int hash_bits);
+	int (*sha_byte_swap)(struct udevice *dev, int en);
+	int (*sha_start)(struct udevice *dev, u32 *data, u32 data_len);
+	int (*sha_end)(struct udevice *dev, u32 *result);
+	int (*rsa_init)(struct udevice *dev);
+	int (*rsa_start)(struct udevice *dev, u32 *m, u32 *n, u32 *e, u32 *c);
+	int (*rsa_end)(struct udevice *dev, u32 *result);
+};
+
+#endif

commit 564654eb9cb4e87d6745e05ed833a19d233610cd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 10 17:01:03 2018 +0800

    lib: optee_client: add read&wite permanent attributes certificate
    
    Change-Id: I83321afcf9d89b0cde0bcc78f1f02c847f85a115
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 7475f6e3e5..c2e6f90c8f 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -19,6 +19,10 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
 uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
 uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
+					      uint32_t size);
+uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
+					       uint32_t size);
 uint32_t trusty_read_lock_state(uint8_t *lock_state);
 uint32_t trusty_write_lock_state(uint8_t lock_state);
 uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
old mode 100755
new mode 100644
index a124860792..d2d5c758f4
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -470,6 +470,158 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	return TeecResult;
 }
 
+uint32_t trusty_read_permanent_attributes_cer(uint8_t *attributes,
+					      uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("rsacer");
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_permanent_attributes_cer(uint8_t *attributes,
+					       uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("rsacer");
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	memcpy(SharedMem0.buffer, "rsacer", SharedMem0.size);
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
 uint32_t trusty_read_lock_state(uint8_t *lock_state)
 {
 	TEEC_Result TeecResult;

commit 73d987a762ac55c0c2fff086d0d377999f2e4bd4
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Mon Jan 28 15:39:27 2019 +0800

    configs: rk3126: add POWER_FG_RK816 support
    
    Change-Id: Ie5111627ac3303a9beb6f9f778004c7b9cbeb020
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 3814172462..447b70876f 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -58,6 +58,7 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit 524f26463d9251cb8eef248c36eec33271f06dcb
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jan 23 10:45:25 2019 +0800

    clk: rockchip: rk3066: print arm enter and init rate
    
    Change-Id: Iaf4ffbb61830b7bb7cef31843f0e9b75c34d08ec
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
index c4a6951633..5fe9732971 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
@@ -29,6 +29,11 @@ struct rk3066_clk_priv {
 	struct rk3066_cru *cru;
 	ulong rate;
 	bool has_bwadj;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3066_cru {
@@ -52,6 +57,12 @@ struct rk3066_cru {
 };
 check_member(rk3066_cru, cru_glb_cnt_th, 0x0140);
 
+struct rk3066_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* CRU_CLKSEL0_CON */
 enum {
 	/* a9_core_div: core = core_src / (a9_core_div + 1) */
diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index 57f8640089..dc324350dc 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -36,6 +36,22 @@ struct rk3066_clk_plat {
 #endif
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3066_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3066_clk_info clks_dump[] = {
+	RK3066_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3066_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3066_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3066_CLK_DUMP(PLL_CPLL, "cpll", true),
+};
+#endif
+
 struct pll_div {
 	u32 nr;
 	u32 nf;
@@ -550,10 +566,15 @@ static int rk3066_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
-
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
 	rkclk_init(priv->cru, priv->grf, 1);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+							  CLK_ARM);
 #endif
-
 	return 0;
 }
 
@@ -609,3 +630,69 @@ U_BOOT_DRIVER(rockchip_rk3066a_cru) = {
 	.ofdata_to_platdata	= rk3066_clk_ofdata_to_platdata,
 	.probe			= rk3066_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3066_clk_priv *priv;
+	const struct rk3066_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3066a_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit 441bfb788af845e63093d2b1e52e45dd84393df6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jan 23 11:01:11 2019 +0800

    clk: rockchip: rk3188: print arm enter and init rate
    
    Change-Id: I604c18050e8ccbbc9aa25ecd8f4379a877239d49
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
index 850b0a7af5..09a650e689 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
@@ -29,6 +29,11 @@ struct rk3188_clk_priv {
 	struct rk3188_cru *cru;
 	ulong rate;
 	bool has_bwadj;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3188_cru {
@@ -52,6 +57,12 @@ struct rk3188_cru {
 };
 check_member(rk3188_cru, cru_glb_cnt_th, 0x0140);
 
+struct rk3188_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* CRU_CLKSEL0_CON */
 enum {
 	/* a9_core_div: core = core_src / (a9_core_div + 1) */
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 287c44093c..757328f4bc 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -37,6 +37,22 @@ struct rk3188_clk_plat {
 #endif
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3188_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3188_clk_info clks_dump[] = {
+	RK3188_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3188_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3188_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3188_CLK_DUMP(PLL_GPLL, "gpll", true),
+};
+#endif
+
 struct pll_div {
 	u32 nr;
 	u32 nf;
@@ -593,8 +609,14 @@ static int rk3188_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
-
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
 	rkclk_init(priv->cru, priv->grf, priv->has_bwadj);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+							  CLK_ARM);
 #endif
 
 	return 0;
@@ -653,3 +675,69 @@ U_BOOT_DRIVER(rockchip_rk3188_cru) = {
 	.ofdata_to_platdata	= rk3188_clk_ofdata_to_platdata,
 	.probe			= rk3188_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3188_clk_priv *priv;
+	const struct rk3188_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3188_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit 14262c55f80db2c59e51d59d9f6b87bd617f2829
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Oct 16 11:53:05 2018 +0800

    clk: rockchip: rk3328: add case SCLK_EMMC_SAMPLE
    
    Change-Id: Id2769eefc1692422110152e6dbec7afeb4488c8c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index e14f44676b..d4778379e6 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -292,6 +292,7 @@ static ulong rk3328_mmc_get_clk(struct rk3328_clk_priv *priv, uint clk_id)
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con_id = 32;
 		break;
 	default:
@@ -756,6 +757,7 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		rate = rk3328_mmc_get_clk(priv, clk->id);
 		break;
 #ifndef CONFIG_SPL_BUILD

commit 9f1d10d309b8919516eeb92ba445050e2bf13555
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:11:52 2019 +0800

    video/drm: dsi: rework dual channel mode
    
    Change-Id: If119532a057d731f523a7ec8b035e9addc76d1e1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index be5cbb0d44..0674772996 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -7,11 +7,9 @@
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <malloc.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <asm/hardware.h>
-#include <linux/list.h>
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/of_access.h>
@@ -21,12 +19,10 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_panel.h"
 #include "rockchip_phy.h"
 #include "rockchip_mipi_dsi.h"
 
-#define MSEC_PER_SEC    1000L
-#define USEC_PER_SEC	1000000L
-
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
 #define RESET				0
@@ -232,11 +228,9 @@ struct dw_mipi_dsi {
 	struct udevice *dev;
 	void *base;
 	void *grf;
-	const void *blob;
-	ofnode node;
 	int id;
 
-	/* dual-channel */
+	/* for dual-channel */
 	struct dw_mipi_dsi *master;
 	struct dw_mipi_dsi *slave;
 
@@ -855,10 +849,8 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 
 	if (dsi->slave) {
 		ret = dw_mipi_dsi_transfer(dsi->slave, msg);
-		if (ret) {
-			printf("failed to send command through dsi slave, ret = %d\n", ret);
+		if (ret < 0)
 			return ret;
-		}
 	}
 
 	return msg->rx_len ? msg->rx_len : msg->tx_len;
@@ -868,7 +860,7 @@ static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
 					      const struct mipi_dsi_msg *msg)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	return dw_mipi_dsi_transfer(dsi, msg);
 }
@@ -1091,109 +1083,36 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
-static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
-{
-	int phandle;
-	struct device_node *np;
-	struct dw_mipi_dsi *slave = NULL;
-
-	phandle = ofnode_read_u32_default(master->node, "rockchip,dual-channel", -1);
-	if (phandle < 0)
-		return 0;
-
-	np = of_find_node_by_phandle(phandle);
-	if (ofnode_valid(np_to_ofnode(np))) {
-		printf("failed to find dsi slave node\n");
-		return -ENODEV;
-	}
-
-	if (!of_device_is_available(np)) {
-		printf("dsi slave node is not available\n");
-		return -ENODEV;
-	}
-
-	slave = malloc(sizeof(*slave));
-	if (!slave)
-		return -ENOMEM;
-
-	memset(slave, 0, sizeof(*slave));
-
-	master->lanes /= 2;
-	master->slave = slave;
-	slave->master = master;
-
-	slave->blob = master->blob;
-	slave->node = np_to_ofnode(np);
-	slave->base = (u32 *)ofnode_get_addr_index(slave->node, 0);
-	slave->pdata = master->pdata;
-	slave->id = 1;
-	slave->dphy.phy = master->dphy.phy;
-	slave->lanes = master->lanes;
-	slave->format = master->format;
-	slave->mode_flags = master->mode_flags;
-	slave->channel = master->channel;
-
-	return 0;
-}
-
 static int dw_mipi_dsi_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
-	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
-	ofnode panel;
-	int id;
-	int ret;
+	struct rockchip_panel *panel = state_get_panel(state);
 
-	dsi->base = dev_read_addr_ptr(conn_state->dev);
-	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (dsi->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-			__func__, dsi->grf);
-		return -ENXIO;
-	}
-
-	id = of_alias_get_id(ofnode_to_np(mipi_node), "dsi");
-	if (id < 0)
-		id = 0;
-
-	dsi->pdata = pdata;
-	dsi->id = id;
-	dsi->blob = state->blob;
-	dsi->node = mipi_node;
 	dsi->dphy.phy = conn_state->phy;
 
-	conn_state->private = dsi;
+	dsi->lanes = dev_read_u32_default(panel->dev, "dsi,lanes", 4);
+	dsi->format = dev_read_u32_default(panel->dev, "dsi,format",
+					   MIPI_DSI_FMT_RGB888);
+	dsi->mode_flags = dev_read_u32_default(panel->dev, "dsi,flags",
+					       MIPI_DSI_MODE_VIDEO |
+					       MIPI_DSI_MODE_VIDEO_BURST |
+					       MIPI_DSI_MODE_LPM |
+					       MIPI_DSI_MODE_EOT_PACKET);
+	dsi->channel = dev_read_u32_default(panel->dev, "reg", 0);
+
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
-
-	panel = dev_read_subnode(conn_state->dev, "panel");
-	if (!ofnode_valid(panel)) {
-		printf("failed to find panel node\n");
-		return -1;
-	}
-
-#define FDT_GET_INT(val, name) \
-	val = ofnode_read_s32_default(panel, name, -1); \
-	if (val < 0) { \
-		printf("Can't get %s\n", name); \
-		return -1; \
-	}
-
-	FDT_GET_INT(dsi->lanes, "dsi,lanes");
-	FDT_GET_INT(dsi->format, "dsi,format");
-	FDT_GET_INT(dsi->mode_flags, "dsi,flags");
-	FDT_GET_INT(dsi->channel, "reg");
-
-	ret = dw_mipi_dsi_dual_channel_probe(dsi);
-	if (ret)
-		return ret;
-
 	conn_state->type = DRM_MODE_CONNECTOR_DSI;
-	if (dsi->slave)
+
+	if (dsi->slave) {
+		dsi->lanes /= 2;
+		dsi->slave->lanes = dsi->lanes;
+		dsi->slave->format = dsi->format;
+		dsi->slave->mode_flags = dsi->mode_flags;
+		dsi->slave->channel = dsi->channel;
 		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL;
+	}
 
 	return 0;
 }
@@ -1279,7 +1198,7 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 	unsigned long lane_rate;
 
 	dsi->mode = &conn_state->mode;
@@ -1304,7 +1223,7 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 static void dw_mipi_dsi_connector_unprepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	dw_mipi_dsi_post_disable(dsi);
 }
@@ -1312,7 +1231,7 @@ static void dw_mipi_dsi_connector_unprepare(struct display_state *state)
 static int dw_mipi_dsi_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	dw_mipi_dsi_enable(dsi);
 
@@ -1322,7 +1241,7 @@ static int dw_mipi_dsi_connector_enable(struct display_state *state)
 static int dw_mipi_dsi_connector_disable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 
 	dw_mipi_dsi_disable(dsi);
 
@@ -1338,6 +1257,61 @@ static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
 	.transfer = dw_mipi_dsi_connector_transfer,
 };
 
+static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
+{
+	struct udevice *dev;
+	struct dw_mipi_dsi *slave;
+	int ret;
+
+	ret = uclass_get_device_by_phandle(UCLASS_DISPLAY, master->dev,
+					   "rockchip,dual-channel", &dev);
+	if (ret == -ENOENT) {
+		return 0;
+	} else if (ret) {
+		dev_err(dev, "failed to find slave device: %d\n", ret);
+		return ret;
+	}
+
+	slave = dev_get_priv(dev);
+	if (!slave) {
+		dev_err(dev, "failed to get slave channel\n");
+		return -ENODEV;
+	}
+
+	master->slave = slave;
+	slave->master = master;
+
+	return 0;
+}
+
+static int dw_mipi_dsi_probe(struct udevice *dev)
+{
+	struct dw_mipi_dsi *dsi = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
+	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
+	int id, ret;
+
+	dsi->base = dev_read_addr_ptr(dev);
+	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(dsi->grf))
+		return PTR_ERR(dsi->grf);
+
+	id = of_alias_get_id(ofnode_to_np(dev->node), "dsi");
+	if (id < 0)
+		id = 0;
+
+	dsi->dev = dev;
+	dsi->pdata = pdata;
+	dsi->id = id;
+
+	ret = dw_mipi_dsi_dual_channel_probe(dsi);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
 static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0434,  7,  7),
 	[DPICOLORM]		= GRF_REG_FIELD(0x0434,  3,  3),
@@ -1469,6 +1443,7 @@ static const u32 rk3399_dsi1_grf_reg_fields[MAX_FIELDS] = {
 	[DPICOLORM]		= GRF_REG_FIELD(0x6250,  1,  1),
 	[TURNDISABLE]		= GRF_REG_FIELD(0x625c, 12, 15),
 	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x625c,  8, 11),
+	[FORCERXMODE]           = GRF_REG_FIELD(0x625c,  4,  7),
 	[ENABLE_N]		= GRF_REG_FIELD(0x625c,  0,  3),
 	[MASTERSLAVEZ]		= GRF_REG_FIELD(0x6260,  7,  7),
 	[ENABLECLK]		= GRF_REG_FIELD(0x6260,  6,  6),
@@ -1538,15 +1513,6 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 	{}
 };
 
-static int dw_mipi_dsi_probe(struct udevice *dev)
-{
-	struct dw_mipi_dsi *dsi = dev_get_priv(dev);
-
-	dsi->dev = dev;
-
-	return 0;
-}
-
 U_BOOT_DRIVER(dw_mipi_dsi) = {
 	.name = "dw_mipi_dsi",
 	.id = UCLASS_DISPLAY,

commit 1c3c799444b5579c82594300953f62113f44b427
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:11:05 2019 +0800

    video/drm: dsi: fix pll clock setting for synopsys phy
    
    Change-Id: Ib2cfdf413e3c4da039a16971fcc00baaab3b101c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:331690a183f536fe8a791ceed4231f7e484f8fb7)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index b6313bab5c..be5cbb0d44 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -229,6 +229,7 @@ struct mipi_dphy {
 };
 
 struct dw_mipi_dsi {
+	struct udevice *dev;
 	void *base;
 	void *grf;
 	const void *blob;
@@ -468,6 +469,9 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	mipi_dphy_rstz_deassert(dsi);
 	mdelay(2);
 
+	if (dsi->dphy.phy)
+		rockchip_phy_power_on(dsi->dphy.phy);
+
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & PHY_LOCK,
 				 1000, PHY_STATUS_TIMEOUT_US);
@@ -537,76 +541,106 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	testif_write(dsi, 0x18, FEEDBACK_DIV_HI(m >> 5));
 }
 
-static unsigned long dw_mipi_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
+static unsigned long dw_mipi_dsi_get_lane_rate(struct dw_mipi_dsi *dsi)
 {
-	int bpp;
-	unsigned long mpclk, tmp;
-	unsigned long target_mbps = 1000;
-	unsigned int max_mbps;
-	int lanes;
-	int rate;
+	const struct drm_display_mode *mode = dsi->mode;
+	unsigned long max_lane_rate = dsi->pdata->max_bit_rate_per_lane;
+	unsigned long lane_rate;
+	unsigned int value;
+	int bpp, lanes;
+	u64 tmp;
 
 	/* optional override of the desired bandwidth */
-	rate = ofnode_read_u32_default(dsi->node, "rockchip,lane-rate", -1);
-	if (rate > 0) {
-		return rate;
-	}
-	max_mbps = dsi->pdata->max_bit_rate_per_lane / USEC_PER_SEC;
+	value = dev_read_u32_default(dsi->dev, "rockchip,lane-rate", 0);
+	if (value > 0)
+		return value * USEC_PER_SEC;
 
 	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
-	if (bpp < 0) {
-		printf("failed to get bpp for pixel format %d\n",
-			dsi->format);
+	if (bpp < 0)
 		bpp = 24;
-	}
 
 	lanes = dsi->slave ? dsi->lanes * 2 : dsi->lanes;
+	tmp = (u64)mode->clock * 1000 * bpp;
+	do_div(tmp, lanes);
 
-	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
-	if (mpclk) {
-		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
-		tmp = mpclk * (bpp / lanes) * 10 / 9;
-		if (tmp < max_mbps)
-			target_mbps = tmp;
-		else
-			printf("DPHY clock frequency is out of range\n");
-	}
+	/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
+	tmp *= 10;
+	do_div(tmp, 9);
 
-	return target_mbps;
+	if (tmp > max_lane_rate)
+		lane_rate = max_lane_rate;
+	else
+		lane_rate = tmp;
+
+	return lane_rate;
 }
 
-static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi, unsigned long rate)
 {
-	unsigned int i, pre;
-	unsigned long pllref, tmp;
-	unsigned int m = 1, n = 1;
-	unsigned long target_mbps;
+	unsigned long fin, fout;
+	unsigned long fvco_min, fvco_max, best_freq = 984000000;
+	u8 min_prediv, max_prediv;
+	u8 _prediv, best_prediv = 2;
+	u16 _fbdiv, best_fbdiv = 82;
+	u32 min_delta = ~0U;
+
+	fin = 24000000;
+	fout = rate;
+
+	/* 5Mhz < Fref / N < 40MHz, 80MHz < Fvco < 1500Mhz */
+	min_prediv = DIV_ROUND_UP(fin, 40000000);
+	max_prediv = fin / 5000000;
+	fvco_min = 80000000;
+	fvco_max = 1500000000;
+
+	for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
+		u64 tmp, _fout;
+		u32 delta;
+
+		/* Fvco = Fref * M / N */
+		tmp = (u64)fout * _prediv;
+		do_div(tmp, fin);
+		_fbdiv = tmp;
 
-	if (dsi->master)
-		return 0;
+		/*
+		 * Due to the use of a "by 2 pre-scaler," the range of the
+		 * feedback multiplication value M is limited to even division
+		 * numbers, and m must be greater than 12, less than 1000.
+		 */
+		if (_fbdiv <= 12 || _fbdiv >= 1000)
+			continue;
 
-	target_mbps = dw_mipi_dsi_calc_bandwidth(dsi);
+		if (_fbdiv % 2)
+			++_fbdiv;
 
-	/* ref clk : 24MHz*/
-	pllref = 24;
-	tmp = pllref;
+		_fout = (u64)_fbdiv * fin;
+		do_div(_fout, _prediv);
 
-	for (i = 1; i < 6; i++) {
-		pre = pllref / i;
-		if ((tmp > (target_mbps % pre)) && (target_mbps / pre < 512)) {
-			tmp = target_mbps % pre;
-			n = i;
-			m = target_mbps / pre;
-		}
-		if (tmp == 0)
+		if (_fout < fvco_min || _fout > fvco_max)
+			continue;
+
+		delta = abs(fout - _fout);
+		if (!delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = _fout;
 			break;
+		} else if (delta < min_delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = _fout;
+			min_delta = delta;
+		}
 	}
 
-	dsi->lane_mbps = pllref / n * m;
-	dsi->dphy.input_div = n;
-	dsi->dphy.feedback_div = m;
-
-	return 0;
+	dsi->lane_mbps = best_freq / USEC_PER_SEC;
+	dsi->dphy.input_div = best_prediv;
+	dsi->dphy.feedback_div = best_fbdiv;
+	if (dsi->slave) {
+		dsi->slave->lane_mbps = dsi->lane_mbps;
+		dsi->slave->dphy.input_div = dsi->dphy.input_div;
+		dsi->slave->dphy.feedback_div = dsi->dphy.feedback_div;
+	}
 }
 
 static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
@@ -1108,16 +1142,11 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
 	ofnode mipi_node = conn_state->node;
-	struct dw_mipi_dsi *dsi;
+	struct dw_mipi_dsi *dsi = dev_get_priv(conn_state->dev);
 	ofnode panel;
 	int id;
 	int ret;
 
-	dsi = malloc(sizeof(*dsi));
-	if (!dsi)
-		return -ENOMEM;
-	memset(dsi, 0, sizeof(*dsi));
-
 	dsi->base = dev_read_addr_ptr(conn_state->dev);
 	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (dsi->grf <= 0) {
@@ -1169,29 +1198,10 @@ static int dw_mipi_dsi_connector_init(struct display_state *state)
 	return 0;
 }
 
-static void dw_mipi_dsi_pre_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_set_hs_clk(struct dw_mipi_dsi *dsi, unsigned long rate)
 {
-	unsigned long bw, rate;
-
-	if (dsi->dphy.phy) {
-		bw = dw_mipi_dsi_calc_bandwidth(dsi);
-		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
-		dsi->lane_mbps = rate / USEC_PER_SEC;
-		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
-		rockchip_phy_power_on(dsi->dphy.phy);
-	} else {
-		dw_mipi_dsi_get_lane_bps(dsi);
-	}
-
-	if (dsi->slave) {
-		dsi->slave->mode = dsi->mode;
-		dsi->slave->lane_mbps = dsi->lane_mbps;
-		dsi->slave->dphy.input_div = dsi->dphy.input_div;
-		dsi->slave->dphy.feedback_div = dsi->dphy.feedback_div;
-	}
-
-	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
-	       dsi->lane_mbps, dsi->lanes);
+	rate = rockchip_phy_set_pll(dsi->dphy.phy, rate);
+	dsi->lane_mbps = rate / USEC_PER_SEC;
 }
 
 static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
@@ -1270,11 +1280,22 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
+	unsigned long lane_rate;
 
 	dsi->mode = &conn_state->mode;
+	if (dsi->slave)
+		dsi->slave->mode = dsi->mode;
+
+	lane_rate = dw_mipi_dsi_get_lane_rate(dsi);
+	if (dsi->dphy.phy)
+		dw_mipi_dsi_set_hs_clk(dsi, lane_rate);
+	else
+		dw_mipi_dsi_set_pll(dsi, lane_rate);
+
+	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
+	       dsi->lane_mbps, dsi->slave ? dsi->lanes * 2 : dsi->lanes);
 
 	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
-	dw_mipi_dsi_pre_init(dsi);
 	dw_mipi_dsi_pre_enable(dsi);
 
 	return 0;
@@ -1519,6 +1540,10 @@ static const struct udevice_id dw_mipi_dsi_ids[] = {
 
 static int dw_mipi_dsi_probe(struct udevice *dev)
 {
+	struct dw_mipi_dsi *dsi = dev_get_priv(dev);
+
+	dsi->dev = dev;
+
 	return 0;
 }
 

commit cef5be6b540b3f2c8ac5330ad7ac65b8a922a172
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:26:50 2019 +0800

    video/drm: dsi: Bypass TLP clock lane and data lanes counter threshold
    
    Change-Id: I2b750800859626f3d95ebe6b1b8a3d86aefc07d1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:3ef4c2204f9be3f0877333b5d35ab11e322ed90d)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 2e43c4fad0..b6313bab5c 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -510,8 +510,8 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 		{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
 		{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
 	};
-	u8 hsfreqrange;
-	unsigned int index;
+	u8 hsfreqrange, counter;
+	unsigned int index, txbyteclkhs;
 	u16 n, m;
 
 	for (index = 0; index < ARRAY_SIZE(hsfreqrange_table); index++)
@@ -524,6 +524,11 @@ static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	hsfreqrange = hsfreqrange_table[index].hsfreqrange;
 	testif_write(dsi, 0x44, HSFREQRANGE(hsfreqrange));
 
+	txbyteclkhs = dsi->lane_mbps >> 3;
+	counter = txbyteclkhs * 60 / NSEC_PER_USEC;
+	testif_write(dsi, 0x60, 0x80 | counter);
+	testif_write(dsi, 0x70, 0x80 | counter);
+
 	n = dsi->dphy.input_div - 1;
 	m = dsi->dphy.feedback_div - 1;
 	testif_write(dsi, 0x19, 0x30);

commit 2612c8202dc90882e0fb82a77c6081f39104f0ff
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:09:02 2019 +0800

    video/drm: dsi: Don't hardcode/bypass phy default parameters
    
    Change-Id: If8670bee99c1397647323b34acd3e3da028549c3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:bd920c36fc56d00a24d3688510c84c62d7921c6a)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 7477be576b..2e43c4fad0 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -188,68 +188,13 @@
 #define PHY_STATUS_TIMEOUT_US		10000
 #define CMD_PKT_STATUS_TIMEOUT_US	20000
 
-#define BYPASS_VCO_RANGE	BIT(7)
-#define VCO_RANGE_CON_SEL(val)	(((val) & 0x7) << 3)
-#define VCO_IN_CAP_CON_DEFAULT	(0x0 << 1)
-#define VCO_IN_CAP_CON_LOW	(0x1 << 1)
-#define VCO_IN_CAP_CON_HIGH	(0x2 << 1)
-#define REF_BIAS_CUR_SEL	BIT(0)
-
-#define CP_CURRENT_3MA		BIT(3)
-#define CP_PROGRAM_EN		BIT(7)
-#define LPF_PROGRAM_EN		BIT(6)
-#define LPF_RESISTORS_20_KOHM	0
-
-#define HSFREQRANGE_SEL(val)	(((val) & 0x3f) << 1)
-
-#define INPUT_DIVIDER(val)	((val - 1) & 0x7f)
-#define LOW_PROGRAM_EN		0
-#define HIGH_PROGRAM_EN		BIT(7)
-#define LOOP_DIV_LOW_SEL(val)	((val - 1) & 0x1f)
-#define LOOP_DIV_HIGH_SEL(val)	(((val - 1) >> 5) & 0x1f)
-#define PLL_LOOP_DIV_EN		BIT(5)
-#define PLL_INPUT_DIV_EN	BIT(4)
-
-#define POWER_CONTROL		BIT(6)
-#define INTERNAL_REG_CURRENT	BIT(3)
-#define BIAS_BLOCK_ON		BIT(2)
-#define BANDGAP_ON		BIT(0)
-
-#define TER_RESISTOR_HIGH	BIT(7)
-#define	TER_RESISTOR_LOW	0
-#define LEVEL_SHIFTERS_ON	BIT(6)
-#define TER_CAL_DONE		BIT(5)
-#define SETRD_MAX		(0x7 << 2)
-#define POWER_MANAGE		BIT(1)
-#define TER_RESISTORS_ON	BIT(0)
-
-#define BIASEXTR_SEL(val)	((val) & 0x7)
-#define BANDGAP_SEL(val)	((val) & 0x7)
-#define TLP_PROGRAM_EN		BIT(7)
-#define THS_PRE_PROGRAM_EN	BIT(7)
-#define THS_ZERO_PROGRAM_EN	BIT(6)
-
-enum {
-	BANDGAP_97_07,
-	BANDGAP_98_05,
-	BANDGAP_99_02,
-	BANDGAP_100_00,
-	BANDGAP_93_17,
-	BANDGAP_94_15,
-	BANDGAP_95_12,
-	BANDGAP_96_10,
-};
-
-enum {
-	BIASEXTR_87_1,
-	BIASEXTR_91_5,
-	BIASEXTR_95_9,
-	BIASEXTR_100,
-	BIASEXTR_105_94,
-	BIASEXTR_111_88,
-	BIASEXTR_118_8,
-	BIASEXTR_127_7,
-};
+/* Test Code: 0x44 (HS RX Control of Lane 0) */
+#define HSFREQRANGE(x)			UPDATE(x, 6, 1)
+/* Test Code: 0x17 (PLL Input Divider Ratio) */
+#define INPUT_DIV(x)			UPDATE(x, 6, 0)
+/* Test Code: 0x18 (PLL Loop Divider Ratio) */
+#define FEEDBACK_DIV_LO(x)		UPDATE(x, 4, 0)
+#define FEEDBACK_DIV_HI(x)		(BIT(7) | UPDATE(x, 3, 0))
 
 #define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
 
@@ -305,36 +250,6 @@ struct dw_mipi_dsi {
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
 
-struct dphy_pll_testdin_map {
-	unsigned int max_mbps;
-	u8 testdin;
-};
-
-/* The table is based on 27MHz DPHY pll reference clock. */
-static const struct dphy_pll_testdin_map dptdin_map[] = {
-	{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
-	{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
-	{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
-	{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
-	{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
-	{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
-	{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
-	{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
-	{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
-	{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
-};
-
-static int max_mbps_to_testdin(unsigned int max_mbps)
-{
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(dptdin_map); i++)
-		if (dptdin_map[i].max_mbps > max_mbps)
-			return dptdin_map[i].testdin;
-
-	return -EINVAL;
-}
-
 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)
 {
 	writel(val, dsi->base + reg);
@@ -577,45 +492,44 @@ static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 {
-	int testdin, vco, val;
-
-	vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
+	/* Table 5-1 Frequency Ranges */
+	const struct {
+		unsigned long max_lane_mbps;
+		u8 hsfreqrange;
+	} hsfreqrange_table[] = {
+		{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
+		{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
+		{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
+		{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
+		{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
+		{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
+		{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
+		{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
+		{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
+		{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
+	};
+	u8 hsfreqrange;
+	unsigned int index;
+	u16 n, m;
+
+	for (index = 0; index < ARRAY_SIZE(hsfreqrange_table); index++)
+		if (dsi->lane_mbps <= hsfreqrange_table[index].max_lane_mbps)
+			break;
 
-	testdin = max_mbps_to_testdin(dsi->lane_mbps);
-	if (testdin < 0) {
-		printf("failed to get testdin for %dmbps lane clock\n",
-		       dsi->lane_mbps);
-		return testdin;
-	}
+	if (index == ARRAY_SIZE(hsfreqrange_table))
+		--index;
 
-	testif_write(dsi, 0x10, BYPASS_VCO_RANGE | VCO_RANGE_CON_SEL(vco) |
-		     VCO_IN_CAP_CON_LOW | REF_BIAS_CUR_SEL);
-	testif_write(dsi, 0x11, CP_CURRENT_3MA);
-	testif_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
-		     LPF_RESISTORS_20_KOHM);
-	testif_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
-	testif_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
-	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
-	testif_write(dsi, 0x18, val);
-	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
-	testif_write(dsi, 0x18, val);
-	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	testif_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
-		     BIAS_BLOCK_ON | BANDGAP_ON);
-	testif_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
-		     SETRD_MAX | TER_RESISTORS_ON);
-	testif_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
-		     SETRD_MAX | POWER_MANAGE | TER_RESISTORS_ON);
-	testif_write(dsi, 0x22, LOW_PROGRAM_EN | BIASEXTR_SEL(BIASEXTR_127_7));
-	testif_write(dsi, 0x22, HIGH_PROGRAM_EN | BANDGAP_SEL(BANDGAP_96_10));
-	testif_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-	testif_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
-	testif_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+	hsfreqrange = hsfreqrange_table[index].hsfreqrange;
+	testif_write(dsi, 0x44, HSFREQRANGE(hsfreqrange));
 
-	return 0;
+	n = dsi->dphy.input_div - 1;
+	m = dsi->dphy.feedback_div - 1;
+	testif_write(dsi, 0x19, 0x30);
+	testif_write(dsi, 0x17, INPUT_DIV(n));
+	testif_write(dsi, 0x18, FEEDBACK_DIV_LO(m));
+	testif_write(dsi, 0x18, FEEDBACK_DIV_HI(m >> 5));
 }
 
 static unsigned long dw_mipi_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)

commit 374e75505b32c940b1015ed73a6e5f682ded20f2
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:20:46 2019 +0800

    video/drm: dsi: fix phy power-on sequence
    
    Change-Id: I1f48f5d13d772ee8c3c71ee40f122811d687bcc6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:1df398e95a19c472ac847ced671175f147a043ad)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index da90a538e1..7477be576b 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -154,22 +154,21 @@
 #define MAX_RD_TIME(lbcc)		((lbcc) & 0x7fff)
 
 #define DSI_PHY_RSTZ			0xa0
-#define PHY_DISFORCEPLL			0
 #define PHY_ENFORCEPLL			BIT(3)
-#define PHY_DISABLECLK			0
 #define PHY_ENABLECLK			BIT(2)
-#define PHY_RSTZ			0
-#define PHY_UNRSTZ			BIT(1)
-#define PHY_SHUTDOWNZ			0
-#define PHY_UNSHUTDOWNZ			BIT(0)
+#define PHY_RSTZ			BIT(1)
+#define PHY_SHUTDOWNZ			BIT(0)
 
 #define DSI_PHY_IF_CFG			0xa4
 #define N_LANES(n)			((((n) - 1) & 0x3) << 0)
 #define PHY_STOP_WAIT_TIME(cycle)	(((cycle) & 0xff) << 8)
 
 #define DSI_PHY_STATUS			0xb0
-#define LOCK				BIT(0)
-#define STOP_STATE_CLK_LANE		BIT(2)
+#define PHY_STOPSTATE0LANE		BIT(4)
+#define PHY_STOPSTATECLKLANE		BIT(2)
+#define PHY_LOCK			BIT(0)
+#define PHY_STOPSTATELANE		(PHY_STOPSTATE0LANE | \
+					 PHY_STOPSTATECLKLANE)
 
 #define DSI_PHY_TST_CTRL0		0xb4
 #define PHY_TESTCLK			BIT(1)
@@ -435,6 +434,42 @@ static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
+static inline void mipi_dphy_enableclk_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK);
+	udelay(1);
+}
+
+static inline void mipi_dphy_enableclk_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_ENABLECLK, 0);
+	udelay(1);
+}
+
+static inline void mipi_dphy_shutdownz_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_SHUTDOWNZ, 0);
+	udelay(1);
+}
+
+static inline void mipi_dphy_shutdownz_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_SHUTDOWNZ, PHY_SHUTDOWNZ);
+	udelay(1);
+}
+
+static inline void mipi_dphy_rstz_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_RSTZ, 0);
+	udelay(1);
+}
+
+static inline void mipi_dphy_rstz_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_RSTZ, PHY_RSTZ, PHY_RSTZ);
+	udelay(1);
+}
+
 static inline void testif_testclk_assert(struct dw_mipi_dsi *dsi)
 {
 	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK);
@@ -501,7 +536,6 @@ static void testif_test_data_write(struct dw_mipi_dsi *dsi, u8 test_data)
 
 static void testif_write(struct dw_mipi_dsi *dsi, u8 test_code, u8 test_data)
 {
-	testif_testclr_deassert(dsi);
 	testif_test_code_write(dsi, test_code);
 	testif_test_data_write(dsi, test_data);
 
@@ -512,23 +546,27 @@ static void testif_write(struct dw_mipi_dsi *dsi, u8 test_code, u8 test_data)
 
 static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
 {
-	u32 val;
+	u32 mask, val;
 	int ret;
 
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
-		  PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
+	mipi_dphy_shutdownz_deassert(dsi);
+	mipi_dphy_rstz_deassert(dsi);
 	mdelay(2);
 
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
+				 val, val & PHY_LOCK,
+				 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "PHY is not locked\n");
 		return ret;
 	}
 
+	udelay(200);
+
+	mask = PHY_STOPSTATELANE;
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & STOP_STATE_CLK_LANE, 1000,
-				 PHY_STATUS_TIMEOUT_US);
+				 val, (val & mask) == mask,
+				 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		dev_err(dsi->dev, "lane module is not in stop state\n");
 		return ret;
@@ -958,8 +996,6 @@ static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
 	u32 esc_clk_div;
 
 	dsi_write(dsi, DSI_PWR_UP, RESET);
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
-		  | PHY_RSTZ | PHY_SHUTDOWNZ);
 
 	/* The maximum value of the escape clock frequency is 20MHz */
 	esc_clk_div = DIV_ROUND_UP(dsi->lane_mbps >> 3, 20);
@@ -1267,6 +1303,11 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 {
 	u32 map[] = {0x1, 0x3, 0x7, 0xf};
 
+	mipi_dphy_enableclk_deassert(dsi);
+	mipi_dphy_shutdownz_assert(dsi);
+	mipi_dphy_rstz_assert(dsi);
+	testif_testclr_assert(dsi);
+
 	/* Configures DPHY to work as a Master */
 	grf_field_write(dsi, MASTERSLAVEZ, 1);
 
@@ -1280,6 +1321,8 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 	grf_field_write(dsi, FORCERXMODE, 0);
 	udelay(1);
 
+	testif_testclr_deassert(dsi);
+
 	if (!dsi->dphy.phy)
 		dw_mipi_dsi_phy_init(dsi);
 
@@ -1288,6 +1331,8 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 
 	/* Enable Clock Lane Module */
 	grf_field_write(dsi, ENABLECLK, 1);
+
+	mipi_dphy_enableclk_assert(dsi);
 }
 
 static void dw_mipi_dsi_pre_enable(struct dw_mipi_dsi *dsi)

commit e6cbaa24723c9efbfd9284e439b66e3502e30b8b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Jan 19 10:06:49 2019 +0800

    video/drm: dsi: rework test interface
    
    Change-Id: I8521fa8aa8b1ba11888dd506f238e6e6c2d7ad39
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (sync from rk/kernel:develop-4.4:2c659c75a6fb5fc99279a8d4e64b222d0158e77b)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index dc71da99d0..da90a538e1 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -173,15 +173,13 @@
 
 #define DSI_PHY_TST_CTRL0		0xb4
 #define PHY_TESTCLK			BIT(1)
-#define PHY_UNTESTCLK			0
 #define PHY_TESTCLR			BIT(0)
-#define PHY_UNTESTCLR			0
 
 #define DSI_PHY_TST_CTRL1		0xb8
 #define PHY_TESTEN			BIT(16)
-#define PHY_UNTESTEN			0
-#define PHY_TESTDOUT(n)			(((n) & 0xff) << 8)
-#define PHY_TESTDIN(n)			(((n) & 0xff) << 0)
+#define PHY_TESTDOUT_SHIFT		8
+#define PHY_TESTDIN_MASK		GENMASK(7, 0)
+#define PHY_TESTDIN(x)			UPDATE(x, 7, 0)
 
 #define DSI_INT_ST0			0xbc
 #define DSI_INT_ST1			0xc0
@@ -437,25 +435,79 @@ static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
-				 u8 test_data)
+static inline void testif_testclk_assert(struct dw_mipi_dsi *dsi)
 {
-	/*
-	 * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
-	 * is latched internally as the current test code. Test data is
-	 * programmed internally by rising edge on TESTCLK.
-	 */
-	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK, PHY_TESTCLK);
+	udelay(1);
+}
+
+static inline void testif_testclk_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK, 0);
+	udelay(1);
+}
+
+static inline void testif_testclr_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR, PHY_TESTCLR);
+	udelay(1);
+}
+
+static inline void testif_testclr_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR, 0);
+	udelay(1);
+}
+
+static inline void testif_testen_assert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN, PHY_TESTEN);
+	udelay(1);
+}
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) |
-					  PHY_TESTDIN(test_code));
+static inline void testif_testen_deassert(struct dw_mipi_dsi *dsi)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN, 0);
+	udelay(1);
+}
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR);
+static inline void testif_set_data(struct dw_mipi_dsi *dsi, u8 data)
+{
+	dsi_update_bits(dsi, DSI_PHY_TST_CTRL1,
+			PHY_TESTDIN_MASK, PHY_TESTDIN(data));
+	udelay(1);
+}
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) |
-					  PHY_TESTDIN(test_data));
+static inline u8 testif_get_data(struct dw_mipi_dsi *dsi)
+{
+	return dsi_read(dsi, DSI_PHY_TST_CTRL1) >> PHY_TESTDOUT_SHIFT;
+}
+
+static void testif_test_code_write(struct dw_mipi_dsi *dsi, u8 test_code)
+{
+	testif_testclk_assert(dsi);
+	testif_set_data(dsi, test_code);
+	testif_testen_assert(dsi);
+	testif_testclk_deassert(dsi);
+	testif_testen_deassert(dsi);
+}
+
+static void testif_test_data_write(struct dw_mipi_dsi *dsi, u8 test_data)
+{
+	testif_testclk_deassert(dsi);
+	testif_set_data(dsi, test_data);
+	testif_testclk_assert(dsi);
+}
+
+static void testif_write(struct dw_mipi_dsi *dsi, u8 test_code, u8 test_data)
+{
+	testif_testclr_deassert(dsi);
+	testif_test_code_write(dsi, test_code);
+	testif_test_data_write(dsi, test_data);
 
-	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+	dev_dbg(dsi->dev,
+		"test_code=0x%02x, test_data=0x%02x, monitor_data=0x%02x\n",
+		test_code, test_data, testif_get_data(dsi));
 }
 
 static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
@@ -500,35 +552,30 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 		return testdin;
 	}
 
-	dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
-					 VCO_RANGE_CON_SEL(vco) |
-					 VCO_IN_CAP_CON_LOW |
-					 REF_BIAS_CUR_SEL);
-	dw_mipi_dsi_phy_write(dsi, 0x11, CP_CURRENT_3MA);
-	dw_mipi_dsi_phy_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
-					 LPF_RESISTORS_20_KOHM);
-	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
-	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
+	testif_write(dsi, 0x10, BYPASS_VCO_RANGE | VCO_RANGE_CON_SEL(vco) |
+		     VCO_IN_CAP_CON_LOW | REF_BIAS_CUR_SEL);
+	testif_write(dsi, 0x11, CP_CURRENT_3MA);
+	testif_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
+		     LPF_RESISTORS_20_KOHM);
+	testif_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
+	testif_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
 	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
-	dw_mipi_dsi_phy_write(dsi, 0x18, val);
-	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	testif_write(dsi, 0x18, val);
+	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
 	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
-	dw_mipi_dsi_phy_write(dsi, 0x18, val);
-	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
-					 BIAS_BLOCK_ON | BANDGAP_ON);
-	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
-					 SETRD_MAX | TER_RESISTORS_ON);
-	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
-					 SETRD_MAX | POWER_MANAGE |
-					 TER_RESISTORS_ON);
-	dw_mipi_dsi_phy_write(dsi, 0x22, LOW_PROGRAM_EN |
-					 BIASEXTR_SEL(BIASEXTR_127_7));
-	dw_mipi_dsi_phy_write(dsi, 0x22, HIGH_PROGRAM_EN |
-					 BANDGAP_SEL(BANDGAP_96_10));
-	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
-	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+	testif_write(dsi, 0x18, val);
+	testif_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	testif_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
+		     BIAS_BLOCK_ON | BANDGAP_ON);
+	testif_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
+		     SETRD_MAX | TER_RESISTORS_ON);
+	testif_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
+		     SETRD_MAX | POWER_MANAGE | TER_RESISTORS_ON);
+	testif_write(dsi, 0x22, LOW_PROGRAM_EN | BIASEXTR_SEL(BIASEXTR_127_7));
+	testif_write(dsi, 0x22, HIGH_PROGRAM_EN | BANDGAP_SEL(BANDGAP_96_10));
+	testif_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
+	testif_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
+	testif_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
 
 	return 0;
 }

commit a64079e6060515ac4cb629ce776ea01940e09f07
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 17 11:16:16 2018 +0800

    configs: rk3328: delete clock-names
    
    The clock property is used when emmc initialized.
    
    Change-Id: I9b55c0f8bb91c25326abc45436cbd4d4c2516a08
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 79535c760d..7bc65c73e5 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -36,7 +36,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 5fd0655da7..dbc6b370a7 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -60,7 +60,7 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y

commit f17295bfb000464a70a0a53dad53150c804436bd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 17 11:06:15 2018 +0800

    rockchip: rk3328: update sdmmc&emmc's clocks
    
    Add the SCLK_EMMC_DRV and SCLK_EMMC_SAMPLE to clocks.
    
    Change-Id: I3c633bd973bb1f5cafb98a295ded6cfae704382d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 670b98d6fa..ea2140daaf 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -461,8 +461,9 @@
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff500000 0x0 0x4000>;
 		max-frequency = <150000000>;
-		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
-		clock-names = "biu", "ciu";
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
@@ -484,8 +485,9 @@
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff520000 0x0 0x4000>;
 		max-frequency = <150000000>;
-		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
-		clock-names = "biu", "ciu";
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";

commit 573b2cce51ff8cd905ffa4318773507ab43d92ed
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu Jan 24 10:02:16 2019 +0800

    regulator: rk8xx: add switch get/set value
    
    RK8xx switch does not need to set the voltage,
    but if dts set regulator-min-microvolt/regulator-max-microvolt,
    will cause regulator set value fail and not to enable this switch.
    So add an empty function to return success.
    
    Change-Id: Ifc3cfe24902123d7434f3f6560a8e530c03d0b2a
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 966243934e..ad1dc8b1b0 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -1105,6 +1105,22 @@ static int switch_get_suspend_enable(struct udevice *dev)
 	return ret;
 }
 
+/*
+ * RK8xx switch does not need to set the voltage,
+ * but if dts set regulator-min-microvolt/regulator-max-microvolt,
+ * will cause regulator set value fail and not to enable this switch.
+ * So add an empty function to return success.
+ */
+static int switch_get_value(struct udevice *dev)
+{
+	return 0;
+}
+
+static int switch_set_value(struct udevice *dev, int uvolt)
+{
+	return 0;
+}
+
 static int rk8xx_buck_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -1165,6 +1181,8 @@ static const struct dm_regulator_ops rk8xx_ldo_ops = {
 };
 
 static const struct dm_regulator_ops rk8xx_switch_ops = {
+	.get_value  = switch_get_value,
+	.set_value  = switch_set_value,
 	.get_enable = switch_get_enable,
 	.set_enable = switch_set_enable,
 	.set_suspend_enable = switch_set_suspend_enable,

commit 90612901101b49ac82fe948664e3e8d7dbf6695f
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Wed Jan 23 17:28:36 2019 +0800

    FROMRKLIST: common: don't set property of androidboot.storagemedia
    when CONFIG_ROCKCHIP_VENDOR_PARTITION enable
    
    Change-Id: I1dfc5c0947c6950bb63c49d9acf5e179a2d18ddd
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    (cherry picked from commit 32d460e9df027acf66e56a80b9bb91fd3d1dd28b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 00ca62e181..51f93a0c97 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -1,6 +1,4 @@
 /*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
@@ -147,6 +145,7 @@ err:
 /* Gets the storage type of the current device */
 int get_bootdev_type(void)
 {
+
 	int type = 0;
 	ulong devnum = 0;
 	char *boot_media = NULL, *devtype = NULL;
@@ -193,13 +192,19 @@ int get_bootdev_type(void)
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
 		    (type == IF_TYPE_RKNAND) ||
 		    (type == IF_TYPE_SPINAND) ||
-		    (type == IF_TYPE_SPINOR))
+		    (type == IF_TYPE_SPINOR)) {
 			snprintf(boot_options, sizeof(boot_options),
 				 "androidboot.storagemedia=%s", boot_media);
-		else
+		} else {
 			snprintf(boot_options, sizeof(boot_options),
-				 "androidboot.storagemedia=%s androidboot.mode=normal",
+				 "androidboot.mode=normal");
+			env_update("bootargs", boot_options);
+#ifndef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+			snprintf(boot_options, sizeof(boot_options),
+				 "androidboot.storagemedia=%s ",
 				 boot_media);
+#endif
+		}
 		env_update("bootargs", boot_options);
 	}
 

commit 3be4edf1f67bfe3fb9e6df3e83dfe10bc3991d4b
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Jan 25 08:44:15 2019 +0800

    Revert "FROMRKLIST: common: don't set property of androidboot.storagemedia"
    
    This reverts commit 93a7ae54026fda5b94c89631a09c887bbed7eec7.

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index fd71fbf11e..00ca62e181 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -1,4 +1,6 @@
 /*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
@@ -145,7 +147,6 @@ err:
 /* Gets the storage type of the current device */
 int get_bootdev_type(void)
 {
-
 	int type = 0;
 	ulong devnum = 0;
 	char *boot_media = NULL, *devtype = NULL;
@@ -192,18 +193,13 @@ int get_bootdev_type(void)
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
 		    (type == IF_TYPE_RKNAND) ||
 		    (type == IF_TYPE_SPINAND) ||
-		    (type == IF_TYPE_SPINOR)) {
+		    (type == IF_TYPE_SPINOR))
 			snprintf(boot_options, sizeof(boot_options),
 				 "androidboot.storagemedia=%s", boot_media);
-		} else {
-#ifndef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "androidboot.storagemedia=%s ",
+				 "androidboot.storagemedia=%s androidboot.mode=normal",
 				 boot_media);
-#endif
-			snprintf(boot_options, sizeof(boot_options),
-				 "androidboot.mode=normal");
-		}
 		env_update("bootargs", boot_options);
 	}
 

commit f36a2342cd11fdba0bd6a6c62e77f8a9e916dbe9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 19:28:38 2019 +0800

    rockchip: board: move charge display function to charge display uclass
    
    Change-Id: Ib5143d8bd9beafc585438e57216f2b7c17932859
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4f080f3e01..c864378f03 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -114,27 +114,6 @@ int fb_set_reboot_flag(void)
 }
 #endif
 
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-static int charge_display(void)
-{
-	int ret;
-	struct udevice *dev;
-
-	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
-	if (ret) {
-		if (ret != -ENODEV) {
-			debug("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
-			return ret;
-		} else {
-			debug("Can't find charge display driver\n");
-		}
-		return 0;
-	}
-
-	return charge_display_show(dev);
-}
-#endif
-
 __weak int rk_board_init(void)
 {
 	return 0;
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index 7d3f16457c..21ea45e9ea 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <power/charge_display.h>
 
-int charge_display_show(struct udevice *dev)
+static int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
 
@@ -19,6 +19,20 @@ int charge_display_show(struct udevice *dev)
 	return ops->show(dev);
 }
 
+int charge_display(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		debug("Get charge display failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	return charge_display_show(dev);
+}
+
 UCLASS_DRIVER(charge_display) = {
 	.id	= UCLASS_CHARGE_DISPLAY,
 	.name	= "charge_display",
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 302a277329..19f0efabbe 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -11,6 +11,6 @@ struct dm_charge_display_ops {
 	int (*show)(struct udevice *dev);
 };
 
-int charge_display_show(struct udevice *dev);
+int charge_display(void);
 
 #endif

commit f9f027c19eeff3104728a6304eb83a511e4cbe8c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 23 11:21:01 2019 +0800

    common: attestation key: use debug for "ca head not found"
    
    Change-Id: I2d685acbcf18fa21aad35813a23abcfe0cf465a8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/attestation_key.c b/common/attestation_key.c
index 80121a625d..0cfe2ef12e 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -268,7 +268,7 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 	}
 
 	if (!validate_ca_header(ca_headr, sizeof(ca_headr))) {
-		printf("ca head not found\n");
+		debug("ca head not found\n");
 		return ATAP_RESULT_ERROR_INVALID_HEAD;
 	}
 

commit 644e344181225f233b5aca634cfabe00858cb82c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 23 16:30:16 2019 +0800

    android: support loading android image separate
    
    This patch support loading android image separate for the
    kernel/ramdisk/second images. It is disabled when android
    AVB is enabled, because AVB need verify the full android image.
    
    It brings some benefits, mainly for saving a lot of boot time:
      - allow skip load second content when kernel dtb is enabled;
      - allow skip fdt and ramdisk relocation during bootm boot flow;
      - allow loading fdt/ramdisk to "fdt_addr_r"/"ramdisk_addr_r";
      - avoid android image too large when load to ram;
    
    Change-Id: Ia040b3031307a8a7c98b011ce038ec61fee6804a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index edfeba7b94..c4ef08fb82 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -623,6 +623,15 @@ config ANDROID_BOOT_IMAGE
 	  This enables support for booting images which use the Android
 	  image format header.
 
+config ANDROID_BOOT_IMAGE_SEPARATE
+	bool "Enable support for Android image separate loading"
+	depends on ANDROID_BOOT_IMAGE
+	default y
+	help
+	  This enables support for android image separate loading. With this support,
+	  we can load ramdisk/fdt/kernel separate and skip ramdisk and fdt relocation
+	  safely. It saves a lot of boot time.
+
 config SKIP_RELOCATE_UBOOT
 	bool "Skip U-Boot relocation"
 	help
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 6419946131..b539aef080 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -22,6 +22,7 @@
 #include <keymaster.h>
 #include <linux/libfdt_env.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <sysmem.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -331,6 +332,8 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 		printf("Booting kernel at %s with fdt at %s...\n\n\n",
 		       kernel_addr_r, fdt_addr);
 
+	sysmem_dump_check();
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;
@@ -802,7 +805,16 @@ int android_fdt_overlay_apply(void *fdt_addr)
 
 	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index);
 	if (!ret) {
+		phys_size_t fdt_size;
 		/* Must incease size before overlay */
+		fdt_size = fdt_totalsize((void *)fdt_addr) +
+				fdt_totalsize((void *)fdt_dtbo);
+		if (sysmem_free((phys_addr_t)fdt_addr))
+			goto out;
+		if (!sysmem_alloc_base("fdt(dtbo)",
+				       (phys_addr_t)fdt_addr,
+					fdt_size))
+			goto out;
 		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
 		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
 		if (!ret) {
@@ -842,8 +854,8 @@ static int load_android_image(struct blk_desc *dev_desc,
 
 	ret = android_image_load(dev_desc, &boot_part, *load_address, -1UL);
 	if (ret < 0) {
-		printf("%s: %s part load fail, ret=%d\n",
-		       __func__, boot_part.name, ret);
+		debug("%s: %s part load fail, ret=%d\n",
+		      __func__, boot_part.name, ret);
 		return ret;
 	}
 	*load_address = ret;
diff --git a/common/image-android.c b/common/image-android.c
index 60e57da1c3..3033178706 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -10,9 +10,17 @@
 #include <malloc.h>
 #include <mapmem.h>
 #include <errno.h>
+#include <boot_rkimg.h>
+#include <sysmem.h>
 #ifdef CONFIG_RKIMG_BOOTLOADER
 #include <asm/arch/resource_img.h>
 #endif
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
+#endif
+#include <optee_include/OpteeClientInterface.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -29,7 +37,7 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 	 * address as the default.
 	 *
 	 * Even though it doesn't really make a lot of sense, and it
-	 * might be valid on some platforms, we treat that adress as
+	 * might be valid on some platforms, we treat that address as
 	 * the default value for this field, and try to execute the
 	 * kernel in place in such a case.
 	 *
@@ -190,9 +198,25 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 
+/*
+ * We load ramdisk at "ramdisk_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+ * CONFIG_USING_KERNEL_DTB is enabled.
+ */
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+	ulong ramdisk_addr_r;
+
+	ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	if (!ramdisk_addr_r) {
+		printf("No Found Ramdisk Load Address.\n");
+		return -1;
+	}
+
+	*rd_data = ramdisk_addr_r;
+#else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+#endif
 	*rd_len = hdr->ramdisk_size;
 
 	printf("RAM disk load addr 0x%08lx size %u KiB\n",
@@ -209,65 +233,123 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 /*
- * If kernel dtb is enabled, it means we have read kernel dtb before do_bootm(),
- * that's: init_kernel_dtb() -> rockchip_read_dtb_file().
- * And maybe some operations(optional) are done:
- *
- * 1. apply fdt overlay;
- * 2. select fdt by adc or gpio;
- *
- * After that, we didn't update dtb at all untill run here, it's fine to
- * pass current fdt to kernel.
- *
- * This case has higher priority then the others(#elif, #else...).
- */
-#if defined(CONFIG_USING_KERNEL_DTB)
-	*rd_data = (ulong)gd->fdt_blob;
-
-/*
- * If kernel dtb is disabled, it means kernel dtb is not read before do_bootm(),
- * we need to read it from boot.img/recovery.img now.
- *
- * For rockchip AOSP firmware(CONFIG_RKIMG_BOOTLOADER), we pack resource.img in
- * second position. we need read kernel dtb by rockchip_read_dtb_file() which
- * can do the above "some operations(optional)".
+ * We load fdt at "fdt_addr_r" when CONFIG_ANDROID_BOOT_IMAGE_SEPARATE or
+ * or CONFIG_USING_KERNEL_DTB is enabled.
  */
-#elif defined(CONFIG_RKIMG_BOOTLOADER)
-	ulong fdt_addr = 0;
-	int ret;
+#if defined(CONFIG_ANDROID_BOOT_IMAGE_SEPARATE) || \
+	defined(CONFIG_USING_KERNEL_DTB)
+	ulong fdt_addr_r;
 
-	/* Get resource addr and fdt addr */
-	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr) {
+	fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr_r) {
 		printf("No Found FDT Load Address.\n");
 		return -1;
 	}
 
-	ret = rockchip_read_dtb_file((void *)fdt_addr);
-	if (ret < 0) {
-		printf("%s: failed to read dtb file, ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	*rd_data = fdt_addr;
-
-/*
- * If kernel dtb is disabled and it's not rockchip AOSP firmware, kernel dtb is
- * in second position, let't read it directly.
- */
+	*rd_data = fdt_addr_r;
 #else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+#endif
 
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
-#endif
 
 	return 0;
 }
 
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+static int android_image_load_separate(struct blk_desc *dev_desc,
+				       struct andr_img_hdr *hdr,
+				       const disk_partition_t *part,
+				       void *android_load_address)
+{
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	ulong blk_start, blk_cnt, size;
+	int ret, blk_read = 0;
+
+	if (hdr->kernel_size) {
+		size = hdr->kernel_size + hdr->page_size;
+		blk_start = part->start;
+		blk_cnt = DIV_ROUND_UP(size, dev_desc->blksz);
+		if (!sysmem_alloc_base("kernel",
+				       (phys_addr_t)android_load_address,
+				       blk_cnt * dev_desc->blksz))
+			return -ENXIO;
+
+		ret = blk_dread(dev_desc, blk_start,
+				blk_cnt, android_load_address);
+		if (ret < 0) {
+			debug("%s: read kernel failed, ret=%d\n",
+			      __func__, ret);
+			return ret;
+		}
+		blk_read += ret;
+	}
+
+	if (hdr->ramdisk_size) {
+		ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+
+		size = hdr->page_size + ALIGN(hdr->kernel_size, hdr->page_size);
+		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
+		blk_cnt = DIV_ROUND_UP(hdr->ramdisk_size, dev_desc->blksz);
+		if (!sysmem_alloc_base("ramdisk",
+				       ramdisk_addr_r,
+				       blk_cnt * dev_desc->blksz))
+			return -ENXIO;
+
+		ret = blk_dread(dev_desc, blk_start,
+				blk_cnt, (void *)ramdisk_addr_r);
+		if (ret < 0) {
+			debug("%s: read ramdisk failed, ret=%d\n",
+			      __func__, ret);
+			return ret;
+		}
+		blk_read += ret;
+	}
+
+	if ((gd->fdt_blob != (void *)fdt_addr_r) && hdr->second_size) {
+#ifdef CONFIG_RKIMG_BOOTLOADER
+		/* Rockchip AOSP, resource.img is in second position */
+		ulong fdt_size;
+
+		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
+		if (fdt_size < 0) {
+			printf("%s: read fdt failed\n", __func__);
+			return ret;
+		}
+
+		blk_read += DIV_ROUND_UP(fdt_size, dev_desc->blksz);
+#else
+		/* Standard AOSP, dtb is in second position */
+		ulong blk_start, blk_cnt;
+
+		size = hdr->page_size +
+		       ALIGN(hdr->kernel_size, hdr->page_size) +
+		       ALIGN(hdr->ramdisk_size, hdr->page_size);
+		blk_start = part->start + DIV_ROUND_UP(size, dev_desc->blksz);
+		blk_cnt = DIV_ROUND_UP(hdr->second_size, dev_desc->blksz);
+		if (!sysmem_alloc_base("fdt(AOSP)",
+				       fdt_addr_r,
+				       blk_cnt * dev_desc->blksz))
+			return -ENXIO;
+
+		ret = blk_dread(dev_desc, blk_start, blk_cnt, (void *)fdt_addr_r);
+		if (ret < 0) {
+			debug("%s: read dtb failed, ret=%d\n", __func__, ret);
+			return ret;
+		}
+
+		blk_read += blk_cnt;
+#endif /* CONFIG_RKIMG_BOOTLOADER */
+	}
+
+	return blk_read;
+}
+#endif /* CONFIG_ANDROID_BOOT_IMAGE_SEPARATE */
+
 long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
 			unsigned long load_address,
@@ -279,6 +361,7 @@ long android_image_load(struct blk_desc *dev_desc,
 	u32 kload_addr;
 	u32 blkcnt;
 	struct andr_img_hdr *hdr;
+	__maybe_unused uint8_t vboot_flag = 0;
 
 	if (max_size < part_info->blksz)
 		return -1;
@@ -333,8 +416,43 @@ long android_image_load(struct blk_desc *dev_desc,
 		} else {
 			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
 			      blk_cnt, load_address);
-			blk_read = blk_dread(dev_desc, part_info->start,
-					     blk_cnt, buf);
+
+#if defined(CONFIG_ANDROID_AVB) && defined(CONFIG_OPTEE_CLIENT)
+			if (trusty_read_vbootkey_enable_flag(&vboot_flag))
+				return -1;
+#endif
+
+#ifdef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
+			if (!vboot_flag) {
+				char *fdt_high = env_get("fdt_high");
+				char *ramdisk_high = env_get("initrd_high");
+
+				blk_read =
+				android_image_load_separate(dev_desc, hdr,
+							    part_info, buf);
+				if (blk_read > 0) {
+					if (!fdt_high) {
+						env_set_hex("fdt_high", -1UL);
+						printf("Fdt ");
+					}
+					if (!ramdisk_high) {
+						env_set_hex("initrd_high", -1UL);
+						printf("Ramdisk ");
+					}
+					if (!fdt_high || !ramdisk_high)
+						printf("skip relocation\n");
+				}
+			} else
+#endif
+			{
+				if (!sysmem_alloc_base("android",
+						       (phys_addr_t)buf,
+							blk_cnt * part_info->blksz))
+					return -ENXIO;
+
+				blk_read = blk_dread(dev_desc, part_info->start,
+						     blk_cnt, buf);
+			}
 		}
 
 		/*
@@ -354,10 +472,16 @@ long android_image_load(struct blk_desc *dev_desc,
 	free(hdr);
 	unmap_sysmem(buf);
 
+#ifndef CONFIG_ANDROID_BOOT_IMAGE_SEPARATE
 	debug("%lu blocks read: %s\n",
 	      blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
 	if (blk_read != blk_cnt)
 		return -1;
+#else
+	debug("%lu blocks read\n", blk_read);
+	if (blk_read < 0)
+		return blk_read;
+#endif
 
 	return load_address;
 }

commit 2280fbdd62b5f8fb7a4e36053410e07d90a9a3cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 09:54:48 2019 +0800

    rockchip: boot_rkimg: import sysmem to alloc image buffer
    
    sysmem avoids memory block overlap with each other.
    
    Change-Id: I7c705c7860a7c88b0d3672b6b4edb8cb8334654d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index f5c830358e..d6326ae933 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -15,6 +15,7 @@
 #include <asm/arch/boot_mode.h>
 #include <asm/io.h>
 #include <part.h>
+#include <sysmem.h>
 
 #define TAG_KERNEL			0x4C4E524B
 
@@ -92,6 +93,7 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 			       void *dst)
 {
 	struct rockchip_image *img;
+	const char *name;
 	int header_len = 8;
 	int cnt;
 	int ret;
@@ -99,6 +101,14 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	u32 crc32;
 #endif
 
+	if (!strcmp((char *)part_info->name, "kernel"))
+		name = "kernel";
+	else if (!strcmp((char *)part_info->name, "boot") ||
+		 !strcmp((char *)part_info->name, "recovery"))
+		name = "ramdisk";
+	else
+		name = NULL;
+
 	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!img) {
 		printf("out of memory\n");
@@ -118,12 +128,17 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 		goto err;
 	}
 
-	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
 	/*
 	 * read the rest blks
 	 * total size  = image size + 8 bytes header + 4 bytes crc32
 	 */
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	if (!sysmem_alloc_base(name, (phys_addr_t)dst, cnt * dev_desc->blksz)) {
+		ret = -ENXIO;
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
 	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
 			dst + RK_BLK_SIZE - header_len);
 	if (ret != (cnt - 1)) {
@@ -466,6 +481,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("fdt	 @ 0x%08lx (0x%08x)\n", fdt_addr_r, fdt_totalsize(fdt_addr_r));
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
+
+	sysmem_dump_check();
+
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",

commit 98662298415ad4c67e6cca7d1d6270167eecb26a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 16 10:02:00 2019 +0800

    rockchip: boot_rkimg: add descrption for reloading kernel dtb
    
    "gd->fdt_blob != (void *)fdt_addr_r" makes users confused, let's
    add some descrption.
    
    Change-Id: I3ffe6c26892e99af4183eebcfb3c27ed1bdea38a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 923e77a021..f5c830358e 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -445,6 +445,15 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		ramdisk_size = 0;
 	}
 
+	/*
+	 * When it happens ?
+	 *
+	 * 1. CONFIG_USING_KERNEL_DTB is disabled, so we should load kenrel dtb;
+	 *
+	 * 2. Even CONFIG_USING_KERNEL_DTB is enabled, if we load kernel dtb
+	 *    failed due to some reason before here, and then we fix it and run
+	 *    cmd "bootrkp" try to boot system again, we should reload fdt here.
+	 */
 	if (gd->fdt_blob != (void *)fdt_addr_r) {
 		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
 		if (fdt_size < 0) {

commit 6bc040a32c1f40b1a49e9f696883c359d6a5f897
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 23 15:13:26 2019 +0800

    rockchip: resource: import sysmem to alloc fdt buffer
    
    sysmem avoids memory block overlap with each other.
    
    Change-Id: I0013c3d05c69e19286cf1c76f936a17eaab1db49
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 6d9d434a2f..27be5249a5 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -7,6 +7,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <malloc.h>
+#include <sysmem.h>
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
 #include <boot_rkimg.h>
@@ -615,7 +616,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	struct resource_file *file;
 	struct list_head *node;
 	char *dtb_name = DTB_FILE;
-	int ret;
+	int ret, size;
 
 	if (list_empty(&entrys_head))
 		init_resource_list(NULL);
@@ -639,6 +640,14 @@ int rockchip_read_dtb_file(void *fdt_addr)
 
 	printf("DTB: %s\n", dtb_name);
 
+	size = rockchip_get_resource_file_size((void *)fdt_addr, dtb_name);
+	if (size < 0)
+		return size;
+
+	if (!sysmem_alloc_base("fdt", (phys_addr_t)fdt_addr,
+			       ALIGN(size, RK_BLK_SIZE)))
+		return -ENOMEM;
+
 	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
 	if (ret < 0)
 		return ret;

commit 4ec36d68392b3847dcaa1fdc6549e67436fa248b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 11:07:46 2019 +0800

    rockchip: resource: add interface to get resource file size
    
    clean up code and add comment for other interfaces.
    
    Change-Id: Ibc64978d8db595c4fe76432faca77cdad9c949e6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index b90ae272de..ca3399087d 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -8,15 +8,43 @@
 #define __RESC_IMG_H_
 
 /*
- * read file from resource partition
- * @buf: destination buf to store file data;
+ * rockchip_read_resource_file - read file from resource partition
+ *
+ * @buf: destination buf to store file data
  * @name: file name
  * @offset: blocks offset in the file, 1 block = 512 bytes
  * @len: the size(by bytes) of file to read.
+ *
+ * return negative num on failed, otherwise the file size
+ */
+int rockchip_read_resource_file(void *buf, const char *name, int offset, int len);
+
+/*
+ * rockchip_get_resource_file_offset() - read file offset of partition
+ *
+ * @resc_img_hdr: resource file hdr
+ * @name: file name
+ *
+ * @return negative on error, otherwise file offset
+ */
+int rockchip_get_resource_file_offset(void *resc_hdr, const char *name);
+
+/*
+ * rockchip_get_resource_file_size() - read file size
+ *
+ * @resc_img_hdr: resource file hdr
+ * @name: file name
+ *
+ * @return negative on error, otherwise file size
  */
-int rockchip_read_resource_file(void *buf, const char *name,
-				int offset, int len);
-int rockchip_get_resource_file(void *buf, const char *name);
+int rockchip_get_resource_file_size(void *resc_hdr, const char *name);
 
+/*
+ * rockchip_get_resource_file_size() - read file size
+ *
+ * @fdt_addr: destination buf to store dtb file
+ *
+ * @return 0 on success, othwise on error
+ */
 int rockchip_read_dtb_file(void *fdt_addr);
 #endif
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 8f08462820..6d9d434a2f 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -326,15 +326,28 @@ static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
 	return NULL;
 }
 
-int rockchip_get_resource_file(void *buf, const char *name)
+int rockchip_get_resource_file_offset(void *resc_hdr, const char *name)
 {
 	struct resource_file *file;
 
-	file = get_file_info(buf, name);
+	file = get_file_info(resc_hdr, name);
+	if (!file)
+		return -ENFILE;
 
 	return file->f_offset;
 }
 
+int rockchip_get_resource_file_size(void *resc_hdr, const char *name)
+{
+	struct resource_file *file;
+
+	file = get_file_info(resc_hdr, name);
+	if (!file)
+		return -ENFILE;
+
+	return file->f_size;
+}
+
 /*
  * read file from resource partition
  * @buf: destination buf to store file data;

commit 6929f85b1356ec8ebab788a0ddc6370ab37bb438
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:05:14 2019 +0800

    rockchip: board: implement board_sysmem_reserve()
    
    sysmem provides a mechanism to avoid memory block overlap with
    each other.
    
    Change-Id: I84796f4fd5b06283ca23e0ec9da9d0421701a957
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9298efabc7..4f080f3e01 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -9,6 +9,7 @@
 #include <debug_uart.h>
 #include <ram.h>
 #include <syscon.h>
+#include <sysmem.h>
 #include <asm/io.h>
 #include <asm/arch/vendor.h>
 #include <misc.h>
@@ -17,6 +18,7 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/rk_atags.h>
+#include <asm/arch/param.h>
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 #include <power/charge_display.h>
 #endif
@@ -199,6 +201,11 @@ int init_kernel_dtb(void)
 
 	gd->fdt_blob = (void *)fdt_addr;
 
+	/* Reserve 'reserved-memory' */
+	ret = boot_fdt_add_sysmem_rsv_regions((void *)gd->fdt_blob);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 #endif
@@ -343,6 +350,34 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
+#ifdef CONFIG_SYSMEM
+int board_sysmem_reserve(struct sysmem *sysmem)
+{
+	struct sysmem_property prop;
+	int ret;
+
+	/* ATF */
+	prop = param_parse_atf_mem();
+	ret = sysmem_reserve(prop.name, prop.base, prop.size);
+	if (ret)
+		return ret;
+
+	/* PSTORE/ATAGS/SHM */
+	prop = param_parse_common_resv_mem();
+	ret = sysmem_reserve(prop.name, prop.base, prop.size);
+	if (ret)
+		return ret;
+
+	/* OP-TEE */
+	prop = param_parse_optee_mem();
+	ret = sysmem_reserve(prop.name, prop.base, prop.size);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
     defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)

commit 4892a977d76d1adda3469bf654890b840252287f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:48:19 2019 +0800

    rockchip: board: fix compile warning when atags is disabled
    
    Change-Id: I494f06a715bf7b40c7f56a5ce3aabe1c63ee9bb0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 230a1e2302..9298efabc7 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -282,8 +282,10 @@ int board_fdt_fixup(void *blob)
 
 void board_quiesce_devices(void)
 {
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	/* Destroy atags makes next warm boot safer */
 	atags_destroy();
+#endif
 }
 
 void enable_caches(void)
@@ -341,7 +343,8 @@ void board_lmb_reserve(struct lmb *lmb)
 }
 #endif
 
-#ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \
+    defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS)
 int board_init_f_init_serial(void)
 {
 	struct tag *t = atags_get_tag(ATAG_SERIAL);

commit 7c015044fd16e963ffed4228855ddd1329573c49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:47:31 2019 +0800

    rockchip: boot_mode: use param_parse_bootdev() to get bootdev
    
    Change-Id: I735471aa89502acfc647dbeeb4d487f1001ccad7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 3261d0f65c..072e69e48e 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,7 +8,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
-#include <asm/arch/rk_atags.h>
+#include <asm/arch/param.h>
 #include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
@@ -98,77 +98,29 @@ void boot_devtype_init(void)
 	if (done)
 		return;
 
-	/*
-	 * New way: get bootdev from preloader atags info.
-	 */
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	struct tag *t;
-
-	t = atags_get_tag(ATAG_BOOTDEV);
-	if (t) {
+	ret = param_parse_bootdev(&devtype, &devnum);
+	if (!ret) {
 		atags_en = 1;
-		switch (t->u.bootdev.devtype) {
-		case BOOT_TYPE_EMMC:
-			devtype = "mmc";
-			devnum = "0";
-			break;
-		case BOOT_TYPE_SD0:
-		case BOOT_TYPE_SD1:
-			devtype = "mmc";
-			devnum = "1";
-			break;
-		case BOOT_TYPE_NAND:
-			devtype = "rknand";
-			devnum = "0";
-			break;
-		case BOOT_TYPE_SPI_NAND:
-			devtype = "spinand";
-			devnum = "0";
-			break;
-		case BOOT_TYPE_SPI_NOR:
-			devtype = "spinor";
-			devnum = "1";
-			break;
-		case BOOT_TYPE_RAM:
-			devtype = "ramdisk";
-			devnum = "0";
-			break;
-		default:
-			printf("Unknown bootdev type: 0x%x\n",
-			       t->u.bootdev.devtype);
-			goto fallback;
-		}
-	}
-
-	debug("%s: Get bootdev from atags: %s %s\n", __func__, devtype, devnum);
-
-	if (devtype && devnum) {
 		env_set("devtype", devtype);
 		env_set("devnum", devnum);
 #ifdef CONFIG_DM_MMC
 		if (!strcmp("mmc", devtype))
 			mmc_initialize(gd->bd);
 #endif
-		goto finish;
-	}
-#endif
-
-	/*
-	 * Legacy way: get bootdev by going through all boot media.
-	 */
-fallback:
+	} else {
 #ifdef CONFIG_DM_MMC
-	mmc_initialize(gd->bd);
+		mmc_initialize(gd->bd);
 #endif
-	ret = run_command_list(devtype_num_set, -1, 0);
-	if (ret) {
-		/* Set default dev type/num if command not valid */
-		devtype = "mmc";
-		devnum = "0";
-		env_set("devtype", devtype);
-		env_set("devnum", devnum);
+		ret = run_command_list(devtype_num_set, -1, 0);
+		if (ret) {
+			/* Set default dev type/num if command not valid */
+			devtype = "mmc";
+			devnum = "0";
+			env_set("devtype", devtype);
+			env_set("devnum", devnum);
+		}
 	}
-finish:
+
 	done = 1;
 	printf("Bootdev%s: %s %s\n", atags_en ? "(atags)" : "",
 	       env_get("devtype"), env_get("devnum"));

commit f0a9765fb1ddd7f7deb7e1309ff57b3695f39e4f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:50:49 2019 +0800

    rockchip: sdram: use common interface to get atf/optee memory info.
    
    using param_parse_atf_mem() and param_parse_optee_mem().
    
    Change-Id: I0d42f80ea4bac61efdc38a0be97c3f416ce90622
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index e85e5b4130..b0e1e4cf6e 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
+#include <asm/arch/param.h>
 #include <asm/arch/rk_atags.h>
 #include <asm/arch/sdram_common.h>
 #include <dm/uclass-internal.h>
@@ -16,113 +17,26 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
 #define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
 
-struct tos_parameter_t {
-	u32 version;
-	u32 checksum;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}tee_mem;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}drm_mem;
-	s64 reserve[8];
-};
-
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
-static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
-{
-	uint16_t i;
-	uint16_t checksum = 0;
-
-	for (i = 0; i < len; i++) {
-		if (i % 2)
-			checksum += buf[i] << 8;
-		else
-			checksum += buf[i];
-	}
-	checksum = ~checksum;
-
-	return checksum;
-}
 
 #define SDRAM_OFFSET(offset)	(CONFIG_SYS_SDRAM_BASE + (offset))
 #define NOT_INITIAL		-1
 static int __dram_init_banksize(int resv_tee)
 {
+	struct sysmem_property prop;
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
-	u64 tos_addr = 0, atf_addr = 0;
-	u64 tos_size = 0, atf_size = 0;
-	u32 checksum, i;
-	int idx = NOT_INITIAL;
-	struct tos_parameter_t *tos_parameter;
-#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
-	struct tag *t = NULL;
-
-	/*
-	 * Get memory region of ATF
-	 *
-	 * 1. New way: atags info;
-	 * 2. Leagcy way: 2MB size and start from ddr 0x0 offset;
-	 */
-	t = atags_get_tag(ATAG_ATF_MEM);
-	if (t && t->u.atf_mem.size) {
-		atf_addr = t->u.atf_mem.phy_addr;
-		atf_size = t->u.atf_mem.size;
-		/* Sanity */
-		if (atf_addr + atf_size > SDRAM_OFFSET(SZ_1M)) {
-			printf("%s: ATF reserved region is not within 0-1MB offset(0x%08llx-0x%08llx)!\n",
-			       __func__, atf_addr, atf_addr + atf_size);
-			return -EINVAL;
-		}
-	}
-
-	/*
-	 * Get memory region of OP-TEE
-	 *
-	 * 1. New way: atags info;
-	 * 2. Leagcy way: info in ddr 34M offset;
-	 */
-	t = atags_get_tag(ATAG_TOS_MEM);
-	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
-		tos_addr = t->u.tos_mem.tee_mem.phy_addr;
-		tos_size = t->u.tos_mem.tee_mem.size;
-	}
-#endif
-
-	/* Legacy */
-	if (!atf_size) {
-		if (IS_ENABLED(CONFIG_ARM64) ||
-		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
-			atf_addr = SDRAM_OFFSET(0);
-			atf_size = SZ_1M;
-		}
-	}
-
-	/* Legacy */
-	if (!tos_size) {
-		tos_parameter =
-		(struct tos_parameter_t *)(SDRAM_OFFSET(TRUST_PARAMETER_OFFSET));
-		checksum =
-		trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				sizeof(struct tos_parameter_t) - 8);
-		if ((checksum == tos_parameter->checksum) &&
-		    (tos_parameter->tee_mem.flags == 1)) {
-			tos_addr = tos_parameter->tee_mem.phy_addr;
-			tos_size = tos_parameter->tee_mem.size;
-			gd->flags |= GD_FLG_BL32_ENABLED;
-		}
-	}
-
-	debug("ATF: 0x%llx - 0x%llx\n", atf_addr, atf_addr + atf_size);
-	debug("TOS: 0x%llx - 0x%llx\n", tos_addr, tos_addr + tos_size);
+	u64 tos_addr, atf_addr;
+	u64 tos_size, atf_size;
+	int i, idx = NOT_INITIAL;
+
+	prop = param_parse_atf_mem();
+	atf_addr = prop.base;
+	atf_size = prop.size;
+	prop = param_parse_optee_mem();
+	tos_addr = prop.base;
+	tos_size = prop.size;
 
 	/*
 	 * Reserve region for ATF bl31

commit dbf8423e3707ad742e7c65cc402e8a6c8972a9df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 18:59:41 2019 +0800

    rockchip: add platform param parse interface to param.c
    
    parse: atf/optee/bootdev and common reserved memory.
    
    Change-Id: I829eb42370b217e567cdafe03de4dab6063aa251
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/param.h b/arch/arm/include/asm/arch-rockchip/param.h
new file mode 100644
index 0000000000..66ba2ac22e
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/param.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_PARAM_H_
+#define __ROCKCHIP_PARAM_H_
+
+#include <sysmem.h>
+
+/**
+ * param_parse_atf_mem() - Parse atf memory region
+ *
+ * @return sysmem_property structure which contains base and size info.
+ */
+struct sysmem_property param_parse_atf_mem(void);
+
+/**
+ * param_parse_atf_mem() - Parse op-tee memory region
+ *
+ * @return sysmem_property structure which contains base and size info.
+ */
+struct sysmem_property param_parse_optee_mem(void);
+
+/**
+ * param_parse_atf_mem() - Parse platform common reserved memory region
+ *
+ * @return sysmem_property structure which contains base and size info.
+ */
+struct sysmem_property param_parse_common_resv_mem(void);
+
+/**
+ * param_parse_bootdev() - Parse boot device info.
+ *
+ * @devtype: out data to store dev type
+ * @devnum: out data to store dev number
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int param_parse_bootdev(char **devtype, char **devtnum);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 98351b7ac6..33618ae6ca 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
 endif
 
+obj-$(CONFIG_$(SPL_TPL_)RAM) += param.o
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
 obj-$(CONFIG_ROCKCHIP_PX30) += px30/
diff --git a/arch/arm/mach-rockchip/param.c b/arch/arm/mach-rockchip/param.c
new file mode 100644
index 0000000000..148899298e
--- /dev/null
+++ b/arch/arm/mach-rockchip/param.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/rk_atags.h>
+#include <asm/arch/param.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SDRAM_OFFSET(offset)		(CONFIG_SYS_SDRAM_BASE + (offset))
+#define PARAM_DRAM_INFO_OFFSET		(SZ_32M)
+#define PARAM_OPTEE_INFO_OFFSET		(SZ_32M + SZ_2M)
+
+struct tos_param_t {
+	u32 version;
+	u32 checksum;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	} tee_mem;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	} drm_mem;
+	s64 reserve[8];
+};
+
+static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
+{
+	uint16_t i, checksum = 0;
+
+	for (i = 0; i < len; i++) {
+		if (i % 2)
+			checksum += buf[i] << 8;
+		else
+			checksum += buf[i];
+	}
+	checksum = ~checksum;
+
+	return checksum;
+}
+
+struct sysmem_property param_parse_atf_mem(void)
+{
+	struct sysmem_property prop;
+
+	prop.name = "ATF";
+	prop.base = 0;
+	prop.size = 0;
+
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+
+	/*
+	 * Get memory region of ATF
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: 2MB size and start from ddr 0x0 offset;
+	 */
+	t = atags_get_tag(ATAG_ATF_MEM);
+	if (t && t->u.atf_mem.size) {
+		prop.base = t->u.atf_mem.phy_addr;
+		prop.size = t->u.atf_mem.size;
+		/* Sanity */
+		if (prop.base + prop.size > SDRAM_OFFSET(SZ_1M)) {
+			printf("%s: ATF reserved region is not within 0-1MB "
+			       "offset(0x%08llx-0x%08llx)!\n",
+			       __func__, (u64)prop.base, (u64)prop.base + prop.size);
+			return prop;
+		}
+	}
+#endif
+
+	/* Legacy */
+	if (!prop.size) {
+		if (IS_ENABLED(CONFIG_ARM64) ||
+		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
+			prop.base = SDRAM_OFFSET(0);
+			prop.size = SZ_1M;
+		}
+	}
+
+	debug("ATF: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+
+	return prop;
+}
+
+struct sysmem_property param_parse_optee_mem(void)
+{
+	struct tos_param_t *tos_parameter;
+	struct sysmem_property prop;
+	u32 checksum;
+
+	prop.name = "OP-TEE";
+	prop.base = 0;
+	prop.size = 0;
+
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+
+	/*
+	 * Get memory region of OP-TEE
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: info in ddr 34M offset;
+	 */
+	t = atags_get_tag(ATAG_TOS_MEM);
+	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
+		prop.base = t->u.tos_mem.tee_mem.phy_addr;
+		prop.size = t->u.tos_mem.tee_mem.size;
+	}
+#endif
+
+	/* Legacy */
+	if (!prop.size) {
+		tos_parameter =
+		(struct tos_param_t *)(SDRAM_OFFSET(PARAM_OPTEE_INFO_OFFSET));
+		checksum =
+		trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+			       sizeof(struct tos_param_t) - 8);
+		if ((checksum == tos_parameter->checksum) &&
+		    (tos_parameter->tee_mem.flags == 1)) {
+			prop.base = tos_parameter->tee_mem.phy_addr;
+			prop.size = tos_parameter->tee_mem.size;
+			gd->flags |= GD_FLG_BL32_ENABLED;
+		}
+	}
+
+	debug("TOS: 0x%llx - 0x%llx\n", (u64)prop.base, (u64)prop.base + prop.size);
+
+	return prop;
+}
+
+struct sysmem_property param_parse_common_resv_mem(void)
+{
+	struct sysmem_property prop;
+
+	prop.name = "PSTORE/ATAGS/SHM";
+	prop.base = SDRAM_OFFSET(SZ_1M);
+	prop.size = SZ_1M;
+
+	return prop;
+}
+
+int param_parse_bootdev(char **devtype, char **devnum)
+{
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_BOOTDEV);
+	if (t) {
+		switch (t->u.bootdev.devtype) {
+		case BOOT_TYPE_EMMC:
+			*devtype = "mmc";
+			*devnum = "0";
+			break;
+		case BOOT_TYPE_SD0:
+		case BOOT_TYPE_SD1:
+			*devtype = "mmc";
+			*devnum = "1";
+			break;
+		case BOOT_TYPE_NAND:
+			*devtype = "rknand";
+			*devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NAND:
+			*devtype = "spinand";
+			*devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NOR:
+			*devtype = "spinor";
+			*devnum = "1";
+			break;
+		case BOOT_TYPE_RAM:
+			*devtype = "ramdisk";
+			*devnum = "0";
+			break;
+		default:
+			printf("Unknown bootdev type: 0x%x\n",
+			       t->u.bootdev.devtype);
+			return -EINVAL;
+		}
+
+		return 0;
+	}
+#endif
+
+	return -ENOSYS;
+}

commit a384e3f1db7b79dabd230c03da4b4813d8e92ac6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 19:15:47 2019 +0800

    common: image-fdt: add boot_fdt_add_sysmem_rsv_regions()
    
    It reserves fdt reserved memory for sysmem.
    
    Change-Id: I7ce1be9bd25a3609bc6dabdc265addbd2571076c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index c092675f4a..6bdbe6c902 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -17,6 +17,7 @@
 #include <linux/libfdt.h>
 #include <mapmem.h>
 #include <asm/io.h>
+#include <sysmem.h>
 
 #ifndef CONFIG_SYS_FDT_PAD
 #define CONFIG_SYS_FDT_PAD 0x3000
@@ -121,6 +122,65 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 	}
 }
 
+#ifdef CONFIG_SYSMEM
+/**
+ * boot_fdt_add_mem_rsv_regions - Mark the memreserve sections as unusable
+ * @sysmem: pointer to sysmem handle, will be used for memory mgmt
+ * @fdt_blob: pointer to fdt blob base address
+ */
+int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob)
+{
+	uint64_t addr, size;
+	int i, total;
+	int rsv_offset, offset;
+	fdt_size_t rsv_size;
+	fdt_addr_t rsv_addr;
+	static int rsv_done;
+	char resvname[32];
+	int ret;
+
+	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
+		return -EINVAL;
+
+	rsv_done = 1;
+
+	total = fdt_num_mem_rsv(fdt_blob);
+	for (i = 0; i < total; i++) {
+		if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
+			continue;
+		debug("   sysmem: reserving fdt memory region: addr=%llx size=%llx\n",
+		      (unsigned long long)addr, (unsigned long long)size);
+		sprintf(resvname, "fdt-memory-reserved%d", i);
+		ret = sysmem_reserve(resvname, addr, size);
+		if (ret)
+			return ret;
+	}
+
+	rsv_offset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory");
+	if (rsv_offset == -FDT_ERR_NOTFOUND)
+		return -EINVAL;
+
+	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
+	     offset >= 0;
+	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
+							      "reg", 0,
+							      &rsv_size, false);
+		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_size)
+			continue;
+		debug("  sysmem: 'reserved-memory' %s: addr=%llx size=%llx\n",
+		      fdt_get_name(fdt_blob, offset, NULL),
+		      (unsigned long long)rsv_addr, (unsigned long long)rsv_size);
+		ret = sysmem_reserve(fdt_get_name(fdt_blob, offset, NULL),
+				     rsv_addr, rsv_size);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+#endif
+
 /**
  * boot_relocate_fdt - relocate flat device tree
  * @lmb: pointer to lmb handle, will be used for memory mgmt
diff --git a/include/image.h b/include/image.h
index 7b2e314974..8daffcceee 100644
--- a/include/image.h
+++ b/include/image.h
@@ -691,6 +691,9 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 		 bootm_headers_t *images,
 		 char **of_flat_tree, ulong *of_size);
 void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob);
+#ifdef CONFIG_SYSMEM
+int boot_fdt_add_sysmem_rsv_regions(void *fdt_blob);
+#endif
 int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size);
 
 int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len,

commit 322222b25318f2f78f2c7dcf06f369f2fdbeacac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 10:59:49 2019 +0800

    common: board_r: add sysmem init
    
    setup right after malloc init done.
    
    Change-Id: I6dbf55d825d0b03ed2cc64f2dab0a7331ce56228
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 006c5d6781..f8db94c9af 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -55,6 +55,7 @@
 #include <linux/compiler.h>
 #include <linux/err.h>
 #include <efi_loader.h>
+#include <sysmem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -766,6 +767,9 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 	initr_barrier,
 	initr_malloc,
+#ifdef CONFIG_SYSMEM
+	sysmem_init,		/* After malloc setup */
+#endif
 	log_init,
 	initr_bootstage,	/* Needs malloc() but has its own timer */
 	initr_console_record,

commit ffa8f8b76ea89ab65082d036dfb58c7fb136d861
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Jan 13 17:56:44 2019 +0800

    lib: introduce sysmem for permanent memory management
    
    U-Boot provides MALLOC for runtime temporary memory management and
    LMB for bootm memory management. There is not a mechanism for permanent
    memory management. so that the memory blocks are easy to overlap with
    each other.
    
    What does permanent memory mean ?
     - The memory can't be touched by U-Boot(ATF/OPTEE/SHM/kernel-reserved, etc);
     - The memory occupied even in kernel, such as some firmware load buffer;
    
    This patch introduces sysmem to do permanent memory management, which
    implements base on LMB. It provides memory block (pool):
     - init;
     - add;
     - alloc;
     - free;
     - reserve;
     - stat;
     - overflow check;
    
    Here is an example for RK3399 sysmem boot stat(assume the "fdt" region is Overflow)
    called by sysmem_dump_all():
    
    sysmem_dump_all:
        ------------------------------------------------------
        memory.rgn[0].base     = 0x00000000
                     .size     = 0x00000000
        memory.rgn[1].base     = 0x00200000
                     .size     = 0x08200000
        memory.rgn[2].base     = 0x0a200000
                     .size     = 0x75e00000
    
        memory.total           = 0x7e000000 (2016 MiB. 0 KiB)
        ------------------------------------------------------
        reserved.rgn[0].name   = "ATF"
                       .base   = 0x00000000
                       .size   = 0x00100000
        reserved.rgn[1].name   = "PSTORE/ATAGS/SHM"
                       .base   = 0x00100000
                       .size   = 0x00100000
        reserved.rgn[2].name   = "OP-TEE"
                       .base   = 0x08400000
                       .size   = 0x01e00000
        reserved.rgn[3].name   = "U-Boot"
                       .base   = 0x71be03c0
                       .size   = 0x0e41fc40
        reserved.rgn[4].name   = "secure-memory@20000000"
                       .base   = 0x20000000
                       .size   = 0x10000000
    
        reserved.total         = 0x2041fc40 (516 MiB. 127 KiB)
        ------------------------------------------------------
        allocated.rgn[0].name  = "fdt"      (Overflow)
                        .base  = 0x01f00000
                        .size  = 0x00009704
        allocated.rgn[1].name  = "kernel"
                        .base  = 0x0027c000
                        .size  = 0x0129da04
        allocated.rgn[2].name  = "ramdisk"
                        .base  = 0x0a200000
                        .size  = 0x001e6c04
    
        allocated.total        = 0x0148dd0c (20 MiB. 567 KiB)
        ------------------------------------------------------
        LMB.reserved[0].base   = 0x00000000
                       .size   = 0x00200000
        LMB.reserved[1].base   = 0x0027c000
                       .size   = 0x0129da04
        LMB.reserved[2].base   = 0x01f00000
                       .size   = 0x00009704
        LMB.reserved[3].base   = 0x08400000
                       .size   = 0x01fe6c04
        LMB.reserved[4].base   = 0x20000000
                       .size   = 0x10000000
        LMB.reserved[5].base   = 0x71be03c0
                       .size   = 0x0e41fc40
    
        reserved.core.total    = 0x218ad94c (536 MiB. 694 KiB)
        ------------------------------------------------------
    
    Change-Id: If63b7abed2cdd3c054719511fcceed733ddf606d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/sysmem.h b/include/sysmem.h
new file mode 100644
index 0000000000..308b8e2653
--- /dev/null
+++ b/include/sysmem.h
@@ -0,0 +1,148 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _SYSMEM_H
+#define _SYSMEM_H
+
+#include <asm/types.h>
+
+#define	MAX_SYSMEM_REGIONS		64
+
+#undef	MAX_LMB_REGIONS
+#define	MAX_LMB_REGIONS			MAX_SYSMEM_REGIONS
+
+struct sysmem_property {
+	const char *name;
+	phys_addr_t base;
+	phys_size_t size;
+	struct list_head node;
+};
+
+struct sysmem {
+	struct lmb lmb;
+	struct list_head allocated_head;
+	struct list_head reserved_head;
+	ulong allocated_cnt;
+	bool has_init;
+};
+
+/**
+ * sysmem_init() - Sysmem initialization
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_init(void);
+
+/**
+ * sysmem_add() - Add sysmem region
+ *
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_add(phys_addr_t base, phys_size_t size);
+
+/**
+ * sysmem_reserve() - Reserve sysmem region
+ *
+ * @name: region name
+ * @base: region base address
+ * @size: region size
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size);
+
+/**
+ * sysmem_alloc() - Alloc sysmem region at anywhere
+ *
+ * @name: region name
+ * @size: region size
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc(const char *name, phys_size_t size);
+
+/**
+ * sysmem_alloc_align() - Alloc sysmem region at anywhere with addr align down
+ *
+ * @name: region name
+ * @size: region size
+ * @align: region base address align (down)
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align);
+
+/**
+ * sysmem_alloc_base() - Alloc sysmem region at the expect addr
+ *
+ * @name: region name
+ * @base: region base
+ * @size: region size
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size);
+
+/**
+ * sysmem_alloc_align_base() - Alloc sysmem region at the expect addr with align down
+ *
+ * @name: region name
+ * @base: region base
+ * @size: region size
+ * @align: region base address align (down)
+ *
+ * @return NULL on error, otherwise the allocated region address ptr
+ */
+void *sysmem_alloc_align_base(const char *name, phys_addr_t base,
+			      phys_size_t size, ulong align);
+
+/**
+ * sysmem_free() - Free sysmem region
+ *
+ * @base: region base
+ *
+ * @return 0 on success, otherwise error
+ */
+int sysmem_free(phys_addr_t base);
+
+/**
+ * sysmem_check() - Check sysmem regions
+ *
+ * @return 0 on okay, otherwise something wrong
+ */
+int sysmem_check(void);
+
+/**
+ * sysmem_dump_all() - Dump all sysmem stat
+ */
+void sysmem_dump(void);
+
+/**
+ * sysmem_dump_check() - Dump all sysmem stat and check overflow
+ */
+int sysmem_dump_check(void);
+
+/**
+ * board_sysmem_reserve() - Weak function for board to implement
+ *
+ * @sysmem: global sysmem point, ignored
+ *
+ * @return 0 on success, otherwise error
+ */
+int board_sysmem_reserve(struct sysmem *sysmem);
+
+/**
+ * arch_sysmem_reserve() - Weak function for arch to implement
+ *
+ * @sysmem: global sysmem point, ignored
+ *
+ * @return 0 on success, otherwise error
+ */
+int arch_sysmem_reserve(struct sysmem *sysmem);
+
+#endif /* _SYSMEM_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index 0743d91360..12b597d104 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -93,6 +93,12 @@ config RBTREE
 config BITREVERSE
 	bool
 
+config SYSMEM
+	bool "System memory management"
+	default y
+	help
+	  This enables support for system permanent memory management.
+
 source lib/dhry/Kconfig
 
 menu "Security support"
diff --git a/lib/Makefile b/lib/Makefile
index fdb9f8e043..e417c794df 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -29,6 +29,9 @@ obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y += initcall.o
 obj-$(CONFIG_LMB) += lmb.o
+ifdef CONFIG_LMB
+obj-$(CONFIG_SYSMEM) += sysmem.o
+endif
 obj-y += ldiv.o
 obj-$(CONFIG_LZ4) += lz4_wrapper.o
 obj-$(CONFIG_MD5) += md5.o
diff --git a/lib/sysmem.c b/lib/sysmem.c
new file mode 100644
index 0000000000..705ba34771
--- /dev/null
+++ b/lib/sysmem.c
@@ -0,0 +1,467 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <sysmem.h>
+#include <lmb.h>
+#include <malloc.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SYSMEM_MAGIC		0x4D454D53	/* "SMEM" */
+#define SYSMEM_ALLOC_ANYWHERE	0
+#define SYSMEM_ALLOC_NO_ALIGN	1
+
+#ifndef CONFIG_SYS_STACK_SIZE
+#define CONFIG_SYS_STACK_SIZE	SZ_2M
+#endif
+
+#define SIZE_MB(len)		((len) >> 20)
+#define SIZE_KB(len)		(((len) % (1 << 20)) >> 10)
+
+#define SYSMEM_I(fmt, args...)	printf("Sysmem: "fmt, ##args)
+#define SYSMEM_W(fmt, args...)	printf("Sysmem Warn: "fmt, ##args)
+#define SYSMEM_E(fmt, args...)	printf("Sysmem Error: "fmt, ##args)
+#define SYSMEM_D(fmt, args...)	 debug("Sysmem Debug: "fmt, ##args)
+
+static struct sysmem plat_sysmem;	/* Global for platform */
+
+struct sysmem_check {
+	uint32_t magic;
+};
+
+static int sysmem_has_init(void)
+{
+	if (!plat_sysmem.has_init) {
+		SYSMEM_E("Framework is not initialized\n");
+		return 0;
+	}
+
+	return 1;
+}
+
+void sysmem_dump(void)
+{
+#ifdef DEBUG
+	struct sysmem *sysmem = &plat_sysmem;
+	struct lmb *lmb = &sysmem->lmb;
+	struct sysmem_property *prop;
+	struct sysmem_check *check;
+	struct list_head *node;
+	ulong memory_size = 0;
+	ulong reserved_size = 0;
+	ulong allocated_size = 0;
+	ulong i;
+
+	if (!sysmem_has_init())
+		return;
+
+	printf("\nsysmem_dump_all:\n");
+
+	/* Memory pool */
+	printf("    ------------------------------------------------------\n");
+	for (i = 0; i < lmb->memory.cnt; i++) {
+		memory_size += lmb->memory.region[i].size;
+		printf("    memory.rgn[%ld].base     = 0x%08lx\n", i,
+		       (ulong)lmb->memory.region[i].base);
+		printf("		 .size     = 0x%08lx\n",
+		       (ulong)lmb->memory.region[i].size);
+	}
+	printf("\n    memory.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)memory_size,
+	       SIZE_MB((ulong)memory_size),
+	       SIZE_KB((ulong)memory_size));
+
+	/* Reserved */
+	i = 0;
+	printf("    ------------------------------------------------------\n");
+	list_for_each(node, &sysmem->reserved_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		reserved_size += prop->size;
+		printf("    reserved.rgn[%ld].name   = \"%s\"\n", i, prop->name);
+		printf("		   .base   = 0x%08lx\n",
+		       (ulong)prop->base);
+		printf("		   .size   = 0x%08lx\n",
+		       (ulong)prop->size);
+		i++;
+	}
+	printf("\n    reserved.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+
+	/* Allocated */
+	i = 0;
+	printf("    ------------------------------------------------------\n");
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		allocated_size += prop->size;
+		check = (struct sysmem_check *)
+				(prop->base + prop->size - sizeof(*check));
+		printf("    allocated.rgn[%ld].name  = \"%s\"%s\n",
+		       i, prop->name,
+		       check->magic != SYSMEM_MAGIC ? "	(Overflow)" : "");
+		printf("		    .base  = 0x%08lx\n",
+		       (ulong)prop->base);
+		printf("		    .size  = 0x%08lx\n",
+		       (ulong)prop->size);
+		i++;
+	}
+	printf("\n    allocated.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)allocated_size,
+	       SIZE_MB((ulong)allocated_size),
+	       SIZE_KB((ulong)allocated_size));
+
+	/* LMB core reserved */
+	printf("    ------------------------------------------------------\n");
+	reserved_size = 0;
+	for (i = 0; i < lmb->reserved.cnt; i++) {
+		reserved_size += lmb->reserved.region[i].size;
+		printf("    LMB.reserved[%ld].base   = 0x%08lx\n", i,
+		       (ulong)lmb->reserved.region[i].base);
+		printf("		   .size   = 0x%08lx\n",
+		       (ulong)lmb->reserved.region[i].size);
+	}
+
+	printf("\n    reserved.core.total	   = 0x%08lx (%ld MiB. %ld KiB)\n",
+	       (ulong)reserved_size,
+	       SIZE_MB((ulong)reserved_size),
+	       SIZE_KB((ulong)reserved_size));
+	printf("    ------------------------------------------------------\n\n");
+#endif
+}
+
+int sysmem_check(void)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct sysmem_check *check;
+	struct list_head *node;
+	int ret = 0;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	/* Check allocated */
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		check = (struct sysmem_check *)
+				(prop->base + prop->size - sizeof(*check));
+		if (check->magic != SYSMEM_MAGIC) {
+			ret = -EOVERFLOW;
+			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) is Overflow!\n",
+				 prop->name, (ulong)prop->base, (ulong)prop->size);
+		}
+	}
+
+	/* Check stack */
+	check = (struct sysmem_check *)(gd->start_addr_sp - CONFIG_SYS_STACK_SIZE);
+	if (check->magic != SYSMEM_MAGIC) {
+		ret = -EOVERFLOW;
+		SYSMEM_E("Runtime stack is Overflow!\n");
+	}
+
+	return ret;
+}
+
+int sysmem_dump_check(void)
+{
+	sysmem_dump();
+
+	return sysmem_check();
+}
+
+static int sysmem_is_overlap(phys_addr_t base1, phys_size_t size1,
+			     phys_addr_t base2, phys_size_t size2)
+{
+	return ((base1 < (base2 + size2)) && (base2 < (base1 + size1)));
+}
+
+int sysmem_add(phys_addr_t base, phys_size_t size)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	int ret;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	ret = lmb_add(&sysmem->lmb, base, size);
+	if (ret < 0)
+		SYSMEM_E("Failed to add sysmem at 0x%lx for 0x%lx size\n",
+			 (ulong)base, (ulong)size);
+
+	return (ret >= 0) ? 0 : ret;
+}
+
+int sysmem_reserve(const char *name, phys_addr_t base, phys_size_t size)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct list_head *node;
+	int ret = 0;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	if (!name) {
+		SYSMEM_E("NULL name for reserved sysmem\n");
+		return -EINVAL;
+	}
+
+	/* Check overlap */
+	list_for_each(node, &sysmem->reserved_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		if (!strcmp(prop->name, name)) {
+			SYSMEM_E("Failed to double reserve for existence \"%s\"\n", name);
+			return -EEXIST;
+		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
+			SYSMEM_W("\"%s\" (base=0x%08lx, size=0x%lx) reserve is "
+				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
+				 name, (ulong)base, (ulong)size, prop->name,
+				 (ulong)prop->base, (ulong)prop->size);
+		}
+	}
+
+	ret = lmb_reserve(&sysmem->lmb, base, size);
+	if (ret >= 0) {
+		prop = malloc(sizeof(*prop));
+		if (!prop) {
+			SYSMEM_E("No memory for \"%s\" reserve sysmem\n", name);
+			return -ENOMEM;
+		}
+
+		prop->name = name;
+		prop->base = base;
+		prop->size = size;
+		list_add_tail(&prop->node, &sysmem->reserved_head);
+	} else {
+		SYSMEM_E("Failed to reserve \"%s\" at 0x%lx\n", name, (ulong)base);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+void *sysmem_alloc_align_base(const char *name,
+			      phys_addr_t base,
+			      phys_size_t size,
+			      ulong align)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct sysmem_check *check;
+	struct list_head *node;
+	phys_addr_t paddr;
+	phys_addr_t alloc_base;
+	phys_size_t alloc_size;
+
+	if (!sysmem_has_init())
+		return NULL;
+
+	if (!name) {
+		SYSMEM_E("NULL name for alloc sysmem\n");
+		return NULL;
+	}
+
+	/* Already allocated ? */
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		if (!strcmp(prop->name, name)) {
+			SYSMEM_E("Failed to double alloc for existence \"%s\"\n", name);
+			return NULL;
+		} else if (sysmem_is_overlap(prop->base, prop->size, base, size)) {
+			SYSMEM_E("\"%s\" (base=0x%08lx, size=0x%lx) alloc is "
+				 "overlap with existence \"%s\" (base=0x%08lx, size=0x%lx)\n",
+				 name, (ulong)base, (ulong)size,
+				 prop->name, (ulong)prop->base,
+				 (ulong)prop->size);
+			return NULL;
+		}
+	}
+
+	alloc_size = size + sizeof(*check);
+	if (base == SYSMEM_ALLOC_ANYWHERE)
+		alloc_base = base;
+	else
+		alloc_base = base + alloc_size;	/* LMB is align down alloc mechanism */
+
+	paddr = lmb_alloc_base(&sysmem->lmb, alloc_size, align, alloc_base);
+	if (paddr) {
+		if  ((paddr == base) || (base == SYSMEM_ALLOC_ANYWHERE)) {
+			prop = malloc(sizeof(*prop));
+			if (!prop) {
+				SYSMEM_E("No memory for \"%s\" alloc sysmem\n", name);
+				return NULL;
+			}
+
+			prop->name = name;
+			prop->base = paddr;
+			prop->size = alloc_size;
+			sysmem->allocated_cnt++;
+
+			check = (struct sysmem_check *)(paddr + size);
+			check->magic = SYSMEM_MAGIC;
+
+			list_add_tail(&prop->node, &sysmem->allocated_head);
+		} else {
+			SYSMEM_E("Failed to alloc \"%s\" at expect 0x%lx but "
+				 "alloc at 0x%lx\n",
+				 name, (ulong)base, (ulong)paddr);
+			return NULL;
+		}
+	} else {
+		SYSMEM_E("Failed to alloc \"%s\" at 0x%lx\n", name, (ulong)base);
+	}
+
+	SYSMEM_D("Alloc: \"%s\", paddr=0x%lx, size=0x%lx, align=0x%x, anywhere=%d\n",
+		 name, (ulong)paddr, (ulong)size, (u32)align, !base);
+
+	return (void *)paddr;
+}
+
+void *sysmem_alloc_align(const char *name, phys_size_t size, ulong align)
+{
+	return sysmem_alloc_align_base(name,
+				       SYSMEM_ALLOC_ANYWHERE,
+				       size,
+				       align);
+}
+
+void *sysmem_alloc_base(const char *name, phys_addr_t base, phys_size_t size)
+{
+	return sysmem_alloc_align_base(name,
+				       base,
+				       size,
+				       SYSMEM_ALLOC_NO_ALIGN);
+}
+
+void *sysmem_alloc(const char *name, phys_size_t size)
+{
+	return sysmem_alloc_align_base(name,
+				       SYSMEM_ALLOC_ANYWHERE,
+				       size,
+				       SYSMEM_ALLOC_NO_ALIGN);
+}
+
+int sysmem_free(phys_addr_t base)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_property *prop;
+	struct list_head *node;
+	int found = 0;
+	int ret;
+
+	if (!sysmem_has_init())
+		return -ENOSYS;
+
+	/* Find existence */
+	list_for_each(node, &sysmem->allocated_head) {
+		prop = list_entry(node, struct sysmem_property, node);
+		if (prop->base == base) {
+			found = 1;
+			break;
+		}
+	}
+
+	if (!found) {
+		SYSMEM_E("Failed to free no allocated sysmem at 0x%lx\n", (ulong)base);
+		return -EINVAL;
+	}
+
+	ret = lmb_free(&sysmem->lmb, prop->base, prop->size);
+	if (ret >= 0) {
+		SYSMEM_I("Free: \"%s\", paddr=0x%lx, size=0x%lx\n",
+			 prop->name, (ulong)prop->base, (ulong)prop->size);
+		sysmem->allocated_cnt--;
+		list_del(&prop->node);
+		free(prop);
+	} else {
+		SYSMEM_E("Failed to free \"%s\" at 0x%lx\n", prop->name, (ulong)base);
+	}
+
+	return (ret >= 0) ? 0 : ret;
+}
+
+int sysmem_init(void)
+{
+	struct sysmem *sysmem = &plat_sysmem;
+	struct sysmem_check *check;
+	phys_addr_t mem_start;
+	phys_size_t mem_size;
+	int ret;
+
+	SYSMEM_I("init\n");
+
+	lmb_init(&sysmem->lmb);
+	INIT_LIST_HEAD(&sysmem->allocated_head);
+	INIT_LIST_HEAD(&sysmem->reserved_head);
+	sysmem->allocated_cnt = 0;
+	sysmem->has_init = true;
+
+	/* Add all available system memory */
+#ifdef CONFIG_NR_DRAM_BANKS
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		ret = sysmem_add(gd->bd->bi_dram[i].start,
+				 gd->bd->bi_dram[i].size);
+		if (ret) {
+			SYSMEM_E("Failed to add sysmem from bi_dram[%d]\n", i);
+			return ret;
+		}
+	}
+#else
+	mem_start = env_get_bootm_low();
+	mem_size = env_get_bootm_size();
+	ret = sysmem_add(mem_start, mem_size);
+	if (ret) {
+		SYSMEM_E("Failed to add sysmem from bootm_low/size\n");
+		return ret;
+	}
+#endif
+
+	/* Reserved for arch */
+	ret = arch_sysmem_reserve(sysmem);
+	if (ret) {
+		SYSMEM_E("Failed to reserve sysmem for arch\n");
+		return ret;
+	}
+
+	/* Reserved for board */
+	ret = board_sysmem_reserve(sysmem);
+	if (ret) {
+		SYSMEM_E("Failed to reserve sysmem for board\n");
+		return ret;
+	}
+
+	/* Reserved for U-boot framework 'reserve_xxx()' */
+	mem_start = gd->start_addr_sp - CONFIG_SYS_STACK_SIZE;
+	mem_size = gd->ram_top - mem_start;
+	check = (struct sysmem_check *)mem_start;
+	check->magic = SYSMEM_MAGIC;
+
+	ret = sysmem_reserve("U-Boot", mem_start, mem_size);
+	if (ret) {
+		SYSMEM_E("Failed to reserve sysmem for U-Boot framework\n");
+		return ret;
+	}
+
+	sysmem_dump();
+
+	return 0;
+}
+
+__weak int board_sysmem_reserve(struct sysmem *sysmem)
+{
+	/* please define platform specific board_sysmem_reserve() */
+	return 0;
+}
+
+__weak int arch_sysmem_reserve(struct sysmem *sysmem)
+{
+	/* please define platform specific arch_sysmem_reserve() */
+	return 0;
+}

commit 93a7ae54026fda5b94c89631a09c887bbed7eec7
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Wed Jan 23 17:28:36 2019 +0800

    FROMRKLIST: common: don't set property of androidboot.storagemedia
    when CONFIG_ROCKCHIP_VENDOR_PARTITION enable
    
    Change-Id: I1dfc5c0947c6950bb63c49d9acf5e179a2d18ddd
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    (cherry picked from commit e5a9d6767965f350090cf20c6d93d1f644ece604)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 00ca62e181..fd71fbf11e 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -1,6 +1,4 @@
 /*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
@@ -147,6 +145,7 @@ err:
 /* Gets the storage type of the current device */
 int get_bootdev_type(void)
 {
+
 	int type = 0;
 	ulong devnum = 0;
 	char *boot_media = NULL, *devtype = NULL;
@@ -193,13 +192,18 @@ int get_bootdev_type(void)
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
 		    (type == IF_TYPE_RKNAND) ||
 		    (type == IF_TYPE_SPINAND) ||
-		    (type == IF_TYPE_SPINOR))
+		    (type == IF_TYPE_SPINOR)) {
 			snprintf(boot_options, sizeof(boot_options),
 				 "androidboot.storagemedia=%s", boot_media);
-		else
+		} else {
+#ifndef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
 			snprintf(boot_options, sizeof(boot_options),
-				 "androidboot.storagemedia=%s androidboot.mode=normal",
+				 "androidboot.storagemedia=%s ",
 				 boot_media);
+#endif
+			snprintf(boot_options, sizeof(boot_options),
+				 "androidboot.mode=normal");
+		}
 		env_update("bootargs", boot_options);
 	}
 

commit f50a526d11c676550fcf6add199cdee10c0326b9
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Wed Jan 23 15:09:49 2019 +0800

    FROMRKLIST: lib: optee_client: Add readback check when write keybox
    
    Change-Id: Ic020bd7e80869c2e3096637fce0adced654d3ce4
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    (cherry picked from commit f14ac3e46c4a2828b228e9d0e8b5ad37adfd5b95)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/write_keybox.c b/common/write_keybox.c
index 6198793bc1..9d522be6e5 100644
--- a/common/write_keybox.c
+++ b/common/write_keybox.c
@@ -11,6 +11,7 @@
 #include <stdlib.h>
 #include <attestation_key.h>
 #include "write_keybox.h"
+#include <keymaster.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
@@ -149,5 +150,17 @@ uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
 			printf("write attestation key to secure storage fail\n");
 		}
 	}
+	/* write all data to secure storage for readback check */
+	if (!rc) {
+		uint32_t ret;
+
+		ret = write_to_keymaster((uint8_t *)"raw_data",
+					 sizeof("raw_data"),
+					 received_data, len);
+		if (ret == TEEC_SUCCESS)
+			rc = 0;
+		else
+			rc = -EIO;
+	}
 	return rc;
 }
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 1e9e982762..92f1f6f61a 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -9,6 +9,7 @@
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
 #include <write_keybox.h>
+#include <keymaster.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
@@ -363,6 +364,7 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 			} else {
 				/* RPMB */
 #ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ANDROID_WRITE_KEYBOX
 #ifdef CONFIG_ANDROID_KEYMASTER_CA
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
@@ -370,6 +372,7 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 				if (rc < 0)
 					return -EIO;
 #endif
+#endif
 #endif
 			}
 
@@ -436,6 +439,19 @@ static int rkusb_do_vs_read(struct fsg_common *common)
 			vhead->size = rc;
 		} else {
 			/* RPMB */
+#ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ANDROID_WRITE_KEYBOX
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
+			rc = read_from_keymaster((uint8_t *)"raw_data",
+						 sizeof("raw_data"),
+						 (u8 *)data,
+						 common->data_size);
+			if (rc)
+				return -EIO;
+			vhead->size = common->data_size - 8;
+#endif
+#endif
+#endif
 		}
 
 		common->residue   -= common->data_size;

commit 003a8b6aca28de4c2c74ece17eb7624dbc5758fb
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Sat Jan 5 12:11:22 2019 +0800

    lib: optee_client: Extract keymaster CA module
    
    Extract keymaster CA module from OpteeClientInterface
    refactoring code for keymaster reads and writes form caller module
    
    Change-Id: I1069fce0d29d9d9815f71e7f3b4d231754382acd
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>
    (cherry picked from commit c2ba77d93f696c0ccb8f2b653571104e7b4afb4e)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index c13e0dcab0..f2671045a5 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -9,7 +9,7 @@
 #include <android_bootloader.h>
 #include <attestation_key.h>
 #include <boot_rkimg.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <keymaster.h>
 
 #define OEM_UNLOCK_ARG_SIZE 30
 
@@ -29,7 +29,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		return -ENODEV;
 	}
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 	disk_partition_t misc_part_info;
 
 	/* load attestation key from misc partition. */
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 14a1effd61..9492ecb018 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -84,7 +84,7 @@ config FASTBOOT_FLASH_MMC_DEV
 
 config FASTBOOT_OEM_UNLOCK
 	bool "Enable FASTBOOT OEM UNLOCK command"
-	depends on OPTEE_CLIENT
+	depends on ANDROID_KEYMASTER_CA
 	help
 	  This enables the command "fastboot oem unlock" the fastboot
 	  oem unlock command requires tee security storage to store
diff --git a/common/Kconfig b/common/Kconfig
index fd23004e4f..7f8ee50b6f 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -610,6 +610,13 @@ config ANDROID_AVB
 	  to verify the boot images. The vbmeta must be matched with images,
 	  if not, verify failed.
 
+config ANDROID_KEYMASTER_CA
+	bool "Support Keymaster CA"
+	default y
+	depends on OPTEE_CLIENT
+	help
+	 This enable support read/write data in keymaster.
+
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
 	help
diff --git a/common/Makefile b/common/Makefile
index 4a7401f24a..1ea451c8ee 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -144,6 +144,6 @@ obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
 
-obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
-
 obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
+obj-$(CONFIG_ANDROID_KEYMASTER_CA) += keymaster.o
+obj-$(CONFIG_ANDROID_KEYMASTER_CA) += attestation_key.o
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 05e211e367..1ed935e890 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -18,8 +18,9 @@
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <keymaster.h>
 #include <linux/libfdt_env.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -806,7 +807,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	if (part_num < 0)
 		printf("%s Could not find misc partition\n", __func__);
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 	/* load attestation key from misc partition. */
 	load_attestation_key(dev_desc, &misc_part_info);
 #endif
diff --git a/common/attestation_key.c b/common/attestation_key.c
index d90d8d9b78..80121a625d 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <malloc.h>
 
-#include <optee_include/OpteeClientApiLib.h>
+#include <keymaster.h>
 
 /* attestation data offset */
 #define ATTESTATION_DATA_OFFSET  65536
diff --git a/common/keymaster.c b/common/keymaster.c
new file mode 100644
index 0000000000..8caa9f5528
--- /dev/null
+++ b/common/keymaster.c
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <keymaster.h>
+#include <common.h>
+#include <boot_rkimg.h>
+#include <malloc.h>
+
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+
+TEEC_Result read_from_keymaster(uint8_t *filename,
+				uint32_t filename_size,
+				uint8_t *data,
+				uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5,
+			       0x698b,
+			       0x4142,
+			       { 0x82, 0xb8, 0x3a,
+				 0xcf, 0x16, 0xe9,
+				 0x9e, 0x2a } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("read_from_keymaster start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+					 (dev_desc->if_type == IF_TYPE_MMC)
+					 ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(data, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("read_from_keymaster end\n");
+
+	return TeecResult;
+}
+
+TEEC_Result write_to_keymaster(uint8_t *filename,
+			       uint32_t filename_size,
+			       uint8_t *data,
+			       uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x1b484ea5,
+			       0x698b,
+			       0x4142,
+			       { 0x82, 0xb8, 0x3a,
+				 0xcf, 0x16, 0xe9,
+				 0x9e, 0x2a } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("write_to_keymaster\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC)
+					   ? 1 : 0;
+
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+
+	NULL, &TeecOperation, &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = data_size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, data, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("write_to_keymaster end\n");
+	debug("TeecResult %x\n", TeecResult);
+
+	return TeecResult;
+}
+
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = write_to_keymaster((uint8_t *)file,
+				 strlen(file),
+				 (uint8_t *)&unlock,
+				 1);
+	return ret;
+}
+
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = read_from_keymaster((uint8_t *)file,
+				   strlen(file),
+				   unlock,
+				   1);
+
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+		debug("init oem unlock status 0");
+		ret = trusty_write_oem_unlock(0);
+	}
+
+	return ret;
+}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 3bd1d7a1b8..6613935254 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -39,6 +39,9 @@
 #endif
 #include <boot_rkimg.h>
 #include <optee_include/tee_client_api.h>
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
+#include <keymaster.h>
+#endif
 
 #define FASTBOOT_VERSION		"0.4"
 
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 0de56532b1..1e9e982762 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -363,11 +363,13 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 			} else {
 				/* RPMB */
 #ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
 				if (rc < 0)
 					return -EIO;
+#endif
 #endif
 			}
 
diff --git a/include/keymaster.h b/include/keymaster.h
new file mode 100644
index 0000000000..22908b8302
--- /dev/null
+++ b/include/keymaster.h
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef KEYMASTER_H_
+#define KEYMASTER_H_
+
+#include <optee_include/tee_client_api.h>
+
+/*
+ * read data from rk_keymaster
+ *
+ * @felename:           the filename of the saved data to read
+ * @filename_size:      size of filename
+ * @data:               the buffer used to read data from rk_keymaster
+ * @data_size:          buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result read_from_keymaster(uint8_t *filename,
+				uint32_t filename_size,
+				uint8_t *data,
+				uint32_t data_size);
+
+/*
+ * write data to rk_keymaster
+ *
+ * @felename:           the filename of the saved data to read
+ * @filename_size:      size of filename
+ * @data:               the buffer used to read data from rk_keymaster
+ * @data_size:          buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result write_to_keymaster(uint8_t *filename,
+			       uint32_t filename_size,
+			       uint8_t *data,
+			       uint32_t data_size);
+
+/*
+ * read oem unlock status from rk_keymaster
+ *
+ * @unlock:used to read oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
+
+/*
+ * update oem unlock status to rk_keymaster
+ *
+ * @unlock: oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
+
+#endif  //KEYMASTER_H_
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 93470d3004..7475f6e3e5 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -24,22 +24,6 @@ uint32_t trusty_write_lock_state(uint8_t lock_state);
 uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
 uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
 
-/*
- * read data from rk_keymaster
- *
- * @filename:		the filename of the saved data to read
- * @filename_size: 	size of filename
- * @data: 		the buffer used to read data from rk_keymaster
- * @data_size: 		buffer size of the data
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result read_from_keymaster
-	(uint8_t *filename, uint32_t filename_size,
-	uint8_t *data, uint32_t data_size);
-uint32_t write_to_keymaster
-	(uint8_t *filename, uint32_t filename_size,
-	uint8_t *data, uint32_t data_size);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
@@ -55,22 +39,4 @@ uint32_t trusty_attest_get_ca
 	 uint8_t *out, uint32_t *out_len);
 uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size);
 
-/*
- * read oem unlock status from rk_keymaster
- *
- * @unlock:used to read oem unlock status code,0:locked,1:unlocked
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
-
-/*
- * update oem unlock status to rk_keymaster
- *
- * @unlock: oem unlock status code,0:locked,1:unlocked
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
-
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 8da90cc72e..a124860792 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -805,180 +805,6 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	return TeecResult;
 }
 
-TEEC_Result read_from_keymaster(uint8_t *filename,
-		uint32_t filename_size,
-		uint8_t *data,
-		uint32_t size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	debug("read_from_keymaster start\n");
-	OpteeClientApiLibInitialize();
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(data, SharedMem1.buffer, SharedMem1.size);
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-	debug("read_from_keymaster end\n");
-
-	return TeecResult;
-}
-
-uint32_t write_to_keymaster(uint8_t *filename,
-		uint32_t filename_size,
-		uint8_t *data,
-		uint32_t data_size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	debug("write_to_keymaster\n");
-	OpteeClientApiLibInitialize();
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = data_size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	memcpy(SharedMem1.buffer, data, SharedMem1.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-	debug("write_to_keymaster end\n");
-	debug("TeecResult %x\n", TeecResult);
-
-	return TeecResult;
-}
-
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 {
 	TEEC_Result TeecResult;
@@ -1806,29 +1632,3 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 
 	return TeecResult;
 }
-
-TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
-{
-	char *file = "oem.unlock";
-	TEEC_Result ret;
-
-	ret = write_to_keymaster((uint8_t *)file, strlen(file),
-		(uint8_t *)&unlock, 1);
-	return ret;
-}
-
-TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
-{
-	char *file = "oem.unlock";
-	TEEC_Result ret;
-
-	ret = read_from_keymaster((uint8_t *)file, strlen(file),
-		unlock, 1);
-
-	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
-		debug("init oem unlock status 0");
-		ret = trusty_write_oem_unlock(0);
-	}
-
-	return ret;
-}

commit c6b56a10366937fbd5652e5d36f6f8e1c06bd25e
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Fri Jan 4 16:03:30 2019 +0800

    lib: optee_client: move keybox code to write_keybox.c
    
    Change-Id: Ifcd9962a8b802ee2bcbdbd0e88effb4485e5963a
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    (cherry picked from commit dfbf26e839a9691c1ccc72eba0da5be75634ed2a)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 8856c7d520..fd23004e4f 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -594,6 +594,13 @@ config ANDROID_AB
 	  allows a bootloader to try a new version of the system but roll back
 	  to previous version if the new one didn't boot all the way.
 
+config ANDROID_WRITE_KEYBOX
+	bool "Support Write Keybox"
+	default y
+	depends on OPTEE_CLIENT
+	help
+	  This enable support write keybox to secure storage.
+
 config ANDROID_AVB
 	bool"Support Android Verified Boot"
 	default n
diff --git a/common/Makefile b/common/Makefile
index 47e291daa1..4a7401f24a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -145,3 +145,5 @@ obj-y += s_record.o
 obj-y += xyzModem.o
 
 obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
+
+obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
diff --git a/common/write_keybox.c b/common/write_keybox.c
new file mode 100644
index 0000000000..6198793bc1
--- /dev/null
+++ b/common/write_keybox.c
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+#include <boot_rkimg.h>
+#include <stdlib.h>
+#include <attestation_key.h>
+#include "write_keybox.h"
+
+#define	BOOT_FROM_EMMC	(1 << 1)
+#define	WIDEVINE_TAG	"KBOX"
+#define	ATTESTATION_TAG	"ATTE"
+
+uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
+			      TEEC_UUID uuid,
+			      uint8_t *key, uint32_t key_size,
+			      uint8_t *data, uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID *TeecUuid = &uuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/* 0 nand or emmc "security" partition , 1 rpmb */
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = key_size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	memcpy(SharedMem1.buffer, key, SharedMem1.size);
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = data_size;
+	SharedMem2.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	memcpy(SharedMem2.buffer, data, SharedMem2.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[2].tmpref.size = SharedMem2.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE);
+
+	printf("write keybox to secure storage\n");
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					6,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		printf("send data to TA failed with code 0x%x\n", TeecResult);
+	else
+		printf("send data to TA success with code 0x%x\n", TeecResult);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
+{
+	uint32_t key_size;
+	uint32_t data_size;
+	TEEC_Result ret;
+	int rc = 0;
+
+	if (memcmp(received_data, WIDEVINE_TAG, 4) == 0) {
+		/* widevine keybox */
+		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+
+		key_size = *(received_data + 4);
+		data_size = *(received_data + 8);
+
+		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
+					   sizeof("widevine_keybox"),
+					   widevine_uuid,
+					   received_data + 12,
+					   key_size,
+					   received_data + 12 + key_size,
+					   data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write widevine keybox to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write widevine keybox to secure storage fail\n");
+		}
+	} else if (memcmp(received_data, ATTESTATION_TAG, 4) == 0) {
+		/* attestation key */
+		atap_result ret;
+
+		ret = write_attestation_key_to_secure_storage(received_data, len);
+		if (ret == ATAP_RESULT_OK) {
+			rc = 0;
+			printf("write attestation key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write attestation key to secure storage fail\n");
+		}
+	}
+	return rc;
+}
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 114da0bbc4..0de56532b1 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -8,7 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <write_keybox.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index fb859d6924..93470d3004 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -40,7 +40,6 @@ TEEC_Result read_from_keymaster
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
-int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
diff --git a/include/write_keybox.h b/include/write_keybox.h
new file mode 100644
index 0000000000..59991f83a5
--- /dev/null
+++ b/include/write_keybox.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef WRITE_KEYBOX_H_
+#define	WRITE_KEYBOX_H_
+
+#include <common.h>
+
+/*
+ * write_keybox_to_secure_storage
+ *
+ * @received_data:	the data received from usb
+ * @len:		size of received_data
+ *
+ * @return a negative number in case of error, or 0 on success.
+ */
+uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len);
+#endif
+
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index e41388b185..8da90cc72e 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -14,157 +14,6 @@
 #include <attestation_key.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
-#define	WIDEVINE_TAG	"KBOX"
-#define	ATTESTATION_TAG	"ATTE"
-
-uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
-			      TEEC_UUID uuid,
-			      uint8_t *key, uint32_t key_size,
-			      uint8_t *data, uint32_t data_size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-
-	TEEC_UUID *TeecUuid = &uuid;
-	TEEC_Operation TeecOperation = {0};
-
-	struct blk_desc *dev_desc;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	OpteeClientApiLibInitialize();
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						    TEEC_NONE,
-						    TEEC_NONE,
-						    TEEC_NONE);
-
-	/* 0 nand or emmc "security" partition , 1 rpmb */
-	TeecOperation.params[0].value.a =
-		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				      &TeecSession,
-				      TeecUuid,
-				      TEEC_LOGIN_PUBLIC,
-				      NULL,
-				      &TeecOperation,
-				      &ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = key_size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	memcpy(SharedMem1.buffer, key, SharedMem1.size);
-
-	TEEC_SharedMemory SharedMem2 = {0};
-
-	SharedMem2.size = data_size;
-	SharedMem2.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
-
-	memcpy(SharedMem2.buffer, data, SharedMem2.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
-	TeecOperation.params[2].tmpref.size = SharedMem2.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INOUT,
-						    TEEC_NONE);
-
-	printf("write keybox to secure storage\n");
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					6,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS) {
-		printf("send data to TA failed with code 0x%x\n", TeecResult);
-	} else {
-		printf("send data to TA success with code 0x%x\n", TeecResult);
-	}
-
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_ReleaseSharedMemory(&SharedMem2);
-
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
-{
-	uint32_t key_size;
-	uint32_t data_size;
-	TEEC_Result ret;
-	int rc = 0;
-
-	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
-		/* widevine keybox */
-		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
-			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-
-		key_size = *(uboot_data + 4);
-		data_size = *(uboot_data + 8);
-
-		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
-					   sizeof("widevine_keybox"),
-					   widevine_uuid,
-					   uboot_data + 12,
-					   key_size,
-					   uboot_data + 12 + key_size,
-					   data_size);
-		if (ret == TEEC_SUCCESS) {
-			rc = 0;
-			printf("write widevine keybox to secure storage success\n");
-		} else {
-			rc = -EIO;
-			printf("write widevine keybox to secure storage fail\n");
-		}
-	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
-		/* attestation key */
-		atap_result ret;
-
-		ret = write_attestation_key_to_secure_storage(uboot_data, len);
-		if (ret == ATAP_RESULT_OK) {
-			rc = 0;
-			printf("write attestation key to secure storage success\n");
-		} else {
-			rc = -EIO;
-			printf("write attestation key to secure storage fail\n");
-		}
-	}
-	return rc;
-}
 
 void test_optee(void)
 {

commit a096fa255c6067c2aa4932ff43fce2a6e1af8fb2
Author: wu jingchen <oven.wu@rock-chips.com>
Date:   Tue Jan 22 14:41:15 2019 +0800

    configs: rockchip: px30: enable avb for Android P
    
    Change-Id: I3678bc4e3f21379cf12891ca6a99a37bc54d76d7
    Signed-off-by: wu jingchen <oven.wu@rock-chips.com>

diff --git a/configs/px30_defconfig b/configs/px30_defconfig
new file mode 100644
index 0000000000..bc3a35a1b5
--- /dev/null
+++ b/configs/px30_defconfig
@@ -0,0 +1,143 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SOUND=y
+CONFIG_I2S_ROCKCHIP=y
+CONFIG_SOUND_RK817=y
+CONFIG_SOUND_ROCKCHIP=y
+CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_DRM_ROCKCHIP_RK618=y
+CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit de4e4f50976ccfe6abb415a0f4c17933de945e92
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Wed Jan 23 20:28:14 2019 +0800

    fuel gauge: rk817/rk809: add charge detect for rk809
    
    Change-Id: I481793e5e307534deefa15a9f71de75752170dc8
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index f956c1c268..57ff70e5ec 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -946,10 +946,14 @@ static int rk817_bat_update_get_current(struct udevice *dev)
 
 static int rk817_bat_dwc_otg_check_dpdm(struct rk817_battery_device *battery)
 {
-	if (battery->variant == RK809_ID)
-		return 0;
-	else
+	if (battery->variant == RK809_ID) {
+		if (rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS)
+			return AC_CHARGER;
+		else
+			return NO_CHARGER;
+	} else {
 		return  rockchip_chg_get_type();
+	}
 }
 
 static bool rk817_bat_update_get_chrg_online(struct udevice *dev)

commit 47ad810789199e0dbd3fc7f4e8955d45f0663500
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 20:25:22 2019 +0800

    rockchip: rk1808: enable GICV3
    
    Change-Id: I47a459e2408a7a56794cf7f72ff58a616100b7eb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7c6a22d51f..8cb2a4c10d 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -354,11 +354,11 @@ config TPL_STACK
 
 endif
 
-
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
 	select ARM_SMCCC
+	select GICV3
 	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
diff --git a/include/irq-platform.h b/include/irq-platform.h
index 230a16737e..b07d576057 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -172,6 +172,29 @@
 
 #define GPIO_BANK_NUM			5
 #define GPIO_BANK_PINS			32
+
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+#define GPIO0_PHYS			0xff4c0000
+#define GPIO1_PHYS			0xff690000
+#define GPIO2_PHYS			0xff6a0000
+#define GPIO3_PHYS			0xff6b0000
+#define GPIO4_PHYS			0xff6c0000
+
+#define IRQ_GPIO0			35
+#define IRQ_GPIO1			36
+#define IRQ_GPIO2			37
+#define IRQ_GPIO3			38
+#define IRQ_GPIO4			114
+
+#define IRQ_TIMER0			58
+#define IRQ_TIMER1			59
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
+
 #else
 "Missing define RIQ relative things"
 #endif
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index c9a968d39c..46133016b3 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -52,6 +52,9 @@
  */
 #define TIMER_BASE		(0xFF210000 + 0x00)	/* TIMER 0 */
 #define TIMER_IRQ		IRQ_TIMER0
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+#define TIMER_BASE		(0xFF700000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #else
 "Missing definitions of timer module test"
 #endif

commit 0b33879477ef19e02aaa793621329a09723e7193
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 20:41:09 2019 +0800

    configs: rk3128x: remove unused modules
    
    Change-Id: Id8c61c9b3fbb9eebe53b28c95e2ca961df48947e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index bb46b70399..daad03c077 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -35,17 +35,28 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
@@ -75,7 +86,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
@@ -106,9 +116,6 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
@@ -116,6 +123,7 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit a3125e189368afe1022578d7cc9f23840cb949f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 18:25:41 2019 +0800

    configs: rk3399pro: remove unused modules
    
    Change-Id: I3de6562dc2c6546bf148e6571092b2046fd49336
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 35d15637fb..778f0964b5 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -26,21 +26,31 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -67,7 +77,6 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
@@ -126,4 +135,5 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit 0be3899d19e8d0f35b587b206fe0327e82901139
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:07:14 2019 +0800

    configs: rk3126: remove unused modules
    
    decrease 41KB size.
    
    Change-Id: Ic2cb9d164ab79aa0eee2aa0ad491562231400aa3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 357f281e53..3814172462 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -17,18 +17,28 @@ CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_BMP=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_CHARGE_DISPLAY=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -88,6 +98,7 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 547a235e37db2b98911d9c7e9b8be5f19a3baf3a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 21:02:59 2019 +0800

    configs: rk3308(aarch32/64): remove unused modules
    
    Change-Id: I6c9243a7a18b108442e8cf7e5ea298c7770c9a08
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 07162ea3db..f8510b1e49 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -19,12 +19,25 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
@@ -65,3 +78,4 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index fe55fa6820..48af622e47 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
-# CONFIG_CMD_ECHO is not set
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_MISC is not set
diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index a4720bf15c..0edc1895f0 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -93,4 +93,5 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y
diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
index 007c6d0114..b93cba6549 100644
--- a/configs/rk3308_defconfig
+++ b/configs/rk3308_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set

commit 20e312f0e275883fe5f8d5dd8be247f7d32fc57b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 22 17:59:43 2019 +0800

    configs: rk3036: remove unused modules
    
    Change-Id: I6fdabf2c1274d791a4cf3fae3219c09b145984b6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index b963f9deb8..62e45aa81b 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -5,9 +5,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_ROCKCHIP_RK3036=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10081fff
 # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -20,8 +20,8 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -35,18 +35,25 @@ CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
@@ -88,6 +95,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x310a
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 38bddcf9c876a083b218e769b0bcdc90381208ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 21:02:28 2019 +0800

    configs: rk3399: clean up with make savedeconfig
    
    Change-Id: I1fac34ded558e3250364604ec07b3d2bf3a31bc6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index df0230e71f..5c6b6b96f1 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
@@ -42,10 +43,8 @@ CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
-# CONFIG_CMD_ECHO is not set
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
@@ -129,14 +128,12 @@ CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_TEST_ROCKCHIP=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_CMD_MMC=y
-CONFIG_ANDROID_AVB=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit 5279a516112e6205b8b0ed72189e31a27269716c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:37:49 2019 +0800

    configs: rk3399pro-npu: remove unused modules
    
    Change-Id: If8bbff81139a38c47512f59bb25b4baeedab833f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index 4ba467c66c..e0d6fab83e 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -39,8 +39,9 @@ CONFIG_CMD_PART=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"

commit 10e1637793fef4ffdac391f2a2caa6c02593abb5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:37:37 2019 +0800

    configs: rk1808: remove unused modules
    
    Change-Id: I67f5bc3a60684d492e6abd4c2aa40986caf191b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 5ccc2606d1..8ffec5633e 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -19,6 +19,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
@@ -28,6 +29,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
 # CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y

commit 83f08d13cbda138cc9c64349699c0fb94c7b2543
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:31:41 2019 +0800

    configs: rk3288: remove unused modules
    
    decrease 48KB size.
    
    Change-Id: Ib91c7715fe1c9d389eee1bce8637b8f2e0446517
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 318078ca23..e9e178100b 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -17,19 +17,28 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_RKPARM_PARTITION=y
@@ -93,6 +102,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_OPTEE_CLIENT=y

commit ab620ebd8e2edfc27f574f3a99ca28495246af30
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 20:01:32 2019 +0800

    configs: rk3328: remove unused modules
    
    Change-Id: I2f4e28d7089ba22dbc87fbc4a60ba471b4aa9eec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 4582bc2272..5fd0655da7 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -32,7 +32,8 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
@@ -118,4 +119,5 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit d6741ccc338e188ffe355c7b1c441e7158d67f88
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 19:59:53 2019 +0800

    configs: rk322x: remove unused modules
    
    decrease 42KB size.
    
    Change-Id: I1719552e4c98ce32dcba31a3e569d664a5a1b092
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index a754c401af..ecf9243c17 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -34,16 +34,27 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
@@ -108,6 +119,7 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit b506bd3c7a0d96f1fe0b09d716e7281590280027
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 19:54:28 2019 +0800

    configs: rk3368: remove unused modules
    
    Change-Id: I7fc3be392b2fc5fa2cda215f15a3c7dc6f8ba531
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index dbfab2d6ce..db8b307d00 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -16,7 +16,9 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
@@ -32,7 +34,6 @@ CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ECHO is not set
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set

commit 92c6b64268501785fd3c8904743984262d04a8fb
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jan 23 10:54:42 2019 +0800

    clk: rockchip: rk3128: print arm enter and init rate
    
    Change-Id: I0be1752522a83a2d111870e5a8ac95f92bd7f9a5
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index a2f99d5657..6c2b6cb1b1 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -22,6 +22,11 @@
 struct rk3128_clk_priv {
 	struct rk3128_cru *cru;
 	ulong gpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3128_cru {
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 1b2943f59a..493a0a01c7 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -530,7 +530,7 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong ret;
+	ulong ret = 0;
 
 	switch (clk->id) {
 	case PLL_APLL:
@@ -544,7 +544,9 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 		priv->gpll_hz = rate;
 		break;
 	case ARMCLK:
-		ret = rk3128_armclk_set_clk(priv, rate);
+		if (priv->armclk_hz)
+			ret = rk3128_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
@@ -771,7 +773,16 @@ static int rk3128_clk_probe(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+				      priv->cru, APLL);
 	rkclk_init(priv);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+				      priv->cru, APLL);
 
 	return 0;
 }
@@ -839,6 +850,7 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3128_clk_priv *priv;
 	const struct rk3128_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -853,7 +865,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -867,18 +885,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit 3a1c76d9314d2f7b604a3dea3756429f5e3d4333
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 18:17:25 2019 +0800

    clk: rockchip: rk3036: print arm enter and init rate
    
    Change-Id: Ic9212c8a0f1d50006f7121957b8bd5f34d2622d9
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index ca60507617..d908d9460f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -28,6 +28,11 @@
 struct rk3036_clk_priv {
 	struct rk3036_cru *cru;
 	ulong rate;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3036_cru {
@@ -66,6 +71,12 @@ struct pll_div {
 	u32 frac;
 };
 
+struct rk3036_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 enum {
 	/* PLLCON0*/
 	PLL_POSTDIV1_SHIFT	= 12,
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index ab3154c554..50fc42d784 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -26,6 +26,21 @@ enum {
 	OUTPUT_MIN_HZ	= 24 * 1000000,
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3036_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3036_clk_info clks_dump[] = {
+	RK3036_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3036_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3036_CLK_DUMP(PLL_GPLL, "gpll", true),
+};
+#endif
+
 #define RATE_TO_DIV(input_rate, output_rate) \
 	((input_rate) / (output_rate) - 1);
 
@@ -336,7 +351,14 @@ static int rk3036_clk_probe(struct udevice *dev)
 {
 	struct rk3036_clk_priv *priv = dev_get_priv(dev);
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
 	rkclk_init(priv->cru);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+							  CLK_ARM);
 
 	return 0;
 }
@@ -392,3 +414,69 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = {
 	.bind		= rk3036_clk_bind,
 	.probe		= rk3036_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3036_clk_priv *priv;
+	const struct rk3036_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3036_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit ec0307ef3a9c4bd32a2097db56836e2ea37d61a3
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 17:48:21 2019 +0800

    clk: rockchip: rk3288: print arm enter and init rate
    
    Change-Id: I5a6d564a973111841df6b53a4df64a54f728e116
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 846a34e6a0..87dce2eddf 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -30,6 +30,11 @@ struct rk3288_clk_priv {
 	struct rk3288_grf *grf;
 	struct rk3288_cru *cru;
 	ulong rate;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3288_cru {
@@ -61,6 +66,12 @@ struct rk3288_cru {
 };
 check_member(rk3288_cru, cru_emmc_con[1], 0x021c);
 
+struct rk3288_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* CRU_CLKSEL11_CON */
 enum {
 	HSICPHY_DIV_SHIFT	= 8,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 4688fbb3b4..73667de9cd 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -37,6 +37,24 @@ struct pll_div {
 	u32 no;
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3288_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3288_clk_info clks_dump[] = {
+	RK3288_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3288_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3288_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3288_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3288_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3288_CLK_DUMP(ACLK_CPU, "aclk_bus", true),
+};
+#endif
+
 enum {
 	VCO_MAX_HZ	= 2200U * 1000000,
 	VCO_MIN_HZ	= 440 * 1000000,
@@ -1254,8 +1272,20 @@ static int rk3288_clk_probe(struct udevice *dev)
 			init_clocks = true;
 	}
 
-	if (init_clocks)
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz = rkclk_pll_get_rate(priv->cru,
+							   CLK_ARM);
+
+	if (init_clocks) {
 		rkclk_init(priv->cru, priv->grf);
+		if (!priv->armclk_init_hz)
+			priv->armclk_init_hz = rkclk_pll_get_rate(priv->cru,
+								  CLK_ARM);
+	} else {
+		if (!priv->armclk_init_hz)
+			priv->armclk_init_hz = priv->armclk_enter_hz;
+	}
 
 	return 0;
 }
@@ -1312,3 +1342,69 @@ U_BOOT_DRIVER(rockchip_rk3288_cru) = {
 	.ofdata_to_platdata	= rk3288_clk_ofdata_to_platdata,
 	.probe		= rk3288_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	struct rk3288_clk_priv *priv;
+	const struct rk3288_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3288_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("  %s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+

commit 2401c256ecf1df05b09f39308648070f2f1650db
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 17:20:30 2019 +0800

    clk: rockchip: rk322x: print arm enter and init rate
    
    Change-Id: Iab7034c8cef09908a99b5a1e396f6e015da350fb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index 3162b411a9..05a59851e4 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -21,6 +21,11 @@ struct rk322x_clk_priv {
 	struct rk322x_cru *cru;
 	ulong gpll_hz;
 	ulong cpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk322x_cru {
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 4f71e170da..df3273cbbd 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -608,7 +608,7 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong ret;
+	ulong ret = 0;
 
 	switch (clk->id) {
 	case PLL_APLL:
@@ -627,7 +627,9 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 		priv->gpll_hz = rate;
 		break;
 	case ARMCLK:
-		ret = rk322x_armclk_set_clk(priv, rate);
+		if (priv->armclk_hz)
+			ret = rk322x_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
@@ -982,10 +984,21 @@ static int rk322x_clk_probe(struct udevice *dev)
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
 	int ret = 0;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+				      priv->cru, APLL);
 	rkclk_init(priv);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+				      priv->cru, APLL);
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 #endif
 	return 0;
 }
@@ -1052,6 +1065,7 @@ U_BOOT_DRIVER(rockchip_rk322x_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk322x_clk_priv *priv;
 	const struct rk322x_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1066,7 +1080,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1080,18 +1100,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit 093fdd9f5d78608461c5099f90236d238bd262a1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:47:04 2019 +0800

    clk: rockchip: rk3308: print arm enter and init rate
    
    Change-Id: I6df66d7b5dda643dba49ee87c2a2c0544ddbcded
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 66f02039d8..0f0b5e43bb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -51,7 +51,10 @@ struct rk3308_clk_priv {
 	ulong dpll_hz;
 	ulong vpll0_hz;
 	ulong vpll1_hz;
-	bool is_assigned;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3308_cru {
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 57cf430dc0..fa16d7449c 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -851,7 +851,7 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 						      priv->cru, DPLL);
 		break;
 	case ARMCLK:
-		if (priv->is_assigned)
+		if (priv->armclk_hz)
 			rk3308_armclk_set_clk(priv, rate);
 		priv->armclk_hz = rate;
 		break;
@@ -1071,13 +1071,23 @@ static int rk3308_clk_probe(struct udevice *dev)
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				      priv->cru, APLL);
 	rk3308_clk_init(dev);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				      priv->cru, APLL);
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
-	priv->is_assigned = true;
+	else
+		priv->sync_kernel = true;
 
 	return 0;
 }
@@ -1152,6 +1162,7 @@ U_BOOT_DRIVER(rockchip_rk3308_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3308_clk_priv *priv;
 	const struct rk3308_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1166,7 +1177,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:\n");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1179,17 +1196,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit f7913bc128fda04c904ae306785a5e1257fede2a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:37:54 2019 +0800

    clk: rockchip: rk3328: print arm enter and init rate
    
    Change-Id: I80ebeee0d6d8b151061d0bbb0d1d12070dcc6f98
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 06bf1fa092..b2f5a7f466 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -14,6 +14,11 @@ struct rk3328_clk_priv {
 	ulong rate;
 	ulong cpll_hz;
 	ulong gpll_hz;
+	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3328_cru {
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 343baaedcc..e14f44676b 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -816,7 +816,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 		priv->gpll_hz = rate;
 		break;
 	case ARMCLK:
-		ret = rk3328_armclk_set_clk(priv, rate);
+		if (priv->armclk_hz)
+			ret = rk3328_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
 		break;
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
@@ -1202,11 +1204,22 @@ static int rk3328_clk_probe(struct udevice *dev)
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
 	int ret = 0;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz)
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+				      priv->cru, NPLL);
 	rkclk_init(priv);
+	if (!priv->armclk_init_hz)
+		priv->armclk_init_hz =
+		rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+				      priv->cru, NPLL);
 
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 
 	return 0;
 }
@@ -1282,6 +1295,7 @@ U_BOOT_DRIVER(rockchip_rk3328_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3328_clk_priv *priv;
 	const struct rk3328_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1296,7 +1310,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1310,18 +1330,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit ae79bf682763840a3e735dae892825b31dfc8b1e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:26:41 2019 +0800

    clk: rockchip: rk3368: print arm enter and init rate
    
    Change-Id: Ib201cf442ce7398bbe8009ce9b7de9dc1f53c587
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index fa4e472302..a965129703 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -57,6 +57,14 @@ check_member(rk3368_cru, emmc_con[1], 0x41c);
 
 struct rk3368_clk_priv {
 	struct rk3368_cru *cru;
+	ulong armlclk_hz;
+	ulong armlclk_enter_hz;
+	ulong armlclk_init_hz;
+	ulong armbclk_hz;
+	ulong armbclk_enter_hz;
+	ulong armbclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 enum {
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 99cd7a6796..a3419b7945 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -920,8 +920,14 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rkclk_set_pll(priv->cru, clk->id - 1, &pll_config);
 		break;
 	case ARMCLKB:
+		if (priv->armbclk_hz)
+			ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		priv->armbclk_hz = rate;
+		break;
 	case ARMCLKL:
-		ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		if (priv->armlclk_hz)
+			ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		priv->armlclk_hz = rate;
 		break;
 	case SCLK_SPI0 ... SCLK_SPI2:
 		ret = rk3368_spi_set_clk(priv->cru, clk->id, rate);
@@ -1195,13 +1201,24 @@ static int rk3368_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
+	priv->sync_kernel = false;
+	if (!priv->armlclk_enter_hz)
+		priv->armlclk_enter_hz = rkclk_pll_get_rate(priv->cru, APLLL);
+	if (!priv->armbclk_enter_hz)
+		priv->armbclk_enter_hz = rkclk_pll_get_rate(priv->cru, APLLB);
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
 #endif
+	if (!priv->armlclk_init_hz)
+		priv->armlclk_init_hz = rkclk_pll_get_rate(priv->cru, APLLL);
+	if (!priv->armbclk_init_hz)
+		priv->armbclk_init_hz = rkclk_pll_get_rate(priv->cru, APLLB);
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 	return 0;
 }
 
@@ -1281,6 +1298,7 @@ U_BOOT_DRIVER(rockchip_rk3368_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk3368_clk_priv *priv;
 	const struct rk3368_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1295,7 +1313,19 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arml: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armlclk_enter_hz / 1000,
+	       priv->armlclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armlclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	printf("CLK: (%s. armb: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armbclk_enter_hz / 1000,
+	       priv->armbclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armlclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1309,18 +1339,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("  %s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit 08e6e2645ecfac80e6d7c2c5d8a512d9d4058f10
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 21 18:04:03 2019 +0800

    configs: rk3326/px30: remove unused modules
    
    decrease 66KB size
    
    Change-Id: If826264d06960317c0d436fa115432e6e2575c25
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 332243d214..d85444a6cd 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -28,16 +28,30 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -115,6 +129,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index e7e6d9569a..7f0192c2bb 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -30,15 +30,29 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -109,6 +123,7 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 475f391b60..ab40b9e0e4 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -31,16 +31,30 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -110,6 +124,7 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 044bc79de91b458ae1047cab33ab2ea910485e4e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 16:04:28 2019 +0800

    clk: rockchip: rk3399: print arm enter and init rate
    
    Change-Id: Ib5e3e0f9a3e1a5b535ec852e7c58966dc0db77cf
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 78d7066ac3..55d09af7ea 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -12,6 +12,14 @@
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3399_clk_priv {
 	struct rk3399_cru *cru;
+	ulong armlclk_hz;
+	ulong armlclk_enter_hz;
+	ulong armlclk_init_hz;
+	ulong armbclk_hz;
+	ulong armbclk_enter_hz;
+	ulong armbclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk3399_pmuclk_priv {
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 993bf57867..814f43772e 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1465,7 +1465,21 @@ static int rk3399_clk_probe(struct udevice *dev)
 
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
+
+	priv->sync_kernel = false;
+	if (!priv->armlclk_enter_hz)
+		priv->armlclk_enter_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_l_con[0]);
+	if (!priv->armbclk_enter_hz)
+		priv->armbclk_enter_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_b_con[0]);
 	rkclk_init(priv->cru);
+	if (!priv->armlclk_init_hz)
+		priv->armlclk_init_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_l_con[0]);
+	if (!priv->armbclk_init_hz)
+		priv->armbclk_init_hz =
+		rkclk_pll_get_rate(&priv->cru->apll_b_con[0]);
 	return 0;
 }
 
@@ -1741,6 +1755,7 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev, *pmucru_dev;
+	struct rk3399_clk_priv *priv;
 	const struct rk3399_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1763,7 +1778,19 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:\n");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arml: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armlclk_enter_hz / 1000,
+	       priv->armlclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armlclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+	printf("CLK: (%s. armb: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armbclk_enter_hz / 1000,
+	       priv->armbclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armbclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1779,17 +1806,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit dfce009693a2052aaa4dd12073f3f2462ab13816
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 15:34:44 2019 +0800

    clk: rockchip: px30: print arm enter and init rate
    
    Change-Id: I0d2a1c6bb92397210314322fd147c4a8a6e81abd
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 322e962ebf..87d32154e8 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -43,6 +43,10 @@ struct px30_clk_priv {
 	struct px30_cru *cru;
 	ulong gpll_hz;
 	ulong armclk_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct px30_pmuclk_priv {
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 23dd428861..84bf8cb7a6 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -204,6 +204,7 @@ int set_armclk_rate(void)
 		printf("Failed to set armclk %lu\n", priv->armclk_hz);
 		return ret;
 	}
+	priv->set_armclk_rate = true;
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 88f44406fe..b36f16bc3e 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1436,16 +1436,24 @@ static int px30_clk_probe(struct udevice *dev)
 	struct px30_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz) {
+		priv->armclk_enter_hz = px30_clk_get_pll_rate(priv, APLL);
+		priv->armclk_init_hz = priv->armclk_enter_hz;
+	}
 	if (px30_clk_get_pll_rate(priv, APLL) != APLL_HZ) {
 		ret = px30_armclk_set_clk(priv, APLL_HZ);
 		if (ret < 0)
 			printf("%s failed to set armclk rate\n", __func__);
+		priv->armclk_init_hz = APLL_HZ;
 	}
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 
 	if (!priv->gpll_hz) {
 		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
@@ -1759,6 +1767,7 @@ U_BOOT_DRIVER(rockchip_px30_pmucru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev, *pmucru_dev;
+	struct px30_clk_priv *priv;
 	const struct px30_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1781,7 +1790,13 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:\n");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1797,17 +1812,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit ed6f5d94b59b4f371f82d6059b88187c1583c0c4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 22 15:18:46 2019 +0800

    clk: rockchip: rk1808: print arm enter and init rate
    
    Change-Id: I14f0b0c95b1367266fe9c64050a602ad58208d53
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 1c7976460d..ad97d41332 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -38,6 +38,10 @@ struct rk1808_clk_priv {
 	ulong cpll_hz;
 	ulong gpll_hz;
 	ulong npll_hz;
+	ulong armclk_enter_hz;
+	ulong armclk_init_hz;
+	bool sync_kernel;
+	bool set_armclk_rate;
 };
 
 struct rk1808_pll {
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 4eddd0aaa9..9639065fc4 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -1072,11 +1072,19 @@ static int rk1808_clk_probe(struct udevice *dev)
 	struct rk1808_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	priv->sync_kernel = false;
+	if (!priv->armclk_enter_hz) {
+		priv->armclk_enter_hz =
+		rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+				      priv->cru, APLL);
+		priv->armclk_init_hz = priv->armclk_enter_hz;
+	}
 	if (rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
 				  priv->cru, APLL) != APLL_HZ) {
 		ret = rk1808_armclk_set_clk(priv, APLL_HZ);
 		if (ret < 0)
 			printf("%s failed to set armclk rate\n", __func__);
+		priv->armclk_init_hz = APLL_HZ;
 	}
 
 	priv->cpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
@@ -1090,6 +1098,8 @@ static int rk1808_clk_probe(struct udevice *dev)
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	else
+		priv->sync_kernel = true;
 
 	return 0;
 }
@@ -1165,6 +1175,7 @@ U_BOOT_DRIVER(rockchip_rk1808_cru) = {
 int soc_clk_dump(void)
 {
 	struct udevice *cru_dev;
+	struct rk1808_clk_priv *priv;
 	const struct rk1808_clk_info *clk_dump;
 	struct clk clk;
 	unsigned long clk_count = ARRAY_SIZE(clks_dump);
@@ -1179,7 +1190,14 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	priv = dev_get_priv(cru_dev);
+	printf("CLK: (%s. arm: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
+	       priv->sync_kernel ? "sync kernel" : "uboot",
+	       priv->armclk_enter_hz / 1000,
+	       priv->armclk_init_hz / 1000,
+	       priv->set_armclk_rate ? priv->armclk_hz / 1000 : 0,
+	       priv->set_armclk_rate ? " KHz" : "N/A");
+
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1193,17 +1211,17 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%s %s\n", clk_dump->name,
+					printf("  %s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%s %lu KHz\n", clk_dump->name,
+					printf("  %s %lu KHz\n", clk_dump->name,
 					       rate / 1000);
 			}
 		}

commit 231617c5abac65038e7732b2eb3a946fd9f66f72
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 21 17:59:06 2019 +0800

    rockchip: update TPL_MAX_SIZE for rk3288
    
    RK3288 sram size can be used for TPL is 32768
    
    Change-Id: I1b0ae5209d97f59b53349f6787439090539a5ac0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c16ad23909..7c6a22d51f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -202,7 +202,7 @@ config TPL_TEXT_BASE
 	default 0xff704000
 
 config TPL_MAX_SIZE
-	default 28672
+	default 32768
 
 config TPL_STACK
 	default 0xff718000

commit 2a987bff2b84c0e01aa6accaa1541c555dcbc843
Author: Chen Jinsen <kevin.chen@rock-chips.com>
Date:   Mon Jan 14 16:57:56 2019 +0800

    configs: rk3288: enable avb for Android P
    
    Change-Id: Ie06e7b32dcb49dbf385148a4b4414a2c5fefb36f
    Signed-off-by: Chen Jinsen <kevin.chen@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 96254a3f4f..318078ca23 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -94,3 +94,13 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_CMD_MMC=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index fe1abcb2d5..957f05735c 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -16,7 +16,7 @@
 #endif
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
 #define CONFIG_SPL_FRAMEWORK
@@ -33,6 +33,8 @@
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320A
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 8094aeb8cd9d7d6dc6134ebbdcc3859c6f98fff4
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jan 7 17:55:24 2019 -0800

    clk: rockchip: rv1108: add NANDC and SFC clk init
    
    Currently RV1108 run in 1.2G GPLL.
    NANDC need 1200 / 8 div = 150MHz.
    SFC need 1200 / 12 div = 100MHz.
    
    Change-Id: Ia3f401b0cf13587209d0d68d76a9891dd3bcf990
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index d220d0d3ff..0d1c1b0ae3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -193,6 +193,13 @@ enum {
 	EMMC_CLK_DIV_MASK	= 0xff << EMMC_CLK_DIV_SHIFT,
 
 	/* CLKSEL27_CON */
+	NANDC_PLL_SEL_SHIFT     = 14,
+	NANDC_PLL_SEL_MASK      = 3 << NANDC_PLL_SEL_SHIFT,
+	NANDC_PLL_SEL_CPLL      = 0,
+	NANDC_PLL_SEL_GPLL,
+	NANDC_CLK_DIV_SHIFT     = 8,
+	NANDC_CLK_DIV_MASK      = 0x1f << NANDC_CLK_DIV_SHIFT,
+
 	SFC_PLL_SEL_SHIFT		= 7,
 	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
 	SFC_PLL_SEL_DPLL		= 0,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 5dcc2f723c..4aeaf3a34e 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -652,6 +652,14 @@ static void rkclk_init(struct rv1108_cru *cru)
 
 	rk_clrsetreg(&cru->clksel_con[0], CORE_CLK_DIV_MASK,
 		     0 << MAC_CLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[27],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     7 << NANDC_CLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[27],
+		     SFC_PLL_SEL_MASK | SFC_CLK_DIV_MASK,
+		     SFC_PLL_SEL_GPLL << SFC_PLL_SEL_SHIFT |
+		     11 << SFC_CLK_DIV_SHIFT);
 
 	printf("APLL: %d DPLL:%d GPLL:%d\n", apll, dpll, gpll);
 	printf("ACLK_BUS: %d ACLK_PERI:%d HCLK_PERI:%d PCLK_PERI:%d\n",

commit 2400e5a499a5c384de1c26d7246a2c05f8c3e5ea
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Jan 22 14:13:43 2019 +0800

    video/drm: Kconfig: select generic phy by default
    
    Change-Id: I07fa63bfc1e03ed87c78555cb96d106c603d083a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index b2663d8f96..635e66b4ef 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -2,6 +2,7 @@ menuconfig DRM_ROCKCHIP
 	bool "Rockchip DRM Support"
 	depends on DM_VIDEO && OF_LIVE
 	select VIDEO_BRIDGE
+	select PHY
 	help
 	  Rockchip SoCs provide video output capabilities for High-Definition
 	  Multimedia Interface (HDMI), Low-voltage Differential Signalling

commit 2dfbc57d3acb669a9ec492014a5293aac8741261
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Tue Jan 22 16:03:21 2019 +0800

    configs: rk3368_defconfig: enable avb for rk3368
    
    Change-Id: I5180c70ef3cc4c1a091f1247ef0c4c4ba3800ed7
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 99da2a421b..dbfab2d6ce 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -16,7 +16,6 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_OEM_UNLOCK=y
 CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -102,4 +101,11 @@ CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_TEST_ROCKCHIP=y
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 1af7e3db4e..e7f4178f0c 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -17,7 +17,7 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit e92f47e4697f84ac102d1e52e1df25d512024ecd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jan 16 09:43:42 2019 +0800

    android: test the vbmeta to enable avb
    
    Change-Id: I36d6473a247ab7fc012ceb9a7c9a43e14e701611
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index e194e1d428..6419946131 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -28,6 +28,7 @@
 #define ANDROID_PARTITION_OEM  "oem"
 #define ANDROID_PARTITION_RECOVERY  "recovery"
 #define ANDROID_PARTITION_SYSTEM "system"
+#define ANDROID_PARTITION_VBMETA "vbmeta"
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
@@ -937,6 +938,8 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 #ifdef CONFIG_ANDROID_AVB
 	uint8_t vboot_flag = 0;
+	char vbmeta_partition[9] = {0};
+	disk_partition_t vbmeta_part_info;
 
 	if (trusty_read_vbootkey_enable_flag(&vboot_flag))
 		return -1;
@@ -947,11 +950,23 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 					slot_suffix))
 			return -1;
 	} else {
-		printf("SecureBoot disabled, AVB skip\n");
-		env_update("bootargs", "androidboot.verifiedbootstate=orange");
-		if (load_android_image(dev_desc, boot_partname,
-				       slot_suffix, &load_address))
-			return -1;
+		strcat(vbmeta_partition, ANDROID_PARTITION_VBMETA);
+		strcat(vbmeta_partition, slot_suffix);
+		part_num = part_get_info_by_name(dev_desc, vbmeta_partition,
+						 &vbmeta_part_info);
+		if (part_num < 0) {
+			printf("SecureBoot disabled, AVB skip\n");
+			env_update("bootargs",
+				   "androidboot.verifiedbootstate=orange");
+			if (load_android_image(dev_desc, boot_partname,
+					       slot_suffix, &load_address))
+				return -1;
+		} else {
+			printf("SecureBoot enabled, AVB verify\n");
+			if (android_slot_verify(boot_partname, &load_address,
+						slot_suffix))
+				return -1;
+		}
 	}
 #else
 	/*

commit 4b87bf17eae2049773ce151114b5f09321d2e8ab
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Mon Jan 21 19:34:45 2019 -0800

    configs: rk1808: enable SFC NAND
    
    1.enable SFC NAND
    2.change RKNAND to RKNANDC_NAND
    
    Change-Id: I788ed281d039a42d6ba1810d6960e1fc7c919180
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 5a66cb55d2..5ccc2606d1 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -64,8 +64,9 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
 CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
 CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff550000

commit 5aae54de7848d71d53913f773fa0c1a6bfea21ce
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Jun 3 16:50:20 2018 +0200

    UPSTREAM: rockchip: evb-rk3399: correct README for board bring up
    
    %s/rkflashtool/rkdeveloptool/
    
    We are using rkdeveloptool not rkflashtool.
    
    Change-Id: Icca82ca411f06d3ec5f578d8e4ac53fbbc486868
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 19ee1fae097325c7af4f18956c903d3ad15b43b7)

diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README
index 1b9a6ff09b..b7a7448957 100644
--- a/board/rockchip/evb_rk3399/README
+++ b/board/rockchip/evb_rk3399/README
@@ -61,7 +61,7 @@ Compile the U-Boot
 Compile the rkdeveloptool
 =======================
   Follow instructions in latest README
-  > cd ../rkflashtool
+  > cd ../rkdeveloptool
   > autoreconf -i
   > ./configure
   > make

commit b0df67a8f7ccce251e6c758f4bc186331cabbf44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:57:58 2019 +0800

    include: rk3188: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I362ff778dbdae42e667dcfc054dc1a0f5e06aa6c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 4d52e59a4d..cec22aacbe 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -64,9 +64,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62000000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit e8f1e17334d5e85589a00459f01edaf4b5f2f7c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:57:26 2019 +0800

    include: rk3128: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I229d5a996c445c1f956e51f0b35e43aa48cbcd1c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index fd7fce2c80..aaa2d22684 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -55,9 +55,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60500000\0" \
 	"pxefile_addr_r=0x60600000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62008000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 1b0a5f9d2c0ffd70e9c2b5ae3cc614e6864afc20
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:57:10 2019 +0800

    include: rk3036: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I6445227d6e36c4625a0c6badaf00c0cad0c9211c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 3f1b20f540..b5a0a66d2e 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -72,9 +72,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62000000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit 8dc327b1d8fc3adae57b1fa06c868d40990bc296
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:56:32 2019 +0800

    include: rk3066: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: Ida5470874e8373026112236db59d30ebd9c58f37
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index fec756cf7f..b45f92600a 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -53,9 +53,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62000000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit fe8a91a82898d166e9f20888231fd37463990bf8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:52:03 2019 +0800

    include: rk322x: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I01219b35b64148b4ae14bc45d69d14a3ef2e62b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 947bb176e2..d9935dd6c8 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -44,9 +44,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
-	"fdt_addr_r=0x61f00000\0" \
+	"fdt_addr_r=0x68300000\0" \
 	"kernel_addr_r=0x62008000\0" \
-	"ramdisk_addr_r=0x64000000\0"
+	"ramdisk_addr_r=0x6a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit ad4a812d55f9b4811cc4c3b5e90a8863c7e4c4e9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:51:22 2019 +0800

    include: px30: move fdt to 131M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img is safer.
    
    Change-Id: I7337924f9e09f8616577ddf8ca1e22d31a77e599
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 65335ce05d..4a4e72ba75 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -55,7 +55,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
 	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"

commit d499418e4f2df13271f7519fe04b25b55b46df9c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:50:39 2019 +0800

    include: rk3288: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I20248525ff5b99719bc9f7d0608723f67b728a7e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index a5f4a86faf..fe1abcb2d5 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -63,9 +63,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00000000\0" \
 	"pxefile_addr_r=0x00100000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x02008000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 

commit d9342fe94ad81cbb918f930dc248ff054f812a28
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:46:14 2019 +0800

    include: rk3328: move fdt to 131M and ramdisk to 162M
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img and moving ramdisk backward
    is safer.
    
    Change-Id: I8a74d0749bd76905a8ce8699bbf9eb6fb180c00e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 76ed911ef2..34608712fc 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -58,9 +58,9 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 35cad2073f7d34b4e6bd89987dbdc17a831aab78
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 18 14:45:06 2019 +0800

    include: rk3368: move fdt addr to 131MB
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img is safer.
    
    Change-Id: I182f5b49840d10a53fb026ee3e93cab6da2b4bb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index b82e9e2df2..1af7e3db4e 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -51,7 +51,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit 2e8ea5b0f6163026265de5e6859788a9f4eb872e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Dec 27 16:04:20 2018 +0800

    clk: rockchip: rk3288: support crypto clk setting
    
    Change-Id: I066ec163d959b95d0928e07716e3370715aa9898
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 954dd25cfa..4688fbb3b4 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -126,6 +126,10 @@ enum {
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
 	CLK_SARADC_DIV_CON_WIDTH	= 8,
 
+	/* CLKSEL26 */
+	CLK_CRYPTO_DIV_CON_SHIFT	= 6,
+	CLK_CRYPTO_DIV_CON_MASK		= GENMASK(7, 6),
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -802,6 +806,46 @@ static ulong rockchip_tsadc_set_clk(struct rk3288_cru *cru, uint hz)
 	return rockchip_tsadc_get_clk(cru);
 }
 
+static ulong rockchip_aclk_cpu_get_clk(struct rk3288_cru *cru, uint gclk_rate)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[1]);
+	div = (val & PD_BUS_ACLK_DIV0_MASK) >> PD_BUS_ACLK_DIV0_SHIFT;
+
+	return DIV_TO_RATE(gclk_rate, div);
+}
+
+#ifndef CONFIG_SPL_BUILD
+
+static ulong rockchip_crypto_get_clk(struct rk3288_cru *cru, uint gclk_rate)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[26]);
+	div = (val & CLK_CRYPTO_DIV_CON_MASK) >> CLK_CRYPTO_DIV_CON_SHIFT;
+
+	return DIV_TO_RATE(rockchip_aclk_cpu_get_clk(cru, gclk_rate), div);
+}
+
+static ulong rockchip_crypto_set_clk(struct rk3288_cru *cru,
+				     uint gclk_rate, uint hz)
+{
+	int src_clk_div;
+	uint p_rate;
+
+	p_rate = rockchip_aclk_cpu_get_clk(cru, gclk_rate);
+	src_clk_div = DIV_ROUND_UP(p_rate, hz) - 1;
+	assert(src_clk_div < 3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[26],
+		     CLK_CRYPTO_DIV_CON_MASK,
+		     src_clk_div << CLK_CRYPTO_DIV_CON_SHIFT);
+
+	return rockchip_crypto_get_clk(cru, gclk_rate);
+}
+#endif
+
 static ulong rk3288_clk_get_rate(struct clk *clk)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
@@ -842,6 +886,14 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case SCLK_TSADC:
 		new_rate = rockchip_tsadc_get_clk(priv->cru);
 		break;
+	case ACLK_CPU:
+		new_rate = rockchip_aclk_cpu_get_clk(priv->cru, gclk_rate);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+		new_rate = rockchip_crypto_get_clk(priv->cru, gclk_rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -910,6 +962,9 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		rk_clrreg(&cru->cru_clkgate_con[7], 1 << 9);
 		new_rate = rate;
 		break;
+	case SCLK_CRYPTO:
+		new_rate = rockchip_crypto_set_clk(priv->cru, gclk_rate, rate);
+		break;
 #endif
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index c86ae74381..4011fd9682 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -75,6 +75,7 @@
 #define SCLK_USBPHY480M_SRC	122
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
+#define SCLK_CRYPTO		125
 #define SCLK_MIPIDSI_24M	126
 
 #define SCLK_MAC_PLL		150

commit d480bdd7db201e2371bdbda91cc59ff4299b12c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 14 16:09:48 2019 +0800

    rk3399: move fdt addr to 131MB
    
    It avoids fdt overlap with large boot.img/recovery.img, moving
    fdt ahead of boot.img/recovery.img is safer.
    
    Change-Id: I7b2ac8a511a2ffcde127a707868e3fffded7b2f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 82ac90e8c5..70db093bed 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -58,7 +58,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x01f00000\0" \
+	"fdt_addr_r=0x08300000\0" \
 	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit c2ba77d93f696c0ccb8f2b653571104e7b4afb4e
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Sat Jan 5 12:11:22 2019 +0800

    lib: optee_client: Extract keymaster CA module
    
    Extract keymaster CA module from OpteeClientInterface
    refactoring code for keymaster reads and writes form caller module
    
    Change-Id: I1069fce0d29d9d9815f71e7f3b4d231754382acd
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index c13e0dcab0..f2671045a5 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -9,7 +9,7 @@
 #include <android_bootloader.h>
 #include <attestation_key.h>
 #include <boot_rkimg.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <keymaster.h>
 
 #define OEM_UNLOCK_ARG_SIZE 30
 
@@ -29,7 +29,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		return -ENODEV;
 	}
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 	disk_partition_t misc_part_info;
 
 	/* load attestation key from misc partition. */
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 14a1effd61..9492ecb018 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -84,7 +84,7 @@ config FASTBOOT_FLASH_MMC_DEV
 
 config FASTBOOT_OEM_UNLOCK
 	bool "Enable FASTBOOT OEM UNLOCK command"
-	depends on OPTEE_CLIENT
+	depends on ANDROID_KEYMASTER_CA
 	help
 	  This enables the command "fastboot oem unlock" the fastboot
 	  oem unlock command requires tee security storage to store
diff --git a/common/Kconfig b/common/Kconfig
index ce5ab8db21..edfeba7b94 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -610,6 +610,13 @@ config ANDROID_AVB
 	  to verify the boot images. The vbmeta must be matched with images,
 	  if not, verify failed.
 
+config ANDROID_KEYMASTER_CA
+	bool "Support Keymaster CA"
+	default y
+	depends on OPTEE_CLIENT
+	help
+	 This enable support read/write data in keymaster.
+
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
 	help
diff --git a/common/Makefile b/common/Makefile
index 4a7401f24a..1ea451c8ee 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -144,6 +144,6 @@ obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
 
-obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
-
 obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
+obj-$(CONFIG_ANDROID_KEYMASTER_CA) += keymaster.o
+obj-$(CONFIG_ANDROID_KEYMASTER_CA) += attestation_key.o
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 8f2077f6fa..e194e1d428 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -19,8 +19,9 @@
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <keymaster.h>
 #include <linux/libfdt_env.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -871,7 +872,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	if (part_num < 0)
 		printf("%s Could not find misc partition\n", __func__);
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 	/* load attestation key from misc partition. */
 	load_attestation_key(dev_desc, &misc_part_info);
 #endif
diff --git a/common/attestation_key.c b/common/attestation_key.c
index d90d8d9b78..80121a625d 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <malloc.h>
 
-#include <optee_include/OpteeClientApiLib.h>
+#include <keymaster.h>
 
 /* attestation data offset */
 #define ATTESTATION_DATA_OFFSET  65536
diff --git a/common/keymaster.c b/common/keymaster.c
new file mode 100644
index 0000000000..8caa9f5528
--- /dev/null
+++ b/common/keymaster.c
@@ -0,0 +1,234 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <keymaster.h>
+#include <common.h>
+#include <boot_rkimg.h>
+#include <malloc.h>
+
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+
+TEEC_Result read_from_keymaster(uint8_t *filename,
+				uint32_t filename_size,
+				uint8_t *data,
+				uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5,
+			       0x698b,
+			       0x4142,
+			       { 0x82, 0xb8, 0x3a,
+				 0xcf, 0x16, 0xe9,
+				 0x9e, 0x2a } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("read_from_keymaster start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a =
+					 (dev_desc->if_type == IF_TYPE_MMC)
+					 ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(data, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("read_from_keymaster end\n");
+
+	return TeecResult;
+}
+
+TEEC_Result write_to_keymaster(uint8_t *filename,
+			       uint32_t filename_size,
+			       uint8_t *data,
+			       uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x1b484ea5,
+			       0x698b,
+			       0x4142,
+			       { 0x82, 0xb8, 0x3a,
+				 0xcf, 0x16, 0xe9,
+				 0x9e, 0x2a } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	debug("write_to_keymaster\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC)
+					   ? 1 : 0;
+
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+
+	NULL, &TeecOperation, &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = data_size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, data, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("write_to_keymaster end\n");
+	debug("TeecResult %x\n", TeecResult);
+
+	return TeecResult;
+}
+
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = write_to_keymaster((uint8_t *)file,
+				 strlen(file),
+				 (uint8_t *)&unlock,
+				 1);
+	return ret;
+}
+
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = read_from_keymaster((uint8_t *)file,
+				   strlen(file),
+				   unlock,
+				   1);
+
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+		debug("init oem unlock status 0");
+		ret = trusty_write_oem_unlock(0);
+	}
+
+	return ret;
+}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 3bd1d7a1b8..6613935254 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -39,6 +39,9 @@
 #endif
 #include <boot_rkimg.h>
 #include <optee_include/tee_client_api.h>
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
+#include <keymaster.h>
+#endif
 
 #define FASTBOOT_VERSION		"0.4"
 
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 0de56532b1..1e9e982762 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -363,11 +363,13 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 			} else {
 				/* RPMB */
 #ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ANDROID_KEYMASTER_CA
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
 				if (rc < 0)
 					return -EIO;
+#endif
 #endif
 			}
 
diff --git a/include/keymaster.h b/include/keymaster.h
new file mode 100644
index 0000000000..22908b8302
--- /dev/null
+++ b/include/keymaster.h
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef KEYMASTER_H_
+#define KEYMASTER_H_
+
+#include <optee_include/tee_client_api.h>
+
+/*
+ * read data from rk_keymaster
+ *
+ * @felename:           the filename of the saved data to read
+ * @filename_size:      size of filename
+ * @data:               the buffer used to read data from rk_keymaster
+ * @data_size:          buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result read_from_keymaster(uint8_t *filename,
+				uint32_t filename_size,
+				uint8_t *data,
+				uint32_t data_size);
+
+/*
+ * write data to rk_keymaster
+ *
+ * @felename:           the filename of the saved data to read
+ * @filename_size:      size of filename
+ * @data:               the buffer used to read data from rk_keymaster
+ * @data_size:          buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result write_to_keymaster(uint8_t *filename,
+			       uint32_t filename_size,
+			       uint8_t *data,
+			       uint32_t data_size);
+
+/*
+ * read oem unlock status from rk_keymaster
+ *
+ * @unlock:used to read oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
+
+/*
+ * update oem unlock status to rk_keymaster
+ *
+ * @unlock: oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
+
+#endif  //KEYMASTER_H_
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 93470d3004..7475f6e3e5 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -24,22 +24,6 @@ uint32_t trusty_write_lock_state(uint8_t lock_state);
 uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
 uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
 
-/*
- * read data from rk_keymaster
- *
- * @filename:		the filename of the saved data to read
- * @filename_size: 	size of filename
- * @data: 		the buffer used to read data from rk_keymaster
- * @data_size: 		buffer size of the data
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result read_from_keymaster
-	(uint8_t *filename, uint32_t filename_size,
-	uint8_t *data, uint32_t data_size);
-uint32_t write_to_keymaster
-	(uint8_t *filename, uint32_t filename_size,
-	uint8_t *data, uint32_t data_size);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
@@ -55,22 +39,4 @@ uint32_t trusty_attest_get_ca
 	 uint8_t *out, uint32_t *out_len);
 uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size);
 
-/*
- * read oem unlock status from rk_keymaster
- *
- * @unlock:used to read oem unlock status code,0:locked,1:unlocked
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
-
-/*
- * update oem unlock status to rk_keymaster
- *
- * @unlock: oem unlock status code,0:locked,1:unlocked
- *
- * @return a positive number in case of error, or 0 on success.
- */
-TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
-
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 8da90cc72e..a124860792 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -805,180 +805,6 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	return TeecResult;
 }
 
-TEEC_Result read_from_keymaster(uint8_t *filename,
-		uint32_t filename_size,
-		uint8_t *data,
-		uint32_t size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	debug("read_from_keymaster start\n");
-	OpteeClientApiLibInitialize();
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult == TEEC_SUCCESS)
-		memcpy(data, SharedMem1.buffer, SharedMem1.size);
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-	debug("read_from_keymaster end\n");
-
-	return TeecResult;
-}
-
-uint32_t write_to_keymaster(uint8_t *filename,
-		uint32_t filename_size,
-		uint8_t *data,
-		uint32_t data_size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-	TEEC_UUID *TeecUuid = &tempuuid;
-	TEEC_Operation TeecOperation = {0};
-	struct blk_desc *dev_desc;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	debug("write_to_keymaster\n");
-	OpteeClientApiLibInitialize();
-
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						TEEC_NONE,
-						TEEC_NONE,
-						TEEC_NONE);
-	/*0 nand or emmc "security" partition , 1 rpmb*/
-	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				&TeecSession,
-				TeecUuid,
-				TEEC_LOGIN_PUBLIC,
-				NULL,
-				&TeecOperation,
-				&ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = data_size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	memcpy(SharedMem1.buffer, data, SharedMem1.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						TEEC_MEMREF_TEMP_INOUT,
-						TEEC_NONE,
-						TEEC_NONE);
-
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
-					&TeecOperation,
-					&ErrorOrigin);
-
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-	debug("write_to_keymaster end\n");
-	debug("TeecResult %x\n", TeecResult);
-
-	return TeecResult;
-}
-
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
 {
 	TEEC_Result TeecResult;
@@ -1806,29 +1632,3 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 
 	return TeecResult;
 }
-
-TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
-{
-	char *file = "oem.unlock";
-	TEEC_Result ret;
-
-	ret = write_to_keymaster((uint8_t *)file, strlen(file),
-		(uint8_t *)&unlock, 1);
-	return ret;
-}
-
-TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
-{
-	char *file = "oem.unlock";
-	TEEC_Result ret;
-
-	ret = read_from_keymaster((uint8_t *)file, strlen(file),
-		unlock, 1);
-
-	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
-		debug("init oem unlock status 0");
-		ret = trusty_write_oem_unlock(0);
-	}
-
-	return ret;
-}

commit dfbf26e839a9691c1ccc72eba0da5be75634ed2a
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Fri Jan 4 16:03:30 2019 +0800

    lib: optee_client: move keybox code to write_keybox.c
    
    Change-Id: Ifcd9962a8b802ee2bcbdbd0e88effb4485e5963a
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 980fb15643..ce5ab8db21 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -594,6 +594,13 @@ config ANDROID_AB
 	  allows a bootloader to try a new version of the system but roll back
 	  to previous version if the new one didn't boot all the way.
 
+config ANDROID_WRITE_KEYBOX
+	bool "Support Write Keybox"
+	default y
+	depends on OPTEE_CLIENT
+	help
+	  This enable support write keybox to secure storage.
+
 config ANDROID_AVB
 	bool"Support Android Verified Boot"
 	default n
diff --git a/common/Makefile b/common/Makefile
index 47e291daa1..4a7401f24a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -145,3 +145,5 @@ obj-y += s_record.o
 obj-y += xyzModem.o
 
 obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
+
+obj-$(CONFIG_ANDROID_WRITE_KEYBOX) += write_keybox.o
diff --git a/common/write_keybox.c b/common/write_keybox.c
new file mode 100644
index 0000000000..6198793bc1
--- /dev/null
+++ b/common/write_keybox.c
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
+#include <boot_rkimg.h>
+#include <stdlib.h>
+#include <attestation_key.h>
+#include "write_keybox.h"
+
+#define	BOOT_FROM_EMMC	(1 << 1)
+#define	WIDEVINE_TAG	"KBOX"
+#define	ATTESTATION_TAG	"ATTE"
+
+uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
+			      TEEC_UUID uuid,
+			      uint8_t *key, uint32_t key_size,
+			      uint8_t *data, uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID *TeecUuid = &uuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/* 0 nand or emmc "security" partition , 1 rpmb */
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = key_size;
+	SharedMem1.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+	memcpy(SharedMem1.buffer, key, SharedMem1.size);
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = data_size;
+	SharedMem2.flags = 0;
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+	memcpy(SharedMem2.buffer, data, SharedMem2.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[2].tmpref.size = SharedMem2.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE);
+
+	printf("write keybox to secure storage\n");
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					6,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS)
+		printf("send data to TA failed with code 0x%x\n", TeecResult);
+	else
+		printf("send data to TA success with code 0x%x\n", TeecResult);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len)
+{
+	uint32_t key_size;
+	uint32_t data_size;
+	TEEC_Result ret;
+	int rc = 0;
+
+	if (memcmp(received_data, WIDEVINE_TAG, 4) == 0) {
+		/* widevine keybox */
+		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+
+		key_size = *(received_data + 4);
+		data_size = *(received_data + 8);
+
+		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
+					   sizeof("widevine_keybox"),
+					   widevine_uuid,
+					   received_data + 12,
+					   key_size,
+					   received_data + 12 + key_size,
+					   data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write widevine keybox to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write widevine keybox to secure storage fail\n");
+		}
+	} else if (memcmp(received_data, ATTESTATION_TAG, 4) == 0) {
+		/* attestation key */
+		atap_result ret;
+
+		ret = write_attestation_key_to_secure_storage(received_data, len);
+		if (ret == ATAP_RESULT_OK) {
+			rc = 0;
+			printf("write attestation key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write attestation key to secure storage fail\n");
+		}
+	}
+	return rc;
+}
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 114da0bbc4..0de56532b1 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -8,7 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
-#include <optee_include/OpteeClientInterface.h>
+#include <write_keybox.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index fb859d6924..93470d3004 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -40,7 +40,6 @@ TEEC_Result read_from_keymaster
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
-int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
diff --git a/include/write_keybox.h b/include/write_keybox.h
new file mode 100644
index 0000000000..59991f83a5
--- /dev/null
+++ b/include/write_keybox.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef WRITE_KEYBOX_H_
+#define	WRITE_KEYBOX_H_
+
+#include <common.h>
+
+/*
+ * write_keybox_to_secure_storage
+ *
+ * @received_data:	the data received from usb
+ * @len:		size of received_data
+ *
+ * @return a negative number in case of error, or 0 on success.
+ */
+uint32_t write_keybox_to_secure_storage(uint8_t *received_data, uint32_t len);
+#endif
+
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index e41388b185..8da90cc72e 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -14,157 +14,6 @@
 #include <attestation_key.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
-#define	WIDEVINE_TAG	"KBOX"
-#define	ATTESTATION_TAG	"ATTE"
-
-uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
-			      TEEC_UUID uuid,
-			      uint8_t *key, uint32_t key_size,
-			      uint8_t *data, uint32_t data_size)
-{
-	TEEC_Result TeecResult;
-	TEEC_Context TeecContext;
-	TEEC_Session TeecSession;
-	uint32_t ErrorOrigin;
-
-	TEEC_UUID *TeecUuid = &uuid;
-	TEEC_Operation TeecOperation = {0};
-
-	struct blk_desc *dev_desc;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: dev_desc is NULL!\n", __func__);
-		return -TEEC_ERROR_GENERIC;
-	}
-
-	OpteeClientApiLibInitialize();
-	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
-						    TEEC_NONE,
-						    TEEC_NONE,
-						    TEEC_NONE);
-
-	/* 0 nand or emmc "security" partition , 1 rpmb */
-	TeecOperation.params[0].value.a =
-		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
-#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	TeecOperation.params[0].value.a = 0;
-#endif
-	TeecResult = TEEC_OpenSession(&TeecContext,
-				      &TeecSession,
-				      TeecUuid,
-				      TEEC_LOGIN_PUBLIC,
-				      NULL,
-				      &TeecOperation,
-				      &ErrorOrigin);
-
-	TEEC_SharedMemory SharedMem0 = {0};
-
-	SharedMem0.size = filename_size;
-	SharedMem0.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
-
-	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
-
-	TEEC_SharedMemory SharedMem1 = {0};
-
-	SharedMem1.size = key_size;
-	SharedMem1.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
-
-	memcpy(SharedMem1.buffer, key, SharedMem1.size);
-
-	TEEC_SharedMemory SharedMem2 = {0};
-
-	SharedMem2.size = data_size;
-	SharedMem2.flags = 0;
-
-	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
-
-	memcpy(SharedMem2.buffer, data, SharedMem2.size);
-
-	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
-	TeecOperation.params[0].tmpref.size = SharedMem0.size;
-
-	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
-	TeecOperation.params[1].tmpref.size = SharedMem1.size;
-
-	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
-	TeecOperation.params[2].tmpref.size = SharedMem2.size;
-
-	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INPUT,
-						    TEEC_MEMREF_TEMP_INOUT,
-						    TEEC_NONE);
-
-	printf("write keybox to secure storage\n");
-	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					6,
-					&TeecOperation,
-					&ErrorOrigin);
-	if (TeecResult != TEEC_SUCCESS) {
-		printf("send data to TA failed with code 0x%x\n", TeecResult);
-	} else {
-		printf("send data to TA success with code 0x%x\n", TeecResult);
-	}
-
-	TEEC_ReleaseSharedMemory(&SharedMem0);
-	TEEC_ReleaseSharedMemory(&SharedMem1);
-	TEEC_ReleaseSharedMemory(&SharedMem2);
-
-	TEEC_CloseSession(&TeecSession);
-	TEEC_FinalizeContext(&TeecContext);
-
-	return TeecResult;
-}
-
-int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
-{
-	uint32_t key_size;
-	uint32_t data_size;
-	TEEC_Result ret;
-	int rc = 0;
-
-	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
-		/* widevine keybox */
-		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
-			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
-
-		key_size = *(uboot_data + 4);
-		data_size = *(uboot_data + 8);
-
-		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
-					   sizeof("widevine_keybox"),
-					   widevine_uuid,
-					   uboot_data + 12,
-					   key_size,
-					   uboot_data + 12 + key_size,
-					   data_size);
-		if (ret == TEEC_SUCCESS) {
-			rc = 0;
-			printf("write widevine keybox to secure storage success\n");
-		} else {
-			rc = -EIO;
-			printf("write widevine keybox to secure storage fail\n");
-		}
-	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
-		/* attestation key */
-		atap_result ret;
-
-		ret = write_attestation_key_to_secure_storage(uboot_data, len);
-		if (ret == ATAP_RESULT_OK) {
-			rc = 0;
-			printf("write attestation key to secure storage success\n");
-		} else {
-			rc = -EIO;
-			printf("write attestation key to secure storage fail\n");
-		}
-	}
-	return rc;
-}
 
 void test_optee(void)
 {

commit ee9d343315efa249bd06969d542ad421784dece9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 14 18:28:02 2019 +0800

    lib: avb: fix fail to read PIK minimum
    
    Do not update the PIK version if it is equal to the value in the storage,
    otherwise the error may occur in power failure test.
    
    Change-Id: Ia478d9b404de3982b4de5b185e15d181b37f5fd9
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
old mode 100755
new mode 100644
index 38fe2c6cfb..ba20a41fc8
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -370,6 +370,12 @@ static void avb_set_key_version(AvbAtxOps *atx_ops,
 				uint64_t key_version)
 {
 #ifdef CONFIG_OPTEE_CLIENT
+	uint64_t key_version_temp = 0;
+
+	if (trusty_read_rollback_index(rollback_index_location, &key_version_temp))
+		printf("%s: Fail to read rollback index\n", __FILE__);
+	if (key_version_temp == key_version)
+		return;
 	if (trusty_write_rollback_index(rollback_index_location, key_version))
 		printf("%s: Fail to write rollback index\n", __FILE__);
 #endif

commit fda8d8733197b2e36a551d20f88252d078b1660a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jan 15 15:43:23 2019 +0800

    clk: rockchip: px30: modify the dclk divider to even
    
    When DCLK use CPLL alone, the DCLK timing is critical value.
    The odd-divider spacing ratio is not 50%,
    it will affect the setup time of the display.
    Therefore, it is suggested that we use even-divider
    to make the spacing ratio is 50%.
    
    Change-Id: I07c0fd57dd1f27984f8186f1d7c2f96df2ea10a3
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index d9ab5875f4..88f44406fe 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -791,10 +791,13 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			     (src_clk_div - 1) << ACLK_VO_DIV_SHIFT);
 		break;
 	case DCLK_VOPB:
-		if (hz < PX30_VOP_PLL_LIMIT)
+		if (hz < PX30_VOP_PLL_LIMIT) {
 			src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
-		else
+			if (src_clk_div % 2)
+				src_clk_div = src_clk_div - 1;
+		} else {
 			src_clk_div = 1;
+		}
 		assert(src_clk_div - 1 <= 255);
 		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz * src_clk_div);
 		rk_clrsetreg(&cru->clksel_con[5],
@@ -810,10 +813,13 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			src_clk_div = npll_hz / hz;
 			assert(src_clk_div - 1 <= 255);
 		} else {
-			if (hz < PX30_VOP_PLL_LIMIT)
+			if (hz < PX30_VOP_PLL_LIMIT) {
 				src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
-			else
+				if (src_clk_div % 2)
+					src_clk_div = src_clk_div - 1;
+			} else {
 				src_clk_div = 1;
+			}
 			assert(src_clk_div - 1 <= 255);
 			rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, hz * src_clk_div);
 		}

commit f9ca6757d601c23e457b093f2a12455fdad5efba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 19:54:18 2019 +0800

    rockchip: rk3308: move fdt_addr_r ahead of ramdisk_addr_r for aarch32
    
    currently, there is only 2MB size gap between ramdisk and fdt,
    which may cause a ram overlap.
    
    Change-Id: Id863f15d7ddf7ec2a3d92029ad474ece05d30916
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 66ed3bc7ad..50b931322d 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -61,7 +61,7 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x03200000\0" \
+	"fdt_addr_r=0x02f00000\0" \
 	"kernel_addr_r=0x00058000\0" \
 	"kernel_addr_c=0x2008000\0" \
 	"ramdisk_addr_r=0x03080000\0"

commit c337a3c2b1d313fad721a07cf79a285258b45c26
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jan 11 10:23:26 2019 +0800

    cmd: memtester: add test mask for test stuck address
    
    Change-Id: Icbcf7e460befcc098c45e4e3efb7fb3c1bcb73a0
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 3c16569eaf..8f624edbd2 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -98,11 +98,13 @@ int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
 			if (loops)
 				printf("/%lu", loops);
 			printf(":\n");
-			printf("  %-20s: ", "Stuck Address");
-			if (!test_stuck_address(bufa[j], count[j] * 2))
-				printf("ok\n");
-			else
-				exit_code |= EXIT_FAIL_ADDRESSLINES;
+			if (testenable && ((1 << 17) & testenable)) {
+				printf("  %-20s: ", "Stuck Address");
+				if (!test_stuck_address(bufa[j], count[j] * 2))
+					printf("ok\n");
+				else
+					exit_code |= EXIT_FAIL_ADDRESSLINES;
+			}
 			for (i = 0;; i++) {
 				if (!tests[i].name)
 					break;
@@ -215,6 +217,7 @@ U_BOOT_CMD(memtester, 6, 1, do_memtester,
 	   "	bit14: Walking Zeroes\n"
 	   "	bit15: 8-bit Writes\n"
 	   "	bit16: 16-bit Writes\n"
+	   "	bit17: test stuck address\n"
 	   "	example: testenable=0x1000,enable Bit Flip only\n"
 	   "err_exit: if 1 stop testing immediately when finding error\n"
 	   "loop[option]: testing loop, if 0 or null endless loop\n"

commit 660ca12ed9a639109b7adde2f1ff137918040793
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Wed Jan 9 23:15:48 2019 -0800

    rkflash: avoid danger of abnormal power lost
    
    Change-Id: I304567ff15e34643c5e0fb32625d67e4f6f54f12
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 50cee9ed68..71ed9694ad 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -125,6 +125,7 @@ static void flash_erase_cmd(u8 cs, u32 page_addr)
 
 static void flash_prog_second_cmd(u8 cs, u32 page_addr)
 {
+	udelay(100);
 	nandc_writel(PAGE_PROG_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
 }
 

commit 933ae82de18afde42405390be9e372080b7a0d9a
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jan 14 20:15:36 2019 +0800

    rockchip: dts: rk3399: add u-boot,dm-pre-reloc for usb2 phy
    
    The usb vbus detection is depend on the usb2 phy driver.
    This patch fix the usb vbus detection issue if there is
    no valid kernel dtb, and make rockusb to enter download
    mode successfully.
    
    Change-Id: Icf86cfaf67e20f2368370eb2aedc4fa9d5777c50
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 985257cfb8..21196f4c78 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -76,3 +76,13 @@
 &emmc_phy {
 	u-boot,dm-pre-reloc;
 };
+
+&u2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit c0b4a82d396c44e9a8222946b6c5158a9c55a86b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 16:10:53 2019 +0800

    cmd: nvedit: add "0x" prefix for hex value
    
    Change-Id: Idab53a89d363a9fae6bf3aa98c99f9ba246e5ff9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 528b808c2b..83d14eb794 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -658,9 +658,9 @@ int env_set_ulong(const char *varname, ulong value)
  */
 int env_set_hex(const char *varname, ulong value)
 {
-	char str[17];
+	char str[19];
 
-	sprintf(str, "%lx", value);
+	sprintf(str, "0x%lx", value);
 	return env_set(varname, str);
 }
 

commit 45ec578384b9f9bbf0ea345c7a7fd81c95534a99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 16:09:38 2019 +0800

    dm: regulator: avoid double print voltage
    
    regulator would print value when set init voltage.
    
    Change-Id: I8bc9df40d452ae89cced7145e8760e29d7339ac8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index a883ea0f1a..e902571c2c 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -276,7 +276,8 @@ int regulator_autoset(struct udevice *dev)
 	} else {
 		if ((uc_pdata->type == REGULATOR_TYPE_BUCK) &&
 		    (uc_pdata->min_uV != -ENODATA) &&
-		    (uc_pdata->max_uV != -ENODATA))
+		    (uc_pdata->max_uV != -ENODATA) &&
+		    (uc_pdata->init_uV <= 0))
 			printf("%s %d uV\n",
 			       uc_pdata->name, regulator_get_value(dev));
 	}

commit d549e1d1e1296cdae3e30bba330a88d71217e7a8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 14 11:34:49 2019 +0800

    android: add androidboot.verifiedbootstate
    
    Since the androidboot.verifiedbootstate is required in android Pie, so add
    it to bootargs when secure boot flag is not set.
    
    Change-Id: I4a883ca87bbba321a894ee66ebcf0ff9d5cb6ca8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d9914da3bf..8f2077f6fa 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -947,6 +947,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 			return -1;
 	} else {
 		printf("SecureBoot disabled, AVB skip\n");
+		env_update("bootargs", "androidboot.verifiedbootstate=orange");
 		if (load_android_image(dev_desc, boot_partname,
 				       slot_suffix, &load_address))
 			return -1;

commit e9dcade2a7efbd44bdb5c906e7c384805d0b73ff
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Jan 14 09:21:05 2019 +0800

    clk: rockchip: rk322x: add clk_set_defaults for clk init
    
    Change-Id: Ie2bcdf77bb7cdeb9c27b482ce70e4af35fbdc8c6
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index b6c437f607..4f71e170da 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -980,7 +980,12 @@ static int rk322x_clk_probe(struct udevice *dev)
 {
 #ifndef CONFIG_TPL_BUILD
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
+	int ret = 0;
+
 	rkclk_init(priv);
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 #endif
 	return 0;
 }

commit d4eae7f5feecb47401382e92cf7d3e5430b9dd44
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Dec 28 15:38:25 2018 +0800

    cmd: memtester: move some common code to ddr_tester_common.c
    
    1. Moving some common code to ddr_tester_common.c to share with ddr tool.
    2. io_map.c get dram bandwidth by using get_ddr_bw().
    
    Change-Id: I90641f35c4474846a2357f4959415bfaa6230769
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/Makefile b/cmd/memtester/Makefile
index ad7f391227..6a4347a57a 100644
--- a/cmd/memtester/Makefile
+++ b/cmd/memtester/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_CMD_MEMTESTER) += tests.o
 obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
 obj-$(CONFIG_CMD_MEMTESTER) += io_map.o
+obj-$(CONFIG_CMD_MEMTESTER) += ddr_tester_common.o
diff --git a/cmd/memtester/ddr_tester_common.c b/cmd/memtester/ddr_tester_common.c
new file mode 100644
index 0000000000..93f9f09e99
--- /dev/null
+++ b/cmd/memtester/ddr_tester_common.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <power/regulator.h>
+#include "ddr_tester_common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void write_buf_to_ddr(u32 *buf, u32 buf_len, ulong start_adr, ulong length)
+{
+	ulong *buful = (ulong *)buf;
+	ulong *p = (ulong *)start_adr;
+	u32 i, j;
+
+	buf_len = buf_len / sizeof(ulong) - 1;
+
+	for (i = 0, j = 0; i < length / sizeof(p[0]); i++) {
+		p[i] = buful[j];
+		j++;
+		j &= buf_len;
+	}
+}
+
+ulong cmp_buf_data(u32 *buf, u32 buf_len, ulong start_adr, ulong length,
+		   u32 prt_en)
+{
+	ulong *buful = (ulong *)buf;
+	volatile unsigned long *p = (volatile unsigned long *)start_adr;
+	u32 i, j;
+	ulong reread = 0;
+	ulong wr_val = 0;
+	ulong val = 0;
+	ulong err_adr = 0;
+
+	buf_len = buf_len / sizeof(ulong) - 1;
+	err_adr = 0;
+	for (i = 0, j = 0; i < length / sizeof(p[0]); i++) {
+		val = p[i];
+		if (val != buful[j]) {
+			flush_dcache_range((ulong)&p[i],
+					   (ulong)&p[i] + sizeof(u32));
+			reread = p[i];
+			err_adr = (ulong)&p[i];
+			wr_val = buful[j];
+			break;
+		}
+		j++;
+		j &= buf_len;
+	}
+	if (err_adr && prt_en)
+		printf("test fail:address:0x%lx,read:0x%lx,"
+		       "reread:0x%lx,expect:0x%lx\n",
+		       err_adr, val, reread, wr_val);
+
+	return err_adr;
+}
+
+void print_memory(void *addr, ulong size)
+{
+	u32 *p = addr;
+	u32 i;
+
+	for (i = 0; i < size / 4; i += 4) {
+		printf("0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
+		       (ulong)&p[i], p[i], p[i + 1], p[i + 2], p[i + 3]);
+	}
+}
+
+/* print available address for ddr testing in uboot */
+void get_print_available_addr(ulong *start_adr, ulong *length, int print_en)
+{
+	u32 i, max_bank = 0;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		if (gd->bd->bi_dram[i].start)
+			max_bank = i + 1;
+		start_adr[i] = 0;
+		length[i] = 0;
+	}
+
+	for (i = 0; i < max_bank; i++) {
+		start_adr[i] = gd->bd->bi_dram[i].start;
+		length[i] = gd->bd->bi_dram[i].size;
+	}
+
+	length[max_bank - 1] = (gd->start_addr_sp - RESERVED_SP_SIZE -
+			start_adr[max_bank - 1]) & ~0xfff;
+	if (print_en) {
+		printf("available memory for test:\n");
+		printf("	start		 end	length\n");
+		for (i = 0; i < max_bank; i++)
+			if (start_adr[i])
+				printf("	0x%08lx - 0x%08lx 0x%08lx\n",
+				       start_adr[i], start_adr[i] + length[i],
+				       length[i]);
+	}
+}
+
+/*
+ * judge if testing address is available
+ * arg[0]:start addr, arg[1]:length, return test banks number
+ */
+int judge_test_addr(ulong *arg, ulong *start_adr, ulong *length)
+{
+	u32 i, max_bank = 0;
+	u32 available = 0;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
+		if (start_adr[i])
+			max_bank = i + 1;
+
+	if (!arg[1])
+		return max_bank;
+
+	for (i = 0; i < max_bank; i++)
+		if (arg[0] >= start_adr[i] &&
+		    arg[0] + arg[1] <= start_adr[i] + length[i])
+			available |= 1;
+	if (!available) {
+		printf("Invalid test address\n");
+	} else {
+		start_adr[0] = arg[0];
+		length[0] = arg[1];
+		for (i = 1; i < max_bank; i++) {
+			start_adr[i] = 0;
+			length[i] = 0;
+		}
+	}
+
+	return available;
+}
+
+int set_vdd_logic(u32 uv)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = regulator_get_by_platname("vdd_logic", &dev);
+	if (ret) {
+		printf("Cannot set regulator name\n");
+		return ret;
+	}
+
+	/* Slowly raise to max CPU voltage to prevent overshoot */
+	ret = regulator_set_value(dev, uv);
+	udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
+	if (ret)
+		printf("set vdd_logic fail\n");
+	return ret;
+}
+
diff --git a/cmd/memtester/ddr_tester_common.h b/cmd/memtester/ddr_tester_common.h
new file mode 100644
index 0000000000..2ff3fd7e8d
--- /dev/null
+++ b/cmd/memtester/ddr_tester_common.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
+ */
+
+/* Function declaration. */
+#ifndef _CMD_MEMTESTER_DDR_TOOL_COMMON_H
+#define _CMD_MEMTESTER_DDR_TOOL_COMMON_H
+
+/* reserved 1MB for stack */
+#define RESERVED_SP_SIZE		0x100000
+
+void write_buf_to_ddr(u32 *buf, u32 buf_len, ulong start_adr, ulong length);
+ulong cmp_buf_data(u32 *buf, u32 buf_len, ulong start_adr,
+		   ulong length, u32 prt_en);
+void print_memory(void *addr, ulong size);
+void get_print_available_addr(ulong *start_adr, ulong *length, int print_en);
+int judge_test_addr(ulong *arg, ulong *start_adr, ulong *length);
+int set_vdd_logic(u32 uv);
+#endif /* _CMD_MEMTESTER_DDR_TOOL_COMMON_H */
diff --git a/cmd/memtester/io_map.c b/cmd/memtester/io_map.c
index 88b0d3b66a..ed45a0137e 100644
--- a/cmd/memtester/io_map.c
+++ b/cmd/memtester/io_map.c
@@ -1,25 +1,16 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
 /*
- * Very simple but very effective user-space memory tester.
- * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
- * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
- * Version 3 not publicly released.
- * Version 4 rewrite:
- * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
- * Licensed under the terms of the GNU General Public License version 2 (only).
- * See the file COPYING for details.
- *
- * This file contains the functions for the actual tests, called from the
- * main routine in memtester.c.  See other comments in that file.
- *
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd.
  */
+
 #include <common.h>
+#include <asm/arch/sdram_common.h>
 #include "io_map.h"
 
-#define IO_TYPE_1_1_16	0
-#define IO_TYPE_1_1_32	1
-#define IO_TYPE_1_2		2
-#define IO_TYPE_2		3
+#define IO_TYPE_1_1_16		0	/* up1 1:1 mode 16bit */
+#define IO_TYPE_1_1_32		1	/* up1 1:1 mode 32bit */
+#define IO_TYPE_1_2		2	/* up1 1:2 mode */
+#define IO_TYPE_2		3	/* up2 */
 
 static u32 io_type;
 
@@ -27,7 +18,7 @@ static u32 io_type;
 int data_cpu_2_io(void *p, u32 len)
 {
 	uchar *val = p;
-	uchar buf[16];
+	uchar buf[CPU_2_IO_ALIGN_LEN];
 	u32 i, j;
 
 	if ((len % sizeof(buf)) || !len)
@@ -56,9 +47,6 @@ int data_cpu_2_io(void *p, u32 len)
 
 void data_cpu_2_io_init(void)
 {
-	u32 osreg = 0;
-	u32 bw;
-
 #if defined(CONFIG_ROCKCHIP_RK3036)
 	io_type = IO_TYPE_1_1_16;
 #elif defined(CONFIG_ROCKCHIP_RK3228) ||	\
@@ -66,12 +54,16 @@ void data_cpu_2_io_init(void)
 	defined(CONFIG_ROCKCHIP_RK3368) ||	\
 	defined(CONFIG_ROCKCHIP_RK3366)
 	io_type = IO_TYPE_1_2;
-#elif defined(CONFIG_ROCKCHIP_RK3128)
-	osreg = 0x200081cc;
-#elif defined(CONFIG_ROCKCHIP_RK3288)
-	osreg = 0xff73009c;
-#elif defined(CONFIG_ROCKCHIP_RK3188)
-	osreg = 0x20004048;
+#elif defined(CONFIG_ROCKCHIP_RK3128) || \
+	defined(CONFIG_ROCKCHIP_RK3288) ||	\
+	defined(CONFIG_ROCKCHIP_RK3288)
+	u32 bw;
+
+	bw = get_ddr_bw();
+	if (bw == 2)
+		io_type = IO_TYPE_1_1_32;
+	else
+		io_type = IO_TYPE_1_1_16;
 #elif defined(CONFIG_ROCKCHIP_RK3328) || \
 	defined(CONFIG_ROCKCHIP_PX30) ||	\
 	defined(CONFIG_ROCKCHIP_RK1808)
@@ -79,13 +71,5 @@ void data_cpu_2_io_init(void)
 #else
 	io_type = IO_TYPE_2;
 #endif
-
-	if (osreg) {
-		bw = (2 >> ((osreg >> 2) & 0x3));
-		if (bw == 2)
-			io_type = IO_TYPE_1_1_32;
-		else
-			io_type = IO_TYPE_1_1_16;
-	}
 }
 
diff --git a/cmd/memtester/io_map.h b/cmd/memtester/io_map.h
index abcb5d0660..3b17440a16 100644
--- a/cmd/memtester/io_map.h
+++ b/cmd/memtester/io_map.h
@@ -1,12 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
 /*
- * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2019 Rockchip Electronics Co., Ltd.
  */
 
 #ifndef _CMD_MEMTESTER_IO_MAP_H
 #define _CMD_MEMTESTER_IO_MAP_H
 
+#define CPU_2_IO_ALIGN_LEN		(16)	/* 16 byte */
+
 int data_cpu_2_io(void *p, u32 len);
 void data_cpu_2_io_init(void);
 
diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 9c35acc16a..3c16569eaf 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -21,16 +21,12 @@
 #include "types.h"
 #include "tests.h"
 #include "io_map.h"
+#include "ddr_tester_common.h"
 
 #define EXIT_FAIL_NONSTARTER    0x01
 #define EXIT_FAIL_ADDRESSLINES  0x02
 #define EXIT_FAIL_OTHERTEST     0x04
 
-DECLARE_GLOBAL_DATA_PTR;
-
-/* reserved sp size 1MB */
-#define RESERVED_SP_SIZE	0x100000
-
 struct test tests[] = {
 	{"Random Value", test_random_value},
 	{"Compare XOR", test_xor_comparison},
@@ -57,103 +53,44 @@ struct test tests[] = {
 int use_phys;
 off_t physaddrbase;
 
-static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
-			char *const argv[])
+/*
+ * arg[0]: test start address
+ * arg[1]: test length, unit: byte
+ * testenable: enable test case, if 0 enable all case
+ * loops: test loops, if 0 endless loop
+ * err_exit: 1: exit test when found fail.
+ * return 0: success, other: fail
+ */
+int doing_memtester(ul *arg, ul testenable, ul loops, ul err_exit)
 {
 	ul loop, i, j;
-	ul buf_start;
-	ul start_adr[2], length[2];
-	u32v * bufa[2], *bufb[2];
-	ul count[2];
-	ul bufsize = 0;
-	ul loops = 0;
-	ul testenable = 0;
+	ul start_adr[CONFIG_NR_DRAM_BANKS], length[CONFIG_NR_DRAM_BANKS];
+	u32v * bufa[CONFIG_NR_DRAM_BANKS], *bufb[CONFIG_NR_DRAM_BANKS];
+	ul count[CONFIG_NR_DRAM_BANKS];
 	int exit_code = 0;
 	int abort = 0;
+	int test_banks;
 
-	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
-	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
-	printf("Licensed under the GNU General Public License version 2 (only).\n");
-	printf("\n");
-
-	start_adr[0] = (size_t)gd->bd->bi_dram[0].start;
-	if (gd->bd->bi_dram[1].start) {
-		length[0] = (size_t)gd->bd->bi_dram[0].size;
-		start_adr[1] = (size_t)gd->bd->bi_dram[1].start;
-		length[1] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[1];
-		length[1] &= ~0xfff;
-	} else {
-		length[0] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[0];
-		length[0] &= ~0xfff;
-		start_adr[1] = 0;
-		length[1] = 0;
-	}
-
-	printf("available memory for test:\n");
-	printf("	start		 end	length\n");
-	printf("	0x%08lx - 0x%08lx 0x%08lx\n",
-	       start_adr[0], start_adr[0] + length[0], length[0]);
-	if (start_adr[1])
-		printf("	0x%08lx - 0x%08lx 0x%08lx\n",
-		       start_adr[1], start_adr[1] + length[1], length[1]);
-
-	if (argc < 2)
-		return CMD_RET_USAGE;
-
-	if (strict_strtoul(argv[1], 0, &buf_start) < 0)
-		return CMD_RET_USAGE;
+	get_print_available_addr(start_adr, length, 0);
 
-	if (argc > 2)
-		if (strict_strtoul(argv[2], 0, &bufsize) < 0)
-			return CMD_RET_USAGE;
-
-	if (argc > 3)
-		if (strict_strtoul(argv[3], 0, &testenable) < 0)
-			return CMD_RET_USAGE;
+	test_banks = judge_test_addr(arg, start_adr, length);
 
-	if (argc > 4)
-		if (strict_strtoul(argv[4], 0, &loops) < 0)
-			return CMD_RET_USAGE;
+	if (!test_banks) {
+		printf("unavailable test address\n");
+		return -1;
+	}
 
-	if (!bufsize) {
-		/* test all memory */
-		for (i = 0; i < 2; i++) {
-			bufa[i] = (u32v *)start_adr[i];
-			bufb[i] = (u32v *)(start_adr[i] + length[i] / 2);
-			count[i] = length[i] / 2 / sizeof(u32);
-		}
-	} else {
-		bufa[0] = (u32v *)buf_start;
-		bufb[0] = (u32v *)(buf_start + bufsize / 2);
-		count[0] = bufsize / 2 / sizeof(u32);
-		bufa[1] = 0;
-		if (start_adr[1]) {
-			if (buf_start < start_adr[0] ||
-			    (buf_start >= start_adr[0] + length[0] &&
-			     buf_start < start_adr[1]) ||
-			    ((buf_start + bufsize >
-			      start_adr[0] + length[0]) &&
-			     buf_start + bufsize < start_adr[1]) ||
-			    (buf_start + bufsize >
-			    start_adr[1] + length[1])) {
-				printf("unavailable memory space\n");
-				return CMD_RET_FAILURE;
-			}
-		} else {
-			if (buf_start < start_adr[0] ||
-			    (buf_start + bufsize >
-			    start_adr[0] + length[0])) {
-				printf("unavailable memory space\n");
-				return CMD_RET_FAILURE;
-			}
-		}
+	for (i = 0; i < ARRAY_SIZE(start_adr); i++) {
+		bufa[i] = (u32v *)start_adr[i];
+		bufb[i] = (u32v *)(start_adr[i] + length[i] / 2);
+		count[i] = length[i] / 2 / sizeof(u32);
 	}
 
 	data_cpu_2_io_init();
 
 	for (loop = 1; ((!loops) || loop <= loops); loop++) {
-		for (j = 0; j < 2; j++) {
-			if (!bufa[j])
+		for (j = 0; j < test_banks; j++) {
+			if (!count[j])
 				continue;
 			printf("testing:0x%lx - 0x%lx\n", (ul)bufa[j],
 			       (ul)bufa[j] + count[j] * 2 * sizeof(u32));
@@ -176,10 +113,14 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 				if (testenable && (!((1 << i) & testenable)))
 					continue;
 				printf("  %-20s: ", tests[i].name);
-				if (!tests[i].fp(bufa[j], bufb[j], count[j]))
+				if (!tests[i].fp(bufa[j], bufb[j], count[j])) {
 					printf("ok\n");
-				else
+				} else {
 					exit_code |= EXIT_FAIL_OTHERTEST;
+					if (err_exit) {
+						goto out;
+					}
+				}
 				if (ctrlc()) {
 					abort = 1;
 					break;
@@ -192,6 +133,8 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 		if (abort)
 			break;
 	}
+
+out:
 	if (exit_code & EXIT_FAIL_NONSTARTER)
 		printf("Fail: EXIT_FAIL_NONSTARTER\n");
 	if (exit_code & EXIT_FAIL_ADDRESSLINES)
@@ -199,13 +142,58 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	if (exit_code & EXIT_FAIL_OTHERTEST)
 		printf("Fail: EXIT_FAIL_OTHERTEST\n");
 
+	if (exit_code)
+		return -1;
+	return 0;
+}
+
+static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	ul start_adr[CONFIG_NR_DRAM_BANKS], length[CONFIG_NR_DRAM_BANKS];
+	ul arg[2];
+	ul loops = 0;
+	ul testenable = 0;
+	ul err_exit = 0;
+
+	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
+	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
+	printf("Licensed under the GNU General Public License version 2 (only).\n");
+	printf("\n");
+
+	get_print_available_addr(start_adr, length, 1);
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	if (strict_strtoul(argv[1], 0, &arg[0]) < 0)
+		return CMD_RET_USAGE;
+
+	if (argc > 2)
+		if (strict_strtoul(argv[2], 0, &arg[1]) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 3)
+		if (strict_strtoul(argv[3], 0, &testenable) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 4)
+		if (strict_strtoul(argv[4], 0, &err_exit) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 5)
+		if (strict_strtoul(argv[5], 0, &loops) < 0)
+			return CMD_RET_USAGE;
+
+	doing_memtester(arg, testenable, loops, err_exit);
+
 	printf("Done.\n");
 	return 0;
 }
 
-U_BOOT_CMD(memtester, 5, 1, do_memtester,
+U_BOOT_CMD(memtester, 6, 1, do_memtester,
 	   "do memtester",
-	   "[start length [testenable [loop]]]\n"
+	   "[start length [testenable err_exit [loop]]]\n"
 	   "start: start address, should be 4k align\n"
 	   "length: test length, should be 4k align, if 0 testing full space\n"
 	   "testenable[option]: enable pattern by set bit to 1, null or 0"
@@ -228,6 +216,7 @@ U_BOOT_CMD(memtester, 5, 1, do_memtester,
 	   "	bit15: 8-bit Writes\n"
 	   "	bit16: 16-bit Writes\n"
 	   "	example: testenable=0x1000,enable Bit Flip only\n"
+	   "err_exit: if 1 stop testing immediately when finding error\n"
 	   "loop[option]: testing loop, if 0 or null endless loop\n"
 	   "example:\n"
 	   "	memtester 0x200000 0x1000000: start address: 0x200000 length:"
diff --git a/cmd/memtester/memtester.h b/cmd/memtester/memtester.h
index d388b2567d..779a1ece41 100644
--- a/cmd/memtester/memtester.h
+++ b/cmd/memtester/memtester.h
@@ -13,10 +13,15 @@
  * See other comments in that file.
  *
  */
-
+#ifndef _CMD_MEMTESTER_H
+#define _CMD_MEMTESTER_H
 #include <linux/types.h>
 
 /* extern declarations. */
 
 extern int use_phys;
 extern off_t physaddrbase;
+
+int doing_memtester(unsigned long *arg, unsigned long testenable,
+		    unsigned long loops, unsigned long err_exit);
+#endif /* _CMD_MEMTESTER_H */

commit a2f754039888630f1359321101f7fb54f24dc6af
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Dec 27 20:38:18 2018 +0800

    rockchip: sdram: add ddr page size and bandwidth get interface
    
    Change-Id: I05e0f32c7e8423843c7b874f8ff89e8e9d093390
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 2f63d92584..0d2c29916b 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -86,6 +86,8 @@ struct ddr_param {
 
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
+unsigned int get_page_size(void);
+unsigned int get_ddr_bw(void);
 
 /* Called by U-Boot board_init_r for Rockchip SoCs */
 int dram_init(void);
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 2c4d26826f..e85e5b4130 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -375,6 +375,63 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	return (size_t)size_mb << 20;
 }
 
+static unsigned int get_ddr_os_reg(void)
+{
+	u32 os_reg = 0;
+
+#if defined(CONFIG_ROCKCHIP_PX30)
+	os_reg = readl(0xff010208);
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	os_reg = readl(0xff1005d0);
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+	os_reg = readl(0xff320308);
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+	os_reg = readl(0x110005d0);
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+	os_reg = readl(0xff738208);
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+	os_reg = readl(0x20004048);
+#elif defined(CONFIG_ROCKCHIP_RK3036)
+	os_reg = readl(0x200081cc);
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	os_reg = readl(0xff000508);
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+	os_reg = readl(0xfe020208);
+#else
+	printf("unsupported chip type, get page size fail\n");
+#endif
+
+	return os_reg;
+}
+
+unsigned int get_page_size(void)
+{
+	u32 os_reg;
+	u32 col, bw;
+	int page_size;
+
+	os_reg = get_ddr_os_reg();
+	if (!os_reg)
+		return 0;
+
+	col = 9 + (os_reg >> SYS_REG_COL_SHIFT(0) & SYS_REG_COL_MASK);
+	bw = (2 >> ((os_reg >> SYS_REG_BW_SHIFT(0)) & SYS_REG_BW_MASK));
+	page_size = 1u << (col + bw);
+
+	return page_size;
+}
+
+unsigned int get_ddr_bw(void)
+{
+	u32 os_reg;
+	u32 bw = 2;
+
+	os_reg = get_ddr_os_reg();
+	if (os_reg)
+		bw = 2 >> ((os_reg >> SYS_REG_BW_SHIFT(0)) & SYS_REG_BW_MASK);
+	return bw;
+}
+
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
 int dram_init(void)
 {

commit 6bce753f9d8dcbcf6816c6706319eb0cc0f92d91
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Dec 27 17:07:32 2018 +0800

    rockchip dmc: add ddr set rate interface
    
    Change-Id: Ie3f5ac29621f1298a759daf44a1caf68d18b9a46
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
index 555998e6b7..3f63ef38eb 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
@@ -7,9 +7,14 @@
 #define __ROCKCHIP_DMC_H_
 #include <dm.h>
 
+#ifndef MHZ
+#define MHZ		(1000 * 1000)
+#endif
+
 int rockchip_ddrclk_sip_set_rate_v2(unsigned long drate);
 unsigned long rockchip_ddrclk_sip_recalc_rate_v2(void);
 unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate);
 int rockchip_dmcfreq_probe(struct udevice *dev);
+int set_ddr_freq(unsigned long freq);
 
 #endif
diff --git a/drivers/ram/rockchip/rockchip_dmc.c b/drivers/ram/rockchip/rockchip_dmc.c
index 37aaa6eab5..d7fddb668b 100644
--- a/drivers/ram/rockchip/rockchip_dmc.c
+++ b/drivers/ram/rockchip/rockchip_dmc.c
@@ -867,6 +867,20 @@ unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate)
 		return 0;
 }
 
+int set_ddr_freq(unsigned long freq)
+{
+	if (freq < MHZ)
+		freq *= MHZ;
+	if (freq) {
+		freq = rockchip_ddrclk_sip_round_rate_v2(freq);
+		rockchip_ddrclk_sip_set_rate_v2(freq);
+	}
+	freq = rockchip_ddrclk_sip_recalc_rate_v2();
+	printf("current ddr freq:%lu Hz\n", freq);
+
+	return freq;
+}
+
 int rockchip_dmcfreq_probe(struct udevice *dev)
 {
 	int ret;

commit aa04de65ce6c955a242bec896593eb241581fc15
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Jan 10 15:17:00 2019 +0800

    lib: optee_client: optimizing print information
    
    Change-Id: I37e6dc56b8eb46bc6d0a2c12bbd4c329d35ca687
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index fe92eaa270..316765cccd 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -169,12 +169,12 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		debug("uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		debug("return size of TA, keymaster_size = 0");
+		debug("return size of TA, keymaster_size = 0\n");
 		TeeSmc32Param[1].u.memref.size = 0;
 	} else {
 		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
-		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
+		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx\n",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);
 	}
@@ -556,7 +556,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
 #endif
 #ifdef CONFIG_OPTEE_V2
-		debug("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
+		debug("ArmSmcArgs->Arg1 = 0x%x \n", ArmSmcArgs->Arg1);
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
 		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
 		ArmSmcArgs->Arg1 = 0;
@@ -597,7 +597,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
 			(t_teesmc32_arg *)(size_t)((uint64_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
-		debug("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
+		debug("TeeSmc32Arg->cmd = 0x%x\n", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
 #ifdef CONFIG_OPTEE_V1
@@ -637,7 +637,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			uint32_t tempaddr;
 			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
 			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
-			debug("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
+			debug("allocsize = 0x%x tempaddr = 0x%x\n", allocsize, tempaddr);
 			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
 			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
 			TeeSmc32Arg->params[0].u.memref.size = allocsize;
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 37f881b815..18be31a61f 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -170,7 +170,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -195,7 +195,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail \n");
+		printf("blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -220,7 +220,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -231,12 +231,12 @@ static void rkss_dump(void *data, unsigned int len)
 {
 	char *p = (char *)data;
 	unsigned int i = 0;
-	printf("-------------- DUMP %d --------------", len);
+	printf("-------------- DUMP %d --------------\n", len);
 	for (i = 0; i < len; i++) {
 		printf("%02x ", *(p + i));
 	}
 	printf("\n");
-	printf("------------- DUMP END -------------");
+	printf("------------- DUMP END -------------\n");
 }
 
 static void rkss_dump_ptable(void)
@@ -249,16 +249,16 @@ static void rkss_dump_ptable(void)
 
 	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_LEN);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return;
 	}
 
-	printf("-------------- DUMP ptable --------------");
+	printf("-------------- DUMP ptable --------------\n");
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
 		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
@@ -273,7 +273,7 @@ static void rkss_dump_ptable(void)
 		}
 	}
 	free(table_data);
-	printf("-------------- DUMP END --------------");
+	printf("-------------- DUMP END --------------\n");
 }
 
 static void rkss_dump_usedflags(void)
@@ -284,7 +284,7 @@ static void rkss_dump_usedflags(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -312,10 +312,10 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	}
 	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+		printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("verify ptable success.");
+	debug("verify ptable success.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -329,7 +329,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...");
+			debug("init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -339,14 +339,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.", ret);
+				printf("clean usedflags section failed!!! ret: %d.\n", ret);
 				return TEEC_ERROR_GENERIC;
 			}
 
 			return TEEC_SUCCESS;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.");
+	debug("rkss_verify_usedflags: sucess.\n");
 	return TEEC_SUCCESS;
 }
 
@@ -362,7 +362,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -371,10 +371,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section! ");
+		debug("error: unused section!\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -400,18 +400,18 @@ static int rkss_get_fileinfo_by_name(
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -429,7 +429,7 @@ static int rkss_get_fileinfo_by_name(
 
 			/* Full Matching*/
 			if (!strcmp(p->name, filename)) {
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d] \n",
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -458,14 +458,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while (cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s \n", p->name);
+			debug("Matched folder: %s\n", p->name);
 			free(table_data);
 			return TEEC_ERROR_GENERIC;
 UNMATCHFOLDER:
-			debug("Unmatched ... \n");
+			debug("Unmatched ...\n");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return TEEC_ERROR_GENERIC;
 }
@@ -483,18 +483,18 @@ static int rkss_get_dirs_by_name(char *filename)
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1) {
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -513,14 +513,14 @@ static int rkss_get_dirs_by_name(char *filename)
 
 			/* Full Matching*/
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d \n",
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename)) {
 				chk = p->name + strlen(filename);
 				if (*chk == '/') {
 					file = p->name + strlen(filename) + 1;
 					subdir = strtok(file, "/");
-					debug("found: %s \n", subdir);
+					debug("found: %s\n", subdir);
 					strcpy(dir_cache[dir_num], subdir);
 					++dir_num;
 				}
@@ -542,7 +542,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -559,7 +559,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !");
+	printf("Not enough space available in secure storage !\n");
 	return TEEC_ERROR_GENERIC;
 }
 
@@ -570,14 +570,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -585,7 +585,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -593,7 +593,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -606,21 +606,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -628,7 +628,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	return TEEC_SUCCESS;
@@ -644,13 +644,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -662,16 +662,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p = (struct rkss_file_info *)pdata;
 			p += n;
 			if (p->used == 0) {
-				debug("write ptable in [%d][%d] .", i, n);
+				debug("write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d, ",
+				debug("write emt ptable : [%d,%d] name:%s, index:%d,\n",
 					i, n, p->name, p->index);
-				debug("size:%d, used:%d \n",  p->size, p->used);
+				debug("size:%d, used:%d\n",  p->size, p->used);
 				ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 				if (ret < 0) {
-					printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+					printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 					free(table_data);
 					return TEEC_ERROR_GENERIC;
 				}
@@ -698,7 +698,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -707,12 +707,12 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d \n",
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i, n, p->name, p->index, p->size, p->used);
 
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 #ifdef DEBUG_RKFSS
@@ -729,7 +729,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 	int fd;
 	struct rkss_file_info p = {0};
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -737,18 +737,18 @@ static uint32_t ree_fs_new_open(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_open: file name too long. %s", filename);
+		printf("ree_fs_new_open: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_open open file: %s, len: %zu \n", filename, strlen(filename));
+	debug("ree_fs_new_open open file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd < 0) {
-		debug("ree_fs_new_open : no such file. %s", filename);
+		debug("ree_fs_new_open : no such file. %s\n", filename);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
-	debug("ree_fs_new_open! %s, fd: %d \n", filename, fd);
+	debug("ree_fs_new_open! %s, fd: %d\n", filename, fd);
 
 	params[2].u.value.a = fd;
 	return TEEC_SUCCESS;
@@ -772,19 +772,19 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
-		printf("ree_fs_new_create: file name too long. %s", filename);
+		printf("ree_fs_new_create: file name too long. %s\n", filename);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_create create file: %s, len: %zu \n", filename, strlen(filename));
+	debug("ree_fs_new_create create file: %s, len: %zu\n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd >= 0) {
-		debug("ree_fs_new_create : file exist, clear it. %s", filename);
+		debug("ree_fs_new_create : file exist, clear it. %s\n", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
 		ret = rkss_decref_multi_usedflags_sections(p.index, num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !");
+			printf("rkss_decref_multi_usedflags_sections error !\n");
 			return TEEC_ERROR_GENERIC;
 		}
 
@@ -792,12 +792,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		memset(&p, 0, sizeof(struct rkss_file_info));
 		ret = rkss_write_back_ptable(fd, &p);
 		if (ret < 0) {
-			printf("ree_fs_new_create : write back error %d", ret);
+			printf("ree_fs_new_create : write back error %d\n", ret);
 			return TEEC_ERROR_GENERIC;
 		}
 	}
 
-	debug("ree_fs_new_create create new file: %s \n", filename);
+	debug("ree_fs_new_create create new file: %s\n", filename);
 	strcpy(p.name, filename);
 	p.index = 0;
 	p.size = 0;
@@ -805,11 +805,11 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	p.flags = RK_FS_R | RK_FS_W;
 	fd = rkss_write_empty_ptable(&p);
 	if (fd < 0) {
-		printf("ree_fs_new_create : write empty ptable error. %s", filename);
+		printf("ree_fs_new_create : write empty ptable error. %s\n", filename);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_create ! %s, fd: %d. \n", filename, fd);
+	debug("ree_fs_new_create ! %s, fd: %d.\n", filename, fd);
 
 	params[2].u.value.a = fd;
 	return TEEC_SUCCESS;
@@ -818,7 +818,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 static TEEC_Result ree_fs_new_close(size_t num_params,
 				    struct tee_ioctl_param *params)
 {
-	debug("ree_fs_new_close !");
+	debug("ree_fs_new_close !\n");
 	UNREFERENCED_PARAMETER(params);
 	UNREFERENCED_PARAMETER(num_params);
 	return TEEC_SUCCESS;
@@ -847,11 +847,11 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld\n", fd, len, offs);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		debug("unavailable fd: %d!", fd);
+		debug("unavailable fd: %d!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -862,7 +862,7 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 	if (ret < 0) {
-		printf("unavailable file index!");
+		printf("unavailable file index!\n");
 		free(temp_file_data);
 		return TEEC_ERROR_GENERIC;
 	}
@@ -900,7 +900,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: fd:%d unvailable!", fd);
+		printf("ree_fs_new_write: fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
@@ -915,7 +915,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
 		ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
 		if (ret < 0) {
-			printf("unavailable file index %d section_num %d", p.index, section_num);
+			printf("unavailable file index %d section_num %d\n", p.index, section_num);
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -924,7 +924,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 		temp_file_data = 0;
 		ret = rkss_decref_multi_usedflags_sections(p.index, section_num);
 		if (ret < 0) {
-			printf("rkss_decref_multi_usedflags_sections error !");
+			printf("rkss_decref_multi_usedflags_sections error !\n");
 			ret = TEEC_ERROR_GENERIC;
 			goto out;
 		}
@@ -935,18 +935,18 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	p.size = new_size;
 	section_num = new_size / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(section_num);
-	debug("Get Empty section in %d \n", p.index);
+	debug("Get Empty section in %d\n", p.index);
 	p.used = 1;
 	ret = rkss_incref_multi_usedflags_sections(p.index, section_num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !");
+		printf("rkss_incref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
 
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_write: write ptable error!");
+		printf("ree_fs_new_write: write ptable error!\n");
 		ret = TEEC_ERROR_GENERIC;
 		goto out;
 	}
@@ -986,28 +986,28 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
 
-	debug("ree_fs_new_truncate: fd:%d, lenth:%zu \n", fd, len);
+	debug("ree_fs_new_truncate: fd:%d, lenth:%zu\n", fd, len);
 
 	ret = rkss_get_fileinfo_by_index(fd, &p);
 	if (ret < 0) {
-		printf("fd:%d unvailable!", fd);
+		printf("fd:%d unvailable!\n", fd);
 		return TEEC_ERROR_GENERIC;
 	}
 	if (len > p.size) {
-		printf("truncate error!");
+		printf("truncate error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	section_num_old = p.size / RKSS_DATA_LEN + 1;
 	section_num_new = len / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index + section_num_new, section_num_old - section_num_new);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !");
+		printf("rkss_decref_multi_usedflags_sections error !\n");
 		ret = TEEC_ERROR_GENERIC;
 	}
 	p.size = len;
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_truncate: write ptable error!");
+		printf("ree_fs_new_truncate: write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1021,7 +1021,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret, fd, num;
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1030,18 +1030,18 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: no such file. %s", filename);
+		printf("ree_fs_new_remove: no such file. %s\n", filename);
 		return 0;
 	}
 	fd = ret;
 
-	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d \n", filename, fd, p.index, p.size);
+	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	/* decrease ref from usedflags */
 	num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_decref_multi_usedflags_sections error !");
+		printf("rkss_decref_multi_usedflags_sections error !\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1049,7 +1049,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	memset(&p, 0, sizeof(struct rkss_file_info));
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
-		printf("ree_fs_new_remove: write back error %d", ret);
+		printf("ree_fs_new_remove: write back error %d\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1082,15 +1082,15 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 
 	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
-		printf("new file name too long. %s", new_fname);
+		printf("new file name too long. %s\n", new_fname);
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("rename: %s -> %s \n", old_fname, new_fname);
+	debug("rename: %s -> %s\n", old_fname, new_fname);
 
 	ret = rkss_get_fileinfo_by_name(old_fname, &p);
 	if (ret < 0) {
-		printf("filename: %s no found.", old_fname);
+		printf("filename: %s no found.\n", old_fname);
 		return TEEC_ERROR_ITEM_NOT_FOUND;
 	}
 
@@ -1098,7 +1098,7 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0) {
-		printf("write ptable error!");
+		printf("write ptable error!\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1111,7 +1111,7 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	char *dirname;
 	int ret;
 
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
@@ -1121,11 +1121,11 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	dir_seek = 0;
 	ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0) {
-		printf("ree_fs_new_opendir: error");
+		printf("ree_fs_new_opendir: error\n");
 		return TEEC_ERROR_GENERIC;
 	}
 
-	debug("ree_fs_new_opendir: %s, seek/num:%d/%d \n", dirname, dir_seek, dir_num);
+	debug("ree_fs_new_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return TEEC_SUCCESS;
 }
 
@@ -1151,16 +1151,16 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	size_t dirname_len;
 
 	dirname = (char *)(size_t)params[1].u.memref.shm_id;
-	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!dirname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 	len = params[1].u.memref.size;
 
-	debug("seek/num:%d/%d \n", dir_seek, dir_num);
+	debug("seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num) {
 		params[1].u.memref.size = 0;
-		debug("ree_fs_new_readdir: END");
+		debug("ree_fs_new_readdir: END \n");
 		return TEEC_ERROR_BAD_STATE;
 	}
 
@@ -1172,7 +1172,7 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	strcpy(dirname, dir_cache[dir_seek]);
 	++dir_seek;
 
-	debug("ree_fs_new_readdir: %s \n", dirname);
+	debug("ree_fs_new_readdir: %s\n", dirname);
 
 	return TEEC_SUCCESS;
 }
@@ -1199,12 +1199,12 @@ int tee_supp_rk_fs_init(void)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1217,12 +1217,12 @@ int tee_supp_rk_fs_init(void)
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0) {
-		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -1259,37 +1259,37 @@ int tee_supp_rk_fs_process(size_t num_params,
 
 	switch (params->u.value.a) {
 	case OPTEE_MRF_OPEN:
-		debug(">>>>>>> [%d] OPTEE_MRF_OPEN! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_OPEN!\n", rkss_step++);
 		return ree_fs_new_open(num_params, params);
 	case OPTEE_MRF_CREATE:
-		debug(">>>>>>> [%d] OPTEE_MRF_CREATE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_CREATE!\n", rkss_step++);
 		return ree_fs_new_create(num_params, params);
 	case OPTEE_MRF_CLOSE:
-		debug(">>>>>>> [%d] OPTEE_MRF_CLOSE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSE!\n", rkss_step++);
 		return ree_fs_new_close(num_params, params);
 	case OPTEE_MRF_READ:
-		debug(">>>>>>> [%d] OPTEE_MRF_READ! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_READ!\n", rkss_step++);
 		return ree_fs_new_read(num_params, params);
 	case OPTEE_MRF_WRITE:
-		debug(">>>>>>> [%d] OPTEE_MRF_WRITE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_WRITE!\n", rkss_step++);
 		return ree_fs_new_write(num_params, params);
 	case OPTEE_MRF_TRUNCATE:
-		debug(">>>>>>> [%d] OPTEE_MRF_TRUNCATE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_TRUNCATE!\n", rkss_step++);
 		return ree_fs_new_truncate(num_params, params);
 	case OPTEE_MRF_REMOVE:
-		debug(">>>>>>> [%d] OPTEE_MRF_REMOVE! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_REMOVE!\n", rkss_step++);
 		return ree_fs_new_remove(num_params, params);
 	case OPTEE_MRF_RENAME:
-		debug(">>>>>>> [%d] OPTEE_MRF_RENAME! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_RENAME!\n", rkss_step++);
 		return ree_fs_new_rename(num_params, params);
 	case OPTEE_MRF_OPENDIR:
-		debug(">>>>>>> [%d] OPTEE_MRF_OPENDIR! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_OPENDIR!\n", rkss_step++);
 		return ree_fs_new_opendir(num_params, params);
 	case OPTEE_MRF_CLOSEDIR:
-		debug(">>>>>>> [%d] OPTEE_MRF_CLOSEDIR! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSEDIR!\n", rkss_step++);
 		return ree_fs_new_closedir(num_params, params);
 	case OPTEE_MRF_READDIR:
-		debug(">>>>>>> [%d] OPTEE_MRF_READDIR! \n", rkss_step++);
+		debug(">>>>>>> [%d] OPTEE_MRF_READDIR!\n", rkss_step++);
 		return ree_fs_new_readdir(num_params, params);
 	default:
 		return TEEC_ERROR_BAD_PARAMETERS;
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 8fd2448b8f..55dec3e212 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -182,7 +182,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -212,7 +212,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
-		printf("blk_dwrite fail \n");
+		printf("blk_dwrite fail\n");
 		return -1;
 	}
 	return 0;
@@ -242,7 +242,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
-		printf("blk_dread fail \n");
+		printf("blk_dread fail\n");
 		return -1;
 	}
 	return 0;
@@ -253,29 +253,29 @@ static void rkss_dump(void* data, unsigned int len)
 {
 	char *p = (char *)data;
 	unsigned int i = 0;
-	printf("-------------- DUMP %d --------------", len);
+	printf("-------------- DUMP %d --------------\n", len);
 	for (i = 0; i < len; i++)
 	{
 		printf("%02x ", *(p + i));
 	}
 	printf("\n");
-	printf("------------- DUMP END -------------");
+	printf("------------- DUMP END -------------\n");
 }
 
 static void rkss_dump_ptable(void)
 {
-	printf("-------------- DUMP ptable --------------");
+	printf("-------------- DUMP ptable --------------\n");
 	int i = 0, ret;
 	unsigned char *table_data;
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return;
 	}
@@ -299,7 +299,7 @@ static void rkss_dump_ptable(void)
 		}
 	}
 	free(table_data);
-	printf("-------------- DUMP END --------------");
+	printf("-------------- DUMP END --------------\n");
 }
 
 static void rkss_dump_usedflags(void)
@@ -309,7 +309,7 @@ static void rkss_dump_usedflags(void)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_section fail ! ret: %d.\n", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
@@ -339,11 +339,11 @@ static int rkss_verify_ptable(unsigned char *table_data)
 	if (write_table_flag == 1) {
 		ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
 		if (ret < 0) {
-			printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+			printf("rkss_write_multi_sections failed!!! ret: %d.\n", ret);
 			return -1;
 		}
 	}
-	debug("verify ptable success.");
+	debug("verify ptable success.\n");
 	return 0;
 }
 
@@ -357,7 +357,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 		duel = *(flags + (int)i/2);
 		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
 		if (flag != 0x1) {
-			debug("init usedflags section ...");
+			debug("init usedflags section ...\n");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
 			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
 				flagw = (uint8_t *)rkss->data + (int)n/2;
@@ -367,14 +367,14 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 			}
 			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
-				printf("clean usedflags section failed!!! ret: %d.", ret);
+				printf("clean usedflags section failed!!! ret: %d.\n", ret);
 				return -1;
 			}
 
 			return 0;
 		}
 	}
-	debug("rkss_verify_usedflags: sucess.");
+	debug("rkss_verify_usedflags: sucess.\n");
 	return 0;
 }
 
@@ -390,7 +390,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	rkss.index = i;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -399,10 +399,10 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	if (p->used != 1) {
-		debug("error: unused section! ");
+		debug("error: unused section!\n");
 		return -1;
 	}
-	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d\n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 
@@ -420,18 +420,18 @@ static int rkss_get_fileinfo_by_name(
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -453,7 +453,7 @@ static int rkss_get_fileinfo_by_name(
 
 			if (!strcmp(p->name, filename))
 			{
-				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]",
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]\n",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
 				free(table_data);
@@ -484,14 +484,14 @@ static int rkss_get_fileinfo_by_name(
 
 			} while(cur_inpos && cur_svpos);
 
-			debug("Matched folder: %s", p->name);
+			debug("Matched folder: %s\n", p->name);
 			free(table_data);
 			return -100;
 UNMATCHFOLDER:
 			debug("Unmatched ...");
 		}
 	}
-	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	debug("rkss_get_fileinfo_by_name: file or dir no found!\n");
 	free(table_data);
 	return -1;
 }
@@ -506,18 +506,18 @@ static int rkss_get_dirs_by_name(char* filename)
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
 	{
-		printf("filename is too long. length:%u", len);
+		printf("filename is too long. length:%u\n", len);
 		return -1;
 	}
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -540,7 +540,7 @@ static int rkss_get_dirs_by_name(char* filename)
 
 			// Full Matching
 			ret = memcmp(p->name, filename, strlen(filename));
-			debug("comparing [fd:%d] : %s ?= %s , ret:%d",
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d\n",
 					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
 			if (!ret && strlen(p->name) > strlen(filename))
 			{
@@ -567,7 +567,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -591,7 +591,7 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 		}
 	}
 
-	printf("Not enough space available in secure storage !");
+	printf("Not enough space available in secure storage !\n");
 	return -10;
 }
 
@@ -602,14 +602,14 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -617,7 +617,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (++value > 0xF) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0xF;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -625,7 +625,7 @@ static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -638,21 +638,21 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	uint8_t *flag;
 
 	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
-		printf("index[%d] out of range.", index);
+		printf("index[%d] out of range.\n", index);
 		return -1;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
 	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	for (i = 0; i < num; i++, index++) {
 		flag = (uint8_t *)rkss.data + (int)index/2;
 		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
 		if (--value < 0) {
-			printf("reference out of data: %d", value);
+			printf("reference out of data: %d\n", value);
 			value = 0x0;
 		}
 		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
@@ -660,7 +660,7 @@ static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int
 	}
 	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	return 0;
@@ -673,13 +673,13 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 
 	ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -698,16 +698,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			p += n;
 			if (p->used == 0)
 			{
-				debug("write ptable in [%d][%d] .",i ,n);
+				debug("write ptable in [%d][%d] .\n", i, n);
 				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
 				p->used = 1;
 				p->id = n;
-				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 						i,n,p->name,p->index,p->size,p->used);
 				ret = rkss_write_section(&rkss);
 				if (ret < 0)
 				{
-					printf("rkss_write_section fail ! ret: %d.", ret);
+					printf("rkss_write_section fail ! ret: %d.\n", ret);
 					free(table_data);
 					return -1;
 				}
@@ -716,7 +716,7 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 			}
 		}
 	}
-	printf("No enough ptable space available in secure storage.");
+	printf("No enough ptable space available in secure storage.\n");
 	free(table_data);
 	return -1;
 }
@@ -731,7 +731,7 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	int ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_read_section fail ! ret: %d.", ret);
+		debug("rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -740,13 +740,13 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	p += n;
 
 	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
-	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d\n",
 			i,n,p->name,p->index,p->size,p->used);
 
 	ret = rkss_write_section(&rkss);
 	if (ret < 0)
 	{
-		debug("rkss_write_section fail ! ret: %d.", ret);
+		debug("rkss_write_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -779,16 +779,16 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 	if (strlen(filename) > RKSS_NAME_MAX_LENGTH)
 	{
-		debug("tee_fs_open: file name too long. %s",filename);
+		debug("tee_fs_open: file name too long. %s\n", filename);
 		return -1;
 	}
 
-	debug("tee_fs_open open file: %s, len: %zu", filename, strlen(filename));
+	debug("tee_fs_open open file: %s, len: %zu\n", filename, strlen(filename));
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		debug("tee_fs_open : no such file. %s", filename);
+		debug("tee_fs_open : no such file. %s\n", filename);
 		make_newfile = 1;
 	}
 	else
@@ -805,7 +805,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 	{
 		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
 		{
-			debug("tee_fs_open create new file: %s", filename);
+			debug("tee_fs_open create new file: %s\n", filename);
 			strcpy(p.name, filename);
 			p.index = 0;
 			p.size = fsrpc->len;
@@ -814,7 +814,7 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 			ret = rkss_write_empty_ptable(&p);
 			if (ret < 0)
 			{
-				printf("tee_fs_open : error. %s", filename);
+				printf("tee_fs_open : error. %s\n", filename);
 				return -1;
 			}
 			fsrpc->fd = ret;
@@ -822,12 +822,12 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 		}
 		else
 		{
-			debug("and no create flag found.");
+			debug("and no create flag found.\n");
 			return -1;
 		}
 	}
 
-	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d",
+	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d\n",
 			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
 
 	return fsrpc->fd;
@@ -835,38 +835,38 @@ static int tee_fs_open(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_close(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_close !");
+	debug("tee_fs_close !\n");
 	UNREFERENCED_PARAMETER(fsrpc);
 	return 0;
 }
 
 static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_read! fd:%d, len:%d", fsrpc->fd, fsrpc->len);
+	debug("tee_fs_read! fd:%d, len:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("unavailable fd !");
+		printf("unavailable fd !\n");
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.");
+		printf("warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	int di = 0;
-	debug("reading section[%d], fd:%d, len:%d, filesize:%d",
+	debug("reading section[%d], fd:%d, len:%d, filesize:%d\n",
 			p.index, fsrpc->fd, fsrpc->len, p.size);
 
 	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
 	ret = rkss_read_multi_sections(temp_file_data, p.index, num);
 	if (ret < 0) {
-		printf("unavailable file index");
+		printf("unavailable file index\n");
 		free(temp_file_data);
 		return -1;
 	}
@@ -879,44 +879,44 @@ static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_write ! fd:%d, lenth:%d",fsrpc->fd, fsrpc->len);
+	debug("tee_fs_write ! fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->len);
 	void *data = (void *)(fsrpc + 1);
 
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_write error ! wrong fd : %d",fsrpc->fd);
+		printf("tee_fs_write error ! wrong fd : %d\n", fsrpc->fd);
 		return -1;
 	}
 
 	if (file_seek != 0)
 	{
-		printf("warning !!! file_seek != 0. unsupported now.");
+		printf("warning !!! file_seek != 0. unsupported now.\n");
 	}
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: fd unvailable!");
+		printf("tee_fs_write: fd unvailable!\n");
 		return -1;
 	}
 
 	p.size = fsrpc->len;
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
 	p.index = rkss_get_empty_section_from_usedflags(num);
-	debug("Get Empty section in %d", p.index);
+	debug("Get Empty section in %d\n", p.index);
 	p.used = 1;
 
 	ret = rkss_incref_multi_usedflags_sections(p.index, num);
 	if (ret < 0) {
-		printf("rkss_incref_multi_usedflags_sections error !");
+		printf("rkss_incref_multi_usedflags_sections error !\n");
 		ret = -1;
 	}
 
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!");
+		printf("tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 
@@ -935,7 +935,7 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x", fsrpc->fd, fsrpc->arg, fsrpc->flags);
+	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x\n", fsrpc->fd, fsrpc->arg, fsrpc->flags);
 
 	if (fsrpc->flags == TEE_FS_SEEK_CUR)
 	{
@@ -952,7 +952,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 		int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 		if (ret < 0)
 		{
-			printf("unavilable fd.");
+			printf("unavilable fd.\n");
 			return -1;
 		}
 		file_seek = p.size + fsrpc->arg;
@@ -960,7 +960,7 @@ static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
 	}
 	else
 	{
-		printf("tee_fs_seek: unsupport seed mode.");
+		printf("tee_fs_seek: unsupport seed mode.\n");
 		return -1;
 	}
 
@@ -975,19 +975,19 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : no such file. %s", filename);
+		printf("tee_fs_unlink : no such file. %s\n", filename);
 		return 0;
 	}
 	int fd = ret;
 
-	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d", filename, fd, p.index, p.size);
+	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d\n", filename, fd, p.index, p.size);
 
 	/* decrease ref from usedflags */
 	int num = p.size / RKSS_DATA_LEN + 1;
 	ret = rkss_decref_multi_usedflags_sections(p.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_decref_multi_usedflags_sections error !");
+		printf("rkss_decref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -996,7 +996,7 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_unlink : write back error %d", ret);
+		printf("tee_fs_unlink : write back error %d\n", ret);
 		return -1;
 	}
 
@@ -1012,13 +1012,13 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	char *filename = (char *)(fsrpc + 1);
 	size_t offset_new_fn = strlen(filename) + 1;
 	char *newfilename = filename + offset_new_fn;
-	debug("tee_fs_link ! %s -> %s", filename, newfilename);
+	debug("tee_fs_link ! %s -> %s\n", filename, newfilename);
 
 	struct rkss_file_info p_old = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p_old);
 	if (ret < 0)
 	{
-		printf("cannot find src file %s.", filename);
+		printf("cannot find src file %s.\n", filename);
 		return -1;
 	}
 
@@ -1026,7 +1026,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
 	if (!ret)
 	{
-		printf("file exist ! %s.", newfilename);
+		printf("file exist ! %s.\n", newfilename);
 		return -1;
 	}
 
@@ -1036,7 +1036,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_empty_ptable(&p_new);
 	if (ret < 0)
 	{
-		printf("tee_fs_open : error. %s", filename);
+		printf("tee_fs_open : error. %s\n", filename);
 		return -1;
 	}
 
@@ -1044,7 +1044,7 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	ret = rkss_incref_multi_usedflags_sections(p_new.index, num);
 	if (ret < 0)
 	{
-		printf("rkss_incref_multi_usedflags_sections error !");
+		printf("rkss_incref_multi_usedflags_sections error !\n");
 		return -1;
 	}
 
@@ -1059,13 +1059,13 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 {
 	char *filenames = (char *)(fsrpc + 1);
 	char *newnames = filenames + strlen(filenames) + 1;
-	debug("rename: %s -> %s", filenames, newnames);
+	debug("rename: %s -> %s\n", filenames, newnames);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filenames, &p);
 	if (ret < 0)
 	{
-		printf("filename no found .");
+		printf("filename no found .\n");
 		return -1;
 	}
 
@@ -1074,7 +1074,7 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(ret, &p);
 	if (ret < 0)
 	{
-		printf("write ptable error!");
+		printf("write ptable error!\n");
 		return -1;
 	}
 
@@ -1083,10 +1083,10 @@ static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
 
 static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 {
-	debug("tee_fs_truncate: fd:%d, lenth:%d", fsrpc->fd, fsrpc->arg);
+	debug("tee_fs_truncate: fd:%d, lenth:%d\n", fsrpc->fd, fsrpc->arg);
 	if (fsrpc->fd < 0)
 	{
-		printf("tee_fs_truncate: fd unavilable !");
+		printf("tee_fs_truncate: fd unavilable !\n");
 		return -1;
 	}
 
@@ -1094,7 +1094,7 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("fd unvailable!");
+		printf("fd unvailable!\n");
 		return -1;
 	}
 
@@ -1102,7 +1102,7 @@ static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
 	if (ret < 0)
 	{
-		printf("tee_fs_write: write ptable error!");
+		printf("tee_fs_write: write ptable error!\n");
 		return -1;
 	}
 	return 0;
@@ -1112,7 +1112,7 @@ static int tee_fs_mkdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_mkdir: %s",dirname);
+	debug("tee_fs_mkdir: %s\n", dirname);
 	return 0;
 }
 
@@ -1123,9 +1123,9 @@ static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
 	int ret = rkss_get_dirs_by_name(dirname);
 	if (ret < 0)
 	{
-		printf("tee_fs_opendir: error");
+		printf("tee_fs_opendir: error\n");
 	}
-	debug("tee_fs_opendir: %s, seek/num:%d/%d", dirname, dir_seek, dir_num);
+	debug("tee_fs_opendir: %s, seek/num:%d/%d\n", dirname, dir_seek, dir_num);
 	return 0;
 }
 
@@ -1133,7 +1133,7 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
 	UNREFERENCED_PARAMETER(dirname);
-	debug("tee_fs_closedir: %s", dirname);
+	debug("tee_fs_closedir: %s\n", dirname);
 	dir_seek = 0;
 	dir_num = 0;
 	return 0;
@@ -1142,12 +1142,12 @@ static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
 static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	printf("seek/num:%d/%d",dir_seek, dir_num);
+	printf("seek/num:%d/%d\n", dir_seek, dir_num);
 	if (dir_seek == dir_num)
 	{
 		dirname = NULL;
 		fsrpc->len = 0;
-		printf("tee_fs_readdir: END");
+		printf("tee_fs_readdir: END\n");
 		return -1;
 	}
 
@@ -1155,41 +1155,41 @@ static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
 	fsrpc->len = strlen(dir_cache[dir_seek]) + 1;
 	++dir_seek;
 
-	debug("tee_fs_readdir: %s", dirname);
+	debug("tee_fs_readdir: %s\n", dirname);
 	return 0;
 }
 
 static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
 {
 	char *dirname = (char *)(fsrpc + 1);
-	debug("tee_fs_rmdir: %s", dirname);
+	debug("tee_fs_rmdir: %s\n", dirname);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(dirname, &p);
 	if (ret == -100)
 	{
-		printf("dir is not empty.");
+		printf("dir is not empty.\n");
 		return -1;
 	}
 	else if (ret >= 0)
 	{
-		printf("%s is not a dir.", p.name);
+		printf("%s is not a dir.\n", p.name);
 		return -1;
 	}
-	debug("rmdir success.");
+	debug("rmdir success.\n");
 	return 0;
 }
 
 static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 {
 	char *filename = (char *)(fsrpc + 1);
-	debug("tee_fs_access: name:%s,flag:%x",filename,fsrpc->flags);
+	debug("tee_fs_access: name:%s,flag:%x\n", filename, fsrpc->flags);
 
 	struct rkss_file_info p = {0};
 	int ret = rkss_get_fileinfo_by_name(filename, &p);
 	if (ret < 0 && ret != -100)
 	{
-		debug("tee_fs_access: %s no such file or directory.", filename);
+		debug("tee_fs_access: %s no such file or directory.\n", filename);
 		return -1;
 	}
 
@@ -1197,7 +1197,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_R))
 		{
-			printf("tee_fs_access: no permission FS_R_OK in %x.", p.flags);
+			printf("tee_fs_access: no permission FS_R_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1206,7 +1206,7 @@ static int tee_fs_access(struct tee_fs_rpc *fsrpc)
 	{
 		if (!CHECKFLAG(p.flags, RK_FS_W))
 		{
-			printf("tee_fs_access: no permission FS_W_OK in %x.", p.flags);
+			printf("tee_fs_access: no permission FS_W_OK in %x.\n", p.flags);
 			return -1;
 		}
 	}
@@ -1234,12 +1234,12 @@ int tee_supp_rk_fs_init(void)
 	// Verify Partition Table
 	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
 	if (table_data == NULL) {
-		printf("malloc table_data fail \n");
+		printf("malloc table_data fail\n");
 		return -1;
 	}
 	int ret = rkss_read_patition_tables(table_data);
 	if (ret < 0) {
-		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		printf("rkss_read_patition_tables fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1247,7 +1247,7 @@ int tee_supp_rk_fs_init(void)
 	/* Verify Partition Table*/
 	ret = rkss_verify_ptable(table_data);
 	if (ret < 0) {
-		printf("rkss_verify_ptable fail ! ret: %d.", ret);
+		printf("rkss_verify_ptable fail ! ret: %d.\n", ret);
 		free(table_data);
 		return -1;
 	}
@@ -1260,13 +1260,13 @@ int tee_supp_rk_fs_init(void)
 	ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_section fail ! ret: %d.\n", ret);
 		return -1;
 	}
 	ret = rkss_verify_usedflags(&rkss);
 	if (ret < 0)
 	{
-		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		printf("rkss_verify_usedflags fail ! ret: %d.\n", ret);
 		return -1;
 	}
 
@@ -1291,85 +1291,85 @@ int tee_supp_rk_fs_process(void *cmd, size_t cmd_size)
 
 	if (cmd_size < sizeof(struct tee_fs_rpc))
 	{
-		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !");
+		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !\n");
 		return ret;
 	}
 
 	if (cmd == NULL)
 	{
-		printf(">>>cmd == NULL !");
+		printf(">>>cmd == NULL !\n");
 		return ret;
 	}
 
 	switch (fsrpc->op) {
 	case TEE_FS_OPEN:
-		debug(">>>>>>> [%d] TEE_FS_OPEN !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_OPEN !\n", rkss_step++);
 		ret = tee_fs_open(fsrpc);
 		break;
 	case TEE_FS_CLOSE:
-		debug(">>>>>>> [%d] TEE_FS_CLOSE !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_CLOSE !\n", rkss_step++);
 		ret = tee_fs_close(fsrpc);
 		break;
 	case TEE_FS_READ:
-		debug(">>>>>>> [%d] TEE_FS_READ !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_READ !\n", rkss_step++);
 		ret = tee_fs_read(fsrpc);
 		break;
 	case TEE_FS_WRITE:
-		debug(">>>>>>> [%d] TEE_FS_WRITE !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_WRITE !\n", rkss_step++);
 		ret = tee_fs_write(fsrpc);
 		break;
 	case TEE_FS_SEEK:
-		debug(">>>>>>> [%d] TEE_FS_SEEK !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_SEEK !\n", rkss_step++);
 		ret = tee_fs_seek(fsrpc);
 		break;
 	case TEE_FS_UNLINK:
-		debug(">>>>>>> [%d] TEE_FS_UNLINK !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_UNLINK !\n", rkss_step++);
 		ret = tee_fs_unlink(fsrpc);
 		break;
 	case TEE_FS_RENAME:
-		debug(">>>>>>> [%d] TEE_FS_RENAME !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_RENAME !\n", rkss_step++);
 		ret = tee_fs_rename(fsrpc);
 		break;
 	case TEE_FS_TRUNC:
-		debug(">>>>>>> [%d] TEE_FS_TRUNC !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_TRUNC !\n", rkss_step++);
 		ret = tee_fs_truncate(fsrpc);
 		break;
 	case TEE_FS_MKDIR:
-		debug(">>>>>>> [%d] TEE_FS_MKDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_MKDIR !\n", rkss_step++);
 		ret = tee_fs_mkdir(fsrpc);
-		debug(">>>>>>> ret = [%d]  !", ret);
+		debug(">>>>>>> ret = [%d]  ! \n", ret);
 		break;
 	case TEE_FS_OPENDIR:
-		debug(">>>>>>> [%d] TEE_FS_OPENDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_OPENDIR !\n", rkss_step++);
 		ret = tee_fs_opendir(fsrpc);
 		break;
 	case TEE_FS_CLOSEDIR:
-		debug(">>>>>>> [%d] TEE_FS_CLOSEDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_CLOSEDIR !\n", rkss_step++);
 		ret = tee_fs_closedir(fsrpc);
 		break;
 	case TEE_FS_READDIR:
-		debug(">>>>>>> [%d] TEE_FS_READDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_READDIR !\n", rkss_step++);
 		ret = tee_fs_readdir(fsrpc);
 		break;
 	case TEE_FS_RMDIR:
-		debug(">>>>>>> [%d] TEE_FS_RMDIR !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_RMDIR !\n", rkss_step++);
 		ret = tee_fs_rmdir(fsrpc);
 		break;
 	case TEE_FS_ACCESS:
-		debug(">>>>>>> [%d] TEE_FS_ACCESS !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_ACCESS !\n", rkss_step++);
 		ret = tee_fs_access(fsrpc);
 		break;
 	case TEE_FS_LINK:
-		debug(">>>>>>> [%d] TEE_FS_LINK !", rkss_step++);
+		debug(">>>>>>> [%d] TEE_FS_LINK !\n", rkss_step++);
 		ret = tee_fs_link(fsrpc);
 		break;
 	default:
-		printf(">>>>> DEFAULT !! %d",fsrpc->op);
+		printf(">>>>> DEFAULT !! %d\n", fsrpc->op);
 		break;
 	}
 
 	fsrpc->res = ret;
-	debug(">>>>>>> fsrpc->res = [%d]	!", fsrpc->res);
+	debug(">>>>>>> fsrpc->res = [%d]	!\n", fsrpc->res);
 
 	return ret;
 }

commit 1153acfe76a2fda28b93b88d813c61def39ba3e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 11:17:51 2019 +0800

    android: print android avb enable state
    
    Change-Id: I0be76d29eef3614d4885e2d69048cf521352ffc0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 416b63c712..d9914da3bf 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -941,10 +941,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return -1;
 
 	if (vboot_flag) {
+		printf("SecureBoot enabled, AVB verify\n");
 		if (android_slot_verify(boot_partname, &load_address,
 					slot_suffix))
 			return -1;
 	} else {
+		printf("SecureBoot disabled, AVB skip\n");
 		if (load_android_image(dev_desc, boot_partname,
 				       slot_suffix, &load_address))
 			return -1;

commit d20b913d83ce7f0be5b3344587d7d9ec18bd2e57
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 10 12:49:58 2019 +0800

    configs: evb-rk3308(aarch64/32): enable console info quiet
    
    Change-Id: I94971b83a13b4b8bbd86d6e5b253951a45a44d7a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index c836b2c1a1..07162ea3db 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -15,6 +15,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 362f98f361..fe55fa6820 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -14,6 +14,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set

commit 6ff768feeff0b63919ca4d4dbd53146ce183dc80
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 14:11:33 2019 +0800

    common: add system boot time report
    
    Change-Id: Id7db8f7f7e30719188403f92282ca17c6fe564d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 61f64715bb..6312f130ff 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -78,6 +78,11 @@ __weak void board_quiesce_devices(void)
  */
 static void announce_and_cleanup(int fake)
 {
+	ulong us;
+
+	us = (get_ticks() - gd->sys_start_tick) / (COUNTER_FREQUENCY / 1000000);
+	printf("Total: %ld.%ld ms\n", us / 1000, us % 1000);
+
 	printf("\nStarting kernel ...%s\n\n", fake ?
 		"(fake run for tracing)" : "");
 	bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
diff --git a/common/board_f.c b/common/board_f.c
index 888dc367ae..58b72b01e6 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -702,6 +702,8 @@ static int initf_bootstage(void)
 			IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
 	int ret;
 
+	gd->sys_start_tick = get_ticks();
+
 	ret = bootstage_init(!from_spl);
 	if (ret)
 		return ret;
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index d43ea5a173..343c1e7841 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -134,6 +134,7 @@ typedef struct global_data {
 	int new_line;
 #endif
 	struct pre_serial serial;
+	ulong sys_start_tick;		/* For report system start-up time */
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */

commit 5238e9ab5b0a38c2da2bfd25bbde2e5d41e85f56
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Sun Jan 6 18:28:44 2019 -0800

    rkflash: protect flash former space from stress test
    
    Mainly to protect the uboot and trust partition from damage,
    continue testing after power-on
    
    Change-Id: Iaf362658c6d30662e229c72c310a078c37ff613e
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index 38c2842170..df532db1fd 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -45,7 +45,7 @@ void blk_stress_test(struct udevice *udev)
 {
 	struct blk_desc *block_dev = rockchip_get_bootdev();
 	u16 i, j, loop = 0;
-	u32 test_end_lba;
+	u32 test_end_lba, test_begin_lba;
 	u32 test_lba;
 	u16 test_sec_count = 1;
 	u16 print_flag;
@@ -56,15 +56,16 @@ void blk_stress_test(struct udevice *udev)
 	}
 
 	if (block_dev->if_type == IF_TYPE_SPINOR)
-		test_lba = 0x800;
+		test_begin_lba = 0x4000;
 	else
-		test_lba = 0;
+		test_begin_lba = 0x8000;
 
 	test_end_lba = block_dev->lba;
 	pwrite32 = (u32 *)pwrite;
 	for (i = 0; i < (max_test_sector * 512); i++)
 		pwrite[i] = i;
-	for (loop = 0; loop < 10; loop++) {
+	for (loop = 0; loop < 100; loop++) {
+		test_lba = test_begin_lba;
 		printf("---------Test loop = %d---------\n", loop);
 		printf("---------Test ftl write---------\n");
 		test_sec_count = 1;
@@ -76,6 +77,7 @@ void blk_stress_test(struct udevice *udev)
 			blk_dread(block_dev, test_lba, test_sec_count, pread);
 			for (j = 0; j < test_sec_count * 512; j++) {
 				if (pwrite[j] != pread[j]) {
+					printf("rkflash stress test fail\n");
 					rkflash_print_hex("w:",
 							  pwrite,
 							  4,
@@ -91,7 +93,6 @@ void blk_stress_test(struct udevice *udev)
 					       pread[j]);
 					while (1)
 						;
-					break;
 				}
 			}
 			print_flag = test_lba & 0x1FF;
@@ -104,6 +105,7 @@ void blk_stress_test(struct udevice *udev)
 		}
 		printf("---------Test ftl check---------\n");
 
+		test_lba = test_begin_lba;
 		test_sec_count = 1;
 		for (; (test_lba + test_sec_count) < test_end_lba;) {
 			pwrite32[0] = test_lba;
@@ -114,13 +116,14 @@ void blk_stress_test(struct udevice *udev)
 
 			for (j = 0; j < test_sec_count * 512; j++) {
 				if (pwrite[j] != pread[j]) {
+					printf("rkflash stress test fail\n");
 					printf("r=%x, n=%x, w=%x, r=%x\n",
 					       test_lba,
 					       j,
 					       pwrite[j],
 					       pread[j]);
-					/* while(1); */
-					break;
+					while (1)
+						;
 				}
 			}
 			test_lba += test_sec_count;

commit 513e5cb68757c42dfa68ba53b99428bfa9e1f164
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jan 8 21:12:50 2019 +0800

    drm/rockchip: vop: add hdmi pol config for px3se
    
    if miss this commit will appear hdmi display abnormal at
    some TV.
    
    Change-Id: I86f1425135ccf5fb53c0373ad6d070e1f6efe66d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 669f028c67..fab350ba25 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -425,9 +425,19 @@ static const struct vop_ctrl rk3036_ctrl_data = {
 	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
 	.dclk_pol = VOP_REG(RK3036_DSP_CTRL0, 0x1, 7),
 	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
+	.dither_down = VOP_REG(RK3036_DSP_CTRL0, 0x3, 10),
 	.dsp_layer_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 8),
 	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.hdmi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22),
+	.hdmi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23),
+	.hdmi_pin_pol = VOP_REG(RK3036_INT_SCALER, 0x7, 4),
+	.rgb_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 24),
+	.rgb_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 25),
+	.lvds_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 26),
+	.lvds_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 27),
+	.mipi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 28),
+	.mipi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 29),
 	.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
 	.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
 	.cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0),
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 18ee5d83f9..12052c6a71 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -835,6 +835,7 @@
 #define RK3036_SYS_CTRL			0x00
 #define RK3036_DSP_CTRL0		0x04
 #define RK3036_DSP_CTRL1		0x08
+#define RK3036_INT_SCALER		0x0c
 #define RK3036_INT_STATUS		0x10
 #define RK3036_ALPHA_CTRL		0x14
 #define RK3036_WIN0_COLOR_KEY		0x18

commit fe9c49e6edb8df2838b0ce8b7a36022e96b3c2f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 17:47:44 2019 +0800

    fuel gauge: rk816: fix first power on initilize as 0% and 0mAh
    
    1. when first power but not charge in uboot, fuel gauge is initilized
       but miss saving data for kernel fuel gauge;
    2. wait 75us after coulomb init, otherwise read back 0mAh;
    3. always read remain capacity and print it for debug;
    
    Change-Id: Iba30ef4e96942fcfbf61dacabf8199dc896bab64
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 904096e7a0..64b10f3cdd 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -313,6 +313,38 @@ static int rk816_bat_get_ioffset(struct battery_priv *di)
 	return val;
 }
 
+static void rk816_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
+{
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk816_bat_write(di, SOC_REG, save_soc);
+	}
+}
+
+static void rk816_bat_save_cap(struct battery_priv *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(di, REMAIN_CAP_REG0, buf);
+}
+
 static void rk816_bat_init_voltage_kb(struct battery_priv *di)
 {
 	int vcalib0, vcalib1;
@@ -627,7 +659,7 @@ static void rk816_bat_init_capacity(struct battery_priv *di, u32 capacity)
 	rk816_bat_write(di, GASCNT_CAL_REG1, buf);
 	buf = (cap >> 0) & 0xff;
 	rk816_bat_write(di, GASCNT_CAL_REG0, buf);
-
+	udelay(75);
 	di->remain_cap = rk816_bat_get_coulomb_cap(di);
 	di->rsoc = rk816_bat_get_rsoc(di);
 }
@@ -984,6 +1016,9 @@ void rk816_bat_init_rsoc(struct battery_priv *di)
 		rk816_bat_first_pwron(di);
 	else
 		rk816_bat_not_first_pwron(di);
+
+	rk816_bat_save_dsoc(di, di->dsoc);
+	rk816_bat_save_cap(di, di->remain_cap);
 }
 
 static int rk816_fg_init(struct battery_priv *di)
@@ -995,6 +1030,7 @@ static int rk816_fg_init(struct battery_priv *di)
 	rk816_bat_init_poffset(di);
 	rk816_bat_clr_initialized_state(di);
 	di->dsoc = rk816_bat_get_dsoc(di);
+	di->remain_cap = rk816_bat_get_prev_cap(di);
 
 	/*
 	 * It's better to init fg in kernel,
@@ -1011,45 +1047,14 @@ static int rk816_fg_init(struct battery_priv *di)
 	di->pwr_vol = di->voltage_avg;
 	rk816_bat_charger_setting(di, di->chrg_type);
 
-	printf("Battery: soc=%d%%, voltage=%dmv, Charger: %s%s\n",
-	       di->dsoc, di->voltage_avg, charger_type_to_name[di->chrg_type],
+	printf("Battery: soc=%d%%, cap=%dmAh, voltage=%dmv, Charger: %s%s\n",
+	       di->dsoc, di->remain_cap, di->voltage_avg,
+	       charger_type_to_name[di->chrg_type],
 	       di->virtual_power ? "(virtual)" : "");
 
 	return 0;
 }
 
-static void rk816_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
-{
-	static int old_soc = -1;
-
-	if (old_soc != save_soc) {
-		old_soc = save_soc;
-		rk816_bat_write(di, SOC_REG, save_soc);
-	}
-}
-
-static void rk816_bat_save_cap(struct battery_priv *di, int cap)
-{
-	u8 buf;
-	static int old_cap;
-
-	if (old_cap == cap)
-		return;
-
-	if (cap >= di->qmax)
-		cap = di->qmax;
-
-	old_cap = cap;
-	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG3, buf);
-	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG2, buf);
-	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG1, buf);
-	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(di, REMAIN_CAP_REG0, buf);
-}
-
 static u8 rk816_bat_get_chrg_status(struct battery_priv *di)
 {
 	u8 status;

commit 93124741593445359d3aee449c3f701e451a64af
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:10:18 2018 +0800

    configs: evb-rk3399_defconfig: Remove unused Kconfig option
    
    Change-Id: I78b0b73a0f4aa9356ae7c61a623ebed1563a0454
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 23ab932de6..2d3df130a2 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -103,8 +103,6 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit a6afa223ac907a209513733771207601364edfcd
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:23:02 2018 +0800

    configs: rk3288_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY
    
    Change-Id: Ifd9b9bb68420d23680f4bdb73f4522704c59d5d0
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index 6d45fb2e1d..96254a3f4f 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -84,6 +84,7 @@ CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y

commit 7f9f5e851ac23eaec8d6f40f60aaa8e51ef2a0ac
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:18:52 2018 +0800

    configs: rk3326_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: If64d6ead43b330d82812d88536f0ad9091f8af07
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 07e980c888..475f391b60 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -101,6 +101,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 906a295eb00cc99214a6312c1aa99538865f423b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:15:55 2018 +0800

    configs: rk3368_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I79cc2e78feeba0c48bcab002882c08f435a91fff
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 80b4655ebc..99da2a421b 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -91,6 +91,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 695a59662eed4b1ac52b28931398139934055885
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:12:07 2018 +0800

    configs: rk3399pro_defconfig: Remove unused Kconfig option
    
    Change-Id: I1e12ec3651e226b4d3c71b3da0049ce245744f48
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 4b6584a620..35d15637fb 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -122,8 +122,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 8617a89a52b3e1b8da27c1560039b67c4e822280
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 18:11:26 2018 +0800

    configs: rk322x_defconfig: Remove unused Kconfig option
    
    Change-Id: Ie878ebce426d34708b3b63e5fe849d99b5a352b0
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 2a5d1eaa6b..a754c401af 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -102,9 +102,6 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y

commit 80dfc127322f29771376b1ade0334d4cb98e7ec4
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 17:58:30 2018 +0800

    configs: rk3126_defconfig: enable CONFIG_DRM_ROCKCHIP_RGB
    
    Change-Id: I3ff73d77a9474434b88e9a7f0bb6495960eec3a9
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 1c8b455120..357f281e53 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -84,6 +84,7 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit a7825335a8c32c4f8a2c17de3e2cd2e0f84502d4
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 17:57:32 2018 +0800

    configs: rk3126_defconfig: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I75669e77728f5e1b70dde796946e9b5c7ab01d93
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 239559a627..1c8b455120 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -81,6 +81,7 @@ CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_LCD=y

commit 15f4dedfc5120b773466452cae439b995b25f2c7
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:48:33 2018 +0800

    configs: evb-rk3326: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I918239a95ffb8328c18dd215ce825c997f2b4ceb
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index fd02d9f38c..e7e6d9569a 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -99,6 +99,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 4973d2b93754a824d160932ff764d26eca0b450e
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:48:10 2018 +0800

    configs: evb-px30: enable CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
    
    Change-Id: I797089e0315b1c910f8d674996080a8a99f0152f
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index a79d51a78a..332243d214 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -105,6 +105,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit de867820fcdbdc960d80f6e12968088f5b5ad1ad
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jan 7 21:06:44 2019 +0800

    rockchip: rk3288: scan sub-nodes of the syscon node
    
    Change-Id: I74eec80993664173e57e0c03f662790cf9e66b5a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
index be4b2b00c3..8703dc0bc9 100644
--- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
@@ -22,6 +22,9 @@ U_BOOT_DRIVER(syscon_rk3288) = {
 	.name = "rk3288_syscon",
 	.id = UCLASS_SYSCON,
 	.of_match = rk3288_syscon_ids,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 };
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)

commit b69d3ed41b57938bf063245bc1b4774868bb011e
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 14:59:17 2018 +0800

    video/drm: lvds: Clean up phy code
    
    The video phy of px30/rk3128/rk3288/rk3368 is now supported by
    inno_video_combo_phy.c/inno_video_phy.c in directory drviers/video/drm.
    
    Change-Id: I5471de3aa7c43fbf379b4313f158038145ab36c1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index fe081a417c..b36c30d2f0 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -7,766 +7,306 @@
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/hardware.h>
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/ofnode.h>
 #include <syscon.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/gpio.h>
+#include <regmap.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <linux/media-bus-format.h>
 
 #include "rockchip_display.h"
-#include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_phy.h"
 #include "rockchip_panel.h"
 #include "rockchip_lvds.h"
 
-enum rockchip_lvds_sub_devtype {
-	PX30_LVDS,
-	RK3126_LVDS,
-	RK3288_LVDS,
-	RK3368_LVDS,
+#define PX30_GRF_PD_VO_CON1		0x0438
+#define PX30_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
+#define PX30_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
+#define PX30_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
+#define PX30_LVDS_P2S_EN(x)		HIWORD_UPDATE(x, 10, 10)
+#define PX30_LVDS_VOP_SEL(x)		HIWORD_UPDATE(x,  1,  1)
+
+#define RK3126_GRF_LVDS_CON0		0x0150
+#define RK3126_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  9,  9)
+#define RK3126_LVDS_MODE_EN(x)		HIWORD_UPDATE(x,  6,  6)
+#define RK3126_LVDS_MSBSEL(x)		HIWORD_UPDATE(x,  3,  3)
+#define RK3126_LVDS_SELECT(x)		HIWORD_UPDATE(x,  2,  1)
+
+#define RK3288_GRF_SOC_CON6		0x025c
+#define RK3288_LVDS_LCDC_SEL(x)		HIWORD_UPDATE(x,  3,  3)
+#define RK3288_GRF_SOC_CON7		0x0260
+#define RK3288_LVDS_PWRDWN(x)		HIWORD_UPDATE(x, 15, 15)
+#define RK3288_LVDS_CON_ENABLE_2(x)	HIWORD_UPDATE(x, 12, 12)
+#define RK3288_LVDS_CON_ENABLE_1(x)	HIWORD_UPDATE(x, 11, 11)
+#define RK3288_LVDS_CON_DEN_POL(x)	HIWORD_UPDATE(x, 10, 10)
+#define RK3288_LVDS_CON_HS_POL(x)	HIWORD_UPDATE(x,  9,  9)
+#define RK3288_LVDS_CON_CLKINV(x)	HIWORD_UPDATE(x,  8,  8)
+#define RK3288_LVDS_CON_STARTPHASE(x)	HIWORD_UPDATE(x,  7,  7)
+#define RK3288_LVDS_CON_TTL_EN(x)	HIWORD_UPDATE(x,  6,  6)
+#define RK3288_LVDS_CON_STARTSEL(x)	HIWORD_UPDATE(x,  5,  5)
+#define RK3288_LVDS_CON_CHASEL(x)	HIWORD_UPDATE(x,  4,  4)
+#define RK3288_LVDS_CON_MSBSEL(x)	HIWORD_UPDATE(x,  3,  3)
+#define RK3288_LVDS_CON_SELECT(x)	HIWORD_UPDATE(x,  2,  0)
+
+#define RK3368_GRF_SOC_CON7		0x041c
+#define RK3368_LVDS_SELECT(x)		HIWORD_UPDATE(x, 14, 13)
+#define RK3368_LVDS_MODE_EN(x)		HIWORD_UPDATE(x, 12, 12)
+#define RK3368_LVDS_MSBSEL(x)		HIWORD_UPDATE(x, 11, 11)
+#define RK3368_LVDS_P2S_EN(x)		HIWORD_UPDATE(x,  6,  6)
+
+enum lvds_format {
+	LVDS_8BIT_MODE_FORMAT_1,
+	LVDS_8BIT_MODE_FORMAT_2,
+	LVDS_8BIT_MODE_FORMAT_3,
+	LVDS_6BIT_MODE,
 };
 
-struct rockchip_lvds_chip_data {
-	u32	chip_type;
-	bool	has_vop_sel;
-	u32	grf_soc_con5;
-	u32	grf_soc_con6;
-	u32	grf_soc_con7;
-	u32	grf_soc_con15;
-	u32	grf_gpio1d_iomux;
-};
+struct rockchip_lvds;
 
-struct rockchip_lvds_device {
-	void	*regbase;
-	void	*grf;
-	void	*ctrl_reg;
-	u32	channel;
-	u32	output;
-	u32	format;
-	struct drm_display_mode *mode;
-	const struct rockchip_lvds_chip_data *pdata;
+struct rockchip_lvds_funcs {
+	void (*enable)(struct rockchip_lvds *lvds, int pipe);
+	void (*disable)(struct rockchip_lvds *lvds);
 };
 
-static inline int lvds_name_to_format(const char *s)
-{
-	if (!s)
-		return -EINVAL;
-
-	if (strncmp(s, "jeida", 6) == 0)
-		return LVDS_FORMAT_JEIDA;
-	else if (strncmp(s, "vesa", 5) == 0)
-		return LVDS_FORMAT_VESA;
-
-	return -EINVAL;
-}
-
-static inline int lvds_name_to_output(const char *s)
-{
-	if (!s)
-		return -EINVAL;
-
-	if (strncmp(s, "rgb", 3) == 0)
-		return DISPLAY_OUTPUT_RGB;
-	else if (strncmp(s, "lvds", 4) == 0)
-		return DISPLAY_OUTPUT_LVDS;
-	else if (strncmp(s, "duallvds", 8) == 0)
-		return DISPLAY_OUTPUT_DUAL_LVDS;
-
-	return -EINVAL;
-}
-
-static inline void lvds_writel(struct rockchip_lvds_device *lvds,
-			      u32 offset, u32 val)
-{
-	writel(val, lvds->regbase + offset);
-
-	if ((lvds->pdata->chip_type == RK3288_LVDS) &&
-	    ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) ||
-	     (lvds->output == DISPLAY_OUTPUT_RGB)))
-		writel(val, lvds->regbase + offset + 0x100);
-}
-
-static inline void lvds_msk_reg(struct rockchip_lvds_device *lvds, u32 offset,
-			       u32 msk, u32 val)
-{
-	u32 temp;
-
-	temp = readl(lvds->regbase + offset) & (0xFF - (msk));
-	writel(temp | ((val) & (msk)), lvds->regbase + offset);
-}
+struct rockchip_lvds {
+	struct udevice *dev;
+	struct regmap *grf;
+	struct rockchip_phy *phy;
+	const struct drm_display_mode *mode;
+	const struct rockchip_lvds_funcs *funcs;
+	enum lvds_format format;
+	bool data_swap;
+	bool dual_channel;
+};
 
-static inline u32 lvds_readl(struct rockchip_lvds_device *lvds, u32 offset)
+static inline struct rockchip_lvds *state_to_lvds(struct display_state *state)
 {
-	return readl(lvds->regbase + offset);
-}
+	struct connector_state *conn_state = &state->conn_state;
 
-static inline void lvds_ctrl_writel(struct rockchip_lvds_device *lvds,
-				   u32 offset, u32 val)
-{
-	writel(val, lvds->ctrl_reg + offset);
+	return dev_get_priv(conn_state->dev);
 }
 
-static inline u32 lvds_pmugrf_readl(u32 offset)
+static int rockchip_lvds_connector_init(struct display_state *state)
 {
-	return readl((void *)LVDS_PMUGRF_BASE + offset);
-}
+	struct rockchip_lvds *lvds = state_to_lvds(state);
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_panel *panel = state_get_panel(state);
 
-static inline void lvds_pmugrf_writel(u32 offset, u32 val)
-{
-	writel(val, (void *)LVDS_PMUGRF_BASE + offset);
-}
+	lvds->mode = &conn_state->mode;
+	lvds->phy = conn_state->phy;
+
+	switch (panel->bus_format) {
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+		lvds->format = LVDS_6BIT_MODE;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
+		lvds->format = LVDS_8BIT_MODE_FORMAT_2;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
+	default:
+		lvds->format = LVDS_8BIT_MODE_FORMAT_1;
+		break;
+	}
 
-static inline u32 lvds_phy_lock(struct rockchip_lvds_device *lvds)
-{
-	u32 val = 0;
-	val = readl(lvds->ctrl_reg + MIPIC_PHY_STATUS);
-	return (val & m_PHY_LOCK_STATUS) ? 1 : 0;
-}
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
-{
 	return 0;
 }
 
-static int rk336x_lvds_pwr_off(struct display_state *state)
+static int rockchip_lvds_connector_enable(struct display_state *state)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct rockchip_lvds *lvds = state_to_lvds(state);
+	struct crtc_state *crtc_state = &state->crtc_state;
+	int pipe = crtc_state->crtc_id;
+	int ret;
 
-	/* disable lvds lane and power off pll */
-	lvds_writel(lvds, MIPIPHY_REGEB,
-		    v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
-		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1) |
-		    v_LVDS_BGPD(1));
+	if (lvds->funcs->enable)
+		lvds->funcs->enable(lvds, pipe);
 
-	/* power down lvds pll and bandgap */
-	lvds_msk_reg(lvds, MIPIPHY_REG1,
-		     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
-		     v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
+	ret = rockchip_phy_set_mode(lvds->phy, PHY_MODE_VIDEO_LVDS);
+	if (ret) {
+		dev_err(lvds->dev, "failed to set phy mode: %d\n", ret);
+		return ret;
+	}
 
-	/* disable lvds */
-	lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
-		     v_LVDS_EN(0) | v_TTL_EN(0));
+	rockchip_phy_power_on(lvds->phy);
 
 	return 0;
 }
 
-static int rk3288_lvds_pwr_off(struct display_state *state)
+static int rockchip_lvds_connector_disable(struct display_state *state)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct rockchip_lvds *lvds = state_to_lvds(state);
 
-	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_DISABLE);
-	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_DISABLE);
+	rockchip_phy_power_off(lvds->phy);
 
-	writel(0xffff8000, lvds->grf + lvds->pdata->grf_soc_con7);
+	if (lvds->funcs->disable)
+		lvds->funcs->disable(lvds);
 
 	return 0;
 }
 
-static int rk336x_lvds_pwr_on(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 delay_times = 20;
-
-	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
-		/* set VOCM 900 mv and V-DIFF 350 mv */
-		lvds_msk_reg(lvds, MIPIPHY_REGE4, m_VOCM | m_DIFF_V,
-			     v_VOCM(0) | v_DIFF_V(2));
-		/* power up lvds pll and ldo */
-		lvds_msk_reg(lvds, MIPIPHY_REG1,
-			     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
-			     v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) |
-			     v_PLL_PWR_DOWN(0));
-		/* enable lvds lane and power on pll */
-		lvds_writel(lvds, MIPIPHY_REGEB,
-			    v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
-			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0) |
-			    v_LVDS_BGPD(0));
-
-		/* enable lvds */
-		lvds_msk_reg(lvds, MIPIPHY_REGE3,
-			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
-			     v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
-	} else {
-		lvds_msk_reg(lvds, MIPIPHY_REGE3,
-			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
-			     v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
+static const struct rockchip_connector_funcs rockchip_lvds_connector_funcs = {
+	.init = rockchip_lvds_connector_init,
+	.enable = rockchip_lvds_connector_enable,
+	.disable = rockchip_lvds_connector_disable,
+};
 
-		/* set clock lane enable */
-		lvds_ctrl_writel(lvds, 0xa0, 0x4);
-	}
-	/* delay for waitting pll lock on */
-	while (delay_times--) {
-		if (lvds_phy_lock(lvds))
-			break;
-		udelay(100);
-	}
+static int rockchip_lvds_probe(struct udevice *dev)
+{
+	struct rockchip_lvds *lvds = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
 
-	if (delay_times <= 0)
-		printf("wait lvds phy lock failed, please check the hardware!\n");
+	lvds->dev = dev;
+	lvds->funcs = connector->data;
+	lvds->grf = syscon_get_regmap(dev_get_parent(dev));
+	lvds->dual_channel = dev_read_bool(dev, "dual-channel");
+	lvds->data_swap = dev_read_bool(dev, "rockchip,data-swap");
 
 	return 0;
 }
 
-static void px30_output_ttl(struct display_state *state)
+static void px30_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = PX30_RGB_SYNC_BYPASS(1) | PX30_DPHY_FORCERXMODE(1);
-	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
-
-	/* enable lane */
-	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
-	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
-	lvds_writel(lvds, MIPIPHY_REGEB, val);
-	/* set ttl mode and reset phy config */
-	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
-		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
-	lvds_writel(lvds, MIPIPHY_REGE0, val);
-	rk336x_lvds_pwr_on(state);
+	regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_LVDS_SELECT(lvds->format) |
+		     PX30_LVDS_MODE_EN(1) | PX30_LVDS_MSBSEL(1) |
+		     PX30_LVDS_P2S_EN(1) | PX30_LVDS_VOP_SEL(pipe));
 }
 
-static void rk3126_output_ttl(struct display_state *state)
+static void px30_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = v_RK3126_LVDSMODE_EN(0) |
-		v_RK3126_MIPIPHY_TTL_EN(1) |
-		v_RK3126_MIPIPHY_LANE0_EN(1) |
-		v_RK3126_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-	val = v_RK3126_MIPITTL_CLK_EN(1) |
-		v_RK3126_MIPITTL_LANE0_EN(1) |
-		v_RK3126_MIPITTL_LANE1_EN(1) |
-		v_RK3126_MIPITTL_LANE2_EN(1) |
-		v_RK3126_MIPITTL_LANE3_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
-	/* enable lane */
-	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
-	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
-	lvds_writel(lvds, MIPIPHY_REGEB, val);
-	/* set ttl mode and reset phy config */
-	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
-		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
-	lvds_writel(lvds, MIPIPHY_REGE0, val);
-	rk336x_lvds_pwr_on(state);
-}
-
-static void rk336x_output_ttl(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(1) |
-		v_RK336X_MIPIPHY_LANE0_EN(1) |
-		v_RK336X_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-	val = v_RK336X_FORCE_JETAG(0);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
-
-	/* enable lane */
-	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
-	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
-	lvds_writel(lvds, MIPIPHY_REGEB, val);
-
-	/* set ttl mode and reset phy config */
-	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
-		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
-	lvds_writel(lvds, MIPIPHY_REGE0, val);
-
-	rk336x_lvds_pwr_on(state);
+	regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_LVDS_MODE_EN(0) | PX30_LVDS_P2S_EN(0));
 }
 
-static void px30_output_lvds(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	lvds_writel(lvds, MIPIPHY_REG0, 0x01);
-
-	/* enable lvds mode */
-	val = PX30_LVDS_PHY_MODE(1) | PX30_DPHY_FORCERXMODE(1);
-	/* config lvds_format */
-	val |= PX30_LVDS_OUTPUT_FORMAT(lvds->format);
-	/* LSB receive mode */
-	val |= PX30_LVDS_MSBSEL(LVDS_MSB_D7);
-	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
-
-	/* digital internal disable */
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
-
-	/* set pll prediv and fbdiv */
-	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
-	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
-
-	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
-
-	lvds_msk_reg(lvds, MIPIPHY_REG8,
-		     m_SAMPLE_CLK_DIR, v_SAMPLE_CLK_DIR_REVERSE);
-
-	/* set lvds mode and reset phy config */
-	lvds_msk_reg(lvds, MIPIPHY_REGE0,
-		     m_MSB_SEL | m_DIG_INTER_RST,
-		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+static const struct rockchip_lvds_funcs px30_lvds_funcs = {
+	.enable = px30_lvds_enable,
+	.disable = px30_lvds_disable,
+};
 
-	rk336x_lvds_pwr_on(state);
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
-}
+static const struct rockchip_connector px30_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &px30_lvds_funcs,
+};
 
-static void rk3126_output_lvds(struct display_state *state)
+static void rk3126_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val = v_RK3126_LVDSMODE_EN(1) |
-	      v_RK3126_MIPIPHY_TTL_EN(0);
-	/* config lvds_format */
-	val |= v_RK3126_LVDS_OUTPUT_FORMAT(lvds->format);
-	/* LSB receive mode */
-	val |= v_RK3126_LVDS_MSBSEL(LVDS_MSB_D7);
-	val |= v_RK3126_MIPIPHY_LANE0_EN(1) |
-	       v_RK3126_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-
-	/* digital internal disable */
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
-
-	/* set pll prediv and fbdiv */
-	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
-	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
-
-	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
-
-	/* set lvds mode and reset phy config */
-	lvds_msk_reg(lvds, MIPIPHY_REGE0,
-		     m_MSB_SEL | m_DIG_INTER_RST,
-		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
-
-	rk336x_lvds_pwr_on(state);
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+	regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0,
+		     RK3126_LVDS_P2S_EN(1) | RK3126_LVDS_MODE_EN(1) |
+		     RK3126_LVDS_MSBSEL(1) | RK3126_LVDS_SELECT(lvds->format));
 }
 
-static void rk336x_output_lvds(struct display_state *state)
+static void rk3126_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	u32 val = 0;
-
-	/* enable lvds mode */
-	val |= v_RK336X_LVDSMODE_EN(1) | v_RK336X_MIPIPHY_TTL_EN(0);
-	/* config lvds_format */
-	val |= v_RK336X_LVDS_OUTPUT_FORMAT(lvds->format);
-	/* LSB receive mode */
-	val |= v_RK336X_LVDS_MSBSEL(LVDS_MSB_D7);
-	val |= v_RK336X_MIPIPHY_LANE0_EN(1) |
-	       v_RK336X_MIPIDPI_FORCEX_EN(1);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-	/* digital internal disable */
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
-
-	/* set pll prediv and fbdiv */
-	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
-	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
-
-	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
-
-	/* set lvds mode and reset phy config */
-	lvds_msk_reg(lvds, MIPIPHY_REGE0,
-		     m_MSB_SEL | m_DIG_INTER_RST,
-		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
-
-	rk336x_lvds_pwr_on(state);
-	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+	regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0,
+		     RK3126_LVDS_P2S_EN(0) | RK3126_LVDS_MODE_EN(0));
 }
 
-static int rk3288_lvds_pwr_on(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	struct drm_display_mode *mode = &conn_state->mode;
-	u32 val;
-	u32 h_bp = mode->htotal - mode->hsync_start;
-	u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
-	u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
-
-	val = lvds->format;
-	if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
-		val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
-	else if (lvds->output == DISPLAY_OUTPUT_LVDS)
-		val |= LVDS_CH0_EN;
-	else if (lvds->output == DISPLAY_OUTPUT_RGB)
-		val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
-
-	if (h_bp & 0x01)
-		val |= LVDS_START_PHASE_RST_1;
-
-	val |= (pin_dclk << 8) | (pin_hsync << 9);
-	val |= (0xffff << 16);
-	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
-
-	return 0;
-}
+static const struct rockchip_lvds_funcs rk3126_lvds_funcs = {
+	.enable = rk3126_lvds_enable,
+	.disable = rk3126_lvds_disable,
+};
 
-static void rk3288_output_ttl(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	rk3288_lvds_pwr_on(state);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
-		    RK3288_LVDS_CH0_REG0_TTL_EN |
-		    RK3288_LVDS_CH0_REG0_LANECK_EN |
-		    RK3288_LVDS_CH0_REG0_LANE4_EN |
-		    RK3288_LVDS_CH0_REG0_LANE3_EN |
-		    RK3288_LVDS_CH0_REG0_LANE2_EN |
-		    RK3288_LVDS_CH0_REG0_LANE1_EN |
-		    RK3288_LVDS_CH0_REG0_LANE0_EN);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
-		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
-
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
-		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
-		    RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
-		    RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
-		    RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
-		    RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
-		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
-		    RK3288_LVDS_CH0_REG20_LSB);
-
-	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
-	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
-}
+static const struct rockchip_connector rk3126_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &rk3126_lvds_funcs,
+};
 
-static void rk3288_output_lvds(struct display_state *state)
+static void rk3288_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	rk3288_lvds_pwr_on(state);
-
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
-		    RK3288_LVDS_CH0_REG0_LVDS_EN |
-		    RK3288_LVDS_CH0_REG0_LANECK_EN |
-		    RK3288_LVDS_CH0_REG0_LANE4_EN |
-		    RK3288_LVDS_CH0_REG0_LANE3_EN |
-		    RK3288_LVDS_CH0_REG0_LANE2_EN |
-		    RK3288_LVDS_CH0_REG0_LANE1_EN |
-		    RK3288_LVDS_CH0_REG0_LANE0_EN);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
-		    RK3288_LVDS_CH0_REG1_LANECK_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE4_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE3_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE2_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE1_BIAS |
-		    RK3288_LVDS_CH0_REG1_LANE0_BIAS);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
-		    RK3288_LVDS_CH0_REG2_RESERVE_ON |
-		    RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
-		    RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
-		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
-		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
-	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
-		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
-	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
-		    RK3288_LVDS_CH0_REG20_LSB);
-
-	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
-	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
-}
+	const struct drm_display_mode *mode = lvds->mode;
+	u32 val;
 
-static int rockchip_lvds_init(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct rockchip_lvds_chip_data *pdata = connector->data;
-	struct rockchip_lvds_device *lvds;
-	const char *name;
-	int i, width;
-	struct resource lvds_phy, lvds_ctrl;
-	struct rockchip_panel *panel = state_get_panel(state);
-	int ret;
+	regmap_write(lvds->grf, RK3288_GRF_SOC_CON6,
+		     RK3288_LVDS_LCDC_SEL(pipe));
 
-	lvds = malloc(sizeof(*lvds));
-	if (!lvds)
-		return -ENOMEM;
-	lvds->pdata = pdata;
+	val = RK3288_LVDS_PWRDWN(0) | RK3288_LVDS_CON_CLKINV(0) |
+	      RK3288_LVDS_CON_CHASEL(lvds->dual_channel) |
+	      RK3288_LVDS_CON_SELECT(lvds->format);
 
-	if (pdata->chip_type == RK3288_LVDS) {
-		lvds->regbase = dev_read_addr_ptr(conn_state->dev);
-	} else {
-		i = dev_read_resource(conn_state->dev, 0, &lvds_phy);
-		if (i) {
-			printf("can't get regs lvds_phy addresses!\n");
-			free(lvds);
-			return -ENOMEM;
-		}
-
-		i = dev_read_resource(conn_state->dev, 1, &lvds_ctrl);
-		if (i) {
-			printf("can't get regs lvds_ctrl addresses!\n");
-			free(lvds);
-			return -ENOMEM;
-		}
-
-		lvds->regbase = (void *)lvds_phy.start;
-		lvds->ctrl_reg = (void *)lvds_ctrl.start;
-	}
+	if (lvds->dual_channel) {
+		u32 h_bp = mode->htotal - mode->hsync_start;
 
-	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (lvds->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-		      __func__, lvds->grf);
-		return  -ENXIO;
-	}
+		val |= RK3288_LVDS_CON_ENABLE_2(1) |
+		       RK3288_LVDS_CON_ENABLE_1(1) |
+		       RK3288_LVDS_CON_STARTSEL(lvds->data_swap);
 
-	ret = dev_read_string_index(panel->dev, "rockchip,output", 0, &name);
-	if (ret)
-		/* default set it as output rgb */
-		lvds->output = DISPLAY_OUTPUT_RGB;
-	else
-		lvds->output = lvds_name_to_output(name);
-	if (lvds->output < 0) {
-		printf("invalid output type [%s]\n", name);
-		free(lvds);
-		return lvds->output;
-	}
-	ret = dev_read_string_index(panel->dev, "rockchip,data-mapping",
-				    0, &name);
-	if (ret)
-		/* default set it as format jeida */
-		lvds->format = LVDS_FORMAT_JEIDA;
-	else
-		lvds->format = lvds_name_to_format(name);
-
-	if (lvds->format < 0) {
-		printf("invalid data-mapping format [%s]\n", name);
-		free(lvds);
-		return lvds->format;
-	}
-	width = dev_read_u32_default(panel->dev, "rockchip,data-width", 24);
-	if (width == 24) {
-		lvds->format |= LVDS_24BIT;
-	} else if (width == 18) {
-		lvds->format |= LVDS_18BIT;
+		if (h_bp % 2)
+			val |= RK3288_LVDS_CON_STARTPHASE(1);
+		else
+			val |= RK3288_LVDS_CON_STARTPHASE(0);
 	} else {
-		printf("rockchip-lvds unsupport data-width[%d]\n", width);
-		free(lvds);
-		return -EINVAL;
+		val |= RK3288_LVDS_CON_ENABLE_2(0) |
+		       RK3288_LVDS_CON_ENABLE_1(1);
 	}
 
-	printf("LVDS: data mapping: %s, data-width:%d, format:%d,\n",
-		name, width, lvds->format);
-	conn_state->private = lvds;
-	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
-
-	if ((lvds->output == DISPLAY_OUTPUT_RGB) && (width == 18))
-		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
-	else
-		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
-	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+	regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, val);
 
-	return 0;
+	rockchip_phy_set_bus_width(lvds->phy, lvds->dual_channel ? 2 : 1);
 }
 
-static void rockchip_lvds_deinit(struct display_state *state)
+static void rk3288_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	free(lvds);
+	regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, RK3288_LVDS_PWRDWN(1));
 }
 
-static int rockchip_lvds_prepare(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	lvds->mode = &conn_state->mode;
-
-	rockchip_lvds_clk_enable(lvds);
-
-	return 0;
-}
-
-static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pipe)
-{
-	u32 val;
+static const struct rockchip_lvds_funcs rk3288_lvds_funcs = {
+	.enable = rk3288_lvds_enable,
+	.disable = rk3288_lvds_disable,
+};
 
-	if (lvds->pdata->chip_type == RK3288_LVDS) {
-		if (pipe)
-			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
-				(RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
-		else
-			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
-		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
-	} else if (lvds->pdata->chip_type == PX30_LVDS) {
-		if (lvds->output == DISPLAY_OUTPUT_RGB)
-			writel(PX30_RGB_VOP_SEL(pipe),
-			       lvds->grf + PX30_GRF_PD_VO_CON1);
-		else if (lvds->output == DISPLAY_OUTPUT_LVDS)
-			writel(PX30_LVDS_VOP_SEL(pipe),
-			       lvds->grf + PX30_GRF_PD_VO_CON1);
-	}
-}
+static const struct rockchip_connector rk3288_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &rk3288_lvds_funcs,
+};
 
-static int rockchip_lvds_enable(struct display_state *state)
+static void rk3368_lvds_enable(struct rockchip_lvds *lvds, int pipe)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-	struct crtc_state *crtc_state = &state->crtc_state;
-
-	if (lvds->pdata->has_vop_sel)
-		rockchip_lvds_vop_routing(lvds, crtc_state->crtc_id);
-
-	if ((lvds->output == DISPLAY_OUTPUT_LVDS) ||
-	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)) {
-		if (lvds->pdata->chip_type == RK3288_LVDS)
-			rk3288_output_lvds(state);
-		else if (lvds->pdata->chip_type == RK3126_LVDS)
-			rk3126_output_lvds(state);
-		else if (lvds->pdata->chip_type == PX30_LVDS)
-			px30_output_lvds(state);
-		else
-			rk336x_output_lvds(state);
-	} else {
-		if (lvds->pdata->chip_type == RK3288_LVDS)
-			rk3288_output_ttl(state);
-		else if (lvds->pdata->chip_type == RK3126_LVDS)
-			rk3126_output_ttl(state);
-		else if (lvds->pdata->chip_type == PX30_LVDS)
-			px30_output_ttl(state);
-		else
-			rk336x_output_ttl(state);
-	}
-
-	return 0;
+	regmap_write(lvds->grf, RK3368_GRF_SOC_CON7,
+		     RK3368_LVDS_SELECT(lvds->format) |
+		     RK3368_LVDS_MODE_EN(1) | RK3368_LVDS_MSBSEL(1) |
+		     RK3368_LVDS_P2S_EN(1));
 }
 
-static int rockchip_lvds_disable(struct display_state *state)
+static void rk3368_lvds_disable(struct rockchip_lvds *lvds)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_lvds_device *lvds = conn_state->private;
-
-	if (lvds->pdata->chip_type == RK3288_LVDS)
-		rk3288_lvds_pwr_off(state);
-	else
-		rk336x_lvds_pwr_off(state);
-
-	return 0;
+	regmap_write(lvds->grf, RK3368_GRF_SOC_CON7,
+		     RK3368_LVDS_MODE_EN(0) | RK3368_LVDS_P2S_EN(0));
 }
 
-const struct rockchip_connector_funcs rockchip_lvds_funcs = {
-	.init = rockchip_lvds_init,
-	.deinit = rockchip_lvds_deinit,
-	.prepare = rockchip_lvds_prepare,
-	.enable = rockchip_lvds_enable,
-	.disable = rockchip_lvds_disable,
-};
-
-static const struct rockchip_lvds_chip_data px30_lvds_drv_data = {
-	.chip_type = PX30_LVDS,
-	.has_vop_sel = true,
-};
-
-static const struct rockchip_connector px30_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &px30_lvds_drv_data,
-};
-
-static const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
-	.chip_type = RK3126_LVDS,
-	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
-	.grf_soc_con15 = RK3126_GRF_CON1,
-	.has_vop_sel = true,
-};
-
-static const struct rockchip_connector rk3126_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3126_lvds_drv_data,
-};
-
-static const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
-	.chip_type = RK3288_LVDS,
-	.has_vop_sel = true,
-	.grf_soc_con6 = 0x025c,
-	.grf_soc_con7 = 0x0260,
-	.grf_gpio1d_iomux = 0x000c,
-};
-
-static const struct rockchip_connector rk3288_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3288_lvds_drv_data,
-};
-
-static const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
-	.chip_type = RK3368_LVDS,
-	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
-	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
-	.has_vop_sel = false,
+static const struct rockchip_lvds_funcs rk3368_lvds_funcs = {
+	.enable = rk3368_lvds_enable,
+	.disable = rk3368_lvds_disable,
 };
 
-static const struct rockchip_connector rk3368_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3368_lvds_drv_data,
+static const struct rockchip_connector rk3368_lvds_driver_data = {
+	 .funcs = &rockchip_lvds_connector_funcs,
+	 .data = &rk3368_lvds_funcs,
 };
 
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
 		.compatible = "rockchip,px30-lvds",
-		.data = (ulong)&px30_lvds_data,
+		.data = (ulong)&px30_lvds_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3126-lvds",
-		.data = (ulong)&rk3126_lvds_data,
+		.data = (ulong)&rk3126_lvds_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3288-lvds",
-		.data = (ulong)&rk3288_lvds_data,
+		.data = (ulong)&rk3288_lvds_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3368-lvds",
-		.data = (ulong)&rk3368_lvds_data,
+		.data = (ulong)&rk3368_lvds_driver_data,
 	},
 	{}
 };
@@ -775,4 +315,6 @@ U_BOOT_DRIVER(rockchip_lvds) = {
 	.name = "rockchip_lvds",
 	.id = UCLASS_DISPLAY,
 	.of_match = rockchip_lvds_ids,
+	.probe = rockchip_lvds_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_lvds),
 };
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 8c5f23e9f8..2d56410478 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -6,234 +6,13 @@
 
 #ifndef _ROCKCHIP_LVDS_H_
 #define _ROCKCHIP_LVDS_H_
-#define RK3288_LVDS_CH0_REG0			0x00
-#define RK3288_LVDS_CH0_REG0_LVDS_EN		BIT(7)
-#define RK3288_LVDS_CH0_REG0_TTL_EN		BIT(6)
-#define RK3288_LVDS_CH0_REG0_LANECK_EN		BIT(5)
-#define RK3288_LVDS_CH0_REG0_LANE4_EN		BIT(4)
-#define RK3288_LVDS_CH0_REG0_LANE3_EN		BIT(3)
-#define RK3288_LVDS_CH0_REG0_LANE2_EN		BIT(2)
-#define RK3288_LVDS_CH0_REG0_LANE1_EN		BIT(1)
-#define RK3288_LVDS_CH0_REG0_LANE0_EN		BIT(0)
-
-#define RK3288_LVDS_CH0_REG1			0x04
-#define RK3288_LVDS_CH0_REG1_LANECK_BIAS	BIT(5)
-#define RK3288_LVDS_CH0_REG1_LANE4_BIAS		BIT(4)
-#define RK3288_LVDS_CH0_REG1_LANE3_BIAS		BIT(3)
-#define RK3288_LVDS_CH0_REG1_LANE2_BIAS		BIT(2)
-#define RK3288_LVDS_CH0_REG1_LANE1_BIAS		BIT(1)
-#define RK3288_LVDS_CH0_REG1_LANE0_BIAS		BIT(0)
-
-#define RK3288_LVDS_CH0_REG2			0x08
-#define RK3288_LVDS_CH0_REG2_RESERVE_ON		BIT(7)
-#define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE	BIT(6)
-#define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE	BIT(5)
-#define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE	BIT(4)
-#define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE	BIT(3)
-#define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE	BIT(2)
-#define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE	BIT(1)
-#define RK3288_LVDS_CH0_REG2_PLL_FBDIV8		BIT(0)
-
-#define RK3288_LVDS_CH0_REG3			0x0c
-#define RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK	0xff
-
-#define RK3288_LVDS_CH0_REG4			0x10
-#define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE	BIT(5)
-#define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE	BIT(4)
-#define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE	BIT(3)
-#define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE	BIT(2)
-#define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE	BIT(1)
-#define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE	BIT(0)
-
-#define RK3288_LVDS_CH0_REG5			0x14
-#define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA	BIT(5)
-#define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA	BIT(4)
-#define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA	BIT(3)
-#define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA	BIT(2)
-#define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA	BIT(1)
-#define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA	BIT(0)
-
-#define RK3288_LVDS_CFG_REGC			0x30
-#define RK3288_LVDS_CFG_REGC_PLL_ENABLE		0x00
-#define RK3288_LVDS_CFG_REGC_PLL_DISABLE	0xff
-
-#define RK3288_LVDS_CH0_REGD			0x34
-#define RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK	0x1f
-
-#define RK3288_LVDS_CH0_REG20			0x80
-#define RK3288_LVDS_CH0_REG20_MSB		0x45
-#define RK3288_LVDS_CH0_REG20_LSB		0x44
-
-#define RK3288_LVDS_CFG_REG21			0x84
-#define RK3288_LVDS_CFG_REG21_TX_ENABLE		0x92
-#define RK3288_LVDS_CFG_REG21_TX_DISABLE	0x00
-
-/* fbdiv value is split over 2 registers, with bit8 in reg2 */
-#define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \
-		(_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
-#define RK3288_LVDS_PLL_FBDIV_REG3(_fbd) \
-		(_fbd & RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK)
-#define RK3288_LVDS_PLL_PREDIV_REGD(_pd) \
-		(_pd & RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK)
-
-#define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT	BIT(3)
-
-#define LVDS_FMT_MASK				(0x07 << 16)
-#define LVDS_MSB				BIT(3)
-#define LVDS_DUAL				BIT(4)
-#define LVDS_FMT_1				BIT(5)
-#define LVDS_TTL_EN				BIT(6)
-#define LVDS_START_PHASE_RST_1			BIT(7)
-#define LVDS_DCLK_INV				BIT(8)
-#define LVDS_CH0_EN				BIT(11)
-#define LVDS_CH1_EN				BIT(12)
-#define LVDS_PWRDN				BIT(15)
 
 #define LVDS_24BIT				(0 << 1)
 #define LVDS_18BIT				(1 << 1)
 #define LVDS_FORMAT_VESA			(0 << 0)
 #define LVDS_FORMAT_JEIDA			(1 << 0)
 
-#define DISPLAY_OUTPUT_RGB		0
 #define DISPLAY_OUTPUT_LVDS		1
 #define DISPLAY_OUTPUT_DUAL_LVDS	2
 
-#define BITS(x, bit)            ((x) << (bit))
-#define BITS_MASK(x, mask, bit)  BITS((x) & (mask), bit)
-#define BITS_EN(mask, bit)       BITS(mask, bit + 16)
-
-#define RK3368_GRF_SOC_CON7	0x041c
-#define RK3368_GRF_SOC_CON15	0x043c
-
-#define RK3126_GRF_LVDS_CON0	0x0150
-#define RK3126_GRF_CON1		0x0144
-#define RK3126_GRF_GPIO2B_IOMUX	0x00cc  /* dclk sync vsync den d10 d11 d12 d13*/
-#define RK3126_GRF_GPIO2C_IOMUX	0x00d0  /* d14 d15 d16 d17 */
-#define RK3126_GRF_GPIO2C_IOMUX2	0x00e8  /* d18 d19 d20 d21 */
-#define RK3126_GRF_GPIO2D_IOMUX	0x00d4  /* d22 d23 0x700c1004*/
-
-#define PX30_GRF_PD_VO_CON0	0x0434
-#define PX30_GRF_PD_VO_CON1	0x0438
-#define PX30_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 0x3, 13) | BITS_EN(0x3, 13))
-#define PX30_LVDS_PHY_MODE(x)		(BITS_MASK(x, 0x1, 12) | BITS_EN(0x1, 12))
-#define PX30_LVDS_MSBSEL(x)		(BITS_MASK(x, 0x1, 11) | BITS_EN(0x1, 11))
-#define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
-#define PX30_LCDC_DCLK_INV(x)		(BITS_MASK(x, 0x1,  4) | BITS_EN(0x1,  4))
-#define PX30_RGB_SYNC_BYPASS(x)		(BITS_MASK(x, 0x1,  3) | BITS_EN(0x1,  3))
-#define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
-#define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
-
-#define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
-#define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
-#define v_RK336X_LVDSMODE_EN(x)        (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
-#define v_RK336X_MIPIPHY_TTL_EN(x)     (BITS_MASK(x, 1, 15) | BITS_EN(1, 15))
-#define v_RK336X_MIPIPHY_LANE0_EN(x)   (BITS_MASK(x, 1, 5) | BITS_EN(1, 5))
-#define v_RK336X_MIPIDPI_FORCEX_EN(x)  (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
-
-#define v_RK3126_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 3, 1) | BITS_EN(3, 1))
-#define v_RK3126_LVDS_MSBSEL(x)		(BITS_MASK(x, 1, 3) | BITS_EN(1, 3))
-#define v_RK3126_LVDSMODE_EN(x)		(BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
-#define v_RK3126_MIPIPHY_TTL_EN(x)	(BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
-#define v_RK3126_MIPIPHY_LANE0_EN(x)	(BITS_MASK(x, 1, 8) | BITS_EN(1, 8))
-#define v_RK3126_MIPIDPI_FORCEX_EN(x)	(BITS_MASK(x, 1, 9) | BITS_EN(1, 9))
-
-#define v_RK3126_MIPITTL_CLK_EN(x)     (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
-#define v_RK3126_MIPITTL_LANE0_EN(x)   (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
-#define v_RK3126_MIPITTL_LANE1_EN(x)   (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
-#define v_RK3126_MIPITTL_LANE2_EN(x)   (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
-#define v_RK3126_MIPITTL_LANE3_EN(x)   (BITS_MASK(x, 1, 14) | BITS_EN(1, 14))
-
-#define MIPIC_PHY_RSTZ		0x00a0
-#define m_PHY_ENABLE_CLK	BIT(2)
-#define MIPIC_PHY_STATUS	0x00b0
-#define m_PHY_LOCK_STATUS	BIT(0)
-
-enum {
-	LVDS_DATA_FROM_LCDC = 0,
-	LVDS_DATA_FORM_EBC,
-};
-
-enum {
-	LVDS_MSB_D0 = 0,
-	LVDS_MSB_D7,
-};
-
-#define MIPIPHY_REG0            0x0000
-#define m_LANE_EN_0             BITS(1, 2)
-#define m_LANE_EN_1             BITS(1, 3)
-#define m_LANE_EN_2             BITS(1, 4)
-#define m_LANE_EN_3             BITS(1, 5)
-#define m_LANE_EN_CLK           BITS(1, 5)
-#define v_LANE_EN_0(x)          BITS(1, 2)
-#define v_LANE_EN_1(x)          BITS(1, 3)
-#define v_LANE_EN_2(x)          BITS(1, 4)
-#define v_LANE_EN_3(x)          BITS(1, 5)
-#define v_LANE_EN_CLK(x)        BITS(1, 5)
-
-#define MIPIPHY_REG1            0x0004
-#define m_SYNC_RST              BITS(1, 0)
-#define m_LDO_PWR_DOWN          BITS(1, 1)
-#define m_PLL_PWR_DOWN          BITS(1, 2)
-#define v_SYNC_RST(x)           BITS_MASK(x, 1, 0)
-#define v_LDO_PWR_DOWN(x)       BITS_MASK(x, 1, 1)
-#define v_PLL_PWR_DOWN(x)       BITS_MASK(x, 1, 2)
-
-#define MIPIPHY_REG3		0x000c
-#define m_PREDIV                BITS(0x1f, 0)
-#define m_FBDIV_MSB             BITS(1, 5)
-#define v_PREDIV(x)             BITS_MASK(x, 0x1f, 0)
-#define v_FBDIV_MSB(x)          BITS_MASK(x, 1, 5)
-
-#define MIPIPHY_REG4		0x0010
-#define v_FBDIV_LSB(x)          BITS_MASK(x, 0xff, 0)
-
-#define MIPIPHY_REG8			0x0020
-#define m_SAMPLE_CLK_DIR		BIT(4)
-#define v_SAMPLE_CLK_DIR_REVERSE	BIT(4)
-
-#define MIPIPHY_REGE0		0x0380
-#define m_MSB_SEL               BITS(1, 0)
-#define m_DIG_INTER_RST         BITS(1, 2)
-#define m_LVDS_MODE_EN          BITS(1, 5)
-#define m_TTL_MODE_EN           BITS(1, 6)
-#define m_MIPI_MODE_EN          BITS(1, 7)
-#define v_MSB_SEL(x)            BITS_MASK(x, 1, 0)
-#define v_DIG_INTER_RST(x)      BITS_MASK(x, 1, 2)
-#define v_LVDS_MODE_EN(x)       BITS_MASK(x, 1, 5)
-#define v_TTL_MODE_EN(x)        BITS_MASK(x, 1, 6)
-#define v_MIPI_MODE_EN(x)       BITS_MASK(x, 1, 7)
-
-#define MIPIPHY_REGE1           0x0384
-#define m_DIG_INTER_EN          BITS(1, 7)
-#define v_DIG_INTER_EN(x)       BITS_MASK(x, 1, 7)
-
-#define MIPIPHY_REGE3           0x038c
-#define m_MIPI_EN               BITS(1, 0)
-#define m_LVDS_EN               BITS(1, 1)
-#define m_TTL_EN                BITS(1, 2)
-#define v_MIPI_EN(x)            BITS_MASK(x, 1, 0)
-#define v_LVDS_EN(x)            BITS_MASK(x, 1, 1)
-#define v_TTL_EN(x)             BITS_MASK(x, 1, 2)
-
-#define MIPIPHY_REGE4		0x0390
-#define m_VOCM			BITS(3, 4)
-#define m_DIFF_V		BITS(3, 6)
-
-#define v_VOCM(x)		BITS_MASK(x, 3, 4)
-#define v_DIFF_V(x)		BITS_MASK(x, 3, 6)
-
-#define MIPIPHY_REGE8           0x03a0
-
-#define MIPIPHY_REGEB           0x03ac
-#define v_LVDS_BGPD(x)		BITS_MASK(x, 1, 0)
-#define v_PLL_PWR_OFF(x)        BITS_MASK(x, 1, 2)
-#define v_LANECLK_EN(x)         BITS_MASK(x, 1, 3)
-#define v_LANE3_EN(x)           BITS_MASK(x, 1, 4)
-#define v_LANE2_EN(x)           BITS_MASK(x, 1, 5)
-#define v_LANE1_EN(x)           BITS_MASK(x, 1, 6)
-#define v_LANE0_EN(x)           BITS_MASK(x, 1, 7)
-
-#define LVDS_PMUGRF_BASE         0xff738000
-#define v_RK336X_FORCE_JETAG(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
-
 #endif

commit 496271300bc02990751c0135da5e10ff2441e762
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 28 11:27:40 2018 +0800

    video/drm: rgb: Add support for rk3128/rk3288/rk3368
    
    Change-Id: I248a2966514f4417d88c070dcb4e87e682f04df5
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 424b0986cd..95fcad5023 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -15,6 +15,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_phy.h"
 
 #define PX30_GRF_PD_VO_CON1		0x0438
 #define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
@@ -23,6 +24,15 @@
 #define RK1808_GRF_PD_VO_CON1		0x0444
 #define RK1808_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
 
+#define RK3288_GRF_SOC_CON6		0x025c
+#define RK3288_LVDS_LCDC_SEL(v)		HIWORD_UPDATE(v,  3,  3)
+#define RK3288_GRF_SOC_CON7		0x0260
+#define RK3288_LVDS_PWRDWN(v)		HIWORD_UPDATE(v, 15, 15)
+#define RK3288_LVDS_CON_ENABLE_2(v)	HIWORD_UPDATE(v, 12, 12)
+#define RK3288_LVDS_CON_ENABLE_1(v)	HIWORD_UPDATE(v, 11, 11)
+#define RK3288_LVDS_CON_CLKINV(v)	HIWORD_UPDATE(v,  8,  8)
+#define RK3288_LVDS_CON_TTL_EN(v)	HIWORD_UPDATE(v,  6,  6)
+
 struct rockchip_rgb;
 
 struct rockchip_rgb_funcs {
@@ -31,8 +41,10 @@ struct rockchip_rgb_funcs {
 };
 
 struct rockchip_rgb {
+	struct udevice *dev;
 	struct regmap *grf;
 	bool data_sync;
+	struct rockchip_phy *phy;
 	const struct rockchip_rgb_funcs *funcs;
 };
 
@@ -48,10 +60,21 @@ static int rockchip_rgb_connector_enable(struct display_state *state)
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
+	int ret;
 
 	if (rgb->funcs && rgb->funcs->enable)
 		rgb->funcs->enable(rgb, pipe);
 
+	if (rgb->phy) {
+		ret = rockchip_phy_set_mode(rgb->phy, PHY_MODE_VIDEO_TTL);
+		if (ret) {
+			dev_err(rgb->dev, "failed to set phy mode: %d\n", ret);
+			return ret;
+		}
+
+		rockchip_phy_power_on(rgb->phy);
+	}
+
 	return 0;
 }
 
@@ -59,6 +82,9 @@ static int rockchip_rgb_connector_disable(struct display_state *state)
 {
 	struct rockchip_rgb *rgb = state_to_rgb(state);
 
+	if (rgb->phy)
+		rockchip_phy_power_off(rgb->phy);
+
 	if (rgb->funcs && rgb->funcs->disable)
 		rgb->funcs->disable(rgb);
 
@@ -67,8 +93,11 @@ static int rockchip_rgb_connector_disable(struct display_state *state)
 
 static int rockchip_rgb_connector_init(struct display_state *state)
 {
+	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct connector_state *conn_state = &state->conn_state;
 
+	rgb->phy = conn_state->phy;
+
 	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
@@ -101,6 +130,7 @@ static int rockchip_rgb_probe(struct udevice *dev)
 	const struct rockchip_connector *connector =
 		(const struct rockchip_connector *)dev_get_driver_data(dev);
 
+	rgb->dev = dev;
 	rgb->funcs = connector->data;
 	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
 	rgb->data_sync = dev_read_bool(dev, "rockchip,data-sync");
@@ -138,6 +168,32 @@ static const struct rockchip_connector rk1808_rgb_driver_data = {
 	.data = &rk1808_rgb_funcs,
 };
 
+static void rk3288_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, RK3288_GRF_SOC_CON6, RK3288_LVDS_LCDC_SEL(pipe));
+	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
+		     RK3288_LVDS_PWRDWN(0) | RK3288_LVDS_CON_ENABLE_2(1) |
+		     RK3288_LVDS_CON_ENABLE_1(1) | RK3288_LVDS_CON_CLKINV(0) |
+		     RK3288_LVDS_CON_TTL_EN(1));
+}
+
+static void rk3288_rgb_disable(struct rockchip_rgb *rgb)
+{
+	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
+		     RK3288_LVDS_PWRDWN(1) | RK3288_LVDS_CON_ENABLE_2(0) |
+		     RK3288_LVDS_CON_ENABLE_1(0) | RK3288_LVDS_CON_TTL_EN(0));
+}
+
+static const struct rockchip_rgb_funcs rk3288_rgb_funcs = {
+	.enable = rk3288_rgb_enable,
+	.disable = rk3288_rgb_disable,
+};
+
+static const struct rockchip_connector rk3288_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
+	.data = &rk3288_rgb_funcs,
+};
+
 static const struct rockchip_connector rockchip_rgb_driver_data = {
 	.funcs = &rockchip_rgb_connector_funcs,
 };
@@ -155,10 +211,22 @@ static const struct udevice_id rockchip_rgb_ids[] = {
 		.compatible = "rockchip,rk3066-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3128-rgb",
+		.data = (ulong)&rockchip_rgb_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-rgb",
+		.data = (ulong)&rk3288_rgb_driver_data,
+	},
 	{
 		.compatible = "rockchip,rk3308-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,
 	},
+	{
+		.compatible = "rockchip,rk3368-rgb",
+		.data = (ulong)&rockchip_rgb_driver_data,
+	},
 	{
 		.compatible = "rockchip,rv1108-rgb",
 		.data = (ulong)&rockchip_rgb_driver_data,

commit 9fb0493f61c70f99c89b8ce23582940bafc6a307
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 10 09:50:21 2018 +0800

    phy/rockchip: Add support for INNOSILICON LVDS/TTL PHY
    
    Innosilicon LVDS/TTL PHY implements LVDS TIA/EIA protocol.
    Normally, Innosilicon LVDS/TTL PHY contains four 7-bit
    parallel-load serial-out shift registers, a 7X clock PLL,
    and five Low-Voltage Differential Signaling (LVDS) line drivers
    in a single integrated circuit. These functions allow 28 bits
    of single-ended LVTTL data to be synchronously transmitted over
    five balanced-pair conductors for receipt by a compatible receiver.
    
    In addition, Innosilicon LVDS/TTL PHY could extend from 4 lanes
    to N lanes (N is required by the customer). Therefore, the TTL
    lines extend respectively.
    
    Change-Id: I2b6b9cccd88c8ca89ef5f45e964e9eb936777ffc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index d3d700213f..b2663d8f96 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -30,6 +30,13 @@ config ROCKCHIP_INNO_HDMI_PHY
 	 use HDMI or TVE in RK322XH or RK322X, you should selet
 	 this option.
 
+config DRM_ROCKCHIP_INNO_VIDEO_PHY
+	tristate "Rockchip INNO LVDS/TTL PHY driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Enable this to support the Rockchip LVDS/TTL PHY
+	  with Innosilicon IP block.
+
 config DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
 	tristate "Rockchip INNO MIPI/LVDS/TTL PHY driver"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 237657fb43..f5ceca0364 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_PHY) += inno_video_phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
diff --git a/drivers/video/drm/inno_video_phy.c b/drivers/video/drm/inno_video_phy.c
new file mode 100644
index 0000000000..939c2e9925
--- /dev/null
+++ b/drivers/video/drm/inno_video_phy.c
@@ -0,0 +1,233 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Wyon Bi <bivvy.bi@rock-chips.com>
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <linux/iopoll.h>
+
+#include "rockchip_phy.h"
+
+/* Register: 0x0030 */
+#define DISABLE_PLL	BIT(3)
+/* Register: 0x003c */
+#define PLL_LOCK	BIT(1)
+/* Register: 0x0084 */
+#define ENABLE_TX	BIT(7)
+
+struct inno_video_phy {
+	void __iomem *base;
+	enum phy_mode mode;
+	bool dual_channel;
+};
+
+struct reg_sequence {
+	unsigned int reg;
+	unsigned int def;
+	unsigned int delay_us;
+};
+
+static const struct reg_sequence ttl_mode[] = {
+	{ 0x0000, 0x7f },
+	{ 0x0004, 0x3f },
+	{ 0x0008, 0x80 },
+	{ 0x0010, 0x3f },
+	{ 0x0014, 0x3f },
+	{ 0x0080, 0x44 },
+
+	{ 0x0100, 0x7f },
+	{ 0x0104, 0x3f },
+	{ 0x0108, 0x80 },
+	{ 0x0110, 0x3f },
+	{ 0x0114, 0x3f },
+	{ 0x0180, 0x44 },
+};
+
+static const struct reg_sequence lvds_mode_single_channel[] = {
+	{ 0x0000, 0xbf },
+	{ 0x0004, 0x3f },
+	{ 0x0008, 0xfe },
+	{ 0x0010, 0x00 },
+	{ 0x0014, 0x00 },
+	{ 0x0080, 0x44 },
+
+	{ 0x0100, 0x00 },
+	{ 0x0104, 0x00 },
+	{ 0x0108, 0x00 },
+	{ 0x0110, 0x00 },
+	{ 0x0114, 0x00 },
+	{ 0x0180, 0x44 },
+};
+
+static const struct reg_sequence lvds_mode_dual_channel[] = {
+	{ 0x0000, 0xbf },
+	{ 0x0004, 0x3f },
+	{ 0x0008, 0xfe },
+	{ 0x0010, 0x00 },
+	{ 0x0014, 0x00 },
+	{ 0x0080, 0x44 },
+
+	{ 0x0100, 0xbf },
+	{ 0x0104, 0x3f },
+	{ 0x0108, 0xfe },
+	{ 0x0110, 0x00 },
+	{ 0x0114, 0x00 },
+	{ 0x0180, 0x44 },
+};
+
+static inline void phy_write(struct inno_video_phy *inno, u32 reg, u32 val)
+{
+	writel(val, inno->base + reg);
+}
+
+static inline u32 phy_read(struct inno_video_phy *inno, u32 reg)
+{
+	return readl(inno->base + reg);
+}
+
+static inline void phy_update_bits(struct inno_video_phy *inno,
+				   u32 reg, u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = phy_read(inno, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	phy_write(inno, reg, tmp);
+}
+
+static void phy_multi_write(struct inno_video_phy *inno,
+			    const struct reg_sequence *regs, int num_regs)
+{
+	int i;
+
+	for (i = 0; i < num_regs; i++) {
+		phy_write(inno, regs[i].reg, regs[i].def);
+
+		if (regs[i].delay_us)
+			udelay(regs[i].delay_us);
+	}
+}
+
+static int inno_video_phy_power_on(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+	const struct reg_sequence *wseq;
+	int nregs;
+	u32 status;
+	int ret;
+
+	switch (inno->mode) {
+	case PHY_MODE_VIDEO_LVDS:
+		if (inno->dual_channel) {
+			wseq = lvds_mode_dual_channel;
+			nregs = ARRAY_SIZE(lvds_mode_dual_channel);
+		} else {
+			wseq = lvds_mode_single_channel;
+			nregs = ARRAY_SIZE(lvds_mode_single_channel);
+		}
+		break;
+	case PHY_MODE_VIDEO_TTL:
+		wseq = ttl_mode;
+		nregs = ARRAY_SIZE(ttl_mode);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	phy_multi_write(inno, wseq, nregs);
+
+	phy_update_bits(inno, 0x0030, DISABLE_PLL, 0);
+	ret = readl_poll_timeout(inno->base + 0x003c, status,
+				 status & PLL_LOCK, 10000);
+	if (ret) {
+		dev_err(phy->dev, "PLL is not lock\n");
+		return ret;
+	}
+
+	phy_update_bits(inno, 0x0084, ENABLE_TX, ENABLE_TX);
+
+	return 0;
+}
+
+static int inno_video_phy_power_off(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	phy_update_bits(inno, 0x0084, ENABLE_TX, 0);
+	phy_update_bits(inno, 0x0030, DISABLE_PLL, DISABLE_PLL);
+
+	return 0;
+}
+
+static int inno_video_phy_set_mode(struct rockchip_phy *phy,
+				   enum phy_mode mode)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	switch (mode) {
+	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_VIDEO_TTL:
+		inno->mode = mode;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int
+inno_video_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	inno->dual_channel = (bus_width == 2) ? true : false;
+
+	return 0;
+}
+
+static const struct rockchip_phy_funcs inno_video_phy_funcs = {
+	.power_on = inno_video_phy_power_on,
+	.power_off = inno_video_phy_power_off,
+	.set_mode = inno_video_phy_set_mode,
+	.set_bus_width = inno_video_phy_set_bus_width,
+};
+
+static int inno_video_phy_probe(struct udevice *dev)
+{
+	struct inno_video_phy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+
+	inno->base = dev_read_addr_ptr(dev);
+	phy->dev = dev;
+
+	return 0;
+}
+
+static struct rockchip_phy inno_video_phy_driver_data = {
+	 .funcs = &inno_video_phy_funcs,
+};
+
+static const struct udevice_id inno_video_phy_ids[] = {
+	{
+		.compatible = "rockchip,rk3288-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(inno_video_phy) = {
+	.name = "inno_video_phy",
+	.id = UCLASS_PHY,
+	.of_match = inno_video_phy_ids,
+	.probe = inno_video_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_video_phy),
+};

commit 1e992932a70bbf4a5b56d64802275a6f7402acf9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 18:50:39 2018 +0800

    video/drm: mipi_dphy: Remove support for px30/rk3128/rk3366/rk3368
    
    The mipi dphy driver of px30/rk3128/rk3368 is now supported
    by inno_video_combo_phy.c.
    
    Change-Id: I1194fa3093cb2bac1cb75ccf1266c7bd4dd68867
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 267770387e..4ef418c060 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -586,22 +586,6 @@ static struct rockchip_phy inno_mipi_dphy_driver_data = {
 };
 
 static const struct udevice_id inno_mipi_dphy_ids[] = {
-	{
-		.compatible = "rockchip,px30-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
-	{
-		.compatible = "rockchip,rk3128-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
-	{
-		.compatible = "rockchip,rk3366-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
-	{
-		.compatible = "rockchip,rk3368-mipi-dphy",
-		.data = (ulong)&inno_mipi_dphy_driver_data,
-	},
 	{
 		.compatible = "rockchip,rv1108-mipi-dphy",
 		.data = (ulong)&inno_mipi_dphy_driver_data,

commit c916e93361c3819dc70d13ce65b3094362a25b5d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:52:31 2018 +0800

    video/drm: dsi: set phy mode before enable phy
    
    Change-Id: Ida5fa789aa634a44102cdb72599716fdda8ea1fd
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 4769c801c6..dc71da99d0 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -1175,6 +1175,7 @@ static void dw_mipi_dsi_pre_init(struct dw_mipi_dsi *dsi)
 		bw = dw_mipi_dsi_calc_bandwidth(dsi);
 		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
 		dsi->lane_mbps = rate / USEC_PER_SEC;
+		rockchip_phy_set_mode(dsi->dphy.phy, PHY_MODE_VIDEO_MIPI);
 		rockchip_phy_power_on(dsi->dphy.phy);
 	} else {
 		dw_mipi_dsi_get_lane_bps(dsi);

commit caad302d1f719bee384ae4a9b4054d63ff478b5d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Dec 7 16:40:47 2018 +0800

    video/drm: Add support for INNOSILICON MIPI/LVDS/TTL Video Combo PHY
    
    The Innosilicon Video Combo PHY not only supports MIPI DSI,
    but also LVDS and TTL functions with small die size and low
    pin count. Customers can choose according to their own applications.
    
    Change-Id: I45bfb63014ddc1df0931ae573894e14aec8dc461
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 6f071f8cb1..d3d700213f 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -30,6 +30,13 @@ config ROCKCHIP_INNO_HDMI_PHY
 	 use HDMI or TVE in RK322XH or RK322X, you should selet
 	 this option.
 
+config DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY
+	tristate "Rockchip INNO MIPI/LVDS/TTL PHY driver"
+	depends on DRM_ROCKCHIP
+	help
+	  Enable this to support the Rockchip MIPI/LVDS/TTL PHY
+	  with Innosilicon IP block.
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index c91f46967a..237657fb43 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY) += inno_video_combo_phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
diff --git a/drivers/video/drm/inno_video_combo_phy.c b/drivers/video/drm/inno_video_combo_phy.c
new file mode 100644
index 0000000000..af4020858c
--- /dev/null
+++ b/drivers/video/drm/inno_video_combo_phy.c
@@ -0,0 +1,719 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Wyon Bi <bivvy.bi@rock-chips.com>
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <dm.h>
+#include <div64.h>
+#include <asm/io.h>
+#include <linux/ioport.h>
+#include <linux/iopoll.h>
+#include <linux/math64.h>
+
+#include "rockchip_phy.h"
+
+#define PSEC_PER_SEC	1000000000000LL
+
+#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))
+
+/*
+ * The offset address[7:0] is distributed two parts, one from the bit7 to bit5
+ * is the first address, the other from the bit4 to bit0 is the second address.
+ * when you configure the registers, you must set both of them. The Clock Lane
+ * and Data Lane use the same registers with the same second address, but the
+ * first address is different.
+ */
+#define FIRST_ADDRESS(x)		(((x) & 0x7) << 5)
+#define SECOND_ADDRESS(x)		(((x) & 0x1f) << 0)
+#define PHY_REG(first, second)		(FIRST_ADDRESS(first) | \
+					 SECOND_ADDRESS(second))
+
+/* Analog Register Part: reg00 */
+#define BANDGAP_POWER_MASK			BIT(7)
+#define BANDGAP_POWER_DOWN			BIT(7)
+#define BANDGAP_POWER_ON			0
+#define LANE_EN_MASK				GENMASK(6, 2)
+#define LANE_EN_CK				BIT(6)
+#define LANE_EN_3				BIT(5)
+#define LANE_EN_2				BIT(4)
+#define LANE_EN_1				BIT(3)
+#define LANE_EN_0				BIT(2)
+#define POWER_WORK_MASK				GENMASK(1, 0)
+#define POWER_WORK_ENABLE			UPDATE(1, 1, 0)
+#define POWER_WORK_DISABLE			UPDATE(2, 1, 0)
+/* Analog Register Part: reg01 */
+#define REG_SYNCRST_MASK			BIT(2)
+#define REG_SYNCRST_RESET			BIT(2)
+#define REG_SYNCRST_NORMAL			0
+#define REG_LDOPD_MASK				BIT(1)
+#define REG_LDOPD_POWER_DOWN			BIT(1)
+#define REG_LDOPD_POWER_ON			0
+#define REG_PLLPD_MASK				BIT(0)
+#define REG_PLLPD_POWER_DOWN			BIT(0)
+#define REG_PLLPD_POWER_ON			0
+/* Analog Register Part: reg03 */
+#define REG_FBDIV_HI_MASK			BIT(5)
+#define REG_FBDIV_HI(x)				UPDATE(x, 5, 5)
+#define REG_PREDIV_MASK				GENMASK(4, 0)
+#define REG_PREDIV(x)				UPDATE(x, 4, 0)
+/* Analog Register Part: reg04 */
+#define REG_FBDIV_LO_MASK			GENMASK(7, 0)
+#define REG_FBDIV_LO(x)				UPDATE(x, 7, 0)
+/* Analog Register Part: reg05 */
+#define SAMPLE_CLOCK_PHASE_MASK			GENMASK(6, 4)
+#define SAMPLE_CLOCK_PHASE(x)			UPDATE(x, 6, 4)
+#define CLOCK_LANE_SKEW_PHASE_MASK		GENMASK(2, 0)
+#define CLOCK_LANE_SKEW_PHASE(x)		UPDATE(x, 2, 0)
+/* Analog Register Part: reg06 */
+#define DATA_LANE_3_SKEW_PHASE_MASK		GENMASK(6, 4)
+#define DATA_LANE_3_SKEW_PHASE(x)		UPDATE(x, 6, 4)
+#define DATA_LANE_2_SKEW_PHASE_MASK		GENMASK(2, 0)
+#define DATA_LANE_2_SKEW_PHASE(x)		UPDATE(x, 2, 0)
+/* Analog Register Part: reg07 */
+#define DATA_LANE_1_SKEW_PHASE_MASK		GENMASK(6, 4)
+#define DATA_LANE_1_SKEW_PHASE(x)		UPDATE(x, 6, 4)
+#define DATA_LANE_0_SKEW_PHASE_MASK		GENMASK(2, 0)
+#define DATA_LANE_0_SKEW_PHASE(x)		UPDATE(x, 2, 0)
+/* Analog Register Part: reg08 */
+#define SAMPLE_CLOCK_DIRECTION_MASK		BIT(4)
+#define SAMPLE_CLOCK_DIRECTION_REVERSE		BIT(4)
+#define SAMPLE_CLOCK_DIRECTION_FORWARD		0
+/* Digital Register Part: reg00 */
+#define REG_DIG_RSTN_MASK			BIT(0)
+#define REG_DIG_RSTN_NORMAL			BIT(0)
+#define REG_DIG_RSTN_RESET			0
+/* Digital Register Part: reg01	*/
+#define INVERT_TXCLKESC_MASK			BIT(1)
+#define INVERT_TXCLKESC_ENABLE			BIT(1)
+#define INVERT_TXCLKESC_DISABLE			0
+#define INVERT_TXBYTECLKHS_MASK			BIT(0)
+#define INVERT_TXBYTECLKHS_ENABLE		BIT(0)
+#define INVERT_TXBYTECLKHS_DISABLE		0
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg05 */
+#define T_LPX_CNT_MASK				GENMASK(5, 0)
+#define T_LPX_CNT(x)				UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg06 */
+#define T_HS_PREPARE_CNT_MASK			GENMASK(6, 0)
+#define T_HS_PREPARE_CNT(x)			UPDATE(x, 6, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg07 */
+#define T_HS_ZERO_CNT_MASK			GENMASK(5, 0)
+#define T_HS_ZERO_CNT(x)			UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg08 */
+#define T_HS_TRAIL_CNT_MASK			GENMASK(6, 0)
+#define T_HS_TRAIL_CNT(x)			UPDATE(x, 6, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg09 */
+#define T_HS_EXIT_CNT_MASK			GENMASK(4, 0)
+#define T_HS_EXIT_CNT(x)			UPDATE(x, 4, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0a */
+#define T_CLK_POST_CNT_MASK			GENMASK(3, 0)
+#define T_CLK_POST_CNT(x)			UPDATE(x, 3, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0c */
+#define LPDT_TX_PPI_SYNC_MASK			BIT(2)
+#define LPDT_TX_PPI_SYNC_ENABLE			BIT(2)
+#define LPDT_TX_PPI_SYNC_DISABLE		0
+#define T_WAKEUP_CNT_HI_MASK			GENMASK(1, 0)
+#define T_WAKEUP_CNT_HI(x)			UPDATE(x, 1, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0d */
+#define T_WAKEUP_CNT_LO_MASK			GENMASK(7, 0)
+#define T_WAKEUP_CNT_LO(x)			UPDATE(x, 7, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg0e */
+#define T_CLK_PRE_CNT_MASK			GENMASK(3, 0)
+#define T_CLK_PRE_CNT(x)			UPDATE(x, 3, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg10 */
+#define T_TA_GO_CNT_MASK			GENMASK(5, 0)
+#define T_TA_GO_CNT(x)				UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg11 */
+#define T_TA_SURE_CNT_MASK			GENMASK(5, 0)
+#define T_TA_SURE_CNT(x)			UPDATE(x, 5, 0)
+/* Clock/Data0/Data1/Data2/Data3 Lane Register Part: reg12 */
+#define T_TA_WAIT_CNT_MASK			GENMASK(5, 0)
+#define T_TA_WAIT_CNT(x)			UPDATE(x, 5, 0)
+/* LVDS Register Part: reg00 */
+#define LVDS_DIGITAL_INTERNAL_RESET_MASK	BIT(2)
+#define LVDS_DIGITAL_INTERNAL_RESET_DISABLE	BIT(2)
+#define LVDS_DIGITAL_INTERNAL_RESET_ENABLE	0
+/* LVDS Register Part: reg01 */
+#define LVDS_DIGITAL_INTERNAL_ENABLE_MASK	BIT(7)
+#define LVDS_DIGITAL_INTERNAL_ENABLE		BIT(7)
+#define LVDS_DIGITAL_INTERNAL_DISABLE		0
+/* LVDS Register Part: reg03 */
+#define MODE_ENABLE_MASK			GENMASK(2, 0)
+#define TTL_MODE_ENABLE				BIT(2)
+#define LVDS_MODE_ENABLE			BIT(1)
+#define MIPI_MODE_ENABLE			BIT(0)
+/* LVDS Register Part: reg0b */
+#define LVDS_LANE_EN_MASK			GENMASK(7, 3)
+#define LVDS_DATA_LANE0_EN			BIT(7)
+#define LVDS_DATA_LANE1_EN			BIT(6)
+#define LVDS_DATA_LANE2_EN			BIT(5)
+#define LVDS_DATA_LANE3_EN			BIT(4)
+#define LVDS_CLK_LANE_EN			BIT(3)
+#define LVDS_PLL_POWER_MASK			BIT(2)
+#define LVDS_PLL_POWER_OFF			BIT(2)
+#define LVDS_PLL_POWER_ON			0
+#define LVDS_BANDGAP_POWER_MASK			BIT(0)
+#define LVDS_BANDGAP_POWER_DOWN			BIT(0)
+#define LVDS_BANDGAP_POWER_ON			0
+
+#define DSI_PHY_RSTZ			0xa0
+#define PHY_ENABLECLK			BIT(2)
+#define DSI_PHY_STATUS			0xb0
+#define PHY_LOCK			BIT(0)
+
+struct mipi_dphy_timing {
+	unsigned int clkmiss;
+	unsigned int clkpost;
+	unsigned int clkpre;
+	unsigned int clkprepare;
+	unsigned int clksettle;
+	unsigned int clktermen;
+	unsigned int clktrail;
+	unsigned int clkzero;
+	unsigned int dtermen;
+	unsigned int eot;
+	unsigned int hsexit;
+	unsigned int hsprepare;
+	unsigned int hszero;
+	unsigned int hssettle;
+	unsigned int hsskip;
+	unsigned int hstrail;
+	unsigned int init;
+	unsigned int lpx;
+	unsigned int taget;
+	unsigned int tago;
+	unsigned int tasure;
+	unsigned int wakeup;
+};
+
+struct inno_video_phy {
+	enum phy_mode mode;
+	struct resource phy;
+	struct resource host;
+	struct {
+		u8 prediv;
+		u16 fbdiv;
+		unsigned long rate;
+	} pll;
+};
+
+enum {
+	REGISTER_PART_ANALOG,
+	REGISTER_PART_DIGITAL,
+	REGISTER_PART_CLOCK_LANE,
+	REGISTER_PART_DATA0_LANE,
+	REGISTER_PART_DATA1_LANE,
+	REGISTER_PART_DATA2_LANE,
+	REGISTER_PART_DATA3_LANE,
+	REGISTER_PART_LVDS,
+};
+
+static inline void phy_update_bits(struct inno_video_phy *inno,
+				   u8 first, u8 second, u8 mask, u8 val)
+{
+	u32 reg = PHY_REG(first, second) << 2;
+	u32 tmp, orig;
+
+	orig = readl(inno->phy.start + reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	writel(tmp, inno->phy.start + reg);
+}
+
+static inline void host_update_bits(struct inno_video_phy *inno,
+				    u32 reg, u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = readl(inno->host.start + reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	writel(tmp, inno->host.start + reg);
+}
+
+static void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+					 unsigned long period)
+{
+	/* Global Operation Timing Parameters */
+	timing->clkmiss = 0;
+	timing->clkpost = 70000 + 52 * period;
+	timing->clkpre = 8 * period;
+	timing->clkprepare = 65000;
+	timing->clksettle = 95000;
+	timing->clktermen = 0;
+	timing->clktrail = 80000;
+	timing->clkzero = 260000;
+	timing->dtermen = 0;
+	timing->eot = 0;
+	timing->hsexit = 120000;
+	timing->hsprepare = 65000 + 4 * period;
+	timing->hszero = 145000 + 6 * period;
+	timing->hssettle = 85000 + 6 * period;
+	timing->hsskip = 40000;
+	timing->hstrail = max(8 * period, 60000 + 4 * period);
+	timing->init = 100000000;
+	timing->lpx = 60000;
+	timing->taget = 5 * timing->lpx;
+	timing->tago = 4 * timing->lpx;
+	timing->tasure = 2 * timing->lpx;
+	timing->wakeup = 1000000000;
+}
+
+static void inno_video_phy_mipi_mode_enable(struct inno_video_phy *inno)
+{
+	struct mipi_dphy_timing gotp;
+	const struct {
+		unsigned long rate;
+		u8 hs_prepare;
+		u8 clk_lane_hs_zero;
+		u8 data_lane_hs_zero;
+		u8 hs_trail;
+	} timings[] = {
+		{ 110000000, 0x20, 0x16, 0x02, 0x22},
+		{ 150000000, 0x06, 0x16, 0x03, 0x45},
+		{ 200000000, 0x18, 0x17, 0x04, 0x0b},
+		{ 250000000, 0x05, 0x17, 0x05, 0x16},
+		{ 300000000, 0x51, 0x18, 0x06, 0x2c},
+		{ 400000000, 0x64, 0x19, 0x07, 0x33},
+		{ 500000000, 0x20, 0x1b, 0x07, 0x4e},
+		{ 600000000, 0x6a, 0x1d, 0x08, 0x3a},
+		{ 700000000, 0x3e, 0x1e, 0x08, 0x6a},
+		{ 800000000, 0x21, 0x1f, 0x09, 0x29},
+		{1000000000, 0x09, 0x20, 0x09, 0x27},
+	};
+	u32 t_txbyteclkhs, t_txclkesc, ui;
+	u32 txbyteclkhs, txclkesc, esc_clk_div;
+	u32 hs_exit, clk_post, clk_pre, wakeup, lpx, ta_go, ta_sure, ta_wait;
+	u32 hs_prepare, hs_trail, hs_zero, clk_lane_hs_zero, data_lane_hs_zero;
+	unsigned int i;
+
+	/* Select MIPI mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, MIPI_MODE_ENABLE);
+	/* Configure PLL */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_PREDIV_MASK, REG_PREDIV(inno->pll.prediv));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_FBDIV_HI_MASK, REG_FBDIV_HI(inno->pll.fbdiv >> 8));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,
+			REG_FBDIV_LO_MASK, REG_FBDIV_LO(inno->pll.fbdiv));
+	/* Enable PLL and LDO */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_LDOPD_MASK | REG_PLLPD_MASK,
+			REG_LDOPD_POWER_ON | REG_PLLPD_POWER_ON);
+	/* Reset analog */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_SYNCRST_MASK, REG_SYNCRST_RESET);
+	udelay(1);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_SYNCRST_MASK, REG_SYNCRST_NORMAL);
+	/* Reset digital */
+	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
+			REG_DIG_RSTN_MASK, REG_DIG_RSTN_RESET);
+	udelay(1);
+	phy_update_bits(inno, REGISTER_PART_DIGITAL, 0x00,
+			REG_DIG_RSTN_MASK, REG_DIG_RSTN_NORMAL);
+
+	txbyteclkhs = inno->pll.rate / 8;
+	t_txbyteclkhs = div_u64(PSEC_PER_SEC, txbyteclkhs);
+
+	esc_clk_div = DIV_ROUND_UP(txbyteclkhs, 20000000);
+	txclkesc = txbyteclkhs / esc_clk_div;
+	t_txclkesc = div_u64(PSEC_PER_SEC, txclkesc);
+
+	ui = div_u64(PSEC_PER_SEC, inno->pll.rate);
+
+	memset(&gotp, 0, sizeof(gotp));
+	mipi_dphy_timing_get_default(&gotp, ui);
+
+	/*
+	 * The value of counter for HS Ths-exit
+	 * Ths-exit = Tpin_txbyteclkhs * value
+	 */
+	hs_exit = DIV_ROUND_UP(gotp.hsexit, t_txbyteclkhs);
+	/*
+	 * The value of counter for HS Tclk-post
+	 * Tclk-post = Tpin_txbyteclkhs * value
+	 */
+	clk_post = DIV_ROUND_UP(gotp.clkpost, t_txbyteclkhs);
+	/*
+	 * The value of counter for HS Tclk-pre
+	 * Tclk-pre = Tpin_txbyteclkhs * value
+	 */
+	clk_pre = DIV_ROUND_UP(gotp.clkpre, t_txbyteclkhs);
+
+	/*
+	 * The value of counter for HS Tlpx Time
+	 * Tlpx = Tpin_txbyteclkhs * (2 + value)
+	 */
+	lpx = DIV_ROUND_UP(gotp.lpx, t_txbyteclkhs);
+	if (lpx >= 2)
+		lpx -= 2;
+
+	/*
+	 * The value of counter for HS Tta-go
+	 * Tta-go for turnaround
+	 * Tta-go = Ttxclkesc * value
+	 */
+	ta_go = DIV_ROUND_UP(gotp.tago, t_txclkesc);
+	/*
+	 * The value of counter for HS Tta-sure
+	 * Tta-sure for turnaround
+	 * Tta-sure = Ttxclkesc * value
+	 */
+	ta_sure = DIV_ROUND_UP(gotp.tasure, t_txclkesc);
+	/*
+	 * The value of counter for HS Tta-wait
+	 * Tta-wait for turnaround
+	 * Tta-wait = Ttxclkesc * value
+	 */
+	ta_wait = DIV_ROUND_UP(gotp.taget, t_txclkesc);
+
+	for (i = 0; i < ARRAY_SIZE(timings); i++)
+		if (inno->pll.rate <= timings[i].rate)
+			break;
+
+	if (i == ARRAY_SIZE(timings))
+		--i;
+
+	hs_prepare = timings[i].hs_prepare;
+	hs_trail = timings[i].hs_trail;
+	clk_lane_hs_zero = timings[i].clk_lane_hs_zero;
+	data_lane_hs_zero = timings[i].data_lane_hs_zero;
+	wakeup = 0x3ff;
+
+	for (i = REGISTER_PART_CLOCK_LANE; i <= REGISTER_PART_DATA3_LANE; i++) {
+		if (i == REGISTER_PART_CLOCK_LANE)
+			hs_zero = clk_lane_hs_zero;
+		else
+			hs_zero = data_lane_hs_zero;
+
+		phy_update_bits(inno, i, 0x05, T_LPX_CNT_MASK,
+				T_LPX_CNT(lpx));
+		phy_update_bits(inno, i, 0x06, T_HS_PREPARE_CNT_MASK,
+				T_HS_PREPARE_CNT(hs_prepare));
+		phy_update_bits(inno, i, 0x07, T_HS_ZERO_CNT_MASK,
+				T_HS_ZERO_CNT(hs_zero));
+		phy_update_bits(inno, i, 0x08, T_HS_TRAIL_CNT_MASK,
+				T_HS_TRAIL_CNT(hs_trail));
+		phy_update_bits(inno, i, 0x09, T_HS_EXIT_CNT_MASK,
+				T_HS_EXIT_CNT(hs_exit));
+		phy_update_bits(inno, i, 0x0a, T_CLK_POST_CNT_MASK,
+				T_CLK_POST_CNT(clk_post));
+		phy_update_bits(inno, i, 0x0e, T_CLK_PRE_CNT_MASK,
+				T_CLK_PRE_CNT(clk_pre));
+		phy_update_bits(inno, i, 0x0c, T_WAKEUP_CNT_HI_MASK,
+				T_WAKEUP_CNT_HI(wakeup >> 8));
+		phy_update_bits(inno, i, 0x0d, T_WAKEUP_CNT_LO_MASK,
+				T_WAKEUP_CNT_LO(wakeup));
+		phy_update_bits(inno, i, 0x10, T_TA_GO_CNT_MASK,
+				T_TA_GO_CNT(ta_go));
+		phy_update_bits(inno, i, 0x11, T_TA_SURE_CNT_MASK,
+				T_TA_SURE_CNT(ta_sure));
+		phy_update_bits(inno, i, 0x12, T_TA_WAIT_CNT_MASK,
+				T_TA_WAIT_CNT(ta_wait));
+	}
+
+	/* Enable all lanes on analog part */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			LANE_EN_MASK, LANE_EN_CK | LANE_EN_3 | LANE_EN_2 |
+			LANE_EN_1 | LANE_EN_0);
+}
+
+static void inno_video_phy_lvds_mode_enable(struct inno_video_phy *inno)
+{
+	u8 prediv = 2;
+	u16 fbdiv = 28;
+	u32 val;
+	int ret;
+
+	/* Sample clock reverse direction */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x08,
+			SAMPLE_CLOCK_DIRECTION_MASK,
+			SAMPLE_CLOCK_DIRECTION_REVERSE);
+	/* Select LVDS mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, LVDS_MODE_ENABLE);
+	/* Configure PLL */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_PREDIV_MASK, REG_PREDIV(prediv));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x03,
+			REG_FBDIV_HI_MASK, REG_FBDIV_HI(fbdiv >> 8));
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x04,
+			REG_FBDIV_LO_MASK, REG_FBDIV_LO(fbdiv));
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x08, 0xff, 0xfc);
+	/* Enable PLL and Bandgap */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_PLL_POWER_MASK | LVDS_BANDGAP_POWER_MASK,
+			LVDS_PLL_POWER_ON | LVDS_BANDGAP_POWER_ON);
+
+	ret = readl_poll_timeout(inno->host.start + DSI_PHY_STATUS,
+				 val, val & PHY_LOCK, 10000);
+	if (ret)
+		dev_err(phy->dev, "PLL is not lock\n");
+
+	/* Reset LVDS digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_ENABLE);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_DISABLE);
+	/* Enable LVDS digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
+			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
+			LVDS_DIGITAL_INTERNAL_ENABLE);
+	/* Enable LVDS analog driver */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_LANE_EN_MASK, LVDS_CLK_LANE_EN |
+			LVDS_DATA_LANE0_EN | LVDS_DATA_LANE1_EN |
+			LVDS_DATA_LANE2_EN | LVDS_DATA_LANE3_EN);
+}
+
+static void inno_video_phy_ttl_mode_enable(struct inno_video_phy *inno)
+{
+	/* Select TTL mode */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x03,
+			MODE_ENABLE_MASK, TTL_MODE_ENABLE);
+	/* Reset digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_ENABLE);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x00,
+			LVDS_DIGITAL_INTERNAL_RESET_MASK,
+			LVDS_DIGITAL_INTERNAL_RESET_DISABLE);
+	/* Enable digital logic */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
+			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
+			LVDS_DIGITAL_INTERNAL_ENABLE);
+	/* Enable analog driver */
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_LANE_EN_MASK, LVDS_CLK_LANE_EN |
+			LVDS_DATA_LANE0_EN | LVDS_DATA_LANE1_EN |
+			LVDS_DATA_LANE2_EN | LVDS_DATA_LANE3_EN);
+	/* Enable for clk lane in TTL mode */
+	host_update_bits(inno, DSI_PHY_RSTZ, PHY_ENABLECLK, PHY_ENABLECLK);
+}
+
+static int inno_video_phy_power_on(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	/* Bandgap power on */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			BANDGAP_POWER_MASK, BANDGAP_POWER_ON);
+	/* Enable power work */
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			POWER_WORK_MASK, POWER_WORK_ENABLE);
+
+	switch (inno->mode) {
+	case PHY_MODE_VIDEO_MIPI:
+		inno_video_phy_mipi_mode_enable(inno);
+		break;
+	case PHY_MODE_VIDEO_LVDS:
+		inno_video_phy_lvds_mode_enable(inno);
+		break;
+	case PHY_MODE_VIDEO_TTL:
+		inno_video_phy_ttl_mode_enable(inno);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int inno_video_phy_power_off(struct rockchip_phy *phy)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00, LANE_EN_MASK, 0);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
+			REG_LDOPD_MASK | REG_PLLPD_MASK,
+			REG_LDOPD_POWER_DOWN | REG_PLLPD_POWER_DOWN);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			POWER_WORK_MASK, POWER_WORK_DISABLE);
+	phy_update_bits(inno, REGISTER_PART_ANALOG, 0x00,
+			BANDGAP_POWER_MASK, BANDGAP_POWER_DOWN);
+
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b, LVDS_LANE_EN_MASK, 0);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x01,
+			LVDS_DIGITAL_INTERNAL_ENABLE_MASK,
+			LVDS_DIGITAL_INTERNAL_DISABLE);
+	phy_update_bits(inno, REGISTER_PART_LVDS, 0x0b,
+			LVDS_PLL_POWER_MASK | LVDS_BANDGAP_POWER_MASK,
+			LVDS_PLL_POWER_OFF | LVDS_BANDGAP_POWER_DOWN);
+
+	return 0;
+}
+
+static unsigned long inno_video_phy_pll_round_rate(unsigned long prate,
+						   unsigned long rate,
+						   u8 *prediv, u16 *fbdiv)
+{
+	unsigned long best_freq = 0;
+	unsigned long fref, fout;
+	u8 min_prediv, max_prediv;
+	u8 _prediv, best_prediv = 1;
+	u16 _fbdiv, best_fbdiv = 1;
+	u32 min_delta = 0xffffffff;
+
+	/*
+	 * The PLL output frequency can be calculated using a simple formula:
+	 * PLL_Output_Frequency = (FREF / PREDIV * FBDIV) / 2
+	 * PLL_Output_Frequency: it is equal to DDR-Clock-Frequency * 2
+	 */
+	fref = prate / 2;
+	if (rate > 1000000000UL)
+		fout = 1000000000UL;
+	else
+		fout = rate;
+
+	/* 5Mhz < Fref / prediv < 40MHz */
+	min_prediv = DIV_ROUND_UP(fref, 40000000);
+	max_prediv = fref / 5000000;
+
+	for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
+		u64 tmp;
+		u32 delta;
+
+		tmp = (u64)fout * _prediv;
+		do_div(tmp, fref);
+		_fbdiv = tmp;
+
+		/*
+		 * The all possible settings of feedback divider are
+		 * 12, 13, 14, 16, ~ 511
+		 */
+		if (_fbdiv == 15)
+			continue;
+
+		if (_fbdiv < 12 || _fbdiv > 511)
+			continue;
+
+		tmp = (u64)_fbdiv * fref;
+		do_div(tmp, _prediv);
+
+		delta = abs(fout - tmp);
+		if (!delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = tmp;
+			break;
+		} else if (delta < min_delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			best_freq = tmp;
+			min_delta = delta;
+		}
+	}
+
+	if (best_freq) {
+		*prediv = best_prediv;
+		*fbdiv = best_fbdiv;
+	}
+
+	return best_freq;
+}
+
+static unsigned long inno_video_phy_set_pll(struct rockchip_phy *phy,
+					    unsigned long rate)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+	unsigned long fin, fout;
+	u16 fbdiv = 1;
+	u8 prediv = 1;
+
+	fin = 24000000;
+	fout = inno_video_phy_pll_round_rate(fin, rate, &prediv, &fbdiv);
+
+	dev_dbg(phy->dev, "fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
+		fin, fout, prediv, fbdiv);
+
+	inno->pll.prediv = prediv;
+	inno->pll.fbdiv = fbdiv;
+	inno->pll.rate = fout;
+
+	return fout;
+}
+
+static int inno_video_phy_set_mode(struct rockchip_phy *phy,
+				   enum phy_mode mode)
+{
+	struct inno_video_phy *inno = dev_get_priv(phy->dev);
+
+	switch (mode) {
+	case PHY_MODE_VIDEO_MIPI:
+	case PHY_MODE_VIDEO_LVDS:
+	case PHY_MODE_VIDEO_TTL:
+		inno->mode = mode;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static const struct rockchip_phy_funcs inno_video_phy_funcs = {
+	.power_on = inno_video_phy_power_on,
+	.power_off = inno_video_phy_power_off,
+	.set_pll = inno_video_phy_set_pll,
+	.set_mode = inno_video_phy_set_mode,
+};
+
+static int inno_video_phy_probe(struct udevice *dev)
+{
+	struct inno_video_phy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+	int ret;
+
+	ret = dev_read_resource(dev, 0, &inno->phy);
+	if (ret < 0) {
+		dev_err(dev, "resource \"phy\" not found\n");
+		return ret;
+	}
+
+	ret = dev_read_resource(dev, 1, &inno->host);
+	if (ret < 0) {
+		dev_err(dev, "resource \"host\" not found\n");
+		return ret;
+	}
+
+	phy->dev = dev;
+
+	return 0;
+}
+
+static struct rockchip_phy inno_video_phy_driver_data = {
+	 .funcs = &inno_video_phy_funcs,
+};
+
+static const struct udevice_id inno_video_phy_ids[] = {
+	{
+		.compatible = "rockchip,px30-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3128-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-video-phy",
+		.data = (ulong)&inno_video_phy_driver_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(inno_video_combo_phy) = {
+	.name = "inno_video_combo_phy",
+	.id = UCLASS_PHY,
+	.of_match = inno_video_phy_ids,
+	.probe = inno_video_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_video_phy),
+};

commit 396701fd2f56ca898b263ef428ef8a639992b96b
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Sat Dec 8 11:51:35 2018 +0800

    video/drm: rockchip_phy: support set_mode callback
    
    This patch adds generic PHY modes to the phy_mode enum, to
    allow configuring generic PHYs to the MIPI/LVDS/TTL mode by
    using the set_mode callback.
    
    Change-Id: I28c5cdf905026b246f928eb8f75a212408df281b
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index b92511e8db..2f5d275d96 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -73,3 +73,14 @@ long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate)
 
 	return 0;
 }
+
+int rockchip_phy_set_mode(struct rockchip_phy *phy, enum phy_mode mode)
+{
+	if (!phy)
+		return -ENODEV;
+
+	if (phy->funcs && phy->funcs->set_mode)
+		return phy->funcs->set_mode(phy, mode);
+
+	return 0;
+}
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index ae0f9d49f4..479dbb059c 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -7,6 +7,13 @@
 #ifndef _ROCKCHIP_PHY_H_
 #define _ROCKCHIP_PHY_H_
 
+enum phy_mode {
+	PHY_MODE_INVALID,
+	PHY_MODE_VIDEO_MIPI,
+	PHY_MODE_VIDEO_LVDS,
+	PHY_MODE_VIDEO_TTL,
+};
+
 struct rockchip_phy;
 
 struct rockchip_phy_funcs {
@@ -16,6 +23,7 @@ struct rockchip_phy_funcs {
 	unsigned long (*set_pll)(struct rockchip_phy *phy, unsigned long rate);
 	int (*set_bus_width)(struct rockchip_phy *phy, u32 bus_width);
 	long (*round_rate)(struct rockchip_phy *phy, unsigned long rate);
+	int (*set_mode)(struct rockchip_phy *phy, enum phy_mode mode);
 };
 
 struct rockchip_phy {
@@ -31,5 +39,6 @@ unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy,
 				   unsigned long rate);
 int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width);
 long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate);
+int rockchip_phy_set_mode(struct rockchip_phy *phy, enum phy_mode mode);
 
 #endif

commit 340f659492382a50f5c432709cd169ac48afffd9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jan 8 15:56:45 2019 +0800

    gpt: open repair gpt depend on CONFIG_RKIMG_BOOTLOADER
    
    Change-Id: I80323655e5bd7dc37af7df0693cb0611d7c8402a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index f65fceb0c6..4033b3e802 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -339,7 +339,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	return 0;
 }
 
-#ifdef RKIMG_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 static void gpt_entry_modify(struct blk_desc *dev_desc,
 			     gpt_entry *gpt_pte,
 			     gpt_header *gpt_head)
@@ -379,7 +379,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 		gpt_head->my_lba = dev_desc->lba - 1;
 		gpt_head->alternate_lba = 1;
 		gpt_head->partition_entry_lba = dev_desc->lba - 0x21;
-		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		gpt_entry_modify(dev_desc, gpt_pte, gpt_head);
 		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
 				       le32_to_cpu(gpt_head->header_size));
 		gpt_head->header_crc32 = calc_crc32;
@@ -402,7 +402,7 @@ static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
 		gpt_head->my_lba = 1;
 		gpt_head->alternate_lba = dev_desc->lba - 1;
 		gpt_head->partition_entry_lba = 0x22;
-		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		gpt_entry_modify(dev_desc, gpt_pte, gpt_head);
 		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
 				       le32_to_cpu(gpt_head->header_size));
 		gpt_head->header_crc32 = calc_crc32;
@@ -435,7 +435,7 @@ static int part_test_efi(struct blk_desc *dev_desc)
 		|| (is_pmbr_valid(legacymbr) != 1)) {
 		return -1;
 	}
-#ifdef RKIMG_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	gpt_entry *h_gpt_pte = NULL;
 	gpt_header *h_gpt_head = NULL;
 	gpt_entry *b_gpt_pte = NULL;

commit 54720da095cd8dafb3ef4144b80c3f20e82a742e
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Dec 10 10:51:09 2018 +0800

    configs: rk322x_defconfig: enable AVB2.0
    
    Change-Id: I713c6beca3637a8d233b816bd40a914c369b77eb
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 343ca6edb0..2a5d1eaa6b 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=0
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -110,6 +111,11 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 0d734c9dd3519590f1b53472280b5ff323f09f5e
Author: Guochun Huang <hero.huang@rock-chips.com>
Date:   Tue Dec 18 14:03:57 2018 +0800

    configs: rk3399: enable avb for Android P
    
    Change-Id: Ib2fadd3de0767d15a5b127e762ab992636ccc421
    Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index df2cbecf04..df0230e71f 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -130,3 +130,13 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_CMD_MMC=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 3b8adb41fa..82ac90e8c5 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SPL_FRAMEWORK
@@ -26,6 +26,7 @@
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #define GICD_BASE			0xFEE00000
 #define GICR_BASE			0xFEF00000

commit 424bfdcf40be8bdbde8daf505ba9275b23c80060
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 7 16:15:23 2019 +0800

    android: enable secure boot by vboot_flag
    
    We read the vboot_flag which is the flag of secure boot to enable
    verified boot in uboot.
    
    Change-Id: I592473ad14f9e19c6529602d029b7ec2fb335da8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 919b2fcbf5..416b63c712 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -819,6 +819,36 @@ out:
 }
 #endif
 
+static int load_android_image(struct blk_desc *dev_desc,
+			      char *boot_partname,
+			      char *slot_suffix,
+			      unsigned long *load_address)
+{
+	disk_partition_t boot_part;
+	int ret, part_num;
+
+	part_num = android_part_get_info_by_name_suffix(dev_desc,
+							boot_partname,
+							slot_suffix,
+							&boot_part);
+	if (part_num < 0) {
+		printf("%s: Can't find part: %s\n", __func__, boot_partname);
+		return -1;
+	}
+	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
+	      boot_part.name, part_num);
+
+	ret = android_image_load(dev_desc, &boot_part, *load_address, -1UL);
+	if (ret < 0) {
+		printf("%s: %s part load fail, ret=%d\n",
+		       __func__, boot_part.name, ret);
+		return ret;
+	}
+	*load_address = ret;
+
+	return 0;
+}
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -905,33 +935,28 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 #ifdef CONFIG_ANDROID_AVB
-	if (android_slot_verify(boot_partname, &load_address, slot_suffix))
+	uint8_t vboot_flag = 0;
+
+	if (trusty_read_vbootkey_enable_flag(&vboot_flag))
 		return -1;
+
+	if (vboot_flag) {
+		if (android_slot_verify(boot_partname, &load_address,
+					slot_suffix))
+			return -1;
+	} else {
+		if (load_android_image(dev_desc, boot_partname,
+				       slot_suffix, &load_address))
+			return -1;
+	}
 #else
 	/*
 	 * 2. Load the boot/recovery from the desired "boot" partition.
 	 * Determine if this is an AOSP image.
 	 */
-	disk_partition_t boot_part_info;
-	part_num =
-	    android_part_get_info_by_name_suffix(dev_desc,
-						 boot_partname,
-						 slot_suffix, &boot_part_info);
-	if (part_num < 0) {
-		printf("%s Could not found bootable partition %s\n", __func__,
-		       boot_partname);
+	if (load_android_image(dev_desc, boot_partname,
+			       slot_suffix, &load_address))
 		return -1;
-	}
-	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
-	      boot_part_info.name, part_num);
-
-	ret = android_image_load(dev_desc, &boot_part_info, load_address,
-				 -1UL);
-	if (ret < 0) {
-		printf("%s %s part load fail\n", __func__, boot_part_info.name);
-		return ret;
-	}
-	load_address = ret;
 #endif
 
 	/* Set Android root variables. */

commit 22f2eaa842ce4767e480a1a10cbb4cad9dea4707
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 14:55:51 2019 +0800

    dvfs: Kconfig: wtemp dvfs driver depends on CONFIG_USING_KERNEL_DTB
    
    Because wtemp dvfs driver reads all cpu/dmc info from kernel dtb.
    
    Change-Id: Ifd85ed976bd880cf710c58e07351ef038f3a125c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/dvfs/Kconfig b/drivers/power/dvfs/Kconfig
index 0a3580e0b5..eddd862d69 100644
--- a/drivers/power/dvfs/Kconfig
+++ b/drivers/power/dvfs/Kconfig
@@ -6,6 +6,6 @@ config DM_DVFS
 
 config ROCKCHIP_WTEMP_DVFS
 	bool "Enable rockchip wide temperature dvfs policy"
-	depends on DM_DVFS && ROCKCHIP_THERMAL
+	depends on DM_DVFS && ROCKCHIP_THERMAL && USING_KERNEL_DTB
 	help
 	  This enable support wide temperature dvfs for rockchip platforms.

commit ee4798e5b57d8d810916ee443ac53e079bc5455d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 14:57:20 2019 +0800

    common: bootrkp: add fdt load address and size information
    
    Change-Id: If2220c5163ad8159ecfd4a2499b465e238371bc3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d3fb0aae7a..923e77a021 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -454,6 +454,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		}
 	}
 
+	printf("fdt	 @ 0x%08lx (0x%08x)\n", fdt_addr_r, fdt_totalsize(fdt_addr_r));
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 #if defined(CONFIG_ARM64)

commit eaec55340ed4784336ef3f2c3309147b0f6084fa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 8 14:55:02 2019 +0800

    common: android: add more clear description for getting fdt
    
    Change-Id: I66865eaed98d08d37047cda50d262d637c8865f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 3405fc7578..60e57da1c3 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -209,22 +209,28 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 /*
- * If kernel dtb is enabled, we have read kernel dtb in
- * init_kernel_dtb() -> rockchip_read_dtb_file() and may have been
- * done(optional) selection:
+ * If kernel dtb is enabled, it means we have read kernel dtb before do_bootm(),
+ * that's: init_kernel_dtb() -> rockchip_read_dtb_file().
+ * And maybe some operations(optional) are done:
  *
  * 1. apply fdt overlay;
  * 2. select fdt by adc or gpio;
  *
  * After that, we didn't update dtb at all untill run here, it's fine to
  * pass current fdt to kernel.
+ *
+ * This case has higher priority then the others(#elif, #else...).
  */
 #if defined(CONFIG_USING_KERNEL_DTB)
 	*rd_data = (ulong)gd->fdt_blob;
 
 /*
- * If kernel dtb is disabled and support rockchip image, we need to call
- * rockchip_read_dtb_file() to get dtb with some optional selection.
+ * If kernel dtb is disabled, it means kernel dtb is not read before do_bootm(),
+ * we need to read it from boot.img/recovery.img now.
+ *
+ * For rockchip AOSP firmware(CONFIG_RKIMG_BOOTLOADER), we pack resource.img in
+ * second position. we need read kernel dtb by rockchip_read_dtb_file() which
+ * can do the above "some operations(optional)".
  */
 #elif defined(CONFIG_RKIMG_BOOTLOADER)
 	ulong fdt_addr = 0;
@@ -246,8 +252,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data = fdt_addr;
 
 /*
- * If kernel dtb is disabled and not support rockchip image,
- * get dtb from second position.
+ * If kernel dtb is disabled and it's not rockchip AOSP firmware, kernel dtb is
+ * in second position, let't read it directly.
  */
 #else
 	*rd_data = (unsigned long)hdr;

commit 5716d3430d418191cbe51ba0f2336694684ba20d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 2 14:16:34 2019 +0800

    rockchip: smccc: sync sip id definition from kernel
    
    Change-Id: Iefc9baab29abe8ba23ad58e74a24b4b6d9bb85d1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 6d389580d6..2b88a86934 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -22,7 +22,9 @@
 #define SIP_SHARE_MEM			0x82000009
 #define SIP_SIP_VERSION			0x8200000a
 #define SIP_REMOTECTL_CFG		0x8200000b
-#define PSCI_SIP_VPU_RESET		0x8200000c
+#define SIP_VPU_RESET			0x8200000c
+#define SIP_SOC_BUS_DIV			0x8200000d
+#define SIP_LAST_LOG			0x8200000e
 
 #define ROCKCHIP_SIP_CONFIG_DRAM_INIT		0x00
 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE	0x01

commit ab6f0fad651d363734085d6c01593dd662bd9d3e
Author: William Wu <william.wu@rock-chips.com>
Date:   Fri Jan 4 18:17:13 2019 +0800

    rockchip: rk3399: set qos priority for perilp_nsp
    
    This patch increase the qos priority of perilp_nsp from
    2 to 3 for USB 3.0 controllers.
    
    Change-Id: I813f9190cc894ac15452686aa68d187200be3888
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index ca154f745b..ba5f7319c7 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -73,6 +73,8 @@ void rockchip_stimer_init(void)
 #define PMUGRF_BASE	0xff320000
 #define PMUSGRF_BASE	0xff330000
 #define PMUCRU_BASE	0xff750000
+#define NIU_PERILP_NSP_ADDR	0xffad8188
+#define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
 int arch_cpu_init(void)
 {
@@ -111,6 +113,9 @@ int arch_cpu_init(void)
 	writel(0x01000100, &pmucru->pmucru_clkgate_con[0]);
 #endif
 
+	/* Set perilp_nsp QOS priority to 3 for USB 3.0 */
+	writel(QOS_PRIORITY_LEVEL(3, 3), NIU_PERILP_NSP_ADDR);
+
 	return 0;
 }
 

commit 6392c7ee70e2310fc7689fcf239c01061236665a
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Dec 10 10:45:50 2018 +0800

    configs: rk322x_defconfig: enable CONFIG_OPTEE_(CLIENT|V1)
    
    Change-Id: I94bd144e45a1b8d30e70a72bd5e32ecac81b2668
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index b44ab11b6e..343ca6edb0 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -110,4 +110,6 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit cf513fc425e7a1ee9ee9c905494dc8e84022fb46
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 15:50:53 2019 +0800

    configs: evb-rk3126: enable console info quiet
    
    Change-Id: Ic10b133bd08a1c3632acaa76a6b98414f285154b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index d574adcc43..239559a627 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y

commit 138accc0fed36635f9d89544b791feb335d250c6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 15:50:09 2019 +0800

    configs: rk3126: update with make savedefconfig
    
    Change-Id: I552fa41748e30b3049bb5cff7c9816f32e469d8e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index ea939356ef..d574adcc43 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -1,13 +1,4 @@
 CONFIG_ARM=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_ANDROID_AVB=y
-CONFIG_AVB_LIBAVB=y
-CONFIG_AVB_LIBAVB_AB=y
-CONFIG_AVB_LIBAVB_ATX=y
-CONFIG_AVB_LIBAVB_USER=y
-CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x38000
 CONFIG_ROCKCHIP_RK3128=y
@@ -20,6 +11,7 @@ CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -93,4 +85,12 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit a52765767d50c3cabc009b57bc0ba7e81a5a77cc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:52:02 2019 +0800

    configs: evb-rk3326: enable console info quiet
    
    Change-Id: Ic1e00885e408bad6f10d96db21f915aa99f32b9e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index e6e407fccf..fd02d9f38c 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -19,6 +19,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 50f3c698613c982a8f0853438993ad8aaba06f9d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:50:30 2019 +0800

    configs: evb-px30: enable console info quiet
    
    Change-Id: I5952f1d2cef6fa9dd58bad36c51e578bf605737f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index b4474e6c40..a79d51a78a 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -18,6 +18,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit dd1105ebc7bc06c087efca564059ad38eff2bc69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:49:18 2019 +0800

    configs: rk3399pro: enable console info quiet
    
    Change-Id: I4d09d2b41a26018b854ce61f4cef0ed3125c153a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index e40c358946..4b6584a620 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 3eb0877cf37ef558e036b3b9dbe2552638bcaeaa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:47:28 2019 +0800

    configs: rk3328: enable console info quiet
    
    Change-Id: I0012247363f648d193c8b0c04cb531cf3a71e041
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index b80af6d33a..4582bc2272 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
@@ -17,8 +18,8 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y

commit 0f883fa147dcdf9c9f6fc49f856a9bb1d71d0498
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:46:37 2019 +0800

    configs: rk3326: enable console info quiet
    
    Change-Id: Ibaa941ad24b156e695b814fd23c5c53f9be977c4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 8e42cf208c..07e980c888 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -19,6 +19,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y

commit 90861f5f07310f8e40fb492d0a1bc06edec39de1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:45:01 2019 +0800

    configs: rk3288: enable console info quiet
    
    Change-Id: I631d7a2b6bcf2ea74d024358e25780c993f607cd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index c0e6284571..6d45fb2e1d 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 65865b62fd9ffe16f032c1cc346b92c995eb056b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:44:07 2019 +0800

    configs: rk322x: enable console info quiet
    
    Change-Id: Iff5e7107f5fb49f06a0bccf916fcbf3ec492b619
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 4da83f994e..b44ab11b6e 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -20,6 +20,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set

commit 8782df0ad051f470c95c09a3ee1ccc5adff30e31
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:43:10 2019 +0800

    configs: rk3128x: enable console info quiet
    
    Change-Id: Ie48889885021500ecc9ac6b39eac70f6321f362b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 16acb2a3d0..bb46b70399 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -21,6 +21,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_AVB=y

commit 90361fcc7d17c264ffe239fc81cd669dfb55ad31
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:36:25 2019 +0800

    configs: rk3368: enable console info quiet
    
    Change-Id: I3436bb3d543f1fdaee9cbfa196acdb710aa9856b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 650d2a3805..80b4655ebc 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -8,6 +8,7 @@ CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_ANDROID_BOOTLOADER=y

commit 69efcf85178fc7ad8f7400a40afdbf284f759d2a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:49:53 2019 +0800

    configs: evb-px30: update with make savedefconfig
    
    Change-Id: I87c57a57e52a4ec15970126eccd2a4c3d702e817
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 5b94dec8db..b4474e6c40 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -17,7 +17,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit e67896e28fe6831296e0db2b5fc71adb831a88b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:45:53 2019 +0800

    configs: rk3326: update with make savedefconfig
    
    Change-Id: I8c1eaf014256023c95141f792e74366861628b52
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 73b1b6d2c7..8e42cf208c 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -18,7 +18,6 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit c1eaf5e1fb6aae13c1a2446aa98677241dd7b8c3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:42:29 2019 +0800

    configs: rk3128x: update with make savedefconfig
    
    Change-Id: I0067fb005d966120d5665732898cfac7d910ba36
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index bde55f9083..16acb2a3d0 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -8,8 +8,8 @@ CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_ROCKCHIP_RK3128X=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -20,7 +20,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
@@ -106,10 +105,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit a422d7d9c7ca7c56f7aa3bef1b100a9946c6a35d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 11:02:53 2019 +0800

    configs: rk3368: remove unused modules to decrease size
    
    size: 767KB => 712KB
    
    Change-Id: Id16cc669574c031d578e2e793ba89cb68b48bbf9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 485b82e5fd..650d2a3805 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_TARGET_EVB_RK3368=y
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3368=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
@@ -17,16 +17,28 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
 CONFIG_CMD_DTIMG=y
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -85,6 +97,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 64e35efeb205dcd532fbbea52215d128ea650110
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 2 15:19:12 2019 +0800

    rockchip: boot_mode: fix usb vbus check value
    
    rockchip_u2phy_vbus_detect() may return negative number when driver
    not implemented, only positive number means vbus available.
    
    Change-Id: I06e9b36c7bbcdbb097abe204f4ff0318541ea869
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 8a217fc0c5..3261d0f65c 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -178,7 +178,7 @@ void rockchip_dnl_mode_check(void)
 {
 	if (rockchip_dnl_key_pressed()) {
 		printf("download key pressed... ");
-		if (rockchip_u2phy_vbus_detect()) {
+		if (rockchip_u2phy_vbus_detect() > 0) {
 			printf("entering download mode...\n");
 			/* If failed, we fall back to bootrom download mode */
 			run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);

commit aa094d464ab871c9005e3f7541d765f863c0c48c
Author: Shengfei Xu <xsf@rock-chips.com>
Date:   Sat Dec 29 19:15:54 2018 +0800

    rockchip: configs: rk3399pro: add fuel_gauge rk809/rk817
    
    Change-Id: I276520ed7962651c498aa7151405eed0318653ce
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index c31ef8b9a3..e40c358946 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -71,7 +71,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
-CONFIG_POWER_FG_RK818=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_IO_DOMAIN=y
 CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y

commit 25b06c45e8cff36d036241da7456232cdbc60550
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Dec 27 09:43:12 2018 +0800

    drm/rockchip: vop: use win1 for ui instead of win0 in px30 vopb.
    
    PX30 vopb have win0, win1 and win2 layers.the formats they support below:
    Win0:   XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16 NV12 NV16 NV24 NA12 NA16 NA24
    Win1/2: XR24 AR24 XB24 AB24 RG24 BG24 RG16 BG16
    
    Only the win0 layer support NV12 format(video decode format).
    So change to use win0 for video overlay layer and win1 for ui layer.
    
    Change-Id: I4cb0b6e46a8f9d34231b776d795e415a7fe7fe6a
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b0fa315537..669f028c67 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -586,7 +586,7 @@ const struct vop_data px30_vop_big = {
 	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
 	.grf_ctrl = &px30_grf_ctrl,
-	.win = &rk3366_win0_data,
+	.win = &rk3366_win1_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };

commit a47573024612fff263a221e9d354c32d693670db
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Thu Jan 3 10:36:08 2019 +0800

    configs: rk3368: enable fdt overlay default
    
    Change-Id: I2d4bc66b3f02643265edb46bf4a1b850d9b825e6
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index e3f6af0e3f..485b82e5fd 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -16,6 +16,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -83,6 +84,7 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 67c90ac35087c8c0774861fe48b130a77f20a86e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 3 10:31:06 2019 +0800

    android: include fdt_support.h file
    
    fix compile error when enable fdt overlay
    
    Change-Id: I283ef3cd44aeb6c64f3362907fcc399919401345
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 710bff8602..919b2fcbf5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -15,6 +15,7 @@
 #include <dt_table.h>
 #include <image-android-dt.h>
 #include <malloc.h>
+#include <fdt_support.h>
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>

commit b2a1587371092f5374eb11600b03075592aed4ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 2 11:22:18 2019 +0800

    lib: avb: add more help info for AVB_VBMETA_PUBLIC_KEY_VALIDATE
    
    Change-Id: I2c63850244983144a6b5ac8303f1debc7a37cb2a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index 8107902213..c9a8da265a 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -10,7 +10,12 @@ config AVB_VBMETA_PUBLIC_KEY_VALIDATE
         bool "Support vbmeta public key validate"
         depends on AVB_LIBAVB_USER
         help
-          support vbmeta public key validate.
+          support vbmeta public key validate, system bootflow would be
+          uninterruptale when it is enabled:
+            - only allow "boot_android" as bootcmd;
+            - enter rockusb or fastboot when boot failed;
+            - not allow ctrl+c to enter hush;
+          only the CONFIG_BOOTDELAY can interrupt the bootflow.
 
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"

commit fb950b786c00c5c3f31c2207a3a5e6979914ab83
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Dec 29 11:29:17 2018 +0800

    rockchip: config: add usb2 phy config for rk3399
    
    This patch enable USB 2.0 PHY driver for rk3399 USB ports.
    With this patch, it can support PHY init, PHY tuning and
    Charge Type detect.
    
    Change-Id: I3433030d5dc16615d11b16a57cf1b24b2e3700d4
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index f95ff9d16b..df2cbecf04 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -76,6 +76,8 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 84f12a439f2564e9f75fce78f41c70e56af3c4d9
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Dec 29 11:25:53 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk3399
    
    This patch adds rk3399 USB 2.0 PHY0 and PHY1 configurations
    for VBUS detect and Charge Type detect.
    
    Change-Id: If520c3aae1b3aa2165590e3d3b1da1ab9f67b7f6
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 2206681f35..841b7385b6 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -821,6 +821,104 @@ static const struct rockchip_usb2phy_cfg rk3368_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3399_phy_cfgs[] = {
+	{
+		.reg		= 0xe450,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0xe450, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus = { 0xe454, 8, 0, 0x052, 0x1d1 },
+				.bvalid_det_en	= { 0xe3c0, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0xe3e0, 3, 3, 0, 1 },
+				.bvalid_det_clr	= { 0xe3d0, 3, 3, 0, 1 },
+				.idfall_det_en	= { 0xe3c0, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0xe3e0, 5, 5, 0, 1 },
+				.idfall_det_clr	= { 0xe3d0, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0xe3c0, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0xe3e0, 4, 4, 0, 1 },
+				.idrise_det_clr	= { 0xe3d0, 4, 4, 0, 1 },
+				.ls_det_en	= { 0xe3c0, 2, 2, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 2, 2, 0, 1 },
+				.utmi_avalid	= { 0xe2ac, 7, 7, 0, 1 },
+				.utmi_bvalid	= { 0xe2ac, 12, 12, 0, 1 },
+				.utmi_iddig	= { 0xe2ac, 8, 8, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 14, 13, 0, 1 },
+				.vbus_det_en    = { 0x449c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0xe458, 1, 0, 0x2, 0x1 },
+				.ls_det_en	= { 0xe3c0, 6, 6, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 6, 6, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 6, 6, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 22, 21, 0, 1 },
+				.utmi_hstdet	= { 0xe2ac, 23, 23, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0xe454, 3, 0, 5, 1 },
+			.cp_det		= { 0xe2ac, 2, 2, 0, 1 },
+			.dcp_det	= { 0xe2ac, 1, 1, 0, 1 },
+			.dp_det		= { 0xe2ac, 0, 0, 0, 1 },
+			.idm_sink_en	= { 0xe450, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0xe450, 7, 7, 0, 1 },
+			.idp_src_en	= { 0xe450, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0xe450, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0xe450, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0xe450, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg		= 0xe460,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0xe460, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus = { 0xe464, 8, 0, 0x052, 0x1d1 },
+				.bvalid_det_en  = { 0xe3c0, 8, 8, 0, 1 },
+				.bvalid_det_st  = { 0xe3e0, 8, 8, 0, 1 },
+				.bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
+				.idfall_det_en	= { 0xe3c0, 10, 10, 0, 1 },
+				.idfall_det_st	= { 0xe3e0, 10, 10, 0, 1 },
+				.idfall_det_clr	= { 0xe3d0, 10, 10, 0, 1 },
+				.idrise_det_en	= { 0xe3c0, 9, 9, 0, 1 },
+				.idrise_det_st	= { 0xe3e0, 9, 9, 0, 1 },
+				.idrise_det_clr	= { 0xe3d0, 9, 9, 0, 1 },
+				.ls_det_en	= { 0xe3c0, 7, 7, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 7, 7, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 7, 7, 0, 1 },
+				.utmi_avalid	= { 0xe2ac, 10, 10, 0, 1 },
+				.utmi_bvalid    = { 0xe2ac, 16, 16, 0, 1 },
+				.utmi_iddig	= { 0xe2ac, 11, 11, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 18, 17, 0, 1 },
+				.vbus_det_en    = { 0x451c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0xe468, 1, 0, 0x2, 0x1 },
+				.ls_det_en	= { 0xe3c0, 11, 11, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 11, 11, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 11, 11, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 26, 25, 0, 1 },
+				.utmi_hstdet	= { 0xe2ac, 27, 27, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0xe464, 3, 0, 5, 1 },
+			.cp_det		= { 0xe2ac, 5, 5, 0, 1 },
+			.dcp_det	= { 0xe2ac, 4, 4, 0, 1 },
+			.dp_det		= { 0xe2ac, 3, 3, 0, 1 },
+			.idm_sink_en	= { 0xe460, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0xe460, 7, 7, 0, 1 },
+			.idp_src_en	= { 0xe460, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0xe460, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0xe460, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0xe460, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -870,6 +968,7 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3368-usb2phy", .data = (ulong)&rk3368_phy_cfgs },
+	{ .compatible = "rockchip,rk3399-usb2phy", .data = (ulong)&rk3399_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }
 };

commit 70363fd81228657b604f3e8d804155004434a28c
Author: Jon Lin <jon.lin@rock-chips.com>
Date:   Thu Dec 27 04:17:26 2018 -0800

    drivers: rkflash: add hash check to map block and vpc block
    
    1.If the validation fails, the data is discarded and the data is
    restored to avoid the abnormal data written when the power lost
    leading to system crash.
    
    Change-Id: I12713b5b6aa01d592d126db4991af679e26b9828
    Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index a46a097bf8..294e85db8e 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-11-29
+ * date: 2018-12-27
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -547,45 +547,6 @@ FtlBbtInfoPrint:
 	@ link register save eliminated.
 	bx	lr
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbtCalcTotleCnt,"ax",%progbits
-	.align	1
-	.global	FtlBbtCalcTotleCnt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlBbtCalcTotleCnt, %function
-FtlBbtCalcTotleCnt:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L54
-	ldr	r2, .L54+4
-	push	{r4, r5, r6, lr}
-	movs	r5, #0
-	ldrh	r3, [r3]
-	mov	r4, r5
-	ldrh	r6, [r2]
-	muls	r6, r3, r6
-.L48:
-	uxth	r0, r5
-	cmp	r0, r6
-	blt	.L50
-	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L50:
-	bl	FtlBbmIsBadBlock
-	cbz	r0, .L49
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L49:
-	adds	r5, r5, #1
-	b	.L48
-.L55:
-	.align	2
-.L54:
-	.word	.LANCHOR17
-	.word	.LANCHOR10
-	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
 	.global	V2P_block
@@ -599,12 +560,12 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r1
-	ldr	r3, .L57
+	ldr	r3, .L48
 	mov	r7, r0
 	ldrh	r6, [r3]
 	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L57+4
+	ldr	r3, .L48+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -615,9 +576,9 @@ V2P_block:
 	add	r0, r0, r4
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L58:
+.L49:
 	.align	2
-.L57:
+.L48:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	V2P_block, .-V2P_block
@@ -632,11 +593,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L60
+	ldr	r3, .L51
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3]
-	ldr	r3, .L60+4
+	ldr	r3, .L51+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	smulbb	r4, r0, r5
@@ -646,9 +607,9 @@ P2V_plane:
 	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L61:
+.L52:
 	.align	2
-.L60:
+.L51:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.size	P2V_plane, .-P2V_plane
@@ -664,18 +625,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L63
+	ldr	r3, .L54
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L63+4
+	ldr	r3, .L54+4
 	uxth	r0, r1
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L64:
+.L55:
 	.align	2
-.L63:
+.L54:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -692,14 +653,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L66
+	bls	.L57
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L66:
+.L57:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -719,14 +680,14 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L69
+	ldr	r3, .L60
 	ldrh	r0, [r3, #6]
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L70:
+.L61:
 	.align	2
-.L69:
+.L60:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
@@ -741,15 +702,15 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L72
+	ldr	r3, .L63
 	ldrh	r0, [r3, #6]
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L73:
+.L64:
 	.align	2
-.L72:
+.L63:
 	.word	.LANCHOR38
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
@@ -763,28 +724,28 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L83
+	ldr	r3, .L74
 	push	{r4, r5, r6, lr}
 	ldrh	r2, [r3, #6]
-	cbz	r2, .L74
-	ldr	r2, .L83+4
+	cbz	r2, .L65
+	ldr	r2, .L74+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
 	mov	r5, r6
 	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
-.L76:
+.L67:
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r4, r0
-	bgt	.L77
-	cbz	r5, .L74
+	bgt	.L68
+	cbz	r5, .L65
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L74:
+.L65:
 	pop	{r4, r5, r6, pc}
-.L77:
+.L68:
 	adds	r0, r1, #4
 	adds	r1, r1, #1
 	ldrh	r5, [r3, r0, lsl #1]
@@ -794,10 +755,10 @@ FtlFreeSysBLkSort:
 	movs	r5, #1
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L76
-.L84:
+	b	.L67
+.L75:
 	.align	2
-.L83:
+.L74:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -812,34 +773,34 @@ FtlFreeSysBLkSort:
 IsInFreeQueue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L91
+	ldr	r3, .L82
 	push	{r4, r5, lr}
 	ldrh	r4, [r3, #6]
 	cmp	r4, #1024
-	beq	.L89
+	beq	.L80
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
-.L87:
+.L78:
 	cmp	r1, r4
-	bcc	.L88
-.L89:
+	bcc	.L79
+.L80:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L88:
+.L79:
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
-	beq	.L90
+	beq	.L81
 	adds	r1, r1, #1
-	b	.L87
-.L90:
+	b	.L78
+.L81:
 	movs	r0, #1
 	pop	{r4, r5, pc}
-.L92:
+.L83:
 	.align	2
-.L91:
+.L82:
 	.word	.LANCHOR38
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",%progbits
@@ -854,11 +815,11 @@ insert_data_list:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L109
+	ldr	r3, .L100
 	ldrh	lr, [r3]
 	cmp	lr, r0
-	bls	.L95
-	ldr	r3, .L109+4
+	bls	.L86
+	ldr	r3, .L100+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
@@ -868,102 +829,102 @@ insert_data_list:
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L109+8
+	ldr	r3, .L100+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L96
-.L108:
+	bne	.L87
+.L99:
 	str	r1, [r3]
-.L95:
+.L86:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L96:
-	ldr	r3, .L109+12
+.L87:
+	ldr	r3, .L100+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
 	ldrh	r3, [r1, #4]
-	cbz	r3, .L106
+	cbz	r3, .L97
 	mul	fp, r3, r6
-.L97:
+.L88:
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-	ldr	r3, .L109+16
+	ldr	r3, .L100+16
 	muls	r3, r6, r3
-	ldr	r6, .L109+20
+	ldr	r6, .L100+20
 	ldr	r8, [r6]
 	movs	r6, #0
 	uxth	r3, r3
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.L104:
+.L95:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	lr, r6
-	bcc	.L95
+	bcc	.L86
 	cmp	r3, r0
-	beq	.L95
+	beq	.L86
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
 	ldrh	r7, [r2, #4]
-	cbz	r7, .L107
+	cbz	r7, .L98
 	muls	r7, r5, r7
-.L99:
+.L90:
 	cmp	fp, r7
-	bne	.L100
+	bne	.L91
 	ldr	r5, [sp, #12]
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
 	cmp	r10, r7
-	bcc	.L102
-.L101:
+	bcc	.L93
+.L92:
 	ldr	r5, [sp, #4]
 	cmp	r2, ip
 	strh	r3, [r4, r5]	@ movhi
 	ldrh	r3, [r2, #2]
 	strh	r3, [r1, #2]	@ movhi
-	bne	.L105
+	bne	.L96
 	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L109+8
-	b	.L108
-.L106:
+	ldr	r3, .L100+8
+	b	.L99
+.L97:
 	mov	fp, #-1
-	b	.L97
-.L107:
+	b	.L88
+.L98:
 	mov	r7, #-1
-	b	.L99
-.L100:
-	bcc	.L101
-.L102:
+	b	.L90
+.L91:
+	bcc	.L92
+.L93:
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
-	bne	.L103
+	bne	.L94
 	strh	r3, [r1, #2]	@ movhi
 	strh	r0, [r2]	@ movhi
-	ldr	r3, .L109+24
-	b	.L108
-.L103:
+	ldr	r3, .L100+24
+	b	.L99
+.L94:
 	movs	r3, #6
 	mla	r2, r3, r7, r4
 	mov	r3, r7
-	b	.L104
-.L105:
+	b	.L95
+.L96:
 	ldrh	r1, [r2, #2]
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
 	strh	r0, [r2, #2]	@ movhi
-	b	.L95
-.L110:
+	b	.L86
+.L101:
 	.align	2
-.L109:
+.L100:
 	.word	.LANCHOR5
 	.word	.LANCHOR40
 	.word	.LANCHOR41
@@ -985,25 +946,25 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L113
+	ldr	r2, .L104
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L113+4
+	ldr	r2, .L104+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L111
+	bcs	.L102
 	movs	r2, #214
-	ldr	r1, .L113+8
-	ldr	r0, .L113+12
+	ldr	r1, .L104+8
+	ldr	r0, .L104+12
 	pop	{r3, lr}
 	b	printf
-.L111:
+.L102:
 	pop	{r3, pc}
-.L114:
+.L105:
 	.align	2
-.L113:
+.L104:
 	.word	.LANCHOR45
 	.word	.LANCHOR5
 	.word	.LANCHOR46
@@ -1023,48 +984,48 @@ insert_free_list:
 	movw	r1, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L116
-	ldr	r3, .L122
+	beq	.L107
+	ldr	r3, .L113
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	ldr	r3, .L122+4
+	ldr	r3, .L113+4
 	adds	r5, r4, r7
 	ldr	r6, [r3]
 	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L117
+	cbnz	r6, .L108
 	str	r5, [r3]
-.L116:
+.L107:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L117:
-	ldr	r3, .L122+8
+.L108:
+	ldr	r3, .L113+8
 	subs	r2, r6, r4
 	mov	fp, r1
 	ldr	ip, [r3]
 	asrs	r3, r2, #1
-	ldr	r2, .L122+12
+	ldr	r2, .L113+12
 	ldrh	r8, [ip, r0, lsl #1]
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.L120:
+.L111:
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L118
+	bcs	.L109
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L119
+	bne	.L110
 	strh	r2, [r5, #2]	@ movhi
 	strh	r0, [r3]	@ movhi
-	b	.L116
-.L119:
+	b	.L107
+.L110:
 	mla	r3, r10, r1, r4
 	mov	r2, r1
-	b	.L120
-.L118:
+	b	.L111
+.L109:
 	ldrh	r1, [r3, #2]
 	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
@@ -1079,10 +1040,10 @@ insert_free_list:
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L116
-.L123:
+	b	.L107
+.L114:
 	.align	2
-.L122:
+.L113:
 	.word	.LANCHOR40
 	.word	.LANCHOR47
 	.word	.LANCHOR43
@@ -1101,25 +1062,25 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L126
+	ldr	r2, .L117
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L126+4
+	ldr	r2, .L117+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L124
+	bcs	.L115
 	movs	r2, #207
-	ldr	r1, .L126+8
-	ldr	r0, .L126+12
+	ldr	r1, .L117+8
+	ldr	r0, .L117+12
 	pop	{r3, lr}
 	b	printf
-.L124:
+.L115:
 	pop	{r3, pc}
-.L127:
+.L118:
 	.align	2
-.L126:
+.L117:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
@@ -1138,7 +1099,7 @@ List_remove_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
-	ldr	r5, .L134
+	ldr	r5, .L125
 	muls	r6, r1, r6
 	movw	r3, #65535
 	mov	r8, r0
@@ -1146,20 +1107,20 @@ List_remove_node:
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L129
+	bne	.L120
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L129
+	beq	.L120
 	mov	r2, #372
-	ldr	r1, .L134+4
-	ldr	r0, .L134+8
+	ldr	r1, .L125+4
+	ldr	r0, .L125+8
 	bl	printf
-.L129:
+.L120:
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L130
+	bne	.L121
 	cmp	r3, r1
 	ittee	ne
 	ldrne	r0, [r5]
@@ -1170,24 +1131,24 @@ List_remove_node:
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
 	strhne	r1, [r3, #2]	@ movhi
-.L132:
+.L123:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.L130:
+.L121:
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
-	bne	.L133
+	bne	.L124
 	cmp	r1, r3
-	beq	.L132
+	beq	.L123
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
 	strh	r3, [r0, r1]	@ movhi
-	b	.L132
-.L133:
+	b	.L123
+.L124:
 	ldr	r0, [r5]
 	movs	r2, #6
 	mla	r5, r2, r3, r0
@@ -1195,10 +1156,10 @@ List_remove_node:
 	ldrh	r1, [r4, #2]
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
-	b	.L132
-.L135:
+	b	.L123
+.L126:
 	.align	2
-.L134:
+.L125:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
@@ -1216,15 +1177,15 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L142
-	ldr	r2, .L143
+	cbz	r3, .L133
+	ldr	r2, .L134
 	movw	r5, #65535
 	movs	r6, #6
 	ldr	r2, [r2]
-.L138:
-	cbnz	r1, .L139
-.L141:
-	ldr	r4, .L143+4
+.L129:
+	cbnz	r1, .L130
+.L132:
+	ldr	r4, .L134+4
 	subs	r3, r3, r2
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
@@ -1232,20 +1193,20 @@ List_pop_index_node:
 	bl	List_remove_node
 	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L139:
+.L130:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L141
+	beq	.L132
 	subs	r1, r1, #1
 	mla	r3, r6, r4, r2
 	uxth	r1, r1
-	b	.L138
-.L142:
+	b	.L129
+.L133:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L144:
+.L135:
 	.align	2
-.L143:
+.L134:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -1275,37 +1236,37 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L152
+	ldr	r3, .L143
 	push	{r4, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L151
-	ldr	r2, .L152+4
+	cbz	r3, .L142
+	ldr	r2, .L143+4
 	movs	r4, #6
 	ldr	r1, [r2]
 	movw	r2, #65535
-.L148:
-	cbz	r0, .L149
+.L139:
+	cbz	r0, .L140
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L150
-.L151:
+	bne	.L141
+.L142:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L150:
+.L141:
 	subs	r0, r0, #1
 	mla	r3, r4, r3, r1
 	uxth	r0, r0
-	b	.L148
-.L149:
-	ldr	r0, .L152+8
+	b	.L139
+.L140:
+	ldr	r0, .L143+8
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
 	pop	{r4, pc}
-.L153:
+.L144:
 	.align	2
-.L152:
+.L143:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1321,61 +1282,61 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L165
+	ldr	r3, .L156
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L156
-	ldr	r3, .L165+4
+	beq	.L147
+	ldr	r3, .L156+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L156
-	ldr	r3, .L165+8
+	beq	.L147
+	ldr	r3, .L156+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L156
-	ldr	r7, .L165+12
+	beq	.L147
+	ldr	r7, .L156+12
 	movs	r6, #6
-	ldr	r3, .L165+16
+	ldr	r3, .L156+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
 	ldr	r3, [r3]
 	add	r10, fp, r6
 	cmp	r10, r3
-	beq	.L156
-	ldr	r3, .L165+20
+	beq	.L147
+	ldr	r3, .L156+20
 	ldrh	r5, [r10, #4]
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
 	cmp	r5, #0
-	beq	.L163
+	beq	.L154
 	muls	r5, r2, r5
-.L158:
+.L149:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L159
+	bne	.L150
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L159
+	bne	.L150
 	movw	r2, #463
-	ldr	r1, .L165+24
-	ldr	r0, .L165+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L159:
+.L150:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L160
+	bne	.L151
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L156
-.L160:
+	beq	.L147
+.L151:
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L165+32
+	ldr	r3, .L156+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
 	ldr	r1, [r8]
@@ -1383,39 +1344,39 @@ List_update_data_list:
 	ldr	r1, [r7]
 	add	r2, r2, r1
 	ldrh	r3, [r2, #4]
-	cbz	r3, .L164
+	cbz	r3, .L155
 	muls	r3, r0, r3
-.L161:
+.L152:
 	cmp	r5, r3
-	bcs	.L156
-	ldr	r5, .L165+36
+	bcs	.L147
+	ldr	r5, .L156+36
 	mov	r1, r4
-	ldr	r0, .L165+16
+	ldr	r0, .L156+16
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L162
+	cbnz	r3, .L153
 	mov	r2, #474
-	ldr	r1, .L165+24
-	ldr	r0, .L165+28
+	ldr	r1, .L156+24
+	ldr	r0, .L156+28
 	bl	printf
-.L162:
+.L153:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L156:
+.L147:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L163:
+.L154:
 	mov	r5, #-1
-	b	.L158
-.L164:
+	b	.L149
+.L155:
 	mov	r3, #-1
-	b	.L161
-.L166:
+	b	.L152
+.L157:
 	.align	2
-.L165:
+.L156:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -1440,79 +1401,79 @@ select_l2p_ram_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r1, #0
-	ldr	r3, .L177
+	ldr	r3, .L168
 	movs	r0, #12
 	movw	r5, #65535
 	ldrh	r2, [r3]
-	ldr	r3, .L177+4
+	ldr	r3, .L168+4
 	ldr	r3, [r3]
-.L168:
+.L159:
 	uxth	r4, r1
 	cmp	r4, r2
-	bcc	.L170
+	bcc	.L161
 	mov	r4, r2
 	movs	r1, #0
 	mov	r6, #-2147483648
 	movs	r7, #12
-.L171:
+.L162:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L173
+	bcc	.L164
 	cmp	r4, r2
-	bcc	.L169
-	ldr	r1, .L177+8
+	bcc	.L160
+	ldr	r1, .L168+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L174:
+.L165:
 	uxth	r5, r1
 	cmp	r5, r2
-	bcc	.L176
+	bcc	.L167
 	cmp	r4, r2
-	bcc	.L169
-	movw	r2, #787
-	ldr	r1, .L177+12
-	ldr	r0, .L177+16
+	bcc	.L160
+	movw	r2, #789
+	ldr	r1, .L168+12
+	ldr	r0, .L168+16
 	bl	printf
-	b	.L169
-.L170:
+	b	.L160
+.L161:
 	adds	r1, r1, #1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L168
-.L169:
+	bne	.L159
+.L160:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L173:
+.L164:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L172
+	blt	.L163
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
 	movhi	r4, r5
-.L172:
+.L163:
 	adds	r1, r1, #1
-	b	.L171
-.L176:
+	b	.L162
+.L167:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L175
+	bls	.L166
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
 	movne	r4, r5
-.L175:
+.L166:
 	adds	r1, r1, #1
 	adds	r3, r3, #12
-	b	.L174
-.L178:
+	b	.L165
+.L169:
 	.align	2
-.L177:
+.L168:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR56
@@ -1530,45 +1491,45 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L189
+	ldr	r2, .L180
 	push	{r4, r5, r6, lr}
 	mov	r1, r2
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L180
-	cbnz	r0, .L180
+	bhi	.L171
+	cbnz	r0, .L171
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L180:
+.L171:
 	movs	r3, #0
-	ldr	r0, .L189+4
+	ldr	r0, .L180+4
 	strh	r3, [r1]	@ movhi
 	movw	r6, #65535
-	ldr	r1, .L189+8
+	ldr	r1, .L180+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-	ldr	r2, .L189+12
+	ldr	r2, .L180+12
 	ldr	r1, [r1]
 	str	r3, [r2]
 	add	r4, r1, r4, lsl #1
-.L181:
+.L172:
 	cmp	r1, r4
-	bne	.L183
-	cbz	r3, .L179
+	bne	.L174
+	cbz	r3, .L170
 	str	r0, [r2]
-.L179:
+.L170:
 	pop	{r4, r5, r6, pc}
-.L183:
+.L174:
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L181
-.L190:
+	b	.L172
+.L181:
 	.align	2
-.L189:
+.L180:
 	.word	.LANCHOR58
 	.word	.LANCHOR5
 	.word	.LANCHOR42
@@ -1587,10 +1548,10 @@ ftl_set_blk_mode:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r1, .L192
+	cbz	r1, .L183
 	b	ftl_set_blk_mode.part.6
-.L192:
-	ldr	r2, .L193
+.L183:
+	ldr	r2, .L184
 	lsrs	r0, r0, #5
 	and	r3, r3, #31
 	ldr	r1, [r2]
@@ -1600,9 +1561,9 @@ ftl_set_blk_mode:
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L194:
+.L185:
 	.align	2
-.L193:
+.L184:
 	.word	.LANCHOR1
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
@@ -1617,7 +1578,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L196
+	ldr	r3, .L187
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3]
@@ -1625,9 +1586,9 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L197:
+.L188:
 	.align	2
-.L196:
+.L187:
 	.word	.LANCHOR1
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
@@ -1645,14 +1606,14 @@ ftl_sb_update_avl_pages:
 	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
 	movw	r6, #65535
-	ldr	r3, .L205
+	ldr	r3, .L196
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L199:
+.L190:
 	cmp	r2, r4
-	bcc	.L201
-	ldr	r3, .L205+4
+	bcc	.L192
+	ldr	r3, .L196+4
 	add	r5, r0, #16
 	movw	r6, #65535
 	ldrh	r3, [r3]
@@ -1660,12 +1621,12 @@ ftl_sb_update_avl_pages:
 	subs	r1, r3, r1
 	movs	r3, #0
 	uxth	r1, r1
-.L202:
+.L193:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L204
+	bhi	.L195
 	pop	{r4, r5, r6, pc}
-.L201:
+.L192:
 	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
 	uxth	r2, r2
@@ -1674,8 +1635,8 @@ ftl_sb_update_avl_pages:
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L199
-.L204:
+	b	.L190
+.L195:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
 	cmp	r2, r6
@@ -1683,10 +1644,10 @@ ftl_sb_update_avl_pages:
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L202
-.L206:
+	b	.L193
+.L197:
 	.align	2
-.L205:
+.L196:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -1703,24 +1664,24 @@ FtlSlcSuperblockCheck:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r3, [r0, #4]
 	push	{r4, r5, lr}
-	cbz	r3, .L207
+	cbz	r3, .L198
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L207
+	beq	.L198
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	movs	r5, #0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-	ldr	r2, .L213
+	ldr	r2, .L204
 	ldrh	r4, [r2]
 	mov	r2, r3
-.L210:
+.L201:
 	cmp	r1, r2
-	beq	.L212
-.L207:
+	beq	.L203
+.L198:
 	pop	{r4, r5, pc}
-.L212:
+.L203:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
@@ -1734,10 +1695,10 @@ FtlSlcSuperblockCheck:
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-	b	.L210
-.L214:
+	b	.L201
+.L205:
 	.align	2
-.L213:
+.L204:
 	.word	.LANCHOR3
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
@@ -1751,31 +1712,31 @@ FtlSlcSuperblockCheck:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L220
+	ldr	r3, .L211
 	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L216
-	movw	r2, #2110
-	ldr	r1, .L220+4
-	ldr	r0, .L220+8
+	bcc	.L207
+	movw	r2, #2156
+	ldr	r1, .L211+4
+	ldr	r0, .L211+8
 	bl	printf
-.L216:
-	ldr	r3, .L220+12
+.L207:
+	ldr	r3, .L211+12
 	add	r6, r4, #16
-	ldr	r10, .L220+20
+	ldr	r10, .L211+20
 	movw	r7, #65535
 	movs	r5, #0
 	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
 	strb	r5, [r4, #7]
-.L217:
+.L208:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L219
-	ldr	r2, .L220+16
+	bhi	.L210
+	ldr	r2, .L211+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	strb	r0, [r4, #9]
@@ -1783,25 +1744,25 @@ make_superblock:
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L219:
+.L210:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	strh	r7, [r6]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L218
+	cbnz	r0, .L209
 	strh	fp, [r6]	@ movhi
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L218:
+.L209:
 	adds	r5, r5, #1
 	adds	r6, r6, #2
-	b	.L217
-.L221:
+	b	.L208
+.L212:
 	.align	2
-.L220:
+.L211:
 	.word	.LANCHOR5
 	.word	.LANCHOR60
 	.word	.LC1
@@ -1822,46 +1783,46 @@ update_multiplier_value:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r3, .L228
+	ldr	r3, .L219
 	mov	r6, r0
 	mov	r4, r5
-	ldr	r10, .L228+12
+	ldr	r10, .L219+12
 	ldrh	r7, [r3]
-	ldr	r3, .L228+4
+	ldr	r3, .L219+4
 	ldrh	r8, [r3]
-.L223:
+.L214:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L225
-	cbz	r4, .L227
+	bhi	.L216
+	cbz	r4, .L218
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L226:
-	ldr	r3, .L228+8
+.L217:
+	ldr	r3, .L219+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L225:
+.L216:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L224
+	cbnz	r0, .L215
 	add	r4, r4, r8
 	uxth	r4, r4
-.L224:
+.L215:
 	adds	r5, r5, #1
-	b	.L223
-.L227:
+	b	.L214
+.L218:
 	mov	r0, r4
-	b	.L226
-.L229:
+	b	.L217
+.L220:
 	.align	2
-.L228:
+.L219:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.word	.LANCHOR40
@@ -1879,24 +1840,24 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L233
+	ldr	r3, .L224
 	ldr	r0, [r3]
-	cbz	r0, .L231
-	ldr	r3, .L233+4
+	cbz	r0, .L222
+	ldr	r3, .L224+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L233+8
+	ldr	r3, .L224+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L233+12
+	ldr	r3, .L224+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L231:
+.L222:
 	bx	lr
-.L234:
+.L225:
 	.align	2
-.L233:
+.L224:
 	.word	.LANCHOR47
 	.word	.LANCHOR40
 	.word	-1431655765
@@ -1913,11 +1874,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L243
+	ldr	r3, .L234
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3]
-	cbz	r3, .L241
-	ldr	r2, .L243+4
+	cbz	r3, .L232
+	ldr	r2, .L234+4
 	movs	r5, #6
 	movw	r6, #65535
 	ldrh	r2, [r2]
@@ -1926,7428 +1887,5510 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L243+8
+	ldr	r2, .L234+8
 	ldr	r1, [r2]
-	ldr	r2, .L243+12
+	ldr	r2, .L234+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-.L238:
+.L229:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L240
+	bls	.L231
 	mul	r4, r5, r3
 	adds	r2, r2, #1
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L242
-.L240:
-	ldr	r2, .L243+16
+	bne	.L233
+.L231:
+	ldr	r2, .L234+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L242:
+.L233:
 	mov	r3, r4
-	b	.L238
-.L241:
+	b	.L229
+.L232:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L244:
+.L235:
 	.align	2
-.L243:
+.L234:
 	.word	.LANCHOR47
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	-1431655765
 	.word	.LANCHOR43
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.section	.text.FtlPrintInfo2buf,"ax",%progbits
+	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
-	.global	FtlPrintInfo2buf
+	.global	free_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlPrintInfo2buf, %function
-FtlPrintInfo2buf:
+	.type	free_data_superblock, %function
+free_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #64
-	ldr	r2, .L257
-	mov	r8, r0
-	bl	snprintf
-	ldr	r3, .L257+4
-	add	r5, r8, r0
-	ldr	r2, .L257+8
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r6, .L257+12
-	ldr	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldr	r2, .L257+16
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L257+20
-	add	r5, r5, r0
-	ldr	r2, .L257+24
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r4, .L257+28
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+32
-	add	r5, r5, r0
-	ldr	r2, .L257+36
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r7, .L257+40
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+44
-	add	r5, r5, r0
-	ldr	r2, .L257+48
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r10, .L257+328
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+52
-	add	r5, r5, r0
-	ldr	r2, .L257+56
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+60
-	add	r5, r5, r0
-	ldr	r2, .L257+64
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+68
-	add	r5, r5, r0
-	ldr	r2, .L257+72
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+76
-	add	r5, r5, r0
-	ldr	r2, .L257+80
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+84
-	add	r5, r5, r0
-	ldr	r2, .L257+88
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+92
-	add	r5, r5, r0
-	ldr	r2, .L257+96
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	lsrs	r3, r3, #11
-	bl	snprintf
-	ldr	r3, .L257+100
-	add	r5, r5, r0
-	ldr	r2, .L257+104
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	lsrs	r3, r3, #11
-	bl	snprintf
-	ldr	r3, .L257+108
-	add	r5, r5, r0
-	ldr	r2, .L257+112
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+116
-	add	r5, r5, r0
-	ldr	r2, .L257+120
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r6, #6]
-	ldr	r2, .L257+124
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r4]
-	ldr	r2, .L257+128
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L257+132
-	add	r5, r5, r0
-	ldr	r2, .L257+136
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+140
-	add	r5, r5, r0
-	ldr	r2, .L257+144
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+148
-	add	r5, r5, r0
-	ldr	r2, .L257+152
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+156
-	add	r5, r5, r0
-	ldr	r2, .L257+160
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+164
-	add	r5, r5, r0
-	ldr	r2, .L257+168
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+172
-	add	r5, r5, r0
-	ldr	r2, .L257+176
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #30]
-	ldr	r2, .L257+180
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #28]
-	ldr	r2, .L257+184
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r7, .L257+188
-	bl	snprintf
-	ldr	r3, .L257+192
-	add	r5, r5, r0
-	ldr	r2, .L257+196
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+200
-	add	r5, r5, r0
-	ldr	r2, .L257+204
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+208
-	add	r5, r5, r0
-	ldr	r2, .L257+212
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+216
-	add	r5, r5, r0
-	ldr	r2, .L257+220
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3, #6]
-	bl	snprintf
-	ldr	r3, .L257+224
-	add	r5, r5, r0
-	ldr	r2, .L257+228
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+232
-	add	r5, r5, r0
-	ldr	r2, .L257+236
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+240
-	add	r5, r5, r0
-	ldr	r2, .L257+244
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L257+248
-	add	r5, r5, r0
-	ldr	r2, .L257+252
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r6]
-	ldr	r2, .L257+256
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r6, .L257+260
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L257+264
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L257+268
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7]
-	ldr	r2, .L257+272
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L257+276
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #4]
-	ldr	r2, .L257+280
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldrh	r2, [r7]
-	add	r5, r5, r0
-	ldr	r3, [r6]
-	movs	r1, #64
-	ldr	r7, .L257+284
-	mov	r0, r5
-	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L257+288
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L257+292
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L257+296
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7]
-	ldr	r2, .L257+300
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L257+304
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #4]
-	ldr	r2, .L257+308
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldrh	r2, [r7]
-	add	r5, r5, r0
-	ldr	r3, [r6]
-	movs	r1, #64
-	ldr	r7, .L257+312
-	mov	r0, r5
-	ldrh	r3, [r3, r2, lsl #1]
-	ldr	r2, .L257+316
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L257+320
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L257+324
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	b	.L258
-.L259:
-	.align	2
-.L257:
-	.word	.LC2
-	.word	.LANCHOR26
-	.word	.LC3
-	.word	.LANCHOR37
-	.word	.LC4
-	.word	.LANCHOR61
-	.word	.LC5
-	.word	.LANCHOR48
-	.word	.LANCHOR59
-	.word	.LC6
-	.word	.LANCHOR39
-	.word	.LANCHOR62
-	.word	.LC7
-	.word	.LANCHOR63
-	.word	.LC8
-	.word	.LANCHOR64
-	.word	.LC9
-	.word	.LANCHOR65
-	.word	.LC10
-	.word	.LANCHOR66
-	.word	.LC11
-	.word	.LANCHOR67
-	.word	.LC12
-	.word	.LANCHOR68
-	.word	.LC13
-	.word	.LANCHOR69
-	.word	.LC14
-	.word	.LANCHOR70
-	.word	.LC15
-	.word	.LANCHOR71
-	.word	.LC16
-	.word	.LC17
-	.word	.LC18
-	.word	.LANCHOR72
-	.word	.LC19
-	.word	.LANCHOR73
-	.word	.LC20
-	.word	.LANCHOR74
-	.word	.LC21
-	.word	.LANCHOR75
-	.word	.LC22
-	.word	.LANCHOR76
-	.word	.LC23
-	.word	.LANCHOR77
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
-	.word	.LANCHOR51
-	.word	.LANCHOR34
-	.word	.LC27
-	.word	.LANCHOR31
-	.word	.LC28
-	.word	.LANCHOR2
-	.word	.LC29
-	.word	.LANCHOR38
-	.word	.LC30
-	.word	.LANCHOR5
-	.word	.LC31
-	.word	.LANCHOR78
-	.word	.LC32
-	.word	.LANCHOR7
-	.word	.LC33
-	.word	.LANCHOR79
-	.word	.LC34
-	.word	.LC35
-	.word	.LANCHOR42
-	.word	.LC36
-	.word	.LC37
-	.word	.LC38
-	.word	.LC39
-	.word	.LC40
-	.word	.LANCHOR52
-	.word	.LC41
-	.word	.LC42
-	.word	.LC43
-	.word	.LC44
-	.word	.LC45
-	.word	.LC46
-	.word	.LANCHOR53
-	.word	.LC47
-	.word	.LC48
-	.word	.LC49
-	.word	.LANCHOR81
-.L258:
-	ldrh	r3, [r7]
-	ldr	r2, .L260
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L260+4
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldrh	r3, [r7, #4]
-	add	r5, r5, r0
-	ldr	r7, .L260+8
-	movs	r1, #64
-	ldr	r2, .L260+12
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #2]
-	ldr	r2, .L260+16
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #6]	@ zero_extendqisi2
-	ldr	r2, .L260+20
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7]
-	ldr	r2, .L260+24
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrb	r3, [r7, #8]	@ zero_extendqisi2
-	ldr	r2, .L260+28
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r3, [r7, #4]
-	ldr	r2, .L260+32
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, [r10, #76]
-	add	r5, r5, r0
-	ldr	r2, .L260+36
-	movs	r1, #64
-	mov	r0, r5
-	str	r3, [sp, #4]
-	ldr	r3, [r10, #84]
-	str	r3, [sp]
-	ldr	r3, [r10, #80]
-	bl	snprintf
-	add	r5, r5, r0
-	ldr	r3, [r10, #72]
-	ldr	r2, .L260+40
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldr	r3, [r10, #96]
-	ldr	r2, .L260+44
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L260+48
-	add	r5, r5, r0
-	ldr	r2, .L260+52
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L260+56
-	add	r5, r5, r0
-	ldr	r2, .L260+60
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L260+64
-	add	r5, r5, r0
-	ldr	r2, .L260+68
-	movs	r1, #64
-	mov	r0, r5
-	ldr	r3, [r3]
-	bl	snprintf
-	ldr	r3, .L260+72
-	add	r5, r5, r0
-	ldr	r2, .L260+76
-	movs	r1, #64
-	mov	r0, r5
-	ldrh	r3, [r3]
-	bl	snprintf
-	add	r5, r5, r0
-	bl	GetFreeBlockMinEraseCount
-	ldr	r2, .L260+80
-	mov	r3, r0
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	add	r5, r5, r0
-	ldrh	r0, [r4]
-	bl	GetFreeBlockMaxEraseCount
-	ldr	r2, .L260+84
-	mov	r3, r0
-	movs	r1, #64
-	mov	r0, r5
-	bl	snprintf
-	ldr	r3, .L260+88
-	adds	r4, r5, r0
-	ldr	r3, [r3]
-	cmp	r3, #1
-	beq	.L246
-.L251:
-	sub	r0, r4, r8
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L246:
-	ldrh	r3, [r7]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L248
-	ldr	r2, [r6]
-	mov	r0, r4
-	movs	r1, #64
-	ldrh	r3, [r2, r3, lsl #1]
-	ldr	r2, .L260+92
-	bl	snprintf
-	add	r4, r4, r0
-.L248:
-	movs	r0, #0
-	ldr	r5, .L260+96
-	ldr	fp, .L260+112
-	movs	r7, #0
-	bl	List_get_gc_head_node
-	uxth	r0, r0
-.L250:
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L249
-	ldr	r3, [fp]
-	mov	r10, #6
-	mul	r10, r10, r0
-	ldr	r2, .L260+100
-	movs	r1, #64
-	ldrh	r3, [r3, r0, lsl #1]
-	str	r3, [sp, #12]
-	ldr	r3, [r5]
-	add	r3, r3, r10
-	ldrh	r3, [r3, #4]
-	str	r3, [sp, #8]
-	ldr	r3, [r6]
-	ldrh	r3, [r3, r0, lsl #1]
-	stm	sp, {r0, r3}
-	mov	r3, r7
-	mov	r0, r4
-	adds	r7, r7, #1
-	bl	snprintf
-	ldr	r3, [r5]
-	cmp	r7, #16
-	add	r4, r4, r0
-	ldrh	r0, [r3, r10]
-	bne	.L250
-.L249:
-	ldr	r3, .L260+104
-	movs	r7, #0
-	ldr	r2, [r5]
-	ldr	r10, .L260+112
-	ldr	r3, [r3]
-	ldr	fp, .L260+116
-	subs	r3, r3, r2
-	ldr	r2, .L260+108
-	asrs	r3, r3, #1
-	muls	r3, r2, r3
-	uxth	r3, r3
-.L252:
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L251
-	ldr	r2, [r10]
-	movs	r6, #6
-	muls	r6, r3, r6
-	mov	r0, r4
-	movs	r1, #64
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #8]
-	ldr	r2, [r5]
-	add	r2, r2, r6
-	ldrh	r2, [r2, #4]
-	str	r3, [sp]
-	mov	r3, r7
-	adds	r7, r7, #1
-	str	r2, [sp, #4]
-	mov	r2, fp
-	bl	snprintf
-	cmp	r7, #4
-	add	r4, r4, r0
-	beq	.L251
-	ldr	r3, [r5]
-	ldrh	r3, [r3, r6]
-	b	.L252
-.L261:
-	.align	2
-.L260:
-	.word	.LC50
-	.word	.LC51
-	.word	.LANCHOR80
-	.word	.LC52
-	.word	.LC53
-	.word	.LC54
-	.word	.LC55
-	.word	.LC56
-	.word	.LC57
-	.word	.LC58
-	.word	.LC59
-	.word	.LC60
-	.word	.LANCHOR82
-	.word	.LC61
-	.word	.LANCHOR83
-	.word	.LC62
-	.word	.LANCHOR84
-	.word	.LC63
-	.word	.LANCHOR85
-	.word	.LC64
-	.word	.LC65
-	.word	.LC66
-	.word	.LANCHOR86
-	.word	.LC67
-	.word	.LANCHOR40
-	.word	.LC68
-	.word	.LANCHOR47
-	.word	-1431655765
-	.word	.LANCHOR43
-	.word	.LC69
-	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
-	.section	.text.rknand_proc_ftlread,"ax",%progbits
-	.align	1
-	.global	rknand_proc_ftlread
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_proc_ftlread, %function
-rknand_proc_ftlread:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r0, #2048
-	push	{r3, r4, r5, lr}
-	mov	r5, r1
-	blt	.L264
-	ldr	r3, .L265
-	movs	r1, #64
-	ldr	r2, .L265+4
-	mov	r0, r5
-	bl	snprintf
-	adds	r4, r5, r0
-	mov	r0, r4
-	bl	FtlPrintInfo2buf
-	add	r0, r0, r4
-	subs	r0, r0, r5
-	pop	{r3, r4, r5, pc}
-.L264:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L266:
-	.align	2
-.L265:
-	.word	.LC70
-	.word	.LC71
-	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
-	.section	.text.GetSwlReplaceBlock,"ax",%progbits
-	.align	1
-	.global	GetSwlReplaceBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	GetSwlReplaceBlock, %function
-GetSwlReplaceBlock:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r3, .L295
-	ldr	r6, .L295+4
-	ldr	r5, [r3]
-	mov	r10, r3
-	ldr	r1, [r6]
-	cmp	r1, r5
-	bcs	.L268
-	ldr	r2, .L295+8
-	movs	r3, #0
-	ldr	r4, .L295+12
-	mov	r0, r3
-	ldrh	r1, [r2]
-	ldr	r2, .L295+16
-	str	r3, [r4]
-	ldr	r7, [r2]
-	mov	r2, r3
-.L269:
-	cmp	r2, r1
-	bcc	.L270
-	cbz	r3, .L271
-	str	r0, [r4]
-.L271:
-	ldr	r7, [r4]
-	mov	r0, r7
-	bl	__aeabi_uidiv
-	ldr	r3, .L295+20
-	str	r0, [r6]
-	ldr	r0, [r3]
-	ldr	r3, .L295+24
-	subs	r0, r7, r0
-	ldrh	r1, [r3]
-	bl	__aeabi_uidiv
-	str	r0, [r4]
-.L272:
-	ldr	r6, [r6]
-	add	r3, r5, #256
-	cmp	r3, r6
-	bls	.L277
-	ldr	r2, .L295+28
-	add	r3, r5, #768
-	ldr	r2, [r2]
-	cmp	r3, r2
-	bls	.L277
-.L279:
-	movw	r4, #65535
-.L278:
-	mov	r0, r4
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L270:
-	ldrh	r3, [r7, r2, lsl #1]
-	adds	r2, r2, #1
-	add	r0, r0, r3
-	movs	r3, #1
-	b	.L269
-.L268:
-	ldr	r2, .L295+28
-	ldr	r3, [r2]
-	cmp	r1, r3
-	bls	.L272
-	adds	r3, r3, #1
-	ldr	r0, .L295+8
-	str	r3, [r2]
-	movs	r2, #0
-	ldr	r3, .L295+16
-	ldr	r3, [r3]
-	subs	r3, r3, #2
-.L274:
-	ldrh	r1, [r0]
-	cmp	r2, r1
-	bcs	.L272
-	ldrh	r1, [r3, #2]
-	adds	r2, r2, #1
-	adds	r1, r1, #1
-	strh	r1, [r3, #2]!	@ movhi
-	b	.L274
-.L277:
-	ldr	r3, .L295+32
-	ldrh	r0, [r3]
-	add	r0, r0, r0, lsl #1
-	ubfx	r0, r0, #2, #16
-	bl	GetFreeBlockMaxEraseCount
-	add	r3, r5, #64
-	mov	r2, r0
-	cmp	r0, r3
-	bcc	.L279
-	ldr	r3, .L295+36
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L279
-	ldr	r1, .L295+8
-	movs	r0, #0
-	mov	fp, #6
-	ldrh	r1, [r1]
-	str	r1, [sp, #20]
-	ldr	r1, .L295+40
-	ldr	r8, [r1]
-	ldr	r1, .L295+16
-	ldr	r7, [r1]
-	movw	r1, #65535
-	mov	ip, r1
-.L280:
-	ldrh	lr, [r3]
-	movw	r4, #65535
-	cmp	lr, r4
-	bne	.L283
-	mov	r4, ip
-.L282:
-	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L279
-	ldrh	r7, [r7, r4, lsl #1]
-	lsl	r8, r4, #1
-	cmp	r5, r7
-	bcs	.L284
-	bl	GetFreeBlockMinEraseCount
-	cmp	r5, r0
-	it	cc
-	strcc	r1, [r10]
-.L284:
-	cmp	r6, r7
-	bls	.L279
-	add	r3, r7, #128
-	cmp	r2, r3
-	ble	.L279
-	add	r3, r7, #256
-	ldr	r0, .L295+28
-	cmp	r6, r3
-	bhi	.L285
-	ldr	r1, [r0]
-	add	r3, r7, #768
-	cmp	r3, r1
-	bcs	.L279
-.L285:
-	ldr	r3, .L295+44
-	mov	r1, r4
-	str	r2, [sp, #8]
-	mov	r2, r6
-	str	r7, [sp, #4]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r8]
-	str	r3, [sp]
-	ldr	r3, [r0]
-	ldr	r0, .L295+48
-	bl	printf
-	ldr	r3, .L295+52
-	movs	r2, #1
-	str	r2, [r3]
-	b	.L278
-.L283:
-	adds	r0, r0, #1
-	ldr	r4, [sp, #20]
-	uxth	r0, r0
-	cmp	r0, r4
-	bhi	.L279
-	ldrh	r4, [r3, #4]
-	cbz	r4, .L281
-	ldr	r4, .L295+56
-	sub	r3, r3, r8
-	asrs	r3, r3, #1
-	muls	r3, r4, r3
-	uxth	r4, r3
-	ldrh	r3, [r7, r4, lsl #1]
-	cmp	r5, r3
-	bcs	.L282
-	cmp	r1, r3
-	itt	hi
-	movhi	r1, r3
-	movhi	ip, r4
-.L281:
-	mla	r3, fp, lr, r8
-	b	.L280
-.L296:
-	.align	2
-.L295:
-	.word	.LANCHOR77
-	.word	.LANCHOR74
-	.word	.LANCHOR5
-	.word	.LANCHOR72
-	.word	.LANCHOR43
-	.word	.LANCHOR73
-	.word	.LANCHOR14
-	.word	.LANCHOR76
-	.word	.LANCHOR48
-	.word	.LANCHOR41
-	.word	.LANCHOR40
-	.word	.LANCHOR42
-	.word	.LC72
-	.word	.LANCHOR87
-	.word	-1431655765
-	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
-	.section	.text.free_data_superblock,"ax",%progbits
-	.align	1
-	.global	free_data_superblock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	free_data_superblock, %function
-free_data_superblock:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r2, #65535
-	push	{r3, lr}
-	cmp	r0, r2
-	beq	.L298
-	ldr	r2, .L299
-	movs	r1, #0
-	ldr	r2, [r2]
-	strh	r1, [r2, r0, lsl #1]	@ movhi
-	bl	INSERT_FREE_LIST
-.L298:
-	movs	r0, #0
-	pop	{r3, pc}
-.L300:
-	.align	2
-.L299:
-	.word	.LANCHOR42
-	.size	free_data_superblock, .-free_data_superblock
-	.section	.text.get_new_active_ppa,"ax",%progbits
-	.align	1
-	.global	get_new_active_ppa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	get_new_active_ppa, %function
-get_new_active_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0]
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r3, #65535
-	mov	r4, r0
-	cmp	r2, r3
-	bne	.L302
-	movw	r2, #2740
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L302:
-	ldr	r5, .L315+8
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r2, r3
-	bne	.L303
-	movw	r2, #2741
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L303:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L304
-	movw	r2, #2742
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L304:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	movs	r3, #0
-	strb	r3, [r4, #10]
-	movw	r6, #65535
-	adds	r2, r2, #8
-	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L315+12
-	ldrh	r1, [r2]
-	mov	r2, r3
-.L305:
-	cmp	r0, r6
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L307
-	ldrh	r2, [r4, #4]
-	ldrh	r6, [r4, #2]
-	subs	r2, r2, #1
-	uxth	r2, r2
-	orr	r6, r6, r0, lsl #10
-	movw	r0, #65535
-	strh	r2, [r4, #4]	@ movhi
-.L309:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r1, r3
-	itttt	eq
-	ldrheq	r3, [r4, #2]
-	addeq	r3, r3, #1
-	strheq	r3, [r4, #2]	@ movhi
-	moveq	r3, #0
-	add	r7, r3, #8
-	ldrh	r7, [r4, r7, lsl #1]
-	cmp	r7, r0
-	beq	.L309
-	strb	r3, [r4, #6]
-	ldrh	r1, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r1, r3
-	bne	.L301
-	cbz	r2, .L301
-	movw	r2, #2763
-	ldr	r1, .L315
-	ldr	r0, .L315+4
-	bl	printf
-.L301:
-	mov	r0, r6
-	pop	{r3, r4, r5, r6, r7, pc}
-.L307:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, r1
-	strb	r3, [r4, #6]
-	itttt	eq
-	ldrheq	r3, [r4, #2]
-	strbeq	r2, [r4, #6]
-	addeq	r3, r3, #1
-	strheq	r3, [r4, #2]	@ movhi
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r0, [r4, r3, lsl #1]
-	b	.L305
-.L316:
-	.align	2
-.L315:
-	.word	.LANCHOR88
-	.word	.LC1
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.size	get_new_active_ppa, .-get_new_active_ppa
-	.section	.text.FtlGcBufInit,"ax",%progbits
-	.align	1
-	.global	FtlGcBufInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcBufInit, %function
-FtlGcBufInit:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #0
-	ldr	r1, .L322
-	mov	fp, #1
-	ldr	r2, .L322+4
-	ldr	r5, [r1]
-	ldr	r1, .L322+8
-	str	r3, [r2]
-	ldr	r2, .L322+12
-	mov	r0, r5
-	ldr	r1, [r1]
-	ldrh	r2, [r2]
-	str	r1, [sp, #4]
-	ldr	r1, .L322+16
-	ldrh	r1, [r1]
-	str	r1, [sp]
-	ldr	r1, .L322+20
-	ldr	r10, [r1]
-	ldr	r1, .L322+24
-	ldrh	r7, [r1]
-	ldr	r1, .L322+28
-	ldr	r4, [r1]
-	movs	r1, #12
-	mla	r1, r2, r1, r1
-	adds	r4, r4, #8
-	add	r8, r5, r1
-	mov	r1, r3
-.L318:
-	adds	r0, r0, #12
-	ldr	r6, [sp]
-	cmp	r0, r8
-	add	ip, r3, r7
-	add	r4, r4, #20
-	add	lr, r1, r6
-	bne	.L319
-	ldr	r3, .L322+32
-	mov	lr, #12
-	mov	r8, #0
-	ldr	r0, [r3]
-	ldr	r3, .L322+8
-	ldr	r4, [r3]
-	ldr	r3, .L322+20
-	ldr	ip, [r3]
-.L320:
-	cmp	r2, r0
-	bcc	.L321
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L319:
-	bic	r1, r1, #3
-	bic	r3, r3, #3
-	mov	r6, r1
-	ldr	r1, [sp, #4]
-	add	r3, r3, r10
-	str	fp, [r0, #-4]
-	str	r3, [r0, #-8]
-	add	r6, r6, r1
-	mov	r1, lr
-	str	r6, [r0, #-12]
-	str	r3, [r4, #-16]
-	mov	r3, ip
-	str	r6, [r4, #-20]
-	b	.L318
-.L321:
-	ldr	r3, [sp]
-	mul	r10, lr, r2
-	muls	r3, r2, r3
-	add	r1, r5, r10
-	str	r8, [r1, #8]
-	bic	r3, r3, #3
-	add	r3, r3, r4
-	str	r3, [r5, r10]
-	mul	r3, r2, r7
-	adds	r2, r2, #1
-	uxth	r2, r2
-	bic	r3, r3, #3
-	add	r3, r3, ip
-	str	r3, [r1, #4]
-	b	.L320
-.L323:
-	.align	2
-.L322:
-	.word	.LANCHOR90
-	.word	.LANCHOR89
-	.word	.LANCHOR91
-	.word	.LANCHOR3
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.size	FtlGcBufInit, .-FtlGcBufInit
-	.section	.text.FtlGcBufFree,"ax",%progbits
-	.align	1
-	.global	FtlGcBufFree
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcBufFree, %function
-FtlGcBufFree:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L331
-	mov	ip, #12
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	mov	fp, #20
-	mov	lr, r4
-	ldr	r7, [r3]
-	ldr	r3, .L331+4
-	ldr	r5, [r3]
-.L325:
-	uxth	r3, r4
-	cmp	r1, r3
-	bls	.L324
-	mla	r8, fp, r3, r0
-	movs	r2, #0
-.L326:
-	uxth	r3, r2
-	cmp	r7, r3
-	bls	.L327
-	mul	r3, ip, r3
-	ldr	r6, [r8, #8]
-	adds	r2, r2, #1
-	add	r10, r5, r3
-	ldr	r3, [r5, r3]
-	cmp	r3, r6
-	bne	.L326
-	str	lr, [r10, #8]
-.L327:
-	adds	r4, r4, #1
-	b	.L325
-.L324:
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L332:
-	.align	2
-.L331:
-	.word	.LANCHOR94
-	.word	.LANCHOR90
-	.size	FtlGcBufFree, .-FtlGcBufFree
-	.section	.text.FtlGcBufAlloc,"ax",%progbits
-	.align	1
-	.global	FtlGcBufAlloc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcBufAlloc, %function
-FtlGcBufAlloc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L340
-	movs	r2, #0
-	push	{r4, r5, r6, r7, r8, r10, lr}
-	mov	ip, #12
-	movs	r7, #1
-	mov	lr, #20
-	ldr	r4, [r3]
-	ldr	r3, .L340+4
-	ldr	r5, [r3]
-.L334:
-	uxth	r8, r2
-	cmp	r1, r8
-	bhi	.L338
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L338:
-	mov	r10, #0
-.L335:
-	uxth	r3, r10
-	cmp	r4, r3
-	bls	.L336
-	mla	r3, ip, r3, r5
-	add	r10, r10, #1
-	ldr	r6, [r3, #8]
-	cmp	r6, #0
-	bne	.L335
-	mla	r8, lr, r8, r0
-	str	r7, [r3, #8]
-	ldr	r6, [r3]
-	ldr	r3, [r3, #4]
-	str	r6, [r8, #8]
-	str	r3, [r8, #12]
-.L336:
-	adds	r2, r2, #1
-	b	.L334
-.L341:
-	.align	2
-.L340:
-	.word	.LANCHOR94
-	.word	.LANCHOR90
-	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
-	.section	.text.IsBlkInGcList,"ax",%progbits
-	.align	1
-	.global	IsBlkInGcList
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	IsBlkInGcList, %function
-IsBlkInGcList:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L347
-	ldr	r2, .L347+4
-	ldr	r3, [r3]
-	ldrh	r2, [r2]
-	add	r2, r3, r2, lsl #1
-.L343:
-	cmp	r3, r2
-	bne	.L345
-	movs	r0, #0
-	bx	lr
-.L345:
-	ldrh	r1, [r3], #2
-	cmp	r1, r0
-	bne	.L343
-	movs	r0, #1
-	bx	lr
-.L348:
-	.align	2
-.L347:
-	.word	.LANCHOR95
-	.word	.LANCHOR96
-	.size	IsBlkInGcList, .-IsBlkInGcList
-	.section	.text.FtlGcUpdatePage,"ax",%progbits
-	.align	1
-	.global	FtlGcUpdatePage
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcUpdatePage, %function
-FtlGcUpdatePage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r4, .L353
-	ubfx	r0, r0, #10, #16
-	mov	r6, r1
-	mov	r7, r2
-	bl	P2V_block_in_plane
-	ldr	r3, .L353+4
-	ldrh	r1, [r4]
-	ldr	r2, [r3]
-	movs	r3, #0
-.L350:
-	uxth	ip, r3
-	cmp	ip, r1
-	bcc	.L352
-	bne	.L351
-	strh	r0, [r2, ip, lsl #1]	@ movhi
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	b	.L351
-.L352:
-	adds	r3, r3, #1
-	add	ip, r2, r3, lsl #1
-	ldrh	ip, [ip, #-2]
-	cmp	ip, r0
-	bne	.L350
-.L351:
-	ldr	r2, .L353+8
-	movs	r0, #12
-	ldr	r1, .L353+12
-	ldrh	r3, [r2]
-	ldr	r1, [r1]
-	muls	r0, r3, r0
-	adds	r3, r3, #1
-	adds	r4, r1, r0
-	str	r6, [r4, #4]
-	str	r7, [r4, #8]
-	str	r5, [r1, r0]
-	strh	r3, [r2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L354:
-	.align	2
-.L353:
-	.word	.LANCHOR96
-	.word	.LANCHOR95
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
-	.align	1
-	.global	FtlGcRefreshBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r1, r0
-	mov	r4, r0
-	ldr	r0, .L358
-	bl	printf
-	ldr	r0, .L358+4
-	ldrh	r5, [r0]
-	cmp	r4, r5
-	beq	.L356
-	ldr	r3, .L358+8
-	ldrh	r1, [r3]
-	cmp	r4, r1
-	beq	.L356
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L357
-	strh	r4, [r0]	@ movhi
-.L356:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L357:
-	cmp	r1, r2
-	it	eq
-	strheq	r4, [r3]	@ movhi
-	b	.L356
-.L359:
-	.align	2
-.L358:
-	.word	.LC73
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcMarkBadPhyBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcMarkBadPhyBlk, %function
-FtlGcMarkBadPhyBlk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	ldr	r4, .L364
-	bl	P2V_block_in_plane
-	mov	r2, r5
-	mov	r6, r0
-	ldrh	r1, [r4]
-	ldr	r0, .L364+4
-	bl	printf
-	mov	r0, r6
-	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4]
-	movs	r2, #0
-	ldr	r0, .L364+8
-.L361:
-	uxth	r1, r2
-	cmp	r3, r1
-	bhi	.L363
-	cmp	r3, #15
-	itttt	ls
-	addls	r2, r3, #1
-	strhls	r2, [r4]	@ movhi
-	ldrls	r2, .L364+8
-	strhls	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L362
-.L363:
-	adds	r2, r2, #1
-	add	r1, r0, r2, lsl #1
-	ldrh	r1, [r1, #-2]
-	cmp	r1, r5
-	bne	.L361
-.L362:
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L365:
-	.align	2
-.L364:
-	.word	.LANCHOR101
-	.word	.LC74
-	.word	.LANCHOR102
-	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
-	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcReFreshBadBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcReFreshBadBlk, %function
-FtlGcReFreshBadBlk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L372
-	push	{r4, lr}
-	ldrh	r3, [r3]
-	cbz	r3, .L367
-	ldr	r2, .L372+4
-	ldrh	r1, [r2]
-	movw	r2, #65535
-	cmp	r1, r2
-	bne	.L367
-	ldr	r4, .L372+8
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	itt	cs
-	movcs	r3, #0
-	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L372+12
-	ldrh	r2, [r4]
-	ldrh	r0, [r3, r2, lsl #1]
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-.L367:
-	movs	r0, #0
-	pop	{r4, pc}
-.L373:
-	.align	2
-.L372:
-	.word	.LANCHOR101
-	.word	.LANCHOR99
-	.word	.LANCHOR103
-	.word	.LANCHOR102
-	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_malloc,"ax",%progbits
-	.align	1
-	.global	ftl_malloc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.ftl_free,"ax",%progbits
-	.align	1
-	.global	ftl_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.rknand_print_hex,"ax",%progbits
-	.align	1
-	.global	rknand_print_hex
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_print_hex, %function
-rknand_print_hex:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	mov	fp, r0
-	mov	r7, r1
-	mov	r8, r2
-	mov	r10, r3
-	mov	r5, r6
-	mov	r4, r6
-.L377:
-	cmp	r4, r10
-	bcc	.L383
-	ldr	r0, .L386
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	b	printf
-.L383:
-	cbnz	r5, .L378
-	mov	r2, r6
-	mov	r1, fp
-	ldr	r0, .L386+4
-	bl	printf
-.L378:
-	cmp	r8, #4
-	bne	.L379
-	ldr	r1, [r7, r4, lsl #2]
-.L385:
-	ldr	r0, .L386+8
-.L384:
-	adds	r5, r5, #1
-	bl	printf
-	cmp	r5, #15
-	bls	.L382
-	movs	r5, #0
-	ldr	r0, .L386
-	bl	printf
-.L382:
-	adds	r4, r4, #1
-	add	r6, r6, r8
-	b	.L377
-.L379:
-	cmp	r8, #2
-	bne	.L381
-	ldrh	r1, [r7, r4, lsl #1]
-	b	.L385
-.L381:
-	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L386+12
-	b	.L384
-.L387:
-	.align	2
-.L386:
-	.word	.LC78
-	.word	.LC75
-	.word	.LC76
-	.word	.LC77
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashEraseBlocks,"ax",%progbits
-	.align	1
-	.global	FlashEraseBlocks
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r6, .L404
-	add	r8, r0, #4
-	movs	r7, #0
-	ldr	fp, .L404+20
-	ldrh	r10, [r6, #12]
-	str	r2, [sp]
-	lsl	r3, r10, #3
-	str	r3, [sp, #4]
-.L389:
-	ldr	r3, [sp]
-	cmp	r7, r3
-	beq	.L403
-	add	r2, sp, #8
-	add	r1, sp, #12
-	ldr	r0, [r8]
-	bl	l2p_addr_tran.isra.0
-	ldr	r5, [sp, #8]
-	cbnz	r5, .L390
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2
-	bls	.L390
-	ldr	r6, .L404+4
-	ldr	r7, .L404+8
-.L391:
-	ldr	r3, [sp]
-	adds	r4, r4, #20
-	cmp	r5, r3
-	bne	.L392
-.L403:
+	movw	r2, #65535
+	push	{r3, lr}
+	cmp	r0, r2
+	beq	.L237
+	ldr	r2, .L238
+	movs	r1, #0
+	ldr	r2, [r2]
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	bl	INSERT_FREE_LIST
+.L237:
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L392:
-	mov	r3, #-1
-	ldr	r2, [sp, #12]
-	str	r3, [r4, #-20]
-	mov	r1, r6
-	mov	r0, r7
-	adds	r5, r5, #1
-	bl	printf
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r4, #-12]
-	ldr	r0, .L404+12
-	bl	rknand_print_hex
-	movs	r3, #4
-	ldr	r1, [r4, #-8]
-	mov	r2, r3
-	ldr	r0, .L404+16
-	bl	rknand_print_hex
-	b	.L391
-.L390:
-	ldr	r2, [fp, #4]
-	uxtb	r0, r5
-	ldr	r1, [sp, #12]
-	blx	r2
-	cbnz	r0, .L393
-	str	r0, [r8, #-4]
-.L394:
-	ldrh	r2, [r6, #14]
-	cmp	r2, #4
-	bne	.L396
-	ldr	r1, [sp, #12]
-	ldr	r2, [fp, #4]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	add	r1, r1, r10
-	blx	r2
-	cbz	r0, .L396
-	mov	r2, #-1
-	str	r2, [r8, #-4]
-.L396:
-	adds	r7, r7, #1
-	add	r8, r8, #20
-	b	.L389
-.L393:
-	mov	r2, #-1
-	str	r2, [r8, #-4]
-	b	.L394
-.L405:
-	.align	2
-.L404:
-	.word	.LANCHOR0
-	.word	.LANCHOR104
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
-	.word	.LANCHOR105
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueIn
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	cmp	r3, r2
-	bhi	.L406
-	ldr	r4, .L415
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1024
-	beq	.L406
-	cbz	r1, .L408
-	bl	P2V_block_in_plane
-	ldr	r3, .L415+4
-	mov	r6, r0
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, [r3]
-	lsls	r3, r5, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L415+8
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L415+12
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L408:
-	ldrh	r3, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #4]
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	strh	r5, [r4, r2, lsl #1]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-.L406:
-	pop	{r4, r5, r6, pc}
-.L416:
-	.align	2
-.L415:
-	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR43
-	.word	.LANCHOR75
-	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L422
-	ldrh	r2, [r4, #6]
-	cbz	r2, .L421
-	ldrh	r3, [r4, #2]
-	subs	r2, r2, #1
-	strh	r2, [r4, #6]	@ movhi
-	movs	r2, #1
-	adds	r1, r3, #4
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	ldrh	r5, [r4, r1, lsl #1]
-	strh	r3, [r4, #2]	@ movhi
-	mov	r1, r2
-	ldr	r3, .L422+4
-	ldr	r0, [r3]
-	lsls	r3, r5, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r2, .L422+8
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L418:
-	subs	r3, r5, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	cmp	r3, r2
-	bls	.L419
-	ldrh	r2, [r4, #6]
-	mov	r1, r5
-	ldr	r0, .L422+12
-	bl	printf
-.L420:
-	b	.L420
-.L421:
-	movw	r5, #65535
-	b	.L418
-.L419:
-	mov	r0, r5
-	pop	{r3, r4, r5, pc}
-.L423:
+	pop	{r3, pc}
+.L239:
 	.align	2
-.L422:
-	.word	.LANCHOR38
-	.word	.LANCHOR106
-	.word	.LANCHOR75
-	.word	.LC82
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+.L238:
+	.word	.LANCHOR42
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_alloc_new_blk
+	.global	get_new_active_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
+	ldrh	r2, [r0]
 	push	{r3, r4, r5, r6, r7, lr}
+	movw	r3, #65535
 	mov	r4, r0
-	movs	r3, #0
-.L425:
-	uxth	r5, r3
-	cmp	r5, r1
-	bcs	.L428
-	mov	r7, r2
-	adds	r3, r3, #1
-	ldrh	r6, [r7]
-	adds	r2, r2, #2
-	cmp	r6, #0
-	bne	.L425
-	bl	FtlFreeSysBlkQueueOut
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	mov	r1, r0
-	strh	r0, [r7]	@ movhi
-	cmp	r3, r2
-	bls	.L426
-	ldr	r3, .L432
-	ldr	r0, .L432+4
-	ldrh	r2, [r3, #6]
+	cmp	r2, r3
+	bne	.L241
+	movw	r2, #2786
+	ldr	r1, .L254
+	ldr	r0, .L254+4
 	bl	printf
-.L427:
-	b	.L427
-.L426:
-	ldr	r3, [r4, #28]
-	strh	r6, [r4, #2]	@ movhi
-	strh	r5, [r4]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	ldrh	r3, [r4, #8]
+.L241:
+	ldr	r5, .L254+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L242
+	movw	r2, #2787
+	ldr	r1, .L254
+	ldr	r0, .L254+4
+	bl	printf
+.L242:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L243
+	movw	r2, #2788
+	ldr	r1, .L254
+	ldr	r0, .L254+4
+	bl	printf
+.L243:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	movs	r3, #0
+	strb	r3, [r4, #10]
+	movw	r6, #65535
+	adds	r2, r2, #8
+	ldrh	r0, [r4, r2, lsl #1]
+	ldr	r2, .L254+12
+	ldrh	r1, [r2]
+	mov	r2, r3
+.L244:
+	cmp	r0, r6
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	beq	.L246
+	ldrh	r2, [r4, #4]
+	ldrh	r6, [r4, #2]
+	subs	r2, r2, #1
+	uxth	r2, r2
+	orr	r6, r6, r0, lsl #10
+	movw	r0, #65535
+	strh	r2, [r4, #4]	@ movhi
+.L248:
 	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L428:
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bhi	.L430
-	movw	r2, #578
-	ldr	r1, .L432+8
-	ldr	r0, .L432+12
+	uxtb	r3, r3
+	cmp	r1, r3
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	add	r7, r3, #8
+	ldrh	r7, [r4, r7, lsl #1]
+	cmp	r7, r0
+	beq	.L248
+	strb	r3, [r4, #6]
+	ldrh	r1, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r1, r3
+	bne	.L240
+	cbz	r2, .L240
+	movw	r2, #2809
+	ldr	r1, .L254
+	ldr	r0, .L254+4
 	bl	printf
-.L430:
-	movs	r0, #0
+.L240:
+	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L433:
+.L246:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r1
+	strb	r3, [r4, #6]
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	strbeq	r2, [r4, #6]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+	b	.L244
+.L255:
 	.align	2
-.L432:
-	.word	.LANCHOR38
-	.word	.LC83
-	.word	.LANCHOR107
+.L254:
+	.word	.LANCHOR61
 	.word	.LC1
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.section	.text.ftl_memset,"ax",%progbits
-	.align	1
-	.global	ftl_memset
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.FtlMemInit,"ax",%progbits
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	FtlGcBufInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L536
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r2, .L536+4
-	mov	r10, #12
-	str	r1, [r3]
-	ldr	r3, .L536+8
-	ldr	r4, .L536+12
-	ldr	r8, .L536+292
-	str	r1, [r3]
-	ldr	r3, .L536+16
-	ldrh	r0, [r4]
-	str	r1, [sp, #12]
-	str	r1, [r3]
-	ldr	r3, .L536+20
-	lsls	r0, r0, #1
-	ldr	r6, .L536+24
-	ldr	fp, .L536+296
-	str	r1, [r3]
-	ldr	r3, .L536+28
-	ldr	r7, .L536+32
-	str	r1, [r3]
-	ldr	r3, .L536+36
-	str	r1, [r3]
-	ldr	r3, .L536+40
-	str	r1, [r3]
-	ldr	r3, .L536+44
-	str	r1, [r3]
-	ldr	r3, .L536+48
-	str	r1, [r3]
-	ldr	r3, .L536+52
-	str	r1, [r3]
-	ldr	r3, .L536+56
-	str	r1, [r3]
-	ldr	r3, .L536+60
-	str	r1, [r3]
-	ldr	r3, .L536+64
-	str	r1, [r3]
-	ldr	r3, .L536+68
-	str	r1, [r3]
-	ldr	r3, .L536+72
-	str	r1, [r3]
-	movw	r3, #65535
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #0
+	ldr	r1, .L261
+	mov	fp, #1
+	ldr	r2, .L261+4
+	ldr	r5, [r1]
+	ldr	r1, .L261+8
 	str	r3, [r2]
-	ldr	r2, .L536+76
-	str	r1, [r2]
-	ldr	r2, .L536+80
-	str	r1, [r2]
-	ldr	r2, .L536+84
-	str	r1, [r2]
-	ldr	r2, .L536+88
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L536+92
-	strh	r3, [r2]	@ movhi
-	movs	r2, #32
-	ldr	r3, .L536+96
-	strh	r2, [r3]	@ movhi
-	movs	r2, #128
-	ldr	r3, .L536+100
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L536+104
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L536+108
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L536+112
-	strh	r1, [r3]	@ movhi
-	bl	ftl_malloc
-	str	r0, [r8]
-	ldrh	r0, [r4]
-	movs	r4, #20
-	mul	r0, r10, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+116
-	str	r0, [r3]
-	ldrh	r3, [r6]
-	muls	r4, r3, r4
-	lsls	r5, r4, #2
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L536+120
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+124
-	str	r0, [r3]
-	mov	r0, r5
-	bl	ftl_malloc
-	str	r0, [fp]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+128
-	ldr	r5, .L536+132
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+136
-	str	r0, [r3]
-	ldrh	r0, [r6]
-	ldr	r3, .L536+140
-	lsls	r0, r0, #1
-	ldrh	r4, [r3]
-	adds	r0, r0, #1
-	str	r0, [r5]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+144
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+148
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	str	r0, [r7]
-	ldr	r0, [r5]
-	muls	r0, r4, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+152
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+156
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+160
-	str	r0, [r3]
-	ldr	r0, [r5]
-	mul	r0, r10, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+164
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L536+168
-	str	r0, [r3]
-	mov	r0, r4
-	ldr	r4, .L536+172
-	bl	ftl_malloc
-	str	r0, [r4]
-	ldr	r0, .L536+176
-	ldr	r4, .L536+180
-	ldrh	r0, [r0]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	str	r0, [r4]
-	ldr	r4, .L536+184
-	ldrh	r2, [r6]
-	ldr	r6, .L536+152
-	ldrh	r0, [r4]
-	muls	r2, r0, r2
-	mov	r0, r2
-	str	r2, [sp, #4]
-	bl	ftl_malloc
-	ldr	r2, [sp, #4]
-	ldr	r3, .L536+188
-	str	r0, [r3]
-	lsls	r0, r2, #2
-	bl	ftl_malloc
-	ldr	r2, .L536+192
-	str	r0, [r2]
-	ldrh	r2, [r4]
-	ldr	r0, [r5]
-	ldr	r4, .L536+196
-	ldr	r5, .L536+200
-	muls	r0, r2, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+204
-	str	r0, [r3]
-	ldrh	r0, [r4]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r5]	@ movhi
-	bl	ftl_malloc
-	ldr	r2, .L536+208
-	str	r0, [r2]
-	ldrh	r2, [r5]
-	ldr	r0, .L536+212
-	addw	r2, r2, #547
-	lsrs	r2, r2, #9
-	and	r0, r0, r2, lsl #9
-	strh	r2, [r5]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L536+216
-	str	r0, [r3]
-	adds	r0, r0, #32
-	ldr	r3, .L536+220
-	str	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r5, r3, #1
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r2, .L536+224
-	str	r0, [r2]
+	ldr	r2, .L261+12
 	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r3, .L536+228
-	str	r0, [r3]
-	ldr	r3, .L536+232
-	ldr	r2, [r3]
-	str	r3, [sp, #8]
-	lsls	r5, r2, #1
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r2, .L536+236
-	str	r0, [r2]
-	mov	r0, r5
-	bl	ftl_malloc
-	ldr	r2, .L536+240
-	ldr	r5, .L536+244
-	str	r0, [r2]
-	ldrh	r0, [r4]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-	ldr	r2, .L536+248
-	str	r0, [r2]
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r2, .L536+252
-	str	r0, [r2]
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r2, .L536+256
-	str	r0, [r2]
-	ldrh	r0, [r5]
-	ldr	r5, .L536+116
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L536+260
-	str	r0, [r2]
-	ldr	r2, .L536+264
-	ldrh	r0, [r2]
-	str	r2, [sp, #4]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, [sp, #4]
-	ldr	ip, .L536+300
-	ldr	r1, [sp, #12]
+	ldr	r1, [r1]
 	ldrh	r2, [r2]
-	str	r0, [ip]
-	lsls	r2, r2, #2
-	bl	ftl_memset
-	ldr	r2, .L536+268
-	ldrh	r0, [r2]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L536+272
-	ldr	r3, [sp, #8]
-	str	r0, [r2]
-	ldr	r0, [r3]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L536+276
-	str	r0, [r3]
-	ldr	r3, .L536+280
-	ldrh	r0, [r3]
-	str	r3, [sp, #4]
-	mul	r0, r10, r0
-	ldr	r10, .L536+304
-	bl	ftl_malloc
-	ldr	r2, .L536+284
-	ldr	r3, [sp, #4]
-	str	r0, [r2]
-	ldr	r2, .L536+140
-	ldrh	r3, [r3]
-	ldrh	r0, [r2]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L536+288
-	str	r0, [r3]
-	movs	r0, #6
-	ldrh	r3, [r4]
-	b	.L537
-.L538:
+	str	r1, [sp, #4]
+	ldr	r1, .L261+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	ldr	r1, .L261+20
+	ldr	r10, [r1]
+	ldr	r1, .L261+24
+	ldrh	r7, [r1]
+	ldr	r1, .L261+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	mov	r1, r3
+.L257:
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #20
+	add	lr, r1, r6
+	bne	.L258
+	ldr	r3, .L261+32
+	mov	lr, #12
+	mov	r8, #0
+	ldr	r0, [r3]
+	ldr	r3, .L261+8
+	ldr	r4, [r3]
+	ldr	r3, .L261+20
+	ldr	ip, [r3]
+.L259:
+	cmp	r2, r0
+	bcc	.L260
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L258:
+	bic	r1, r1, #3
+	bic	r3, r3, #3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
+	add	r3, r3, r10
+	str	fp, [r0, #-4]
+	str	r3, [r0, #-8]
+	add	r6, r6, r1
+	mov	r1, lr
+	str	r6, [r0, #-12]
+	str	r3, [r4, #-16]
+	mov	r3, ip
+	str	r6, [r4, #-20]
+	b	.L257
+.L260:
+	ldr	r3, [sp]
+	mul	r10, lr, r2
+	muls	r3, r2, r3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	mul	r3, r2, r7
+	adds	r2, r2, #1
+	uxth	r2, r2
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L259
+.L262:
 	.align	2
-.L536:
-	.word	.LANCHOR70
-	.word	.LANCHOR109
-	.word	.LANCHOR71
-	.word	.LANCHOR21
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR3
+.L261:
 	.word	.LANCHOR63
-	.word	.LANCHOR117
-	.word	.LANCHOR65
-	.word	.LANCHOR66
 	.word	.LANCHOR62
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR75
-	.word	.LANCHOR76
-	.word	.LANCHOR77
-	.word	.LANCHOR108
-	.word	.LANCHOR87
-	.word	.LANCHOR110
-	.word	.LANCHOR84
-	.word	.LANCHOR111
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR85
-	.word	.LANCHOR101
-	.word	.LANCHOR103
-	.word	.LANCHOR98
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR106
-	.word	.LANCHOR94
-	.word	.LANCHOR93
+	.word	.LANCHOR64
+	.word	.LANCHOR3
 	.word	.LANCHOR23
-	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LANCHOR91
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR90
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR12
-	.word	.LANCHOR122
+	.word	.LANCHOR65
 	.word	.LANCHOR24
-	.word	.LANCHOR123
-	.word	.LANCHOR124
-	.word	.LANCHOR6
-	.word	.LANCHOR125
-	.word	.LANCHOR92
-	.word	.LANCHOR126
-	.word	33553920
-	.word	.LANCHOR127
-	.word	.LANCHOR43
-	.word	.LANCHOR128
-	.word	.LANCHOR42
-	.word	.LANCHOR30
-	.word	.LANCHOR129
-	.word	.LANCHOR130
-	.word	.LANCHOR27
-	.word	.LANCHOR1
-	.word	.LANCHOR36
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.word	.LANCHOR28
-	.word	.LANCHOR32
-	.word	.LANCHOR134
-	.word	.LANCHOR135
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR136
-	.word	.LANCHOR95
-	.word	.LANCHOR114
-	.word	.LANCHOR133
-	.word	.LANCHOR10
-.L537:
-	ldr	r4, .L539
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
+	.align	1
+	.global	FtlGcBufFree
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L270
+	mov	ip, #12
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	mov	fp, #20
+	mov	lr, r4
+	ldr	r7, [r3]
+	ldr	r3, .L270+4
+	ldr	r5, [r3]
+.L264:
+	uxth	r3, r4
+	cmp	r1, r3
+	bls	.L263
+	mla	r8, fp, r3, r0
+	movs	r2, #0
+.L265:
+	uxth	r3, r2
+	cmp	r7, r3
+	bls	.L266
+	mul	r3, ip, r3
+	ldr	r6, [r8, #8]
+	adds	r2, r2, #1
+	add	r10, r5, r3
+	ldr	r3, [r5, r3]
+	cmp	r3, r6
+	bne	.L265
+	str	lr, [r10, #8]
+.L266:
+	adds	r4, r4, #1
+	b	.L264
+.L263:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L271:
+	.align	2
+.L270:
+	.word	.LANCHOR67
+	.word	.LANCHOR63
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
+	.align	1
+	.global	FtlGcBufAlloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L279
+	movs	r2, #0
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	ip, #12
+	movs	r7, #1
+	mov	lr, #20
+	ldr	r4, [r3]
+	ldr	r3, .L279+4
+	ldr	r5, [r3]
+.L273:
+	uxth	r8, r2
+	cmp	r1, r8
+	bhi	.L277
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L277:
+	mov	r10, #0
+.L274:
+	uxth	r3, r10
+	cmp	r4, r3
+	bls	.L275
+	mla	r3, ip, r3, r5
+	add	r10, r10, #1
+	ldr	r6, [r3, #8]
+	cmp	r6, #0
+	bne	.L274
+	mla	r8, lr, r8, r0
+	str	r7, [r3, #8]
+	ldr	r6, [r3]
+	ldr	r3, [r3, #4]
+	str	r6, [r8, #8]
+	str	r3, [r8, #12]
+.L275:
+	adds	r2, r2, #1
+	b	.L273
+.L280:
+	.align	2
+.L279:
+	.word	.LANCHOR67
+	.word	.LANCHOR63
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
+	.align	1
+	.global	IsBlkInGcList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L286
+	ldr	r2, .L286+4
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L282:
+	cmp	r3, r2
+	bne	.L284
+	movs	r0, #0
+	bx	lr
+.L284:
+	ldrh	r1, [r3], #2
+	cmp	r1, r0
+	bne	.L282
+	movs	r0, #1
+	bx	lr
+.L287:
+	.align	2
+.L286:
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
+	.align	1
+	.global	FtlGcUpdatePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r4, .L292
+	ubfx	r0, r0, #10, #16
+	mov	r6, r1
+	mov	r7, r2
+	bl	P2V_block_in_plane
+	ldr	r3, .L292+4
+	ldrh	r1, [r4]
+	ldr	r2, [r3]
+	movs	r3, #0
+.L289:
+	uxth	ip, r3
+	cmp	ip, r1
+	bcc	.L291
+	bne	.L290
+	strh	r0, [r2, ip, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L290
+.L291:
+	adds	r3, r3, #1
+	add	ip, r2, r3, lsl #1
+	ldrh	ip, [ip, #-2]
+	cmp	ip, r0
+	bne	.L289
+.L290:
+	ldr	r2, .L292+8
+	movs	r0, #12
+	ldr	r1, .L292+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
 	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L539+4
-	str	r0, [r3]
-	ldr	r3, .L539+8
-	ldrh	r0, [r3]
-	ldrh	r3, [r10]
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
+	adds	r3, r3, #1
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	str	r7, [r4, #8]
+	str	r5, [r1, r0]
+	strh	r3, [r2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L293:
+	.align	2
+.L292:
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L297
+	ldrh	r5, [r4]
+	cmp	r5, r0
+	beq	.L295
+	ldr	r3, .L297+4
+	ldrh	r1, [r3]
+	cmp	r0, r1
+	beq	.L295
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L296
 	strh	r0, [r4]	@ movhi
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L539+12
-	str	r5, [sp, #8]
-	ldr	r5, .L539+16
-	mov	r1, r2
-	ldrh	r3, [r10]
-	str	r0, [r1, #28]!
-	ldrh	r0, [r4]
-	str	r5, [sp, #12]
-	ldr	r5, .L539+20
-	ldr	r10, .L539+116
-	lsls	r0, r0, #2
-	ldr	lr, .L539+120
-	ldr	ip, .L539+124
-	str	r5, [sp, #16]
-	mov	r4, r0
-	ldr	r5, .L539+24
-	str	r3, [sp, #4]
-	movs	r3, #1
-	str	r5, [sp, #20]
-.L436:
-	ldr	r5, [sp, #4]
-	cmp	r3, r5
-	bcc	.L437
-	add	r3, r2, r3, lsl #2
-	ldr	r1, .L539+28
+.L295:
 	movs	r0, #0
-	adds	r3, r3, #24
-.L438:
-	cmp	r1, r3
-	bne	.L439
-	ldr	r3, .L539+32
-	ldr	r3, [r3]
-	cbnz	r3, .L440
-.L442:
-	ldr	r1, .L539+36
-	ldr	r0, .L539+40
-	bl	printf
-	mov	r0, #-1
-.L435:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L437:
-	ldr	r5, [r2, #28]
-	adds	r3, r3, #1
-	add	r5, r5, r4
-	add	r4, r4, r0
-	str	r5, [r1, #4]!
-	b	.L436
-.L439:
-	str	r0, [r3, #4]!
-	b	.L438
-.L440:
-	ldr	r3, .L539+44
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+48
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+52
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+56
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+60
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+4
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r2, #28]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+64
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r8]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #8]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #12]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [fp]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r10]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #20]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [sp, #16]
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [lr]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [ip]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r7]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, [r6]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+68
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+72
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+76
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+80
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+84
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+88
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+92
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+96
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+100
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+104
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+108
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
-	ldr	r3, .L539+112
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L442
+	pop	{r4, r5, pc}
+.L296:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3]	@ movhi
+	b	.L295
+.L298:
+	.align	2
+.L297:
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcMarkBadPhyBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldr	r2, .L303
+	movs	r1, #0
+	ldr	r5, .L303+4
+	ldrh	r3, [r2]
+.L300:
+	uxth	r0, r1
+	cmp	r3, r0
+	bhi	.L302
+	cmp	r3, #15
+	itttt	ls
+	addls	r1, r3, #1
+	strhls	r1, [r2]	@ movhi
+	ldrls	r2, .L303+4
+	strhls	r4, [r2, r3, lsl #1]	@ movhi
+	b	.L301
+.L302:
+	adds	r1, r1, #1
+	add	r0, r5, r1, lsl #1
+	ldrh	r0, [r0, #-2]
+	cmp	r0, r4
+	bne	.L300
+.L301:
 	movs	r0, #0
-	b	.L435
-.L540:
+	pop	{r3, r4, r5, pc}
+.L304:
 	.align	2
-.L539:
-	.word	.LANCHOR137
-	.word	.LANCHOR40
-	.word	.LANCHOR17
-	.word	.LANCHOR37
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR93
-	.word	.LANCHOR37+56
-	.word	.LANCHOR129
-	.word	.LANCHOR138
-	.word	.LC84
-	.word	.LANCHOR130
-	.word	.LANCHOR134
-	.word	.LANCHOR135
-	.word	.LANCHOR55
-	.word	.LANCHOR136
-	.word	.LANCHOR42
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR90
-	.word	.LANCHOR123
-	.word	.LANCHOR124
-	.word	.LANCHOR92
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR36
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.word	.LANCHOR133
-	.word	.LANCHOR106
-	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+.L303:
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcReFreshBadBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L311
+	push	{r4, lr}
+	ldrh	r3, [r3]
+	cbz	r3, .L306
+	ldr	r2, .L311+4
+	ldrh	r1, [r2]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L306
+	ldr	r4, .L311+8
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	itt	cs
+	movcs	r3, #0
+	strhcs	r3, [r4]	@ movhi
+	ldr	r3, .L311+12
+	ldrh	r2, [r4]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+.L306:
+	movs	r0, #0
+	pop	{r4, pc}
+.L312:
+	.align	2
+.L311:
+	.word	.LANCHOR74
+	.word	.LANCHOR72
+	.word	.LANCHOR76
+	.word	.LANCHOR75
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	FtlBbt2Bitmap
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
+	.type	ftl_malloc, %function
+ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L547
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r5, r0
-	ldr	r7, .L547+4
-	mov	r6, r1
-	subs	r4, r5, #2
-	addw	r5, r5, #1022
-	ldrh	r2, [r3]
+	@ link register save eliminated.
 	movs	r1, #0
-	ldr	r8, .L547+12
-	mov	r0, r6
-	lsls	r2, r2, #2
-	bl	ftl_memset
-.L544:
-	ldrh	r3, [r4, #2]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L541
-	ldrh	r2, [r7]
-	cmp	r2, r3
-	bhi	.L543
-	movs	r2, #74
-	mov	r1, r8
-	ldr	r0, .L547+8
-	bl	printf
-.L543:
-	ldrh	r3, [r4, #2]!
-	movs	r2, #1
-	cmp	r5, r4
-	lsr	r1, r3, #5
-	and	r3, r3, #31
-	lsl	r3, r2, r3
-	ldr	r2, [r6, r1, lsl #2]
-	orr	r2, r2, r3
-	str	r2, [r6, r1, lsl #2]
-	bne	.L544
-.L541:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L548:
-	.align	2
-.L547:
-	.word	.LANCHOR137
-	.word	.LANCHOR17
-	.word	.LC1
-	.word	.LANCHOR139
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	FtlBbtMemInit
+	.global	ftl_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
+	.type	ftl_free, %function
+ftl_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L550
-	movw	r3, #65535
-	movs	r2, #16
-	movs	r1, #255
-	strh	r3, [r0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	ftl_memset
-.L551:
-	.align	2
-.L550:
-	.word	.LANCHOR37
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueInit
+	.global	rknand_print_hex
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
+	.type	rknand_print_hex, %function
+rknand_print_hex:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L553
-	mov	r2, #2048
-	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	ftl_memset
-	mov	r0, r4
-	pop	{r4, pc}
-.L554:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	mov	fp, r0
+	mov	r7, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r5, r6
+	mov	r4, r6
+.L316:
+	cmp	r4, r10
+	bcc	.L322
+	ldr	r0, .L325
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L322:
+	cbnz	r5, .L317
+	mov	r2, r6
+	mov	r1, fp
+	ldr	r0, .L325+4
+	bl	printf
+.L317:
+	cmp	r8, #4
+	bne	.L318
+	ldr	r1, [r7, r4, lsl #2]
+.L324:
+	ldr	r0, .L325+8
+.L323:
+	adds	r5, r5, #1
+	bl	printf
+	cmp	r5, #15
+	bls	.L321
+	movs	r5, #0
+	ldr	r0, .L325
+	bl	printf
+.L321:
+	adds	r4, r4, #1
+	add	r6, r6, r8
+	b	.L316
+.L318:
+	cmp	r8, #2
+	bne	.L320
+	ldrh	r1, [r7, r4, lsl #1]
+	b	.L324
+.L320:
+	ldrb	r1, [r7, r4]	@ zero_extendqisi2
+	ldr	r0, .L325+12
+	b	.L323
+.L326:
 	.align	2
-.L553:
-	.word	.LANCHOR38
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+.L325:
+	.word	.LC5
+	.word	.LC2
+	.word	.LC3
+	.word	.LC4
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
-	.global	ftl_free_no_use_map_blk
+	.global	FlashEraseBlocks
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r5, [r0, #20]
-	movs	r1, #0
-	ldr	r7, [r0, #12]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #24]
-	mov	r0, r5
-	bl	ftl_memset
-	movs	r3, #0
-.L556:
-	ldrh	r1, [r4, #6]
-	uxth	r2, r3
-	cmp	r1, r2
-	bhi	.L560
-	ldr	r3, .L575
-	movs	r6, #0
-	mov	r10, r6
-	ldrh	r2, [r3]
-	ldrh	r3, [r4]
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	mov	r2, r6
-	ldrh	fp, [r5]
-.L561:
-	ldrh	r3, [r4, #10]
-	uxth	ip, r6
-	cmp	r3, ip
-	bhi	.L565
-	mov	r0, r10
-	add	sp, sp, #8
+	ldr	r6, .L343
+	add	r8, r0, #4
+	movs	r7, #0
+	ldr	fp, .L343+20
+	ldrh	r10, [r6, #12]
+	str	r2, [sp]
+	lsl	r3, r10, #3
+	str	r3, [sp, #4]
+.L328:
+	ldr	r3, [sp]
+	cmp	r7, r3
+	beq	.L342
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r8]
+	bl	l2p_addr_tran.isra.0
+	ldr	r5, [sp, #8]
+	cbnz	r5, .L329
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bls	.L329
+	ldr	r6, .L343+4
+	ldr	r7, .L343+8
+.L330:
+	ldr	r3, [sp]
+	adds	r4, r4, #20
+	cmp	r5, r3
+	bne	.L331
+.L342:
+	movs	r0, #0
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L560:
-	uxth	r2, r3
-	ldr	r1, [r6, r2, lsl #2]
-	movs	r2, #0
-	ubfx	r1, r1, #10, #16
-.L557:
-	ldrh	ip, [r4, #10]
-	uxth	r0, r2
-	cmp	ip, r0
-	bhi	.L559
-	adds	r3, r3, #1
-	b	.L556
-.L559:
-	uxth	r0, r2
-	ldrh	ip, [r7, r0, lsl #1]
-	cmp	ip, r1
-	bne	.L558
-	cbz	r1, .L558
-	ldrh	ip, [r5, r0, lsl #1]
-	add	ip, ip, #1
-	strh	ip, [r5, r0, lsl #1]	@ movhi
-.L558:
-	adds	r2, r2, #1
-	b	.L557
-.L565:
-	uxth	r1, r6
-	ldrh	r3, [r5, r1, lsl #1]
-	lsl	r8, r1, #1
-	cmp	fp, r3
-	bls	.L562
-	ldrh	r0, [r7, r1, lsl #1]
-	add	r8, r8, r7
-	cbnz	r0, .L563
-.L564:
-	adds	r6, r6, #1
-	b	.L561
-.L562:
-	cmp	r3, #0
-	bne	.L564
-	ldrh	r0, [r7, r1, lsl #1]
-	add	r8, r8, r7
-	cmp	r0, #0
-	beq	.L564
-.L566:
-	movs	r1, #1
-	str	r2, [sp, #4]
-	bl	FtlFreeSysBlkQueueIn
-	ldr	r2, [sp, #4]
-	strh	r2, [r8]	@ movhi
-	ldrh	r3, [r4, #8]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	b	.L564
-.L563:
-	mov	r10, ip
-	mov	fp, r3
-	cmp	r3, #0
-	beq	.L566
-	b	.L564
-.L576:
+.L331:
+	mov	r3, #-1
+	ldr	r2, [sp, #12]
+	str	r3, [r4, #-20]
+	mov	r1, r6
+	mov	r0, r7
+	adds	r5, r5, #1
+	bl	printf
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L343+12
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L343+16
+	bl	rknand_print_hex
+	b	.L330
+.L329:
+	ldr	r2, [fp, #4]
+	uxtb	r0, r5
+	ldr	r1, [sp, #12]
+	blx	r2
+	cbnz	r0, .L332
+	str	r0, [r8, #-4]
+.L333:
+	ldrh	r2, [r6, #14]
+	cmp	r2, #4
+	bne	.L335
+	ldr	r1, [sp, #12]
+	ldr	r2, [fp, #4]
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	add	r1, r1, r10
+	blx	r2
+	cbz	r0, .L335
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+.L335:
+	adds	r7, r7, #1
+	add	r8, r8, #20
+	b	.L328
+.L332:
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+	b	.L333
+.L344:
 	.align	2
-.L575:
-	.word	.LANCHOR20
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.FtlL2PDataInit,"ax",%progbits
+.L343:
+	.word	.LANCHOR0
+	.word	.LANCHOR77
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR78
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
-	.global	FtlL2PDataInit
+	.global	FtlFreeSysBlkQueueIn
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r1, #0
-	ldr	r5, .L580
-	ldr	r4, .L580+4
-	ldr	r2, [r5]
-	ldr	r7, .L580+8
-	ldr	r6, .L580+12
-	ldr	r0, [r4]
-	lsls	r2, r2, #1
-	ldr	r8, .L580+44
-	bl	ftl_memset
-	ldrh	r3, [r7]
-	movs	r1, #255
-	ldrh	r2, [r6]
-	ldr	r0, [r8]
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L580+16
-	movw	r0, #65535
-	ldrh	r1, [r6]
-	ldr	ip, [r8]
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	cmp	r3, r2
+	bhi	.L345
+	ldr	r4, .L354
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1024
+	beq	.L345
+	cbz	r1, .L347
+	bl	P2V_block_in_plane
+	ldr	r3, .L354+4
+	mov	r6, r0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L354+8
 	ldr	r2, [r3]
-	movs	r3, #12
-	ldrh	r7, [r7]
-	mla	r3, r1, r3, r3
-	adds	r1, r2, r3
-	movs	r3, #0
-	mov	lr, r3
-.L578:
-	adds	r2, r2, #12
-	adds	r6, r3, r7
-	cmp	r2, r1
-	bne	.L579
-	ldr	r3, .L580+20
-	ldr	r2, [r5]
-	strh	r0, [r3, #2]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L580+24
-	strh	r0, [r3]	@ movhi
-	ldrh	r2, [r2]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L580+28
-	ldrh	r2, [r2]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L580+32
-	ldr	r2, [r2]
-	str	r2, [r3, #12]
-	ldr	r2, .L580+36
-	ldr	r2, [r2]
-	str	r2, [r3, #16]
-	ldr	r2, [r4]
-	str	r2, [r3, #20]
-	ldr	r2, .L580+40
-	ldr	r2, [r2]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L579:
-	bic	r3, r3, #3
-	str	lr, [r2, #-8]
-	add	r3, r3, ip
-	strh	r0, [r2, #-12]	@ movhi
-	str	r3, [r2, #-4]
-	mov	r3, r6
-	b	.L578
-.L581:
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L354+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L347:
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+.L345:
+	pop	{r4, r5, r6, pc}
+.L355:
 	.align	2
-.L580:
-	.word	.LANCHOR30
-	.word	.LANCHOR130
-	.word	.LANCHOR23
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR140
-	.word	.LANCHOR141
-	.word	.LANCHOR32
-	.word	.LANCHOR129
-	.word	.LANCHOR135
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.FtlVariablesInit,"ax",%progbits
+.L354:
+	.word	.LANCHOR38
+	.word	.LANCHOR79
+	.word	.LANCHOR43
+	.word	.LANCHOR80
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	FtlVariablesInit
+	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movw	r2, #65535
-	ldr	r3, .L583
-	movs	r4, #0
-	mov	r1, r4
-	ldr	r5, .L583+4
-	strh	r2, [r3]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L583+8
-	str	r4, [r3]
-	ldr	r3, .L583+12
-	str	r4, [r3]
-	ldr	r3, .L583+16
-	str	r2, [r3]
-	ldr	r3, .L583+20
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L583+24
-	ldrh	r2, [r3]
-	ldr	r3, .L583+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L583+32
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L583+36
-	lsls	r2, r2, #1
+	ldr	r4, .L361
+	ldrh	r2, [r4, #6]
+	cbz	r2, .L360
+	ldrh	r3, [r4, #2]
+	subs	r2, r2, #1
+	strh	r2, [r4, #6]	@ movhi
+	movs	r2, #1
+	adds	r1, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	ldrh	r5, [r4, r1, lsl #1]
+	strh	r3, [r4, #2]	@ movhi
+	mov	r1, r2
+	ldr	r3, .L361+4
 	ldr	r0, [r3]
-	bl	ftl_memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L583+40
-	bl	ftl_memset
-	mov	r2, #512
-	mov	r1, r4
-	ldr	r0, .L583+44
-	bl	ftl_memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	mov	r0, r4
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r2, .L361+8
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L357:
+	subs	r3, r5, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L358
+	ldrh	r2, [r4, #6]
+	mov	r1, r5
+	ldr	r0, .L361+12
+	bl	printf
+.L359:
+	b	.L359
+.L360:
+	movw	r5, #65535
+	b	.L357
+.L358:
+	mov	r0, r5
 	pop	{r3, r4, r5, pc}
-.L584:
+.L362:
+	.align	2
+.L361:
+	.word	.LANCHOR38
+	.word	.LANCHOR79
+	.word	.LANCHOR80
+	.word	.LC9
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	movs	r3, #0
+.L364:
+	uxth	r5, r3
+	cmp	r5, r1
+	bcs	.L367
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L364
+	bl	FtlFreeSysBlkQueueOut
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	cmp	r3, r2
+	bls	.L365
+	ldr	r3, .L371
+	ldr	r0, .L371+4
+	ldrh	r2, [r3, #6]
+	bl	printf
+.L366:
+	b	.L366
+.L365:
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	strh	r5, [r4]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L367:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L369
+	movw	r2, #578
+	ldr	r1, .L371+8
+	ldr	r0, .L371+12
+	bl	printf
+.L369:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L372:
 	.align	2
-.L583:
-	.word	.LANCHOR142
-	.word	.LANCHOR6
-	.word	.LANCHOR143
-	.word	.LANCHOR144
-	.word	.LANCHOR145
-	.word	.LANCHOR35
-	.word	.LANCHOR27
-	.word	.LANCHOR36
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR39
+.L371:
+	.word	.LANCHOR38
+	.word	.LC10
 	.word	.LANCHOR81
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.SupperBlkListInit,"ax",%progbits
+	.word	.LC1
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	ftl_memset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #6
-	ldr	r3, .L596
-	movs	r1, #0
-	movs	r4, #0
-	ldr	r6, .L596+4
-	mov	r8, r4
-	ldrh	r3, [r3]
-	mov	r5, r4
-	ldr	r0, [r6]
-	mov	r10, r6
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L596+8
-	ldr	r2, .L596+12
-	str	r4, [r3]
-	ldr	r3, .L596+16
-	strh	r4, [r2]	@ movhi
-	str	r2, [sp, #4]
-	str	r4, [r3]
-	ldr	r3, .L596+20
-	str	r4, [r3]
-	ldr	r3, .L596+24
-	mov	fp, r3
-	strh	r4, [r3]	@ movhi
-.L586:
-	ldr	r3, .L596+28
-	uxth	r7, r4
-	ldrh	r3, [r3]
-	cmp	r7, r3
-	bcs	.L593
-	ldr	r3, .L596+32
-	ldrh	r2, [r3]
-	ldr	r3, .L596+36
-	ldrh	r3, [r3]
-	str	r3, [sp]
-	movs	r3, #0
-	mov	r6, r3
-	b	.L594
-.L588:
-	str	r2, [sp, #12]
-	mov	r1, r7
-	ldr	r2, .L596+40
-	str	r3, [sp, #8]
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	cbnz	r0, .L587
-	ldr	r1, [sp]
-	add	r6, r6, r1
-	uxth	r6, r6
-.L587:
-	adds	r3, r3, #1
-.L594:
-	uxth	r1, r3
-	cmp	r2, r1
-	bhi	.L588
-	uxth	r3, r4
-	cbz	r6, .L589
-	mov	r1, r6
-	str	r3, [sp]
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	ldr	r3, [sp]
-	uxth	r6, r0
-.L590:
-	ldr	r1, [r10]
-	movs	r2, #6
-	mla	r2, r2, r3, r1
-	strh	r6, [r2, #4]	@ movhi
-	ldr	r2, .L596+44
-	ldrh	r2, [r2]
-	cmp	r2, r7
-	beq	.L591
-	ldr	r2, .L596+48
-	ldrh	r2, [r2]
-	cmp	r2, r7
-	beq	.L591
-	ldr	r2, .L596+52
-	ldrh	r2, [r2]
-	cmp	r2, r7
-	beq	.L591
-	ldr	r2, .L596+56
-	ldr	r2, [r2]
-	ldrh	r3, [r2, r3, lsl #1]
-	cbnz	r3, .L592
-	add	r8, r8, #1
-	mov	r0, r7
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-.L591:
-	adds	r4, r4, #1
-	b	.L586
-.L589:
-	ldr	r2, .L596+56
-	movw	r1, #65535
-	ldr	r2, [r2]
-	strh	r1, [r2, r3, lsl #1]	@ movhi
-	b	.L590
-.L592:
-	adds	r5, r5, #1
-	mov	r0, r7
-	uxth	r5, r5
-	bl	INSERT_DATA_LIST
-	b	.L591
-.L593:
-	ldr	r2, [sp, #4]
-	strh	r8, [fp]	@ movhi
-	strh	r5, [r2]	@ movhi
-	add	r5, r5, r8
-	cmp	r5, r3
-	ble	.L595
-	movw	r2, #2170
-	ldr	r1, .L596+60
-	ldr	r0, .L596+64
-	bl	printf
-.L595:
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L597:
-	.align	2
-.L596:
-	.word	.LANCHOR6
-	.word	.LANCHOR40
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR44
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR13
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR42
-	.word	.LANCHOR146
-	.word	.LC1
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FtlMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.type	FtlMemInit, %function
+FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L599
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	ldr	r4, .L599+4
+	ldr	r3, .L379
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r2, .L379+4
+	movs	r6, #12
+	str	r4, [r3]
+	ldr	r3, .L379+8
+	ldr	r5, .L379+12
+	ldr	r10, .L379+292
+	str	r4, [r3]
+	ldr	r3, .L379+16
+	ldrh	r0, [r5]
+	ldr	r8, .L379+296
+	str	r4, [r3]
+	ldr	r3, .L379+20
+	lsls	r0, r0, #1
+	ldr	fp, .L379+300
+	str	r4, [r3]
+	ldr	r3, .L379+24
+	str	r4, [r3]
+	ldr	r3, .L379+28
+	str	r4, [r3]
+	ldr	r3, .L379+32
+	str	r4, [r3]
+	ldr	r3, .L379+36
+	str	r4, [r3]
+	ldr	r3, .L379+40
+	str	r4, [r3]
+	ldr	r3, .L379+44
+	str	r4, [r3]
+	ldr	r3, .L379+48
+	str	r4, [r3]
+	ldr	r3, .L379+52
+	str	r4, [r3]
+	ldr	r3, .L379+56
+	str	r4, [r3]
+	ldr	r3, .L379+60
+	str	r4, [r3]
+	ldr	r3, .L379+64
+	str	r4, [r3]
+	movw	r3, #65535
+	str	r3, [r2]
+	ldr	r2, .L379+68
+	str	r4, [r2]
+	ldr	r2, .L379+72
+	str	r4, [r2]
+	ldr	r2, .L379+76
+	str	r4, [r2]
+	ldr	r2, .L379+80
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L599+8
+	ldr	r2, .L379+84
 	strh	r3, [r2]	@ movhi
-	ldrh	r2, [r4]
-	ldr	r3, .L599+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
+	movs	r2, #32
+	ldr	r3, .L379+88
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L379+92
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L379+96
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L379+100
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L379+104
+	strh	r4, [r3]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L379+108
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	movs	r5, #20
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+112
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	muls	r5, r3, r5
+	lsls	r7, r5, #2
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L379+116
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+120
+	str	r0, [r3]
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L379+124
+	ldr	r7, .L379+128
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+132
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+136
+	ldrh	r5, [r7]
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	mov	r0, r5
+	lsls	r3, r3, #1
+	adds	r3, r3, #1
+	str	r3, [r8]
+	bl	ftl_malloc
+	ldr	r3, .L379+140
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+144
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+148
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+152
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+156
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+160
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+164
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+168
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+172
+	str	r0, [r3]
+	ldr	r3, .L379+176
+	ldrh	r0, [r3]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+180
+	ldrh	r5, [r10]
+	ldr	r10, .L379+304
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	muls	r5, r3, r5
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L379+184
+	str	r0, [r3]
+	lsls	r0, r5, #2
+	ldr	r5, .L379+188
+	bl	ftl_malloc
+	ldr	r3, .L379+192
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	ldr	r0, [r8]
+	ldr	r8, .L379+308
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+196
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L379+200
+	str	r0, [r3]
+	ldrh	r3, [r8]
+	ldr	r0, .L379+204
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	and	r0, r0, r3, lsl #9
+	strh	r3, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L379+208
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L379+212
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L379+216
+	str	r0, [r3]
+	ldr	r3, [r10]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L379+220
+	str	r0, [r3]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L379+224
+	ldr	r8, .L379+312
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L379+228
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L379+232
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L379+236
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r8, .L379+316
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+240
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r2, [r8]
+	mov	r1, r4
+	ldr	r3, .L379+244
+	ldr	r4, .L379+248
+	lsls	r2, r2, #2
+	str	r0, [r3]
 	bl	ftl_memset
+	ldr	r3, .L379+252
+	ldrh	r0, [r3]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+256
+	str	r0, [r3]
+	ldr	r0, [r10]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L379+260
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	muls	r0, r6, r0
+	ldr	r6, .L379+264
+	bl	ftl_malloc
+	ldr	r3, .L379+268
+	str	r0, [r3]
 	ldrh	r3, [r4]
-	movs	r2, #12
-	movs	r1, #255
-	muls	r2, r3, r2
-	ldr	r3, .L599+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
-.L600:
+	ldrh	r0, [r7]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+272
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r5]
+	ldr	r5, .L379+276
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L379+280
+	str	r0, [r3]
+	ldr	r3, .L379+284
+	ldrh	r0, [r3]
+	ldrh	r3, [r6]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r5]	@ movhi
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r1, [r5]
+	movs	r2, #1
+	ldr	r3, .L379+288
+	ldrh	r6, [r6]
+	lsls	r1, r1, #2
+	mov	r4, r3
+	str	r0, [r4, #28]!
+	mov	r0, r1
+	b	.L380
+.L381:
 	.align	2
-.L599:
+.L379:
+	.word	.LANCHOR82
 	.word	.LANCHOR96
+	.word	.LANCHOR83
 	.word	.LANCHOR21
-	.word	.LANCHOR97
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR86
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR80
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
 	.word	.LANCHOR95
+	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
-	.align	1
-	.global	FlashGetBadBlockList
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r2, #256
-	mov	r5, r1
-	movs	r1, #255
-	mov	r4, r0
-	bl	ftl_memset
-	ldr	r3, .L608
-	mov	r1, r5
-	mov	r0, r4
-	ldr	r3, [r3]
-	blx	r3
-	uxth	r0, r0
-	cmp	r0, #50
-	bls	.L602
-	mov	r2, #256
-	movs	r1, #255
-	mov	r0, r4
-	bl	ftl_memset
-	movs	r0, #0
-.L602:
-	ldr	r3, .L608+4
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L607
-	add	r1, r4, r0, lsl #1
-	mov	r3, r4
-.L604:
-	cmp	r3, r1
-	bne	.L605
-.L607:
-	pop	{r3, r4, r5, pc}
-.L605:
-	ldrh	r2, [r3]
-	lsrs	r2, r2, #1
-	strh	r2, [r3], #2	@ movhi
-	b	.L604
-.L609:
-	.align	2
-.L608:
+	.word	.LANCHOR99
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.word	.LANCHOR74
+	.word	.LANCHOR76
+	.word	.LANCHOR68
+	.word	.LANCHOR71
+	.word	.LANCHOR103
+	.word	.LANCHOR104
 	.word	.LANCHOR105
-	.word	.LANCHOR0
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.ftl_memcpy,"ax",%progbits
-	.align	1
-	.global	ftl_memcpy
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.FlashReadPages,"ax",%progbits
-	.align	1
-	.global	FlashReadPages
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashReadPages, %function
-FlashReadPages:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r1
-	ldr	r3, .L639
-	mov	r4, r0
-	mov	r10, #0
-	ldrh	r2, [r3, #12]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-.L612:
-	cmp	r10, fp
-	bne	.L623
+	.word	.LANCHOR23
+	.word	.LANCHOR79
+	.word	.LANCHOR66
+	.word	.LANCHOR106
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR64
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR63
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.word	.LANCHOR12
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LANCHOR6
+	.word	.LANCHOR115
+	.word	.LANCHOR65
+	.word	.LANCHOR117
+	.word	33553920
+	.word	.LANCHOR118
+	.word	.LANCHOR43
+	.word	.LANCHOR42
+	.word	.LANCHOR119
+	.word	.LANCHOR120
+	.word	.LANCHOR1
+	.word	.LANCHOR36
+	.word	.LANCHOR121
+	.word	.LANCHOR122
+	.word	.LANCHOR123
+	.word	.LANCHOR33
+	.word	.LANCHOR32
+	.word	.LANCHOR124
+	.word	.LANCHOR125
+	.word	.LANCHOR10
+	.word	.LANCHOR55
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR40
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR67
+	.word	.LANCHOR24
+	.word	.LANCHOR30
+	.word	.LANCHOR116
+	.word	.LANCHOR27
+	.word	.LANCHOR28
+.L380:
+.L375:
+	cmp	r2, r6
+	bcc	.L376
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L382
+	movs	r1, #0
+	adds	r3, r3, #24
+.L377:
+	cmp	r3, r2
+	bne	.L378
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L623:
-	ldr	r3, [r4, #8]
-	cbz	r3, .L613
-	ldr	r3, [r4, #12]
-	cbnz	r3, .L614
-.L613:
-	movs	r2, #90
-	ldr	r1, .L639+4
-	ldr	r0, .L639+8
-	bl	printf
-.L614:
-	add	r2, sp, #8
-	add	r1, sp, #12
-	ldr	r0, [r4, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r0, [sp, #8]
-	cmp	r0, #3
-	bls	.L615
-	mov	r3, #-1
-	str	r3, [r4]
-.L616:
-	add	r10, r10, #1
-	adds	r4, r4, #20
-	b	.L612
-.L615:
-	ldr	r5, [r4, #8]
-	uxtb	r0, r0
-	ldr	r8, .L639+20
-	ldr	r7, .L639+12
-	tst	r5, #63
-	ldr	r3, [r4, #12]
-	it	ne
-	ldrne	r5, [r8]
-	ldr	r1, [sp, #12]
-	ldr	r6, [r7, #12]
-	mov	r2, r5
-	blx	r6
-	ldr	r3, [sp, #4]
-	str	r0, [r4]
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L619
-	ldr	r0, [sp]
-	add	r2, r5, #2048
-	ldr	r3, [r4, #12]
-	ldr	r1, [sp, #12]
-	ldr	r7, [r7, #12]
-	adds	r3, r3, #8
-	add	r1, r1, r0
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	blx	r7
-	adds	r3, r0, #1
-	beq	.L620
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3, #12]
-	adds	r2, r2, #1
-	bne	.L621
-	ldr	r2, [r3, #8]
+.L376:
+	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
-	bne	.L621
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L621
-.L620:
-	mov	r3, #-1
-	str	r3, [r4]
-.L621:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L619
-	cmp	r0, #256
-	it	eq
-	streq	r0, [r4]
-.L619:
-	ldr	r3, [r8]
-	cmp	r5, r3
-	bne	.L616
-	ldr	r0, [r4, #8]
-	cmp	r5, r0
-	beq	.L616
-	ldr	r3, .L639+16
-	mov	r1, r5
-	ldrh	r2, [r3]
-	lsls	r2, r2, #9
-	bl	ftl_memcpy
-	b	.L616
-.L640:
+	add	r5, r5, r0
+	add	r0, r0, r1
+	str	r5, [r4, #4]!
+	b	.L375
+.L378:
+	str	r1, [r3, #4]!
+	b	.L377
+.L383:
 	.align	2
-.L639:
-	.word	.LANCHOR0
-	.word	.LANCHOR147
-	.word	.LC1
-	.word	.LANCHOR105
-	.word	.LANCHOR12
-	.word	.LANCHOR120
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+.L382:
+	.word	.LANCHOR37+56
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	FtlBbt2Bitmap
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L651
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r5, .L651+4
-	ldr	r3, [r3]
-	ldr	r7, .L651+8
-	ldr	r10, .L651+20
-	str	r3, [r5, #8]
-	ldr	r3, .L651+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-.L642:
-	ldr	r3, .L651+16
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L647
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L647:
-	ldrh	r4, [r10]
-	movw	r3, #65535
-	ldr	fp, .L651+4
-	strh	r3, [r7, #2]!	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L643:
-	ldrh	r3, [r10]
-	sub	r2, r3, #15
-	cmp	r2, r4
-	bgt	.L645
-	mla	r3, r6, r3, r4
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, fp
-	lsls	r3, r3, #10
-	str	r3, [r5, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L644
-	ldrh	r2, [r8]
-	movw	r3, #61664
+	ldr	r3, .L390
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r7, .L390+4
+	mov	r6, r1
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	ldrh	r2, [r3]
+	movs	r1, #0
+	ldr	r8, .L390+12
+	mov	r0, r6
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.L387:
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L384
+	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L644
-	strh	r4, [r7]	@ movhi
-.L645:
-	adds	r6, r6, #1
-	b	.L642
-.L644:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L643
-.L652:
+	bhi	.L386
+	movs	r2, #74
+	mov	r1, r8
+	ldr	r0, .L390+8
+	bl	printf
+.L386:
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	cmp	r5, r4
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	bne	.L387
+.L384:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L391:
 	.align	2
-.L651:
-	.word	.LANCHOR115
-	.word	.LANCHOR148
-	.word	.LANCHOR37+10
-	.word	.LANCHOR123
-	.word	.LANCHOR10
+.L390:
+	.word	.LANCHOR127
 	.word	.LANCHOR17
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	.word	.LC1
+	.word	.LANCHOR128
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
-	.global	FtlGetLastWrittenPage
+	.global	FtlBbtMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 88
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, lr}
-	it	eq
-	ldreq	r3, .L665
-	sub	sp, sp, #88
-	lsl	r7, r0, #10
-	mov	r2, r1
-	it	ne
-	ldrne	r3, .L665+4
-	mov	r6, r1
-	add	r0, sp, #4
-	movs	r1, #1
-	ldrh	r5, [r3]
-	ldr	r3, .L665+8
-	subs	r5, r5, #1
-	ldr	r3, [r3]
-	sxth	r5, r5
-	str	r3, [sp, #12]
-	add	r3, sp, #24
-	str	r3, [sp, #16]
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L656
-	mov	r8, #0
-.L657:
-	cmp	r8, r5
-	ble	.L660
-.L656:
-	mov	r0, r5
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L660:
-	add	r3, r8, r5
-	mov	r2, r6
-	add	r3, r3, r3, lsr #31
-	movs	r1, #1
-	add	r0, sp, #4
-	asrs	r4, r3, #1
-	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L658
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	bne	.L658
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	beq	.L658
-	subs	r4, r4, #1
-	sxth	r5, r4
-	b	.L657
-.L658:
-	adds	r4, r4, #1
-	sxth	r8, r4
-	b	.L657
-.L666:
+	@ link register save eliminated.
+	ldr	r0, .L393
+	movw	r3, #65535
+	movs	r2, #16
+	movs	r1, #255
+	strh	r3, [r0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	ftl_memset
+.L394:
 	.align	2
-.L665:
-	.word	.LANCHOR20
-	.word	.LANCHOR19
-	.word	.LANCHOR121
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+.L393:
+	.word	.LANCHOR37
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	FtlFreeSysBlkQueueInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L396
+	mov	r2, #2048
+	push	{r4, lr}
 	movs	r4, #0
-	ldr	r5, .L748
-	sub	sp, sp, #32
-	mov	r1, r4
-	ldr	r3, .L748+4
-	ldr	r2, [r5]
-	ldr	r6, .L748+8
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L748+12
-	lsls	r2, r2, #2
-	strh	r4, [r6]	@ movhi
-	ldr	r7, .L748+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L748+20
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L748+24
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L748+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	movs	r2, #12
-	movs	r1, #255
-	ldr	r0, .L748+32
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
 	bl	ftl_memset
-	ldr	r3, .L748+36
-	str	r6, [sp, #12]
-	str	r5, [sp, #16]
-	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-.L668:
-	ldr	r3, .L748+40
-	ldr	r2, [sp, #4]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bls	.L709
-	ldr	r3, .L748+44
-	movs	r5, #0
-	ldr	r1, .L748+48
-	mov	fp, r5
-	movs	r7, #20
-	ldrh	r8, [r3]
-	ldr	r3, .L748+52
-	ldr	r2, [r1]
-	ldr	r1, .L748+56
-	ldr	r6, [r3]
-	ldr	r3, .L748+60
-	str	r2, [sp, #8]
-	ldrh	r10, [r1]
-	ldr	r3, [r3]
-	ldr	r2, .L748+64
-	b	.L710
-.L670:
-	ldrb	r0, [r2, r5]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #28]
-	str	r2, [sp, #24]
-	bl	V2P_block
-	str	r0, [sp, #20]
-	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L669
-	ldr	r1, [sp, #20]
-	mla	r0, r7, fp, r6
-	ldr	r4, [sp, #8]
-	lsls	r1, r1, #10
-	str	r3, [r0, #8]
-	str	r1, [r0, #4]
-	mul	r1, r10, fp
-	bic	r1, r1, #3
-	add	r1, r1, r4
-	str	r1, [r0, #12]
-	add	r1, fp, #1
-	uxth	fp, r1
-.L669:
-	adds	r5, r5, #1
-.L710:
-	uxth	r1, r5
-	cmp	r8, r1
-	bhi	.L670
-	cmp	fp, #0
-	bne	.L671
-.L708:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L668
-.L671:
-	movs	r7, #0
-	movs	r2, #1
-	mov	r1, fp
-	mov	r0, r6
-	bl	FlashReadPages
-.L672:
-	uxth	r3, r7
-	cmp	fp, r3
-	bls	.L708
-	ldr	r3, .L748+52
-	mov	r8, #20
-	mul	r8, r8, r7
-	ldr	r3, [r3]
-	add	r2, r3, r8
-	ldr	r3, [r3, r8]
-	ldr	r5, [r2, #4]
-	ldr	r6, [r2, #12]
-	adds	r3, r3, #1
-	ubfx	r5, r5, #10, #16
-	bne	.L675
-	mov	r10, #16
-.L677:
-	ldr	r3, .L748+52
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, [r3]
-	add	r0, r0, r8
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
-	bl	FlashReadPages
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	ldr	r3, .L748+52
-	ldr	r3, [r3]
-	bne	.L674
-	mov	r2, #-1
-	str	r2, [r3, r8]
-	ldr	r3, .L748+52
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	cmp	r3, r2
-	bne	.L675
-.L676:
-	movs	r1, #1
-	b	.L747
-.L674:
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L675
-	add	r10, r10, #-1
-	uxth	r10, r10
-	cmp	r10, #0
-	bne	.L677
-	b	.L676
-.L675:
-	ldr	r3, .L748+68
-	ldr	r2, [r3]
-	ldr	r3, [r6, #4]
-	adds	r1, r2, #1
-	beq	.L678
-	cmp	r2, r3
-	bhi	.L679
-.L678:
-	adds	r2, r3, #1
-	ittt	ne
-	ldrne	r1, .L748+68
-	addne	r2, r3, #1
-	strne	r2, [r1]
-.L679:
-	ldrh	r2, [r6]
-	movw	r1, #61604
-	cmp	r2, r1
-	beq	.L681
-	bhi	.L682
-	movw	r3, #61574
-	cmp	r2, r3
-	beq	.L683
-.L680:
-	adds	r7, r7, #1
-	b	.L672
-.L682:
-	movw	r3, #61634
-	cmp	r2, r3
-	beq	.L684
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L680
+	mov	r0, r4
+	pop	{r4, pc}
+.L397:
+	.align	2
+.L396:
+	.word	.LANCHOR38
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
 	movs	r1, #0
-.L747:
+	ldr	r7, [r0, #12]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
 	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-	b	.L680
-.L684:
-	ldr	r3, .L748+8
+	bl	ftl_memset
+	movs	r3, #0
+.L399:
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L403
+	ldr	r3, .L418
+	movs	r6, #0
+	mov	r10, r6
 	ldrh	r2, [r3]
-	ldr	r3, .L748
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L686
-	movw	r2, #1222
-	ldr	r1, .L748+72
-	ldr	r0, .L748+76
-	bl	printf
-.L686:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #12]
-	ldr	r1, [r3]
-	ldrh	r0, [r2]
-	ldr	r2, .L748+12
-	uxth	r10, r1
-	ldr	ip, [r2]
-	add	r3, r10, #-1
-	sub	r10, r10, r0
-	add	r10, r10, #-1
-	sxth	r3, r3
-	sxth	r10, r10
-.L687:
-	cmp	r3, r10
-	bgt	.L693
-	cmp	r3, #0
-	bge	.L725
-	b	.L680
-.L693:
-	ldr	r2, [ip, r3, lsl #2]
-	add	r8, ip, r3, lsl #2
-	ldr	r4, [r6, #4]
-	cmp	r4, r2
-	bls	.L688
-	ldr	r2, [ip]
-	cbnz	r2, .L689
-	cmp	r1, r0
-	ittt	ne
-	ldrne	r2, .L748+8
-	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L689:
-	ldr	r2, .L748+20
-	uxth	r10, r3
-	ldr	r0, [r2]
+	ldrh	r3, [r4]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	mov	r2, r6
+	ldrh	fp, [r5]
+.L404:
+	ldrh	r3, [r4, #10]
+	uxth	ip, r6
+	cmp	r3, ip
+	bhi	.L408
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L403:
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
-.L690:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L691
-	ldr	r2, [r6, #4]
+	ubfx	r1, r1, #10, #16
+.L400:
+	ldrh	ip, [r4, #10]
+	uxth	r0, r2
+	cmp	ip, r0
+	bhi	.L402
+	adds	r3, r3, #1
+	b	.L399
+.L402:
+	uxth	r0, r2
+	ldrh	ip, [r7, r0, lsl #1]
+	cmp	ip, r1
+	bne	.L401
+	cbz	r1, .L401
+	ldrh	ip, [r5, r0, lsl #1]
+	add	ip, ip, #1
+	strh	ip, [r5, r0, lsl #1]	@ movhi
+.L401:
+	adds	r2, r2, #1
+	b	.L400
+.L408:
+	uxth	r1, r6
+	ldrh	r3, [r5, r1, lsl #1]
+	lsl	r8, r1, #1
+	cmp	fp, r3
+	bls	.L405
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cbnz	r0, .L406
+.L407:
+	adds	r6, r6, #1
+	b	.L404
+.L405:
 	cmp	r3, #0
-	str	r2, [r8]
-	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L680
-	ldr	r2, .L748+8
-	ldrh	r0, [r2]
-	ldr	r2, .L748
+	bne	.L407
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cmp	r0, #0
+	beq	.L407
+.L409:
+	movs	r1, #1
+	str	r2, [sp, #4]
+	bl	FtlFreeSysBlkQueueIn
+	ldr	r2, [sp, #4]
+	strh	r2, [r8]	@ movhi
+	ldrh	r3, [r4, #8]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L407
+.L406:
+	mov	r10, ip
+	mov	fp, r3
+	cmp	r3, #0
+	beq	.L409
+	b	.L407
+.L419:
+	.align	2
+.L418:
+	.word	.LANCHOR20
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r1, #0
+	ldr	r5, .L423
+	ldr	r4, .L423+4
+	ldr	r2, [r5]
+	ldr	r7, .L423+8
+	ldr	r6, .L423+12
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	ldr	r8, .L423+44
+	bl	ftl_memset
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L423+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	movs	r3, #0
+	mov	lr, r3
+.L421:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L422
+	ldr	r3, .L423+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L423+24
+	strh	r0, [r3]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L423+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L423+32
 	ldr	r2, [r2]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L680
-.L725:
-	ldr	r2, .L748+8
-	adds	r0, r0, #1
-	strh	r0, [r2]	@ movhi
-	ldr	r2, [r6, #4]
-	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L748+20
-.L745:
+	str	r2, [r3, #12]
+	ldr	r2, .L423+36
 	ldr	r2, [r2]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L680
-.L691:
-	add	lr, ip, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [ip, r1, lsl #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L690
-.L688:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L687
-.L749:
+	str	r2, [r3, #16]
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	ldr	r2, .L423+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L422:
+	bic	r3, r3, #3
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L421
+.L424:
 	.align	2
-.L748:
+.L423:
 	.word	.LANCHOR30
-	.word	.LANCHOR35
-	.word	.LANCHOR141
-	.word	.LANCHOR135
-	.word	.LANCHOR27
+	.word	.LANCHOR120
+	.word	.LANCHOR23
+	.word	.LANCHOR33
+	.word	.LANCHOR55
 	.word	.LANCHOR129
-	.word	.LANCHOR132
-	.word	.LANCHOR36
-	.word	.LANCHOR79
-	.word	.LANCHOR5
-	.word	.LANCHOR6
-	.word	.LANCHOR3
-	.word	.LANCHOR92
-	.word	.LANCHOR112
-	.word	.LANCHOR24
-	.word	.LANCHOR91
-	.word	.LANCHOR13
-	.word	.LANCHOR70
-	.word	.LANCHOR149
-	.word	.LC1
-.L683:
-	ldr	r8, .L750+12
-	ldr	r10, .L750+20
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
-	cmp	r2, r3
-	bls	.L696
-	movw	r2, #1263
-	ldr	r1, .L750
-	ldr	r0, .L750+4
-	bl	printf
-.L696:
-	ldr	r2, .L750+8
-	ldrh	lr, [r10]
-	ldrh	ip, [r8]
-	ldr	r0, [r2]
-	add	r10, lr, #-1
-	sxth	r3, r10
-	sub	r10, r10, ip
-.L697:
-	cmp	r3, r10
-	ble	.L702
-	ldr	r1, [r6, #4]
-	add	r8, r0, r3, lsl #2
-	ldr	r2, [r0, r3, lsl #2]
-	cmp	r1, r2
-	bls	.L698
-	ldr	r2, [r0]
-	cbnz	r2, .L699
-	cmp	lr, ip
-	ittt	ne
-	ldrne	r2, .L750+12
-	addne	ip, ip, #1
-	strhne	ip, [r2]	@ movhi
-.L699:
-	ldr	r2, .L750+16
-	uxth	r10, r3
-	ldr	ip, [r2]
-	movs	r2, #0
-.L700:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L701
-	ldr	r2, [r6, #4]
-	str	r2, [r8]
-	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L702:
-	cmp	r3, #0
-	blt	.L680
-	ldr	r2, .L750+20
-	ldr	ip, .L750+12
-	ldrh	r2, [r2]
-	ldrh	r1, [ip]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L680
-	ldr	r2, [r6, #4]
-	adds	r1, r1, #1
-	strh	r1, [ip]	@ movhi
-	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L750+16
-	b	.L745
-.L701:
-	add	lr, r0, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, ip, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [r0, r1, lsl #2]
-	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L700
-.L698:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L697
-.L681:
-	ldr	r8, .L750+40
+	.word	.LANCHOR130
+	.word	.LANCHOR32
+	.word	.LANCHOR119
+	.word	.LANCHOR125
+	.word	.LANCHOR124
+	.word	.LANCHOR126
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
 	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L704
-.L746:
-	strh	r5, [r8]	@ movhi
-	str	r3, [r8, #8]
-	b	.L680
-.L704:
-	ldrh	r0, [r8, #4]
-	cmp	r0, r2
-	beq	.L705
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.L705:
-	ldr	r3, [r6, #4]
-	ldr	r2, [r8, #8]
-	cmp	r2, r3
-	bcs	.L706
-	ldrh	r2, [r8]
-	strh	r2, [r8, #4]	@ movhi
-	b	.L746
-.L706:
-	strh	r5, [r8, #4]	@ movhi
-	b	.L680
-.L709:
-	ldr	r3, .L750+24
-	ldr	r2, [r3]
-	ldrh	r3, [r2]
-	cbz	r3, .L711
-.L714:
-	ldr	r3, .L750+16
-	ldr	r4, [r3]
-	ldrh	r2, [r4]
-	cmp	r2, #0
-	beq	.L712
-.L713:
-	ldr	r3, .L750+28
+	ldr	r3, .L426
+	movs	r4, #0
+	mov	r1, r4
+	ldr	r5, .L426+4
+	strh	r2, [r3]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L426+8
+	str	r4, [r3]
+	ldr	r3, .L426+12
+	str	r4, [r3]
+	ldr	r3, .L426+16
+	str	r2, [r3]
+	ldr	r3, .L426+20
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L426+24
 	ldrh	r2, [r3]
-	ldr	r3, .L750+32
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L744
-	movw	r2, #1388
-	ldr	r1, .L750
-	ldr	r0, .L750+4
-	bl	printf
-.L744:
-	movs	r0, #0
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L711:
-	ldr	r1, .L750+28
-	ldrh	r1, [r1]
-	cmp	r1, #0
-	beq	.L714
-	ldr	r5, .L750+32
-	ldr	r0, [r5]
-.L715:
-	sxth	r1, r3
-	cmp	r1, r0
-	bcs	.L714
-	ldrh	r4, [r2, r1, lsl #1]
-	adds	r3, r3, #1
-	cmp	r4, #0
-	beq	.L715
-	ldr	r3, .L750+36
-	movs	r6, #0
+	ldr	r3, .L426+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L426+32
+	lsls	r2, r2, #1
 	ldr	r0, [r3]
-	mov	r3, r1
-.L716:
-	ldr	r4, [r5]
-	cmp	r3, r4
-	bcs	.L714
-	ldrh	r7, [r2, r3, lsl #1]
-	subs	r4, r3, r1
-	strh	r7, [r2, r4, lsl #1]	@ movhi
-	ldr	r7, [r0, r3, lsl #2]
-	str	r7, [r0, r4, lsl #2]
-	strh	r6, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	sxth	r3, r3
-	b	.L716
-.L712:
-	ldr	r3, .L750+12
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L713
-	ldr	r5, .L750+20
-	ldrh	r1, [r5]
-.L721:
-	sxth	r3, r2
-	cmp	r3, r1
-	mov	r6, r3
-	bge	.L713
-	ldrh	r0, [r4, r3, lsl #1]
-	adds	r2, r2, #1
-	cmp	r0, #0
-	beq	.L721
-	ldr	r2, .L750+8
-	movs	r0, #0
-	ldr	r2, [r2]
-.L722:
-	ldrh	r1, [r5]
-	cmp	r3, r1
-	bge	.L713
-	ldrh	r7, [r4, r3, lsl #1]
-	subs	r1, r3, r6
-	strh	r7, [r4, r1, lsl #1]	@ movhi
-	ldr	r7, [r2, r3, lsl #2]
-	str	r7, [r2, r1, lsl #2]
-	adds	r1, r3, #1
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-	sxth	r3, r1
-	b	.L722
-.L751:
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L426+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L426+40
+	bl	ftl_memset
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L426+44
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L427:
 	.align	2
-.L750:
-	.word	.LANCHOR149
-	.word	.LC1
+.L426:
+	.word	.LANCHOR131
+	.word	.LANCHOR6
 	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR134
 	.word	.LANCHOR35
-	.word	.LANCHOR36
 	.word	.LANCHOR27
-	.word	.LANCHOR129
-	.word	.LANCHOR141
-	.word	.LANCHOR30
+	.word	.LANCHOR36
+	.word	.LANCHOR43
+	.word	.LANCHOR117
+	.word	.LANCHOR39
 	.word	.LANCHOR135
-	.word	.LANCHOR79
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlLoadBbt,"ax",%progbits
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	SupperBlkListInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	@ args = 0, pretend = 0, frame = 0
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L781+40
-	ldr	r4, .L781
-	ldr	r3, [r8]
-	ldr	r7, .L781+4
-	mov	r10, r4
-	str	r3, [r4, #8]
-	ldr	r3, .L781+8
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-	bl	FtlBbtMemInit
-	ldrh	r5, [r7]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L753:
-	ldrh	r3, [r7]
-	subs	r3, r3, #15
-	cmp	r3, r5
-	bgt	.L756
-	lsls	r3, r5, #10
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L754
-	ldr	r3, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	adds	r3, r3, #1
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-.L754:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L755
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L755
-	ldr	r3, .L781+12
-	ldr	r2, [r6, #4]
-	strh	r5, [r3]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r6, #8]
-	strh	r2, [r3, #4]	@ movhi
-.L756:
-	ldr	r5, .L781+12
-	movw	r2, #65535
-	ldrh	r3, [r5]
-	cmp	r3, r2
-	beq	.L770
-	ldrh	r3, [r5, #4]
-	cmp	r3, r2
-	beq	.L760
-	lsls	r3, r3, #10
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L781
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L760
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L760
-	ldr	r3, [r6, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L760
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r6, #8]
-	strh	r2, [r5]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L760:
-	ldr	r10, .L781
-	movs	r1, #1
-	ldrh	r0, [r5]
-	bl	FtlGetLastWrittenPage
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L762:
-	cmp	r7, #0
-	bge	.L765
-	movs	r2, #253
-	ldr	r1, .L781+16
-	ldr	r0, .L781+20
-	bl	printf
-.L764:
-	ldrh	r3, [r6, #10]
-	ldrh	r0, [r6, #12]
-	strh	r3, [r5, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L767
-	ldr	r3, .L781+24
-	ldr	r2, [r3]
-	cmp	r0, r2
-	beq	.L767
-	ldr	r3, .L781+28
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #6
+	ldr	r3, .L439
+	movs	r1, #0
+	movs	r4, #0
+	ldr	r6, .L439+4
+	mov	r8, r4
 	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
-	cmp	r2, r3
-	bcs	.L767
-	cmp	r0, r3
-	bcs	.L767
-	bl	FtlSysBlkNumInit
-.L767:
-	ldr	r6, .L781+32
-	movs	r5, #0
-	ldr	r7, .L781+36
-	ldr	r8, .L781+44
-.L768:
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L769
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L755:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L753
-.L765:
-	ldrh	r3, [r5]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	orr	r3, r7, r3, lsl #10
-	str	r3, [r4, #4]
-	ldr	r3, [r8]
-	str	r3, [r4, #8]
-	bl	FlashReadPages
-	ldr	r3, [r4]
+	mov	r5, r4
+	ldr	r0, [r6]
+	mov	r10, r6
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L439+8
+	ldr	r2, .L439+12
+	str	r4, [r3]
+	ldr	r3, .L439+16
+	strh	r4, [r2]	@ movhi
+	str	r2, [sp, #4]
+	str	r4, [r3]
+	ldr	r3, .L439+20
+	str	r4, [r3]
+	ldr	r3, .L439+24
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.L429:
+	ldr	r3, .L439+28
+	uxth	r7, r4
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcs	.L436
+	ldr	r3, .L439+32
+	ldrh	r2, [r3]
+	ldr	r3, .L439+36
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #0
+	mov	r6, r3
+	b	.L437
+.L431:
+	str	r2, [sp, #12]
+	mov	r1, r7
+	ldr	r2, .L439+40
+	str	r3, [sp, #8]
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L430
+	ldr	r1, [sp]
+	add	r6, r6, r1
+	uxth	r6, r6
+.L430:
 	adds	r3, r3, #1
-	beq	.L763
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	beq	.L764
-.L763:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L762
-.L769:
-	ldrh	r2, [r8]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r5, r2, r1
+.L437:
+	uxth	r1, r3
+	cmp	r2, r1
+	bhi	.L431
+	uxth	r3, r4
+	cbz	r6, .L432
+	mov	r1, r6
+	str	r3, [sp]
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	ldr	r3, [sp]
+	uxth	r6, r0
+.L433:
+	ldr	r1, [r10]
+	movs	r2, #6
+	mla	r2, r2, r3, r1
+	strh	r6, [r2, #4]	@ movhi
+	ldr	r2, .L439+44
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L434
+	ldr	r2, .L439+48
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L434
+	ldr	r2, .L439+52
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L434
+	ldr	r2, .L439+56
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbnz	r3, .L435
+	add	r8, r8, #1
+	mov	r0, r7
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+.L434:
+	adds	r4, r4, #1
+	b	.L429
+.L432:
+	ldr	r2, .L439+56
+	movw	r1, #65535
+	ldr	r2, [r2]
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	b	.L433
+.L435:
 	adds	r5, r5, #1
-	bl	ftl_memcpy
-	b	.L768
-.L770:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L782:
+	mov	r0, r7
+	uxth	r5, r5
+	bl	INSERT_DATA_LIST
+	b	.L434
+.L436:
+	ldr	r2, [sp, #4]
+	strh	r8, [fp]	@ movhi
+	strh	r5, [r2]	@ movhi
+	add	r5, r5, r8
+	cmp	r5, r3
+	ble	.L438
+	movw	r2, #2216
+	ldr	r1, .L439+60
+	ldr	r0, .L439+64
+	bl	printf
+.L438:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L440:
 	.align	2
-.L781:
-	.word	.LANCHOR148
-	.word	.LANCHOR17
-	.word	.LANCHOR123
-	.word	.LANCHOR37
-	.word	.LANCHOR150
-	.word	.LC1
-	.word	.LANCHOR2
+.L439:
 	.word	.LANCHOR6
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR115
-	.word	.LANCHOR137
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.word	.LANCHOR40
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR42
+	.word	.LANCHOR136
+	.word	.LC1
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
-	.global	FtlLoadSysInfo
+	.global	FtlGcPageVarInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #0
-	ldr	r8, .L804+136
-	ldr	r5, .L804
-	ldr	r3, [r8]
-	ldr	r4, .L804+4
-	ldr	r10, .L804+140
-	ldrh	r2, [r5]
-	ldr	r7, .L804+8
-	str	r3, [r4, #8]
-	ldr	r6, .L804+12
-	ldr	r3, [r10]
-	lsls	r2, r2, #1
-	ldr	r0, [r7]
-	str	r3, [r4, #12]
-	bl	ftl_memset
-	ldrh	r0, [r6]
-	movw	r3, #65535
-	str	r7, [sp]
-	cmp	r0, r3
-	bne	.L784
-.L792:
-	mov	r0, #-1
-.L783:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L784:
-	movs	r1, #1
-	mov	fp, r4
-	bl	FtlGetLastWrittenPage
-	ldr	r3, .L804+16
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r6, #2]	@ movhi
-.L786:
-	cmp	r7, #0
-	bge	.L789
-	mov	r2, #1448
-	ldr	r1, .L804+20
-	ldr	r0, .L804+24
-	bl	printf
-.L788:
-	ldr	r2, .L804+28
-	ldrh	r3, [r5]
-	ldrh	r2, [r2]
-	adds	r3, r3, #24
-	cmp	r2, r3, lsl #1
-	bcs	.L791
-	movw	r2, #1450
-	ldr	r1, .L804+20
-	ldr	r0, .L804+24
-	bl	printf
-.L791:
-	ldr	r7, .L804+32
-	movs	r2, #48
-	ldr	r1, [r4, #8]
-	mov	r0, r7
-	bl	ftl_memcpy
-	ldrh	r2, [r5]
-	ldr	r1, [r4, #8]
-	ldr	r3, [sp]
+	ldr	r2, .L442
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	ldr	r4, .L442+4
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L442+8
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4]
+	ldr	r3, .L442+12
 	lsls	r2, r2, #1
-	adds	r1, r1, #48
 	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldrh	r1, [r5]
-	ldr	r3, [r4, #8]
-	mov	r4, r7
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L804+36
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L442+16
 	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldr	r2, [r7]
-	ldr	r3, .L804+16
-	cmp	r2, r3
-	bne	.L792
-	ldr	r3, .L804+40
-	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	ldrh	r5, [r7, #8]
-	ldrh	r3, [r3]
-	strh	r5, [r6, #6]	@ movhi
-	cmp	r2, r3
-	bne	.L792
-	ldr	r3, .L804+44
-	ldr	r2, .L804+48
-	str	r5, [r3]
-	ldr	r3, .L804+52
-	ldrh	r3, [r3]
-	muls	r3, r5, r3
-	str	r3, [r2]
-	ldr	r2, .L804+56
-	ldrh	r2, [r2]
-	muls	r3, r2, r3
-	ldr	r2, .L804+60
-	str	r3, [r2]
-	ldr	r3, .L804+64
-	ldr	r6, [r3]
-	ldr	r3, .L804+68
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L804+72
-	subs	r0, r6, r0
-	ldrh	r1, [r3]
-	subs	r0, r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L804+76
-	cmp	r5, r6
-	strh	r0, [r3]	@ movhi
-	bls	.L793
-	mov	r2, #1472
-	ldr	r1, .L804+20
-	ldr	r0, .L804+24
-	bl	printf
-.L793:
-	ldrh	r2, [r4, #16]
-	ldr	r3, .L804+80
-	ldrh	ip, [r4, #14]
-	ldr	r7, .L804+84
-	lsrs	r1, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r3, #6]
-	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L804+88
-	strb	r2, [r3, #8]
-	ldrh	r2, [r4, #18]
-	strh	ip, [r3]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r7]	@ movhi
-	movs	r3, #0
-	strh	r2, [r1]	@ movhi
-	ldrh	r2, [r4, #20]
-	strh	r3, [r7, #2]	@ movhi
-	strb	r3, [r7, #6]
-	strb	r3, [r7, #8]
-	lsrs	r5, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r1, #6]
-	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	strh	r5, [r1, #2]	@ movhi
-	ldrh	r5, [r4, #22]
-	strb	r2, [r1, #8]
-	ldr	r2, .L804+92
-	strh	r5, [r2]	@ movhi
-	ldrh	r5, [r4, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r2, #6]
-	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	strh	r6, [r2, #2]	@ movhi
-	ldr	r6, [r4, #32]
-	strb	r5, [r2, #8]
-	ldr	r5, .L804+96
-	str	r3, [r5]
-	ldr	r5, .L804+100
-	str	r3, [r5]
-	ldr	r5, .L804+104
-	str	r3, [r5]
-	ldr	r5, .L804+108
-	str	r3, [r5]
-	ldr	r5, .L804+112
-	str	r6, [r5]
-	mov	r6, r1
-	ldr	r5, .L804+116
-	str	r3, [r5]
-	ldr	r5, .L804+120
-	str	r3, [r5]
-	ldr	r5, .L804+124
-	ldr	lr, [r4, #40]
-	str	r3, [r5]
-	ldr	r3, .L804+128
-	ldr	r5, [r3]
-	cmp	lr, r5
-	mov	r5, r2
-	it	hi
-	strhi	lr, [r3]
-	ldr	r3, .L804+132
-	ldr	r2, [r4, #36]
-	ldr	r1, [r3]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3]
-	movw	r3, #65535
-	cmp	ip, r3
-	beq	.L796
-	ldr	r0, .L804+80
-	bl	make_superblock
-.L796:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L797
-	ldr	r0, .L804+88
-	bl	make_superblock
-.L797:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L798
-	ldr	r0, .L804+92
-	bl	make_superblock
-.L798:
-	ldrh	r2, [r7]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L799
-	ldr	r0, .L804+84
-	bl	make_superblock
-.L799:
-	movs	r0, #0
-	b	.L783
-.L789:
-	ldrh	r2, [r6]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	ldr	r2, [r8]
-	str	r2, [r4, #8]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L787
-	ldr	r2, [r8]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L787
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L788
-.L787:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L786
-.L805:
+	bl	ftl_memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L443:
 	.align	2
-.L804:
-	.word	.LANCHOR5
-	.word	.LANCHOR148
-	.word	.LANCHOR42
-	.word	.LANCHOR79
-	.word	1179929683
-	.word	.LANCHOR151
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LANCHOR39
-	.word	.LANCHOR1
-	.word	.LANCHOR10
-	.word	.LANCHOR152
-	.word	.LANCHOR61
-	.word	.LANCHOR19
-	.word	.LANCHOR12
-	.word	.LANCHOR34
-	.word	.LANCHOR7
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR78
-	.word	.LANCHOR51
-	.word	.LANCHOR80
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR76
-	.word	.LANCHOR65
+.L442:
+	.word	.LANCHOR69
+	.word	.LANCHOR21
 	.word	.LANCHOR70
+	.word	.LANCHOR68
 	.word	.LANCHOR71
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FlashProgPages,"ax",%progbits
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
-	.global	FlashProgPages
+	.global	FlashGetBadBlockList
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgPages, %function
-FlashProgPages:
-	@ args = 0, pretend = 0, frame = 48
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #48
-	str	r3, [sp, #12]
-	mov	r10, r1
+	push	{r3, r4, r5, lr}
+	mov	r2, #256
+	mov	r5, r1
+	movs	r1, #255
 	mov	r4, r0
-	mov	r5, r0
-	ldr	r3, .L846
-	mov	r8, #0
-	ldr	fp, .L846+48
-	str	r2, [sp, #8]
-	ldrh	r3, [r3, #12]
-	str	r3, [sp]
-	lsls	r3, r3, #3
-	str	r3, [sp, #4]
-.L807:
-	cmp	r8, r10
-	bne	.L820
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L838
-	ldr	r6, .L846+4
-	movs	r5, #0
-.L822:
-	cmp	r8, r5
-	beq	.L838
-	ldr	r7, .L846+8
-	movs	r1, #0
-	ldr	r2, [r6]
-	add	r0, sp, #28
-	ldr	r3, [r7]
-	str	r1, [r2]
-	str	r1, [r3]
-	ldr	r1, [r4, #4]
-	str	r2, [sp, #36]
-	ldr	r2, [sp, #8]
-	str	r1, [sp, #32]
-	movs	r1, #1
-	str	r3, [sp, #40]
-	bl	FlashReadPages
-	ldr	r10, [sp, #28]
-	cmp	r10, #-1
-	bne	.L823
-	ldr	r1, [r4, #4]
-	ldr	r0, .L846+12
-	bl	printf
-	str	r10, [r4]
-.L823:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L824
-	ldr	r2, [r3]
-	ldr	r3, [r7]
+	bl	ftl_memset
+	ldr	r3, .L451
+	mov	r1, r5
+	mov	r0, r4
 	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L824
-	ldr	r1, [r4, #4]
-	ldr	r0, .L846+16
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L824:
+	blx	r3
+	uxth	r0, r0
+	cmp	r0, #50
+	bls	.L445
+	mov	r2, #256
+	movs	r1, #255
+	mov	r0, r4
+	bl	ftl_memset
+	movs	r0, #0
+.L445:
+	ldr	r3, .L451+4
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L450
+	add	r1, r4, r0, lsl #1
+	mov	r3, r4
+.L447:
+	cmp	r3, r1
+	bne	.L448
+.L450:
+	pop	{r3, r4, r5, pc}
+.L448:
+	ldrh	r2, [r3]
+	lsrs	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	b	.L447
+.L452:
+	.align	2
+.L451:
+	.word	.LANCHOR78
+	.word	.LANCHOR0
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r1
+	ldr	r3, .L482
+	mov	r4, r0
+	mov	r10, #0
+	ldrh	r2, [r3, #12]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+.L455:
+	cmp	r10, fp
+	bne	.L466
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L466:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L825
-	ldr	r2, [r3]
-	ldr	r3, [r6]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L825
-	ldr	r1, [r4, #4]
-	ldr	r0, .L846+20
+	cbz	r3, .L456
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L457
+.L456:
+	movs	r2, #90
+	ldr	r1, .L482+4
+	ldr	r0, .L482+8
 	bl	printf
+.L457:
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r4, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r0, [sp, #8]
+	cmp	r0, #3
+	bls	.L458
 	mov	r3, #-1
 	str	r3, [r4]
-.L825:
-	adds	r5, r5, #1
+.L459:
+	add	r10, r10, #1
 	adds	r4, r4, #20
-	b	.L822
-.L820:
-	ldr	r3, [r5, #8]
-	cbz	r3, .L808
-	ldr	r3, [r5, #12]
-	cbnz	r3, .L809
-.L808:
-	movs	r2, #134
-	ldr	r1, .L846+24
-	ldr	r0, .L846+28
-	bl	printf
-.L809:
-	add	r2, sp, #20
-	add	r1, sp, #24
-	ldr	r0, [r5, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r6, [sp, #20]
-	cmp	r6, #3
-	bls	.L810
-.L845:
-	mov	r3, #-1
-	str	r3, [r5]
-	b	.L811
-.L810:
-	cbnz	r6, .L812
-	ldr	r3, [sp, #24]
-	ldr	r2, [sp, #4]
-	cmp	r2, r3
-	bls	.L812
-	ldr	r5, .L846+24
-	ldr	r7, .L846+32
-	b	.L844
-.L814:
-	mov	r3, #-1
-	ldr	r2, [r4, #-16]
-	str	r3, [r4, #-20]
-	mov	r1, r5
-	mov	r0, r7
-	adds	r6, r6, #1
-	bl	printf
-	movs	r3, #16
-	movs	r2, #4
-	ldr	r1, [r4, #-12]
-	ldr	r0, .L846+36
-	bl	rknand_print_hex
-	movs	r3, #4
-	ldr	r1, [r4, #-8]
-	mov	r2, r3
-	ldr	r0, .L846+40
-	bl	rknand_print_hex
-.L844:
-	cmp	r6, r10
-	add	r4, r4, #20
-	bne	.L814
-.L838:
-	movs	r0, #0
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L812:
-	ldr	r1, [r5, #8]
-	lsls	r3, r1, #26
-	beq	.L827
-	ldr	r3, .L846+4
-	ldr	r6, [r3]
-	cmp	r1, r6
-	beq	.L815
-	ldr	r3, .L846+44
-	mov	r0, r6
-	ldrh	r2, [r3]
-	lsls	r2, r2, #9
-	bl	ftl_memcpy
-.L815:
-	ldr	r3, [r5, #12]
-	mov	r2, r6
-	ldr	r1, [sp, #24]
-	ldrb	r0, [sp, #20]	@ zero_extendqisi2
-	ldr	r7, [fp, #8]
-	blx	r7
-	cbnz	r0, .L816
-	str	r0, [r5]
-.L817:
-	ldr	r3, .L846
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L811
-	ldr	r0, [sp]
-	add	r2, r6, #2048
-	ldr	r3, [r5, #12]
-	ldr	r1, [sp, #24]
-	ldr	r6, [fp, #8]
+	b	.L455
+.L458:
+	ldr	r5, [r4, #8]
+	uxtb	r0, r0
+	ldr	r8, .L482+20
+	ldr	r7, .L482+12
+	tst	r5, #63
+	ldr	r3, [r4, #12]
+	it	ne
+	ldrne	r5, [r8]
+	ldr	r1, [sp, #12]
+	ldr	r6, [r7, #12]
+	mov	r2, r5
+	blx	r6
+	ldr	r3, [sp, #4]
+	str	r0, [r4]
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L462
+	ldr	r0, [sp]
+	add	r2, r5, #2048
+	ldr	r3, [r4, #12]
+	ldr	r1, [sp, #12]
+	ldr	r7, [r7, #12]
 	adds	r3, r3, #8
 	add	r1, r1, r0
-	ldrb	r0, [sp, #20]	@ zero_extendqisi2
-	blx	r6
-	cmp	r0, #0
-	bne	.L845
-.L811:
-	add	r8, r8, #1
-	adds	r5, r5, #20
-	b	.L807
-.L827:
-	mov	r6, r1
-	b	.L815
-.L816:
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	blx	r7
+	adds	r3, r0, #1
+	beq	.L463
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3, #12]
+	adds	r2, r2, #1
+	bne	.L464
+	ldr	r2, [r3, #8]
+	adds	r2, r2, #1
+	bne	.L464
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L464
+.L463:
 	mov	r3, #-1
-	str	r3, [r5]
-	b	.L817
-.L847:
+	str	r3, [r4]
+.L464:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L462
+	cmp	r0, #256
+	it	eq
+	streq	r0, [r4]
+.L462:
+	ldr	r3, [r8]
+	cmp	r5, r3
+	bne	.L459
+	ldr	r0, [r4, #8]
+	cmp	r5, r0
+	beq	.L459
+	ldr	r3, .L482+16
+	mov	r1, r5
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+	b	.L459
+.L483:
 	.align	2
-.L846:
+.L482:
 	.word	.LANCHOR0
-	.word	.LANCHOR120
-	.word	.LANCHOR122
-	.word	.LC85
-	.word	.LC86
-	.word	.LC87
-	.word	.LANCHOR153
+	.word	.LANCHOR137
 	.word	.LC1
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
+	.word	.LANCHOR78
 	.word	.LANCHOR12
-	.word	.LANCHOR105
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	.word	.LANCHOR111
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlLowFormatEraseBlock
+	.global	FtlLoadFactoryBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L891
+	ldr	r3, .L494
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r7, .L891+4
-	mov	r8, #0
-	mov	r6, r1
-	mov	r5, r8
-	str	r0, [r3]
-	mov	r4, r8
-	ldr	r3, .L891+8
-	mov	fp, #20
-	ldr	r10, [r7]
-	str	r0, [sp, #4]
-	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L891+12
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L891+16
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L891+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #24]
-.L849:
-	ldr	r3, [sp, #12]
-	uxth	r2, r8
-	cmp	r3, r2
-	bhi	.L853
-	cmp	r5, #0
-	beq	.L848
-	mov	r0, r10
-	mov	r8, #0
-	mov	r10, #20
-	mov	r2, r5
-	movs	r1, #0
-	bl	FlashEraseBlocks
-.L856:
-	uxth	r3, r8
-	cmp	r5, r3
-	bhi	.L858
-	cmp	r6, #0
-	beq	.L874
-	ldr	r3, .L891+24
-	mov	r10, #1
-	ldrh	r3, [r3]
-	str	r3, [sp, #8]
-.L859:
-	movs	r7, #0
-.L868:
-	ldr	r3, .L891+8
-	mov	r8, #0
-	mov	r5, r8
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L891+4
-	ldr	fp, [r3]
-	ldr	r3, .L891+28
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L891+12
+	movs	r6, #0
+	ldr	r5, .L494+4
 	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	ldr	r3, .L891+20
+	ldr	r7, .L494+8
+	ldr	r10, .L494+20
+	str	r3, [r5, #8]
+	ldr	r3, .L494+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L485:
+	ldr	r3, .L494+16
 	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-.L860:
-	ldr	r3, [sp, #16]
-	uxth	r2, r8
-	cmp	r3, r2
-	bhi	.L863
-	cbz	r5, .L848
-	mov	r0, fp
-	ldr	fp, .L891+4
-	movs	r3, #1
-	mov	r2, r10
-	mov	r1, r5
-	mov	r8, #0
-	bl	FlashProgPages
-	movs	r3, #20
-.L865:
-	uxth	r2, r8
-	cmp	r5, r2
-	bhi	.L867
-	adds	r7, r7, #1
-	ldr	r2, [sp, #8]
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L868
-	ldr	r8, .L891+4
-	movs	r7, #0
-	mov	fp, #20
-.L869:
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L871
-	ldr	r3, [sp, #4]
-	cmp	r3, #63
-	bls	.L872
-	cbz	r6, .L848
-.L872:
-	ldr	r3, .L891+4
-	mov	r2, r5
-	mov	r1, r10
-	ldr	r0, [r3]
-	bl	FlashEraseBlocks
-.L848:
-	mov	r0, r4
-	add	sp, sp, #32
-	@ sp needed
+	cmp	r6, r3
+	bcc	.L490
+	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L853:
-	mul	r2, fp, r8
-	movs	r3, #0
-	ldr	r1, [sp, #4]
-	str	r3, [r10, r2]
-	ldr	r3, .L891+32
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
-	bl	V2P_block
-	str	r0, [sp, #8]
-	cbz	r6, .L850
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L851
-.L850:
-	ldr	r0, [sp, #8]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L852
-	ldr	r3, [sp, #8]
-	mla	r1, fp, r5, r10
-	lsls	r2, r3, #10
-	ldr	r3, [sp, #16]
-	str	r2, [r1, #4]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #24]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #20]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L851:
-	add	r8, r8, #1
-	b	.L849
-.L852:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L851
-.L858:
-	mul	r3, r10, r8
-	ldr	r2, [r7]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L857
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.L857:
-	add	r8, r8, #1
-	b	.L856
-.L874:
-	movs	r3, #2
-	mov	r10, r6
-	str	r3, [sp, #8]
-	b	.L859
-.L863:
-	movs	r3, #20
-	ldr	r1, [sp, #4]
-	mul	r2, r3, r8
-	movs	r3, #0
-	str	r3, [fp, r2]
-	ldr	r3, .L891+32
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
-	bl	V2P_block
-	str	r0, [sp, #12]
-	cbz	r6, .L861
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L862
-.L861:
-	ldr	r0, [sp, #12]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L862
-	movs	r3, #20
-	mla	r1, r3, r5, fp
-	ldr	r3, [sp, #12]
-	add	r2, r7, r3, lsl #10
-	ldr	r3, [sp, #20]
-	str	r2, [r1, #4]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #28]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #24]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L862:
-	add	r8, r8, #1
-	b	.L860
-.L867:
-	mul	r2, r3, r8
-	ldr	r1, [fp]
-	adds	r0, r1, r2
-	ldr	r2, [r1, r2]
-	cbz	r2, .L866
-	ldr	r0, [r0, #4]
-	adds	r4, r4, #1
-	str	r3, [sp, #12]
+.L490:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L494+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
 	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-	ldr	r3, [sp, #12]
-.L866:
-	add	r8, r8, #1
-	b	.L865
-.L871:
-	cbz	r6, .L870
-	mul	r3, fp, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbnz	r3, .L870
-	ldr	r0, [r1, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
-.L870:
-	adds	r7, r7, #1
-	b	.L869
-.L892:
+.L486:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L488
+	mla	r3, r6, r3, r4
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, fp
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L487
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L487
+	strh	r4, [r7]	@ movhi
+.L488:
+	adds	r6, r6, #1
+	b	.L485
+.L487:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L486
+.L495:
 	.align	2
-.L891:
-	.word	.LANCHOR111
+.L494:
 	.word	.LANCHOR106
-	.word	.LANCHOR3
-	.word	.LANCHOR119
-	.word	.LANCHOR124
-	.word	.LANCHOR24
-	.word	.LANCHOR20
-	.word	.LANCHOR118
-	.word	.LANCHOR13
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.word	.LANCHOR138
+	.word	.LANCHOR37+10
+	.word	.LANCHOR114
+	.word	.LANCHOR10
+	.word	.LANCHOR17
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	FtlGetLastWrittenPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r2, #65535
-	ldrh	r3, [r0]
-	mov	r4, r0
-	ldr	r5, [r0, #12]
-	cmp	r3, r2
-	bne	.L894
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L895
-	movw	r2, #641
-	ldr	r1, .L903
-	ldr	r0, .L903+4
-	bl	printf
-.L895:
-	ldrh	r3, [r4, #8]
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L508
+	sub	sp, sp, #88
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L508+4
+	mov	r6, r1
+	add	r0, sp, #4
+	movs	r1, #1
+	ldrh	r5, [r3]
+	ldr	r3, .L508+8
+	subs	r5, r5, #1
+	ldr	r3, [r3]
+	sxth	r5, r5
+	str	r3, [sp, #12]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	movs	r3, #0
-	strh	r0, [r5]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [r4]	@ movhi
-	ldr	r3, [r4, #28]
+	bne	.L499
+	mov	r8, #0
+.L500:
+	cmp	r8, r5
+	ble	.L503
+.L499:
+	mov	r0, r5
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L503:
+	add	r3, r8, r5
+	mov	r2, r6
+	add	r3, r3, r3, lsr #31
+	movs	r1, #1
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	str	r3, [r4, #28]
-.L896:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L894:
-	ldrh	r5, [r5, r3, lsl #1]
-	movs	r1, #255
-	ldrh	r3, [r0, #2]
-	ldr	r2, .L903+8
-	ldr	r7, .L903+12
-	ldr	r6, [r0, #24]
-	orr	r3, r3, r5, lsl #10
-	ldr	r0, [r7]
-	str	r3, [r2, #4]
-	ldr	r3, .L903+16
-	str	r0, [r2, #8]
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r5, [r3, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L903+20
-	ldrh	r2, [r3]
-	lsls	r2, r2, #3
-	bl	ftl_memset
-	ldrh	ip, [r4, #6]
-	movs	r3, #0
-	ldr	r1, [r7]
-	mov	r2, r3
-.L897:
-	uxth	r0, r3
-	cmp	ip, r0
-	bhi	.L899
-	movs	r2, #1
-	movs	r3, #0
-	mov	r1, r2
-	ldr	r0, .L903+8
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	mov	r0, r4
+	bne	.L501
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	bl	ftl_map_blk_gc
-	b	.L896
-.L899:
-	ldr	r0, [r6, r3, lsl #2]
-	cmp	r5, r0, lsr #10
-	bne	.L898
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r7, r1, r2, lsl #3
-	ldr	r0, [r6, r3, lsl #2]
-	str	r0, [r7, #4]
-.L898:
+	bne	.L501
+	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	b	.L897
-.L904:
+	beq	.L501
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L500
+.L501:
+	adds	r4, r4, #1
+	sxth	r8, r4
+	b	.L500
+.L509:
 	.align	2
-.L903:
-	.word	.LANCHOR154
-	.word	.LC1
-	.word	.LANCHOR148
-	.word	.LANCHOR115
-	.word	.LANCHOR123
+.L508:
 	.word	.LANCHOR20
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
+	.word	.LANCHOR19
+	.word	.LANCHOR112
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
-	.global	FtlMapWritePage
+	.global	FtlScanSysBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r8, .L929+28
-	mov	r7, r1
-	movs	r6, #0
-	str	r2, [sp, #4]
-	mov	fp, r8
-.L906:
-	ldr	r2, .L929
-	ldr	r3, [r2]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L591
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L591+4
+	ldr	r2, [r5]
+	ldr	r6, .L591+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L591+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L591+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L591+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L591+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L591+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #16
+	movs	r1, #255
+	ldr	r0, .L591+32
+	bl	ftl_memset
+	ldr	r3, .L591+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L511:
+	ldr	r3, .L591+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bls	.L552
+	ldr	r3, .L591+44
+	movs	r5, #0
+	ldr	r1, .L591+48
+	mov	fp, r5
+	movs	r7, #20
+	ldrh	r8, [r3]
+	ldr	r3, .L591+52
+	ldr	r2, [r1]
+	ldr	r1, .L591+56
+	ldr	r6, [r3]
+	ldr	r3, .L591+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L591+64
+	b	.L553
+.L513:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L512
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L512:
+	adds	r5, r5, #1
+.L553:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L513
+	cmp	fp, #0
+	bne	.L514
+.L551:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L511
+.L514:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L515:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L551
+	ldr	r3, .L591+52
+	mov	r8, #20
+	mul	r8, r8, r7
+	ldr	r3, [r3]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
-	str	r3, [r2]
-	ldrh	r3, [r8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L518
+	mov	r10, #16
+.L520:
+	ldr	r3, .L591+52
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6]
+	movw	r3, #65535
 	cmp	r2, r3
-	bge	.L907
-	ldrh	r2, [r4]
+	ldr	r3, .L591+52
+	ldr	r3, [r3]
+	bne	.L517
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L591+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	bne	.L518
+.L519:
+	movs	r1, #1
+	b	.L590
+.L517:
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L518
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L520
+	b	.L519
+.L518:
+	ldr	r3, .L591+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L521
+	cmp	r2, r3
+	bhi	.L522
+.L521:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L591+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L522:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L524
+	bhi	.L525
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L526
+.L523:
+	adds	r7, r7, #1
+	b	.L515
+.L525:
+	movw	r3, #61634
+	cmp	r2, r3
+	beq	.L527
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L908
-.L907:
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.L908:
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L909
-	movw	r2, #699
-	ldr	r1, .L929+4
-	ldr	r0, .L929+8
-	bl	printf
-.L909:
-	ldrh	r2, [r4]
-	ldrh	r3, [r4, #10]
+	bne	.L523
+	movs	r1, #0
+.L590:
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+	b	.L523
+.L527:
+	ldr	r3, .L591+8
+	ldrh	r2, [r3]
+	ldr	r3, .L591
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bcc	.L910
-	mov	r2, #700
-	ldr	r1, .L929+4
-	ldr	r0, .L929+8
+	bls	.L529
+	movw	r2, #1225
+	ldr	r1, .L591+72
+	ldr	r0, .L591+76
 	bl	printf
-.L910:
-	ldrh	r2, [r4]
-	movs	r1, #0
-	ldr	r3, [r4, #12]
-	ldr	r5, .L929+12
-	ldrh	r10, [r3, r2, lsl #1]
-	ldrh	r2, [r4, #2]
-	ldr	r3, [sp, #4]
-	orr	r2, r2, r10, lsl #10
-	str	r3, [r5, #8]
-	str	r2, [r5, #4]
-	ldr	r2, .L929+16
+.L529:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L591+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L530:
+	cmp	r3, r10
+	bgt	.L536
+	cmp	r3, #0
+	bge	.L568
+	b	.L523
+.L536:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L531
+	ldr	r2, [ip]
+	cbnz	r2, .L532
+	cmp	r1, r0
+	ittt	ne
+	ldrne	r2, .L591+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L532:
+	ldr	r2, .L591+20
+	uxth	r10, r3
 	ldr	r0, [r2]
-	movs	r2, #16
-	str	r0, [r5, #12]
-	bl	ftl_memset
-	ldr	r2, [r5, #12]
-	movs	r3, #1
-	ldr	r1, [r4, #28]
-	mov	r0, r5
-	strh	r7, [r2, #8]	@ movhi
-	str	r1, [r2, #4]
-	ldrh	r1, [r4, #4]
-	strh	r10, [r2, #2]	@ movhi
-	strh	r1, [r2]	@ movhi
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r1, [r5]
+	movs	r2, #0
+.L533:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L534
+	ldr	r2, [r6, #4]
+	cmp	r3, #0
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L523
+	ldr	r2, .L591+8
+	ldrh	r0, [r2]
+	ldr	r2, .L591
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L523
+.L568:
+	ldr	r2, .L591+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L591+20
+.L588:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L523
+.L534:
+	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r1, #1
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L911
-	ldr	r1, [r5, #4]
-	adds	r6, r6, #1
-	ldr	r0, .L929+20
-	uxth	r6, r6
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L533
+.L531:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L530
+.L592:
+	.align	2
+.L591:
+	.word	.LANCHOR30
+	.word	.LANCHOR35
+	.word	.LANCHOR130
+	.word	.LANCHOR125
+	.word	.LANCHOR27
+	.word	.LANCHOR119
+	.word	.LANCHOR122
+	.word	.LANCHOR36
+	.word	.LANCHOR139
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.word	.LANCHOR3
+	.word	.LANCHOR65
+	.word	.LANCHOR103
+	.word	.LANCHOR24
+	.word	.LANCHOR64
+	.word	.LANCHOR13
+	.word	.LANCHOR82
+	.word	.LANCHOR140
+	.word	.LC1
+.L526:
+	ldr	r8, .L593+12
+	ldr	r10, .L593+20
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L539
+	movw	r2, #1266
+	ldr	r1, .L593
+	ldr	r0, .L593+4
 	bl	printf
-	ldrh	r2, [r4, #2]
-	cmp	r2, #2
-	ittt	ls
-	ldrhls	r2, [fp]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
-	cmp	r6, #3
-	bls	.L913
-	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L929+24
+.L539:
+	ldr	r2, .L593+8
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L540:
+	cmp	r3, r10
+	ble	.L545
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L541
+	ldr	r2, [r0]
+	cbnz	r2, .L542
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L593+12
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L542:
+	ldr	r2, .L593+16
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L543:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L544
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L545:
+	cmp	r3, #0
+	blt	.L523
+	ldr	r2, .L593+20
+	ldr	ip, .L593+12
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L523
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L593+16
+	b	.L588
+.L544:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L543
+.L541:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L540
+.L524:
+	ldr	r8, .L593+40
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L547
+.L589:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L523
+.L547:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L548
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L548:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L549
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L589
+.L549:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L523
+.L552:
+	ldr	r3, .L593+24
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L554
+.L557:
+	ldr	r3, .L593+16
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L555
+.L556:
+	ldr	r3, .L593+28
+	ldrh	r2, [r3]
+	ldr	r3, .L593+32
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L587
+	movw	r2, #1391
+	ldr	r1, .L593
+	ldr	r0, .L593+4
 	bl	printf
-.L914:
-	b	.L914
-.L913:
-	ldr	r3, [r4, #32]
-	cmp	r3, #0
-	beq	.L906
-.L928:
-	b	.L928
-.L911:
-	cmp	r2, #1
-	beq	.L917
-	cmp	r1, #256
-	beq	.L917
-	ldr	r0, [r4, #36]
-	cbz	r0, .L918
-.L917:
-	movs	r3, #0
-	str	r3, [r4, #36]
-	b	.L906
-.L918:
-	ldr	r2, [r5, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r7, lsl #2]
-	add	sp, sp, #8
+.L587:
+	movs	r0, #0
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L930:
+.L554:
+	ldr	r1, .L593+28
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L557
+	ldr	r5, .L593+32
+	ldr	r0, [r5]
+.L558:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L557
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L558
+	ldr	r3, .L593+36
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L559:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L557
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L559
+.L555:
+	ldr	r3, .L593+12
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L556
+	ldr	r5, .L593+20
+	ldrh	r1, [r5]
+.L564:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L556
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L564
+	ldr	r2, .L593+8
+	movs	r0, #0
+	ldr	r2, [r2]
+.L565:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L556
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L565
+.L594:
 	.align	2
-.L929:
-	.word	.LANCHOR66
-	.word	.LANCHOR155
+.L593:
+	.word	.LANCHOR140
 	.word	.LC1
-	.word	.LANCHOR148
-	.word	.LANCHOR123
-	.word	.LC88
-	.word	.LC89
-	.word	.LANCHOR20
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.load_l2p_region,"ax",%progbits
+	.word	.LANCHOR122
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR119
+	.word	.LANCHOR130
+	.word	.LANCHOR30
+	.word	.LANCHOR125
+	.word	.LANCHOR139
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	FtlLoadBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L938
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	mov	r10, r1
-	ldrh	r2, [r3]
-	str	r3, [sp, #4]
-	cmp	r2, r0
-	bcs	.L932
-	movw	r2, #485
-	ldr	r1, .L938+4
-	ldr	r0, .L938+8
-	bl	printf
-.L932:
-	ldr	fp, .L938+48
-	movs	r4, #12
-	ldr	r7, .L938+12
-	ldr	r3, [fp]
-	ldr	r8, [r3, r5, lsl #2]
-	cmp	r8, #0
-	bne	.L933
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	movs	r1, #255
-	adds	r0, r2, r4
-	ldr	r2, .L938+16
-	ldr	r0, [r0, #8]
-	ldrh	r2, [r2]
-	bl	ftl_memset
-	ldr	r2, [r7]
-	adds	r1, r2, r4
-	strh	r5, [r2, r4]	@ movhi
-	str	r8, [r1, #4]
-.L934:
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L933:
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	ldr	r6, .L938+20
-	add	r2, r2, r4
-	mov	r0, r6
-	ldr	r2, [r2, #8]
-	str	r8, [r6, #4]
-	str	r2, [r6, #8]
-	ldr	r2, .L938+24
-	ldr	r2, [r2]
-	str	r2, [r6, #12]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r8, .L624+40
+	ldr	r4, .L624
+	ldr	r3, [r8]
+	ldr	r7, .L624+4
+	mov	r10, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L624+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L596:
+	ldrh	r3, [r7]
+	subs	r3, r3, #15
+	cmp	r3, r5
+	bgt	.L599
+	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
+	mov	r0, r10
+	str	r3, [r4, #4]
 	bl	FlashReadPages
-	ldr	r10, [r6, #12]
-	ldrh	r2, [r10, #8]
-	cmp	r2, r5
-	beq	.L935
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L938+28
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r6, #12]
-	mov	r2, r3
-	ldr	r0, .L938+32
-	bl	rknand_print_hex
-	ldr	r3, [sp, #4]
-	movs	r2, #4
-	ldr	r1, [fp]
-	ldr	r0, .L938+36
-	ldrh	r3, [r3]
-	bl	rknand_print_hex
-.L936:
-	ldrh	r3, [r10, #8]
-	cmp	r3, r5
-	beq	.L937
-	mov	r2, #508
-	ldr	r1, .L938+4
-	ldr	r0, .L938+8
-	bl	printf
-.L937:
-	ldr	r3, [r7]
-	movs	r1, #0
-	adds	r2, r3, r4
-	str	r1, [r2, #4]
-	strh	r5, [r3, r4]	@ movhi
-	b	.L934
-.L935:
-	ldr	r2, [r6]
-	cmp	r2, #256
-	bne	.L936
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L938+40
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L597
+	ldr	r3, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+.L597:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L598
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L598
+	ldr	r3, .L624+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L599:
+	ldr	r5, .L624+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L613
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L603
+	lsls	r3, r3, #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L624
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L603
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L603
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L603
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L603:
+	ldr	r10, .L624
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L605:
+	cmp	r7, #0
+	bge	.L608
+	movs	r2, #253
+	ldr	r1, .L624+16
+	ldr	r0, .L624+20
 	bl	printf
-	ldr	r3, [r7]
-	mov	r1, r5
-	ldr	r0, .L938+44
-	add	r3, r3, r4
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-	b	.L936
-.L939:
+.L607:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L610
+	ldr	r3, .L624+24
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L610
+	ldr	r3, .L624+28
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L610
+	cmp	r0, r3
+	bcs	.L610
+	bl	FtlSysBlkNumInit
+.L610:
+	ldr	r6, .L624+32
+	movs	r5, #0
+	ldr	r7, .L624+36
+	ldr	r8, .L624+44
+.L611:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L612
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L598:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L596
+.L608:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L606
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L607
+.L606:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L605
+.L612:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L611
+.L613:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L625:
 	.align	2
-.L938:
-	.word	.LANCHOR32
-	.word	.LANCHOR156
+.L624:
+	.word	.LANCHOR138
+	.word	.LANCHOR17
+	.word	.LANCHOR114
+	.word	.LANCHOR37
+	.word	.LANCHOR141
 	.word	.LC1
-	.word	.LANCHOR55
-	.word	.LANCHOR23
-	.word	.LANCHOR148
-	.word	.LANCHOR123
-	.word	.LC90
-	.word	.LC91
-	.word	.LC92
-	.word	.LC93
-	.word	.LANCHOR140
-	.word	.LANCHOR134
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.word	.LANCHOR2
+	.word	.LANCHOR6
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR106
+	.word	.LANCHOR127
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_gc
+	.global	FlashProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
+	str	r3, [sp, #12]
+	mov	r10, r1
 	mov	r4, r0
-	ldr	r5, [r0, #12]
+	mov	r5, r0
+	ldr	r3, .L666
+	mov	r8, #0
+	ldr	fp, .L666+48
+	str	r2, [sp, #8]
+	ldrh	r3, [r3, #12]
 	str	r3, [sp]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #8]
-	subs	r3, r3, #5
+	lsls	r3, r3, #3
+	str	r3, [sp, #4]
+.L627:
+	cmp	r8, r10
+	bne	.L640
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L658
+	ldr	r6, .L666+4
+	movs	r5, #0
+.L642:
+	cmp	r8, r5
+	beq	.L658
+	ldr	r7, .L666+8
+	movs	r1, #0
+	ldr	r2, [r6]
+	add	r0, sp, #28
+	ldr	r3, [r7]
+	str	r1, [r2]
+	str	r1, [r3]
+	ldr	r1, [r4, #4]
+	str	r2, [sp, #36]
+	ldr	r2, [sp, #8]
+	str	r1, [sp, #32]
+	movs	r1, #1
+	str	r3, [sp, #40]
+	bl	FlashReadPages
+	ldr	r10, [sp, #28]
+	cmp	r10, #-1
+	bne	.L643
+	ldr	r1, [r4, #4]
+	ldr	r0, .L666+12
+	bl	printf
+	str	r10, [r4]
+.L643:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L644
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	blt	.L941
-	uxth	r0, r0
-	ldrh	r8, [r5, r0, lsl #1]
-	cmp	r8, #0
-	beq	.L941
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L941
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L956
-	ldrh	r3, [r3]
+	beq	.L644
+	ldr	r1, [r4, #4]
+	ldr	r0, .L666+16
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L644:
+	ldr	r3, [r4, #8]
+	cbz	r3, .L645
+	ldr	r2, [r3]
+	ldr	r3, [r6]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bcc	.L942
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L942:
-	ldr	r5, .L956+4
-	movs	r6, #0
-.L943:
-	ldrh	r3, [r4, #6]
-	uxth	r10, r6
-	cmp	r3, r10
-	bhi	.L950
-	movs	r1, #1
-	mov	r0, r8
-	bl	FtlFreeSysBlkQueueIn
-	movs	r3, #0
-	str	r3, [r4, #32]
-.L941:
-	ldr	r3, .L956
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+	beq	.L645
+	ldr	r1, [r4, #4]
+	ldr	r0, .L666+20
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L645:
+	adds	r5, r5, #1
+	adds	r4, r4, #20
+	b	.L642
+.L640:
+	ldr	r3, [r5, #8]
+	cbz	r3, .L628
+	ldr	r3, [r5, #12]
+	cbnz	r3, .L629
+.L628:
+	movs	r2, #134
+	ldr	r1, .L666+24
+	ldr	r0, .L666+28
+	bl	printf
+.L629:
+	add	r2, sp, #20
+	add	r1, sp, #24
+	ldr	r0, [r5, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r6, [sp, #20]
+	cmp	r6, #3
+	bls	.L630
+.L665:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L631
+.L630:
+	cbnz	r6, .L632
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bcc	.L951
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L951:
+	bls	.L632
+	ldr	r5, .L666+24
+	ldr	r7, .L666+32
+	b	.L664
+.L634:
+	mov	r3, #-1
+	ldr	r2, [r4, #-16]
+	str	r3, [r4, #-20]
+	mov	r1, r5
+	mov	r0, r7
+	adds	r6, r6, #1
+	bl	printf
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L666+36
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L666+40
+	bl	rknand_print_hex
+.L664:
+	cmp	r6, r10
+	add	r4, r4, #20
+	bne	.L634
+.L658:
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L950:
-	ldr	r3, [sp]
-	uxth	fp, r6
-	add	r3, r3, fp, lsl #2
-	str	r3, [sp, #4]
-	ldr	r3, [sp]
-	ldr	r2, [r3, fp, lsl #2]
-	cmp	r8, r2, lsr #10
-	bne	.L944
-	ldr	r3, .L956+8
-	str	r2, [r5, #4]
-	movs	r2, #1
-	ldr	r0, .L956+4
-	ldr	r1, [r3]
-	str	r1, [r5, #8]
-	ldr	r1, .L956+12
-	ldr	r7, [r1]
-	mov	r1, r2
-	str	r7, [r5, #12]
-	bl	FlashReadPages
-	ldrh	r2, [r7, #8]
-	cmp	r2, r10
-	beq	.L945
-	movw	r2, #611
-	ldr	r1, .L956+16
-	ldr	r0, .L956+20
-	bl	printf
-.L945:
-	ldr	r2, [r5]
-	adds	r2, r2, #1
-	bne	.L946
-.L948:
-	ldr	r2, [sp, #4]
-	movs	r3, #0
-	str	r3, [r2]
-.L947:
-	b	.L947
-.L946:
-	ldrh	r2, [r7, #8]
-	cmp	r2, r10
-	bne	.L948
-	ldrh	r1, [r7]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	bne	.L948
-	ldr	r2, [r5, #8]
-	mov	r1, fp
-	mov	r0, r4
-	bl	FtlMapWritePage
-.L944:
-	adds	r6, r6, #1
-	b	.L943
-.L957:
+.L632:
+	ldr	r1, [r5, #8]
+	lsls	r3, r1, #26
+	beq	.L647
+	ldr	r3, .L666+4
+	ldr	r6, [r3]
+	cmp	r1, r6
+	beq	.L635
+	ldr	r3, .L666+44
+	mov	r0, r6
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+.L635:
+	ldr	r3, [r5, #12]
+	mov	r2, r6
+	ldr	r1, [sp, #24]
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	ldr	r7, [fp, #8]
+	blx	r7
+	cbnz	r0, .L636
+	str	r0, [r5]
+.L637:
+	ldr	r3, .L666
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L631
+	ldr	r0, [sp]
+	add	r2, r6, #2048
+	ldr	r3, [r5, #12]
+	ldr	r1, [sp, #24]
+	ldr	r6, [fp, #8]
+	adds	r3, r3, #8
+	add	r1, r1, r0
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	blx	r6
+	cmp	r0, #0
+	bne	.L665
+.L631:
+	add	r8, r8, #1
+	adds	r5, r5, #20
+	b	.L627
+.L647:
+	mov	r6, r1
+	b	.L635
+.L636:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L637
+.L667:
 	.align	2
-.L956:
-	.word	.LANCHOR20
-	.word	.LANCHOR148
-	.word	.LANCHOR116
-	.word	.LANCHOR123
-	.word	.LANCHOR157
+.L666:
+	.word	.LANCHOR0
+	.word	.LANCHOR111
+	.word	.LANCHOR113
+	.word	.LC11
+	.word	.LC12
+	.word	.LC13
+	.word	.LANCHOR142
 	.word	.LC1
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR12
+	.word	.LANCHOR78
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlMapTblRecovery
+	.global	FtlLowFormatEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #16]
-	movs	r1, #0
+	ldr	r3, .L711
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrh	fp, [r0, #6]
-	mov	r4, r0
-	movs	r6, #0
-	ldr	r8, [r0, #24]
+	sub	sp, sp, #32
+	ldr	r7, .L711+4
+	mov	r8, #0
+	mov	r6, r1
+	mov	r5, r8
+	str	r0, [r3]
+	mov	r4, r8
+	ldr	r3, .L711+8
+	mov	fp, #20
+	ldr	r10, [r7]
+	str	r0, [sp, #4]
+	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldrh	r3, [r0, #8]
-	lsl	r2, fp, #2
-	ldr	r10, [r0, #12]
-	mov	r0, r8
-	ldr	r5, .L985
-	str	r3, [sp, #4]
-	bl	ftl_memset
-	ldr	r3, .L985+4
-	str	r6, [r4, #32]
-	str	r6, [r4, #28]
-	ldr	r2, [r3]
-	str	r3, [sp, #8]
-	str	r2, [r5, #8]
-	ldr	r2, .L985+8
-	ldr	r7, [r2]
-	movw	r2, #65535
-	str	r7, [r5, #12]
-	strh	r2, [r4]	@ movhi
-	strh	r2, [r4, #2]	@ movhi
-	movs	r2, #1
-	str	r2, [r4, #36]
-.L959:
-	ldr	r2, [sp, #4]
-	sxth	r3, r6
-	cmp	r3, r2
-	bge	.L976
-	ldr	r2, [sp, #4]
-	subs	r2, r2, #1
-	cmp	r3, r2
-	lsl	r2, r3, #1
-	bne	.L960
-	ldrh	r0, [r10, r3, lsl #1]
-	movs	r1, #1
-	add	r5, r10, r2
-	str	r3, [sp, #4]
-	bl	FtlGetLastWrittenPage
+	ldr	r3, .L711+12
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L711+16
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L711+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+.L669:
 	ldr	r3, [sp, #12]
-	sxth	r10, r0
-	strh	r6, [r4]	@ movhi
-	movs	r6, #0
-	adds	r0, r0, #1
-	mov	r2, r3
-	ldr	r3, [sp, #4]
-	strh	r0, [r4, #2]	@ movhi
-	ldr	r3, [r2, r3, lsl #2]
-	str	r3, [r4, #28]
-	ldr	r3, .L985
-.L961:
-	sxth	r2, r6
-	cmp	r2, r10
-	ble	.L963
-.L976:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L985+12
-	ldrh	r2, [r4, #2]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L673
+	cmp	r5, #0
+	beq	.L668
+	mov	r0, r10
+	mov	r8, #0
+	mov	r10, #20
+	mov	r2, r5
+	movs	r1, #0
+	bl	FlashEraseBlocks
+.L676:
+	uxth	r3, r8
+	cmp	r5, r3
+	bhi	.L678
+	cmp	r6, #0
+	beq	.L694
+	ldr	r3, .L711+24
+	mov	r10, #1
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+.L679:
+	movs	r7, #0
+.L688:
+	ldr	r3, .L711+8
+	mov	r8, #0
+	mov	r5, r8
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L711+4
+	ldr	fp, [r3]
+	ldr	r3, .L711+28
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L711+12
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, .L711+20
 	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.L680:
+	ldr	r3, [sp, #16]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L683
+	cbz	r5, .L668
+	mov	r0, fp
+	ldr	fp, .L711+4
+	movs	r3, #1
+	mov	r2, r10
+	mov	r1, r5
+	mov	r8, #0
+	bl	FlashProgPages
+	movs	r3, #20
+.L685:
+	uxth	r2, r8
+	cmp	r5, r2
+	bhi	.L687
+	adds	r7, r7, #1
+	ldr	r2, [sp, #8]
+	uxth	r3, r7
 	cmp	r2, r3
-	bne	.L965
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L965:
-	mov	r0, r4
-	bl	ftl_map_blk_gc
+	bhi	.L688
+	ldr	r8, .L711+4
+	movs	r7, #0
+	mov	fp, #20
+.L689:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L691
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L692
+	cbz	r6, .L668
+.L692:
+	ldr	r3, .L711+4
+	mov	r2, r5
+	mov	r1, r10
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L668:
 	mov	r0, r4
-	bl	ftl_map_blk_gc
-	movs	r0, #0
-	add	sp, sp, #24
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L963:
-	ldrh	r1, [r5]
-	ldr	r0, .L985
-	str	r3, [sp, #4]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r3, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	ldr	r2, [r3]
-	adds	r2, r2, #1
-	beq	.L962
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L962
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r3, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L962:
-	adds	r6, r6, #1
-	b	.L961
-.L960:
-	ldr	r1, [sp, #8]
-	add	r2, r10, r2
-	str	r2, [sp, #16]
-	ldr	r0, .L985
-	ldr	r1, [r1]
-	str	r1, [r5, #8]
-	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L985+12
-	ldrh	r2, [r3]
-	str	r3, [sp, #20]
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r5]
-	adds	r2, r2, #1
-	beq	.L978
-	ldrh	r1, [r7]
-	ldrh	r2, [r4, #4]
+.L673:
+	mul	r2, fp, r8
+	movs	r3, #0
+	ldr	r1, [sp, #4]
+	str	r3, [r10, r2]
+	ldr	r3, .L711+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #8]
+	cbz	r6, .L670
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L671
+.L670:
+	ldr	r0, [sp, #8]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L672
+	ldr	r3, [sp, #8]
+	mla	r1, fp, r5, r10
+	lsls	r2, r3, #10
+	ldr	r3, [sp, #16]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #24]
+	mul	r2, r3, r5
 	ldr	r3, [sp, #20]
-	cmp	r1, r2
-	bne	.L978
-	ldrh	r1, [r7, #8]
-	movw	r2, #64245
-	cmp	r1, r2
-	beq	.L967
-.L978:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L671:
+	add	r8, r8, #1
+	b	.L669
+.L672:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L671
+.L678:
+	mul	r3, r10, r8
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L677
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L677:
+	add	r8, r8, #1
+	b	.L676
+.L694:
+	movs	r3, #2
+	mov	r10, r6
+	str	r3, [sp, #8]
+	b	.L679
+.L683:
+	movs	r3, #20
+	ldr	r1, [sp, #4]
+	mul	r2, r3, r8
 	movs	r3, #0
-.L968:
-	ldr	r1, .L985+12
-	sxth	r2, r3
-	ldrh	r1, [r1]
-	cmp	r2, r1
-	bge	.L974
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #16]
-	ldr	r0, .L985
-	ldrh	r1, [r3]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r5]
+	str	r3, [fp, r2]
+	ldr	r3, .L711+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #12]
+	cbz	r6, .L681
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L682
+.L681:
+	ldr	r0, [sp, #12]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L682
+	movs	r3, #20
+	mla	r1, r3, r5, fp
+	ldr	r3, [sp, #12]
+	add	r2, r7, r3, lsl #10
 	ldr	r3, [sp, #20]
-	adds	r2, r2, #1
-	beq	.L972
-	ldrh	r2, [r7, #8]
-	cmp	fp, r2
-	bls	.L972
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r7]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r5, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L972:
-	adds	r3, r3, #1
-	b	.L968
-.L967:
-	ldrh	r2, [r3]
-	movs	r1, #0
-	ldr	r3, [sp, #8]
-	subs	r2, r2, #1
-	ldr	ip, [r3]
-.L969:
-	sxth	r3, r1
-	cmp	r3, r2
-	blt	.L971
-.L974:
-	adds	r6, r6, #1
-	b	.L959
-.L971:
-	lsls	r0, r3, #3
-	ldr	r3, [ip, r3, lsl #3]
-	adds	r1, r1, #1
-	uxth	lr, r3
-	cmp	fp, lr
-	itttt	hi
-	addhi	r0, r0, ip
-	movhi	r3, lr
-	ldrhi	r0, [r0, #4]
-	strhi	r0, [r8, r3, lsl #2]
-	b	.L969
-.L986:
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #28]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #24]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L682:
+	add	r8, r8, #1
+	b	.L680
+.L687:
+	mul	r2, r3, r8
+	ldr	r1, [fp]
+	adds	r0, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L686
+	ldr	r0, [r0, #4]
+	adds	r4, r4, #1
+	str	r3, [sp, #12]
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	ldr	r3, [sp, #12]
+.L686:
+	add	r8, r8, #1
+	b	.L685
+.L691:
+	cbz	r6, .L690
+	mul	r3, fp, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L690
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L690:
+	adds	r7, r7, #1
+	b	.L689
+.L712:
 	.align	2
-.L985:
-	.word	.LANCHOR148
+.L711:
+	.word	.LANCHOR99
+	.word	.LANCHOR79
+	.word	.LANCHOR3
+	.word	.LANCHOR110
 	.word	.LANCHOR115
-	.word	.LANCHOR123
+	.word	.LANCHOR24
 	.word	.LANCHOR20
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadVonderInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L988
-	ldr	r0, .L988+4
-	ldrh	r3, [r3]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L988+8
-	ldrh	r3, [r3]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L988+12
-	ldrh	r3, [r3]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L988+16
-	ldr	r3, [r3]
-	str	r3, [r0, #12]
-	ldr	r3, .L988+20
-	ldr	r3, [r3]
-	str	r3, [r0, #16]
-	ldr	r3, .L988+24
-	ldr	r3, [r3]
-	str	r3, [r0, #20]
-	ldr	r3, .L988+28
-	ldr	r3, [r3]
-	str	r3, [r0, #24]
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L989:
-	.align	2
-.L988:
-	.word	.LANCHOR27
-	.word	.LANCHOR158
-	.word	.LANCHOR35
-	.word	.LANCHOR28
-	.word	.LANCHOR36
-	.word	.LANCHOR132
-	.word	.LANCHOR131
-	.word	.LANCHOR133
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadMapInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L991
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L992:
-	.align	2
-.L991:
-	.word	.LANCHOR140
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.flush_l2p_region,"ax",%progbits
-	.align	1
-	.global	flush_l2p_region
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #12
-	ldr	r5, .L994
-	muls	r4, r0, r4
-	ldr	r0, .L994+4
-	ldr	r3, [r5]
-	adds	r2, r3, r4
-	ldrh	r1, [r3, r4]
-	ldr	r2, [r2, #8]
-	bl	FtlMapWritePage
-	ldr	r3, [r5]
-	movs	r0, #0
-	add	r4, r4, r3
-	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-	pop	{r3, r4, r5, pc}
-.L995:
-	.align	2
-.L994:
-	.word	.LANCHOR55
-	.word	.LANCHOR140
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",%progbits
+	.word	.LANCHOR109
+	.word	.LANCHOR13
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	FlashTestBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	ldr	r4, .L1009
-	mov	r10, r0
-	mov	r5, r1
-	ldr	r3, .L1009+4
-	ldr	r2, [r4]
-	ldrh	fp, [r3]
-	cmp	r0, r2
-	bcc	.L997
-	movw	r2, #811
-	ldr	r1, .L1009+8
-	ldr	r0, .L1009+12
-	bl	printf
-.L997:
+	cmp	r0, #11
+	push	{r4, r5, lr}
+	mov	r5, r0
+	sub	sp, sp, #92
+	bls	.L716
+	ldr	r4, .L718
+	add	r0, sp, #24
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r5, r5, #10
 	ldr	r3, [r4]
-	cmp	r10, r3
-	bcs	.L998
-	ldr	r3, .L1009+16
-	add	fp, fp, #7
-	lsr	r6, r10, fp
-	movs	r2, #0
-	ldrh	r1, [r3]
-	uxth	r6, r6
-	ldr	r3, .L1009+20
-	ldr	r0, [r3]
-	mov	r8, r3
-	movs	r3, #12
-.L999:
-	uxth	r4, r2
-	cmp	r4, r1
-	bcc	.L1004
-	str	r3, [sp, #4]
-	bl	select_l2p_ram_region
+	str	r3, [sp, #12]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r4]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r5, [sp, #8]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
 	ldr	r3, [sp, #4]
-	mov	r4, r0
-	ldr	r2, [r8]
-	muls	r3, r0, r3
-	adds	r1, r2, r3
-	ldrh	r2, [r2, r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1005
-	ldr	r3, [r1, #4]
-	cmp	r3, #0
-	bge	.L1005
-	bl	flush_l2p_region
-.L1005:
-	mov	r1, r4
-	mov	r0, r6
-	bl	load_l2p_region
-	b	.L1001
-.L998:
-	mov	r0, #-1
-	cbnz	r7, .L996
-	str	r0, [r5]
-.L996:
-	add	sp, sp, #8
+	cbnz	r3, .L717
+	adds	r3, r5, #1
+	add	r0, sp, #4
+	str	r3, [sp, #8]
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r4, [sp, #4]
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+.L715:
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	str	r5, [sp, #8]
+	bl	FlashEraseBlocks
+.L713:
+	mov	r0, r4
+	add	sp, sp, #92
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1004:
-	adds	r2, r2, #1
-	mla	ip, r3, r2, r0
-	ldrh	ip, [ip, #-12]
-	cmp	ip, r6
-	bne	.L999
-.L1001:
-	movs	r0, #1
-	ldr	r2, [r8]
-	lsl	r0, r0, fp
-	movs	r3, #12
-	subs	r0, r0, #1
-	and	r0, r0, r10
-	uxth	r0, r0
-	mla	r3, r3, r4, r2
-	cbnz	r7, .L1002
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r0, lsl #2]
-	str	r3, [r5]
-.L1003:
-	ldr	r2, [r8]
-	movs	r3, #12
-	mla	r4, r3, r4, r2
-	ldr	r3, [r4, #4]
-	adds	r2, r3, #1
-	beq	.L1007
-	adds	r3, r3, #1
-	str	r3, [r4, #4]
-.L1007:
-	movs	r0, #0
-	b	.L996
-.L1002:
-	ldr	r1, [r5]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r0, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L1009+24
-	strh	r6, [r3]	@ movhi
-	b	.L1003
-.L1010:
+	pop	{r4, r5, pc}
+.L717:
+	mov	r4, #-1
+	b	.L715
+.L716:
+	movs	r4, #0
+	b	.L713
+.L719:
 	.align	2
-.L1009:
-	.word	.LANCHOR61
-	.word	.LANCHOR22
-	.word	.LANCHOR159
-	.word	.LC1
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR56
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+.L718:
+	.word	.LANCHOR112
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlReUsePrevPpa
+	.global	FtlBbmTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L1021
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r2, [r5]
-	mov	r7, r0
-	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L1012
-	ldr	r2, .L1021+4
-	ldr	r4, [r2]
-	cmp	r4, #0
-	beq	.L1013
-	ldr	r2, .L1021+8
-	movw	lr, #65535
-	ldr	ip, .L1021+24
-	ldr	r0, .L1021+12
-	ldr	r2, [r2]
-	ldrh	r1, [r0]
-	mov	r8, r0
-	subs	r4, r4, r2
-	asrs	r4, r4, #1
-	mul	r4, ip, r4
-	mov	ip, #6
-	uxth	r4, r4
-.L1014:
-	uxth	r0, r3
-	cmp	r1, r0
-	bls	.L1013
-	cmp	r4, r7
-	bne	.L1015
-	mov	r1, r4
-	ldr	r0, .L1021+4
-	bl	List_remove_node
-	ldrh	r3, [r8]
-	cbnz	r3, .L1016
-	movw	r2, #1699
-	ldr	r1, .L1021+16
-	ldr	r0, .L1021+20
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r7, .L729
+	movs	r1, #0
+	ldr	r5, .L729+4
+	ldr	r3, [r7]
+	mov	fp, r7
+	ldr	r8, .L729+48
+	ldr	r6, .L729+8
+	str	r3, [r5, #12]
+	ldr	r7, .L729+12
+	ldr	r3, .L729+16
+	ldr	r10, .L729+52
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	str	r0, [r5, #8]
+	bl	ftl_memset
+.L721:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L722
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L729+20
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #12]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L729+24
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L723:
+	ldr	r3, [r8]
+	ldrh	r2, [r4, #2]
+	ldrh	r1, [r4]
+	str	r3, [r5, #8]
+	ldr	r3, [fp]
+	ldrh	r0, [r6, #10]
+	str	r3, [r5, #12]
+	movs	r3, #0
+	str	r3, [r5]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L729+28
 	bl	printf
-.L1016:
-	ldrh	r3, [r8]
-	mov	r0, r4
+	ldr	r3, .L729+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r7, lsl #1]
-.L1012:
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L1013
-.L1015:
-	mul	r4, ip, r4
+	cmp	r2, r3
+	blt	.L724
+	ldr	r3, [r4, #8]
+	mov	r1, #0	@ movhi
+	ldrh	r2, [r4]
+	strh	r1, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, lr
-	bne	.L1014
-.L1013:
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L729+36
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
 	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r6
-	bl	log2phys
-	add	sp, sp, #8
+	str	r3, [r5, #4]
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+.L724:
+	movs	r3, #1
+	ldr	r0, .L729+4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L725
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L729+40
+	bl	printf
+	cmp	r7, #3
+	bls	.L723
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L729+44
+	bl	printf
+.L727:
+	b	.L727
+.L722:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	adds	r4, r4, #1
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L721
+.L728:
+	movs	r3, #1
+	str	r3, [sp, #12]
+	b	.L723
+.L725:
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L728
+	movs	r0, #0
+	add	sp, sp, #16
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1022:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L730:
 	.align	2
-.L1021:
-	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR40
-	.word	.LANCHOR48
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	-1431655765
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_check_vpc,"ax",%progbits
+.L729:
+	.word	.LANCHOR114
+	.word	.LANCHOR138
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR23
+	.word	.LANCHOR37
+	.word	.LANCHOR2
+	.word	.LC14
+	.word	.LANCHOR20
+	.word	.LANCHOR79
+	.word	.LC15
+	.word	.LC16
+	.word	.LANCHOR106
+	.word	.LANCHOR127
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	ftl_check_vpc
+	.global	allocate_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r6, .L1047
-	ldr	r5, .L1047+4
-	ldr	r1, .L1047+8
-	ldr	r0, .L1047+12
+	mov	r4, r0
+.L732:
+	ldr	r3, .L771
+	ldr	r8, .L771+68
+	ldrh	r3, [r3]
+	ldr	r10, .L771+72
+	ldrh	r2, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
+	cmp	r3, r2
+	ble	.L733
+	movw	r2, #2661
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-	mov	r2, #8192
-	movs	r1, #0
-	ldr	r0, .L1047+4
-	bl	ftl_memset
-.L1024:
-	ldr	r3, [r6]
+.L733:
+	ldr	r3, .L771+12
 	cmp	r4, r3
-	bcc	.L1026
-	ldr	r10, .L1047+48
-	movs	r4, #0
-	ldr	r7, .L1047+16
-	mov	r6, r4
-.L1027:
+	bne	.L759
+	ldr	r3, .L771
+	ldr	r2, .L771+16
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	lsrs	r1, r3, #1
+	muls	r2, r3, r2
+	adds	r1, r1, #1
+	add	r1, r1, r2, lsr #2
+	uxth	r1, r1
+	cbz	r1, .L734
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L734:
+	ldr	r0, .L771+20
+	bl	List_pop_index_node
+	ldr	r3, .L771
+	mov	r5, r0
+	uxth	r7, r0
+	ldrh	r3, [r3]
+	cbnz	r3, .L735
+	movw	r2, #2670
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
+	bl	printf
+.L735:
+	ldr	r3, .L771
+	ldr	r2, .L771
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldrh	r3, [r10]
+	cmp	r3, r7
+	bls	.L732
+	uxth	r5, r5
+	lsls	r3, r5, #1
+	str	r3, [sp]
+	ldr	r3, .L771+24
+	ldr	r3, [r3]
+	ldrh	r6, [r3, r5, lsl #1]
+	cmp	r6, #0
+	bne	.L732
+	strh	r7, [r4]	@ movhi
+	mov	r0, r4
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L737
+	ldr	r3, .L771+24
+	movw	r2, #65535
+	mov	r0, r7
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L771
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
 	ldrh	r2, [r10]
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L1029
-	ldr	r3, .L1047+20
-	ldr	r4, [r3]
-	cbz	r4, .L1030
-	ldr	r3, .L1047+24
+	cmp	r3, r2
+	ble	.L732
+	movw	r2, #2684
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
+	bl	printf
+	b	.L732
+.L759:
+	movs	r1, #0
+	b	.L734
+.L737:
+	ldr	r3, .L771
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
+	cmp	r3, r2
+	ble	.L739
+	movw	r2, #2687
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
+	bl	printf
+.L739:
+	ldr	r3, .L771+28
+	add	lr, r4, #16
+	ldr	r2, .L771+32
 	mov	r8, #0
-	ldr	r5, .L1047+28
-	ldr	r10, .L1047+16
-	ldrh	r7, [r3]
-	ldr	r3, [r5]
-	ldr	fp, .L1047+4
-	subs	r4, r4, r3
-	ldr	r3, .L1047+32
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
-	uxth	r4, r4
-.L1031:
-	uxth	r3, r8
-	cmp	r7, r3
-	bls	.L1030
-	ldr	r3, [r10]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1032
-	movs	r6, #1
-	ldrh	r3, [fp, r4, lsl #1]
-	mov	r1, r4
-	ldr	r0, .L1047+36
+	ldr	ip, [r3]
+	ldrh	r0, [r2]
+	movs	r2, #20
+	mov	r3, ip
+	mla	r0, r2, r0, ip
+.L740:
+	cmp	r0, r3
+	bne	.L742
+	cbnz	r6, .L743
+	movw	r2, #2698
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-.L1032:
-	movs	r3, #6
-	ldr	r2, [r5]
-	muls	r4, r3, r4
-	movw	r3, #65535
-	add	r8, r8, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, r3
-	bne	.L1031
-.L1030:
-	cbz	r6, .L1023
-	movw	r2, #2343
-	ldr	r1, .L1047+8
-	ldr	r0, .L1047+40
+.L743:
+	ldr	r3, .L771+36
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bne	.L744
+	movw	r2, #2700
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-.L1023:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1026:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L1025
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r5, r0, lsl #1]
+.L744:
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L771+40
+	ldr	fp, .L771+76
+	ldr	r8, .L771+80
+	ldr	r1, [r3]
+	cmp	r2, #0
+	bne	.L745
+	ldrh	r2, [r1, r5, lsl #1]
+	cmp	r2, #0
+	beq	.L746
+	ldr	r0, .L771+44
+	ldrh	r0, [r0]
+	add	r2, r2, r0
+.L769:
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	mov	r0, r7
+	ldr	r2, [fp]
+	movs	r1, #0
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	str	r2, [fp]
+	bl	ftl_set_blk_mode
+.L770:
+	ldr	r3, [sp, #4]
+	ldr	r0, [fp]
+	ldr	r3, [r3]
+	ldrh	r1, [r3, r5, lsl #1]
+	ldr	r3, .L771+48
+	ldr	r2, [r3]
+	cmp	r1, r2
+	it	hi
+	strhi	r1, [r3]
+	ldr	r3, .L771+44
+	ldrh	r1, [r10]
+	ldrh	r2, [r3]
+	ldr	r3, [r8]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L771+52
+	ldr	ip, .L771+84
+	str	r0, [r3]
+	ldr	r3, .L771+56
+	ldr	r2, [r3]
+	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1025:
-	adds	r4, r4, #1
-	b	.L1024
-.L1029:
-	ldr	r3, [r7]
-	uxth	r5, r4
-	ldr	r8, .L1047+4
-	ldrh	r2, [r3, r5, lsl #1]
-	ldrh	r3, [r8, r5, lsl #1]
+	str	r3, [r2, #16]
+	movs	r2, #20
+	ldr	r3, .L771+28
+	ldr	r0, [r3]
+	adds	r3, r0, #4
+	mla	r2, r2, r6, r0
+	adds	r2, r2, #24
+.L750:
+	adds	r3, r3, #20
 	cmp	r2, r3
-	beq	.L1028
-	mov	r1, r5
-	ldr	r0, .L1047+44
+	bne	.L751
+	mov	r2, r6
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r8, #0
+	bl	FlashEraseBlocks
+	mov	r10, r8
+	movs	r3, #20
+.L752:
+	uxth	r2, r8
+	cmp	r6, r2
+	bhi	.L754
+	cmp	r10, #0
+	beq	.L755
+	mov	r0, r7
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L755:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L756
+	ldr	r3, .L771+24
+	movw	r2, #65535
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L732
+.L742:
+	ldrh	r1, [lr], #2
+	movw	fp, #65535
+	str	r8, [r3, #8]
+	str	r8, [r3, #12]
+	cmp	r1, fp
+	beq	.L741
+	mla	fp, r2, r6, ip
+	adds	r6, r6, #1
+	lsls	r1, r1, #10
+	uxth	r6, r6
+	str	r1, [fp, #4]
+.L741:
+	adds	r3, r3, #20
+	b	.L740
+.L746:
+	movs	r2, #2
+	b	.L769
+.L745:
+	ldrh	r2, [r1, r5, lsl #1]
+	mov	r0, r7
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	ldr	r2, [r8]
+	adds	r2, r2, #1
+	str	r2, [r8]
+	bl	ftl_set_blk_mode.part.6
+	b	.L770
+.L751:
+	ldr	r1, [r3, #-20]
+	and	r1, r1, ip
+	str	r1, [r3, #-20]
+	b	.L750
+.L754:
+	ldr	r1, .L771+28
+	mul	r2, r3, r8
+	ldr	r1, [r1]
+	ldr	fp, [r1, r2]
+	adds	r0, r1, r2
+	cmp	fp, #-1
+	bne	.L753
+	ldr	r0, [r0, #4]
+	add	r10, r10, #1
+	str	r3, [sp, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	add	r2, r4, r8, lsl #1
+	ldr	r3, [sp, #4]
+	strh	fp, [r2, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L753:
+	add	r8, r8, #1
+	b	.L752
+.L756:
+	ldr	r3, .L771+60
+	ldr	r1, .L771+64
+	ldrh	r3, [r3]
+	strh	r7, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r1]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r1]
+	ldr	r2, .L771+24
+	ldr	r1, [sp]
+	ldr	r2, [r2]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L757
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L758
+.L757:
+	movw	r2, #2753
+	ldr	r1, .L771+4
+	ldr	r0, .L771+8
 	bl	printf
-	ldr	r3, [r7]
-	movw	r2, #65535
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, r2
-	beq	.L1028
-	ldrh	r2, [r8, r5, lsl #1]
-	cmp	r2, r3
-	it	hi
-	movhi	r6, #1
-.L1028:
-	adds	r4, r4, #1
-	b	.L1027
-.L1048:
+.L758:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L772:
 	.align	2
-.L1047:
-	.word	.LANCHOR61
-	.word	check_vpc_table
-	.word	.LANCHOR161
-	.word	.LC94
-	.word	.LANCHOR42
-	.word	.LANCHOR47
+.L771:
 	.word	.LANCHOR48
-	.word	.LANCHOR40
-	.word	-1431655765
-	.word	.LC96
+	.word	.LANCHOR143
 	.word	.LC1
-	.word	.LC95
+	.word	.LANCHOR53
+	.word	.LANCHOR95
+	.word	.LANCHOR47
+	.word	.LANCHOR42
+	.word	.LANCHOR79
+	.word	.LANCHOR3
+	.word	.LANCHOR144
+	.word	.LANCHOR43
+	.word	.LANCHOR14
+	.word	.LANCHOR92
+	.word	.LANCHOR145
+	.word	.LANCHOR118
+	.word	.LANCHOR19
+	.word	.LANCHOR82
+	.word	.LANCHOR45
 	.word	.LANCHOR5
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	-1024
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
-	.global	ftl_scan_all_data
+	.global	FtlGcFreeBadSuperBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #0
-	ldr	r7, .L1063
-	sub	sp, sp, #32
-	movs	r1, #0
-	ldr	r8, .L1063+24
-	ldr	r0, .L1063+4
-	bl	printf
-.L1050:
-	ldr	r3, [r7]
-	cmp	r5, r3
-	bcc	.L1056
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1056:
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r5
-	bl	log2phys
-	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1051
-	ldr	r2, [sp, #28]
-	mov	r1, r5
-	mov	r0, r8
-	bl	printf
-.L1051:
-	ldr	r3, [sp, #28]
-	adds	r2, r3, #1
-	beq	.L1053
-	ldr	r4, .L1063+8
-	movs	r2, #0
-	movs	r1, #1
-	str	r3, [r4, #4]
-	mov	r0, r4
-	ldr	r3, .L1063+12
-	str	r5, [r4, #16]
-	str	r2, [r4]
-	ldr	r3, [r3]
-	str	r3, [r4, #8]
-	ldr	r3, .L1063+16
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-	bl	FlashReadPages
-	ldr	r3, [r4]
-	cmp	r3, #256
-	beq	.L1054
-	adds	r3, r3, #1
-	beq	.L1054
-	ldr	r3, [r6, #8]
-	cmp	r5, r3
-	beq	.L1053
-.L1054:
-	ldr	r2, [r4, #8]
-	ldr	r3, [r4, #12]
-	ldr	r0, .L1063+20
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	ldr	r2, [r4, #4]
-	ldr	r3, [r3]
-	bl	printf
-.L1053:
-	adds	r5, r5, #1
-	b	.L1050
-.L1064:
-	.align	2
-.L1063:
-	.word	.LANCHOR61
-	.word	.LC97
-	.word	.LANCHOR148
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.word	.LC99
-	.word	.LC98
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcScanTempBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 48
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1098
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #48
-	mov	r4, r0
-	str	r1, [sp, #8]
-	ldrh	r5, [r3]
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L1090
-	cbnz	r5, .L1066
-.L1067:
-	bl	FtlGcPageVarInit
-	b	.L1068
-.L1090:
-	movs	r5, #0
-.L1066:
-	ldr	r3, .L1098+4
-	ldr	r2, [sp, #8]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	beq	.L1067
-.L1068:
-	ldr	fp, .L1098+52
-	movs	r3, #0
-	str	r3, [sp]
-.L1069:
-	ldrh	r2, [r4]
-	movs	r3, #0
-	strb	r3, [r4, #8]
-	movw	r3, #65535
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r4, .L785
+	ldrh	r3, [r4]
+	cbz	r3, .L774
+	ldr	r8, .L785+12
+	movs	r7, #0
+.L775:
+	ldr	r3, .L785+4
+	ldrh	r2, [r3]
+	uxth	r3, r7
 	cmp	r2, r3
-	beq	.L1070
-.L1087:
-	ldr	r3, .L1098+8
-	movs	r2, #0
-	ldr	r0, [fp]
-	mov	r7, r2
-	movw	lr, #65535
-	mov	r8, #20
-	ldrh	r10, [r3]
-	ldr	r3, .L1098+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1098+16
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1098+20
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1098+24
-	ldrh	ip, [r3]
-	add	r3, r4, #16
-	str	r3, [sp, #4]
-.L1071:
-	uxth	r3, r2
-	cmp	r10, r3
-	bhi	.L1073
-	mov	r10, #0
-	movs	r2, #0
-	mov	r1, r7
-	bl	FlashReadPages
-.L1074:
-	uxth	r3, r10
-	cmp	r7, r3
-	bhi	.L1085
-	ldr	r3, [sp]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	adds	r3, r3, #1
-	str	r3, [sp]
-	ldr	r2, [sp]
-	ldr	r3, [sp, #8]
-	cmp	r3, r2
-	ldr	r2, .L1098+4
-	bls	.L1086
-.L1088:
-	ldrh	r3, [r2]
+	bhi	.L781
+	bl	FtlGcReFreshBadBlk
+.L774:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L781:
+	ldr	r2, .L785+8
+	uxth	r3, r7
+	mov	r1, r10
+	mov	fp, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r1, r0
+.L776:
+	ldrh	r3, [r4]
+	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1087
-.L1070:
-	ldr	r3, .L1098
-	movw	r2, #65535
-	strh	r5, [r4, #2]	@ movhi
-	mov	r1, r5
-	mov	r0, r4
-	strh	r2, [r3]	@ movhi
-	movs	r2, #0
-	strb	r2, [r4, #6]
-	bl	ftl_sb_update_avl_pages
-	b	.L1089
-.L1073:
-	ldr	r1, [sp, #4]
-	ldrh	r3, [r1], #2
-	cmp	r3, lr
-	str	r1, [sp, #4]
-	beq	.L1072
-	mla	r1, r8, r7, r0
-	ldr	r6, [sp, #12]
-	orr	r3, r5, r3, lsl #10
-	str	r3, [r1, #4]
-	ldr	r3, [sp, #16]
-	muls	r3, r7, r3
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	ldr	r6, [sp, #20]
-	str	r3, [r1, #8]
-	mul	r3, ip, r7
+	bhi	.L780
 	adds	r7, r7, #1
-	uxth	r7, r7
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	str	r3, [r1, #12]
-.L1072:
-	adds	r2, r2, #1
-	b	.L1071
-.L1085:
-	movs	r3, #20
-	ldr	r1, [fp]
-	mul	r3, r3, r10
-	adds	r2, r1, r3
-	ldr	r6, [r1, r3]
-	ldr	r0, [r2, #4]
-	str	r0, [sp, #4]
-	cbnz	r6, .L1075
-	ldr	r8, [r2, #12]
-	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L1076
-.L1075:
-	ldr	r3, .L1098+28
-	movs	r1, #0
+	b	.L775
+.L780:
+	uxth	r6, fp
+	ldrh	r3, [r8, r6, lsl #1]
+	cmp	r3, r1
+	bne	.L777
+	mov	r0, r1
+	str	r1, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
 	ldrh	r2, [r4]
-	movs	r5, #0
+	add	r3, r8, r6, lsl #1
+	ldr	r1, [sp, #4]
+.L778:
+	cmp	r5, r2
+	bcc	.L779
+	subs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+.L777:
+	add	fp, fp, #1
+	b	.L776
+.L779:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L778
+.L786:
+	.align	2
+.L785:
+	.word	.LANCHOR74
+	.word	.LANCHOR3
+	.word	.LANCHOR13
+	.word	.LANCHOR75
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L797
 	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4]
-	bl	INSERT_FREE_LIST
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L788
+	ldr	r2, .L797+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L789
 	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L1069
-.L1076:
-	str	r3, [sp, #12]
-	ldr	r3, .L1098+32
-	ldr	r0, [r8, #8]
-	ldr	r2, [r3]
-	cmp	r0, r2
-	bhi	.L1075
-	mov	r2, r6
-	add	r1, sp, #24
-	bl	log2phys
-	ldr	r2, [r8, #12]
-	ldr	r1, [sp, #24]
-	ldr	r3, [sp, #12]
-	cmp	r2, r1
-	beq	.L1079
-.L1080:
-	ldr	r2, [r8, #8]
-	add	r10, r10, #1
-	ldr	r1, [sp, #4]
-	ldr	r0, [r8, #12]
-	bl	FtlGcUpdatePage
-	b	.L1074
-.L1079:
-	str	r3, [sp, #12]
-	adds	r3, r2, #1
-	beq	.L1080
-	str	r2, [sp, #32]
-	movs	r1, #1
-	ldr	r2, .L1098+36
-	add	r0, sp, #28
-	ldr	r2, [r2]
-	str	r2, [sp, #36]
-	ldr	r2, .L1098+40
-	ldr	r2, [r2]
-	str	r2, [sp, #40]
-	mov	r2, r6
-	bl	FlashReadPages
-	ldr	r2, .L1098+44
-	ldr	r1, [fp]
-	ldr	r3, [sp, #12]
+	strh	r3, [r2]	@ movhi
+.L790:
+	ldr	r5, .L797+8
+	mov	r1, r4
+	ldr	r0, .L797+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L792
+	movw	r2, #2823
+	ldr	r1, .L797+16
+	ldr	r0, .L797+20
+	bl	printf
+.L792:
+	ldrh	r3, [r5]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L797+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L797+28
 	ldrh	r2, [r2]
-	ldr	r0, [sp, #36]
-	add	ip, r3, r1
-	lsls	r2, r2, #7
-.L1081:
-	cmp	r6, r2
-	beq	.L1080
-	ldr	r1, [ip, #8]
-	ldr	r3, [r0, r6, lsl #2]
-	ldr	r1, [r1, r6, lsl #2]
-	cmp	r1, r3
-	beq	.L1082
-	ldr	r2, [sp, #32]
-	ldrh	r1, [r4]
-	ldr	r0, .L1098+48
+	cmp	r3, r2
+	ble	.L796
+	movw	r2, #2826
+	ldr	r1, .L797+16
+	ldr	r0, .L797+20
 	bl	printf
-	b	.L1075
-.L1082:
-	adds	r6, r6, #1
-	b	.L1081
-.L1086:
-	ldr	r1, .L1098
-	movw	r0, #65535
-	ldrh	r3, [r1]
-	cmp	r3, r0
-	beq	.L1088
-	ldr	r0, [sp]
-	add	r3, r3, r0
-	strh	r3, [r1]	@ movhi
-	ldrh	r3, [r2]
-	cmp	r3, r5
-	bls	.L1088
-.L1089:
-	mov	r0, #-1
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1099:
+.L796:
+	movs	r3, #1
+	b	.L787
+.L789:
+	ldr	r2, .L797+32
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L787
+	ldr	r2, .L797+36
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L787
+	ldr	r2, .L797+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L790
+.L787:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L788:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L787
+.L798:
 	.align	2
-.L1098:
-	.word	.LANCHOR162
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR91
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
+.L797:
 	.word	.LANCHOR42
-	.word	.LANCHOR61
-	.word	.LANCHOR119
-	.word	.LANCHOR124
-	.word	.LANCHOR12
-	.word	.LC100
-	.word	.LANCHOR112
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlReadRefresh,"ax",%progbits
+	.word	.LANCHOR144
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR146
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	FtlReadRefresh
+	.global	decrement_vpc_count
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	@ args = 0, pretend = 0, frame = 88
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1113
+	movw	r3, #65535
 	push	{r4, r5, r6, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	ldr	r0, [r3, #80]
-	cmp	r0, #0
-	beq	.L1101
-	ldr	r6, .L1113+4
-	ldr	r0, [r3, #84]
-	ldr	r1, [r6]
-	cmp	r0, r1
-	bcs	.L1102
-	mov	r5, #2048
-.L1107:
-	ldr	r0, [r4, #84]
-	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L1104
-	movs	r2, #0
-	mov	r1, sp
-	bl	log2phys
-	ldr	r2, [sp]
-	ldr	r3, [r4, #84]
-	adds	r1, r2, #1
-	add	r3, r3, #1
-	str	r3, [r4, #84]
-	beq	.L1105
+	mov	r4, r0
+	beq	.L800
+	ldr	r5, .L808
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L801
+	mov	r1, r0
+	ldr	r0, .L808+4
+	bl	printf
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L802
+.L806:
+	movs	r5, #0
+.L799:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L802:
+	movw	r2, #2841
+.L807:
+	ldr	r1, .L808+8
+	ldr	r0, .L808+12
+	bl	printf
+	b	.L799
+.L801:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L800:
+	ldr	r6, .L808+16
+	movw	r3, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L804
+	strh	r4, [r6]	@ movhi
+	b	.L806
+.L804:
+	cmp	r4, r0
+	beq	.L806
+	bl	update_vpc_list
+	ldr	r3, .L808+20
+	adds	r5, r0, #0
+	ldr	r2, .L808+24
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L808+28
+	muls	r3, r2, r3
+	ldr	r2, .L808
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L799
+	cmp	r4, r1
+	beq	.L799
+	movw	r2, #2857
+	b	.L807
+.L809:
+	.align	2
+.L808:
+	.word	.LANCHOR42
+	.word	.LC17
+	.word	.LANCHOR147
+	.word	.LC1
+	.word	.LANCHOR131
+	.word	.LANCHOR41
+	.word	.LANCHOR40
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r3, #-1
+	sub	sp, sp, #24
+	ldr	r2, .L823
+	movs	r6, #0
+	mov	r4, r0
 	str	r3, [sp, #20]
-	add	r0, sp, #88
-	ldr	r3, .L1113+8
-	movs	r1, #1
-	str	r2, [sp, #8]
-	movs	r2, #0
-	str	r2, [r0, #-84]!
+	ldr	r3, .L823+4
+	ldr	r5, [r2]
+	mvn	r2, #2
+	ldr	r8, .L823+16
 	ldr	r3, [r3]
+	str	r5, [sp, #16]
 	str	r3, [sp, #12]
-	add	r3, sp, #24
-	str	r3, [sp, #16]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	cmp	r3, #256
-	bne	.L1104
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L1104:
-	mov	r0, #-1
-.L1100:
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L1105:
-	subs	r5, r5, #1
-	bne	.L1107
-	b	.L1104
-.L1102:
-	ldr	r2, .L1113+12
-	movs	r0, #0
-	str	r0, [r3, #80]
-	str	r0, [r3, #84]
-	ldr	r2, [r2]
-	str	r2, [r3, #76]
-	b	.L1100
-.L1101:
-	ldr	r1, [r3, #76]
-	ldr	r3, .L1113+12
-	ldr	r5, [r3]
-	add	r3, r5, #1048576
-	cmp	r1, r3
-	bhi	.L1110
-	ldr	r3, .L1113+16
+	str	r2, [r5, #8]
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	ldrh	r2, [r0]
+	strh	r6, [r5]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
+	movw	r2, #61589
+	str	r2, [r3]
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+	ldrh	r3, [r0, #4]
+	tst	r3, #1
+	ite	eq
+	moveq	r7, #6
+	movne	r7, #7
+.L816:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L812
+.L813:
+	ldr	r3, .L823+8
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
-	mov	r3, #33554432
-	lsrs	r2, r2, #10
-	asrs	r3, r3, r2
-	add	r3, r3, r1
-	cmp	r5, r3
-	bhi	.L1110
-	ldr	r3, .L1113+20
-	ldrb	r3, [r3, #28]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1100
-.L1110:
-	movs	r3, #1
-	movs	r0, #0
-	str	r3, [r4, #80]
-	str	r0, [r4, #84]
-	str	r5, [r4, #76]
-	b	.L1100
-.L1114:
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L823+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L812:
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L813
+	ldr	r3, [r8]
+	movs	r1, #1
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, r6
+	str	r3, [r8]
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	subs	r7, r7, #1
+	bne	.L816
+	b	.L813
+.L824:
 	.align	2
-.L1113:
-	.word	.LANCHOR81
-	.word	.LANCHOR61
-	.word	.LANCHOR121
-	.word	.LANCHOR62
-	.word	.LANCHOR76
-	.word	.LANCHOR39
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+.L823:
+	.word	.LANCHOR114
+	.word	.LANCHOR106
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR83
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
-	.global	FtlMapBlkWriteDump_data
+	.global	FtlMakeBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #36]
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	cbz	r3, .L1115
-	ldrh	r5, [r0, #6]
-	movs	r3, #0
-	ldr	r2, [r0, #24]
-	str	r3, [r0, #36]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r7, .L844
+	bl	FtlBbtMemInit
+	sub	r8, r7, #18
+	bl	FtlLoadFactoryBbt
+.L826:
+	ldr	r3, .L844+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L832
+	ldr	r5, .L844+8
+	movs	r4, #0
+.L833:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L834
+	ldr	r4, .L844+12
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L835:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L839
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L836
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L837
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L836:
 	subs	r5, r5, #1
-	ldr	r3, .L1119
-	ldr	r1, .L1119+4
 	uxth	r5, r5
-	ldr	r4, .L1119+8
-	ldr	r2, [r2, r5, lsl #2]
+	b	.L835
+.L832:
+	ldr	r3, .L844+16
+	ldr	r5, .L844+20
+	ldrh	r2, [r8, #2]!
+	ldr	r4, .L844+24
 	ldr	r0, [r3]
-	ldr	r1, [r1]
-	str	r2, [r4, #4]
+	movw	r3, #65535
+	ldr	r10, [r5]
+	cmp	r2, r3
+	mov	fp, r4
+	ldr	r3, .L844+28
 	str	r0, [r4, #8]
-	str	r1, [r4, #12]
-	cbz	r2, .L1117
-	movs	r2, #1
+	str	r10, [r4, #12]
+	beq	.L827
+	ldrh	r5, [r3]
 	mov	r0, r4
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.L1118:
-	ldr	r2, [r4, #8]
-	mov	r1, r5
-	mov	r0, r6
-	pop	{r4, r5, r6, lr}
-	b	FtlMapWritePage
-.L1117:
-	ldr	r3, .L1119+12
-	movs	r1, #255
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
 	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L828:
+	uxth	r0, r5
+	adds	r6, r6, #1
+	adds	r7, r7, #4
+	bl	FtlBbmMapBadBlock
+	b	.L826
+.L827:
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	str	r5, [sp, #4]
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L829:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L830
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r4, [r8]	@ movhi
+	ldr	r0, [r3]
 	bl	ftl_memset
-	b	.L1118
-.L1115:
-	pop	{r4, r5, r6, pc}
-.L1120:
+	ldr	r3, .L844+16
+	mov	r2, #4096
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
+	movs	r3, #0
+	str	r3, [r10, #4]
+	ldrh	r5, [r2]
+	ldrh	r3, [r8]
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	mla	r5, r6, r5, r3
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	ldr	r3, .L844+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	ldr	r0, .L844+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L844+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [fp]
+	adds	r3, r3, #1
+	bne	.L828
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+	b	.L829
+.L830:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L829
+.L834:
+	bl	FtlBbmMapBadBlock
+	b	.L833
+.L837:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L838
+	strh	r5, [r4]	@ movhi
+	b	.L836
+.L838:
+	strh	r5, [r4, #4]	@ movhi
+.L839:
+	ldr	r3, .L844+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r1, #1
+	movs	r2, #2
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #24]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L845:
 	.align	2
-.L1119:
-	.word	.LANCHOR116
-	.word	.LANCHOR123
-	.word	.LANCHOR148
-	.word	.LANCHOR23
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FlashTestBlk,"ax",%progbits
+.L844:
+	.word	.LANCHOR37+28
+	.word	.LANCHOR10
+	.word	.LANCHOR25
+	.word	.LANCHOR37
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.word	.LANCHOR138
+	.word	.LANCHOR17
+	.word	.LANCHOR127
+	.word	.LANCHOR79
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	FlashTestBlk
+	.global	ftl_memcmp
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	@ args = 0, pretend = 0, frame = 88
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r0, #11
-	push	{r4, r5, lr}
-	mov	r4, r0
-	sub	sp, sp, #92
-	bls	.L1123
-	ldr	r5, .L1124
-	add	r0, sp, #24
-	movs	r2, #32
-	movs	r1, #165
-	str	r0, [sp, #16]
-	lsls	r4, r4, #10
-	ldr	r3, [r5]
-	str	r3, [sp, #12]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r5]
-	bl	ftl_memset
-	movs	r2, #1
-	add	r0, sp, #4
-	mov	r1, r2
-	str	r4, [sp, #8]
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	add	r0, sp, #4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r4, [sp, #4]
-	movs	r2, #1
-	movs	r1, #0
-	add	r0, sp, #4
-	adds	r4, r4, #0
-	it	ne
-	movne	r4, #1
-	negs	r4, r4
-	bl	FlashEraseBlocks
-.L1121:
-	mov	r0, r4
-	add	sp, sp, #92
-	@ sp needed
-	pop	{r4, r5, pc}
-.L1123:
-	movs	r4, #0
-	b	.L1121
-.L1125:
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.js_hash,"ax",%progbits
+	.align	1
+	.global	js_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	js_hash, %function
+js_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L850
+	add	r1, r1, r0
+	push	{r4, lr}
+.L848:
+	cmp	r0, r1
+	bne	.L849
+	mov	r0, r3
+	pop	{r4, pc}
+.L849:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L848
+.L851:
 	.align	2
-.L1124:
-	.word	.LANCHOR121
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
+.L850:
+	.word	1204201446
+	.size	js_hash, .-js_hash
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlBbmTblFlush
+	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-	@ args = 0, pretend = 0, frame = 8
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r7, .L1135
-	movs	r1, #0
-	ldr	r5, .L1135+4
-	ldr	r3, [r7]
-	mov	fp, r7
-	ldr	r8, .L1135+48
-	ldr	r6, .L1135+8
-	str	r3, [r5, #12]
-	ldr	r7, .L1135+12
-	ldr	r3, .L1135+16
-	ldr	r10, .L1135+52
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	str	r0, [r5, #8]
-	bl	ftl_memset
-.L1127:
-	ldrh	r3, [r7]
-	cmp	r4, r3
-	blt	.L1128
-	ldr	r6, [r5, #12]
-	movs	r2, #16
-	ldr	r4, .L1135+20
-	movs	r1, #255
-	movs	r7, #0
-	mov	r0, r6
-	bl	ftl_memset
-	movw	r3, #61649
-	mov	r10, r4
-	strh	r3, [r6]	@ movhi
-	ldr	r3, [r4, #8]
-	str	r7, [sp, #12]
-	str	r3, [r6, #4]
-	ldrh	r3, [r4]
-	strh	r3, [r6, #2]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r3, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #6]
-	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1135+24
-	ldr	r3, [r3]
-	strh	r3, [r6, #12]	@ movhi
-.L1129:
-	ldr	r3, [r8]
-	ldrh	r2, [r4, #2]
-	ldrh	r1, [r4]
-	str	r3, [r5, #8]
-	ldr	r3, [fp]
-	ldrh	r0, [r6, #10]
-	str	r3, [r5, #12]
-	movs	r3, #0
-	str	r3, [r5]
-	orr	r3, r2, r1, lsl #10
-	str	r3, [r5, #4]
-	ldrh	r3, [r4, #4]
-	str	r0, [sp]
-	ldr	r0, .L1135+28
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	cmp	r3, r2
+	bne	.L853
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L854
+	movw	r2, #641
+	ldr	r1, .L862
+	ldr	r0, .L862+4
 	bl	printf
-	ldr	r3, .L1135+32
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1130
-	ldr	r3, [r4, #8]
-	mov	r1, #0	@ movhi
-	ldrh	r2, [r4]
-	strh	r1, [r4, #2]	@ movhi
+.L854:
+	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	movs	r3, #0
+	strh	r0, [r5]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L855:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L853:
+	ldrh	r7, [r5, r3, lsl #1]
+	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r6, .L862+8
+	ldr	r10, .L862+24
+	ldr	r8, [r0, #24]
+	orr	r3, r3, r7, lsl #10
+	ldr	r0, [r10]
 	str	r3, [r6, #4]
-	strh	r2, [r6, #8]	@ movhi
+	ldr	r3, .L862+12
+	str	r0, [r6, #8]
+	ldr	r5, [r3]
+	ldr	r3, [r4, #28]
+	str	r5, [r6, #12]
+	str	r3, [r5, #4]
+	movw	r3, #64245
+	strh	r3, [r5, #8]	@ movhi
 	ldrh	r3, [r4, #4]
-	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1135+36
-	strh	r3, [r4]	@ movhi
-	lsls	r3, r3, #10
-	ldr	r0, [r2]
+	strh	r7, [r5, #2]	@ movhi
+	strh	r3, [r5]	@ movhi
+	ldr	r3, .L862+16
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+	ldrh	ip, [r4, #6]
+	movs	r3, #0
+	ldr	r1, [r10]
+	mov	r2, r3
+.L856:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L858
+	ldr	r3, .L862+20
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r3]
+	bl	js_hash
 	movs	r2, #1
-	str	r3, [r5, #4]
+	str	r0, [r5, #12]
+	movs	r3, #0
 	mov	r1, r2
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-.L1130:
-	movs	r3, #1
-	ldr	r0, .L1135+4
-	mov	r2, r3
-	mov	r1, r3
+	ldr	r0, .L862+8
 	bl	FlashProgPages
-	ldrh	r3, [r10, #2]
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
 	adds	r3, r3, #1
-	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, [r5]
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L855
+.L858:
+	ldr	r0, [r8, r3, lsl #2]
+	cmp	r7, r0, lsr #10
+	bne	.L857
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	lr, r1, r2, lsl #3
+	ldr	r0, [r8, r3, lsl #2]
+	str	r0, [lr, #4]
+.L857:
 	adds	r3, r3, #1
-	bne	.L1131
-	adds	r7, r7, #1
-	ldr	r1, [r5, #4]
-	uxth	r7, r7
-	ldr	r0, .L1135+40
-	bl	printf
-	cmp	r7, #3
-	bls	.L1129
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1135+44
-	bl	printf
-.L1133:
-	b	.L1133
-.L1128:
-	ldrh	r2, [r10]
-	ldr	r3, [r5, #8]
-	ldr	r1, [r6, #4]!
-	mul	r0, r2, r4
-	lsls	r2, r2, #2
-	adds	r4, r4, #1
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memcpy
-	b	.L1127
-.L1134:
-	movs	r3, #1
-	str	r3, [sp, #12]
-	b	.L1129
-.L1131:
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L1134
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1136:
+	b	.L856
+.L863:
 	.align	2
-.L1135:
-	.word	.LANCHOR123
+.L862:
 	.word	.LANCHOR148
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR23
-	.word	.LANCHOR37
-	.word	.LANCHOR2
-	.word	.LC101
+	.word	.LC1
+	.word	.LANCHOR138
+	.word	.LANCHOR114
 	.word	.LANCHOR20
+	.word	.LANCHOR23
 	.word	.LANCHOR106
-	.word	.LC102
-	.word	.LC103
-	.word	.LANCHOR115
-	.word	.LANCHOR137
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",%progbits
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
-	.global	allocate_data_superblock
+	.global	FtlMapWritePage
 	.syntax unified
 	.thumb
 	.thumb_func
-	.fpu softvfp
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L1138:
-	ldr	r3, .L1177
-	ldr	r8, .L1177+68
-	ldrh	r3, [r3]
-	ldr	r10, .L1177+72
-	ldrh	r2, [r8]
-	add	r3, r3, r2
-	ldrh	r2, [r10]
-	cmp	r3, r2
-	ble	.L1139
-	movw	r2, #2615
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-.L1139:
-	ldr	r3, .L1177+12
-	cmp	r4, r3
-	bne	.L1165
-	ldr	r3, .L1177
-	ldr	r2, .L1177+16
-	ldrh	r3, [r3]
-	ldr	r2, [r2]
-	lsrs	r1, r3, #1
-	muls	r2, r3, r2
-	adds	r1, r1, #1
-	add	r1, r1, r2, lsr #2
-	uxth	r1, r1
-	cbz	r1, .L1140
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L1140:
-	ldr	r0, .L1177+20
-	bl	List_pop_index_node
-	ldr	r3, .L1177
-	mov	r5, r0
-	uxth	r7, r0
-	ldrh	r3, [r3]
-	cbnz	r3, .L1141
-	mov	r2, #2624
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-.L1141:
-	ldr	r3, .L1177
-	ldr	r2, .L1177
-	ldrh	r3, [r3]
+	ldr	r8, .L888+32
+	mov	r7, r1
+	movs	r6, #0
+	str	r2, [sp]
+	mov	fp, r8
+.L865:
+	ldr	r2, .L888
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	ldrh	r3, [r8]
+	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	ldrh	r3, [r10]
-	cmp	r3, r7
-	bls	.L1138
-	uxth	r5, r5
-	lsls	r3, r5, #1
-	str	r3, [sp]
-	ldr	r3, .L1177+24
-	ldr	r3, [r3]
-	ldrh	r6, [r3, r5, lsl #1]
-	cmp	r6, #0
-	bne	.L1138
-	strh	r7, [r4]	@ movhi
+	cmp	r2, r3
+	bge	.L866
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L867
+.L866:
 	mov	r0, r4
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1143
-	ldr	r3, .L1177+24
-	movw	r2, #65535
-	mov	r0, r7
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r3, .L1177
-	ldrh	r2, [r8]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldrh	r2, [r10]
-	cmp	r3, r2
-	ble	.L1138
-	movw	r2, #2638
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-	b	.L1138
-.L1165:
-	movs	r1, #0
-	b	.L1140
-.L1143:
-	ldr	r3, .L1177
-	ldrh	r2, [r8]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldrh	r2, [r10]
-	cmp	r3, r2
-	ble	.L1145
-	movw	r2, #2641
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
-	bl	printf
-.L1145:
-	ldr	r3, .L1177+28
-	add	lr, r4, #16
-	ldr	r2, .L1177+32
-	mov	r8, #0
-	ldr	ip, [r3]
-	ldrh	r0, [r2]
-	movs	r2, #20
-	mov	r3, ip
-	mla	r0, r2, r0, ip
-.L1146:
-	cmp	r0, r3
-	bne	.L1148
-	cbnz	r6, .L1149
-	movw	r2, #2652
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	bl	Ftl_write_map_blk_to_last_page
+.L867:
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L868
+	mov	r2, #700
+	ldr	r1, .L888+4
+	ldr	r0, .L888+8
 	bl	printf
-.L1149:
-	ldr	r3, .L1177+36
-	ldrh	r3, [r3]
-	cmp	r3, r7
-	bne	.L1150
-	movw	r2, #2654
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+.L868:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L869
+	movw	r2, #701
+	ldr	r1, .L888+4
+	ldr	r0, .L888+8
 	bl	printf
-.L1150:
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1177+40
-	ldr	fp, .L1177+76
-	ldr	r8, .L1177+80
-	ldr	r1, [r3]
-	cmp	r2, #0
-	bne	.L1151
-	ldrh	r2, [r1, r5, lsl #1]
-	cmp	r2, #0
-	beq	.L1152
-	ldr	r0, .L1177+44
-	ldrh	r0, [r0]
-	add	r2, r2, r0
-.L1175:
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	mov	r0, r7
-	ldr	r2, [fp]
+.L869:
+	ldrh	r2, [r4]
 	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r5, .L888+12
+	ldrh	r3, [r3, r2, lsl #1]
+	ldrh	r2, [r4, #2]
 	str	r3, [sp, #4]
-	adds	r2, r2, #1
-	str	r2, [fp]
-	bl	ftl_set_blk_mode
-.L1176:
+	orr	r2, r2, r3, lsl #10
+	ldr	r3, [sp]
+	str	r2, [r5, #4]
+	ldr	r2, .L888+16
+	str	r3, [r5, #8]
+	ldr	r0, [r2]
+	movs	r2, #16
+	str	r0, [r5, #12]
+	bl	ftl_memset
+	ldr	r1, [r4, #28]
+	ldr	r10, [r5, #12]
 	ldr	r3, [sp, #4]
-	ldr	r0, [fp]
-	ldr	r3, [r3]
-	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L1177+48
-	ldr	r2, [r3]
-	cmp	r1, r2
-	it	hi
-	strhi	r1, [r3]
-	ldr	r3, .L1177+44
-	ldrh	r1, [r10]
-	ldrh	r2, [r3]
-	ldr	r3, [r8]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L1177+52
-	ldr	ip, .L1177+84
-	str	r0, [r3]
-	ldr	r3, .L1177+56
-	ldr	r2, [r3]
-	ldr	r3, [r2, #16]
-	adds	r3, r3, #1
-	str	r3, [r2, #16]
-	movs	r2, #20
-	ldr	r3, .L1177+28
-	ldr	r0, [r3]
-	adds	r3, r0, #4
-	mla	r2, r2, r6, r0
-	adds	r2, r2, #24
-.L1156:
-	adds	r3, r3, #20
-	cmp	r2, r3
-	bne	.L1157
-	mov	r2, r6
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r8, #0
-	bl	FlashEraseBlocks
-	mov	r10, r8
-	movs	r3, #20
-.L1158:
-	uxth	r2, r8
-	cmp	r6, r2
-	bhi	.L1160
-	cmp	r10, #0
-	beq	.L1161
-	mov	r0, r7
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1161:
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	cmp	r2, #0
-	bne	.L1162
-	ldr	r3, .L1177+24
-	movw	r2, #65535
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1138
-.L1148:
-	ldrh	r1, [lr], #2
-	movw	fp, #65535
-	str	r8, [r3, #8]
-	str	r8, [r3, #12]
-	cmp	r1, fp
-	beq	.L1147
-	mla	fp, r2, r6, ip
+	ldr	r0, [r5, #8]
+	str	r1, [r10, #4]
+	ldrh	r1, [r4, #4]
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, .L888+20
+	strh	r1, [r10]	@ movhi
+	strh	r7, [r10, #8]	@ movhi
+	ldrh	r1, [r3]
+	bl	js_hash
+	movs	r3, #1
+	str	r0, [r10, #12]
+	mov	r2, r3
+	mov	r1, r3
+	mov	r0, r5
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r5]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L870
+	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	lsls	r1, r1, #10
+	ldr	r0, .L888+24
 	uxth	r6, r6
-	str	r1, [fp, #4]
-.L1147:
-	adds	r3, r3, #20
-	b	.L1146
-.L1152:
-	movs	r2, #2
-	b	.L1175
-.L1151:
-	ldrh	r2, [r1, r5, lsl #1]
-	mov	r0, r7
-	str	r3, [sp, #4]
-	adds	r2, r2, #1
-	strh	r2, [r1, r5, lsl #1]	@ movhi
-	ldr	r2, [r8]
-	adds	r2, r2, #1
-	str	r2, [r8]
-	bl	ftl_set_blk_mode.part.6
-	b	.L1176
-.L1157:
-	ldr	r1, [r3, #-20]
-	and	r1, r1, ip
-	str	r1, [r3, #-20]
-	b	.L1156
-.L1160:
-	ldr	r1, .L1177+28
-	mul	r2, r3, r8
-	ldr	r1, [r1]
-	ldr	fp, [r1, r2]
-	adds	r0, r1, r2
-	cmp	fp, #-1
-	bne	.L1159
-	ldr	r0, [r0, #4]
-	add	r10, r10, #1
+	bl	printf
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	ittt	ls
+	ldrhls	r2, [fp]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r6, #3
+	bls	.L872
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L888+28
+	bl	printf
+.L873:
+	b	.L873
+.L872:
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L865
+.L887:
+	b	.L887
+.L870:
+	cmp	r2, #1
+	beq	.L876
+	cmp	r1, #256
+	beq	.L876
+	ldr	r0, [r4, #36]
+	cbz	r0, .L877
+.L876:
+	movs	r3, #0
+	str	r3, [r4, #36]
+	b	.L865
+.L877:
+	ldr	r2, [r5, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r7, lsl #2]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L889:
+	.align	2
+.L888:
+	.word	.LANCHOR88
+	.word	.LANCHOR149
+	.word	.LC1
+	.word	.LANCHOR138
+	.word	.LANCHOR114
+	.word	.LANCHOR23
+	.word	.LC18
+	.word	.LC19
+	.word	.LANCHOR20
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L897
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	mov	r10, r1
+	ldrh	r2, [r3]
 	str	r3, [sp, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-	add	r2, r4, r8, lsl #1
-	ldr	r3, [sp, #4]
-	strh	fp, [r2, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
-.L1159:
-	add	r8, r8, #1
-	b	.L1158
-.L1162:
-	ldr	r3, .L1177+60
-	ldr	r1, .L1177+64
-	ldrh	r3, [r3]
-	strh	r7, [r4]	@ movhi
-	smulbb	r3, r3, r2
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	ldr	r2, [r1]
-	uxth	r3, r3
-	strh	r3, [r4, #4]	@ movhi
-	str	r2, [r4, #12]
-	adds	r2, r2, #1
-	str	r2, [r1]
-	ldr	r2, .L1177+24
-	ldr	r1, [sp]
-	ldr	r2, [r2]
-	strh	r3, [r2, r1]	@ movhi
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1163
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1164
-.L1163:
-	movw	r2, #2707
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	cmp	r2, r0
+	bcs	.L891
+	movw	r2, #485
+	ldr	r1, .L897+4
+	ldr	r0, .L897+8
 	bl	printf
-.L1164:
+.L891:
+	ldr	fp, .L897+48
+	movs	r4, #12
+	ldr	r7, .L897+12
+	ldr	r3, [fp]
+	ldr	r8, [r3, r5, lsl #2]
+	cmp	r8, #0
+	bne	.L892
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	movs	r1, #255
+	adds	r0, r2, r4
+	ldr	r2, .L897+16
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+	ldr	r2, [r7]
+	adds	r1, r2, r4
+	strh	r5, [r2, r4]	@ movhi
+	str	r8, [r1, #4]
+.L893:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1178:
+.L892:
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	ldr	r6, .L897+20
+	add	r2, r2, r4
+	mov	r0, r6
+	ldr	r2, [r2, #8]
+	str	r8, [r6, #4]
+	str	r2, [r6, #8]
+	ldr	r2, .L897+24
+	ldr	r2, [r2]
+	str	r2, [r6, #12]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r10, [r6, #12]
+	ldrh	r2, [r10, #8]
+	cmp	r2, r5
+	beq	.L894
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L897+28
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r6, #12]
+	mov	r2, r3
+	ldr	r0, .L897+32
+	bl	rknand_print_hex
+	ldr	r3, [sp, #4]
+	movs	r2, #4
+	ldr	r1, [fp]
+	ldr	r0, .L897+36
+	ldrh	r3, [r3]
+	bl	rknand_print_hex
+.L895:
+	ldrh	r3, [r10, #8]
+	cmp	r3, r5
+	beq	.L896
+	mov	r2, #508
+	ldr	r1, .L897+4
+	ldr	r0, .L897+8
+	bl	printf
+.L896:
+	ldr	r3, [r7]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r5, [r3, r4]	@ movhi
+	b	.L893
+.L894:
+	ldr	r2, [r6]
+	cmp	r2, #256
+	bne	.L895
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L897+40
+	bl	printf
+	ldr	r3, [r7]
+	mov	r1, r5
+	ldr	r0, .L897+44
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	b	.L895
+.L898:
 	.align	2
-.L1177:
-	.word	.LANCHOR48
-	.word	.LANCHOR163
+.L897:
+	.word	.LANCHOR32
+	.word	.LANCHOR150
 	.word	.LC1
-	.word	.LANCHOR53
-	.word	.LANCHOR87
-	.word	.LANCHOR47
-	.word	.LANCHOR42
-	.word	.LANCHOR106
-	.word	.LANCHOR3
-	.word	.LANCHOR80
-	.word	.LANCHOR43
-	.word	.LANCHOR14
-	.word	.LANCHOR76
-	.word	.LANCHOR74
-	.word	.LANCHOR127
-	.word	.LANCHOR19
-	.word	.LANCHOR70
-	.word	.LANCHOR45
-	.word	.LANCHOR5
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	-1024
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.word	.LANCHOR55
+	.word	.LANCHOR23
+	.word	.LANCHOR138
+	.word	.LANCHOR114
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LANCHOR129
+	.word	.LANCHOR124
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeBadSuperBlk
+	.global	ftl_map_blk_gc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
-	ldr	r4, .L1191
-	ldrh	r3, [r4]
-	cbz	r3, .L1180
-	ldr	r8, .L1191+16
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	str	r3, [sp]
+	bl	ftl_free_no_use_map_blk
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #5
+	cmp	r2, r3
+	blt	.L900
+	uxth	r0, r0
+	ldrh	r8, [r5, r0, lsl #1]
+	cmp	r8, #0
+	beq	.L900
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L900
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L915
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L901
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L901:
+	ldr	r5, .L915+4
 	movs	r6, #0
-.L1181:
-	ldr	r3, .L1191+4
-	ldrh	r2, [r3]
-	uxth	r3, r6
+.L902:
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L909
+	movs	r1, #1
+	mov	r0, r8
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L900:
+	ldr	r3, .L915
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1187
-	bl	FtlGcReFreshBadBlk
-.L1180:
+	bcc	.L910
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L910:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1187:
-	ldr	r2, .L1191+8
-	uxth	r3, r6
-	mov	r1, r10
-	movs	r7, #0
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r2, .L1191+12
-	mov	fp, r0
-.L1182:
-	ldrh	r3, [r4]
-	uxth	r5, r7
-	cmp	r3, r5
-	bhi	.L1186
-	adds	r6, r6, #1
-	b	.L1181
-.L1186:
-	uxth	r3, r7
-	ldrh	r1, [r8, r3, lsl #1]
-	cmp	r1, fp
-	bne	.L1183
-	mov	r1, fp
-	mov	r0, r2
+.L909:
+	ldr	r3, [sp]
+	uxth	fp, r6
+	add	r3, r3, fp, lsl #2
 	str	r3, [sp, #4]
-	str	r2, [sp]
+	ldr	r3, [sp]
+	ldr	r2, [r3, fp, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L903
+	ldr	r3, .L915+8
+	str	r2, [r5, #4]
+	movs	r2, #1
+	ldr	r0, .L915+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L915+12
+	ldr	r7, [r1]
+	mov	r1, r2
+	str	r7, [r5, #12]
+	bl	FlashReadPages
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	beq	.L904
+	movw	r2, #611
+	ldr	r1, .L915+16
+	ldr	r0, .L915+20
 	bl	printf
-	mov	r0, fp
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [sp, #4]
-	ldrh	r1, [r4]
-	ldr	r2, [sp]
-	add	r3, r8, r3, lsl #1
-.L1184:
-	cmp	r5, r1
-	bcc	.L1185
-	subs	r1, r1, #1
-	strh	r1, [r4]	@ movhi
-.L1183:
-	adds	r7, r7, #1
-	b	.L1182
-.L1185:
-	ldrh	r0, [r3, #2]!
-	adds	r5, r5, #1
-	uxth	r5, r5
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1184
-.L1192:
+.L904:
+	ldr	r2, [r5]
+	adds	r2, r2, #1
+	bne	.L905
+.L907:
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	str	r3, [r2]
+.L906:
+	b	.L906
+.L905:
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	bne	.L907
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	bne	.L907
+	ldr	r2, [r5, #8]
+	mov	r1, fp
+	mov	r0, r4
+	bl	FtlMapWritePage
+.L903:
+	adds	r6, r6, #1
+	b	.L902
+.L916:
 	.align	2
-.L1191:
-	.word	.LANCHOR101
-	.word	.LANCHOR3
-	.word	.LANCHOR13
-	.word	.LC104
-	.word	.LANCHOR102
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
+.L915:
+	.word	.LANCHOR20
+	.word	.LANCHOR138
+	.word	.LANCHOR107
+	.word	.LANCHOR114
+	.word	.LANCHOR151
+	.word	.LC1
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	update_vpc_list
+	.global	flush_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	update_vpc_list, %function
-update_vpc_list:
+	.type	flush_l2p_region, %function
+flush_l2p_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L1203
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L1194
-	ldr	r2, .L1203+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L1195
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L1196:
-	ldr	r5, .L1203+8
-	mov	r1, r4
-	ldr	r0, .L1203+12
-	bl	List_remove_node
-	ldrh	r3, [r5]
-	cbnz	r3, .L1198
-	movw	r2, #2777
-	ldr	r1, .L1203+16
-	ldr	r0, .L1203+20
-	bl	printf
-.L1198:
-	ldrh	r3, [r5]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	bl	free_data_superblock
-	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1203+24
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldr	r2, .L1203+28
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1202
-	movw	r2, #2780
-	ldr	r1, .L1203+16
-	ldr	r0, .L1203+20
-	bl	printf
-.L1202:
-	movs	r3, #1
-	b	.L1193
-.L1195:
-	ldr	r2, .L1203+32
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1193
-	ldr	r2, .L1203+36
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1193
-	ldr	r2, .L1203+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L1196
-.L1193:
-	mov	r0, r3
+	movs	r4, #12
+	ldr	r5, .L918
+	muls	r4, r0, r4
+	ldr	r0, .L918+4
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
+	movs	r0, #0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1194:
-	bl	List_update_data_list
-	movs	r3, #0
-	b	.L1193
-.L1204:
+.L919:
 	.align	2
-.L1203:
-	.word	.LANCHOR42
-	.word	.LANCHOR80
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR164
-	.word	.LC1
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
+.L918:
+	.word	.LANCHOR55
+	.word	.LANCHOR129
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
-	.global	decrement_vpc_count
+	.global	l2p_flush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
+	.type	l2p_flush, %function
+l2p_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
 	push	{r4, r5, r6, lr}
-	cmp	r0, r3
-	mov	r4, r0
-	beq	.L1206
-	ldr	r5, .L1214
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1207
-	mov	r1, r0
-	ldr	r0, .L1214+4
-	bl	printf
-	ldr	r3, [r5]
-	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1208
-.L1212:
-	movs	r5, #0
-.L1205:
-	mov	r0, r5
+	movs	r4, #0
+	ldr	r5, .L924
+	ldr	r6, .L924+4
+.L921:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L923
+	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1208:
-	movw	r2, #2795
-.L1213:
-	ldr	r1, .L1214+8
-	ldr	r0, .L1214+12
+.L923:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L922
+	bl	flush_l2p_region
+.L922:
+	adds	r4, r4, #1
+	b	.L921
+.L925:
+	.align	2
+.L924:
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.log2phys,"ax",%progbits
+	.align	1
+	.global	log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r4, .L939
+	mov	r10, r0
+	mov	r5, r1
+	ldr	r3, .L939+4
+	ldr	r2, [r4]
+	ldrh	fp, [r3]
+	cmp	r0, r2
+	bcc	.L927
+	movw	r2, #813
+	ldr	r1, .L939+8
+	ldr	r0, .L939+12
 	bl	printf
-	b	.L1205
-.L1207:
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1206:
-	ldr	r6, .L1214+16
+.L927:
+	ldr	r3, [r4]
+	cmp	r10, r3
+	bcs	.L928
+	ldr	r3, .L939+16
+	add	fp, fp, #7
+	lsr	r6, r10, fp
+	movs	r2, #0
+	ldrh	r1, [r3]
+	uxth	r6, r6
+	ldr	r3, .L939+20
+	ldr	r0, [r3]
+	mov	r8, r3
+	movs	r3, #12
+.L929:
+	uxth	r4, r2
+	cmp	r4, r1
+	bcc	.L934
+	str	r3, [sp, #4]
+	bl	select_l2p_ram_region
+	ldr	r3, [sp, #4]
+	mov	r4, r0
+	ldr	r2, [r8]
+	muls	r3, r0, r3
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
 	movw	r3, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r3
-	bne	.L1210
-	strh	r4, [r6]	@ movhi
-	b	.L1212
-.L1210:
-	cmp	r4, r0
-	beq	.L1212
-	bl	update_vpc_list
-	ldr	r3, .L1214+20
-	adds	r5, r0, #0
-	ldr	r2, .L1214+24
-	it	ne
-	movne	r5, #1
-	strh	r4, [r6]	@ movhi
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1214+28
-	muls	r3, r2, r3
-	ldr	r2, .L1214
+	cmp	r2, r3
+	beq	.L935
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L935
+	bl	flush_l2p_region
+.L935:
+	mov	r1, r4
+	mov	r0, r6
+	bl	load_l2p_region
+	b	.L931
+.L928:
+	mov	r0, #-1
+	cbnz	r7, .L926
+	str	r0, [r5]
+.L926:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L934:
+	adds	r2, r2, #1
+	mla	ip, r3, r2, r0
+	ldrh	ip, [ip, #-12]
+	cmp	ip, r6
+	bne	.L929
+.L931:
+	movs	r0, #1
+	ldr	r2, [r8]
+	lsl	r0, r0, fp
+	movs	r3, #12
+	subs	r0, r0, #1
+	and	r0, r0, r10
+	uxth	r0, r0
+	mla	r3, r3, r4, r2
+	cbnz	r7, .L932
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r0, lsl #2]
+	str	r3, [r5]
+.L933:
+	ldr	r2, [r8]
+	movs	r3, #12
+	mla	r4, r3, r4, r2
+	ldr	r3, [r4, #4]
+	adds	r2, r3, #1
+	beq	.L937
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+.L937:
+	movs	r0, #0
+	b	.L926
+.L932:
+	ldr	r1, [r5]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r0, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L939+24
+	strh	r6, [r3]	@ movhi
+	b	.L933
+.L940:
+	.align	2
+.L939:
+	.word	.LANCHOR152
+	.word	.LANCHOR22
+	.word	.LANCHOR153
+	.word	.LC1
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.align	1
+	.global	FtlReUsePrevPpa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L951
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
+	cbnz	r3, .L942
+	ldr	r2, .L951+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L943
+	ldr	r2, .L951+8
+	movw	lr, #65535
+	ldr	ip, .L951+24
+	ldr	r0, .L951+12
 	ldr	r2, [r2]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
-	cmp	r2, #0
-	bne	.L1205
-	cmp	r4, r1
-	beq	.L1205
-	movw	r2, #2811
-	b	.L1213
-.L1215:
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
+.L944:
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L943
+	cmp	r4, r7
+	bne	.L945
+	mov	r1, r4
+	ldr	r0, .L951+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L946
+	movw	r2, #1733
+	ldr	r1, .L951+16
+	ldr	r0, .L951+20
+	bl	printf
+.L946:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L942:
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L943
+.L945:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L944
+.L943:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L952:
 	.align	2
-.L1214:
+.L951:
 	.word	.LANCHOR42
-	.word	.LC105
-	.word	.LANCHOR165
-	.word	.LC1
-	.word	.LANCHOR142
-	.word	.LANCHOR41
+	.word	.LANCHOR47
 	.word	.LANCHOR40
+	.word	.LANCHOR48
+	.word	.LANCHOR154
+	.word	.LC1
 	.word	-1431655765
-	.size	decrement_vpc_count, .-decrement_vpc_count
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
 	.global	FtlRecoverySuperblock
@@ -9365,144 +7408,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1344
+	beq	.L1081
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1352
+	ldr	r3, .L1091
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1219
+	bne	.L956
 	strh	r3, [r0, #4]	@ movhi
-.L1350:
+.L1089:
 	strb	r3, [r8, #6]
-.L1344:
+.L1081:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1219:
+.L956:
 	ldrh	r0, [r0, #16]
-.L1220:
+.L957:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1221
+	beq	.L958
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L1222
-	ldr	r3, .L1352+4
+	beq	.L959
+	ldr	r3, .L1091+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1352+8
+	ldr	r3, .L1091+8
 	ldr	r0, [r3]
-	ldr	r3, .L1352+12
+	ldr	r3, .L1091+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1352+16
+	ldr	r3, .L1091+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1352+20
+	ldr	r3, .L1091+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1352+24
+	ldr	r3, .L1091+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1223:
+.L960:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1227
+	bhi	.L964
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1352+28
+	ldr	r2, .L1091+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1352+8
+	ldr	r3, .L1091+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L1228:
+.L965:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L1233
-	bne	.L1231
+	bhi	.L970
+	bne	.L968
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1345:
+.L1082:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1352
+	ldr	r3, .L1091
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1235
+	bne	.L972
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L1235:
+.L972:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1236
+	bne	.L973
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1236
+	bne	.L973
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1351:
+.L1090:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1344
-.L1221:
+	b	.L1081
+.L958:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L1220
-.L1222:
+	b	.L957
+.L959:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1224
-	movw	r2, #1766
-	ldr	r1, .L1352+32
-	ldr	r0, .L1352+36
+	cbz	r3, .L961
+	mov	r2, #1800
+	ldr	r1, .L1091+32
+	ldr	r0, .L1091+36
 	bl	printf
-.L1224:
+.L961:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1225
+	cbz	r3, .L962
 	cmp	r5, r3
-	beq	.L1225
-	movw	r2, #1767
-	ldr	r1, .L1352+32
-	ldr	r0, .L1352+36
+	beq	.L962
+	movw	r2, #1801
+	ldr	r1, .L1091+32
+	ldr	r0, .L1091+36
 	bl	printf
-.L1225:
+.L962:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1350
-.L1227:
+	b	.L1089
+.L964:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L1226
+	beq	.L963
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -9518,53 +7561,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1226:
+.L963:
 	adds	r2, r2, #1
-	b	.L1223
-.L1233:
+	b	.L960
+.L970:
 	ldr	r1, [r7]
-	cbnz	r1, .L1229
+	cbnz	r1, .L966
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L1230
+	beq	.L967
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1230
+	cbz	r0, .L967
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1230:
+.L967:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1232
-.L1231:
+	bne	.L969
+.L968:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1345
-.L1229:
+	b	.L1082
+.L966:
 	ldr	fp, [sp, #12]
-.L1232:
+.L969:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1228
-.L1236:
+	b	.L965
+.L973:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1237
+	bne	.L974
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1238
-.L1237:
-	ldr	r3, .L1352+40
+	bne	.L975
+.L974:
+	ldr	r3, .L1091+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1352+8
+	ldr	r7, .L1091+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -9577,10 +7620,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L1241:
+.L978:
 	cmp	r4, r6
-	bhi	.L1251
-	ldr	r3, .L1352+4
+	bhi	.L988
+	ldr	r3, .L1091+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -9589,74 +7632,74 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1252
-.L1243:
+	b	.L989
+.L980:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L1242
+	beq	.L979
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L1242:
+.L979:
 	adds	r3, r3, #1
-.L1252:
+.L989:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1243
+	bhi	.L980
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1352+40
+	ldr	r3, .L1091+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L1244:
+.L981:
 	cmp	r5, r3
-	bne	.L1249
-	cbz	r0, .L1250
-	ldr	r3, .L1352+40
+	bne	.L986
+	cbz	r0, .L987
+	ldr	r3, .L1091+40
 	str	r2, [r3]
-.L1250:
+.L987:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1241
-.L1353:
+	b	.L978
+.L1092:
 	.align	2
-.L1352:
+.L1091:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
-	.word	.LANCHOR112
-	.word	.LANCHOR91
+	.word	.LANCHOR103
+	.word	.LANCHOR64
 	.word	.LANCHOR23
-	.word	.LANCHOR92
+	.word	.LANCHOR65
 	.word	.LANCHOR24
-	.word	.LANCHOR71
-	.word	.LANCHOR166
+	.word	.LANCHOR83
+	.word	.LANCHOR155
 	.word	.LC1
-	.word	.LANCHOR145
-.L1249:
+	.word	.LANCHOR134
+.L986:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1245
-	cbz	r0, .L1238
-.L1346:
-	ldr	r3, .L1354
+	beq	.L982
+	cbz	r0, .L975
+.L1083:
+	ldr	r3, .L1093
 	str	r2, [r3]
-.L1238:
+.L975:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1354+4
-	ldr	r3, .L1354+8
+	ldr	r6, .L1093+4
+	ldr	r3, .L1093+8
 	strh	r2, [r3]	@ movhi
-.L1253:
-	ldr	r3, .L1354+12
+.L990:
+	ldr	r3, .L1093+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -9664,64 +7707,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1254:
+.L991:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1256
+	bhi	.L993
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1349:
+.L1088:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1284
-	ldr	r3, .L1354+16
+	bhi	.L1024
+	ldr	r3, .L1093+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1253
-	ldr	r2, .L1354+12
+	bne	.L990
+	ldr	r2, .L1093+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1285:
+.L1025:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1344
+	bcs	.L1081
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1350
+	bne	.L1089
 	mov	r3, r1
-	b	.L1285
-.L1245:
+	b	.L1025
+.L982:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1248
+	beq	.L985
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1248:
+.L985:
 	adds	r3, r3, #20
-	b	.L1244
-.L1251:
+	b	.L981
+.L988:
 	mov	r2, #-1
-	b	.L1346
-.L1256:
+	b	.L1083
+.L993:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L1255
+	beq	.L992
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -9730,10 +7773,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1255:
+.L992:
 	adds	r3, r3, #1
-	b	.L1254
-.L1284:
+	b	.L991
+.L1024:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -9746,45 +7789,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1258
+	bcc	.L995
 	ldr	r3, [sp, #28]
-	bne	.L1259
+	bne	.L996
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1258
-.L1259:
+	bhi	.L995
+.L996:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1260
+	bne	.L997
 	cmp	r10, r0
-	beq	.L1261
-.L1260:
+	beq	.L998
+.L997:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1262
+	beq	.L999
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1263
+	beq	.L1000
 	ldrh	r0, [r8]
-.L1347:
+.L1086:
 	bl	decrement_vpc_count
-	b	.L1258
-.L1263:
+	b	.L995
+.L1000:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1264
-	ldr	r2, .L1354+20
+	beq	.L1001
+	ldr	r2, .L1093+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1264
+	cbz	r0, .L1001
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1264:
+.L1001:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -9792,17 +7835,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1354
+	ldr	r3, .L1093
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1265
+	beq	.L1002
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1265
+	beq	.L1002
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1266
+	beq	.L1003
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9814,130 +7857,151 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1267
-.L1268:
+	bne	.L1004
+.L1005:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1275:
+.L1012:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1258
-.L1288:
+	beq	.L995
+.L1028:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1354+24
+	ldr	r3, .L1093+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1280
-	movw	r2, #2019
-	ldr	r1, .L1354+28
-	ldr	r0, .L1354+32
+	bhi	.L1020
+	movw	r2, #2065
+	ldr	r1, .L1093+28
+	ldr	r0, .L1093+32
 	bl	printf
-.L1280:
-	ldr	r3, .L1354+36
+.L1020:
+	ldr	r3, .L1093+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1281
+	beq	.L1021
 	mov	r0, r4
-	b	.L1347
-.L1266:
+	b	.L1086
+.L1003:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1258
+	bne	.L995
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1258:
+.L995:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1349
-.L1267:
+	b	.L1088
+.L1004:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1268
-	ldr	r0, .L1354
+	bne	.L1005
+	ldr	r0, .L1093
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1268
+	beq	.L1005
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1270
-.L1273:
+	bne	.L1007
+.L1010:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1268
-.L1270:
+	b	.L1005
+.L1007:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1268
+	beq	.L1005
 	adds	r0, r1, #1
-	beq	.L1271
+	beq	.L1008
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1272:
+.L1009:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1273
+	beq	.L1010
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1354
+	ldr	r2, .L1093
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1273
+	beq	.L1010
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1268
-	b	.L1273
-.L1271:
+	beq	.L1005
+	b	.L1010
+.L1008:
 	str	r1, [r2, r5]
-	b	.L1272
-.L1265:
+	b	.L1009
+.L1094:
+	.align	2
+.L1093:
+	.word	.LANCHOR134
+	.word	.LANCHOR103
+	.word	.LANCHOR156
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR83
+	.word	.LANCHOR5
+	.word	.LANCHOR155
+	.word	.LC1
+	.word	.LANCHOR42
+.L1002:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1275
+	beq	.L1012
+	ldr	r2, .L1095
+	ldr	r3, [sp, #36]
+	ldr	r2, [r2]
+	cmp	r2, r3, lsr #10
+	bhi	.L1014
+	adds	r3, r3, #1
+.L1085:
+	bne	.L995
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1275
+	beq	.L1012
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1288
+	beq	.L1028
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1354+40
+	ldr	r3, .L1095+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1279
-	ldr	r3, .L1354+44
+	beq	.L1019
+	ldr	r3, .L1095+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1279
-	ldr	r3, .L1354+48
+	beq	.L1019
+	ldr	r3, .L1095+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1275
-.L1279:
+	bne	.L1012
+.L1019:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9947,334 +8011,537 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1275
+	beq	.L1012
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1275
+	bne	.L1012
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1275
-.L1355:
-	.align	2
-.L1354:
-	.word	.LANCHOR145
-	.word	.LANCHOR112
-	.word	.LANCHOR167
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR71
-	.word	.LANCHOR5
-	.word	.LANCHOR166
-	.word	.LC1
-	.word	.LANCHOR42
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-.L1281:
+	b	.L1012
+.L1014:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	ldr	r5, [r0, #12]
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5, #8]
+	cmp	r4, r3
+	bne	.L995
+	ldrh	r2, [r5]
+	movw	r3, #61589
+	cmp	r2, r3
+	b	.L1085
+.L1021:
 	mov	r1, r4
-	ldr	r0, .L1356
+	ldr	r0, .L1095+16
 	bl	printf
-	b	.L1258
-.L1262:
-	ldr	r3, .L1356+4
+	b	.L995
+.L999:
+	ldr	r3, .L1095+20
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1282
-	ldr	r2, .L1356+8
+	bhi	.L1022
+	ldr	r2, .L1095+24
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1356+4
+	ldr	r2, .L1095+20
 	str	r3, [r2]
-.L1282:
+.L1022:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1356+12
+	ldr	r3, .L1095+28
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1283
+	bne	.L1023
 	ldr	r2, [sp]
-.L1348:
+.L1087:
 	str	r2, [r3]
-	b	.L1258
-.L1283:
+	b	.L995
+.L1023:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1258
+	bcs	.L995
 	mov	r2, r1
-	b	.L1348
-.L1261:
+	b	.L1087
+.L998:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1351
-.L1357:
+	b	.L1090
+.L1096:
 	.align	2
-.L1356:
-	.word	.LC106
-	.word	.LANCHOR168
-	.word	.LANCHOR169
-	.word	.LANCHOR145
+.L1095:
+	.word	.LANCHOR8
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LC24
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR134
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlWriteDump_data,"ax",%progbits
+	.section	.text.ftl_check_vpc,"ax",%progbits
 	.align	1
-	.global	FtlWriteDump_data
+	.global	ftl_check_vpc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	@ args = 0, pretend = 0, frame = 24
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r4, .L1377
-	ldrh	r2, [r4, #4]
-	cmp	r2, #0
-	beq	.L1359
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1359
-	ldr	r3, .L1377+4
-	ldrb	r1, [r4, #7]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1121
+	ldr	r5, .L1121+4
+	ldr	r1, .L1121+8
+	ldr	r0, .L1121+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L1121+4
+	bl	ftl_memset
+.L1098:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L1100
+	ldr	r10, .L1121+48
+	movs	r4, #0
+	ldr	r7, .L1121+16
+	mov	r6, r4
+.L1101:
+	ldrh	r2, [r10]
+	uxth	r3, r4
 	cmp	r2, r3
-	beq	.L1359
-	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1358
-	ldr	r3, .L1377+8
-	mov	r2, r7
-	mov	r1, sp
-	ldr	r6, [r3]
-	ldr	r3, .L1377+12
-	subs	r6, r6, #1
-	mov	r0, r6
-	ldrh	r8, [r3]
-	bl	log2phys
-	ldr	r2, .L1377+16
-	ldr	r3, [sp]
-	str	r6, [sp, #20]
-	ldr	r0, [r2]
-	ldr	r2, .L1377+20
-	str	r3, [sp, #8]
-	adds	r3, r3, #1
-	str	r0, [sp, #12]
-	ldr	r5, [r2]
-	str	r5, [sp, #16]
-	str	r7, [r5, #4]
-	beq	.L1361
-	mov	r2, r7
-	movs	r1, #1
-	add	r0, sp, #4
-	bl	FlashReadPages
-.L1362:
-	ldr	fp, .L1377
-	lsl	r8, r8, #2
-	ldr	r10, .L1377+28
-	movs	r7, #0
-	movw	r3, #61589
-	strh	r3, [r5]	@ movhi
-.L1363:
-	cmp	r8, r7
-	bne	.L1367
-.L1364:
-	movs	r3, #1
-.L1376:
-	strb	r3, [r4, #10]
-.L1358:
-	add	sp, sp, #24
+	bhi	.L1103
+	ldr	r3, .L1121+20
+	ldr	r4, [r3]
+	cbz	r4, .L1104
+	ldr	r3, .L1121+24
+	mov	r8, #0
+	ldr	r5, .L1121+28
+	ldr	r10, .L1121+16
+	ldrh	r7, [r3]
+	ldr	r3, [r5]
+	ldr	fp, .L1121+4
+	subs	r4, r4, r3
+	ldr	r3, .L1121+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L1105:
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L1104
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L1106
+	movs	r6, #1
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L1121+36
+	bl	printf
+.L1106:
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L1105
+.L1104:
+	cbz	r6, .L1097
+	movw	r2, #2389
+	ldr	r1, .L1121+8
+	ldr	r0, .L1121+40
+	bl	printf
+.L1097:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1361:
-	ldr	r3, .L1377+24
-	movs	r1, #255
-	ldrh	r2, [r3]
-	bl	ftl_memset
-	b	.L1362
-.L1367:
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	beq	.L1364
-	ldr	r3, [sp, #8]
-	mov	r0, fp
-	str	r6, [r5, #8]
-	adds	r7, r7, #1
-	str	r3, [r5, #12]
-	ldrh	r3, [r4]
-	strh	r3, [r5, #2]	@ movhi
-	bl	get_new_active_ppa
-	ldr	r3, [r10]
-	movs	r1, #1
-	str	r0, [sp, #8]
-	add	r0, sp, #4
-	str	r3, [r5, #4]
+.L1100:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L1099
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, #0
-	str	r3, [r10]
-	movs	r3, #0
-	mov	r2, r3
-	bl	FlashProgPages
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	b	.L1363
-.L1359:
-	movs	r3, #0
-	b	.L1376
-.L1378:
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L1099:
+	adds	r4, r4, #1
+	b	.L1098
+.L1103:
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L1121+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L1102
+	mov	r1, r5
+	ldr	r0, .L1121+44
+	bl	printf
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L1102
+	ldrh	r2, [r8, r5, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L1102:
+	adds	r4, r4, #1
+	b	.L1101
+.L1122:
 	.align	2
-.L1377:
-	.word	.LANCHOR51
-	.word	.LANCHOR19
-	.word	.LANCHOR61
-	.word	.LANCHOR3
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.word	.LANCHOR23
-	.word	.LANCHOR71
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",%progbits
+.L1121:
+	.word	.LANCHOR152
+	.word	check_vpc_table
+	.word	.LANCHOR159
+	.word	.LC25
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LC27
+	.word	.LC1
+	.word	.LC26
+	.word	.LANCHOR5
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",%progbits
 	.align	1
-	.global	l2p_flush
+	.global	ftl_scan_all_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	l2p_flush, %function
-l2p_flush:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r4, #0
-	ldr	r5, .L1383
-	ldr	r6, .L1383+4
-	bl	FtlWriteDump_data
-.L1380:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	cmp	r3, r0
-	bhi	.L1382
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L1382:
-	ldr	r2, [r6]
-	uxth	r3, r4
-	movs	r1, #12
-	mla	r3, r1, r3, r2
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L1381
-	bl	flush_l2p_region
-.L1381:
-	adds	r4, r4, #1
-	b	.L1380
-.L1384:
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L1137
+	sub	sp, sp, #32
+	movs	r1, #0
+	ldr	r8, .L1137+24
+	ldr	r0, .L1137+4
+	bl	printf
+.L1124:
+	ldr	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1130
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1130:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L1125
+	ldr	r2, [sp, #28]
+	mov	r1, r5
+	mov	r0, r8
+	bl	printf
+.L1125:
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L1127
+	ldr	r4, .L1137+8
+	movs	r2, #0
+	movs	r1, #1
+	str	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r3, .L1137+12
+	str	r5, [r4, #16]
+	str	r2, [r4]
+	ldr	r3, [r3]
+	str	r3, [r4, #8]
+	ldr	r3, .L1137+16
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L1128
+	adds	r3, r3, #1
+	beq	.L1128
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L1127
+.L1128:
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L1137+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
+	bl	printf
+.L1127:
+	adds	r5, r5, #1
+	b	.L1124
+.L1138:
 	.align	2
-.L1383:
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+.L1137:
+	.word	.LANCHOR152
+	.word	.LC28
+	.word	.LANCHOR138
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.word	.LC30
+	.word	.LC29
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	FtlGcScanTempBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r3, #-1
-	sub	sp, sp, #24
-	ldr	r2, .L1398
-	movs	r6, #0
+	ldr	r3, .L1169
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
 	mov	r4, r0
+	ldrh	r5, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L1398+4
-	ldr	r5, [r2]
-	mvn	r2, #2
-	ldr	r8, .L1398+16
+	cmp	r5, r2
+	beq	.L1161
+	cbnz	r5, .L1140
+.L1141:
+	bl	FtlGcPageVarInit
+	b	.L1142
+.L1161:
+	movs	r5, #0
+.L1140:
+	ldr	r3, .L1169+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L1141
+.L1142:
+	ldr	fp, .L1169+52
+.L1143:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1144
+.L1160:
+	ldr	r3, .L1169+8
+	movs	r2, #0
+	ldr	r0, [fp]
+	mov	r10, r2
+	movw	lr, #65535
+	mov	r8, #20
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1169+12
 	ldr	r3, [r3]
-	str	r5, [sp, #16]
 	str	r3, [sp, #12]
-	str	r2, [r5, #8]
-	mvn	r2, #1
-	str	r2, [r5, #12]
-	ldrh	r2, [r0]
-	strh	r6, [r5]	@ movhi
-	strh	r2, [r5, #2]	@ movhi
-	movw	r2, #61589
-	str	r2, [r3]
-	add	r2, r2, #304087040
-	add	r2, r2, #1269760
-	addw	r2, r2, #1507
-	str	r2, [r3, #4]
-	ldrh	r3, [r0, #4]
-	tst	r3, #1
-	ite	eq
-	moveq	r7, #6
-	movne	r7, #7
-.L1391:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1387
-.L1388:
-	ldr	r3, .L1398+8
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1398+12
+	ldr	r3, .L1169+16
 	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1387:
+	str	r3, [sp, #16]
+	ldr	r3, .L1169+20
+	ldr	r7, [r3]
+	ldr	r3, .L1169+24
+	ldrh	ip, [r3]
+	add	r3, r4, #16
+	str	r3, [sp, #4]
+.L1145:
+	ldr	r1, [sp, #8]
+	uxth	r3, r2
+	cmp	r1, r3
+	bhi	.L1147
+	mov	r8, #0
+	movs	r2, #0
+	mov	r1, r10
+	bl	FlashReadPages
+.L1148:
+	uxth	r3, r8
+	cmp	r10, r3
+	bhi	.L1159
+	ldr	r3, .L1169+4
+	adds	r5, r5, #1
+	uxth	r5, r5
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bhi	.L1160
+.L1144:
+	ldr	r2, [sp, #20]
+	movw	r3, #65535
 	mov	r0, r4
-	bl	get_new_active_ppa
-	str	r0, [sp, #8]
-	adds	r0, r0, #1
-	beq	.L1388
-	ldr	r3, [r8]
-	movs	r1, #1
-	add	r0, sp, #4
-	str	r3, [r5, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, r6
-	str	r3, [r8]
-	movs	r3, #0
-	mov	r2, r3
-	bl	FlashProgPages
+	strh	r5, [r4, #2]	@ movhi
+	mov	r1, r5
+	strh	r3, [r2]	@ movhi
+	movs	r2, #0
+	strb	r2, [r4, #6]
+	bl	ftl_sb_update_avl_pages
+	mov	r0, #-1
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1147:
+	ldr	r1, [sp, #4]
+	ldrh	r3, [r1], #2
+	cmp	r3, lr
+	str	r1, [sp, #4]
+	beq	.L1146
+	mla	r1, r8, r10, r0
+	orr	r3, r5, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #16]
+	mul	r3, r3, r10
+	bic	r3, r3, #3
+	mov	r6, r3
+	ldr	r3, [sp, #12]
+	add	r6, r6, r3
+	mul	r3, ip, r10
+	str	r6, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	str	r3, [r1, #12]
+	add	r3, r10, #1
+	uxth	r10, r3
+.L1146:
+	adds	r2, r2, #1
+	b	.L1145
+.L1159:
+	movs	r3, #20
+	ldr	r1, [fp]
+	mul	r3, r3, r8
+	adds	r2, r1, r3
+	ldr	r6, [r1, r3]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #4]
+	cbnz	r6, .L1149
+	ldr	r7, [r2, #12]
+	movw	r2, #65535
+	ldrh	r1, [r7]
+	cmp	r1, r2
+	beq	.L1149
+	ldr	r2, .L1169+28
+	ldr	r0, [r7, #8]
+	ldr	r2, [r2]
+	cmp	r0, r2
+	bls	.L1151
+.L1149:
+	ldr	r3, .L1169+32
+	movs	r1, #0
+	ldrh	r2, [r4]
+	movs	r5, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	subs	r7, r7, #1
-	bne	.L1391
-	b	.L1388
-.L1399:
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L1143
+.L1151:
+	mov	r2, r6
+	add	r1, sp, #24
+	str	r3, [sp, #8]
+	bl	log2phys
+	ldr	r2, [r7, #12]
+	ldr	r1, [sp, #24]
+	ldr	r3, [sp, #8]
+	cmp	r2, r1
+	beq	.L1153
+.L1154:
+	ldr	r2, [r7, #8]
+	add	r8, r8, #1
+	ldr	r1, [sp, #4]
+	ldr	r0, [r7, #12]
+	bl	FtlGcUpdatePage
+	b	.L1148
+.L1153:
+	str	r3, [sp, #8]
+	adds	r3, r2, #1
+	beq	.L1154
+	str	r2, [sp, #32]
+	movs	r1, #1
+	ldr	r2, .L1169+36
+	add	r0, sp, #28
+	ldr	r2, [r2]
+	str	r2, [sp, #36]
+	ldr	r2, .L1169+40
+	ldr	r2, [r2]
+	str	r2, [sp, #40]
+	mov	r2, r6
+	bl	FlashReadPages
+	ldr	r2, .L1169+44
+	ldr	r1, [fp]
+	ldr	r3, [sp, #8]
+	ldrh	r2, [r2]
+	ldr	r0, [sp, #36]
+	add	ip, r3, r1
+	lsls	r2, r2, #7
+.L1155:
+	cmp	r6, r2
+	beq	.L1154
+	ldr	r1, [ip, #8]
+	ldr	r3, [r0, r6, lsl #2]
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r1, r3
+	beq	.L1156
+	ldr	r2, [sp, #32]
+	ldrh	r1, [r4]
+	ldr	r0, .L1169+48
+	bl	printf
+	b	.L1149
+.L1156:
+	adds	r6, r6, #1
+	b	.L1155
+.L1170:
 	.align	2
-.L1398:
-	.word	.LANCHOR123
-	.word	.LANCHOR115
-	.word	.LANCHOR42
+.L1169:
+	.word	.LANCHOR160
 	.word	.LANCHOR19
-	.word	.LANCHOR71
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.word	.LANCHOR3
+	.word	.LANCHOR64
+	.word	.LANCHOR23
+	.word	.LANCHOR65
+	.word	.LANCHOR24
+	.word	.LANCHOR152
+	.word	.LANCHOR42
+	.word	.LANCHOR110
+	.word	.LANCHOR115
+	.word	.LANCHOR12
+	.word	.LC31
+	.word	.LANCHOR103
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
 	.global	FtlVendorPartWrite
@@ -10286,7 +8553,7 @@ FtlSuperblockPowerLostFix:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1412
+	ldr	r3, .L1183
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -10295,26 +8562,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1408
-	ldr	r3, .L1412+4
+	bhi	.L1179
+	ldr	r3, .L1183+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1402:
-	cbnz	r5, .L1407
-.L1400:
+.L1173:
+	cbnz	r5, .L1178
+.L1171:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1407:
-	ldr	r3, .L1412+8
+.L1178:
+	ldr	r3, .L1183+8
 	mov	r0, r7
-	ldr	r10, .L1412+24
+	ldr	r10, .L1183+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1412+12
+	ldr	r3, .L1183+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -10328,9 +8595,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1404
+	cbz	r2, .L1175
 	cmp	r4, r3
-	beq	.L1404
+	beq	.L1175
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -10340,7 +8607,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1405:
+.L1176:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -10353,7 +8620,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1412+16
+	ldr	r0, .L1183+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -10364,27 +8631,27 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1402
-.L1404:
-	ldr	r3, .L1412+20
+	b	.L1173
+.L1175:
+	ldr	r3, .L1183+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1405
-.L1408:
+	b	.L1176
+.L1179:
 	mov	r8, #-1
-	b	.L1400
-.L1413:
+	b	.L1171
+.L1184:
 	.align	2
-.L1412:
+.L1183:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
-	.word	.LANCHOR133
+	.word	.LANCHOR123
 	.word	.LANCHOR12
-	.word	.LANCHOR158
+	.word	.LANCHOR161
 	.word	.LANCHOR23
-	.word	.LANCHOR117
+	.word	.LANCHOR108
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -10398,72 +8665,72 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1416
-	ldr	r3, .L1416+4
+	ldr	r2, .L1187
+	ldr	r3, .L1187+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1414
-	ldr	r3, .L1416+8
+	bne	.L1185
+	ldr	r3, .L1187+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1416+12
+	ldr	r3, .L1187+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1416+16
+	ldr	r3, .L1187+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1416+20
+	ldr	r3, .L1187+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1416+24
+	ldr	r3, .L1187+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1416+28
+	ldr	r3, .L1187+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1416+32
+	ldr	r3, .L1187+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1416+36
+	ldr	r3, .L1187+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1416+40
+	ldr	r3, .L1187+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1416+44
+	ldr	r3, .L1187+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1416+48
+	ldr	r3, .L1187+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1416+52
+	ldr	r3, .L1187+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1416+56
+	ldr	r3, .L1187+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1414:
+.L1185:
 	bx	lr
-.L1417:
+.L1188:
 	.align	2
-.L1416:
-	.word	.LANCHOR81
+.L1187:
+	.word	.LANCHOR135
 	.word	1179929683
 	.word	1342177352
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR73
-	.word	.LANCHOR75
-	.word	.LANCHOR63
-	.word	.LANCHOR65
-	.word	.LANCHOR76
-	.word	.LANCHOR77
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR88
+	.word	.LANCHOR91
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR87
+	.word	.LANCHOR92
+	.word	.LANCHOR93
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -10476,7 +8743,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1423
+	ldr	r2, .L1194
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -10485,22 +8752,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1423+4
-	cbnz	r0, .L1420
+	ldr	r2, .L1194+4
+	cbnz	r0, .L1191
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1421
-.L1420:
+	bcc	.L1192
+.L1191:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1423+8
+	ldr	r3, .L1194+8
 	str	r3, [r2]
-	ldr	r3, .L1423+12
+	ldr	r3, .L1194+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -10511,16 +8778,16 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1421:
+.L1192:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1424:
+.L1195:
 	.align	2
-.L1423:
-	.word	.LANCHOR170
-	.word	.LANCHOR127
+.L1194:
+	.word	.LANCHOR164
+	.word	.LANCHOR118
 	.word	1112818501
-	.word	.LANCHOR125
+	.word	.LANCHOR116
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.section	.text.sftl_vendor_write,"ax",%progbits
 	.align	1
@@ -10548,7 +8815,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1436
+	ldr	r3, .L1207
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -10557,28 +8824,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1435
-	ldr	r3, .L1436+4
+	bhi	.L1206
+	ldr	r3, .L1207+4
 	mov	r8, #0
-	ldr	fp, .L1436+28
+	ldr	fp, .L1207+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1428:
-	cbnz	r6, .L1434
-.L1426:
+.L1199:
+	cbnz	r6, .L1205
+.L1197:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1434:
-	ldr	r3, .L1436+8
+.L1205:
+	ldr	r3, .L1207+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1436+12
+	ldr	r2, .L1207+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -10593,7 +8860,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1430
+	beq	.L1201
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -10607,28 +8874,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1436+16
+	ldr	r2, .L1207+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1432
+	bne	.L1203
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1436+20
+	ldr	r0, .L1207+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1436+24
+	ldr	r0, .L1207+24
 	bl	FtlMapWritePage
-.L1432:
+.L1203:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1433:
+.L1204:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -10637,27 +8904,27 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1428
-.L1430:
+	b	.L1199
+.L1201:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1433
-.L1435:
+	b	.L1204
+.L1206:
 	mov	r8, #-1
-	b	.L1426
-.L1437:
+	b	.L1197
+.L1208:
 	.align	2
-.L1436:
+.L1207:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
-	.word	.LANCHOR133
+	.word	.LANCHOR123
 	.word	.LANCHOR12
-	.word	.LANCHOR148
-	.word	.LC107
-	.word	.LANCHOR158
-	.word	.LANCHOR117
+	.word	.LANCHOR138
+	.word	.LC32
+	.word	.LANCHOR161
+	.word	.LANCHOR108
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -10672,35 +8939,35 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1440
-	ldr	r5, .L1440+4
+	ldr	r4, .L1211
+	ldr	r5, .L1211+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1440+8
+	ldr	r3, .L1211+8
 	cmp	r2, r3
-	beq	.L1439
-	ldr	r1, .L1440+12
-	ldr	r0, .L1440+16
+	beq	.L1210
+	ldr	r1, .L1211+12
+	ldr	r0, .L1211+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1439:
+.L1210:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1441:
+.L1212:
 	.align	2
-.L1440:
-	.word	.LANCHOR127
-	.word	.LANCHOR125
+.L1211:
+	.word	.LANCHOR118
+	.word	.LANCHOR116
 	.word	1112818501
-	.word	.LC108
-	.word	.LC71
+	.word	.LC33
+	.word	.LC34
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -10715,93 +8982,93 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1445
+	ldr	r4, .L1216
 	movs	r0, #0
-	ldr	r5, .L1445+4
+	ldr	r5, .L1216+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1443
+	beq	.L1214
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1443:
+.L1214:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1445+8
-	bne	.L1444
+	ldr	r3, .L1216+8
+	bne	.L1215
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1445+12
+	ldr	r2, .L1216+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1445+16
+	ldr	r2, .L1216+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1445+20
+	ldr	r2, .L1216+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1445+24
+	ldr	r2, .L1216+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1445+28
+	ldr	r2, .L1216+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1445+32
+	ldr	r2, .L1216+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1445+36
+	ldr	r2, .L1216+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1445+40
+	ldr	r2, .L1216+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1445+44
+	ldr	r2, .L1216+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1445+48
+	ldr	r2, .L1216+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1445+52
+	ldr	r2, .L1216+52
 	str	r1, [r2]
-.L1444:
-	ldr	r1, .L1445+56
-	ldr	r2, .L1445+60
+.L1215:
+	ldr	r1, .L1216+56
+	ldr	r2, .L1216+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1445+64
+	ldr	r1, .L1216+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1445+68
+	ldr	r3, .L1216+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1446:
+.L1217:
 	.align	2
-.L1445:
-	.word	.LANCHOR81
+.L1216:
+	.word	.LANCHOR135
 	.word	1179929683
-	.word	.LANCHOR73
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR75
-	.word	.LANCHOR63
-	.word	.LANCHOR65
-	.word	.LANCHOR76
-	.word	.LANCHOR77
-	.word	.LANCHOR72
+	.word	.LANCHOR91
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR88
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR87
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR90
 	.word	.LANCHOR14
 	.word	.LANCHOR5
-	.word	.LANCHOR74
+	.word	.LANCHOR145
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",%progbits
 	.align	1
@@ -10818,6 +9085,100 @@ sftl_vendor_read:
 	add	r0, r0, #256
 	b	FtlVendorPartRead
 	.size	sftl_vendor_read, .-sftl_vendor_read
+	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDump_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #36]
+	cmp	r3, #0
+	beq	.L1219
+	movs	r3, #0
+	ldr	r5, .L1231
+	str	r3, [r0, #36]
+	ldr	r3, .L1231+4
+	ldrh	r6, [r0, #6]
+	mov	r7, r5
+	ldr	r10, [r0, #24]
+	ldr	r3, [r3]
+	str	r3, [r5, #8]
+	ldr	r3, .L1231+8
+	ldr	r8, [r3]
+	ldrh	r3, [r0, #2]
+	str	r8, [r5, #12]
+	cbz	r3, .L1221
+	ldr	r2, .L1231+12
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L1221
+	ldrh	r2, [r0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L1221
+	ldr	r1, [r0, #12]
+	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1221
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r8, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
+	cmp	r2, r3
+	bne	.L1221
+	ldr	r2, [r5, #8]
+.L1230:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	FtlMapWritePage
+.L1221:
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ldr	r3, [r10, r6, lsl #2]
+	str	r3, [r7, #4]
+	cbz	r3, .L1222
+	movs	r2, #1
+	ldr	r0, .L1231
+	mov	r1, r2
+	bl	FlashReadPages
+.L1223:
+	ldr	r2, [r7, #8]
+	mov	r1, r6
+	b	.L1230
+.L1222:
+	ldr	r3, .L1231+16
+	movs	r1, #255
+	ldr	r0, [r7, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L1223
+.L1219:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1232:
+	.align	2
+.L1231:
+	.word	.LANCHOR138
+	.word	.LANCHOR107
+	.word	.LANCHOR114
+	.word	.LANCHOR20
+	.word	.LANCHOR23
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
 	.global	FtlVpcTblFlush
@@ -10830,207 +9191,216 @@ FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, #0
-	ldr	r3, .L1463
-	ldr	r4, .L1463+4
-	ldr	r10, .L1463+76
-	ldr	r0, [r3]
-	ldr	r5, .L1463+8
-	ldr	r7, [r10]
-	ldrh	r2, [r4]
-	str	r0, [r5, #8]
-	str	r7, [r5, #12]
-	strh	r2, [r7, #2]	@ movhi
-	movw	r2, #61604
-	strh	r2, [r7]	@ movhi
-	ldr	r2, [r4, #8]
-	ldr	r6, .L1463+12
-	ldr	ip, .L1463+80
-	str	r2, [r7, #4]
-	ldr	r2, .L1463+16
-	str	fp, [r7, #8]
-	str	fp, [r7, #12]
-	stm	r6, {r2, ip}
-	ldrh	r2, [r4, #6]
-	str	r3, [sp, #4]
-	ldr	r8, .L1463+84
-	strh	r2, [r6, #8]	@ movhi
-	ldr	r2, .L1463+20
+	mov	r10, #0
+	ldr	r5, .L1248
+	ldr	r3, .L1248+4
+	ldr	fp, .L1248+76
+	ldr	r6, .L1248+8
+	ldr	r7, [r3]
+	ldr	r0, [fp]
+	ldrh	r3, [r5]
+	str	r7, [r6, #12]
+	str	r0, [r6, #8]
+	strh	r3, [r7, #2]	@ movhi
+	movw	r3, #61604
+	ldr	r4, .L1248+12
+	strh	r3, [r7]	@ movhi
+	ldr	r2, .L1248+16
+	ldr	r3, [r5, #8]
+	ldr	ip, .L1248+80
+	str	r10, [r7, #8]
+	str	r3, [r7, #4]
+	stm	r4, {r2, ip}
+	ldrh	r2, [r5, #6]
+	str	r10, [r7, #12]
+	ldr	r8, .L1248+84
+	strh	r2, [r4, #8]	@ movhi
+	ldr	r2, .L1248+20
+	ldr	r3, .L1248+24
 	ldrh	r2, [r2]
-	strb	r2, [r6, #10]
-	ldr	r2, .L1463+24
+	strb	r2, [r4, #10]
+	ldr	r2, .L1248+28
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r6, #14]	@ movhi
+	strh	r1, [r4, #14]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r6, #11]
+	strb	r2, [r4, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1463+28
-	strh	r1, [r6, #16]	@ movhi
+	ldr	r2, .L1248+32
+	strh	r1, [r4, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r6, #18]	@ movhi
+	strh	r1, [r4, #18]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	strb	r2, [r4, #12]
 	orr	r1, r1, ip, lsl #6
-	strh	r1, [r6, #20]	@ movhi
-	strb	r2, [r6, #12]
-	ldr	r2, .L1463+32
+	ldr	r2, .L1248+36
+	strh	r1, [r4, #20]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r6, #22]	@ movhi
+	strh	r1, [r4, #22]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r6, #13]
+	strb	r2, [r4, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1463+36
-	strh	r1, [r6, #24]	@ movhi
+	ldr	r2, .L1248+40
+	strh	r1, [r4, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
-	str	r2, [r6, #32]
+	str	r2, [r4, #32]
 	ldr	r2, [r8]
-	str	r2, [r6, #40]
-	ldr	r2, .L1463+40
+	str	r2, [r4, #40]
+	ldr	r2, .L1248+44
 	ldr	r2, [r2]
-	str	r2, [r6, #36]
-	ldr	r2, .L1463+44
-	ldrh	r2, [r2]
+	str	r2, [r4, #36]
+	ldrh	r2, [r3]
 	bl	ftl_memset
-	mov	r1, r6
-	ldr	r6, .L1463+48
+	mov	r1, r4
+	ldr	r4, .L1248+48
 	movs	r2, #48
-	ldr	r0, [r5, #8]
+	ldr	r0, [r6, #8]
 	bl	ftl_memcpy
-	ldrh	r2, [r6]
-	ldr	r0, [r5, #8]
-	ldr	r1, .L1463+52
+	ldrh	r2, [r4]
+	ldr	r0, [r6, #8]
+	ldr	r1, .L1248+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-	ldrh	r0, [r6]
-	ldr	r1, .L1463+56
-	ldr	r6, [r5, #8]
+	ldrh	r0, [r4]
+	ldr	r1, .L1248+56
+	ldr	r4, [r6, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
 	ldr	r1, [r1]
 	adds	r2, r2, #4
 	bic	r0, r0, #3
-	add	r0, r0, r6
-	mov	r6, fp
+	add	r0, r0, r4
+	mov	r4, r10
 	bl	ftl_memcpy
-	mov	r0, fp
-	movw	fp, #65535
+	mov	r0, r10
+	ldr	r10, .L1248+4
 	bl	FtlUpdateVaildLpn
-.L1449:
-	ldr	r3, [sp, #4]
-	ldrh	r1, [r4, #2]
-	ldrh	r2, [r4]
-	ldr	r3, [r3]
-	str	r3, [r5, #8]
+	movw	r3, #65535
+	str	r3, [sp]
+	ldr	r3, .L1248+24
+	str	r3, [sp, #4]
+.L1234:
+	ldr	r3, [fp]
+	ldrh	r1, [r5, #2]
+	ldrh	r2, [r5]
+	str	r3, [r6, #8]
 	ldr	r3, [r10]
-	str	r3, [r5, #12]
+	str	r3, [r6, #12]
 	orr	r3, r1, r2, lsl #10
-	str	r3, [r5, #4]
-	ldr	r3, .L1463+60
+	str	r3, [r6, #4]
+	ldr	r3, .L1248+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1450
+	blt	.L1235
+	ldrh	r3, [r5, #4]
+	strh	r2, [r5, #4]	@ movhi
+	str	r3, [sp]
 	movs	r3, #0
-	ldrh	fp, [r4, #4]
-	strh	r3, [r4, #2]	@ movhi
-	strh	r2, [r4, #4]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
 	ldr	r3, [r8]
-	strh	r0, [r4]	@ movhi
+	strh	r0, [r5]	@ movhi
 	adds	r2, r3, #1
-	str	r3, [r4, #8]
+	str	r3, [r5, #8]
 	str	r2, [r8]
 	lsls	r2, r0, #10
-	str	r2, [r5, #4]
+	str	r2, [r6, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1450:
+.L1235:
+	ldr	r3, [sp, #4]
+	ldr	r0, [fp]
+	ldrh	r1, [r3]
+	bl	js_hash
 	movs	r3, #1
-	ldr	r0, .L1463+8
+	str	r0, [r7, #12]
 	mov	r2, r3
 	mov	r1, r3
+	ldr	r0, .L1248+8
 	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	ldr	r2, [r5]
+	ldrh	r3, [r5, #2]
+	ldr	r2, [r6]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	adds	r1, r2, #1
-	strh	r3, [r4, #2]	@ movhi
-	bne	.L1451
+	strh	r3, [r5, #2]	@ movhi
+	bne	.L1236
 	cmp	r3, #1
-	bne	.L1452
-	movw	r2, #1135
-	ldr	r1, .L1463+64
-	ldr	r0, .L1463+68
+	bne	.L1237
+	movw	r2, #1138
+	ldr	r1, .L1248+64
+	ldr	r0, .L1248+68
 	bl	printf
-.L1452:
-	ldrh	r3, [r4, #2]
-	adds	r6, r6, #1
-	uxth	r6, r6
+.L1237:
+	ldrh	r3, [r5, #2]
+	adds	r4, r4, #1
+	uxth	r4, r4
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1463+60
+	ldreq	r3, .L1248+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
-	strheq	r3, [r4, #2]	@ movhi
-	cmp	r6, #3
-	bls	.L1449
-	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1463+72
+	strheq	r3, [r5, #2]	@ movhi
+	cmp	r4, #3
+	bls	.L1234
+	mov	r2, r4
+	ldr	r1, [r6, #4]
+	ldr	r0, .L1248+72
 	bl	printf
-.L1455:
-	b	.L1455
-.L1451:
+.L1240:
+	b	.L1240
+.L1236:
 	cmp	r3, #1
-	beq	.L1449
+	beq	.L1234
 	cmp	r2, #256
-	beq	.L1449
+	beq	.L1234
+	ldr	r2, [sp]
 	movw	r3, #65535
-	cmp	fp, r3
-	beq	.L1456
+	cmp	r2, r3
+	beq	.L1241
 	movs	r1, #1
-	mov	r0, fp
+	mov	r0, r2
 	bl	FtlFreeSysBlkQueueIn
-.L1456:
+.L1241:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1464:
+.L1249:
 	.align	2
-.L1463:
-	.word	.LANCHOR115
-	.word	.LANCHOR79
-	.word	.LANCHOR148
+.L1248:
+	.word	.LANCHOR139
+	.word	.LANCHOR114
+	.word	.LANCHOR138
 	.word	.LANCHOR39
 	.word	1179929683
 	.word	.LANCHOR10
+	.word	.LANCHOR23
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR72
-	.word	.LANCHOR71
-	.word	.LANCHOR23
+	.word	.LANCHOR90
+	.word	.LANCHOR83
 	.word	.LANCHOR5
 	.word	.LANCHOR42
 	.word	.LANCHOR1
 	.word	.LANCHOR20
-	.word	.LANCHOR171
+	.word	.LANCHOR165
 	.word	.LC1
-	.word	.LC109
-	.word	.LANCHOR123
+	.word	.LC35
+	.word	.LANCHOR106
 	.word	1342177352
-	.word	.LANCHOR70
+	.word	.LANCHOR82
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -11063,48 +9433,48 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1468
+	ldr	r3, .L1253
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1467
+	bne	.L1252
 	bl	FtlSysFlush
-.L1467:
+.L1252:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1469:
+.L1254:
 	.align	2
-.L1468:
-	.word	.LANCHOR86
+.L1253:
+	.word	.LANCHOR166
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.sftl_discard,"ax",%progbits
+	.section	.text.FtlDiscard,"ax",%progbits
 	.align	1
-	.global	sftl_discard
+	.global	FtlDiscard
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sftl_discard, %function
-sftl_discard:
+	.type	FtlDiscard, %function
+FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1485
+	ldr	r3, .L1270
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1478
+	bhi	.L1263
 	cmp	r1, #31
-	bhi	.L1472
-.L1477:
+	bhi	.L1257
+.L1262:
 	movs	r0, #0
-.L1470:
+.L1255:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1472:
-	ldr	r8, .L1485+12
+.L1257:
+	ldr	r8, .L1270+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -11112,7 +9482,7 @@ sftl_discard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1473
+	cbz	r7, .L1258
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -11120,32 +9490,32 @@ sftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1473:
-	ldr	r4, .L1485+4
+.L1258:
+	ldr	r4, .L1270+4
 	mov	r3, #-1
-	ldr	r7, .L1485+8
+	ldr	r7, .L1270+8
 	str	r3, [sp, #4]
-.L1474:
+.L1259:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1476
-	ldr	r3, .L1485+4
+	bcs	.L1261
+	ldr	r3, .L1270+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1477
+	bls	.L1262
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1477
-.L1476:
+	b	.L1262
+.L1261:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1475
+	beq	.L1260
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -11160,137 +9530,22 @@ sftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1475:
+.L1260:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1474
-.L1478:
+	b	.L1259
+.L1263:
 	mov	r0, #-1
-	b	.L1470
-.L1486:
+	b	.L1255
+.L1271:
 	.align	2
-.L1485:
+.L1270:
 	.word	.LANCHOR34
-	.word	.LANCHOR172
-	.word	.LANCHOR63
+	.word	.LANCHOR167
+	.word	.LANCHOR86
 	.word	.LANCHOR12
-	.size	sftl_discard, .-sftl_discard
-	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
-	.align	1
-	.global	FtlVpcCheckAndModify
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlVpcCheckAndModify, %function
-FtlVpcCheckAndModify:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	movs	r4, #0
-	ldr	r1, .L1500
-	ldr	r0, .L1500+4
-	bl	printf
-	ldr	r3, .L1500+8
-	movs	r1, #0
-	ldr	r5, .L1500+12
-	ldr	r6, .L1500+16
-	ldrh	r2, [r3]
-	ldr	r0, [r5]
-	lsls	r2, r2, #1
-	bl	ftl_memset
-.L1488:
-	ldr	r3, [r6]
-	cmp	r4, r3
-	bcc	.L1490
-	ldr	r10, .L1500+36
-	movs	r7, #0
-	ldr	r8, .L1500+40
-.L1491:
-	ldrh	r3, [r10]
-	uxth	r6, r7
-	cmp	r3, r6
-	bhi	.L1496
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1490:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L1489
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1489:
-	adds	r4, r4, #1
-	b	.L1488
-.L1496:
-	ldr	r3, [r8]
-	uxth	r4, r7
-	ldrh	r2, [r3, r4, lsl #1]
-	ldr	r3, [r5]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r2, r3
-	beq	.L1493
-	movw	r1, #65535
-	cmp	r2, r1
-	beq	.L1493
-	mov	r1, r4
-	ldr	r0, .L1500+20
-	bl	printf
-	ldr	r3, .L1500+24
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	beq	.L1493
-	ldr	r3, .L1500+28
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	beq	.L1493
-	ldr	r3, .L1500+32
-	ldrh	r3, [r3]
-	cmp	r3, r6
-	beq	.L1493
-	ldr	r3, [r8]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbnz	r2, .L1495
-	ldr	r2, [r5]
-	ldrh	r2, [r2, r4, lsl #1]
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1493:
-	adds	r7, r7, #1
-	b	.L1491
-.L1495:
-	ldr	r2, [r5]
-	mov	r0, r6
-	ldrh	r2, [r2, r4, lsl #1]
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	bl	update_vpc_list
-	b	.L1493
-.L1501:
-	.align	2
-.L1500:
-	.word	.LANCHOR173
-	.word	.LC94
-	.word	.LANCHOR6
-	.word	.LANCHOR128
-	.word	.LANCHOR61
-	.word	.LC110
-	.word	.LANCHOR51
-	.word	.LANCHOR53
-	.word	.LANCHOR52
-	.word	.LANCHOR5
-	.word	.LANCHOR42
-	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
 	.global	allocate_new_data_superblock
@@ -11302,47 +9557,47 @@ FtlVpcCheckAndModify:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1512
+	ldr	r3, .L1282
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1503
-	movw	r2, #2714
-	ldr	r1, .L1512+4
-	ldr	r0, .L1512+8
+	bcs	.L1273
+	movw	r2, #2760
+	ldr	r1, .L1282+4
+	ldr	r0, .L1282+8
 	bl	printf
-.L1503:
+.L1273:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1504
-	ldr	r3, .L1512+12
+	beq	.L1274
+	ldr	r3, .L1282+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1505
+	cbz	r3, .L1275
 	bl	INSERT_DATA_LIST
-.L1504:
-	ldr	r5, .L1512+16
+.L1274:
+	ldr	r5, .L1282+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1506
+	beq	.L1276
 	cmp	r4, r0
-	bne	.L1507
-	ldr	r3, .L1512+12
+	bne	.L1277
+	ldr	r3, .L1282+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1508
-.L1507:
+	cbz	r3, .L1278
+.L1277:
 	bl	update_vpc_list
-.L1508:
+.L1278:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1506:
+.L1276:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -11351,17 +9606,17 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1505:
+.L1275:
 	bl	INSERT_FREE_LIST
-	b	.L1504
-.L1513:
+	b	.L1274
+.L1283:
 	.align	2
-.L1512:
+.L1282:
 	.word	.LANCHOR5
-	.word	.LANCHOR174
+	.word	.LANCHOR168
 	.word	.LC1
 	.word	.LANCHOR42
-	.word	.LANCHOR142
+	.word	.LANCHOR131
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -11376,25 +9631,25 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1528+24
+	ldr	r8, .L1298+24
 	mov	r4, r3
 	movs	r2, #0
 	mov	r5, r0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r10, r1
 	bl	FlashProgPages
-.L1515:
+.L1285:
 	cmp	r6, r10
-	beq	.L1522
-	ldr	r7, .L1528
-	b	.L1523
-.L1518:
+	beq	.L1292
+	ldr	r7, .L1298
+	b	.L1293
+.L1288:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1516
+	bne	.L1286
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -11405,13 +9660,13 @@ FtlProgPages:
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1516:
+.L1286:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1517
+	cbnz	r3, .L1287
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1517:
-	ldr	r2, .L1528+4
+.L1287:
+	ldr	r2, .L1298+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -11427,20 +9682,20 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1523:
+.L1293:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1518
-	ldr	r3, .L1528+8
+	beq	.L1288
+	ldr	r3, .L1298+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1519
-	movw	r2, #957
-	ldr	r1, .L1528+12
-	ldr	r0, .L1528+16
+	bcc	.L1289
+	mov	r2, #960
+	ldr	r1, .L1298+12
+	ldr	r0, .L1298+16
 	bl	printf
-.L1519:
+.L1289:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
 	movs	r2, #1
@@ -11453,43 +9708,43 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	cmp	fp, #-1
 	mov	r7, r0
-	beq	.L1520
+	beq	.L1290
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1521
+	cbnz	r2, .L1291
 	mov	r1, r0
-	ldr	r0, .L1528+20
+	ldr	r0, .L1298+20
 	bl	printf
-.L1521:
+.L1291:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1520:
+.L1290:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L1515
-.L1522:
-	ldr	r3, .L1528+8
+	b	.L1285
+.L1292:
+	ldr	r3, .L1298+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1514
-	mov	r2, #972
-	ldr	r1, .L1528+12
-	ldr	r0, .L1528+16
+	bcc	.L1284
+	movw	r2, #975
+	ldr	r1, .L1298+12
+	ldr	r0, .L1298+16
 	bl	printf
-.L1514:
+.L1284:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1529:
+.L1299:
 	.align	2
-.L1528:
+.L1298:
 	.word	.LANCHOR19
-	.word	.LANCHOR81
+	.word	.LANCHOR135
 	.word	.LANCHOR3
-	.word	.LANCHOR175
+	.word	.LANCHOR169
 	.word	.LC1
-	.word	.LC111
+	.word	.LC36
 	.word	.LANCHOR42
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
@@ -11504,55 +9759,32 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movw	r2, #65535
-	ldr	r4, .L1556
-	ldr	r6, .L1556+4
-	ldrh	r5, [r4]
-	ldrh	r1, [r6]
-	cmp	r5, r2
-	bne	.L1531
-.L1541:
-	ldr	r3, .L1556+8
-	movs	r2, #0
-	str	r2, [r3]
 	movw	r3, #65535
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	bne	.L1554
-.L1532:
-	movs	r0, #0
-.L1530:
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1531:
-	cbz	r0, .L1534
-	ldr	r3, .L1556+12
-	ldrh	r0, [r3]
-	cmp	r0, r2
-	beq	.L1535
-.L1536:
-	movs	r1, #2
-.L1534:
-	ldr	r0, .L1556
+	ldr	r0, .L1319
+	ldr	r5, .L1319+4
+	ldrh	r6, [r0]
+	mov	r4, r0
+	cmp	r6, r3
+	beq	.L1301
+	ldr	r3, .L1319+8
+	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L1537
-	ldr	r3, .L1556+16
+	beq	.L1301
+	ldr	r3, .L1319+12
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r5, lsl #1]
+	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L1538
+	bls	.L1302
 	subs	r3, r3, #5
 	movs	r0, #1
-	strh	r3, [r2, r5, lsl #1]	@ movhi
+	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1538:
-	ldr	r4, .L1556+8
-	ldr	r2, [r4]
-	cbnz	r2, .L1539
-	ldr	r2, .L1556+20
+.L1302:
+	ldr	r3, [r5]
+	cbnz	r3, .L1303
+	ldr	r2, .L1319+16
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11560,60 +9792,58 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1539:
-	movs	r3, #0
-	str	r3, [r4]
-.L1550:
+.L1303:
 	movs	r0, #1
-	b	.L1530
-.L1535:
-	movs	r2, #0
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1556+24
-	ldrh	r3, [r3]
-	cmp	r3, #17
-	bhi	.L1536
-	b	.L1534
-.L1537:
-	ldr	r3, .L1556+12
-	ldrh	r2, [r3]
+	movs	r3, #0
+	str	r3, [r5]
+.L1300:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1301:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1550
-	b	.L1541
-.L1554:
-	ldrb	r1, [r4, #7]	@ zero_extendqisi2
-	ldrh	r3, [r6]
-	ldr	r5, .L1556+28
-	muls	r3, r1, r3
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	beq	.L1542
+	bne	.L1305
+.L1314:
+	movs	r0, #0
+	b	.L1300
+.L1305:
+	ldr	r6, .L1319+8
+	ldrb	r0, [r4, #7]	@ zero_extendqisi2
+	ldr	r5, .L1319+20
+	ldrh	r2, [r6]
+	ldrh	r1, [r5]
+	muls	r2, r0, r2
+	cmp	r1, r2
+	beq	.L1306
 	movs	r2, #162
-	ldr	r1, .L1556+32
-	ldr	r0, .L1556+36
+	ldr	r1, .L1319+24
+	ldr	r0, .L1319+28
 	bl	printf
-.L1542:
+.L1306:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1556+40
+	ldr	r2, .L1319+32
 	ldrh	r0, [r4]
-	ldr	fp, .L1556+68
+	ldr	fp, .L1319+64
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1556+44
+	ldr	r1, .L1319+36
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1543:
+.L1307:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1547
+	bhi	.L1311
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldr	r3, [sp, #4]
@@ -11621,10 +9851,10 @@ FtlGcFreeTempBlock:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1548
+	beq	.L1312
 	bl	INSERT_DATA_LIST
-.L1549:
-	ldr	r3, .L1556+48
+.L1313:
+	ldr	r3, .L1319+40
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -11632,35 +9862,36 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1556+52
+	ldr	r3, .L1319+44
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1556+24
+	ldr	r3, .L1319+48
 	ldrh	r2, [r3]
-	ldr	r3, .L1556+56
+	ldr	r3, .L1319+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1532
-	ldr	r3, .L1556+60
+	ble	.L1314
+	ldr	r3, .L1319+56
 	movs	r2, #20
+	mov	r0, r4
 	strh	r2, [r3]	@ movhi
-	b	.L1532
-.L1547:
+	b	.L1300
+.L1311:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L1556+64
+	ldr	r3, .L1319+60
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1544
+	bcc	.L1308
 	movs	r2, #168
-	ldr	r1, .L1556+32
-	ldr	r0, .L1556+36
+	ldr	r1, .L1319+24
+	ldr	r0, .L1319+28
 	bl	printf
-.L1544:
+.L1308:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -11668,7 +9899,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1545
+	bne	.L1309
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -11677,41 +9908,40 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1555:
+.L1318:
 	bl	decrement_vpc_count
-.L1546:
+.L1310:
 	adds	r6, r6, #1
-	b	.L1543
-.L1545:
+	b	.L1307
+.L1309:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1546
+	beq	.L1310
 	ldrh	r0, [r4]
-	b	.L1555
-.L1548:
+	b	.L1318
+.L1312:
 	bl	INSERT_FREE_LIST
-	b	.L1549
-.L1557:
+	b	.L1313
+.L1320:
 	.align	2
-.L1556:
+.L1319:
 	.word	.LANCHOR53
+	.word	.LANCHOR133
 	.word	.LANCHOR19
-	.word	.LANCHOR144
-	.word	.LANCHOR162
 	.word	.LANCHOR43
-	.word	.LANCHOR81
-	.word	.LANCHOR48
-	.word	.LANCHOR97
-	.word	.LANCHOR176
+	.word	.LANCHOR135
+	.word	.LANCHOR70
+	.word	.LANCHOR170
 	.word	.LC1
 	.word	.LANCHOR42
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.word	.LANCHOR80
-	.word	.LANCHOR78
-	.word	.LANCHOR82
-	.word	.LANCHOR98
-	.word	.LANCHOR61
+	.word	.LANCHOR84
+	.word	.LANCHOR69
+	.word	.LANCHOR144
+	.word	.LANCHOR48
+	.word	.LANCHOR171
+	.word	.LANCHOR100
+	.word	.LANCHOR71
+	.word	.LANCHOR152
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -11725,31 +9955,31 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1560
-	ldr	r5, .L1560+4
+	ldr	r4, .L1323
+	ldr	r5, .L1323+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1558
-	ldr	r0, .L1560+8
+	bcc	.L1321
+	ldr	r0, .L1323+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1560+12
+	ldr	r3, .L1323+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1558:
+.L1321:
 	pop	{r3, r4, r5, pc}
-.L1561:
+.L1324:
 	.align	2
-.L1560:
+.L1323:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
-	.word	.LANCHOR140
-	.word	.LANCHOR144
+	.word	.LANCHOR129
+	.word	.LANCHOR133
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -11764,13 +9994,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1563
-	ldr	r3, .L1563+4
+	ldr	r5, .L1326
+	ldr	r3, .L1326+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1563+8
+	ldr	r5, .L1326+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -11781,11 +10011,11 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1564:
+.L1327:
 	.align	2
-.L1563:
+.L1326:
 	.word	.LANCHOR51
-	.word	.LANCHOR168
+	.word	.LANCHOR157
 	.word	.LANCHOR52
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
@@ -11801,45 +10031,45 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1572
+	ldr	r4, .L1335
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1572+4
+	ldr	r5, .L1335+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1566:
+.L1329:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1569
+	bhi	.L1332
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1572+8
+	ldr	r3, .L1335+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1565
+	cbnz	r3, .L1328
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1571
-.L1569:
+	b	.L1334
+.L1332:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1567
-	ldr	r3, .L1572+8
+	bne	.L1330
+	ldr	r3, .L1335+8
 	movs	r5, #0
-	ldr	r0, .L1572+12
+	ldr	r0, .L1335+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1572+16
+	ldr	r2, .L1335+16
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11848,25 +10078,25 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1571:
+.L1334:
 	movs	r0, #1
-.L1565:
+.L1328:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1567:
+.L1330:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1566
-.L1573:
+	b	.L1329
+.L1336:
 	.align	2
-.L1572:
-	.word	.LANCHOR89
-	.word	.LANCHOR113
+.L1335:
+	.word	.LANCHOR62
+	.word	.LANCHOR104
 	.word	.LANCHOR53
 	.word	.LANCHOR42
-	.word	.LANCHOR81
+	.word	.LANCHOR135
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -11881,180 +10111,38 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1577
+	ldr	r4, .L1340
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1575
+	beq	.L1338
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1576
-.L1575:
+	cbnz	r3, .L1339
+.L1338:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1577
+	ldr	r0, .L1340
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1577+4
+	ldr	r3, .L1340+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1577+8
+	ldr	r3, .L1340+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1576:
-	ldr	r0, .L1577
+.L1339:
+	ldr	r0, .L1340
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1578:
+.L1341:
 	.align	2
-.L1577:
+.L1340:
 	.word	.LANCHOR53
-	.word	.LANCHOR96
-	.word	.LANCHOR97
+	.word	.LANCHOR69
+	.word	.LANCHOR70
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.FtlSysBlkInit,"ax",%progbits
-	.align	1
-	.global	FtlSysBlkInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #0
-	ldr	r6, .L1594
-	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1594+4
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L1594+8
-	ldrh	r2, [r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1580
-.L1582:
-	mov	r7, #-1
-.L1579:
-	mov	r0, r7
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1580:
-	bl	FtlLoadSysInfo
-	mov	r7, r0
-	cmp	r0, #0
-	bne	.L1582
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1594+12
-	movs	r0, #12
-	ldrh	r1, [r3]
-	ldr	r3, .L1594+16
-	ldr	r2, [r3]
-	mov	r3, r7
-.L1583:
-	cmp	r3, r1
-	bge	.L1588
-	mla	r4, r0, r3, r2
-	ldr	r4, [r4, #4]
-	cmp	r4, #0
-	bge	.L1584
-.L1588:
-	ldr	r5, .L1594+20
-	cmp	r3, r1
-	ldr	r4, .L1594+24
-	ldrh	r2, [r5, #28]
-	add	r2, r2, #1
-	strh	r2, [r5, #28]	@ movhi
-	bge	.L1593
-.L1585:
-	ldr	r6, .L1594+28
-	ldr	r0, .L1594+24
-	bl	FtlSuperblockPowerLostFix
-	mov	r0, r6
-	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1594+32
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	ldr	r0, .L1594+36
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldrh	ip, [r6]
-	ldrh	r3, [r0]
-	ldrh	lr, [r6, #4]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	ldrh	r1, [r2, ip, lsl #1]
-	sub	r1, r1, lr
-	strh	r1, [r2, ip, lsl #1]	@ movhi
-	strb	r3, [r6, #6]
-	strh	r3, [r6, #4]	@ movhi
-	ldrh	r3, [r5, #30]
-	ldrh	r2, [r0]
-	adds	r3, r3, #1
-	strh	r2, [r6, #2]	@ movhi
-	strh	r3, [r5, #30]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	b	.L1589
-.L1584:
-	adds	r3, r3, #1
-	b	.L1583
-.L1593:
-	ldrh	r3, [r6]
-	cmp	r3, #0
-	bne	.L1585
-.L1589:
-	bl	FtlVpcCheckAndModify
-	ldrh	r0, [r4]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1579
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1579
-	ldr	r4, .L1594+28
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1579
-	bl	FtlGcRefreshBlock
-	ldrh	r0, [r4]
-	bl	FtlGcRefreshBlock
-	bl	FtlVpcTblFlush
-	ldr	r0, .L1594+24
-	bl	allocate_new_data_superblock
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-	b	.L1579
-.L1595:
-	.align	2
-.L1594:
-	.word	.LANCHOR167
-	.word	.LANCHOR4
-	.word	.LANCHOR79
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR39
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -12066,544 +10154,343 @@ FtlSysBlkInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1719
+	ldr	r3, .L1424
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #48
-	str	r0, [sp, #8]
+	sub	sp, sp, #40
+	str	r0, [sp, #20]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1673
-	ldr	r3, .L1719+4
+	bne	.L1394
+	ldr	r3, .L1424+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1596
-	ldr	r3, .L1719+8
-	ldrh	r2, [r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1598
-.L1601:
-	ldr	r3, .L1719+12
+	bls	.L1342
+	ldr	r3, .L1424+8
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1599
-.L1600:
-	bl	FtlReadRefresh
-	ldr	r2, .L1719+16
-	movw	r5, #65535
-	ldr	r6, .L1719+20
-	ldr	r1, [sp, #8]
-	ldr	r3, [r2]
-	ldrh	r0, [r6]
-	adds	r3, r3, #1
-	add	r3, r3, r1, lsl #7
-	cmp	r0, r5
-	str	r3, [r2]
-	bne	.L1602
-	ldr	r1, .L1719+24
-	ldrh	r1, [r1]
-	cmp	r1, r0
-	bne	.L1603
-	ldr	r0, .L1719+28
-	ldrh	r8, [r0]
-	cmp	r8, r1
-	bne	.L1604
-	ldr	r7, .L1719+32
-	ldrh	r1, [r7]
-	cmp	r1, #24
-	ite	cc
-	movcc	r1, #5120
-	movcs	r1, #1024
-	cmp	r3, r1
-	bls	.L1604
-	ldr	r3, .L1719+36
-	movs	r4, #0
-	str	r4, [r2]
-	strh	r4, [r3]	@ movhi
-	bl	GetSwlReplaceBlock
-	cmp	r0, r8
-	mov	r5, r0
-	bne	.L1677
-	ldr	r8, .L1719+96
-	ldrh	r2, [r7]
-	ldrh	r3, [r8]
-	cmp	r2, r3
-	bcs	.L1607
-	movs	r0, #64
-	bl	List_get_gc_head_node
-	uxth	r3, r0
-	cmp	r3, r5
-	beq	.L1609
-	mov	r0, r3
-	ldr	r3, .L1719+40
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #7
-	bhi	.L1610
-	mov	r0, r4
-	bl	List_get_gc_head_node
-	uxth	r4, r0
-	movs	r3, #128
-	strh	r3, [r8]	@ movhi
-	cmp	r4, r5
-	bne	.L1606
-.L1609:
-	bl	FtlGcReFreshBadBlk
-	ldr	r3, [sp, #8]
+	beq	.L1344
+	ldr	r1, .L1424+12
+	ldrh	r2, [r1]
+	cmp	r2, r4
+	itt	eq
+	strheq	r0, [r1]	@ movhi
+	strheq	r2, [r3]	@ movhi
+.L1344:
+	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1612
-	movw	r3, #65535
-	cmp	r5, r3
-	bne	.L1612
-.L1671:
-	ldr	r3, .L1719+32
+	bne	.L1396
+	ldr	r3, .L1424+16
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1678
-	ldr	r2, .L1719+44
+	bhi	.L1397
+	ldr	r2, .L1424+20
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1614
+	bls	.L1347
 	lsrs	r4, r4, #5
-.L1613:
-	ldr	r1, .L1719+48
-	ldrh	r2, [r1]
-	cmp	r2, r3
-	mov	r2, r1
-	bcs	.L1617
-	ldr	r3, .L1719+24
+.L1346:
+	ldr	r2, .L1424+24
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L1350
+	ldr	r3, .L1424+28
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1618
-	ldr	r0, .L1719+28
+	bne	.L1351
+	ldr	r0, .L1424+12
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1618
-	ldr	r3, .L1719+36
+	bne	.L1351
+	ldr	r3, .L1424+32
 	ldrh	r0, [r3]
-	cbnz	r0, .L1619
-	ldr	r3, .L1719+52
-	ldr	r4, .L1719+56
+	cbnz	r0, .L1352
+	ldr	r3, .L1424+36
+	ldr	r4, .L1424+40
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1620
-.L1619:
-	ldr	r3, .L1719+60
+	bcs	.L1353
+.L1352:
+	ldr	r3, .L1424+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-.L1621:
-	ldr	r3, .L1719+64
+	strh	r3, [r1]	@ movhi
+.L1354:
+	ldr	r3, .L1424+48
 	movs	r2, #0
 	str	r2, [r3]
-.L1596:
-	add	sp, sp, #48
+.L1342:
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1598:
-	ldr	r2, .L1719+24
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L1601
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-	cmp	r0, #0
-	beq	.L1601
-	movs	r0, #1
-	b	.L1596
-.L1599:
-	ldr	r1, .L1719+28
-	ldrh	r2, [r1]
-	cmp	r2, r4
-	itt	eq
-	strheq	r0, [r1]	@ movhi
-	strheq	r2, [r3]	@ movhi
-	b	.L1600
-.L1610:
-	movs	r3, #64
-.L1713:
-	strh	r3, [r8]	@ movhi
-	b	.L1609
-.L1607:
-	movs	r3, #80
-	b	.L1713
-.L1677:
-	mov	r4, r0
-.L1606:
-	ldr	r3, .L1719+40
-	mov	r5, r4
-	ldr	r1, .L1719+48
-	ldrh	r2, [r7]
-	ldr	r3, [r3]
-	ldrh	r1, [r1]
-	ldr	r0, .L1719+68
-	ldrh	r3, [r3, r4, lsl #1]
-	str	r1, [sp, #4]
-	ldr	r1, .L1719+72
-	ldr	r1, [r1]
-	ldrh	r1, [r1, r4, lsl #1]
-	str	r1, [sp]
-	mov	r1, r4
-	bl	printf
-	b	.L1609
-.L1614:
+.L1347:
 	cmp	r3, #12
-	bls	.L1615
+	bls	.L1348
 	lsrs	r4, r4, #4
-	b	.L1613
-.L1615:
+	b	.L1346
+.L1348:
 	cmp	r3, #8
-	bls	.L1613
+	bls	.L1346
 	lsrs	r4, r4, #2
-	b	.L1613
-.L1678:
+	b	.L1346
+.L1397:
 	movs	r4, #1
-	b	.L1613
-.L1620:
+	b	.L1346
+.L1353:
 	movs	r3, #18
-	strh	r3, [r1]	@ movhi
-	b	.L1621
-.L1618:
-	ldr	r3, .L1719+60
+	strh	r3, [r2]	@ movhi
+	b	.L1354
+.L1351:
+	ldr	r3, .L1424+44
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-.L1617:
-	ldr	r3, .L1719+76
+	strh	r3, [r1]	@ movhi
+.L1350:
+	ldr	r3, .L1424+52
 	ldrh	r3, [r3]
-	cbz	r3, .L1679
+	cbz	r3, .L1345
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1679:
-	movw	r5, #65535
-.L1623:
-	ldrh	r3, [r6]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1632
-	cmp	r5, r3
-	beq	.L1633
-	strh	r5, [r6]	@ movhi
-.L1634:
-	ldrh	r0, [r6]
-	movw	r7, #65535
+.L1345:
+	ldr	r5, .L1424+56
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L1357
+	ldr	r3, .L1424+12
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L1358
+	ldr	r0, .L1424+60
+	ldr	r0, [r0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L1359
+	strh	r2, [r3]	@ movhi
+.L1359:
+	ldrh	r2, [r3]
+	strh	r2, [r5]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L1358:
+	ldrh	r0, [r5]
+	movw	r6, #65535
 	movs	r3, #0
-	strb	r3, [r6, #8]
-	cmp	r0, r7
-	beq	.L1632
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L1357
 	bl	IsBlkInGcList
-	cbz	r0, .L1637
-	strh	r7, [r6]	@ movhi
-.L1637:
-	ldrh	r2, [r6]
+	cbz	r0, .L1361
+	strh	r6, [r5]	@ movhi
+.L1361:
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1632
-	ldr	r0, .L1719+20
+	beq	.L1357
+	ldr	r0, .L1424+56
 	bl	make_superblock
-	ldr	r2, .L1719+80
+	ldr	r2, .L1424+64
 	movs	r3, #0
-	strh	r3, [r6, #2]	@ movhi
-	strb	r3, [r6, #6]
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1719+40
-	ldrh	r2, [r6]
+	ldr	r3, .L1424+60
+	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1719+84
+	ldr	r3, .L1424+68
 	strh	r2, [r3]	@ movhi
-.L1632:
-	ldr	r2, .L1719+88
-	ldrh	r3, [r6]
+.L1357:
+	ldr	r2, .L1424+72
+	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1638
-	ldr	r2, .L1719+92
+	beq	.L1362
+	ldr	r2, .L1424+76
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1639
-.L1638:
+	bne	.L1363
+.L1362:
 	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L1639:
-	ldr	fp, .L1719+20
-	mov	r6, fp
-.L1669:
-	ldrh	r2, [fp]
+	strh	r3, [r5]	@ movhi
+.L1363:
+	ldr	r5, .L1424+56
+	mov	r6, r5
+.L1393:
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1640
-	ldr	r10, .L1719+100
+	bne	.L1364
+	ldr	fp, .L1424+88
 	movs	r2, #0
-	ldr	r3, .L1719+64
-	mov	r8, r10
+	ldr	r3, .L1424+48
+	mov	r8, fp
 	str	r2, [r3]
-.L1641:
-	ldrh	r7, [r10]
+.L1365:
+	ldrh	r7, [fp]
 	mov	r0, r7
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1642
+	bne	.L1366
 	movs	r3, #0
 	movs	r0, #8
-	strh	r3, [r10]	@ movhi
-	b	.L1596
-.L1720:
-	.align	2
-.L1719:
-	.word	.LANCHOR108
-	.word	.LANCHOR45
-	.word	.LANCHOR162
-	.word	.LANCHOR100
-	.word	.LANCHOR84
-	.word	.LANCHOR80
-	.word	.LANCHOR53
-	.word	.LANCHOR99
-	.word	.LANCHOR48
-	.word	.LANCHOR177
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR82
-	.word	.LANCHOR61
-	.word	.LANCHOR59
-	.word	.LANCHOR78
-	.word	.LANCHOR87
-	.word	.LC112
-	.word	.LANCHOR43
-	.word	.LANCHOR101
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR83
-	.word	.LANCHOR85
-.L1624:
-	ldr	r3, .L1721
-	movs	r2, #0
-	ldr	r5, .L1721+4
-	ldr	r4, .L1721+8
-	str	r2, [r3]
-	ldrh	r2, [r5]
-	ldrh	r3, [r4]
-	ldr	r7, .L1721+12
-	cmp	r2, r3
-	bls	.L1625
-	ldrh	r3, [r7]
-	cbnz	r3, .L1626
-	ldr	r3, .L1721+16
-	ldr	r2, .L1721+20
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	add	r3, r3, r3, lsl #1
-	cmp	r2, r3, lsr #2
-	bcs	.L1627
-.L1626:
-	ldr	r3, .L1721+24
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-.L1714:
-	strh	r3, [r4]	@ movhi
-	bl	FtlReadRefresh
-	movs	r0, #0
-	bl	List_get_gc_head_node
-	ldr	r3, .L1721+28
-	uxth	r0, r0
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #4
-	bls	.L1625
-.L1717:
-	ldrh	r0, [r7]
-	b	.L1596
-.L1627:
-	movs	r3, #18
-	b	.L1714
-.L1625:
-	ldrh	r0, [r7]
-	cmp	r0, #0
-	bne	.L1629
-	ldr	r3, .L1721+24
-	ldrh	r8, [r3]
-	add	r2, r8, r8, lsl #1
-	asrs	r2, r2, #2
-	strh	r2, [r4]	@ movhi
-	bl	List_get_gc_head_node
-	ldr	r3, .L1721+28
-	uxth	r0, r0
-	ldr	r2, .L1721+32
-	ldr	r3, [r3]
-	ldrh	r2, [r2]
-	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1721+36
-	ldrh	r3, [r3]
-	muls	r2, r3, r2
-	cmp	r1, r2, asr #1
-	ble	.L1630
-	ldrh	r2, [r5]
-	add	r3, r8, #-1
-	cmp	r2, r3
-	blt	.L1630
-	bl	FtlReadRefresh
-	b	.L1717
-.L1630:
-	cmp	r1, #0
-	bne	.L1629
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldrh	r0, [r5]
-	adds	r0, r0, #1
-	b	.L1596
-.L1633:
-	ldr	r3, .L1721+40
-	ldrh	r2, [r3]
-	cmp	r2, r5
-	beq	.L1634
-	ldr	r1, .L1721+28
-	ldr	r1, [r1]
-	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1635
-	strh	r5, [r3]	@ movhi
-.L1635:
-	ldrh	r2, [r3]
-	strh	r2, [r6]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-	b	.L1634
-.L1642:
-	str	r0, [sp, #16]
+	strh	r3, [fp]	@ movhi
+	b	.L1342
+.L1396:
+	movs	r4, #1
+	b	.L1345
+.L1366:
+	str	r0, [sp, #8]
 	mov	r0, r3
-	str	r3, [sp, #12]
+	str	r3, [sp, #4]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #16]
-	cbz	r0, .L1643
-	strh	r7, [r10]	@ movhi
-	b	.L1641
-.L1643:
-	ldr	lr, .L1721+28
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	cbz	r0, .L1367
+	strh	r7, [fp]	@ movhi
+	b	.L1365
+.L1367:
 	uxth	r0, r2
+	ldr	r2, .L1424+20
+	ldr	r10, .L1424+60
 	uxth	r7, r7
-	ldr	r2, [lr]
-	strh	r7, [r10]	@ movhi
-	str	lr, [sp, #16]
-	ldrh	ip, [r2, r0, lsl #1]
-	str	r2, [sp, #12]
-	ldr	r2, .L1721+44
-	ldrh	r2, [r2]
-	mov	r1, r2
-	ldr	r2, .L1721+32
+	ldrh	lr, [r2]
+	ldr	r2, .L1424+80
+	ldr	r1, [r10]
+	strh	r7, [fp]	@ movhi
 	ldrh	r2, [r2]
-	muls	r2, r1, r2
+	ldrh	ip, [r1, r0, lsl #1]
+	mul	r2, r2, lr
 	cmp	ip, r2, asr #1
-	bgt	.L1645
+	bgt	.L1369
 	cmp	r7, #48
-	bls	.L1646
+	bls	.L1370
 	cmp	ip, #8
-	bls	.L1646
-	ldr	r7, .L1721+48
+	bls	.L1370
+	ldr	r7, .L1424+84
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1646
-.L1645:
+	bhi	.L1370
+.L1369:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1646:
-	ldr	r1, [sp, #12]
+.L1370:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1647
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L1647
+	bgt	.L1371
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1647
+	bhi	.L1371
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
 	movs	r3, #0
-	strh	r5, [r6]	@ movhi
 	strh	r3, [r8]	@ movhi
-.L1718:
-	ldr	r3, .L1721+12
+.L1423:
+	ldr	r3, .L1424+32
 	ldrh	r0, [r3]
-	b	.L1596
-.L1647:
-	cbnz	r1, .L1648
+	b	.L1342
+.L1371:
+	cbnz	r1, .L1372
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1641
-.L1648:
+	b	.L1365
+.L1425:
+	.align	2
+.L1424:
+	.word	.LANCHOR94
+	.word	.LANCHOR45
+	.word	.LANCHOR73
+	.word	.LANCHOR72
+	.word	.LANCHOR48
+	.word	.LANCHOR19
+	.word	.LANCHOR100
+	.word	.LANCHOR53
+	.word	.LANCHOR172
+	.word	.LANCHOR152
+	.word	.LANCHOR59
+	.word	.LANCHOR171
+	.word	.LANCHOR95
+	.word	.LANCHOR74
+	.word	.LANCHOR144
+	.word	.LANCHOR42
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR3
+	.word	.LANCHOR69
+	.word	.LANCHOR102
+.L1372:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1721+52
+	ldr	r2, .L1426
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1649
+	bne	.L1373
 	mov	r2, #700
-	ldr	r1, .L1721+56
-	ldr	r0, .L1721+60
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1649:
-	ldr	r3, .L1721+64
+.L1373:
+	ldr	r3, .L1426+12
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1650
+	bne	.L1374
 	movw	r2, #701
-	ldr	r1, .L1721+56
-	ldr	r0, .L1721+60
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1650:
-	ldr	r3, .L1721+68
+.L1374:
+	ldr	r3, .L1426+16
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1651
+	bne	.L1375
 	movw	r2, #702
-	ldr	r1, .L1721+56
-	ldr	r0, .L1721+60
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1651:
-	mov	r0, fp
+.L1375:
+	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1721+72
+	ldr	r2, .L1426+20
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [sp, #16]
-	ldr	r2, [r2]
+	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1721+76
+	ldr	r2, .L1426+24
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1640:
-	ldr	r3, .L1721+80
+.L1364:
+	ldr	r3, .L1426+28
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1721+44
+	ldr	r3, .L1426+32
 	ldrh	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #8]
-	cbz	r3, .L1652
-	ldr	r3, .L1721+32
-	ldr	r2, [sp, #20]
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1376
+	ldr	r3, .L1426+36
+	ldr	r2, [sp, #12]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1721+28
+	ldr	r2, .L1426+40
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -12611,9 +10498,10 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1652:
+.L1376:
 	ldrh	r3, [r6, #2]
-	ldr	r1, [sp, #20]
+	ldr	r1, [sp, #12]
+	ldr	fp, .L1426+64
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -12622,358 +10510,217 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-.L1716:
-	str	r3, [sp, #28]
-	ldrh	r3, [sp, #28]
+	str	r3, [sp, #8]
+.L1379:
+	ldrh	r3, [sp, #8]
 	cmp	r4, r3
-	bls	.L1663
-	ldr	r3, .L1721+32
-	movw	lr, #65535
-	ldrh	r1, [fp, #2]
+	bls	.L1387
+	ldr	r3, .L1426+36
+	movw	r10, #65535
+	ldrh	r1, [r5, #2]
 	mov	ip, #20
-	ldr	r7, .L1721+84
-	ldrh	r8, [r3]
-	ldr	r3, .L1721+88
-	ldr	r0, [r3]
-	ldr	r3, [sp, #28]
+	ldr	r0, [fp]
+	ldrh	lr, [r3]
+	ldr	r3, [sp, #8]
+	ldr	r7, .L1426+44
 	adds	r3, r1, r3
 	str	r3, [sp, #16]
 	movs	r3, #0
-	str	r3, [sp, #12]
-	b	.L1664
-.L1657:
+	str	r3, [sp, #4]
+	b	.L1388
+.L1381:
 	ldrh	r2, [r7, #2]!
-	cmp	r2, lr
-	beq	.L1656
-	ldr	r1, [sp, #12]
-	mla	r10, ip, r1, r0
+	cmp	r2, r10
+	beq	.L1380
+	ldr	r1, [sp, #4]
+	mla	r8, ip, r1, r0
 	ldr	r1, [sp, #16]
 	orr	r2, r1, r2, lsl #10
-	str	r2, [r10, #4]
-	ldr	r2, [sp, #12]
+	str	r2, [r8, #4]
+	ldr	r2, [sp, #4]
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp, #12]
-.L1656:
+	str	r2, [sp, #4]
+.L1380:
 	adds	r3, r3, #1
-.L1664:
+.L1388:
 	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L1657
-	ldrb	r2, [fp, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
+	cmp	lr, r2
+	bhi	.L1381
+	ldrb	r2, [r5, #8]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1715:
-	str	r3, [sp, #24]
-	ldr	r2, [sp, #12]
-	ldrh	r3, [sp, #24]
+.L1422:
+	str	r3, [sp, #16]
+	ldr	r2, [sp, #4]
+	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L1662
-	ldr	r3, [sp, #28]
+	bhi	.L1386
+	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L1716
-.L1722:
-	.align	2
-.L1721:
-	.word	.LANCHOR87
-	.word	.LANCHOR48
-	.word	.LANCHOR82
-	.word	.LANCHOR177
-	.word	.LANCHOR61
-	.word	.LANCHOR59
-	.word	.LANCHOR78
-	.word	.LANCHOR42
-	.word	.LANCHOR3
-	.word	.LANCHOR20
-	.word	.LANCHOR99
-	.word	.LANCHOR19
-	.word	.LANCHOR96
-	.word	.LANCHOR51
-	.word	.LANCHOR180
-	.word	.LC1
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR108
-	.word	.LANCHOR80+14
-	.word	.LANCHOR93
-.L1662:
-	ldr	r3, [sp, #24]
+	str	r3, [sp, #8]
+	b	.L1379
+.L1386:
+	ldr	r3, [sp, #16]
 	movs	r7, #20
 	muls	r7, r3, r7
-	ldr	r3, .L1723
-	ldr	r3, [r3]
+	ldr	r3, [fp]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1659
-	ldr	r3, [r2, #12]
-	ldrh	r2, [r3]
-	str	r3, [sp, #16]
+	beq	.L1383
+	ldr	r8, [r2, #12]
 	movw	r3, #61589
+	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L1659
-	ldr	r3, [sp, #16]
-	ldr	r8, [r3, #8]
-	cmp	r8, #-1
-	bne	.L1660
+	bne	.L1383
+	ldr	r10, [r8, #8]
+	cmp	r10, #-1
+	bne	.L1384
 	mov	r2, #736
-	ldr	r1, .L1723+4
-	ldr	r0, .L1723+8
+	ldr	r1, .L1426+4
+	ldr	r0, .L1426+8
 	bl	printf
-.L1660:
+.L1384:
 	movs	r2, #0
-	add	r1, sp, #44
-	mov	r0, r8
+	add	r1, sp, #36
+	mov	r0, r10
 	bl	log2phys
-	ldr	r3, .L1723
-	ldr	r1, [r3]
-	ldr	r3, [sp, #44]
-	add	r1, r1, r7
-	ldr	r2, [r1, #4]
+	ldr	r0, [fp]
+	ldr	r3, [sp, #36]
+	add	r0, r0, r7
+	ldr	r2, [r0, #4]
 	cmp	r2, r3
-	bne	.L1659
-	ldr	r3, .L1723+12
-	mov	r10, #20
-	ldr	r2, .L1723+12
-	ldr	r8, .L1723+32
-	ldrh	r3, [r3]
-	ldr	r1, [r1, #16]
+	bne	.L1383
+	ldr	r2, .L1426+20
+	ldr	r10, .L1426+56
+	ldr	r1, .L1426+48
+	ldrh	r3, [r2]
+	str	r1, [sp, #28]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1723+16
-	ldr	r3, [r8]
-	ldr	r0, [r2]
-	str	r2, [sp, #36]
-	mla	r3, r10, r3, r0
-	str	r1, [r3, #16]
-	str	r3, [sp, #32]
+	ldr	r2, [r1]
+	movs	r1, #20
+	ldr	r3, [r10]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r0, #16]
+	str	r2, [r3, #16]
+	str	r3, [sp, #24]
 	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #36]
-	ldr	r1, [sp, #16]
+	ldr	r3, [sp, #24]
+	ldr	r1, [sp, #28]
 	str	r0, [r3, #4]
-	ldr	r2, [r2]
-	ldr	r3, [r8]
-	mla	r10, r10, r3, r2
-	ldr	r2, .L1723
-	adds	r3, r3, #1
-	ldr	r0, [r2]
+	ldr	r2, [r1]
+	movs	r1, #20
+	ldr	r3, [r10]
+	ldr	r0, [fp]
+	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L1723+20
-	ldr	r2, [r0, #8]
-	str	r2, [r10, #8]
-	ldr	r2, [r0, #12]
-	str	r2, [r10, #12]
-	ldr	r2, [sp, #44]
-	str	r2, [r1, #12]
+	ldr	r7, .L1426+16
+	ldr	r1, [r0, #8]
+	adds	r3, r3, #1
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #36]
+	str	r2, [r8, #12]
 	ldrh	r2, [r7]
-	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L1723+24
-	str	r3, [r8]
+	strh	r2, [r8, #2]	@ movhi
+	ldr	r2, .L1426+52
+	str	r3, [r10]
 	ldr	r2, [r2]
-	str	r2, [r1, #4]
-	movs	r1, #1
+	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
-	ldr	r3, [r8]
+	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L1661
+	beq	.L1385
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1659
-.L1661:
+	cbnz	r3, .L1383
+.L1385:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1659
-	ldr	r3, .L1723+28
+	cbz	r0, .L1383
+	ldr	r3, .L1426+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1718
-.L1659:
-	ldr	r3, [sp, #24]
+	b	.L1423
+.L1383:
+	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L1715
-.L1663:
-	ldrh	r3, [fp, #2]
+	b	.L1422
+.L1387:
+	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #20]
+	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r3, r4
-	strh	r4, [fp, #2]	@ movhi
-	ldr	r4, .L1723+28
-	bhi	.L1665
-	ldr	r3, .L1723+32
+	strh	r4, [r5, #2]	@ movhi
+	ldr	r4, .L1426+28
+	bhi	.L1389
+	ldr	r3, .L1426+56
 	ldr	r3, [r3]
-	cbz	r3, .L1666
+	cbz	r3, .L1390
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1666
+	cbz	r0, .L1390
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1718
-.L1666:
-	ldr	r3, .L1723+12
+	b	.L1423
+.L1390:
+	ldr	r3, .L1426+20
 	ldrh	r1, [r3]
-	cbnz	r1, .L1667
-	ldr	r3, .L1723+36
-	ldrh	r2, [fp]
+	cbnz	r1, .L1391
+	ldr	r3, .L1426+40
+	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1667
+	cbz	r0, .L1391
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [fp]
+	ldrh	r0, [r5]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1667:
+.L1391:
 	movw	r3, #65535
-	strh	r3, [fp]	@ movhi
-.L1665:
+	strh	r3, [r5]	@ movhi
+.L1389:
 	movs	r3, #0
 	str	r3, [r4]
-	ldr	r3, .L1723+40
-	ldrh	r3, [r3]
-	cmp	r3, #2
-	bhi	.L1668
-	ldr	r3, .L1723+44
+	ldr	r3, .L1426+60
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L1392
+	ldr	r3, .L1426+32
 	ldrh	r4, [r3]
-	b	.L1669
-.L1668:
-	ldr	r2, .L1723+48
-	ldrh	r0, [r2]
-	cmp	r0, #0
-	bne	.L1596
-	adds	r0, r3, #1
-	b	.L1596
-.L1673:
+	b	.L1393
+.L1392:
+	adds	r0, r0, #1
+	b	.L1342
+.L1394:
 	movs	r0, #0
-	b	.L1596
-.L1602:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L1671
-.L1612:
-	ldr	r3, .L1723+20
-	ldrh	r2, [r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1682
-.L1672:
-	ldr	r3, .L1723+52
-	movw	r2, #65535
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bne	.L1682
-	cmp	r5, r3
-	bne	.L1682
-	ldrh	r3, [r6]
-	cmp	r3, r5
-	beq	.L1624
-.L1629:
-	movw	r5, #65535
-.L1682:
-	movs	r4, #1
-	b	.L1623
-.L1604:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L1671
-	movw	r5, #65535
-	b	.L1672
-.L1603:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	bne	.L1629
-	b	.L1671
-.L1724:
+	b	.L1342
+.L1427:
 	.align	2
-.L1723:
-	.word	.LANCHOR93
-	.word	.LANCHOR180
+.L1426:
+	.word	.LANCHOR51
+	.word	.LANCHOR175
 	.word	.LC1
-	.word	.LANCHOR178
-	.word	.LANCHOR113
+	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR71
-	.word	.LANCHOR108
-	.word	.LANCHOR89
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR94
+	.word	.LANCHOR19
+	.word	.LANCHOR3
 	.word	.LANCHOR42
+	.word	.LANCHOR144+14
+	.word	.LANCHOR104
+	.word	.LANCHOR83
+	.word	.LANCHOR62
 	.word	.LANCHOR48
-	.word	.LANCHOR19
-	.word	.LANCHOR177
-	.word	.LANCHOR99
+	.word	.LANCHOR66
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.sftl_init,"ax",%progbits
-	.align	1
-	.global	sftl_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_init, %function
-sftl_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r3, #-1
-	ldr	r4, .L1731
-	ldr	r1, .L1731+4
-	ldr	r0, .L1731+8
-	str	r3, [r4]
-	bl	printf
-	ldr	r0, .L1731+12
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1731+16
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	r0, .L1729
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1729
-	movs	r3, #1
-	str	r3, [r4]
-	ldr	r3, .L1731+20
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L1729
-	movw	r4, #8129
-.L1728:
-	movs	r1, #1
-	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1728
-.L1729:
-	movs	r0, #0
-	pop	{r4, pc}
-.L1732:
-	.align	2
-.L1731:
-	.word	.LANCHOR86
-	.word	.LC70
-	.word	.LC71
-	.word	.LANCHOR0
-	.word	.LANCHOR4
-	.word	.LANCHOR48
-	.size	sftl_init, .-sftl_init
-	.section	.text.sftl_gc,"ax",%progbits
-	.align	1
-	.global	sftl_gc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_gc, %function
-sftl_gc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #1
-	mov	r0, r1
-	b	rk_ftl_garbage_collect
-	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",%progbits
 	.align	1
 	.global	FtlRead
@@ -12991,31 +10738,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1735
+	bne	.L1429
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1734:
+.L1428:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1735:
+.L1429:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1767
+	ldr	r3, .L1461
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1756
-	ldr	r3, .L1767+4
+	bhi	.L1450
+	ldr	r3, .L1461+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1757
-	ldr	r3, .L1767+8
+	beq	.L1451
+	ldr	r3, .L1461+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -13028,7 +10775,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1767+12
+	ldr	r2, .L1461+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -13041,54 +10788,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1767+16
+	ldr	r2, .L1461+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1737:
+.L1431:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1754
-	ldr	r3, .L1767+20
+	cbnz	r3, .L1448
+	ldr	r3, .L1461+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1755
-	ldr	r3, .L1767+24
+	cbnz	r3, .L1449
+	ldr	r3, .L1461+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1734
-.L1755:
+	bhi	.L1428
+.L1449:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1734
-.L1754:
+	b	.L1428
+.L1448:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1738
-	ldr	fp, .L1767+8
+	bne	.L1432
+	ldr	fp, .L1461+8
 	mov	r10, #0
-.L1739:
+.L1433:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1741
-.L1742:
+	bcc	.L1435
+.L1436:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1746
-	ldr	r3, .L1767+28
+	beq	.L1440
+	ldr	r3, .L1461+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1737
-.L1746:
+	bne	.L1431
+.L1440:
 	cmp	r5, #0
-	beq	.L1737
-	ldr	r3, .L1767+32
+	beq	.L1431
+	ldr	r3, .L1461+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -13102,29 +10849,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1753:
+.L1447:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1767+32
+	ldr	r3, .L1461+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1748
+	bne	.L1442
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1767+36
+	ldr	r2, .L1461+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1749
+	bne	.L1443
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1766:
+.L1460:
 	bl	ftl_memcpy
-.L1749:
-	ldr	r3, .L1767+32
+.L1443:
+	ldr	r3, .L1461+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -13133,49 +10880,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1767+40
+	ldrne	r0, .L1461+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1751
-	ldr	r1, .L1767+40
+	bne	.L1445
+	ldr	r1, .L1461+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1752:
+.L1446:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1753
+	bne	.L1447
 	movs	r5, #0
-	b	.L1737
-.L1741:
+	b	.L1431
+.L1435:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1740
+	bhi	.L1434
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1740
+	bls	.L1434
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1740:
+.L1434:
 	add	r10, r10, #1
-	b	.L1739
-.L1738:
-	ldr	r2, .L1767+32
+	b	.L1433
+.L1432:
+	ldr	r2, .L1461+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1767+8
-	bne	.L1743
-	ldr	r2, .L1767+36
+	ldr	r3, .L1461+8
+	bne	.L1437
+	ldr	r2, .L1461+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -13190,11 +10937,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1744
+	bne	.L1438
 	str	r8, [r10, #8]
-.L1744:
-	ldr	r3, .L1767+44
-	ldr	r2, .L1767+48
+.L1438:
+	ldr	r3, .L1461+44
+	ldr	r2, .L1461+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -13203,12 +10950,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1742
-.L1743:
+	b	.L1436
+.L1437:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1745
-	ldr	r2, .L1767+52
+	bne	.L1439
+	ldr	r2, .L1461+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -13216,63 +10963,63 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1744
-.L1765:
+	bne	.L1438
+.L1459:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1744
-.L1745:
+	b	.L1438
+.L1439:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1765
-.L1748:
+	b	.L1459
+.L1442:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1749
-	ldr	r3, .L1767+52
+	bne	.L1443
+	ldr	r3, .L1461+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1749
-	ldr	r2, .L1767+8
+	bne	.L1443
+	ldr	r2, .L1461+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1766
-.L1751:
+	b	.L1460
+.L1445:
 	cmp	r3, #256
-	bne	.L1752
+	bne	.L1446
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1752
-.L1756:
+	b	.L1446
+.L1450:
 	mov	r3, #-1
-.L1757:
+.L1451:
 	str	r3, [sp, #4]
-	b	.L1734
-.L1768:
+	b	.L1428
+.L1462:
 	.align	2
-.L1767:
+.L1461:
 	.word	.LANCHOR34
-	.word	.LANCHOR86
+	.word	.LANCHOR166
 	.word	.LANCHOR12
-	.word	.LANCHOR69
-	.word	.LANCHOR62
-	.word	.LANCHOR101
+	.word	.LANCHOR163
+	.word	.LANCHOR89
+	.word	.LANCHOR74
 	.word	.LANCHOR48
 	.word	.LANCHOR3
-	.word	.LANCHOR112
-	.word	.LANCHOR118
-	.word	.LANCHOR81
+	.word	.LANCHOR103
+	.word	.LANCHOR109
+	.word	.LANCHOR135
 	.word	.LANCHOR24
-	.word	.LANCHOR124
-	.word	.LANCHOR119
+	.word	.LANCHOR115
+	.word	.LANCHOR110
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",%progbits
 	.align	1
@@ -13309,194 +11056,153 @@ FtlWrite:
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1771
+	bne	.L1465
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	add	r0, r3, #256
 	bl	FtlVendorPartWrite
-.L1770:
+.L1464:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1771:
+.L1465:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #20]
 	adds	r4, r3, r2
-	ldr	r3, .L1822
+	ldr	r3, .L1508
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1808
-	ldr	r3, .L1822+4
+	bhi	.L1498
+	ldr	r3, .L1508+4
 	ldr	r0, [r3]
 	adds	r5, r0, #1
-	beq	.L1770
-	ldr	r3, .L1822+8
+	beq	.L1464
+	ldr	r3, .L1508+8
 	mov	r2, #2048
 	ldr	r0, [sp, #4]
+	ldr	r7, .L1508+12
 	str	r2, [r3]
-	ldr	r3, .L1822+12
+	ldr	r3, .L1508+16
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
 	mov	r1, r5
 	str	r0, [sp, #12]
 	subs	r0, r4, #1
-	ldr	r5, .L1822+16
 	bl	__aeabi_uidiv
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
-	str	r0, [sp, #28]
+	ldr	r5, [sp, #12]
 	subs	r3, r0, r2
-	ldr	r2, .L1822+20
+	ldr	r2, .L1508+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
 	ldr	r3, [r2]
+	str	r0, [sp, #28]
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1822+24
+	ldr	r2, .L1508+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L1822+28
-	ldr	r3, [r3]
-	cbz	r3, .L1773
-	ldrh	r2, [r5, #4]
-	ldr	r3, .L1822+32
-	cmp	r2, #0
-	it	eq
-	moveq	r5, r3
-.L1773:
-	ldr	r6, [sp, #12]
-.L1774:
+.L1467:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1803
-	ldr	r5, .L1822+36
+	cbnz	r3, .L1493
+	ldr	r5, .L1508+28
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1804
-.L1806:
+	bls	.L1494
+.L1496:
 	movs	r0, #0
-	b	.L1770
-.L1803:
-	ldr	r3, .L1822+40
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+	b	.L1464
+.L1493:
+	ldr	r4, .L1508+32
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1775
-	movw	r2, #1013
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	bcc	.L1468
+	mov	r2, #1016
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
 	bl	printf
-.L1775:
-	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1776
-	ldr	r3, .L1822+16
-	ldr	r4, .L1822+28
-	cmp	r5, r3
-	bne	.L1777
-	ldr	r0, .L1822+32
-	ldrh	r5, [r0, #4]
-	cbnz	r5, .L1778
-	bl	allocate_new_data_superblock
-	str	r5, [r4]
-.L1778:
-	ldr	r0, .L1822+16
-	bl	allocate_new_data_superblock
-	ldr	r5, .L1822+16
-	ldr	r2, [r4]
-	ldr	r3, .L1822+32
-	cmp	r2, #0
-	it	ne
-	movne	r5, r3
-.L1779:
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1776
-	mov	r0, r5
+.L1468:
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L1469
+	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L1776:
-	ldrh	r2, [r5, #4]
-	ldr	r3, [sp, #8]
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+.L1469:
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
-	cmp	r2, r3
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
 	it	cs
-	movcs	r2, r3
-	ldr	r3, .L1822+40
-	str	r2, [sp, #44]
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+	movcs	r3, r2
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	str	r3, [sp, #44]
+	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1780
-	movw	r2, #1046
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	bcc	.L1470
+	movw	r2, #1049
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
 	bl	printf
-.L1780:
-	ldr	r8, .L1822+52
+.L1470:
+	ldr	r8, .L1508+44
 	mov	fp, #0
-.L1781:
+.L1471:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1801
-.L1782:
-	ldr	r0, .L1822+52
-	mov	r3, r5
+	bne	.L1491
+.L1472:
+	ldr	r0, .L1508+44
+	mov	r3, r7
 	movs	r2, #0
 	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1802
-	movw	r2, #1123
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	bls	.L1492
+	movw	r2, #1126
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
 	bl	printf
-.L1802:
+.L1492:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-	b	.L1774
-.L1777:
-	str	r2, [r4]
-	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1813
-	mov	r0, r5
-	bl	allocate_new_data_superblock
-	b	.L1779
-.L1813:
-	mov	r5, r3
-	b	.L1776
-.L1801:
-	ldrh	r2, [r5, #4]
+	b	.L1467
+.L1491:
+	ldrh	r2, [r7, #4]
 	cmp	r2, #0
-	beq	.L1782
+	beq	.L1472
 	movs	r2, #0
 	add	r1, sp, #48
-	mov	r0, r6
-	movs	r7, #20
-	bl	log2phys
 	mov	r0, r5
-	mul	r7, r7, fp
+	movs	r6, #20
+	bl	log2phys
+	mov	r0, r7
+	mul	r6, r6, fp
 	bl	get_new_active_ppa
-	ldr	r3, .L1822+56
+	ldr	r2, .L1508+48
 	ldr	r1, [r8]
-	ldrh	r2, [r3]
-	add	r1, r1, r7
+	ldrh	r2, [r2]
+	add	r1, r1, r6
 	str	r0, [r1, #4]
-	str	r6, [r1, #16]
+	str	r5, [r1, #16]
 	mul	r0, r2, fp
 	bic	r3, r0, #3
-	ldr	r0, .L1822+60
+	ldr	r0, .L1508+52
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
@@ -13507,467 +11213,1046 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1822+12
-	cmp	r6, r3
-	beq	.L1783
+	ldr	r2, .L1508+16
+	cmp	r5, r3
+	beq	.L1473
 	ldr	r3, [sp, #28]
-	cmp	r6, r3
-	bne	.L1818
+	cmp	r5, r3
+	bne	.L1504
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
-	smulbb	r2, r2, r6
+	smulbb	r2, r2, r5
 	adds	r4, r3, r1
 	movs	r3, #0
 	subs	r4, r4, r2
 	str	r3, [sp, #24]
 	uxth	r4, r4
-	b	.L1786
-.L1783:
+	b	.L1476
+.L1473:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #20]
-	subs	r4, r4, r1
-	str	r1, [sp, #24]
-	cmp	r4, r3
-	it	cs
-	movcs	r4, r3
-.L1786:
-	ldr	r2, .L1822+12
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r2]
-	cmp	r4, r2
-	ldr	r2, [r8]
-	bne	.L1787
-	cmp	r6, r3
-	add	r7, r7, r2
-	ittet	ne
-	mulne	r4, r4, r6
-	ldrne	r3, [sp, #4]
-	ldreq	r3, [sp, #16]
-	subne	r4, r4, r3
-	itett	ne
-	ldrne	r3, [sp, #16]
-	streq	r3, [r7, #8]
-	addne	r4, r3, r4, lsl #9
-	strne	r4, [r7, #8]
-.L1789:
-	ldr	r3, .L1822+40
-	ldrb	r1, [r5, #6]	@ zero_extendqisi2
+	subs	r4, r4, r1
+	str	r1, [sp, #24]
+	cmp	r4, r3
+	it	cs
+	movcs	r4, r3
+.L1476:
+	ldr	r2, .L1508+16
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	cmp	r4, r2
+	ldr	r2, [r8]
+	bne	.L1477
+	cmp	r5, r3
+	add	r6, r6, r2
+	ittet	ne
+	mulne	r4, r4, r5
+	ldrne	r3, [sp, #4]
+	ldreq	r3, [sp, #16]
+	subne	r4, r4, r3
+	itett	ne
+	ldrne	r3, [sp, #16]
+	streq	r3, [r6, #8]
+	addne	r4, r3, r4, lsl #9
+	strne	r4, [r6, #8]
+.L1479:
+	ldr	r2, .L1508+32
+	ldrb	r1, [r7, #6]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcc	.L1488
+	movw	r2, #1117
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
+	bl	printf
+.L1488:
+	ldr	r3, [sp, #40]
+	movw	r2, #61589
+	ldr	r1, [sp, #36]
+	add	fp, fp, #1
+	strh	r2, [r3, r1]	@ movhi
+	ldr	r1, .L1508+56
+	str	r5, [r10, #8]
+	adds	r5, r5, #1
+	ldr	r2, [r1]
+	str	r2, [r10, #4]
+	adds	r2, r2, #1
+	adds	r3, r2, #1
+	it	eq
+	moveq	r2, #0
+	str	r2, [r1]
+	ldr	r2, [sp, #48]
+	str	r2, [r10, #12]
+	ldrh	r2, [r7]
+	strh	r2, [r10, #2]	@ movhi
+	b	.L1471
+.L1477:
+	cmp	r5, r3
+	add	r2, r2, r6
+	ite	eq
+	ldreq	r1, .L1508+60
+	ldrne	r1, .L1508+64
+	ldr	r1, [r1]
+	str	r1, [r2, #8]
+	ldr	r2, [sp, #48]
+	adds	r1, r2, #1
+	beq	.L1482
+	str	r2, [sp, #56]
+	add	r0, sp, #52
+	ldr	r2, [r8]
+	str	r5, [sp, #68]
+	add	r2, r2, r6
+	ldr	r1, [r2, #8]
+	ldr	r2, [r2, #12]
+	str	r1, [sp, #60]
+	movs	r1, #1
+	str	r2, [sp, #64]
+	movs	r2, #0
+	bl	FlashReadPages
+	ldr	r2, [sp, #52]
+	adds	r2, r2, #1
+	bne	.L1483
+	ldr	r1, .L1508+68
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L1486:
+	ldr	r3, [sp, #12]
+	lsls	r2, r4, #9
+	cmp	r5, r3
+	bne	.L1487
+	ldr	r1, [r8]
+	ldr	r3, [sp, #24]
+	add	r6, r6, r1
+	ldr	r1, [sp, #16]
+	ldr	r0, [r6, #8]
+	add	r0, r0, r3, lsl #9
+.L1506:
+	bl	ftl_memcpy
+	b	.L1479
+.L1483:
+	ldr	r1, [r10, #8]
+	cmp	r5, r1
+	beq	.L1485
+	ldr	r0, .L1508+68
+	ldr	r2, [r0, #72]
+	adds	r2, r2, #1
+	str	r2, [r0, #72]
+	mov	r2, r5
+	ldr	r0, .L1508+72
+	bl	printf
+.L1485:
+	ldr	r2, [r10, #8]
+	cmp	r5, r2
+	beq	.L1486
+	movw	r2, #1102
+	ldr	r1, .L1508+36
+	ldr	r0, .L1508+40
+	bl	printf
+	b	.L1486
+.L1482:
+	ldr	r2, [r8]
+	movs	r1, #0
+	adds	r0, r2, r6
+	ldr	r2, .L1508+76
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+	b	.L1486
+.L1487:
+	ldr	r1, .L1508+16
+	ldr	r3, [sp, #4]
+	ldr	r0, [r8]
+	ldrh	r1, [r1]
+	add	r6, r6, r0
+	ldr	r0, [r6, #8]
+	muls	r1, r5, r1
+	subs	r1, r1, r3
+	ldr	r3, [sp, #16]
+	add	r1, r3, r1, lsl #9
+	b	.L1506
+.L1509:
+	.align	2
+.L1508:
+	.word	.LANCHOR34
+	.word	.LANCHOR166
+	.word	.LANCHOR176
+	.word	.LANCHOR51
+	.word	.LANCHOR12
+	.word	.LANCHOR162
+	.word	.LANCHOR85
+	.word	.LANCHOR48
+	.word	.LANCHOR3
+	.word	.LANCHOR177
+	.word	.LC1
+	.word	.LANCHOR105
+	.word	.LANCHOR24
+	.word	.LANCHOR115
+	.word	.LANCHOR83
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR135
+	.word	.LC37
+	.word	.LANCHOR23
+.L1504:
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #4]
+	ldr	r1, [r8]
+	muls	r2, r5, r2
+	add	r6, r6, r1
+	subs	r2, r2, r3
+	ldr	r3, [sp, #16]
+	add	r2, r3, r2, lsl #9
+	str	r2, [r6, #8]
+	b	.L1479
+.L1494:
+	ldr	r6, .L1510
+	mov	r4, #256
+	ldr	r7, .L1510+4
+.L1497:
+	ldrh	r3, [r6]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1495
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bne	.L1495
+	movs	r0, #0
+	bl	List_get_gc_head_node
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.L1495:
+	ldr	r2, .L1510+8
+	movs	r3, #128
+	movs	r1, #1
+	mov	r0, r1
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1510+12
+	strh	r3, [r2]	@ movhi
+	bl	rk_ftl_garbage_collect
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+	ldrh	r3, [r5]
+	cmp	r3, #2
+	bhi	.L1496
+	subs	r4, r4, #1
+	bne	.L1497
+	b	.L1496
+.L1498:
+	mov	r0, #-1
+	b	.L1464
+.L1511:
+	.align	2
+.L1510:
+	.word	.LANCHOR144
+	.word	.LANCHOR72
+	.word	.LANCHOR101
+	.word	.LANCHOR100
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.sftl_gc,"ax",%progbits
+	.align	1
+	.global	sftl_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_gc, %function
+sftl_gc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #1
+	mov	r0, r1
+	b	rk_ftl_garbage_collect
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r8, .L1540+144
+	sub	sp, sp, #24
+	ldr	r7, .L1540
+	ldr	r3, [r8]
+	ldr	r4, .L1540+4
+	ldr	fp, .L1540+148
+	ldrh	r2, [r7]
+	ldr	r5, .L1540+8
+	str	r3, [r4, #8]
+	ldr	r6, .L1540+12
+	ldr	r3, [fp]
+	lsls	r2, r2, #1
+	ldr	r0, [r5]
+	str	r3, [r4, #12]
+	bl	ftl_memset
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r5, [sp, #16]
+	cmp	r0, r3
+	bne	.L1514
+.L1525:
+	mov	r0, #-1
+.L1513:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1514:
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
+	ldrsh	r10, [r6]
+	sxth	r5, r0
+	adds	r0, r0, #1
+	strh	r0, [r6, #2]	@ movhi
+.L1516:
+	cmp	r5, #0
+	bge	.L1522
+	movw	r2, #1465
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+20
+	bl	printf
+	b	.L1521
+.L1522:
+	orr	r3, r5, r10, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L1540+4
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3, #12]
+	str	r3, [sp, #20]
+	cbz	r3, .L1517
+	ldr	r2, .L1540+24
+	ldr	r0, [r4, #8]
+	ldrh	r1, [r2]
+	bl	js_hash
+	ldr	r3, [sp, #20]
+	cmp	r3, r0
+	beq	.L1517
+	str	r0, [sp, #8]
+	mov	r2, r10
+	str	r3, [sp, #4]
+	ldrh	r3, [r6, #4]
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+28
+	str	r3, [sp]
+	mov	r3, r5
+	bl	printf
+	cbnz	r5, .L1518
+	ldrh	r3, [r6, #4]
+	cmp	r10, r3
+	beq	.L1518
+	sxth	r10, r3
+	ldr	r3, .L1540+32
+	ldrh	r5, [r3]
+.L1520:
+	subs	r5, r5, #1
+	sxth	r5, r5
+	b	.L1516
+.L1518:
+	mov	r3, #-1
+	str	r3, [r4]
+.L1517:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1520
+	ldr	r3, [r8]
+	ldr	r2, .L1540+36
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L1520
+	ldr	r3, [fp]
 	ldrh	r2, [r3]
-	cmp	r1, r2
-	bcc	.L1798
-	movw	r2, #1114
-	ldr	r1, .L1822+44
-	ldr	r0, .L1822+48
+	movw	r3, #61604
+	cmp	r2, r3
+	bne	.L1520
+.L1521:
+	ldr	r2, .L1540+24
+	ldrh	r3, [r7]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L1524
+	movw	r2, #1467
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+20
 	bl	printf
-.L1798:
-	ldr	r3, [sp, #40]
-	movw	r2, #61589
-	ldr	r1, [sp, #36]
-	add	fp, fp, #1
-	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1822+64
-	str	r6, [r10, #8]
-	adds	r6, r6, #1
-	ldr	r2, [r1]
-	str	r2, [r10, #4]
-	adds	r2, r2, #1
-	adds	r3, r2, #1
-	it	eq
-	moveq	r2, #0
-	str	r2, [r1]
-	ldr	r2, [sp, #48]
-	str	r2, [r10, #12]
+.L1524:
+	ldr	r5, .L1540+40
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	mov	r0, r5
+	bl	ftl_memcpy
+	ldrh	r2, [r7]
+	ldr	r1, [r4, #8]
+	ldr	r3, [sp, #16]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldrh	r1, [r7]
+	ldr	r3, [r4, #8]
+	mov	r4, r5
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L1540+44
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r2, [r5]
+	ldr	r3, .L1540+36
+	cmp	r2, r3
+	bne	.L1525
+	ldr	r3, .L1540+48
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	ldrh	r5, [r5, #8]
+	ldrh	r3, [r3]
+	strh	r5, [r6, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L1525
+	ldr	r3, .L1540+52
+	ldr	r2, .L1540+56
+	str	r5, [r3]
+	ldr	r3, .L1540+60
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	ldr	r2, .L1540+64
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L1540+68
+	str	r3, [r2]
+	ldr	r3, .L1540+72
+	ldr	r6, [r3]
+	ldr	r3, .L1540+76
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1540+80
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L1540+84
+	cmp	r5, r6
+	strh	r0, [r3]	@ movhi
+	bls	.L1526
+	movw	r2, #1489
+	ldr	r1, .L1540+16
+	ldr	r0, .L1540+20
+	bl	printf
+.L1526:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L1540+88
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L1540+92
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L1540+96
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	movs	r3, #0
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L1540+100
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L1540+104
+	str	r3, [r5]
+	ldr	r5, .L1540+108
+	str	r3, [r5]
+	ldr	r5, .L1540+112
+	str	r3, [r5]
+	ldr	r5, .L1540+116
+	str	r3, [r5]
+	ldr	r5, .L1540+120
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L1540+124
+	str	r3, [r5]
+	ldr	r5, .L1540+128
+	str	r3, [r5]
+	ldr	r5, .L1540+132
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L1540+136
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L1540+140
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L1529
+	ldr	r0, .L1540+88
+	bl	make_superblock
+.L1529:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1530
+	ldr	r0, .L1540+96
+	bl	make_superblock
+.L1530:
 	ldrh	r2, [r5]
-	strh	r2, [r10, #2]	@ movhi
-	b	.L1781
-.L1823:
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1531
+	ldr	r0, .L1540+100
+	bl	make_superblock
+.L1531:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1532
+	ldr	r0, .L1540+92
+	bl	make_superblock
+.L1532:
+	movs	r0, #0
+	b	.L1513
+.L1541:
 	.align	2
-.L1822:
-	.word	.LANCHOR34
-	.word	.LANCHOR86
-	.word	.LANCHOR181
+.L1540:
+	.word	.LANCHOR5
+	.word	.LANCHOR138
+	.word	.LANCHOR42
+	.word	.LANCHOR139
+	.word	.LANCHOR178
+	.word	.LC1
+	.word	.LANCHOR23
+	.word	.LC38
+	.word	.LANCHOR20
+	.word	1179929683
+	.word	.LANCHOR39
+	.word	.LANCHOR1
+	.word	.LANCHOR10
+	.word	.LANCHOR179
+	.word	.LANCHOR152
+	.word	.LANCHOR19
 	.word	.LANCHOR12
-	.word	.LANCHOR51
-	.word	.LANCHOR68
-	.word	.LANCHOR64
-	.word	.LANCHOR182
-	.word	.LANCHOR52
-	.word	.LANCHOR48
+	.word	.LANCHOR34
+	.word	.LANCHOR7
+	.word	.LANCHOR37
 	.word	.LANCHOR3
-	.word	.LANCHOR183
-	.word	.LC1
-	.word	.LANCHOR114
-	.word	.LANCHOR24
-	.word	.LANCHOR124
-	.word	.LANCHOR71
-.L1787:
-	cmp	r6, r3
-	add	r2, r2, r7
-	ite	eq
-	ldreq	r1, .L1824
-	ldrne	r1, .L1824+4
-	ldr	r1, [r1]
-	str	r1, [r2, #8]
-	ldr	r2, [sp, #48]
-	adds	r1, r2, #1
-	beq	.L1792
-	str	r2, [sp, #56]
-	add	r0, sp, #52
-	ldr	r2, [r8]
-	str	r6, [sp, #68]
-	add	r2, r2, r7
-	ldr	r1, [r2, #8]
-	ldr	r2, [r2, #12]
-	str	r1, [sp, #60]
-	movs	r1, #1
-	str	r2, [sp, #64]
-	movs	r2, #0
-	bl	FlashReadPages
-	ldr	r2, [sp, #52]
-	adds	r2, r2, #1
-	bne	.L1793
-	ldr	r1, .L1824+8
-	ldr	r2, [r1, #72]
-	adds	r2, r2, #1
-	str	r2, [r1, #72]
-.L1796:
-	ldr	r3, [sp, #12]
-	lsls	r2, r4, #9
-	cmp	r6, r3
-	bne	.L1797
-	ldr	r1, [r8]
-	ldr	r3, [sp, #24]
-	add	r7, r7, r1
-	ldr	r1, [sp, #16]
-	ldr	r0, [r7, #8]
-	add	r0, r0, r3, lsl #9
-.L1820:
-	bl	ftl_memcpy
-	b	.L1789
-.L1793:
-	ldr	r1, [r10, #8]
-	cmp	r6, r1
-	beq	.L1795
-	ldr	r0, .L1824+8
-	ldr	r2, [r0, #72]
-	adds	r2, r2, #1
-	str	r2, [r0, #72]
-	mov	r2, r6
-	ldr	r0, .L1824+12
-	bl	printf
-.L1795:
-	ldr	r2, [r10, #8]
-	cmp	r6, r2
-	beq	.L1796
-	movw	r2, #1099
-	ldr	r1, .L1824+16
-	ldr	r0, .L1824+20
-	bl	printf
-	b	.L1796
-.L1792:
-	ldr	r2, [r8]
+	.word	.LANCHOR171
+	.word	.LANCHOR51
+	.word	.LANCHOR144
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR87
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
 	movs	r1, #0
-	adds	r0, r2, r7
-	ldr	r2, .L1824+24
-	ldr	r0, [r0, #8]
-	ldrh	r2, [r2]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	mov	r4, r0
+	ldr	r8, [r0, #12]
+	movs	r7, #0
+	str	r3, [sp, #8]
+	ldr	r3, [r0, #16]
+	ldr	r6, .L1577
+	str	r3, [sp, #24]
+	ldrh	r3, [r0, #6]
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #8]
+	ldr	r0, [sp, #8]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #12]
+	lsls	r2, r3, #2
 	bl	ftl_memset
-	b	.L1796
-.L1797:
-	ldr	r1, .L1824+28
-	ldr	r3, [sp, #4]
-	ldr	r0, [r8]
-	ldrh	r1, [r1]
-	add	r7, r7, r0
-	ldr	r0, [r7, #8]
-	muls	r1, r6, r1
-	subs	r1, r1, r3
+	ldr	r3, .L1577+4
+	str	r7, [r4, #32]
+	str	r7, [r4, #28]
+	ldr	r2, [r3]
+	str	r3, [sp, #20]
+	str	r2, [r6, #8]
+	ldr	r2, .L1577+8
+	ldr	fp, [r2]
+	movw	r2, #65535
+	str	fp, [r6, #12]
+	strh	r2, [r4]	@ movhi
+	strh	r2, [r4, #2]	@ movhi
+	movs	r2, #1
+	str	r2, [r4, #36]
+.L1543:
 	ldr	r3, [sp, #16]
-	add	r1, r3, r1, lsl #9
-	b	.L1820
-.L1818:
-	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [r8]
-	muls	r2, r6, r2
-	add	r7, r7, r1
-	subs	r2, r2, r3
+	sxth	r5, r7
+	cmp	r5, r3
+	bge	.L1562
 	ldr	r3, [sp, #16]
-	add	r2, r3, r2, lsl #9
-	str	r2, [r7, #8]
-	b	.L1789
-.L1804:
-	ldr	r6, .L1824+32
-	mov	r4, #256
-	ldr	r7, .L1824+36
-.L1807:
-	ldrh	r3, [r6]
-	movw	r2, #65535
+	subs	r3, r3, #1
+	cmp	r5, r3
+	bne	.L1544
+	movs	r1, #1
+	ldrh	r0, [r8, r5, lsl #1]
+	bl	FtlGetLastWrittenPage
+	sxth	r3, r0
+	ldr	r6, .L1577
+	add	r10, r8, r5, lsl #1
+	strh	r7, [r4]	@ movhi
+	str	r3, [sp, #16]
+	movs	r7, #0
+	ldr	r3, [sp, #24]
+	adds	r0, r0, #1
+	strh	r0, [r4, #2]	@ movhi
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r4, #28]
+.L1545:
+	ldr	r3, [sp, #16]
+	sxth	r8, r7
+	cmp	r8, r3
+	ble	.L1548
+.L1562:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L1577+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1550
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1550:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1548:
+	ldrh	r2, [r10]
+	ldr	r0, .L1577
+	orr	r2, r8, r2, lsl #10
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #20]
+	cbz	r2, .L1546
+	ldr	r3, .L1577+16
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r3]
+	bl	js_hash
+	ldr	r2, [sp, #20]
+	cmp	r2, r0
+	beq	.L1546
+	str	r0, [sp, #4]
+	mov	r3, r8
+	str	r2, [sp]
+	mov	r2, r5
+	ldr	r1, .L1577+20
+	ldr	r0, .L1577+24
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r6]
+.L1546:
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L1547
+	ldrh	r3, [fp, #8]
+	ldr	r2, [sp, #12]
+	cmp	r2, r3
+	bls	.L1547
+	ldrh	r1, [fp]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	ittt	eq
+	ldreq	r2, [r6, #4]
+	ldreq	r1, [sp, #8]
+	streq	r2, [r1, r3, lsl #2]
+.L1547:
+	adds	r7, r7, #1
+	b	.L1545
+.L1544:
+	ldr	r3, [sp, #20]
+	ldr	r10, .L1577+12
+	ldrh	r2, [r8, r5, lsl #1]
+	ldr	r3, [r3]
+	ldr	r0, .L1577
+	str	r3, [r6, #8]
+	add	r3, r8, r5, lsl #1
+	str	r3, [sp, #28]
+	ldrh	r3, [r10]
+	subs	r3, r3, #1
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r6, #4]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L1564
+	ldrh	r2, [fp]
+	ldrh	r3, [r4, #4]
+	cmp	r2, r3
+	bne	.L1564
+	ldrh	r2, [fp, #8]
+	movw	r3, #64245
+	cmp	r2, r3
+	beq	.L1552
+.L1564:
+	mov	r10, #0
+.L1553:
+	ldr	r2, .L1577+12
+	sxth	r3, r10
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bne	.L1805
-	ldrh	r2, [r7]
+	bge	.L1560
+	ldr	r2, [sp, #28]
+	ldr	r0, .L1577
+	str	r3, [sp, #36]
+	ldrh	r2, [r2]
+	orr	r2, r3, r2, lsl #10
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r6, #12]
+	ldr	r2, [r2, #12]
+	str	r2, [sp, #32]
+	cbz	r2, .L1557
+	ldr	r1, .L1577+16
+	ldr	r0, [r6, #8]
+	ldrh	r1, [r1]
+	bl	js_hash
+	ldr	r2, [sp, #32]
+	cmp	r2, r0
+	beq	.L1557
+	str	r0, [sp, #4]
+	str	r2, [sp]
+	mov	r2, r5
+	ldr	r3, [sp, #36]
+	ldr	r1, .L1577+20
+	ldr	r0, .L1577+28
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r6]
+.L1557:
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L1558
+	ldrh	r3, [fp, #8]
+	ldr	r2, [sp, #12]
 	cmp	r2, r3
-	bne	.L1805
+	bls	.L1558
+	ldrh	r1, [fp]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	ittt	eq
+	ldreq	r2, [r6, #4]
+	ldreq	r1, [sp, #8]
+	streq	r2, [r1, r3, lsl #2]
+.L1558:
+	add	r10, r10, #1
+	b	.L1553
+.L1552:
+	ldr	r3, [sp, #20]
+	movs	r1, #0
+	ldrh	r2, [r10]
+	ldr	r0, [r3]
+	add	lr, r2, #-1
+.L1554:
+	sxth	r3, r1
+	cmp	r3, lr
+	blt	.L1556
+.L1560:
+	adds	r7, r7, #1
+	b	.L1543
+.L1556:
+	lsls	r5, r3, #3
+	ldr	r3, [r0, r3, lsl #3]
+	ldr	r2, [sp, #12]
+	uxth	ip, r3
+	cmp	r2, ip
+	bls	.L1555
+	add	r5, r5, r0
+	ldr	r2, [sp, #8]
+	ldr	r5, [r5, #4]
+	str	r5, [r2, ip, lsl #2]
+.L1555:
+	adds	r1, r1, #1
+	b	.L1554
+.L1578:
+	.align	2
+.L1577:
+	.word	.LANCHOR138
+	.word	.LANCHOR106
+	.word	.LANCHOR114
+	.word	.LANCHOR20
+	.word	.LANCHOR23
+	.word	.LANCHOR180
+	.word	.LC39
+	.word	.LC40
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1580
+	ldr	r0, .L1580+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L1580+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L1580+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L1580+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	ldr	r3, .L1580+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L1580+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L1580+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	bl	List_get_gc_head_node
-	uxth	r0, r0
-	bl	FtlGcRefreshBlock
-.L1805:
-	ldr	r2, .L1824+40
-	movs	r3, #128
-	movs	r1, #1
-	mov	r0, r1
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1824+44
-	strh	r3, [r2]	@ movhi
-	bl	rk_ftl_garbage_collect
-	movs	r1, #1
+	pop	{r3, pc}
+.L1581:
+	.align	2
+.L1580:
+	.word	.LANCHOR27
+	.word	.LANCHOR161
+	.word	.LANCHOR35
+	.word	.LANCHOR28
+	.word	.LANCHOR36
+	.word	.LANCHOR122
+	.word	.LANCHOR121
+	.word	.LANCHOR123
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L1583
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	ldrh	r3, [r5]
-	cmp	r3, #2
-	bhi	.L1806
-	subs	r4, r4, #1
-	bne	.L1807
-	b	.L1806
-.L1808:
-	mov	r0, #-1
-	b	.L1770
-.L1825:
+	pop	{r3, pc}
+.L1584:
 	.align	2
-.L1824:
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR81
-	.word	.LC113
-	.word	.LANCHOR183
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LANCHOR12
-	.word	.LANCHOR80
-	.word	.LANCHOR99
-	.word	.LANCHOR83
-	.word	.LANCHOR82
-	.size	FtlWrite, .-FtlWrite
-	.section	.text.FtlMakeBbt,"ax",%progbits
+.L1583:
+	.word	.LANCHOR129
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
-	.global	FtlMakeBbt
+	.global	FtlSysBlkInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r7, .L1845
-	bl	FtlBbtMemInit
-	sub	r8, r7, #18
-	bl	FtlLoadFactoryBbt
-.L1827:
-	ldr	r3, .L1845+4
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1833
-	ldr	r5, .L1845+8
-	movs	r4, #0
-.L1834:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L1835
-	ldr	r4, .L1845+12
-	movw	r6, #65535
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1836:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1840
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1837
-	mov	r0, r5
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L1838
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.L1837:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1836
-.L1833:
-	ldr	r3, .L1845+16
-	ldr	r5, .L1845+20
-	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1845+24
-	ldr	r0, [r3]
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r4, .L1598
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L1598+4
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L1598+8
+	ldrh	r2, [r3]
 	movw	r3, #65535
-	ldr	r10, [r5]
 	cmp	r2, r3
-	mov	fp, r4
-	ldr	r3, .L1845+28
-	str	r0, [r4, #8]
-	str	r10, [r4, #12]
-	beq	.L1828
-	ldrh	r5, [r3]
+	bne	.L1586
+.L1588:
+	mov	r6, #-1
+.L1585:
+	mov	r0, r6
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1586:
+	bl	FtlLoadSysInfo
+	mov	r6, r0
+	cmp	r0, #0
+	bne	.L1588
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L1598+12
+	movs	r0, #12
+	ldrh	r1, [r3]
+	ldr	r3, .L1598+16
+	ldr	r2, [r3]
+	mov	r3, r6
+.L1589:
+	cmp	r3, r1
+	bge	.L1594
+	mla	r5, r0, r3, r2
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	bge	.L1590
+.L1594:
+	ldr	r0, .L1598+20
+	cmp	r3, r1
+	ldr	r2, [r0]
+	add	r2, r2, #32
+	str	r2, [r0]
+	bge	.L1596
+.L1591:
+	ldr	r5, .L1598+24
+	ldr	r4, .L1598+28
+	mov	r0, r5
+	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
-	str	r3, [sp]
-	mla	r5, r6, r5, r2
-	lsls	r2, r5, #10
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r7]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.L1829:
-	uxth	r0, r5
-	adds	r6, r6, #1
-	adds	r7, r7, #4
-	bl	FtlBbmMapBadBlock
-	b	.L1827
-.L1828:
-	mov	r1, r6
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-	ldr	r0, [r4, #8]
-	ldr	r1, [r7]
-	bl	FtlBbt2Bitmap
-	ldr	r3, [sp]
-	str	r5, [sp, #4]
-	ldrh	r4, [r3]
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1830:
-	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r6, r4
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1831
-	ldr	r3, [sp, #4]
-	movs	r2, #16
-	movs	r1, #0
-	strh	r4, [r8]	@ movhi
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L1845+16
-	mov	r2, #4096
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [sp]
-	movw	r3, #61664
-	strh	r3, [r10]	@ movhi
+	bl	FtlSuperblockPowerLostFix
+	ldr	r3, .L1598+32
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	ldr	r0, .L1598+36
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	r7, [r4, #4]
+	ldrh	r3, [r0]
+	strh	r3, [r5, #2]	@ movhi
 	movs	r3, #0
-	str	r3, [r10, #4]
-	ldrh	r5, [r2]
-	ldrh	r3, [r8]
-	ldr	r1, [r7]
-	ldr	r0, [fp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	mla	r5, r6, r5, r3
-	lsls	r3, r5, #10
-	str	r3, [fp, #4]
-	ldr	r3, .L1845+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	movs	r2, #1
-	ldr	r0, .L1845+24
-	mov	r1, r2
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1845+24
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, [fp]
+	strb	r3, [r5, #6]
+	strh	r3, [r5, #4]	@ movhi
+	ldrh	r5, [r4]
+	ldrh	r1, [r2, r5, lsl #1]
+	subs	r1, r1, r7
+	strh	r1, [r2, r5, lsl #1]	@ movhi
+	ldrh	r2, [r0]
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	strh	r2, [r4, #2]	@ movhi
+	ldr	r2, .L1598+40
+	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
-	bne	.L1829
-	uxth	r0, r5
-	bl	FtlBbmMapBadBlock
-	b	.L1830
-.L1831:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1830
-.L1835:
-	bl	FtlBbmMapBadBlock
-	b	.L1834
-.L1838:
-	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L1839
-	strh	r5, [r4]	@ movhi
-	b	.L1837
-.L1839:
-	strh	r5, [r4, #4]	@ movhi
-.L1840:
-	ldr	r3, .L1845+36
-	movs	r5, #0
-	str	r5, [r4, #8]
-	movs	r1, #1
-	movs	r2, #2
-	strh	r5, [r4, #2]	@ movhi
-	ldr	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #24]
-	bl	FlashEraseBlocks
-	ldrh	r0, [r4]
-	bl	FtlBbmMapBadBlock
-	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #8]
-	ldrh	r2, [r4, #4]
-	strh	r5, [r4, #2]	@ movhi
+	strh	r3, [r2, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1597:
+	bl	FtlVpcTblFlush
+	b	.L1585
+.L1590:
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
+	b	.L1589
+.L1596:
 	ldrh	r3, [r4]
-	strh	r2, [r4]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	bl	FtlBbmTblFlush
-	mov	r0, r5
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1846:
+	cmp	r3, #0
+	bne	.L1591
+	bl	l2p_flush
+	b	.L1597
+.L1599:
 	.align	2
-.L1845:
-	.word	.LANCHOR37+28
-	.word	.LANCHOR10
-	.word	.LANCHOR25
-	.word	.LANCHOR37
-	.word	.LANCHOR115
-	.word	.LANCHOR123
-	.word	.LANCHOR148
-	.word	.LANCHOR17
-	.word	.LANCHOR137
-	.word	.LANCHOR106
-	.size	FtlMakeBbt, .-FtlMakeBbt
+.L1598:
+	.word	.LANCHOR156
+	.word	.LANCHOR4
+	.word	.LANCHOR139
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR83
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR39
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
 	.global	ftl_low_format
@@ -13981,62 +12266,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1871
-	ldr	r2, .L1871+4
-	ldr	r5, .L1871+8
+	ldr	r6, .L1624
+	ldr	r2, .L1624+4
+	ldr	r5, .L1624+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1848
+	cbz	r0, .L1601
 	bl	FtlMakeBbt
-.L1848:
-	ldr	r3, .L1871+12
-	ldr	r2, .L1871+16
-	ldr	ip, .L1871+100
+.L1601:
+	ldr	r3, .L1624+12
+	ldr	r2, .L1624+16
+	ldr	ip, .L1624+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1871+20
+	ldr	r2, .L1624+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1849:
+.L1602:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1850
-	ldr	r3, .L1871+24
+	blt	.L1603
+	ldr	r3, .L1624+24
 	movs	r7, #0
-	ldr	r10, .L1871+104
+	ldr	r10, .L1624+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1851:
+.L1604:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1852
-	ldr	r4, .L1871+28
+	bhi	.L1605
+	ldr	r4, .L1624+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1853
-.L1857:
+	bgt	.L1606
+.L1610:
 	movs	r6, #0
 	mov	r7, r6
-.L1854:
+.L1607:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1858
+	bhi	.L1611
 	ldrh	r2, [fp]
-	ldr	r3, .L1871+32
+	ldr	r3, .L1624+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1871+36
+	ldr	r6, .L1624+36
 	str	r2, [r3]
-	ldr	r3, .L1871+40
+	ldr	r3, .L1624+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14046,13 +12331,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1871+44
+	ldr	r0, .L1624+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1859
+	ble	.L1612
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14064,11 +12349,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1859:
-	ldr	r2, .L1871+48
+.L1612:
+	ldr	r2, .L1624+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1861
-	ldr	r1, .L1871+44
+	cbz	r2, .L1614
+	ldr	r1, .L1624+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14079,24 +12364,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1861:
+.L1614:
 	ldr	r3, [sp]
-	ldr	r7, .L1871+52
-	ldr	r10, .L1871+108
+	ldr	r7, .L1624+52
+	ldr	r10, .L1624+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1871+56
+	ldr	r3, .L1624+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1871+60
+	ldr	r6, .L1624+60
 	muls	r4, r3, r4
-	ldr	r3, .L1871+64
+	ldr	r3, .L1624+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14105,13 +12390,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1871+68
+	ldr	r2, .L1624+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1871+72
+	ldr	r2, .L1624+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14122,30 +12407,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1871+76
+	ldr	r3, .L1624+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1863:
+.L1616:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1864
+	bne	.L1617
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1863
-.L1850:
+	b	.L1616
+.L1603:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1849
-.L1852:
+	b	.L1602
+.L1605:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14153,11 +12438,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1851
-.L1853:
+	b	.L1604
+.L1606:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1871+80
+	ldr	r3, .L1624+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14165,26 +12450,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1855:
+.L1608:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1857
+	bls	.L1610
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1855
-.L1858:
+	b	.L1608
+.L1611:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1854
-.L1864:
+	b	.L1607
+.L1617:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1871+84
+	ldr	r4, .L1624+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14200,19 +12485,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1865:
+.L1618:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1866
+	cbnz	r3, .L1619
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1865
-.L1866:
+	b	.L1618
+.L1619:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14221,10 +12506,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1871+88
+	ldr	r3, .L1624+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1871+92
+	ldr	r3, .L1624+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14237,61 +12522,115 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1867
-	ldr	r3, .L1871+96
+	cbnz	r0, .L1620
+	ldr	r3, .L1624+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1867:
+.L1620:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1872:
+.L1625:
 	.align	2
-.L1871:
+.L1624:
 	.word	.LANCHOR4
-	.word	.LANCHOR71
-	.word	.LANCHOR70
+	.word	.LANCHOR83
+	.word	.LANCHOR82
 	.word	.LANCHOR12
-	.word	.LANCHOR118
-	.word	.LANCHOR119
+	.word	.LANCHOR109
+	.word	.LANCHOR110
 	.word	.LANCHOR5
 	.word	.LANCHOR3
-	.word	.LANCHOR111
-	.word	.LANCHOR61
+	.word	.LANCHOR99
+	.word	.LANCHOR152
 	.word	.LANCHOR7
-	.word	.LANCHOR78
+	.word	.LANCHOR171
 	.word	.LANCHOR15
-	.word	.LANCHOR152
+	.word	.LANCHOR179
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
 	.word	.LANCHOR59
-	.word	.LANCHOR80
+	.word	.LANCHOR144
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR79
-	.word	.LANCHOR86
+	.word	.LANCHOR139
+	.word	.LANCHOR166
 	.word	168778952
 	.word	.LANCHOR6
 	.word	.LANCHOR42
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_memcmp,"ax",%progbits
+	.section	.text.sftl_init,"ax",%progbits
 	.align	1
-	.global	ftl_memcmp
+	.global	sftl_init
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
+	.type	sftl_init, %function
+sftl_init:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
+	push	{r4, r5, r6, lr}
+	mov	r3, #-1
+	ldr	r4, .L1643
+	movs	r6, #0
+	ldr	r1, .L1643+4
+	ldr	r0, .L1643+8
+	str	r3, [r4]
+	bl	printf
+	ldr	r0, .L1643+12
+	bl	FtlConstantsInit
+	ldr	r5, .L1643+16
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1643+20
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+.L1627:
+	bl	FtlLoadBbt
+	cbz	r0, .L1628
+.L1642:
+	ldr	r3, [r5]
+	cmp	r3, #1
+	bne	.L1627
+	str	r6, [r5]
+	bl	ftl_low_format
+	b	.L1627
+.L1628:
+	bl	FtlSysBlkInit
+	cmp	r0, #0
+	bne	.L1642
+	movs	r3, #1
+	str	r3, [r4]
+	ldr	r3, .L1643+24
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L1640
+	movw	r4, #8129
+.L1634:
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L1634
+.L1640:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L1644:
+	.align	2
+.L1643:
+	.word	.LANCHOR166
+	.word	.LC41
+	.word	.LC34
+	.word	.LANCHOR0
+	.word	.LANCHOR181
+	.word	.LANCHOR4
+	.word	.LANCHOR48
+	.size	sftl_init, .-sftl_init
 	.section	.text.FtlWriteToIDB,"ax",%progbits
 	.align	1
 	.global	FtlWriteToIDB
@@ -14311,33 +12650,33 @@ FtlWriteToIDB:
 	mov	r4, r0
 	mov	r6, r1
 	mov	r7, r2
-	ldr	r5, .L1946
-	bls	.L1875
+	ldr	r5, .L1715
+	bls	.L1646
 	cmp	r0, #576
-	bcc	.L1876
-.L1875:
+	bcc	.L1647
+.L1646:
 	ldr	r3, [r5]
-	cbnz	r3, .L1877
-.L1945:
+	cbnz	r3, .L1648
+.L1714:
 	movs	r4, #0
-	b	.L1874
-.L1877:
-	ldr	r3, .L1946+4
+	b	.L1645
+.L1648:
+	ldr	r3, .L1715+4
 	ldr	r3, [r3]
 	ldr	r2, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1946+8
+	ldr	r3, .L1715+8
 	cmp	r2, r3
-	bne	.L1879
-	ldr	r3, .L1946+12
+	bne	.L1650
+	ldr	r3, .L1715+12
 	movs	r2, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [sp, #12]
 	add	r0, r3, #262144
 	movw	r3, #65535
-.L1883:
+.L1654:
 	ldr	r4, [r0, #-4]
-	cbnz	r4, .L1880
+	cbnz	r4, .L1651
 	ldr	r4, [sp, #12]
 	subs	r3, r3, #1
 	ldr	r4, [r4, r2, lsl #2]
@@ -14347,18 +12686,18 @@ FtlWriteToIDB:
 	movhi	r2, #0
 	cmp	r3, #4096
 	str	r4, [r0, #-4]!
-	bne	.L1883
+	bne	.L1654
 	mov	r3, #512
-	b	.L1942
-.L1880:
+	b	.L1711
+.L1651:
 	adds	r3, r3, #127
 	lsrs	r3, r3, #7
-.L1942:
+.L1711:
 	str	r3, [sp, #16]
 	lsls	r1, r1, #2
 	ldr	r3, [sp, #16]
 	uxth	r1, r1
-	ldr	r4, .L1946+16
+	ldr	r4, .L1715+16
 	adds	r0, r3, #4
 	bl	__aeabi_uidiv
 	adds	r3, r0, #1
@@ -14369,76 +12708,68 @@ FtlWriteToIDB:
 	movs	r3, #0
 	mov	r10, r3
 	str	r3, [sp, #20]
-.L1906:
-	ldr	r3, .L1946+20
+.L1676:
+	ldr	r3, .L1715+20
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	ldrh	r6, [r3, #10]
 	ldr	r3, [r4, #16]
 	mul	fp, r10, r6
 	cmp	r3, #0
-	beq	.L1914
+	beq	.L1684
 	ldr	r3, [r4, #20]
 	cmp	r3, #0
 	ite	eq
 	moveq	r3, #6
 	movne	r3, #9
-.L1943:
+.L1712:
 	str	r3, [sp, #28]
 	mov	r1, fp
-	ldr	r3, .L1946+16
+	ldr	r3, .L1715+16
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
 	ldr	r3, [sp, #24]
 	cmp	r3, #1
-	beq	.L1885
-	ldr	r3, .L1946+16
+	beq	.L1656
+	ldr	r3, .L1715+16
 	add	r1, r6, fp
 	movs	r0, #0
 	ldr	r3, [r3, #4]
 	blx	r3
-.L1885:
+.L1656:
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1916
-	ldr	r3, .L1946+20
+	bne	.L1686
+	ldr	r3, .L1715+20
 	mov	r2, #1024
 	movs	r1, #0
 	ldr	r5, [r3]
 	mov	r0, r5
 	bl	ftl_memset
-	ldr	r2, .L1946+24
-	movs	r3, #12
-	add	r1, r5, #11
-	add	r0, r5, #23
-	stm	r5, {r2, r3}
 	movs	r2, #4
+	ldr	r3, .L1715+24
 	strb	r2, [r5, #17]
+	movs	r1, #12
+	ldr	r2, .L1715+12
+	adds	r0, r5, r1
+	str	r3, [r5]
 	movs	r3, #0
-	ldr	r2, .L1946+12
+	str	r1, [r5, #4]
+	ldrh	r2, [r2, #10]
 	str	r3, [r5, #12]
 	strb	r3, [r5, #16]
-	ldrh	r2, [r2, #10]
-	strb	r3, [r5, #20]
-	strh	r3, [r5, #22]	@ movhi
-	ldr	r3, .L1946+28
 	strh	r2, [r5, #18]	@ movhi
 	movs	r2, #16
+	strb	r3, [r5, #20]
 	strb	r2, [r5, #21]
-.L1887:
-	lsrs	r2, r3, #2
-	ldrb	ip, [r1, #1]!	@ zero_extendqisi2
-	add	r2, r2, r3, lsl #5
-	cmp	r0, r1
-	add	r2, r2, ip
-	eor	r3, r3, r2
-	bne	.L1887
-	str	r3, [r5, #8]
-.L1886:
+	strh	r3, [r5, #22]	@ movhi
+	bl	js_hash
+	str	r0, [r5, #8]
+.L1657:
 	ldr	r3, [sp, #24]
 	mov	r8, fp
 	muls	r3, r6, r3
@@ -14446,10 +12777,10 @@ FtlWriteToIDB:
 	str	r3, [sp, #40]
 	ldr	r3, [sp, #12]
 	str	r3, [sp, #32]
-.L1888:
+.L1658:
 	ldr	r3, [sp, #40]
 	cmp	r6, r3
-	beq	.L1895
+	beq	.L1665
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
 	itet	ne
@@ -14460,10 +12791,10 @@ FtlWriteToIDB:
 	movw	r3, #61424
 	str	r3, [sp, #52]
 	cmp	r6, #0
-	bne	.L1891
+	bne	.L1661
 	ldr	r3, [sp, #28]
 	cmp	r3, #9
-	bne	.L1891
+	bne	.L1661
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -14473,40 +12804,40 @@ FtlWriteToIDB:
 	mov	r0, r6
 	ldr	r7, [r4, #8]
 	blx	r7
-	ldr	r2, .L1946+12
+	ldr	r2, .L1715+12
 	str	r0, [sp, #44]
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1892
-.L1895:
-	ldr	r3, .L1946+20
+	bne	.L1662
+.L1665:
+	ldr	r3, .L1715+20
 	ldr	r2, [r4, #16]
 	ldr	r6, [r3]
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	ldrb	r3, [r3, #14]	@ zero_extendqisi2
 	str	r3, [sp, #28]
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	ldrh	r3, [r3, #10]
 	mul	r8, r10, r3
 	cmp	r2, #0
-	bne	.L1893
+	bne	.L1663
 	mov	fp, #6
-.L1894:
+.L1664:
 	ldr	r2, [sp, #24]
 	movs	r5, #0
 	muls	r3, r2, r3
 	str	r3, [sp, #32]
-.L1897:
+.L1667:
 	ldr	r3, [sp, #32]
 	cmp	r5, r3
-	beq	.L1901
+	beq	.L1671
 	cmp	r5, #0
-	bne	.L1898
+	bne	.L1668
 	cmp	fp, #9
-	bne	.L1898
+	bne	.L1668
 	ldr	r3, [r4, #16]
 	movs	r0, #70
 	blx	r3
@@ -14522,77 +12853,77 @@ FtlWriteToIDB:
 	ldr	r3, [r4, #20]
 	ldr	r0, [sp, #28]
 	blx	r3
-	ldr	r2, .L1946+12
+	ldr	r2, .L1715+12
 	ldr	r3, [r4, #16]
 	ldrb	r0, [r2, #22]	@ zero_extendqisi2
 	blx	r3
 	ldr	r3, [r6]
-	ldr	r2, .L1946+24
+	ldr	r2, .L1715+24
 	cmp	r3, r2
-	beq	.L1899
-.L1901:
-	ldr	r3, .L1946+20
+	beq	.L1669
+.L1671:
+	ldr	r3, .L1715+20
 	movs	r5, #0
 	ldr	r1, [sp, #12]
 	ldr	r0, [r3]
-.L1900:
+.L1670:
 	mov	r8, r1
 	ldr	r2, [r0, r5, lsl #2]
 	ldr	r3, [r8]
 	lsls	r6, r5, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1903
+	beq	.L1673
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1946+20
+	ldr	r3, .L1715+20
 	mov	r1, r10
-	ldr	r0, .L1946+32
+	ldr	r0, .L1715+28
 	ldr	r2, [r3]
 	str	r5, [sp]
 	ldr	r3, [r8]
 	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r3, .L1946+12
+	ldr	r3, .L1715+12
 	movs	r0, #0
 	ldrh	r1, [r3, #10]
 	ldr	r3, [r4, #4]
 	mul	r1, r10, r1
 	blx	r3
-.L1904:
+.L1674:
 	ldr	r3, [sp, #24]
 	add	r10, r10, r3
 	cmp	r10, #15
-	bls	.L1906
+	bls	.L1676
 	ldr	r3, [sp, #20]
-	cbnz	r3, .L1907
-.L1879:
+	cbnz	r3, .L1677
+.L1650:
 	mov	r3, #-1
 	str	r3, [sp, #16]
-.L1907:
-	ldr	r3, .L1946
+.L1677:
+	ldr	r3, .L1715
 	movs	r2, #0
 	ldr	r4, [sp, #16]
 	str	r2, [r3]
-	ldr	r3, .L1946+4
+	ldr	r3, .L1715+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1946+20
+	ldr	r3, .L1715+20
 	ldr	r0, [r3]
 	bl	free
-.L1874:
+.L1645:
 	mov	r0, r4
 	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1914:
+.L1684:
 	movs	r3, #6
-	b	.L1943
-.L1916:
+	b	.L1712
+.L1686:
 	movs	r5, #0
-	b	.L1886
-.L1891:
+	b	.L1657
+.L1661:
 	add	r3, sp, #48
 	ldr	r2, [sp, #32]
 	mov	r1, r8
@@ -14600,34 +12931,22 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #8]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1895
+	beq	.L1665
 	ldr	r3, [sp, #32]
 	add	r3, r3, #2048
 	str	r3, [sp, #32]
-.L1892:
+.L1662:
 	adds	r6, r6, #1
 	add	r8, r8, #1
-	b	.L1888
-.L1893:
+	b	.L1658
+.L1663:
 	ldr	r2, [r4, #20]
 	cmp	r2, #0
 	ite	eq
 	moveq	fp, #6
 	movne	fp, #9
-	b	.L1894
-.L1947:
-	.align	2
-.L1946:
-	.word	.LANCHOR184
-	.word	.LANCHOR185
-	.word	-52655045
-	.word	.LANCHOR0
-	.word	.LANCHOR105
-	.word	.LANCHOR186
-	.word	1179535694
-	.word	1204201446
-	.word	.LC114
-.L1898:
+	b	.L1664
+.L1668:
 	add	r3, sp, #48
 	mov	r2, r6
 	add	r1, r8, r5
@@ -14635,54 +12954,65 @@ FtlWriteToIDB:
 	ldr	r7, [r4, #12]
 	blx	r7
 	adds	r0, r0, #1
-	beq	.L1901
+	beq	.L1671
 	ldr	r2, [sp, #52]
 	movw	r3, #61424
 	cmp	r2, r3
-	bne	.L1901
+	bne	.L1671
 	add	r6, r6, #2048
-.L1899:
+.L1669:
 	adds	r5, r5, #1
-	b	.L1897
-.L1903:
+	b	.L1667
+.L1716:
+	.align	2
+.L1715:
+	.word	.LANCHOR182
+	.word	.LANCHOR183
+	.word	-52655045
+	.word	.LANCHOR0
+	.word	.LANCHOR78
+	.word	.LANCHOR184
+	.word	1179535694
+	.word	.LC42
+.L1673:
 	ldr	r3, [sp, #36]
 	adds	r5, r5, #1
 	cmp	r5, r3
-	bne	.L1900
+	bne	.L1670
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #20]
-	bls	.L1904
-	b	.L1907
-.L1876:
+	bls	.L1674
+	b	.L1677
+.L1647:
 	cmp	r0, #64
-	bne	.L1908
-	ldr	fp, .L1948+4
+	bne	.L1678
+	ldr	fp, .L1717+4
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [fp]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1948
+	ldr	r3, .L1717
 	str	r0, [r3]
 	ldr	r3, [fp]
-	cbz	r3, .L1909
-	cbz	r0, .L1909
+	cbz	r3, .L1679
+	cbz	r0, .L1679
 	movs	r2, #1
 	movs	r1, #0
 	str	r2, [r5]
 	mov	r0, r3
 	mov	r2, #262144
 	bl	ftl_memset
-.L1908:
+.L1678:
 	ldr	r3, [r5]
 	cmp	r3, #0
-	beq	.L1945
-	ldr	r3, .L1948+4
+	beq	.L1714
+	ldr	r3, .L1717+4
 	cmp	r4, #63
 	iteee	hi
-	ldrhi	r5, .L1948+8
+	ldrhi	r5, .L1717+8
 	rsbls	r4, r4, #64
 	subls	r6, r6, r4
 	addls	r7, r7, r4, lsl #9
@@ -14690,7 +13020,7 @@ FtlWriteToIDB:
 	mov	r2, #262144
 	it	hi
 	addhi	r5, r5, r4
-	ldr	r0, .L1948+12
+	ldr	r0, .L1717+12
 	ite	ls
 	movls	r5, r1
 	addhi	r5, r1, r5, lsl #9
@@ -14705,21 +13035,21 @@ FtlWriteToIDB:
 	mov	r1, r7
 	mov	r0, r5
 	bl	ftl_memcpy
-	b	.L1945
-.L1909:
-	ldr	r1, .L1948+16
-	ldr	r0, .L1948+20
+	b	.L1714
+.L1679:
+	ldr	r1, .L1717+16
+	ldr	r0, .L1717+20
 	bl	printf
-	b	.L1908
-.L1949:
+	b	.L1678
+.L1718:
 	.align	2
-.L1948:
-	.word	.LANCHOR186
-	.word	.LANCHOR185
+.L1717:
+	.word	.LANCHOR184
+	.word	.LANCHOR183
 	.word	8388544
-	.word	.LC116
-	.word	.LANCHOR187
-	.word	.LC115
+	.word	.LC44
+	.word	.LANCHOR185
+	.word	.LC43
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
@@ -14751,6 +13081,7 @@ sftl_write:
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	power_up_flag
+	.global	low_format_en
 	.global	gFtlInitStatus
 	.global	DeviceCapacity
 	.global	g_power_lost_recovery_flag
@@ -14909,7 +13240,7 @@ FtlUpdateVaildLpnCount:
 	.space	2
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
@@ -14958,7 +13289,7 @@ c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -15126,7 +13457,7 @@ c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -15146,7 +13477,7 @@ check_vpc_table:
 	.space	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -15160,11 +13491,11 @@ gBbtInfo:
 	.space	60
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 40
+	.size	gL2pMapInfo, 44
 gL2pMapInfo:
-	.space	40
+	.space	44
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
 	.set	.LANCHOR38,. + 0
@@ -15174,28 +13505,28 @@ gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.space	12
+	.space	16
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 40
+	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
-	.space	40
+	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -15209,14 +13540,14 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -15244,147 +13575,147 @@ g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.space	4
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -15398,14 +13729,14 @@ g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -15419,21 +13750,21 @@ g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nand_ops,"aw",%nobits
 	.align	2
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 24
 g_nand_ops:
@@ -15461,35 +13792,35 @@ g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
@@ -15503,91 +13834,91 @@ g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -15601,49 +13932,49 @@ g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
 	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
@@ -15656,17 +13987,24 @@ gp_last_act_superblock:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 4
 idb_buf:
 	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
+	.space	4
+	.section	.bss.low_format_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR181,. + 0
+	.type	low_format_en, %object
+	.size	low_format_en, 4
+low_format_en:
 	.space	4
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
@@ -15712,56 +14050,56 @@ p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
 	.space	4
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
@@ -15775,28 +14113,28 @@ p_l2p_ram_map:
 	.space	4
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
 	.space	4
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
 	.space	4
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
@@ -15809,35 +14147,34 @@ p_plane_order_table:
 	.space	32
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
 	.space	4
 	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR128,. + 0
 	.type	p_valid_page_count_check_table, %object
 	.size	p_valid_page_count_check_table, 4
 p_valid_page_count_check_table:
@@ -15858,598 +14195,443 @@ p_vendor_block_table:
 	.space	4
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 4
 p_vendor_block_valid_page_count:
 	.space	4
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 4
 p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 4
 p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
 	.space	20
 	.section	.bss.sftl_nand_check_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	sftl_nand_check_buf, %object
 	.size	sftl_nand_check_buf, 4
 sftl_nand_check_buf:
 	.space	4
 	.section	.bss.sftl_nand_check_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	sftl_nand_check_spare_buf, %object
 	.size	sftl_nand_check_spare_buf, 4
 sftl_nand_check_spare_buf:
 	.space	4
 	.section	.bss.sftl_temp_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	sftl_temp_buf, %object
 	.size	sftl_temp_buf, 4
 sftl_temp_buf:
 	.space	4
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",%progbits
 	.align	2
-	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
 	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",%progbits,1
-.LC79:
+.LC6:
 	.ascii	"%s: addr: %x is in id block!!!!!!!!!!\012\000"
-.LC80:
+.LC7:
 	.ascii	"not free: w: d:\000"
-.LC81:
+.LC8:
 	.ascii	"not free: w: s:\000"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
-.LC85:
+.LC11:
 	.ascii	"prog read error: = %x\012\000"
-.LC86:
+.LC12:
 	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC87:
+.LC13:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC101:
+.LC14:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC102:
+.LC15:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC103:
+.LC16:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
-.LC82:
+.LC9:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
-	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
-.LC104:
-	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
-	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
-.LC74:
-	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
-	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",%progbits,1
-.LC73:
-	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC100:
+.LC31:
 	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC108:
-	.ascii	"no ect\000"
-	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC88:
-	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC89:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
-.LC84:
-	.ascii	"%s error allocating memory. return -1\012\000"
-	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
-.LC2:
-	.ascii	"FLASH INFO:\012\000"
-.LC3:
-	.ascii	"Device Capacity: %d MB\012\000"
-.LC4:
-	.ascii	"FTL INFO:\012\000"
-.LC5:
-	.ascii	"g_MaxLpn = 0x%x\012\000"
-.LC6:
-	.ascii	"g_VaildLpn = 0x%x\012\000"
-.LC7:
-	.ascii	"read_page_count = 0x%x\012\000"
-.LC8:
-	.ascii	"discard_page_count = 0x%x\012\000"
-.LC9:
-	.ascii	"write_page_count = 0x%x\012\000"
-.LC10:
-	.ascii	"cache_write_count = 0x%x\012\000"
-.LC11:
-	.ascii	"l2p_write_count = 0x%x\012\000"
-.LC12:
-	.ascii	"gc_page_count = 0x%x\012\000"
-.LC13:
-	.ascii	"totle_write = %d MB\012\000"
-.LC14:
-	.ascii	"totle_read = %d MB\012\000"
-.LC15:
-	.ascii	"GSV = 0x%x\012\000"
-.LC16:
-	.ascii	"GDV = 0x%x\012\000"
-.LC17:
-	.ascii	"bad blk num = %d\012\000"
-.LC18:
-	.ascii	"free_superblocks = 0x%x\012\000"
-.LC19:
-	.ascii	"mlc_EC = 0x%x\012\000"
-.LC20:
-	.ascii	"slc_EC = 0x%x\012\000"
-.LC21:
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-	.section	.rodata.__func__.9983,"a",%progbits
-	.set	.LANCHOR176,. + 0
-	.type	__func__.9983, %object
-	.size	__func__.9983, 19
-__func__.9983:
+	.section	.rodata.__func__.9917,"a",%progbits
+	.set	.LANCHOR170,. + 0
+	.type	__func__.9917, %object
+	.size	__func__.9917, 19
+__func__.9917:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC105:
+.LC17:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
-.LC94:
+.LC25:
 	.ascii	"...%s enter...\012\000"
-.LC95:
+.LC26:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC96:
+.LC27:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC83:
+.LC10:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC97:
+.LC28:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC98:
+.LC29:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC99:
+.LC30:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC90:
+.LC20:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC91:
+.LC21:
 	.ascii	"spare:\000"
-.LC92:
+.LC22:
 	.ascii	"map_ppn:\000"
-.LC93:
+.LC23:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC112:
-	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC75:
+.LC2:
 	.ascii	"%s 0x%x:\000"
-.LC76:
+.LC3:
 	.ascii	"%x \000"
-.LC77:
+.LC4:
 	.ascii	"%02x \000"
-.LC78:
+.LC5:
 	.ascii	"\012\000"
-	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
-.LC70:
-	.ascii	"SFTL version: 5.0.49 20181030\000"
-.LC71:
-	.ascii	"%s\012\000"
+	.section	.rodata.sftl_init.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"SFTL version: 5.0.50 20181227\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 02cb67bcaf..d54b12f7b3 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-11-29
+ * date: 2018-12-27
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -378,40 +378,6 @@ FtlBbmIsBadBlock:
 FtlBbtInfoPrint:
 	ret
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbtCalcTotleCnt,"ax",@progbits
-	.align	2
-	.global	FtlBbtCalcTotleCnt
-	.type	FtlBbtCalcTotleCnt, %function
-FtlBbtCalcTotleCnt:
-	adrp	x0, .LANCHOR17
-	mov	w4, 0
-	mov	w5, 0
-	ldrh	w6, [x0, #:lo12:.LANCHOR17]
-	adrp	x0, .LANCHOR10
-	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	mul	w6, w6, w0
-	cmp	w4, w6
-	blt	.L43
-	mov	w0, w5
-	ret
-.L43:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-.L36:
-	mov	w0, w4
-	bl	FtlBbmIsBadBlock
-	cbz	w0, .L35
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L35:
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	cmp	w4, w6
-	blt	.L36
-	mov	w0, w5
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",@progbits
 	.align	2
 	.global	V2P_block
@@ -468,12 +434,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L48
+	bls	.L37
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L48:
+.L37:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -509,7 +475,7 @@ FtlFreeSysBLkSort:
 	adrp	x0, .LANCHOR38
 	add	x1, x0, :lo12:.LANCHOR38
 	ldrh	w2, [x1, 6]
-	cbz	w2, .L52
+	cbz	w2, .L41
 	adrp	x2, .LANCHOR39+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -517,16 +483,16 @@ FtlFreeSysBLkSort:
 	ldrh	w5, [x2, #:lo12:.LANCHOR39+28]
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-.L54:
+.L43:
 	cmp	w5, w4
-	bgt	.L55
-	cbz	w6, .L52
+	bgt	.L44
+	cbz	w6, .L41
 	add	x0, x0, :lo12:.LANCHOR38
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.L52:
+.L41:
 	ret
-.L55:
+.L44:
 	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
 	add	w3, w3, 1
@@ -538,7 +504,7 @@ FtlFreeSysBLkSort:
 	mov	w6, 1
 	add	w2, w2, w6
 	and	w2, w2, 1023
-	b	.L54
+	b	.L43
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",@progbits
 	.align	2
@@ -550,25 +516,25 @@ IsInFreeQueue:
 	and	w0, w0, 65535
 	ldrh	w4, [x1, 6]
 	cmp	w4, 1024
-	beq	.L65
+	beq	.L54
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
-.L63:
+.L52:
 	cmp	w3, w4
-	bcc	.L64
-.L65:
+	bcc	.L53
+.L54:
 	mov	w0, 0
 	ret
-.L64:
+.L53:
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
-	beq	.L66
+	beq	.L55
 	add	w3, w3, 1
-	b	.L63
-.L66:
+	b	.L52
+.L55:
 	mov	w0, 1
 	ret
 	.size	IsInFreeQueue, .-IsInFreeQueue
@@ -581,7 +547,7 @@ insert_data_list:
 	and	w0, w0, 65535
 	ldrh	w14, [x1, #:lo12:.LANCHOR5]
 	cmp	w14, w0
-	bls	.L83
+	bls	.L72
 	adrp	x1, .LANCHOR40
 	mov	w3, 6
 	ldr	x6, [x1, #:lo12:.LANCHOR40]
@@ -593,12 +559,12 @@ insert_data_list:
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
 	ldr	x12, [x1, #:lo12:.LANCHOR41]
-	cbnz	x12, .L70
+	cbnz	x12, .L59
 	str	x5, [x1, #:lo12:.LANCHOR41]
-.L83:
+.L72:
 	mov	w0, 0
 	ret
-.L70:
+.L59:
 	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR42
 	ubfiz	x2, x0, 1, 16
@@ -625,13 +591,13 @@ insert_data_list:
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L78:
+.L67:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L69
+	bcc	.L58
 	cmp	w1, w0
-	beq	.L69
+	beq	.L58
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -639,46 +605,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L74
+	bne	.L63
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L76
-.L75:
+	bcc	.L65
+.L64:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L79
+	bne	.L68
 	strh	w0, [x4, 2]
 	str	x5, [x15, #:lo12:.LANCHOR41]
-	b	.L69
-.L74:
-	bcc	.L75
-.L76:
+	b	.L58
+.L63:
+	bcc	.L64
+.L65:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L77
+	bne	.L66
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
 	adrp	x0, .LANCHOR44
 	str	x5, [x0, #:lo12:.LANCHOR44]
-.L69:
+.L58:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L77:
+.L66:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L78
-.L79:
+	b	.L67
+.L68:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L69
+	b	.L58
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -696,7 +662,7 @@ INSERT_DATA_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L85
+	bcs	.L74
 	ldp	x29, x30, [sp], 16
 	mov	w2, 214
 	adrp	x1, .LANCHOR46
@@ -704,7 +670,7 @@ INSERT_DATA_LIST:
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L85:
+.L74:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -716,7 +682,7 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L89
+	beq	.L78
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
@@ -728,12 +694,12 @@ insert_free_list:
 	adrp	x1, .LANCHOR47
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR47]
-	cbnz	x5, .L90
+	cbnz	x5, .L79
 	str	x4, [x1, #:lo12:.LANCHOR47]
-.L89:
+.L78:
 	mov	w0, 0
 	ret
-.L90:
+.L79:
 	adrp	x1, .LANCHOR43
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -745,37 +711,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L93:
+.L82:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L91
+	bcs	.L80
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L92
+	bne	.L81
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L89
-.L92:
+	b	.L78
+.L81:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L93
-.L91:
+	b	.L82
+.L80:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L94
+	bne	.L83
 	strh	w0, [x2, 2]
 	str	x4, [x12, #:lo12:.LANCHOR47]
-	b	.L89
-.L94:
+	b	.L78
+.L83:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L89
+	b	.L78
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -793,7 +759,7 @@ INSERT_FREE_LIST:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L95
+	bcs	.L84
 	ldp	x29, x30, [sp], 16
 	mov	w2, 207
 	adrp	x1, .LANCHOR49
@@ -801,7 +767,7 @@ INSERT_FREE_LIST:
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.L95:
+.L84:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -825,26 +791,26 @@ List_remove_node:
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L99
+	bne	.L88
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L99
+	beq	.L88
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L99:
+.L88:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L100
+	bne	.L89
 	cmp	w0, w1
-	bne	.L101
+	bne	.L90
 	str	xzr, [x22]
-.L102:
+.L91:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -854,27 +820,27 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L101:
+.L90:
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L102
-.L100:
+	b	.L91
+.L89:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L103
+	bne	.L92
 	cmp	w1, w0
-	beq	.L102
+	beq	.L91
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L102
-.L103:
+	b	.L91
+.L92:
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
@@ -882,7 +848,7 @@ List_remove_node:
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L102
+	b	.L91
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -890,7 +856,7 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L111
+	cbz	x2, .L100
 	stp	x29, x30, [sp, -32]!
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
@@ -899,9 +865,9 @@ List_pop_index_node:
 	str	x19, [sp, 16]
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.L107:
-	cbnz	w1, .L108
-.L110:
+.L96:
+	cbnz	w1, .L97
+.L99:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -914,15 +880,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L108:
+.L97:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L110
+	beq	.L99
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L107
-.L111:
+	b	.L96
+.L100:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -942,26 +908,26 @@ List_get_gc_head_node:
 	and	w2, w0, 65535
 	adrp	x0, .LANCHOR41
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	cbz	x1, .L122
+	cbz	x1, .L111
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 65535
-.L119:
-	cbz	w2, .L120
+.L108:
+	cbz	w2, .L109
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L121
+	bne	.L110
 	ret
-.L121:
+.L110:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L119
-.L122:
+	b	.L108
+.L111:
 	mov	w0, 65535
 	ret
-.L120:
+.L109:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -985,15 +951,15 @@ List_update_data_list:
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L125
+	beq	.L114
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L125
+	beq	.L114
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L125
+	beq	.L114
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
 	adrp	x24, .LANCHOR41
@@ -1003,7 +969,7 @@ List_update_data_list:
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L125
+	beq	.L114
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
@@ -1016,25 +982,25 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L128
+	bne	.L117
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L128
+	bne	.L117
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L128:
+.L117:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L129
+	bne	.L118
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L125
-.L129:
+	beq	.L114
+.L118:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
@@ -1050,26 +1016,26 @@ List_update_data_list:
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L125
+	bcs	.L114
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	add	x0, x24, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L131
+	cbnz	w0, .L120
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L131:
+.L120:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L125:
+.L114:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -1092,72 +1058,72 @@ select_l2p_ram_region:
 	adrp	x0, .LANCHOR55
 	str	x19, [sp, 16]
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.L136:
+.L125:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L138
+	bcc	.L127
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L139:
+.L128:
 	cmp	w1, w2
-	bne	.L141
+	bne	.L130
 	cmp	w19, w2
-	bcc	.L137
+	bcc	.L126
 	adrp	x1, .LANCHOR56
 	mov	w19, w2
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.L142:
+.L131:
 	cmp	w1, w2
-	bne	.L144
+	bne	.L133
 	cmp	w19, w1
-	bcc	.L137
-	mov	w2, 787
+	bcc	.L126
+	mov	w2, 789
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L137
-.L138:
+	b	.L126
+.L127:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L136
-.L137:
+	bne	.L125
+.L126:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L141:
+.L130:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L140
+	tbnz	w4, #31, .L129
 	cmp	w5, w4
-	bls	.L140
+	bls	.L129
 	mov	w5, w4
 	mov	w19, w1
-.L140:
+.L129:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L139
-.L144:
+	b	.L128
+.L133:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L143
+	bls	.L132
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L143:
+.L132:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L142
+	b	.L131
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
@@ -1168,12 +1134,12 @@ FtlUpdateVaildLpn:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L147
-	cbnz	w0, .L147
+	bhi	.L136
+	cbnz	w0, .L136
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
 	ret
-.L147:
+.L136:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR59
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
@@ -1185,22 +1151,22 @@ FtlUpdateVaildLpn:
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L148:
+.L137:
 	cmp	w5, w1, uxth
-	bhi	.L150
-	cbz	w3, .L146
+	bhi	.L139
+	cbz	w3, .L135
 	str	w2, [x0, #:lo12:.LANCHOR59]
-.L146:
+.L135:
 	ret
-.L150:
+.L139:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L149
+	beq	.L138
 	add	w2, w2, w4
 	mov	w3, 1
-.L149:
+.L138:
 	add	x1, x1, 1
-	b	.L148
+	b	.L137
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -1208,9 +1174,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L157
+	cbz	w1, .L146
 	b	ftl_set_blk_mode.part.6
-.L157:
+.L146:
 	adrp	x1, .LANCHOR1
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -1250,9 +1216,9 @@ ftl_sb_update_avl_pages:
 	add	x4, x0, x4
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
-.L160:
+.L149:
 	cmp	w2, w3
-	bcc	.L162
+	bcc	.L151
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
@@ -1263,32 +1229,32 @@ ftl_sb_update_avl_pages:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L163:
+.L152:
 	cmp	x2, x3
-	bne	.L165
+	bne	.L154
 	ret
-.L162:
+.L151:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L161
+	beq	.L150
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L161:
+.L150:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L160
-.L165:
+	b	.L149
+.L154:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L164
+	beq	.L153
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L164:
+.L153:
 	add	x2, x2, 2
-	b	.L163
+	b	.L152
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -1296,38 +1262,38 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L166
+	cbz	w1, .L155
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L166
+	beq	.L155
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
 	mov	w2, w1
-.L169:
+.L158:
 	cmp	w3, w2
-	beq	.L171
-.L166:
+	beq	.L160
+.L155:
 	ret
-.L171:
+.L160:
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
 	cmp	w1, w4
-	bne	.L170
+	bne	.L159
 	ldrh	w1, [x0, 2]
 	strb	wzr, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L170:
+.L159:
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-	b	.L169
+	b	.L158
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -1342,14 +1308,14 @@ make_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L173
+	bcc	.L162
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2110
+	mov	w2, 2156
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L173:
+.L162:
 	adrp	x0, .LANCHOR3
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
@@ -1359,9 +1325,9 @@ make_superblock:
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L174:
+.L163:
 	cmp	w8, w5, uxth
-	bhi	.L176
+	bhi	.L165
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
@@ -1372,22 +1338,22 @@ make_superblock:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L176:
+.L165:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L175
+	cbnz	w0, .L164
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L175:
+.L164:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L174
+	b	.L163
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -1404,11 +1370,11 @@ update_multiplier_value:
 	add	x8, x8, :lo12:.LANCHOR13
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
 	cmp	w10, w7, uxth
-	bhi	.L190
-	cbz	w5, .L188
+	bhi	.L179
+	cbz	w5, .L177
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L189:
+.L178:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1416,31 +1382,31 @@ update_multiplier_value:
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L183:
+.L172:
 	mov	w5, 0
-	b	.L182
-.L188:
+	b	.L171
+.L177:
 	mov	w5, 0
-	b	.L189
-.L190:
+	b	.L178
+.L179:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L181:
+.L170:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L180
+	cbnz	w0, .L169
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L180:
+.L169:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L181
-	cbz	w5, .L183
+	bhi	.L170
+	cbz	w5, .L172
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L182:
+.L171:
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
@@ -1457,7 +1423,7 @@ update_multiplier_value:
 GetFreeBlockMinEraseCount:
 	adrp	x0, .LANCHOR47
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
-	cbz	x0, .L193
+	cbz	x0, .L182
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -1470,7 +1436,7 @@ GetFreeBlockMinEraseCount:
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L193:
+.L182:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -1482,7 +1448,7 @@ GetFreeBlockMaxEraseCount:
 	adrp	x1, .LANCHOR47
 	and	w0, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR47]
-	cbz	x1, .L201
+	cbz	x1, .L190
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
 	mov	w5, 6
@@ -1501,867 +1467,37 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L197:
+.L186:
 	cmp	w0, w2
-	beq	.L200
+	beq	.L189
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L198
-.L200:
+	bne	.L187
+.L189:
 	adrp	x0, .LANCHOR43
 	ubfiz	x1, x1, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x1]
 	ret
-.L198:
+.L187:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L197
-.L201:
+	b	.L186
+.L190:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.section	.text.FtlPrintInfo2buf,"ax",@progbits
+	.section	.text.free_data_superblock,"ax",@progbits
 	.align	2
-	.global	FtlPrintInfo2buf
-	.type	FtlPrintInfo2buf, %function
-FtlPrintInfo2buf:
-	stp	x29, x30, [sp, -96]!
-	mov	x1, 64
-	adrp	x2, .LC2
-	add	x2, x2, :lo12:.LC2
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR37
-	stp	x21, x22, [sp, 32]
-	mov	x21, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR48
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR39
-	str	x27, [sp, 80]
-	bl	snprintf
-	add	x20, x21, x0, sxtw
-	adrp	x0, .LANCHOR26
-	mov	x1, 64
-	adrp	x2, .LC3
-	ldr	w3, [x0, #:lo12:.LANCHOR26]
-	add	x2, x2, :lo12:.LC3
-	mov	x0, x20
-	add	x22, x22, :lo12:.LANCHOR39
-	adrp	x24, .LANCHOR51
-	adrp	x25, .LANCHOR81
-	add	x25, x25, :lo12:.LANCHOR81
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC4
-	add	x2, x2, :lo12:.LC4
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR61
-	mov	x1, 64
-	adrp	x2, .LC5
-	add	x2, x2, :lo12:.LC5
-	ldr	w3, [x0, #:lo12:.LANCHOR61]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR59
-	mov	x1, 64
-	adrp	x2, .LC6
-	add	x2, x2, :lo12:.LC6
-	ldr	w3, [x0, #:lo12:.LANCHOR59]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR62
-	mov	x1, 64
-	adrp	x2, .LC7
-	add	x2, x2, :lo12:.LC7
-	ldr	w3, [x0, #:lo12:.LANCHOR62]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR63
-	mov	x1, 64
-	adrp	x2, .LC8
-	add	x2, x2, :lo12:.LC8
-	ldr	w3, [x0, #:lo12:.LANCHOR63]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR64
-	mov	x1, 64
-	adrp	x2, .LC9
-	add	x2, x2, :lo12:.LC9
-	ldr	w3, [x0, #:lo12:.LANCHOR64]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR65
-	mov	x1, 64
-	adrp	x2, .LC10
-	add	x2, x2, :lo12:.LC10
-	ldr	w3, [x0, #:lo12:.LANCHOR65]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR66
-	mov	x1, 64
-	adrp	x2, .LC11
-	add	x2, x2, :lo12:.LC11
-	ldr	w3, [x0, #:lo12:.LANCHOR66]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR67
-	mov	x1, 64
-	adrp	x2, .LC12
-	add	x2, x2, :lo12:.LC12
-	ldr	w3, [x0, #:lo12:.LANCHOR67]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR68
-	mov	x1, 64
-	adrp	x2, .LC13
-	add	x2, x2, :lo12:.LC13
-	ldr	w3, [x0, #:lo12:.LANCHOR68]
-	mov	x0, x20
-	lsr	w3, w3, 11
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR69
-	mov	x1, 64
-	adrp	x2, .LC14
-	ldr	w3, [x0, #:lo12:.LANCHOR69]
-	add	x2, x2, :lo12:.LC14
-	mov	x0, x20
-	lsr	w3, w3, 11
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR70
-	mov	x1, 64
-	adrp	x2, .LC15
-	ldr	w3, [x0, #:lo12:.LANCHOR70]
-	add	x2, x2, :lo12:.LC15
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR71
-	mov	x1, 64
-	adrp	x2, .LC16
-	add	x2, x2, :lo12:.LC16
-	ldr	w3, [x0, #:lo12:.LANCHOR71]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	add	x0, x19, :lo12:.LANCHOR37
-	mov	x1, 64
-	adrp	x2, .LC17
-	add	x2, x2, :lo12:.LC17
-	ldrh	w3, [x0, 6]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x23, #:lo12:.LANCHOR48]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC18
-	add	x2, x2, :lo12:.LC18
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR72
-	mov	x1, 64
-	adrp	x2, .LC19
-	add	x2, x2, :lo12:.LC19
-	ldr	w3, [x0, #:lo12:.LANCHOR72]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR73
-	mov	x1, 64
-	adrp	x2, .LC20
-	add	x2, x2, :lo12:.LC20
-	ldr	w3, [x0, #:lo12:.LANCHOR73]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR74
-	mov	x1, 64
-	adrp	x2, .LC21
-	add	x2, x2, :lo12:.LC21
-	ldr	w3, [x0, #:lo12:.LANCHOR74]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR75
-	mov	x1, 64
-	adrp	x2, .LC22
-	add	x2, x2, :lo12:.LC22
-	ldr	w3, [x0, #:lo12:.LANCHOR75]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR76
-	mov	x1, 64
-	adrp	x2, .LC23
-	add	x2, x2, :lo12:.LC23
-	ldr	w3, [x0, #:lo12:.LANCHOR76]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR77
-	mov	x1, 64
-	adrp	x2, .LC24
-	add	x2, x2, :lo12:.LC24
-	ldr	w3, [x0, #:lo12:.LANCHOR77]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x22, 30]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC25
-	add	x2, x2, :lo12:.LC25
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x22, 28]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC26
-	add	x2, x2, :lo12:.LC26
-	adrp	x22, .LANCHOR42
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR34
-	mov	x1, 64
-	adrp	x2, .LC27
-	add	x2, x2, :lo12:.LC27
-	ldr	w3, [x0, #:lo12:.LANCHOR34]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR31
-	mov	x1, 64
-	adrp	x2, .LC28
-	add	x2, x2, :lo12:.LC28
-	ldr	w3, [x0, #:lo12:.LANCHOR31]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR2
-	mov	x1, 64
-	adrp	x2, .LC29
-	add	x2, x2, :lo12:.LC29
-	ldr	w3, [x0, #:lo12:.LANCHOR2]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR38+6
-	mov	x1, 64
-	adrp	x2, .LC30
-	add	x2, x2, :lo12:.LC30
-	ldrh	w3, [x0, #:lo12:.LANCHOR38+6]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR5
-	mov	x1, 64
-	adrp	x2, .LC31
-	add	x2, x2, :lo12:.LC31
-	ldrh	w3, [x0, #:lo12:.LANCHOR5]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR78
-	mov	x1, 64
-	adrp	x2, .LC32
-	add	x2, x2, :lo12:.LC32
-	ldrh	w3, [x0, #:lo12:.LANCHOR78]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR7
-	mov	x1, 64
-	adrp	x2, .LC33
-	add	x2, x2, :lo12:.LC33
-	ldr	w3, [x0, #:lo12:.LANCHOR7]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	adrp	x0, .LANCHOR79
-	mov	x1, 64
-	adrp	x2, .LC34
-	add	x2, x2, :lo12:.LC34
-	ldrh	w3, [x0, #:lo12:.LANCHOR79]
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, #:lo12:.LANCHOR37]
-	add	x19, x24, :lo12:.LANCHOR51
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC35
-	add	x2, x2, :lo12:.LC35
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC36
-	add	x2, x2, :lo12:.LC36
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC37
-	add	x2, x2, :lo12:.LC37
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR51]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC38
-	add	x2, x2, :lo12:.LC38
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC39
-	add	x2, x2, :lo12:.LC39
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC40
-	add	x2, x2, :lo12:.LC40
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w1, [x24, #:lo12:.LANCHOR51]
-	adrp	x24, .LANCHOR52
-	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	add	x19, x24, :lo12:.LANCHOR52
-	adrp	x2, .LC41
-	add	x2, x2, :lo12:.LC41
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	x1, 64
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC42
-	add	x2, x2, :lo12:.LC42
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC43
-	add	x2, x2, :lo12:.LC43
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR52]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC44
-	add	x2, x2, :lo12:.LC44
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC45
-	add	x2, x2, :lo12:.LC45
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC46
-	add	x2, x2, :lo12:.LC46
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w1, [x24, #:lo12:.LANCHOR52]
-	adrp	x24, .LANCHOR53
-	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	add	x19, x24, :lo12:.LANCHOR53
-	adrp	x2, .LC47
-	add	x2, x2, :lo12:.LC47
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	x1, 64
-	mov	x0, x20
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC48
-	add	x2, x2, :lo12:.LC48
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC49
-	add	x2, x2, :lo12:.LC49
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR53]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC50
-	add	x2, x2, :lo12:.LC50
-	adrp	x24, .LANCHOR80
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC51
-	add	x2, x2, :lo12:.LC51
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	add	x19, x24, :lo12:.LANCHOR80
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC52
-	add	x2, x2, :lo12:.LC52
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 2]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC53
-	add	x2, x2, :lo12:.LC53
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 6]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC54
-	add	x2, x2, :lo12:.LC54
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x24, #:lo12:.LANCHOR80]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC55
-	add	x2, x2, :lo12:.LC55
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrb	w3, [x19, 8]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC56
-	add	x2, x2, :lo12:.LC56
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldrh	w3, [x19, 4]
-	mov	x1, 64
-	mov	x0, x20
-	adrp	x2, .LC57
-	add	x2, x2, :lo12:.LC57
-	bl	snprintf
-	add	x20, x20, x0, sxtw
-	ldp	w5, w3, [x25, 76]
-	mov	x1, 64
-	ldr	w4, [x25, 84]
-	adrp	x2, .LC58
-	mov	x0, x20
-	add	x2, x2, :lo12:.LC58
-	bl	snprintf
-	add	x19, x20, x0, sxtw
-	ldr	w3, [x25, 72]
-	mov	x1, 64
-	mov	x0, x19
-	adrp	x2, .LC59
-	add	x2, x2, :lo12:.LC59
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	ldr	w3, [x25, 96]
-	mov	x1, 64
-	mov	x0, x19
-	adrp	x2, .LC60
-	add	x2, x2, :lo12:.LC60
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR82
-	mov	x1, 64
-	adrp	x2, .LC61
-	add	x2, x2, :lo12:.LC61
-	ldrh	w3, [x0, #:lo12:.LANCHOR82]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR83
-	mov	x1, 64
-	adrp	x2, .LC62
-	add	x2, x2, :lo12:.LC62
-	ldrh	w3, [x0, #:lo12:.LANCHOR83]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR84
-	mov	x1, 64
-	adrp	x2, .LC63
-	add	x2, x2, :lo12:.LC63
-	ldr	w3, [x0, #:lo12:.LANCHOR84]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR85
-	adrp	x2, .LC64
-	add	x2, x2, :lo12:.LC64
-	mov	x1, 64
-	ldrh	w3, [x0, #:lo12:.LANCHOR85]
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	bl	GetFreeBlockMinEraseCount
-	and	w3, w0, 65535
-	mov	x1, 64
-	mov	x0, x19
-	adrp	x2, .LC65
-	add	x2, x2, :lo12:.LC65
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	bl	GetFreeBlockMaxEraseCount
-	and	w3, w0, 65535
-	adrp	x2, .LC66
-	mov	x0, x19
-	add	x2, x2, :lo12:.LC66
-	mov	x1, 64
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	adrp	x0, .LANCHOR86
-	ldr	w0, [x0, #:lo12:.LANCHOR86]
-	cmp	w0, 1
-	beq	.L203
-.L208:
-	sub	w0, w19, w21
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L203:
-	ldrh	w0, [x24, #:lo12:.LANCHOR80]
+	.global	free_data_superblock
+	.type	free_data_superblock, %function
+free_data_superblock:
+	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L205
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
-	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LC67
-	add	x2, x2, :lo12:.LC67
-	ldrh	w3, [x1, x0]
-	mov	x0, x19
-	mov	x1, 64
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-.L205:
-	mov	w0, 0
-	adrp	x24, .LC68
-	bl	List_get_gc_head_node
-	add	x24, x24, :lo12:.LC68
-	and	w4, w0, 65535
-	mov	w23, 0
-	mov	w27, 65535
-	adrp	x20, .LANCHOR40
-	mov	w26, 6
-.L207:
-	cmp	w4, w27
-	beq	.L206
-	adrp	x0, .LANCHOR43
-	umull	x25, w4, w26
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	ubfiz	x1, x4, 1, 16
-	ldr	x3, [x0, #:lo12:.LANCHOR43]
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	add	x0, x0, x25
-	ldrh	w5, [x2, x1]
-	ldrh	w7, [x3, x1]
-	mov	x2, x24
-	mov	w3, w23
-	mov	x1, 64
-	ldrh	w6, [x0, 4]
-	mov	x0, x19
-	add	w23, w23, 1
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	cmp	w23, 16
-	ldrh	w4, [x0, x25]
-	bne	.L207
-.L206:
-	adrp	x0, .LANCHOR47
-	adrp	x23, .LC69
-	add	x23, x23, :lo12:.LC69
-	mov	w22, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR47]
-	mov	w25, 65535
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	mov	w26, 6
-	adrp	x27, .LANCHOR43
-	sub	x4, x4, x0
-	mov	x0, -6148914691236517206
-	asr	x4, x4, 1
-	movk	x0, 0xaaab, lsl 0
-	mul	x4, x4, x0
-	and	w4, w4, 65535
-.L209:
-	cmp	w4, w25
-	beq	.L208
-	umull	x24, w4, w26
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	ldr	x2, [x27, #:lo12:.LANCHOR43]
-	ubfiz	x1, x4, 1, 16
-	add	x0, x0, x24
-	mov	w3, w22
-	add	w22, w22, 1
-	ldrh	w6, [x2, x1]
-	mov	x2, x23
-	ldrh	w5, [x0, 4]
-	mov	x1, 64
-	mov	x0, x19
-	bl	snprintf
-	add	x19, x19, x0, sxtw
-	cmp	w22, 4
-	beq	.L208
-	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	ldrh	w4, [x0, x24]
-	b	.L209
-	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
-	.section	.text.rknand_proc_ftlread,"ax",@progbits
-	.align	2
-	.global	rknand_proc_ftlread
-	.type	rknand_proc_ftlread, %function
-rknand_proc_ftlread:
-	cmp	w0, 2047
-	ble	.L217
-	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LC70
-	adrp	x2, .LC71
-	add	x3, x3, :lo12:.LC70
-	add	x29, sp, 0
-	add	x2, x2, :lo12:.LC71
-	stp	x19, x20, [sp, 16]
-	mov	x20, x1
-	mov	x1, 64
-	mov	x0, x20
-	bl	snprintf
-	add	x19, x20, x0, sxtw
-	mov	x0, x19
-	bl	FtlPrintInfo2buf
-	add	x0, x19, x0, sxtw
-	sub	w0, w0, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L217:
-	mov	w0, 0
-	ret
-	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
-	.section	.text.GetSwlReplaceBlock,"ax",@progbits
-	.align	2
-	.global	GetSwlReplaceBlock
-	.type	GetSwlReplaceBlock, %function
-GetSwlReplaceBlock:
-	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR74
-	adrp	x8, .LANCHOR77
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	ldr	w3, [x2, #:lo12:.LANCHOR74]
-	ldr	w7, [x8, #:lo12:.LANCHOR77]
-	cmp	w3, w7
-	bcs	.L223
-	adrp	x1, .LANCHOR5
-	adrp	x0, .LANCHOR72
-	mov	w5, 0
-	mov	w4, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR43
-	str	wzr, [x0, #:lo12:.LANCHOR72]
-	ldr	x6, [x1, #:lo12:.LANCHOR43]
-	mov	x1, 0
-.L224:
-	cmp	w3, w1
-	bhi	.L225
-	cbz	w5, .L226
-	str	w4, [x0, #:lo12:.LANCHOR72]
-.L226:
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
-	udiv	w3, w1, w3
-	str	w3, [x2, #:lo12:.LANCHOR74]
-	adrp	x3, .LANCHOR73
-	ldr	w3, [x3, #:lo12:.LANCHOR73]
-	sub	w1, w1, w3
-	adrp	x3, .LANCHOR14
-	ldrh	w3, [x3, #:lo12:.LANCHOR14]
-	udiv	w1, w1, w3
-	str	w1, [x0, #:lo12:.LANCHOR72]
-.L227:
-	ldr	w10, [x2, #:lo12:.LANCHOR74]
-	add	w0, w7, 256
-	cmp	w0, w10
-	bls	.L232
-	adrp	x1, .LANCHOR76
-	add	w0, w7, 768
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cmp	w0, w1
-	bls	.L232
-.L234:
-	mov	w19, 65535
-.L233:
-	mov	w0, w19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L225:
-	ldrh	w5, [x6, x1, lsl 1]
-	add	x1, x1, 1
-	add	w4, w4, w5
-	mov	w5, 1
-	b	.L224
-.L223:
-	adrp	x1, .LANCHOR76
-	ldr	w0, [x1, #:lo12:.LANCHOR76]
-	cmp	w3, w0
-	bls	.L227
-	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR43
-	adrp	x1, .LANCHOR5
-	add	x1, x1, :lo12:.LANCHOR5
-	ldr	x4, [x0, #:lo12:.LANCHOR43]
-	mov	w0, 0
-.L229:
-	ldrh	w3, [x1]
-	cmp	w0, w3
-	bcs	.L227
-	ubfiz	x5, x0, 1, 32
-	add	w0, w0, 1
-	ldrh	w3, [x4, x5]
-	add	w3, w3, 1
-	strh	w3, [x4, x5]
-	b	.L229
-.L232:
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	add	w0, w0, w0, lsl 1
-	lsr	w0, w0, 2
-	bl	GetFreeBlockMaxEraseCount
-	and	w6, w0, 65535
-	add	w0, w7, 64
-	cmp	w6, w0
-	bcc	.L234
-	adrp	x0, .LANCHOR41
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L234
-	adrp	x1, .LANCHOR5
-	mov	w3, 65535
-	mov	x14, -6148914691236517206
-	mov	w2, w3
-	ldrh	w13, [x1, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR40
-	mov	w12, w3
-	movk	x14, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR43
-	mov	w15, 6
-	ldr	x4, [x1, #:lo12:.LANCHOR43]
-	mov	w1, 0
-.L235:
-	ldrh	w5, [x0]
-	cmp	w5, w12
-	bne	.L238
-	mov	w19, w2
-.L237:
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L234
-	ubfiz	x2, x19, 1, 32
-	ldrh	w5, [x4, x2]
-	cmp	w7, w5
-	bcs	.L239
-	bl	GetFreeBlockMinEraseCount
-	cmp	w7, w0, uxth
-	bcs	.L239
-	str	w3, [x8, #:lo12:.LANCHOR77]
-.L239:
-	cmp	w10, w5
-	bls	.L234
-	add	w0, w5, 128
-	cmp	w6, w0
-	ble	.L234
-	add	w0, w5, 256
-	adrp	x1, .LANCHOR76
-	cmp	w10, w0
-	bhi	.L240
-	ldr	w3, [x1, #:lo12:.LANCHOR76]
-	add	w0, w5, 768
-	cmp	w0, w3
-	bcs	.L234
-.L240:
-	adrp	x0, .LANCHOR42
-	ldr	w3, [x1, #:lo12:.LANCHOR76]
-	mov	w1, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	ldrh	w4, [x0, x2]
-	mov	w2, w10
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
-	bl	printf
-	adrp	x0, .LANCHOR87
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L233
-.L238:
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	cmp	w1, w13
-	bhi	.L234
-	ldrh	w16, [x0, 4]
-	cbz	w16, .L236
-	sub	x0, x0, x11
-	asr	x0, x0, 1
-	mul	x0, x0, x14
-	and	w19, w0, 65535
-	and	x0, x0, 65535
-	ldrh	w0, [x4, x0, lsl 1]
-	cmp	w7, w0
-	bcs	.L237
-	cmp	w3, w0
-	bls	.L236
-	mov	w3, w0
-	mov	w2, w19
-.L236:
-	umaddl	x0, w5, w15, x11
-	b	.L235
-	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
-	.section	.text.free_data_superblock,"ax",@progbits
-	.align	2
-	.global	free_data_superblock
-	.type	free_data_superblock, %function
-free_data_superblock:
-	and	w0, w0, 65535
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L254
+	beq	.L194
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -2372,7 +1508,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L254:
+.L194:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -2389,35 +1525,35 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L258
-	adrp	x1, .LANCHOR88
+	bne	.L198
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2740
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2786
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L258:
+.L198:
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L259
-	adrp	x1, .LANCHOR88
+	bne	.L199
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2741
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2787
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L259:
+.L199:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L260
-	adrp	x1, .LANCHOR88
+	cbnz	w0, .L200
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2742
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2788
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L260:
+.L200:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
@@ -2425,9 +1561,9 @@ get_new_active_ppa:
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L261:
+.L201:
 	cmp	w0, w1
-	beq	.L263
+	beq	.L203
 	ldrh	w21, [x19, 2]
 	mov	w3, 65535
 	ldrh	w1, [x19, 4]
@@ -2436,99 +1572,99 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L265:
+.L205:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w2, w0
-	bne	.L264
+	bne	.L204
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L264:
+.L204:
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L265
+	beq	.L205
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
-	bne	.L257
-	cbz	w1, .L257
-	adrp	x1, .LANCHOR88
+	bne	.L197
+	cbz	w1, .L197
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC1
-	mov	w2, 2763
-	add	x1, x1, :lo12:.LANCHOR88
+	mov	w2, 2809
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L257:
+.L197:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L263:
+.L203:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w2
-	bne	.L262
+	bne	.L202
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L262:
+.L202:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L261
+	b	.L201
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR89
-	adrp	x7, .LANCHOR91
-	adrp	x6, .LANCHOR92
-	ldr	x5, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR63
+	adrp	x0, .LANCHOR62
+	adrp	x7, .LANCHOR64
+	adrp	x6, .LANCHOR65
+	ldr	x5, [x1, #:lo12:.LANCHOR63]
 	adrp	x1, .LANCHOR23
-	str	wzr, [x0, #:lo12:.LANCHOR89]
+	str	wzr, [x0, #:lo12:.LANCHOR62]
 	adrp	x0, .LANCHOR3
 	ldrh	w10, [x1, #:lo12:.LANCHOR23]
 	adrp	x1, .LANCHOR24
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	w8, 24
 	ldrh	w11, [x1, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR93
-	ldr	x14, [x7, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR66
+	ldr	x14, [x7, #:lo12:.LANCHOR64]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR93]
+	ldr	x4, [x1, #:lo12:.LANCHOR66]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR92]
+	ldr	x15, [x6, #:lo12:.LANCHOR65]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L273:
+.L213:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L274
-	adrp	x1, .LANCHOR94
-	ldr	x7, [x7, #:lo12:.LANCHOR91]
-	ldr	x6, [x6, #:lo12:.LANCHOR92]
+	bne	.L214
+	adrp	x1, .LANCHOR67
+	ldr	x7, [x7, #:lo12:.LANCHOR64]
+	ldr	x6, [x6, #:lo12:.LANCHOR65]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR94]
-.L275:
+	ldr	w4, [x1, #:lo12:.LANCHOR67]
+.L215:
 	cmp	w0, w4
-	bcc	.L276
+	bcc	.L216
 	ret
-.L274:
+.L214:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -2540,8 +1676,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L273
-.L276:
+	b	.L213
+.L216:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -2555,44 +1691,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L275
+	b	.L215
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR94
+	adrp	x2, .LANCHOR67
 	mov	w3, 0
 	mov	w8, 24
-	ldr	w7, [x2, #:lo12:.LANCHOR94]
-	adrp	x2, .LANCHOR90
-	ldr	x5, [x2, #:lo12:.LANCHOR90]
-.L278:
+	ldr	w7, [x2, #:lo12:.LANCHOR67]
+	adrp	x2, .LANCHOR63
+	ldr	x5, [x2, #:lo12:.LANCHOR63]
+.L218:
 	cmp	w3, w1
-	bcs	.L277
+	bcs	.L217
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L283
-.L279:
+	b	.L223
+.L219:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L283:
+.L223:
 	cmp	w2, w7
-	bcs	.L280
+	bcs	.L220
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L279
+	bne	.L219
 	str	wzr, [x10, 16]
-.L280:
+.L220:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L278
-.L277:
+	b	.L218
+.L217:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -2600,38 +1736,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR94
+	adrp	x2, .LANCHOR67
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR94]
-	adrp	x2, .LANCHOR90
-	ldr	x6, [x2, #:lo12:.LANCHOR90]
-.L285:
+	ldr	w5, [x2, #:lo12:.LANCHOR67]
+	adrp	x2, .LANCHOR63
+	ldr	x6, [x2, #:lo12:.LANCHOR63]
+.L225:
 	cmp	w3, w1
-	bcs	.L284
+	bcs	.L224
 	mov	w2, 0
-	b	.L290
-.L286:
+	b	.L230
+.L226:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L290:
+.L230:
 	cmp	w2, w5
-	bcs	.L287
+	bcs	.L227
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L286
+	cbnz	w10, .L226
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L287:
+.L227:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L285
-.L284:
+	b	.L225
+.L224:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -2639,23 +1775,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR68
 	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR95]
-	adrp	x1, .LANCHOR96
-	ldr	x3, [x1, #:lo12:.LANCHOR96]
+	ldrh	w2, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR69
+	ldr	x3, [x1, #:lo12:.LANCHOR69]
 	mov	x1, 0
-.L292:
+.L232:
 	cmp	w2, w1, uxth
-	bhi	.L294
+	bhi	.L234
 	mov	w0, 0
 	ret
-.L294:
+.L234:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L292
+	bne	.L232
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2672,40 +1808,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR95
-	adrp	x2, .LANCHOR96
+	adrp	x4, .LANCHOR68
+	adrp	x2, .LANCHOR69
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR95]
-	ldr	x5, [x2, #:lo12:.LANCHOR96]
-.L297:
+	ldrh	w1, [x4, #:lo12:.LANCHOR68]
+	ldr	x5, [x2, #:lo12:.LANCHOR69]
+.L237:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L299
-	bne	.L298
+	bcc	.L239
+	bne	.L238
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR95]
+	ldrh	w0, [x4, #:lo12:.LANCHOR68]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR95]
-	b	.L298
-.L299:
+	strh	w0, [x4, #:lo12:.LANCHOR68]
+	b	.L238
+.L239:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L297
-.L298:
-	adrp	x4, .LANCHOR97
-	adrp	x1, .LANCHOR98
+	bne	.L237
+.L238:
+	adrp	x4, .LANCHOR70
+	adrp	x1, .LANCHOR71
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR97]
-	ldr	x5, [x1, #:lo12:.LANCHOR98]
+	ldrh	w0, [x4, #:lo12:.LANCHOR70]
+	ldr	x5, [x1, #:lo12:.LANCHOR71]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR97]
+	strh	w0, [x4, #:lo12:.LANCHOR70]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -2714,84 +1850,64 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	and	w19, w0, 65535
-	mov	w1, w19
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
-	bl	printf
-	adrp	x3, .LANCHOR99
-	ldrh	w4, [x3, #:lo12:.LANCHOR99]
-	cmp	w19, w4
-	beq	.L302
-	adrp	x0, .LANCHOR100
-	ldrh	w2, [x0, #:lo12:.LANCHOR100]
-	cmp	w19, w2
-	beq	.L302
-	mov	w1, 65535
-	cmp	w4, w1
-	bne	.L303
-	strh	w19, [x3, #:lo12:.LANCHOR99]
-.L302:
+	adrp	x4, .LANCHOR72
+	and	w0, w0, 65535
+	ldrh	w5, [x4, #:lo12:.LANCHOR72]
+	cmp	w5, w0
+	beq	.L242
+	adrp	x1, .LANCHOR73
+	ldrh	w3, [x1, #:lo12:.LANCHOR73]
+	cmp	w0, w3
+	beq	.L242
+	mov	w2, 65535
+	cmp	w5, w2
+	bne	.L243
+	strh	w0, [x4, #:lo12:.LANCHOR72]
+.L242:
 	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
 	ret
-.L303:
-	cmp	w2, w1
-	bne	.L302
-	strh	w19, [x0, #:lo12:.LANCHOR100]
-	b	.L302
+.L243:
+	cmp	w3, w2
+	bne	.L242
+	strh	w0, [x1, #:lo12:.LANCHOR73]
+	b	.L242
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-	stp	x29, x30, [sp, -48]!
+	and	w6, w0, 65535
+	stp	x29, x30, [sp, -16]!
+	mov	w0, w6
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
-	adrp	x19, .LANCHOR101
-	str	x21, [sp, 32]
-	mov	w0, w20
 	bl	P2V_block_in_plane
-	ldrh	w1, [x19, #:lo12:.LANCHOR101]
-	mov	w2, w20
-	mov	w21, w0
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
-	bl	printf
-	mov	w0, w21
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x19, #:lo12:.LANCHOR101]
-	adrp	x2, .LANCHOR102
-	add	x2, x2, :lo12:.LANCHOR102
-	mov	x1, 0
-.L306:
-	cmp	w0, w1, uxth
-	bhi	.L308
+	adrp	x1, .LANCHOR74
+	adrp	x3, .LANCHOR75
+	add	x3, x3, :lo12:.LANCHOR75
+	mov	x2, 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR74]
+.L245:
+	cmp	w0, w2, uxth
+	bhi	.L247
 	cmp	w0, 15
-	bhi	.L307
-	add	w1, w0, 1
-	strh	w1, [x19, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR102
-	add	x1, x1, :lo12:.LANCHOR102
-	strh	w20, [x1, w0, sxtw 1]
-	b	.L307
-.L308:
-	add	x1, x1, 1
-	add	x3, x2, x1, lsl 1
-	ldrh	w3, [x3, -2]
-	cmp	w3, w20
-	bne	.L306
-.L307:
+	bhi	.L246
+	add	w2, w0, 1
+	strh	w2, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR75
+	strh	w6, [x1, w0, sxtw 1]
+	b	.L246
+.L247:
+	add	x2, x2, 1
+	add	x4, x3, x2, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w6
+	bne	.L245
+.L246:
 	mov	w0, 0
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
@@ -2799,37 +1915,35 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L317
-	adrp	x1, .LANCHOR99
-	ldrh	w2, [x1, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L256
+	adrp	x1, .LANCHOR72
+	ldrh	w2, [x1, #:lo12:.LANCHOR72]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L317
-	stp	x29, x30, [sp, -32]!
+	bne	.L256
+	stp	x29, x30, [sp, -16]!
+	adrp	x6, .LANCHOR76
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR103
-	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	ldrh	w1, [x6, #:lo12:.LANCHOR76]
 	cmp	w1, w0
-	bcc	.L312
-	strh	wzr, [x19, #:lo12:.LANCHOR103]
-.L312:
-	ldrh	w1, [x19, #:lo12:.LANCHOR103]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	bcc	.L251
+	strh	wzr, [x6, #:lo12:.LANCHOR76]
+.L251:
+	ldrh	w1, [x6, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR75
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x19, #:lo12:.LANCHOR103]
+	ldrh	w0, [x6, #:lo12:.LANCHOR76]
+	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x19, #:lo12:.LANCHOR103]
+	strh	w0, [x6, #:lo12:.LANCHOR76]
 	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
 	ret
-.L317:
+.L256:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -2859,66 +1973,66 @@ rknand_print_hex:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LC75
+	adrp	x24, .LC2
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LC77
+	adrp	x25, .LC4
 	mov	x28, x0
 	mov	w27, w3
-	add	x24, x24, :lo12:.LC75
-	add	x25, x25, :lo12:.LC77
+	add	x24, x24, :lo12:.LC2
+	add	x25, x25, :lo12:.LC4
 	stp	x19, x20, [sp, 16]
 	mov	w21, 0
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x26, .LC76
-.L323:
+	adrp	x26, .LC3
+.L262:
 	cmp	w27, w19
-	bhi	.L329
+	bhi	.L268
 	ldp	x19, x20, [sp, 16]
-	adrp	x0, .LC78
+	adrp	x0, .LC5
 	ldp	x21, x22, [sp, 32]
-	add	x0, x0, :lo12:.LC78
+	add	x0, x0, :lo12:.LC5
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L329:
-	cbnz	w20, .L324
+.L268:
+	cbnz	w20, .L263
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L324:
+.L263:
 	cmp	w23, 4
-	bne	.L325
+	bne	.L264
 	ldr	w1, [x22, x19, lsl 2]
-.L332:
-	add	x0, x26, :lo12:.LC76
-.L331:
+.L271:
+	add	x0, x26, :lo12:.LC3
+.L270:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L328
+	bls	.L267
 	mov	w20, 0
-	adrp	x0, .LC78
-	add	x0, x0, :lo12:.LC78
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L328:
+.L267:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L323
-.L325:
+	b	.L262
+.L264:
 	cmp	w23, 2
-	bne	.L327
+	bne	.L266
 	ldrh	w1, [x22, x19, lsl 1]
-	b	.L332
-.L327:
+	b	.L271
+.L266:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L331
+	b	.L270
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -2939,34 +2053,34 @@ FlashEraseBlocks:
 	add	x23, x21, 4
 	stp	x25, x26, [sp, 64]
 	add	x23, x20, x23
-	adrp	x25, .LANCHOR105
+	adrp	x25, .LANCHOR78
 	str	x27, [sp, 80]
 	lsl	w26, w24, 3
 	mov	x22, x0
-	add	x27, x25, :lo12:.LANCHOR105
-.L334:
+	add	x27, x25, :lo12:.LANCHOR78
+.L273:
 	cmp	x19, x23
-	beq	.L348
+	beq	.L287
 	ldr	w0, [x19]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
-	cbnz	w0, .L335
+	cbnz	w0, .L274
 	ldr	w1, [x29, 108]
 	cmp	w26, w1
-	bls	.L335
+	bls	.L274
 	mov	x19, x20
 	add	x21, x20, x21
-	adrp	x22, .LC79
-	adrp	x20, .LANCHOR104
-	add	x22, x22, :lo12:.LC79
-	add	x20, x20, :lo12:.LANCHOR104
+	adrp	x22, .LC6
+	adrp	x20, .LANCHOR77
+	add	x22, x22, :lo12:.LC6
+	add	x20, x20, :lo12:.LANCHOR77
 	mov	w23, -1
-.L336:
+.L275:
 	cmp	x19, x21
-	bne	.L337
-.L348:
+	bne	.L276
+.L287:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -2975,7 +2089,7 @@ FlashEraseBlocks:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L337:
+.L276:
 	ldr	w2, [x29, 108]
 	mov	x1, x20
 	str	w23, [x19]
@@ -2985,43 +2099,43 @@ FlashEraseBlocks:
 	ldr	x1, [x19, -24]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	rknand_print_hex
 	ldr	x1, [x19, -16]
 	mov	w3, 4
-	adrp	x0, .LC81
+	adrp	x0, .LC8
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-	b	.L336
-.L335:
-	add	x1, x25, :lo12:.LANCHOR105
+	b	.L275
+.L274:
+	add	x1, x25, :lo12:.LANCHOR78
 	ldr	x2, [x1, 8]
 	ldr	w1, [x29, 108]
 	blr	x2
-	cbnz	w0, .L338
+	cbnz	w0, .L277
 	str	wzr, [x19, -4]
-.L339:
+.L278:
 	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L341
+	bne	.L280
 	ldrb	w0, [x29, 104]
 	ldr	x2, [x27, 8]
 	ldr	w1, [x29, 108]
 	add	w1, w24, w1
 	blr	x2
-	cbz	w0, .L341
+	cbz	w0, .L280
 	mov	w0, -1
 	str	w0, [x19, -4]
-.L341:
+.L280:
 	add	x19, x19, 32
-	b	.L334
-.L338:
+	b	.L273
+.L277:
 	mov	w0, -1
 	str	w0, [x19, -4]
-	b	.L339
+	b	.L278
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -3036,22 +2150,22 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L350
+	bcc	.L289
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L350
+	beq	.L289
 	and	w1, w1, 65535
-	cbz	w1, .L352
+	cbz	w1, .L291
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR79
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
@@ -3061,11 +2175,11 @@ FtlFreeSysBlkQueueIn:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR75
-	ldr	w0, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR75]
-.L352:
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L291:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -3076,7 +2190,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L350:
+.L289:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -3094,7 +2208,7 @@ FtlFreeSysBlkQueueOut:
 	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	cbz	w2, .L364
+	cbz	w2, .L303
 	ldrh	w0, [x1, 2]
 	sub	w2, w2, #1
 	strh	w2, [x1, 6]
@@ -3103,34 +2217,34 @@ FtlFreeSysBlkQueueOut:
 	add	w0, w0, 1
 	and	w0, w0, 1023
 	strh	w0, [x1, 2]
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR79
 	ldrh	w20, [x3, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	lsl	w1, w20, 10
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR75
-	ldr	w0, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR75]
-.L361:
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L300:
 	sub	w0, w20, #1
 	mov	w1, 65533
 	cmp	w1, w0, uxth
-	bcs	.L362
+	bcs	.L301
 	add	x0, x19, :lo12:.LANCHOR38
 	mov	w1, w20
 	ldrh	w2, [x0, 6]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L363:
-	b	.L363
-.L364:
+.L302:
+	b	.L302
+.L303:
 	mov	w20, 65535
-	b	.L361
-.L362:
+	b	.L300
+.L301:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3149,27 +2263,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L367:
+.L306:
 	cmp	w20, w1
-	beq	.L371
+	beq	.L310
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L368
+	cbnz	w2, .L307
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L369
+	bcs	.L308
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L370:
-	b	.L370
-.L369:
+.L309:
+	b	.L309
+.L308:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3178,26 +2292,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L371:
+.L310:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L373
-	adrp	x1, .LANCHOR107
+	bhi	.L312
+	adrp	x1, .LANCHOR81
 	adrp	x0, .LC1
 	mov	w2, 578
-	add	x1, x1, :lo12:.LANCHOR107
+	add	x1, x1, :lo12:.LANCHOR81
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L373:
+.L312:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L368:
+.L307:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L367
+	b	.L306
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -3212,260 +2326,239 @@ ftl_memset:
 	.global	FtlMemInit
 	.type	FtlMemInit, %function
 FtlMemInit:
-	stp	x29, x30, [sp, -208]!
-	adrp	x0, .LANCHOR70
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR82
 	mov	w1, 65535
 	add	x29, sp, 0
-	str	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR71
+	str	wzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR83
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR21
-	str	wzr, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR67
+	str	wzr, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR84
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR3
-	str	wzr, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR64
-	stp	x23, x24, [sp, 48]
+	str	wzr, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR85
+	str	x23, [sp, 48]
 	adrp	x21, .LANCHOR23
-	str	wzr, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR63
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR118
-	str	wzr, [x0, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR65
-	stp	x27, x28, [sp, 80]
-	adrp	x23, .LANCHOR124
-	str	wzr, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR66
-	adrp	x25, .LANCHOR42
-	adrp	x27, .LANCHOR129
-	str	wzr, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LANCHOR62
-	adrp	x26, .LANCHOR130
-	str	wzr, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR72
-	str	wzr, [x0, #:lo12:.LANCHOR72]
-	adrp	x0, .LANCHOR73
-	str	wzr, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR75
-	str	wzr, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR76
-	str	wzr, [x0, #:lo12:.LANCHOR76]
-	adrp	x0, .LANCHOR77
-	str	wzr, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR108
-	str	wzr, [x0, #:lo12:.LANCHOR108]
+	str	wzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR86
+	adrp	x23, .LANCHOR24
+	str	wzr, [x0, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR87
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR109
-	str	w1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR110
-	adrp	x1, .LANCHOR99
-	str	wzr, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR84
-	str	wzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR111
-	str	wzr, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR88
+	str	wzr, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR90
+	str	wzr, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	str	wzr, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR80
+	str	wzr, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR92
+	str	wzr, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	str	wzr, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	str	wzr, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR95
+	str	wzr, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR96
+	str	w1, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LANCHOR97
+	adrp	x1, .LANCHOR72
+	str	wzr, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR98
+	str	wzr, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR99
+	str	wzr, [x0, #:lo12:.LANCHOR99]
 	mov	w0, -1
-	strh	w0, [x1, #:lo12:.LANCHOR99]
-	adrp	x1, .LANCHOR100
-	strh	w0, [x1, #:lo12:.LANCHOR100]
-	adrp	x0, .LANCHOR82
+	strh	w0, [x1, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR73
+	strh	w0, [x1, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR100
 	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LANCHOR83
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	strh	w1, [x0, #:lo12:.LANCHOR100]
 	adrp	x0, .LANCHOR101
-	strh	wzr, [x0, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR103
-	strh	wzr, [x0, #:lo12:.LANCHOR103]
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR102
+	strh	wzr, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR74
+	strh	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR76
+	strh	wzr, [x0, #:lo12:.LANCHOR76]
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR96
-	str	x0, [x1, #:lo12:.LANCHOR96]
+	adrp	x1, .LANCHOR69
+	str	x0, [x1, #:lo12:.LANCHOR69]
 	mov	w0, 12
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	adrp	x5, .LANCHOR98
-	str	x5, [x29, 104]
+	adrp	x1, .LANCHOR71
 	lsl	w20, w19, 5
 	lsl	w19, w19, 7
-	str	x0, [x5, #:lo12:.LANCHOR98]
+	str	x0, [x1, #:lo12:.LANCHOR71]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x15, .LANCHOR112
-	str	x15, [x29, 112]
-	str	x0, [x15, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR103
+	str	x0, [x1, #:lo12:.LANCHOR103]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x11, .LANCHOR113
-	str	x11, [x29, 120]
-	str	x0, [x11, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x14, .LANCHOR114
-	str	x14, [x29, 128]
-	str	x0, [x14, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x13, .LANCHOR106
-	str	x13, [x29, 136]
-	str	x0, [x13, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR79
+	str	x0, [x1, #:lo12:.LANCHOR79]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR94
-	adrp	x12, .LANCHOR93
+	adrp	x20, .LANCHOR67
+	adrp	x1, .LANCHOR66
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-	str	x12, [x29, 144]
-	str	x0, [x12, #:lo12:.LANCHOR93]
+	str	x0, [x1, #:lo12:.LANCHOR66]
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR94]
+	str	w0, [x20, #:lo12:.LANCHOR67]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x10, .LANCHOR115
-	str	x10, [x29, 152]
-	str	x0, [x10, #:lo12:.LANCHOR115]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x8, .LANCHOR116
-	str	x8, [x29, 160]
-	str	x0, [x8, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR107
+	str	x0, [x1, #:lo12:.LANCHOR107]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x7, .LANCHOR117
-	str	x7, [x29, 168]
-	str	x0, [x7, #:lo12:.LANCHOR117]
-	ldr	w0, [x20, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR108
+	str	x0, [x1, #:lo12:.LANCHOR108]
+	ldr	w0, [x20, #:lo12:.LANCHOR67]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-	adrp	x6, .LANCHOR91
-	str	x6, [x29, 176]
-	str	x0, [x6, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR64
+	str	x0, [x1, #:lo12:.LANCHOR64]
 	mov	w0, w19
 	bl	ftl_malloc
-	str	x0, [x24, #:lo12:.LANCHOR118]
+	adrp	x1, .LANCHOR109
+	str	x0, [x1, #:lo12:.LANCHOR109]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x4, .LANCHOR119
-	ldr	w2, [x20, #:lo12:.LANCHOR94]
-	str	x4, [x29, 184]
-	str	x0, [x4, #:lo12:.LANCHOR119]
+	adrp	x1, .LANCHOR110
+	str	x0, [x1, #:lo12:.LANCHOR110]
 	mov	w0, 24
-	mul	w0, w2, w0
+	ldr	w1, [x20, #:lo12:.LANCHOR67]
+	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x3, .LANCHOR90
-	str	x3, [x29, 192]
-	str	x0, [x3, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR63
+	str	x0, [x1, #:lo12:.LANCHOR63]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR120
-	str	x0, [x2, #:lo12:.LANCHOR120]
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR24
-	adrp	x2, .LANCHOR121
-	str	x0, [x2, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR112
+	str	x0, [x1, #:lo12:.LANCHOR112]
 	adrp	x0, .LANCHOR12
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR122
-	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	str	x0, [x2, #:lo12:.LANCHOR122]
+	adrp	x1, .LANCHOR113
+	ldrh	w19, [x23, #:lo12:.LANCHOR24]
+	str	x0, [x1, #:lo12:.LANCHOR113]
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
-	adrp	x22, .LANCHOR92
-	mul	w28, w28, w0
-	mov	w0, w28
+	adrp	x22, .LANCHOR30
+	mul	w19, w19, w0
+	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR123
-	str	x0, [x1, #:lo12:.LANCHOR123]
-	lsl	w0, w28, 2
+	adrp	x1, .LANCHOR114
+	str	x0, [x1, #:lo12:.LANCHOR114]
+	lsl	w0, w19, 2
 	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR124]
-	ldrh	w1, [x19, #:lo12:.LANCHOR24]
-	adrp	x28, .LANCHOR125
-	ldr	w0, [x20, #:lo12:.LANCHOR94]
-	adrp	x20, .LANCHOR6
+	adrp	x19, .LANCHOR6
+	adrp	x1, .LANCHOR115
+	str	x0, [x1, #:lo12:.LANCHOR115]
+	ldrh	w1, [x23, #:lo12:.LANCHOR24]
+	ldr	w0, [x20, #:lo12:.LANCHOR67]
+	adrp	x20, .LANCHOR116
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	str	x0, [x22, #:lo12:.LANCHOR92]
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR65
+	str	x0, [x1, #:lo12:.LANCHOR65]
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x28, #:lo12:.LANCHOR125]
+	strh	w0, [x20, #:lo12:.LANCHOR116]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR126
-	str	x0, [x1, #:lo12:.LANCHOR126]
-	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR117
+	str	x0, [x1, #:lo12:.LANCHOR117]
+	ldrh	w0, [x20, #:lo12:.LANCHOR116]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x28, #:lo12:.LANCHOR125]
+	strh	w0, [x20, #:lo12:.LANCHOR116]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR127
-	ldrh	w28, [x20, #:lo12:.LANCHOR6]
-	str	x0, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR118
+	str	x0, [x1, #:lo12:.LANCHOR118]
 	adrp	x1, .LANCHOR43
-	lsl	w28, w28, 1
 	add	x0, x0, 32
 	str	x0, [x1, #:lo12:.LANCHOR43]
-	mov	w0, w28
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR128
-	str	x0, [x1, #:lo12:.LANCHOR128]
-	mov	w0, w28
-	adrp	x28, .LANCHOR30
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	lsl	w0, w0, 1
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR42]
-	ldr	w1, [x28, #:lo12:.LANCHOR30]
-	lsl	w19, w1, 1
-	mov	w0, w19
+	ldr	w20, [x22, #:lo12:.LANCHOR30]
+	adrp	x1, .LANCHOR42
+	str	x0, [x1, #:lo12:.LANCHOR42]
+	lsl	w20, w20, 1
+	mov	w0, w20
 	bl	ftl_malloc
-	str	x0, [x27, #:lo12:.LANCHOR129]
-	mov	w0, w19
+	adrp	x1, .LANCHOR119
+	str	x0, [x1, #:lo12:.LANCHOR119]
+	mov	w0, w20
 	bl	ftl_malloc
-	str	x0, [x26, #:lo12:.LANCHOR130]
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
-	adrp	x19, .LANCHOR27
+	adrp	x20, .LANCHOR27
+	adrp	x1, .LANCHOR120
+	str	x0, [x1, #:lo12:.LANCHOR120]
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
-	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	ldrh	w0, [x20, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR36
-	str	x0, [x2, #:lo12:.LANCHOR36]
-	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	adrp	x1, .LANCHOR36
+	str	x0, [x1, #:lo12:.LANCHOR36]
+	ldrh	w0, [x20, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x2, .LANCHOR131
-	str	x0, [x2, #:lo12:.LANCHOR131]
-	ldrh	w0, [x19, #:lo12:.LANCHOR27]
-	adrp	x19, .LANCHOR43
+	adrp	x1, .LANCHOR121
+	str	x0, [x1, #:lo12:.LANCHOR121]
+	ldrh	w0, [x20, #:lo12:.LANCHOR27]
+	adrp	x20, .LANCHOR28
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR132
-	str	x0, [x1, #:lo12:.LANCHOR132]
-	adrp	x1, .LANCHOR28
-	str	x1, [x29, 200]
-	ldrh	w0, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR122
+	str	x0, [x1, #:lo12:.LANCHOR122]
+	ldrh	w0, [x20, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldr	x1, [x29, 200]
-	adrp	x2, .LANCHOR133
-	str	x0, [x2, #:lo12:.LANCHOR133]
-	ldrh	w2, [x1, #:lo12:.LANCHOR28]
+	ldrh	w2, [x20, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR123
+	adrp	x20, .LANCHOR33
+	str	x0, [x1, #:lo12:.LANCHOR123]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
@@ -3473,179 +2566,79 @@ FtlMemInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR134
-	str	x0, [x1, #:lo12:.LANCHOR134]
-	ldr	w0, [x28, #:lo12:.LANCHOR30]
-	adrp	x28, .LANCHOR33
+	adrp	x1, .LANCHOR124
+	str	x0, [x1, #:lo12:.LANCHOR124]
+	ldr	w0, [x22, #:lo12:.LANCHOR30]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR135
-	str	x0, [x1, #:lo12:.LANCHOR135]
-	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+	adrp	x1, .LANCHOR125
+	str	x0, [x1, #:lo12:.LANCHOR125]
+	ldrh	w0, [x20, #:lo12:.LANCHOR33]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR55
 	str	x0, [x1, #:lo12:.LANCHOR55]
-	ldrh	w1, [x28, #:lo12:.LANCHOR33]
+	ldrh	w1, [x20, #:lo12:.LANCHOR33]
+	adrp	x20, .LANCHOR10
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
-	adrp	x21, .LANCHOR10
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR136
-	str	x0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
 	mov	w0, 6
-	ldrh	w1, [x20, #:lo12:.LANCHOR6]
-	adrp	x20, .LANCHOR137
+	ldrh	w1, [x19, #:lo12:.LANCHOR6]
+	adrp	x19, .LANCHOR127
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR40
 	str	x0, [x1, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR17
-	ldrh	w1, [x21, #:lo12:.LANCHOR10]
+	ldrh	w1, [x20, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x20, #:lo12:.LANCHOR137]
+	strh	w0, [x19, #:lo12:.LANCHOR127]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldp	x5, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
-	ldrh	w20, [x20, #:lo12:.LANCHOR137]
+	ldrh	w5, [x19, #:lo12:.LANCHOR127]
 	add	x2, x1, :lo12:.LANCHOR37
-	ldp	x11, x14, [x29, 120]
-	mov	w30, w20
-	ldp	x13, x12, [x29, 136]
-	mov	x16, x5
-	ldp	x10, x8, [x29, 152]
-	mov	x5, x24
-	ldp	x7, x6, [x29, 168]
+	ldrh	w7, [x20, #:lo12:.LANCHOR10]
+	add	x6, x2, 40
+	mov	w3, w5
 	str	x0, [x2, 32]
-	ldp	x4, x3, [x29, 184]
-	adrp	x17, .LANCHOR96
-	ldrh	w28, [x21, #:lo12:.LANCHOR10]
-	add	x21, x2, 40
-	adrp	x24, .LANCHOR123
 	mov	x0, 1
-	str	x19, [x29, 200]
-.L377:
-	cmp	w0, w28
-	bcc	.L378
+.L316:
+	cmp	w0, w7
+	bcc	.L317
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
-	mov	x19, 0
-.L379:
-	add	x19, x19, 1
-	cmp	x19, x2
-	bne	.L380
-	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L381
-.L383:
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC84
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC84
-	bl	printf
-	mov	w0, -1
-.L376:
+	mov	x3, 0
+.L318:
+	add	x3, x3, 1
+	cmp	x2, x3
+	bne	.L319
+	mov	w0, 0
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 208
+	ldp	x29, x30, [sp], 64
 	ret
-.L378:
-	ldr	x19, [x2, 32]
+.L317:
+	ldr	x4, [x2, 32]
 	add	w0, w0, 1
-	add	x19, x19, x30, uxtw 2
-	add	w30, w30, w20
-	str	x19, [x21], 8
-	b	.L377
-.L380:
-	add	x20, x0, x19
-	add	x20, x1, x20, lsl 3
-	str	xzr, [x20, 24]
-	b	.L379
-.L381:
-	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR134
-	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR135
-	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR55
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR136
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR40
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR37+32
-	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L383
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	cbz	x0, .L383
-	ldr	x0, [x17, #:lo12:.LANCHOR96]
-	cbz	x0, .L383
-	ldr	x0, [x16, #:lo12:.LANCHOR98]
-	cbz	x0, .L383
-	ldr	x0, [x15, #:lo12:.LANCHOR112]
-	cbz	x0, .L383
-	ldr	x0, [x14, #:lo12:.LANCHOR114]
-	cbz	x0, .L383
-	ldr	x0, [x13, #:lo12:.LANCHOR106]
-	cbz	x0, .L383
-	ldr	x0, [x12, #:lo12:.LANCHOR93]
-	cbz	x0, .L383
-	ldr	x0, [x11, #:lo12:.LANCHOR113]
-	cbz	x0, .L383
-	ldr	x0, [x10, #:lo12:.LANCHOR115]
-	cbz	x0, .L383
-	ldr	x0, [x8, #:lo12:.LANCHOR116]
-	cbz	x0, .L383
-	ldr	x0, [x7, #:lo12:.LANCHOR117]
-	cbz	x0, .L383
-	ldr	x0, [x6, #:lo12:.LANCHOR91]
-	cbz	x0, .L383
-	ldr	x0, [x5, #:lo12:.LANCHOR118]
-	cbz	x0, .L383
-	ldr	x0, [x4, #:lo12:.LANCHOR119]
-	cbz	x0, .L383
-	ldr	x0, [x3, #:lo12:.LANCHOR90]
-	cbz	x0, .L383
-	ldr	x0, [x24, #:lo12:.LANCHOR123]
-	cbz	x0, .L383
-	ldr	x0, [x23, #:lo12:.LANCHOR124]
-	cbz	x0, .L383
-	ldr	x0, [x22, #:lo12:.LANCHOR92]
-	cbz	x0, .L383
-	ldr	x0, [x29, 200]
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR126
-	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR36
-	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR131
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR132
-	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L383
-	adrp	x0, .LANCHOR133
-	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L383
-	mov	w0, 0
-	b	.L376
+	add	x4, x4, x3, uxtw 2
+	add	w3, w3, w5
+	str	x4, [x6], 8
+	b	.L316
+.L319:
+	add	x4, x0, x3
+	add	x4, x1, x4, lsl 3
+	str	xzr, [x4, 24]
+	b	.L318
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -3656,13 +2649,13 @@ FtlBbt2Bitmap:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
-	adrp	x0, .LANCHOR137
+	adrp	x0, .LANCHOR127
 	stp	x23, x24, [sp, 48]
 	adrp	x21, .LANCHOR17
-	adrp	x23, .LANCHOR139
-	ldrh	w2, [x0, #:lo12:.LANCHOR137]
+	adrp	x23, .LANCHOR128
+	ldrh	w2, [x0, #:lo12:.LANCHOR127]
 	add	x21, x21, :lo12:.LANCHOR17
-	add	x23, x23, :lo12:.LANCHOR139
+	add	x23, x23, :lo12:.LANCHOR128
 	stp	x19, x20, [sp, 16]
 	mov	w24, 65535
 	mov	x19, 0
@@ -3671,19 +2664,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L481:
+.L324:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L478
+	beq	.L321
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L480
+	bhi	.L323
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L480:
+.L323:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -3694,8 +2687,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L481
-.L478:
+	bne	.L324
+.L321:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3758,10 +2751,10 @@ ftl_free_no_use_map_blk:
 	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L489:
+.L332:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L493
+	bhi	.L336
 	adrp	x0, .LANCHOR20
 	mov	w23, 0
 	mov	w20, 0
@@ -3769,10 +2762,10 @@ ftl_free_no_use_map_blk:
 	ldrh	w0, [x19]
 	strh	w1, [x21, x0, lsl 1]
 	ldrh	w24, [x21]
-.L494:
+.L337:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L498
+	bhi	.L341
 	mov	w0, w23
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -3780,64 +2773,64 @@ ftl_free_no_use_map_blk:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L493:
+.L336:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L490:
+.L333:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L492
+	bhi	.L335
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L489
-.L492:
+	b	.L332
+.L335:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L491
-	cbz	w2, .L491
+	bne	.L334
+	cbz	w2, .L334
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L491:
+.L334:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L490
-.L498:
+	b	.L333
+.L341:
 	ubfiz	x0, x20, 1, 16
 	ldrh	w1, [x21, x0]
 	cmp	w24, w1
-	bls	.L495
+	bls	.L338
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbnz	w0, .L496
-.L497:
+	cbnz	w0, .L339
+.L340:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L494
-.L495:
-	cbnz	w1, .L497
+	b	.L337
+.L338:
+	cbnz	w1, .L340
 	add	x25, x22, x0
 	ldrh	w0, [x22, x0]
-	cbz	w0, .L497
-.L499:
+	cbz	w0, .L340
+.L342:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	b	.L497
-.L500:
+	b	.L340
+.L343:
 	mov	w24, 0
-	b	.L499
-.L496:
+	b	.L342
+.L339:
 	mov	w23, w20
-	cbz	w1, .L500
+	cbz	w1, .L343
 	mov	w24, w1
-	b	.L497
+	b	.L340
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -3848,66 +2841,66 @@ FtlL2PDataInit:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR130
+	adrp	x19, .LANCHOR120
 	adrp	x20, .LANCHOR30
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR130]
+	ldr	x0, [x19, #:lo12:.LANCHOR120]
 	adrp	x22, .LANCHOR23
 	ldr	w2, [x20, #:lo12:.LANCHOR30]
 	adrp	x21, .LANCHOR33
 	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR136
+	adrp	x23, .LANCHOR126
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR23]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR136]
+	ldr	x0, [x23, #:lo12:.LANCHOR126]
 	bl	ftl_memset
 	adrp	x0, .LANCHOR55
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	ldr	x6, [x23, #:lo12:.LANCHOR136]
+	ldr	x6, [x23, #:lo12:.LANCHOR126]
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.L510:
+.L353:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L511
-	adrp	x1, .LANCHOR140
-	add	x0, x1, :lo12:.LANCHOR140
+	bne	.L354
+	adrp	x1, .LANCHOR129
+	add	x0, x1, :lo12:.LANCHOR129
 	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR140]
+	strh	w2, [x1, #:lo12:.LANCHOR129]
 	ldr	w1, [x20, #:lo12:.LANCHOR30]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR141
+	adrp	x1, .LANCHOR130
 	ldr	x23, [sp, 48]
 	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR141]
+	ldrh	w1, [x1, #:lo12:.LANCHOR130]
 	strh	w1, [x0, 8]
 	adrp	x1, .LANCHOR32
 	ldrh	w1, [x1, #:lo12:.LANCHOR32]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR129
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
+	adrp	x1, .LANCHOR119
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR135
-	ldr	x1, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR125
+	ldr	x1, [x1, #:lo12:.LANCHOR125]
 	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR130]
+	ldr	x1, [x19, #:lo12:.LANCHOR120]
 	ldp	x19, x20, [sp, 16]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR134
-	ldr	x1, [x1, #:lo12:.LANCHOR134]
+	adrp	x1, .LANCHOR124
+	ldr	x1, [x1, #:lo12:.LANCHOR124]
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L511:
+.L354:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -3915,7 +2908,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L510
+	b	.L353
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -3923,19 +2916,19 @@ FtlL2PDataInit:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR142
+	adrp	x0, .LANCHOR131
 	mov	w1, -1
 	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR142]
-	adrp	x0, .LANCHOR143
+	strh	w1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR132
 	mov	w1, -1
 	str	x19, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR144
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR133
 	adrp	x19, .LANCHOR6
-	str	wzr, [x0, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR145
-	str	w1, [x0, #:lo12:.LANCHOR145]
+	str	wzr, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR134
+	str	w1, [x0, #:lo12:.LANCHOR134]
 	adrp	x0, .LANCHOR35
 	mov	w1, 0
 	strh	wzr, [x0, #:lo12:.LANCHOR35]
@@ -3951,10 +2944,10 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR126
+	adrp	x0, .LANCHOR117
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	ldr	x0, [x0, #:lo12:.LANCHOR117]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
@@ -3964,8 +2957,8 @@ FtlVariablesInit:
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -4012,33 +3005,33 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR41]
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.L516:
+.L359:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L523
+	bcs	.L366
 	adrp	x0, .LANCHOR19
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L524
-.L518:
+	b	.L367
+.L361:
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L517
+	cbnz	w0, .L360
 	add	w5, w5, w7
 	and	w5, w5, 65535
-.L517:
+.L360:
 	add	x6, x6, 1
-.L524:
+.L367:
 	cmp	w8, w6, uxth
-	bhi	.L518
-	cbz	w5, .L519
+	bhi	.L361
+	cbz	w5, .L362
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L520:
+.L363:
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
@@ -4046,54 +3039,54 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L521
+	beq	.L364
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L521
+	beq	.L364
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L521
+	beq	.L364
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L522
+	cbnz	w0, .L365
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L521:
+.L364:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L516
-.L519:
+	b	.L359
+.L362:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	b	.L520
-.L522:
+	b	.L363
+.L365:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L521
-.L523:
+	b	.L364
+.L366:
 	strh	w20, [x23, #:lo12:.LANCHOR45]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	cmp	w20, w0
-	ble	.L525
-	adrp	x1, .LANCHOR146
+	ble	.L368
+	adrp	x1, .LANCHOR136
 	adrp	x0, .LC1
-	mov	w2, 2170
-	add	x1, x1, :lo12:.LANCHOR146
+	mov	w2, 2216
+	add	x1, x1, :lo12:.LANCHOR136
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L525:
+.L368:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4109,25 +3102,25 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR95
+	adrp	x0, .LANCHOR68
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR70
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR21
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR96
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR69
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR98
-	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR71
+	ldr	x0, [x0, #:lo12:.LANCHOR71]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -4146,38 +3139,38 @@ FlashGetBadBlockList:
 	mov	w20, w1
 	mov	w1, 255
 	bl	ftl_memset
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR78
 	mov	w1, w20
-	ldr	x2, [x0, #:lo12:.LANCHOR105]
+	ldr	x2, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x19
 	blr	x2
 	and	w0, w0, 65535
 	cmp	w0, 50
-	bls	.L530
+	bls	.L373
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, 0
-.L530:
+.L373:
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L534
+	bne	.L377
 	mov	x1, 0
-.L532:
+.L375:
 	cmp	w0, w1, uxth
-	bhi	.L533
-.L534:
+	bhi	.L376
+.L377:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L533:
+.L376:
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
 	add	x1, x1, 1
-	b	.L532
+	b	.L375
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
@@ -4200,18 +3193,18 @@ FlashReadPages:
 	add	x2, x21, :lo12:.LANCHOR0
 	str	x27, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR147
+	adrp	x24, .LANCHOR137
 	stp	x19, x20, [sp, 16]
 	add	x23, x0, x1
 	ldrh	w27, [x2, 12]
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR147
+	add	x24, x24, :lo12:.LANCHOR137
 	adrp	x25, .LC1
 	add	x25, x25, :lo12:.LC1
-.L538:
+.L381:
 	cmp	x23, x19
-	bne	.L549
+	bne	.L392
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4220,38 +3213,38 @@ FlashReadPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L549:
+.L392:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L539
+	cbz	x0, .L382
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L540
-.L539:
+	cbnz	x0, .L383
+.L382:
 	mov	w2, 90
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L540:
+.L383:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 104]
 	cmp	w0, 3
-	bls	.L541
+	bls	.L384
 	mov	w0, -1
 	str	w0, [x19]
-.L542:
+.L385:
 	add	x19, x19, 32
-	b	.L538
-.L541:
+	b	.L381
+.L384:
 	ldr	x20, [x19, 8]
-	adrp	x26, .LANCHOR120
+	adrp	x26, .LANCHOR111
 	tst	x20, 63
-	beq	.L543
-	ldr	x20, [x26, #:lo12:.LANCHOR120]
-.L543:
-	adrp	x22, .LANCHOR105
-	add	x22, x22, :lo12:.LANCHOR105
+	beq	.L386
+	ldr	x20, [x26, #:lo12:.LANCHOR111]
+.L386:
+	adrp	x22, .LANCHOR78
+	add	x22, x22, :lo12:.LANCHOR78
 	ldr	w1, [x29, 108]
 	mov	x2, x20
 	ldr	x3, [x19, 16]
@@ -4261,7 +3254,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L545
+	bne	.L388
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -4271,40 +3264,40 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L546
+	beq	.L389
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L547
+	bne	.L390
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L547
+	bne	.L390
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L547
-.L546:
+	beq	.L390
+.L389:
 	mov	w1, -1
 	str	w1, [x19]
-.L547:
+.L390:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L545
+	beq	.L388
 	cmp	w0, 256
-	bne	.L545
+	bne	.L388
 	str	w0, [x19]
-.L545:
-	ldr	x0, [x26, #:lo12:.LANCHOR120]
+.L388:
+	ldr	x0, [x26, #:lo12:.LANCHOR111]
 	cmp	x20, x0
-	bne	.L542
+	bne	.L385
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L542
+	beq	.L385
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L542
+	b	.L385
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -4312,11 +3305,11 @@ FlashReadPages:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR115
-	adrp	x0, .LANCHOR148
-	add	x1, x0, :lo12:.LANCHOR148
+	adrp	x2, .LANCHOR106
+	adrp	x0, .LANCHOR138
+	add	x1, x0, :lo12:.LANCHOR138
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	ldr	x2, [x2, #:lo12:.LANCHOR106]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
@@ -4328,18 +3321,18 @@ FtlLoadFactoryBbt:
 	stp	x23, x24, [sp, 48]
 	add	x20, x20, :lo12:.LANCHOR37
 	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR123
+	adrp	x2, .LANCHOR114
 	adrp	x23, .LANCHOR10
 	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR123]
+	ldr	x25, [x2, #:lo12:.LANCHOR114]
 	add	x23, x23, :lo12:.LANCHOR10
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L567:
+.L410:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L572
+	bcc	.L415
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4348,18 +3341,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L572:
+.L415:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
-	add	x24, x22, :lo12:.LANCHOR148
+	add	x24, x22, :lo12:.LANCHOR138
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L568:
+.L411:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L570
+	bgt	.L413
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -4371,19 +3364,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L569
+	beq	.L412
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L569
+	bne	.L412
 	strh	w19, [x20]
-.L570:
+.L413:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L567
-.L569:
+	b	.L410
+.L412:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L568
+	b	.L411
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -4397,15 +3390,15 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L578
+	bne	.L421
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L579:
-	adrp	x1, .LANCHOR121
+.L422:
+	adrp	x1, .LANCHOR112
 	sub	w19, w19, #1
 	sxth	w19, w19
 	lsl	w21, w0, 10
-	ldr	x1, [x1, #:lo12:.LANCHOR121]
+	ldr	x1, [x1, #:lo12:.LANCHOR112]
 	orr	w0, w19, w21
 	str	x1, [x29, 72]
 	add	x1, x29, 96
@@ -4417,24 +3410,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L580
+	bne	.L423
 	mov	w22, 0
 	mov	w24, 2
-.L581:
+.L424:
 	cmp	w22, w19
-	ble	.L584
-.L580:
+	ble	.L427
+.L423:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L578:
+.L421:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L579
-.L584:
+	b	.L422
+.L427:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -4446,20 +3439,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L582
+	bne	.L425
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L582
+	bne	.L425
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L582
+	beq	.L425
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L581
-.L582:
+	b	.L424
+.L425:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L581
+	b	.L424
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -4470,31 +3463,31 @@ FtlScanSysBlk:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR135
+	adrp	x25, .LANCHOR125
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR30
-	ldr	x0, [x25, #:lo12:.LANCHOR135]
-	adrp	x22, .LANCHOR132
+	ldr	x0, [x25, #:lo12:.LANCHOR125]
+	adrp	x22, .LANCHOR122
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR141
+	adrp	x20, .LANCHOR130
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR35
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR129
+	adrp	x27, .LANCHOR119
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR141]
+	strh	wzr, [x20, #:lo12:.LANCHOR130]
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
 	bl	ftl_memset
-	ldr	x0, [x27, #:lo12:.LANCHOR129]
+	ldr	x0, [x27, #:lo12:.LANCHOR119]
 	mov	w1, 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	adrp	x19, .LANCHOR27
 	adrp	x28, .LANCHOR36
-	adrp	x24, .LANCHOR79
+	adrp	x24, .LANCHOR139
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR132]
+	ldr	x0, [x22, #:lo12:.LANCHOR122]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
@@ -4504,9 +3497,9 @@ FtlScanSysBlk:
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	mov	w2, 12
+	mov	w2, 16
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR79
+	add	x0, x24, :lo12:.LANCHOR139
 	bl	ftl_memset
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
@@ -4516,37 +3509,37 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR70
-	add	x0, x0, :lo12:.LANCHOR70
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	str	x0, [x29, 112]
-.L590:
+.L433:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L630
+	bls	.L473
 	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR112
+	adrp	x25, .LANCHOR103
 	adrp	x6, .LANCHOR13
 	mov	x5, 0
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR91
-	ldr	x7, [x25, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR64
+	ldr	x7, [x25, #:lo12:.LANCHOR103]
 	mov	w22, 0
-	ldr	x11, [x0, #:lo12:.LANCHOR91]
-	adrp	x0, .LANCHOR92
+	ldr	x11, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR65
 	add	x6, x6, :lo12:.LANCHOR13
-	ldr	x10, [x0, #:lo12:.LANCHOR92]
+	ldr	x10, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L631
-.L592:
+	b	.L474
+.L435:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L591
+	cbnz	w0, .L434
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -4557,19 +3550,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L591:
+.L434:
 	add	x5, x5, 1
-.L631:
+.L474:
 	cmp	w12, w5, uxth
-	bhi	.L592
-	cbnz	w22, .L593
-.L629:
+	bhi	.L435
+	cbnz	w22, .L436
+.L472:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L590
-.L593:
+	b	.L433
+.L436:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -4577,23 +3570,23 @@ FtlScanSysBlk:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 136]
-.L628:
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
+.L471:
+	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L596
+	bne	.L439
 	mov	w5, 16
 	mov	w7, 65535
-.L598:
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
-	add	x6, x25, :lo12:.LANCHOR112
+.L441:
+	ldr	x0, [x25, #:lo12:.LANCHOR103]
+	add	x6, x25, :lo12:.LANCHOR103
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -4609,135 +3602,135 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L595
+	bne	.L438
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L596
-.L597:
+	bne	.L439
+.L440:
 	mov	w1, 1
-	b	.L667
-.L595:
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
+	b	.L510
+.L438:
+	ldr	x0, [x25, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L596
+	bne	.L439
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L598
-	b	.L597
-.L596:
-	adrp	x0, .LANCHOR70
-	ldr	w1, [x0, #:lo12:.LANCHOR70]
+	bne	.L441
+	b	.L440
+.L439:
+	adrp	x0, .LANCHOR82
+	ldr	w1, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L599
+	beq	.L442
 	cmp	w1, w0
-	bhi	.L600
-.L599:
+	bhi	.L443
+.L442:
 	cmn	w0, #1
-	beq	.L600
+	beq	.L443
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L600:
+.L443:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L602
-	bhi	.L603
+	beq	.L445
+	bhi	.L446
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L604
-.L601:
+	beq	.L447
+.L444:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L628
-	b	.L629
-.L603:
+	bne	.L471
+	b	.L472
+.L446:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L605
+	beq	.L448
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L601
+	bne	.L444
 	mov	w1, 0
-.L667:
+.L510:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L601
-.L605:
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	b	.L444
+.L448:
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L607
+	bls	.L450
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1222
+	mov	w2, 1225
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L607:
+.L450:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
 	sub	w2, w2, #1
-	ldr	x5, [x3, #:lo12:.LANCHOR135]
+	ldr	x5, [x3, #:lo12:.LANCHOR125]
 	sxth	w2, w2
-.L608:
+.L451:
 	cmp	w0, w2
-	bgt	.L614
-	tbz	w0, #31, .L648
-	b	.L601
-.L614:
+	bgt	.L457
+	tbz	w0, #31, .L491
+	b	.L444
+.L457:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L609
+	bls	.L452
 	ldr	w2, [x5]
-	cbnz	w2, .L610
+	cbnz	w2, .L453
 	cmp	w6, w1
-	beq	.L610
+	beq	.L453
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR141]
-.L610:
+	strh	w1, [x20, #:lo12:.LANCHOR130]
+.L453:
 	ldr	x1, [x29, 160]
-	ldr	x6, [x1, #:lo12:.LANCHOR129]
+	ldr	x6, [x1, #:lo12:.LANCHOR119]
 	mov	w1, 0
-.L611:
+.L454:
 	cmp	w1, w0
-	bne	.L612
+	bne	.L455
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L601
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	tbnz	w0, #31, .L444
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L601
-.L648:
+	bgt	.L444
+.L491:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR141]
+	strh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L666:
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
+.L509:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L601
-.L612:
+	b	.L444
+.L455:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -4749,69 +3742,69 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L611
-.L609:
+	b	.L454
+.L452:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L608
-.L604:
+	b	.L451
+.L447:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L617
+	bls	.L460
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1263
+	mov	w2, 1266
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L617:
+.L460:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L618:
+	ldr	x1, [x1, #:lo12:.LANCHOR122]
+.L461:
 	cmp	w0, w5
-	ble	.L623
+	ble	.L466
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L619
+	bls	.L462
 	ldr	w5, [x1]
-	cbnz	w5, .L620
+	cbnz	w5, .L463
 	cmp	w6, w2
-	beq	.L620
+	beq	.L463
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L620:
+.L463:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L621:
+.L464:
 	cmp	w2, w0
-	bne	.L622
+	bne	.L465
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L623:
-	tbnz	w0, #31, .L601
+.L466:
+	tbnz	w0, #31, .L444
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L601
+	bgt	.L444
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L666
-.L622:
+	b	.L509
+.L465:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -4823,61 +3816,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L621
-.L619:
+	b	.L464
+.L462:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L618
-.L602:
-	ldrh	w5, [x24, #:lo12:.LANCHOR79]
+	b	.L461
+.L445:
+	ldrh	w5, [x24, #:lo12:.LANCHOR139]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR79
+	add	x2, x24, :lo12:.LANCHOR139
 	cmp	w5, w1
-	bne	.L625
-	strh	w26, [x24, #:lo12:.LANCHOR79]
+	bne	.L468
+	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w0, [x2, 8]
-	b	.L601
-.L625:
+	b	.L444
+.L468:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L626
+	beq	.L469
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L626:
-	add	x0, x24, :lo12:.LANCHOR79
+.L469:
+	add	x0, x24, :lo12:.LANCHOR139
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L627
-	ldrh	w2, [x24, #:lo12:.LANCHOR79]
+	bcs	.L470
+	ldrh	w2, [x24, #:lo12:.LANCHOR139]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR79]
+	strh	w26, [x24, #:lo12:.LANCHOR139]
 	str	w1, [x0, 8]
-	b	.L601
-.L627:
+	b	.L444
+.L470:
 	strh	w26, [x0, 4]
-	b	.L601
-.L630:
+	b	.L444
+.L473:
 	ldr	x0, [x29, 160]
-	ldr	x2, [x0, #:lo12:.LANCHOR129]
+	ldr	x2, [x0, #:lo12:.LANCHOR119]
 	ldrh	w0, [x2]
-	cbz	w0, .L632
-.L635:
+	cbz	w0, .L475
+.L478:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L633
-.L634:
-	ldrh	w1, [x20, #:lo12:.LANCHOR141]
+	cbz	w0, .L476
+.L477:
+	ldrh	w1, [x20, #:lo12:.LANCHOR130]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L664
-	adrp	x1, .LANCHOR149
+	bls	.L507
+	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
-	mov	w2, 1388
-	add	x1, x1, :lo12:.LANCHOR149
+	mov	w2, 1391
+	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L664:
+.L507:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4886,24 +3879,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L632:
-	ldrh	w0, [x20, #:lo12:.LANCHOR141]
-	cbz	w0, .L635
+.L475:
+	ldrh	w0, [x20, #:lo12:.LANCHOR130]
+	cbz	w0, .L478
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L636:
+.L479:
 	cmp	w0, w1
-	bcs	.L635
+	bcs	.L478
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L637
+	cbz	w3, .L480
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
-	ldr	x4, [x1, #:lo12:.LANCHOR135]
+	ldr	x4, [x1, #:lo12:.LANCHOR125]
 	mov	w1, w0
-.L638:
+.L481:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L635
+	bcs	.L478
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -4915,29 +3908,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L638
-.L637:
+	b	.L481
+.L480:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L636
-.L633:
+	b	.L479
+.L476:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L634
+	cbz	w0, .L477
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L643:
+.L486:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L634
+	bge	.L477
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L644
+	cbz	w3, .L487
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
-	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.L645:
+	ldr	x3, [x2, #:lo12:.LANCHOR122]
+.L488:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L634
+	bge	.L477
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -4949,11 +3942,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L645
-.L644:
+	b	.L488
+.L487:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L643
+	b	.L486
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -4963,29 +3956,29 @@ FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR115
+	adrp	x23, .LANCHOR106
 	stp	x19, x20, [sp, 16]
 	adrp	x24, .LANCHOR17
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR148
-	add	x20, x22, :lo12:.LANCHOR148
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	adrp	x22, .LANCHOR138
+	add	x20, x22, :lo12:.LANCHOR138
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	str	x25, [sp, 64]
 	mov	w25, 61649
 	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR123
-	ldr	x21, [x0, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR114
+	ldr	x21, [x0, #:lo12:.LANCHOR114]
 	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L669:
+.L512:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L672
+	bgt	.L515
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -4994,7 +3987,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L670
+	bne	.L513
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -5002,13 +3995,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L670:
+.L513:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L671
+	beq	.L514
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L671
+	bne	.L514
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -5016,39 +4009,39 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L672:
+.L515:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L686
+	beq	.L529
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L676
-	add	x0, x22, :lo12:.LANCHOR148
+	beq	.L519
+	add	x0, x22, :lo12:.LANCHOR138
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR148]
+	ldr	w0, [x22, #:lo12:.LANCHOR138]
 	cmn	w0, #1
-	beq	.L676
+	beq	.L519
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L676
+	bne	.L519
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L676
+	bls	.L519
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L676:
+.L519:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -5057,81 +4050,81 @@ FtlLoadBbt:
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR148
-.L678:
-	tbz	w20, #31, .L681
-	adrp	x1, .LANCHOR150
+	add	x24, x22, :lo12:.LANCHOR138
+.L521:
+	tbz	w20, #31, .L524
+	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
 	mov	w2, 253
-	add	x1, x1, :lo12:.LANCHOR150
+	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L680:
+.L523:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L683
+	beq	.L526
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L683
+	beq	.L526
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L683
+	bcs	.L526
 	cmp	w0, w1
-	bcs	.L683
+	bcs	.L526
 	bl	FtlSysBlkNumInit
-.L683:
+.L526:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
-	adrp	x23, .LANCHOR137
+	adrp	x23, .LANCHOR127
 	add	x19, x19, 32
 	add	x21, x21, :lo12:.LANCHOR10
-	add	x23, x23, :lo12:.LANCHOR137
-	add	x22, x22, :lo12:.LANCHOR148
+	add	x23, x23, :lo12:.LANCHOR127
+	add	x22, x22, :lo12:.LANCHOR138
 	mov	w20, 0
-.L684:
+.L527:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L685
+	bcc	.L528
 	mov	w0, 0
-.L668:
+.L511:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L671:
+.L514:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L669
-.L681:
+	b	.L512
+.L524:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	ldr	x0, [x23, #:lo12:.LANCHOR106]
 	str	x0, [x24, 8]
 	mov	x0, x24
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L679
+	beq	.L522
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L680
-.L679:
+	beq	.L523
+.L522:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L678
-.L685:
+	b	.L521
+.L528:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -5140,284 +4133,11 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L684
-.L686:
+	b	.L527
+.L529:
 	mov	w0, -1
-	b	.L668
+	b	.L511
 	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadSysInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadSysInfo
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	stp	x29, x30, [sp, -96]!
-	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR148
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR115
-	stp	x21, x22, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR148
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR123
-	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR42
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	adrp	x24, .LANCHOR5
-	str	x0, [x21, 8]
-	adrp	x20, .LANCHOR79
-	ldr	x0, [x26, #:lo12:.LANCHOR123]
-	str	x0, [x21, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	mov	w1, 65535
-	cmp	w0, w1
-	bne	.L699
-.L707:
-	mov	w0, -1
-.L698:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L699:
-	add	x27, x20, :lo12:.LANCHOR79
-	mov	w1, 1
-	bl	FtlGetLastWrittenPage
-	sxth	w22, w0
-	add	w0, w0, 1
-	mov	w28, 61604
-	strh	w0, [x27, 2]
-	mov	w27, 19539
-	movk	w27, 0x4654, lsl 16
-.L701:
-	tbz	w22, #31, .L704
-	adrp	x1, .LANCHOR151
-	adrp	x0, .LC1
-	mov	w2, 1448
-	add	x1, x1, :lo12:.LANCHOR151
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L703:
-	adrp	x1, .LANCHOR23
-	ldrh	w0, [x24, #:lo12:.LANCHOR5]
-	ldrh	w1, [x1, #:lo12:.LANCHOR23]
-	add	x0, x0, 24
-	cmp	x1, x0, lsl 1
-	bcs	.L706
-	adrp	x1, .LANCHOR151
-	adrp	x0, .LC1
-	mov	w2, 1450
-	add	x1, x1, :lo12:.LANCHOR151
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L706:
-	add	x22, x19, :lo12:.LANCHOR148
-	adrp	x19, .LANCHOR39
-	add	x21, x19, :lo12:.LANCHOR39
-	mov	w2, 48
-	mov	x0, x21
-	ldr	x1, [x22, 8]
-	bl	ftl_memcpy
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	ldr	x1, [x22, 8]
-	lsl	w2, w2, 1
-	add	x1, x1, 48
-	bl	ftl_memcpy
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	ldr	x0, [x22, 8]
-	lsr	w2, w1, 3
-	ubfiz	x1, x1, 1, 16
-	add	x1, x1, 48
-	add	w2, w2, 4
-	and	x1, x1, -4
-	add	x1, x0, x1
-	adrp	x0, .LANCHOR1
-	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	bl	ftl_memcpy
-	ldr	w1, [x19, #:lo12:.LANCHOR39]
-	mov	w0, 19539
-	movk	w0, 0x4654, lsl 16
-	cmp	w1, w0
-	bne	.L707
-	add	x20, x20, :lo12:.LANCHOR79
-	adrp	x0, .LANCHOR10
-	ldrh	w1, [x21, 8]
-	ldrb	w2, [x21, 10]
-	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	strh	w1, [x20, 6]
-	cmp	w2, w0
-	bne	.L707
-	adrp	x0, .LANCHOR152
-	adrp	x2, .LANCHOR61
-	adrp	x3, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR19
-	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR61]
-	adrp	x2, .LANCHOR12
-	ldrh	w2, [x2, #:lo12:.LANCHOR12]
-	mul	w0, w2, w0
-	adrp	x2, .LANCHOR34
-	str	w0, [x2, #:lo12:.LANCHOR34]
-	adrp	x0, .LANCHOR7
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LANCHOR37+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	cmp	w1, w2
-	sub	w0, w2, w0
-	sub	w0, w0, w1
-	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR78
-	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L708
-	adrp	x1, .LANCHOR151
-	adrp	x0, .LC1
-	mov	w2, 1472
-	add	x1, x1, :lo12:.LANCHOR151
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L708:
-	add	x1, x19, :lo12:.LANCHOR39
-	adrp	x0, .LANCHOR51
-	add	x3, x0, :lo12:.LANCHOR51
-	adrp	x20, .LANCHOR80
-	ldrh	w2, [x1, 16]
-	ldrh	w6, [x1, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR51]
-	lsr	w4, w2, 6
-	and	w2, w2, 63
-	strb	w2, [x3, 6]
-	ldrb	w2, [x1, 11]
-	strb	w2, [x3, 8]
-	add	x2, x20, :lo12:.LANCHOR80
-	strh	w4, [x3, 2]
-	mov	w3, -1
-	strh	w3, [x20, #:lo12:.LANCHOR80]
-	strh	wzr, [x2, 2]
-	strb	wzr, [x2, 6]
-	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR52
-	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR52
-	strh	w3, [x2, #:lo12:.LANCHOR52]
-	mov	x21, x2
-	ldrh	w3, [x1, 20]
-	lsr	w5, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x4, 6]
-	ldrb	w3, [x1, 12]
-	strh	w5, [x4, 2]
-	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR53
-	ldrh	w3, [x1, 22]
-	add	x5, x4, :lo12:.LANCHOR53
-	strh	w3, [x4, #:lo12:.LANCHOR53]
-	mov	x22, x4
-	ldrh	w3, [x1, 24]
-	lsr	w7, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x5, 6]
-	ldrb	w3, [x1, 13]
-	strb	w3, [x5, 8]
-	adrp	x3, .LANCHOR67
-	strh	w7, [x5, 2]
-	ldr	w5, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR67]
-	adrp	x3, .LANCHOR64
-	str	wzr, [x3, #:lo12:.LANCHOR64]
-	adrp	x3, .LANCHOR62
-	str	wzr, [x3, #:lo12:.LANCHOR62]
-	adrp	x3, .LANCHOR66
-	str	wzr, [x3, #:lo12:.LANCHOR66]
-	adrp	x3, .LANCHOR72
-	str	w5, [x3, #:lo12:.LANCHOR72]
-	adrp	x3, .LANCHOR73
-	str	wzr, [x3, #:lo12:.LANCHOR73]
-	adrp	x3, .LANCHOR76
-	str	wzr, [x3, #:lo12:.LANCHOR76]
-	adrp	x3, .LANCHOR65
-	str	wzr, [x3, #:lo12:.LANCHOR65]
-	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR70
-	ldr	w5, [x1, #:lo12:.LANCHOR70]
-	cmp	w3, w5
-	bls	.L709
-	str	w3, [x1, #:lo12:.LANCHOR70]
-.L709:
-	add	x19, x19, :lo12:.LANCHOR39
-	adrp	x1, .LANCHOR71
-	ldr	w3, [x1, #:lo12:.LANCHOR71]
-	ldr	w2, [x19, 36]
-	cmp	w2, w3
-	bls	.L710
-	str	w2, [x1, #:lo12:.LANCHOR71]
-.L710:
-	mov	w1, 65535
-	cmp	w6, w1
-	beq	.L711
-	add	x0, x0, :lo12:.LANCHOR51
-	bl	make_superblock
-.L711:
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
-	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR52
-	cmp	w2, w1
-	beq	.L712
-	bl	make_superblock
-.L712:
-	ldrh	w2, [x22, #:lo12:.LANCHOR53]
-	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR53
-	cmp	w2, w1
-	beq	.L713
-	bl	make_superblock
-.L713:
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR80
-	cmp	w2, w1
-	beq	.L714
-	bl	make_superblock
-.L714:
-	mov	w0, 0
-	b	.L698
-.L704:
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x21, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	str	x0, [x21, 8]
-	mov	x0, x21
-	bl	FlashReadPages
-	ldr	w0, [x21]
-	cmn	w0, #1
-	beq	.L702
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L702
-	ldr	x0, [x26, #:lo12:.LANCHOR123]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	beq	.L703
-.L702:
-	sub	w22, w22, #1
-	sxth	w22, w22
-	b	.L701
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
 	.global	FlashProgPages
@@ -5429,34 +4149,34 @@ FlashProgPages:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR0
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR153
+	adrp	x22, .LANCHOR142
 	stp	w3, w2, [x29, 104]
 	add	x2, x21, :lo12:.LANCHOR0
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR105
+	adrp	x24, .LANCHOR78
 	stp	x27, x28, [sp, 80]
 	mov	x19, x0
 	ldrh	w23, [x2, 12]
 	add	x20, x0, x1
 	stp	x25, x26, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR153
+	add	x22, x22, :lo12:.LANCHOR142
 	mov	x25, x0
-	add	x28, x24, :lo12:.LANCHOR105
+	add	x28, x24, :lo12:.LANCHOR78
 	lsl	w27, w23, 3
-.L721:
+.L542:
 	cmp	x25, x20
-	bne	.L734
+	bne	.L555
 	ldr	w0, [x29, 104]
-	cbz	w0, .L747
-	adrp	x21, .LANCHOR120
-	adrp	x22, .LANCHOR122
+	cbz	w0, .L568
+	adrp	x21, .LANCHOR111
+	adrp	x22, .LANCHOR113
 	mov	x23, x21
 	mov	x24, x22
-.L736:
+.L557:
 	cmp	x19, x20
-	beq	.L747
-	ldr	x1, [x21, #:lo12:.LANCHOR120]
-	ldr	x0, [x22, #:lo12:.LANCHOR122]
+	beq	.L568
+	ldr	x1, [x21, #:lo12:.LANCHOR111]
+	ldr	x0, [x22, #:lo12:.LANCHOR113]
 	str	wzr, [x1]
 	str	wzr, [x0]
 	stp	x1, x0, [x29, 136]
@@ -5468,78 +4188,78 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L737
+	bne	.L558
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
 	bl	printf
 	str	w26, [x19]
-.L737:
+.L558:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L738
+	cbz	x0, .L559
 	ldr	w2, [x0]
-	ldr	x0, [x24, #:lo12:.LANCHOR122]
+	ldr	x0, [x24, #:lo12:.LANCHOR113]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L738
+	beq	.L559
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L738:
+.L559:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L739
+	cbz	x0, .L560
 	ldr	w2, [x0]
-	ldr	x0, [x23, #:lo12:.LANCHOR120]
+	ldr	x0, [x23, #:lo12:.LANCHOR111]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L739
+	beq	.L560
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L739:
+.L560:
 	add	x19, x19, 32
-	b	.L736
-.L734:
+	b	.L557
+.L555:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L722
+	cbz	x0, .L543
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L723
-.L722:
+	cbnz	x0, .L544
+.L543:
 	adrp	x0, .LC1
 	mov	w2, 134
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L723:
+.L544:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
 	cmp	w0, 3
-	bls	.L724
-.L760:
+	bls	.L545
+.L581:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L725
-.L724:
-	cbnz	w0, .L726
+	b	.L546
+.L545:
+	cbnz	w0, .L547
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L726
-	adrp	x21, .LANCHOR153
-	adrp	x22, .LC79
+	bls	.L547
+	adrp	x21, .LANCHOR142
+	adrp	x22, .LC6
 	mov	w23, -1
-	add	x21, x21, :lo12:.LANCHOR153
-	add	x22, x22, :lo12:.LC79
-	b	.L758
-.L728:
+	add	x21, x21, :lo12:.LANCHOR142
+	add	x22, x22, :lo12:.LC6
+	b	.L579
+.L549:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -5549,19 +4269,19 @@ FlashProgPages:
 	ldr	x1, [x19, -24]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	rknand_print_hex
 	ldr	x1, [x19, -16]
 	mov	w3, 4
-	adrp	x0, .LC81
+	adrp	x0, .LC8
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC8
 	bl	rknand_print_hex
-.L758:
+.L579:
 	cmp	x19, x20
-	bne	.L728
-.L747:
+	bne	.L549
+.L568:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5570,34 +4290,34 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L726:
+.L547:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L741
-	adrp	x0, .LANCHOR120
-	ldr	x26, [x0, #:lo12:.LANCHOR120]
+	beq	.L562
+	adrp	x0, .LANCHOR111
+	ldr	x26, [x0, #:lo12:.LANCHOR111]
 	cmp	x1, x26
-	beq	.L729
+	beq	.L550
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L729:
-	add	x0, x24, :lo12:.LANCHOR105
+.L550:
+	add	x0, x24, :lo12:.LANCHOR78
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
 	mov	x2, x26
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L730
+	cbnz	w0, .L551
 	str	wzr, [x25]
-.L731:
+.L552:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L725
+	bne	.L546
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -5606,17 +4326,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbnz	w0, .L760
-.L725:
+	cbnz	w0, .L581
+.L546:
 	add	x25, x25, 32
-	b	.L721
-.L741:
+	b	.L542
+.L562:
 	mov	x26, x1
-	b	.L729
-.L730:
+	b	.L550
+.L551:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L731
+	b	.L552
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -5630,77 +4350,77 @@ FtlLowFormatEraseBlock:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 65535
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR99
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR3
 	stp	x25, x26, [sp, 64]
 	and	w22, w1, 255
-	str	w23, [x0, #:lo12:.LANCHOR111]
-	adrp	x21, .LANCHOR106
-	adrp	x0, .LANCHOR119
-	adrp	x1, .LANCHOR124
+	str	w23, [x0, #:lo12:.LANCHOR99]
+	adrp	x21, .LANCHOR79
+	adrp	x0, .LANCHOR110
+	adrp	x1, .LANCHOR115
 	adrp	x25, .LANCHOR24
 	ldrh	w8, [x20, #:lo12:.LANCHOR3]
-	ldr	x6, [x21, #:lo12:.LANCHOR106]
+	ldr	x6, [x21, #:lo12:.LANCHOR79]
 	mov	w24, 0
-	ldr	x10, [x0, #:lo12:.LANCHOR119]
+	ldr	x10, [x0, #:lo12:.LANCHOR110]
 	mov	w19, 0
-	ldr	x11, [x1, #:lo12:.LANCHOR124]
+	ldr	x11, [x1, #:lo12:.LANCHOR115]
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L762:
+.L583:
 	cmp	w8, w5, uxth
-	bhi	.L766
-	cbz	w24, .L761
+	bhi	.L587
+	cbz	w24, .L582
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L770:
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+.L591:
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L769
+	bne	.L590
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L769:
+.L590:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L770
-	cbz	w22, .L783
+	bne	.L591
+	cbz	w22, .L604
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L771:
+.L592:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L779:
+.L600:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR106]
+	ldr	x6, [x21, #:lo12:.LANCHOR79]
 	mov	w20, 0
 	ldrh	w11, [x25, #:lo12:.LANCHOR24]
 	ldrh	w7, [x0]
-	adrp	x0, .LANCHOR118
-	ldr	x8, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR109
+	ldr	x8, [x0, #:lo12:.LANCHOR109]
 	ldr	x0, [x29, 112]
-	ldr	x10, [x0, #:lo12:.LANCHOR119]
-.L772:
+	ldr	x10, [x0, #:lo12:.LANCHOR110]
+.L593:
 	cmp	w7, w5, uxth
-	bhi	.L775
-	cbz	w20, .L761
+	bhi	.L596
+	cbz	w20, .L582
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -5708,11 +4428,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L778:
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+.L599:
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L777
+	cbz	w0, .L598
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -5720,36 +4440,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L777:
+.L598:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L778
+	bne	.L599
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L779
+	bhi	.L600
 	mov	x24, 0
-.L781:
-	cbz	w22, .L780
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+.L602:
+	cbz	w22, .L601
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L780
+	cbnz	w0, .L601
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L780:
+.L601:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L781
+	bne	.L602
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L761
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	beq	.L582
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L761:
+.L582:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5758,7 +4478,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L766:
+.L587:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5766,13 +4486,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L763
+	cbz	w22, .L584
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L764
-.L763:
+	cbnz	w0, .L585
+.L584:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L765
+	cbnz	w0, .L586
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -5783,18 +4503,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L764:
+.L585:
 	add	x5, x5, 1
-	b	.L762
-.L765:
+	b	.L583
+.L586:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L764
-.L783:
+	b	.L585
+.L604:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L771
-.L775:
+	b	.L592
+.L596:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5803,13 +4523,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L773
+	cbz	w22, .L594
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L774
-.L773:
+	cbnz	w0, .L595
+.L594:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L774
+	cbnz	w0, .L595
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -5820,302 +4540,214 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L774:
+.L595:
 	add	x5, x5, 1
-	b	.L772
+	b	.L593
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
-	.global	Ftl_write_map_blk_to_last_page
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	stp	x29, x30, [sp, -64]!
-	mov	w1, 65535
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x20, [x0, 16]
-	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
-	str	x23, [sp, 48]
-	cmp	w0, w1
-	bne	.L805
-	ldrh	w0, [x19, 8]
-	cbz	w0, .L806
-	adrp	x1, .LANCHOR154
-	adrp	x0, .LC1
-	mov	w2, 641
-	add	x1, x1, :lo12:.LANCHOR154
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L806:
-	ldrh	w0, [x19, 8]
-	add	w0, w0, 1
-	strh	w0, [x19, 8]
-	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x20]
-	ldr	w0, [x19, 48]
-	strh	wzr, [x19, 2]
-	add	w0, w0, 1
-	strh	wzr, [x19]
-	str	w0, [x19, 48]
-.L807:
-	mov	w0, 0
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L805:
-	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR123
-	adrp	x23, .LANCHOR115
-	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR123]
-	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR148
-	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR148
-	orr	w0, w0, w21, lsl 10
-	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	str	x1, [x2, 16]
-	str	x0, [x2, 8]
-	ldr	w2, [x19, 48]
-	str	w2, [x1, 4]
-	mov	w2, -1291
-	strh	w2, [x1, 8]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1]
-	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR20
-	ldrh	w2, [x1, #:lo12:.LANCHOR20]
-	mov	w1, 255
-	lsl	w2, w2, 3
+	and	w19, w0, 65535
+	cmp	w19, 11
+	bls	.L628
+	adrp	x20, .LANCHOR112
+	mov	w2, 32
+	mov	w1, 165
+	lsl	w19, w19, 10
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	str	x0, [x29, 40]
+	add	x0, x29, 64
+	str	x0, [x29, 48]
 	bl	ftl_memset
-	ldrh	w4, [x19, 6]
-	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR115]
-	mov	w2, 0
-.L808:
-	cmp	w4, w1, uxth
-	bhi	.L810
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	str	w19, [x29, 36]
 	mov	w2, 1
-	mov	w3, 0
+	add	x0, x29, 32
 	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR148
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	b	.L807
-.L810:
-	ldr	w0, [x22, x1, lsl 2]
-	cmp	w21, w0, lsr 10
-	bne	.L809
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	ubfiz	x0, x2, 1, 16
-	str	w1, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	ldr	w5, [x22, x1, lsl 2]
-	str	w5, [x3, x0, lsl 2]
-.L809:
-	add	x1, x1, 1
-	b	.L808
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",@progbits
-	.align	2
-	.global	FtlMapWritePage
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR66
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR155
-	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR20
-	stp	x19, x20, [sp, 16]
-	mov	w25, w1
-	mov	x19, x0
-	mov	x27, x2
-	add	x23, x23, :lo12:.LANCHOR66
-	add	x24, x24, :lo12:.LANCHOR155
-	add	x28, x26, :lo12:.LANCHOR20
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-.L816:
-	ldr	w0, [x23]
-	ldrh	w1, [x19, 2]
-	add	w0, w0, 1
-	str	w0, [x23]
-	ldrh	w0, [x26, #:lo12:.LANCHOR20]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	bge	.L817
-	ldrh	w1, [x19]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L818
-.L817:
-	mov	x0, x19
-	bl	Ftl_write_map_blk_to_last_page
-.L818:
-	ldrh	w1, [x19]
-	ldr	x0, [x19, 16]
-	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L819
-	adrp	x0, .LC1
-	mov	w2, 699
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L819:
-	ldrh	w1, [x19]
-	ldrh	w0, [x19, 10]
-	cmp	w1, w0
-	bcc	.L820
-	adrp	x0, .LC1
-	mov	w2, 700
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L820:
-	ldrh	w1, [x19]
-	adrp	x21, .LANCHOR148
-	ldr	x0, [x19, 16]
-	add	x20, x21, :lo12:.LANCHOR148
-	mov	w2, 16
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	w1, 0
-	ldrh	w0, [x19, 2]
-	str	w3, [x29, 108]
-	str	x27, [x20, 8]
-	orr	w0, w0, w3, lsl 10
-	str	w0, [x20, 4]
-	adrp	x0, .LANCHOR123
-	ldr	x0, [x0, #:lo12:.LANCHOR123]
-	str	x0, [x20, 16]
-	bl	ftl_memset
-	ldr	x0, [x20, 16]
-	ldr	w1, [x19, 48]
-	ldr	w3, [x29, 108]
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	strh	w1, [x0]
-	strh	w3, [x0, 2]
+	bl	FlashEraseBlocks
 	mov	w3, 1
-	strh	w25, [x0, 8]
+	add	x0, x29, 32
+	mov	w2, w3
 	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x29, 32]
+	cbnz	w0, .L629
+	add	w0, w19, 1
+	mov	w3, 1
+	str	w0, [x29, 36]
 	mov	w2, w3
-	mov	x0, x20
+	mov	w1, w3
+	add	x0, x29, 32
 	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x21, #:lo12:.LANCHOR148]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x19, 2]
-	cmn	w1, #1
-	bne	.L821
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	bl	printf
-	ldrh	w0, [x19, 2]
-	cmp	w0, 2
-	bhi	.L822
-	ldrh	w0, [x28]
-	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L822:
-	cmp	w22, 3
-	bls	.L823
-	add	x21, x21, :lo12:.LANCHOR148
-	adrp	x0, .LC89
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC89
-	ldr	w1, [x21, 4]
-	bl	printf
-.L824:
-	b	.L824
-.L823:
-	ldr	w0, [x19, 52]
-	cbz	w0, .L816
-.L838:
-	b	.L838
-.L821:
-	cmp	w0, 1
-	beq	.L827
-	cmp	w1, 256
-	beq	.L827
-	ldr	w0, [x19, 56]
-	cbz	w0, .L828
-.L827:
-	str	wzr, [x19, 56]
-	b	.L816
-.L828:
-	ldr	x0, [x19, 40]
-	ldr	w1, [x20, 4]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x27, x28, [sp, 80]
-	str	w1, [x0, w25, uxtw 2]
+	ldr	w0, [x29, 32]
+	cmp	w0, 0
+	csetm	w20, ne
+.L627:
+	mov	w2, 1
+	mov	w1, 0
+	add	x0, x29, 32
+	str	w19, [x29, 36]
+	bl	FlashEraseBlocks
+.L625:
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.load_l2p_region,"ax",@progbits
+.L629:
+	mov	w20, -1
+	b	.L627
+.L628:
+	mov	w20, 0
+	b	.L625
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR32
+	adrp	x23, .LANCHOR114
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
+	adrp	x20, .LANCHOR138
 	stp	x21, x22, [sp, 32]
-	and	x19, x1, 65535
-	ldrh	w0, [x24, #:lo12:.LANCHOR32]
+	add	x19, x20, :lo12:.LANCHOR138
+	adrp	x22, .LANCHOR106
+	ldr	x1, [x23, #:lo12:.LANCHOR114]
 	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR37
 	str	x27, [sp, 80]
-	cmp	w0, w20
-	bcs	.L841
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC1
-	mov	w2, 485
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L841:
-	adrp	x27, .LANCHOR134
-	ubfiz	x0, x20, 2, 16
-	adrp	x22, .LANCHOR55
-	ldr	x1, [x27, #:lo12:.LANCHOR134]
-	ldr	w23, [x1, x0]
-	cbnz	w23, .L842
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
+	add	x25, x21, :lo12:.LANCHOR37
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	adrp	x26, .LANCHOR10
+	stp	x0, x1, [x19, 8]
 	adrp	x1, .LANCHOR23
-	add	x0, x0, x19
+	adrp	x27, .LANCHOR127
+	add	x25, x25, 32
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR10
+	add	x27, x27, :lo12:.LANCHOR127
+	mov	w1, 0
+	bl	ftl_memset
+.L632:
+	ldrh	w0, [x26]
+	cmp	w24, w0
+	blt	.L633
+	add	x20, x20, :lo12:.LANCHOR138
+	add	x19, x21, :lo12:.LANCHOR37
+	mov	w2, 16
 	mov	w1, 255
-	ldr	x0, [x0, 8]
+	adrp	x24, .LC14
+	adrp	x26, .LANCHOR20
+	ldr	x27, [x20, 16]
+	add	x24, x24, :lo12:.LC14
+	add	x26, x26, :lo12:.LANCHOR20
+	mov	w25, 0
+	mov	x0, x27
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	strh	w20, [x0, x19]
-	str	wzr, [x1, 4]
-.L843:
+	mov	w0, -3887
+	strh	w0, [x27]
+	ldr	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x21, #:lo12:.LANCHOR37]
+	mov	w21, 0
+	strh	w0, [x27, 2]
+	ldrh	w0, [x19, 4]
+	strh	w0, [x27, 8]
+	ldrh	w0, [x19, 6]
+	strh	w0, [x27, 10]
+	adrp	x0, .LANCHOR2
+	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	strh	w0, [x27, 12]
+.L634:
+	ldrh	w1, [x19]
+	ldrh	w4, [x27, 10]
+	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 4]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x20, 8]
+	ldr	x0, [x23, #:lo12:.LANCHOR114]
+	str	x0, [x20, 16]
+	orr	w0, w2, w1, lsl 10
+	str	wzr, [x20]
+	str	w0, [x20, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x26]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L635
+	ldr	w0, [x19, 8]
+	mov	w2, 1
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x19]
+	strh	w0, [x27, 8]
+	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR79
+	strh	w1, [x19]
+	lsl	w1, w1, 10
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	str	w1, [x20, 4]
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.L635:
+	mov	w3, 1
+	mov	x0, x20
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L636
+	ldr	w1, [x20, 4]
+	add	w21, w21, 1
+	adrp	x0, .LC15
+	and	w21, w21, 65535
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+	cmp	w21, 3
+	bls	.L634
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC16
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L638:
+	b	.L638
+.L633:
+	ldrh	w2, [x27]
+	ldr	x1, [x25], 8
+	ldr	x0, [x19, 8]
+	mul	w3, w24, w2
+	lsl	w2, w2, 2
+	add	w24, w24, 1
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+	b	.L632
+.L639:
+	mov	w25, 1
+	b	.L634
+.L636:
+	cbz	w25, .L639
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6124,1448 +4756,1183 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L842:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
-	adrp	x26, .LANCHOR148
-	add	x21, x26, :lo12:.LANCHOR148
-	add	x0, x0, x19
-	mov	w2, 1
-	mov	w1, w2
-	str	w23, [x21, 4]
-	ldr	x0, [x0, 8]
-	str	x0, [x21, 8]
-	adrp	x0, .LANCHOR123
-	ldr	x0, [x0, #:lo12:.LANCHOR123]
-	str	x0, [x21, 16]
-	mov	x0, x21
-	bl	FlashReadPages
-	ldr	x25, [x21, 16]
-	ldrh	w0, [x25, 8]
-	cmp	w0, w20
-	beq	.L844
-	mov	w2, w23
-	mov	w1, w20
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
-	bl	printf
-	ldr	x1, [x21, 16]
-	mov	w3, 4
-	adrp	x0, .LC91
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC91
-	bl	rknand_print_hex
-	ldrh	w3, [x24, #:lo12:.LANCHOR32]
-	adrp	x0, .LC92
-	ldr	x1, [x27, #:lo12:.LANCHOR134]
-	mov	w2, 4
-	add	x0, x0, :lo12:.LC92
-	bl	rknand_print_hex
-.L845:
-	ldrh	w0, [x25, 8]
-	cmp	w0, w20
-	beq	.L846
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC1
-	mov	w2, 508
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L846:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	str	wzr, [x1, 4]
-	strh	w20, [x0, x19]
-	b	.L843
-.L844:
-	ldr	w0, [x26, #:lo12:.LANCHOR148]
-	cmp	w0, 256
-	bne	.L845
-	mov	w2, w23
-	mov	w1, w20
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	mov	w1, w20
-	add	x0, x0, x19
-	ldr	x2, [x0, 8]
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
-	bl	FtlMapWritePage
-	b	.L845
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
-	.global	ftl_map_blk_gc
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	stp	x29, x30, [sp, -96]!
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	adrp	x28, .LANCHOR48
+	stp	x23, x24, [sp, 48]
+	add	x24, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
+	adrp	x27, .LANCHOR45
 	mov	x19, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR20
-	stp	x25, x26, [sp, 64]
 	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	ldr	x20, [x0, 16]
-	ldr	x25, [x0, 40]
-	bl	ftl_free_no_use_map_blk
-	ldrh	w1, [x19, 10]
-	ldrh	w2, [x19, 8]
-	sub	w1, w1, #5
-	cmp	w2, w1
-	blt	.L849
-	ubfiz	x0, x0, 1, 16
-	ldrh	w22, [x20, x0]
-	cbz	w22, .L849
-	ldr	w1, [x19, 52]
-	cbnz	w1, .L849
-	mov	w1, 1
-	str	w1, [x19, 52]
-	strh	wzr, [x20, x0]
-	ldrh	w0, [x19, 8]
-	ldrh	w1, [x19, 2]
-	sub	w0, w0, #1
-	strh	w0, [x19, 8]
-	ldrh	w0, [x24, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L850
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L850:
-	adrp	x26, .LANCHOR148
-	adrp	x23, .LANCHOR157
-	add	x27, x26, :lo12:.LANCHOR148
-	add	x23, x23, :lo12:.LANCHOR157
-	mov	w20, 0
-.L851:
-	ldrh	w0, [x19, 6]
-	cmp	w0, w20
-	bhi	.L858
-	mov	w1, 1
-	mov	w0, w22
-	bl	FtlFreeSysBlkQueueIn
-	str	wzr, [x19, 52]
-.L849:
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x24, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L859
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L859:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L858:
-	ubfiz	x0, x20, 2, 16
-	add	x28, x25, x0
-	ldr	w1, [x25, x0]
-	cmp	w22, w1, lsr 10
-	bne	.L852
-	adrp	x2, .LANCHOR116
-	add	x0, x26, :lo12:.LANCHOR148
-	ldr	x2, [x2, #:lo12:.LANCHOR116]
-	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR123
-	str	w1, [x0, 4]
-	ldr	x21, [x2, #:lo12:.LANCHOR123]
-	mov	w2, 1
-	str	x21, [x0, 16]
-	mov	w1, w2
-	bl	FlashReadPages
-	ldrh	w0, [x21, 8]
-	cmp	w0, w20
-	beq	.L853
+	add	x0, x27, :lo12:.LANCHOR45
+	stp	x25, x26, [sp, 64]
+	str	x0, [x29, 104]
+.L642:
+	ldr	x1, [x29, 104]
+	adrp	x23, .LANCHOR5
+	ldrh	w0, [x28, #:lo12:.LANCHOR48]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L643
+	adrp	x1, .LANCHOR143
 	adrp	x0, .LC1
-	mov	w2, 611
-	mov	x1, x23
+	mov	w2, 2661
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L853:
-	ldr	w0, [x27]
-	cmn	w0, #1
-	bne	.L854
-.L856:
-	str	wzr, [x28]
-.L855:
-	b	.L855
-.L854:
-	ldrh	w0, [x21, 8]
-	cmp	w0, w20
-	bne	.L856
-	ldrh	w1, [x21]
-	ldrh	w0, [x19, 4]
-	cmp	w1, w0
-	bne	.L856
-	ldr	x2, [x27, 8]
-	mov	w1, w20
+.L643:
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
+	cmp	x19, x0
+	bne	.L669
+	adrp	x1, .LANCHOR95
+	ldrh	w0, [x24]
+	ldr	w1, [x1, #:lo12:.LANCHOR95]
+	mul	w1, w0, w1
+	lsr	w0, w0, 1
+	add	w0, w0, 1
+	add	w1, w0, w1, lsr 2
+	ands	w1, w1, 65535
+	beq	.L644
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+.L644:
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_pop_index_node
+	and	w22, w0, 65535
+	ldrh	w0, [x24]
+	cbnz	w0, .L645
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2670
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L645:
+	ldrh	w0, [x24]
+	sub	w0, w0, #1
+	strh	w0, [x24]
+	ldrh	w0, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w22
+	bls	.L642
+	adrp	x25, .LANCHOR42
+	ubfiz	x20, x22, 1, 16
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldrh	w21, [x0, x20]
+	cbnz	w21, .L642
+	strh	w22, [x19]
 	mov	x0, x19
-	bl	FtlMapWritePage
-.L852:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L851
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.FtlMapTblRecovery,"ax",@progbits
-	.align	2
-	.global	FtlMapTblRecovery
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	stp	x29, x30, [sp, -144]!
+	bl	make_superblock
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L647
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, -1
+	strh	w1, [x0, x20]
+	mov	w0, w22
+	bl	INSERT_DATA_LIST
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L642
+	mov	w2, 2684
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L642
+.L669:
 	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR148
-	ldrh	w23, [x0, 6]
-	adrp	x24, .LANCHOR20
-	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, 40]
-	ldr	x22, [x0, 16]
-	lsl	w2, w23, 2
-	ldr	x0, [x0, 24]
-	str	x0, [x29, 128]
-	ldrh	w0, [x19, 8]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	str	w0, [x29, 140]
-	mov	x0, x21
-	bl	ftl_memset
-	str	x20, [x29, 120]
-	adrp	x7, .LANCHOR115
-	add	x3, x20, :lo12:.LANCHOR148
-	mov	x26, x7
-	mov	x20, x3
-	ldr	x0, [x7, #:lo12:.LANCHOR115]
-	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR123
-	stp	wzr, wzr, [x19, 48]
-	ldr	x25, [x0, #:lo12:.LANCHOR123]
-	mov	w0, -1
-	str	x25, [x3, 16]
-	strh	w0, [x19]
-	strh	w0, [x19, 2]
-	mov	w0, 1
-	str	w0, [x19, 56]
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
-	str	w0, [x29, 136]
-	add	x0, x24, :lo12:.LANCHOR20
-	str	x0, [x29, 112]
-.L866:
-	ldr	w0, [x29, 140]
-	cmp	w27, w0
-	bge	.L883
-	ldr	w0, [x29, 136]
-	sxtw	x28, w27
-	cmp	w27, w0
-	bne	.L867
-	lsl	x0, x28, 1
-	mov	w1, 1
-	add	x24, x22, x0
-	ldrh	w0, [x22, x0]
-	mov	w22, 0
-	bl	FtlGetLastWrittenPage
-	sxth	w26, w0
+	b	.L644
+.L647:
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L649
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2687
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L649:
+	adrp	x0, .LANCHOR3
+	adrp	x25, .LANCHOR79
+	add	x26, x19, 16
+	mov	w6, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	x4, x26
+	ldr	x3, [x25, #:lo12:.LANCHOR79]
+	ubfiz	x0, x0, 5, 16
+	add	x1, x3, 8
+	add	x0, x0, 8
+	add	x0, x3, x0
+.L650:
+	cmp	x0, x1
+	bne	.L652
+	cbnz	w21, .L653
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2698
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L653:
+	adrp	x0, .LANCHOR144
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
+	cmp	w0, w22
+	bne	.L654
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2700
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L654:
+	ldrb	w0, [x19, 8]
+	adrp	x6, .LANCHOR43
+	adrp	x7, .LANCHOR14
+	adrp	x5, .LANCHOR90
+	adrp	x4, .LANCHOR91
+	ldr	x1, [x6, #:lo12:.LANCHOR43]
+	cbnz	w0, .L655
+	ldrh	w0, [x1, x20]
+	cbz	w0, .L656
+	ldrh	w2, [x7, #:lo12:.LANCHOR14]
+	add	w0, w0, w2
+.L680:
+	strh	w0, [x1, x20]
+	mov	w1, 0
+	ldr	w0, [x5, #:lo12:.LANCHOR90]
 	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	ldr	x0, [x29, 128]
-	strh	w27, [x19]
-	ldr	w0, [x0, x28, lsl 2]
-	str	w0, [x19, 48]
-	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR148
-.L868:
-	cmp	w22, w26
-	ble	.L870
-.L883:
-	mov	x0, x19
-	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR20
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bne	.L872
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L872:
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	w0, 0
+	str	w0, [x5, #:lo12:.LANCHOR90]
+	mov	w0, w22
+	bl	ftl_set_blk_mode
+.L658:
+	ldr	x0, [x6, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x20]
+	adrp	x0, .LANCHOR92
+	ldr	w2, [x0, #:lo12:.LANCHOR92]
+	cmp	w1, w2
+	bls	.L659
+	str	w1, [x0, #:lo12:.LANCHOR92]
+.L659:
+	ldr	w2, [x5, #:lo12:.LANCHOR90]
+	ldr	w1, [x4, #:lo12:.LANCHOR91]
+	ldrh	w0, [x7, #:lo12:.LANCHOR14]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR145
+	str	w0, [x1, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR118
+	ldr	x1, [x0, #:lo12:.LANCHOR118]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR79]
+	ubfiz	x1, x21, 5, 16
+	add	x1, x1, 4
+	add	x2, x0, 4
+	add	x1, x0, x1
+.L660:
+	cmp	x1, x2
+	bne	.L661
+	ldrb	w1, [x19, 8]
+	mov	w2, w21
+	mov	x23, 0
+	bl	FlashEraseBlocks
+	mov	w1, 0
+.L662:
+	cmp	w21, w23, uxth
+	bhi	.L664
+	cbz	w1, .L665
+	mov	w0, w22
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L665:
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L666
+	adrp	x0, .LANCHOR42
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	w1, [x0, x20]
+	b	.L642
+.L652:
+	ldrh	w2, [x4]
+	stp	xzr, xzr, [x1]
+	cmp	w2, w6
+	beq	.L651
+	ubfiz	x5, x21, 5, 16
+	add	w21, w21, 1
+	add	x5, x3, x5
+	and	w21, w21, 65535
+	lsl	w2, w2, 10
+	str	w2, [x5, 4]
+.L651:
+	add	x1, x1, 32
+	add	x4, x4, 2
+	b	.L650
+.L656:
+	mov	w0, 2
+	b	.L680
+.L655:
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+	ldr	w0, [x4, #:lo12:.LANCHOR91]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR91]
+	mov	w0, w22
+	bl	ftl_set_blk_mode.part.6
+	b	.L658
+.L661:
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 32
+	b	.L660
+.L664:
+	ldr	x2, [x25, #:lo12:.LANCHOR79]
+	lsl	x0, x23, 5
+	add	x3, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L663
+	add	w1, w1, 1
+	ldr	w0, [x3, 4]
+	stp	w2, w1, [x29, 96]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldp	w2, w1, [x29, 96]
+	strh	w2, [x26]
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+.L663:
+	add	x23, x23, 1
+	add	x26, x26, 2
+	b	.L662
+.L666:
+	adrp	x1, .LANCHOR19
+	adrp	x2, .LANCHOR82
+	strh	wzr, [x19, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	strh	w22, [x19]
+	strb	wzr, [x19, 6]
+	mul	w0, w0, w1
+	ldr	w1, [x2, #:lo12:.LANCHOR82]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR42
+	and	w0, w0, 65535
+	strh	w0, [x19, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	strh	w0, [x1, x20]
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L667
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L668
+.L667:
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC1
+	mov	w2, 2753
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L668:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L870:
-	ldrh	w0, [x24]
-	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
-	beq	.L869
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L869
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L869
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L869:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L868
-.L867:
-	ldr	x0, [x26, #:lo12:.LANCHOR115]
-	mov	w2, 1
-	str	x0, [x20, 8]
-	lsl	x0, x28, 1
-	ldrh	w1, [x24, #:lo12:.LANCHOR20]
-	add	x28, x22, x0
-	ldrh	w0, [x22, x0]
-	sub	w1, w1, #1
-	orr	w0, w1, w0, lsl 10
-	mov	w1, w2
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
-	beq	.L885
-	ldrh	w1, [x25]
-	ldrh	w0, [x19, 4]
-	cmp	w1, w0
-	bne	.L885
-	ldrh	w1, [x25, 8]
-	mov	w0, 64245
-	cmp	w1, w0
-	beq	.L874
-.L885:
-	mov	w5, 0
-.L875:
-	ldr	x0, [x29, 112]
-	ldrh	w0, [x0]
-	cmp	w5, w0
-	bge	.L881
-	ldrh	w0, [x28]
-	mov	w2, 1
-	str	w5, [x29, 108]
-	mov	w1, w2
-	orr	w0, w5, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	w0, [x20]
-	ldr	w5, [x29, 108]
-	cmn	w0, #1
-	beq	.L879
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L879
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L879
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L879:
-	add	w5, w5, 1
-	sxth	w5, w5
-	b	.L875
-.L874:
-	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR115]
-	sub	w5, w5, #1
-.L876:
-	cmp	w0, w5
-	blt	.L878
-.L881:
-	add	w4, w27, 1
-	sxth	w27, w4
-	b	.L866
-.L878:
-	lsl	w2, w0, 1
-	sxtw	x2, w2
-	lsl	x1, x2, 2
-	ldrh	w1, [x10, x1]
-	cmp	w23, w1
-	bls	.L877
-	add	x2, x2, 1
-	ubfiz	x1, x1, 2, 16
-	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x21, x1]
-.L877:
-	add	w0, w0, 1
-	sxth	w0, w0
-	b	.L876
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadVonderInfo
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR27
-	adrp	x0, .LANCHOR158
-	add	x0, x0, :lo12:.LANCHOR158
-	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR27]
-	strh	w1, [x0, 10]
-	mov	w1, -3962
-	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR35
-	ldrh	w1, [x1, #:lo12:.LANCHOR35]
-	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR28
-	ldrh	w1, [x1, #:lo12:.LANCHOR28]
-	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR36
-	ldr	x1, [x1, #:lo12:.LANCHOR36]
-	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR132
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
-	str	x1, [x0, 24]
-	adrp	x1, .LANCHOR131
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
-	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR133
-	ldr	x1, [x1, #:lo12:.LANCHOR133]
-	str	x1, [x0, 40]
-	bl	FtlMapTblRecovery
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlLoadMapInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadMapInfo
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
-	bl	FtlMapTblRecovery
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldp	x29, x30, [sp], 112
 	ret
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.flush_l2p_region,"ax",@progbits
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
 	.align	2
-	.global	flush_l2p_region
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	stp	x29, x30, [sp, -32]!
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR74
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR55
-	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	ldr	x2, [x1, 8]
-	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
-	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x0, x0, x19
-	ldp	x19, x20, [sp, 16]
-	ldr	w1, [x0, 4]
-	and	w1, w1, 2147483647
-	str	w1, [x0, 4]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cbz	w0, .L682
+	adrp	x23, .LANCHOR75
+	add	x24, x23, :lo12:.LANCHOR75
+	mov	w19, 0
+.L683:
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w0, w19
+	bhi	.L689
+	bl	FtlGcReFreshBadBlk
+.L682:
 	mov	w0, 0
-	ldp	x29, x30, [sp], 32
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",@progbits
+.L689:
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	mov	w1, w25
+	add	x22, x21, :lo12:.LANCHOR74
+	mov	w20, 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+	and	w26, w0, 65535
+.L684:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L688
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L683
+.L688:
+	add	x0, x23, :lo12:.LANCHOR75
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L685
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	w1, [x22]
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	mov	x0, 0
+.L686:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L687
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.L685:
+	and	w20, w27, 65535
+	b	.L684
+.L687:
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+	strh	w5, [x24, x2, lsl 1]
+	b	.L686
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -80]!
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR42
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w0
-	adrp	x0, .LANCHOR22
-	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
-	mov	x20, x1
-	ldrh	w24, [x0, #:lo12:.LANCHOR22]
-	adrp	x0, .LANCHOR61
-	stp	x21, x22, [sp, 32]
-	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR61]
-	mov	w21, w2
-	cmp	w25, w1
-	bcc	.L900
-	adrp	x1, .LANCHOR159
+	and	w19, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L695
+	adrp	x0, .LANCHOR144
+	ldrh	w1, [x0, #:lo12:.LANCHOR144]
+	cmp	w1, w19
+	bne	.L696
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR144]
+.L697:
+	adrp	x20, .LANCHOR45
+	mov	w1, w19
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L699
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 811
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 2823
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L900:
-	ldr	w0, [x19, #:lo12:.LANCHOR61]
-	cmp	w25, w0
-	bcs	.L901
-	adrp	x23, .LANCHOR55
-	add	w24, w24, 7
-	adrp	x0, .LANCHOR33
-	ldr	x2, [x23, #:lo12:.LANCHOR55]
-	lsr	w22, w25, w24
-	and	w22, w22, 65535
-	ldrh	w1, [x0, #:lo12:.LANCHOR33]
-	mov	x0, 0
-.L902:
-	and	x19, x0, 65535
-	cmp	w19, w1
-	bcc	.L907
-	bl	select_l2p_ram_region
-	and	x19, x0, 65535
-	ldr	x2, [x23, #:lo12:.LANCHOR55]
-	ubfiz	x1, x19, 4, 16
-	mov	w26, w0
-	add	x3, x2, x1
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L908
-	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L908
-	bl	flush_l2p_region
-.L908:
-	mov	w1, w26
-	mov	w0, w22
-	bl	load_l2p_region
-	b	.L904
-.L901:
-	mov	w0, -1
-	cbnz	w21, .L899
-	str	w0, [x20]
-.L899:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L907:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L902
-.L904:
-	mov	x0, 1
-	ldr	x1, [x23, #:lo12:.LANCHOR55]
-	lsl	x0, x0, x24
+.L699:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
-	and	w0, w0, w25
-	and	x0, x0, 65535
-	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L905
-	ldr	x1, [x1, 8]
-	ldr	w0, [x1, x0, lsl 2]
-	str	w0, [x20]
-.L906:
-	ldr	x0, [x23, #:lo12:.LANCHOR55]
-	add	x19, x0, x19, lsl 4
-	ldr	w0, [x19, 4]
-	cmn	w0, #1
-	beq	.L910
-	add	w0, w0, 1
-	str	w0, [x19, 4]
-.L910:
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	mov	w0, w19
+	bl	free_data_superblock
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L703
+	adrp	x1, .LANCHOR146
+	adrp	x0, .LC1
+	mov	w2, 2826
+	add	x1, x1, :lo12:.LANCHOR146
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L703:
+	mov	w0, 1
+	b	.L694
+.L696:
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L702
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L702
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bne	.L697
+.L702:
 	mov	w0, 0
-	b	.L899
-.L905:
-	ldr	x2, [x1, 8]
-	ldr	w3, [x20]
-	str	w3, [x2, x0, lsl 2]
-	ldr	w0, [x1, 4]
-	orr	w0, w0, -2147483648
-	str	w0, [x1, 4]
-	adrp	x0, .LANCHOR56
-	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L906
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+.L694:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L695:
+	mov	w0, w19
+	bl	List_update_data_list
+	b	.L702
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
-	.global	FtlReUsePrevPpa
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	stp	x29, x30, [sp, -80]!
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
-	mov	w21, w0
-	str	w1, [x29, 76]
-	lsr	w0, w1, 10
-	str	x23, [sp, 48]
-	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	and	w3, w0, 65535
-	ubfiz	x20, x3, 1, 16
-	ldrh	w1, [x2, x20]
-	cbnz	w1, .L914
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L915
-	adrp	x2, .LANCHOR40
-	mov	x5, -6148914691236517206
-	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR48
-	ldr	x2, [x2, #:lo12:.LANCHOR40]
-	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-	sub	x19, x19, x2
-	asr	x19, x19, 1
-	mul	x19, x19, x5
-	mov	w5, 6
-	and	w19, w19, 65535
-.L916:
-	cmp	w1, w4
-	beq	.L915
-	cmp	w19, w3
-	bne	.L917
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L706
+	adrp	x21, .LANCHOR42
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L707
+	mov	w2, 0
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L918
-	adrp	x1, .LANCHOR160
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L708
+.L713:
+	mov	w20, 0
+.L705:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L708:
+	mov	w2, 2841
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
-	mov	w2, 1699
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L918:
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	b	.L713
+.L707:
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR48]
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L915:
-	add	x1, x29, 76
-	mov	w2, 1
-	mov	w0, w21
-	bl	log2phys
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L917:
-	umull	x19, w19, w5
-	ldrh	w19, [x2, x19]
-	cmp	w19, w6
-	beq	.L915
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L916
-.L914:
-	add	w1, w1, 1
-	strh	w1, [x2, x20]
-	b	.L915
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_check_vpc,"ax",@progbits
-	.align	2
-	.global	ftl_check_vpc
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR61
-	add	x23, x23, :lo12:.LANCHOR61
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR161
-	stp	x27, x28, [sp, 80]
-	add	x1, x21, :lo12:.LANCHOR161
-	adrp	x20, check_vpc_table
-	bl	printf
-	add	x19, x20, :lo12:check_vpc_table
-	mov	w2, 8192
-	mov	w1, 0
-	mov	x0, x19
-	bl	ftl_memset
-.L925:
-	ldr	w0, [x23]
-	cmp	w22, w0
-	bcc	.L927
-	adrp	x22, .LANCHOR5
-	adrp	x24, .LC95
-	add	x22, x22, :lo12:.LANCHOR5
-	add	x26, x20, :lo12:check_vpc_table
-	add	x24, x24, :lo12:.LC95
-	mov	w23, 0
-	mov	w19, 0
-	adrp	x25, .LANCHOR42
-.L928:
-	ldrh	w0, [x22]
-	cmp	w0, w19
-	bhi	.L930
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L931
-	adrp	x0, .LANCHOR48
-	adrp	x25, .LC96
-	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC96
-	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR40
-	mov	x24, x0
-	mov	w22, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR40]
-	adrp	x27, .LANCHOR42
-	mov	w28, 6
-	sub	x19, x19, x1
+.L706:
+	adrp	x21, .LANCHOR131
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR131]
+	cmp	w0, w1
+	bne	.L710
+	strh	w19, [x21, #:lo12:.LANCHOR131]
+	b	.L713
+.L710:
+	cmp	w19, w0
+	beq	.L713
+	bl	update_vpc_list
+	cmp	w0, 0
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR41
+	strh	w19, [x21, #:lo12:.LANCHOR131]
+	cset	w20, ne
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
+	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-.L932:
-	cmp	w22, w26
-	bne	.L934
-.L931:
-	cbz	w23, .L924
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L705
+	cmp	w19, w0, uxth
+	beq	.L705
+	mov	w2, 2857
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC1
-	mov	w2, 2343
-	add	x1, x21, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L924:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L927:
-	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w22
-	bl	log2phys
-	ldr	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L926
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	x0, x0, 65535
-	ldrh	w1, [x19, x0, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x19, x0, lsl 1]
-.L926:
-	add	w22, w22, 1
-	b	.L925
-.L930:
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x28, x19, 1, 16
-	sxtw	x27, w19
-	ldrh	w2, [x0, x28]
-	ldrh	w3, [x26, x27, lsl 1]
-	cmp	w2, w3
-	beq	.L929
-	mov	w1, w19
-	mov	x0, x24
-	bl	printf
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	mov	w1, 65535
-	ldrh	w0, [x0, x28]
-	cmp	w0, w1
-	beq	.L929
-	ldrh	w1, [x26, x27, lsl 1]
-	cmp	w1, w0
-	csinc	w23, w23, wzr, ls
-.L929:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L928
-.L934:
-	ldr	x1, [x27, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L933
-	ldrh	w3, [x20, w19, sxtw 1]
-	mov	w23, 1
-	mov	w1, w19
-	mov	x0, x25
-	bl	printf
-.L933:
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
-	umull	x19, w19, w28
-	ldrh	w19, [x0, x19]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L931
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	b	.L932
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.ftl_scan_all_data,"ax",@progbits
+	b	.L705
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #96
-	adrp	x0, .LC97
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC97
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR148
-	stp	x21, x22, [sp, 48]
-	mov	w19, 0
-	adrp	x21, .LANCHOR61
-	add	x22, x20, :lo12:.LANCHOR148
-	add	x21, x21, :lo12:.LANCHOR61
-	str	x23, [sp, 64]
-	bl	printf
-.L950:
-	ldr	w0, [x21]
-	cmp	w19, w0
-	bcc	.L956
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x29, x30, [sp, 16]
-	ldr	x23, [sp, 64]
-	add	sp, sp, 96
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	stp	x29, x30, [sp, -80]!
+	adrp	x1, .LANCHOR114
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	mov	w0, -1
+	stp	x21, x22, [sp, 32]
+	str	w0, [x29, 72]
+	adrp	x0, .LANCHOR106
+	ldr	x21, [x1, #:lo12:.LANCHOR114]
+	mov	w1, -3
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	adrp	x22, .LANCHOR83
+	str	x21, [x29, 64]
+	add	x22, x22, :lo12:.LANCHOR83
+	str	x0, [x29, 56]
+	ldrh	w20, [x19, 4]
+	str	w1, [x21, 8]
+	mov	w1, -2
+	str	w1, [x21, 12]
+	and	w20, w20, 1
+	ldrh	w1, [x19]
+	add	w20, w20, 6
+	strh	w1, [x21, 2]
+	strh	wzr, [x21]
+	mov	w1, 61589
+	str	w1, [x0]
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
+	str	w1, [x0, 4]
+.L720:
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L716
+.L717:
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR42
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 80
 	ret
-.L956:
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w19
-	bl	log2phys
-	tst	x19, 2047
-	bne	.L951
-	ldr	w2, [x29, 76]
-	adrp	x0, .LC98
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC98
-	bl	printf
-.L951:
-	ldr	w1, [x29, 76]
-	cmn	w1, #1
-	beq	.L953
-	add	x0, x20, :lo12:.LANCHOR148
-	str	wzr, [x20, #:lo12:.LANCHOR148]
+.L716:
+	mov	x0, x19
+	bl	get_new_active_ppa
+	str	w0, [x29, 52]
+	cmn	w0, #1
+	beq	.L717
+	ldr	w0, [x22]
+	mov	w3, 0
+	str	w0, [x21, 4]
 	mov	w2, 0
-	str	w1, [x0, 4]
-	adrp	x1, .LANCHOR115
-	str	w19, [x0, 24]
-	ldr	x1, [x1, #:lo12:.LANCHOR115]
-	str	x1, [x0, 8]
-	adrp	x1, .LANCHOR123
-	ldr	x23, [x1, #:lo12:.LANCHOR123]
+	add	w0, w0, 1
 	mov	w1, 1
-	str	x23, [x0, 16]
-	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR148]
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	beq	.L954
-	ldr	w0, [x23, 8]
-	cmp	w19, w0
-	beq	.L953
-.L954:
-	ldp	x1, x0, [x22, 8]
-	ldr	w2, [x1, 4]
-	str	w2, [sp]
-	ldr	w2, [x22, 4]
-	ldp	w3, w4, [x0]
-	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC99
-	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC99
-	mov	w1, w19
-	bl	printf
-.L953:
-	add	w19, w19, 1
-	b	.L950
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x22]
+	add	x0, x29, 48
+	bl	FlashProgPages
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	subs	w20, w20, #1
+	bne	.L720
+	b	.L717
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -160]!
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR162
+	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	stp	x27, x28, [sp, 80]
-	mov	w0, 65535
-	ldrh	w20, [x22, #:lo12:.LANCHOR162]
-	mov	w27, w1
+	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
+	add	x21, x20, :lo12:.LANCHOR37
 	stp	x25, x26, [sp, 64]
-	cmp	w20, w0
-	beq	.L982
-	cbnz	w20, .L959
-.L960:
-	bl	FtlGcPageVarInit
-	b	.L961
-.L982:
-	mov	w20, 0
-.L959:
-	adrp	x0, .LANCHOR19
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w27
-	beq	.L960
-.L961:
-	adrp	x26, .LANCHOR61
-	add	x26, x26, :lo12:.LANCHOR61
-	mov	w25, 0
-.L962:
-	ldrh	w0, [x19]
-	mov	w23, 65535
-	strb	wzr, [x19, 8]
-	cmp	w0, w23
-	beq	.L963
-.L979:
-	adrp	x1, .LANCHOR91
-	adrp	x24, .LANCHOR112
-	add	x4, x19, 16
-	mov	w21, 0
-	ldr	x5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR23
-	ldr	x0, [x24, #:lo12:.LANCHOR112]
-	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR92
-	ldr	x7, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR24
-	ldrh	w8, [x1, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR3
-	ldrh	w1, [x1, #:lo12:.LANCHOR3]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-.L964:
-	cmp	x1, x4
-	bne	.L966
-	mov	w2, 0
-	mov	w1, w21
-	bl	FlashReadPages
-	mov	x28, 0
-	ubfiz	x0, x21, 5, 16
-	str	x0, [x29, 96]
-.L967:
-	ldr	x0, [x29, 96]
-	cmp	x0, x28
-	bne	.L977
-	add	w20, w20, 1
-	add	w25, w25, 1
-	and	w20, w20, 65535
-	cmp	w27, w25
-	adrp	x1, .LANCHOR19
-	bls	.L978
-.L980:
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w20
-	bhi	.L979
-.L963:
-	strh	w20, [x19, 2]
-	mov	w0, -1
-	strb	wzr, [x19, 6]
-	mov	w2, 0
-	strh	w0, [x22, #:lo12:.LANCHOR162]
-	mov	w1, w20
-	mov	x0, x19
-	bl	ftl_sb_update_avl_pages
-	b	.L981
-.L966:
-	ldrh	w3, [x4]
-	cmp	w3, w23
-	beq	.L965
-	ubfiz	x2, x21, 5, 16
-	orr	w3, w20, w3, lsl 10
-	add	x2, x0, x2
-	str	w3, [x2, 4]
-	mul	w3, w21, w6
-	asr	w3, w3, 2
-	add	x3, x5, x3, sxtw 2
-	str	x3, [x2, 8]
-	mul	w3, w21, w8
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	asr	w3, w3, 2
-	add	x3, x7, x3, sxtw 2
-	str	x3, [x2, 16]
-.L965:
-	add	x4, x4, 2
-	b	.L964
-.L977:
-	ldr	x1, [x24, #:lo12:.LANCHOR112]
-	add	x0, x1, x28
-	ldr	w1, [x1, x28]
-	ldr	w2, [x0, 4]
-	str	w2, [x29, 108]
-	cbnz	w1, .L968
-	ldr	x21, [x0, 16]
+	add	x24, x21, 32
+	stp	x27, x28, [sp, 80]
+	bl	FtlBbtMemInit
+	bl	FtlLoadFactoryBbt
+	adrp	x28, .LANCHOR138
+	add	x21, x21, 12
+	add	x25, x28, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	str	x0, [x29, 120]
+.L729:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L735
+	adrp	x21, .LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR25
+	mov	w19, 0
+.L736:
 	ldrh	w0, [x21]
-	cmp	w0, w23
-	bne	.L969
-.L968:
-	adrp	x0, .LANCHOR42
-	ldrh	w1, [x19]
-	mov	w20, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19]
-	bl	INSERT_FREE_LIST
-	mov	w0, -1
-	strh	w0, [x19]
-	bl	FtlGcPageVarInit
-	b	.L962
-.L969:
-	ldr	w0, [x21, 8]
-	ldr	w1, [x26]
-	cmp	w0, w1
-	bhi	.L968
-	add	x1, x29, 124
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x21, 12]
-	ldr	w1, [x29, 124]
-	cmp	w0, w1
-	beq	.L972
-.L973:
-	ldp	w2, w0, [x21, 8]
-	add	x28, x28, 32
-	ldr	w1, [x29, 108]
-	bl	FtlGcUpdatePage
-	b	.L967
-.L972:
+	cmp	w0, w19
+	bhi	.L737
+	add	x21, x20, :lo12:.LANCHOR37
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L738:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L742
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L739
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L740
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L739:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L738
+.L735:
+	adrp	x2, .LANCHOR114
+	adrp	x0, .LANCHOR106
+	add	x19, x28, :lo12:.LANCHOR138
+	ldrh	w1, [x21]
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR114]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR17
+	str	x2, [x29, 112]
+	beq	.L730
+	ldrh	w4, [x23, #:lo12:.LANCHOR17]
+	mov	w2, 1
+	madd	w27, w4, w22, w1
+	mov	w1, w2
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR17]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L731:
+	mov	w0, w27
+	add	w22, w22, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x21, x21, 2
+	b	.L729
+.L730:
+	mov	w1, w22
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR17]
+	add	x23, x23, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR127
+	sub	w19, w19, #1
+	add	x0, x0, :lo12:.LANCHOR127
+	and	w19, w19, 65535
+	str	x0, [x29, 104]
+.L732:
+	ldrh	w0, [x23]
+	madd	w0, w22, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L733
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x21]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR106
+	mov	w2, 4096
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x21]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w22, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L973
-	str	w0, [x29, 132]
-	adrp	x0, .LANCHOR119
-	mov	w2, 0
+	bne	.L731
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L732
+.L733:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L732
+.L737:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L736
+.L740:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L741
+	strh	w19, [x21]
+	b	.L739
+.L741:
+	strh	w19, [x21, 4]
+.L742:
+	adrp	x0, .LANCHOR79
+	add	x19, x20, :lo12:.LANCHOR37
+	ldrh	w1, [x20, #:lo12:.LANCHOR37]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 36]
 	mov	w1, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR119]
-	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR124
-	ldr	x0, [x0, #:lo12:.LANCHOR124]
-	str	x0, [x29, 144]
-	add	x0, x29, 128
-	bl	FlashReadPages
-	adrp	x0, .LANCHOR12
-	ldr	x2, [x24, #:lo12:.LANCHOR112]
-	ldr	x5, [x29, 136]
-	ldrh	w1, [x0, #:lo12:.LANCHOR12]
-	add	x2, x2, x28
-	mov	x0, 0
-	ubfiz	x1, x1, 9, 16
-.L974:
-	cmp	x0, x1
-	beq	.L973
-	ldr	x6, [x2, 8]
-	ldr	w7, [x6, x0]
-	add	x0, x0, 4
-	add	x6, x5, x0
-	ldr	w6, [x6, -4]
-	cmp	w7, w6
-	beq	.L974
-	ldrh	w1, [x19]
-	adrp	x0, .LC100
-	ldr	w2, [x29, 132]
-	add	x0, x0, :lo12:.LC100
-	bl	printf
-	b	.L968
-.L978:
-	ldrh	w0, [x22, #:lo12:.LANCHOR162]
-	cmp	w0, w23
-	beq	.L980
-	add	w0, w0, w25
-	strh	w0, [x22, #:lo12:.LANCHOR162]
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w20
-	bls	.L980
-.L981:
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmTblFlush
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlReadRefresh,"ax",@progbits
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
-	.global	FtlReadRefresh
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	adrp	x1, .LANCHOR81
-	add	x0, x1, :lo12:.LANCHOR81
-	ldr	w2, [x0, 80]
-	cbz	w2, .L993
-	adrp	x1, .LANCHOR61
-	ldr	w3, [x0, 84]
-	ldr	w2, [x1, #:lo12:.LANCHOR61]
-	cmp	w3, w2
-	bcs	.L994
-	stp	x29, x30, [sp, -160]!
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.js_hash,"ax",@progbits
+	.align	2
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L750:
+	cmp	w1, w3
+	bhi	.L751
+	ret
+.L751:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L750
+	.size	js_hash, .-js_hash
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	add	x20, x1, :lo12:.LANCHOR61
-	str	x21, [sp, 32]
-	mov	w21, 2048
-.L999:
-	ldr	w0, [x19, 84]
-	ldr	w1, [x20]
+	ldr	x20, [x0, 16]
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
 	cmp	w0, w1
-	bcs	.L996
-	add	x1, x29, 60
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x19, 84]
-	ldr	w1, [x29, 60]
+	bne	.L753
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L754
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC1
+	mov	w2, 641
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L754:
+	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
-	str	w0, [x19, 84]
-	cmn	w1, #1
-	beq	.L997
-	str	w0, [x29, 88]
-	adrp	x0, .LANCHOR121
-	str	w1, [x29, 68]
-	mov	w2, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR121]
-	mov	w1, 1
-	str	x0, [x29, 72]
-	add	x0, x29, 96
-	str	x0, [x29, 80]
-	add	x0, x29, 160
-	str	wzr, [x0, -96]!
-	bl	FlashReadPages
-	ldr	w0, [x29, 64]
-	cmp	w0, 256
-	bne	.L996
-	ldr	w0, [x29, 60]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L996:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 160
-	ret
-.L997:
-	subs	w21, w21, #1
-	bne	.L999
-	b	.L996
-.L994:
-	adrp	x1, .LANCHOR62
-	str	wzr, [x0, 84]
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	stp	w1, wzr, [x0, 76]
-.L1003:
+	strh	w0, [x19, 8]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x20]
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	strh	wzr, [x19]
+	str	w0, [x19, 48]
+.L755:
 	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L993:
-	ldr	w4, [x0, 76]
-	adrp	x0, .LANCHOR62
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
-	add	w0, w2, 1048576
-	cmp	w4, w0
-	bhi	.L1002
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	lsr	w3, w0, 10
-	mov	w0, 33554432
-	asr	w0, w0, w3
-	add	w0, w0, w4
-	cmp	w2, w0
-	bhi	.L1002
-	adrp	x0, .LANCHOR39+28
-	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
-	cbnz	w0, .L1003
-.L1002:
-	add	x0, x1, :lo12:.LANCHOR81
-	mov	w1, 1
-	str	wzr, [x0, 84]
-	stp	w2, w1, [x0, 76]
-	b	.L1003
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
-	.align	2
-	.global	FtlMapBlkWriteDump_data
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
-	ldr	w1, [x0, 56]
-	cbz	w1, .L1009
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR148
-	adrp	x2, .LANCHOR123
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w20, [x0, 6]
-	adrp	x0, .LANCHOR116
-	ldr	x2, [x2, #:lo12:.LANCHOR123]
-	ldr	x3, [x0, #:lo12:.LANCHOR116]
-	add	x0, x1, :lo12:.LANCHOR148
-	sub	w20, w20, #1
-	ldr	x4, [x19, 40]
-	and	w20, w20, 65535
-	str	x21, [sp, 32]
-	stp	x3, x2, [x0, 8]
-	ubfiz	x2, x20, 2, 16
-	str	wzr, [x19, 56]
-	mov	x21, x1
-	ldr	w2, [x4, x2]
-	str	w2, [x0, 4]
-	cbz	w2, .L1011
+.L753:
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR114
+	adrp	x24, .LANCHOR106
+	ldr	x23, [x19, 40]
+	ldr	x21, [x2, #:lo12:.LANCHOR114]
+	ldrh	w22, [x20, x0]
+	adrp	x20, .LANCHOR138
+	ldrh	w0, [x19, 2]
+	add	x1, x20, :lo12:.LANCHOR138
+	orr	w0, w0, w22, lsl 10
+	str	w0, [x1, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	str	x21, [x1, 16]
+	str	x0, [x1, 8]
+	ldr	w1, [x19, 48]
+	str	w1, [x21, 4]
+	mov	w1, -1291
+	strh	w1, [x21, 8]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x21]
+	adrp	x1, .LANCHOR20
+	strh	w22, [x21, 2]
+	ldrh	w2, [x1, #:lo12:.LANCHOR20]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+	ldrh	w4, [x19, 6]
+	mov	x0, 0
+	ldr	x3, [x24, #:lo12:.LANCHOR106]
+	mov	w1, 0
+.L756:
+	cmp	w4, w0, uxth
+	bhi	.L758
+	add	x20, x20, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR23
+	ldrh	w1, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x20, 8]
+	bl	js_hash
+	str	w0, [x21, 12]
 	mov	w2, 1
+	mov	w3, 0
 	mov	w1, w2
-	bl	FlashReadPages
-.L1012:
-	add	x1, x21, :lo12:.LANCHOR148
+	mov	x0, x20
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
 	mov	x0, x19
-	ldr	x21, [sp, 32]
-	ldr	x2, [x1, 8]
-	mov	w1, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	FtlMapWritePage
-.L1011:
-	adrp	x0, .LANCHOR23
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-	mov	x0, x3
-	bl	ftl_memset
-	b	.L1012
-.L1009:
-	ret
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FlashTestBlk,"ax",@progbits
+	bl	ftl_map_blk_gc
+	b	.L755
+.L758:
+	ldr	w2, [x23, x0, lsl 2]
+	cmp	w22, w2, lsr 10
+	bne	.L757
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	ubfiz	x2, x1, 1, 16
+	str	w0, [x3, x2, lsl 2]
+	add	x2, x2, 1
+	ldr	w5, [x23, x0, lsl 2]
+	str	w5, [x3, x2, lsl 2]
+.L757:
+	add	x0, x0, 1
+	b	.L756
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
-	.global	FlashTestBlk
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	stp	x29, x30, [sp, -128]!
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR88
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LANCHOR149
+	stp	x27, x28, [sp, 80]
+	adrp	x26, .LANCHOR20
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	cmp	w19, 11
-	bls	.L1018
-	adrp	x20, .LANCHOR121
-	mov	w2, 32
-	mov	w1, 165
-	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
-	str	x0, [x29, 40]
-	add	x0, x29, 64
-	str	x0, [x29, 48]
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
-	mov	w2, 8
-	mov	w1, 90
+	mov	w25, w1
+	mov	x19, x0
+	mov	x27, x2
+	add	x23, x23, :lo12:.LANCHOR88
+	add	x24, x24, :lo12:.LANCHOR149
+	add	x28, x26, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+.L764:
+	ldr	w0, [x23]
+	ldrh	w1, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x23]
+	ldrh	w0, [x26, #:lo12:.LANCHOR20]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bge	.L765
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L766
+.L765:
+	mov	x0, x19
+	bl	Ftl_write_map_blk_to_last_page
+.L766:
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L767
+	adrp	x0, .LC1
+	mov	w2, 700
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L767:
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L768
+	adrp	x0, .LC1
+	mov	w2, 701
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L768:
+	ldrh	w1, [x19]
+	adrp	x21, .LANCHOR138
+	ldr	x0, [x19, 16]
+	add	x20, x21, :lo12:.LANCHOR138
+	mov	w2, 16
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	w1, 0
+	ldrh	w0, [x19, 2]
+	str	w3, [x29, 108]
+	str	x27, [x20, 8]
+	orr	w0, w0, w3, lsl 10
+	str	w0, [x20, 4]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	str	x0, [x20, 16]
 	bl	ftl_memset
-	str	w19, [x29, 36]
-	mov	w2, 1
-	add	x0, x29, 32
-	mov	w1, w2
-	bl	FlashEraseBlocks
+	ldr	x6, [x20, 16]
+	ldr	w0, [x19, 48]
+	ldr	w3, [x29, 108]
+	str	w0, [x6, 4]
+	ldrh	w0, [x19, 4]
+	strh	w0, [x6]
+	adrp	x0, .LANCHOR23
+	strh	w3, [x6, 2]
+	strh	w25, [x6, 8]
+	ldrh	w1, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x20, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
 	mov	w3, 1
-	add	x0, x29, 32
-	mov	w2, w3
+	mov	x0, x20
 	mov	w1, w3
+	mov	w2, w3
 	bl	FlashProgPages
-	ldr	w0, [x29, 32]
-	mov	w2, 1
-	mov	w1, 0
-	cmp	w0, 0
-	add	x0, x29, 32
-	csetm	w19, ne
-	bl	FlashEraseBlocks
-.L1016:
-	mov	w0, w19
+	ldrh	w0, [x19, 2]
+	ldr	w1, [x21, #:lo12:.LANCHOR138]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	cmn	w1, #1
+	bne	.L769
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	bl	printf
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L770
+	ldrh	w0, [x28]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L770:
+	cmp	w22, 3
+	bls	.L771
+	add	x21, x21, :lo12:.LANCHOR138
+	adrp	x0, .LC19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC19
+	ldr	w1, [x21, 4]
+	bl	printf
+.L772:
+	b	.L772
+.L771:
+	ldr	w0, [x19, 52]
+	cbz	w0, .L764
+.L786:
+	b	.L786
+.L769:
+	cmp	w0, 1
+	beq	.L775
+	cmp	w1, 256
+	beq	.L775
+	ldr	w0, [x19, 56]
+	cbz	w0, .L776
+.L775:
+	str	wzr, [x19, 56]
+	b	.L764
+.L776:
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, w25, uxtw 2]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 128
+	mov	w0, 0
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1018:
-	mov	w19, 0
-	b	.L1016
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
-	.global	FtlBbmTblFlush
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR123
+	adrp	x24, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR148
+	and	w20, w0, 65535
 	stp	x21, x22, [sp, 32]
-	add	x19, x20, :lo12:.LANCHOR148
-	adrp	x22, .LANCHOR115
-	ldr	x1, [x23, #:lo12:.LANCHOR123]
+	and	x19, x1, 65535
+	ldrh	w0, [x24, #:lo12:.LANCHOR32]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR37
 	str	x27, [sp, 80]
-	add	x25, x21, :lo12:.LANCHOR37
-	ldr	x0, [x22, #:lo12:.LANCHOR115]
-	adrp	x26, .LANCHOR10
-	stp	x0, x1, [x19, 8]
+	cmp	w0, w20
+	bcs	.L789
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC1
+	mov	w2, 485
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L789:
+	adrp	x27, .LANCHOR124
+	ubfiz	x0, x20, 2, 16
+	adrp	x22, .LANCHOR55
+	ldr	x1, [x27, #:lo12:.LANCHOR124]
+	ldr	w23, [x1, x0]
+	cbnz	w23, .L790
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
-	adrp	x27, .LANCHOR137
-	add	x25, x25, 32
+	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w24, 0
-	add	x26, x26, :lo12:.LANCHOR10
-	add	x27, x27, :lo12:.LANCHOR137
-	mov	w1, 0
-	bl	ftl_memset
-.L1021:
-	ldrh	w0, [x26]
-	cmp	w24, w0
-	blt	.L1022
-	add	x20, x20, :lo12:.LANCHOR148
-	add	x19, x21, :lo12:.LANCHOR37
-	mov	w2, 16
 	mov	w1, 255
-	adrp	x24, .LC101
-	adrp	x26, .LANCHOR20
-	ldr	x27, [x20, 16]
-	add	x24, x24, :lo12:.LC101
-	add	x26, x26, :lo12:.LANCHOR20
-	mov	w25, 0
-	mov	x0, x27
+	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	mov	w0, -3887
-	strh	w0, [x27]
-	ldr	w0, [x19, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR37]
-	mov	w21, 0
-	strh	w0, [x27, 2]
-	ldrh	w0, [x19, 4]
-	strh	w0, [x27, 8]
-	ldrh	w0, [x19, 6]
-	strh	w0, [x27, 10]
-	adrp	x0, .LANCHOR2
-	ldr	w0, [x0, #:lo12:.LANCHOR2]
-	strh	w0, [x27, 12]
-.L1023:
-	ldrh	w1, [x19]
-	ldrh	w4, [x27, 10]
-	ldrh	w2, [x19, 2]
-	ldrh	w3, [x19, 4]
-	ldr	x0, [x22, #:lo12:.LANCHOR115]
-	str	x0, [x20, 8]
-	ldr	x0, [x23, #:lo12:.LANCHOR123]
-	str	x0, [x20, 16]
-	orr	w0, w2, w1, lsl 10
-	str	wzr, [x20]
-	str	w0, [x20, 4]
-	mov	x0, x24
-	bl	printf
-	ldrh	w0, [x26]
-	ldrh	w1, [x19, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L1024
-	ldr	w0, [x19, 8]
-	mov	w2, 1
-	ldrh	w1, [x19, 4]
-	add	w0, w0, 1
-	str	w0, [x19, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x19]
-	strh	w0, [x27, 8]
-	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR106
-	strh	w1, [x19]
-	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
-	str	w1, [x20, 4]
-	strh	wzr, [x19, 2]
-	str	w1, [x0, 4]
-	mov	w1, w2
-	bl	FlashEraseBlocks
-.L1024:
-	mov	w3, 1
-	mov	x0, x20
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	ldr	w0, [x20]
-	cmn	w0, #1
-	bne	.L1025
-	ldr	w1, [x20, 4]
-	add	w21, w21, 1
-	adrp	x0, .LC102
-	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC102
-	bl	printf
-	cmp	w21, 3
-	bls	.L1023
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC103
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC103
-	bl	printf
-.L1027:
-	b	.L1027
-.L1022:
-	ldrh	w2, [x27]
-	ldr	x1, [x25], 8
-	ldr	x0, [x19, 8]
-	mul	w3, w24, w2
-	lsl	w2, w2, 2
-	add	w24, w24, 1
-	add	x0, x0, x3, sxtw 2
-	bl	ftl_memcpy
-	b	.L1021
-.L1028:
-	mov	w25, 1
-	b	.L1023
-.L1025:
-	cbz	w25, .L1028
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	strh	w20, [x0, x19]
+	str	wzr, [x1, 4]
+.L791:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7574,566 +5941,454 @@ FtlBbmTblFlush:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",@progbits
+.L790:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
+	adrp	x26, .LANCHOR138
+	add	x21, x26, :lo12:.LANCHOR138
+	add	x0, x0, x19
+	mov	w2, 1
+	mov	w1, w2
+	str	w23, [x21, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	str	x0, [x21, 16]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	x25, [x21, 16]
+	ldrh	w0, [x25, 8]
+	cmp	w0, w20
+	beq	.L792
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+	ldr	x1, [x21, 16]
+	mov	w3, 4
+	adrp	x0, .LC21
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC21
+	bl	rknand_print_hex
+	ldrh	w3, [x24, #:lo12:.LANCHOR32]
+	adrp	x0, .LC22
+	ldr	x1, [x27, #:lo12:.LANCHOR124]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC22
+	bl	rknand_print_hex
+.L793:
+	ldrh	w0, [x25, 8]
+	cmp	w0, w20
+	beq	.L794
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC1
+	mov	w2, 508
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L794:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	strh	w20, [x0, x19]
+	b	.L791
+.L792:
+	ldr	w0, [x26, #:lo12:.LANCHOR138]
+	cmp	w0, 256
+	bne	.L793
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	mov	w1, w20
+	add	x0, x0, x19
+	ldr	x2, [x0, 8]
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	FtlMapWritePage
+	b	.L793
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
-	.global	allocate_data_superblock
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	stp	x29, x30, [sp, -112]!
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	adrp	x28, .LANCHOR48
-	stp	x23, x24, [sp, 48]
-	add	x24, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR45
 	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	add	x0, x27, :lo12:.LANCHOR45
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR20
 	stp	x25, x26, [sp, 64]
-	str	x0, [x29, 104]
-.L1031:
-	ldr	x1, [x29, 104]
-	adrp	x23, .LANCHOR5
-	ldrh	w0, [x28, #:lo12:.LANCHOR48]
-	ldrh	w1, [x1]
-	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1032
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2615
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1032:
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
-	cmp	x19, x0
-	bne	.L1058
-	adrp	x1, .LANCHOR87
-	ldrh	w0, [x24]
-	ldr	w1, [x1, #:lo12:.LANCHOR87]
-	mul	w1, w0, w1
-	lsr	w0, w0, 1
-	add	w0, w0, 1
-	add	w1, w0, w1, lsr 2
-	ands	w1, w1, 65535
-	beq	.L1033
-	sub	w1, w1, #1
-	and	w1, w1, 65535
-.L1033:
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_pop_index_node
-	and	w22, w0, 65535
-	ldrh	w0, [x24]
-	cbnz	w0, .L1034
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2624
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1034:
-	ldrh	w0, [x24]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	ldr	x20, [x0, 16]
+	ldr	x25, [x0, 40]
+	bl	ftl_free_no_use_map_blk
+	ldrh	w1, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w1, #5
+	cmp	w2, w1
+	blt	.L797
+	ubfiz	x0, x0, 1, 16
+	ldrh	w22, [x20, x0]
+	cbz	w22, .L797
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L797
+	mov	w1, 1
+	str	w1, [x19, 52]
+	strh	wzr, [x20, x0]
+	ldrh	w0, [x19, 8]
+	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
-	strh	w0, [x24]
-	ldrh	w0, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w22
-	bls	.L1031
-	adrp	x25, .LANCHOR42
-	ubfiz	x20, x22, 1, 16
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w21, [x0, x20]
-	cbnz	w21, .L1031
-	strh	w22, [x19]
+	strh	w0, [x19, 8]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L798
 	mov	x0, x19
-	bl	make_superblock
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1036
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	mov	w1, -1
-	strh	w1, [x0, x20]
+	bl	ftl_map_blk_alloc_new_blk
+.L798:
+	adrp	x26, .LANCHOR138
+	adrp	x23, .LANCHOR151
+	add	x27, x26, :lo12:.LANCHOR138
+	add	x23, x23, :lo12:.LANCHOR151
+	mov	w20, 0
+.L799:
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L806
+	mov	w1, 1
 	mov	w0, w22
-	bl	INSERT_DATA_LIST
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x24]
-	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1031
-	mov	w2, 2638
-	adrp	x1, .LANCHOR163
+	bl	FtlFreeSysBlkQueueIn
+	str	wzr, [x19, 52]
+.L797:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L807
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L807:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L806:
+	ubfiz	x0, x20, 2, 16
+	add	x28, x25, x0
+	ldr	w1, [x25, x0]
+	cmp	w22, w1, lsr 10
+	bne	.L800
+	adrp	x2, .LANCHOR107
+	add	x0, x26, :lo12:.LANCHOR138
+	ldr	x2, [x2, #:lo12:.LANCHOR107]
+	str	x2, [x0, 8]
+	adrp	x2, .LANCHOR114
+	str	w1, [x0, 4]
+	ldr	x21, [x2, #:lo12:.LANCHOR114]
+	mov	w2, 1
+	str	x21, [x0, 16]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	beq	.L801
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 611
+	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1031
-.L1058:
-	mov	w1, 0
-	b	.L1033
-.L1036:
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x24]
-	add	w0, w0, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1038
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2641
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1038:
-	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR106
-	add	x26, x19, 16
-	mov	w6, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	mov	x4, x26
-	ldr	x3, [x25, #:lo12:.LANCHOR106]
-	ubfiz	x0, x0, 5, 16
-	add	x1, x3, 8
-	add	x0, x0, 8
-	add	x0, x3, x0
-.L1039:
-	cmp	x0, x1
-	bne	.L1041
-	cbnz	w21, .L1042
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2652
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1042:
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w0, w22
-	bne	.L1043
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2654
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1043:
-	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR43
-	adrp	x7, .LANCHOR14
-	adrp	x5, .LANCHOR72
-	adrp	x4, .LANCHOR73
-	ldr	x1, [x6, #:lo12:.LANCHOR43]
-	cbnz	w0, .L1044
-	ldrh	w0, [x1, x20]
-	cbz	w0, .L1045
-	ldrh	w2, [x7, #:lo12:.LANCHOR14]
-	add	w0, w0, w2
-.L1069:
-	strh	w0, [x1, x20]
-	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR72]
-	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR72]
-	mov	w0, w22
-	bl	ftl_set_blk_mode
-.L1047:
-	ldr	x0, [x6, #:lo12:.LANCHOR43]
-	ldrh	w1, [x0, x20]
-	adrp	x0, .LANCHOR76
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
-	cmp	w1, w2
-	bls	.L1048
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1048:
-	ldr	w2, [x5, #:lo12:.LANCHOR72]
-	ldr	w1, [x4, #:lo12:.LANCHOR73]
-	ldrh	w0, [x7, #:lo12:.LANCHOR14]
-	madd	w0, w0, w2, w1
-	ldrh	w1, [x23, #:lo12:.LANCHOR5]
-	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR74
-	str	w0, [x1, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR127
-	ldr	x1, [x0, #:lo12:.LANCHOR127]
-	ldr	w0, [x1, 16]
-	add	w0, w0, 1
-	str	w0, [x1, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR106]
-	ubfiz	x1, x21, 5, 16
-	add	x1, x1, 4
-	add	x2, x0, 4
-	add	x1, x0, x1
-.L1049:
-	cmp	x1, x2
-	bne	.L1050
-	ldrb	w1, [x19, 8]
-	mov	w2, w21
-	mov	x23, 0
-	bl	FlashEraseBlocks
-	mov	w1, 0
-.L1051:
-	cmp	w21, w23, uxth
-	bhi	.L1053
-	cbz	w1, .L1054
-	mov	w0, w22
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1054:
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1055
-	adrp	x0, .LANCHOR42
-	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	strh	w1, [x0, x20]
-	b	.L1031
-.L1041:
-	ldrh	w2, [x4]
-	stp	xzr, xzr, [x1]
-	cmp	w2, w6
-	beq	.L1040
-	ubfiz	x5, x21, 5, 16
-	add	w21, w21, 1
-	add	x5, x3, x5
-	and	w21, w21, 65535
-	lsl	w2, w2, 10
-	str	w2, [x5, 4]
-.L1040:
-	add	x1, x1, 32
-	add	x4, x4, 2
-	b	.L1039
-.L1045:
-	mov	w0, 2
-	b	.L1069
-.L1044:
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
-	strh	w0, [x1, x20]
-	ldr	w0, [x4, #:lo12:.LANCHOR73]
-	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR73]
-	mov	w0, w22
-	bl	ftl_set_blk_mode.part.6
-	b	.L1047
-.L1050:
-	ldr	w3, [x2]
-	and	w3, w3, -1024
-	str	w3, [x2], 32
-	b	.L1049
-.L1053:
-	ldr	x2, [x25, #:lo12:.LANCHOR106]
-	lsl	x0, x23, 5
-	add	x3, x2, x0
-	ldr	w2, [x2, x0]
-	cmn	w2, #1
-	bne	.L1052
-	add	w1, w1, 1
-	ldr	w0, [x3, 4]
-	stp	w2, w1, [x29, 96]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	ldp	w2, w1, [x29, 96]
-	strh	w2, [x26]
-	ldrb	w0, [x19, 7]
-	sub	w0, w0, #1
-	strb	w0, [x19, 7]
-.L1052:
-	add	x23, x23, 1
-	add	x26, x26, 2
-	b	.L1051
-.L1055:
-	adrp	x1, .LANCHOR19
-	adrp	x2, .LANCHOR70
-	strh	wzr, [x19, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	strh	w22, [x19]
-	strb	wzr, [x19, 6]
-	mul	w0, w0, w1
-	ldr	w1, [x2, #:lo12:.LANCHOR70]
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR70]
-	adrp	x1, .LANCHOR42
-	and	w0, w0, 65535
-	strh	w0, [x19, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	strh	w0, [x1, x20]
+.L801:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	bne	.L802
+.L804:
+	str	wzr, [x28]
+.L803:
+	b	.L803
+.L802:
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	bne	.L804
+	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1056
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1057
-.L1056:
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC1
-	mov	w2, 2707
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1057:
+	cmp	w1, w0
+	bne	.L804
+	ldr	x2, [x27, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+.L800:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L799
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR55
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	FtlMapWritePage
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
 	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",@progbits
 	.align	2
-	.global	FtlGcFreeBadSuperBlk
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-	stp	x29, x30, [sp, -96]!
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR101
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR101]
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	str	x27, [sp, 80]
-	cbz	w0, .L1071
-	adrp	x23, .LANCHOR102
-	add	x24, x23, :lo12:.LANCHOR102
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
+	str	x21, [sp, 32]
 	mov	w19, 0
-.L1072:
-	adrp	x0, .LANCHOR3
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	adrp	x21, .LANCHOR55
+.L816:
+	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1078
-	bl	FtlGcReFreshBadBlk
-.L1071:
+	bhi	.L818
 	mov	w0, 0
-	ldr	x27, [sp, 80]
+	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 48
 	ret
-.L1078:
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
-	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR101
-	mov	w20, 0
-	ldrb	w0, [x0, w19, sxtw]
-	bl	V2P_block
-	and	w26, w0, 65535
-.L1073:
-	ldrh	w0, [x22]
-	cmp	w0, w20
-	bhi	.L1077
+.L818:
+	ldr	x1, [x21, #:lo12:.LANCHOR55]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L817
+	mov	w0, w19
+	bl	flush_l2p_region
+.L817:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1072
-.L1077:
-	add	x0, x23, :lo12:.LANCHOR102
-	add	w27, w20, 1
-	ldrh	w0, [x0, w20, sxtw 1]
-	cmp	w0, w26
-	bne	.L1074
-	mov	w1, w26
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	b	.L816
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR22
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	ldrh	w24, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR152
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w21, w2
+	cmp	w25, w1
+	bcc	.L821
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC1
+	mov	w2, 813
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC1
 	bl	printf
-	mov	w0, w26
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldrh	w1, [x22]
-	sxtw	x3, w27
-	and	x4, x20, 65535
+.L821:
+	ldr	w0, [x19, #:lo12:.LANCHOR152]
+	cmp	w25, w0
+	bcs	.L822
+	adrp	x23, .LANCHOR55
+	add	w24, w24, 7
+	adrp	x0, .LANCHOR33
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	lsr	w22, w25, w24
+	and	w22, w22, 65535
+	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L1075:
-	add	w2, w20, w0
-	cmp	w1, w2, uxth
-	bhi	.L1076
-	sub	w1, w1, #1
-	strh	w1, [x22]
-.L1074:
-	and	w20, w27, 65535
-	b	.L1073
-.L1076:
-	add	x2, x3, x0
-	ldrh	w5, [x24, x2, lsl 1]
-	add	x2, x4, x0
+.L823:
+	and	x19, x0, 65535
+	cmp	w19, w1
+	bcc	.L828
+	bl	select_l2p_ram_region
+	and	x19, x0, 65535
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	ubfiz	x1, x19, 4, 16
+	mov	w26, w0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L829
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L829
+	bl	flush_l2p_region
+.L829:
+	mov	w1, w26
+	mov	w0, w22
+	bl	load_l2p_region
+	b	.L825
+.L822:
+	mov	w0, -1
+	cbnz	w21, .L820
+	str	w0, [x20]
+.L820:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L828:
 	add	x0, x0, 1
-	strh	w5, [x24, x2, lsl 1]
-	b	.L1075
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",@progbits
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L823
+.L825:
+	mov	x0, 1
+	ldr	x1, [x23, #:lo12:.LANCHOR55]
+	lsl	x0, x0, x24
+	sub	w0, w0, #1
+	and	w0, w0, w25
+	and	x0, x0, 65535
+	add	x1, x1, x19, lsl 4
+	cbnz	w21, .L826
+	ldr	x1, [x1, 8]
+	ldr	w0, [x1, x0, lsl 2]
+	str	w0, [x20]
+.L827:
+	ldr	x0, [x23, #:lo12:.LANCHOR55]
+	add	x19, x0, x19, lsl 4
+	ldr	w0, [x19, 4]
+	cmn	w0, #1
+	beq	.L831
+	add	w0, w0, 1
+	str	w0, [x19, 4]
+.L831:
+	mov	w0, 0
+	b	.L820
+.L826:
+	ldr	x2, [x1, 8]
+	ldr	w3, [x20]
+	str	w3, [x2, x0, lsl 2]
+	ldr	w0, [x1, 4]
+	orr	w0, w0, -2147483648
+	str	w0, [x1, 4]
+	adrp	x0, .LANCHOR56
+	strh	w22, [x0, #:lo12:.LANCHOR56]
+	b	.L827
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
-	.global	update_vpc_list
-	.type	update_vpc_list, %function
-update_vpc_list:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR42
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1084
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	cmp	w1, w19
-	bne	.L1085
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR80]
-.L1086:
-	adrp	x20, .LANCHOR45
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L835
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L836
+	adrp	x2, .LANCHOR40
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR48
+	ldr	x2, [x2, #:lo12:.LANCHOR40]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR48]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L837:
+	cmp	w1, w4
+	beq	.L836
+	cmp	w19, w3
+	bne	.L838
 	mov	w1, w19
-	adrp	x0, .LANCHOR41
-	add	x0, x0, :lo12:.LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L1088
-	adrp	x1, .LANCHOR164
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cbnz	w0, .L839
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 2777
-	add	x1, x1, :lo12:.LANCHOR164
+	mov	w2, 1733
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1088:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+.L839:
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
-	mov	w0, w19
-	bl	free_data_superblock
-	mov	w0, w19
-	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR48
-	ldrh	w1, [x20, #:lo12:.LANCHOR45]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L1092
-	adrp	x1, .LANCHOR164
-	adrp	x0, .LC1
-	mov	w2, 2780
-	add	x1, x1, :lo12:.LANCHOR164
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1092:
-	mov	w0, 1
-	b	.L1083
-.L1085:
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L1091
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L1091
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	bne	.L1086
-.L1091:
-	mov	w0, 0
-.L1083:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L1084:
+	strh	w0, [x23, #:lo12:.LANCHOR48]
 	mov	w0, w19
-	bl	List_update_data_list
-	b	.L1091
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",@progbits
-	.align	2
-	.global	decrement_vpc_count
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	str	x21, [sp, 32]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L1095
-	adrp	x21, .LANCHOR42
-	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR42]
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1096
-	mov	w2, 0
-	mov	w1, w19
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR42]
-	ldrh	w0, [x0, x20]
-	cbz	w0, .L1097
-.L1102:
-	mov	w20, 0
-.L1094:
-	mov	w0, w20
-	ldr	x21, [sp, 32]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L836:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L1097:
-	mov	w2, 2795
-	adrp	x1, .LANCHOR165
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR165
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L1102
-.L1096:
-	sub	w0, w0, #1
-	strh	w0, [x1, x20]
-.L1095:
-	adrp	x21, .LANCHOR142
-	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR142]
-	cmp	w0, w1
-	bne	.L1099
-	strh	w19, [x21, #:lo12:.LANCHOR142]
-	b	.L1102
-.L1099:
-	cmp	w19, w0
-	beq	.L1102
-	bl	update_vpc_list
-	cmp	w0, 0
-	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR41
-	strh	w19, [x21, #:lo12:.LANCHOR142]
-	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	sub	x0, x0, x1
-	mov	x1, -6148914691236517206
-	asr	x0, x0, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x0, x0, x1
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	and	x2, x0, 65535
-	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1094
-	cmp	w19, w0, uxth
-	beq	.L1094
-	mov	w2, 2811
-	adrp	x1, .LANCHOR165
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR165
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L1094
-	.size	decrement_vpc_count, .-decrement_vpc_count
+.L838:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L836
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L837
+.L835:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L836
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
 	.global	FtlRecoverySuperblock
@@ -8150,7 +6405,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1226
+	beq	.L968
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -8158,11 +6413,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1106
+	bne	.L848
 	strh	wzr, [x19, 4]
-.L1232:
+.L976:
 	strb	wzr, [x19, 6]
-.L1226:
+.L968:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8171,30 +6426,30 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1106:
+.L848:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L1107:
+.L849:
 	cmp	w0, w1
-	beq	.L1108
+	beq	.L850
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L1109
-	adrp	x1, .LANCHOR91
+	beq	.L851
+	adrp	x1, .LANCHOR64
 	adrp	x2, .LANCHOR3
-	adrp	x20, .LANCHOR112
+	adrp	x20, .LANCHOR103
 	add	x4, x19, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR91]
+	ldr	x5, [x1, #:lo12:.LANCHOR64]
 	adrp	x1, .LANCHOR23
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w22, 0
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR65
 	mov	w10, 65535
 	str	x2, [x29, 152]
-	ldr	x7, [x1, #:lo12:.LANCHOR92]
+	ldr	x7, [x1, #:lo12:.LANCHOR65]
 	adrp	x1, .LANCHOR24
 	ldrh	w8, [x1, #:lo12:.LANCHOR24]
 	add	x1, x19, 16
@@ -8202,85 +6457,85 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1110:
+.L852:
 	cmp	x4, x1
-	bne	.L1114
+	bne	.L856
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR71
-	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR83
+	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	and	w10, w23, 65535
-	add	x7, x0, :lo12:.LANCHOR71
-	ldr	w21, [x0, #:lo12:.LANCHOR71]
+	add	x7, x0, :lo12:.LANCHOR83
+	ldr	w21, [x0, #:lo12:.LANCHOR83]
 	mov	x11, x4
 	mov	w6, 65535
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L1115:
+.L857:
 	cmp	w22, w3
-	bne	.L1120
+	bne	.L862
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L1228:
+.L970:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1122
+	bne	.L864
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L1122:
+.L864:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1123
-.L1233:
+	beq	.L865
+.L977:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L1226
-.L1108:
+	b	.L968
+.L850:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1107
-.L1109:
-	cbz	w26, .L1111
-	adrp	x1, .LANCHOR166
+	b	.L849
+.L851:
+	cbz	w26, .L853
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
-	mov	w2, 1766
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 1800
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1111:
+.L853:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1112
-	adrp	x1, .LANCHOR166
+	beq	.L854
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
-	mov	w2, 1767
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 1801
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1112:
+.L854:
 	strh	wzr, [x19, 2]
-	b	.L1232
-.L1114:
+	b	.L976
+.L856:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1113
+	beq	.L855
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -8295,90 +6550,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1113:
+.L855:
 	add	x4, x4, 2
-	b	.L1110
-.L1120:
+	b	.L852
+.L862:
 	ldr	w0, [x11]
-	cbnz	w0, .L1116
+	cbnz	w0, .L858
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1117
+	beq	.L859
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1117
+	cbz	w0, .L859
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1117:
+.L859:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1119
+	bne	.L861
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1228
-.L1116:
+	b	.L970
+.L858:
 	mov	w6, w10
-.L1119:
+.L861:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L1115
-.L1123:
+	b	.L857
+.L865:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1124
+	bne	.L866
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1125
-.L1124:
-	adrp	x25, .LANCHOR145
+	cbnz	w0, .L867
+.L866:
+	adrp	x25, .LANCHOR134
 	and	w28, w23, 65535
-	ldr	w0, [x25, #:lo12:.LANCHOR145]
+	ldr	w0, [x25, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L1126
-	str	w21, [x25, #:lo12:.LANCHOR145]
-.L1126:
+	bne	.L868
+	str	w21, [x25, #:lo12:.LANCHOR134]
+.L868:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1175
+	bge	.L920
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L1127:
+.L869:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L1128:
+.L870:
 	cmp	w24, w28
-	bhi	.L1138
+	bhi	.L880
 	ldrh	w1, [x4]
 	mov	w23, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1139
-.L1175:
+	b	.L881
+.L920:
 	mov	w24, w26
-	b	.L1127
-.L1130:
+	b	.L869
+.L872:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L1129
+	beq	.L871
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L1129:
+.L871:
 	add	x2, x2, 2
-.L1139:
-	cmp	x2, x1
-	bne	.L1130
+.L881:
+	cmp	x1, x2
+	bne	.L872
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -8387,591 +6642,803 @@ FtlRecoverySuperblock:
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x2, [x20, #:lo12:.LANCHOR112]
-	ldr	w1, [x25, #:lo12:.LANCHOR145]
+	ldr	x2, [x20, #:lo12:.LANCHOR103]
+	ldr	w1, [x25, #:lo12:.LANCHOR134]
 	ldr	w5, [x29, 112]
 	add	x0, x2, 16
 	ldr	w3, [x29, 120]
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L1131:
+.L873:
 	cmp	x23, x0
-	bne	.L1136
-	cbz	w2, .L1137
-	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1137:
+	bne	.L878
+	cbz	w2, .L879
+	str	w1, [x25, #:lo12:.LANCHOR134]
+.L879:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1128
-.L1136:
+	b	.L870
+.L878:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1132
-	cbz	w2, .L1125
-	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1125:
-	adrp	x0, .LANCHOR167
-	mov	w23, w26
+	cbz	w6, .L874
+	cbz	w2, .L867
+	str	w1, [x25, #:lo12:.LANCHOR134]
+.L867:
+	adrp	x0, .LANCHOR156
+	mov	w24, w26
 	mov	w1, 1
-	adrp	x28, .LANCHOR145
-	strh	w1, [x0, #:lo12:.LANCHOR167]
-	add	x0, x28, :lo12:.LANCHOR145
+	adrp	x28, .LANCHOR134
+	strh	w1, [x0, #:lo12:.LANCHOR156]
+	add	x0, x28, :lo12:.LANCHOR134
 	str	x0, [x29, 104]
-.L1140:
+.L882:
 	ldr	x1, [x29, 152]
-	mov	w24, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w23, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w5, 65535
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1141:
+.L883:
 	cmp	x1, x2
-	bne	.L1143
+	bne	.L885
 	mov	w2, 0
-	mov	w1, w24
+	mov	w1, w23
 	bl	FlashReadPages
 	mov	x25, 0
-	ubfiz	x0, x24, 5, 16
+	ubfiz	x0, x23, 5, 16
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR168
-	add	x0, x0, :lo12:.LANCHOR168
+	adrp	x0, .LANCHOR157
+	add	x0, x0, :lo12:.LANCHOR157
 	str	x0, [x29, 120]
-.L1144:
+.L886:
 	ldr	x0, [x29, 112]
-	cmp	x25, x0
-	bne	.L1169
+	cmp	x0, x25
+	bne	.L914
 	ldr	x0, [x29, 128]
-	add	w23, w23, 1
-	and	w23, w23, 65535
+	add	w24, w24, 1
+	and	w24, w24, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w23
-	bne	.L1140
+	cmp	w0, w24
+	bne	.L882
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
-	strh	w23, [x19, 2]
+	strh	w24, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L1170:
+.L915:
 	cmp	w0, w1
-	beq	.L1226
+	beq	.L968
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L1171
+	beq	.L916
 	strb	w0, [x19, 6]
-	b	.L1226
-.L1132:
+	b	.L968
+.L874:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1135
+	beq	.L877
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1135:
+.L877:
 	add	x0, x0, 32
-	b	.L1131
-.L1138:
+	b	.L873
+.L880:
 	mov	w0, -1
-	str	w0, [x25, #:lo12:.LANCHOR145]
-	b	.L1125
-.L1143:
+	str	w0, [x25, #:lo12:.LANCHOR134]
+	b	.L867
+.L885:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L1142
-	ubfiz	x4, x24, 5, 16
-	add	w24, w24, 1
+	beq	.L884
+	ubfiz	x4, x23, 5, 16
+	add	w23, w23, 1
 	add	x4, x0, x4
-	and	w24, w24, 65535
-	orr	w3, w23, w3, lsl 10
+	and	w23, w23, 65535
+	orr	w3, w24, w3, lsl 10
 	str	w3, [x4, 4]
-.L1142:
+.L884:
 	add	x2, x2, 2
-	b	.L1141
-.L1169:
-	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	b	.L883
+.L914:
+	ldr	x4, [x20, #:lo12:.LANCHOR103]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 188]
 	lsr	w0, w5, 10
 	bl	P2V_plane
 	and	w0, w0, 65535
-	cmp	w23, w26
-	bcc	.L1145
+	cmp	w24, w26
+	bcc	.L887
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1145
-	cmp	w23, w22
+	bhi	.L887
+	cmp	w24, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1146
+	beq	.L888
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1147
+	beq	.L889
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1148
+	beq	.L890
 	ldrh	w0, [x19]
-.L1230:
+.L974:
 	bl	decrement_vpc_count
-	b	.L1145
-.L1148:
+	b	.L887
+.L890:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L1149
+	beq	.L891
 	ldr	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w1, [x0, #:lo12:.LANCHOR83]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1149
+	cbz	w0, .L891
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR71]
-.L1149:
-	ldp	w24, w0, [x3, 8]
+	str	w0, [x1, #:lo12:.LANCHOR83]
+.L891:
+	ldp	w23, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
 	mov	w2, 0
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR145]
+	ldr	w1, [x28, #:lo12:.LANCHOR134]
+	ldr	w3, [x29, 180]
 	cmn	w1, #1
-	beq	.L1150
+	beq	.L892
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1150
-	ldr	w1, [x29, 180]
-	cmn	w1, #1
-	beq	.L1151
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	cbz	w0, .L892
+	cmn	w3, #1
+	beq	.L893
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
-	add	x0, x0, x25
-	ldr	x3, [x0, 16]
-	str	w1, [x0, 4]
 	mov	w1, 1
-	str	x3, [x29, 136]
+	add	x0, x0, x25
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
-	ldr	x3, [x29, 136]
-	add	x4, x0, x25
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	ldr	x4, [x29, 136]
+	add	x3, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1152
-.L1153:
+	bne	.L894
+.L895:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L1160:
+.L902:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1145
-.L1174:
+	beq	.L887
+.L919:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	and	w24, w0, 65535
+	and	w23, w0, 65535
 	adrp	x0, .LANCHOR5
-	mov	w3, w24
+	mov	w3, w23
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
-	cmp	w0, w24
-	bhi	.L1165
-	mov	w2, 2019
-	adrp	x1, .LANCHOR166
+	cmp	w0, w23
+	bhi	.L910
+	mov	w2, 2065
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR166
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
-	str	w24, [x29, 136]
+	str	w23, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L1165:
+.L910:
 	adrp	x1, .LANCHOR42
-	ubfiz	x0, x24, 1, 16
+	ubfiz	x0, x23, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1166
+	cbz	w0, .L911
 	mov	w0, w3
-	b	.L1230
-.L1151:
+	b	.L974
+.L893:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1145
+	bne	.L887
 	mov	w2, 1
 	add	x1, x29, 180
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
-.L1145:
+.L887:
 	add	x25, x25, 32
-	b	.L1144
-.L1152:
-	ldr	w0, [x3, 8]
-	cmp	w24, w0
-	bne	.L1153
-	ldr	w0, [x3, 4]
+	b	.L886
+.L894:
+	ldr	w0, [x4, 8]
+	cmp	w23, w0
+	bne	.L895
+	ldr	w0, [x4, 4]
 	str	w0, [x29, 136]
-	str	x3, [x29, 96]
+	str	x4, [x29, 96]
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1153
+	cbz	w0, .L895
 	ldp	w0, w1, [x29, 184]
-	ldr	x3, [x29, 96]
+	ldr	x4, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L1155
-.L1229:
-	mov	w0, w24
+	bne	.L897
+.L971:
+	mov	w0, w23
 	bl	FtlReUsePrevPpa
-	b	.L1153
-.L1155:
+	b	.L895
+.L897:
 	cmp	w0, w1
-	beq	.L1153
+	beq	.L895
 	cmn	w0, #1
-	beq	.L1156
-	ldr	x3, [x4, 16]
+	beq	.L898
+	ldr	x4, [x3, 16]
 	mov	w2, 0
-	str	w0, [x4, 4]
+	str	w0, [x3, 4]
 	mov	w1, 1
-	str	x3, [x29, 96]
-	mov	x0, x4
+	str	x4, [x29, 96]
+	mov	x0, x3
 	bl	FlashReadPages
-	ldr	x3, [x29, 96]
-.L1157:
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x4, [x29, 96]
+.L899:
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1158
+	beq	.L900
 	ldr	x0, [x29, 104]
-	ldr	w3, [x3, 4]
+	ldr	w3, [x4, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1158
+	cbz	w0, .L900
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1153
-.L1158:
+	cbz	w0, .L895
+.L900:
 	ldr	w1, [x29, 180]
-	b	.L1229
-.L1156:
-	str	w0, [x4]
-	b	.L1157
-.L1150:
+	b	.L971
+.L898:
+	str	w0, [x3]
+	b	.L899
+.L892:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1160
+	beq	.L902
+	adrp	x0, .LANCHOR8
+	ldr	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w3, lsr 10
+	bhi	.L904
+	cmn	w3, #1
+.L973:
+	bne	.L887
 	mov	w2, 1
 	add	x1, x29, 188
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1160
+	beq	.L902
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1174
+	beq	.L919
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1164
+	beq	.L909
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1164
+	beq	.L909
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1160
-.L1164:
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	bne	.L902
+.L909:
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1160
+	beq	.L902
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1160
+	cbnz	w0, .L902
 	mov	w2, 1
 	add	x1, x29, 184
-	mov	w0, w24
+	mov	w0, w23
 	bl	log2phys
-	b	.L1160
-.L1166:
-	mov	w1, w24
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	b	.L902
+.L904:
+	ldr	x0, [x20, #:lo12:.LANCHOR103]
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 136]
+	bl	FlashReadPages
+	ldr	x4, [x29, 136]
+	ldr	w0, [x4, 8]
+	cmp	w23, w0
+	bne	.L887
+	ldrh	w1, [x4]
+	mov	w0, 61589
+	cmp	w1, w0
+	b	.L973
+.L911:
+	mov	w1, w23
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
-	b	.L1145
-.L1147:
+	b	.L887
+.L889:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1167
-	adrp	x1, .LANCHOR169
-	add	x1, x1, :lo12:.LANCHOR169
+	bhi	.L912
+	adrp	x1, .LANCHOR158
+	add	x1, x1, :lo12:.LANCHOR158
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1167:
+.L912:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	ldr	w0, [x28, #:lo12:.LANCHOR134]
 	cmn	w0, #1
-	bne	.L1168
-.L1231:
-	str	w21, [x28, #:lo12:.LANCHOR145]
-	b	.L1145
-.L1168:
+	bne	.L913
+.L975:
+	str	w21, [x28, #:lo12:.LANCHOR134]
+	b	.L887
+.L913:
 	cmp	w21, w0
-	bcs	.L1145
-	b	.L1231
-.L1171:
+	bcs	.L887
+	b	.L975
+.L916:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1170
-.L1146:
+	b	.L915
+.L888:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L1233
+	b	.L977
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlWriteDump_data,"ax",@progbits
+	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
-	.global	FtlWriteDump_data
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	stp	x29, x30, [sp, -128]!
+	.global	ftl_check_vpc
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
-	add	x0, x19, :lo12:.LANCHOR51
-	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w2, [x0, 4]
-	str	x25, [sp, 64]
-	cbz	w2, .L1235
-	ldrb	w1, [x0, 8]
-	cbnz	w1, .L1235
-	adrp	x3, .LANCHOR19
-	ldrb	w1, [x0, 7]
-	ldrh	w3, [x3, #:lo12:.LANCHOR19]
-	mul	w1, w1, w3
-	cmp	w2, w1
-	beq	.L1235
-	ldrb	w0, [x0, 10]
-	cbnz	w0, .L1234
-	adrp	x0, .LANCHOR61
-	mov	w2, 0
-	add	x1, x29, 92
-	ldr	w21, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR3
-	sub	w21, w21, #1
-	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	mov	w0, w21
-	bl	log2phys
-	adrp	x2, .LANCHOR123
-	adrp	x0, .LANCHOR115
-	ldr	w1, [x29, 92]
-	ldr	x20, [x2, #:lo12:.LANCHOR123]
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
-	cmn	w1, #1
-	str	w1, [x29, 100]
-	stp	x0, x20, [x29, 104]
-	str	w21, [x29, 120]
-	str	wzr, [x20, 4]
-	beq	.L1237
-	mov	w2, 0
-	mov	w1, 1
-	add	x0, x29, 96
-	bl	FlashReadPages
-.L1238:
-	adrp	x23, .LANCHOR71
-	lsl	w25, w25, 2
-	add	x22, x19, :lo12:.LANCHOR51
-	add	x23, x23, :lo12:.LANCHOR71
-	mov	w0, -3947
-	mov	w24, 0
-	strh	w0, [x20]
-.L1239:
-	cmp	w25, w24
-	bne	.L1243
-.L1240:
-	add	x19, x19, :lo12:.LANCHOR51
-	mov	w0, 1
-	strb	w0, [x19, 10]
-.L1234:
+	adrp	x23, .LANCHOR152
+	add	x23, x23, :lo12:.LANCHOR152
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR159
+	stp	x27, x28, [sp, 80]
+	add	x1, x21, :lo12:.LANCHOR159
+	adrp	x20, check_vpc_table
+	bl	printf
+	add	x19, x20, :lo12:check_vpc_table
+	mov	w2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+.L979:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L981
+	adrp	x22, .LANCHOR5
+	adrp	x24, .LC26
+	add	x22, x22, :lo12:.LANCHOR5
+	add	x26, x20, :lo12:check_vpc_table
+	add	x24, x24, :lo12:.LC26
+	mov	w23, 0
+	mov	w19, 0
+	adrp	x25, .LANCHOR42
+.L982:
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L984
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L985
+	adrp	x0, .LANCHOR48
+	adrp	x25, .LC27
+	add	x20, x20, :lo12:check_vpc_table
+	add	x25, x25, :lo12:.LC27
+	ldrh	w26, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR40
+	mov	x24, x0
+	mov	w22, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	adrp	x27, .LANCHOR42
+	mov	w28, 6
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L986:
+	cmp	w22, w26
+	bne	.L988
+.L985:
+	cbz	w23, .L978
+	adrp	x0, .LC1
+	mov	w2, 2389
+	add	x1, x21, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L978:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 128
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1237:
-	adrp	x1, .LANCHOR23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w1, 255
-	bl	ftl_memset
-	b	.L1238
-.L1243:
-	ldrh	w0, [x22, 4]
-	cbz	w0, .L1240
-	ldr	w0, [x29, 100]
-	add	w24, w24, 1
-	stp	w21, w0, [x20, 8]
-	ldrh	w0, [x22]
-	strh	w0, [x20, 2]
-	mov	x0, x22
-	bl	get_new_active_ppa
-	str	w0, [x29, 100]
-	ldr	w0, [x23]
-	mov	w3, 0
-	str	w0, [x20, 4]
+.L981:
 	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x23]
-	add	x0, x29, 96
-	bl	FlashProgPages
-	ldrh	w0, [x22]
-	bl	decrement_vpc_count
-	b	.L1239
-.L1235:
-	add	x19, x19, :lo12:.LANCHOR51
-	strb	wzr, [x19, 10]
-	b	.L1234
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",@progbits
+	beq	.L980
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L980:
+	add	w22, w22, 1
+	b	.L979
+.L984:
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L983
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L983
+	ldrh	w1, [x26, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.L983:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L982
+.L988:
+	ldr	x1, [x27, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L987
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w23, 1
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.L987:
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	umull	x19, w19, w28
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L985
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L986
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
-	.global	l2p_flush
-	.type	l2p_flush, %function
-l2p_flush:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR33
-	add	x20, x20, :lo12:.LANCHOR33
-	str	x21, [sp, 32]
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #96
+	adrp	x0, .LC28
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC28
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR138
+	stp	x21, x22, [sp, 48]
 	mov	w19, 0
-	adrp	x21, .LANCHOR55
-	bl	FtlWriteDump_data
-.L1253:
-	ldrh	w0, [x20]
-	cmp	w0, w19
-	bhi	.L1255
-	mov	w0, 0
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	adrp	x21, .LANCHOR152
+	add	x22, x20, :lo12:.LANCHOR138
+	add	x21, x21, :lo12:.LANCHOR152
+	str	x23, [sp, 64]
+	bl	printf
+.L1004:
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L1010
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
 	ret
-.L1255:
-	ldr	x1, [x21, #:lo12:.LANCHOR55]
-	ubfiz	x0, x19, 4, 16
-	add	x0, x1, x0
-	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1254
+.L1010:
+	mov	w2, 0
+	add	x1, x29, 76
 	mov	w0, w19
-	bl	flush_l2p_region
-.L1254:
+	bl	log2phys
+	tst	x19, 2047
+	bne	.L1005
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC29
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.L1005:
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L1007
+	add	x0, x20, :lo12:.LANCHOR138
+	str	wzr, [x20, #:lo12:.LANCHOR138]
+	mov	w2, 0
+	str	w1, [x0, 4]
+	adrp	x1, .LANCHOR106
+	str	w19, [x0, 24]
+	ldr	x1, [x1, #:lo12:.LANCHOR106]
+	str	x1, [x0, 8]
+	adrp	x1, .LANCHOR114
+	ldr	x23, [x1, #:lo12:.LANCHOR114]
+	mov	w1, 1
+	str	x23, [x0, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR138]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L1008
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L1007
+.L1008:
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC30
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC30
+	mov	w1, w19
+	bl	printf
+.L1007:
 	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1253
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	b	.L1004
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
-	.global	FtlSuperblockPowerLostFix
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR123
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR160
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	mov	w0, -1
+	ldrh	w20, [x26, #:lo12:.LANCHOR160]
+	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
-	str	w0, [x29, 72]
-	adrp	x0, .LANCHOR115
-	ldr	x21, [x1, #:lo12:.LANCHOR123]
-	mov	w1, -3
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
-	adrp	x22, .LANCHOR71
-	str	x21, [x29, 64]
-	add	x22, x22, :lo12:.LANCHOR71
-	str	x0, [x29, 56]
-	ldrh	w20, [x19, 4]
-	str	w1, [x21, 8]
-	mov	w1, -2
-	str	w1, [x21, 12]
-	and	w20, w20, 1
-	ldrh	w1, [x19]
-	add	w20, w20, 6
-	strh	w1, [x21, 2]
-	strh	wzr, [x21]
-	mov	w1, 61589
-	str	w1, [x0]
-	mov	w1, 22136
-	movk	w1, 0x1234, lsl 16
-	str	w1, [x0, 4]
-.L1263:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1259
-.L1260:
+	stp	x23, x24, [sp, 48]
+	cmp	w20, w0
+	stp	x27, x28, [sp, 80]
+	beq	.L1033
+	cbnz	w20, .L1013
+.L1014:
+	bl	FtlGcPageVarInit
+	b	.L1015
+.L1033:
+	mov	w20, 0
+.L1013:
+	adrp	x0, .LANCHOR19
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w1
+	beq	.L1014
+.L1015:
+	adrp	x27, .LANCHOR152
+	add	x27, x27, :lo12:.LANCHOR152
+.L1016:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR42
-	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR42]
-	lsl	x0, x0, 1
-	ldrh	w1, [x2, x0]
-	sub	w1, w1, w3
-	strh	w1, [x2, x0]
+	mov	w23, 65535
+	strb	wzr, [x19, 8]
+	cmp	w0, w23
+	beq	.L1017
+.L1032:
+	adrp	x1, .LANCHOR64
+	adrp	x24, .LANCHOR103
+	add	x4, x19, 16
+	mov	w21, 0
+	ldr	x5, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x24, #:lo12:.LANCHOR103]
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR65
+	ldr	x7, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR24
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR3
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1018:
+	cmp	x4, x1
+	bne	.L1020
+	mov	w1, w21
+	ubfiz	x21, x21, 5, 16
+	mov	x22, 0
+	mov	w2, 0
+	bl	FlashReadPages
+.L1021:
+	cmp	x21, x22
+	bne	.L1031
 	adrp	x0, .LANCHOR19
-	strb	wzr, [x19, 6]
-	strh	wzr, [x19, 4]
+	add	w20, w20, 1
+	and	w20, w20, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	strh	w0, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+	cmp	w0, w20
+	bhi	.L1032
+.L1017:
+	strh	w20, [x19, 2]
+	mov	w0, -1
+	strb	wzr, [x19, 6]
+	mov	w1, w20
+	strh	w0, [x26, #:lo12:.LANCHOR160]
+	mov	w2, 0
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	mov	w0, -1
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 80
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1259:
-	mov	x0, x19
-	bl	get_new_active_ppa
-	str	w0, [x29, 52]
-	cmn	w0, #1
-	beq	.L1260
-	ldr	w0, [x22]
-	mov	w3, 0
-	str	w0, [x21, 4]
+.L1020:
+	ldrh	w3, [x4]
+	cmp	w3, w23
+	beq	.L1019
+	ubfiz	x2, x21, 5, 16
+	orr	w3, w20, w3, lsl 10
+	add	x2, x0, x2
+	str	w3, [x2, 4]
+	mul	w3, w21, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	mul	w3, w21, w8
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
+.L1019:
+	add	x4, x4, 2
+	b	.L1018
+.L1031:
+	ldr	x1, [x24, #:lo12:.LANCHOR103]
+	add	x0, x1, x22
+	ldr	w1, [x1, x22]
+	ldr	w28, [x0, 4]
+	cbnz	w1, .L1022
+	ldr	x25, [x0, 16]
+	ldrh	w0, [x25]
+	cmp	w0, w23
+	beq	.L1022
+	ldr	w0, [x25, 8]
+	ldr	w1, [x27]
+	cmp	w0, w1
+	bls	.L1024
+.L1022:
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x19]
+	mov	w20, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	bl	FtlGcPageVarInit
+	b	.L1016
+.L1024:
+	add	x1, x29, 108
 	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
+	bl	log2phys
+	ldr	w0, [x25, 12]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	beq	.L1026
+.L1027:
+	ldp	w2, w0, [x25, 8]
+	mov	w1, w28
+	add	x22, x22, 32
+	bl	FtlGcUpdatePage
+	b	.L1021
+.L1026:
 	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x22]
-	add	x0, x29, 48
-	bl	FlashProgPages
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-	subs	w20, w20, #1
-	bne	.L1263
-	b	.L1260
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	beq	.L1027
+	str	w0, [x29, 116]
+	adrp	x0, .LANCHOR110
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR115
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	str	x0, [x29, 128]
+	add	x0, x29, 112
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x24, #:lo12:.LANCHOR103]
+	ldr	x3, [x29, 120]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+	add	x2, x2, x22
+	mov	x0, 0
+	ubfiz	x1, x1, 9, 16
+.L1028:
+	cmp	x0, x1
+	beq	.L1027
+	ldr	x4, [x2, 8]
+	ldr	w5, [x4, x0]
+	add	x0, x0, 4
+	add	x4, x3, x0
+	ldr	w4, [x4, -4]
+	cmp	w5, w4
+	beq	.L1028
+	ldrh	w1, [x19]
+	adrp	x0, .LC31
+	ldr	w2, [x29, 116]
+	add	x0, x0, :lo12:.LC31
+	bl	printf
+	b	.L1022
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartWrite
@@ -8990,7 +7457,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1279
+	bhi	.L1051
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -9000,9 +7467,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1273:
-	cbnz	w20, .L1278
-.L1271:
+.L1045:
+	cbnz	w20, .L1050
+.L1043:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9011,11 +7478,11 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1278:
+.L1050:
 	ldrh	w1, [x25]
-	adrp	x0, .LANCHOR133
-	adrp	x27, .LANCHOR117
-	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR123
+	adrp	x27, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
 	udiv	w22, w28, w1
 	ldr	w2, [x0, w21, uxtw 2]
 	and	w0, w20, 65535
@@ -9024,10 +7491,10 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1275
+	cbz	w2, .L1047
 	cmp	w19, w1
-	beq	.L1275
-	ldr	x0, [x27, #:lo12:.LANCHOR117]
+	beq	.L1047
+	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w2, [x29, 116]
@@ -9036,19 +7503,19 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1276:
+.L1048:
 	lsl	w4, w19, 9
-	ldr	x0, [x27, #:lo12:.LANCHOR117]
+	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	lsl	w22, w22, 7
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x27, #:lo12:.LANCHOR117]
+	ldr	x2, [x27, #:lo12:.LANCHOR108]
 	mov	w1, w21
-	adrp	x0, .LANCHOR158
-	add	x0, x0, :lo12:.LANCHOR158
+	adrp	x0, .LANCHOR161
+	add	x0, x0, :lo12:.LANCHOR161
 	sub	w20, w20, w19
 	add	w28, w28, w19
 	add	w21, w21, 1
@@ -9057,72 +7524,72 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1273
-.L1275:
+	b	.L1045
+.L1047:
 	ldrh	w2, [x26]
 	mov	w1, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR117]
+	ldr	x0, [x27, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-	b	.L1276
-.L1279:
+	b	.L1048
+.L1051:
 	mov	w23, -1
-	b	.L1271
+	b	.L1043
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR81
-	add	x2, x0, :lo12:.LANCHOR81
-	ldr	w1, [x0, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR135
+	add	x2, x0, :lo12:.LANCHOR135
+	ldr	w1, [x0, #:lo12:.LANCHOR135]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1284
+	bne	.L1056
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR162
+	ldr	w0, [x0, #:lo12:.LANCHOR162]
 	str	w0, [x2, 88]
-	adrp	x0, .LANCHOR69
-	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR163
+	ldr	w0, [x0, #:lo12:.LANCHOR163]
 	str	w0, [x2, 92]
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR84
+	ldr	w0, [x0, #:lo12:.LANCHOR84]
 	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR64
-	ldr	w0, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR85
+	ldr	w0, [x0, #:lo12:.LANCHOR85]
 	str	w0, [x2, 12]
-	adrp	x0, .LANCHOR62
-	ldr	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR89
+	ldr	w0, [x0, #:lo12:.LANCHOR89]
 	str	w0, [x2, 16]
-	adrp	x0, .LANCHOR66
-	ldr	w0, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
 	str	w0, [x2, 20]
-	adrp	x0, .LANCHOR73
-	ldr	w0, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR91
+	ldr	w0, [x0, #:lo12:.LANCHOR91]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR80
+	ldr	w0, [x0, #:lo12:.LANCHOR80]
 	str	w0, [x2, 32]
-	adrp	x0, .LANCHOR63
-	ldr	w0, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR65
-	ldr	w0, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR87
+	ldr	w0, [x0, #:lo12:.LANCHOR87]
 	str	w0, [x2, 40]
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR92
+	ldr	w0, [x0, #:lo12:.LANCHOR92]
 	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR93
+	ldr	w0, [x0, #:lo12:.LANCHOR93]
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1284:
+.L1056:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -9130,34 +7597,34 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x2, .LANCHOR170
-	ldrh	w1, [x2, #:lo12:.LANCHOR170]
+	adrp	x2, .LANCHOR164
+	ldrh	w1, [x2, #:lo12:.LANCHOR164]
 	cmp	w1, 31
-	bhi	.L1290
+	bhi	.L1062
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR170]
+	strh	w1, [x2, #:lo12:.LANCHOR164]
 	mov	w1, 1
-.L1287:
-	adrp	x2, .LANCHOR127
-	cbnz	w0, .L1288
-	ldr	x0, [x2, #:lo12:.LANCHOR127]
+.L1059:
+	adrp	x2, .LANCHOR118
+	cbnz	w0, .L1060
+	ldr	x0, [x2, #:lo12:.LANCHOR118]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1292
-.L1288:
+	bcc	.L1064
+.L1060:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR127]
+	ldr	x2, [x2, #:lo12:.LANCHOR118]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
 	mov	w0, 17221
 	str	wzr, [x2, 4]
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	adrp	x0, .LANCHOR125
-	ldrh	w1, [x0, #:lo12:.LANCHOR125]
+	adrp	x0, .LANCHOR116
+	ldrh	w1, [x0, #:lo12:.LANCHOR116]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
 	ldr	w0, [x2, 8]
@@ -9169,10 +7636,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1290:
+.L1062:
 	mov	w1, 32
-	b	.L1287
-.L1292:
+	b	.L1059
+.L1064:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -9202,19 +7669,19 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1304
+	bhi	.L1076
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
-	adrp	x27, .LANCHOR133
+	adrp	x27, .LANCHOR123
 	ldrh	w20, [x0, #:lo12:.LANCHOR22]
 	adrp	x0, .LANCHOR12
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1297:
-	cbnz	w21, .L1303
-.L1295:
+.L1069:
+	cbnz	w21, .L1075
+.L1067:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9223,8 +7690,8 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1303:
-	ldr	x0, [x27, #:lo12:.LANCHOR133]
+.L1075:
+	ldr	x0, [x27, #:lo12:.LANCHOR123]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
 	ldrh	w19, [x0]
@@ -9236,12 +7703,12 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1299
-	adrp	x28, .LANCHOR117
+	cbz	w4, .L1071
+	adrp	x28, .LANCHOR108
 	mov	w2, 1
 	str	w4, [x29, 96]
 	mov	w1, w2
-	ldr	x0, [x28, #:lo12:.LANCHOR117]
+	ldr	x0, [x28, #:lo12:.LANCHOR108]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w4, [x29, 116]
@@ -9252,45 +7719,45 @@ FtlVendorPartRead:
 	mov	x5, x28
 	ldr	w4, [x29, 96]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR148
+	adrp	x0, .LANCHOR138
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR148]
+	ldr	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w0, 256
-	bne	.L1301
+	bne	.L1073
 	mov	w2, w4
 	mov	w1, w20
-	adrp	x0, .LC107
+	adrp	x0, .LC32
 	str	x28, [x29, 96]
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC32
 	bl	printf
-	ldr	x2, [x28, #:lo12:.LANCHOR117]
+	ldr	x2, [x28, #:lo12:.LANCHOR108]
 	mov	w1, w20
-	adrp	x0, .LANCHOR158
-	add	x0, x0, :lo12:.LANCHOR158
+	adrp	x0, .LANCHOR161
+	add	x0, x0, :lo12:.LANCHOR161
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1301:
-	ldr	x1, [x5, #:lo12:.LANCHOR117]
+.L1073:
+	ldr	x1, [x5, #:lo12:.LANCHOR108]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1302:
+.L1074:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1297
-.L1299:
+	b	.L1069
+.L1071:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1302
-.L1304:
+	b	.L1074
+.L1076:
 	mov	w24, -1
-	b	.L1295
+	b	.L1067
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -9301,28 +7768,28 @@ FtlLoadEctTbl:
 	mov	w0, 64
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR127
-	adrp	x20, .LANCHOR125
-	ldr	x2, [x19, #:lo12:.LANCHOR127]
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	adrp	x19, .LANCHOR118
+	adrp	x20, .LANCHOR116
+	ldr	x2, [x19, #:lo12:.LANCHOR118]
+	ldrh	w1, [x20, #:lo12:.LANCHOR116]
 	bl	FtlVendorPartRead
-	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	ldr	x0, [x19, #:lo12:.LANCHOR118]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1307
-	adrp	x1, .LC108
-	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC108
-	add	x0, x0, :lo12:.LC71
+	beq	.L1079
+	adrp	x1, .LC33
+	adrp	x0, .LC34
+	add	x1, x1, :lo12:.LC33
+	add	x0, x0, :lo12:.LC34
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	ldr	x0, [x19, #:lo12:.LANCHOR118]
 	mov	w1, 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR125]
+	ldrh	w2, [x20, #:lo12:.LANCHOR116]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1307:
+.L1079:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -9338,67 +7805,67 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR81
+	adrp	x19, .LANCHOR135
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR81
+	add	x21, x19, :lo12:.LANCHOR135
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR81]
+	ldr	w0, [x19, #:lo12:.LANCHOR135]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1310
+	beq	.L1082
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1310:
-	ldr	w1, [x19, #:lo12:.LANCHOR81]
-	add	x0, x19, :lo12:.LANCHOR81
+	str	w20, [x19, #:lo12:.LANCHOR135]
+.L1082:
+	ldr	w1, [x19, #:lo12:.LANCHOR135]
+	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
-	adrp	x1, .LANCHOR73
-	bne	.L1311
-	adrp	x2, .LANCHOR68
+	adrp	x1, .LANCHOR91
+	bne	.L1083
+	adrp	x2, .LANCHOR162
 	ldr	w3, [x0, 88]
-	str	w3, [x2, #:lo12:.LANCHOR68]
-	adrp	x2, .LANCHOR69
+	str	w3, [x2, #:lo12:.LANCHOR162]
+	adrp	x2, .LANCHOR163
 	ldr	w3, [x0, 92]
-	str	w3, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR67
+	str	w3, [x2, #:lo12:.LANCHOR163]
+	adrp	x2, .LANCHOR84
 	ldr	w3, [x0, 8]
-	str	w3, [x2, #:lo12:.LANCHOR67]
-	adrp	x2, .LANCHOR64
+	str	w3, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR85
 	ldr	w3, [x0, 12]
-	str	w3, [x2, #:lo12:.LANCHOR64]
-	adrp	x2, .LANCHOR62
+	str	w3, [x2, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR89
 	ldr	w3, [x0, 16]
-	str	w3, [x2, #:lo12:.LANCHOR62]
-	adrp	x2, .LANCHOR66
+	str	w3, [x2, #:lo12:.LANCHOR89]
+	adrp	x2, .LANCHOR88
 	ldr	w3, [x0, 20]
-	str	w3, [x2, #:lo12:.LANCHOR66]
+	str	w3, [x2, #:lo12:.LANCHOR88]
 	ldp	w2, w3, [x0, 28]
-	str	w2, [x1, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR75
-	str	w3, [x2, #:lo12:.LANCHOR75]
-	adrp	x2, .LANCHOR63
+	str	w2, [x1, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR80
+	str	w3, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR86
 	ldr	w3, [x0, 36]
-	str	w3, [x2, #:lo12:.LANCHOR63]
-	adrp	x2, .LANCHOR65
+	str	w3, [x2, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR87
 	ldr	w3, [x0, 40]
-	str	w3, [x2, #:lo12:.LANCHOR65]
-	adrp	x2, .LANCHOR76
+	str	w3, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR92
 	ldr	w3, [x0, 44]
-	str	w3, [x2, #:lo12:.LANCHOR76]
+	str	w3, [x2, #:lo12:.LANCHOR92]
 	ldr	w2, [x0, 48]
-	adrp	x0, .LANCHOR77
-	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1311:
+	adrp	x0, .LANCHOR93
+	str	w2, [x0, #:lo12:.LANCHOR93]
+.L1083:
 	adrp	x0, .LANCHOR14
-	adrp	x2, .LANCHOR72
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR90
+	ldr	w1, [x1, #:lo12:.LANCHOR91]
 	ldrh	w0, [x0, #:lo12:.LANCHOR14]
-	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	ldr	w2, [x2, #:lo12:.LANCHOR90]
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	madd	w0, w0, w2, w1
@@ -9406,8 +7873,8 @@ Ftl_load_ext_data:
 	ldp	x29, x30, [sp], 48
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR74
-	str	w0, [x1, #:lo12:.LANCHOR74]
+	adrp	x1, .LANCHOR145
+	str	w0, [x1, #:lo12:.LANCHOR145]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.sftl_vendor_read,"ax",@progbits
@@ -9418,37 +7885,129 @@ sftl_vendor_read:
 	add	w0, w0, 256
 	b	FtlVendorPartRead
 	.size	sftl_vendor_read, .-sftl_vendor_read
+	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDump_data
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+	ldr	w1, [x0, 56]
+	cbz	w1, .L1086
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x0, 6]
+	adrp	x0, .LANCHOR107
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR138
+	add	x21, x23, :lo12:.LANCHOR138
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	mov	x22, x23
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR114
+	ldr	x24, [x0, #:lo12:.LANCHOR114]
+	ldrh	w0, [x19, 2]
+	str	x25, [sp, 64]
+	str	x24, [x21, 16]
+	str	wzr, [x19, 56]
+	ldr	x25, [x19, 40]
+	cbz	w0, .L1088
+	adrp	x1, .LANCHOR20
+	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+	sub	w1, w1, #1
+	cmp	w0, w1
+	bge	.L1088
+	ldrh	w1, [x19]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1088
+	ldr	x2, [x19, 16]
+	ubfiz	x1, x1, 1, 16
+	sub	w0, w0, #1
+	ldrh	w1, [x2, x1]
+	mov	w2, 1
+	orr	w0, w0, w1, lsl 10
+	mov	w1, w2
+	str	w0, [x21, 4]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	w0, [x23, #:lo12:.LANCHOR138]
+	cmn	w0, #1
+	beq	.L1088
+	ldrh	w1, [x24, 8]
+	ldr	x2, [x19, 40]
+	ubfiz	x0, x1, 2, 16
+	ldr	w2, [x2, x0]
+	ldr	w0, [x21, 4]
+	cmp	w2, w0
+	bne	.L1088
+	ldr	x2, [x21, 8]
+.L1100:
+	mov	x0, x19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	b	FtlMapWritePage
+.L1088:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	ubfiz	x0, x20, 2, 16
+	ldr	w1, [x25, x0]
+	add	x0, x22, :lo12:.LANCHOR138
+	str	w1, [x0, 4]
+	cbz	w1, .L1089
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashReadPages
+.L1090:
+	add	x22, x22, :lo12:.LANCHOR138
+	mov	w1, w20
+	ldr	x2, [x22, 8]
+	b	.L1100
+.L1089:
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x0, 8]
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+	b	.L1090
+.L1086:
+	ret
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR79
+	adrp	x1, .LANCHOR139
 	mov	w2, 19539
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR123
+	adrp	x25, .LANCHOR114
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR148
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR115
+	adrp	x22, .LANCHOR106
 	stp	x27, x28, [sp, 80]
-	add	x28, x22, :lo12:.LANCHOR148
-	ldr	x27, [x25, #:lo12:.LANCHOR123]
-	movk	w2, 0x4654, lsl 16
+	adrp	x21, .LANCHOR138
+	ldr	x27, [x25, #:lo12:.LANCHOR114]
+	add	x28, x21, :lo12:.LANCHOR138
 	stp	x19, x20, [sp, 16]
-	add	x20, x1, :lo12:.LANCHOR79
-	ldr	x0, [x24, #:lo12:.LANCHOR115]
-	adrp	x23, .LANCHOR70
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	mov	w21, 0
+	movk	w2, 0x4654, lsl 16
+	stp	x23, x24, [sp, 48]
+	add	x24, x1, :lo12:.LANCHOR139
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	adrp	x23, .LANCHOR82
+	ldrh	w1, [x1, #:lo12:.LANCHOR139]
+	adrp	x26, .LANCHOR23
 	stp	x0, x27, [x28, 8]
-	mov	w26, 65535
+	mov	w20, 0
 	strh	w1, [x27, 2]
 	mov	w1, -3932
 	strh	w1, [x27]
-	ldr	w1, [x20, 8]
+	ldr	w1, [x24, 8]
 	stp	w1, wzr, [x27, 4]
 	adrp	x1, .LANCHOR39
 	add	x19, x1, :lo12:.LANCHOR39
@@ -9457,7 +8016,7 @@ FtlVpcTblFlush:
 	mov	w1, 72
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x19, 4]
-	ldrh	w1, [x20, 6]
+	ldrh	w1, [x24, 6]
 	adrp	x2, .LANCHOR51
 	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR10
@@ -9490,18 +8049,17 @@ FtlVpcTblFlush:
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x19, 13]
-	adrp	x1, .LANCHOR72
+	adrp	x1, .LANCHOR90
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	ldr	w1, [x1, #:lo12:.LANCHOR90]
 	str	w1, [x19, 32]
-	ldr	w1, [x23, #:lo12:.LANCHOR70]
+	ldr	w1, [x23, #:lo12:.LANCHOR82]
 	str	w1, [x19, 40]
-	adrp	x1, .LANCHOR71
-	ldr	w1, [x1, #:lo12:.LANCHOR71]
+	ldrh	w2, [x26, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR83
+	ldr	w1, [x1, #:lo12:.LANCHOR83]
 	str	w1, [x19, 36]
-	adrp	x1, .LANCHOR23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x28, 8]
@@ -9516,103 +8074,112 @@ FtlVpcTblFlush:
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w1, [x19, #:lo12:.LANCHOR5]
-	mov	x19, x20
-	ldr	x0, [x28, 8]
-	adrp	x20, .LANCHOR20
-	add	x20, x20, :lo12:.LANCHOR20
-	lsr	w2, w1, 3
-	ubfiz	x3, x1, 1, 16
+	ldrh	w0, [x19, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
-	add	x3, x3, 48
-	and	x3, x3, -4
-	add	w2, w2, 4
+	ldr	x3, [x28, 8]
+	mov	x19, x28
 	ldr	x1, [x1, #:lo12:.LANCHOR1]
-	add	x0, x0, x3
+	mov	x28, x24
+	lsr	w2, w0, 3
+	ubfiz	x0, x0, 1, 16
+	add	w2, w2, 4
+	add	x0, x0, 48
+	and	x0, x0, -4
+	adrp	x24, .LANCHOR20
+	add	x0, x3, x0
 	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-	str	x20, [x29, 104]
-.L1315:
-	ldrh	w2, [x19, 2]
-	ldrh	w1, [x19]
-	ldr	x0, [x24, #:lo12:.LANCHOR115]
-	str	x0, [x28, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR123]
-	str	x0, [x28, 16]
+	mov	w0, 65535
+	add	x24, x24, :lo12:.LANCHOR20
+	str	w0, [x29, 108]
+	str	x24, [x29, 96]
+.L1102:
+	ldrh	w2, [x28, 2]
+	ldrh	w1, [x28]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x19, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR114]
+	str	x0, [x19, 16]
 	orr	w0, w2, w1, lsl 10
-	str	w0, [x28, 4]
-	ldrh	w0, [x20]
+	str	w0, [x19, 4]
+	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1316
-	ldrh	w26, [x19, 4]
-	strh	wzr, [x19, 2]
-	strh	w1, [x19, 4]
+	blt	.L1103
+	ldrh	w0, [x28, 4]
+	strh	wzr, [x28, 2]
+	strh	w1, [x28, 4]
+	str	w0, [x29, 108]
 	bl	FtlFreeSysBlkQueueOut
-	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	str	w1, [x19, 8]
+	strh	w0, [x28]
+	ldr	w1, [x23, #:lo12:.LANCHOR82]
+	str	w1, [x28, 8]
 	add	w2, w1, 1
-	str	w2, [x23, #:lo12:.LANCHOR70]
+	str	w2, [x23, #:lo12:.LANCHOR82]
 	ubfiz	w2, w0, 10, 16
-	str	w2, [x28, 4]
-	strh	w0, [x19]
+	str	w2, [x19, 4]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1316:
+.L1103:
+	ldrh	w1, [x26, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	bl	js_hash
+	str	w0, [x27, 12]
 	mov	w3, 1
-	mov	x0, x28
+	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x28]
+	ldrh	w0, [x28, 2]
+	ldr	w1, [x19]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 2]
+	strh	w0, [x28, 2]
 	cmn	w1, #1
-	bne	.L1317
+	bne	.L1104
 	cmp	w0, 1
-	bne	.L1318
-	adrp	x1, .LANCHOR171
+	bne	.L1105
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
-	mov	w2, 1135
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 1138
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1318:
-	ldrh	w0, [x19, 2]
+.L1105:
+	ldrh	w0, [x28, 2]
 	cmp	w0, 1
-	bne	.L1319
-	ldr	x0, [x29, 104]
+	bne	.L1106
+	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L1319:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	cmp	w21, 3
-	bls	.L1315
-	add	x22, x22, :lo12:.LANCHOR148
-	adrp	x0, .LC109
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC109
-	ldr	w1, [x22, 4]
+	strh	w0, [x28, 2]
+.L1106:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	cmp	w20, 3
+	bls	.L1102
+	add	x21, x21, :lo12:.LANCHOR138
+	adrp	x0, .LC35
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC35
+	ldr	w1, [x21, 4]
 	bl	printf
-.L1321:
-	b	.L1321
-.L1317:
+.L1108:
+	b	.L1108
+.L1104:
 	cmp	w0, 1
-	beq	.L1315
+	beq	.L1102
 	cmp	w1, 256
-	beq	.L1315
+	beq	.L1102
+	ldr	w1, [x29, 108]
 	mov	w0, 65535
-	cmp	w26, w0
-	beq	.L1322
+	cmp	w1, w0
+	beq	.L1109
+	ldrh	w0, [x29, 108]
 	mov	w1, 1
-	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.L1322:
+.L1109:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9642,25 +8209,25 @@ FtlSysFlush:
 	.global	sftl_deinit
 	.type	sftl_deinit, %function
 sftl_deinit:
-	adrp	x0, .LANCHOR86
-	ldr	w0, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmp	w0, 1
-	bne	.L1335
+	bne	.L1122
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1335:
+.L1122:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.sftl_discard,"ax",@progbits
+	.section	.text.FtlDiscard,"ax",@progbits
 	.align	2
-	.global	sftl_discard
-	.type	sftl_discard, %function
-sftl_discard:
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
 	stp	x29, x30, [sp, -80]!
 	add	w2, w0, w1
 	add	x29, sp, 0
@@ -9671,56 +8238,56 @@ sftl_discard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1346
+	bhi	.L1133
 	cmp	w19, 31
-	bhi	.L1340
-.L1354:
+	bhi	.L1127
+.L1141:
 	mov	w0, 0
-.L1338:
+.L1125:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1340:
+.L1127:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1341
+	beq	.L1128
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1341:
-	adrp	x22, .LANCHOR172
-	adrp	x23, .LANCHOR63
-	add	x22, x22, :lo12:.LANCHOR172
-	add	x23, x23, :lo12:.LANCHOR63
+.L1128:
+	adrp	x22, .LANCHOR167
+	adrp	x23, .LANCHOR86
+	add	x22, x22, :lo12:.LANCHOR167
+	add	x23, x23, :lo12:.LANCHOR86
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1342:
+.L1129:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1344
-	adrp	x0, .LANCHOR172
-	ldr	w1, [x0, #:lo12:.LANCHOR172]
+	bcs	.L1131
+	adrp	x0, .LANCHOR167
+	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1354
-	str	wzr, [x0, #:lo12:.LANCHOR172]
+	bls	.L1141
+	str	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1354
-.L1344:
+	b	.L1141
+.L1131:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1343
+	beq	.L1130
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -9735,125 +8302,15 @@ sftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1343:
+.L1130:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1342
-.L1346:
+	b	.L1129
+.L1133:
 	mov	w0, -1
-	b	.L1338
-	.size	sftl_discard, .-sftl_discard
-	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
-	.align	2
-	.global	FtlVpcCheckAndModify
-	.type	FtlVpcCheckAndModify, %function
-FtlVpcCheckAndModify:
-	stp	x29, x30, [sp, -96]!
-	adrp	x1, .LANCHOR173
-	adrp	x0, .LC94
-	add	x1, x1, :lo12:.LANCHOR173
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC94
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR128
-	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR61
-	str	x25, [sp, 64]
-	bl	printf
-	adrp	x0, .LANCHOR6
-	mov	w19, 0
-	add	x20, x20, :lo12:.LANCHOR61
-	mov	w1, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x24, #:lo12:.LANCHOR128]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-.L1356:
-	ldr	w0, [x20]
-	cmp	w19, w0
-	bcc	.L1358
-	adrp	x21, .LANCHOR5
-	adrp	x22, .LC110
-	add	x21, x21, :lo12:.LANCHOR5
-	add	x22, x22, :lo12:.LC110
-	mov	w19, 0
-	adrp	x25, .LANCHOR42
-	mov	w23, 65535
-.L1359:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L1364
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	ldr	x25, [sp, 64]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1358:
-	mov	w2, 0
-	add	x1, x29, 92
-	mov	w0, w19
-	bl	log2phys
-	ldr	w0, [x29, 92]
-	cmn	w0, #1
-	beq	.L1357
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	ldr	x2, [x24, #:lo12:.LANCHOR128]
-	ubfiz	x0, x0, 1, 16
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
-.L1357:
-	add	w19, w19, 1
-	b	.L1356
-.L1364:
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x20, x19, 1, 16
-	ldrh	w2, [x0, x20]
-	ldr	x0, [x24, #:lo12:.LANCHOR128]
-	ldrh	w3, [x0, x20]
-	cmp	w2, w3
-	beq	.L1361
-	cmp	w2, w23
-	beq	.L1361
-	mov	w1, w19
-	mov	x0, x22
-	bl	printf
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L1361
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	beq	.L1361
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L1361
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w1, [x0, x20]
-	cbnz	w1, .L1363
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
-	ldrh	w1, [x1, x20]
-	strh	w1, [x0, x20]
-.L1361:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1359
-.L1363:
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
-	ldrh	w1, [x1, x20]
-	strh	w1, [x0, x20]
-	mov	w0, w19
-	bl	update_vpc_list
-	b	.L1361
-	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	b	.L1125
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_new_data_superblock
@@ -9868,46 +8325,46 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1370
-	adrp	x1, .LANCHOR174
+	bcs	.L1143
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC1
-	mov	w2, 2714
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 2760
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1370:
+.L1143:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1371
+	beq	.L1144
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1372
+	cbz	w0, .L1145
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1371:
-	adrp	x1, .LANCHOR142
+.L1144:
+	adrp	x1, .LANCHOR131
 	mov	w0, 1
 	strb	w0, [x21, 8]
 	mov	w2, 65535
-	ldrh	w0, [x1, #:lo12:.LANCHOR142]
+	ldrh	w0, [x1, #:lo12:.LANCHOR131]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1373
+	beq	.L1146
 	cmp	w19, w0
-	bne	.L1374
+	bne	.L1147
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1375
-.L1374:
+	cbz	w1, .L1148
+.L1147:
 	bl	update_vpc_list
-.L1375:
+.L1148:
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR142]
-.L1373:
+	strh	w0, [x20, #:lo12:.LANCHOR131]
+.L1146:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9919,10 +8376,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1372:
+.L1145:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1371
+	b	.L1144
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -9943,24 +8400,24 @@ FtlProgPages:
 	add	x21, x21, 4
 	adrp	x24, .LANCHOR19
 	ldrb	w3, [x3, 9]
-	adrp	x23, .LANCHOR81
+	adrp	x23, .LANCHOR135
 	add	x21, x0, x21
 	add	x24, x24, :lo12:.LANCHOR19
-	add	x23, x23, :lo12:.LANCHOR81
+	add	x23, x23, :lo12:.LANCHOR135
 	bl	FlashProgPages
-.L1381:
+.L1154:
 	cmp	x20, x21
-	beq	.L1388
+	beq	.L1161
 	sub	x22, x20, #4
 	adrp	x25, .LANCHOR42
-	b	.L1389
-.L1384:
+	b	.L1162
+.L1157:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1382
+	bne	.L1155
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9971,12 +8428,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1382:
+.L1155:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1383
+	cbnz	w0, .L1156
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1383:
+.L1156:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -9992,22 +8449,22 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1389:
+.L1162:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1384
+	beq	.L1157
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1385
-	adrp	x1, .LANCHOR175
+	bcc	.L1158
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 957
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 960
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1385:
+.L1158:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -10021,35 +8478,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1386
+	beq	.L1159
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1387
-	adrp	x0, .LC111
+	cbnz	w0, .L1160
+	adrp	x0, .LC36
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC111
+	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L1387:
+.L1160:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1386:
+.L1159:
 	add	x20, x20, 32
-	b	.L1381
-.L1388:
+	b	.L1154
+.L1161:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1380
-	adrp	x1, .LANCHOR175
+	bcc	.L1153
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 972
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 975
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1380:
+.L1153:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10063,68 +8520,40 @@ FtlProgPages:
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
 	stp	x29, x30, [sp, -112]!
-	mov	w2, 65535
+	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR19
+	adrp	x21, .LANCHOR133
 	ldrh	w20, [x19, #:lo12:.LANCHOR53]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w20, w2
+	cmp	w20, w1
 	str	x27, [sp, 80]
-	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-	bne	.L1396
-.L1406:
-	adrp	x0, .LANCHOR144
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	mov	w1, 65535
-	str	wzr, [x0, #:lo12:.LANCHOR144]
-	cmp	w2, w1
-	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1419
-.L1422:
-	mov	w0, 0
-.L1395:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1396:
-	cbz	w0, .L1399
-	adrp	x0, .LANCHOR162
-	ldrh	w3, [x0, #:lo12:.LANCHOR162]
-	cmp	w3, w2
-	beq	.L1400
-.L1401:
-	mov	w1, 2
-.L1399:
+	beq	.L1169
+	adrp	x1, .LANCHOR19
 	add	x0, x19, :lo12:.LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1402
+	beq	.L1169
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1403
+	bls	.L1170
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1403:
-	adrp	x0, .LANCHOR144
-	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR144]
-	cbnz	w1, .L1404
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+.L1170:
+	ldr	w0, [x21, #:lo12:.LANCHOR133]
+	cbnz	w0, .L1171
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
@@ -10132,107 +8561,111 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1404:
-	str	wzr, [x19, #:lo12:.LANCHOR144]
-.L1415:
+.L1171:
+	str	wzr, [x21, #:lo12:.LANCHOR133]
 	mov	w0, 1
-	b	.L1395
-.L1400:
-	strh	wzr, [x0, #:lo12:.LANCHOR162]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 17
-	bhi	.L1401
-	b	.L1399
-.L1402:
-	adrp	x0, .LANCHOR162
-	ldrh	w1, [x0, #:lo12:.LANCHOR162]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1415
-	b	.L1406
-.L1419:
-	ldrb	w0, [x0, 7]
-	adrp	x20, .LANCHOR97
-	ldrh	w2, [x21, #:lo12:.LANCHOR19]
-	ldrh	w1, [x20, #:lo12:.LANCHOR97]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	beq	.L1407
-	adrp	x1, .LANCHOR176
+.L1168:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1169:
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	str	wzr, [x21, #:lo12:.LANCHOR133]
+	add	x0, x19, :lo12:.LANCHOR53
+	cmp	w2, w1
+	bne	.L1173
+.L1188:
+	mov	w0, 0
+	b	.L1168
+.L1173:
+	ldrb	w1, [x0, 7]
+	adrp	x0, .LANCHOR19
+	adrp	x20, .LANCHOR70
+	mov	x21, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR19]
+	ldrh	w2, [x20, #:lo12:.LANCHOR70]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L1174
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 162
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1407:
+.L1174:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
-	adrp	x25, .LANCHOR61
+	adrp	x25, .LANCHOR152
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LANCHOR176
+	adrp	x26, .LANCHOR170
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR61
+	add	x25, x25, :lo12:.LANCHOR152
 	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	add	x26, x26, :lo12:.LANCHOR176
+	add	x26, x26, :lo12:.LANCHOR170
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR67
-	ldrh	w0, [x20, #:lo12:.LANCHOR97]
-	ldr	w2, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR84
+	ldrh	w0, [x20, #:lo12:.LANCHOR70]
+	ldr	w2, [x1, #:lo12:.LANCHOR84]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR67]
-.L1408:
-	ldrh	w0, [x20, #:lo12:.LANCHOR97]
+	str	w0, [x1, #:lo12:.LANCHOR84]
+.L1175:
+	ldrh	w0, [x20, #:lo12:.LANCHOR70]
 	cmp	w0, w21
-	bhi	.L1412
+	bhi	.L1179
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1413
+	cbz	w1, .L1180
 	bl	INSERT_DATA_LIST
-.L1414:
-	adrp	x0, .LANCHOR95
+.L1181:
+	adrp	x0, .LANCHOR68
 	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR97]
+	strh	wzr, [x20, #:lo12:.LANCHOR70]
 	strh	w21, [x19, #:lo12:.LANCHOR53]
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
+	strh	wzr, [x0, #:lo12:.LANCHOR68]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR80
-	strh	w21, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR144
+	strh	w21, [x0, #:lo12:.LANCHOR144]
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR78
-	ldrh	w0, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR171
+	ldrh	w0, [x0, #:lo12:.LANCHOR171]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1422
-	adrp	x0, .LANCHOR82
+	ble	.L1188
+	adrp	x0, .LANCHOR100
 	mov	w1, 20
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1422
-.L1412:
-	adrp	x0, .LANCHOR98
+	strh	w1, [x0, #:lo12:.LANCHOR100]
+	b	.L1188
+.L1179:
+	adrp	x0, .LANCHOR71
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR98]
+	ldr	x27, [x0, #:lo12:.LANCHOR71]
 	umull	x24, w21, w24
 	ldr	w0, [x25]
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1409
+	bcc	.L1176
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1409:
+.L1176:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -10240,7 +8673,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1410
+	bne	.L1177
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -10249,21 +8682,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L1421:
+.L1187:
 	bl	decrement_vpc_count
-.L1411:
+.L1178:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1408
-.L1410:
+	b	.L1175
+.L1177:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1411
+	beq	.L1178
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1421
-.L1413:
+	b	.L1187
+.L1180:
 	bl	INSERT_FREE_LIST
-	b	.L1414
+	b	.L1181
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -10282,15 +8715,15 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1423
-	adrp	x0, .LANCHOR140
-	add	x0, x0, :lo12:.LANCHOR140
+	bcc	.L1189
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	bl	FtlMapBlkWriteDump_data
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR144
-	str	wzr, [x0, #:lo12:.LANCHOR144]
-.L1423:
+	adrp	x0, .LANCHOR133
+	str	wzr, [x0, #:lo12:.LANCHOR133]
+.L1189:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -10301,12 +8734,12 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR168
+	adrp	x0, .LANCHOR157
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	str	wzr, [x0, #:lo12:.LANCHOR168]
+	str	wzr, [x0, #:lo12:.LANCHOR157]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -10335,41 +8768,41 @@ Ftl_gc_temp_data_write_back:
 	mov	w2, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR89
-	adrp	x20, .LANCHOR113
-	ldr	w1, [x19, #:lo12:.LANCHOR89]
-	add	x19, x19, :lo12:.LANCHOR89
-	ldr	x0, [x20, #:lo12:.LANCHOR113]
+	adrp	x19, .LANCHOR62
+	adrp	x20, .LANCHOR104
+	ldr	w1, [x19, #:lo12:.LANCHOR62]
+	add	x19, x19, :lo12:.LANCHOR62
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1429:
+.L1195:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1432
-	ldr	x0, [x20, #:lo12:.LANCHOR113]
+	bcc	.L1198
+	ldr	x0, [x20, #:lo12:.LANCHOR104]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1433
+	cbnz	w0, .L1199
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1435
-.L1432:
-	ldr	x2, [x20, #:lo12:.LANCHOR113]
+	b	.L1201
+.L1198:
+	ldr	x2, [x20, #:lo12:.LANCHOR104]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1430
+	bne	.L1196
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
 	ldr	x3, [x3, #:lo12:.LANCHOR42]
 	strh	wzr, [x3, x4, lsl 1]
 	strh	w2, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -10378,23 +8811,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1435:
+.L1201:
 	mov	w0, 1
-.L1428:
+.L1194:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1430:
+.L1196:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1429
-.L1433:
+	b	.L1195
+.L1199:
 	mov	w0, 0
-	b	.L1428
+	b	.L1194
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -10409,305 +8842,107 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1437
+	beq	.L1203
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1438
-.L1437:
+	cbnz	w0, .L1204
+.L1203:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
 	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR95
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR97
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR68
+	strh	wzr, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR70
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1438:
+.L1204:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
-	.global	FtlSysBlkInit
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR4
+	.global	rk_ftl_garbage_collect
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR167
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	strh	wzr, [x20, #:lo12:.LANCHOR167]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR79
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1441
-.L1443:
-	mov	w23, -1
-.L1440:
-	mov	w0, w23
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1441:
-	bl	FtlLoadSysInfo
-	mov	w23, w0
-	cbnz	w0, .L1443
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	mov	w0, 1
-	bl	FtlUpdateVaildLpn
-	adrp	x0, .LANCHOR33
-	mov	w1, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR55
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	add	x0, x0, 4
-.L1444:
-	cmp	w1, w3
-	bge	.L1449
-	ldr	w2, [x0], 16
-	tbz	w2, #31, .L1445
-.L1449:
-	adrp	x0, .LANCHOR39
-	add	x4, x0, :lo12:.LANCHOR39
-	cmp	w1, w3
-	mov	x19, x0
-	adrp	x22, .LANCHOR51
-	ldrh	w2, [x4, 28]
-	add	w2, w2, 1
-	strh	w2, [x4, 28]
-	bge	.L1454
-.L1446:
-	add	x21, x22, :lo12:.LANCHOR51
-	adrp	x24, .LANCHOR52
-	mov	x0, x21
-	add	x20, x24, :lo12:.LANCHOR52
-	bl	FtlSuperblockPowerLostFix
-	mov	x0, x20
-	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR42
-	ldrh	w3, [x21, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR42]
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w3
-	adrp	x3, .LANCHOR19
-	strh	w2, [x1, x0]
-	strb	wzr, [x21, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x21, 2]
-	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	strh	wzr, [x21, 4]
-	ldrh	w4, [x20, 4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w4
-	strh	w2, [x1, x0]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x20, 2]
-	add	x0, x19, :lo12:.LANCHOR39
-	strh	wzr, [x20, 4]
-	ldrh	w1, [x0, 30]
-	add	w1, w1, 1
-	strh	w1, [x0, 30]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	b	.L1450
-.L1445:
-	add	w1, w1, 1
-	b	.L1444
-.L1454:
-	ldrh	w0, [x20, #:lo12:.LANCHOR167]
-	cbnz	w0, .L1446
-.L1450:
-	bl	FtlVpcCheckAndModify
-	add	x20, x22, :lo12:.LANCHOR51
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L1440
-	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1440
-	adrp	x21, .LANCHOR52
-	add	x19, x21, :lo12:.LANCHOR52
-	ldrh	w1, [x19, 4]
-	cbnz	w1, .L1440
-	bl	FtlGcRefreshBlock
-	ldrh	w0, [x21, #:lo12:.LANCHOR52]
-	bl	FtlGcRefreshBlock
-	bl	FtlVpcTblFlush
-	mov	x0, x20
-	bl	allocate_new_data_superblock
-	mov	x0, x19
-	bl	allocate_new_data_superblock
-	b	.L1440
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
-	.align	2
-	.global	rk_ftl_garbage_collect
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-	stp	x29, x30, [sp, -176]!
-	adrp	x1, .LANCHOR108
-	add	x29, sp, 0
-	ldr	w2, [x1, #:lo12:.LANCHOR108]
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR94
+	stp	x19, x20, [sp, 16]
+	ldr	w1, [x21, #:lo12:.LANCHOR94]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
-	cbnz	w2, .L1529
+	cbnz	w1, .L1258
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1529
-	str	w0, [x29, 152]
-	adrp	x0, .LANCHOR162
-	ldrh	w1, [x0, #:lo12:.LANCHOR162]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1458
-.L1461:
-	adrp	x0, .LANCHOR100
-	mov	w3, 65535
-	ldrh	w2, [x0, #:lo12:.LANCHOR100]
-	cmp	w2, w3
-	bne	.L1459
-.L1460:
-	bl	FtlReadRefresh
-	adrp	x19, .LANCHOR80
-	adrp	x2, .LANCHOR84
-	ldr	w1, [x29, 152]
-	mov	w21, 65535
-	ldr	w0, [x2, #:lo12:.LANCHOR84]
-	add	w0, w0, 1
-	add	w0, w0, w1, lsl 7
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	str	w0, [x2, #:lo12:.LANCHOR84]
-	cmp	w1, w21
-	bne	.L1462
-	adrp	x3, .LANCHOR53
-	ldrh	w21, [x3, #:lo12:.LANCHOR53]
-	cmp	w21, w1
-	bne	.L1532
-	adrp	x1, .LANCHOR99
-	ldrh	w20, [x1, #:lo12:.LANCHOR99]
-	cmp	w20, w21
-	bne	.L1462
-	adrp	x22, .LANCHOR48
-	mov	w3, 1024
-	ldrh	w1, [x22, #:lo12:.LANCHOR48]
+	bls	.L1258
+	adrp	x1, .LANCHOR73
+	mov	w4, 65535
+	ldrh	w3, [x1, #:lo12:.LANCHOR73]
+	cmp	w3, w4
+	beq	.L1208
+	adrp	x2, .LANCHOR72
+	ldrh	w5, [x2, #:lo12:.LANCHOR72]
+	cmp	w5, w4
+	bne	.L1208
+	strh	w3, [x2, #:lo12:.LANCHOR72]
+	mov	w2, -1
+	strh	w2, [x1, #:lo12:.LANCHOR73]
+.L1208:
+	cbnz	w0, .L1259
+	adrp	x1, .LANCHOR48
+	ldrh	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 24
-	mov	w1, 5120
-	csel	w1, w1, w3, cc
-	cmp	w0, w1
-	bls	.L1535
-	adrp	x0, .LANCHOR177
-	str	wzr, [x2, #:lo12:.LANCHOR84]
-	strh	wzr, [x0, #:lo12:.LANCHOR177]
-	bl	GetSwlReplaceBlock
-	and	w21, w0, 65535
-	cmp	w21, w20
-	bne	.L1536
-	adrp	x5, .LANCHOR83
-	ldrh	w1, [x22, #:lo12:.LANCHOR48]
-	ldrh	w0, [x5, #:lo12:.LANCHOR83]
-	cmp	w1, w0
-	bcs	.L1465
-	mov	w0, 64
-	bl	List_get_gc_head_node
-	and	w0, w0, 65535
-	cmp	w0, w21
-	beq	.L1467
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x0]
-	cmp	w0, 7
-	bhi	.L1468
-	mov	w0, 0
-	bl	List_get_gc_head_node
-	and	w20, w0, 65535
-	mov	w0, 128
-	strh	w0, [x5, #:lo12:.LANCHOR83]
-	cmp	w20, w21
-	bne	.L1464
-.L1467:
-	bl	FtlGcReFreshBadBlk
-.L1462:
-	ldr	w1, [x29, 152]
-	mov	w0, 65535
-	cmp	w1, 0
-	ccmp	w21, w0, 0, eq
-	bne	.L1470
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 24
-	bhi	.L1537
-	adrp	x1, .LANCHOR19
-	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR19]
-	bls	.L1472
+	bhi	.L1260
+	adrp	x2, .LANCHOR19
+	cmp	w1, 16
+	ldrh	w20, [x2, #:lo12:.LANCHOR19]
+	bls	.L1211
 	lsr	w20, w20, 5
-.L1471:
-	adrp	x2, .LANCHOR82
+.L1210:
+	adrp	x2, .LANCHOR100
+	ldrh	w3, [x2, #:lo12:.LANCHOR100]
+	cmp	w3, w1
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR82]
-	cmp	w1, w0
-	bcs	.L1475
-	adrp	x0, .LANCHOR53
-	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w1
-	bne	.L1476
-	adrp	x1, .LANCHOR99
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
-	cmp	w1, w0
-	bne	.L1476
-	adrp	x0, .LANCHOR177
-	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1477
-	adrp	x1, .LANCHOR61
+	bcs	.L1214
+	adrp	x1, .LANCHOR53
+	mov	w4, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w4
+	bne	.L1215
+	adrp	x4, .LANCHOR72
+	ldrh	w4, [x4, #:lo12:.LANCHOR72]
+	cmp	w4, w1
+	bne	.L1215
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
+	cbnz	w0, .L1216
+	adrp	x1, .LANCHOR152
 	adrp	x4, .LANCHOR59
-	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	ldr	w1, [x1, #:lo12:.LANCHOR152]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1478
-.L1477:
-	adrp	x1, .LANCHOR78
-	ldrh	w1, [x1, #:lo12:.LANCHOR78]
+	bcs	.L1217
+.L1216:
+	adrp	x1, .LANCHOR171
+	ldrh	w1, [x1, #:lo12:.LANCHOR171]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1479:
-	adrp	x1, .LANCHOR87
-	str	wzr, [x1, #:lo12:.LANCHOR87]
-.L1456:
+	strh	w1, [x3, #:lo12:.LANCHOR100]
+.L1218:
+	adrp	x1, .LANCHOR95
+	str	wzr, [x1, #:lo12:.LANCHOR95]
+.L1206:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10715,283 +8950,137 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1458:
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	beq	.L1461
-	mov	w0, 1
-	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1461
-	mov	w0, 1
-	b	.L1456
-.L1459:
-	adrp	x1, .LANCHOR99
-	ldrh	w4, [x1, #:lo12:.LANCHOR99]
-	cmp	w4, w3
-	bne	.L1460
-	strh	w2, [x1, #:lo12:.LANCHOR99]
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1460
-.L1468:
-	mov	w0, 64
-.L1564:
-	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1467
-.L1465:
-	mov	w0, 80
-	b	.L1564
-.L1536:
-	mov	w20, w21
-.L1464:
-	adrp	x1, .LANCHOR43
-	ubfiz	x0, x20, 1, 32
-	adrp	x3, .LANCHOR82
-	mov	w21, w20
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR42
-	ldrh	w5, [x3, #:lo12:.LANCHOR82]
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w4, [x2, x0]
-	ldrh	w2, [x22, #:lo12:.LANCHOR48]
-	ldrh	w3, [x1, x0]
-	mov	w1, w20
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
-	bl	printf
-	b	.L1467
-.L1532:
-	mov	w21, w1
-	b	.L1462
-.L1535:
-	mov	w21, w20
-	b	.L1462
-.L1472:
-	cmp	w0, 12
-	bls	.L1473
+.L1211:
+	cmp	w1, 12
+	bls	.L1212
 	lsr	w20, w20, 4
-	b	.L1471
-.L1473:
-	cmp	w0, 8
-	bls	.L1471
+	b	.L1210
+.L1212:
+	cmp	w1, 8
+	bls	.L1210
 	lsr	w20, w20, 2
-	b	.L1471
-.L1537:
+	b	.L1210
+.L1260:
 	mov	w20, 1
-	b	.L1471
-.L1478:
+	b	.L1210
+.L1217:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1479
-.L1476:
-	adrp	x0, .LANCHOR78
-	ldrh	w0, [x0, #:lo12:.LANCHOR78]
-	add	w0, w0, w0, lsl 1
-	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1475:
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1538
+	strh	w1, [x2, #:lo12:.LANCHOR100]
+	b	.L1218
+.L1215:
+	adrp	x1, .LANCHOR171
+	ldrh	w1, [x1, #:lo12:.LANCHOR171]
+	add	w1, w1, w1, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x3, #:lo12:.LANCHOR100]
+.L1214:
+	adrp	x1, .LANCHOR74
+	ldrh	w1, [x1, #:lo12:.LANCHOR74]
+	cbz	w1, .L1209
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1538:
-	mov	w21, 65535
-.L1481:
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	mov	w1, 65535
-	cmp	w0, w1
-	bne	.L1490
-	cmp	w21, w0
-	beq	.L1491
-	strh	w21, [x19, #:lo12:.LANCHOR80]
-.L1492:
-	add	x0, x19, :lo12:.LANCHOR80
+.L1209:
+	adrp	x19, .LANCHOR144
+	str	w0, [x29, 152]
+	mov	w0, 65535
+	ldrh	w2, [x19, #:lo12:.LANCHOR144]
+	cmp	w2, w0
+	bne	.L1221
+	adrp	x0, .LANCHOR72
+	ldrh	w1, [x0, #:lo12:.LANCHOR72]
+	cmp	w1, w2
+	beq	.L1222
+	adrp	x2, .LANCHOR42
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L1223
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR72]
+.L1223:
+	ldrh	w1, [x0, #:lo12:.LANCHOR72]
+	strh	w1, [x19, #:lo12:.LANCHOR144]
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR72]
+.L1222:
+	add	x0, x19, :lo12:.LANCHOR144
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	beq	.L1490
+	beq	.L1221
 	bl	IsBlkInGcList
-	cbz	w0, .L1495
+	cbz	w0, .L1225
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1495:
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1225:
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR80
+	add	x22, x19, :lo12:.LANCHOR144
 	cmp	w1, w0
-	beq	.L1490
+	beq	.L1221
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR178
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR173
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR42
 	strb	wzr, [x22, 6]
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR179
-	strh	w1, [x0, #:lo12:.LANCHOR179]
-.L1490:
+	adrp	x0, .LANCHOR174
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+.L1221:
 	adrp	x1, .LANCHOR51
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	str	x1, [x29, 120]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
+	str	x1, [x29, 128]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1496
+	beq	.L1226
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1497
-.L1496:
+	bne	.L1227
+.L1226:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1497:
-	adrp	x25, .LANCHOR85
-	add	x26, x25, :lo12:.LANCHOR85
-.L1526:
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1227:
+	adrp	x25, .LANCHOR102
+	add	x26, x25, :lo12:.LANCHOR102
+.L1256:
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1498
-	adrp	x0, .LANCHOR87
+	bne	.L1228
+	adrp	x0, .LANCHOR95
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
-	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1499:
-	ldrh	w5, [x25, #:lo12:.LANCHOR85]
-	add	x7, x25, :lo12:.LANCHOR85
+	str	wzr, [x0, #:lo12:.LANCHOR95]
+.L1229:
+	ldrh	w5, [x25, #:lo12:.LANCHOR102]
+	add	x7, x25, :lo12:.LANCHOR102
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR80]
+	strh	w6, [x19, #:lo12:.LANCHOR144]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1500
+	bne	.L1230
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1456
-.L1470:
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	bne	.L1541
-	adrp	x0, .LANCHOR99
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	cmp	w0, w1
-	bne	.L1541
-	cmp	w21, w0
-	bne	.L1541
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	cmp	w0, w21
-	beq	.L1482
-.L1541:
+	b	.L1206
+.L1259:
 	mov	w20, 1
-	b	.L1481
-.L1482:
-	adrp	x0, .LANCHOR87
-	adrp	x22, .LANCHOR48
-	adrp	x20, .LANCHOR82
-	adrp	x23, .LANCHOR177
-	str	wzr, [x0, #:lo12:.LANCHOR87]
-	ldrh	w1, [x22, #:lo12:.LANCHOR48]
-	ldrh	w0, [x20, #:lo12:.LANCHOR82]
-	cmp	w1, w0
-	bls	.L1483
-	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1484
-	adrp	x0, .LANCHOR61
-	adrp	x1, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-	ldr	w1, [x1, #:lo12:.LANCHOR59]
-	add	w0, w0, w0, lsl 1
-	cmp	w1, w0, lsr 2
-	bcs	.L1485
-.L1484:
-	adrp	x0, .LANCHOR78
-	ldrh	w0, [x0, #:lo12:.LANCHOR78]
-	add	w0, w0, w0, lsl 1
-	asr	w0, w0, 2
-.L1565:
-	strh	w0, [x20, #:lo12:.LANCHOR82]
-	bl	FtlReadRefresh
-	mov	w0, 0
-	bl	List_get_gc_head_node
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x0]
-	cmp	w0, 4
-	bls	.L1483
-.L1566:
-	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	b	.L1456
-.L1485:
-	mov	w0, 18
-	b	.L1565
-.L1483:
-	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1541
-	adrp	x0, .LANCHOR78
-	ldrh	w5, [x0, #:lo12:.LANCHOR78]
-	add	w0, w5, w5, lsl 1
-	asr	w0, w0, 2
-	strh	w0, [x20, #:lo12:.LANCHOR82]
-	mov	w0, 0
-	bl	List_get_gc_head_node
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR3
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w2, [x2, #:lo12:.LANCHOR3]
-	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR20
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
-	mul	w0, w0, w2
-	cmp	w1, w0, asr 1
-	ble	.L1488
-	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	sub	w5, w5, #1
-	cmp	w0, w5
-	blt	.L1488
-	bl	FtlReadRefresh
-	b	.L1566
-.L1488:
-	cbnz	w1, .L1541
-	mov	w0, -1
-	bl	decrement_vpc_count
-	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	add	w0, w0, 1
-	b	.L1456
-.L1491:
-	adrp	x0, .LANCHOR99
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	cmp	w1, w21
-	beq	.L1492
-	adrp	x2, .LANCHOR42
-	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR42]
-	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1493
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1493:
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	strh	w1, [x19, #:lo12:.LANCHOR80]
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1492
-.L1500:
+	b	.L1209
+.L1230:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1501
-	strh	w5, [x25, #:lo12:.LANCHOR85]
-	b	.L1499
-.L1501:
+	cbz	w0, .L1231
+	strh	w5, [x25, #:lo12:.LANCHOR102]
+	b	.L1229
+.L1231:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -10999,108 +9088,104 @@ rk_ftl_garbage_collect:
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	and	w5, w5, 65535
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	strh	w5, [x25, #:lo12:.LANCHOR85]
+	strh	w5, [x25, #:lo12:.LANCHOR102]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1503
+	bgt	.L1233
 	cmp	w5, 48
-	bls	.L1504
+	bls	.L1234
 	cmp	w3, 8
-	bls	.L1504
-	adrp	x3, .LANCHOR95
-	ldrh	w3, [x3, #:lo12:.LANCHOR95]
+	bls	.L1234
+	adrp	x3, .LANCHOR68
+	ldrh	w3, [x3, #:lo12:.LANCHOR68]
 	cmp	w3, 35
-	bhi	.L1504
-.L1503:
+	bhi	.L1234
+.L1233:
 	strh	wzr, [x26]
-.L1504:
+.L1234:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1505
-	mov	w0, 65535
-	cmp	w21, w0
-	bne	.L1505
+	bgt	.L1235
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1505
+	bhi	.L1235
 	mov	w0, -1
 	strh	wzr, [x26]
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1567:
-	adrp	x0, .LANCHOR177
-	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	b	.L1456
-.L1505:
-	cbnz	w1, .L1506
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1286:
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
+	b	.L1206
+.L1235:
+	cbnz	w1, .L1236
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1499
-.L1506:
-	add	x0, x19, :lo12:.LANCHOR80
+	b	.L1229
+.L1236:
+	add	x0, x19, :lo12:.LANCHOR144
 	strb	wzr, [x0, 8]
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1507
-	adrp	x1, .LANCHOR180
+	bne	.L1237
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 700
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1507:
+.L1237:
 	adrp	x0, .LANCHOR52
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1508
-	adrp	x1, .LANCHOR180
+	bne	.L1238
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 701
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1508:
+.L1238:
 	adrp	x0, .LANCHOR53
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1509
-	adrp	x1, .LANCHOR180
+	bne	.L1239
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 702
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1509:
-	add	x22, x19, :lo12:.LANCHOR80
+.L1239:
+	add	x22, x19, :lo12:.LANCHOR144
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR178
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR173
+	ldrh	w1, [x19, #:lo12:.LANCHOR144]
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR179
+	adrp	x0, .LANCHOR174
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR179]
+	strh	w1, [x0, #:lo12:.LANCHOR174]
 	strb	wzr, [x22, 6]
-.L1498:
-	ldr	x1, [x29, 144]
+.L1228:
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR108]
+	str	w0, [x21, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR19
-	str	x0, [x29, 112]
+	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1510
+	cbz	w0, .L1240
 	adrp	x0, .LANCHOR3
-	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w2, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR42
@@ -11111,121 +9196,121 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1510:
-	add	x0, x19, :lo12:.LANCHOR80
+.L1240:
+	add	x0, x19, :lo12:.LANCHOR144
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1511
+	ble	.L1241
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1511:
-	adrp	x0, .LANCHOR178
+.L1241:
+	adrp	x0, .LANCHOR173
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR178
-	str	x0, [x29, 136]
-.L1512:
+	add	x0, x0, :lo12:.LANCHOR173
+	str	x0, [x29, 144]
+.L1242:
 	cmp	w20, w28, uxth
-	bls	.L1520
-	add	x1, x19, :lo12:.LANCHOR80
+	bls	.L1250
+	add	x1, x19, :lo12:.LANCHOR144
 	adrp	x0, .LANCHOR3
-	adrp	x23, .LANCHOR93
+	adrp	x23, .LANCHOR66
 	add	x1, x1, 16
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1521
-.L1514:
+	b	.L1251
+.L1244:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1513
+	beq	.L1243
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1513:
+.L1243:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1521:
+.L1251:
 	cmp	w2, w7
-	bne	.L1514
-	add	x1, x19, :lo12:.LANCHOR80
-	adrp	x24, .LANCHOR89
-	add	x24, x24, :lo12:.LANCHOR89
+	bne	.L1244
+	add	x1, x19, :lo12:.LANCHOR144
+	adrp	x24, .LANCHOR62
+	add	x24, x24, :lo12:.LANCHOR62
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-	str	x0, [x29, 128]
-.L1515:
-	ldr	x0, [x29, 128]
-	cmp	x0, x22
-	bne	.L1519
+	str	x0, [x29, 136]
+.L1245:
+	ldr	x0, [x29, 136]
+	cmp	x22, x0
+	bne	.L1249
 	add	w28, w28, 1
-	b	.L1512
-.L1519:
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	b	.L1242
+.L1249:
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1516
+	beq	.L1246
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1516
+	bne	.L1246
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1517
-	str	w4, [x29, 104]
+	bne	.L1247
+	str	w4, [x29, 112]
 	mov	w2, 736
-	adrp	x1, .LANCHOR180
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	ldr	w4, [x29, 104]
-.L1517:
+	ldr	w4, [x29, 112]
+.L1247:
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	ldr	w1, [x29, 172]
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1516
-	ldr	x1, [x29, 136]
-	adrp	x4, .LANCHOR113
-	ldr	x2, [x29, 136]
+	bne	.L1246
+	ldr	x1, [x29, 144]
+	adrp	x4, .LANCHOR104
+	ldr	x2, [x29, 144]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	ldr	x2, [x4, #:lo12:.LANCHOR113]
+	ldr	x2, [x4, #:lo12:.LANCHOR104]
 	ldr	w1, [x24]
 	add	x1, x2, x1, lsl 5
-	stp	x4, x1, [x29, 96]
+	stp	x4, x1, [x29, 104]
 	str	w0, [x1, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldp	x4, x1, [x29, 96]
-	ldr	x2, [x4, #:lo12:.LANCHOR113]
+	ldp	x4, x1, [x29, 104]
+	ldr	x2, [x4, #:lo12:.LANCHOR104]
 	str	w0, [x1, 4]
 	ldr	w1, [x24]
 	ubfiz	x0, x1, 5, 32
 	add	w1, w1, 1
 	add	x2, x2, x0
-	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR66]
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
@@ -11237,136 +9322,75 @@ rk_ftl_garbage_collect:
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	strh	w2, [x27, 2]
-	adrp	x2, .LANCHOR71
+	adrp	x2, .LANCHOR83
 	str	w1, [x24]
 	mov	w1, 1
-	ldr	w2, [x2, #:lo12:.LANCHOR71]
+	ldr	w2, [x2, #:lo12:.LANCHOR83]
 	str	w2, [x27, 4]
 	bl	FtlGcBufAlloc
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1518
+	beq	.L1248
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1516
-.L1518:
+	cbnz	w0, .L1246
+.L1248:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1516
-.L1568:
-	ldr	x0, [x29, 144]
-	str	wzr, [x0, #:lo12:.LANCHOR108]
-	b	.L1567
-.L1516:
+	cbz	w0, .L1246
+.L1287:
+	str	wzr, [x21, #:lo12:.LANCHOR94]
+	b	.L1286
+.L1246:
 	add	x22, x22, 32
-	b	.L1515
-.L1520:
-	add	x1, x19, :lo12:.LANCHOR80
+	b	.L1245
+.L1250:
+	add	x1, x19, :lo12:.LANCHOR144
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	ldr	w0, [x29, 156]
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1522
-	adrp	x0, .LANCHOR89
-	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1523
+	bhi	.L1252
+	adrp	x0, .LANCHOR62
+	ldr	w0, [x0, #:lo12:.LANCHOR62]
+	cbz	w0, .L1253
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1568
-.L1523:
-	adrp	x0, .LANCHOR178
-	ldrh	w0, [x0, #:lo12:.LANCHOR178]
-	cbnz	w0, .L1524
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	cbnz	w0, .L1287
+.L1253:
+	adrp	x0, .LANCHOR173
+	ldrh	w0, [x0, #:lo12:.LANCHOR173]
+	cbnz	w0, .L1254
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1524
+	cbz	w2, .L1254
 	strh	wzr, [x1, x0]
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x19, #:lo12:.LANCHOR144]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1524:
+.L1254:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1522:
-	ldr	x0, [x29, 144]
-	str	wzr, [x0, #:lo12:.LANCHOR108]
+	strh	w0, [x19, #:lo12:.LANCHOR144]
+.L1252:
 	adrp	x0, .LANCHOR48
+	str	wzr, [x21, #:lo12:.LANCHOR94]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1525
-	ldr	x0, [x29, 112]
+	bhi	.L1255
+	ldr	x0, [x29, 120]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1526
-.L1525:
-	adrp	x1, .LANCHOR177
-	ldrh	w1, [x1, #:lo12:.LANCHOR177]
-	cmp	w1, 0
-	csinc	w0, w1, w0, ne
-	b	.L1456
-.L1529:
+	b	.L1256
+.L1255:
+	add	w0, w0, 1
+	b	.L1206
+.L1258:
 	mov	w0, 0
-	b	.L1456
+	b	.L1206
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.sftl_init,"ax",@progbits
-	.align	2
-	.global	sftl_init
-	.type	sftl_init, %function
-sftl_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC70
-	add	x1, x1, :lo12:.LC70
-	mov	w0, -1
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR86
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printf
-	adrp	x0, .LANCHOR0
-	add	x0, x0, :lo12:.LANCHOR0
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR4
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	w0, .L1573
-	bl	FtlSysBlkInit
-	cbnz	w0, .L1573
-	mov	w0, 1
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 15
-	bhi	.L1573
-	mov	w19, 8129
-.L1572:
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L1572
-.L1573:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	sftl_init, .-sftl_init
-	.section	.text.sftl_gc,"ax",@progbits
-	.align	2
-	.global	sftl_gc
-	.type	sftl_gc, %function
-sftl_gc:
-	mov	w1, 1
-	mov	w0, w1
-	b	rk_ftl_garbage_collect
-	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
 	.global	FtlRead
@@ -11384,13 +9408,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1578
+	bne	.L1289
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1577:
+.L1288:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11399,87 +9423,87 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1578:
+.L1289:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1599
-	adrp	x0, .LANCHOR86
-	ldr	w21, [x0, #:lo12:.LANCHOR86]
+	bhi	.L1310
+	adrp	x0, .LANCHOR166
+	ldr	w21, [x0, #:lo12:.LANCHOR166]
 	cmn	w21, #1
-	beq	.L1577
+	beq	.L1288
 	adrp	x22, .LANCHOR12
-	adrp	x25, .LANCHOR81
-	add	x25, x25, :lo12:.LANCHOR81
+	adrp	x25, .LANCHOR135
+	add	x25, x25, :lo12:.LANCHOR135
 	mov	w27, 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	mov	w21, 0
-	adrp	x28, .LANCHOR112
+	adrp	x28, .LANCHOR103
 	stp	wzr, wzr, [x29, 140]
 	udiv	w1, w19, w0
 	stp	wzr, w1, [x29, 148]
 	add	w1, w19, w2
 	sub	w24, w1, #1
-	adrp	x1, .LANCHOR69
+	adrp	x1, .LANCHOR163
 	ldr	w20, [x29, 152]
 	udiv	w24, w24, w0
 	ldr	w0, [x29, 152]
 	sub	w0, w24, w0
 	add	w0, w0, 1
 	str	w0, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR69]
+	ldr	w0, [x1, #:lo12:.LANCHOR163]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR69]
-	adrp	x1, .LANCHOR62
+	str	w0, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR89
 	ldr	w2, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR62]
+	ldr	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR62]
-.L1580:
+	str	w0, [x1, #:lo12:.LANCHOR89]
+.L1291:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1597
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1598
+	cbnz	w0, .L1308
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L1309
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1577
-.L1598:
+	bhi	.L1288
+.L1309:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1577
-.L1597:
+	b	.L1288
+.L1308:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1581
+	bne	.L1292
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1582:
+.L1293:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1584
-.L1585:
+	bcc	.L1295
+.L1296:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1589
+	beq	.L1300
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1580
-.L1589:
-	cbz	w27, .L1580
-	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	bne	.L1291
+.L1300:
+	cbz	w27, .L1291
+	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	mov	w1, w27
 	mov	w2, 0
 	bl	FlashReadPages
@@ -11497,57 +9521,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1596:
-	ldr	x0, [x28, #:lo12:.LANCHOR112]
+.L1307:
+	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1591
+	bne	.L1302
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR118
-	ldr	x0, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR109
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	cmp	x1, x0
-	bne	.L1592
+	bne	.L1303
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1610:
+.L1321:
 	bl	ftl_memcpy
-.L1592:
-	ldr	x0, [x28, #:lo12:.LANCHOR112]
+.L1303:
+	ldr	x0, [x28, #:lo12:.LANCHOR103]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1593
+	beq	.L1304
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1593:
+.L1304:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1594
+	bne	.L1305
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1595:
+.L1306:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1596
+	bne	.L1307
 	mov	w27, 0
-	b	.L1580
-.L1584:
+	b	.L1291
+.L1295:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1583
+	bhi	.L1294
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1583
+	bls	.L1294
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -11558,19 +9582,19 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1583:
+.L1294:
 	add	w4, w4, 1
-	b	.L1582
-.L1581:
-	ldr	x2, [x28, #:lo12:.LANCHOR112]
+	b	.L1293
+.L1292:
+	ldr	x2, [x28, #:lo12:.LANCHOR103]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1586
-	adrp	x1, .LANCHOR118
-	ldr	x1, [x1, #:lo12:.LANCHOR118]
+	bne	.L1297
+	adrp	x1, .LANCHOR109
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
 	str	x1, [x0, 8]
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
@@ -11581,51 +9605,51 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1587
+	bne	.L1298
 	str	x23, [x0, 8]
-.L1587:
+.L1298:
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR124
+	adrp	x2, .LANCHOR115
 	str	w20, [x0, 24]
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR124]
+	ldr	x2, [x2, #:lo12:.LANCHOR115]
 	mul	w1, w1, w27
 	add	w27, w27, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1585
-.L1586:
+	b	.L1296
+.L1297:
 	cmp	w20, w24
-	bne	.L1588
+	bne	.L1299
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR110
 	ldr	w3, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR119]
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
 	str	x1, [x0, 8]
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1587
-.L1609:
+	bne	.L1298
+.L1320:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1587
-.L1588:
+	b	.L1298
+.L1299:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1609
-.L1591:
+	b	.L1320
+.L1302:
 	cmp	w24, w1
-	bne	.L1592
+	bne	.L1303
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR119
-	ldr	x0, [x0, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	cmp	x1, x0
-	bne	.L1592
+	bne	.L1303
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -11633,18 +9657,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1610
-.L1594:
+	b	.L1321
+.L1305:
 	cmp	w1, 256
-	bne	.L1595
+	bne	.L1306
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1595
-.L1599:
+	b	.L1306
+.L1310:
 	mov	w21, -1
-	b	.L1577
+	b	.L1288
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -11662,7 +9686,7 @@ sftl_read:
 	.global	FtlWrite
 	.type	FtlWrite, %function
 FtlWrite:
-	stp	x29, x30, [sp, -240]!
+	stp	x29, x30, [sp, -224]!
 	and	w0, w0, 255
 	cmp	w0, 16
 	add	x29, sp, 0
@@ -11673,407 +9697,362 @@ FtlWrite:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	str	w2, [x29, 180]
-	bne	.L1613
+	str	w2, [x29, 164]
+	bne	.L1324
 	add	w0, w1, 256
-	ldr	w1, [x29, 180]
+	ldr	w1, [x29, 164]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1612:
+.L1323:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
+	ldp	x29, x30, [sp], 224
 	ret
-.L1613:
-	ldr	w0, [x29, 180]
+.L1324:
+	ldr	w0, [x29, 164]
 	add	w0, w1, w0
-	str	w0, [x29, 168]
+	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR34
-	ldr	w1, [x29, 168]
+	ldr	w1, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1649
-	adrp	x0, .LANCHOR86
-	ldr	w0, [x0, #:lo12:.LANCHOR86]
+	bhi	.L1356
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
 	cmn	w0, #1
-	beq	.L1612
-	adrp	x0, .LANCHOR181
+	beq	.L1323
+	adrp	x0, .LANCHOR176
 	mov	w1, 2048
 	adrp	x22, .LANCHOR12
-	ldr	w2, [x29, 180]
-	str	w1, [x0, #:lo12:.LANCHOR181]
-	ldr	w1, [x29, 168]
+	ldr	w2, [x29, 164]
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	ldr	w1, [x29, 152]
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	sub	w1, w1, #1
 	udiv	w25, w21, w0
 	udiv	w0, w1, w0
-	adrp	x1, .LANCHOR68
-	str	w0, [x29, 156]
+	adrp	x1, .LANCHOR162
+	mov	w19, w25
+	str	w0, [x29, 144]
 	sub	w0, w0, w25
 	add	w24, w0, 1
-	str	w0, [x29, 152]
-	ldr	w0, [x1, #:lo12:.LANCHOR68]
+	str	w0, [x29, 140]
+	ldr	w0, [x1, #:lo12:.LANCHOR162]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR68]
-	adrp	x1, .LANCHOR64
-	ldr	w0, [x1, #:lo12:.LANCHOR64]
+	str	w0, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR85
+	ldr	w0, [x1, #:lo12:.LANCHOR85]
 	add	w0, w0, w24
-	str	w0, [x1, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR182
-	str	x0, [x29, 160]
-	ldr	w1, [x0, #:lo12:.LANCHOR182]
+	str	w0, [x1, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR51
-	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1615
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1615
-	adrp	x19, .LANCHOR52
-	add	x19, x19, :lo12:.LANCHOR52
-.L1615:
-	mov	w20, w25
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
-	str	x0, [x29, 96]
-.L1616:
-	cbnz	w24, .L1644
-	ldr	w1, [x29, 152]
+	add	x20, x0, :lo12:.LANCHOR51
+.L1326:
+	cbnz	w24, .L1351
+	ldr	w1, [x29, 140]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1645
-.L1647:
+	bls	.L1352
+.L1354:
 	mov	w0, 0
-	b	.L1612
-.L1644:
-	adrp	x0, .LANCHOR3
-	ldrb	w2, [x19, 6]
-	str	x0, [x29, 120]
-	ldrh	w1, [x0, #:lo12:.LANCHOR3]
-	cmp	w2, w1
-	bcc	.L1617
-	adrp	x1, .LANCHOR183
+	b	.L1323
+.L1351:
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
+	adrp	x1, .LANCHOR3
+	str	x1, [x29, 112]
+	ldrb	w2, [x0, 6]
+	ldrh	w0, [x1, #:lo12:.LANCHOR3]
+	cmp	w2, w0
+	bcc	.L1327
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1013
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1016
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1617:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1618
-	adrp	x0, .LANCHOR51
-	add	x0, x0, :lo12:.LANCHOR51
-	cmp	x19, x0
-	bne	.L1619
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
-	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1620
-	bl	allocate_new_data_superblock
-	ldr	x0, [x29, 160]
-	str	wzr, [x0, #:lo12:.LANCHOR182]
-.L1620:
-	adrp	x0, .LANCHOR51
-	add	x19, x0, :lo12:.LANCHOR51
-	mov	x0, x19
-	bl	allocate_new_data_superblock
-	ldr	x0, [x29, 160]
-	ldr	w0, [x0, #:lo12:.LANCHOR182]
-	cmp	w0, 0
-	ldr	x0, [x29, 96]
-	csel	x19, x0, x19, ne
-.L1621:
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1618
-	mov	x0, x19
+.L1327:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1328
+	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1618:
-	ldrh	w0, [x19, 4]
-	ldrb	w1, [x19, 7]
-	cmp	w0, w24
-	csel	w0, w0, w24, ls
-	lsl	w1, w1, 2
+.L1328:
+	ldrb	w0, [x20, 7]
+	ldrh	w1, [x20, 4]
+	lsl	w0, w0, 2
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
+	ldrb	w1, [x20, 6]
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
 	str	w0, [x29, 148]
-	ldr	x0, [x29, 120]
-	ldrb	w1, [x19, 6]
+	ldr	x0, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1622
-	adrp	x1, .LANCHOR183
+	bcc	.L1329
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1046
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1049
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1622:
+.L1329:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	str	xzr, [x29, 184]
-	str	x0, [x29, 112]
+	str	xzr, [x29, 168]
+	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
-	str	x0, [x29, 104]
-.L1623:
+	str	x0, [x29, 96]
+.L1330:
 	ldr	w1, [x29, 148]
-	adrp	x27, .LANCHOR114
-	ldr	w23, [x29, 184]
+	adrp	x27, .LANCHOR105
+	ldr	w23, [x29, 168]
 	cmp	w23, w1
-	bcc	.L1642
+	bcc	.L1349
 	mov	x23, x1
-.L1624:
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	mov	x3, x19
+.L1331:
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	mov	x3, x20
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
 	cmp	w24, w23
-	bcs	.L1643
-	adrp	x1, .LANCHOR183
+	bcs	.L1350
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1123
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1126
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1643:
+.L1350:
 	sub	w24, w24, w23
-	b	.L1616
-.L1619:
-	ldr	x1, [x29, 160]
-	str	wzr, [x1, #:lo12:.LANCHOR182]
-	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1654
-	mov	x0, x19
-	bl	allocate_new_data_superblock
-	b	.L1621
-.L1654:
-	mov	x19, x0
-	b	.L1618
-.L1642:
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L1624
-	add	x1, x29, 204
+	b	.L1326
+.L1349:
+	ldrh	w0, [x20, 4]
+	cbz	w0, .L1331
+	add	x1, x29, 188
 	mov	w2, 0
-	mov	w0, w20
+	mov	w0, w19
 	bl	log2phys
-	mov	x0, x19
+	mov	x0, x20
 	bl	get_new_active_ppa
-	ldr	x1, [x29, 184]
+	ldr	x1, [x29, 168]
 	lsl	x28, x1, 5
-	ldr	x1, [x27, #:lo12:.LANCHOR114]
+	ldr	x1, [x27, #:lo12:.LANCHOR105]
 	add	x1, x1, x28
 	str	w0, [x1, 4]
-	ldr	x0, [x29, 112]
-	str	w20, [x1, 24]
+	ldr	x0, [x29, 104]
+	str	w19, [x1, 24]
 	ldrh	w2, [x0]
 	mul	w23, w23, w2
 	and	x0, x23, 4294967292
-	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR124
-	ldr	x3, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR124]
 	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR115
+	ldr	x3, [x29, 128]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	str	x0, [x29, 120]
 	add	x23, x0, x3
 	str	x23, [x1, 16]
 	mov	x0, x23
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	w0, [x29, 156]
-	cmp	w20, w25
-	ccmp	w20, w0, 4, ne
-	bne	.L1625
-	cmp	w20, w25
-	bne	.L1626
+	ldr	w0, [x29, 144]
+	cmp	w19, w25
+	ccmp	w19, w0, 4, ne
+	bne	.L1332
+	cmp	w19, w25
+	bne	.L1333
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
-	str	w0, [x29, 172]
+	str	w0, [x29, 156]
 	sub	w2, w2, w0
-	ldr	w0, [x29, 180]
+	ldr	w0, [x29, 164]
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
-	str	w0, [x29, 176]
-.L1627:
+	str	w0, [x29, 160]
+.L1334:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	ldr	w1, [x29, 176]
+	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	bne	.L1628
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	bne	.L1335
 	add	x3, x0, x28
-	cmp	w20, w25
-	bne	.L1629
+	cmp	w19, w25
+	bne	.L1336
 	str	x26, [x3, 8]
-.L1630:
-	ldr	x0, [x29, 120]
-	ldrb	w1, [x19, 6]
+.L1337:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1639
-	adrp	x1, .LANCHOR183
+	bcc	.L1346
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	mov	w2, 1114
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1117
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1639:
-	ldp	x1, x2, [x29, 128]
+.L1346:
+	ldp	x1, x2, [x29, 120]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR71
-	ldr	w0, [x1, #:lo12:.LANCHOR71]
-	stp	w0, w20, [x23, 4]
-	add	w20, w20, 1
+	adrp	x1, .LANCHOR83
+	ldr	w0, [x1, #:lo12:.LANCHOR83]
+	stp	w0, w19, [x23, 4]
+	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR71]
-	ldr	w0, [x29, 204]
+	str	w0, [x1, #:lo12:.LANCHOR83]
+	ldr	w0, [x29, 188]
 	str	w0, [x23, 12]
-	ldrh	w0, [x19]
+	ldrh	w0, [x20]
 	strh	w0, [x23, 2]
-	ldr	x0, [x29, 184]
+	ldr	x0, [x29, 168]
 	add	x0, x0, 1
-	str	x0, [x29, 184]
-	b	.L1623
-.L1626:
-	ldr	w0, [x29, 168]
+	str	x0, [x29, 168]
+	b	.L1330
+.L1333:
+	ldr	w0, [x29, 152]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	msub	w2, w20, w2, w0
+	msub	w2, w19, w2, w0
 	and	w0, w2, 65535
-	stp	wzr, w0, [x29, 172]
-	b	.L1627
-.L1629:
-	ldr	w0, [x29, 176]
-.L1661:
-	mul	w0, w0, w20
+	stp	wzr, w0, [x29, 156]
+	b	.L1334
+.L1336:
+	ldr	w0, [x29, 160]
+.L1364:
+	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1630
-.L1628:
+	b	.L1337
+.L1335:
 	add	x0, x0, x28
-	cmp	w20, w25
-	bne	.L1631
-	adrp	x1, .LANCHOR118
-	ldr	x1, [x1, #:lo12:.LANCHOR118]
-.L1660:
+	cmp	w19, w25
+	bne	.L1338
+	adrp	x1, .LANCHOR109
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
+.L1363:
 	str	x1, [x0, 8]
-	ldr	w0, [x29, 204]
+	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	beq	.L1633
-	str	w0, [x29, 212]
+	beq	.L1340
+	str	w0, [x29, 196]
 	mov	w2, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	str	w20, [x29, 232]
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	str	w19, [x29, 216]
 	add	x0, x0, x28
 	ldp	x1, x0, [x0, 8]
-	stp	x1, x0, [x29, 216]
+	stp	x1, x0, [x29, 200]
 	mov	w1, 1
-	add	x0, x29, 208
+	add	x0, x29, 192
 	bl	FlashReadPages
-	ldr	w0, [x29, 208]
+	ldr	w0, [x29, 192]
 	cmn	w0, #1
-	bne	.L1634
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	bne	.L1341
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1637:
-	ldr	w0, [x29, 176]
-	cmp	w20, w25
+.L1344:
+	ldr	w0, [x29, 160]
+	cmp	w19, w25
 	lsl	w2, w0, 9
-	bne	.L1638
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	bne	.L1345
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	mov	x1, x26
 	add	x3, x0, x28
-	ldr	w0, [x29, 172]
+	ldr	w0, [x29, 156]
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1662:
+.L1365:
 	bl	ftl_memcpy
-	b	.L1630
-.L1631:
-	adrp	x1, .LANCHOR119
-	ldr	x1, [x1, #:lo12:.LANCHOR119]
-	b	.L1660
-.L1634:
+	b	.L1337
+.L1338:
+	adrp	x1, .LANCHOR110
+	ldr	x1, [x1, #:lo12:.LANCHOR110]
+	b	.L1363
+.L1341:
 	ldr	w1, [x23, 8]
-	cmp	w20, w1
-	beq	.L1636
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	cmp	w19, w1
+	beq	.L1343
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC113
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC37
+	mov	w2, w19
+	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1636:
+.L1343:
 	ldr	w0, [x23, 8]
-	cmp	w20, w0
-	beq	.L1637
-	mov	w2, 1099
-	adrp	x1, .LANCHOR183
+	cmp	w19, w0
+	beq	.L1344
+	mov	w2, 1102
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR183
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1637
-.L1633:
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	ldr	x1, [x29, 104]
+	b	.L1344
+.L1340:
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
+	ldr	x1, [x29, 96]
 	add	x0, x0, x28
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1637
-.L1638:
+	b	.L1344
+.L1345:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	add	x3, x0, x28
-	mul	w1, w1, w20
+	mul	w1, w1, w19
 	sub	w1, w1, w21
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1662
-.L1625:
-	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	b	.L1365
+.L1332:
+	ldr	x0, [x27, #:lo12:.LANCHOR105]
 	add	x3, x0, x28
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1661
-.L1645:
-	adrp	x23, .LANCHOR99
-	adrp	x20, .LANCHOR83
-	adrp	x21, .LANCHOR82
-	add	x23, x23, :lo12:.LANCHOR99
-	add	x20, x20, :lo12:.LANCHOR83
-	add	x21, x21, :lo12:.LANCHOR82
+	b	.L1364
+.L1352:
+	adrp	x23, .LANCHOR72
+	adrp	x20, .LANCHOR101
+	adrp	x21, .LANCHOR100
+	add	x23, x23, :lo12:.LANCHOR72
+	add	x20, x20, :lo12:.LANCHOR101
+	add	x21, x21, :lo12:.LANCHOR100
 	mov	w19, 256
-.L1648:
-	adrp	x0, .LANCHOR80
+.L1355:
+	adrp	x0, .LANCHOR144
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR144]
 	cmp	w0, w1
-	bne	.L1646
+	bne	.L1353
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1646
+	bne	.L1353
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1646:
+.L1353:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -12085,330 +10064,872 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1647
+	bhi	.L1354
 	subs	w19, w19, #1
-	bne	.L1648
-	b	.L1647
-.L1649:
+	bne	.L1355
+	b	.L1354
+.L1356:
 	mov	w0, -1
-	b	.L1612
+	b	.L1323
 	.size	FtlWrite, .-FtlWrite
-	.section	.text.FtlMakeBbt,"ax",@progbits
+	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
-	.global	FtlMakeBbt
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	stp	x29, x30, [sp, -128]!
+	.global	sftl_gc
+	.type	sftl_gc, %function
+sftl_gc:
+	mov	w1, 1
+	mov	w0, w1
+	b	rk_ftl_garbage_collect
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
-	stp	x23, x24, [sp, 48]
-	add	x21, x20, :lo12:.LANCHOR37
+	adrp	x19, .LANCHOR138
+	stp	x21, x22, [sp, 32]
+	add	x0, x19, :lo12:.LANCHOR138
+	adrp	x22, .LANCHOR106
 	stp	x25, x26, [sp, 64]
-	add	x24, x21, 32
+	adrp	x25, .LANCHOR114
+	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	bl	FtlBbtMemInit
-	bl	FtlLoadFactoryBbt
-	adrp	x28, .LANCHOR148
-	add	x21, x21, 12
-	add	x25, x28, :lo12:.LANCHOR148
+	adrp	x23, .LANCHOR42
+	ldr	x1, [x22, #:lo12:.LANCHOR106]
+	adrp	x21, .LANCHOR5
+	str	x1, [x0, 8]
+	adrp	x20, .LANCHOR139
+	ldr	x1, [x25, #:lo12:.LANCHOR114]
+	str	x1, [x0, 16]
+	ldr	x0, [x23, #:lo12:.LANCHOR42]
+	mov	w1, 0
+	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x20, #:lo12:.LANCHOR139]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L1368
+.L1379:
+	mov	w0, -1
+.L1367:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1368:
+	add	x24, x20, :lo12:.LANCHOR139
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+	sxth	w28, w0
+	add	w0, w0, 1
+	adrp	x26, .LANCHOR23
+	strh	w0, [x24, 2]
+	adrp	x27, .LANCHOR178
+	ldrsh	w24, [x20, #:lo12:.LANCHOR139]
+	add	x26, x26, :lo12:.LANCHOR23
+	add	x27, x27, :lo12:.LANCHOR178
+.L1370:
+	tbz	w28, #31, .L1376
+	adrp	x1, .LANCHOR178
+	adrp	x0, .LC1
+	mov	w2, 1465
+	add	x1, x1, :lo12:.LANCHOR178
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1375:
+	adrp	x1, .LANCHOR23
+	ldrh	w0, [x21, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L1378
+	adrp	x1, .LANCHOR178
+	adrp	x0, .LC1
+	mov	w2, 1467
+	add	x1, x1, :lo12:.LANCHOR178
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1378:
+	add	x24, x19, :lo12:.LANCHOR138
+	adrp	x19, .LANCHOR39
+	add	x22, x19, :lo12:.LANCHOR39
+	mov	w2, 48
+	mov	x0, x22
+	ldr	x1, [x24, 8]
+	bl	ftl_memcpy
+	ldr	x0, [x23, #:lo12:.LANCHOR42]
+	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	ldr	x1, [x24, 8]
+	lsl	w2, w2, 1
+	add	x1, x1, 48
+	bl	ftl_memcpy
+	ldrh	w1, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x24, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	bl	ftl_memcpy
+	ldr	w1, [x19, #:lo12:.LANCHOR39]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1379
+	add	x20, x20, :lo12:.LANCHOR139
 	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	str	x0, [x29, 120]
-.L1664:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w22, w0
-	bcc	.L1670
-	adrp	x21, .LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR25
-	mov	w19, 0
-.L1671:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L1672
-	add	x21, x20, :lo12:.LANCHOR37
-	mov	w22, 65535
-	ldrh	w19, [x21, 12]
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L1673:
-	ldrh	w0, [x21, 12]
-	sub	w0, w0, #47
-	cmp	w0, w19
-	bgt	.L1677
-	mov	w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1674
-	mov	w0, w19
-	bl	FlashTestBlk
-	cbz	w0, .L1675
-	mov	w0, w19
-	bl	FtlBbmMapBadBlock
-.L1674:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1673
-.L1670:
-	adrp	x2, .LANCHOR123
-	adrp	x0, .LANCHOR115
-	add	x19, x28, :lo12:.LANCHOR148
-	ldrh	w1, [x21]
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
-	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR123]
-	cmp	w1, w3
-	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR17
-	str	x2, [x29, 112]
-	beq	.L1665
-	ldrh	w4, [x23, #:lo12:.LANCHOR17]
+	ldrh	w1, [x22, 8]
+	ldrb	w2, [x22, 10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	strh	w1, [x20, 6]
+	cmp	w2, w0
+	bne	.L1379
+	adrp	x0, .LANCHOR179
+	adrp	x2, .LANCHOR152
+	adrp	x3, .LANCHOR3
+	str	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR19
+	ldrh	w3, [x3, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR152]
+	adrp	x2, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR12]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR34
+	str	w0, [x2, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR7
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
+	cmp	w1, w2
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR171
+	strh	w0, [x3, #:lo12:.LANCHOR171]
+	bls	.L1380
+	adrp	x1, .LANCHOR178
+	adrp	x0, .LC1
+	mov	w2, 1489
+	add	x1, x1, :lo12:.LANCHOR178
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1380:
+	add	x4, x19, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR51
+	add	x2, x0, :lo12:.LANCHOR51
+	adrp	x5, .LANCHOR144
+	adrp	x20, .LANCHOR52
+	mov	x22, x5
+	ldrh	w1, [x4, 16]
+	ldrh	w6, [x4, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR51]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 11]
+	strb	w1, [x2, 8]
+	add	x1, x5, :lo12:.LANCHOR144
+	strh	w3, [x2, 2]
+	mov	w2, -1
+	strh	w2, [x5, #:lo12:.LANCHOR144]
+	add	x2, x20, :lo12:.LANCHOR52
+	strh	wzr, [x1, 2]
+	strb	wzr, [x1, 6]
+	strb	wzr, [x1, 8]
+	ldrh	w1, [x4, 18]
+	strh	w1, [x20, #:lo12:.LANCHOR52]
+	ldrh	w1, [x4, 20]
+	lsr	w3, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x2, 6]
+	ldrb	w1, [x4, 12]
+	strh	w3, [x2, 2]
+	strb	w1, [x2, 8]
+	adrp	x2, .LANCHOR53
+	ldrh	w1, [x4, 22]
+	add	x3, x2, :lo12:.LANCHOR53
+	strh	w1, [x2, #:lo12:.LANCHOR53]
+	mov	x21, x2
+	ldrh	w1, [x4, 24]
+	lsr	w7, w1, 6
+	and	w1, w1, 63
+	strb	w1, [x3, 6]
+	ldrb	w1, [x4, 13]
+	strb	w1, [x3, 8]
+	adrp	x1, .LANCHOR84
+	strh	w7, [x3, 2]
+	ldr	w3, [x4, 32]
+	str	wzr, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR85
+	str	wzr, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR89
+	str	wzr, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR88
+	str	wzr, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR90
+	str	w3, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	str	wzr, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR92
+	str	wzr, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR87
+	ldr	w3, [x4, 40]
+	str	wzr, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR82
+	ldr	w4, [x1, #:lo12:.LANCHOR82]
+	cmp	w3, w4
+	bls	.L1381
+	str	w3, [x1, #:lo12:.LANCHOR82]
+.L1381:
+	add	x19, x19, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR83
+	ldr	w3, [x1, #:lo12:.LANCHOR83]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L1382
+	str	w2, [x1, #:lo12:.LANCHOR83]
+.L1382:
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L1383
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	make_superblock
+.L1383:
+	ldrh	w2, [x20, #:lo12:.LANCHOR52]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR52
+	cmp	w2, w1
+	beq	.L1384
+	bl	make_superblock
+.L1384:
+	ldrh	w2, [x21, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR53
+	cmp	w2, w1
+	beq	.L1385
+	bl	make_superblock
+.L1385:
+	ldrh	w2, [x22, #:lo12:.LANCHOR144]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR144
+	cmp	w2, w1
+	beq	.L1386
+	bl	make_superblock
+.L1386:
+	mov	w0, 0
+	b	.L1367
+.L1376:
+	add	x3, x19, :lo12:.LANCHOR138
+	orr	w0, w28, w24, lsl 10
 	mov	w2, 1
-	madd	w27, w4, w22, w1
+	str	x3, [x29, 104]
 	mov	w1, w2
-	lsl	w0, w27, 10
-	str	w0, [x19, 4]
-	mov	x0, x19
+	str	w0, [x3, 4]
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x3, 8]
+	mov	x0, x3
 	bl	FlashReadPages
-	ldr	x1, [x19, 8]
-	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR17]
-	add	w2, w2, 7
-	lsr	w2, w2, 3
-	bl	ftl_memcpy
-.L1666:
-	mov	w0, w27
-	add	w22, w22, 1
-	bl	FtlBbmMapBadBlock
-	add	x24, x24, 8
-	add	x21, x21, 2
-	b	.L1664
-.L1665:
-	mov	w1, w22
-	bl	FlashGetBadBlockList
-	ldr	x0, [x19, 8]
-	ldr	x1, [x24]
-	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR17]
-	add	x23, x23, :lo12:.LANCHOR17
-	adrp	x0, .LANCHOR137
-	sub	w19, w19, #1
-	add	x0, x0, :lo12:.LANCHOR137
-	and	w19, w19, 65535
-	str	x0, [x29, 104]
-.L1667:
-	ldrh	w0, [x23]
-	madd	w0, w22, w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1668
-	ldr	x0, [x29, 112]
-	mov	w2, 16
-	strh	w19, [x21]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR123]
-	bl	ftl_memset
-	adrp	x0, .LANCHOR115
-	mov	w2, 4096
+	ldr	x3, [x29, 104]
+	ldr	x0, [x3, 16]
+	ldr	w8, [x0, 12]
+	cbz	w8, .L1371
+	ldrh	w1, [x26]
+	ldr	x0, [x3, 8]
+	bl	js_hash
+	cmp	w8, w0
+	beq	.L1371
+	add	x10, x20, :lo12:.LANCHOR139
+	mov	w6, w0
+	mov	w5, w8
+	adrp	x0, .LC38
+	mov	w3, w28
+	mov	w2, w24
+	ldrh	w4, [x10, 4]
+	mov	x1, x27
+	add	x0, x0, :lo12:.LC38
+	str	x10, [x29, 104]
+	bl	printf
+	cbnz	w28, .L1372
+	ldr	x10, [x29, 104]
+	ldrh	w0, [x10, 4]
+	cmp	w24, w0
+	beq	.L1372
+	sxth	w24, w0
+	adrp	x0, .LANCHOR20
+	ldrh	w7, [x0, #:lo12:.LANCHOR20]
+	sub	w7, w7, #1
+.L1395:
+	sxth	w28, w7
+	b	.L1370
+.L1372:
+	mov	w0, -1
+	str	w0, [x19, #:lo12:.LANCHOR138]
+.L1371:
+	ldr	w0, [x19, #:lo12:.LANCHOR138]
+	cmn	w0, #1
+	beq	.L1374
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	mov	w1, 19539
+	movk	w1, 0x4654, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w1
+	bne	.L1374
+	ldr	x0, [x25, #:lo12:.LANCHOR114]
+	ldrh	w1, [x0]
+	mov	w0, 61604
+	cmp	w1, w0
+	beq	.L1375
+.L1374:
+	sub	w7, w28, #1
+	b	.L1395
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.align	2
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	stp	x29, x30, [sp, -160]!
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x25, x26, [sp, 64]
+	mov	w20, 0
+	ldrh	w25, [x0, 6]
+	adrp	x26, .LANCHOR20
+	stp	x23, x24, [sp, 48]
+	ldr	x23, [x0, 40]
+	ldr	x24, [x0, 16]
+	lsl	w2, w25, 2
+	ldr	x0, [x0, 24]
+	str	x0, [x29, 144]
+	ldrh	w0, [x19, 8]
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR106
+	stp	x27, x28, [sp, 80]
+	str	w0, [x29, 152]
+	mov	x0, x23
 	bl	ftl_memset
-	mov	w0, -3872
-	strh	w0, [x26]
-	ldrh	w4, [x23]
-	ldrh	w0, [x21]
-	strh	w0, [x26, 2]
-	ldr	x1, [x24]
-	str	wzr, [x26, 4]
-	madd	w27, w4, w22, w0
-	lsl	w0, w27, 10
-	str	w0, [x25, 4]
-	ldr	x0, [x29, 104]
-	ldrh	w2, [x0]
-	ldr	x0, [x25, 8]
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
+	stp	wzr, wzr, [x19, 48]
+	adrp	x0, .LANCHOR138
+	add	x6, x0, :lo12:.LANCHOR138
+	ldr	x1, [x22, #:lo12:.LANCHOR106]
+	mov	x27, x6
+	str	x0, [x29, 128]
+	str	x1, [x6, 8]
+	adrp	x1, .LANCHOR114
+	ldr	w0, [x29, 152]
+	ldr	x21, [x1, #:lo12:.LANCHOR114]
+	mov	w1, -1
+	str	x21, [x6, 16]
+	sub	w0, w0, #1
+	strh	w1, [x19]
+	strh	w1, [x19, 2]
+	mov	w1, 1
+	str	w0, [x29, 108]
+	add	x0, x26, :lo12:.LANCHOR20
+	str	w1, [x19, 56]
+	str	x0, [x29, 96]
+.L1397:
+	ldr	w0, [x29, 152]
+	cmp	w20, w0
+	bge	.L1416
+	ldr	w0, [x29, 108]
+	sxtw	x28, w20
+	cmp	w20, w0
+	bne	.L1398
+	lsl	x0, x28, 1
+	mov	w1, 1
+	add	x26, x24, x0
+	adrp	x27, .LANCHOR23
+	add	x27, x27, :lo12:.LANCHOR23
+	mov	w22, 0
+	ldrh	w0, [x24, x0]
+	bl	FtlGetLastWrittenPage
+	sxth	w1, w0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	x0, [x29, 144]
+	strh	w20, [x19]
+	str	w1, [x29, 152]
+	ldr	w0, [x0, x28, lsl 2]
+	adrp	x28, .LANCHOR180
+	str	w0, [x19, 48]
+	add	x28, x28, :lo12:.LANCHOR180
+	ldr	x0, [x29, 128]
+	add	x24, x0, :lo12:.LANCHOR138
+.L1399:
+	ldr	w0, [x29, 152]
+	cmp	w22, w0
+	ble	.L1402
+.L1416:
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+	adrp	x0, .LANCHOR20
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bne	.L1404
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L1404:
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L1402:
+	ldrh	w0, [x26]
 	mov	w2, 1
-	mov	x0, x25
 	mov	w1, w2
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	mov	x0, x25
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x25]
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	x0, [x24, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 156]
+	uxtw	x0, w0
+	cbz	w0, .L1400
+	ldrh	w1, [x27]
+	ldr	x0, [x24, 8]
+	bl	js_hash
+	ldr	w1, [x29, 156]
+	cmp	w1, w0
+	beq	.L1400
+	mov	w5, w0
+	mov	x4, x1
+	mov	w3, w22
+	mov	w2, w20
+	mov	x1, x28
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+	mov	w0, -1
+	str	w0, [x24]
+.L1400:
+	ldr	w0, [x24]
 	cmn	w0, #1
-	bne	.L1666
-	mov	w0, w27
-	bl	FtlBbmMapBadBlock
-	b	.L1667
-.L1668:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1667
-.L1672:
-	mov	w0, w19
-	add	w19, w19, 1
-	bl	FtlBbmMapBadBlock
-	and	w19, w19, 65535
-	b	.L1671
-.L1675:
-	ldrh	w0, [x21]
-	cmp	w0, w22
-	bne	.L1676
-	strh	w19, [x21]
-	b	.L1674
-.L1676:
-	strh	w19, [x21, 4]
-.L1677:
-	adrp	x0, .LANCHOR106
-	add	x19, x20, :lo12:.LANCHOR37
-	ldrh	w1, [x20, #:lo12:.LANCHOR37]
-	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
-	str	wzr, [x19, 8]
-	lsl	w1, w1, 10
-	strh	wzr, [x19, 2]
-	str	w1, [x0, 4]
+	beq	.L1401
+	ldrh	w0, [x21, 8]
+	cmp	w25, w0
+	bls	.L1401
+	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
-	lsl	w1, w1, 10
-	str	w1, [x0, 36]
-	mov	w1, 1
-	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmMapBadBlock
+	cmp	w2, w1
+	bne	.L1401
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x24, 4]
+	str	w1, [x23, x0]
+.L1401:
+	add	w22, w22, 1
+	sxth	w22, w22
+	b	.L1399
+.L1398:
+	lsl	x2, x28, 1
+	ldr	x0, [x22, #:lo12:.LANCHOR106]
+	str	x0, [x27, 8]
+	add	x0, x24, x2
+	ldrh	w1, [x26, #:lo12:.LANCHOR20]
+	str	x0, [x29, 136]
+	ldrh	w0, [x24, x2]
+	sub	w1, w1, #1
+	mov	w2, 1
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w2
+	str	w0, [x27, 4]
+	mov	x0, x27
+	bl	FlashReadPages
+	ldr	w0, [x27]
+	cmn	w0, #1
+	beq	.L1418
+	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	strh	wzr, [x19, 2]
-	ldr	w0, [x19, 8]
+	cmp	w1, w0
+	bne	.L1418
+	ldrh	w1, [x21, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L1406
+.L1418:
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	mov	w28, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR180
+	add	x0, x0, :lo12:.LANCHOR180
+	str	x0, [x29, 112]
+.L1407:
+	ldr	x0, [x29, 96]
+	ldrh	w0, [x0]
+	cmp	w28, w0
+	bge	.L1414
+	ldr	x0, [x29, 136]
+	mov	w2, 1
+	mov	w1, w2
+	ldrh	w0, [x0]
+	orr	w0, w28, w0, lsl 10
+	str	w0, [x27, 4]
+	mov	x0, x27
+	bl	FlashReadPages
+	ldr	x0, [x27, 16]
+	ldr	w0, [x0, 12]
+	str	w0, [x29, 156]
+	uxtw	x0, w0
+	cbz	w0, .L1411
+	ldr	x0, [x29, 120]
+	ldrh	w1, [x0]
+	ldr	x0, [x27, 8]
+	bl	js_hash
+	ldr	w1, [x29, 156]
+	cmp	w1, w0
+	beq	.L1411
+	mov	x4, x1
+	ldr	x1, [x29, 112]
+	mov	w5, w0
+	mov	w3, w28
+	mov	w2, w20
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
+	bl	printf
+	mov	w0, -1
+	str	w0, [x27]
+.L1411:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	beq	.L1412
+	ldrh	w0, [x21, 8]
+	cmp	w25, w0
+	bls	.L1412
+	ldrh	w2, [x21]
 	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L1412
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x27, 4]
+	str	w1, [x23, x0]
+.L1412:
+	add	w7, w28, 1
+	sxth	w28, w7
+	b	.L1407
+.L1406:
+	ldrh	w3, [x26, #:lo12:.LANCHOR20]
+	mov	w0, 0
+	ldr	x4, [x22, #:lo12:.LANCHOR106]
+	sub	w3, w3, #1
+.L1408:
+	cmp	w0, w3
+	blt	.L1410
+.L1414:
+	add	w20, w20, 1
+	sxth	w20, w20
+	b	.L1397
+.L1410:
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x4, x1]
+	cmp	w25, w1
+	bls	.L1409
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+	ldr	w2, [x4, x2, lsl 2]
+	str	w2, [x23, x1]
+.L1409:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L1408
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR27
+	adrp	x0, .LANCHOR161
+	add	x0, x0, :lo12:.LANCHOR161
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR27]
+	strh	w1, [x0, 10]
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR28
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR36
+	ldr	x1, [x1, #:lo12:.LANCHOR36]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR122
+	ldr	x1, [x1, #:lo12:.LANCHOR122]
+	str	x1, [x0, 24]
+	adrp	x1, .LANCHOR121
+	ldr	x1, [x1, #:lo12:.LANCHOR121]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR123
+	ldr	x1, [x1, #:lo12:.LANCHOR123]
+	str	x1, [x0, 40]
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlL2PDataInit
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR4
+	add	x29, sp, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR156
+	stp	x21, x22, [sp, 32]
+	strh	wzr, [x19, #:lo12:.LANCHOR156]
+	str	x23, [sp, 48]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR139
+	ldrh	w1, [x0, #:lo12:.LANCHOR139]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1437
+.L1439:
+	mov	w21, -1
+.L1436:
+	mov	w0, w21
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1437:
+	bl	FtlLoadSysInfo
+	mov	w21, w0
+	cbnz	w0, .L1439
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x0, .LANCHOR33
+	ldrh	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR55
+	ldr	x1, [x0, #:lo12:.LANCHOR55]
+	mov	w0, 0
+	add	x1, x1, 4
+.L1440:
+	cmp	w0, w2
+	bge	.L1445
+	ldr	w3, [x1], 16
+	tbz	w3, #31, .L1441
+.L1445:
+	adrp	x3, .LANCHOR83
+	cmp	w0, w2
+	ldr	w1, [x3, #:lo12:.LANCHOR83]
+	add	w1, w1, 32
+	str	w1, [x3, #:lo12:.LANCHOR83]
+	bge	.L1447
+.L1442:
+	adrp	x23, .LANCHOR51
+	add	x20, x23, :lo12:.LANCHOR51
+	mov	x0, x20
+	adrp	x22, .LANCHOR52
+	bl	FtlSuperblockPowerLostFix
+	add	x19, x22, :lo12:.LANCHOR52
+	mov	x0, x19
+	bl	FtlSuperblockPowerLostFix
+	adrp	x0, .LANCHOR42
+	ldrh	w3, [x20, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
+	ldrh	w0, [x23, #:lo12:.LANCHOR51]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	adrp	x3, .LANCHOR19
+	strh	w2, [x1, x0]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x20, 2]
+	ldrh	w0, [x22, #:lo12:.LANCHOR52]
+	strh	wzr, [x20, 4]
+	ldrh	w4, [x19, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	strb	wzr, [x19, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	strh	wzr, [x19, 4]
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1449:
+	bl	FtlVpcTblFlush
+	b	.L1436
+.L1441:
 	add	w0, w0, 1
-	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmTblFlush
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-	.size	FtlMakeBbt, .-FtlMakeBbt
+	b	.L1440
+.L1447:
+	ldrh	w0, [x19, #:lo12:.LANCHOR156]
+	cbnz	w0, .L1442
+	bl	l2p_flush
+	b	.L1449
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
 	.type	ftl_low_format, %function
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR83
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x24, .LANCHOR4
-	str	wzr, [x0, #:lo12:.LANCHOR71]
+	str	wzr, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR70
+	adrp	x20, .LANCHOR82
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	str	wzr, [x20, #:lo12:.LANCHOR70]
+	str	wzr, [x20, #:lo12:.LANCHOR82]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1684
+	cbz	w0, .L1451
 	bl	FtlMakeBbt
-.L1684:
+.L1451:
 	adrp	x23, .LANCHOR12
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR109
 	mov	w6, 23752
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR119
+	ldr	x4, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR110
 	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR119]
+	ldr	x5, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-.L1685:
+.L1452:
 	cmp	w0, w1
-	blt	.L1686
+	blt	.L1453
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1687:
+.L1454:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1688
+	bhi	.L1455
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1689
-.L1693:
+	bgt	.L1456
+.L1460:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1690:
+.L1457:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1694
-	adrp	x0, .LANCHOR111
+	bhi	.L1461
+	adrp	x0, .LANCHOR99
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
-	adrp	x2, .LANCHOR78
-	str	w1, [x0, #:lo12:.LANCHOR111]
+	adrp	x2, .LANCHOR171
+	str	w1, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR7
-	adrp	x3, .LANCHOR61
+	adrp	x3, .LANCHOR152
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
 	udiv	w5, w1, w4
 	ubfx	x0, x5, 5, 16
-	str	w5, [x3, #:lo12:.LANCHOR61]
+	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w6, w0, 36
-	strh	w6, [x2, #:lo12:.LANCHOR78]
+	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1695
+	ble	.L1462
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
-	str	w1, [x3, #:lo12:.LANCHOR61]
+	str	w1, [x3, #:lo12:.LANCHOR152]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1695:
+	strh	w1, [x2, #:lo12:.LANCHOR171]
+.L1462:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1697
-	ldrh	w6, [x2, #:lo12:.LANCHOR78]
+	cbz	w1, .L1464
+	ldrh	w6, [x2, #:lo12:.LANCHOR171]
 	add	w6, w6, w1, lsr 1
-	strh	w6, [x2, #:lo12:.LANCHOR78]
+	strh	w6, [x2, #:lo12:.LANCHOR171]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1697
+	bge	.L1464
 	add	w1, w1, 32
-	str	w5, [x3, #:lo12:.LANCHOR61]
+	str	w5, [x3, #:lo12:.LANCHOR152]
 	add	w1, w0, w1
-	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1697:
-	ldrh	w1, [x2, #:lo12:.LANCHOR78]
-	adrp	x25, .LANCHOR152
-	ldr	w0, [x3, #:lo12:.LANCHOR61]
+	strh	w1, [x2, #:lo12:.LANCHOR171]
+.L1464:
+	ldrh	w1, [x2, #:lo12:.LANCHOR171]
+	adrp	x25, .LANCHOR179
+	ldr	w0, [x3, #:lo12:.LANCHOR152]
 	adrp	x24, .LANCHOR42
 	sub	w0, w0, w1
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR152]
+	str	w0, [x25, #:lo12:.LANCHOR179]
 	mul	w0, w1, w0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
-	str	w0, [x3, #:lo12:.LANCHOR61]
+	str	w0, [x3, #:lo12:.LANCHOR152]
 	mov	w23, -1
 	mul	w0, w1, w0
 	adrp	x1, .LANCHOR34
@@ -12420,11 +10941,11 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR59
-	adrp	x1, .LANCHOR80
+	adrp	x1, .LANCHOR144
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-	add	x0, x1, :lo12:.LANCHOR80
-	strh	w23, [x1, #:lo12:.LANCHOR80]
+	add	x0, x1, :lo12:.LANCHOR144
+	strh	w23, [x1, #:lo12:.LANCHOR144]
 	mov	w1, 255
 	lsr	w2, w2, 3
 	strh	wzr, [x0, 2]
@@ -12440,20 +10961,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1699:
+.L1466:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1700
+	cbnz	w1, .L1467
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1699
-.L1686:
+	b	.L1466
+.L1453:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12461,8 +10982,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1685
-.L1688:
+	b	.L1452
+.L1455:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12470,8 +10991,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1687
-.L1689:
+	b	.L1454
+.L1456:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12481,17 +11002,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1691:
+.L1458:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1693
+	bls	.L1460
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1691
-.L1694:
+	b	.L1458
+.L1461:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12499,14 +11020,14 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1690
-.L1700:
-	ldr	w1, [x20, #:lo12:.LANCHOR70]
+	b	.L1457
+.L1467:
+	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	mov	w23, -1
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR70]
+	str	w1, [x20, #:lo12:.LANCHOR82]
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
@@ -12520,25 +11041,25 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1701:
+.L1468:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1702
+	cbnz	w1, .L1469
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1701
-.L1702:
-	ldr	w1, [x20, #:lo12:.LANCHOR70]
+	b	.L1468
+.L1469:
+	ldr	w1, [x20, #:lo12:.LANCHOR82]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR70]
+	str	w1, [x20, #:lo12:.LANCHOR82]
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	mov	w19, -1
@@ -12546,24 +11067,24 @@ ftl_low_format:
 	adrp	x0, .LANCHOR53
 	strh	w19, [x0, #:lo12:.LANCHOR53]
 	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR79
-	add	x1, x2, :lo12:.LANCHOR79
-	strh	w0, [x2, #:lo12:.LANCHOR79]
-	ldr	w0, [x25, #:lo12:.LANCHOR152]
+	adrp	x2, .LANCHOR139
+	add	x1, x2, :lo12:.LANCHOR139
+	strh	w0, [x2, #:lo12:.LANCHOR139]
+	ldr	w0, [x25, #:lo12:.LANCHOR179]
 	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR70]
+	ldr	w0, [x20, #:lo12:.LANCHOR82]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	strh	wzr, [x1, 2]
 	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR70]
+	str	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1703
-	adrp	x0, .LANCHOR86
+	cbnz	w0, .L1470
+	adrp	x0, .LANCHOR166
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1703:
+	str	w1, [x0, #:lo12:.LANCHOR166]
+.L1470:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12572,14 +11093,64 @@ ftl_low_format:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_memcmp,"ax",@progbits
+	.section	.text.sftl_init,"ax",@progbits
 	.align	2
-	.global	ftl_memcmp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	uxtw	x2, w2
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
+	.global	sftl_init
+	.type	sftl_init, %function
+sftl_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LC41
+	add	x1, x1, :lo12:.LC41
+	mov	w0, -1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR166
+	adrp	x19, .LANCHOR181
+	add	x19, x19, :lo12:.LANCHOR181
+	str	w0, [x20, #:lo12:.LANCHOR166]
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
+	bl	printf
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	bl	FtlFreeSysBlkQueueInit
+.L1476:
+	bl	FtlLoadBbt
+	cbz	w0, .L1477
+.L1492:
+	ldr	w0, [x19]
+	cmp	w0, 1
+	bne	.L1476
+	str	wzr, [x19]
+	bl	ftl_low_format
+	b	.L1476
+.L1477:
+	bl	FtlSysBlkInit
+	cbnz	w0, .L1492
+	mov	w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 15
+	bhi	.L1489
+	mov	w19, 8129
+.L1483:
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	subs	w19, w19, #1
+	bne	.L1483
+.L1489:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	sftl_init, .-sftl_init
 	.section	.text.FtlWriteToIDB,"ax",@progbits
 	.align	2
 	.global	FtlWriteToIDB
@@ -12594,27 +11165,27 @@ FtlWriteToIDB:
 	stp	x19, x20, [sp, 16]
 	cmp	w25, 63
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR184
+	adrp	x24, .LANCHOR182
 	stp	x27, x28, [sp, 80]
-	bls	.L1710
+	bls	.L1494
 	mov	w19, w0
 	cmp	w0, 575
-	bls	.L1711
-.L1710:
-	ldr	w0, [x24, #:lo12:.LANCHOR184]
-	cbnz	w0, .L1712
-.L1779:
+	bls	.L1495
+.L1494:
+	ldr	w0, [x24, #:lo12:.LANCHOR182]
+	cbnz	w0, .L1496
+.L1561:
 	mov	w19, 0
-	b	.L1709
-.L1712:
-	adrp	x0, .LANCHOR185
+	b	.L1493
+.L1496:
+	adrp	x0, .LANCHOR183
 	str	x0, [x29, 120]
 	mov	w1, 35899
-	ldr	x23, [x0, #:lo12:.LANCHOR185]
+	ldr	x23, [x0, #:lo12:.LANCHOR183]
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x23]
 	cmp	w2, w1
-	bne	.L1714
+	bne	.L1498
 	adrp	x21, .LANCHOR0
 	add	x0, x21, :lo12:.LANCHOR0
 	mov	w19, 65535
@@ -12623,9 +11194,9 @@ FtlWriteToIDB:
 	mov	x0, 262140
 	add	x2, x23, x0
 	mov	w0, 0
-.L1718:
+.L1502:
 	ldr	w4, [x2]
-	cbnz	w4, .L1715
+	cbnz	w4, .L1499
 	ldr	w4, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x2], -4
@@ -12633,13 +11204,13 @@ FtlWriteToIDB:
 	sub	w19, w19, #1
 	csel	w0, w0, wzr, cc
 	cmp	w19, 4096
-	bne	.L1718
+	bne	.L1502
 	mov	w19, 512
-	b	.L1717
-.L1715:
+	b	.L1501
+.L1499:
 	add	w19, w19, 127
 	lsr	w19, w19, 7
-.L1717:
+.L1501:
 	add	w0, w19, 4
 	ubfiz	w1, w1, 2, 14
 	mov	w22, 0
@@ -12648,79 +11219,67 @@ FtlWriteToIDB:
 	stp	wzr, w0, [x29, 152]
 	lsl	w0, w19, 7
 	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR105
-	add	x20, x0, :lo12:.LANCHOR105
-.L1741:
-	adrp	x26, .LANCHOR186
+	adrp	x0, .LANCHOR78
+	add	x20, x0, :lo12:.LANCHOR78
+.L1524:
+	adrp	x26, .LANCHOR184
 	mov	w1, 0
 	mov	x2, 512
-	ldr	x0, [x26, #:lo12:.LANCHOR186]
+	ldr	x0, [x26, #:lo12:.LANCHOR184]
 	bl	memset
 	str	x26, [x29, 144]
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w27, [x0, 10]
-	adrp	x0, .LANCHOR105
-	add	x0, x0, :lo12:.LANCHOR105
+	adrp	x0, .LANCHOR78
+	add	x0, x0, :lo12:.LANCHOR78
 	ldr	x1, [x0, 32]
 	mul	w25, w27, w22
-	cbz	x1, .L1749
+	cbz	x1, .L1532
 	ldr	x0, [x0, 40]
 	mov	w26, 6
 	cmp	x0, 0
 	mov	w0, 9
 	csel	w26, w26, w0, eq
-.L1719:
+.L1503:
 	ldr	x2, [x20, 8]
 	mov	w1, w25
 	mov	w0, 0
 	blr	x2
 	ldr	w0, [x29, 156]
 	cmp	w0, 1
-	beq	.L1720
+	beq	.L1504
 	ldr	x2, [x20, 8]
 	add	w1, w27, w25
 	mov	w0, 0
 	blr	x2
-.L1720:
+.L1504:
 	cmp	w26, 9
-	bne	.L1751
+	bne	.L1534
 	ldr	x0, [x29, 144]
 	mov	w2, 1024
 	mov	w1, 0
-	ldr	x28, [x0, #:lo12:.LANCHOR186]
+	ldr	x28, [x0, #:lo12:.LANCHOR184]
 	mov	x0, x28
 	bl	ftl_memset
 	mov	w0, 18766
-	add	x5, x28, 12
+	mov	w1, 12
 	movk	w0, 0x464e, lsl 16
-	str	w0, [x28]
-	mov	w0, 12
-	str	w0, [x28, 4]
+	stp	w0, w1, [x28]
 	mov	w0, 4
 	strb	w0, [x28, 17]
 	add	x0, x21, :lo12:.LANCHOR0
 	strb	wzr, [x28, 16]
 	strb	wzr, [x28, 20]
-	mov	x2, 0
 	strh	wzr, [x28, 22]
 	ldrh	w0, [x0, 10]
 	strh	w0, [x28, 18]
+	str	wzr, [x28, 12]
 	mov	w0, 16
 	strb	w0, [x28, 21]
-	mov	w0, 42982
-	str	wzr, [x28, 12]
-	movk	w0, 0x47c6, lsl 16
-.L1722:
-	lsr	w1, w0, 2
-	ldrb	w3, [x5, x2]
-	add	w1, w1, w0, lsl 5
-	add	x2, x2, 1
-	add	w1, w1, w3
-	cmp	x2, 12
-	eor	w0, w0, w1
-	bne	.L1722
+	add	x0, x28, 12
+	bl	js_hash
 	str	w0, [x28, 8]
-.L1721:
+.L1505:
 	ldr	w0, [x29, 156]
 	mov	x6, x23
 	mul	w0, w0, w27
@@ -12728,22 +11287,22 @@ FtlWriteToIDB:
 	str	w0, [x29, 140]
 	add	w0, w25, 1
 	str	w0, [x29, 132]
-.L1723:
+.L1506:
 	ldr	w0, [x29, 140]
 	mov	w1, w27
 	cmp	w27, w0
-	bcs	.L1730
+	bcs	.L1513
 	cmp	w26, 9
-	bne	.L1724
+	bne	.L1507
 	ldr	w0, [x29, 132]
 	add	w0, w0, w1
-.L1778:
+.L1560:
 	str	w0, [x29, 160]
 	mov	w0, 61424
 	str	w0, [x29, 164]
 	cmp	w1, 0
 	ccmp	w26, 9, 0, eq
-	bne	.L1726
+	bne	.L1509
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	str	x6, [x29, 104]
@@ -12763,31 +11322,31 @@ FtlWriteToIDB:
 	ldr	w1, [x29, 112]
 	ldr	x6, [x29, 104]
 	cmn	w1, #1
-	bne	.L1727
-.L1730:
+	bne	.L1510
+.L1513:
 	ldr	x0, [x29, 144]
-	ldr	x26, [x0, #:lo12:.LANCHOR186]
+	ldr	x26, [x0, #:lo12:.LANCHOR184]
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrb	w28, [x0, 14]
 	ldrh	w0, [x0, 10]
 	mul	w1, w0, w22
 	str	w1, [x29, 140]
 	ldr	x1, [x20, 32]
-	cbnz	x1, .L1728
+	cbnz	x1, .L1511
 	mov	w25, 6
-.L1729:
+.L1512:
 	ldr	w1, [x29, 156]
 	mov	x27, 0
 	mul	w0, w1, w0
 	str	w0, [x29, 132]
-.L1732:
+.L1515:
 	ldr	w0, [x29, 132]
 	mov	w1, w27
-	cmp	w0, w27
-	bls	.L1736
+	cmp	w27, w0
+	bcs	.L1519
 	cmp	w27, 0
 	ccmp	w25, 9, 0, eq
-	bne	.L1733
+	bne	.L1516
 	ldr	x1, [x20, 32]
 	mov	w0, 70
 	blr	x1
@@ -12811,34 +11370,34 @@ FtlWriteToIDB:
 	mov	w1, 18766
 	movk	w1, 0x464e, lsl 16
 	cmp	w0, w1
-	beq	.L1734
-.L1736:
+	beq	.L1517
+.L1519:
 	ldr	x0, [x29, 144]
 	mov	x2, x23
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1735:
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
+.L1518:
 	ldr	w3, [x29, 136]
 	mov	w26, w1
 	cmp	w1, w3
-	bcc	.L1739
+	bcc	.L1522
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	cmp	w0, 5
-	bls	.L1738
-	b	.L1742
-.L1749:
+	bls	.L1521
+	b	.L1525
+.L1532:
 	mov	w26, 6
-	b	.L1719
-.L1751:
+	b	.L1503
+.L1534:
 	mov	x28, 0
-	b	.L1721
-.L1724:
+	b	.L1505
+.L1507:
 	add	w0, w1, w25
 	lsl	w0, w0, 2
-	b	.L1778
-.L1726:
+	b	.L1560
+.L1509:
 	ldr	x7, [x20, 16]
 	add	x3, x29, 160
 	mov	x2, x6
@@ -12847,38 +11406,38 @@ FtlWriteToIDB:
 	str	x6, [x29, 112]
 	blr	x7
 	cmn	w0, #1
-	beq	.L1730
+	beq	.L1513
 	ldr	x6, [x29, 112]
 	add	x6, x6, 2048
-.L1727:
+.L1510:
 	add	x27, x27, 1
-	b	.L1723
-.L1728:
+	b	.L1506
+.L1511:
 	ldr	x1, [x20, 40]
 	mov	w25, 6
 	cmp	x1, 0
 	mov	w1, 9
 	csel	w25, w25, w1, eq
-	b	.L1729
-.L1733:
+	b	.L1512
+.L1516:
 	ldr	x6, [x20, 24]
 	add	x3, x29, 160
 	ldr	w0, [x29, 140]
 	mov	x2, x26
-	add	w1, w0, w1
+	add	w1, w1, w0
 	mov	w0, 0
 	blr	x6
 	cmn	w0, #1
-	beq	.L1736
+	beq	.L1519
 	ldr	w0, [x29, 164]
 	mov	w1, 61424
 	cmp	w0, w1
-	bne	.L1736
+	bne	.L1519
 	add	x26, x26, 2048
-.L1734:
+.L1517:
 	add	x27, x27, 1
-	b	.L1732
-.L1739:
+	b	.L1515
+.L1522:
 	mov	x25, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x27, x1, 2
@@ -12886,7 +11445,7 @@ FtlWriteToIDB:
 	add	x1, x1, 1
 	ldr	w3, [x25]
 	cmp	w4, w3
-	beq	.L1735
+	beq	.L1518
 	mov	x2, 512
 	mov	w1, 0
 	bl	memset
@@ -12894,10 +11453,10 @@ FtlWriteToIDB:
 	mov	w1, w22
 	ldr	w3, [x25]
 	mov	w4, w26
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	ldr	w2, [x0, x27]
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	add	x0, x21, :lo12:.LANCHOR0
 	ldr	x2, [x20, 8]
@@ -12905,24 +11464,24 @@ FtlWriteToIDB:
 	mov	w0, 0
 	mul	w1, w1, w22
 	blr	x2
-.L1738:
+.L1521:
 	ldr	w0, [x29, 156]
 	add	w22, w22, w0
 	cmp	w22, 15
-	bls	.L1741
+	bls	.L1524
 	ldr	w0, [x29, 152]
-	cbnz	w0, .L1742
-.L1714:
+	cbnz	w0, .L1525
+.L1498:
 	mov	w19, -1
-.L1742:
+.L1525:
 	ldr	x0, [x29, 120]
-	str	wzr, [x24, #:lo12:.LANCHOR184]
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	str	wzr, [x24, #:lo12:.LANCHOR182]
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
 	bl	free
-	adrp	x0, .LANCHOR186
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR184
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	bl	free
-.L1709:
+.L1493:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12931,70 +11490,70 @@ FtlWriteToIDB:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 224
 	ret
-.L1711:
+.L1495:
 	mov	w21, w1
 	mov	x22, x2
 	cmp	w0, 64
-	bne	.L1743
-	adrp	x20, .LANCHOR185
+	bne	.L1526
+	adrp	x20, .LANCHOR183
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x20, #:lo12:.LANCHOR185]
+	str	x0, [x20, #:lo12:.LANCHOR183]
 	mov	w0, 262144
 	bl	ftl_malloc
 	mov	x1, x0
-	adrp	x0, .LANCHOR186
-	str	x1, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x20, #:lo12:.LANCHOR185]
-	cbz	x0, .L1744
-	cbz	x1, .L1744
+	adrp	x0, .LANCHOR184
+	str	x1, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x20, #:lo12:.LANCHOR183]
+	cbz	x0, .L1527
+	cbz	x1, .L1527
 	mov	w1, 1
 	mov	w2, 262144
-	str	w1, [x24, #:lo12:.LANCHOR184]
+	str	w1, [x24, #:lo12:.LANCHOR182]
 	mov	w1, 0
 	bl	ftl_memset
-.L1743:
-	ldr	w0, [x24, #:lo12:.LANCHOR184]
-	cbz	w0, .L1779
-	adrp	x0, .LANCHOR185
+.L1526:
+	ldr	w0, [x24, #:lo12:.LANCHOR182]
+	cbz	w0, .L1561
+	adrp	x0, .LANCHOR183
 	cmp	w19, 63
-	ldr	x1, [x0, #:lo12:.LANCHOR185]
-	bhi	.L1746
+	ldr	x1, [x0, #:lo12:.LANCHOR183]
+	bhi	.L1529
 	mov	w0, 64
 	sub	w19, w0, w19
 	sub	w21, w21, w19
 	ubfiz	x19, x19, 9, 25
 	add	x22, x22, x19
 	mov	x20, x1
-.L1747:
+.L1530:
 	cmp	w25, 575
-	bls	.L1748
+	bls	.L1531
 	sub	w21, w21, w23
 	sub	w21, w21, #446
-.L1748:
+.L1531:
 	mov	w4, w21
 	mov	x3, x20
 	mov	w2, 262144
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
 	lsl	w2, w21, 9
 	mov	x1, x22
 	mov	x0, x20
 	bl	ftl_memcpy
-	b	.L1779
-.L1744:
-	adrp	x1, .LANCHOR187
-	adrp	x0, .LC115
-	add	x1, x1, :lo12:.LANCHOR187
-	add	x0, x0, :lo12:.LC115
+	b	.L1561
+.L1527:
+	adrp	x1, .LANCHOR185
+	adrp	x0, .LC43
+	add	x1, x1, :lo12:.LANCHOR185
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	b	.L1743
-.L1746:
+	b	.L1526
+.L1529:
 	lsl	w20, w19, 7
 	sub	w20, w20, #8192
 	add	x20, x1, x20, lsl 2
-	b	.L1747
+	b	.L1530
 	.size	FtlWriteToIDB, .-FtlWriteToIDB
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -13025,6 +11584,7 @@ sftl_write:
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	power_up_flag
+	.global	low_format_en
 	.global	gFtlInitStatus
 	.global	DeviceCapacity
 	.global	g_power_lost_recovery_flag
@@ -13183,7 +11743,7 @@ FtlUpdateVaildLpnCount:
 	.zero	2
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
@@ -13232,7 +11792,7 @@ c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -13400,7 +11960,7 @@ c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -13420,7 +11980,7 @@ check_vpc_table:
 	.zero	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -13434,7 +11994,7 @@ gBbtInfo:
 	.zero	96
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
@@ -13448,28 +12008,28 @@ gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gSysInfo, %object
-	.size	gSysInfo, 12
+	.size	gSysInfo, 16
 gSysInfo:
-	.zero	12
+	.zero	16
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -13483,14 +12043,14 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -13518,147 +12078,147 @@ g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.zero	4
 	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -13672,14 +12232,14 @@ g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -13693,21 +12253,21 @@ g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nand_ops,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 48
 g_nand_ops:
@@ -13735,35 +12295,35 @@ g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
@@ -13777,91 +12337,91 @@ g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -13875,49 +12435,49 @@ g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gp_ect_tbl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	gp_flash_check_buf, %object
 	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
 	.zero	8
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
@@ -13930,17 +12490,24 @@ gp_last_act_superblock:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	idb_buf, %object
 	.size	idb_buf, 8
 idb_buf:
 	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
+	.zero	4
+	.section	.bss.low_format_en,"aw",@nobits
+	.align	2
+	.set	.LANCHOR181,. + 0
+	.type	low_format_en, %object
+	.size	low_format_en, 4
+low_format_en:
 	.zero	4
 	.section	.bss.p_blk_mode_table,"aw",@nobits
 	.align	3
@@ -13986,56 +12553,56 @@ p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
 	.zero	8
 	.section	.bss.p_l2p_map_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 8
 p_l2p_map_buf:
@@ -14049,28 +12616,28 @@ p_l2p_ram_map:
 	.zero	8
 	.section	.bss.p_map_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 8
 p_map_block_table:
 	.zero	8
 	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 8
 p_map_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_map_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 8
 p_map_block_ver_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 8
 p_map_region_ppn_table:
@@ -14084,35 +12651,34 @@ p_plane_order_table:
 	.zero	32
 	.section	.bss.p_swl_mul_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 8
 p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
 	.zero	8
 	.section	.bss.p_valid_page_count_check_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR128,. + 0
 	.type	p_valid_page_count_check_table, %object
 	.size	p_valid_page_count_check_table, 8
 p_valid_page_count_check_table:
@@ -14133,630 +12699,472 @@ p_vendor_block_table:
 	.zero	8
 	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 8
 p_vendor_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 8
 p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
 	.zero	8
 	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 8
 p_vendor_region_ppn_table:
 	.zero	8
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
 	.zero	32
 	.section	.bss.sftl_nand_check_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	sftl_nand_check_buf, %object
 	.size	sftl_nand_check_buf, 8
 sftl_nand_check_buf:
 	.zero	8
 	.section	.bss.sftl_nand_check_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	sftl_nand_check_spare_buf, %object
 	.size	sftl_nand_check_spare_buf, 8
 sftl_nand_check_spare_buf:
 	.zero	8
 	.section	.bss.sftl_temp_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	sftl_temp_buf, %object
 	.size	sftl_temp_buf, 8
 sftl_temp_buf:
 	.zero	8
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",@progbits
 	.align	2
-	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
 	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",@progbits,1
-.LC79:
+.LC6:
 	.string	"%s: addr: %x is in id block!!!!!!!!!!\n"
-.LC80:
+.LC7:
 	.string	"not free: w: d:"
-.LC81:
+.LC8:
 	.string	"not free: w: s:"
 	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
-.LC85:
+.LC11:
 	.string	"prog read error: = %x\n"
-.LC86:
+.LC12:
 	.string	"prog read s error: = %x %x %x\n"
-.LC87:
+.LC13:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC101:
+.LC14:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC102:
+.LC15:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC103:
+.LC16:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
-.LC82:
+.LC9:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
-	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
-.LC104:
-	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
-	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
-.LC74:
-	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
-	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",@progbits,1
-.LC73:
-	.string	"FtlGcRefreshBlock  0x%x\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC100:
+.LC31:
 	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC108:
-	.string	"no ect"
-	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC88:
-	.string	"FtlMapWritePage error = %x \n"
-.LC89:
-	.string	"FtlMapWritePage error = %x error count = %d\n"
-	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
-.LC84:
-	.string	"%s error allocating memory. return -1\n"
-	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
-.LC2:
-	.string	"FLASH INFO:\n"
-.LC3:
-	.string	"Device Capacity: %d MB\n"
-.LC4:
-	.string	"FTL INFO:\n"
-.LC5:
-	.string	"g_MaxLpn = 0x%x\n"
-.LC6:
-	.string	"g_VaildLpn = 0x%x\n"
-.LC7:
-	.string	"read_page_count = 0x%x\n"
-.LC8:
-	.string	"discard_page_count = 0x%x\n"
-.LC9:
-	.string	"write_page_count = 0x%x\n"
-.LC10:
-	.string	"cache_write_count = 0x%x\n"
-.LC11:
-	.string	"l2p_write_count = 0x%x\n"
-.LC12:
-	.string	"gc_page_count = 0x%x\n"
-.LC13:
-	.string	"totle_write = %d MB\n"
-.LC14:
-	.string	"totle_read = %d MB\n"
-.LC15:
-	.string	"GSV = 0x%x\n"
-.LC16:
-	.string	"GDV = 0x%x\n"
-.LC17:
-	.string	"bad blk num = %d\n"
-.LC18:
-	.string	"free_superblocks = 0x%x\n"
-.LC19:
-	.string	"mlc_EC = 0x%x\n"
-.LC20:
-	.string	"slc_EC = 0x%x\n"
-.LC21:
-	.string	"avg_EC = 0x%x\n"
-.LC22:
-	.string	"sys_EC = 0x%x\n"
-.LC23:
-	.string	"max_EC = 0x%x\n"
-.LC24:
-	.string	"min_EC = 0x%x\n"
-.LC25:
-	.string	"PLT = 0x%x\n"
-.LC26:
-	.string	"POT = 0x%x\n"
-.LC27:
-	.string	"MaxSector = 0x%x\n"
-.LC28:
-	.string	"init_sys_blks_pp = 0x%x\n"
-.LC29:
-	.string	"sys_blks_pp = 0x%x\n"
-.LC30:
-	.string	"free sysblock = 0x%x\n"
-.LC31:
-	.string	"data_blks_pp = 0x%x\n"
-.LC32:
-	.string	"data_op_blks_pp = 0x%x\n"
 .LC33:
-	.string	"max_data_blks = 0x%x\n"
+	.string	"no ect"
 .LC34:
-	.string	"Sys.id = 0x%x\n"
-.LC35:
-	.string	"Bbt.id = 0x%x\n"
-.LC36:
-	.string	"ACT.page = 0x%x\n"
-.LC37:
-	.string	"ACT.plane = 0x%x\n"
+	.string	"%s\n"
+	.section	.rodata.FtlLoadSysInfo.str1.1,"aMS",@progbits,1
 .LC38:
-	.string	"ACT.id = 0x%x\n"
+	.string	"%s hash error this.id =%x page =%x pre_id =%x hash =%x hash_r =%x\n"
+	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
 .LC39:
-	.string	"ACT.mode = 0x%x\n"
+	.string	"%s last blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
 .LC40:
-	.string	"ACT.a_pages = 0x%x\n"
-.LC41:
-	.string	"ACT VPC = 0x%x\n"
-.LC42:
-	.string	"BUF.page = 0x%x\n"
-.LC43:
-	.string	"BUF.plane = 0x%x\n"
-.LC44:
-	.string	"BUF.id = 0x%x\n"
-.LC45:
-	.string	"BUF.mode = 0x%x\n"
-.LC46:
-	.string	"BUF.a_pages = 0x%x\n"
-.LC47:
-	.string	"BUF VPC = 0x%x\n"
-.LC48:
-	.string	"TMP.page = 0x%x\n"
-.LC49:
-	.string	"TMP.plane = 0x%x\n"
-.LC50:
-	.string	"TMP.id = 0x%x\n"
-.LC51:
-	.string	"TMP.mode = 0x%x\n"
-.LC52:
-	.string	"TMP.a_pages = 0x%x\n"
-.LC53:
-	.string	"GC.page = 0x%x\n"
-.LC54:
-	.string	"GC.plane = 0x%x\n"
-.LC55:
-	.string	"GC.id = 0x%x\n"
-.LC56:
-	.string	"GC.mode = 0x%x\n"
-.LC57:
-	.string	"GC.a_pages = 0x%x\n"
-.LC58:
-	.string	"WR_CHK = %x %x %x\n"
-.LC59:
-	.string	"Read Err Cnt = 0x%x\n"
-.LC60:
-	.string	"Prog Err Cnt = 0x%x\n"
-.LC61:
-	.string	"gc_free_blk_th= 0x%x\n"
-.LC62:
-	.string	"gc_merge_free_blk_th= 0x%x\n"
-.LC63:
-	.string	"gc_skip_write_count= 0x%x\n"
-.LC64:
-	.string	"gc_blk_index= 0x%x\n"
-.LC65:
-	.string	"free min EC= 0x%x\n"
-.LC66:
-	.string	"free max EC= 0x%x\n"
-.LC67:
-	.string	"GC__SB VPC = 0x%x\n"
-.LC68:
-	.string	"%d. [0x%x]=0x%x 0x%x  0x%x\n"
-.LC69:
-	.string	"free %d. [0x%x] 0x%x  0x%x\n"
+	.string	"%s scan blk_id =%x page =%x hash error hash =%x hash_r =%x\n"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"FtlMapWritePage error = %x \n"
+.LC19:
+	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC111:
+.LC36:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC106:
+.LC24:
 	.string	"spuer block %x vpn is 0\n "
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC107:
+.LC32:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
-	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
-.LC110:
-	.string	"FtlCheckVpc %x = %x  %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC109:
+.LC35:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC113:
+.LC37:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1
-.LC114:
+.LC42:
 	.string	"write_idblock fail! %x %x %x %x\n"
-.LC115:
+.LC43:
 	.string	"%s idb buffer alloc fail\n"
-.LC116:
+.LC44:
 	.string	"%p %x %p %x\n"
-	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
-.LC72:
-	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6148,"a",@progbits
-	.align	3
-	.set	.LANCHOR138,. + 0
-	.type	__func__.6148, %object
-	.size	__func__.6148, 11
-__func__.6148:
-	.string	"FtlMemInit"
-	.section	.rodata.__func__.6272,"a",@progbits
+	.section	.rodata.__func__.6241,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.6272, %object
-	.size	__func__.6272, 13
-__func__.6272:
+	.set	.LANCHOR169,. + 0
+	.type	__func__.6241, %object
+	.size	__func__.6241, 13
+__func__.6241:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6300,"a",@progbits
+	.section	.rodata.__func__.6269,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.6300, %object
-	.size	__func__.6300, 9
-__func__.6300:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.6269, %object
+	.size	__func__.6269, 9
+__func__.6269:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6375,"a",@progbits
+	.section	.rodata.__func__.6344,"a",@progbits
 	.align	3
-	.set	.LANCHOR139,. + 0
-	.type	__func__.6375, %object
-	.size	__func__.6375, 14
-__func__.6375:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.6344, %object
+	.size	__func__.6344, 14
+__func__.6344:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6418,"a",@progbits
+	.section	.rodata.__func__.6379,"a",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.6418, %object
-	.size	__func__.6418, 11
-__func__.6418:
+	.set	.LANCHOR141,. + 0
+	.type	__func__.6379, %object
+	.size	__func__.6379, 11
+__func__.6379:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6533,"a",@progbits
+	.section	.rodata.__func__.6494,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6533, %object
-	.size	__func__.6533, 17
-__func__.6533:
+	.type	__func__.6494, %object
+	.size	__func__.6494, 17
+__func__.6494:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6538,"a",@progbits
+	.section	.rodata.__func__.6499,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6538, %object
-	.size	__func__.6538, 17
-__func__.6538:
+	.type	__func__.6499, %object
+	.size	__func__.6499, 17
+__func__.6499:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6569,"a",@progbits
+	.section	.rodata.__func__.6530,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6569, %object
-	.size	__func__.6569, 17
-__func__.6569:
+	.type	__func__.6530, %object
+	.size	__func__.6530, 17
+__func__.6530:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6601,"a",@progbits
+	.section	.rodata.__func__.6562,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6601, %object
-	.size	__func__.6601, 22
-__func__.6601:
+	.type	__func__.6562, %object
+	.size	__func__.6562, 22
+__func__.6562:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6610,"a",@progbits
+	.section	.rodata.__func__.6571,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.6610, %object
-	.size	__func__.6610, 16
-__func__.6610:
+	.set	.LANCHOR150,. + 0
+	.type	__func__.6571, %object
+	.size	__func__.6571, 16
+__func__.6571:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6643,"a",@progbits
+	.section	.rodata.__func__.6604,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.6643, %object
-	.size	__func__.6643, 26
-__func__.6643:
+	.set	.LANCHOR81,. + 0
+	.type	__func__.6604, %object
+	.size	__func__.6604, 26
+__func__.6604:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6654,"a",@progbits
+	.section	.rodata.__func__.6615,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.6654, %object
-	.size	__func__.6654, 15
-__func__.6654:
+	.set	.LANCHOR151,. + 0
+	.type	__func__.6615, %object
+	.size	__func__.6615, 15
+__func__.6615:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6669,"a",@progbits
+	.section	.rodata.__func__.6630,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.6669, %object
-	.size	__func__.6669, 31
-__func__.6669:
+	.set	.LANCHOR148,. + 0
+	.type	__func__.6630, %object
+	.size	__func__.6630, 31
+__func__.6630:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6683,"a",@progbits
+	.section	.rodata.__func__.6644,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.6683, %object
-	.size	__func__.6683, 16
-__func__.6683:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.6644, %object
+	.size	__func__.6644, 16
+__func__.6644:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6708,"a",@progbits
+	.section	.rodata.__func__.6669,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6708, %object
-	.size	__func__.6708, 22
-__func__.6708:
+	.type	__func__.6669, %object
+	.size	__func__.6669, 22
+__func__.6669:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6725,"a",@progbits
+	.section	.rodata.__func__.6686,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.6725, %object
-	.size	__func__.6725, 9
-__func__.6725:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.6686, %object
+	.size	__func__.6686, 9
+__func__.6686:
 	.string	"log2phys"
-	.section	.rodata.__func__.6798,"a",@progbits
+	.section	.rodata.__func__.6750,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.6798, %object
-	.size	__func__.6798, 15
-__func__.6798:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.6750, %object
+	.size	__func__.6750, 15
+__func__.6750:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6820,"a",@progbits
+	.section	.rodata.__func__.6772,"a",@progbits
 	.align	3
-	.set	.LANCHOR149,. + 0
-	.type	__func__.6820, %object
-	.size	__func__.6820, 14
-__func__.6820:
+	.set	.LANCHOR140,. + 0
+	.type	__func__.6772, %object
+	.size	__func__.6772, 14
+__func__.6772:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6877,"a",@progbits
+	.section	.rodata.__func__.6828,"a",@progbits
 	.align	3
-	.set	.LANCHOR151,. + 0
-	.type	__func__.6877, %object
-	.size	__func__.6877, 15
-__func__.6877:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.6828, %object
+	.size	__func__.6828, 15
+__func__.6828:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6940,"a",@progbits
+	.section	.rodata.__func__.6850,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.6940, %object
-	.size	__func__.6940, 16
-__func__.6940:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.6850, %object
+	.size	__func__.6850, 18
+__func__.6850:
+	.string	"FtlMapTblRecovery"
+	.section	.rodata.__func__.6896,"a",@progbits
+	.align	3
+	.set	.LANCHOR154,. + 0
+	.type	__func__.6896, %object
+	.size	__func__.6896, 16
+__func__.6896:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6974,"a",@progbits
+	.section	.rodata.__func__.6930,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
-	.type	__func__.6974, %object
-	.size	__func__.6974, 22
-__func__.6974:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.6930, %object
+	.size	__func__.6930, 22
+__func__.6930:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7031,"a",@progbits
+	.section	.rodata.__func__.6987,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7031, %object
-	.size	__func__.7031, 16
-__func__.7031:
+	.type	__func__.6987, %object
+	.size	__func__.6987, 16
+__func__.6987:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7052,"a",@progbits
+	.section	.rodata.__func__.7008,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.7052, %object
-	.size	__func__.7052, 18
-__func__.7052:
+	.set	.LANCHOR136,. + 0
+	.type	__func__.7008, %object
+	.size	__func__.7008, 18
+__func__.7008:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7077,"a",@progbits
-	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.7077, %object
-	.size	__func__.7077, 21
-__func__.7077:
-	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7093,"a",@progbits
+	.section	.rodata.__func__.7035,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.7093, %object
-	.size	__func__.7093, 14
-__func__.7093:
+	.set	.LANCHOR159,. + 0
+	.type	__func__.7035, %object
+	.size	__func__.7035, 14
+__func__.7035:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7178,"a",@progbits
+	.section	.rodata.__func__.7100,"a",@progbits
 	.align	3
-	.set	.LANCHOR163,. + 0
-	.type	__func__.7178, %object
-	.size	__func__.7178, 25
-__func__.7178:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.7100, %object
+	.size	__func__.7100, 25
+__func__.7100:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7199,"a",@progbits
+	.section	.rodata.__func__.7121,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.7199, %object
-	.size	__func__.7199, 29
-__func__.7199:
+	.set	.LANCHOR168,. + 0
+	.type	__func__.7121, %object
+	.size	__func__.7121, 29
+__func__.7121:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7206,"a",@progbits
+	.section	.rodata.__func__.7128,"a",@progbits
 	.align	3
-	.set	.LANCHOR88,. + 0
-	.type	__func__.7206, %object
-	.size	__func__.7206, 19
-__func__.7206:
+	.set	.LANCHOR61,. + 0
+	.type	__func__.7128, %object
+	.size	__func__.7128, 19
+__func__.7128:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7219,"a",@progbits
+	.section	.rodata.__func__.7141,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.7219, %object
-	.size	__func__.7219, 16
-__func__.7219:
+	.set	.LANCHOR146,. + 0
+	.type	__func__.7141, %object
+	.size	__func__.7141, 16
+__func__.7141:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7226,"a",@progbits
+	.section	.rodata.__func__.7148,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.7226, %object
-	.size	__func__.7226, 20
-__func__.7226:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.7148, %object
+	.size	__func__.7148, 20
+__func__.7148:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7296,"a",@progbits
+	.section	.rodata.__func__.7218,"a",@progbits
 	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.7296, %object
-	.size	__func__.7296, 19
-__func__.7296:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.7218, %object
+	.size	__func__.7218, 19
+__func__.7218:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7407,"a",@progbits
+	.section	.rodata.__func__.7316,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.7407, %object
-	.size	__func__.7407, 23
-__func__.7407:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.7316, %object
+	.size	__func__.7316, 23
+__func__.7316:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7669,"a",@progbits
+	.section	.rodata.__func__.7578,"a",@progbits
 	.align	3
-	.set	.LANCHOR147,. + 0
-	.type	__func__.7669, %object
-	.size	__func__.7669, 15
-__func__.7669:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.7578, %object
+	.size	__func__.7578, 15
+__func__.7578:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7688,"a",@progbits
+	.section	.rodata.__func__.7597,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.7688, %object
-	.size	__func__.7688, 15
-__func__.7688:
+	.set	.LANCHOR142,. + 0
+	.type	__func__.7597, %object
+	.size	__func__.7597, 15
+__func__.7597:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7712,"a",@progbits
+	.section	.rodata.__func__.7621,"a",@progbits
 	.align	3
-	.set	.LANCHOR104,. + 0
-	.type	__func__.7712, %object
-	.size	__func__.7712, 17
-__func__.7712:
+	.set	.LANCHOR77,. + 0
+	.type	__func__.7621, %object
+	.size	__func__.7621, 17
+__func__.7621:
 	.string	"FlashEraseBlocks"
-	.section	.rodata.__func__.7827,"a",@progbits
+	.section	.rodata.__func__.7736,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.7827, %object
-	.size	__func__.7827, 14
-__func__.7827:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.7736, %object
+	.size	__func__.7736, 14
+__func__.7736:
 	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC105:
+.LC17:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
-.LC94:
+.LC25:
 	.string	"...%s enter...\n"
-.LC95:
+.LC26:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC96:
+.LC27:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC83:
+.LC10:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC97:
+.LC28:
 	.string	"ftl_scan_all_data = %x\n"
-.LC98:
+.LC29:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC99:
+.LC30:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC90:
+.LC20:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC91:
+.LC21:
 	.string	"spare:"
-.LC92:
+.LC22:
 	.string	"map_ppn:"
-.LC93:
+.LC23:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC112:
-	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC75:
+.LC2:
 	.string	"%s 0x%x:"
-.LC76:
+.LC3:
 	.string	"%x "
-.LC77:
+.LC4:
 	.string	"%02x "
-.LC78:
+.LC5:
 	.string	"\n"
-	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
-.LC70:
-	.string	"SFTL version: 5.0.49 20181030"
-.LC71:
-	.string	"%s\n"
+	.section	.rodata.sftl_init.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"SFTL version: 5.0.50 20181227"
 	.hidden	free

commit 681cd0c0ec968b9c11d6ac2c21f170313248518e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 21:12:09 2018 +0800

    configs: rk3399: remove unnecessary modules to decrease size
    
    size: 883KB => 752KB
    
    Change-Id: If5095e4c3d1761d999315464f3e1449326dd392e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 3803831b90..f95ff9d16b 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -25,26 +25,36 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
-CONFIG_CMD_PMIC=y
-CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_NET_RANDOM_ETHADDR=y
+# CONFIG_NET_TFTP_VARS is not set
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -105,22 +115,16 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330a
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_ETHER_ASIX88179=y
-CONFIG_USB_ETHER_MCS7830=y
-CONFIG_USB_ETHER_RTL8152=y
-CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit 16489ccd87d360755d6e945520badc9ee58bd690
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Wed Dec 19 10:29:19 2018 +0800

    make.sh: decrease rk1808 uboot and trust backup copies to save space
    
    - 1MB * 2 copies;
    - on RK1808X4 board, only 32MB norflash space;
    
    Change-Id: I9154989303e5a8f55e17d139f2674a5321324137
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index cba6591bdb..f2a1293a98 100755
--- a/make.sh
+++ b/make.sh
@@ -394,6 +394,9 @@ fixup_platform_configure()
 			PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
 			PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 		fi
+	elif [ $RKCHIP = "RK1808" ]; then
+		PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
+		PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 	fi
 
 # <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms

commit 40f13eb7715d1103ead7486dcab3f0fced7fee42
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Dec 21 11:18:06 2018 +0800

    lib: optee_clientApi: write table when verify table fail
    
    Change-Id: I38d055945da5bf183e34588a08d8964c2d810f5f
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 73b839db8a..8fd2448b8f 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -320,7 +320,7 @@ static int rkss_verify_ptable(unsigned char *table_data)
 {
 	unsigned char *cp, *vp;
 	struct rkss_file_verification *verify;
-	int ret, i;
+	int ret, i, write_table_flag = 0;
 
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		cp = table_data + (i * RKSS_DATA_LEN);
@@ -333,12 +333,15 @@ static int rkss_verify_ptable(unsigned char *table_data)
 			memset(cp, 0, RKSS_DATA_LEN);
 			verify->checkstr = RKSS_CHECK_STR;
 			verify->version = RKSS_VERSION;
+			write_table_flag = 1;
 		}
 	}
-	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
-	if (ret < 0) {
-		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
-		return -1;
+	if (write_table_flag == 1) {
+		ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
+		if (ret < 0) {
+			printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+			return -1;
+		}
 	}
 	debug("verify ptable success.");
 	return 0;

commit 270ed4a992a651cfbdc368d77fe8788cfd18c9b4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Dec 3 10:59:03 2018 +0800

    android: fix compare slot_suffix error
    
    If slot_suffix is equal to "_a", slot_index_to_boot is equal to '0'
    but not '1' when use function strncmp.
    
    Change-Id: I53ffc920824e03c923f1d9ab8fd326a733c59654
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 464e23a3bf..710bff8602 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -481,9 +481,9 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
 	}
 
-	if (strncmp(slot_suffix, "_a", 2))
+	if (!strncmp(slot_suffix, "_a", 2))
 		slot_index_to_boot = 0;
-	else if(strncmp(slot_suffix, "_b", 2))
+	else if (!strncmp(slot_suffix, "_b", 2))
 		slot_index_to_boot = 1;
 	else
 		slot_index_to_boot = 0;

commit 6b7594123f9aaf8f60ef08f76346cc8d2857096b
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Dec 25 14:32:32 2018 +0800

    rockchip: configs: rk3399pro: Support Rockchip INNO USB2PHY
    
    Change-Id: Id1516a6dd3d5e2d06f7d30448f3b92fd84f20e2d
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 1e463ce644..c31ef8b9a3 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -66,6 +66,8 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y

commit 4652b3041df5e7e99161d4e4adfb9d734417e5c8
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:22:29 2018 +0800

    rockchip: dts: rk3399: add lpddr4 support
    
    Change-Id: I5bf0d19a6ebbdbcfe3b00a6f3fdddeb6ab572826
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
new file mode 100644
index 0000000000..da5bf40b3a
--- /dev/null
+++ b/arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi
@@ -0,0 +1,1537 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+&dmc {
+	rockchip,sdram-params = <
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
+		0xf
+		0xf
+		0xf
+		1
+		0x80241d22
+		0x15050f08
+		0x00000602
+		0x00002122
+		0x0000004c
+		0x00000000
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
+		0xf
+		0xf
+		0xf
+		1
+		0x80241d22
+		0x15050f08
+		0x00000602
+		0x00002122
+		0x0000004c
+		0x00000000
+		50
+		7
+		2
+		13
+		1
+		0x00000b00
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00013880
+		0x000c3500
+		0x00000005
+		0x00000320
+		0x00027100
+		0x00186a00
+		0x00000005
+		0x00000640
+		0x00002710
+		0x000186a0
+		0x00000005
+		0x01000064
+		0x00000000
+		0x02020101
+		0x00000102
+		0x00000050
+		0x000000c8
+		0x00000000
+		0x06140000
+		0x00081c00
+		0x0400040c
+		0x19042008
+		0x10080a11
+		0x22310800
+		0x00200f0a
+		0x0a030704
+		0x08000204
+		0x00000a0a
+		0x04006db0
+		0x0a0a0804
+		0x0600db60
+		0x0a0a0806
+		0x04000db6
+		0x02030404
+		0x0f0a0800
+		0x08040411
+		0x1400640a
+		0x02010a0a
+		0x00010001
+		0x04082012
+		0x00041109
+		0x00000000
+		0x03010000
+		0x06100034
+		0x0c280068
+		0x00bb0007
+		0x00000000
+		0x00060003
+		0x000a0003
+		0x000a0014
+		0x01000000
+		0x030a0000
+		0x0c000002
+		0x00000103
+		0x0003030a
+		0x00060037
+		0x0003006e
+		0x05050007
+		0x03020605
+		0x06050301
+		0x06020c05
+		0x05050302
+		0x03020305
+		0x00000301
+		0x00000301
+		0x00000001
+		0x00000000
+		0x00000000
+		0x01000000
+		0x80104002
+		0x00040003
+		0x00040005
+		0x00030000
+		0x00050004
+		0x00000004
+		0x00040003
+		0x00040005
+		0x18400000
+		0x00000c20
+		0x185030a0
+		0x02ec0000
+		0x00000176
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x06030300
+		0x00030303
+		0x02030200
+		0x00040703
+		0x03020302
+		0x02000407
+		0x07030203
+		0x00030f04
+		0x00070004
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00010000
+		0x20040020
+		0x00200400
+		0x01000400
+		0x00000b80
+		0x00000000
+		0x00000001
+		0x00000002
+		0x0000000e
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00500000
+		0x00640028
+		0x00640404
+		0x005000a0
+		0x060600c8
+		0x000a00c8
+		0x000d0005
+		0x000d0404
+		0x00000000
+		0x00000000
+		0x00000000
+		0x001400a3
+		0x00e30009
+		0x00120024
+		0x00040063
+		0x00000000
+		0x00310031
+		0x00000031
+		0x004d0000
+		0x004d004d
+		0x004d0000
+		0x004d004d
+		0x00010101
+		0x00000000
+		0x00000000
+		0x001400a3
+		0x00e30009
+		0x00120024
+		0x00040063
+		0x00000000
+		0x00310031
+		0x00000031
+		0x004d0000
+		0x004d004d
+		0x004d0000
+		0x004d004d
+		0x00010101
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000001
+		0x00000000
+		0x18151100
+		0x0000000c
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00020003
+		0x00400100
+		0x000c0190
+		0x01000200
+		0x03200040
+		0x00020018
+		0x00400100
+		0x00080032
+		0x00140000
+		0x00030028
+		0x01010100
+		0x02000202
+		0x0b000002
+		0x01000f0f
+		0x00000000
+		0x00000000
+		0x00010003
+		0x00000c03
+		0x00040101
+		0x04010100
+		0x01000000
+		0x02010000
+		0x00000001
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00010000
+		0x00000001
+		0x01010001
+		0x05040001
+		0x040a0703
+		0x02080808
+		0x020e000a
+		0x020f010b
+		0x000d0008
+		0x00080b0a
+		0x03000200
+		0x00000100
+		0x00000000
+		0x00000000
+		0x0d000001
+		0x00000028
+		0x00010000
+		0x00000003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00010100
+		0x01000000
+		0x00000001
+		0x00000303
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x000556aa
+		0x000aaaaa
+		0x000aa955
+		0x00055555
+		0x000b3133
+		0x0004cd33
+		0x0004cecc
+		0x000b32cc
+		0x00010300
+		0x03000100
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00ffff00
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+		0x0000002a
+		0x00000033
+		0x0000000c
+		0x0000000c
+		0x00000033
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00030055
+		0x03000300
+		0x03000300
+		0x000c0300
+		0x42080010
+		0x00000003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000002
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00400320
+		0x00000040
+		0x00000000
+		0x00000000
+		0x00000000
+		0x01000000
+		0x00020003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x0000002a
+		0x00000015
+		0x00000015
+		0x0000002a
+		0x00000033
+		0x0000000c
+		0x0000000c
+		0x00000033
+		0x1ee6b16a
+		0x10000000
+		0x00000000
+		0x00030055
+		0x03000300
+		0x03000300
+		0x000c0300
+		0x42080010
+		0x00000003
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000005
+		0x04000f01
+		0x00020040
+		0x00020055
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000050
+		0x00000000
+		0x01010100
+		0x00000600
+		0x00000000
+		0x00006400
+		0x09221902
+		0x00000000
+		0x000d1f01
+		0x0d1f0d1f
+		0x0d1f0d1f
+		0x00030003
+		0x03000300
+		0x00000300
+		0x09221902
+		0x00000000
+		0x00000000
+		0x01020000
+		0x00000001
+		0x00000411
+		0x00000411
+		0x00000040
+		0x00000040
+		0x00000411
+		0x00000411
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00000411
+		0x00004410
+		0x00000411
+		0x00004410
+		0x00000411
+		0x00004410
+		0x00000000
+		0x00000000
+		0x00000000
+		0x64000000
+		0x00000000
+		0x00000000
+		0x00000108
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0x00000000
+		0xe4000000
+		0x00000000
+		0x00000000
+		0x01010000
+		0x00000000
+	>;
+};

commit 8b36ec9feba34649d331b10b796844c7aa363827
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:20:23 2018 +0800

    driver: ram: rockchip: rk3399: add lpddr4 support
    
    Select rk3399-sdram-lpddr4-100.dtsi to initialize LPDDR4
    at 50MHz, it will change clock frequency to 800MHz
    after initialization is complete.
    
    Change-Id: I803ed2c809f17bbea40f379194bce548adc338ea
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h
new file mode 100644
index 0000000000..f1096dccce
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/pmu_rk3399.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#ifndef __SOC_ROCKCHIP_RK3399_PMU_H__
+#define __SOC_ROCKCHIP_RK3399_PMU_H__
+
+struct rk3399_pmu_regs {
+	u32 pmu_wakeup_cfg[5];
+	u32 pmu_pwrdn_con;
+	u32 pmu_pwrdn_st;
+	u32 pmu_pll_con;
+	u32 pmu_pwrmode_con;
+	u32 pmu_sft_con;
+	u32 pmu_int_con;
+	u32 pmu_int_st;
+	u32 pmu_gpio0_pos_int_con;
+	u32 pmu_gpio0_net_int_con;
+	u32 pmu_gpio1_pos_int_con;
+	u32 pmu_gpio1_net_int_con;
+	u32 pmu_gpio0_pos_int_st;
+	u32 pmu_gpio0_net_int_st;
+	u32 pmu_gpio1_pos_int_st;
+	u32 pmu_gpio1_net_int_st;
+	u32 pmu_pwrdn_inten;
+	u32 pmu_pwrdn_status;
+	u32 pmu_wakeup_status;
+	u32 pmu_bus_clr;
+	u32 pmu_bus_idle_req;
+	u32 pmu_bus_idle_st;
+	u32 pmu_bus_idle_ack;
+	u32 pmu_cci500_con;
+	u32 pmu_adb400_con;
+	u32 pmu_adb400_st;
+	u32 pmu_power_st;
+	u32 pmu_core_pwr_st;
+	u32 pmu_osc_cnt;
+	u32 pmu_plllock_cnt;
+	u32 pmu_pllrst_cnt;
+	u32 pmu_stable_cnt;
+	u32 pmu_ddrio_pwron_cnt;
+	u32 pmu_wakeup_rst_clr_cnt;
+	u32 pmu_ddr_sref_st;
+	u32 pmu_scu_l_pwrdn_cnt;
+	u32 pmu_scu_l_pwrup_cnt;
+	u32 pmu_scu_b_pwrdn_cnt;
+	u32 pmu_scu_b_pwrup_cnt;
+	u32 pmu_gpu_pwrdn_cnt;
+	u32 pmu_gpu_pwrup_cnt;
+	u32 pmu_center_pwrdn_cnt;
+	u32 pmu_center_pwrup_cnt;
+	u32 pmu_timeout_cnt;
+	u32 pmu_cpu0apm_con;
+	u32 pmu_cpu1apm_con;
+	u32 pmu_cpu2apm_con;
+	u32 pmu_cpu3apm_con;
+	u32 pmu_cpu0bpm_con;
+	u32 pmu_cpu1bpm_con;
+	u32 pmu_noc_auto_ena;
+	u32 pmu_pwrdn_con1;
+	u32 reserved0[0x4];
+	u32 pmu_sys_reg_reg0;
+	u32 pmu_sys_reg_reg1;
+	u32 pmu_sys_reg_reg2;
+	u32 pmu_sys_reg_reg3;
+};
+
+check_member(rk3399_pmu_regs, pmu_sys_reg_reg3, 0xfc);
+
+#endif	/* __SOC_ROCKCHIP_RK3399_PMU_H__ */
diff --git a/drivers/ram/rockchip/sdram-rk3399-lpddr4-400.inc b/drivers/ram/rockchip/sdram-rk3399-lpddr4-400.inc
new file mode 100644
index 0000000000..c9ba399afb
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rk3399-lpddr4-400.inc
@@ -0,0 +1,1560 @@
+{
+	{
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x8010100d},
+				{0x08020b04},
+				{0x00000602},
+				{0x00002562},
+				{0x0000004c},
+				0x00000000
+			}
+		},
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x8010100d},
+				{0x08020b04},
+				{0x00000602},
+				{0x00002562},
+				{0x0000004c},
+				0x00000000
+			}
+		}
+	},
+	{
+		.ddr_freq = 400*MHZ,
+		.dramtype = LPDDR4,
+		.num_channels = 2,
+		.stride = 13,
+		.odt = 1,
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_CTL_00_DATA */
+			0x00000000,	/* DENALI_CTL_01_DATA */
+			0x00000000,	/* DENALI_CTL_02_DATA */
+			0x00000000,	/* DENALI_CTL_03_DATA */
+			0x00000000,	/* DENALI_CTL_04_DATA */
+			0x00013880,	/* DENALI_CTL_05_DATA */
+			0x000c3500,	/* DENALI_CTL_06_DATA */
+			0x00000005,	/* DENALI_CTL_07_DATA */
+			0x00000320,	/* DENALI_CTL_08_DATA */
+			0x00027100,	/* DENALI_CTL_09_DATA */
+			0x00186a00,	/* DENALI_CTL_10_DATA */
+			0x00000005,	/* DENALI_CTL_11_DATA */
+			0x00000640,	/* DENALI_CTL_12_DATA */
+			0x00002710,	/* DENALI_CTL_13_DATA */
+			0x000186a0,	/* DENALI_CTL_14_DATA */
+			0x00000005,	/* DENALI_CTL_15_DATA */
+			0x01000064,	/* DENALI_CTL_16_DATA */
+			0x00000000,	/* DENALI_CTL_17_DATA */
+			0x02020101,	/* DENALI_CTL_18_DATA */
+			0x00000102,	/* DENALI_CTL_19_DATA */
+			0x00000050,	/* DENALI_CTL_20_DATA */
+			0x000000c8,	/* DENALI_CTL_21_DATA */
+			0x00000000,	/* DENALI_CTL_22_DATA */
+			0x06140000,	/* DENALI_CTL_23_DATA */
+			0x00081c00,	/* DENALI_CTL_24_DATA */
+			0x0400040c,	/* DENALI_CTL_25_DATA */
+			0x19042008,	/* DENALI_CTL_26_DATA */
+			0x10080a11,	/* DENALI_CTL_27_DATA */
+			0x22310800,	/* DENALI_CTL_28_DATA */
+			0x00200f0a,	/* DENALI_CTL_29_DATA */
+			0x0a030704,	/* DENALI_CTL_30_DATA */
+			0x08000204,	/* DENALI_CTL_31_DATA */
+			0x00000a0a,	/* DENALI_CTL_32_DATA */
+			0x04006db0,	/* DENALI_CTL_33_DATA */
+			0x0a0a0804,	/* DENALI_CTL_34_DATA */
+			0x0600db60,	/* DENALI_CTL_35_DATA */
+			0x0a0a0806,	/* DENALI_CTL_36_DATA */
+			0x04000db6,	/* DENALI_CTL_37_DATA */
+			0x02030404,	/* DENALI_CTL_38_DATA */
+			0x0f0a0800,	/* DENALI_CTL_39_DATA */
+			0x08040411,	/* DENALI_CTL_40_DATA */
+			0x1400640a,	/* DENALI_CTL_41_DATA */
+			0x02010a0a,	/* DENALI_CTL_42_DATA */
+			0x00010001,	/* DENALI_CTL_43_DATA */
+			0x04082012,	/* DENALI_CTL_44_DATA */
+			0x00041109,	/* DENALI_CTL_45_DATA */
+			0x00000000,	/* DENALI_CTL_46_DATA */
+			0x03010000,	/* DENALI_CTL_47_DATA */
+			0x06100034,	/* DENALI_CTL_48_DATA */
+			0x0c280068,	/* DENALI_CTL_49_DATA */
+			0x00bb0007,	/* DENALI_CTL_50_DATA */
+			0x00000000,	/* DENALI_CTL_51_DATA */
+			0x00060003,	/* DENALI_CTL_52_DATA */
+			0x000a0003,	/* DENALI_CTL_53_DATA */
+			0x000a0014,	/* DENALI_CTL_54_DATA */
+			0x01000000,	/* DENALI_CTL_55_DATA */
+			0x030a0000,	/* DENALI_CTL_56_DATA */
+			0x0c000002,	/* DENALI_CTL_57_DATA */
+			0x00000103,	/* DENALI_CTL_58_DATA */
+			0x0003030a,	/* DENALI_CTL_59_DATA */
+			0x00060037,	/* DENALI_CTL_60_DATA */
+			0x0003006e,	/* DENALI_CTL_61_DATA */
+			0x05050007,	/* DENALI_CTL_62_DATA */
+			0x03020605,	/* DENALI_CTL_63_DATA */
+			0x06050301,	/* DENALI_CTL_64_DATA */
+			0x06020c05,	/* DENALI_CTL_65_DATA */
+			0x05050302,	/* DENALI_CTL_66_DATA */
+			0x03020305,	/* DENALI_CTL_67_DATA */
+			0x00000301,	/* DENALI_CTL_68_DATA */
+			0x00000301,	/* DENALI_CTL_69_DATA */
+			0x00000001,	/* DENALI_CTL_70_DATA */
+			0x00000000,	/* DENALI_CTL_71_DATA */
+			0x00000000,	/* DENALI_CTL_72_DATA */
+			0x01000000,	/* DENALI_CTL_73_DATA */
+			0x80104002,	/* DENALI_CTL_74_DATA */
+			0x00040003,	/* DENALI_CTL_75_DATA */
+			0x00040005,	/* DENALI_CTL_76_DATA */
+			0x00030000,	/* DENALI_CTL_77_DATA */
+			0x00050004,	/* DENALI_CTL_78_DATA */
+			0x00000004,	/* DENALI_CTL_79_DATA */
+			0x00040003,	/* DENALI_CTL_80_DATA */
+			0x00040005,	/* DENALI_CTL_81_DATA */
+			0x18400000,	/* DENALI_CTL_82_DATA */
+			0x00000c20,	/* DENALI_CTL_83_DATA */
+			0x185030a0,	/* DENALI_CTL_84_DATA */
+			0x02ec0000,	/* DENALI_CTL_85_DATA */
+			0x00000176,	/* DENALI_CTL_86_DATA */
+			0x00000000,	/* DENALI_CTL_87_DATA */
+			0x00000000,	/* DENALI_CTL_88_DATA */
+			0x00000000,	/* DENALI_CTL_89_DATA */
+			0x00000000,	/* DENALI_CTL_90_DATA */
+			0x00000000,	/* DENALI_CTL_91_DATA */
+			0x06030300,	/* DENALI_CTL_92_DATA */
+			0x00030303,	/* DENALI_CTL_93_DATA */
+			0x02030200,	/* DENALI_CTL_94_DATA */
+			0x00040703,	/* DENALI_CTL_95_DATA */
+			0x03020302,	/* DENALI_CTL_96_DATA */
+			0x02000407,	/* DENALI_CTL_97_DATA */
+			0x07030203,	/* DENALI_CTL_98_DATA */
+			0x00030f04,	/* DENALI_CTL_99_DATA */
+			0x00070004,	/* DENALI_CTL_100_DATA */
+			0x00000000,	/* DENALI_CTL_101_DATA */
+			0x00000000,	/* DENALI_CTL_102_DATA */
+			0x00000000,	/* DENALI_CTL_103_DATA */
+			0x00000000,	/* DENALI_CTL_104_DATA */
+			0x00000000,	/* DENALI_CTL_105_DATA */
+			0x00000000,	/* DENALI_CTL_106_DATA */
+			0x00000000,	/* DENALI_CTL_107_DATA */
+			0x00010000,	/* DENALI_CTL_108_DATA */
+			0x20040020,	/* DENALI_CTL_109_DATA */
+			0x00200400,	/* DENALI_CTL_110_DATA */
+			0x01000400,	/* DENALI_CTL_111_DATA */
+			0x00000b80,	/* DENALI_CTL_112_DATA */
+			0x00000000,	/* DENALI_CTL_113_DATA */
+			0x00000001,	/* DENALI_CTL_114_DATA */
+			0x00000002,	/* DENALI_CTL_115_DATA */
+			0x0000000e,	/* DENALI_CTL_116_DATA */
+			0x00000000,	/* DENALI_CTL_117_DATA */
+			0x00000000,	/* DENALI_CTL_118_DATA */
+			0x00000000,	/* DENALI_CTL_119_DATA */
+			0x00000000,	/* DENALI_CTL_120_DATA */
+			0x00000000,	/* DENALI_CTL_121_DATA */
+			0x00500000,	/* DENALI_CTL_122_DATA */
+			0x00640028,	/* DENALI_CTL_123_DATA */
+			0x00640404,	/* DENALI_CTL_124_DATA */
+			0x005000a0,	/* DENALI_CTL_125_DATA */
+			0x060600c8,	/* DENALI_CTL_126_DATA */
+			0x000a00c8,	/* DENALI_CTL_127_DATA */
+			0x000d0005,	/* DENALI_CTL_128_DATA */
+			0x000d0404,	/* DENALI_CTL_129_DATA */
+			0x00000000,	/* DENALI_CTL_130_DATA */
+			0x00000000,	/* DENALI_CTL_131_DATA */
+			0x00000000,	/* DENALI_CTL_132_DATA */
+			0x001400a3,	/* DENALI_CTL_133_DATA */
+			0x00e30009,	/* DENALI_CTL_134_DATA */
+			0x00120024,	/* DENALI_CTL_135_DATA */
+			0x00040063,	/* DENALI_CTL_136_DATA */
+			0x00000000,	/* DENALI_CTL_137_DATA */
+			0x00310031,	/* DENALI_CTL_138_DATA */
+			0x00000031,	/* DENALI_CTL_139_DATA */
+			0x004d0000,	/* DENALI_CTL_140_DATA */
+			0x004d004d,	/* DENALI_CTL_141_DATA */
+			0x004d0000,	/* DENALI_CTL_142_DATA */
+			0x004d004d,	/* DENALI_CTL_143_DATA */
+			0x00010101,	/* DENALI_CTL_144_DATA */
+			0x00000000,	/* DENALI_CTL_145_DATA */
+			0x00000000,	/* DENALI_CTL_146_DATA */
+			0x001400a3,	/* DENALI_CTL_147_DATA */
+			0x00e30009,	/* DENALI_CTL_148_DATA */
+			0x00120024,	/* DENALI_CTL_149_DATA */
+			0x00040063,	/* DENALI_CTL_150_DATA */
+			0x00000000,	/* DENALI_CTL_151_DATA */
+			0x00310031,	/* DENALI_CTL_152_DATA */
+			0x00000031,	/* DENALI_CTL_153_DATA */
+			0x004d0000,	/* DENALI_CTL_154_DATA */
+			0x004d004d,	/* DENALI_CTL_155_DATA */
+			0x004d0000,	/* DENALI_CTL_156_DATA */
+			0x004d004d,	/* DENALI_CTL_157_DATA */
+			0x00010101,	/* DENALI_CTL_158_DATA */
+			0x00000000,	/* DENALI_CTL_159_DATA */
+			0x00000000,	/* DENALI_CTL_160_DATA */
+			0x00000000,	/* DENALI_CTL_161_DATA */
+			0x00000001,	/* DENALI_CTL_162_DATA */
+			0x00000000,	/* DENALI_CTL_163_DATA */
+			0x18151100,	/* DENALI_CTL_164_DATA */
+			0x0000000c,	/* DENALI_CTL_165_DATA */
+			0x00000000,	/* DENALI_CTL_166_DATA */
+			0x00000000,	/* DENALI_CTL_167_DATA */
+			0x00000000,	/* DENALI_CTL_168_DATA */
+			0x00000000,	/* DENALI_CTL_169_DATA */
+			0x00000000,	/* DENALI_CTL_170_DATA */
+			0x00000000,	/* DENALI_CTL_171_DATA */
+			0x00000000,	/* DENALI_CTL_172_DATA */
+			0x00000000,	/* DENALI_CTL_173_DATA */
+			0x00000000,	/* DENALI_CTL_174_DATA */
+			0x00000000,	/* DENALI_CTL_175_DATA */
+			0x00000000,	/* DENALI_CTL_176_DATA */
+			0x00000000,	/* DENALI_CTL_177_DATA */
+			0x00000000,	/* DENALI_CTL_178_DATA */
+			0x00020003,	/* DENALI_CTL_179_DATA */
+			0x00400100,	/* DENALI_CTL_180_DATA */
+			0x000c0190,	/* DENALI_CTL_181_DATA */
+			0x01000200,	/* DENALI_CTL_182_DATA */
+			0x03200040,	/* DENALI_CTL_183_DATA */
+			0x00020018,	/* DENALI_CTL_184_DATA */
+			0x00400100,	/* DENALI_CTL_185_DATA */
+			0x00080032,	/* DENALI_CTL_186_DATA */
+			0x00140000,	/* DENALI_CTL_187_DATA */
+			0x00030028,	/* DENALI_CTL_188_DATA */
+			0x01010100,	/* DENALI_CTL_189_DATA */
+			0x02000202,	/* DENALI_CTL_190_DATA */
+			0x0b000002,	/* DENALI_CTL_191_DATA */
+			0x01000f0f,	/* DENALI_CTL_192_DATA */
+			0x00000000,	/* DENALI_CTL_193_DATA */
+			0x00000000,	/* DENALI_CTL_194_DATA */
+			0x00010003,	/* DENALI_CTL_195_DATA */
+			0x00000c03,	/* DENALI_CTL_196_DATA */
+			0x00040101,	/* DENALI_CTL_197_DATA */
+			0x04010100,	/* DENALI_CTL_198_DATA */
+			0x01000000,	/* DENALI_CTL_199_DATA */
+			0x02010000,	/* DENALI_CTL_200_DATA */
+			0x00000001,	/* DENALI_CTL_201_DATA */
+			0x00000000,	/* DENALI_CTL_202_DATA */
+			0x00000000,	/* DENALI_CTL_203_DATA */
+			0x00000000,	/* DENALI_CTL_204_DATA */
+			0x00000000,	/* DENALI_CTL_205_DATA */
+			0x00000000,	/* DENALI_CTL_206_DATA */
+			0x00000000,	/* DENALI_CTL_207_DATA */
+			0x00000000,	/* DENALI_CTL_208_DATA */
+			0x00000000,	/* DENALI_CTL_209_DATA */
+			0x00000000,	/* DENALI_CTL_210_DATA */
+			0x00010000,	/* DENALI_CTL_211_DATA */
+			0x00000001,	/* DENALI_CTL_212_DATA */
+			0x01010001,	/* DENALI_CTL_213_DATA */
+			0x05040001,	/* DENALI_CTL_214_DATA */
+			0x040a0703,	/* DENALI_CTL_215_DATA */
+			0x02080808,	/* DENALI_CTL_216_DATA */
+			0x020e000a,	/* DENALI_CTL_217_DATA */
+			0x020f010b,	/* DENALI_CTL_218_DATA */
+			0x000d0008,	/* DENALI_CTL_219_DATA */
+			0x00080b0a,	/* DENALI_CTL_220_DATA */
+			0x03000200,	/* DENALI_CTL_221_DATA */
+			0x00000100,	/* DENALI_CTL_222_DATA */
+			0x00000000,	/* DENALI_CTL_223_DATA */
+			0x00000000,	/* DENALI_CTL_224_DATA */
+			0x0d000001,	/* DENALI_CTL_225_DATA */
+			0x00000028,	/* DENALI_CTL_226_DATA */
+			0x00010000,	/* DENALI_CTL_227_DATA */
+			0x00000003,	/* DENALI_CTL_228_DATA */
+			0x00000000,	/* DENALI_CTL_229_DATA */
+			0x00000000,	/* DENALI_CTL_230_DATA */
+			0x00000000,	/* DENALI_CTL_231_DATA */
+			0x00000000,	/* DENALI_CTL_232_DATA */
+			0x00000000,	/* DENALI_CTL_233_DATA */
+			0x00000000,	/* DENALI_CTL_234_DATA */
+			0x00000000,	/* DENALI_CTL_235_DATA */
+			0x00000000,	/* DENALI_CTL_236_DATA */
+			0x00010100,	/* DENALI_CTL_237_DATA */
+			0x01000000,	/* DENALI_CTL_238_DATA */
+			0x00000001,	/* DENALI_CTL_239_DATA */
+			0x00000303,	/* DENALI_CTL_240_DATA */
+			0x00000000,	/* DENALI_CTL_241_DATA */
+			0x00000000,	/* DENALI_CTL_242_DATA */
+			0x00000000,	/* DENALI_CTL_243_DATA */
+			0x00000000,	/* DENALI_CTL_244_DATA */
+			0x00000000,	/* DENALI_CTL_245_DATA */
+			0x00000000,	/* DENALI_CTL_246_DATA */
+			0x00000000,	/* DENALI_CTL_247_DATA */
+			0x00000000,	/* DENALI_CTL_248_DATA */
+			0x00000000,	/* DENALI_CTL_249_DATA */
+			0x00000000,	/* DENALI_CTL_250_DATA */
+			0x00000000,	/* DENALI_CTL_251_DATA */
+			0x00000000,	/* DENALI_CTL_252_DATA */
+			0x00000000,	/* DENALI_CTL_253_DATA */
+			0x00000000,	/* DENALI_CTL_254_DATA */
+			0x00000000,	/* DENALI_CTL_255_DATA */
+			0x000556aa,	/* DENALI_CTL_256_DATA */
+			0x000aaaaa,	/* DENALI_CTL_257_DATA */
+			0x000aa955,	/* DENALI_CTL_258_DATA */
+			0x00055555,	/* DENALI_CTL_259_DATA */
+			0x000b3133,	/* DENALI_CTL_260_DATA */
+			0x0004cd33,	/* DENALI_CTL_261_DATA */
+			0x0004cecc,	/* DENALI_CTL_262_DATA */
+			0x000b32cc,	/* DENALI_CTL_263_DATA */
+			0x00010300,	/* DENALI_CTL_264_DATA */
+			0x03000100,	/* DENALI_CTL_265_DATA */
+			0x00000000,	/* DENALI_CTL_266_DATA */
+			0x00000000,	/* DENALI_CTL_267_DATA */
+			0x00000000,	/* DENALI_CTL_268_DATA */
+			0x00000000,	/* DENALI_CTL_269_DATA */
+			0x00000000,	/* DENALI_CTL_270_DATA */
+			0x00000000,	/* DENALI_CTL_271_DATA */
+			0x00000000,	/* DENALI_CTL_272_DATA */
+			0x00000000,	/* DENALI_CTL_273_DATA */
+			0x00ffff00,	/* DENALI_CTL_274_DATA */
+			0x1a160000,	/* DENALI_CTL_275_DATA */
+			0x08000012,	/* DENALI_CTL_276_DATA */
+			0x00000c20,	/* DENALI_CTL_277_DATA */
+			0x00000200,	/* DENALI_CTL_278_DATA */
+			0x00000200,	/* DENALI_CTL_279_DATA */
+			0x00000200,	/* DENALI_CTL_280_DATA */
+			0x00000200,	/* DENALI_CTL_281_DATA */
+			0x00000c20,	/* DENALI_CTL_282_DATA */
+			0x00007940,	/* DENALI_CTL_283_DATA */
+			0x18500409,	/* DENALI_CTL_284_DATA */
+			0x00000200,	/* DENALI_CTL_285_DATA */
+			0x00000200,	/* DENALI_CTL_286_DATA */
+			0x00000200,	/* DENALI_CTL_287_DATA */
+			0x00000200,	/* DENALI_CTL_288_DATA */
+			0x00001850,	/* DENALI_CTL_289_DATA */
+			0x0000f320,	/* DENALI_CTL_290_DATA */
+			0x0176060c,	/* DENALI_CTL_291_DATA */
+			0x00000200,	/* DENALI_CTL_292_DATA */
+			0x00000200,	/* DENALI_CTL_293_DATA */
+			0x00000200,	/* DENALI_CTL_294_DATA */
+			0x00000200,	/* DENALI_CTL_295_DATA */
+			0x00000176,	/* DENALI_CTL_296_DATA */
+			0x00000e9c,	/* DENALI_CTL_297_DATA */
+			0x02020205,	/* DENALI_CTL_298_DATA */
+			0x03030202,	/* DENALI_CTL_299_DATA */
+			0x00000018,	/* DENALI_CTL_300_DATA */
+			0x00000000,	/* DENALI_CTL_301_DATA */
+			0x00000000,	/* DENALI_CTL_302_DATA */
+			0x00001403,	/* DENALI_CTL_303_DATA */
+			0x00000000,	/* DENALI_CTL_304_DATA */
+			0x00000000,	/* DENALI_CTL_305_DATA */
+			0x00000000,	/* DENALI_CTL_306_DATA */
+			0x00030000,	/* DENALI_CTL_307_DATA */
+			0x000a001c,	/* DENALI_CTL_308_DATA */
+			0x000e0020,	/* DENALI_CTL_309_DATA */
+			0x00060018,	/* DENALI_CTL_310_DATA */
+			0x00000000,	/* DENALI_CTL_311_DATA */
+			0x00000000,	/* DENALI_CTL_312_DATA */
+			0x02000000,	/* DENALI_CTL_313_DATA */
+			0x00090305,	/* DENALI_CTL_314_DATA */
+			0x00050101,	/* DENALI_CTL_315_DATA */
+			0x00000000,	/* DENALI_CTL_316_DATA */
+			0x00000000,	/* DENALI_CTL_317_DATA */
+			0x00000000,	/* DENALI_CTL_318_DATA */
+			0x00000000,	/* DENALI_CTL_319_DATA */
+			0x00000000,	/* DENALI_CTL_320_DATA */
+			0x00000000,	/* DENALI_CTL_321_DATA */
+			0x00000000,	/* DENALI_CTL_322_DATA */
+			0x00000000,	/* DENALI_CTL_323_DATA */
+			0x01000001,	/* DENALI_CTL_324_DATA */
+			0x01010101,	/* DENALI_CTL_325_DATA */
+			0x01000101,	/* DENALI_CTL_326_DATA */
+			0x01000100,	/* DENALI_CTL_327_DATA */
+			0x00010001,	/* DENALI_CTL_328_DATA */
+			0x00010002,	/* DENALI_CTL_329_DATA */
+			0x00020100,	/* DENALI_CTL_330_DATA */
+			0x00000002	/* DENALI_CTL_331_DATA */
+		}
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_PI_00_DATA */
+			0x00000000,	/* DENALI_PI_01_DATA */
+			0x000002ec,	/* DENALI_PI_02_DATA */
+			0x00000176,	/* DENALI_PI_03_DATA */
+			0x000030a0,	/* DENALI_PI_04_DATA */
+			0x00001850,	/* DENALI_PI_05_DATA */
+			0x00001840,	/* DENALI_PI_06_DATA */
+			0x01760c20,	/* DENALI_PI_07_DATA */
+			0x00000200,	/* DENALI_PI_08_DATA */
+			0x00000200,	/* DENALI_PI_09_DATA */
+			0x00000200,	/* DENALI_PI_10_DATA */
+			0x00000200,	/* DENALI_PI_11_DATA */
+			0x00001850,	/* DENALI_PI_12_DATA */
+			0x00000200,	/* DENALI_PI_13_DATA */
+			0x00000200,	/* DENALI_PI_14_DATA */
+			0x00000200,	/* DENALI_PI_15_DATA */
+			0x00000200,	/* DENALI_PI_16_DATA */
+			0x00000c20,	/* DENALI_PI_17_DATA */
+			0x00000200,	/* DENALI_PI_18_DATA */
+			0x00000200,	/* DENALI_PI_19_DATA */
+			0x00000200,	/* DENALI_PI_20_DATA */
+			0x00000200,	/* DENALI_PI_21_DATA */
+			0x00010000,	/* DENALI_PI_22_DATA */
+			0x00000007,	/* DENALI_PI_23_DATA */
+			0x01000001,	/* DENALI_PI_24_DATA */
+			0x00000000,	/* DENALI_PI_25_DATA */
+			0x3fffffff,	/* DENALI_PI_26_DATA */
+			0x00000000,	/* DENALI_PI_27_DATA */
+			0x00000000,	/* DENALI_PI_28_DATA */
+			0x00000000,	/* DENALI_PI_29_DATA */
+			0x00000000,	/* DENALI_PI_30_DATA */
+			0x00000000,	/* DENALI_PI_31_DATA */
+			0x00000000,	/* DENALI_PI_32_DATA */
+			0x00000000,	/* DENALI_PI_33_DATA */
+			0x00000000,	/* DENALI_PI_34_DATA */
+			0x00000000,	/* DENALI_PI_35_DATA */
+			0x00000000,	/* DENALI_PI_36_DATA */
+			0x00000000,	/* DENALI_PI_37_DATA */
+			0x00000000,	/* DENALI_PI_38_DATA */
+			0x00000000,	/* DENALI_PI_39_DATA */
+			0x00000000,	/* DENALI_PI_40_DATA */
+			0x0f000101,	/* DENALI_PI_41_DATA */
+			0x082b3223,	/* DENALI_PI_42_DATA */
+			0x080c0004,	/* DENALI_PI_43_DATA */
+			0x00061c00,	/* DENALI_PI_44_DATA */
+			0x00000214,	/* DENALI_PI_45_DATA */
+			0x00bb0007,	/* DENALI_PI_46_DATA */
+			0x0c280068,	/* DENALI_PI_47_DATA */
+			0x06100034,	/* DENALI_PI_48_DATA */
+			0x00000500,	/* DENALI_PI_49_DATA */
+			0x00000000,	/* DENALI_PI_50_DATA */
+			0x00000000,	/* DENALI_PI_51_DATA */
+			0x00000000,	/* DENALI_PI_52_DATA */
+			0x00000000,	/* DENALI_PI_53_DATA */
+			0x00000000,	/* DENALI_PI_54_DATA */
+			0x00000000,	/* DENALI_PI_55_DATA */
+			0x00000000,	/* DENALI_PI_56_DATA */
+			0x00000000,	/* DENALI_PI_57_DATA */
+			0x04040100,	/* DENALI_PI_58_DATA */
+			0x0a000004,	/* DENALI_PI_59_DATA */
+			0x00000128,	/* DENALI_PI_60_DATA */
+			0x00000000,	/* DENALI_PI_61_DATA */
+			0x0003000f,	/* DENALI_PI_62_DATA */
+			0x00000018,	/* DENALI_PI_63_DATA */
+			0x00000000,	/* DENALI_PI_64_DATA */
+			0x00000000,	/* DENALI_PI_65_DATA */
+			0x00060002,	/* DENALI_PI_66_DATA */
+			0x00010001,	/* DENALI_PI_67_DATA */
+			0x00000101,	/* DENALI_PI_68_DATA */
+			0x00020001,	/* DENALI_PI_69_DATA */
+			0x00080004,	/* DENALI_PI_70_DATA */
+			0x00000000,	/* DENALI_PI_71_DATA */
+			0x05030000,	/* DENALI_PI_72_DATA */
+			0x070a0404,	/* DENALI_PI_73_DATA */
+			0x00000000,	/* DENALI_PI_74_DATA */
+			0x00000000,	/* DENALI_PI_75_DATA */
+			0x00000000,	/* DENALI_PI_76_DATA */
+			0x000f0f00,	/* DENALI_PI_77_DATA */
+			0x0000001e,	/* DENALI_PI_78_DATA */
+			0x00000000,	/* DENALI_PI_79_DATA */
+			0x01010300,	/* DENALI_PI_80_DATA */
+			0x00000000,	/* DENALI_PI_81_DATA */
+			0x00000000,	/* DENALI_PI_82_DATA */
+			0x01000000,	/* DENALI_PI_83_DATA */
+			0x00000101,	/* DENALI_PI_84_DATA */
+			0x55555a5a,	/* DENALI_PI_85_DATA */
+			0x55555a5a,	/* DENALI_PI_86_DATA */
+			0x55555a5a,	/* DENALI_PI_87_DATA */
+			0x55555a5a,	/* DENALI_PI_88_DATA */
+			0x0c050001,	/* DENALI_PI_89_DATA */
+			0x06020009,	/* DENALI_PI_90_DATA */
+			0x00010004,	/* DENALI_PI_91_DATA */
+			0x00000203,	/* DENALI_PI_92_DATA */
+			0x00030000,	/* DENALI_PI_93_DATA */
+			0x170f0000,	/* DENALI_PI_94_DATA */
+			0x00060018,	/* DENALI_PI_95_DATA */
+			0x000e0020,	/* DENALI_PI_96_DATA */
+			0x000a001c,	/* DENALI_PI_97_DATA */
+			0x00000000,	/* DENALI_PI_98_DATA */
+			0x00000000,	/* DENALI_PI_99_DATA */
+			0x00000100,	/* DENALI_PI_100_DATA */
+			0x140a0000,	/* DENALI_PI_101_DATA */
+			0x000d010a,	/* DENALI_PI_102_DATA */
+			0x0100c802,	/* DENALI_PI_103_DATA */
+			0x010a0064,	/* DENALI_PI_104_DATA */
+			0x000e0100,	/* DENALI_PI_105_DATA */
+			0x0100000e,	/* DENALI_PI_106_DATA */
+			0x00c900c9,	/* DENALI_PI_107_DATA */
+			0x00650100,	/* DENALI_PI_108_DATA */
+			0x1e1a0065,	/* DENALI_PI_109_DATA */
+			0x10010204,	/* DENALI_PI_110_DATA */
+			0x06070605,	/* DENALI_PI_111_DATA */
+			0x20000202,	/* DENALI_PI_112_DATA */
+			0x00201000,	/* DENALI_PI_113_DATA */
+			0x00201000,	/* DENALI_PI_114_DATA */
+			0x04041000,	/* DENALI_PI_115_DATA */
+			0x10020100,	/* DENALI_PI_116_DATA */
+			0x0003010c,	/* DENALI_PI_117_DATA */
+			0x004b004a,	/* DENALI_PI_118_DATA */
+			0x1a0f0000,	/* DENALI_PI_119_DATA */
+			0x0102041e,	/* DENALI_PI_120_DATA */
+			0x34000000,	/* DENALI_PI_121_DATA */
+			0x00000000,	/* DENALI_PI_122_DATA */
+			0x00000000,	/* DENALI_PI_123_DATA */
+			0x00010000,	/* DENALI_PI_124_DATA */
+			0x00000400,	/* DENALI_PI_125_DATA */
+			0x00310000,	/* DENALI_PI_126_DATA */
+			0x004d4d00,	/* DENALI_PI_127_DATA */
+			0x00120024,	/* DENALI_PI_128_DATA */
+			0x4d000031,	/* DENALI_PI_129_DATA */
+			0x0000144d,	/* DENALI_PI_130_DATA */
+			0x00310009,	/* DENALI_PI_131_DATA */
+			0x004d4d00,	/* DENALI_PI_132_DATA */
+			0x00000004,	/* DENALI_PI_133_DATA */
+			0x4d000031,	/* DENALI_PI_134_DATA */
+			0x0000244d,	/* DENALI_PI_135_DATA */
+			0x00310012,	/* DENALI_PI_136_DATA */
+			0x004d4d00,	/* DENALI_PI_137_DATA */
+			0x00090014,	/* DENALI_PI_138_DATA */
+			0x4d000031,	/* DENALI_PI_139_DATA */
+			0x0004004d,	/* DENALI_PI_140_DATA */
+			0x00310000,	/* DENALI_PI_141_DATA */
+			0x004d4d00,	/* DENALI_PI_142_DATA */
+			0x00120024,	/* DENALI_PI_143_DATA */
+			0x4d000031,	/* DENALI_PI_144_DATA */
+			0x0000144d,	/* DENALI_PI_145_DATA */
+			0x00310009,	/* DENALI_PI_146_DATA */
+			0x004d4d00,	/* DENALI_PI_147_DATA */
+			0x00000004,	/* DENALI_PI_148_DATA */
+			0x4d000031,	/* DENALI_PI_149_DATA */
+			0x0000244d,	/* DENALI_PI_150_DATA */
+			0x00310012,	/* DENALI_PI_151_DATA */
+			0x004d4d00,	/* DENALI_PI_152_DATA */
+			0x00090014,	/* DENALI_PI_153_DATA */
+			0x4d000031,	/* DENALI_PI_154_DATA */
+			0x0200004d,	/* DENALI_PI_155_DATA */
+			0x00c8000d,	/* DENALI_PI_156_DATA */
+			0x08080064,	/* DENALI_PI_157_DATA */
+			0x040a0404,	/* DENALI_PI_158_DATA */
+			0x03000d92,	/* DENALI_PI_159_DATA */
+			0x010a2001,	/* DENALI_PI_160_DATA */
+			0x0f11080a,	/* DENALI_PI_161_DATA */
+			0x0000110a,	/* DENALI_PI_162_DATA */
+			0x2200d92e,	/* DENALI_PI_163_DATA */
+			0x080c2003,	/* DENALI_PI_164_DATA */
+			0x0809080a,	/* DENALI_PI_165_DATA */
+			0x00000a0a,	/* DENALI_PI_166_DATA */
+			0x11006c97,	/* DENALI_PI_167_DATA */
+			0x040a2002,	/* DENALI_PI_168_DATA */
+			0x0200020a,	/* DENALI_PI_169_DATA */
+			0x02000200,	/* DENALI_PI_170_DATA */
+			0x02000200,	/* DENALI_PI_171_DATA */
+			0x02000200,	/* DENALI_PI_172_DATA */
+			0x02000200,	/* DENALI_PI_173_DATA */
+			0x00000000,	/* DENALI_PI_174_DATA */
+			0x00000000,	/* DENALI_PI_175_DATA */
+			0x00000000,	/* DENALI_PI_176_DATA */
+			0x00000000,	/* DENALI_PI_177_DATA */
+			0x00000000,	/* DENALI_PI_178_DATA */
+			0x00000000,	/* DENALI_PI_179_DATA */
+			0x00000000,	/* DENALI_PI_180_DATA */
+			0x00000000,	/* DENALI_PI_181_DATA */
+			0x00000000,	/* DENALI_PI_182_DATA */
+			0x00000000,	/* DENALI_PI_183_DATA */
+			0x00000000,	/* DENALI_PI_184_DATA */
+			0x00000000,	/* DENALI_PI_185_DATA */
+			0x01000400,	/* DENALI_PI_186_DATA */
+			0x00017600,	/* DENALI_PI_187_DATA */
+			0x00000e9c,	/* DENALI_PI_188_DATA */
+			0x00001850,	/* DENALI_PI_189_DATA */
+			0x0000f320,	/* DENALI_PI_190_DATA */
+			0x00000c20,	/* DENALI_PI_191_DATA */
+			0x00007940,	/* DENALI_PI_192_DATA */
+			0x08000000,	/* DENALI_PI_193_DATA */
+			0x00000100,	/* DENALI_PI_194_DATA */
+			0x00000000,	/* DENALI_PI_195_DATA */
+			0x00000000,	/* DENALI_PI_196_DATA */
+			0x00000000,	/* DENALI_PI_197_DATA */
+			0x00000000,	/* DENALI_PI_198_DATA */
+			0x00000002	/* DENALI_PI_199_DATA */
+		}
+	},
+	{
+		{
+			0x76543210,	/* DENALI_PHY_00_DATA */
+			0x0004f008,	/* DENALI_PHY_01_DATA */
+			0x00020119,	/* DENALI_PHY_02_DATA */
+			0x00000000,	/* DENALI_PHY_03_DATA */
+			0x00000000,	/* DENALI_PHY_04_DATA */
+			0x00010000,	/* DENALI_PHY_05_DATA */
+			0x01665555,	/* DENALI_PHY_06_DATA */
+			0x03665555,	/* DENALI_PHY_07_DATA */
+			0x00010f00,	/* DENALI_PHY_08_DATA */
+			0x04000100,	/* DENALI_PHY_09_DATA */
+			0x00000001,	/* DENALI_PHY_10_DATA */
+			0x00170180,	/* DENALI_PHY_11_DATA */
+			0x00cc0201,	/* DENALI_PHY_12_DATA */
+			0x00030066,	/* DENALI_PHY_13_DATA */
+			0x00000000,	/* DENALI_PHY_14_DATA */
+			0x00000000,	/* DENALI_PHY_15_DATA */
+			0x00000000,	/* DENALI_PHY_16_DATA */
+			0x00000000,	/* DENALI_PHY_17_DATA */
+			0x00000000,	/* DENALI_PHY_18_DATA */
+			0x00000000,	/* DENALI_PHY_19_DATA */
+			0x00000000,	/* DENALI_PHY_20_DATA */
+			0x00000000,	/* DENALI_PHY_21_DATA */
+			0x04080000,	/* DENALI_PHY_22_DATA */
+			0x04080400,	/* DENALI_PHY_23_DATA */
+			0x30000000,	/* DENALI_PHY_24_DATA */
+			0x0c00c007,	/* DENALI_PHY_25_DATA */
+			0x00000100,	/* DENALI_PHY_26_DATA */
+			0x00000000,	/* DENALI_PHY_27_DATA */
+			0xfd02fe01,	/* DENALI_PHY_28_DATA */
+			0xf708fb04,	/* DENALI_PHY_29_DATA */
+			0xdf20ef10,	/* DENALI_PHY_30_DATA */
+			0x7f80bf40,	/* DENALI_PHY_31_DATA */
+			0x0001aaaa,	/* DENALI_PHY_32_DATA */
+			0x00000000,	/* DENALI_PHY_33_DATA */
+			0x00000000,	/* DENALI_PHY_34_DATA */
+			0x00000000,	/* DENALI_PHY_35_DATA */
+			0x00000000,	/* DENALI_PHY_36_DATA */
+			0x00000000,	/* DENALI_PHY_37_DATA */
+			0x00000000,	/* DENALI_PHY_38_DATA */
+			0x00000000,	/* DENALI_PHY_39_DATA */
+			0x00000000,	/* DENALI_PHY_40_DATA */
+			0x00000000,	/* DENALI_PHY_41_DATA */
+			0x00000000,	/* DENALI_PHY_42_DATA */
+			0x00000000,	/* DENALI_PHY_43_DATA */
+			0x00000000,	/* DENALI_PHY_44_DATA */
+			0x00000000,	/* DENALI_PHY_45_DATA */
+			0x00000000,	/* DENALI_PHY_46_DATA */
+			0x00000000,	/* DENALI_PHY_47_DATA */
+			0x00000000,	/* DENALI_PHY_48_DATA */
+			0x00000000,	/* DENALI_PHY_49_DATA */
+			0x00000000,	/* DENALI_PHY_50_DATA */
+			0x00000000,	/* DENALI_PHY_51_DATA */
+			0x00200000,	/* DENALI_PHY_52_DATA */
+			0x00000000,	/* DENALI_PHY_53_DATA */
+			0x00000000,	/* DENALI_PHY_54_DATA */
+			0x00000000,	/* DENALI_PHY_55_DATA */
+			0x00000000,	/* DENALI_PHY_56_DATA */
+			0x00000000,	/* DENALI_PHY_57_DATA */
+			0x00000000,	/* DENALI_PHY_58_DATA */
+			0x02800280,	/* DENALI_PHY_59_DATA */
+			0x02800280,	/* DENALI_PHY_60_DATA */
+			0x02800280,	/* DENALI_PHY_61_DATA */
+			0x02800280,	/* DENALI_PHY_62_DATA */
+			0x00000280,	/* DENALI_PHY_63_DATA */
+			0x00000000,	/* DENALI_PHY_64_DATA */
+			0x00000000,	/* DENALI_PHY_65_DATA */
+			0x00000000,	/* DENALI_PHY_66_DATA */
+			0x00000000,	/* DENALI_PHY_67_DATA */
+			0x00800000,	/* DENALI_PHY_68_DATA */
+			0x00800080,	/* DENALI_PHY_69_DATA */
+			0x00800080,	/* DENALI_PHY_70_DATA */
+			0x00800080,	/* DENALI_PHY_71_DATA */
+			0x00800080,	/* DENALI_PHY_72_DATA */
+			0x00800080,	/* DENALI_PHY_73_DATA */
+			0x00800080,	/* DENALI_PHY_74_DATA */
+			0x00800080,	/* DENALI_PHY_75_DATA */
+			0x00800080,	/* DENALI_PHY_76_DATA */
+			0x01190080,	/* DENALI_PHY_77_DATA */
+			0x00000001,	/* DENALI_PHY_78_DATA */
+			0x00000000,	/* DENALI_PHY_79_DATA */
+			0x00000000,	/* DENALI_PHY_80_DATA */
+			0x00000200,	/* DENALI_PHY_81_DATA */
+			0x00000000,	/* DENALI_PHY_82_DATA */
+			0x51315152,	/* DENALI_PHY_83_DATA */
+			0xc0003150,	/* DENALI_PHY_84_DATA */
+			0x010000c0,	/* DENALI_PHY_85_DATA */
+			0x00100000,	/* DENALI_PHY_86_DATA */
+			0x07044204,	/* DENALI_PHY_87_DATA */
+			0x000f0c18,	/* DENALI_PHY_88_DATA */
+			0x01000140,	/* DENALI_PHY_89_DATA */
+			0x00000c10,	/* DENALI_PHY_90_DATA */
+			0x00000000,	/* DENALI_PHY_91_DATA */
+			0x00000000,	/* DENALI_PHY_92_DATA */
+			0x00000000,	/* DENALI_PHY_93_DATA */
+			0x00000000,	/* DENALI_PHY_94_DATA */
+			0x00000000,	/* DENALI_PHY_95_DATA */
+			0x00000000,	/* DENALI_PHY_96_DATA */
+			0x00000000,	/* DENALI_PHY_97_DATA */
+			0x00000000,	/* DENALI_PHY_98_DATA */
+			0x00000000,	/* DENALI_PHY_99_DATA */
+			0x00000000,	/* DENALI_PHY_100_DATA */
+			0x00000000,	/* DENALI_PHY_101_DATA */
+			0x00000000,	/* DENALI_PHY_102_DATA */
+			0x00000000,	/* DENALI_PHY_103_DATA */
+			0x00000000,	/* DENALI_PHY_104_DATA */
+			0x00000000,	/* DENALI_PHY_105_DATA */
+			0x00000000,	/* DENALI_PHY_106_DATA */
+			0x00000000,	/* DENALI_PHY_107_DATA */
+			0x00000000,	/* DENALI_PHY_108_DATA */
+			0x00000000,	/* DENALI_PHY_109_DATA */
+			0x00000000,	/* DENALI_PHY_110_DATA */
+			0x00000000,	/* DENALI_PHY_111_DATA */
+			0x00000000,	/* DENALI_PHY_112_DATA */
+			0x00000000,	/* DENALI_PHY_113_DATA */
+			0x00000000,	/* DENALI_PHY_114_DATA */
+			0x00000000,	/* DENALI_PHY_115_DATA */
+			0x00000000,	/* DENALI_PHY_116_DATA */
+			0x00000000,	/* DENALI_PHY_117_DATA */
+			0x00000000,	/* DENALI_PHY_118_DATA */
+			0x00000000,	/* DENALI_PHY_119_DATA */
+			0x00000000,	/* DENALI_PHY_120_DATA */
+			0x00000000,	/* DENALI_PHY_121_DATA */
+			0x00000000,	/* DENALI_PHY_122_DATA */
+			0x00000000,	/* DENALI_PHY_123_DATA */
+			0x00000000,	/* DENALI_PHY_124_DATA */
+			0x00000000,	/* DENALI_PHY_125_DATA */
+			0x00000000,	/* DENALI_PHY_126_DATA */
+			0x00000000,	/* DENALI_PHY_127_DATA */
+			0x76543210,	/* DENALI_PHY_128_DATA */
+			0x0004f008,	/* DENALI_PHY_129_DATA */
+			0x00020119,	/* DENALI_PHY_130_DATA */
+			0x00000000,	/* DENALI_PHY_131_DATA */
+			0x00000000,	/* DENALI_PHY_132_DATA */
+			0x00010000,	/* DENALI_PHY_133_DATA */
+			0x01665555,	/* DENALI_PHY_134_DATA */
+			0x03665555,	/* DENALI_PHY_135_DATA */
+			0x00010f00,	/* DENALI_PHY_136_DATA */
+			0x04000100,	/* DENALI_PHY_137_DATA */
+			0x00000001,	/* DENALI_PHY_138_DATA */
+			0x00170180,	/* DENALI_PHY_139_DATA */
+			0x00cc0201,	/* DENALI_PHY_140_DATA */
+			0x00030066,	/* DENALI_PHY_141_DATA */
+			0x00000000,	/* DENALI_PHY_142_DATA */
+			0x00000000,	/* DENALI_PHY_143_DATA */
+			0x00000000,	/* DENALI_PHY_144_DATA */
+			0x00000000,	/* DENALI_PHY_145_DATA */
+			0x00000000,	/* DENALI_PHY_146_DATA */
+			0x00000000,	/* DENALI_PHY_147_DATA */
+			0x00000000,	/* DENALI_PHY_148_DATA */
+			0x00000000,	/* DENALI_PHY_149_DATA */
+			0x04080000,	/* DENALI_PHY_150_DATA */
+			0x04080400,	/* DENALI_PHY_151_DATA */
+			0x30000000,	/* DENALI_PHY_152_DATA */
+			0x0c00c007,	/* DENALI_PHY_153_DATA */
+			0x00000100,	/* DENALI_PHY_154_DATA */
+			0x00000000,	/* DENALI_PHY_155_DATA */
+			0xfd02fe01,	/* DENALI_PHY_156_DATA */
+			0xf708fb04,	/* DENALI_PHY_157_DATA */
+			0xdf20ef10,	/* DENALI_PHY_158_DATA */
+			0x7f80bf40,	/* DENALI_PHY_159_DATA */
+			0x0000aaaa,	/* DENALI_PHY_160_DATA */
+			0x00000000,	/* DENALI_PHY_161_DATA */
+			0x00000000,	/* DENALI_PHY_162_DATA */
+			0x00000000,	/* DENALI_PHY_163_DATA */
+			0x00000000,	/* DENALI_PHY_164_DATA */
+			0x00000000,	/* DENALI_PHY_165_DATA */
+			0x00000000,	/* DENALI_PHY_166_DATA */
+			0x00000000,	/* DENALI_PHY_167_DATA */
+			0x00000000,	/* DENALI_PHY_168_DATA */
+			0x00000000,	/* DENALI_PHY_169_DATA */
+			0x00000000,	/* DENALI_PHY_170_DATA */
+			0x00000000,	/* DENALI_PHY_171_DATA */
+			0x00000000,	/* DENALI_PHY_172_DATA */
+			0x00000000,	/* DENALI_PHY_173_DATA */
+			0x00000000,	/* DENALI_PHY_174_DATA */
+			0x00000000,	/* DENALI_PHY_175_DATA */
+			0x00000000,	/* DENALI_PHY_176_DATA */
+			0x00000000,	/* DENALI_PHY_177_DATA */
+			0x00000000,	/* DENALI_PHY_178_DATA */
+			0x00000000,	/* DENALI_PHY_179_DATA */
+			0x00200000,	/* DENALI_PHY_180_DATA */
+			0x00000000,	/* DENALI_PHY_181_DATA */
+			0x00000000,	/* DENALI_PHY_182_DATA */
+			0x00000000,	/* DENALI_PHY_183_DATA */
+			0x00000000,	/* DENALI_PHY_184_DATA */
+			0x00000000,	/* DENALI_PHY_185_DATA */
+			0x00000000,	/* DENALI_PHY_186_DATA */
+			0x02800280,	/* DENALI_PHY_187_DATA */
+			0x02800280,	/* DENALI_PHY_188_DATA */
+			0x02800280,	/* DENALI_PHY_189_DATA */
+			0x02800280,	/* DENALI_PHY_190_DATA */
+			0x00000280,	/* DENALI_PHY_191_DATA */
+			0x00000000,	/* DENALI_PHY_192_DATA */
+			0x00000000,	/* DENALI_PHY_193_DATA */
+			0x00000000,	/* DENALI_PHY_194_DATA */
+			0x00000000,	/* DENALI_PHY_195_DATA */
+			0x00800000,	/* DENALI_PHY_196_DATA */
+			0x00800080,	/* DENALI_PHY_197_DATA */
+			0x00800080,	/* DENALI_PHY_198_DATA */
+			0x00800080,	/* DENALI_PHY_199_DATA */
+			0x00800080,	/* DENALI_PHY_200_DATA */
+			0x00800080,	/* DENALI_PHY_201_DATA */
+			0x00800080,	/* DENALI_PHY_202_DATA */
+			0x00800080,	/* DENALI_PHY_203_DATA */
+			0x00800080,	/* DENALI_PHY_204_DATA */
+			0x01190080,	/* DENALI_PHY_205_DATA */
+			0x00000001,	/* DENALI_PHY_206_DATA */
+			0x00000000,	/* DENALI_PHY_207_DATA */
+			0x00000000,	/* DENALI_PHY_208_DATA */
+			0x00000200,	/* DENALI_PHY_209_DATA */
+			0x00000000,	/* DENALI_PHY_210_DATA */
+			0x51315152,	/* DENALI_PHY_211_DATA */
+			0xc0003150,	/* DENALI_PHY_212_DATA */
+			0x010000c0,	/* DENALI_PHY_213_DATA */
+			0x00100000,	/* DENALI_PHY_214_DATA */
+			0x07044204,	/* DENALI_PHY_215_DATA */
+			0x000f0c18,	/* DENALI_PHY_216_DATA */
+			0x01000140,	/* DENALI_PHY_217_DATA */
+			0x00000c10,	/* DENALI_PHY_218_DATA */
+			0x00000000,	/* DENALI_PHY_219_DATA */
+			0x00000000,	/* DENALI_PHY_220_DATA */
+			0x00000000,	/* DENALI_PHY_221_DATA */
+			0x00000000,	/* DENALI_PHY_222_DATA */
+			0x00000000,	/* DENALI_PHY_223_DATA */
+			0x00000000,	/* DENALI_PHY_224_DATA */
+			0x00000000,	/* DENALI_PHY_225_DATA */
+			0x00000000,	/* DENALI_PHY_226_DATA */
+			0x00000000,	/* DENALI_PHY_227_DATA */
+			0x00000000,	/* DENALI_PHY_228_DATA */
+			0x00000000,	/* DENALI_PHY_229_DATA */
+			0x00000000,	/* DENALI_PHY_230_DATA */
+			0x00000000,	/* DENALI_PHY_231_DATA */
+			0x00000000,	/* DENALI_PHY_232_DATA */
+			0x00000000,	/* DENALI_PHY_233_DATA */
+			0x00000000,	/* DENALI_PHY_234_DATA */
+			0x00000000,	/* DENALI_PHY_235_DATA */
+			0x00000000,	/* DENALI_PHY_236_DATA */
+			0x00000000,	/* DENALI_PHY_237_DATA */
+			0x00000000,	/* DENALI_PHY_238_DATA */
+			0x00000000,	/* DENALI_PHY_239_DATA */
+			0x00000000,	/* DENALI_PHY_240_DATA */
+			0x00000000,	/* DENALI_PHY_241_DATA */
+			0x00000000,	/* DENALI_PHY_242_DATA */
+			0x00000000,	/* DENALI_PHY_243_DATA */
+			0x00000000,	/* DENALI_PHY_244_DATA */
+			0x00000000,	/* DENALI_PHY_245_DATA */
+			0x00000000,	/* DENALI_PHY_246_DATA */
+			0x00000000,	/* DENALI_PHY_247_DATA */
+			0x00000000,	/* DENALI_PHY_248_DATA */
+			0x00000000,	/* DENALI_PHY_249_DATA */
+			0x00000000,	/* DENALI_PHY_250_DATA */
+			0x00000000,	/* DENALI_PHY_251_DATA */
+			0x00000000,	/* DENALI_PHY_252_DATA */
+			0x00000000,	/* DENALI_PHY_253_DATA */
+			0x00000000,	/* DENALI_PHY_254_DATA */
+			0x00000000,	/* DENALI_PHY_255_DATA */
+			0x76543210,	/* DENALI_PHY_256_DATA */
+			0x0004f008,	/* DENALI_PHY_257_DATA */
+			0x00020119,	/* DENALI_PHY_258_DATA */
+			0x00000000,	/* DENALI_PHY_259_DATA */
+			0x00000000,	/* DENALI_PHY_260_DATA */
+			0x00010000,	/* DENALI_PHY_261_DATA */
+			0x01665555,	/* DENALI_PHY_262_DATA */
+			0x03665555,	/* DENALI_PHY_263_DATA */
+			0x00010f00,	/* DENALI_PHY_264_DATA */
+			0x04000100,	/* DENALI_PHY_265_DATA */
+			0x00000001,	/* DENALI_PHY_266_DATA */
+			0x00170180,	/* DENALI_PHY_267_DATA */
+			0x00cc0201,	/* DENALI_PHY_268_DATA */
+			0x00030066,	/* DENALI_PHY_269_DATA */
+			0x00000000,	/* DENALI_PHY_270_DATA */
+			0x00000000,	/* DENALI_PHY_271_DATA */
+			0x00000000,	/* DENALI_PHY_272_DATA */
+			0x00000000,	/* DENALI_PHY_273_DATA */
+			0x00000000,	/* DENALI_PHY_274_DATA */
+			0x00000000,	/* DENALI_PHY_275_DATA */
+			0x00000000,	/* DENALI_PHY_276_DATA */
+			0x00000000,	/* DENALI_PHY_277_DATA */
+			0x04080000,	/* DENALI_PHY_278_DATA */
+			0x04080400,	/* DENALI_PHY_279_DATA */
+			0x30000000,	/* DENALI_PHY_280_DATA */
+			0x0c00c007,	/* DENALI_PHY_281_DATA */
+			0x00000100,	/* DENALI_PHY_282_DATA */
+			0x00000000,	/* DENALI_PHY_283_DATA */
+			0xfd02fe01,	/* DENALI_PHY_284_DATA */
+			0xf708fb04,	/* DENALI_PHY_285_DATA */
+			0xdf20ef10,	/* DENALI_PHY_286_DATA */
+			0x7f80bf40,	/* DENALI_PHY_287_DATA */
+			0x0001aaaa,	/* DENALI_PHY_288_DATA */
+			0x00000000,	/* DENALI_PHY_289_DATA */
+			0x00000000,	/* DENALI_PHY_290_DATA */
+			0x00000000,	/* DENALI_PHY_291_DATA */
+			0x00000000,	/* DENALI_PHY_292_DATA */
+			0x00000000,	/* DENALI_PHY_293_DATA */
+			0x00000000,	/* DENALI_PHY_294_DATA */
+			0x00000000,	/* DENALI_PHY_295_DATA */
+			0x00000000,	/* DENALI_PHY_296_DATA */
+			0x00000000,	/* DENALI_PHY_297_DATA */
+			0x00000000,	/* DENALI_PHY_298_DATA */
+			0x00000000,	/* DENALI_PHY_299_DATA */
+			0x00000000,	/* DENALI_PHY_300_DATA */
+			0x00000000,	/* DENALI_PHY_301_DATA */
+			0x00000000,	/* DENALI_PHY_302_DATA */
+			0x00000000,	/* DENALI_PHY_303_DATA */
+			0x00000000,	/* DENALI_PHY_304_DATA */
+			0x00000000,	/* DENALI_PHY_305_DATA */
+			0x00000000,	/* DENALI_PHY_306_DATA */
+			0x00000000,	/* DENALI_PHY_307_DATA */
+			0x00200000,	/* DENALI_PHY_308_DATA */
+			0x00000000,	/* DENALI_PHY_309_DATA */
+			0x00000000,	/* DENALI_PHY_310_DATA */
+			0x00000000,	/* DENALI_PHY_311_DATA */
+			0x00000000,	/* DENALI_PHY_312_DATA */
+			0x00000000,	/* DENALI_PHY_313_DATA */
+			0x00000000,	/* DENALI_PHY_314_DATA */
+			0x02800280,	/* DENALI_PHY_315_DATA */
+			0x02800280,	/* DENALI_PHY_316_DATA */
+			0x02800280,	/* DENALI_PHY_317_DATA */
+			0x02800280,	/* DENALI_PHY_318_DATA */
+			0x00000280,	/* DENALI_PHY_319_DATA */
+			0x00000000,	/* DENALI_PHY_320_DATA */
+			0x00000000,	/* DENALI_PHY_321_DATA */
+			0x00000000,	/* DENALI_PHY_322_DATA */
+			0x00000000,	/* DENALI_PHY_323_DATA */
+			0x00800000,	/* DENALI_PHY_324_DATA */
+			0x00800080,	/* DENALI_PHY_325_DATA */
+			0x00800080,	/* DENALI_PHY_326_DATA */
+			0x00800080,	/* DENALI_PHY_327_DATA */
+			0x00800080,	/* DENALI_PHY_328_DATA */
+			0x00800080,	/* DENALI_PHY_329_DATA */
+			0x00800080,	/* DENALI_PHY_330_DATA */
+			0x00800080,	/* DENALI_PHY_331_DATA */
+			0x00800080,	/* DENALI_PHY_332_DATA */
+			0x01190080,	/* DENALI_PHY_333_DATA */
+			0x00000001,	/* DENALI_PHY_334_DATA */
+			0x00000000,	/* DENALI_PHY_335_DATA */
+			0x00000000,	/* DENALI_PHY_336_DATA */
+			0x00000200,	/* DENALI_PHY_337_DATA */
+			0x00000000,	/* DENALI_PHY_338_DATA */
+			0x51315152,	/* DENALI_PHY_339_DATA */
+			0xc0003150,	/* DENALI_PHY_340_DATA */
+			0x010000c0,	/* DENALI_PHY_341_DATA */
+			0x00100000,	/* DENALI_PHY_342_DATA */
+			0x07044204,	/* DENALI_PHY_343_DATA */
+			0x000f0c18,	/* DENALI_PHY_344_DATA */
+			0x01000140,	/* DENALI_PHY_345_DATA */
+			0x00000c10,	/* DENALI_PHY_346_DATA */
+			0x00000000,	/* DENALI_PHY_347_DATA */
+			0x00000000,	/* DENALI_PHY_348_DATA */
+			0x00000000,	/* DENALI_PHY_349_DATA */
+			0x00000000,	/* DENALI_PHY_350_DATA */
+			0x00000000,	/* DENALI_PHY_351_DATA */
+			0x00000000,	/* DENALI_PHY_352_DATA */
+			0x00000000,	/* DENALI_PHY_353_DATA */
+			0x00000000,	/* DENALI_PHY_354_DATA */
+			0x00000000,	/* DENALI_PHY_355_DATA */
+			0x00000000,	/* DENALI_PHY_356_DATA */
+			0x00000000,	/* DENALI_PHY_357_DATA */
+			0x00000000,	/* DENALI_PHY_358_DATA */
+			0x00000000,	/* DENALI_PHY_359_DATA */
+			0x00000000,	/* DENALI_PHY_360_DATA */
+			0x00000000,	/* DENALI_PHY_361_DATA */
+			0x00000000,	/* DENALI_PHY_362_DATA */
+			0x00000000,	/* DENALI_PHY_363_DATA */
+			0x00000000,	/* DENALI_PHY_364_DATA */
+			0x00000000,	/* DENALI_PHY_365_DATA */
+			0x00000000,	/* DENALI_PHY_366_DATA */
+			0x00000000,	/* DENALI_PHY_367_DATA */
+			0x00000000,	/* DENALI_PHY_368_DATA */
+			0x00000000,	/* DENALI_PHY_369_DATA */
+			0x00000000,	/* DENALI_PHY_370_DATA */
+			0x00000000,	/* DENALI_PHY_371_DATA */
+			0x00000000,	/* DENALI_PHY_372_DATA */
+			0x00000000,	/* DENALI_PHY_373_DATA */
+			0x00000000,	/* DENALI_PHY_374_DATA */
+			0x00000000,	/* DENALI_PHY_375_DATA */
+			0x00000000,	/* DENALI_PHY_376_DATA */
+			0x00000000,	/* DENALI_PHY_377_DATA */
+			0x00000000,	/* DENALI_PHY_378_DATA */
+			0x00000000,	/* DENALI_PHY_379_DATA */
+			0x00000000,	/* DENALI_PHY_380_DATA */
+			0x00000000,	/* DENALI_PHY_381_DATA */
+			0x00000000,	/* DENALI_PHY_382_DATA */
+			0x00000000,	/* DENALI_PHY_383_DATA */
+			0x76543210,	/* DENALI_PHY_384_DATA */
+			0x0004f008,	/* DENALI_PHY_385_DATA */
+			0x00020119,	/* DENALI_PHY_386_DATA */
+			0x00000000,	/* DENALI_PHY_387_DATA */
+			0x00000000,	/* DENALI_PHY_388_DATA */
+			0x00010000,	/* DENALI_PHY_389_DATA */
+			0x01665555,	/* DENALI_PHY_390_DATA */
+			0x03665555,	/* DENALI_PHY_391_DATA */
+			0x00010f00,	/* DENALI_PHY_392_DATA */
+			0x04000100,	/* DENALI_PHY_393_DATA */
+			0x00000001,	/* DENALI_PHY_394_DATA */
+			0x00170180,	/* DENALI_PHY_395_DATA */
+			0x00cc0201,	/* DENALI_PHY_396_DATA */
+			0x00030066,	/* DENALI_PHY_397_DATA */
+			0x00000000,	/* DENALI_PHY_398_DATA */
+			0x00000000,	/* DENALI_PHY_399_DATA */
+			0x00000000,	/* DENALI_PHY_400_DATA */
+			0x00000000,	/* DENALI_PHY_401_DATA */
+			0x00000000,	/* DENALI_PHY_402_DATA */
+			0x00000000,	/* DENALI_PHY_403_DATA */
+			0x00000000,	/* DENALI_PHY_404_DATA */
+			0x00000000,	/* DENALI_PHY_405_DATA */
+			0x04080000,	/* DENALI_PHY_406_DATA */
+			0x04080400,	/* DENALI_PHY_407_DATA */
+			0x30000000,	/* DENALI_PHY_408_DATA */
+			0x0c00c007,	/* DENALI_PHY_409_DATA */
+			0x00000100,	/* DENALI_PHY_410_DATA */
+			0x00000000,	/* DENALI_PHY_411_DATA */
+			0xfd02fe01,	/* DENALI_PHY_412_DATA */
+			0xf708fb04,	/* DENALI_PHY_413_DATA */
+			0xdf20ef10,	/* DENALI_PHY_414_DATA */
+			0x7f80bf40,	/* DENALI_PHY_415_DATA */
+			0x0000aaaa,	/* DENALI_PHY_416_DATA */
+			0x00000000,	/* DENALI_PHY_417_DATA */
+			0x00000000,	/* DENALI_PHY_418_DATA */
+			0x00000000,	/* DENALI_PHY_419_DATA */
+			0x00000000,	/* DENALI_PHY_420_DATA */
+			0x00000000,	/* DENALI_PHY_421_DATA */
+			0x00000000,	/* DENALI_PHY_422_DATA */
+			0x00000000,	/* DENALI_PHY_423_DATA */
+			0x00000000,	/* DENALI_PHY_424_DATA */
+			0x00000000,	/* DENALI_PHY_425_DATA */
+			0x00000000,	/* DENALI_PHY_426_DATA */
+			0x00000000,	/* DENALI_PHY_427_DATA */
+			0x00000000,	/* DENALI_PHY_428_DATA */
+			0x00000000,	/* DENALI_PHY_429_DATA */
+			0x00000000,	/* DENALI_PHY_430_DATA */
+			0x00000000,	/* DENALI_PHY_431_DATA */
+			0x00000000,	/* DENALI_PHY_432_DATA */
+			0x00000000,	/* DENALI_PHY_433_DATA */
+			0x00000000,	/* DENALI_PHY_434_DATA */
+			0x00000000,	/* DENALI_PHY_435_DATA */
+			0x00200000,	/* DENALI_PHY_436_DATA */
+			0x00000000,	/* DENALI_PHY_437_DATA */
+			0x00000000,	/* DENALI_PHY_438_DATA */
+			0x00000000,	/* DENALI_PHY_439_DATA */
+			0x00000000,	/* DENALI_PHY_440_DATA */
+			0x00000000,	/* DENALI_PHY_441_DATA */
+			0x00000000,	/* DENALI_PHY_442_DATA */
+			0x02800280,	/* DENALI_PHY_443_DATA */
+			0x02800280,	/* DENALI_PHY_444_DATA */
+			0x02800280,	/* DENALI_PHY_445_DATA */
+			0x02800280,	/* DENALI_PHY_446_DATA */
+			0x00000280,	/* DENALI_PHY_447_DATA */
+			0x00000000,	/* DENALI_PHY_448_DATA */
+			0x00000000,	/* DENALI_PHY_449_DATA */
+			0x00000000,	/* DENALI_PHY_450_DATA */
+			0x00000000,	/* DENALI_PHY_451_DATA */
+			0x00800000,	/* DENALI_PHY_452_DATA */
+			0x00800080,	/* DENALI_PHY_453_DATA */
+			0x00800080,	/* DENALI_PHY_454_DATA */
+			0x00800080,	/* DENALI_PHY_455_DATA */
+			0x00800080,	/* DENALI_PHY_456_DATA */
+			0x00800080,	/* DENALI_PHY_457_DATA */
+			0x00800080,	/* DENALI_PHY_458_DATA */
+			0x00800080,	/* DENALI_PHY_459_DATA */
+			0x00800080,	/* DENALI_PHY_460_DATA */
+			0x01190080,	/* DENALI_PHY_461_DATA */
+			0x00000001,	/* DENALI_PHY_462_DATA */
+			0x00000000,	/* DENALI_PHY_463_DATA */
+			0x00000000,	/* DENALI_PHY_464_DATA */
+			0x00000200,	/* DENALI_PHY_465_DATA */
+			0x00000000,	/* DENALI_PHY_466_DATA */
+			0x51315152,	/* DENALI_PHY_467_DATA */
+			0xc0003150,	/* DENALI_PHY_468_DATA */
+			0x010000c0,	/* DENALI_PHY_469_DATA */
+			0x00100000,	/* DENALI_PHY_470_DATA */
+			0x07044204,	/* DENALI_PHY_471_DATA */
+			0x000f0c18,	/* DENALI_PHY_472_DATA */
+			0x01000140,	/* DENALI_PHY_473_DATA */
+			0x00000c10,	/* DENALI_PHY_474_DATA */
+			0x00000000,	/* DENALI_PHY_475_DATA */
+			0x00000000,	/* DENALI_PHY_476_DATA */
+			0x00000000,	/* DENALI_PHY_477_DATA */
+			0x00000000,	/* DENALI_PHY_478_DATA */
+			0x00000000,	/* DENALI_PHY_479_DATA */
+			0x00000000,	/* DENALI_PHY_480_DATA */
+			0x00000000,	/* DENALI_PHY_481_DATA */
+			0x00000000,	/* DENALI_PHY_482_DATA */
+			0x00000000,	/* DENALI_PHY_483_DATA */
+			0x00000000,	/* DENALI_PHY_484_DATA */
+			0x00000000,	/* DENALI_PHY_485_DATA */
+			0x00000000,	/* DENALI_PHY_486_DATA */
+			0x00000000,	/* DENALI_PHY_487_DATA */
+			0x00000000,	/* DENALI_PHY_488_DATA */
+			0x00000000,	/* DENALI_PHY_489_DATA */
+			0x00000000,	/* DENALI_PHY_490_DATA */
+			0x00000000,	/* DENALI_PHY_491_DATA */
+			0x00000000,	/* DENALI_PHY_492_DATA */
+			0x00000000,	/* DENALI_PHY_493_DATA */
+			0x00000000,	/* DENALI_PHY_494_DATA */
+			0x00000000,	/* DENALI_PHY_495_DATA */
+			0x00000000,	/* DENALI_PHY_496_DATA */
+			0x00000000,	/* DENALI_PHY_497_DATA */
+			0x00000000,	/* DENALI_PHY_498_DATA */
+			0x00000000,	/* DENALI_PHY_499_DATA */
+			0x00000000,	/* DENALI_PHY_500_DATA */
+			0x00000000,	/* DENALI_PHY_501_DATA */
+			0x00000000,	/* DENALI_PHY_502_DATA */
+			0x00000000,	/* DENALI_PHY_503_DATA */
+			0x00000000,	/* DENALI_PHY_504_DATA */
+			0x00000000,	/* DENALI_PHY_505_DATA */
+			0x00000000,	/* DENALI_PHY_506_DATA */
+			0x00000000,	/* DENALI_PHY_507_DATA */
+			0x00000000,	/* DENALI_PHY_508_DATA */
+			0x00000000,	/* DENALI_PHY_509_DATA */
+			0x00000000,	/* DENALI_PHY_510_DATA */
+			0x00000000,	/* DENALI_PHY_511_DATA */
+			0x00000000,	/* DENALI_PHY_512_DATA */
+			0x00000000,	/* DENALI_PHY_513_DATA */
+			0x00000000,	/* DENALI_PHY_514_DATA */
+			0x00000000,	/* DENALI_PHY_515_DATA */
+			0x00000000,	/* DENALI_PHY_516_DATA */
+			0x00000000,	/* DENALI_PHY_517_DATA */
+			0x00000000,	/* DENALI_PHY_518_DATA */
+			0x00000002,	/* DENALI_PHY_519_DATA */
+			0x00000000,	/* DENALI_PHY_520_DATA */
+			0x00000000,	/* DENALI_PHY_521_DATA */
+			0x00000000,	/* DENALI_PHY_522_DATA */
+			0x00400320,	/* DENALI_PHY_523_DATA */
+			0x00000040,	/* DENALI_PHY_524_DATA */
+			0x00dcba98,	/* DENALI_PHY_525_DATA */
+			0x00000000,	/* DENALI_PHY_526_DATA */
+			0x00dcba98,	/* DENALI_PHY_527_DATA */
+			0x01000000,	/* DENALI_PHY_528_DATA */
+			0x00020003,	/* DENALI_PHY_529_DATA */
+			0x00000000,	/* DENALI_PHY_530_DATA */
+			0x00000000,	/* DENALI_PHY_531_DATA */
+			0x00000000,	/* DENALI_PHY_532_DATA */
+			0x0000002a,	/* DENALI_PHY_533_DATA */
+			0x00000015,	/* DENALI_PHY_534_DATA */
+			0x00000015,	/* DENALI_PHY_535_DATA */
+			0x0000002a,	/* DENALI_PHY_536_DATA */
+			0x00000033,	/* DENALI_PHY_537_DATA */
+			0x0000000c,	/* DENALI_PHY_538_DATA */
+			0x0000000c,	/* DENALI_PHY_539_DATA */
+			0x00000033,	/* DENALI_PHY_540_DATA */
+			0x0a418820,	/* DENALI_PHY_541_DATA */
+			0x003f0000,	/* DENALI_PHY_542_DATA */
+			0x0000003f,	/* DENALI_PHY_543_DATA */
+			0x00030055,	/* DENALI_PHY_544_DATA */
+			0x03000300,	/* DENALI_PHY_545_DATA */
+			0x03000300,	/* DENALI_PHY_546_DATA */
+			0x00000300,	/* DENALI_PHY_547_DATA */
+			0x42080010,	/* DENALI_PHY_548_DATA */
+			0x00000003,	/* DENALI_PHY_549_DATA */
+			0x00000000,	/* DENALI_PHY_550_DATA */
+			0x00000000,	/* DENALI_PHY_551_DATA */
+			0x00000000,	/* DENALI_PHY_552_DATA */
+			0x00000000,	/* DENALI_PHY_553_DATA */
+			0x00000000,	/* DENALI_PHY_554_DATA */
+			0x00000000,	/* DENALI_PHY_555_DATA */
+			0x00000000,	/* DENALI_PHY_556_DATA */
+			0x00000000,	/* DENALI_PHY_557_DATA */
+			0x00000000,	/* DENALI_PHY_558_DATA */
+			0x00000000,	/* DENALI_PHY_559_DATA */
+			0x00000000,	/* DENALI_PHY_560_DATA */
+			0x00000000,	/* DENALI_PHY_561_DATA */
+			0x00000000,	/* DENALI_PHY_562_DATA */
+			0x00000000,	/* DENALI_PHY_563_DATA */
+			0x00000000,	/* DENALI_PHY_564_DATA */
+			0x00000000,	/* DENALI_PHY_565_DATA */
+			0x00000000,	/* DENALI_PHY_566_DATA */
+			0x00000000,	/* DENALI_PHY_567_DATA */
+			0x00000000,	/* DENALI_PHY_568_DATA */
+			0x00000000,	/* DENALI_PHY_569_DATA */
+			0x00000000,	/* DENALI_PHY_570_DATA */
+			0x00000000,	/* DENALI_PHY_571_DATA */
+			0x00000000,	/* DENALI_PHY_572_DATA */
+			0x00000000,	/* DENALI_PHY_573_DATA */
+			0x00000000,	/* DENALI_PHY_574_DATA */
+			0x00000000,	/* DENALI_PHY_575_DATA */
+			0x00000000,	/* DENALI_PHY_576_DATA */
+			0x00000000,	/* DENALI_PHY_577_DATA */
+			0x00000000,	/* DENALI_PHY_578_DATA */
+			0x00000000,	/* DENALI_PHY_579_DATA */
+			0x00000000,	/* DENALI_PHY_580_DATA */
+			0x00000000,	/* DENALI_PHY_581_DATA */
+			0x00000000,	/* DENALI_PHY_582_DATA */
+			0x00000000,	/* DENALI_PHY_583_DATA */
+			0x00000000,	/* DENALI_PHY_584_DATA */
+			0x00000000,	/* DENALI_PHY_585_DATA */
+			0x00000000,	/* DENALI_PHY_586_DATA */
+			0x00000000,	/* DENALI_PHY_587_DATA */
+			0x00000000,	/* DENALI_PHY_588_DATA */
+			0x00000000,	/* DENALI_PHY_589_DATA */
+			0x00000000,	/* DENALI_PHY_590_DATA */
+			0x00000000,	/* DENALI_PHY_591_DATA */
+			0x00000000,	/* DENALI_PHY_592_DATA */
+			0x00000000,	/* DENALI_PHY_593_DATA */
+			0x00000000,	/* DENALI_PHY_594_DATA */
+			0x00000000,	/* DENALI_PHY_595_DATA */
+			0x00000000,	/* DENALI_PHY_596_DATA */
+			0x00000000,	/* DENALI_PHY_597_DATA */
+			0x00000000,	/* DENALI_PHY_598_DATA */
+			0x00000000,	/* DENALI_PHY_599_DATA */
+			0x00000000,	/* DENALI_PHY_600_DATA */
+			0x00000000,	/* DENALI_PHY_601_DATA */
+			0x00000000,	/* DENALI_PHY_602_DATA */
+			0x00000000,	/* DENALI_PHY_603_DATA */
+			0x00000000,	/* DENALI_PHY_604_DATA */
+			0x00000000,	/* DENALI_PHY_605_DATA */
+			0x00000000,	/* DENALI_PHY_606_DATA */
+			0x00000000,	/* DENALI_PHY_607_DATA */
+			0x00000000,	/* DENALI_PHY_608_DATA */
+			0x00000000,	/* DENALI_PHY_609_DATA */
+			0x00000000,	/* DENALI_PHY_610_DATA */
+			0x00000000,	/* DENALI_PHY_611_DATA */
+			0x00000000,	/* DENALI_PHY_612_DATA */
+			0x00000000,	/* DENALI_PHY_613_DATA */
+			0x00000000,	/* DENALI_PHY_614_DATA */
+			0x00000000,	/* DENALI_PHY_615_DATA */
+			0x00000000,	/* DENALI_PHY_616_DATA */
+			0x00000000,	/* DENALI_PHY_617_DATA */
+			0x00000000,	/* DENALI_PHY_618_DATA */
+			0x00000000,	/* DENALI_PHY_619_DATA */
+			0x00000000,	/* DENALI_PHY_620_DATA */
+			0x00000000,	/* DENALI_PHY_621_DATA */
+			0x00000000,	/* DENALI_PHY_622_DATA */
+			0x00000000,	/* DENALI_PHY_623_DATA */
+			0x00000000,	/* DENALI_PHY_624_DATA */
+			0x00000000,	/* DENALI_PHY_625_DATA */
+			0x00000000,	/* DENALI_PHY_626_DATA */
+			0x00000000,	/* DENALI_PHY_627_DATA */
+			0x00000000,	/* DENALI_PHY_628_DATA */
+			0x00000000,	/* DENALI_PHY_629_DATA */
+			0x00000000,	/* DENALI_PHY_630_DATA */
+			0x00000000,	/* DENALI_PHY_631_DATA */
+			0x00000000,	/* DENALI_PHY_632_DATA */
+			0x00000000,	/* DENALI_PHY_633_DATA */
+			0x00000000,	/* DENALI_PHY_634_DATA */
+			0x00000000,	/* DENALI_PHY_635_DATA */
+			0x00000000,	/* DENALI_PHY_636_DATA */
+			0x00000000,	/* DENALI_PHY_637_DATA */
+			0x00000000,	/* DENALI_PHY_638_DATA */
+			0x00000000,	/* DENALI_PHY_639_DATA */
+			0x00000000,	/* DENALI_PHY_640_DATA */
+			0x00000000,	/* DENALI_PHY_641_DATA */
+			0x00000000,	/* DENALI_PHY_642_DATA */
+			0x00000000,	/* DENALI_PHY_643_DATA */
+			0x00000000,	/* DENALI_PHY_644_DATA */
+			0x00000000,	/* DENALI_PHY_645_DATA */
+			0x00000000,	/* DENALI_PHY_646_DATA */
+			0x00000002,	/* DENALI_PHY_647_DATA */
+			0x00000000,	/* DENALI_PHY_648_DATA */
+			0x00000000,	/* DENALI_PHY_649_DATA */
+			0x00000000,	/* DENALI_PHY_650_DATA */
+			0x00400320,	/* DENALI_PHY_651_DATA */
+			0x00000040,	/* DENALI_PHY_652_DATA */
+			0x00000000,	/* DENALI_PHY_653_DATA */
+			0x00000000,	/* DENALI_PHY_654_DATA */
+			0x00000000,	/* DENALI_PHY_655_DATA */
+			0x01000000,	/* DENALI_PHY_656_DATA */
+			0x00020003,	/* DENALI_PHY_657_DATA */
+			0x00000000,	/* DENALI_PHY_658_DATA */
+			0x00000000,	/* DENALI_PHY_659_DATA */
+			0x00000000,	/* DENALI_PHY_660_DATA */
+			0x0000002a,	/* DENALI_PHY_661_DATA */
+			0x00000015,	/* DENALI_PHY_662_DATA */
+			0x00000015,	/* DENALI_PHY_663_DATA */
+			0x0000002a,	/* DENALI_PHY_664_DATA */
+			0x00000033,	/* DENALI_PHY_665_DATA */
+			0x0000000c,	/* DENALI_PHY_666_DATA */
+			0x0000000c,	/* DENALI_PHY_667_DATA */
+			0x00000033,	/* DENALI_PHY_668_DATA */
+			0x00000000,	/* DENALI_PHY_669_DATA */
+			0x00000000,	/* DENALI_PHY_670_DATA */
+			0x00000000,	/* DENALI_PHY_671_DATA */
+			0x00030055,	/* DENALI_PHY_672_DATA */
+			0x03000300,	/* DENALI_PHY_673_DATA */
+			0x03000300,	/* DENALI_PHY_674_DATA */
+			0x00000300,	/* DENALI_PHY_675_DATA */
+			0x42080010,	/* DENALI_PHY_676_DATA */
+			0x00000003,	/* DENALI_PHY_677_DATA */
+			0x00000000,	/* DENALI_PHY_678_DATA */
+			0x00000000,	/* DENALI_PHY_679_DATA */
+			0x00000000,	/* DENALI_PHY_680_DATA */
+			0x00000000,	/* DENALI_PHY_681_DATA */
+			0x00000000,	/* DENALI_PHY_682_DATA */
+			0x00000000,	/* DENALI_PHY_683_DATA */
+			0x00000000,	/* DENALI_PHY_684_DATA */
+			0x00000000,	/* DENALI_PHY_685_DATA */
+			0x00000000,	/* DENALI_PHY_686_DATA */
+			0x00000000,	/* DENALI_PHY_687_DATA */
+			0x00000000,	/* DENALI_PHY_688_DATA */
+			0x00000000,	/* DENALI_PHY_689_DATA */
+			0x00000000,	/* DENALI_PHY_690_DATA */
+			0x00000000,	/* DENALI_PHY_691_DATA */
+			0x00000000,	/* DENALI_PHY_692_DATA */
+			0x00000000,	/* DENALI_PHY_693_DATA */
+			0x00000000,	/* DENALI_PHY_694_DATA */
+			0x00000000,	/* DENALI_PHY_695_DATA */
+			0x00000000,	/* DENALI_PHY_696_DATA */
+			0x00000000,	/* DENALI_PHY_697_DATA */
+			0x00000000,	/* DENALI_PHY_698_DATA */
+			0x00000000,	/* DENALI_PHY_699_DATA */
+			0x00000000,	/* DENALI_PHY_700_DATA */
+			0x00000000,	/* DENALI_PHY_701_DATA */
+			0x00000000,	/* DENALI_PHY_702_DATA */
+			0x00000000,	/* DENALI_PHY_703_DATA */
+			0x00000000,	/* DENALI_PHY_704_DATA */
+			0x00000000,	/* DENALI_PHY_705_DATA */
+			0x00000000,	/* DENALI_PHY_706_DATA */
+			0x00000000,	/* DENALI_PHY_707_DATA */
+			0x00000000,	/* DENALI_PHY_708_DATA */
+			0x00000000,	/* DENALI_PHY_709_DATA */
+			0x00000000,	/* DENALI_PHY_710_DATA */
+			0x00000000,	/* DENALI_PHY_711_DATA */
+			0x00000000,	/* DENALI_PHY_712_DATA */
+			0x00000000,	/* DENALI_PHY_713_DATA */
+			0x00000000,	/* DENALI_PHY_714_DATA */
+			0x00000000,	/* DENALI_PHY_715_DATA */
+			0x00000000,	/* DENALI_PHY_716_DATA */
+			0x00000000,	/* DENALI_PHY_717_DATA */
+			0x00000000,	/* DENALI_PHY_718_DATA */
+			0x00000000,	/* DENALI_PHY_719_DATA */
+			0x00000000,	/* DENALI_PHY_720_DATA */
+			0x00000000,	/* DENALI_PHY_721_DATA */
+			0x00000000,	/* DENALI_PHY_722_DATA */
+			0x00000000,	/* DENALI_PHY_723_DATA */
+			0x00000000,	/* DENALI_PHY_724_DATA */
+			0x00000000,	/* DENALI_PHY_725_DATA */
+			0x00000000,	/* DENALI_PHY_726_DATA */
+			0x00000000,	/* DENALI_PHY_727_DATA */
+			0x00000000,	/* DENALI_PHY_728_DATA */
+			0x00000000,	/* DENALI_PHY_729_DATA */
+			0x00000000,	/* DENALI_PHY_730_DATA */
+			0x00000000,	/* DENALI_PHY_731_DATA */
+			0x00000000,	/* DENALI_PHY_732_DATA */
+			0x00000000,	/* DENALI_PHY_733_DATA */
+			0x00000000,	/* DENALI_PHY_734_DATA */
+			0x00000000,	/* DENALI_PHY_735_DATA */
+			0x00000000,	/* DENALI_PHY_736_DATA */
+			0x00000000,	/* DENALI_PHY_737_DATA */
+			0x00000000,	/* DENALI_PHY_738_DATA */
+			0x00000000,	/* DENALI_PHY_739_DATA */
+			0x00000000,	/* DENALI_PHY_740_DATA */
+			0x00000000,	/* DENALI_PHY_741_DATA */
+			0x00000000,	/* DENALI_PHY_742_DATA */
+			0x00000000,	/* DENALI_PHY_743_DATA */
+			0x00000000,	/* DENALI_PHY_744_DATA */
+			0x00000000,	/* DENALI_PHY_745_DATA */
+			0x00000000,	/* DENALI_PHY_746_DATA */
+			0x00000000,	/* DENALI_PHY_747_DATA */
+			0x00000000,	/* DENALI_PHY_748_DATA */
+			0x00000000,	/* DENALI_PHY_749_DATA */
+			0x00000000,	/* DENALI_PHY_750_DATA */
+			0x00000000,	/* DENALI_PHY_751_DATA */
+			0x00000000,	/* DENALI_PHY_752_DATA */
+			0x00000000,	/* DENALI_PHY_753_DATA */
+			0x00000000,	/* DENALI_PHY_754_DATA */
+			0x00000000,	/* DENALI_PHY_755_DATA */
+			0x00000000,	/* DENALI_PHY_756_DATA */
+			0x00000000,	/* DENALI_PHY_757_DATA */
+			0x00000000,	/* DENALI_PHY_758_DATA */
+			0x00000000,	/* DENALI_PHY_759_DATA */
+			0x00000000,	/* DENALI_PHY_760_DATA */
+			0x00000000,	/* DENALI_PHY_761_DATA */
+			0x00000000,	/* DENALI_PHY_762_DATA */
+			0x00000000,	/* DENALI_PHY_763_DATA */
+			0x00000000,	/* DENALI_PHY_764_DATA */
+			0x00000000,	/* DENALI_PHY_765_DATA */
+			0x00000000,	/* DENALI_PHY_766_DATA */
+			0x00000000,	/* DENALI_PHY_767_DATA */
+			0x00000000,	/* DENALI_PHY_768_DATA */
+			0x00000000,	/* DENALI_PHY_769_DATA */
+			0x00000000,	/* DENALI_PHY_770_DATA */
+			0x00000000,	/* DENALI_PHY_771_DATA */
+			0x00000000,	/* DENALI_PHY_772_DATA */
+			0x00000000,	/* DENALI_PHY_773_DATA */
+			0x00000000,	/* DENALI_PHY_774_DATA */
+			0x00000002,	/* DENALI_PHY_775_DATA */
+			0x00000000,	/* DENALI_PHY_776_DATA */
+			0x00000000,	/* DENALI_PHY_777_DATA */
+			0x00000000,	/* DENALI_PHY_778_DATA */
+			0x00400320,	/* DENALI_PHY_779_DATA */
+			0x00000040,	/* DENALI_PHY_780_DATA */
+			0x00000000,	/* DENALI_PHY_781_DATA */
+			0x00000000,	/* DENALI_PHY_782_DATA */
+			0x00000000,	/* DENALI_PHY_783_DATA */
+			0x01000000,	/* DENALI_PHY_784_DATA */
+			0x00020003,	/* DENALI_PHY_785_DATA */
+			0x00000000,	/* DENALI_PHY_786_DATA */
+			0x00000000,	/* DENALI_PHY_787_DATA */
+			0x00000000,	/* DENALI_PHY_788_DATA */
+			0x0000002a,	/* DENALI_PHY_789_DATA */
+			0x00000015,	/* DENALI_PHY_790_DATA */
+			0x00000015,	/* DENALI_PHY_791_DATA */
+			0x0000002a,	/* DENALI_PHY_792_DATA */
+			0x00000033,	/* DENALI_PHY_793_DATA */
+			0x0000000c,	/* DENALI_PHY_794_DATA */
+			0x0000000c,	/* DENALI_PHY_795_DATA */
+			0x00000033,	/* DENALI_PHY_796_DATA */
+			0x1ee6b16a,	/* DENALI_PHY_797_DATA */
+			0x10000000,	/* DENALI_PHY_798_DATA */
+			0x00000000,	/* DENALI_PHY_799_DATA */
+			0x00030055,	/* DENALI_PHY_800_DATA */
+			0x03000300,	/* DENALI_PHY_801_DATA */
+			0x03000300,	/* DENALI_PHY_802_DATA */
+			0x00000300,	/* DENALI_PHY_803_DATA */
+			0x42080010,	/* DENALI_PHY_804_DATA */
+			0x00000003,	/* DENALI_PHY_805_DATA */
+			0x00000000,	/* DENALI_PHY_806_DATA */
+			0x00000000,	/* DENALI_PHY_807_DATA */
+			0x00000000,	/* DENALI_PHY_808_DATA */
+			0x00000000,	/* DENALI_PHY_809_DATA */
+			0x00000000,	/* DENALI_PHY_810_DATA */
+			0x00000000,	/* DENALI_PHY_811_DATA */
+			0x00000000,	/* DENALI_PHY_812_DATA */
+			0x00000000,	/* DENALI_PHY_813_DATA */
+			0x00000000,	/* DENALI_PHY_814_DATA */
+			0x00000000,	/* DENALI_PHY_815_DATA */
+			0x00000000,	/* DENALI_PHY_816_DATA */
+			0x00000000,	/* DENALI_PHY_817_DATA */
+			0x00000000,	/* DENALI_PHY_818_DATA */
+			0x00000000,	/* DENALI_PHY_819_DATA */
+			0x00000000,	/* DENALI_PHY_820_DATA */
+			0x00000000,	/* DENALI_PHY_821_DATA */
+			0x00000000,	/* DENALI_PHY_822_DATA */
+			0x00000000,	/* DENALI_PHY_823_DATA */
+			0x00000000,	/* DENALI_PHY_824_DATA */
+			0x00000000,	/* DENALI_PHY_825_DATA */
+			0x00000000,	/* DENALI_PHY_826_DATA */
+			0x00000000,	/* DENALI_PHY_827_DATA */
+			0x00000000,	/* DENALI_PHY_828_DATA */
+			0x00000000,	/* DENALI_PHY_829_DATA */
+			0x00000000,	/* DENALI_PHY_830_DATA */
+			0x00000000,	/* DENALI_PHY_831_DATA */
+			0x00000000,	/* DENALI_PHY_832_DATA */
+			0x00000000,	/* DENALI_PHY_833_DATA */
+			0x00000000,	/* DENALI_PHY_834_DATA */
+			0x00000000,	/* DENALI_PHY_835_DATA */
+			0x00000000,	/* DENALI_PHY_836_DATA */
+			0x00000000,	/* DENALI_PHY_837_DATA */
+			0x00000000,	/* DENALI_PHY_838_DATA */
+			0x00000000,	/* DENALI_PHY_839_DATA */
+			0x00000000,	/* DENALI_PHY_840_DATA */
+			0x00000000,	/* DENALI_PHY_841_DATA */
+			0x00000000,	/* DENALI_PHY_842_DATA */
+			0x00000000,	/* DENALI_PHY_843_DATA */
+			0x00000000,	/* DENALI_PHY_844_DATA */
+			0x00000000,	/* DENALI_PHY_845_DATA */
+			0x00000000,	/* DENALI_PHY_846_DATA */
+			0x00000000,	/* DENALI_PHY_847_DATA */
+			0x00000000,	/* DENALI_PHY_848_DATA */
+			0x00000000,	/* DENALI_PHY_849_DATA */
+			0x00000000,	/* DENALI_PHY_850_DATA */
+			0x00000000,	/* DENALI_PHY_851_DATA */
+			0x00000000,	/* DENALI_PHY_852_DATA */
+			0x00000000,	/* DENALI_PHY_853_DATA */
+			0x00000000,	/* DENALI_PHY_854_DATA */
+			0x00000000,	/* DENALI_PHY_855_DATA */
+			0x00000000,	/* DENALI_PHY_856_DATA */
+			0x00000000,	/* DENALI_PHY_857_DATA */
+			0x00000000,	/* DENALI_PHY_858_DATA */
+			0x00000000,	/* DENALI_PHY_859_DATA */
+			0x00000000,	/* DENALI_PHY_860_DATA */
+			0x00000000,	/* DENALI_PHY_861_DATA */
+			0x00000000,	/* DENALI_PHY_862_DATA */
+			0x00000000,	/* DENALI_PHY_863_DATA */
+			0x00000000,	/* DENALI_PHY_864_DATA */
+			0x00000000,	/* DENALI_PHY_865_DATA */
+			0x00000000,	/* DENALI_PHY_866_DATA */
+			0x00000000,	/* DENALI_PHY_867_DATA */
+			0x00000000,	/* DENALI_PHY_868_DATA */
+			0x00000000,	/* DENALI_PHY_869_DATA */
+			0x00000000,	/* DENALI_PHY_870_DATA */
+			0x00000000,	/* DENALI_PHY_871_DATA */
+			0x00000000,	/* DENALI_PHY_872_DATA */
+			0x00000000,	/* DENALI_PHY_873_DATA */
+			0x00000000,	/* DENALI_PHY_874_DATA */
+			0x00000000,	/* DENALI_PHY_875_DATA */
+			0x00000000,	/* DENALI_PHY_876_DATA */
+			0x00000000,	/* DENALI_PHY_877_DATA */
+			0x00000000,	/* DENALI_PHY_878_DATA */
+			0x00000000,	/* DENALI_PHY_879_DATA */
+			0x00000000,	/* DENALI_PHY_880_DATA */
+			0x00000000,	/* DENALI_PHY_881_DATA */
+			0x00000000,	/* DENALI_PHY_882_DATA */
+			0x00000000,	/* DENALI_PHY_883_DATA */
+			0x00000000,	/* DENALI_PHY_884_DATA */
+			0x00000000,	/* DENALI_PHY_885_DATA */
+			0x00000000,	/* DENALI_PHY_886_DATA */
+			0x00000000,	/* DENALI_PHY_887_DATA */
+			0x00000000,	/* DENALI_PHY_888_DATA */
+			0x00000000,	/* DENALI_PHY_889_DATA */
+			0x00000000,	/* DENALI_PHY_890_DATA */
+			0x00000000,	/* DENALI_PHY_891_DATA */
+			0x00000000,	/* DENALI_PHY_892_DATA */
+			0x00000000,	/* DENALI_PHY_893_DATA */
+			0x00000000,	/* DENALI_PHY_894_DATA */
+			0x00000000,	/* DENALI_PHY_895_DATA */
+			0x00000000,	/* DENALI_PHY_896_DATA */
+			0x00000000,	/* DENALI_PHY_897_DATA */
+			0x00000005,	/* DENALI_PHY_898_DATA */
+			0x04000f01,	/* DENALI_PHY_899_DATA */
+			0x00020040,	/* DENALI_PHY_900_DATA */
+			0x00020055,	/* DENALI_PHY_901_DATA */
+			0x00000000,	/* DENALI_PHY_902_DATA */
+			0x00000000,	/* DENALI_PHY_903_DATA */
+			0x00000000,	/* DENALI_PHY_904_DATA */
+			0x00000050,	/* DENALI_PHY_905_DATA */
+			0x00000000,	/* DENALI_PHY_906_DATA */
+			0x01010100,	/* DENALI_PHY_907_DATA */
+			0x00000600,	/* DENALI_PHY_908_DATA */
+			0x00000000,	/* DENALI_PHY_909_DATA */
+			0x00006400,	/* DENALI_PHY_910_DATA */
+			0x03221302,	/* DENALI_PHY_911_DATA */
+			0x00000000,	/* DENALI_PHY_912_DATA */
+			0x000d1f01,	/* DENALI_PHY_913_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_914_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_915_DATA */
+			0x00030003,	/* DENALI_PHY_916_DATA */
+			0x03000300,	/* DENALI_PHY_917_DATA */
+			0x00000300,	/* DENALI_PHY_918_DATA */
+			0x03221302,	/* DENALI_PHY_919_DATA */
+			0x00000000,	/* DENALI_PHY_920_DATA */
+			0x00000000,	/* DENALI_PHY_921_DATA */
+			0x01020000,	/* DENALI_PHY_922_DATA */
+			0x00000001,	/* DENALI_PHY_923_DATA */
+			0x00000411,	/* DENALI_PHY_924_DATA */
+			0x00000411,	/* DENALI_PHY_925_DATA */
+			0x00000040,	/* DENALI_PHY_926_DATA */
+			0x00000040,	/* DENALI_PHY_927_DATA */
+			0x00000411,	/* DENALI_PHY_928_DATA */
+			0x00000411,	/* DENALI_PHY_929_DATA */
+			0x00004410,	/* DENALI_PHY_930_DATA */
+			0x00004410,	/* DENALI_PHY_931_DATA */
+			0x00004410,	/* DENALI_PHY_932_DATA */
+			0x00004410,	/* DENALI_PHY_933_DATA */
+			0x00004410,	/* DENALI_PHY_934_DATA */
+			0x00000411,	/* DENALI_PHY_935_DATA */
+			0x00004410,	/* DENALI_PHY_936_DATA */
+			0x00000411,	/* DENALI_PHY_937_DATA */
+			0x00004410,	/* DENALI_PHY_938_DATA */
+			0x00000411,	/* DENALI_PHY_939_DATA */
+			0x00004410,	/* DENALI_PHY_940_DATA */
+			0x00000000,	/* DENALI_PHY_941_DATA */
+			0x00000000,	/* DENALI_PHY_942_DATA */
+			0x00000000,	/* DENALI_PHY_943_DATA */
+			0x64000000,	/* DENALI_PHY_944_DATA */
+			0x00000000,	/* DENALI_PHY_945_DATA */
+			0x00000000,	/* DENALI_PHY_946_DATA */
+			0x00000408,	/* DENALI_PHY_947_DATA */
+			0x00000000,	/* DENALI_PHY_948_DATA */
+			0x00000000,	/* DENALI_PHY_949_DATA */
+			0x00000000,	/* DENALI_PHY_950_DATA */
+			0x00000000,	/* DENALI_PHY_951_DATA */
+			0x00000000,	/* DENALI_PHY_952_DATA */
+			0x00000000,	/* DENALI_PHY_953_DATA */
+			0xe4000000,	/* DENALI_PHY_954_DATA */
+			0x00000000,	/* DENALI_PHY_955_DATA */
+			0x00000000,	/* DENALI_PHY_956_DATA */
+			0x01010000,	/* DENALI_PHY_957_DATA */
+			0x00000000	/* DENALI_PHY_958_DATA */
+		}
+	},
+},
diff --git a/drivers/ram/rockchip/sdram-rk3399-lpddr4-800.inc b/drivers/ram/rockchip/sdram-rk3399-lpddr4-800.inc
new file mode 100644
index 0000000000..8377e14d7b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-rk3399-lpddr4-800.inc
@@ -0,0 +1,1560 @@
+{
+	{
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x801c1819},
+				{0x10040c05},
+				{0x00000602},
+				{0x00002672},
+				{0x0000004c},
+				0x00000000
+			}
+		},
+		{
+			{
+				.rank = 0x2,
+				.col = 0xA,
+				.bk = 0x3,
+				.bw = 0x2,
+				.dbw = 0x1,
+				.row_3_4 = 0x0,
+				.cs0_row = 0xF,
+				.cs1_row = 0xF,
+				.cs0_high16bit_row = 0xF,
+				.cs1_high16bit_row = 0xF,
+				.ddrconfig = 1,
+			},
+			{
+				{0x801c1819},
+				{0x10040c05},
+				{0x00000602},
+				{0x00002672},
+				{0x0000004c},
+				0x00000000
+			}
+		}
+	},
+	{
+		.ddr_freq = 800*MHZ,
+		.dramtype = LPDDR4,
+		.num_channels = 2,
+		.stride = 13,
+		.odt = 1,
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_CTL_00_DATA */
+			0x00000000,	/* DENALI_CTL_01_DATA */
+			0x00000000,	/* DENALI_CTL_02_DATA */
+			0x00000000,	/* DENALI_CTL_03_DATA */
+			0x00000000,	/* DENALI_CTL_04_DATA */
+			0x00013880,	/* DENALI_CTL_05_DATA */
+			0x000c3500,	/* DENALI_CTL_06_DATA */
+			0x00000005,	/* DENALI_CTL_07_DATA */
+			0x00000320,	/* DENALI_CTL_08_DATA */
+			0x00027100,	/* DENALI_CTL_09_DATA */
+			0x00186a00,	/* DENALI_CTL_10_DATA */
+			0x00000005,	/* DENALI_CTL_11_DATA */
+			0x00000640,	/* DENALI_CTL_12_DATA */
+			0x00002710,	/* DENALI_CTL_13_DATA */
+			0x000186a0,	/* DENALI_CTL_14_DATA */
+			0x00000005,	/* DENALI_CTL_15_DATA */
+			0x01000064,	/* DENALI_CTL_16_DATA */
+			0x00000000,	/* DENALI_CTL_17_DATA */
+			0x02020101,	/* DENALI_CTL_18_DATA */
+			0x00000102,	/* DENALI_CTL_19_DATA */
+			0x00000050,	/* DENALI_CTL_20_DATA */
+			0x000000c8,	/* DENALI_CTL_21_DATA */
+			0x00000000,	/* DENALI_CTL_22_DATA */
+			0x06140000,	/* DENALI_CTL_23_DATA */
+			0x00081c00,	/* DENALI_CTL_24_DATA */
+			0x0400040c,	/* DENALI_CTL_25_DATA */
+			0x19042008,	/* DENALI_CTL_26_DATA */
+			0x10080a11,	/* DENALI_CTL_27_DATA */
+			0x22310800,	/* DENALI_CTL_28_DATA */
+			0x00200f0a,	/* DENALI_CTL_29_DATA */
+			0x0a030704,	/* DENALI_CTL_30_DATA */
+			0x08000204,	/* DENALI_CTL_31_DATA */
+			0x00000a0a,	/* DENALI_CTL_32_DATA */
+			0x04006db0,	/* DENALI_CTL_33_DATA */
+			0x0a0a0804,	/* DENALI_CTL_34_DATA */
+			0x0600db60,	/* DENALI_CTL_35_DATA */
+			0x0a0a0806,	/* DENALI_CTL_36_DATA */
+			0x04000db6,	/* DENALI_CTL_37_DATA */
+			0x02030404,	/* DENALI_CTL_38_DATA */
+			0x0f0a0800,	/* DENALI_CTL_39_DATA */
+			0x08040411,	/* DENALI_CTL_40_DATA */
+			0x1400640a,	/* DENALI_CTL_41_DATA */
+			0x02010a0a,	/* DENALI_CTL_42_DATA */
+			0x00010001,	/* DENALI_CTL_43_DATA */
+			0x04082012,	/* DENALI_CTL_44_DATA */
+			0x00041109,	/* DENALI_CTL_45_DATA */
+			0x00000000,	/* DENALI_CTL_46_DATA */
+			0x03010000,	/* DENALI_CTL_47_DATA */
+			0x06100034,	/* DENALI_CTL_48_DATA */
+			0x0c280068,	/* DENALI_CTL_49_DATA */
+			0x00bb0007,	/* DENALI_CTL_50_DATA */
+			0x00000000,	/* DENALI_CTL_51_DATA */
+			0x00060003,	/* DENALI_CTL_52_DATA */
+			0x000a0003,	/* DENALI_CTL_53_DATA */
+			0x000a0014,	/* DENALI_CTL_54_DATA */
+			0x01000000,	/* DENALI_CTL_55_DATA */
+			0x030a0000,	/* DENALI_CTL_56_DATA */
+			0x0c000002,	/* DENALI_CTL_57_DATA */
+			0x00000103,	/* DENALI_CTL_58_DATA */
+			0x0003030a,	/* DENALI_CTL_59_DATA */
+			0x00060037,	/* DENALI_CTL_60_DATA */
+			0x0003006e,	/* DENALI_CTL_61_DATA */
+			0x05050007,	/* DENALI_CTL_62_DATA */
+			0x03020605,	/* DENALI_CTL_63_DATA */
+			0x06050301,	/* DENALI_CTL_64_DATA */
+			0x06020c05,	/* DENALI_CTL_65_DATA */
+			0x05050302,	/* DENALI_CTL_66_DATA */
+			0x03020305,	/* DENALI_CTL_67_DATA */
+			0x00000301,	/* DENALI_CTL_68_DATA */
+			0x00000301,	/* DENALI_CTL_69_DATA */
+			0x00000001,	/* DENALI_CTL_70_DATA */
+			0x00000000,	/* DENALI_CTL_71_DATA */
+			0x00000000,	/* DENALI_CTL_72_DATA */
+			0x01000000,	/* DENALI_CTL_73_DATA */
+			0x80104002,	/* DENALI_CTL_74_DATA */
+			0x00040003,	/* DENALI_CTL_75_DATA */
+			0x00040005,	/* DENALI_CTL_76_DATA */
+			0x00030000,	/* DENALI_CTL_77_DATA */
+			0x00050004,	/* DENALI_CTL_78_DATA */
+			0x00000004,	/* DENALI_CTL_79_DATA */
+			0x00040003,	/* DENALI_CTL_80_DATA */
+			0x00040005,	/* DENALI_CTL_81_DATA */
+			0x18400000,	/* DENALI_CTL_82_DATA */
+			0x00000c20,	/* DENALI_CTL_83_DATA */
+			0x185030a0,	/* DENALI_CTL_84_DATA */
+			0x02ec0000,	/* DENALI_CTL_85_DATA */
+			0x00000176,	/* DENALI_CTL_86_DATA */
+			0x00000000,	/* DENALI_CTL_87_DATA */
+			0x00000000,	/* DENALI_CTL_88_DATA */
+			0x00000000,	/* DENALI_CTL_89_DATA */
+			0x00000000,	/* DENALI_CTL_90_DATA */
+			0x00000000,	/* DENALI_CTL_91_DATA */
+			0x06030300,	/* DENALI_CTL_92_DATA */
+			0x00030303,	/* DENALI_CTL_93_DATA */
+			0x02030200,	/* DENALI_CTL_94_DATA */
+			0x00040703,	/* DENALI_CTL_95_DATA */
+			0x03020302,	/* DENALI_CTL_96_DATA */
+			0x02000407,	/* DENALI_CTL_97_DATA */
+			0x07030203,	/* DENALI_CTL_98_DATA */
+			0x00030f04,	/* DENALI_CTL_99_DATA */
+			0x00070004,	/* DENALI_CTL_100_DATA */
+			0x00000000,	/* DENALI_CTL_101_DATA */
+			0x00000000,	/* DENALI_CTL_102_DATA */
+			0x00000000,	/* DENALI_CTL_103_DATA */
+			0x00000000,	/* DENALI_CTL_104_DATA */
+			0x00000000,	/* DENALI_CTL_105_DATA */
+			0x00000000,	/* DENALI_CTL_106_DATA */
+			0x00000000,	/* DENALI_CTL_107_DATA */
+			0x00010000,	/* DENALI_CTL_108_DATA */
+			0x20040020,	/* DENALI_CTL_109_DATA */
+			0x00200400,	/* DENALI_CTL_110_DATA */
+			0x01000400,	/* DENALI_CTL_111_DATA */
+			0x00000b80,	/* DENALI_CTL_112_DATA */
+			0x00000000,	/* DENALI_CTL_113_DATA */
+			0x00000001,	/* DENALI_CTL_114_DATA */
+			0x00000002,	/* DENALI_CTL_115_DATA */
+			0x0000000e,	/* DENALI_CTL_116_DATA */
+			0x00000000,	/* DENALI_CTL_117_DATA */
+			0x00000000,	/* DENALI_CTL_118_DATA */
+			0x00000000,	/* DENALI_CTL_119_DATA */
+			0x00000000,	/* DENALI_CTL_120_DATA */
+			0x00000000,	/* DENALI_CTL_121_DATA */
+			0x00500000,	/* DENALI_CTL_122_DATA */
+			0x00640028,	/* DENALI_CTL_123_DATA */
+			0x00640404,	/* DENALI_CTL_124_DATA */
+			0x005000a0,	/* DENALI_CTL_125_DATA */
+			0x060600c8,	/* DENALI_CTL_126_DATA */
+			0x000a00c8,	/* DENALI_CTL_127_DATA */
+			0x000d0005,	/* DENALI_CTL_128_DATA */
+			0x000d0404,	/* DENALI_CTL_129_DATA */
+			0x00000000,	/* DENALI_CTL_130_DATA */
+			0x00000000,	/* DENALI_CTL_131_DATA */
+			0x00000000,	/* DENALI_CTL_132_DATA */
+			0x001400a3,	/* DENALI_CTL_133_DATA */
+			0x00e30009,	/* DENALI_CTL_134_DATA */
+			0x00120024,	/* DENALI_CTL_135_DATA */
+			0x00040063,	/* DENALI_CTL_136_DATA */
+			0x00000000,	/* DENALI_CTL_137_DATA */
+			0x00310031,	/* DENALI_CTL_138_DATA */
+			0x00000031,	/* DENALI_CTL_139_DATA */
+			0x004d0000,	/* DENALI_CTL_140_DATA */
+			0x004d004d,	/* DENALI_CTL_141_DATA */
+			0x004d0000,	/* DENALI_CTL_142_DATA */
+			0x004d004d,	/* DENALI_CTL_143_DATA */
+			0x00010101,	/* DENALI_CTL_144_DATA */
+			0x00000000,	/* DENALI_CTL_145_DATA */
+			0x00000000,	/* DENALI_CTL_146_DATA */
+			0x001400a3,	/* DENALI_CTL_147_DATA */
+			0x00e30009,	/* DENALI_CTL_148_DATA */
+			0x00120024,	/* DENALI_CTL_149_DATA */
+			0x00040063,	/* DENALI_CTL_150_DATA */
+			0x00000000,	/* DENALI_CTL_151_DATA */
+			0x00310031,	/* DENALI_CTL_152_DATA */
+			0x00000031,	/* DENALI_CTL_153_DATA */
+			0x004d0000,	/* DENALI_CTL_154_DATA */
+			0x004d004d,	/* DENALI_CTL_155_DATA */
+			0x004d0000,	/* DENALI_CTL_156_DATA */
+			0x004d004d,	/* DENALI_CTL_157_DATA */
+			0x00010101,	/* DENALI_CTL_158_DATA */
+			0x00000000,	/* DENALI_CTL_159_DATA */
+			0x00000000,	/* DENALI_CTL_160_DATA */
+			0x00000000,	/* DENALI_CTL_161_DATA */
+			0x00000001,	/* DENALI_CTL_162_DATA */
+			0x00000000,	/* DENALI_CTL_163_DATA */
+			0x18151100,	/* DENALI_CTL_164_DATA */
+			0x0000000c,	/* DENALI_CTL_165_DATA */
+			0x00000000,	/* DENALI_CTL_166_DATA */
+			0x00000000,	/* DENALI_CTL_167_DATA */
+			0x00000000,	/* DENALI_CTL_168_DATA */
+			0x00000000,	/* DENALI_CTL_169_DATA */
+			0x00000000,	/* DENALI_CTL_170_DATA */
+			0x00000000,	/* DENALI_CTL_171_DATA */
+			0x00000000,	/* DENALI_CTL_172_DATA */
+			0x00000000,	/* DENALI_CTL_173_DATA */
+			0x00000000,	/* DENALI_CTL_174_DATA */
+			0x00000000,	/* DENALI_CTL_175_DATA */
+			0x00000000,	/* DENALI_CTL_176_DATA */
+			0x00000000,	/* DENALI_CTL_177_DATA */
+			0x00000000,	/* DENALI_CTL_178_DATA */
+			0x00020003,	/* DENALI_CTL_179_DATA */
+			0x00400100,	/* DENALI_CTL_180_DATA */
+			0x000c0190,	/* DENALI_CTL_181_DATA */
+			0x01000200,	/* DENALI_CTL_182_DATA */
+			0x03200040,	/* DENALI_CTL_183_DATA */
+			0x00020018,	/* DENALI_CTL_184_DATA */
+			0x00400100,	/* DENALI_CTL_185_DATA */
+			0x00080032,	/* DENALI_CTL_186_DATA */
+			0x00140000,	/* DENALI_CTL_187_DATA */
+			0x00030028,	/* DENALI_CTL_188_DATA */
+			0x01010100,	/* DENALI_CTL_189_DATA */
+			0x02000202,	/* DENALI_CTL_190_DATA */
+			0x0b000002,	/* DENALI_CTL_191_DATA */
+			0x01000f0f,	/* DENALI_CTL_192_DATA */
+			0x00000000,	/* DENALI_CTL_193_DATA */
+			0x00000000,	/* DENALI_CTL_194_DATA */
+			0x00010003,	/* DENALI_CTL_195_DATA */
+			0x00000c03,	/* DENALI_CTL_196_DATA */
+			0x00040101,	/* DENALI_CTL_197_DATA */
+			0x04010100,	/* DENALI_CTL_198_DATA */
+			0x01000000,	/* DENALI_CTL_199_DATA */
+			0x02010000,	/* DENALI_CTL_200_DATA */
+			0x00000001,	/* DENALI_CTL_201_DATA */
+			0x00000000,	/* DENALI_CTL_202_DATA */
+			0x00000000,	/* DENALI_CTL_203_DATA */
+			0x00000000,	/* DENALI_CTL_204_DATA */
+			0x00000000,	/* DENALI_CTL_205_DATA */
+			0x00000000,	/* DENALI_CTL_206_DATA */
+			0x00000000,	/* DENALI_CTL_207_DATA */
+			0x00000000,	/* DENALI_CTL_208_DATA */
+			0x00000000,	/* DENALI_CTL_209_DATA */
+			0x00000000,	/* DENALI_CTL_210_DATA */
+			0x00010000,	/* DENALI_CTL_211_DATA */
+			0x00000001,	/* DENALI_CTL_212_DATA */
+			0x01010001,	/* DENALI_CTL_213_DATA */
+			0x05040001,	/* DENALI_CTL_214_DATA */
+			0x040a0703,	/* DENALI_CTL_215_DATA */
+			0x02080808,	/* DENALI_CTL_216_DATA */
+			0x020e000a,	/* DENALI_CTL_217_DATA */
+			0x020f010b,	/* DENALI_CTL_218_DATA */
+			0x000d0008,	/* DENALI_CTL_219_DATA */
+			0x00080b0a,	/* DENALI_CTL_220_DATA */
+			0x03000200,	/* DENALI_CTL_221_DATA */
+			0x00000100,	/* DENALI_CTL_222_DATA */
+			0x00000000,	/* DENALI_CTL_223_DATA */
+			0x00000000,	/* DENALI_CTL_224_DATA */
+			0x0d000001,	/* DENALI_CTL_225_DATA */
+			0x00000028,	/* DENALI_CTL_226_DATA */
+			0x00010000,	/* DENALI_CTL_227_DATA */
+			0x00000003,	/* DENALI_CTL_228_DATA */
+			0x00000000,	/* DENALI_CTL_229_DATA */
+			0x00000000,	/* DENALI_CTL_230_DATA */
+			0x00000000,	/* DENALI_CTL_231_DATA */
+			0x00000000,	/* DENALI_CTL_232_DATA */
+			0x00000000,	/* DENALI_CTL_233_DATA */
+			0x00000000,	/* DENALI_CTL_234_DATA */
+			0x00000000,	/* DENALI_CTL_235_DATA */
+			0x00000000,	/* DENALI_CTL_236_DATA */
+			0x00010100,	/* DENALI_CTL_237_DATA */
+			0x01000000,	/* DENALI_CTL_238_DATA */
+			0x00000001,	/* DENALI_CTL_239_DATA */
+			0x00000303,	/* DENALI_CTL_240_DATA */
+			0x00000000,	/* DENALI_CTL_241_DATA */
+			0x00000000,	/* DENALI_CTL_242_DATA */
+			0x00000000,	/* DENALI_CTL_243_DATA */
+			0x00000000,	/* DENALI_CTL_244_DATA */
+			0x00000000,	/* DENALI_CTL_245_DATA */
+			0x00000000,	/* DENALI_CTL_246_DATA */
+			0x00000000,	/* DENALI_CTL_247_DATA */
+			0x00000000,	/* DENALI_CTL_248_DATA */
+			0x00000000,	/* DENALI_CTL_249_DATA */
+			0x00000000,	/* DENALI_CTL_250_DATA */
+			0x00000000,	/* DENALI_CTL_251_DATA */
+			0x00000000,	/* DENALI_CTL_252_DATA */
+			0x00000000,	/* DENALI_CTL_253_DATA */
+			0x00000000,	/* DENALI_CTL_254_DATA */
+			0x00000000,	/* DENALI_CTL_255_DATA */
+			0x000556aa,	/* DENALI_CTL_256_DATA */
+			0x000aaaaa,	/* DENALI_CTL_257_DATA */
+			0x000aa955,	/* DENALI_CTL_258_DATA */
+			0x00055555,	/* DENALI_CTL_259_DATA */
+			0x000b3133,	/* DENALI_CTL_260_DATA */
+			0x0004cd33,	/* DENALI_CTL_261_DATA */
+			0x0004cecc,	/* DENALI_CTL_262_DATA */
+			0x000b32cc,	/* DENALI_CTL_263_DATA */
+			0x00010300,	/* DENALI_CTL_264_DATA */
+			0x03000100,	/* DENALI_CTL_265_DATA */
+			0x00000000,	/* DENALI_CTL_266_DATA */
+			0x00000000,	/* DENALI_CTL_267_DATA */
+			0x00000000,	/* DENALI_CTL_268_DATA */
+			0x00000000,	/* DENALI_CTL_269_DATA */
+			0x00000000,	/* DENALI_CTL_270_DATA */
+			0x00000000,	/* DENALI_CTL_271_DATA */
+			0x00000000,	/* DENALI_CTL_272_DATA */
+			0x00000000,	/* DENALI_CTL_273_DATA */
+			0x00ffff00,	/* DENALI_CTL_274_DATA */
+			0x1a160000,	/* DENALI_CTL_275_DATA */
+			0x08000012,	/* DENALI_CTL_276_DATA */
+			0x00000c20,	/* DENALI_CTL_277_DATA */
+			0x00000200,	/* DENALI_CTL_278_DATA */
+			0x00000200,	/* DENALI_CTL_279_DATA */
+			0x00000200,	/* DENALI_CTL_280_DATA */
+			0x00000200,	/* DENALI_CTL_281_DATA */
+			0x00000c20,	/* DENALI_CTL_282_DATA */
+			0x00007940,	/* DENALI_CTL_283_DATA */
+			0x18500409,	/* DENALI_CTL_284_DATA */
+			0x00000200,	/* DENALI_CTL_285_DATA */
+			0x00000200,	/* DENALI_CTL_286_DATA */
+			0x00000200,	/* DENALI_CTL_287_DATA */
+			0x00000200,	/* DENALI_CTL_288_DATA */
+			0x00001850,	/* DENALI_CTL_289_DATA */
+			0x0000f320,	/* DENALI_CTL_290_DATA */
+			0x0176060c,	/* DENALI_CTL_291_DATA */
+			0x00000200,	/* DENALI_CTL_292_DATA */
+			0x00000200,	/* DENALI_CTL_293_DATA */
+			0x00000200,	/* DENALI_CTL_294_DATA */
+			0x00000200,	/* DENALI_CTL_295_DATA */
+			0x00000176,	/* DENALI_CTL_296_DATA */
+			0x00000e9c,	/* DENALI_CTL_297_DATA */
+			0x02020205,	/* DENALI_CTL_298_DATA */
+			0x03030202,	/* DENALI_CTL_299_DATA */
+			0x00000018,	/* DENALI_CTL_300_DATA */
+			0x00000000,	/* DENALI_CTL_301_DATA */
+			0x00000000,	/* DENALI_CTL_302_DATA */
+			0x00001403,	/* DENALI_CTL_303_DATA */
+			0x00000000,	/* DENALI_CTL_304_DATA */
+			0x00000000,	/* DENALI_CTL_305_DATA */
+			0x00000000,	/* DENALI_CTL_306_DATA */
+			0x00030000,	/* DENALI_CTL_307_DATA */
+			0x000a001c,	/* DENALI_CTL_308_DATA */
+			0x000e0020,	/* DENALI_CTL_309_DATA */
+			0x00060018,	/* DENALI_CTL_310_DATA */
+			0x00000000,	/* DENALI_CTL_311_DATA */
+			0x00000000,	/* DENALI_CTL_312_DATA */
+			0x02000000,	/* DENALI_CTL_313_DATA */
+			0x00090305,	/* DENALI_CTL_314_DATA */
+			0x00050101,	/* DENALI_CTL_315_DATA */
+			0x00000000,	/* DENALI_CTL_316_DATA */
+			0x00000000,	/* DENALI_CTL_317_DATA */
+			0x00000000,	/* DENALI_CTL_318_DATA */
+			0x00000000,	/* DENALI_CTL_319_DATA */
+			0x00000000,	/* DENALI_CTL_320_DATA */
+			0x00000000,	/* DENALI_CTL_321_DATA */
+			0x00000000,	/* DENALI_CTL_322_DATA */
+			0x00000000,	/* DENALI_CTL_323_DATA */
+			0x01000001,	/* DENALI_CTL_324_DATA */
+			0x01010101,	/* DENALI_CTL_325_DATA */
+			0x01000101,	/* DENALI_CTL_326_DATA */
+			0x01000100,	/* DENALI_CTL_327_DATA */
+			0x00010001,	/* DENALI_CTL_328_DATA */
+			0x00010002,	/* DENALI_CTL_329_DATA */
+			0x00020100,	/* DENALI_CTL_330_DATA */
+			0x00000002	/* DENALI_CTL_331_DATA */
+		}
+	},
+	{
+		{
+			0x00000b00,	/* DENALI_PI_00_DATA */
+			0x00000000,	/* DENALI_PI_01_DATA */
+			0x000002ec,	/* DENALI_PI_02_DATA */
+			0x00000176,	/* DENALI_PI_03_DATA */
+			0x000030a0,	/* DENALI_PI_04_DATA */
+			0x00001850,	/* DENALI_PI_05_DATA */
+			0x00001840,	/* DENALI_PI_06_DATA */
+			0x01760c20,	/* DENALI_PI_07_DATA */
+			0x00000200,	/* DENALI_PI_08_DATA */
+			0x00000200,	/* DENALI_PI_09_DATA */
+			0x00000200,	/* DENALI_PI_10_DATA */
+			0x00000200,	/* DENALI_PI_11_DATA */
+			0x00001850,	/* DENALI_PI_12_DATA */
+			0x00000200,	/* DENALI_PI_13_DATA */
+			0x00000200,	/* DENALI_PI_14_DATA */
+			0x00000200,	/* DENALI_PI_15_DATA */
+			0x00000200,	/* DENALI_PI_16_DATA */
+			0x00000c20,	/* DENALI_PI_17_DATA */
+			0x00000200,	/* DENALI_PI_18_DATA */
+			0x00000200,	/* DENALI_PI_19_DATA */
+			0x00000200,	/* DENALI_PI_20_DATA */
+			0x00000200,	/* DENALI_PI_21_DATA */
+			0x00010000,	/* DENALI_PI_22_DATA */
+			0x00000007,	/* DENALI_PI_23_DATA */
+			0x01000001,	/* DENALI_PI_24_DATA */
+			0x00000000,	/* DENALI_PI_25_DATA */
+			0x3fffffff,	/* DENALI_PI_26_DATA */
+			0x00000000,	/* DENALI_PI_27_DATA */
+			0x00000000,	/* DENALI_PI_28_DATA */
+			0x00000000,	/* DENALI_PI_29_DATA */
+			0x00000000,	/* DENALI_PI_30_DATA */
+			0x00000000,	/* DENALI_PI_31_DATA */
+			0x00000000,	/* DENALI_PI_32_DATA */
+			0x00000000,	/* DENALI_PI_33_DATA */
+			0x00000000,	/* DENALI_PI_34_DATA */
+			0x00000000,	/* DENALI_PI_35_DATA */
+			0x00000000,	/* DENALI_PI_36_DATA */
+			0x00000000,	/* DENALI_PI_37_DATA */
+			0x00000000,	/* DENALI_PI_38_DATA */
+			0x00000000,	/* DENALI_PI_39_DATA */
+			0x00000000,	/* DENALI_PI_40_DATA */
+			0x0f000101,	/* DENALI_PI_41_DATA */
+			0x082b3223,	/* DENALI_PI_42_DATA */
+			0x080c0004,	/* DENALI_PI_43_DATA */
+			0x00061c00,	/* DENALI_PI_44_DATA */
+			0x00000214,	/* DENALI_PI_45_DATA */
+			0x00bb0007,	/* DENALI_PI_46_DATA */
+			0x0c280068,	/* DENALI_PI_47_DATA */
+			0x06100034,	/* DENALI_PI_48_DATA */
+			0x00000500,	/* DENALI_PI_49_DATA */
+			0x00000000,	/* DENALI_PI_50_DATA */
+			0x00000000,	/* DENALI_PI_51_DATA */
+			0x00000000,	/* DENALI_PI_52_DATA */
+			0x00000000,	/* DENALI_PI_53_DATA */
+			0x00000000,	/* DENALI_PI_54_DATA */
+			0x00000000,	/* DENALI_PI_55_DATA */
+			0x00000000,	/* DENALI_PI_56_DATA */
+			0x00000000,	/* DENALI_PI_57_DATA */
+			0x04040100,	/* DENALI_PI_58_DATA */
+			0x0a000004,	/* DENALI_PI_59_DATA */
+			0x00000128,	/* DENALI_PI_60_DATA */
+			0x00000000,	/* DENALI_PI_61_DATA */
+			0x0003000f,	/* DENALI_PI_62_DATA */
+			0x00000018,	/* DENALI_PI_63_DATA */
+			0x00000000,	/* DENALI_PI_64_DATA */
+			0x00000000,	/* DENALI_PI_65_DATA */
+			0x00060002,	/* DENALI_PI_66_DATA */
+			0x00010001,	/* DENALI_PI_67_DATA */
+			0x00000101,	/* DENALI_PI_68_DATA */
+			0x00020001,	/* DENALI_PI_69_DATA */
+			0x00080004,	/* DENALI_PI_70_DATA */
+			0x00000000,	/* DENALI_PI_71_DATA */
+			0x05030000,	/* DENALI_PI_72_DATA */
+			0x070a0404,	/* DENALI_PI_73_DATA */
+			0x00000000,	/* DENALI_PI_74_DATA */
+			0x00000000,	/* DENALI_PI_75_DATA */
+			0x00000000,	/* DENALI_PI_76_DATA */
+			0x000f0f00,	/* DENALI_PI_77_DATA */
+			0x0000001e,	/* DENALI_PI_78_DATA */
+			0x00000000,	/* DENALI_PI_79_DATA */
+			0x01010300,	/* DENALI_PI_80_DATA */
+			0x00000000,	/* DENALI_PI_81_DATA */
+			0x00000000,	/* DENALI_PI_82_DATA */
+			0x01000000,	/* DENALI_PI_83_DATA */
+			0x00000101,	/* DENALI_PI_84_DATA */
+			0x55555a5a,	/* DENALI_PI_85_DATA */
+			0x55555a5a,	/* DENALI_PI_86_DATA */
+			0x55555a5a,	/* DENALI_PI_87_DATA */
+			0x55555a5a,	/* DENALI_PI_88_DATA */
+			0x0c050001,	/* DENALI_PI_89_DATA */
+			0x06020009,	/* DENALI_PI_90_DATA */
+			0x00010004,	/* DENALI_PI_91_DATA */
+			0x00000203,	/* DENALI_PI_92_DATA */
+			0x00030000,	/* DENALI_PI_93_DATA */
+			0x170f0000,	/* DENALI_PI_94_DATA */
+			0x00060018,	/* DENALI_PI_95_DATA */
+			0x000e0020,	/* DENALI_PI_96_DATA */
+			0x000a001c,	/* DENALI_PI_97_DATA */
+			0x00000000,	/* DENALI_PI_98_DATA */
+			0x00000000,	/* DENALI_PI_99_DATA */
+			0x00000100,	/* DENALI_PI_100_DATA */
+			0x140a0000,	/* DENALI_PI_101_DATA */
+			0x000d010a,	/* DENALI_PI_102_DATA */
+			0x0100c802,	/* DENALI_PI_103_DATA */
+			0x010a0064,	/* DENALI_PI_104_DATA */
+			0x000e0100,	/* DENALI_PI_105_DATA */
+			0x0100000e,	/* DENALI_PI_106_DATA */
+			0x00c900c9,	/* DENALI_PI_107_DATA */
+			0x00650100,	/* DENALI_PI_108_DATA */
+			0x1e1a0065,	/* DENALI_PI_109_DATA */
+			0x10010204,	/* DENALI_PI_110_DATA */
+			0x06070605,	/* DENALI_PI_111_DATA */
+			0x20000202,	/* DENALI_PI_112_DATA */
+			0x00201000,	/* DENALI_PI_113_DATA */
+			0x00201000,	/* DENALI_PI_114_DATA */
+			0x04041000,	/* DENALI_PI_115_DATA */
+			0x10020100,	/* DENALI_PI_116_DATA */
+			0x0003010c,	/* DENALI_PI_117_DATA */
+			0x004b004a,	/* DENALI_PI_118_DATA */
+			0x1a0f0000,	/* DENALI_PI_119_DATA */
+			0x0102041e,	/* DENALI_PI_120_DATA */
+			0x34000000,	/* DENALI_PI_121_DATA */
+			0x00000000,	/* DENALI_PI_122_DATA */
+			0x00000000,	/* DENALI_PI_123_DATA */
+			0x00010000,	/* DENALI_PI_124_DATA */
+			0x00000400,	/* DENALI_PI_125_DATA */
+			0x00310000,	/* DENALI_PI_126_DATA */
+			0x004d4d00,	/* DENALI_PI_127_DATA */
+			0x00120024,	/* DENALI_PI_128_DATA */
+			0x4d000031,	/* DENALI_PI_129_DATA */
+			0x0000144d,	/* DENALI_PI_130_DATA */
+			0x00310009,	/* DENALI_PI_131_DATA */
+			0x004d4d00,	/* DENALI_PI_132_DATA */
+			0x00000004,	/* DENALI_PI_133_DATA */
+			0x4d000031,	/* DENALI_PI_134_DATA */
+			0x0000244d,	/* DENALI_PI_135_DATA */
+			0x00310012,	/* DENALI_PI_136_DATA */
+			0x004d4d00,	/* DENALI_PI_137_DATA */
+			0x00090014,	/* DENALI_PI_138_DATA */
+			0x4d000031,	/* DENALI_PI_139_DATA */
+			0x0004004d,	/* DENALI_PI_140_DATA */
+			0x00310000,	/* DENALI_PI_141_DATA */
+			0x004d4d00,	/* DENALI_PI_142_DATA */
+			0x00120024,	/* DENALI_PI_143_DATA */
+			0x4d000031,	/* DENALI_PI_144_DATA */
+			0x0000144d,	/* DENALI_PI_145_DATA */
+			0x00310009,	/* DENALI_PI_146_DATA */
+			0x004d4d00,	/* DENALI_PI_147_DATA */
+			0x00000004,	/* DENALI_PI_148_DATA */
+			0x4d000031,	/* DENALI_PI_149_DATA */
+			0x0000244d,	/* DENALI_PI_150_DATA */
+			0x00310012,	/* DENALI_PI_151_DATA */
+			0x004d4d00,	/* DENALI_PI_152_DATA */
+			0x00090014,	/* DENALI_PI_153_DATA */
+			0x4d000031,	/* DENALI_PI_154_DATA */
+			0x0200004d,	/* DENALI_PI_155_DATA */
+			0x00c8000d,	/* DENALI_PI_156_DATA */
+			0x08080064,	/* DENALI_PI_157_DATA */
+			0x040a0404,	/* DENALI_PI_158_DATA */
+			0x03000d92,	/* DENALI_PI_159_DATA */
+			0x010a2001,	/* DENALI_PI_160_DATA */
+			0x0f11080a,	/* DENALI_PI_161_DATA */
+			0x0000110a,	/* DENALI_PI_162_DATA */
+			0x2200d92e,	/* DENALI_PI_163_DATA */
+			0x080c2003,	/* DENALI_PI_164_DATA */
+			0x0809080a,	/* DENALI_PI_165_DATA */
+			0x00000a0a,	/* DENALI_PI_166_DATA */
+			0x11006c97,	/* DENALI_PI_167_DATA */
+			0x040a2002,	/* DENALI_PI_168_DATA */
+			0x0200020a,	/* DENALI_PI_169_DATA */
+			0x02000200,	/* DENALI_PI_170_DATA */
+			0x02000200,	/* DENALI_PI_171_DATA */
+			0x02000200,	/* DENALI_PI_172_DATA */
+			0x02000200,	/* DENALI_PI_173_DATA */
+			0x00000000,	/* DENALI_PI_174_DATA */
+			0x00000000,	/* DENALI_PI_175_DATA */
+			0x00000000,	/* DENALI_PI_176_DATA */
+			0x00000000,	/* DENALI_PI_177_DATA */
+			0x00000000,	/* DENALI_PI_178_DATA */
+			0x00000000,	/* DENALI_PI_179_DATA */
+			0x00000000,	/* DENALI_PI_180_DATA */
+			0x00000000,	/* DENALI_PI_181_DATA */
+			0x00000000,	/* DENALI_PI_182_DATA */
+			0x00000000,	/* DENALI_PI_183_DATA */
+			0x00000000,	/* DENALI_PI_184_DATA */
+			0x00000000,	/* DENALI_PI_185_DATA */
+			0x01000400,	/* DENALI_PI_186_DATA */
+			0x00017600,	/* DENALI_PI_187_DATA */
+			0x00000e9c,	/* DENALI_PI_188_DATA */
+			0x00001850,	/* DENALI_PI_189_DATA */
+			0x0000f320,	/* DENALI_PI_190_DATA */
+			0x00000c20,	/* DENALI_PI_191_DATA */
+			0x00007940,	/* DENALI_PI_192_DATA */
+			0x08000000,	/* DENALI_PI_193_DATA */
+			0x00000100,	/* DENALI_PI_194_DATA */
+			0x00000000,	/* DENALI_PI_195_DATA */
+			0x00000000,	/* DENALI_PI_196_DATA */
+			0x00000000,	/* DENALI_PI_197_DATA */
+			0x00000000,	/* DENALI_PI_198_DATA */
+			0x00000002	/* DENALI_PI_199_DATA */
+		}
+	},
+	{
+		{
+			0x76543210,	/* DENALI_PHY_00_DATA */
+			0x0004f008,	/* DENALI_PHY_01_DATA */
+			0x00020119,	/* DENALI_PHY_02_DATA */
+			0x00000000,	/* DENALI_PHY_03_DATA */
+			0x00000000,	/* DENALI_PHY_04_DATA */
+			0x00010000,	/* DENALI_PHY_05_DATA */
+			0x01665555,	/* DENALI_PHY_06_DATA */
+			0x03665555,	/* DENALI_PHY_07_DATA */
+			0x00010f00,	/* DENALI_PHY_08_DATA */
+			0x05010200,	/* DENALI_PHY_09_DATA */
+			0x00000002,	/* DENALI_PHY_10_DATA */
+			0x00170180,	/* DENALI_PHY_11_DATA */
+			0x00cc0201,	/* DENALI_PHY_12_DATA */
+			0x00030066,	/* DENALI_PHY_13_DATA */
+			0x00000000,	/* DENALI_PHY_14_DATA */
+			0x00000000,	/* DENALI_PHY_15_DATA */
+			0x00000000,	/* DENALI_PHY_16_DATA */
+			0x00000000,	/* DENALI_PHY_17_DATA */
+			0x00000000,	/* DENALI_PHY_18_DATA */
+			0x00000000,	/* DENALI_PHY_19_DATA */
+			0x00000000,	/* DENALI_PHY_20_DATA */
+			0x00000000,	/* DENALI_PHY_21_DATA */
+			0x04080000,	/* DENALI_PHY_22_DATA */
+			0x04080400,	/* DENALI_PHY_23_DATA */
+			0x30000000,	/* DENALI_PHY_24_DATA */
+			0x0c00c007,	/* DENALI_PHY_25_DATA */
+			0x00000100,	/* DENALI_PHY_26_DATA */
+			0x00000000,	/* DENALI_PHY_27_DATA */
+			0xfd02fe01,	/* DENALI_PHY_28_DATA */
+			0xf708fb04,	/* DENALI_PHY_29_DATA */
+			0xdf20ef10,	/* DENALI_PHY_30_DATA */
+			0x7f80bf40,	/* DENALI_PHY_31_DATA */
+			0x0001aaaa,	/* DENALI_PHY_32_DATA */
+			0x00000000,	/* DENALI_PHY_33_DATA */
+			0x00000000,	/* DENALI_PHY_34_DATA */
+			0x00000000,	/* DENALI_PHY_35_DATA */
+			0x00000000,	/* DENALI_PHY_36_DATA */
+			0x00000000,	/* DENALI_PHY_37_DATA */
+			0x00000000,	/* DENALI_PHY_38_DATA */
+			0x00000000,	/* DENALI_PHY_39_DATA */
+			0x00000000,	/* DENALI_PHY_40_DATA */
+			0x00000000,	/* DENALI_PHY_41_DATA */
+			0x00000000,	/* DENALI_PHY_42_DATA */
+			0x00000000,	/* DENALI_PHY_43_DATA */
+			0x00000000,	/* DENALI_PHY_44_DATA */
+			0x00000000,	/* DENALI_PHY_45_DATA */
+			0x00000000,	/* DENALI_PHY_46_DATA */
+			0x00000000,	/* DENALI_PHY_47_DATA */
+			0x00000000,	/* DENALI_PHY_48_DATA */
+			0x00000000,	/* DENALI_PHY_49_DATA */
+			0x00000000,	/* DENALI_PHY_50_DATA */
+			0x00000000,	/* DENALI_PHY_51_DATA */
+			0x00200000,	/* DENALI_PHY_52_DATA */
+			0x00000000,	/* DENALI_PHY_53_DATA */
+			0x00000000,	/* DENALI_PHY_54_DATA */
+			0x00000000,	/* DENALI_PHY_55_DATA */
+			0x00000000,	/* DENALI_PHY_56_DATA */
+			0x00000000,	/* DENALI_PHY_57_DATA */
+			0x00000000,	/* DENALI_PHY_58_DATA */
+			0x02800280,	/* DENALI_PHY_59_DATA */
+			0x02800280,	/* DENALI_PHY_60_DATA */
+			0x02800280,	/* DENALI_PHY_61_DATA */
+			0x02800280,	/* DENALI_PHY_62_DATA */
+			0x00000280,	/* DENALI_PHY_63_DATA */
+			0x00000000,	/* DENALI_PHY_64_DATA */
+			0x00000000,	/* DENALI_PHY_65_DATA */
+			0x00000000,	/* DENALI_PHY_66_DATA */
+			0x00000000,	/* DENALI_PHY_67_DATA */
+			0x00800000,	/* DENALI_PHY_68_DATA */
+			0x00800080,	/* DENALI_PHY_69_DATA */
+			0x00800080,	/* DENALI_PHY_70_DATA */
+			0x00800080,	/* DENALI_PHY_71_DATA */
+			0x00800080,	/* DENALI_PHY_72_DATA */
+			0x00800080,	/* DENALI_PHY_73_DATA */
+			0x00800080,	/* DENALI_PHY_74_DATA */
+			0x00800080,	/* DENALI_PHY_75_DATA */
+			0x00800080,	/* DENALI_PHY_76_DATA */
+			0x01190080,	/* DENALI_PHY_77_DATA */
+			0x00000002,	/* DENALI_PHY_78_DATA */
+			0x00000000,	/* DENALI_PHY_79_DATA */
+			0x00000000,	/* DENALI_PHY_80_DATA */
+			0x00000200,	/* DENALI_PHY_81_DATA */
+			0x00000000,	/* DENALI_PHY_82_DATA */
+			0x51315152,	/* DENALI_PHY_83_DATA */
+			0xc0013150,	/* DENALI_PHY_84_DATA */
+			0x020000c0,	/* DENALI_PHY_85_DATA */
+			0x00100001,	/* DENALI_PHY_86_DATA */
+			0x07054204,	/* DENALI_PHY_87_DATA */
+			0x000f0c18,	/* DENALI_PHY_88_DATA */
+			0x01000140,	/* DENALI_PHY_89_DATA */
+			0x00000c10,	/* DENALI_PHY_90_DATA */
+			0x00000000,	/* DENALI_PHY_91_DATA */
+			0x00000000,	/* DENALI_PHY_92_DATA */
+			0x00000000,	/* DENALI_PHY_93_DATA */
+			0x00000000,	/* DENALI_PHY_94_DATA */
+			0x00000000,	/* DENALI_PHY_95_DATA */
+			0x00000000,	/* DENALI_PHY_96_DATA */
+			0x00000000,	/* DENALI_PHY_97_DATA */
+			0x00000000,	/* DENALI_PHY_98_DATA */
+			0x00000000,	/* DENALI_PHY_99_DATA */
+			0x00000000,	/* DENALI_PHY_100_DATA */
+			0x00000000,	/* DENALI_PHY_101_DATA */
+			0x00000000,	/* DENALI_PHY_102_DATA */
+			0x00000000,	/* DENALI_PHY_103_DATA */
+			0x00000000,	/* DENALI_PHY_104_DATA */
+			0x00000000,	/* DENALI_PHY_105_DATA */
+			0x00000000,	/* DENALI_PHY_106_DATA */
+			0x00000000,	/* DENALI_PHY_107_DATA */
+			0x00000000,	/* DENALI_PHY_108_DATA */
+			0x00000000,	/* DENALI_PHY_109_DATA */
+			0x00000000,	/* DENALI_PHY_110_DATA */
+			0x00000000,	/* DENALI_PHY_111_DATA */
+			0x00000000,	/* DENALI_PHY_112_DATA */
+			0x00000000,	/* DENALI_PHY_113_DATA */
+			0x00000000,	/* DENALI_PHY_114_DATA */
+			0x00000000,	/* DENALI_PHY_115_DATA */
+			0x00000000,	/* DENALI_PHY_116_DATA */
+			0x00000000,	/* DENALI_PHY_117_DATA */
+			0x00000000,	/* DENALI_PHY_118_DATA */
+			0x00000000,	/* DENALI_PHY_119_DATA */
+			0x00000000,	/* DENALI_PHY_120_DATA */
+			0x00000000,	/* DENALI_PHY_121_DATA */
+			0x00000000,	/* DENALI_PHY_122_DATA */
+			0x00000000,	/* DENALI_PHY_123_DATA */
+			0x00000000,	/* DENALI_PHY_124_DATA */
+			0x00000000,	/* DENALI_PHY_125_DATA */
+			0x00000000,	/* DENALI_PHY_126_DATA */
+			0x00000000,	/* DENALI_PHY_127_DATA */
+			0x76543210,	/* DENALI_PHY_128_DATA */
+			0x0004f008,	/* DENALI_PHY_129_DATA */
+			0x00020119,	/* DENALI_PHY_130_DATA */
+			0x00000000,	/* DENALI_PHY_131_DATA */
+			0x00000000,	/* DENALI_PHY_132_DATA */
+			0x00010000,	/* DENALI_PHY_133_DATA */
+			0x01665555,	/* DENALI_PHY_134_DATA */
+			0x03665555,	/* DENALI_PHY_135_DATA */
+			0x00010f00,	/* DENALI_PHY_136_DATA */
+			0x05010200,	/* DENALI_PHY_137_DATA */
+			0x00000002,	/* DENALI_PHY_138_DATA */
+			0x00170180,	/* DENALI_PHY_139_DATA */
+			0x00cc0201,	/* DENALI_PHY_140_DATA */
+			0x00030066,	/* DENALI_PHY_141_DATA */
+			0x00000000,	/* DENALI_PHY_142_DATA */
+			0x00000000,	/* DENALI_PHY_143_DATA */
+			0x00000000,	/* DENALI_PHY_144_DATA */
+			0x00000000,	/* DENALI_PHY_145_DATA */
+			0x00000000,	/* DENALI_PHY_146_DATA */
+			0x00000000,	/* DENALI_PHY_147_DATA */
+			0x00000000,	/* DENALI_PHY_148_DATA */
+			0x00000000,	/* DENALI_PHY_149_DATA */
+			0x04080000,	/* DENALI_PHY_150_DATA */
+			0x04080400,	/* DENALI_PHY_151_DATA */
+			0x30000000,	/* DENALI_PHY_152_DATA */
+			0x0c00c007,	/* DENALI_PHY_153_DATA */
+			0x00000100,	/* DENALI_PHY_154_DATA */
+			0x00000000,	/* DENALI_PHY_155_DATA */
+			0xfd02fe01,	/* DENALI_PHY_156_DATA */
+			0xf708fb04,	/* DENALI_PHY_157_DATA */
+			0xdf20ef10,	/* DENALI_PHY_158_DATA */
+			0x7f80bf40,	/* DENALI_PHY_159_DATA */
+			0x0000aaaa,	/* DENALI_PHY_160_DATA */
+			0x00000000,	/* DENALI_PHY_161_DATA */
+			0x00000000,	/* DENALI_PHY_162_DATA */
+			0x00000000,	/* DENALI_PHY_163_DATA */
+			0x00000000,	/* DENALI_PHY_164_DATA */
+			0x00000000,	/* DENALI_PHY_165_DATA */
+			0x00000000,	/* DENALI_PHY_166_DATA */
+			0x00000000,	/* DENALI_PHY_167_DATA */
+			0x00000000,	/* DENALI_PHY_168_DATA */
+			0x00000000,	/* DENALI_PHY_169_DATA */
+			0x00000000,	/* DENALI_PHY_170_DATA */
+			0x00000000,	/* DENALI_PHY_171_DATA */
+			0x00000000,	/* DENALI_PHY_172_DATA */
+			0x00000000,	/* DENALI_PHY_173_DATA */
+			0x00000000,	/* DENALI_PHY_174_DATA */
+			0x00000000,	/* DENALI_PHY_175_DATA */
+			0x00000000,	/* DENALI_PHY_176_DATA */
+			0x00000000,	/* DENALI_PHY_177_DATA */
+			0x00000000,	/* DENALI_PHY_178_DATA */
+			0x00000000,	/* DENALI_PHY_179_DATA */
+			0x00200000,	/* DENALI_PHY_180_DATA */
+			0x00000000,	/* DENALI_PHY_181_DATA */
+			0x00000000,	/* DENALI_PHY_182_DATA */
+			0x00000000,	/* DENALI_PHY_183_DATA */
+			0x00000000,	/* DENALI_PHY_184_DATA */
+			0x00000000,	/* DENALI_PHY_185_DATA */
+			0x00000000,	/* DENALI_PHY_186_DATA */
+			0x02800280,	/* DENALI_PHY_187_DATA */
+			0x02800280,	/* DENALI_PHY_188_DATA */
+			0x02800280,	/* DENALI_PHY_189_DATA */
+			0x02800280,	/* DENALI_PHY_190_DATA */
+			0x00000280,	/* DENALI_PHY_191_DATA */
+			0x00000000,	/* DENALI_PHY_192_DATA */
+			0x00000000,	/* DENALI_PHY_193_DATA */
+			0x00000000,	/* DENALI_PHY_194_DATA */
+			0x00000000,	/* DENALI_PHY_195_DATA */
+			0x00800000,	/* DENALI_PHY_196_DATA */
+			0x00800080,	/* DENALI_PHY_197_DATA */
+			0x00800080,	/* DENALI_PHY_198_DATA */
+			0x00800080,	/* DENALI_PHY_199_DATA */
+			0x00800080,	/* DENALI_PHY_200_DATA */
+			0x00800080,	/* DENALI_PHY_201_DATA */
+			0x00800080,	/* DENALI_PHY_202_DATA */
+			0x00800080,	/* DENALI_PHY_203_DATA */
+			0x00800080,	/* DENALI_PHY_204_DATA */
+			0x01190080,	/* DENALI_PHY_205_DATA */
+			0x00000002,	/* DENALI_PHY_206_DATA */
+			0x00000000,	/* DENALI_PHY_207_DATA */
+			0x00000000,	/* DENALI_PHY_208_DATA */
+			0x00000200,	/* DENALI_PHY_209_DATA */
+			0x00000000,	/* DENALI_PHY_210_DATA */
+			0x51315152,	/* DENALI_PHY_211_DATA */
+			0xc0013150,	/* DENALI_PHY_212_DATA */
+			0x020000c0,	/* DENALI_PHY_213_DATA */
+			0x00100001,	/* DENALI_PHY_214_DATA */
+			0x07054204,	/* DENALI_PHY_215_DATA */
+			0x000f0c18,	/* DENALI_PHY_216_DATA */
+			0x01000140,	/* DENALI_PHY_217_DATA */
+			0x00000c10,	/* DENALI_PHY_218_DATA */
+			0x00000000,	/* DENALI_PHY_219_DATA */
+			0x00000000,	/* DENALI_PHY_220_DATA */
+			0x00000000,	/* DENALI_PHY_221_DATA */
+			0x00000000,	/* DENALI_PHY_222_DATA */
+			0x00000000,	/* DENALI_PHY_223_DATA */
+			0x00000000,	/* DENALI_PHY_224_DATA */
+			0x00000000,	/* DENALI_PHY_225_DATA */
+			0x00000000,	/* DENALI_PHY_226_DATA */
+			0x00000000,	/* DENALI_PHY_227_DATA */
+			0x00000000,	/* DENALI_PHY_228_DATA */
+			0x00000000,	/* DENALI_PHY_229_DATA */
+			0x00000000,	/* DENALI_PHY_230_DATA */
+			0x00000000,	/* DENALI_PHY_231_DATA */
+			0x00000000,	/* DENALI_PHY_232_DATA */
+			0x00000000,	/* DENALI_PHY_233_DATA */
+			0x00000000,	/* DENALI_PHY_234_DATA */
+			0x00000000,	/* DENALI_PHY_235_DATA */
+			0x00000000,	/* DENALI_PHY_236_DATA */
+			0x00000000,	/* DENALI_PHY_237_DATA */
+			0x00000000,	/* DENALI_PHY_238_DATA */
+			0x00000000,	/* DENALI_PHY_239_DATA */
+			0x00000000,	/* DENALI_PHY_240_DATA */
+			0x00000000,	/* DENALI_PHY_241_DATA */
+			0x00000000,	/* DENALI_PHY_242_DATA */
+			0x00000000,	/* DENALI_PHY_243_DATA */
+			0x00000000,	/* DENALI_PHY_244_DATA */
+			0x00000000,	/* DENALI_PHY_245_DATA */
+			0x00000000,	/* DENALI_PHY_246_DATA */
+			0x00000000,	/* DENALI_PHY_247_DATA */
+			0x00000000,	/* DENALI_PHY_248_DATA */
+			0x00000000,	/* DENALI_PHY_249_DATA */
+			0x00000000,	/* DENALI_PHY_250_DATA */
+			0x00000000,	/* DENALI_PHY_251_DATA */
+			0x00000000,	/* DENALI_PHY_252_DATA */
+			0x00000000,	/* DENALI_PHY_253_DATA */
+			0x00000000,	/* DENALI_PHY_254_DATA */
+			0x00000000,	/* DENALI_PHY_255_DATA */
+			0x76543210,	/* DENALI_PHY_256_DATA */
+			0x0004f008,	/* DENALI_PHY_257_DATA */
+			0x00020119,	/* DENALI_PHY_258_DATA */
+			0x00000000,	/* DENALI_PHY_259_DATA */
+			0x00000000,	/* DENALI_PHY_260_DATA */
+			0x00010000,	/* DENALI_PHY_261_DATA */
+			0x01665555,	/* DENALI_PHY_262_DATA */
+			0x03665555,	/* DENALI_PHY_263_DATA */
+			0x00010f00,	/* DENALI_PHY_264_DATA */
+			0x05010200,	/* DENALI_PHY_265_DATA */
+			0x00000002,	/* DENALI_PHY_266_DATA */
+			0x00170180,	/* DENALI_PHY_267_DATA */
+			0x00cc0201,	/* DENALI_PHY_268_DATA */
+			0x00030066,	/* DENALI_PHY_269_DATA */
+			0x00000000,	/* DENALI_PHY_270_DATA */
+			0x00000000,	/* DENALI_PHY_271_DATA */
+			0x00000000,	/* DENALI_PHY_272_DATA */
+			0x00000000,	/* DENALI_PHY_273_DATA */
+			0x00000000,	/* DENALI_PHY_274_DATA */
+			0x00000000,	/* DENALI_PHY_275_DATA */
+			0x00000000,	/* DENALI_PHY_276_DATA */
+			0x00000000,	/* DENALI_PHY_277_DATA */
+			0x04080000,	/* DENALI_PHY_278_DATA */
+			0x04080400,	/* DENALI_PHY_279_DATA */
+			0x30000000,	/* DENALI_PHY_280_DATA */
+			0x0c00c007,	/* DENALI_PHY_281_DATA */
+			0x00000100,	/* DENALI_PHY_282_DATA */
+			0x00000000,	/* DENALI_PHY_283_DATA */
+			0xfd02fe01,	/* DENALI_PHY_284_DATA */
+			0xf708fb04,	/* DENALI_PHY_285_DATA */
+			0xdf20ef10,	/* DENALI_PHY_286_DATA */
+			0x7f80bf40,	/* DENALI_PHY_287_DATA */
+			0x0001aaaa,	/* DENALI_PHY_288_DATA */
+			0x00000000,	/* DENALI_PHY_289_DATA */
+			0x00000000,	/* DENALI_PHY_290_DATA */
+			0x00000000,	/* DENALI_PHY_291_DATA */
+			0x00000000,	/* DENALI_PHY_292_DATA */
+			0x00000000,	/* DENALI_PHY_293_DATA */
+			0x00000000,	/* DENALI_PHY_294_DATA */
+			0x00000000,	/* DENALI_PHY_295_DATA */
+			0x00000000,	/* DENALI_PHY_296_DATA */
+			0x00000000,	/* DENALI_PHY_297_DATA */
+			0x00000000,	/* DENALI_PHY_298_DATA */
+			0x00000000,	/* DENALI_PHY_299_DATA */
+			0x00000000,	/* DENALI_PHY_300_DATA */
+			0x00000000,	/* DENALI_PHY_301_DATA */
+			0x00000000,	/* DENALI_PHY_302_DATA */
+			0x00000000,	/* DENALI_PHY_303_DATA */
+			0x00000000,	/* DENALI_PHY_304_DATA */
+			0x00000000,	/* DENALI_PHY_305_DATA */
+			0x00000000,	/* DENALI_PHY_306_DATA */
+			0x00000000,	/* DENALI_PHY_307_DATA */
+			0x00200000,	/* DENALI_PHY_308_DATA */
+			0x00000000,	/* DENALI_PHY_309_DATA */
+			0x00000000,	/* DENALI_PHY_310_DATA */
+			0x00000000,	/* DENALI_PHY_311_DATA */
+			0x00000000,	/* DENALI_PHY_312_DATA */
+			0x00000000,	/* DENALI_PHY_313_DATA */
+			0x00000000,	/* DENALI_PHY_314_DATA */
+			0x02800280,	/* DENALI_PHY_315_DATA */
+			0x02800280,	/* DENALI_PHY_316_DATA */
+			0x02800280,	/* DENALI_PHY_317_DATA */
+			0x02800280,	/* DENALI_PHY_318_DATA */
+			0x00000280,	/* DENALI_PHY_319_DATA */
+			0x00000000,	/* DENALI_PHY_320_DATA */
+			0x00000000,	/* DENALI_PHY_321_DATA */
+			0x00000000,	/* DENALI_PHY_322_DATA */
+			0x00000000,	/* DENALI_PHY_323_DATA */
+			0x00800000,	/* DENALI_PHY_324_DATA */
+			0x00800080,	/* DENALI_PHY_325_DATA */
+			0x00800080,	/* DENALI_PHY_326_DATA */
+			0x00800080,	/* DENALI_PHY_327_DATA */
+			0x00800080,	/* DENALI_PHY_328_DATA */
+			0x00800080,	/* DENALI_PHY_329_DATA */
+			0x00800080,	/* DENALI_PHY_330_DATA */
+			0x00800080,	/* DENALI_PHY_331_DATA */
+			0x00800080,	/* DENALI_PHY_332_DATA */
+			0x01190080,	/* DENALI_PHY_333_DATA */
+			0x00000002,	/* DENALI_PHY_334_DATA */
+			0x00000000,	/* DENALI_PHY_335_DATA */
+			0x00000000,	/* DENALI_PHY_336_DATA */
+			0x00000200,	/* DENALI_PHY_337_DATA */
+			0x00000000,	/* DENALI_PHY_338_DATA */
+			0x51315152,	/* DENALI_PHY_339_DATA */
+			0xc0013150,	/* DENALI_PHY_340_DATA */
+			0x020000c0,	/* DENALI_PHY_341_DATA */
+			0x00100001,	/* DENALI_PHY_342_DATA */
+			0x07054204,	/* DENALI_PHY_343_DATA */
+			0x000f0c18,	/* DENALI_PHY_344_DATA */
+			0x01000140,	/* DENALI_PHY_345_DATA */
+			0x00000c10,	/* DENALI_PHY_346_DATA */
+			0x00000000,	/* DENALI_PHY_347_DATA */
+			0x00000000,	/* DENALI_PHY_348_DATA */
+			0x00000000,	/* DENALI_PHY_349_DATA */
+			0x00000000,	/* DENALI_PHY_350_DATA */
+			0x00000000,	/* DENALI_PHY_351_DATA */
+			0x00000000,	/* DENALI_PHY_352_DATA */
+			0x00000000,	/* DENALI_PHY_353_DATA */
+			0x00000000,	/* DENALI_PHY_354_DATA */
+			0x00000000,	/* DENALI_PHY_355_DATA */
+			0x00000000,	/* DENALI_PHY_356_DATA */
+			0x00000000,	/* DENALI_PHY_357_DATA */
+			0x00000000,	/* DENALI_PHY_358_DATA */
+			0x00000000,	/* DENALI_PHY_359_DATA */
+			0x00000000,	/* DENALI_PHY_360_DATA */
+			0x00000000,	/* DENALI_PHY_361_DATA */
+			0x00000000,	/* DENALI_PHY_362_DATA */
+			0x00000000,	/* DENALI_PHY_363_DATA */
+			0x00000000,	/* DENALI_PHY_364_DATA */
+			0x00000000,	/* DENALI_PHY_365_DATA */
+			0x00000000,	/* DENALI_PHY_366_DATA */
+			0x00000000,	/* DENALI_PHY_367_DATA */
+			0x00000000,	/* DENALI_PHY_368_DATA */
+			0x00000000,	/* DENALI_PHY_369_DATA */
+			0x00000000,	/* DENALI_PHY_370_DATA */
+			0x00000000,	/* DENALI_PHY_371_DATA */
+			0x00000000,	/* DENALI_PHY_372_DATA */
+			0x00000000,	/* DENALI_PHY_373_DATA */
+			0x00000000,	/* DENALI_PHY_374_DATA */
+			0x00000000,	/* DENALI_PHY_375_DATA */
+			0x00000000,	/* DENALI_PHY_376_DATA */
+			0x00000000,	/* DENALI_PHY_377_DATA */
+			0x00000000,	/* DENALI_PHY_378_DATA */
+			0x00000000,	/* DENALI_PHY_379_DATA */
+			0x00000000,	/* DENALI_PHY_380_DATA */
+			0x00000000,	/* DENALI_PHY_381_DATA */
+			0x00000000,	/* DENALI_PHY_382_DATA */
+			0x00000000,	/* DENALI_PHY_383_DATA */
+			0x76543210,	/* DENALI_PHY_384_DATA */
+			0x0004f008,	/* DENALI_PHY_385_DATA */
+			0x00020119,	/* DENALI_PHY_386_DATA */
+			0x00000000,	/* DENALI_PHY_387_DATA */
+			0x00000000,	/* DENALI_PHY_388_DATA */
+			0x00010000,	/* DENALI_PHY_389_DATA */
+			0x01665555,	/* DENALI_PHY_390_DATA */
+			0x03665555,	/* DENALI_PHY_391_DATA */
+			0x00010f00,	/* DENALI_PHY_392_DATA */
+			0x05010200,	/* DENALI_PHY_393_DATA */
+			0x00000002,	/* DENALI_PHY_394_DATA */
+			0x00170180,	/* DENALI_PHY_395_DATA */
+			0x00cc0201,	/* DENALI_PHY_396_DATA */
+			0x00030066,	/* DENALI_PHY_397_DATA */
+			0x00000000,	/* DENALI_PHY_398_DATA */
+			0x00000000,	/* DENALI_PHY_399_DATA */
+			0x00000000,	/* DENALI_PHY_400_DATA */
+			0x00000000,	/* DENALI_PHY_401_DATA */
+			0x00000000,	/* DENALI_PHY_402_DATA */
+			0x00000000,	/* DENALI_PHY_403_DATA */
+			0x00000000,	/* DENALI_PHY_404_DATA */
+			0x00000000,	/* DENALI_PHY_405_DATA */
+			0x04080000,	/* DENALI_PHY_406_DATA */
+			0x04080400,	/* DENALI_PHY_407_DATA */
+			0x30000000,	/* DENALI_PHY_408_DATA */
+			0x0c00c007,	/* DENALI_PHY_409_DATA */
+			0x00000100,	/* DENALI_PHY_410_DATA */
+			0x00000000,	/* DENALI_PHY_411_DATA */
+			0xfd02fe01,	/* DENALI_PHY_412_DATA */
+			0xf708fb04,	/* DENALI_PHY_413_DATA */
+			0xdf20ef10,	/* DENALI_PHY_414_DATA */
+			0x7f80bf40,	/* DENALI_PHY_415_DATA */
+			0x0000aaaa,	/* DENALI_PHY_416_DATA */
+			0x00000000,	/* DENALI_PHY_417_DATA */
+			0x00000000,	/* DENALI_PHY_418_DATA */
+			0x00000000,	/* DENALI_PHY_419_DATA */
+			0x00000000,	/* DENALI_PHY_420_DATA */
+			0x00000000,	/* DENALI_PHY_421_DATA */
+			0x00000000,	/* DENALI_PHY_422_DATA */
+			0x00000000,	/* DENALI_PHY_423_DATA */
+			0x00000000,	/* DENALI_PHY_424_DATA */
+			0x00000000,	/* DENALI_PHY_425_DATA */
+			0x00000000,	/* DENALI_PHY_426_DATA */
+			0x00000000,	/* DENALI_PHY_427_DATA */
+			0x00000000,	/* DENALI_PHY_428_DATA */
+			0x00000000,	/* DENALI_PHY_429_DATA */
+			0x00000000,	/* DENALI_PHY_430_DATA */
+			0x00000000,	/* DENALI_PHY_431_DATA */
+			0x00000000,	/* DENALI_PHY_432_DATA */
+			0x00000000,	/* DENALI_PHY_433_DATA */
+			0x00000000,	/* DENALI_PHY_434_DATA */
+			0x00000000,	/* DENALI_PHY_435_DATA */
+			0x00200000,	/* DENALI_PHY_436_DATA */
+			0x00000000,	/* DENALI_PHY_437_DATA */
+			0x00000000,	/* DENALI_PHY_438_DATA */
+			0x00000000,	/* DENALI_PHY_439_DATA */
+			0x00000000,	/* DENALI_PHY_440_DATA */
+			0x00000000,	/* DENALI_PHY_441_DATA */
+			0x00000000,	/* DENALI_PHY_442_DATA */
+			0x02800280,	/* DENALI_PHY_443_DATA */
+			0x02800280,	/* DENALI_PHY_444_DATA */
+			0x02800280,	/* DENALI_PHY_445_DATA */
+			0x02800280,	/* DENALI_PHY_446_DATA */
+			0x00000280,	/* DENALI_PHY_447_DATA */
+			0x00000000,	/* DENALI_PHY_448_DATA */
+			0x00000000,	/* DENALI_PHY_449_DATA */
+			0x00000000,	/* DENALI_PHY_450_DATA */
+			0x00000000,	/* DENALI_PHY_451_DATA */
+			0x00800000,	/* DENALI_PHY_452_DATA */
+			0x00800080,	/* DENALI_PHY_453_DATA */
+			0x00800080,	/* DENALI_PHY_454_DATA */
+			0x00800080,	/* DENALI_PHY_455_DATA */
+			0x00800080,	/* DENALI_PHY_456_DATA */
+			0x00800080,	/* DENALI_PHY_457_DATA */
+			0x00800080,	/* DENALI_PHY_458_DATA */
+			0x00800080,	/* DENALI_PHY_459_DATA */
+			0x00800080,	/* DENALI_PHY_460_DATA */
+			0x01190080,	/* DENALI_PHY_461_DATA */
+			0x00000002,	/* DENALI_PHY_462_DATA */
+			0x00000000,	/* DENALI_PHY_463_DATA */
+			0x00000000,	/* DENALI_PHY_464_DATA */
+			0x00000200,	/* DENALI_PHY_465_DATA */
+			0x00000000,	/* DENALI_PHY_466_DATA */
+			0x51315152,	/* DENALI_PHY_467_DATA */
+			0xc0013150,	/* DENALI_PHY_468_DATA */
+			0x020000c0,	/* DENALI_PHY_469_DATA */
+			0x00100001,	/* DENALI_PHY_470_DATA */
+			0x07054204,	/* DENALI_PHY_471_DATA */
+			0x000f0c18,	/* DENALI_PHY_472_DATA */
+			0x01000140,	/* DENALI_PHY_473_DATA */
+			0x00000c10,	/* DENALI_PHY_474_DATA */
+			0x00000000,	/* DENALI_PHY_475_DATA */
+			0x00000000,	/* DENALI_PHY_476_DATA */
+			0x00000000,	/* DENALI_PHY_477_DATA */
+			0x00000000,	/* DENALI_PHY_478_DATA */
+			0x00000000,	/* DENALI_PHY_479_DATA */
+			0x00000000,	/* DENALI_PHY_480_DATA */
+			0x00000000,	/* DENALI_PHY_481_DATA */
+			0x00000000,	/* DENALI_PHY_482_DATA */
+			0x00000000,	/* DENALI_PHY_483_DATA */
+			0x00000000,	/* DENALI_PHY_484_DATA */
+			0x00000000,	/* DENALI_PHY_485_DATA */
+			0x00000000,	/* DENALI_PHY_486_DATA */
+			0x00000000,	/* DENALI_PHY_487_DATA */
+			0x00000000,	/* DENALI_PHY_488_DATA */
+			0x00000000,	/* DENALI_PHY_489_DATA */
+			0x00000000,	/* DENALI_PHY_490_DATA */
+			0x00000000,	/* DENALI_PHY_491_DATA */
+			0x00000000,	/* DENALI_PHY_492_DATA */
+			0x00000000,	/* DENALI_PHY_493_DATA */
+			0x00000000,	/* DENALI_PHY_494_DATA */
+			0x00000000,	/* DENALI_PHY_495_DATA */
+			0x00000000,	/* DENALI_PHY_496_DATA */
+			0x00000000,	/* DENALI_PHY_497_DATA */
+			0x00000000,	/* DENALI_PHY_498_DATA */
+			0x00000000,	/* DENALI_PHY_499_DATA */
+			0x00000000,	/* DENALI_PHY_500_DATA */
+			0x00000000,	/* DENALI_PHY_501_DATA */
+			0x00000000,	/* DENALI_PHY_502_DATA */
+			0x00000000,	/* DENALI_PHY_503_DATA */
+			0x00000000,	/* DENALI_PHY_504_DATA */
+			0x00000000,	/* DENALI_PHY_505_DATA */
+			0x00000000,	/* DENALI_PHY_506_DATA */
+			0x00000000,	/* DENALI_PHY_507_DATA */
+			0x00000000,	/* DENALI_PHY_508_DATA */
+			0x00000000,	/* DENALI_PHY_509_DATA */
+			0x00000000,	/* DENALI_PHY_510_DATA */
+			0x00000000,	/* DENALI_PHY_511_DATA */
+			0x00000000,	/* DENALI_PHY_512_DATA */
+			0x00000000,	/* DENALI_PHY_513_DATA */
+			0x00000000,	/* DENALI_PHY_514_DATA */
+			0x00000000,	/* DENALI_PHY_515_DATA */
+			0x00000000,	/* DENALI_PHY_516_DATA */
+			0x00000000,	/* DENALI_PHY_517_DATA */
+			0x00000000,	/* DENALI_PHY_518_DATA */
+			0x00000002,	/* DENALI_PHY_519_DATA */
+			0x00000000,	/* DENALI_PHY_520_DATA */
+			0x00000000,	/* DENALI_PHY_521_DATA */
+			0x00000000,	/* DENALI_PHY_522_DATA */
+			0x00400320,	/* DENALI_PHY_523_DATA */
+			0x00000040,	/* DENALI_PHY_524_DATA */
+			0x00dcba98,	/* DENALI_PHY_525_DATA */
+			0x00000000,	/* DENALI_PHY_526_DATA */
+			0x00dcba98,	/* DENALI_PHY_527_DATA */
+			0x01000000,	/* DENALI_PHY_528_DATA */
+			0x00020003,	/* DENALI_PHY_529_DATA */
+			0x00000000,	/* DENALI_PHY_530_DATA */
+			0x00000000,	/* DENALI_PHY_531_DATA */
+			0x00000000,	/* DENALI_PHY_532_DATA */
+			0x0000002a,	/* DENALI_PHY_533_DATA */
+			0x00000015,	/* DENALI_PHY_534_DATA */
+			0x00000015,	/* DENALI_PHY_535_DATA */
+			0x0000002a,	/* DENALI_PHY_536_DATA */
+			0x00000033,	/* DENALI_PHY_537_DATA */
+			0x0000000c,	/* DENALI_PHY_538_DATA */
+			0x0000000c,	/* DENALI_PHY_539_DATA */
+			0x00000033,	/* DENALI_PHY_540_DATA */
+			0x0a418820,	/* DENALI_PHY_541_DATA */
+			0x003f0000,	/* DENALI_PHY_542_DATA */
+			0x0000003f,	/* DENALI_PHY_543_DATA */
+			0x00030055,	/* DENALI_PHY_544_DATA */
+			0x03000300,	/* DENALI_PHY_545_DATA */
+			0x03000300,	/* DENALI_PHY_546_DATA */
+			0x00000300,	/* DENALI_PHY_547_DATA */
+			0x42080010,	/* DENALI_PHY_548_DATA */
+			0x00000003,	/* DENALI_PHY_549_DATA */
+			0x00000000,	/* DENALI_PHY_550_DATA */
+			0x00000000,	/* DENALI_PHY_551_DATA */
+			0x00000000,	/* DENALI_PHY_552_DATA */
+			0x00000000,	/* DENALI_PHY_553_DATA */
+			0x00000000,	/* DENALI_PHY_554_DATA */
+			0x00000000,	/* DENALI_PHY_555_DATA */
+			0x00000000,	/* DENALI_PHY_556_DATA */
+			0x00000000,	/* DENALI_PHY_557_DATA */
+			0x00000000,	/* DENALI_PHY_558_DATA */
+			0x00000000,	/* DENALI_PHY_559_DATA */
+			0x00000000,	/* DENALI_PHY_560_DATA */
+			0x00000000,	/* DENALI_PHY_561_DATA */
+			0x00000000,	/* DENALI_PHY_562_DATA */
+			0x00000000,	/* DENALI_PHY_563_DATA */
+			0x00000000,	/* DENALI_PHY_564_DATA */
+			0x00000000,	/* DENALI_PHY_565_DATA */
+			0x00000000,	/* DENALI_PHY_566_DATA */
+			0x00000000,	/* DENALI_PHY_567_DATA */
+			0x00000000,	/* DENALI_PHY_568_DATA */
+			0x00000000,	/* DENALI_PHY_569_DATA */
+			0x00000000,	/* DENALI_PHY_570_DATA */
+			0x00000000,	/* DENALI_PHY_571_DATA */
+			0x00000000,	/* DENALI_PHY_572_DATA */
+			0x00000000,	/* DENALI_PHY_573_DATA */
+			0x00000000,	/* DENALI_PHY_574_DATA */
+			0x00000000,	/* DENALI_PHY_575_DATA */
+			0x00000000,	/* DENALI_PHY_576_DATA */
+			0x00000000,	/* DENALI_PHY_577_DATA */
+			0x00000000,	/* DENALI_PHY_578_DATA */
+			0x00000000,	/* DENALI_PHY_579_DATA */
+			0x00000000,	/* DENALI_PHY_580_DATA */
+			0x00000000,	/* DENALI_PHY_581_DATA */
+			0x00000000,	/* DENALI_PHY_582_DATA */
+			0x00000000,	/* DENALI_PHY_583_DATA */
+			0x00000000,	/* DENALI_PHY_584_DATA */
+			0x00000000,	/* DENALI_PHY_585_DATA */
+			0x00000000,	/* DENALI_PHY_586_DATA */
+			0x00000000,	/* DENALI_PHY_587_DATA */
+			0x00000000,	/* DENALI_PHY_588_DATA */
+			0x00000000,	/* DENALI_PHY_589_DATA */
+			0x00000000,	/* DENALI_PHY_590_DATA */
+			0x00000000,	/* DENALI_PHY_591_DATA */
+			0x00000000,	/* DENALI_PHY_592_DATA */
+			0x00000000,	/* DENALI_PHY_593_DATA */
+			0x00000000,	/* DENALI_PHY_594_DATA */
+			0x00000000,	/* DENALI_PHY_595_DATA */
+			0x00000000,	/* DENALI_PHY_596_DATA */
+			0x00000000,	/* DENALI_PHY_597_DATA */
+			0x00000000,	/* DENALI_PHY_598_DATA */
+			0x00000000,	/* DENALI_PHY_599_DATA */
+			0x00000000,	/* DENALI_PHY_600_DATA */
+			0x00000000,	/* DENALI_PHY_601_DATA */
+			0x00000000,	/* DENALI_PHY_602_DATA */
+			0x00000000,	/* DENALI_PHY_603_DATA */
+			0x00000000,	/* DENALI_PHY_604_DATA */
+			0x00000000,	/* DENALI_PHY_605_DATA */
+			0x00000000,	/* DENALI_PHY_606_DATA */
+			0x00000000,	/* DENALI_PHY_607_DATA */
+			0x00000000,	/* DENALI_PHY_608_DATA */
+			0x00000000,	/* DENALI_PHY_609_DATA */
+			0x00000000,	/* DENALI_PHY_610_DATA */
+			0x00000000,	/* DENALI_PHY_611_DATA */
+			0x00000000,	/* DENALI_PHY_612_DATA */
+			0x00000000,	/* DENALI_PHY_613_DATA */
+			0x00000000,	/* DENALI_PHY_614_DATA */
+			0x00000000,	/* DENALI_PHY_615_DATA */
+			0x00000000,	/* DENALI_PHY_616_DATA */
+			0x00000000,	/* DENALI_PHY_617_DATA */
+			0x00000000,	/* DENALI_PHY_618_DATA */
+			0x00000000,	/* DENALI_PHY_619_DATA */
+			0x00000000,	/* DENALI_PHY_620_DATA */
+			0x00000000,	/* DENALI_PHY_621_DATA */
+			0x00000000,	/* DENALI_PHY_622_DATA */
+			0x00000000,	/* DENALI_PHY_623_DATA */
+			0x00000000,	/* DENALI_PHY_624_DATA */
+			0x00000000,	/* DENALI_PHY_625_DATA */
+			0x00000000,	/* DENALI_PHY_626_DATA */
+			0x00000000,	/* DENALI_PHY_627_DATA */
+			0x00000000,	/* DENALI_PHY_628_DATA */
+			0x00000000,	/* DENALI_PHY_629_DATA */
+			0x00000000,	/* DENALI_PHY_630_DATA */
+			0x00000000,	/* DENALI_PHY_631_DATA */
+			0x00000000,	/* DENALI_PHY_632_DATA */
+			0x00000000,	/* DENALI_PHY_633_DATA */
+			0x00000000,	/* DENALI_PHY_634_DATA */
+			0x00000000,	/* DENALI_PHY_635_DATA */
+			0x00000000,	/* DENALI_PHY_636_DATA */
+			0x00000000,	/* DENALI_PHY_637_DATA */
+			0x00000000,	/* DENALI_PHY_638_DATA */
+			0x00000000,	/* DENALI_PHY_639_DATA */
+			0x00000000,	/* DENALI_PHY_640_DATA */
+			0x00000000,	/* DENALI_PHY_641_DATA */
+			0x00000000,	/* DENALI_PHY_642_DATA */
+			0x00000000,	/* DENALI_PHY_643_DATA */
+			0x00000000,	/* DENALI_PHY_644_DATA */
+			0x00000000,	/* DENALI_PHY_645_DATA */
+			0x00000000,	/* DENALI_PHY_646_DATA */
+			0x00000002,	/* DENALI_PHY_647_DATA */
+			0x00000000,	/* DENALI_PHY_648_DATA */
+			0x00000000,	/* DENALI_PHY_649_DATA */
+			0x00000000,	/* DENALI_PHY_650_DATA */
+			0x00400320,	/* DENALI_PHY_651_DATA */
+			0x00000040,	/* DENALI_PHY_652_DATA */
+			0x00000000,	/* DENALI_PHY_653_DATA */
+			0x00000000,	/* DENALI_PHY_654_DATA */
+			0x00000000,	/* DENALI_PHY_655_DATA */
+			0x01000000,	/* DENALI_PHY_656_DATA */
+			0x00020003,	/* DENALI_PHY_657_DATA */
+			0x00000000,	/* DENALI_PHY_658_DATA */
+			0x00000000,	/* DENALI_PHY_659_DATA */
+			0x00000000,	/* DENALI_PHY_660_DATA */
+			0x0000002a,	/* DENALI_PHY_661_DATA */
+			0x00000015,	/* DENALI_PHY_662_DATA */
+			0x00000015,	/* DENALI_PHY_663_DATA */
+			0x0000002a,	/* DENALI_PHY_664_DATA */
+			0x00000033,	/* DENALI_PHY_665_DATA */
+			0x0000000c,	/* DENALI_PHY_666_DATA */
+			0x0000000c,	/* DENALI_PHY_667_DATA */
+			0x00000033,	/* DENALI_PHY_668_DATA */
+			0x00000000,	/* DENALI_PHY_669_DATA */
+			0x00000000,	/* DENALI_PHY_670_DATA */
+			0x00000000,	/* DENALI_PHY_671_DATA */
+			0x00030055,	/* DENALI_PHY_672_DATA */
+			0x03000300,	/* DENALI_PHY_673_DATA */
+			0x03000300,	/* DENALI_PHY_674_DATA */
+			0x00000300,	/* DENALI_PHY_675_DATA */
+			0x42080010,	/* DENALI_PHY_676_DATA */
+			0x00000003,	/* DENALI_PHY_677_DATA */
+			0x00000000,	/* DENALI_PHY_678_DATA */
+			0x00000000,	/* DENALI_PHY_679_DATA */
+			0x00000000,	/* DENALI_PHY_680_DATA */
+			0x00000000,	/* DENALI_PHY_681_DATA */
+			0x00000000,	/* DENALI_PHY_682_DATA */
+			0x00000000,	/* DENALI_PHY_683_DATA */
+			0x00000000,	/* DENALI_PHY_684_DATA */
+			0x00000000,	/* DENALI_PHY_685_DATA */
+			0x00000000,	/* DENALI_PHY_686_DATA */
+			0x00000000,	/* DENALI_PHY_687_DATA */
+			0x00000000,	/* DENALI_PHY_688_DATA */
+			0x00000000,	/* DENALI_PHY_689_DATA */
+			0x00000000,	/* DENALI_PHY_690_DATA */
+			0x00000000,	/* DENALI_PHY_691_DATA */
+			0x00000000,	/* DENALI_PHY_692_DATA */
+			0x00000000,	/* DENALI_PHY_693_DATA */
+			0x00000000,	/* DENALI_PHY_694_DATA */
+			0x00000000,	/* DENALI_PHY_695_DATA */
+			0x00000000,	/* DENALI_PHY_696_DATA */
+			0x00000000,	/* DENALI_PHY_697_DATA */
+			0x00000000,	/* DENALI_PHY_698_DATA */
+			0x00000000,	/* DENALI_PHY_699_DATA */
+			0x00000000,	/* DENALI_PHY_700_DATA */
+			0x00000000,	/* DENALI_PHY_701_DATA */
+			0x00000000,	/* DENALI_PHY_702_DATA */
+			0x00000000,	/* DENALI_PHY_703_DATA */
+			0x00000000,	/* DENALI_PHY_704_DATA */
+			0x00000000,	/* DENALI_PHY_705_DATA */
+			0x00000000,	/* DENALI_PHY_706_DATA */
+			0x00000000,	/* DENALI_PHY_707_DATA */
+			0x00000000,	/* DENALI_PHY_708_DATA */
+			0x00000000,	/* DENALI_PHY_709_DATA */
+			0x00000000,	/* DENALI_PHY_710_DATA */
+			0x00000000,	/* DENALI_PHY_711_DATA */
+			0x00000000,	/* DENALI_PHY_712_DATA */
+			0x00000000,	/* DENALI_PHY_713_DATA */
+			0x00000000,	/* DENALI_PHY_714_DATA */
+			0x00000000,	/* DENALI_PHY_715_DATA */
+			0x00000000,	/* DENALI_PHY_716_DATA */
+			0x00000000,	/* DENALI_PHY_717_DATA */
+			0x00000000,	/* DENALI_PHY_718_DATA */
+			0x00000000,	/* DENALI_PHY_719_DATA */
+			0x00000000,	/* DENALI_PHY_720_DATA */
+			0x00000000,	/* DENALI_PHY_721_DATA */
+			0x00000000,	/* DENALI_PHY_722_DATA */
+			0x00000000,	/* DENALI_PHY_723_DATA */
+			0x00000000,	/* DENALI_PHY_724_DATA */
+			0x00000000,	/* DENALI_PHY_725_DATA */
+			0x00000000,	/* DENALI_PHY_726_DATA */
+			0x00000000,	/* DENALI_PHY_727_DATA */
+			0x00000000,	/* DENALI_PHY_728_DATA */
+			0x00000000,	/* DENALI_PHY_729_DATA */
+			0x00000000,	/* DENALI_PHY_730_DATA */
+			0x00000000,	/* DENALI_PHY_731_DATA */
+			0x00000000,	/* DENALI_PHY_732_DATA */
+			0x00000000,	/* DENALI_PHY_733_DATA */
+			0x00000000,	/* DENALI_PHY_734_DATA */
+			0x00000000,	/* DENALI_PHY_735_DATA */
+			0x00000000,	/* DENALI_PHY_736_DATA */
+			0x00000000,	/* DENALI_PHY_737_DATA */
+			0x00000000,	/* DENALI_PHY_738_DATA */
+			0x00000000,	/* DENALI_PHY_739_DATA */
+			0x00000000,	/* DENALI_PHY_740_DATA */
+			0x00000000,	/* DENALI_PHY_741_DATA */
+			0x00000000,	/* DENALI_PHY_742_DATA */
+			0x00000000,	/* DENALI_PHY_743_DATA */
+			0x00000000,	/* DENALI_PHY_744_DATA */
+			0x00000000,	/* DENALI_PHY_745_DATA */
+			0x00000000,	/* DENALI_PHY_746_DATA */
+			0x00000000,	/* DENALI_PHY_747_DATA */
+			0x00000000,	/* DENALI_PHY_748_DATA */
+			0x00000000,	/* DENALI_PHY_749_DATA */
+			0x00000000,	/* DENALI_PHY_750_DATA */
+			0x00000000,	/* DENALI_PHY_751_DATA */
+			0x00000000,	/* DENALI_PHY_752_DATA */
+			0x00000000,	/* DENALI_PHY_753_DATA */
+			0x00000000,	/* DENALI_PHY_754_DATA */
+			0x00000000,	/* DENALI_PHY_755_DATA */
+			0x00000000,	/* DENALI_PHY_756_DATA */
+			0x00000000,	/* DENALI_PHY_757_DATA */
+			0x00000000,	/* DENALI_PHY_758_DATA */
+			0x00000000,	/* DENALI_PHY_759_DATA */
+			0x00000000,	/* DENALI_PHY_760_DATA */
+			0x00000000,	/* DENALI_PHY_761_DATA */
+			0x00000000,	/* DENALI_PHY_762_DATA */
+			0x00000000,	/* DENALI_PHY_763_DATA */
+			0x00000000,	/* DENALI_PHY_764_DATA */
+			0x00000000,	/* DENALI_PHY_765_DATA */
+			0x00000000,	/* DENALI_PHY_766_DATA */
+			0x00000000,	/* DENALI_PHY_767_DATA */
+			0x00000000,	/* DENALI_PHY_768_DATA */
+			0x00000000,	/* DENALI_PHY_769_DATA */
+			0x00000000,	/* DENALI_PHY_770_DATA */
+			0x00000000,	/* DENALI_PHY_771_DATA */
+			0x00000000,	/* DENALI_PHY_772_DATA */
+			0x00000000,	/* DENALI_PHY_773_DATA */
+			0x00000000,	/* DENALI_PHY_774_DATA */
+			0x00000002,	/* DENALI_PHY_775_DATA */
+			0x00000000,	/* DENALI_PHY_776_DATA */
+			0x00000000,	/* DENALI_PHY_777_DATA */
+			0x00000000,	/* DENALI_PHY_778_DATA */
+			0x00400320,	/* DENALI_PHY_779_DATA */
+			0x00000040,	/* DENALI_PHY_780_DATA */
+			0x00000000,	/* DENALI_PHY_781_DATA */
+			0x00000000,	/* DENALI_PHY_782_DATA */
+			0x00000000,	/* DENALI_PHY_783_DATA */
+			0x01000000,	/* DENALI_PHY_784_DATA */
+			0x00020003,	/* DENALI_PHY_785_DATA */
+			0x00000000,	/* DENALI_PHY_786_DATA */
+			0x00000000,	/* DENALI_PHY_787_DATA */
+			0x00000000,	/* DENALI_PHY_788_DATA */
+			0x0000002a,	/* DENALI_PHY_789_DATA */
+			0x00000015,	/* DENALI_PHY_790_DATA */
+			0x00000015,	/* DENALI_PHY_791_DATA */
+			0x0000002a,	/* DENALI_PHY_792_DATA */
+			0x00000033,	/* DENALI_PHY_793_DATA */
+			0x0000000c,	/* DENALI_PHY_794_DATA */
+			0x0000000c,	/* DENALI_PHY_795_DATA */
+			0x00000033,	/* DENALI_PHY_796_DATA */
+			0x1ee6b16a,	/* DENALI_PHY_797_DATA */
+			0x10000000,	/* DENALI_PHY_798_DATA */
+			0x00000000,	/* DENALI_PHY_799_DATA */
+			0x00030055,	/* DENALI_PHY_800_DATA */
+			0x03000300,	/* DENALI_PHY_801_DATA */
+			0x03000300,	/* DENALI_PHY_802_DATA */
+			0x00000300,	/* DENALI_PHY_803_DATA */
+			0x42080010,	/* DENALI_PHY_804_DATA */
+			0x00000003,	/* DENALI_PHY_805_DATA */
+			0x00000000,	/* DENALI_PHY_806_DATA */
+			0x00000000,	/* DENALI_PHY_807_DATA */
+			0x00000000,	/* DENALI_PHY_808_DATA */
+			0x00000000,	/* DENALI_PHY_809_DATA */
+			0x00000000,	/* DENALI_PHY_810_DATA */
+			0x00000000,	/* DENALI_PHY_811_DATA */
+			0x00000000,	/* DENALI_PHY_812_DATA */
+			0x00000000,	/* DENALI_PHY_813_DATA */
+			0x00000000,	/* DENALI_PHY_814_DATA */
+			0x00000000,	/* DENALI_PHY_815_DATA */
+			0x00000000,	/* DENALI_PHY_816_DATA */
+			0x00000000,	/* DENALI_PHY_817_DATA */
+			0x00000000,	/* DENALI_PHY_818_DATA */
+			0x00000000,	/* DENALI_PHY_819_DATA */
+			0x00000000,	/* DENALI_PHY_820_DATA */
+			0x00000000,	/* DENALI_PHY_821_DATA */
+			0x00000000,	/* DENALI_PHY_822_DATA */
+			0x00000000,	/* DENALI_PHY_823_DATA */
+			0x00000000,	/* DENALI_PHY_824_DATA */
+			0x00000000,	/* DENALI_PHY_825_DATA */
+			0x00000000,	/* DENALI_PHY_826_DATA */
+			0x00000000,	/* DENALI_PHY_827_DATA */
+			0x00000000,	/* DENALI_PHY_828_DATA */
+			0x00000000,	/* DENALI_PHY_829_DATA */
+			0x00000000,	/* DENALI_PHY_830_DATA */
+			0x00000000,	/* DENALI_PHY_831_DATA */
+			0x00000000,	/* DENALI_PHY_832_DATA */
+			0x00000000,	/* DENALI_PHY_833_DATA */
+			0x00000000,	/* DENALI_PHY_834_DATA */
+			0x00000000,	/* DENALI_PHY_835_DATA */
+			0x00000000,	/* DENALI_PHY_836_DATA */
+			0x00000000,	/* DENALI_PHY_837_DATA */
+			0x00000000,	/* DENALI_PHY_838_DATA */
+			0x00000000,	/* DENALI_PHY_839_DATA */
+			0x00000000,	/* DENALI_PHY_840_DATA */
+			0x00000000,	/* DENALI_PHY_841_DATA */
+			0x00000000,	/* DENALI_PHY_842_DATA */
+			0x00000000,	/* DENALI_PHY_843_DATA */
+			0x00000000,	/* DENALI_PHY_844_DATA */
+			0x00000000,	/* DENALI_PHY_845_DATA */
+			0x00000000,	/* DENALI_PHY_846_DATA */
+			0x00000000,	/* DENALI_PHY_847_DATA */
+			0x00000000,	/* DENALI_PHY_848_DATA */
+			0x00000000,	/* DENALI_PHY_849_DATA */
+			0x00000000,	/* DENALI_PHY_850_DATA */
+			0x00000000,	/* DENALI_PHY_851_DATA */
+			0x00000000,	/* DENALI_PHY_852_DATA */
+			0x00000000,	/* DENALI_PHY_853_DATA */
+			0x00000000,	/* DENALI_PHY_854_DATA */
+			0x00000000,	/* DENALI_PHY_855_DATA */
+			0x00000000,	/* DENALI_PHY_856_DATA */
+			0x00000000,	/* DENALI_PHY_857_DATA */
+			0x00000000,	/* DENALI_PHY_858_DATA */
+			0x00000000,	/* DENALI_PHY_859_DATA */
+			0x00000000,	/* DENALI_PHY_860_DATA */
+			0x00000000,	/* DENALI_PHY_861_DATA */
+			0x00000000,	/* DENALI_PHY_862_DATA */
+			0x00000000,	/* DENALI_PHY_863_DATA */
+			0x00000000,	/* DENALI_PHY_864_DATA */
+			0x00000000,	/* DENALI_PHY_865_DATA */
+			0x00000000,	/* DENALI_PHY_866_DATA */
+			0x00000000,	/* DENALI_PHY_867_DATA */
+			0x00000000,	/* DENALI_PHY_868_DATA */
+			0x00000000,	/* DENALI_PHY_869_DATA */
+			0x00000000,	/* DENALI_PHY_870_DATA */
+			0x00000000,	/* DENALI_PHY_871_DATA */
+			0x00000000,	/* DENALI_PHY_872_DATA */
+			0x00000000,	/* DENALI_PHY_873_DATA */
+			0x00000000,	/* DENALI_PHY_874_DATA */
+			0x00000000,	/* DENALI_PHY_875_DATA */
+			0x00000000,	/* DENALI_PHY_876_DATA */
+			0x00000000,	/* DENALI_PHY_877_DATA */
+			0x00000000,	/* DENALI_PHY_878_DATA */
+			0x00000000,	/* DENALI_PHY_879_DATA */
+			0x00000000,	/* DENALI_PHY_880_DATA */
+			0x00000000,	/* DENALI_PHY_881_DATA */
+			0x00000000,	/* DENALI_PHY_882_DATA */
+			0x00000000,	/* DENALI_PHY_883_DATA */
+			0x00000000,	/* DENALI_PHY_884_DATA */
+			0x00000000,	/* DENALI_PHY_885_DATA */
+			0x00000000,	/* DENALI_PHY_886_DATA */
+			0x00000000,	/* DENALI_PHY_887_DATA */
+			0x00000000,	/* DENALI_PHY_888_DATA */
+			0x00000000,	/* DENALI_PHY_889_DATA */
+			0x00000000,	/* DENALI_PHY_890_DATA */
+			0x00000000,	/* DENALI_PHY_891_DATA */
+			0x00000000,	/* DENALI_PHY_892_DATA */
+			0x00000000,	/* DENALI_PHY_893_DATA */
+			0x00000000,	/* DENALI_PHY_894_DATA */
+			0x00000000,	/* DENALI_PHY_895_DATA */
+			0x00000000,	/* DENALI_PHY_896_DATA */
+			0x00000000,	/* DENALI_PHY_897_DATA */
+			0x00000005,	/* DENALI_PHY_898_DATA */
+			0x04000f01,	/* DENALI_PHY_899_DATA */
+			0x00020040,	/* DENALI_PHY_900_DATA */
+			0x00020055,	/* DENALI_PHY_901_DATA */
+			0x00000000,	/* DENALI_PHY_902_DATA */
+			0x00000000,	/* DENALI_PHY_903_DATA */
+			0x00000000,	/* DENALI_PHY_904_DATA */
+			0x00000050,	/* DENALI_PHY_905_DATA */
+			0x00000000,	/* DENALI_PHY_906_DATA */
+			0x01010100,	/* DENALI_PHY_907_DATA */
+			0x00000600,	/* DENALI_PHY_908_DATA */
+			0x00000000,	/* DENALI_PHY_909_DATA */
+			0x00006400,	/* DENALI_PHY_910_DATA */
+			0x01221102,	/* DENALI_PHY_911_DATA */
+			0x00000000,	/* DENALI_PHY_912_DATA */
+			0x000d1f00,	/* DENALI_PHY_913_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_914_DATA */
+			0x0d1f0d1f,	/* DENALI_PHY_915_DATA */
+			0x00030003,	/* DENALI_PHY_916_DATA */
+			0x03000300,	/* DENALI_PHY_917_DATA */
+			0x00000300,	/* DENALI_PHY_918_DATA */
+			0x01221102,	/* DENALI_PHY_919_DATA */
+			0x00000000,	/* DENALI_PHY_920_DATA */
+			0x00000000,	/* DENALI_PHY_921_DATA */
+			0x03020000,	/* DENALI_PHY_922_DATA */
+			0x00000001,	/* DENALI_PHY_923_DATA */
+			0x00000411,	/* DENALI_PHY_924_DATA */
+			0x00000411,	/* DENALI_PHY_925_DATA */
+			0x00000040,	/* DENALI_PHY_926_DATA */
+			0x00000040,	/* DENALI_PHY_927_DATA */
+			0x00000411,	/* DENALI_PHY_928_DATA */
+			0x00000411,	/* DENALI_PHY_929_DATA */
+			0x00004410,	/* DENALI_PHY_930_DATA */
+			0x00004410,	/* DENALI_PHY_931_DATA */
+			0x00004410,	/* DENALI_PHY_932_DATA */
+			0x00004410,	/* DENALI_PHY_933_DATA */
+			0x00004410,	/* DENALI_PHY_934_DATA */
+			0x00000411,	/* DENALI_PHY_935_DATA */
+			0x00004410,	/* DENALI_PHY_936_DATA */
+			0x00000411,	/* DENALI_PHY_937_DATA */
+			0x00004410,	/* DENALI_PHY_938_DATA */
+			0x00000411,	/* DENALI_PHY_939_DATA */
+			0x00004410,	/* DENALI_PHY_940_DATA */
+			0x00000000,	/* DENALI_PHY_941_DATA */
+			0x00000000,	/* DENALI_PHY_942_DATA */
+			0x00000000,	/* DENALI_PHY_943_DATA */
+			0x64000000,	/* DENALI_PHY_944_DATA */
+			0x00000000,	/* DENALI_PHY_945_DATA */
+			0x00000000,	/* DENALI_PHY_946_DATA */
+			0x00000508,	/* DENALI_PHY_947_DATA */
+			0x00000000,	/* DENALI_PHY_948_DATA */
+			0x00000000,	/* DENALI_PHY_949_DATA */
+			0x00000000,	/* DENALI_PHY_950_DATA */
+			0x00000000,	/* DENALI_PHY_951_DATA */
+			0x00000000,	/* DENALI_PHY_952_DATA */
+			0x00000000,	/* DENALI_PHY_953_DATA */
+			0xe4000000,	/* DENALI_PHY_954_DATA */
+			0x00000000,	/* DENALI_PHY_955_DATA */
+			0x00000000,	/* DENALI_PHY_956_DATA */
+			0x01010000,	/* DENALI_PHY_957_DATA */
+			0x00000000	/* DENALI_PHY_958_DATA */
+		}
+	},
+},
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index ee6767bada..2d1e094c2f 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -19,11 +19,13 @@
 #include <asm/arch/sdram_rk3399.h>
 #include <asm/arch/cru_rk3399.h>
 #include <asm/arch/grf_rk3399.h>
+#include <asm/arch/pmu_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <linux/err.h>
 #include <time.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
 struct chan_info {
 	struct rk3399_ddr_pctl_regs *pctl;
 	struct rk3399_ddr_pi_regs *pi;
@@ -36,6 +38,8 @@ struct dram_info {
 	struct chan_info chan[2];
 	struct clk ddr_clk;
 	struct rk3399_cru *cru;
+	struct rk3399_grf_regs *grf;
+	struct rk3399_pmu_regs *pmu;
 	struct rk3399_pmucru *pmucru;
 	struct rk3399_pmusgrf_regs *pmusgrf;
 	struct rk3399_ddr_cic_regs *cic;
@@ -48,7 +52,7 @@ struct dram_info {
 #define PRESET_GPIO0_HOLD(n)	((0x1 << (7 + 16)) | ((n) << 7))
 #define PRESET_GPIO1_HOLD(n)	((0x1 << (8 + 16)) | ((n) << 8))
 
-#define PHY_DRV_ODT_Hi_Z	0x0
+#define PHY_DRV_ODT_HI_Z	0x0
 #define PHY_DRV_ODT_240		0x1
 #define PHY_DRV_ODT_120		0x8
 #define PHY_DRV_ODT_80		0x9
@@ -68,6 +72,13 @@ struct rockchip_dmc_plat {
 	struct regmap *map;
 };
 
+u32 g_pwrup_srefresh_exit[2];
+
+struct rk3399_sdram_params dfs_configs[] = {
+#include "sdram-rk3399-lpddr4-400.inc"
+#include "sdram-rk3399-lpddr4-800.inc"
+};
+
 #define CRU_SFTRST_DDR_CTRL(ch, n)	((0x1 << (8 + 16 + (ch) * 4)) | \
 						((n) << (8 + (ch) * 4)))
 #define CRU_SFTRST_DDR_PHY(ch, n)	((0x1 << (9 + 16 + (ch) * 4)) | \
@@ -140,7 +151,8 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 	if (sdram_ch->cap_info.ddrconfig < 2 ||
 	    sdram_ch->cap_info.ddrconfig == 4)
 		row = 16;
-	else if (sdram_ch->cap_info.ddrconfig == 3)
+	else if (sdram_ch->cap_info.ddrconfig == 3 ||
+		 sdram_ch->cap_info.ddrconfig == 5)
 		row = 14;
 	else
 		row = 15;
@@ -164,6 +176,15 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 	clrsetbits_le32(&denali_pi[155], (0x3 << 16) | (0x7 << 24),
 			((3 - sdram_ch->cap_info.bk) << 16) |
 			((16 - row) << 24));
+	if (sdram_params->base.dramtype == LPDDR4) {
+		if (cs_map == 1)
+			cs_map = 0x5;
+		else if (cs_map == 2)
+			cs_map = 0xa;
+		else
+			cs_map = 0xF;
+	}
+
 	/* PI_41 PI_CS_MAP:RW:24:4 */
 	clrsetbits_le32(&denali_pi[41], 0xf << 24, cs_map << 24);
 	if (sdram_ch->cap_info.rank == 1 &&
@@ -171,56 +192,478 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 		writel(0x2EC7FFFF, &denali_pi[34]);
 }
 
-static void set_ds_odt(const struct chan_info *chan,
-		       const struct rk3399_sdram_params *sdram_params)
+static void phy_io_config(const struct chan_info *chan,
+			  struct rk3399_sdram_params *sdram_params, u32 rd_vref,
+			  u32 b_reg, u32 channel)
 {
-	u32 *denali_phy = chan->publ->denali_phy;
+	u32 *denali_phy;
+	u32 *denali_ctl;
+	u32 vref_mode_dq = 0, vref_value_dq = 0;
+	u32 vref_mode_ac = 0, vref_value_ac = 0;
+	u32 mode_sel = 0;
+	u32 boostp, boostn;
+	u32 slewp, slewn;
+	u32 speed;
+	u32 rx_cm_input;
+	u32 reg_value;
+	u32 ds_value, odt_value;
+
+	if (b_reg) {
+		denali_phy = chan->publ->denali_phy;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_phy = sdram_params->phy_regs.denali_phy;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	rd_vref *= 1000;
+	/* vref setting & mode setting */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		if (rd_vref < 36700) {
+			/* MODE_LV[2:0] = LPDDR4 (Range 2)*/
+			vref_mode_dq = 0x7;
+			/* MODE[2:0]= LPDDR4 Range 2(0.4*VDDQ) */
+			mode_sel = 0x5;
+			vref_value_dq = (rd_vref - 3300) / 521;
+		} else {
+			/* MODE_LV[2:0] = LPDDR4 (Range 1)*/
+			vref_mode_dq = 0x6;
+			/* MODE[2:0]= LPDDR4 Range 1(0.33*VDDQ) */
+			mode_sel = 0x4;
+			vref_value_dq = (rd_vref - 15300) / 521;
+		}
+		vref_mode_ac = 0x6;
+		/* VDDQ/3/2=16.8% */
+		vref_value_ac = 0x3;
+	} else if (sdram_params->base.dramtype == LPDDR3) {
+		/* LPDDR3 */
+		if (sdram_params->base.odt == 1) {
+			vref_mode_dq = 0x5;  /*LPDDR3 ODT*/
+			ds_value = readl(&denali_ctl[138]) & 0xf;
+			odt_value = (readl(&denali_phy[6]) >> 4) & 0xf;
+			if (ds_value == 0x3) {	/* 48ohm */
+				switch (odt_value) {
+				case PHY_DRV_ODT_240:
+					vref_value_dq = 0x1B;
+					break;
+				case PHY_DRV_ODT_120:
+					vref_value_dq = 0x26;
+					break;
+				case PHY_DRV_ODT_60:
+					vref_value_dq = 0x36;
+					break;
+				}
+			} else if (ds_value == 0x2) {  /* 40ohm */
+				switch (odt_value) {
+				case PHY_DRV_ODT_240:
+					vref_value_dq = 0x19;
+					break;
+				case PHY_DRV_ODT_120:
+					vref_value_dq = 0x23;
+					break;
+				case PHY_DRV_ODT_60:
+					vref_value_dq = 0x31;
+					break;
+				}
+			} else if (ds_value == 0x1) {  /*34.3ohm*/
+				switch (odt_value) {
+				case PHY_DRV_ODT_240:
+					vref_value_dq = 0x17;
+					break;
+				case PHY_DRV_ODT_120:
+					vref_value_dq = 0x20;
+					break;
+				case PHY_DRV_ODT_60:
+					vref_value_dq = 0x2e;
+					break;
+				}
+			}
+		} else {
+			vref_mode_dq = 0x2;
+			vref_value_dq = 0x1f;
+		}
+		vref_mode_ac = 0x2;
+		vref_value_ac = 0x1f;
+		mode_sel = 0x0;
+	} else if (sdram_params->base.dramtype == DDR3) {
+		vref_mode_dq = 0x1;
+		vref_value_dq = 0x1f;
+		vref_mode_ac = 0x1;
+		vref_value_ac = 0x1f;
+		mode_sel = 0x1;
+	}
+
+	reg_value = (vref_mode_dq << 9) | (0x1 << 8) | vref_value_dq;
+	/* PHY_913 PHY_PAD_VREF_CTRL_DQ_0 12bits offset_8 */
+	clrsetbits_le32(&denali_phy[913], 0xfff << 8, reg_value << 8);
+	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_1 12bits offset_0 */
+	clrsetbits_le32(&denali_phy[914], 0xfff, reg_value);
+	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_2 12bits offset_16 */
+	clrsetbits_le32(&denali_phy[914], 0xfff << 16, reg_value << 16);
+	/* PHY_915 PHY_PAD_VREF_CTRL_DQ_3 12bits offset_0 */
+	clrsetbits_le32(&denali_phy[915], 0xfff, reg_value);
+
+	reg_value = (vref_mode_ac << 9) | (0x1 << 8) | vref_value_ac;
+	/* PHY_915 PHY_PAD_VREF_CTRL_AC 12bits offset_16 */
+	clrsetbits_le32(&denali_phy[915], 0xfff << 16, reg_value << 16);
+
+	/* PHY_924 PHY_PAD_FDBK_DRIVE */
+	clrsetbits_le32(&denali_phy[924], 0x7 << 15, mode_sel << 15);
+	/* PHY_926 PHY_PAD_DATA_DRIVE */
+	clrsetbits_le32(&denali_phy[926], 0x7 << 6, mode_sel << 6);
+	/* PHY_927 PHY_PAD_DQS_DRIVE */
+	clrsetbits_le32(&denali_phy[927], 0x7 << 6, mode_sel << 6);
+	/* PHY_928 PHY_PAD_ADDR_DRIVE */
+	clrsetbits_le32(&denali_phy[928], 0x7 << 14, mode_sel << 14);
+	/* PHY_929 PHY_PAD_CLK_DRIVE */
+	clrsetbits_le32(&denali_phy[929], 0x7 << 14, mode_sel << 14);
+	/* PHY_935 PHY_PAD_CKE_DRIVE */
+	clrsetbits_le32(&denali_phy[935], 0x7 << 14, mode_sel << 14);
+	/* PHY_937 PHY_PAD_RST_DRIVE */
+	clrsetbits_le32(&denali_phy[937], 0x7 << 14, mode_sel << 14);
+	/* PHY_939 PHY_PAD_CS_DRIVE */
+	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
+
+	/* BOOSTP_EN & BOOSTn_EN */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		boostp = 0x1;
+		boostn = 0x1;
+		reg_value = ((boostp << 4) | boostn);
+		/* PHY_925 PHY_PAD_FDBK_DRIVE2 */
+		clrsetbits_le32(&denali_phy[925], 0xff << 8, reg_value << 8);
+		/* PHY_926 PHY_PAD_DATA_DRIVE */
+		clrsetbits_le32(&denali_phy[926], 0xff << 12, reg_value << 12);
+		/* PHY_927 PHY_PAD_DQS_DRIVE */
+		clrsetbits_le32(&denali_phy[927], 0xff << 14, reg_value << 14);
+		/* PHY_928 PHY_PAD_ADDR_DRIVE */
+		clrsetbits_le32(&denali_phy[928], 0xff << 20, reg_value << 20);
+		/* PHY_929 PHY_PAD_CLK_DRIVE */
+		clrsetbits_le32(&denali_phy[929], 0xff << 22, reg_value << 22);
+		/* PHY_935 PHY_PAD_CKE_DRIVE */
+		clrsetbits_le32(&denali_phy[935], 0xff << 20, reg_value << 20);
+		/* PHY_937 PHY_PAD_RST_DRIVE */
+		clrsetbits_le32(&denali_phy[937], 0xff << 20, reg_value << 20);
+		/* PHY_939 PHY_PAD_CS_DRIVE */
+		clrsetbits_le32(&denali_phy[939], 0xff << 20, reg_value << 20);
+	}
+
+	/* SLEWP & SLEWN */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		slewp = 0x1;
+		slewn = 0x1;
+		reg_value = ((slewp << 3) | slewn);
+		/* PHY_924 PHY_PAD_FDBK_DRIVE */
+		clrsetbits_le32(&denali_phy[924], 0x3f << 8, reg_value << 8);
+		/* PHY_926 PHY_PAD_DATA_DRIVE */
+		clrsetbits_le32(&denali_phy[926], 0x3f, reg_value);
+		/* PHY_927 PHY_PAD_DQS_DRIVE */
+		clrsetbits_le32(&denali_phy[927], 0x3f, reg_value);
+		/* PHY_928 PHY_PAD_ADDR_DRIVE */
+		clrsetbits_le32(&denali_phy[928], 0x3f << 8, reg_value << 8);
+		/* PHY_929 PHY_PAD_CLK_DRIVE */
+		clrsetbits_le32(&denali_phy[929], 0x3f << 8, reg_value << 8);
+		/* PHY_935 PHY_PAD_CKE_DRIVE */
+		clrsetbits_le32(&denali_phy[935], 0x3f << 8, reg_value << 8);
+		/* PHY_937 PHY_PAD_RST_DRIVE */
+		clrsetbits_le32(&denali_phy[937], 0x3f << 8, reg_value << 8);
+		/* PHY_939 PHY_PAD_CS_DRIVE */
+		clrsetbits_le32(&denali_phy[939], 0x3f << 8, reg_value << 8);
+	}
+
+	/* speed setting */
+	if (sdram_params->base.ddr_freq < 400 * MHz)
+		speed = 0x0;
+	else if (sdram_params->base.ddr_freq < 800 * MHz)
+		speed = 0x1;
+	else if (sdram_params->base.ddr_freq < 1200 * MHz)
+		speed = 0x2;
+	speed = 0x2;
+
+	/* PHY_924 PHY_PAD_FDBK_DRIVE */
+	clrsetbits_le32(&denali_phy[924], 0x3 << 21, speed << 21);
+	/* PHY_926 PHY_PAD_DATA_DRIVE */
+	clrsetbits_le32(&denali_phy[926], 0x3 << 9, speed << 9);
+	/* PHY_927 PHY_PAD_DQS_DRIVE */
+	clrsetbits_le32(&denali_phy[927], 0x3 << 9, speed << 9);
+	/* PHY_928 PHY_PAD_ADDR_DRIVE */
+	clrsetbits_le32(&denali_phy[928], 0x3 << 17, speed << 17);
+	/* PHY_929 PHY_PAD_CLK_DRIVE */
+	clrsetbits_le32(&denali_phy[929], 0x3 << 17, speed << 17);
+	/* PHY_935 PHY_PAD_CKE_DRIVE */
+	clrsetbits_le32(&denali_phy[935], 0x3 << 17, speed << 17);
+	/* PHY_937 PHY_PAD_RST_DRIVE */
+	clrsetbits_le32(&denali_phy[937], 0x3 << 17, speed << 17);
+	/* PHY_939 PHY_PAD_CS_DRIVE */
+	clrsetbits_le32(&denali_phy[939], 0x3 << 17, speed << 17);
+
+	/* RX_CM_INPUT */
+	if (sdram_params->base.dramtype == LPDDR4) {
+		rx_cm_input = 0x1;
+		/* PHY_924 PHY_PAD_FDBK_DRIVE */
+		clrsetbits_le32(&denali_phy[924], 0x1 << 14, rx_cm_input << 14);
+		/* PHY_926 PHY_PAD_DATA_DRIVE */
+		clrsetbits_le32(&denali_phy[926], 0x1 << 11, rx_cm_input << 11);
+		/* PHY_927 PHY_PAD_DQS_DRIVE */
+		clrsetbits_le32(&denali_phy[927], 0x1 << 13, rx_cm_input << 13);
+		/* PHY_928 PHY_PAD_ADDR_DRIVE */
+		clrsetbits_le32(&denali_phy[928], 0x1 << 19, rx_cm_input << 19);
+		/* PHY_929 PHY_PAD_CLK_DRIVE */
+		clrsetbits_le32(&denali_phy[929], 0x1 << 21, rx_cm_input << 21);
+		/* PHY_935 PHY_PAD_CKE_DRIVE */
+		clrsetbits_le32(&denali_phy[935], 0x1 << 19, rx_cm_input << 19);
+		/* PHY_937 PHY_PAD_RST_DRIVE */
+		clrsetbits_le32(&denali_phy[937], 0x1 << 19, rx_cm_input << 19);
+		/* PHY_939 PHY_PAD_CS_DRIVE */
+		clrsetbits_le32(&denali_phy[939], 0x1 << 19, rx_cm_input << 19);
+	}
+}
+
+struct io_setting {
+	u32 mhz;
+	u32 mr5;
+	/* dram side */
+	u32 dq_odt;
+	u32 ca_odt;
+	u32 pdds;
+	u32 dq_vref;
+	u32 ca_vref;
+	/* phy side */
+	u32 rd_odt;
+	u32 wr_dq_drv;
+	u32 wr_ca_drv;
+	u32 wr_ckcs_drv;
+	u32 rd_odt_en;
+	u32 rd_vref;
+};
+
+struct io_setting lp4_io_set[] = {
+	{
+		50 * MHz,
+		0,
+		/* dram side */
+		0,	/* dq_odt; */
+		0,	/* ca_odt; */
+		6,	/* pdds; */
+		0x72,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_HI_Z,	/* rd_odt; */
+		PHY_DRV_ODT_40,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		0,	/* rd_odt_en;*/
+		41,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+	{
+		400 * MHz,
+		0,
+		/* dram side */
+		0,	/* dq_odt; */
+		0,	/* ca_odt; */
+		6,	/* pdds; */
+		0x72,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_HI_Z,	/* rd_odt; */
+		PHY_DRV_ODT_40,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		0,	/* rd_odt_en; */
+		/* shmoo result, read signal 41% is the best */
+		41,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+	{
+		800 * MHz,
+		0,
+		/* dram side */
+		0,	/* dq_odt; */
+		0,	/* ca_odt; */
+		1,	/* pdds; */
+		0x72,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_40,	/* rd_odt; */
+		PHY_DRV_ODT_40,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		1,	/* rd_odt_en; */
+		17,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+	{
+		1066 * MHz,
+		0,
+		/* dram side */
+		6,	/* dq_odt; */
+		0,	/* ca_odt; */
+		1,	/* pdds; */
+		0x10,	/* dq_vref; */
+		0x72,	/* ca_vref; */
+		/* phy side */
+		PHY_DRV_ODT_40,	/* rd_odt; */
+		PHY_DRV_ODT_60,	/* wr_dq_drv; */
+		PHY_DRV_ODT_40,	/* wr_ca_drv; */
+		PHY_DRV_ODT_40,	/* wr_ckcs_drv; */
+		1,	/* rd_odt_en; */
+		17,	/* rd_vref; (unit %, range 3.3% - 48.7%) */
+	},
+};
 
+static struct io_setting *get_io_set(struct rk3399_sdram_params *sdram_params,
+				     u32 mr5)
+{
+	struct io_setting *io = NULL;
+	u32 n;
+
+	for (n = 0; n < ARRAY_SIZE(lp4_io_set); n++) {
+		io = &lp4_io_set[n];
+		if (io->mr5 != 0) {
+			if (io->mhz >= sdram_params->base.ddr_freq &&
+			    io->mr5 == mr5)
+				break;
+		} else {
+			if (io->mhz >= sdram_params->base.ddr_freq)
+				break;
+		}
+	}
+	return io;
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_ds_odt(const struct chan_info *chan,
+		       struct rk3399_sdram_params *sdram_params, u32 b_reg,
+		       u32 channel, u32 mr5)
+{
+	u32 *denali_phy;
+	u32 *denali_ctl;
 	u32 tsel_idle_en, tsel_wr_en, tsel_rd_en;
-	u32 tsel_idle_select_p, tsel_wr_select_p, tsel_rd_select_p;
-	u32 ca_tsel_wr_select_p, ca_tsel_wr_select_n;
-	u32 tsel_idle_select_n, tsel_wr_select_n, tsel_rd_select_n;
+	u32 tsel_idle_select_p, tsel_rd_select_p;
+	u32 tsel_idle_select_n, tsel_rd_select_n;
+	u32 tsel_wr_select_dq_p, tsel_wr_select_ca_p;
+	u32 tsel_wr_select_dq_n, tsel_wr_select_ca_n;
+	u32 soc_odt = 0;
+	u32 tsel_ckcs_select_p, tsel_ckcs_select_n;
 	u32 reg_value;
+	struct io_setting *io = NULL;
+
+	if (b_reg) {
+		denali_phy = chan->publ->denali_phy;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_phy = sdram_params->phy_regs.denali_phy;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
 
 	if (sdram_params->base.dramtype == LPDDR4) {
-		tsel_rd_select_p = PHY_DRV_ODT_Hi_Z;
-		tsel_wr_select_p = PHY_DRV_ODT_40;
-		ca_tsel_wr_select_p = PHY_DRV_ODT_40;
-		tsel_idle_select_p = PHY_DRV_ODT_Hi_Z;
+		io = get_io_set(sdram_params, mr5);
 
-		tsel_rd_select_n = PHY_DRV_ODT_240;
-		tsel_wr_select_n = PHY_DRV_ODT_40;
-		ca_tsel_wr_select_n = PHY_DRV_ODT_40;
-		tsel_idle_select_n = PHY_DRV_ODT_240;
+		tsel_rd_select_p = PHY_DRV_ODT_HI_Z;
+		tsel_rd_select_n = io->rd_odt;
+
+		tsel_idle_select_p = PHY_DRV_ODT_HI_Z;
+		tsel_idle_select_n = PHY_DRV_ODT_HI_Z;
+
+		tsel_wr_select_dq_p = io->wr_dq_drv;
+		tsel_wr_select_dq_n = PHY_DRV_ODT_34_3;
+
+		tsel_wr_select_ca_p = io->wr_ca_drv;
+		tsel_wr_select_ca_n = PHY_DRV_ODT_34_3;
+
+		tsel_ckcs_select_p = io->wr_ckcs_drv;
+		tsel_ckcs_select_n = PHY_DRV_ODT_34_3;
+
+		switch (tsel_rd_select_n) {
+		case PHY_DRV_ODT_240:
+			soc_odt = 1;
+			break;
+		case PHY_DRV_ODT_120:
+			soc_odt = 2;
+			break;
+		case PHY_DRV_ODT_80:
+			soc_odt = 3;
+			break;
+		case PHY_DRV_ODT_60:
+			soc_odt = 4;
+			break;
+		case PHY_DRV_ODT_48:
+			soc_odt = 5;
+			break;
+		case PHY_DRV_ODT_40:
+			soc_odt = 6;
+			break;
+		case PHY_DRV_ODT_34_3:
+			soc_odt = 6;
+			printf("LPDDR4 MR22 Soc ODT not support\n");
+			break;
+		case PHY_DRV_ODT_HI_Z:
+		default:
+			soc_odt = 0;
+			break;
+		}
 	} else if (sdram_params->base.dramtype == LPDDR3) {
 		tsel_rd_select_p = PHY_DRV_ODT_240;
-		tsel_wr_select_p = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_p = PHY_DRV_ODT_48;
+		tsel_rd_select_n = PHY_DRV_ODT_HI_Z;
+
 		tsel_idle_select_p = PHY_DRV_ODT_240;
+		tsel_idle_select_n = PHY_DRV_ODT_HI_Z;
+
+		tsel_wr_select_dq_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_dq_n = PHY_DRV_ODT_34_3;
 
-		tsel_rd_select_n = PHY_DRV_ODT_Hi_Z;
-		tsel_wr_select_n = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_n = PHY_DRV_ODT_48;
-		tsel_idle_select_n = PHY_DRV_ODT_Hi_Z;
+		tsel_wr_select_ca_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_ca_n = PHY_DRV_ODT_34_3;
+
+		tsel_ckcs_select_p = PHY_DRV_ODT_34_3;
+		tsel_ckcs_select_n = PHY_DRV_ODT_34_3;
 	} else {
 		tsel_rd_select_p = PHY_DRV_ODT_240;
-		tsel_wr_select_p = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_p = PHY_DRV_ODT_34_3;
-		tsel_idle_select_p = PHY_DRV_ODT_240;
-
 		tsel_rd_select_n = PHY_DRV_ODT_240;
-		tsel_wr_select_n = PHY_DRV_ODT_34_3;
-		ca_tsel_wr_select_n = PHY_DRV_ODT_34_3;
+
+		tsel_idle_select_p = PHY_DRV_ODT_240;
 		tsel_idle_select_n = PHY_DRV_ODT_240;
-	}
 
-	if (sdram_params->base.odt == 1)
-		tsel_rd_en = 1;
-	else
-		tsel_rd_en = 0;
+		tsel_wr_select_dq_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_dq_n = PHY_DRV_ODT_34_3;
+
+		tsel_wr_select_ca_p = PHY_DRV_ODT_34_3;
+		tsel_wr_select_ca_n = PHY_DRV_ODT_34_3;
 
+		tsel_ckcs_select_p = PHY_DRV_ODT_34_3;
+		tsel_ckcs_select_n = PHY_DRV_ODT_34_3;
+	}
+
+	if (sdram_params->base.dramtype == LPDDR4) {
+		if (sdram_params->base.odt == 1) {
+			tsel_rd_en = io->rd_odt_en;
+			tsel_idle_en = 0;
+		} else {
+			tsel_rd_en = 0;
+			tsel_idle_en = 0;
+		}
+	} else {
+		tsel_rd_en = sdram_params->base.odt;
+		tsel_idle_en = 0;
+	}
 	tsel_wr_en = 0;
-	tsel_idle_en = 0;
+
+#define CS0_MR22_VAL (0)
+#define CS1_MR22_VAL (3)
+	/* F0_0 */
+	clrsetbits_le32(&denali_ctl[145], 0xFF << 16,
+			(soc_odt | (CS0_MR22_VAL << 3)) << 16);
+	/* F2_0, F1_0 */
+	clrsetbits_le32(&denali_ctl[146], 0xFF00FF,
+			((soc_odt | (CS0_MR22_VAL << 3)) << 16) |
+			(soc_odt | (CS0_MR22_VAL << 3)));
+	/* F0_1 */
+	clrsetbits_le32(&denali_ctl[159], 0xFF << 16,
+			(soc_odt | (CS1_MR22_VAL << 3)) << 16);
+	/* F2_1, F1_1 */
+	clrsetbits_le32(&denali_ctl[160], 0xFF00FF,
+			((soc_odt | (CS1_MR22_VAL << 3)) << 16) |
+			(soc_odt | (CS1_MR22_VAL << 3)));
 
 	/*
 	 * phy_dq_tsel_select_X 24bits DENALI_PHY_6/134/262/390 offset_0
@@ -228,8 +671,8 @@ static void set_ds_odt(const struct chan_info *chan,
 	 * for write cycles for DQ/DM
 	 */
 	reg_value = tsel_rd_select_n | (tsel_rd_select_p << 0x4) |
-		    (tsel_wr_select_n << 8) | (tsel_wr_select_p << 12) |
-		    (tsel_idle_select_n << 16) | (tsel_idle_select_p << 20);
+		(tsel_wr_select_dq_n << 8) | (tsel_wr_select_dq_p << 12) |
+		(tsel_idle_select_n << 16) | (tsel_idle_select_p << 20);
 	clrsetbits_le32(&denali_phy[6], 0xffffff, reg_value);
 	clrsetbits_le32(&denali_phy[134], 0xffffff, reg_value);
 	clrsetbits_le32(&denali_phy[262], 0xffffff, reg_value);
@@ -246,31 +689,43 @@ static void set_ds_odt(const struct chan_info *chan,
 	clrsetbits_le32(&denali_phy[391], 0xffffff, reg_value);
 
 	/* phy_adr_tsel_select_ 8bits DENALI_PHY_544/672/800 offset_0 */
-	reg_value = ca_tsel_wr_select_n | (ca_tsel_wr_select_p << 0x4);
-	clrsetbits_le32(&denali_phy[544], 0xff, reg_value);
-	clrsetbits_le32(&denali_phy[672], 0xff, reg_value);
-	clrsetbits_le32(&denali_phy[800], 0xff, reg_value);
+	reg_value = tsel_wr_select_ca_n | (tsel_wr_select_ca_p << 0x4);
+	if (sdram_params->base.dramtype == LPDDR4) {
+		/* LPDDR4 these register read always return 0, so
+		 * can not use clrsetbits_le32(), need to write32
+		 */
+		writel((0x300 << 8) | reg_value, &denali_phy[544]);
+		writel((0x300 << 8) | reg_value, &denali_phy[672]);
+		writel((0x300 << 8) | reg_value, &denali_phy[800]);
+	} else {
+		clrsetbits_le32(&denali_phy[544], 0xff, reg_value);
+		clrsetbits_le32(&denali_phy[672], 0xff, reg_value);
+		clrsetbits_le32(&denali_phy[800], 0xff, reg_value);
+	}
 
 	/* phy_pad_addr_drive 8bits DENALI_PHY_928 offset_0 */
 	clrsetbits_le32(&denali_phy[928], 0xff, reg_value);
 
 	/* phy_pad_rst_drive 8bits DENALI_PHY_937 offset_0 */
-	clrsetbits_le32(&denali_phy[937], 0xff, reg_value);
+	if (!b_reg)
+		clrsetbits_le32(&denali_phy[937], 0xff, reg_value);
 
 	/* phy_pad_cke_drive 8bits DENALI_PHY_935 offset_0 */
 	clrsetbits_le32(&denali_phy[935], 0xff, reg_value);
 
 	/* phy_pad_cs_drive 8bits DENALI_PHY_939 offset_0 */
-	clrsetbits_le32(&denali_phy[939], 0xff, reg_value);
+	clrsetbits_le32(&denali_phy[939], 0xff,
+			tsel_ckcs_select_n | (tsel_ckcs_select_p << 0x4));
 
 	/* phy_pad_clk_drive 8bits DENALI_PHY_929 offset_0 */
-	clrsetbits_le32(&denali_phy[929], 0xff, reg_value);
+	clrsetbits_le32(&denali_phy[929], 0xff,
+			tsel_ckcs_select_n | (tsel_ckcs_select_p << 0x4));
 
 	/* phy_pad_fdbk_drive 23bit DENALI_PHY_924/925 */
 	clrsetbits_le32(&denali_phy[924], 0xff,
-			tsel_wr_select_n | (tsel_wr_select_p << 4));
+			tsel_wr_select_ca_n | (tsel_wr_select_ca_p << 4));
 	clrsetbits_le32(&denali_phy[925], 0xff,
-			tsel_rd_select_n | (tsel_rd_select_p << 4));
+			tsel_wr_select_dq_n | (tsel_wr_select_dq_p << 4));
 
 	/* phy_dq_tsel_enable_X 3bits DENALI_PHY_5/133/261/389 offset_16 */
 	reg_value = (tsel_rd_en | (tsel_wr_en << 1) | (tsel_idle_en << 2))
@@ -308,170 +763,483 @@ static void set_ds_odt(const struct chan_info *chan,
 
 	/* phy_pad_fdbk_term 1bit DENALI_PHY_930 offset_17 */
 	clrsetbits_le32(&denali_phy[930], 0x1 << 17, reg_value);
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		phy_io_config(chan, sdram_params, io->rd_vref, b_reg, channel);
+	else
+		phy_io_config(chan, sdram_params, 0, b_reg, channel);
 }
 
-static int phy_io_config(const struct chan_info *chan,
-			 const struct rk3399_sdram_params *sdram_params)
+static void pctl_start(struct dram_info *dram,
+		       struct rk3399_sdram_params *sdram_params,
+		       u32 channel_mask)
 {
-	u32 *denali_phy = chan->publ->denali_phy;
-	u32 vref_mode_dq, vref_value_dq, vref_mode_ac, vref_value_ac;
-	u32 mode_sel;
-	u32 reg_value;
-	u32 drv_value, odt_value;
-	u32 speed;
+	const struct chan_info *chan_0 = &dram->chan[0];
+	const struct chan_info *chan_1 = &dram->chan[1];
 
-	/* vref setting */
-	if (sdram_params->base.dramtype == LPDDR4) {
-		/* LPDDR4 */
-		vref_mode_dq = 0x6;
-		vref_value_dq = 0x1f;
-		vref_mode_ac = 0x6;
-		vref_value_ac = 0x1f;
-	} else if (sdram_params->base.dramtype == LPDDR3) {
-		if (sdram_params->base.odt == 1) {
-			vref_mode_dq = 0x5;  /* LPDDR3 ODT */
-			drv_value = (readl(&denali_phy[6]) >> 12) & 0xf;
-			odt_value = (readl(&denali_phy[6]) >> 4) & 0xf;
-			if (drv_value == PHY_DRV_ODT_48) {
-				switch (odt_value) {
-				case PHY_DRV_ODT_240:
-					vref_value_dq = 0x16;
-					break;
-				case PHY_DRV_ODT_120:
-					vref_value_dq = 0x26;
-					break;
-				case PHY_DRV_ODT_60:
-					vref_value_dq = 0x36;
-					break;
-				default:
-					debug("Invalid ODT value.\n");
-					return -EINVAL;
-				}
-			} else if (drv_value == PHY_DRV_ODT_40) {
-				switch (odt_value) {
-				case PHY_DRV_ODT_240:
-					vref_value_dq = 0x19;
-					break;
-				case PHY_DRV_ODT_120:
-					vref_value_dq = 0x23;
-					break;
-				case PHY_DRV_ODT_60:
-					vref_value_dq = 0x31;
-					break;
-				default:
-					debug("Invalid ODT value.\n");
-					return -EINVAL;
-				}
-			} else if (drv_value == PHY_DRV_ODT_34_3) {
-				switch (odt_value) {
-				case PHY_DRV_ODT_240:
-					vref_value_dq = 0x17;
-					break;
-				case PHY_DRV_ODT_120:
-					vref_value_dq = 0x20;
-					break;
-				case PHY_DRV_ODT_60:
-					vref_value_dq = 0x2e;
-					break;
-				default:
-					debug("Invalid ODT value.\n");
-					return -EINVAL;
-				}
-			} else {
-				debug("Invalid DRV value.\n");
-				return -EINVAL;
+	u32 *denali_ctl_0 = chan_0->pctl->denali_ctl;
+	u32 *denali_phy_0 = chan_0->publ->denali_phy;
+	u32 *denali_ctl_1 = chan_1->pctl->denali_ctl;
+	u32 *denali_phy_1 = chan_1->publ->denali_phy;
+	u32 count, byte, tmp;
+
+	/* PHY_DLL_RST_EN */
+	if (channel_mask & 1) {
+		writel(0x01000000, &dram->grf->ddrc0_con0);
+		clrsetbits_le32(&denali_phy_0[957], 0x3 << 24, 0x2 << 24);
+	}
+
+	if (channel_mask & 1) {
+		count = 0;
+		while (!(readl(&denali_ctl_0[203]) & (1 << 3))) {
+			if (count > 1000) {
+				printf("channel 0 init err!\n");
+				while (1)
+					;
 			}
-		} else {
-			vref_mode_dq = 0x2;  /* LPDDR3 */
-			vref_value_dq = 0x1f;
+			udelay(1);
+			count++;
 		}
-		vref_mode_ac = 0x2;
-		vref_value_ac = 0x1f;
-	} else if (sdram_params->base.dramtype == DDR3) {
-		/* DDR3L */
-		vref_mode_dq = 0x1;
-		vref_value_dq = 0x1f;
-		vref_mode_ac = 0x1;
-		vref_value_ac = 0x1f;
+
+		writel(0x01000100, &dram->grf->ddrc0_con0);
+		for (byte = 0; byte < 4; byte++)	{
+			tmp = 0x820;
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[53 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[54 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[55 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[56 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_0[57 + (128 * byte)]);
+			clrsetbits_le32(&denali_phy_0[58 + (128 * byte)],
+					0xffff, tmp);
+		}
+		clrsetbits_le32(&denali_ctl_0[68], PWRUP_SREFRESH_EXIT,
+				g_pwrup_srefresh_exit[0]);
+	}
+
+	if (channel_mask & 2) {
+		writel(0x01000000, &dram->grf->ddrc1_con0);
+		clrsetbits_le32(&denali_phy_1[957], 0x3 << 24, 0x2 << 24);
+	}
+	if (channel_mask & 2) {
+		count = 0;
+		while (!(readl(&denali_ctl_1[203]) & (1 << 3))) {
+			if (count > 1000) {
+				printf("channel 1 init err!\n");
+				while (1)
+					;
+			}
+			udelay(1);
+			count++;
+		}
+
+		writel(0x01000100, &dram->grf->ddrc1_con0);
+		for (byte = 0; byte < 4; byte++)	{
+			tmp = 0x820;
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[53 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[54 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[55 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[56 + (128 * byte)]);
+			writel((tmp << 16) | tmp,
+			       &denali_phy_1[57 + (128 * byte)]);
+			clrsetbits_le32(&denali_phy_1[58 + (128 * byte)],
+					0xffff, tmp);
+		}
+
+		clrsetbits_le32(&denali_ctl_1[68], PWRUP_SREFRESH_EXIT,
+				g_pwrup_srefresh_exit[1]);
+
+		/*
+		 * restore channel 1 RESET original setting
+		 * to avoid 240ohm too weak to prevent ESD test
+		 */
+		if (sdram_params->base.dramtype == LPDDR4)
+			clrsetbits_le32(&denali_phy_1[937], 0xff,
+					sdram_params->phy_regs.denali_phy[937] &
+					0xFF);
+	}
+}
+
+/* phy_fn = 0, PHY boot freq
+ * phy_fn = 1, PHY index 0
+ * phy_fn = 2, PHY index 1
+ */
+static struct rk3399_sdram_params
+	*get_phy_index_params(u32 phy_fn,
+			      struct rk3399_sdram_params *sdram_params)
+{
+	if (phy_fn == 0)
+		return sdram_params;
+	else if (phy_fn == 1)
+		return &dfs_configs[1];
+	else if (phy_fn == 2)
+		return &dfs_configs[0];
+	else
+		return NULL;
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_dq_odt(const struct chan_info *chan,
+			   struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			   u32 en, u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
 	} else {
-		debug("Unknown DRAM type.\n");
-		return -EINVAL;
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
 	}
+	io = get_io_set(sdram_params, mr5);
+	if (en)
+		reg_value = io->dq_odt;
+	else
+		reg_value = 0;
 
-	reg_value = (vref_mode_dq << 9) | (0x1 << 8) | vref_value_dq;
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[139], 0x7 << 24, reg_value << 24);
+		clrsetbits_le32(&denali_ctl[153], 0x7 << 24, reg_value << 24);
 
-	/* PHY_913 PHY_PAD_VREF_CTRL_DQ_0 12bits offset_8 */
-	clrsetbits_le32(&denali_phy[913], 0xfff << 8, reg_value << 8);
-	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_1 12bits offset_0 */
-	clrsetbits_le32(&denali_phy[914], 0xfff, reg_value);
-	/* PHY_914 PHY_PAD_VREF_CTRL_DQ_2 12bits offset_16 */
-	clrsetbits_le32(&denali_phy[914], 0xfff << 16, reg_value << 16);
-	/* PHY_915 PHY_PAD_VREF_CTRL_DQ_3 12bits offset_0 */
-	clrsetbits_le32(&denali_phy[915], 0xfff, reg_value);
+		clrsetbits_le32(&denali_pi[132], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[139], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[147], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[154], 0x7 << 16, (reg_value << 16));
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 0, reg_value << 0);
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 0, reg_value << 0);
+
+		clrsetbits_le32(&denali_pi[129], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[137], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[144], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[152], 0x7 << 0, (reg_value << 0));
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 8, (reg_value << 8));
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 8, (reg_value << 8));
 
-	reg_value = (vref_mode_ac << 9) | (0x1 << 8) | vref_value_ac;
+		clrsetbits_le32(&denali_pi[127], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[134], 0x7 << 16, (reg_value << 16));
+		clrsetbits_le32(&denali_pi[142], 0x7 << 0, (reg_value << 0));
+		clrsetbits_le32(&denali_pi[149], 0x7 << 16, (reg_value << 16));
+		break;
+	}
+}
 
-	/* PHY_915 PHY_PAD_VREF_CTRL_AC 12bits offset_16 */
-	clrsetbits_le32(&denali_phy[915], 0xfff << 16, reg_value << 16);
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_ca_odt(const struct chan_info *chan,
+			   struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			   u32 en, u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
 
-	if (sdram_params->base.dramtype == LPDDR4)
-		mode_sel = 0x6;
-	else if (sdram_params->base.dramtype == LPDDR3)
-		mode_sel = 0x0;
-	else if (sdram_params->base.dramtype == DDR3)
-		mode_sel = 0x1;
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+	if (en)
+		reg_value = io->ca_odt;
 	else
-		return -EINVAL;
+		reg_value = 0;
+
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[139], 0x7 << 28, reg_value << 28);
+		clrsetbits_le32(&denali_ctl[153], 0x7 << 28, reg_value << 28);
+
+		clrsetbits_le32(&denali_pi[132], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[139], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[147], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[154], 0x7 << 20, reg_value << 20);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 4, reg_value << 4);
+
+		clrsetbits_le32(&denali_pi[129], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[137], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[144], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[152], 0x7 << 4, reg_value << 4);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[140], 0x7 << 12, (reg_value << 12));
+		clrsetbits_le32(&denali_ctl[154], 0x7 << 12, (reg_value << 12));
+
+		clrsetbits_le32(&denali_pi[127], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[134], 0x7 << 20, reg_value << 20);
+		clrsetbits_le32(&denali_pi[142], 0x7 << 4, reg_value << 4);
+		clrsetbits_le32(&denali_pi[149], 0x7 << 20, reg_value << 20);
+		break;
+	}
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_MR3(const struct chan_info *chan,
+			struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+
+	reg_value = ((io->pdds << 3) | 1);
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[138], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[152], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[131], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[139], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[146], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[154], 0xFFFF, reg_value);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[138], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[152], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[129], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[136], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[144], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[151], 0xFFFF << 16, reg_value << 16);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[139], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[153], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[126], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[134], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_pi[141], 0xFFFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[149], 0xFFFF, reg_value);
+		break;
+	}
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_MR12(const struct chan_info *chan,
+			 struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			 u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+
+	reg_value = io->ca_vref;
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[140], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[154], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[132], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[139], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[147], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[154], 0xFF << 24, reg_value << 24);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[141], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[155], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[129], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[137], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[144], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[152], 0xFF << 8, reg_value << 8);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[141], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[155], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[127], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[134], 0xFF << 24, reg_value << 24);
+		clrsetbits_le32(&denali_pi[142], 0xFF << 8, reg_value << 8);
+		clrsetbits_le32(&denali_pi[149], 0xFF << 24, reg_value << 24);
+		break;
+	}
+}
+
+/*
+ * b_reg: indicate whether set phy register
+ * or just set sdram_params.
+ * if b_reg = 0, channel, mr5 are not care
+ */
+static void set_lp4_MR14(const struct chan_info *chan,
+			 struct rk3399_sdram_params *sdram_params, u32 ctl_fn,
+			 u32 b_reg, u32 channel, u32 mr5)
+{
+	u32 *denali_ctl;
+	u32 *denali_pi;
+	u32 reg_value;
+	struct io_setting *io;
+
+	if (b_reg) {
+		denali_pi = chan->pi->denali_pi;
+		denali_ctl = chan->pctl->denali_ctl;
+	} else {
+		denali_pi = sdram_params->pi_regs.denali_pi;
+		denali_ctl = sdram_params->pctl_regs.denali_ctl;
+	}
+	io = get_io_set(sdram_params, mr5);
+
+	reg_value = io->dq_vref;
+	switch (ctl_fn) {
+	case 0:
+		clrsetbits_le32(&denali_ctl[142], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[156], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[132], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[140], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[147], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[155], 0xFF << 0, reg_value << 0);
+		break;
+	case 1:
+		clrsetbits_le32(&denali_ctl[143], 0xFFFF, reg_value);
+		clrsetbits_le32(&denali_ctl[157], 0xFFFF, reg_value);
+
+		clrsetbits_le32(&denali_pi[130], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[137], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[145], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[152], 0xFF << 16, reg_value << 16);
+		break;
+	case 2:
+	default:
+		clrsetbits_le32(&denali_ctl[143], 0xFFFF << 16,
+				reg_value << 16);
+		clrsetbits_le32(&denali_ctl[157], 0xFFFF << 16,
+				reg_value << 16);
+
+		clrsetbits_le32(&denali_pi[127], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[135], 0xFF << 0, reg_value << 0);
+		clrsetbits_le32(&denali_pi[142], 0xFF << 16, reg_value << 16);
+		clrsetbits_le32(&denali_pi[150], 0xFF << 0, reg_value << 0);
+		break;
+	}
+}
 
-	/* PHY_924 PHY_PAD_FDBK_DRIVE */
-	clrsetbits_le32(&denali_phy[924], 0x7 << 15, mode_sel << 15);
-	/* PHY_926 PHY_PAD_DATA_DRIVE */
-	clrsetbits_le32(&denali_phy[926], 0x7 << 6, mode_sel << 6);
-	/* PHY_927 PHY_PAD_DQS_DRIVE */
-	clrsetbits_le32(&denali_phy[927], 0x7 << 6, mode_sel << 6);
-	/* PHY_928 PHY_PAD_ADDR_DRIVE */
-	clrsetbits_le32(&denali_phy[928], 0x7 << 14, mode_sel << 14);
-	/* PHY_929 PHY_PAD_CLK_DRIVE */
-	clrsetbits_le32(&denali_phy[929], 0x7 << 14, mode_sel << 14);
-	/* PHY_935 PHY_PAD_CKE_DRIVE */
-	clrsetbits_le32(&denali_phy[935], 0x7 << 14, mode_sel << 14);
-	/* PHY_937 PHY_PAD_RST_DRIVE */
-	clrsetbits_le32(&denali_phy[937], 0x7 << 14, mode_sel << 14);
-	/* PHY_939 PHY_PAD_CS_DRIVE */
-	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
+static void modify_param(const struct chan_info *chan,
+			 struct rk3399_sdram_params *sdram_params)
+{
+	struct rk3399_sdram_params *params;
+	u32 *denali_ctl_params;
+	u32 *denali_pi_params;
+	u32 *denali_phy_params;
 
-	/* speed setting */
-	if (sdram_params->base.ddr_freq < 400)
-		speed = 0x0;
-	else if (sdram_params->base.ddr_freq < 800)
-		speed = 0x1;
-	else if (sdram_params->base.ddr_freq < 1200)
-		speed = 0x2;
-	else
-		speed = 0x3;
+	denali_ctl_params = sdram_params->pctl_regs.denali_ctl;
+	denali_pi_params = sdram_params->pi_regs.denali_pi;
+	denali_phy_params = sdram_params->phy_regs.denali_phy;
 
-	/* PHY_924 PHY_PAD_FDBK_DRIVE */
-	clrsetbits_le32(&denali_phy[924], 0x3 << 21, speed << 21);
-	/* PHY_926 PHY_PAD_DATA_DRIVE */
-	clrsetbits_le32(&denali_phy[926], 0x3 << 9, speed << 9);
-	/* PHY_927 PHY_PAD_DQS_DRIVE */
-	clrsetbits_le32(&denali_phy[927], 0x3 << 9, speed << 9);
-	/* PHY_928 PHY_PAD_ADDR_DRIVE */
-	clrsetbits_le32(&denali_phy[928], 0x3 << 17, speed << 17);
-	/* PHY_929 PHY_PAD_CLK_DRIVE */
-	clrsetbits_le32(&denali_phy[929], 0x3 << 17, speed << 17);
-	/* PHY_935 PHY_PAD_CKE_DRIVE */
-	clrsetbits_le32(&denali_phy[935], 0x3 << 17, speed << 17);
-	/* PHY_937 PHY_PAD_RST_DRIVE */
-	clrsetbits_le32(&denali_phy[937], 0x3 << 17, speed << 17);
-	/* PHY_939 PHY_PAD_CS_DRIVE */
-	clrsetbits_le32(&denali_phy[939], 0x3 << 17, speed << 17);
+	if (sdram_params->base.dramtype == LPDDR4) {
+		set_lp4_dq_odt(chan, sdram_params, 2, 1, 0, 0, 0);
+		set_lp4_ca_odt(chan, sdram_params, 2, 1, 0, 0, 0);
+		set_lp4_MR3(chan, sdram_params, 2, 0, 0, 0);
+		set_lp4_MR12(chan, sdram_params, 2, 0, 0, 0);
+		set_lp4_MR14(chan, sdram_params, 2, 0, 0, 0);
+		params = get_phy_index_params(0, sdram_params);
+		set_ds_odt(chan, params, 0, 0, 0);
+		/* read two cycle preamble */
+		clrsetbits_le32(&denali_ctl_params[200], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[7], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[135], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[263], 0x3 << 24, 0x3 << 24);
+		clrsetbits_le32(&denali_phy_params[391], 0x3 << 24, 0x3 << 24);
+
+		/* boot frequency two cycle preamble */
+		clrsetbits_le32(&denali_phy_params[2], 0x3 << 16, 0x3 << 16);
+		clrsetbits_le32(&denali_phy_params[130], 0x3 << 16, 0x3 << 16);
+		clrsetbits_le32(&denali_phy_params[258], 0x3 << 16, 0x3 << 16);
+		clrsetbits_le32(&denali_phy_params[386], 0x3 << 16, 0x3 << 16);
+
+		clrsetbits_le32(&denali_pi_params[45], 0x3 << 8, 0x3 << 8);
+		clrsetbits_le32(&denali_pi_params[58], 0x1, 0x1);
 
-	return 0;
+		/*
+		 * bypass mode need PHY_SLICE_PWR_RDC_DISABLE_x = 1,
+		 * boot frequency mode use bypass mode
+		 */
+		setbits_le32(&denali_phy_params[10], 1 << 16);
+		setbits_le32(&denali_phy_params[138], 1 << 16);
+		setbits_le32(&denali_phy_params[266], 1 << 16);
+		setbits_le32(&denali_phy_params[394], 1 << 16);
+	} else {
+		/* modify PHY F0/F1/F2 params */
+		params = get_phy_index_params(0, sdram_params);
+		set_ds_odt(chan, params, 0, 0, 0);
+	}
+
+	clrsetbits_le32(&denali_pi_params[45], 0x1 << 24, 0x1 << 24);
+	clrsetbits_le32(&denali_pi_params[61], 0x1 << 24, 0x1 << 24);
+	clrsetbits_le32(&denali_pi_params[76], 0x1 << 24, 0x1 << 24);
+	clrsetbits_le32(&denali_pi_params[77], 0x1, 0x1);
 }
 
 static int pctl_cfg(const struct chan_info *chan, u32 channel,
-		    const struct rk3399_sdram_params *sdram_params)
+		    struct rk3399_sdram_params *sdram_params)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -479,10 +1247,10 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	const u32 *params_ctl = sdram_params->pctl_regs.denali_ctl;
 	const u32 *params_phy = sdram_params->phy_regs.denali_phy;
 	u32 tmp, tmp1, tmp2;
-	u32 pwrup_srefresh_exit;
-	int ret;
-	const ulong timeout_ms = 200;
+	struct rk3399_sdram_params *params;
+	u32 byte;
 
+	modify_param(chan, sdram_params);
 	/*
 	 * work around controller bug:
 	 * Do not program DRAM_CLASS until NO_PHY_IND_TRAIN_INT is programmed
@@ -490,6 +1258,20 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	sdram_copy_to_reg(&denali_ctl[1], &params_ctl[1],
 			  sizeof(struct rk3399_ddr_pctl_regs) - 4);
 	writel(params_ctl[0], &denali_ctl[0]);
+
+	/*
+	 * two channel init at the same time, then ZQ Cal Start
+	 * at the same time, it will use the same RZQ.
+	 * to fix it: increase tINIT3 for channel 1, will avoid two
+	 * channel ZQ Cal Start at the same time
+	 */
+	if (sdram_params->base.dramtype == LPDDR4 && channel == 1) {
+		tmp = ((1000000 * (sdram_params->base.ddr_freq / MHz) + 999) /
+		       1000);
+		tmp1 = readl(&denali_ctl[14]);
+		writel(tmp + tmp1, &denali_ctl[14]);
+	}
+
 	sdram_copy_to_reg(denali_pi, &sdram_params->pi_regs.denali_pi[0],
 			  sizeof(struct rk3399_ddr_pi_regs));
 	/* rank count need to set for init */
@@ -499,7 +1281,15 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	writel(sdram_params->phy_regs.denali_phy[911], &denali_phy[911]);
 	writel(sdram_params->phy_regs.denali_phy[912], &denali_phy[912]);
 
-	pwrup_srefresh_exit = readl(&denali_ctl[68]) & PWRUP_SREFRESH_EXIT;
+	if (sdram_params->base.dramtype == LPDDR4) {
+		writel(sdram_params->phy_regs.denali_phy[898],
+		       &denali_phy[898]);
+		writel(sdram_params->phy_regs.denali_phy[919],
+		       &denali_phy[919]);
+	}
+
+	g_pwrup_srefresh_exit[channel] = readl(&denali_ctl[68]) &
+					 PWRUP_SREFRESH_EXIT;
 	clrbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT);
 
 	/* PHY_DLL_RST_EN */
@@ -508,16 +1298,21 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	setbits_le32(&denali_pi[0], START);
 	setbits_le32(&denali_ctl[0], START);
 
-	/* Waiting for phy DLL lock */
-	while (1) {
-		tmp = readl(&denali_phy[920]);
-		tmp1 = readl(&denali_phy[921]);
-		tmp2 = readl(&denali_phy[922]);
-		if ((((tmp >> 16) & 0x1) == 0x1) &&
-		    (((tmp1 >> 16) & 0x1) == 0x1) &&
-		    (((tmp1 >> 0) & 0x1) == 0x1) &&
-		    (((tmp2 >> 0) & 0x1) == 0x1))
-			break;
+	/* because LPDDR4 use PLL bypass mode for init
+	 * not need to wait for the PLL to lock
+	 */
+	if (sdram_params->base.dramtype != LPDDR4) {
+		/* wait lock */
+		while (1) {
+			tmp = readl(&denali_phy[920]);
+			tmp1 = readl(&denali_phy[921]);
+			tmp2 = readl(&denali_phy[922]);
+			if ((((tmp >> 16) & 0x1) == 0x1) &&
+			    (((tmp1 >> 16) & 0x1) == 0x1) &&
+			    (((tmp1 >> 0) & 0x1) == 0x1) &&
+			    (((tmp2 >> 0) & 0x1) == 0x1))
+				break;
+		}
 	}
 
 	sdram_copy_to_reg(&denali_phy[896], &params_phy[896], (958 - 895) * 4);
@@ -534,54 +1329,53 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 			  &params_phy[640], (677 - 640 + 1) * 4);
 	sdram_copy_to_reg(&denali_phy[768],
 			  &params_phy[768], (805 - 768 + 1) * 4);
-	set_ds_odt(chan, sdram_params);
-
-	/*
-	 * phy_dqs_tsel_wr_timing_X 8bits DENALI_PHY_84/212/340/468 offset_8
-	 * dqs_tsel_wr_end[7:4] add Half cycle
-	 */
-	tmp = (readl(&denali_phy[84]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[84], 0xff << 8, (tmp + 0x10) << 8);
-	tmp = (readl(&denali_phy[212]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[212], 0xff << 8, (tmp + 0x10) << 8);
-	tmp = (readl(&denali_phy[340]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[340], 0xff << 8, (tmp + 0x10) << 8);
-	tmp = (readl(&denali_phy[468]) >> 8) & 0xff;
-	clrsetbits_le32(&denali_phy[468], 0xff << 8, (tmp + 0x10) << 8);
 
-	/*
-	 * phy_dqs_tsel_wr_timing_X 8bits DENALI_PHY_83/211/339/467 offset_8
-	 * dq_tsel_wr_end[7:4] add Half cycle
-	 */
-	tmp = (readl(&denali_phy[83]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[83], 0xff << 16, (tmp + 0x10) << 16);
-	tmp = (readl(&denali_phy[211]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[211], 0xff << 16, (tmp + 0x10) << 16);
-	tmp = (readl(&denali_phy[339]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[339], 0xff << 16, (tmp + 0x10) << 16);
-	tmp = (readl(&denali_phy[467]) >> 16) & 0xff;
-	clrsetbits_le32(&denali_phy[467], 0xff << 16, (tmp + 0x10) << 16);
-
-	ret = phy_io_config(chan, sdram_params);
-	if (ret)
-		return ret;
+	if (sdram_params->base.dramtype == LPDDR4)
+		params = get_phy_index_params(1, sdram_params);
+	else
+		params = get_phy_index_params(0, sdram_params);
+
+	clrsetbits_le32(&params->phy_regs.denali_phy[896], 0x3 << 8,
+			0 << 8);
+	writel(params->phy_regs.denali_phy[896], &denali_phy[896]);
+
+	writel(sdram_params->phy_regs.denali_phy[83] + (0x10 << 16),
+	       &denali_phy[83]);
+	writel(sdram_params->phy_regs.denali_phy[84] + (0x10 << 8),
+	       &denali_phy[84]);
+	writel(sdram_params->phy_regs.denali_phy[211] + (0x10 << 16),
+	       &denali_phy[211]);
+	writel(sdram_params->phy_regs.denali_phy[212] + (0x10 << 8),
+	       &denali_phy[212]);
+	writel(sdram_params->phy_regs.denali_phy[339] + (0x10 << 16),
+	       &denali_phy[339]);
+	writel(sdram_params->phy_regs.denali_phy[340] + (0x10 << 8),
+	       &denali_phy[340]);
+	writel(sdram_params->phy_regs.denali_phy[467] + (0x10 << 16),
+	       &denali_phy[467]);
+	writel(sdram_params->phy_regs.denali_phy[468] + (0x10 << 8),
+	       &denali_phy[468]);
 
-	/* PHY_DLL_RST_EN */
-	clrsetbits_le32(&denali_phy[957], 0x3 << 24, 0x2 << 24);
-
-	/* Waiting for PHY and DRAM init complete */
-	tmp = get_timer(0);
-	do {
-		if (get_timer(tmp) > timeout_ms) {
-			pr_err("DRAM (%s): phy failed to lock within  %ld ms\n",
-			       __func__, timeout_ms);
-			return -ETIME;
+	if (sdram_params->base.dramtype == LPDDR4) {
+		/*
+		 * to improve write dqs and dq phase from 1.5ns to 3.5ns
+		 * at 50MHz.
+		 */
+		for (byte = 0; byte < 4; byte++) {
+			tmp = 0x680;
+			clrsetbits_le32(&denali_phy[1 + (128 * byte)],
+					0xfff << 8, tmp << 8);
 		}
-	} while (!(readl(&denali_ctl[203]) & (1 << 3)));
-	debug("DRAM (%s): phy locked after %ld ms\n", __func__, get_timer(tmp));
+		/*
+		 * to workaround 366ball two channel's RESET connect to
+		 * one RESET signal of die
+		 */
+		if (channel == 1)
+			clrsetbits_le32(&denali_phy[937], 0xff,
+					PHY_DRV_ODT_240 |
+					(PHY_DRV_ODT_240 << 0x4));
+	}
 
-	clrsetbits_le32(&denali_ctl[68], PWRUP_SREFRESH_EXIT,
-			pwrup_srefresh_exit);
 	return 0;
 }
 
@@ -640,8 +1434,16 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_err = 0;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
+	u32 rank_mask;
 
-	for (i = 0; i < rank; i++) {
+	if (sdram_params->base.dramtype == LPDDR4)
+		rank_mask = (rank == 1) ? 0x5 : 0xf;
+	else
+		rank_mask = (rank == 1) ? 0x1 : 0x3;
+
+	for (i = 0; i < 4; i++) {
+		if (!(rank_mask & (1 << i)))
+			continue;
 		select_per_cs_training_index(chan, i);
 		/* PI_100 PI_CALVL_EN:RW:8:2 */
 		clrsetbits_le32(&denali_pi[100], 0x3 << 8, 0x2 << 8);
@@ -668,7 +1470,7 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 			if ((((tmp >> 11) & 0x1) == 0x1) &&
 			    (((tmp >> 13) & 0x1) == 0x1) &&
 			    (((tmp >> 5) & 0x1) == 0x0) &&
-			    (obs_err == 0))
+			    obs_err == 0)
 				break;
 			else if ((((tmp >> 5) & 0x1) == 0x1) ||
 				 (obs_err == 1))
@@ -722,7 +1524,7 @@ static int data_training_wl(const struct chan_info *chan, u32 channel,
 			if ((((tmp >> 10) & 0x1) == 0x1) &&
 			    (((tmp >> 13) & 0x1) == 0x1) &&
 			    (((tmp >> 4) & 0x1) == 0x0) &&
-			    (obs_err == 0))
+			    obs_err == 0)
 				break;
 			else if ((((tmp >> 4) & 0x1) == 0x1) ||
 				 (obs_err == 1))
@@ -781,7 +1583,7 @@ static int data_training_rg(const struct chan_info *chan, u32 channel,
 			if ((((tmp >> 9) & 0x1) == 0x1) &&
 			    (((tmp >> 13) & 0x1) == 0x1) &&
 			    (((tmp >> 3) & 0x1) == 0x0) &&
-			    (obs_err == 0))
+			    obs_err == 0)
 				break;
 			else if ((((tmp >> 3) & 0x1) == 0x1) ||
 				 (obs_err == 1))
@@ -842,14 +1644,23 @@ static int data_training_wdql(const struct chan_info *chan, u32 channel,
 	u32 *denali_pi = chan->pi->denali_pi;
 	u32 i, tmp;
 	u32 rank = sdram_params->ch[channel].cap_info.rank;
+	u32 rank_mask;
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		rank_mask = (rank == 1) ? 0x5 : 0xf;
+	else
+		rank_mask = (rank == 1) ? 0x1 : 0x3;
+
+	for (i = 0; i < 4; i++) {
+		if (!(rank_mask & (1 << i)))
+			continue;
 
-	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
 		/*
 		 * disable PI_WDQLVL_VREF_EN before wdq leveling?
-		 * PI_181 PI_WDQLVL_VREF_EN:RW:8:1
+		 * PI_117 PI_WDQLVL_VREF_EN:RW:8:1
 		 */
-		clrbits_le32(&denali_pi[181], 0x1 << 8);
+		clrbits_le32(&denali_pi[117], 0x1 << 8);
 		/* PI_124 PI_WDQLVL_EN:RW:16:2 */
 		clrsetbits_le32(&denali_pi[124], 0x3 << 16, 0x2 << 16);
 		/* PI_121 PI_WDQLVL_REQ:WR:8:1,PI_WDQLVL_CS:RW:16:2 */
@@ -888,7 +1699,7 @@ static int data_training(const struct chan_info *chan, u32 channel,
 
 	if (training_flag == PI_FULL_TRAINING) {
 		if (sdram_params->base.dramtype == LPDDR4) {
-			training_flag = PI_CA_TRAINING | PI_WRITE_LEVELING |
+			training_flag = PI_WRITE_LEVELING |
 					PI_READ_GATE_TRAINING |
 					PI_READ_LEVELING | PI_WDQ_LEVELING;
 		} else if (sdram_params->base.dramtype == LPDDR3) {
@@ -1074,8 +1885,8 @@ u16  ddr_cfg_2_rbc[] = {
 		((1 << 6) | (1 << 3) | (0 << 2) | 2), /* 7 */
 };
 
-unsigned int calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
-				 unsigned int channel)
+static u32 calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
+			       u32 channel)
 {
 	unsigned int i;
 	unsigned int cs0_row = sdram_params->ch[channel].cap_info.cs0_row;
@@ -1097,7 +1908,7 @@ unsigned int calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
 	return i;
 }
 
-unsigned char calculate_stride(struct rk3399_sdram_params *sdram_params)
+static unsigned char calculate_stride(struct rk3399_sdram_params *sdram_params)
 {
 	unsigned int gstride_type;
 	unsigned int channel;
@@ -1248,15 +2059,24 @@ error:
 	return (-1);
 }
 
+static u32 get_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf)
+{
+	u32 val;
+
+	val = (readl(&pmusgrf->soc_con4) >> 10) & 0x1F;
+
+	return val;
+}
+
 static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride)
 {
 	rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10,
 		     stride << 10);
 }
 
-void set_cap_relate_config(const struct chan_info *chan,
-			   struct rk3399_sdram_params *sdram_params,
-			   unsigned int channel)
+static void set_cap_relate_config(const struct chan_info *chan,
+				  struct rk3399_sdram_params *sdram_params,
+				  unsigned int channel)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 tmp;
@@ -1288,8 +2108,8 @@ void set_cap_relate_config(const struct chan_info *chan,
 	}
 }
 
-void clear_channel_params(struct rk3399_sdram_params *sdram_params,
-			  unsigned int channel)
+static void clear_channel_params(struct rk3399_sdram_params *sdram_params,
+				 unsigned int channel)
 {
 	sdram_params->ch[channel].cap_info.rank = 0;
 	sdram_params->ch[channel].cap_info.col = 0;
@@ -1307,8 +2127,8 @@ void clear_channel_params(struct rk3399_sdram_params *sdram_params,
  * CS0 & CS1, n=3
  * cs0_cap: MB unit
  */
-void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
-		 unsigned char dramtype)
+static void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
+			unsigned char dramtype)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -1332,7 +2152,7 @@ void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
 		writel(0x2EC7FFFF, &denali_pi[34]);
 }
 
-void dram_set_bw(const struct chan_info *chan, u32 bw)
+static void dram_set_bw(const struct chan_info *chan, u32 bw)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 
@@ -1342,7 +2162,7 @@ void dram_set_bw(const struct chan_info *chan, u32 bw)
 		setbits_le32(&denali_ctl[196], 1 << 16);
 }
 
-void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
+static void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	struct msch_regs *ddr_msch_regs = chan->msch;
@@ -1368,8 +2188,8 @@ void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
 	*pcol = 12;
 }
 
-void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
-		       u32 *pcol)
+static void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
+			      u32 *pcol)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -1385,8 +2205,8 @@ void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
 	*pcol = 12;
 }
 
-void dram_set_max_row(const struct chan_info *chan, u32 bw, u32 *prow,
-		      u32 *pbank, u32 *pcol)
+static void dram_set_max_row(const struct chan_info *chan, u32 bw, u32 *prow,
+			     u32 *pbank, u32 *pcol)
 {
 	u32 *denali_ctl = chan->pctl->denali_ctl;
 	u32 *denali_pi = chan->pi->denali_pi;
@@ -1426,19 +2246,21 @@ static u64 dram_detect_cap(struct dram_info *dram,
 
 	/* detect bw */
 	bw = 2;
-	dram_set_bw(chan, bw);
-	cap_info->bw = bw;
-	if (data_training(chan, channel, sdram_params, PI_READ_GATE_TRAINING)) {
-		bw = 1;
-		dram_set_bw(chan, 1);
+	if (sdram_params->base.dramtype != LPDDR4) {
+		dram_set_bw(chan, bw);
 		cap_info->bw = bw;
 		if (data_training(chan, channel, sdram_params,
 				  PI_READ_GATE_TRAINING)) {
-			printf("16bit error!!!\n");
-			goto error;
+			bw = 1;
+			dram_set_bw(chan, 1);
+			cap_info->bw = bw;
+			if (data_training(chan, channel, sdram_params,
+					  PI_READ_GATE_TRAINING)) {
+				printf("16bit error!!!\n");
+				goto error;
+			}
 		}
 	}
-
 	/*
 	 * LPDDR3 CA training msut be trigger before other training.
 	 * DDR3 is not have CA training.
@@ -1497,6 +2319,579 @@ error:
 	return (-1);
 }
 
+/* read mr_num mode register
+ * input: rank = 1: cs0, rank = 2: cs1
+ *        mr_num: mode register number
+ * output: buf
+ */
+static int read_mr(struct rk3399_ddr_pctl_regs *ddr_pctl_regs, u32 rank,
+		   u32 mr_num, u32 *buf)
+{
+	s32 timeout = 100;
+
+	writel(((1 << 16) |
+			(((rank == 2) ? 1 : 0) << 8) |
+			mr_num) << 8,
+			&ddr_pctl_regs->denali_ctl[118]);
+	while (0 == (readl(&ddr_pctl_regs->denali_ctl[203]) &
+			((1 << 21) | (1 << 12)))) {
+		udelay(1);
+		if (timeout <= 0)
+			goto error;
+		timeout--;
+	}
+	if (!(readl(&ddr_pctl_regs->denali_ctl[203]) & (1 << 12))) {
+		*buf = readl(&ddr_pctl_regs->denali_ctl[119]) & 0xFF;
+	} else {
+		printf("read mr error\n");
+		printf("MRR_ERROR_STATUS = 0x%x\n",
+		       readl(&ddr_pctl_regs->denali_ctl[17]) & 0x3);
+		*buf = 0;
+	}
+	setbits_le32(&ddr_pctl_regs->denali_ctl[205], (1 << 21) | (1 << 12));
+	return 0;
+error:
+	return (-1);
+}
+
+static int read_mr_for_detect(struct dram_info *dram, u32 channel, u32 rank,
+			      struct rk3399_sdram_params *sdram_params)
+{
+	u64 cs0_cap;
+	u32 stride;
+	u32 cs = 0, col = 0, bk = 0, bw = 0, row_3_4 = 0;
+	u32 cs0_row = 0, cs1_row = 0, ddrconfig = 0;
+	u32 mr5, mr12, mr14;
+	struct chan_info *chan =
+		&dram->chan[channel];
+	struct rk3399_ddr_pctl_regs *ddr_pctl_regs = chan->pctl;
+	int ret = 0;
+	u32 val;
+	void __iomem *addr = NULL;
+
+	stride = get_ddr_stride(dram->pmusgrf);
+
+	if (sdram_params->ch[channel].cap_info.col == 0) {
+		ret = -1;
+		goto end;
+	}
+
+	cs = sdram_params->ch[channel].cap_info.rank;
+	col = sdram_params->ch[channel].cap_info.col;
+	bk = sdram_params->ch[channel].cap_info.bk;
+	bw = sdram_params->ch[channel].cap_info.bw;
+	row_3_4 = sdram_params->ch[channel].cap_info.row_3_4;
+	cs0_row = sdram_params->ch[channel].cap_info.cs0_row;
+	cs1_row = sdram_params->ch[channel].cap_info.cs1_row;
+	ddrconfig = sdram_params->ch[channel].cap_info.ddrconfig;
+
+	/* 2GB */
+	sdram_params->ch[channel].cap_info.rank = 2;
+	sdram_params->ch[channel].cap_info.col = 10;
+	sdram_params->ch[channel].cap_info.bk = 3;
+	sdram_params->ch[channel].cap_info.bw = 2;
+	sdram_params->ch[channel].cap_info.row_3_4 = 0;
+	sdram_params->ch[channel].cap_info.cs0_row = 15;
+	sdram_params->ch[channel].cap_info.cs1_row = 15;
+	sdram_params->ch[channel].cap_info.ddrconfig = 1;
+
+	set_memory_map(chan, channel, sdram_params);
+	sdram_params->ch[channel].cap_info.ddrconfig =
+			calculate_ddrconfig(sdram_params, channel);
+	set_ddrconfig(chan, sdram_params, channel,
+		      sdram_params->ch[channel].cap_info.ddrconfig);
+	set_cap_relate_config(chan, sdram_params, channel);
+
+	cs0_cap = (1 << (sdram_params->ch[channel].cap_info.bw
+			+ sdram_params->ch[channel].cap_info.col
+			+ sdram_params->ch[channel].cap_info.bk
+			+ sdram_params->ch[channel].cap_info.cs0_row));
+
+	if (sdram_params->ch[channel].cap_info.row_3_4)
+		cs0_cap = cs0_cap * 3 / 4;
+
+	if (channel == 0)
+		set_ddr_stride(dram->pmusgrf, 0x17);
+	else
+		set_ddr_stride(dram->pmusgrf, 0x18);
+
+	/* !will soiled DRAM space here!
+	 * read and write data to DRAM, avoid be optimized by compiler.
+	 */
+	if (rank == 1)
+		addr = (void __iomem *)0x100;
+	else if (rank == 2)
+		addr = (void __iomem *)(cs0_cap + 0x100);
+
+	val = readl(addr);
+	writel(val + 1, addr);
+
+	read_mr(ddr_pctl_regs, rank, 5, &mr5);
+	read_mr(ddr_pctl_regs, rank, 12, &mr12);
+	read_mr(ddr_pctl_regs, rank, 14, &mr14);
+
+	if (mr5 == 0 || mr12 != 0x4d || mr14 != 0x4d) {
+		ret = -1;
+		goto end;
+	}
+end:
+	sdram_params->ch[channel].cap_info.rank = cs;
+	sdram_params->ch[channel].cap_info.col = col;
+	sdram_params->ch[channel].cap_info.bk = bk;
+	sdram_params->ch[channel].cap_info.bw = bw;
+	sdram_params->ch[channel].cap_info.row_3_4 = row_3_4;
+	sdram_params->ch[channel].cap_info.cs0_row = cs0_row;
+	sdram_params->ch[channel].cap_info.cs1_row = cs1_row;
+	sdram_params->ch[channel].cap_info.ddrconfig = ddrconfig;
+
+	set_ddr_stride(dram->pmusgrf, stride);
+	return ret;
+}
+
+static u32 get_phy_fn(struct rk3399_sdram_params *sdram_params, u32 ctl_fn)
+{
+	u32 lp4_phy_fn[] = {1, 0, 0xb};
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		return lp4_phy_fn[ctl_fn];
+	else
+		return ctl_fn;
+}
+
+static u32 get_ctl_fn(struct rk3399_sdram_params *sdram_params, u32 phy_fn)
+{
+	u32 lp4_ctl_fn[] = {1, 0, 2};
+
+	if (sdram_params->base.dramtype == LPDDR4)
+		return lp4_ctl_fn[phy_fn];
+	else
+		return phy_fn;
+}
+
+static void dram_copy_phy_fn(struct dram_info *dram,
+			     struct rk3399_sdram_params *sdram_params, u32 fn,
+			     struct rk3399_sdram_params *f1_sdram_params,
+			     u32 channel)
+{
+	u32 *denali_ctl;
+	u32 *denali_phy;
+	u32 *denali_phy_params;
+	u32 speed = 0;
+	u32 mr5;
+	u32 ctl_fn;
+
+	denali_ctl = dram->chan[channel].pctl->denali_ctl;
+	denali_phy = dram->chan[channel].publ->denali_phy;
+	denali_phy_params = f1_sdram_params->phy_regs.denali_phy;
+
+	/* switch index */
+	clrsetbits_le32(&denali_phy_params[896], 0x3 << 8,
+			fn << 8);
+	writel(denali_phy_params[896], &denali_phy[896]);
+
+	/* phy_pll_ctrl_ca, phy_pll_ctrl */
+	writel(denali_phy_params[911], &denali_phy[911]);
+	/* phy_low_freq_sel */
+	clrsetbits_le32(&denali_phy[913], 0x1,
+			denali_phy_params[913] & 0x1);
+	/* PHY_GRP_SLAVE_DELAY_X, phy_cslvl_dly_step */
+	writel(denali_phy_params[916], &denali_phy[916]);
+	writel(denali_phy_params[917], &denali_phy[917]);
+	writel(denali_phy_params[918], &denali_phy[918]);
+	/* phy_adrZ_sw_wraddr_shift_X  */
+	writel(denali_phy_params[512], &denali_phy[512]);
+	clrsetbits_le32(&denali_phy[513], 0xFFFF,
+			denali_phy_params[513] & 0xFFFF);
+	writel(denali_phy_params[640], &denali_phy[640]);
+	clrsetbits_le32(&denali_phy[641], 0xFFFF,
+			denali_phy_params[641] & 0xFFFF);
+	writel(denali_phy_params[768], &denali_phy[768]);
+	clrsetbits_le32(&denali_phy[769], 0xFFFF,
+			denali_phy_params[769] & 0xFFFF);
+
+	writel(denali_phy_params[544], &denali_phy[544]);
+	writel(denali_phy_params[545], &denali_phy[545]);
+	writel(denali_phy_params[546], &denali_phy[546]);
+	writel(denali_phy_params[547], &denali_phy[547]);
+
+	writel(denali_phy_params[672], &denali_phy[672]);
+	writel(denali_phy_params[673], &denali_phy[673]);
+	writel(denali_phy_params[674], &denali_phy[674]);
+	writel(denali_phy_params[675], &denali_phy[675]);
+
+	writel(denali_phy_params[800], &denali_phy[800]);
+	writel(denali_phy_params[801], &denali_phy[801]);
+	writel(denali_phy_params[802], &denali_phy[802]);
+	writel(denali_phy_params[803], &denali_phy[803]);
+
+	/*
+	 * phy_adr_master_delay_start_X
+	 * phy_adr_master_delay_step_X
+	 * phy_adr_master_delay_wait_X
+	 */
+	writel(denali_phy_params[548], &denali_phy[548]);
+	writel(denali_phy_params[676], &denali_phy[676]);
+	writel(denali_phy_params[804], &denali_phy[804]);
+
+	/* phy_adr_calvl_dly_step_X */
+	writel(denali_phy_params[549], &denali_phy[549]);
+	writel(denali_phy_params[677], &denali_phy[677]);
+	writel(denali_phy_params[805], &denali_phy[805]);
+
+	/*
+	 * phy_clk_wrdm_slave_delay_X
+	 * phy_clk_wrdqZ_slave_delay_X
+	 * phy_clk_wrdqs_slave_delay_X
+	 */
+	sdram_copy_to_reg((u32 *)&denali_phy[59],
+			  (u32 *)&denali_phy_params[59],
+			  (63 - 58) * 4);
+	sdram_copy_to_reg((u32 *)&denali_phy[187],
+			  (u32 *)&denali_phy_params[187],
+			  (191 - 186) * 4);
+	sdram_copy_to_reg((u32 *)&denali_phy[315],
+			  (u32 *)&denali_phy_params[315],
+			  (319 - 314) * 4);
+	sdram_copy_to_reg((u32 *)&denali_phy[443],
+			  (u32 *)&denali_phy_params[443],
+			  (447 - 442) * 4);
+
+	/*
+	 * phy_dqs_tsel_wr_timing_X 8bits DENALI_PHY_84/212/340/468 offset_8
+	 * dqs_tsel_wr_end[7:4] add Half cycle
+	 * phy_dq_tsel_wr_timing_X 8bits DENALI_PHY_83/211/339/467 offset_8
+	 * dq_tsel_wr_end[7:4] add Half cycle
+	 */
+	writel(denali_phy_params[83] + (0x10 << 16), &denali_phy[83]);
+	writel(denali_phy_params[84] + (0x10 << 8), &denali_phy[84]);
+	writel(denali_phy_params[85], &denali_phy[85]);
+
+	writel(denali_phy_params[211] + (0x10 << 16), &denali_phy[211]);
+	writel(denali_phy_params[212] + (0x10 << 8), &denali_phy[212]);
+	writel(denali_phy_params[213], &denali_phy[213]);
+
+	writel(denali_phy_params[339] + (0x10 << 16), &denali_phy[339]);
+	writel(denali_phy_params[340] + (0x10 << 8), &denali_phy[340]);
+	writel(denali_phy_params[341], &denali_phy[341]);
+
+	writel(denali_phy_params[467] + (0x10 << 16), &denali_phy[467]);
+	writel(denali_phy_params[468] + (0x10 << 8), &denali_phy[468]);
+	writel(denali_phy_params[469], &denali_phy[469]);
+
+	/*
+	 * phy_gtlvl_resp_wait_cnt_X
+	 * phy_gtlvl_dly_step_X
+	 * phy_wrlvl_resp_wait_cnt_X
+	 * phy_gtlvl_final_step_X
+	 * phy_gtlvl_back_step_X
+	 * phy_rdlvl_dly_step_X
+	 *
+	 * phy_master_delay_step_X
+	 * phy_master_delay_wait_X
+	 * phy_wrlvl_dly_step_X
+	 * phy_rptr_update_X
+	 * phy_wdqlvl_dly_step_X
+	 */
+	writel(denali_phy_params[87], &denali_phy[87]);
+	writel(denali_phy_params[88], &denali_phy[88]);
+	writel(denali_phy_params[89], &denali_phy[89]);
+	writel(denali_phy_params[90], &denali_phy[90]);
+
+	writel(denali_phy_params[215], &denali_phy[215]);
+	writel(denali_phy_params[216], &denali_phy[216]);
+	writel(denali_phy_params[217], &denali_phy[217]);
+	writel(denali_phy_params[218], &denali_phy[218]);
+
+	writel(denali_phy_params[343], &denali_phy[343]);
+	writel(denali_phy_params[344], &denali_phy[344]);
+	writel(denali_phy_params[345], &denali_phy[345]);
+	writel(denali_phy_params[346], &denali_phy[346]);
+
+	writel(denali_phy_params[471], &denali_phy[471]);
+	writel(denali_phy_params[472], &denali_phy[472]);
+	writel(denali_phy_params[473], &denali_phy[473]);
+	writel(denali_phy_params[474], &denali_phy[474]);
+
+	/*
+	 * phy_gtlvl_lat_adj_start_X
+	 * phy_gtlvl_rddqs_slv_dly_start_X
+	 * phy_rdlvl_rddqs_dq_slv_dly_start_X
+	 * phy_wdqlvl_dqdm_slv_dly_start_X
+	 */
+	writel(denali_phy_params[80], &denali_phy[80]);
+	writel(denali_phy_params[81], &denali_phy[81]);
+
+	writel(denali_phy_params[208], &denali_phy[208]);
+	writel(denali_phy_params[209], &denali_phy[209]);
+
+	writel(denali_phy_params[336], &denali_phy[336]);
+	writel(denali_phy_params[337], &denali_phy[337]);
+
+	writel(denali_phy_params[464], &denali_phy[464]);
+	writel(denali_phy_params[465], &denali_phy[465]);
+
+	/*
+	 * phy_master_delay_start_X
+	 * phy_sw_master_mode_X
+	 * phy_rddata_en_tsel_dly_X
+	 */
+	writel(denali_phy_params[86], &denali_phy[86]);
+	writel(denali_phy_params[214], &denali_phy[214]);
+	writel(denali_phy_params[342], &denali_phy[342]);
+	writel(denali_phy_params[470], &denali_phy[470]);
+
+	/*
+	 * phy_rddqZ_slave_delay_X
+	 * phy_rddqs_dqZ_fall_slave_delay_X
+	 * phy_rddqs_dqZ_rise_slave_delay_X
+	 * phy_rddqs_dm_fall_slave_delay_X
+	 * phy_rddqs_dm_rise_slave_delay_X
+	 * phy_rddqs_gate_slave_delay_X
+	 * phy_wrlvl_delay_early_threshold_X
+	 * phy_write_path_lat_add_X
+	 * phy_rddqs_latency_adjust_X
+	 * phy_wrlvl_delay_period_threshold_X
+	 * phy_wrlvl_early_force_zero_X
+	 */
+	sdram_copy_to_reg((u32 *)&denali_phy[64],
+			  (u32 *)&denali_phy_params[64],
+			  (67 - 63) * 4);
+	clrsetbits_le32(&denali_phy[68], 0xFFFFFC00,
+			denali_phy_params[68] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[69],
+			  (u32 *)&denali_phy_params[69],
+			  (79 - 68) * 4);
+
+	sdram_copy_to_reg((u32 *)&denali_phy[192],
+			  (u32 *)&denali_phy_params[192],
+			  (195 - 191) * 4);
+	clrsetbits_le32(&denali_phy[196], 0xFFFFFC00,
+			denali_phy_params[196] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[197],
+			  (u32 *)&denali_phy_params[197],
+			  (207 - 196) * 4);
+
+	sdram_copy_to_reg((u32 *)&denali_phy[320],
+			  (u32 *)&denali_phy_params[320],
+			  (323 - 319) * 4);
+	clrsetbits_le32(&denali_phy[324], 0xFFFFFC00,
+			denali_phy_params[324] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[325],
+			  (u32 *)&denali_phy_params[325],
+			  (335 - 324) * 4);
+
+	sdram_copy_to_reg((u32 *)&denali_phy[448],
+			  (u32 *)&denali_phy_params[448],
+			  (451 - 447) * 4);
+	clrsetbits_le32(&denali_phy[452], 0xFFFFFC00,
+			denali_phy_params[452] & 0xFFFFFC00);
+	sdram_copy_to_reg((u32 *)&denali_phy[453],
+			  (u32 *)&denali_phy_params[453],
+			  (463 - 452) * 4);
+
+	/* phy_two_cyc_preamble_X */
+	clrsetbits_le32(&denali_phy[7], 0x3 << 24,
+			denali_phy_params[7] & (0x3 << 24));
+	clrsetbits_le32(&denali_phy[135], 0x3 << 24,
+			denali_phy_params[135] & (0x3 << 24));
+	clrsetbits_le32(&denali_phy[263], 0x3 << 24,
+			denali_phy_params[263] & (0x3 << 24));
+	clrsetbits_le32(&denali_phy[391], 0x3 << 24,
+			denali_phy_params[391] & (0x3 << 24));
+
+	/* speed */
+	if (f1_sdram_params->base.ddr_freq < 400 * MHz)
+		speed = 0x0;
+	else if (f1_sdram_params->base.ddr_freq < 800 * MHz)
+		speed = 0x1;
+	else if (f1_sdram_params->base.ddr_freq < 1200 * MHz)
+		speed = 0x2;
+
+	/* PHY_924 PHY_PAD_FDBK_DRIVE */
+	clrsetbits_le32(&denali_phy[924],
+			0x3 << 21, speed << 21);
+	/* PHY_926 PHY_PAD_DATA_DRIVE */
+	clrsetbits_le32(&denali_phy[926],
+			0x3 << 9, speed << 9);
+	/* PHY_927 PHY_PAD_DQS_DRIVE */
+	clrsetbits_le32(&denali_phy[927],
+			0x3 << 9, speed << 9);
+	/* PHY_928 PHY_PAD_ADDR_DRIVE */
+	clrsetbits_le32(&denali_phy[928],
+			0x3 << 17, speed << 17);
+	/* PHY_929 PHY_PAD_CLK_DRIVE */
+	clrsetbits_le32(&denali_phy[929],
+			0x3 << 17, speed << 17);
+	/* PHY_935 PHY_PAD_CKE_DRIVE */
+	clrsetbits_le32(&denali_phy[935],
+			0x3 << 17, speed << 17);
+	/* PHY_937 PHY_PAD_RST_DRIVE */
+	clrsetbits_le32(&denali_phy[937],
+			0x3 << 17, speed << 17);
+	/* PHY_939 PHY_PAD_CS_DRIVE */
+	clrsetbits_le32(&denali_phy[939],
+			0x3 << 17, speed << 17);
+
+	if (f1_sdram_params->base.dramtype == LPDDR4) {
+		read_mr(dram->chan[channel].pctl, 1, 5, &mr5);
+		set_ds_odt(&dram->chan[channel], f1_sdram_params, 1, 0, mr5);
+		set_ds_odt(&dram->chan[channel], f1_sdram_params, 1, 1, mr5);
+
+		ctl_fn = get_ctl_fn(f1_sdram_params, fn);
+		set_lp4_dq_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 0, mr5);
+		set_lp4_ca_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 0, mr5);
+		set_lp4_MR3(&dram->chan[channel], f1_sdram_params,
+			    ctl_fn, 1, 0, mr5);
+		set_lp4_MR12(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 0, mr5);
+		set_lp4_MR14(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 0, mr5);
+
+		set_lp4_dq_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 1, mr5);
+		set_lp4_ca_odt(&dram->chan[channel], f1_sdram_params,
+			       ctl_fn, 1, 1, 1, mr5);
+		set_lp4_MR3(&dram->chan[channel], f1_sdram_params,
+			    ctl_fn, 1, 1, mr5);
+		set_lp4_MR12(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 1, mr5);
+		set_lp4_MR14(&dram->chan[channel], f1_sdram_params,
+			     ctl_fn, 1, 1, mr5);
+
+		/*
+		 * if phy_sw_master_mode_X not bypass mode,
+		 * clear PHY_SLICE_PWR_RDC_DISABLE.
+		 * NOTE: need use f1_sdram_params, not ddr_publ_regs
+		 */
+		if (!((denali_phy_params[86] >> 8)
+			& (1 << 2))) {
+			clrbits_le32(&denali_phy[10], 1 << 16);
+			clrbits_le32(&denali_phy[138], 1 << 16);
+			clrbits_le32(&denali_phy[266], 1 << 16);
+			clrbits_le32(&denali_phy[394], 1 << 16);
+		}
+
+		/*
+		 * when PHY_PER_CS_TRAINING_EN=1, W2W_DIFFCS_DLY_Fx can't
+		 * smaller than 8
+		 * NOTE: need use f1_sdram_params, not ddr_publ_regs
+		 */
+		if ((denali_phy_params[84] >> 16) & 1) {
+			if (((readl(&denali_ctl[217 + ctl_fn]) >>
+				16) & 0x1f) < 8)
+				clrsetbits_le32(&denali_ctl[217 + ctl_fn],
+						0x1f << 16,
+						8 << 16);
+		}
+	}
+}
+
+static void dram_set_phy_fn(struct dram_info *dram,
+			    struct rk3399_sdram_params *sdram_params, u32 fn,
+			    struct rk3399_sdram_params *f1_sdram_params)
+{
+	u32 channel;
+
+	for (channel = 0; channel < 2; channel++)
+		dram_copy_phy_fn(dram, sdram_params, fn, f1_sdram_params,
+				 channel);
+}
+
+static int dram_set_rate(struct dram_info *dram,
+			 struct rk3399_sdram_params *sdram_params,
+			 u32 fn, u32 hz)
+{
+	u32 channel;
+	int ret_clk, ret[2];
+
+	/* cci idle req stall */
+	writel(0x70007, &dram->grf->soc_con0);
+	/* enable all clk */
+	setbits_le32(&dram->pmu->pmu_noc_auto_ena, (0x3 << 7));
+	/* idle */
+	setbits_le32(&dram->pmu->pmu_bus_idle_req, (0x3 << 18));
+	while ((readl(&dram->pmu->pmu_bus_idle_st) & (0x3 << 18))
+	       != (0x3 << 18))
+		;
+
+	/* change freq */
+	writel((((0x3 << 4) | (1 << 2) | 1) << 16) |
+		(fn << 4) | (1 << 2) | 1, &dram->cic->cic_ctrl0);
+	while (!(readl(&dram->cic->cic_status0) & (1 << 2)))
+		;
+
+	ret_clk = clk_set_rate(&dram->ddr_clk, hz);
+	if (ret_clk < 0) {
+		printf("%s clk set failed %d\n", __func__, ret_clk);
+		return ret_clk;
+	}
+
+	writel(0x20002, &dram->cic->cic_ctrl0);
+	while (!(readl(&dram->cic->cic_status0) & (1 << 0)))
+		;
+
+	/* deidle */
+	clrbits_le32(&dram->pmu->pmu_bus_idle_req, (0x3 << 18));
+	while (readl(&dram->pmu->pmu_bus_idle_st) & (0x3 << 18))
+		;
+
+	/* clear enable all clk */
+	clrbits_le32(&dram->pmu->pmu_noc_auto_ena, (0x3 << 7));
+
+	/* LPDDR4 f2 can not do training, all training will fail */
+	if (!(sdram_params->base.dramtype == LPDDR4 && fn == 2)) {
+		for (channel = 0; channel < 2; channel++) {
+			if (!(sdram_params->ch[channel].cap_info.col))
+				continue;
+			ret[channel] = data_training(&dram->chan[channel],
+						     channel, sdram_params,
+						     PI_FULL_TRAINING);
+		}
+		for (channel = 0; channel < 2; channel++) {
+			if (!(sdram_params->ch[channel].cap_info.col))
+				continue;
+			if (ret[channel])
+				printf("channel %d training failed!\n",
+				       channel);
+			else
+				printf("channel %d training pass\n", channel);
+		}
+	}
+
+	return 0;
+}
+
+static struct rk3399_sdram_params *g_sdram_params;
+static void set_rate0(struct dram_info *dram)
+{
+	u32 ctl_fn;
+	u32 phy_fn;
+
+	ctl_fn = 0;
+	phy_fn = get_phy_fn(g_sdram_params, ctl_fn);
+	dram_set_phy_fn(dram, g_sdram_params, phy_fn, &dfs_configs[ctl_fn]);
+	dram_set_rate(dram, g_sdram_params, ctl_fn,
+		      dfs_configs[ctl_fn].base.ddr_freq);
+	printf("change freq to %d MHz %d, %d\n",
+	       dfs_configs[ctl_fn].base.ddr_freq / MHZ, ctl_fn, phy_fn);
+}
+
+static void set_rate1(struct dram_info *dram)
+{
+	u32 ctl_fn;
+	u32 phy_fn;
+
+	ctl_fn = 1;
+	phy_fn = get_phy_fn(g_sdram_params, ctl_fn);
+	dram_set_phy_fn(dram, g_sdram_params, phy_fn, &dfs_configs[ctl_fn]);
+	dram_set_rate(dram, g_sdram_params, ctl_fn,
+		      dfs_configs[ctl_fn].base.ddr_freq);
+	printf("change freq to %d MHz %d, %d\n",
+	       dfs_configs[ctl_fn].base.ddr_freq / MHZ, ctl_fn, phy_fn);
+}
+
 static int sdram_init(struct dram_info *dram,
 		      struct rk3399_sdram_params *sdram_params)
 {
@@ -1529,10 +2924,12 @@ static int sdram_init(struct dram_info *dram,
 
 				phy_pctrl_reset(cru, channel);
 				phy_dll_bypass_set(publ, ddr_freq);
-				if (pctl_cfg(chan, channel, sdram_params) != 0)
-					printf("pctl_cfg fail\n");
+				pctl_cfg(chan, channel, sdram_params);
 			}
 
+			/* start to trigger initialization */
+			pctl_start(dram, sdram_params, 3);
+
 			/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */
 			if (dramtype == LPDDR3)
 				udelay(10);
@@ -1541,20 +2938,30 @@ static int sdram_init(struct dram_info *dram,
 			dram_set_cs(&dram->chan[ch], tmp, 2048,
 				    sdram_params->base.dramtype);
 			sdram_params->ch[ch].cap_info.rank = rank;
-			/*
-			 * LPDDR3 CA training msut be trigger before
-			 * other training.
-			 * DDR3 is not have CA training.
-			 * LPDDR4 need confirm here!
-			 */
-			if (sdram_params->base.dramtype == LPDDR3)
-				training_flag = PI_CA_TRAINING |
-						PI_READ_GATE_TRAINING;
-			else
-				training_flag = PI_READ_GATE_TRAINING;
-			if (!(data_training(&dram->chan[ch], ch, sdram_params,
-					    training_flag)))
-				break;
+			if (sdram_params->base.dramtype == LPDDR4) {
+				/* two rank, then read_mr(cs1)
+				 * one rank, then read_mr(cs0)
+				 */
+				if (!read_mr_for_detect(dram, ch, rank,
+							sdram_params))
+					break;
+			} else {
+				/*
+				 * LPDDR3 CA training msut be trigger before
+				 * other training.
+				 * DDR3 is not have CA training.
+				 * LPDDR4 need confirm here!
+				 */
+				if (sdram_params->base.dramtype == LPDDR3)
+					training_flag = PI_CA_TRAINING |
+							PI_READ_GATE_TRAINING;
+				else
+					training_flag = PI_READ_GATE_TRAINING;
+				if (!(data_training(&dram->chan[ch], ch,
+						    sdram_params,
+						    training_flag)))
+					break;
+			}
 		}
 		sdram_params->ch[ch].cap_info.rank = rank;
 	}
@@ -1597,9 +3004,23 @@ static int sdram_init(struct dram_info *dram,
 		set_cap_relate_config(chan, sdram_params, channel);
 	}
 
+	if (sdram_params->base.num_channels == 0) {
+		sdram_print_dram_type(sdram_params->base.dramtype);
+		printf(" %dMHz\n", sdram_params->base.ddr_freq);
+		return -1;
+	}
+
 	sdram_params->base.stride = calculate_stride(sdram_params);
 	dram_all_config(dram, sdram_params);
-	switch_to_phy_index1(dram, sdram_params);
+
+	if (sdram_params->base.dramtype != LPDDR4)
+		switch_to_phy_index1(dram, sdram_params);
+
+	if (sdram_params->base.dramtype == LPDDR4) {
+		g_sdram_params = sdram_params;
+		set_rate0(dram);
+		set_rate1(dram);
+	}
 
 	debug("Finish SDRAM initialization...\n");
 	return 0;
@@ -1662,6 +3083,8 @@ static int rk3399_dmc_init(struct udevice *dev)
 #endif
 
 	priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC);
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
 	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	priv->pmusgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
 	priv->pmucru = rockchip_get_pmucru();
@@ -1680,8 +3103,8 @@ static int rk3399_dmc_init(struct udevice *dev)
 	      priv->chan[0].publ, priv->chan[0].msch,
 	      priv->chan[1].pctl, priv->chan[1].pi,
 	      priv->chan[1].publ, priv->chan[1].msch);
-	debug("cru %p, cic %p, grf %p, sgrf %p, pmucru %p\n", priv->cru,
-	      priv->cic, priv->pmugrf, priv->pmusgrf, priv->pmucru);
+	debug("cru %p, cic %p, grf %p, sgrf %p, pmucru %p, pmu %p\n", priv->cru,
+	      priv->cic, priv->pmugrf, priv->pmusgrf, priv->pmucru, priv->pmu);
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->ddr_clk);
 #else
@@ -1698,7 +3121,7 @@ static int rk3399_dmc_init(struct udevice *dev)
 	}
 	ret = sdram_init(priv, params);
 	if (ret < 0) {
-		printf("%s DRAM init failed%d\n", __func__, ret);
+		printf("%s DRAM init failed %d\n", __func__, ret);
 		return ret;
 	}
 
@@ -1717,8 +3140,8 @@ static int rk3399_dmc_probe(struct udevice *dev)
 	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-			(phys_addr_t)&priv->pmugrf->os_reg2);
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2);
 #ifdef CONFIG_SPL_BUILD
 	struct ddr_param ddr_parem;
 

commit e4011c0133ecf4526b4b3ad9c21e6eab7adceb85
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:19:01 2018 +0800

    rockchip: dts: rk3399: use u-boot,dm-pre-reloc for pmu
    
    Change-Id: I3df556ff7133532ceb8f38bd69f7d8e378d265c8
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index a67aa42fbd..985257cfb8 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -33,6 +33,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&pmu {
+	u-boot,dm-pre-reloc;
+};
+
 &pmugrf {
 	u-boot,dm-pre-reloc;
 };

commit d6f493bc550dc87a06e7fb2f864f285e35b8bbd5
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:15:18 2018 +0800

    rockchip: arm64: rk3399: syscon add support for pmu
    
    Change-Id: Ibc89ac33df07c6ea3e38d4c6cb4f07b8747589df
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 5cf57f4d45..bd1a85e030 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = {
 	{ .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
 	{ .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF },
 	{ .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
+	{ .compatible = "rockchip,rk3399-pmu", .data = ROCKCHIP_SYSCON_PMU },
 	{ }
 };
 
@@ -62,4 +63,11 @@ U_BOOT_DRIVER(rockchip_rk3399_cic) = {
 	.of_match = rk3399_syscon_ids + 3,
 	.bind = rk3399_syscon_bind_of_platdata,
 };
+
+U_BOOT_DRIVER(rockchip_rk3399_pmu) = {
+	.name = "rockchip_rk3399_pmu",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3399_syscon_ids + 4,
+	.bind = rk3399_syscon_bind_of_platdata,
+};
 #endif

commit 51c830f2d215b31b40c6f914c0d433697a8c66d4
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 28 17:06:27 2018 +0800

    rockchip: clk: rk3399: support 50MHz and 400MHz for ddr clock
    
    Change-Id: I9d3a64ce38986f2c48e1f2614bcc274340674aa7
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 46b907254c..993bf57867 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -911,23 +911,31 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 
 	/*  clk_ddrc == DPLL = 24MHz / refdiv * fbdiv / postdiv1 / postdiv2 */
 	switch (set_rate) {
-	case 200*MHz:
+	case 50 * MHz:
+		dpll_cfg = (struct pll_div)
+		{.refdiv = 1, .fbdiv = 12, .postdiv1 = 3, .postdiv2 = 2};
+		break;
+	case 200 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 1, .fbdiv = 50, .postdiv1 = 6, .postdiv2 = 1};
 		break;
-	case 300*MHz:
+	case 300 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 2, .fbdiv = 100, .postdiv1 = 4, .postdiv2 = 1};
 		break;
-	case 666*MHz:
+	case 400 * MHz:
+		dpll_cfg = (struct pll_div)
+		{.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1};
+		break;
+	case 666 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 2, .fbdiv = 111, .postdiv1 = 2, .postdiv2 = 1};
 		break;
-	case 800*MHz:
+	case 800 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1};
 		break;
-	case 933*MHz:
+	case 933 * MHz:
 		dpll_cfg = (struct pll_div)
 		{.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1};
 		break;

commit 31d8c61d58042d968391331b894224b660a2accc
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Dec 25 10:09:42 2018 +0800

    driver: ram: rockchip: rk3399: dram init select common code
    
    Add support dram capacity detect.
    Select dram timing file base on dram type and clock frequency,
    don't need care dram capacity.Dram capacity will auto detect.
    
    Change-Id: I0554a0ec0c753a159406330aa0baa2daafe7ab93
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
index f032eece23..d0d7c6439d 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80120e12
 		0x11030802
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80120e12
 		0x11030802
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
index d54ea82d1e..cab72af48b 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
index 80e946e35e..db407df2de 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80181219
 		0x17050a03
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80181219
 		0x17050a03
diff --git a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
index 745e2a5f2e..45db141f08 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x80151015
 		0x14040902
diff --git a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
index 65dfc3806c..ad2d943ced 100644
--- a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
+++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
@@ -14,6 +14,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x1d191519
 		0x14040808
@@ -29,6 +31,8 @@
 		0x0
 		0xf
 		0xf
+		0xf
+		0xf
 		1
 		0x1d191519
 		0x14040808
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index 2cee2e5ee5..9f608d72ad 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -6,6 +6,7 @@
 
 #ifndef _ASM_ARCH_SDRAM_RK3399_H
 #define _ASM_ARCH_SDRAM_RK3399_H
+#include <asm/arch/sdram_share.h>
 
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];
@@ -19,30 +20,6 @@ struct rk3399_ddr_pi_regs {
 	u32 denali_pi[200];
 };
 
-struct rk3399_msch_regs {
-	u32 coreid;
-	u32 revisionid;
-	u32 ddrconf;
-	u32 ddrsize;
-	u32 ddrtiminga0;
-	u32 ddrtimingb0;
-	u32 ddrtimingc0;
-	u32 devtodev0;
-	u32 reserved0[(0x110 - 0x20) / 4];
-	u32 ddrmode;
-	u32 reserved1[(0x1000 - 0x114) / 4];
-	u32 agingx0;
-};
-
-struct rk3399_msch_timings {
-	u32 ddrtiminga0;
-	u32 ddrtimingb0;
-	u32 ddrtimingc0;
-	u32 devtodev0;
-	u32 ddrmode;
-	u32 agingx0;
-};
-
 struct rk3399_ddr_cic_regs {
 	u32 cic_ctrl0;
 	u32 cic_ctrl1;
@@ -65,37 +42,13 @@ struct rk3399_ddr_cic_regs {
 #define MEM_RST_VALID	1
 
 struct rk3399_sdram_channel {
-	unsigned int rank;
-	/* dram column number, 0 means this channel is invalid */
-	unsigned int col;
-	/* dram bank number, 3:8bank, 2:4bank */
-	unsigned int bk;
-	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned int bw;
-	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned int dbw;
-	/*
-	 * row_3_4 = 1: 6Gb or 12Gb die
-	 * row_3_4 = 0: normal die, power of 2
-	 */
-	unsigned int row_3_4;
-	unsigned int cs0_row;
-	unsigned int cs1_row;
-	unsigned int ddrconfig;
-	struct rk3399_msch_timings noc_timings;
-};
-
-struct rk3399_base_params {
-	unsigned int ddr_freq;
-	unsigned int dramtype;
-	unsigned int num_channels;
-	unsigned int stride;
-	unsigned int odt;
+	struct sdram_cap_info cap_info;
+	struct sdram_msch_timings noc_timings;
 };
 
 struct rk3399_sdram_params {
 	struct rk3399_sdram_channel ch[2];
-	struct rk3399_base_params base;
+	struct sdram_base_params base;
 	struct rk3399_ddr_pctl_regs pctl_regs;
 	struct rk3399_ddr_pi_regs pi_regs;
 	struct rk3399_ddr_publ_regs phy_regs;
@@ -108,4 +61,13 @@ struct rk3399_sdram_params {
 #define PI_WDQ_LEVELING		(1 << 4)
 #define PI_FULL_TRAINING	0xff
 
+enum {
+	STRIDE_128B = 0,
+	STRIDE_256B = 1,
+	STRIDE_512B = 2,
+	STRIDE_4KB = 3,
+	UN_STRIDE = 4,
+	PART_STRIDE = 5
+};
+
 #endif
diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index f56103356f..b45169552f 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -67,6 +67,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index a28d8fdd2d..23ab932de6 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -67,6 +67,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 95b4d07a8f..da68739877 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -65,6 +65,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index cb014631e5..52411bbdab 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -77,6 +77,10 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DEBUG_UART_BASE=0xFF180000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 27830c60bd..3803831b90 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -80,6 +80,10 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index 862689987e..1e463ce644 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -82,6 +82,10 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_RK3399=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index d0f74a4f9f..fa2b99d24c 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -12,7 +12,7 @@ obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
-obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
+obj-$(CONFIG_ROCKCHIP_RK3399) += sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index fa8da66f4e..ee6767bada 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -28,7 +28,7 @@ struct chan_info {
 	struct rk3399_ddr_pctl_regs *pctl;
 	struct rk3399_ddr_pi_regs *pi;
 	struct rk3399_ddr_publ_regs *publ;
-	struct rk3399_msch_regs *msch;
+	struct msch_regs *msch;
 };
 
 struct dram_info {
@@ -68,15 +68,30 @@ struct rockchip_dmc_plat {
 	struct regmap *map;
 };
 
-static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+#define CRU_SFTRST_DDR_CTRL(ch, n)	((0x1 << (8 + 16 + (ch) * 4)) | \
+						((n) << (8 + (ch) * 4)))
+#define CRU_SFTRST_DDR_PHY(ch, n)	((0x1 << (9 + 16 + (ch) * 4)) | \
+						((n) << (9 + (ch) * 4)))
+static void rkclk_ddr_reset(struct rk3399_cru *cru, u32 channel, u32 ctl,
+			    u32 phy)
 {
-	int i;
+	channel &= 0x1;
+	ctl &= 0x1;
+	phy &= 0x1;
+	writel(CRU_SFTRST_DDR_CTRL(channel, ctl) |
+					CRU_SFTRST_DDR_PHY(channel, phy),
+					&cru->softrst_con[4]);
+}
 
-	for (i = 0; i < n / sizeof(u32); i++) {
-		writel(*src, dest);
-		src++;
-		dest++;
-	}
+static void phy_pctrl_reset(struct rk3399_cru *cru,
+			    u32 channel)
+{
+	rkclk_ddr_reset(cru, channel, 1, 1);
+	udelay(10);
+	rkclk_ddr_reset(cru, channel, 1, 0);
+	udelay(10);
+	rkclk_ddr_reset(cru, channel, 0, 0);
+	udelay(10);
 }
 
 static void phy_dll_bypass_set(struct rk3399_ddr_publ_regs *ddr_publ_regs,
@@ -122,35 +137,37 @@ static void set_memory_map(const struct chan_info *chan, u32 channel,
 	u32 row;
 
 	/* Get row number from ddrconfig setting */
-	if (sdram_ch->ddrconfig < 2 || sdram_ch->ddrconfig == 4)
+	if (sdram_ch->cap_info.ddrconfig < 2 ||
+	    sdram_ch->cap_info.ddrconfig == 4)
 		row = 16;
-	else if (sdram_ch->ddrconfig == 3)
+	else if (sdram_ch->cap_info.ddrconfig == 3)
 		row = 14;
 	else
 		row = 15;
 
-	cs_map = (sdram_ch->rank > 1) ? 3 : 1;
-	reduc = (sdram_ch->bw == 2) ? 0 : 1;
+	cs_map = (sdram_ch->cap_info.rank > 1) ? 3 : 1;
+	reduc = (sdram_ch->cap_info.bw == 2) ? 0 : 1;
 
 	/* Set the dram configuration to ctrl */
-	clrsetbits_le32(&denali_ctl[191], 0xF, (12 - sdram_ch->col));
+	clrsetbits_le32(&denali_ctl[191], 0xF, (12 - sdram_ch->cap_info.col));
 	clrsetbits_le32(&denali_ctl[190], (0x3 << 16) | (0x7 << 24),
-			((3 - sdram_ch->bk) << 16) |
+			((3 - sdram_ch->cap_info.bk) << 16) |
 			((16 - row) << 24));
 
 	clrsetbits_le32(&denali_ctl[196], 0x3 | (1 << 16),
 			cs_map | (reduc << 16));
 
 	/* PI_199 PI_COL_DIFF:RW:0:4 */
-	clrsetbits_le32(&denali_pi[199], 0xF, (12 - sdram_ch->col));
+	clrsetbits_le32(&denali_pi[199], 0xF, (12 - sdram_ch->cap_info.col));
 
 	/* PI_155 PI_ROW_DIFF:RW:24:3 PI_BANK_DIFF:RW:16:2 */
 	clrsetbits_le32(&denali_pi[155], (0x3 << 16) | (0x7 << 24),
-			((3 - sdram_ch->bk) << 16) |
+			((3 - sdram_ch->cap_info.bk) << 16) |
 			((16 - row) << 24));
 	/* PI_41 PI_CS_MAP:RW:24:4 */
 	clrsetbits_le32(&denali_pi[41], 0xf << 24, cs_map << 24);
-	if ((sdram_ch->rank == 1) && (sdram_params->base.dramtype == DDR3))
+	if (sdram_ch->cap_info.rank == 1 &&
+	    sdram_params->base.dramtype == DDR3)
 		writel(0x2EC7FFFF, &denali_pi[34]);
 }
 
@@ -294,7 +311,7 @@ static void set_ds_odt(const struct chan_info *chan,
 }
 
 static int phy_io_config(const struct chan_info *chan,
-			  const struct rk3399_sdram_params *sdram_params)
+			 const struct rk3399_sdram_params *sdram_params)
 {
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 vref_mode_dq, vref_value_dq, vref_mode_ac, vref_value_ac;
@@ -423,7 +440,6 @@ static int phy_io_config(const struct chan_info *chan,
 	/* PHY_939 PHY_PAD_CS_DRIVE */
 	clrsetbits_le32(&denali_phy[939], 0x7 << 14, mode_sel << 14);
 
-
 	/* speed setting */
 	if (sdram_params->base.ddr_freq < 400)
 		speed = 0x0;
@@ -471,11 +487,11 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	 * work around controller bug:
 	 * Do not program DRAM_CLASS until NO_PHY_IND_TRAIN_INT is programmed
 	 */
-	copy_to_reg(&denali_ctl[1], &params_ctl[1],
-		    sizeof(struct rk3399_ddr_pctl_regs) - 4);
+	sdram_copy_to_reg(&denali_ctl[1], &params_ctl[1],
+			  sizeof(struct rk3399_ddr_pctl_regs) - 4);
 	writel(params_ctl[0], &denali_ctl[0]);
-	copy_to_reg(denali_pi, &sdram_params->pi_regs.denali_pi[0],
-		    sizeof(struct rk3399_ddr_pi_regs));
+	sdram_copy_to_reg(denali_pi, &sdram_params->pi_regs.denali_pi[0],
+			  sizeof(struct rk3399_ddr_pi_regs));
 	/* rank count need to set for init */
 	set_memory_map(chan, channel, sdram_params);
 
@@ -492,7 +508,7 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	setbits_le32(&denali_pi[0], START);
 	setbits_le32(&denali_ctl[0], START);
 
-	/* Wating for phy DLL lock */
+	/* Waiting for phy DLL lock */
 	while (1) {
 		tmp = readl(&denali_phy[920]);
 		tmp1 = readl(&denali_phy[921]);
@@ -504,14 +520,20 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 			break;
 	}
 
-	copy_to_reg(&denali_phy[896], &params_phy[896], (958 - 895) * 4);
-	copy_to_reg(&denali_phy[0], &params_phy[0], (90 - 0 + 1) * 4);
-	copy_to_reg(&denali_phy[128], &params_phy[128], (218 - 128 + 1) * 4);
-	copy_to_reg(&denali_phy[256], &params_phy[256], (346 - 256 + 1) * 4);
-	copy_to_reg(&denali_phy[384], &params_phy[384], (474 - 384 + 1) * 4);
-	copy_to_reg(&denali_phy[512], &params_phy[512], (549 - 512 + 1) * 4);
-	copy_to_reg(&denali_phy[640], &params_phy[640], (677 - 640 + 1) * 4);
-	copy_to_reg(&denali_phy[768], &params_phy[768], (805 - 768 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[896], &params_phy[896], (958 - 895) * 4);
+	sdram_copy_to_reg(&denali_phy[0], &params_phy[0], (90 - 0 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[128],
+			  &params_phy[128], (218 - 128 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[256],
+			  &params_phy[256], (346 - 256 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[384],
+			  &params_phy[384], (474 - 384 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[512],
+			  &params_phy[512], (549 - 512 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[640],
+			  &params_phy[640], (677 - 640 + 1) * 4);
+	sdram_copy_to_reg(&denali_phy[768],
+			  &params_phy[768], (805 - 768 + 1) * 4);
 	set_ds_odt(chan, sdram_params);
 
 	/*
@@ -547,12 +569,12 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	/* PHY_DLL_RST_EN */
 	clrsetbits_le32(&denali_phy[957], 0x3 << 24, 0x2 << 24);
 
-	/* Wating for PHY and DRAM init complete */
+	/* Waiting for PHY and DRAM init complete */
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
 			pr_err("DRAM (%s): phy failed to lock within  %ld ms\n",
-			      __func__, timeout_ms);
+			       __func__, timeout_ms);
 			return -ETIME;
 		}
 	} while (!(readl(&denali_ctl[203]) & (1 << 3)));
@@ -569,7 +591,7 @@ static void select_per_cs_training_index(const struct chan_info *chan,
 	u32 *denali_phy = chan->publ->denali_phy;
 
 	/* PHY_84 PHY_PER_CS_TRAINING_EN_0 1bit offset_16 */
-	if ((readl(&denali_phy[84])>>16) & 1) {
+	if ((readl(&denali_phy[84]) >> 16) & 1) {
 		/*
 		 * PHY_8/136/264/392
 		 * phy_per_cs_training_index_X 1bit offset_24
@@ -617,7 +639,7 @@ static int data_training_ca(const struct chan_info *chan, u32 channel,
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_err = 0;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -667,7 +689,7 @@ static int data_training_wl(const struct chan_info *chan, u32 channel,
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -723,7 +745,7 @@ static int data_training_rg(const struct chan_info *chan, u32 channel,
 	u32 *denali_phy = chan->publ->denali_phy;
 	u32 i, tmp;
 	u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -778,7 +800,7 @@ static int data_training_rl(const struct chan_info *chan, u32 channel,
 {
 	u32 *denali_pi = chan->pi->denali_pi;
 	u32 i, tmp;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -819,7 +841,7 @@ static int data_training_wdql(const struct chan_info *chan, u32 channel,
 {
 	u32 *denali_pi = chan->pi->denali_pi;
 	u32 i, tmp;
-	u32 rank = sdram_params->ch[channel].rank;
+	u32 rank = sdram_params->ch[channel].cap_info.rank;
 
 	for (i = 0; i < rank; i++) {
 		select_per_cs_training_index(chan, i);
@@ -859,6 +881,7 @@ static int data_training(const struct chan_info *chan, u32 channel,
 			 u32 training_flag)
 {
 	u32 *denali_phy = chan->publ->denali_phy;
+	int ret = 0;
 
 	/* PHY_927 PHY_PAD_DQS_DRIVE  RPULL offset_22 */
 	setbits_le32(&denali_phy[927], (1 << 22));
@@ -879,29 +902,45 @@ static int data_training(const struct chan_info *chan, u32 channel,
 	}
 
 	/* ca training(LPDDR4,LPDDR3 support) */
-	if ((training_flag & PI_CA_TRAINING) == PI_CA_TRAINING)
-		data_training_ca(chan, channel, sdram_params);
+	if ((training_flag & PI_CA_TRAINING) == PI_CA_TRAINING) {
+		ret = data_training_ca(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* write leveling(LPDDR4,LPDDR3,DDR3 support) */
-	if ((training_flag & PI_WRITE_LEVELING) == PI_WRITE_LEVELING)
-		data_training_wl(chan, channel, sdram_params);
+	if ((training_flag & PI_WRITE_LEVELING) == PI_WRITE_LEVELING) {
+		ret = data_training_wl(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* read gate training(LPDDR4,LPDDR3,DDR3 support) */
-	if ((training_flag & PI_READ_GATE_TRAINING) == PI_READ_GATE_TRAINING)
-		data_training_rg(chan, channel, sdram_params);
+	if ((training_flag & PI_READ_GATE_TRAINING) == PI_READ_GATE_TRAINING) {
+		ret = data_training_rg(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* read leveling(LPDDR4,LPDDR3,DDR3 support) */
-	if ((training_flag & PI_READ_LEVELING) == PI_READ_LEVELING)
-		data_training_rl(chan, channel, sdram_params);
+	if ((training_flag & PI_READ_LEVELING) == PI_READ_LEVELING) {
+		ret = data_training_rl(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* wdq leveling(LPDDR4 support) */
-	if ((training_flag & PI_WDQ_LEVELING) == PI_WDQ_LEVELING)
-		data_training_wdql(chan, channel, sdram_params);
+	if ((training_flag & PI_WDQ_LEVELING) == PI_WDQ_LEVELING) {
+		ret = data_training_wdql(chan, channel, sdram_params);
+		if (ret != 0)
+			goto out;
+	}
 
 	/* PHY_927 PHY_PAD_DQS_DRIVE  RPULL offset_22 */
 	clrbits_le32(&denali_phy[927], (1 << 22));
 
-	return 0;
+out:
+	return ret;
 }
 
 static void set_ddrconfig(const struct chan_info *chan,
@@ -909,18 +948,18 @@ static void set_ddrconfig(const struct chan_info *chan,
 			  unsigned char channel, u32 ddrconfig)
 {
 	/* only need to set ddrconfig */
-	struct rk3399_msch_regs *ddr_msch_regs = chan->msch;
+	struct msch_regs *ddr_msch_regs = chan->msch;
 	unsigned int cs0_cap = 0;
 	unsigned int cs1_cap = 0;
 
-	cs0_cap = (1 << (sdram_params->ch[channel].cs0_row
-			+ sdram_params->ch[channel].col
-			+ sdram_params->ch[channel].bk
-			+ sdram_params->ch[channel].bw - 20));
-	if (sdram_params->ch[channel].rank > 1)
-		cs1_cap = cs0_cap >> (sdram_params->ch[channel].cs0_row
-				- sdram_params->ch[channel].cs1_row);
-	if (sdram_params->ch[channel].row_3_4) {
+	cs0_cap = (1 << (sdram_params->ch[channel].cap_info.cs0_row
+			+ sdram_params->ch[channel].cap_info.col
+			+ sdram_params->ch[channel].cap_info.bk
+			+ sdram_params->ch[channel].cap_info.bw - 20));
+	if (sdram_params->ch[channel].cap_info.rank > 1)
+		cs1_cap = cs0_cap >> (sdram_params->ch[channel].cap_info.cs0_row
+				- sdram_params->ch[channel].cap_info.cs1_row);
+	if (sdram_params->ch[channel].cap_info.row_3_4) {
 		cs0_cap = cs0_cap * 3 / 4;
 		cs1_cap = cs1_cap * 3 / 4;
 	}
@@ -931,55 +970,36 @@ static void set_ddrconfig(const struct chan_info *chan,
 }
 
 static void dram_all_config(struct dram_info *dram,
-			    const struct rk3399_sdram_params *sdram_params)
+			    struct rk3399_sdram_params *sdram_params)
 {
-	u32 sys_reg = 0;
+	u32 sys_reg2 = 0;
+	u32 sys_reg3 = 0;
 	unsigned int channel, idx;
 
-	sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
-	sys_reg |= (sdram_params->base.num_channels - 1)
-		    << SYS_REG_NUM_CH_SHIFT;
 	for (channel = 0, idx = 0;
 	     (idx < sdram_params->base.num_channels) && (channel < 2);
 	     channel++) {
-		const struct rk3399_sdram_channel *info =
-			&sdram_params->ch[channel];
-		struct rk3399_msch_regs *ddr_msch_regs;
-		const struct rk3399_msch_timings *noc_timing;
+		struct msch_regs *ddr_msch_regs;
+		struct sdram_msch_timings *noc_timing;
 
-		if (sdram_params->ch[channel].col == 0)
+		if (sdram_params->ch[channel].cap_info.col == 0)
 			continue;
 		idx++;
-		sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(channel);
-		sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(channel);
-		sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(channel);
-		sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(channel);
-		sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(channel);
-		sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(channel);
-		sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(channel);
-		sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(channel);
-		sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(channel);
-
+		sdram_org_config(&sdram_params->ch[channel].cap_info,
+				 &sdram_params->base, &sys_reg2,
+				 &sys_reg3, channel);
 		ddr_msch_regs = dram->chan[channel].msch;
 		noc_timing = &sdram_params->ch[channel].noc_timings;
-		writel(noc_timing->ddrtiminga0,
-		       &ddr_msch_regs->ddrtiminga0);
-		writel(noc_timing->ddrtimingb0,
-		       &ddr_msch_regs->ddrtimingb0);
-		writel(noc_timing->ddrtimingc0,
-		       &ddr_msch_regs->ddrtimingc0);
-		writel(noc_timing->devtodev0,
-		       &ddr_msch_regs->devtodev0);
-		writel(noc_timing->ddrmode,
-		       &ddr_msch_regs->ddrmode);
+		sdram_msch_config(ddr_msch_regs, noc_timing);
 
 		/* rank 1 memory clock disable (dfi_dram_clk_disable = 1) */
-		if (sdram_params->ch[channel].rank == 1)
+		if (sdram_params->ch[channel].cap_info.rank == 1)
 			setbits_le32(&dram->chan[channel].pctl->denali_ctl[276],
 				     1 << 17);
 	}
 
-	writel(sys_reg, &dram->pmugrf->os_reg2);
+	writel(sys_reg2, &dram->pmugrf->os_reg2);
+	writel(sys_reg3, &dram->pmugrf->os_reg3);
 	rk_clrsetreg(&dram->pmusgrf->soc_con4, 0x1f << 10,
 		     sdram_params->base.stride << 10);
 
@@ -991,7 +1011,7 @@ static void dram_all_config(struct dram_info *dram,
 }
 
 static int switch_to_phy_index1(struct dram_info *dram,
-				 const struct rk3399_sdram_params *sdram_params)
+				const struct rk3399_sdram_params *sdram_params)
 {
 	u32 channel;
 	u32 *denali_phy;
@@ -1025,7 +1045,7 @@ static int switch_to_phy_index1(struct dram_info *dram,
 		denali_phy = dram->chan[channel].publ->denali_phy;
 		clrsetbits_le32(&denali_phy[896], (0x3 << 8) | 1, 1 << 8);
 		ret = data_training(&dram->chan[channel], channel,
-				  sdram_params, PI_FULL_TRAINING);
+				    sdram_params, PI_FULL_TRAINING);
 		if (ret) {
 			debug("index1 training failed\n");
 			return ret;
@@ -1035,12 +1055,458 @@ static int switch_to_phy_index1(struct dram_info *dram,
 	return 0;
 }
 
+u16  ddr_cfg_2_rbc[] = {
+		/*
+		 * [6]	  highest bit col
+		 * [5:3]  max row(14+n)
+		 * [2]    insertion row
+		 * [1:0]  col(9+n),col, data bus 32bit
+		 *
+		 * highbitcol, max_row, insertion_row,  col
+		 */
+		((0 << 6) | (2 << 3) | (0 << 2) | 0), /* 0 */
+		((0 << 6) | (2 << 3) | (0 << 2) | 1), /* 1 */
+		((0 << 6) | (1 << 3) | (0 << 2) | 2), /* 2 */
+		((0 << 6) | (0 << 3) | (0 << 2) | 3), /* 3 */
+		((0 << 6) | (2 << 3) | (1 << 2) | 1), /* 4 */
+		((0 << 6) | (1 << 3) | (1 << 2) | 2), /* 5 */
+		((1 << 6) | (0 << 3) | (0 << 2) | 2), /* 6 */
+		((1 << 6) | (1 << 3) | (0 << 2) | 2), /* 7 */
+};
+
+unsigned int calculate_ddrconfig(struct rk3399_sdram_params *sdram_params,
+				 unsigned int channel)
+{
+	unsigned int i;
+	unsigned int cs0_row = sdram_params->ch[channel].cap_info.cs0_row;
+	unsigned int col = sdram_params->ch[channel].cap_info.col;
+	unsigned int bw = sdram_params->ch[channel].cap_info.bw;
+
+	col -= (bw == 2) ? 0 : 1;
+	col -= 9;
+
+	for (i = 0; i < 4; i++) {
+		if ((col == (ddr_cfg_2_rbc[i] & 0x3)) &&
+		    (cs0_row <= (((ddr_cfg_2_rbc[i] >> 3) & 0x7) + 14)))
+			break;
+	}
+
+	if (i >= 4)
+		i = -1;
+
+	return i;
+}
+
+unsigned char calculate_stride(struct rk3399_sdram_params *sdram_params)
+{
+	unsigned int gstride_type;
+	unsigned int channel;
+	unsigned int chinfo = 0;
+	unsigned int cap = 0;
+	unsigned int stride = -1;
+	unsigned int ch_cap[2] = {0, 0};
+
+	gstride_type = STRIDE_256B;
+
+	for (channel = 0; channel < 2; channel++) {
+		unsigned int cs0_cap = 0;
+		unsigned int cs1_cap = 0;
+		struct sdram_cap_info *cap_info =
+			&sdram_params->ch[channel].cap_info;
+
+		if (cap_info->col == 0)
+			continue;
+
+		cs0_cap = (1 << (cap_info->cs0_row + cap_info->col +
+				 cap_info->bk + cap_info->bw - 20));
+		if (cap_info->rank > 1)
+			cs1_cap = cs0_cap >> (cap_info->cs0_row
+					      - cap_info->cs1_row);
+		if (cap_info->row_3_4) {
+			cs0_cap = cs0_cap * 3 / 4;
+			cs1_cap = cs1_cap * 3 / 4;
+		}
+		ch_cap[channel] = cs0_cap + cs1_cap;
+		chinfo |= 1 << channel;
+	}
+
+	cap = ch_cap[0] + ch_cap[1];
+	if (sdram_params->base.num_channels == 1) {
+		if (chinfo & 1) /* channel a only */
+			stride = 0x17;
+		else /* channel b only */
+			stride = 0x18;
+	} else {/* 2 channel */
+		if (ch_cap[0] == ch_cap[1]) {
+			/* interleaved */
+			if (gstride_type == PART_STRIDE) {
+			/*
+			 * first 64MB no interleaved other 256B interleaved
+			 * if 786M+768M.useful space from 0-1280MB and
+			 * 1536MB-1792MB
+			 * if 1.5G+1.5G(continuous).useful space from 0-2560MB
+			 * and 3072MB-3584MB
+			 */
+				stride = 0x1F;
+			} else {
+				switch (cap) {
+				/* 512MB */
+				case 512:
+					stride = 0;
+					break;
+				/* 1GB unstride or 256B stride*/
+				case 1024:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x1 : 0x5;
+					break;
+				/*
+				 * 768MB + 768MB same as total 2GB memory
+				 * useful space: 0-768MB 1GB-1792MB
+				 */
+				case 1536:
+				/* 2GB unstride or 256B or 512B stride */
+				case 2048:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x2 :
+						((gstride_type == STRIDE_512B) ?
+						 0xA : 0x9);
+					break;
+				/* 1536MB + 1536MB */
+				case 3072:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x3 :
+						((gstride_type == STRIDE_512B) ?
+						 0x12 : 0x11);
+					break;
+				/* 4GB  unstride or 128B,256B,512B,4KB stride */
+				case 4096:
+					stride = (gstride_type == UN_STRIDE) ?
+						0x3 : (0xC + gstride_type);
+					break;
+				}
+			}
+		}
+		if (ch_cap[0] == 2048 && ch_cap[1] == 1024) {
+			/* 2GB + 1GB */
+			stride = (gstride_type == UN_STRIDE) ? 0x3 : 0x19;
+		}
+		/*
+		 * remain two channel capability not equal OR capability
+		 * power function of 2
+		 */
+		if (stride == (-1)) {
+			switch ((ch_cap[0] > ch_cap[1]) ?
+				ch_cap[0] : ch_cap[1]) {
+			case 256: /* 256MB + 128MB */
+				stride = 0;
+				break;
+			case 512: /* 512MB + 256MB */
+				stride = 1;
+				break;
+			case 1024:/* 1GB + 128MB/256MB/384MB/512MB/768MB */
+				stride = 2;
+				break;
+			case 2048: /* 2GB + 128MB/256MB/384MB/512MB/768MB/1GB */
+				stride = 3;
+				break;
+			default:
+				break;
+			}
+		}
+		if (stride == (-1))
+			goto error;
+	}
+	switch (stride) {
+	case 0xc:
+		printf("128B stride\n");
+		break;
+	case 5:
+	case 9:
+	case 0xd:
+	case 0x11:
+	case 0x19:
+		printf("256B stride\n");
+		break;
+	case 0xa:
+	case 0xe:
+	case 0x12:
+		printf("512B stride\n");
+		break;
+	case 0xf:
+		printf("4K stride\n");
+		break;
+	case 0x1f:
+		printf("32MB + 256B stride\n");
+		break;
+	default:
+		printf("no stride\n");
+	}
+
+	return stride;
+error:
+	printf("Cap not support!\n");
+	return (-1);
+}
+
+static void set_ddr_stride(struct rk3399_pmusgrf_regs *pmusgrf, u32 stride)
+{
+	rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10,
+		     stride << 10);
+}
+
+void set_cap_relate_config(const struct chan_info *chan,
+			   struct rk3399_sdram_params *sdram_params,
+			   unsigned int channel)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 tmp;
+	struct sdram_msch_timings *noc_timing;
+
+	if (sdram_params->base.dramtype == LPDDR3) {
+		tmp = (8 << sdram_params->ch[channel].cap_info.bw) /
+			(8 << sdram_params->ch[channel].cap_info.dbw);
+		/* memdata_ratio
+		 * 1 -> 0, 2 -> 1, 4 -> 2
+		 */
+		clrsetbits_le32(&denali_ctl[197], 0x7,
+				(tmp >> 1));
+		clrsetbits_le32(&denali_ctl[198], 0x7 << 8,
+				(tmp >> 1) << 8);
+	}
+	noc_timing = &sdram_params->ch[channel].noc_timings;
+	/*
+	 * noc timing bw relate timing is 32 bit, and real bw is 16bit
+	 * actually noc reg is setting at function dram_all_config
+	 */
+	if (sdram_params->ch[channel].cap_info.bw == 16 &&
+	    noc_timing->ddrmode.b.mwrsize == 2) {
+		if (noc_timing->ddrmode.b.burstsize)
+			noc_timing->ddrmode.b.burstsize -= 1;
+		noc_timing->ddrmode.b.mwrsize -= 1;
+		noc_timing->ddrtimingc0.b.burstpenalty *= 2;
+		noc_timing->ddrtimingc0.b.wrtomwr *= 2;
+	}
+}
+
+void clear_channel_params(struct rk3399_sdram_params *sdram_params,
+			  unsigned int channel)
+{
+	sdram_params->ch[channel].cap_info.rank = 0;
+	sdram_params->ch[channel].cap_info.col = 0;
+	sdram_params->ch[channel].cap_info.bk = 0;
+	sdram_params->ch[channel].cap_info.bw = 32;
+	sdram_params->ch[channel].cap_info.dbw = 32;
+	sdram_params->ch[channel].cap_info.row_3_4 = 0;
+	sdram_params->ch[channel].cap_info.cs0_row = 0;
+	sdram_params->ch[channel].cap_info.cs1_row = 0;
+	sdram_params->ch[channel].cap_info.ddrconfig = 0;
+}
+
+/* CS0,n=1
+ * CS1,n=2
+ * CS0 & CS1, n=3
+ * cs0_cap: MB unit
+ */
+void dram_set_cs(const struct chan_info *chan, u32 cs_map, u32 cs0_cap,
+		 unsigned char dramtype)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 *denali_pi = chan->pi->denali_pi;
+	struct msch_regs *ddr_msch_regs = chan->msch;
+
+	clrsetbits_le32(&denali_ctl[196], 0x3, cs_map);
+	writel((cs0_cap / 32) | (((4096 - cs0_cap) / 32) << 8),
+	       &ddr_msch_regs->ddrsize);
+	if (dramtype == LPDDR4) {
+		if (cs_map == 1)
+			cs_map = 0x5;
+		else if (cs_map == 2)
+			cs_map = 0xa;
+		else
+			cs_map = 0xF;
+	}
+	/*PI_41 PI_CS_MAP:RW:24:4*/
+	clrsetbits_le32(&denali_pi[41],
+			0xf << 24, cs_map << 24);
+	if (cs_map == 1 && dramtype == DDR3)
+		writel(0x2EC7FFFF, &denali_pi[34]);
+}
+
+void dram_set_bw(const struct chan_info *chan, u32 bw)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+
+	if (bw == 2)
+		clrbits_le32(&denali_ctl[196], 1 << 16);
+	else
+		setbits_le32(&denali_ctl[196], 1 << 16);
+}
+
+void dram_set_max_col(const struct chan_info *chan, u32 bw, u32 *pcol)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	struct msch_regs *ddr_msch_regs = chan->msch;
+	u32 *denali_pi = chan->pi->denali_pi;
+	u32 ddrconfig;
+
+	clrbits_le32(&denali_ctl[191], 0xf);
+	clrsetbits_le32(&denali_ctl[190],
+			(7 << 24),
+			((16 - ((bw == 2) ? 14 : 15)) << 24));
+	/*PI_199 PI_COL_DIFF:RW:0:4*/
+	clrbits_le32(&denali_pi[199], 0xf);
+	/*PI_155 PI_ROW_DIFF:RW:24:3*/
+	clrsetbits_le32(&denali_pi[155],
+			(7 << 24),
+			((16 - 12) << 24));
+	ddrconfig = (bw == 2) ? 3 : 2;
+	writel(ddrconfig | (ddrconfig << 8), &ddr_msch_regs->ddrconf);
+	/* set max cs0 size */
+	writel((4096 / 32) | ((0 / 32) << 8),
+	       &ddr_msch_regs->ddrsize);
+
+	*pcol = 12;
+}
+
+void dram_set_max_bank(const struct chan_info *chan, u32 bw, u32 *pbank,
+		       u32 *pcol)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 *denali_pi = chan->pi->denali_pi;
+
+	clrbits_le32(&denali_ctl[191], 0xf);
+	clrbits_le32(&denali_ctl[190], (3 << 16));
+	/*PI_199 PI_COL_DIFF:RW:0:4*/
+	clrbits_le32(&denali_pi[199], 0xf);
+	/*PI_155 PI_BANK_DIFF:RW:16:2*/
+	clrbits_le32(&denali_pi[155], (3 << 16));
+
+	*pbank = 3;
+	*pcol = 12;
+}
+
+void dram_set_max_row(const struct chan_info *chan, u32 bw, u32 *prow,
+		      u32 *pbank, u32 *pcol)
+{
+	u32 *denali_ctl = chan->pctl->denali_ctl;
+	u32 *denali_pi = chan->pi->denali_pi;
+	struct msch_regs *ddr_msch_regs = chan->msch;
+
+	clrsetbits_le32(&denali_ctl[191], 0xf, 12 - 10);
+	clrbits_le32(&denali_ctl[190],
+		     (0x3 << 16) | (0x7 << 24));
+	/*PI_199 PI_COL_DIFF:RW:0:4*/
+	clrsetbits_le32(&denali_pi[199], 0xf, 12 - 10);
+	/*PI_155 PI_ROW_DIFF:RW:24:3 PI_BANK_DIFF:RW:16:2*/
+	clrbits_le32(&denali_pi[155],
+		     (0x3 << 16) | (0x7 << 24));
+	writel(1 | (1 << 8), &ddr_msch_regs->ddrconf);
+	/* set max cs0 size */
+	writel((4096 / 32) | ((0 / 32) << 8),
+	       &ddr_msch_regs->ddrsize);
+
+	*prow = 16;
+	*pbank = 3;
+	*pcol = (bw == 2) ? 10 : 11;
+}
+
+static u64 dram_detect_cap(struct dram_info *dram,
+			   struct rk3399_sdram_params *sdram_params,
+			   unsigned char channel)
+{
+	const struct chan_info *chan = &dram->chan[channel];
+	struct sdram_cap_info *cap_info = &sdram_params->ch[channel].cap_info;
+	u32 bw;
+	u32 col_tmp;
+	u32 bk_tmp;
+	u32 row_tmp;
+	u32 cs0_cap;
+	u32 training_flag;
+	u32 ddrconfig;
+
+	/* detect bw */
+	bw = 2;
+	dram_set_bw(chan, bw);
+	cap_info->bw = bw;
+	if (data_training(chan, channel, sdram_params, PI_READ_GATE_TRAINING)) {
+		bw = 1;
+		dram_set_bw(chan, 1);
+		cap_info->bw = bw;
+		if (data_training(chan, channel, sdram_params,
+				  PI_READ_GATE_TRAINING)) {
+			printf("16bit error!!!\n");
+			goto error;
+		}
+	}
+
+	/*
+	 * LPDDR3 CA training msut be trigger before other training.
+	 * DDR3 is not have CA training.
+	 */
+	if (sdram_params->base.dramtype == LPDDR3)
+		training_flag = PI_WRITE_LEVELING;
+	else
+		training_flag = PI_FULL_TRAINING;
+
+	if (sdram_params->base.dramtype != LPDDR4) {
+		if (data_training(chan, channel, sdram_params, training_flag)) {
+			printf("full training error!!!\n");
+			goto error;
+		}
+	}
+
+	/* detect col */
+	dram_set_max_col(chan, bw, &col_tmp);
+	if (sdram_detect_col(cap_info, col_tmp) != 0)
+		goto error;
+
+	/* detect bank */
+	dram_set_max_bank(chan, bw, &bk_tmp, &col_tmp);
+	sdram_detect_bank(cap_info, col_tmp, bk_tmp);
+
+	/* detect row */
+	dram_set_max_row(chan, bw, &row_tmp, &bk_tmp, &col_tmp);
+	if (sdram_detect_row(cap_info, col_tmp, bk_tmp, row_tmp) != 0)
+		goto error;
+
+	/* detect row_3_4 */
+	sdram_detect_row_3_4(cap_info, col_tmp, bk_tmp);
+
+	/* set ddrconfig */
+	cs0_cap = (1 << (cap_info->cs0_row + cap_info->col + cap_info->bk +
+			 cap_info->bw - 20));
+	if (cap_info->row_3_4)
+		cs0_cap = cs0_cap * 3 / 4;
+
+	cap_info->cs1_row = cap_info->cs0_row;
+	set_memory_map(chan, channel, sdram_params);
+	ddrconfig = calculate_ddrconfig(sdram_params, channel);
+	if (-1 == ddrconfig)
+		goto error;
+	set_ddrconfig(chan, sdram_params, channel,
+		      cap_info->ddrconfig);
+
+	/* detect cs1 row */
+	sdram_detect_cs1_row(cap_info, sdram_params->base.dramtype);
+
+	/* detect die bw */
+	sdram_detect_dbw(cap_info, sdram_params->base.dramtype);
+
+	return 0;
+error:
+	return (-1);
+}
+
 static int sdram_init(struct dram_info *dram,
-		      const struct rk3399_sdram_params *sdram_params)
+		      struct rk3399_sdram_params *sdram_params)
 {
 	unsigned char dramtype = sdram_params->base.dramtype;
 	unsigned int ddr_freq = sdram_params->base.ddr_freq;
 	int channel;
+	u32 rank;
+	int ch;
+	u32 tmp;
+	u32 training_flag;
 
 	debug("Starting SDRAM initialization...\n");
 
@@ -1051,33 +1517,87 @@ static int sdram_init(struct dram_info *dram,
 		return -E2BIG;
 	}
 
+	/* detect rank */
+	for (ch = 0; ch < 2; ch++) {
+		sdram_params->ch[ch].cap_info.rank = 2;
+		for (rank = 2; rank != 0; rank--) {
+			for (channel = 0; channel < 2; channel++) {
+				const struct chan_info *chan =
+					&dram->chan[channel];
+				struct rk3399_cru *cru = dram->cru;
+				struct rk3399_ddr_publ_regs *publ = chan->publ;
+
+				phy_pctrl_reset(cru, channel);
+				phy_dll_bypass_set(publ, ddr_freq);
+				if (pctl_cfg(chan, channel, sdram_params) != 0)
+					printf("pctl_cfg fail\n");
+			}
+
+			/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */
+			if (dramtype == LPDDR3)
+				udelay(10);
+
+			tmp = (rank == 2) ? 3 : 1;
+			dram_set_cs(&dram->chan[ch], tmp, 2048,
+				    sdram_params->base.dramtype);
+			sdram_params->ch[ch].cap_info.rank = rank;
+			/*
+			 * LPDDR3 CA training msut be trigger before
+			 * other training.
+			 * DDR3 is not have CA training.
+			 * LPDDR4 need confirm here!
+			 */
+			if (sdram_params->base.dramtype == LPDDR3)
+				training_flag = PI_CA_TRAINING |
+						PI_READ_GATE_TRAINING;
+			else
+				training_flag = PI_READ_GATE_TRAINING;
+			if (!(data_training(&dram->chan[ch], ch, sdram_params,
+					    training_flag)))
+				break;
+		}
+		sdram_params->ch[ch].cap_info.rank = rank;
+	}
+
+	sdram_params->base.num_channels = 0;
 	for (channel = 0; channel < 2; channel++) {
 		const struct chan_info *chan = &dram->chan[channel];
-		struct rk3399_ddr_publ_regs *publ = chan->publ;
+		struct sdram_cap_info *cap_info =
+			&sdram_params->ch[channel].cap_info;
 
-		phy_dll_bypass_set(publ, ddr_freq);
-
-		if (channel >= sdram_params->base.num_channels)
+		if (cap_info->rank == 0) {
+			clear_channel_params(sdram_params, 1);
 			continue;
-
-		if (pctl_cfg(chan, channel, sdram_params) != 0) {
-			printf("pctl_cfg fail, reset\n");
-			return -EIO;
+		} else {
+			sdram_params->base.num_channels++;
 		}
 
-		/* LPDDR2/LPDDR3 need to wait DAI complete, max 10us */
-		if (dramtype == LPDDR3)
-			udelay(10);
+		printf("Channel ");
+		printf(channel ? "1: " : "0: ");
 
-		if (data_training(chan, channel,
-				  sdram_params, PI_FULL_TRAINING)) {
-			printf("SDRAM initialization failed, reset\n");
-			return -EIO;
+		if (channel == 0)
+			set_ddr_stride(dram->pmusgrf, 0x17);
+		else
+			set_ddr_stride(dram->pmusgrf, 0x18);
+
+		if (dram_detect_cap(dram, sdram_params, channel)) {
+			printf("Cap error!\n");
+			continue;
 		}
 
-		set_ddrconfig(chan, sdram_params, channel,
-			      sdram_params->ch[channel].ddrconfig);
+		sdram_print_ddr_info(cap_info, &sdram_params->base, 0);
+		set_memory_map(chan, channel, sdram_params);
+		cap_info->ddrconfig =
+			calculate_ddrconfig(sdram_params, channel);
+		if (-1 == cap_info->ddrconfig) {
+			printf("no ddrconfig find, Cap not support!\n");
+			continue;
+		}
+		set_ddrconfig(chan, sdram_params, channel, cap_info->ddrconfig);
+		set_cap_relate_config(chan, sdram_params, channel);
 	}
+
+	sdram_params->base.stride = calculate_stride(sdram_params);
 	dram_all_config(dram, sdram_params);
 	switch_to_phy_index1(dram, sdram_params);
 
@@ -1115,8 +1635,8 @@ static int conv_of_platdata(struct udevice *dev)
 	int ret;
 
 	ret = regmap_init_mem_platdata(dev, dtplat->reg,
-			ARRAY_SIZE(dtplat->reg) / 2,
-			&plat->map);
+				       ARRAY_SIZE(dtplat->reg) / 2,
+				       &plat->map);
 	if (ret)
 		return ret;
 
@@ -1225,7 +1745,6 @@ static struct ram_ops rk3399_dmc_ops = {
 	.get_info = rk3399_dmc_get_info,
 };
 
-
 static const struct udevice_id rk3399_dmc_ids[] = {
 	{ .compatible = "rockchip,rk3399-dmc" },
 	{ }

commit 55c5751eba871eec3045c5c1690074da3554b06e
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon Dec 24 21:18:19 2018 +0800

    driver: ram: rockchip: px30: dram init select common code
    
    Change-Id: I4f01c354355d61884f84bad160a54db927bb72cf
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
index 6b20b8eed4..dbed792f0d 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
@@ -5,211 +5,13 @@
 
 #ifndef _ASM_ARCH_SDRAM_PX30_H
 #define _ASM_ARCH_SDRAM_PX30_H
+#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_pctl_px30.h>
+#include <asm/arch/sdram_phy_px30.h>
+#include <asm/arch/sdram_phy_ron_rtt_px30.h>
 
 #define SR_IDLE				93
 #define PD_IDLE				13
-#define PATTERN				(0x5aa5f00f)
-
-/* ddr pctl registers define */
-#define DDR_PCTL2_MSTR			0x0
-#define DDR_PCTL2_STAT			0x4
-#define DDR_PCTL2_MSTR1			0x8
-#define DDR_PCTL2_MRCTRL0		0x10
-#define DDR_PCTL2_MRCTRL1		0x14
-#define DDR_PCTL2_MRSTAT		0x18
-#define DDR_PCTL2_MRCTRL2		0x1c
-#define DDR_PCTL2_DERATEEN		0x20
-#define DDR_PCTL2_DERATEINT		0x24
-#define DDR_PCTL2_PWRCTL		0x30
-#define DDR_PCTL2_PWRTMG		0x34
-#define DDR_PCTL2_HWLPCTL		0x38
-#define DDR_PCTL2_RFSHCTL0		0x50
-#define DDR_PCTL2_RFSHCTL1		0x54
-#define DDR_PCTL2_RFSHCTL2		0x58
-#define DDR_PCTL2_RFSHCTL4		0x5c
-#define DDR_PCTL2_RFSHCTL3		0x60
-#define DDR_PCTL2_RFSHTMG		0x64
-#define DDR_PCTL2_RFSHTMG1		0x68
-#define DDR_PCTL2_RFSHCTL5		0x6c
-#define DDR_PCTL2_INIT0			0xd0
-#define DDR_PCTL2_INIT1			0xd4
-#define DDR_PCTL2_INIT2			0xd8
-#define DDR_PCTL2_INIT3			0xdc
-#define DDR_PCTL2_INIT4			0xe0
-#define DDR_PCTL2_INIT5			0xe4
-#define DDR_PCTL2_INIT6			0xe8
-#define DDR_PCTL2_INIT7			0xec
-#define DDR_PCTL2_DIMMCTL		0xf0
-#define DDR_PCTL2_RANKCTL		0xf4
-#define DDR_PCTL2_CHCTL			0xfc
-#define DDR_PCTL2_DRAMTMG0		0x100
-#define DDR_PCTL2_DRAMTMG1		0x104
-#define DDR_PCTL2_DRAMTMG2		0x108
-#define DDR_PCTL2_DRAMTMG3		0x10c
-#define DDR_PCTL2_DRAMTMG4		0x110
-#define DDR_PCTL2_DRAMTMG5		0x114
-#define DDR_PCTL2_DRAMTMG6		0x118
-#define DDR_PCTL2_DRAMTMG7		0x11c
-#define DDR_PCTL2_DRAMTMG8		0x120
-#define DDR_PCTL2_DRAMTMG9		0x124
-#define DDR_PCTL2_DRAMTMG10		0x128
-#define DDR_PCTL2_DRAMTMG11		0x12c
-#define DDR_PCTL2_DRAMTMG12		0x130
-#define DDR_PCTL2_DRAMTMG13		0x134
-#define DDR_PCTL2_DRAMTMG14		0x138
-#define DDR_PCTL2_DRAMTMG15		0x13c
-#define DDR_PCTL2_DRAMTMG16		0x140
-#define DDR_PCTL2_ZQCTL0		0x180
-#define DDR_PCTL2_ZQCTL1		0x184
-#define DDR_PCTL2_ZQCTL2		0x188
-#define DDR_PCTL2_ZQSTAT		0x18c
-#define DDR_PCTL2_DFITMG0		0x190
-#define DDR_PCTL2_DFITMG1		0x194
-#define DDR_PCTL2_DFILPCFG0		0x198
-#define DDR_PCTL2_DFILPCFG1		0x19c
-#define DDR_PCTL2_DFIUPD0		0x1a0
-#define DDR_PCTL2_DFIUPD1		0x1a4
-#define DDR_PCTL2_DFIUPD2		0x1a8
-#define DDR_PCTL2_DFIMISC		0x1b0
-#define DDR_PCTL2_DFITMG2		0x1b4
-#define DDR_PCTL2_DFITMG3		0x1b8
-#define DDR_PCTL2_DFISTAT		0x1bc
-#define DDR_PCTL2_DBICTL		0x1c0
-#define DDR_PCTL2_ADDRMAP0		0x200
-#define DDR_PCTL2_ADDRMAP1		0x204
-#define DDR_PCTL2_ADDRMAP2		0x208
-#define DDR_PCTL2_ADDRMAP3		0x20c
-#define DDR_PCTL2_ADDRMAP4		0x210
-#define DDR_PCTL2_ADDRMAP5		0x214
-#define DDR_PCTL2_ADDRMAP6		0x218
-#define DDR_PCTL2_ADDRMAP7		0x21c
-#define DDR_PCTL2_ADDRMAP8		0x220
-#define DDR_PCTL2_ADDRMAP9		0x224
-#define DDR_PCTL2_ADDRMAP10		0x228
-#define DDR_PCTL2_ADDRMAP11		0x22c
-#define DDR_PCTL2_ODTCFG		0x240
-#define DDR_PCTL2_ODTMAP		0x244
-#define DDR_PCTL2_SCHED			0x250
-#define DDR_PCTL2_SCHED1		0x254
-#define DDR_PCTL2_PERFHPR1		0x25c
-#define DDR_PCTL2_PERFLPR1		0x264
-#define DDR_PCTL2_PERFWR1		0x26c
-#define DDR_PCTL2_DQMAP0		0x280
-#define DDR_PCTL2_DQMAP1		0x284
-#define DDR_PCTL2_DQMAP2		0x288
-#define DDR_PCTL2_DQMAP3		0x28c
-#define DDR_PCTL2_DQMAP4		0x290
-#define DDR_PCTL2_DQMAP5		0x294
-#define DDR_PCTL2_DBG0			0x300
-#define DDR_PCTL2_DBG1			0x304
-#define DDR_PCTL2_DBGCAM		0x308
-#define DDR_PCTL2_DBGCMD		0x30c
-#define DDR_PCTL2_DBGSTAT		0x310
-#define DDR_PCTL2_SWCTL			0x320
-#define DDR_PCTL2_SWSTAT		0x324
-#define DDR_PCTL2_POISONCFG		0x36c
-#define DDR_PCTL2_POISONSTAT		0x370
-#define DDR_PCTL2_ADVECCINDEX		0x374
-#define DDR_PCTL2_ADVECCSTAT		0x378
-#define DDR_PCTL2_PSTAT			0x3fc
-#define DDR_PCTL2_PCCFG			0x400
-#define DDR_PCTL2_PCFGR_n		0x404
-#define DDR_PCTL2_PCFGW_n		0x408
-#define DDR_PCTL2_PCTRL_n		0x490
-
-/* PCTL2_MRSTAT */
-#define MR_WR_BUSY			BIT(0)
-
-/* PHY_REG0 */
-#define DIGITAL_DERESET			BIT(3)
-#define ANALOG_DERESET			BIT(2)
-#define DIGITAL_RESET			(0 << 3)
-#define ANALOG_RESET			(0 << 2)
-
-/* PHY_REG1 */
-#define PHY_DDR2			(0)
-#define PHY_LPDDR2			(1)
-#define PHY_DDR3			(2)
-#define PHY_LPDDR3			(3)
-#define PHY_DDR4			(4)
-#define PHY_BL_4			(0 << 2)
-#define PHY_BL_8			BIT(2)
-
-/* PHY_REG2 */
-#define PHY_DTT_EN			BIT(0)
-#define PHY_DTT_DISB			(0 << 0)
-#define PHY_WRITE_LEVELING_EN		BIT(2)
-#define PHY_WRITE_LEVELING_DISB		(0 << 2)
-#define PHY_SELECT_CS0			(2)
-#define PHY_SELECT_CS1			(1)
-#define PHY_SELECT_CS0_1		(0)
-#define PHY_WRITE_LEVELING_SELECTCS(n)	((n) << 6)
-#define PHY_DATA_TRAINING_SELECTCS(n)	((n) << 4)
-
-#define PHY_DDR3_RON_RTT_DISABLE	(0)
-#define PHY_DDR3_RON_RTT_451ohm		(1)
-#define PHY_DDR3_RON_RTT_225ohm		(2)
-#define PHY_DDR3_RON_RTT_150ohm		(3)
-#define PHY_DDR3_RON_RTT_112ohm		(4)
-#define PHY_DDR3_RON_RTT_90ohm		(5)
-#define PHY_DDR3_RON_RTT_75ohm		(6)
-#define PHY_DDR3_RON_RTT_64ohm		(7)
-#define PHY_DDR3_RON_RTT_56ohm		(16)
-#define PHY_DDR3_RON_RTT_50ohm		(17)
-#define PHY_DDR3_RON_RTT_45ohm		(18)
-#define PHY_DDR3_RON_RTT_41ohm		(19)
-#define PHY_DDR3_RON_RTT_37ohm		(20)
-#define PHY_DDR3_RON_RTT_34ohm		(21)
-#define PHY_DDR3_RON_RTT_33ohm		(22)
-#define PHY_DDR3_RON_RTT_30ohm		(23)
-#define PHY_DDR3_RON_RTT_28ohm		(24)
-#define PHY_DDR3_RON_RTT_26ohm		(25)
-#define PHY_DDR3_RON_RTT_25ohm		(26)
-#define PHY_DDR3_RON_RTT_23ohm		(27)
-#define PHY_DDR3_RON_RTT_22ohm		(28)
-#define PHY_DDR3_RON_RTT_21ohm		(29)
-#define PHY_DDR3_RON_RTT_20ohm		(30)
-#define PHY_DDR3_RON_RTT_19ohm		(31)
-
-#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
-#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
-#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
-#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
-#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
-#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
-#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
-#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
-#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
-#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
-#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
-#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
-#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
-#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
-#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
-#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
-#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
-#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
-#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
-#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
-#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
-#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
-#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
-#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
-
-/* noc registers define */
-#define DEVICECONF			0x8
-#define DEVICESIZE			0xc
-#define DDRTIMINGA0			0x10
-#define DDRTIMINGB0			0x14
-#define DDRTIMINGC0			0x18
-#define DEVTODEV0			0x1c
-#define DDRMODE				0x110
-#define DDR4TIMING			0x114
-#define AGINGX0				0x1000
-#define AGING0				0x1040
-#define AGING1				0x1044
-#define AGING2				0x1048
-#define AGING3				0x104c
 
 /* PMUGRF */
 #define PMUGRF_OS_REG0			(0x200)
@@ -234,75 +36,6 @@
 #define SPLIT_SIZE_MASK			(0xff)
 #define SPLIT_SIZE_OFFSET		(0)
 
-/*
- * sys_reg bitfield struct
- * [31]		row_3_4_ch1
- * [30]		row_3_4_ch0
- * [29:28]	chinfo
- * [27]		rank_ch1
- * [26:25]	col_ch1
- * [24]		bk_ch1
- * [23:22]	cs0_row_ch1
- * [21:20]	cs1_row_ch1
- * [19:18]	bw_ch1
- * [17:16]	dbw_ch1;
- * [15:13]	ddrtype
- * [12]		channelnum
- * [11]		rank_ch0
- * [10:9]	col_ch0
- * [8]		bk_ch0
- * [7:6]	cs0_row_ch0
- * [5:4]	cs1_row_ch0
- * [3:2]	bw_ch0
- * [1:0]	dbw_ch0
- */
-
-#define DDR_SYS_REG_VERSION		(0x2)
-#define SYS_REG_ENC_ROW_3_4(n)		((n) << 30)
-#define SYS_REG_DEC_ROW_3_4(n)		(((n) >> 30) & 0x1)
-#define SYS_REG_ENC_CHINFO()		(1 << 28)
-#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
-#define SYS_REG_DEC_DDRTYPE(n)		(((n) >> 13) & 0x7)
-#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
-#define SYS_REG_DEC_NUM_CH(n)		(1 + (((n) >> 12) & 0x1))
-#define SYS_REG_ENC_RANK(n)		(((n) - 1) << 11)
-#define SYS_REG_DEC_RANK(n)		(1 + (((n) >> 11) & 0x1))
-#define SYS_REG_ENC_COL(n)		(((n) - 9) << 9)
-#define SYS_REG_DEC_COL(n)		(9 + (((n) >> 9) & 0x3))
-#define SYS_REG_ENC_BK(n)		(((n) == 3 ? 0 : 1) << 8)
-#define SYS_REG_DEC_BK(n)		(3 - (((n) >> 8) & 0x1))
-#define SYS_REG_ENC_CS0_ROW(n)		(((n) - 13) << 6)
-#define SYS_REG_DEC_CS0_ROW(n)		(13 + (((n) >> 6) & 0x3))
-#define SYS_REG_ENC_BW(n)		((2 >> (n)) << 2)
-#define SYS_REG_DEC_BW(n)		(2 >> (((n) >> 2) & 0x3))
-#define SYS_REG_ENC_DBW(n)		((2 >> (n)) << 0)
-#define SYS_REG_DEC_DBW(n)		(2 >> (((n) >> 0) & 0x3))
-/* sys reg 3 */
-#define SYS_REG_ENC_VERSION(n)		((n) << 28)
-#define SYS_REG_DEC_VERSION(n)		(((n) >> 28) & 0xf)
-#define SYS_REG_ENC_CS0_ROW_(n, os_reg2, os_reg3) do {	\
-			(os_reg2) |= (((n) - 13) & 0x3) << 6;\
-			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 5; \
-		} while (0)
-
-#define SYS_REG_DEC_CS0_ROW_(os_reg2, os_reg3)	\
-		((((((os_reg2) >> 6 & 0x3) | \
-		 ((((os_reg3) >> 5) & 0x1) << 2)) + 1) & 0x7) + 12)
-
-#define SYS_REG_ENC_CS1_ROW_(n, os_reg2, os_reg3) do {	\
-			(os_reg2) &= (~(0x3 << 4));\
-			(os_reg3) &= (~(0x1 << 4));\
-			(os_reg2) |= (((n) - 13) & 0x3) << 4;\
-			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 4; \
-		} while (0)
-
-#define SYS_REG_DEC_CS1_ROW_(os_reg2, os_reg3)	\
-		((((((os_reg2) >> 4 & 0x3) | \
-		 ((((os_reg3) >> 4) & 0x1) << 2)) + 1) & 0x7) + 12)
-
-#define SYS_REG_ENC_CS1_COL(n)		(((n) - 9) << 0)
-#define SYS_REG_DEC_CS1_COL(n)		(9 + (((n) >> 0) & 0x3))
-
 /* CRU define */
 /* CRU_PLL_CON0 */
 #define PB(n)				((0x1 << (15 + 16)) | ((n) << 15))
@@ -424,113 +157,6 @@ u32 addrmap[][8] = {
 		0x06060606, 0x00000606, 0x3f3f}, /* 13 */
 };
 
-union noc_ddrtiminga0 {
-	u32 d32;
-	struct {
-		unsigned acttoact : 6;
-		unsigned reserved0 : 2;
-		unsigned rdtomiss : 6;
-		unsigned reserved1 : 2;
-		unsigned wrtomiss : 6;
-		unsigned reserved2 : 2;
-		unsigned readlatency : 8;
-	} b;
-};
-
-union noc_ddrtimingb0 {
-	u32 d32;
-	struct {
-		unsigned rdtowr : 5;
-		unsigned reserved0 : 3;
-		unsigned wrtord : 5;
-		unsigned reserved1 : 3;
-		unsigned rrd : 4;
-		unsigned reserved2 : 4;
-		unsigned faw : 6;
-		unsigned reserved3 : 2;
-	} b;
-};
-
-union noc_ddrtimingc0 {
-	u32 d32;
-	struct {
-		unsigned burstpenalty : 4;
-		unsigned reserved0 : 4;
-		unsigned wrtomwr : 6;
-		unsigned reserved1 : 18;
-	} b;
-};
-
-union noc_devtodev0 {
-	u32 d32;
-	struct {
-		unsigned busrdtord : 3;
-		unsigned reserved0 : 1;
-		unsigned busrdtowr : 3;
-		unsigned reserved1 : 1;
-		unsigned buswrtord : 3;
-		unsigned reserved2 : 1;
-		unsigned buswrtowr : 3;
-		unsigned reserved3 : 17;
-	} b;
-};
-
-union noc_ddrmode {
-	u32 d32;
-	struct {
-		unsigned autoprecharge : 1;
-		unsigned bypassfiltering : 1;
-		unsigned fawbank : 1;
-		unsigned burstsize : 2;
-		unsigned mwrsize : 2;
-		unsigned reserved2 : 1;
-		unsigned forceorder : 8;
-		unsigned forceorderstate : 8;
-		unsigned reserved3 : 8;
-	} b;
-};
-
-union noc_ddr4timing {
-	u32 d32;
-	struct {
-		unsigned ccdl : 3;
-		unsigned wrtordl : 5;
-		unsigned rrdl : 4;
-		unsigned reserved1 : 20;
-	} b;
-};
-
-struct px30_msch_timings {
-	union noc_ddrtiminga0 ddrtiminga0;
-	union noc_ddrtimingb0 ddrtimingb0;
-	union noc_ddrtimingc0 ddrtimingc0;
-	union noc_devtodev0 devtodev0;
-	union noc_ddrmode ddrmode;
-	union noc_ddr4timing ddr4timing;
-	u32 agingx0;
-};
-
-struct px30_msch_regs {
-	u32 coreid;
-	u32 revisionid;
-	u32 deviceconf;
-	u32 devicesize;
-	u32 ddrtiminga0;
-	u32 ddrtimingb0;
-	u32 ddrtimingc0;
-	u32 devtodev0;
-	u32 reserved1[(0x110 - 0x20) / 4];
-	u32 ddrmode;
-	u32 ddr4timing;
-	u32 reserved2[(0x1000 - 0x118) / 4];
-	u32 agingx0;
-	u32 reserved3[(0x1040 - 0x1004) / 4];
-	u32 aging0;
-	u32 aging1;
-	u32 aging2;
-	u32 aging3;
-};
-
 struct px30_ddr_grf_regs {
 	u32 ddr_grf_con[4];
 	u32 reserved1[(0x20 - 0x10) / 4];
@@ -539,54 +165,16 @@ struct px30_ddr_grf_regs {
 	u32 ddr_grf_status[11];
 };
 
-struct px30_ddr_pctl_regs {
-	u32 pctl[30][2];
-};
-
-struct px30_ddr_phy_regs {
-	u32 phy[5][2];
-};
-
-struct px30_ddr_skew {
-	u32 a0_a1_skew[15];
-	u32 cs0_dm0_skew[11];
-	u32 cs0_dm1_skew[11];
-	u32 cs0_dm2_skew[11];
-	u32 cs0_dm3_skew[11];
-	u32 cs1_dm0_skew[11];
-	u32 cs1_dm1_skew[11];
-	u32 cs1_dm2_skew[11];
-	u32 cs1_dm3_skew[11];
-};
-
 struct px30_sdram_channel {
-	unsigned char rank;
-	unsigned char col;
-	/* 3:8bank, 2:4bank */
-	unsigned char bk;
-	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned char bw;
-	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
-	unsigned char dbw;
-	unsigned char row_3_4;
-	unsigned char cs0_row;
-	unsigned char cs1_row;
-	unsigned char cs0_high16bit_row;
-	unsigned char cs1_high16bit_row;
-	unsigned int ddrconfig;
-	struct px30_msch_timings noc_timings;
+	struct sdram_cap_info cap_info;
+	struct sdram_msch_timings noc_timings;
 };
 
 struct px30_sdram_params {
 	struct px30_sdram_channel ch;
-	unsigned int ddr_freq;
-	unsigned int dramtype;
-	unsigned int odt;
-	struct px30_ddr_pctl_regs pctl_regs;
-	struct px30_ddr_phy_regs phy_regs;
-	struct px30_ddr_skew *skew;
+	struct sdram_base_params base;
+	struct ddr_pctl_regs pctl_regs;
+	struct ddr_phy_regs phy_regs;
+	struct ddr_phy_skew *skew;
 };
-
-#define PHY_REG(base, n)		((base) + 4 * (n))
-
 #endif
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 7fea0317d0..5b94dec8db 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -72,6 +72,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index a13a5e2889..e6e407fccf 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -71,6 +71,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 0465f23cad..73b1b6d2c7 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -74,6 +74,10 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_SDRAM_COMMON_CAP_DETECT=y
+CONFIG_SDRAM_COMMON_OSREG=y
+CONFIG_SDRAM_COMMON_MSCH_PX30=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 818f340418..d0f74a4f9f 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
-obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
+obj-$(CONFIG_ROCKCHIP_PX30) += sdram_px30.o sdram_pctl_px30.o sdram_phy_px30.o
 obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
diff --git a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
index 422364f462..76cd8dc1a5 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xC,
-		.bk = 0x3,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0x10,
-		.cs1_row = 0x10,
-		.cs0_high16bit_row = 0x10,
-		.cs1_high16bit_row = 0x10,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0,
+		},
 		{
 			{0x290b0609},
 			{0x08020401},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = DDR3,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = DDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x43041001},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
index 0d4152769a..f804d28393 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xA,
-		.bk = 0x2,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0x11,
-		.cs1_row = 0x0,
-		.cs0_high16bit_row = 0x11,
-		.cs1_high16bit_row = 0x0,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xA,
+			.bk = 0x2,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x11,
+			.cs1_row = 0x0,
+			.cs0_high16bit_row = 0x11,
+			.cs1_high16bit_row = 0x0,
+			.ddrconfig = 0,
+		},
 		{
 			{0x4d110a08},
 			{0x06020501},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = DDR4,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = DDR4,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x43049010},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
index ec51ad42be..948ade483b 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xC,
-		.bk = 0x3,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0xF,
-		.cs1_row = 0xF,
-		.cs0_high16bit_row = 0xF,
-		.cs1_high16bit_row = 0xF,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0xF,
+			.cs1_row = 0xF,
+			.cs0_high16bit_row = 0xF,
+			.cs1_high16bit_row = 0xF,
+			.ddrconfig = 0,
+		},
 		{
 			{0x2b0c070a},
 			{0x08020303},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = LPDDR2,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = LPDDR2,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x41041004},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
index 606f6ddd94..f694a0e5b0 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
@@ -1,16 +1,18 @@
 {
 	{
-		.rank = 0x1,
-		.col = 0xC,
-		.bk = 0x3,
-		.bw = 0x1,
-		.dbw = 0x0,
-		.row_3_4 = 0x0,
-		.cs0_row = 0x10,
-		.cs1_row = 0x10,
-		.cs0_high16bit_row = 0x10,
-		.cs1_high16bit_row = 0x10,
-		.ddrconfig = 0,
+		{
+			.rank = 0x1,
+			.col = 0xC,
+			.bk = 0x3,
+			.bw = 0x1,
+			.dbw = 0x0,
+			.row_3_4 = 0x0,
+			.cs0_row = 0x10,
+			.cs1_row = 0x10,
+			.cs0_high16bit_row = 0x10,
+			.cs1_high16bit_row = 0x10,
+			.ddrconfig = 0,
+		},
 		{
 			{0x290a060a},
 			{0x08020303},
@@ -21,9 +23,13 @@
 			0x000000ff
 		}
 	},
-	.ddr_freq = 333,
-	.dramtype = LPDDR3,
-	.odt = 0,
+	{
+		.ddr_freq = 333,
+		.dramtype = LPDDR3,
+		.num_channels = 1,
+		.stride = 0,
+		.odt = 0,
+	},
 	{
 		{
 			{0x00000000, 0x43041008},	/* MSTR */
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 1b78e67ae4..80d5f65f8d 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -30,10 +30,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
-	struct px30_ddr_pctl_regs *pctl;
-	struct px30_ddr_phy_regs *phy;
+	struct ddr_pctl_regs *pctl;
+	struct ddr_phy_regs *phy;
 	struct px30_cru *cru;
-	struct px30_msch_regs *msch;
+	struct msch_regs *msch;
 	struct px30_ddr_grf_regs *ddr_grf;
 	struct px30_grf *grf;
 	struct ram_info info;
@@ -54,7 +54,7 @@ struct px30_sdram_params sdram_configs[] = {
 #include	"sdram-px30-lpddr3-detect-333.inc"
 };
 
-struct px30_ddr_skew skew = {
+struct ddr_phy_skew skew = {
 #include	"sdram-px30-ddr_skew.inc"
 };
 
@@ -69,10 +69,11 @@ static void rkclk_ddr_reset(struct dram_info *dram,
 	       &dram->cru->softrst_con[2]);
 }
 
-static void rkclk_set_dpll(struct dram_info *dram, unsigned int mhz)
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int hz)
 {
 	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
 	int delay = 1000;
+	u32 mhz = hz / MHz;
 
 	refdiv = 1;
 	if (mhz <= 300) {
@@ -116,42 +117,7 @@ static void rkclk_configure_ddr(struct dram_info *dram,
 				struct px30_sdram_params *sdram_params)
 {
 	/* for inno ddr phy need 2*freq */
-	rkclk_set_dpll(dram,  sdram_params->ddr_freq * 2);
-}
-
-static void phy_soft_reset(struct dram_info *dram)
-{
-	void __iomem *phy_base = dram->phy;
-
-	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
-	udelay(1);
-	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
-	udelay(5);
-	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
-	udelay(1);
-}
-
-static int pctl_cfg(struct dram_info *dram,
-		    struct px30_sdram_params *sdram_params)
-{
-	u32 i;
-	void __iomem *pctl_base = dram->pctl;
-
-	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
-		writel(sdram_params->pctl_regs.pctl[i][1],
-		       pctl_base + sdram_params->pctl_regs.pctl[i][0]);
-	}
-	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
-			(0xff << 16) | 0x1f,
-			((SR_IDLE & 0xff) << 16) | (PD_IDLE & 0x1f));
-
-	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
-			0xfff << 16,
-			5 << 16);
-	/* disable zqcs */
-	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
-
-	return 0;
+	rkclk_set_dpll(dram,  sdram_params->base.ddr_freq * MHz * 2);
 }
 
 /* return ddrconfig value
@@ -161,16 +127,17 @@ static int pctl_cfg(struct dram_info *dram,
  */
 static unsigned int calculate_ddrconfig(struct px30_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	u32 bw, die_bw, col, bank;
 	u32 i, tmp;
 	u32 ddrconf = -1;
 
-	bw = sdram_params->ch.bw;
-	die_bw = sdram_params->ch.dbw;
-	col = sdram_params->ch.col;
-	bank = sdram_params->ch.bk;
+	bw = cap_info->bw;
+	die_bw = cap_info->dbw;
+	col = cap_info->col;
+	bank = cap_info->bk;
 
-	if (sdram_params->dramtype == DDR4) {
+	if (sdram_params->base.dramtype == DDR4) {
 		if (die_bw == 0)
 			ddrconf = 7 + bw;
 		else
@@ -190,18 +157,6 @@ static unsigned int calculate_ddrconfig(struct px30_sdram_params *sdram_params)
 	return ddrconf;
 }
 
-/* n: Unit bytes */
-static void copy_to_reg(u32 *dest, u32 *src, u32 n)
-{
-	int i;
-
-	for (i = 0; i < n / sizeof(u32); i++) {
-		writel(*src, dest);
-		src++;
-		dest++;
-	}
-}
-
 /*
  * calculate controller dram address map, and setting to register.
  * argument sdram_params->ch.ddrconf must be right value before
@@ -210,28 +165,29 @@ static void copy_to_reg(u32 *dest, u32 *src, u32 n)
 static void set_ctl_address_map(struct dram_info *dram,
 				struct px30_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	void __iomem *pctl_base = dram->pctl;
 	u32 cs_pst, bg, max_row, ddrconf;
 	u32 i;
 
-	if (sdram_params->dramtype == DDR4)
+	if (sdram_params->base.dramtype == DDR4)
 		/*
 		 * DDR4 8bit dram BG = 2(4bank groups),
 		 * 16bit dram BG = 1 (2 bank groups)
 		 */
-		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+		bg = (cap_info->dbw == 0) ? 2 : 1;
 	else
 		bg = 0;
 
-	cs_pst = sdram_params->ch.bw + sdram_params->ch.col +
-		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row;
-	if (cs_pst >= 32 || sdram_params->ch.rank == 1)
+	cs_pst = cap_info->bw + cap_info->col +
+		bg + cap_info->bk + cap_info->cs0_row;
+	if (cs_pst >= 32 || cap_info->rank == 1)
 		writel(0x1f, pctl_base + DDR_PCTL2_ADDRMAP0);
 	else
 		writel(cs_pst - 8, pctl_base + DDR_PCTL2_ADDRMAP0);
 
-	ddrconf = sdram_params->ch.ddrconfig;
-	if (sdram_params->dramtype == DDR4) {
+	ddrconf = cap_info->ddrconfig;
+	if (sdram_params->base.dramtype == DDR4) {
 		for (i = 0; i < ARRAY_SIZE(d4_rbc_2_d3_rbc); i++) {
 			if (d4_rbc_2_d3_rbc[i] == ddrconf) {
 				ddrconf = 7 + i;
@@ -240,8 +196,8 @@ static void set_ctl_address_map(struct dram_info *dram,
 		}
 	}
 
-	copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP1),
-		    &addrmap[ddrconf][0], 8 * 4);
+	sdram_copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP1),
+			  &addrmap[ddrconf][0], 8 * 4);
 	max_row = cs_pst - 1 - 8 - (addrmap[ddrconf][5] & 0xf);
 
 	if (max_row < 12)
@@ -253,184 +209,27 @@ static void set_ctl_address_map(struct dram_info *dram,
 			0xf << ((i - 12) * 8 % 32),
 			0xf << ((i - 12) * 8 % 32));
 
-	if ((sdram_params->dramtype == LPDDR3 ||
-	     sdram_params->dramtype == LPDDR2) &&
-		 sdram_params->ch.row_3_4)
+	if ((sdram_params->base.dramtype == LPDDR3 ||
+	     sdram_params->base.dramtype == LPDDR2) &&
+		 cap_info->row_3_4)
 		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
-	if (sdram_params->dramtype == DDR4 && sdram_params->ch.bw != 0x2)
+	if (sdram_params->base.dramtype == DDR4 && cap_info->bw != 0x2)
 		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
 }
 
-static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 tmp;
-	u32 i, j;
-
-	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
-	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
-	for (i = 0; i < 4; i++) {
-		j = 0x26 + i * 0x10;
-		setbits_le32(PHY_REG(phy_base, j), 1 << 4);
-		clrbits_le32(PHY_REG(phy_base, j + 0x1), 1 << 3);
-	}
-
-	if (freq <= (400 * MHz))
-		/* DLL bypass */
-		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
-	else
-		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
-
-	if (freq <= (801 * MHz))
-		tmp = 2;
-	else
-		tmp = 1;
-
-	for (i = 0; i < 4; i++) {
-		j = 0x28 + i * 0x10;
-		writel(tmp, PHY_REG(phy_base, j));
-	}
-}
-
-static void set_ds_odt(struct dram_info *dram,
-		       struct px30_sdram_params *sdram_params)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
-	u32 i, j;
-
-	if (sdram_params->dramtype == DDR3) {
-		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
-		clk_drv = PHY_DDR3_RON_RTT_45ohm;
-		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
-		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
-	} else {
-		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
-		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
-		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
-		if (sdram_params->dramtype == LPDDR2)
-			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_DISABLE;
-		else
-			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
-	}
-	/* DS */
-	writel(cmd_drv, PHY_REG(phy_base, 0x11));
-	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
-	writel(clk_drv, PHY_REG(phy_base, 0x16));
-	writel(clk_drv, PHY_REG(phy_base, 0x18));
-
-	for (i = 0; i < 4; i++) {
-		j = 0x20 + i * 0x10;
-		writel(dqs_drv, PHY_REG(phy_base, j));
-		writel(dqs_drv, PHY_REG(phy_base, j + 0xf));
-		/* ODT */
-		writel(dqs_odt, PHY_REG(phy_base, j + 0x1));
-		writel(dqs_odt, PHY_REG(phy_base, j + 0xe));
-	}
-}
-
-static void phy_cfg(struct dram_info *dram,
-		    struct px30_sdram_params *sdram_params)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 i;
-
-	phy_dll_bypass_set(dram, sdram_params->ddr_freq);
-	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
-		writel(sdram_params->phy_regs.phy[i][1],
-		       phy_base + sdram_params->phy_regs.phy[i][0]);
-	}
-	if (sdram_params->ch.bw == 2) {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
-	} else if (sdram_params->ch.bw == 1) {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
-		/* disable DQS2,DQS3 tx dll  for saving power */
-		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
-		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
-	} else {
-		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
-		/* disable DQS2,DQS3 tx dll  for saving power */
-		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
-		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
-		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
-	}
-	set_ds_odt(dram, sdram_params);
-
-	/* deskew */
-	setbits_le32(PHY_REG(phy_base, 2), 8);
-	copy_to_reg(PHY_REG(phy_base, 0xb0),
-		    &sdram_params->skew->a0_a1_skew[0], 15 * 4);
-	copy_to_reg(PHY_REG(phy_base, 0x70),
-		    &sdram_params->skew->cs0_dm0_skew[0], 44 * 4);
-	copy_to_reg(PHY_REG(phy_base, 0xc0),
-		    &sdram_params->skew->cs1_dm0_skew[0], 44 * 4);
-}
-
-static int update_refresh_reg(struct dram_info *dram)
-{
-	void __iomem *pctl_base = dram->pctl;
-	u32 ret;
-
-	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
-	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
-
-	return 0;
-}
-
 /*
  * rank = 1: cs0
  * rank = 2: cs1
  */
 int read_mr(struct dram_info *dram, u32 rank, u32 mr_num)
 {
-	void __iomem *pctl_base = dram->pctl;
 	void __iomem *ddr_grf_base = dram->ddr_grf;
 
-	writel((rank << 4) | (1 << 0), pctl_base + DDR_PCTL2_MRCTRL0);
-	writel((mr_num << 8), pctl_base + DDR_PCTL2_MRCTRL1);
-	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
-	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
-		continue;
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
+	pctl_read_mr(dram->pctl, rank, mr_num);
 
 	return (readl(ddr_grf_base + DDR_GRF_STATUS(0)) & 0xff);
 }
 
-u32 disable_zqcs_arefresh(struct dram_info *dram)
-{
-	void __iomem *pctl_base = dram->pctl;
-	u32 dis_auto_zq = 0;
-
-	/* disable zqcs */
-	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
-		(1ul << 31))) {
-		dis_auto_zq = 1;
-		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-	}
-
-	/* disable auto refresh */
-	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-
-	update_refresh_reg(dram);
-
-	return dis_auto_zq;
-}
-
-void restore_zqcs_arefresh(struct dram_info *dram, u32 dis_auto_zq)
-{
-	void __iomem *pctl_base = dram->pctl;
-
-	/* restore zqcs */
-	if (dis_auto_zq)
-		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
-
-	/* restore auto refresh */
-	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
-
-	update_refresh_reg(dram);
-}
-
 #define MIN(a, b)	(((a) > (b)) ? (b) : (a))
 #define MAX(a, b)	(((a) > (b)) ? (a) : (b))
 static u32 check_rd_gate(struct dram_info *dram)
@@ -469,170 +268,31 @@ static u32 check_rd_gate(struct dram_info *dram)
 }
 
 static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)
-{
-	void __iomem *phy_base = dram->phy;
-	u32 ret;
-	u32 dis_auto_zq = 0;
-	u32 odt_val;
-	u32 i, j;
-
-	odt_val = readl(PHY_REG(phy_base, 0x2e));
-
-	for (i = 0; i < 4; i++) {
-		j = 0x20 + i * 0x10;
-		writel(PHY_DDR3_RON_RTT_225ohm, PHY_REG(phy_base, j + 0x1));
-		writel(0, PHY_REG(phy_base, j + 0xe));
-	}
-
-	dis_auto_zq = disable_zqcs_arefresh(dram);
-
-	if (dramtype == DDR4) {
-		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
-		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
-	}
-	/* choose training cs */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
-	/* enable gate training */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
-	udelay(50);
-	ret = readl(PHY_REG(phy_base, 0xff));
-	/* disable gate training */
-	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
-	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
-	restore_zqcs_arefresh(dram, dis_auto_zq);
-
-	if (dramtype == DDR4) {
-		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
-		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
-	}
-
-	if (ret & 0x10) {
-		ret = -1;
-	} else {
-		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
-		ret = (ret == 0) ? 0 : -1;
-	}
-
-	for (i = 0; i < 4; i++) {
-		j = 0x20 + i * 0x10;
-		writel(odt_val, PHY_REG(phy_base, j + 0x1));
-		writel(odt_val, PHY_REG(phy_base, j + 0xe));
-	}
-
-	return ret;
-}
-
-/* rank = 1: cs0
- * rank = 2: cs1
- * rank = 3: cs0 & cs1
- * note: be careful of keep mr original val
- */
-static int write_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 arg,
-		    u32 dramtype)
-{
-	void __iomem *pctl_base = dram->pctl;
-
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
-	if (dramtype == DDR3 || dramtype == DDR4) {
-		writel((mr_num << 12) | (rank << 4) | (0 << 0),
-		       pctl_base + DDR_PCTL2_MRCTRL0);
-		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
-	} else {
-		writel((rank << 4) | (0 << 0),
-		       pctl_base + DDR_PCTL2_MRCTRL0);
-		writel((mr_num << 8) | (arg & 0xff),
-		       pctl_base + DDR_PCTL2_MRCTRL1);
-	}
-
-	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
-	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
-		continue;
-	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
-		continue;
-
-	return 0;
-}
-
-/*
- * rank : 1:cs0, 2:cs1, 3:cs0&cs1
- * vrefrate: 4500: 45%,
- */
-static int write_vrefdq(struct dram_info *dram, u32 rank, u32 vrefrate,
-			u32 dramtype)
 {
 	void __iomem *pctl_base = dram->pctl;
-	u32 tccd_l, value;
 	u32 dis_auto_zq = 0;
+	u32 pwrctl;
+	u32 ret;
 
-	if (dramtype != DDR4 || vrefrate < 4500 ||
-	    vrefrate > 9200)
-		return (-1);
-
-	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
-	tccd_l = (tccd_l - 4) << 10;
+	/* disable auto low-power */
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
 
-	if (vrefrate > 7500) {
-		/* range 1 */
-		value = ((vrefrate - 6000) / 65) | tccd_l;
-	} else {
-		/* range 2 */
-		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
-	}
+	dis_auto_zq = pctl_dis_zqcs_aref(dram->pctl);
 
-	dis_auto_zq = disable_zqcs_arefresh(dram);
+	ret = phy_data_training(dram->phy, cs, dramtype);
 
-	/* enable vrefdq calibratin */
-	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
-	udelay(1);/* tvrefdqe */
-	/* write vrefdq value */
-	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
-	udelay(1);/* tvref_time */
-	write_mr(dram, rank, 6, value | (0 << 7), dramtype);
-	udelay(1);/* tvrefdqx */
+	pctl_rest_zqcs_aref(dram->pctl, dis_auto_zq);
 
-	restore_zqcs_arefresh(dram, dis_auto_zq);
+	/* restore auto low-power */
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
 
-	return 0;
+	return ret;
 }
 
-/*
- * cs: 0:cs0
- *	   1:cs1
- *     else cs0+cs1
- * note: it didn't consider about row_3_4
- */
-u64 get_cs_cap(struct px30_sdram_params *sdram_params, u32 cs)
+static void dram_set_bw(struct dram_info *dram, u32 bw)
 {
-	u32 bg;
-	u64 cap[2];
-
-	if (sdram_params->dramtype == DDR4)
-		/* DDR4 8bit dram BG = 2(4bank groups),
-		 * 16bit dram BG = 1 (2 bank groups)
-		 */
-		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
-	else
-		bg = 0;
-	cap[0] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
-		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row);
-
-	if (sdram_params->ch.rank == 2)
-		cap[1] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
-			bg + sdram_params->ch.bk + sdram_params->ch.cs1_row);
-	else
-		cap[1] = 0;
-
-	if (cs == 0)
-		return cap[0];
-	else if (cs == 1)
-		return cap[1];
-	else
-		return (cap[0] + cap[1]);
+	phy_dram_set_bw(dram->phy, bw);
 }
 
 static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
@@ -644,52 +304,17 @@ static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
 static void dram_all_config(struct dram_info *dram,
 			    struct px30_sdram_params *sdram_params)
 {
-	u32 sys_reg = 0;
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 sys_reg2 = 0;
 	u32 sys_reg3 = 0;
-	u64 cs_cap[2];
-
-	set_ddrconfig(dram, sdram_params->ch.ddrconfig);
-
-	sys_reg |= SYS_REG_ENC_DDRTYPE(sdram_params->dramtype);
-	sys_reg |= SYS_REG_ENC_ROW_3_4(sdram_params->ch.row_3_4);
-	sys_reg |= SYS_REG_ENC_RANK(sdram_params->ch.rank);
-	sys_reg |= SYS_REG_ENC_COL(sdram_params->ch.col);
-	sys_reg |= SYS_REG_ENC_BK(sdram_params->ch.bk);
-	sys_reg |= SYS_REG_ENC_BW(sdram_params->ch.bw);
-	sys_reg |= SYS_REG_ENC_DBW(sdram_params->ch.dbw);
 
-	SYS_REG_ENC_CS0_ROW_(sdram_params->ch.cs0_row, sys_reg, sys_reg3);
-	if (sdram_params->ch.cs1_row)
-		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row, sys_reg,
-				     sys_reg3);
-	sys_reg3 |= SYS_REG_ENC_CS1_COL(sdram_params->ch.col);
-	sys_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
-
-	writel(sys_reg, &dram->pmugrf->os_reg[2]);
+	set_ddrconfig(dram, cap_info->ddrconfig);
+	sdram_org_config(cap_info, &sdram_params->base, &sys_reg2,
+			 &sys_reg3, 0);
+	writel(sys_reg2, &dram->pmugrf->os_reg[2]);
 	writel(sys_reg3, &dram->pmugrf->os_reg[3]);
-
-	cs_cap[0] = get_cs_cap(sdram_params, 0);
-	cs_cap[1] = get_cs_cap(sdram_params, 1);
-	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
-			(((cs_cap[0] >> 20) / 64) & 0xff),
-			&dram->msch->devicesize);
-
-	writel(sdram_params->ch.noc_timings.ddrtiminga0.d32,
-	       &dram->msch->ddrtiminga0);
-	writel(sdram_params->ch.noc_timings.ddrtimingb0.d32,
-	       &dram->msch->ddrtimingb0);
-	writel(sdram_params->ch.noc_timings.ddrtimingc0.d32,
-	       &dram->msch->ddrtimingc0);
-	writel(sdram_params->ch.noc_timings.devtodev0.d32,
-	       &dram->msch->devtodev0);
-	writel(sdram_params->ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
-	writel(sdram_params->ch.noc_timings.ddr4timing.d32,
-	       &dram->msch->ddr4timing);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->agingx0);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging0);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging1);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging2);
-	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging3);
+	sdram_msch_config(dram->msch, &sdram_params->ch.noc_timings, cap_info,
+			  &sdram_params->base);
 }
 
 static void enable_low_power(struct dram_info *dram,
@@ -711,9 +336,9 @@ static void enable_low_power(struct dram_info *dram,
 	 */
 	writel(0x1f1f0617, &dram->ddr_grf->ddr_grf_con[1]);
 
-	if (sdram_params->dramtype == DDR4)
+	if (sdram_params->base.dramtype == DDR4)
 		grf_lp_con = (0x7 << 16) | (1 << 1);
-	else if (sdram_params->dramtype == DDR3)
+	else if (sdram_params->base.dramtype == DDR3)
 		grf_lp_con = (0x7 << 16) | (1 << 0);
 	else
 		grf_lp_con = (0x7 << 16) | (1 << 2);
@@ -737,76 +362,6 @@ static void enable_low_power(struct dram_info *dram,
 	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
 }
 
-static void print_ddr_info(struct px30_sdram_params *sdram_params)
-{
-	u64 cap;
-	u32 bg;
-	u32 split;
-
-	split = readl(DDR_GRF_BASE_ADDR + DDR_GRF_SPLIT_CON);
-	bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
-	switch (sdram_params->dramtype) {
-	case LPDDR3:
-		printascii("LPDDR3\n");
-		break;
-	case DDR3:
-		printascii("DDR3\n");
-		break;
-	case DDR4:
-		printascii("DDR4\n");
-		break;
-	case LPDDR2:
-		printascii("LPDDR2\n");
-		break;
-	default:
-		printascii("Unknown Device\n");
-		break;
-	}
-
-	printdec(sdram_params->ddr_freq);
-	printascii("MHz\n");
-	printascii("BW=");
-	printdec(8 << sdram_params->ch.bw);
-	printascii(" Col=");
-	printdec(sdram_params->ch.col);
-	printascii(" Bk=");
-	printdec(0x1 << sdram_params->ch.bk);
-	if (sdram_params->dramtype == DDR4) {
-		printascii(" BG=");
-		printdec(1 << bg);
-	}
-	printascii(" CS0 Row=");
-	printdec(sdram_params->ch.cs0_row);
-	if (sdram_params->ch.cs0_high16bit_row !=
-		sdram_params->ch.cs0_row) {
-		printascii("/");
-		printdec(sdram_params->ch.cs0_high16bit_row);
-	}
-	if (sdram_params->ch.rank > 1) {
-		printascii(" CS1 Row=");
-		printdec(sdram_params->ch.cs1_row);
-		if (sdram_params->ch.cs1_high16bit_row !=
-			sdram_params->ch.cs1_row) {
-			printascii("/");
-			printdec(sdram_params->ch.cs1_high16bit_row);
-		}
-	}
-	printascii(" CS=");
-	printdec(sdram_params->ch.rank);
-	printascii(" Die BW=");
-	printdec(8 << sdram_params->ch.dbw);
-
-	cap = get_cs_cap(sdram_params, 3);
-	if (sdram_params->ch.row_3_4)
-		cap = cap * 3 / 4;
-	else if (!(split & (1 << SPLIT_BYPASS_OFFSET)))
-		cap = cap / 2 + ((split & 0xff) << 24) / 2;
-
-	printascii(" Size=");
-	printdec(cap >> 20);
-	printascii("MB\n");
-}
-
 /*
  * pre_init: 0: pre init for dram cap detect
  * 1: detect correct cap(except cs1 row)info, than reinit
@@ -817,6 +372,7 @@ static void print_ddr_info(struct px30_sdram_params *sdram_params)
 static int sdram_init_(struct dram_info *dram,
 		       struct px30_sdram_params *sdram_params, u32 pre_init)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	void __iomem *pctl_base = dram->pctl;
 
 	rkclk_ddr_reset(dram, 1, 1, 1, 1);
@@ -832,13 +388,14 @@ static int sdram_init_(struct dram_info *dram,
 	/* release phy srst to provide clk to ctrl */
 	rkclk_ddr_reset(dram, 1, 1, 0, 0);
 	udelay(10);
-	phy_soft_reset(dram);
+	phy_soft_reset(dram->phy);
 	/* release ctrl presetn, and config ctl registers */
 	rkclk_ddr_reset(dram, 1, 0, 0, 0);
-	pctl_cfg(dram, sdram_params);
-	sdram_params->ch.ddrconfig = calculate_ddrconfig(sdram_params);
+	pctl_cfg(dram->pctl, &sdram_params->pctl_regs, SR_IDLE, PD_IDLE);
+	cap_info->ddrconfig = calculate_ddrconfig(sdram_params);
 	set_ctl_address_map(dram, sdram_params);
-	phy_cfg(dram, sdram_params);
+	phy_cfg(dram->phy, &sdram_params->phy_regs, sdram_params->skew,
+		&sdram_params->base, cap_info->bw);
 
 	/* enable dfi_init_start to init phy after ctl srstn deassert */
 	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
@@ -848,12 +405,12 @@ static int sdram_init_(struct dram_info *dram,
 	while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0)
 		continue;
 
-	if (sdram_params->dramtype == LPDDR3)
-		write_mr(dram, 3, 11, 3, LPDDR3);
+	if (sdram_params->base.dramtype == LPDDR3)
+		pctl_write_mr(dram->pctl, 3, 11, 3, LPDDR3);
 
 	/* do ddr gate training */
 redo_cs0_training:
-	if (data_training(dram, 0, sdram_params->dramtype) != 0) {
+	if (data_training(dram, 0, sdram_params->base.dramtype) != 0) {
 		if (pre_init != 0)
 			printascii("DTT cs0 error\n");
 		return -1;
@@ -863,17 +420,17 @@ redo_cs0_training:
 		goto redo_cs0_training;
 	}
 
-	if (sdram_params->dramtype == LPDDR3) {
+	if (sdram_params->base.dramtype == LPDDR3) {
 		if ((read_mr(dram, 1, 8) & 0x3) != 0x3)
 			return -1;
-	} else if (sdram_params->dramtype == LPDDR2) {
+	} else if (sdram_params->base.dramtype == LPDDR2) {
 		if ((read_mr(dram, 1, 8) & 0x3) != 0x0)
 			return -1;
 	}
 	/* for px30: when 2cs, both 2 cs should be training */
-	if (pre_init != 0 && sdram_params->ch.rank == 2) {
+	if (pre_init != 0 && cap_info->rank == 2) {
 redo_cs1_training:
-		if (data_training(dram, 1, sdram_params->dramtype) != 0) {
+		if (data_training(dram, 1, sdram_params->base.dramtype) != 0) {
 			printascii("DTT cs1 error\n");
 			return -1;
 		}
@@ -883,8 +440,9 @@ redo_cs1_training:
 		}
 	}
 
-	if (sdram_params->dramtype == DDR4)
-		write_vrefdq(dram, 0x3, 5670, sdram_params->dramtype);
+	if (sdram_params->base.dramtype == DDR4)
+		pctl_write_vrefdq(dram->pctl, 0x3, 5670,
+				  sdram_params->base.dramtype);
 
 	dram_all_config(dram, sdram_params);
 	enable_low_power(dram, sdram_params);
@@ -892,12 +450,11 @@ redo_cs1_training:
 	return 0;
 }
 
-static u64 dram_detect_cap(struct dram_info *dram,
+static int dram_detect_cap(struct dram_info *dram,
 			   struct px30_sdram_params *sdram_params,
 			   unsigned char channel)
 {
-	void __iomem *pctl_base = dram->pctl;
-	void __iomem *phy_base = dram->phy;
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 
 	/*
 	 * for ddr3: ddrconf = 3
@@ -907,14 +464,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 	 */
 	u32 bk, bktmp;
 	u32 col, coltmp;
-	u32 row, rowtmp, row_3_4;
-	void __iomem *test_addr, *test_addr1;
-	u32 dbw;
+	u32 rowtmp;
 	u32 cs;
 	u32 bw = 1;
-	u64 cap = 0;
-	u32 dram_type = sdram_params->dramtype;
-	u32 pwrctl;
+	u32 dram_type = sdram_params->base.dramtype;
 
 	if (dram_type != DDR4) {
 		/* detect col and bk for ddr3/lpddr3 */
@@ -925,33 +478,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		else
 			rowtmp = 16;
 
-		for (col = coltmp; col >= 9; col -= 1) {
-			writel(0, CONFIG_SYS_SDRAM_BASE);
-			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-					(1ul << (col + bw - 1ul)));
-			writel(PATTERN, test_addr);
-			if ((readl(test_addr) == PATTERN) &&
-			    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-				break;
-		}
-		if (col == 8) {
-			printascii("col error\n");
+		if (sdram_detect_col(cap_info, coltmp) != 0)
 			goto cap_err;
-		}
-
-		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				(1ul << (coltmp + bktmp + bw - 1ul)));
-		writel(0, CONFIG_SYS_SDRAM_BASE);
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-			bk = 3;
-		else
-			bk = 2;
-		if (dram_type == DDR3)
-			dbw = 1;
-		else
-			dbw = 2;
+		sdram_detect_bank(cap_info, coltmp, bktmp);
+		sdram_detect_dbw(cap_info, dram_type);
 	} else {
 		/* detect bg for ddr4 */
 		coltmp = 10;
@@ -960,217 +490,62 @@ static u64 dram_detect_cap(struct dram_info *dram,
 
 		col = 10;
 		bk = 2;
-		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				(1ul << (coltmp + bw + 1ul)));
-		writel(0, CONFIG_SYS_SDRAM_BASE);
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-			dbw = 0;
-		else
-			dbw = 1;
+		cap_info->col = col;
+		cap_info->bk = bk;
+		sdram_detect_bg(cap_info, coltmp);
 	}
+
 	/* detect row */
-	for (row = rowtmp; row > 12; row--) {
-		writel(0, CONFIG_SYS_SDRAM_BASE);
-		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				(1ul << (row + bktmp + coltmp + bw - 1ul)));
-		writel(PATTERN, test_addr);
-		if ((readl(test_addr) == PATTERN) &&
-		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
-			break;
-	}
-	if (row == 12) {
-		printascii("row error");
+	if (sdram_detect_row(cap_info, coltmp, bktmp, rowtmp) != 0)
 		goto cap_err;
-	}
-	/* detect row_3_4 */
-	test_addr = CONFIG_SYS_SDRAM_BASE;
-	test_addr1 = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
-
-	writel(0, test_addr);
-	writel(PATTERN, test_addr1);
-	if ((readl(test_addr) == 0) &&
-	    (readl(test_addr1) == PATTERN))
-		row_3_4 = 0;
-	else
-		row_3_4 = 1;
 
-	/* disable auto low-power */
-	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
-	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+	/* detect row_3_4 */
+	sdram_detect_row_3_4(cap_info, coltmp, bktmp);
 
-	/* bw and cs detect using phy read gate training */
+	/* bw and cs detect using data training */
 	if (data_training(dram, 1, dram_type) == 0)
 		cs = 1;
 	else
 		cs = 0;
+	cap_info->rank = cs + 1;
 
-	clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
-	setbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
-	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
-
-	phy_soft_reset(dram);
-
+	dram_set_bw(dram, 2);
 	if (data_training(dram, 0, dram_type) == 0)
 		bw = 2;
 	else
 		bw = 1;
+	cap_info->bw = bw;
 
-	/* restore auto low-power */
-	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
-
-	sdram_params->ch.rank = cs + 1;
-	sdram_params->ch.col = col;
-	sdram_params->ch.bk = bk;
-	sdram_params->ch.dbw = dbw;
-	sdram_params->ch.bw = bw;
-	sdram_params->ch.cs0_row = row;
-	sdram_params->ch.cs0_high16bit_row = row;
+	cap_info->cs0_high16bit_row = cap_info->cs0_row;
 	if (cs) {
-		sdram_params->ch.cs1_row = row;
-		sdram_params->ch.cs1_high16bit_row = row;
+		cap_info->cs1_row = cap_info->cs0_row;
+		cap_info->cs1_high16bit_row = cap_info->cs0_row;
 	} else {
-		sdram_params->ch.cs1_row = 0;
-		sdram_params->ch.cs1_high16bit_row = 0;
-	}
-	sdram_params->ch.row_3_4 = row_3_4;
-
-	if (dram_type == DDR4)
-		cap = 1llu << (cs + row + bk + col + ((dbw == 0) ? 2 : 1) + bw);
-	else
-		cap = 1llu << (cs + row + bk + col + bw);
-
-	return cap;
-
-cap_err:
-	return 0;
-}
-
-static u32 remodify_sdram_params(struct px30_sdram_params *sdram_params)
-{
-	u32 tmp = 0, tmp_adr = 0, i;
-
-	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
-		if (sdram_params->pctl_regs.pctl[i][0] == 0) {
-			tmp = sdram_params->pctl_regs.pctl[i][1];/* MSTR */
-			tmp_adr = i;
-		}
-	}
-
-	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
-
-	switch (sdram_params->ch.dbw) {
-	case 2:
-		tmp |= (3ul << 30);
-		break;
-	case 1:
-		tmp |= (2ul << 30);
-		break;
-	case 0:
-	default:
-		tmp |= (1ul << 30);
-		break;
+		cap_info->cs1_row = 0;
+		cap_info->cs1_high16bit_row = 0;
 	}
 
-	/*
-	 * If DDR3 or DDR4 MSTR.active_ranks=1,
-	 * it will gate memory clock when enter power down.
-	 * Force set active_ranks to 3 to workaround it.
-	 */
-	if (sdram_params->ch.rank == 2 || sdram_params->dramtype == DDR3 ||
-	    sdram_params->dramtype == DDR4)
-		tmp |= 3 << 24;
-	else
-		tmp |= 1 << 24;
-
-	tmp |= (2 - sdram_params->ch.bw) << 12;
-
-	sdram_params->pctl_regs.pctl[tmp_adr][1] = tmp;
-
 	return 0;
-}
-
-int dram_detect_high_row(struct dram_info *dram,
-			 struct px30_sdram_params *sdram_params,
-			 unsigned char channel)
-{
-	sdram_params->ch.cs0_high16bit_row = sdram_params->ch.cs0_row;
-	sdram_params->ch.cs1_high16bit_row = sdram_params->ch.cs1_row;
-
-	return 0;
-}
-
-static int dram_detect_cs1_row(struct px30_sdram_params *sdram_params,
-			       unsigned char channel)
-{
-	u32 ret = 0;
-	void __iomem *test_addr;
-	u32 row, bktmp, coltmp, bw;
-	u64 cs0_cap;
-	u32 byte_mask;
-
-	if (sdram_params->ch.rank == 2) {
-		cs0_cap = get_cs_cap(sdram_params, 0);
-
-		if (sdram_params->dramtype == DDR4) {
-			if (sdram_params->ch.dbw == 0)
-				bktmp = sdram_params->ch.bk + 2;
-			else
-				bktmp = sdram_params->ch.bk + 1;
-		} else {
-			bktmp = sdram_params->ch.bk;
-		}
-		bw = sdram_params->ch.bw;
-		coltmp = sdram_params->ch.col;
-
-		/*
-		 * because px30 support axi split,min bandwidth
-		 * is 8bit. if cs0 is 32bit, cs1 may 32bit or 16bit
-		 * so we check low 16bit data when detect cs1 row.
-		 * if cs0 is 16bit/8bit, we check low 8bit data.
-		 */
-		if (bw == 2)
-			byte_mask = 0xFFFF;
-		else
-			byte_mask = 0xFF;
-
-		/* detect cs1 row */
-		for (row = sdram_params->ch.cs0_row; row > 12; row--) {
-			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
-				    cs0_cap +
-				    (1ul << (row + bktmp + coltmp + bw - 1ul)));
-			writel(0, CONFIG_SYS_SDRAM_BASE + cs0_cap);
-			writel(PATTERN, test_addr);
-
-			if (((readl(test_addr) & byte_mask) ==
-			     (PATTERN & byte_mask)) &&
-			    ((readl(CONFIG_SYS_SDRAM_BASE + cs0_cap) &
-			      byte_mask) == 0)) {
-				ret = row;
-				break;
-			}
-		}
-	}
-
-	return ret;
+cap_err:
+	return -1;
 }
 
 void get_ddr_param(struct px30_sdram_params *sdram_params,
 		   struct ddr_param *ddr_param)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
+	u32 dram_type = sdram_params->base.dramtype;
 	u64 cs_cap[2];
 
-	cs_cap[0] = get_cs_cap(sdram_params, 0);
-	cs_cap[1] = get_cs_cap(sdram_params, 1);
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, dram_type);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, dram_type);
 
-	if (sdram_params->ch.row_3_4) {
+	if (cap_info->row_3_4) {
 		cs_cap[0] =  cs_cap[0] * 3 / 4;
 		cs_cap[1] =  cs_cap[1] * 3 / 4;
 	}
 
-	if (sdram_params->ch.row_3_4 && sdram_params->ch.rank == 2) {
+	if (cap_info->row_3_4 && cap_info->rank == 2) {
 		ddr_param->count = 2;
 		ddr_param->para[0] = 0;
 		ddr_param->para[1] = cs_cap[0] * 4 / 3;
@@ -1187,6 +562,7 @@ void get_ddr_param(struct px30_sdram_params *sdram_params,
 static int sdram_init_detect(struct dram_info *dram,
 			     struct px30_sdram_params *sdram_params)
 {
+	struct sdram_cap_info *cap_info = &sdram_params->ch.cap_info;
 	u32 ret;
 	u32 sys_reg = 0;
 	u32 sys_reg3 = 0;
@@ -1194,29 +570,29 @@ static int sdram_init_detect(struct dram_info *dram,
 	if (sdram_init_(dram, sdram_params, 0) != 0)
 		return -1;
 
-	if (dram_detect_cap(dram, sdram_params, 0) == 0)
+	if (dram_detect_cap(dram, sdram_params, 0) != 0)
 		return -1;
 
 	/* modify bw, cs related timing */
-	remodify_sdram_params(sdram_params);
+	pctl_remodify_sdram_params(&sdram_params->pctl_regs, cap_info,
+				   sdram_params->base.dramtype);
 	/* reinit sdram by real dram cap */
 	ret = sdram_init_(dram, sdram_params, 1);
 	if (ret != 0)
 		goto out;
 
 	/* redetect cs1 row */
-	sdram_params->ch.cs1_row =
-		dram_detect_cs1_row(sdram_params, 0);
-	if (sdram_params->ch.cs1_row) {
+	sdram_detect_cs1_row(cap_info, sdram_params->base.dramtype);
+	if (cap_info->cs1_row) {
 		sys_reg = readl(&dram->pmugrf->os_reg[2]);
 		sys_reg3 = readl(&dram->pmugrf->os_reg[3]);
-		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row,
-				     sys_reg, sys_reg3);
+		SYS_REG_ENC_CS1_ROW(cap_info->cs1_row,
+				    sys_reg, sys_reg3, 0);
 		writel(sys_reg, &dram->pmugrf->os_reg[2]);
 		writel(sys_reg3, &dram->pmugrf->os_reg[3]);
 	}
 
-	ret = dram_detect_high_row(dram, sdram_params, 0);
+	ret = sdram_detect_high_row(cap_info);
 
 out:
 	return ret;
@@ -1253,7 +629,8 @@ int sdram_init(void)
 
 	get_ddr_param(sdram_params, &ddr_param);
 	rockchip_setup_ddr_param(&ddr_param);
-	print_ddr_info(sdram_params);
+	sdram_print_ddr_info(&sdram_params->ch.cap_info,
+			     &sdram_params->base, 0);
 
 	printascii("out\n");
 	return ret;

commit 74803dece4f6bd70a61b317c132550d46c739458
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Dec 21 16:12:56 2018 +0800

    driver: ram: rockchip: add common code about dram init
    
    Add commond code about rockchip dram init,include print dram info,
    capacity detect,config msch timing,config os_regs and so on.
    
    Change-Id: Ie4223dac31bde290d19627c96088542fcdd5521d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
new file mode 100644
index 0000000000..9f493be489
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
@@ -0,0 +1,139 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PCTL_PX30_H
+#define _ASM_ARCH_SDRAM_PCTL_PX30_H
+#include <asm/arch/sdram_share.h>
+
+struct ddr_pctl_regs {
+	u32 pctl[30][2];
+};
+
+/* ddr pctl registers define */
+#define DDR_PCTL2_MSTR			0x0
+#define DDR_PCTL2_STAT			0x4
+#define DDR_PCTL2_MSTR1			0x8
+#define DDR_PCTL2_MRCTRL0		0x10
+#define DDR_PCTL2_MRCTRL1		0x14
+#define DDR_PCTL2_MRSTAT		0x18
+#define DDR_PCTL2_MRCTRL2		0x1c
+#define DDR_PCTL2_DERATEEN		0x20
+#define DDR_PCTL2_DERATEINT		0x24
+#define DDR_PCTL2_PWRCTL		0x30
+#define DDR_PCTL2_PWRTMG		0x34
+#define DDR_PCTL2_HWLPCTL		0x38
+#define DDR_PCTL2_RFSHCTL0		0x50
+#define DDR_PCTL2_RFSHCTL1		0x54
+#define DDR_PCTL2_RFSHCTL2		0x58
+#define DDR_PCTL2_RFSHCTL4		0x5c
+#define DDR_PCTL2_RFSHCTL3		0x60
+#define DDR_PCTL2_RFSHTMG		0x64
+#define DDR_PCTL2_RFSHTMG1		0x68
+#define DDR_PCTL2_RFSHCTL5		0x6c
+#define DDR_PCTL2_INIT0			0xd0
+#define DDR_PCTL2_INIT1			0xd4
+#define DDR_PCTL2_INIT2			0xd8
+#define DDR_PCTL2_INIT3			0xdc
+#define DDR_PCTL2_INIT4			0xe0
+#define DDR_PCTL2_INIT5			0xe4
+#define DDR_PCTL2_INIT6			0xe8
+#define DDR_PCTL2_INIT7			0xec
+#define DDR_PCTL2_DIMMCTL		0xf0
+#define DDR_PCTL2_RANKCTL		0xf4
+#define DDR_PCTL2_CHCTL			0xfc
+#define DDR_PCTL2_DRAMTMG0		0x100
+#define DDR_PCTL2_DRAMTMG1		0x104
+#define DDR_PCTL2_DRAMTMG2		0x108
+#define DDR_PCTL2_DRAMTMG3		0x10c
+#define DDR_PCTL2_DRAMTMG4		0x110
+#define DDR_PCTL2_DRAMTMG5		0x114
+#define DDR_PCTL2_DRAMTMG6		0x118
+#define DDR_PCTL2_DRAMTMG7		0x11c
+#define DDR_PCTL2_DRAMTMG8		0x120
+#define DDR_PCTL2_DRAMTMG9		0x124
+#define DDR_PCTL2_DRAMTMG10		0x128
+#define DDR_PCTL2_DRAMTMG11		0x12c
+#define DDR_PCTL2_DRAMTMG12		0x130
+#define DDR_PCTL2_DRAMTMG13		0x134
+#define DDR_PCTL2_DRAMTMG14		0x138
+#define DDR_PCTL2_DRAMTMG15		0x13c
+#define DDR_PCTL2_DRAMTMG16		0x140
+#define DDR_PCTL2_ZQCTL0		0x180
+#define DDR_PCTL2_ZQCTL1		0x184
+#define DDR_PCTL2_ZQCTL2		0x188
+#define DDR_PCTL2_ZQSTAT		0x18c
+#define DDR_PCTL2_DFITMG0		0x190
+#define DDR_PCTL2_DFITMG1		0x194
+#define DDR_PCTL2_DFILPCFG0		0x198
+#define DDR_PCTL2_DFILPCFG1		0x19c
+#define DDR_PCTL2_DFIUPD0		0x1a0
+#define DDR_PCTL2_DFIUPD1		0x1a4
+#define DDR_PCTL2_DFIUPD2		0x1a8
+#define DDR_PCTL2_DFIMISC		0x1b0
+#define DDR_PCTL2_DFITMG2		0x1b4
+#define DDR_PCTL2_DFITMG3		0x1b8
+#define DDR_PCTL2_DFISTAT		0x1bc
+#define DDR_PCTL2_DBICTL		0x1c0
+#define DDR_PCTL2_ADDRMAP0		0x200
+#define DDR_PCTL2_ADDRMAP1		0x204
+#define DDR_PCTL2_ADDRMAP2		0x208
+#define DDR_PCTL2_ADDRMAP3		0x20c
+#define DDR_PCTL2_ADDRMAP4		0x210
+#define DDR_PCTL2_ADDRMAP5		0x214
+#define DDR_PCTL2_ADDRMAP6		0x218
+#define DDR_PCTL2_ADDRMAP7		0x21c
+#define DDR_PCTL2_ADDRMAP8		0x220
+#define DDR_PCTL2_ADDRMAP9		0x224
+#define DDR_PCTL2_ADDRMAP10		0x228
+#define DDR_PCTL2_ADDRMAP11		0x22c
+#define DDR_PCTL2_ODTCFG		0x240
+#define DDR_PCTL2_ODTMAP		0x244
+#define DDR_PCTL2_SCHED			0x250
+#define DDR_PCTL2_SCHED1		0x254
+#define DDR_PCTL2_PERFHPR1		0x25c
+#define DDR_PCTL2_PERFLPR1		0x264
+#define DDR_PCTL2_PERFWR1		0x26c
+#define DDR_PCTL2_DQMAP0		0x280
+#define DDR_PCTL2_DQMAP1		0x284
+#define DDR_PCTL2_DQMAP2		0x288
+#define DDR_PCTL2_DQMAP3		0x28c
+#define DDR_PCTL2_DQMAP4		0x290
+#define DDR_PCTL2_DQMAP5		0x294
+#define DDR_PCTL2_DBG0			0x300
+#define DDR_PCTL2_DBG1			0x304
+#define DDR_PCTL2_DBGCAM		0x308
+#define DDR_PCTL2_DBGCMD		0x30c
+#define DDR_PCTL2_DBGSTAT		0x310
+#define DDR_PCTL2_SWCTL			0x320
+#define DDR_PCTL2_SWSTAT		0x324
+#define DDR_PCTL2_POISONCFG		0x36c
+#define DDR_PCTL2_POISONSTAT		0x370
+#define DDR_PCTL2_ADVECCINDEX		0x374
+#define DDR_PCTL2_ADVECCSTAT		0x378
+#define DDR_PCTL2_PSTAT			0x3fc
+#define DDR_PCTL2_PCCFG			0x400
+#define DDR_PCTL2_PCFGR_n		0x404
+#define DDR_PCTL2_PCFGW_n		0x408
+#define DDR_PCTL2_PCTRL_n		0x490
+
+/* PCTL2_MRSTAT */
+#define MR_WR_BUSY			BIT(0)
+
+void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num);
+int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
+		  u32 dramtype);
+int pctl_write_vrefdq(void __iomem *pctl_base, u32 rank, u32 vrefrate,
+		      u32 dramtype);
+
+u32 pctl_dis_zqcs_aref(void __iomem *pctl_base);
+void pctl_rest_zqcs_aref(void __iomem *pctl_base, u32 dis_auto_zq);
+
+u32 pctl_remodify_sdram_params(struct ddr_pctl_regs *pctl_regs,
+			       struct sdram_cap_info *cap_info,
+			       u32 dram_type);
+int pctl_cfg(void __iomem *pctl_base, struct ddr_pctl_regs *pctl_regs,
+	     u32 sr_idle, u32 pd_idle);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
new file mode 100644
index 0000000000..249be58f7e
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PHY_PX30_H
+#define _ASM_ARCH_SDRAM_PHY_PX30_H
+#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_phy_ron_rtt_px30.h>
+
+struct ddr_phy_regs {
+	u32 phy[5][2];
+};
+
+#define PHY_REG(base, n)		((base) + 4 * (n))
+
+/* PHY_REG0 */
+#define DIGITAL_DERESET			BIT(3)
+#define ANALOG_DERESET			BIT(2)
+#define DIGITAL_RESET			(0 << 3)
+#define ANALOG_RESET			(0 << 2)
+
+/* PHY_REG1 */
+#define PHY_DDR2			(0)
+#define PHY_LPDDR2			(1)
+#define PHY_DDR3			(2)
+#define PHY_LPDDR3			(3)
+#define PHY_DDR4			(4)
+#define PHY_BL_4			(0 << 2)
+#define PHY_BL_8			BIT(2)
+
+/* PHY_REG2 */
+#define PHY_DTT_EN			BIT(0)
+#define PHY_DTT_DISB			(0 << 0)
+#define PHY_WRITE_LEVELING_EN		BIT(2)
+#define PHY_WRITE_LEVELING_DISB		(0 << 2)
+#define PHY_SELECT_CS0			(2)
+#define PHY_SELECT_CS1			(1)
+#define PHY_SELECT_CS0_1		(0)
+#define PHY_WRITE_LEVELING_SELECTCS(n)	((n) << 6)
+#define PHY_DATA_TRAINING_SELECTCS(n)	((n) << 4)
+
+struct ddr_phy_skew {
+	u32 a0_a1_skew[15];
+	u32 cs0_dm0_skew[11];
+	u32 cs0_dm1_skew[11];
+	u32 cs0_dm2_skew[11];
+	u32 cs0_dm3_skew[11];
+	u32 cs1_dm0_skew[11];
+	u32 cs1_dm1_skew[11];
+	u32 cs1_dm2_skew[11];
+	u32 cs1_dm3_skew[11];
+};
+
+void phy_soft_reset(void __iomem *phy_base);
+void phy_dram_set_bw(void __iomem *phy_base, u32 bw);
+void phy_cfg(void __iomem *phy_base,
+	     struct ddr_phy_regs *phy_regs, struct ddr_phy_skew *skew,
+	     struct sdram_base_params *base, u32 bw);
+int phy_data_training(void __iomem *phy_base, u32 cs, u32 dramtype);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_phy_ron_rtt_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_phy_ron_rtt_px30.h
new file mode 100644
index 0000000000..9c15232047
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_phy_ron_rtt_px30.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PHY_RON_RTT_PX30_H
+#define _ASM_ARCH_SDRAM_PHY_RON_RTT_PX30_H
+
+#define PHY_DDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR3_RON_RTT_451ohm		(1)
+#define PHY_DDR3_RON_RTT_225ohm		(2)
+#define PHY_DDR3_RON_RTT_150ohm		(3)
+#define PHY_DDR3_RON_RTT_112ohm		(4)
+#define PHY_DDR3_RON_RTT_90ohm		(5)
+#define PHY_DDR3_RON_RTT_75ohm		(6)
+#define PHY_DDR3_RON_RTT_64ohm		(7)
+#define PHY_DDR3_RON_RTT_56ohm		(16)
+#define PHY_DDR3_RON_RTT_50ohm		(17)
+#define PHY_DDR3_RON_RTT_45ohm		(18)
+#define PHY_DDR3_RON_RTT_41ohm		(19)
+#define PHY_DDR3_RON_RTT_37ohm		(20)
+#define PHY_DDR3_RON_RTT_34ohm		(21)
+#define PHY_DDR3_RON_RTT_33ohm		(22)
+#define PHY_DDR3_RON_RTT_30ohm		(23)
+#define PHY_DDR3_RON_RTT_28ohm		(24)
+#define PHY_DDR3_RON_RTT_26ohm		(25)
+#define PHY_DDR3_RON_RTT_25ohm		(26)
+#define PHY_DDR3_RON_RTT_23ohm		(27)
+#define PHY_DDR3_RON_RTT_22ohm		(28)
+#define PHY_DDR3_RON_RTT_21ohm		(29)
+#define PHY_DDR3_RON_RTT_20ohm		(30)
+#define PHY_DDR3_RON_RTT_19ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_share.h b/arch/arm/include/asm/arch-rockchip/sdram_share.h
new file mode 100644
index 0000000000..09a3fde15f
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_share.h
@@ -0,0 +1,285 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_SHARE_H
+#define _ASM_ARCH_SDRAM_SHARE_H
+
+#define MHZ		1000000
+
+struct sdram_cap_info {
+	unsigned int rank;
+	unsigned int col;
+	/* 3:8bank, 2:4bank */
+	unsigned int bk;
+	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int bw;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int dbw;
+	unsigned int row_3_4;
+	unsigned int cs0_row;
+	unsigned int cs1_row;
+	unsigned int cs0_high16bit_row;
+	unsigned int cs1_high16bit_row;
+	unsigned int ddrconfig;
+};
+
+struct sdram_base_params {
+	unsigned int ddr_freq;
+	unsigned int dramtype;
+	unsigned int num_channels;
+	unsigned int stride;
+	unsigned int odt;
+};
+
+#ifdef CONFIG_SDRAM_COMMON_OSREG
+/*
+ * sys_reg bitfield struct
+ * [31]		row_3_4_ch1
+ * [30]		row_3_4_ch0
+ * [29:28]	chinfo
+ * [27]		rank_ch1
+ * [26:25]	col_ch1
+ * [24]		bk_ch1
+ * [23:22]	cs0_row_ch1
+ * [21:20]	cs1_row_ch1
+ * [19:18]	bw_ch1
+ * [17:16]	dbw_ch1;
+ * [15:13]	ddrtype
+ * [12]		channelnum
+ * [11]		rank_ch0
+ * [10:9]	col_ch0
+ * [8]		bk_ch0
+ * [7:6]	cs0_row_ch0
+ * [5:4]	cs1_row_ch0
+ * [3:2]	bw_ch0
+ * [1:0]	dbw_ch0
+ */
+
+#define DDR_SYS_REG_VERSION		(0x2)
+#define SYS_REG_ENC_ROW_3_4(n, ch)	((n) << (30 + (ch)))
+#define SYS_REG_DEC_ROW_3_4(n, ch)	(((n) >> (30 + (ch))) & 0x1)
+#define SYS_REG_ENC_CHINFO(ch)		(1 << (28 + (ch)))
+#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
+#define SYS_REG_DEC_DDRTYPE(n)		(((n) >> 13) & 0x7)
+#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
+#define SYS_REG_DEC_NUM_CH(n)		(1 + (((n) >> 12) & 0x1))
+#define SYS_REG_ENC_RANK(n, ch)		(((n) - 1) << (11 + ((ch) * 16)))
+#define SYS_REG_DEC_RANK(n, ch)		(1 + (((n) >> (11 + 16 * (ch))) & 0x1))
+#define SYS_REG_ENC_COL(n, ch)		(((n) - 9) << (9 + ((ch) * 16)))
+#define SYS_REG_DEC_COL(n, ch)		(9 + (((n) >> (9 + 16 * (ch))) & 0x3))
+#define SYS_REG_ENC_BK(n, ch)		(((n) == 3 ? 0 : 1) << \
+						(8 + ((ch) * 16)))
+#define SYS_REG_DEC_BK(n, ch)		(3 - (((n) >> (8 + 16 * (ch))) & 0x1))
+#define SYS_REG_ENC_BW(n, ch)		((2 >> (n)) << (2 + ((ch) * 16)))
+#define SYS_REG_DEC_BW(n, ch)		(2 >> (((n) >> (2 + 16 * (ch))) & 0x3))
+#define SYS_REG_ENC_DBW(n, ch)		((2 >> (n)) << (0 + ((ch) * 16)))
+#define SYS_REG_DEC_DBW(n, ch)		(2 >> (((n) >> (0 + 16 * (ch))) & 0x3))
+/* sys reg 3 */
+#define SYS_REG_ENC_VERSION(n)		((n) << 28)
+#define SYS_REG_DEC_VERSION(n)		(((n) >> 28) & 0xf)
+#define SYS_REG_ENC_CS0_ROW(n, os_reg2, os_reg3, ch) do { \
+			(os_reg2) |= (((n) - 13) & 0x3) << (6 + 16 * (ch)); \
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \
+				     (5 + 2 * (ch)); \
+		} while (0)
+
+#define SYS_REG_DEC_CS0_ROW(os_reg2, os_reg3, ch)	\
+		((((((os_reg2) >> (6 + 16 * (ch)) & 0x3) | \
+		 ((((os_reg3) >> (5 + 2 * (ch))) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_ROW(n, os_reg2, os_reg3, ch) do { \
+			(os_reg2) &= (~(0x3 << (4 + 16 * (ch)))); \
+			(os_reg3) &= (~(0x1 << (4 + 2 * (ch)))); \
+			(os_reg2) |= (((n) - 13) & 0x3) << (4 + 16 * (ch)); \
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \
+				     (4 + 2 * (ch)); \
+		} while (0)
+
+#define SYS_REG_DEC_CS1_ROW(os_reg2, os_reg3, ch) \
+		((((((os_reg2) >> (4 + 16 * (ch)) & 0x3) | \
+		 ((((os_reg3) >> (4 + 2 * (ch))) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_COL(n, ch)	(((n) - 9) << (0 + 2 * (ch)))
+#define SYS_REG_DEC_CS1_COL(n, ch)	(9 + (((n) >> (0 + 2 * (ch))) & 0x3))
+
+void sdram_org_config(struct sdram_cap_info *cap_info,
+		      struct sdram_base_params *base,
+		      u32 *p_os_reg2, u32 *p_os_reg3, u32 channel);
+#endif
+
+#if defined(CONFIG_SDRAM_COMMON_MSCH_PX30) || \
+	defined(CONFIG_SDRAM_COMMON_MSCH_RK3399)
+union noc_ddrtiminga0 {
+	u32 d32;
+	struct {
+		unsigned acttoact : 6;
+		unsigned reserved0 : 2;
+		unsigned rdtomiss : 6;
+		unsigned reserved1 : 2;
+		unsigned wrtomiss : 6;
+		unsigned reserved2 : 2;
+		unsigned readlatency : 8;
+	} b;
+};
+
+union noc_ddrtimingb0 {
+	u32 d32;
+	struct {
+		unsigned rdtowr : 5;
+		unsigned reserved0 : 3;
+		unsigned wrtord : 5;
+		unsigned reserved1 : 3;
+		unsigned rrd : 4;
+		unsigned reserved2 : 4;
+		unsigned faw : 6;
+		unsigned reserved3 : 2;
+	} b;
+};
+
+union noc_ddrtimingc0 {
+	u32 d32;
+	struct {
+		unsigned burstpenalty : 4;
+		unsigned reserved0 : 4;
+		unsigned wrtomwr : 6;
+		unsigned reserved1 : 18;
+	} b;
+};
+
+union noc_devtodev0 {
+	u32 d32;
+	struct {
+		unsigned busrdtord : 3;
+		unsigned reserved0 : 1;
+		unsigned busrdtowr : 3;
+		unsigned reserved1 : 1;
+		unsigned buswrtord : 3;
+		unsigned reserved2 : 1;
+		unsigned buswrtowr : 3;
+		unsigned reserved3 : 17;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge : 1;
+		unsigned bypassfiltering : 1;
+		unsigned fawbank : 1;
+		unsigned burstsize : 2;
+		unsigned mwrsize : 2;
+		unsigned reserved2 : 1;
+		unsigned forceorder : 8;
+		unsigned forceorderstate : 8;
+		unsigned reserved3 : 8;
+	} b;
+};
+
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl : 3;
+		unsigned wrtordl : 5;
+		unsigned rrdl : 4;
+		unsigned reserved1 : 20;
+	} b;
+};
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_PX30
+struct msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 deviceconf;
+	u32 devicesize;
+	u32 ddrtiminga0;
+	u32 ddrtimingb0;
+	u32 ddrtimingc0;
+	u32 devtodev0;
+	u32 reserved1[(0x110 - 0x20) / 4];
+	u32 ddrmode;
+	u32 ddr4timing;
+	u32 reserved2[(0x1000 - 0x118) / 4];
+	u32 agingx0;
+	u32 reserved3[(0x1040 - 0x1004) / 4];
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+};
+
+struct sdram_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+};
+
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings,
+		       struct sdram_cap_info *cap_info,
+		       struct sdram_base_params *base);
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_RK3399
+struct msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 ddrconf;
+	u32 ddrsize;
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	u32 reserved0[(0x110 - 0x20) / 4];
+	union noc_ddrmode ddrmode;
+	u32 reserved1[(0x1000 - 0x114) / 4];
+	u32 agingx0;
+};
+
+struct sdram_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	u32 agingx0;
+};
+
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings);
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_CAP_DETECT
+
+#define PATTERN				(0x5aa5f00f)
+
+int sdram_detect_bw(struct sdram_cap_info *cap_info);
+int sdram_detect_cs(struct sdram_cap_info *cap_info);
+int sdram_detect_col(struct sdram_cap_info *cap_info,
+		     u32 coltmp);
+int sdram_detect_bank(struct sdram_cap_info *cap_info,
+		      u32 coltmp, u32 bktmp);
+int sdram_detect_bg(struct sdram_cap_info *cap_info,
+		    u32 coltmp);
+int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type);
+int sdram_detect_row(struct sdram_cap_info *cap_info,
+		     u32 coltmp, u32 bktmp, u32 rowtmp);
+int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
+			 u32 coltmp, u32 bktmp);
+int sdram_detect_high_row(struct sdram_cap_info *cap_info);
+int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type);
+#endif
+
+void sdram_print_dram_type(unsigned char dramtype);
+void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
+			  struct sdram_base_params *base, u32 split);
+u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type);
+void sdram_copy_to_reg(u32 *dest, const u32 *src, u32 n);
+
+#endif
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index ab21b34daf..c312366626 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -2,3 +2,25 @@ config ROCKCHIP_DMC
 	bool "ROCKCHIP DMC"
 	help
 	  This enable dram devfreq driver.
+
+config ROCKCHIP_SDRAM_COMMON
+	bool "Enable rockchip sdram common driver"
+	depends on TPL_RAM || SPL_RAM
+	help
+	  This enable sdram common driver
+
+config SDRAM_COMMON_CAP_DETECT
+	bool "Enable rockchip sdram capacity detect driver"
+	depends on ROCKCHIP_SDRAM_COMMON
+
+config SDRAM_COMMON_OSREG
+	bool "Enable rockchip sdram set sys os_reg driver"
+	depends on ROCKCHIP_SDRAM_COMMON
+
+config SDRAM_COMMON_MSCH_RK3399
+	bool "Enable rockchip sdram set RK3399 msch driver"
+	depends on ROCKCHIP_SDRAM_COMMON
+
+config SDRAM_COMMON_MSCH_PX30
+	bool "Enable rockchip sdram set PX30 msch driver"
+	depends on ROCKCHIP_SDRAM_COMMON
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 44c95981ac..818f340418 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -4,6 +4,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-$(CONFIG_ROCKCHIP_SDRAM_COMMON) += sdram_share.o
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c
new file mode 100644
index 0000000000..247d9317b3
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_pctl_px30.c
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_pctl_px30.h>
+
+/*
+ * rank = 1: cs0
+ * rank = 2: cs1
+ */
+void pctl_read_mr(void __iomem *pctl_base, u32 rank, u32 mr_num)
+{
+	writel((rank << 4) | (1 << 0), pctl_base + DDR_PCTL2_MRCTRL0);
+	writel((mr_num << 8), pctl_base + DDR_PCTL2_MRCTRL1);
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+}
+
+/* rank = 1: cs0
+ * rank = 2: cs1
+ * rank = 3: cs0 & cs1
+ * note: be careful of keep mr original val
+ */
+int pctl_write_mr(void __iomem *pctl_base, u32 rank, u32 mr_num, u32 arg,
+		  u32 dramtype)
+{
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+	if (dramtype == DDR3 || dramtype == DDR4) {
+		writel((mr_num << 12) | (rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
+	} else {
+		writel((rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel((mr_num << 8) | (arg & 0xff),
+		       pctl_base + DDR_PCTL2_MRCTRL1);
+	}
+
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return 0;
+}
+
+/*
+ * rank : 1:cs0, 2:cs1, 3:cs0&cs1
+ * vrefrate: 4500: 45%,
+ */
+int pctl_write_vrefdq(void __iomem *pctl_base, u32 rank, u32 vrefrate,
+		      u32 dramtype)
+{
+	u32 tccd_l, value;
+	u32 dis_auto_zq = 0;
+
+	if (dramtype != DDR4 || vrefrate < 4500 ||
+	    vrefrate > 9200)
+		return (-1);
+
+	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
+	tccd_l = (tccd_l - 4) << 10;
+
+	if (vrefrate > 7500) {
+		/* range 1 */
+		value = ((vrefrate - 6000) / 65) | tccd_l;
+	} else {
+		/* range 2 */
+		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
+	}
+
+	dis_auto_zq = pctl_dis_zqcs_aref(pctl_base);
+
+	/* enable vrefdq calibratin */
+	pctl_write_mr(pctl_base, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvrefdqe */
+	/* write vrefdq value */
+	pctl_write_mr(pctl_base, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvref_time */
+	pctl_write_mr(pctl_base, rank, 6, value | (0 << 7), dramtype);
+	udelay(1);/* tvrefdqx */
+
+	pctl_rest_zqcs_aref(pctl_base, dis_auto_zq);
+
+	return 0;
+}
+
+static int upctl2_update_ref_reg(void __iomem *pctl_base)
+{
+	u32 ret;
+
+	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
+	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
+
+	return 0;
+}
+
+u32 pctl_dis_zqcs_aref(void __iomem *pctl_base)
+{
+	u32 dis_auto_zq = 0;
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	upctl2_update_ref_reg(pctl_base);
+
+	return dis_auto_zq;
+}
+
+void pctl_rest_zqcs_aref(void __iomem *pctl_base, u32 dis_auto_zq)
+{
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	upctl2_update_ref_reg(pctl_base);
+}
+
+u32 pctl_remodify_sdram_params(struct ddr_pctl_regs *pctl_regs,
+			       struct sdram_cap_info *cap_info,
+			       u32 dram_type)
+{
+	u32 tmp = 0, tmp_adr = 0, i;
+
+	for (i = 0; pctl_regs->pctl[i][0] != 0xFFFFFFFF; i++) {
+		if (pctl_regs->pctl[i][0] == 0) {
+			tmp = pctl_regs->pctl[i][1];/* MSTR */
+			tmp_adr = i;
+		}
+	}
+
+	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
+
+	switch (cap_info->dbw) {
+	case 2:
+		tmp |= (3ul << 30);
+		break;
+	case 1:
+		tmp |= (2ul << 30);
+		break;
+	case 0:
+	default:
+		tmp |= (1ul << 30);
+		break;
+	}
+
+	/*
+	 * If DDR3 or DDR4 MSTR.active_ranks=1,
+	 * it will gate memory clock when enter power down.
+	 * Force set active_ranks to 3 to workaround it.
+	 */
+	if (cap_info->rank == 2 || dram_type == DDR3 ||
+	    dram_type == DDR4)
+		tmp |= 3 << 24;
+	else
+		tmp |= 1 << 24;
+
+	tmp |= (2 - cap_info->bw) << 12;
+
+	pctl_regs->pctl[tmp_adr][1] = tmp;
+
+	return 0;
+}
+
+int pctl_cfg(void __iomem *pctl_base, struct ddr_pctl_regs *pctl_regs,
+	     u32 sr_idle, u32 pd_idle)
+{
+	u32 i;
+
+	for (i = 0; pctl_regs->pctl[i][0] != 0xFFFFFFFF; i++) {
+		writel(pctl_regs->pctl[i][1],
+		       pctl_base + pctl_regs->pctl[i][0]);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
+			(0xff << 16) | 0x1f,
+			((sr_idle & 0xff) << 16) | (pd_idle & 0x1f));
+
+	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
+			0xfff << 16,
+			5 << 16);
+	/* disable zqcs */
+	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
+
+	return 0;
+}
+
diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c
new file mode 100644
index 0000000000..ad139d8107
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_share.h>
+#include <asm/arch/sdram_phy_px30.h>
+
+static void sdram_phy_dll_bypass_set(void __iomem *phy_base, u32 freq)
+{
+	u32 tmp;
+	u32 i, j;
+
+	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
+	for (i = 0; i < 4; i++) {
+		j = 0x26 + i * 0x10;
+		setbits_le32(PHY_REG(phy_base, j), 1 << 4);
+		clrbits_le32(PHY_REG(phy_base, j + 0x1), 1 << 3);
+	}
+
+	if (freq <= (400 * MHZ))
+		/* DLL bypass */
+		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	else
+		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+
+	if (freq <= (801 * MHZ))
+		tmp = 2;
+	else
+		tmp = 1;
+
+	for (i = 0; i < 4; i++) {
+		j = 0x28 + i * 0x10;
+		writel(tmp, PHY_REG(phy_base, j));
+	}
+}
+
+static void sdram_phy_set_ds_odt(void __iomem *phy_base,
+				 u32 dram_type)
+{
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+	u32 i, j;
+
+	if (dram_type == DDR3) {
+		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR3_RON_RTT_45ohm;
+		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
+	} else {
+		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
+		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		if (dram_type == LPDDR2)
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_DISABLE;
+		else
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
+	}
+	/* DS */
+	writel(cmd_drv, PHY_REG(phy_base, 0x11));
+	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
+	writel(clk_drv, PHY_REG(phy_base, 0x16));
+	writel(clk_drv, PHY_REG(phy_base, 0x18));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(dqs_drv, PHY_REG(phy_base, j));
+		writel(dqs_drv, PHY_REG(phy_base, j + 0xf));
+		/* ODT */
+		writel(dqs_odt, PHY_REG(phy_base, j + 0x1));
+		writel(dqs_odt, PHY_REG(phy_base, j + 0xe));
+	}
+}
+
+void phy_soft_reset(void __iomem *phy_base)
+{
+	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
+	udelay(1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
+	udelay(5);
+	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
+	udelay(1);
+}
+
+void phy_dram_set_bw(void __iomem *phy_base, u32 bw)
+{
+	if (bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+		setbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		setbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else if (bw == 1) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else if (bw == 0) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
+		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+
+	phy_soft_reset(phy_base);
+}
+
+int phy_data_training(void __iomem *phy_base, u32 cs, u32 dramtype)
+{
+	u32 ret;
+	u32 odt_val;
+	u32 i, j;
+
+	odt_val = readl(PHY_REG(phy_base, 0x2e));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(PHY_DDR3_RON_RTT_225ohm, PHY_REG(phy_base, j + 0x1));
+		writel(0, PHY_REG(phy_base, j + 0xe));
+	}
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
+	}
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
+	/* enable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
+	udelay(50);
+	ret = readl(PHY_REG(phy_base, 0xff));
+	/* disable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
+	}
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
+		ret = (ret == 0) ? 0 : -1;
+	}
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(odt_val, PHY_REG(phy_base, j + 0x1));
+		writel(odt_val, PHY_REG(phy_base, j + 0xe));
+	}
+
+	return ret;
+}
+
+void phy_cfg(void __iomem *phy_base,
+	     struct ddr_phy_regs *phy_regs, struct ddr_phy_skew *skew,
+	     struct sdram_base_params *base, u32 bw)
+{
+	u32 i;
+
+	sdram_phy_dll_bypass_set(phy_base, base->ddr_freq);
+	for (i = 0; phy_regs->phy[i][0] != 0xFFFFFFFF; i++) {
+		writel(phy_regs->phy[i][1],
+		       phy_base + phy_regs->phy[i][0]);
+	}
+	if (bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	} else if (bw == 1) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+	sdram_phy_set_ds_odt(phy_base, base->dramtype);
+
+	/* deskew */
+	setbits_le32(PHY_REG(phy_base, 2), 8);
+	sdram_copy_to_reg(PHY_REG(phy_base, 0xb0),
+			  &skew->a0_a1_skew[0], 15 * 4);
+	sdram_copy_to_reg(PHY_REG(phy_base, 0x70),
+			  &skew->cs0_dm0_skew[0], 44 * 4);
+	sdram_copy_to_reg(PHY_REG(phy_base, 0xc0),
+			  &skew->cs1_dm0_skew[0], 44 * 4);
+}
+
diff --git a/drivers/ram/rockchip/sdram_share.c b/drivers/ram/rockchip/sdram_share.c
new file mode 100644
index 0000000000..09bce9d972
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_share.c
@@ -0,0 +1,456 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <ram.h>
+#include <asm/io.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_share.h>
+
+void sdram_print_dram_type(unsigned char dramtype)
+{
+	switch (dramtype) {
+	case DDR3:
+		printascii("DDR3");
+		break;
+	case DDR4:
+		printascii("DDR4");
+		break;
+	case LPDDR2:
+		printascii("LPDDR2");
+		break;
+	case LPDDR3:
+		printascii("LPDDR3");
+		break;
+	case LPDDR4:
+		printascii("LPDDR4");
+		break;
+	default:
+		printascii("Unknown Device");
+		break;
+	}
+}
+
+void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
+			  struct sdram_base_params *base, u32 split)
+{
+	u64 cap;
+	u32 bg;
+
+	bg = (cap_info->dbw == 0) ? 2 : 1;
+
+	sdram_print_dram_type(base->dramtype);
+
+	printascii(", ");
+	printdec(base->ddr_freq);
+	printascii("MHz\n");
+
+	printascii("BW=");
+	printdec(8 << cap_info->bw);
+	printascii(" Col=");
+	printdec(cap_info->col);
+	printascii(" Bk=");
+	printdec(0x1 << cap_info->bk);
+	if (base->dramtype == DDR4) {
+		printascii(" BG=");
+		printdec(1 << bg);
+	}
+	printascii(" CS0 Row=");
+	printdec(cap_info->cs0_row);
+	if (cap_info->cs0_high16bit_row !=
+		cap_info->cs0_row) {
+		printascii("/");
+		printdec(cap_info->cs0_high16bit_row);
+	}
+	if (cap_info->rank > 1) {
+		printascii(" CS1 Row=");
+		printdec(cap_info->cs1_row);
+		if (cap_info->cs1_high16bit_row !=
+			cap_info->cs1_row) {
+			printascii("/");
+			printdec(cap_info->cs1_high16bit_row);
+		}
+	}
+	printascii(" CS=");
+	printdec(cap_info->rank);
+	printascii(" Die BW=");
+	printdec(8 << cap_info->dbw);
+
+	cap = sdram_get_cs_cap(cap_info, 3, base->dramtype);
+	if (cap_info->row_3_4)
+		cap = cap * 3 / 4;
+	else if (split)
+		cap = cap / 2 + (split << 24) / 2;
+
+	printascii(" Size=");
+	printdec(cap >> 20);
+	printascii("MB\n");
+}
+
+/*
+ * cs: 0:cs0
+ *	   1:cs1
+ *     else cs0+cs1
+ * note: it didn't consider about row_3_4
+ */
+u64 sdram_get_cs_cap(struct sdram_cap_info *cap_info, u32 cs, u32 dram_type)
+{
+	u32 bg;
+	u64 cap[2];
+
+	if (dram_type == DDR4)
+		/* DDR4 8bit dram BG = 2(4bank groups),
+		 * 16bit dram BG = 1 (2 bank groups)
+		 */
+		bg = (cap_info->dbw == 0) ? 2 : 1;
+	else
+		bg = 0;
+	cap[0] = 1llu << (cap_info->bw + cap_info->col +
+		bg + cap_info->bk + cap_info->cs0_row);
+
+	if (cap_info->rank == 2)
+		cap[1] = 1llu << (cap_info->bw + cap_info->col +
+			bg + cap_info->bk + cap_info->cs1_row);
+	else
+		cap[1] = 0;
+
+	if (cs == 0)
+		return cap[0];
+	else if (cs == 1)
+		return cap[1];
+	else
+		return (cap[0] + cap[1]);
+}
+
+/* n: Unit bytes */
+void sdram_copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+#ifdef CONFIG_SDRAM_COMMON_OSREG
+void sdram_org_config(struct sdram_cap_info *cap_info,
+		      struct sdram_base_params *base,
+		      u32 *p_os_reg2, u32 *p_os_reg3, u32 channel)
+{
+	*p_os_reg2 |= SYS_REG_ENC_DDRTYPE(base->dramtype);
+	*p_os_reg2 |= SYS_REG_ENC_NUM_CH(base->num_channels);
+
+	*p_os_reg2 |= SYS_REG_ENC_ROW_3_4(cap_info->row_3_4, channel);
+	*p_os_reg2 |= SYS_REG_ENC_CHINFO(channel);
+	*p_os_reg2 |= SYS_REG_ENC_RANK(cap_info->rank, channel);
+	*p_os_reg2 |= SYS_REG_ENC_COL(cap_info->col, channel);
+	*p_os_reg2 |= SYS_REG_ENC_BK(cap_info->bk, channel);
+	*p_os_reg2 |= SYS_REG_ENC_BW(cap_info->bw, channel);
+	*p_os_reg2 |= SYS_REG_ENC_DBW(cap_info->dbw, channel);
+
+	SYS_REG_ENC_CS0_ROW(cap_info->cs0_row, *p_os_reg2, *p_os_reg3, channel);
+	if (cap_info->cs1_row)
+		SYS_REG_ENC_CS1_ROW(cap_info->cs1_row, *p_os_reg2,
+				    *p_os_reg3, channel);
+	*p_os_reg3 |= SYS_REG_ENC_CS1_COL(cap_info->col, channel);
+	*p_os_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
+}
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_RK3399
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings)
+{
+	writel(noc_timings->ddrtiminga0.d32,
+	       &msch->ddrtiminga0.d32);
+	writel(noc_timings->ddrtimingb0.d32,
+	       &msch->ddrtimingb0.d32);
+	writel(noc_timings->ddrtimingc0.d32,
+	       &msch->ddrtimingc0.d32);
+	writel(noc_timings->devtodev0.d32,
+	       &msch->devtodev0.d32);
+	writel(noc_timings->ddrmode.d32,
+	       &msch->ddrmode.d32);
+}
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_MSCH_PX30
+void sdram_msch_config(struct msch_regs *msch,
+		       struct sdram_msch_timings *noc_timings,
+		       struct sdram_cap_info *cap_info,
+		       struct sdram_base_params *base)
+{
+	u64 cs_cap[2];
+
+	cs_cap[0] = sdram_get_cs_cap(cap_info, 0, base->dramtype);
+	cs_cap[1] = sdram_get_cs_cap(cap_info, 1, base->dramtype);
+	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
+			(((cs_cap[0] >> 20) / 64) & 0xff),
+			&msch->devicesize);
+
+	writel(noc_timings->ddrtiminga0.d32,
+	       &msch->ddrtiminga0);
+	writel(noc_timings->ddrtimingb0.d32,
+	       &msch->ddrtimingb0);
+	writel(noc_timings->ddrtimingc0.d32,
+	       &msch->ddrtimingc0);
+	writel(noc_timings->devtodev0.d32,
+	       &msch->devtodev0);
+	writel(noc_timings->ddrmode.d32, &msch->ddrmode);
+	writel(noc_timings->ddr4timing.d32,
+	       &msch->ddr4timing);
+	writel(noc_timings->agingx0, &msch->agingx0);
+	writel(noc_timings->agingx0, &msch->aging0);
+	writel(noc_timings->agingx0, &msch->aging1);
+	writel(noc_timings->agingx0, &msch->aging2);
+	writel(noc_timings->agingx0, &msch->aging3);
+}
+
+#endif
+
+#ifdef CONFIG_SDRAM_COMMON_CAP_DETECT
+int sdram_detect_bw(struct sdram_cap_info *cap_info)
+{
+	return 0;
+}
+
+int sdram_detect_cs(struct sdram_cap_info *cap_info)
+{
+	return 0;
+}
+
+int sdram_detect_col(struct sdram_cap_info *cap_info,
+		     u32 coltmp)
+{
+	void __iomem *test_addr;
+	u32 col;
+	u32 bw = cap_info->bw;
+
+	for (col = coltmp; col >= 9; col -= 1) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (col + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (col == 8) {
+		printascii("col error\n");
+		return -1;
+	}
+
+	cap_info->col = col;
+
+	return 0;
+}
+
+int sdram_detect_bank(struct sdram_cap_info *cap_info,
+		      u32 coltmp, u32 bktmp)
+{
+	void __iomem *test_addr;
+	u32 bk;
+	u32 bw = cap_info->bw;
+
+	test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(1ul << (coltmp + bktmp + bw - 1ul)));
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(PATTERN, test_addr);
+	if ((readl(test_addr) == PATTERN) &&
+	    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+		bk = 3;
+	else
+		bk = 2;
+
+	cap_info->bk = bk;
+
+	return 0;
+}
+
+/* detect bg for ddr4 */
+int sdram_detect_bg(struct sdram_cap_info *cap_info,
+		    u32 coltmp)
+{
+	void __iomem *test_addr;
+	u32 dbw;
+	u32 bw = cap_info->bw;
+
+	test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(1ul << (coltmp + bw + 1ul)));
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(PATTERN, test_addr);
+	if ((readl(test_addr) == PATTERN) &&
+	    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+		dbw = 0;
+	else
+		dbw = 1;
+
+	cap_info->dbw = dbw;
+
+	return 0;
+}
+
+/* detect dbw for ddr3,lpddr2,lpddr3,lpddr4 */
+int sdram_detect_dbw(struct sdram_cap_info *cap_info, u32 dram_type)
+{
+	u32 row, col, bk, bw, cs_cap, cs;
+	u32 die_bw_0 = 0, die_bw_1 = 0;
+
+	if (dram_type == DDR3 || dram_type == LPDDR4) {
+		cap_info->dbw = 1;
+	} else if (dram_type == LPDDR3 || dram_type == LPDDR2) {
+		row = cap_info->cs0_row;
+		col = cap_info->col;
+		bk = cap_info->bk;
+		cs = cap_info->rank;
+		bw = cap_info->bw;
+		cs_cap = (1 << (row + col + bk + bw - 20));
+		if (bw == 2) {
+			if (cs_cap <= 0x2000000) /* 256Mb */
+				die_bw_0 = (col < 9) ? 2 : 1;
+			else if (cs_cap <= 0x10000000) /* 2Gb */
+				die_bw_0 = (col < 10) ? 2 : 1;
+			else if (cs_cap <= 0x40000000) /* 8Gb */
+				die_bw_0 = (col < 11) ? 2 : 1;
+			else
+				die_bw_0 = (col < 12) ? 2 : 1;
+			if (cs > 1) {
+				row = cap_info->cs1_row;
+				cs_cap = (1 << (row + col + bk + bw - 20));
+				if (cs_cap <= 0x2000000) /* 256Mb */
+					die_bw_0 = (col < 9) ? 2 : 1;
+				else if (cs_cap <= 0x10000000) /* 2Gb */
+					die_bw_0 = (col < 10) ? 2 : 1;
+				else if (cs_cap <= 0x40000000) /* 8Gb */
+					die_bw_0 = (col < 11) ? 2 : 1;
+				else
+					die_bw_0 = (col < 12) ? 2 : 1;
+			}
+		} else {
+			die_bw_1 = 1;
+			die_bw_0 = 1;
+		}
+		cap_info->dbw = (die_bw_0 > die_bw_1) ? die_bw_0 : die_bw_1;
+	}
+
+	return 0;
+}
+
+int sdram_detect_row(struct sdram_cap_info *cap_info,
+		     u32 coltmp, u32 bktmp, u32 rowtmp)
+{
+	u32 row;
+	u32 bw = cap_info->bw;
+	void __iomem *test_addr;
+
+	for (row = rowtmp; row > 12; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (row + bktmp + coltmp + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 12) {
+		printascii("row error");
+		return -1;
+	}
+
+	cap_info->cs0_row = row;
+
+	return 0;
+}
+
+int sdram_detect_row_3_4(struct sdram_cap_info *cap_info,
+			 u32 coltmp, u32 bktmp)
+{
+	u32 row_3_4;
+	u32 bw = cap_info->bw;
+	u32 row = cap_info->cs0_row;
+	void __iomem *test_addr, *test_addr1;
+
+	test_addr = CONFIG_SYS_SDRAM_BASE;
+	test_addr1 = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
+
+	writel(0, test_addr);
+	writel(PATTERN, test_addr1);
+	if ((readl(test_addr) == 0) && (readl(test_addr1) == PATTERN))
+		row_3_4 = 0;
+	else
+		row_3_4 = 1;
+
+	cap_info->row_3_4 = row_3_4;
+
+	return 0;
+}
+
+int sdram_detect_high_row(struct sdram_cap_info *cap_info)
+{
+	cap_info->cs0_high16bit_row = cap_info->cs0_row;
+	cap_info->cs1_high16bit_row = cap_info->cs1_row;
+
+	return 0;
+}
+
+int sdram_detect_cs1_row(struct sdram_cap_info *cap_info, u32 dram_type)
+{
+	void __iomem *test_addr;
+	u32 row = 0, bktmp, coltmp, bw;
+	u64 cs0_cap;
+	u32 byte_mask;
+
+	if (cap_info->rank == 2) {
+		cs0_cap = sdram_get_cs_cap(cap_info, 0, dram_type);
+
+		if (dram_type == DDR4) {
+			if (cap_info->dbw == 0)
+				bktmp = cap_info->bk + 2;
+			else
+				bktmp = cap_info->bk + 1;
+		} else {
+			bktmp = cap_info->bk;
+		}
+		bw = cap_info->bw;
+		coltmp = cap_info->col;
+
+		/*
+		 * because px30 support axi split,min bandwidth
+		 * is 8bit. if cs0 is 32bit, cs1 may 32bit or 16bit
+		 * so we check low 16bit data when detect cs1 row.
+		 * if cs0 is 16bit/8bit, we check low 8bit data.
+		 */
+		if (bw == 2)
+			byte_mask = 0xFFFF;
+		else
+			byte_mask = 0xFF;
+
+		/* detect cs1 row */
+		for (row = cap_info->cs0_row; row > 12; row--) {
+			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				    cs0_cap +
+				    (1ul << (row + bktmp + coltmp + bw - 1ul)));
+			writel(0, CONFIG_SYS_SDRAM_BASE + cs0_cap);
+			writel(PATTERN, test_addr);
+
+			if (((readl(test_addr) & byte_mask) ==
+			     (PATTERN & byte_mask)) &&
+			    ((readl(CONFIG_SYS_SDRAM_BASE + cs0_cap) &
+			      byte_mask) == 0)) {
+				break;
+			}
+		}
+	}
+
+	cap_info->cs1_row = row;
+
+	return 0;
+}
+#endif
+

commit 8d97d065e23936448f1824d13eeaa7ac098965c6
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Dec 25 14:48:43 2018 +0800

    fuel gauge: rk817/rk809: support rk809
    
    A “battery fuel gauge” is integrated in the RK809. Using
    the proprietary algorithms and the sensed battery current
    and voltage, the gauge can accurately calculate the battery
    capacity based on the charging/discharging characteristics
    of the battery preloaded in the system. The gauge then sends
    the battery capacity information to the processor through
    the I2C interface.
    
    Change-Id: I4d1d0cce8d76f4ec39dfcd00c495c64257fd4b7b
    Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 5ba8434d05..f956c1c268 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -252,6 +252,9 @@ struct rk817_battery_device {
 	ulong				finish_chrg_base;
 	ulong				term_sig_base;
 	int				sm_meet_soc;
+	u32				bat_res_up;
+	u32				bat_res_down;
+	u32				variant;
 };
 
 static u32 interpolate(int value, u32 *table, int size)
@@ -337,54 +340,74 @@ static void rk817_bat_init_voltage_kb(struct rk817_battery_device *battery)
 
 	vcalib0 = rk817_bat_get_vaclib0(battery);
 	vcalib1 =  rk817_bat_get_vaclib1(battery);
-	battery->voltage_k = (4025 - 2300) * 1000 / DIV(vcalib1 - vcalib0);
-	battery->voltage_b = 4025 - (battery->voltage_k * vcalib1) / 1000;
+
+	if (battery->variant == RK809_ID) {
+		battery->voltage_k = (1050 - 600) * 1000 / DIV(vcalib1 - vcalib0);
+		battery->voltage_b = 1050 - (battery->voltage_k * vcalib1) / 1000;
+	} else {
+		battery->voltage_k = (4025 - 2300) * 1000 / DIV(vcalib1 - vcalib0);
+		battery->voltage_b = 4025 - (battery->voltage_k * vcalib1) / 1000;
+	}
 }
 
 /* power on battery voltage */
 static int rk817_bat_get_pwron_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, PWRON_VOL_H) << 8;
 	val |= rk817_bat_read(battery, PWRON_VOL_L);
 	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+	if (battery->variant == RK809_ID) {
+		vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
+		vol = vol_temp;
+	}
 
 	return vol;
 }
 
 static int rk817_bat_get_USB_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, USB_VOL_L) << 0;
 	val |= rk817_bat_read(battery, USB_VOL_H) << 8;
 
 	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+	if (battery->variant == RK809_ID) {
+		vol_temp = vol * battery->bat_res_up / battery->bat_res_down + vol;
+		vol = vol_temp;
+	}
 
 	return vol;
 }
 
 static int rk817_bat_get_sys_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, SYS_VOL_H) << 8;
 	val |= rk817_bat_read(battery, SYS_VOL_L) << 0;
 
 	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+	if (battery->variant == RK809_ID) {
+		vol_temp = vol * battery->bat_res_up / battery->bat_res_down + vol;
+		vol = vol_temp;
+	}
 
 	return vol;
 }
 
 static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
 {
-	int vol, val = 0;
+	int vol, val = 0, vol_temp;
 
 	val = rk817_bat_read(battery, BAT_VOL_H) << 8;
 	val |= rk817_bat_read(battery, BAT_VOL_L) << 0;
 
 	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+	vol_temp = (vol * battery->bat_res_up / battery->bat_res_down + vol);
+	vol = vol_temp;
 
 	return vol;
 }
@@ -921,21 +944,26 @@ static int rk817_bat_update_get_current(struct udevice *dev)
 		return VIRTUAL_POWER_CUR;
 }
 
-static int rk817_bat_dwc_otg_check_dpdm(void)
+static int rk817_bat_dwc_otg_check_dpdm(struct rk817_battery_device *battery)
 {
-	return rockchip_chg_get_type();
+	if (battery->variant == RK809_ID)
+		return 0;
+	else
+		return  rockchip_chg_get_type();
 }
 
 static bool rk817_bat_update_get_chrg_online(struct udevice *dev)
 {
-	return rk817_bat_dwc_otg_check_dpdm();
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	return rk817_bat_dwc_otg_check_dpdm(battery);
 }
 
 static int rk817_bat_get_usb_state(struct rk817_battery_device *battery)
 {
 	int charger_type;
 
-	switch (rk817_bat_dwc_otg_check_dpdm()) {
+	switch (rk817_bat_dwc_otg_check_dpdm(battery)) {
 	case POWER_SUPPLY_TYPE_UNKNOWN:
 		if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
@@ -1191,14 +1219,14 @@ static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
 	int  len, value;
 	int i;
 
-	if (rk8xx->variant != 0x8170) {
+	if ((rk8xx->variant != RK817_ID) && (rk8xx->variant != RK809_ID)) {
 		debug("%s: Not support pmic variant: rk%x\n",
 		      __func__, rk8xx->variant);
 		return -EINVAL;
 	}
 
 	battery->dev = dev;
-
+	battery->variant = rk8xx->variant;
 	/* Parse ocv table */
 	prop = dev_read_prop(dev, "ocv_table", &len);
 	if (!prop) {
@@ -1233,6 +1261,20 @@ static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	if (rk8xx->variant == RK809_ID) {
+		battery->bat_res_up  = dev_read_u32_default(dev, "bat_res_up", -1);
+		if (battery->bat_res_up < 0) {
+			printf("can't read bat_res_up\n");
+			return -EINVAL;
+		}
+
+		battery->bat_res_down  = dev_read_u32_default(dev, "bat_res_down", -1);
+		if (battery->bat_res_down < 0) {
+			printf("can't read bat_res_down\n");
+			return -EINVAL;
+		}
+	}
+
 	value = dev_read_u32_default(dev, "sample_res", -1);
 	if (battery->res_div < 0)
 		printf("read sample_res error\n");
@@ -1246,6 +1288,8 @@ static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
 	DBG("ocvsize: %d\n", battery->ocv_size);
 	DBG("battery->design_cap: %d\n", battery->design_cap);
 	DBG("battery->qmax: %d\n", battery->qmax);
+	DBG("battery->bat_res_up: %d\n", battery->bat_res_up);
+	DBG("battery->bat_res_down: %d\n", battery->bat_res_down);
 
 	return 0;
 }
@@ -1256,9 +1300,10 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 
 	value = rk817_bat_read(battery, GG_CON);
 	rk817_bat_write(battery, GG_CON, value | VOL_OUPUT_INSTANT_MODE);
-	value =  rk817_bat_read(battery, BAT_DISCHRG);
-	rk817_bat_write(battery, GG_CON, value & (~DIS_ILIM_EN));
-
+	if (battery->variant == RK817_ID) {
+		value =  rk817_bat_read(battery, BAT_DISCHRG);
+		rk817_bat_write(battery, GG_CON, value & (~DIS_ILIM_EN));
+	}
 	rk817_bat_gas_gaugle_enable(battery);
 	rk817_bat_init_voltage_kb(battery);
 	rk817_bat_calibration(battery);
@@ -1282,7 +1327,8 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	battery->dbg_pwr_rsoc = battery->rsoc;
 	battery->dbg_pwr_vol = battery->voltage_avg;
 
-	rk817_bat_charger_setting(battery, battery->chrg_type);
+	if (battery->variant == RK817_ID)
+		rk817_bat_charger_setting(battery, battery->chrg_type);
 
 	DBG("voltage_k = %d, voltage_b = %d\n",
 	    battery->voltage_k, battery->voltage_b);
@@ -1306,7 +1352,7 @@ static int rk817_fg_probe(struct udevice *dev)
 	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
 	struct rk817_battery_device *battery = dev_get_priv(dev);
 
-	if (priv->variant != 0x8170) {
+	if ((priv->variant != RK817_ID) && ((priv->variant != RK809_ID))) {
 		debug("Not support pmic variant: rk%x\n", priv->variant);
 		return -EINVAL;
 	}

commit 3e19306671294c0958598932362ba1f2d8f5fec2
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Mon Dec 24 11:24:39 2018 +0800

    cmd: memtester: add cpu data to io remap
    
    Change-Id: Ia9e2e6014c162cc929f5cbcb1559c91245c273bd
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/Makefile b/cmd/memtester/Makefile
index 4608e92fb0..ad7f391227 100644
--- a/cmd/memtester/Makefile
+++ b/cmd/memtester/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_CMD_MEMTESTER) += tests.o
-obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
\ No newline at end of file
+obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
+obj-$(CONFIG_CMD_MEMTESTER) += io_map.o
diff --git a/cmd/memtester/io_map.c b/cmd/memtester/io_map.c
new file mode 100644
index 0000000000..88b0d3b66a
--- /dev/null
+++ b/cmd/memtester/io_map.c
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the functions for the actual tests, called from the
+ * main routine in memtester.c.  See other comments in that file.
+ *
+ */
+#include <common.h>
+#include "io_map.h"
+
+#define IO_TYPE_1_1_16	0
+#define IO_TYPE_1_1_32	1
+#define IO_TYPE_1_2		2
+#define IO_TYPE_2		3
+
+static u32 io_type;
+
+/* len should be 16byte align */
+int data_cpu_2_io(void *p, u32 len)
+{
+	uchar *val = p;
+	uchar buf[16];
+	u32 i, j;
+
+	if ((len % sizeof(buf)) || !len)
+		return -1;
+
+	if (io_type == IO_TYPE_1_2) {
+		len /= sizeof(buf);
+		for (j = 0; j < len; j++) {
+			memset(buf, 0, sizeof(buf));
+			for (i = 0; i < sizeof(buf); i++)
+				buf[i] = val[(i % 4) * 4 + i / 4 + j * sizeof(buf)];
+			memcpy(&val[j * sizeof(buf)], buf, sizeof(buf));
+		}
+	} else if (io_type == IO_TYPE_1_1_32) {
+		len /= 8;
+		for (j = 0; j < len; j++) {
+			memset(buf, 0, sizeof(buf));
+			for (i = 0; i < 8; i++)
+				buf[i] = val[(i % 4) * 2 + i / 4 + j * 8];
+			memcpy(&val[j * 8], buf, 8);
+		}
+	}
+	/* IO_TYPE_2 and IO_TYPE_1_1_16 do nothing*/
+	return 0;
+}
+
+void data_cpu_2_io_init(void)
+{
+	u32 osreg = 0;
+	u32 bw;
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	io_type = IO_TYPE_1_1_16;
+#elif defined(CONFIG_ROCKCHIP_RK3228) ||	\
+	defined(CONFIG_ROCKCHIP_RV1108) ||	\
+	defined(CONFIG_ROCKCHIP_RK3368) ||	\
+	defined(CONFIG_ROCKCHIP_RK3366)
+	io_type = IO_TYPE_1_2;
+#elif defined(CONFIG_ROCKCHIP_RK3128)
+	osreg = 0x200081cc;
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+	osreg = 0xff73009c;
+#elif defined(CONFIG_ROCKCHIP_RK3188)
+	osreg = 0x20004048;
+#elif defined(CONFIG_ROCKCHIP_RK3328) || \
+	defined(CONFIG_ROCKCHIP_PX30) ||	\
+	defined(CONFIG_ROCKCHIP_RK1808)
+	io_type = IO_TYPE_2;
+#else
+	io_type = IO_TYPE_2;
+#endif
+
+	if (osreg) {
+		bw = (2 >> ((osreg >> 2) & 0x3));
+		if (bw == 2)
+			io_type = IO_TYPE_1_1_32;
+		else
+			io_type = IO_TYPE_1_1_16;
+	}
+}
+
diff --git a/cmd/memtester/io_map.h b/cmd/memtester/io_map.h
new file mode 100644
index 0000000000..abcb5d0660
--- /dev/null
+++ b/cmd/memtester/io_map.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _CMD_MEMTESTER_IO_MAP_H
+#define _CMD_MEMTESTER_IO_MAP_H
+
+int data_cpu_2_io(void *p, u32 len);
+void data_cpu_2_io_init(void);
+
+#endif /* _CMD_MEMTESTER_IO_MAP_H */
diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 1726b17f55..9c35acc16a 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -20,6 +20,7 @@
 #include "sizes.h"
 #include "types.h"
 #include "tests.h"
+#include "io_map.h"
 
 #define EXIT_FAIL_NONSTARTER    0x01
 #define EXIT_FAIL_ADDRESSLINES  0x02
@@ -148,6 +149,8 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 		}
 	}
 
+	data_cpu_2_io_init();
+
 	for (loop = 1; ((!loops) || loop <= loops); loop++) {
 		for (j = 0; j < 2; j++) {
 			if (!bufa[j])
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
index 6ecd047846..f50db4c19e 100644
--- a/cmd/memtester/tests.c
+++ b/cmd/memtester/tests.c
@@ -17,6 +17,7 @@
 #include "memtester.h"
 #include "sizes.h"
 #include "types.h"
+#include "io_map.h"
 
 union {
 	unsigned char bytes[UL_LEN / 8];
@@ -239,6 +240,7 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 q;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -246,12 +248,15 @@ int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? UL_ONEBITS : 0;
+		data[0] = data[2] = q;
+		data[1] = data[3] = ~q;
+		data_cpu_2_io(data, sizeof(data));
 		printf("setting %3u", j);
 		fflush(stdout);
 		p1 = (u32v *)bufa;
 		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+			*p1++ = *p2++ = data[i & 3];
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -269,6 +274,7 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p2 = bufb;
 	unsigned int j;
 	u32 q;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -276,12 +282,15 @@ int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 	for (j = 0; j < 64; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
+		data[0] = data[2] = q;
+		data[1] = data[3] = ~q;
+		data_cpu_2_io(data, sizeof(data));
 		printf("setting %3u", j);
 		fflush(stdout);
 		p1 = (u32v *)bufa;
 		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+			*p1++ = *p2++ = data[i & 3];
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -298,6 +307,7 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -308,8 +318,12 @@ int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		data[0] = data[2] = (u32)UL_BYTE(j);
+		data[1] = data[3] = (u32)UL_BYTE(j);
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (u32)UL_BYTE(j);
+			*p1++ = *p2++ = data[i & 3];
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -326,6 +340,7 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -336,12 +351,17 @@ int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		if (j < UL_LEN)
+			data[0] = ONE << j;
+		else
+			data[0] = ONE << (UL_LEN * 2 - j - 1);
+		data[1] = data[0];
+		data[2] = data[0];
+		data[3] = data[0];
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++) {
-			if (j < UL_LEN) {	/* Walk it up. */
-				*p1++ = *p2++ = ONE << j;
-			} else {	/* Walk it back down. */
-				*p1++ = *p2++ = ONE << (UL_LEN * 2 - j - 1);
-			}
+				*p1++ = *p2++ = data[i & 3];
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
@@ -359,6 +379,7 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -369,13 +390,17 @@ int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		if (j < UL_LEN)
+			data[0] = UL_ONEBITS ^ (ONE << j);
+		else
+			data[0] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
+		data[1] = data[0];
+		data[2] = data[0];
+		data[3] = data[0];
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++) {
-			if (j < UL_LEN) {	/* Walk it up. */
-				*p1++ = *p2++ = UL_ONEBITS ^ (ONE << j);
-			} else {	/* Walk it back down. */
-				*p1++ = *p2++ =
-				    UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
-			}
+				*p1++ = *p2++ = data[i & 3];
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
@@ -393,6 +418,7 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p1 = bufa;
 	u32v *p2 = bufb;
 	unsigned int j;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -403,22 +429,21 @@ int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
+		if (j < UL_LEN) {
+			data[0] = (ONE << j) | (ONE << (j + 2));
+			data[1] = UL_ONEBITS ^ ((ONE << j) | (ONE << (j + 2)));
+		} else {
+			data[0] = (ONE << (UL_LEN * 2 - 1 - j)) |
+				  (ONE << (UL_LEN * 2 + 1 - j));
+			data[1] = UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
+						| (ONE << (UL_LEN * 2 + 1 - j)));
+		}
+		data[2] = data[0];
+		data[3] = data[1];
+		data_cpu_2_io(data, sizeof(data));
+
 		for (i = 0; i < count; i++) {
-			if (j < UL_LEN) {	/* Walk it up. */
-				*p1++ = *p2++ = (i % 2 == 0)
-				    ? (ONE << j) | (ONE << (j + 2))
-				    : UL_ONEBITS ^ ((ONE << j)
-						    | (ONE << (j + 2)));
-			} else {	/* Walk it back down. */
-				*p1++ = *p2++ = (i % 2 == 0)
-				    ? (ONE << (UL_LEN * 2 - 1 - j)) | (ONE <<
-								       (UL_LEN *
-									2 + 1 -
-									j))
-				    : UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
-						    | (ONE <<
-						       (UL_LEN * 2 + 1 - j)));
-			}
+			*p1++ = *p2++ = data[i & 3];
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
@@ -437,6 +462,7 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 	u32v *p2 = bufb;
 	unsigned int j, k;
 	u32 q;
+	u32 data[4];
 	size_t i;
 
 	printf("           ");
@@ -448,10 +474,13 @@ int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 			q = ~q;
 			printf("setting %3u", k * 8 + j);
 			fflush(stdout);
+			data[0] = data[2] = q;
+			data[1] = data[3] = ~q;
+			data_cpu_2_io(data, sizeof(data));
 			p1 = (u32v *)bufa;
 			p2 = (u32v *)bufb;
 			for (i = 0; i < count; i++)
-				*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+				*p1++ = *p2++ = data[i & 3];
 			printf("\b\b\b\b\b\b\b\b\b\b\b");
 			printf("testing %3u", k * 8 + j);
 			fflush(stdout);

commit 614eb1970c6dca08122f469737584d386e62d7d7
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Dec 19 09:39:51 2018 +0800

    cmd: memtester: fix dram bandwidth to 32bit
    
    For all rk chip, bandwidth is 32bit. Fix to 32bit to improve test
    effect.
    
    Change-Id: I4b7f2f3722d6c820886bec46179badc73719496a
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
index 996cb9ba33..1726b17f55 100644
--- a/cmd/memtester/memtester.c
+++ b/cmd/memtester/memtester.c
@@ -62,7 +62,7 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	ul loop, i, j;
 	ul buf_start;
 	ul start_adr[2], length[2];
-	ulv * bufa[2], *bufb[2];
+	u32v * bufa[2], *bufb[2];
 	ul count[2];
 	ul bufsize = 0;
 	ul loops = 0;
@@ -117,14 +117,14 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 	if (!bufsize) {
 		/* test all memory */
 		for (i = 0; i < 2; i++) {
-			bufa[i] = (ulv *)start_adr[i];
-			bufb[i] = (ulv *)(start_adr[i] + length[i] / 2);
-			count[i] = length[i] / 2 / sizeof(ul);
+			bufa[i] = (u32v *)start_adr[i];
+			bufb[i] = (u32v *)(start_adr[i] + length[i] / 2);
+			count[i] = length[i] / 2 / sizeof(u32);
 		}
 	} else {
-		bufa[0] = (ulv *)buf_start;
-		bufb[0] = (ulv *)(buf_start + bufsize / 2);
-		count[0] = bufsize / 2 / sizeof(ul);
+		bufa[0] = (u32v *)buf_start;
+		bufb[0] = (u32v *)(buf_start + bufsize / 2);
+		count[0] = bufsize / 2 / sizeof(u32);
 		bufa[1] = 0;
 		if (start_adr[1]) {
 			if (buf_start < start_adr[0] ||
@@ -153,7 +153,7 @@ static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
 			if (!bufa[j])
 				continue;
 			printf("testing:0x%lx - 0x%lx\n", (ul)bufa[j],
-			       (ul)bufa[j] + count[j] * 2 * sizeof(ul));
+			       (ul)bufa[j] + count[j] * 2 * sizeof(u32));
 			printf("Loop %lu", loop);
 			if (loops)
 				printf("/%lu", loops);
diff --git a/cmd/memtester/sizes.h b/cmd/memtester/sizes.h
index 79eba1b699..8c86e11794 100644
--- a/cmd/memtester/sizes.h
+++ b/cmd/memtester/sizes.h
@@ -19,22 +19,11 @@
 
 #define rand32() ((unsigned int)rand() | ((unsigned int)rand() << 16))
 
-#ifndef CONFIG_ARM64
 #define rand_ul() rand32()
 #define UL_ONEBITS 0xffffffff
 #define UL_LEN 32
 #define CHECKERBOARD1 0x55555555
 #define CHECKERBOARD2 0xaaaaaaaa
 #define UL_BYTE(x) ((x | x << 8 | x << 16 | x << 24))
-#else
-#define rand64() (((ul)rand32()) << 32 | ((ul)rand32()))
-#define rand_ul() rand64()
-#define UL_ONEBITS 0xffffffffffffffffUL
-#define UL_LEN 64
-#define CHECKERBOARD1 0x5555555555555555
-#define CHECKERBOARD2 0xaaaaaaaaaaaaaaaa
-#define UL_BYTE(x) (((ul)x | (ul)x << 8 | (ul)x << 16 | (ul)x << 24 |	\
-		    (ul)x << 32 | (ul)x << 40 | (ul)x << 48 | (ul)x << 56))
-#endif
 
 #endif /* __MEMTESTER_SIZES_H */
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
index 327f983619..6ecd047846 100644
--- a/cmd/memtester/tests.c
+++ b/cmd/memtester/tests.c
@@ -20,12 +20,12 @@
 
 union {
 	unsigned char bytes[UL_LEN / 8];
-	ul val;
+	u32 val;
 } mword8;
 
 union {
 	unsigned short u16s[UL_LEN / 16];
-	ul val;
+	u32 val;
 } mword16;
 
 char progress[] = "-\\|/";
@@ -36,18 +36,18 @@ char progress[] = "-\\|/";
 #define fflush(n)
 
 /* Function definitions. */
-int compare_regions(ulv *bufa, ulv *bufb, size_t count)
+int compare_regions(u32v *bufa, u32v *bufb, size_t count)
 {
 	int r = 0;
 	size_t i;
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	off_t physaddr;
 
 	for (i = 0; i < count; i++, p1++, p2++) {
 		if (*p1 != *p2) {
 			if (use_phys) {
-				physaddr = physaddrbase + (i * sizeof(ul));
+				physaddr = physaddrbase + (i * sizeof(u32v));
 				fprintf(stderr,
 					"FAILURE: 0x%08lx != 0x%08lx at physical address "
 					"0x%08lx.\n",
@@ -56,7 +56,7 @@ int compare_regions(ulv *bufa, ulv *bufb, size_t count)
 				fprintf(stderr,
 					"FAILURE: 0x%08lx != 0x%08lx at offset 0x%08lx.\n",
 					(ul)*p1, (ul)*p2,
-					(ul)(i * sizeof(ul)));
+					(ul)(i * sizeof(u32v)));
 			}
 			/* printf("Skipping to next test..."); */
 			r = -1;
@@ -65,9 +65,9 @@ int compare_regions(ulv *bufa, ulv *bufb, size_t count)
 	return r;
 }
 
-int test_stuck_address(ulv *bufa, size_t count)
+int test_stuck_address(u32v *bufa, size_t count)
 {
-	ulv *p1 = bufa;
+	u32v *p1 = bufa;
 	unsigned int j;
 	size_t i;
 	off_t physaddr;
@@ -76,23 +76,23 @@ int test_stuck_address(ulv *bufa, size_t count)
 	fflush(stdout);
 	for (j = 0; j < 16; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
+		p1 = (u32v *)bufa;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
-			*p1 = ((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1);
+			*p1 = ((j + i) % 2) == 0 ? (u32)(ul)p1 : ~((u32)(ul)p1);
 			*p1++;
 		}
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
-		p1 = (ulv *)bufa;
+		p1 = (u32v *)bufa;
 		for (i = 0; i < count; i++, p1++) {
-			if (*p1 !=
-				(((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1))) {
+			if (*p1 != (((j + i) % 2) == 0 ?
+				    (u32)(ul)p1 : ~((u32)(ul)p1))) {
 				if (use_phys) {
 					physaddr =
-					    physaddrbase + (i * sizeof(ul));
+					    physaddrbase + (i * sizeof(u32v));
 					fprintf(stderr,
 						"FAILURE: possible bad address line at physical "
 						"address 0x%08lx.\n", physaddr);
@@ -100,7 +100,7 @@ int test_stuck_address(ulv *bufa, size_t count)
 					fprintf(stderr,
 						"FAILURE: possible bad address line at offset "
 						"0x%08lx.\n",
-						(ul)(i * sizeof(ul)));
+						(ul)(i * sizeof(u32v)));
 				}
 				printf("Skipping to next test...\n");
 				fflush(stdout);
@@ -113,10 +113,10 @@ int test_stuck_address(ulv *bufa, size_t count)
 	return 0;
 }
 
-int test_random_value(ulv *bufa, ulv *bufb, size_t count)
+int test_random_value(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	ul j = 0;
 	size_t i;
 
@@ -135,12 +135,12 @@ int test_random_value(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_xor_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_xor_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ ^= q;
@@ -149,12 +149,12 @@ int test_xor_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_sub_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_sub_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ -= q;
@@ -163,12 +163,12 @@ int test_sub_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_mul_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_mul_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ *= q;
@@ -177,12 +177,12 @@ int test_mul_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_div_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_div_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		if (!q)
@@ -193,12 +193,12 @@ int test_div_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_or_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_or_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ |= q;
@@ -207,12 +207,12 @@ int test_or_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_and_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_and_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++) {
 		*p1++ &= q;
@@ -221,24 +221,24 @@ int test_and_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_seqinc_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_seqinc_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	size_t i;
-	ul q = rand_ul();
+	u32 q = rand_ul();
 
 	for (i = 0; i < count; i++)
 		*p1++ = *p2++ = (i + q);
 	return compare_regions(bufa, bufb, count);
 }
 
-int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_solidbits_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
-	ul q;
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -248,8 +248,8 @@ int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
 		q = (j % 2) == 0 ? UL_ONEBITS : 0;
 		printf("setting %3u", j);
 		fflush(stdout);
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
 			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
@@ -263,12 +263,12 @@ int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_checkerboard_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
-	ul q;
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -278,8 +278,8 @@ int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
 		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
 		printf("setting %3u", j);
 		fflush(stdout);
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		for (i = 0; i < count; i++)
 			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
@@ -293,10 +293,10 @@ int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_blockseq_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -304,12 +304,12 @@ int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < 256; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++)
-			*p1++ = *p2++ = (ul)UL_BYTE(j);
+			*p1++ = *p2++ = (u32)UL_BYTE(j);
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
 		printf("testing %3u", j);
 		fflush(stdout);
@@ -321,10 +321,10 @@ int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_walkbits0_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -332,8 +332,8 @@ int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < UL_LEN * 2; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
@@ -354,10 +354,10 @@ int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_walkbits1_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -365,8 +365,8 @@ int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < UL_LEN * 2; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
@@ -388,10 +388,10 @@ int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_bitspread_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j;
 	size_t i;
 
@@ -399,8 +399,8 @@ int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
 	fflush(stdout);
 	for (j = 0; j < UL_LEN * 2; j++) {
 		printf("\b\b\b\b\b\b\b\b\b\b\b");
-		p1 = (ulv *)bufa;
-		p2 = (ulv *)bufb;
+		p1 = (u32v *)bufa;
+		p2 = (u32v *)bufb;
 		printf("setting %3u", j);
 		fflush(stdout);
 		for (i = 0; i < count; i++) {
@@ -431,12 +431,12 @@ int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
+int test_bitflip_comparison(u32v *bufa, u32v *bufb, size_t count)
 {
-	ulv *p1 = bufa;
-	ulv *p2 = bufb;
+	u32v *p1 = bufa;
+	u32v *p2 = bufb;
 	unsigned int j, k;
-	ul q;
+	u32 q;
 	size_t i;
 
 	printf("           ");
@@ -448,8 +448,8 @@ int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
 			q = ~q;
 			printf("setting %3u", k * 8 + j);
 			fflush(stdout);
-			p1 = (ulv *)bufa;
-			p2 = (ulv *)bufb;
+			p1 = (u32v *)bufa;
+			p2 = (u32v *)bufb;
 			for (i = 0; i < count; i++)
 				*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
 			printf("\b\b\b\b\b\b\b\b\b\b\b");
@@ -465,10 +465,10 @@ int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
 }
 
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+int test_8bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
 {
 	u8v *p1, *t;
-	ulv *p2;
+	u32v *p2;
 	int attempt;
 	unsigned int b, j = 0;
 	size_t i;
@@ -502,10 +502,10 @@ int test_8bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
 	return 0;
 }
 
-int test_16bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+int test_16bit_wide_random(u32v *bufa, u32v *bufb, size_t count)
 {
 	u16v *p1, *t;
-	ulv *p2;
+	u32v *p2;
 	int attempt;
 	unsigned int b, j = 0;
 	size_t i;
diff --git a/cmd/memtester/tests.h b/cmd/memtester/tests.h
index cf43f3f3b8..cfd096e560 100644
--- a/cmd/memtester/tests.h
+++ b/cmd/memtester/tests.h
@@ -17,40 +17,40 @@
 
 /* Function declaration. */
 
-int test_stuck_address(ulv *bufa, size_t count);
-int test_random_value(ulv *bufa,
-		      ulv *bufb, size_t count);
-int test_xor_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_sub_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_mul_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_div_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_or_comparison(ulv *bufa,
-		       ulv *bufb, size_t count);
-int test_and_comparison(ulv *bufa,
-			ulv *bufb, size_t count);
-int test_seqinc_comparison(ulv *bufa,
-			   ulv *bufb, size_t count);
-int test_solidbits_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_checkerboard_comparison(ulv *bufa,
-				 ulv *bufb, size_t count);
-int test_blockseq_comparison(ulv *bufa,
-			     ulv *bufb, size_t count);
-int test_walkbits0_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_walkbits1_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_bitspread_comparison(ulv *bufa,
-			      ulv *bufb, size_t count);
-int test_bitflip_comparison(ulv *bufa,
-			    ulv *bufb, size_t count);
+int test_stuck_address(u32v *bufa, size_t count);
+int test_random_value(u32v *bufa,
+		      u32v *bufb, size_t count);
+int test_xor_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_sub_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_mul_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_div_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_or_comparison(u32v *bufa,
+		       u32v *bufb, size_t count);
+int test_and_comparison(u32v *bufa,
+			u32v *bufb, size_t count);
+int test_seqinc_comparison(u32v *bufa,
+			   u32v *bufb, size_t count);
+int test_solidbits_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_checkerboard_comparison(u32v *bufa,
+				 u32v *bufb, size_t count);
+int test_blockseq_comparison(u32v *bufa,
+			     u32v *bufb, size_t count);
+int test_walkbits0_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_walkbits1_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_bitspread_comparison(u32v *bufa,
+			      u32v *bufb, size_t count);
+int test_bitflip_comparison(u32v *bufa,
+			    u32v *bufb, size_t count);
 #ifdef TEST_NARROW_WRITES
-int test_8bit_wide_random(ulv *bufa,
-			  ulv *bufb, size_t count);
-int test_16bit_wide_random(ulv *bufa,
-			   ulv *bufb, size_t count);
+int test_8bit_wide_random(u32v *bufa,
+			  u32v *bufb, size_t count);
+int test_16bit_wide_random(u32v *bufa,
+			   u32v *bufb, size_t count);
 #endif
diff --git a/cmd/memtester/types.h b/cmd/memtester/types.h
index e25864d26c..4442eb3c2e 100644
--- a/cmd/memtester/types.h
+++ b/cmd/memtester/types.h
@@ -17,13 +17,14 @@
 
 typedef unsigned long ul;
 typedef unsigned long long ull;
-typedef unsigned long volatile ulv;
+/* for all rk chip, dram bandwidth both 32bit */
+typedef unsigned int volatile u32v;
 typedef unsigned char volatile u8v;
 typedef unsigned short volatile u16v;
 
 struct test {
 	char *name;
-	int (*fp)(ulv *bufa, ulv *bufb, size_t count);
+	int (*fp)(u32v *bufa, u32v *bufb, size_t count);
 };
 
 #endif /* __MEMTESTER_TYPES_H */

commit 3decc73706b200f4f178828a378f4875402ef562
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Dec 18 14:29:58 2018 +0800

    cmd: ddr_tool: add ddr test tool code
    
    RK3328/RK3326/PX30: enable CONFIG_OF_LIVE, CONFIG_ROCKCHIP_DMC and
    CONFIG_CMD_DDR_TEST_TOOL.
    RK1808/RK3399pro npu: enable CONFIG_CMD_DDR_TEST_TOOL.
    When enable, it will create a 'ddr_test' command for user in U-Boot shell.
    
    Change-Id: Iaa286e461d53b1caa4bcc069d37a7aad16a3e5e3
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 23d8425cc1..11e1d8a79a 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1111,6 +1111,11 @@ config CMD_MEMTESTER
 	help
 	  This enables memtester for ddr.
 
+config CMD_DDR_TEST_TOOL
+	bool "Enable ddr test tool"
+	help
+	  This enable ddr test tool code.
+
 menu "Misc commands"
 
 config CMD_BMP
diff --git a/cmd/Makefile b/cmd/Makefile
index e6307041cb..8cb26cccd8 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -87,6 +87,7 @@ obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
 obj-$(CONFIG_CMD_MEMTESTER) += memtester/
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) += ddr_tool/
 obj-$(CONFIG_CMD_IO) += io.o
 obj-$(CONFIG_CMD_MFSL) += mfsl.o
 obj-$(CONFIG_CMD_MII) += mii.o
diff --git a/cmd/ddr_tool/Makefile b/cmd/ddr_tool/Makefile
new file mode 100644
index 0000000000..1fd808bbdd
--- /dev/null
+++ b/cmd/ddr_tool/Makefile
@@ -0,0 +1,20 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+# We don't want the bootrom-helper present in a full U-Boot build, as
+# this may have entered from ATF with the stack-pointer pointing to
+# inaccessible/protected memory (and the bootrom-helper assumes that
+# the stack-pointer is valid before switching to the U-Boot stack).
+ifdef CONFIG_ROCKCHIP_PX30
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_px30.o
+endif
+ifdef CONFIG_ROCKCHIP_RK3328
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_rk3328.o
+endif
+ifdef CONFIG_ROCKCHIP_RK1808
+obj-$(CONFIG_CMD_DDR_TEST_TOOL) = ddr_test_rk1808.o
+endif
+
diff --git a/cmd/ddr_tool/ddr_test_px30.S b/cmd/ddr_tool/ddr_test_px30.S
new file mode 100644
index 0000000000..985d7be5cb
--- /dev/null
+++ b/cmd/ddr_tool/ddr_test_px30.S
@@ -0,0 +1,11844 @@
+	.arch armv8-a+nosimd
+	.file	"ddr_test_code.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB256:
+	.file 1 "cmd/ddr_tool/ddr_tool.c"
+	.loc 1 147 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 1 149 0
+	mov	x1, 16959
+	movk	x1, 0xf, lsl 16
+	cmp	x0, x1
+	.loc 1 147 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 1 149 0
+	bhi	.L2
+	.loc 1 150 0
+	add	x1, x1, 1
+	mul	x0, x0, x1
+.LVL1:
+	.loc 1 151 0
+	cbz	x0, .L3
+.L2:
+	.loc 1 152 0
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL2:
+	.loc 1 153 0
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL3:
+.L3:
+	.loc 1 155 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL4:
+	mov	x19, x0
+.LVL5:
+	.loc 1 156 0
+	mov	x1, x0
+	adrp	x0, .LC1
+.LVL6:
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL7:
+	.loc 1 162 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+.LVL8:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE256:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB257:
+	.loc 1 165 0
+	.cfi_startproc
+.LVL9:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 169 0
+	add	x1, x29, 40
+	.loc 1 165 0
+	mov	w20, w0
+	.loc 1 169 0
+	adrp	x0, .LC2
+.LVL10:
+	add	x0, x0, :lo12:.LC2
+	bl	regulator_get_by_platname
+.LVL11:
+	.loc 1 170 0
+	cbz	w0, .L9
+	mov	w19, w0
+	.loc 1 171 0
+	adrp	x0, .LC3
+.LVL12:
+	add	x0, x0, :lo12:.LC3
+.LVL13:
+.L15:
+	.loc 1 179 0
+	bl	printf
+.LVL14:
+.L8:
+	.loc 1 181 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL15:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL16:
+.L9:
+	.cfi_restore_state
+	.loc 1 176 0
+	ldr	x0, [x29, 40]
+.LVL17:
+	mov	w1, w20
+	bl	regulator_set_value
+.LVL18:
+	mov	w19, w0
+.LVL19:
+	.loc 1 177 0
+	mov	x0, 100
+.LVL20:
+	bl	udelay
+.LVL21:
+	.loc 1 178 0
+	cbz	w19, .L8
+	.loc 1 179 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	b	.L15
+	.cfi_endproc
+.LFE257:
+	.size	set_vdd_logic, .-set_vdd_logic
+	.section	.text.random_test,"ax",@progbits
+	.align	2
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB274:
+	.file 2 "cmd/ddr_tool/random_test.c"
+	.loc 2 88 0
+	.cfi_startproc
+.LVL22:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB12:
+.LBB13:
+	.loc 2 18 0
+	mov	x2, x1
+.LBE13:
+.LBE12:
+	.loc 2 88 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+.LVL23:
+	stp	x23, x24, [sp, 48]
+.LBB18:
+.LBB14:
+	.loc 2 37 0
+	adrp	x21, .LC6
+.LBE14:
+.LBE18:
+	.loc 2 88 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	mov	x23, x1
+.LVL24:
+	stp	x19, x20, [sp, 16]
+.LBB19:
+.LBB15:
+	.loc 2 18 0
+	mov	w1, -2139062144
+.LVL25:
+.LBE15:
+.LBE19:
+	.loc 2 88 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB20:
+.LBB16:
+	.loc 2 23 0
+	adrp	x24, .LC5
+	.loc 2 18 0
+	bl	memset
+.LVL26:
+	.loc 2 23 0
+	add	x24, x24, :lo12:.LC5
+	.loc 2 37 0
+	add	x21, x21, :lo12:.LC6
+	.loc 2 24 0
+	lsr	x0, x23, 2
+	.loc 2 14 0
+	mov	w27, 0
+	.loc 2 20 0
+	mov	w25, 1077952576
+	.loc 2 19 0
+	mov	w20, -2139062144
+	.loc 2 22 0
+	mov	w28, 0
+	.loc 2 24 0
+	str	x0, [x29, 96]
+.LVL27:
+.L22:
+	.loc 2 23 0
+	mov	w1, w28
+	mov	x0, x24
+	bl	printf
+.LVL28:
+	.loc 2 24 0
+	mov	w1, 0
+.LVL29:
+.L17:
+	ldr	x2, [x29, 96]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L21
+.LVL30:
+.L20:
+	.loc 2 37 0
+	mov	x0, x21
+	.loc 2 22 0
+	add	w28, w28, 1
+.LVL31:
+	.loc 2 37 0
+	bl	printf
+.LVL32:
+	.loc 2 35 0
+	lsr	w25, w25, 1
+.LVL33:
+	.loc 2 36 0
+	lsr	w20, w20, 1
+.LVL34:
+	.loc 2 22 0
+	cmp	w28, 8
+	bne	.L22
+	mov	x19, -1
+	b	.L19
+.LVL35:
+.L21:
+	.loc 2 25 0
+	lsl	x0, x0, 2
+	add	x19, x22, x0
+	ldr	w2, [x22, x0]
+	str	w2, [x29, 108]
+	.loc 2 26 0
+	uxtw	x2, w2
+	cmp	w2, w20
+	beq	.L18
+.LVL36:
+	.loc 2 28 0
+	ldr	w27, [x19]
+	.loc 2 33 0
+	cmn	x19, #1
+	beq	.L20
+.LVL37:
+.L19:
+	.loc 2 39 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.LVL38:
+	.loc 2 40 0
+	cmn	x19, #1
+	beq	.L23
+	.loc 2 41 0
+	ldr	w2, [x29, 108]
+	adrp	x0, .LC8
+	mov	w4, w20
+	mov	w3, w27
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.LVL39:
+.L36:
+.LBE16:
+.LBE20:
+.LBB21:
+.LBB22:
+	.loc 2 82 0
+	mov	w0, -1
+.L16:
+.LBE22:
+.LBE21:
+	.loc 2 96 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL40:
+	ldp	x23, x24, [sp, 48]
+.LVL41:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL42:
+.L18:
+	.cfi_restore_state
+.LBB24:
+.LBB17:
+	.loc 2 31 0
+	str	w25, [x22, x0]
+	.loc 2 24 0
+	add	w1, w1, 1
+.LVL43:
+	b	.L17
+.LVL44:
+.L23:
+.LBE17:
+.LBE24:
+.LBB25:
+.LBB23:
+	.loc 2 58 0
+	adrp	x25, .LC9
+.LVL45:
+	.loc 2 76 0
+	adrp	x24, .LC10
+	.loc 2 66 0
+	lsr	x28, x23, 3
+.LVL46:
+	.loc 2 58 0
+	add	x25, x25, :lo12:.LC9
+	.loc 2 76 0
+	add	x24, x24, :lo12:.LC10
+	.loc 2 66 0
+	mov	x27, 0
+	mov	x19, 0
+.LVL47:
+.L30:
+	.loc 2 58 0
+	mov	x1, x19
+	mov	x0, x25
+	bl	printf
+.LVL48:
+	.loc 2 60 0
+	lsl	x20, x19, 8
+	lsl	x0, x19, 24
+	orr	x20, x20, x19, lsl 16
+	orr	x0, x0, x19, lsl 32
+	.loc 2 64 0
+	mov	x2, x23
+	.loc 2 60 0
+	orr	x20, x20, x0
+	lsl	x0, x19, 40
+	orr	x0, x0, x19, lsl 48
+	orr	x20, x20, x0
+	orr	x0, x19, x19, lsl 56
+	orr	x20, x20, x0
+.LVL49:
+	.loc 2 64 0
+	mov	x0, x22
+	mov	w1, w20
+	bl	memset
+.LVL50:
+	.loc 2 66 0
+	mov	x0, 0
+.LVL51:
+.L25:
+	cmp	x0, x28
+	bne	.L29
+.LVL52:
+.L28:
+	.loc 2 76 0
+	mov	x0, x24
+.LVL53:
+	.loc 2 57 0
+	add	x19, x19, 1
+.LVL54:
+	.loc 2 76 0
+	bl	printf
+.LVL55:
+	.loc 2 57 0
+	cmp	x19, 256
+	bne	.L30
+	mov	x21, -1
+	b	.L27
+.LVL56:
+.L29:
+	lsl	x1, x0, 3
+	add	x21, x1, x22
+	.loc 2 67 0
+	ldr	x26, [x1, x22]
+.LVL57:
+	.loc 2 68 0
+	cmp	x20, x26
+	beq	.L26
+.LVL58:
+	.loc 2 70 0
+	ldr	x27, [x21]
+.LVL59:
+	.loc 2 74 0
+	cmn	x21, #1
+	beq	.L28
+.LVL60:
+.L27:
+	.loc 2 78 0
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.LVL61:
+	.loc 2 84 0
+	mov	w0, 0
+	.loc 2 79 0
+	cmn	x21, #1
+	beq	.L16
+	.loc 2 80 0
+	mov	x4, x20
+	mov	x3, x27
+	mov	x2, x26
+	mov	x1, x21
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.LVL62:
+	b	.L36
+.LVL63:
+.L26:
+	.loc 2 66 0
+	add	x0, x0, 1
+.LVL64:
+	b	.L25
+.LBE23:
+.LBE25:
+	.cfi_endproc
+.LFE274:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
+	.align	2
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 1 104 0
+	.cfi_startproc
+.LVL65:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	w20, w0
+	stp	x23, x24, [sp, 48]
+	.loc 1 111 0
+	mov	w0, 16960
+.LVL66:
+	.loc 1 104 0
+	stp	x21, x22, [sp, 32]
+	.loc 1 111 0
+	movk	w0, 0xf, lsl 16
+	.loc 1 104 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	mov	x24, x2
+	str	x27, [sp, 80]
+	.cfi_offset 27, -16
+	.loc 1 111 0
+	cmp	w20, w0
+	bls	.L38
+	.loc 1 112 0
+	udiv	w20, w20, w0
+.LVL67:
+.L38:
+	.loc 1 113 0
+	cmp	w1, w0
+	bls	.L39
+	.loc 1 114 0
+	udiv	w1, w1, w0
+.LVL68:
+.L39:
+	.loc 1 116 0
+	cmp	w20, w1
+	bls	.L40
+	mov	w0, w20
+	mov	w20, w1
+.LVL69:
+	mov	w1, w0
+.LVL70:
+.L40:
+	.loc 1 125 0
+	mov	w25, 16960
+	.loc 1 126 0
+	adrp	x22, .LC13
+	.loc 1 129 0
+	adrp	x23, .LC14
+	.loc 1 121 0
+	sub	w19, w1, w20
+.LVL71:
+	.loc 1 126 0
+	add	x22, x22, :lo12:.LC13
+	.loc 1 129 0
+	add	x23, x23, :lo12:.LC14
+	.loc 1 123 0
+	mov	w21, 0
+	.loc 1 125 0
+	movk	w25, 0xf, lsl 16
+.LVL72:
+.L41:
+	.loc 1 123 0 discriminator 1
+	cmp	x24, x21, uxtw
+	bhi	.L45
+	.loc 1 123 0 is_stmt 0 discriminator 3
+	cbnz	x24, .L46
+.L45:
+	.loc 1 124 0 is_stmt 1
+	bl	rand
+.LVL73:
+	udiv	w1, w0, w19
+	msub	w0, w1, w19, w0
+.LVL74:
+	add	w0, w0, w20
+	.loc 1 125 0
+	mul	w0, w0, w25
+	and	x0, x0, 4294967232
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL75:
+	.loc 1 126 0
+	mov	w1, w21
+	mov	w2, w0
+	.loc 1 125 0
+	mov	x26, x0
+.LVL76:
+	.loc 1 126 0
+	mov	x0, x22
+.LVL77:
+	bl	printf
+.LVL78:
+	.loc 1 127 0
+	uxtw	x0, w26
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL79:
+	.loc 1 128 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL80:
+	.loc 1 129 0
+	mov	w1, w0
+	.loc 1 128 0
+	mov	x27, x0
+.LVL81:
+	.loc 1 129 0
+	mov	x0, x23
+.LVL82:
+	bl	printf
+.LVL83:
+	.loc 1 132 0
+	ldr	x0, [x18]
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
+.LVL84:
+	mov	w26, w0
+.LVL85:
+	.loc 1 133 0
+	cbz	w0, .L42
+	.loc 1 134 0
+	adrp	x0, .LC15
+.LVL86:
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.LVL87:
+.L37:
+	.loc 1 144 0
+	mov	w0, w26
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL88:
+	ldp	x21, x22, [sp, 32]
+.LVL89:
+	ldp	x23, x24, [sp, 48]
+.LVL90:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL91:
+.L42:
+	.cfi_restore_state
+	.loc 1 137 0
+	bl	ctrlc
+.LVL92:
+	cbz	w0, .L44
+.LVL93:
+.L46:
+	.loc 1 123 0
+	mov	w26, 0
+	b	.L37
+.LVL94:
+.L44:
+	.loc 1 123 0 is_stmt 0 discriminator 2
+	add	w21, w21, 1
+.LVL95:
+	b	.L41
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.cpu_2_io,"ax",@progbits
+	.align	2
+	.global	cpu_2_io
+	.type	cpu_2_io, %function
+cpu_2_io:
+.LFB275:
+	.file 3 "cmd/ddr_tool/tool_common.c"
+	.loc 3 11 0 is_stmt 1
+	.cfi_startproc
+.LVL96:
+	ret
+	.cfi_endproc
+.LFE275:
+	.size	cpu_2_io, .-cpu_2_io
+	.section	.text.write_buf_to_ddr,"ax",@progbits
+	.align	2
+	.global	write_buf_to_ddr
+	.type	write_buf_to_ddr, %function
+write_buf_to_ddr:
+.LFB276:
+	.loc 3 29 0
+	.cfi_startproc
+.LVL97:
+	.loc 3 37 0
+	lsr	w1, w1, 3
+.LVL98:
+	.loc 3 39 0
+	lsr	x3, x3, 3
+.LVL99:
+	.loc 3 37 0
+	sub	w1, w1, #1
+.LVL100:
+	.loc 3 39 0
+	mov	w4, 0
+	mov	w5, 0
+.LVL101:
+.L53:
+	.loc 3 39 0 is_stmt 0 discriminator 1
+	uxtw	x6, w5
+	cmp	x6, x3
+	bcc	.L54
+	.loc 3 44 0 is_stmt 1
+	ret
+.L54:
+	.loc 3 40 0 discriminator 3
+	ldr	x7, [x0, w4, uxtw 3]
+	.loc 3 41 0 discriminator 3
+	add	w4, w4, 1
+.LVL102:
+	.loc 3 40 0 discriminator 3
+	str	x7, [x2, x6, lsl 3]
+	.loc 3 42 0 discriminator 3
+	and	w4, w1, w4
+.LVL103:
+	.loc 3 39 0 discriminator 3
+	add	w5, w5, 1
+.LVL104:
+	b	.L53
+	.cfi_endproc
+.LFE276:
+	.size	write_buf_to_ddr, .-write_buf_to_ddr
+	.section	.text.cmp_buf_data,"ax",@progbits
+	.align	2
+	.global	cmp_buf_data
+	.type	cmp_buf_data, %function
+cmp_buf_data:
+.LFB277:
+	.loc 3 48 0
+	.cfi_startproc
+.LVL105:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 60 0
+	lsr	w1, w1, 3
+.LVL106:
+	.loc 3 48 0
+	mov	w10, w4
+	.loc 3 60 0
+	sub	w1, w1, #1
+	.loc 3 48 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 62 0
+	lsr	x3, x3, 3
+.LVL107:
+	.loc 3 48 0
+	mov	x8, x2
+.LVL108:
+	.loc 3 62 0
+	mov	w6, 0
+	.loc 3 56 0
+	mov	x2, 0
+.LVL109:
+	.loc 3 62 0
+	mov	w7, 0
+	.loc 3 48 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LVL110:
+.L56:
+	.loc 3 62 0 discriminator 1
+	uxtw	x5, w7
+	cmp	x5, x3
+	bcc	.L59
+	.loc 3 61 0
+	mov	x19, 0
+	.loc 3 54 0
+	mov	x3, 0
+	.loc 3 55 0
+	mov	x4, 0
+	b	.L58
+.L59:
+	.loc 3 63 0
+	lsl	x5, x5, 3
+	.loc 3 64 0
+	ldr	x4, [x0, w6, uxtw 3]
+	.loc 3 63 0
+	add	x19, x8, x5
+	ldr	x2, [x8, x5]
+.LVL111:
+	.loc 3 64 0
+	cmp	x2, x4
+	beq	.L57
+	.loc 3 65 0
+	ldr	x3, [x19]
+.LVL112:
+.L58:
+	.loc 3 73 0
+	cmp	x19, 0
+	ccmp	w10, 0, 4, ne
+	beq	.L55
+	.loc 3 74 0
+	adrp	x0, .LC16
+.LVL113:
+	mov	x1, x19
+.LVL114:
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.LVL115:
+.L55:
+	.loc 3 78 0
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+.LVL116:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL117:
+.L57:
+	.cfi_restore_state
+	.loc 3 70 0 discriminator 2
+	add	w6, w6, 1
+.LVL118:
+	.loc 3 62 0 discriminator 2
+	add	w7, w7, 1
+.LVL119:
+	.loc 3 71 0 discriminator 2
+	and	w6, w1, w6
+.LVL120:
+	b	.L56
+	.cfi_endproc
+.LFE277:
+	.size	cmp_buf_data, .-cmp_buf_data
+	.section	.text.crosstalk,"ax",@progbits
+	.align	2
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 4 "cmd/ddr_tool/crosstalk.c"
+	.loc 4 46 0
+	.cfi_startproc
+.LVL121:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.loc 4 71 0
+	add	x20, x29, 112
+	.loc 4 46 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	.loc 4 63 0
+	adrp	x0, .LC17
+.LVL122:
+	.loc 4 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	mov	x23, x1
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.loc 4 63 0
+	add	x0, x0, :lo12:.LC17
+	.loc 4 68 0
+	adrp	x24, .LC19
+	.loc 4 63 0
+	bl	printf
+.LVL123:
+	.loc 4 68 0
+	add	x27, x24, :lo12:.LC19
+	.loc 4 66 0
+	adrp	x21, .LC18
+	.loc 4 64 0
+	mov	w19, 0
+	.loc 4 66 0
+	add	x0, x21, :lo12:.LC18
+	str	x0, [x29, 104]
+.LVL124:
+.L70:
+	ldr	x0, [x29, 104]
+	.loc 4 71 0
+	mov	w25, 1
+	.loc 4 66 0
+	mov	w1, w19
+	.loc 4 71 0
+	lsl	w25, w25, w19
+	.loc 4 65 0
+	mov	w28, -1
+	.loc 4 67 0
+	mov	w26, 0
+	.loc 4 66 0
+	bl	printf
+.LVL125:
+.L69:
+	.loc 4 68 0
+	mov	w1, w26
+	mov	x0, x27
+	.loc 4 69 0
+	mvn	w28, w28
+.LVL126:
+	.loc 4 68 0
+	bl	printf
+.LVL127:
+	.loc 4 69 0
+	mov	x8, 0
+.LVL128:
+.L66:
+	.loc 4 71 0 discriminator 3
+	eor	w0, w25, w28
+	str	w0, [x8, x20]
+	add	x8, x8, 4
+	.loc 4 72 0 discriminator 3
+	mvn	w28, w28
+.LVL129:
+	.loc 4 70 0 discriminator 3
+	cmp	x8, 32
+	bne	.L66
+	.loc 4 77 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL130:
+	.loc 4 78 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL131:
+	cbz	x0, .L67
+.LVL132:
+.L75:
+	.loc 4 80 0
+	mov	w0, -1
+.L65:
+	.loc 4 115 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL133:
+	ldp	x23, x24, [sp, 48]
+.LVL134:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL135:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL136:
+.L67:
+	.cfi_restore_state
+	.loc 4 67 0 discriminator 2
+	add	w26, w26, 1
+.LVL137:
+	cmp	w26, 2
+	bne	.L69
+	.loc 4 64 0 discriminator 2
+	add	w19, w19, 1
+.LVL138:
+	cmp	w19, 32
+	bne	.L70
+	.loc 4 87 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+.LVL139:
+	.loc 4 88 0
+	mov	x0, 128
+	bl	malloc
+.LVL140:
+	mov	x20, x0
+.LVL141:
+	.loc 4 89 0
+	cbnz	x0, .L71
+	.loc 4 90 0
+	adrp	x0, .LC21
+.LVL142:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+.LVL143:
+.L71:
+	adrp	x25, .LANCHOR0
+	.loc 4 93 0
+	add	x26, x21, :lo12:.LC18
+.LVL144:
+	.loc 4 95 0
+	add	x24, x24, :lo12:.LC19
+	.loc 4 100 0
+	add	x25, x25, :lo12:.LANCHOR0
+	.loc 4 69 0
+	mov	w19, 0
+.LVL145:
+.L78:
+	.loc 4 94 0
+	mov	w21, 0
+	.loc 4 98 0
+	mov	w27, 1
+	.loc 4 93 0
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+.LVL146:
+.L77:
+	.loc 4 95 0
+	mov	w1, w21
+	mov	x0, x24
+	bl	printf
+.LVL147:
+	.loc 4 98 0
+	lsl	w1, w27, w21
+	mov	x8, 0
+.LVL148:
+.L74:
+	ldr	w0, [x8, x25]
+	.loc 4 97 0
+	cbz	w19, .L72
+	.loc 4 98 0
+	eor	w0, w0, w1
+.L72:
+	.loc 4 100 0
+	str	w0, [x20, x8]
+	add	x8, x8, 4
+	.loc 4 96 0
+	cmp	x8, 128
+	bne	.L74
+	.loc 4 105 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL149:
+	.loc 4 107 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL150:
+	cbnz	x0, .L75
+	.loc 4 110 0
+	cbz	w19, .L76
+	.loc 4 94 0 discriminator 2
+	add	w21, w21, 1
+.LVL151:
+	cmp	w21, 32
+	bne	.L77
+.L76:
+	.loc 4 92 0 discriminator 2
+	add	w19, w19, 1
+.LVL152:
+	cmp	w19, 2
+	bne	.L78
+	.loc 4 114 0
+	mov	w0, 0
+	b	.L65
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.diagonalscan,"ax",@progbits
+	.align	2
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB271:
+	.file 5 "cmd/ddr_tool/diagonalscan.c"
+	.loc 5 49 0
+	.cfi_startproc
+.LVL153:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 55 0
+	mov	x2, 32
+	.loc 5 49 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x1
+	.loc 5 55 0
+	adrp	x1, .LANCHOR1
+.LVL154:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 5 49 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	.loc 5 55 0
+	add	x0, x29, 80
+.LVL155:
+	.loc 5 49 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 55 0
+	bl	memcpy
+.LVL156:
+	.loc 5 60 0
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	bl	printf
+.LVL157:
+.LBB29:
+.LBB30:
+.LBB31:
+	.loc 5 19 0
+	mov	x0, 520
+	movk	x0, 0xff01, lsl 16
+	ldr	w20, [x0]
+.LVL158:
+#APP
+// 19 "cmd/ddr_tool/diagonalscan.c" 1
+	dmb sy
+// 0 "" 2
+.LVL159:
+#NO_APP
+.LBE31:
+.LBE30:
+.LBE29:
+	.loc 5 75 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x23
+	bl	memcpy
+.LVL160:
+.LBB34:
+.LBB32:
+	.loc 5 40 0
+	ubfx	x0, x20, 9, 2
+	.loc 5 41 0
+	ubfx	x20, x20, 2, 2
+.LVL161:
+	.loc 5 40 0
+	add	w0, w0, 9
+	.loc 5 41 0
+	mov	w1, 2
+	asr	w20, w1, w20
+.LBE32:
+.LBE34:
+	.loc 5 76 0
+	lsr	x24, x19, 1
+.LBB35:
+.LBB33:
+	.loc 5 43 0
+	add	w0, w0, w20
+	sub	x19, x19, #32
+.LVL162:
+	mov	w25, 1
+	add	x19, x19, x23
+.LVL163:
+	lsl	w25, w25, w0
+.LBE33:
+.LBE35:
+	.loc 5 76 0
+	mov	w21, 0
+	mov	x20, 0
+.LVL164:
+.L90:
+	.loc 5 76 0 is_stmt 0 discriminator 1
+	cmp	x20, x24
+	bcc	.L94
+	mov	x0, 0
+	b	.L91
+.L94:
+	.loc 5 77 0 is_stmt 1
+	uxtw	x22, w21
+	mov	x2, 32
+	sub	x26, x19, x22
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
+.LVL165:
+	.loc 5 80 0
+	add	x2, x20, x23
+	.loc 5 79 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x22
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
+.LVL166:
+	.loc 5 81 0
+	cbnz	x0, .L91
+	.loc 5 84 0
+	add	x22, x22, 40
+	add	x20, x20, x25
+.LVL167:
+	cmp	x25, x22
+	add	w21, w21, 8
+.LVL168:
+	csel	w21, w21, wzr, cs
+.LVL169:
+	.loc 5 86 0
+	cmp	x24, x20
+	bls	.L93
+	.loc 5 87 0
+	add	x0, x23, x20
+.LVL170:
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
+.LVL171:
+.L93:
+	.loc 5 89 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x19, x19, x25
+	bl	cmp_buf_data
+.LVL172:
+	.loc 5 92 0
+	cbz	x0, .L90
+.LVL173:
+.L91:
+	.loc 5 100 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL174:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE271:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB258:
+	.loc 1 190 0
+	.cfi_startproc
+.LVL175:
+	stp	x29, x30, [sp, -240]!
+	.cfi_def_cfa_offset 240
+	.cfi_offset 29, -240
+	.cfi_offset 30, -232
+.LBB40:
+.LBB41:
+	.loc 1 50 0
+	mov	x0, 0
+.LVL176:
+.LBE41:
+.LBE40:
+	.loc 1 190 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -208
+	.cfi_offset 22, -200
+	mov	w22, w2
+	stp	x19, x20, [sp, 16]
+.LBB48:
+.LBB42:
+	.loc 1 50 0
+	mov	x2, x18
+.LVL177:
+.LBE42:
+.LBE48:
+	.loc 1 190 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+.LBB49:
+.LBB43:
+	.loc 1 52 0
+	add	x20, x29, 136
+.LBE43:
+.LBE49:
+	.loc 1 190 0
+	mov	x25, x3
+.LBB50:
+.LBB44:
+	.loc 1 53 0
+	add	x21, x29, 168
+.LBE44:
+.LBE50:
+	.loc 1 190 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
+.LBB51:
+.LBB45:
+	.loc 1 47 0
+	mov	w24, 0
+.LBE45:
+.LBE51:
+	.loc 1 190 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -160
+	.cfi_offset 28, -152
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 200]
+	stp	xzr, xzr, [x29, 216]
+	str	xzr, [x29, 232]
+.LVL178:
+.L99:
+.LBB52:
+.LBB46:
+	.loc 1 50 0
+	ldr	x1, [x2]
+	ubfiz	x3, x0, 4, 32
+	.loc 1 52 0
+	str	xzr, [x20, x0, lsl 3]
+	.loc 1 50 0
+	add	x1, x1, x3
+	.loc 1 53 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 1 50 0
+	ldr	x1, [x1, 136]
+	cmp	x1, 0
+	csinc	w24, w24, w0, eq
+.LVL179:
+	add	x0, x0, 1
+.LVL180:
+	.loc 1 49 0
+	cmp	x0, 4
+	bne	.L99
+	mov	x0, 0
+.L100:
+.LVL181:
+	.loc 1 56 0
+	cmp	w0, w24
+	bcc	.L101
+	.loc 1 61 0
+	sub	w1, w24, #1
+	ldr	x0, [x2, 128]
+.LVL182:
+	lsl	x1, x1, 3
+	.loc 1 67 0
+	adrp	x26, .LC25
+	.loc 1 61 0
+	sub	x0, x0, #1048576
+	.loc 1 64 0
+	mov	x23, 0
+	.loc 1 67 0
+	add	x26, x26, :lo12:.LC25
+	.loc 1 61 0
+	ldr	x2, [x20, x1]
+	sub	x0, x0, x2
+	.loc 1 62 0
+	and	x0, x0, -4096
+	.loc 1 61 0
+	str	x0, [x21, x1]
+	.loc 1 63 0
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+.LVL183:
+	.loc 1 64 0
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.LVL184:
+.L102:
+	.loc 1 65 0
+	cmp	w24, w23
+	bhi	.L104
+.LVL185:
+.LBE46:
+.LBE52:
+	.loc 1 205 0
+	cmp	w22, 1
+	ble	.L214
+	.loc 1 209 0
+	adrp	x0, .LANCHOR2
+	add	x26, x0, :lo12:.LANCHOR2
+	mov	x24, 0
+	str	x0, [x29, 120]
+.L107:
+	ldr	x1, [x26, x24, lsl 3]
+	mov	w23, w24
+.LVL186:
+	ldr	x0, [x25, 8]
+	bl	strcasecmp
+.LVL187:
+	cbz	w0, .L106
+.LVL188:
+	add	x24, x24, 1
+	.loc 1 208 0 discriminator 2
+	cmp	x24, 7
+	bne	.L107
+	.loc 1 216 0
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	b	.L215
+.LVL189:
+.L101:
+.LBB53:
+.LBB47:
+	.loc 1 57 0
+	ubfiz	x1, x0, 4, 32
+	ldr	x3, [x2]
+	add	x1, x1, 128
+	add	x3, x3, x1
+	ldr	x3, [x3, 8]
+	str	x3, [x20, x0, lsl 3]
+	.loc 1 58 0
+	ldr	x3, [x2]
+	add	x1, x3, x1
+	ldr	x1, [x1, 16]
+	str	x1, [x21, x0, lsl 3]
+.LVL190:
+	add	x0, x0, 1
+.LVL191:
+	b	.L100
+.LVL192:
+.L104:
+	.loc 1 66 0
+	ldr	x1, [x20, x23, lsl 3]
+	cbz	x1, .L103
+	.loc 1 67 0
+	ldr	x3, [x21, x23, lsl 3]
+	mov	x0, x26
+	add	x2, x1, x3
+	bl	printf
+.LVL193:
+.L103:
+	add	x23, x23, 1
+.LVL194:
+	b	.L102
+.LVL195:
+.L150:
+.LBE47:
+.LBE53:
+	.loc 1 221 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+.LVL196:
+.L215:
+	.loc 1 216 0
+	bl	printf
+.LVL197:
+.L214:
+	.loc 1 217 0
+	mov	w22, -1
+	b	.L97
+.LVL198:
+.L110:
+	.loc 1 226 0
+	add	x0, x25, x26
+	add	x1, x29, 200
+	add	x2, x1, x26
+	mov	w1, 0
+	add	x26, x26, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
+.LVL199:
+	tbz	w0, #31, .L109
+	.loc 1 227 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L215
+.LVL200:
+.L111:
+	.loc 1 247 0
+	cbnz	w23, .L112
+	.loc 1 249 0
+	ldr	x0, [x29, 208]
+.LVL201:
+	cbz	x0, .L113
+	.loc 1 250 0
+	bl	set_vdd_logic
+.LVL202:
+.L113:
+	.loc 1 251 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL203:
+.L114:
+	.loc 1 384 0
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	bl	printf
+.LVL204:
+	b	.L97
+.LVL205:
+.L112:
+	.loc 1 252 0
+	cmp	w23, 1
+	bne	.L115
+	.loc 1 254 0
+	ldr	x0, [x29, 224]
+.LVL206:
+	cbz	x0, .L116
+	.loc 1 255 0
+	bl	set_vdd_logic
+.LVL207:
+.L116:
+	.loc 1 256 0
+	ldr	w0, [x29, 200]
+	ldr	w1, [x29, 208]
+	ldr	x2, [x29, 216]
+	bl	scan_freq
+.LVL208:
+	b	.L114
+.LVL209:
+.L115:
+	.loc 1 257 0
+	sub	w24, w24, #5
+	cmp	w24, 1
+	bls	.L117
+.LVL210:
+.LBB54:
+.LBB55:
+	.loc 1 79 0
+	ldr	x0, [x29, 144]
+.LVL211:
+	.loc 1 82 0
+	ldr	x3, [x29, 224]
+	.loc 1 79 0
+	cmp	x0, 0
+	ldr	x0, [x29, 152]
+	ldr	x1, [x29, 160]
+	cset	w24, ne
+	.loc 1 80 0
+	cmp	x0, 0
+	mov	w0, 3
+	csinc	w0, w0, w24, ne
+.LVL212:
+	cmp	x1, 0
+	mov	w1, 4
+	csel	w0, w0, w1, eq
+.LVL213:
+	.loc 1 82 0
+	cbnz	x3, .L209
+	.loc 1 83 0
+	mov	w24, w0
+.LVL214:
+.L134:
+.LBE55:
+.LBE54:
+	.loc 1 342 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL215:
+	.loc 1 344 0
+	ldr	x0, [x29, 232]
+	cbz	x0, .L140
+	.loc 1 345 0
+	bl	set_vdd_logic
+.LVL216:
+.L140:
+	.loc 1 349 0
+	adrp	x26, .LC34
+	mov	w25, 0
+.LVL217:
+	add	x26, x26, :lo12:.LC34
+	b	.L148
+.LVL218:
+.L117:
+	.loc 1 259 0
+	ldr	x0, [x29, 224]
+.LVL219:
+	cbz	x0, .L123
+	.loc 1 260 0
+	bl	set_vdd_logic
+.LVL220:
+.L123:
+	.loc 1 261 0
+	cmp	w23, 5
+	bne	.L155
+	.loc 1 262 0
+	ldr	x1, [x29, 168]
+	mov	x0, 65535
+	movk	x0, 0x9f, lsl 16
+	cmp	x1, x0
+	bhi	.L125
+	.loc 1 263 0
+	lsr	x2, x1, 20
+	adrp	x0, .LC30
+	mov	w1, 10
+	add	x0, x0, :lo12:.LC30
+	bl	printf
+.LVL221:
+.L211:
+	.loc 1 272 0
+	mov	w27, 60
+.LVL222:
+.L124:
+	.loc 1 280 0
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	.loc 1 284 0
+	adrp	x28, .LC32
+	.loc 1 280 0
+	str	x0, [x29, 112]
+	.loc 1 277 0
+	mov	w26, 0
+	.loc 1 284 0
+	add	x0, x28, :lo12:.LC32
+	str	x0, [x29, 104]
+.LVL223:
+.L126:
+	.loc 1 278 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L132
+	.loc 1 278 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bls	.L114
+.L132:
+	.loc 1 280 0 is_stmt 1
+	ldr	x0, [x29, 112]
+	.loc 1 279 0
+	add	w26, w26, 1
+.LVL224:
+	.loc 1 280 0
+	mov	w1, w26
+	mov	x25, 0
+	bl	printf
+.LVL225:
+.L130:
+	.loc 1 282 0
+	ldr	x23, [x20, x25, lsl 3]
+	cbz	x23, .L127
+	.loc 1 284 0
+	ldr	x0, [x29, 104]
+	mov	x2, x23
+	ldr	x24, [x21, x25, lsl 3]
+	mov	w1, w25
+	mov	x3, x24
+	bl	printf
+.LVL226:
+	.loc 1 286 0
+	ldr	x0, [x29, 208]
+	bl	set_ddr_freq
+.LVL227:
+	.loc 1 287 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL228:
+	mov	w28, w0
+.LVL229:
+	.loc 1 289 0
+	cbnz	w0, .L156
+	.loc 1 290 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL230:
+	bl	crosstalk
+.LVL231:
+	mov	w28, w0
+.LVL232:
+	.loc 1 294 0
+	cbnz	w0, .L157
+	.loc 1 295 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL233:
+	bl	diagonalscan
+.LVL234:
+	mov	w28, w0
+.LVL235:
+	.loc 1 299 0
+	cbnz	w0, .L158
+	.loc 1 300 0
+	ldr	w0, [x29, 200]
+.LVL236:
+	and	x2, x27, 1020
+	ldr	w1, [x29, 208]
+	.loc 1 303 0
+	mov	w19, 1
+	.loc 1 300 0
+	bl	scan_freq
+.LVL237:
+	mov	w28, w0
+.LVL238:
+.L128:
+	.loc 1 305 0
+	ldr	x0, [x29, 200]
+.LVL239:
+	bl	set_ddr_freq
+.LVL240:
+	.loc 1 306 0
+	cbnz	w28, .L159
+	.loc 1 307 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL241:
+	mov	w2, w0
+.LVL242:
+	.loc 1 311 0
+	cbnz	w0, .L160
+	str	w2, [x29, 100]
+	.loc 1 312 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL243:
+	bl	crosstalk
+.LVL244:
+	.loc 1 316 0
+	ldr	w2, [x29, 100]
+	.loc 1 312 0
+	mov	w19, w0
+.LVL245:
+	.loc 1 316 0
+	cbnz	w0, .L161
+	.loc 1 317 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL246:
+	bl	diagonalscan
+.LVL247:
+	mov	w28, w0
+.LVL248:
+	.loc 1 322 0
+	cbnz	w0, .L162
+	.loc 1 324 0
+	bl	ctrlc
+.LVL249:
+	cbnz	w0, .L163
+	.loc 1 319 0
+	mov	w19, 4
+.LVL250:
+.L127:
+	add	x25, x25, 1
+.LVL251:
+	.loc 1 281 0 discriminator 2
+	cmp	x25, 4
+	bne	.L130
+	mov	w2, 0
+	mov	w28, 0
+.LVL252:
+.L129:
+	.loc 1 329 0
+	orr	w2, w28, w2
+.LVL253:
+	cbz	w2, .L126
+.LVL254:
+.L131:
+	.loc 1 381 0
+	cbz	w28, .L114
+	.loc 1 382 0
+	ldr	x0, [x29, 120]
+	add	x0, x0, :lo12:.LANCHOR2
+	ldr	x1, [x0, w19, sxtw 3]
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
+	bl	printf
+.LVL255:
+	b	.L97
+.LVL256:
+.L125:
+	.loc 1 266 0
+	mov	x0, 10485760
+	.loc 1 268 0
+	stp	xzr, xzr, [x29, 144]
+	.loc 1 266 0
+	stp	xzr, x0, [x29, 160]
+.LVL257:
+	.loc 1 269 0
+	stp	xzr, xzr, [x29, 176]
+.LVL258:
+	str	xzr, [x29, 192]
+	b	.L211
+.LVL259:
+.L155:
+	.loc 1 274 0
+	mov	w27, 1000
+	b	.L124
+.LVL260:
+.L156:
+	.loc 1 288 0
+	mov	w19, 2
+	b	.L128
+.LVL261:
+.L157:
+	.loc 1 292 0
+	mov	w19, 3
+	b	.L128
+.LVL262:
+.L158:
+	.loc 1 297 0
+	mov	w19, 4
+	b	.L128
+.LVL263:
+.L159:
+	mov	w2, 0
+	b	.L129
+.LVL264:
+.L160:
+	.loc 1 307 0
+	mov	w28, w0
+	mov	w2, 0
+	.loc 1 309 0
+	mov	w19, 2
+	b	.L129
+.LVL265:
+.L161:
+	.loc 1 312 0
+	mov	w28, w0
+	.loc 1 314 0
+	mov	w19, 3
+	b	.L129
+.LVL266:
+.L162:
+	mov	w2, w19
+.LVL267:
+.L212:
+	.loc 1 319 0
+	mov	w19, 4
+	b	.L129
+.L163:
+	.loc 1 325 0
+	mov	w2, -1
+	b	.L212
+.LVL268:
+.L209:
+.LBB58:
+.LBB56:
+	.loc 1 86 0
+	ldr	x4, [x29, 216]
+	.loc 1 87 0
+	mov	x1, 0
+	mov	w24, 0
+	.loc 1 88 0
+	mov	w6, 1
+	.loc 1 87 0
+	add	x5, x3, x4
+.LVL269:
+.L136:
+	.loc 1 86 0
+	ldr	x2, [x20, x1, lsl 3]
+	cmp	x4, x2
+	bcc	.L135
+	.loc 1 87 0
+	ldr	x7, [x21, x1, lsl 3]
+	add	x2, x2, x7
+	.loc 1 88 0
+	cmp	x5, x2
+	csel	w24, w24, w6, hi
+.LVL270:
+.L135:
+	add	x1, x1, 1
+.LVL271:
+	.loc 1 85 0
+	cmp	w0, w1
+	bhi	.L136
+	.loc 1 89 0
+	cbnz	w24, .L137
+	.loc 1 90 0
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.LVL272:
+.L138:
+.LBE56:
+.LBE58:
+	.loc 1 339 0
+	cbnz	w24, .L134
+	.loc 1 340 0
+	mov	w22, 1
+.LVL273:
+	b	.L97
+.LVL274:
+.L137:
+.LBB59:
+.LBB57:
+	.loc 1 92 0
+	str	x4, [x29, 136]
+	.loc 1 94 0
+	cmp	w0, 1
+	.loc 1 93 0
+	str	x3, [x29, 168]
+.LVL275:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 144]
+	.loc 1 94 0
+	cmp	w0, 2
+	.loc 1 96 0
+	str	xzr, [x29, 176]
+.LVL276:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 152]
+	.loc 1 94 0
+	cmp	w0, 4
+	.loc 1 96 0
+	str	xzr, [x29, 184]
+.LVL277:
+	.loc 1 94 0
+	bne	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 160]
+	.loc 1 96 0
+	str	xzr, [x29, 192]
+.LVL278:
+	b	.L138
+.LVL279:
+.L149:
+.LBE57:
+.LBE59:
+	.loc 1 350 0
+	mov	x27, 0
+	.loc 1 348 0
+	add	w25, w25, 1
+.LVL280:
+	.loc 1 349 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
+.LVL281:
+.L141:
+	.loc 1 350 0 discriminator 1
+	cmp	w24, w27
+	bhi	.L147
+	mov	w0, 0
+	mov	w28, 0
+.LVL282:
+.L146:
+	.loc 1 376 0
+	orr	w0, w28, w0
+.LVL283:
+	cbnz	w0, .L131
+.LVL284:
+.L148:
+	.loc 1 347 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L149
+	.loc 1 347 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L149
+	b	.L114
+.LVL285:
+.L147:
+	.loc 1 357 0 is_stmt 1
+	ldr	x1, [x21, x27, lsl 3]
+	.loc 1 351 0
+	cmp	w23, 3
+	.loc 1 357 0
+	ldr	x0, [x20, x27, lsl 3]
+	.loc 1 351 0
+	beq	.L143
+	cmp	w23, 4
+	beq	.L144
+	.loc 1 353 0
+	bl	random_test
+.LVL286:
+.L213:
+	.loc 1 361 0
+	mov	w28, w0
+.LVL287:
+	.loc 1 369 0
+	bl	ctrlc
+.LVL288:
+	cbnz	w0, .L166
+	add	x27, x27, 1
+.LVL289:
+	mov	w19, w23
+	.loc 1 373 0
+	cbz	w28, .L141
+.LVL290:
+	mov	w19, w23
+.LVL291:
+	b	.L146
+.LVL292:
+.L143:
+	.loc 1 357 0
+	bl	crosstalk
+.LVL293:
+	b	.L213
+.L144:
+	.loc 1 361 0
+	bl	diagonalscan
+.LVL294:
+	b	.L213
+.LVL295:
+.L166:
+	mov	w19, w23
+	.loc 1 370 0
+	mov	w0, -1
+	b	.L146
+.LVL296:
+.L106:
+	.loc 1 220 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w24, sxtw]
+	cmp	w22, w0
+	blt	.L150
+	sub	w22, w22, #2
+.LVL297:
+	.loc 1 220 0 is_stmt 0 discriminator 1
+	mov	x26, 0
+	lsl	x22, x22, 3
+.LVL298:
+.L109:
+	.loc 1 225 0 is_stmt 1 discriminator 1
+	cmp	x26, x22
+	bne	.L110
+	.loc 1 232 0
+	ldp	x2, x3, [x29, 200]
+	mov	w1, w23
+	ldp	x4, x5, [x29, 216]
+	adrp	x0, .LC28
+	ldr	x6, [x29, 232]
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.LVL299:
+	.loc 1 238 0
+	add	x2, x29, 128
+	mov	w1, 0
+	mov	w0, 53
+	bl	uclass_get_device
+.LVL300:
+	mov	w22, w0
+.LVL301:
+	.loc 1 239 0
+	cbz	w0, .L111
+	.loc 1 240 0
+	mov	w1, w0
+	adrp	x0, .LC29
+.LVL302:
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.LVL303:
+.L97:
+	.loc 1 387 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE258:
+	.size	do_ddr_test, .-do_ddr_test
+	.section	.text.print_memory,"ax",@progbits
+	.align	2
+	.global	print_memory
+	.type	print_memory, %function
+print_memory:
+.LFB278:
+	.loc 3 81 0
+	.cfi_startproc
+.LVL304:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x20, x0
+.LVL305:
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 3 86 0
+	adrp	x21, .LC38
+	.loc 3 85 0
+	lsr	x22, x1, 2
+	.loc 3 86 0
+	add	x21, x21, :lo12:.LC38
+	.loc 3 85 0
+	mov	w19, 0
+.LVL306:
+.L217:
+	.loc 3 85 0 is_stmt 0 discriminator 1
+	uxtw	x1, w19
+	cmp	x1, x22
+	bcc	.L218
+	.loc 3 89 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL307:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL308:
+.L218:
+	.cfi_restore_state
+	.loc 3 87 0 discriminator 3
+	add	w3, w19, 3
+	add	w2, w19, 2
+	add	w0, w19, 1
+	lsl	x1, x1, 2
+	.loc 3 85 0 discriminator 3
+	add	w19, w19, 4
+.LVL309:
+	.loc 3 86 0 discriminator 3
+	ldr	w5, [x20, x3, lsl 2]
+	ldr	w4, [x20, x2, lsl 2]
+	ldr	w3, [x20, x0, lsl 2]
+	mov	x0, x21
+	ldr	w2, [x20, x1]
+	add	x1, x20, x1
+	bl	printf
+.LVL310:
+	b	.L217
+	.cfi_endproc
+.LFE278:
+	.size	print_memory, .-print_memory
+	.global	_u_boot_list_2_cmd_2_ddr_test
+	.section	.rodata
+	.align	3
+	.set	.LANCHOR1,. + 0
+.LC0:
+	.word	1437226410
+	.word	-1437226411
+	.word	1515890085
+	.word	-1515890086
+	.word	-267448336
+	.word	267448335
+	.word	0
+	.word	-1
+	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"\nbitflip:   \n"
+.LC18:
+	.string	"\b\b\b%3u"
+.LC19:
+	.string	"%3u\b\b\b"
+.LC20:
+	.string	"\nISI:\n"
+.LC21:
+	.string	"malloc %lu byte fail\n"
+	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
+.LC22:
+	.string	"\nDiagonalScan\n"
+	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC23:
+	.string	"available memory for test:\n"
+.LC24:
+	.string	"\tstart\t\t end\tlength\n"
+.LC25:
+	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+.LC26:
+	.string	"test parameters error\n"
+.LC27:
+	.string	"test pattern error\n"
+.LC28:
+	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+.LC29:
+	.string	"rockchip dmc probe fail: %d\n"
+.LC30:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
+.LC31:
+	.string	"\rtimes:%08u:\n"
+.LC32:
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
+.LC33:
+	.string	"Invalid test address\n"
+.LC34:
+	.string	"\rtimes:%08u, "
+.LC35:
+	.string	"\n%s test fail\n"
+.LC36:
+	.string	"\ntest pass\n"
+.LC37:
+	.string	"test pattern unsupported\n"
+	.section	.rodata.g_isi_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_isi_pattern, %object
+	.size	g_isi_pattern, 128
+g_isi_pattern:
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
+	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"%u"
+.LC6:
+	.string	"\b"
+.LC7:
+	.string	" "
+.LC8:
+	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
+.LC9:
+	.string	"%4lu"
+.LC10:
+	.string	"\b\b\b\b"
+.LC11:
+	.string	"    "
+.LC12:
+	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"% d:change freq to %d Hz\n"
+.LC14:
+	.string	"\tchange freq success: %d Hz\n"
+.LC15:
+	.string	"check data fail at %d Hz\n"
+	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"current freq:%lu Hz\n"
+	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"vdd_logic"
+.LC3:
+	.string	"Cannot set regulator name\n"
+.LC4:
+	.string	"set vdd_logic fail\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"ddr_test"
+.LC40:
+	.string	"for dram simple test\n"
+.LC41:
+	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
+	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
+	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
+	.ascii	": arg2:minfreq(Hz),arg3:maxfreq(Hz),\n\targ4:scanfreq times,"
+	.ascii	" arg5[option]:volt\nfor random, crosstalk and diagonalscan:a"
+	.ascii	"rg2:freq(Hz), arg3:test times,\n\targ4: start addr, arg5:len"
+	.ascii	"gth, arg6[option]:volt\nfor fast_test and full_test:arg2: mi"
+	.ascii	"n_freq(Hz), arg3: max_freq(Hz)\n\targ4: test times, arg5[opt"
+	.ascii	"ion]:volt\n\nfreq: means dram's target frequency,unit:Hz, if"
+	.ascii	" 0:keep current freq\nminfreq, maxfreq: means min and max fr"
+	.ascii	"equency for dram test,unit:Hz\ntest times: test loop, if 0: "
+	.ascii	"endless loop\nstart_adr: start address of memory space for t"
+	.ascii	"esting,unit:physical address\nlength: length of memory space"
+	.ascii	" for testing,unit:Byte, if 0: full memory space test\nvolt: "
+	.ascii	"means target voltage of vdd_logic\n\nexample:\nddr freq chan"
+	.ascii	"ge to:786MHz, vdd_logic:1.05v:\n\t 'ddr_test changefreq 7860"
+	.ascii	"00000 1050000'\nddr freq change to:786MHz, with default vdd_"
+	.ascii	"logic:\n\t 'ddr_test changefreq 786000000'\nscanning ddr fre"
+	.ascii	"quency between 200 and 786MHz for 10 times:\n\t 'ddr_test sc"
+	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
+	.ascii	"start from"
+	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
+.LC42:
+	.string	"changefreq"
+.LC43:
+	.string	"scanfreq"
+.LC44:
+	.string	"random"
+.LC45:
+	.string	"crosstalk"
+.LC46:
+	.string	"diagonalscan"
+.LC47:
+	.string	"fast_test"
+.LC48:
+	.string	"full_test"
+	.section	.rodata.test_pat_param,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	test_pat_param, %object
+	.size	test_pat_param, 7
+test_pat_param:
+	.byte	3
+	.byte	5
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	5
+	.byte	5
+	.section	.rodata.test_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	test_pattern, %object
+	.size	test_pattern, 56
+test_pattern:
+	.xword	.LC42
+	.xword	.LC43
+	.xword	.LC44
+	.xword	.LC45
+	.xword	.LC46
+	.xword	.LC47
+	.xword	.LC48
+	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_cmd_2_ddr_test, %object
+	.size	_u_boot_list_2_cmd_2_ddr_test, 48
+_u_boot_list_2_cmd_2_ddr_test:
+	.8byte	.LC39
+	.word	7
+	.word	1
+	.8byte	do_ddr_test
+	.8byte	.LC40
+	.8byte	.LC41
+	.8byte	0
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/dm/device.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/linux/list.h"
+	.file 15 "include/part.h"
+	.file 16 "include/flash.h"
+	.file 17 "include/lmb.h"
+	.file 18 "include/asm-generic/u-boot.h"
+	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 20 "include/command.h"
+	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/libfdt_env.h"
+	.file 23 "include/image.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "./arch/arm/include/asm/global_data.h"
+	.file 26 "include/asm-generic/global_data.h"
+	.file 27 "include/dm/of.h"
+	.file 28 "include/net.h"
+	.file 29 "include/malloc.h"
+	.file 30 "include/dm/ofnode.h"
+	.file 31 "include/linux/compat.h"
+	.file 32 "include/dm/uclass.h"
+	.file 33 "include/console.h"
+	.file 34 "include/stdio_dev.h"
+	.file 35 "include/iomux.h"
+	.file 36 "include/log.h"
+	.file 37 "include/stdio.h"
+	.file 38 "include/vsprintf.h"
+	.file 39 "include/power/regulator.h"
+	.file 40 "include/linux/delay.h"
+	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x2c16
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF486
+	.byte	0xc
+	.4byte	.LASF487
+	.4byte	.LASF488
+	.4byte	.Ldebug_ranges0+0x190
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x4
+	.4byte	0x3b
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x5
+	.4byte	.LASF21
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x59
+	.uleb128 0x6
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x8
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x4
+	.4byte	0xa8
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x8
+	.4byte	0xd5
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x8
+	.4byte	0xe0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe0
+	.uleb128 0x8
+	.4byte	0xf3
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x47
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x6b
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0xa
+	.byte	0x8
+	.uleb128 0x5
+	.4byte	.LASF22
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0x154
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF26
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xe
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x25d
+	.uleb128 0xf
+	.4byte	.LASF27
+	.byte	0xc
+	.byte	0x81
+	.4byte	0x1505
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xc
+	.byte	0x82
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0xc
+	.byte	0x83
+	.4byte	0x135
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF30
+	.byte	0xc
+	.byte	0x84
+	.4byte	0x135
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF31
+	.byte	0xc
+	.byte	0x85
+	.4byte	0x135
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF32
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x14d0
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF33
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x109
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF34
+	.byte	0xc
+	.byte	0x88
+	.4byte	0x25d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x135
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF36
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x1548
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF37
+	.byte	0xc
+	.byte	0x8b
+	.4byte	0x135
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0xc
+	.byte	0x8c
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF39
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x290
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x290
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF41
+	.byte	0xc
+	.byte	0x8f
+	.4byte	0x290
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0xc
+	.byte	0x90
+	.4byte	0x11f
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF43
+	.byte	0xc
+	.byte	0x91
+	.4byte	0x59
+	.byte	0x94
+	.uleb128 0x10
+	.string	"seq"
+	.byte	0xc
+	.byte	0x92
+	.4byte	0x59
+	.byte	0x98
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x178
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x269
+	.uleb128 0x11
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x275
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF44
+	.byte	0xd
+	.byte	0x10
+	.4byte	0x26a
+	.uleb128 0xb
+	.4byte	0x34
+	.4byte	0x290
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x2b5
+	.uleb128 0xf
+	.4byte	.LASF47
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x2b5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF48
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x2b5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x290
+	.uleb128 0xe
+	.4byte	.LASF49
+	.byte	0x10
+	.byte	0xf
+	.byte	0xf
+	.4byte	0x2e0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xf
+	.byte	0x10
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF50
+	.byte	0xf
+	.byte	0x11
+	.4byte	0x2f9
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2bb
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x2f9
+	.uleb128 0x14
+	.4byte	0x59
+	.uleb128 0x14
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x2e5
+	.uleb128 0xb
+	.4byte	0x2e0
+	.4byte	0x30a
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2ff
+	.uleb128 0x5
+	.4byte	.LASF49
+	.byte	0xf
+	.byte	0xce
+	.4byte	0x30a
+	.uleb128 0x15
+	.2byte	0x1218
+	.byte	0x10
+	.byte	0x13
+	.4byte	0x361
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0x10
+	.byte	0x14
+	.4byte	0x109
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF52
+	.byte	0x10
+	.byte	0x15
+	.4byte	0xfe
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF53
+	.byte	0x10
+	.byte	0x16
+	.4byte	0x109
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x10
+	.byte	0x17
+	.4byte	0x361
+	.byte	0x18
+	.uleb128 0x16
+	.4byte	.LASF55
+	.byte	0x10
+	.byte	0x18
+	.4byte	0x372
+	.2byte	0x1018
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x372
+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x29
+	.4byte	0x383
+	.uleb128 0x17
+	.4byte	0xce
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF56
+	.byte	0x10
+	.byte	0x32
+	.4byte	0x31a
+	.uleb128 0xb
+	.4byte	0x383
+	.4byte	0x399
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF57
+	.byte	0x10
+	.byte	0x34
+	.4byte	0x38e
+	.uleb128 0x3
+	.byte	0x10
+	.byte	0x4
+	.4byte	.LASF58
+	.uleb128 0xe
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0x11
+	.byte	0x10
+	.4byte	0x3d0
+	.uleb128 0xf
+	.4byte	.LASF60
+	.byte	0x11
+	.byte	0x11
+	.4byte	0xb8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0x11
+	.byte	0x12
+	.4byte	0xc3
+	.byte	0x8
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF61
+	.byte	0xa0
+	.byte	0x11
+	.byte	0x15
+	.4byte	0x401
+	.uleb128 0x10
+	.string	"cnt"
+	.byte	0x11
+	.byte	0x16
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0x11
+	.byte	0x17
+	.4byte	0xc3
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF62
+	.byte	0x11
+	.byte	0x18
+	.4byte	0x401
+	.byte	0x10
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x3ab
+	.4byte	0x411
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x8
+	.byte	0
+	.uleb128 0x18
+	.string	"lmb"
+	.2byte	0x140
+	.byte	0x11
+	.byte	0x1b
+	.4byte	0x437
+	.uleb128 0xf
+	.4byte	.LASF63
+	.byte	0x11
+	.byte	0x1c
+	.4byte	0x3d0
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF64
+	.byte	0x11
+	.byte	0x1d
+	.4byte	0x3d0
+	.byte	0xa0
+	.byte	0
+	.uleb128 0x19
+	.string	"lmb"
+	.byte	0x11
+	.byte	0x20
+	.4byte	0x411
+	.uleb128 0x1a
+	.byte	0x10
+	.byte	0x12
+	.byte	0x5a
+	.4byte	0x463
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+	.4byte	0xb8
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+	.uleb128 0xf
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+	.byte	0x5c
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+	.byte	0
+	.uleb128 0xe
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+	.byte	0xc8
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+	.byte	0x1b
+	.4byte	0x554
+	.uleb128 0xf
+	.4byte	.LASF66
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+	.byte	0x1c
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+	.uleb128 0xf
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+	.byte	0x1d
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+	.uleb128 0xf
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+	.byte	0x1e
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+	.uleb128 0xf
+	.4byte	.LASF69
+	.byte	0x12
+	.byte	0x1f
+	.4byte	0x3b
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+	.uleb128 0xf
+	.4byte	.LASF70
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+	.uleb128 0xf
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+	.byte	0x21
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+	.uleb128 0xf
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+	.uleb128 0xf
+	.4byte	.LASF73
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+	.4byte	0x3b
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+	.uleb128 0xf
+	.4byte	.LASF74
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0x66
+	.uleb128 0xf
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+	.uleb128 0xf
+	.4byte	.LASF81
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+	.4byte	0x3b
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0x80
+	.uleb128 0xf
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+	.byte	0x12
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+	.uleb128 0xb
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+	.uleb128 0x12
+	.4byte	0xce
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+	.uleb128 0x2
+	.4byte	.LASF85
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+	.byte	0x5f
+	.4byte	0x463
+	.uleb128 0x5
+	.4byte	.LASF86
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+	.uleb128 0x5
+	.4byte	.LASF87
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+	.uleb128 0x5
+	.4byte	.LASF88
+	.byte	0x13
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+	.uleb128 0x5
+	.4byte	.LASF89
+	.byte	0x13
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+	.uleb128 0x5
+	.4byte	.LASF90
+	.byte	0x13
+	.byte	0x17
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+	.uleb128 0x5
+	.4byte	.LASF91
+	.byte	0x13
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+	.uleb128 0x5
+	.4byte	.LASF92
+	.byte	0x13
+	.byte	0x19
+	.4byte	0x109
+	.uleb128 0xe
+	.4byte	.LASF93
+	.byte	0x30
+	.byte	0x14
+	.byte	0x1e
+	.4byte	0x61d
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x14
+	.byte	0x1f
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF94
+	.byte	0x14
+	.byte	0x20
+	.4byte	0x59
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF95
+	.byte	0x14
+	.byte	0x21
+	.4byte	0x59
+	.byte	0xc
+	.uleb128 0x10
+	.string	"cmd"
+	.byte	0x14
+	.byte	0x23
+	.4byte	0x647
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF96
+	.byte	0x14
+	.byte	0x24
+	.4byte	0xf3
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF97
+	.byte	0x14
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+	.4byte	0xf3
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF98
+	.byte	0x14
+	.byte	0x2a
+	.4byte	0x676
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+	.byte	0
+	.uleb128 0x13
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+	.4byte	0x63b
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+	.4byte	0x63b
+	.uleb128 0x14
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+	.uleb128 0x14
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+	.uleb128 0x14
+	.4byte	0x641
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+	.uleb128 0x9
+	.byte	0x8
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+	.uleb128 0x9
+	.byte	0x8
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+	.uleb128 0x9
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+	.uleb128 0x13
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+	.4byte	0x670
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+	.uleb128 0x14
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+	.uleb128 0x9
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+	.uleb128 0x2
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+	.uleb128 0x1b
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+	.uleb128 0x1c
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+	.byte	0x1
+	.uleb128 0x1d
+	.4byte	.LASF102
+	.sleb128 -1
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.byte	0xa8
+	.uleb128 0x1f
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+	.byte	0xb0
+	.uleb128 0x21
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+	.4byte	0x893
+	.byte	0xb8
+	.uleb128 0x21
+	.string	"ep"
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+	.byte	0xe8
+	.uleb128 0x1f
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+	.byte	0xf0
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+	.uleb128 0x23
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+	.4byte	.LASF159
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+	.uleb128 0x23
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+	.2byte	0x118
+	.uleb128 0x23
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+	.4byte	0x109
+	.2byte	0x128
+	.uleb128 0x24
+	.string	"kbd"
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+	.uleb128 0x23
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+	.4byte	.LASF164
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+	.4byte	0x59
+	.2byte	0x13c
+	.uleb128 0x24
+	.string	"lmb"
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+	.2byte	0x18d
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+	.uleb128 0x20
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+	.uleb128 0xd
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+	.uleb128 0x1b
+	.4byte	.LASF168
+	.byte	0x4
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+	.byte	0xe
+	.4byte	0xc75
+	.uleb128 0x1c
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+	.uleb128 0x1c
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+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF171
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF172
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF173
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF174
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF175
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF176
+	.byte	0x7
+	.uleb128 0x1c
+	.4byte	.LASF177
+	.byte	0x8
+	.uleb128 0x1c
+	.4byte	.LASF178
+	.byte	0x9
+	.uleb128 0x1c
+	.4byte	.LASF179
+	.byte	0xa
+	.uleb128 0x1c
+	.4byte	.LASF180
+	.byte	0xb
+	.uleb128 0x1c
+	.4byte	.LASF181
+	.byte	0xc
+	.uleb128 0x1c
+	.4byte	.LASF182
+	.byte	0xd
+	.uleb128 0x1c
+	.4byte	.LASF183
+	.byte	0xe
+	.uleb128 0x1c
+	.4byte	.LASF184
+	.byte	0xf
+	.uleb128 0x1c
+	.4byte	.LASF185
+	.byte	0x10
+	.uleb128 0x1c
+	.4byte	.LASF186
+	.byte	0x11
+	.uleb128 0x1c
+	.4byte	.LASF187
+	.byte	0x12
+	.uleb128 0x1c
+	.4byte	.LASF188
+	.byte	0x13
+	.uleb128 0x1c
+	.4byte	.LASF189
+	.byte	0x14
+	.uleb128 0x1c
+	.4byte	.LASF190
+	.byte	0x15
+	.uleb128 0x1c
+	.4byte	.LASF191
+	.byte	0x16
+	.uleb128 0x1c
+	.4byte	.LASF192
+	.byte	0x17
+	.uleb128 0x1c
+	.4byte	.LASF193
+	.byte	0x18
+	.uleb128 0x1c
+	.4byte	.LASF194
+	.byte	0x19
+	.uleb128 0x1c
+	.4byte	.LASF195
+	.byte	0x1a
+	.uleb128 0x1c
+	.4byte	.LASF196
+	.byte	0x1b
+	.uleb128 0x1c
+	.4byte	.LASF197
+	.byte	0x1c
+	.uleb128 0x1c
+	.4byte	.LASF198
+	.byte	0x1d
+	.uleb128 0x1c
+	.4byte	.LASF199
+	.byte	0x1e
+	.uleb128 0x1c
+	.4byte	.LASF200
+	.byte	0x1f
+	.uleb128 0x1c
+	.4byte	.LASF201
+	.byte	0x20
+	.uleb128 0x1c
+	.4byte	.LASF202
+	.byte	0x21
+	.uleb128 0x1c
+	.4byte	.LASF203
+	.byte	0x22
+	.uleb128 0x1c
+	.4byte	.LASF204
+	.byte	0x23
+	.uleb128 0x1c
+	.4byte	.LASF205
+	.byte	0x24
+	.uleb128 0x1c
+	.4byte	.LASF206
+	.byte	0x25
+	.uleb128 0x1c
+	.4byte	.LASF207
+	.byte	0x26
+	.uleb128 0x1c
+	.4byte	.LASF208
+	.byte	0x27
+	.uleb128 0x1c
+	.4byte	.LASF209
+	.byte	0x28
+	.uleb128 0x1c
+	.4byte	.LASF210
+	.byte	0x29
+	.uleb128 0x1c
+	.4byte	.LASF211
+	.byte	0x2a
+	.uleb128 0x1c
+	.4byte	.LASF212
+	.byte	0x2b
+	.uleb128 0x1c
+	.4byte	.LASF213
+	.byte	0x2c
+	.uleb128 0x1c
+	.4byte	.LASF214
+	.byte	0x2d
+	.uleb128 0x1c
+	.4byte	.LASF215
+	.byte	0x2e
+	.uleb128 0x1c
+	.4byte	.LASF216
+	.byte	0x2f
+	.uleb128 0x1c
+	.4byte	.LASF217
+	.byte	0x30
+	.uleb128 0x1c
+	.4byte	.LASF218
+	.byte	0x31
+	.uleb128 0x1c
+	.4byte	.LASF219
+	.byte	0x32
+	.uleb128 0x1c
+	.4byte	.LASF220
+	.byte	0x33
+	.uleb128 0x1c
+	.4byte	.LASF221
+	.byte	0x34
+	.uleb128 0x1c
+	.4byte	.LASF222
+	.byte	0x35
+	.uleb128 0x1c
+	.4byte	.LASF223
+	.byte	0x36
+	.uleb128 0x1c
+	.4byte	.LASF224
+	.byte	0x37
+	.uleb128 0x1c
+	.4byte	.LASF225
+	.byte	0x38
+	.uleb128 0x1c
+	.4byte	.LASF226
+	.byte	0x39
+	.uleb128 0x1c
+	.4byte	.LASF227
+	.byte	0x3a
+	.uleb128 0x1c
+	.4byte	.LASF228
+	.byte	0x3b
+	.uleb128 0x1c
+	.4byte	.LASF229
+	.byte	0x3c
+	.uleb128 0x1c
+	.4byte	.LASF230
+	.byte	0x3d
+	.uleb128 0x1c
+	.4byte	.LASF231
+	.byte	0x3e
+	.uleb128 0x1c
+	.4byte	.LASF232
+	.byte	0x3f
+	.uleb128 0x1c
+	.4byte	.LASF233
+	.byte	0x40
+	.uleb128 0x1c
+	.4byte	.LASF234
+	.byte	0x41
+	.uleb128 0x1c
+	.4byte	.LASF235
+	.byte	0x42
+	.uleb128 0x1c
+	.4byte	.LASF236
+	.byte	0x43
+	.uleb128 0x1c
+	.4byte	.LASF237
+	.byte	0x44
+	.uleb128 0x1c
+	.4byte	.LASF238
+	.byte	0x45
+	.uleb128 0x1c
+	.4byte	.LASF239
+	.byte	0x46
+	.uleb128 0x1c
+	.4byte	.LASF240
+	.byte	0x47
+	.uleb128 0x1c
+	.4byte	.LASF241
+	.byte	0x48
+	.uleb128 0x1c
+	.4byte	.LASF242
+	.byte	0x49
+	.uleb128 0x1c
+	.4byte	.LASF243
+	.byte	0x4a
+	.uleb128 0x1c
+	.4byte	.LASF244
+	.byte	0x4b
+	.uleb128 0x1c
+	.4byte	.LASF245
+	.byte	0x4c
+	.uleb128 0x1c
+	.4byte	.LASF246
+	.byte	0x4d
+	.uleb128 0x1c
+	.4byte	.LASF247
+	.byte	0x4e
+	.uleb128 0x1c
+	.4byte	.LASF248
+	.byte	0x4f
+	.uleb128 0x1c
+	.4byte	.LASF249
+	.byte	0x50
+	.uleb128 0x1c
+	.4byte	.LASF250
+	.byte	0x51
+	.uleb128 0x1c
+	.4byte	.LASF251
+	.byte	0x52
+	.uleb128 0x1c
+	.4byte	.LASF252
+	.byte	0x53
+	.uleb128 0x1c
+	.4byte	.LASF253
+	.byte	0x54
+	.uleb128 0x1d
+	.4byte	.LASF254
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x24
+	.byte	0xe0
+	.4byte	0xc88
+	.uleb128 0x1c
+	.4byte	.LASF255
+	.byte	0x5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF256
+	.byte	0x40
+	.byte	0x19
+	.byte	0xc
+	.4byte	0xd01
+	.uleb128 0xf
+	.4byte	.LASF257
+	.byte	0x19
+	.byte	0x22
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0x10
+	.string	"tbu"
+	.byte	0x19
+	.byte	0x23
+	.4byte	0x84
+	.byte	0x8
+	.uleb128 0x10
+	.string	"tbl"
+	.byte	0x19
+	.byte	0x24
+	.4byte	0x84
+	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF258
+	.byte	0x19
+	.byte	0x25
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF259
+	.byte	0x19
+	.byte	0x26
+	.4byte	0x92
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF260
+	.byte	0x19
+	.byte	0x28
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF261
+	.byte	0x19
+	.byte	0x29
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF262
+	.byte	0x19
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF263
+	.byte	0x19
+	.byte	0x2c
+	.4byte	0x3b
+	.byte	0x38
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF264
+	.byte	0x18
+	.byte	0x1a
+	.byte	0x22
+	.4byte	0xd3d
+	.uleb128 0xf
+	.4byte	.LASF265
+	.byte	0x1a
+	.byte	0x23
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x10
+	.string	"id"
+	.byte	0x1a
+	.byte	0x24
+	.4byte	0xa8
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xa8
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF267
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0x109
+	.byte	0x10
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF268
+	.2byte	0x198
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xf28
+	.uleb128 0x10
+	.string	"bd"
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xa42
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x1a
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0x84
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF269
+	.byte	0x1a
+	.byte	0x2d
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF270
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF271
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF272
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF273
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0x3b
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF274
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF275
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0x3b
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF276
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0x3b
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF277
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x3b
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF278
+	.byte	0x1a
+	.byte	0x45
+	.4byte	0x3b
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF279
+	.byte	0x1a
+	.byte	0x46
+	.4byte	0xc3
+	.byte	0x68
+	.uleb128 0xf
+	.4byte	.LASF280
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF281
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x3b
+	.byte	0x78
+	.uleb128 0xf
+	.4byte	.LASF282
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x3b
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF283
+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x3b
+	.byte	0x88
+	.uleb128 0xf
+	.4byte	.LASF284
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0xf28
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF285
+	.byte	0x1a
+	.byte	0x4e
+	.4byte	0x25d
+	.byte	0x98
+	.uleb128 0xf
+	.4byte	.LASF286
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x25d
+	.byte	0xa0
+	.uleb128 0xf
+	.4byte	.LASF287
+	.byte	0x1a
+	.byte	0x50
+	.4byte	0x290
+	.byte	0xa8
+	.uleb128 0xf
+	.4byte	.LASF288
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0x263
+	.byte	0xb8
+	.uleb128 0xf
+	.4byte	.LASF289
+	.byte	0x1a
+	.byte	0x57
+	.4byte	0x135
+	.byte	0xc0
+	.uleb128 0xf
+	.4byte	.LASF290
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0x3b
+	.byte	0xc8
+	.uleb128 0xf
+	.4byte	.LASF291
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0xfa0
+	.byte	0xd0
+	.uleb128 0x10
+	.string	"jt"
+	.byte	0x1a
+	.byte	0x5c
+	.4byte	0xfab
+	.byte	0xd8
+	.uleb128 0xf
+	.4byte	.LASF292
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0xfb1
+	.byte	0xe0
+	.uleb128 0x16
+	.4byte	.LASF293
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x84
+	.2byte	0x100
+	.uleb128 0x16
+	.4byte	.LASF294
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x84
+	.2byte	0x104
+	.uleb128 0x16
+	.4byte	.LASF295
+	.byte	0x1a
+	.byte	0x6a
+	.4byte	0x3b
+	.2byte	0x108
+	.uleb128 0x16
+	.4byte	.LASF296
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0x3b
+	.2byte	0x110
+	.uleb128 0x16
+	.4byte	.LASF297
+	.byte	0x1a
+	.byte	0x6c
+	.4byte	0x3b
+	.2byte	0x118
+	.uleb128 0x16
+	.4byte	.LASF298
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0x25d
+	.2byte	0x120
+	.uleb128 0x16
+	.4byte	.LASF136
+	.byte	0x1a
+	.byte	0x76
+	.4byte	0xc88
+	.2byte	0x128
+	.uleb128 0x16
+	.4byte	.LASF299
+	.byte	0x1a
+	.byte	0x7c
+	.4byte	0x109
+	.2byte	0x168
+	.uleb128 0x16
+	.4byte	.LASF300
+	.byte	0x1a
+	.byte	0x7d
+	.4byte	0x109
+	.2byte	0x170
+	.uleb128 0x16
+	.4byte	.LASF301
+	.byte	0x1a
+	.byte	0x83
+	.4byte	0xb8
+	.2byte	0x178
+	.uleb128 0x16
+	.4byte	.LASF302
+	.byte	0x1a
+	.byte	0x88
+	.4byte	0xd01
+	.2byte	0x180
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xd3d
+	.uleb128 0xe
+	.4byte	.LASF303
+	.byte	0x40
+	.byte	0x1b
+	.byte	0x2c
+	.4byte	0xf9b
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x1b
+	.byte	0x2d
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF135
+	.byte	0x1b
+	.byte	0x2e
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF304
+	.byte	0x1b
+	.byte	0x2f
+	.4byte	0x1448
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF305
+	.byte	0x1b
+	.byte	0x30
+	.4byte	0xd5
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF306
+	.byte	0x1b
+	.byte	0x32
+	.4byte	0x1490
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF34
+	.byte	0x1b
+	.byte	0x33
+	.4byte	0xfa0
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF307
+	.byte	0x1b
+	.byte	0x34
+	.4byte	0xfa0
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF308
+	.byte	0x1b
+	.byte	0x35
+	.4byte	0xfa0
+	.byte	0x38
+	.byte	0
+	.uleb128 0x8
+	.4byte	0xf2e
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xf2e
+	.uleb128 0x27
+	.4byte	.LASF489
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xfa6
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0xfc1
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x2
+	.4byte	.LASF309
+	.byte	0x1a
+	.byte	0x8e
+	.4byte	0xd3d
+	.uleb128 0x4
+	.4byte	0xfc1
+	.uleb128 0x5
+	.4byte	.LASF310
+	.byte	0x6
+	.byte	0xab
+	.4byte	0x109
+	.uleb128 0xb
+	.4byte	0x99
+	.4byte	0xfe7
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF311
+	.byte	0x6
+	.byte	0xad
+	.4byte	0xfdc
+	.uleb128 0x5
+	.4byte	.LASF312
+	.byte	0x6
+	.byte	0xae
+	.4byte	0xfdc
+	.uleb128 0x5
+	.4byte	.LASF313
+	.byte	0x6
+	.byte	0xfc
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF314
+	.byte	0x6
+	.byte	0xfd
+	.4byte	0x109
+	.uleb128 0x5
+	.4byte	.LASF315
+	.byte	0x6
+	.byte	0xfe
+	.4byte	0x109
+	.uleb128 0xe
+	.4byte	.LASF316
+	.byte	0x4
+	.byte	0x1c
+	.byte	0x2e
+	.4byte	0x1037
+	.uleb128 0xf
+	.4byte	.LASF317
+	.byte	0x1c
+	.byte	0x2f
+	.4byte	0x12a
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x29
+	.uleb128 0xe
+	.4byte	.LASF318
+	.byte	0x68
+	.byte	0x1c
+	.byte	0xa6
+	.4byte	0x10da
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x1c
+	.byte	0xa8
+	.4byte	0x10da
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF319
+	.byte	0x1c
+	.byte	0xa9
+	.4byte	0x280
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF320
+	.byte	0x1c
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0xae
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+	.uleb128 0xf
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+	.byte	0xaf
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+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF324
+	.byte	0x1c
+	.byte	0xb0
+	.4byte	0x1149
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF325
+	.byte	0x1c
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+	.4byte	0x1138
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF47
+	.byte	0x1c
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+	.byte	0x50
+	.uleb128 0xf
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+	.uleb128 0xf
+	.4byte	.LASF35
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+	.4byte	0xce
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+	.uleb128 0x14
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+	.uleb128 0x9
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+	.uleb128 0x9
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+	.uleb128 0x5
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+	.uleb128 0xd
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+	.uleb128 0x12
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+	.uleb128 0xd
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+	.uleb128 0xd
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+	.byte	0x1c
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+	.uleb128 0xd
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+	.4byte	0x101e
+	.uleb128 0xd
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+	.byte	0x1c
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+	.4byte	0xfb1
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+	.byte	0x1c
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+	.4byte	0xce
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+	.uleb128 0xd
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+	.4byte	0x11c8
+	.uleb128 0xd
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+	.byte	0x1c
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+	.4byte	0x117c
+	.uleb128 0xd
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+	.byte	0x1c
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+	.4byte	0x117c
+	.uleb128 0xd
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+	.uleb128 0xd
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+	.byte	0x1c
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+	.uleb128 0xd
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+	.uleb128 0xb
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+	.4byte	0x1230
+	.uleb128 0x12
+	.4byte	0xce
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+	.uleb128 0xd
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+	.uleb128 0xd
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+	.uleb128 0xd
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+	.uleb128 0xb
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+	.uleb128 0xd
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+	.4byte	0xa8
+	.uleb128 0xe
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+	.uleb128 0xf
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+	.byte	0xc
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+	.4byte	0xf3
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+	.uleb128 0x10
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0x10
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+	.uleb128 0x2
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+	.uleb128 0xf
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+	.uleb128 0x9
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+	.uleb128 0x2b
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.4byte	0xfcc
+	.uleb128 0x2c
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+	.byte	0x8
+	.byte	0x1e
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+	.4byte	0x14ca
+	.uleb128 0x2d
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+	.uleb128 0x2e
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+	.uleb128 0x9
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+	.uleb128 0x2
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+	.uleb128 0xe
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+	.byte	0x4
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+	.4byte	0x14f4
+	.uleb128 0x10
+	.string	"pid"
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+	.byte	0
+	.uleb128 0x5
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+	.uleb128 0x9
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+	.uleb128 0xe
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+	.uleb128 0x10
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+	.uleb128 0x10
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.4byte	0x59
+	.byte	0
+	.uleb128 0x10
+	.string	"ext"
+	.byte	0x22
+	.byte	0x18
+	.4byte	0x59
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x22
+	.byte	0x19
+	.4byte	0xfb1
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x22
+	.byte	0x1d
+	.4byte	0x1743
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF397
+	.byte	0x22
+	.byte	0x1e
+	.4byte	0x1743
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF398
+	.byte	0x22
+	.byte	0x23
+	.4byte	0x1759
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF399
+	.byte	0x22
+	.byte	0x25
+	.4byte	0x176f
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF400
+	.byte	0x22
+	.byte	0x2a
+	.4byte	0x1743
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF401
+	.byte	0x22
+	.byte	0x2b
+	.4byte	0x1743
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x22
+	.byte	0x2f
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF402
+	.byte	0x22
+	.byte	0x30
+	.4byte	0x290
+	.byte	0x60
+	.byte	0
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0x173d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x169d
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x172e
+	.uleb128 0x28
+	.4byte	0x1759
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xe7
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1749
+	.uleb128 0x28
+	.4byte	0x176f
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x175f
+	.uleb128 0xb
+	.4byte	0x173d
+	.4byte	0x1780
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF403
+	.byte	0x22
+	.byte	0x48
+	.4byte	0x1775
+	.uleb128 0xb
+	.4byte	0xf3
+	.4byte	0x179b
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF404
+	.byte	0x22
+	.byte	0x49
+	.4byte	0x178b
+	.uleb128 0xb
+	.4byte	0x17b6
+	.4byte	0x17b6
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x173d
+	.uleb128 0x5
+	.4byte	.LASF405
+	.byte	0x23
+	.byte	0x15
+	.4byte	0x17a6
+	.uleb128 0xb
+	.4byte	0x59
+	.4byte	0x17d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF406
+	.byte	0x23
+	.byte	0x1a
+	.4byte	0x17c7
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x181f
+	.uleb128 0x1c
+	.4byte	.LASF407
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF408
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF409
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF410
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF411
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF412
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF413
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF414
+	.byte	0x7
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xdb
+	.4byte	0x182f
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x181f
+	.uleb128 0x2a
+	.4byte	.LASF416
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0x182f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pattern
+	.uleb128 0xb
+	.4byte	0xa3
+	.4byte	0x1859
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x1849
+	.uleb128 0x2a
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0x29
+	.4byte	0x1859
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pat_param
+	.uleb128 0x2f
+	.4byte	.LASF418
+	.byte	0x1
+	.2byte	0x185
+	.4byte	0x67c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_cmd_2_ddr_test
+	.uleb128 0x30
+	.4byte	.LASF426
+	.byte	0x3
+	.byte	0x50
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1904
+	.uleb128 0x31
+	.4byte	.LASF267
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x135
+	.4byte	.LLST76
+	.uleb128 0x31
+	.4byte	.LASF51
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x109
+	.4byte	.LLST77
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x52
+	.4byte	0x1365
+	.4byte	.LLST78
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x53
+	.4byte	0xa8
+	.4byte	.LLST79
+	.uleb128 0x33
+	.8byte	.LVL310
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xd
+	.byte	0x83
+	.sleb128 -4
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF428
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a04
+	.uleb128 0x36
+	.string	"buf"
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x1365
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST32
+	.uleb128 0x31
+	.4byte	.LASF421
+	.byte	0x3
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x37
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x1a04
+	.4byte	.LLST34
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x1a0a
+	.4byte	.LLST35
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST36
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST37
+	.uleb128 0x32
+	.string	"val"
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST38
+	.uleb128 0x37
+	.4byte	.LASF423
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST39
+	.uleb128 0x37
+	.4byte	.LASF424
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST40
+	.uleb128 0x37
+	.4byte	.LASF425
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST41
+	.uleb128 0x33
+	.8byte	.LVL115
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC16
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x109
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x30
+	.4byte	.LASF427
+	.byte	0x3
+	.byte	0x1c
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a98
+	.uleb128 0x38
+	.string	"buf"
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x1365
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0xa8
+	.4byte	.LLST25
+	.uleb128 0x39
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.4byte	.LLST26
+	.uleb128 0x2a
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x1e
+	.4byte	0x1a04
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3a
+	.string	"p"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x1a04
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST27
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST28
+	.byte	0
+	.uleb128 0x3b
+	.4byte	.LASF491
+	.byte	0x3
+	.byte	0xa
+	.byte	0x1
+	.4byte	0x1aae
+	.uleb128 0x3c
+	.string	"p"
+	.byte	0x3
+	.byte	0xa
+	.4byte	0x1365
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF429
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x59
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1d27
+	.uleb128 0x31
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST3
+	.uleb128 0x31
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST4
+	.uleb128 0x3a
+	.string	"ret"
+	.byte	0x2
+	.byte	0x59
+	.4byte	0x59
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3d
+	.4byte	0x1d95
+	.8byte	.LBB12
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x2
+	.byte	0x5b
+	.4byte	0x1c21
+	.uleb128 0x3e
+	.4byte	0x1db0
+	.4byte	.LLST5
+	.uleb128 0x3e
+	.4byte	0x1da5
+	.4byte	.LLST6
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x40
+	.4byte	0x1dbb
+	.4byte	.LLST7
+	.uleb128 0x40
+	.4byte	0x1dc4
+	.4byte	.LLST8
+	.uleb128 0x40
+	.4byte	0x1dcd
+	.4byte	.LLST9
+	.uleb128 0x40
+	.4byte	0x1dd8
+	.4byte	.LLST10
+	.uleb128 0x41
+	.4byte	0x1de3
+	.uleb128 0x40
+	.4byte	0x1dee
+	.4byte	.LLST11
+	.uleb128 0x40
+	.4byte	0x1df9
+	.4byte	.LLST12
+	.uleb128 0x40
+	.4byte	0x1e04
+	.4byte	.LLST13
+	.uleb128 0x42
+	.8byte	.LVL26
+	.4byte	0x2b70
+	.4byte	0x1b94
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL28
+	.4byte	0x2b65
+	.4byte	0x1bb2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL32
+	.4byte	0x2b65
+	.4byte	0x1bca
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL38
+	.4byte	0x2b65
+	.4byte	0x1be9
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL39
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.4byte	0x1d27
+	.8byte	.LBB21
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x2
+	.byte	0x5d
+	.uleb128 0x44
+	.4byte	0x1d42
+	.uleb128 0x44
+	.4byte	0x1d37
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x40
+	.4byte	0x1d4d
+	.4byte	.LLST14
+	.uleb128 0x40
+	.4byte	0x1d56
+	.4byte	.LLST15
+	.uleb128 0x45
+	.4byte	0x1d5f
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x45
+	.4byte	0x1d6a
+	.uleb128 0x1
+	.byte	0x6a
+	.uleb128 0x45
+	.4byte	0x1d75
+	.uleb128 0x1
+	.byte	0x6b
+	.uleb128 0x41
+	.4byte	0x1d80
+	.uleb128 0x40
+	.4byte	0x1d89
+	.4byte	.LLST16
+	.uleb128 0x42
+	.8byte	.LVL48
+	.4byte	0x2b65
+	.4byte	0x1c96
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL50
+	.4byte	0x2b70
+	.4byte	0x1cba
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL55
+	.4byte	0x2b65
+	.4byte	0x1cd2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL61
+	.4byte	0x2b65
+	.4byte	0x1cf1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC11
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL62
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC12
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF435
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d95
+	.uleb128 0x47
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x47
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"j"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF432
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF376
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0x34
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"p"
+	.byte	0x2
+	.byte	0x35
+	.4byte	0x1a0a
+	.uleb128 0x49
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF436
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1e10
+	.uleb128 0x47
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x47
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"j"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF437
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF432
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF376
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"p32"
+	.byte	0x2
+	.byte	0xf
+	.4byte	0x1e10
+	.uleb128 0x49
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x10
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xb3
+	.uleb128 0x35
+	.4byte	.LASF438
+	.byte	0x5
+	.byte	0x30
+	.4byte	0x59
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2042
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x5
+	.byte	0x30
+	.4byte	0x109
+	.4byte	.LLST49
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x5
+	.byte	0x30
+	.4byte	0x109
+	.4byte	.LLST50
+	.uleb128 0x37
+	.4byte	.LASF267
+	.byte	0x5
+	.byte	0x35
+	.4byte	0x109
+	.4byte	.LLST51
+	.uleb128 0x37
+	.4byte	.LASF439
+	.byte	0x5
+	.byte	0x35
+	.4byte	0x109
+	.4byte	.LLST52
+	.uleb128 0x49
+	.4byte	.LASF440
+	.byte	0x5
+	.byte	0x36
+	.4byte	0x59
+	.uleb128 0x2a
+	.4byte	.LASF441
+	.byte	0x5
+	.byte	0x37
+	.4byte	0x2042
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"col"
+	.byte	0x5
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST53
+	.uleb128 0x37
+	.4byte	.LASF442
+	.byte	0x5
+	.byte	0x39
+	.4byte	0xa8
+	.4byte	.LLST54
+	.uleb128 0x37
+	.4byte	.LASF425
+	.byte	0x5
+	.byte	0x3a
+	.4byte	0x109
+	.4byte	.LLST55
+	.uleb128 0x4a
+	.4byte	.LASF492
+	.byte	0x5
+	.byte	0x62
+	.8byte	.L91
+	.uleb128 0x3d
+	.4byte	0x2052
+	.8byte	.LBB29
+	.4byte	.Ldebug_ranges0+0x90
+	.byte	0x5
+	.byte	0x3d
+	.4byte	0x1f19
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x90
+	.uleb128 0x40
+	.4byte	0x2062
+	.4byte	.LLST56
+	.uleb128 0x41
+	.4byte	0x206d
+	.uleb128 0x41
+	.4byte	0x2078
+	.uleb128 0x41
+	.4byte	0x2082
+	.uleb128 0x4b
+	.8byte	.LBB31
+	.8byte	.LBE31-.LBB31
+	.uleb128 0x40
+	.4byte	0x208e
+	.4byte	.LLST57
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL156
+	.4byte	0x2b7c
+	.4byte	0x1f45
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL157
+	.4byte	0x2b65
+	.4byte	0x1f64
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC22
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL160
+	.4byte	0x2b85
+	.4byte	0x1f89
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL165
+	.4byte	0x2b85
+	.4byte	0x1fae
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL166
+	.4byte	0x1904
+	.4byte	0x1fe4
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x84
+	.sleb128 0
+	.byte	0x86
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL171
+	.4byte	0x2b85
+	.4byte	0x2015
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xe
+	.byte	0x85
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL172
+	.4byte	0x1904
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xa8
+	.4byte	0x2052
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF443
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x209b
+	.uleb128 0x49
+	.4byte	.LASF444
+	.byte	0x5
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"col"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"bw"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF440
+	.byte	0x5
+	.byte	0x10
+	.4byte	0x59
+	.uleb128 0x4c
+	.uleb128 0x48
+	.string	"__v"
+	.byte	0x5
+	.byte	0x13
+	.4byte	0xa8
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF455
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x25c1
+	.uleb128 0x31
+	.4byte	.LASF445
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x25c1
+	.4byte	.LLST58
+	.uleb128 0x31
+	.4byte	.LASF446
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST59
+	.uleb128 0x31
+	.4byte	.LASF447
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST60
+	.uleb128 0x31
+	.4byte	.LASF448
+	.byte	0x1
+	.byte	0xbd
+	.4byte	0x641
+	.4byte	.LLST61
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0xbf
+	.4byte	0x59
+	.4byte	.LLST62
+	.uleb128 0x37
+	.4byte	.LASF449
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST63
+	.uleb128 0x37
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST64
+	.uleb128 0x3a
+	.string	"arg"
+	.byte	0x1
+	.byte	0xc1
+	.4byte	0x25c7
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2a
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -104
+	.uleb128 0x2a
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x37
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xa8
+	.4byte	.LLST65
+	.uleb128 0x37
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0xa8
+	.4byte	.LLST66
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xc6
+	.4byte	0x59
+	.4byte	.LLST67
+	.uleb128 0x37
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0xc7
+	.4byte	0x59
+	.4byte	.LLST68
+	.uleb128 0x37
+	.4byte	.LASF454
+	.byte	0x1
+	.byte	0xc8
+	.4byte	0xa8
+	.4byte	.LLST69
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xec
+	.4byte	0x25d
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -112
+	.uleb128 0x3d
+	.4byte	0x28ba
+	.8byte	.LBB40
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x1
+	.byte	0xcb
+	.4byte	0x223d
+	.uleb128 0x3e
+	.4byte	0x28d1
+	.4byte	.LLST70
+	.uleb128 0x3e
+	.4byte	0x28c6
+	.4byte	.LLST71
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0xd0
+	.uleb128 0x40
+	.4byte	0x28dc
+	.4byte	.LLST72
+	.uleb128 0x40
+	.4byte	0x28e5
+	.4byte	.LLST73
+	.uleb128 0x42
+	.8byte	.LVL183
+	.4byte	0x2b65
+	.4byte	0x2208
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL184
+	.4byte	0x2b65
+	.4byte	0x2227
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL193
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.4byte	0x2869
+	.8byte	.LBB54
+	.4byte	.Ldebug_ranges0+0x150
+	.byte	0x1
+	.2byte	0x152
+	.4byte	0x229d
+	.uleb128 0x44
+	.4byte	0x288f
+	.uleb128 0x44
+	.4byte	0x2884
+	.uleb128 0x44
+	.4byte	0x2879
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x40
+	.4byte	0x289a
+	.4byte	.LLST74
+	.uleb128 0x41
+	.4byte	0x28a3
+	.uleb128 0x40
+	.4byte	0x28ae
+	.4byte	.LLST75
+	.uleb128 0x33
+	.8byte	.LVL272
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC33
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL187
+	.4byte	0x2b91
+	.4byte	0x22bb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x88
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL197
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL199
+	.4byte	0x2b9c
+	.4byte	0x22eb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 0
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x130
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL202
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL203
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL204
+	.4byte	0x2b65
+	.4byte	0x2324
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC36
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL207
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL208
+	.4byte	0x270b
+	.uleb128 0x4f
+	.8byte	.LVL215
+	.4byte	0x2692
+	.uleb128 0x4f
+	.8byte	.LVL216
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL220
+	.4byte	0x25e7
+	.uleb128 0x42
+	.8byte	.LVL221
+	.4byte	0x2b65
+	.4byte	0x2389
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x3a
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL225
+	.4byte	0x2b65
+	.4byte	0x23a9
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL226
+	.4byte	0x2b65
+	.4byte	0x23d5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 216
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL227
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL228
+	.4byte	0x1aae
+	.4byte	0x2400
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL231
+	.4byte	0x28f1
+	.4byte	0x241e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL234
+	.4byte	0x1e16
+	.4byte	0x243c
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL237
+	.4byte	0x270b
+	.4byte	0x2458
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x6
+	.byte	0x8b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL240
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL241
+	.4byte	0x1aae
+	.4byte	0x2483
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL244
+	.4byte	0x28f1
+	.4byte	0x24a1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL247
+	.4byte	0x1e16
+	.4byte	0x24bf
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL249
+	.4byte	0x2ba7
+	.uleb128 0x42
+	.8byte	.LVL255
+	.4byte	0x2b65
+	.4byte	0x2504
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x15
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x3
+	.8byte	.LANCHOR2
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL281
+	.4byte	0x2b65
+	.4byte	0x2522
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL286
+	.4byte	0x1aae
+	.uleb128 0x4f
+	.8byte	.LVL288
+	.4byte	0x2ba7
+	.uleb128 0x4f
+	.8byte	.LVL293
+	.4byte	0x28f1
+	.uleb128 0x4f
+	.8byte	.LVL294
+	.4byte	0x1e16
+	.uleb128 0x42
+	.8byte	.LVL299
+	.4byte	0x2b65
+	.4byte	0x257b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL300
+	.4byte	0x2bb2
+	.4byte	0x259f
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 240
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL303
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC29
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x67c
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x4
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25e7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x3
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF456
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2692
+	.uleb128 0x36
+	.string	"uv"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.4byte	.LLST1
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xa6
+	.4byte	0x25d
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0x59
+	.4byte	.LLST2
+	.uleb128 0x42
+	.8byte	.LVL11
+	.4byte	0x2bbd
+	.4byte	0x2658
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 56
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL14
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL18
+	.4byte	0x2bc9
+	.4byte	0x267d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL21
+	.4byte	0x2bd5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x64
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF457
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x59
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x270b
+	.uleb128 0x31
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x109
+	.4byte	.LLST0
+	.uleb128 0x4f
+	.8byte	.LVL2
+	.4byte	0x2be0
+	.uleb128 0x4f
+	.8byte	.LVL3
+	.4byte	0x2beb
+	.uleb128 0x4f
+	.8byte	.LVL4
+	.4byte	0x2bf6
+	.uleb128 0x33
+	.8byte	.LVL7
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF459
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x59
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2869
+	.uleb128 0x31
+	.4byte	.LASF460
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST17
+	.uleb128 0x31
+	.4byte	.LASF461
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST18
+	.uleb128 0x31
+	.4byte	.LASF462
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x109
+	.4byte	.LLST19
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0x6b
+	.4byte	0xa8
+	.4byte	.LLST20
+	.uleb128 0x37
+	.4byte	.LASF463
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST21
+	.uleb128 0x37
+	.4byte	.LASF464
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST22
+	.uleb128 0x37
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST23
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0x6d
+	.4byte	0x59
+	.4byte	.LLST24
+	.uleb128 0x4f
+	.8byte	.LVL73
+	.4byte	0x2c01
+	.uleb128 0x4f
+	.8byte	.LVL75
+	.4byte	0x2be0
+	.uleb128 0x42
+	.8byte	.LVL78
+	.4byte	0x2b65
+	.4byte	0x27da
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL79
+	.4byte	0x2beb
+	.4byte	0x27f8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x8a
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL80
+	.4byte	0x2bf6
+	.uleb128 0x42
+	.8byte	.LVL83
+	.4byte	0x2b65
+	.4byte	0x281d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL84
+	.4byte	0x1aae
+	.4byte	0x2836
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL87
+	.4byte	0x2b65
+	.4byte	0x285b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC15
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL92
+	.4byte	0x2ba7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF465
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x28ba
+	.uleb128 0x3c
+	.string	"arg"
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF467
+	.byte	0x1
+	.byte	0x4c
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF493
+	.byte	0x1
+	.byte	0x2d
+	.byte	0x1
+	.4byte	0x28f1
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF468
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b2d
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST42
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST43
+	.uleb128 0x37
+	.4byte	.LASF469
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST44
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST45
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x32
+	.string	"q"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST47
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x4
+	.byte	0x30
+	.4byte	0x2042
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x1365
+	.4byte	.LLST48
+	.uleb128 0x51
+	.4byte	.LASF470
+	.4byte	0x2b3d
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC45
+	.uleb128 0x42
+	.8byte	.LVL123
+	.4byte	0x2b65
+	.4byte	0x29b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL125
+	.4byte	0x2b65
+	.4byte	0x29d3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL127
+	.4byte	0x2b65
+	.4byte	0x29f1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL130
+	.4byte	0x1a10
+	.4byte	0x2a1b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL131
+	.4byte	0x1904
+	.4byte	0x2a44
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL139
+	.4byte	0x2b65
+	.4byte	0x2a63
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL140
+	.4byte	0x2c0d
+	.4byte	0x2a7b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL143
+	.4byte	0x2b65
+	.4byte	0x2aa0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC21
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL146
+	.4byte	0x2b65
+	.4byte	0x2abe
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL147
+	.4byte	0x2b65
+	.4byte	0x2adc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL149
+	.4byte	0x1a10
+	.4byte	0x2b06
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL150
+	.4byte	0x1904
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xe7
+	.4byte	0x2b3d
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x9
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2b2d
+	.uleb128 0x52
+	.4byte	0x1a98
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b65
+	.uleb128 0x53
+	.4byte	0x1aa4
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x25
+	.byte	0x12
+	.uleb128 0x55
+	.4byte	.LASF472
+	.4byte	.LASF472
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x56
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.uleb128 0x55
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x54
+	.4byte	.LASF474
+	.4byte	.LASF474
+	.byte	0xa
+	.byte	0x2d
+	.uleb128 0x54
+	.4byte	.LASF475
+	.4byte	.LASF475
+	.byte	0x26
+	.byte	0x29
+	.uleb128 0x54
+	.4byte	.LASF476
+	.4byte	.LASF476
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x54
+	.4byte	.LASF477
+	.4byte	.LASF477
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x55
+	.4byte	.LASF478
+	.4byte	.LASF478
+	.byte	0x27
+	.2byte	0x1da
+	.uleb128 0x55
+	.4byte	.LASF479
+	.4byte	.LASF479
+	.byte	0x27
+	.2byte	0x116
+	.uleb128 0x54
+	.4byte	.LASF480
+	.4byte	.LASF480
+	.byte	0x28
+	.byte	0xb
+	.uleb128 0x54
+	.4byte	.LASF481
+	.4byte	.LASF481
+	.byte	0x29
+	.byte	0xc
+	.uleb128 0x54
+	.4byte	.LASF482
+	.4byte	.LASF482
+	.byte	0x29
+	.byte	0xa
+	.uleb128 0x54
+	.4byte	.LASF483
+	.4byte	.LASF483
+	.byte	0x29
+	.byte	0xb
+	.uleb128 0x55
+	.4byte	.LASF484
+	.4byte	.LASF484
+	.byte	0x6
+	.2byte	0x2b9
+	.uleb128 0x55
+	.4byte	.LASF485
+	.4byte	.LASF485
+	.byte	0x1d
+	.2byte	0x398
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x35
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xe
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x13
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x15
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x16
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x17
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x18
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x19
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1c
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x1d
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1f
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x20
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x21
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x22
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x23
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x24
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x25
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0xb
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x26
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x27
+	.uleb128 0x13
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x28
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x29
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2a
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x2c
+	.uleb128 0x17
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2e
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x30
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x33
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x55
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST76:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL306
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL308
+	.8byte	.LVL309
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL309
+	.8byte	.LVL310
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL310
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL105
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL106
+	.8byte	.LVL108
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL108
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL114
+	.8byte	.LVL117
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL105
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL105
+	.8byte	.LVL107
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL107
+	.8byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL105
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x54
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL108
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL117
+	.8byte	.LVL119
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL120
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL116
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL98
+	.8byte	.LVL100
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL97
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL99
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL22
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL22
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL24
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL23
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL29
+	.8byte	.LVL32-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL35
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL42
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL31
+	.8byte	.LVL34
+	.2byte	0x3
+	.byte	0x8c
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL42
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL42
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL42
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL24
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL26
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL24
+	.8byte	.LVL30
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL36
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL36
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL50
+	.8byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL51
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL56
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL47
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL54
+	.8byte	.LVL55
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL47
+	.8byte	.LVL52
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LVL58
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL58
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL174
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL153
+	.8byte	.LVL154
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL154
+	.8byte	.LVL162
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL162
+	.8byte	.LVL163
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL167
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -40
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL156
+	.8byte	.LVL166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL170
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL159
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL176
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL178
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL175
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL177
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL196
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL297
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL297
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL217
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL218
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL223
+	.8byte	.LVL256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL303
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL186
+	.8byte	.LVL188
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL221
+	.8byte	.LVL222
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL257
+	.8byte	.LVL258
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL258
+	.8byte	.LVL259
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL281
+	.8byte	.LVL282
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL285
+	.8byte	.LVL289
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL292
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL296
+	.8byte	.LVL298
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL198
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL205
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL268
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL291
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL291
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL229
+	.8byte	.LVL232
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL235
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL235
+	.8byte	.LVL238
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL242
+	.8byte	.LVL245
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL245
+	.8byte	.LVL248
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL261
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL261
+	.8byte	.LVL262
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL262
+	.8byte	.LVL263
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL264
+	.8byte	.LVL265
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL265
+	.8byte	.LVL266
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL266
+	.8byte	.LVL268
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL287
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL222
+	.8byte	.LVL223
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL223
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL214
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL218
+	.8byte	.LVL254
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL272
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL272
+	.8byte	.LVL274
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL178
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL201
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL205
+	.8byte	.LVL206
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL206
+	.8byte	.LVL209
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL209
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL211
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL218
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL219
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL223
+	.8byte	.LVL229
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL229
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL230
+	.8byte	.LVL232
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL232
+	.8byte	.LVL233
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL233
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL235
+	.8byte	.LVL236
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL236
+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL238
+	.8byte	.LVL239
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL239
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL242
+	.8byte	.LVL243
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL243
+	.8byte	.LVL244-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL244-1
+	.8byte	.LVL245
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL245
+	.8byte	.LVL246
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL246
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL248
+	.8byte	.LVL249-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL249-1
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL250
+	.8byte	.LVL252
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL256
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL260
+	.8byte	.LVL263
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL263
+	.8byte	.LVL264
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL264
+	.8byte	.LVL267
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL267
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL268
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL279
+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL282
+	.8byte	.LVL284
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL284
+	.8byte	.LVL287
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL287
+	.8byte	.LVL288-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL288-1
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL292
+	.8byte	.LVL295
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL295
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL296
+	.8byte	.LVL301
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL302
+	.8byte	.LVL303-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL303-1
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL252
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL253
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL256
+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL282
+	.8byte	.LVL283
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL284
+	.8byte	.LVL303
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL222
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL182
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL189
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL190
+	.8byte	.LVL191
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL210
+	.8byte	.LVL212
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL213
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL269
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL269
+	.8byte	.LVL270
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL270
+	.8byte	.LVL271
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL275
+	.8byte	.LVL276
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL276
+	.8byte	.LVL277
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL277
+	.8byte	.LVL278
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL278
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL269
+	.8byte	.LVL272
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL20
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL2-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2
+	.8byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL6
+	.8byte	.LVL7-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL7-1
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LVL69
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL70
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL65
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL68
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL65
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL72
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL89
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL71
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL77
+	.8byte	.LVL78-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LVL83-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL65
+	.8byte	.LVL85
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL86
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL91
+	.8byte	.LVL92-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL92-1
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL94
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL121
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL133
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL121
+	.8byte	.LVL123-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL123-1
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL134
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL124
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL146
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL147
+	.8byte	.LVL148
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL125
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL136
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL145
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL124
+	.8byte	.LVL125
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL127
+	.8byte	.LVL135
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL141
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL142
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xcc
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB19
+	.8byte	.LBE19
+	.8byte	.LBB20
+	.8byte	.LBE20
+	.8byte	.LBB24
+	.8byte	.LBE24
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB21
+	.8byte	.LBE21
+	.8byte	.LBB25
+	.8byte	.LBE25
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB29
+	.8byte	.LBE29
+	.8byte	.LBB34
+	.8byte	.LBE34
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB40
+	.8byte	.LBE40
+	.8byte	.LBB48
+	.8byte	.LBE48
+	.8byte	.LBB49
+	.8byte	.LBE49
+	.8byte	.LBB50
+	.8byte	.LBE50
+	.8byte	.LBB51
+	.8byte	.LBE51
+	.8byte	.LBB52
+	.8byte	.LBE52
+	.8byte	.LBB53
+	.8byte	.LBE53
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB54
+	.8byte	.LBE54
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256
+	.8byte	.LFB257
+	.8byte	.LFE257
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF416:
+	.string	"test_pattern"
+.LASF399:
+	.string	"puts"
+.LASF64:
+	.string	"reserved"
+.LASF470:
+	.string	"__func__"
+.LASF464:
+	.string	"target_freq"
+.LASF138:
+	.string	"bootm_headers"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF156:
+	.string	"rd_end"
+.LASF318:
+	.string	"eth_device"
+.LASF452:
+	.string	"test_banks"
+.LASF127:
+	.string	"ih_comp"
+.LASF23:
+	.string	"_Bool"
+.LASF334:
+	.string	"net_root_path"
+.LASF445:
+	.string	"cmdtp"
+.LASF365:
+	.string	"unbind"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF35:
+	.string	"priv"
+.LASF486:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF22:
+	.string	"___strtok"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF431:
+	.string	"capacity"
+.LASF279:
+	.string	"ram_size"
+.LASF332:
+	.string	"net_nis_domain"
+.LASF438:
+	.string	"diagonalscan"
+.LASF36:
+	.string	"uclass"
+.LASF185:
+	.string	"UCLASS_CODEC"
+.LASF47:
+	.string	"next"
+.LASF375:
+	.string	"length"
+.LASF381:
+	.string	"uc_drv"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF168:
+	.string	"uclass_id"
+.LASF491:
+	.string	"cpu_2_io"
+.LASF330:
+	.string	"net_netmask"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF369:
+	.string	"child_post_remove"
+.LASF323:
+	.string	"recv"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF481:
+	.string	"rockchip_ddrclk_sip_round_rate_v2"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF268:
+	.string	"global_data"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF84:
+	.string	"bi_dram"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF297:
+	.string	"malloc_ptr"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF417:
+	.string	"test_pat_param"
+.LASF103:
+	.string	"fdt_header"
+.LASF292:
+	.string	"env_buf"
+.LASF418:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF106:
+	.string	"off_dt_struct"
+.LASF405:
+	.string	"console_devices"
+.LASF353:
+	.string	"NETLOOP_CONTINUE"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF473:
+	.string	"memcpy"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF243:
+	.string	"UCLASS_VIDEO"
+.LASF357:
+	.string	"net_state"
+.LASF487:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF287:
+	.string	"uclass_root"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF354:
+	.string	"NETLOOP_RESTART"
+.LASF453:
+	.string	"abort"
+.LASF406:
+	.string	"cd_count"
+.LASF371:
+	.string	"platdata_auto_alloc_size"
+.LASF317:
+	.string	"s_addr"
+.LASF450:
+	.string	"err_case"
+.LASF167:
+	.string	"command_ret_t"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF169:
+	.string	"UCLASS_ROOT"
+.LASF301:
+	.string	"pm_ctx_phys"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF463:
+	.string	"delta_freq"
+.LASF326:
+	.string	"index"
+.LASF458:
+	.string	"freq"
+.LASF94:
+	.string	"maxargs"
+.LASF121:
+	.string	"ih_load"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF408:
+	.string	"SCANFREQ"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF271:
+	.string	"pci_clk"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF366:
+	.string	"ofdata_to_platdata"
+.LASF125:
+	.string	"ih_arch"
+.LASF309:
+	.string	"gd_t"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF5:
+	.string	"__u8"
+.LASF329:
+	.string	"net_gateway"
+.LASF351:
+	.string	"net_ping_ip"
+.LASF135:
+	.string	"type"
+.LASF465:
+	.string	"get_test_addr"
+.LASF61:
+	.string	"lmb_region"
+.LASF423:
+	.string	"wr_val"
+.LASF55:
+	.string	"protect"
+.LASF260:
+	.string	"tlb_addr"
+.LASF426:
+	.string	"print_memory"
+.LASF439:
+	.string	"next_adr"
+.LASF39:
+	.string	"uclass_node"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF350:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF24:
+	.string	"image_base"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF397:
+	.string	"stop"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF52:
+	.string	"sector_count"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF434:
+	.string	"err_addr"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF266:
+	.string	"baudrate"
+.LASF358:
+	.string	"mem_malloc_start"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF129:
+	.string	"image_header_t"
+.LASF382:
+	.string	"dev_head"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF126:
+	.string	"ih_type"
+.LASF0:
+	.string	"unsigned char"
+.LASF409:
+	.string	"RANDOM"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF477:
+	.string	"uclass_get_device"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF270:
+	.string	"bus_clk"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF379:
+	.string	"p_current"
+.LASF342:
+	.string	"net_rx_packet_len"
+.LASF344:
+	.string	"net_null_ethaddr"
+.LASF53:
+	.string	"flash_id"
+.LASF313:
+	.string	"load_addr"
+.LASF424:
+	.string	"reread"
+.LASF321:
+	.string	"init"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF437:
+	.string	"cmp_value"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF363:
+	.string	"probe"
+.LASF378:
+	.string	"ofnode"
+.LASF269:
+	.string	"cpu_clk"
+.LASF308:
+	.string	"sibling"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF115:
+	.string	"fdt32_t"
+.LASF376:
+	.string	"value"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF440:
+	.string	"page_size"
+.LASF132:
+	.string	"image_len"
+.LASF280:
+	.string	"mon_len"
+.LASF63:
+	.string	"memory"
+.LASF492:
+	.string	"exit"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF451:
+	.string	"test_times"
+.LASF373:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF469:
+	.string	"shift"
+.LASF21:
+	.string	"errno"
+.LASF51:
+	.string	"size"
+.LASF333:
+	.string	"net_hostname"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF396:
+	.string	"stdio_dev"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF131:
+	.string	"image_start"
+.LASF18:
+	.string	"uint8_t"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF392:
+	.string	"destroy"
+.LASF461:
+	.string	"max_freq"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF368:
+	.string	"child_pre_probe"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF33:
+	.string	"driver_data"
+.LASF427:
+	.string	"write_buf_to_ddr"
+.LASF383:
+	.string	"udevice_id"
+.LASF370:
+	.string	"priv_auto_alloc_size"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF327:
+	.string	"eth_current"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF4:
+	.string	"uchar"
+.LASF120:
+	.string	"ih_size"
+.LASF267:
+	.string	"addr"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF256:
+	.string	"arch_global_data"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF389:
+	.string	"pre_probe"
+.LASF319:
+	.string	"enetaddr"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF421:
+	.string	"prt_en"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF296:
+	.string	"malloc_limit"
+.LASF65:
+	.string	"bd_info"
+.LASF372:
+	.string	"per_child_auto_alloc_size"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF281:
+	.string	"irq_sp"
+.LASF402:
+	.string	"list"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF282:
+	.string	"start_addr_sp"
+.LASF337:
+	.string	"net_ip"
+.LASF475:
+	.string	"strict_strtoul"
+.LASF320:
+	.string	"iobase"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF56:
+	.string	"flash_info_t"
+.LASF471:
+	.string	"printf"
+.LASF444:
+	.string	"os_reg"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF314:
+	.string	"save_addr"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF377:
+	.string	"of_offset"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF300:
+	.string	"video_bottom"
+.LASF454:
+	.string	"scan_freq_loop"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF415:
+	.string	"g_isi_pattern"
+.LASF108:
+	.string	"off_mem_rsvmap"
+.LASF362:
+	.string	"bind"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF116:
+	.string	"image_header"
+.LASF110:
+	.string	"last_comp_version"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF414:
+	.string	"TESTCASSMAX"
+.LASF298:
+	.string	"cur_serial_dev"
+.LASF57:
+	.string	"flash_info"
+.LASF16:
+	.string	"ushort"
+.LASF395:
+	.string	"console_buffer"
+.LASF104:
+	.string	"magic"
+.LASF305:
+	.string	"full_name"
+.LASF472:
+	.string	"memset"
+.LASF331:
+	.string	"net_dns_server"
+.LASF482:
+	.string	"rockchip_ddrclk_sip_set_rate_v2"
+.LASF403:
+	.string	"stdio_devices"
+.LASF462:
+	.string	"times"
+.LASF355:
+	.string	"NETLOOP_SUCCESS"
+.LASF28:
+	.string	"name"
+.LASF264:
+	.string	"pre_serial"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF96:
+	.string	"usage"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF41:
+	.string	"sibling_node"
+.LASF160:
+	.string	"initrd_end"
+.LASF310:
+	.string	"monitor_flash_len"
+.LASF398:
+	.string	"putc"
+.LASF360:
+	.string	"mem_malloc_brk"
+.LASF12:
+	.string	"phys_size_t"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF293:
+	.string	"timebase_h"
+.LASF294:
+	.string	"timebase_l"
+.LASF13:
+	.string	"sizetype"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF341:
+	.string	"net_rx_packet"
+.LASF459:
+	.string	"scan_freq"
+.LASF393:
+	.string	"per_device_auto_alloc_size"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF2:
+	.string	"short unsigned int"
+.LASF3:
+	.string	"signed char"
+.LASF339:
+	.string	"net_tx_packet"
+.LASF54:
+	.string	"start"
+.LASF380:
+	.string	"current"
+.LASF412:
+	.string	"FASTTEST"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF134:
+	.string	"comp"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF286:
+	.string	"dm_root_f"
+.LASF37:
+	.string	"uclass_priv"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF407:
+	.string	"CHANGEFREQ"
+.LASF299:
+	.string	"video_top"
+.LASF343:
+	.string	"net_bcast_ethaddr"
+.LASF164:
+	.string	"state"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF20:
+	.string	"__be32"
+.LASF162:
+	.string	"cmdline_end"
+.LASF38:
+	.string	"parent_priv"
+.LASF340:
+	.string	"net_rx_packets"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF277:
+	.string	"ram_top"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF442:
+	.string	"next_col"
+.LASF348:
+	.string	"net_boot_file_name"
+.LASF391:
+	.string	"pre_remove"
+.LASF324:
+	.string	"halt"
+.LASF117:
+	.string	"ih_magic"
+.LASF285:
+	.string	"dm_root"
+.LASF17:
+	.string	"ulong"
+.LASF62:
+	.string	"region"
+.LASF7:
+	.string	"__u32"
+.LASF338:
+	.string	"net_server_ip"
+.LASF364:
+	.string	"remove"
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF291:
+	.string	"of_root"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF367:
+	.string	"child_post_bind"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF15:
+	.string	"long int"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF446:
+	.string	"flag"
+.LASF401:
+	.string	"getc"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF436:
+	.string	"random_test1"
+.LASF435:
+	.string	"random_test2"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF449:
+	.string	"test_case"
+.LASF441:
+	.string	"pattern"
+.LASF387:
+	.string	"post_bind"
+.LASF335:
+	.string	"net_ethaddr"
+.LASF316:
+	.string	"in_addr"
+.LASF19:
+	.string	"uint32_t"
+.LASF130:
+	.string	"image_info"
+.LASF119:
+	.string	"ih_time"
+.LASF467:
+	.string	"available"
+.LASF489:
+	.string	"jt_funcs"
+.LASF490:
+	.string	"ofnode_union"
+.LASF474:
+	.string	"strcasecmp"
+.LASF58:
+	.string	"long double"
+.LASF112:
+	.string	"size_dt_strings"
+.LASF137:
+	.string	"image_info_t"
+.LASF302:
+	.string	"serial"
+.LASF443:
+	.string	"get_page_size"
+.LASF1:
+	.string	"long unsigned int"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF50:
+	.string	"select_hwpart"
+.LASF346:
+	.string	"net_native_vlan"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF336:
+	.string	"net_server_ethaddr"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF166:
+	.string	"images"
+.LASF428:
+	.string	"cmp_buf_data"
+.LASF288:
+	.string	"fdt_blob"
+.LASF14:
+	.string	"char"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF476:
+	.string	"ctrlc"
+.LASF400:
+	.string	"tstc"
+.LASF29:
+	.string	"platdata"
+.LASF433:
+	.string	"reread_val"
+.LASF133:
+	.string	"load"
+.LASF352:
+	.string	"net_loop_state"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF429:
+	.string	"random_test"
+.LASF411:
+	.string	"DIAGONALSCAN"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF32:
+	.string	"node"
+.LASF289:
+	.string	"new_fdt"
+.LASF420:
+	.string	"start_adr"
+.LASF136:
+	.string	"arch"
+.LASF274:
+	.string	"have_console"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF98:
+	.string	"complete"
+.LASF261:
+	.string	"tlb_size"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF356:
+	.string	"NETLOOP_FAIL"
+.LASF410:
+	.string	"CROSSTALK"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF283:
+	.string	"reloc_off"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF359:
+	.string	"mem_malloc_end"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF49:
+	.string	"block_drvr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF485:
+	.string	"malloc"
+.LASF404:
+	.string	"stdio_names"
+.LASF27:
+	.string	"driver"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF322:
+	.string	"send"
+.LASF325:
+	.string	"write_hwaddr"
+.LASF483:
+	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
+.LASF275:
+	.string	"env_addr"
+.LASF384:
+	.string	"compatible"
+.LASF290:
+	.string	"fdt_size"
+.LASF272:
+	.string	"mem_clk"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF447:
+	.string	"argc"
+.LASF480:
+	.string	"udelay"
+.LASF85:
+	.string	"bd_t"
+.LASF122:
+	.string	"ih_ep"
+.LASF66:
+	.string	"bi_memstart"
+.LASF306:
+	.string	"properties"
+.LASF448:
+	.string	"argv"
+.LASF150:
+	.string	"fit_uname_fdt"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF46:
+	.string	"list_head"
+.LASF388:
+	.string	"pre_unbind"
+.LASF303:
+	.string	"device_node"
+.LASF157:
+	.string	"ft_addr"
+.LASF258:
+	.string	"lastinc"
+.LASF385:
+	.string	"data"
+.LASF311:
+	.string	"__dtb_dt_begin"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF422:
+	.string	"buful"
+.LASF304:
+	.string	"phandle"
+.LASF40:
+	.string	"child_head"
+.LASF60:
+	.string	"base"
+.LASF278:
+	.string	"relocaddr"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF161:
+	.string	"cmdline_start"
+.LASF374:
+	.string	"property"
+.LASF455:
+	.string	"do_ddr_test"
+.LASF284:
+	.string	"new_gd"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF276:
+	.string	"env_valid"
+.LASF312:
+	.string	"__dtb_dt_spl_begin"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF34:
+	.string	"parent"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF107:
+	.string	"off_dt_strings"
+.LASF432:
+	.string	"wr_value"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF460:
+	.string	"min_freq"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF273:
+	.string	"fb_base"
+.LASF390:
+	.string	"post_probe"
+.LASF425:
+	.string	"err_adr"
+.LASF95:
+	.string	"repeatable"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF347:
+	.string	"net_restart_wrap"
+.LASF111:
+	.string	"boot_cpuid_phys"
+.LASF59:
+	.string	"lmb_property"
+.LASF488:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF484:
+	.string	"rand"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF361:
+	.string	"of_match"
+.LASF9:
+	.string	"long long int"
+.LASF478:
+	.string	"regulator_get_by_platname"
+.LASF493:
+	.string	"print_available_addr"
+.LASF159:
+	.string	"initrd_start"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF386:
+	.string	"uclass_driver"
+.LASF479:
+	.string	"regulator_set_value"
+.LASF466:
+	.string	"max_bank"
+.LASF30:
+	.string	"parent_platdata"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF45:
+	.string	"udevice"
+.LASF345:
+	.string	"net_our_vlan"
+.LASF419:
+	.string	"buf_len"
+.LASF124:
+	.string	"ih_os"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF43:
+	.string	"req_seq"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF315:
+	.string	"save_size"
+.LASF109:
+	.string	"version"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF394:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF8:
+	.string	"unsigned int"
+.LASF413:
+	.string	"FULLTEST"
+.LASF430:
+	.string	"baseaddr"
+.LASF114:
+	.string	"working_fdt"
+.LASF468:
+	.string	"crosstalk"
+.LASF328:
+	.string	"push_packet"
+.LASF113:
+	.string	"size_dt_struct"
+.LASF128:
+	.string	"ih_name"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF6:
+	.string	"short int"
+.LASF307:
+	.string	"child"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF97:
+	.string	"help"
+.LASF48:
+	.string	"prev"
+.LASF349:
+	.string	"net_boot_file_size"
+.LASF158:
+	.string	"ft_len"
+.LASF105:
+	.string	"totalsize"
+.LASF295:
+	.string	"malloc_base"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF42:
+	.string	"flags"
+.LASF155:
+	.string	"rd_start"
+	.hidden	malloc
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk1808.S b/cmd/ddr_tool/ddr_test_rk1808.S
new file mode 100644
index 0000000000..a898fe976b
--- /dev/null
+++ b/cmd/ddr_tool/ddr_test_rk1808.S
@@ -0,0 +1,10918 @@
+	.arch armv8-a+nosimd
+	.file	"ddr_test_code.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB258:
+	.file 1 "cmd/ddr_tool/ddr_tool.c"
+	.loc 1 165 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 169 0
+	add	x1, x29, 40
+	.loc 1 165 0
+	mov	w20, w0
+	.loc 1 169 0
+	adrp	x0, .LC1
+.LVL1:
+	add	x0, x0, :lo12:.LC1
+	bl	regulator_get_by_platname
+.LVL2:
+	.loc 1 170 0
+	cbz	w0, .L2
+	mov	w19, w0
+	.loc 1 171 0
+	adrp	x0, .LC2
+.LVL3:
+	add	x0, x0, :lo12:.LC2
+.LVL4:
+.L8:
+	.loc 1 179 0
+	bl	printf
+.LVL5:
+.L1:
+	.loc 1 181 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL6:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL7:
+.L2:
+	.cfi_restore_state
+	.loc 1 176 0
+	ldr	x0, [x29, 40]
+.LVL8:
+	mov	w1, w20
+	bl	regulator_set_value
+.LVL9:
+	mov	w19, w0
+.LVL10:
+	.loc 1 177 0
+	mov	x0, 100
+.LVL11:
+	bl	udelay
+.LVL12:
+	.loc 1 178 0
+	cbz	w19, .L1
+	.loc 1 179 0
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	b	.L8
+	.cfi_endproc
+.LFE258:
+	.size	set_vdd_logic, .-set_vdd_logic
+	.section	.text.random_test,"ax",@progbits
+	.align	2
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB275:
+	.file 2 "cmd/ddr_tool/random_test.c"
+	.loc 2 88 0
+	.cfi_startproc
+.LVL13:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB18:
+.LBB19:
+	.loc 2 18 0
+	mov	x2, x1
+.LBE19:
+.LBE18:
+	.loc 2 88 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+.LVL14:
+	stp	x23, x24, [sp, 48]
+.LBB24:
+.LBB20:
+	.loc 2 37 0
+	adrp	x21, .LC5
+.LBE20:
+.LBE24:
+	.loc 2 88 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	mov	x23, x1
+.LVL15:
+	stp	x19, x20, [sp, 16]
+.LBB25:
+.LBB21:
+	.loc 2 18 0
+	mov	w1, -2139062144
+.LVL16:
+.LBE21:
+.LBE25:
+	.loc 2 88 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB26:
+.LBB22:
+	.loc 2 23 0
+	adrp	x24, .LC4
+	.loc 2 18 0
+	bl	memset
+.LVL17:
+	.loc 2 23 0
+	add	x24, x24, :lo12:.LC4
+	.loc 2 37 0
+	add	x21, x21, :lo12:.LC5
+	.loc 2 24 0
+	lsr	x0, x23, 2
+	.loc 2 14 0
+	mov	w27, 0
+	.loc 2 20 0
+	mov	w25, 1077952576
+	.loc 2 19 0
+	mov	w20, -2139062144
+	.loc 2 22 0
+	mov	w28, 0
+	.loc 2 24 0
+	str	x0, [x29, 96]
+.LVL18:
+.L15:
+	.loc 2 23 0
+	mov	w1, w28
+	mov	x0, x24
+	bl	printf
+.LVL19:
+	.loc 2 24 0
+	mov	w1, 0
+.LVL20:
+.L10:
+	ldr	x2, [x29, 96]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L14
+.LVL21:
+.L13:
+	.loc 2 37 0
+	mov	x0, x21
+	.loc 2 22 0
+	add	w28, w28, 1
+.LVL22:
+	.loc 2 37 0
+	bl	printf
+.LVL23:
+	.loc 2 35 0
+	lsr	w25, w25, 1
+.LVL24:
+	.loc 2 36 0
+	lsr	w20, w20, 1
+.LVL25:
+	.loc 2 22 0
+	cmp	w28, 8
+	bne	.L15
+	mov	x19, -1
+	b	.L12
+.LVL26:
+.L14:
+	.loc 2 25 0
+	lsl	x0, x0, 2
+	add	x19, x22, x0
+	ldr	w2, [x22, x0]
+	str	w2, [x29, 108]
+	.loc 2 26 0
+	uxtw	x2, w2
+	cmp	w2, w20
+	beq	.L11
+.LVL27:
+	.loc 2 28 0
+	ldr	w27, [x19]
+	.loc 2 33 0
+	cmn	x19, #1
+	beq	.L13
+.LVL28:
+.L12:
+	.loc 2 39 0
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.LVL29:
+	.loc 2 40 0
+	cmn	x19, #1
+	beq	.L16
+	.loc 2 41 0
+	ldr	w2, [x29, 108]
+	adrp	x0, .LC7
+	mov	w4, w20
+	mov	w3, w27
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.LVL30:
+.L29:
+.LBE22:
+.LBE26:
+.LBB27:
+.LBB28:
+	.loc 2 82 0
+	mov	w0, -1
+.L9:
+.LBE28:
+.LBE27:
+	.loc 2 96 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL31:
+	ldp	x23, x24, [sp, 48]
+.LVL32:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL33:
+.L11:
+	.cfi_restore_state
+.LBB30:
+.LBB23:
+	.loc 2 31 0
+	str	w25, [x22, x0]
+	.loc 2 24 0
+	add	w1, w1, 1
+.LVL34:
+	b	.L10
+.LVL35:
+.L16:
+.LBE23:
+.LBE30:
+.LBB31:
+.LBB29:
+	.loc 2 58 0
+	adrp	x25, .LC8
+.LVL36:
+	.loc 2 76 0
+	adrp	x24, .LC9
+	.loc 2 66 0
+	lsr	x28, x23, 3
+.LVL37:
+	.loc 2 58 0
+	add	x25, x25, :lo12:.LC8
+	.loc 2 76 0
+	add	x24, x24, :lo12:.LC9
+	.loc 2 66 0
+	mov	x27, 0
+	mov	x19, 0
+.LVL38:
+.L23:
+	.loc 2 58 0
+	mov	x1, x19
+	mov	x0, x25
+	bl	printf
+.LVL39:
+	.loc 2 60 0
+	lsl	x20, x19, 8
+	lsl	x0, x19, 24
+	orr	x20, x20, x19, lsl 16
+	orr	x0, x0, x19, lsl 32
+	.loc 2 64 0
+	mov	x2, x23
+	.loc 2 60 0
+	orr	x20, x20, x0
+	lsl	x0, x19, 40
+	orr	x0, x0, x19, lsl 48
+	orr	x20, x20, x0
+	orr	x0, x19, x19, lsl 56
+	orr	x20, x20, x0
+.LVL40:
+	.loc 2 64 0
+	mov	x0, x22
+	mov	w1, w20
+	bl	memset
+.LVL41:
+	.loc 2 66 0
+	mov	x0, 0
+.LVL42:
+.L18:
+	cmp	x0, x28
+	bne	.L22
+.LVL43:
+.L21:
+	.loc 2 76 0
+	mov	x0, x24
+.LVL44:
+	.loc 2 57 0
+	add	x19, x19, 1
+.LVL45:
+	.loc 2 76 0
+	bl	printf
+.LVL46:
+	.loc 2 57 0
+	cmp	x19, 256
+	bne	.L23
+	mov	x21, -1
+	b	.L20
+.LVL47:
+.L22:
+	lsl	x1, x0, 3
+	add	x21, x1, x22
+	.loc 2 67 0
+	ldr	x26, [x1, x22]
+.LVL48:
+	.loc 2 68 0
+	cmp	x20, x26
+	beq	.L19
+.LVL49:
+	.loc 2 70 0
+	ldr	x27, [x21]
+.LVL50:
+	.loc 2 74 0
+	cmn	x21, #1
+	beq	.L21
+.LVL51:
+.L20:
+	.loc 2 78 0
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+.LVL52:
+	.loc 2 84 0
+	mov	w0, 0
+	.loc 2 79 0
+	cmn	x21, #1
+	beq	.L9
+	.loc 2 80 0
+	mov	x4, x20
+	mov	x3, x27
+	mov	x2, x26
+	mov	x1, x21
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.LVL53:
+	b	.L29
+.LVL54:
+.L19:
+	.loc 2 66 0
+	add	x0, x0, 1
+.LVL55:
+	b	.L18
+.LBE29:
+.LBE31:
+	.cfi_endproc
+.LFE275:
+	.size	random_test, .-random_test
+	.section	.text.cpu_2_io,"ax",@progbits
+	.align	2
+	.global	cpu_2_io
+	.type	cpu_2_io, %function
+cpu_2_io:
+.LFB276:
+	.file 3 "cmd/ddr_tool/tool_common.c"
+	.loc 3 11 0
+	.cfi_startproc
+.LVL56:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 19 0
+	mov	x2, 0
+	.loc 3 11 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	add	x1, x29, 16
+.LVL57:
+.L31:
+	.loc 3 19 0 discriminator 1
+	cmp	x2, 16
+	bne	.L32
+	.loc 3 22 0
+	bl	memcpy
+.LVL58:
+	.loc 3 26 0
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL59:
+.L32:
+	.cfi_restore_state
+	.loc 3 20 0 discriminator 3
+	ubfiz	w3, w2, 2, 2
+	add	w3, w3, w2, asr 2
+	ldrb	w3, [x0, w3, sxtw]
+	strb	w3, [x1, x2]
+.LVL60:
+	add	x2, x2, 1
+.LVL61:
+	b	.L31
+	.cfi_endproc
+.LFE276:
+	.size	cpu_2_io, .-cpu_2_io
+	.section	.text.write_buf_to_ddr,"ax",@progbits
+	.align	2
+	.global	write_buf_to_ddr
+	.type	write_buf_to_ddr, %function
+write_buf_to_ddr:
+.LFB277:
+	.loc 3 29 0
+	.cfi_startproc
+.LVL62:
+	.loc 3 37 0
+	lsr	w1, w1, 3
+.LVL63:
+	.loc 3 39 0
+	lsr	x3, x3, 3
+.LVL64:
+	.loc 3 37 0
+	sub	w1, w1, #1
+.LVL65:
+	.loc 3 39 0
+	mov	w4, 0
+	mov	w5, 0
+.LVL66:
+.L35:
+	.loc 3 39 0 is_stmt 0 discriminator 1
+	uxtw	x6, w5
+	cmp	x6, x3
+	bcc	.L36
+	.loc 3 44 0 is_stmt 1
+	ret
+.L36:
+	.loc 3 40 0 discriminator 3
+	ldr	x7, [x0, w4, uxtw 3]
+	.loc 3 41 0 discriminator 3
+	add	w4, w4, 1
+.LVL67:
+	.loc 3 40 0 discriminator 3
+	str	x7, [x2, x6, lsl 3]
+	.loc 3 42 0 discriminator 3
+	and	w4, w1, w4
+.LVL68:
+	.loc 3 39 0 discriminator 3
+	add	w5, w5, 1
+.LVL69:
+	b	.L35
+	.cfi_endproc
+.LFE277:
+	.size	write_buf_to_ddr, .-write_buf_to_ddr
+	.section	.text.cmp_buf_data,"ax",@progbits
+	.align	2
+	.global	cmp_buf_data
+	.type	cmp_buf_data, %function
+cmp_buf_data:
+.LFB278:
+	.loc 3 48 0
+	.cfi_startproc
+.LVL70:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 60 0
+	lsr	w1, w1, 3
+.LVL71:
+	.loc 3 48 0
+	mov	w10, w4
+	.loc 3 60 0
+	sub	w1, w1, #1
+	.loc 3 48 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 62 0
+	lsr	x3, x3, 3
+.LVL72:
+	.loc 3 48 0
+	mov	x8, x2
+.LVL73:
+	.loc 3 62 0
+	mov	w6, 0
+	.loc 3 56 0
+	mov	x2, 0
+.LVL74:
+	.loc 3 62 0
+	mov	w7, 0
+	.loc 3 48 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LVL75:
+.L38:
+	.loc 3 62 0 discriminator 1
+	uxtw	x5, w7
+	cmp	x5, x3
+	bcc	.L41
+	.loc 3 61 0
+	mov	x19, 0
+	.loc 3 54 0
+	mov	x3, 0
+	.loc 3 55 0
+	mov	x4, 0
+	b	.L40
+.L41:
+	.loc 3 63 0
+	lsl	x5, x5, 3
+	.loc 3 64 0
+	ldr	x4, [x0, w6, uxtw 3]
+	.loc 3 63 0
+	add	x19, x8, x5
+	ldr	x2, [x8, x5]
+.LVL76:
+	.loc 3 64 0
+	cmp	x2, x4
+	beq	.L39
+	.loc 3 65 0
+	ldr	x3, [x19]
+.LVL77:
+.L40:
+	.loc 3 73 0
+	cmp	x19, 0
+	ccmp	w10, 0, 4, ne
+	beq	.L37
+	.loc 3 74 0
+	adrp	x0, .LC12
+.LVL78:
+	mov	x1, x19
+.LVL79:
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.LVL80:
+.L37:
+	.loc 3 78 0
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+.LVL81:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL82:
+.L39:
+	.cfi_restore_state
+	.loc 3 70 0 discriminator 2
+	add	w6, w6, 1
+.LVL83:
+	.loc 3 62 0 discriminator 2
+	add	w7, w7, 1
+.LVL84:
+	.loc 3 71 0 discriminator 2
+	and	w6, w1, w6
+.LVL85:
+	b	.L38
+	.cfi_endproc
+.LFE278:
+	.size	cmp_buf_data, .-cmp_buf_data
+	.section	.text.crosstalk,"ax",@progbits
+	.align	2
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB201:
+	.file 4 "cmd/ddr_tool/crosstalk.c"
+	.loc 4 46 0
+	.cfi_startproc
+.LVL86:
+	stp	x29, x30, [sp, -160]!
+	.cfi_def_cfa_offset 160
+	.cfi_offset 29, -160
+	.cfi_offset 30, -152
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -144
+	.cfi_offset 20, -136
+	.loc 4 71 0
+	add	x19, x29, 128
+	.loc 4 46 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -128
+	.cfi_offset 22, -120
+	mov	x21, x0
+	stp	x23, x24, [sp, 48]
+	mov	x22, x1
+	stp	x25, x26, [sp, 64]
+	.loc 4 63 0
+	adrp	x0, .LC13
+.LVL87:
+	.loc 4 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -112
+	.cfi_offset 24, -104
+	.cfi_offset 25, -96
+	.cfi_offset 26, -88
+	.cfi_offset 27, -80
+	.cfi_offset 28, -72
+	.loc 4 63 0
+	add	x0, x0, :lo12:.LC13
+	bl	printf
+.LVL88:
+	.loc 4 66 0
+	adrp	x23, .LC14
+	add	x0, x23, :lo12:.LC14
+	.loc 4 64 0
+	mov	w20, 0
+	.loc 4 66 0
+	str	x0, [x29, 112]
+	.loc 4 76 0
+	add	x0, x19, 16
+	str	x0, [x29, 104]
+.LVL89:
+.L52:
+	.loc 4 66 0
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	.loc 4 68 0
+	adrp	x24, .LC15
+	add	x28, x24, :lo12:.LC15
+	.loc 4 65 0
+	mov	w26, -1
+	.loc 4 67 0
+	mov	w25, 0
+	.loc 4 66 0
+	bl	printf
+.LVL90:
+	.loc 4 71 0
+	mov	w0, 1
+	lsl	w0, w0, w20
+	str	w0, [x29, 120]
+.LVL91:
+.L51:
+	.loc 4 69 0
+	mvn	w26, w26
+.LVL92:
+	mov	x27, 0
+	.loc 4 68 0
+	mov	w1, w25
+	mov	x0, x28
+	bl	printf
+.LVL93:
+.L48:
+	.loc 4 71 0 discriminator 3
+	ldr	w0, [x29, 120]
+	eor	w0, w0, w26
+	str	w0, [x27, x19]
+	add	x27, x27, 4
+	.loc 4 72 0 discriminator 3
+	mvn	w26, w26
+.LVL94:
+	.loc 4 70 0 discriminator 3
+	cmp	x27, 32
+	bne	.L48
+.LVL95:
+	.loc 4 76 0 discriminator 1
+	mov	x0, x19
+	bl	cpu_2_io
+.LVL96:
+	ldr	x0, [x29, 104]
+	bl	cpu_2_io
+.LVL97:
+	.loc 4 77 0 discriminator 1
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w27
+	mov	x0, x19
+	bl	write_buf_to_ddr
+.LVL98:
+	.loc 4 78 0 discriminator 1
+	mov	w4, 1
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w27
+	mov	x0, x19
+	bl	cmp_buf_data
+.LVL99:
+	cbz	x0, .L49
+.LVL100:
+.L58:
+	.loc 4 80 0
+	mov	w0, -1
+.L47:
+	.loc 4 115 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL101:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL102:
+.L49:
+	.cfi_restore_state
+	.loc 4 67 0 discriminator 2
+	add	w25, w25, 1
+.LVL103:
+	cmp	w25, 2
+	bne	.L51
+	.loc 4 64 0 discriminator 2
+	add	w20, w20, 1
+.LVL104:
+	cmp	w20, 32
+	bne	.L52
+	.loc 4 87 0
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.LVL105:
+	.loc 4 88 0
+	mov	x0, 128
+	bl	malloc
+.LVL106:
+	mov	x19, x0
+.LVL107:
+	.loc 4 89 0
+	cbnz	x0, .L53
+	.loc 4 90 0
+	adrp	x0, .LC17
+.LVL108:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.LVL109:
+.L53:
+	adrp	x26, .LANCHOR0
+.LVL110:
+	.loc 4 93 0
+	add	x23, x23, :lo12:.LC14
+	.loc 4 95 0
+	add	x24, x24, :lo12:.LC15
+	.loc 4 100 0
+	add	x26, x26, :lo12:.LANCHOR0
+	.loc 4 69 0
+	mov	w20, 0
+.LVL111:
+.L61:
+	.loc 4 94 0
+	mov	w25, 0
+	.loc 4 98 0
+	mov	w27, 1
+	.loc 4 93 0
+	mov	w1, w20
+	mov	x0, x23
+	bl	printf
+.LVL112:
+.L60:
+	.loc 4 95 0
+	mov	w1, w25
+	mov	x0, x24
+	bl	printf
+.LVL113:
+	.loc 4 98 0
+	lsl	w2, w27, w25
+	mov	x0, 0
+.LVL114:
+.L56:
+	ldr	w1, [x0, x26]
+	.loc 4 97 0
+	cbz	w20, .L54
+	.loc 4 98 0
+	eor	w1, w1, w2
+.L54:
+	.loc 4 100 0
+	str	w1, [x19, x0]
+	add	x0, x0, 4
+	.loc 4 96 0
+	cmp	x0, 128
+	bne	.L56
+	mov	x28, x19
+	add	x1, x19, 128
+.L57:
+	.loc 4 104 0
+	mov	x0, x28
+	str	x1, [x29, 120]
+	bl	cpu_2_io
+.LVL115:
+	add	x28, x28, 16
+	.loc 4 102 0
+	ldr	x1, [x29, 120]
+	cmp	x28, x1
+	bne	.L57
+	.loc 4 105 0
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, 128
+	mov	x0, x19
+	bl	write_buf_to_ddr
+.LVL116:
+	.loc 4 107 0
+	mov	w4, 1
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, 128
+	mov	x0, x19
+	bl	cmp_buf_data
+.LVL117:
+	cbnz	x0, .L58
+	.loc 4 110 0
+	cbz	w20, .L59
+	.loc 4 94 0 discriminator 2
+	add	w25, w25, 1
+.LVL118:
+	cmp	w25, 32
+	bne	.L60
+.L59:
+	.loc 4 92 0 discriminator 2
+	add	w20, w20, 1
+.LVL119:
+	cmp	w20, 2
+	bne	.L61
+	.loc 4 114 0
+	mov	w0, 0
+	b	.L47
+	.cfi_endproc
+.LFE201:
+	.size	crosstalk, .-crosstalk
+	.section	.text.diagonalscan,"ax",@progbits
+	.align	2
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB272:
+	.file 5 "cmd/ddr_tool/diagonalscan.c"
+	.loc 5 49 0
+	.cfi_startproc
+.LVL120:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 55 0
+	mov	x2, 32
+	.loc 5 49 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x1
+	.loc 5 55 0
+	adrp	x1, .LANCHOR1
+.LVL121:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 5 49 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	.loc 5 55 0
+	add	x0, x29, 80
+.LVL122:
+	.loc 5 49 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 55 0
+	bl	memcpy
+.LVL123:
+	.loc 5 60 0
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	bl	printf
+.LVL124:
+.LBB35:
+.LBB36:
+.LBB37:
+	.loc 5 35 0
+	mov	x0, 520
+	movk	x0, 0xfe02, lsl 16
+	ldr	w20, [x0]
+.LVL125:
+#APP
+// 35 "cmd/ddr_tool/diagonalscan.c" 1
+	dmb sy
+// 0 "" 2
+.LVL126:
+#NO_APP
+.LBE37:
+.LBE36:
+.LBE35:
+	.loc 5 73 0
+	add	x0, x29, 80
+	bl	cpu_2_io
+.LVL127:
+	.loc 5 75 0
+	add	x1, x29, 80
+	mov	x2, 32
+	mov	x0, x23
+	bl	memcpy
+.LVL128:
+.LBB40:
+.LBB38:
+	.loc 5 40 0
+	ubfx	x0, x20, 9, 2
+	.loc 5 41 0
+	ubfx	x20, x20, 2, 2
+.LVL129:
+	.loc 5 40 0
+	add	w0, w0, 9
+	.loc 5 41 0
+	mov	w1, 2
+	asr	w20, w1, w20
+.LBE38:
+.LBE40:
+	.loc 5 76 0
+	lsr	x24, x19, 1
+.LBB41:
+.LBB39:
+	.loc 5 43 0
+	add	w0, w0, w20
+	sub	x19, x19, #32
+.LVL130:
+	mov	w25, 1
+	add	x19, x19, x23
+.LVL131:
+	lsl	w25, w25, w0
+.LBE39:
+.LBE41:
+	.loc 5 76 0
+	mov	w21, 0
+	mov	x20, 0
+.LVL132:
+.L74:
+	.loc 5 76 0 is_stmt 0 discriminator 1
+	cmp	x20, x24
+	bcc	.L78
+	mov	x0, 0
+	b	.L75
+.L78:
+	.loc 5 77 0 is_stmt 1
+	uxtw	x22, w21
+	mov	x2, 32
+	sub	x26, x19, x22
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
+.LVL133:
+	.loc 5 80 0
+	add	x2, x20, x23
+	.loc 5 79 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x22
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
+.LVL134:
+	.loc 5 81 0
+	cbnz	x0, .L75
+	.loc 5 84 0
+	add	x22, x22, 40
+	add	x20, x20, x25
+.LVL135:
+	cmp	x25, x22
+	add	w21, w21, 8
+.LVL136:
+	csel	w21, w21, wzr, cs
+.LVL137:
+	.loc 5 86 0
+	cmp	x24, x20
+	bls	.L77
+	.loc 5 87 0
+	add	x0, x23, x20
+.LVL138:
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
+.LVL139:
+.L77:
+	.loc 5 89 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x19, x19, x25
+	bl	cmp_buf_data
+.LVL140:
+	.loc 5 92 0
+	cbz	x0, .L74
+.LVL141:
+.L75:
+	.loc 5 100 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL142:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE272:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB259:
+	.loc 1 190 0
+	.cfi_startproc
+.LVL143:
+	stp	x29, x30, [sp, -224]!
+	.cfi_def_cfa_offset 224
+	.cfi_offset 29, -224
+	.cfi_offset 30, -216
+.LBB46:
+.LBB47:
+	.loc 1 50 0
+	mov	x0, 0
+.LVL144:
+.LBE47:
+.LBE46:
+	.loc 1 190 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -208
+	.cfi_offset 20, -200
+.LBB54:
+.LBB48:
+	.loc 1 52 0
+	add	x20, x29, 120
+.LBE48:
+.LBE54:
+	.loc 1 190 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -192
+	.cfi_offset 22, -184
+.LBB55:
+.LBB49:
+	.loc 1 53 0
+	add	x21, x29, 152
+.LBE49:
+.LBE55:
+	.loc 1 190 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -160
+	.cfi_offset 26, -152
+	mov	w26, w2
+	stp	x27, x28, [sp, 80]
+.LBB56:
+.LBB50:
+	.loc 1 50 0
+	mov	x2, x18
+.LVL145:
+	.cfi_offset 27, -144
+	.cfi_offset 28, -136
+.LBE50:
+.LBE56:
+	.loc 1 190 0
+	mov	x27, x3
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -176
+	.cfi_offset 24, -168
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 184]
+.LBB57:
+.LBB51:
+	.loc 1 47 0
+	mov	w23, 0
+.LBE51:
+.LBE57:
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 200]
+	str	xzr, [x29, 216]
+.LVL146:
+.L83:
+.LBB58:
+.LBB52:
+	.loc 1 50 0
+	ldr	x1, [x2]
+	ubfiz	x3, x0, 4, 32
+	.loc 1 52 0
+	str	xzr, [x20, x0, lsl 3]
+	.loc 1 50 0
+	add	x1, x1, x3
+	.loc 1 53 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 1 50 0
+	ldr	x1, [x1, 136]
+	cmp	x1, 0
+	csinc	w23, w23, w0, eq
+.LVL147:
+	add	x0, x0, 1
+.LVL148:
+	.loc 1 49 0
+	cmp	x0, 4
+	bne	.L83
+	mov	x0, 0
+.L84:
+.LVL149:
+	.loc 1 56 0
+	cmp	w0, w23
+	bcc	.L85
+	.loc 1 61 0
+	sub	w1, w23, #1
+	ldr	x0, [x2, 128]
+.LVL150:
+	lsl	x1, x1, 3
+	.loc 1 67 0
+	adrp	x24, .LC21
+	.loc 1 61 0
+	sub	x0, x0, #1048576
+	.loc 1 64 0
+	mov	x22, 0
+	.loc 1 67 0
+	add	x24, x24, :lo12:.LC21
+	.loc 1 61 0
+	ldr	x2, [x20, x1]
+	sub	x0, x0, x2
+	.loc 1 62 0
+	and	x0, x0, -4096
+	.loc 1 61 0
+	str	x0, [x21, x1]
+	.loc 1 63 0
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	bl	printf
+.LVL151:
+	.loc 1 64 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+.LVL152:
+.L86:
+	.loc 1 65 0
+	cmp	w23, w22
+	bhi	.L88
+.LVL153:
+.LBE52:
+.LBE58:
+	.loc 1 205 0
+	cmp	w26, 1
+	ble	.L194
+	.loc 1 209 0
+	adrp	x24, .LANCHOR2
+	add	x28, x24, :lo12:.LANCHOR2
+	mov	x25, 0
+	str	x24, [x29, 104]
+.L91:
+	ldr	x1, [x28, x25, lsl 3]
+	mov	w22, w25
+.LVL154:
+	ldr	x0, [x27, 8]
+	bl	strcasecmp
+.LVL155:
+	mov	w23, w0
+	cbz	w0, .L90
+.LVL156:
+	add	x25, x25, 1
+	.loc 1 208 0 discriminator 2
+	cmp	x25, 7
+	bne	.L91
+	.loc 1 216 0
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	b	.L195
+.LVL157:
+.L85:
+.LBB59:
+.LBB53:
+	.loc 1 57 0
+	ubfiz	x1, x0, 4, 32
+	ldr	x3, [x2]
+	add	x1, x1, 128
+	add	x3, x3, x1
+	ldr	x3, [x3, 8]
+	str	x3, [x20, x0, lsl 3]
+	.loc 1 58 0
+	ldr	x3, [x2]
+	add	x1, x3, x1
+	ldr	x1, [x1, 16]
+	str	x1, [x21, x0, lsl 3]
+.LVL158:
+	add	x0, x0, 1
+.LVL159:
+	b	.L84
+.LVL160:
+.L88:
+	.loc 1 66 0
+	ldr	x1, [x20, x22, lsl 3]
+	cbz	x1, .L87
+	.loc 1 67 0
+	ldr	x3, [x21, x22, lsl 3]
+	mov	x0, x24
+	add	x2, x1, x3
+	bl	printf
+.LVL161:
+.L87:
+	add	x22, x22, 1
+.LVL162:
+	b	.L86
+.LVL163:
+.L131:
+.LBE53:
+.LBE59:
+	.loc 1 221 0
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+.LVL164:
+.L195:
+	.loc 1 216 0
+	bl	printf
+.LVL165:
+.L194:
+	.loc 1 217 0
+	mov	w23, -1
+	b	.L81
+.LVL166:
+.L94:
+	.loc 1 226 0
+	add	x0, x27, x28
+	add	x1, x29, 184
+	add	x2, x1, x28
+	mov	w1, 0
+	add	x28, x28, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
+.LVL167:
+	tbz	w0, #31, .L93
+	.loc 1 227 0
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	b	.L195
+.L95:
+	.loc 1 252 0
+	cmp	w22, 1
+	bne	.L98
+	.loc 1 254 0
+	ldr	x0, [x29, 208]
+	b	.L197
+.L98:
+	.loc 1 257 0
+	sub	w25, w25, #5
+	cmp	w25, 1
+	bls	.L99
+.LVL168:
+.LBB60:
+.LBB61:
+	.loc 1 79 0
+	ldr	x0, [x29, 128]
+	.loc 1 82 0
+	ldr	x3, [x29, 208]
+	.loc 1 79 0
+	cmp	x0, 0
+	ldr	x0, [x29, 136]
+	ldr	x1, [x29, 144]
+	cset	w25, ne
+	.loc 1 80 0
+	cmp	x0, 0
+	mov	w0, 3
+	csinc	w0, w0, w25, ne
+.LVL169:
+	cmp	x1, 0
+	mov	w1, 4
+	csel	w0, w0, w1, eq
+.LVL170:
+	.loc 1 82 0
+	cbnz	x3, .L187
+	.loc 1 83 0
+	mov	w25, w0
+.LVL171:
+.L115:
+.LBE61:
+.LBE60:
+	.loc 1 344 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L121
+	.loc 1 345 0
+	bl	set_vdd_logic
+.LVL172:
+.L121:
+	.loc 1 349 0
+	adrp	x27, .LC30
+.LVL173:
+	mov	w26, 0
+	add	x27, x27, :lo12:.LC30
+	b	.L129
+.LVL174:
+.L99:
+	.loc 1 259 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L105
+	.loc 1 260 0
+	bl	set_vdd_logic
+.LVL175:
+.L105:
+	.loc 1 261 0
+	cmp	w22, 5
+	bne	.L106
+	.loc 1 262 0
+	ldr	x1, [x29, 152]
+	mov	x0, 65535
+	movk	x0, 0x9f, lsl 16
+	cmp	x1, x0
+	bhi	.L107
+	.loc 1 263 0
+	lsr	x2, x1, 20
+	adrp	x0, .LC26
+	mov	w1, 10
+	add	x0, x0, :lo12:.LC26
+	bl	printf
+.LVL176:
+.L106:
+	.loc 1 284 0
+	adrp	x28, .LC28
+	add	x28, x28, :lo12:.LC28
+	.loc 1 280 0
+	adrp	x27, .LC27
+.LVL177:
+	.loc 1 288 0
+	mov	w26, 0
+	.loc 1 280 0
+	add	x0, x27, :lo12:.LC27
+	str	x0, [x29, 96]
+.LVL178:
+.L113:
+	.loc 1 278 0
+	ldr	x0, [x29, 200]
+	cbz	x0, .L114
+	.loc 1 278 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bls	.L97
+.L114:
+	.loc 1 280 0 is_stmt 1
+	ldr	x0, [x29, 96]
+	.loc 1 279 0
+	add	w26, w26, 1
+.LVL179:
+	.loc 1 280 0
+	mov	w1, w26
+	mov	x25, 0
+	bl	printf
+.LVL180:
+.L111:
+	.loc 1 282 0
+	ldr	x22, [x20, x25, lsl 3]
+	cbz	x22, .L108
+	.loc 1 284 0
+	ldr	x19, [x21, x25, lsl 3]
+	mov	x2, x22
+	mov	w1, w25
+	mov	x0, x28
+	mov	x3, x19
+	bl	printf
+.LVL181:
+	.loc 1 287 0
+	mov	x1, x19
+	mov	x0, x22
+	bl	random_test
+.LVL182:
+	mov	w24, w0
+.LVL183:
+	.loc 1 289 0
+	cbnz	w0, .L137
+	.loc 1 290 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL184:
+	bl	crosstalk
+.LVL185:
+	.loc 1 294 0
+	cbnz	w0, .L138
+	.loc 1 295 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL186:
+	bl	diagonalscan
+.LVL187:
+	mov	w27, w0
+.LVL188:
+	.loc 1 299 0
+	cbz	w0, .L110
+	.loc 1 295 0
+	mov	w24, w0
+	mov	w27, 0
+.LVL189:
+.L190:
+	.loc 1 319 0
+	mov	w19, 4
+	b	.L109
+.LVL190:
+.L107:
+	.loc 1 266 0
+	mov	x0, 10485760
+	.loc 1 268 0
+	stp	xzr, xzr, [x29, 128]
+	.loc 1 266 0
+	stp	xzr, x0, [x29, 144]
+.LVL191:
+	.loc 1 269 0
+	stp	xzr, xzr, [x29, 160]
+.LVL192:
+	str	xzr, [x29, 176]
+.LVL193:
+	b	.L106
+.LVL194:
+.L137:
+	mov	w27, 0
+.L189:
+	.loc 1 309 0
+	mov	w19, 2
+	b	.L109
+.LVL195:
+.L138:
+	.loc 1 290 0
+	mov	w24, w0
+	mov	w27, 0
+.L191:
+	.loc 1 314 0
+	mov	w19, 3
+	b	.L109
+.LVL196:
+.L139:
+	.loc 1 312 0
+	mov	w24, w0
+	mov	w27, 0
+	b	.L191
+.LVL197:
+.L141:
+	.loc 1 325 0
+	mov	w27, -1
+	b	.L190
+.LVL198:
+.L187:
+.LBB64:
+.LBB62:
+	.loc 1 86 0
+	ldr	x4, [x29, 200]
+	.loc 1 87 0
+	mov	x1, 0
+	mov	w25, 0
+	.loc 1 88 0
+	mov	w6, 1
+	.loc 1 87 0
+	add	x5, x3, x4
+.LVL199:
+.L117:
+	.loc 1 86 0
+	ldr	x2, [x20, x1, lsl 3]
+	cmp	x4, x2
+	bcc	.L116
+	.loc 1 87 0
+	ldr	x7, [x21, x1, lsl 3]
+	add	x2, x2, x7
+	.loc 1 88 0
+	cmp	x5, x2
+	csel	w25, w25, w6, hi
+.LVL200:
+.L116:
+	add	x1, x1, 1
+.LVL201:
+	.loc 1 85 0
+	cmp	w0, w1
+	bhi	.L117
+	.loc 1 89 0
+	cbnz	w25, .L118
+	.loc 1 90 0
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.LVL202:
+.L119:
+.LBE62:
+.LBE64:
+	.loc 1 339 0
+	cbnz	w25, .L115
+	.loc 1 340 0
+	mov	w23, 1
+	b	.L81
+.LVL203:
+.L118:
+.LBB65:
+.LBB63:
+	.loc 1 92 0
+	str	x4, [x29, 120]
+	.loc 1 94 0
+	cmp	w0, 1
+	.loc 1 93 0
+	str	x3, [x29, 152]
+.LVL204:
+	.loc 1 94 0
+	beq	.L119
+	.loc 1 95 0
+	str	xzr, [x29, 128]
+	.loc 1 94 0
+	cmp	w0, 2
+	.loc 1 96 0
+	str	xzr, [x29, 160]
+.LVL205:
+	.loc 1 94 0
+	beq	.L119
+	.loc 1 95 0
+	str	xzr, [x29, 136]
+	.loc 1 94 0
+	cmp	w0, 4
+	.loc 1 96 0
+	str	xzr, [x29, 168]
+.LVL206:
+	.loc 1 94 0
+	bne	.L119
+	.loc 1 95 0
+	str	xzr, [x29, 144]
+	.loc 1 96 0
+	str	xzr, [x29, 176]
+.LVL207:
+	b	.L119
+.LVL208:
+.L130:
+.LBE63:
+.LBE65:
+	.loc 1 350 0
+	mov	x28, 0
+	.loc 1 348 0
+	add	w26, w26, 1
+.LVL209:
+	.loc 1 349 0
+	mov	w1, w26
+	mov	x0, x27
+	bl	printf
+.LVL210:
+.L122:
+	.loc 1 350 0 discriminator 1
+	cmp	w25, w28
+	bhi	.L128
+	mov	w0, 0
+	mov	w24, 0
+.LVL211:
+.L127:
+	.loc 1 376 0
+	orr	w0, w24, w0
+.LVL212:
+	cbnz	w0, .L112
+.LVL213:
+.L129:
+	.loc 1 347 0
+	ldr	x0, [x29, 192]
+	cbz	x0, .L130
+	.loc 1 347 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bhi	.L130
+	b	.L97
+.LVL214:
+.L128:
+	.loc 1 357 0 is_stmt 1
+	ldr	x1, [x21, x28, lsl 3]
+	.loc 1 351 0
+	cmp	w22, 3
+	.loc 1 357 0
+	ldr	x0, [x20, x28, lsl 3]
+	.loc 1 351 0
+	beq	.L124
+	cmp	w22, 4
+	beq	.L125
+	.loc 1 353 0
+	bl	random_test
+.LVL215:
+.L192:
+	.loc 1 361 0
+	mov	w24, w0
+.LVL216:
+	.loc 1 369 0
+	bl	ctrlc
+.LVL217:
+	cbnz	w0, .L144
+	add	x28, x28, 1
+.LVL218:
+	mov	w19, w22
+	.loc 1 373 0
+	cbz	w24, .L122
+.LVL219:
+	mov	w19, w22
+.LVL220:
+	b	.L127
+.LVL221:
+.L124:
+	.loc 1 357 0
+	bl	crosstalk
+.LVL222:
+	b	.L192
+.L125:
+	.loc 1 361 0
+	bl	diagonalscan
+.LVL223:
+	b	.L192
+.LVL224:
+.L144:
+	mov	w19, w22
+	.loc 1 370 0
+	mov	w0, -1
+	b	.L127
+.LVL225:
+.L90:
+	.loc 1 220 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w25, sxtw]
+	cmp	w26, w0
+	blt	.L131
+	sub	w26, w26, #2
+.LVL226:
+	.loc 1 220 0 is_stmt 0 discriminator 1
+	mov	x28, 0
+	lsl	x26, x26, 3
+.LVL227:
+.L93:
+	.loc 1 225 0 is_stmt 1 discriminator 1
+	cmp	x28, x26
+	bne	.L94
+	.loc 1 232 0
+	ldp	x2, x3, [x29, 184]
+	mov	w1, w22
+	ldp	x4, x5, [x29, 200]
+	adrp	x0, .LC24
+	ldr	x6, [x29, 216]
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.LVL228:
+	.loc 1 244 0
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	bl	printf
+.LVL229:
+	.loc 1 247 0
+	cbnz	w22, .L95
+	.loc 1 249 0
+	ldr	x0, [x29, 192]
+.L197:
+	.loc 1 254 0
+	cbz	x0, .L97
+	.loc 1 255 0
+	bl	set_vdd_logic
+.LVL230:
+.L97:
+	.loc 1 384 0
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+.LVL231:
+	b	.L81
+.LVL232:
+.L110:
+	.loc 1 307 0
+	mov	x1, x19
+	mov	x0, x22
+	bl	random_test
+.LVL233:
+	mov	w24, w0
+.LVL234:
+	.loc 1 311 0
+	cbnz	w0, .L189
+	.loc 1 312 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL235:
+	bl	crosstalk
+.LVL236:
+	mov	w27, w0
+.LVL237:
+	.loc 1 316 0
+	cbnz	w0, .L139
+	.loc 1 317 0
+	mov	x1, x19
+	mov	x0, x22
+.LVL238:
+	bl	diagonalscan
+.LVL239:
+	mov	w24, w0
+.LVL240:
+	.loc 1 322 0
+	cbnz	w0, .L190
+	.loc 1 324 0
+	bl	ctrlc
+.LVL241:
+	cbnz	w0, .L141
+	.loc 1 319 0
+	mov	w19, 4
+.LVL242:
+.L108:
+	add	x25, x25, 1
+.LVL243:
+	.loc 1 281 0 discriminator 2
+	cmp	x25, 4
+	bne	.L111
+	mov	w27, 0
+	mov	w24, 0
+.LVL244:
+.L109:
+	.loc 1 329 0
+	orr	w2, w24, w27
+	cbz	w2, .L113
+.LVL245:
+.L112:
+	.loc 1 381 0
+	cbz	w24, .L97
+	.loc 1 382 0
+	ldr	x0, [x29, 104]
+	add	x24, x0, :lo12:.LANCHOR2
+.LVL246:
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	ldr	x1, [x24, w19, sxtw 3]
+	bl	printf
+.LVL247:
+.L81:
+	.loc 1 387 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE259:
+	.size	do_ddr_test, .-do_ddr_test
+	.section	.text.print_memory,"ax",@progbits
+	.align	2
+	.global	print_memory
+	.type	print_memory, %function
+print_memory:
+.LFB279:
+	.loc 3 81 0
+	.cfi_startproc
+.LVL248:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x20, x0
+.LVL249:
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 3 86 0
+	adrp	x21, .LC34
+	.loc 3 85 0
+	lsr	x22, x1, 2
+	.loc 3 86 0
+	add	x21, x21, :lo12:.LC34
+	.loc 3 85 0
+	mov	w19, 0
+.LVL250:
+.L199:
+	.loc 3 85 0 is_stmt 0 discriminator 1
+	uxtw	x1, w19
+	cmp	x1, x22
+	bcc	.L200
+	.loc 3 89 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL251:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL252:
+.L200:
+	.cfi_restore_state
+	.loc 3 87 0 discriminator 3
+	add	w3, w19, 3
+	add	w2, w19, 2
+	add	w0, w19, 1
+	lsl	x1, x1, 2
+	.loc 3 85 0 discriminator 3
+	add	w19, w19, 4
+.LVL253:
+	.loc 3 86 0 discriminator 3
+	ldr	w5, [x20, x3, lsl 2]
+	ldr	w4, [x20, x2, lsl 2]
+	ldr	w3, [x20, x0, lsl 2]
+	mov	x0, x21
+	ldr	w2, [x20, x1]
+	add	x1, x20, x1
+	bl	printf
+.LVL254:
+	b	.L199
+	.cfi_endproc
+.LFE279:
+	.size	print_memory, .-print_memory
+	.global	_u_boot_list_2_cmd_2_ddr_test
+	.section	.rodata
+	.align	3
+	.set	.LANCHOR1,. + 0
+.LC0:
+	.word	1437226410
+	.word	-1437226411
+	.word	1515890085
+	.word	-1515890086
+	.word	-267448336
+	.word	267448335
+	.word	0
+	.word	-1
+	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
+.LC12:
+	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"\nbitflip:   \n"
+.LC14:
+	.string	"\b\b\b%3u"
+.LC15:
+	.string	"%3u\b\b\b"
+.LC16:
+	.string	"\nISI:\n"
+.LC17:
+	.string	"malloc %lu byte fail\n"
+	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"\nDiagonalScan\n"
+	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC19:
+	.string	"available memory for test:\n"
+.LC20:
+	.string	"\tstart\t\t end\tlength\n"
+.LC21:
+	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+.LC22:
+	.string	"test parameters error\n"
+.LC23:
+	.string	"test pattern error\n"
+.LC24:
+	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+.LC25:
+	.string	"rockchip DMC didn't enable, can't change freq and freq scanning\n"
+.LC26:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
+.LC27:
+	.string	"\rtimes:%08u:\n"
+.LC28:
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
+.LC29:
+	.string	"Invalid test address\n"
+.LC30:
+	.string	"\rtimes:%08u, "
+.LC31:
+	.string	"\n%s test fail\n"
+.LC32:
+	.string	"\ntest pass\n"
+.LC33:
+	.string	"test pattern unsupported\n"
+	.section	.rodata.g_isi_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_isi_pattern, %object
+	.size	g_isi_pattern, 128
+g_isi_pattern:
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
+.LC34:
+	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
+	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"%u"
+.LC5:
+	.string	"\b"
+.LC6:
+	.string	" "
+.LC7:
+	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
+.LC8:
+	.string	"%4lu"
+.LC9:
+	.string	"\b\b\b\b"
+.LC10:
+	.string	"    "
+.LC11:
+	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"vdd_logic"
+.LC2:
+	.string	"Cannot set regulator name\n"
+.LC3:
+	.string	"set vdd_logic fail\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC35:
+	.string	"ddr_test"
+.LC36:
+	.string	"for dram simple test\n"
+.LC37:
+	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
+	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
+	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
+	.ascii	": arg2:minfreq(Hz),arg3:maxfreq(Hz),\n\targ4:scanfreq times,"
+	.ascii	" arg5[option]:volt\nfor random, crosstalk and diagonalscan:a"
+	.ascii	"rg2:freq(Hz), arg3:test times,\n\targ4: start addr, arg5:len"
+	.ascii	"gth, arg6[option]:volt\nfor fast_test and full_test:arg2: mi"
+	.ascii	"n_freq(Hz), arg3: max_freq(Hz)\n\targ4: test times, arg5[opt"
+	.ascii	"ion]:volt\n\nfreq: means dram's target frequency,unit:Hz, if"
+	.ascii	" 0:keep current freq\nminfreq, maxfreq: means min and max fr"
+	.ascii	"equency for dram test,unit:Hz\ntest times: test loop, if 0: "
+	.ascii	"endless loop\nstart_adr: start address of memory space for t"
+	.ascii	"esting,unit:physical address\nlength: length of memory space"
+	.ascii	" for testing,unit:Byte, if 0: full memory space test\nvolt: "
+	.ascii	"means target voltage of vdd_logic\n\nexample:\nddr freq chan"
+	.ascii	"ge to:786MHz, vdd_logic:1.05v:\n\t 'ddr_test changefreq 7860"
+	.ascii	"00000 1050000'\nddr freq change to:786MHz, with default vdd_"
+	.ascii	"logic:\n\t 'ddr_test changefreq 786000000'\nscanning ddr fre"
+	.ascii	"quency between 200 and 786MHz for 10 times:\n\t 'ddr_test sc"
+	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
+	.ascii	"start from"
+	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
+.LC38:
+	.string	"changefreq"
+.LC39:
+	.string	"scanfreq"
+.LC40:
+	.string	"random"
+.LC41:
+	.string	"crosstalk"
+.LC42:
+	.string	"diagonalscan"
+.LC43:
+	.string	"fast_test"
+.LC44:
+	.string	"full_test"
+	.section	.rodata.test_pat_param,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	test_pat_param, %object
+	.size	test_pat_param, 7
+test_pat_param:
+	.byte	3
+	.byte	5
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	5
+	.byte	5
+	.section	.rodata.test_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	test_pattern, %object
+	.size	test_pattern, 56
+test_pattern:
+	.xword	.LC38
+	.xword	.LC39
+	.xword	.LC40
+	.xword	.LC41
+	.xword	.LC42
+	.xword	.LC43
+	.xword	.LC44
+	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_cmd_2_ddr_test, %object
+	.size	_u_boot_list_2_cmd_2_ddr_test, 48
+_u_boot_list_2_cmd_2_ddr_test:
+	.8byte	.LC35
+	.word	7
+	.word	1
+	.8byte	do_ddr_test
+	.8byte	.LC36
+	.8byte	.LC37
+	.8byte	0
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/dm/device.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/linux/list.h"
+	.file 15 "include/part.h"
+	.file 16 "include/flash.h"
+	.file 17 "include/lmb.h"
+	.file 18 "include/asm-generic/u-boot.h"
+	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 20 "include/command.h"
+	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/libfdt_env.h"
+	.file 23 "include/image.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "./arch/arm/include/asm/global_data.h"
+	.file 26 "include/asm-generic/global_data.h"
+	.file 27 "include/dm/of.h"
+	.file 28 "include/net.h"
+	.file 29 "include/malloc.h"
+	.file 30 "include/dm/ofnode.h"
+	.file 31 "include/linux/compat.h"
+	.file 32 "include/dm/uclass.h"
+	.file 33 "include/console.h"
+	.file 34 "include/log.h"
+	.file 35 "include/stdio.h"
+	.file 36 "include/vsprintf.h"
+	.file 37 "include/power/regulator.h"
+	.file 38 "include/linux/delay.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x28ec
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF468
+	.byte	0xc
+	.4byte	.LASF469
+	.4byte	.LASF470
+	.4byte	.Ldebug_ranges0+0x190
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x4
+	.4byte	0x3b
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x5
+	.4byte	.LASF21
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x59
+	.uleb128 0x6
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x8
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x4
+	.4byte	0xa8
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x8
+	.4byte	0xd5
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x8
+	.4byte	0xe0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe0
+	.uleb128 0x8
+	.4byte	0xf3
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x47
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x6b
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0xa
+	.byte	0x8
+	.uleb128 0x5
+	.4byte	.LASF22
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf3
+	.uleb128 0xb
+	.4byte	0x99
+	.4byte	0x152
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0xf
+	.byte	0
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0x164
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x159
+	.uleb128 0xe
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x159
+	.uleb128 0xe
+	.4byte	.LASF26
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x159
+	.uleb128 0xf
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x26d
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0xc
+	.byte	0x81
+	.4byte	0x14f9
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0xc
+	.byte	0x82
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF29
+	.byte	0xc
+	.byte	0x83
+	.4byte	0x135
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xc
+	.byte	0x84
+	.4byte	0x135
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xc
+	.byte	0x85
+	.4byte	0x135
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF32
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x14c4
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x109
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF34
+	.byte	0xc
+	.byte	0x88
+	.4byte	0x26d
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF35
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x135
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF36
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x153c
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF37
+	.byte	0xc
+	.byte	0x8b
+	.4byte	0x135
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF38
+	.byte	0xc
+	.byte	0x8c
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF39
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x2a0
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF40
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x2a0
+	.byte	0x70
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+	.uleb128 0x3
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0x11
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+	.uleb128 0xc
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+	.string	"lmb"
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+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xfdc
+	.uleb128 0x2c
+	.4byte	.LASF472
+	.byte	0x8
+	.byte	0x1e
+	.byte	0x33
+	.4byte	0x14be
+	.uleb128 0x2d
+	.string	"np"
+	.byte	0x1e
+	.byte	0x34
+	.4byte	0x14be
+	.uleb128 0x2e
+	.4byte	.LASF376
+	.byte	0x1e
+	.byte	0x35
+	.4byte	0xec
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xfab
+	.uleb128 0x2
+	.4byte	.LASF377
+	.byte	0x1e
+	.byte	0x36
+	.4byte	0x149c
+	.uleb128 0xf
+	.4byte	.LASF378
+	.byte	0x4
+	.byte	0x1f
+	.byte	0xc
+	.4byte	0x14e8
+	.uleb128 0x11
+	.string	"pid"
+	.byte	0x1f
+	.byte	0xd
+	.4byte	0x59
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF379
+	.byte	0x1f
+	.byte	0x10
+	.4byte	0x14f3
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x14cf
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1437
+	.uleb128 0xf
+	.4byte	.LASF36
+	.byte	0x30
+	.byte	0x20
+	.byte	0x23
+	.4byte	0x153c
+	.uleb128 0x10
+	.4byte	.LASF35
+	.byte	0x20
+	.byte	0x24
+	.4byte	0x135
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF380
+	.byte	0x20
+	.byte	0x25
+	.4byte	0x166b
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF381
+	.byte	0x20
+	.byte	0x26
+	.4byte	0x2a0
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF41
+	.byte	0x20
+	.byte	0x27
+	.4byte	0x2a0
+	.byte	0x20
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x14ff
+	.uleb128 0xf
+	.4byte	.LASF382
+	.byte	0x10
+	.byte	0xc
+	.byte	0xb5
+	.4byte	0x1567
+	.uleb128 0x10
+	.4byte	.LASF383
+	.byte	0xc
+	.byte	0xb6
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF384
+	.byte	0xc
+	.byte	0xb7
+	.4byte	0x109
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x1542
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1567
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x1581
+	.uleb128 0x14
+	.4byte	0x26d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1572
+	.uleb128 0xf
+	.4byte	.LASF385
+	.byte	0x80
+	.byte	0x20
+	.byte	0x54
+	.4byte	0x166b
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0x20
+	.byte	0x55
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x11
+	.string	"id"
+	.byte	0x20
+	.byte	0x56
+	.4byte	0xa70
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF386
+	.byte	0x20
+	.byte	0x57
+	.4byte	0x1581
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF387
+	.byte	0x20
+	.byte	0x58
+	.4byte	0x1581
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF388
+	.byte	0x20
+	.byte	0x59
+	.4byte	0x1581
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF389
+	.byte	0x20
+	.byte	0x5a
+	.4byte	0x1581
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF390
+	.byte	0x20
+	.byte	0x5b
+	.4byte	0x1581
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF366
+	.byte	0x20
+	.byte	0x5c
+	.4byte	0x1581
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF367
+	.byte	0x20
+	.byte	0x5d
+	.4byte	0x1581
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF321
+	.byte	0x20
+	.byte	0x5e
+	.4byte	0x1680
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF391
+	.byte	0x20
+	.byte	0x5f
+	.4byte	0x1680
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF369
+	.byte	0x20
+	.byte	0x60
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF392
+	.byte	0x20
+	.byte	0x61
+	.4byte	0x59
+	.byte	0x5c
+	.uleb128 0x10
+	.4byte	.LASF393
+	.byte	0x20
+	.byte	0x62
+	.4byte	0x59
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF371
+	.byte	0x20
+	.byte	0x63
+	.4byte	0x59
+	.byte	0x64
+	.uleb128 0x10
+	.4byte	.LASF372
+	.byte	0x20
+	.byte	0x64
+	.4byte	0x59
+	.byte	0x68
+	.uleb128 0x11
+	.string	"ops"
+	.byte	0x20
+	.byte	0x65
+	.4byte	0x273
+	.byte	0x70
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0x20
+	.byte	0x66
+	.4byte	0x11f
+	.byte	0x78
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1587
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x1680
+	.uleb128 0x14
+	.4byte	0x153c
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1671
+	.uleb128 0x5
+	.4byte	.LASF394
+	.byte	0x21
+	.byte	0xb
+	.4byte	0x159
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x16ce
+	.uleb128 0x1c
+	.4byte	.LASF395
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF396
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF397
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF398
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF399
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF400
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF401
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF402
+	.byte	0x7
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xdb
+	.4byte	0x16de
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x16ce
+	.uleb128 0x2a
+	.4byte	.LASF404
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0x16de
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pattern
+	.uleb128 0xb
+	.4byte	0xa3
+	.4byte	0x1708
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x16f8
+	.uleb128 0x2a
+	.4byte	.LASF405
+	.byte	0x1
+	.byte	0x29
+	.4byte	0x1708
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pat_param
+	.uleb128 0x2f
+	.4byte	.LASF406
+	.byte	0x1
+	.2byte	0x185
+	.4byte	0x68c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_cmd_2_ddr_test
+	.uleb128 0x30
+	.4byte	.LASF414
+	.byte	0x3
+	.byte	0x50
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x17b3
+	.uleb128 0x31
+	.4byte	.LASF267
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x135
+	.4byte	.LLST69
+	.uleb128 0x31
+	.4byte	.LASF51
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x109
+	.4byte	.LLST70
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x52
+	.4byte	0x1359
+	.4byte	.LLST71
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x53
+	.4byte	0xa8
+	.4byte	.LLST72
+	.uleb128 0x33
+	.8byte	.LVL254
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xd
+	.byte	0x83
+	.sleb128 -4
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF417
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x18b3
+	.uleb128 0x36
+	.string	"buf"
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x1359
+	.4byte	.LLST23
+	.uleb128 0x31
+	.4byte	.LASF407
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0xa8
+	.4byte	.LLST24
+	.uleb128 0x31
+	.4byte	.LASF408
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST25
+	.uleb128 0x31
+	.4byte	.LASF374
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST26
+	.uleb128 0x31
+	.4byte	.LASF409
+	.byte	0x3
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST27
+	.uleb128 0x37
+	.4byte	.LASF410
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x18b3
+	.4byte	.LLST28
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x18b9
+	.4byte	.LLST29
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST31
+	.uleb128 0x32
+	.string	"val"
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST32
+	.uleb128 0x37
+	.4byte	.LASF411
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST33
+	.uleb128 0x37
+	.4byte	.LASF412
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST34
+	.uleb128 0x37
+	.4byte	.LASF413
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST35
+	.uleb128 0x33
+	.8byte	.LVL80
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC12
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x109
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x30
+	.4byte	.LASF415
+	.byte	0x3
+	.byte	0x1c
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1947
+	.uleb128 0x38
+	.string	"buf"
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x1359
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.4byte	.LASF407
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0xa8
+	.4byte	.LLST19
+	.uleb128 0x39
+	.4byte	.LASF408
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x31
+	.4byte	.LASF374
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.4byte	.LLST20
+	.uleb128 0x2a
+	.4byte	.LASF410
+	.byte	0x3
+	.byte	0x1e
+	.4byte	0x18b3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3a
+	.string	"p"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x18b3
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST21
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST22
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF416
+	.byte	0x3
+	.byte	0xa
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x19a9
+	.uleb128 0x36
+	.string	"p"
+	.byte	0x3
+	.byte	0xa
+	.4byte	0x1359
+	.4byte	.LLST16
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x3
+	.byte	0xf
+	.4byte	0x142
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -16
+	.uleb128 0x32
+	.string	"tmp"
+	.byte	0x3
+	.byte	0x10
+	.4byte	0x1353
+	.4byte	.LLST17
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x11
+	.4byte	0x59
+	.4byte	.LLST18
+	.uleb128 0x3b
+	.8byte	.LVL58
+	.4byte	0x287e
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF418
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x59
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1c22
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST2
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST3
+	.uleb128 0x3a
+	.string	"ret"
+	.byte	0x2
+	.byte	0x59
+	.4byte	0x59
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3c
+	.4byte	0x1c90
+	.8byte	.LBB18
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x2
+	.byte	0x5b
+	.4byte	0x1b1c
+	.uleb128 0x3d
+	.4byte	0x1cab
+	.4byte	.LLST4
+	.uleb128 0x3d
+	.4byte	0x1ca0
+	.4byte	.LLST5
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x3f
+	.4byte	0x1cb6
+	.4byte	.LLST6
+	.uleb128 0x3f
+	.4byte	0x1cbf
+	.4byte	.LLST7
+	.uleb128 0x3f
+	.4byte	0x1cc8
+	.4byte	.LLST8
+	.uleb128 0x3f
+	.4byte	0x1cd3
+	.4byte	.LLST9
+	.uleb128 0x40
+	.4byte	0x1cde
+	.uleb128 0x3f
+	.4byte	0x1ce9
+	.4byte	.LLST10
+	.uleb128 0x3f
+	.4byte	0x1cf4
+	.4byte	.LLST11
+	.uleb128 0x3f
+	.4byte	0x1cff
+	.4byte	.LLST12
+	.uleb128 0x41
+	.8byte	.LVL17
+	.4byte	0x288a
+	.4byte	0x1a8f
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL19
+	.4byte	0x2873
+	.4byte	0x1aad
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL23
+	.4byte	0x2873
+	.4byte	0x1ac5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL29
+	.4byte	0x2873
+	.4byte	0x1ae4
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC6
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL30
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
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+	.8byte	.LBB27
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x2
+	.byte	0x5d
+	.uleb128 0x43
+	.4byte	0x1c3d
+	.uleb128 0x43
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+	.uleb128 0x3e
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+	.uleb128 0x3f
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+	.uleb128 0x3f
+	.4byte	0x1c51
+	.4byte	.LLST14
+	.uleb128 0x44
+	.4byte	0x1c5a
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x44
+	.4byte	0x1c65
+	.uleb128 0x1
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+	.uleb128 0x44
+	.4byte	0x1c70
+	.uleb128 0x1
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+	.4byte	0x1c7b
+	.uleb128 0x3f
+	.4byte	0x1c84
+	.4byte	.LLST15
+	.uleb128 0x41
+	.8byte	.LVL39
+	.4byte	0x2873
+	.4byte	0x1b91
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
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+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL41
+	.4byte	0x288a
+	.4byte	0x1bb5
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
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+	.4byte	0x2873
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
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+	.4byte	0x2873
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+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
+	.uleb128 0x33
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+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x9
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+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.sleb128 0
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+	.uleb128 0x1
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+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF424
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1c90
+	.uleb128 0x46
+	.4byte	.LASF419
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x46
+	.4byte	.LASF420
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"j"
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+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x48
+	.4byte	.LASF421
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x48
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+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x48
+	.4byte	.LASF422
+	.byte	0x2
+	.byte	0x34
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"p"
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+	.byte	0x35
+	.4byte	0x18b9
+	.uleb128 0x48
+	.4byte	.LASF423
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF425
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d0b
+	.uleb128 0x46
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+	.byte	0x2
+	.byte	0xa
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+	.uleb128 0x46
+	.4byte	.LASF420
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"j"
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+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x48
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+	.byte	0x2
+	.byte	0xd
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+	.uleb128 0x48
+	.4byte	.LASF421
+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x48
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+	.byte	0x2
+	.byte	0xd
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+	.uleb128 0x48
+	.4byte	.LASF422
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"p32"
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+	.4byte	0x1d0b
+	.uleb128 0x48
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+	.byte	0x2
+	.byte	0x10
+	.4byte	0x109
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+	.4byte	0xb3
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+	.byte	0x5
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+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.uleb128 0x1
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+	.4byte	0x1f56
+	.uleb128 0x31
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+	.uleb128 0x31
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+	.uleb128 0x37
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+	.uleb128 0x37
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+	.byte	0x5
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+	.uleb128 0x48
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+	.uleb128 0x2a
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+	.4byte	0x1f56
+	.uleb128 0x2
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+	.sleb128 -32
+	.uleb128 0x32
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+	.uleb128 0x37
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+	.uleb128 0x37
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+	.uleb128 0x49
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+	.uleb128 0x3c
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+	.4byte	.Ldebug_ranges0+0x90
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+	.byte	0x3d
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+	.uleb128 0x3f
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+	.4byte	.LLST51
+	.byte	0
+	.byte	0
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+	.4byte	0x2896
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+	.uleb128 0x34
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+	.uleb128 0x3
+	.byte	0x8f
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+	.uleb128 0x1
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+	.uleb128 0x9
+	.byte	0x3
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+	.uleb128 0x34
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+	.byte	0
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+	.uleb128 0x3
+	.byte	0x8f
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+	.4byte	0x287e
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+	.uleb128 0x1
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+	.uleb128 0x34
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+	.uleb128 0x3
+	.byte	0x8f
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+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
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+	.sleb128 0
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+	.byte	0x87
+	.sleb128 0
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+	.uleb128 0x1
+	.byte	0x53
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+	.byte	0x8
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+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
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+	.byte	0
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+	.8byte	.LVL139
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+	.4byte	0x1f29
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xe
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+	.sleb128 0
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+	.4byte	0xffffffff
+	.byte	0x1a
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+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
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+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x8f
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+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
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+	.4byte	0x17b3
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xa8
+	.4byte	0x1f66
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x7
+	.byte	0
+	.uleb128 0x45
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+	.byte	0x5
+	.byte	0xc
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1faf
+	.uleb128 0x48
+	.4byte	.LASF433
+	.byte	0x5
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"col"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x47
+	.string	"bw"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF429
+	.byte	0x5
+	.byte	0x10
+	.4byte	0x59
+	.uleb128 0x4b
+	.uleb128 0x47
+	.string	"__v"
+	.byte	0x5
+	.byte	0x23
+	.4byte	0xa8
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.4byte	.LASF444
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.8byte	.LFB259
+	.8byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2425
+	.uleb128 0x31
+	.4byte	.LASF434
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x2425
+	.4byte	.LLST52
+	.uleb128 0x31
+	.4byte	.LASF435
+	.byte	0x1
+	.byte	0xbc
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+	.4byte	.LLST53
+	.uleb128 0x31
+	.4byte	.LASF436
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST54
+	.uleb128 0x31
+	.4byte	.LASF437
+	.byte	0x1
+	.byte	0xbd
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+	.4byte	.LLST55
+	.uleb128 0x32
+	.string	"i"
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+	.byte	0xbf
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+	.4byte	.LLST56
+	.uleb128 0x37
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+	.byte	0x1
+	.byte	0xc0
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+	.4byte	.LLST57
+	.uleb128 0x37
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+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST58
+	.uleb128 0x3a
+	.string	"arg"
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+	.byte	0xc1
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+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2a
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0xc2
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+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -104
+	.uleb128 0x2a
+	.4byte	.LASF374
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x243b
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x37
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+	.byte	0xc4
+	.4byte	0xa8
+	.4byte	.LLST59
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+	.4byte	.LASF441
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0xa8
+	.4byte	.LLST60
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xc6
+	.4byte	0x59
+	.4byte	.LLST61
+	.uleb128 0x37
+	.4byte	.LASF442
+	.byte	0x1
+	.byte	0xc7
+	.4byte	0x59
+	.4byte	.LLST62
+	.uleb128 0x48
+	.4byte	.LASF443
+	.byte	0x1
+	.byte	0xc8
+	.4byte	0xa8
+	.uleb128 0x3c
+	.4byte	0x2595
+	.8byte	.LBB46
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+	.byte	0x1
+	.byte	0xcb
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+	.uleb128 0x3d
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+	.uleb128 0x3d
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+	.uleb128 0x3e
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+	.uleb128 0x3f
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+	.uleb128 0x3f
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+	.4byte	.LLST66
+	.uleb128 0x41
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL161
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	0x2544
+	.8byte	.LBB60
+	.4byte	.Ldebug_ranges0+0x150
+	.byte	0x1
+	.2byte	0x152
+	.4byte	0x219e
+	.uleb128 0x43
+	.4byte	0x256a
+	.uleb128 0x43
+	.4byte	0x255f
+	.uleb128 0x43
+	.4byte	0x2554
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x3f
+	.4byte	0x2575
+	.4byte	.LLST67
+	.uleb128 0x40
+	.4byte	0x257e
+	.uleb128 0x3f
+	.4byte	0x2589
+	.4byte	.LLST68
+	.uleb128 0x33
+	.8byte	.LVL202
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC29
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL155
+	.4byte	0x289f
+	.4byte	0x21bc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x89
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL165
+	.4byte	0x2873
+	.uleb128 0x41
+	.8byte	.LVL167
+	.4byte	0x28aa
+	.4byte	0x21ec
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 0
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x110
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL172
+	.4byte	0x244b
+	.uleb128 0x3b
+	.8byte	.LVL175
+	.4byte	0x244b
+	.uleb128 0x41
+	.8byte	.LVL176
+	.4byte	0x2873
+	.4byte	0x222a
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC26
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x3a
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL180
+	.4byte	0x2873
+	.4byte	0x224a
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 192
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL181
+	.4byte	0x2873
+	.4byte	0x2274
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL182
+	.4byte	0x19a9
+	.4byte	0x2292
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL185
+	.4byte	0x25cc
+	.4byte	0x22b0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL187
+	.4byte	0x1d11
+	.4byte	0x22ce
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL210
+	.4byte	0x2873
+	.4byte	0x22ec
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL215
+	.4byte	0x19a9
+	.uleb128 0x3b
+	.8byte	.LVL217
+	.4byte	0x28b5
+	.uleb128 0x3b
+	.8byte	.LVL222
+	.4byte	0x25cc
+	.uleb128 0x3b
+	.8byte	.LVL223
+	.4byte	0x1d11
+	.uleb128 0x41
+	.8byte	.LVL228
+	.4byte	0x2873
+	.4byte	0x2345
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL229
+	.4byte	0x2873
+	.4byte	0x2364
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL230
+	.4byte	0x244b
+	.uleb128 0x41
+	.8byte	.LVL231
+	.4byte	0x2873
+	.4byte	0x2390
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC32
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL233
+	.4byte	0x19a9
+	.4byte	0x23ae
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL236
+	.4byte	0x25cc
+	.4byte	0x23cc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL239
+	.4byte	0x1d11
+	.4byte	0x23ea
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL241
+	.4byte	0x28b5
+	.uleb128 0x33
+	.8byte	.LVL247
+	.4byte	0x2873
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC31
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xe
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x88
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x68c
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x243b
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x4
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x244b
+	.uleb128 0xc
+	.4byte	0xce
+	.byte	0x3
+	.byte	0
+	.uleb128 0x4c
+	.4byte	.LASF445
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x24f6
+	.uleb128 0x36
+	.string	"uv"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.4byte	.LLST0
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xa6
+	.4byte	0x26d
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0x59
+	.4byte	.LLST1
+	.uleb128 0x41
+	.8byte	.LVL2
+	.4byte	0x28c0
+	.4byte	0x24bc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 56
+	.byte	0
+	.uleb128 0x3b
+	.8byte	.LVL5
+	.4byte	0x2873
+	.uleb128 0x41
+	.8byte	.LVL9
+	.4byte	0x28cc
+	.4byte	0x24e1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL12
+	.4byte	0x28d8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x64
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF446
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x2512
+	.uleb128 0x46
+	.4byte	.LASF447
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF448
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x2544
+	.uleb128 0x46
+	.4byte	.LASF449
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.uleb128 0x46
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.uleb128 0x46
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x2595
+	.uleb128 0x4e
+	.string	"arg"
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x18b3
+	.uleb128 0x46
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x18b3
+	.uleb128 0x46
+	.4byte	.LASF374
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x18b3
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF454
+	.byte	0x1
+	.byte	0x4c
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x4f
+	.4byte	.LASF474
+	.byte	0x1
+	.byte	0x2d
+	.byte	0x1
+	.4byte	0x25cc
+	.uleb128 0x46
+	.4byte	.LASF408
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x18b3
+	.uleb128 0x46
+	.4byte	.LASF374
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x18b3
+	.uleb128 0x47
+	.string	"i"
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.uleb128 0x48
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF455
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x285e
+	.uleb128 0x31
+	.4byte	.LASF408
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST36
+	.uleb128 0x31
+	.4byte	.LASF374
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST37
+	.uleb128 0x37
+	.4byte	.LASF456
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST38
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST39
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST40
+	.uleb128 0x32
+	.string	"q"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST41
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x4
+	.byte	0x30
+	.4byte	0x1f56
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x1359
+	.4byte	.LLST42
+	.uleb128 0x50
+	.4byte	.LASF457
+	.4byte	0x286e
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC41
+	.uleb128 0x41
+	.8byte	.LVL88
+	.4byte	0x2873
+	.4byte	0x268e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC13
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL90
+	.4byte	0x2873
+	.4byte	0x26ae
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL93
+	.4byte	0x2873
+	.4byte	0x26cc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL96
+	.4byte	0x1947
+	.4byte	0x26e4
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL97
+	.4byte	0x1947
+	.4byte	0x26fe
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 216
+	.byte	0x6
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL98
+	.4byte	0x18bf
+	.4byte	0x2728
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL99
+	.4byte	0x17b3
+	.4byte	0x2757
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL105
+	.4byte	0x2873
+	.4byte	0x2776
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC16
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL106
+	.4byte	0x28e3
+	.4byte	0x278e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL109
+	.4byte	0x2873
+	.4byte	0x27b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
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+	.uleb128 0x41
+	.8byte	.LVL112
+	.4byte	0x2873
+	.4byte	0x27d1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x41
+	.8byte	.LVL113
+	.4byte	0x2873
+	.4byte	0x27ef
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
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+	.8byte	.LVL115
+	.4byte	0x1947
+	.4byte	0x2807
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
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+	.4byte	0x18bf
+	.4byte	0x2831
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
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+	.uleb128 0x33
+	.8byte	.LVL117
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
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+	.uleb128 0x1
+	.byte	0x51
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+	.byte	0x8
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0xc
+	.4byte	0xce
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+	.uleb128 0x51
+	.4byte	.LASF458
+	.4byte	.LASF458
+	.byte	0x23
+	.byte	0x12
+	.uleb128 0x52
+	.4byte	.LASF459
+	.4byte	.LASF459
+	.byte	0x1d
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+	.4byte	.LASF460
+	.4byte	.LASF460
+	.byte	0x1d
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+	.uleb128 0x53
+	.4byte	.LASF459
+	.4byte	.LASF459
+	.uleb128 0x51
+	.4byte	.LASF461
+	.4byte	.LASF461
+	.byte	0xa
+	.byte	0x2d
+	.uleb128 0x51
+	.4byte	.LASF462
+	.4byte	.LASF462
+	.byte	0x24
+	.byte	0x29
+	.uleb128 0x51
+	.4byte	.LASF463
+	.4byte	.LASF463
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+	.byte	0x11
+	.uleb128 0x52
+	.4byte	.LASF464
+	.4byte	.LASF464
+	.byte	0x25
+	.2byte	0x1da
+	.uleb128 0x52
+	.4byte	.LASF465
+	.4byte	.LASF465
+	.byte	0x25
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+	.uleb128 0x51
+	.4byte	.LASF466
+	.4byte	.LASF466
+	.byte	0x26
+	.byte	0xb
+	.uleb128 0x52
+	.4byte	.LASF467
+	.4byte	.LASF467
+	.byte	0x1d
+	.2byte	0x398
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
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+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x2f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x30
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x33
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x18
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3a
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x3b
+	.uleb128 0x4109
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3d
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.uleb128 0xb
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4f
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x51
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST69:
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL250
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL249
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL249
+	.8byte	.LVL250
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL251
+	.8byte	.LVL252
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL252
+	.8byte	.LVL253
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL253
+	.8byte	.LVL254
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL254
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL70
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL78
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL70
+	.8byte	.LVL71
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL71
+	.8byte	.LVL73
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL73
+	.8byte	.LVL79
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL79
+	.8byte	.LVL82
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL70
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL74
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL80-1
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL70
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL72
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL70
+	.8byte	.LVL75
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL80-1
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x54
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL73
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL78
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL74
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL80-1
+	.8byte	.LVL82
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL82
+	.8byte	.LVL84
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL84
+	.8byte	.LVL85
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL85
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL73
+	.8byte	.LVL75
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL75
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL73
+	.8byte	.LVL77
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL73
+	.8byte	.LVL77
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL80-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL73
+	.8byte	.LVL77
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL77
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LFE278
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL62
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL63
+	.8byte	.LVL65
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL65
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL62
+	.8byte	.LVL64
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL64
+	.8byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL66
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL66
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL56
+	.8byte	.LVL58-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL58-1
+	.8byte	.LVL59
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL59
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL56
+	.8byte	.LVL58-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL58-1
+	.8byte	.LVL59
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL59
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL56
+	.8byte	.LVL57
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL57
+	.8byte	.LVL58-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL59
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL60
+	.8byte	.LVL61
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL13
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL17-1
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL31
+	.8byte	.LVL33
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL13
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL16
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL17-1
+	.8byte	.LVL32
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL32
+	.8byte	.LVL33
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL16
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL17-1
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL14
+	.8byte	.LVL17-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL17-1
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL20
+	.8byte	.LVL23-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL26
+	.8byte	.LVL28
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL33
+	.8byte	.LVL35
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL18
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL22
+	.8byte	.LVL25
+	.2byte	0x3
+	.byte	0x8c
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL25
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL33
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL18
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL33
+	.8byte	.LVL38
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL17
+	.8byte	.LVL18
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL18
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL33
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL15
+	.8byte	.LVL18
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL17
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL31
+	.8byte	.LVL33
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL15
+	.8byte	.LVL21
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL25
+	.8byte	.LVL27
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL30
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL33
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL47
+	.8byte	.LVL51
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL54
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL38
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL45
+	.8byte	.LVL46
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL38
+	.8byte	.LVL43
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL46
+	.8byte	.LVL49
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL49
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL54
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL142
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL120
+	.8byte	.LVL121
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL121
+	.8byte	.LVL130
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL130
+	.8byte	.LVL131
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL131
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL128
+	.8byte	.LVL132
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL135
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL135
+	.8byte	.LVL141
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL128
+	.8byte	.LVL132
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL132
+	.8byte	.LVL136
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL136
+	.8byte	.LVL137
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL137
+	.8byte	.LVL141
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -40
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL137
+	.8byte	.LVL141
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL123
+	.8byte	.LVL134
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL134
+	.8byte	.LVL138
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL140
+	.8byte	.LFE272
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL126
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL143
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL144
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL143
+	.8byte	.LVL146
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL146
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL143
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL145
+	.8byte	.LVL164
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL164
+	.8byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL226
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL143
+	.8byte	.LVL146
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL146
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL173
+	.8byte	.LVL174
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL174
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL177
+	.8byte	.LVL190
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL190
+	.8byte	.LVL194
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL194
+	.8byte	.LVL198
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL208
+	.8byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL230
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL154
+	.8byte	.LVL156
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL156
+	.8byte	.LVL157
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LVL164
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL180
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL191
+	.8byte	.LVL192
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL210
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL214
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL221
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL225
+	.8byte	.LVL227
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL232
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL242
+	.8byte	.LVL243
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL163
+	.8byte	.LVL164
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL166
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL190
+	.8byte	.LVL194
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL198
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL219
+	.8byte	.LVL220
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL220
+	.8byte	.LVL230
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL183
+	.8byte	.LVL185
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL185
+	.8byte	.LVL188
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL188
+	.8byte	.LVL190
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL195
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL197
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL216
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL219
+	.8byte	.LVL221
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL224
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL232
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL234
+	.8byte	.LVL237
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL237
+	.8byte	.LVL240
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL240
+	.8byte	.LVL242
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL178
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL194
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL208
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL232
+	.8byte	.LVL247
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL146
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL171
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL174
+	.8byte	.LVL202
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL202
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL208
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL208
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL225
+	.8byte	.LVL230
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL245
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL146
+	.8byte	.LVL183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL183
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL185
+	.8byte	.LVL186
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL189
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL190
+	.8byte	.LVL194
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL194
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL197
+	.8byte	.LVL198
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL198
+	.8byte	.LVL211
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL211
+	.8byte	.LVL213
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL213
+	.8byte	.LVL216
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL216
+	.8byte	.LVL217-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL217-1
+	.8byte	.LVL221
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL221
+	.8byte	.LVL224
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL224
+	.8byte	.LVL225
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL225
+	.8byte	.LVL230
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL234
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL234
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL235
+	.8byte	.LVL237
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL237
+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL238
+	.8byte	.LVL240
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL240
+	.8byte	.LVL241-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL241-1
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL242
+	.8byte	.LVL244
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL244
+	.8byte	.LVL246
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL146
+	.8byte	.LVL211
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL211
+	.8byte	.LVL212
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL213
+	.8byte	.LVL230
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL244
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL244
+	.8byte	.LVL245
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL146
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL157
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL146
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL157
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL146
+	.8byte	.LVL147
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL147
+	.8byte	.LVL148
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL149
+	.8byte	.LVL150
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL152
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL157
+	.8byte	.LVL158
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL160
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL161
+	.8byte	.LVL162
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL146
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL157
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL169
+	.8byte	.LVL170
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL170
+	.8byte	.LVL171
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL199
+	.8byte	.LVL200
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL200
+	.8byte	.LVL201
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL204
+	.8byte	.LVL205
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL206
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LVL208
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL199
+	.8byte	.LVL202
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL6
+	.8byte	.LVL7
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL7
+	.8byte	.LFE258
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL2
+	.8byte	.LVL3
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL3
+	.8byte	.LVL4
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL7
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL11
+	.8byte	.LFE258
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL86
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL87
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL101
+	.8byte	.LVL102
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL86
+	.8byte	.LVL88-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL88-1
+	.8byte	.LVL101
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL101
+	.8byte	.LVL102
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL88
+	.8byte	.LVL89
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL89
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL102
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL112
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL95
+	.8byte	.LVL96
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL96
+	.8byte	.LVL97
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL97
+	.8byte	.LVL100
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LVL111
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL102
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL111
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL89
+	.8byte	.LVL91
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LVL92
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL92
+	.8byte	.LVL93
+	.2byte	0x4
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL93
+	.8byte	.LVL100
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL102
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL107
+	.8byte	.LVL108
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL108
+	.8byte	.LFE201
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xac
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.8byte	.LFB259
+	.8byte	.LFE259-.LFB259
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB24
+	.8byte	.LBE24
+	.8byte	.LBB25
+	.8byte	.LBE25
+	.8byte	.LBB26
+	.8byte	.LBE26
+	.8byte	.LBB30
+	.8byte	.LBE30
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB27
+	.8byte	.LBE27
+	.8byte	.LBB31
+	.8byte	.LBE31
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	.LBB40
+	.8byte	.LBE40
+	.8byte	.LBB41
+	.8byte	.LBE41
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB46
+	.8byte	.LBE46
+	.8byte	.LBB54
+	.8byte	.LBE54
+	.8byte	.LBB55
+	.8byte	.LBE55
+	.8byte	.LBB56
+	.8byte	.LBE56
+	.8byte	.LBB57
+	.8byte	.LBE57
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB60
+	.8byte	.LBE60
+	.8byte	.LBB64
+	.8byte	.LBE64
+	.8byte	.LBB65
+	.8byte	.LBE65
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	.LFB201
+	.8byte	.LFE201
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB259
+	.8byte	.LFE259
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF309:
+	.string	"gd_t"
+.LASF15:
+	.string	"long int"
+.LASF39:
+	.string	"uclass_node"
+.LASF286:
+	.string	"dm_root_f"
+.LASF53:
+	.string	"flash_id"
+.LASF48:
+	.string	"prev"
+.LASF360:
+	.string	"of_match"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF357:
+	.string	"mem_malloc_start"
+.LASF453:
+	.string	"max_bank"
+.LASF332:
+	.string	"net_hostname"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF60:
+	.string	"base"
+.LASF353:
+	.string	"NETLOOP_RESTART"
+.LASF284:
+	.string	"new_gd"
+.LASF264:
+	.string	"pre_serial"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF466:
+	.string	"udelay"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF297:
+	.string	"malloc_ptr"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF420:
+	.string	"capacity"
+.LASF155:
+	.string	"rd_start"
+.LASF413:
+	.string	"err_adr"
+.LASF373:
+	.string	"property"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF287:
+	.string	"uclass_root"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF42:
+	.string	"flags"
+.LASF408:
+	.string	"start_adr"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF266:
+	.string	"baudrate"
+.LASF334:
+	.string	"net_ethaddr"
+.LASF294:
+	.string	"timebase_l"
+.LASF21:
+	.string	"errno"
+.LASF32:
+	.string	"node"
+.LASF361:
+	.string	"bind"
+.LASF458:
+	.string	"printf"
+.LASF8:
+	.string	"unsigned int"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF47:
+	.string	"next"
+.LASF109:
+	.string	"version"
+.LASF393:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF340:
+	.string	"net_rx_packet"
+.LASF38:
+	.string	"parent_priv"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF57:
+	.string	"flash_info"
+.LASF113:
+	.string	"size_dt_struct"
+.LASF378:
+	.string	"p_current"
+.LASF22:
+	.string	"___strtok"
+.LASF67:
+	.string	"bi_memsize"
+.LASF416:
+	.string	"cpu_2_io"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF45:
+	.string	"udevice"
+.LASF460:
+	.string	"memset"
+.LASF85:
+	.string	"bd_t"
+.LASF407:
+	.string	"buf_len"
+.LASF270:
+	.string	"bus_clk"
+.LASF399:
+	.string	"DIAGONALSCAN"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF424:
+	.string	"random_test2"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF409:
+	.string	"prt_en"
+.LASF275:
+	.string	"env_addr"
+.LASF421:
+	.string	"wr_value"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF167:
+	.string	"command_ret_t"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF313:
+	.string	"load_addr"
+.LASF288:
+	.string	"fdt_blob"
+.LASF328:
+	.string	"net_gateway"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF349:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF98:
+	.string	"complete"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF278:
+	.string	"relocaddr"
+.LASF322:
+	.string	"send"
+.LASF3:
+	.string	"signed char"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF108:
+	.string	"off_mem_rsvmap"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF465:
+	.string	"regulator_set_value"
+.LASF19:
+	.string	"uint32_t"
+.LASF382:
+	.string	"udevice_id"
+.LASF315:
+	.string	"save_size"
+.LASF291:
+	.string	"of_root"
+.LASF359:
+	.string	"mem_malloc_brk"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF405:
+	.string	"test_pat_param"
+.LASF293:
+	.string	"timebase_h"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF276:
+	.string	"env_valid"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF456:
+	.string	"shift"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF467:
+	.string	"malloc"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF326:
+	.string	"index"
+.LASF40:
+	.string	"child_head"
+.LASF137:
+	.string	"image_info_t"
+.LASF36:
+	.string	"uclass"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF441:
+	.string	"test_banks"
+.LASF362:
+	.string	"probe"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF258:
+	.string	"lastinc"
+.LASF386:
+	.string	"post_bind"
+.LASF358:
+	.string	"mem_malloc_end"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF126:
+	.string	"ih_type"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF350:
+	.string	"net_ping_ip"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF377:
+	.string	"ofnode"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF307:
+	.string	"child"
+.LASF59:
+	.string	"lmb_property"
+.LASF260:
+	.string	"tlb_addr"
+.LASF375:
+	.string	"value"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF107:
+	.string	"off_dt_strings"
+.LASF111:
+	.string	"boot_cpuid_phys"
+.LASF363:
+	.string	"remove"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF114:
+	.string	"working_fdt"
+.LASF308:
+	.string	"sibling"
+.LASF158:
+	.string	"ft_len"
+.LASF127:
+	.string	"ih_comp"
+.LASF442:
+	.string	"abort"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF268:
+	.string	"global_data"
+.LASF317:
+	.string	"s_addr"
+.LASF136:
+	.string	"arch"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF312:
+	.string	"__dtb_dt_spl_begin"
+.LASF103:
+	.string	"fdt_header"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF388:
+	.string	"pre_probe"
+.LASF351:
+	.string	"net_loop_state"
+.LASF372:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF450:
+	.string	"max_freq"
+.LASF300:
+	.string	"video_bottom"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF327:
+	.string	"eth_current"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF23:
+	.string	"_Bool"
+.LASF12:
+	.string	"phys_size_t"
+.LASF448:
+	.string	"scan_freq"
+.LASF37:
+	.string	"uclass_priv"
+.LASF132:
+	.string	"image_len"
+.LASF474:
+	.string	"print_available_addr"
+.LASF471:
+	.string	"jt_funcs"
+.LASF431:
+	.string	"next_col"
+.LASF463:
+	.string	"ctrlc"
+.LASF330:
+	.string	"net_dns_server"
+.LASF433:
+	.string	"os_reg"
+.LASF304:
+	.string	"phandle"
+.LASF285:
+	.string	"dm_root"
+.LASF117:
+	.string	"ih_magic"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF133:
+	.string	"load"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF273:
+	.string	"fb_base"
+.LASF447:
+	.string	"freq"
+.LASF150:
+	.string	"fit_uname_fdt"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF289:
+	.string	"new_fdt"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF437:
+	.string	"argv"
+.LASF462:
+	.string	"strict_strtoul"
+.LASF41:
+	.string	"sibling_node"
+.LASF333:
+	.string	"net_root_path"
+.LASF49:
+	.string	"block_drvr"
+.LASF9:
+	.string	"long long int"
+.LASF418:
+	.string	"random_test"
+.LASF427:
+	.string	"diagonalscan"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF314:
+	.string	"save_addr"
+.LASF35:
+	.string	"priv"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF14:
+	.string	"char"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF52:
+	.string	"sector_count"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF131:
+	.string	"image_start"
+.LASF56:
+	.string	"flash_info_t"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF395:
+	.string	"CHANGEFREQ"
+.LASF473:
+	.string	"exit"
+.LASF336:
+	.string	"net_ip"
+.LASF384:
+	.string	"data"
+.LASF299:
+	.string	"video_top"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF356:
+	.string	"net_state"
+.LASF282:
+	.string	"start_addr_sp"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF18:
+	.string	"uint8_t"
+.LASF7:
+	.string	"__u32"
+.LASF426:
+	.string	"cmp_value"
+.LASF364:
+	.string	"unbind"
+.LASF280:
+	.string	"mon_len"
+.LASF355:
+	.string	"NETLOOP_FAIL"
+.LASF455:
+	.string	"crosstalk"
+.LASF366:
+	.string	"child_post_bind"
+.LASF305:
+	.string	"full_name"
+.LASF400:
+	.string	"FASTTEST"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF296:
+	.string	"malloc_limit"
+.LASF138:
+	.string	"bootm_headers"
+.LASF272:
+	.string	"mem_clk"
+.LASF438:
+	.string	"test_case"
+.LASF168:
+	.string	"uclass_id"
+.LASF344:
+	.string	"net_our_vlan"
+.LASF95:
+	.string	"repeatable"
+.LASF319:
+	.string	"enetaddr"
+.LASF310:
+	.string	"monitor_flash_len"
+.LASF368:
+	.string	"child_post_remove"
+.LASF371:
+	.string	"per_child_auto_alloc_size"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF325:
+	.string	"write_hwaddr"
+.LASF365:
+	.string	"ofdata_to_platdata"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF469:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF130:
+	.string	"image_info"
+.LASF29:
+	.string	"platdata"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF105:
+	.string	"totalsize"
+.LASF385:
+	.string	"uclass_driver"
+.LASF432:
+	.string	"get_page_size"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF324:
+	.string	"halt"
+.LASF414:
+	.string	"print_memory"
+.LASF129:
+	.string	"image_header_t"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF410:
+	.string	"buful"
+.LASF346:
+	.string	"net_restart_wrap"
+.LASF383:
+	.string	"compatible"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF271:
+	.string	"pci_clk"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF343:
+	.string	"net_null_ethaddr"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF337:
+	.string	"net_server_ip"
+.LASF402:
+	.string	"TESTCASSMAX"
+.LASF51:
+	.string	"size"
+.LASF58:
+	.string	"long double"
+.LASF401:
+	.string	"FULLTEST"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF55:
+	.string	"protect"
+.LASF412:
+	.string	"reread"
+.LASF295:
+	.string	"malloc_base"
+.LASF1:
+	.string	"long unsigned int"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF116:
+	.string	"image_header"
+.LASF110:
+	.string	"last_comp_version"
+.LASF311:
+	.string	"__dtb_dt_begin"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF394:
+	.string	"console_buffer"
+.LASF162:
+	.string	"cmdline_end"
+.LASF436:
+	.string	"argc"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF106:
+	.string	"off_dt_struct"
+.LASF302:
+	.string	"serial"
+.LASF329:
+	.string	"net_netmask"
+.LASF65:
+	.string	"bd_info"
+.LASF161:
+	.string	"cmdline_start"
+.LASF166:
+	.string	"images"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF403:
+	.string	"g_isi_pattern"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF301:
+	.string	"pm_ctx_phys"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF33:
+	.string	"driver_data"
+.LASF396:
+	.string	"SCANFREQ"
+.LASF392:
+	.string	"per_device_auto_alloc_size"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF444:
+	.string	"do_ddr_test"
+.LASF387:
+	.string	"pre_unbind"
+.LASF13:
+	.string	"sizetype"
+.LASF338:
+	.string	"net_tx_packet"
+.LASF159:
+	.string	"initrd_start"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF34:
+	.string	"parent"
+.LASF6:
+	.string	"short int"
+.LASF415:
+	.string	"write_buf_to_ddr"
+.LASF125:
+	.string	"ih_arch"
+.LASF452:
+	.string	"get_test_addr"
+.LASF306:
+	.string	"properties"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF454:
+	.string	"available"
+.LASF397:
+	.string	"RANDOM"
+.LASF374:
+	.string	"length"
+.LASF331:
+	.string	"net_nis_domain"
+.LASF121:
+	.string	"ih_load"
+.LASF292:
+	.string	"env_buf"
+.LASF354:
+	.string	"NETLOOP_SUCCESS"
+.LASF472:
+	.string	"ofnode_union"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF115:
+	.string	"fdt32_t"
+.LASF290:
+	.string	"fdt_size"
+.LASF435:
+	.string	"flag"
+.LASF404:
+	.string	"test_pattern"
+.LASF434:
+	.string	"cmdtp"
+.LASF17:
+	.string	"ulong"
+.LASF119:
+	.string	"ih_time"
+.LASF120:
+	.string	"ih_size"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF97:
+	.string	"help"
+.LASF445:
+	.string	"set_vdd_logic"
+.LASF320:
+	.string	"iobase"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF352:
+	.string	"NETLOOP_CONTINUE"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF96:
+	.string	"usage"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF62:
+	.string	"region"
+.LASF157:
+	.string	"ft_addr"
+.LASF398:
+	.string	"CROSSTALK"
+.LASF470:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF28:
+	.string	"name"
+.LASF54:
+	.string	"start"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF24:
+	.string	"image_base"
+.LASF390:
+	.string	"pre_remove"
+.LASF169:
+	.string	"UCLASS_ROOT"
+.LASF104:
+	.string	"magic"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF461:
+	.string	"strcasecmp"
+.LASF417:
+	.string	"cmp_buf_data"
+.LASF122:
+	.string	"ih_ep"
+.LASF283:
+	.string	"reloc_off"
+.LASF321:
+	.string	"init"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF243:
+	.string	"UCLASS_VIDEO"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF440:
+	.string	"test_times"
+.LASF5:
+	.string	"__u8"
+.LASF376:
+	.string	"of_offset"
+.LASF256:
+	.string	"arch_global_data"
+.LASF94:
+	.string	"maxargs"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF303:
+	.string	"device_node"
+.LASF261:
+	.string	"tlb_size"
+.LASF66:
+	.string	"bi_memstart"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF443:
+	.string	"scan_freq_loop"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF112:
+	.string	"size_dt_strings"
+.LASF339:
+	.string	"net_rx_packets"
+.LASF63:
+	.string	"memory"
+.LASF27:
+	.string	"driver"
+.LASF156:
+	.string	"rd_end"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF316:
+	.string	"in_addr"
+.LASF449:
+	.string	"min_freq"
+.LASF430:
+	.string	"pattern"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF160:
+	.string	"initrd_end"
+.LASF135:
+	.string	"type"
+.LASF341:
+	.string	"net_rx_packet_len"
+.LASF0:
+	.string	"unsigned char"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF16:
+	.string	"ushort"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF348:
+	.string	"net_boot_file_size"
+.LASF391:
+	.string	"destroy"
+.LASF428:
+	.string	"next_adr"
+.LASF274:
+	.string	"have_console"
+.LASF281:
+	.string	"irq_sp"
+.LASF185:
+	.string	"UCLASS_CODEC"
+.LASF380:
+	.string	"uc_drv"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF298:
+	.string	"cur_serial_dev"
+.LASF267:
+	.string	"addr"
+.LASF46:
+	.string	"list_head"
+.LASF164:
+	.string	"state"
+.LASF20:
+	.string	"__be32"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF342:
+	.string	"net_bcast_ethaddr"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF422:
+	.string	"reread_val"
+.LASF468:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF419:
+	.string	"baseaddr"
+.LASF335:
+	.string	"net_server_ethaddr"
+.LASF439:
+	.string	"err_case"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF425:
+	.string	"random_test1"
+.LASF318:
+	.string	"eth_device"
+.LASF323:
+	.string	"recv"
+.LASF50:
+	.string	"select_hwpart"
+.LASF4:
+	.string	"uchar"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF381:
+	.string	"dev_head"
+.LASF2:
+	.string	"short unsigned int"
+.LASF389:
+	.string	"post_probe"
+.LASF367:
+	.string	"child_pre_probe"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF411:
+	.string	"wr_val"
+.LASF459:
+	.string	"memcpy"
+.LASF347:
+	.string	"net_boot_file_name"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF379:
+	.string	"current"
+.LASF457:
+	.string	"__func__"
+.LASF64:
+	.string	"reserved"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF128:
+	.string	"ih_name"
+.LASF277:
+	.string	"ram_top"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF43:
+	.string	"req_seq"
+.LASF279:
+	.string	"ram_size"
+.LASF423:
+	.string	"err_addr"
+.LASF446:
+	.string	"set_ddr_freq"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF369:
+	.string	"priv_auto_alloc_size"
+.LASF30:
+	.string	"parent_platdata"
+.LASF163:
+	.string	"verify"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF451:
+	.string	"times"
+.LASF464:
+	.string	"regulator_get_by_platname"
+.LASF84:
+	.string	"bi_dram"
+.LASF134:
+	.string	"comp"
+.LASF345:
+	.string	"net_native_vlan"
+.LASF429:
+	.string	"page_size"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF269:
+	.string	"cpu_clk"
+.LASF406:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF370:
+	.string	"platdata_auto_alloc_size"
+.LASF124:
+	.string	"ih_os"
+.LASF61:
+	.string	"lmb_region"
+.LASF249:
+	.string	"UCLASS_KEY"
+	.hidden	malloc
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/cmd/ddr_tool/ddr_test_rk3328.S b/cmd/ddr_tool/ddr_test_rk3328.S
new file mode 100644
index 0000000000..985d7be5cb
--- /dev/null
+++ b/cmd/ddr_tool/ddr_test_rk3328.S
@@ -0,0 +1,11844 @@
+	.arch armv8-a+nosimd
+	.file	"ddr_test_code.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.set_ddr_freq,"ax",@progbits
+	.align	2
+	.type	set_ddr_freq, %function
+set_ddr_freq:
+.LFB256:
+	.file 1 "cmd/ddr_tool/ddr_tool.c"
+	.loc 1 147 0
+	.cfi_startproc
+.LVL0:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 1 149 0
+	mov	x1, 16959
+	movk	x1, 0xf, lsl 16
+	cmp	x0, x1
+	.loc 1 147 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 1 149 0
+	bhi	.L2
+	.loc 1 150 0
+	add	x1, x1, 1
+	mul	x0, x0, x1
+.LVL1:
+	.loc 1 151 0
+	cbz	x0, .L3
+.L2:
+	.loc 1 152 0
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL2:
+	.loc 1 153 0
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL3:
+.L3:
+	.loc 1 155 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL4:
+	mov	x19, x0
+.LVL5:
+	.loc 1 156 0
+	mov	x1, x0
+	adrp	x0, .LC1
+.LVL6:
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL7:
+	.loc 1 162 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+.LVL8:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE256:
+	.size	set_ddr_freq, .-set_ddr_freq
+	.section	.text.set_vdd_logic,"ax",@progbits
+	.align	2
+	.type	set_vdd_logic, %function
+set_vdd_logic:
+.LFB257:
+	.loc 1 165 0
+	.cfi_startproc
+.LVL9:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 1 169 0
+	add	x1, x29, 40
+	.loc 1 165 0
+	mov	w20, w0
+	.loc 1 169 0
+	adrp	x0, .LC2
+.LVL10:
+	add	x0, x0, :lo12:.LC2
+	bl	regulator_get_by_platname
+.LVL11:
+	.loc 1 170 0
+	cbz	w0, .L9
+	mov	w19, w0
+	.loc 1 171 0
+	adrp	x0, .LC3
+.LVL12:
+	add	x0, x0, :lo12:.LC3
+.LVL13:
+.L15:
+	.loc 1 179 0
+	bl	printf
+.LVL14:
+.L8:
+	.loc 1 181 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL15:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL16:
+.L9:
+	.cfi_restore_state
+	.loc 1 176 0
+	ldr	x0, [x29, 40]
+.LVL17:
+	mov	w1, w20
+	bl	regulator_set_value
+.LVL18:
+	mov	w19, w0
+.LVL19:
+	.loc 1 177 0
+	mov	x0, 100
+.LVL20:
+	bl	udelay
+.LVL21:
+	.loc 1 178 0
+	cbz	w19, .L8
+	.loc 1 179 0
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	b	.L15
+	.cfi_endproc
+.LFE257:
+	.size	set_vdd_logic, .-set_vdd_logic
+	.section	.text.random_test,"ax",@progbits
+	.align	2
+	.global	random_test
+	.type	random_test, %function
+random_test:
+.LFB274:
+	.file 2 "cmd/ddr_tool/random_test.c"
+	.loc 2 88 0
+	.cfi_startproc
+.LVL22:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+.LBB12:
+.LBB13:
+	.loc 2 18 0
+	mov	x2, x1
+.LBE13:
+.LBE12:
+	.loc 2 88 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+.LVL23:
+	stp	x23, x24, [sp, 48]
+.LBB18:
+.LBB14:
+	.loc 2 37 0
+	adrp	x21, .LC6
+.LBE14:
+.LBE18:
+	.loc 2 88 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	mov	x23, x1
+.LVL24:
+	stp	x19, x20, [sp, 16]
+.LBB19:
+.LBB15:
+	.loc 2 18 0
+	mov	w1, -2139062144
+.LVL25:
+.LBE15:
+.LBE19:
+	.loc 2 88 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+.LBB20:
+.LBB16:
+	.loc 2 23 0
+	adrp	x24, .LC5
+	.loc 2 18 0
+	bl	memset
+.LVL26:
+	.loc 2 23 0
+	add	x24, x24, :lo12:.LC5
+	.loc 2 37 0
+	add	x21, x21, :lo12:.LC6
+	.loc 2 24 0
+	lsr	x0, x23, 2
+	.loc 2 14 0
+	mov	w27, 0
+	.loc 2 20 0
+	mov	w25, 1077952576
+	.loc 2 19 0
+	mov	w20, -2139062144
+	.loc 2 22 0
+	mov	w28, 0
+	.loc 2 24 0
+	str	x0, [x29, 96]
+.LVL27:
+.L22:
+	.loc 2 23 0
+	mov	w1, w28
+	mov	x0, x24
+	bl	printf
+.LVL28:
+	.loc 2 24 0
+	mov	w1, 0
+.LVL29:
+.L17:
+	ldr	x2, [x29, 96]
+	uxtw	x0, w1
+	cmp	x0, x2
+	bcc	.L21
+.LVL30:
+.L20:
+	.loc 2 37 0
+	mov	x0, x21
+	.loc 2 22 0
+	add	w28, w28, 1
+.LVL31:
+	.loc 2 37 0
+	bl	printf
+.LVL32:
+	.loc 2 35 0
+	lsr	w25, w25, 1
+.LVL33:
+	.loc 2 36 0
+	lsr	w20, w20, 1
+.LVL34:
+	.loc 2 22 0
+	cmp	w28, 8
+	bne	.L22
+	mov	x19, -1
+	b	.L19
+.LVL35:
+.L21:
+	.loc 2 25 0
+	lsl	x0, x0, 2
+	add	x19, x22, x0
+	ldr	w2, [x22, x0]
+	str	w2, [x29, 108]
+	.loc 2 26 0
+	uxtw	x2, w2
+	cmp	w2, w20
+	beq	.L18
+.LVL36:
+	.loc 2 28 0
+	ldr	w27, [x19]
+	.loc 2 33 0
+	cmn	x19, #1
+	beq	.L20
+.LVL37:
+.L19:
+	.loc 2 39 0
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.LVL38:
+	.loc 2 40 0
+	cmn	x19, #1
+	beq	.L23
+	.loc 2 41 0
+	ldr	w2, [x29, 108]
+	adrp	x0, .LC8
+	mov	w4, w20
+	mov	w3, w27
+	mov	x1, x19
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.LVL39:
+.L36:
+.LBE16:
+.LBE20:
+.LBB21:
+.LBB22:
+	.loc 2 82 0
+	mov	w0, -1
+.L16:
+.LBE22:
+.LBE21:
+	.loc 2 96 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL40:
+	ldp	x23, x24, [sp, 48]
+.LVL41:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL42:
+.L18:
+	.cfi_restore_state
+.LBB24:
+.LBB17:
+	.loc 2 31 0
+	str	w25, [x22, x0]
+	.loc 2 24 0
+	add	w1, w1, 1
+.LVL43:
+	b	.L17
+.LVL44:
+.L23:
+.LBE17:
+.LBE24:
+.LBB25:
+.LBB23:
+	.loc 2 58 0
+	adrp	x25, .LC9
+.LVL45:
+	.loc 2 76 0
+	adrp	x24, .LC10
+	.loc 2 66 0
+	lsr	x28, x23, 3
+.LVL46:
+	.loc 2 58 0
+	add	x25, x25, :lo12:.LC9
+	.loc 2 76 0
+	add	x24, x24, :lo12:.LC10
+	.loc 2 66 0
+	mov	x27, 0
+	mov	x19, 0
+.LVL47:
+.L30:
+	.loc 2 58 0
+	mov	x1, x19
+	mov	x0, x25
+	bl	printf
+.LVL48:
+	.loc 2 60 0
+	lsl	x20, x19, 8
+	lsl	x0, x19, 24
+	orr	x20, x20, x19, lsl 16
+	orr	x0, x0, x19, lsl 32
+	.loc 2 64 0
+	mov	x2, x23
+	.loc 2 60 0
+	orr	x20, x20, x0
+	lsl	x0, x19, 40
+	orr	x0, x0, x19, lsl 48
+	orr	x20, x20, x0
+	orr	x0, x19, x19, lsl 56
+	orr	x20, x20, x0
+.LVL49:
+	.loc 2 64 0
+	mov	x0, x22
+	mov	w1, w20
+	bl	memset
+.LVL50:
+	.loc 2 66 0
+	mov	x0, 0
+.LVL51:
+.L25:
+	cmp	x0, x28
+	bne	.L29
+.LVL52:
+.L28:
+	.loc 2 76 0
+	mov	x0, x24
+.LVL53:
+	.loc 2 57 0
+	add	x19, x19, 1
+.LVL54:
+	.loc 2 76 0
+	bl	printf
+.LVL55:
+	.loc 2 57 0
+	cmp	x19, 256
+	bne	.L30
+	mov	x21, -1
+	b	.L27
+.LVL56:
+.L29:
+	lsl	x1, x0, 3
+	add	x21, x1, x22
+	.loc 2 67 0
+	ldr	x26, [x1, x22]
+.LVL57:
+	.loc 2 68 0
+	cmp	x20, x26
+	beq	.L26
+.LVL58:
+	.loc 2 70 0
+	ldr	x27, [x21]
+.LVL59:
+	.loc 2 74 0
+	cmn	x21, #1
+	beq	.L28
+.LVL60:
+.L27:
+	.loc 2 78 0
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.LVL61:
+	.loc 2 84 0
+	mov	w0, 0
+	.loc 2 79 0
+	cmn	x21, #1
+	beq	.L16
+	.loc 2 80 0
+	mov	x4, x20
+	mov	x3, x27
+	mov	x2, x26
+	mov	x1, x21
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.LVL62:
+	b	.L36
+.LVL63:
+.L26:
+	.loc 2 66 0
+	add	x0, x0, 1
+.LVL64:
+	b	.L25
+.LBE23:
+.LBE25:
+	.cfi_endproc
+.LFE274:
+	.size	random_test, .-random_test
+	.section	.text.scan_freq,"ax",@progbits
+	.align	2
+	.type	scan_freq, %function
+scan_freq:
+.LFB255:
+	.loc 1 104 0
+	.cfi_startproc
+.LVL65:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	w20, w0
+	stp	x23, x24, [sp, 48]
+	.loc 1 111 0
+	mov	w0, 16960
+.LVL66:
+	.loc 1 104 0
+	stp	x21, x22, [sp, 32]
+	.loc 1 111 0
+	movk	w0, 0xf, lsl 16
+	.loc 1 104 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	mov	x24, x2
+	str	x27, [sp, 80]
+	.cfi_offset 27, -16
+	.loc 1 111 0
+	cmp	w20, w0
+	bls	.L38
+	.loc 1 112 0
+	udiv	w20, w20, w0
+.LVL67:
+.L38:
+	.loc 1 113 0
+	cmp	w1, w0
+	bls	.L39
+	.loc 1 114 0
+	udiv	w1, w1, w0
+.LVL68:
+.L39:
+	.loc 1 116 0
+	cmp	w20, w1
+	bls	.L40
+	mov	w0, w20
+	mov	w20, w1
+.LVL69:
+	mov	w1, w0
+.LVL70:
+.L40:
+	.loc 1 125 0
+	mov	w25, 16960
+	.loc 1 126 0
+	adrp	x22, .LC13
+	.loc 1 129 0
+	adrp	x23, .LC14
+	.loc 1 121 0
+	sub	w19, w1, w20
+.LVL71:
+	.loc 1 126 0
+	add	x22, x22, :lo12:.LC13
+	.loc 1 129 0
+	add	x23, x23, :lo12:.LC14
+	.loc 1 123 0
+	mov	w21, 0
+	.loc 1 125 0
+	movk	w25, 0xf, lsl 16
+.LVL72:
+.L41:
+	.loc 1 123 0 discriminator 1
+	cmp	x24, x21, uxtw
+	bhi	.L45
+	.loc 1 123 0 is_stmt 0 discriminator 3
+	cbnz	x24, .L46
+.L45:
+	.loc 1 124 0 is_stmt 1
+	bl	rand
+.LVL73:
+	udiv	w1, w0, w19
+	msub	w0, w1, w19, w0
+.LVL74:
+	add	w0, w0, w20
+	.loc 1 125 0
+	mul	w0, w0, w25
+	and	x0, x0, 4294967232
+	bl	rockchip_ddrclk_sip_round_rate_v2
+.LVL75:
+	.loc 1 126 0
+	mov	w1, w21
+	mov	w2, w0
+	.loc 1 125 0
+	mov	x26, x0
+.LVL76:
+	.loc 1 126 0
+	mov	x0, x22
+.LVL77:
+	bl	printf
+.LVL78:
+	.loc 1 127 0
+	uxtw	x0, w26
+	bl	rockchip_ddrclk_sip_set_rate_v2
+.LVL79:
+	.loc 1 128 0
+	bl	rockchip_ddrclk_sip_recalc_rate_v2
+.LVL80:
+	.loc 1 129 0
+	mov	w1, w0
+	.loc 1 128 0
+	mov	x27, x0
+.LVL81:
+	.loc 1 129 0
+	mov	x0, x23
+.LVL82:
+	bl	printf
+.LVL83:
+	.loc 1 132 0
+	ldr	x0, [x18]
+	mov	x1, 1048576
+	ldr	x0, [x0, 136]
+	bl	random_test
+.LVL84:
+	mov	w26, w0
+.LVL85:
+	.loc 1 133 0
+	cbz	w0, .L42
+	.loc 1 134 0
+	adrp	x0, .LC15
+.LVL86:
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.LVL87:
+.L37:
+	.loc 1 144 0
+	mov	w0, w26
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL88:
+	ldp	x21, x22, [sp, 32]
+.LVL89:
+	ldp	x23, x24, [sp, 48]
+.LVL90:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL91:
+.L42:
+	.cfi_restore_state
+	.loc 1 137 0
+	bl	ctrlc
+.LVL92:
+	cbz	w0, .L44
+.LVL93:
+.L46:
+	.loc 1 123 0
+	mov	w26, 0
+	b	.L37
+.LVL94:
+.L44:
+	.loc 1 123 0 is_stmt 0 discriminator 2
+	add	w21, w21, 1
+.LVL95:
+	b	.L41
+	.cfi_endproc
+.LFE255:
+	.size	scan_freq, .-scan_freq
+	.section	.text.cpu_2_io,"ax",@progbits
+	.align	2
+	.global	cpu_2_io
+	.type	cpu_2_io, %function
+cpu_2_io:
+.LFB275:
+	.file 3 "cmd/ddr_tool/tool_common.c"
+	.loc 3 11 0 is_stmt 1
+	.cfi_startproc
+.LVL96:
+	ret
+	.cfi_endproc
+.LFE275:
+	.size	cpu_2_io, .-cpu_2_io
+	.section	.text.write_buf_to_ddr,"ax",@progbits
+	.align	2
+	.global	write_buf_to_ddr
+	.type	write_buf_to_ddr, %function
+write_buf_to_ddr:
+.LFB276:
+	.loc 3 29 0
+	.cfi_startproc
+.LVL97:
+	.loc 3 37 0
+	lsr	w1, w1, 3
+.LVL98:
+	.loc 3 39 0
+	lsr	x3, x3, 3
+.LVL99:
+	.loc 3 37 0
+	sub	w1, w1, #1
+.LVL100:
+	.loc 3 39 0
+	mov	w4, 0
+	mov	w5, 0
+.LVL101:
+.L53:
+	.loc 3 39 0 is_stmt 0 discriminator 1
+	uxtw	x6, w5
+	cmp	x6, x3
+	bcc	.L54
+	.loc 3 44 0 is_stmt 1
+	ret
+.L54:
+	.loc 3 40 0 discriminator 3
+	ldr	x7, [x0, w4, uxtw 3]
+	.loc 3 41 0 discriminator 3
+	add	w4, w4, 1
+.LVL102:
+	.loc 3 40 0 discriminator 3
+	str	x7, [x2, x6, lsl 3]
+	.loc 3 42 0 discriminator 3
+	and	w4, w1, w4
+.LVL103:
+	.loc 3 39 0 discriminator 3
+	add	w5, w5, 1
+.LVL104:
+	b	.L53
+	.cfi_endproc
+.LFE276:
+	.size	write_buf_to_ddr, .-write_buf_to_ddr
+	.section	.text.cmp_buf_data,"ax",@progbits
+	.align	2
+	.global	cmp_buf_data
+	.type	cmp_buf_data, %function
+cmp_buf_data:
+.LFB277:
+	.loc 3 48 0
+	.cfi_startproc
+.LVL105:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 60 0
+	lsr	w1, w1, 3
+.LVL106:
+	.loc 3 48 0
+	mov	w10, w4
+	.loc 3 60 0
+	sub	w1, w1, #1
+	.loc 3 48 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 62 0
+	lsr	x3, x3, 3
+.LVL107:
+	.loc 3 48 0
+	mov	x8, x2
+.LVL108:
+	.loc 3 62 0
+	mov	w6, 0
+	.loc 3 56 0
+	mov	x2, 0
+.LVL109:
+	.loc 3 62 0
+	mov	w7, 0
+	.loc 3 48 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+.LVL110:
+.L56:
+	.loc 3 62 0 discriminator 1
+	uxtw	x5, w7
+	cmp	x5, x3
+	bcc	.L59
+	.loc 3 61 0
+	mov	x19, 0
+	.loc 3 54 0
+	mov	x3, 0
+	.loc 3 55 0
+	mov	x4, 0
+	b	.L58
+.L59:
+	.loc 3 63 0
+	lsl	x5, x5, 3
+	.loc 3 64 0
+	ldr	x4, [x0, w6, uxtw 3]
+	.loc 3 63 0
+	add	x19, x8, x5
+	ldr	x2, [x8, x5]
+.LVL111:
+	.loc 3 64 0
+	cmp	x2, x4
+	beq	.L57
+	.loc 3 65 0
+	ldr	x3, [x19]
+.LVL112:
+.L58:
+	.loc 3 73 0
+	cmp	x19, 0
+	ccmp	w10, 0, 4, ne
+	beq	.L55
+	.loc 3 74 0
+	adrp	x0, .LC16
+.LVL113:
+	mov	x1, x19
+.LVL114:
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.LVL115:
+.L55:
+	.loc 3 78 0
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+.LVL116:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL117:
+.L57:
+	.cfi_restore_state
+	.loc 3 70 0 discriminator 2
+	add	w6, w6, 1
+.LVL118:
+	.loc 3 62 0 discriminator 2
+	add	w7, w7, 1
+.LVL119:
+	.loc 3 71 0 discriminator 2
+	and	w6, w1, w6
+.LVL120:
+	b	.L56
+	.cfi_endproc
+.LFE277:
+	.size	cmp_buf_data, .-cmp_buf_data
+	.section	.text.crosstalk,"ax",@progbits
+	.align	2
+	.global	crosstalk
+	.type	crosstalk, %function
+crosstalk:
+.LFB200:
+	.file 4 "cmd/ddr_tool/crosstalk.c"
+	.loc 4 46 0
+	.cfi_startproc
+.LVL121:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.loc 4 71 0
+	add	x20, x29, 112
+	.loc 4 46 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	.loc 4 63 0
+	adrp	x0, .LC17
+.LVL122:
+	.loc 4 46 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	mov	x23, x1
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.loc 4 63 0
+	add	x0, x0, :lo12:.LC17
+	.loc 4 68 0
+	adrp	x24, .LC19
+	.loc 4 63 0
+	bl	printf
+.LVL123:
+	.loc 4 68 0
+	add	x27, x24, :lo12:.LC19
+	.loc 4 66 0
+	adrp	x21, .LC18
+	.loc 4 64 0
+	mov	w19, 0
+	.loc 4 66 0
+	add	x0, x21, :lo12:.LC18
+	str	x0, [x29, 104]
+.LVL124:
+.L70:
+	ldr	x0, [x29, 104]
+	.loc 4 71 0
+	mov	w25, 1
+	.loc 4 66 0
+	mov	w1, w19
+	.loc 4 71 0
+	lsl	w25, w25, w19
+	.loc 4 65 0
+	mov	w28, -1
+	.loc 4 67 0
+	mov	w26, 0
+	.loc 4 66 0
+	bl	printf
+.LVL125:
+.L69:
+	.loc 4 68 0
+	mov	w1, w26
+	mov	x0, x27
+	.loc 4 69 0
+	mvn	w28, w28
+.LVL126:
+	.loc 4 68 0
+	bl	printf
+.LVL127:
+	.loc 4 69 0
+	mov	x8, 0
+.LVL128:
+.L66:
+	.loc 4 71 0 discriminator 3
+	eor	w0, w25, w28
+	str	w0, [x8, x20]
+	add	x8, x8, 4
+	.loc 4 72 0 discriminator 3
+	mvn	w28, w28
+.LVL129:
+	.loc 4 70 0 discriminator 3
+	cmp	x8, 32
+	bne	.L66
+	.loc 4 77 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL130:
+	.loc 4 78 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL131:
+	cbz	x0, .L67
+.LVL132:
+.L75:
+	.loc 4 80 0
+	mov	w0, -1
+.L65:
+	.loc 4 115 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL133:
+	ldp	x23, x24, [sp, 48]
+.LVL134:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL135:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL136:
+.L67:
+	.cfi_restore_state
+	.loc 4 67 0 discriminator 2
+	add	w26, w26, 1
+.LVL137:
+	cmp	w26, 2
+	bne	.L69
+	.loc 4 64 0 discriminator 2
+	add	w19, w19, 1
+.LVL138:
+	cmp	w19, 32
+	bne	.L70
+	.loc 4 87 0
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+.LVL139:
+	.loc 4 88 0
+	mov	x0, 128
+	bl	malloc
+.LVL140:
+	mov	x20, x0
+.LVL141:
+	.loc 4 89 0
+	cbnz	x0, .L71
+	.loc 4 90 0
+	adrp	x0, .LC21
+.LVL142:
+	mov	x1, 128
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+.LVL143:
+.L71:
+	adrp	x25, .LANCHOR0
+	.loc 4 93 0
+	add	x26, x21, :lo12:.LC18
+.LVL144:
+	.loc 4 95 0
+	add	x24, x24, :lo12:.LC19
+	.loc 4 100 0
+	add	x25, x25, :lo12:.LANCHOR0
+	.loc 4 69 0
+	mov	w19, 0
+.LVL145:
+.L78:
+	.loc 4 94 0
+	mov	w21, 0
+	.loc 4 98 0
+	mov	w27, 1
+	.loc 4 93 0
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+.LVL146:
+.L77:
+	.loc 4 95 0
+	mov	w1, w21
+	mov	x0, x24
+	bl	printf
+.LVL147:
+	.loc 4 98 0
+	lsl	w1, w27, w21
+	mov	x8, 0
+.LVL148:
+.L74:
+	ldr	w0, [x8, x25]
+	.loc 4 97 0
+	cbz	w19, .L72
+	.loc 4 98 0
+	eor	w0, w0, w1
+.L72:
+	.loc 4 100 0
+	str	w0, [x20, x8]
+	add	x8, x8, 4
+	.loc 4 96 0
+	cmp	x8, 128
+	bne	.L74
+	.loc 4 105 0
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w8
+	mov	x0, x20
+	bl	write_buf_to_ddr
+.LVL149:
+	.loc 4 107 0
+	mov	w1, w8
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	mov	x0, x20
+	bl	cmp_buf_data
+.LVL150:
+	cbnz	x0, .L75
+	.loc 4 110 0
+	cbz	w19, .L76
+	.loc 4 94 0 discriminator 2
+	add	w21, w21, 1
+.LVL151:
+	cmp	w21, 32
+	bne	.L77
+.L76:
+	.loc 4 92 0 discriminator 2
+	add	w19, w19, 1
+.LVL152:
+	cmp	w19, 2
+	bne	.L78
+	.loc 4 114 0
+	mov	w0, 0
+	b	.L65
+	.cfi_endproc
+.LFE200:
+	.size	crosstalk, .-crosstalk
+	.section	.text.diagonalscan,"ax",@progbits
+	.align	2
+	.global	diagonalscan
+	.type	diagonalscan, %function
+diagonalscan:
+.LFB271:
+	.file 5 "cmd/ddr_tool/diagonalscan.c"
+	.loc 5 49 0
+	.cfi_startproc
+.LVL153:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 55 0
+	mov	x2, 32
+	.loc 5 49 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x1
+	.loc 5 55 0
+	adrp	x1, .LANCHOR1
+.LVL154:
+	add	x1, x1, :lo12:.LANCHOR1
+	.loc 5 49 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	.loc 5 55 0
+	add	x0, x29, 80
+.LVL155:
+	.loc 5 49 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 55 0
+	bl	memcpy
+.LVL156:
+	.loc 5 60 0
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	bl	printf
+.LVL157:
+.LBB29:
+.LBB30:
+.LBB31:
+	.loc 5 19 0
+	mov	x0, 520
+	movk	x0, 0xff01, lsl 16
+	ldr	w20, [x0]
+.LVL158:
+#APP
+// 19 "cmd/ddr_tool/diagonalscan.c" 1
+	dmb sy
+// 0 "" 2
+.LVL159:
+#NO_APP
+.LBE31:
+.LBE30:
+.LBE29:
+	.loc 5 75 0
+	mov	x2, 32
+	add	x1, x29, 80
+	mov	x0, x23
+	bl	memcpy
+.LVL160:
+.LBB34:
+.LBB32:
+	.loc 5 40 0
+	ubfx	x0, x20, 9, 2
+	.loc 5 41 0
+	ubfx	x20, x20, 2, 2
+.LVL161:
+	.loc 5 40 0
+	add	w0, w0, 9
+	.loc 5 41 0
+	mov	w1, 2
+	asr	w20, w1, w20
+.LBE32:
+.LBE34:
+	.loc 5 76 0
+	lsr	x24, x19, 1
+.LBB35:
+.LBB33:
+	.loc 5 43 0
+	add	w0, w0, w20
+	sub	x19, x19, #32
+.LVL162:
+	mov	w25, 1
+	add	x19, x19, x23
+.LVL163:
+	lsl	w25, w25, w0
+.LBE33:
+.LBE35:
+	.loc 5 76 0
+	mov	w21, 0
+	mov	x20, 0
+.LVL164:
+.L90:
+	.loc 5 76 0 is_stmt 0 discriminator 1
+	cmp	x20, x24
+	bcc	.L94
+	mov	x0, 0
+	b	.L91
+.L94:
+	.loc 5 77 0 is_stmt 1
+	uxtw	x22, w21
+	mov	x2, 32
+	sub	x26, x19, x22
+	add	x1, x29, 80
+	mov	x0, x26
+	bl	memcpy
+.LVL165:
+	.loc 5 80 0
+	add	x2, x20, x23
+	.loc 5 79 0
+	mov	x3, 32
+	mov	w4, 1
+	add	x2, x2, x22
+	mov	w1, w3
+	add	x0, x29, 80
+	bl	cmp_buf_data
+.LVL166:
+	.loc 5 81 0
+	cbnz	x0, .L91
+	.loc 5 84 0
+	add	x22, x22, 40
+	add	x20, x20, x25
+.LVL167:
+	cmp	x25, x22
+	add	w21, w21, 8
+.LVL168:
+	csel	w21, w21, wzr, cs
+.LVL169:
+	.loc 5 86 0
+	cmp	x24, x20
+	bls	.L93
+	.loc 5 87 0
+	add	x0, x23, x20
+.LVL170:
+	mov	x2, 32
+	add	x1, x29, 80
+	add	x0, x0, x21, uxtw
+	bl	memcpy
+.LVL171:
+.L93:
+	.loc 5 89 0
+	mov	x3, 32
+	mov	w4, 1
+	mov	x2, x26
+	mov	w1, w3
+	add	x0, x29, 80
+	sub	x19, x19, x25
+	bl	cmp_buf_data
+.LVL172:
+	.loc 5 92 0
+	cbz	x0, .L90
+.LVL173:
+.L91:
+	.loc 5 100 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL174:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE271:
+	.size	diagonalscan, .-diagonalscan
+	.section	.text.do_ddr_test,"ax",@progbits
+	.align	2
+	.type	do_ddr_test, %function
+do_ddr_test:
+.LFB258:
+	.loc 1 190 0
+	.cfi_startproc
+.LVL175:
+	stp	x29, x30, [sp, -240]!
+	.cfi_def_cfa_offset 240
+	.cfi_offset 29, -240
+	.cfi_offset 30, -232
+.LBB40:
+.LBB41:
+	.loc 1 50 0
+	mov	x0, 0
+.LVL176:
+.LBE41:
+.LBE40:
+	.loc 1 190 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -208
+	.cfi_offset 22, -200
+	mov	w22, w2
+	stp	x19, x20, [sp, 16]
+.LBB48:
+.LBB42:
+	.loc 1 50 0
+	mov	x2, x18
+.LVL177:
+.LBE42:
+.LBE48:
+	.loc 1 190 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+.LBB49:
+.LBB43:
+	.loc 1 52 0
+	add	x20, x29, 136
+.LBE43:
+.LBE49:
+	.loc 1 190 0
+	mov	x25, x3
+.LBB50:
+.LBB44:
+	.loc 1 53 0
+	add	x21, x29, 168
+.LBE44:
+.LBE50:
+	.loc 1 190 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
+.LBB51:
+.LBB45:
+	.loc 1 47 0
+	mov	w24, 0
+.LBE45:
+.LBE51:
+	.loc 1 190 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -160
+	.cfi_offset 28, -152
+	.loc 1 193 0
+	stp	xzr, xzr, [x29, 200]
+	stp	xzr, xzr, [x29, 216]
+	str	xzr, [x29, 232]
+.LVL178:
+.L99:
+.LBB52:
+.LBB46:
+	.loc 1 50 0
+	ldr	x1, [x2]
+	ubfiz	x3, x0, 4, 32
+	.loc 1 52 0
+	str	xzr, [x20, x0, lsl 3]
+	.loc 1 50 0
+	add	x1, x1, x3
+	.loc 1 53 0
+	str	xzr, [x21, x0, lsl 3]
+	.loc 1 50 0
+	ldr	x1, [x1, 136]
+	cmp	x1, 0
+	csinc	w24, w24, w0, eq
+.LVL179:
+	add	x0, x0, 1
+.LVL180:
+	.loc 1 49 0
+	cmp	x0, 4
+	bne	.L99
+	mov	x0, 0
+.L100:
+.LVL181:
+	.loc 1 56 0
+	cmp	w0, w24
+	bcc	.L101
+	.loc 1 61 0
+	sub	w1, w24, #1
+	ldr	x0, [x2, 128]
+.LVL182:
+	lsl	x1, x1, 3
+	.loc 1 67 0
+	adrp	x26, .LC25
+	.loc 1 61 0
+	sub	x0, x0, #1048576
+	.loc 1 64 0
+	mov	x23, 0
+	.loc 1 67 0
+	add	x26, x26, :lo12:.LC25
+	.loc 1 61 0
+	ldr	x2, [x20, x1]
+	sub	x0, x0, x2
+	.loc 1 62 0
+	and	x0, x0, -4096
+	.loc 1 61 0
+	str	x0, [x21, x1]
+	.loc 1 63 0
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+.LVL183:
+	.loc 1 64 0
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.LVL184:
+.L102:
+	.loc 1 65 0
+	cmp	w24, w23
+	bhi	.L104
+.LVL185:
+.LBE46:
+.LBE52:
+	.loc 1 205 0
+	cmp	w22, 1
+	ble	.L214
+	.loc 1 209 0
+	adrp	x0, .LANCHOR2
+	add	x26, x0, :lo12:.LANCHOR2
+	mov	x24, 0
+	str	x0, [x29, 120]
+.L107:
+	ldr	x1, [x26, x24, lsl 3]
+	mov	w23, w24
+.LVL186:
+	ldr	x0, [x25, 8]
+	bl	strcasecmp
+.LVL187:
+	cbz	w0, .L106
+.LVL188:
+	add	x24, x24, 1
+	.loc 1 208 0 discriminator 2
+	cmp	x24, 7
+	bne	.L107
+	.loc 1 216 0
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	b	.L215
+.LVL189:
+.L101:
+.LBB53:
+.LBB47:
+	.loc 1 57 0
+	ubfiz	x1, x0, 4, 32
+	ldr	x3, [x2]
+	add	x1, x1, 128
+	add	x3, x3, x1
+	ldr	x3, [x3, 8]
+	str	x3, [x20, x0, lsl 3]
+	.loc 1 58 0
+	ldr	x3, [x2]
+	add	x1, x3, x1
+	ldr	x1, [x1, 16]
+	str	x1, [x21, x0, lsl 3]
+.LVL190:
+	add	x0, x0, 1
+.LVL191:
+	b	.L100
+.LVL192:
+.L104:
+	.loc 1 66 0
+	ldr	x1, [x20, x23, lsl 3]
+	cbz	x1, .L103
+	.loc 1 67 0
+	ldr	x3, [x21, x23, lsl 3]
+	mov	x0, x26
+	add	x2, x1, x3
+	bl	printf
+.LVL193:
+.L103:
+	add	x23, x23, 1
+.LVL194:
+	b	.L102
+.LVL195:
+.L150:
+.LBE47:
+.LBE53:
+	.loc 1 221 0
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+.LVL196:
+.L215:
+	.loc 1 216 0
+	bl	printf
+.LVL197:
+.L214:
+	.loc 1 217 0
+	mov	w22, -1
+	b	.L97
+.LVL198:
+.L110:
+	.loc 1 226 0
+	add	x0, x25, x26
+	add	x1, x29, 200
+	add	x2, x1, x26
+	mov	w1, 0
+	add	x26, x26, 8
+	ldr	x0, [x0, 16]
+	bl	strict_strtoul
+.LVL199:
+	tbz	w0, #31, .L109
+	.loc 1 227 0
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	.L215
+.LVL200:
+.L111:
+	.loc 1 247 0
+	cbnz	w23, .L112
+	.loc 1 249 0
+	ldr	x0, [x29, 208]
+.LVL201:
+	cbz	x0, .L113
+	.loc 1 250 0
+	bl	set_vdd_logic
+.LVL202:
+.L113:
+	.loc 1 251 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL203:
+.L114:
+	.loc 1 384 0
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	bl	printf
+.LVL204:
+	b	.L97
+.LVL205:
+.L112:
+	.loc 1 252 0
+	cmp	w23, 1
+	bne	.L115
+	.loc 1 254 0
+	ldr	x0, [x29, 224]
+.LVL206:
+	cbz	x0, .L116
+	.loc 1 255 0
+	bl	set_vdd_logic
+.LVL207:
+.L116:
+	.loc 1 256 0
+	ldr	w0, [x29, 200]
+	ldr	w1, [x29, 208]
+	ldr	x2, [x29, 216]
+	bl	scan_freq
+.LVL208:
+	b	.L114
+.LVL209:
+.L115:
+	.loc 1 257 0
+	sub	w24, w24, #5
+	cmp	w24, 1
+	bls	.L117
+.LVL210:
+.LBB54:
+.LBB55:
+	.loc 1 79 0
+	ldr	x0, [x29, 144]
+.LVL211:
+	.loc 1 82 0
+	ldr	x3, [x29, 224]
+	.loc 1 79 0
+	cmp	x0, 0
+	ldr	x0, [x29, 152]
+	ldr	x1, [x29, 160]
+	cset	w24, ne
+	.loc 1 80 0
+	cmp	x0, 0
+	mov	w0, 3
+	csinc	w0, w0, w24, ne
+.LVL212:
+	cmp	x1, 0
+	mov	w1, 4
+	csel	w0, w0, w1, eq
+.LVL213:
+	.loc 1 82 0
+	cbnz	x3, .L209
+	.loc 1 83 0
+	mov	w24, w0
+.LVL214:
+.L134:
+.LBE55:
+.LBE54:
+	.loc 1 342 0
+	ldr	x0, [x29, 200]
+	bl	set_ddr_freq
+.LVL215:
+	.loc 1 344 0
+	ldr	x0, [x29, 232]
+	cbz	x0, .L140
+	.loc 1 345 0
+	bl	set_vdd_logic
+.LVL216:
+.L140:
+	.loc 1 349 0
+	adrp	x26, .LC34
+	mov	w25, 0
+.LVL217:
+	add	x26, x26, :lo12:.LC34
+	b	.L148
+.LVL218:
+.L117:
+	.loc 1 259 0
+	ldr	x0, [x29, 224]
+.LVL219:
+	cbz	x0, .L123
+	.loc 1 260 0
+	bl	set_vdd_logic
+.LVL220:
+.L123:
+	.loc 1 261 0
+	cmp	w23, 5
+	bne	.L155
+	.loc 1 262 0
+	ldr	x1, [x29, 168]
+	mov	x0, 65535
+	movk	x0, 0x9f, lsl 16
+	cmp	x1, x0
+	bhi	.L125
+	.loc 1 263 0
+	lsr	x2, x1, 20
+	adrp	x0, .LC30
+	mov	w1, 10
+	add	x0, x0, :lo12:.LC30
+	bl	printf
+.LVL221:
+.L211:
+	.loc 1 272 0
+	mov	w27, 60
+.LVL222:
+.L124:
+	.loc 1 280 0
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	.loc 1 284 0
+	adrp	x28, .LC32
+	.loc 1 280 0
+	str	x0, [x29, 112]
+	.loc 1 277 0
+	mov	w26, 0
+	.loc 1 284 0
+	add	x0, x28, :lo12:.LC32
+	str	x0, [x29, 104]
+.LVL223:
+.L126:
+	.loc 1 278 0
+	ldr	x0, [x29, 216]
+	cbz	x0, .L132
+	.loc 1 278 0 is_stmt 0 discriminator 1
+	cmp	x0, x26, uxtw
+	bls	.L114
+.L132:
+	.loc 1 280 0 is_stmt 1
+	ldr	x0, [x29, 112]
+	.loc 1 279 0
+	add	w26, w26, 1
+.LVL224:
+	.loc 1 280 0
+	mov	w1, w26
+	mov	x25, 0
+	bl	printf
+.LVL225:
+.L130:
+	.loc 1 282 0
+	ldr	x23, [x20, x25, lsl 3]
+	cbz	x23, .L127
+	.loc 1 284 0
+	ldr	x0, [x29, 104]
+	mov	x2, x23
+	ldr	x24, [x21, x25, lsl 3]
+	mov	w1, w25
+	mov	x3, x24
+	bl	printf
+.LVL226:
+	.loc 1 286 0
+	ldr	x0, [x29, 208]
+	bl	set_ddr_freq
+.LVL227:
+	.loc 1 287 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL228:
+	mov	w28, w0
+.LVL229:
+	.loc 1 289 0
+	cbnz	w0, .L156
+	.loc 1 290 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL230:
+	bl	crosstalk
+.LVL231:
+	mov	w28, w0
+.LVL232:
+	.loc 1 294 0
+	cbnz	w0, .L157
+	.loc 1 295 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL233:
+	bl	diagonalscan
+.LVL234:
+	mov	w28, w0
+.LVL235:
+	.loc 1 299 0
+	cbnz	w0, .L158
+	.loc 1 300 0
+	ldr	w0, [x29, 200]
+.LVL236:
+	and	x2, x27, 1020
+	ldr	w1, [x29, 208]
+	.loc 1 303 0
+	mov	w19, 1
+	.loc 1 300 0
+	bl	scan_freq
+.LVL237:
+	mov	w28, w0
+.LVL238:
+.L128:
+	.loc 1 305 0
+	ldr	x0, [x29, 200]
+.LVL239:
+	bl	set_ddr_freq
+.LVL240:
+	.loc 1 306 0
+	cbnz	w28, .L159
+	.loc 1 307 0
+	mov	x1, x24
+	mov	x0, x23
+	bl	random_test
+.LVL241:
+	mov	w2, w0
+.LVL242:
+	.loc 1 311 0
+	cbnz	w0, .L160
+	str	w2, [x29, 100]
+	.loc 1 312 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL243:
+	bl	crosstalk
+.LVL244:
+	.loc 1 316 0
+	ldr	w2, [x29, 100]
+	.loc 1 312 0
+	mov	w19, w0
+.LVL245:
+	.loc 1 316 0
+	cbnz	w0, .L161
+	.loc 1 317 0
+	mov	x1, x24
+	mov	x0, x23
+.LVL246:
+	bl	diagonalscan
+.LVL247:
+	mov	w28, w0
+.LVL248:
+	.loc 1 322 0
+	cbnz	w0, .L162
+	.loc 1 324 0
+	bl	ctrlc
+.LVL249:
+	cbnz	w0, .L163
+	.loc 1 319 0
+	mov	w19, 4
+.LVL250:
+.L127:
+	add	x25, x25, 1
+.LVL251:
+	.loc 1 281 0 discriminator 2
+	cmp	x25, 4
+	bne	.L130
+	mov	w2, 0
+	mov	w28, 0
+.LVL252:
+.L129:
+	.loc 1 329 0
+	orr	w2, w28, w2
+.LVL253:
+	cbz	w2, .L126
+.LVL254:
+.L131:
+	.loc 1 381 0
+	cbz	w28, .L114
+	.loc 1 382 0
+	ldr	x0, [x29, 120]
+	add	x0, x0, :lo12:.LANCHOR2
+	ldr	x1, [x0, w19, sxtw 3]
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
+	bl	printf
+.LVL255:
+	b	.L97
+.LVL256:
+.L125:
+	.loc 1 266 0
+	mov	x0, 10485760
+	.loc 1 268 0
+	stp	xzr, xzr, [x29, 144]
+	.loc 1 266 0
+	stp	xzr, x0, [x29, 160]
+.LVL257:
+	.loc 1 269 0
+	stp	xzr, xzr, [x29, 176]
+.LVL258:
+	str	xzr, [x29, 192]
+	b	.L211
+.LVL259:
+.L155:
+	.loc 1 274 0
+	mov	w27, 1000
+	b	.L124
+.LVL260:
+.L156:
+	.loc 1 288 0
+	mov	w19, 2
+	b	.L128
+.LVL261:
+.L157:
+	.loc 1 292 0
+	mov	w19, 3
+	b	.L128
+.LVL262:
+.L158:
+	.loc 1 297 0
+	mov	w19, 4
+	b	.L128
+.LVL263:
+.L159:
+	mov	w2, 0
+	b	.L129
+.LVL264:
+.L160:
+	.loc 1 307 0
+	mov	w28, w0
+	mov	w2, 0
+	.loc 1 309 0
+	mov	w19, 2
+	b	.L129
+.LVL265:
+.L161:
+	.loc 1 312 0
+	mov	w28, w0
+	.loc 1 314 0
+	mov	w19, 3
+	b	.L129
+.LVL266:
+.L162:
+	mov	w2, w19
+.LVL267:
+.L212:
+	.loc 1 319 0
+	mov	w19, 4
+	b	.L129
+.L163:
+	.loc 1 325 0
+	mov	w2, -1
+	b	.L212
+.LVL268:
+.L209:
+.LBB58:
+.LBB56:
+	.loc 1 86 0
+	ldr	x4, [x29, 216]
+	.loc 1 87 0
+	mov	x1, 0
+	mov	w24, 0
+	.loc 1 88 0
+	mov	w6, 1
+	.loc 1 87 0
+	add	x5, x3, x4
+.LVL269:
+.L136:
+	.loc 1 86 0
+	ldr	x2, [x20, x1, lsl 3]
+	cmp	x4, x2
+	bcc	.L135
+	.loc 1 87 0
+	ldr	x7, [x21, x1, lsl 3]
+	add	x2, x2, x7
+	.loc 1 88 0
+	cmp	x5, x2
+	csel	w24, w24, w6, hi
+.LVL270:
+.L135:
+	add	x1, x1, 1
+.LVL271:
+	.loc 1 85 0
+	cmp	w0, w1
+	bhi	.L136
+	.loc 1 89 0
+	cbnz	w24, .L137
+	.loc 1 90 0
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.LVL272:
+.L138:
+.LBE56:
+.LBE58:
+	.loc 1 339 0
+	cbnz	w24, .L134
+	.loc 1 340 0
+	mov	w22, 1
+.LVL273:
+	b	.L97
+.LVL274:
+.L137:
+.LBB59:
+.LBB57:
+	.loc 1 92 0
+	str	x4, [x29, 136]
+	.loc 1 94 0
+	cmp	w0, 1
+	.loc 1 93 0
+	str	x3, [x29, 168]
+.LVL275:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 144]
+	.loc 1 94 0
+	cmp	w0, 2
+	.loc 1 96 0
+	str	xzr, [x29, 176]
+.LVL276:
+	.loc 1 94 0
+	beq	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 152]
+	.loc 1 94 0
+	cmp	w0, 4
+	.loc 1 96 0
+	str	xzr, [x29, 184]
+.LVL277:
+	.loc 1 94 0
+	bne	.L138
+	.loc 1 95 0
+	str	xzr, [x29, 160]
+	.loc 1 96 0
+	str	xzr, [x29, 192]
+.LVL278:
+	b	.L138
+.LVL279:
+.L149:
+.LBE57:
+.LBE59:
+	.loc 1 350 0
+	mov	x27, 0
+	.loc 1 348 0
+	add	w25, w25, 1
+.LVL280:
+	.loc 1 349 0
+	mov	w1, w25
+	mov	x0, x26
+	bl	printf
+.LVL281:
+.L141:
+	.loc 1 350 0 discriminator 1
+	cmp	w24, w27
+	bhi	.L147
+	mov	w0, 0
+	mov	w28, 0
+.LVL282:
+.L146:
+	.loc 1 376 0
+	orr	w0, w28, w0
+.LVL283:
+	cbnz	w0, .L131
+.LVL284:
+.L148:
+	.loc 1 347 0
+	ldr	x0, [x29, 208]
+	cbz	x0, .L149
+	.loc 1 347 0 is_stmt 0 discriminator 1
+	cmp	x0, x25, uxtw
+	bhi	.L149
+	b	.L114
+.LVL285:
+.L147:
+	.loc 1 357 0 is_stmt 1
+	ldr	x1, [x21, x27, lsl 3]
+	.loc 1 351 0
+	cmp	w23, 3
+	.loc 1 357 0
+	ldr	x0, [x20, x27, lsl 3]
+	.loc 1 351 0
+	beq	.L143
+	cmp	w23, 4
+	beq	.L144
+	.loc 1 353 0
+	bl	random_test
+.LVL286:
+.L213:
+	.loc 1 361 0
+	mov	w28, w0
+.LVL287:
+	.loc 1 369 0
+	bl	ctrlc
+.LVL288:
+	cbnz	w0, .L166
+	add	x27, x27, 1
+.LVL289:
+	mov	w19, w23
+	.loc 1 373 0
+	cbz	w28, .L141
+.LVL290:
+	mov	w19, w23
+.LVL291:
+	b	.L146
+.LVL292:
+.L143:
+	.loc 1 357 0
+	bl	crosstalk
+.LVL293:
+	b	.L213
+.L144:
+	.loc 1 361 0
+	bl	diagonalscan
+.LVL294:
+	b	.L213
+.LVL295:
+.L166:
+	mov	w19, w23
+	.loc 1 370 0
+	mov	w0, -1
+	b	.L146
+.LVL296:
+.L106:
+	.loc 1 220 0
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	ldrb	w0, [x0, w24, sxtw]
+	cmp	w22, w0
+	blt	.L150
+	sub	w22, w22, #2
+.LVL297:
+	.loc 1 220 0 is_stmt 0 discriminator 1
+	mov	x26, 0
+	lsl	x22, x22, 3
+.LVL298:
+.L109:
+	.loc 1 225 0 is_stmt 1 discriminator 1
+	cmp	x26, x22
+	bne	.L110
+	.loc 1 232 0
+	ldp	x2, x3, [x29, 200]
+	mov	w1, w23
+	ldp	x4, x5, [x29, 216]
+	adrp	x0, .LC28
+	ldr	x6, [x29, 232]
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.LVL299:
+	.loc 1 238 0
+	add	x2, x29, 128
+	mov	w1, 0
+	mov	w0, 53
+	bl	uclass_get_device
+.LVL300:
+	mov	w22, w0
+.LVL301:
+	.loc 1 239 0
+	cbz	w0, .L111
+	.loc 1 240 0
+	mov	w1, w0
+	adrp	x0, .LC29
+.LVL302:
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.LVL303:
+.L97:
+	.loc 1 387 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE258:
+	.size	do_ddr_test, .-do_ddr_test
+	.section	.text.print_memory,"ax",@progbits
+	.align	2
+	.global	print_memory
+	.type	print_memory, %function
+print_memory:
+.LFB278:
+	.loc 3 81 0
+	.cfi_startproc
+.LVL304:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x20, x0
+.LVL305:
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -16
+	.cfi_offset 22, -8
+	.loc 3 86 0
+	adrp	x21, .LC38
+	.loc 3 85 0
+	lsr	x22, x1, 2
+	.loc 3 86 0
+	add	x21, x21, :lo12:.LC38
+	.loc 3 85 0
+	mov	w19, 0
+.LVL306:
+.L217:
+	.loc 3 85 0 is_stmt 0 discriminator 1
+	uxtw	x1, w19
+	cmp	x1, x22
+	bcc	.L218
+	.loc 3 89 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL307:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL308:
+.L218:
+	.cfi_restore_state
+	.loc 3 87 0 discriminator 3
+	add	w3, w19, 3
+	add	w2, w19, 2
+	add	w0, w19, 1
+	lsl	x1, x1, 2
+	.loc 3 85 0 discriminator 3
+	add	w19, w19, 4
+.LVL309:
+	.loc 3 86 0 discriminator 3
+	ldr	w5, [x20, x3, lsl 2]
+	ldr	w4, [x20, x2, lsl 2]
+	ldr	w3, [x20, x0, lsl 2]
+	mov	x0, x21
+	ldr	w2, [x20, x1]
+	add	x1, x20, x1
+	bl	printf
+.LVL310:
+	b	.L217
+	.cfi_endproc
+.LFE278:
+	.size	print_memory, .-print_memory
+	.global	_u_boot_list_2_cmd_2_ddr_test
+	.section	.rodata
+	.align	3
+	.set	.LANCHOR1,. + 0
+.LC0:
+	.word	1437226410
+	.word	-1437226411
+	.word	1515890085
+	.word	-1515890086
+	.word	-267448336
+	.word	267448335
+	.word	0
+	.word	-1
+	.section	.rodata.cmp_buf_data.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"test fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.crosstalk.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"\nbitflip:   \n"
+.LC18:
+	.string	"\b\b\b%3u"
+.LC19:
+	.string	"%3u\b\b\b"
+.LC20:
+	.string	"\nISI:\n"
+.LC21:
+	.string	"malloc %lu byte fail\n"
+	.section	.rodata.diagonalscan.str1.1,"aMS",@progbits,1
+.LC22:
+	.string	"\nDiagonalScan\n"
+	.section	.rodata.do_ddr_test.str1.1,"aMS",@progbits,1
+.LC23:
+	.string	"available memory for test:\n"
+.LC24:
+	.string	"\tstart\t\t end\tlength\n"
+.LC25:
+	.string	"\t0x%08lx - 0x%08lx 0x%08lx\n"
+.LC26:
+	.string	"test parameters error\n"
+.LC27:
+	.string	"test pattern error\n"
+.LC28:
+	.string	"test pattern:%d, arg:0x%lx,0x%lx,0x%lx,0x%lx,0x%lx\n"
+.LC29:
+	.string	"rockchip dmc probe fail: %d\n"
+.LC30:
+	.string	"fasttest need %uMB, but actually only %luMB\n"
+.LC31:
+	.string	"\rtimes:%08u:\n"
+.LC32:
+	.string	"loop:%d, start:0x%lx, len:0x%lx\n"
+.LC33:
+	.string	"Invalid test address\n"
+.LC34:
+	.string	"\rtimes:%08u, "
+.LC35:
+	.string	"\n%s test fail\n"
+.LC36:
+	.string	"\ntest pass\n"
+.LC37:
+	.string	"test pattern unsupported\n"
+	.section	.rodata.g_isi_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_isi_pattern, %object
+	.size	g_isi_pattern, 128
+g_isi_pattern:
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	-1
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.word	0
+	.section	.rodata.print_memory.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"0x%08lx: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n"
+	.section	.rodata.random_test.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"%u"
+.LC6:
+	.string	"\b"
+.LC7:
+	.string	" "
+.LC8:
+	.string	"\nrandom test1 fail:address:0x%lx,read:0x%x,reread:0x%x,expect:0x%x\n"
+.LC9:
+	.string	"%4lu"
+.LC10:
+	.string	"\b\b\b\b"
+.LC11:
+	.string	"    "
+.LC12:
+	.string	"\nrandom test2 fail:address:0x%lx,read:0x%lx,reread:0x%lx,expect:0x%lx\n"
+	.section	.rodata.scan_freq.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"% d:change freq to %d Hz\n"
+.LC14:
+	.string	"\tchange freq success: %d Hz\n"
+.LC15:
+	.string	"check data fail at %d Hz\n"
+	.section	.rodata.set_ddr_freq.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"current freq:%lu Hz\n"
+	.section	.rodata.set_vdd_logic.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"vdd_logic"
+.LC3:
+	.string	"Cannot set regulator name\n"
+.LC4:
+	.string	"set vdd_logic fail\n"
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"ddr_test"
+.LC40:
+	.string	"for dram simple test\n"
+.LC41:
+	.ascii	"arg1: test pattern include:\n\tchangefreq\n\tscanfreq\n\tran"
+	.ascii	"dom\n\tcrosstalk\n\tdiagonalscan\n\tfast_test\n\tfull_test\n"
+	.ascii	"for changereq: arg2:freq(Hz),arg3[option]:volt\nfor scanfreq"
+	.ascii	": arg2:minfreq(Hz),arg3:maxfreq(Hz),\n\targ4:scanfreq times,"
+	.ascii	" arg5[option]:volt\nfor random, crosstalk and diagonalscan:a"
+	.ascii	"rg2:freq(Hz), arg3:test times,\n\targ4: start addr, arg5:len"
+	.ascii	"gth, arg6[option]:volt\nfor fast_test and full_test:arg2: mi"
+	.ascii	"n_freq(Hz), arg3: max_freq(Hz)\n\targ4: test times, arg5[opt"
+	.ascii	"ion]:volt\n\nfreq: means dram's target frequency,unit:Hz, if"
+	.ascii	" 0:keep current freq\nminfreq, maxfreq: means min and max fr"
+	.ascii	"equency for dram test,unit:Hz\ntest times: test loop, if 0: "
+	.ascii	"endless loop\nstart_adr: start address of memory space for t"
+	.ascii	"esting,unit:physical address\nlength: length of memory space"
+	.ascii	" for testing,unit:Byte, if 0: full memory space test\nvolt: "
+	.ascii	"means target voltage of vdd_logic\n\nexample:\nddr freq chan"
+	.ascii	"ge to:786MHz, vdd_logic:1.05v:\n\t 'ddr_test changefreq 7860"
+	.ascii	"00000 1050000'\nddr freq change to:786MHz, with default vdd_"
+	.ascii	"logic:\n\t 'ddr_test changefreq 786000000'\nscanning ddr fre"
+	.ascii	"quency between 200 and 786MHz for 10 times:\n\t 'ddr_test sc"
+	.ascii	"anfreq 200000000 786000000 100'\ndoing random test 10 times "
+	.ascii	"start from"
+	.string	" physical address 0x200000 and\nlength is 128MB, freq:786MHz, if freq=0 may keep current freq:\n\t 'ddr_test random 786000000 10 0x200000 0x8000000'\ndoing fast test for dram between 200MHz to 786MHz with 10 times:\n\t 'ddr_test fast_test 200000000 786000000 10'"
+.LC42:
+	.string	"changefreq"
+.LC43:
+	.string	"scanfreq"
+.LC44:
+	.string	"random"
+.LC45:
+	.string	"crosstalk"
+.LC46:
+	.string	"diagonalscan"
+.LC47:
+	.string	"fast_test"
+.LC48:
+	.string	"full_test"
+	.section	.rodata.test_pat_param,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	test_pat_param, %object
+	.size	test_pat_param, 7
+test_pat_param:
+	.byte	3
+	.byte	5
+	.byte	6
+	.byte	6
+	.byte	6
+	.byte	5
+	.byte	5
+	.section	.rodata.test_pattern,"a",@progbits
+	.align	3
+	.set	.LANCHOR2,. + 0
+	.type	test_pattern, %object
+	.size	test_pattern, 56
+test_pattern:
+	.xword	.LC42
+	.xword	.LC43
+	.xword	.LC44
+	.xword	.LC45
+	.xword	.LC46
+	.xword	.LC47
+	.xword	.LC48
+	.section	.u_boot_list_2_cmd_2_ddr_test,"aw",@progbits
+	.align	2
+	.type	_u_boot_list_2_cmd_2_ddr_test, %object
+	.size	_u_boot_list_2_cmd_2_ddr_test, 48
+_u_boot_list_2_cmd_2_ddr_test:
+	.8byte	.LC39
+	.word	7
+	.word	1
+	.8byte	do_ddr_test
+	.8byte	.LC40
+	.8byte	.LC41
+	.8byte	0
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/dm/device.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/linux/list.h"
+	.file 15 "include/part.h"
+	.file 16 "include/flash.h"
+	.file 17 "include/lmb.h"
+	.file 18 "include/asm-generic/u-boot.h"
+	.file 19 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 20 "include/command.h"
+	.file 21 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 22 "include/libfdt_env.h"
+	.file 23 "include/image.h"
+	.file 24 "include/dm/uclass-id.h"
+	.file 25 "./arch/arm/include/asm/global_data.h"
+	.file 26 "include/asm-generic/global_data.h"
+	.file 27 "include/dm/of.h"
+	.file 28 "include/net.h"
+	.file 29 "include/malloc.h"
+	.file 30 "include/dm/ofnode.h"
+	.file 31 "include/linux/compat.h"
+	.file 32 "include/dm/uclass.h"
+	.file 33 "include/console.h"
+	.file 34 "include/stdio_dev.h"
+	.file 35 "include/iomux.h"
+	.file 36 "include/log.h"
+	.file 37 "include/stdio.h"
+	.file 38 "include/vsprintf.h"
+	.file 39 "include/power/regulator.h"
+	.file 40 "include/linux/delay.h"
+	.file 41 "./arch/arm/include/asm/arch/rockchip_dmc.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0x2c16
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF486
+	.byte	0xc
+	.4byte	.LASF487
+	.4byte	.LASF488
+	.4byte	.Ldebug_ranges0+0x190
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x4
+	.4byte	0x3b
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x5
+	.4byte	.LASF21
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x59
+	.uleb128 0x6
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x2
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x34
+	.uleb128 0x3
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x2
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x84
+	.uleb128 0x3
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x7
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x34
+	.uleb128 0x8
+	.4byte	0x99
+	.uleb128 0x7
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x84
+	.uleb128 0x4
+	.4byte	0xa8
+	.uleb128 0x2
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x92
+	.uleb128 0x2
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x92
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x8
+	.4byte	0xd5
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x8
+	.4byte	0xe0
+	.uleb128 0x3
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0xe0
+	.uleb128 0x8
+	.4byte	0xf3
+	.uleb128 0x2
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x47
+	.uleb128 0x2
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3b
+	.uleb128 0x2
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x67
+	.uleb128 0x2
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x6b
+	.4byte	0x79
+	.uleb128 0x2
+	.4byte	.LASF20
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x79
+	.uleb128 0xa
+	.byte	0x8
+	.uleb128 0x5
+	.4byte	.LASF22
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf3
+	.uleb128 0x3
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF23
+	.uleb128 0xb
+	.4byte	0xe0
+	.4byte	0x154
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0xd
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xd
+	.4byte	.LASF26
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x149
+	.uleb128 0xe
+	.4byte	.LASF45
+	.byte	0xa0
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x25d
+	.uleb128 0xf
+	.4byte	.LASF27
+	.byte	0xc
+	.byte	0x81
+	.4byte	0x1505
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xc
+	.byte	0x82
+	.4byte	0xd5
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0xc
+	.byte	0x83
+	.4byte	0x135
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF30
+	.byte	0xc
+	.byte	0x84
+	.4byte	0x135
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF31
+	.byte	0xc
+	.byte	0x85
+	.4byte	0x135
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF32
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x14d0
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF33
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x109
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF34
+	.byte	0xc
+	.byte	0x88
+	.4byte	0x25d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x135
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF36
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x1548
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF37
+	.byte	0xc
+	.byte	0x8b
+	.4byte	0x135
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0xc
+	.byte	0x8c
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF39
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x290
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x290
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF41
+	.byte	0xc
+	.byte	0x8f
+	.4byte	0x290
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0xc
+	.byte	0x90
+	.4byte	0x11f
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF43
+	.byte	0xc
+	.byte	0x91
+	.4byte	0x59
+	.byte	0x94
+	.uleb128 0x10
+	.string	"seq"
+	.byte	0xc
+	.byte	0x92
+	.4byte	0x59
+	.byte	0x98
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x178
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x269
+	.uleb128 0x11
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x275
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF44
+	.byte	0xd
+	.byte	0x10
+	.4byte	0x26a
+	.uleb128 0xb
+	.4byte	0x34
+	.4byte	0x290
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x2b5
+	.uleb128 0xf
+	.4byte	.LASF47
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x2b5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF48
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x2b5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x290
+	.uleb128 0xe
+	.4byte	.LASF49
+	.byte	0x10
+	.byte	0xf
+	.byte	0xf
+	.4byte	0x2e0
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0xf
+	.byte	0x10
+	.4byte	0xf3
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF50
+	.byte	0xf
+	.byte	0x11
+	.4byte	0x2f9
+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2bb
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x2f9
+	.uleb128 0x14
+	.4byte	0x59
+	.uleb128 0x14
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x2e5
+	.uleb128 0xb
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+	.uleb128 0xc
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+	.uleb128 0x5
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+	.uleb128 0x16
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+	.uleb128 0x3
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+	.uleb128 0x10
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+	.uleb128 0x12
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+	.byte	0
+	.uleb128 0x18
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+	.uleb128 0xf
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+	.byte	0xa0
+	.byte	0
+	.uleb128 0x19
+	.string	"lmb"
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+	.uleb128 0x1a
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+	.uleb128 0xf
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+	.byte	0x12
+	.byte	0x5b
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+	.uleb128 0xf
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+	.4byte	0xc3
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+	.uleb128 0xe
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+	.byte	0xc8
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+	.byte	0x1b
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0x1d
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+	.uleb128 0xf
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+	.byte	0x1e
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+	.uleb128 0xf
+	.4byte	.LASF69
+	.byte	0x12
+	.byte	0x1f
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+	.uleb128 0xf
+	.4byte	.LASF70
+	.byte	0x12
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+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF71
+	.byte	0x12
+	.byte	0x21
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+	.uleb128 0xf
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+	.byte	0x30
+	.uleb128 0xf
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+	.uleb128 0xf
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+	.4byte	0x3b
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0x1d
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+	.sleb128 -1
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+	.uleb128 0x21
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+	.uleb128 0x1f
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+	.uleb128 0x1f
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+	.4byte	0x135
+	.byte	0x88
+	.uleb128 0x1f
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+	.byte	0x17
+	.2byte	0x165
+	.4byte	0xd5
+	.byte	0x90
+	.uleb128 0x1f
+	.4byte	.LASF151
+	.byte	0x17
+	.2byte	0x166
+	.4byte	0x59
+	.byte	0x98
+	.uleb128 0x1f
+	.4byte	.LASF152
+	.byte	0x17
+	.2byte	0x168
+	.4byte	0x135
+	.byte	0xa0
+	.uleb128 0x1f
+	.4byte	.LASF153
+	.byte	0x17
+	.2byte	0x169
+	.4byte	0xd5
+	.byte	0xa8
+	.uleb128 0x1f
+	.4byte	.LASF154
+	.byte	0x17
+	.2byte	0x16a
+	.4byte	0x59
+	.byte	0xb0
+	.uleb128 0x21
+	.string	"os"
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+	.2byte	0x16e
+	.4byte	0x893
+	.byte	0xb8
+	.uleb128 0x21
+	.string	"ep"
+	.byte	0x17
+	.2byte	0x16f
+	.4byte	0x109
+	.byte	0xe8
+	.uleb128 0x1f
+	.4byte	.LASF155
+	.byte	0x17
+	.2byte	0x171
+	.4byte	0x109
+	.byte	0xf0
+	.uleb128 0x1f
+	.4byte	.LASF156
+	.byte	0x17
+	.2byte	0x171
+	.4byte	0x109
+	.byte	0xf8
+	.uleb128 0x23
+	.4byte	.LASF157
+	.byte	0x17
+	.2byte	0x173
+	.4byte	0xf3
+	.2byte	0x100
+	.uleb128 0x23
+	.4byte	.LASF158
+	.byte	0x17
+	.2byte	0x174
+	.4byte	0x109
+	.2byte	0x108
+	.uleb128 0x23
+	.4byte	.LASF159
+	.byte	0x17
+	.2byte	0x176
+	.4byte	0x109
+	.2byte	0x110
+	.uleb128 0x23
+	.4byte	.LASF160
+	.byte	0x17
+	.2byte	0x177
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+	.2byte	0x118
+	.uleb128 0x23
+	.4byte	.LASF161
+	.byte	0x17
+	.2byte	0x178
+	.4byte	0x109
+	.2byte	0x120
+	.uleb128 0x23
+	.4byte	.LASF162
+	.byte	0x17
+	.2byte	0x179
+	.4byte	0x109
+	.2byte	0x128
+	.uleb128 0x24
+	.string	"kbd"
+	.byte	0x17
+	.2byte	0x17a
+	.4byte	0xa42
+	.2byte	0x130
+	.uleb128 0x23
+	.4byte	.LASF163
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+	.2byte	0x17d
+	.4byte	0x59
+	.2byte	0x138
+	.uleb128 0x23
+	.4byte	.LASF164
+	.byte	0x17
+	.2byte	0x18a
+	.4byte	0x59
+	.2byte	0x13c
+	.uleb128 0x24
+	.string	"lmb"
+	.byte	0x17
+	.2byte	0x18d
+	.4byte	0x411
+	.2byte	0x140
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x805
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x564
+	.uleb128 0x20
+	.4byte	.LASF165
+	.byte	0x17
+	.2byte	0x18f
+	.4byte	0x89f
+	.uleb128 0xd
+	.4byte	.LASF166
+	.byte	0x17
+	.2byte	0x191
+	.4byte	0xa48
+	.uleb128 0x1b
+	.4byte	.LASF168
+	.byte	0x4
+	.4byte	0x59
+	.byte	0x18
+	.byte	0xe
+	.4byte	0xc75
+	.uleb128 0x1c
+	.4byte	.LASF169
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF170
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF171
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF172
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF173
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF174
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF175
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF176
+	.byte	0x7
+	.uleb128 0x1c
+	.4byte	.LASF177
+	.byte	0x8
+	.uleb128 0x1c
+	.4byte	.LASF178
+	.byte	0x9
+	.uleb128 0x1c
+	.4byte	.LASF179
+	.byte	0xa
+	.uleb128 0x1c
+	.4byte	.LASF180
+	.byte	0xb
+	.uleb128 0x1c
+	.4byte	.LASF181
+	.byte	0xc
+	.uleb128 0x1c
+	.4byte	.LASF182
+	.byte	0xd
+	.uleb128 0x1c
+	.4byte	.LASF183
+	.byte	0xe
+	.uleb128 0x1c
+	.4byte	.LASF184
+	.byte	0xf
+	.uleb128 0x1c
+	.4byte	.LASF185
+	.byte	0x10
+	.uleb128 0x1c
+	.4byte	.LASF186
+	.byte	0x11
+	.uleb128 0x1c
+	.4byte	.LASF187
+	.byte	0x12
+	.uleb128 0x1c
+	.4byte	.LASF188
+	.byte	0x13
+	.uleb128 0x1c
+	.4byte	.LASF189
+	.byte	0x14
+	.uleb128 0x1c
+	.4byte	.LASF190
+	.byte	0x15
+	.uleb128 0x1c
+	.4byte	.LASF191
+	.byte	0x16
+	.uleb128 0x1c
+	.4byte	.LASF192
+	.byte	0x17
+	.uleb128 0x1c
+	.4byte	.LASF193
+	.byte	0x18
+	.uleb128 0x1c
+	.4byte	.LASF194
+	.byte	0x19
+	.uleb128 0x1c
+	.4byte	.LASF195
+	.byte	0x1a
+	.uleb128 0x1c
+	.4byte	.LASF196
+	.byte	0x1b
+	.uleb128 0x1c
+	.4byte	.LASF197
+	.byte	0x1c
+	.uleb128 0x1c
+	.4byte	.LASF198
+	.byte	0x1d
+	.uleb128 0x1c
+	.4byte	.LASF199
+	.byte	0x1e
+	.uleb128 0x1c
+	.4byte	.LASF200
+	.byte	0x1f
+	.uleb128 0x1c
+	.4byte	.LASF201
+	.byte	0x20
+	.uleb128 0x1c
+	.4byte	.LASF202
+	.byte	0x21
+	.uleb128 0x1c
+	.4byte	.LASF203
+	.byte	0x22
+	.uleb128 0x1c
+	.4byte	.LASF204
+	.byte	0x23
+	.uleb128 0x1c
+	.4byte	.LASF205
+	.byte	0x24
+	.uleb128 0x1c
+	.4byte	.LASF206
+	.byte	0x25
+	.uleb128 0x1c
+	.4byte	.LASF207
+	.byte	0x26
+	.uleb128 0x1c
+	.4byte	.LASF208
+	.byte	0x27
+	.uleb128 0x1c
+	.4byte	.LASF209
+	.byte	0x28
+	.uleb128 0x1c
+	.4byte	.LASF210
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+	.uleb128 0x1c
+	.4byte	.LASF211
+	.byte	0x2a
+	.uleb128 0x1c
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+	.byte	0x2b
+	.uleb128 0x1c
+	.4byte	.LASF213
+	.byte	0x2c
+	.uleb128 0x1c
+	.4byte	.LASF214
+	.byte	0x2d
+	.uleb128 0x1c
+	.4byte	.LASF215
+	.byte	0x2e
+	.uleb128 0x1c
+	.4byte	.LASF216
+	.byte	0x2f
+	.uleb128 0x1c
+	.4byte	.LASF217
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+	.uleb128 0x1c
+	.4byte	.LASF218
+	.byte	0x31
+	.uleb128 0x1c
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+	.byte	0x32
+	.uleb128 0x1c
+	.4byte	.LASF220
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+	.uleb128 0x1c
+	.4byte	.LASF221
+	.byte	0x34
+	.uleb128 0x1c
+	.4byte	.LASF222
+	.byte	0x35
+	.uleb128 0x1c
+	.4byte	.LASF223
+	.byte	0x36
+	.uleb128 0x1c
+	.4byte	.LASF224
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+	.uleb128 0x1c
+	.4byte	.LASF225
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+	.uleb128 0x1c
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+	.byte	0x39
+	.uleb128 0x1c
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+	.uleb128 0x1c
+	.4byte	.LASF228
+	.byte	0x3b
+	.uleb128 0x1c
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+	.byte	0x3c
+	.uleb128 0x1c
+	.4byte	.LASF230
+	.byte	0x3d
+	.uleb128 0x1c
+	.4byte	.LASF231
+	.byte	0x3e
+	.uleb128 0x1c
+	.4byte	.LASF232
+	.byte	0x3f
+	.uleb128 0x1c
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+	.uleb128 0x1c
+	.4byte	.LASF234
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+	.uleb128 0x1c
+	.4byte	.LASF235
+	.byte	0x42
+	.uleb128 0x1c
+	.4byte	.LASF236
+	.byte	0x43
+	.uleb128 0x1c
+	.4byte	.LASF237
+	.byte	0x44
+	.uleb128 0x1c
+	.4byte	.LASF238
+	.byte	0x45
+	.uleb128 0x1c
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+	.byte	0x46
+	.uleb128 0x1c
+	.4byte	.LASF240
+	.byte	0x47
+	.uleb128 0x1c
+	.4byte	.LASF241
+	.byte	0x48
+	.uleb128 0x1c
+	.4byte	.LASF242
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+	.uleb128 0x1c
+	.4byte	.LASF243
+	.byte	0x4a
+	.uleb128 0x1c
+	.4byte	.LASF244
+	.byte	0x4b
+	.uleb128 0x1c
+	.4byte	.LASF245
+	.byte	0x4c
+	.uleb128 0x1c
+	.4byte	.LASF246
+	.byte	0x4d
+	.uleb128 0x1c
+	.4byte	.LASF247
+	.byte	0x4e
+	.uleb128 0x1c
+	.4byte	.LASF248
+	.byte	0x4f
+	.uleb128 0x1c
+	.4byte	.LASF249
+	.byte	0x50
+	.uleb128 0x1c
+	.4byte	.LASF250
+	.byte	0x51
+	.uleb128 0x1c
+	.4byte	.LASF251
+	.byte	0x52
+	.uleb128 0x1c
+	.4byte	.LASF252
+	.byte	0x53
+	.uleb128 0x1c
+	.4byte	.LASF253
+	.byte	0x54
+	.uleb128 0x1d
+	.4byte	.LASF254
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x25
+	.byte	0x4
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+	.byte	0x24
+	.byte	0xe0
+	.4byte	0xc88
+	.uleb128 0x1c
+	.4byte	.LASF255
+	.byte	0x5
+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF256
+	.byte	0x40
+	.byte	0x19
+	.byte	0xc
+	.4byte	0xd01
+	.uleb128 0xf
+	.4byte	.LASF257
+	.byte	0x19
+	.byte	0x22
+	.4byte	0x3b
+	.byte	0
+	.uleb128 0x10
+	.string	"tbu"
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+	.byte	0x23
+	.4byte	0x84
+	.byte	0x8
+	.uleb128 0x10
+	.string	"tbl"
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+	.byte	0x24
+	.4byte	0x84
+	.byte	0xc
+	.uleb128 0xf
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+	.byte	0x19
+	.byte	0x25
+	.4byte	0x3b
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF259
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+	.byte	0x26
+	.4byte	0x92
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF260
+	.byte	0x19
+	.byte	0x28
+	.4byte	0x3b
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+	.uleb128 0xf
+	.4byte	.LASF261
+	.byte	0x19
+	.byte	0x29
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF262
+	.byte	0x19
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF263
+	.byte	0x19
+	.byte	0x2c
+	.4byte	0x3b
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+	.byte	0
+	.uleb128 0xe
+	.4byte	.LASF264
+	.byte	0x18
+	.byte	0x1a
+	.byte	0x22
+	.4byte	0xd3d
+	.uleb128 0xf
+	.4byte	.LASF265
+	.byte	0x1a
+	.byte	0x23
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x10
+	.string	"id"
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+	.4byte	0xa8
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xa8
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF267
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0x109
+	.byte	0x10
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF268
+	.2byte	0x198
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xf28
+	.uleb128 0x10
+	.string	"bd"
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xa42
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x1a
+	.byte	0x2b
+	.4byte	0x3b
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF266
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0x84
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF269
+	.byte	0x1a
+	.byte	0x2d
+	.4byte	0x3b
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF270
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0x3b
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF271
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0x3b
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF272
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0x3b
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF273
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0x3b
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF274
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0x3b
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF275
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0x3b
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF276
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0x3b
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF277
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x3b
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF278
+	.byte	0x1a
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+	.4byte	0x3b
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF279
+	.byte	0x1a
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+	.4byte	0xc3
+	.byte	0x68
+	.uleb128 0xf
+	.4byte	.LASF280
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x3b
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF281
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x3b
+	.byte	0x78
+	.uleb128 0xf
+	.4byte	.LASF282
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x3b
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF283
+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x3b
+	.byte	0x88
+	.uleb128 0xf
+	.4byte	.LASF284
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0xf28
+	.byte	0x90
+	.uleb128 0xf
+	.4byte	.LASF285
+	.byte	0x1a
+	.byte	0x4e
+	.4byte	0x25d
+	.byte	0x98
+	.uleb128 0xf
+	.4byte	.LASF286
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x25d
+	.byte	0xa0
+	.uleb128 0xf
+	.4byte	.LASF287
+	.byte	0x1a
+	.byte	0x50
+	.4byte	0x290
+	.byte	0xa8
+	.uleb128 0xf
+	.4byte	.LASF288
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0x263
+	.byte	0xb8
+	.uleb128 0xf
+	.4byte	.LASF289
+	.byte	0x1a
+	.byte	0x57
+	.4byte	0x135
+	.byte	0xc0
+	.uleb128 0xf
+	.4byte	.LASF290
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0x3b
+	.byte	0xc8
+	.uleb128 0xf
+	.4byte	.LASF291
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0xfa0
+	.byte	0xd0
+	.uleb128 0x10
+	.string	"jt"
+	.byte	0x1a
+	.byte	0x5c
+	.4byte	0xfab
+	.byte	0xd8
+	.uleb128 0xf
+	.4byte	.LASF292
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0xfb1
+	.byte	0xe0
+	.uleb128 0x16
+	.4byte	.LASF293
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x84
+	.2byte	0x100
+	.uleb128 0x16
+	.4byte	.LASF294
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x84
+	.2byte	0x104
+	.uleb128 0x16
+	.4byte	.LASF295
+	.byte	0x1a
+	.byte	0x6a
+	.4byte	0x3b
+	.2byte	0x108
+	.uleb128 0x16
+	.4byte	.LASF296
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0x3b
+	.2byte	0x110
+	.uleb128 0x16
+	.4byte	.LASF297
+	.byte	0x1a
+	.byte	0x6c
+	.4byte	0x3b
+	.2byte	0x118
+	.uleb128 0x16
+	.4byte	.LASF298
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0x25d
+	.2byte	0x120
+	.uleb128 0x16
+	.4byte	.LASF136
+	.byte	0x1a
+	.byte	0x76
+	.4byte	0xc88
+	.2byte	0x128
+	.uleb128 0x16
+	.4byte	.LASF299
+	.byte	0x1a
+	.byte	0x7c
+	.4byte	0x109
+	.2byte	0x168
+	.uleb128 0x16
+	.4byte	.LASF300
+	.byte	0x1a
+	.byte	0x7d
+	.4byte	0x109
+	.2byte	0x170
+	.uleb128 0x16
+	.4byte	.LASF301
+	.byte	0x1a
+	.byte	0x83
+	.4byte	0xb8
+	.2byte	0x178
+	.uleb128 0x16
+	.4byte	.LASF302
+	.byte	0x1a
+	.byte	0x88
+	.4byte	0xd01
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+	.byte	0x1b
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+	.4byte	0xf9b
+	.uleb128 0xf
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+	.4byte	0xd5
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.4byte	0xfa0
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+	.uleb128 0xf
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+	.byte	0x1b
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+	.4byte	0xfa0
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+	.uleb128 0xf
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+	.uleb128 0x9
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+	.uleb128 0x27
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+	.uleb128 0x9
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+	.uleb128 0x2
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+	.4byte	0xd3d
+	.uleb128 0x4
+	.4byte	0xfc1
+	.uleb128 0x5
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+	.byte	0xab
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+	.uleb128 0xb
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+	.uleb128 0xc
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+	.uleb128 0x5
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+	.4byte	0xfdc
+	.uleb128 0x5
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+	.byte	0xae
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0x5
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+	.uleb128 0xe
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+	.byte	0x1c
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+	.4byte	0x1037
+	.uleb128 0xf
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+	.uleb128 0x9
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+	.uleb128 0xe
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+	.4byte	0x10da
+	.uleb128 0xf
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+	.uleb128 0xf
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+	.uleb128 0xf
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+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF164
+	.byte	0x1c
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+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF321
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+	.4byte	0x1104
+	.byte	0x28
+	.uleb128 0xf
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+	.4byte	0x1123
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+	.uleb128 0xf
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+	.byte	0x1c
+	.byte	0xaf
+	.4byte	0x1138
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF324
+	.byte	0x1c
+	.byte	0xb0
+	.4byte	0x1149
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF325
+	.byte	0x1c
+	.byte	0xb4
+	.4byte	0x1138
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF47
+	.byte	0x1c
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+	.4byte	0x10fe
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF326
+	.byte	0x1c
+	.byte	0xb6
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x1c
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+	.4byte	0x135
+	.byte	0x60
+	.byte	0
+	.uleb128 0xb
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+	.4byte	0x10ea
+	.uleb128 0x12
+	.4byte	0xce
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+	.uleb128 0x14
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+	.uleb128 0x14
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+	.uleb128 0x9
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+	.uleb128 0x5
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+	.uleb128 0xd
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+	.uleb128 0xd
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+	.uleb128 0xd
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+	.byte	0x3
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+	.uleb128 0xf
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+	.uleb128 0x10
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+	.uleb128 0x10
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+	.uleb128 0x2b
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+	.uleb128 0x2c
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+	.byte	0x1e
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+	.uleb128 0x2d
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+	.byte	0x1e
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+	.uleb128 0x10
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+	.uleb128 0xe
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+	.byte	0x8
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x154e
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1573
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x158d
+	.uleb128 0x14
+	.4byte	0x25d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x157e
+	.uleb128 0xe
+	.4byte	.LASF386
+	.byte	0x80
+	.byte	0x20
+	.byte	0x54
+	.4byte	0x1677
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x20
+	.byte	0x55
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x10
+	.string	"id"
+	.byte	0x20
+	.byte	0x56
+	.4byte	0xa60
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF387
+	.byte	0x20
+	.byte	0x57
+	.4byte	0x158d
+	.byte	0x10
+	.uleb128 0xf
+	.4byte	.LASF388
+	.byte	0x20
+	.byte	0x58
+	.4byte	0x158d
+	.byte	0x18
+	.uleb128 0xf
+	.4byte	.LASF389
+	.byte	0x20
+	.byte	0x59
+	.4byte	0x158d
+	.byte	0x20
+	.uleb128 0xf
+	.4byte	.LASF390
+	.byte	0x20
+	.byte	0x5a
+	.4byte	0x158d
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF391
+	.byte	0x20
+	.byte	0x5b
+	.4byte	0x158d
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF367
+	.byte	0x20
+	.byte	0x5c
+	.4byte	0x158d
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF368
+	.byte	0x20
+	.byte	0x5d
+	.4byte	0x158d
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF321
+	.byte	0x20
+	.byte	0x5e
+	.4byte	0x168c
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF392
+	.byte	0x20
+	.byte	0x5f
+	.4byte	0x168c
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF370
+	.byte	0x20
+	.byte	0x60
+	.4byte	0x59
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF393
+	.byte	0x20
+	.byte	0x61
+	.4byte	0x59
+	.byte	0x5c
+	.uleb128 0xf
+	.4byte	.LASF394
+	.byte	0x20
+	.byte	0x62
+	.4byte	0x59
+	.byte	0x60
+	.uleb128 0xf
+	.4byte	.LASF372
+	.byte	0x20
+	.byte	0x63
+	.4byte	0x59
+	.byte	0x64
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0x20
+	.byte	0x64
+	.4byte	0x59
+	.byte	0x68
+	.uleb128 0x10
+	.string	"ops"
+	.byte	0x20
+	.byte	0x65
+	.4byte	0x263
+	.byte	0x70
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x20
+	.byte	0x66
+	.4byte	0x11f
+	.byte	0x78
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1593
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x168c
+	.uleb128 0x14
+	.4byte	0x1548
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x167d
+	.uleb128 0x5
+	.4byte	.LASF395
+	.byte	0x21
+	.byte	0xb
+	.4byte	0x149
+	.uleb128 0xe
+	.4byte	.LASF396
+	.byte	0x70
+	.byte	0x22
+	.byte	0x16
+	.4byte	0x172e
+	.uleb128 0xf
+	.4byte	.LASF42
+	.byte	0x22
+	.byte	0x17
+	.4byte	0x59
+	.byte	0
+	.uleb128 0x10
+	.string	"ext"
+	.byte	0x22
+	.byte	0x18
+	.4byte	0x59
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF28
+	.byte	0x22
+	.byte	0x19
+	.4byte	0xfb1
+	.byte	0x8
+	.uleb128 0xf
+	.4byte	.LASF54
+	.byte	0x22
+	.byte	0x1d
+	.4byte	0x1743
+	.byte	0x28
+	.uleb128 0xf
+	.4byte	.LASF397
+	.byte	0x22
+	.byte	0x1e
+	.4byte	0x1743
+	.byte	0x30
+	.uleb128 0xf
+	.4byte	.LASF398
+	.byte	0x22
+	.byte	0x23
+	.4byte	0x1759
+	.byte	0x38
+	.uleb128 0xf
+	.4byte	.LASF399
+	.byte	0x22
+	.byte	0x25
+	.4byte	0x176f
+	.byte	0x40
+	.uleb128 0xf
+	.4byte	.LASF400
+	.byte	0x22
+	.byte	0x2a
+	.4byte	0x1743
+	.byte	0x48
+	.uleb128 0xf
+	.4byte	.LASF401
+	.byte	0x22
+	.byte	0x2b
+	.4byte	0x1743
+	.byte	0x50
+	.uleb128 0xf
+	.4byte	.LASF35
+	.byte	0x22
+	.byte	0x2f
+	.4byte	0x135
+	.byte	0x58
+	.uleb128 0xf
+	.4byte	.LASF402
+	.byte	0x22
+	.byte	0x30
+	.4byte	0x290
+	.byte	0x60
+	.byte	0
+	.uleb128 0x13
+	.4byte	0x59
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0x173d
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x169d
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x172e
+	.uleb128 0x28
+	.4byte	0x1759
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xe7
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x1749
+	.uleb128 0x28
+	.4byte	0x176f
+	.uleb128 0x14
+	.4byte	0x173d
+	.uleb128 0x14
+	.4byte	0xd5
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x175f
+	.uleb128 0xb
+	.4byte	0x173d
+	.4byte	0x1780
+	.uleb128 0xc
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF403
+	.byte	0x22
+	.byte	0x48
+	.4byte	0x1775
+	.uleb128 0xb
+	.4byte	0xf3
+	.4byte	0x179b
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF404
+	.byte	0x22
+	.byte	0x49
+	.4byte	0x178b
+	.uleb128 0xb
+	.4byte	0x17b6
+	.4byte	0x17b6
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x173d
+	.uleb128 0x5
+	.4byte	.LASF405
+	.byte	0x23
+	.byte	0x15
+	.4byte	0x17a6
+	.uleb128 0xb
+	.4byte	0x59
+	.4byte	0x17d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x2
+	.byte	0
+	.uleb128 0x5
+	.4byte	.LASF406
+	.byte	0x23
+	.byte	0x1a
+	.4byte	0x17c7
+	.uleb128 0x25
+	.byte	0x4
+	.4byte	0x84
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x181f
+	.uleb128 0x1c
+	.4byte	.LASF407
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF408
+	.byte	0x1
+	.uleb128 0x1c
+	.4byte	.LASF409
+	.byte	0x2
+	.uleb128 0x1c
+	.4byte	.LASF410
+	.byte	0x3
+	.uleb128 0x1c
+	.4byte	.LASF411
+	.byte	0x4
+	.uleb128 0x1c
+	.4byte	.LASF412
+	.byte	0x5
+	.uleb128 0x1c
+	.4byte	.LASF413
+	.byte	0x6
+	.uleb128 0x1c
+	.4byte	.LASF414
+	.byte	0x7
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xdb
+	.4byte	0x182f
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x181f
+	.uleb128 0x2a
+	.4byte	.LASF416
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0x182f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pattern
+	.uleb128 0xb
+	.4byte	0xa3
+	.4byte	0x1859
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x6
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x1849
+	.uleb128 0x2a
+	.4byte	.LASF417
+	.byte	0x1
+	.byte	0x29
+	.4byte	0x1859
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	test_pat_param
+	.uleb128 0x2f
+	.4byte	.LASF418
+	.byte	0x1
+	.2byte	0x185
+	.4byte	0x67c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	_u_boot_list_2_cmd_2_ddr_test
+	.uleb128 0x30
+	.4byte	.LASF426
+	.byte	0x3
+	.byte	0x50
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1904
+	.uleb128 0x31
+	.4byte	.LASF267
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x135
+	.4byte	.LLST76
+	.uleb128 0x31
+	.4byte	.LASF51
+	.byte	0x3
+	.byte	0x50
+	.4byte	0x109
+	.4byte	.LLST77
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x52
+	.4byte	0x1365
+	.4byte	.LLST78
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x53
+	.4byte	0xa8
+	.4byte	.LLST79
+	.uleb128 0x33
+	.8byte	.LVL310
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xd
+	.byte	0x83
+	.sleb128 -4
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF428
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a04
+	.uleb128 0x36
+	.string	"buf"
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x1365
+	.4byte	.LLST29
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0xa8
+	.4byte	.LLST30
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST31
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x3
+	.byte	0x2e
+	.4byte	0x109
+	.4byte	.LLST32
+	.uleb128 0x31
+	.4byte	.LASF421
+	.byte	0x3
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST33
+	.uleb128 0x37
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x31
+	.4byte	0x1a04
+	.4byte	.LLST34
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x3
+	.byte	0x32
+	.4byte	0x1a0a
+	.4byte	.LLST35
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST36
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x33
+	.4byte	0xa8
+	.4byte	.LLST37
+	.uleb128 0x32
+	.string	"val"
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST38
+	.uleb128 0x37
+	.4byte	.LASF423
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST39
+	.uleb128 0x37
+	.4byte	.LASF424
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST40
+	.uleb128 0x37
+	.4byte	.LASF425
+	.byte	0x3
+	.byte	0x34
+	.4byte	0x109
+	.4byte	.LLST41
+	.uleb128 0x33
+	.8byte	.LVL115
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC16
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x109
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x42
+	.uleb128 0x30
+	.4byte	.LASF427
+	.byte	0x3
+	.byte	0x1c
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1a98
+	.uleb128 0x38
+	.string	"buf"
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x1365
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x31
+	.4byte	.LASF419
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0xa8
+	.4byte	.LLST25
+	.uleb128 0x39
+	.4byte	.LASF420
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x3
+	.byte	0x1c
+	.4byte	0x109
+	.4byte	.LLST26
+	.uleb128 0x2a
+	.4byte	.LASF422
+	.byte	0x3
+	.byte	0x1e
+	.4byte	0x1a04
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3a
+	.string	"p"
+	.byte	0x3
+	.byte	0x1f
+	.4byte	0x1a04
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST27
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x3
+	.byte	0x20
+	.4byte	0xa8
+	.4byte	.LLST28
+	.byte	0
+	.uleb128 0x3b
+	.4byte	.LASF491
+	.byte	0x3
+	.byte	0xa
+	.byte	0x1
+	.4byte	0x1aae
+	.uleb128 0x3c
+	.string	"p"
+	.byte	0x3
+	.byte	0xa
+	.4byte	0x1365
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF429
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x59
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1d27
+	.uleb128 0x31
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST3
+	.uleb128 0x31
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x57
+	.4byte	0x109
+	.4byte	.LLST4
+	.uleb128 0x3a
+	.string	"ret"
+	.byte	0x2
+	.byte	0x59
+	.4byte	0x59
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3d
+	.4byte	0x1d95
+	.8byte	.LBB12
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x2
+	.byte	0x5b
+	.4byte	0x1c21
+	.uleb128 0x3e
+	.4byte	0x1db0
+	.4byte	.LLST5
+	.uleb128 0x3e
+	.4byte	0x1da5
+	.4byte	.LLST6
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x40
+	.4byte	0x1dbb
+	.4byte	.LLST7
+	.uleb128 0x40
+	.4byte	0x1dc4
+	.4byte	.LLST8
+	.uleb128 0x40
+	.4byte	0x1dcd
+	.4byte	.LLST9
+	.uleb128 0x40
+	.4byte	0x1dd8
+	.4byte	.LLST10
+	.uleb128 0x41
+	.4byte	0x1de3
+	.uleb128 0x40
+	.4byte	0x1dee
+	.4byte	.LLST11
+	.uleb128 0x40
+	.4byte	0x1df9
+	.4byte	.LLST12
+	.uleb128 0x40
+	.4byte	0x1e04
+	.4byte	.LLST13
+	.uleb128 0x42
+	.8byte	.LVL26
+	.4byte	0x2b70
+	.4byte	0x1b94
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0x11
+	.sleb128 -2139062144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL28
+	.4byte	0x2b65
+	.4byte	0x1bb2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL32
+	.4byte	0x2b65
+	.4byte	0x1bca
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL38
+	.4byte	0x2b65
+	.4byte	0x1be9
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL39
+	.4byte	0x2b65
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+	.uleb128 0x1
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+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8b
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
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+	.byte	0
+	.byte	0
+	.uleb128 0x43
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+	.8byte	.LBB21
+	.4byte	.Ldebug_ranges0+0x60
+	.byte	0x2
+	.byte	0x5d
+	.uleb128 0x44
+	.4byte	0x1d42
+	.uleb128 0x44
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+	.uleb128 0x3f
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+	.4byte	0x1d4d
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+	.uleb128 0x40
+	.4byte	0x1d56
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+	.uleb128 0x45
+	.4byte	0x1d5f
+	.uleb128 0x1
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+	.uleb128 0x45
+	.4byte	0x1d6a
+	.uleb128 0x1
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+	.uleb128 0x45
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+	.uleb128 0x1
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+	.uleb128 0x42
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+	.4byte	0x2b65
+	.4byte	0x1c96
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x42
+	.8byte	.LVL50
+	.4byte	0x2b70
+	.4byte	0x1cba
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x86
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
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+	.4byte	0x2b65
+	.4byte	0x1cd2
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
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+	.8byte	.LVL61
+	.4byte	0x2b65
+	.4byte	0x1cf1
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC11
+	.byte	0
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+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
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+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
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+	.uleb128 0x1
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+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF435
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1d95
+	.uleb128 0x47
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x47
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0x30
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"j"
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF432
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF376
+	.byte	0x2
+	.byte	0x33
+	.4byte	0x109
+	.uleb128 0x49
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0x34
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"p"
+	.byte	0x2
+	.byte	0x35
+	.4byte	0x1a0a
+	.uleb128 0x49
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x36
+	.4byte	0x109
+	.byte	0
+	.uleb128 0x46
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+	.byte	0x2
+	.byte	0xa
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x1e10
+	.uleb128 0x47
+	.4byte	.LASF430
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x47
+	.4byte	.LASF431
+	.byte	0x2
+	.byte	0xa
+	.4byte	0x109
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"j"
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+	.byte	0xc
+	.4byte	0xa8
+	.uleb128 0x49
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+	.byte	0x2
+	.byte	0xd
+	.4byte	0xa8
+	.uleb128 0x49
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+	.byte	0xd
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+	.4byte	.LASF376
+	.byte	0x2
+	.byte	0xd
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+	.uleb128 0x49
+	.4byte	.LASF433
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"p32"
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+	.byte	0xf
+	.4byte	0x1e10
+	.uleb128 0x49
+	.4byte	.LASF434
+	.byte	0x2
+	.byte	0x10
+	.4byte	0x109
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+	.byte	0x8
+	.4byte	0xb3
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+	.byte	0x30
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+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2042
+	.uleb128 0x31
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+	.byte	0x5
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+	.4byte	.LLST49
+	.uleb128 0x31
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+	.byte	0x5
+	.byte	0x30
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+	.4byte	.LLST50
+	.uleb128 0x37
+	.4byte	.LASF267
+	.byte	0x5
+	.byte	0x35
+	.4byte	0x109
+	.4byte	.LLST51
+	.uleb128 0x37
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+	.byte	0x5
+	.byte	0x35
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+	.byte	0x5
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+	.uleb128 0x2a
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+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"col"
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+	.4byte	.LLST53
+	.uleb128 0x37
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+	.4byte	0xa8
+	.4byte	.LLST54
+	.uleb128 0x37
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+	.byte	0x5
+	.byte	0x3a
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+	.4byte	.LLST55
+	.uleb128 0x4a
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+	.uleb128 0x3d
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+	.4byte	.Ldebug_ranges0+0x90
+	.byte	0x5
+	.byte	0x3d
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+	.uleb128 0x3f
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+	.uleb128 0x4b
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+	.8byte	.LBE31-.LBB31
+	.uleb128 0x40
+	.4byte	0x208e
+	.4byte	.LLST57
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL156
+	.4byte	0x2b7c
+	.4byte	0x1f45
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
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+	.byte	0x3
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.4byte	0x1f64
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+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC22
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+	.4byte	0x2b85
+	.4byte	0x1f89
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x2
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+	.uleb128 0x3
+	.byte	0x8f
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+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8
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+	.4byte	0x1fe4
+	.uleb128 0x34
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0x8f
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+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x84
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+	.sleb128 0
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+	.byte	0x87
+	.sleb128 0
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
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+	.8byte	.LVL171
+	.4byte	0x2b85
+	.4byte	0x2015
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0xe
+	.byte	0x85
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL172
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+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 144
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xa8
+	.4byte	0x2052
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF443
+	.byte	0x5
+	.byte	0xc
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x209b
+	.uleb128 0x49
+	.4byte	.LASF444
+	.byte	0x5
+	.byte	0xe
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"col"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x48
+	.string	"bw"
+	.byte	0x5
+	.byte	0xf
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF440
+	.byte	0x5
+	.byte	0x10
+	.4byte	0x59
+	.uleb128 0x4c
+	.uleb128 0x48
+	.string	"__v"
+	.byte	0x5
+	.byte	0x13
+	.4byte	0xa8
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF455
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x25c1
+	.uleb128 0x31
+	.4byte	.LASF445
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x25c1
+	.4byte	.LLST58
+	.uleb128 0x31
+	.4byte	.LASF446
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST59
+	.uleb128 0x31
+	.4byte	.LASF447
+	.byte	0x1
+	.byte	0xbc
+	.4byte	0x59
+	.4byte	.LLST60
+	.uleb128 0x31
+	.4byte	.LASF448
+	.byte	0x1
+	.byte	0xbd
+	.4byte	0x641
+	.4byte	.LLST61
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0xbf
+	.4byte	0x59
+	.4byte	.LLST62
+	.uleb128 0x37
+	.4byte	.LASF449
+	.byte	0x1
+	.byte	0xc0
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+	.4byte	.LLST63
+	.uleb128 0x37
+	.4byte	.LASF450
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x59
+	.4byte	.LLST64
+	.uleb128 0x3a
+	.string	"arg"
+	.byte	0x1
+	.byte	0xc1
+	.4byte	0x25c7
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2a
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -104
+	.uleb128 0x2a
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x25d7
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x37
+	.4byte	.LASF451
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xa8
+	.4byte	.LLST65
+	.uleb128 0x37
+	.4byte	.LASF452
+	.byte	0x1
+	.byte	0xc5
+	.4byte	0xa8
+	.4byte	.LLST66
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xc6
+	.4byte	0x59
+	.4byte	.LLST67
+	.uleb128 0x37
+	.4byte	.LASF453
+	.byte	0x1
+	.byte	0xc7
+	.4byte	0x59
+	.4byte	.LLST68
+	.uleb128 0x37
+	.4byte	.LASF454
+	.byte	0x1
+	.byte	0xc8
+	.4byte	0xa8
+	.4byte	.LLST69
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xec
+	.4byte	0x25d
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -112
+	.uleb128 0x3d
+	.4byte	0x28ba
+	.8byte	.LBB40
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x1
+	.byte	0xcb
+	.4byte	0x223d
+	.uleb128 0x3e
+	.4byte	0x28d1
+	.4byte	.LLST70
+	.uleb128 0x3e
+	.4byte	0x28c6
+	.4byte	.LLST71
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0xd0
+	.uleb128 0x40
+	.4byte	0x28dc
+	.4byte	.LLST72
+	.uleb128 0x40
+	.4byte	0x28e5
+	.4byte	.LLST73
+	.uleb128 0x42
+	.8byte	.LVL183
+	.4byte	0x2b65
+	.4byte	0x2208
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL184
+	.4byte	0x2b65
+	.4byte	0x2227
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL193
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4e
+	.4byte	0x2869
+	.8byte	.LBB54
+	.4byte	.Ldebug_ranges0+0x150
+	.byte	0x1
+	.2byte	0x152
+	.4byte	0x229d
+	.uleb128 0x44
+	.4byte	0x288f
+	.uleb128 0x44
+	.4byte	0x2884
+	.uleb128 0x44
+	.4byte	0x2879
+	.uleb128 0x3f
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x40
+	.4byte	0x289a
+	.4byte	.LLST74
+	.uleb128 0x41
+	.4byte	0x28a3
+	.uleb128 0x40
+	.4byte	0x28ae
+	.4byte	.LLST75
+	.uleb128 0x33
+	.8byte	.LVL272
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC33
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL187
+	.4byte	0x2b91
+	.4byte	0x22bb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x88
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL197
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL199
+	.4byte	0x2b9c
+	.4byte	0x22eb
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 0
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x130
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL202
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL203
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL204
+	.4byte	0x2b65
+	.4byte	0x2324
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC36
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL207
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL208
+	.4byte	0x270b
+	.uleb128 0x4f
+	.8byte	.LVL215
+	.4byte	0x2692
+	.uleb128 0x4f
+	.8byte	.LVL216
+	.4byte	0x25e7
+	.uleb128 0x4f
+	.8byte	.LVL220
+	.4byte	0x25e7
+	.uleb128 0x42
+	.8byte	.LVL221
+	.4byte	0x2b65
+	.4byte	0x2389
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x3a
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL225
+	.4byte	0x2b65
+	.4byte	0x23a9
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 224
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL226
+	.4byte	0x2b65
+	.4byte	0x23d5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 216
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL227
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL228
+	.4byte	0x1aae
+	.4byte	0x2400
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL231
+	.4byte	0x28f1
+	.4byte	0x241e
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL234
+	.4byte	0x1e16
+	.4byte	0x243c
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL237
+	.4byte	0x270b
+	.4byte	0x2458
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x6
+	.byte	0x8b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0x3fc
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL240
+	.4byte	0x2692
+	.uleb128 0x42
+	.8byte	.LVL241
+	.4byte	0x1aae
+	.4byte	0x2483
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL244
+	.4byte	0x28f1
+	.4byte	0x24a1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL247
+	.4byte	0x1e16
+	.4byte	0x24bf
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL249
+	.4byte	0x2ba7
+	.uleb128 0x42
+	.8byte	.LVL255
+	.4byte	0x2b65
+	.4byte	0x2504
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x15
+	.byte	0x83
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x24
+	.byte	0x9
+	.byte	0xe5
+	.byte	0x26
+	.byte	0x3
+	.8byte	.LANCHOR2
+	.byte	0x22
+	.byte	0x6
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL281
+	.4byte	0x2b65
+	.4byte	0x2522
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL286
+	.4byte	0x1aae
+	.uleb128 0x4f
+	.8byte	.LVL288
+	.4byte	0x2ba7
+	.uleb128 0x4f
+	.8byte	.LVL293
+	.4byte	0x28f1
+	.uleb128 0x4f
+	.8byte	.LVL294
+	.4byte	0x1e16
+	.uleb128 0x42
+	.8byte	.LVL299
+	.4byte	0x2b65
+	.4byte	0x257b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC28
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL300
+	.4byte	0x2bb2
+	.4byte	0x259f
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x35
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 240
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL303
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC29
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.byte	0x8
+	.4byte	0x67c
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25d7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x4
+	.byte	0
+	.uleb128 0xb
+	.4byte	0x109
+	.4byte	0x25e7
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x3
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF456
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2692
+	.uleb128 0x36
+	.string	"uv"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x59
+	.4byte	.LLST1
+	.uleb128 0x3a
+	.string	"dev"
+	.byte	0x1
+	.byte	0xa6
+	.4byte	0x25d
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0xa7
+	.4byte	0x59
+	.4byte	.LLST2
+	.uleb128 0x42
+	.8byte	.LVL11
+	.4byte	0x2bbd
+	.4byte	0x2658
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 56
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL14
+	.4byte	0x2b65
+	.uleb128 0x42
+	.8byte	.LVL18
+	.4byte	0x2bc9
+	.4byte	0x267d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL21
+	.4byte	0x2bd5
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x64
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF457
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x59
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x270b
+	.uleb128 0x31
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x92
+	.4byte	0x109
+	.4byte	.LLST0
+	.uleb128 0x4f
+	.8byte	.LVL2
+	.4byte	0x2be0
+	.uleb128 0x4f
+	.8byte	.LVL3
+	.4byte	0x2beb
+	.uleb128 0x4f
+	.8byte	.LVL4
+	.4byte	0x2bf6
+	.uleb128 0x33
+	.8byte	.LVL7
+	.4byte	0x2b65
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LASF459
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x59
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2869
+	.uleb128 0x31
+	.4byte	.LASF460
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST17
+	.uleb128 0x31
+	.4byte	.LASF461
+	.byte	0x1
+	.byte	0x67
+	.4byte	0xa8
+	.4byte	.LLST18
+	.uleb128 0x31
+	.4byte	.LASF462
+	.byte	0x1
+	.byte	0x67
+	.4byte	0x109
+	.4byte	.LLST19
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x1
+	.byte	0x6b
+	.4byte	0xa8
+	.4byte	.LLST20
+	.uleb128 0x37
+	.4byte	.LASF463
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST21
+	.uleb128 0x37
+	.4byte	.LASF464
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST22
+	.uleb128 0x37
+	.4byte	.LASF458
+	.byte	0x1
+	.byte	0x6c
+	.4byte	0xa8
+	.4byte	.LLST23
+	.uleb128 0x32
+	.string	"ret"
+	.byte	0x1
+	.byte	0x6d
+	.4byte	0x59
+	.4byte	.LLST24
+	.uleb128 0x4f
+	.8byte	.LVL73
+	.4byte	0x2c01
+	.uleb128 0x4f
+	.8byte	.LVL75
+	.4byte	0x2be0
+	.uleb128 0x42
+	.8byte	.LVL78
+	.4byte	0x2b65
+	.4byte	0x27da
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL79
+	.4byte	0x2beb
+	.4byte	0x27f8
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x8a
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL80
+	.4byte	0x2bf6
+	.uleb128 0x42
+	.8byte	.LVL83
+	.4byte	0x2b65
+	.4byte	0x281d
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL84
+	.4byte	0x1aae
+	.4byte	0x2836
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x40
+	.byte	0x40
+	.byte	0x24
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL87
+	.4byte	0x2b65
+	.4byte	0x285b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC15
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4f
+	.8byte	.LVL92
+	.4byte	0x2ba7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF465
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x59
+	.byte	0x1
+	.4byte	0x28ba
+	.uleb128 0x3c
+	.string	"arg"
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x49
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF467
+	.byte	0x1
+	.byte	0x4c
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF493
+	.byte	0x1
+	.byte	0x2d
+	.byte	0x1
+	.4byte	0x28f1
+	.uleb128 0x47
+	.4byte	.LASF420
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x47
+	.4byte	.LASF375
+	.byte	0x1
+	.byte	0x2d
+	.4byte	0x1a04
+	.uleb128 0x48
+	.string	"i"
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.uleb128 0x49
+	.4byte	.LASF466
+	.byte	0x1
+	.byte	0x2f
+	.4byte	0xa8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF468
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x59
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b2d
+	.uleb128 0x31
+	.4byte	.LASF420
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST42
+	.uleb128 0x31
+	.4byte	.LASF375
+	.byte	0x4
+	.byte	0x2d
+	.4byte	0x109
+	.4byte	.LLST43
+	.uleb128 0x37
+	.4byte	.LASF469
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST44
+	.uleb128 0x32
+	.string	"i"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST45
+	.uleb128 0x32
+	.string	"j"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST46
+	.uleb128 0x32
+	.string	"q"
+	.byte	0x4
+	.byte	0x2f
+	.4byte	0xa8
+	.4byte	.LLST47
+	.uleb128 0x3a
+	.string	"buf"
+	.byte	0x4
+	.byte	0x30
+	.4byte	0x2042
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x32
+	.string	"p"
+	.byte	0x4
+	.byte	0x31
+	.4byte	0x1365
+	.4byte	.LLST48
+	.uleb128 0x51
+	.4byte	.LASF470
+	.4byte	0x2b3d
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC45
+	.uleb128 0x42
+	.8byte	.LVL123
+	.4byte	0x2b65
+	.4byte	0x29b3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL125
+	.4byte	0x2b65
+	.4byte	0x29d3
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 200
+	.byte	0x6
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL127
+	.4byte	0x2b65
+	.4byte	0x29f1
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL130
+	.4byte	0x1a10
+	.4byte	0x2a1b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL131
+	.4byte	0x1904
+	.4byte	0x2a44
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL139
+	.4byte	0x2b65
+	.4byte	0x2a63
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL140
+	.4byte	0x2c0d
+	.4byte	0x2a7b
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL143
+	.4byte	0x2b65
+	.4byte	0x2aa0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC21
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL146
+	.4byte	0x2b65
+	.4byte	0x2abe
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL147
+	.4byte	0x2b65
+	.4byte	0x2adc
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x42
+	.8byte	.LVL149
+	.4byte	0x1a10
+	.4byte	0x2b06
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x33
+	.8byte	.LVL150
+	.4byte	0x1904
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x34
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.4byte	0xe7
+	.4byte	0x2b3d
+	.uleb128 0x12
+	.4byte	0xce
+	.byte	0x9
+	.byte	0
+	.uleb128 0x8
+	.4byte	0x2b2d
+	.uleb128 0x52
+	.4byte	0x1a98
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2b65
+	.uleb128 0x53
+	.4byte	0x1aa4
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF471
+	.4byte	.LASF471
+	.byte	0x25
+	.byte	0x12
+	.uleb128 0x55
+	.4byte	.LASF472
+	.4byte	.LASF472
+	.byte	0x1d
+	.2byte	0x16c
+	.uleb128 0x56
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.uleb128 0x55
+	.4byte	.LASF473
+	.4byte	.LASF473
+	.byte	0x1d
+	.2byte	0x16d
+	.uleb128 0x54
+	.4byte	.LASF474
+	.4byte	.LASF474
+	.byte	0xa
+	.byte	0x2d
+	.uleb128 0x54
+	.4byte	.LASF475
+	.4byte	.LASF475
+	.byte	0x26
+	.byte	0x29
+	.uleb128 0x54
+	.4byte	.LASF476
+	.4byte	.LASF476
+	.byte	0x21
+	.byte	0x11
+	.uleb128 0x54
+	.4byte	.LASF477
+	.4byte	.LASF477
+	.byte	0x20
+	.byte	0x94
+	.uleb128 0x55
+	.4byte	.LASF478
+	.4byte	.LASF478
+	.byte	0x27
+	.2byte	0x1da
+	.uleb128 0x55
+	.4byte	.LASF479
+	.4byte	.LASF479
+	.byte	0x27
+	.2byte	0x116
+	.uleb128 0x54
+	.4byte	.LASF480
+	.4byte	.LASF480
+	.byte	0x28
+	.byte	0xb
+	.uleb128 0x54
+	.4byte	.LASF481
+	.4byte	.LASF481
+	.byte	0x29
+	.byte	0xc
+	.uleb128 0x54
+	.4byte	.LASF482
+	.4byte	.LASF482
+	.byte	0x29
+	.byte	0xa
+	.uleb128 0x54
+	.4byte	.LASF483
+	.4byte	.LASF483
+	.byte	0x29
+	.byte	0xb
+	.uleb128 0x55
+	.4byte	.LASF484
+	.4byte	.LASF484
+	.byte	0x6
+	.2byte	0x2b9
+	.uleb128 0x55
+	.4byte	.LASF485
+	.4byte	.LASF485
+	.byte	0x1d
+	.2byte	0x398
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x35
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x5
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0x6
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
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+	.uleb128 0x7
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x8
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+	.byte	0
+	.uleb128 0x49
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+	.byte	0
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+	.uleb128 0x49
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+	.byte	0
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+	.uleb128 0xa
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+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
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+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0xe
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+	.uleb128 0x3
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
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+	.uleb128 0xf
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+	.uleb128 0x3
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+	.uleb128 0x3a
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+	.uleb128 0x3b
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+	.uleb128 0x49
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+	.uleb128 0x38
+	.uleb128 0xb
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+	.uleb128 0x10
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+	.uleb128 0x3
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+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
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+	.uleb128 0x38
+	.uleb128 0xb
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+	.uleb128 0x11
+	.uleb128 0x26
+	.byte	0
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+	.uleb128 0x12
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
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+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x15
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+	.uleb128 0x27
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+	.uleb128 0x3
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+	.uleb128 0x3b
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+	.uleb128 0x38
+	.uleb128 0x5
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+	.uleb128 0x2f
+	.uleb128 0x5
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+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x1c
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
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+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x56
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST76:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL304
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL306
+	.8byte	.LFE278
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL308
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL306
+	.8byte	.LVL307
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL307
+	.8byte	.LVL308
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL308
+	.8byte	.LVL309
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL309
+	.8byte	.LVL310
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL310
+	.8byte	.LFE278
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL105
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL106
+	.8byte	.LVL108
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL108
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL114
+	.8byte	.LVL117
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x33
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL105
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL105
+	.8byte	.LVL107
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL107
+	.8byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL105
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x54
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL108
+	.8byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL113
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL109
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL115-1
+	.8byte	.LVL117
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL117
+	.8byte	.LVL119
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL120
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL108
+	.8byte	.LVL110
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL110
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL115-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL108
+	.8byte	.LVL112
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL112
+	.8byte	.LVL116
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL116
+	.8byte	.LVL117
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL117
+	.8byte	.LFE277
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL98
+	.8byte	.LVL100
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL100
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL97
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL99
+	.8byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL100
+	.8byte	.LVL101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL101
+	.8byte	.LFE276
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL22
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL22
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL41
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL24
+	.8byte	.LVL25
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL25
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL23
+	.8byte	.LVL26-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26-1
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL29
+	.8byte	.LVL32-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL35
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL42
+	.8byte	.LVL44
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL31
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL31
+	.8byte	.LVL34
+	.2byte	0x3
+	.byte	0x8c
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL42
+	.8byte	.LVL46
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0x9e
+	.uleb128 0x4
+	.4byte	0x80808080
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL42
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL26
+	.8byte	.LVL27
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x40404040
+	.byte	0x9f
+	.8byte	.LVL27
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL42
+	.8byte	.LVL45
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL24
+	.8byte	.LVL27
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL26
+	.8byte	.LVL40
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL40
+	.8byte	.LVL42
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL24
+	.8byte	.LVL30
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL34
+	.8byte	.LVL36
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL36
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL42
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL50
+	.8byte	.LVL51
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL51
+	.8byte	.LVL53
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL56
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL47
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL54
+	.8byte	.LVL55
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL47
+	.8byte	.LVL52
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL55
+	.8byte	.LVL58
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL58
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL63
+	.8byte	.LFE274
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL155
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL174
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL153
+	.8byte	.LVL154
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL154
+	.8byte	.LVL162
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL162
+	.8byte	.LVL163
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 32
+	.byte	0x9f
+	.8byte	.LVL163
+	.8byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL167
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL167
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL160
+	.8byte	.LVL164
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL164
+	.8byte	.LVL168
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL168
+	.8byte	.LVL169
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -8
+	.byte	0x9f
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -40
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL169
+	.8byte	.LVL173
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL156
+	.8byte	.LVL166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL170
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL172
+	.8byte	.LFE271
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL159
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL175
+	.8byte	.LVL176
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL176
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL178
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL175
+	.8byte	.LVL177
+	.2byte	0x1
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+	.8byte	.LVL177
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL196
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL297
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL297
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL175
+	.8byte	.LVL178
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL203
+	.8byte	.LVL205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL217
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL218
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL223
+	.8byte	.LVL256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL303
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL186
+	.8byte	.LVL188
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL221
+	.8byte	.LVL222
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LVL250
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL257
+	.8byte	.LVL258
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL258
+	.8byte	.LVL259
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL281
+	.8byte	.LVL282
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL285
+	.8byte	.LVL289
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL292
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL296
+	.8byte	.LVL298
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL195
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL198
+	.8byte	.LVL203
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL205
+	.8byte	.LVL223
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL256
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL268
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL291
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL291
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL229
+	.8byte	.LVL232
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL235
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL235
+	.8byte	.LVL238
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL242
+	.8byte	.LVL245
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL245
+	.8byte	.LVL248
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL248
+	.8byte	.LVL250
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL260
+	.8byte	.LVL261
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL261
+	.8byte	.LVL262
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL262
+	.8byte	.LVL263
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL264
+	.8byte	.LVL265
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL265
+	.8byte	.LVL266
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL266
+	.8byte	.LVL268
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL287
+	.8byte	.LVL290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL290
+	.8byte	.LVL292
+	.2byte	0x1
+	.byte	0x63
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+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL222
+	.8byte	.LVL223
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL223
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL260
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL178
+	.8byte	.LVL203
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL205
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL214
+	.8byte	.LVL218
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL218
+	.8byte	.LVL254
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL256
+	.8byte	.LVL272
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL272
+	.8byte	.LVL274
+	.2byte	0x1
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+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL279
+	.8byte	.LVL296
+	.2byte	0x1
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+	.8byte	.LVL296
+	.8byte	.LVL303
+	.2byte	0x2
+	.byte	0x31
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL178
+	.8byte	.LVL200
+	.2byte	0x2
+	.byte	0x30
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+	.8byte	.LVL201
+	.2byte	0x1
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+	.8byte	.LVL203
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL206
+	.8byte	.LVL209
+	.2byte	0x1
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+	.8byte	.LVL211
+	.2byte	0x1
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+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL223
+	.2byte	0x1
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+	.8byte	.LVL229
+	.2byte	0x2
+	.byte	0x30
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+	.8byte	.LVL230
+	.2byte	0x1
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+	.8byte	.LVL230
+	.8byte	.LVL232
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL232
+	.8byte	.LVL233
+	.2byte	0x1
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+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x6c
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+	.8byte	.LVL236
+	.2byte	0x1
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+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL238
+	.8byte	.LVL239
+	.2byte	0x1
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+	.8byte	.LVL239
+	.8byte	.LVL242
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL242
+	.8byte	.LVL243
+	.2byte	0x1
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+	.8byte	.LVL243
+	.8byte	.LVL244-1
+	.2byte	0x1
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+	.8byte	.LVL244-1
+	.8byte	.LVL245
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL245
+	.8byte	.LVL246
+	.2byte	0x1
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+	.8byte	.LVL248
+	.2byte	0x1
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+	.8byte	.LVL248
+	.8byte	.LVL249-1
+	.2byte	0x1
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+	.8byte	.LVL249-1
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+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL250
+	.8byte	.LVL252
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL252
+	.8byte	.LVL256
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL256
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+	.2byte	0x1
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+	.8byte	.LVL260
+	.8byte	.LVL263
+	.2byte	0x1
+	.byte	0x50
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+	.8byte	.LVL264
+	.2byte	0x1
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+	.8byte	.LVL264
+	.8byte	.LVL267
+	.2byte	0x1
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+	.8byte	.LVL267
+	.8byte	.LVL268
+	.2byte	0x1
+	.byte	0x6c
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+	.8byte	.LVL273
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
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+	.8byte	.LVL284
+	.2byte	0x1
+	.byte	0x6c
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+	.8byte	.LVL287
+	.2byte	0x2
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+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL301
+	.2byte	0x2
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+	.8byte	.LVL302
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	.LVL303-1
+	.8byte	.LVL303
+	.2byte	0x1
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+	.8byte	0
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+	.8byte	.LVL178
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+	.2byte	0x2
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+	.8byte	.LVL253
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL256
+	.8byte	.LVL282
+	.2byte	0x2
+	.byte	0x30
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+	.8byte	.LVL283
+	.2byte	0x1
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+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL222
+	.8byte	.LVL254
+	.2byte	0x1
+	.byte	0x6b
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+	.2byte	0x1
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+	.8byte	0
+	.8byte	0
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+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL189
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	0
+.LLST72:
+	.8byte	.LVL178
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL181
+	.8byte	.LVL182
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL189
+	.8byte	.LVL190
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL190
+	.8byte	.LVL191
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL192
+	.8byte	.LVL193
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL193
+	.8byte	.LVL194
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL178
+	.8byte	.LVL185
+	.2byte	0x1
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+	.2byte	0x1
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+	.8byte	0
+.LLST74:
+	.8byte	.LVL210
+	.8byte	.LVL212
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL212
+	.8byte	.LVL213
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL213
+	.8byte	.LVL214
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL268
+	.8byte	.LVL269
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	.LVL269
+	.8byte	.LVL270
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL270
+	.8byte	.LVL271
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL275
+	.8byte	.LVL276
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL276
+	.8byte	.LVL277
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL277
+	.8byte	.LVL278
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.8byte	.LVL278
+	.8byte	.LVL279
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL269
+	.8byte	.LVL272
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL274
+	.8byte	.LVL279
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL9
+	.8byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL10
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL11
+	.8byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL19
+	.8byte	.LVL20
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL20
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL0
+	.8byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1
+	.8byte	.LVL2-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2
+	.8byte	.LVL3-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL5
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL6
+	.8byte	.LVL7-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL7-1
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LVL69
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL70
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL65
+	.8byte	.LVL68
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL68
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL65
+	.8byte	.LVL72
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL72
+	.8byte	.LVL90
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL89
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL71
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL91
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL73
+	.8byte	.LVL74
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 0
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x84
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL77
+	.8byte	.LVL78-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL82
+	.8byte	.LVL83-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL65
+	.8byte	.LVL85
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL86
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL91
+	.8byte	.LVL92-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL92-1
+	.8byte	.LVL93
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL94
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL121
+	.8byte	.LVL122
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL122
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL133
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL121
+	.8byte	.LVL123-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL123-1
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL134
+	.8byte	.LVL136
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL124
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL136
+	.8byte	.LVL145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL146
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL147
+	.8byte	.LVL148
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL125
+	.8byte	.LVL132
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL136
+	.8byte	.LVL144
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL145
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL124
+	.8byte	.LVL125
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL127
+	.8byte	.LVL135
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL136
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL141
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL142
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+	.section	.debug_aranges,"",@progbits
+	.4byte	0xcc
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x8
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB12
+	.8byte	.LBE12
+	.8byte	.LBB18
+	.8byte	.LBE18
+	.8byte	.LBB19
+	.8byte	.LBE19
+	.8byte	.LBB20
+	.8byte	.LBE20
+	.8byte	.LBB24
+	.8byte	.LBE24
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB21
+	.8byte	.LBE21
+	.8byte	.LBB25
+	.8byte	.LBE25
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB29
+	.8byte	.LBE29
+	.8byte	.LBB34
+	.8byte	.LBE34
+	.8byte	.LBB35
+	.8byte	.LBE35
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB40
+	.8byte	.LBE40
+	.8byte	.LBB48
+	.8byte	.LBE48
+	.8byte	.LBB49
+	.8byte	.LBE49
+	.8byte	.LBB50
+	.8byte	.LBE50
+	.8byte	.LBB51
+	.8byte	.LBE51
+	.8byte	.LBB52
+	.8byte	.LBE52
+	.8byte	.LBB53
+	.8byte	.LBE53
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB54
+	.8byte	.LBE54
+	.8byte	.LBB58
+	.8byte	.LBE58
+	.8byte	.LBB59
+	.8byte	.LBE59
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB256
+	.8byte	.LFE256
+	.8byte	.LFB257
+	.8byte	.LFE257
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF416:
+	.string	"test_pattern"
+.LASF399:
+	.string	"puts"
+.LASF64:
+	.string	"reserved"
+.LASF470:
+	.string	"__func__"
+.LASF464:
+	.string	"target_freq"
+.LASF138:
+	.string	"bootm_headers"
+.LASF227:
+	.string	"UCLASS_RAMDISK"
+.LASF156:
+	.string	"rd_end"
+.LASF318:
+	.string	"eth_device"
+.LASF452:
+	.string	"test_banks"
+.LASF127:
+	.string	"ih_comp"
+.LASF23:
+	.string	"_Bool"
+.LASF334:
+	.string	"net_root_path"
+.LASF445:
+	.string	"cmdtp"
+.LASF365:
+	.string	"unbind"
+.LASF145:
+	.string	"fit_noffset_os"
+.LASF35:
+	.string	"priv"
+.LASF486:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF22:
+	.string	"___strtok"
+.LASF234:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF431:
+	.string	"capacity"
+.LASF279:
+	.string	"ram_size"
+.LASF332:
+	.string	"net_nis_domain"
+.LASF438:
+	.string	"diagonalscan"
+.LASF36:
+	.string	"uclass"
+.LASF185:
+	.string	"UCLASS_CODEC"
+.LASF47:
+	.string	"next"
+.LASF375:
+	.string	"length"
+.LASF381:
+	.string	"uc_drv"
+.LASF181:
+	.string	"UCLASS_AHCI"
+.LASF195:
+	.string	"UCLASS_I2C_MUX"
+.LASF168:
+	.string	"uclass_id"
+.LASF491:
+	.string	"cpu_2_io"
+.LASF330:
+	.string	"net_netmask"
+.LASF101:
+	.string	"CMD_RET_FAILURE"
+.LASF148:
+	.string	"fit_noffset_rd"
+.LASF228:
+	.string	"UCLASS_RTC"
+.LASF67:
+	.string	"bi_memsize"
+.LASF68:
+	.string	"bi_flashstart"
+.LASF369:
+	.string	"child_post_remove"
+.LASF323:
+	.string	"recv"
+.LASF153:
+	.string	"fit_uname_setup"
+.LASF481:
+	.string	"rockchip_ddrclk_sip_round_rate_v2"
+.LASF235:
+	.string	"UCLASS_SYSCON"
+.LASF187:
+	.string	"UCLASS_DISPLAY"
+.LASF268:
+	.string	"global_data"
+.LASF92:
+	.string	"IRQ_STACK_START_IN"
+.LASF84:
+	.string	"bi_dram"
+.LASF226:
+	.string	"UCLASS_RKNAND"
+.LASF297:
+	.string	"malloc_ptr"
+.LASF193:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF177:
+	.string	"UCLASS_PCI_EMUL"
+.LASF417:
+	.string	"test_pat_param"
+.LASF103:
+	.string	"fdt_header"
+.LASF292:
+	.string	"env_buf"
+.LASF418:
+	.string	"_u_boot_list_2_cmd_2_ddr_test"
+.LASF106:
+	.string	"off_dt_struct"
+.LASF405:
+	.string	"console_devices"
+.LASF353:
+	.string	"NETLOOP_CONTINUE"
+.LASF231:
+	.string	"UCLASS_SPI"
+.LASF473:
+	.string	"memcpy"
+.LASF245:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF243:
+	.string	"UCLASS_VIDEO"
+.LASF357:
+	.string	"net_state"
+.LASF487:
+	.string	"cmd/ddr_tool/ddr_test_code.c"
+.LASF287:
+	.string	"uclass_root"
+.LASF86:
+	.string	"IRQ_STACK_START"
+.LASF163:
+	.string	"verify"
+.LASF354:
+	.string	"NETLOOP_RESTART"
+.LASF453:
+	.string	"abort"
+.LASF406:
+	.string	"cd_count"
+.LASF371:
+	.string	"platdata_auto_alloc_size"
+.LASF317:
+	.string	"s_addr"
+.LASF450:
+	.string	"err_case"
+.LASF167:
+	.string	"command_ret_t"
+.LASF236:
+	.string	"UCLASS_SYSRESET"
+.LASF169:
+	.string	"UCLASS_ROOT"
+.LASF301:
+	.string	"pm_ctx_phys"
+.LASF186:
+	.string	"UCLASS_CROS_EC"
+.LASF463:
+	.string	"delta_freq"
+.LASF326:
+	.string	"index"
+.LASF458:
+	.string	"freq"
+.LASF94:
+	.string	"maxargs"
+.LASF121:
+	.string	"ih_load"
+.LASF249:
+	.string	"UCLASS_KEY"
+.LASF408:
+	.string	"SCANFREQ"
+.LASF88:
+	.string	"_datarel_start_ofs"
+.LASF271:
+	.string	"pci_clk"
+.LASF180:
+	.string	"UCLASS_ADC"
+.LASF366:
+	.string	"ofdata_to_platdata"
+.LASF125:
+	.string	"ih_arch"
+.LASF309:
+	.string	"gd_t"
+.LASF198:
+	.string	"UCLASS_IRQ"
+.LASF5:
+	.string	"__u8"
+.LASF329:
+	.string	"net_gateway"
+.LASF351:
+	.string	"net_ping_ip"
+.LASF135:
+	.string	"type"
+.LASF465:
+	.string	"get_test_addr"
+.LASF61:
+	.string	"lmb_region"
+.LASF423:
+	.string	"wr_val"
+.LASF55:
+	.string	"protect"
+.LASF260:
+	.string	"tlb_addr"
+.LASF426:
+	.string	"print_memory"
+.LASF439:
+	.string	"next_adr"
+.LASF39:
+	.string	"uclass_node"
+.LASF171:
+	.string	"UCLASS_TEST"
+.LASF350:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF24:
+	.string	"image_base"
+.LASF141:
+	.string	"legacy_hdr_valid"
+.LASF239:
+	.string	"UCLASS_TPM"
+.LASF100:
+	.string	"CMD_RET_SUCCESS"
+.LASF397:
+	.string	"stop"
+.LASF204:
+	.string	"UCLASS_MISC"
+.LASF52:
+	.string	"sector_count"
+.LASF263:
+	.string	"tlb_emerg"
+.LASF434:
+	.string	"err_addr"
+.LASF93:
+	.string	"cmd_tbl_s"
+.LASF99:
+	.string	"cmd_tbl_t"
+.LASF266:
+	.string	"baudrate"
+.LASF358:
+	.string	"mem_malloc_start"
+.LASF246:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF79:
+	.string	"bi_ethspeed"
+.LASF129:
+	.string	"image_header_t"
+.LASF382:
+	.string	"dev_head"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF126:
+	.string	"ih_type"
+.LASF0:
+	.string	"unsigned char"
+.LASF409:
+	.string	"RANDOM"
+.LASF140:
+	.string	"legacy_hdr_os_copy"
+.LASF477:
+	.string	"uclass_get_device"
+.LASF211:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF270:
+	.string	"bus_clk"
+.LASF173:
+	.string	"UCLASS_TEST_BUS"
+.LASF73:
+	.string	"bi_arm_freq"
+.LASF200:
+	.string	"UCLASS_LED"
+.LASF379:
+	.string	"p_current"
+.LASF342:
+	.string	"net_rx_packet_len"
+.LASF344:
+	.string	"net_null_ethaddr"
+.LASF53:
+	.string	"flash_id"
+.LASF313:
+	.string	"load_addr"
+.LASF424:
+	.string	"reread"
+.LASF321:
+	.string	"init"
+.LASF251:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF437:
+	.string	"cmp_value"
+.LASF178:
+	.string	"UCLASS_USB_EMUL"
+.LASF363:
+	.string	"probe"
+.LASF378:
+	.string	"ofnode"
+.LASF269:
+	.string	"cpu_clk"
+.LASF308:
+	.string	"sibling"
+.LASF265:
+	.string	"using_pre_serial"
+.LASF217:
+	.string	"UCLASS_PINCTRL"
+.LASF115:
+	.string	"fdt32_t"
+.LASF376:
+	.string	"value"
+.LASF247:
+	.string	"UCLASS_WDT"
+.LASF440:
+	.string	"page_size"
+.LASF132:
+	.string	"image_len"
+.LASF280:
+	.string	"mon_len"
+.LASF63:
+	.string	"memory"
+.LASF492:
+	.string	"exit"
+.LASF241:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF248:
+	.string	"UCLASS_FG"
+.LASF451:
+	.string	"test_times"
+.LASF373:
+	.string	"per_child_platdata_auto_alloc_size"
+.LASF469:
+	.string	"shift"
+.LASF21:
+	.string	"errno"
+.LASF51:
+	.string	"size"
+.LASF333:
+	.string	"net_hostname"
+.LASF31:
+	.string	"uclass_platdata"
+.LASF396:
+	.string	"stdio_dev"
+.LASF139:
+	.string	"legacy_hdr_os"
+.LASF131:
+	.string	"image_start"
+.LASF18:
+	.string	"uint8_t"
+.LASF76:
+	.string	"bi_bootflags"
+.LASF118:
+	.string	"ih_hcrc"
+.LASF392:
+	.string	"destroy"
+.LASF461:
+	.string	"max_freq"
+.LASF210:
+	.string	"UCLASS_PANEL"
+.LASF368:
+	.string	"child_pre_probe"
+.LASF257:
+	.string	"timer_rate_hz"
+.LASF33:
+	.string	"driver_data"
+.LASF427:
+	.string	"write_buf_to_ddr"
+.LASF383:
+	.string	"udevice_id"
+.LASF370:
+	.string	"priv_auto_alloc_size"
+.LASF240:
+	.string	"UCLASS_USB"
+.LASF172:
+	.string	"UCLASS_TEST_FDT"
+.LASF327:
+	.string	"eth_current"
+.LASF74:
+	.string	"bi_dsp_freq"
+.LASF4:
+	.string	"uchar"
+.LASF120:
+	.string	"ih_size"
+.LASF267:
+	.string	"addr"
+.LASF175:
+	.string	"UCLASS_SPI_EMUL"
+.LASF256:
+	.string	"arch_global_data"
+.LASF214:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF71:
+	.string	"bi_sramstart"
+.LASF87:
+	.string	"FIQ_STACK_START"
+.LASF389:
+	.string	"pre_probe"
+.LASF319:
+	.string	"enetaddr"
+.LASF216:
+	.string	"UCLASS_PINCONFIG"
+.LASF421:
+	.string	"prt_en"
+.LASF225:
+	.string	"UCLASS_RESET"
+.LASF170:
+	.string	"UCLASS_DEMO"
+.LASF296:
+	.string	"malloc_limit"
+.LASF65:
+	.string	"bd_info"
+.LASF372:
+	.string	"per_child_auto_alloc_size"
+.LASF81:
+	.string	"bi_busfreq"
+.LASF281:
+	.string	"irq_sp"
+.LASF402:
+	.string	"list"
+.LASF182:
+	.string	"UCLASS_BLK"
+.LASF282:
+	.string	"start_addr_sp"
+.LASF337:
+	.string	"net_ip"
+.LASF475:
+	.string	"strict_strtoul"
+.LASF320:
+	.string	"iobase"
+.LASF123:
+	.string	"ih_dcrc"
+.LASF56:
+	.string	"flash_info_t"
+.LASF471:
+	.string	"printf"
+.LASF444:
+	.string	"os_reg"
+.LASF80:
+	.string	"bi_intfreq"
+.LASF314:
+	.string	"save_addr"
+.LASF259:
+	.string	"timer_reset_value"
+.LASF377:
+	.string	"of_offset"
+.LASF201:
+	.string	"UCLASS_LPC"
+.LASF70:
+	.string	"bi_flashoffset"
+.LASF300:
+	.string	"video_bottom"
+.LASF454:
+	.string	"scan_freq_loop"
+.LASF202:
+	.string	"UCLASS_MAILBOX"
+.LASF415:
+	.string	"g_isi_pattern"
+.LASF108:
+	.string	"off_mem_rsvmap"
+.LASF362:
+	.string	"bind"
+.LASF199:
+	.string	"UCLASS_KEYBOARD"
+.LASF206:
+	.string	"UCLASS_MOD_EXP"
+.LASF116:
+	.string	"image_header"
+.LASF110:
+	.string	"last_comp_version"
+.LASF77:
+	.string	"bi_ip_addr"
+.LASF414:
+	.string	"TESTCASSMAX"
+.LASF298:
+	.string	"cur_serial_dev"
+.LASF57:
+	.string	"flash_info"
+.LASF16:
+	.string	"ushort"
+.LASF395:
+	.string	"console_buffer"
+.LASF104:
+	.string	"magic"
+.LASF305:
+	.string	"full_name"
+.LASF472:
+	.string	"memset"
+.LASF331:
+	.string	"net_dns_server"
+.LASF482:
+	.string	"rockchip_ddrclk_sip_set_rate_v2"
+.LASF403:
+	.string	"stdio_devices"
+.LASF462:
+	.string	"times"
+.LASF355:
+	.string	"NETLOOP_SUCCESS"
+.LASF28:
+	.string	"name"
+.LASF264:
+	.string	"pre_serial"
+.LASF90:
+	.string	"_datarellocal_start_ofs"
+.LASF96:
+	.string	"usage"
+.LASF152:
+	.string	"fit_hdr_setup"
+.LASF183:
+	.string	"UCLASS_CLK"
+.LASF41:
+	.string	"sibling_node"
+.LASF160:
+	.string	"initrd_end"
+.LASF310:
+	.string	"monitor_flash_len"
+.LASF398:
+	.string	"putc"
+.LASF360:
+	.string	"mem_malloc_brk"
+.LASF12:
+	.string	"phys_size_t"
+.LASF83:
+	.string	"bi_boot_params"
+.LASF250:
+	.string	"UCLASS_RC"
+.LASF72:
+	.string	"bi_sramsize"
+.LASF293:
+	.string	"timebase_h"
+.LASF294:
+	.string	"timebase_l"
+.LASF13:
+	.string	"sizetype"
+.LASF78:
+	.string	"bi_enetaddr"
+.LASF341:
+	.string	"net_rx_packet"
+.LASF459:
+	.string	"scan_freq"
+.LASF393:
+	.string	"per_device_auto_alloc_size"
+.LASF229:
+	.string	"UCLASS_SCSI"
+.LASF2:
+	.string	"short unsigned int"
+.LASF3:
+	.string	"signed char"
+.LASF339:
+	.string	"net_tx_packet"
+.LASF54:
+	.string	"start"
+.LASF380:
+	.string	"current"
+.LASF412:
+	.string	"FASTTEST"
+.LASF255:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF134:
+	.string	"comp"
+.LASF179:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF286:
+	.string	"dm_root_f"
+.LASF37:
+	.string	"uclass_priv"
+.LASF224:
+	.string	"UCLASS_REMOTEPROC"
+.LASF149:
+	.string	"fit_hdr_fdt"
+.LASF407:
+	.string	"CHANGEFREQ"
+.LASF299:
+	.string	"video_top"
+.LASF343:
+	.string	"net_bcast_ethaddr"
+.LASF164:
+	.string	"state"
+.LASF69:
+	.string	"bi_flashsize"
+.LASF20:
+	.string	"__be32"
+.LASF162:
+	.string	"cmdline_end"
+.LASF38:
+	.string	"parent_priv"
+.LASF340:
+	.string	"net_rx_packets"
+.LASF184:
+	.string	"UCLASS_CPU"
+.LASF277:
+	.string	"ram_top"
+.LASF89:
+	.string	"_datarelrolocal_start_ofs"
+.LASF442:
+	.string	"next_col"
+.LASF348:
+	.string	"net_boot_file_name"
+.LASF391:
+	.string	"pre_remove"
+.LASF324:
+	.string	"halt"
+.LASF117:
+	.string	"ih_magic"
+.LASF285:
+	.string	"dm_root"
+.LASF17:
+	.string	"ulong"
+.LASF62:
+	.string	"region"
+.LASF7:
+	.string	"__u32"
+.LASF338:
+	.string	"net_server_ip"
+.LASF364:
+	.string	"remove"
+.LASF242:
+	.string	"UCLASS_USB_HUB"
+.LASF291:
+	.string	"of_root"
+.LASF91:
+	.string	"_datarelro_start_ofs"
+.LASF367:
+	.string	"child_post_bind"
+.LASF207:
+	.string	"UCLASS_MTD"
+.LASF165:
+	.string	"bootm_headers_t"
+.LASF15:
+	.string	"long int"
+.LASF174:
+	.string	"UCLASS_TEST_PROBE"
+.LASF212:
+	.string	"UCLASS_PCH"
+.LASF213:
+	.string	"UCLASS_PCI"
+.LASF188:
+	.string	"UCLASS_DMA"
+.LASF446:
+	.string	"flag"
+.LASF401:
+	.string	"getc"
+.LASF237:
+	.string	"UCLASS_THERMAL"
+.LASF436:
+	.string	"random_test1"
+.LASF435:
+	.string	"random_test2"
+.LASF456:
+	.string	"set_vdd_logic"
+.LASF449:
+	.string	"test_case"
+.LASF441:
+	.string	"pattern"
+.LASF387:
+	.string	"post_bind"
+.LASF335:
+	.string	"net_ethaddr"
+.LASF316:
+	.string	"in_addr"
+.LASF19:
+	.string	"uint32_t"
+.LASF130:
+	.string	"image_info"
+.LASF119:
+	.string	"ih_time"
+.LASF467:
+	.string	"available"
+.LASF489:
+	.string	"jt_funcs"
+.LASF490:
+	.string	"ofnode_union"
+.LASF474:
+	.string	"strcasecmp"
+.LASF58:
+	.string	"long double"
+.LASF112:
+	.string	"size_dt_strings"
+.LASF137:
+	.string	"image_info_t"
+.LASF302:
+	.string	"serial"
+.LASF443:
+	.string	"get_page_size"
+.LASF1:
+	.string	"long unsigned int"
+.LASF192:
+	.string	"UCLASS_I2C"
+.LASF176:
+	.string	"UCLASS_I2C_EMUL"
+.LASF50:
+	.string	"select_hwpart"
+.LASF346:
+	.string	"net_native_vlan"
+.LASF196:
+	.string	"UCLASS_I2S"
+.LASF336:
+	.string	"net_server_ethaddr"
+.LASF244:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF166:
+	.string	"images"
+.LASF428:
+	.string	"cmp_buf_data"
+.LASF288:
+	.string	"fdt_blob"
+.LASF14:
+	.string	"char"
+.LASF144:
+	.string	"fit_uname_os"
+.LASF143:
+	.string	"fit_hdr_os"
+.LASF476:
+	.string	"ctrlc"
+.LASF400:
+	.string	"tstc"
+.LASF29:
+	.string	"platdata"
+.LASF433:
+	.string	"reread_val"
+.LASF133:
+	.string	"load"
+.LASF352:
+	.string	"net_loop_state"
+.LASF232:
+	.string	"UCLASS_SPMI"
+.LASF230:
+	.string	"UCLASS_SERIAL"
+.LASF429:
+	.string	"random_test"
+.LASF411:
+	.string	"DIAGONALSCAN"
+.LASF215:
+	.string	"UCLASS_PHY"
+.LASF75:
+	.string	"bi_ddr_freq"
+.LASF32:
+	.string	"node"
+.LASF289:
+	.string	"new_fdt"
+.LASF420:
+	.string	"start_adr"
+.LASF136:
+	.string	"arch"
+.LASF274:
+	.string	"have_console"
+.LASF151:
+	.string	"fit_noffset_fdt"
+.LASF147:
+	.string	"fit_uname_rd"
+.LASF98:
+	.string	"complete"
+.LASF261:
+	.string	"tlb_size"
+.LASF146:
+	.string	"fit_hdr_rd"
+.LASF356:
+	.string	"NETLOOP_FAIL"
+.LASF410:
+	.string	"CROSSTALK"
+.LASF191:
+	.string	"UCLASS_FIRMWARE"
+.LASF283:
+	.string	"reloc_off"
+.LASF154:
+	.string	"fit_noffset_setup"
+.LASF359:
+	.string	"mem_malloc_end"
+.LASF220:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF203:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF49:
+	.string	"block_drvr"
+.LASF208:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF485:
+	.string	"malloc"
+.LASF404:
+	.string	"stdio_names"
+.LASF27:
+	.string	"driver"
+.LASF457:
+	.string	"set_ddr_freq"
+.LASF194:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF322:
+	.string	"send"
+.LASF325:
+	.string	"write_hwaddr"
+.LASF483:
+	.string	"rockchip_ddrclk_sip_recalc_rate_v2"
+.LASF275:
+	.string	"env_addr"
+.LASF384:
+	.string	"compatible"
+.LASF290:
+	.string	"fdt_size"
+.LASF272:
+	.string	"mem_clk"
+.LASF25:
+	.string	"_binary_u_boot_bin_start"
+.LASF447:
+	.string	"argc"
+.LASF480:
+	.string	"udelay"
+.LASF85:
+	.string	"bd_t"
+.LASF122:
+	.string	"ih_ep"
+.LASF66:
+	.string	"bi_memstart"
+.LASF306:
+	.string	"properties"
+.LASF448:
+	.string	"argv"
+.LASF150:
+	.string	"fit_uname_fdt"
+.LASF222:
+	.string	"UCLASS_RAM"
+.LASF46:
+	.string	"list_head"
+.LASF388:
+	.string	"pre_unbind"
+.LASF303:
+	.string	"device_node"
+.LASF157:
+	.string	"ft_addr"
+.LASF258:
+	.string	"lastinc"
+.LASF385:
+	.string	"data"
+.LASF311:
+	.string	"__dtb_dt_begin"
+.LASF254:
+	.string	"UCLASS_INVALID"
+.LASF422:
+	.string	"buful"
+.LASF304:
+	.string	"phandle"
+.LASF40:
+	.string	"child_head"
+.LASF60:
+	.string	"base"
+.LASF278:
+	.string	"relocaddr"
+.LASF142:
+	.string	"fit_uname_cfg"
+.LASF161:
+	.string	"cmdline_start"
+.LASF374:
+	.string	"property"
+.LASF455:
+	.string	"do_ddr_test"
+.LASF284:
+	.string	"new_gd"
+.LASF189:
+	.string	"UCLASS_ETH"
+.LASF276:
+	.string	"env_valid"
+.LASF312:
+	.string	"__dtb_dt_spl_begin"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF34:
+	.string	"parent"
+.LASF190:
+	.string	"UCLASS_GPIO"
+.LASF107:
+	.string	"off_dt_strings"
+.LASF432:
+	.string	"wr_value"
+.LASF82:
+	.string	"bi_arch_number"
+.LASF460:
+	.string	"min_freq"
+.LASF44:
+	.string	"ide_bus_offset"
+.LASF273:
+	.string	"fb_base"
+.LASF390:
+	.string	"post_probe"
+.LASF425:
+	.string	"err_adr"
+.LASF95:
+	.string	"repeatable"
+.LASF102:
+	.string	"CMD_RET_USAGE"
+.LASF253:
+	.string	"UCLASS_COUNT"
+.LASF209:
+	.string	"UCLASS_NVME"
+.LASF347:
+	.string	"net_restart_wrap"
+.LASF111:
+	.string	"boot_cpuid_phys"
+.LASF59:
+	.string	"lmb_property"
+.LASF488:
+	.string	"/home/typ/src/u-boot_gerrit/u-boot-ddr"
+.LASF484:
+	.string	"rand"
+.LASF218:
+	.string	"UCLASS_PMIC"
+.LASF361:
+	.string	"of_match"
+.LASF9:
+	.string	"long long int"
+.LASF478:
+	.string	"regulator_get_by_platname"
+.LASF493:
+	.string	"print_available_addr"
+.LASF159:
+	.string	"initrd_start"
+.LASF233:
+	.string	"UCLASS_SPI_FLASH"
+.LASF238:
+	.string	"UCLASS_TIMER"
+.LASF386:
+	.string	"uclass_driver"
+.LASF479:
+	.string	"regulator_set_value"
+.LASF466:
+	.string	"max_bank"
+.LASF30:
+	.string	"parent_platdata"
+.LASF252:
+	.string	"UCLASS_DVFS"
+.LASF45:
+	.string	"udevice"
+.LASF345:
+	.string	"net_our_vlan"
+.LASF419:
+	.string	"buf_len"
+.LASF124:
+	.string	"ih_os"
+.LASF219:
+	.string	"UCLASS_PWM"
+.LASF43:
+	.string	"req_seq"
+.LASF205:
+	.string	"UCLASS_MMC"
+.LASF197:
+	.string	"UCLASS_IDE"
+.LASF315:
+	.string	"save_size"
+.LASF109:
+	.string	"version"
+.LASF26:
+	.string	"_binary_u_boot_bin_end"
+.LASF394:
+	.string	"per_device_platdata_auto_alloc_size"
+.LASF8:
+	.string	"unsigned int"
+.LASF413:
+	.string	"FULLTEST"
+.LASF430:
+	.string	"baseaddr"
+.LASF114:
+	.string	"working_fdt"
+.LASF468:
+	.string	"crosstalk"
+.LASF328:
+	.string	"push_packet"
+.LASF113:
+	.string	"size_dt_struct"
+.LASF128:
+	.string	"ih_name"
+.LASF221:
+	.string	"UCLASS_PWRSEQ"
+.LASF6:
+	.string	"short int"
+.LASF307:
+	.string	"child"
+.LASF262:
+	.string	"tlb_fillptr"
+.LASF97:
+	.string	"help"
+.LASF48:
+	.string	"prev"
+.LASF349:
+	.string	"net_boot_file_size"
+.LASF158:
+	.string	"ft_len"
+.LASF105:
+	.string	"totalsize"
+.LASF295:
+	.string	"malloc_base"
+.LASF223:
+	.string	"UCLASS_REGULATOR"
+.LASF42:
+	.string	"flags"
+.LASF155:
+	.string	"rd_start"
+	.hidden	malloc
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits

commit bdd65000c036791b7594d5484e0131bf34078f33
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Dec 6 10:02:20 2018 +0800

    common: bootm: test cmdtp is NULL or not before use it
    
    Test cmdtp is NULL or not before use it. If not and the image is
    incorrect, then the error occur:
    "Synchronous Abort" handler, esr 0x96000010
    * Relocate offset = 0000000007911000
    * ELR(PC)    =   00000000006148f8
    * LR         =   00000000006148f8
    * SP         =   0000000005b020d0
    
    * ESR_EL2    =   0000000096000010
            EC[31:26] == 100101, Exception from a Data abort,
                         from current exception level
            IL[25] == 1, 32-bit instruction trapped
    
    * DAIF       =   00000000000003c0
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 1, IRQ masked
            F[6] == 1, FIQ masked
    
    * SPSR_EL2   =   00000000000003c9
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 1, IRQ masked
            F[6] == 1, FIQ masked
            M[4] == 0, Exception taken from AArch64
            M[3:0] == 1001, EL2h
    
    * SCTLR_EL2  =   0000000030c51835
            I[12] == 1, Icaches enabled
            C[2] == 1, Dcache enabled
    
    Change-Id: I367051e8e91a1b6fee957390af79980bfd5e5916
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 2863bcaa67..08bb5b7b91 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -878,8 +878,9 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 			*os_len = image_get_data_size(hdr);
 			break;
 		default:
-			printf("Wrong Image Type for %s command\n",
-			       cmdtp->name);
+			if (cmdtp)
+				printf("Wrong Image Type for %s command\n",
+				       cmdtp->name);
 			bootstage_error(BOOTSTAGE_ID_CHECK_IMAGETYPE);
 			return NULL;
 		}
@@ -923,7 +924,9 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 		break;
 #endif
 	default:
-		printf("Wrong Image Format for %s command\n", cmdtp->name);
+		if (cmdtp)
+			printf("Wrong Image Format for %s command\n",
+			       cmdtp->name);
 		bootstage_error(BOOTSTAGE_ID_FIT_KERNEL_INFO);
 		return NULL;
 	}

commit 7cacd0a8516f2e79a1c4e40e194eae58a9777655
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 20:17:40 2018 +0800

    video/drm: panel/phy code style clean up and fixes
    
    Silence debug messages if the panel/phy does not exist.
    
    Change-Id: Ifa027017e9aa9af54992e26f2bbde7048b22bb04
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index e03738a97a..46f4d98514 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -119,9 +119,6 @@ static int get_public_phy(struct display_state *state,
 			return 0;
 		}
 
-		conn_state->phy_dev = dev;
-		conn_state->phy_node = dev->node;
-
 		ret = rockchip_phy_init(phy);
 		if (ret) {
 			printf("failed to init phy driver\n");
@@ -130,7 +127,6 @@ static int get_public_phy(struct display_state *state,
 		conn_state->phy = phy;
 
 		printf("inno hdmi phy init success, save it\n");
-		data->phy_node = ofnode_to_offset(conn_state->phy_node);
 		data->phy_drv = conn_state->phy;
 		data->phy_init = true;
 		return 0;
@@ -175,9 +171,7 @@ static int connector_phy_init(struct display_state *state,
 			      struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_phy *phy;
-	struct udevice *dev;
-	int ret, type;
+	int type;
 
 	/* does this connector use public phy with others */
 	type = check_public_use_phy(state);
@@ -195,39 +189,10 @@ static int connector_phy_init(struct display_state *state,
 		}
 
 		/* if this phy has been initialized, get it directly */
-		conn_state->phy_node = offset_to_ofnode(data->phy_node);
 		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
 		return 0;
 	}
 
-	/*
-	 * if this connector don't use the same phy with others,
-	 * just get phy as original method.
-	 */
-	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
-					   &dev);
-	if (ret) {
-		printf("Warn: can't find phy driver\n");
-		return 0;
-	}
-
-	phy = (struct rockchip_phy *)dev_get_driver_data(dev);
-	if (!phy) {
-		printf("failed to find phy driver\n");
-		return 0;
-	}
-
-	conn_state->phy_dev = dev;
-	conn_state->phy_node = dev->node;
-
-	ret = rockchip_phy_init(phy);
-	if (ret) {
-		printf("failed to init phy driver\n");
-		return ret;
-	}
-
-	conn_state->phy = phy;
-
 	return 0;
 }
 
@@ -242,14 +207,6 @@ static int connector_panel_init(struct display_state *state)
 	if (!panel)
 		return 0;
 
-	if (panel->funcs && panel->funcs->init) {
-		ret = panel->funcs->init(state);
-		if (ret) {
-			printf("failed to init panel driver\n");
-			return ret;
-		}
-	}
-
 	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
 		debug("%s can not find dsp-lut node\n", __func__);
@@ -514,7 +471,6 @@ static int display_get_timing(struct display_state *state)
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_panel *panel = panel_state->panel;
-	int ret;
 
 	if (dev_of_valid(panel->dev) &&
 	    !display_get_timing_from_dts(panel_state, mode)) {
@@ -532,24 +488,12 @@ static int display_get_timing(struct display_state *state)
 	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
 		int panel_bits_per_colourp;
 
-		/* In order to read EDID, the panel needs to be powered on */
-		if (panel->funcs->prepare) {
-			ret = panel->funcs->prepare(state);
-			if (ret) {
-				printf("failed to prepare panel\n");
-				return ret;
-			}
-		}
-
 		if (!edid_get_drm_mode((void *)&conn_state->edid,
 				     sizeof(conn_state->edid), mode,
 				     &panel_bits_per_colourp)) {
 			printf("Using display timing from edid\n");
 			edid_print_info((void *)&conn_state->edid);
 			goto done;
-		} else {
-			if (panel->funcs->unprepare)
-				panel->funcs->unprepare(state);
 		}
 	}
 
@@ -596,11 +540,18 @@ static int display_init(struct display_state *state)
 		return -ENXIO;
 	}
 
+	if (panel_state->panel)
+		rockchip_panel_init(panel_state->panel);
+
 	if (conn_funcs->init) {
 		ret = conn_funcs->init(state);
 		if (ret)
 			goto deinit;
 	}
+
+	if (conn_state->phy)
+		rockchip_phy_init(conn_state->phy);
+
 	/*
 	 * support hotplug, but not connect;
 	 */
@@ -700,58 +651,6 @@ static int display_set_plane(struct display_state *state)
 	return 0;
 }
 
-static int display_panel_prepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->prepare) {
-		printf("%s: failed to find panel prepare funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	return panel->funcs->prepare(state);
-}
-
-static int display_panel_enable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->enable) {
-		printf("%s: failed to find panel enable funcs\n", __func__);
-		return -ENODEV;
-	}
-
-	return panel->funcs->enable(state);
-}
-
-static void display_panel_unprepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
-		printf("%s: failed to find panel unprepare funcs\n", __func__);
-		return;
-	}
-
-	panel->funcs->unprepare(state);
-}
-
-static void display_panel_disable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-
-	if (!panel || !panel->funcs || !panel->funcs->disable) {
-		printf("%s: failed to find panel disable funcs\n", __func__);
-		return;
-	}
-
-	panel->funcs->disable(state);
-}
-
 static int display_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -760,6 +659,7 @@ static int display_enable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
 	int ret = 0;
 
 	display_init(state);
@@ -785,7 +685,8 @@ static int display_enable(struct display_state *state)
 	if (conn_state->bridge)
 		rockchip_bridge_pre_enable(conn_state->bridge);
 
-	display_panel_prepare(state);
+	if (panel_state->panel)
+		rockchip_panel_prepare(panel_state->panel);
 
 	if (crtc_funcs->enable) {
 		ret = crtc_funcs->enable(state);
@@ -802,7 +703,8 @@ static int display_enable(struct display_state *state)
 	if (conn_state->bridge)
 		rockchip_bridge_enable(conn_state->bridge);
 
-	display_panel_enable(state);
+	if (panel_state->panel)
+		rockchip_panel_enable(panel_state->panel);
 
 	state->is_enable = true;
 	return 0;
@@ -827,6 +729,7 @@ static int display_disable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
 
 	if (!state->is_init)
 		return 0;
@@ -834,7 +737,8 @@ static int display_disable(struct display_state *state)
 	if (!state->is_enable)
 		return 0;
 
-	display_panel_disable(state);
+	if (panel_state->panel)
+		rockchip_panel_disable(panel_state->panel);
 
 	if (conn_state->bridge)
 		rockchip_bridge_disable(conn_state->bridge);
@@ -845,7 +749,8 @@ static int display_disable(struct display_state *state)
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
 
-	display_panel_unprepare(state);
+	if (panel_state->panel)
+		rockchip_panel_unprepare(panel_state->panel);
 
 	if (conn_state->bridge)
 		rockchip_bridge_post_disable(conn_state->bridge);
@@ -1337,6 +1242,18 @@ static struct udevice *rockchip_of_find_connector(ofnode endpoint)
 	return dev;
 }
 
+static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
+{
+	struct udevice *phy_dev;
+	int ret;
+
+	ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
+	if (ret)
+		return NULL;
+
+	return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
+}
+
 static int rockchip_display_probe(struct udevice *dev)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -1348,6 +1265,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	const struct rockchip_connector *conn;
 	struct rockchip_panel *panel = NULL;
 	struct rockchip_bridge *bridge = NULL;
+	struct rockchip_phy *phy = NULL;
 	struct display_state *s;
 	const char *name;
 	int ret;
@@ -1412,6 +1330,8 @@ static int rockchip_display_probe(struct udevice *dev)
 
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
 
+		phy = rockchip_of_find_phy(conn_dev);
+
 		bridge = rockchip_of_find_bridge(conn_dev);
 		if (bridge)
 			panel = rockchip_of_find_panel(bridge->dev);
@@ -1447,6 +1367,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->conn_state.node = conn_dev->node;
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
+		s->conn_state.phy = phy;
 		s->conn_state.bridge = bridge;
 		s->conn_state.overscan.left_margin = 100;
 		s->conn_state.overscan.right_margin = 100;
@@ -1461,6 +1382,9 @@ static int rockchip_display_probe(struct udevice *dev)
 		if (bridge)
 			bridge->state = s;
 
+		if (panel)
+			panel->state = s;
+
 		get_crtc_mcu_mode(&s->crtc_state);
 
 		if (connector_panel_init(s)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index e2301b02c2..1c72aa966f 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -103,10 +103,8 @@ struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
 	struct rockchip_bridge *bridge;
-	struct udevice *phy_dev;
 	struct rockchip_phy *phy;
 	ofnode node;
-	ofnode phy_node;
 
 	void *private;
 
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 859a999dff..33e7b3b362 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -251,55 +251,55 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 	return 0;
 }
 
-static int rockchip_panel_prepare(struct display_state *state)
+static void panel_simple_prepare(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
 
 	if (priv->prepared)
-		return 0;
+		return;
 
-	if (priv->power_supply) {
-		ret = regulator_set_enable(priv->power_supply,
-					   !plat->power_invert);
-		if (ret) {
-			printf("%s: failed to enable power supply", __func__);
-			return ret;
-		}
-	}
+	if (priv->power_supply)
+		regulator_set_enable(priv->power_supply, !plat->power_invert);
+
+	if (dm_gpio_is_valid(&priv->enable_gpio))
+		dm_gpio_set_value(&priv->enable_gpio, 1);
 
-	dm_gpio_set_value(&priv->enable_gpio, 1);
-	mdelay(plat->delay.prepare);
+	if (plat->delay.prepare)
+		mdelay(plat->delay.prepare);
 
-	dm_gpio_set_value(&priv->reset_gpio, 1);
-	mdelay(plat->delay.reset);
-	dm_gpio_set_value(&priv->reset_gpio, 0);
+	if (dm_gpio_is_valid(&priv->reset_gpio))
+		dm_gpio_set_value(&priv->reset_gpio, 1);
 
-	mdelay(plat->delay.init);
+	if (plat->delay.reset)
+		mdelay(plat->delay.reset);
+
+	if (dm_gpio_is_valid(&priv->reset_gpio))
+		dm_gpio_set_value(&priv->reset_gpio, 0);
+
+	if (plat->delay.init)
+		mdelay(plat->delay.init);
 
 	if (plat->on_cmds) {
 		if (priv->cmd_type == CMD_TYPE_SPI)
-			ret = rockchip_panel_send_spi_cmds(state,
+			ret = rockchip_panel_send_spi_cmds(panel->state,
 							   plat->on_cmds);
 		else if (priv->cmd_type == CMD_TYPE_MCU)
-			ret = rockchip_panel_send_mcu_cmds(state, plat->on_cmds);
+			ret = rockchip_panel_send_mcu_cmds(panel->state,
+							   plat->on_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(state,
+			ret = rockchip_panel_send_dsi_cmds(panel->state,
 							   plat->on_cmds);
 		if (ret)
 			printf("failed to send on cmds: %d\n", ret);
 	}
 
 	priv->prepared = true;
-
-	return 0;
 }
 
-static void rockchip_panel_unprepare(struct display_state *state)
+static void panel_simple_unprepare(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
@@ -309,55 +309,52 @@ static void rockchip_panel_unprepare(struct display_state *state)
 
 	if (plat->off_cmds) {
 		if (priv->cmd_type == CMD_TYPE_SPI)
-			ret = rockchip_panel_send_spi_cmds(state,
+			ret = rockchip_panel_send_spi_cmds(panel->state,
 							   plat->off_cmds);
 		else if (priv->cmd_type == CMD_TYPE_MCU)
-			ret = rockchip_panel_send_mcu_cmds(state,
+			ret = rockchip_panel_send_mcu_cmds(panel->state,
 							   plat->off_cmds);
 		else
-			ret = rockchip_panel_send_dsi_cmds(state,
+			ret = rockchip_panel_send_dsi_cmds(panel->state,
 							   plat->off_cmds);
 		if (ret)
 			printf("failed to send off cmds: %d\n", ret);
 	}
 
-	dm_gpio_set_value(&priv->reset_gpio, 1);
-	dm_gpio_set_value(&priv->enable_gpio, 0);
+	if (dm_gpio_is_valid(&priv->reset_gpio))
+		dm_gpio_set_value(&priv->reset_gpio, 1);
 
-	if (priv->power_supply) {
-		ret = regulator_set_enable(priv->power_supply,
-					   plat->power_invert);
-		if (ret)
-			printf("%s: failed to disable power supply", __func__);
-	}
+	if (dm_gpio_is_valid(&priv->enable_gpio))
+		dm_gpio_set_value(&priv->enable_gpio, 0);
 
-	mdelay(plat->delay.unprepare);
+	if (priv->power_supply)
+		regulator_set_enable(priv->power_supply, plat->power_invert);
+
+	if (plat->delay.unprepare)
+		mdelay(plat->delay.unprepare);
 
 	priv->prepared = false;
 }
 
-static int rockchip_panel_enable(struct display_state *state)
+static void panel_simple_enable(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
 	if (priv->enabled)
-		return 0;
+		return;
 
-	mdelay(plat->delay.enable);
+	if (plat->delay.enable)
+		mdelay(plat->delay.enable);
 
 	if (priv->backlight)
 		backlight_enable(priv->backlight);
 
 	priv->enabled = true;
-
-	return 0;
 }
 
-static void rockchip_panel_disable(struct display_state *state)
+static void panel_simple_disable(struct rockchip_panel *panel)
 {
-	struct rockchip_panel *panel = state_get_panel(state);
 	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
 	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
@@ -367,27 +364,26 @@ static void rockchip_panel_disable(struct display_state *state)
 	if (priv->backlight)
 		backlight_disable(priv->backlight);
 
-	mdelay(plat->delay.disable);
+	if (plat->delay.disable)
+		mdelay(plat->delay.disable);
 
 	priv->enabled = false;
 }
 
-static int rockchip_panel_init(struct display_state *state)
+static void panel_simple_init(struct rockchip_panel *panel)
 {
+	struct display_state *state = panel->state;
 	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_panel *panel = state_get_panel(state);
 
 	conn_state->bus_format = panel->bus_format;
-
-	return 0;
 }
 
 static const struct rockchip_panel_funcs rockchip_panel_funcs = {
-	.init = rockchip_panel_init,
-	.prepare = rockchip_panel_prepare,
-	.unprepare = rockchip_panel_unprepare,
-	.enable = rockchip_panel_enable,
-	.disable = rockchip_panel_disable,
+	.init = panel_simple_init,
+	.prepare = panel_simple_prepare,
+	.unprepare = panel_simple_unprepare,
+	.enable = panel_simple_enable,
+	.disable = panel_simple_disable,
 };
 
 static int rockchip_panel_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index e8aab0a5d4..d4d5ef113a 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -8,14 +8,14 @@
 #define _ROCKCHIP_PANEL_H_
 
 struct display_state;
+struct rockchip_panel;
 
 struct rockchip_panel_funcs {
-	int (*init)(struct display_state *state);
-	void (*deinit)(struct display_state *state);
-	int (*prepare)(struct display_state *state);
-	void (*unprepare)(struct display_state *state);
-	int (*enable)(struct display_state *state);
-	void (*disable)(struct display_state *state);
+	void (*init)(struct rockchip_panel *panel);
+	void (*prepare)(struct rockchip_panel *panel);
+	void (*unprepare)(struct rockchip_panel *panel);
+	void (*enable)(struct rockchip_panel *panel);
+	void (*disable)(struct rockchip_panel *panel);
 };
 
 struct rockchip_panel {
@@ -23,6 +23,53 @@ struct rockchip_panel {
 	u32 bus_format;
 	const struct rockchip_panel_funcs *funcs;
 	const void *data;
+
+	struct display_state *state;
 };
 
+static inline void rockchip_panel_init(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->init)
+		panel->funcs->init(panel);
+}
+
+static inline void rockchip_panel_prepare(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->prepare)
+		panel->funcs->prepare(panel);
+}
+
+static inline void rockchip_panel_enable(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->enable)
+		panel->funcs->enable(panel);
+}
+
+static inline void rockchip_panel_unprepare(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->unprepare)
+		panel->funcs->unprepare(panel);
+}
+
+static inline void rockchip_panel_disable(struct rockchip_panel *panel)
+{
+	if (!panel)
+		return;
+
+	if (panel->funcs && panel->funcs->disable)
+		panel->funcs->disable(panel);
+}
+
 #endif	/* _ROCKCHIP_PANEL_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 9609f8c2ac..b92511e8db 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -12,7 +12,7 @@ int rockchip_phy_init(struct rockchip_phy *phy)
 	if (!phy)
 		return -ENODEV;
 
-	if (phy->funcs || phy->funcs->init)
+	if (phy->funcs && phy->funcs->init)
 		return phy->funcs->init(phy);
 
 	return 0;
@@ -23,7 +23,7 @@ int rockchip_phy_power_on(struct rockchip_phy *phy)
 	if (!phy)
 		return -ENODEV;
 
-	if (phy->funcs || phy->funcs->power_on)
+	if (phy->funcs && phy->funcs->power_on)
 		return phy->funcs->power_on(phy);
 
 	return 0;

commit fa36e9fb107f4bc1d2c9504555d1f7b81745d898
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 15:54:18 2018 +0800

    configs: px30: enable CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345
    
    Change-Id: I9ca5e9db2c9ea8f9692b72fb69a1fa4d2e868aca
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 6fc0641ea1..7fea0317d0 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -105,6 +105,7 @@ CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_RK618=y
+CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit c52351ffbe8d698997ed6d1eaedc72399a017ebb
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 20:29:11 2018 +0800

    video/bridge: anx6345: Convert to rockchip_bridge
    
    Use the rockchip_bridge_funcs instead of the video_bridge_ops so that
    anx6345 device can work on the rockchip platform.
    
    Change-Id: I3ded401816ba8347bddfedcae8aacab4667df2af
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/anx98xx-edp.h b/drivers/video/anx98xx-edp.h
index f7e8baa167..b6c21a399d 100644
--- a/drivers/video/anx98xx-edp.h
+++ b/drivers/video/anx98xx-edp.h
@@ -83,6 +83,7 @@
 
 #define ANX9804_VID_CTRL1_REG					0x08
 #define ANX9804_VID_CTRL1_VID_EN				BIT(7)
+#define ANX9804_VID_CTRL1_DDR_CTRL				BIT(1)
 #define ANX9804_VID_CTRL1_EDGE					BIT(0)
 
 #define ANX9804_VID_CTRL2_REG					0x09
diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c
index 0a94affb9f..5b12720b23 100644
--- a/drivers/video/bridge/anx6345.c
+++ b/drivers/video/bridge/anx6345.c
@@ -11,6 +11,7 @@
 #include <edid.h>
 #include <video_bridge.h>
 #include "../anx98xx-edp.h"
+#include "../drm/rockchip_bridge.h"
 
 #define DP_MAX_LINK_RATE		0x001
 #define DP_MAX_LANE_COUNT		0x002
@@ -19,6 +20,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct anx6345_priv {
+	u8 chipid;
 	u8 edid[EDID_SIZE];
 };
 
@@ -254,6 +256,13 @@ static int anx6345_read_dpcd(struct udevice *dev, u32 reg, u8 *val)
 static int anx6345_read_edid(struct udevice *dev, u8 *buf, int size)
 {
 	struct anx6345_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid);
+	if (ret < 0) {
+		dev_err(dev, "failed to get edid\n");
+		return ret;
+	}
 
 	if (size > EDID_SIZE)
 		size = EDID_SIZE;
@@ -268,12 +277,11 @@ static int anx6345_attach(struct udevice *dev)
 	return 0;
 }
 
-static int anx6345_enable(struct udevice *dev)
+static int anx6345_init(struct udevice *dev)
 {
-	u8 chipid, colordepth, lanes, data_rate, c;
-	int ret, i, bpp;
-	struct display_timing timing;
 	struct anx6345_priv *priv = dev_get_priv(dev);
+	u8 c;
+	int ret, i;
 
 	/* Deassert reset and enable power */
 	ret = video_bridge_set_active(dev, true);
@@ -288,16 +296,16 @@ static int anx6345_enable(struct udevice *dev)
 	/* Write 0 to the powerdown reg (powerup everything) */
 	anx6345_write_r1(dev, ANX9804_POWERD_CTRL_REG, 0);
 
-	ret = anx6345_read_r1(dev, ANX9804_DEV_IDH_REG, &chipid);
+	ret = anx6345_read_r1(dev, ANX9804_DEV_IDH_REG, &priv->chipid);
 	if (ret)
 		debug("%s: read id failed: %d\n", __func__, ret);
 
-	switch (chipid) {
+	switch (priv->chipid) {
 	case 0x63:
 		debug("ANX63xx detected.\n");
 		break;
 	default:
-		debug("Error anx6345 chipid mismatch: %.2x\n", (int)chipid);
+		debug("Error anx6345 chipid mismatch: %.2x\n", priv->chipid);
 		return -ENODEV;
 	}
 
@@ -339,7 +347,16 @@ static int anx6345_enable(struct udevice *dev)
 	anx6345_write_r0(dev, ANX9804_HDCP_CONTROL_0_REG, 0x00);
 	anx6345_write_r0(dev, 0xa7, 0x00);
 
-	anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid);
+	return 0;
+}
+
+static int anx6345_enable(struct udevice *dev)
+{
+	u8 colordepth, lanes, data_rate, c;
+	int i, bpp;
+	struct display_timing timing;
+	struct anx6345_priv *priv = dev_get_priv(dev);
+
 	if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) {
 		debug("Failed to parse EDID\n");
 		return -EIO;
@@ -374,7 +391,7 @@ static int anx6345_enable(struct udevice *dev)
 	mdelay(5);
 	for (i = 0; i < 100; i++) {
 		anx6345_read_r0(dev, ANX9804_LINK_TRAINING_CTRL_REG, &c);
-		if ((chipid == 0x63) && (c & 0x80) == 0)
+		if ((priv->chipid == 0x63) && (c & 0x80) == 0)
 			break;
 
 		mdelay(5);
@@ -385,8 +402,8 @@ static int anx6345_enable(struct udevice *dev)
 	}
 
 	/* Enable */
-	anx6345_write_r1(dev, ANX9804_VID_CTRL1_REG,
-			 ANX9804_VID_CTRL1_VID_EN | ANX9804_VID_CTRL1_EDGE);
+	anx6345_write_r1(dev, ANX9804_VID_CTRL1_REG, ANX9804_VID_CTRL1_VID_EN |
+			 ANX9804_VID_CTRL1_DDR_CTRL | ANX9804_VID_CTRL1_EDGE);
 	/* Force stream valid */
 	anx6345_write_r0(dev, ANX9804_SYS_CTRL3_REG,
 			 ANX9804_SYS_CTRL3_F_HPD |
@@ -399,20 +416,40 @@ static int anx6345_enable(struct udevice *dev)
 
 static int anx6345_probe(struct udevice *dev)
 {
+	struct rockchip_bridge *bridge =
+		(struct rockchip_bridge *)dev_get_driver_data(dev);
+
 	if (device_get_uclass_id(dev->parent) != UCLASS_I2C)
 		return -EPROTONOSUPPORT;
 
-	return anx6345_enable(dev);
+	bridge->dev = dev;
+
+	return anx6345_init(dev);
 }
 
-struct video_bridge_ops anx6345_ops = {
+static const struct video_bridge_ops anx6345_ops = {
 	.attach = anx6345_attach,
 	.set_backlight = anx6345_set_backlight,
 	.read_edid = anx6345_read_edid,
 };
 
+static void anx6345_bridge_enable(struct rockchip_bridge *bridge)
+{
+	anx6345_enable(bridge->dev);
+}
+
+static const struct rockchip_bridge_funcs anx6345_bridge_funcs = {
+	.enable = anx6345_bridge_enable,
+};
+
+static struct rockchip_bridge anx6345_driver_data = {
+	.funcs = &anx6345_bridge_funcs,
+};
+
 static const struct udevice_id anx6345_ids[] = {
-	{ .compatible = "analogix,anx6345", },
+	{
+		.compatible = "analogix,anx6345",
+		.data = (ulong)&anx6345_driver_data, },
 	{ }
 };
 

commit a4878dda5ec2c73fc57bf90e2c44c6bf3c471010
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 15:55:28 2018 +0800

    video/drm: rgb: Allow to configure data sync from DT
    
    Change-Id: I2e83a7ed7e2d74a23b74301c57899a9e763ca1bf
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 9d58987124..424b0986cd 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -32,6 +32,7 @@ struct rockchip_rgb_funcs {
 
 struct rockchip_rgb {
 	struct regmap *grf;
+	bool data_sync;
 	const struct rockchip_rgb_funcs *funcs;
 };
 
@@ -102,27 +103,19 @@ static int rockchip_rgb_probe(struct udevice *dev)
 
 	rgb->funcs = connector->data;
 	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
+	rgb->data_sync = dev_read_bool(dev, "rockchip,data-sync");
 
 	return 0;
 }
 
 static void px30_rgb_enable(struct rockchip_rgb *rgb, int pipe)
 {
-	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-		     PX30_RGB_VOP_SEL(pipe));
-	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-		     PX30_RGB_DATA_SYNC_BYPASS(1));
-}
-
-static void px30_rgb_disable(struct rockchip_rgb *rgb)
-{
-	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
-		     PX30_RGB_DATA_SYNC_BYPASS(0));
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1, PX30_RGB_VOP_SEL(pipe) |
+		     PX30_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
 }
 
 static const struct rockchip_rgb_funcs px30_rgb_funcs = {
 	.enable = px30_rgb_enable,
-	.disable = px30_rgb_disable,
 };
 
 static const struct rockchip_connector px30_rgb_driver_data = {
@@ -133,18 +126,11 @@ static const struct rockchip_connector px30_rgb_driver_data = {
 static void rk1808_rgb_enable(struct rockchip_rgb *rgb, int pipe)
 {
 	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
-		     RK1808_RGB_DATA_SYNC_BYPASS(1));
-}
-
-static void rk1808_rgb_disable(struct rockchip_rgb *rgb)
-{
-	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
-		     RK1808_RGB_DATA_SYNC_BYPASS(0));
+		     RK1808_RGB_DATA_SYNC_BYPASS(!rgb->data_sync));
 }
 
 static const struct rockchip_rgb_funcs rk1808_rgb_funcs = {
 	.enable = rk1808_rgb_enable,
-	.disable = rk1808_rgb_disable,
 };
 
 static const struct rockchip_connector rk1808_rgb_driver_data = {

commit d71853e78848410e8084c9d67df52dcdbd51777c
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 09:47:12 2018 +0800

    configs: evb-px30: enable CONFIG_DRM_ROCKCHIP_RK618
    
    Change-Id: Ic21c8aaf735129b02fc2270cdb5057db382f6092
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 5ef64e2c0c..6fc0641ea1 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -104,6 +104,7 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_DRM_ROCKCHIP_RK618=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 117fdc8998f55907f022765031d3a64fabd01ef0
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Jul 26 17:25:57 2018 +0800

    video/drm: Add support for rk618
    
    RK618 is a partner chip for Rockchip mobile application processor.
    
    RK618 includes two RGB display input interface with double data rate.
    With the internal MUX function, it can output 1080P HDMI signal to
    TV and output RGB/LVDS/MIPI signal to TFT panel. In this case, RK618
    can support dual panel (TV and TFT) display.
    
    Change-Id: I566b161211e6662f73e5de2b14fb20b33e8e57ef
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 4365815e45..6f071f8cb1 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -71,6 +71,15 @@ config DRM_ROCKCHIP_RGB
 	  Choose this option to enable support for Rockchip RGB driver.
 	  say Y to enable its driver.
 
+config DRM_ROCKCHIP_RK618
+	bool "Rockchip RK618 display bridge driver"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	select VIDEO_BRIDGE
+	help
+	  Choose this option to enable support for Rockchip RK618 display
+	  bridge chips driver. say Y to enable its driver.
+
 config ROCKCHIP_DRM_TVE
 	bool "Rockchip TVE Support"
 	depends on DRM_ROCKCHIP
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index eb647ebc11..c91f46967a 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618.o rk618_lvds.o
diff --git a/drivers/video/drm/rk618.c b/drivers/video/drm/rk618.c
new file mode 100644
index 0000000000..72d6dbacbc
--- /dev/null
+++ b/drivers/video/drm/rk618.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+
+#include "rk618.h"
+
+int rk618_i2c_write(struct rk618 *rk618, u16 reg, u32 val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk618->dev);
+	struct i2c_msg msg;
+	u8 buf[] = {
+		(reg >> 0) & 0xff, (reg >> 8) & 0xff,
+		(val >> 0) & 0xff, (val >> 8) & 0xff,
+		(val >> 16) & 0xff, (val >> 24) & 0xff
+	};
+	int ret;
+
+	msg.addr = chip->chip_addr;
+	msg.flags = 0;
+	msg.len = sizeof(buf);
+	msg.buf = buf;
+
+	ret = dm_i2c_xfer(rk618->dev, &msg, 1);
+	if (ret) {
+		dev_err(rk618->dev, "Could not execute transfer: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int rk618_i2c_read(struct rk618 *rk618, u16 reg, u32 *val)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(rk618->dev);
+	u32 data;
+	struct i2c_msg msg[] = {
+		{
+			.addr = chip->chip_addr,
+			.flags = 0,
+			.buf = (u8 *)&reg,
+			.len = 2,
+		}, {
+			.addr = chip->chip_addr,
+			.flags = I2C_M_RD,
+			.buf = (u8 *)&data,
+			.len = 4,
+		}
+	};
+	int ret;
+
+	ret = dm_i2c_xfer(rk618->dev, msg, 2);
+	if (ret) {
+		dev_err(rk618->dev, "Could not execute transfer: %d\n", ret);
+		return ret;
+	}
+
+	*val = data;
+
+	return 0;
+}
+
+void rk618_frc_dither_disable(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, RK618_FRC_REG, FRC_DITHER_DISABLE);
+}
+
+void rk618_frc_dither_enable(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, RK618_FRC_REG, FRC_DITHER_ENABLE);
+}
+
+void rk618_frc_dclk_invert(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, RK618_FRC_REG, FRC_DCLK_INV);
+}
+
+static int rk618_power_on(struct rk618 *rk618)
+{
+	if (rk618->power_supply)
+		regulator_set_enable(rk618->power_supply, 1);
+
+	if (dm_gpio_is_valid(&rk618->enable_gpio))
+		dm_gpio_set_value(&rk618->enable_gpio, 1);
+
+	mdelay(2);
+	dm_gpio_set_value(&rk618->reset_gpio, 0);
+	mdelay(4);
+	dm_gpio_set_value(&rk618->reset_gpio, 1);
+	mdelay(50);
+	dm_gpio_set_value(&rk618->reset_gpio, 0);
+
+	return 0;
+}
+
+static void rk618_cru_init(struct rk618 *rk618)
+{
+	rk618_i2c_write(rk618, 0x0058, 0xffff0000);
+	rk618_i2c_write(rk618, 0x005c, 0xffff1d1e);
+	rk618_i2c_write(rk618, 0x0060, 0x00000000);
+	rk618_i2c_write(rk618, 0x0064, 0xffff2186);
+	rk618_i2c_write(rk618, 0x0068, 0xffff1028);
+	rk618_i2c_write(rk618, 0x006c, 0xffff0641);
+	rk618_i2c_write(rk618, 0x0070, 0x00800000);
+	rk618_i2c_write(rk618, 0x0074, 0xffff1028);
+	rk618_i2c_write(rk618, 0x0078, 0xffff0641);
+	rk618_i2c_write(rk618, 0x007c, 0x00800000);
+}
+
+static int rk618_probe(struct udevice *dev)
+{
+	struct rk618 *rk618 = dev_get_priv(dev);
+	int ret;
+
+	rk618->dev = dev;
+
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+					   "power-supply",
+					   &rk618->power_supply);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "Cannot get power supply: %d\n", ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(dev, "enable-gpios", 0,
+				   &rk618->enable_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "Cannot get enable GPIO: %d\n", ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0,
+				   &rk618->reset_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		dev_err(dev, "Cannot get reset GPIO: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_by_name(dev, "clkin", &rk618->clkin);
+	if (ret < 0) {
+		dev_err(dev, "failed to get clkin: %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_set_rate(&rk618->clkin, 12000000);
+	if (ret < 0) {
+		dev_err(dev, "failed to set rate: %d\n", ret);
+		return ret;
+	}
+
+	clk_enable(&rk618->clkin);
+
+	ret = rk618_power_on(rk618);
+	if (ret) {
+		dev_err(dev, "failed to power on: %d\n", ret);
+		return ret;
+	}
+
+	rk618_cru_init(rk618);
+
+	return 0;
+}
+
+static const struct udevice_id rk618_of_match[] = {
+	{ .compatible = "rockchip,rk618" },
+	{}
+};
+
+U_BOOT_DRIVER(rk618) = {
+	.name = "rk618",
+	.id = UCLASS_I2C_GENERIC,
+	.of_match = rk618_of_match,
+	.probe = rk618_probe,
+	.bind = dm_scan_fdt_dev,
+	.priv_auto_alloc_size = sizeof(struct rk618),
+};
diff --git a/drivers/video/drm/rk618.h b/drivers/video/drm/rk618.h
new file mode 100644
index 0000000000..ab93da90b9
--- /dev/null
+++ b/drivers/video/drm/rk618.h
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _RK618_H_
+#define _RK618_H_
+
+#include <clk.h>
+#include <dm/device.h>
+#include <power/regulator.h>
+#include <asm/gpio.h>
+
+#define UPDATE(v, h, l)	(((v) << (l)) & GENMASK((h), (l)))
+#define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK(h, l) << 16))
+
+#define RK618_FRC_REG			0x0054
+#define FRC_DEN_INV			HIWORD_UPDATE(1, 6, 6)
+#define FRC_SYNC_INV			HIWORD_UPDATE(1, 5, 5)
+#define FRC_DCLK_INV			HIWORD_UPDATE(1, 4, 4)
+#define FRC_OUT_ZERO			HIWORD_UPDATE(1, 3, 3)
+#define FRC_OUT_MODE_RGB666		HIWORD_UPDATE(1, 2, 2)
+#define FRC_OUT_MODE_RGB888		HIWORD_UPDATE(0, 2, 2)
+#define FRC_DITHER_MODE_HI_FRC		HIWORD_UPDATE(1, 1, 1)
+#define FRC_DITHER_MODE_FRC		HIWORD_UPDATE(0, 1, 1)
+#define FRC_DITHER_ENABLE		HIWORD_UPDATE(1, 0, 0)
+#define FRC_DITHER_DISABLE		HIWORD_UPDATE(0, 0, 0)
+#define RK618_LVDS_CON			0x0084
+#define LVDS_CON_START_PHASE(x)		HIWORD_UPDATE(x, 14, 14)
+#define LVDS_DCLK_INV			HIWORD_UPDATE(1, 13, 13)
+#define LVDS_CON_CHADS_10PF		HIWORD_UPDATE(3, 12, 11)
+#define LVDS_CON_CHADS_5PF		HIWORD_UPDATE(2, 12, 11)
+#define LVDS_CON_CHADS_7PF		HIWORD_UPDATE(1, 12, 11)
+#define LVDS_CON_CHADS_3PF		HIWORD_UPDATE(0, 12, 11)
+#define LVDS_CON_CHA1TTL_ENABLE		HIWORD_UPDATE(1, 10, 10)
+#define LVDS_CON_CHA1TTL_DISABLE	HIWORD_UPDATE(0, 10, 10)
+#define LVDS_CON_CHA0TTL_ENABLE		HIWORD_UPDATE(1, 9, 9)
+#define LVDS_CON_CHA0TTL_DISABLE	HIWORD_UPDATE(0, 9, 9)
+#define LVDS_CON_CHA1_POWER_UP		HIWORD_UPDATE(1, 8, 8)
+#define LVDS_CON_CHA1_POWER_DOWN	HIWORD_UPDATE(0, 8, 8)
+#define LVDS_CON_CHA0_POWER_UP		HIWORD_UPDATE(1, 7, 7)
+#define LVDS_CON_CHA0_POWER_DOWN	HIWORD_UPDATE(0, 7, 7)
+#define LVDS_CON_CBG_POWER_UP		HIWORD_UPDATE(1, 6, 6)
+#define LVDS_CON_CBG_POWER_DOWN		HIWORD_UPDATE(0, 6, 6)
+#define LVDS_CON_PLL_POWER_DOWN		HIWORD_UPDATE(1, 5, 5)
+#define LVDS_CON_PLL_POWER_UP		HIWORD_UPDATE(0, 5, 5)
+#define LVDS_CON_START_SEL_EVEN_PIXEL	HIWORD_UPDATE(1, 4, 4)
+#define LVDS_CON_START_SEL_ODD_PIXEL	HIWORD_UPDATE(0, 4, 4)
+#define LVDS_CON_CHASEL_DOUBLE_CHANNEL	HIWORD_UPDATE(1, 3, 3)
+#define LVDS_CON_CHASEL_SINGLE_CHANNEL	HIWORD_UPDATE(0, 3, 3)
+#define LVDS_CON_MSBSEL_D7		HIWORD_UPDATE(1, 2, 2)
+#define LVDS_CON_MSBSEL_D0		HIWORD_UPDATE(0, 2, 2)
+#define LVDS_CON_SELECT(x)		HIWORD_UPDATE(x, 1, 0)
+#define LVDS_CON_SELECT_6BIT_MODE	HIWORD_UPDATE(3, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_3	HIWORD_UPDATE(2, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_2	HIWORD_UPDATE(1, 1, 0)
+#define LVDS_CON_SELECT_8BIT_MODE_1	HIWORD_UPDATE(0, 1, 0)
+
+struct rk618 {
+	struct udevice *dev;
+	struct udevice *power_supply;
+	struct gpio_desc enable_gpio;
+	struct gpio_desc reset_gpio;
+	struct clk clkin;
+};
+
+int rk618_i2c_write(struct rk618 *rk618, u16 reg, u32 val);
+int rk618_i2c_read(struct rk618 *rk618, u16 reg, u32 *val);
+void rk618_frc_dither_disable(struct rk618 *rk618);
+void rk618_frc_dither_enable(struct rk618 *rk618);
+void rk618_frc_dclk_invert(struct rk618 *rk618);
+
+#endif
diff --git a/drivers/video/drm/rk618_lvds.c b/drivers/video/drm/rk618_lvds.c
new file mode 100644
index 0000000000..ad1e35979d
--- /dev/null
+++ b/drivers/video/drm/rk618_lvds.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <errno.h>
+#include <i2c.h>
+#include <video_bridge.h>
+#include <linux/media-bus-format.h>
+
+#include "rockchip_display.h"
+#include "rockchip_bridge.h"
+#include "rockchip_panel.h"
+
+#include "rk618.h"
+
+enum {
+	LVDS_8BIT_MODE_FORMAT_1,
+	LVDS_8BIT_MODE_FORMAT_2,
+	LVDS_8BIT_MODE_FORMAT_3,
+	LVDS_6BIT_MODE,
+};
+
+struct rk618_lvds_priv {
+	struct udevice *dev;
+	struct rk618 *parent;
+	bool dual_channel;
+};
+
+static int lvds_write(struct rk618_lvds_priv *priv, u16 reg, u32 val)
+{
+	return rk618_i2c_write(priv->parent, reg, val);
+}
+
+static void rk618_lvds_bridge_enable(struct rockchip_bridge *bridge)
+{
+	struct rk618_lvds_priv *priv = dev_get_priv(bridge->dev);
+	struct rockchip_panel *panel = state_get_panel(bridge->state);
+	u32 value, format;
+
+	rk618_frc_dclk_invert(priv->parent);
+
+	switch (panel->bus_format) {
+	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	/* jeida-18 */
+		format = LVDS_6BIT_MODE;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:	/* jeida-24 */
+		format = LVDS_8BIT_MODE_FORMAT_2;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:	/* vesa-24 */
+		format = LVDS_8BIT_MODE_FORMAT_1;
+		break;
+	default:
+		format = LVDS_8BIT_MODE_FORMAT_3;
+		break;
+	}
+
+	value = LVDS_CON_CHA0TTL_DISABLE | LVDS_CON_CHA1TTL_DISABLE |
+		LVDS_CON_CHA0_POWER_UP | LVDS_CON_CBG_POWER_UP |
+		LVDS_CON_PLL_POWER_UP | LVDS_CON_SELECT(format);
+
+	if (priv->dual_channel)
+		value |= LVDS_CON_CHA1_POWER_UP | LVDS_DCLK_INV |
+			 LVDS_CON_CHASEL_DOUBLE_CHANNEL;
+	else
+		value |= LVDS_CON_CHA1_POWER_DOWN |
+			 LVDS_CON_CHASEL_SINGLE_CHANNEL;
+
+	lvds_write(priv, RK618_LVDS_CON, value);
+}
+
+static void rk618_lvds_bridge_disable(struct rockchip_bridge *bridge)
+{
+	struct rk618_lvds_priv *priv = dev_get_priv(bridge->dev);
+
+	lvds_write(priv, RK618_LVDS_CON,
+		   LVDS_CON_CHA0_POWER_DOWN | LVDS_CON_CHA1_POWER_DOWN |
+		   LVDS_CON_CBG_POWER_DOWN | LVDS_CON_PLL_POWER_DOWN);
+}
+
+static const struct rockchip_bridge_funcs rk618_lvds_bridge_funcs = {
+	.enable = rk618_lvds_bridge_enable,
+	.disable = rk618_lvds_bridge_disable,
+};
+
+static int rk618_lvds_probe(struct udevice *dev)
+{
+	struct rk618_lvds_priv *priv = dev_get_priv(dev);
+	struct rockchip_bridge *bridge =
+		(struct rockchip_bridge *)dev_get_driver_data(dev);
+	int ret;
+
+	priv->dev = dev;
+	priv->parent = dev_get_priv(dev->parent);
+	priv->dual_channel = dev_read_bool(dev, "dual-channel");
+
+	ret = device_probe(dev->parent);
+	if (ret)
+		return ret;
+
+	bridge->dev = dev;
+
+	return 0;
+}
+
+static struct rockchip_bridge rk618_lvds_driver_data = {
+	.funcs = &rk618_lvds_bridge_funcs,
+};
+
+static const struct udevice_id rk618_lvds_ids[] = {
+	{
+		.compatible = "rockchip,rk618-lvds",
+		.data = (ulong)&rk618_lvds_driver_data,
+	},
+	{ }
+};
+
+U_BOOT_DRIVER(rk618_lvds) = {
+	.name = "rk618_lvds",
+	.id = UCLASS_VIDEO_BRIDGE,
+	.of_match = rk618_lvds_ids,
+	.probe = rk618_lvds_probe,
+	.priv_auto_alloc_size = sizeof(struct rk618_lvds_priv),
+};

commit 1a8d717c29a3f61ca24a13437be5fb509287df96
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Nov 30 17:23:04 2018 +0800

    video/drm: Add rockchip bridge framework
    
    The current implementation assumes that the only possible peripheral
    device is a panel. Using an output bridge device should also be possible.
    
    Such sequence is required by Rockchip RK618 bridge, which is a RGB
    peripheral bridge device.
    
    Change-Id: I3e4e5e9e23c8ed7c74ed1276946b7b54f4cd5ee8
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 0c60d9d73d..4365815e45 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -1,6 +1,7 @@
 menuconfig DRM_ROCKCHIP
 	bool "Rockchip DRM Support"
 	depends on DM_VIDEO && OF_LIVE
+	select VIDEO_BRIDGE
 	help
 	  Rockchip SoCs provide video output capabilities for High-Definition
 	  Multimedia Interface (HDMI), Low-voltage Differential Signalling
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 1c89eee57e..eb647ebc11 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
+obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o rockchip_bridge.o \
 		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
diff --git a/drivers/video/drm/rockchip_bridge.c b/drivers/video/drm/rockchip_bridge.c
new file mode 100644
index 0000000000..61870b5efb
--- /dev/null
+++ b/drivers/video/drm/rockchip_bridge.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include "rockchip_bridge.h"
+
+void rockchip_bridge_pre_enable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->pre_enable)
+		bridge->funcs->pre_enable(bridge);
+}
+
+void rockchip_bridge_post_disable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->post_disable)
+		bridge->funcs->post_disable(bridge);
+}
+
+void rockchip_bridge_enable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->enable)
+		bridge->funcs->enable(bridge);
+}
+
+void rockchip_bridge_disable(struct rockchip_bridge *bridge)
+{
+	if (!bridge)
+		return;
+
+	if (bridge->funcs && bridge->funcs->disable)
+		bridge->funcs->disable(bridge);
+}
diff --git a/drivers/video/drm/rockchip_bridge.h b/drivers/video/drm/rockchip_bridge.h
new file mode 100644
index 0000000000..687b9f277b
--- /dev/null
+++ b/drivers/video/drm/rockchip_bridge.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2008-2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_BRIDGE_H_
+#define _ROCKCHIP_BRIDGE_H_
+
+#include <config.h>
+#include <common.h>
+#include <dm/device.h>
+#include <errno.h>
+
+struct display_state;
+struct rockchip_bridge;
+
+struct rockchip_bridge_funcs {
+	void (*enable)(struct rockchip_bridge *bridge);
+	void (*disable)(struct rockchip_bridge *bridge);
+	void (*pre_enable)(struct rockchip_bridge *bridge);
+	void (*post_disable)(struct rockchip_bridge *bridge);
+};
+
+struct rockchip_bridge {
+	struct udevice *dev;
+	const struct rockchip_bridge_funcs *funcs;
+
+	struct display_state *state;
+};
+
+void rockchip_bridge_enable(struct rockchip_bridge *bridge);
+void rockchip_bridge_disable(struct rockchip_bridge *bridge);
+void rockchip_bridge_pre_enable(struct rockchip_bridge *bridge);
+void rockchip_bridge_post_disable(struct rockchip_bridge *bridge);
+
+#endif
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 804f2ac8ce..e03738a97a 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -18,6 +18,7 @@
 #include <malloc.h>
 #include <video.h>
 #include <video_rockchip.h>
+#include <video_bridge.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
 #include <asm/arch-rockchip/resource_img.h>
@@ -26,6 +27,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_bridge.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
 #include <dm.h>
@@ -169,65 +171,6 @@ static bool can_direct_logo(int bpp)
 	return bpp == 24 || bpp == 32;
 }
 
-
-static struct udevice *get_panel_device(struct display_state *state, ofnode conn_node)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct udevice *dev;
-	struct connector_state *conn_state = &state->conn_state;
-	ofnode node, ports_node, port_node;
-	struct device_node *port, *panel, *ep;
-	int ph;
-	int ret;
-
-	node = dev_read_subnode(conn_state->dev, "panel");
-	if (ofnode_valid(node) &&
-	    of_device_is_available(ofnode_to_np(node))) {
-		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, node, &dev);
-		if (!ret) {
-			panel_state->node = node;
-			return dev;
-		}
-	}
-
-	/* TODO: this path not tested */
-	ports_node = dev_read_subnode(conn_state->dev, "ports");
-	if (!ofnode_valid(ports_node))
-		return NULL;
-
-	ofnode_for_each_subnode(port_node, ports_node) {
-		ofnode_for_each_subnode(node, port_node) {
-			ph = ofnode_read_u32_default(node, "remote-endpoint", -1);
-			if (!ph)
-				continue;
-			ep = of_find_node_by_phandle(ph);
-			if (!ofnode_valid(np_to_ofnode(ep))) {
-				printf("Warn: can't find endpoint from phdl\n");
-				continue;
-			}
-			port = of_get_parent(ep);
-			if (!ofnode_valid(np_to_ofnode(port))) {
-				printf("Warn: can't find port node\n");
-				continue;
-			}
-			panel = of_get_parent(port);
-			if (!ofnode_valid(np_to_ofnode(panel))) {
-				printf("Warn: can't find panel node\n");
-				continue;
-			}
-			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
-							  np_to_ofnode(panel),
-							  &dev);
-			if (!ret) {
-				panel_state->node = np_to_ofnode(panel);
-				return dev;
-			}
-		}
-	}
-
-	return NULL;
-}
-
 static int connector_phy_init(struct display_state *state,
 			      struct public_phy_data *data)
 {
@@ -292,27 +235,12 @@ static int connector_panel_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	struct udevice *dev;
-	ofnode conn_node = conn_state->node;
-	const struct rockchip_panel *panel;
+	const struct rockchip_panel *panel = panel_state->panel;
 	ofnode dsp_lut_node;
 	int ret, len;
 
-	dm_scan_fdt_dev(conn_state->dev);
-
-	dev = get_panel_device(state, conn_node);
-	if (!dev) {
+	if (!panel)
 		return 0;
-	}
-
-	panel = (const struct rockchip_panel *)dev_get_driver_data(dev);
-	if (!panel) {
-		printf("failed to find panel driver\n");
-		return 0;
-	}
-
-	panel_state->dev = dev;
-	panel_state->panel = panel;
 
 	if (panel->funcs && panel->funcs->init) {
 		ret = panel->funcs->init(state);
@@ -322,7 +250,7 @@ static int connector_panel_init(struct display_state *state)
 		}
 	}
 
-	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
+	dsp_lut_node = dev_read_subnode(panel->dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
 		debug("%s can not find dsp-lut node\n", __func__);
 		return 0;
@@ -379,6 +307,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode)
 static int display_get_timing_from_dts(struct panel_state *panel_state,
 				       struct drm_display_mode *mode)
 {
+	struct rockchip_panel *panel = panel_state->panel;
 	int phandle;
 	int hactive, vactive, pixelclock;
 	int hfront_porch, hback_porch, hsync_len;
@@ -386,7 +315,7 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	int val, flags = 0;
 	ofnode timing, native_mode;
 
-	timing = dev_read_subnode(panel_state->dev, "display-timings");
+	timing = dev_read_subnode(panel->dev, "display-timings");
 	if (!ofnode_valid(timing))
 		return -ENODEV;
 
@@ -585,11 +514,10 @@ static int display_get_timing(struct display_state *state)
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_panel *panel = panel_state->panel;
-	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
-	ofnode panel_node = panel_state->node;
 	int ret;
 
-	if (ofnode_valid(panel_node) && !display_get_timing_from_dts(panel_state, mode)) {
+	if (dev_of_valid(panel->dev) &&
+	    !display_get_timing_from_dts(panel_state, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
@@ -605,8 +533,8 @@ static int display_get_timing(struct display_state *state)
 		int panel_bits_per_colourp;
 
 		/* In order to read EDID, the panel needs to be powered on */
-		if (panel_funcs->prepare) {
-			ret = panel_funcs->prepare(state);
+		if (panel->funcs->prepare) {
+			ret = panel->funcs->prepare(state);
 			if (ret) {
 				printf("failed to prepare panel\n");
 				return ret;
@@ -620,8 +548,8 @@ static int display_get_timing(struct display_state *state)
 			edid_print_info((void *)&conn_state->edid);
 			goto done;
 		} else {
-			if (panel_funcs->unprepare)
-				panel_funcs->unprepare(state);
+			if (panel->funcs->unprepare)
+				panel->funcs->unprepare(state);
 		}
 	}
 
@@ -645,6 +573,7 @@ done:
 static int display_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_connector *conn = conn_state->connector;
 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -698,13 +627,24 @@ static int display_init(struct display_state *state)
 
 	if (conn_funcs->get_timing) {
 		ret = conn_funcs->get_timing(state);
-		if (ret)
-			goto deinit;
-	} else {
+	} else if (panel_state->panel) {
 		ret = display_get_timing(state);
-		if (ret)
-			goto deinit;
+	} else if (conn_state->bridge) {
+		int bpc;
+
+		ret = video_bridge_read_edid(conn_state->bridge->dev,
+					     conn_state->edid, EDID_SIZE);
+		if (ret > 0) {
+			ret = edid_get_drm_mode(conn_state->edid, ret, mode,
+						&bpc);
+			if (!ret)
+				edid_print_info((void *)&conn_state->edid);
+		}
 	}
+
+	if (ret)
+		goto deinit;
+
 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
 
 	if (crtc_funcs->init) {
@@ -842,6 +782,9 @@ static int display_enable(struct display_state *state)
 			goto unprepare_crtc;
 	}
 
+	if (conn_state->bridge)
+		rockchip_bridge_pre_enable(conn_state->bridge);
+
 	display_panel_prepare(state);
 
 	if (crtc_funcs->enable) {
@@ -856,6 +799,9 @@ static int display_enable(struct display_state *state)
 			goto disable_crtc;
 	}
 
+	if (conn_state->bridge)
+		rockchip_bridge_enable(conn_state->bridge);
+
 	display_panel_enable(state);
 
 	state->is_enable = true;
@@ -890,14 +836,20 @@ static int display_disable(struct display_state *state)
 
 	display_panel_disable(state);
 
-	if (crtc_funcs->disable)
-		crtc_funcs->disable(state);
+	if (conn_state->bridge)
+		rockchip_bridge_disable(conn_state->bridge);
 
 	if (conn_funcs->disable)
 		conn_funcs->disable(state);
 
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
+
 	display_panel_unprepare(state);
 
+	if (conn_state->bridge)
+		rockchip_bridge_post_disable(conn_state->bridge);
+
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
 
@@ -1232,6 +1184,126 @@ void rockchip_show_logo(void)
 	}
 }
 
+enum {
+	PORT_DIR_IN,
+	PORT_DIR_OUT,
+};
+
+static struct rockchip_panel *rockchip_of_find_panel(struct udevice *dev)
+{
+	ofnode panel_node, ports, port, ep;
+	struct udevice *panel_dev;
+	int ret;
+
+	panel_node = dev_read_subnode(dev, "panel");
+	if (ofnode_valid(panel_node) && ofnode_is_available(panel_node)) {
+		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_node,
+						  &panel_dev);
+		if (!ret)
+			goto found;
+	}
+
+	ports = dev_read_subnode(dev, "ports");
+	if (!ofnode_valid(ports))
+		return NULL;
+
+	ofnode_for_each_subnode(port, ports) {
+		u32 reg;
+
+		if (ofnode_read_u32(port, "reg", &reg))
+			continue;
+
+		if (reg != PORT_DIR_OUT)
+			continue;
+
+		ofnode_for_each_subnode(ep, port) {
+			ofnode _ep, _port;
+			uint phandle;
+
+			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
+				continue;
+
+			_ep = ofnode_get_by_phandle(phandle);
+			if (!ofnode_valid(_ep))
+				continue;
+
+			_port = ofnode_get_parent(_ep);
+			if (!ofnode_valid(_port))
+				continue;
+
+			panel_node = ofnode_get_parent(_port);
+			if (!ofnode_valid(panel_node))
+				continue;
+
+			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
+							  panel_node,
+							  &panel_dev);
+			if (!ret)
+				goto found;
+		}
+	}
+
+	return NULL;
+
+found:
+	return (struct rockchip_panel *)dev_get_driver_data(panel_dev);
+}
+
+static struct rockchip_bridge *rockchip_of_find_bridge(struct udevice *conn_dev)
+{
+	ofnode node, ports, port, ep;
+	struct udevice *dev;
+	int ret;
+
+	ports = dev_read_subnode(conn_dev, "ports");
+	if (!ofnode_valid(ports))
+		return NULL;
+
+	ofnode_for_each_subnode(port, ports) {
+		u32 reg;
+
+		if (ofnode_read_u32(port, "reg", &reg))
+			continue;
+
+		if (reg != PORT_DIR_OUT)
+			continue;
+
+		ofnode_for_each_subnode(ep, port) {
+			ofnode _ep, _port, _ports;
+			uint phandle;
+
+			if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
+				continue;
+
+			_ep = ofnode_get_by_phandle(phandle);
+			if (!ofnode_valid(_ep))
+				continue;
+
+			_port = ofnode_get_parent(_ep);
+			if (!ofnode_valid(_port))
+				continue;
+
+			_ports = ofnode_get_parent(_port);
+			if (!ofnode_valid(_ports))
+				continue;
+
+			node = ofnode_get_parent(_ports);
+			if (!ofnode_valid(node))
+				continue;
+
+			ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE,
+							  node, &dev);
+			if (!ret)
+				goto found;
+		}
+	}
+
+	return NULL;
+
+found:
+	return (struct rockchip_bridge *)dev_get_driver_data(dev);
+}
+
 static struct udevice *rockchip_of_find_connector(ofnode endpoint)
 {
 	ofnode ep, port, ports, conn;
@@ -1274,6 +1346,8 @@ static int rockchip_display_probe(struct udevice *dev)
 	struct udevice *crtc_dev, *conn_dev;
 	struct rockchip_crtc *crtc;
 	const struct rockchip_connector *conn;
+	struct rockchip_panel *panel = NULL;
+	struct rockchip_bridge *bridge = NULL;
 	struct display_state *s;
 	const char *name;
 	int ret;
@@ -1338,6 +1412,12 @@ static int rockchip_display_probe(struct udevice *dev)
 
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
 
+		bridge = rockchip_of_find_bridge(conn_dev);
+		if (bridge)
+			panel = rockchip_of_find_panel(bridge->dev);
+		else
+			panel = rockchip_of_find_panel(conn_dev);
+
 		s = malloc(sizeof(*s));
 		if (!s)
 			continue;
@@ -1363,9 +1443,11 @@ static int rockchip_display_probe(struct udevice *dev)
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
 
 		s->blob = blob;
+		s->panel_state.panel = panel;
 		s->conn_state.node = conn_dev->node;
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
+		s->conn_state.bridge = bridge;
 		s->conn_state.overscan.left_margin = 100;
 		s->conn_state.overscan.right_margin = 100;
 		s->conn_state.overscan.top_margin = 100;
@@ -1375,6 +1457,10 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.crtc = crtc;
 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
 		s->node = node;
+
+		if (bridge)
+			bridge->state = s;
+
 		get_crtc_mcu_mode(&s->crtc_state);
 
 		if (connector_panel_init(s)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d30eb50c4b..e2301b02c2 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -87,12 +87,9 @@ struct crtc_state {
 };
 
 struct panel_state {
-	struct udevice *dev;
-	ofnode node;
-	ofnode dsp_lut_node;
+	struct rockchip_panel *panel;
 
-	const struct rockchip_panel *panel;
-	void *private;
+	ofnode dsp_lut_node;
 };
 
 struct overscan {
@@ -105,6 +102,7 @@ struct overscan {
 struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
+	struct rockchip_bridge *bridge;
 	struct udevice *phy_dev;
 	struct rockchip_phy *phy;
 	ofnode node;
@@ -167,6 +165,13 @@ struct display_state {
 	int is_enable;
 };
 
+static inline struct rockchip_panel *state_get_panel(struct display_state *s)
+{
+	struct panel_state *panel_state = &s->panel_state;
+
+	return panel_state->panel;
+}
+
 int drm_mode_vrefresh(const struct drm_display_mode *mode);
 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
 bool drm_mode_is_420(const struct drm_display_info *display,
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 721d39454d..fe081a417c 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -23,6 +23,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_panel.h"
 #include "rockchip_lvds.h"
 
 enum rockchip_lvds_sub_devtype {
@@ -524,8 +525,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	const char *name;
 	int i, width;
 	struct resource lvds_phy, lvds_ctrl;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode panel_node = panel_state->node;
+	struct rockchip_panel *panel = state_get_panel(state);
 	int ret;
 
 	lvds = malloc(sizeof(*lvds));
@@ -561,7 +561,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		return  -ENXIO;
 	}
 
-	ret = dev_read_string_index(panel_state->dev, "rockchip,output", 0, &name);
+	ret = dev_read_string_index(panel->dev, "rockchip,output", 0, &name);
 	if (ret)
 		/* default set it as output rgb */
 		lvds->output = DISPLAY_OUTPUT_RGB;
@@ -572,7 +572,8 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->output;
 	}
-	ret = dev_read_string_index(panel_state->dev, "rockchip,data-mapping", 0, &name);
+	ret = dev_read_string_index(panel->dev, "rockchip,data-mapping",
+				    0, &name);
 	if (ret)
 		/* default set it as format jeida */
 		lvds->format = LVDS_FORMAT_JEIDA;
@@ -584,7 +585,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->format;
 	}
-	width = ofnode_read_u32_default(panel_node, "rockchip,data-width", 24);
+	width = dev_read_u32_default(panel->dev, "rockchip,data-width", 24);
 	if (width == 24) {
 		lvds->format |= LVDS_24BIT;
 	} else if (width == 18) {
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index ebf599635d..859a999dff 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -183,8 +183,8 @@ static int rockchip_panel_send_mcu_cmds(struct display_state *state,
 static int rockchip_panel_send_spi_cmds(struct display_state *state,
 					struct rockchip_panel_cmds *cmds)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int i;
 
 	if (!cmds)
@@ -253,9 +253,9 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 
 static int rockchip_panel_prepare(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
 
 	if (priv->prepared)
@@ -299,9 +299,9 @@ static int rockchip_panel_prepare(struct display_state *state)
 
 static void rockchip_panel_unprepare(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 	int ret;
 
 	if (!priv->prepared)
@@ -338,9 +338,9 @@ static void rockchip_panel_unprepare(struct display_state *state)
 
 static int rockchip_panel_enable(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
 	if (priv->enabled)
 		return 0;
@@ -357,9 +357,9 @@ static int rockchip_panel_enable(struct display_state *state)
 
 static void rockchip_panel_disable(struct display_state *state)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
-	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
 
 	if (!priv->enabled)
 		return;
@@ -375,10 +375,9 @@ static void rockchip_panel_disable(struct display_state *state)
 static int rockchip_panel_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel *panel = state_get_panel(state);
 
-	conn_state->bus_format = plat->bus_format;
+	conn_state->bus_format = panel->bus_format;
 
 	return 0;
 }
@@ -450,6 +449,9 @@ free_on_cmds:
 static int rockchip_panel_probe(struct udevice *dev)
 {
 	struct rockchip_panel_priv *priv = dev_get_priv(dev);
+	struct rockchip_panel_plat *plat = dev_get_platdata(dev);
+	struct rockchip_panel *panel =
+		(struct rockchip_panel *)dev_get_driver_data(dev);
 	int ret;
 	const char *cmd_type;
 
@@ -515,6 +517,9 @@ static int rockchip_panel_probe(struct udevice *dev)
 		dm_gpio_set_value(&priv->reset_gpio, 0);
 	}
 
+	panel->dev = dev;
+	panel->bus_format = plat->bus_format;
+
 	return 0;
 }
 
@@ -532,7 +537,7 @@ static const struct drm_display_mode auo_b125han03_mode = {
 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
 };
 
-static const struct rockchip_panel auo_b125han03_data = {
+static const struct rockchip_panel auo_b125han03_driver_data = {
 	.funcs = &rockchip_panel_funcs,
 	.data = &auo_b125han03_mode,
 };
@@ -551,28 +556,32 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
 };
 
-static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
+static const struct rockchip_panel lg_lp079qx1_sp0v_driver_data = {
 	.funcs = &rockchip_panel_funcs,
 	.data = &lg_lp079qx1_sp0v_mode,
 };
 
-static const struct rockchip_panel rockchip_panel_data = {
+static const struct rockchip_panel panel_simple_driver_data = {
+	.funcs = &rockchip_panel_funcs,
+};
+
+static const struct rockchip_panel panel_simple_dsi_driver_data = {
 	.funcs = &rockchip_panel_funcs,
 };
 
 static const struct udevice_id rockchip_panel_ids[] = {
 	{
 		.compatible = "auo,b125han03",
-		.data = (ulong)&auo_b125han03_data,
+		.data = (ulong)&auo_b125han03_driver_data,
 	}, {
 		.compatible = "lg,lp079qx1-sp0v",
-		.data = (ulong)&lg_lp079qx1_sp0v_data,
+		.data = (ulong)&lg_lp079qx1_sp0v_driver_data,
 	}, {
 		.compatible = "simple-panel",
-		.data = (ulong)&rockchip_panel_data,
+		.data = (ulong)&panel_simple_driver_data,
 	}, {
 		.compatible = "simple-panel-dsi",
-		.data = (ulong)&rockchip_panel_data,
+		.data = (ulong)&panel_simple_dsi_driver_data,
 	},
 	{}
 };
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index c947c9e4c7..e8aab0a5d4 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -7,6 +7,8 @@
 #ifndef _ROCKCHIP_PANEL_H_
 #define _ROCKCHIP_PANEL_H_
 
+struct display_state;
+
 struct rockchip_panel_funcs {
 	int (*init)(struct display_state *state);
 	void (*deinit)(struct display_state *state);
@@ -17,6 +19,8 @@ struct rockchip_panel_funcs {
 };
 
 struct rockchip_panel {
+	struct udevice *dev;
+	u32 bus_format;
 	const struct rockchip_panel_funcs *funcs;
 	const void *data;
 };

commit 152682ed57d97b84c3ed3ad4bcf81c8e3e854c77
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 09:53:14 2018 +0800

    clk: rockchip: px30: support setting clk_i2s_out_mclk to 12MHz
    
    Change-Id: I53fb5ceac0c423dd90c493d6f05069569c839f4e
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 56f05e58af..d9ab5875f4 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1017,6 +1017,37 @@ static ulong px30_crypto_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 
 	return px30_crypto_get_clk(priv, clk_id);
 }
+
+static ulong px30_i2s1_mclk_get_clk(struct px30_clk_priv *priv, ulong clk_id)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 con;
+
+	con = readl(&cru->clksel_con[30]);
+
+	if (!(con & CLK_I2S1_OUT_SEL_MASK))
+		return -ENOENT;
+
+	return 12000000;
+}
+
+static ulong px30_i2s1_mclk_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+				    ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+
+	if (hz != 12000000) {
+		printf("do not support this i2s1_mclk freq\n");
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[30], CLK_I2S1_OUT_SEL_MASK,
+		     CLK_I2S1_OUT_SEL_OSC);
+	rk_clrsetreg(&cru->clkgate_con[10], CLK_I2S1_OUT_MCLK_PAD_MASK,
+		     CLK_I2S1_OUT_MCLK_PAD_ENABLE);
+
+	return px30_i2s1_mclk_get_clk(priv, clk_id);
+}
 #endif
 
 static int px30_clk_get_gpll_rate(ulong *rate)
@@ -1253,6 +1284,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_CRYPTO_APK:
 		ret = px30_crypto_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_I2S1_OUT:
+		ret = px30_i2s1_mclk_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 74ea6d2f10b2e33e28ac1c0361f3c0b892d9be17
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Dec 17 08:57:54 2018 +0800

    video/drm: dsi: scan sub-nodes of the dsi node
    
    This allows the panel on child nodes of the dsi node can be binded.
    
    Change-Id: I6d5ae71cd10afa2bc100955847b301f0279a0ee2
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index cb57b84cb5..4769c801c6 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -1515,5 +1515,6 @@ U_BOOT_DRIVER(dw_mipi_dsi) = {
 	.id = UCLASS_DISPLAY,
 	.of_match = dw_mipi_dsi_ids,
 	.probe = dw_mipi_dsi_probe,
+	.bind = dm_scan_fdt_dev,
 	.priv_auto_alloc_size = sizeof(struct dw_mipi_dsi),
 };

commit 96b9f0a76ab469456ff397a66cd1b07a12fbc1d8
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Wed Sep 20 23:29:09 2017 -0700

    UPSTREAM: video: add anx6345 DM driver
    
    This is a eDP bridge similar to ANX9804, it allows to connect eDP panels
    to the chips that can output only parallel signal
    
    Change-Id: I35dbe3ea1c8868420fce58279e877a0641903b94
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    [agust: fixed most checkpatch errors/warnings]
    Signed-off-by: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from 491041c74965275defd2749db0e2248b2a7e317a)

diff --git a/drivers/video/bridge/Kconfig b/drivers/video/bridge/Kconfig
index 2a3b6c4bee..765f7380b8 100644
--- a/drivers/video/bridge/Kconfig
+++ b/drivers/video/bridge/Kconfig
@@ -25,3 +25,11 @@ config VIDEO_BRIDGE_NXP_PTN3460
 	  signalling) converter. It enables an LVDS LCD panel to be connected
 	  to an eDP output device such as an SoC that lacks LVDS capability,
 	  or where LVDS requires too many signals to route on the PCB.
+
+config VIDEO_BRIDGE_ANALOGIX_ANX6345
+	bool "Support Analogix ANX6345 RGB->DP bridge"
+	depends on VIDEO_BRIDGE
+	select DM_I2C
+	help
+	 The Analogix ANX6345 is RGB-to-DP converter. It enables an eDP LCD
+	 panel to be connected to an parallel LCD interface.
diff --git a/drivers/video/bridge/Makefile b/drivers/video/bridge/Makefile
index ce731fa4ca..2a746c6f8b 100644
--- a/drivers/video/bridge/Makefile
+++ b/drivers/video/bridge/Makefile
@@ -7,3 +7,4 @@
 obj-$(CONFIG_VIDEO_BRIDGE) += video-bridge-uclass.o
 obj-$(CONFIG_VIDEO_BRIDGE_PARADE_PS862X) += ps862x.o
 obj-$(CONFIG_VIDEO_BRIDGE_NXP_PTN3460) += ptn3460.o
+obj-$(CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345) += anx6345.o
diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c
new file mode 100644
index 0000000000..0a94affb9f
--- /dev/null
+++ b/drivers/video/bridge/anx6345.c
@@ -0,0 +1,426 @@
+/*
+ * Copyright (C) 2017 Vasily Khoruzhick <anarsoul@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <i2c.h>
+#include <edid.h>
+#include <video_bridge.h>
+#include "../anx98xx-edp.h"
+
+#define DP_MAX_LINK_RATE		0x001
+#define DP_MAX_LANE_COUNT		0x002
+#define DP_MAX_LANE_COUNT_MASK		0x1f
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct anx6345_priv {
+	u8 edid[EDID_SIZE];
+};
+
+static int anx6345_write(struct udevice *dev, unsigned int addr_off,
+			 unsigned char reg_addr, unsigned char value)
+{
+	uint8_t buf[2];
+	struct i2c_msg msg;
+	int ret;
+
+	msg.addr = addr_off;
+	msg.flags = 0;
+	buf[0] = reg_addr;
+	buf[1] = value;
+	msg.buf = buf;
+	msg.len = 2;
+	ret = dm_i2c_xfer(dev, &msg, 1);
+	if (ret) {
+		debug("%s: write failed, reg=%#x, value=%#x, ret=%d\n",
+		      __func__, reg_addr, value, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int anx6345_read(struct udevice *dev, unsigned int addr_off,
+			unsigned char reg_addr, unsigned char *value)
+{
+	uint8_t addr, val;
+	struct i2c_msg msg[2];
+	int ret;
+
+	msg[0].addr = addr_off;
+	msg[0].flags = 0;
+	addr = reg_addr;
+	msg[0].buf = &addr;
+	msg[0].len = 1;
+	msg[1].addr = addr_off;
+	msg[1].flags = I2C_M_RD;
+	msg[1].buf = &val;
+	msg[1].len = 1;
+	ret = dm_i2c_xfer(dev, msg, 2);
+	if (ret) {
+		debug("%s: read failed, reg=%.2x, value=%p, ret=%d\n",
+		      __func__, (int)reg_addr, value, ret);
+		return ret;
+	}
+	*value = val;
+
+	return 0;
+}
+
+static int anx6345_write_r0(struct udevice *dev, unsigned char reg_addr,
+			    unsigned char value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_write(dev, chip->chip_addr, reg_addr, value);
+}
+
+static int anx6345_read_r0(struct udevice *dev, unsigned char reg_addr,
+			   unsigned char *value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_read(dev, chip->chip_addr, reg_addr, value);
+}
+
+static int anx6345_write_r1(struct udevice *dev, unsigned char reg_addr,
+			    unsigned char value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_write(dev, chip->chip_addr + 1, reg_addr, value);
+}
+
+static int anx6345_read_r1(struct udevice *dev, unsigned char reg_addr,
+			   unsigned char *value)
+{
+	struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+	return anx6345_read(dev, chip->chip_addr + 1, reg_addr, value);
+}
+
+static int anx6345_set_backlight(struct udevice *dev, int percent)
+{
+	return -ENOSYS;
+}
+
+static int anx6345_aux_wait(struct udevice *dev)
+{
+	int ret = -ETIMEDOUT;
+	u8 v;
+	int retries = 1000;
+
+	do {
+		anx6345_read_r0(dev, ANX9804_DP_AUX_CH_CTL_2, &v);
+		if (!(v & ANX9804_AUX_EN)) {
+			ret = 0;
+			break;
+		}
+		udelay(100);
+	} while (retries--);
+
+	if (ret) {
+		debug("%s: timed out waiting for AUX_EN to clear\n", __func__);
+		return ret;
+	}
+
+	ret = -ETIMEDOUT;
+	retries = 1000;
+	do {
+		anx6345_read_r1(dev, ANX9804_DP_INT_STA, &v);
+		if (v & ANX9804_RPLY_RECEIV) {
+			ret = 0;
+			break;
+		}
+		udelay(100);
+	} while (retries--);
+
+	if (ret) {
+		debug("%s: timed out waiting to receive reply\n", __func__);
+		return ret;
+	}
+
+	/* Clear RPLY_RECEIV bit */
+	anx6345_write_r1(dev, ANX9804_DP_INT_STA, v);
+
+	anx6345_read_r0(dev, ANX9804_AUX_CH_STA, &v);
+	if ((v & ANX9804_AUX_STATUS_MASK) != 0) {
+		debug("AUX status: %d\n", v & ANX9804_AUX_STATUS_MASK);
+		ret = -EIO;
+	}
+
+	return ret;
+}
+
+static void anx6345_aux_addr(struct udevice *dev, u32 addr)
+{
+	u8 val;
+
+	val = addr & 0xff;
+	anx6345_write_r0(dev, ANX9804_DP_AUX_ADDR_7_0, val);
+	val = (addr >> 8) & 0xff;
+	anx6345_write_r0(dev, ANX9804_DP_AUX_ADDR_15_8, val);
+	val = (addr >> 16) & 0x0f;
+	anx6345_write_r0(dev, ANX9804_DP_AUX_ADDR_19_16, val);
+}
+
+static int anx6345_aux_transfer(struct udevice *dev, u8 req,
+				u32 addr, u8 *buf, size_t len)
+{
+	int i, ret;
+	u8 ctrl1 = req;
+	u8 ctrl2 = ANX9804_AUX_EN;
+
+	if (len > 16)
+		return -E2BIG;
+
+	if (len)
+		ctrl1 |= ANX9804_AUX_LENGTH(len);
+	else
+		ctrl2 |= ANX9804_ADDR_ONLY;
+
+	if (len && !(req & ANX9804_AUX_TX_COMM_READ)) {
+		for (i = 0; i < len; i++)
+			anx6345_write_r0(dev, ANX9804_BUF_DATA_0 + i, buf[i]);
+	}
+
+	anx6345_aux_addr(dev, addr);
+	anx6345_write_r0(dev, ANX9804_DP_AUX_CH_CTL_1, ctrl1);
+	anx6345_write_r0(dev, ANX9804_DP_AUX_CH_CTL_2, ctrl2);
+	ret = anx6345_aux_wait(dev);
+	if (ret) {
+		debug("AUX transaction timed out\n");
+		return ret;
+	}
+
+	if (len && (req & ANX9804_AUX_TX_COMM_READ)) {
+		for (i = 0; i < len; i++)
+			anx6345_read_r0(dev, ANX9804_BUF_DATA_0 + i, &buf[i]);
+	}
+
+	return 0;
+}
+
+static int anx6345_read_aux_i2c(struct udevice *dev, u8 chip_addr,
+				u8 offset, size_t count, u8 *buf)
+{
+	int i, ret;
+	size_t cur_cnt;
+	u8 cur_offset;
+
+	for (i = 0; i < count; i += 16) {
+		cur_cnt = (count - i) > 16 ? 16 : count - i;
+		cur_offset = offset + i;
+		ret = anx6345_aux_transfer(dev, ANX9804_AUX_TX_COMM_MOT,
+					   chip_addr, &cur_offset, 1);
+		if (ret) {
+			debug("%s: failed to set i2c offset: %d\n",
+			      __func__, ret);
+			return ret;
+		}
+		ret = anx6345_aux_transfer(dev, ANX9804_AUX_TX_COMM_READ,
+					   chip_addr, buf + i, cur_cnt);
+		if (ret) {
+			debug("%s: failed to read from i2c device: %d\n",
+			      __func__, ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int anx6345_read_dpcd(struct udevice *dev, u32 reg, u8 *val)
+{
+	int ret;
+
+	ret = anx6345_aux_transfer(dev,
+				   ANX9804_AUX_TX_COMM_READ |
+				   ANX9804_AUX_TX_COMM_DP_TRANSACTION,
+				   reg, val, 1);
+	if (ret) {
+		debug("Failed to read DPCD\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int anx6345_read_edid(struct udevice *dev, u8 *buf, int size)
+{
+	struct anx6345_priv *priv = dev_get_priv(dev);
+
+	if (size > EDID_SIZE)
+		size = EDID_SIZE;
+	memcpy(buf, priv->edid, size);
+
+	return size;
+}
+
+static int anx6345_attach(struct udevice *dev)
+{
+	/* No-op */
+	return 0;
+}
+
+static int anx6345_enable(struct udevice *dev)
+{
+	u8 chipid, colordepth, lanes, data_rate, c;
+	int ret, i, bpp;
+	struct display_timing timing;
+	struct anx6345_priv *priv = dev_get_priv(dev);
+
+	/* Deassert reset and enable power */
+	ret = video_bridge_set_active(dev, true);
+	if (ret)
+		return ret;
+
+	/* Reset */
+	anx6345_write_r1(dev, ANX9804_RST_CTRL_REG, 1);
+	mdelay(100);
+	anx6345_write_r1(dev, ANX9804_RST_CTRL_REG, 0);
+
+	/* Write 0 to the powerdown reg (powerup everything) */
+	anx6345_write_r1(dev, ANX9804_POWERD_CTRL_REG, 0);
+
+	ret = anx6345_read_r1(dev, ANX9804_DEV_IDH_REG, &chipid);
+	if (ret)
+		debug("%s: read id failed: %d\n", __func__, ret);
+
+	switch (chipid) {
+	case 0x63:
+		debug("ANX63xx detected.\n");
+		break;
+	default:
+		debug("Error anx6345 chipid mismatch: %.2x\n", (int)chipid);
+		return -ENODEV;
+	}
+
+	for (i = 0; i < 100; i++) {
+		anx6345_read_r0(dev, ANX9804_SYS_CTRL2_REG, &c);
+		anx6345_write_r0(dev, ANX9804_SYS_CTRL2_REG, c);
+		anx6345_read_r0(dev, ANX9804_SYS_CTRL2_REG, &c);
+		if ((c & ANX9804_SYS_CTRL2_CHA_STA) == 0)
+			break;
+
+		mdelay(5);
+	}
+	if (i == 100)
+		debug("Error anx6345 clock is not stable\n");
+
+	/* Set a bunch of analog related register values */
+	anx6345_write_r0(dev, ANX9804_PLL_CTRL_REG, 0x00);
+	anx6345_write_r1(dev, ANX9804_ANALOG_DEBUG_REG1, 0x70);
+	anx6345_write_r0(dev, ANX9804_LINK_DEBUG_REG, 0x30);
+
+	/* Force HPD */
+	anx6345_write_r0(dev, ANX9804_SYS_CTRL3_REG,
+			 ANX9804_SYS_CTRL3_F_HPD | ANX9804_SYS_CTRL3_HPD_CTRL);
+
+	/* Power up and configure lanes */
+	anx6345_write_r0(dev, ANX9804_ANALOG_POWER_DOWN_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE0_SET_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE1_SET_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE2_SET_REG, 0x00);
+	anx6345_write_r0(dev, ANX9804_TRAINING_LANE3_SET_REG, 0x00);
+
+	/* Reset AUX CH */
+	anx6345_write_r1(dev, ANX9804_RST_CTRL2_REG,
+			 ANX9804_RST_CTRL2_AUX);
+	anx6345_write_r1(dev, ANX9804_RST_CTRL2_REG, 0);
+
+	/* Powerdown audio and some other unused bits */
+	anx6345_write_r1(dev, ANX9804_POWERD_CTRL_REG, ANX9804_POWERD_AUDIO);
+	anx6345_write_r0(dev, ANX9804_HDCP_CONTROL_0_REG, 0x00);
+	anx6345_write_r0(dev, 0xa7, 0x00);
+
+	anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid);
+	if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) {
+		debug("Failed to parse EDID\n");
+		return -EIO;
+	}
+	debug("%s: panel found: %dx%d, bpp %d\n", __func__,
+	      timing.hactive.typ, timing.vactive.typ, bpp);
+	if (bpp == 6)
+		colordepth = 0x00; /* 6 bit */
+	else
+		colordepth = 0x10; /* 8 bit */
+	anx6345_write_r1(dev, ANX9804_VID_CTRL2_REG, colordepth);
+
+	if (anx6345_read_dpcd(dev, DP_MAX_LINK_RATE, &data_rate)) {
+		debug("%s: Failed to DP_MAX_LINK_RATE\n", __func__);
+		return -EIO;
+	}
+	debug("%s: data_rate: %d\n", __func__, (int)data_rate);
+	if (anx6345_read_dpcd(dev, DP_MAX_LANE_COUNT, &lanes)) {
+		debug("%s: Failed to read DP_MAX_LANE_COUNT\n", __func__);
+		return -EIO;
+	}
+	lanes &= DP_MAX_LANE_COUNT_MASK;
+	debug("%s: lanes: %d\n", __func__, (int)lanes);
+
+	/* Set data-rate / lanes */
+	anx6345_write_r0(dev, ANX9804_LINK_BW_SET_REG, data_rate);
+	anx6345_write_r0(dev, ANX9804_LANE_COUNT_SET_REG, lanes);
+
+	/* Link training */
+	anx6345_write_r0(dev, ANX9804_LINK_TRAINING_CTRL_REG,
+			 ANX9804_LINK_TRAINING_CTRL_EN);
+	mdelay(5);
+	for (i = 0; i < 100; i++) {
+		anx6345_read_r0(dev, ANX9804_LINK_TRAINING_CTRL_REG, &c);
+		if ((chipid == 0x63) && (c & 0x80) == 0)
+			break;
+
+		mdelay(5);
+	}
+	if (i == 100) {
+		debug("Error anx6345 link training timeout\n");
+		return -ENODEV;
+	}
+
+	/* Enable */
+	anx6345_write_r1(dev, ANX9804_VID_CTRL1_REG,
+			 ANX9804_VID_CTRL1_VID_EN | ANX9804_VID_CTRL1_EDGE);
+	/* Force stream valid */
+	anx6345_write_r0(dev, ANX9804_SYS_CTRL3_REG,
+			 ANX9804_SYS_CTRL3_F_HPD |
+			 ANX9804_SYS_CTRL3_HPD_CTRL |
+			 ANX9804_SYS_CTRL3_F_VALID |
+			 ANX9804_SYS_CTRL3_VALID_CTRL);
+
+	return 0;
+}
+
+static int anx6345_probe(struct udevice *dev)
+{
+	if (device_get_uclass_id(dev->parent) != UCLASS_I2C)
+		return -EPROTONOSUPPORT;
+
+	return anx6345_enable(dev);
+}
+
+struct video_bridge_ops anx6345_ops = {
+	.attach = anx6345_attach,
+	.set_backlight = anx6345_set_backlight,
+	.read_edid = anx6345_read_edid,
+};
+
+static const struct udevice_id anx6345_ids[] = {
+	{ .compatible = "analogix,anx6345", },
+	{ }
+};
+
+U_BOOT_DRIVER(analogix_anx6345) = {
+	.name	= "analogix_anx6345",
+	.id	= UCLASS_VIDEO_BRIDGE,
+	.of_match = anx6345_ids,
+	.probe	= anx6345_probe,
+	.ops	= &anx6345_ops,
+	.priv_auto_alloc_size = sizeof(struct anx6345_priv),
+};

commit caedb0c4c82e049e1456e6779284bb9044e2b3d8
Author: Fabio Estevam <fabio.estevam@nxp.com>
Date:   Sat Apr 7 18:06:27 2018 -0300

    UPSTREAM: treewide: fix up files incorrectly marked executable
    
    Inspired by the following kernel commit:
    
    "commit 90fda63fa1156ec1bcfd7f9ca384cec221f70a21
    Author: Linus Torvalds <torvalds@linux-foundation.org>
    Date:   Sat Apr 7 13:31:23 2018 -0700
    
    treewide: fix up files incorrectly marked executable
    
    Joe Perches noted that we have a few source files that for some
    inexplicable reason (read: I'm too lazy to even go look at the history)
    are marked executable:
    
    drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
    drivers/net/ethernet/cadence/macb_ptp.c
    
    A simple git command line to show executable C/asm/header files is this:
    
       git ls-files -s '*.[chsS]' | grep '^100755'
    
    and then you can fix them up with scripting by just feeding that output
    into:
    
      | cut -f2 | xargs chmod -x
    
    and commit it.
    
    Which is exactly what this commit does.
    
    Reported-by: Joe Perches <joe@perches.com>
    Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>"
    
    Do the same in the U-Boot source tree.
    
    Change-Id: Ie086d3ab3b393097a9dd6c041546296a16eee2dc
    Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from 02325c7bfd7ccafae600774273f1b8ac11e90c08)

diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c
old mode 100755
new mode 100644
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
old mode 100755
new mode 100644

commit 791f74cf96ff3400ead965f3267238a52e01c411
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Wed Sep 20 23:29:08 2017 -0700

    UPSTREAM: video: anx9804: split out registers definitions into a separate header
    
    This header will be used in anx6345 driver
    
    Change-Id: Ib6beea5f2d063d7bfb5054f24d5098ee7e0a42ca
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    [agust: moved header to drivers/video]
    Signed-off-by: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from 24bf59d0243f0ee496b20aee985968729b8d0386)

diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c
index 37ad69a039..3910458bf1 100755
--- a/drivers/video/anx9804.c
+++ b/drivers/video/anx9804.c
@@ -12,61 +12,9 @@
 
 #include <common.h>
 #include <i2c.h>
+#include "anx98xx-edp.h"
 #include "anx9804.h"
 
-/* Registers at i2c address 0x38 */
-
-#define ANX9804_HDCP_CONTROL_0_REG				0x01
-
-#define ANX9804_SYS_CTRL2_REG					0x81
-#define ANX9804_SYS_CTRL2_CHA_STA				0x04
-
-#define ANX9804_SYS_CTRL3_REG					0x82
-#define ANX9804_SYS_CTRL3_VALID_CTRL				BIT(0)
-#define ANX9804_SYS_CTRL3_F_VALID				BIT(1)
-#define ANX9804_SYS_CTRL3_HPD_CTRL				BIT(4)
-#define ANX9804_SYS_CTRL3_F_HPD					BIT(5)
-
-#define ANX9804_LINK_BW_SET_REG					0xa0
-#define ANX9804_LANE_COUNT_SET_REG				0xa1
-#define ANX9804_TRAINING_PTN_SET_REG				0xa2
-#define ANX9804_TRAINING_LANE0_SET_REG				0xa3
-#define ANX9804_TRAINING_LANE1_SET_REG				0xa4
-#define ANX9804_TRAINING_LANE2_SET_REG				0xa5
-#define ANX9804_TRAINING_LANE3_SET_REG				0xa6
-
-#define ANX9804_LINK_TRAINING_CTRL_REG				0xa8
-#define ANX9804_LINK_TRAINING_CTRL_EN				BIT(0)
-
-#define ANX9804_LINK_DEBUG_REG					0xb8
-#define ANX9804_PLL_CTRL_REG					0xc7	
-#define ANX9804_ANALOG_POWER_DOWN_REG				0xc8
-
-/* Registers at i2c address 0x39 */
-
-#define ANX9804_DEV_IDH_REG					0x03
-
-#define ANX9804_POWERD_CTRL_REG					0x05
-#define ANX9804_POWERD_AUDIO					BIT(4)
-
-#define ANX9804_RST_CTRL_REG					0x06
-
-#define ANX9804_RST_CTRL2_REG					0x07
-#define ANX9804_RST_CTRL2_AUX					BIT(2)
-#define ANX9804_RST_CTRL2_AC_MODE				BIT(6)
-
-#define ANX9804_VID_CTRL1_REG					0x08
-#define ANX9804_VID_CTRL1_VID_EN				BIT(7)
-#define ANX9804_VID_CTRL1_EDGE					BIT(0)
-
-#define ANX9804_VID_CTRL2_REG					0x09
-#define ANX9804_ANALOG_DEBUG_REG1				0xdc
-#define ANX9804_ANALOG_DEBUG_REG3				0xde
-#define ANX9804_PLL_FILTER_CTRL1				0xdf
-#define ANX9804_PLL_FILTER_CTRL3				0xe1
-#define ANX9804_PLL_FILTER_CTRL					0xe2
-#define ANX9804_PLL_CTRL3					0xe6
-
 /**
  * anx9804_init() - Init anx9804 parallel lcd to edp bridge chip
  *
diff --git a/drivers/video/anx98xx-edp.h b/drivers/video/anx98xx-edp.h
new file mode 100644
index 0000000000..f7e8baa167
--- /dev/null
+++ b/drivers/video/anx98xx-edp.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
+ * Copyright (C) 2017 Vasily Khoruzhick <anarsoul@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Registers at i2c address 0x38 */
+
+#define ANX9804_HDCP_CONTROL_0_REG				0x01
+
+#define ANX9804_SYS_CTRL1_REG					0x80
+#define ANX9804_SYS_CTRL1_PD_IO					0x80
+#define ANX9804_SYS_CTRL1_PD_VID				0x40
+#define ANX9804_SYS_CTRL1_PD_LINK				0x20
+#define ANX9804_SYS_CTRL1_PD_TOTAL				0x10
+#define ANX9804_SYS_CTRL1_MODE_SEL				0x08
+#define ANX9804_SYS_CTRL1_DET_STA				0x04
+#define ANX9804_SYS_CTRL1_FORCE_DET				0x02
+#define ANX9804_SYS_CTRL1_DET_CTRL				0x01
+
+#define ANX9804_SYS_CTRL2_REG					0x81
+#define ANX9804_SYS_CTRL2_CHA_STA				0x04
+
+#define ANX9804_SYS_CTRL3_REG					0x82
+#define ANX9804_SYS_CTRL3_VALID_CTRL				BIT(0)
+#define ANX9804_SYS_CTRL3_F_VALID				BIT(1)
+#define ANX9804_SYS_CTRL3_HPD_CTRL				BIT(4)
+#define ANX9804_SYS_CTRL3_F_HPD					BIT(5)
+
+#define ANX9804_LINK_BW_SET_REG					0xa0
+#define ANX9804_LANE_COUNT_SET_REG				0xa1
+#define ANX9804_TRAINING_PTN_SET_REG				0xa2
+#define ANX9804_TRAINING_LANE0_SET_REG				0xa3
+#define ANX9804_TRAINING_LANE1_SET_REG				0xa4
+#define ANX9804_TRAINING_LANE2_SET_REG				0xa5
+#define ANX9804_TRAINING_LANE3_SET_REG				0xa6
+
+#define ANX9804_LINK_TRAINING_CTRL_REG				0xa8
+#define ANX9804_LINK_TRAINING_CTRL_EN				BIT(0)
+
+#define ANX9804_LINK_DEBUG_REG					0xb8
+#define ANX9804_PLL_CTRL_REG					0xc7
+#define ANX9804_ANALOG_POWER_DOWN_REG				0xc8
+
+#define ANX9804_AUX_CH_STA					0xe0
+#define ANX9804_AUX_BUSY					BIT(4)
+#define ANX9804_AUX_STATUS_MASK					0x0f
+
+#define ANX9804_DP_AUX_RX_COMM					0xe3
+#define ANX9804_AUX_RX_COMM_I2C_DEFER				BIT(3)
+#define ANX9804_AUX_RX_COMM_AUX_DEFER				BIT(1)
+
+#define ANX9804_DP_AUX_CH_CTL_1					0xe5
+#define ANX9804_AUX_LENGTH(x)					(((x - 1) & 0x0f) << 4)
+#define ANX9804_AUX_TX_COMM_MASK				0x0f
+#define ANX9804_AUX_TX_COMM_DP_TRANSACTION			BIT(3)
+#define ANX9804_AUX_TX_COMM_MOT					BIT(2)
+#define ANX9804_AUX_TX_COMM_READ				BIT(0)
+
+#define ANX9804_DP_AUX_ADDR_7_0					0xe6
+#define ANX9804_DP_AUX_ADDR_15_8				0xe7
+#define ANX9804_DP_AUX_ADDR_19_16				0xe8
+
+#define ANX9804_DP_AUX_CH_CTL_2					0xe9
+#define ANX9804_ADDR_ONLY					BIT(1)
+#define ANX9804_AUX_EN						BIT(0)
+
+#define ANX9804_BUF_DATA_0					0xf0
+
+/* Registers at i2c address 0x39 */
+
+#define ANX9804_DEV_IDH_REG					0x03
+
+#define ANX9804_POWERD_CTRL_REG					0x05
+#define ANX9804_POWERD_AUDIO					BIT(4)
+
+#define ANX9804_RST_CTRL_REG					0x06
+
+#define ANX9804_RST_CTRL2_REG					0x07
+#define ANX9804_RST_CTRL2_AUX					BIT(2)
+#define ANX9804_RST_CTRL2_AC_MODE				BIT(6)
+
+#define ANX9804_VID_CTRL1_REG					0x08
+#define ANX9804_VID_CTRL1_VID_EN				BIT(7)
+#define ANX9804_VID_CTRL1_EDGE					BIT(0)
+
+#define ANX9804_VID_CTRL2_REG					0x09
+#define ANX9804_ANALOG_DEBUG_REG1				0xdc
+#define ANX9804_ANALOG_DEBUG_REG3				0xde
+#define ANX9804_PLL_FILTER_CTRL1				0xdf
+#define ANX9804_PLL_FILTER_CTRL3				0xe1
+#define ANX9804_PLL_FILTER_CTRL					0xe2
+#define ANX9804_PLL_CTRL3					0xe6
+
+#define ANX9804_DP_INT_STA					0xf7
+#define ANX9804_RPLY_RECEIV					BIT(1)
+#define ANX9804_AUX_ERR						BIT(0)

commit 7587ed89681ec6b3f3b0e99733792076fa50cdaf
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Mon Nov 5 20:24:29 2018 -0800

    UPSTREAM: dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing
    
    Both GPIOs are optional, so we shouldn't fail if any is missing.
    Without this fix reset is not deasserted if sleep GPIO is missing.
    
    Change-Id: I25f2d11d7df96a4a93fcd844bcf34c3fb5109336
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
    Reviewed-by: Andre Przywara <andre.przywara@arm.com>
    Cc: Vagrant Cascadian <vagrant@debian.org>
    (cherry-picked from 8336a43792a103c13d939b3925cb75322911f7fb)

diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c
index 79facd02a6..29f5b7e9a4 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -107,13 +107,19 @@ static int video_bridge_pre_probe(struct udevice *dev)
 int video_bridge_set_active(struct udevice *dev, bool active)
 {
 	struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
-	int ret;
+	int ret = 0;
 
 	debug("%s: %d\n", __func__, active);
-	ret = dm_gpio_set_value(&uc_priv->sleep, !active);
-	if (ret)
-		return ret;
-	if (active) {
+	if (uc_priv->sleep.dev) {
+		ret = dm_gpio_set_value(&uc_priv->sleep, !active);
+		if (ret)
+			return ret;
+	}
+
+	if (!active)
+		return 0;
+
+	if (uc_priv->reset.dev) {
 		ret = dm_gpio_set_value(&uc_priv->reset, true);
 		if (ret)
 			return ret;

commit d2bb07b716e012adfd6870e41568397940d7090c
Author: Vasily Khoruzhick <anarsoul@gmail.com>
Date:   Wed Sep 20 23:29:07 2017 -0700

    UPSTREAM: dm: video: bridge: add operation to read EDID
    
    Add an operation to read EDID, since bridge may have ability to read
    EDID from the panel that is connected to it, for example LCD<->eDP bridge.
    
    Change-Id: I03b711cd3a138f83c896ef656ffc5171b30eee40
    Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry-picked from fdb5525572ec7dc240ccc960888ae969253fede4)

diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c
index 07270bac9e..79facd02a6 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <edid.h>
 #include <video_bridge.h>
 
 int video_bridge_set_backlight(struct udevice *dev, int percent)
@@ -45,6 +46,15 @@ int video_bridge_check_attached(struct udevice *dev)
 	return ops->check_attached(dev);
 }
 
+int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size)
+{
+	struct video_bridge_ops *ops = video_bridge_get_ops(dev);
+
+	if (!ops || !ops->read_edid)
+		return -ENOSYS;
+	return ops->read_edid(dev, buf, buf_size);
+}
+
 static int video_bridge_pre_probe(struct udevice *dev)
 {
 	struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev);
diff --git a/include/video_bridge.h b/include/video_bridge.h
index c7b8681849..0699a8dda8 100644
--- a/include/video_bridge.h
+++ b/include/video_bridge.h
@@ -53,6 +53,16 @@ struct video_bridge_ops {
 	 * @return 0 if OK, -ve on error
 	 */
 	int (*set_backlight)(struct udevice *dev, int percent);
+
+	/**
+	 * read_edid() - Read information from EDID
+	 *
+	 * @dev:	Device to read from
+	 * @buf:	Buffer to read into
+	 * @buf_size:	Buffer size
+	 * @return number of bytes read, <=0 for error
+	 */
+	int (*read_edid)(struct udevice *dev, u8 *buf, int buf_size);
 };
 
 #define video_bridge_get_ops(dev) \
@@ -89,4 +99,14 @@ int video_bridge_set_active(struct udevice *dev, bool active);
  */
 int video_bridge_check_attached(struct udevice *dev);
 
+/**
+ * video_bridge_read_edid() - Read information from EDID
+ *
+ * @dev:	Device to read from
+ * @buf:	Buffer to read into
+ * @buf_size:	Buffer size
+ * @return number of bytes read, <=0 for error
+ */
+int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size);
+
 #endif

commit 752032c993324e8a25c3605d89f3a99f92f6ab29
Author: David.Wu <david.wu@rock-chips.com>
Date:   Wed Dec 26 09:12:43 2018 +0800

    pinctrl: rockchip: Add gpio3b4 io function recalculated select for RK3308B
    
    Accroding to the datasheet, the pin of gpio3b4 needs to be
    recalculated for iomux selecting.
    
    Change-Id: I827be9a51851ee9323a133d8bded8b09e068f1b4
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index c45ee11001..b6f6adfc9c 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -569,6 +569,12 @@ static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = {
 		.reg = 0x34,
 		.bit = 8,
 		.mask = 0xf
+	}, {
+		.num = 3,
+		.pin = 12,
+		.reg = 0x68,
+		.bit = 8,
+		.mask = 0xf
 	}, {
 		.num = 3,
 		.pin = 13,

commit 415cf08001eb16cbc669512e4e2111dd6c1cb4f0
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Wed Dec 19 18:49:02 2018 -0800

    drivers: rkflash: add new spi nand devices
    
    1.FS35ND01G-S1 FS35ND02G-S2, EM73C044SNC-G, EM73D044SNB-G
    
    Change-Id: Ic90fbfe8f9f82183c9254af6a77c5c16cb5856c3
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 18f5a04d8d..81434126cc 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -16,15 +16,13 @@
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8, NULL},
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xFF, 0xFF, 4, 8, NULL},
 	/* TC58CVG1S0HxAIx */
-	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8, NULL},
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xFF, 0xFF, 4, 8, NULL},
 	/* MX35LF1GE4AB */
 	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
 	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
-	/* MX66L1G45G */
-	{0x90AF, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
 	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
@@ -34,11 +32,9 @@ static struct nand_info spi_nand_tbl[] = {
 	/* GD5F1GQ4U */
 	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* IS37SML01G1 */
-	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1},
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xFF, 0xFF, 8, 12, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
-	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 4, 20, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
 	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UDACAE */
@@ -48,15 +44,23 @@ static struct nand_info spi_nand_tbl[] = {
 	/* HYF1GQ4UDACAE */
 	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, NULL},
 	/* F50L1G41LB */
-	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, NULL},
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, &sfc_nand_ecc_status_sp1},
 	/* XT26G02A */
-	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BE2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
 	/* XT26G01A */
-	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	{0x0BE1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
 	/* FS35ND01G-S1 */
 	{0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 16, 20, &sfc_nand_ecc_status_sp5},
 	/* FS35ND02G-S2 */
 	{0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, 16, 20, &sfc_nand_ecc_status_sp5},
+	/* DS35Q1GA-1B */
+	{0xE571, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* DS35Q2GA-1B */
+	{0xE572, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0x0, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* EM73C044SNC-G */
+	{0xD522, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0x0, 4, 20, NULL},
+	/* EM73D044SNB-G */
+	{0xD520, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0x0, 4, 20, NULL}
 };
 
 static u8 id_byte[8];
@@ -375,6 +379,7 @@ static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 {
 	int ret;
+	u32 plane;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u8 status;
@@ -383,6 +388,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
 
 	memcpy(gp_page_buf, p_data, data_sz);
+	ftl_memset(&gp_page_buf[data_sz / 4], 0xff, 64);
 	gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0];
 	gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1];
 
@@ -401,7 +407,8 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfctrl.d32 = 0;
 	sfctrl.b.datalines = sfc_nand_dev.prog_lines;
 	sfctrl.b.addrbits = 16;
-	sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
+	sfc_request(sfcmd.d32, sfctrl.d32, plane, gp_page_buf);
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = p_nand_info->page_prog_cmd;
@@ -420,6 +427,7 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 {
 	int ret;
+	u32 plane;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
 	u32 ecc_result;
@@ -450,8 +458,9 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfctrl.d32 = 0;
 	sfctrl.b.datalines = sfc_nand_dev.read_lines;
 
+	plane = p_nand_info->plane_per_die == 2 ? ((addr >> 6) & 0x1) << 12 : 0;
 	memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE);
-	ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, plane << 8, gp_page_buf);
 
 	memcpy(p_data, gp_page_buf, data_sz);
 	p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4];

commit 47fb924aca361cbca861a947c79358624a20e24e
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Tue Dec 25 11:56:32 2018 +0800

    arm: rockchip: rk1808 add set qos priority for cif
    
    Set cif qos priority to 2.
    
    Change-Id: I42354ae12394472d99af17af1d586a7bc3bb3c37
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 021da42f52..03de8b932e 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -11,6 +11,10 @@
 #include <debug_uart.h>
 
 #include <asm/armv8/mmu.h>
+
+#define NIU_CIF_ADDR		0xfe8a0188
+#define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
+
 static struct mm_region rk1808_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -56,6 +60,14 @@ enum {
 	UART2_IO_SEL_USB,
 };
 
+int arch_cpu_init(void)
+{
+	/* Set cif qos priority */
+	writel(QOS_PRIORITY_LEVEL(2, 2), NIU_CIF_ADDR);
+
+	return 0;
+}
+
 /*
  * Default use UART2_TX/RX_M0(TX: GPIO4_A2, RX: GPIO4_A3)
  */

commit f70f0bfd86cf8392694a891f5dc4b49db729dde7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 19 22:12:33 2018 +0800

    gpt: repair the gpt table when head or backup gpt table is invalid
    
    There is some gpt table errors when use open source tools to download
    gpt table or is destroyed by other procedure.
    Such as:
    1.Get error storage size.
    2.Download the gpt table in the error place.
    3.The gpt table is destroyed by other procedure.
    
    So test the gpt table is correct or not firstly. If the gpt table header is
    error, update the correct gpt table. If the last partition size error in
    the gpt table entry, get the size of current storage by dev_desc and update
    the last partition size.
    
    Change-Id: I0ef91a0f8462eca52924d17c5aaefcdae602267d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index bc5ce215f6..f65fceb0c6 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -339,6 +339,93 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	return 0;
 }
 
+#ifdef RKIMG_BOOTLOADER
+static void gpt_entry_modify(struct blk_desc *dev_desc,
+			     gpt_entry *gpt_pte,
+			     gpt_header *gpt_head)
+{
+	int i;
+	uint32_t calc_crc32;
+
+	for (i = 0; i < gpt_head->num_partition_entries; i++) {
+		if (!is_pte_valid(&gpt_pte[i]))
+			break;
+	}
+
+	if (gpt_pte[i - 1].ending_lba <= (dev_desc->lba - 0x22))
+		return;
+
+	gpt_pte[i - 1].ending_lba = dev_desc->lba - 0x22;
+	calc_crc32 = efi_crc32((const unsigned char *)gpt_pte,
+			       le32_to_cpu(gpt_head->num_partition_entries) *
+			       le32_to_cpu(gpt_head->sizeof_partition_entry));
+	gpt_head->partition_entry_array_crc32 = calc_crc32;
+}
+
+static int part_efi_repair(struct blk_desc *dev_desc, gpt_entry *gpt_pte,
+			   gpt_header *gpt_head, int head_gpt_valid,
+			   int backup_gpt_valid)
+{
+	uint32_t calc_crc32;
+	size_t count = 0, blk_cnt;
+	lbaint_t blk;
+
+	if (head_gpt_valid == 1 && backup_gpt_valid == 1) {
+		return 0;
+	} else if (head_gpt_valid == 0 && backup_gpt_valid == 0) {
+		return -1;
+	} else if (head_gpt_valid == 1 && backup_gpt_valid == 0) {
+		gpt_head->header_crc32 = 0;
+		gpt_head->my_lba = dev_desc->lba - 1;
+		gpt_head->alternate_lba = 1;
+		gpt_head->partition_entry_lba = dev_desc->lba - 0x21;
+		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
+				       le32_to_cpu(gpt_head->header_size));
+		gpt_head->header_crc32 = calc_crc32;
+		if (blk_dwrite(dev_desc, dev_desc->lba - 1, 1, gpt_head) != 1) {
+			printf("*** ERROR: Can't write GPT header ***\n");
+			return -1;
+		}
+		count = le32_to_cpu(gpt_head->num_partition_entries) *
+			le32_to_cpu(gpt_head->sizeof_partition_entry);
+		blk = le64_to_cpu(gpt_head->partition_entry_lba);
+		blk_cnt = BLOCK_CNT(count, dev_desc);
+		if (blk_dwrite(dev_desc, blk, (lbaint_t)blk_cnt, gpt_pte) !=
+		    blk_cnt) {
+			printf("*** ERROR: Can't write entry partitions ***\n");
+			return -1;
+		}
+		printf("Repair the backup gpt table OK!\n");
+	} else if (head_gpt_valid == 0 && backup_gpt_valid == 1) {
+		gpt_head->header_crc32 = 0;
+		gpt_head->my_lba = 1;
+		gpt_head->alternate_lba = dev_desc->lba - 1;
+		gpt_head->partition_entry_lba = 0x22;
+		gpt_entry_entry_modify(dev_desc, gpt_pte, gpt_head);
+		calc_crc32 = efi_crc32((const unsigned char *)gpt_head,
+				       le32_to_cpu(gpt_head->header_size));
+		gpt_head->header_crc32 = calc_crc32;
+		if (blk_dwrite(dev_desc, 1, 1, gpt_head) != 1) {
+			printf("*** ERROR: Can't write GPT header ***\n");
+			return -1;
+		}
+		count = le32_to_cpu(gpt_head->num_partition_entries) *
+			le32_to_cpu(gpt_head->sizeof_partition_entry);
+		blk = le64_to_cpu(gpt_head->partition_entry_lba);
+		blk_cnt = BLOCK_CNT(count, dev_desc);
+		if (blk_dwrite(dev_desc, blk, (lbaint_t)blk_cnt, gpt_pte) !=
+		    blk_cnt) {
+			printf("*** ERROR: Can't write entry partitions ***\n");
+			return -1;
+		}
+		printf("Repair the Primary gpt table OK!\n");
+	}
+
+	return 0;
+}
+#endif
+
 static int part_test_efi(struct blk_desc *dev_desc)
 {
 	ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, legacymbr, 1, dev_desc->blksz);
@@ -348,6 +435,41 @@ static int part_test_efi(struct blk_desc *dev_desc)
 		|| (is_pmbr_valid(legacymbr) != 1)) {
 		return -1;
 	}
+#ifdef RKIMG_BOOTLOADER
+	gpt_entry *h_gpt_pte = NULL;
+	gpt_header *h_gpt_head = NULL;
+	gpt_entry *b_gpt_pte = NULL;
+	gpt_header *b_gpt_head = NULL;
+	int head_gpt_valid = 0;
+	int backup_gpt_valid = 0;
+
+	if (!h_gpt_head)
+		h_gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+	if (!b_gpt_head)
+		b_gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+
+	head_gpt_valid = is_gpt_valid(dev_desc, GPT_PRIMARY_PARTITION_TABLE_LBA,
+				      h_gpt_head, &h_gpt_pte);
+	backup_gpt_valid = is_gpt_valid(dev_desc, (dev_desc->lba - 1),
+					b_gpt_head, &b_gpt_pte);
+	if (head_gpt_valid == 1 && backup_gpt_valid == 0) {
+		if (part_efi_repair(dev_desc, h_gpt_pte, h_gpt_head,
+				    head_gpt_valid, backup_gpt_valid))
+			printf("Backup GPT repair fail!\n");
+	} else if (head_gpt_valid == 0 && backup_gpt_valid == 1) {
+		if (part_efi_repair(dev_desc, b_gpt_pte, b_gpt_head,
+				    head_gpt_valid, backup_gpt_valid))
+			printf("Primary GPT repair fail!\n");
+	}
+	free(h_gpt_pte);
+	h_gpt_pte = NULL;
+	free(h_gpt_head);
+	h_gpt_head = NULL;
+	free(b_gpt_pte);
+	b_gpt_pte = NULL;
+	free(b_gpt_head);
+	b_gpt_head = NULL;
+#endif
 	return 0;
 }
 

commit f05ce84792cbd2e5573a414010d421eb8fbb7689
Author: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date:   Wed Jan 24 20:47:09 2018 +0300

    UPSTREAM: fdt: Implement weak arch_fixup_fdt()
    
    Only ARM and in some configs MIPS really implement arch_fixup_fdt().
    Others just use the same boilerplate which is not good by itself,
    but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
    and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
    apparently implemented in arch/xxx/lib/bootm.c.
    
    Now with weak arch_fixup_fdt() right in image-fdt.c where it is
    used we get both items highlighted above fixed.
    
    Change-Id: Iaac96fbb0bcc484906952ced132b10b2cead782e
    Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
    Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: York Sun <york.sun@nxp.com>
    Cc: Stefan Roese <sr@denx.de>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index a498ce5b29..17e501c0e2 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -37,11 +37,6 @@ void arch_lmb_reserve(struct lmb *lmb)
 	lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
 }
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 static int cleanup_before_linux(void)
 {
 	disable_interrupts();
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 0a286e82c2..f33ef08757 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -17,11 +17,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 int do_bootm_linux(int flag, int argc, char * const argv[],
 		   bootm_headers_t *images)
 {
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 5a9a2811ff..9dc4740768 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -253,17 +253,15 @@ static int boot_reloc_fdt(bootm_headers_t *images)
 #endif
 }
 
+#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
 int arch_fixup_fdt(void *blob)
 {
-#if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
 	u64 mem_start = virt_to_phys((void *)gd->bd->bi_memstart);
 	u64 mem_size = gd->ram_size;
 
 	return fdt_fixup_memory_banks(blob, &mem_start, &mem_size, 1);
-#else
-	return 0;
-#endif
 }
+#endif
 
 static int boot_setup_fdt(bootm_headers_t *images)
 {
diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c
index e834329e0b..a3309f8aa9 100644
--- a/arch/nds32/lib/bootm.c
+++ b/arch/nds32/lib/bootm.c
@@ -16,12 +16,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
-
 #if defined(CONFIG_SETUP_MEMORY_TAGS) || \
 	defined(CONFIG_CMDLINE_TAG) || \
 	defined(CONFIG_INITRD_TAG) || \
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 6cf8e78a33..5f14bcd28e 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -40,11 +40,6 @@ static void set_clocks_in_mhz (bd_t *kbd);
 #define CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE	(768*1024*1024)
 #endif
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 static void boot_jump_linux(bootm_headers_t *images)
 {
 	void	(*kernel)(bd_t *, ulong r4, ulong r5, ulong r6,
diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c
index 4cdd18fe14..0c9a7979d2 100644
--- a/arch/sandbox/lib/bootm.c
+++ b/arch/sandbox/lib/bootm.c
@@ -50,11 +50,6 @@ int bootz_setup(ulong image, ulong *start, ulong *end)
 	return ret;
 }
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 {
 	if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index ecd4f4e6c6..cd9f5b675c 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -28,11 +28,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define COMMAND_LINE_OFFSET 0x9000
 
-int arch_fixup_fdt(void *blob)
-{
-	return 0;
-}
-
 __weak void board_quiesce_devices(void)
 {
 }
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 6bdd15e853..c092675f4a 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -483,6 +483,11 @@ __weak int ft_verify_fdt(void *fdt)
 	return 1;
 }
 
+__weak int arch_fixup_fdt(void *blob)
+{
+	return 0;
+}
+
 int image_setup_libfdt(bootm_headers_t *images, void *blob,
 		       int of_size, struct lmb *lmb)
 {

commit 0e00a84cdedf7a1949486746225b35984b351eca
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Mar 5 01:20:11 2018 +0900

    UPSTREAM: libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
    
    Thomas reported U-Boot failed to build host tools if libfdt-devel
    package is installed because tools include libfdt headers from
    /usr/include/ instead of using internal ones.
    
    This commit moves the header code:
      include/libfdt.h         -> include/linux/libfdt.h
      include/libfdt_env.h     -> include/linux/libfdt_env.h
    
    and replaces include directives:
      #include <libfdt.h>      -> #include <linux/libfdt.h>
      #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>
    
    Change-Id: I6c0f7e50e8b571106627f25ddac008a62bd2994e
    Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index d21ad39f8a..eb3e287b7d 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/io.h>
 #include <asm/processor.h>
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index 707dad4829..204187c1b4 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -21,7 +21,7 @@
 #include <linux/ctype.h>
 #include <linux/types.h>
 #include <asm/global_data.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/armv7.h>
 #include <asm/psci.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index c9252751db..247a1833bc 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <efi_loader.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <phy.h>
 #ifdef CONFIG_FSL_LSCH3
diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c
index ec1c9b8ddb..195901a7a7 100644
--- a/arch/arm/cpu/armv8/spin_table.c
+++ b/arch/arm/cpu/armv8/spin_table.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/spin_table.h>
 
 int spin_table_update_dt(void *fdt)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index fd2f101992..61f64715bb 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -19,7 +19,7 @@
 #include <image.h>
 #include <u-boot/zlib.h>
 #include <asm/byteorder.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <mapmem.h>
 #include <fdt_support.h>
 #include <asm/bootm.h>
diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c
index 05e0ad6e70..5502ea23c9 100644
--- a/arch/arm/lib/psci-dt.c
+++ b/arch/arm/lib/psci-dt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <linux/sizes.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c
index 590e92f4e1..777e7b36dc 100644
--- a/arch/arm/mach-imx/mx6/litesom.c
+++ b/arch/arm/mach-imx/mx6/litesom.c
@@ -77,7 +77,7 @@ int litesom_mmc_init(bd_t *bis)
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c
index f8d7e8ee68..2de1321b56 100644
--- a/arch/arm/mach-imx/mx6/opos6ul.c
+++ b/arch/arm/mach-imx/mx6/opos6ul.c
@@ -154,7 +154,7 @@ int dram_init(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <asm/arch/opos6ul.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 
 #define USDHC_PAD_CTRL (                                       \
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index e89c6aace9..3d6d69a096 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/err.h>
 #include <asm/arch/gxbb.h>
 #include <asm/arch/sm.h>
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 69cb21d052..3c84043a2c 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 #include <asm/io.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c
index 6499eec4ea..b9214f7bd9 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c
index 38e7d33cb3..ce7e913b70 100644
--- a/arch/arm/mach-mvebu/armada8k/cpu.c
+++ b/arch/arm/mach-mvebu/armada8k/cpu.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-omap2/am33xx/fdt.c b/arch/arm/mach-omap2/am33xx/fdt.c
index 02e8243800..fa99dc76d3 100644
--- a/arch/arm/mach-omap2/am33xx/fdt.c
+++ b/arch/arm/mach-omap2/am33xx/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <malloc.h>
 
diff --git a/arch/arm/mach-omap2/fdt-common.c b/arch/arm/mach-omap2/fdt-common.c
index 9297e9db48..3c368ba93b 100644
--- a/arch/arm/mach-omap2/fdt-common.c
+++ b/arch/arm/mach-omap2/fdt-common.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include <asm/omap_common.h>
diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c
index 1e556da9be..3aae94d560 100644
--- a/arch/arm/mach-omap2/omap5/fdt.c
+++ b/arch/arm/mach-omap2/omap5/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <malloc.h>
 
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 00eff90275..692466c3e1 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -8,7 +8,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <altera.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 2f1da740fb..e3054e98b9 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -8,7 +8,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <altera.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index b9a2cbe148..23b57c3a64 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <nand.h>
 #include <linux/io.h>
 #include <../drivers/mtd/nand/denali.h>
diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index 9bfc4c2541..104ed90fe9 100644
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/kernel.h>
 
 #include "init.h"
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index cb82621ec4..3bdebd845c 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -15,7 +15,7 @@
 #include <command.h>
 #include <mpc83xx.h>
 #include <asm/processor.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <tsec.h>
 #include <netdev.h>
 #include <fsl_esdhc.h>
diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index 3ac4eb1dd8..5250571250 100644
--- a/arch/powerpc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/processor.h>
 
diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index c7ea94cab5..bf41c69d88 100644
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -11,7 +11,7 @@
 #include <pci.h>
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #endif
 
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 297dc4af48..bae081a1f9 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/processor.h>
 #include <linux/ctype.h>
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index 7a4465fefc..6cfe2f6759 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c
index 3777c6faa1..abb12837d2 100644
--- a/arch/powerpc/cpu/mpc85xx/portals.c
+++ b/arch/powerpc/cpu/mpc85xx/portals.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include <asm/processor.h>
diff --git a/arch/powerpc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c
index 30fbf14f1b..948ad8fa1c 100644
--- a/arch/powerpc/cpu/mpc86xx/fdt.c
+++ b/arch/powerpc/cpu/mpc86xx/fdt.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/mp.h>
 
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 1e0ea28a91..1120fd7441 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -28,7 +28,7 @@
 #include <asm/io.h>
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #endif
 
diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index f9b74ded5a..9c46762418 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -7,7 +7,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 9cc1676b60..1f928bd136 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/mp.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index b9ae24dc98..6cf8e78a33 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -22,7 +22,7 @@
 #include <vxworks.h>
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #endif
 
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 01991049cc..38b5d68afc 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -6,7 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <os.h>
 #include <asm/io.h>
 #include <asm/state.h>
diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c
index eac5b781e9..8813258754 100644
--- a/arch/x86/cpu/intel_common/microcode.c
+++ b/arch/x86/cpu/intel_common/microcode.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/cpu.h>
 #include <asm/microcode.h>
 #include <asm/msr.h>
diff --git a/board/Arcturus/ucp1020/ucp1020.c b/board/Arcturus/ucp1020/ucp1020.c
index 3f786a2014..00bda7a4fc 100644
--- a/board/Arcturus/ucp1020/ucp1020.c
+++ b/board/Arcturus/ucp1020/ucp1020.c
@@ -15,7 +15,7 @@
 #include <pci.h>
 #include <i2c.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/armltd/vexpress/vexpress_tc2.c b/board/armltd/vexpress/vexpress_tc2.c
index c7adf950f5..b143e04097 100644
--- a/board/armltd/vexpress/vexpress_tc2.c
+++ b/board/armltd/vexpress/vexpress_tc2.c
@@ -11,7 +11,7 @@
 #include <asm/io.h>
 #include <asm/u-boot.h>
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define SCC_BASE	0x7fff0000
 
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index 2ed66d3ba3..3609f2219c 100644
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -766,7 +766,7 @@ int board_late_init(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spi_flash.h>
 #include <spi.h>
 
diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
index fb128f5d4c..2f78e37b24 100644
--- a/board/el/el6x/el6x.c
+++ b/board/el/el6x/el6x.c
@@ -480,7 +480,7 @@ int checkboard(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
 	.dram_sdclk_0 =  0x00020030,
diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c
index 36a55195df..35a1538c00 100644
--- a/board/esd/vme8349/vme8349.c
+++ b/board/esd/vme8349/vme8349.c
@@ -17,7 +17,7 @@
 #include <mpc83xx.h>
 #include <asm/mpc8349_pci.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 #include <asm/io.h>
 #include <asm/mmu.h>
diff --git a/board/freescale/b4860qds/pci.c b/board/freescale/b4860qds/pci.c
index d9ccac7a6a..1216d63299 100644
--- a/board/freescale/b4860qds/pci.c
+++ b/board/freescale/b4860qds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/bsc9131rdb/bsc9131rdb.c b/board/freescale/bsc9131rdb/bsc9131rdb.c
index c642e88a09..9b105765bd 100644
--- a/board/freescale/bsc9131rdb/bsc9131rdb.c
+++ b/board/freescale/bsc9131rdb/bsc9131rdb.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c
index ed0b453e54..7a93e7c89a 100644
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/c29xpcie/c29xpcie.c b/board/freescale/c29xpcie/c29xpcie.c
index 23901a4f96..9d2888d867 100644
--- a/board/freescale/c29xpcie/c29xpcie.c
+++ b/board/freescale/c29xpcie/c29xpcie.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/common/cds_pci_ft.c b/board/freescale/common/cds_pci_ft.c
index 571dfbbaad..90bd7bc9e2 100644
--- a/board/freescale/common/cds_pci_ft.c
+++ b/board/freescale/common/cds_pci_ft.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include "cadmus.h"
 
diff --git a/board/freescale/common/fman.c b/board/freescale/common/fman.c
index b5025ab14e..e6952b5e55 100644
--- a/board/freescale/common/fman.c
+++ b/board/freescale/common/fman.c
@@ -5,8 +5,8 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
-#include <libfdt_env.h>
+#include <linux/libfdt.h>
+#include <linux/libfdt_env.h>
 #include <fdt_support.h>
 
 #include <fm_eth.h>
diff --git a/board/freescale/common/p_corenet/pci.c b/board/freescale/common/p_corenet/pci.c
index 9f4f808376..ccea8b17cf 100644
--- a/board/freescale/common/p_corenet/pci.c
+++ b/board/freescale/common/p_corenet/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/common/sgmii_riser.c b/board/freescale/common/sgmii_riser.c
index 5c3c59375c..f3e0fb2cd5 100644
--- a/board/freescale/common/sgmii_riser.c
+++ b/board/freescale/common/sgmii_riser.c
@@ -15,7 +15,7 @@
 #include <config.h>
 #include <common.h>
 #include <net.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <tsec.h>
 #include <fdt_support.h>
 
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c
index 3411bed276..e8639e09ad 100644
--- a/board/freescale/ls1043aqds/eth.c
+++ b/board/freescale/ls1043aqds/eth.c
@@ -11,7 +11,7 @@
 #include <fm_eth.h>
 #include <fsl_mdio.h>
 #include <fsl_dtsec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <asm/arch/fsl_serdes.h>
 
diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c
index 41417e9dc6..e1da73fb1a 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -11,7 +11,7 @@
 #include <fsl_ddr.h>
 #include <asm/io.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <environment.h>
 #include <asm/arch/soc.h>
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 83773d0af5..0f42b0d7f6 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -11,7 +11,7 @@
 #include <fsl_ddr.h>
 #include <asm/io.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <environment.h>
 #include <i2c.h>
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 07ba0266d5..6435e1aa33 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -13,7 +13,7 @@
 #include <asm/io.h>
 #include <hwconfig.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <environment.h>
 #include <efi_loader.h>
diff --git a/board/freescale/mpc8308rdb/mpc8308rdb.c b/board/freescale/mpc8308rdb/mpc8308rdb.c
index b4a0dd5d1a..93c7200509 100644
--- a/board/freescale/mpc8308rdb/mpc8308rdb.c
+++ b/board/freescale/mpc8308rdb/mpc8308rdb.c
@@ -9,7 +9,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c
index 8974378326..6587c6f41a 100644
--- a/board/freescale/mpc8313erdb/mpc8313erdb.c
+++ b/board/freescale/mpc8313erdb/mpc8313erdb.c
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c
index 22f1565b4c..52e2ce3bdd 100644
--- a/board/freescale/mpc8315erdb/mpc8315erdb.c
+++ b/board/freescale/mpc8315erdb/mpc8315erdb.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <hwconfig.h>
 #include <i2c.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
index b715d8363e..772688186b 100644
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -15,7 +15,7 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <command.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #if defined(CONFIG_PCI)
 #include <pci.h>
 #endif
diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c
index b49e03e4f9..c960228701 100644
--- a/board/freescale/mpc832xemds/mpc832xemds.c
+++ b/board/freescale/mpc832xemds/mpc832xemds.c
@@ -17,7 +17,7 @@
 #endif
 #include <asm/mmu.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 #if defined(CONFIG_PQ_MDS_PIB)
 #include "../common/pq-mds-pib.h"
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 5f502e2a65..2dc26f2bf7 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -19,7 +19,7 @@
 #endif
 
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index 895e9ffda6..2818c5d5ee 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -17,7 +17,7 @@
 #include <spd_sdram.h>
 #include <asm/mmu.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 233049227f..7a470647fd 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -12,7 +12,7 @@
 #include <asm/fsl_mpc83xx_serdes.h>
 #include <spd_sdram.h>
 #include <tsec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index cede1da634..51cb637606 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -17,7 +17,7 @@
 #include <asm/fsl_serdes.h>
 #include <spd.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spd_sdram.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index 7b264dddd1..33ced17a64 100644
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -14,7 +14,7 @@
 #include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include "../common/cadmus.h"
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 66fb228a90..a283365ba7 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -15,7 +15,7 @@
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index de76d36174..7574b1d4a0 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -15,7 +15,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <tsec.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index de5f5669e6..9c74bfdd1d 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -12,7 +12,7 @@
 #include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include "../common/cadmus.h"
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index a5c5d9dd1a..4ad4270899 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -17,7 +17,7 @@
 #include <spd_sdram.h>
 #include <i2c.h>
 #include <ioports.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 #include "bcsr.h"
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 122490c026..8e72864bec 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -21,7 +21,7 @@
 #include <spd_sdram.h>
 #include <i2c.h>
 #include <ioports.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
 #include <phy.h>
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 93d54f5c4a..f6a34b5124 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -16,7 +16,7 @@
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <tsec.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index d97562c849..0c307793bf 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -14,7 +14,7 @@
 #include <asm/fsl_serdes.h>
 #include <i2c.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <spd_sdram.h>
 #include <netdev.h>
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 2604a51e91..2714cacfbe 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -12,7 +12,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
 
diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index 15ca0294f5..f7159f88a4 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -776,7 +776,7 @@ int board_ehci_power(int port, int on)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 5b50bc815f..72954a81db 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -722,7 +722,7 @@ int checkboard(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index 8afd5da49f..635b20dff0 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -303,7 +303,7 @@ int checkboard(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define USDHC1_CD_GPIO	IMX_GPIO_NR(4, 7)
 #define USDHC2_CD_GPIO	IMX_GPIO_NR(5, 0)
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 2aeef61ffd..47367846c0 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -548,7 +548,7 @@ int checkboard(void)
 }
 
 #ifdef CONFIG_SPL_BUILD
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index cf7a069c56..a7b0fa86e0 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -696,7 +696,7 @@ int checkboard(void)
 }
 
 #ifdef CONFIG_SPL_BUILD
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index aa04e993c4..2ad147f182 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -11,7 +11,7 @@
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index bf493262d0..4e3c824e75 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -17,7 +17,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/p1023rdb/p1023rdb.c b/board/freescale/p1023rdb/p1023rdb.c
index ccda824125..05abf371c4 100644
--- a/board/freescale/p1023rdb/p1023rdb.c
+++ b/board/freescale/p1023rdb/p1023rdb.c
@@ -18,7 +18,7 @@
 #include <asm/fsl_pci.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_portals.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
 #include <malloc.h>
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 31c8ed9ae1..4b792cf6ee 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -20,7 +20,7 @@
 #include <asm/fsl_lbc.h>
 #include <asm/mp.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/p1_twr/p1_twr.c b/board/freescale/p1_twr/p1_twr.c
index 02c89998cb..87ae1b1734 100644
--- a/board/freescale/p1_twr/p1_twr.c
+++ b/board/freescale/p1_twr/p1_twr.c
@@ -20,7 +20,7 @@
 #include <asm/fsl_lbc.h>
 #include <asm/mp.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c
index cf5023c505..2353f3ff1f 100644
--- a/board/freescale/qemu-ppce500/qemu-ppce500.c
+++ b/board/freescale/qemu-ppce500/qemu-ppce500.c
@@ -11,7 +11,7 @@
 #include <asm/mmu.h>
 #include <asm/fsl_pci.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
 #include <fdtdec.h>
diff --git a/board/freescale/t102xqds/pci.c b/board/freescale/t102xqds/pci.c
index 7369289618..5ece77993d 100644
--- a/board/freescale/t102xqds/pci.c
+++ b/board/freescale/t102xqds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t102xrdb/pci.c b/board/freescale/t102xrdb/pci.c
index ba7041af95..f13d41c77d 100644
--- a/board/freescale/t102xrdb/pci.c
+++ b/board/freescale/t102xrdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t1040qds/pci.c b/board/freescale/t1040qds/pci.c
index c53e3b76a4..68ee74b785 100644
--- a/board/freescale/t1040qds/pci.c
+++ b/board/freescale/t1040qds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t104xrdb/pci.c b/board/freescale/t104xrdb/pci.c
index c53e3b76a4..68ee74b785 100644
--- a/board/freescale/t104xrdb/pci.c
+++ b/board/freescale/t104xrdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t208xqds/pci.c b/board/freescale/t208xqds/pci.c
index 84a89dad4f..5a6731c12b 100644
--- a/board/freescale/t208xqds/pci.c
+++ b/board/freescale/t208xqds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t208xrdb/pci.c b/board/freescale/t208xrdb/pci.c
index ba7041af95..f13d41c77d 100644
--- a/board/freescale/t208xrdb/pci.c
+++ b/board/freescale/t208xrdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t4qds/pci.c b/board/freescale/t4qds/pci.c
index 08d74b444a..398c62bc48 100644
--- a/board/freescale/t4qds/pci.c
+++ b/board/freescale/t4qds/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/freescale/t4rdb/pci.c b/board/freescale/t4rdb/pci.c
index 6387a20cae..36cff0dac4 100644
--- a/board/freescale/t4rdb/pci.c
+++ b/board/freescale/t4rdb/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 7e485074ce..96f60bef95 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -9,7 +9,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index fec691515d..8821105061 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -9,7 +9,7 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/gdsys/p1022/controlcenterd.c b/board/gdsys/p1022/controlcenterd.c
index 9fb814d8c7..b5f445a943 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -32,7 +32,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #include <tsec.h>
diff --git a/board/ids/ids8313/ids8313.c b/board/ids/ids8313/ids8313.c
index 4433e8c77e..67818931f0 100644
--- a/board/ids/ids8313/ids8313.c
+++ b/board/ids/ids8313/ids8313.c
@@ -15,7 +15,7 @@
 #include <common.h>
 #include <mpc83xx.h>
 #include <spi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 /** CPLD contains the info about:
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 5e07faa818..81835e8493 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -23,7 +23,7 @@
 #include <asm/mmu.h>
 #include <asm/processor.h>
 #include <pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <post.h>
 
 #include "../common/common.h"
diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c
index b827e43a7a..b2c3679719 100644
--- a/board/keymile/kmp204x/pci.c
+++ b/board/keymile/kmp204x/pci.c
@@ -11,7 +11,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 #include <linux/errno.h>
diff --git a/board/mpc8308_p1m/mpc8308_p1m.c b/board/mpc8308_p1m/mpc8308_p1m.c
index 234a387801..e96645f82d 100644
--- a/board/mpc8308_p1m/mpc8308_p1m.c
+++ b/board/mpc8308_p1m/mpc8308_p1m.c
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <i2c.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
index 1538158987..277590f4a9 100644
--- a/board/phytec/pcm058/pcm058.c
+++ b/board/phytec/pcm058/pcm058.c
@@ -397,7 +397,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
 	.dram_sdclk_0 = 0x00000030,
diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
index 136f1d5e70..18ff9efeb1 100644
--- a/board/phytec/pfla02/pfla02.c
+++ b/board/phytec/pfla02/pfla02.c
@@ -400,7 +400,7 @@ int board_late_init(void)
 #ifdef CONFIG_SPL_BUILD
 #include <asm/arch/mx6-ddr.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define MX6_PHYFLEX_ERR006282	IMX_GPIO_NR(2, 11)
 static void phyflex_err006282_workaround(void)
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index a3395ed680..ef87f9f0fe 100644
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -16,7 +16,7 @@
 #include <spd_sdram.h>
 #include <miiphy.h>
 #if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 25329e4473..1a48a6c89f 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -21,7 +21,7 @@
 #include <netdev.h>
 #include <tsec.h>
 #include <miiphy.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index 08ced102b6..b58e123f1f 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -20,7 +20,7 @@
 #include <asm/fsl_pci.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 004f37009a..a130b7daec 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -17,7 +17,7 @@
 #include <asm/immap_85xx.h>
 #include <ioports.h>
 #include <flash.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/io.h>
 #include <i2c.h>
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 70e01437c4..4e05faf9af 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -29,7 +29,7 @@
 #include <asm/io.h>
 #include <crc.h>
 #include <environment.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <nand.h>
 #include <net.h>
 #include <sy8106a.h>
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index ebc6c12cbc..b246c27dfe 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -892,7 +892,7 @@ void ldo_mode_set(int ldo_bypass)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "asm/arch/mx6q-ddr.h"
 #include "asm/arch/iomux.h"
 #include "asm/arch/crm_regs.h"
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index 669d9123ca..1a1f021e89 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -742,7 +742,7 @@ void ldo_mode_set(int ldo_bypass)
 
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "asm/arch/mx6dl-ddr.h"
 #include "asm/arch/iomux.h"
 #include "asm/arch/crm_regs.h"
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index b4e4727e63..6e12d279e8 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <g_dnl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #include "tdx-cfg-block.h"
 #include <asm/setup.h>
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index 14991fdb00..d13e75c207 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -20,7 +20,7 @@
 #include <asm/mach-imx/spi.h>
 #include <common.h>
 #include <fsl_esdhc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <i2c.h>
 #include <mmc.h>
 #include <power/pfuze100_pmic.h>
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c
index 1188215738..be4c132fbe 100644
--- a/board/tqc/tqma6/tqma6_mba6.c
+++ b/board/tqc/tqma6/tqma6_mba6.c
@@ -20,7 +20,7 @@
 
 #include <common.h>
 #include <fsl_esdhc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <i2c.h>
 #include <micrel.h>
diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c
index 2360cffdd9..128748fcab 100644
--- a/board/tqc/tqma6/tqma6_wru4.c
+++ b/board/tqc/tqma6/tqma6_wru4.c
@@ -23,7 +23,7 @@
 
 #include <common.h>
 #include <fsl_esdhc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <i2c.h>
 #include <micrel.h>
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 7fa1289de0..dba63d9554 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -445,7 +445,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_SPL_BUILD
 
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/arch/mx6-ddr.h>
 
 static const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = {
diff --git a/board/varisys/cyrus/pci.c b/board/varisys/cyrus/pci.c
index 4780e8c147..1853b197e7 100644
--- a/board/varisys/cyrus/pci.c
+++ b/board/varisys/cyrus/pci.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
 
diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index 3818ab96b3..bb5574c190 100644
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -10,7 +10,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 #include <mpc83xx.h>
 #include <ns16550.h>
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index cb39190c28..999d89c018 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -10,7 +10,7 @@
 
 #include <common.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
index 62375717f0..45924cdb48 100644
--- a/board/xes/common/fsl_8xxx_pci.c
+++ b/board/xes/common/fsl_8xxx_pci.c
@@ -11,7 +11,7 @@
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 
diff --git a/board/xes/xpedite520x/xpedite520x.c b/board/xes/xpedite520x/xpedite520x.c
index 6a3df52391..4b3a46c8cb 100644
--- a/board/xes/xpedite520x/xpedite520x.c
+++ b/board/xes/xpedite520x/xpedite520x.c
@@ -14,7 +14,7 @@
 #include <asm/io.h>
 #include <asm/cache.h>
 #include <asm/mmu.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pca953x.h>
 
diff --git a/board/xes/xpedite537x/xpedite537x.c b/board/xes/xpedite537x/xpedite537x.c
index 41419feb17..ae606f5ba7 100644
--- a/board/xes/xpedite537x/xpedite537x.c
+++ b/board/xes/xpedite537x/xpedite537x.c
@@ -12,7 +12,7 @@
 #include <asm/fsl_pci.h>
 #include <asm/io.h>
 #include <asm/cache.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pca953x.h>
 
diff --git a/board/xes/xpedite550x/xpedite550x.c b/board/xes/xpedite550x/xpedite550x.c
index 1f05150d0f..c90bb89dae 100644
--- a/board/xes/xpedite550x/xpedite550x.c
+++ b/board/xes/xpedite550x/xpedite550x.c
@@ -12,7 +12,7 @@
 #include <asm/fsl_pci.h>
 #include <asm/io.h>
 #include <asm/cache.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pca953x.h>
 
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index c65c619d63..52e046383d 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -11,8 +11,8 @@
 #include <dm.h>
 #include <efi_loader.h>
 #include <errno.h>
-#include <libfdt.h>
-#include <libfdt_env.h>
+#include <linux/libfdt.h>
+#include <linux/libfdt_env.h>
 #include <memalign.h>
 #include <asm/global_data.h>
 #include <asm-generic/sections.h>
diff --git a/cmd/fdt.c b/cmd/fdt.c
index b783b0df42..65661fabb2 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -13,7 +13,7 @@
 #include <linux/ctype.h>
 #include <linux/types.h>
 #include <asm/global_data.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <mapmem.h>
 #include <asm/io.h>
diff --git a/cmd/spl.c b/cmd/spl.c
index 3b8992a163..593989717f 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <cmd_spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/board_info.c b/common/board_info.c
index aa45e24b34..16cf966233 100644
--- a/common/board_info.c
+++ b/common/board_info.c
@@ -3,7 +3,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/compiler.h>
 
 int __weak checkboard(void)
diff --git a/common/boot_fit.c b/common/boot_fit.c
index add65c4bae..4b5cec58d0 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -11,7 +11,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 static int fdt_offset(const void *fit)
 {
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 7b6028b426..d3fb0aae7a 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <bootm.h>
 #include <linux/list.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rockchip_crc.h>
diff --git a/common/bootm_os.c b/common/bootm_os.c
index 31b1878dc4..5e6b1777e4 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <bootm.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <vxworks.h>
 
diff --git a/common/bootstage.c b/common/bootstage.c
index 61479d7f07..bef293ce4f 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -11,7 +11,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <linux/compiler.h>
 
diff --git a/common/common_fit.c b/common/common_fit.c
index 85b33d8c3b..3fef74084c 100644
--- a/common/common_fit.c
+++ b/common/common_fit.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 
 ulong fdt_getprop_u32(const void *fdt, int node, const char *prop)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index fc588c3340..b096762b1b 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -13,7 +13,7 @@
 #include <linux/ctype.h>
 #include <linux/types.h>
 #include <asm/global_data.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <exports.h>
 #include <fdtdec.h>
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 76e8230226..6bdd15e853 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -14,7 +14,7 @@
 #include <fdt_support.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <mapmem.h>
 #include <asm/io.h>
 
diff --git a/common/image.c b/common/image.c
index 3667e86857..f0a5c80b25 100644
--- a/common/image.c
+++ b/common/image.c
@@ -22,7 +22,7 @@
 #include <mapmem.h>
 
 #if IMAGE_ENABLE_FIT || IMAGE_ENABLE_OF_LIBFDT
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fpga.h>
 #include <xilinx.h>
diff --git a/common/lcd_simplefb.c b/common/lcd_simplefb.c
index d7e9fc9f65..81f3f42191 100644
--- a/common/lcd_simplefb.c
+++ b/common/lcd_simplefb.c
@@ -11,7 +11,7 @@
 #include <dm.h>
 #include <lcd.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <video.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index 60b85f082d..59a85a986a 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -15,7 +15,7 @@
 #include <fat.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 static int fat_registered;
 
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index ebfd5bc2e3..f97fa03800 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <spl.h>
 #include <malloc.h>
 
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index cd39f9be9d..d075985374 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -9,7 +9,7 @@
 #include <spl.h>
 #include <asm/io.h>
 #include <nand.h>
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 #include <fdt.h>
 
 #if defined(CONFIG_SPL_NAND_RAW_ONLY)
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 88831097fa..79c9b3584b 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -11,7 +11,7 @@
 #include <errno.h>
 #include <spl.h>
 #include <net.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index b2645a1948..1b1a16c9c1 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -12,7 +12,7 @@
  */
 #include <common.h>
 #include <spl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #ifndef CONFIG_SPL_LOAD_FIT_ADDRESS
 # define CONFIG_SPL_LOAD_FIT_ADDRESS	0
diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c
index ff8085b795..4ab3dcd624 100644
--- a/common/spl/spl_ymodem.c
+++ b/common/spl/spl_ymodem.c
@@ -14,7 +14,7 @@
 #include <xyzModem.h>
 #include <asm/u-boot.h>
 #include <asm/utils.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #define BUF_SIZE 1024
 
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index f164b07946..863f6ecc47 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -21,7 +21,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <linux/ctype.h>
 #include <linux/err.h>
diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c
index 4757066967..7513ea2cf7 100644
--- a/drivers/core/of_addr.c
+++ b/drivers/core/of_addr.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <linux/err.h>
diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c
index 0381909848..ca2e92b32b 100644
--- a/drivers/core/of_extra.c
+++ b/drivers/core/of_extra.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_extra.h>
 #include <dm/ofnode.h>
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 8543c9366b..3f51b6d74b 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <dm/ofnode.h>
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 1f9d8b4a3e..9d844c1090 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <regmap.h>
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 976e2c4fdd..d6dfeea263 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -11,7 +11,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <malloc.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <dm/device.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
diff --git a/drivers/core/util.c b/drivers/core/util.c
index aaaed4ec02..24abe1445b 100644
--- a/drivers/core/util.c
+++ b/drivers/core/util.c
@@ -6,7 +6,7 @@
 
 #include <common.h>
 #include <dm/util.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <vsprintf.h>
 
 #ifdef CONFIG_DM_WARN
diff --git a/drivers/crypto/fsl/sec.c b/drivers/crypto/fsl/sec.c
index 0940faf768..470e662d8e 100644
--- a/drivers/crypto/fsl/sec.c
+++ b/drivers/crypto/fsl/sec.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #if CONFIG_SYS_FSL_SEC_COMPAT == 2 || CONFIG_SYS_FSL_SEC_COMPAT >= 4
 #include <fsl_sec.h>
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index ab72b984fc..8c72db997c 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/lists.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/arm-smccc.h>
 #include <linux/errno.h>
 #include <linux/psci.h>
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 5edd383c68..7d823814ad 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <dwmmc.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <errno.h>
 #include <asm/arch/dwmmc.h>
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 4f0a8e7ab2..2852fa71f2 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <sdhci.h>
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 95447310ab..6007a8ab64 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -10,7 +10,7 @@
 #include <malloc.h>
 #include <sdhci.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/clk.h>
diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c
index f83c1d7241..e027642008 100644
--- a/drivers/mmc/sdhci-cadence.c
+++ b/drivers/mmc/sdhci-cadence.c
@@ -10,7 +10,7 @@
 #include <linux/io.h>
 #include <linux/iopoll.h>
 #include <linux/sizes.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <mmc.h>
 #include <sdhci.h>
 
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 759686ccd6..9ace505fe4 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -11,7 +11,7 @@
 #include <dwmmc.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/err.h>
 #include <malloc.h>
 
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 5d8ee35a19..f41e628222 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -18,7 +18,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <sdhci.h>
 
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 0fddb420dc..4a5600f31f 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <sdhci.h>
 
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index bdb6792c72..d90d150b29 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -8,7 +8,7 @@
 #include <errno.h>
 #include <linux/bug.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <net.h>
 #include <fdt_support.h>
 #include <fsl-mc/fsl_mc.h>
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index df76a94144..11104dcc69 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -886,7 +886,7 @@ int fsl_pcie_init_board(int busno)
 #endif
 
 #ifdef CONFIG_OF_BOARD_SETUP
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 
 void ft_fsl_pci_setup(void *blob, const char *pci_compat,
diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index 0f8e3c9fcb..dcea192418 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -8,7 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 #include <dm/lists.h>
 
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 9e6c2f5dfc..b4a5ac6bc6 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -12,7 +12,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #ifdef CONFIG_OF_BOARD_SETUP
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #ifdef CONFIG_ARM
 #include <asm/arch/clock.h>
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index a38d774ddc..72f99be7e6 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index 5abfeba3bf..a0a326a142 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <linux/libfdt.h>
 #include <linux/err.h>
 #include <linux/list.h>
 #include <dm.h>
diff --git a/drivers/power/pmic/act8846.c b/drivers/power/pmic/act8846.c
index a6b0940956..7d107f4427 100644
--- a/drivers/power/pmic/act8846.c
+++ b/drivers/power/pmic/act8846.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <power/act8846_pmic.h>
 #include <power/pmic.h>
 
diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c
index 001e69553e..9e5b0b119b 100644
--- a/drivers/power/pmic/rn5t567.c
+++ b/drivers/power/pmic/rn5t567.c
@@ -9,7 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <power/rn5t567_pmic.h>
 #include <power/pmic.h>
 
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 4f48f984ab..9bbdc60353 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_qe.h>
 
diff --git a/drivers/sound/rockchip-sound.c b/drivers/sound/rockchip-sound.c
index cf58725907..cb26eeba4f 100644
--- a/drivers/sound/rockchip-sound.c
+++ b/drivers/sound/rockchip-sound.c
@@ -7,7 +7,7 @@
 #include <malloc.h>
 #include <common.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #include <i2s.h>
 #include <sound.h>
diff --git a/drivers/sound/sound-i2s.c b/drivers/sound/sound-i2s.c
index 749bbbd031..be69fb0b01 100644
--- a/drivers/sound/sound-i2s.c
+++ b/drivers/sound/sound-i2s.c
@@ -8,7 +8,7 @@
 #include <malloc.h>
 #include <common.h>
 #include <asm/io.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #include <i2c.h>
 #include <i2s.h>
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index e8432bb016..69cf11cbf5 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -8,7 +8,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/usb/otg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 30297b02d3..a2c6d5abfb 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <usb.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 2c0c63322c..79f655889e 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -12,7 +12,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <usb.h>
 #include <usb/ehci-ci.h>
 #include <usb/ulpi.h>
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 1c72330b0c..f317cf00ea 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -16,7 +16,7 @@
 #include <asm/arch-tegra/clk_rst.h>
 #include <usb.h>
 #include <usb/ulpi.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 #include "ehci.h"
 
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index 5bb3763814..3d63cfa193 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -20,7 +20,7 @@
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/regs-usbphy.h>
 #include <usb/ehci-ci.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 
 #include "ehci.h"
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c
index bf7286554e..6f08d5d5a2 100644
--- a/drivers/usb/host/xhci-exynos5.c
+++ b/drivers/usb/host/xhci-exynos5.c
@@ -16,7 +16,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <usb.h>
 #include <watchdog.h>
diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index d5f1199546..a6e071290a 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -8,7 +8,6 @@
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <fdtdec.h>
-#include <libfdt.h>
 #include <syscon.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 0d13a640d4..804f2ac8ce 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -8,7 +8,7 @@
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <linux/hdmi.h>
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 092342e7ad..f7a1116a30 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -11,7 +11,7 @@
 #include <common.h>
 #include <display.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <video_bridge.h>
 #include <linux/compat.h>
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index aae78a8159..f84dd7097f 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -13,7 +13,7 @@
 #include <asm/arch/dp_info.h>
 #include <asm/arch/dp.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "exynos_dp_lowlevel.h"
 
 /* Declare global data pointer */
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 6ca17f2db2..a2879a9c57 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -13,7 +13,7 @@
 #include <div64.h>
 #include <dm.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <panel.h>
 #include <video.h>
 #include <video_bridge.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index a5d9b59218..724d08f7ae 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <asm/arch/dsim.h>
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 4f4b48ebb0..fff6ae916e 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -10,7 +10,7 @@
 
 #ifdef CONFIG_OF_LIBFDT
 
-#include <libfdt.h>
+#include <linux/libfdt.h>
 
 u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
 				const char *prop, const u32 dflt);
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 5592527fda..bb3643690e 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -14,7 +14,7 @@
  * changes to support FDT are minimized.
  */
 
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <pci.h>
 
 /*
diff --git a/include/image.h b/include/image.h
index d8892114e7..7b2e314974 100644
--- a/include/image.h
+++ b/include/image.h
@@ -53,7 +53,7 @@ struct lmb;
 
 #if IMAGE_ENABLE_FIT
 #include <hash.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdt_support.h>
 # ifdef CONFIG_SPL_BUILD
 #  ifdef CONFIG_SPL_CRC32_SUPPORT
diff --git a/include/libfdt.h b/include/libfdt.h
deleted file mode 100755
index f0821d8a0e..0000000000
--- a/include/libfdt.h
+++ /dev/null
@@ -1,315 +0,0 @@
-#ifndef UBOOT_LIBFDT_H
-#define UBOOT_LIBFDT_H
-/*
- * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
- */
-
-#ifdef USE_HOSTCC
-#include "../scripts/dtc/libfdt/libfdt.h"
-#else
-#include <linux/libfdt.h>
-#endif
-
-/* U-Boot local hacks */
-
-#ifndef SWIG /* Not available in Python */
-struct fdt_region {
-	int offset;
-	int size;
-};
-
-/*
- * Flags for fdt_find_regions()
- *
- * Add a region for the string table (always the last region)
- */
-#define FDT_REG_ADD_STRING_TAB		(1 << 0)
-
-/*
- * Add all supernodes of a matching node/property, useful for creating a
- * valid subset tree
- */
-#define FDT_REG_SUPERNODES		(1 << 1)
-
-/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
-#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
-
-/* Add all subnodes of a matching node */
-#define FDT_REG_ALL_SUBNODES		(1 << 3)
-
-/* Add a region for the mem_rsvmap table (always the first region) */
-#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
-
-/* Indicates what an fdt part is (node, property, value) */
-#define FDT_IS_NODE			(1 << 0)
-#define FDT_IS_PROP			(1 << 1)
-#define FDT_IS_VALUE			(1 << 2)	/* not supported */
-#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
-#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
-
-#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
-					FDT_IS_COMPAT)
-#define FDT_IS_ANY			0x1f		/* all the above */
-
-/* We set a reasonable limit on the number of nested nodes */
-#define FDT_MAX_DEPTH			32
-
-/* Decribes what we want to include from the current tag */
-enum want_t {
-	WANT_NOTHING,
-	WANT_NODES_ONLY,		/* No properties */
-	WANT_NODES_AND_PROPS,		/* Everything for one level */
-	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
-};
-
-/* Keeps track of the state at parent nodes */
-struct fdt_subnode_stack {
-	int offset;		/* Offset of node */
-	enum want_t want;	/* The 'want' value here */
-	int included;		/* 1 if we included this node, 0 if not */
-};
-
-struct fdt_region_ptrs {
-	int depth;			/* Current tree depth */
-	int done;			/* What we have completed scanning */
-	enum want_t want;		/* What we are currently including */
-	char *end;			/* Pointer to end of full node path */
-	int nextoffset;			/* Next node offset to check */
-};
-
-/* The state of our finding algortihm */
-struct fdt_region_state {
-	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
-	struct fdt_region *region;	/* Contains list of regions found */
-	int count;			/* Numnber of regions found */
-	const void *fdt;		/* FDT blob */
-	int max_regions;		/* Maximum regions to find */
-	int can_merge;		/* 1 if we can merge with previous region */
-	int start;			/* Start position of current region */
-	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
-};
-
-/**
- * fdt_find_regions() - find regions in device tree
- *
- * Given a list of nodes to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- *
- * Nodes which are given in 'inc' are included in the region list, as
- * are the names of the immediate subnodes nodes (but not the properties
- * or subnodes of those subnodes).
- *
- * For eaxample "/" means to include the root node, all root properties
- * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
- * ensures that we capture the names of the subnodes. In a hashing situation
- * it prevents the root node from changing at all Any change to non-excluded
- * properties, names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too.
- *
- * The device tree header is not included in the list.
- *
- * @fdt:	Device tree to check
- * @inc:	List of node paths to included
- * @inc_count:	Number of node paths in list
- * @exc_prop:	List of properties names to exclude
- * @exc_prop_count:	Number of properties in exclude list
- * @region:	Returns list of regions
- * @max_region:	Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @add_string_tab:	1 to add a region for the string table
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again.
- */
-int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
-		     char * const exc_prop[], int exc_prop_count,
-		     struct fdt_region region[], int max_regions,
-		     char *path, int path_len, int add_string_tab);
-
-/**
- * fdt_first_region() - find regions in device tree
- *
- * Given a nodes and properties to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The use for this function is twofold. Firstly it provides a convenient
- * way of performing a structure-aware grep of the tree. For example it is
- * possible to grep for a node and get all the properties associated with
- * that node. Trees can be subsetted easily, by specifying the nodes that
- * are required, and then writing out the regions returned by this function.
- * This is useful for small resource-constrained systems, such as boot
- * loaders, which want to use an FDT but do not need to know about all of
- * it.
- *
- * Secondly it makes it easy to hash parts of the tree and detect changes.
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- * Note that semantically null changes in order could still cause false
- * hash misses. Such reordering might happen if the tree is regenerated
- * from source, and nodes are reordered (the bytes-stream will be emitted
- * in a different order and many hash functions will detect this). However
- * if an existing tree is modified using libfdt functions, such as
- * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
- *
- * The nodes/properties to include/exclude are defined by a function
- * provided by the caller. This function is called for each node and
- * property, and must return:
- *
- *    0 - to exclude this part
- *    1 - to include this part
- *   -1 - for FDT_IS_PROP only: no information is available, so include
- *		if its containing node is included
- *
- * The last case is only used to deal with properties. Often a property is
- * included if its containing node is included - this is the case where
- * -1 is returned.. However if the property is specifically required to be
- * included/excluded, then 0 or 1 can be returned. Note that including a
- * property when the FDT_REG_SUPERNODES flag is given will force its
- * containing node to be included since it is not valid to have a property
- * that is not in a node.
- *
- * Using the information provided, the inclusion of a node can be controlled
- * either by a node name or its compatible string, or any other property
- * that the function can determine.
- *
- * As an example, including node "/" means to include the root node and all
- * root properties. A flag provides a way of also including supernodes (of
- * which there is none for the root node), and another flag includes
- * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
- * FDT_END_NODE of all subnodes of /.
- *
- * The subnode feature helps in a hashing situation since it prevents the
- * root node from changing at all. Any change to non-excluded properties,
- * names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too. This is always
- * the last region.
- *
- * The FDT also has a mem_rsvmap table which can also be included, and is
- * always the first region if so.
- *
- * The device tree header is not included in the region list. Since the
- * contents of the FDT are changing (shrinking, often), the caller will need
- * to regenerate the header anyway.
- *
- * @fdt:	Device tree to check
- * @h_include:	Function to call to determine whether to include a part or
- *		not:
- *
- *		@priv: Private pointer as passed to fdt_find_regions()
- *		@fdt: Pointer to FDT blob
- *		@offset: Offset of this node / property
- *		@type: Type of this part, FDT_IS_...
- *		@data: Pointer to data (node name, property name, compatible
- *			string, value (not yet supported)
- *		@size: Size of data, or 0 if none
- *		@return 0 to exclude, 1 to include, -1 if no information is
- *		available
- * @priv:	Private pointer passed to h_include
- * @region:	Returns list of regions, sorted by offset
- * @max_regions: Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @flags:	Various flags that control the region algortihm, see
- *		FDT_REG_...
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again. Only the first max_regions elements are available in the
- * array.
- *
- * On error a -ve value is return, which can be:
- *
- *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
- *	-FDT_ERR_BADLAYOUT
- *	-FDT_ERR_NOSPACE (path area is too small)
- */
-int fdt_first_region(const void *fdt,
-		     int (*h_include)(void *priv, const void *fdt, int offset,
-				      int type, const char *data, int size),
-		     void *priv, struct fdt_region *region,
-		     char *path, int path_len, int flags,
-		     struct fdt_region_state *info);
-
-/** fdt_next_region() - find next region
- *
- * See fdt_first_region() for full description. This function finds the
- * next region according to the provided parameters, which must be the same
- * as passed to fdt_first_region().
- *
- * This function can additionally return -FDT_ERR_NOTFOUND when there are no
- * more regions
- */
-int fdt_next_region(const void *fdt,
-		    int (*h_include)(void *priv, const void *fdt, int offset,
-				     int type, const char *data, int size),
-		    void *priv, struct fdt_region *region,
-		    char *path, int path_len, int flags,
-		    struct fdt_region_state *info);
-
-/**
- * fdt_add_alias_regions() - find aliases that point to existing regions
- *
- * Once a device tree grep is complete some of the nodes will be present
- * and some will have been dropped. This function checks all the alias nodes
- * to figure out which points point to nodes which are still present. These
- * aliases need to be kept, along with the nodes they reference.
- *
- * Given a list of regions function finds the aliases that still apply and
- * adds more regions to the list for these. This function is called after
- * fdt_next_region() has finished returning regions and requires the same
- * state.
- *
- * @fdt:	Device tree file to reference
- * @region:	List of regions that will be kept
- * @count:	Number of regions
- * @max_regions: Number of entries that can fit in @region
- * @info:	Region state as returned from fdt_next_region()
- * @return new number of regions in @region (i.e. count + the number added)
- * or -FDT_ERR_NOSPACE if there was not enough space.
- */
-int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
-			  int max_regions, struct fdt_region_state *info);
-#endif /* SWIG */
-
-extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
-
-#endif /* UBOOT_LIBFDT_H */
diff --git a/include/libfdt_env.h b/include/libfdt_env.h
deleted file mode 100644
index d7e9d32863..0000000000
--- a/include/libfdt_env.h
+++ /dev/null
@@ -1,5 +0,0 @@
-#ifdef USE_HOSTCC
-#include "../scripts/dtc/libfdt/libfdt_env.h"
-#else
-#include <linux/libfdt_env.h>
-#endif
diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h
index 2a663c6bb4..eeb2344971 100644
--- a/include/linux/libfdt.h
+++ b/include/linux/libfdt.h
@@ -1,17 +1,312 @@
-#ifndef _LIBFDT_ENV_H
-#define _LIBFDT_ENV_H
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _INCLUDE_LIBFDT_H_
+#define _INCLUDE_LIBFDT_H_
 
-#include <linux/string.h>
+#ifndef USE_HOSTCC
+#include <linux/libfdt_env.h>
+#endif
+#include "../../scripts/dtc/libfdt/libfdt.h"
 
-#include <asm/byteorder.h>
+/* U-Boot local hacks */
 
-typedef __be16 fdt16_t;
-typedef __be32 fdt32_t;
-typedef __be64 fdt64_t;
+#ifndef SWIG /* Not available in Python */
+struct fdt_region {
+	int offset;
+	int size;
+};
 
-#define fdt32_to_cpu(x) be32_to_cpu(x)
-#define cpu_to_fdt32(x) cpu_to_be32(x)
-#define fdt64_to_cpu(x) be64_to_cpu(x)
-#define cpu_to_fdt64(x) cpu_to_be64(x)
+/*
+ * Flags for fdt_find_regions()
+ *
+ * Add a region for the string table (always the last region)
+ */
+#define FDT_REG_ADD_STRING_TAB		(1 << 0)
 
-#endif /* _LIBFDT_ENV_H */
+/*
+ * Add all supernodes of a matching node/property, useful for creating a
+ * valid subset tree
+ */
+#define FDT_REG_SUPERNODES		(1 << 1)
+
+/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
+#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
+
+/* Add all subnodes of a matching node */
+#define FDT_REG_ALL_SUBNODES		(1 << 3)
+
+/* Add a region for the mem_rsvmap table (always the first region) */
+#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
+
+/* Indicates what an fdt part is (node, property, value) */
+#define FDT_IS_NODE			(1 << 0)
+#define FDT_IS_PROP			(1 << 1)
+#define FDT_IS_VALUE			(1 << 2)	/* not supported */
+#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
+#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
+
+#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
+					FDT_IS_COMPAT)
+#define FDT_IS_ANY			0x1f		/* all the above */
+
+/* We set a reasonable limit on the number of nested nodes */
+#define FDT_MAX_DEPTH			32
+
+/* Decribes what we want to include from the current tag */
+enum want_t {
+	WANT_NOTHING,
+	WANT_NODES_ONLY,		/* No properties */
+	WANT_NODES_AND_PROPS,		/* Everything for one level */
+	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
+};
+
+/* Keeps track of the state at parent nodes */
+struct fdt_subnode_stack {
+	int offset;		/* Offset of node */
+	enum want_t want;	/* The 'want' value here */
+	int included;		/* 1 if we included this node, 0 if not */
+};
+
+struct fdt_region_ptrs {
+	int depth;			/* Current tree depth */
+	int done;			/* What we have completed scanning */
+	enum want_t want;		/* What we are currently including */
+	char *end;			/* Pointer to end of full node path */
+	int nextoffset;			/* Next node offset to check */
+};
+
+/* The state of our finding algortihm */
+struct fdt_region_state {
+	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
+	struct fdt_region *region;	/* Contains list of regions found */
+	int count;			/* Numnber of regions found */
+	const void *fdt;		/* FDT blob */
+	int max_regions;		/* Maximum regions to find */
+	int can_merge;		/* 1 if we can merge with previous region */
+	int start;			/* Start position of current region */
+	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
+};
+
+/**
+ * fdt_find_regions() - find regions in device tree
+ *
+ * Given a list of nodes to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ *
+ * Nodes which are given in 'inc' are included in the region list, as
+ * are the names of the immediate subnodes nodes (but not the properties
+ * or subnodes of those subnodes).
+ *
+ * For eaxample "/" means to include the root node, all root properties
+ * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
+ * ensures that we capture the names of the subnodes. In a hashing situation
+ * it prevents the root node from changing at all Any change to non-excluded
+ * properties, names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too.
+ *
+ * The device tree header is not included in the list.
+ *
+ * @fdt:	Device tree to check
+ * @inc:	List of node paths to included
+ * @inc_count:	Number of node paths in list
+ * @exc_prop:	List of properties names to exclude
+ * @exc_prop_count:	Number of properties in exclude list
+ * @region:	Returns list of regions
+ * @max_region:	Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @add_string_tab:	1 to add a region for the string table
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again.
+ */
+int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
+		     char * const exc_prop[], int exc_prop_count,
+		     struct fdt_region region[], int max_regions,
+		     char *path, int path_len, int add_string_tab);
+
+/**
+ * fdt_first_region() - find regions in device tree
+ *
+ * Given a nodes and properties to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The use for this function is twofold. Firstly it provides a convenient
+ * way of performing a structure-aware grep of the tree. For example it is
+ * possible to grep for a node and get all the properties associated with
+ * that node. Trees can be subsetted easily, by specifying the nodes that
+ * are required, and then writing out the regions returned by this function.
+ * This is useful for small resource-constrained systems, such as boot
+ * loaders, which want to use an FDT but do not need to know about all of
+ * it.
+ *
+ * Secondly it makes it easy to hash parts of the tree and detect changes.
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ * Note that semantically null changes in order could still cause false
+ * hash misses. Such reordering might happen if the tree is regenerated
+ * from source, and nodes are reordered (the bytes-stream will be emitted
+ * in a different order and many hash functions will detect this). However
+ * if an existing tree is modified using libfdt functions, such as
+ * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
+ *
+ * The nodes/properties to include/exclude are defined by a function
+ * provided by the caller. This function is called for each node and
+ * property, and must return:
+ *
+ *    0 - to exclude this part
+ *    1 - to include this part
+ *   -1 - for FDT_IS_PROP only: no information is available, so include
+ *		if its containing node is included
+ *
+ * The last case is only used to deal with properties. Often a property is
+ * included if its containing node is included - this is the case where
+ * -1 is returned.. However if the property is specifically required to be
+ * included/excluded, then 0 or 1 can be returned. Note that including a
+ * property when the FDT_REG_SUPERNODES flag is given will force its
+ * containing node to be included since it is not valid to have a property
+ * that is not in a node.
+ *
+ * Using the information provided, the inclusion of a node can be controlled
+ * either by a node name or its compatible string, or any other property
+ * that the function can determine.
+ *
+ * As an example, including node "/" means to include the root node and all
+ * root properties. A flag provides a way of also including supernodes (of
+ * which there is none for the root node), and another flag includes
+ * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
+ * FDT_END_NODE of all subnodes of /.
+ *
+ * The subnode feature helps in a hashing situation since it prevents the
+ * root node from changing at all. Any change to non-excluded properties,
+ * names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too. This is always
+ * the last region.
+ *
+ * The FDT also has a mem_rsvmap table which can also be included, and is
+ * always the first region if so.
+ *
+ * The device tree header is not included in the region list. Since the
+ * contents of the FDT are changing (shrinking, often), the caller will need
+ * to regenerate the header anyway.
+ *
+ * @fdt:	Device tree to check
+ * @h_include:	Function to call to determine whether to include a part or
+ *		not:
+ *
+ *		@priv: Private pointer as passed to fdt_find_regions()
+ *		@fdt: Pointer to FDT blob
+ *		@offset: Offset of this node / property
+ *		@type: Type of this part, FDT_IS_...
+ *		@data: Pointer to data (node name, property name, compatible
+ *			string, value (not yet supported)
+ *		@size: Size of data, or 0 if none
+ *		@return 0 to exclude, 1 to include, -1 if no information is
+ *		available
+ * @priv:	Private pointer passed to h_include
+ * @region:	Returns list of regions, sorted by offset
+ * @max_regions: Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @flags:	Various flags that control the region algortihm, see
+ *		FDT_REG_...
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again. Only the first max_regions elements are available in the
+ * array.
+ *
+ * On error a -ve value is return, which can be:
+ *
+ *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
+ *	-FDT_ERR_BADLAYOUT
+ *	-FDT_ERR_NOSPACE (path area is too small)
+ */
+int fdt_first_region(const void *fdt,
+		     int (*h_include)(void *priv, const void *fdt, int offset,
+				      int type, const char *data, int size),
+		     void *priv, struct fdt_region *region,
+		     char *path, int path_len, int flags,
+		     struct fdt_region_state *info);
+
+/** fdt_next_region() - find next region
+ *
+ * See fdt_first_region() for full description. This function finds the
+ * next region according to the provided parameters, which must be the same
+ * as passed to fdt_first_region().
+ *
+ * This function can additionally return -FDT_ERR_NOTFOUND when there are no
+ * more regions
+ */
+int fdt_next_region(const void *fdt,
+		    int (*h_include)(void *priv, const void *fdt, int offset,
+				     int type, const char *data, int size),
+		    void *priv, struct fdt_region *region,
+		    char *path, int path_len, int flags,
+		    struct fdt_region_state *info);
+
+/**
+ * fdt_add_alias_regions() - find aliases that point to existing regions
+ *
+ * Once a device tree grep is complete some of the nodes will be present
+ * and some will have been dropped. This function checks all the alias nodes
+ * to figure out which points point to nodes which are still present. These
+ * aliases need to be kept, along with the nodes they reference.
+ *
+ * Given a list of regions function finds the aliases that still apply and
+ * adds more regions to the list for these. This function is called after
+ * fdt_next_region() has finished returning regions and requires the same
+ * state.
+ *
+ * @fdt:	Device tree file to reference
+ * @region:	List of regions that will be kept
+ * @count:	Number of regions
+ * @max_regions: Number of entries that can fit in @region
+ * @info:	Region state as returned from fdt_next_region()
+ * @return new number of regions in @region (i.e. count + the number added)
+ * or -FDT_ERR_NOSPACE if there was not enough space.
+ */
+int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
+			  int max_regions, struct fdt_region_state *info);
+#endif /* SWIG */
+
+extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
+
+#endif /* _INCLUDE_LIBFDT_H_ */
diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h
index 8178f9174b..0d209a6492 100644
--- a/include/linux/libfdt_env.h
+++ b/include/linux/libfdt_env.h
@@ -1,3 +1,11 @@
+#ifdef USE_HOSTCC
+#include "../scripts/dtc/libfdt/libfdt_env.h"
+#else
+/*
+ * This position of the include guard is intentional.
+ * Using the same guard name as that of scripts/dtc/libfdt/libfdt_env.h
+ * prevents it from being included.
+ */
 #ifndef _LIBFDT_ENV_H
 #define _LIBFDT_ENV_H
 
@@ -20,3 +28,4 @@ typedef __be64 fdt64_t;
 #define strtoul(cp, endp, base)	simple_strtoul(cp, endp, base)
 
 #endif /* _LIBFDT_ENV_H */
+#endif
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 43f32385fa..289ed4c95b 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -10,7 +10,7 @@
 #include <efi_loader.h>
 #include <malloc.h>
 #include <asm/global_data.h>
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 #include <u-boot/crc.h>
 #include <bootm.h>
 #include <inttypes.h>
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 9e079f1fa3..402ab7fd56 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -10,7 +10,7 @@
 #include <efi_loader.h>
 #include <malloc.h>
 #include <asm/global_data.h>
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 #include <linux/list_sort.h>
 #include <inttypes.h>
 #include <watchdog.h>
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 5749d3510f..d06dbdf10b 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -11,7 +11,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <serial.h>
 #include <asm/sections.h>
 #include <linux/ctype.h>
diff --git a/lib/fdtdec_common.c b/lib/fdtdec_common.c
index 63b704a3d7..2d083418e0 100644
--- a/lib/fdtdec_common.c
+++ b/lib/fdtdec_common.c
@@ -10,7 +10,7 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <fdtdec.h>
 #else
 #include "libfdt.h"
diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index cc8b918f64..c51ffd7ecf 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -8,7 +8,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <malloc.h>
 #include <os.h>
 
diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index 4e3e12f505..edd8e64ce0 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -23,3 +23,5 @@ obj-y += fdt_ro.o
 
 # U-Boot own file
 obj-y += fdt_region.o
+
+ccflags-y := -I$(srctree)/scripts/dtc/libfdt
diff --git a/lib/libfdt/fdt_region.c b/lib/libfdt/fdt_region.c
index 5bfc4da370..70914a4e9b 100644
--- a/lib/libfdt/fdt_region.c
+++ b/lib/libfdt/fdt_region.c
@@ -5,11 +5,11 @@
  * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
  */
 
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 
 #ifndef USE_HOSTCC
 #include <fdt.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #else
 #include "fdt_host.h"
 #endif
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 14ead04480..7bd7897fcb 100755
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -3,11 +3,11 @@
  * Copyright (C) 2006 David Gibson, IBM Corporation.
  * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
  */
-#include <libfdt_env.h>
+#include <linux/libfdt_env.h>
 
 #ifndef USE_HOSTCC
 #include <fdt.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #else
 #include "fdt_host.h"
 #endif
diff --git a/lib/of_live.c b/lib/of_live.c
index f351483387..148865c967 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -10,7 +10,7 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include <of_live.h>
 #include <malloc.h>
 #include <dm/of_access.h>
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index dc9c0d9f45..c5767e5fb4 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -422,7 +422,7 @@ class DtbPlatdata(object):
         """
         self.out_header()
         self.out('#include <stdbool.h>\n')
-        self.out('#include <libfdt.h>\n')
+        self.out('#include <linux/libfdt.h>\n')
 
         # Output the struct definition
         for name in sorted(structs):
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 41ed80e6da..0553b5cdf9 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -33,7 +33,7 @@ HEADER = '''/*
  */
 
 #include <stdbool.h>
-#include <libfdt.h>'''
+#include <linux/libfdt.h>'''
 
 C_HEADER = '''/*
  * DO NOT MODIFY
diff --git a/tools/fdt_host.h b/tools/fdt_host.h
index 8d4aa066bb..98acf278a3 100644
--- a/tools/fdt_host.h
+++ b/tools/fdt_host.h
@@ -8,7 +8,7 @@
 #define __FDT_HOST_H__
 
 /* Make sure to include u-boot version of libfdt include files */
-#include "../include/libfdt.h"
+#include "../include/linux/libfdt.h"
 #include "../include/fdt_support.h"
 
 /**
diff --git a/tools/ifdtool.c b/tools/ifdtool.c
index 729991ee33..e4c2f82c4a 100644
--- a/tools/ifdtool.c
+++ b/tools/ifdtool.c
@@ -19,7 +19,7 @@
 #include <unistd.h>
 #include <sys/types.h>
 #include <sys/stat.h>
-#include <libfdt.h>
+#include <linux/libfdt.h>
 #include "ifdtool.h"
 
 #undef DEBUG

commit fe47e2a1d257ee323ae284b7ce3702ffe1a71621
Author: Paul Kocialkowski <contact@paulk.fr>
Date:   Fri Mar 2 23:13:42 2018 +0100

    UPSTREAM: tools: Include U-Boot libfdt headers from their actual path
    
    There are no headers for libfdt in lib/libfdt, as they are instead
    located in scripts/dtc/libfdt. Specifying lib/libfdt for headers
    inclusion in host tools results in using the system libfdt headers,
    which is not what we want. Change this to the proper path.
    
    Change-Id: I3ad1329f563d1083828ce168e2c4ee791b553da8
    Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/Makefile b/tools/Makefile
index f3bf68204e..e4a18e37f6 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -255,7 +255,7 @@ endif # !LOGO_BMP
 #
 HOST_EXTRACFLAGS += -include $(srctree)/include/compiler.h \
 		$(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \
-		-I$(srctree)/lib/libfdt \
+		-I$(srctree)/scripts/dtc/libfdt \
 		-I$(srctree)/tools \
 		-DUSE_HOSTCC \
 		-D__KERNEL_STRICT_NAMES \

commit 02f12fd1d34f4c2403586382be08bfe6208d4ada
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:17 2018 +0900

    UPSTREAM: libfdt: migrate libfdt.h to a wrapper + U-Boot own code
    
    There is tons of code duplication between lib/libfdt/libfdt.h and
    scripts/dtc/libfdt/libfdt.h.  Evacuate the U-Boot own code to
    include/libfdt.h and remove lib/libfdt/libfdt.h.
    
    For host tools, <libfdt.h> should include scripts/dtc/libfdt/libfdt.h,
    which is already suitable for user-space.
    
    For compiling U-Boot, <linux/libfdt.h> should be included because we
    need a different libfdt_env.h .
    
    Change-Id: I61a718a3fecb9f316cf3ddbac7c125394532a9c5
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/libfdt.h b/include/libfdt.h
index de5743bfa7..f0821d8a0e 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -4,8 +4,312 @@
  * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
  */
 
-#include "../lib/libfdt/libfdt.h"
+#ifdef USE_HOSTCC
+#include "../scripts/dtc/libfdt/libfdt.h"
+#else
+#include <linux/libfdt.h>
+#endif
 
-extern struct fdt_header *working_fdt;	/* Pointer to the working fdt */
+/* U-Boot local hacks */
+
+#ifndef SWIG /* Not available in Python */
+struct fdt_region {
+	int offset;
+	int size;
+};
+
+/*
+ * Flags for fdt_find_regions()
+ *
+ * Add a region for the string table (always the last region)
+ */
+#define FDT_REG_ADD_STRING_TAB		(1 << 0)
+
+/*
+ * Add all supernodes of a matching node/property, useful for creating a
+ * valid subset tree
+ */
+#define FDT_REG_SUPERNODES		(1 << 1)
+
+/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
+#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
+
+/* Add all subnodes of a matching node */
+#define FDT_REG_ALL_SUBNODES		(1 << 3)
+
+/* Add a region for the mem_rsvmap table (always the first region) */
+#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
+
+/* Indicates what an fdt part is (node, property, value) */
+#define FDT_IS_NODE			(1 << 0)
+#define FDT_IS_PROP			(1 << 1)
+#define FDT_IS_VALUE			(1 << 2)	/* not supported */
+#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
+#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
+
+#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
+					FDT_IS_COMPAT)
+#define FDT_IS_ANY			0x1f		/* all the above */
+
+/* We set a reasonable limit on the number of nested nodes */
+#define FDT_MAX_DEPTH			32
+
+/* Decribes what we want to include from the current tag */
+enum want_t {
+	WANT_NOTHING,
+	WANT_NODES_ONLY,		/* No properties */
+	WANT_NODES_AND_PROPS,		/* Everything for one level */
+	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
+};
+
+/* Keeps track of the state at parent nodes */
+struct fdt_subnode_stack {
+	int offset;		/* Offset of node */
+	enum want_t want;	/* The 'want' value here */
+	int included;		/* 1 if we included this node, 0 if not */
+};
+
+struct fdt_region_ptrs {
+	int depth;			/* Current tree depth */
+	int done;			/* What we have completed scanning */
+	enum want_t want;		/* What we are currently including */
+	char *end;			/* Pointer to end of full node path */
+	int nextoffset;			/* Next node offset to check */
+};
+
+/* The state of our finding algortihm */
+struct fdt_region_state {
+	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
+	struct fdt_region *region;	/* Contains list of regions found */
+	int count;			/* Numnber of regions found */
+	const void *fdt;		/* FDT blob */
+	int max_regions;		/* Maximum regions to find */
+	int can_merge;		/* 1 if we can merge with previous region */
+	int start;			/* Start position of current region */
+	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
+};
+
+/**
+ * fdt_find_regions() - find regions in device tree
+ *
+ * Given a list of nodes to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ *
+ * Nodes which are given in 'inc' are included in the region list, as
+ * are the names of the immediate subnodes nodes (but not the properties
+ * or subnodes of those subnodes).
+ *
+ * For eaxample "/" means to include the root node, all root properties
+ * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
+ * ensures that we capture the names of the subnodes. In a hashing situation
+ * it prevents the root node from changing at all Any change to non-excluded
+ * properties, names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too.
+ *
+ * The device tree header is not included in the list.
+ *
+ * @fdt:	Device tree to check
+ * @inc:	List of node paths to included
+ * @inc_count:	Number of node paths in list
+ * @exc_prop:	List of properties names to exclude
+ * @exc_prop_count:	Number of properties in exclude list
+ * @region:	Returns list of regions
+ * @max_region:	Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @add_string_tab:	1 to add a region for the string table
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again.
+ */
+int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
+		     char * const exc_prop[], int exc_prop_count,
+		     struct fdt_region region[], int max_regions,
+		     char *path, int path_len, int add_string_tab);
+
+/**
+ * fdt_first_region() - find regions in device tree
+ *
+ * Given a nodes and properties to include and properties to exclude, find
+ * the regions of the device tree which describe those included parts.
+ *
+ * The use for this function is twofold. Firstly it provides a convenient
+ * way of performing a structure-aware grep of the tree. For example it is
+ * possible to grep for a node and get all the properties associated with
+ * that node. Trees can be subsetted easily, by specifying the nodes that
+ * are required, and then writing out the regions returned by this function.
+ * This is useful for small resource-constrained systems, such as boot
+ * loaders, which want to use an FDT but do not need to know about all of
+ * it.
+ *
+ * Secondly it makes it easy to hash parts of the tree and detect changes.
+ * The intent is to get a list of regions which will be invariant provided
+ * those parts are invariant. For example, if you request a list of regions
+ * for all nodes but exclude the property "data", then you will get the
+ * same region contents regardless of any change to "data" properties.
+ *
+ * This function can be used to produce a byte-stream to send to a hashing
+ * function to verify that critical parts of the FDT have not changed.
+ * Note that semantically null changes in order could still cause false
+ * hash misses. Such reordering might happen if the tree is regenerated
+ * from source, and nodes are reordered (the bytes-stream will be emitted
+ * in a different order and many hash functions will detect this). However
+ * if an existing tree is modified using libfdt functions, such as
+ * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
+ *
+ * The nodes/properties to include/exclude are defined by a function
+ * provided by the caller. This function is called for each node and
+ * property, and must return:
+ *
+ *    0 - to exclude this part
+ *    1 - to include this part
+ *   -1 - for FDT_IS_PROP only: no information is available, so include
+ *		if its containing node is included
+ *
+ * The last case is only used to deal with properties. Often a property is
+ * included if its containing node is included - this is the case where
+ * -1 is returned.. However if the property is specifically required to be
+ * included/excluded, then 0 or 1 can be returned. Note that including a
+ * property when the FDT_REG_SUPERNODES flag is given will force its
+ * containing node to be included since it is not valid to have a property
+ * that is not in a node.
+ *
+ * Using the information provided, the inclusion of a node can be controlled
+ * either by a node name or its compatible string, or any other property
+ * that the function can determine.
+ *
+ * As an example, including node "/" means to include the root node and all
+ * root properties. A flag provides a way of also including supernodes (of
+ * which there is none for the root node), and another flag includes
+ * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
+ * FDT_END_NODE of all subnodes of /.
+ *
+ * The subnode feature helps in a hashing situation since it prevents the
+ * root node from changing at all. Any change to non-excluded properties,
+ * names of subnodes or number of subnodes would be detected.
+ *
+ * When used with FITs this provides the ability to hash and sign parts of
+ * the FIT based on different configurations in the FIT. Then it is
+ * impossible to change anything about that configuration (include images
+ * attached to the configuration), but it may be possible to add new
+ * configurations, new images or new signatures within the existing
+ * framework.
+ *
+ * Adding new properties to a device tree may result in the string table
+ * being extended (if the new property names are different from those
+ * already added). This function can optionally include a region for
+ * the string table so that this can be part of the hash too. This is always
+ * the last region.
+ *
+ * The FDT also has a mem_rsvmap table which can also be included, and is
+ * always the first region if so.
+ *
+ * The device tree header is not included in the region list. Since the
+ * contents of the FDT are changing (shrinking, often), the caller will need
+ * to regenerate the header anyway.
+ *
+ * @fdt:	Device tree to check
+ * @h_include:	Function to call to determine whether to include a part or
+ *		not:
+ *
+ *		@priv: Private pointer as passed to fdt_find_regions()
+ *		@fdt: Pointer to FDT blob
+ *		@offset: Offset of this node / property
+ *		@type: Type of this part, FDT_IS_...
+ *		@data: Pointer to data (node name, property name, compatible
+ *			string, value (not yet supported)
+ *		@size: Size of data, or 0 if none
+ *		@return 0 to exclude, 1 to include, -1 if no information is
+ *		available
+ * @priv:	Private pointer passed to h_include
+ * @region:	Returns list of regions, sorted by offset
+ * @max_regions: Maximum length of region list
+ * @path:	Pointer to a temporary string for the function to use for
+ *		building path names
+ * @path_len:	Length of path, must be large enough to hold the longest
+ *		path in the tree
+ * @flags:	Various flags that control the region algortihm, see
+ *		FDT_REG_...
+ * @return number of regions in list. If this is >max_regions then the
+ * region array was exhausted. You should increase max_regions and try
+ * the call again. Only the first max_regions elements are available in the
+ * array.
+ *
+ * On error a -ve value is return, which can be:
+ *
+ *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
+ *	-FDT_ERR_BADLAYOUT
+ *	-FDT_ERR_NOSPACE (path area is too small)
+ */
+int fdt_first_region(const void *fdt,
+		     int (*h_include)(void *priv, const void *fdt, int offset,
+				      int type, const char *data, int size),
+		     void *priv, struct fdt_region *region,
+		     char *path, int path_len, int flags,
+		     struct fdt_region_state *info);
+
+/** fdt_next_region() - find next region
+ *
+ * See fdt_first_region() for full description. This function finds the
+ * next region according to the provided parameters, which must be the same
+ * as passed to fdt_first_region().
+ *
+ * This function can additionally return -FDT_ERR_NOTFOUND when there are no
+ * more regions
+ */
+int fdt_next_region(const void *fdt,
+		    int (*h_include)(void *priv, const void *fdt, int offset,
+				     int type, const char *data, int size),
+		    void *priv, struct fdt_region *region,
+		    char *path, int path_len, int flags,
+		    struct fdt_region_state *info);
+
+/**
+ * fdt_add_alias_regions() - find aliases that point to existing regions
+ *
+ * Once a device tree grep is complete some of the nodes will be present
+ * and some will have been dropped. This function checks all the alias nodes
+ * to figure out which points point to nodes which are still present. These
+ * aliases need to be kept, along with the nodes they reference.
+ *
+ * Given a list of regions function finds the aliases that still apply and
+ * adds more regions to the list for these. This function is called after
+ * fdt_next_region() has finished returning regions and requires the same
+ * state.
+ *
+ * @fdt:	Device tree file to reference
+ * @region:	List of regions that will be kept
+ * @count:	Number of regions
+ * @max_regions: Number of entries that can fit in @region
+ * @info:	Region state as returned from fdt_next_region()
+ * @return new number of regions in @region (i.e. count + the number added)
+ * or -FDT_ERR_NOSPACE if there was not enough space.
+ */
+int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
+			  int max_regions, struct fdt_region_state *info);
+#endif /* SWIG */
+
+extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
 
 #endif /* UBOOT_LIBFDT_H */
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
deleted file mode 100644
index cb533f4275..0000000000
--- a/lib/libfdt/libfdt.h
+++ /dev/null
@@ -1,2192 +0,0 @@
-#ifndef _LIBFDT_H
-#define _LIBFDT_H
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- *
- * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
- */
-
-#include <libfdt_env.h>
-#include <fdt.h>
-
-#define FDT_FIRST_SUPPORTED_VERSION	0x10
-#define FDT_LAST_SUPPORTED_VERSION	0x11
-
-/* Error codes: informative error codes */
-#define FDT_ERR_NOTFOUND	1
-	/* FDT_ERR_NOTFOUND: The requested node or property does not exist */
-#define FDT_ERR_EXISTS		2
-	/* FDT_ERR_EXISTS: Attempted to create a node or property which
-	 * already exists */
-#define FDT_ERR_NOSPACE		3
-	/* FDT_ERR_NOSPACE: Operation needed to expand the device
-	 * tree, but its buffer did not have sufficient space to
-	 * contain the expanded tree. Use fdt_open_into() to move the
-	 * device tree to a buffer with more space. */
-
-/* Error codes: codes for bad parameters */
-#define FDT_ERR_BADOFFSET	4
-	/* FDT_ERR_BADOFFSET: Function was passed a structure block
-	 * offset which is out-of-bounds, or which points to an
-	 * unsuitable part of the structure for the operation. */
-#define FDT_ERR_BADPATH		5
-	/* FDT_ERR_BADPATH: Function was passed a badly formatted path
-	 * (e.g. missing a leading / for a function which requires an
-	 * absolute path) */
-#define FDT_ERR_BADPHANDLE	6
-	/* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle.
-	 * This can be caused either by an invalid phandle property
-	 * length, or the phandle value was either 0 or -1, which are
-	 * not permitted. */
-#define FDT_ERR_BADSTATE	7
-	/* FDT_ERR_BADSTATE: Function was passed an incomplete device
-	 * tree created by the sequential-write functions, which is
-	 * not sufficiently complete for the requested operation. */
-
-/* Error codes: codes for bad device tree blobs */
-#define FDT_ERR_TRUNCATED	8
-	/* FDT_ERR_TRUNCATED: Structure block of the given device tree
-	 * ends without an FDT_END tag. */
-#define FDT_ERR_BADMAGIC	9
-	/* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a
-	 * device tree at all - it is missing the flattened device
-	 * tree magic number. */
-#define FDT_ERR_BADVERSION	10
-	/* FDT_ERR_BADVERSION: Given device tree has a version which
-	 * can't be handled by the requested operation.  For
-	 * read-write functions, this may mean that fdt_open_into() is
-	 * required to convert the tree to the expected version. */
-#define FDT_ERR_BADSTRUCTURE	11
-	/* FDT_ERR_BADSTRUCTURE: Given device tree has a corrupt
-	 * structure block or other serious error (e.g. misnested
-	 * nodes, or subnodes preceding properties). */
-#define FDT_ERR_BADLAYOUT	12
-	/* FDT_ERR_BADLAYOUT: For read-write functions, the given
-	 * device tree has it's sub-blocks in an order that the
-	 * function can't handle (memory reserve map, then structure,
-	 * then strings).  Use fdt_open_into() to reorganize the tree
-	 * into a form suitable for the read-write operations. */
-
-/* "Can't happen" error indicating a bug in libfdt */
-#define FDT_ERR_INTERNAL	13
-	/* FDT_ERR_INTERNAL: libfdt has failed an internal assertion.
-	 * Should never be returned, if it is, it indicates a bug in
-	 * libfdt itself. */
-
-/* Errors in device tree content */
-#define FDT_ERR_BADNCELLS	14
-	/* FDT_ERR_BADNCELLS: Device tree has a #address-cells, #size-cells
-	 * or similar property with a bad format or value */
-
-#define FDT_ERR_BADVALUE	15
-	/* FDT_ERR_BADVALUE: Device tree has a property with an unexpected
-	 * value. For example: a property expected to contain a string list
-	 * is not NUL-terminated within the length of its value. */
-
-#define FDT_ERR_BADOVERLAY	16
-	/* FDT_ERR_BADOVERLAY: The device tree overlay, while
-	 * correctly structured, cannot be applied due to some
-	 * unexpected or missing value, property or node. */
-
-#define FDT_ERR_NOPHANDLES	17
-	/* FDT_ERR_NOPHANDLES: The device tree doesn't have any
-	 * phandle available anymore without causing an overflow */
-
-#define FDT_ERR_MAX		17
-
-/**********************************************************************/
-/* Low-level functions (you probably don't need these)                */
-/**********************************************************************/
-
-#ifndef SWIG /* This function is not useful in Python */
-const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
-#endif
-static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
-{
-	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
-}
-
-uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
-
-/**********************************************************************/
-/* Traversal functions                                                */
-/**********************************************************************/
-
-int fdt_next_node(const void *fdt, int offset, int *depth);
-
-/**
- * fdt_first_subnode() - get offset of first direct subnode
- *
- * @fdt:	FDT blob
- * @offset:	Offset of node to check
- * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
- */
-int fdt_first_subnode(const void *fdt, int offset);
-
-/**
- * fdt_next_subnode() - get offset of next direct subnode
- *
- * After first calling fdt_first_subnode(), call this function repeatedly to
- * get direct subnodes of a parent node.
- *
- * @fdt:	FDT blob
- * @offset:	Offset of previous subnode
- * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
- * subnodes
- */
-int fdt_next_subnode(const void *fdt, int offset);
-
-/**
- * fdt_for_each_subnode - iterate over all subnodes of a parent
- *
- * @node:	child node (int, lvalue)
- * @fdt:	FDT blob (const void *)
- * @parent:	parent node (int)
- *
- * This is actually a wrapper around a for loop and would be used like so:
- *
- *	fdt_for_each_subnode(node, fdt, parent) {
- *		Use node
- *		...
- *	}
- *
- *	if ((node < 0) && (node != -FDT_ERR_NOT_FOUND)) {
- *		Error handling
- *	}
- *
- * Note that this is implemented as a macro and @node is used as
- * iterator in the loop. The parent variable be constant or even a
- * literal.
- *
- */
-#define fdt_for_each_subnode(node, fdt, parent)		\
-	for (node = fdt_first_subnode(fdt, parent);	\
-	     node >= 0;					\
-	     node = fdt_next_subnode(fdt, node))
-
-/**********************************************************************/
-/* General functions                                                  */
-/**********************************************************************/
-#define fdt_get_header(fdt, field) \
-	(fdt32_to_cpu(((const struct fdt_header *)(fdt))->field))
-#define fdt_magic(fdt)			(fdt_get_header(fdt, magic))
-#define fdt_totalsize(fdt)		(fdt_get_header(fdt, totalsize))
-#define fdt_off_dt_struct(fdt)		(fdt_get_header(fdt, off_dt_struct))
-#define fdt_off_dt_strings(fdt)		(fdt_get_header(fdt, off_dt_strings))
-#define fdt_off_mem_rsvmap(fdt)		(fdt_get_header(fdt, off_mem_rsvmap))
-#define fdt_version(fdt)		(fdt_get_header(fdt, version))
-#define fdt_last_comp_version(fdt)	(fdt_get_header(fdt, last_comp_version))
-#define fdt_boot_cpuid_phys(fdt)	(fdt_get_header(fdt, boot_cpuid_phys))
-#define fdt_size_dt_strings(fdt)	(fdt_get_header(fdt, size_dt_strings))
-#define fdt_size_dt_struct(fdt)		(fdt_get_header(fdt, size_dt_struct))
-
-#define __fdt_set_hdr(name) \
-	static inline void fdt_set_##name(void *fdt, uint32_t val) \
-	{ \
-		struct fdt_header *fdth = (struct fdt_header *)fdt; \
-		fdth->name = cpu_to_fdt32(val); \
-	}
-__fdt_set_hdr(magic);
-__fdt_set_hdr(totalsize);
-__fdt_set_hdr(off_dt_struct);
-__fdt_set_hdr(off_dt_strings);
-__fdt_set_hdr(off_mem_rsvmap);
-__fdt_set_hdr(version);
-__fdt_set_hdr(last_comp_version);
-__fdt_set_hdr(boot_cpuid_phys);
-__fdt_set_hdr(size_dt_strings);
-__fdt_set_hdr(size_dt_struct);
-#undef __fdt_set_hdr
-
-/**
- * fdt_check_header - sanity check a device tree or possible device tree
- * @fdt: pointer to data which might be a flattened device tree
- *
- * fdt_check_header() checks that the given buffer contains what
- * appears to be a flattened device tree with sane information in its
- * header.
- *
- * returns:
- *     0, if the buffer appears to contain a valid device tree
- *     -FDT_ERR_BADMAGIC,
- *     -FDT_ERR_BADVERSION,
- *     -FDT_ERR_BADSTATE, standard meanings, as above
- */
-int fdt_check_header(const void *fdt);
-
-/**
- * fdt_move - move a device tree around in memory
- * @fdt: pointer to the device tree to move
- * @buf: pointer to memory where the device is to be moved
- * @bufsize: size of the memory space at buf
- *
- * fdt_move() relocates, if possible, the device tree blob located at
- * fdt to the buffer at buf of size bufsize.  The buffer may overlap
- * with the existing device tree blob at fdt.  Therefore,
- *     fdt_move(fdt, fdt, fdt_totalsize(fdt))
- * should always succeed.
- *
- * returns:
- *     0, on success
- *     -FDT_ERR_NOSPACE, bufsize is insufficient to contain the device tree
- *     -FDT_ERR_BADMAGIC,
- *     -FDT_ERR_BADVERSION,
- *     -FDT_ERR_BADSTATE, standard meanings
- */
-int fdt_move(const void *fdt, void *buf, int bufsize);
-
-/**********************************************************************/
-/* Read-only functions                                                */
-/**********************************************************************/
-
-/**
- * fdt_string - retrieve a string from the strings block of a device tree
- * @fdt: pointer to the device tree blob
- * @stroffset: offset of the string within the strings block (native endian)
- *
- * fdt_string() retrieves a pointer to a single string from the
- * strings block of the device tree blob at fdt.
- *
- * returns:
- *     a pointer to the string, on success
- *     NULL, if stroffset is out of bounds
- */
-const char *fdt_string(const void *fdt, int stroffset);
-
-/**
- * fdt_get_max_phandle - retrieves the highest phandle in a tree
- * @fdt: pointer to the device tree blob
- *
- * fdt_get_max_phandle retrieves the highest phandle in the given
- * device tree. This will ignore badly formatted phandles, or phandles
- * with a value of 0 or -1.
- *
- * returns:
- *      the highest phandle on success
- *      0, if no phandle was found in the device tree
- *      -1, if an error occurred
- */
-uint32_t fdt_get_max_phandle(const void *fdt);
-
-/**
- * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
- * @fdt: pointer to the device tree blob
- *
- * Returns the number of entries in the device tree blob's memory
- * reservation map.  This does not include the terminating 0,0 entry
- * or any other (0,0) entries reserved for expansion.
- *
- * returns:
- *     the number of entries
- */
-int fdt_num_mem_rsv(const void *fdt);
-
-/**
- * fdt_get_mem_rsv - retrieve one memory reserve map entry
- * @fdt: pointer to the device tree blob
- * @address, @size: pointers to 64-bit variables
- *
- * On success, *address and *size will contain the address and size of
- * the n-th reserve map entry from the device tree blob, in
- * native-endian format.
- *
- * returns:
- *     0, on success
- *     -FDT_ERR_BADMAGIC,
- *     -FDT_ERR_BADVERSION,
- *     -FDT_ERR_BADSTATE, standard meanings
- */
-int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
-
-/**
- * fdt_subnode_offset_namelen - find a subnode based on substring
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- * @namelen: number of characters of name to consider
- *
- * Identical to fdt_subnode_offset(), but only examine the first
- * namelen characters of name for matching the subnode name.  This is
- * useful for finding subnodes based on a portion of a larger string,
- * such as a full path.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
-			       const char *name, int namelen);
-#endif
-/**
- * fdt_subnode_offset - find a subnode of a given node
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- *
- * fdt_subnode_offset() finds a subnode of the node at structure block
- * offset parentoffset with the given name.  name may include a unit
- * address, in which case fdt_subnode_offset() will find the subnode
- * with that unit address, or the unit address may be omitted, in
- * which case fdt_subnode_offset() will find an arbitrary subnode
- * whose name excluding unit address matches the given name.
- *
- * returns:
- *	structure block offset of the requested subnode (>=0), on success
- *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
- *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
- *		tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
-
-/**
- * fdt_path_offset_namelen - find a tree node by its full path
- * @fdt: pointer to the device tree blob
- * @path: full path of the node to locate
- * @namelen: number of characters of path to consider
- *
- * Identical to fdt_path_offset(), but only consider the first namelen
- * characters of path as the path name.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
-#endif
-
-/**
- * fdt_path_offset - find a tree node by its full path
- * @fdt: pointer to the device tree blob
- * @path: full path of the node to locate
- *
- * fdt_path_offset() finds a node of a given path in the device tree.
- * Each path component may omit the unit address portion, but the
- * results of this are undefined if any such path component is
- * ambiguous (that is if there are multiple nodes at the relevant
- * level matching the given component, differentiated only by unit
- * address).
- *
- * returns:
- *	structure block offset of the node with the requested path (>=0), on
- *		success
- *	-FDT_ERR_BADPATH, given path does not begin with '/' or is invalid
- *	-FDT_ERR_NOTFOUND, if the requested node does not exist
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_path_offset(const void *fdt, const char *path);
-
-/**
- * fdt_get_name - retrieve the name of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of the starting node
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_get_name() retrieves the name (including unit address) of the
- * device tree node at structure block offset nodeoffset.  If lenp is
- * non-NULL, the length of this name is also returned, in the integer
- * pointed to by lenp.
- *
- * returns:
- *	pointer to the node's name, on success
- *		If lenp is non-NULL, *lenp contains the length of that name
- *			(>=0)
- *	NULL, on error
- *		if lenp is non-NULL *lenp contains an error code (<0):
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
- *			tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE, standard meanings
- */
-const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
-
-/**
- * fdt_first_property_offset - find the offset of a node's first property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of a node
- *
- * fdt_first_property_offset() finds the first property of the node at
- * the given structure block offset.
- *
- * returns:
- *	structure block offset of the property (>=0), on success
- *	-FDT_ERR_NOTFOUND, if the requested node has no properties
- *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_BEGIN_NODE tag
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_first_property_offset(const void *fdt, int nodeoffset);
-
-/**
- * fdt_next_property_offset - step through a node's properties
- * @fdt: pointer to the device tree blob
- * @offset: structure block offset of a property
- *
- * fdt_next_property_offset() finds the property immediately after the
- * one at the given structure block offset.  This will be a property
- * of the same node as the given property.
- *
- * returns:
- *	structure block offset of the next property (>=0), on success
- *	-FDT_ERR_NOTFOUND, if the given property is the last in its node
- *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_PROP tag
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_next_property_offset(const void *fdt, int offset);
-
-/**
- * fdt_for_each_property_offset - iterate over all properties of a node
- *
- * @property_offset:	property offset (int, lvalue)
- * @fdt:		FDT blob (const void *)
- * @node:		node offset (int)
- *
- * This is actually a wrapper around a for loop and would be used like so:
- *
- *	fdt_for_each_property_offset(property, fdt, node) {
- *		Use property
- *		...
- *	}
- *
- *	if ((property < 0) && (property != -FDT_ERR_NOT_FOUND)) {
- *		Error handling
- *	}
- *
- * Note that this is implemented as a macro and property is used as
- * iterator in the loop. The node variable can be constant or even a
- * literal.
- */
-#define fdt_for_each_property_offset(property, fdt, node)	\
-	for (property = fdt_first_property_offset(fdt, node);	\
-	     property >= 0;					\
-	     property = fdt_next_property_offset(fdt, property))
-
-/**
- * fdt_get_property_by_offset - retrieve the property at a given offset
- * @fdt: pointer to the device tree blob
- * @offset: offset of the property to retrieve
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_get_property_by_offset() retrieves a pointer to the
- * fdt_property structure within the device tree blob at the given
- * offset.  If lenp is non-NULL, the length of the property value is
- * also returned, in the integer pointed to by lenp.
- *
- * returns:
- *	pointer to the structure representing the property
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
-						      int offset,
-						      int *lenp);
-
-/**
- * fdt_get_property_namelen - find a property based on substring
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @namelen: number of characters of name to consider
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * Identical to fdt_get_property(), but only examine the first namelen
- * characters of name for matching the property name.
- */
-#ifndef SWIG /* Not available in Python */
-const struct fdt_property *fdt_get_property_namelen(const void *fdt,
-						    int nodeoffset,
-						    const char *name,
-						    int namelen, int *lenp);
-#endif
-
-/**
- * fdt_get_property - find a given property in a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_get_property() retrieves a pointer to the fdt_property
- * structure within the device tree blob corresponding to the property
- * named 'name' of the node at offset nodeoffset.  If lenp is
- * non-NULL, the length of the property value is also returned, in the
- * integer pointed to by lenp.
- *
- * returns:
- *	pointer to the structure representing the property
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_NOTFOUND, node does not have named property
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
- *			tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset,
-					    const char *name, int *lenp);
-static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
-						      const char *name,
-						      int *lenp)
-{
-	return (struct fdt_property *)(uintptr_t)
-		fdt_get_property(fdt, nodeoffset, name, lenp);
-}
-
-/**
- * fdt_getprop_by_offset - retrieve the value of a property at a given offset
- * @fdt: pointer to the device tree blob
- * @ffset: offset of the property to read
- * @namep: pointer to a string variable (will be overwritten) or NULL
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_getprop_by_offset() retrieves a pointer to the value of the
- * property at structure block offset 'offset' (this will be a pointer
- * to within the device blob itself, not a copy of the value).  If
- * lenp is non-NULL, the length of the property value is also
- * returned, in the integer pointed to by lenp.  If namep is non-NULL,
- * the property's namne will also be returned in the char * pointed to
- * by namep (this will be a pointer to within the device tree's string
- * block, not a new copy of the name).
- *
- * returns:
- *	pointer to the property's value
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *		if namep is non-NULL *namep contiains a pointer to the property
- *		name.
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-#ifndef SWIG /* This function is not useful in Python */
-const void *fdt_getprop_by_offset(const void *fdt, int offset,
-				  const char **namep, int *lenp);
-#endif
-
-/**
- * fdt_getprop_namelen - get property value based on substring
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @namelen: number of characters of name to consider
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * Identical to fdt_getprop(), but only examine the first namelen
- * characters of name for matching the property name.
- */
-#ifndef SWIG /* Not available in Python */
-const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
-				const char *name, int namelen, int *lenp);
-static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
-					  const char *name, int namelen,
-					  int *lenp)
-{
-	return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name,
-						      namelen, lenp);
-}
-#endif
-
-/**
- * fdt_getprop - retrieve the value of a given property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to find
- * @name: name of the property to find
- * @lenp: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_getprop() retrieves a pointer to the value of the property
- * named 'name' of the node at offset nodeoffset (this will be a
- * pointer to within the device blob itself, not a copy of the value).
- * If lenp is non-NULL, the length of the property value is also
- * returned, in the integer pointed to by lenp.
- *
- * returns:
- *	pointer to the property's value
- *		if lenp is non-NULL, *lenp contains the length of the property
- *		value (>=0)
- *	NULL, on error
- *		if lenp is non-NULL, *lenp contains an error code (<0):
- *		-FDT_ERR_NOTFOUND, node does not have named property
- *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
- *			tag
- *		-FDT_ERR_BADMAGIC,
- *		-FDT_ERR_BADVERSION,
- *		-FDT_ERR_BADSTATE,
- *		-FDT_ERR_BADSTRUCTURE,
- *		-FDT_ERR_TRUNCATED, standard meanings
- */
-const void *fdt_getprop(const void *fdt, int nodeoffset,
-			const char *name, int *lenp);
-static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
-				  const char *name, int *lenp)
-{
-	return (void *)(uintptr_t)fdt_getprop(fdt, nodeoffset, name, lenp);
-}
-
-/**
- * fdt_get_phandle - retrieve the phandle of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of the node
- *
- * fdt_get_phandle() retrieves the phandle of the device tree node at
- * structure block offset nodeoffset.
- *
- * returns:
- *	the phandle of the node at nodeoffset, on success (!= 0, != -1)
- *	0, if the node has no phandle, or another error occurs
- */
-uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
-
-/**
- * fdt_get_alias_namelen - get alias based on substring
- * @fdt: pointer to the device tree blob
- * @name: name of the alias th look up
- * @namelen: number of characters of name to consider
- *
- * Identical to fdt_get_alias(), but only examine the first namelen
- * characters of name for matching the alias name.
- */
-#ifndef SWIG /* Not available in Python */
-const char *fdt_get_alias_namelen(const void *fdt,
-				  const char *name, int namelen);
-#endif
-
-/**
- * fdt_get_alias - retrieve the path referenced by a given alias
- * @fdt: pointer to the device tree blob
- * @name: name of the alias th look up
- *
- * fdt_get_alias() retrieves the value of a given alias.  That is, the
- * value of the property named 'name' in the node /aliases.
- *
- * returns:
- *	a pointer to the expansion of the alias named 'name', if it exists
- *	NULL, if the given alias or the /aliases node does not exist
- */
-const char *fdt_get_alias(const void *fdt, const char *name);
-
-/**
- * fdt_get_path - determine the full path of a node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose path to find
- * @buf: character buffer to contain the returned path (will be overwritten)
- * @buflen: size of the character buffer at buf
- *
- * fdt_get_path() computes the full path of the node at offset
- * nodeoffset, and records that path in the buffer at buf.
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset.
- *
- * returns:
- *	0, on success
- *		buf contains the absolute path of the node at
- *		nodeoffset, as a NUL-terminated string.
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_NOSPACE, the path of the given node is longer than (bufsize-1)
- *		characters and will not fit in the given buffer.
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen);
-
-/**
- * fdt_supernode_atdepth_offset - find a specific ancestor of a node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose parent to find
- * @supernodedepth: depth of the ancestor to find
- * @nodedepth: pointer to an integer variable (will be overwritten) or NULL
- *
- * fdt_supernode_atdepth_offset() finds an ancestor of the given node
- * at a specific depth from the root (where the root itself has depth
- * 0, its immediate subnodes depth 1 and so forth).  So
- *	fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, NULL);
- * will always return 0, the offset of the root node.  If the node at
- * nodeoffset has depth D, then:
- *	fdt_supernode_atdepth_offset(fdt, nodeoffset, D, NULL);
- * will return nodeoffset itself.
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset.
- *
- * returns:
- *	structure block offset of the node at node offset's ancestor
- *		of depth supernodedepth (>=0), on success
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_NOTFOUND, supernodedepth was greater than the depth of
- *		nodeoffset
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
-				 int supernodedepth, int *nodedepth);
-
-/**
- * fdt_node_depth - find the depth of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose parent to find
- *
- * fdt_node_depth() finds the depth of a given node.  The root node
- * has depth 0, its immediate subnodes depth 1 and so forth.
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset.
- *
- * returns:
- *	depth of the node at nodeoffset (>=0), on success
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_depth(const void *fdt, int nodeoffset);
-
-/**
- * fdt_parent_offset - find the parent of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose parent to find
- *
- * fdt_parent_offset() locates the parent node of a given node (that
- * is, it finds the offset of the node which contains the node at
- * nodeoffset as a subnode).
- *
- * NOTE: This function is expensive, as it must scan the device tree
- * structure from the start to nodeoffset, *twice*.
- *
- * returns:
- *	structure block offset of the parent of the node at nodeoffset
- *		(>=0), on success
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_parent_offset(const void *fdt, int nodeoffset);
-
-/**
- * fdt_node_offset_by_prop_value - find nodes with a given property value
- * @fdt: pointer to the device tree blob
- * @startoffset: only find nodes after this offset
- * @propname: property name to check
- * @propval: property value to search for
- * @proplen: length of the value in propval
- *
- * fdt_node_offset_by_prop_value() returns the offset of the first
- * node after startoffset, which has a property named propname whose
- * value is of length proplen and has value equal to propval; or if
- * startoffset is -1, the very first such node in the tree.
- *
- * To iterate through all nodes matching the criterion, the following
- * idiom can be used:
- *	offset = fdt_node_offset_by_prop_value(fdt, -1, propname,
- *					       propval, proplen);
- *	while (offset != -FDT_ERR_NOTFOUND) {
- *		// other code here
- *		offset = fdt_node_offset_by_prop_value(fdt, offset, propname,
- *						       propval, proplen);
- *	}
- *
- * Note the -1 in the first call to the function, if 0 is used here
- * instead, the function will never locate the root node, even if it
- * matches the criterion.
- *
- * returns:
- *	structure block offset of the located node (>= 0, >startoffset),
- *		 on success
- *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
- *		tree after startoffset
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
-				  const char *propname,
-				  const void *propval, int proplen);
-
-/**
- * fdt_node_offset_by_phandle - find the node with a given phandle
- * @fdt: pointer to the device tree blob
- * @phandle: phandle value
- *
- * fdt_node_offset_by_phandle() returns the offset of the node
- * which has the given phandle value.  If there is more than one node
- * in the tree with the given phandle (an invalid tree), results are
- * undefined.
- *
- * returns:
- *	structure block offset of the located node (>= 0), on success
- *	-FDT_ERR_NOTFOUND, no node with that phandle exists
- *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle);
-
-/**
- * fdt_node_check_compatible: check a node's compatible property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @compatible: string to match against
- *
- *
- * fdt_node_check_compatible() returns 0 if the given node contains a
- * 'compatible' property with the given string as one of its elements,
- * it returns non-zero otherwise, or on error.
- *
- * returns:
- *	0, if the node has a 'compatible' property listing the given string
- *	1, if the node has a 'compatible' property, but it does not list
- *		the given string
- *	-FDT_ERR_NOTFOUND, if the given node has no 'compatible' property
- *	-FDT_ERR_BADOFFSET, if nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_check_compatible(const void *fdt, int nodeoffset,
-			      const char *compatible);
-
-/**
- * fdt_node_offset_by_compatible - find nodes with a given 'compatible' value
- * @fdt: pointer to the device tree blob
- * @startoffset: only find nodes after this offset
- * @compatible: 'compatible' string to match against
- *
- * fdt_node_offset_by_compatible() returns the offset of the first
- * node after startoffset, which has a 'compatible' property which
- * lists the given compatible string; or if startoffset is -1, the
- * very first such node in the tree.
- *
- * To iterate through all nodes matching the criterion, the following
- * idiom can be used:
- *	offset = fdt_node_offset_by_compatible(fdt, -1, compatible);
- *	while (offset != -FDT_ERR_NOTFOUND) {
- *		// other code here
- *		offset = fdt_node_offset_by_compatible(fdt, offset, compatible);
- *	}
- *
- * Note the -1 in the first call to the function, if 0 is used here
- * instead, the function will never locate the root node, even if it
- * matches the criterion.
- *
- * returns:
- *	structure block offset of the located node (>= 0, >startoffset),
- *		 on success
- *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
- *		tree after startoffset
- *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
-				  const char *compatible);
-
-/**
- * fdt_stringlist_contains - check a string list property for a string
- * @strlist: Property containing a list of strings to check
- * @listlen: Length of property
- * @str: String to search for
- *
- * This is a utility function provided for convenience. The list contains
- * one or more strings, each terminated by \0, as is found in a device tree
- * "compatible" property.
- *
- * @return: 1 if the string is found in the list, 0 not found, or invalid list
- */
-int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
-
-/**
- * fdt_stringlist_count - count the number of strings in a string list
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @property: name of the property containing the string list
- * @return:
- *   the number of strings in the given property
- *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
- *   -FDT_ERR_NOTFOUND if the property does not exist
- */
-int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property);
-
-/**
- * fdt_stringlist_search - find a string in a string list and return its index
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @property: name of the property containing the string list
- * @string: string to look up in the string list
- *
- * Note that it is possible for this function to succeed on property values
- * that are not NUL-terminated. That's because the function will stop after
- * finding the first occurrence of @string. This can for example happen with
- * small-valued cell properties, such as #address-cells, when searching for
- * the empty string.
- *
- * @return:
- *   the index of the string in the list of strings
- *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
- *   -FDT_ERR_NOTFOUND if the property does not exist or does not contain
- *                     the given string
- */
-int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
-			  const char *string);
-
-/**
- * fdt_stringlist_get() - obtain the string at a given index in a string list
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of a tree node
- * @property: name of the property containing the string list
- * @index: index of the string to return
- * @lenp: return location for the string length or an error code on failure
- *
- * Note that this will successfully extract strings from properties with
- * non-NUL-terminated values. For example on small-valued cell properties
- * this function will return the empty string.
- *
- * If non-NULL, the length of the string (on success) or a negative error-code
- * (on failure) will be stored in the integer pointer to by lenp.
- *
- * @return:
- *   A pointer to the string at the given index in the string list or NULL on
- *   failure. On success the length of the string will be stored in the memory
- *   location pointed to by the lenp parameter, if non-NULL. On failure one of
- *   the following negative error codes will be returned in the lenp parameter
- *   (if non-NULL):
- *     -FDT_ERR_BADVALUE if the property value is not NUL-terminated
- *     -FDT_ERR_NOTFOUND if the property does not exist
- */
-const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
-			       const char *property, int index,
-			       int *lenp);
-
-/**********************************************************************/
-/* Read-only functions (addressing related)                           */
-/**********************************************************************/
-
-/**
- * FDT_MAX_NCELLS - maximum value for #address-cells and #size-cells
- *
- * This is the maximum value for #address-cells, #size-cells and
- * similar properties that will be processed by libfdt.  IEE1275
- * requires that OF implementations handle values up to 4.
- * Implementations may support larger values, but in practice higher
- * values aren't used.
- */
-#define FDT_MAX_NCELLS		4
-
-/**
- * fdt_address_cells - retrieve address size for a bus represented in the tree
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to find the address size for
- *
- * When the node has a valid #address-cells property, returns its value.
- *
- * returns:
- *	0 <= n < FDT_MAX_NCELLS, on success
- *      2, if the node has no #address-cells property
- *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
- *		#address-cells property
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_address_cells(const void *fdt, int nodeoffset);
-
-/**
- * fdt_size_cells - retrieve address range size for a bus represented in the
- *                  tree
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to find the address range size for
- *
- * When the node has a valid #size-cells property, returns its value.
- *
- * returns:
- *	0 <= n < FDT_MAX_NCELLS, on success
- *      2, if the node has no #address-cells property
- *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
- *		#size-cells property
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_size_cells(const void *fdt, int nodeoffset);
-
-
-/**********************************************************************/
-/* Write-in-place functions                                           */
-/**********************************************************************/
-
-/**
- * fdt_setprop_inplace_namelen_partial - change a property's value,
- *                                       but not its size
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @namelen: number of characters of name to consider
- * @idx: index of the property to change in the array
- * @val: pointer to data to replace the property value with
- * @len: length of the property value
- *
- * Identical to fdt_setprop_inplace(), but modifies the given property
- * starting from the given index, and using only the first characters
- * of the name. It is useful when you want to manipulate only one value of
- * an array and you have a string that doesn't end with \0.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
-					const char *name, int namelen,
-					uint32_t idx, const void *val,
-					int len);
-#endif
-
-/**
- * fdt_setprop_inplace - change a property's value, but not its size
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: pointer to data to replace the property value with
- * @len: length of the property value
- *
- * fdt_setprop_inplace() replaces the value of a given property with
- * the data in val, of length len.  This function cannot change the
- * size of a property, and so will only work if len is equal to the
- * current length of the property.
- *
- * This function will alter only the bytes in the blob which contain
- * the given property value, and will not alter or move any other part
- * of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, if len is not equal to the property's current length
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
-			const void *val, int len);
-#endif
-
-/**
- * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 32-bit integer value to replace the property with
- *
- * fdt_setprop_inplace_u32() replaces the value of a given property
- * with the 32-bit integer value in val, converting val to big-endian
- * if necessary.  This function cannot change the size of a property,
- * and so will only work if the property already exists and has length
- * 4.
- *
- * This function will alter only the bytes in the blob which contain
- * the given property value, and will not alter or move any other part
- * of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, if the property's length is not equal to 4
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_inplace_u32(void *fdt, int nodeoffset,
-					  const char *name, uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_inplace_u64 - change the value of a 64-bit integer property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 64-bit integer value to replace the property with
- *
- * fdt_setprop_inplace_u64() replaces the value of a given property
- * with the 64-bit integer value in val, converting val to big-endian
- * if necessary.  This function cannot change the size of a property,
- * and so will only work if the property already exists and has length
- * 8.
- *
- * This function will alter only the bytes in the blob which contain
- * the given property value, and will not alter or move any other part
- * of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, if the property's length is not equal to 8
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,
-					  const char *name, uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_inplace_cell - change the value of a single-cell property
- *
- * This is an alternative name for fdt_setprop_inplace_u32()
- */
-static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
-					   const char *name, uint32_t val)
-{
-	return fdt_setprop_inplace_u32(fdt, nodeoffset, name, val);
-}
-
-/**
- * fdt_nop_property - replace a property with nop tags
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to nop
- * @name: name of the property to nop
- *
- * fdt_nop_property() will replace a given property's representation
- * in the blob with FDT_NOP tags, effectively removing it from the
- * tree.
- *
- * This function will alter only the bytes in the blob which contain
- * the property, and will not alter or move any other part of the
- * tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_nop_property(void *fdt, int nodeoffset, const char *name);
-
-/**
- * fdt_nop_node - replace a node (subtree) with nop tags
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to nop
- *
- * fdt_nop_node() will replace a given node's representation in the
- * blob, including all its subnodes, if any, with FDT_NOP tags,
- * effectively removing it from the tree.
- *
- * This function will alter only the bytes in the blob which contain
- * the node and its properties and subnodes, and will not alter or
- * move any other part of the tree.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_nop_node(void *fdt, int nodeoffset);
-
-/**********************************************************************/
-/* Sequential write functions                                         */
-/**********************************************************************/
-
-int fdt_create(void *buf, int bufsize);
-int fdt_resize(void *fdt, void *buf, int bufsize);
-int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
-int fdt_finish_reservemap(void *fdt);
-int fdt_begin_node(void *fdt, const char *name);
-int fdt_property(void *fdt, const char *name, const void *val, int len);
-static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_property(fdt, name, &tmp, sizeof(tmp));
-}
-static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_property(fdt, name, &tmp, sizeof(tmp));
-}
-static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
-{
-	return fdt_property_u32(fdt, name, val);
-}
-
-/**
- * fdt_property_placeholder - add a new property and return a ptr to its value
- *
- * @fdt: pointer to the device tree blob
- * @name: name of property to add
- * @len: length of property value in bytes
- * @valp: returns a pointer to where where the value should be placed
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_NOSPACE, standard meanings
- */
-int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp);
-
-#define fdt_property_string(fdt, name, str) \
-	fdt_property(fdt, name, str, strlen(str)+1)
-int fdt_end_node(void *fdt);
-int fdt_finish(void *fdt);
-
-/**********************************************************************/
-/* Read-write functions                                               */
-/**********************************************************************/
-
-int fdt_create_empty_tree(void *buf, int bufsize);
-int fdt_open_into(const void *fdt, void *buf, int bufsize);
-int fdt_pack(void *fdt);
-
-/**
- * fdt_add_mem_rsv - add one memory reserve map entry
- * @fdt: pointer to the device tree blob
- * @address, @size: 64-bit values (native endian)
- *
- * Adds a reserve map entry to the given blob reserving a region at
- * address address of length size.
- *
- * This function will insert data into the reserve map and will
- * therefore change the indexes of some entries in the table.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new reservation entry
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
-
-/**
- * fdt_del_mem_rsv - remove a memory reserve map entry
- * @fdt: pointer to the device tree blob
- * @n: entry to remove
- *
- * fdt_del_mem_rsv() removes the n-th memory reserve map entry from
- * the blob.
- *
- * This function will delete data from the reservation table and will
- * therefore change the indexes of some entries in the table.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOTFOUND, there is no entry of the given index (i.e. there
- *		are less than n+1 reserve map entries)
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_del_mem_rsv(void *fdt, int n);
-
-/**
- * fdt_set_name - change the name of a given node
- * @fdt: pointer to the device tree blob
- * @nodeoffset: structure block offset of a node
- * @name: name to give the node
- *
- * fdt_set_name() replaces the name (including unit address, if any)
- * of the given node with the given string.  NOTE: this function can't
- * efficiently check if the new name is unique amongst the given
- * node's siblings; results are undefined if this function is invoked
- * with a name equal to one of the given node's siblings.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob
- *		to contain the new name
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE, standard meanings
- */
-int fdt_set_name(void *fdt, int nodeoffset, const char *name);
-
-/**
- * fdt_setprop - create or change a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: pointer to data to set the property value to
- * @len: length of the property value
- *
- * fdt_setprop() sets the value of the named property in the given
- * node to the given value and length, creating the property if it
- * does not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len);
-
-/**
- * fdt_setprop _placeholder - allocate space for a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @len: length of the property value
- * @prop_data: return pointer to property data
- *
- * fdt_setprop_placeholer() allocates the named property in the given node.
- * If the property exists it is resized. In either case a pointer to the
- * property data is returned.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
-			    int len, void **prop_data);
-
-/**
- * fdt_setprop_u32 - set a property to a 32-bit integer
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 32-bit integer value for the property (native endian)
- *
- * fdt_setprop_u32() sets the value of the named property in the given
- * node to the given 32-bit integer value (converting to big-endian if
- * necessary), or creates a new property with that value if it does
- * not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_u32(void *fdt, int nodeoffset, const char *name,
-				  uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_u64 - set a property to a 64-bit integer
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 64-bit integer value for the property (native endian)
- *
- * fdt_setprop_u64() sets the value of the named property in the given
- * node to the given 64-bit integer value (converting to big-endian if
- * necessary), or creates a new property with that value if it does
- * not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,
-				  uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_setprop_cell - set a property to a single cell value
- *
- * This is an alternative name for fdt_setprop_u32()
- */
-static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
-				   uint32_t val)
-{
-	return fdt_setprop_u32(fdt, nodeoffset, name, val);
-}
-
-/**
- * fdt_setprop_string - set a property to a string value
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @str: string value for the property
- *
- * fdt_setprop_string() sets the value of the named property in the
- * given node to the given string value (using the length of the
- * string to determine the new length of the property), or creates a
- * new property with that value if it does not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#define fdt_setprop_string(fdt, nodeoffset, name, str) \
-	fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
-
-
-/**
- * fdt_setprop_empty - set a property to an empty value
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- *
- * fdt_setprop_empty() sets the value of the named property in the
- * given node to an empty (zero length) value, or creates a new empty
- * property if it does not already exist.
- *
- * This function may insert or delete data from the blob, and will
- * therefore change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#define fdt_setprop_empty(fdt, nodeoffset, name) \
-	fdt_setprop((fdt), (nodeoffset), (name), NULL, 0)
-
-/**
- * fdt_appendprop - append to or create a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to append to
- * @val: pointer to data to append to the property value
- * @len: length of the data to append to the property value
- *
- * fdt_appendprop() appends the value to the named property in the
- * given node, creating the property if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
-		   const void *val, int len);
-
-/**
- * fdt_appendprop_u32 - append a 32-bit integer value to a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 32-bit integer value to append to the property (native endian)
- *
- * fdt_appendprop_u32() appends the given 32-bit integer value
- * (converting to big-endian if necessary) to the value of the named
- * property in the given node, or creates a new property with that
- * value if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_appendprop_u32(void *fdt, int nodeoffset,
-				     const char *name, uint32_t val)
-{
-	fdt32_t tmp = cpu_to_fdt32(val);
-	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_appendprop_u64 - append a 64-bit integer value to a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @val: 64-bit integer value to append to the property (native endian)
- *
- * fdt_appendprop_u64() appends the given 64-bit integer value
- * (converting to big-endian if necessary) to the value of the named
- * property in the given node, or creates a new property with that
- * value if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,
-				     const char *name, uint64_t val)
-{
-	fdt64_t tmp = cpu_to_fdt64(val);
-	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
-}
-
-/**
- * fdt_appendprop_cell - append a single cell value to a property
- *
- * This is an alternative name for fdt_appendprop_u32()
- */
-static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
-				      const char *name, uint32_t val)
-{
-	return fdt_appendprop_u32(fdt, nodeoffset, name, val);
-}
-
-/**
- * fdt_appendprop_string - append a string to a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to change
- * @name: name of the property to change
- * @str: string value to append to the property
- *
- * fdt_appendprop_string() appends the given string to the value of
- * the named property in the given node, or creates a new property
- * with that value if it does not already exist.
- *
- * This function may insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
- *		contain the new property value
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-#define fdt_appendprop_string(fdt, nodeoffset, name, str) \
-	fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
-
-/**
- * fdt_delprop - delete a property
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node whose property to nop
- * @name: name of the property to nop
- *
- * fdt_del_property() will delete the given property.
- *
- * This function will delete data from the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOTFOUND, node does not have the named property
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_delprop(void *fdt, int nodeoffset, const char *name);
-
-/**
- * fdt_add_subnode_namelen - creates a new node based on substring
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- * @namelen: number of characters of name to consider
- *
- * Identical to fdt_add_subnode(), but use only the first namelen
- * characters of name as the name of the new node.  This is useful for
- * creating subnodes based on a portion of a larger string, such as a
- * full path.
- */
-#ifndef SWIG /* Not available in Python */
-int fdt_add_subnode_namelen(void *fdt, int parentoffset,
-			    const char *name, int namelen);
-#endif
-
-/**
- * fdt_add_subnode - creates a new node
- * @fdt: pointer to the device tree blob
- * @parentoffset: structure block offset of a node
- * @name: name of the subnode to locate
- *
- * fdt_add_subnode() creates a new node as a subnode of the node at
- * structure block offset parentoffset, with the given name (which
- * should include the unit address, if any).
- *
- * This function will insert data into the blob, and will therefore
- * change the offsets of some existing nodes.
-
- * returns:
- *	structure block offset of the created nodeequested subnode (>=0), on
- *		success
- *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
- *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
- *		tag
- *	-FDT_ERR_EXISTS, if the node at parentoffset already has a subnode of
- *		the given name
- *	-FDT_ERR_NOSPACE, if there is insufficient free space in the
- *		blob to contain the new node
- *	-FDT_ERR_NOSPACE
- *	-FDT_ERR_BADLAYOUT
- *      -FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings.
- */
-int fdt_add_subnode(void *fdt, int parentoffset, const char *name);
-
-/**
- * fdt_del_node - delete a node (subtree)
- * @fdt: pointer to the device tree blob
- * @nodeoffset: offset of the node to nop
- *
- * fdt_del_node() will remove the given node, including all its
- * subnodes if any, from the blob.
- *
- * This function will delete data from the blob, and will therefore
- * change the offsets of some existing nodes.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_del_node(void *fdt, int nodeoffset);
-
-/**
- * fdt_overlay_apply - Applies a DT overlay on a base DT
- * @fdt: pointer to the base device tree blob
- * @fdto: pointer to the device tree overlay blob
- *
- * fdt_overlay_apply() will apply the given device tree overlay on the
- * given base device tree.
- *
- * Expect the base device tree to be modified, even if the function
- * returns an error.
- *
- * returns:
- *	0, on success
- *	-FDT_ERR_NOSPACE, there's not enough space in the base device tree
- *	-FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or
- *		properties in the base DT
- *	-FDT_ERR_BADPHANDLE,
- *	-FDT_ERR_BADOVERLAY,
- *	-FDT_ERR_NOPHANDLES,
- *	-FDT_ERR_INTERNAL,
- *	-FDT_ERR_BADLAYOUT,
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADOFFSET,
- *	-FDT_ERR_BADPATH,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTRUCTURE,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_TRUNCATED, standard meanings
- */
-int fdt_overlay_apply(void *fdt, void *fdto);
-
-/**********************************************************************/
-/* Debugging / informational functions                                */
-/**********************************************************************/
-
-#ifndef SWIG /* Not available in Python */
-const char *fdt_strerror(int errval);
-
-/**
- * fdt_remove_unused_strings() - Remove any unused strings from an FDT
- *
- * This creates a new device tree in @new with unused strings removed. The
- * called can then use fdt_pack() to minimise the space consumed.
- *
- * @old:	Old device tree blog
- * @new:	Place to put new device tree blob, which must be as large as
- *		@old
- * @return
- *	0, on success
- *	-FDT_ERR_BADOFFSET, corrupt device tree
- *	-FDT_ERR_NOSPACE, out of space, which should not happen unless there
- *		is something very wrong with the device tree input
- */
-int fdt_remove_unused_strings(const void *old, void *new);
-
-struct fdt_region {
-	int offset;
-	int size;
-};
-
-/*
- * Flags for fdt_find_regions()
- *
- * Add a region for the string table (always the last region)
- */
-#define FDT_REG_ADD_STRING_TAB		(1 << 0)
-
-/*
- * Add all supernodes of a matching node/property, useful for creating a
- * valid subset tree
- */
-#define FDT_REG_SUPERNODES		(1 << 1)
-
-/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */
-#define FDT_REG_DIRECT_SUBNODES	(1 << 2)
-
-/* Add all subnodes of a matching node */
-#define FDT_REG_ALL_SUBNODES		(1 << 3)
-
-/* Add a region for the mem_rsvmap table (always the first region) */
-#define FDT_REG_ADD_MEM_RSVMAP		(1 << 4)
-
-/* Indicates what an fdt part is (node, property, value) */
-#define FDT_IS_NODE			(1 << 0)
-#define FDT_IS_PROP			(1 << 1)
-#define FDT_IS_VALUE			(1 << 2)	/* not supported */
-#define FDT_IS_COMPAT			(1 << 3)	/* used internally */
-#define FDT_NODE_HAS_PROP		(1 << 4)	/* node contains prop */
-
-#define FDT_ANY_GLOBAL		(FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \
-					FDT_IS_COMPAT)
-#define FDT_IS_ANY			0x1f		/* all the above */
-
-/* We set a reasonable limit on the number of nested nodes */
-#define FDT_MAX_DEPTH			32
-
-/* Decribes what we want to include from the current tag */
-enum want_t {
-	WANT_NOTHING,
-	WANT_NODES_ONLY,		/* No properties */
-	WANT_NODES_AND_PROPS,		/* Everything for one level */
-	WANT_ALL_NODES_AND_PROPS	/* Everything for all levels */
-};
-
-/* Keeps track of the state at parent nodes */
-struct fdt_subnode_stack {
-	int offset;		/* Offset of node */
-	enum want_t want;	/* The 'want' value here */
-	int included;		/* 1 if we included this node, 0 if not */
-};
-
-struct fdt_region_ptrs {
-	int depth;			/* Current tree depth */
-	int done;			/* What we have completed scanning */
-	enum want_t want;		/* What we are currently including */
-	char *end;			/* Pointer to end of full node path */
-	int nextoffset;			/* Next node offset to check */
-};
-
-/* The state of our finding algortihm */
-struct fdt_region_state {
-	struct fdt_subnode_stack stack[FDT_MAX_DEPTH];	/* node stack */
-	struct fdt_region *region;	/* Contains list of regions found */
-	int count;			/* Numnber of regions found */
-	const void *fdt;		/* FDT blob */
-	int max_regions;		/* Maximum regions to find */
-	int can_merge;		/* 1 if we can merge with previous region */
-	int start;			/* Start position of current region */
-	struct fdt_region_ptrs ptrs;	/* Pointers for what we are up to */
-};
-
-/**
- * fdt_find_regions() - find regions in device tree
- *
- * Given a list of nodes to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- *
- * Nodes which are given in 'inc' are included in the region list, as
- * are the names of the immediate subnodes nodes (but not the properties
- * or subnodes of those subnodes).
- *
- * For eaxample "/" means to include the root node, all root properties
- * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter
- * ensures that we capture the names of the subnodes. In a hashing situation
- * it prevents the root node from changing at all Any change to non-excluded
- * properties, names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too.
- *
- * The device tree header is not included in the list.
- *
- * @fdt:	Device tree to check
- * @inc:	List of node paths to included
- * @inc_count:	Number of node paths in list
- * @exc_prop:	List of properties names to exclude
- * @exc_prop_count:	Number of properties in exclude list
- * @region:	Returns list of regions
- * @max_region:	Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @add_string_tab:	1 to add a region for the string table
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again.
- */
-int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
-		     char * const exc_prop[], int exc_prop_count,
-		     struct fdt_region region[], int max_regions,
-		     char *path, int path_len, int add_string_tab);
-
-/**
- * fdt_first_region() - find regions in device tree
- *
- * Given a nodes and properties to include and properties to exclude, find
- * the regions of the device tree which describe those included parts.
- *
- * The use for this function is twofold. Firstly it provides a convenient
- * way of performing a structure-aware grep of the tree. For example it is
- * possible to grep for a node and get all the properties associated with
- * that node. Trees can be subsetted easily, by specifying the nodes that
- * are required, and then writing out the regions returned by this function.
- * This is useful for small resource-constrained systems, such as boot
- * loaders, which want to use an FDT but do not need to know about all of
- * it.
- *
- * Secondly it makes it easy to hash parts of the tree and detect changes.
- * The intent is to get a list of regions which will be invariant provided
- * those parts are invariant. For example, if you request a list of regions
- * for all nodes but exclude the property "data", then you will get the
- * same region contents regardless of any change to "data" properties.
- *
- * This function can be used to produce a byte-stream to send to a hashing
- * function to verify that critical parts of the FDT have not changed.
- * Note that semantically null changes in order could still cause false
- * hash misses. Such reordering might happen if the tree is regenerated
- * from source, and nodes are reordered (the bytes-stream will be emitted
- * in a different order and mnay hash functions will detect this). However
- * if an existing tree is modified using libfdt functions, such as
- * fdt_add_subnode() and fdt_setprop(), then this problem is avoided.
- *
- * The nodes/properties to include/exclude are defined by a function
- * provided by the caller. This function is called for each node and
- * property, and must return:
- *
- *    0 - to exclude this part
- *    1 - to include this part
- *   -1 - for FDT_IS_PROP only: no information is available, so include
- *		if its containing node is included
- *
- * The last case is only used to deal with properties. Often a property is
- * included if its containing node is included - this is the case where
- * -1 is returned.. However if the property is specifically required to be
- * included/excluded, then 0 or 1 can be returned. Note that including a
- * property when the FDT_REG_SUPERNODES flag is given will force its
- * containing node to be included since it is not valid to have a property
- * that is not in a node.
- *
- * Using the information provided, the inclusion of a node can be controlled
- * either by a node name or its compatible string, or any other property
- * that the function can determine.
- *
- * As an example, including node "/" means to include the root node and all
- * root properties. A flag provides a way of also including supernodes (of
- * which there is none for the root node), and another flag includes
- * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and
- * FDT_END_NODE of all subnodes of /.
- *
- * The subnode feature helps in a hashing situation since it prevents the
- * root node from changing at all. Any change to non-excluded properties,
- * names of subnodes or number of subnodes would be detected.
- *
- * When used with FITs this provides the ability to hash and sign parts of
- * the FIT based on different configurations in the FIT. Then it is
- * impossible to change anything about that configuration (include images
- * attached to the configuration), but it may be possible to add new
- * configurations, new images or new signatures within the existing
- * framework.
- *
- * Adding new properties to a device tree may result in the string table
- * being extended (if the new property names are different from those
- * already added). This function can optionally include a region for
- * the string table so that this can be part of the hash too. This is always
- * the last region.
- *
- * The FDT also has a mem_rsvmap table which can also be included, and is
- * always the first region if so.
- *
- * The device tree header is not included in the region list. Since the
- * contents of the FDT are changing (shrinking, often), the caller will need
- * to regenerate the header anyway.
- *
- * @fdt:	Device tree to check
- * @h_include:	Function to call to determine whether to include a part or
- *		not:
- *
- *		@priv: Private pointer as passed to fdt_find_regions()
- *		@fdt: Pointer to FDT blob
- *		@offset: Offset of this node / property
- *		@type: Type of this part, FDT_IS_...
- *		@data: Pointer to data (node name, property name, compatible
- *			string, value (not yet supported)
- *		@size: Size of data, or 0 if none
- *		@return 0 to exclude, 1 to include, -1 if no information is
- *		available
- * @priv:	Private pointer passed to h_include
- * @region:	Returns list of regions, sorted by offset
- * @max_regions: Maximum length of region list
- * @path:	Pointer to a temporary string for the function to use for
- *		building path names
- * @path_len:	Length of path, must be large enough to hold the longest
- *		path in the tree
- * @flags:	Various flags that control the region algortihm, see
- *		FDT_REG_...
- * @return number of regions in list. If this is >max_regions then the
- * region array was exhausted. You should increase max_regions and try
- * the call again. Only the first max_regions elements are available in the
- * array.
- *
- * On error a -ve value is return, which can be:
- *
- *	-FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags
- *	-FDT_ERR_BADLAYOUT
- *	-FDT_ERR_NOSPACE (path area is too small)
- */
-int fdt_first_region(const void *fdt,
-		int (*h_include)(void *priv, const void *fdt, int offset,
-				 int type, const char *data, int size),
-		void *priv, struct fdt_region *region,
-		char *path, int path_len, int flags,
-		struct fdt_region_state *info);
-
-/** fdt_next_region() - find next region
- *
- * See fdt_first_region() for full description. This function finds the
- * next region according to the provided parameters, which must be the same
- * as passed to fdt_first_region().
- *
- * This function can additionally return -FDT_ERR_NOTFOUND when there are no
- * more regions
- */
-int fdt_next_region(const void *fdt,
-		int (*h_include)(void *priv, const void *fdt, int offset,
-				 int type, const char *data, int size),
-		void *priv, struct fdt_region *region,
-		char *path, int path_len, int flags,
-		struct fdt_region_state *info);
-
-/**
- * fdt_add_alias_regions() - find aliases that point to existing regions
- *
- * Once a device tree grep is complete some of the nodes will be present
- * and some will have been dropped. This function checks all the alias nodes
- * to figure out which points point to nodes which are still present. These
- * aliases need to be kept, along with the nodes they reference.
- *
- * Given a list of regions function finds the aliases that still apply and
- * adds more regions to the list for these. This function is called after
- * fdt_next_region() has finished returning regions and requires the same
- * state.
- *
- * @fdt:	Device tree file to reference
- * @region:	List of regions that will be kept
- * @count:	Number of regions
- * @max_regions: Number of entries that can fit in @region
- * @info:	Region state as returned from fdt_next_region()
- * @return new number of regions in @region (i.e. count + the number added)
- * or -FDT_ERR_NOSPACE if there was not enough space.
- */
-int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
-			  int max_regions, struct fdt_region_state *info);
-int fdt_device_is_available(const void *blob, int node);
-/**
- * fdt_node_offset_by_phandle_node - find the node with a given phandle and node
- * @fdt: pointer to the device tree blob
- * @phandle: phandle value
- * @node: start node value
- *
- * fdt_node_offset_by_phandle_node() returns the offset of the node
- * which has the given phandle value.  If there is more than one node
- * in the tree with the given phandle (an invalid tree), results are
- * undefined.
- *
- * returns:
- *	structure block offset of the located node (>= 0), on success
- *	-FDT_ERR_NOTFOUND, no node with that phandle exists
- *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
- *	-FDT_ERR_BADMAGIC,
- *	-FDT_ERR_BADVERSION,
- *	-FDT_ERR_BADSTATE,
- *	-FDT_ERR_BADSTRUCTURE, standard meanings
- */
-int fdt_node_offset_by_phandle_node(const void *fdt, int node, uint32_t phandle);
-#endif /* SWIG */
-
-#endif /* _LIBFDT_H */

commit 4e2c3b8c76d8e0f31bdb66eb72a7492c1070b1d5
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:13 2018 +0900

    UPSTREAM: libfdt: migrate fdt_rw.c to a wrapper of scripts/dtc/libfdt/fdt_rw.c
    
    The only difference between scripts/dtc/libfdt/fdt_rw.c and
    lib/libfdt/fdt_rw.c is fdt_remove_unused_strings().
    
    It is only used by fdtgrep, so we do not need to compile it for U-Boot
    image.  Move it to tools/libfdt/fdw_rw.c so that lib/libfdt/fdt_rw.c
    can be a wrapper of scripts/dtc/libfdt/fdt_rw.c.
    
    Change-Id: I6e2578d4bfdf75438d3aa1cb51f270f34527d37d
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index be42e946b7..4e3e12f505 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -11,6 +11,7 @@ obj-y += \
 	fdt_wip.o \
 	fdt_strerror.o \
 	fdt_sw.o \
+	fdt_rw.o \
 	fdt_empty_tree.o \
 	fdt_addresses.o
 
@@ -18,9 +19,7 @@ obj-$(CONFIG_OF_LIBFDT_OVERLAY) += fdt_overlay.o
 
 # Locally modified for U-Boot.
 # TODO: split out the local modifiction.
-obj-y += \
-	fdt_ro.o \
-	fdt_rw.o
+obj-y += fdt_ro.o
 
 # U-Boot own file
 obj-y += fdt_region.o
diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 3dc775261f..aafded07a1 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -1,496 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-static int _fdt_blocks_misordered(const void *fdt,
-			      int mem_rsv_size, int struct_size)
-{
-	return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8))
-		|| (fdt_off_dt_struct(fdt) <
-		    (fdt_off_mem_rsvmap(fdt) + mem_rsv_size))
-		|| (fdt_off_dt_strings(fdt) <
-		    (fdt_off_dt_struct(fdt) + struct_size))
-		|| (fdt_totalsize(fdt) <
-		    (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
-}
-
-static int _fdt_rw_check_header(void *fdt)
-{
-	FDT_CHECK_HEADER(fdt);
-
-	if (fdt_version(fdt) < 17)
-		return -FDT_ERR_BADVERSION;
-	if (_fdt_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry),
-				   fdt_size_dt_struct(fdt)))
-		return -FDT_ERR_BADLAYOUT;
-	if (fdt_version(fdt) > 17)
-		fdt_set_version(fdt, 17);
-
-	return 0;
-}
-
-#define FDT_RW_CHECK_HEADER(fdt) \
-	{ \
-		int __err; \
-		if ((__err = _fdt_rw_check_header(fdt)) != 0) \
-			return __err; \
-	}
-
-static inline int _fdt_data_size(void *fdt)
-{
-	return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
-}
-
-static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen)
-{
-	char *p = splicepoint;
-	char *end = (char *)fdt + _fdt_data_size(fdt);
-
-	if (((p + oldlen) < p) || ((p + oldlen) > end))
-		return -FDT_ERR_BADOFFSET;
-	if ((p < (char *)fdt) || ((end - oldlen + newlen) < (char *)fdt))
-		return -FDT_ERR_BADOFFSET;
-	if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt)))
-		return -FDT_ERR_NOSPACE;
-	memmove(p + newlen, p + oldlen, end - p - oldlen);
-	return 0;
-}
-
-static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
-			       int oldn, int newn)
-{
-	int delta = (newn - oldn) * sizeof(*p);
-	int err;
-	err = _fdt_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
-	if (err)
-		return err;
-	fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta);
-	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
-	return 0;
-}
-
-static int _fdt_splice_struct(void *fdt, void *p,
-			      int oldlen, int newlen)
-{
-	int delta = newlen - oldlen;
-	int err;
-
-	if ((err = _fdt_splice(fdt, p, oldlen, newlen)))
-		return err;
-
-	fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta);
-	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
-	return 0;
-}
-
-static int _fdt_splice_string(void *fdt, int newlen)
-{
-	void *p = (char *)fdt
-		+ fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
-	int err;
-
-	if ((err = _fdt_splice(fdt, p, 0, newlen)))
-		return err;
-
-	fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen);
-	return 0;
-}
-
-static int _fdt_find_add_string(void *fdt, const char *s)
-{
-	char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
-	const char *p;
-	char *new;
-	int len = strlen(s) + 1;
-	int err;
-
-	p = _fdt_find_string(strtab, fdt_size_dt_strings(fdt), s);
-	if (p)
-		/* found it */
-		return (p - strtab);
-
-	new = strtab + fdt_size_dt_strings(fdt);
-	err = _fdt_splice_string(fdt, len);
-	if (err)
-		return err;
-
-	memcpy(new, s, len);
-	return (new - strtab);
-}
-
-int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
-{
-	struct fdt_reserve_entry *re;
-	int err;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt));
-	err = _fdt_splice_mem_rsv(fdt, re, 0, 1);
-	if (err)
-		return err;
-
-	re->address = cpu_to_fdt64(address);
-	re->size = cpu_to_fdt64(size);
-	return 0;
-}
-
-int fdt_del_mem_rsv(void *fdt, int n)
-{
-	struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	if (n >= fdt_num_mem_rsv(fdt))
-		return -FDT_ERR_NOTFOUND;
-
-	return _fdt_splice_mem_rsv(fdt, re, 1, 0);
-}
-
-static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
-				int len, struct fdt_property **prop)
-{
-	int oldlen;
-	int err;
-
-	*prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
-	if (!*prop)
-		return oldlen;
-
-	if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
-				      FDT_TAGALIGN(len))))
-		return err;
-
-	(*prop)->len = cpu_to_fdt32(len);
-	return 0;
-}
-
-static int _fdt_add_property(void *fdt, int nodeoffset, const char *name,
-			     int len, struct fdt_property **prop)
-{
-	int proplen;
-	int nextoffset;
-	int namestroff;
-	int err;
-
-	if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
-		return nextoffset;
-
-	namestroff = _fdt_find_add_string(fdt, name);
-	if (namestroff < 0)
-		return namestroff;
-
-	*prop = _fdt_offset_ptr_w(fdt, nextoffset);
-	proplen = sizeof(**prop) + FDT_TAGALIGN(len);
-
-	err = _fdt_splice_struct(fdt, *prop, 0, proplen);
-	if (err)
-		return err;
-
-	(*prop)->tag = cpu_to_fdt32(FDT_PROP);
-	(*prop)->nameoff = cpu_to_fdt32(namestroff);
-	(*prop)->len = cpu_to_fdt32(len);
-	return 0;
-}
-
-int fdt_set_name(void *fdt, int nodeoffset, const char *name)
-{
-	char *namep;
-	int oldlen, newlen;
-	int err;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen);
-	if (!namep)
-		return oldlen;
-
-	newlen = strlen(name);
-
-	err = _fdt_splice_struct(fdt, namep, FDT_TAGALIGN(oldlen+1),
-				 FDT_TAGALIGN(newlen+1));
-	if (err)
-		return err;
-
-	memcpy(namep, name, newlen+1);
-	return 0;
-}
-
-int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
-			    int len, void **prop_data)
-{
-	struct fdt_property *prop;
-	int err;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	err = _fdt_resize_property(fdt, nodeoffset, name, len, &prop);
-	if (err == -FDT_ERR_NOTFOUND)
-		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
-	if (err)
-		return err;
-
-	*prop_data = prop->data;
-	return 0;
-}
-
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len)
-{
-	void *prop_data;
-	int err;
-
-	err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data);
-	if (err)
-		return err;
-
-	if (len)
-		memcpy(prop_data, val, len);
-	return 0;
-}
-
-int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
-		   const void *val, int len)
-{
-	struct fdt_property *prop;
-	int err, oldlen, newlen;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
-	if (prop) {
-		newlen = len + oldlen;
-		err = _fdt_splice_struct(fdt, prop->data,
-					 FDT_TAGALIGN(oldlen),
-					 FDT_TAGALIGN(newlen));
-		if (err)
-			return err;
-		prop->len = cpu_to_fdt32(newlen);
-		memcpy(prop->data + oldlen, val, len);
-	} else {
-		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
-		if (err)
-			return err;
-		memcpy(prop->data, val, len);
-	}
-	return 0;
-}
-
-int fdt_delprop(void *fdt, int nodeoffset, const char *name)
-{
-	struct fdt_property *prop;
-	int len, proplen;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (!prop)
-		return len;
-
-	proplen = sizeof(*prop) + FDT_TAGALIGN(len);
-	return _fdt_splice_struct(fdt, prop, proplen, 0);
-}
-
-int fdt_add_subnode_namelen(void *fdt, int parentoffset,
-			    const char *name, int namelen)
-{
-	struct fdt_node_header *nh;
-	int offset, nextoffset;
-	int nodelen;
-	int err;
-	uint32_t tag;
-	fdt32_t *endtag;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen);
-	if (offset >= 0)
-		return -FDT_ERR_EXISTS;
-	else if (offset != -FDT_ERR_NOTFOUND)
-		return offset;
-
-	/* Try to place the new node after the parent's properties */
-	fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */
-	do {
-		offset = nextoffset;
-		tag = fdt_next_tag(fdt, offset, &nextoffset);
-	} while ((tag == FDT_PROP) || (tag == FDT_NOP));
-
-	nh = _fdt_offset_ptr_w(fdt, offset);
-	nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE;
-
-	err = _fdt_splice_struct(fdt, nh, 0, nodelen);
-	if (err)
-		return err;
-
-	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
-	memset(nh->name, 0, FDT_TAGALIGN(namelen+1));
-	memcpy(nh->name, name, namelen);
-	endtag = (fdt32_t *)((char *)nh + nodelen - FDT_TAGSIZE);
-	*endtag = cpu_to_fdt32(FDT_END_NODE);
-
-	return offset;
-}
-
-int fdt_add_subnode(void *fdt, int parentoffset, const char *name)
-{
-	return fdt_add_subnode_namelen(fdt, parentoffset, name, strlen(name));
-}
-
-int fdt_del_node(void *fdt, int nodeoffset)
-{
-	int endoffset;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
-	if (endoffset < 0)
-		return endoffset;
-
-	return _fdt_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset),
-				  endoffset - nodeoffset, 0);
-}
-
-static void _fdt_packblocks(const char *old, char *new,
-			    int mem_rsv_size, int struct_size)
-{
-	int mem_rsv_off, struct_off, strings_off;
-
-	mem_rsv_off = FDT_ALIGN(sizeof(struct fdt_header), 8);
-	struct_off = mem_rsv_off + mem_rsv_size;
-	strings_off = struct_off + struct_size;
-
-	memmove(new + mem_rsv_off, old + fdt_off_mem_rsvmap(old), mem_rsv_size);
-	fdt_set_off_mem_rsvmap(new, mem_rsv_off);
-
-	memmove(new + struct_off, old + fdt_off_dt_struct(old), struct_size);
-	fdt_set_off_dt_struct(new, struct_off);
-	fdt_set_size_dt_struct(new, struct_size);
-
-	memmove(new + strings_off, old + fdt_off_dt_strings(old),
-		fdt_size_dt_strings(old));
-	fdt_set_off_dt_strings(new, strings_off);
-	fdt_set_size_dt_strings(new, fdt_size_dt_strings(old));
-}
-
-int fdt_open_into(const void *fdt, void *buf, int bufsize)
-{
-	int err;
-	int mem_rsv_size, struct_size;
-	int newsize;
-	const char *fdtstart = fdt;
-	const char *fdtend = fdtstart + fdt_totalsize(fdt);
-	char *tmp;
-
-	FDT_CHECK_HEADER(fdt);
-
-	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
-		* sizeof(struct fdt_reserve_entry);
-
-	if (fdt_version(fdt) >= 17) {
-		struct_size = fdt_size_dt_struct(fdt);
-	} else {
-		struct_size = 0;
-		while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
-			;
-		if (struct_size < 0)
-			return struct_size;
-	}
-
-	if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) {
-		/* no further work necessary */
-		err = fdt_move(fdt, buf, bufsize);
-		if (err)
-			return err;
-		fdt_set_version(buf, 17);
-		fdt_set_size_dt_struct(buf, struct_size);
-		fdt_set_totalsize(buf, bufsize);
-		return 0;
-	}
-
-	/* Need to reorder */
-	newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
-		+ struct_size + fdt_size_dt_strings(fdt);
-
-	if (bufsize < newsize)
-		return -FDT_ERR_NOSPACE;
-
-	/* First attempt to build converted tree at beginning of buffer */
-	tmp = buf;
-	/* But if that overlaps with the old tree... */
-	if (((tmp + newsize) > fdtstart) && (tmp < fdtend)) {
-		/* Try right after the old tree instead */
-		tmp = (char *)(uintptr_t)fdtend;
-		if ((tmp + newsize) > ((char *)buf + bufsize))
-			return -FDT_ERR_NOSPACE;
-	}
-
-	_fdt_packblocks(fdt, tmp, mem_rsv_size, struct_size);
-	memmove(buf, tmp, newsize);
-
-	fdt_set_magic(buf, FDT_MAGIC);
-	fdt_set_totalsize(buf, bufsize);
-	fdt_set_version(buf, 17);
-	fdt_set_last_comp_version(buf, 16);
-	fdt_set_boot_cpuid_phys(buf, fdt_boot_cpuid_phys(fdt));
-
-	return 0;
-}
-
-int fdt_pack(void *fdt)
-{
-	int mem_rsv_size;
-
-	FDT_RW_CHECK_HEADER(fdt);
-
-	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
-		* sizeof(struct fdt_reserve_entry);
-	_fdt_packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
-	fdt_set_totalsize(fdt, _fdt_data_size(fdt));
-
-	return 0;
-}
-
-int fdt_remove_unused_strings(const void *old, void *new)
-{
-	const struct fdt_property *old_prop;
-	struct fdt_property *new_prop;
-	int size = fdt_totalsize(old);
-	int next_offset, offset;
-	const char *str;
-	int ret;
-	int tag = FDT_PROP;
-
-	/* Make a copy and remove the strings */
-	memcpy(new, old, size);
-	fdt_set_size_dt_strings(new, 0);
-
-	/* Add every property name back into the new string table */
-	for (offset = 0; tag != FDT_END; offset = next_offset) {
-		tag = fdt_next_tag(old, offset, &next_offset);
-		if (tag != FDT_PROP)
-			continue;
-		old_prop = fdt_get_property_by_offset(old, offset, NULL);
-		new_prop = (struct fdt_property *)(unsigned long)
-			fdt_get_property_by_offset(new, offset, NULL);
-		str = fdt_string(old, fdt32_to_cpu(old_prop->nameoff));
-		ret = _fdt_find_add_string(new, str);
-		if (ret < 0)
-			return ret;
-		new_prop->nameoff = cpu_to_fdt32(ret);
-	}
-
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_rw.c"
diff --git a/tools/Makefile b/tools/Makefile
index ebbd8930d9..f3bf68204e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -76,11 +76,11 @@ FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 
 # The following files are synced with upstream DTC.
 # Use synced versions from scripts/dtc/libfdt/.
-LIBFDT_SRCS_SYNCED := fdt.c fdt_wip.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
-		      fdt_addresses.c fdt_overlay.c
+LIBFDT_SRCS_SYNCED := fdt.c fdt_wip.c fdt_sw.c fdt_rw.c \
+		fdt_strerror.c fdt_empty_tree.c fdt_addresses.c fdt_overlay.c
 # The following files are locally modified for U-Boot (unfotunately).
 # Use U-Boot own versions from lib/libfdt/.
-LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_rw.c fdt_region.c
+LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_region.c
 
 LIBFDT_OBJS := $(addprefix libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_SYNCED))) \
 	       $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_UNSYNCED)))
diff --git a/tools/fdt_host.h b/tools/fdt_host.h
index 134d965713..8d4aa066bb 100644
--- a/tools/fdt_host.h
+++ b/tools/fdt_host.h
@@ -11,6 +11,23 @@
 #include "../include/libfdt.h"
 #include "../include/fdt_support.h"
 
+/**
+ * fdt_remove_unused_strings() - Remove any unused strings from an FDT
+ *
+ * This creates a new device tree in @new with unused strings removed. The
+ * called can then use fdt_pack() to minimise the space consumed.
+ *
+ * @old:	Old device tree blog
+ * @new:	Place to put new device tree blob, which must be as large as
+ *		@old
+ * @return
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, corrupt device tree
+ *	-FDT_ERR_NOSPACE, out of space, which should not happen unless there
+ *		is something very wrong with the device tree input
+ */
+int fdt_remove_unused_strings(const void *old, void *new);
+
 int fit_check_sign(const void *working_fdt, const void *key);
 
 #endif /* __FDT_HOST_H__ */
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index b46f775d15..8d33205ea2 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -19,7 +19,7 @@
 #include <string.h>
 #include <unistd.h>
 
-#include "../include/libfdt.h"
+#include "fdt_host.h"
 #include "libfdt_internal.h"
 
 /* Define DEBUG to get some debugging output on stderr */
diff --git a/tools/libfdt/fdt_rw.c b/tools/libfdt/fdt_rw.c
new file mode 100644
index 0000000000..e475084fae
--- /dev/null
+++ b/tools/libfdt/fdt_rw.c
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause */
+#include "fdt_host.h"
+#include "../../scripts/dtc/libfdt/fdt_rw.c"
+
+int fdt_remove_unused_strings(const void *old, void *new)
+{
+	const struct fdt_property *old_prop;
+	struct fdt_property *new_prop;
+	int size = fdt_totalsize(old);
+	int next_offset, offset;
+	const char *str;
+	int ret;
+	int tag = FDT_PROP;
+
+	/* Make a copy and remove the strings */
+	memcpy(new, old, size);
+	fdt_set_size_dt_strings(new, 0);
+
+	/* Add every property name back into the new string table */
+	for (offset = 0; tag != FDT_END; offset = next_offset) {
+		tag = fdt_next_tag(old, offset, &next_offset);
+		if (tag != FDT_PROP)
+			continue;
+		old_prop = fdt_get_property_by_offset(old, offset, NULL);
+		new_prop = (struct fdt_property *)(unsigned long)
+			fdt_get_property_by_offset(new, offset, NULL);
+		str = fdt_string(old, fdt32_to_cpu(old_prop->nameoff));
+		ret = _fdt_find_add_string(new, str);
+		if (ret < 0)
+			return ret;
+		new_prop->nameoff = cpu_to_fdt32(ret);
+	}
+
+	return 0;
+}

commit 9862beb6eb2e5a8d16dcc661682dab7e3f23afc1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:15 2018 +0900

    UPSTREAM: tools: include necessary headers explicitly
    
    Several host-tools use "bool" type without including <stdbool.h>.
    This relies on the crappy header inclusion chain.
    
    tools/Makefile has the following line:
    
      HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \
    
    All host-tools are forced to include libfdt_env.h even if they are
    totally unrelated to FDT.  Then, <stdbool.h> is indirectly included
    as follows:
    
         include/libfdt_env.h
      -> include/linux/types.h
      -> <stdbool.h>
    
    I am fixing this horrible crap.  In advance, I need to add necessary
    include directives explicitly.  tools/fdtgrep.c needs more; <fctl.h>
    for open() and <errno.h> for errno.
    
    Change-Id: Ic2b0e0d4c417841f7eeb152e486d63fdfd1a4eff
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index 5897b6d5f7..b46f775d15 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -10,7 +10,10 @@
 
 #include <assert.h>
 #include <ctype.h>
+#include <errno.h>
 #include <getopt.h>
+#include <fcntl.h>
+#include <stdbool.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
diff --git a/tools/gen_ethaddr_crc.c b/tools/gen_ethaddr_crc.c
index fe9896dca9..8cf86f4835 100644
--- a/tools/gen_ethaddr_crc.c
+++ b/tools/gen_ethaddr_crc.c
@@ -6,6 +6,7 @@
  */
 
 #include <ctype.h>
+#include <stdbool.h>
 #include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
diff --git a/tools/ifdtool.c b/tools/ifdtool.c
index 195b1533ab..729991ee33 100644
--- a/tools/ifdtool.c
+++ b/tools/ifdtool.c
@@ -12,6 +12,7 @@
 #include <assert.h>
 #include <fcntl.h>
 #include <getopt.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
diff --git a/tools/imagetool.h b/tools/imagetool.h
index 0b2a707037..ac8f7d71ec 100644
--- a/tools/imagetool.h
+++ b/tools/imagetool.h
@@ -12,6 +12,7 @@
 #include "os_support.h"
 #include <errno.h>
 #include <fcntl.h>
+#include <stdbool.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
diff --git a/tools/mips-relocs.c b/tools/mips-relocs.c
index 8be69d320f..27d47308e0 100644
--- a/tools/mips-relocs.c
+++ b/tools/mips-relocs.c
@@ -11,6 +11,7 @@
 #include <errno.h>
 #include <fcntl.h>
 #include <limits.h>
+#include <stdbool.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <sys/mman.h>

commit fbedfcfba2a6f4d773323cde922570a76c1ef357
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:18 2018 +0900

    UPSTREAM: libfdt: migrate include/libfdt_env.h to a wrapper
    
    libfdt_env.h is supposed to provide system-dependent defines.
    
    scripts/dtc/libfdt/libfdt_env.h from upstream DTC is suitable
    for user-space, so we should use this for USE_HOSTCC case.
    
    For compiling U-Boot, we need to override such system-dependent
    defines, so use <linux/libfdt_env.h> imported from Linux.
    
    <libfdt.h> selects a proper one.  Maybe, we should split header
    inclusion completely, but I do not want too many patches at one.
    
    I can rip off the include/libfdt_env.h from HOST_EXTRACFLAGS.
    
    Change-Id: I6f5ea1067cd3ada1c8ece0c39b7bf43382c58ff6
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index ea26979fc2..d7e9d32863 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -1,24 +1,5 @@
-/*
- * libfdt - Flat Device Tree manipulation (build/run environment adaptation)
- * Copyright (C) 2007 Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
- * Original version written by David Gibson, IBM Corporation.
- *
- * SPDX-License-Identifier:	LGPL-2.1+
- */
-
-#ifndef _LIBFDT_ENV_H
-#define _LIBFDT_ENV_H
-
-#include "compiler.h"
-#include "linux/types.h"
-
-typedef __be16 fdt16_t;
-typedef __be32 fdt32_t;
-typedef __be64 fdt64_t;
-
-#define fdt32_to_cpu(x)		be32_to_cpu(x)
-#define cpu_to_fdt32(x)		cpu_to_be32(x)
-#define fdt64_to_cpu(x)		be64_to_cpu(x)
-#define cpu_to_fdt64(x)		cpu_to_be64(x)
-
-#endif /* _LIBFDT_ENV_H */
+#ifdef USE_HOSTCC
+#include "../scripts/dtc/libfdt/libfdt_env.h"
+#else
+#include <linux/libfdt_env.h>
+#endif
diff --git a/tools/Makefile b/tools/Makefile
index 73701a814b..ebbd8930d9 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -253,7 +253,7 @@ endif # !LOGO_BMP
 # Define __KERNEL_STRICT_NAMES to prevent typedef overlaps
 # Define _GNU_SOURCE to obtain the getline prototype from stdio.h
 #
-HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \
+HOST_EXTRACFLAGS += -include $(srctree)/include/compiler.h \
 		$(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \
 		-I$(srctree)/lib/libfdt \
 		-I$(srctree)/tools \

commit c78841b69b6e99434769070b1bb5b00f2c2681f1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Mar 21 18:03:33 2018 +0900

    UPSTREAM: libfdt: move FDT_RAMDISK_OVERHEAD to image-fdt.c
    
    This macro is locally referenced in common/image-fdt.c
    
    Change-Id: Iaf308d919d666be2615ef8f894099c538366e89d
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 94e53d47b1..76e8230226 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -22,6 +22,9 @@
 #define CONFIG_SYS_FDT_PAD 0x3000
 #endif
 
+/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
+#define FDT_RAMDISK_OVERHEAD	0x80
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static void fdt_error(const char *msg)
diff --git a/include/libfdt.h b/include/libfdt.h
index dbc56ec62e..de5743bfa7 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -8,7 +8,4 @@
 
 extern struct fdt_header *working_fdt;	/* Pointer to the working fdt */
 
-/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
-#define FDT_RAMDISK_OVERHEAD	0x80
-
 #endif /* UBOOT_LIBFDT_H */

commit f976fdd5c9b8cd35542785893984a98d2de948df
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sun Jan 21 19:19:16 2018 +0900

    UPSTREAM: libfdt: move working_fdt and FDT_RAMDISK_OVERHEAD to include/libfdt.h
    
    libfdt_env.h exists to contain system-dependent defines:
    
      - typedef of fdt*_t
      - fdt*_to_cpu(), cpu_to_fdt*
    
    working_fdt and FDT_RAMDISK_OVERHEAD are unrelated to the environment,
    so they must get out of this header.
    
    Change-Id: Ib37fbe1ef1926d9a1696f541fd356b493d5d4db7
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/libfdt.h b/include/libfdt.h
index 7ba13e634b..dbc56ec62e 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -1 +1,14 @@
+#ifndef UBOOT_LIBFDT_H
+#define UBOOT_LIBFDT_H
+/*
+ * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
+ */
+
 #include "../lib/libfdt/libfdt.h"
+
+extern struct fdt_header *working_fdt;	/* Pointer to the working fdt */
+
+/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
+#define FDT_RAMDISK_OVERHEAD	0x80
+
+#endif /* UBOOT_LIBFDT_H */
diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index 273b5d30f8..ea26979fc2 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -12,8 +12,6 @@
 #include "compiler.h"
 #include "linux/types.h"
 
-extern struct fdt_header *working_fdt;  /* Pointer to the working fdt */
-
 typedef __be16 fdt16_t;
 typedef __be32 fdt32_t;
 typedef __be64 fdt64_t;
@@ -23,7 +21,4 @@ typedef __be64 fdt64_t;
 #define fdt64_to_cpu(x)		be64_to_cpu(x)
 #define cpu_to_fdt64(x)		cpu_to_be64(x)
 
-/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
-#define FDT_RAMDISK_OVERHEAD	0x80
-
 #endif /* _LIBFDT_ENV_H */

commit 260eab18736e797f65a0a14c691ddaeb2f4e32a9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 21 11:07:52 2018 +0800

    rockchip: video: use common API instead of private
    
    We can use fdtdec_get_is_enabled() instead of fdt_device_is_available().
    
    Change-Id: I7aa03ed82f83fc72206659889a4f7f095dc66b36
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_drm_tve.c b/drivers/video/drm/rockchip_drm_tve.c
index 91748be98b..7c68ca7931 100644
--- a/drivers/video/drm/rockchip_drm_tve.c
+++ b/drivers/video/drm/rockchip_drm_tve.c
@@ -287,7 +287,7 @@ static int rockchip_drm_tve_init(struct display_state *state)
 	}
 #endif
 
-	if (!fdt_device_is_available(gd->fdt_blob, node)) {
+	if (!fdtdec_get_is_enabled(gd->fdt_blob, node)) {
 		printf("tve is disabled\n");
 		goto err;
 	}
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 49c3cddc6f..14ead04480 100755
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -703,26 +703,3 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
 
 	return offset; /* error from fdt_next_node() */
 }
-
-
-/**
- *  of_device_is_available - check if a device is available for use
- *
- *  @device: Node to check for availability
- *
- *  Returns 1 if the status property is absent or set to "okay" or "ok",
- *  0 otherwise
- */
-int fdt_device_is_available(const void *blob, int node)
-{
-	const char *cell;
-	cell = fdt_getprop(blob, node, "status", NULL);
-	if (cell) {
-		if (!strcmp(cell, "okay") || !strcmp(cell, "ok"))
-			return 1;
-	} else {
-		return 1;
-	}
-	return 0;
-}
-

commit 1f4079200dac1639a89120dc8eee77dbcabf9223
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Dec 17 17:58:22 2018 +0800

    configs: rk3399pro: support io-domain driver
    
    Change-Id: I332a9be7e45746089e869bec2f8d3846a296cc84
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
index bde4f091dd..862689987e 100644
--- a/configs/rk3399pro_defconfig
+++ b/configs/rk3399pro_defconfig
@@ -70,6 +70,8 @@ CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_POWER_FG_RK818=y
+CONFIG_IO_DOMAIN=y
+CONFIG_ROCKCHIP_IO_DOMAIN=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit dae202865e450295f70bc2b9ed110c7fdef5a5c7
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Mon Dec 17 17:56:40 2018 +0800

    rockchip: board: add io-domain init
    
    Change-Id: I073cb6567e8becfdb1be09c7faef3c06b308dc6f
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e86191fd00..230a1e2302 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -23,6 +23,9 @@
 #ifdef CONFIG_DM_DVFS
 #include <dvfs.h>
 #endif
+#ifdef CONFIG_ROCKCHIP_IO_DOMAIN
+#include <io-domain.h>
+#endif
 #ifdef CONFIG_DM_REGULATOR
 #include <power/regulator.h>
 #endif
@@ -232,6 +235,11 @@ int board_init(void)
 	if (ret)
 		debug("%s: Cannot enable boot on regulator\n", __func__);
 #endif
+
+#ifdef CONFIG_ROCKCHIP_IO_DOMAIN
+	io_domain_init();
+#endif
+
 	set_armclk_rate();
 
 #ifdef CONFIG_DM_DVFS

commit 4f43646e3628de1a420479d1c38d0f9e1544fb94
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Dec 14 11:55:36 2018 +0800

    power: rockchip: add io-domain driver
    
    The io-domains on Rockchip SoCs will be supplied with 1.8V or 3.3V(3.0V)
    depends on hardware design. The driver needs to config them through grf
    register.
    
    Change-Id: Ic896b94bfadd0b808da54992e58e2cf4a8fee950
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/Makefile b/Makefile
index 7060da1c5f..efedc288d4 100644
--- a/Makefile
+++ b/Makefile
@@ -672,7 +672,8 @@ libs-y += drivers/power/ \
 	drivers/power/pmic/ \
 	drivers/power/battery/ \
 	drivers/power/regulator/ \
-	drivers/power/dvfs/
+	drivers/power/dvfs/ \
+	drivers/power/io-domain/
 libs-y += drivers/spi/
 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index adf5ff58bf..608df55cca 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -4,6 +4,8 @@ source "drivers/power/domain/Kconfig"
 
 source "drivers/power/fuel_gauge/Kconfig"
 
+source "drivers/power/io-domain/Kconfig"
+
 source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
diff --git a/drivers/power/io-domain/Kconfig b/drivers/power/io-domain/Kconfig
new file mode 100644
index 0000000000..1c71e0a9a2
--- /dev/null
+++ b/drivers/power/io-domain/Kconfig
@@ -0,0 +1,19 @@
+menu "IO Domain Support"
+
+config IO_DOMAIN
+	bool "Enable io domain support using Driver Model"
+	depends on DM && OF_CONTROL
+	help
+	  Enable support for the io domain driver class. Many SoCs allow
+	  power to be applied to or removed from portions of the SoC (io
+	  domains). This may be used to save power. This API provides the
+	  means to control such power management hardware.
+
+config ROCKCHIP_IO_DOMAIN
+	bool "Enable the rockchip io domain driver"
+	depends on IO_DOMAIN && ARCH_ROCKCHIP
+	help
+	  Enable support for manipulating ROCKCHIP io domains via MMIO mapped
+	  registers.
+
+endmenu
diff --git a/drivers/power/io-domain/Makefile b/drivers/power/io-domain/Makefile
new file mode 100644
index 0000000000..f1e7af71d2
--- /dev/null
+++ b/drivers/power/io-domain/Makefile
@@ -0,0 +1,6 @@
+# Copyright (c) 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_IO_DOMAIN) += io-domain-uclass.o
+obj-$(CONFIG_ROCKCHIP_IO_DOMAIN) += rockchip-io-domain.o
diff --git a/drivers/power/io-domain/io-domain-uclass.c b/drivers/power/io-domain/io-domain-uclass.c
new file mode 100644
index 0000000000..7d5139e3c1
--- /dev/null
+++ b/drivers/power/io-domain/io-domain-uclass.c
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <console.h>
+#include <io-domain.h>
+
+void io_domain_init(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_IO_DOMAIN, 0, &dev);
+	if (ret)
+		printf("Can't find UCLASS_IO_DOMAIN driver %d\n", ret);
+}
+
+UCLASS_DRIVER(io_domain) = {
+	.id		= UCLASS_IO_DOMAIN,
+	.name		= "io_domain",
+};
diff --git a/drivers/power/io-domain/rockchip-io-domain.c b/drivers/power/io-domain/rockchip-io-domain.c
new file mode 100644
index 0000000000..ced9fd4f49
--- /dev/null
+++ b/drivers/power/io-domain/rockchip-io-domain.c
@@ -0,0 +1,620 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/of_access.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <fdtdec.h>
+#include <linux/compat.h>
+#include <linux/err.h>
+#include <power/regulator.h>
+
+#define MAX_SUPPLIES		16
+
+/*
+ * The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
+ * "Recommended Operating Conditions" for "Digital GPIO".   When the typical
+ * is 3.3V the max is 3.6V.  When the typical is 1.8V the max is 1.98V.
+ *
+ * They are used like this:
+ * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
+ *   SoC we're at 3.3.
+ * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
+ *   that to be an error.
+ */
+#define MAX_VOLTAGE_1_8	1980000
+#define MAX_VOLTAGE_3_3	3600000
+
+#define PX30_IO_VSEL			0x180
+#define PX30_IO_VSEL_VCCIO6_SRC		BIT(0)
+#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM	1
+
+#define RK3288_SOC_CON2			0x24c
+#define RK3288_SOC_CON2_FLASH0		BIT(7)
+#define RK3288_SOC_FLASH_SUPPLY_NUM	2
+
+#define RK3308_SOC_CON0			0x300
+#define RK3308_SOC_CON0_VCCIO3		BIT(8)
+#define RK3308_SOC_VCCIO3_SUPPLY_NUM	3
+
+#define RK3328_SOC_CON4			0x410
+#define RK3328_SOC_CON4_VCCIO2		BIT(7)
+#define RK3328_SOC_VCCIO2_SUPPLY_NUM	1
+
+#define RK3366_SOC_CON6			0x418
+#define RK3366_SOC_CON6_FLASH0		BIT(14)
+#define RK3366_SOC_FLASH_SUPPLY_NUM	2
+
+#define RK3368_SOC_CON15		0x43c
+#define RK3368_SOC_CON15_FLASH0		BIT(14)
+#define RK3368_SOC_FLASH_SUPPLY_NUM	2
+
+#define RK3399_PMUGRF_CON0		0x180
+#define RK3399_PMUGRF_CON0_VSEL		BIT(8)
+#define RK3399_PMUGRF_VSEL_SUPPLY_NUM	9
+
+struct rockchip_iodomain_priv;
+
+/**
+ * @supplies: voltage settings matching the register bits.
+ */
+struct rockchip_iodomain_soc_data {
+	int grf_offset;
+	const char *supply_names[MAX_SUPPLIES];
+	void (*init)(struct rockchip_iodomain_priv *iod);
+};
+
+struct rockchip_iodomain_supply {
+	struct rockchip_iodomain_priv *iod;
+	struct udevice *reg;
+	int idx;
+};
+
+struct rockchip_iodomain_priv {
+	struct regmap *regmap_base;
+	struct rockchip_iodomain_soc_data *sdata;
+	struct rockchip_iodomain_supply supplies[MAX_SUPPLIES];
+};
+
+static int rockchip_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_iodomain_priv *priv = dev_get_priv(dev);
+	struct regmap *regmap;
+
+	/* get grf-reg base address */
+	regmap = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	priv->regmap_base = regmap;
+
+	return 0;
+}
+
+static int rockchip_iodomain_write(struct rockchip_iodomain_supply *supply,
+				   int uV)
+{
+	struct rockchip_iodomain_priv *priv = supply->iod;
+	struct regmap *regmap = priv->regmap_base;
+	u32 val;
+	int ret;
+
+	/* set value bit */
+	val = (uV > MAX_VOLTAGE_1_8) ? 0 : 1;
+	val <<= supply->idx;
+
+	/* apply hiword-mask */
+	val |= (BIT(supply->idx) << 16);
+
+	ret = regmap_write(regmap, priv->sdata->grf_offset, val);
+	if (ret) {
+		dev_err(priv->dev, "Couldn't write to GRF\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static void px30_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no VCCIO0 supply we should leave things alone */
+	if (!iod->supplies[PX30_IO_VSEL_VCCIO6_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set vccio0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16);
+	ret = regmap_write(iod->regmap_base, PX30_IO_VSEL, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update vccio0 ctrl\n");
+}
+
+static void rk3288_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no flash supply we should leave things alone */
+	if (!iod->supplies[RK3288_SOC_FLASH_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set flash0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3288_SOC_CON2_FLASH0 | (RK3288_SOC_CON2_FLASH0 << 16);
+	ret = regmap_write(iod->regmap_base, RK3288_SOC_CON2, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+}
+
+static void rk3308_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no vccio3 supply we should leave things alone */
+	if (!iod->supplies[RK3308_SOC_VCCIO3_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set vccio3 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3308_SOC_CON0_VCCIO3 | (RK3308_SOC_CON0_VCCIO3 << 16);
+	ret = regmap_write(iod->regmap_base, RK3308_SOC_CON0, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update vccio3 vsel ctrl\n");
+}
+
+static void rk3328_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no vccio2 supply we should leave things alone */
+	if (!iod->supplies[RK3328_SOC_VCCIO2_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set vccio2 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3328_SOC_CON4_VCCIO2 | (RK3328_SOC_CON4_VCCIO2 << 16);
+	ret = regmap_write(iod->regmap_base, RK3328_SOC_CON4, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update vccio2 vsel ctrl\n");
+}
+
+static void rk3366_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no flash supply we should leave things alone */
+	if (!iod->supplies[RK3366_SOC_FLASH_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set flash0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3366_SOC_CON6_FLASH0 | (RK3366_SOC_CON6_FLASH0 << 16);
+	ret = regmap_write(iod->regmap_base, RK3368_SOC_CON15, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+}
+
+static void rk3368_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no flash supply we should leave things alone */
+	if (!iod->supplies[RK3368_SOC_FLASH_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set flash0 iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3368_SOC_CON15_FLASH0 | (RK3368_SOC_CON15_FLASH0 << 16);
+	ret = regmap_write(iod->regmap_base, RK3368_SOC_CON15, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
+}
+
+static void rk3399_pmu_iodomain_init(struct rockchip_iodomain_priv *iod)
+{
+	int ret;
+	u32 val;
+
+	/* if no pmu io supply we should leave things alone */
+	if (!iod->supplies[RK3399_PMUGRF_VSEL_SUPPLY_NUM].reg)
+		return;
+
+	/*
+	 * set pmu io iodomain to also use this framework
+	 * instead of a special gpio.
+	 */
+	val = RK3399_PMUGRF_CON0_VSEL | (RK3399_PMUGRF_CON0_VSEL << 16);
+	ret = regmap_write(iod->regmap_base, RK3399_PMUGRF_CON0, val);
+	if (ret < 0)
+		dev_warn(iod->dev, "couldn't update pmu io iodomain ctrl\n");
+}
+
+static const struct rockchip_iodomain_soc_data soc_data_px30 = {
+	.grf_offset = 0x180,
+	.supply_names = {
+		NULL,
+		"vccio6",
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+		"vccio-oscgpi",
+	},
+	.init = px30_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = {
+	.grf_offset = 0x100,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"pmuio1",
+		"pmuio2",
+	},
+};
+
+/*
+ * On the rk3188 the io-domains are handled by a shared register with the
+ * lower 8 bits being still being continuing drive-strength settings.
+ */
+static const struct rockchip_iodomain_soc_data soc_data_rk3188 = {
+	.grf_offset = 0x104,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"ap0",
+		"ap1",
+		"cif",
+		"flash",
+		"vccio0",
+		"vccio1",
+		"lcdc0",
+		"lcdc1",
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk322x = {
+	.grf_offset = 0x418,
+	.supply_names = {
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3288 = {
+	.grf_offset = 0x380,
+	.supply_names = {
+		"lcdc",		/* LCDC_VDD */
+		"dvp",		/* DVPIO_VDD */
+		"flash0",	/* FLASH0_VDD (emmc) */
+		"flash1",	/* FLASH1_VDD (sdio1) */
+		"wifi",		/* APIO3_VDD  (sdio0) */
+		"bb",		/* APIO5_VDD */
+		"audio",	/* APIO4_VDD */
+		"sdcard",	/* SDMMC0_VDD (sdmmc) */
+		"gpio30",	/* APIO1_VDD */
+		"gpio1830",	/* APIO2_VDD */
+	},
+	.init = rk3288_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3308 = {
+	.grf_offset = 0x300,
+	.supply_names = {
+		"vccio0",
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+	},
+	.init = rk3308_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
+	.grf_offset = 0x410,
+	.supply_names = {
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio4",
+		"vccio5",
+		"vccio6",
+		"pmuio",
+	},
+	.init = rk3328_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3366 = {
+	.grf_offset = 0x900,
+	.supply_names = {
+		"lcdc",         /* LCDC_IOVDD */
+		"dvpts",        /* DVP_IOVDD */
+		"flash",        /* FLASH_IOVDD (emmc) */
+		"wifibt",       /* APIO1_IOVDD */
+		NULL,
+		"audio",        /* AUDIO_IODVDD */
+		"sdcard",       /* SDMMC_IOVDD (sdmmc) */
+		"tphdsor",      /* APIO2_IOVDD */
+	},
+	.init = rk3366_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3368 = {
+	.grf_offset = 0x900,
+	.supply_names = {
+		NULL,		/* reserved */
+		"dvp",		/* DVPIO_VDD */
+		"flash0",	/* FLASH0_VDD (emmc) */
+		"wifi",		/* APIO2_VDD (sdio0) */
+		NULL,
+		"audio",	/* APIO3_VDD */
+		"sdcard",	/* SDMMC0_VDD (sdmmc) */
+		"gpio30",	/* APIO1_VDD */
+		"gpio1830",	/* APIO4_VDD (gpujtag) */
+	},
+	.init = rk3368_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3368_pmu = {
+	.grf_offset = 0x100,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"pmu",	        /*PMU IO domain*/
+		"vop",	        /*LCDC IO domain*/
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3399 = {
+	.grf_offset = 0xe640,
+	.supply_names = {
+		"bt656",		/* APIO2_VDD */
+		"audio",		/* APIO5_VDD */
+		"sdmmc",		/* SDMMC0_VDD */
+		"gpio1830",		/* APIO4_VDD */
+	},
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
+	.grf_offset = 0x180,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"pmu1830",		/* PMUIO2_VDD */
+	},
+	.init = rk3399_pmu_iodomain_init,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rv1108 = {
+	.grf_offset = 0x404,
+	.supply_names = {
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		NULL,
+		"vccio1",
+		"vccio2",
+		"vccio3",
+		"vccio5",
+		"vccio6",
+	},
+
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rv1108_pmu = {
+	.grf_offset = 0x104,
+	.supply_names = {
+		"pmu",
+	},
+};
+
+static struct udevice *of_get_regulator(ofnode node, const char *supply)
+{
+	char sname[32]; /* 32 is max size of property name */
+	struct udevice *sudev;
+	ofnode snode;
+	u32 phandle;
+	int ret;
+
+	snprintf(sname, 32, "%s-supply", supply);
+
+	/* Get regulator and clk */
+	if (!ofnode_read_u32(node, sname, &phandle)) {
+		snode = ofnode_get_by_phandle(phandle);
+		ret = regulator_get_by_devname(snode.np->name, &sudev);
+		if (ret) {
+			printf("%s: %s: Get supply(%s) failed, ret=%d",
+			       __func__,
+			       sudev->name, snode.np->full_name, ret);
+			return NULL;
+		}
+		debug("IO-DOMAIN: supply: %s\n", snode.np->full_name);
+	}
+
+	return sudev;
+}
+
+static int rockchip_iodomain_probe(struct udevice *dev)
+{
+	struct rockchip_iodomain_priv *priv = dev_get_priv(dev);
+	struct rockchip_iodomain_soc_data *sdata;
+	int i, ret;
+
+	sdata = (struct rockchip_iodomain_soc_data *)dev_get_driver_data(dev);
+	priv->sdata = sdata;
+
+	if (!priv->regmap_base)
+		return -1;
+
+	for (i = 0; i < MAX_SUPPLIES; i++) {
+		const char *supply_name = priv->sdata->supply_names[i];
+		struct rockchip_iodomain_supply *supply = &priv->supplies[i];
+		struct udevice *reg;
+		u32 uV;
+
+		if (!supply_name)
+			continue;
+
+		reg = of_get_regulator(dev_ofnode(dev), supply_name);
+		if (!reg) {
+			printf("could not find regulator %s\n", supply_name);
+			return -1;
+		}
+
+		uV = regulator_get_value(reg);
+		if (uV < 0) {
+			printf("could not get voltage from %s\n", reg->name);
+			return -1;
+		}
+
+		if (uV > MAX_VOLTAGE_3_3) {
+			printf("%d uV is too high from %s\n", uV, reg->name);
+			return -1;
+		}
+
+		/* setup our supply */
+		supply->idx = i;
+		supply->iod = priv;
+		supply->reg = reg;
+
+		ret = rockchip_iodomain_write(supply, uV);
+		if (ret)
+			supply->reg = NULL;
+	}
+
+	if (priv->sdata->init)
+		priv->sdata->init(priv);
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_iodomain_match[] = {
+	{
+		.compatible = "rockchip,px30-io-voltage-domain",
+		.data = (ulong)&soc_data_px30
+	},
+	{
+		.compatible = "rockchip,px30-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_px30_pmu
+	},
+	{
+		.compatible = "rockchip,rk3188-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3188
+	},
+	{
+		.compatible = "rockchip,rk322x-io-voltage-domain",
+		.data = (ulong)&soc_data_rk322x
+	},
+	{
+		.compatible = "rockchip,rk3288-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3288
+	},
+	{
+		.compatible = "rockchip,rk3308-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3308
+	},
+	{
+		.compatible = "rockchip,rk3328-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3328
+	},
+	{
+		.compatible = "rockchip,rk3366-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3366
+	},
+	{
+		.compatible = "rockchip,rk3368-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3368
+	},
+	{
+		.compatible = "rockchip,rk3368-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3368_pmu
+	},
+	{
+		.compatible = "rockchip,rk3399-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3399
+	},
+	{
+		.compatible = "rockchip,rk3399-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rk3399_pmu
+	},
+	{
+		.compatible = "rockchip,rv1108-io-voltage-domain",
+		.data = (ulong)&soc_data_rv1108
+	},
+	{
+		.compatible = "rockchip,rv1108-pmu-io-voltage-domain",
+		.data = (ulong)&soc_data_rv1108_pmu
+	},
+	{ /* sentinel */ },
+};
+
+U_BOOT_DRIVER(io_domain) = {
+	.name		= "io_domain",
+	.id		= UCLASS_IO_DOMAIN,
+	.of_match	= rockchip_iodomain_match,
+	.priv_auto_alloc_size = sizeof(struct rockchip_iodomain_priv),
+	.ofdata_to_platdata	= rockchip_ofdata_to_platdata,
+	.probe		= rockchip_iodomain_probe,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index addf27639b..76c5eb7d88 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -99,6 +99,7 @@ enum uclass_id {
 	UCLASS_RC,		/* Remote Controller */
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 	UCLASS_DVFS,		/* DVFS policy */
+	UCLASS_IO_DOMAIN,	/* IO domain */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/io-domain.h b/include/io-domain.h
new file mode 100644
index 0000000000..a52b9a7e37
--- /dev/null
+++ b/include/io-domain.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _IO_DOMAIN_H_
+#define _IO_DOMAIN_H_
+
+#include <dm.h>
+
+/**
+ * io_domain_init() - init io-domain driver
+ */
+void io_domain_init(void);
+
+#endif	/* _IO_DOMAIN_H_ */

commit 32c25d1fa3871a2f60767be3c8f24d903503c464
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Jul 23 10:57:08 2018 +0800

    pinctrl: rockchip: Add slew rate support for px30
    
    The usage of slew rate is needed to config it at DTS,
    such as:
      fast speed: slew-rate = <1>;
      slew speed: slew-rate = <0>;
    
    Change-Id: I60ea4ddd37ca70adf1dbd504ba1c3c348e41348b
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 70ad8640d7..c45ee11001 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -325,6 +325,9 @@ struct rockchip_pin_ctrl {
 	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
 				    int pin_num, struct regmap **regmap,
 				    int *reg, u8 *bit);
+	int	(*slew_rate_calc_reg)(struct rockchip_pin_bank *bank,
+				      int pin_num, struct regmap **regmap,
+				      int *reg, u8 *bit);
 };
 
 /**
@@ -2376,6 +2379,59 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
 	return regmap_write(regmap, reg, data);
 }
 
+#define PX30_SLEW_RATE_PMU_OFFSET		0x30
+#define PX30_SLEW_RATE_GRF_OFFSET		0x90
+#define PX30_SLEW_RATE_PINS_PER_PMU_REG		16
+#define PX30_SLEW_RATE_BANK_STRIDE		16
+#define PX30_SLEW_RATE_PINS_PER_GRF_REG		8
+
+static int px30_calc_slew_rate_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_SLEW_RATE_PMU_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_SCHMITT_GRF_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num  - 1) * PX30_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+static int rockchip_set_slew_rate(struct rockchip_pin_bank *bank,
+				  int pin_num, int speed)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	debug("setting slew rate of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, speed);
+
+	ret = ctrl->slew_rate_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	if (ret)
+		return ret;
+
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (speed << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
 /*
  * Pinconf_ops handling
  */
@@ -2451,6 +2507,16 @@ static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 			return rc;
 		break;
 
+	case PIN_CONFIG_SLEW_RATE:
+		if (!ctrl->slew_rate_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_slew_rate(bank,
+					    pin - bank->pin_base, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
 	default:
 		break;
 	}
@@ -2468,6 +2534,7 @@ static const struct pinconf_param rockchip_conf_params[] = {
 	{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
 	{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
 	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
+	{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
 };
 
 static int rockchip_pinconf_prop_name_to_param(const char *property,
@@ -2849,6 +2916,7 @@ static struct rockchip_pin_ctrl px30_pin_ctrl = {
 		.pull_calc_reg		= px30_calc_pull_reg_and_bit,
 		.drv_calc_reg		= px30_calc_drv_reg_and_bit,
 		.schmitt_calc_reg	= px30_calc_schmitt_reg_and_bit,
+		.slew_rate_calc_reg	= px30_calc_slew_rate_reg_and_bit,
 };
 
 static struct rockchip_pin_bank rv1108_pin_banks[] = {

commit a1e5c945ad058e602ed83e564dd636a5e0ea24e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 21 15:12:15 2018 +0800

    rockchip: dts: rk3368: enable nandc
    
    fix model string typo.
    
    Change-Id: I1e96a986a381c86999839efd486fb371ca8ed82c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index 32992c3b96..7502caca5b 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -10,7 +10,7 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Rockchip RK3399 Evaluation Board";
+	model = "Rockchip RK3368 Evaluation Board";
 	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
 };
 
@@ -53,4 +53,4 @@
 
 &usb_otg {
 	status = "okay";
-};
\ No newline at end of file
+};
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 89469f2509..6e2a2ab2b4 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -29,6 +29,11 @@
 	status = "okay";
 };
 
+&nandc0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &service_msch {
 	u-boot,dm-pre-reloc;
 };
@@ -59,4 +64,4 @@
 
 &usb_otg {
 	u-boot,dm-pre-reloc;
-};
\ No newline at end of file
+};
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 8bc18d8627..082954f212 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -380,6 +380,16 @@
 		status = "disabled";
 	};
 
+	nandc0: nandc@ff400000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff400000 0x0 0x4000>;
+		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC0>, <&cru HCLK_NANDC0>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	uart0: serial@ff180000 {
 		compatible = "rockchip,rk3368-uart", "snps,dw-apb-uart";
 		reg = <0x0 0xff180000 0x0 0x100>;

commit 4585497ae778ba28aa945dcea664311e06d2e631
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Dec 20 09:52:12 2018 +0800

    thermal: rockchip: get "rockchip,hw-tshut-polarity" form dts node
    
    setting tshut-polarity base on the dts node parameter.
    
    Change-Id: Ie85ffd5e15676984d77d280f589c3748d74419a2
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 0d48b8299a..798f619239 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -166,6 +166,7 @@ struct rockchip_thermal_priv {
 	void *base;
 	void *grf;
 	enum tshut_mode tshut_mode;
+	enum tshut_polarity tshut_polarity;
 	const struct rockchip_tsadc_chip *data;
 };
 
@@ -563,7 +564,7 @@ static void tsadc_init_v2(struct udevice *dev)
 	writel(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 	       priv->base + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 
-	if (priv->data->tshut_polarity == TSHUT_HIGH_ACTIVE)
+	if (priv->tshut_polarity == TSHUT_HIGH_ACTIVE)
 		writel(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 		       priv->base + TSADCV2_AUTO_CON);
 	else
@@ -787,6 +788,12 @@ static int rockchip_thermal_probe(struct udevice *dev)
 	if (priv->tshut_mode < 0)
 		priv->tshut_mode = priv->data->tshut_mode;
 
+	priv->tshut_polarity = dev_read_u32_default(dev,
+						    "rockchip,hw-tshut-polarity",
+						    -1);
+	if (priv->tshut_polarity < 0)
+		priv->tshut_polarity = tsadc->tshut_polarity;
+
 	if (priv->tshut_mode == TSHUT_MODE_GPIO)
 		pinctrl_select_state(dev, "otpout");
 	else

commit e54cf6dba77ac6d2c1d495ebf95f5396402d3106
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 18 10:11:41 2018 +0800

    power: regulator: add fan53555 regulator
    
    add driver support for fan53555\syr82x\tcs452x dcdc.
    
    Change-Id: Ib6132d7063ba8bda9631b45e128df1d278222dad
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index a11408ff2e..5b4605f5a2 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -51,6 +51,14 @@ config DM_REGULATOR_PFUZE100
 	features for REGULATOR PFUZE100. The driver implements get/set api for:
 	value, enable and mode.
 
+config REGULATOR_FAN53555
+	bool "Enable driver for fan53555 regulators"
+	depends on DM_REGULATOR
+	---help---
+	Enable support for the regulator functions of the fan53555 DCDC. The
+	driver implements get/set api for the various BUCK.This driver is
+	controlled by a device tree node which includes voltage limits.
+
 config REGULATOR_PWM
 	bool "Enable driver for PWM regulators"
 	depends on DM_REGULATOR
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 18fb870e43..d582ee1bc2 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_REGULATOR_AS3722)	+= as3722_regulator.o
 obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
 obj-$(CONFIG_DM_REGULATOR_PFUZE100) += pfuze100.o
 obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o
+obj-$(CONFIG_REGULATOR_FAN53555) += fan53555_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
 obj-$(CONFIG_REGULATOR_RK8XX) += rk8xx.o
diff --git a/drivers/power/regulator/fan53555_regulator.c b/drivers/power/regulator/fan53555_regulator.c
new file mode 100644
index 0000000000..3a3e1970d6
--- /dev/null
+++ b/drivers/power/regulator/fan53555_regulator.c
@@ -0,0 +1,506 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/gpio.h>
+#include <power/regulator.h>
+#include <i2c.h>
+#include <asm/arch/clock.h>
+#include <asm/io.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Voltage setting */
+#define FAN53555_VSEL0		0x00
+#define FAN53555_VSEL1		0x01
+
+#define TCS452X_VSEL0		0x11
+#define TCS452X_VSEL1		0x10
+#define TCS452X_TIME		0x13
+#define TCS452X_COMMAND		0x14
+
+/* Control register */
+#define FAN53555_CONTROL	0x02
+/* IC Type */
+#define FAN53555_ID1		0x03
+/* IC mask version */
+#define FAN53555_ID2		0x04
+/* Monitor register */
+#define FAN53555_MONITOR	0x05
+
+/* VSEL bit definitions */
+#define VSEL_BUCK_EN		BIT(7)
+#define VSEL_MODE		BIT(6)
+#define VSEL_NSEL_MASK		0x3F
+
+/* Chip ID and Version */
+#define DIE_ID			0x0F/* ID1 */
+#define DIE_REV			0x0F/* ID2 */
+/* Control bit definitions */
+#define CTL_OUTPUT_DISCHG	BIT(7)
+#define CTL_SLEW_MASK		(0x7 << 4)
+#define CTL_SLEW_SHIFT		4
+#define CTL_RESET		BIT(2)
+
+#define TCS_VSEL_NSEL_MASK	0x7f
+#define TCS_VSEL0_MODE		BIT(7)
+#define TCS_VSEL1_MODE		BIT(6)
+
+#define TCS_SLEW_SHIFT		3
+#define TCS_SLEW_MASK		(0x3 < 3)
+
+#define FAN53555_NVOLTAGES_64	64/* Numbers of voltages */
+#define FAN53555_NVOLTAGES_127	127/* Numbers of voltages */
+
+enum fan53555_vendor {
+	FAN53555_VENDOR_FAIRCHILD = 0,
+	FAN53555_VENDOR_SILERGY,
+	FAN53555_VENDOR_TCS,
+};
+
+/* IC Type */
+enum {
+	FAN53555_CHIP_ID_00 = 0,
+	FAN53555_CHIP_ID_01,
+	FAN53555_CHIP_ID_02,
+	FAN53555_CHIP_ID_03,
+	FAN53555_CHIP_ID_04,
+	FAN53555_CHIP_ID_05,
+	FAN53555_CHIP_ID_08 = 8,
+};
+
+/* IC mask revision */
+enum {
+	FAN53555_CHIP_REV_00 = 0x3,
+	FAN53555_CHIP_REV_13 = 0xf,
+};
+
+enum {
+	SILERGY_SYR82X = 8,
+};
+
+enum {
+	FAN53555_VSEL_ID_0 = 0,
+	FAN53555_VSEL_ID_1,
+};
+
+struct fan53555_regulator_info {
+	enum fan53555_vendor vendor;
+	struct udevice *dev;
+	/* IC Type and Rev */
+	int chip_id;
+	int chip_rev;
+	/* Voltage setting register */
+	unsigned int vol_reg;
+	unsigned int sleep_reg;
+	unsigned int mode_reg;
+	unsigned int vol_mask;
+	unsigned int mode_mask;
+	/* Voltage range and step(linear) */
+	unsigned int vsel_min;
+	unsigned int vsel_step;
+	struct gpio_desc vsel_gpio;
+	unsigned int sleep_vsel_id;
+};
+
+static int fan53555_write(struct udevice *dev, uint reg, const uint8_t *buff,
+			  int len)
+{
+	int ret;
+
+	ret = dm_i2c_write(dev, reg, buff, len);
+	if (ret) {
+		debug("%s: write reg 0x%02x failed, ret=%d\n",
+		      __func__, reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int fan53555_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+	int ret;
+
+	ret = dm_i2c_read(dev, reg, buff, len);
+	if (ret) {
+		debug("%s: read reg 0x%02x failed, ret=%d\n",
+		      __func__, reg, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int fan53555_reg_read(struct udevice *dev, uint reg)
+{
+	u8 byte;
+	int ret;
+
+	debug("%s: reg=%x", __func__, reg);
+	ret = fan53555_read(dev, reg, &byte, 1);
+	debug(", value=%x, ret=%d\n", byte, ret);
+
+	return ret ? ret : byte;
+}
+
+int fan53555_reg_write(struct udevice *dev, uint reg, uint value)
+{
+	u8 byte = value;
+	int ret;
+
+	debug("%s: reg=%x, value=%x", __func__, reg, value);
+	ret = fan53555_write(dev, reg, &byte, 1);
+	debug(", ret=%d\n", ret);
+
+	return ret;
+}
+
+int  fan53555_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
+{
+	u8 byte;
+	int ret;
+
+	ret = fan53555_reg_read(dev, reg);
+	if (ret < 0)
+		return ret;
+	byte = (ret & ~clr) | set;
+
+	return fan53555_reg_write(dev, reg, byte);
+}
+
+static int fan53555_regulator_set_enable(struct udevice *dev, bool enable)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val, sleep_vsel_id;
+
+	if (enable) {
+		val = VSEL_BUCK_EN;
+		sleep_vsel_id = !priv->sleep_vsel_id;
+	} else {
+		val = 0;
+		sleep_vsel_id = priv->sleep_vsel_id;
+	}
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
+		dm_gpio_set_value(&priv->vsel_gpio, sleep_vsel_id);
+		return 0;
+	}
+	fan53555_clrsetbits(dev, priv->vol_reg, VSEL_BUCK_EN, val);
+
+	return 0;
+}
+
+static int fan53555_regulator_get_enable(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio)) {
+		if (priv->sleep_vsel_id)
+			return !dm_gpio_get_value(&priv->vsel_gpio);
+		else
+			return dm_gpio_get_value(&priv->vsel_gpio);
+	}
+
+	val = fan53555_reg_read(dev, priv->vol_reg);
+	if (val & VSEL_BUCK_EN)
+		return 1;
+	else
+		return 0;
+}
+
+static int fan53555_regulator_set_suspend_enable(struct udevice *dev,
+						 bool enable)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	if (enable)
+		val = VSEL_BUCK_EN;
+	else
+		val = 0;
+
+	fan53555_clrsetbits(dev, priv->sleep_reg, VSEL_BUCK_EN, val);
+
+	return 0;
+}
+
+static int fan53555_regulator_get_suspend_enable(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = fan53555_reg_read(dev, priv->sleep_reg);
+	if (val & VSEL_BUCK_EN)
+		return 1;
+	else
+		return 0;
+}
+
+static int fan53555_regulator_get_voltage(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int uvolt = 0, val;
+
+	val = fan53555_reg_read(dev, priv->vol_reg);
+	val &= priv->vol_mask;
+	uvolt = (val * priv->vsel_step) + priv->vsel_min;
+
+	return uvolt;
+}
+
+static int fan53555_regulator_set_voltage(struct udevice *dev, int uvolt)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
+	fan53555_clrsetbits(dev, priv->vol_reg, priv->vol_mask, val);
+
+	return 0;
+}
+
+static int fan53555_regulator_get_suspend_voltage(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int uvolt = 0, val;
+
+	val = fan53555_reg_read(dev, priv->sleep_reg);
+	val &= priv->vol_mask;
+	uvolt = (val * priv->vsel_step) + priv->vsel_min;
+
+	return uvolt;
+}
+
+static int fan53555_regulator_set_suspend_voltage(struct udevice *dev,
+						  int uvolt)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int val;
+
+	val = ((uvolt - priv->vsel_min) / priv->vsel_step);
+	fan53555_clrsetbits(dev, priv->sleep_reg, priv->vol_mask, val);
+
+	return 0;
+}
+
+static int fan53555_voltages_setup_fairchild(struct fan53555_regulator_info *di)
+{
+	/* Init voltage range and step */
+	switch (di->chip_id) {
+	case FAN53555_CHIP_ID_00:
+		switch (di->chip_rev) {
+		case FAN53555_CHIP_REV_00:
+			di->vsel_min = 600000;
+			di->vsel_step = 10000;
+			break;
+		case FAN53555_CHIP_REV_13:
+			di->vsel_min = 800000;
+			di->vsel_step = 10000;
+			break;
+		default:
+			dev_err(di->dev,
+				"Chip ID %d with rev %d not supported!\n",
+				di->chip_id, di->chip_rev);
+			return -EINVAL;
+		}
+		break;
+	case FAN53555_CHIP_ID_01:
+	case FAN53555_CHIP_ID_03:
+	case FAN53555_CHIP_ID_05:
+	case FAN53555_CHIP_ID_08:
+		di->vsel_min = 600000;
+		di->vsel_step = 10000;
+		break;
+	case FAN53555_CHIP_ID_04:
+		di->vsel_min = 603000;
+		di->vsel_step = 12826;
+		break;
+	default:
+		dev_err(di->dev,
+			"Chip ID %d not supported!\n", di->chip_id);
+		return -EINVAL;
+	}
+	di->vol_mask = VSEL_NSEL_MASK;
+
+	return 0;
+}
+
+static int fan53555_voltages_setup_silergy(struct fan53555_regulator_info *di)
+{
+	/* Init voltage range and step */
+	di->vsel_min = 712500;
+	di->vsel_step = 12500;
+	di->vol_mask = VSEL_NSEL_MASK;
+
+	return 0;
+}
+
+static int fan53555_voltages_setup_tcs(struct fan53555_regulator_info *di)
+{
+	if (di->sleep_vsel_id) {
+		di->sleep_reg = TCS452X_VSEL1;
+		di->vol_reg = TCS452X_VSEL0;
+	} else {
+		di->sleep_reg = TCS452X_VSEL0;
+		di->vol_reg = TCS452X_VSEL1;
+	}
+
+	di->vol_mask = TCS_VSEL_NSEL_MASK;
+
+	/* Init voltage range and step */
+	di->vsel_min = 600000;
+	di->vsel_step = 6250;
+
+	return 0;
+}
+
+/* For 00,01,03,05 options:
+ * VOUT = 0.60V + NSELx * 10mV, from 0.60 to 1.23V.
+ * For 04 option:
+ * VOUT = 0.603V + NSELx * 12.826mV, from 0.603 to 1.411V.
+ *
+ */
+
+static int fan53555_device_setup(struct fan53555_regulator_info *di)
+{
+	int ret = 0;
+
+	/* Setup voltage control register */
+	switch (di->sleep_vsel_id) {
+	case FAN53555_VSEL_ID_0:
+		di->sleep_reg = FAN53555_VSEL0;
+		di->vol_reg = FAN53555_VSEL1;
+		break;
+	case FAN53555_VSEL_ID_1:
+		di->sleep_reg = FAN53555_VSEL1;
+		di->vol_reg = FAN53555_VSEL0;
+		break;
+	default:
+		dev_err(di->dev, "Invalid VSEL ID!\n");
+		return -EINVAL;
+	}
+
+	switch (di->vendor) {
+	case FAN53555_VENDOR_FAIRCHILD:
+		ret = fan53555_voltages_setup_fairchild(di);
+		break;
+	case FAN53555_VENDOR_SILERGY:
+		ret = fan53555_voltages_setup_silergy(di);
+		break;
+	case FAN53555_VENDOR_TCS:
+		ret = fan53555_voltages_setup_tcs(di);
+		break;
+	default:
+		dev_err(di->dev, "vendor %d not supported!\n", di->vendor);
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+static int fan53555_regulator_ofdata_to_platdata(struct udevice *dev)
+{
+	struct fan53555_regulator_info *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->sleep_vsel_id = dev_read_u32_default(dev,
+						   "fcs,suspend-voltage-selector",
+						   1);
+
+	ret = gpio_request_by_name(dev, "vsel-gpios", 0,
+				   &priv->vsel_gpio, GPIOD_IS_OUT);
+	if (ret)
+		dev_err(dev, "vsel-gpios- not found! Error: %d\n", ret);
+
+	if (dm_gpio_is_valid(&priv->vsel_gpio))
+		dm_gpio_set_value(&priv->vsel_gpio, !priv->sleep_vsel_id);
+
+	priv->vendor = dev_get_driver_data(dev);
+
+	return 0;
+}
+
+static int fan53555_regulator_probe(struct udevice *dev)
+{
+	struct fan53555_regulator_info *di = dev_get_priv(dev);
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	u8 val;
+	int ret;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	uc_pdata->type = REGULATOR_TYPE_BUCK;
+	uc_pdata->mode_count = 0;
+
+	/* Get chip ID */
+	val = fan53555_reg_read(dev, FAN53555_ID1);
+	if (val < 0) {
+		dev_err(dev, "Failed to get chip ID!\n");
+		return val;
+	}
+	di->chip_id = val & DIE_ID;
+
+	/* Get chip revision */
+	val = fan53555_reg_read(dev, FAN53555_ID2);
+	if (val < 0) {
+		dev_err(dev, "Failed to get chip Rev!\n");
+		return val;
+	}
+	di->chip_rev = val & DIE_REV;
+
+	debug("FAN53555 Option[%d] Rev[%d] Detected!\n",
+	      di->chip_id, di->chip_rev);
+
+	/* Device init */
+	ret = fan53555_device_setup(di);
+	if (ret < 0) {
+		dev_err(dev, "Failed to setup device!\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id fan53555_id[] = {
+	{
+		.compatible = "fan53555",
+		.data = FAN53555_VENDOR_FAIRCHILD,
+	}, {
+		.compatible = "silergy,syr827",
+		.data = FAN53555_VENDOR_SILERGY,
+	}, {
+		.compatible = "silergy,syr828",
+		.data = FAN53555_VENDOR_SILERGY,
+	}, {
+		.compatible = "tcs,tcs452x", /* tcs4525/4526 */
+		.data = FAN53555_VENDOR_TCS,
+	},
+	{ },
+};
+
+static const struct dm_regulator_ops fan53555_regulator_ops = {
+	.get_value  = fan53555_regulator_get_voltage,
+	.set_value  = fan53555_regulator_set_voltage,
+	.set_suspend_value = fan53555_regulator_set_suspend_voltage,
+	.get_suspend_value = fan53555_regulator_get_suspend_voltage,
+	.set_enable = fan53555_regulator_set_enable,
+	.get_enable = fan53555_regulator_get_enable,
+	.set_suspend_enable = fan53555_regulator_set_suspend_enable,
+	.get_suspend_enable = fan53555_regulator_get_suspend_enable,
+};
+
+U_BOOT_DRIVER(fan53555_regulator) = {
+	.name = "fan53555_regulator",
+	.id = UCLASS_REGULATOR,
+	.ops = &fan53555_regulator_ops,
+	.probe = fan53555_regulator_probe,
+	.of_match = fan53555_id,
+	.ofdata_to_platdata = fan53555_regulator_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct fan53555_regulator_info),
+};
+

commit cfb11cfb1474101334b8db66e0b4b22910594e08
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 18:56:32 2018 +0800

    configs: rk3308-aarch32: enable lzo/lz4
    
    remove some unused modules to reduce size.
    
    Change-Id: I7706e501b7496e596bb4a766cb55736ee2c2e233
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 2ee0ec4c6c..a4720bf15c 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -14,16 +14,31 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_PMIC=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
@@ -75,5 +90,7 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y

commit 5c773029dfd727adad76264573402116929dfa00
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 15:08:10 2018 +0800

    configs: add rk3308 aarch64 defconfig
    
    This defconfig enables kernel dtb.
    
    Change-Id: I55fe3922de0e0888f148a4c21865649076f27603
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308_defconfig b/configs/rk3308_defconfig
new file mode 100644
index 0000000000..007c6d0114
--- /dev/null
+++ b/configs/rk3308_defconfig
@@ -0,0 +1,95 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit d24a078f3ffb77b87c95ad0a5e1e12271cac16dc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 17:40:35 2018 +0800

    core: device_bind_common: don't bind UCLASS_SPI_FLASH again
    
    Change-Id: Ie4cfe40398fc1e483b558832663bc50683510ac0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index f2261d7c94..21eb2527a0 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -52,8 +52,9 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 
 #ifdef CONFIG_USING_KERNEL_DTB
 	if (gd->flags & GD_FLG_RELOC) {
-		/* For mmc and nand, just update from kernel dtb instead bind again*/
-		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND) {
+		/* For mmc/nand/spiflash, just update from kernel dtb instead bind again*/
+		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND ||
+		    drv->id == UCLASS_SPI_FLASH) {
 			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 				if (!strcmp(name, dev->name)) {
 					debug("%s do not bind dev already in list %s\n",

commit 8bea6fa8fe12e6f70e64293750edcdfe874cd464
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 17:25:11 2018 +0800

    common: rkimg: add dev_desc validation check
    
    If we use a NULL dev_desc, it causes data abort.
    
    Change-Id: Iaf315f7f0ca4a8c33d4d4b809fffea35fc5dcc51
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 962c582f38..7b6028b426 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -227,6 +227,10 @@ struct blk_desc *rockchip_get_bootdev(void)
 	devnum = env_get_ulong("devnum", 10, 0);
 
 	dev_desc = blk_get_devnum_by_type(dev_type, devnum);
+	if (!dev_desc) {
+		printf("%s: can't find dev_desc!\n", __func__);
+		return NULL;
+	}
 
 	printf("PartType: %s\n", part_get_type(dev_desc));
 

commit afd559b8e3318305feec6ebf00919317d2bbe7a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 16:55:49 2018 +0800

    rkflash: spinor/spinand use different blk name
    
    - The same blk name take a lot confuse for debugging;
    - When kernel dtb is enabled and setup dm tree, dm framework can't allow
      devices with same name, only one is left in dm tree list.
    
    Change-Id: Ieed15ffbed28f381e90c18cf0c5f3d257d72eab2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index a42fb09639..2120c7802c 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -75,10 +75,10 @@ static int rksfc_blk_bind(struct udevice *udev)
 	struct udevice *bdev;
 	int ret;
 
-	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+	ret = blk_create_devicef(udev, "rkflash_blk", "spinand.blk",
 				 IF_TYPE_SPINAND,
 				 0, 512, 0, &bdev);
-	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+	ret = blk_create_devicef(udev, "rkflash_blk", "spinor.blk",
 				 IF_TYPE_SPINOR,
 				 1, 512, 0, &bdev);
 

commit 8d1dd0c451162b9ebd12a2314728fe452a998414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 14:59:57 2018 +0800

    rockchip: atags: add serial id print
    
    Change-Id: I8b41ba9e1b02b300c385b2036e7af78ac544cfe1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index a545139af1..cde2f23a3e 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -270,6 +270,7 @@ void atags_print_tag(struct tag *t)
 		printf("      addr = 0x%llx\n", t->u.serial.addr);
 		printf("  baudrate = %d\n", t->u.serial.baudrate);
 		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
+		printf("        id = 0x%x\n", t->u.serial.id);
 		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
 		break;

commit 147c40830c5a76128a0d950ce94b94eddebfef9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 14:14:10 2018 +0800

    dm: ramdisk: remove unused function
    
    blk uclass would take over initialization.
    
    Change-Id: I34bcb858520b06110685f643705da83c4640a094
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/ram/ramdisk-uclass.c b/drivers/ram/ramdisk-uclass.c
index edb1b7bdfd..dfa8c3cb9b 100644
--- a/drivers/ram/ramdisk-uclass.c
+++ b/drivers/ram/ramdisk-uclass.c
@@ -12,13 +12,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int bramdisk_initialize(void)
-{
-	struct udevice *dev;
-
-	return uclass_get_device(UCLASS_BLK, 0, &dev);
-}
-
 static ulong ramdisk_bread(struct udevice *dev, lbaint_t start,
 			   lbaint_t blkcnt, void *dst)
 {
diff --git a/include/ramdisk.h b/include/ramdisk.h
index 73432eaef2..3f5df7043b 100644
--- a/include/ramdisk.h
+++ b/include/ramdisk.h
@@ -45,9 +45,4 @@ struct ramdisk_ops {
 	ulong (*erase)(struct blk_desc *desc, lbaint_t start, lbaint_t blkcnt);
 };
 
-/*
- * bramdisk_initialize() - do blk ramdisk initialize
- */
-int bramdisk_initialize(void);
-
 #endif /* __RAMDISK_H__ */

commit 717cd360cabd4343308f33d42e594cbfe510c5f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 11:55:40 2018 +0800

    rockchip: boot_mode: fallback to legacy bootdev init when atags is invalid
    
    verbose "Bootdev(atags):" if bootdev is from preloader atags, otherwise "Bootdev:"
    
    Change-Id: Ib02a1f6deea330bf33aca60f752a3006a48bc3ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 1efa19620f..8a217fc0c5 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -92,16 +92,21 @@ void boot_devtype_init(void)
 	const char *devtype_num_set = "run rkimg_bootdev";
 	char *devtype = NULL, *devnum = NULL;
 	static int done = 0;
+	int atags_en = 0;
 	int ret;
 
 	if (done)
 		return;
 
+	/*
+	 * New way: get bootdev from preloader atags info.
+	 */
 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
 	struct tag *t;
 
 	t = atags_get_tag(ATAG_BOOTDEV);
 	if (t) {
+		atags_en = 1;
 		switch (t->u.bootdev.devtype) {
 		case BOOT_TYPE_EMMC:
 			devtype = "mmc";
@@ -131,7 +136,7 @@ void boot_devtype_init(void)
 		default:
 			printf("Unknown bootdev type: 0x%x\n",
 			       t->u.bootdev.devtype);
-			break;
+			goto fallback;
 		}
 	}
 
@@ -148,6 +153,10 @@ void boot_devtype_init(void)
 	}
 #endif
 
+	/*
+	 * Legacy way: get bootdev by going through all boot media.
+	 */
+fallback:
 #ifdef CONFIG_DM_MMC
 	mmc_initialize(gd->bd);
 #endif
@@ -161,7 +170,8 @@ void boot_devtype_init(void)
 	}
 finish:
 	done = 1;
-	printf("Bootdev: %s %s\n", env_get("devtype"), env_get("devnum"));
+	printf("Bootdev%s: %s %s\n", atags_en ? "(atags)" : "",
+	       env_get("devtype"), env_get("devnum"));
 }
 
 void rockchip_dnl_mode_check(void)

commit 61ad391ffa12feaf80816bacd04638564fe588b6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 11:15:20 2018 +0800

    configs: rk3399pro-npu: enable CONFIG_SYS_CONSOLE_INFO_QUIET
    
    Change-Id: I20f7c4008627baa4db203ad2c89fa17ce8278e25
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
index eea5cceccf..4ba467c66c 100644
--- a/configs/rk3399pro-npu_defconfig
+++ b/configs/rk3399pro-npu_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_HUSH_PARSER=y

commit 5ea39a570fd62dc37f5f6f9cd828f32231af609c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 19 10:02:13 2018 +0800

    common: autoboot: using ctrl+c to exit bootdelay and enter hush
    
    We hope user can have more clear purpose on entering hush shell,
    this avoids some unexpected key hit during normal boot.
    
    Update message from:
    Hit any key to stop autoboot: 5 => Hit key to stop autoboot('CTRL+C'): 5
    
    Change-Id: Ifb1b594dc38f92fa38e2c2b8a9a576e38bbdf03e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/autoboot.c b/common/autoboot.c
index f201a95cfa..d30d4e6701 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -216,7 +216,7 @@ static int __abortboot(int bootdelay)
 #ifdef CONFIG_MENUPROMPT
 	printf(CONFIG_MENUPROMPT);
 #else
-	printf("Hit any key to stop autoboot: %2d ", bootdelay);
+	printf("Hit key to stop autoboot('CTRL+C'): %2d ", bootdelay);
 #endif
 
 #ifdef CONFIG_ARCH_ROCKCHIP
@@ -237,13 +237,11 @@ static int __abortboot(int bootdelay)
 		/* delay 1000 ms */
 		ts = get_timer(0);
 		do {
-			if (tstc()) {	/* we got a key press	*/
+			if (ctrlc()) {	/* we got a ctrl+c key press	*/
 				abort  = 1;	/* don't auto boot	*/
 				bootdelay = 0;	/* no more delay	*/
 # ifdef CONFIG_MENUKEY
-				menukey = getc();
-# else
-				(void) getc();  /* consume input	*/
+				menukey = 0x03;	/* ctrl+c key code */
 # endif
 				break;
 			}

commit dc11069f9788a42831d9a6d58966ed4b67cb85d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 18 17:00:56 2018 +0800

    rockchip: boot_mode: separate key press and vbus attach conditions message
    
    Change-Id: Iace9c890526179cdceef327f1113db5c8a4c26bd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f3e7c40bf5..1efa19620f 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -167,13 +167,15 @@ finish:
 void rockchip_dnl_mode_check(void)
 {
 	if (rockchip_dnl_key_pressed()) {
+		printf("download key pressed... ");
 		if (rockchip_u2phy_vbus_detect()) {
-			printf("download key pressed, entering download mode...\n");
+			printf("entering download mode...\n");
 			/* If failed, we fall back to bootrom download mode */
 			run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
 			set_back_to_bootrom_dnl_flag();
 			do_reset(NULL, 0, 0, NULL);
 		} else {
+			printf("\n");
 #ifdef CONFIG_RKIMG_BOOTLOADER
 			/* If there is no recovery partition, just boot on */
 			struct blk_desc *dev_desc;

commit 2b49f256f5cf9e4c0dab199bfa07d488f5199b41
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 20:55:48 2018 +0800

    configs: rk3399: enable CONFIG_SYS_CONSOLE_INFO_QUIET
    
    Change-Id: I19a4621c051518df50618815ccaca8e6d5e0256d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index aa9e5b167d..27830c60bd 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
@@ -12,8 +13,8 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y

commit 3e4afe6b7c97fe89167811081f6fba50fed34fdc
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Dec 5 11:39:02 2018 +0800

    usb: phy: rockchip: support vbus detect for rk3288
    
    This patch implements USB vbus detect API for rk3288,
    it can be used for user to determine whether enter
    download mode or not.
    
    Change-Id: Ic493b40b56cd149ec19f57ce914d70d288c54ca9
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index edcdb3268f..d5f1199546 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -67,6 +67,20 @@ static void property_enable(struct dwc2_plat_otg_data *pdata,
 	writel(val, pdata->regs_phy + reg->offset);
 }
 
+int rockchip_u2phy_vbus_detect(void)
+{
+	u32 val = 0;
+
+#ifdef CONFIG_ROCKCHIP_RK3288
+	u32 grf_base = (u32)syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	val = readl(grf_base + 0x288);
+	val = (val & BIT(14)) >> 14;
+#endif
+
+	return val;
+}
+
 static int otg_phy_parse(struct dwc2_udc *dev)
 {
 	int node, phy_node;
diff --git a/include/linux/usb/phy-rockchip-inno-usb2.h b/include/linux/usb/phy-rockchip-inno-usb2.h
index a44c00433d..c646ea30c9 100644
--- a/include/linux/usb/phy-rockchip-inno-usb2.h
+++ b/include/linux/usb/phy-rockchip-inno-usb2.h
@@ -9,7 +9,7 @@
 
 extern int rockchip_chg_get_type(void);
 
-#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+#if defined(CONFIG_PHY_ROCKCHIP_INNO_USB2) || defined(CONFIG_ROCKCHIP_USB2_PHY)
 int rockchip_u2phy_vbus_detect(void);
 #else
 static inline int rockchip_u2phy_vbus_detect(void)

commit 9f1dd9df855f3714c02b048e40bf29cb0cae1be1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 18 16:13:21 2018 +0800

    dm: key: make kernel dtb key has higher priority than U-Boot keys
    
    We add recovery key node with property "u-boot,dm-pre-reloc"
    in uboot dts in order to make sure recovery key works normally
    even when kernel dtb is load failed. But There are too many
    boards for a platform(eg. RK3399/RK3399PRO), which may cause
    a mistake key match between boards via U-Boot dts key nodes,
    so that we make kernel dtb key has higher priority.
    
    Change-Id: I771d72860aa626e4a6a1638117cb1876fe5d1a44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 3cc541e687..7f369665b2 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -144,17 +144,53 @@ void key_add(struct input_key *key)
 	if (!key)
 		return;
 
+	if (!key->parent) {
+		printf("Err: Can't find key(code=%d) device\n", key->code);
+		return;
+	}
+
+	key->pre_reloc = dev_read_bool(key->parent, "u-boot,dm-pre-reloc");
 	list_add_tail(&key->link, &key_list);
 }
 
+static int __key_read(struct input_key *key)
+{
+	unsigned int adcval;
+	int keyval = KEY_NOT_EXIST;
+	int ret;
+
+	/* Is a adc key? */
+	if (key->type & ADC_KEY) {
+		ret = adc_channel_single_shot("saradc",
+					      key->channel, &adcval);
+		if (ret)
+			printf("%s: failed to read saradc, ret=%d\n",
+			       key->name, ret);
+		else
+			keyval = key_read_adc_simple_event(key, adcval);
+	/* Is a gpio key? */
+	} else if (key->type & GPIO_KEY) {
+		/* All pwrkey must register as an interrupt event */
+		if (key->code == KEY_POWER)
+			keyval = key_read_gpio_interrupt_event(key);
+		else
+			keyval = key_read_gpio_simple_event(key);
+	} else {
+		printf("%s: invalid key type!\n", __func__);
+	}
+
+	debug("%s: '%s'(code=%d) is %s\n",
+	      __func__, key->name, key->code, evt_name[keyval]);
+
+	return keyval;
+}
+
 int key_read(int code)
 {
 	struct udevice *dev;
 	struct input_key *key;
 	static int initialized;
-	unsigned int adcval;
 	int keyval = KEY_NOT_EXIST;
-	int ret;
 
 	/* Initialize all key drivers */
 	if (!initialized) {
@@ -166,36 +202,28 @@ int key_read(int code)
 		}
 	}
 
-	/* Search on the key list */
+	/* The key from kernel dtb has higher priority */
+	debug("Reading key from kernel\n");
 	list_for_each_entry(key, &key_list, link) {
-		if (key->code != code)
+		if (key->pre_reloc || (key->code != code))
 			continue;
 
-		/* Is a adc key? */
-		if (key->type & ADC_KEY) {
-			ret = adc_channel_single_shot("saradc",
-						      key->channel, &adcval);
-			if (ret)
-				printf("%s: failed to read saradc, ret=%d\n",
-				       key->name, ret);
-			else
-				keyval = key_read_adc_simple_event(key, adcval);
-		/* Is a gpio key? */
-		} else if (key->type & GPIO_KEY) {
-			/* All pwrkey must register as an interrupt event */
-			if (key->code == KEY_POWER)
-				keyval = key_read_gpio_interrupt_event(key);
-			else
-				keyval = key_read_gpio_simple_event(key);
-		} else {
-			printf("%s: invalid key type!\n", __func__);
-		}
+		keyval = __key_read(key);
+		if (key_is_pressed(keyval))
+			return keyval;
+	}
 
-		debug("%s: '%s'(code=%d) is %s\n",
-		      __func__, key->name, key->code, evt_name[keyval]);
+	/* If not found any key from kernel dtb, reading from U-Boot dtb */
+	if (keyval == KEY_NOT_EXIST) {
+		debug("Reading key from U-Boot\n");
+		list_for_each_entry(key, &key_list, link) {
+			if (!key->pre_reloc || (key->code != code))
+				continue;
 
-		if (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN)
-			break;
+			keyval = __key_read(key);
+			if (key_is_pressed(keyval))
+				return keyval;
+		}
 	}
 
 	return keyval;
diff --git a/include/key.h b/include/key.h
index a1c610f993..f85e1f3164 100644
--- a/include/key.h
+++ b/include/key.h
@@ -29,6 +29,7 @@ struct input_key {
 	struct udevice *parent;
 	struct list_head link;
 	const char *name;
+	bool pre_reloc;
 	u32 code;
 	u8 type;
 

commit e7cd9ad210c25311dab14dfa0343f83bc5a49561
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Dec 17 22:55:26 2018 -0800

    configs: rk1808: enable sfc spi nor
    
    Change-Id: Ic53f834e805cab86a7cc5666e1767b8d4bd7083f
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 147bf4a0eb..5a66cb55d2 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -65,6 +65,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
+CONFIG_RKFLASH=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xff550000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit c09b5fad43a5d9e138c1a8c8cc3237d7efe1f2bd
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Dec 17 18:25:22 2018 -0800

    rockchip: dts: rk1808: add sfc node and enable it
    
    Change-Id: Iaebdadf5eb45fdfa7c693156c851c573a6acb45e
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index ee258ff182..6ec0c68a5d 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -56,6 +56,11 @@
 	status = "okay";
 };
 
+&sfc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index e7de04cfd2..13ff2b5516 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -990,6 +990,15 @@
 		};
 	};
 
+	sfc: sfc@ffc50000 {
+		compatible = "rockchip,rksfc";
+		reg = <0x0 0xffc50000 0x0 0x4000>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		status = "disabled";
+	};
+
 	sdio: dwmmc@ffc60000 {
 		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xffc60000 0x0 0x4000>;

commit 6f920c07e00b5a951bf54a2cb19fd89e470ddfed
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 08:56:46 2018 +0800

    video/drm: Rename rockchip_analogix_dp to analogix_dp
    
    Change-Id: I5603a709abde6a852fcca0b3a5b833727d5f3cad
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 2f77efe22d..1c89eee57e 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
 obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
-obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
+obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += analogix_dp.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/analogix_dp.c
similarity index 99%
rename from drivers/video/drm/rockchip_analogix_dp.c
rename to drivers/video/drm/analogix_dp.c
index 7c0070023a..181d5661cf 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/analogix_dp.c
@@ -20,7 +20,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
-#include "rockchip_analogix_dp.h"
+#include "analogix_dp.h"
 
 /**
  * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/analogix_dp.h
similarity index 100%
rename from drivers/video/drm/rockchip_analogix_dp.h
rename to drivers/video/drm/analogix_dp.h
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c
similarity index 99%
rename from drivers/video/drm/rockchip_analogix_dp_reg.c
rename to drivers/video/drm/analogix_dp_reg.c
index 3cf93b3990..a38900b5b8 100644
--- a/drivers/video/drm/rockchip_analogix_dp_reg.c
+++ b/drivers/video/drm/analogix_dp_reg.c
@@ -25,7 +25,7 @@
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
-#include "rockchip_analogix_dp.h"
+#include "analogix_dp.h"
 
 #define COMMON_INT_MASK_1	0
 #define COMMON_INT_MASK_2	0

commit 9c3b19b6a2edc22eba72185fbc9eed9890592c6f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Dec 18 08:52:20 2018 +0800

    video/drm: edp: code style cleanup and fixes
    
    Change-Id: I7ae761ca7a493e72fc4b4ed55f6cb2aa40a7cbfa
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index 1e63d7f60c..7c0070023a 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -136,7 +136,7 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
 	pll_tries = 0;
 	while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
 		if (pll_tries == DP_TIMEOUT_LOOP_COUNT) {
-			pr_err("Wait for PLL lock timed out\n");
+			dev_err(dp->dev, "Wait for PLL lock timed out\n");
 			return -ETIMEDOUT;
 		}
 
@@ -334,7 +334,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 		if (retval)
 			return retval;
 
-		pr_info("Link Training Clock Recovery success\n");
+		dev_info(dp->dev, "Link Training Clock Recovery success\n");
 		dp->link_train.lt_state = EQUALIZER_TRAINING;
 	} else {
 		for (lane = 0; lane < lane_count; lane++) {
@@ -354,7 +354,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
 			if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP ||
 			    voltage_swing == VOLTAGE_LEVEL_3 ||
 			    pre_emphasis == PRE_EMPHASIS_LEVEL_3) {
-				pr_err("CR Max reached (%d,%d,%d)\n",
+				dev_err(dp->dev, "CR Max reached (%d,%d,%d)\n",
 					dp->link_train.cr_loop[lane],
 					voltage_swing, pre_emphasis);
 				analogix_dp_reduce_link_rate(dp);
@@ -414,17 +414,15 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 		/* traing pattern Set to Normal */
 		analogix_dp_training_pattern_dis(dp);
 
-		pr_info("Link Training success!\n");
+		printf("Link Training success!\n");
 
 		analogix_dp_get_link_bandwidth(dp, &reg);
 		dp->link_train.link_rate = reg;
-		pr_debug("final bandwidth = %.2x\n",
-			dp->link_train.link_rate);
-
 		analogix_dp_get_lane_count(dp, &reg);
 		dp->link_train.lane_count = reg;
-		pr_debug("final lane count = %.2x\n",
-			dp->link_train.lane_count);
+
+		printf("final link rate = 0x%.2x, lane count = 0x%.2x\n",
+		       dp->link_train.link_rate, dp->link_train.lane_count);
 
 		/* set enhanced mode if available */
 		analogix_dp_set_enhanced_mode(dp);
@@ -437,7 +435,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
 	dp->link_train.eq_loop++;
 
 	if (dp->link_train.eq_loop > MAX_EQ_LOOP) {
-		pr_err("EQ Max loop\n");
+		dev_dbg(dp->dev, "EQ Max loop\n");
 		analogix_dp_reduce_link_rate(dp);
 		return -EIO;
 	}
@@ -480,9 +478,9 @@ static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
 	*lane_count = DPCD_MAX_LANE_COUNT(data);
 }
 
-static void analogix_dp_init_training(struct analogix_dp_device *dp,
-				      enum link_lane_count_type max_lane,
-				      int max_rate)
+static int analogix_dp_init_training(struct analogix_dp_device *dp,
+				     enum link_lane_count_type max_lane,
+				     int max_rate)
 {
 	/*
 	 * MACRO_RST must be applied after the PLL_LOCK to avoid
@@ -497,15 +495,13 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
 	if ((dp->link_train.link_rate != DP_LINK_BW_1_62) &&
 	    (dp->link_train.link_rate != DP_LINK_BW_2_7) &&
 	    (dp->link_train.link_rate != DP_LINK_BW_5_4)) {
-		pr_err("Rx Max Link Rate is abnormal :%x !\n",
-			dp->link_train.link_rate);
-		dp->link_train.link_rate = DP_LINK_BW_1_62;
+		dev_err(dp->dev, "failed to get Rx Max Link Rate\n");
+		return -ENODEV;
 	}
 
 	if (dp->link_train.lane_count == 0) {
-		pr_err("Rx Max Lane count is abnormal :%x !\n",
-			dp->link_train.lane_count);
-		dp->link_train.lane_count = (u8)LANE_COUNT1;
+		dev_err(dp->dev, "failed to get Rx Max Lane Count\n");
+		return -ENODEV;
 	}
 
 	/* Setup TX lane count & rate */
@@ -516,6 +512,8 @@ static void analogix_dp_init_training(struct analogix_dp_device *dp,
 
 	/* All DP analog module power up */
 	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
+
+	return 0;
 }
 
 static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
@@ -530,17 +528,17 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 		case START:
 			retval = analogix_dp_link_start(dp);
 			if (retval)
-				pr_err("LT link start failed!\n");
+				dev_err(dp->dev, "LT link start failed!\n");
 			break;
 		case CLOCK_RECOVERY:
 			retval = analogix_dp_process_clock_recovery(dp);
 			if (retval)
-				pr_err("LT CR failed!\n");
+				dev_err(dp->dev, "LT CR failed!\n");
 			break;
 		case EQUALIZER_TRAINING:
 			retval = analogix_dp_process_equalizer_training(dp);
 			if (retval)
-				pr_err("LT EQ failed!\n");
+				dev_err(dp->dev, "LT EQ failed!\n");
 			break;
 		case FINISHED:
 			training_finished = 1;
@@ -549,8 +547,6 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 			return -EREMOTEIO;
 		}
 	}
-	if (retval)
-		pr_err("eDP link training failed (%d)\n", retval);
 
 	return retval;
 }
@@ -558,24 +554,25 @@ static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
 static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
 				      u32 count, u32 bwtype)
 {
-	int i;
-	int retval;
+	int ret;
 
-	for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
-		analogix_dp_init_training(dp, count, bwtype);
-		retval = analogix_dp_sw_link_training(dp);
-		if (retval == 0)
-			break;
+	ret = analogix_dp_init_training(dp, count, bwtype);
+	if (ret < 0) {
+		dev_err(dp->dev, "failed to init training\n");
+		return ret;
+	}
 
-		udelay(110);
+	ret = analogix_dp_sw_link_training(dp);
+	if (ret < 0) {
+		dev_err(dp->dev, "failed to do sw link training\n");
+		return ret;
 	}
 
-	return retval;
+	return 0;
 }
 
 static int analogix_dp_config_video(struct analogix_dp_device *dp)
 {
-	int retval = 0;
 	int timeout_loop = 0;
 	int done_count = 0;
 
@@ -584,7 +581,7 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 	analogix_dp_set_video_color_format(dp);
 
 	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
-		pr_err("PLL is not locked yet.\n");
+		dev_err(dp->dev, "PLL is not locked yet.\n");
 		return -EINVAL;
 	}
 
@@ -593,7 +590,7 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
 			break;
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			pr_err("Timeout of video streamclk ok\n");
+			dev_err(dp->dev, "Timeout of video streamclk ok\n");
 			return -ETIMEDOUT;
 		}
 
@@ -627,17 +624,14 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 			done_count = 0;
 		}
 		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
-			pr_err("Timeout of video streamclk ok\n");
+			dev_err(dp->dev, "Timeout of video streamclk ok\n");
 			return -ETIMEDOUT;
 		}
 
 		udelay(1001);
 	}
 
-	if (retval != 0)
-		pr_err("Video stream is not detected!\n");
-
-	return retval;
+	return 0;
 }
 
 static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
@@ -698,7 +692,6 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 {
 	unsigned char *edid = dp->edid;
 	unsigned int extend_block = 0;
-	unsigned char sum;
 	unsigned char test_vector;
 	int retval;
 
@@ -724,15 +717,11 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 						EDID_HEADER_PATTERN,
 						EDID_BLOCK_LENGTH,
 						&edid[EDID_HEADER_PATTERN]);
-		if (retval != 0) {
-			pr_err("EDID Read failed!\n");
-			return -EIO;
-		}
-		sum = analogix_dp_calc_edid_check_sum(edid);
-		if (sum != 0) {
-			pr_err("EDID bad checksum!\n");
-			return -EIO;
-		}
+		if (retval < 0)
+			return retval;
+
+		if (analogix_dp_calc_edid_check_sum(edid))
+			return -EINVAL;
 
 		/* Read additional EDID data */
 		retval = analogix_dp_read_bytes_from_i2c(dp,
@@ -740,15 +729,11 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 				EDID_BLOCK_LENGTH,
 				EDID_BLOCK_LENGTH,
 				&edid[EDID_BLOCK_LENGTH]);
-		if (retval != 0) {
-			pr_err("EDID Read failed!\n");
-			return -EIO;
-		}
-		sum = analogix_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]);
-		if (sum != 0) {
-			pr_err("EDID bad checksum!\n");
-			return -EIO;
-		}
+		if (retval < 0)
+			return retval;
+
+		if (analogix_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]))
+			return -EINVAL;
 
 		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
 						&test_vector);
@@ -761,21 +746,18 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 				DP_TEST_EDID_CHECKSUM_WRITE);
 		}
 	} else {
-		pr_info("EDID data does not include any extensions.\n");
+		dev_info(dp->dev,
+			 "EDID data does not include any extensions.\n");
 
 		/* Read EDID data */
 		retval = analogix_dp_read_bytes_from_i2c(dp,
 				I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
 				EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
-		if (retval != 0) {
-			pr_err("EDID Read failed!\n");
-			return -EIO;
-		}
-		sum = analogix_dp_calc_edid_check_sum(edid);
-		if (sum != 0) {
-			pr_err("EDID bad checksum!\n");
-			return -EIO;
-		}
+		if (retval < 0)
+			return retval;
+
+		if (analogix_dp_calc_edid_check_sum(edid))
+			return -EINVAL;
 
 		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
 						&test_vector);
@@ -787,7 +769,6 @@ static int analogix_dp_read_edid(struct analogix_dp_device *dp)
 		}
 	}
 
-	debug("EDID Read success!\n");
 	return 0;
 }
 
@@ -819,165 +800,61 @@ retry:
 	return retval;
 }
 
-const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data = {
-	.lcdsel_grf_reg = 0x6250,
-	.lcdsel_big = 0 | BIT(21),
-	.lcdsel_lit = BIT(5) | BIT(21),
-	.chip_type = RK3399_EDP,
-	.has_vop_sel = true,
-};
-
-const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data = {
-	.lcdsel_grf_reg = 0x025c,
-	.lcdsel_big = 0 | BIT(21),
-	.lcdsel_lit = BIT(5) | BIT(21),
-	.chip_type = RK3288_DP,
-	.has_vop_sel = true,
-};
-
-const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data = {
-	.chip_type = RK3368_EDP,
-	.has_vop_sel = false,
-};
-
-static int rockchip_analogix_dp_init(struct display_state *state)
+static int analogix_dp_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct rockchip_dp_chip_data *pdata = connector->data;
-	struct analogix_dp_device *dp;
-	struct analogix_dp_plat_data *plat_data;
-	int ret;
-
-	dp = malloc(sizeof(*dp));
-	if (!dp)
-		return -ENOMEM;
-
-	memset(dp, 0, sizeof(*dp));
-	plat_data = malloc(sizeof(*pdata));
-	if (!plat_data)
-		return -ENOMEM;
-	dp->reg_base = dev_read_addr_ptr(conn_state->dev);
-	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (dp->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-		      __func__, dp->grf);
-		return  -ENXIO;
-	}
-
-	ret = gpio_request_by_name(conn_state->dev, "hpd-gpios", 0,
-				   &dp->hpd_gpio, GPIOD_IS_IN);
-	if (ret != -ENOENT) {
-		printf("%s: Warning: cannot get hpd GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	dp->plat_data = plat_data;
-	dp->plat_data->dev_type = ROCKCHIP_DP;
-	dp->plat_data->subdev_type = pdata->chip_type;
-	/*
-	 * Like Rockchip DisplayPort TRM indicate that "Main link
-	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
-	 */
-	dp->video_info.max_link_rate = 0x0A;
-	dp->video_info.max_lane_count = 0x04;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 
-	conn_state->private = dp;
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-#if 0
-	if (pdata->chip_type == RK3399_EDP) {
-		/*
-		 * reset edp controller.
-		 */
-		writel(0x20002000, RKIO_CRU_PHYS + 0x444);
-		mdelay(10);
-		writel(0x20000000, RKIO_CRU_PHYS + 0x444);
-		mdelay(10);
-	} else if (pdata->chip_type == RK3368_EDP) {
-		/* edp ref clk sel */
-		writel(0x00010001, RKIO_GRF_PHYS + 0x410);
-		/* edp 24m clock domain software reset */
-		writel(0x80008000, RKIO_CRU_PHYS + 0x318);
-		udelay(20);
-		writel(0x80000000, RKIO_CRU_PHYS + 0x318);
-		/* edp ctrl apb bus software reset */
-		writel(0x04000400, RKIO_CRU_PHYS + 0x31c);
-		udelay(20);
-		writel(0x04000000, RKIO_CRU_PHYS + 0x31c);
-	} else if (pdata->chip_type == RK3288_DP) {
-		/* edp ref clk sel */
-		writel(0x00100010, RKIO_GRF_PHYS + 0x274);
-		/* edp 24m clock domain software reset */
-		writel(0x80008000, RKIO_CRU_PHYS + 0x1d0);
-		udelay(20);
-		writel(0x80000000, RKIO_CRU_PHYS + 0x1d0);
-		udelay(20);
-	}
-#endif
-
 	analogix_dp_init_dp(dp);
 
 	return 0;
 }
 
-static void rockchip_analogix_dp_deinit(struct display_state *state)
-{
-	/* TODO */
-}
-
-static int rockchip_analogix_dp_get_edid(struct display_state *state)
+static int analogix_dp_connector_get_edid(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct analogix_dp_device *dp = conn_state->private;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 	int ret;
 
 	ret = analogix_dp_handle_edid(dp);
-	if (ret)
+	if (ret) {
+		dev_err(dp->dev, "failed to get edid\n");
 		return ret;
+	}
+
 	memcpy(&conn_state->edid, &dp->edid, sizeof(dp->edid));
 
 	return 0;
 }
 
-static int rockchip_analogix_dp_prepare(struct display_state *state)
+static int analogix_dp_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct rockchip_dp_chip_data *pdata = connector->data;
-	struct analogix_dp_device *dp = conn_state->private;
+	struct analogix_dp_device *dp = dev_get_priv(conn_state->dev);
 	u32 val;
+	int ret;
 
-	if (!pdata->has_vop_sel)
-		return 0;
-
-	if (crtc_state->crtc_id)
-		val = pdata->lcdsel_lit;
-	else
-		val = pdata->lcdsel_big;
-
-	writel(val, dp->grf + pdata->lcdsel_grf_reg);
-
-	debug("vop %s output to edp\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
-
-	return 0;
-}
+	if (pdata->has_vop_sel) {
+		if (crtc_state->crtc_id)
+			val = pdata->lcdsel_lit;
+		else
+			val = pdata->lcdsel_big;
 
-static int rockchip_analogix_dp_enable(struct display_state *state)
-{
-	struct connector_state *conn_state = &state->conn_state;
-	struct analogix_dp_device *dp = conn_state->private;
-	int ret;
+		writel(val, dp->grf + pdata->lcdsel_grf_reg);
+	}
 
 	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
 					 dp->video_info.max_link_rate);
 	if (ret) {
-		pr_err("unable to do link train\n");
-		return 0;
+		dev_err(dp->dev, "unable to do link train\n");
+		return ret;
 	}
 
 	analogix_dp_enable_scramble(dp, 1);
@@ -986,58 +863,116 @@ static int rockchip_analogix_dp_enable(struct display_state *state)
 
 	analogix_dp_init_video(dp);
 	ret = analogix_dp_config_video(dp);
-	if (ret)
-		pr_err("unable to config video\n");
+	if (ret) {
+		dev_err(dp->dev, "unable to config video\n");
+		return ret;
+	}
 
 	return 0;
 }
 
-static int rockchip_analogix_dp_disable(struct display_state *state)
+static int analogix_dp_connector_disable(struct display_state *state)
 {
 	/* TODO */
 
 	return 0;
 }
 
-const struct rockchip_connector_funcs rockchip_analogix_dp_funcs = {
-	.init = rockchip_analogix_dp_init,
-	.deinit = rockchip_analogix_dp_deinit,
-	.get_edid = rockchip_analogix_dp_get_edid,
-	.prepare = rockchip_analogix_dp_prepare,
-	.enable = rockchip_analogix_dp_enable,
-	.disable = rockchip_analogix_dp_disable,
+static const struct rockchip_connector_funcs analogix_dp_connector_funcs = {
+	.init = analogix_dp_connector_init,
+	.get_edid = analogix_dp_connector_get_edid,
+	.enable = analogix_dp_connector_enable,
+	.disable = analogix_dp_connector_disable,
 };
 
-static const struct rockchip_connector rk3288_analogix_dp_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
-	 .data = &rk3288_analogix_dp_drv_data,
+static int analogix_dp_probe(struct udevice *dev)
+{
+	struct analogix_dp_device *dp = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
+	const struct rockchip_dp_chip_data *pdata = connector->data;
+	int ret;
+
+	dp->reg_base = dev_read_addr_ptr(dev);
+	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(dp->grf))
+		return PTR_ERR(dp->grf);
+
+	ret = gpio_request_by_name(dev, "hpd-gpios", 0, &dp->hpd_gpio,
+				   GPIOD_IS_IN);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "failed to get hpd GPIO: %d\n", ret);
+		return ret;
+	}
+
+	dp->plat_data.dev_type = ROCKCHIP_DP;
+	dp->plat_data.subdev_type = pdata->chip_type;
+	/*
+	 * Like Rockchip DisplayPort TRM indicate that "Main link
+	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
+	 */
+	dp->video_info.max_link_rate = 0x0A;
+	dp->video_info.max_lane_count = 0x04;
+
+	dp->dev = dev;
+
+	return 0;
+}
+
+static const struct rockchip_dp_chip_data rk3288_edp_platform_data = {
+	.lcdsel_grf_reg = 0x025c,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3288_DP,
+	.has_vop_sel = true,
+};
+
+static const struct rockchip_connector rk3288_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3288_edp_platform_data,
+};
+
+static const struct rockchip_dp_chip_data rk3368_edp_platform_data = {
+	.chip_type = RK3368_EDP,
+	.has_vop_sel = false,
+};
+
+static const struct rockchip_connector rk3368_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3368_edp_platform_data,
 };
 
-static const struct rockchip_connector rk3399_analogix_edp_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
-	 .data = &rk3399_analogix_edp_drv_data,
+static const struct rockchip_dp_chip_data rk3399_edp_platform_data = {
+	.lcdsel_grf_reg = 0x6250,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3399_EDP,
+	.has_vop_sel = true,
 };
 
-static const struct rockchip_connector rk3368_analogix_edp_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
-	 .data = &rk3368_analogix_edp_drv_data,
+static const struct rockchip_connector rk3399_edp_driver_data = {
+	 .funcs = &analogix_dp_connector_funcs,
+	 .data = &rk3399_edp_platform_data,
 };
 
-static const struct udevice_id rockchip_analogix_dp_ids[] = {
+static const struct udevice_id analogix_dp_ids[] = {
 	{
-	 .compatible = "rockchip,rk3288-dp",
-	 .data = (ulong)&rk3288_analogix_dp_data,
-	},{
-	 .compatible = "rockchip,rk3399-edp",
-	 .data = (ulong)&rk3399_analogix_edp_data,
-	},{
-	 .compatible = "rockchip,rk3368-edp",
-	 .data = (ulong)&rk3368_analogix_edp_data,
-	}, {}
+		.compatible = "rockchip,rk3288-dp",
+		.data = (ulong)&rk3288_edp_driver_data,
+	}, {
+		.compatible = "rockchip,rk3368-edp",
+		.data = (ulong)&rk3368_edp_driver_data,
+	}, {
+		.compatible = "rockchip,rk3399-edp",
+		.data = (ulong)&rk3399_edp_driver_data,
+	},
+	{}
 };
 
-U_BOOT_DRIVER(rockchip_analogix_dp) = {
-	.name = "rockchip_analogix_dp",
+U_BOOT_DRIVER(analogix_dp) = {
+	.name = "analogix_dp",
 	.id = UCLASS_DISPLAY,
-	.of_match = rockchip_analogix_dp_ids,
+	.of_match = analogix_dp_ids,
+	.probe = analogix_dp_probe,
+	.priv_auto_alloc_size = sizeof(struct analogix_dp_device),
 };
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/rockchip_analogix_dp.h
index dc54ea8e1b..68295d01f2 100644
--- a/drivers/video/drm/rockchip_analogix_dp.h
+++ b/drivers/video/drm/rockchip_analogix_dp.h
@@ -1068,13 +1068,14 @@ struct analogix_dp_plat_data {
 };
 
 struct analogix_dp_device {
+	struct udevice *dev;
 	void *reg_base;
 	void *grf;
 	struct gpio_desc hpd_gpio;
 	struct video_info	video_info;
 	struct link_train	link_train;
 	struct drm_display_mode *mode;
-	struct analogix_dp_plat_data *plat_data;
+	struct analogix_dp_plat_data plat_data;
 	unsigned char edid[EDID_BLOCK_LENGTH * 2];
 };
 
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/rockchip_analogix_dp_reg.c
index 4cdcdfd0ab..3cf93b3990 100644
--- a/drivers/video/drm/rockchip_analogix_dp_reg.c
+++ b/drivers/video/drm/rockchip_analogix_dp_reg.c
@@ -81,10 +81,10 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
 	reg = SEL_24M | TX_DVDD_BIT_1_0625V;
 	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
 
-	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
+	if (dp->plat_data.dev_type == ROCKCHIP_DP) {
 		reg = REF_CLK_24M;
-		if (dp->plat_data->subdev_type == RK3288_DP ||
-		    dp->plat_data->subdev_type == RK3368_EDP)
+		if (dp->plat_data.subdev_type == RK3288_DP ||
+		    dp->plat_data.subdev_type == RK3368_EDP)
 			reg ^= REF_CLK_MASK;
 
 		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
@@ -256,7 +256,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
 	u32 reg;
 	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
 
-	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+	if (dp->plat_data.dev_type == ROCKCHIP_DP)
 		phy_pd_addr = ANALOGIX_DP_PD;
 
 	switch (block) {
@@ -360,8 +360,9 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
 
 		while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
 			timeout_loop++;
-			if(DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
-				pr_err("failed to get pll lock status\n");
+			if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
+				dev_err(dp->dev,
+					"failed to get pll lock status\n");
 				return;
 			}
 			udelay(20);
@@ -460,7 +461,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
 	analogix_dp_reset_aux(dp);
 
 	/* Disable AUX transaction H/W retry */
-	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+	if (dp->plat_data.dev_type == ROCKCHIP_DP)
 		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
 		      AUX_HW_RETRY_COUNT_SEL(3) |
 		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
@@ -521,9 +522,10 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 	while (!(reg & RPLY_RECEIV)) {
 		timeout_loop++;
 		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
-			pr_err("AUX CH command reply failed!\n");
+			dev_err(dp->dev, "AUX CH command reply failed!\n");
 			return -ETIMEDOUT;
 		}
+
 		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
 		udelay(11);
 	}
@@ -541,8 +543,8 @@ int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
 	/* Check AUX CH error access status */
 	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
 	if ((reg & AUX_STATUS_MASK) != 0) {
-		pr_err("AUX CH error happens: %d\n\n",
-			reg & AUX_STATUS_MASK);
+		dev_err(dp->dev,
+			"AUX CH error happens: %d\n", reg & AUX_STATUS_MASK);
 		return -EREMOTEIO;
 	}
 
@@ -586,8 +588,6 @@ int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
 		retval = analogix_dp_start_aux_transaction(dp);
 		if (retval == 0)
 			break;
-
-		pr_debug("%s: Aux Transaction fail!\n", __func__);
 	}
 
 	return retval;
@@ -626,8 +626,6 @@ int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
 		retval = analogix_dp_start_aux_transaction(dp);
 		if (retval == 0)
 			break;
-
-		pr_info("%s: Aux Transaction fail!\n", __func__);
 	}
 
 	/* Read data buffer */
@@ -691,9 +689,6 @@ int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
 			retval = analogix_dp_start_aux_transaction(dp);
 			if (retval == 0)
 				break;
-
-			pr_debug("%s: Aux Transaction fail!\n",
-				__func__);
 		}
 
 		start_offset += cur_data_count;
@@ -749,9 +744,6 @@ int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
 			retval = analogix_dp_start_aux_transaction(dp);
 			if (retval == 0)
 				break;
-
-			pr_debug("%s: Aux Transaction fail!\n",
-				__func__);
 		}
 
 		for (cur_data_idx = 0; cur_data_idx < cur_data_count;
@@ -795,10 +787,10 @@ int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
 
 	/* Start AUX transaction */
 	retval = analogix_dp_start_aux_transaction(dp);
-	if (retval != 0)
-		pr_debug("%s: Aux Transaction fail!\n", __func__);
+	if (retval < 0)
+		return retval;
 
-	return retval;
+	return 0;
 }
 
 int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
@@ -834,8 +826,6 @@ int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
 		retval = analogix_dp_start_aux_transaction(dp);
 		if (retval == 0)
 			break;
-
-		pr_debug("%s: Aux Transaction fail!\n", __func__);
 	}
 
 	/* Read data */
@@ -894,15 +884,12 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
 				retval = analogix_dp_start_aux_transaction(dp);
 				if (retval == 0)
 					break;
-
-				pr_debug("%s: Aux Transaction fail!\n",
-					__func__);
 			}
 			/* Check if Rx sends defer */
 			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM);
 			if (reg == AUX_RX_COMM_AUX_DEFER ||
 			    reg == AUX_RX_COMM_I2C_DEFER) {
-				pr_err("Defer: %d\n\n", reg);
+				dev_dbg(dp->dev, "Defer: %d\n\n", reg);
 				defer = 1;
 			}
 		}
@@ -1175,21 +1162,16 @@ int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp)
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
 
-	if (!(reg & DET_STA)) {
-		pr_debug("Input stream clock not detected.\n");
+	if (!(reg & DET_STA))
 		return -EINVAL;
-	}
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
-	pr_debug("wait SYS_CTL_2.\n");
 
-	if (reg & CHA_STA) {
-		pr_debug("Input stream clk is changing\n");
+	if (reg & CHA_STA)
 		return -EINVAL;
-	}
 
 	return 0;
 }
@@ -1277,10 +1259,8 @@ int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp)
 	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
 
 	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
-	if (!(reg & STRM_VALID)) {
-		pr_debug("Input video stream is not detected.\n");
+	if (!(reg & STRM_VALID))
 		return -EINVAL;
-	}
 
 	return 0;
 }

commit 95351b7a0ea594607638a7fb4f89bff8a966c570
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 16:04:29 2018 +0800

    rockchip: dts: rk3399: add rk3399pro evb board recovery key
    
    Change-Id: I5fe5a5532e7a6d47209ac38774497575b9c3072a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 46bf2072b3..bbc1c0f4a1 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -18,17 +18,33 @@
 	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
 		     "google,rk3399evb-rev2";
 
-	rk_key: rockchip-key {
+	/* RK3399 evb board */
+	rk_key0 {
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,key";
 		status = "okay";
 		io-channels = <&saradc 1>;
 
 		vol-up-key {
-				u-boot,dm-pre-reloc;
-		        linux,code = <KEY_VOLUMEUP>;
-		        label = "volume up";
-		        rockchip,adc_value = <1>;
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			rockchip,adc_value = <1>;
+		};
+	};
+
+	/* RK3399PRO evb board */
+	rk_key1 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,key";
+		status = "okay";
+		io-channels = <&saradc 2>;
+
+		vol-up-key {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			rockchip,adc_value = <10>;
 		};
 	};
 

commit adba3792a71bd52a6f8276fae1acc1c323997d72
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 17:19:20 2018 +0800

    dm: key: support register multiple same key code
    
    Due to some board use the same u-boot rkxx-evb.dts, dm key had
    better support parse same key code for times.
    
    Change-Id: Ifeeb75bef90e52e2747ef2858cec500a928c806d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 43ed0ddd38..3cc541e687 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -11,6 +11,13 @@
 
 static LIST_HEAD(key_list);
 
+const char *evt_name[] = {
+	"Not down",
+	"Down",
+	"Long down",
+	"Not exist",
+};
+
 static inline uint64_t arch_counter_get_cntpct(void)
 {
 	uint64_t cval = 0;
@@ -50,8 +57,8 @@ static int key_read_adc_simple_event(struct input_key *key, unsigned int adcval)
 	else
 		min = 0;
 
-	debug("%s: %s: val=%d, max=%d, min=%d, adcval=%d\n",
-	      __func__, key->name, key->adcval, max, min, adcval);
+	debug("%s: '%s' configure adc=%d: range[%d~%d]; hw adcval=%d\n",
+	      __func__, key->name, key->adcval, min, max, adcval);
 
 	/* Check */
 	if ((adcval <= max) && (adcval >= min)) {
@@ -147,52 +154,50 @@ int key_read(int code)
 	static int initialized;
 	unsigned int adcval;
 	int keyval = KEY_NOT_EXIST;
-	int found = 0, ret;
+	int ret;
 
 	/* Initialize all key drivers */
 	if (!initialized) {
 		for (uclass_first_device(UCLASS_KEY, &dev);
 		     dev;
 		     uclass_next_device(&dev)) {
-			debug("%s: dev.name = %s\n", __func__, dev->name);
-			;
+			debug("%s: have found key driver '%s'\n\n",
+			      __func__, dev->name);
 		}
 	}
 
 	/* Search on the key list */
 	list_for_each_entry(key, &key_list, link) {
-		if (key->code == code) {
-			found = 1;
-			break;
-		}
-	}
-	if (!found)
-		goto out;
-
-	/* Is a adc key? */
-	if (key->type & ADC_KEY) {
-		ret = adc_channel_single_shot("saradc", key->channel, &adcval);
-		if (ret)
-			printf("%s: failed to read saradc, ret=%d\n",
-			       key->name, ret);
-		else
-			keyval = key_read_adc_simple_event(key, adcval);
-	/* Is a gpio key? */
-	} else if (key->type & GPIO_KEY) {
-		/* All pwrkey must register as an interrupt event */
-		if (key->code == KEY_POWER) {
-			keyval = key_read_gpio_interrupt_event(key);
+		if (key->code != code)
+			continue;
+
+		/* Is a adc key? */
+		if (key->type & ADC_KEY) {
+			ret = adc_channel_single_shot("saradc",
+						      key->channel, &adcval);
+			if (ret)
+				printf("%s: failed to read saradc, ret=%d\n",
+				       key->name, ret);
+			else
+				keyval = key_read_adc_simple_event(key, adcval);
+		/* Is a gpio key? */
+		} else if (key->type & GPIO_KEY) {
+			/* All pwrkey must register as an interrupt event */
+			if (key->code == KEY_POWER)
+				keyval = key_read_gpio_interrupt_event(key);
+			else
+				keyval = key_read_gpio_simple_event(key);
 		} else {
-			keyval = key_read_gpio_simple_event(key);
+			printf("%s: invalid key type!\n", __func__);
 		}
-	} else {
-		printf("%s: invalid key type!\n", __func__);
-	}
 
-	debug("%s: key.name=%s, code=%d, keyval=%d\n",
-	      __func__, key->name, key->code, keyval);
+		debug("%s: '%s'(code=%d) is %s\n",
+		      __func__, key->name, key->code, evt_name[keyval]);
+
+		if (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN)
+			break;
+	}
 
-out:
 	return keyval;
 }
 

commit 8171b1ba1b36d8a6236ad21a69c67a23466d8198
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 15:54:28 2018 +0800

    rockchip: rk3399: support rk3399pro uart2 input
    
    RK3399: uart2c; RK3399PRO: uart2a.
    
    Change-Id: Ic750e862c30cfd63de4ad800ebf49133feaefb01
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index b541e2caa1..c29e2379d9 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -527,6 +527,8 @@ enum {
 	/* GRF_SOC_CON7 */
 	GRF_UART_DBG_SEL_SHIFT  = 10,
 	GRF_UART_DBG_SEL_MASK   = 3 << GRF_UART_DBG_SEL_SHIFT,
+	GRF_UART_DBG_SEL_A	= 0,
+	GRF_UART_DBG_SEL_B	= 1,
 	GRF_UART_DBG_SEL_C      = 2,
 
 	/* GRF_SOC_CON20 */
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 89b3b6d004..ca154f745b 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -128,16 +128,23 @@ void board_debug_uart_init(void)
 		     GRF_GPIO2C1_SEL_MASK,
 		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
 #else
-	/* Enable early UART2 channel C on the RK3399 */
+	/* Enable early UART2 channel C on the RK3399/RK3399PRO */
 	rk_clrsetreg(&grf->gpio4c_iomux,
 		     GRF_GPIO4C3_SEL_MASK,
 		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
 	rk_clrsetreg(&grf->gpio4c_iomux,
 		     GRF_GPIO4C4_SEL_MASK,
 		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
+#if defined(CONFIG_ROCKCHIP_RK3399PRO)
+	/* Set channel A as UART2 input */
+	rk_clrsetreg(&grf->soc_con7,
+		     GRF_UART_DBG_SEL_MASK,
+		     GRF_UART_DBG_SEL_A << GRF_UART_DBG_SEL_SHIFT);
+#else
 	/* Set channel C as UART2 input */
 	rk_clrsetreg(&grf->soc_con7,
 		     GRF_UART_DBG_SEL_MASK,
 		     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
 #endif
+#endif
 }

commit 4d763c7bd8f8c0f0a074738ccf687cf3f4506122
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 17 14:59:21 2018 +0800

    rockchip: rk3399: add syscon scan sub dev
    
    Change-Id: Icb0b59fa7cb61e41fc611b5671625854894d2283
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 74d4552017..5cf57f4d45 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -20,6 +20,9 @@ static const struct udevice_id rk3399_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk3399) = {
 	.name = "rk3399_syscon",
 	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 	.of_match = rk3399_syscon_ids,
 };
 

commit 80cc39079267eb5fe8b8f9c040b320cccbe1642b
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 15:15:05 2018 +0800

    dts: rockchip: rk3288: update ddc-bus for hdmi
    
    use hdmi_ddc instead of i2c5 for read edid.
    
    Change-Id: Ie2efcf99a50bb7cdb68eaa4b8c3a783a743e758e
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 963930923f..6e7418378e 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -818,11 +818,12 @@
 		compatible = "rockchip,rk3288-dw-hdmi";
 		reg = <0xff980000 0x20000>;
 		reg-io-width = <4>;
-		ddc-i2c-bus = <&i2c5>;
 		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
 		clock-names = "iahb", "isfr";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmi_ddc>;
 		status = "disabled";
 		ports {
 			hdmi_in: port {
@@ -1134,6 +1135,13 @@
 			#interrupt-cells = <2>;
 		};
 
+		hdmi {
+			hdmi_ddc: hdmi-ddc {
+				rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
+						<7 20 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
 		pcfg_pull_up: pcfg-pull-up {
 			bias-pull-up;
 		};

commit d52543056c6a017f27d8fc2a4af38d939863815d
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Dec 10 10:41:45 2018 +0800

    configs: rk322x_defconfig: update with save defconfig
    
    Change-Id: Iedb228f9794bdba0cdc5598935a877291730b1b9
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 80019e4a3a..4da83f994e 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -3,12 +3,12 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_TPL_STACK=0x10088000
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -19,7 +19,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
@@ -101,10 +100,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 048ac2b7215613cb9392f8d8ffafd14d7533b4ff
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 14:51:44 2018 +0800

    dts: rockchip: rk3288: update dsi node from kernel.
    
    Change-Id: I43ffd5e2d782bb18ac6c7fb96db0628458bb5a2d
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
index a21868b1b9..3c07e5a83a 100644
--- a/arch/arm/dts/rk3288-evb-rk1608.dtsi
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -440,7 +440,7 @@
 	status = "okay";
 };
 
-&mipi_dsi0 {
+&dsi0 {
 	status = "disabled";
 	rockchip,panel = <&panel>;
 	display-timings {
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index ce27705144..963930923f 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -868,13 +868,15 @@
 		};
 	};
 
-	mipi_dsi0: mipi@ff960000 {
-		compatible = "rockchip,rk3288_mipi_dsi";
+	dsi0: mipi@ff960000 {
+		compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
 		reg = <0xff960000 0x4000>;
-		clocks = <&cru PCLK_MIPI_DSI0>;
-		clock-names = "pclk_mipi";
-		/*pinctrl-names = "default";
-		pinctrl-0 = <&lcdc0_ctl>;*/
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
+		clock-names = "ref", "pclk";
+		resets = <&cru SRST_MIPIDSI0>;
+		reset-names = "apb";
+		power-domains = <&power RK3288_PD_VIO>;
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
 		#size-cells = <0>;

commit 0fd7e0574c9d7b88d3ddb3234481387444fe09ee
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 14:37:44 2018 +0800

    rockchip: dt-bindings: clk: rk3288: add SCLK_MIPIDSI_24M
    
    Change-Id: I268aadd6065f93f17e5a48e9b5acf63d2e5132a1
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index e37113a72d..c86ae74381 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -75,6 +75,7 @@
 #define SCLK_USBPHY480M_SRC	122
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
+#define SCLK_MIPIDSI_24M	126
 
 #define SCLK_MAC_PLL		150
 #define SCLK_MAC		151

commit 03773c159a231a891a4af23d0d1db2763799d341
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 14:31:28 2018 +0800

    dts: rockchip: rk3288: sync display-subsystem route node form kernel.
    
    Change-Id: I6758525abe308a35e4dcf3b20905c114d8a5ab46
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 20adb0dece..ce27705144 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -183,6 +183,24 @@
 				charge_logo,mode = "center";
 				connect = <&vopl_out_edp>;
 			};
+
+			route_dsi0: route-dsi0 {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopl_out_dsi0>;
+			};
+
+			route_lvds: route-lvds {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopl_out_lvds>;
+			};
 		};
 	};
 
@@ -340,6 +358,7 @@
 		pinctrl-0 = <&i2c5_xfer>;
 		status = "disabled";
 	};
+
 	uart0: serial@ff180000 {
 		compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
 		reg = <0xff180000 0x100>;
@@ -408,6 +427,7 @@
 		pinctrl-0 = <&uart4_xfer>;
 		status = "disabled";
 	};
+
 	thermal: thermal-zones {
 		#include "rk3288-thermal.dtsi"
 	};
@@ -702,9 +722,9 @@
 				reg = <2>;
 				remote-endpoint = <&lvds_in_vopb>;
 			};
-			vopb_out_mipi: endpoint@3 {
+			vopb_out_dsi0: endpoint@3 {
 				reg = <3>;
-				remote-endpoint = <&mipi_in_vopb>;
+				remote-endpoint = <&dsi0_in_vopb>;
 			};
 
 		};
@@ -746,9 +766,9 @@
 				reg = <2>;
 				remote-endpoint = <&lvds_in_vopl>;
 			};
-			vopl_out_mipi: endpoint@3 {
+			vopl_out_dsi0: endpoint@3 {
 				reg = <3>;
-				remote-endpoint = <&mipi_in_vopl>;
+				remote-endpoint = <&dsi0_in_vopl>;
 			};
 
 		};
@@ -866,13 +886,13 @@
 			mipi_in: port {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				mipi_in_vopb: endpoint@0 {
+				dsi0_in_vopb: endpoint@0 {
 					reg = <0>;
-					remote-endpoint = <&vopb_out_mipi>;
+					remote-endpoint = <&vopb_out_dsi0>;
 				};
-				mipi_in_vopl: endpoint@1 {
+				dsi0_in_vopl: endpoint@1 {
 					reg = <1>;
-					remote-endpoint = <&vopl_out_mipi>;
+					remote-endpoint = <&vopl_out_dsi0>;
 				};
 			};
 		};

commit 8b75ff344498e2106fe6a0b7f699e1697b0c5eb7
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Dec 12 11:06:18 2018 +0800

    clk: rockchip: rk3399: support clk dump
    
    add clk_dump.
    add peri clk getting rate.
    modify aplll init freq to 816M.
    
    Change-Id: I57a9c2f708c12968909b804f957e80fb0c6d3573
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 15144d71e8..78d7066ac3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -97,6 +97,7 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 
 enum apll_frequencies {
 	APLL_1600_MHZ,
+	APLL_816_MHZ,
 	APLL_600_MHZ,
 };
 
@@ -119,4 +120,10 @@ enum rk3399_pll_id {
 	END_PLL_ID
 };
 
+struct rk3399_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 #endif	/* __ASM_ARCH_CRU_RK3399_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index ae8a9c7dbe..46b907254c 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -56,13 +56,42 @@ static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
 static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1);
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
+static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
 static const struct pll_div *apll_cfgs[] = {
 	[APLL_1600_MHZ] = &apll_1600_cfg,
+	[APLL_816_MHZ] = &apll_816_cfg,
 	[APLL_600_MHZ] = &apll_600_cfg,
 };
 
+#ifndef CONFIG_SPL_BUILD
+#define RK3399_CLK_DUMP(_id, _name, _iscru)    \
+{                                              \
+	.id = _id,                              \
+	.name = _name,                          \
+	.is_cru = _iscru,                       \
+}
+
+static const struct rk3399_clk_info clks_dump[] = {
+	RK3399_CLK_DUMP(PLL_APLLL, "aplll", true),
+	RK3399_CLK_DUMP(PLL_APLLB, "apllb", true),
+	RK3399_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3399_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3399_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3399_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3399_CLK_DUMP(PLL_VPLL, "vpll", true),
+	RK3399_CLK_DUMP(ACLK_PERIHP, "aclk_perihp", true),
+	RK3399_CLK_DUMP(HCLK_PERIHP, "hclk_perihp", true),
+	RK3399_CLK_DUMP(PCLK_PERIHP, "pclk_perihp", true),
+	RK3399_CLK_DUMP(ACLK_PERILP0, "aclk_perilp0", true),
+	RK3399_CLK_DUMP(HCLK_PERILP0, "hclk_perilp0", true),
+	RK3399_CLK_DUMP(PCLK_PERILP0, "pclk_perilp0", true),
+	RK3399_CLK_DUMP(HCLK_PERILP1, "hclk_perilp1", true),
+	RK3399_CLK_DUMP(PCLK_PERILP1, "pclk_perilp1", true),
+};
+#endif
+
 enum {
 	/* PLL_CON0 */
 	PLL_FBDIV_MASK			= 0xfff,
@@ -1018,6 +1047,68 @@ static ulong rk3399_crypto_set_clk(struct rk3399_clk_priv *priv, ulong clk_id,
 
 	return rk3399_crypto_get_clk(priv, clk_id);
 }
+
+static ulong rk3399_peri_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERIHP:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & ACLK_PERIHP_DIV_CON_MASK) >>
+		      ACLK_PERIHP_DIV_CON_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case PCLK_PERIHP:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & PCLK_PERIHP_DIV_CON_MASK) >>
+		      PCLK_PERIHP_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERIHP);
+		break;
+	case HCLK_PERIHP:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & HCLK_PERIHP_DIV_CON_MASK) >>
+		      HCLK_PERIHP_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERIHP);
+		break;
+	case ACLK_PERILP0:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & ACLK_PERILP0_DIV_CON_MASK) >>
+		      ACLK_PERILP0_DIV_CON_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case HCLK_PERILP0:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & HCLK_PERILP0_DIV_CON_MASK) >>
+		      HCLK_PERILP0_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERILP0);
+		break;
+	case PCLK_PERILP0:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & PCLK_PERILP0_DIV_CON_MASK) >>
+		      PCLK_PERILP0_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, ACLK_PERILP0);
+		break;
+	case HCLK_PERILP1:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & HCLK_PERILP1_DIV_CON_MASK) >>
+		      HCLK_PERILP1_DIV_CON_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case PCLK_PERILP1:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & PCLK_PERILP1_DIV_CON_MASK) >>
+		      PCLK_PERILP1_DIV_CON_SHIFT;
+		parent = rk3399_peri_get_clk(priv, HCLK_PERILP1);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
 #endif
 
 static ulong rk3399_clk_get_rate(struct clk *clk)
@@ -1033,7 +1124,7 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case PLL_GPLL:
 	case PLL_NPLL:
 	case PLL_VPLL:
-		rate = rk3399_pll_get_rate(priv, clk->id - 1);
+		rate = rk3399_pll_get_rate(priv, clk->id);
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -1075,6 +1166,16 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case SCLK_CRYPTO1:
 		rate = rk3399_crypto_get_clk(priv, clk->id);
 		break;
+	case ACLK_PERIHP:
+	case HCLK_PERIHP:
+	case PCLK_PERIHP:
+	case ACLK_PERILP0:
+	case HCLK_PERILP0:
+	case PCLK_PERILP0:
+	case HCLK_PERILP1:
+	case PCLK_PERILP1:
+		rate = rk3399_peri_get_clk(priv, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -1267,7 +1368,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
-	rk3399_configure_cpu(cru, APLL_600_MHZ, CPU_CLUSTER_LITTLE);
+	rk3399_configure_cpu(cru, APLL_816_MHZ, CPU_CLUSTER_LITTLE);
 
 	/*
 	 * some cru registers changed by bootrom, we'd better reset them to
@@ -1621,3 +1722,71 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
 	.platdata_auto_alloc_size = sizeof(struct rk3399_pmuclk_plat),
 #endif
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev, *pmucru_dev;
+	const struct rk3399_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(clk_rk3399),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3399_pmuclk),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s failed to get pmucru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:\n");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			else
+				ret = clk_request(pmucru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif

commit cf04b7e8f20b882458f0416981e1363a660101b7
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 18:04:57 2018 +0800

    clk: rockchip: rk3328: support crypto clk setting
    
    Change-Id: I9e4d58050b087c3da6649efe4d3115da2ce6dce7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 2608bba3c5..06bf1fa092 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -127,6 +127,14 @@ enum {
 	HCLK_PERI_DIV_CON_SHIFT		= 0,
 	HCLK_PERI_DIV_CON_MASK		= 3 << HCLK_PERI_DIV_CON_SHIFT,
 
+	/* CLKSEL_CON20 */
+	CRYPTO_PLL_SEL_SHIFT		= 7,
+	CRYPTO_PLL_SEL_MASK		= 0x1 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_PLL_SEL_CPLL		= 0,
+	CRYPTO_PLL_SEL_GPLL,
+	CRYPTO_DIV_SHIFT		= 0,
+	CRYPTO_DIV_MASK			= 0x7f << CRYPTO_DIV_SHIFT,
+
 	/* CLKSEL_CON22 */
 	CLK_TSADC_DIV_CON_SHIFT		= 0,
 	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index d16d914060..343baaedcc 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -663,6 +663,54 @@ static ulong rk3328_peri_set_clk(struct rk3328_clk_priv *priv,
 	return rk3328_peri_get_clk(priv, clk_id);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3328_crypto_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->clksel_con[20]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_crypto_set_clk(struct rk3328_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 <= 127);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[20],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3328_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static ulong rk3328_clk_get_rate(struct clk *clk)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
@@ -734,6 +782,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case HCLK_VIO:
 		rate = rk3328_vop_get_clk(priv, clk->id);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3328_crypto_get_clk(priv, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -811,6 +862,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_VIO:
 		rate = rk3328_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk3328_crypto_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	case SCLK_PDM:
 	case SCLK_RTC32K:

commit a7c5f87313809eac146b7e97e6b6e776e3014ac4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 18:01:36 2018 +0800

    clk: rockchip: rk322x: support crypto clk setting
    
    Change-Id: Id92acae9424fd0b200f9b4f33982f753f6123207
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index 98bda7548f..3162b411a9 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -148,6 +148,14 @@ enum {
 	SDIO_DIV_SHIFT		= 0,
 	SDIO_DIV_MASK		= 0xff << SDIO_DIV_SHIFT,
 
+	/* CLKSEL_CON24 */
+	CRYPTO_PLL_SEL_SHIFT	= 5,
+	CRYPTO_PLL_SEL_MASK	= 0x1 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_PLL_SEL_CPLL	= 0,
+	CRYPTO_PLL_SEL_GPLL,
+	CRYPTO_DIV_SHIFT	= 0,
+	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
+
 	/* CRU_CLKSEL26_CON */
 	DDR_CLK_PLL_SEL_SHIFT	= 8,
 	DDR_CLK_PLL_SEL_MASK	= 3 << DDR_CLK_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 5371e95cd9..b6c437f607 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -499,6 +499,52 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 
 	return rk322x_vop_get_clk(priv, clk_id);
 }
+
+static ulong rk322x_crypto_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
+{
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->cru_clksel_con[24]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk322x_crypto_set_clk(struct rk322x_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->cru_clksel_con[24],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk322x_crypto_get_clk(priv, clk_id);
+}
 #endif
 
 static ulong rk322x_clk_get_rate(struct clk *clk)
@@ -548,6 +594,9 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 	case ACLK_VOP:
 		rate = rk322x_vop_get_clk(priv, clk->id);
 		break;
+	case SCLK_CRYPTO:
+		rate = rk322x_crypto_get_clk(priv, clk->id);
+		break;
 #endif
 	default:
 		return -ENOENT;
@@ -612,6 +661,9 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_VOP:
 		ret = rk322x_vop_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_CRYPTO:
+		ret = rk322x_crypto_set_clk(priv, clk->id, rate);
+		break;
 #endif
 	default:
 		return -ENOENT;

commit 51d1c6b1dd4cd8e8e244f61ee0046d8b8a577487
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 18:00:37 2018 +0800

    clk: rockchip: px30: support crypto clk setting
    
    Change-Id: I9971fb2b6a40640d78fb259c72aac32582f8e90d
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 6703603744..322e962ebf 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -295,6 +295,19 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
+	/* CRU_CLK_SEL25_CON */
+	CRYPTO_APK_SEL_SHIFT	= 14,
+	CRYPTO_APK_PLL_SEL_MASK	= 3 << CRYPTO_APK_SEL_SHIFT,
+	CRYPTO_PLL_SEL_GPLL	= 0,
+	CRYPTO_PLL_SEL_CPLL,
+	CRYPTO_PLL_SEL_NPLL	= 0,
+	CRYPTO_APK_DIV_SHIFT	= 8,
+	CRYPTO_APK_DIV_MASK	= 0x1f << CRYPTO_APK_DIV_SHIFT,
+	CRYPTO_PLL_SEL_SHIFT	= 6,
+	CRYPTO_PLL_SEL_MASK	= 3 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_DIV_SHIFT	= 0,
+	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
+
 	/* CRU_CLK_SEL37_CON */
 	UART2_PLL_SEL_SHIFT	= 14,
 	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index fdfa2ed204..56f05e58af 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -960,6 +960,65 @@ static ulong px30_peri_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	return px30_peri_get_clk(priv, clk_id);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong px30_crypto_get_clk(struct px30_clk_priv *priv, ulong clk_id)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case SCLK_CRYPTO_APK:
+		con = readl(&cru->clksel_con[25]);
+		div = (con & CRYPTO_APK_DIV_MASK) >> CRYPTO_APK_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_crypto_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+				 ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[25],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	case SCLK_CRYPTO_APK:
+		rk_clrsetreg(&cru->clksel_con[25],
+			     CRYPTO_APK_PLL_SEL_MASK | CRYPTO_APK_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO_APK_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_APK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return px30_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static int px30_clk_get_gpll_rate(ulong *rate)
 {
 	struct udevice *pmucru_dev;
@@ -1112,6 +1171,12 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case HCLK_PERI_PRE:
 		rate = px30_peri_get_clk(priv, clk->id);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		rate = px30_crypto_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -1183,6 +1248,12 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_PERI_PRE:
 		ret = px30_peri_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		ret = px30_crypto_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}

commit 0cde592567d77e0f4857d49ea0feda1aebb82e88
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 17:59:37 2018 +0800

    clk: rockchip: rk3308: support crypto clk setting
    
    Change-Id: I58967fe70fbae6630fe0404414daaee6b1498b72
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 21da536757..66f02039d8 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -166,6 +166,19 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
+	/* CRU_CLK_SEL7_CON */
+	CRYPTO_APK_SEL_SHIFT	= 14,
+	CRYPTO_APK_PLL_SEL_MASK	= 3 << CRYPTO_APK_SEL_SHIFT,
+	CRYPTO_PLL_SEL_DPLL	= 0,
+	CRYPTO_PLL_SEL_VPLL0,
+	CRYPTO_PLL_SEL_VPLL1	= 0,
+	CRYPTO_APK_DIV_SHIFT	= 8,
+	CRYPTO_APK_DIV_MASK	= 0x1f << CRYPTO_APK_DIV_SHIFT,
+	CRYPTO_PLL_SEL_SHIFT	= 6,
+	CRYPTO_PLL_SEL_MASK	= 3 << CRYPTO_PLL_SEL_SHIFT,
+	CRYPTO_DIV_SHIFT	= 0,
+	CRYPTO_DIV_MASK		= 0x1f << CRYPTO_DIV_SHIFT,
+
 	/* CRU_CLK_SEL8_CON */
 	DCLK_VOP_SEL_SHIFT	= 14,
 	DCLK_VOP_SEL_MASK	= 0x3 << DCLK_VOP_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 28d2c2c657..57cf430dc0 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -696,6 +696,65 @@ static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	return rk3308_peri_get_clk(priv, clk_id);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3308_crypto_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		con = readl(&cru->clksel_con[7]);
+		div = (con & CRYPTO_DIV_MASK) >> CRYPTO_DIV_SHIFT;
+		parent = priv->vpll0_hz;
+		break;
+	case SCLK_CRYPTO_APK:
+		con = readl(&cru->clksel_con[7]);
+		div = (con & CRYPTO_APK_DIV_MASK) >> CRYPTO_APK_DIV_SHIFT;
+		parent = priv->vpll0_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_crypto_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO:
+		rk_clrsetreg(&cru->clksel_con[7],
+			     CRYPTO_PLL_SEL_MASK | CRYPTO_DIV_MASK,
+			     CRYPTO_PLL_SEL_VPLL0 << CRYPTO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_DIV_SHIFT);
+		break;
+	case SCLK_CRYPTO_APK:
+		rk_clrsetreg(&cru->clksel_con[7],
+			     CRYPTO_APK_PLL_SEL_MASK | CRYPTO_APK_DIV_MASK,
+			     CRYPTO_PLL_SEL_VPLL0 << CRYPTO_APK_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO_APK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -764,6 +823,12 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case PCLK_AUDIO:
 		rate = rk3308_audio_get_clk(priv, clk->id);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		rate = rk3308_crypto_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -832,6 +897,12 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_AUDIO:
 		rate = rk3308_audio_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO:
+	case SCLK_CRYPTO_APK:
+		ret = rk3308_crypto_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}

commit 187d951b8fecf328c5dd353239776ca64fcb4f2e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Dec 11 17:58:23 2018 +0800

    clk: rockchip: rk3399: support crypto clk setting
    
    Change-Id: I12cbaeac250f21d4cb05d8ef3ef0e9238cb3f911
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index cd2a85b6e2..ae8a9c7dbe 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -169,6 +169,15 @@ enum {
 	ACLK_PERILP0_DIV_CON_SHIFT	= 0,
 	ACLK_PERILP0_DIV_CON_MASK	= 0x1f,
 
+	/* CRU_CLK_SEL24_CON */
+	CRYPTO0_PLL_SEL_SHIFT		= 6,
+	CRYPTO0_PLL_SEL_MASK		= 3 << CRYPTO0_PLL_SEL_SHIFT,
+	CRYPTO_PLL_SEL_CPLL		= 0,
+	CRYPTO_PLL_SEL_GPLL,
+	CRYPTO_PLL_SEL_PPLL		= 0,
+	CRYPTO0_DIV_SHIFT		= 0,
+	CRYPTO0_DIV_MASK		= 0x1f << CRYPTO0_DIV_SHIFT,
+
 	/* CLKSEL_CON25 */
 	PCLK_PERILP1_DIV_CON_SHIFT	= 8,
 	PCLK_PERILP1_DIV_CON_MASK	= 0x7 << PCLK_PERILP1_DIV_CON_SHIFT,
@@ -183,6 +192,10 @@ enum {
 	CLK_SARADC_DIV_CON_SHIFT	= 8,
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
 	CLK_SARADC_DIV_CON_WIDTH	= 8,
+	CRYPTO1_PLL_SEL_SHIFT		= 6,
+	CRYPTO1_PLL_SEL_MASK		= 3 << CRYPTO1_PLL_SEL_SHIFT,
+	CRYPTO1_DIV_SHIFT		= 0,
+	CRYPTO1_DIV_MASK		= 0x1f << CRYPTO1_DIV_SHIFT,
 
 	/* CLKSEL_CON27 */
 	CLK_TSADC_SEL_X24M		= 0x0,
@@ -948,6 +961,65 @@ static ulong rk3399_tsadc_set_clk(struct rk3399_cru *cru, uint hz)
 	return rk3399_tsadc_get_clk(cru);
 }
 
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3399_crypto_get_clk(struct rk3399_clk_priv *priv, ulong clk_id)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case SCLK_CRYPTO0:
+		con = readl(&cru->clksel_con[24]);
+		div = (con & CRYPTO0_DIV_MASK) >> CRYPTO0_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case SCLK_CRYPTO1:
+		con = readl(&cru->clksel_con[26]);
+		div = (con & CRYPTO1_DIV_MASK) >> CRYPTO1_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3399_crypto_set_clk(struct rk3399_clk_priv *priv, ulong clk_id,
+				   ulong hz)
+{
+	struct rk3399_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
+	assert(src_clk_div - 1 <= 31);
+
+	/*
+	 * select gpll as crypto clock source and
+	 * set up dependent divisors for crypto clocks.
+	 */
+	switch (clk_id) {
+	case SCLK_CRYPTO0:
+		rk_clrsetreg(&cru->clksel_con[24],
+			     CRYPTO0_PLL_SEL_MASK | CRYPTO0_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO0_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO0_DIV_SHIFT);
+		break;
+	case SCLK_CRYPTO1:
+		rk_clrsetreg(&cru->clksel_con[26],
+			     CRYPTO1_PLL_SEL_MASK | CRYPTO1_DIV_MASK,
+			     CRYPTO_PLL_SEL_GPLL << CRYPTO1_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << CRYPTO1_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3399_crypto_get_clk(priv, clk_id);
+}
+#endif
+
 static ulong rk3399_clk_get_rate(struct clk *clk)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
@@ -998,6 +1070,12 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case SCLK_TSADC:
 		rate = rk3399_tsadc_get_clk(priv->cru);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO0:
+	case SCLK_CRYPTO1:
+		rate = rk3399_crypto_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -1069,6 +1147,12 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_TSADC:
 		ret = rk3399_tsadc_set_clk(priv->cru, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_CRYPTO0:
+	case SCLK_CRYPTO1:
+		ret = rk3399_crypto_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}

commit ce18b1fcdc0dc15df054d2c1b0970bc555ca56b4
Author: Weixin Zhou <zwx@rock-chips.com>
Date:   Thu Dec 13 20:08:58 2018 +0800

    rk3399pro: set wifi_26M to 24M and disable by default
    
    fix current leak due to wifi_26M clk enable by default
    
    Change-Id: I53cb7fbfa49a0cda29834bb2e2871aedde6b7d15
    Signed-off-by: Weixin Zhou <zwx@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index c131713d65..89b3b6d004 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -8,6 +8,7 @@
 #include <asm/armv8/mmu.h>
 #include <asm/arch/bootrom.h>
 #include <asm/arch/grf_rk3399.h>
+#include <asm/arch/cru_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
 #include <syscon.h>
@@ -71,6 +72,7 @@ void rockchip_stimer_init(void)
 #define GRF_BASE	0xff770000
 #define PMUGRF_BASE	0xff320000
 #define PMUSGRF_BASE	0xff330000
+#define PMUCRU_BASE	0xff750000
 
 int arch_cpu_init(void)
 {
@@ -101,6 +103,14 @@ int arch_cpu_init(void)
 	/* PWM3 select pwm3a io */
 	rk_clrreg(&pmugrf->soc_con0, 1 << 5);
 
+#if defined(CONFIG_ROCKCHIP_RK3399PRO)
+	struct rk3399_pmucru *pmucru = (void *)PMUCRU_BASE;
+
+	/* set wifi_26M to 24M and disabled by default */
+	writel(0x7f002000, &pmucru->pmucru_clksel[1]);
+	writel(0x01000100, &pmucru->pmucru_clkgate_con[0]);
+#endif
+
 	return 0;
 }
 

commit 0fd8dec7ce1771e13ce13ab4ff24023e33fea036
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Dec 12 18:04:52 2018 +0800

    clk: rockchip: rk3288: adjust gpll init_cfg
    
    This patch adjust gpll init nr/no/nf/bw values.
    keep them the same as kernel RK3066_PLL_RATE_NB(594000000, 2, 198, 4, 1)
    for better clock jitter when hdmi SI test.
    
    Change-Id: I781205d860945214f3f0957882223b8846c00773
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 941b619454..954dd25cfa 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -143,7 +143,7 @@ enum {
 
 /* Keep divisors as low as possible to reduce jitter and power usage */
 static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 4);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
 
 static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
@@ -167,7 +167,12 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 	rk_clrsetreg(&pll->con0, CLKR_MASK | PLL_OD_MASK,
 		     ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1));
 	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);
-	rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
+
+	/* adjust gpll bw for better clock jitter */
+	if (pll_id == 3)
+		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, 0);
+	else
+		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
 
 	udelay(10);
 

commit 885305022055a126eb2bcd25958c1b5a83a51801
Author: Zorro Liu <lyx@rock-chips.com>
Date:   Thu Dec 13 14:13:00 2018 +0800

    configs: rk3368: add fuel_gauge rk818
    
    Change-Id: I32141e3fb5d09964f82ceb15a63091bb812fa68c
    Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
index 796476dcd2..e3f6af0e3f 100644
--- a/configs/rk3368_defconfig
+++ b/configs/rk3368_defconfig
@@ -45,6 +45,7 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit ebc4f4b2f33d7731845c4ebd29c0af650a4ce1a4
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Dec 13 10:57:49 2018 +0800

    FROMRKLIST: android: avb: Fix AvbSlotVerifyData null pointer error
    
    AvbSlotVerifyData is empty when public key verification fails, and cannot
    access AvbSlotVerifyData.
    
    Change-Id: I0087891280dbce0d372a546ecccfd1c407e2bb1c
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit e61ad5cfca8ae28b34bef8829ab3eac3569f6289)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c24f9e8b85..05e211e367 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -503,7 +503,6 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	}
 
 	if (verify_result == AVB_SLOT_VERIFY_RESULT_OK ||
-	    verify_result == AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED ||
 	    (unlocked & LOCK_MASK)) {
 		int len = 0;
 		char *bootargs, *newbootargs;

commit 7c9fb6b4582d25e3086eee4fc67e9ccce5731c40
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Dec 13 10:03:10 2018 +0800

    FROMRKLOCAL: configs: rk3328_defconfig: enable embedded public key verify
    
    Change-Id: Idfc8a5418e09f5149c0e30d18ae83ed893b2ea65
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 0a3d1a3c3f..2af35b749b 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -127,6 +127,8 @@ CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
+CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE=y
+CONFIG_AVB_VBMETA_EMBEDDED_PUBLIC_KEY=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y

commit 9eeef3e0ca6e238f1792f41d339ebdb0fb474be1
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Dec 11 11:39:48 2018 +0800

    FROMRKLIST: libavb: AvbOps: Add embedded public key validation
    
    The validate_vbmeta_public_key checks if the given public key
    used to sign the vbmeta is trusted.
    Android Things has specific requirements and validation logic for the
    vbmeta public key.Android Things use public key metadata in vbmeta.
    Android use public key in vbmeta.
    
    Change-Id: Ia67dda65cf55824367790ba8de28b20de923493a
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit f48583121c96ae13b3624102632a6c095d82e51f)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 38fe2c6cfb..2787bef70e 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -42,6 +42,106 @@
 #include <android_avb/avb_atx_validate.h>
 #include <boot_rkimg.h>
 
+#if defined(CONFIG_AVB_VBMETA_EMBEDDED_PUBLIC_KEY)
+/**
+ * Internal builds use testkey_rsa4096.pem
+ * OEM should replace this Array with public key used to sign vbmeta.img
+ *
+ * openssl genpkey -algorithm RSA -pkeyopt rsa_keygen_bits:4096 \
+ * -outform PEM -out avb_rsa4096.pem
+ * avbtool extract_public_key  --key avb_rsa4096.pem --output avb_root_pub.bin
+ * xxd -i avb_root_pub.bin > avb_root_pub.h
+ */
+static const char avb_root_pub[] = {
+	0x00, 0x00, 0x10, 0x00, 0x55, 0xd9, 0x04, 0xad, 0xd8, 0x04, 0xaf, 0xe3,
+	0xd3, 0x84, 0x6c, 0x7e, 0x0d, 0x89, 0x3d, 0xc2, 0x8c, 0xd3, 0x12, 0x55,
+	0xe9, 0x62, 0xc9, 0xf1, 0x0f, 0x5e, 0xcc, 0x16, 0x72, 0xab, 0x44, 0x7c,
+	0x2c, 0x65, 0x4a, 0x94, 0xb5, 0x16, 0x2b, 0x00, 0xbb, 0x06, 0xef, 0x13,
+	0x07, 0x53, 0x4c, 0xf9, 0x64, 0xb9, 0x28, 0x7a, 0x1b, 0x84, 0x98, 0x88,
+	0xd8, 0x67, 0xa4, 0x23, 0xf9, 0xa7, 0x4b, 0xdc, 0x4a, 0x0f, 0xf7, 0x3a,
+	0x18, 0xae, 0x54, 0xa8, 0x15, 0xfe, 0xb0, 0xad, 0xac, 0x35, 0xda, 0x3b,
+	0xad, 0x27, 0xbc, 0xaf, 0xe8, 0xd3, 0x2f, 0x37, 0x34, 0xd6, 0x51, 0x2b,
+	0x6c, 0x5a, 0x27, 0xd7, 0x96, 0x06, 0xaf, 0x6b, 0xb8, 0x80, 0xca, 0xfa,
+	0x30, 0xb4, 0xb1, 0x85, 0xb3, 0x4d, 0xaa, 0xaa, 0xc3, 0x16, 0x34, 0x1a,
+	0xb8, 0xe7, 0xc7, 0xfa, 0xf9, 0x09, 0x77, 0xab, 0x97, 0x93, 0xeb, 0x44,
+	0xae, 0xcf, 0x20, 0xbc, 0xf0, 0x80, 0x11, 0xdb, 0x23, 0x0c, 0x47, 0x71,
+	0xb9, 0x6d, 0xd6, 0x7b, 0x60, 0x47, 0x87, 0x16, 0x56, 0x93, 0xb7, 0xc2,
+	0x2a, 0x9a, 0xb0, 0x4c, 0x01, 0x0c, 0x30, 0xd8, 0x93, 0x87, 0xf0, 0xed,
+	0x6e, 0x8b, 0xbe, 0x30, 0x5b, 0xf6, 0xa6, 0xaf, 0xdd, 0x80, 0x7c, 0x45,
+	0x5e, 0x8f, 0x91, 0x93, 0x5e, 0x44, 0xfe, 0xb8, 0x82, 0x07, 0xee, 0x79,
+	0xca, 0xbf, 0x31, 0x73, 0x62, 0x58, 0xe3, 0xcd, 0xc4, 0xbc, 0xc2, 0x11,
+	0x1d, 0xa1, 0x4a, 0xbf, 0xfe, 0x27, 0x7d, 0xa1, 0xf6, 0x35, 0xa3, 0x5e,
+	0xca, 0xdc, 0x57, 0x2f, 0x3e, 0xf0, 0xc9, 0x5d, 0x86, 0x6a, 0xf8, 0xaf,
+	0x66, 0xa7, 0xed, 0xcd, 0xb8, 0xed, 0xa1, 0x5f, 0xba, 0x9b, 0x85, 0x1a,
+	0xd5, 0x09, 0xae, 0x94, 0x4e, 0x3b, 0xcf, 0xcb, 0x5c, 0xc9, 0x79, 0x80,
+	0xf7, 0xcc, 0xa6, 0x4a, 0xa8, 0x6a, 0xd8, 0xd3, 0x31, 0x11, 0xf9, 0xf6,
+	0x02, 0x63, 0x2a, 0x1a, 0x2d, 0xd1, 0x1a, 0x66, 0x1b, 0x16, 0x41, 0xbd,
+	0xbd, 0xf7, 0x4d, 0xc0, 0x4a, 0xe5, 0x27, 0x49, 0x5f, 0x7f, 0x58, 0xe3,
+	0x27, 0x2d, 0xe5, 0xc9, 0x66, 0x0e, 0x52, 0x38, 0x16, 0x38, 0xfb, 0x16,
+	0xeb, 0x53, 0x3f, 0xe6, 0xfd, 0xe9, 0xa2, 0x5e, 0x25, 0x59, 0xd8, 0x79,
+	0x45, 0xff, 0x03, 0x4c, 0x26, 0xa2, 0x00, 0x5a, 0x8e, 0xc2, 0x51, 0xa1,
+	0x15, 0xf9, 0x7b, 0xf4, 0x5c, 0x81, 0x9b, 0x18, 0x47, 0x35, 0xd8, 0x2d,
+	0x05, 0xe9, 0xad, 0x0f, 0x35, 0x74, 0x15, 0xa3, 0x8e, 0x8b, 0xcc, 0x27,
+	0xda, 0x7c, 0x5d, 0xe4, 0xfa, 0x04, 0xd3, 0x05, 0x0b, 0xba, 0x3a, 0xb2,
+	0x49, 0x45, 0x2f, 0x47, 0xc7, 0x0d, 0x41, 0x3f, 0x97, 0x80, 0x4d, 0x3f,
+	0xc1, 0xb5, 0xbb, 0x70, 0x5f, 0xa7, 0x37, 0xaf, 0x48, 0x22, 0x12, 0x45,
+	0x2e, 0xf5, 0x0f, 0x87, 0x92, 0xe2, 0x84, 0x01, 0xf9, 0x12, 0x0f, 0x14,
+	0x15, 0x24, 0xce, 0x89, 0x99, 0xee, 0xb9, 0xc4, 0x17, 0x70, 0x70, 0x15,
+	0xea, 0xbe, 0xc6, 0x6c, 0x1f, 0x62, 0xb3, 0xf4, 0x2d, 0x16, 0x87, 0xfb,
+	0x56, 0x1e, 0x45, 0xab, 0xae, 0x32, 0xe4, 0x5e, 0x91, 0xed, 0x53, 0x66,
+	0x5e, 0xbd, 0xed, 0xad, 0xe6, 0x12, 0x39, 0x0d, 0x83, 0xc9, 0xe8, 0x6b,
+	0x6c, 0x2d, 0xa5, 0xee, 0xc4, 0x5a, 0x66, 0xae, 0x8c, 0x97, 0xd7, 0x0d,
+	0x6c, 0x49, 0xc7, 0xf5, 0xc4, 0x92, 0x31, 0x8b, 0x09, 0xee, 0x33, 0xda,
+	0xa9, 0x37, 0xb6, 0x49, 0x18, 0xf8, 0x0e, 0x60, 0x45, 0xc8, 0x33, 0x91,
+	0xef, 0x20, 0x57, 0x10, 0xbe, 0x78, 0x2d, 0x83, 0x26, 0xd6, 0xca, 0x61,
+	0xf9, 0x2f, 0xe0, 0xbf, 0x05, 0x30, 0x52, 0x5a, 0x12, 0x1c, 0x00, 0xa7,
+	0x5d, 0xcc, 0x7c, 0x2e, 0xc5, 0x95, 0x8b, 0xa3, 0x3b, 0xf0, 0x43, 0x2e,
+	0x5e, 0xdd, 0x00, 0xdb, 0x0d, 0xb3, 0x37, 0x99, 0xa9, 0xcd, 0x9c, 0xb7,
+	0x43, 0xf7, 0x35, 0x44, 0x21, 0xc2, 0x82, 0x71, 0xab, 0x8d, 0xaa, 0xb4,
+	0x41, 0x11, 0xec, 0x1e, 0x8d, 0xfc, 0x14, 0x82, 0x92, 0x4e, 0x83, 0x6a,
+	0x0a, 0x6b, 0x35, 0x5e, 0x5d, 0xe9, 0x5c, 0xcc, 0x8c, 0xde, 0x39, 0xd1,
+	0x4a, 0x5b, 0x5f, 0x63, 0xa9, 0x64, 0xe0, 0x0a, 0xcb, 0x0b, 0xb8, 0x5a,
+	0x7c, 0xc3, 0x0b, 0xe6, 0xbe, 0xfe, 0x8b, 0x0f, 0x7d, 0x34, 0x8e, 0x02,
+	0x66, 0x74, 0x01, 0x6c, 0xca, 0x76, 0xac, 0x7c, 0x67, 0x08, 0x2f, 0x3f,
+	0x1a, 0xa6, 0x2c, 0x60, 0xb3, 0xff, 0xda, 0x8d, 0xb8, 0x12, 0x0c, 0x00,
+	0x7f, 0xcc, 0x50, 0xa1, 0x5c, 0x64, 0xa1, 0xe2, 0x5f, 0x32, 0x65, 0xc9,
+	0x9c, 0xbe, 0xd6, 0x0a, 0x13, 0x87, 0x3c, 0x2a, 0x45, 0x47, 0x0c, 0xca,
+	0x42, 0x82, 0xfa, 0x89, 0x65, 0xe7, 0x89, 0xb4, 0x8f, 0xf7, 0x1e, 0xe6,
+	0x23, 0xa5, 0xd0, 0x59, 0x37, 0x79, 0x92, 0xd7, 0xce, 0x3d, 0xfd, 0xe3,
+	0xa1, 0x0b, 0xcf, 0x6c, 0x85, 0xa0, 0x65, 0xf3, 0x5c, 0xc6, 0x4a, 0x63,
+	0x5f, 0x6e, 0x3a, 0x3a, 0x2a, 0x8b, 0x6a, 0xb6, 0x2f, 0xbb, 0xf8, 0xb2,
+	0x4b, 0x62, 0xbc, 0x1a, 0x91, 0x25, 0x66, 0xe3, 0x69, 0xca, 0x60, 0x49,
+	0x0b, 0xf6, 0x8a, 0xbe, 0x3e, 0x76, 0x53, 0xc2, 0x7a, 0xa8, 0x04, 0x17,
+	0x75, 0xf1, 0xf3, 0x03, 0x62, 0x1b, 0x85, 0xb2, 0xb0, 0xef, 0x80, 0x15,
+	0xb6, 0xd4, 0x4e, 0xdf, 0x71, 0xac, 0xdb, 0x2a, 0x04, 0xd4, 0xb4, 0x21,
+	0xba, 0x65, 0x56, 0x57, 0xe8, 0xfa, 0x84, 0xa2, 0x7d, 0x13, 0x0e, 0xaf,
+	0xd7, 0x9a, 0x58, 0x2a, 0xa3, 0x81, 0x84, 0x8d, 0x09, 0xa0, 0x6a, 0xc1,
+	0xbb, 0xd9, 0xf5, 0x86, 0xac, 0xbd, 0x75, 0x61, 0x09, 0xe6, 0x8c, 0x3d,
+	0x77, 0xb2, 0xed, 0x30, 0x20, 0xe4, 0x00, 0x1d, 0x97, 0xe8, 0xbf, 0xc7,
+	0x00, 0x1b, 0x21, 0xb1, 0x16, 0xe7, 0x41, 0x67, 0x2e, 0xec, 0x38, 0xbc,
+	0xe5, 0x1b, 0xb4, 0x06, 0x23, 0x31, 0x71, 0x1c, 0x49, 0xcd, 0x76, 0x4a,
+	0x76, 0x36, 0x8d, 0xa3, 0x89, 0x8b, 0x4a, 0x7a, 0xf4, 0x87, 0xc8, 0x15,
+	0x0f, 0x37, 0x39, 0xf6, 0x6d, 0x80, 0x19, 0xef, 0x5c, 0xa8, 0x66, 0xce,
+	0x1b, 0x16, 0x79, 0x21, 0xdf, 0xd7, 0x31, 0x30, 0xc4, 0x21, 0xdd, 0x34,
+	0x5b, 0xd2, 0x1a, 0x2b, 0x3e, 0x5d, 0xf7, 0xea, 0xca, 0x05, 0x8e, 0xb7,
+	0xcb, 0x49, 0x2e, 0xa0, 0xe3, 0xf4, 0xa7, 0x48, 0x19, 0x10, 0x9c, 0x04,
+	0xa7, 0xf4, 0x28, 0x74, 0xc8, 0x6f, 0x63, 0x20, 0x2b, 0x46, 0x24, 0x26,
+	0x19, 0x1d, 0xd1, 0x2c, 0x31, 0x6d, 0x5a, 0x29, 0xa2, 0x06, 0xa6, 0xb2,
+	0x41, 0xcc, 0x0a, 0x27, 0x96, 0x09, 0x96, 0xac, 0x47, 0x65, 0x78, 0x68,
+	0x51, 0x98, 0xd6, 0xd8, 0xa6, 0x2d, 0xa0, 0xcf, 0xec, 0xe2, 0x74, 0xf2,
+	0x82, 0xe3, 0x97, 0xd9, 0x7e, 0xd4, 0xf8, 0x0b, 0x70, 0x43, 0x3d, 0xb1,
+	0x7b, 0x97, 0x80, 0xd6, 0xcb, 0xd7, 0x19, 0xbc, 0x63, 0x0b, 0xfd, 0x4d,
+	0x88, 0xfe, 0x67, 0xac, 0xb8, 0xcc, 0x50, 0xb7, 0x68, 0xb3, 0x5b, 0xd6,
+	0x1e, 0x25, 0xfc, 0x5f, 0x3c, 0x8d, 0xb1, 0x33, 0x7c, 0xb3, 0x49, 0x01,
+	0x3f, 0x71, 0x55, 0x0e, 0x51, 0xba, 0x61, 0x26, 0xfa, 0xea, 0xe5, 0xb5,
+	0xe8, 0xaa, 0xcf, 0xcd, 0x96, 0x9f, 0xd6, 0xc1, 0x5f, 0x53, 0x91, 0xad,
+	0x05, 0xde, 0x20, 0xe7, 0x51, 0xda, 0x5b, 0x95, 0x67, 0xed, 0xf4, 0xee,
+	0x42, 0x65, 0x70, 0x13, 0x0b, 0x70, 0x14, 0x1c, 0xc9, 0xe0, 0x19, 0xca,
+	0x5f, 0xf5, 0x1d, 0x70, 0x4b, 0x6c, 0x06, 0x74, 0xec, 0xb5, 0x2e, 0x77,
+	0xe1, 0x74, 0xa1, 0xa3, 0x99, 0xa0, 0x85, 0x9e, 0xf1, 0xac, 0xd8, 0x7e
+};
+#endif
+
 static void byte_to_block(int64_t *offset,
 			  size_t *num_bytes,
 			  lbaint_t *offset_blk,
@@ -163,6 +263,18 @@ validate_vbmeta_public_key(AvbOps *ops,
 /* remain AVB_VBMETA_PUBLIC_KEY_VALIDATE to compatible legacy code */
 #if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) || \
     defined(AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+#if defined(CONFIG_AVB_VBMETA_EMBEDDED_PUBLIC_KEY)
+	if (!public_key_length || !out_is_trusted || !public_key_data) {
+		printf("%s: Invalid parameters\n", __func__);
+		return AVB_IO_RESULT_ERROR_IO;
+	}
+
+	*out_is_trusted = false;
+	if (public_key_length != sizeof(avb_root_pub))
+		return AVB_IO_RESULT_ERROR_IO;
+	if (memcmp(public_key_data, avb_root_pub, public_key_length) == 0)
+		*out_is_trusted = true;
+#else
 	if (out_is_trusted) {
 		avb_atx_validate_vbmeta_public_key(ops,
 						   public_key_data,
@@ -171,10 +283,12 @@ validate_vbmeta_public_key(AvbOps *ops,
 						   public_key_metadata_length,
 						   out_is_trusted);
 	}
+#endif /* CONFIG_AVB_VBMETA_EMBEDDED_KEY */
 #else
+	printf("%s not enabled yet\n", __func__);
 	if (out_is_trusted)
 		*out_is_trusted = true;
-#endif
+#endif /* CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE */
 	return AVB_IO_RESULT_OK;
 }
 

commit 22fbfc386ec72b43a097cf4c19b38565b464697c
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Dec 13 08:51:36 2018 +0800

    FROMRKLIST: avb: Kconfig: add config AVB_VBMETA_EMBEDDED_PUBLIC_KEY
    
    Change-Id: Ic1947714659776d395421842a3ab0b0abb33a9ac
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit e83d630fc3e5dbbab52e5787c0487bee8fe9211f)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index 8107902213..4d5c60bc77 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -7,10 +7,16 @@ config AVB_LIBAVB_USER
 	  to fastboot and kernel.
 
 config AVB_VBMETA_PUBLIC_KEY_VALIDATE
-        bool "Support vbmeta public key validate"
-        depends on AVB_LIBAVB_USER
-        help
-          support vbmeta public key validate.
+	bool "Support vbmeta public key validate"
+	depends on AVB_LIBAVB_USER
+	help
+	  support vbmeta public key validate.
+
+config AVB_VBMETA_EMBEDDED_PUBLIC_KEY
+	bool "Support vbmeta embedded public key"
+	depends on AVB_VBMETA_PUBLIC_KEY_VALIDATE
+	help
+	  support vbmeta embedded key.
 
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"

commit c98762088531a55d3ce8c5c1a80857755ad84938
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 16:02:12 2018 +0800

    rockchip: make avb boot flow uninterruptable
    
    - only allow "boot_android" as bootcmd;
    - enter rockusb or fastboot when boot failed;
    - don't allow ctrl+c to enter hush;
    
    Change-Id: I7a67f4b738ed78370f19fe2c8c920a5abc104b4b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    (cherry picked from commit caed6b4f82005b8727fd369a0173474570fc67f3)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index 260236b998..399f001f27 100644
--- a/common/console.c
+++ b/common/console.c
@@ -412,6 +412,13 @@ int getc(void)
 
 int tstc(void)
 {
+/* Don't allow drivers call tstc() to do some "exit" event(maybe enter hush) */
+#if defined(CONFIG_ARCH_ROCKCHIP) && \
+    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
+	return 0;
+#endif
+
 #ifdef CONFIG_DISABLE_CONSOLE
 	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return 0;
@@ -594,6 +601,12 @@ static int ctrlc_disabled = 0;	/* see disable_ctrl() */
 static int ctrlc_was_pressed = 0;
 int ctrlc(void)
 {
+/* Don't allow drivers call ctrlc() to do some "exit" event(maybe enter hush) */
+#if defined(CONFIG_ARCH_ROCKCHIP) && \
+    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+	return 0;
+#endif
+
 #ifndef CONFIG_SANDBOX
 	if (!ctrlc_disabled && gd->have_console) {
 		if (tstc()) {
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index c8dfcb4248..0a3254596b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -104,11 +104,18 @@
 		"setenv devtype spinor; setenv devnum 1;" \
 	"fi; \0"
 
+#ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
+#define RKIMG_BOOTCOMMAND \
+	"boot_android ${devtype} ${devnum};" \
+	"echo AVB boot failed and enter rockusb or fastboot!;" \
+	"rockusb 0 ${devtype} ${devnum};" \
+	"fastboot usb 0;"
+#else
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;" \
 	"run distro_bootcmd;"
-
+#endif
 #endif
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 0838880ef9..38fe2c6cfb 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -160,7 +160,9 @@ validate_vbmeta_public_key(AvbOps *ops,
 			   size_t public_key_metadata_length,
 			   bool *out_is_trusted)
 {
-#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+/* remain AVB_VBMETA_PUBLIC_KEY_VALIDATE to compatible legacy code */
+#if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) || \
+    defined(AVB_VBMETA_PUBLIC_KEY_VALIDATE)
 	if (out_is_trusted) {
 		avb_atx_validate_vbmeta_public_key(ops,
 						   public_key_data,

commit 2f6591b1f8f622e91d18c3c324dde1067e425f0e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 16:01:41 2018 +0800

    avb: Kconfig: add config AVB_VBMETA_PUBLIC_KEY_VALIDATE
    
    Change-Id: I2f9c74a8427874066e1bb7ac7b774a0fb3befba9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    (cherry picked from commit a349065b9f5b6f1ca51a515ad271634a4cddf258)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index c27412fcba..8107902213 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -6,6 +6,12 @@ config AVB_LIBAVB_USER
 	  so on. And it can provide some a/b and avb information
 	  to fastboot and kernel.
 
+config AVB_VBMETA_PUBLIC_KEY_VALIDATE
+        bool "Support vbmeta public key validate"
+        depends on AVB_LIBAVB_USER
+        help
+          support vbmeta public key validate.
+
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"
 	help

commit 2c16899d6009fb92788a60360d8b79913980a150
Author: David.Wu <david.wu@rock-chips.com>
Date:   Wed Dec 12 21:00:02 2018 +0800

    pinctrl: rockchip: Fix the cleaning of drv/pull type mask
    
    Where need to clean the special mask for rockchip_perpin_drv_list
    and rockchip_pull_list.
    
    Change-Id: I98bac7768aa0570c12c947913ef2ea91ae303f95
    Signed-off-by: David.Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index e7f3d69c84..70ad8640d7 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2157,7 +2157,8 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 	int reg, ret, i;
 	u32 data, rmask_bits, temp;
 	u8 bit;
-	int drv_type = bank->drv[pin_num / 8].drv_type & DRV_TYPE_IO_MASK;
+	/* Where need to clean the special mask for rockchip_perpin_drv_list */
+	int drv_type = bank->drv[pin_num / 8].drv_type & (~DRV_TYPE_IO_MASK);
 
 	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
 	      pin_num, strength);
@@ -2292,7 +2293,11 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RK3308:
 	case RK3368:
 	case RK3399:
-		pull_type = bank->pull_type[pin_num / 8] & PULL_TYPE_IO_MASK;
+		/*
+		 * Where need to clean the special mask for
+		 * rockchip_pull_list.
+		 */
+		pull_type = bank->pull_type[pin_num / 8] & (~PULL_TYPE_IO_MASK);
 		ret = -EINVAL;
 		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
 			i++) {

commit c9eb255473a77824de7372284c116e99bc89097f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 12 09:38:40 2018 +0800

    make.sh: add debug command to enable bootstage timing report
    
    Change-Id: I3550de5beb985932fff294953bda4b315805b7ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 1c8c5c9f8a..cba6591bdb 100755
--- a/make.sh
+++ b/make.sh
@@ -421,6 +421,7 @@ debug_command()
 			echo "    9. armv7 start.S: print entry warning"
 			echo "   10. armv8 start.S: print entry warning"
 			echo "   11. firmware bootflow debug() -> printf()"
+			echo "   12. bootstage timing report"
 			echo
 			echo "Enabled: "
 			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
@@ -476,6 +477,11 @@ debug_command()
 			sed -i 's/\<debug\>/printf/g' common/image-android.c
 			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
 			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
+		elif [ "${opt}" = '12' ]; then
+			sed -i '$a\CONFIG_BOOTSTAGE=y\' ${OUTDIR}/.config
+			sed -i '$a\CONFIG_BOOTSTAGE_REPORT=y\' ${OUTDIR}/.config
+			sed -i '$a\CONFIG_CMD_BOOTSTAGE=y\' ${OUTDIR}/.config
+			echo "DEBUG [12]: bootstage timing report"
 		fi
 		echo
 }

commit caed6b4f82005b8727fd369a0173474570fc67f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 16:02:12 2018 +0800

    rockchip: make avb boot flow uninterruptable
    
    - only allow "boot_android" as bootcmd;
    - enter rockusb or fastboot when boot failed;
    - don't allow ctrl+c to enter hush;
    
    Change-Id: I7a67f4b738ed78370f19fe2c8c920a5abc104b4b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index 260236b998..399f001f27 100644
--- a/common/console.c
+++ b/common/console.c
@@ -412,6 +412,13 @@ int getc(void)
 
 int tstc(void)
 {
+/* Don't allow drivers call tstc() to do some "exit" event(maybe enter hush) */
+#if defined(CONFIG_ARCH_ROCKCHIP) && \
+    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) && \
+    defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY <= 0)
+	return 0;
+#endif
+
 #ifdef CONFIG_DISABLE_CONSOLE
 	if (gd->flags & GD_FLG_DISABLE_CONSOLE)
 		return 0;
@@ -594,6 +601,12 @@ static int ctrlc_disabled = 0;	/* see disable_ctrl() */
 static int ctrlc_was_pressed = 0;
 int ctrlc(void)
 {
+/* Don't allow drivers call ctrlc() to do some "exit" event(maybe enter hush) */
+#if defined(CONFIG_ARCH_ROCKCHIP) && \
+    defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE)
+	return 0;
+#endif
+
 #ifndef CONFIG_SANDBOX
 	if (!ctrlc_disabled && gd->have_console) {
 		if (tstc()) {
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index a92a46d783..189e23e03c 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -123,11 +123,18 @@
 		"setenv devtype spinor; setenv devnum 1;" \
 	"fi; \0"
 
+#ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE
+#define RKIMG_BOOTCOMMAND \
+	"boot_android ${devtype} ${devnum};" \
+	"echo AVB boot failed and enter rockusb or fastboot!;" \
+	"rockusb 0 ${devtype} ${devnum};" \
+	"fastboot usb 0;"
+#else
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;" \
 	"run distro_bootcmd;"
-
+#endif
 #endif
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 0838880ef9..38fe2c6cfb 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -160,7 +160,9 @@ validate_vbmeta_public_key(AvbOps *ops,
 			   size_t public_key_metadata_length,
 			   bool *out_is_trusted)
 {
-#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+/* remain AVB_VBMETA_PUBLIC_KEY_VALIDATE to compatible legacy code */
+#if defined(CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE) || \
+    defined(AVB_VBMETA_PUBLIC_KEY_VALIDATE)
 	if (out_is_trusted) {
 		avb_atx_validate_vbmeta_public_key(ops,
 						   public_key_data,

commit a349065b9f5b6f1ca51a515ad271634a4cddf258
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 16:01:41 2018 +0800

    avb: Kconfig: add config AVB_VBMETA_PUBLIC_KEY_VALIDATE
    
    Change-Id: I2f9c74a8427874066e1bb7ac7b774a0fb3befba9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
index c27412fcba..8107902213 100755
--- a/lib/avb/libavb_user/Kconfig
+++ b/lib/avb/libavb_user/Kconfig
@@ -6,6 +6,12 @@ config AVB_LIBAVB_USER
 	  so on. And it can provide some a/b and avb information
 	  to fastboot and kernel.
 
+config AVB_VBMETA_PUBLIC_KEY_VALIDATE
+        bool "Support vbmeta public key validate"
+        depends on AVB_LIBAVB_USER
+        help
+          support vbmeta public key validate.
+
 config SPL_AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware for spl"
 	help

commit c8df86e75095204192a37341862beb06ea21ec85
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 11:31:59 2018 +0800

    fuel gauge: rk816/8: add battery existence report
    
    Change-Id: I69fda35bd918d167aff7ac6d5d0d75ba6aa38372
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 49f947ed4a..904096e7a0 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -1290,6 +1290,13 @@ out:
 	rk816_bat_debug_info(di);
 }
 
+static int rk816_bat_bat_is_exit(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+
+	return is_rk816_bat_exist(di);
+}
+
 static int rk816_bat_update_get_soc(struct udevice *dev)
 {
 	struct battery_priv *di = dev_get_priv(dev);
@@ -1343,6 +1350,7 @@ static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {
+	.bat_is_exist = rk816_bat_bat_is_exit,
 	.get_soc = rk816_bat_update_get_soc,
 	.get_voltage = rk816_bat_update_get_voltage,
 	.get_current = rk816_bat_update_get_current,
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index 34b1cbbe69..b45388020a 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -1665,6 +1665,13 @@ static int rk818_bat_update_temperature(struct battery_priv *di)
 	return 0;
 }
 
+static int rk818_bat_bat_is_exit(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+
+	return is_rk818_bat_exist(di);
+}
+
 static int rk818_bat_update_get_soc(struct udevice *dev)
 {
 	struct battery_priv *di = dev_get_priv(dev);
@@ -1731,6 +1738,7 @@ static bool rk818_bat_update_get_chrg_online(struct udevice *dev)
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {
+	.bat_is_exist = rk818_bat_bat_is_exit,
 	.get_soc = rk818_bat_update_get_soc,
 	.get_voltage = rk818_bat_update_get_voltage,
 	.get_current = rk818_bat_update_get_current,

commit 61a7a6d6a166251c63db906469589ffd4e3f643e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 10:19:59 2018 +0800

    power: charge animation: add battery existence check
    
    Change-Id: I8451d3069c11faa91d6b0087a764685cdf4f1bbf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index a4854aa401..9d147de49a 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -342,6 +342,11 @@ static int charge_animation_show(struct udevice *dev)
  * 6. Enter charge !
  *
  */
+	if (!fuel_gauge_bat_is_exist(fg)) {
+		printf("Exit charge: battery is not exist\n");
+		return 0;
+	}
+
 	/* Extrem low power charge */
 	ret = charge_extrem_low_power(dev);
 	if (ret < 0) {
@@ -350,7 +355,7 @@ static int charge_animation_show(struct udevice *dev)
 	}
 
 	/* If there is preboot command, exit */
-	if (preboot) {
+	if (preboot && !strstr(preboot, "dvfs")) {
 		printf("Exit charge: due to preboot cmd '%s'\n", preboot);
 		return 0;
 	}
diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index 101f1d7132..8d7d400109 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -10,6 +10,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int fuel_gauge_bat_is_exist(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->bat_is_exist)
+		return -ENOSYS;
+
+	return ops->bat_is_exist(dev);
+}
+
 int fuel_gauge_get_current(struct udevice *dev)
 {
 	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
index 9473e6220a..cf9ef8be7e 100644
--- a/include/power/fuel_gauge.h
+++ b/include/power/fuel_gauge.h
@@ -8,12 +8,14 @@
 #define _FUEL_GAUGE_H_
 
 struct dm_fuel_gauge_ops {
+	int (*bat_is_exist)(struct udevice *dev);
 	int (*get_soc)(struct udevice *dev);
 	int (*get_voltage)(struct udevice *dev);
 	int (*get_current)(struct udevice *dev);
 	bool (*get_chrg_online)(struct udevice *dev);
 };
 
+int fuel_gauge_bat_is_exist(struct udevice *dev);
 int fuel_gauge_get_soc(struct udevice *dev);
 int fuel_gauge_get_voltage(struct udevice *dev);
 int fuel_gauge_get_current(struct udevice *dev);

commit d60cbc66d7c528768b9e82e247a7f7c83d4b0514
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 11 09:31:27 2018 +0800

    rockchip: add rk3399pro project build
    
    build command: ./make.sh rk3399pro
    
    Change-Id: I50d4aba026d35ff7ed73257dc1edcb50426aa64f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2a2991b4e2..c16ad23909 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -337,6 +337,9 @@ config ROCKCHIP_RK3399
 
 if ROCKCHIP_RK3399
 
+config ROCKCHIP_RK3399PRO
+	bool "Support Rockchip RK3399Pro"
+
 config TPL_LDSCRIPT
 	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
 
diff --git a/configs/rk3399pro_defconfig b/configs/rk3399pro_defconfig
new file mode 100644
index 0000000000..bde4f091dd
--- /dev/null
+++ b/configs/rk3399pro_defconfig
@@ -0,0 +1,122 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_RK3399PRO=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y
diff --git a/make.sh b/make.sh
index 20e8def0f3..1c8c5c9f8a 100755
--- a/make.sh
+++ b/make.sh
@@ -334,6 +334,8 @@ select_chip_info()
 			&& RKCHIP=RK3326
 		grep '^CONFIG_ROCKCHIP_RK3128X=y' ${OUTDIR}/.config >/dev/null \
 			&& RKCHIP=RK3128X
+		grep '^CONFIG_ROCKCHIP_RK3399PRO=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3399PRO
 	else
 		echo "Can't get Rockchip SoC definition in .config"
 		exit 1

commit 4dcd3d7498cb4a6e1921f386e6cab618a70084b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 17:46:30 2018 +0800

    rockchip: px30: enable wide temperature dvfs
    
    Change-Id: I0584f1c0d01b017bbc949af38065f9f521c361f4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index b7a0aab7d1..5ef64e2c0c 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -64,6 +64,8 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
@@ -82,6 +84,8 @@ CONFIG_I2S_ROCKCHIP=y
 CONFIG_SOUND_RK817=y
 CONFIG_SOUND_ROCKCHIP=y
 CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index cea2d2e5e9..65335ce05d 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -40,7 +40,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
+#ifdef CONFIG_DM_DVFS
+#define CONFIG_PREBOOT			"dvfs repeat"
+#else
 #define CONFIG_PREBOOT
+#endif
 
 #ifndef CONFIG_SPL_BUILD
 

commit 60137d8147021b71d1c3d01a415dbf5b9f8d6033
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 16:51:06 2018 +0800

    rockchip: rk3308-aarch32: enable wide temperature dvfs
    
    Change-Id: I743498049ad054e163dc700bbf4899eb1eec673b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 70c10d9eb0..2ee0ec4c6c 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -47,6 +47,8 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_DVFS=y
+CONFIG_ROCKCHIP_WTEMP_DVFS=y
 CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
@@ -62,6 +64,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
+CONFIG_ROCKCHIP_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 9a2fae5699..66ed3bc7ad 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -36,7 +36,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
+#ifdef CONFIG_DM_DVFS
+#define CONFIG_PREBOOT			"dvfs repeat"
+#else
 #define CONFIG_PREBOOT
+#endif
 
 #ifndef CONFIG_SPL_BUILD
 

commit 3acf4edfaf658c0ca070e85ba732e39fa2179868
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 18:42:21 2018 +0800

    rockchip: board: add dvfs init
    
    Change-Id: I24bff1e8528f0e8ad17718a47d3f725a9e5a5c8c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 0117c22621..e86191fd00 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -20,6 +20,9 @@
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 #include <power/charge_display.h>
 #endif
+#ifdef CONFIG_DM_DVFS
+#include <dvfs.h>
+#endif
 #ifdef CONFIG_DM_REGULATOR
 #include <power/regulator.h>
 #endif
@@ -231,6 +234,10 @@ int board_init(void)
 #endif
 	set_armclk_rate();
 
+#ifdef CONFIG_DM_DVFS
+	dvfs_init(true);
+#endif
+
 	return rk_board_init();
 }
 

commit 0eea0d250e65f61dbae608a25eb07e26567ef430
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 17:43:25 2018 +0800

    dm: add dvfs uclass and wide temperature dvfs support
    
    - add dvfs uclass;
    - add dvfs command;
    - add a simple wide temperature dvfs driver.
    
    About wide temperature dvfs driver policy, see description in:
    drivers/power/dvfs/rockchip_wtemp_dvfs.c
    
    Change-Id: I36a8de6e47f8375bf1795b794c77d96b4571a361
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/Makefile b/Makefile
index b3f61a2eac..7060da1c5f 100644
--- a/Makefile
+++ b/Makefile
@@ -671,7 +671,8 @@ libs-y += drivers/power/ \
 	drivers/power/mfd/ \
 	drivers/power/pmic/ \
 	drivers/power/battery/ \
-	drivers/power/regulator/
+	drivers/power/regulator/ \
+	drivers/power/dvfs/
 libs-y += drivers/spi/
 libs-$(CONFIG_FMAN_ENET) += drivers/net/fm/
 libs-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 5aeedebee5..23d8425cc1 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1296,6 +1296,16 @@ config CMD_CHARGE_DISPLAY
 	help
 	  Support U-Boot charge display.
 
+config CMD_DVFS
+	bool "Enable Driver Model DVFS command"
+	depends on DM_DVFS
+	default y
+	help
+	  Support dvfs policy apply API
+	  User interface features:
+	  - dvfs            - apply dvfs policy once
+	  - dvfs repeat     - repeat apply dvfs policy until achieve the target temperature
+
 endmenu
 
 menu "Security commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index d4ceacf98e..e6307041cb 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -158,6 +158,7 @@ obj-$(CONFIG_CMD_ETHSW) += ethsw.o
 # Power
 obj-$(CONFIG_CMD_PMIC) += pmic.o
 obj-$(CONFIG_CMD_REGULATOR) += regulator.o
+obj-$(CONFIG_CMD_DVFS) += dvfs.o
 
 obj-$(CONFIG_CMD_BLOB) += blob.o
 endif # !CONFIG_SPL_BUILD
diff --git a/cmd/dvfs.c b/cmd/dvfs.c
new file mode 100644
index 0000000000..73a6f06a1e
--- /dev/null
+++ b/cmd/dvfs.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <console.h>
+#include <dvfs.h>
+
+static int do_dvfs(cmd_tbl_t *cmdtp, int flag,
+		   int argc, char *const argv[])
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
+	if (ret) {
+		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	if (argc == 1)
+		return dvfs_apply(dev);
+	else if (!strcmp(argv[1], "repeat"))
+		return dvfs_repeat_apply(dev);
+	else
+		return CMD_RET_USAGE;
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	dvfs, 2, 1, do_dvfs,
+	"Start DVFS policy",
+	"dvfs - apply dvfs policy once\n"
+	"dvfs repeat - repeat apply dvfs policy until achieve the target temperature"
+);
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index d1eac1757f..adf5ff58bf 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -8,6 +8,8 @@ source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
 
+source "drivers/power/dvfs/Kconfig"
+
 config DM_CHARGE_DISPLAY
 	bool "Enable driver model for charge display support"
 	depends on DM
diff --git a/drivers/power/dvfs/Kconfig b/drivers/power/dvfs/Kconfig
new file mode 100644
index 0000000000..0a3580e0b5
--- /dev/null
+++ b/drivers/power/dvfs/Kconfig
@@ -0,0 +1,11 @@
+config DM_DVFS
+	bool "Enable Driver Model for DVFS drivers (UCLASS_DVFS)"
+	depends on DM
+	---help---
+	This config enables the driver-model DVFS support.
+
+config ROCKCHIP_WTEMP_DVFS
+	bool "Enable rockchip wide temperature dvfs policy"
+	depends on DM_DVFS && ROCKCHIP_THERMAL
+	help
+	  This enable support wide temperature dvfs for rockchip platforms.
diff --git a/drivers/power/dvfs/Makefile b/drivers/power/dvfs/Makefile
new file mode 100644
index 0000000000..1734cd8007
--- /dev/null
+++ b/drivers/power/dvfs/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-$(CONFIG_DM_DVFS) += dvfs-uclass.o
+obj-$(CONFIG_ROCKCHIP_WTEMP_DVFS) += rockchip_wtemp_dvfs.o
+
diff --git a/drivers/power/dvfs/dvfs-uclass.c b/drivers/power/dvfs/dvfs-uclass.c
new file mode 100644
index 0000000000..abd04dcb5e
--- /dev/null
+++ b/drivers/power/dvfs/dvfs-uclass.c
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <console.h>
+#include <dvfs.h>
+
+int dvfs_apply(struct udevice *dev)
+{
+	const struct dm_dvfs_ops *ops = device_get_ops(dev);
+
+	if (!ops->apply)
+		return -ENOSYS;
+
+	return ops->apply(dev);
+}
+
+int dvfs_repeat_apply(struct udevice *dev)
+{
+	const struct dm_dvfs_ops *ops = device_get_ops(dev);
+
+	if (!ops->repeat_apply)
+		return -ENOSYS;
+
+	return ops->repeat_apply(dev);
+}
+
+int dvfs_init(bool apply)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_DVFS, 0, &dev);
+	if (ret) {
+		printf("DVFS: Get dvfs device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	if (apply)
+		return dvfs_apply(dev);
+
+	return 0;
+}
+
+UCLASS_DRIVER(dvfs) = {
+	.id	= UCLASS_DVFS,
+	.name	= "dvfs",
+};
diff --git a/drivers/power/dvfs/rockchip_wtemp_dvfs.c b/drivers/power/dvfs/rockchip_wtemp_dvfs.c
new file mode 100644
index 0000000000..d7fe67145c
--- /dev/null
+++ b/drivers/power/dvfs/rockchip_wtemp_dvfs.c
@@ -0,0 +1,639 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <dm.h>
+#include <clk.h>
+#include <dvfs.h>
+#include <thermal.h>
+#include <linux/list.h>
+
+#include <asm/arch/clock.h>
+#include <power/regulator.h>
+#ifdef CONFIG_ROCKCHIP_DMC
+#include <asm/arch/rockchip_dmc.h>
+#endif
+
+/*
+ * # This is a simple wide temperature(ie. wtemp) dvfs driver, the policy is:
+ *
+ * 1. U-Boot parse cpu/dmc opp table from kernel dtb, anyone of
+ *    "rockchip,low-temp = <...>" and "rockchip,high-temp = <...>" present in
+ *    cpu/dmc nodes means wtemp is enabled.
+ *
+ *    1.1. When temperature trigger "rockchip,low-temp", increase 50mv voltage
+ *         as target voltage. If target voltage is over "rockchip,max-volt",
+ *         just set "rockchip,max-volt" as target voltage and lower 2 level freq,
+ *
+ *    1.2. When temperature trigger "rockchip,high-temp", just apply opp table[0]
+ *         voltage and freq.
+ *
+ * 2. U-Boot parse cpu/dmc thermal zone "trip-point-0" temperature from kernel
+ *    dtb, and apply the same rules as above [1.2] policy.
+ *
+ *
+ * # The dvfs policy apply moment is:
+ *
+ * 1. Appy it after clk and regulator drivers setup;
+ * 2. Repeat apply it by CONFIG_PREBOOT command until achieve the target
+ *    temperature. user should add: #define CONFIG_PREBOOT "dvfs repeat" and
+ *    assign repeat property in dts:
+ *
+ *	uboot-wide-temperature {
+ *		status = "okay";
+ *		compatible = "rockchip,uboot-wide-temperature";
+ *
+ *		cpu,low-temp-repeat;
+ *		cpu,high-temp-repeat;
+ *		dmc,low-temp-repeat;
+ *		dmc,high-temp-repeat;
+ *	};
+ */
+
+#define FDT_PATH_CPUS		"/cpus"
+#define FDT_PATH_DMC		"/dmc"
+#define FDT_PATH_THREMAL_TRIP_POINT0	\
+	"/thermal-zones/soc-thermal/trips/trip-point-0"
+#define FDT_PATH_THREMAL_COOLING_MAPS	\
+	"/thermal-zones/soc-thermal/cooling-maps"
+
+#define OPP_TABLE_MAX		20
+#define RATE_LOWER_LEVEL_N	2
+#define DIFF_VOLTAGE_UV		50000
+#define TEMP_STRING_LEN		12
+#define REPEAT_PERIOD_US	1000000
+
+static LIST_HEAD(pm_e_head);
+
+enum pm_id {
+	PM_CPU,
+	PM_DMC,
+};
+
+enum pm_event {
+	PM_EVT_NONE = 0x0,
+	PM_EVT_LOW  = 0x1,
+	PM_EVT_HIGH = 0x2,
+	PM_EVT_BOTH = PM_EVT_LOW | PM_EVT_HIGH,
+};
+
+struct opp_table {
+	u64 hz;
+	u32 uv;
+};
+
+struct lmt_param {
+	int low_temp;		/* milli degree */
+	int high_temp;		/* milli degree */
+	int tz_temp;		/* milli degree */
+	int max_volt;		/* uV */
+
+	bool htemp_repeat;
+	bool ltemp_repeat;
+
+	bool ltemp_limit;
+	bool htemp_limit;
+	bool tztemp_limit;
+};
+
+struct pm_element {
+	int id;
+	const char *name;
+	const char *supply_name;
+	int volt_diff;
+	u32 opp_nr;
+	struct opp_table opp[OPP_TABLE_MAX];
+	struct lmt_param lmt;
+	struct udevice *supply;
+	struct clk clk;
+	struct list_head node;
+};
+
+struct wtemp_dvfs_priv {
+	struct udevice *thermal;
+	struct pm_element *cpu;
+	struct pm_element *dmc;
+};
+
+static struct pm_element pm_cpu = {
+	.id		= PM_CPU,
+	.name		= "cpu",
+	.supply_name	= "cpu-supply",
+	.volt_diff	= DIFF_VOLTAGE_UV,
+};
+
+static struct pm_element pm_dmc = {
+	.id		= PM_DMC,
+	.name		= "dmc",
+	.supply_name	= "center-supply",
+	.volt_diff	= DIFF_VOLTAGE_UV,
+};
+
+static void temp2string(int temp, char *data, int len)
+{
+	int decimal_point;
+	int integer;
+
+	integer = abs(temp) / 1000;
+	decimal_point = abs(temp) % 1000;
+	snprintf(data, len, "%s%d.%d",
+		 temp < 0 ? "-" : "", integer, decimal_point);
+}
+
+static ulong wtemp_get_lowlevel_rate(ulong rate, u32 level,
+				     struct pm_element *e)
+{
+	struct opp_table *opp;
+	int i, count, idx = 0;
+
+	opp = e->opp;
+	count = e->opp_nr;
+
+	for (i = 0; i < count; i++) {
+		if (opp[i].hz >= rate) {
+			idx = (i <= level) ? 0 : i - level;
+			break;
+		}
+	}
+
+	return opp[idx].hz;
+}
+
+static ulong __wtemp_clk_get_rate(struct pm_element *e)
+{
+#ifdef CONFIG_ROCKCHIP_DMC
+	if (e->id == PM_DMC)
+		return rockchip_ddrclk_sip_recalc_rate_v2();
+#endif
+	return clk_get_rate(&e->clk);
+}
+
+static ulong __wtemp_clk_set_rate(struct pm_element *e, ulong rate)
+{
+#ifdef CONFIG_ROCKCHIP_DMC
+	if (e->id == PM_DMC) {
+		rate = rockchip_ddrclk_sip_round_rate_v2(rate);
+		rockchip_ddrclk_sip_set_rate_v2(rate);
+	} else
+#endif
+		clk_set_rate(&e->clk, rate);
+
+	return rate;
+}
+
+static int __wtemp_regulator_get_value(struct pm_element *e)
+{
+	return regulator_get_value(e->supply);
+}
+
+static int __wtemp_regulator_set_value(struct pm_element *e, int value)
+{
+	return regulator_set_value(e->supply, value);
+}
+
+/*
+ * Policy: Increase voltage
+ *
+ * 1. target volt = original volt + diff volt;
+ * 2. If target volt is not over max_volt, just set it;
+ * 3. Otherwise set max_volt as target volt and lower the rate(front N level).
+ */
+static void wtemp_dvfs_low_temp_adjust(struct udevice *dev, struct pm_element *e)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	ulong org_rate, tgt_rate, rb_rate;
+	int org_volt, tgt_volt, rb_volt;
+
+	org_rate = __wtemp_clk_get_rate(e);
+	org_volt = __wtemp_regulator_get_value(e);
+	tgt_volt = org_volt + e->volt_diff;
+	if ((e->lmt.max_volt != -ENODATA) && (tgt_volt > e->lmt.max_volt)) {
+		tgt_volt = e->lmt.max_volt;
+		__wtemp_regulator_set_value(e, tgt_volt);
+		tgt_rate = wtemp_get_lowlevel_rate(org_rate,
+						RATE_LOWER_LEVEL_N, priv->cpu);
+		tgt_rate = __wtemp_clk_set_rate(e, tgt_rate);
+	} else {
+		__wtemp_regulator_set_value(e, tgt_volt);
+		tgt_rate = org_rate;
+	}
+
+	/* Check */
+	rb_rate = __wtemp_clk_get_rate(e);
+	rb_volt = __wtemp_regulator_get_value(e);
+	if (tgt_rate != rb_rate)
+		printf("DVFS: %s: target rate=%ld, readback rate=%ld !\n",
+		       e->name, tgt_rate, rb_rate);
+	if (tgt_volt != rb_volt)
+		printf("DVFS: %s: target volt=%d, readback volt=%d !\n",
+		       e->name, tgt_volt, rb_volt);
+
+	printf("DVFS: %s(low): %ld->%ld Hz, %d->%d uV\n",
+	       e->name, org_rate, rb_rate, org_volt, rb_volt);
+}
+
+/*
+ * Policy:
+ *
+ * Just set opp table[0] volt and rate, i.e. the lowest performance.
+ */
+static void wtemp_dvfs_high_temp_adjust(struct udevice *dev, struct pm_element *e)
+{
+	ulong org_rate, tgt_rate, rb_rate;
+	int org_volt, tgt_volt, rb_volt;
+
+	/* Apply opp[0] */
+	org_rate = __wtemp_clk_get_rate(e);
+	tgt_rate = e->opp[0].hz;
+	tgt_rate = __wtemp_clk_set_rate(e, tgt_rate);
+
+	org_volt = __wtemp_regulator_get_value(e);
+	tgt_volt = e->opp[0].uv;
+	__wtemp_regulator_set_value(e, tgt_volt);
+
+	/* Check */
+	rb_rate = __wtemp_clk_get_rate(e);
+	rb_volt = __wtemp_regulator_get_value(e);
+	if (tgt_rate != rb_rate)
+		printf("DVFS: %s: target rate=%ld, readback rate=%ld !\n",
+		       e->name, tgt_rate, rb_rate);
+	if (tgt_volt != rb_volt)
+		printf("DVFS: %s: target volt=%d, readback volt=%d !\n",
+		       e->name, tgt_volt, rb_volt);
+
+	printf("DVFS: %s(high): %ld->%ld Hz, %d->%d uV\n",
+	       e->name, org_rate, tgt_rate, org_volt, tgt_volt);
+}
+
+static bool wtemp_dvfs_is_effect(struct pm_element *e,
+				 int temp, enum pm_event evt)
+{
+	if (evt & PM_EVT_LOW) {
+		if (e->lmt.ltemp_limit && temp <= e->lmt.low_temp)
+			return false;
+	}
+
+	if (evt & PM_EVT_HIGH) {
+		if (e->lmt.tztemp_limit && temp >= e->lmt.tz_temp)
+			return false;
+		else if (e->lmt.htemp_limit && temp >= e->lmt.high_temp)
+			return false;
+	}
+
+	return true;
+}
+
+static int __wtemp_dvfs_apply(struct udevice *dev, struct pm_element *e,
+			      int temp, enum pm_event evt)
+{
+	enum pm_event ret = PM_EVT_NONE;
+
+	if (evt & PM_EVT_LOW) {
+		/* Over lowest temperature: increase voltage */
+		if (e->lmt.ltemp_limit && temp <= e->lmt.low_temp) {
+			ret |= PM_EVT_LOW;
+			wtemp_dvfs_low_temp_adjust(dev, e);
+		}
+	}
+
+	if (evt & PM_EVT_HIGH) {
+		/* Over highest/thermal_zone temperature: decrease rate and voltage */
+		if (e->lmt.tztemp_limit && temp >= e->lmt.tz_temp) {
+			ret |= PM_EVT_HIGH;
+			wtemp_dvfs_high_temp_adjust(dev, e);
+		} else if (e->lmt.htemp_limit && temp >= e->lmt.high_temp) {
+			ret |= PM_EVT_HIGH;
+			wtemp_dvfs_high_temp_adjust(dev, e);
+		}
+	}
+
+	return ret;
+}
+
+static int __wtemp_common_ofdata_to_platdata(ofnode node, struct pm_element *e)
+{
+	ofnode supply, opp_node;
+	u32 phandle, uv, clock[2];
+	uint64_t hz;
+	int ret;
+
+	/* Get regulator and clk */
+	if (!ofnode_read_u32(node, e->supply_name, &phandle)) {
+		supply = ofnode_get_by_phandle(phandle);
+		ret = regulator_get_by_devname(supply.np->name, &e->supply);
+		if (ret) {
+			printf("DVFS: %s: Get supply(%s) failed, ret=%d",
+			       e->name, supply.np->full_name, ret);
+			return ret;
+		}
+		debug("DVFS: supply: %s\n", supply.np->full_name);
+	}
+
+	if (!ofnode_read_u32_array(node, "clocks", clock, ARRAY_SIZE(clock))) {
+		e->clk.id = clock[1];
+		ret = rockchip_get_clk(&e->clk.dev);
+		if (ret) {
+			printf("DVFS: %s: Get clk failed, ret=%d\n", e->name, ret);
+			return ret;
+		}
+	}
+
+	/* Get opp-table & limit param */
+	if (!ofnode_read_u32(node, "operating-points-v2", &phandle)) {
+		opp_node = ofnode_get_by_phandle(phandle);
+		e->lmt.low_temp = ofnode_read_s32_default(opp_node,
+						"rockchip,low-temp", -ENODATA);
+		e->lmt.high_temp = ofnode_read_s32_default(opp_node,
+						"rockchip,high-temp", -ENODATA);
+		e->lmt.max_volt = ofnode_read_u32_default(opp_node,
+						"rockchip,max-volt", -ENODATA);
+
+		debug("DVFS: %s: low-temp=%d, high-temp=%d, max-volt=%d\n",
+		      e->name, e->lmt.low_temp, e->lmt.high_temp,
+		      e->lmt.max_volt);
+
+		ofnode_for_each_subnode(node, opp_node) {
+			if (e->opp_nr >= OPP_TABLE_MAX) {
+				printf("DVFS: over max(%d) opp table items\n",
+				       OPP_TABLE_MAX);
+				break;
+			}
+			ofnode_read_u64(node, "opp-hz", &hz);
+			ofnode_read_u32_array(node, "opp-microvolt", &uv, 1);
+			e->opp[e->opp_nr].hz = hz;
+			e->opp[e->opp_nr].uv = uv;
+			e->opp_nr++;
+			debug("DVFS: %s: opp[%d]: hz=%lld, uv=%d, %s\n",
+			      e->name, e->opp_nr - 1,
+			      hz, uv, ofnode_get_name(node));
+		}
+	}
+	if (!e->opp_nr) {
+		printf("DVFS: %s: Can't find opp table\n", e->name);
+		return -EINVAL;
+	}
+
+	if (e->lmt.max_volt == -ENODATA)
+		e->lmt.max_volt = e->opp[e->opp_nr - 1].uv;
+	if (e->lmt.low_temp != -ENODATA)
+		e->lmt.ltemp_limit = true;
+	if (e->lmt.high_temp != -ENODATA)
+		e->lmt.htemp_limit = true;
+
+	return 0;
+}
+
+static int wtemp_dvfs_apply(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	struct list_head *node;
+	struct pm_element *e;
+	char s_temp[TEMP_STRING_LEN];
+	int temp, ret;
+
+	ret = thermal_get_temp(priv->thermal, &temp);
+	if (ret) {
+		printf("DVFS: Get temperature failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	temp2string(temp, s_temp, TEMP_STRING_LEN);
+	printf("DVFS: %s'c\n", s_temp);
+
+	/* Apply dvfs policy for all pm element */
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		__wtemp_dvfs_apply(dev, e, temp, PM_EVT_BOTH);
+	}
+
+	return 0;
+}
+
+static int wtemp_dvfs_repeat_apply(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	struct list_head *node;
+	struct pm_element *e;
+	enum pm_event applied;
+	char s_temp[TEMP_STRING_LEN];
+	int temp, ret;
+
+repeat:
+	ret = thermal_get_temp(priv->thermal, &temp);
+	if (ret) {
+		printf("DVFS: Get thermal temperature failed, ret=%d\n", ret);
+		return false;
+	}
+
+	/* Apply dvfs policy for all pm element if there is repeat request */
+	applied = PM_EVT_NONE;
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		if (e->lmt.ltemp_repeat)
+			applied |= __wtemp_dvfs_apply(dev, e, temp, PM_EVT_LOW);
+		if (e->lmt.htemp_repeat)
+			applied |= __wtemp_dvfs_apply(dev, e, temp, PM_EVT_HIGH);
+	}
+
+	/* Everything is fine, exit */
+	if (applied == PM_EVT_NONE)
+		goto finish;
+
+	/* Check repeat result */
+	udelay(REPEAT_PERIOD_US);
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		if (e->lmt.ltemp_repeat &&
+		    !wtemp_dvfs_is_effect(e, temp, PM_EVT_LOW))
+			goto repeat;
+		if (e->lmt.htemp_repeat &&
+		    !wtemp_dvfs_is_effect(e, temp, PM_EVT_HIGH))
+			goto repeat;
+	}
+
+finish:
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		temp2string(temp, s_temp, TEMP_STRING_LEN);
+		printf("DVFS: %s %s'c, %ld Hz, %d uV\n", e->name,
+		       s_temp, __wtemp_clk_get_rate(e),
+		       __wtemp_regulator_get_value(e));
+	}
+
+	return 0;
+}
+
+static void print_e_state(void)
+{
+	struct pm_element *e;
+	struct list_head *node;
+	char s_low[TEMP_STRING_LEN];
+	char s_high[TEMP_STRING_LEN];
+	char s_tz[TEMP_STRING_LEN];
+
+	list_for_each(node, &pm_e_head) {
+		e = list_entry(node, struct pm_element, node);
+		if (!e->lmt.ltemp_limit &&
+		    !e->lmt.htemp_limit && !e->lmt.tztemp_limit)
+			return;
+
+		temp2string(e->lmt.tz_temp, s_tz, TEMP_STRING_LEN);
+		temp2string(e->lmt.low_temp, s_low, TEMP_STRING_LEN);
+		temp2string(e->lmt.high_temp, s_high, TEMP_STRING_LEN);
+		printf("DVFS: %s: low=%s'c, high=%s'c, Vmax=%duV, tz_temp=%s'c, "
+			  "h_repeat=%d, l_repeat=%d\n",
+			  e->name, e->lmt.ltemp_limit ? s_low : NULL,
+			  e->lmt.htemp_limit ? s_high : NULL,
+			  e->lmt.max_volt,
+			  e->lmt.tztemp_limit ? s_tz : NULL,
+			  e->lmt.htemp_repeat, e->lmt.ltemp_repeat);
+	}
+}
+
+static int wtemp_dvfs_ofdata_to_platdata(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	ofnode tz_trip0, cooling_maps, node;
+	ofnode cpus, cpu, dmc;
+	const char *name;
+	int ret, tz_temp;
+	u32 phandle;
+
+	INIT_LIST_HEAD(&pm_e_head);
+
+	/* 1. Parse cpu node */
+	priv->cpu = &pm_cpu;
+	cpus = ofnode_path(FDT_PATH_CPUS);
+	if (!ofnode_valid(cpus)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_CPUS);
+		goto parse_dmc;
+	}
+
+	ofnode_for_each_subnode(cpu, cpus) {
+		name = ofnode_get_property(cpu, "device_type", NULL);
+		if (!name)
+			continue;
+		if (!strcmp(name, "cpu")) {
+			ret = __wtemp_common_ofdata_to_platdata(cpu, priv->cpu);
+			if (ret)
+				return ret;
+			break;
+		}
+	}
+
+	priv->cpu->lmt.ltemp_repeat =
+		dev_read_bool(dev, "cpu,low-temp-repeat");
+	priv->cpu->lmt.htemp_repeat =
+		dev_read_bool(dev, "cpu,high-temp-repeat");
+
+	list_add_tail(&priv->cpu->node, &pm_e_head);
+
+	/* 2. Parse dmc node */
+parse_dmc:
+	priv->dmc = &pm_dmc;
+	dmc = ofnode_path(FDT_PATH_DMC);
+	if (!ofnode_valid(dmc)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_CPUS);
+		goto parse_tz;
+	}
+	if (!IS_ENABLED(CONFIG_ROCKCHIP_DMC)) {
+		debug("DVFS: CONFIG_ROCKCHIP_DMC is disabled\n");
+		goto parse_tz;
+	}
+
+	ret = __wtemp_common_ofdata_to_platdata(dmc, priv->dmc);
+	if (ret)
+		return ret;
+
+	priv->dmc->lmt.ltemp_repeat =
+		dev_read_bool(dev, "dmc,low-temp-repeat");
+	priv->dmc->lmt.htemp_repeat =
+		dev_read_bool(dev, "dmc,high-temp-repeat");
+
+	list_add_tail(&priv->dmc->node, &pm_e_head);
+
+	/* 3. Parse thermal zone node */
+parse_tz:
+	tz_trip0 = ofnode_path(FDT_PATH_THREMAL_TRIP_POINT0);
+	if (!ofnode_valid(tz_trip0)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_THREMAL_TRIP_POINT0);
+		goto finish;
+	}
+
+	tz_temp = ofnode_read_s32_default(tz_trip0, "temperature", -ENODATA);
+	if (tz_temp == -ENODATA) {
+		debug("DVFS: Can't get thermal zone trip0 temperature\n");
+		goto finish;
+	}
+
+	cooling_maps = ofnode_path(FDT_PATH_THREMAL_COOLING_MAPS);
+	if (!ofnode_valid(cooling_maps)) {
+		debug("DVFS: Can't find %s\n", FDT_PATH_THREMAL_COOLING_MAPS);
+		goto finish;
+	}
+
+	ofnode_for_each_subnode(node, cooling_maps) {
+		ofnode_read_u32_array(node, "cooling-device", &phandle, 1);
+		name = ofnode_get_name(ofnode_get_by_phandle(phandle));
+		if (!name)
+			continue;
+		if (strstr(name, "cpu")) {
+			priv->cpu->lmt.tztemp_limit = true;
+			priv->cpu->lmt.tz_temp = tz_temp;
+		} else if (strstr(name, "dmc")) {
+			priv->dmc->lmt.tztemp_limit = true;
+			priv->dmc->lmt.tz_temp = tz_temp;
+		}
+	}
+
+finish:
+	print_e_state();
+
+	return 0;
+}
+
+static const struct dm_dvfs_ops wtemp_dvfs_ops = {
+	.apply = wtemp_dvfs_apply,
+	.repeat_apply = wtemp_dvfs_repeat_apply,
+};
+
+static int wtemp_dvfs_probe(struct udevice *dev)
+{
+	struct wtemp_dvfs_priv *priv = dev_get_priv(dev);
+	int ret;
+
+#ifdef CONFIG_ROCKCHIP_DMC
+	struct udevice *ram_dev;
+
+	/* Init dmc */
+	ret = uclass_get_device(UCLASS_RAM, 0, &ram_dev);
+	if (ret) {
+		printf("DVFS: Get dmc device failed, ret=%d\n", ret);
+		return ret;
+	}
+#endif
+	/* Init thermal */
+	ret = uclass_get_device(UCLASS_THERMAL, 0, &priv->thermal);
+	if (ret) {
+		printf("DVFS: Get thermal device failed, ret=%d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id wtemp_dvfs_match[] = {
+	{ .compatible = "rockchip,uboot-wide-temperature", },
+	{},
+};
+
+U_BOOT_DRIVER(rockchip_wide_temp_dvfs) = {
+	.name		      = "rockchip_wide_temp_dvfs",
+	.id		      = UCLASS_DVFS,
+	.ops		      = &wtemp_dvfs_ops,
+	.of_match	      = wtemp_dvfs_match,
+	.probe		      = wtemp_dvfs_probe,
+	.ofdata_to_platdata   = wtemp_dvfs_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct wtemp_dvfs_priv),
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index fdfa9b5f58..addf27639b 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -98,6 +98,7 @@ enum uclass_id {
 	UCLASS_KEY,		/* Key */
 	UCLASS_RC,		/* Remote Controller */
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
+	UCLASS_DVFS,		/* DVFS policy */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/dvfs.h b/include/dvfs.h
new file mode 100644
index 0000000000..6b93239bf4
--- /dev/null
+++ b/include/dvfs.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _DVFS_H_
+#define _DVFS_H_
+
+#include <dm.h>
+
+/**
+ * dvfs_init() - init first dvfs driver
+ *
+ * @apply: do dvfs policy apply if true, otherwise just init.
+ * @return 0 if OK, 1 on error
+ */
+int dvfs_init(bool apply);
+
+/**
+ * dvfs_apply() - do dvfs policy apply
+ *
+ * @dev: dvfs device
+ * @return 0 if OK, otherwise on error
+ */
+int dvfs_apply(struct udevice *dev);
+
+/**
+ * dvfs_repeat_apply() - do dvfs policy repeat apply
+ *
+ * @dev: dvfs device
+ * @return 0 if OK, otherwise on error
+ */
+int dvfs_repeat_apply(struct udevice *dev);
+
+/**
+ * struct dm_dvfs_ops - Driver model Thermal operations
+ *
+ * The uclass interface is implemented by all Thermal devices which use
+ * driver model.
+ */
+
+struct dm_dvfs_ops {
+	int (*apply)(struct udevice *dev);
+	int (*repeat_apply)(struct udevice *dev);
+};
+
+#endif	/* _DVFS_H_ */

commit 3e6a97f92c48343022ef3adf97f1041976d30fbe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 10 17:51:46 2018 +0800

    rockchip: destroy atags before jump to kernel
    
    Change-Id: I69f1050ed57a1ebccbc9c7cd5bf9c2eaac9ab30e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 2d6f01903d..0117c22621 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -265,6 +265,12 @@ int board_fdt_fixup(void *blob)
 	return ret;
 }
 
+void board_quiesce_devices(void)
+{
+	/* Destroy atags makes next warm boot safer */
+	atags_destroy();
+}
+
 void enable_caches(void)
 {
 	icache_enable();

commit da73f11ce7403b016599ca18cf29729154877cfc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 10 15:45:06 2018 +0800

    configs: rk1808: enable console info quiet and disable cmd net
    
    Change-Id: Ic885a4c4f5ce5e12bdb90547903c1429bd3c5df2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index a634a3bbc1..147bf4a0eb 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -12,6 +12,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -34,12 +35,14 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
 # CONFIG_CMD_MISC is not set
 # CONFIG_DOS_PARTITION is not set
 # CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y

commit f90a7d862b3a7ae8efff6bade2d69b6acf5630dc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:32:01 2018 +0800

    rk3308: add "kernel_addr_no_bl32_r=0x00280000"
    
    it's used to override "kernel_addr_r" when bl32 is disabled.
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I3908d34866186bf962d207f0f6d4aac47acdeb7a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index d380b3abc5..9a2fae5699 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -49,6 +49,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_no_bl32_r=0x00280000\0" \
 	"kernel_addr_r=0x00680000\0" \
 	"kernel_addr_c=0x02480000\0" \
 	"ramdisk_addr_r=0x04000000\0"

commit caf555d05f4f04defddedb938277993e6e5c4a58
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:29:19 2018 +0800

    rk1808: update kernel load address
    
    - rk3328: set "kernel_addr_r" as 0x00280000
    - add "kernel_addr_no_bl32_r" to override "kernel_addr_r" when bl32 is disabled.
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I8789c3010102d86fae98a46cb6b145b4afb3b3b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 27e8dabaea..836acae37f 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -39,7 +39,8 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_no_bl32_r=0x00280000\0" \
+	"kernel_addr_r=0x00680000\0" \
 	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit bcf66543f032c1550427e7c6c20a6d9bf2cb7ed8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:28:35 2018 +0800

    rk3328: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I95ed8c58d5bbb2de6132d0bbd99ed0a65c8104fe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index a5be7c3bde..76ed911ef2 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -59,7 +59,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 
 #include <config_distro_bootcmd.h>

commit 4c35db102eb06f59a93b80ba0e8f65072fa1533a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:28:15 2018 +0800

    px30: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I383ba5cc521340e18db0ae3048d02711af59e43b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 4b1c5457db..cea2d2e5e9 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -52,7 +52,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 

commit 342ca48f820b3c062652e2cf967e740dac00d8ee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:28:03 2018 +0800

    rk3368: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I199c01bc60dbb3107105e6ea669f64839ead0b80
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index e9e3a97aee..b82e9e2df2 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -52,7 +52,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit 66768e9e40f86fc79c9500c832301aa54fdf7b9a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:25:19 2018 +0800

    rk3399: set "kernel_addr_r" as 0x00280000
    
    load kernel as close as possible to the start of system RAM in
    order to make full use of memory for kernel.
    
    Change-Id: I95562432bca16566e92459f8cd56d07f65f77d59
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 4921ae93f3..3b8adb41fa 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -58,7 +58,7 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_r=0x00280000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit 8c2a7835d0a4e2c8b49262e2f4e347933ebdcfac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 6 09:50:43 2018 +0800

    common: board_r: enable initr_serial() anyway
    
    If we don't enable initr_serial(), even after relocation done, the
    serial driver always use no relocation address of ns16550_serial_ops
    which is setup in serial_init(). This makes abort issue when arm64 kernel
    is load to overlap the ram area.
    
    fixes: 064eb4931464a5c5dc66e25fc3af2561bc4cb948
    (serial: ns16550: support using pre-loader serial)
    
    Change-Id: Iab67010ba3712754c036ecb2aee76c13a0b200b6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 5f41768878..006c5d6781 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -172,22 +172,7 @@ static int initr_reloc_global_data(void)
 
 static int initr_serial(void)
 {
-/*
- * 1. Serial has been initialized in board_f.c => serial_init(), there is
- *    no special reason to init it again;
- *
- * 2. Pre-serial works depending on aliases to get pre-serial phandle when
- *    parse dtb. If CONFIG_USING_KERNEL_DTB is enabled, there are both kernel
- *    dtb and U-Boot dtb aliases added into aliases_lookup, these nodes have
- *    same names but different phanles(U-Boot nodes has high prior), this may
- *    lead a wrong aliases node finding if try to get a node after kenrel dtb
- *    unflattened, i.e. using U-Boot phandle to get kernel dtb node!!
- *
- *    Notice: of_alias_dump() is provided to dump all aliases node.
- */
-#ifndef CONFIG_USING_KERNEL_DTB
 	serial_initialize();
-#endif
 	return 0;
 }
 

commit f935b6dc55d3285fc022373100a600f1fa146e2f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 6 10:36:32 2018 +0800

    core: of_access: delete exist aliases when adding new one
    
    This new one is from kernel dtb if kernel dtb is enabled.
    
    Change-Id: I6fb54812188fe8749271a7aaae565bc7fa4cb3cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 5dbed31ceb..f164b07946 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -702,10 +702,22 @@ int of_count_phandle_with_args(const struct device_node *np,
 static void of_alias_add(struct alias_prop *ap, struct device_node *np,
 			 int id, const char *stem, int stem_len)
 {
+	struct alias_prop *oldap;
 	ap->np = np;
 	ap->id = id;
 	strncpy(ap->stem, stem, stem_len);
 	ap->stem[stem_len] = 0;
+
+	/* Delete U-Boot alias which is same with kernel */
+	mutex_lock(&of_mutex);
+	list_for_each_entry(oldap, &aliases_lookup, link) {
+		if (stem && !strcmp(stem, oldap->alias) && (id == oldap->id)) {
+			list_del(&oldap->link);
+			break;
+		}
+	}
+	mutex_unlock(&of_mutex);
+
 	list_add_tail(&ap->link, &aliases_lookup);
 	debug("adding DT alias:%s: stem=%s id=%i node=%s\n",
 	      ap->alias, ap->stem, ap->id, of_node_full_name(np));

commit b4913f9584f5dfb0786eadbc5f4cfadd4445b167
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 20:29:44 2018 +0800

    android: make android boot message more accurate and clear
    
    1. Actually, the "kernel_address" is android header address but not
       real kernel address, let's use "kernel_addr_r/c" to verbose.
    
    2. print compressed type info, like:
       "Booting LZ4 kernel at 0x02480000(Uncompress to 00680000) with fdt at 1f00000..." or
       "Booting kernel at 0x00680000 with fdt at 0x1f00000..."
    
    Change-Id: Ifb628ab355670681f78d8f73893baddee21223a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index de7492d571..464e23a3bf 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -300,15 +300,34 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
+	ulong comp;
 	char kernel_addr_str[12];
 	char *fdt_addr = env_get("fdt_addr");
+	char *kernel_addr_r = env_get("kernel_addr_r");
+	char *kernel_addr_c = env_get("kernel_addr_c");
+
+	const char *comp_name[] = {
+		[IH_COMP_NONE]  = "",
+		[IH_COMP_GZIP]  = "GZIP",
+		[IH_COMP_BZIP2] = "BZIP2",
+		[IH_COMP_LZMA]  = "LZMA",
+		[IH_COMP_LZO]   = "LZO",
+		[IH_COMP_LZ4]   = "LZ4",
+		[IH_COMP_ZIMAGE]= "ZIMAGE",
+	};
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
+	comp = android_image_get_comp((struct andr_img_hdr *)kernel_address);
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
-	printf("Booting kernel at %s with fdt at %s...\n\n\n",
-	       kernel_addr_str, fdt_addr);
+	if (comp != IH_COMP_NONE)
+		printf("Booting %s kernel at %s(Uncompress to %s) with fdt at %s...\n\n\n",
+		       comp_name[comp], kernel_addr_c, kernel_addr_r, fdt_addr);
+	else
+		printf("Booting kernel at %s with fdt at %s...\n\n\n",
+		       kernel_addr_r, fdt_addr);
+
 	do_bootm(NULL, 0, 4, bootm_args);
 
 	return -1;

commit eb94a25c6fea82022e6271a59e60c744101a8453
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 21:02:28 2018 +0800

    android: fix android load address missing reserve page size
    
    fixes: ee465021feb46515c76fe2291d3fdf31eb6dbb4
    (android: support boot images packed with rockchip android hdr)
    
    Change-Id: Iaf340c828196553e433b17322929eaeed6afbf55
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 36207e2770..3405fc7578 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -314,6 +314,7 @@ long android_image_load(struct blk_desc *dev_desc,
 		if (comp != IH_COMP_NONE) {
 			load_address += android_image_get_ksize(hdr) * 3;
 			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
+			load_address -= hdr->page_size;
 			unmap_sysmem(buf);
 			buf = map_sysmem(load_address, 0 /* size */);
 		}

commit 59c7ef16b353241fb0a4b37a5625ee54ab2adc4a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 10 15:02:12 2018 +0800

    make.sh: clean debug commands to a function
    
    Change-Id: Ia141a0830428ae51d9dd45da80a61d3805f62f4a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d866a46d91..20e8def0f3 100755
--- a/make.sh
+++ b/make.sh
@@ -237,77 +237,7 @@ sub_commands()
 		;;
 
 		debug)
-		if [ "${cmd}" = 'debug' -a "${opt}" = 'debug' ]; then
-			echo
-			echo "The commands will modify .config and files, and can't auto restore changes!"
-			echo "debug-N, the N:"
-			echo "    1. lib/initcall.c debug() -> printf()"
-			echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
-			echo "    3. global #define DEBUG"
-			echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
-			echo "    5. enable CONFIG_ROCKCHIP_CRC"
-			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
-			echo "    8. set CONFIG_BOOTDELAY=5"
-			echo "    9. armv7 start.S: print entry warning"
-			echo "   10. armv8 start.S: print entry warning"
-			echo "   11. firmware bootflow debug() -> printf()"
-			echo
-			echo "Enabled: "
-			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
-			grep '^CONFIG_ROCKCHIP_CRC=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_CRC"
-			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
-			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' ${OUTDIR}/.config > /dev/null \
-			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
-
-		elif [ "${opt}" = '1' ]; then
-			sed -i 's/\<debug\>/printf/g' lib/initcall.c
-			echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
-		elif [ "${opt}" = '2' ]; then
-			sed -i 's/\<debug\>/printf/g' ./common/board_f.c
-			sed -i 's/\<debug\>/printf/g' ./common/board_r.c
-			echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
-		elif [ "${opt}" = '3' ]; then
-			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
-			echo "DEBUG [3]: global #define DEBUG"
-		elif [ "${opt}" = '4' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' ${OUTDIR}/.config
-			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
-		elif [ "${opt}" = '5' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' ${OUTDIR}/.config
-			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
-		elif [ "${opt}" = '6' ]; then
-			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' ${OUTDIR}/.config
-			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
-		elif [ "${opt}" = '7' ]; then
-			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' ${OUTDIR}/.config
-			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
-		elif [ "${opt}" = '8' ]; then
-			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
-			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
-		elif [ "${opt}" = '9' ]; then
-			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
-			./arch/arm/cpu/armv7/start.S
-			echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
-		elif [ "${opt}" = '10' ]; then
-			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
-			./arch/arm/cpu/armv8/start.S
-			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
-		elif [ "${opt}" = '11' ]; then
-			sed -i 's/\<debug\>/printf/g' common/fdt_support.c
-			sed -i 's/\<debug\>/printf/g' common/image-fdt.c
-			sed -i 's/\<debug\>/printf/g' common/image.c
-			sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
-			sed -i 's/\<debug\>/printf/g' common/bootm.c
-			sed -i 's/\<debug\>/printf/g' common/image.c
-			sed -i 's/\<debug\>/printf/g' common/image-android.c
-			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
-			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
-		fi
-		echo
+		debug_command
 		exit 0
 		;;
 
@@ -472,6 +402,82 @@ fixup_platform_configure()
 	fi
 }
 
+debug_command()
+{
+		if [ "${cmd}" = 'debug' -a "${opt}" = 'debug' ]; then
+			echo
+			echo "The commands will modify .config and files, and can't auto restore changes!"
+			echo "debug-N, the N:"
+			echo "    1. lib/initcall.c debug() -> printf()"
+			echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
+			echo "    3. global #define DEBUG"
+			echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
+			echo "    5. enable CONFIG_ROCKCHIP_CRC"
+			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
+			echo "    8. set CONFIG_BOOTDELAY=5"
+			echo "    9. armv7 start.S: print entry warning"
+			echo "   10. armv8 start.S: print entry warning"
+			echo "   11. firmware bootflow debug() -> printf()"
+			echo
+			echo "Enabled: "
+			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
+			grep '^CONFIG_ROCKCHIP_CRC=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRC"
+			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
+
+		elif [ "${opt}" = '1' ]; then
+			sed -i 's/\<debug\>/printf/g' lib/initcall.c
+			sed -i 's/ifdef DEBUG/if 1/g' lib/initcall.c
+			echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
+		elif [ "${opt}" = '2' ]; then
+			sed -i 's/\<debug\>/printf/g' ./common/board_f.c
+			sed -i 's/\<debug\>/printf/g' ./common/board_r.c
+			echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
+		elif [ "${opt}" = '3' ]; then
+			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
+			echo "DEBUG [3]: global #define DEBUG"
+		elif [ "${opt}" = '4' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' ${OUTDIR}/.config
+			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
+		elif [ "${opt}" = '5' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' ${OUTDIR}/.config
+			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
+		elif [ "${opt}" = '6' ]; then
+			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
+		elif [ "${opt}" = '7' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
+		elif [ "${opt}" = '8' ]; then
+			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
+			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+		elif [ "${opt}" = '9' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
+			./arch/arm/cpu/armv7/start.S
+			echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '10' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
+			./arch/arm/cpu/armv8/start.S
+			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '11' ]; then
+			sed -i 's/\<debug\>/printf/g' common/fdt_support.c
+			sed -i 's/\<debug\>/printf/g' common/image-fdt.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' common/image-android.c
+			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
+			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
+		fi
+		echo
+}
+
 pack_uboot_image()
 {
 	local UBOOT_LOAD_ADDR

commit 36ba3f8d39ecc8eca0b0ed34154f08be164b93a3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 6 16:05:24 2018 +0800

    lib: initcall: add time cost verbose
    
    This is more helpful than bootstage timing record since it
    is quite possible for every developer to enable inicall
    verbose for debug and find abnormal time cost as early as
    possible.
    
    It looks like:
      initcall: 000000000061015c
                                                                      #   183 us
      initcall: 000000000ff3e614
                                                                      #     0 us
      initcall: 000000000ff3e408
                                                                      #     0 us
      initcall: 00000000006105fc (relocated to 000000000ff3e5fc)
                                                                      #  6401 us
      initcall: 0000000000610420 (relocated to 000000000ff3e420)
                                                                      #     1 us
      initcall: 0000000000604444 (relocated to 000000000ff32444)
                                                                      #     5 us
    Change-Id: Ib59f3e5052f921d0046a6fa73cbfb968000fd34e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/initcall.c b/lib/initcall.c
index db7c558bde..73c72cf1a5 100644
--- a/lib/initcall.c
+++ b/lib/initcall.c
@@ -10,9 +10,18 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SYS_TICKS_TO_US(ticks)	 ((ticks) / (COUNTER_FREQUENCY / 1000000))
+
+#ifdef DEBUG
+static inline void call_get_ticks(ulong *ticks) { *ticks = get_ticks(); }
+#else
+static inline void call_get_ticks(ulong *ticks) { }
+#endif
+
 int initcall_run_list(const init_fnc_t init_sequence[])
 {
 	const init_fnc_t *init_fnc_ptr;
+	__maybe_unused ulong start = 0, end = 0;
 
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
 		unsigned long reloc_ofs = 0;
@@ -28,7 +37,11 @@ int initcall_run_list(const init_fnc_t init_sequence[])
 			debug(" (relocated to %p)\n", (char *)*init_fnc_ptr);
 		else
 			debug("\n");
+		call_get_ticks(&start);
 		ret = (*init_fnc_ptr)();
+		call_get_ticks(&end);
+		if (start != end)
+			debug("\t\t\t\t\t\t\t\t#%6ld us\n", SYS_TICKS_TO_US(end - start));
 		if (ret) {
 			printf("initcall sequence %p failed at call %p (err=%d)\n",
 			       init_sequence,

commit bc04a3dd9a41813372820ba50655022a6a28bfbf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:21:31 2018 +0800

    rockchip: fixup "kernel_addr_r" when bl32 is disabled
    
    some platform which is not determined to enable bl32,
    we had better choose kernel load address dynamically in
    order to make full use of memory for kernel.
    
    Change-Id: If5c15a3755dabfff8d3cce8dec38c9215c464ed2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 79122316ce..2d6f01903d 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -197,6 +197,18 @@ int init_kernel_dtb(void)
 }
 #endif
 
+void board_env_fixup(void)
+{
+	ulong kernel_addr_r;
+
+	if (gd->flags & GD_FLG_BL32_ENABLED)
+		return;
+
+	/* If bl32 is disabled, maybe kernel can be load to lower address. */
+	kernel_addr_r = env_get_ulong("kernel_addr_no_bl32_r", 16, -1);
+	if (kernel_addr_r != -1)
+		env_set_hex("kernel_addr_r", kernel_addr_r);
+}
 
 int board_init(void)
 {
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 3f15c18000..2c4d26826f 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -117,6 +117,7 @@ static int __dram_init_banksize(int resv_tee)
 		    (tos_parameter->tee_mem.flags == 1)) {
 			tos_addr = tos_parameter->tee_mem.phy_addr;
 			tos_size = tos_parameter->tee_mem.size;
+			gd->flags |= GD_FLG_BL32_ENABLED;
 		}
 	}
 
diff --git a/env/common.c b/env/common.c
index 70715bb6e7..1c75fd3133 100644
--- a/env/common.c
+++ b/env/common.c
@@ -41,6 +41,8 @@ int env_get_yesno(const char *var)
 		1 : 0;
 }
 
+__weak void board_env_fixup(void) {}
+
 /*
  * Look up the variable from the default environment
  */
@@ -88,6 +90,8 @@ void set_default_env(const char *s)
 
 	gd->flags |= GD_FLG_ENV_READY;
 	gd->flags |= GD_FLG_ENV_DEFAULT;
+
+	board_env_fixup();
 }
 
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 17103318b8..d43ea5a173 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -171,6 +171,8 @@ typedef struct global_data {
 #ifdef CONFIG_ARCH_ROCKCHIP
 /* Currently, we use it to indicate console can be flushed before jump to OS */
 #define GD_FLG_OS_RUN		0x10000
+/* BL32 is enabled */
+#define GD_FLG_BL32_ENABLED	0x20000
 #endif
 
 #endif /* __ASM_GENERIC_GBL_DATA_H */
diff --git a/include/common.h b/include/common.h
index 1c280d86f8..e300aa3c25 100644
--- a/include/common.h
+++ b/include/common.h
@@ -477,6 +477,7 @@ int board_late_init (void);
 int board_postclk_init (void); /* after clocks/timebase, before env/serial */
 int board_early_init_r (void);
 void board_poweroff (void);
+void board_env_fixup(void);
 
 #if defined(CONFIG_SYS_DRAM_TEST)
 int testdram(void);

commit a65ff5dd0e5fd572494d2b25b5831239dc36a439
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Dec 6 17:00:35 2018 +0800

    video/drm: dsi: Add support for adapted command mode (Auto mode)
    
    Change-Id: I301bb5d9b40ebccdb1d2395e14a2d4cab5ea2325
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index a219f15f93..cb57b84cb5 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -59,6 +59,8 @@
 #define OUTVACT_LPCMD_TIME(p)		(((p) & 0xff) << 16)
 #define INVACT_LPCMD_TIME(p)		((p) & 0xff)
 
+#define DSI_DBI_VCID			0x1c
+#define DBI_VCID(x)			UPDATE(x, 1, 0)
 #define DSI_DBI_CFG			0x20
 #define DSI_DBI_CMDSIZE			0x28
 
@@ -68,11 +70,10 @@
 #define BTA_EN				BIT(2)
 #define EOTP_RX_EN			BIT(1)
 #define EOTP_TX_EN			BIT(0)
-
 #define DSI_MODE_CFG			0x34
-#define ENABLE_VIDEO_MODE		0
-#define ENABLE_CMD_MODE			BIT(0)
-
+#define CMD_VIDEO_MODE			BIT(0)
+#define COMMAND_MODE			BIT(0)
+#define VIDEO_MODE			0
 #define DSI_VID_MODE_CFG		0x38
 #define VPG_EN				BIT(16)
 #define LP_CMD_EN			BIT(15)
@@ -100,34 +101,22 @@
 #define DSI_VID_VBP_LINES		0x58
 #define DSI_VID_VFP_LINES		0x5c
 #define DSI_VID_VACTIVE_LINES		0x60
+#define DSI_EDPI_CMD_SIZE		0x64
 #define DSI_CMD_MODE_CFG		0x68
-#define MAX_RD_PKT_SIZE_LP		BIT(24)
-#define DCS_LW_TX_LP			BIT(19)
-#define DCS_SR_0P_TX_LP			BIT(18)
-#define DCS_SW_1P_TX_LP			BIT(17)
-#define DCS_SW_0P_TX_LP			BIT(16)
-#define GEN_LW_TX_LP			BIT(14)
-#define GEN_SR_2P_TX_LP			BIT(13)
-#define GEN_SR_1P_TX_LP			BIT(12)
-#define GEN_SR_0P_TX_LP			BIT(11)
-#define GEN_SW_2P_TX_LP			BIT(10)
-#define GEN_SW_1P_TX_LP			BIT(9)
-#define GEN_SW_0P_TX_LP			BIT(8)
-#define EN_ACK_RQST			BIT(1)
-#define EN_TEAR_FX			BIT(0)
-
-#define CMD_MODE_ALL_LP			(MAX_RD_PKT_SIZE_LP | \
-					 DCS_LW_TX_LP | \
-					 DCS_SR_0P_TX_LP | \
-					 DCS_SW_1P_TX_LP | \
-					 DCS_SW_0P_TX_LP | \
-					 GEN_LW_TX_LP | \
-					 GEN_SR_2P_TX_LP | \
-					 GEN_SR_1P_TX_LP | \
-					 GEN_SR_0P_TX_LP | \
-					 GEN_SW_2P_TX_LP | \
-					 GEN_SW_1P_TX_LP | \
-					 GEN_SW_0P_TX_LP)
+#define MAX_RD_PKT_SIZE			BIT(24)
+#define DCS_LW_TX			BIT(19)
+#define DCS_SR_0P_TX			BIT(18)
+#define DCS_SW_1P_TX			BIT(17)
+#define DCS_SW_0P_TX			BIT(16)
+#define GEN_LW_TX			BIT(14)
+#define GEN_SR_2P_TX			BIT(13)
+#define GEN_SR_1P_TX			BIT(12)
+#define GEN_SR_0P_TX			BIT(11)
+#define GEN_SW_2P_TX			BIT(10)
+#define GEN_SW_1P_TX			BIT(9)
+#define GEN_SW_0P_TX			BIT(8)
+#define ACK_RQST_EN			BIT(1)
+#define TEAR_FX_EN			BIT(0)
 
 #define DSI_GEN_HDR			0x6c
 #define GEN_HDATA(data)			(((data) & 0xffff) << 8)
@@ -319,11 +308,6 @@ struct dw_mipi_dsi {
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
 
-enum dw_mipi_dsi_mode {
-	DSI_COMMAND_MODE,
-	DSI_VIDEO_MODE,
-};
-
 struct dphy_pll_testdin_map {
 	unsigned int max_mbps;
 	u8 testdin;
@@ -621,18 +605,6 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi)
-{
-	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
-		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
-		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
-	} else {
-		dsi_write(dsi, DSI_CMD_MODE_CFG, 0);
-		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
-				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
-	}
-}
-
 static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 				      const struct mipi_dsi_msg *msg)
 {
@@ -707,28 +679,88 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	int ret;
 	int val;
 
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
+		dsi_update_bits(dsi, DSI_VID_MODE_CFG, LP_CMD_EN, LP_CMD_EN);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
+	} else {
+		dsi_update_bits(dsi, DSI_VID_MODE_CFG, LP_CMD_EN, 0);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
+	}
+
 	switch (msg->type) {
 	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
 		return dw_mipi_dsi_shutdown_peripheral(dsi);
 	case MIPI_DSI_TURN_ON_PERIPHERAL:
 		return dw_mipi_dsi_turn_on_peripheral(dsi);
 	case MIPI_DSI_DCS_SHORT_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_SW_0P_TX : 0);
+		break;
 	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SW_1P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_SW_1P_TX : 0);
+		break;
 	case MIPI_DSI_DCS_LONG_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_LW_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_LW_TX : 0);
+		break;
 	case MIPI_DSI_DCS_READ:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_SR_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				DCS_SR_0P_TX : 0);
+		break;
 	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, MAX_RD_PKT_SIZE,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				MAX_RD_PKT_SIZE : 0);
+		break;
 	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SW_0P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_1P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SW_1P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SW_2P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SW_2P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_LONG_WRITE:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_LW_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_LW_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_0P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SR_0P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_1P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SR_1P_TX : 0);
+		break;
 	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, GEN_SR_2P_TX,
+				dsi->mode_flags & MIPI_DSI_MODE_LPM ?
+				GEN_SR_2P_TX : 0);
 		break;
 	default:
 		return -EINVAL;
 	}
 
+	if (msg->flags & MIPI_DSI_MSG_REQ_ACK)
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG,
+				ACK_RQST_EN, ACK_RQST_EN);
+
 	/* create a packet to the DSI protocol */
 	ret = mipi_dsi_create_packet(&packet, msg);
 	if (ret) {
@@ -736,8 +768,6 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 		return ret;
 	}
 
-	dw_mipi_dsi_set_transfer_mode(dsi);
-
 	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {
 		/*
@@ -808,7 +838,7 @@ static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
 	u32 val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN |
-		  LP_HFP_EN | LP_HBP_EN | LP_CMD_EN;
+		  LP_HFP_EN | LP_HBP_EN;
 
 	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
 		val &= ~LP_HFP_EN;
@@ -830,23 +860,26 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 				AUTO_CLKLANE_CTRL, AUTO_CLKLANE_CTRL);
 }
 
-static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
-				 enum dw_mipi_dsi_mode mode)
+static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
 {
-	if (mode == DSI_COMMAND_MODE) {
-		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+	const struct drm_display_mode *mode = dsi->mode;
+
+	dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+			PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
+
+	dsi_write(dsi, DSI_PWR_UP, RESET);
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
+		dsi_update_bits(dsi, DSI_MODE_CFG, CMD_VIDEO_MODE, VIDEO_MODE);
 	} else {
-		dsi_write(dsi, DSI_PWR_UP, RESET);
-		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
-				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
-		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
-		dsi_write(dsi, DSI_PWR_UP, POWERUP);
+		dsi_write(dsi, DSI_DBI_VCID, DBI_VCID(dsi->channel));
+		dsi_update_bits(dsi, DSI_CMD_MODE_CFG, DCS_LW_TX, 0);
+		dsi_write(dsi, DSI_EDPI_CMD_SIZE, mode->hdisplay);
+		dsi_update_bits(dsi, DSI_MODE_CFG,
+				CMD_VIDEO_MODE, COMMAND_MODE);
 	}
-}
 
-static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
-{
-	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
 
 	if (dsi->slave)
 		dw_mipi_dsi_enable(dsi->slave);
@@ -854,13 +887,23 @@ static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
 
 static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 {
-	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
+	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_LPCLK_CTRL, 0);
+	dsi_write(dsi, DSI_EDPI_CMD_SIZE, 0);
+	dsi_update_bits(dsi, DSI_MODE_CFG, CMD_VIDEO_MODE, COMMAND_MODE);
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
+
+	if (dsi->slave)
+		dw_mipi_dsi_disable(dsi->slave);
+}
+
+static void dw_mipi_dsi_post_disable(struct dw_mipi_dsi *dsi)
+{
 	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_PHY_RSTZ, 0);
 
 	if (dsi->slave)
-		dw_mipi_dsi_disable(dsi->slave);
+		dw_mipi_dsi_post_disable(dsi->slave);
 }
 
 static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
@@ -1156,7 +1199,7 @@ static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
 	dw_mipi_dsi_video_mode_config(dsi);
 	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
 	dw_mipi_dsi_command_mode_config(dsi);
-	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
+	dsi_update_bits(dsi, DSI_MODE_CFG, CMD_VIDEO_MODE, COMMAND_MODE);
 	dw_mipi_dsi_line_timer_config(dsi);
 	dw_mipi_dsi_vertical_timing_config(dsi);
 	dw_mipi_dsi_dphy_timing_config(dsi);
@@ -1225,6 +1268,14 @@ static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 	return 0;
 }
 
+static void dw_mipi_dsi_connector_unprepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	dw_mipi_dsi_post_disable(dsi);
+}
+
 static int dw_mipi_dsi_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -1248,6 +1299,7 @@ static int dw_mipi_dsi_connector_disable(struct display_state *state)
 static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
 	.init = dw_mipi_dsi_connector_init,
 	.prepare = dw_mipi_dsi_connector_prepare,
+	.unprepare = dw_mipi_dsi_connector_unprepare,
 	.enable = dw_mipi_dsi_connector_enable,
 	.disable = dw_mipi_dsi_connector_disable,
 	.transfer = dw_mipi_dsi_connector_transfer,

commit 6307c8ee3072b5698bde6cc1db23cad99c1dbc84
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Thu Dec 6 03:34:23 2018 -0800

    rockchip: rv1108: define macro CONFIG_SYS_SDRAM_BASE to real num
    
    Change-Id: I2b5f05952d1d10e853d83bf7486a8cf53226d189
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index b0f6b90ddf..44cd4e3f6f 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -15,7 +15,7 @@
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
-#define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x200000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 

commit 5c90ec81f3773565dae1abf9284f849d79cb9062
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 20:09:17 2018 +0800

    make.sh: add debug command to enable printf for firmware bootflow
    
    Change-Id: Iff523db0ecc26ca09d9a62e867031abfd85a3b42
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 6e9092cd7c..d866a46d91 100755
--- a/make.sh
+++ b/make.sh
@@ -251,6 +251,7 @@ sub_commands()
 			echo "    8. set CONFIG_BOOTDELAY=5"
 			echo "    9. armv7 start.S: print entry warning"
 			echo "   10. armv8 start.S: print entry warning"
+			echo "   11. firmware bootflow debug() -> printf()"
 			echo
 			echo "Enabled: "
 			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
@@ -295,6 +296,16 @@ sub_commands()
 			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
 			./arch/arm/cpu/armv8/start.S
 			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '11' ]; then
+			sed -i 's/\<debug\>/printf/g' common/fdt_support.c
+			sed -i 's/\<debug\>/printf/g' common/image-fdt.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' arch/arm/lib/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/bootm.c
+			sed -i 's/\<debug\>/printf/g' common/image.c
+			sed -i 's/\<debug\>/printf/g' common/image-android.c
+			sed -i 's/\<debug\>/printf/g' common/android_bootloader.c
+			echo "DEBUG [11]: firmware bootflow debug() -> printf()"
 		fi
 		echo
 		exit 0

commit 0163ec82065570b5c06584c562cbdeff10e4d29d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Dec 5 20:05:19 2018 +0800

    video/drm: lvds: add bandgap handling
    
    Fixes: 3c5714f034cf ("video/drm: lvds: add bandgap handling")
    Change-Id: Ieb88e8cae77bf8c2f8c874ed39c1e9d76b832716
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 70c9244159..721d39454d 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -302,6 +302,8 @@ static void px30_output_lvds(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
 
+	lvds_writel(lvds, MIPIPHY_REG0, 0x01);
+
 	/* enable lvds mode */
 	val = PX30_LVDS_PHY_MODE(1) | PX30_DPHY_FORCERXMODE(1);
 	/* config lvds_format */

commit dec38e939512fdedb20a61a8db81904662ffeaf3
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Nov 6 14:29:57 2018 +0800

    lib: optee_client: remove widevine ta from uboot
    
    Change-Id: I9e6e4d6743d0a8e9787c2b01e535d920d4f93008
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    (cherry picked from commit d8100d74a0eed48ed1bef17f6497acaea4b35ecf)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h b/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
deleted file mode 100644
index 4b2aeff231..0000000000
--- a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#ifndef _WIDEVINE_TA_H_
-#define _WIDEVINE_TA_H_
-
-extern const uint8_t widevine_keybox_data[];
-extern const uint32_t widevine_keybox_size;
-
-#endif /* _WIDEVINE_TA_H_ */
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index aab27e389b..e039115f98 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -12,11 +12,6 @@ obj-y += tee_smc-arm64.o
 
 ifdef CONFIG_OPTEE_V1
 obj-y += OpteeClientRkFs.o
-
-obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
-lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
-lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix widevine_keybox --TA $< --out $@
 endif
 
 ifdef CONFIG_OPTEE_V2
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index e9b0cb9ab0..e41388b185 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -100,23 +100,17 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 						    TEEC_MEMREF_TEMP_INOUT,
 						    TEEC_NONE);
 
-	printf("check: does keybox exised in secure storage...\n");
+	printf("write keybox to secure storage\n");
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					122,
+					6,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS) {
-		printf("no keybox in secure storage, write keybox to secure storage\n");
-		TeecResult = TEEC_InvokeCommand(&TeecSession,
-						121,
-						&TeecOperation,
-						&ErrorOrigin);
-		if (TeecResult != TEEC_SUCCESS) {
-			printf("send data to TA failed with code 0x%x\n", TeecResult);
-		} else {
-			printf("send data to TA success with code 0x%x\n", TeecResult);
-		}
+		printf("send data to TA failed with code 0x%x\n", TeecResult);
+	} else {
+		printf("send data to TA success with code 0x%x\n", TeecResult);
 	}
+
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_ReleaseSharedMemory(&SharedMem2);
@@ -131,22 +125,19 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 {
 	uint32_t key_size;
 	uint32_t data_size;
-	uint32_t object_id;
+	TEEC_Result ret;
 	int rc = 0;
 
 	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
 		/* widevine keybox */
-		TEEC_Result ret;
-
-		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
-			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
-		object_id = 101;
+		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 
 		key_size = *(uboot_data + 4);
 		data_size = *(uboot_data + 8);
 
-		ret = rk_send_keybox_to_ta((uint8_t *)&object_id,
-					   sizeof(uint32_t),
+		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
+					   sizeof("widevine_keybox"),
 					   widevine_uuid,
 					   uboot_data + 12,
 					   key_size,
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index f8d0df396e..fe92eaa270 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -15,7 +15,6 @@
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
-#include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
 #endif
@@ -113,8 +112,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 		ImageData = (void *)0;
 		ImageSize = 0;
 	} else {
-		ImageData = (void *)widevine_keybox_data;
-		ImageSize = widevine_keybox_size;
+		ImageData = (void *)0;
+		ImageSize = 0;
 	}
 
 	if (Status != 0) {
diff --git a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta b/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
deleted file mode 100644
index 2d466e3223..0000000000
Binary files a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta and /dev/null differ

commit d8100d74a0eed48ed1bef17f6497acaea4b35ecf
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Nov 6 14:29:57 2018 +0800

    lib: optee_client: remove widevine ta from uboot
    
    Change-Id: I9e6e4d6743d0a8e9787c2b01e535d920d4f93008
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h b/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
deleted file mode 100644
index 4b2aeff231..0000000000
--- a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#ifndef _WIDEVINE_TA_H_
-#define _WIDEVINE_TA_H_
-
-extern const uint8_t widevine_keybox_data[];
-extern const uint32_t widevine_keybox_size;
-
-#endif /* _WIDEVINE_TA_H_ */
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index aab27e389b..e039115f98 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -12,11 +12,6 @@ obj-y += tee_smc-arm64.o
 
 ifdef CONFIG_OPTEE_V1
 obj-y += OpteeClientRkFs.o
-
-obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
-lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
-lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix widevine_keybox --TA $< --out $@
 endif
 
 ifdef CONFIG_OPTEE_V2
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index e9b0cb9ab0..e41388b185 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -100,23 +100,17 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 						    TEEC_MEMREF_TEMP_INOUT,
 						    TEEC_NONE);
 
-	printf("check: does keybox exised in secure storage...\n");
+	printf("write keybox to secure storage\n");
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					122,
+					6,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult != TEEC_SUCCESS) {
-		printf("no keybox in secure storage, write keybox to secure storage\n");
-		TeecResult = TEEC_InvokeCommand(&TeecSession,
-						121,
-						&TeecOperation,
-						&ErrorOrigin);
-		if (TeecResult != TEEC_SUCCESS) {
-			printf("send data to TA failed with code 0x%x\n", TeecResult);
-		} else {
-			printf("send data to TA success with code 0x%x\n", TeecResult);
-		}
+		printf("send data to TA failed with code 0x%x\n", TeecResult);
+	} else {
+		printf("send data to TA success with code 0x%x\n", TeecResult);
 	}
+
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_ReleaseSharedMemory(&SharedMem2);
@@ -131,22 +125,19 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 {
 	uint32_t key_size;
 	uint32_t data_size;
-	uint32_t object_id;
+	TEEC_Result ret;
 	int rc = 0;
 
 	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
 		/* widevine keybox */
-		TEEC_Result ret;
-
-		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
-			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
-		object_id = 101;
+		TEEC_UUID widevine_uuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 
 		key_size = *(uboot_data + 4);
 		data_size = *(uboot_data + 8);
 
-		ret = rk_send_keybox_to_ta((uint8_t *)&object_id,
-					   sizeof(uint32_t),
+		ret = rk_send_keybox_to_ta((uint8_t *)"widevine_keybox",
+					   sizeof("widevine_keybox"),
 					   widevine_uuid,
 					   uboot_data + 12,
 					   key_size,
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index f8d0df396e..fe92eaa270 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -15,7 +15,6 @@
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
-#include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
 #endif
@@ -113,8 +112,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 		ImageData = (void *)0;
 		ImageSize = 0;
 	} else {
-		ImageData = (void *)widevine_keybox_data;
-		ImageSize = widevine_keybox_size;
+		ImageData = (void *)0;
+		ImageSize = 0;
 	}
 
 	if (Status != 0) {
diff --git a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta b/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
deleted file mode 100644
index 2d466e3223..0000000000
Binary files a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta and /dev/null differ

commit 509ea9e58d3f246635af36847a88bf9fae4446a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 17:05:55 2018 +0800

    arm: rockchip: select SKIP_RELOCATE_UBOOT if !ARM64
    
    According to kernel: Documentation/arm64/booting.txt introduce:
    
    NOTE: versions prior to v4.6 cannot make use of memory below the
    physical offset of the Image so it is recommended that the Image be
    placed as close as possible to the start of system RAM.
    
    We shall remain ARM64 relocation to avoid ram overlap between uboot
    and kernel.
    
    fixes: 9841897eb91367ee57c09032b41a2c07bc7b7642
    (arm: rockchip: select SKIP_RELOCATE_UBOOT)
    
    Change-Id: I6b092e979c9f365ca9d9b9dbb8b4e7afbf864d6e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 99aa72b583..b8cd54762d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1132,7 +1132,7 @@ config ARCH_ROCKCHIP
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select SYS_NS16550
-	select SKIP_RELOCATE_UBOOT
+	select SKIP_RELOCATE_UBOOT if !ARM64
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE

commit c3385ddc3fce4b56bc7016e9cdd558e7cf4b30c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 30 17:41:27 2018 +0800

    configs: evb-rk3308: remove unused modules
    
    This patch decreases u-boot.bin size: 594Kb => 542Kb
    
    Change-Id: I292362fca6be8fd308eae864483c6890df61ad42
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index fcc1e167eb..362f98f361 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
@@ -16,12 +17,27 @@ CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
@@ -29,8 +45,6 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
@@ -44,8 +58,8 @@ CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKNANDC_NAND=y
-CONFIG_RKSFC_NOR=y
 CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
@@ -64,4 +78,4 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+# CONFIG_EFI_LOADER is not set

commit 7ae458341f511c20594e1acbd1a5e52a8b6253cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 14:59:17 2018 +0800

    power: charge animation: print reason of exit charge
    
    This is helpful to know charge state.
    
    Change-Id: I96401b67220a0ebb782c5da1f8001b3bf4682c06
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 8e556ec242..a4854aa401 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -351,7 +351,7 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* If there is preboot command, exit */
 	if (preboot) {
-		debug("exit charge, due to preboot: %s\n", preboot);
+		printf("Exit charge: due to preboot cmd '%s'\n", preboot);
 		return 0;
 	}
 
@@ -360,7 +360,7 @@ static int charge_animation_show(struct udevice *dev)
 	boot_mode = rockchip_get_boot_mode();
 	if ((boot_mode != BOOT_MODE_CHARGING) &&
 	    (boot_mode != BOOT_MODE_UNDEFINE)) {
-		debug("exit charge, due to boot mode: %d\n", boot_mode);
+		printf("Exit charge: due to boot mode\n");
 		return 0;
 	}
 #endif
@@ -368,7 +368,7 @@ static int charge_animation_show(struct udevice *dev)
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0) {
-		debug("exit charge, due to charger offline\n");
+		printf("Exit charge: due to charger offline\n");
 		return 0;
 	}
 
@@ -380,7 +380,7 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* Not enable U-Boot charge, exit */
 	if (!pdata->uboot_charge) {
-		debug("exit charge, due to not enable uboot charge\n");
+		printf("Exit charge: due to not enable uboot charge\n");
 		return 0;
 	}
 

commit d08ee362540d3f208537002f7cc7ce66bbb8d037
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Dec 4 14:42:46 2018 +0800

    configs: rk3308-aarch32: enable rk8xx pwrkey
    
    Change-Id: I2161a6640ce6e11e32f37002af993838e30506f3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index 7b7d2412b6..70c10d9eb0 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -32,6 +32,7 @@ CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y

commit 0b4bf9764efc2ef2696b06d70c3cb9bbe8331ab8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:05:16 2018 +0800

    rockchip: rk3308: enable IRQs
    
    Change-Id: I1d708bd89bbe9e2ad7a5213cc7bed22a0c2655a5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 357ffe9379..2a2991b4e2 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -214,6 +214,7 @@ config ROCKCHIP_RK3308
 	select ARM64 if !ARM64_BOOT_AARCH32
 	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
+	select GICV2
 	help
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 587b32c62d..d380b3abc5 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -25,8 +25,8 @@
 
 #define COUNTER_FREQUENCY		24000000
 
-#define GICD_BASE			0xff131000
-#define GICC_BASE			0xff132000
+#define GICD_BASE			0xff581000
+#define GICC_BASE			0xff582000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
diff --git a/include/irq-platform.h b/include/irq-platform.h
index 878de36ac9..230a16737e 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -153,6 +153,25 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#define GPIO0_PHYS			0xff220000
+#define GPIO1_PHYS			0xff230000
+#define GPIO2_PHYS			0xff240000
+#define GPIO3_PHYS			0xff250000
+#define GPIO4_PHYS			0xff260000
+
+#define IRQ_TIMER1			58	/* ch0 ns timer1 */
+#define IRQ_GPIO0			72
+#define IRQ_GPIO1			73
+#define IRQ_GPIO2			74
+#define IRQ_GPIO3			75
+#define IRQ_GPIO4			76
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
 #else
 "Missing define RIQ relative things"
 #endif
diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index d44277bacf..c9a968d39c 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -41,6 +41,9 @@
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#define TIMER_BASE		(0xFF1a0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #elif defined(CONFIG_ROCKCHIP_PX30)
 /*
  * Use timer0 and never change, because timer0 will be used in charge animation

commit f6fe8359aa8a64f9c0e1a1ff7b239084ddb08734
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 3 19:36:09 2018 +0800

    arm: crt0: don't relocate vector if CONFIG_SKIP_RELOCATE_UBOOT is enabled
    
    This patch fixes interrupt issue when uboot disable relocation.
    
    fixes: 645a442d90864589c105abad1f8e582f59724d08
    (common: support skip U-Boot relocation)
    
    Change-Id: I58928744625a10beb9cd1b60cbcefdbb521149d5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 2a6414169b..8936439f18 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -114,12 +114,23 @@ ENTRY(_main)
 	b	relocate_code
 #endif
 here:
+
 /*
- * now relocate vectors
+ * The "relocate_vectors" is in section: .text.relocate_vectors, if we don't
+ * compile "bl	relocate_vectors", there seems something wrong about sections
+ * layout(U-Boot code section is quite large, I don't find root cause now),
+ * so let's just skip it.
  */
+#ifdef CONFIG_SKIP_RELOCATE_UBOOT
+	b	c_runtime
+#endif
 
+/*
+ * now relocate vectors
+ */
 	bl	relocate_vectors
 
+c_runtime:
 /* Set up final (full) environment */
 
 	bl	c_runtime_cpu_setup	/* we still call old routine here */

commit ac374906e810aa5d24ba599975f654f25ec5a204
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 3 09:40:41 2018 +0800

    rockchip: smccc: add secure region read/write interface
    
    Adding more qoute for APIs.
    
    Change-Id: I976cfe3193c242c439195efd9d774a31af003f3c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index e16ef93eb9..6d389580d6 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -60,23 +60,88 @@ typedef enum {
 	SHARE_PAGE_TYPE_MAX,
 } share_page_type_t;
 
-/* Stand PSCI system suspend */
-int psci_system_suspend(unsigned long unused);
-
-/* Rockchip SMC Calls */
+/*
+ * sip_smc_set_suspend_mode() - Set U-Boot system suspend state before trap to trust.
+ *
+ * see kernel-4.4: drivers/soc/rockchip/rockchip_pm_config.c
+ */
 int sip_smc_set_suspend_mode(unsigned long ctrl,
 			     unsigned long config1,
 			     unsigned long config2);
 
+/*
+ * sip_smc_dram() - Set dram configure for trust.
+ *
+ * see: ./drivers/ram/rockchip/rockchip_dmc.c
+ */
 struct arm_smccc_res sip_smc_dram(unsigned long arg0,
 				  unsigned long arg1,
 				  unsigned long arg2);
 
+/*
+ * sip_smc_request_share_mem() - Request share memory from trust.
+ *
+ * @page_num:	page numbers
+ * @page_type:  page type, see: share_page_type_t
+ *
+ * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
+ *  share memory base address), otherwise failed.
+ */
 struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
 					       share_page_type_t page_type);
 
+/*
+ * sip_smc_secure_reg_read() - Read secure info(ddr/register...) from trust.
+ *
+ * @addr_phy:	address to read
+ *
+ * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
+ *  valid data), otherwise failed.
+ */
+struct arm_smccc_res sip_smc_secure_reg_read(unsigned long addr_phy);
+
+/*
+ * sip_smc_secure_reg_write() - Write data to trust secure info(ddr/register...).
+ *
+ * @addr_phy:	address to write
+ * @val:	value to write
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int sip_smc_secure_reg_write(unsigned long addr_phy, unsigned long val);
+
+/*
+ * sip_smc_set_sip_version() - Set sip version to trust.
+ *
+ * @return 0 on success, otherwise failed.
+ */
 int sip_smc_set_sip_version(unsigned long version);
+
+/*
+ * sip_smc_get_sip_version() - Get sip version to trust.
+ *
+ * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains
+ *  sip version), otherwise failed.
+ */
 struct arm_smccc_res sip_smc_get_sip_version(void);
+
+/*
+ * psci_cpu_on() - Standard ARM PSCI cpu on call.
+ *
+ * @cpuid:		cpu id
+ * @entry_point:	boot entry point
+ *
+ * @return 0 on success, otherwise failed.
+ */
 int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
 
+/*
+ * psci_system_suspend() - Standard ARM PSCI system suspend call.
+ *
+ * @unused:		unused now, always 0 recommend
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int psci_system_suspend(unsigned long unused);
+
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index 3af89fc57a..a39e5b2830 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -84,6 +84,22 @@ error:
 	return res;
 }
 
+struct arm_smccc_res sip_smc_secure_reg_read(unsigned long addr_phy)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_ACCESS_REG, 0, addr_phy, SECURE_REG_RD);
+	return res;
+}
+
+int sip_smc_secure_reg_write(unsigned long addr_phy, unsigned long val)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_ACCESS_REG, val, addr_phy, SECURE_REG_WR);
+	return res.a0;
+}
+
 struct arm_smccc_res sip_smc_get_sip_version(void)
 {
 	return __invoke_sip_fn_smc(SIP_SIP_VERSION, 0, 0, 0);

commit 71ebef54f7c9adc13483176c64513a17ebb679eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 3 16:45:44 2018 +0800

    dm: regulator: update regulator init voltage message
    
    Change-Id: Ic24328579e765d011840e383618b771a31370d9c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 5b1f574e86..a883ea0f1a 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -284,7 +284,7 @@ int regulator_autoset(struct udevice *dev)
 	if (uc_pdata->init_uV > 0) {
 		ret = regulator_set_value(dev, uc_pdata->init_uV);
 		if (!ret)
-			printf("regulator(%s) init %d uV\n",
+			printf("%s init %d uV\n",
 			       dev->name, uc_pdata->init_uV);
 	}
 

commit d51c16c5a422b3104156a013368a6bca9f4e0443
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 30 17:41:42 2018 +0800

    fuel gauge: Kconfig: remove default y for CW201x
    
    Change-Id: I1e2af720ad00f95f37b6e663db7a25feb51e40ce
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index c61b911884..e55dbc4690 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -7,7 +7,6 @@ config DM_FUEL_GAUGE
 config POWER_FG_CW201X
 	bool "CW201X Fuel gauge support"
 	depends on DM_FUEL_GAUGE
-	default y
 	help
 	  This adds support for CW201X fuel gauge support.
 

commit 16a92a426ee3d8bcd4aba3ee039c6e94031d7fbd
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Sep 5 11:19:18 2018 +0800

    rockchip dmc: add rockchip dmc code
    
    This dmc code is prepare for ddr test tool to scanning ddr freq,
    normal firmware no need to enable it.
    Current version only support PX30/RK3326 and RK3328/RK3228H,
    CONFIG_ROCKCHIP_DMC=y to enable it
    
    Change-Id: I25360846bb5af74eb82bdc6e64bdaa2d55ab0f64
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
new file mode 100644
index 0000000000..555998e6b7
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_dmc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ROCKCHIP_DMC_H_
+#define __ROCKCHIP_DMC_H_
+#include <dm.h>
+
+int rockchip_ddrclk_sip_set_rate_v2(unsigned long drate);
+unsigned long rockchip_ddrclk_sip_recalc_rate_v2(void);
+unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate);
+int rockchip_dmcfreq_probe(struct udevice *dev);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 0167f3c4df..e16ef93eb9 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -24,6 +24,16 @@
 #define SIP_REMOTECTL_CFG		0x8200000b
 #define PSCI_SIP_VPU_RESET		0x8200000c
 
+#define ROCKCHIP_SIP_CONFIG_DRAM_INIT		0x00
+#define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE	0x01
+#define ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE	0x02
+#define ROCKCHIP_SIP_CONFIG_DRAM_SET_AT_SR	0x03
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_BW		0x04
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE	0x05
+#define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ	0x06
+#define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM	0x07
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION	0x08
+
 /* Rockchip Sip version */
 #define SIP_IMPLEMENT_V1                (1)
 #define SIP_IMPLEMENT_V2                (2)
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index d26c590d9f..2cf8adefb6 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -46,3 +46,5 @@ config RAMDISK_READONLY
         depends on DM_RAMDISK
         help
           This enables the read only ramdisk support.
+
+source "drivers/ram/rockchip/Kconfig"
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
new file mode 100644
index 0000000000..ab21b34daf
--- /dev/null
+++ b/drivers/ram/rockchip/Kconfig
@@ -0,0 +1,4 @@
+config ROCKCHIP_DMC
+	bool "ROCKCHIP DMC"
+	help
+	  This enable dram devfreq driver.
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 9b12db19d4..44c95981ac 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -17,3 +17,6 @@ obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
 obj-$(CONFIG_ROCKCHIP_RK3308) = rockchip_sdram.o
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ROCKCHIP_DMC) += rockchip_dmc.o
+endif
diff --git a/drivers/ram/rockchip/rockchip_dmc.c b/drivers/ram/rockchip/rockchip_dmc.c
new file mode 100644
index 0000000000..37aaa6eab5
--- /dev/null
+++ b/drivers/ram/rockchip/rockchip_dmc.c
@@ -0,0 +1,888 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/arch/rockchip_dmc.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/of_access.h>
+#include <dt-structs.h>
+#include <linux/arm-smccc.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <ram.h>
+#include <regmap.h>
+
+#define DTS_PAR_OFFSET		(4096)
+
+struct share_params {
+	u32 hz;
+	u32 lcdc_type;
+	u32 vop;
+	u32 vop_dclk_mode;
+	u32 sr_idle_en;
+	u32 addr_mcu_el3;
+	/*
+	 * 1: need to wait flag1
+	 * 0: never wait flag1
+	 */
+	u32 wait_flag1;
+	/*
+	 * 1: need to wait flag1
+	 * 0: never wait flag1
+	 */
+	u32 wait_flag0;
+	u32 complt_hwirq;
+	/* if need, add parameter after */
+};
+
+static struct share_params *ddr_psci_param;
+
+/* hope this define can adapt all future platfor */
+static const char * const rk3328_dts_timing[] = {
+	"ddr3_speed_bin",
+	"ddr4_speed_bin",
+	"pd_idle",
+	"sr_idle",
+	"sr_mc_gate_idle",
+	"srpd_lite_idle",
+	"standby_idle",
+
+	"auto_pd_dis_freq",
+	"auto_sr_dis_freq",
+	"ddr3_dll_dis_freq",
+	"ddr4_dll_dis_freq",
+	"phy_dll_dis_freq",
+
+	"ddr3_odt_dis_freq",
+	"phy_ddr3_odt_dis_freq",
+	"ddr3_drv",
+	"ddr3_odt",
+	"phy_ddr3_ca_drv",
+	"phy_ddr3_ck_drv",
+	"phy_ddr3_dq_drv",
+	"phy_ddr3_odt",
+
+	"lpddr3_odt_dis_freq",
+	"phy_lpddr3_odt_dis_freq",
+	"lpddr3_drv",
+	"lpddr3_odt",
+	"phy_lpddr3_ca_drv",
+	"phy_lpddr3_ck_drv",
+	"phy_lpddr3_dq_drv",
+	"phy_lpddr3_odt",
+
+	"lpddr4_odt_dis_freq",
+	"phy_lpddr4_odt_dis_freq",
+	"lpddr4_drv",
+	"lpddr4_dq_odt",
+	"lpddr4_ca_odt",
+	"phy_lpddr4_ca_drv",
+	"phy_lpddr4_ck_cs_drv",
+	"phy_lpddr4_dq_drv",
+	"phy_lpddr4_odt",
+
+	"ddr4_odt_dis_freq",
+	"phy_ddr4_odt_dis_freq",
+	"ddr4_drv",
+	"ddr4_odt",
+	"phy_ddr4_ca_drv",
+	"phy_ddr4_ck_drv",
+	"phy_ddr4_dq_drv",
+	"phy_ddr4_odt",
+};
+
+static const char * const px30_dts_timing[] = {
+	"ddr2_speed_bin",
+	"ddr3_speed_bin",
+	"ddr4_speed_bin",
+	"pd_idle",
+	"sr_idle",
+	"sr_mc_gate_idle",
+	"srpd_lite_idle",
+	"standby_idle",
+
+	"auto_pd_dis_freq",
+	"auto_sr_dis_freq",
+	"ddr2_dll_dis_freq",
+	"ddr3_dll_dis_freq",
+	"ddr4_dll_dis_freq",
+	"phy_dll_dis_freq",
+
+	"ddr2_odt_dis_freq",
+	"phy_ddr2_odt_dis_freq",
+	"ddr2_drv",
+	"ddr2_odt",
+	"phy_ddr2_ca_drv",
+	"phy_ddr2_ck_drv",
+	"phy_ddr2_dq_drv",
+	"phy_ddr2_odt",
+
+	"ddr3_odt_dis_freq",
+	"phy_ddr3_odt_dis_freq",
+	"ddr3_drv",
+	"ddr3_odt",
+	"phy_ddr3_ca_drv",
+	"phy_ddr3_ck_drv",
+	"phy_ddr3_dq_drv",
+	"phy_ddr3_odt",
+
+	"phy_lpddr2_odt_dis_freq",
+	"lpddr2_drv",
+	"phy_lpddr2_ca_drv",
+	"phy_lpddr2_ck_drv",
+	"phy_lpddr2_dq_drv",
+	"phy_lpddr2_odt",
+
+	"lpddr3_odt_dis_freq",
+	"phy_lpddr3_odt_dis_freq",
+	"lpddr3_drv",
+	"lpddr3_odt",
+	"phy_lpddr3_ca_drv",
+	"phy_lpddr3_ck_drv",
+	"phy_lpddr3_dq_drv",
+	"phy_lpddr3_odt",
+
+	"lpddr4_odt_dis_freq",
+	"phy_lpddr4_odt_dis_freq",
+	"lpddr4_drv",
+	"lpddr4_dq_odt",
+	"lpddr4_ca_odt",
+	"phy_lpddr4_ca_drv",
+	"phy_lpddr4_ck_cs_drv",
+	"phy_lpddr4_dq_drv",
+	"phy_lpddr4_odt",
+
+	"ddr4_odt_dis_freq",
+	"phy_ddr4_odt_dis_freq",
+	"ddr4_drv",
+	"ddr4_odt",
+	"phy_ddr4_ca_drv",
+	"phy_ddr4_ck_drv",
+	"phy_ddr4_dq_drv",
+	"phy_ddr4_odt",
+};
+
+static const char * const rk3328_dts_ca_timing[] = {
+	"ddr3a1_ddr4a9_de-skew",
+	"ddr3a0_ddr4a10_de-skew",
+	"ddr3a3_ddr4a6_de-skew",
+	"ddr3a2_ddr4a4_de-skew",
+	"ddr3a5_ddr4a8_de-skew",
+	"ddr3a4_ddr4a5_de-skew",
+	"ddr3a7_ddr4a11_de-skew",
+	"ddr3a6_ddr4a7_de-skew",
+	"ddr3a9_ddr4a0_de-skew",
+	"ddr3a8_ddr4a13_de-skew",
+	"ddr3a11_ddr4a3_de-skew",
+	"ddr3a10_ddr4cs0_de-skew",
+	"ddr3a13_ddr4a2_de-skew",
+	"ddr3a12_ddr4ba1_de-skew",
+	"ddr3a15_ddr4odt0_de-skew",
+	"ddr3a14_ddr4a1_de-skew",
+	"ddr3ba1_ddr4a15_de-skew",
+	"ddr3ba0_ddr4bg0_de-skew",
+	"ddr3ras_ddr4cke_de-skew",
+	"ddr3ba2_ddr4ba0_de-skew",
+	"ddr3we_ddr4bg1_de-skew",
+	"ddr3cas_ddr4a12_de-skew",
+	"ddr3ckn_ddr4ckn_de-skew",
+	"ddr3ckp_ddr4ckp_de-skew",
+	"ddr3cke_ddr4a16_de-skew",
+	"ddr3odt0_ddr4a14_de-skew",
+	"ddr3cs0_ddr4act_de-skew",
+	"ddr3reset_ddr4reset_de-skew",
+	"ddr3cs1_ddr4cs1_de-skew",
+	"ddr3odt1_ddr4odt1_de-skew",
+};
+
+static const char * const rk3328_dts_cs0_timing[] = {
+	"cs0_dm0_rx_de-skew",
+	"cs0_dm0_tx_de-skew",
+	"cs0_dq0_rx_de-skew",
+	"cs0_dq0_tx_de-skew",
+	"cs0_dq1_rx_de-skew",
+	"cs0_dq1_tx_de-skew",
+	"cs0_dq2_rx_de-skew",
+	"cs0_dq2_tx_de-skew",
+	"cs0_dq3_rx_de-skew",
+	"cs0_dq3_tx_de-skew",
+	"cs0_dq4_rx_de-skew",
+	"cs0_dq4_tx_de-skew",
+	"cs0_dq5_rx_de-skew",
+	"cs0_dq5_tx_de-skew",
+	"cs0_dq6_rx_de-skew",
+	"cs0_dq6_tx_de-skew",
+	"cs0_dq7_rx_de-skew",
+	"cs0_dq7_tx_de-skew",
+	"cs0_dqs0_rx_de-skew",
+	"cs0_dqs0p_tx_de-skew",
+	"cs0_dqs0n_tx_de-skew",
+
+	"cs0_dm1_rx_de-skew",
+	"cs0_dm1_tx_de-skew",
+	"cs0_dq8_rx_de-skew",
+	"cs0_dq8_tx_de-skew",
+	"cs0_dq9_rx_de-skew",
+	"cs0_dq9_tx_de-skew",
+	"cs0_dq10_rx_de-skew",
+	"cs0_dq10_tx_de-skew",
+	"cs0_dq11_rx_de-skew",
+	"cs0_dq11_tx_de-skew",
+	"cs0_dq12_rx_de-skew",
+	"cs0_dq12_tx_de-skew",
+	"cs0_dq13_rx_de-skew",
+	"cs0_dq13_tx_de-skew",
+	"cs0_dq14_rx_de-skew",
+	"cs0_dq14_tx_de-skew",
+	"cs0_dq15_rx_de-skew",
+	"cs0_dq15_tx_de-skew",
+	"cs0_dqs1_rx_de-skew",
+	"cs0_dqs1p_tx_de-skew",
+	"cs0_dqs1n_tx_de-skew",
+
+	"cs0_dm2_rx_de-skew",
+	"cs0_dm2_tx_de-skew",
+	"cs0_dq16_rx_de-skew",
+	"cs0_dq16_tx_de-skew",
+	"cs0_dq17_rx_de-skew",
+	"cs0_dq17_tx_de-skew",
+	"cs0_dq18_rx_de-skew",
+	"cs0_dq18_tx_de-skew",
+	"cs0_dq19_rx_de-skew",
+	"cs0_dq19_tx_de-skew",
+	"cs0_dq20_rx_de-skew",
+	"cs0_dq20_tx_de-skew",
+	"cs0_dq21_rx_de-skew",
+	"cs0_dq21_tx_de-skew",
+	"cs0_dq22_rx_de-skew",
+	"cs0_dq22_tx_de-skew",
+	"cs0_dq23_rx_de-skew",
+	"cs0_dq23_tx_de-skew",
+	"cs0_dqs2_rx_de-skew",
+	"cs0_dqs2p_tx_de-skew",
+	"cs0_dqs2n_tx_de-skew",
+
+	"cs0_dm3_rx_de-skew",
+	"cs0_dm3_tx_de-skew",
+	"cs0_dq24_rx_de-skew",
+	"cs0_dq24_tx_de-skew",
+	"cs0_dq25_rx_de-skew",
+	"cs0_dq25_tx_de-skew",
+	"cs0_dq26_rx_de-skew",
+	"cs0_dq26_tx_de-skew",
+	"cs0_dq27_rx_de-skew",
+	"cs0_dq27_tx_de-skew",
+	"cs0_dq28_rx_de-skew",
+	"cs0_dq28_tx_de-skew",
+	"cs0_dq29_rx_de-skew",
+	"cs0_dq29_tx_de-skew",
+	"cs0_dq30_rx_de-skew",
+	"cs0_dq30_tx_de-skew",
+	"cs0_dq31_rx_de-skew",
+	"cs0_dq31_tx_de-skew",
+	"cs0_dqs3_rx_de-skew",
+	"cs0_dqs3p_tx_de-skew",
+	"cs0_dqs3n_tx_de-skew",
+};
+
+static const char * const rk3328_dts_cs1_timing[] = {
+	"cs1_dm0_rx_de-skew",
+	"cs1_dm0_tx_de-skew",
+	"cs1_dq0_rx_de-skew",
+	"cs1_dq0_tx_de-skew",
+	"cs1_dq1_rx_de-skew",
+	"cs1_dq1_tx_de-skew",
+	"cs1_dq2_rx_de-skew",
+	"cs1_dq2_tx_de-skew",
+	"cs1_dq3_rx_de-skew",
+	"cs1_dq3_tx_de-skew",
+	"cs1_dq4_rx_de-skew",
+	"cs1_dq4_tx_de-skew",
+	"cs1_dq5_rx_de-skew",
+	"cs1_dq5_tx_de-skew",
+	"cs1_dq6_rx_de-skew",
+	"cs1_dq6_tx_de-skew",
+	"cs1_dq7_rx_de-skew",
+	"cs1_dq7_tx_de-skew",
+	"cs1_dqs0_rx_de-skew",
+	"cs1_dqs0p_tx_de-skew",
+	"cs1_dqs0n_tx_de-skew",
+
+	"cs1_dm1_rx_de-skew",
+	"cs1_dm1_tx_de-skew",
+	"cs1_dq8_rx_de-skew",
+	"cs1_dq8_tx_de-skew",
+	"cs1_dq9_rx_de-skew",
+	"cs1_dq9_tx_de-skew",
+	"cs1_dq10_rx_de-skew",
+	"cs1_dq10_tx_de-skew",
+	"cs1_dq11_rx_de-skew",
+	"cs1_dq11_tx_de-skew",
+	"cs1_dq12_rx_de-skew",
+	"cs1_dq12_tx_de-skew",
+	"cs1_dq13_rx_de-skew",
+	"cs1_dq13_tx_de-skew",
+	"cs1_dq14_rx_de-skew",
+	"cs1_dq14_tx_de-skew",
+	"cs1_dq15_rx_de-skew",
+	"cs1_dq15_tx_de-skew",
+	"cs1_dqs1_rx_de-skew",
+	"cs1_dqs1p_tx_de-skew",
+	"cs1_dqs1n_tx_de-skew",
+
+	"cs1_dm2_rx_de-skew",
+	"cs1_dm2_tx_de-skew",
+	"cs1_dq16_rx_de-skew",
+	"cs1_dq16_tx_de-skew",
+	"cs1_dq17_rx_de-skew",
+	"cs1_dq17_tx_de-skew",
+	"cs1_dq18_rx_de-skew",
+	"cs1_dq18_tx_de-skew",
+	"cs1_dq19_rx_de-skew",
+	"cs1_dq19_tx_de-skew",
+	"cs1_dq20_rx_de-skew",
+	"cs1_dq20_tx_de-skew",
+	"cs1_dq21_rx_de-skew",
+	"cs1_dq21_tx_de-skew",
+	"cs1_dq22_rx_de-skew",
+	"cs1_dq22_tx_de-skew",
+	"cs1_dq23_rx_de-skew",
+	"cs1_dq23_tx_de-skew",
+	"cs1_dqs2_rx_de-skew",
+	"cs1_dqs2p_tx_de-skew",
+	"cs1_dqs2n_tx_de-skew",
+
+	"cs1_dm3_rx_de-skew",
+	"cs1_dm3_tx_de-skew",
+	"cs1_dq24_rx_de-skew",
+	"cs1_dq24_tx_de-skew",
+	"cs1_dq25_rx_de-skew",
+	"cs1_dq25_tx_de-skew",
+	"cs1_dq26_rx_de-skew",
+	"cs1_dq26_tx_de-skew",
+	"cs1_dq27_rx_de-skew",
+	"cs1_dq27_tx_de-skew",
+	"cs1_dq28_rx_de-skew",
+	"cs1_dq28_tx_de-skew",
+	"cs1_dq29_rx_de-skew",
+	"cs1_dq29_tx_de-skew",
+	"cs1_dq30_rx_de-skew",
+	"cs1_dq30_tx_de-skew",
+	"cs1_dq31_rx_de-skew",
+	"cs1_dq31_tx_de-skew",
+	"cs1_dqs3_rx_de-skew",
+	"cs1_dqs3p_tx_de-skew",
+	"cs1_dqs3n_tx_de-skew",
+};
+
+struct rk3328_ddr_dts_config_timing {
+	unsigned int ddr3_speed_bin;
+	unsigned int ddr4_speed_bin;
+	unsigned int pd_idle;
+	unsigned int sr_idle;
+	unsigned int sr_mc_gate_idle;
+	unsigned int srpd_lite_idle;
+	unsigned int standby_idle;
+
+	unsigned int auto_pd_dis_freq;
+	unsigned int auto_sr_dis_freq;
+	/* for ddr3 only */
+	unsigned int ddr3_dll_dis_freq;
+	/* for ddr4 only */
+	unsigned int ddr4_dll_dis_freq;
+	unsigned int phy_dll_dis_freq;
+
+	unsigned int ddr3_odt_dis_freq;
+	unsigned int phy_ddr3_odt_dis_freq;
+	unsigned int ddr3_drv;
+	unsigned int ddr3_odt;
+	unsigned int phy_ddr3_ca_drv;
+	unsigned int phy_ddr3_ck_drv;
+	unsigned int phy_ddr3_dq_drv;
+	unsigned int phy_ddr3_odt;
+
+	unsigned int lpddr3_odt_dis_freq;
+	unsigned int phy_lpddr3_odt_dis_freq;
+	unsigned int lpddr3_drv;
+	unsigned int lpddr3_odt;
+	unsigned int phy_lpddr3_ca_drv;
+	unsigned int phy_lpddr3_ck_drv;
+	unsigned int phy_lpddr3_dq_drv;
+	unsigned int phy_lpddr3_odt;
+
+	unsigned int lpddr4_odt_dis_freq;
+	unsigned int phy_lpddr4_odt_dis_freq;
+	unsigned int lpddr4_drv;
+	unsigned int lpddr4_dq_odt;
+	unsigned int lpddr4_ca_odt;
+	unsigned int phy_lpddr4_ca_drv;
+	unsigned int phy_lpddr4_ck_cs_drv;
+	unsigned int phy_lpddr4_dq_drv;
+	unsigned int phy_lpddr4_odt;
+
+	unsigned int ddr4_odt_dis_freq;
+	unsigned int phy_ddr4_odt_dis_freq;
+	unsigned int ddr4_drv;
+	unsigned int ddr4_odt;
+	unsigned int phy_ddr4_ca_drv;
+	unsigned int phy_ddr4_ck_drv;
+	unsigned int phy_ddr4_dq_drv;
+	unsigned int phy_ddr4_odt;
+
+	unsigned int ca_skew[15];
+	unsigned int cs0_skew[44];
+	unsigned int cs1_skew[44];
+
+	unsigned int available;
+};
+
+struct px30_ddr_dts_config_timing {
+	unsigned int ddr2_speed_bin;
+	unsigned int ddr3_speed_bin;
+	unsigned int ddr4_speed_bin;
+	unsigned int pd_idle;
+	unsigned int sr_idle;
+	unsigned int sr_mc_gate_idle;
+	unsigned int srpd_lite_idle;
+	unsigned int standby_idle;
+
+	unsigned int auto_pd_dis_freq;
+	unsigned int auto_sr_dis_freq;
+	/* for ddr2 only */
+	unsigned int ddr2_dll_dis_freq;
+	/* for ddr3 only */
+	unsigned int ddr3_dll_dis_freq;
+	/* for ddr4 only */
+	unsigned int ddr4_dll_dis_freq;
+	unsigned int phy_dll_dis_freq;
+
+	unsigned int ddr2_odt_dis_freq;
+	unsigned int phy_ddr2_odt_dis_freq;
+	unsigned int ddr2_drv;
+	unsigned int ddr2_odt;
+	unsigned int phy_ddr2_ca_drv;
+	unsigned int phy_ddr2_ck_drv;
+	unsigned int phy_ddr2_dq_drv;
+	unsigned int phy_ddr2_odt;
+
+	unsigned int ddr3_odt_dis_freq;
+	unsigned int phy_ddr3_odt_dis_freq;
+	unsigned int ddr3_drv;
+	unsigned int ddr3_odt;
+	unsigned int phy_ddr3_ca_drv;
+	unsigned int phy_ddr3_ck_drv;
+	unsigned int phy_ddr3_dq_drv;
+	unsigned int phy_ddr3_odt;
+
+	unsigned int phy_lpddr2_odt_dis_freq;
+	unsigned int lpddr2_drv;
+	unsigned int phy_lpddr2_ca_drv;
+	unsigned int phy_lpddr2_ck_drv;
+	unsigned int phy_lpddr2_dq_drv;
+	unsigned int phy_lpddr2_odt;
+
+	unsigned int lpddr3_odt_dis_freq;
+	unsigned int phy_lpddr3_odt_dis_freq;
+	unsigned int lpddr3_drv;
+	unsigned int lpddr3_odt;
+	unsigned int phy_lpddr3_ca_drv;
+	unsigned int phy_lpddr3_ck_drv;
+	unsigned int phy_lpddr3_dq_drv;
+	unsigned int phy_lpddr3_odt;
+
+	unsigned int lpddr4_odt_dis_freq;
+	unsigned int phy_lpddr4_odt_dis_freq;
+	unsigned int lpddr4_drv;
+	unsigned int lpddr4_dq_odt;
+	unsigned int lpddr4_ca_odt;
+	unsigned int phy_lpddr4_ca_drv;
+	unsigned int phy_lpddr4_ck_cs_drv;
+	unsigned int phy_lpddr4_dq_drv;
+	unsigned int phy_lpddr4_odt;
+
+	unsigned int ddr4_odt_dis_freq;
+	unsigned int phy_ddr4_odt_dis_freq;
+	unsigned int ddr4_drv;
+	unsigned int ddr4_odt;
+	unsigned int phy_ddr4_ca_drv;
+	unsigned int phy_ddr4_ck_drv;
+	unsigned int phy_ddr4_dq_drv;
+	unsigned int phy_ddr4_odt;
+
+	unsigned int ca_skew[15];
+	unsigned int cs0_skew[44];
+	unsigned int cs1_skew[44];
+
+	unsigned int available;
+};
+
+struct rk3328_ddr_de_skew_setting {
+	unsigned int ca_de_skew[30];
+	unsigned int cs0_de_skew[84];
+	unsigned int cs1_de_skew[84];
+};
+
+static void
+rk3328_de_skew_setting_2_register(struct rk3328_ddr_de_skew_setting *de_skew,
+				  struct rk3328_ddr_dts_config_timing *tim)
+{
+	u32 n;
+	u32 offset;
+	u32 shift;
+
+	memset_io(tim->ca_skew, 0, sizeof(tim->ca_skew));
+	memset_io(tim->cs0_skew, 0, sizeof(tim->cs0_skew));
+	memset_io(tim->cs1_skew, 0, sizeof(tim->cs1_skew));
+
+	/* CA de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->ca_de_skew); n++) {
+		offset = n / 2;
+		shift = n % 2;
+		/* 0 => 4; 1 => 0 */
+		shift = (shift == 0) ? 4 : 0;
+		tim->ca_skew[offset] &= ~(0xf << shift);
+		tim->ca_skew[offset] |= (de_skew->ca_de_skew[n] << shift);
+	}
+
+	/* CS0 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs0_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs0_skew[offset] &= ~(0xf << shift);
+		tim->cs0_skew[offset] |= (de_skew->cs0_de_skew[n] << shift);
+	}
+
+	/* CS1 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs1_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs1_skew[offset] &= ~(0xf << shift);
+		tim->cs1_skew[offset] |= (de_skew->cs1_de_skew[n] << shift);
+	}
+}
+
+static void px30_de_skew_set_2_reg(struct rk3328_ddr_de_skew_setting *de_skew,
+				   struct px30_ddr_dts_config_timing *tim)
+{
+	u32 n;
+	u32 offset;
+	u32 shift;
+
+	memset_io(tim->ca_skew, 0, sizeof(tim->ca_skew));
+	memset_io(tim->cs0_skew, 0, sizeof(tim->cs0_skew));
+	memset_io(tim->cs1_skew, 0, sizeof(tim->cs1_skew));
+
+	/* CA de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->ca_de_skew); n++) {
+		offset = n / 2;
+		shift = n % 2;
+		/* 0 => 4; 1 => 0 */
+		shift = (shift == 0) ? 4 : 0;
+		tim->ca_skew[offset] &= ~(0xf << shift);
+		tim->ca_skew[offset] |= (de_skew->ca_de_skew[n] << shift);
+	}
+
+	/* CS0 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs0_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs0_skew[offset] &= ~(0xf << shift);
+		tim->cs0_skew[offset] |= (de_skew->cs0_de_skew[n] << shift);
+	}
+
+	/* CS1 data de-skew */
+	for (n = 0; n < ARRAY_SIZE(de_skew->cs1_de_skew); n++) {
+		offset = ((n / 21) * 11) + ((n % 21) / 2);
+		shift = ((n % 21) % 2);
+		if ((n % 21) == 20)
+			shift = 0;
+		else
+			/* 0 => 4; 1 => 0 */
+			shift = (shift == 0) ? 4 : 0;
+		tim->cs1_skew[offset] &= ~(0xf << shift);
+		tim->cs1_skew[offset] |= (de_skew->cs1_de_skew[n] << shift);
+	}
+}
+
+static void of_get_rk3328_timings(struct udevice *dev, uint32_t *timing)
+{
+	struct device_node *np_tim;
+	u32 *p;
+	struct rk3328_ddr_dts_config_timing *dts_timing;
+	struct rk3328_ddr_de_skew_setting *de_skew;
+	int ret = 0;
+	u32 i;
+
+	dts_timing =
+		(struct rk3328_ddr_dts_config_timing *)(timing +
+							DTS_PAR_OFFSET / 4);
+
+	np_tim = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)),
+				  "ddr_timing", 0);
+	if (!np_tim) {
+		ret = -EINVAL;
+		goto end;
+	}
+	de_skew = malloc(sizeof(*de_skew));
+	if (!de_skew) {
+		ret = -ENOMEM;
+		goto end;
+	}
+	p = (u32 *)dts_timing;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_timing[i], p + i);
+
+	p = (u32 *)de_skew->ca_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_ca_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_ca_timing[i], p + i);
+	p = (u32 *)de_skew->cs0_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs0_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs0_timing[i], p + i);
+	p = (u32 *)de_skew->cs1_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs1_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs1_timing[i], p + i);
+
+	if (!ret)
+		rk3328_de_skew_setting_2_register(de_skew, dts_timing);
+	free(de_skew);
+end:
+	if (!ret) {
+		dts_timing->available = 1;
+	} else {
+		dts_timing->available = 0;
+		printf("of_get_ddr_timings: fail\n");
+	}
+}
+
+static void of_get_px30_timings(struct udevice *dev, uint32_t *timing)
+{
+	struct device_node *np_tim;
+	u32 *p;
+	struct px30_ddr_dts_config_timing *dts_timing;
+	struct rk3328_ddr_de_skew_setting *de_skew;
+	int ret = 0;
+	u32 i;
+
+	dts_timing =
+		(struct px30_ddr_dts_config_timing *)(timing +
+							DTS_PAR_OFFSET / 4);
+
+	np_tim = of_parse_phandle(ofnode_to_np(dev_ofnode(dev)),
+				  "ddr_timing", 0);
+	if (!np_tim) {
+		ret = -EINVAL;
+		goto end;
+	}
+	de_skew = malloc(sizeof(*de_skew));
+	if (!de_skew) {
+		ret = -ENOMEM;
+		goto end;
+	}
+	p = (u32 *)dts_timing;
+	for (i = 0; i < ARRAY_SIZE(px30_dts_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim), px30_dts_timing[i],
+					p + i);
+	p = (u32 *)de_skew->ca_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_ca_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_ca_timing[i], p + i);
+	p = (u32 *)de_skew->cs0_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs0_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs0_timing[i], p + i);
+	p = (u32 *)de_skew->cs1_de_skew;
+	for (i = 0; i < ARRAY_SIZE(rk3328_dts_cs1_timing); i++)
+		ret |= ofnode_read_u32(np_to_ofnode(np_tim),
+				       rk3328_dts_cs1_timing[i], p + i);
+	if (!ret)
+		px30_de_skew_set_2_reg(de_skew, dts_timing);
+	free(de_skew);
+end:
+	if (!ret) {
+		dts_timing->available = 1;
+	} else {
+		dts_timing->available = 0;
+		printf("of_get_ddr_timings: fail\n");
+	}
+}
+
+static __maybe_unused int rk3328_devfreq_init(struct udevice *dev)
+{
+	struct arm_smccc_res res;
+	u32 size;
+
+	res = sip_smc_dram(0, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION);
+	printf("current ATF version 0x%lx!\n", res.a1);
+	if (res.a0 || res.a1 < 0x101) {
+		printf("trusted firmware need to update or is invalid!\n");
+		return -ENXIO;
+	}
+
+	printf("read tf version 0x%lx!\n", res.a1);
+
+	/*
+	 * first 4KB is used for interface parameters
+	 * after 4KB * N is dts parameters
+	 */
+	size = sizeof(struct rk3328_ddr_dts_config_timing);
+	res = sip_smc_request_share_mem(DIV_ROUND_UP(size, 4096) + 1,
+					SHARE_PAGE_TYPE_DDR);
+	if (res.a0 != 0) {
+		printf("no ATF memory for init\n");
+		return -ENOMEM;
+	}
+	ddr_psci_param = (struct share_params *)res.a1;
+	of_get_rk3328_timings(dev, (uint32_t *)ddr_psci_param);
+
+	flush_cache((unsigned long)ddr_psci_param,
+		    (DIV_ROUND_UP(size, 4096) + 1) * 0x1000);
+
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_INIT);
+	if (res.a0) {
+		printf("rockchip_sip_config_dram_init error:%lx\n",
+		       res.a0);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static __maybe_unused int px30_devfreq_init(struct udevice *dev)
+{
+	struct arm_smccc_res res;
+	u32 size;
+
+	res = sip_smc_dram(0, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION);
+	printf("current ATF version 0x%lx!\n", res.a1);
+	if (res.a0 || res.a1 < 0x103) {
+		printf("trusted firmware need to update or is invalid!\n");
+		return -ENXIO;
+	}
+
+	printf("read tf version 0x%lx!\n", res.a1);
+
+	/*
+	 * first 4KB is used for interface parameters
+	 * after 4KB * N is dts parameters
+	 */
+	size = sizeof(struct px30_ddr_dts_config_timing);
+	res = sip_smc_request_share_mem(DIV_ROUND_UP(size, 4096) + 1,
+					SHARE_PAGE_TYPE_DDR);
+	if (res.a0 != 0) {
+		printf("no ATF memory for init\n");
+		return -ENOMEM;
+	}
+
+	ddr_psci_param = (struct share_params *)res.a1;
+	of_get_px30_timings(dev, (uint32_t *)ddr_psci_param);
+
+	flush_cache((unsigned long)ddr_psci_param,
+		    (DIV_ROUND_UP(size, 4096) + 1) * 0x1000);
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_INIT);
+	if (res.a0) {
+		printf("rockchip_sip_config_dram_init error:%lx\n",
+		       res.a0);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+int rockchip_ddrclk_sip_set_rate_v2(unsigned long drate)
+{
+	struct share_params *p;
+	struct arm_smccc_res res;
+
+	p = ddr_psci_param;
+
+	p->hz = drate;
+	p->lcdc_type = 0;
+	p->wait_flag1 = 0;
+	p->wait_flag0 = 0;
+	p->complt_hwirq = 105;
+
+	flush_cache((unsigned long)ddr_psci_param, sizeof(struct share_params));
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE);
+
+	return res.a0;
+}
+
+unsigned long rockchip_ddrclk_sip_recalc_rate_v2(void)
+{
+	struct arm_smccc_res res;
+
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE);
+	if (!res.a0)
+		return res.a1;
+	else
+		return 0;
+}
+
+unsigned long rockchip_ddrclk_sip_round_rate_v2(unsigned long rate)
+{
+	struct share_params *p;
+	struct arm_smccc_res res;
+
+	p = ddr_psci_param;
+
+	p->hz = rate;
+
+	flush_cache((unsigned long)ddr_psci_param, sizeof(struct share_params));
+
+	res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
+			   ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE);
+	if (!res.a0)
+		return res.a1;
+	else
+		return 0;
+}
+
+int rockchip_dmcfreq_probe(struct udevice *dev)
+{
+	int ret;
+
+#if defined(CONFIG_ROCKCHIP_PX30)
+	ret = px30_devfreq_init(dev);
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	ret = rk3328_devfreq_init(dev);
+#else
+	ret = -1;
+	printf("Unsupported chip type\n");
+#endif
+	if (ret)
+		return ret;
+
+	printf("dram freq:%ld Hz\n", rockchip_ddrclk_sip_recalc_rate_v2());
+
+	return 0;
+}
diff --git a/drivers/ram/rockchip/rockchip_sdram.c b/drivers/ram/rockchip/rockchip_sdram.c
index aa65623108..78e15eb142 100644
--- a/drivers/ram/rockchip/rockchip_sdram.c
+++ b/drivers/ram/rockchip/rockchip_sdram.c
@@ -12,6 +12,7 @@
 #include <asm/arch/grf_rk1808.h>
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/grf_rk3308.h>
+#include <asm/arch/rockchip_dmc.h>
 #include <asm/arch/sdram_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -23,35 +24,47 @@ struct dram_info {
 
 static int dmc_probe(struct udevice *dev)
 {
+	int ret = 0;
 	struct dram_info *priv = dev_get_priv(dev);
 
+	if (!(gd->flags & GD_FLG_RELOC)) {
 #if defined(CONFIG_ROCKCHIP_RK3036)
-	struct rk3036_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		struct rk3036_grf *grf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
-	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]);
 #elif defined(CONFIG_ROCKCHIP_RK3308)
-	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		struct rk3308_grf *grf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
-	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
 #elif defined(CONFIG_ROCKCHIP_PX30)
-	struct px30_pmugrf *pmugrf =
-		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+		struct px30_pmugrf *pmugrf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
 #elif defined(CONFIG_ROCKCHIP_RK1808)
-	struct rk1808_pmugrf *pmugrf =
-		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+		struct rk1808_pmugrf *pmugrf =
+			syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
 #else
 #error chip error
 #endif
+		priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	} else {
+#if defined(CONFIG_ROCKCHIP_PX30)
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ROCKCHIP_DMC)
+		ret = rockchip_dmcfreq_probe(dev);
+#endif
+#endif
+	}
 
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-
-	return 0;
+	return ret;
 }
 
 static int dmc_get_info(struct udevice *dev, struct ram_info *info)
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 7782d6a690..1941e1c9e2 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -15,6 +15,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3328.h>
 #include <asm/arch/grf_rk3328.h>
+#include <asm/arch/rockchip_dmc.h>
 #include <asm/arch/sdram_common.h>
 #include <asm/arch/sdram_rk3328.h>
 #include <asm/arch/uart.h>
@@ -981,17 +982,20 @@ static int rk3328_dmc_ofdata_to_platdata(struct udevice *dev)
 
 static int rk3328_dmc_probe(struct udevice *dev)
 {
+	int ret = 0;
 #ifdef CONFIG_TPL_BUILD
 	if (rk3328_dmc_init(dev))
 		return 0;
 #else
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-				(phys_addr_t)&priv->grf->os_reg[2]);
+	struct dram_info *priv;
+
+	if (!(gd->flags & GD_FLG_RELOC)) {
+		priv = dev_get_priv(dev);
+		priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+		debug("%s: grf=%p\n", __func__, priv->grf);
+		priv->info.base = CONFIG_SYS_SDRAM_BASE;
+		priv->info.size =
+			rockchip_sdram_size((phys_addr_t)&priv->grf->os_reg[2]);
 #ifdef CONFIG_SPL_BUILD
 	struct ddr_param ddr_parem;
 
@@ -1000,8 +1004,13 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	ddr_parem.para[1] = priv->info.size;
 	rockchip_setup_ddr_param(&ddr_parem);
 #endif
+	} else {
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_ROCKCHIP_DMC)
+		ret = rockchip_dmcfreq_probe(dev);
 #endif
-	return 0;
+	}
+#endif
+	return ret;
 }
 
 static int rk3328_dmc_get_info(struct udevice *dev, struct ram_info *info)

commit 94727c946fcad341c75edf65baf764de1481306a
Author: zain wang <wzz@rock-chips.com>
Date:   Fri Nov 30 16:52:27 2018 +0800

    rockchip: rk3326: enable lzo/lz4 compressed kernel image
    
    Change-Id: Ia86b0be60cebf55e53ddc3b33679104f216579a6
    Signed-off-by: zain wang <wzz@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index b78fb4f43b..a13a5e2889 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -5,26 +5,25 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
-CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -78,7 +77,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -95,15 +93,15 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index cb26415285..4b1c5457db 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -53,6 +53,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_c=0x03e80000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit fafc46378e5842c5e3cf78c73775f2ae5a98dc10
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 19:06:51 2018 +0800

    rockchip: sdhci: print helpful message out explicitly
    
    Change-Id: If51e25ed7e1b321edd06eaa153894ec638a7963a
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 592f31ec4f..4f0a8e7ab2 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -86,7 +86,7 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 	caldone = readl(&phy->emmcphy_status);
 	caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK;
 	if (caldone != PHYCTRL_CALDONE_DONE) {
-		debug("%s: caldone timeout.\n", __func__);
+		printf("%s: caldone timeout.\n", __func__);
 		return;
 	}
 
@@ -115,7 +115,7 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 	} while (get_timer(start) < 50000);
 
 	if (dllrdy != PHYCTRL_DLLRDY_DONE)
-		debug("%s: dllrdy timeout.\n", __func__);
+		printf("%s: dllrdy timeout.\n", __func__);
 }
 
 static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)

commit 5727ee429586583c072e969f4209c0656e861880
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Nov 12 00:03:34 2018 -0800

    drivers: rkflash: dump ret when flash init failed
    
    1.dump flash id;
    2.dump ret.
    
    Change-Id: I850fdfadaa12cde62953a0e109e16510b66a8b5e
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
index 30e0c680a9..c632897c23 100644
--- a/drivers/rkflash/rknandc_base.c
+++ b/drivers/rkflash/rknandc_base.c
@@ -98,6 +98,8 @@ static int rockchip_nand_probe(struct udevice *udev)
 					      nandc_flash_op.vendor_write);
 #endif
 		debug("%s probe success\n", __func__);
+	} else {
+		pr_err("ret %d\n", ret);
 	}
 
 	return ret;
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index d9075a3e74..a42fb09639 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -127,6 +127,8 @@ static int rockchip_rksfc_probe(struct udevice *udev)
 #endif
 			debug("%s probe success\n", __func__);
 			break;
+		} else {
+			pr_err("ret %d\n", ret);
 		}
 	}
 
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 2ef7a2f21d..18f5a04d8d 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -654,7 +654,7 @@ u32 sfc_nand_init(void)
 	PRINT_SFC_I("...%s enter...\n", __func__);
 
 	sfc_nand_read_id_raw(id_byte);
-	PRINT_SFC_I("sfc_nand id: %x %x %x\n",
+	PRINT_SFC_E("sfc_nand id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
 		return FTL_NO_FLASH;
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index db78567d78..74f20a5798 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -536,7 +536,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 
 	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
 	snor_read_id(id_byte);
-	PRINT_SFC_I("sfc nor id: %x %x %x\n",
+	PRINT_SFC_E("sfc nor id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (0xFF == id_byte[0] || 0x00 == id_byte[0]) {
 		err = SFC_ERROR;

commit 9841897eb91367ee57c09032b41a2c07bc7b7642
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 20:12:38 2018 +0800

    arm: rockchip: select SKIP_RELOCATE_UBOOT
    
    there is no necessary reason to do uboot relocation, and actually
    it brings trouble for our debug at some time, so skip it.
    
    Change-Id: I56567a6ff13c8431e7e1773652826692ec0e6c9e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 895346ab40..99aa72b583 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1132,6 +1132,7 @@ config ARCH_ROCKCHIP
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select SYS_NS16550
+	select SKIP_RELOCATE_UBOOT
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE

commit 645a442d90864589c105abad1f8e582f59724d08
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 11:42:39 2018 +0800

    common: support skip U-Boot relocation
    
    Change-Id: I8640907204c82928c2fb07177835dc55a126aaf0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index c6a9c90828..2a6414169b 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -103,6 +103,7 @@ ENTRY(_main)
 	ldr	r9, [r9, #GD_BD]		/* r9 = gd->bd */
 	sub	r9, r9, #GD_SIZE		/* new GD is below bd */
 
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
 	adr	lr, here
 	ldr	r0, [r9, #GD_RELOC_OFF]		/* r0 = gd->reloc_off */
 	add	lr, lr, r0
@@ -111,6 +112,7 @@ ENTRY(_main)
 #endif
 	ldr	r0, [r9, #GD_RELOCADDR]		/* r0 = gd->relocaddr */
 	b	relocate_code
+#endif
 here:
 /*
  * now relocate vectors
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index bac5de4081..d34e49cc8a 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -98,6 +98,7 @@ ENTRY(_main)
 	bic	sp, x0, #0xf	/* 16-byte alignment for ABI compliance */
 	ldr	x18, [x18, #GD_NEW_GD]		/* x18 <- gd->new_gd */
 
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
 	adr	lr, relocation_return
 #if CONFIG_POSITION_INDEPENDENT
 	/* Add in link-vs-runtime offset */
@@ -111,6 +112,7 @@ ENTRY(_main)
 	add	lr, lr, x9	/* new return address after relocation */
 	ldr	x0, [x18, #GD_RELOCADDR]	/* x0 <- gd->relocaddr */
 	b	relocate_code
+#endif
 
 relocation_return:
 
diff --git a/common/Kconfig b/common/Kconfig
index 8856c7d520..980fb15643 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -609,6 +609,11 @@ config ANDROID_BOOT_IMAGE
 	  This enables support for booting images which use the Android
 	  image format header.
 
+config SKIP_RELOCATE_UBOOT
+	bool "Skip U-Boot relocation"
+	help
+	  This enable support for skipping U-Boot relocation.
+
 menu "Security support"
 
 config HASH
diff --git a/common/board_f.c b/common/board_f.c
index 8ce40bef74..888dc367ae 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -627,6 +627,7 @@ static int setup_reloc(void)
 		return 0;
 	}
 
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
 #ifdef CONFIG_SYS_TEXT_BASE
 #ifdef ARM
 	gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
@@ -639,6 +640,10 @@ static int setup_reloc(void)
 #else
 	gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 #endif
+#endif
+
+#else
+	gd->reloc_off = 0;
 #endif
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
diff --git a/common/board_r.c b/common/board_r.c
index 3885fd4c66..5f41768878 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -338,7 +338,15 @@ __weak int power_init_board(void)
 
 static int initr_announce(void)
 {
-	debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr);
+	ulong addr;
+
+#ifndef CONFIG_SKIP_RELOCATE_UBOOT
+	addr = gd->relocaddr;
+#else
+	addr = CONFIG_SYS_TEXT_BASE;
+#endif
+	debug("Now running in RAM - U-Boot at: %08lx\n", addr);
+
 	return 0;
 }
 

commit 3065df6c98538ebb0827d4abcb09f87fa9ee1928
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Nov 1 17:55:12 2018 +0800

    ARCH: arm: px30: clear force_jtag mode
    
    If SDMMC0_DET pull low gpio1_d4/d5 mux as sdmmc functions, otherwise
    they mux as JTAG or UART. But the jtag_force(grf_cpu_con1[7])
    is enable after reset.
    
    This clear force_jtag mode to enable uart4 when SDMMC0_DET is high.
    
    Change-Id: I2a2dadaad7dc2df8de3b43ff47d27d266caca62f
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 308d3d5a1a..23dd428861 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -17,6 +17,7 @@
 #include <dt-bindings/clock/px30-cru.h>
 
 #define PMU_PWRDN_CON			0xff000018
+#define GRF_CPU_CON1			0xff140504
 
 #define VIDEO_PHY_BASE			0xff2e0000
 
@@ -65,6 +66,9 @@ int arch_cpu_init(void)
 	writel(0x82, VIDEO_PHY_BASE + 0x0000);
 	writel(0x05, VIDEO_PHY_BASE + 0x03ac);
 
+	/* Clear the force_jtag */
+	rk_clrreg(GRF_CPU_CON1, 1 << 7);
+
 	return 0;
 }
 

commit 98ebaf0e5b1c03e1e64aab11e8ac1d624af72171
Author: vicent.chi <vicent.chi@rock-chips.com>
Date:   Fri Nov 30 09:07:20 2018 +0800

    CRU: rv1108 add emmc clk get and set
    
    Change-Id: I8cbfda46d2f7e84f11dbcca844d00c87559d0aa0
    Signed-off-by: vicent.chi <vicent.chi@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index 3e752ab62e..d220d0d3ff 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -181,6 +181,17 @@ enum {
 	MAC_CLK_DIV_MASK		= 0x1f,
 	MAC_CLK_DIV_SHIFT		= 0,
 
+	/* CLKSEL25_CON */
+	EMMC_PLL_SEL_SHIFT	= 12,
+	EMMC_PLL_SEL_MASK	= 3 << EMMC_PLL_SEL_SHIFT,
+	EMMC_PLL_SEL_DPLL	= 0,
+	EMMC_PLL_SEL_GPLL,
+	EMMC_PLL_SEL_OSC,
+
+	/* CLKSEL26_CON */
+	EMMC_CLK_DIV_SHIFT	= 8,
+	EMMC_CLK_DIV_MASK	= 0xff << EMMC_CLK_DIV_SHIFT,
+
 	/* CLKSEL27_CON */
 	SFC_PLL_SEL_SHIFT		= 7,
 	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 62c239283f..5dcc2f723c 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -484,6 +484,53 @@ static ulong rv1108_i2c_set_clk(struct rv1108_cru *cru, ulong clk_id, uint hz)
 	return rv1108_i2c_get_clk(cru, clk_id);
 }
 
+static ulong rv1108_mmc_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, con;
+	ulong mmc_clk;
+
+	con = readl(&cru->clksel_con[26]);
+	div = bitfield_extract(con, EMMC_CLK_DIV_SHIFT, 8);
+
+	con = readl(&cru->clksel_con[25]);
+
+	if ((con & EMMC_PLL_SEL_MASK) >> EMMC_PLL_SEL_SHIFT == EMMC_PLL_SEL_OSC)
+		mmc_clk = DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		mmc_clk = DIV_TO_RATE(GPLL_HZ, div) / 2;
+
+	debug("%s div %d get_clk %ld\n", __func__, div, mmc_clk);
+	return mmc_clk;
+}
+
+static ulong rv1108_mmc_set_clk(struct rv1108_cru *cru, ulong rate)
+{
+	int div;
+	u32 pll_rate;
+
+	div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, CLK_GENERAL), rate);
+
+	if (div < 127) {
+		debug("%s source gpll\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[25], EMMC_PLL_SEL_MASK,
+			     (EMMC_PLL_SEL_GPLL << EMMC_PLL_SEL_SHIFT));
+		pll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	} else {
+		debug("%s source 24m\n", __func__);
+		rk_clrsetreg(&cru->clksel_con[25], EMMC_PLL_SEL_MASK,
+			     (EMMC_PLL_SEL_OSC << EMMC_PLL_SEL_SHIFT));
+		pll_rate = OSC_HZ;
+	}
+
+	div = DIV_ROUND_UP(pll_rate / 2, rate);
+	rk_clrsetreg(&cru->clksel_con[26], EMMC_CLK_DIV_MASK,
+		     ((div - 1) << EMMC_CLK_DIV_SHIFT));
+
+	debug("%s set_rate %ld div %d\n", __func__,  rate, div);
+
+	return DIV_TO_RATE(pll_rate, div);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -512,6 +559,10 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 	case SCLK_I2C2:
 	case SCLK_I2C3:
 		return rv1108_i2c_get_clk(priv->cru, clk->id);
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		return rv1108_mmc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -559,6 +610,10 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		new_rate = rv1108_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		new_rate = rv1108_mmc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 57d18453974687b88bd0fbf2e2b4c0493463f3ef
Author: jon.lin <jon.lin@rock-chips.com>
Date:   Mon Nov 26 19:02:18 2018 -0800

    drivers: rkflash: support 4KB page size slc nand
    
    1.support 4KB page size slc nand;
    2.support idblock update when NANDC version is 9.
    
    Change-Id: I393bfae2b03e8293ed21acf901ffcc80d0ca0302
    Signed-off-by: jon.lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index 974ad80493..50cee9ed68 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -83,6 +83,11 @@ static void flash_bch_sel(u8 bits)
 	nandc_bch_sel(bits);
 }
 
+static void flash_set_sector(u8 num)
+{
+	nand_para.sec_per_page = num;
+}
+
 static __maybe_unused void flash_timing_cfg(u32 ahb_khz)
 {
 	nandc_time_cfg(nand_para.access_freq);
@@ -429,6 +434,8 @@ static void nandc_flash_print_info(void)
 
 static void ftl_flash_init(void)
 {
+	u8 nandc_ver = nandc_get_version();
+
 	/* para init */
 	g_nand_phy_info.nand_type	= nand_para.cell;
 	g_nand_phy_info.die_num		= nand_para.die_per_chip;
@@ -451,6 +458,10 @@ static void ftl_flash_init(void)
 	g_nand_ops.erase_blk		= flash_erase_block;
 	g_nand_ops.prog_page		= flash_prog_page;
 	g_nand_ops.read_page		= flash_read_page;
+	if (nandc_ver == 9) {
+		g_nand_ops.bch_sel = flash_bch_sel;
+		g_nand_ops.set_sec_num = flash_set_sector;
+	}
 }
 
 u32 nandc_flash_init(void __iomem *nandc_addr)
@@ -487,6 +498,9 @@ u32 nandc_flash_init(void __iomem *nandc_addr)
 		if (id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) {
 			nand_para.plane_per_die = 2;
 			nand_para.sec_per_page = 8;
+		} else if (id_byte[0][0] == 0x98 && id_byte[0][3] == 0x26) {
+			nand_para.blk_per_plane = 2048;
+			nand_para.sec_per_page = 8;
 		} else {
 			nand_para.plane_per_die = 2;
 			nand_para.blk_per_plane = 2048;
diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h
index 65081efade..71055797c8 100644
--- a/drivers/rkflash/flash_com.h
+++ b/drivers/rkflash/flash_com.h
@@ -61,6 +61,8 @@ struct nand_ops {
 	u32 (*erase_blk)(u8 cs, u32 page_addr);
 	u32 (*prog_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
 	u32 (*read_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
+	void (*bch_sel)(u8 bits);
+	void (*set_sec_num)(u8 num);
 };
 
 #endif
diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index f8efb695bd..c7b79298ea 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -26,6 +26,11 @@ static struct MASTER_INFO_T master;
 static u32 *g_master_temp_buf;
 #endif
 
+u8 nandc_get_version(void)
+{
+	return g_nandc_ver;
+}
+
 void nandc_init(void __iomem *nandc_addr)
 {
 	union FM_CTL_T ctl_reg;
diff --git a/drivers/rkflash/nandc.h b/drivers/rkflash/nandc.h
index 7043329691..e0eb40355c 100644
--- a/drivers/rkflash/nandc.h
+++ b/drivers/rkflash/nandc.h
@@ -344,5 +344,6 @@ void nandc_bch_sel(u8 bits);
 void nandc_read_not_case_busy_en(u8 en);
 void nandc_time_cfg(u32 ns);
 void nandc_clean_irq(void);
+u8 nandc_get_version(void);
 
 #endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 80bc31450f..a46a097bf8 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-29
+ * date: 2018-11-29
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -179,89 +179,90 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r3, r0
+	ldrh	r4, [r0]
 	ldr	r2, .L25
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
 	ldrh	r5, [r0, #2]
-	strh	r1, [r2]	@ movhi
-	ldr	r2, .L25+4
 	ldrh	r0, [r0, #4]
+	strh	r4, [r2]	@ movhi
+	ldr	r2, .L25+4
+	ldrh	r1, [r3, #6]
+	ldrh	r7, [r3, #14]
 	strh	r5, [r2]	@ movhi
 	ldr	r2, .L25+8
+	ldr	r6, .L25+12
+	cmp	r7, #4
 	strh	r0, [r2]	@ movhi
-	ldrh	r2, [r7, #14]
-	cmp	r2, #4
-	bne	.L16
-	ldrh	r2, [r7, #6]
-	ldr	r4, .L25+12
-	lsrs	r2, r2, #1
-	strh	r2, [r4]	@ movhi
-	movs	r4, #8
 	ldr	r2, .L25+16
-	strh	r4, [r2]	@ movhi
-.L16:
-	ldr	r4, .L25+20
-	movs	r2, #0
+	strh	r7, [r6]	@ movhi
+	ldr	r7, .L25+20
+	strh	r1, [r2]	@ movhi
+	itttt	eq
+	lsreq	r1, r1, #1
+	strheq	r1, [r2]	@ movhi
+	moveq	r1, #8
+	strheq	r1, [r6]	@ movhi
+	movs	r1, #0
 .L17:
-	strb	r2, [r2, r4]
-	adds	r2, r2, #1
-	cmp	r2, #32
+	strb	r1, [r1, r7]
+	adds	r1, r1, #1
+	cmp	r1, #32
 	bne	.L17
-	ldr	r2, .L25+24
-	cmp	r1, #1
-	mov	r4, #5
+	ldr	r1, .L25+24
+	cmp	r4, #1
+	mov	r7, #5
 	smulbb	r5, r5, r0
-	mov	r6, #0
-	strh	r4, [r2]	@ movhi
+	mov	ip, #0
+	str	r3, [sp, #4]
+	strh	r7, [r1]	@ movhi
 	it	eq
-	strheq	r1, [r2]	@ movhi
-	mov	r1, #640
-	ldr	r2, .L25+28
+	strheq	r4, [r1]	@ movhi
+	mov	r4, #640
+	ldr	r1, .L25+28
 	uxth	r5, r5
-	ldr	r4, .L25+32
-	strh	r1, [r2]	@ movhi
-	ldr	r2, .L25+36
-	strh	r6, [r4]	@ movhi
-	ldr	r6, .L25+40
-	strh	r5, [r2]	@ movhi
-	ldr	r2, .L25+12
+	ldr	r7, .L25+32
+	strh	r4, [r1]	@ movhi
 	ldrh	r4, [r2]
-	ldr	r2, .L25+44
+	ldr	r1, .L25+36
+	ldr	r2, .L25+40
+	strh	ip, [r7]	@ movhi
 	smulbb	r0, r0, r4
+	strh	r5, [r1]	@ movhi
+	ldr	r7, .L25+44
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
 	bl	Ftl_log2
+	ldr	r3, [sp, #4]
 	ldr	r2, .L25+48
-	ldrh	r8, [r7, #12]
-	ldr	r3, .L25+52
+	ldrh	fp, [r6]
+	ldrh	r8, [r3, #12]
 	strh	r0, [r2]	@ movhi
-	ldr	r2, .L25+56
+	ldr	r2, .L25+52
+	mov	r0, fp
+	strh	r8, [r7]	@ movhi
 	smulbb	r1, r5, r8
-	strh	r8, [r3]	@ movhi
+	ldr	r6, .L25+56
 	strh	r8, [r2]	@ movhi
 	ldr	r2, .L25+60
 	strh	r1, [r2]	@ movhi
-	ldr	r2, .L25+16
-	ldrh	fp, [r2]
-	mov	r0, fp
 	bl	Ftl_log2
 	lsl	r2, fp, #9
 	ldr	r1, .L25+64
-	ldr	r3, .L25+68
+	ldr	r3, [sp, #4]
 	mov	r10, r0
 	uxth	r2, r2
 	strh	r0, [r6]	@ movhi
 	mov	r0, #5120
 	strh	r2, [r1]	@ movhi
 	lsrs	r2, r2, #8
-	ldr	r1, .L25+72
+	ldr	r1, .L25+68
 	strh	r2, [r1]	@ movhi
 	mul	r1, r8, fp
-	ldrh	r2, [r7, #20]
-	ldr	r7, .L25+52
+	ldrh	r2, [r3, #20]
+	ldr	r3, .L25+72
 	strh	r2, [r3]	@ movhi
 	mul	r3, r4, r5
 	ldr	r2, .L25+76
@@ -331,6 +332,8 @@ FtlConstantsInit:
 	ldr	r3, [r10]
 	adds	r3, r3, #3
 	str	r3, [r10]
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L26:
 	.align	2
@@ -338,22 +341,22 @@ FtlConstantsInit:
 	.word	.LANCHOR9
 	.word	.LANCHOR10
 	.word	.LANCHOR11
-	.word	.LANCHOR6
 	.word	.LANCHOR12
+	.word	.LANCHOR6
 	.word	.LANCHOR13
 	.word	.LANCHOR14
 	.word	.LANCHOR16
 	.word	.LANCHOR15
 	.word	.LANCHOR3
-	.word	.LANCHOR22
 	.word	.LANCHOR17
-	.word	.LANCHOR18
 	.word	.LANCHOR19
+	.word	.LANCHOR18
 	.word	.LANCHOR20
+	.word	.LANCHOR22
 	.word	.LANCHOR21
 	.word	.LANCHOR23
-	.word	.LANCHOR25
 	.word	.LANCHOR24
+	.word	.LANCHOR25
 	.word	.LANCHOR8
 	.word	.LANCHOR26
 	.word	.LANCHOR28
@@ -11073,15 +11076,15 @@ sftl_deinit:
 .L1468:
 	.word	.LANCHOR86
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",%progbits
+	.section	.text.sftl_discard,"ax",%progbits
 	.align	1
-	.global	FtlDiscard
+	.global	sftl_discard
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
+	.type	sftl_discard, %function
+sftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, .L1485
@@ -11172,7 +11175,7 @@ FtlDiscard:
 	.word	.LANCHOR172
 	.word	.LANCHOR63
 	.word	.LANCHOR12
-	.size	FtlDiscard, .-FtlDiscard
+	.size	sftl_discard, .-sftl_discard
 	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
 	.align	1
 	.global	FtlVpcCheckAndModify
@@ -11433,7 +11436,7 @@ FtlProgPages:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1519
-	movw	r2, #955
+	movw	r2, #957
 	ldr	r1, .L1528+12
 	ldr	r0, .L1528+16
 	bl	printf
@@ -11470,7 +11473,7 @@ FtlProgPages:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1514
-	movw	r2, #970
+	mov	r2, #972
 	ldr	r1, .L1528+12
 	ldr	r0, .L1528+16
 	bl	printf
@@ -13386,7 +13389,7 @@ FtlWrite:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1775
-	movw	r2, #1011
+	movw	r2, #1013
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13433,7 +13436,7 @@ FtlWrite:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1780
-	movw	r2, #1044
+	movw	r2, #1046
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13454,7 +13457,7 @@ FtlWrite:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
 	bls	.L1802
-	movw	r2, #1121
+	movw	r2, #1123
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13556,7 +13559,7 @@ FtlWrite:
 	ldrh	r2, [r3]
 	cmp	r1, r2
 	bcc	.L1798
-	mov	r2, #1112
+	movw	r2, #1114
 	ldr	r1, .L1822+44
 	ldr	r0, .L1822+48
 	bl	printf
@@ -13660,7 +13663,7 @@ FtlWrite:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
 	beq	.L1796
-	movw	r2, #1097
+	movw	r2, #1099
 	ldr	r1, .L1824+16
 	ldr	r0, .L1824+20
 	bl	printf
@@ -13750,554 +13753,181 @@ FtlWrite:
 	.word	.LANCHOR83
 	.word	.LANCHOR82
 	.size	FtlWrite, .-FtlWrite
-	.global	__aeabi_idivmod
-	.section	.text.sftl_write,"ax",%progbits
+	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
-	.global	sftl_write
+	.global	FtlMakeBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	sftl_write, %function
-sftl_write:
-	@ args = 0, pretend = 0, frame = 128
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	adds	r7, r0, r1
-	add	r8, r7, #-1
-	sub	sp, sp, #136
-	cmp	r8, #63
-	mov	fp, r0
-	str	r1, [sp, #24]
-	str	r2, [sp, #44]
-	ldr	r4, .L1871
-	bls	.L1827
-	cmp	r0, #576
-	bcc	.L1828
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r7, .L1845
+	bl	FtlBbtMemInit
+	sub	r8, r7, #18
+	bl	FtlLoadFactoryBbt
 .L1827:
-	ldr	r3, [r4]
-	cbz	r3, .L1830
-	ldr	r3, .L1871+4
-	ldr	r10, [r3]
-	ldr	r3, .L1871+8
-	ldr	r2, [r10]
+	ldr	r3, .L1845+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1833
+	ldr	r5, .L1845+8
+	movs	r4, #0
+.L1834:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L1835
+	ldr	r4, .L1845+12
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1836:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1840
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1837
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L1838
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L1837:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1836
+.L1833:
+	ldr	r3, .L1845+16
+	ldr	r5, .L1845+20
+	ldrh	r2, [r8, #2]!
+	ldr	r4, .L1845+24
+	ldr	r0, [r3]
+	movw	r3, #65535
+	ldr	r10, [r5]
 	cmp	r2, r3
+	mov	fp, r4
+	ldr	r3, .L1845+28
+	str	r0, [r4, #8]
+	str	r10, [r4, #12]
+	beq	.L1828
+	ldrh	r5, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L1829:
+	uxth	r0, r5
+	adds	r6, r6, #1
+	adds	r7, r7, #4
+	bl	FtlBbmMapBadBlock
+	b	.L1827
+.L1828:
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	str	r5, [sp, #4]
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1830:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
 	beq	.L1831
-.L1848:
-	ldr	r3, .L1871
-	movs	r2, #0
-	str	r2, [r3]
-	ldr	r3, .L1871+4
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
-	bl	free
-	ldr	r3, .L1871+12
+	bl	ftl_memset
+	ldr	r3, .L1845+16
+	mov	r2, #4096
+	movs	r1, #0
 	ldr	r0, [r3]
-	bl	free
-.L1830:
-	ldr	r3, [sp, #44]
-	mov	r1, fp
-	ldr	r2, [sp, #24]
-	movs	r0, #0
-	bl	FtlWrite
-	add	sp, sp, #136
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1831:
-	ldr	r3, .L1871+16
-	add	r0, r10, #262144
-	movw	r2, #65535
-	ldrh	r4, [r3, #14]
-	ldrh	r5, [r3, #10]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
 	movs	r3, #0
-.L1835:
-	ldr	r1, [r0, #-4]
-	cbnz	r1, .L1832
-	ldr	r1, [r10, r3, lsl #2]
+	str	r3, [r10, #4]
+	ldrh	r5, [r2]
+	ldrh	r3, [r8]
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	mla	r5, r6, r5, r3
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	ldr	r3, .L1845+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	ldr	r0, .L1845+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1845+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [fp]
 	adds	r3, r3, #1
-	cmp	r3, #4096
-	add	r2, r2, #-1
-	it	hi
-	movhi	r3, #0
-	cmp	r2, #4096
-	str	r1, [r0, #-4]!
-	bne	.L1835
-	mov	r3, #512
-	str	r3, [sp, #12]
+	bne	.L1829
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+	b	.L1830
+.L1831:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1830
+.L1835:
+	bl	FtlBbmMapBadBlock
 	b	.L1834
-.L1832:
-	add	r3, r2, #127
-	ldr	r0, .L1871+20
-	lsrs	r3, r3, #7
-	str	r3, [sp, #12]
-	bl	printf
-.L1834:
-	uxtb	r4, r4
-	mov	r8, #0
-	smulbb	r5, r4, r5
-	uxth	r3, r5
-	ldr	r5, .L1871+24
-	str	r3, [sp, #16]
-	subs	r0, r3, #1
-	mov	r1, r3
-	ldr	r3, [sp, #12]
-	add	r0, r0, r3
-	bl	__aeabi_uidiv
-	ldr	r2, [sp, #16]
-	mov	r3, r0
-	str	r0, [sp, #20]
-	str	r0, [sp, #40]
-	str	r8, [sp, #32]
-	muls	r3, r2, r3
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #12]
-	lsls	r3, r3, #7
-	str	r3, [sp, #56]
-	b	.L1847
-.L1856:
-	str	r3, [sp, #40]
-.L1847:
-	ldr	r3, .L1871+12
-	mov	r2, #512
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	memset
-	ldr	r3, .L1871+16
-	mov	r0, r8
-	ldrh	r7, [r3, #14]
-	mov	r1, r7
-	uxtb	r6, r7
-	uxth	r3, r6
-	str	r3, [sp, #36]
-	ldr	r3, .L1871+16
-	ldrh	r4, [r3, #10]
-	ldrh	r3, [sp, #36]
-	smulbb	r4, r4, r3
-	bl	__aeabi_uidiv
-	ldr	r3, [r5, #4]
-	mov	r1, r0
-	movs	r0, #0
-	uxth	r4, r4
-	blx	r3
-	ldr	r3, [sp, #28]
-	cmp	r3, r4
-	bls	.L1836
-	mov	r1, r7
-	add	r0, r4, r8
-	bl	__aeabi_uidiv
-	ldr	r3, [r5, #4]
-	mov	r1, r0
-	movs	r0, #0
-	blx	r3
-.L1836:
-	mov	r1, r4
-	mov	r0, r8
-	movs	r4, #0
-	bl	__aeabi_uidivmod
-	sub	r3, r8, r1
-	str	r1, [sp, #48]
-	str	r3, [sp, #52]
-.L1837:
-	ldr	r3, [sp, #28]
-	cmp	r3, r4
-	bhi	.L1838
-	ldr	r3, .L1871+12
-	mov	r0, r8
-	movs	r4, #0
-	ldr	r3, [r3]
-	str	r3, [sp, #52]
-	ldr	r3, .L1871+16
-	ldrb	r7, [r3, #14]	@ zero_extendqisi2
-	uxth	r3, r7
-	str	r3, [sp, #48]
-	ldr	r3, .L1871+16
-	ldrh	r1, [r3, #10]
-	ldrh	r3, [sp, #48]
-	smulbb	r1, r1, r3
-	uxth	r1, r1
-	bl	__aeabi_uidivmod
-	str	r1, [sp, #36]
-	sub	r3, r8, r1
-	ldrh	r0, [sp, #36]
-	mov	r1, r7
-	str	r3, [sp, #60]
-	bl	__aeabi_idivmod
-	uxth	r6, r1
-.L1839:
-	ldr	r3, [sp, #12]
-	cmp	r4, r3
-	bcs	.L1843
-	ldr	r3, [sp, #48]
-	mov	r1, r7
-	subs	r3, r3, r6
-	uxth	r3, r3
-	str	r3, [sp, #64]
-	ldr	r3, [sp, #52]
-	add	r2, r3, r4, lsl #9
-	ldr	r3, [sp, #36]
-	str	r2, [sp, #68]
-	adds	r0, r3, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #60]
-	uxth	r0, r0
-	mov	r1, r7
-	add	r6, r6, r3
-	mla	r0, r7, r0, r6
-	bl	__aeabi_uidiv
-	ldr	r6, [r5, #12]
-	mov	r1, r0
-	add	r3, sp, #72
-	ldr	r2, [sp, #68]
-	movs	r0, #0
-	blx	r6
-	adds	r0, r0, #1
-	bne	.L1840
-.L1843:
-	ldr	r3, .L1871+12
-	mov	r1, r10
-	movs	r4, #0
-	ldr	r0, [r3]
-.L1841:
-	mov	r7, r1
-	ldr	r2, [r0, r4, lsl #2]
-	ldr	r3, [r7]
-	lsls	r6, r4, #2
-	adds	r1, r1, #4
-	cmp	r2, r3
-	beq	.L1844
-	mov	r2, #512
-	movs	r1, #0
-	bl	memset
-	ldr	r3, .L1871+12
-	mov	r1, r8
-	ldr	r0, .L1871+28
-	ldr	r2, [r3]
-	str	r4, [sp]
-	ldr	r3, [r7]
-	ldr	r2, [r2, r6]
-	bl	printf
-	ldr	r3, [r5, #4]
-	mov	r1, r8
-	movs	r0, #0
-	blx	r3
-	ldr	r3, [sp, #20]
-	cmp	r3, #1
-	bls	.L1855
-	ldr	r2, [sp, #16]
-	movs	r0, #0
-	ldr	r3, [r5, #4]
-	add	r1, r2, r8
-	blx	r3
-.L1855:
-	ldr	r2, [sp, #40]
-	ldr	r3, [sp, #20]
-	add	r3, r3, r2
-	ldr	r2, [sp, #28]
-	add	r8, r8, r2
-	ldr	r2, [sp, #40]
-	cmp	r2, #15
-	bls	.L1856
-	b	.L1848
-.L1838:
-	ldr	r3, [sp, #48]
-	mov	r1, r6
-	adds	r0, r3, r4
-	bl	__aeabi_uidiv
-	uxth	r3, r0
-	add	r2, r10, r4, lsl #9
-	ldr	r0, [sp, #52]
-	mov	r7, r3
-	muls	r3, r6, r3
-	mov	r1, r6
-	str	r2, [sp, #60]
-	str	r3, [sp, #72]
-	movw	r3, #61424
-	str	r3, [sp, #76]
-	bl	__aeabi_uidiv
-	add	r3, sp, #72
-	adds	r1, r0, r7
-	ldr	r2, [sp, #60]
-	movs	r0, #0
-	ldr	r7, [r5, #8]
-	blx	r7
-	ldr	r3, [sp, #36]
-	add	r4, r4, r3
-	uxth	r4, r4
-	b	.L1837
-.L1840:
-	ldr	r3, [sp, #64]
-	movs	r6, #0
-	add	r3, r3, r4
-	uxth	r4, r3
-	b	.L1839
-.L1844:
-	ldr	r3, [sp, #56]
-	adds	r4, r4, #1
-	cmp	r4, r3
-	bne	.L1841
-	ldr	r3, [sp, #32]
-	adds	r3, r3, #1
-	cmp	r3, #5
-	str	r3, [sp, #32]
-	bls	.L1855
-	b	.L1848
-.L1872:
-	.align	2
-.L1871:
-	.word	.LANCHOR184
-	.word	.LANCHOR185
-	.word	-52655045
-	.word	.LANCHOR186
-	.word	.LANCHOR0
-	.word	.LC114
-	.word	.LANCHOR105
-	.word	.LC115
-.L1828:
-	cmp	r0, #64
-	bne	.L1849
-	ldr	r5, .L1873
-	mov	r0, #262144
-	bl	ftl_malloc
-	str	r0, [r5]
-	mov	r0, #262144
-	bl	ftl_malloc
-	ldr	r3, .L1873+4
-	str	r0, [r3]
-	ldr	r3, [r5]
-	cbz	r3, .L1850
-	cbz	r0, .L1850
-	movs	r2, #1
-	movs	r1, #0
-	str	r2, [r4]
-	mov	r0, r3
-	mov	r2, #262144
-	bl	ftl_memset
-.L1849:
-	ldr	r3, [r4]
-	cmp	r3, #0
-	beq	.L1830
-	ldr	r3, .L1873
-	cmp	fp, #63
-	ldr	r1, [r3]
-	bhi	.L1852
-	ldr	r3, [sp, #24]
-	rsb	r5, fp, #64
-	mov	r4, r1
-	subs	r6, r3, r5
-	ldr	r3, [sp, #44]
-	add	r5, r3, r5, lsl #9
-.L1853:
-	cmp	r8, #576
-	ldr	r0, .L1873+8
-	it	cs
-	subcs	r6, r6, r7
-	mov	r3, r4
-	it	cs
-	subcs	r6, r6, #446
-	mov	r2, #262144
-	str	r6, [sp]
-	bl	printf
-	lsls	r2, r6, #9
-	mov	r1, r5
-	mov	r0, r4
-	bl	ftl_memcpy
-	b	.L1830
-.L1850:
-	ldr	r1, .L1873+12
-	ldr	r0, .L1873+16
-	bl	printf
-	b	.L1849
-.L1852:
-	ldr	r4, .L1873+20
-	ldr	r5, [sp, #44]
-	ldr	r6, [sp, #24]
-	add	r4, r4, fp
-	add	r4, r1, r4, lsl #9
-	b	.L1853
-.L1874:
-	.align	2
-.L1873:
-	.word	.LANCHOR185
-	.word	.LANCHOR186
-	.word	.LC117
-	.word	.LANCHOR187
-	.word	.LC116
-	.word	8388544
-	.size	sftl_write, .-sftl_write
-	.section	.text.FtlMakeBbt,"ax",%progbits
-	.align	1
-	.global	FtlMakeBbt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r7, .L1894
-	bl	FtlBbtMemInit
-	sub	r8, r7, #18
-	bl	FtlLoadFactoryBbt
-.L1876:
-	ldr	r3, .L1894+4
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1882
-	ldr	r5, .L1894+8
-	movs	r4, #0
-.L1883:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L1884
-	ldr	r4, .L1894+12
-	movw	r6, #65535
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1885:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1889
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1886
-	mov	r0, r5
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L1887
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.L1886:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1885
-.L1882:
-	ldr	r3, .L1894+16
-	ldr	r5, .L1894+20
-	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1894+24
-	ldr	r0, [r3]
-	movw	r3, #65535
-	ldr	r10, [r5]
-	cmp	r2, r3
-	mov	fp, r4
-	ldr	r3, .L1894+28
-	str	r0, [r4, #8]
-	str	r10, [r4, #12]
-	beq	.L1877
-	ldrh	r5, [r3]
-	mov	r0, r4
-	str	r3, [sp]
-	mla	r5, r6, r5, r2
-	lsls	r2, r5, #10
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r7]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.L1878:
-	uxth	r0, r5
-	adds	r6, r6, #1
-	adds	r7, r7, #4
-	bl	FtlBbmMapBadBlock
-	b	.L1876
-.L1877:
-	mov	r1, r6
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-	ldr	r0, [r4, #8]
-	ldr	r1, [r7]
-	bl	FtlBbt2Bitmap
-	ldr	r3, [sp]
-	str	r5, [sp, #4]
-	ldrh	r4, [r3]
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1879:
-	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r6, r4
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1880
-	ldr	r3, [sp, #4]
-	movs	r2, #16
-	movs	r1, #0
-	strh	r4, [r8]	@ movhi
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L1894+16
-	mov	r2, #4096
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [sp]
-	movw	r3, #61664
-	strh	r3, [r10]	@ movhi
-	movs	r3, #0
-	str	r3, [r10, #4]
-	ldrh	r5, [r2]
-	ldrh	r3, [r8]
-	ldr	r1, [r7]
-	ldr	r0, [fp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	mla	r5, r6, r5, r3
-	lsls	r3, r5, #10
-	str	r3, [fp, #4]
-	ldr	r3, .L1894+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	movs	r2, #1
-	ldr	r0, .L1894+24
-	mov	r1, r2
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1894+24
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, [fp]
-	adds	r3, r3, #1
-	bne	.L1878
-	uxth	r0, r5
-	bl	FtlBbmMapBadBlock
-	b	.L1879
-.L1880:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1879
-.L1884:
-	bl	FtlBbmMapBadBlock
-	b	.L1883
-.L1887:
-	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L1888
-	strh	r5, [r4]	@ movhi
-	b	.L1886
-.L1888:
-	strh	r5, [r4, #4]	@ movhi
-.L1889:
-	ldr	r3, .L1894+36
-	movs	r5, #0
-	str	r5, [r4, #8]
-	movs	r1, #1
-	movs	r2, #2
-	strh	r5, [r4, #2]	@ movhi
+.L1838:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L1839
+	strh	r5, [r4]	@ movhi
+	b	.L1837
+.L1839:
+	strh	r5, [r4, #4]	@ movhi
+.L1840:
+	ldr	r3, .L1845+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r1, #1
+	movs	r2, #2
+	strh	r5, [r4, #2]	@ movhi
 	ldr	r0, [r3]
 	ldrh	r3, [r4]
 	lsls	r3, r3, #10
@@ -14324,9 +13954,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1895:
+.L1846:
 	.align	2
-.L1894:
+.L1845:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -14351,62 +13981,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1920
-	ldr	r2, .L1920+4
-	ldr	r5, .L1920+8
+	ldr	r6, .L1871
+	ldr	r2, .L1871+4
+	ldr	r5, .L1871+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1897
+	cbz	r0, .L1848
 	bl	FtlMakeBbt
-.L1897:
-	ldr	r3, .L1920+12
-	ldr	r2, .L1920+16
-	ldr	ip, .L1920+100
+.L1848:
+	ldr	r3, .L1871+12
+	ldr	r2, .L1871+16
+	ldr	ip, .L1871+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1920+20
+	ldr	r2, .L1871+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1898:
+.L1849:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1899
-	ldr	r3, .L1920+24
+	blt	.L1850
+	ldr	r3, .L1871+24
 	movs	r7, #0
-	ldr	r10, .L1920+104
+	ldr	r10, .L1871+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1900:
+.L1851:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1901
-	ldr	r4, .L1920+28
+	bhi	.L1852
+	ldr	r4, .L1871+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1902
-.L1906:
+	bgt	.L1853
+.L1857:
 	movs	r6, #0
 	mov	r7, r6
-.L1903:
+.L1854:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1907
+	bhi	.L1858
 	ldrh	r2, [fp]
-	ldr	r3, .L1920+32
+	ldr	r3, .L1871+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1920+36
+	ldr	r6, .L1871+36
 	str	r2, [r3]
-	ldr	r3, .L1920+40
+	ldr	r3, .L1871+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14416,13 +14046,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1920+44
+	ldr	r0, .L1871+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1908
+	ble	.L1859
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14434,11 +14064,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1908:
-	ldr	r2, .L1920+48
+.L1859:
+	ldr	r2, .L1871+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1910
-	ldr	r1, .L1920+44
+	cbz	r2, .L1861
+	ldr	r1, .L1871+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14449,24 +14079,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1910:
+.L1861:
 	ldr	r3, [sp]
-	ldr	r7, .L1920+52
-	ldr	r10, .L1920+108
+	ldr	r7, .L1871+52
+	ldr	r10, .L1871+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1920+56
+	ldr	r3, .L1871+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1920+60
+	ldr	r6, .L1871+60
 	muls	r4, r3, r4
-	ldr	r3, .L1920+64
+	ldr	r3, .L1871+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14475,13 +14105,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1920+68
+	ldr	r2, .L1871+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1920+72
+	ldr	r2, .L1871+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14492,30 +14122,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1920+76
+	ldr	r3, .L1871+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1912:
+.L1863:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1913
+	bne	.L1864
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1912
-.L1899:
+	b	.L1863
+.L1850:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1898
-.L1901:
+	b	.L1849
+.L1852:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14523,11 +14153,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1900
-.L1902:
+	b	.L1851
+.L1853:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1920+80
+	ldr	r3, .L1871+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14535,133 +14165,585 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
+.L1855:
+	ldrh	r3, [fp]
+	cmp	r3, r6
+	bls	.L1857
+	mov	r0, r6
+	movs	r1, #1
+	adds	r6, r6, #1
+	bl	FtlLowFormatEraseBlock
+	uxth	r6, r6
+	b	.L1855
+.L1858:
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r7, r7, r0
+	uxth	r7, r7
+	b	.L1854
+.L1864:
+	ldr	r3, [r5]
+	ldrh	r1, [r6, #4]
+	ldr	r4, .L1871+84
+	str	r3, [r6, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	ldr	r3, [r8]
+	mov	r10, r4
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r3, [r6]
+	movw	r6, #65535
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L1865:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cbnz	r3, .L1866
+	ldr	r3, [r8]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L1865
+.L1866:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L1871+88
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L1871+92
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r7]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L1867
+	ldr	r3, .L1871+96
+	movs	r2, #1
+	str	r2, [r3]
+.L1867:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1872:
+	.align	2
+.L1871:
+	.word	.LANCHOR4
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR12
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR111
+	.word	.LANCHOR61
+	.word	.LANCHOR7
+	.word	.LANCHOR78
+	.word	.LANCHOR15
+	.word	.LANCHOR152
+	.word	.LANCHOR19
+	.word	.LANCHOR51
+	.word	.LANCHOR34
+	.word	.LANCHOR59
+	.word	.LANCHOR80
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR79
+	.word	.LANCHOR86
+	.word	168778952
+	.word	.LANCHOR6
+	.word	.LANCHOR42
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.FtlWriteToIDB,"ax",%progbits
+	.align	1
+	.global	FtlWriteToIDB
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWriteToIDB, %function
+FtlWriteToIDB:
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	add	r8, r1, r0
+	add	r10, r8, #-1
+	sub	sp, sp, #112
+	cmp	r10, #63
+	mov	r4, r0
+	mov	r6, r1
+	mov	r7, r2
+	ldr	r5, .L1946
+	bls	.L1875
+	cmp	r0, #576
+	bcc	.L1876
+.L1875:
+	ldr	r3, [r5]
+	cbnz	r3, .L1877
+.L1945:
+	movs	r4, #0
+	b	.L1874
+.L1877:
+	ldr	r3, .L1946+4
+	ldr	r3, [r3]
+	ldr	r2, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1946+8
+	cmp	r2, r3
+	bne	.L1879
+	ldr	r3, .L1946+12
+	movs	r2, #0
+	ldrh	r1, [r3, #10]
+	ldr	r3, [sp, #12]
+	add	r0, r3, #262144
+	movw	r3, #65535
+.L1883:
+	ldr	r4, [r0, #-4]
+	cbnz	r4, .L1880
+	ldr	r4, [sp, #12]
+	subs	r3, r3, #1
+	ldr	r4, [r4, r2, lsl #2]
+	adds	r2, r2, #1
+	cmp	r2, #4096
+	it	hi
+	movhi	r2, #0
+	cmp	r3, #4096
+	str	r4, [r0, #-4]!
+	bne	.L1883
+	mov	r3, #512
+	b	.L1942
+.L1880:
+	adds	r3, r3, #127
+	lsrs	r3, r3, #7
+.L1942:
+	str	r3, [sp, #16]
+	lsls	r1, r1, #2
+	ldr	r3, [sp, #16]
+	uxth	r1, r1
+	ldr	r4, .L1946+16
+	adds	r0, r3, #4
+	bl	__aeabi_uidiv
+	adds	r3, r0, #1
+	str	r3, [sp, #24]
+	ldr	r3, [sp, #16]
+	lsls	r3, r3, #7
+	str	r3, [sp, #36]
+	movs	r3, #0
+	mov	r10, r3
+	str	r3, [sp, #20]
+.L1906:
+	ldr	r3, .L1946+20
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	memset
+	ldr	r3, .L1946+12
+	ldrh	r6, [r3, #10]
+	ldr	r3, [r4, #16]
+	mul	fp, r10, r6
+	cmp	r3, #0
+	beq	.L1914
+	ldr	r3, [r4, #20]
+	cmp	r3, #0
+	ite	eq
+	moveq	r3, #6
+	movne	r3, #9
+.L1943:
+	str	r3, [sp, #28]
+	mov	r1, fp
+	ldr	r3, .L1946+16
+	movs	r0, #0
+	ldr	r3, [r3, #4]
+	blx	r3
+	ldr	r3, [sp, #24]
+	cmp	r3, #1
+	beq	.L1885
+	ldr	r3, .L1946+16
+	add	r1, r6, fp
+	movs	r0, #0
+	ldr	r3, [r3, #4]
+	blx	r3
+.L1885:
+	ldr	r3, [sp, #28]
+	cmp	r3, #9
+	bne	.L1916
+	ldr	r3, .L1946+20
+	mov	r2, #1024
+	movs	r1, #0
+	ldr	r5, [r3]
+	mov	r0, r5
+	bl	ftl_memset
+	ldr	r2, .L1946+24
+	movs	r3, #12
+	add	r1, r5, #11
+	add	r0, r5, #23
+	stm	r5, {r2, r3}
+	movs	r2, #4
+	strb	r2, [r5, #17]
+	movs	r3, #0
+	ldr	r2, .L1946+12
+	str	r3, [r5, #12]
+	strb	r3, [r5, #16]
+	ldrh	r2, [r2, #10]
+	strb	r3, [r5, #20]
+	strh	r3, [r5, #22]	@ movhi
+	ldr	r3, .L1946+28
+	strh	r2, [r5, #18]	@ movhi
+	movs	r2, #16
+	strb	r2, [r5, #21]
+.L1887:
+	lsrs	r2, r3, #2
+	ldrb	ip, [r1, #1]!	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	cmp	r0, r1
+	add	r2, r2, ip
+	eor	r3, r3, r2
+	bne	.L1887
+	str	r3, [r5, #8]
+.L1886:
+	ldr	r3, [sp, #24]
+	mov	r8, fp
+	muls	r3, r6, r3
+	movs	r6, #0
+	str	r3, [sp, #40]
+	ldr	r3, [sp, #12]
+	str	r3, [sp, #32]
+.L1888:
+	ldr	r3, [sp, #40]
+	cmp	r6, r3
+	beq	.L1895
+	ldr	r3, [sp, #28]
+	cmp	r3, #9
+	itet	ne
+	addne	r3, fp, r6
+	addeq	r3, r8, #1
+	lslne	r3, r3, #2
+	str	r3, [sp, #48]
+	movw	r3, #61424
+	str	r3, [sp, #52]
+	cmp	r6, #0
+	bne	.L1891
+	ldr	r3, [sp, #28]
+	cmp	r3, #9
+	bne	.L1891
+	ldr	r3, [r4, #16]
+	movs	r0, #70
+	blx	r3
+	add	r3, sp, #48
+	mov	r2, r5
+	mov	r1, fp
+	mov	r0, r6
+	ldr	r7, [r4, #8]
+	blx	r7
+	ldr	r2, .L1946+12
+	str	r0, [sp, #44]
+	ldr	r3, [r4, #16]
+	ldrb	r0, [r2, #22]	@ zero_extendqisi2
+	blx	r3
+	ldr	r2, [sp, #44]
+	adds	r2, r2, #1
+	bne	.L1892
+.L1895:
+	ldr	r3, .L1946+20
+	ldr	r2, [r4, #16]
+	ldr	r6, [r3]
+	ldr	r3, .L1946+12
+	ldrb	r3, [r3, #14]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L1946+12
+	ldrh	r3, [r3, #10]
+	mul	r8, r10, r3
+	cmp	r2, #0
+	bne	.L1893
+	mov	fp, #6
+.L1894:
+	ldr	r2, [sp, #24]
+	movs	r5, #0
+	muls	r3, r2, r3
+	str	r3, [sp, #32]
+.L1897:
+	ldr	r3, [sp, #32]
+	cmp	r5, r3
+	beq	.L1901
+	cmp	r5, #0
+	bne	.L1898
+	cmp	fp, #9
+	bne	.L1898
+	ldr	r3, [r4, #16]
+	movs	r0, #70
+	blx	r3
+	ldr	r3, [r4, #20]
+	movs	r0, #2
+	blx	r3
+	mov	r2, r6
+	mov	r1, r8
+	add	r3, sp, #48
+	mov	r0, r5
+	ldr	r7, [r4, #12]
+	blx	r7
+	ldr	r3, [r4, #20]
+	ldr	r0, [sp, #28]
+	blx	r3
+	ldr	r2, .L1946+12
+	ldr	r3, [r4, #16]
+	ldrb	r0, [r2, #22]	@ zero_extendqisi2
+	blx	r3
+	ldr	r3, [r6]
+	ldr	r2, .L1946+24
+	cmp	r3, r2
+	beq	.L1899
+.L1901:
+	ldr	r3, .L1946+20
+	movs	r5, #0
+	ldr	r1, [sp, #12]
+	ldr	r0, [r3]
+.L1900:
+	mov	r8, r1
+	ldr	r2, [r0, r5, lsl #2]
+	ldr	r3, [r8]
+	lsls	r6, r5, #2
+	adds	r1, r1, #4
+	cmp	r2, r3
+	beq	.L1903
+	mov	r2, #512
+	movs	r1, #0
+	bl	memset
+	ldr	r3, .L1946+20
+	mov	r1, r10
+	ldr	r0, .L1946+32
+	ldr	r2, [r3]
+	str	r5, [sp]
+	ldr	r3, [r8]
+	ldr	r2, [r2, r6]
+	bl	printf
+	ldr	r3, .L1946+12
+	movs	r0, #0
+	ldrh	r1, [r3, #10]
+	ldr	r3, [r4, #4]
+	mul	r1, r10, r1
+	blx	r3
 .L1904:
-	ldrh	r3, [fp]
-	cmp	r3, r6
+	ldr	r3, [sp, #24]
+	add	r10, r10, r3
+	cmp	r10, #15
 	bls	.L1906
-	mov	r0, r6
-	movs	r1, #1
-	adds	r6, r6, #1
-	bl	FtlLowFormatEraseBlock
-	uxth	r6, r6
-	b	.L1904
+	ldr	r3, [sp, #20]
+	cbnz	r3, .L1907
+.L1879:
+	mov	r3, #-1
+	str	r3, [sp, #16]
 .L1907:
-	movs	r1, #0
-	bl	FtlLowFormatEraseBlock
-	add	r7, r7, r0
-	uxth	r7, r7
-	b	.L1903
-.L1913:
-	ldr	r3, [r5]
-	ldrh	r1, [r6, #4]
-	ldr	r4, .L1920+84
-	str	r3, [r6, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	ldr	r3, [r8]
-	mov	r10, r4
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	ldrh	r3, [r6]
-	movw	r6, #65535
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L1914:
-	mov	r0, r10
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r4]
-	cbnz	r3, .L1915
-	ldr	r3, [r8]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	b	.L1914
-.L1915:
-	ldr	r3, [r5]
-	ldrh	r1, [r4, #4]
-	str	r3, [r4, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	movw	r4, #65535
-	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1920+88
-	strh	r4, [r3]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1920+92
+	ldr	r3, .L1946
 	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, [r7]
-	strh	r0, [r3]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, [r5]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r5]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1916
-	ldr	r3, .L1920+96
-	movs	r2, #1
+	ldr	r4, [sp, #16]
 	str	r2, [r3]
-.L1916:
-	movs	r0, #0
-	add	sp, sp, #16
+	ldr	r3, .L1946+4
+	ldr	r0, [r3]
+	bl	free
+	ldr	r3, .L1946+20
+	ldr	r0, [r3]
+	bl	free
+.L1874:
+	mov	r0, r4
+	add	sp, sp, #112
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1921:
+.L1914:
+	movs	r3, #6
+	b	.L1943
+.L1916:
+	movs	r5, #0
+	b	.L1886
+.L1891:
+	add	r3, sp, #48
+	ldr	r2, [sp, #32]
+	mov	r1, r8
+	movs	r0, #0
+	ldr	r7, [r4, #8]
+	blx	r7
+	adds	r0, r0, #1
+	beq	.L1895
+	ldr	r3, [sp, #32]
+	add	r3, r3, #2048
+	str	r3, [sp, #32]
+.L1892:
+	adds	r6, r6, #1
+	add	r8, r8, #1
+	b	.L1888
+.L1893:
+	ldr	r2, [r4, #20]
+	cmp	r2, #0
+	ite	eq
+	moveq	fp, #6
+	movne	fp, #9
+	b	.L1894
+.L1947:
 	.align	2
-.L1920:
-	.word	.LANCHOR4
-	.word	.LANCHOR71
-	.word	.LANCHOR70
-	.word	.LANCHOR12
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR111
-	.word	.LANCHOR61
-	.word	.LANCHOR7
-	.word	.LANCHOR78
-	.word	.LANCHOR15
-	.word	.LANCHOR152
-	.word	.LANCHOR19
-	.word	.LANCHOR51
-	.word	.LANCHOR34
-	.word	.LANCHOR59
-	.word	.LANCHOR80
-	.word	.LANCHOR1
-	.word	.LANCHOR31
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR79
-	.word	.LANCHOR86
-	.word	168778952
-	.word	.LANCHOR6
-	.word	.LANCHOR42
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_memcmp,"ax",%progbits
+.L1946:
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	-52655045
+	.word	.LANCHOR0
+	.word	.LANCHOR105
+	.word	.LANCHOR186
+	.word	1179535694
+	.word	1204201446
+	.word	.LC114
+.L1898:
+	add	r3, sp, #48
+	mov	r2, r6
+	add	r1, r8, r5
+	movs	r0, #0
+	ldr	r7, [r4, #12]
+	blx	r7
+	adds	r0, r0, #1
+	beq	.L1901
+	ldr	r2, [sp, #52]
+	movw	r3, #61424
+	cmp	r2, r3
+	bne	.L1901
+	add	r6, r6, #2048
+.L1899:
+	adds	r5, r5, #1
+	b	.L1897
+.L1903:
+	ldr	r3, [sp, #36]
+	adds	r5, r5, #1
+	cmp	r5, r3
+	bne	.L1900
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #20]
+	bls	.L1904
+	b	.L1907
+.L1876:
+	cmp	r0, #64
+	bne	.L1908
+	ldr	fp, .L1948+4
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [fp]
+	mov	r0, #262144
+	bl	ftl_malloc
+	ldr	r3, .L1948
+	str	r0, [r3]
+	ldr	r3, [fp]
+	cbz	r3, .L1909
+	cbz	r0, .L1909
+	movs	r2, #1
+	movs	r1, #0
+	str	r2, [r5]
+	mov	r0, r3
+	mov	r2, #262144
+	bl	ftl_memset
+.L1908:
+	ldr	r3, [r5]
+	cmp	r3, #0
+	beq	.L1945
+	ldr	r3, .L1948+4
+	cmp	r4, #63
+	iteee	hi
+	ldrhi	r5, .L1948+8
+	rsbls	r4, r4, #64
+	subls	r6, r6, r4
+	addls	r7, r7, r4, lsl #9
+	ldr	r1, [r3]
+	mov	r2, #262144
+	it	hi
+	addhi	r5, r5, r4
+	ldr	r0, .L1948+12
+	ite	ls
+	movls	r5, r1
+	addhi	r5, r1, r5, lsl #9
+	cmp	r10, #576
+	itt	cs
+	subcs	r6, r6, r8
+	subcs	r6, r6, #446
+	mov	r3, r5
+	str	r6, [sp]
+	bl	printf
+	lsls	r2, r6, #9
+	mov	r1, r7
+	mov	r0, r5
+	bl	ftl_memcpy
+	b	.L1945
+.L1909:
+	ldr	r1, .L1948+16
+	ldr	r0, .L1948+20
+	bl	printf
+	b	.L1908
+.L1949:
+	.align	2
+.L1948:
+	.word	.LANCHOR186
+	.word	.LANCHOR185
+	.word	8388544
+	.word	.LC116
+	.word	.LANCHOR187
+	.word	.LC115
+	.size	FtlWriteToIDB, .-FtlWriteToIDB
+	.section	.text.sftl_write,"ax",%progbits
 	.align	1
-	.global	ftl_memcmp
+	.global	sftl_write
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
+	.type	sftl_write, %function
+sftl_write:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
+	push	{r4, r5, r6, lr}
+	mov	r5, r1
+	mov	r6, r2
+	mov	r4, r0
+	bl	FtlWriteToIDB
+	mov	r3, r6
+	mov	r2, r5
+	mov	r1, r4
+	movs	r0, #0
+	pop	{r4, r5, r6, lr}
+	b	FtlWrite
+	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -15353,9 +15435,9 @@ g_min_erase_count:
 	.align	2
 	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
-	.size	g_nand_ops, 16
+	.size	g_nand_ops, 24
 g_nand_ops:
-	.space	16
+	.space	24
 	.section	.bss.g_nand_phy_info,"aw",%nobits
 	.align	1
 	.set	.LANCHOR0,. + 0
@@ -16093,6 +16175,13 @@ power_up_flag:
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
 .LC113:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",%progbits,1
+.LC114:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC115:
+	.ascii	"%s idb buffer alloc fail\012\000"
+.LC116:
+	.ascii	"%p %x %p %x\012\000"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
 .LC72:
 	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
@@ -16100,222 +16189,222 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10034,"a",%progbits
-	.set	.LANCHOR176,. + 0
-	.type	__func__.10034, %object
-	.size	__func__.10034, 19
-__func__.10034:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.10145,"a",%progbits
+	.section	.rodata.__func__.10094,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.10145, %object
-	.size	__func__.10145, 23
-__func__.10145:
+	.type	__func__.10094, %object
+	.size	__func__.10094, 23
+__func__.10094:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10407,"a",%progbits
+	.section	.rodata.__func__.10356,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.10407, %object
-	.size	__func__.10407, 15
-__func__.10407:
+	.type	__func__.10356, %object
+	.size	__func__.10356, 15
+__func__.10356:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10426,"a",%progbits
+	.section	.rodata.__func__.10375,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.10426, %object
-	.size	__func__.10426, 15
-__func__.10426:
+	.type	__func__.10375, %object
+	.size	__func__.10375, 15
+__func__.10375:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10450,"a",%progbits
+	.section	.rodata.__func__.10399,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10450, %object
-	.size	__func__.10450, 17
-__func__.10450:
+	.type	__func__.10399, %object
+	.size	__func__.10399, 17
+__func__.10399:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.8814,"a",%progbits
+	.section	.rodata.__func__.10514,"a",%progbits
+	.set	.LANCHOR187,. + 0
+	.type	__func__.10514, %object
+	.size	__func__.10514, 14
+__func__.10514:
+	.ascii	"FtlWriteToIDB\000"
+	.section	.rodata.__func__.8835,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8814, %object
-	.size	__func__.8814, 11
-__func__.8814:
+	.type	__func__.8835, %object
+	.size	__func__.8835, 11
+__func__.8835:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8938,"a",%progbits
+	.section	.rodata.__func__.8959,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.8938, %object
-	.size	__func__.8938, 13
-__func__.8938:
+	.type	__func__.8959, %object
+	.size	__func__.8959, 13
+__func__.8959:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8966,"a",%progbits
+	.section	.rodata.__func__.8987,"a",%progbits
 	.set	.LANCHOR183,. + 0
-	.type	__func__.8966, %object
-	.size	__func__.8966, 9
-__func__.8966:
+	.type	__func__.8987, %object
+	.size	__func__.8987, 9
+__func__.8987:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9072,"a",%progbits
-	.set	.LANCHOR187,. + 0
-	.type	__func__.9072, %object
-	.size	__func__.9072, 14
-__func__.9072:
-	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.9113,"a",%progbits
+	.section	.rodata.__func__.9062,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9113, %object
-	.size	__func__.9113, 14
-__func__.9113:
+	.type	__func__.9062, %object
+	.size	__func__.9062, 14
+__func__.9062:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9156,"a",%progbits
+	.section	.rodata.__func__.9105,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9156, %object
-	.size	__func__.9156, 11
-__func__.9156:
+	.type	__func__.9105, %object
+	.size	__func__.9105, 11
+__func__.9105:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9271,"a",%progbits
+	.section	.rodata.__func__.9220,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9271, %object
-	.size	__func__.9271, 17
-__func__.9271:
+	.type	__func__.9220, %object
+	.size	__func__.9220, 17
+__func__.9220:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9276,"a",%progbits
+	.section	.rodata.__func__.9225,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9276, %object
-	.size	__func__.9276, 17
-__func__.9276:
+	.type	__func__.9225, %object
+	.size	__func__.9225, 17
+__func__.9225:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9307,"a",%progbits
+	.section	.rodata.__func__.9256,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9307, %object
-	.size	__func__.9307, 17
-__func__.9307:
+	.type	__func__.9256, %object
+	.size	__func__.9256, 17
+__func__.9256:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9339,"a",%progbits
+	.section	.rodata.__func__.9288,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9339, %object
-	.size	__func__.9339, 22
-__func__.9339:
+	.type	__func__.9288, %object
+	.size	__func__.9288, 22
+__func__.9288:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9348,"a",%progbits
+	.section	.rodata.__func__.9297,"a",%progbits
 	.set	.LANCHOR156,. + 0
-	.type	__func__.9348, %object
-	.size	__func__.9348, 16
-__func__.9348:
+	.type	__func__.9297, %object
+	.size	__func__.9297, 16
+__func__.9297:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9381,"a",%progbits
+	.section	.rodata.__func__.9330,"a",%progbits
 	.set	.LANCHOR107,. + 0
-	.type	__func__.9381, %object
-	.size	__func__.9381, 26
-__func__.9381:
+	.type	__func__.9330, %object
+	.size	__func__.9330, 26
+__func__.9330:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9392,"a",%progbits
+	.section	.rodata.__func__.9341,"a",%progbits
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9392, %object
-	.size	__func__.9392, 15
-__func__.9392:
+	.type	__func__.9341, %object
+	.size	__func__.9341, 15
+__func__.9341:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9407,"a",%progbits
+	.section	.rodata.__func__.9356,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9407, %object
-	.size	__func__.9407, 31
-__func__.9407:
+	.type	__func__.9356, %object
+	.size	__func__.9356, 31
+__func__.9356:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9421,"a",%progbits
+	.section	.rodata.__func__.9370,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9421, %object
-	.size	__func__.9421, 16
-__func__.9421:
+	.type	__func__.9370, %object
+	.size	__func__.9370, 16
+__func__.9370:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9446,"a",%progbits
+	.section	.rodata.__func__.9395,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9446, %object
-	.size	__func__.9446, 22
-__func__.9446:
+	.type	__func__.9395, %object
+	.size	__func__.9395, 22
+__func__.9395:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9463,"a",%progbits
+	.section	.rodata.__func__.9412,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9463, %object
-	.size	__func__.9463, 9
-__func__.9463:
+	.type	__func__.9412, %object
+	.size	__func__.9412, 9
+__func__.9412:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9536,"a",%progbits
+	.section	.rodata.__func__.9485,"a",%progbits
 	.set	.LANCHOR171,. + 0
-	.type	__func__.9536, %object
-	.size	__func__.9536, 15
-__func__.9536:
+	.type	__func__.9485, %object
+	.size	__func__.9485, 15
+__func__.9485:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9558,"a",%progbits
+	.section	.rodata.__func__.9507,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9558, %object
-	.size	__func__.9558, 14
-__func__.9558:
+	.type	__func__.9507, %object
+	.size	__func__.9507, 14
+__func__.9507:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9615,"a",%progbits
+	.section	.rodata.__func__.9564,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9615, %object
-	.size	__func__.9615, 15
-__func__.9615:
+	.type	__func__.9564, %object
+	.size	__func__.9564, 15
+__func__.9564:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9678,"a",%progbits
+	.section	.rodata.__func__.9627,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9678, %object
-	.size	__func__.9678, 16
-__func__.9678:
+	.type	__func__.9627, %object
+	.size	__func__.9627, 16
+__func__.9627:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9712,"a",%progbits
+	.section	.rodata.__func__.9661,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9712, %object
-	.size	__func__.9712, 22
-__func__.9712:
+	.type	__func__.9661, %object
+	.size	__func__.9661, 22
+__func__.9661:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9769,"a",%progbits
+	.section	.rodata.__func__.9718,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9769, %object
-	.size	__func__.9769, 16
-__func__.9769:
+	.type	__func__.9718, %object
+	.size	__func__.9718, 16
+__func__.9718:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9790,"a",%progbits
+	.section	.rodata.__func__.9739,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9790, %object
-	.size	__func__.9790, 18
-__func__.9790:
+	.type	__func__.9739, %object
+	.size	__func__.9739, 18
+__func__.9739:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9815,"a",%progbits
+	.section	.rodata.__func__.9764,"a",%progbits
 	.set	.LANCHOR173,. + 0
-	.type	__func__.9815, %object
-	.size	__func__.9815, 21
-__func__.9815:
+	.type	__func__.9764, %object
+	.size	__func__.9764, 21
+__func__.9764:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9831,"a",%progbits
+	.section	.rodata.__func__.9780,"a",%progbits
 	.set	.LANCHOR161,. + 0
-	.type	__func__.9831, %object
-	.size	__func__.9831, 14
-__func__.9831:
+	.type	__func__.9780, %object
+	.size	__func__.9780, 14
+__func__.9780:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9916,"a",%progbits
+	.section	.rodata.__func__.9865,"a",%progbits
 	.set	.LANCHOR163,. + 0
-	.type	__func__.9916, %object
-	.size	__func__.9916, 25
-__func__.9916:
+	.type	__func__.9865, %object
+	.size	__func__.9865, 25
+__func__.9865:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9937,"a",%progbits
+	.section	.rodata.__func__.9886,"a",%progbits
 	.set	.LANCHOR174,. + 0
-	.type	__func__.9937, %object
-	.size	__func__.9937, 29
-__func__.9937:
+	.type	__func__.9886, %object
+	.size	__func__.9886, 29
+__func__.9886:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9944,"a",%progbits
+	.section	.rodata.__func__.9893,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9944, %object
-	.size	__func__.9944, 19
-__func__.9944:
+	.type	__func__.9893, %object
+	.size	__func__.9893, 19
+__func__.9893:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9957,"a",%progbits
+	.section	.rodata.__func__.9906,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9957, %object
-	.size	__func__.9957, 16
-__func__.9957:
+	.type	__func__.9906, %object
+	.size	__func__.9906, 16
+__func__.9906:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9964,"a",%progbits
+	.section	.rodata.__func__.9913,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9964, %object
-	.size	__func__.9964, 20
-__func__.9964:
+	.type	__func__.9913, %object
+	.size	__func__.9913, 20
+__func__.9913:
 	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.9983,"a",%progbits
+	.set	.LANCHOR176,. + 0
+	.type	__func__.9983, %object
+	.size	__func__.9983, 19
+__func__.9983:
+	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC105:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
@@ -16360,16 +16449,7 @@ __func__.9964:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.48 20181029\000"
+	.ascii	"SFTL version: 5.0.49 20181030\000"
 .LC71:
 	.ascii	"%s\012\000"
-	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
-.LC114:
-	.ascii	"write_idblock fix data %x %x %x\012\000"
-.LC115:
-	.ascii	"write_idblock fail! %x %x %x %x\012\000"
-.LC116:
-	.ascii	"%s idb buffer alloc fail\012\000"
-.LC117:
-	.ascii	"%p %x %p %x\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 04304422f9..02cb67bcaf 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-29
+ * date: 2018-11-29
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -111,59 +111,61 @@ FtlConstantsInit:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x0
 	adrp	x1, .LANCHOR11
+	adrp	x6, .LANCHOR12
 	add	x29, sp, 0
-	ldrh	w2, [x0]
+	ldrh	w3, [x0]
 	adrp	x0, .LANCHOR9
 	ldrh	w4, [x5, 2]
-	strh	w2, [x0, #:lo12:.LANCHOR9]
+	strh	w3, [x0, #:lo12:.LANCHOR9]
 	adrp	x0, .LANCHOR10
+	ldrh	w7, [x5, 14]
 	strh	w4, [x0, #:lo12:.LANCHOR10]
 	ldrh	w0, [x5, 4]
+	cmp	w7, 4
 	strh	w0, [x1, #:lo12:.LANCHOR11]
-	ldrh	w1, [x5, 14]
-	cmp	w1, 4
+	adrp	x1, .LANCHOR6
+	ldrh	w2, [x5, 6]
+	strh	w2, [x1, #:lo12:.LANCHOR6]
+	strh	w7, [x6, #:lo12:.LANCHOR12]
 	bne	.L10
-	ldrh	w1, [x5, 6]
-	adrp	x3, .LANCHOR6
-	lsr	w1, w1, 1
-	strh	w1, [x3, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR12
-	mov	w3, 8
-	strh	w3, [x1, #:lo12:.LANCHOR12]
+	lsr	w2, w2, 1
+	strh	w2, [x1, #:lo12:.LANCHOR6]
+	mov	w2, 8
+	strh	w2, [x6, #:lo12:.LANCHOR12]
 .L10:
-	adrp	x3, .LANCHOR13
-	add	x3, x3, :lo12:.LANCHOR13
-	mov	x1, 0
+	adrp	x7, .LANCHOR13
+	add	x7, x7, :lo12:.LANCHOR13
+	mov	x2, 0
 .L11:
-	strb	w1, [x1, x3]
-	add	x1, x1, 1
-	cmp	x1, 32
+	strb	w2, [x2, x7]
+	add	x2, x2, 1
+	cmp	x2, 32
 	bne	.L11
-	adrp	x1, .LANCHOR14
-	mov	w3, 5
-	cmp	w2, 1
-	strh	w3, [x1, #:lo12:.LANCHOR14]
-	adrp	x3, .LANCHOR15
-	strh	wzr, [x3, #:lo12:.LANCHOR15]
+	adrp	x2, .LANCHOR14
+	mov	w7, 5
+	cmp	w3, 1
+	strh	w7, [x2, #:lo12:.LANCHOR14]
+	adrp	x7, .LANCHOR15
+	strh	wzr, [x7, #:lo12:.LANCHOR15]
 	bne	.L12
-	strh	w2, [x1, #:lo12:.LANCHOR14]
+	strh	w3, [x2, #:lo12:.LANCHOR14]
 .L12:
-	adrp	x1, .LANCHOR16
-	mov	w2, 640
+	adrp	x2, .LANCHOR16
+	mov	w3, 640
 	mul	w4, w4, w0
-	strh	w2, [x1, #:lo12:.LANCHOR16]
-	adrp	x1, .LANCHOR3
-	and	w4, w4, 65535
-	strh	w4, [x1, #:lo12:.LANCHOR3]
-	adrp	x1, .LANCHOR6
+	strh	w3, [x2, #:lo12:.LANCHOR16]
+	adrp	x2, .LANCHOR3
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
+	and	w4, w4, 65535
 	adrp	x1, .LANCHOR17
+	strh	w4, [x2, #:lo12:.LANCHOR3]
 	mul	w0, w0, w3
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
 	bl	Ftl_log2
 	ldrh	w7, [x5, 12]
 	adrp	x1, .LANCHOR18
+	ldrh	w6, [x6, #:lo12:.LANCHOR12]
 	adrp	x8, .LANCHOR19
 	strh	w0, [x1, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR20
@@ -172,54 +174,52 @@ FtlConstantsInit:
 	strh	w7, [x0, #:lo12:.LANCHOR20]
 	adrp	x0, .LANCHOR21
 	strh	w1, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR12
-	ldrh	w6, [x0, #:lo12:.LANCHOR12]
 	mov	w0, w6
 	bl	Ftl_log2
-	and	w1, w0, 65535
+	and	w10, w0, 65535
 	adrp	x2, .LANCHOR22
-	adrp	x10, .LANCHOR23
-	ldrh	w5, [x5, 20]
+	ubfiz	w1, w6, 9, 7
 	strh	w0, [x2, #:lo12:.LANCHOR22]
-	ubfiz	w0, w6, 9, 7
-	strh	w0, [x10, #:lo12:.LANCHOR23]
-	adrp	x10, .LANCHOR24
-	ubfx	w0, w0, 8, 8
-	strh	w0, [x10, #:lo12:.LANCHOR24]
+	adrp	x0, .LANCHOR23
+	strh	w1, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR24
+	ubfx	w1, w1, 8, 8
+	strh	w1, [x0, #:lo12:.LANCHOR24]
 	adrp	x0, .LANCHOR25
-	strh	w5, [x0, #:lo12:.LANCHOR25]
+	ldrh	w1, [x5, 20]
+	adrp	x5, .LANCHOR27
+	strh	w1, [x0, #:lo12:.LANCHOR25]
 	mul	w0, w4, w3
-	adrp	x5, .LANCHOR8
-	str	w0, [x5, #:lo12:.LANCHOR8]
-	adrp	x5, .LANCHOR26
+	adrp	x1, .LANCHOR8
+	str	w0, [x1, #:lo12:.LANCHOR8]
+	adrp	x1, .LANCHOR26
 	mul	w0, w0, w6
 	mul	w6, w6, w7
 	mul	w0, w0, w7
 	mov	x7, x2
 	asr	w0, w0, 11
-	str	w0, [x5, #:lo12:.LANCHOR26]
+	str	w0, [x1, #:lo12:.LANCHOR26]
 	mov	w0, 5120
-	adrp	x5, .LANCHOR27
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
 	cmp	w0, 4
 	bls	.L13
 .L19:
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR28
+	adrp	x1, .LANCHOR28
 	mov	w0, 640
 	lsl	w3, w3, 6
-	asr	w0, w0, w1
+	asr	w0, w0, w10
 	add	w0, w0, 2
-	add	w1, w1, 9
-	strh	w0, [x2, #:lo12:.LANCHOR28]
-	adrp	x0, .LANCHOR29
-	cmp	w4, 1
-	asr	w3, w3, w1
+	strh	w0, [x1, #:lo12:.LANCHOR28]
+	add	w0, w10, 9
 	adrp	x1, .LANCHOR30
+	cmp	w4, 1
+	asr	w3, w3, w0
+	adrp	x0, .LANCHOR29
+	adrp	x6, .LANCHOR2
 	strh	w3, [x0, #:lo12:.LANCHOR29]
 	and	w3, w3, 65535
-	adrp	x6, .LANCHOR2
 	mul	w0, w3, w4
 	add	w3, w3, 8
 	str	w0, [x1, #:lo12:.LANCHOR30]
@@ -9656,11 +9656,11 @@ sftl_deinit:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",@progbits
+	.section	.text.sftl_discard,"ax",@progbits
 	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
+	.global	sftl_discard
+	.type	sftl_discard, %function
+sftl_discard:
 	stp	x29, x30, [sp, -80]!
 	add	w2, w0, w1
 	add	x29, sp, 0
@@ -9743,7 +9743,7 @@ FtlDiscard:
 .L1346:
 	mov	w0, -1
 	b	.L1338
-	.size	FtlDiscard, .-FtlDiscard
+	.size	sftl_discard, .-sftl_discard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
 	.global	FtlVpcCheckAndModify
@@ -10003,7 +10003,7 @@ FtlProgPages:
 	bcc	.L1385
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 955
+	mov	w2, 957
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -10045,7 +10045,7 @@ FtlProgPages:
 	bcc	.L1380
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 970
+	mov	w2, 972
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11759,7 +11759,7 @@ FtlWrite:
 	bcc	.L1617
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1011
+	mov	w2, 1013
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11808,7 +11808,7 @@ FtlWrite:
 	bcc	.L1622
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1044
+	mov	w2, 1046
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11837,7 +11837,7 @@ FtlWrite:
 	bcs	.L1643
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1121
+	mov	w2, 1123
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -11917,7 +11917,7 @@ FtlWrite:
 	bcc	.L1639
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1112
+	mov	w2, 1114
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -12022,7 +12022,7 @@ FtlWrite:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
 	beq	.L1637
-	mov	w2, 1097
+	mov	w2, 1099
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR183
@@ -12093,355 +12093,6 @@ FtlWrite:
 	mov	w0, -1
 	b	.L1612
 	.size	FtlWrite, .-FtlWrite
-	.section	.text.sftl_write,"ax",@progbits
-	.align	2
-	.global	sftl_write
-	.type	sftl_write, %function
-sftl_write:
-	stp	x29, x30, [sp, -256]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w0
-	stp	x19, x20, [sp, 16]
-	add	w20, w0, w1
-	stp	x23, x24, [sp, 48]
-	sub	w22, w20, #1
-	stp	x25, x26, [sp, 64]
-	mov	w24, w1
-	stp	x27, x28, [sp, 80]
-	cmp	w22, 63
-	str	x2, [x29, 168]
-	adrp	x25, .LANCHOR184
-	bls	.L1664
-	cmp	w0, 575
-	bls	.L1665
-.L1664:
-	ldr	w0, [x25, #:lo12:.LANCHOR184]
-	cbz	w0, .L1667
-	adrp	x0, .LANCHOR185
-	str	x0, [x29, 128]
-	mov	w1, 35899
-	ldr	x23, [x0, #:lo12:.LANCHOR185]
-	movk	w1, 0xfcdc, lsl 16
-	ldr	w2, [x23]
-	cmp	w2, w1
-	beq	.L1668
-.L1685:
-	ldr	x0, [x29, 128]
-	str	wzr, [x25, #:lo12:.LANCHOR184]
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	bl	free
-	adrp	x0, .LANCHOR186
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-	bl	free
-.L1667:
-	ldr	x3, [x29, 168]
-	mov	w2, w24
-	mov	w1, w21
-	mov	w0, 0
-	bl	FtlWrite
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 256
-	ret
-.L1668:
-	adrp	x1, .LANCHOR0
-	add	x0, x1, :lo12:.LANCHOR0
-	mov	w2, 65535
-	mov	w4, 4097
-	str	x1, [x29, 152]
-	ldrh	w20, [x0, 14]
-	ldrh	w19, [x0, 10]
-	mov	x0, 262140
-	add	x3, x23, x0
-	mov	w0, 0
-.L1672:
-	ldr	w1, [x3]
-	cbnz	w1, .L1669
-	ldr	w1, [x23, w0, uxtw 2]
-	add	w0, w0, 1
-	str	w1, [x3], -4
-	cmp	w0, w4
-	sub	w2, w2, #1
-	csel	w0, w0, wzr, cc
-	cmp	w2, 4096
-	bne	.L1672
-	mov	w22, 512
-	b	.L1671
-.L1669:
-	add	w22, w2, 127
-	adrp	x0, .LC114
-	lsr	w22, w22, 7
-	add	x0, x0, :lo12:.LC114
-	mov	w3, w22
-	bl	printf
-.L1671:
-	and	w20, w20, 255
-	adrp	x26, .LANCHOR105
-	mul	w19, w19, w20
-	and	w0, w19, 65535
-	str	w0, [x29, 188]
-	sub	w20, w0, #1
-	mov	w19, 0
-	add	w20, w20, w22
-	udiv	w20, w20, w0
-	mul	w0, w0, w20
-	stp	w20, wzr, [x29, 176]
-	str	w0, [x29, 184]
-	lsl	w0, w22, 7
-	str	w0, [x29, 148]
-	add	x0, x26, :lo12:.LANCHOR105
-	str	x0, [x29, 120]
-	b	.L1684
-.L1675:
-	add	w0, w5, w4
-	ldr	x3, [x29, 120]
-	ubfiz	x2, x4, 9, 16
-	stp	w5, w4, [x29, 100]
-	str	w6, [x29, 112]
-	add	x2, x23, x2
-	udiv	w0, w0, w27
-	str	w7, [x29, 144]
-	ldr	x8, [x3, 16]
-	add	x3, x29, 192
-	and	w0, w0, 65535
-	mul	w1, w0, w27
-	stp	w1, w7, [x29, 192]
-	udiv	w1, w6, w27
-	add	w1, w1, w0
-	mov	w0, 0
-	blr	x8
-	ldp	w5, w4, [x29, 100]
-	ldr	w0, [x29, 136]
-	ldr	w6, [x29, 112]
-	add	w4, w0, w4
-	ldr	w7, [x29, 144]
-	and	w4, w4, 65535
-	b	.L1674
-.L1677:
-	add	w27, w8, w27
-	mov	w0, 0
-	and	w27, w27, 65535
-	b	.L1676
-.L1682:
-	mov	x27, x2
-	ldr	w4, [x0, x1, lsl 2]
-	lsl	x5, x1, 2
-	add	x2, x2, 4
-	add	x1, x1, 1
-	ldr	w3, [x27]
-	cmp	w4, w3
-	beq	.L1678
-	mov	x2, 512
-	mov	w1, 0
-	str	x5, [x29, 136]
-	bl	memset
-	ldr	x0, [x29, 160]
-	mov	w4, w28
-	ldr	x5, [x29, 136]
-	mov	w1, w19
-	ldr	w3, [x27]
-	add	x27, x26, :lo12:.LANCHOR105
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-	ldr	w2, [x0, x5]
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
-	bl	printf
-	ldr	x2, [x27, 8]
-	mov	w1, w19
-	mov	w0, 0
-	blr	x2
-	cmp	w20, 1
-	bls	.L1692
-	ldr	x2, [x27, 8]
-	ldr	w0, [x29, 188]
-	add	w1, w0, w19
-	mov	w0, 0
-	blr	x2
-.L1692:
-	ldr	w1, [x29, 184]
-	ldr	w0, [x29, 176]
-	add	w19, w19, w1
-	ldr	w1, [x29, 176]
-	add	w0, w20, w0
-	cmp	w1, 15
-	bhi	.L1685
-	str	w0, [x29, 176]
-.L1684:
-	adrp	x5, .LANCHOR186
-	mov	x2, 512
-	mov	w1, 0
-	str	x5, [x29, 160]
-	ldr	x0, [x5, #:lo12:.LANCHOR186]
-	bl	memset
-	ldr	x0, [x29, 152]
-	add	x4, x26, :lo12:.LANCHOR105
-	str	x4, [x29, 104]
-	add	x0, x0, :lo12:.LANCHOR0
-	ldr	x6, [x4, 8]
-	ldrh	w3, [x0, 14]
-	ldrh	w2, [x0, 10]
-	mov	w0, 0
-	and	w27, w3, 255
-	str	w3, [x29, 112]
-	str	w27, [x29, 136]
-	udiv	w1, w19, w3
-	mul	w2, w27, w2
-	and	w28, w2, 65535
-	blr	x6
-	ldr	w0, [x29, 184]
-	ldr	w3, [x29, 112]
-	cmp	w0, w28
-	ldr	x4, [x29, 104]
-	bls	.L1673
-	add	w1, w28, w19
-	ldr	x4, [x4, 8]
-	mov	w0, 0
-	udiv	w1, w1, w3
-	blr	x4
-.L1673:
-	udiv	w5, w19, w28
-	mov	w4, 0
-	mov	w7, 61424
-	msub	w5, w5, w28, w19
-	sub	w6, w19, w5
-.L1674:
-	ldr	w0, [x29, 184]
-	cmp	w0, w4
-	bhi	.L1675
-	ldr	x0, [x29, 160]
-	add	x10, x26, :lo12:.LANCHOR105
-	mov	w27, 0
-	ldr	x6, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR0
-	ldrh	w4, [x0, 14]
-	ldrh	w5, [x0, 10]
-	and	w28, w4, 255
-	mov	w4, w28
-	mul	w5, w28, w5
-	and	w0, w5, 65535
-	udiv	w5, w19, w0
-	msub	w5, w5, w0, w19
-	and	w1, w5, 65535
-	sub	w7, w19, w5
-	sdiv	w0, w1, w28
-	msub	w0, w0, w28, w1
-	and	w0, w0, 65535
-.L1676:
-	cmp	w27, w22
-	bcs	.L1680
-	add	w1, w5, w27
-	sub	w8, w4, w0
-	add	w0, w0, w7
-	ldr	x11, [x10, 24]
-	and	w8, w8, 65535
-	ubfiz	x2, x27, 9, 16
-	udiv	w1, w1, w28
-	add	x2, x6, x2
-	stp	w4, w8, [x29, 96]
-	add	x3, x29, 192
-	str	w7, [x29, 104]
-	str	x10, [x29, 112]
-	and	w1, w1, 65535
-	str	x6, [x29, 136]
-	str	w5, [x29, 144]
-	madd	w1, w1, w28, w0
-	mov	w0, 0
-	udiv	w1, w1, w28
-	blr	x11
-	cmn	w0, #1
-	ldp	w4, w8, [x29, 96]
-	ldr	w7, [x29, 104]
-	ldr	w5, [x29, 144]
-	ldr	x10, [x29, 112]
-	ldr	x6, [x29, 136]
-	bne	.L1677
-.L1680:
-	ldr	x0, [x29, 160]
-	mov	x2, x23
-	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1678:
-	ldr	w3, [x29, 148]
-	mov	w28, w1
-	cmp	w1, w3
-	bcc	.L1682
-	ldr	w0, [x29, 180]
-	add	w0, w0, 1
-	str	w0, [x29, 180]
-	cmp	w0, 5
-	bls	.L1692
-	b	.L1685
-.L1665:
-	cmp	w0, 64
-	bne	.L1686
-	adrp	x19, .LANCHOR185
-	mov	w0, 262144
-	bl	ftl_malloc
-	str	x0, [x19, #:lo12:.LANCHOR185]
-	mov	w0, 262144
-	bl	ftl_malloc
-	mov	x1, x0
-	adrp	x0, .LANCHOR186
-	str	x1, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x19, #:lo12:.LANCHOR185]
-	cbz	x0, .L1687
-	cbz	x1, .L1687
-	mov	w1, 1
-	mov	w2, 262144
-	str	w1, [x25, #:lo12:.LANCHOR184]
-	mov	w1, 0
-	bl	ftl_memset
-.L1686:
-	ldr	w0, [x25, #:lo12:.LANCHOR184]
-	cbz	w0, .L1667
-	adrp	x0, .LANCHOR185
-	cmp	w21, 63
-	ldr	x1, [x0, #:lo12:.LANCHOR185]
-	bhi	.L1689
-	mov	w23, 64
-	ldr	x0, [x29, 168]
-	sub	w23, w23, w21
-	mov	x19, x1
-	sub	w25, w24, w23
-	ubfiz	x23, x23, 9, 25
-	add	x23, x0, x23
-.L1690:
-	cmp	w22, 575
-	bls	.L1691
-	sub	w25, w25, w20
-	sub	w25, w25, #446
-.L1691:
-	mov	w4, w25
-	mov	x3, x19
-	mov	w2, 262144
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
-	bl	printf
-	lsl	w2, w25, 9
-	mov	x1, x23
-	mov	x0, x19
-	bl	ftl_memcpy
-	b	.L1667
-.L1687:
-	adrp	x1, .LANCHOR187
-	adrp	x0, .LC116
-	add	x1, x1, :lo12:.LANCHOR187
-	add	x0, x0, :lo12:.LC116
-	bl	printf
-	b	.L1686
-.L1689:
-	lsl	w19, w21, 7
-	mov	w25, w24
-	sub	w19, w19, #8192
-	ldr	x23, [x29, 168]
-	add	x19, x1, x19, lsl 2
-	b	.L1690
-	.size	sftl_write, .-sftl_write
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
 	.global	FtlMakeBbt
@@ -12466,42 +12117,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L1710:
+.L1664:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1716
+	bcc	.L1670
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1717:
+.L1671:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1718
+	bhi	.L1672
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1719:
+.L1673:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1723
+	bgt	.L1677
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1720
+	beq	.L1674
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1721
+	cbz	w0, .L1675
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1720:
+.L1674:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1719
-.L1716:
+	b	.L1673
+.L1670:
 	adrp	x2, .LANCHOR123
 	adrp	x0, .LANCHOR115
 	add	x19, x28, :lo12:.LANCHOR148
@@ -12513,7 +12164,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L1711
+	beq	.L1665
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -12528,14 +12179,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1712:
+.L1666:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1710
-.L1711:
+	b	.L1664
+.L1665:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -12548,12 +12199,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L1713:
+.L1667:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1714
+	beq	.L1668
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -12591,29 +12242,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1712
+	bne	.L1666
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L1713
-.L1714:
+	b	.L1667
+.L1668:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1713
-.L1718:
+	b	.L1667
+.L1672:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1717
-.L1721:
+	b	.L1671
+.L1675:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1722
+	bne	.L1676
 	strh	w19, [x21]
-	b	.L1720
-.L1722:
+	b	.L1674
+.L1676:
 	strh	w19, [x21, 4]
-.L1723:
+.L1677:
 	adrp	x0, .LANCHOR106
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -12670,9 +12321,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1730
+	cbz	w0, .L1684
 	bl	FtlMakeBbt
-.L1730:
+.L1684:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR118
 	mov	w6, 23752
@@ -12683,31 +12334,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1731:
+.L1685:
 	cmp	w0, w1
-	blt	.L1732
+	blt	.L1686
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1733:
+.L1687:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1734
+	bhi	.L1688
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1735
-.L1739:
+	bgt	.L1689
+.L1693:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1736:
+.L1690:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1740
+	bhi	.L1694
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -12724,28 +12375,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1741
+	ble	.L1695
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1741:
+.L1695:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1743
+	cbz	w1, .L1697
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1743
+	bge	.L1697
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1743:
+.L1697:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
@@ -12789,20 +12440,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1745:
+.L1699:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1746
+	cbnz	w1, .L1700
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1745
-.L1732:
+	b	.L1699
+.L1686:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12810,8 +12461,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1731
-.L1734:
+	b	.L1685
+.L1688:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12819,8 +12470,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1733
-.L1735:
+	b	.L1687
+.L1689:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12830,17 +12481,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1737:
+.L1691:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1739
+	bls	.L1693
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1737
-.L1740:
+	b	.L1691
+.L1694:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12848,8 +12499,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1736
-.L1746:
+	b	.L1690
+.L1700:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12869,20 +12520,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1747:
+.L1701:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1748
+	cbnz	w1, .L1702
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1747
-.L1748:
+	b	.L1701
+.L1702:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12908,11 +12559,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1749
+	cbnz	w0, .L1703
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1749:
+.L1703:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12929,6 +12580,444 @@ ftl_memcmp:
 	uxtw	x2, w2
 	b	memcmp
 	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.FtlWriteToIDB,"ax",@progbits
+	.align	2
+	.global	FtlWriteToIDB
+	.type	FtlWriteToIDB, %function
+FtlWriteToIDB:
+	stp	x29, x30, [sp, -224]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	add	w23, w1, w0
+	stp	x25, x26, [sp, 64]
+	sub	w25, w23, #1
+	stp	x19, x20, [sp, 16]
+	cmp	w25, 63
+	stp	x21, x22, [sp, 32]
+	adrp	x24, .LANCHOR184
+	stp	x27, x28, [sp, 80]
+	bls	.L1710
+	mov	w19, w0
+	cmp	w0, 575
+	bls	.L1711
+.L1710:
+	ldr	w0, [x24, #:lo12:.LANCHOR184]
+	cbnz	w0, .L1712
+.L1779:
+	mov	w19, 0
+	b	.L1709
+.L1712:
+	adrp	x0, .LANCHOR185
+	str	x0, [x29, 120]
+	mov	w1, 35899
+	ldr	x23, [x0, #:lo12:.LANCHOR185]
+	movk	w1, 0xfcdc, lsl 16
+	ldr	w2, [x23]
+	cmp	w2, w1
+	bne	.L1714
+	adrp	x21, .LANCHOR0
+	add	x0, x21, :lo12:.LANCHOR0
+	mov	w19, 65535
+	mov	w3, 4097
+	ldrh	w1, [x0, 10]
+	mov	x0, 262140
+	add	x2, x23, x0
+	mov	w0, 0
+.L1718:
+	ldr	w4, [x2]
+	cbnz	w4, .L1715
+	ldr	w4, [x23, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w4, [x2], -4
+	cmp	w0, w3
+	sub	w19, w19, #1
+	csel	w0, w0, wzr, cc
+	cmp	w19, 4096
+	bne	.L1718
+	mov	w19, 512
+	b	.L1717
+.L1715:
+	add	w19, w19, 127
+	lsr	w19, w19, 7
+.L1717:
+	add	w0, w19, 4
+	ubfiz	w1, w1, 2, 14
+	mov	w22, 0
+	udiv	w0, w0, w1
+	add	w0, w0, 1
+	stp	wzr, w0, [x29, 152]
+	lsl	w0, w19, 7
+	str	w0, [x29, 136]
+	adrp	x0, .LANCHOR105
+	add	x20, x0, :lo12:.LANCHOR105
+.L1741:
+	adrp	x26, .LANCHOR186
+	mov	w1, 0
+	mov	x2, 512
+	ldr	x0, [x26, #:lo12:.LANCHOR186]
+	bl	memset
+	str	x26, [x29, 144]
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w27, [x0, 10]
+	adrp	x0, .LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR105
+	ldr	x1, [x0, 32]
+	mul	w25, w27, w22
+	cbz	x1, .L1749
+	ldr	x0, [x0, 40]
+	mov	w26, 6
+	cmp	x0, 0
+	mov	w0, 9
+	csel	w26, w26, w0, eq
+.L1719:
+	ldr	x2, [x20, 8]
+	mov	w1, w25
+	mov	w0, 0
+	blr	x2
+	ldr	w0, [x29, 156]
+	cmp	w0, 1
+	beq	.L1720
+	ldr	x2, [x20, 8]
+	add	w1, w27, w25
+	mov	w0, 0
+	blr	x2
+.L1720:
+	cmp	w26, 9
+	bne	.L1751
+	ldr	x0, [x29, 144]
+	mov	w2, 1024
+	mov	w1, 0
+	ldr	x28, [x0, #:lo12:.LANCHOR186]
+	mov	x0, x28
+	bl	ftl_memset
+	mov	w0, 18766
+	add	x5, x28, 12
+	movk	w0, 0x464e, lsl 16
+	str	w0, [x28]
+	mov	w0, 12
+	str	w0, [x28, 4]
+	mov	w0, 4
+	strb	w0, [x28, 17]
+	add	x0, x21, :lo12:.LANCHOR0
+	strb	wzr, [x28, 16]
+	strb	wzr, [x28, 20]
+	mov	x2, 0
+	strh	wzr, [x28, 22]
+	ldrh	w0, [x0, 10]
+	strh	w0, [x28, 18]
+	mov	w0, 16
+	strb	w0, [x28, 21]
+	mov	w0, 42982
+	str	wzr, [x28, 12]
+	movk	w0, 0x47c6, lsl 16
+.L1722:
+	lsr	w1, w0, 2
+	ldrb	w3, [x5, x2]
+	add	w1, w1, w0, lsl 5
+	add	x2, x2, 1
+	add	w1, w1, w3
+	cmp	x2, 12
+	eor	w0, w0, w1
+	bne	.L1722
+	str	w0, [x28, 8]
+.L1721:
+	ldr	w0, [x29, 156]
+	mov	x6, x23
+	mul	w0, w0, w27
+	mov	x27, 0
+	str	w0, [x29, 140]
+	add	w0, w25, 1
+	str	w0, [x29, 132]
+.L1723:
+	ldr	w0, [x29, 140]
+	mov	w1, w27
+	cmp	w27, w0
+	bcs	.L1730
+	cmp	w26, 9
+	bne	.L1724
+	ldr	w0, [x29, 132]
+	add	w0, w0, w1
+.L1778:
+	str	w0, [x29, 160]
+	mov	w0, 61424
+	str	w0, [x29, 164]
+	cmp	w1, 0
+	ccmp	w26, 9, 0, eq
+	bne	.L1726
+	ldr	x1, [x20, 32]
+	mov	w0, 70
+	str	x6, [x29, 104]
+	blr	x1
+	ldr	x7, [x20, 16]
+	add	x3, x29, 160
+	mov	x2, x28
+	mov	w1, w25
+	mov	w0, 0
+	blr	x7
+	mov	w1, w0
+	add	x0, x21, :lo12:.LANCHOR0
+	ldr	x2, [x20, 32]
+	str	w1, [x29, 112]
+	ldrb	w0, [x0, 22]
+	blr	x2
+	ldr	w1, [x29, 112]
+	ldr	x6, [x29, 104]
+	cmn	w1, #1
+	bne	.L1727
+.L1730:
+	ldr	x0, [x29, 144]
+	ldr	x26, [x0, #:lo12:.LANCHOR186]
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrb	w28, [x0, 14]
+	ldrh	w0, [x0, 10]
+	mul	w1, w0, w22
+	str	w1, [x29, 140]
+	ldr	x1, [x20, 32]
+	cbnz	x1, .L1728
+	mov	w25, 6
+.L1729:
+	ldr	w1, [x29, 156]
+	mov	x27, 0
+	mul	w0, w1, w0
+	str	w0, [x29, 132]
+.L1732:
+	ldr	w0, [x29, 132]
+	mov	w1, w27
+	cmp	w0, w27
+	bls	.L1736
+	cmp	w27, 0
+	ccmp	w25, 9, 0, eq
+	bne	.L1733
+	ldr	x1, [x20, 32]
+	mov	w0, 70
+	blr	x1
+	ldr	x1, [x20, 40]
+	mov	w0, 2
+	blr	x1
+	ldr	x6, [x20, 24]
+	add	x3, x29, 160
+	ldr	w1, [x29, 140]
+	mov	x2, x26
+	mov	w0, 0
+	blr	x6
+	ldr	x1, [x20, 40]
+	mov	w0, w28
+	blr	x1
+	add	x0, x21, :lo12:.LANCHOR0
+	ldr	x1, [x20, 32]
+	ldrb	w0, [x0, 22]
+	blr	x1
+	ldr	w0, [x26]
+	mov	w1, 18766
+	movk	w1, 0x464e, lsl 16
+	cmp	w0, w1
+	beq	.L1734
+.L1736:
+	ldr	x0, [x29, 144]
+	mov	x2, x23
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+.L1735:
+	ldr	w3, [x29, 136]
+	mov	w26, w1
+	cmp	w1, w3
+	bcc	.L1739
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	cmp	w0, 5
+	bls	.L1738
+	b	.L1742
+.L1749:
+	mov	w26, 6
+	b	.L1719
+.L1751:
+	mov	x28, 0
+	b	.L1721
+.L1724:
+	add	w0, w1, w25
+	lsl	w0, w0, 2
+	b	.L1778
+.L1726:
+	ldr	x7, [x20, 16]
+	add	x3, x29, 160
+	mov	x2, x6
+	add	w1, w1, w25
+	mov	w0, 0
+	str	x6, [x29, 112]
+	blr	x7
+	cmn	w0, #1
+	beq	.L1730
+	ldr	x6, [x29, 112]
+	add	x6, x6, 2048
+.L1727:
+	add	x27, x27, 1
+	b	.L1723
+.L1728:
+	ldr	x1, [x20, 40]
+	mov	w25, 6
+	cmp	x1, 0
+	mov	w1, 9
+	csel	w25, w25, w1, eq
+	b	.L1729
+.L1733:
+	ldr	x6, [x20, 24]
+	add	x3, x29, 160
+	ldr	w0, [x29, 140]
+	mov	x2, x26
+	add	w1, w0, w1
+	mov	w0, 0
+	blr	x6
+	cmn	w0, #1
+	beq	.L1736
+	ldr	w0, [x29, 164]
+	mov	w1, 61424
+	cmp	w0, w1
+	bne	.L1736
+	add	x26, x26, 2048
+.L1734:
+	add	x27, x27, 1
+	b	.L1732
+.L1739:
+	mov	x25, x2
+	ldr	w4, [x0, x1, lsl 2]
+	lsl	x27, x1, 2
+	add	x2, x2, 4
+	add	x1, x1, 1
+	ldr	w3, [x25]
+	cmp	w4, w3
+	beq	.L1735
+	mov	x2, 512
+	mov	w1, 0
+	bl	memset
+	ldr	x0, [x29, 144]
+	mov	w1, w22
+	ldr	w3, [x25]
+	mov	w4, w26
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	w2, [x0, x27]
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
+	bl	printf
+	add	x0, x21, :lo12:.LANCHOR0
+	ldr	x2, [x20, 8]
+	ldrh	w1, [x0, 10]
+	mov	w0, 0
+	mul	w1, w1, w22
+	blr	x2
+.L1738:
+	ldr	w0, [x29, 156]
+	add	w22, w22, w0
+	cmp	w22, 15
+	bls	.L1741
+	ldr	w0, [x29, 152]
+	cbnz	w0, .L1742
+.L1714:
+	mov	w19, -1
+.L1742:
+	ldr	x0, [x29, 120]
+	str	wzr, [x24, #:lo12:.LANCHOR184]
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	bl	free
+	adrp	x0, .LANCHOR186
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	bl	free
+.L1709:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 224
+	ret
+.L1711:
+	mov	w21, w1
+	mov	x22, x2
+	cmp	w0, 64
+	bne	.L1743
+	adrp	x20, .LANCHOR185
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x20, #:lo12:.LANCHOR185]
+	mov	w0, 262144
+	bl	ftl_malloc
+	mov	x1, x0
+	adrp	x0, .LANCHOR186
+	str	x1, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x20, #:lo12:.LANCHOR185]
+	cbz	x0, .L1744
+	cbz	x1, .L1744
+	mov	w1, 1
+	mov	w2, 262144
+	str	w1, [x24, #:lo12:.LANCHOR184]
+	mov	w1, 0
+	bl	ftl_memset
+.L1743:
+	ldr	w0, [x24, #:lo12:.LANCHOR184]
+	cbz	w0, .L1779
+	adrp	x0, .LANCHOR185
+	cmp	w19, 63
+	ldr	x1, [x0, #:lo12:.LANCHOR185]
+	bhi	.L1746
+	mov	w0, 64
+	sub	w19, w0, w19
+	sub	w21, w21, w19
+	ubfiz	x19, x19, 9, 25
+	add	x22, x22, x19
+	mov	x20, x1
+.L1747:
+	cmp	w25, 575
+	bls	.L1748
+	sub	w21, w21, w23
+	sub	w21, w21, #446
+.L1748:
+	mov	w4, w21
+	mov	x3, x20
+	mov	w2, 262144
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
+	bl	printf
+	lsl	w2, w21, 9
+	mov	x1, x22
+	mov	x0, x20
+	bl	ftl_memcpy
+	b	.L1779
+.L1744:
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC115
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC115
+	bl	printf
+	b	.L1743
+.L1746:
+	lsl	w20, w19, 7
+	sub	w20, w20, #8192
+	add	x20, x1, x20, lsl 2
+	b	.L1747
+	.size	FtlWriteToIDB, .-FtlWriteToIDB
+	.section	.text.sftl_write,"ax",@progbits
+	.align	2
+	.global	sftl_write
+	.type	sftl_write, %function
+sftl_write:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	mov	w19, w0
+	str	x21, [sp, 32]
+	mov	x21, x2
+	bl	FtlWriteToIDB
+	mov	x3, x21
+	mov	w2, w20
+	mov	w1, w19
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 48
+	b	FtlWrite
+	.size	sftl_write, .-sftl_write
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -13620,9 +13709,9 @@ g_min_erase_count:
 	.align	3
 	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
-	.size	g_nand_ops, 32
+	.size	g_nand_ops, 48
 g_nand_ops:
-	.zero	32
+	.zero	48
 	.section	.bss.g_nand_phy_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR0,. + 0
@@ -14359,264 +14448,271 @@ power_up_flag:
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
 .LC113:
 	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1
+.LC114:
+	.string	"write_idblock fail! %x %x %x %x\n"
+.LC115:
+	.string	"%s idb buffer alloc fail\n"
+.LC116:
+	.string	"%p %x %p %x\n"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
 .LC72:
 	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6127,"a",@progbits
+	.section	.rodata.__func__.6148,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6127, %object
-	.size	__func__.6127, 11
-__func__.6127:
+	.type	__func__.6148, %object
+	.size	__func__.6148, 11
+__func__.6148:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6251,"a",@progbits
+	.section	.rodata.__func__.6272,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.6251, %object
-	.size	__func__.6251, 13
-__func__.6251:
+	.type	__func__.6272, %object
+	.size	__func__.6272, 13
+__func__.6272:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6279,"a",@progbits
+	.section	.rodata.__func__.6300,"a",@progbits
 	.align	3
 	.set	.LANCHOR183,. + 0
-	.type	__func__.6279, %object
-	.size	__func__.6279, 9
-__func__.6279:
+	.type	__func__.6300, %object
+	.size	__func__.6300, 9
+__func__.6300:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6385,"a",@progbits
-	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.6385, %object
-	.size	__func__.6385, 14
-__func__.6385:
-	.string	"FtlWriteToIDB"
-	.section	.rodata.__func__.6426,"a",@progbits
+	.section	.rodata.__func__.6375,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6426, %object
-	.size	__func__.6426, 14
-__func__.6426:
+	.type	__func__.6375, %object
+	.size	__func__.6375, 14
+__func__.6375:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6469,"a",@progbits
+	.section	.rodata.__func__.6418,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6469, %object
-	.size	__func__.6469, 11
-__func__.6469:
+	.type	__func__.6418, %object
+	.size	__func__.6418, 11
+__func__.6418:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6584,"a",@progbits
+	.section	.rodata.__func__.6533,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6584, %object
-	.size	__func__.6584, 17
-__func__.6584:
+	.type	__func__.6533, %object
+	.size	__func__.6533, 17
+__func__.6533:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6589,"a",@progbits
+	.section	.rodata.__func__.6538,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6589, %object
-	.size	__func__.6589, 17
-__func__.6589:
+	.type	__func__.6538, %object
+	.size	__func__.6538, 17
+__func__.6538:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6620,"a",@progbits
+	.section	.rodata.__func__.6569,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6620, %object
-	.size	__func__.6620, 17
-__func__.6620:
+	.type	__func__.6569, %object
+	.size	__func__.6569, 17
+__func__.6569:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6652,"a",@progbits
+	.section	.rodata.__func__.6601,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6652, %object
-	.size	__func__.6652, 22
-__func__.6652:
+	.type	__func__.6601, %object
+	.size	__func__.6601, 22
+__func__.6601:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6661,"a",@progbits
+	.section	.rodata.__func__.6610,"a",@progbits
 	.align	3
 	.set	.LANCHOR156,. + 0
-	.type	__func__.6661, %object
-	.size	__func__.6661, 16
-__func__.6661:
+	.type	__func__.6610, %object
+	.size	__func__.6610, 16
+__func__.6610:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6694,"a",@progbits
+	.section	.rodata.__func__.6643,"a",@progbits
 	.align	3
 	.set	.LANCHOR107,. + 0
-	.type	__func__.6694, %object
-	.size	__func__.6694, 26
-__func__.6694:
+	.type	__func__.6643, %object
+	.size	__func__.6643, 26
+__func__.6643:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6705,"a",@progbits
+	.section	.rodata.__func__.6654,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.6705, %object
-	.size	__func__.6705, 15
-__func__.6705:
+	.type	__func__.6654, %object
+	.size	__func__.6654, 15
+__func__.6654:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6720,"a",@progbits
+	.section	.rodata.__func__.6669,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6720, %object
-	.size	__func__.6720, 31
-__func__.6720:
+	.type	__func__.6669, %object
+	.size	__func__.6669, 31
+__func__.6669:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6734,"a",@progbits
+	.section	.rodata.__func__.6683,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6734, %object
-	.size	__func__.6734, 16
-__func__.6734:
+	.type	__func__.6683, %object
+	.size	__func__.6683, 16
+__func__.6683:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6759,"a",@progbits
+	.section	.rodata.__func__.6708,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6759, %object
-	.size	__func__.6759, 22
-__func__.6759:
+	.type	__func__.6708, %object
+	.size	__func__.6708, 22
+__func__.6708:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6776,"a",@progbits
+	.section	.rodata.__func__.6725,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.6776, %object
-	.size	__func__.6776, 9
-__func__.6776:
+	.type	__func__.6725, %object
+	.size	__func__.6725, 9
+__func__.6725:
 	.string	"log2phys"
-	.section	.rodata.__func__.6849,"a",@progbits
+	.section	.rodata.__func__.6798,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.6849, %object
-	.size	__func__.6849, 15
-__func__.6849:
+	.type	__func__.6798, %object
+	.size	__func__.6798, 15
+__func__.6798:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6871,"a",@progbits
+	.section	.rodata.__func__.6820,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6871, %object
-	.size	__func__.6871, 14
-__func__.6871:
+	.type	__func__.6820, %object
+	.size	__func__.6820, 14
+__func__.6820:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6928,"a",@progbits
+	.section	.rodata.__func__.6877,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6928, %object
-	.size	__func__.6928, 15
-__func__.6928:
+	.type	__func__.6877, %object
+	.size	__func__.6877, 15
+__func__.6877:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6991,"a",@progbits
+	.section	.rodata.__func__.6940,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6991, %object
-	.size	__func__.6991, 16
-__func__.6991:
+	.type	__func__.6940, %object
+	.size	__func__.6940, 16
+__func__.6940:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.7025,"a",@progbits
+	.section	.rodata.__func__.6974,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.7025, %object
-	.size	__func__.7025, 22
-__func__.7025:
+	.type	__func__.6974, %object
+	.size	__func__.6974, 22
+__func__.6974:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7082,"a",@progbits
+	.section	.rodata.__func__.7031,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7082, %object
-	.size	__func__.7082, 16
-__func__.7082:
+	.type	__func__.7031, %object
+	.size	__func__.7031, 16
+__func__.7031:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7103,"a",@progbits
+	.section	.rodata.__func__.7052,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7103, %object
-	.size	__func__.7103, 18
-__func__.7103:
+	.type	__func__.7052, %object
+	.size	__func__.7052, 18
+__func__.7052:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7128,"a",@progbits
+	.section	.rodata.__func__.7077,"a",@progbits
 	.align	3
 	.set	.LANCHOR173,. + 0
-	.type	__func__.7128, %object
-	.size	__func__.7128, 21
-__func__.7128:
+	.type	__func__.7077, %object
+	.size	__func__.7077, 21
+__func__.7077:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7144,"a",@progbits
+	.section	.rodata.__func__.7093,"a",@progbits
 	.align	3
 	.set	.LANCHOR161,. + 0
-	.type	__func__.7144, %object
-	.size	__func__.7144, 14
-__func__.7144:
+	.type	__func__.7093, %object
+	.size	__func__.7093, 14
+__func__.7093:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7229,"a",@progbits
+	.section	.rodata.__func__.7178,"a",@progbits
 	.align	3
 	.set	.LANCHOR163,. + 0
-	.type	__func__.7229, %object
-	.size	__func__.7229, 25
-__func__.7229:
+	.type	__func__.7178, %object
+	.size	__func__.7178, 25
+__func__.7178:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7250,"a",@progbits
+	.section	.rodata.__func__.7199,"a",@progbits
 	.align	3
 	.set	.LANCHOR174,. + 0
-	.type	__func__.7250, %object
-	.size	__func__.7250, 29
-__func__.7250:
+	.type	__func__.7199, %object
+	.size	__func__.7199, 29
+__func__.7199:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7257,"a",@progbits
+	.section	.rodata.__func__.7206,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7257, %object
-	.size	__func__.7257, 19
-__func__.7257:
+	.type	__func__.7206, %object
+	.size	__func__.7206, 19
+__func__.7206:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7270,"a",@progbits
+	.section	.rodata.__func__.7219,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.7270, %object
-	.size	__func__.7270, 16
-__func__.7270:
+	.type	__func__.7219, %object
+	.size	__func__.7219, 16
+__func__.7219:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7277,"a",@progbits
+	.section	.rodata.__func__.7226,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.7277, %object
-	.size	__func__.7277, 20
-__func__.7277:
+	.type	__func__.7226, %object
+	.size	__func__.7226, 20
+__func__.7226:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7347,"a",@progbits
+	.section	.rodata.__func__.7296,"a",@progbits
 	.align	3
 	.set	.LANCHOR176,. + 0
-	.type	__func__.7347, %object
-	.size	__func__.7347, 19
-__func__.7347:
+	.type	__func__.7296, %object
+	.size	__func__.7296, 19
+__func__.7296:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7458,"a",@progbits
+	.section	.rodata.__func__.7407,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.7458, %object
-	.size	__func__.7458, 23
-__func__.7458:
+	.type	__func__.7407, %object
+	.size	__func__.7407, 23
+__func__.7407:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7720,"a",@progbits
+	.section	.rodata.__func__.7669,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7720, %object
-	.size	__func__.7720, 15
-__func__.7720:
+	.type	__func__.7669, %object
+	.size	__func__.7669, 15
+__func__.7669:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7739,"a",@progbits
+	.section	.rodata.__func__.7688,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.7739, %object
-	.size	__func__.7739, 15
-__func__.7739:
+	.type	__func__.7688, %object
+	.size	__func__.7688, 15
+__func__.7688:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7763,"a",@progbits
+	.section	.rodata.__func__.7712,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7763, %object
-	.size	__func__.7763, 17
-__func__.7763:
+	.type	__func__.7712, %object
+	.size	__func__.7712, 17
+__func__.7712:
 	.string	"FlashEraseBlocks"
+	.section	.rodata.__func__.7827,"a",@progbits
+	.align	3
+	.set	.LANCHOR187,. + 0
+	.type	__func__.7827, %object
+	.size	__func__.7827, 14
+__func__.7827:
+	.string	"FtlWriteToIDB"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC105:
 	.string	"decrement_vpc_count %x = %d\n"
@@ -14660,16 +14756,7 @@ __func__.7763:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.48 20181029"
+	.string	"SFTL version: 5.0.49 20181030"
 .LC71:
 	.string	"%s\n"
-	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
-.LC114:
-	.string	"write_idblock fix data %x %x %x\n"
-.LC115:
-	.string	"write_idblock fail! %x %x %x %x\n"
-.LC116:
-	.string	"%s idb buffer alloc fail\n"
-.LC117:
-	.string	"%p %x %p %x\n"
 	.hidden	free
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index f9c3d91054..2ef7a2f21d 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -624,6 +624,7 @@ static void ftl_flash_init(void)
 	g_nand_ops.erase_blk		= sfc_nand_erase_block;
 	g_nand_ops.prog_page		= sfc_nand_prog_page;
 	g_nand_ops.read_page		= sfc_nand_read_page;
+	g_nand_ops.bch_sel		= NULL;
 }
 
 static int spi_nand_enable_QE(void)

commit eee2651354e117f641245ac9a764fa2a4240bfa2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 30 09:51:04 2018 +0800

    rockchip: rk3308: detect adc key by uboot fdt info
    
    fixes: bcf84996f0eb29eedad33b308776f7c95380e9b0
    (rockchip: rk3308: fix adc key read failed when kernel dtb is enabled)
    
    Change-Id: I46071bf516cc9ee81f4e33cf884ba7baaa5f2d89
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
index e823a34ef1..fad6b81f37 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -12,7 +12,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define KEY_DOWN_MIN_VAL        0
 #define KEY_DOWN_MAX_VAL        30
 
-#ifndef CONFIG_USING_KERNEL_DTB
 /*
  * Two board variants whith adc channel 3 is for board id
  * v10: 1024, v11: 512
@@ -44,4 +43,3 @@ int rockchip_dnl_key_pressed(void)
 	else
 		return false;
 }
-#endif

commit 861ce1a0075875e2e4c54129f98099ad4598a021
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Nov 30 11:25:21 2018 +0800

    Revert "Add: Allow logo in 16bit or 32bit color BMP"
    
    This reverts commit 39965620e81ccfb2848305331c45b947bf23e1ea.
    
    Change-Id: Ic2996614b9cddc1835b079c2e7ac784daa99ad3f
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
old mode 100644
new mode 100755
index 523506f278..a95fe88147
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -4,8 +4,6 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-#include <command.h>
-#include <log.h>
 #include <config.h>
 #include <common.h>
 #include <malloc.h>
@@ -143,30 +141,9 @@ static void decode_rle8_bitmap(void *psrc, void *pdst, uint16_t *cmap,
 	}
 }
 
-static void dump_bmp_dib_head(void *bmp_addr)
-{
-	struct bmp_image *bmp = bmp_addr;
-
-	debug("########## BMP DIB_HEAD ##########\n"
-	      "Width  : %u\n"
-	      "Height : %u\n"
-	      "Bpp    : %u\n"
-	      "Compression method : %u\n"
-	      "Image size : %u\n"
-	      "Colors in palette  : %u\n"
-	      "##################################\n",
-		bmp->header.width,
-		bmp->header.height,
-		bmp->header.bit_count,
-		bmp->header.compression,
-		bmp->header.image_size,
-		bmp->header.colors_used);
-}
-
 int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
-	int i, j;
-	int stride, padded_width, bpp, width, height;
+	int stride, padded_width, bpp, i, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
@@ -176,10 +153,9 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 
 	if (!bmp || !(bmp->header.signature[0] == 'B' &&
 	    bmp->header.signature[1] == 'M')) {
-		printf("Error: Invalid bmp file.\n");
+		printf("cat not find bmp file\n");
 		return -1;
 	}
-	dump_bmp_dib_head(bmp);
 	width = get_unaligned_le32(&bmp->header.width);
 	height = get_unaligned_le32(&bmp->header.height);
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
@@ -196,8 +172,8 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	switch (bpp) {
 	case 8:
 		if (dst_bpp != 16) {
-			printf("Error: Target pixel's bpp is not 16bit.\n");
-
+			printf("can't support covert bmap to bit[%d]\n",
+			       dst_bpp);
 			return -1;
 		}
 		cmap = malloc(sizeof(cmap) * 256);
@@ -217,6 +193,7 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 			decode_rle8_bitmap(src, dst, cmap, width, height,
 					   bpp, 0, 0, flip);
 		} else {
+			int j;
 			stride = width * 2;
 
 			if (flip)
@@ -234,35 +211,9 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 		}
 		free(cmap);
 		break;
-	case 16:
-		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("Error: Failed to decompression bmp file.\n");
-
-			return -1;
-		}
-		stride = ALIGN(width * bpp / 8, 4);
-		if (flip)
-			src += stride * (height - 1);
-		for (i = 0; i < height; i++) {
-			for (j = 0; j < width; j++) {
-				ushort color = (src[1] << 8) | src[0];
-
-				color = (((color & 0x7c00) << 1) |
-					((color & 0x03e0) << 1) |
-					(color & 0x001f));
-				*(uint16_t *)dst = color;
-				src += 2;
-				dst += 2;
-			}
-			src += (padded_width - width);
-			if (flip)
-				src -= stride * 2;
-		}
-		break;
 	case 24:
 		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("Error: Failed to decompression bmp file.\n");
-
+			printf("can't not support compression for 24bit bmap");
 			return -1;
 		}
 		stride = ALIGN(width * 3, 4);
@@ -277,26 +228,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 				src -= stride * 2;
 		}
 		break;
+	case 16:
 	case 32:
-		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("Error: Failed to decompression bmp file.\n");
-
-			return -1;
-		}
-		stride = ALIGN(width * 4, 4);
-		if (flip)
-			src += stride * (height - 1);
-
-		for (i = 0; i < height; i++) {
-			memcpy(dst, src, 4 * width);
-			dst += stride;
-			src += stride;
-			if (flip)
-				src -= stride * 2;
-		}
-		break;
 	default:
-		printf("Error: Can't decode this bmp file with bit=%d\n", bpp);
+		printf("unsupport bit=%d now\n", bpp);
 		return -1;
 	}
 
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 390d314686..0d13a640d4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -4,7 +4,6 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <asm/io.h>
 #include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
@@ -29,7 +28,6 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
-#include "rockchip_vop.h"
 #include <dm.h>
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
@@ -166,40 +164,9 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-/**
- * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
- * @logo:	the pointer to the logo information.
- *
- */
-static bool vop_support_ymirror(struct logo_info *logo)
+static bool can_direct_logo(int bpp)
 {
-	bool ret;
-	struct display_state *state;
-	struct vop_data *vop_data;
-
-	ret = false;
-	state = container_of(logo, struct display_state, logo);
-	if (state->crtc_state.crtc->data) {
-		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
-		printf("VOP hardware version v%d.%d, ",
-		       VOP_MAJOR(vop_data->version),
-		       VOP_MINOR(vop_data->version));
-		/*
-		 * if the version of VOP is higher than v3.0,
-		 * which means that the VOP support ymirror,
-		 * so it isn't need to mirror image by ourself.
-		 */
-		if (vop_data->version >= VOP_VERSION(3, 0)) {
-			printf("Support mirror mode.\n");
-			ret = true;
-		} else {
-			printf("Not support mirror mode.\n");
-		}
-	} else {
-		printf("Error: CRTC drivers is not ready.\n");
-	}
-
-	return ret;
+	return bpp == 24 || bpp == 32;
 }
 
 
@@ -357,7 +324,7 @@ static int connector_panel_init(struct display_state *state)
 
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
-		printf("%s can not find dsp-lut node\n", __func__);
+		debug("%s can not find dsp-lut node\n", __func__);
 		return 0;
 	}
 
@@ -965,6 +932,7 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
+	crtc_state->rb_swap = logo->bpp != 32;
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
@@ -1152,16 +1120,19 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
-
 	size = get_unaligned_le32(&header->file_size);
-	if (size > MEMORY_POOL_SIZE) {
-		printf("failed to use boot buf as temp bmp buffer\n");
-		ret = -ENOMEM;
-		goto free_header;
-	}
+	if (!can_direct_logo(logo->bpp)) {
+		if (size > MEMORY_POOL_SIZE) {
+			printf("failed to use boot buf as temp bmp buffer\n");
+			ret = -ENOMEM;
+			goto free_header;
+		}
+		pdst = get_display_buffer(size);
 
-	pdst = get_display_buffer(size);
-	dst = pdst;
+	} else {
+		pdst = get_display_buffer(size);
+		dst = pdst;
+	}
 
 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
 	if (len != size) {
@@ -1170,7 +1141,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		goto free_header;
 	}
 
-	if (!vop_support_ymirror(logo)) {
+	if (!can_direct_logo(logo->bpp)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
@@ -1183,7 +1154,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 			ret = -ENOMEM;
 			goto free_header;
 		}
-		memset(dst, 0, dst_size);
 		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;

commit 55e2f86dd40f207c32b43f01ba246e45f6e852c0
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Nov 30 11:25:10 2018 +0800

    Revert "video/drm: logo: fix show 8bit bmp logo failed"
    
    This reverts commit 78d830ca5bf0a0b904748403c801d5fa3a8ddc8f.
    
    Change-Id: Ic2996614b9cddc1835b079c2e7ac784daa99ad3a
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index ca4d92b4e7..523506f278 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,13 +163,14 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
+	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -184,10 +185,11 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0) {
+	if (height < 0)
 		height = 0 - height;
-		flip = false;
-	}
+	else
+		flip = true;
+
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 0a875f829d..5e125004d2 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 29f984985e..390d314686 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,11 +166,6 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool bmp_can_disp_direct(struct logo_info *logo)
-{
-	return logo->bpp == 24 || logo->bpp == 32;
-}
-
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -184,23 +179,21 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-
-	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
-	if (vop_data) {
+	if (state->crtc_state.crtc->data) {
+		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
-
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
-			printf("support mirror mode.\n");
+		if (vop_data->version >= VOP_VERSION(3, 0)) {
+			printf("Support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("not support mirror mode.\n");
+			printf("Not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -972,14 +965,12 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
-
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
 	crtc_state->src_h = logo->height;
 	crtc_state->src_x = 0;
 	crtc_state->src_y = 0;
-	crtc_state->rb_swap = logo->rb_swap;
 	crtc_state->ymirror = logo->ymirror;
 
 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
@@ -1134,8 +1125,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
-	bool bmp_disp_direct = false;
-	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1180,24 +1169,22 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-	vop_supp_ymirror = vop_support_ymirror(logo);
-	bmp_disp_direct = bmp_can_disp_direct(logo);
-	if (!vop_supp_ymirror || !bmp_disp_direct) {
+
+	if (!vop_support_ymirror(logo)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
-		logo->rb_swap = (logo->bpp == 8 ? true : false);
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
+
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp,
-			       !vop_supp_ymirror)) {
+		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1205,12 +1192,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
+
 		logo->offset = 0;
-		logo->ymirror = vop_supp_ymirror;
+		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->rb_swap = (logo->bpp != 32 ? true : false);
-		logo->ymirror = true;
+		logo->ymirror = 1;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 0173face1a..d30eb50c4b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -130,7 +130,6 @@ struct connector_state {
 struct logo_info {
 	int mode;
 	char *mem;
-	bool rb_swap;
 	bool ymirror;
 	u32 offset;
 	u32 width;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 01986844b1..b0fa315537 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
+	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit 0a9c335c555ac9182787953e671550e0a83199c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 09:12:35 2018 +0800

    rockchip: dts: rk3288: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: Ie7a125450de1b9394ed5c17fc5a0df3239e203d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index 979d119764..42e2b025ea 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -64,3 +64,16 @@
 &gpio8 {
 	u-boot,dm-pre-reloc;
 };
+
+&usbphy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbphy {
+	u-boot,dm-pre-reloc;
+};
+
+&usb_otg {
+	u-boot,dm-pre-reloc;
+};

commit 1927b5fd8af799f416122226fd14bad06e15f2a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 09:17:01 2018 +0800

    rockchip: dts: rk3368: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: Ic2996614b9cddc1835b079c2e7ac784daa99ad3e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index fe55e234b1..32992c3b96 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -33,10 +33,6 @@
 
 &u2phy {
 	status = "okay";
-
-	u2phy_host: host-port {
-		status = "okay";
-	};
 };
 
 &usb_host0_ehci {
@@ -47,6 +43,14 @@
 	status = "okay";
 };
 
-&usb_otg {
+&u2phy_host {
+	status = "okay";
+};
+
+&u2phy_otg {
 	status = "okay";
 };
+
+&usb_otg {
+	status = "okay";
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 4a4cd71f42..89469f2509 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -47,4 +47,16 @@
 
 &grf {
 	u-boot,dm-pre-reloc;
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+};
+
+&usb_otg {
+	u-boot,dm-pre-reloc;
 };
\ No newline at end of file

commit 203b897e056e92faf4a89deb55f4be182b7883a4
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 28 16:01:56 2018 +0800

    rockchip: rk3308: boot kernel Image at 0x00680000 for aarch64
    
    According to commit c791e8a8("rockchip: rk3308: set text base to
    0x00600000").
    
    Boot aarch64 kernel Image from 0x680000(6M + 512KB) will make
    better usage of the ram space.
    
    Load compressed zImage to 0x02480000(36M + 512 KB), then decompress
    it to 0x680000.
    
    Change-Id: I08760029ab4daf442ec97b9074db40c54b1413e7
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 2420e224e2..587b32c62d 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -49,8 +49,8 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02080000\0" \
-	"kernel_addr_c=0x01880000\0" \
+	"kernel_addr_r=0x00680000\0" \
+	"kernel_addr_c=0x02480000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 #else
 #define ENV_MEM_LAYOUT_SETTINGS \

commit 21ab40a87385e6a27fe0e99630a49668bc263cf2
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Nov 28 18:14:21 2018 +0800

    rockchip: clk: rk3308: Add flag for clk_set_defaults
    
    Change-Id: Ic9009b35e395cfe8c2a8f8d367b75b85294c7354
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index ba331115b3..21da536757 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -47,10 +47,11 @@ struct rk3308_clk_info {
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
-	ulong armclk_hz;;
+	ulong armclk_hz;
 	ulong dpll_hz;
 	ulong vpll0_hz;
 	ulong vpll1_hz;
+	bool is_assigned;
 };
 
 struct rk3308_cru {
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 4f4059d15f..28d2c2c657 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -786,7 +786,7 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 						      priv->cru, DPLL);
 		break;
 	case ARMCLK:
-		if (priv->armclk_hz)
+		if (priv->is_assigned)
 			rk3308_armclk_set_clk(priv, rate);
 		priv->armclk_hz = rate;
 		break;
@@ -997,6 +997,7 @@ static void rk3308_clk_init(struct udevice *dev)
 
 static int rk3308_clk_probe(struct udevice *dev)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
 	int ret;
 
 	rk3308_clk_init(dev);
@@ -1005,6 +1006,7 @@ static int rk3308_clk_probe(struct udevice *dev)
 	ret = clk_set_defaults(dev);
 	if (ret)
 		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+	priv->is_assigned = true;
 
 	return 0;
 }

commit e04b9c6bbdde91b2e692b727f5b6e4a8870cf207
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 17:15:51 2018 +0800

    clk: rockchip: rk3308: add arm clk 408M support
    
    Change-Id: I133576889860c7bae3f722dcd53df6a50c500c35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index cfeff9e267..4f4059d15f 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -54,6 +54,7 @@ static struct rockchip_cpu_rate_table rk3308_cpu_rates[] = {
 	RK3308_CPUCLK_RATE(1008000000, 1, 5),
 	RK3308_CPUCLK_RATE(816000000, 1, 3),
 	RK3308_CPUCLK_RATE(600000000, 1, 3),
+	RK3308_CPUCLK_RATE(408000000, 1, 1),
 };
 
 static const struct rk3308_clk_info clks_dump[] = {

commit a33c12a6fea78874a03ff322c2c1622c5f831418
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 16:56:29 2018 +0800

    rockchip: rk3308: add rockchip_get_clk/cru interface
    
    Change-Id: I63bb32228af0fc9bb86374aae3a3c96d0901540d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/Makefile b/arch/arm/mach-rockchip/rk3308/Makefile
index 196774d3e5..ce4d44bb34 100644
--- a/arch/arm/mach-rockchip/rk3308/Makefile
+++ b/arch/arm/mach-rockchip/rk3308/Makefile
@@ -6,3 +6,4 @@
 
 obj-y += syscon_rk3308.o
 obj-y += rk3308.o
+obj-y += clk_rk3308.o
diff --git a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c
new file mode 100644
index 0000000000..f6562e0a30
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3308.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3308_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk3308_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}

commit 53dc0e67788fc711d60062de1ff7a94d3e96ecad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:39:09 2018 +0800

    regulator: pwm: use debug to verbose init voltage
    
    dm regulator uclass would verbose this message.
    
    Change-Id: I76c73bdcf6354d7d892f75ad022be416d3ab0c09
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 7710e7960b..b719d54d3e 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -137,7 +137,7 @@ static int pwm_regulator_probe(struct udevice *dev)
 	priv->min_voltage = uc_pdata->min_uV;
 
 	if (priv->init_voltage > 0) {
-		printf("pwm-regulator(%s): init %d uV\n",
+		debug("pwm-regulator(%s): init %d uV\n",
 		       dev->name, priv->init_voltage);
 		pwm_regulator_set_voltage(dev, priv->init_voltage);
 	}

commit d9e2bd8a57e925fc1a92b0cf82a9fb3c3886e50c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:33:03 2018 +0800

    common: boot_rkimg: verbose partition type
    
    rockchip platforms support both efi and rkparam partition types,
    it helps a lot for debug.
    
    Change-Id: I3ba3fe552ecd99c38112a1417eb6c22721a03242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index a5316e1510..962c582f38 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -14,6 +14,7 @@
 #include <boot_rkimg.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/io.h>
+#include <part.h>
 
 #define TAG_KERNEL			0x4C4E524B
 
@@ -227,6 +228,8 @@ struct blk_desc *rockchip_get_bootdev(void)
 
 	dev_desc = blk_get_devnum_by_type(dev_type, devnum);
 
+	printf("PartType: %s\n", part_get_type(dev_desc));
+
 	return dev_desc;
 }
 

commit df2027612e85fd37126e3f7e276709c8927915a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:32:29 2018 +0800

    disk: part: add interface to get partition type
    
    Change-Id: I69894f5e4ce03909a8290e941d8808593d027080
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 095127dfdf..097e4e7e0e 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -319,6 +319,19 @@ void part_print(struct blk_desc *dev_desc)
 		drv->print(dev_desc);
 }
 
+const char *part_get_type(struct blk_desc *dev_desc)
+{
+	struct part_driver *drv;
+
+	drv = part_driver_lookup_type(dev_desc);
+	if (!drv) {
+		printf("## Unknown partition table type %x\n",
+		       dev_desc->part_type);
+		return NULL;
+	}
+
+	return drv->name;
+}
 #endif /* HAVE_BLOCK_DEVICE */
 
 int part_get_info(struct blk_desc *dev_desc, int part,
diff --git a/include/part.h b/include/part.h
index 5a42526d00..287311863c 100644
--- a/include/part.h
+++ b/include/part.h
@@ -105,7 +105,7 @@ int part_get_info(struct blk_desc *dev_desc, int part, disk_partition_t *info);
  * a partition occupying the entire disk.
  */
 int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info);
-
+const char *part_get_type(struct blk_desc *dev_desc);
 void part_print(struct blk_desc *dev_desc);
 void part_init(struct blk_desc *dev_desc);
 void dev_print(struct blk_desc *dev_desc);
@@ -214,6 +214,8 @@ static inline int part_get_info(struct blk_desc *dev_desc, int part,
 static inline int part_get_info_whole_disk(struct blk_desc *dev_desc,
 					   disk_partition_t *info)
 { return -1; }
+
+static inline const char *part_get_type(struct blk_desc *dev_desc) { return NULL; }
 static inline void part_print(struct blk_desc *dev_desc) {}
 static inline void part_init(struct blk_desc *dev_desc) {}
 static inline void dev_print(struct blk_desc *dev_desc) {}

commit 61184b8f14d3ea554e6e44e4a8726a4438a6ecc3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 29 14:29:46 2018 +0800

    rockchip: board: remove verbose "Using kernel dtb"
    
    This is a debug message to know if we use kernel dtb.
    We have already got this info from "DTB: rk-kernel.dtb",
    so remove it.
    
    Change-Id: I28e29e43aa818ac61c9864b94bd80ceb85fc9c3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 10d72a15ad..79122316ce 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -193,8 +193,6 @@ int init_kernel_dtb(void)
 
 	gd->fdt_blob = (void *)fdt_addr;
 
-	printf("Using kernel dtb\n");
-
 	return 0;
 }
 #endif

commit 0e107a57eb12f5260b6e9b10c63ebb167469d426
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 20:43:52 2018 +0800

    rockchip: dts: rk3128: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: I7f17bda7fdd841135d0ab0392db58cfc65cc7f5e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index d702a58c46..fb5f1f7f07 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -46,3 +46,18 @@
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
 };
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
\ No newline at end of file

commit 0a6aa43dec76ed2ad5cea5482bd00ae69b6b41c3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 28 20:35:14 2018 +0800

    rockchip: dts: rk322x: add u-boot,dm-pre-reloc for usb otg
    
    It makes rockusb works normally even there is no valid kernel dtb.
    
    Change-Id: Icdb2f9611d25525bbe15d4aafb9120e31e749af2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index 4246af1b6c..608eec99a2 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -42,3 +42,18 @@
 &uart2 {
 	u-boot,dm-pre-reloc;
 };
+
+&u2phy0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy0_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit c111479f4f070f8ee93f7a61f094b68744f7f463
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 19 17:44:29 2018 +0800

    clk: rockchip: px30: support arm clk 408M
    
    Change-Id: I98cd856c99ebf2cd77d1a8ff94d2e0a40f0a4bfb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index f867e4f8aa..fdfa2ed204 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -86,6 +86,7 @@ static struct cpu_rate_table px30_cpu_rates[] = {
 	PX30_CPUCLK_RATE(1008000000, 1, 5),
 	PX30_CPUCLK_RATE(816000000, 1, 3),
 	PX30_CPUCLK_RATE(600000000, 1, 3),
+	PX30_CPUCLK_RATE(408000000, 1, 1),
 };
 
 static u8 pll_mode_shift[PLL_COUNT] = {

commit d59cf5aebb67b925168bd8f731d061f6aa633d8a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 24 15:57:05 2018 +0800

    dm: of_access: add ofnode_read_u64() support
    
    only support of-live.
    
    Change-Id: I37c10efa30ef46369f4a4ad7f16c4c758d6ad563
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 92443d401c..5dbed31ceb 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -439,6 +439,33 @@ int of_read_u32(const struct device_node *np, const char *propname, u32 *outp)
 	return 0;
 }
 
+/**
+ * of_property_read_u64 - Find and read a 64 bit integer from a property
+ * @np:         device node from which the property value is to be read.
+ * @propname:   name of the property to be searched.
+ * @out_value:  pointer to return value, modified only if return value is 0.
+ *
+ * Search for a property in a device node and read a 64-bit value from
+ * it. Returns 0 on success, -EINVAL if the property does not exist,
+ * -ENODATA if property does not have a value, and -EOVERFLOW if the
+ * property data isn't large enough.
+ *
+ * The out_value is modified only if a valid u64 value can be decoded.
+ */
+int of_property_read_u64(const struct device_node *np, const char *propname,
+                         u64 *out_value)
+{
+	const __be32 *val = of_find_property_value_of_size(np, propname,
+							   sizeof(*out_value));
+
+	if (IS_ERR(val))
+		return PTR_ERR(val);
+
+	*out_value = of_read_number(val, 2);
+
+	return 0;
+}
+
 int of_read_u32_array(const struct device_node *np, const char *propname,
 		      u32 *out_values, size_t sz)
 {
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 44eb2bbb5f..8543c9366b 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -56,6 +56,21 @@ int ofnode_read_s32_default(ofnode node, const char *propname, s32 def)
 	return def;
 }
 
+int ofnode_read_u64(ofnode node, const char *propname, u64 *outp)
+{
+	assert(ofnode_valid(node));
+	debug("%s: %s: ", __func__, propname);
+
+	if (ofnode_is_np(node)) {
+		return of_property_read_u64(ofnode_to_np(node), propname, outp);
+	} else {
+		printf("%s: not implement\n", __func__);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 bool ofnode_read_bool(ofnode node, const char *propname)
 {
 	const void *prop;
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 64efdb7035..035f0c8d65 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -219,6 +219,22 @@ struct device_node *of_find_node_by_phandle(phandle handle);
  */
 int of_read_u32(const struct device_node *np, const char *propname, u32 *outp);
 
+/**
+ * of_property_read_u64 - Find and read a 64 bit integer from a property
+ * @np:         device node from which the property value is to be read.
+ * @propname:   name of the property to be searched.
+ * @out_value:  pointer to return value, modified only if return value is 0.
+ *
+ * Search for a property in a device node and read a 64-bit value from
+ * it. Returns 0 on success, -EINVAL if the property does not exist,
+ * -ENODATA if property does not have a value, and -EOVERFLOW if the
+ * property data isn't large enough.
+ *
+ * The out_value is modified only if a valid u64 value can be decoded.
+ */
+int of_property_read_u64(const struct device_node *np, const char *propname,
+                         u64 *out_value);
+
 /**
  * of_read_u32_array() - Find and read an array of 32 bit integers
  *
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 742d6028c5..f90ce33ea9 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -227,6 +227,16 @@ static inline int ofnode_read_s32(ofnode node, const char *propname,
  */
 int ofnode_read_u32_default(ofnode ref, const char *propname, u32 def);
 
+/**
+ * ofnode_read_u64() - Read a 64-bit integer from a property
+ *
+ * @ref:	valid node reference to read property from
+ * @propname:	name of the property to read from
+ * @outp:	place to put value (if found)
+ * @return 0 if OK, -ve on error
+ */
+int ofnode_read_u64(ofnode node, const char *propname, u64 *outp);
+
 /**
  * ofnode_read_s32_default() - Read a 32-bit integer from a property
  *

commit 03af66d3ee7057293abd02708d5a02bf5665fa47
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 21 10:55:49 2018 +0800

    dm: pmic: use strstr() to match regulator prefix
    
    this is more flexsible to match regulator type.
    
    Change-Id: I5589b5d1d32d8ac1c6d09d64e680eddd31f2ba90
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 8ef0d8bc71..8671c58100 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -30,7 +30,6 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	const char *reg_name;
 	int bind_count = 0;
 	ofnode node;
-	int prefix_len;
 	int ret;
 	bool enable;
 
@@ -56,13 +55,12 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 		for (info = child_info; info->prefix && info->driver; info++) {
 			debug("  - compatible prefix: '%s'\n", info->prefix);
 
-			prefix_len = strlen(info->prefix);
-			if (strncmp(info->prefix, node_name, prefix_len)) {
+			if (!strstr(node_name, info->prefix)) {
 				reg_name = ofnode_read_string(node,
 							      "regulator-name");
 				if (!reg_name)
 					continue;
-				if (strncmp(info->prefix, reg_name, prefix_len))
+				if (!strstr(reg_name, info->prefix))
 					continue;
 			}
 
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 7ad88b75b7..d5669695ea 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -26,9 +26,9 @@ static struct reg_data rk817_init_reg[] = {
 #endif
 
 static const struct pmic_child_info pmic_children_info[] = {
-	{ .prefix = "DCDC_REG", .driver = "rk8xx_buck"},
-	{ .prefix = "LDO_REG", .driver = "rk8xx_ldo"},
-	{ .prefix = "SWITCH_REG", .driver = "rk8xx_switch"},
+	{ .prefix = "DCDC", .driver = "rk8xx_buck"},
+	{ .prefix = "LDO", .driver = "rk8xx_ldo"},
+	{ .prefix = "SWITCH", .driver = "rk8xx_switch"},
 	{ },
 };
 

commit 08b717aba0fef536e99f0b0d65b20bd4a4da785d
Author: Lin Huang <hl@rock-chips.com>
Date:   Thu Nov 22 10:29:21 2018 +0800

    clk: rockchip: rk1808: set apll default frequency to 1.2GHz
    
    For cpu_vdd default voltage enough to support cpu frequency to 1.2GHz,
    so set rk1808 default cpu frequency to 1.2GHz.
    
    Change-Id: Ia8a888ee79ab3ae3868790bcc1851552acf90086
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index cf67ed18fb..1c7976460d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -11,7 +11,7 @@
 #define MHz		1000000
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
-#define APLL_HZ		(600 * MHz)
+#define APLL_HZ		(1200 * MHz)
 #define PCLK_PMU_HZ	(100 * MHz)
 
 /* PX30 pll id */

commit f97741a446cd50c076ac0e4d25114b0ae9807919
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Nov 27 11:35:54 2018 +0800

    FROMRKLOCAL: WORKAROUND: rockchip: board: Fix uboot loader mode problem
    
    When the otg download port is configured in host mode. Executing
    the reboot loader command will fail.
    
    Change-Id: Ifb1c2387156e729a58c4f547e2ac038d09f09fe4
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 954e17d8c3..3874fc1a40 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -322,7 +322,7 @@ int board_usb_init(int index, enum usb_init_type init)
 
 	while (node > 0) {
 		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
+		if (mode /* && strcmp(mode, "otg") == 0 */) {
 			matched = true;
 			break;
 		}

commit 69671f82e7736af917955d9772fd062d13d1e015
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Sat Nov 3 17:42:39 2018 +0800

    Attestation key: write attestation key to secure storage
    
    Split attestation key into AttestationKey.ec and AttestationKey.rsa,
    then write to secure storage.
    
    Change-Id: I8e00d602c4174a002e6ecad2e4cfa846f32a681f
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
    (cherry picked from commit 1e8c0e44aa2958d63eda2f36fa1ecb4472abcad0)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/attestation_key.c b/common/attestation_key.c
index 675e48a19b..d90d8d9b78 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -12,7 +12,7 @@
 
 #include <optee_include/OpteeClientApiLib.h>
 
-/* attestation data offset*/
+/* attestation data offset */
 #define ATTESTATION_DATA_OFFSET  65536
 
 /* block size */
@@ -24,6 +24,15 @@
 #define ATAP_BLOB_LEN_MAX 2048
 #define ATAP_CERT_CHAIN_LEN_MAX 8192
 #define ATAP_CERT_CHAIN_ENTRIES_MAX 8
+#define CA_HEADER_LEN 16
+
+/*
+ * Name of the attestation key file is
+ * ATTESTATION_KEY_PREFIX.%algorithm,
+ * which include PrivateKey and CertificateChain,
+ * where algorithm is either "EC" or "RSA"
+ */
+#define ATTESTATION_KEY_FILE "AttestationKey"
 
 /*
  * Name of the attestation key file is
@@ -58,7 +67,7 @@ typedef struct {
 } atap_certchain;
 
 uint32_t write_to_keymaster(uint8_t *filename, uint32_t filename_size,
-				uint8_t *data, uint32_t data_size);
+			    uint8_t *data, uint32_t data_size);
 
 static const char *get_keyslot_str(keymaster_algorithm_t key_type)
 {
@@ -87,7 +96,6 @@ static void free_cert_chain(atap_certchain cert_chain)
 	for (i = 0; i < cert_chain.entry_count; ++i) {
 		if (cert_chain.entries[i].data)
 			free(cert_chain.entries[i].data);
-
 		cert_chain.entries[i].data_length = 0;
 	}
 	memset(&cert_chain, 0, sizeof(atap_certchain));
@@ -195,7 +203,7 @@ static uint32_t write_key(keymaster_algorithm_t key_type,
 {
 	char key_file[STORAGE_ID_LENGTH_MAX] = {0};
 
-	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_PREFIX,
+	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_FILE,
 		get_keyslot_str(key_type));
 	write_to_keymaster((uint8_t *)key_file, strlen(key_file),
 				(uint8_t *)key, key_size);
@@ -379,3 +387,88 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 
 	return ATAP_RESULT_OK;
 }
+
+atap_result read_key_data(uint8_t **key_buf, uint8_t *key_data,
+			  uint32_t *key_data_length)
+{
+	atap_blob key;
+	atap_certchain certchain;
+
+	 /* read private key */
+	if (copy_blob_from_buf(key_buf, &key) == false) {
+		printf("copy_blob_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	memcpy(key_data, &key.data_length, sizeof(uint32_t));
+	memcpy(key_data + 4, key.data, key.data_length);
+	*key_data_length = 4 + key.data_length;
+
+	/* read certchain */
+	if (copy_cert_chain_from_buf(key_buf, &certchain) == false) {
+		printf("copy_cert_chain_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	memcpy(key_data + *key_data_length,
+	       &certchain.entry_count, sizeof(uint32_t));
+	*key_data_length += 4;
+	for (int i = 0; i < certchain.entry_count; ++i) {
+		memcpy(key_data + *key_data_length,
+		       &certchain.entries[i].data_length, sizeof(uint32_t));
+		*key_data_length += 4;
+		memcpy(key_data + *key_data_length, certchain.entries[i].data,
+		       certchain.entries[i].data_length);
+		*key_data_length += certchain.entries[i].data_length;
+	}
+
+	free_blob(key);
+	free_cert_chain(certchain);
+
+	return 0;
+}
+
+atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
+						    uint32_t len)
+{
+	unsigned char keybuf[ATTESTATION_DATA_OFFSET] = {0};
+	uint32_t device_id_size = 0;
+	uint8_t device_id[32] = {0};
+	uint8_t *key_buf = NULL;
+	uint32_t algorithm;
+	uint8_t *key_data;
+	uint32_t key_data_length = 0;
+	/* skip the tag(4 byte) and the size of key(4 byte) */
+	memcpy(keybuf, received_data + 8, ATTESTATION_DATA_OFFSET);
+	key_data = malloc(ATTESTATION_DATA_OFFSET);
+	/* read device id from keybuf */
+	memcpy(&device_id_size, keybuf + CA_HEADER_LEN, sizeof(uint32_t));
+	if (device_id_size < 0 || device_id_size > sizeof(device_id)) {
+		printf("invalidate device_id_size:%d\n", device_id_size);
+		return ATAP_RESULT_ERROR_INVALID_DEVICE_ID;
+	}
+
+	memcpy(device_id, keybuf + CA_HEADER_LEN + sizeof(uint32_t),
+	       device_id_size);
+	printf("device_id:%s\n", device_id);
+
+	/* read algorithm(RSA) from keybuf */
+	key_buf = keybuf + CA_HEADER_LEN + sizeof(uint32_t) + device_id_size;
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	printf("\n algorithm: %d\n", algorithm);
+	/* read rsa key and certchain */
+	read_key_data(&key_buf, key_data, &key_data_length);
+	printf("write attestation key: RSA\n");
+	write_key(KM_ALGORITHM_RSA, key_data, key_data_length);
+
+	/* read algorithm(EC) from keybuf */
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	printf("\n algorithm: %d\n", algorithm);
+	/* read ec key and certchain */
+	read_key_data(&key_buf, key_data, &key_data_length);
+	printf("write attestation key: EC\n");
+	write_key(KM_ALGORITHM_EC, key_data, key_data_length);
+
+	memset(keybuf, 0, sizeof(keybuf));
+	free(key_data);
+
+	return ATAP_RESULT_OK;
+}
diff --git a/include/attestation_key.h b/include/attestation_key.h
index 0eb09069f2..87b3abb89c 100644
--- a/include/attestation_key.h
+++ b/include/attestation_key.h
@@ -26,5 +26,14 @@ typedef enum {
 /* load attestation key from misc partition. */
 atap_result load_attestation_key(struct blk_desc *dev_desc,
 				disk_partition_t *misc_partition);
-
+atap_result read_key_data(uint8_t **key_buf, uint8_t *key_data,
+			  uint32_t *key_data_length);
+/*
+ * write attestation key to secure storage.
+ * @received_data: received data from usb
+ * @len: the size of received_data
+ * @return ATAP_RESULT_OK if ok, or ATAP_RESULT_ERROR_* on error
+ */
+atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
+						    uint32_t len);
 #endif	//ATTESTATION_KEY_H_
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index facc268948..e9b0cb9ab0 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -11,6 +11,7 @@
 #include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
 #include <stdlib.h>
+#include <attestation_key.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
@@ -131,11 +132,12 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 	uint32_t key_size;
 	uint32_t data_size;
 	uint32_t object_id;
-	TEEC_Result ret;
 	int rc = 0;
 
 	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
 		/* widevine keybox */
+		TEEC_Result ret;
+
 		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
 			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
 		object_id = 101;
@@ -159,9 +161,17 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 		}
 	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
 		/* attestation key */
+		atap_result ret;
 
+		ret = write_attestation_key_to_secure_storage(uboot_data, len);
+		if (ret == ATAP_RESULT_OK) {
+			rc = 0;
+			printf("write attestation key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write attestation key to secure storage fail\n");
+		}
 	}
-
 	return rc;
 }
 

commit 3fedbf9b4536579e9cc661e1ae266434b681441b
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Oct 30 17:27:14 2018 +0800

    lib: optee_client: remove keymaster ta from uboot
    
    keymaster ta is too large, so we change store data
    to static ta and remove keymaster ta
    
    Change-Id: Icdb694138caf005d2cb2821714a8526d0391b18b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    (cherry picked from commit 9983001913787102d6d1e7f64134d1c2f896e98d)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
deleted file mode 100644
index 2e07fbb105..0000000000
--- a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#ifndef _KEYMASTER_TA_H_
-#define _KEYMASTER_TA_H_
-
-extern const uint8_t keymaster_data[];
-extern const uint32_t keymaster_size;
-
-#endif /* _KEYMASTER_TA_H_ */
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
deleted file mode 100644
index a18356d16a..0000000000
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and /dev/null differ
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
deleted file mode 100644
index 66daec857b..0000000000
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and /dev/null differ
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 552135f4da..aab27e389b 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -12,10 +12,6 @@ obj-y += tee_smc-arm64.o
 
 ifdef CONFIG_OPTEE_V1
 obj-y += OpteeClientRkFs.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
 
 obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
 lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
@@ -25,9 +21,5 @@ endif
 
 ifdef CONFIG_OPTEE_V2
 obj-y += OpteeClientRkFs-v2.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
 endif
 
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index fc7d788a82..facc268948 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -459,8 +459,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -522,7 +522,7 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -542,8 +542,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -607,7 +607,7 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
@@ -964,8 +964,8 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1027,7 +1027,7 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -1050,9 +1050,8 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1116,7 +1115,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
@@ -1494,8 +1493,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1556,7 +1555,7 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -1576,8 +1575,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1640,7 +1639,7 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 9de072765e..f8d0df396e 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -15,7 +15,6 @@
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
-#include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
 #include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
@@ -111,8 +110,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 	size_t AllocAddress = 0;
 
 	if (is_uuid_equal(TeeLoadTaCmd->uuid, TA_RK_KEYMASTER_UUID)) {
-		ImageData = (void *)keymaster_data;
-		ImageSize = keymaster_size;
+		ImageData = (void *)0;
+		ImageSize = 0;
 	} else {
 		ImageData = (void *)widevine_keybox_data;
 		ImageSize = widevine_keybox_size;
@@ -171,11 +170,11 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		debug("uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		debug("return size of TA, keymaster_size = 0x%x", keymaster_size);
-		TeeSmc32Param[1].u.memref.size = keymaster_size;
+		debug("return size of TA, keymaster_size = 0");
+		TeeSmc32Param[1].u.memref.size = 0;
 	} else {
-		memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
-			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
+		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
+			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
 		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);

commit 7cdb57c70e268cf38054abf1ea436bd6365a90ad
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Oct 26 15:56:34 2018 +0800

    lib: optee_client: fix bug for security partition not find
    
    bug make error R&W when security partition is not defined
    
    Change-Id: Iddf840d3f9c090292e58f73492c20f84e4b3b4ea
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
    (cherry picked from commit 099b8ebcd186f9d17df7073f9cd2f3162e747269)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index c0f331dbd4..37f881b815 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -159,20 +159,21 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dread fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
@@ -183,20 +184,21 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dwrite fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 static int rkss_read_patition_tables(unsigned char *data)
@@ -207,20 +209,21 @@ static int rkss_read_patition_tables(unsigned char *data)
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("blk_dread fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 #ifdef DEBUG_RKFSS
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 179c8c71c9..73b839db8a 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -175,6 +175,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}
@@ -204,6 +205,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}
@@ -233,6 +235,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}

commit fc1a55637d53e2e8447433577335dd601764e196
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 21 13:40:41 2018 +0800

    rockush: add serialnumber to usb_device_descriptor
    
    Change-Id: I498be22dd73ffa8e8844bd9ceedb294b5bba72ce
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index cbc270c4f2..10d72a15ad 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -149,6 +149,7 @@ __weak int set_armclk_rate(void)
 
 int board_late_init(void)
 {
+	rockchip_set_serialno();
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif
@@ -160,7 +161,6 @@ int board_late_init(void)
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
 #endif
-	rockchip_set_serialno();
 
 	soc_clk_dump();
 
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index e80194dfef..35d7020db8 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -140,6 +140,7 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	unsigned int controller_index;
 	int rc;
 	int cable_ready_timeout __maybe_unused;
+	const char *s;
 
 	if (argc != 4)
 		return CMD_RET_USAGE;
@@ -168,6 +169,10 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		goto cleanup_board;
 	}
 
+	s = env_get("serial#");
+	if (s)
+		g_dnl_set_serialnumber((char *)s);
+
 	rc = g_dnl_register("rkusb_ums_dnl");
 	if (rc) {
 		pr_err("g_dnl_register failed");

commit d55170174a87b02d954a993349a5475db77250f7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Nov 14 19:31:12 2018 +0800

    pinctrl: rockchip: Add pinctrl support for rk3308b
    
    Change-Id: Ibf85312e909e040ef0efb120efe3f48c4a2c6ab9
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 3590b01912..e7f3d69c84 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -10,6 +10,7 @@
 #include <dm/ofnode.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <asm/arch/cpu.h>
 
 #define MAX_ROCKCHIP_GPIO_PER_BANK	32
 #define RK_FUNC_GPIO			0
@@ -311,6 +312,10 @@ struct rockchip_pin_ctrl {
 	struct rockchip_mux_route_data *iomux_routes;
 	u32				niomux_routes;
 
+	int	(*ctrl_data_re_init)(struct rockchip_pin_ctrl *ctrl);
+
+	int	(*soc_data_init)(struct rockchip_pinctrl_priv *info);
+
 	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
 				 int pin_num, struct regmap **regmap,
 				 int *reg, u8 *bit);
@@ -512,6 +517,94 @@ static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
 	},
 };
 
+static struct rockchip_mux_recalced_data rk3308b_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 14,
+		.reg = 0x28,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 15,
+		.reg = 0x2c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 18,
+		.reg = 0x30,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 19,
+		.reg = 0x30,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 20,
+		.reg = 0x30,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 21,
+		.reg = 0x34,
+		.bit = 0,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 22,
+		.reg = 0x34,
+		.bit = 4,
+		.mask = 0xf
+	}, {
+		.num = 1,
+		.pin = 23,
+		.reg = 0x34,
+		.bit = 8,
+		.mask = 0xf
+	}, {
+		.num = 3,
+		.pin = 13,
+		.reg = 0x68,
+		.bit = 12,
+		.mask = 0xf
+	}, {
+		.num = 2,
+		.pin = 2,
+		.reg = 0x608,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 3,
+		.reg = 0x608,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 16,
+		.reg = 0x610,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 10,
+		.reg = 0x610,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 11,
+		.reg = 0x610,
+		.bit = 4,
+		.mask = 0x7
+	},
+};
+
 static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
 	{
 		.num = 2,
@@ -859,6 +952,13 @@ static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
 
 static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
 	{
+		/* rtc_clk */
+		.bank_num = 0,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 0) | BIT(0),
+	}, {
 		/* uart2_rxm0 */
 		.bank_num = 1,
 		.pin = 22,
@@ -885,7 +985,249 @@ static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
 		.pin = 12,
 		.func = 2,
 		.route_offset = 0x314,
-		.route_val =  BIT(16 + 4) | BIT(4),
+		.route_val = BIT(16 + 4) | BIT(4),
+	}, {
+		/* i2s-8ch-1-sclktxm0 */
+		.bank_num = 1,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclkrxm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclktxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* i2s-8ch-1-sclkrxm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* pdm-clkm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* pdm-clkm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 4,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* pdm-clkm2 */
+		.bank_num = 2,
+		.pin = 6,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* pdm-clkm-m2 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x600,
+		.route_val = BIT(16 + 2) | BIT(2),
+	},
+};
+
+static struct rockchip_mux_route_data rk3308b_mux_route_data[] = {
+	{
+		/* rtc_clk */
+		.bank_num = 0,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 0) | BIT(0),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 4,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
+	}, {
+		/* i2c3_sdam0 */
+		.bank_num = 0,
+		.pin = 15,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9),
+	}, {
+		/* i2c3_sdam1 */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(8),
+	}, {
+		/* i2c3_sdam2 */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 3,
+		.route_offset = 0x608,
+		.route_val = BIT(16 + 8) | BIT(16 + 9) | BIT(9),
+	}, {
+		/* i2s-8ch-1-sclktxm0 */
+		.bank_num = 1,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclkrxm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2s-8ch-1-sclktxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* i2s-8ch-1-sclkrxm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* pdm-clkm0 */
+		.bank_num = 1,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x308,
+		.route_val =  BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* pdm-clkm1 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 4,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* pdm-clkm2 */
+		.bank_num = 2,
+		.pin = 6,
+		.func = 2,
+		.route_offset = 0x308,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* pdm-clkm-m2 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 3,
+		.route_offset = 0x600,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* spi1_miso */
+		.bank_num = 3,
+		.pin = 10,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9),
+	}, {
+		/* spi1_miso_m1 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 9) | BIT(9),
+	}, {
+		/* owire_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11),
+	}, {
+		/* owire_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 7,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
+	}, {
+		/* owire_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
+	}, {
+		/* can_rxd_m0 */
+		.bank_num = 0,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13),
+	}, {
+		/* can_rxd_m1 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 5,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(12),
+	}, {
+		/* can_rxd_m2 */
+		.bank_num = 2,
+		.pin = 2,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 12) | BIT(16 + 13) | BIT(13),
+	}, {
+		/* mac_rxd0_m0 */
+		.bank_num = 1,
+		.pin = 20,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14),
+	}, {
+		/* mac_rxd0_m1 */
+		.bank_num = 4,
+		.pin = 2,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 14) | BIT(14),
+	}, {
+		/* uart3_rx */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 4,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15),
+	}, {
+		/* uart3_rx_m1 */
+		.bank_num = 0,
+		.pin = 17,
+		.func = 3,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 15) | BIT(15),
 	},
 };
 
@@ -2238,6 +2580,23 @@ static struct pinctrl_ops rockchip_pinctrl_ops = {
 	.get_gpio_mux			= rockchip_pinctrl_get_gpio_mux,
 };
 
+/* Ctrl data specially handle */
+static int rk3308b_ctrl_data_re_init(struct rockchip_pin_ctrl *ctrl)
+{
+	/*
+	 * Special for rk3308b, where we need to replace the recalced
+	 * and routed arrays.
+	 */
+	if (soc_is_rk3308b()) {
+		ctrl->iomux_recalced = rk3308b_mux_recalced_data;
+		ctrl->niomux_recalced = ARRAY_SIZE(rk3308b_mux_recalced_data);
+		ctrl->iomux_routes = rk3308b_mux_route_data;
+		ctrl->niomux_routes = ARRAY_SIZE(rk3308b_mux_route_data);
+	}
+
+	return 0;
+}
+
 /* retrieve the soc specific data */
 static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *dev)
 {
@@ -2253,6 +2612,12 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 	drv_grf_offs = ctrl->grf_drv_offset;
 	bank = ctrl->pin_banks;
 
+	/* Ctrl data re-initialize for some Socs */
+	if (ctrl->ctrl_data_re_init) {
+		if (ctrl->ctrl_data_re_init(ctrl))
+			return NULL;
+	}
+
 	for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
 		int bank_pins = 0;
 
@@ -2348,6 +2713,48 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 	return ctrl;
 }
 
+/* SoC data specially handle */
+
+/* rk3308b SoC data initialize */
+#define RK3308B_GRF_SOC_CON13			0x608
+#define RK3308B_GRF_SOC_CON15			0x610
+
+/* RK3308B_GRF_SOC_CON13 */
+#define RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL	(BIT(16 + 10) | BIT(10))
+#define RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+/* RK3308B_GRF_SOC_CON15 */
+#define RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL	(BIT(16 + 11) | BIT(11))
+#define RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL	(BIT(16 + 7)  | BIT(7))
+#define RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL	(BIT(16 + 3)  | BIT(3))
+
+static int rk3308b_soc_data_init(struct rockchip_pinctrl_priv *priv)
+{
+	int ret;
+
+	/*
+	 * Enable the special ctrl  of selected sources.
+	 */
+	if (soc_is_rk3308b()) {
+		ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON13,
+				   RK3308B_GRF_I2C3_IOFUNC_SRC_CTRL |
+				   RK3308B_GRF_GPIO2A3_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO2A2_SEL_SRC_CTRL);
+		if (ret)
+			return ret;
+
+		ret = regmap_write(priv->regmap_base, RK3308B_GRF_SOC_CON15,
+				   RK3308B_GRF_GPIO2C0_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO3B3_SEL_SRC_CTRL |
+				   RK3308B_GRF_GPIO3B2_SEL_SRC_CTRL);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int rockchip_pinctrl_probe(struct udevice *dev)
 {
 	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
@@ -2391,6 +2798,13 @@ static int rockchip_pinctrl_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	/* Special handle for some Socs */
+	if (ctrl->soc_data_init) {
+		ret = ctrl->soc_data_init(priv);
+		if (ret)
+			return ret;
+	}
+
 	priv->ctrl = ctrl;
 	return 0;
 }
@@ -2704,6 +3118,8 @@ static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
 		.niomux_recalced	= ARRAY_SIZE(rk3308_mux_recalced_data),
 		.iomux_routes		= rk3308_mux_route_data,
 		.niomux_routes		= ARRAY_SIZE(rk3308_mux_route_data),
+		.ctrl_data_re_init	= rk3308b_ctrl_data_re_init,
+		.soc_data_init		= rk3308b_soc_data_init,
 		.pull_calc_reg		= rk3308_calc_pull_reg_and_bit,
 		.drv_calc_reg		= rk3308_calc_drv_reg_and_bit,
 		.schmitt_calc_reg	= rk3308_calc_schmitt_reg_and_bit,

commit 58e5d8f2cde190d3dc845513141783ac589aae52
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Nov 20 16:45:27 2018 +0800

    rockchip: add api to distinguish soc variants
    
    Add api soc_is_xxx for soc variants distinguishing.
    Most of them borrowed from linux kernel
    include/linux/rockchip/cpu.h.
    
    Change-Id: Ifb932c022ffdf001b64979fe2554452f0d480e88
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cpu.h b/arch/arm/include/asm/arch-rockchip/cpu.h
new file mode 100644
index 0000000000..110c4addfd
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cpu.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0+  */
+/*
+ * Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#ifndef __ASM_ARCH_CPU_H
+#define __ASM_ARCH_CPU_H
+
+#include <asm/io.h>
+
+#define ROCKCHIP_CPU_MASK       0xffff0000
+#define ROCKCHIP_CPU_RK312X     0x31260000
+#define ROCKCHIP_CPU_RK3288     0x32880000
+#define ROCKCHIP_CPU_RK3308	0x33080000
+
+#define ROCKCHIP_SOC_MASK	(ROCKCHIP_CPU_MASK | 0xff)
+#define ROCKCHIP_SOC_RK3126     (ROCKCHIP_CPU_RK312X | 0x00)
+#define ROCKCHIP_SOC_RK3126B    (ROCKCHIP_CPU_RK312X | 0x10)
+#define ROCKCHIP_SOC_RK3126C    (ROCKCHIP_CPU_RK312X | 0x20)
+#define ROCKCHIP_SOC_RK3128     (ROCKCHIP_CPU_RK312X | 0x01)
+#define ROCKCHIP_SOC_RK3288     (ROCKCHIP_CPU_RK3288 | 0x00)
+#define ROCKCHIP_SOC_RK3288W    (ROCKCHIP_CPU_RK3288 | 0x01)
+#define ROCKCHIP_SOC_RK3308	(ROCKCHIP_CPU_RK3308 | 0x00)
+#define ROCKCHIP_SOC_RK3308B	(ROCKCHIP_CPU_RK3308 | 0x01)
+
+static inline int rockchip_soc_id(void)
+{
+#if defined(CONFIG_ROCKCHIP_RK3288)
+	/* RK3288W HDMI Revision ID is 0x1A */
+	if (readl(0xFF980004) == 0x1A)
+		return ROCKCHIP_SOC_RK3288W;
+	else
+		return ROCKCHIP_SOC_RK3288;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	/*
+	 * The CHIP_ID is stored in GRF_CHIP_ID:
+	 * RK3308:  0xcea (3306 in decimal)
+	 * RK3308B: 0x3308
+	 *
+	 */
+	if (readl(0xFF000800) == 3306)
+		return ROCKCHIP_SOC_RK3308;
+	else
+		return ROCKCHIP_SOC_RK3308B;
+#else
+	return 0;
+#endif
+}
+
+#define ROCKCHIP_SOC(id, ID) \
+static inline bool soc_is_##id(void) \
+{ \
+	int soc_id = rockchip_soc_id(); \
+	if (soc_id) \
+		return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \
+	return false; \
+}
+
+ROCKCHIP_SOC(rk3126, RK3126)
+ROCKCHIP_SOC(rk3126b, RK3126B)
+ROCKCHIP_SOC(rk3126c, RK3126C)
+ROCKCHIP_SOC(rk3128, RK3128)
+ROCKCHIP_SOC(rk3288, RK3288)
+ROCKCHIP_SOC(rk3288w, RK3288W)
+ROCKCHIP_SOC(rk3308, RK3308)
+ROCKCHIP_SOC(rk3308b, RK3308B)
+
+#endif

commit 7cb1213267da696ab292a004e3f83eae227ef0f0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 18 18:01:21 2018 +0800

    Revert "rockchip: firefly: Add "usb start" to auto-start USB device"
    
    This reverts commit a1903c18db13e740e6bedb8955b3272dce5104e1.
    
    It's really bad idea to add "usb start" in preboot, it will spend
    a lot of time to scan usb bus, and most of people do not need this
    feature.
    
    Change-Id: Ifbc97320ca786f3c4ba593e415c0b2af2a979c47
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h
index d6bb9f6fb4..2b0ac9ec5f 100644
--- a/include/configs/firefly-rk3288.h
+++ b/include/configs/firefly-rk3288.h
@@ -10,8 +10,7 @@
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdin=serial,usbkbd\0" \
 		"stdout=serial,vidconsole\0" \
-		"stderr=serial,vidconsole\0" \
-		"preboot=usb start\0"
+		"stderr=serial,vidconsole\0"
 
 #include <configs/rk3288_common.h>
 

commit 31bc0a57fb367e2a998911595e51a4304985c91b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 21 18:19:25 2018 +0800

    rockchip: make_fit_optee: update output dir
    
    The output directory is not the same for different build system,
    let's get it from environment.
    
    Change-Id: Ifa05c9bc09d5b609d16bcbed767bccd3c2bbaa38
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
index ee36779d07..f91c31e544 100755
--- a/arch/arm/mach-rockchip/make_fit_optee.sh
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -23,7 +23,7 @@ cat << EOF
 			compression = "none";
 EOF
 
-OUTDIR="/home/kever/src/u-boot"
+OUTDIR=$PWD
 DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 UBOOT_OFFSET=0x00200000
 UBOOT_BASE=$((DARM_BASE+UBOOT_OFFSET))

commit 83c221bada7be6eee64f11cdadceb94b6030dd79
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 21 10:55:49 2018 +0800

    dm: pmic: use strstr() to match regulator prefix
    
    this is more flexsible to match regulator type.
    
    Change-Id: I5589b5d1d32d8ac1c6d09d64e680eddd31f2ba90
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    (cherry picked from commit 500b674bbfbafa4d1d01e6fa8f080f31f335420b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 8ef0d8bc71..8671c58100 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -30,7 +30,6 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	const char *reg_name;
 	int bind_count = 0;
 	ofnode node;
-	int prefix_len;
 	int ret;
 	bool enable;
 
@@ -56,13 +55,12 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 		for (info = child_info; info->prefix && info->driver; info++) {
 			debug("  - compatible prefix: '%s'\n", info->prefix);
 
-			prefix_len = strlen(info->prefix);
-			if (strncmp(info->prefix, node_name, prefix_len)) {
+			if (!strstr(node_name, info->prefix)) {
 				reg_name = ofnode_read_string(node,
 							      "regulator-name");
 				if (!reg_name)
 					continue;
-				if (strncmp(info->prefix, reg_name, prefix_len))
+				if (!strstr(reg_name, info->prefix))
 					continue;
 			}
 
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 7ad88b75b7..d5669695ea 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -26,9 +26,9 @@ static struct reg_data rk817_init_reg[] = {
 #endif
 
 static const struct pmic_child_info pmic_children_info[] = {
-	{ .prefix = "DCDC_REG", .driver = "rk8xx_buck"},
-	{ .prefix = "LDO_REG", .driver = "rk8xx_ldo"},
-	{ .prefix = "SWITCH_REG", .driver = "rk8xx_switch"},
+	{ .prefix = "DCDC", .driver = "rk8xx_buck"},
+	{ .prefix = "LDO", .driver = "rk8xx_ldo"},
+	{ .prefix = "SWITCH", .driver = "rk8xx_switch"},
 	{ },
 };
 

commit 41442d6c2cd15a66e08fe690a8f7944eff8d5b36
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 26 10:39:11 2018 +0800

    configs: rk3328: remove unused modules to reduce size
    
    remove: usb-host/net/irq/partitions/command
    
    Change-Id: If4584ae2f608d482b07e2179056fbe1b7c7be596
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 190b2dd904..b80af6d33a 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -30,17 +30,30 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=32
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
@@ -61,15 +74,10 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
-CONFIG_GPIO_KEY=y
-CONFIG_RK_KEY=y
 CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
@@ -91,14 +99,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
@@ -108,13 +108,12 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
+# CONFIG_IRQ is not set
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit 1e8c0e44aa2958d63eda2f36fa1ecb4472abcad0
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Sat Nov 3 17:42:39 2018 +0800

    Attestation key: write attestation key to secure storage
    
    Split attestation key into AttestationKey.ec and AttestationKey.rsa,
    then write to secure storage.
    
    Change-Id: I8e00d602c4174a002e6ecad2e4cfa846f32a681f
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/common/attestation_key.c b/common/attestation_key.c
index 675e48a19b..d90d8d9b78 100644
--- a/common/attestation_key.c
+++ b/common/attestation_key.c
@@ -12,7 +12,7 @@
 
 #include <optee_include/OpteeClientApiLib.h>
 
-/* attestation data offset*/
+/* attestation data offset */
 #define ATTESTATION_DATA_OFFSET  65536
 
 /* block size */
@@ -24,6 +24,15 @@
 #define ATAP_BLOB_LEN_MAX 2048
 #define ATAP_CERT_CHAIN_LEN_MAX 8192
 #define ATAP_CERT_CHAIN_ENTRIES_MAX 8
+#define CA_HEADER_LEN 16
+
+/*
+ * Name of the attestation key file is
+ * ATTESTATION_KEY_PREFIX.%algorithm,
+ * which include PrivateKey and CertificateChain,
+ * where algorithm is either "EC" or "RSA"
+ */
+#define ATTESTATION_KEY_FILE "AttestationKey"
 
 /*
  * Name of the attestation key file is
@@ -58,7 +67,7 @@ typedef struct {
 } atap_certchain;
 
 uint32_t write_to_keymaster(uint8_t *filename, uint32_t filename_size,
-				uint8_t *data, uint32_t data_size);
+			    uint8_t *data, uint32_t data_size);
 
 static const char *get_keyslot_str(keymaster_algorithm_t key_type)
 {
@@ -87,7 +96,6 @@ static void free_cert_chain(atap_certchain cert_chain)
 	for (i = 0; i < cert_chain.entry_count; ++i) {
 		if (cert_chain.entries[i].data)
 			free(cert_chain.entries[i].data);
-
 		cert_chain.entries[i].data_length = 0;
 	}
 	memset(&cert_chain, 0, sizeof(atap_certchain));
@@ -195,7 +203,7 @@ static uint32_t write_key(keymaster_algorithm_t key_type,
 {
 	char key_file[STORAGE_ID_LENGTH_MAX] = {0};
 
-	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_PREFIX,
+	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_FILE,
 		get_keyslot_str(key_type));
 	write_to_keymaster((uint8_t *)key_file, strlen(key_file),
 				(uint8_t *)key, key_size);
@@ -379,3 +387,88 @@ atap_result load_attestation_key(struct blk_desc *dev_desc,
 
 	return ATAP_RESULT_OK;
 }
+
+atap_result read_key_data(uint8_t **key_buf, uint8_t *key_data,
+			  uint32_t *key_data_length)
+{
+	atap_blob key;
+	atap_certchain certchain;
+
+	 /* read private key */
+	if (copy_blob_from_buf(key_buf, &key) == false) {
+		printf("copy_blob_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	memcpy(key_data, &key.data_length, sizeof(uint32_t));
+	memcpy(key_data + 4, key.data, key.data_length);
+	*key_data_length = 4 + key.data_length;
+
+	/* read certchain */
+	if (copy_cert_chain_from_buf(key_buf, &certchain) == false) {
+		printf("copy_cert_chain_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	memcpy(key_data + *key_data_length,
+	       &certchain.entry_count, sizeof(uint32_t));
+	*key_data_length += 4;
+	for (int i = 0; i < certchain.entry_count; ++i) {
+		memcpy(key_data + *key_data_length,
+		       &certchain.entries[i].data_length, sizeof(uint32_t));
+		*key_data_length += 4;
+		memcpy(key_data + *key_data_length, certchain.entries[i].data,
+		       certchain.entries[i].data_length);
+		*key_data_length += certchain.entries[i].data_length;
+	}
+
+	free_blob(key);
+	free_cert_chain(certchain);
+
+	return 0;
+}
+
+atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
+						    uint32_t len)
+{
+	unsigned char keybuf[ATTESTATION_DATA_OFFSET] = {0};
+	uint32_t device_id_size = 0;
+	uint8_t device_id[32] = {0};
+	uint8_t *key_buf = NULL;
+	uint32_t algorithm;
+	uint8_t *key_data;
+	uint32_t key_data_length = 0;
+	/* skip the tag(4 byte) and the size of key(4 byte) */
+	memcpy(keybuf, received_data + 8, ATTESTATION_DATA_OFFSET);
+	key_data = malloc(ATTESTATION_DATA_OFFSET);
+	/* read device id from keybuf */
+	memcpy(&device_id_size, keybuf + CA_HEADER_LEN, sizeof(uint32_t));
+	if (device_id_size < 0 || device_id_size > sizeof(device_id)) {
+		printf("invalidate device_id_size:%d\n", device_id_size);
+		return ATAP_RESULT_ERROR_INVALID_DEVICE_ID;
+	}
+
+	memcpy(device_id, keybuf + CA_HEADER_LEN + sizeof(uint32_t),
+	       device_id_size);
+	printf("device_id:%s\n", device_id);
+
+	/* read algorithm(RSA) from keybuf */
+	key_buf = keybuf + CA_HEADER_LEN + sizeof(uint32_t) + device_id_size;
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	printf("\n algorithm: %d\n", algorithm);
+	/* read rsa key and certchain */
+	read_key_data(&key_buf, key_data, &key_data_length);
+	printf("write attestation key: RSA\n");
+	write_key(KM_ALGORITHM_RSA, key_data, key_data_length);
+
+	/* read algorithm(EC) from keybuf */
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	printf("\n algorithm: %d\n", algorithm);
+	/* read ec key and certchain */
+	read_key_data(&key_buf, key_data, &key_data_length);
+	printf("write attestation key: EC\n");
+	write_key(KM_ALGORITHM_EC, key_data, key_data_length);
+
+	memset(keybuf, 0, sizeof(keybuf));
+	free(key_data);
+
+	return ATAP_RESULT_OK;
+}
diff --git a/include/attestation_key.h b/include/attestation_key.h
index 0eb09069f2..87b3abb89c 100644
--- a/include/attestation_key.h
+++ b/include/attestation_key.h
@@ -26,5 +26,14 @@ typedef enum {
 /* load attestation key from misc partition. */
 atap_result load_attestation_key(struct blk_desc *dev_desc,
 				disk_partition_t *misc_partition);
-
+atap_result read_key_data(uint8_t **key_buf, uint8_t *key_data,
+			  uint32_t *key_data_length);
+/*
+ * write attestation key to secure storage.
+ * @received_data: received data from usb
+ * @len: the size of received_data
+ * @return ATAP_RESULT_OK if ok, or ATAP_RESULT_ERROR_* on error
+ */
+atap_result write_attestation_key_to_secure_storage(uint8_t *received_data,
+						    uint32_t len);
 #endif	//ATTESTATION_KEY_H_
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index facc268948..e9b0cb9ab0 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -11,6 +11,7 @@
 #include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
 #include <stdlib.h>
+#include <attestation_key.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
 #define	WIDEVINE_TAG	"KBOX"
@@ -131,11 +132,12 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 	uint32_t key_size;
 	uint32_t data_size;
 	uint32_t object_id;
-	TEEC_Result ret;
 	int rc = 0;
 
 	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
 		/* widevine keybox */
+		TEEC_Result ret;
+
 		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
 			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
 		object_id = 101;
@@ -159,9 +161,17 @@ int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 		}
 	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
 		/* attestation key */
+		atap_result ret;
 
+		ret = write_attestation_key_to_secure_storage(uboot_data, len);
+		if (ret == ATAP_RESULT_OK) {
+			rc = 0;
+			printf("write attestation key to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write attestation key to secure storage fail\n");
+		}
 	}
-
 	return rc;
 }
 

commit da54d0c8b44d36b84919283d924c3d3c266d094f
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Nov 6 20:02:34 2018 +0800

    rockchip: rk3328: add support ddr4
    
    Change-Id: Id4d5faa579c8715ea3833744420c61fbf34ddfea
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
new file mode 100644
index 0000000000..78be7f0bec
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
@@ -0,0 +1,212 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+&dmc {
+	rockchip,sdram-params = <
+		0x1
+		0xA
+		0x2
+		0x1
+		0x0
+		0x0
+		0x11
+		0x0
+		0
+
+		0x94291288
+		0x00000000
+		0x00000027
+		0x00000462
+		0x00000015
+		0x00000242
+		0x000000ff
+
+		333
+		0
+		0
+
+		0x00000000
+		0x43049010
+		0x00000064
+		0x0028003b
+		0x000000d0
+		0x00020053
+		0x000000d4
+		0x00220000
+		0x000000d8
+		0x00000100
+		0x000000dc
+		0x00040000
+		0x000000e0
+		0x00000000
+		0x000000e4
+		0x00110000
+		0x000000e8
+		0x00000420
+		0x000000ec
+		0x00000400
+		0x000000f4
+		0x000f011f
+		0x00000100
+		0x09060b06
+		0x00000104
+		0x00020209
+		0x00000108
+		0x0505040a
+		0x0000010c
+		0x0040400c
+		0x00000110
+		0x05030206
+		0x00000114
+		0x03030202
+		0x00000120
+		0x03030b03
+		0x00000124
+		0x00020208
+		0x00000180
+		0x01000040
+		0x00000184
+		0x00000000
+		0x00000190
+		0x07030003
+		0x00000198
+		0x05001100
+		0x000001a0
+		0xc0400003
+		0x00000240
+		0x06000604
+		0x00000244
+		0x00000201
+		0x00000250
+		0x00000f00
+		0x00000490
+		0x00000001
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+
+		0x00000004
+		0x0000000c
+		0x00000028
+		0x0000000a
+		0x0000002c
+		0x00000000
+		0x00000030
+		0x00000009
+		0xffffffff
+		0xffffffff
+
+		0x77
+		0x88
+		0x79
+		0x79
+		0x87
+		0x97
+		0x87
+		0x78
+		0x77
+		0x78
+		0x87
+		0x88
+		0x87
+		0x87
+		0x77
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+	>;
+};

commit 5356fe17e9a249e4e70aea55b8f3f0debe0f3092
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Nov 7 16:13:31 2018 +0800

    video/drm: lvds: enable chanel1 when in ttl mode
    
    Change-Id: I1b2022455fb9a6d45290628831c9683a026cefde
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index f534013ac6..70c9244159 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -87,7 +87,8 @@ static inline void lvds_writel(struct rockchip_lvds_device *lvds,
 	writel(val, lvds->regbase + offset);
 
 	if ((lvds->pdata->chip_type == RK3288_LVDS) &&
-	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS))
+	    ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) ||
+	     (lvds->output == DISPLAY_OUTPUT_RGB)))
 		writel(val, lvds->regbase + offset + 0x100);
 }
 

commit 3c5714f034cfff1095a2379757c8a564e5b03d5f
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Nov 16 11:27:20 2018 +0800

    video/drm: lvds: add bandgap handling
    
    Change-Id: I8dbeefe22f41ba384a9fbd5576ab9e1dbd6886ee
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index e02f8d3813..f534013ac6 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -141,7 +141,8 @@ static int rk336x_lvds_pwr_off(struct display_state *state)
 	/* disable lvds lane and power off pll */
 	lvds_writel(lvds, MIPIPHY_REGEB,
 		    v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
-		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
+		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1) |
+		    v_LVDS_BGPD(1));
 
 	/* power down lvds pll and bandgap */
 	lvds_msk_reg(lvds, MIPIPHY_REG1,
@@ -186,7 +187,8 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 		/* enable lvds lane and power on pll */
 		lvds_writel(lvds, MIPIPHY_REGEB,
 			    v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
-			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
+			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0) |
+			    v_LVDS_BGPD(0));
 
 		/* enable lvds */
 		lvds_msk_reg(lvds, MIPIPHY_REGE3,
@@ -224,9 +226,9 @@ static void px30_output_ttl(struct display_state *state)
 	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
 
 	/* enable lane */
-	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
 	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
 	lvds_writel(lvds, MIPIPHY_REGEB, val);
 	/* set ttl mode and reset phy config */
 	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
@@ -254,9 +256,9 @@ static void rk3126_output_ttl(struct display_state *state)
 		v_RK3126_MIPITTL_LANE3_EN(1);
 	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
 	/* enable lane */
-	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
 	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
 	lvds_writel(lvds, MIPIPHY_REGEB, val);
 	/* set ttl mode and reset phy config */
 	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
@@ -280,9 +282,9 @@ static void rk336x_output_ttl(struct display_state *state)
 	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
 
 	/* enable lane */
-	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	lvds_msk_reg(lvds, MIPIPHY_REG0, 0x7c, 0x7c);
 	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
-		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1) | v_LVDS_BGPD(0);
 	lvds_writel(lvds, MIPIPHY_REGEB, val);
 
 	/* set ttl mode and reset phy config */
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 813b8288da..8c5f23e9f8 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -225,6 +225,7 @@ enum {
 #define MIPIPHY_REGE8           0x03a0
 
 #define MIPIPHY_REGEB           0x03ac
+#define v_LVDS_BGPD(x)		BITS_MASK(x, 1, 0)
 #define v_PLL_PWR_OFF(x)        BITS_MASK(x, 1, 2)
 #define v_LANECLK_EN(x)         BITS_MASK(x, 1, 3)
 #define v_LANE3_EN(x)           BITS_MASK(x, 1, 4)

commit 206cad104e0d6f6bb3b0a978c468d2a2224506f9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Nov 16 11:21:48 2018 +0800

    rockchip: px30: disable video phy bandgap by default to reduce power consumption
    
    Change-Id: I98f84a9fd73a42252c695ab0dcc8fe0185ecd611
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 86e7248982..308d3d5a1a 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -18,6 +18,8 @@
 
 #define PMU_PWRDN_CON			0xff000018
 
+#define VIDEO_PHY_BASE			0xff2e0000
+
 #define SERVICE_CORE_ADDR		0xff508000
 #define QOS_PRIORITY			0x08
 
@@ -59,6 +61,10 @@ int arch_cpu_init(void)
 	writel(QOS_PRIORITY_LEVEL(1, 1), SERVICE_CORE_ADDR + QOS_PRIORITY);
 #endif
 
+	/* Disable video phy bandgap by default */
+	writel(0x82, VIDEO_PHY_BASE + 0x0000);
+	writel(0x05, VIDEO_PHY_BASE + 0x03ac);
+
 	return 0;
 }
 

commit 7bd73124c26922d3f6cd6f0e74e3399d87a692cc
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Nov 20 16:39:52 2018 +0800

    rockchip: rk3308: set compressed kernel image to 0x01880000(24M + 0x80000) for aarch64
    
    We put decompressed kernel image at 0x02080000(32M + 0x80000)
    for arm64, so there is very limit space left after 32M offset
    for some boards which run with 64M DRAM.
    Put compressed kernel image to 24M + 0x8000, then u-boot can
    decompresse it to 32M + 0x80000, this make boards with 64M
    SDRAM can boot compressed kernel image.
    
    Change-Id: Ifbed027fca1e6dfa420ad52bc903aa770244af2f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 5417838907..2420e224e2 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -50,7 +50,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"kernel_addr_c=0x04080000\0" \
+	"kernel_addr_c=0x01880000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 #else
 #define ENV_MEM_LAYOUT_SETTINGS \

commit 37a2bd9eec297fb82b3a804291a02f17f70bd909
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 15 09:39:57 2018 +0800

    configs: popmetal-rk3288: disable silent console
    
    We still hope to see the boot log from console.
    
    Change-Id: Id7d8588aab198161361b6f8b59177fd3bb7f90a6
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index da2b7cd362..0a4fb89b9c 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_POPMETAL_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit b57700811558b80e4235111c1d3b399e428117c5
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 15 09:37:45 2018 +0800

    configs: popmetal-rk3288: enable boot_android command
    
    Enable boot_android command to boot Android format image.
    
    Change-Id: Ia516d77af5480608f5d33ae3cdf8f7e69eb307ba
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index c9f958b1f0..da2b7cd362 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -8,16 +8,18 @@ CONFIG_TARGET_POPMETAL_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

commit a21c2f0ae12614a874794d649040f6de50b9ca6b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:57:24 2018 +0800

    rockchip: dts: rk3368-evb: move chosen to *-u-boot.dtsi
    
    Change-Id: I642736143d7a01df24a2814ad188247314d9315f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
index 6461d8a3b2..fe55e234b1 100644
--- a/arch/arm/dts/rk3368-evb.dts
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -12,10 +12,6 @@
 / {
 	model = "Rockchip RK3399 Evaluation Board";
 	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
-
-	chosen {
-		stdout-path = "serial2:115200n8";
-	};
 };
 
 &emmc {
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index cd53b84579..4a4cd71f42 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -9,6 +9,10 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
 };
 
 &uart2 {

commit 01a0b7a601cf0dad4958e764383b8242fde6dac0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:55:24 2018 +0800

    make.sh: using wide range match for all loader ini
    
    Change-Id: I1d4f63ed0685816f0b41796ac10bdafae068eee2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index a9be77561f..6e9092cd7c 100755
--- a/make.sh
+++ b/make.sh
@@ -492,7 +492,7 @@ pack_loader_image()
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
-		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL*.ini`
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}*MINIALL*.ini`
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then

commit ae1f243a7bef8894787afa9aa526c0afbd38ccbd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 19 14:46:15 2018 +0800

    mmc: delete SEND_STATUS after set-timing in hs200 mode
    
    In the eMMC spec, “Note that while the actual timing change is done,
    the behavior of any command sent command sent (like CMD13) cannot be
    guaranteed due to the asynchronous operation. Therefore it is not
    recommended to use CMD13 to check the busy completion of the timing
    change indication.” indicates that SEND_STATUS can not be send after
    set-timing, so delete it.
    
    Test eMMC model:
    Manufacturer ID: 45
    OEM: 100
    Name: DG401
    Rd Block Len: 512
    MMC version 5.1
    Capacity: 14.7 GiB
    
    Change-Id: Idd47461b529f28af649f2275041f36ef998ee404
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 7f74c0864d..54a316fab5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -844,7 +844,6 @@ static int mmc_select_hs_ddr(struct mmc *mmc)
 static int mmc_select_hs200(struct mmc *mmc)
 {
 	int ret;
-	struct mmc_cmd cmd;
 
 	/*
 	 * Set the bus width(4 or 8) with host's support and
@@ -861,18 +860,6 @@ static int mmc_select_hs200(struct mmc *mmc)
 			return ret;
 
 		mmc_set_timing(mmc, MMC_TIMING_MMC_HS200);
-
-		cmd.cmdidx = MMC_CMD_SEND_STATUS;
-		cmd.resp_type = MMC_RSP_R1;
-		cmd.cmdarg = mmc->rca << 16;
-
-		ret = mmc_send_cmd(mmc, &cmd, NULL);
-
-		if (ret)
-			return ret;
-
-		if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
-			return -EBADMSG;
 	}
 
 	return ret;

commit 9e8ce8162d1b0500db3a56b0878c10ae0dbdc425
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 17:11:17 2018 +0800

    mmc: distinguish switch command via send_status
    
    The cmd13 can't guarantee the switch command is success even it response
    without any error bit assert. So we should wait busy signal to wait the
    behaviour of the device is completed.
    
    Change-Id: Ia7e9efc27b5e05a7bcb9b4c98eef1e134efc29e7
    Fixes: 55e5defd2071 ("mmc: rework mmc_switch for non-send_status scenario")
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index afe772284d..7f74c0864d 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -562,7 +562,7 @@ static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 	return err;
 }
 
-static int mmc_poll_for_busy(struct mmc *mmc)
+static int mmc_poll_for_busy(struct mmc *mmc, u8 send_status)
 {
 	struct mmc_cmd cmd;
 	u8 busy = true;
@@ -576,8 +576,13 @@ static int mmc_poll_for_busy(struct mmc *mmc)
 
 	start = get_timer(0);
 
+	if (!send_status && !mmc_can_card_busy(mmc)) {
+		mdelay(timeout);
+		return 0;
+	}
+
 	do {
-		if (mmc_can_card_busy(mmc)) {
+		if (!send_status) {
 			busy = mmc_card_busy(mmc);
 		} else {
 			ret = mmc_send_cmd(mmc, &cmd, NULL);
@@ -614,8 +619,8 @@ static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
 	do {
 		ret = mmc_send_cmd(mmc, &cmd, NULL);
 
-		if (!ret && send_status)
-			return mmc_poll_for_busy(mmc);
+		if (!ret)
+			return mmc_poll_for_busy(mmc, send_status);
 	} while (--retries > 0 && ret);
 
 	return ret;

commit 2b78fc239c59189239a03a461d11bc6911331cc6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 11:40:23 2018 +0800

    rockchip: remove unused fit source file
    
    We use fit generator script instead.
    
    Change-Id: Ia799d5032e5f4ce21647548eca6efa70856da1a5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its
deleted file mode 100644
index e07a5394db..0000000000
--- a/arch/arm/mach-rockchip/fit_spl_optee.its
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing U-Boot, dtb and optee
- */
-
-/dts-v1/;
-
-/ {
-	description = "Simple image with OP-TEE support";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot";
-			data = /incbin/("../../../u-boot-nodtb.bin");
-			type = "standalone";
-			os = "U-Boot";
-			arch = "arm";
-			compression = "none";
-			load = <0x60200000>;
-		};
-		optee@1 {
-			description = "OP-TEE";
-			data = /incbin/("../../../tee.bin");
-			type = "firmware";
-			arch = "arm";
-			os = "op-tee";
-			compression = "none";
-			load = <0x68400000>;
-			entry = <0x68400000>;
-		};
-		fdt@1 {
-			description = "dtb";
-			data = /incbin/("../../../u-boot.dtb");
-			type = "flat_dt";
-			compression = "none";
-		};
-	};
-
-	configurations {
-		default = "conf@1";
-		conf@1 {
-			description = "Rockchip armv7 with OP-TEE";
-			firmware = "optee@1";
-			loadables = "uboot@1";
-			fdt = "fdt@1";
-		};
-	};
-};

commit 38f74602a53194a61c9c240ad31090f11b7e0e46
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 11:30:14 2018 +0800

    rockchip: configs: use FIT_GENERATOR instead of FIT_SOURCE
    
    There are some armv7 SoCs like RK3288 have a different SDRAM_BASE,
    so we need a script to generate correct BASE, update all SoC configs
    to use script.
    
    Change-Id: Ibba2f6adc6b9a104b54bbe9c7feefa92e6efcfe0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 8ee6329d53..2e8fcf21ad 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -19,7 +19,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 49cdf3bb40..a6c05c99da 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -22,7 +22,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 565ec37f67..a11cd6ea82 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -20,7 +20,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
index b19cbefe39..b963f9deb8 100644
--- a/configs/rk3036_defconfig
+++ b/configs/rk3036_defconfig
@@ -20,7 +20,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 965309bf4f..bde55f9083 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -20,7 +20,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 728458d59a..80019e4a3a 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -19,7 +19,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit 6d64bf28b28a4c7d3feb93a6d4d85218b6f642db
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 11:18:05 2018 +0800

    rockchip: add script to generate optee fit its
    
    The U-Boot and OP-TEE load&entry address may not the same for
    different SoCs, so we need a script to adapt it.
    
    Change-Id: Id5418aa8ac8b35045be9310f317a73e7c24d7518
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/make_fit_optee.sh b/arch/arm/mach-rockchip/make_fit_optee.sh
new file mode 100755
index 0000000000..ee36779d07
--- /dev/null
+++ b/arch/arm/mach-rockchip/make_fit_optee.sh
@@ -0,0 +1,70 @@
+#!/bin/bash
+
+cat << EOF
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Simple image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot";
+			data = /incbin/("./u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+EOF
+
+OUTDIR="/home/kever/src/u-boot"
+DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+UBOOT_OFFSET=0x00200000
+UBOOT_BASE=$((DARM_BASE+UBOOT_OFFSET))
+UBOOT_BASE=$(echo "obase=16;${UBOOT_BASE}"|bc)
+echo "			load = <0x"$UBOOT_BASE">;"
+
+cat << EOF
+		};
+		optee@1 {
+			description = "OP-TEE";
+			data = /incbin/("./tee.bin");
+			type = "firmware";
+			arch = "arm";
+			os = "op-tee";
+			compression = "none";
+EOF
+
+TEE_OFFSET=0x8400000
+TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+echo "			load = <0x"$TEE_LOAD_ADDR">;"
+echo "			entry = <0x"$TEE_LOAD_ADDR">;"
+
+cat << EOF
+		};
+		fdt@1 {
+			description = "dtb";
+			data = /incbin/("./u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "Rockchip armv7 with OP-TEE";
+			firmware = "optee@1";
+			loadables = "uboot@1";
+			fdt = "fdt@1";
+		};
+	};
+};
+EOF

commit fb7f9b09f0a023572632c3d482190bc4263ed43a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:27:43 2018 +0800

    rockchip: firefly-rk3288: remove SPL_STACK_R
    
    The rk3288 TPL is always running in DDR, we do not need a relocate
    STACK address.
    
    Change-Id: Ibc4c543ee96f81b407db6374f6293a07928cffda
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index e0f243021b..e7f778013b 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -2,22 +2,16 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_FIREFLY_RK3288=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
 CONFIG_DEBUG_UART=y
-# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
-CONFIG_ANDROID_BOOT_IMAGE=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
@@ -46,9 +40,9 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEYBOARD=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
-CONFIG_DM_KEYBOARD=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y

commit 3ddbcffe0cd44a0c37c9c96b89758c757322dd63
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:26:05 2018 +0800

    rockchip: rk3288: enable FIT and OPTEE for SPL
    
    rk3288 is going to enable trust(OPTEE), which pack in FIT image.
    
    Change-Id: Ic8872b4b6cb68d321c6996fde1b3e4083ef3b6da
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 850685e400..357ffe9379 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -169,6 +169,9 @@ config ROCKCHIP_RK3288
 	imply TPL_SERIAL_SUPPORT
 	select GICV2
 	select ARM_SMCCC
+	select SPL_OPTEE
+	select FIT
+	select SPL_LOAD_FIT
 	select TPL_LIBCOMMON_SUPPORT
 	select TPL_LIBGENERIC_SUPPORT
 	select TPL_SYS_MALLOC_SIMPLE
@@ -189,6 +192,8 @@ config ROCKCHIP_RK3288
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
 if ROCKCHIP_RK3288
+config SPL_FIT_GENERATOR
+	default "arch/arm/mach-rockchip/make_fit_optee.sh"
 
 config TPL_LDSCRIPT
 	default "arch/arm/mach-rockchip/u-boot-tpl.lds"

commit 0adb499810c5e7c53c2e89c91b77b09cb388d035
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:16:38 2018 +0800

    rockchip: rk3288: support TPL
    
    rk3288 is going to use TPL+SPL as preloader.
    
    Change-Id: I2c712564b7c3b4d7c826bda09135f7188b0abc22
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8248a7c96d..850685e400 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -161,9 +161,26 @@ config ROCKCHIP_RK3288
 	select CPU_V7
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	imply TPL_SERIAL_SUPPORT
 	select GICV2
 	select ARM_SMCCC
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
+	select TPL_SYS_MALLOC_SIMPLE
+	select TPL_BOOTROM_SUPPORT
+	select TPL_DRIVERS_MISC_SUPPORT
+	select TPL_OF_CONTROL
+	select TPL_DM
+	select TPL_REGMAP
+	select TPL_SYSCON
+	select TPL_RAM
+	select TPL_CLK
+	select TPL_TINY_MEMSET
 	help
 	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -171,6 +188,22 @@ config ROCKCHIP_RK3288
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3288
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+	default 0xff704000
+
+config TPL_MAX_SIZE
+	default 28672
+
+config TPL_STACK
+	default 0xff718000
+
+endif
+
 config ROCKCHIP_RK3308
 	bool "Support Rockchip RK3308"
 	select ARM64 if !ARM64_BOOT_AARCH32
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 8faf67d8ee..a5f4a86faf 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -20,15 +20,12 @@
 #define CONFIG_SYS_CBSIZE		1024
 
 #define CONFIG_SPL_FRAMEWORK
-#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
-/* Bootrom will load u-boot binary to 0x0 once return from SPL */
-#define CONFIG_SYS_TEXT_BASE		0x00000000
-#else
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#endif
 #define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
-#define CONFIG_SPL_STACK		0xff718000
+#define CONFIG_SPL_STACK		0x00180000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x100000
 
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/*  64M */
 #define GICD_BASE			0xffc01000
@@ -36,12 +33,6 @@
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320A
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
-# define CONFIG_SPL_TEXT_BASE		0x0
-#else
-# define CONFIG_SPL_TEXT_BASE		0xff704000
-#endif
-
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 10e7f377e47fc061f933962fc31e12927f228a0a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 19 13:02:01 2018 +0800

    misc: i2c_eeprom: use separate config for spl and tpl
    
    We may not need I2C_EEPROM in SPL and TPL.
    
    Change-Id: I8e8ded63601b791d12d6531dd958121b87e9231d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 10265c8fb4..1e6a58d2f8 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 endif
 obj-$(CONFIG_FSL_IIM) += fsl_iim.o
 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
-obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_$(SPL_TPL_)I2C_EEPROM) += i2c_eeprom.o
 obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
 obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o

commit cd08d188cfbd14390163ef2a949c81fa6a6bead6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 16 18:14:48 2018 +0800

    rockchip: dts: rk3288: add spl-boot-order
    
    SPL can boot from EMMC or SD card.
    
    Change-Id: Id6cf82880760a734eb9324bb4715dfd2e1c9d9ca
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index f073361c4d..979d119764 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -11,6 +11,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &emmc, &sdmmc;
 	};
 };
 

commit a196d7fc6a45d7b8e356a95e18fdc3d850735915
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 15:57:09 2018 +0800

    rockchip: display: handle error when there is no 'mcu-timing'
    
    The 'mcu-timing' may not in dts, and the following access will
    cause assert of invalid of_node.
    
    Change-Id: I98cfed0de471b8985642e7ffc14ab2e97ef6f575
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 69aa6b94c6..29f984985e 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1040,6 +1040,8 @@ static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
 	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
 
 	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
+	if (!ofnode_valid(mcu_node))
+		return -ENODEV;
 
 #define FDT_GET_MCU_INT(val, name) \
 	do { \

commit dcb787042760be2baf3bf7179fe23aef5716ae27
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 15 14:33:36 2018 +0800

    clk: rockchip: rk322x: fix up the vop clk setting assert error
    
    Change-Id: Ied72bcb5e92e300eeccd7bfd32285d2eeb4d4860
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index a59d945c9c..5371e95cd9 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -464,11 +464,10 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 	int src_clk_div;
 	u32 con, parent;
 
-	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 32);
-
 	switch (clk_id) {
 	case ACLK_VOP:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 32);
 		rk_clrsetreg(&cru->cru_clksel_con[33],
 			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
 			     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
@@ -486,6 +485,7 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 			else
 				src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 
+			assert(src_clk_div - 1 < 256);
 			rk_clrsetreg(&cru->cru_clksel_con[27],
 				     DCLK_LCDC_DIV_CON_MASK,
 				     (src_clk_div - 1) <<

commit 8b2c667148fef7f1df535649ff18bda4f9713a20
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 16:53:05 2018 +0800

    rockchip: rk3036: add boot order to enable both emmc and sdmmc
    
    The SPL can scan sdmmc and emmc one by one.
    
    Change-Id: Iaac25a606528c59420613e648573993009b7f2c1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3036-sdk.dts b/arch/arm/dts/rk3036-sdk.dts
index 6754625f00..e881387035 100644
--- a/arch/arm/dts/rk3036-sdk.dts
+++ b/arch/arm/dts/rk3036-sdk.dts
@@ -13,6 +13,7 @@
 	compatible = "sdk,sdk-rk3036", "rockchip,rk3036";
 
 	chosen {
+		u-boot,spl-boot-order = &sdmmc, &emmc;
 		stdout-path = &uart2;
 	};
 

commit eb01a1246aa15f90f101cc32189b90131fdbd189
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Thu Nov 15 10:58:58 2018 +0800

    rockchip: Add distro boot script for rknand devices
    
    Change-Id: I4776c9d4124bb858f6aae89ce32de36fb2db9074
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index a728fa3709..5417838907 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -68,6 +68,7 @@
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
 	RKIMG_DET_BOOTDEV \
+	BOOTENV_SHARED_RKNAND \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index c8dfcb4248..a92a46d783 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -25,6 +25,18 @@
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
+#ifdef CONFIG_CMD_RKNAND
+#define BOOTENV_SHARED_RKNAND	BOOTENV_SHARED_BLKDEV(rknand)
+#define BOOTENV_DEV_RKNAND		BOOTENV_DEV_BLKDEV
+#define BOOTENV_DEV_NAME_RKNAND	BOOTENV_DEV_NAME_BLKDEV
+#else
+#define BOOTENV_SHARED_RKNAND
+#define BOOTENV_DEV_RKNAND \
+	BOOT_TARGET_DEVICES_references_RKNAND_without_CONFIG_CMD_RKNAND
+#define BOOTENV_DEV_NAME_RKNAND \
+	BOOT_TARGET_DEVICES_references_RKNAND_without_CONFIG_CMD_RKNAND
+#endif
+
 /* First try to boot from SD (index 1), then eMMC (index 0) */
 #if CONFIG_IS_ENABLED(CMD_MMC)
 	#define BOOT_TARGET_MMC(func) \
@@ -34,6 +46,12 @@
 	#define BOOT_TARGET_MMC(func)
 #endif
 
+#if CONFIG_IS_ENABLED(CMD_RKNAND)
+	#define BOOT_TARGET_RKNAND(func) func(RKNAND, rknand, 0)
+#else
+	#define BOOT_TARGET_RKNAND(func)
+#endif
+
 #if CONFIG_IS_ENABLED(CMD_USB)
 	#define BOOT_TARGET_USB(func) func(USB, usb, 0)
 #else
@@ -54,6 +72,7 @@
 
 #define BOOT_TARGET_DEVICES(func) \
 	BOOT_TARGET_MMC(func) \
+	BOOT_TARGET_RKNAND(func) \
 	BOOT_TARGET_USB(func) \
 	BOOT_TARGET_PXE(func) \
 	BOOT_TARGET_DHCP(func)

commit 2dc2d048e2677cfcfa1ae637d5c986ff6da2a5e0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 15 15:55:56 2018 +0800

    rockchip: lmb: limit highest memory from 768MB to 512MB for 32-bit platform
    
    Ramdisk is a compressed image and it expands after descompress, which accesses
    768MB+ memory and brings "Unable to handle kernel paging request at virtual address ...".
    
    We make a appointment that the highest memory is 512MB, it makes lmb alloc safer.
    
    fixes: 2c6a058b7ea25398013cb25b4e3bb96fe40da1a5
    (rockchip: implement board_lmb_reserve())
    
    Change-Id: I728a1fbff216194b940372713387cf171028b20b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index caf046719e..cbc270c4f2 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -261,6 +261,7 @@ void enable_caches(void)
 	dcache_enable();
 }
 
+#ifdef CONFIG_LMB
 /*
  * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
  * This makes lmb_alloc_base() always alloc from tail of sdram.
@@ -283,24 +284,31 @@ void board_lmb_reserve(struct lmb *lmb)
 	size = gd->bd->bi_dram[i - 1].size;
 
 	/*
-	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area, otherwise
-	 * "Unable to handle kernel paging request at virtual address ...".
-	 * If so, using low address region, i.e before tustos region(132MB).
+	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+),
+	 * otherwise "Unable to handle kernel paging request at virtual address ...".
+	 *
+	 * So that we hope limit highest address at 768M, but there comes the the
+	 * problem: ramdisk is a compressed image and it expands after descompress,
+	 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...".
+	 *
+	 * We make a appointment that the highest memory address is 512MB, it
+	 * makes lmb alloc safer.
 	 */
-#ifndef ARM64
-	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M)) {
+#ifndef CONFIG_ARM64
+	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) {
 		start = gd->bd->bi_dram[i - 2].start;
 		size = gd->bd->bi_dram[i - 2].size;
 	}
 
-	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M))
-		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_768M - start;
+	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M))
+		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start;
 #endif
 	sprintf(bootm_low, "0x%llx", start);
 	sprintf(bootm_mapsize, "0x%llx", size);
 	env_set("bootm_low", bootm_low);
 	env_set("bootm_mapsize", bootm_mapsize);
 }
+#endif
 
 #ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
 int board_init_f_init_serial(void)

commit 8f88277439fbb0a967de722c132effe099a4fc9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 11:51:10 2018 +0800

    rockchip: support get boot devtype and devnum from atags
    
    - preloader would pass bootdev info;
    - avoid going through all the possible bootdev;
    - rename devtype_num_envset() to boot_devtype_init();
    
    Change-Id: Ia047c744dc7aca97db97664fc92473e46ba102a9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index e38627e4c1..16ec54bb7c 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -20,7 +20,7 @@
 
 #ifndef __ASSEMBLY__
 int setup_boot_mode(void);
-void devtype_num_envset(void);
+void boot_devtype_init(void);
 #endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 29500e36ad..caf046719e 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -29,10 +29,6 @@
 #ifdef CONFIG_ROCKCHIP_DEBUGGER
 #include <rockchip_debugger.h>
 #endif
-#ifdef CONFIG_DM_RAMDISK
-#include <ramdisk.h>
-#endif
-#include <mmc.h>
 #include <of_live.h>
 #include <dm/root.h>
 
@@ -179,16 +175,6 @@ int init_kernel_dtb(void)
 	int ret = 0;
 	ulong fdt_addr = 0;
 
-#ifdef CONFIG_DM_MMC
-	ret = mmc_initialize(gd->bd);
-	if (ret)
-		debug("%s: mmc initialized failed, ret=%d\n", __func__ ,ret);
-#else
-	ret = bramdisk_initialize();
-	if (ret)
-		debug("%s: bramdisk initialized failed, ret=%d\n", __func__, ret);
-#endif
-
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
 		printf("No Found FDT Load Address.\n");
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 59b8beb26e..f3e7c40bf5 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,12 +8,17 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/rk_atags.h>
 #include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <boot_rkimg.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
 #include <key.h>
+#ifdef CONFIG_DM_RAMDISK
+#include <ramdisk.h>
+#endif
+#include <mmc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -82,24 +87,81 @@ __weak int rockchip_dnl_key_pressed(void)
 	return keyval;
 }
 
-void devtype_num_envset(void)
+void boot_devtype_init(void)
 {
+	const char *devtype_num_set = "run rkimg_bootdev";
+	char *devtype = NULL, *devnum = NULL;
 	static int done = 0;
-	int ret = 0;
+	int ret;
 
 	if (done)
 		return;
 
-	const char *devtype_num_set = "run rkimg_bootdev";
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t;
+
+	t = atags_get_tag(ATAG_BOOTDEV);
+	if (t) {
+		switch (t->u.bootdev.devtype) {
+		case BOOT_TYPE_EMMC:
+			devtype = "mmc";
+			devnum = "0";
+			break;
+		case BOOT_TYPE_SD0:
+		case BOOT_TYPE_SD1:
+			devtype = "mmc";
+			devnum = "1";
+			break;
+		case BOOT_TYPE_NAND:
+			devtype = "rknand";
+			devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NAND:
+			devtype = "spinand";
+			devnum = "0";
+			break;
+		case BOOT_TYPE_SPI_NOR:
+			devtype = "spinor";
+			devnum = "1";
+			break;
+		case BOOT_TYPE_RAM:
+			devtype = "ramdisk";
+			devnum = "0";
+			break;
+		default:
+			printf("Unknown bootdev type: 0x%x\n",
+			       t->u.bootdev.devtype);
+			break;
+		}
+	}
+
+	debug("%s: Get bootdev from atags: %s %s\n", __func__, devtype, devnum);
 
+	if (devtype && devnum) {
+		env_set("devtype", devtype);
+		env_set("devnum", devnum);
+#ifdef CONFIG_DM_MMC
+		if (!strcmp("mmc", devtype))
+			mmc_initialize(gd->bd);
+#endif
+		goto finish;
+	}
+#endif
+
+#ifdef CONFIG_DM_MMC
+	mmc_initialize(gd->bd);
+#endif
 	ret = run_command_list(devtype_num_set, -1, 0);
 	if (ret) {
 		/* Set default dev type/num if command not valid */
-		env_set("devtype", "mmc");
-		env_set("devnum", "0");
+		devtype = "mmc";
+		devnum = "0";
+		env_set("devtype", devtype);
+		env_set("devnum", devnum);
 	}
-
+finish:
 	done = 1;
+	printf("Bootdev: %s %s\n", env_get("devtype"), env_get("devnum"));
 }
 
 void rockchip_dnl_mode_check(void)
@@ -139,7 +201,7 @@ int setup_boot_mode(void)
 	int boot_mode = BOOT_MODE_NORMAL;
 	char env_preboot[256] = {0};
 
-	devtype_num_envset();
+	boot_devtype_init();
 	rockchip_dnl_mode_check();
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 59d40e5926..a5316e1510 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -221,7 +221,7 @@ struct blk_desc *rockchip_get_bootdev(void)
 	if (dev_desc)
 		return dev_desc;
 
-	devtype_num_envset();
+	boot_devtype_init();
 	dev_type = get_bootdev_type();
 	devnum = env_get_ulong("devnum", 10, 0);
 

commit c7775636267d04079b3ead087c5f318c31cfbf1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 18:03:28 2018 +0800

    boot rkimg: record blk_desc for late use
    
    Change-Id: Iddd87d441d8ea71929cf7d9494c319345f972fe3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 42432bb918..59d40e5926 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -214,10 +214,13 @@ int get_bootdev_type(void)
 
 struct blk_desc *rockchip_get_bootdev(void)
 {
-	struct blk_desc *dev_desc;
+	static struct blk_desc *dev_desc = NULL;
 	int dev_type;
 	int devnum;
 
+	if (dev_desc)
+		return dev_desc;
+
 	devtype_num_envset();
 	dev_type = get_bootdev_type();
 	devnum = env_get_ulong("devnum", 10, 0);

commit b9756a5b0845f761ae0b61df30ac936c1b0ab540
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 15 17:45:56 2018 +0800

    rockchip: boot0: init gd as null in TINY_TPL
    
    Init gd to NULL in case someone using it.
    For example, below patch using gd in debug_uart_init:
    064eb49314 serial: ns16550: support using pre-loader serial
    
    Change-Id: Iee71dc8bc9168a0364598a3b4027807cba522594
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 796ccdee23..f25c29468f 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -55,6 +55,12 @@ _start:
 .type   save_boot_params_ret, % function
 .globl	save_boot_params_ret
 save_boot_params_ret:
+	/* Init gd as null */
+#ifdef CONFIG_ARM64
+	mov	x18, #0
+#else
+	mov	r9, #0
+#endif
 	b board_init_f
 #else
 	b reset

commit a2795c339d2c9641b341d660bbefa03b6f803cf8
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Nov 7 16:27:01 2018 +0800

    clk: rockchip: rk312x: add sfc clk init
    
    Change-Id: I5edf0a4b650a57a48f837fa3e007cfaf6a733f92
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 43c63323a2..a2f99d5657 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -123,6 +123,12 @@ enum {
 	ACLK_PERI_DIV_MASK	= 0x1f << ACLK_PERI_DIV_SHIFT,
 
 	/* CRU_CLKSEL11_CON */
+	SFC_PLL_SEL_SHIFT	= 14,
+	SFC_PLL_SEL_MASK	= 3 << SFC_PLL_SEL_SHIFT,
+	SFC_PLL_SEL_CPLL	= 0,
+	SFC_PLL_SEL_GPLL,
+	SFC_CLK_DIV_SHIFT	= 8,
+	SFC_CLK_DIV_MASK	= 0x1f << SFC_CLK_DIV_SHIFT,
 	MMC0_PLL_SHIFT		= 6,
 	MMC0_PLL_MASK		= 3 << MMC0_PLL_SHIFT,
 	MMC0_SEL_APLL		= 0,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 4f2b6c19f3..1b2943f59a 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -751,6 +751,11 @@ static void rkclk_init(struct rk3128_clk_priv *priv)
 		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
 		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
 		     3 << NANDC_CLK_DIV_SHIFT);
+	rk_clrsetreg(&priv->cru->cru_clksel_con[11],
+		     SFC_PLL_SEL_MASK | SFC_CLK_DIV_MASK,
+		     SFC_PLL_SEL_GPLL << SFC_PLL_SEL_SHIFT |
+		     9 << SFC_CLK_DIV_SHIFT);
+
 	rk3128_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ);
 	rk3128_bus_set_clk(priv, HCLK_CPU, ACLK_BUS_HZ / 2);
 	rk3128_bus_set_clk(priv, PCLK_CPU, ACLK_BUS_HZ / 2);

commit a95a20c7835e9b102cd6c9de9e68a407aaf888c8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:35:38 2018 +0800

    rockchip: dts: rk3288-evb: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: If794a5d3e8be334e81519d5bd69f97062db4b208
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb.dts b/arch/arm/dts/rk3288-evb.dts
index 3f03e1326c..9c6ac001c9 100644
--- a/arch/arm/dts/rk3288-evb.dts
+++ b/arch/arm/dts/rk3288-evb.dts
@@ -6,14 +6,11 @@
 
 /dts-v1/;
 #include "rk3288-evb.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	model = "Evb-RK3288";
 	compatible = "evb-rk3288,evb-rk3288", "rockchip,rk3288";
-
-	chosen {
-		stdout-path = &uart2;
-	};
 };
 
 &dmc {
@@ -27,31 +24,10 @@
 	rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
 };
 
-&pinctrl {
-	u-boot,dm-pre-reloc;
-};
-
 &pwm1 {
 	status = "okay";
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	reg-shift = <2>;
 };
-
-&sdmmc {
-	u-boot,dm-pre-reloc;
-};
-
-&emmc {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio3 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio8 {
-	u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index a80334192b..f073361c4d 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -8,6 +8,10 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
 };
 
 &uart2 {
@@ -40,6 +44,22 @@
 	u-boot,dm-pre-reloc;
 };
 
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
 &sdmmc {
 	u-boot,dm-pre-reloc;
-};
\ No newline at end of file
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+	u-boot,dm-pre-reloc;
+};

commit d153e81420b8ba6070586f5c041cc6562fa2af6a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 10:29:09 2018 +0800

    rockchip: dts: rk3128: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Id038494e1cbd1c63afa3397e64cb60f981aa0509
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
index 4371b34cd8..07cbe41575 100644
--- a/arch/arm/dts/px3se-evb.dts
+++ b/arch/arm/dts/px3se-evb.dts
@@ -14,6 +14,10 @@
 	model = "Rockchip PX3SE Evaluation board";
 	compatible = "rockchip,px3se-evb", "rockchip,px3se";
 
+	chosen {
+		stdout-path = &uart1;
+	};
+
 	adc-keys {
 		compatible = "adc-keys";
 		io-channels = <&saradc 1>;
@@ -34,10 +38,6 @@
 		};
 	};
 
-	chosen {
-		stdout-path = &uart1;
-	};
-
 	vcc50_otg: vcc50-otg {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc50_otg";
@@ -71,8 +71,6 @@
 };
 
 &uart1 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 26fe2500d6..263d524163 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -14,10 +14,6 @@
 	model = "Rockchip RK3126 Evaluation board";
 	compatible = "rockchip,rk3126-evb", "rockchip,rk3126";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_otg";
@@ -62,8 +58,6 @@
 };
 
 &uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index b6cee9b105..e896b29f33 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -13,10 +13,6 @@
 	model = "Rockchip RK3128 Evaluation board";
 	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_otg";
@@ -64,8 +60,6 @@
 };
 
 &uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 3561fe1530..d702a58c46 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -4,6 +4,16 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
 
 &dmc {
 	u-boot,dm-pre-reloc;
@@ -27,6 +37,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&uart1 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;

commit b000829baf8f19fb48f5bfdd5ecfee408807f433
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 14 09:20:55 2018 +0800

    rockchip: atags: give a valid range for magic check
    
    Avoid "bad magic" report in case that new atags magic has been
    added in preloader but U-Boot not.
    
    Change-Id: Id144bd7ae3245323f792bd5fe5d4e0cdef15ea22
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 150b171912..78c0039b1e 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -17,6 +17,7 @@
 #define ATAG_TOS_MEM		0x54410053
 #define ATAG_RAM_PARTITION	0x54410054
 #define ATAG_ATF_MEM		0x54410055
+#define ATAG_MAX		0x544100ff
 
 /* Tag size and offset */
 #define ATAGS_SIZE		(0x2000)	/* 8K */
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index a7ceaf2333..a545139af1 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -76,12 +76,7 @@ static int inline bad_magic(u32 magic)
 {
 	return ((magic != ATAG_CORE) &&
 		(magic != ATAG_NONE) &&
-		(magic != ATAG_SERIAL) &&
-		(magic != ATAG_BOOTDEV) &&
-		(magic != ATAG_DDR_MEM) &&
-		(magic != ATAG_TOS_MEM) &&
-		(magic != ATAG_RAM_PARTITION) &&
-		(magic != ATAG_ATF_MEM));
+		(magic < ATAG_SERIAL || magic > ATAG_MAX));
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)

commit 6e71c4dcccb35919ca49c1705235ae20911f7f72
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Nov 14 09:57:33 2018 +0800

    video/drm: dsi: support non-continuous clock behavior
    
    Fixes: eff8995ad7e9 ("video/drm: dsi: support non-continuous clock behavior")
    Change-Id: I5207d7a6bd3d0720180afdfe508c3ee165dc83ed
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 7a33dab5bd..a219f15f93 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -824,6 +824,10 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 		val |= VID_MODE_TYPE_BURST_SYNC_EVENTS;
 
 	dsi_write(dsi, DSI_VID_MODE_CFG, val);
+
+	if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				AUTO_CLKLANE_CTRL, AUTO_CLKLANE_CTRL);
 }
 
 static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
@@ -833,7 +837,8 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
 	} else {
 		dsi_write(dsi, DSI_PWR_UP, RESET);
-		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
 		dsi_write(dsi, DSI_PWR_UP, POWERUP);
 	}

commit 2c6a058b7ea25398013cb25b4e3bb96fe40da1a5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 2 11:35:19 2018 +0800

    rockchip: implement board_lmb_reserve()
    
    Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
    This makes lmb_alloc_base() always alloc from tail of sdram.
    If we don't assign it, bi_dram[0] is used by default and it may cause
    lmb_alloc_base() fail when bi_dram[0] range is small.
    
    Change-Id: I13c2c2d6135e26e647dcfde4c173d896c800fea5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 954e17d8c3..29500e36ad 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -275,6 +275,47 @@ void enable_caches(void)
 	dcache_enable();
 }
 
+/*
+ * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize".
+ * This makes lmb_alloc_base() always alloc from tail of sdram.
+ * If we don't assign it, bi_dram[0] is used by default and it may cause
+ * lmb_alloc_base() fail when bi_dram[0] range is small.
+ */
+void board_lmb_reserve(struct lmb *lmb)
+{
+	u64 start, size;
+	char bootm_low[32];
+	char bootm_mapsize[32];
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		if (!gd->bd->bi_dram[i].size)
+			break;
+	}
+
+	start = gd->bd->bi_dram[i - 1].start;
+	size = gd->bd->bi_dram[i - 1].size;
+
+	/*
+	 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area, otherwise
+	 * "Unable to handle kernel paging request at virtual address ...".
+	 * If so, using low address region, i.e before tustos region(132MB).
+	 */
+#ifndef ARM64
+	if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M)) {
+		start = gd->bd->bi_dram[i - 2].start;
+		size = gd->bd->bi_dram[i - 2].size;
+	}
+
+	if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_768M))
+		size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_768M - start;
+#endif
+	sprintf(bootm_low, "0x%llx", start);
+	sprintf(bootm_mapsize, "0x%llx", size);
+	env_set("bootm_low", bootm_low);
+	env_set("bootm_mapsize", bootm_mapsize);
+}
+
 #ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
 int board_init_f_init_serial(void)
 {
diff --git a/include/linux/sizes.h b/include/linux/sizes.h
index ce3e8150c1..9f234b581d 100644
--- a/include/linux/sizes.h
+++ b/include/linux/sizes.h
@@ -40,6 +40,7 @@
 #define SZ_128M				0x08000000
 #define SZ_256M				0x10000000
 #define SZ_512M				0x20000000
+#define SZ_768M				0x30000000
 
 #define SZ_1G				0x40000000
 #define SZ_2G				0x80000000

commit 9ebaf67ccdedf3ef53d4eb35e5f1e392777e6cd2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 2 12:54:06 2018 +0800

    common: boot_rkimg: init lmb by bi_dram[...] data.
    
    Keep same with ./common/bootm.c.
    
    Don't rely on env_get_bootm_low() and env_get_bootm_size() since
    they can't provide a confirm value, but bi_dram[...] it is.
    
    Change-Id: I2c2b64e7b8dfa3c7b38a6498567a5af7248e7a1e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 6c53a25d66..42432bb918 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -51,16 +51,22 @@ struct rockchip_image {
 #ifdef CONFIG_LMB
 static void boot_start_lmb(bootm_headers_t *images)
 {
+	lmb_init(&images->lmb);
+#ifdef CONFIG_NR_DRAM_BANKS
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		lmb_add(&images->lmb, gd->bd->bi_dram[i].start,
+			gd->bd->bi_dram[i].size);
+	}
+#else
 	ulong		mem_start;
 	phys_size_t	mem_size;
 
-	lmb_init(&images->lmb);
-
 	mem_start = env_get_bootm_low();
 	mem_size = env_get_bootm_size();
-
 	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
-
+#endif
 	arch_lmb_reserve(&images->lmb);
 	board_lmb_reserve(&images->lmb);
 }

commit 7c233ca6374c69de21651620f00526ea799d444a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 12 18:18:24 2018 +0800

    android: read two blocks of kernel image
    
    this patch fixes zboot.img boot up failed due to getting kernel
    compress type failed(reading IH_COMP_NONE).
    
    we need to read a few kernel image info, i.e. compress type.
    Assume 2 blocks maybe enough.
    
    fixes: ee465021feb46515c76fe2291d3fdf31eb6dbb4
    (android: support boot images packed with rockchip android hdr)
    
    Change-Id: I140832a899102984aebaad160a3902cfc483bfeb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 5681775190..36207e2770 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -279,9 +279,9 @@ long android_image_load(struct blk_desc *dev_desc,
 
 	/*
 	 * Read the Android boot.img header and a few parts of
-	 * the head of kernel image.
+	 * the head of kernel image(2 blocks maybe enough).
 	 */
-	blkcnt = DIV_ROUND_UP(sizeof(*hdr), 512);
+	blkcnt = DIV_ROUND_UP(sizeof(*hdr), 512) + 2;
 	hdr = memalign(ARCH_DMA_MINALIGN, blkcnt * 512);
 	if (!hdr) {
 		printf("%s: no memory\n", __func__);

commit 2efa632c45634fc459fe5b66c436ce1ca0068f37
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 12 16:16:09 2018 +0800

    common: bootm: add lmb reserve for fdt
    
    this avoids fdt being overriden when ramdisk relocation if
    fdt is too close to lmb allocable high memory region.
    
    fixes: 5af94f7887ab4057e9feb37243f843b811a5c0cf
    (android: get fdt by suitable ways)
    
    Change-Id: Iadd5854269d0832b0c0455c8423b9d4172768ce3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 97bfd23226..2863bcaa67 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -252,6 +252,7 @@ int bootm_find_images(int flag, int argc, char * const argv[])
 		return 1;
 	}
 	set_working_fdt_addr((ulong)images.ft_addr);
+	lmb_reserve(&images.lmb, (ulong)images.ft_addr, (ulong)images.ft_len);
 #endif
 
 #if IMAGE_ENABLE_FIT

commit 9983001913787102d6d1e7f64134d1c2f896e98d
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Oct 30 17:27:14 2018 +0800

    lib: optee_client: remove keymaster ta from uboot
    
    keymaster ta is too large, so we change store data
    to static ta and remove keymaster ta
    
    Change-Id: Icdb694138caf005d2cb2821714a8526d0391b18b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
deleted file mode 100644
index 2e07fbb105..0000000000
--- a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#ifndef _KEYMASTER_TA_H_
-#define _KEYMASTER_TA_H_
-
-extern const uint8_t keymaster_data[];
-extern const uint32_t keymaster_size;
-
-#endif /* _KEYMASTER_TA_H_ */
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
deleted file mode 100644
index a18356d16a..0000000000
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and /dev/null differ
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
deleted file mode 100644
index 66daec857b..0000000000
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and /dev/null differ
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 552135f4da..aab27e389b 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -12,10 +12,6 @@ obj-y += tee_smc-arm64.o
 
 ifdef CONFIG_OPTEE_V1
 obj-y += OpteeClientRkFs.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
 
 obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
 lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
@@ -25,9 +21,5 @@ endif
 
 ifdef CONFIG_OPTEE_V2
 obj-y += OpteeClientRkFs-v2.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c
-lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
-	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
 endif
 
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index fc7d788a82..facc268948 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -459,8 +459,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -522,7 +522,7 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -542,8 +542,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -607,7 +607,7 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
@@ -964,8 +964,8 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1027,7 +1027,7 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -1050,9 +1050,8 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1116,7 +1115,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
@@ -1494,8 +1493,8 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1556,7 +1555,7 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					142,
+					0,
 					&TeecOperation,
 					&ErrorOrigin);
 	if (TeecResult == TEEC_SUCCESS)
@@ -1576,8 +1575,8 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
-		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
@@ -1640,7 +1639,7 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					141,
+					1,
 					&TeecOperation,
 					&ErrorOrigin);
 
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 9de072765e..f8d0df396e 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -15,7 +15,6 @@
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
-#include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
 #include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
@@ -111,8 +110,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 	size_t AllocAddress = 0;
 
 	if (is_uuid_equal(TeeLoadTaCmd->uuid, TA_RK_KEYMASTER_UUID)) {
-		ImageData = (void *)keymaster_data;
-		ImageSize = keymaster_size;
+		ImageData = (void *)0;
+		ImageSize = 0;
 	} else {
 		ImageData = (void *)widevine_keybox_data;
 		ImageSize = widevine_keybox_size;
@@ -171,11 +170,11 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		debug("uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		debug("return size of TA, keymaster_size = 0x%x", keymaster_size);
-		TeeSmc32Param[1].u.memref.size = keymaster_size;
+		debug("return size of TA, keymaster_size = 0");
+		TeeSmc32Param[1].u.memref.size = 0;
 	} else {
-		memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
-			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
+		/*memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
+			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);*/
 		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);

commit ca77381e94c0a5a1f14e592d7cf7eedc8595f2e0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 12 16:22:47 2018 +0800

    rockchip: ram: rk3399: update for TPL
    
    Init the ddr sdram in TPL instead of SPL, update the code.
    
    Change-Id: I29ab54a2fe9aacc839826fc40ef263a10ef7033c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 76c1fe80a7..fa8da66f4e 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -32,7 +32,7 @@ struct chan_info {
 };
 
 struct dram_info {
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	struct chan_info chan[2];
 	struct clk ddr_clk;
 	struct rk3399_cru *cru;
@@ -57,7 +57,7 @@ struct dram_info {
 #define PHY_DRV_ODT_40		0xe
 #define PHY_DRV_ODT_34_3	0xf
 
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 
 struct rockchip_dmc_plat {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1188,7 +1188,7 @@ static int rk3399_dmc_init(struct udevice *dev)
 
 static int rk3399_dmc_probe(struct udevice *dev)
 {
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	if (rk3399_dmc_init(dev))
 		return 0;
 #else
@@ -1199,6 +1199,15 @@ static int rk3399_dmc_probe(struct udevice *dev)
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 			(phys_addr_t)&priv->pmugrf->os_reg2);
+#ifdef CONFIG_SPL_BUILD
+	struct ddr_param ddr_parem;
+
+	ddr_parem.count = 1;
+	ddr_parem.para[0] = priv->info.base;
+	ddr_parem.para[1] = priv->info.size;
+	rockchip_setup_ddr_param(&ddr_parem);
+#endif
+
 #endif
 	return 0;
 }
@@ -1227,12 +1236,12 @@ U_BOOT_DRIVER(dmc_rk3399) = {
 	.id = UCLASS_RAM,
 	.of_match = rk3399_dmc_ids,
 	.ops = &rk3399_dmc_ops,
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	.ofdata_to_platdata = rk3399_dmc_ofdata_to_platdata,
 #endif
 	.probe = rk3399_dmc_probe,
 	.priv_auto_alloc_size = sizeof(struct dram_info),
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
 	.platdata_auto_alloc_size = sizeof(struct rockchip_dmc_plat),
 #endif
 };

commit 90d1164a0442653b949e15ca23eb18a815e13931
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 12 16:18:01 2018 +0800

    spl: fit: use ddr for mmc read buffer in SPL
    
    SPL need read data to IRAM for bl31(m0&data), but the SDHCI does
    not support this path, we need to use DDR space as buffer.
    The SDHCI driver do not have any error/warning if we set the
    destination address to IRAM, and complete seems normally, but
    the data is not transfer.
    
    Change-Id: Ied9eed835961470bc87fda99a1565992c4103d9c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 72ae8f4c50..ebfd5bc2e3 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -10,6 +10,7 @@
 #include <image.h>
 #include <libfdt.h>
 #include <spl.h>
+#include <malloc.h>
 
 #ifndef CONFIG_SYS_BOOTM_LEN
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)
@@ -196,6 +197,10 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			return -ENOENT;
 
 		load_ptr = (load_addr + align_len) & ~align_len;
+#ifdef CONFIG_ROCKCHIP_RK3399
+		if ((load_ptr & 0xffff0000) == CONFIG_ROCKCHIP_IRAM_START_ADDR)
+			load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len);
+#endif
 		length = len;
 
 		overhead = get_aligned_image_overhead(info, offset);

commit f7669824484e34ff707cd9f8b6f83f0f352a6597
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 9 11:21:38 2018 +0800

    rockchip: rk3399: update defconfig for TPL
    
    The SPL is now running at SDRAM, and 0x10000 is used by BL31,
    and the ARM SPL do not support relocate now, we need reserved
    0x50000 so that it won't overwrite the code when we load the
    bl31 to target space.
    We should remove this after we enable the relocate feature.
    
    The SPL need malloc 0x9000 for MMC as buffer used for transfer
    data to IRAM(The EMMC DMA can not transfer data to IRAM directly).
    
    Change-Id: Ib6b73b3004345989d091d17c85b10698a97538b7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
index 2a907019bd..f56103356f 100644
--- a/configs/android6.0-rk3399_defconfig
+++ b/configs/android6.0-rk3399_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -16,7 +16,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -101,4 +101,5 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 305f0a405d..a28d8fdd2d 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -16,7 +16,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -103,4 +103,5 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index f0931266aa..95b4d07a8f 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -4,19 +4,18 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -92,4 +91,5 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index cff3149344..aa9e5b167d 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -17,7 +17,7 @@ CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -116,5 +116,6 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y

commit c7b9ee6b6f206c31475cfd7a6a965be5c07d9331
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 9 11:18:15 2018 +0800

    rockchip: rk3399: add tpl support in Kconfig
    
    Rockchp platform suppose to use TPL(run in SRAM) as dram init and
    SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be
    limited by SRAM size.
    
    Change-Id: Ib4115dbf6679fd4649e694d069a6489346112a97
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index feb659d07b..796ccdee23 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -72,6 +72,6 @@ _start:
 	ARM_VECTORS
 #endif
 
-#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
+#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
 	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fe90a710b3..8248a7c96d 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -262,7 +262,12 @@ config ROCKCHIP_RK3399
 	bool "Support Rockchip RK3399"
 	select ARM64
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	imply TPL_SERIAL_SUPPORT
 	select SPL_SEPARATE_BSS
 	select SPL_SERIAL_SUPPORT
 	select SPL_DRIVERS_MISC_SUPPORT
@@ -271,6 +276,18 @@ config ROCKCHIP_RK3399
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
 	select ARM_SMCCC
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
+	select TPL_SYS_MALLOC_SIMPLE
+	select TPL_BOOTROM_SUPPORT
+	select TPL_DRIVERS_MISC_SUPPORT
+	select TPL_OF_CONTROL
+	select TPL_DM
+	select TPL_REGMAP
+	select TPL_SYSCON
+	select TPL_RAM
+	select TPL_CLK
+	select TPL_TINY_MEMSET
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
@@ -279,6 +296,23 @@ config ROCKCHIP_RK3399
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3399
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+        default 0xff8c2000
+
+config TPL_MAX_SIZE
+        default 188416
+
+config TPL_STACK
+        default 0xff8effff
+
+endif
+
+
 config ROCKCHIP_RK1808
 	bool "Support Rockchip RK1808"
 	select ARM64
@@ -338,7 +372,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
 
 config TPL_ROCKCHIP_BACK_TO_BROM
 	bool "TPL returns to bootrom"
-	default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328
+	default y
 	select ROCKCHIP_BROM_HELPER
 	depends on TPL
 	help
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 6f5b909762..4921ae93f3 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -20,13 +20,11 @@
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
-#define CONFIG_SPL_STACK		0xff8effff
-#define CONFIG_SPL_TEXT_BASE		0xff8c2000
-#define CONFIG_SPL_MAX_SIZE		0x30000 - 0x2000
-/*  BSS setup */
-#define CONFIG_SPL_BSS_START_ADDR       0xff8e4000
-#define CONFIG_SPL_BSS_MAX_SIZE         0x10000 - 0x4000
-
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE             0x100000
+#define CONFIG_SPL_BSS_START_ADDR	0x00400000
+#define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 #define GICD_BASE			0xFEE00000

commit cd2964574b61bec2d95b17676b5e8b540c05b6c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 8 11:01:54 2018 +0800

    rockchip: rk3229: add spl-boot-order in chosen
    
    Add spl-boot-order to boot from both EMMC and SD.
    
    Change-Id: I7975a6faa79ad5a536faccac33ed6b342f99dc3f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 09665abb4c..d137064283 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -14,6 +14,10 @@
 	model = "Rockchip RK3229 Evaluation board";
 	compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
 
+	chosen {
+		u-boot,spl-boot-order = &emmc, &sdmmc;
+	};
+
 	ext_gmac: ext_gmac {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;

commit 10f01e730f49875e57aba303175e0af8819a1367
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 18:19:26 2018 +0800

    rockchip: sdhci: improve calpad busy trimming
    
    Change-Id: I8326d72d36a6aa58615d8c502881e4d446451a99
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index af840fc56d..592f31ec4f 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -79,9 +79,10 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 
 	/*
 	 * According to the user manual, it asks driver to
-	 * wait 5us for calpad busy trimming
+	 * wait 5us for calpad busy trimming. But it seems that
+	 * 5us of caldone isn't enough for all cases.
 	 */
-	udelay(5);
+	udelay(500);
 	caldone = readl(&phy->emmcphy_status);
 	caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK;
 	if (caldone != PHYCTRL_CALDONE_DONE) {

commit 0598134af8ae8c77ee388a501236cf1e3dbe1482
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 2 16:59:05 2018 +0800

    rockchip: rk322x: fix clock assert value
    
    The value after '<' should be max value instead of 'max-1'
    
    Change-Id: I7a1deaa75b8a931631a54e8dfd154c266251c7fc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 59bcd0540c..a59d945c9c 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -313,7 +313,7 @@ static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
 	switch (clk_id) {
 	case ACLK_CPU:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 < 32);
 		rk_clrsetreg(&cru->cru_clksel_con[0],
 			     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
 			     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
@@ -323,7 +323,7 @@ static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
 							      ACLK_CPU),
 					   hz);
-		assert(src_clk_div - 1 < 3);
+		assert(src_clk_div - 1 < 4);
 		rk_clrsetreg(&cru->cru_clksel_con[1],
 			     BUS_HCLK_DIV_MASK,
 			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
@@ -332,7 +332,7 @@ static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
 							      ACLK_CPU),
 					   hz);
-		assert(src_clk_div - 1 < 7);
+		assert(src_clk_div - 1 < 8);
 		rk_clrsetreg(&cru->cru_clksel_con[1],
 			     BUS_PCLK_DIV_MASK,
 			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
@@ -386,7 +386,7 @@ static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
 	switch (clk_id) {
 	case ACLK_PERI:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 < 32);
 		rk_clrsetreg(&cru->cru_clksel_con[10],
 			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
 			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
@@ -396,7 +396,7 @@ static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
 							       ACLK_PERI),
 					   hz);
-		assert(src_clk_div - 1 < 3);
+		assert(src_clk_div - 1 < 4);
 		rk_clrsetreg(&cru->cru_clksel_con[10],
 			     PERI_HCLK_DIV_MASK,
 			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
@@ -405,7 +405,7 @@ static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
 		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
 							       ACLK_PERI),
 					   hz);
-		assert(src_clk_div - 1 < 7);
+		assert(src_clk_div - 1 < 8);
 		rk_clrsetreg(&cru->cru_clksel_con[10],
 			     PERI_PCLK_DIV_MASK,
 			     (src_clk_div - 1) << PERI_PCLK_DIV_SHIFT);
@@ -465,7 +465,7 @@ static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
 	u32 con, parent;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 < 32);
 
 	switch (clk_id) {
 	case ACLK_VOP:

commit cfadd6bbce098ddf265e0f4c6951576a2a5d49f8
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Oct 25 15:31:04 2018 +0800

    driver: ram: rockchip: fix rockchip_setup_ddr_param
    
    rockchip_setup_ddr_param use to write ddr param to
    a known place for trustos.
    
    Change-Id: Ied4636d5e709ed036a45434202d99e916a5f1dcb
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 33c8192f8e..2f63d92584 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -17,6 +17,12 @@ enum {
 	UNUSED = 0xFF
 };
 
+struct ddr_param {
+	u32 count;
+	u32 reserved;
+	u64 para[8];
+};
+
 /*
  * sys_reg bitfield struct
  * [31]		row_3_4_ch1
@@ -85,6 +91,6 @@ size_t rockchip_sdram_size(phys_addr_t reg);
 int dram_init(void);
 
 /* Write ddr param to a known place for trustos */
-int rockchip_setup_ddr_param(struct ram_info *info);
+int rockchip_setup_ddr_param(struct ddr_param *info);
 
 #endif
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 16108c51ec..3f15c18000 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -13,14 +13,7 @@
 #include <dm/uclass-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-struct ddr_param{
-	u32 count;
-	u32 reserved;
-	u64 bank_addr;
-	u64 bank_size;
-};
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
-
 #define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
 
 struct tos_parameter_t {
@@ -435,14 +428,15 @@ ulong board_get_usable_ram_top(ulong total_size)
 	return (gd->ram_top > top) ? top : gd->ram_top;
 }
 
-int rockchip_setup_ddr_param(struct ram_info *info)
+int rockchip_setup_ddr_param(struct ddr_param *info)
 {
+	u32 i;
 	struct ddr_param *dinfo = (struct ddr_param *)(CONFIG_SYS_SDRAM_BASE +
 					PARAM_DRAM_INFO_OFFSET);
 
-	dinfo->count = 1;
-	dinfo->bank_addr = info->base;
-	dinfo->bank_size = info->size;
+	dinfo->count = info->count;
+	for (i = 0; i < (info->count * 2); i++)
+		dinfo->para[i] = info->para[i];
 
 	return 0;
 }
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 35149d046e..1b78e67ae4 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -1157,6 +1157,32 @@ static int dram_detect_cs1_row(struct px30_sdram_params *sdram_params,
 	return ret;
 }
 
+void get_ddr_param(struct px30_sdram_params *sdram_params,
+		   struct ddr_param *ddr_param)
+{
+	u64 cs_cap[2];
+
+	cs_cap[0] = get_cs_cap(sdram_params, 0);
+	cs_cap[1] = get_cs_cap(sdram_params, 1);
+
+	if (sdram_params->ch.row_3_4) {
+		cs_cap[0] =  cs_cap[0] * 3 / 4;
+		cs_cap[1] =  cs_cap[1] * 3 / 4;
+	}
+
+	if (sdram_params->ch.row_3_4 && sdram_params->ch.rank == 2) {
+		ddr_param->count = 2;
+		ddr_param->para[0] = 0;
+		ddr_param->para[1] = cs_cap[0] * 4 / 3;
+		ddr_param->para[2] = cs_cap[0];
+		ddr_param->para[3] = cs_cap[1];
+	} else {
+		ddr_param->count = 1;
+		ddr_param->para[0] = 0;
+		ddr_param->para[1] = (u64)cs_cap[0] + (u64)cs_cap[1];
+	}
+}
+
 /* return: 0 = success, other = fail */
 static int sdram_init_detect(struct dram_info *dram,
 			     struct px30_sdram_params *sdram_params)
@@ -1209,6 +1235,7 @@ int sdram_init(void)
 {
 	struct px30_sdram_params *sdram_params;
 	int ret = 0;
+	struct ddr_param ddr_param;
 
 	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;
 	dram_info.pctl = (void *)DDRC_BASE_ADDR;
@@ -1224,6 +1251,8 @@ int sdram_init(void)
 	if (ret)
 		goto error;
 
+	get_ddr_param(sdram_params, &ddr_param);
+	rockchip_setup_ddr_param(&ddr_param);
 	print_ddr_info(sdram_params);
 
 	printascii("out\n");
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 24825971f7..7782d6a690 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -993,7 +993,12 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[2]);
 #ifdef CONFIG_SPL_BUILD
-	rockchip_setup_ddr_param(&priv->info);
+	struct ddr_param ddr_parem;
+
+	ddr_parem.count = 1;
+	ddr_parem.para[0] = priv->info.base;
+	ddr_parem.para[1] = priv->info.size;
+	rockchip_setup_ddr_param(&ddr_parem);
 #endif
 #endif
 	return 0;

commit f799a6361c91d94b87cac21aa12385127a99d26e
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Oct 22 14:59:46 2018 +0800

    configs: rk3328_common: Increase the size of malloc to 128MB.
    
    If vbmeta does not have signature information, avb will load all
    data in the vbmeta partition, which requires more malloc size.
    
    Change-Id: I8f03ec149a5b516d5dfa2b7906a54260c4e2e149
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index d9f06f52dd..a5be7c3bde 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 151cb556ea0d429a5ed937f00fa72bc0d2d28371
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 7 09:40:04 2018 +0800

    fuel gauge: rk816: default enable usb sys
    
    Change-Id: I54be4aa41a02adc51d764a48f1a1c966bff0445e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 7257211d60..49f947ed4a 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -73,6 +73,9 @@ static int dbg_enable = 0;
 /* CHRG_USB_CTRL*/
 #define CHRG_EN			(1 << 7)
 
+/* BAT_CTRL_REG */
+#define USB_SYS_EN		(1 << 6)
+
 /*SUP_STS_REG*/
 #define BAT_EXS			(1 << 7)
 #define USB_EXIST		(1 << 1)
@@ -233,6 +236,15 @@ static int rk816_bat_get_dsoc(struct  battery_priv *di)
 	return rk816_bat_read(di, SOC_REG);
 }
 
+static void rk816_bat_enable_input_current(struct battery_priv *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(di, BAT_CTRL_REG);
+	val |= USB_SYS_EN;
+	rk816_bat_write(di, BAT_CTRL_REG, val);
+}
+
 static void rk816_bat_enable_gauge(struct battery_priv *di)
 {
 	u8 val;
@@ -976,6 +988,7 @@ void rk816_bat_init_rsoc(struct battery_priv *di)
 
 static int rk816_fg_init(struct battery_priv *di)
 {
+	rk816_bat_enable_input_current(di);
 	rk816_bat_enable_gauge(di);
 	rk816_bat_set_vol_instant_mode(di);
 	rk816_bat_init_voltage_kb(di);

commit ff6f33d024ee23ae3ef6043c5183017a69610109
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 6 20:16:40 2018 +0800

    rockchip: rk3308: rename rk3308-evb-u-boot.dtsi to rk3308-u-boot.dtsi
    
    follow other platforms name style, like: rkxx-u-boot.dtsi
    
    Change-Id: Ic05c37bf49daad1c531c07f7d82abde4a485e432
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index d3853ef3eb..dfcd3f2916 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include "rk3308.dtsi"
+#include "rk3308-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 #include <linux/media-bus-format.h>
 
diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
similarity index 100%
rename from arch/arm/dts/rk3308-evb-u-boot.dtsi
rename to arch/arm/dts/rk3308-u-boot.dtsi

commit 12c19cb411c5b52b672d6505352af91784afc822
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 17:10:42 2018 +0800

    configs: rk3328_common: enable CONFIG_SUPPORT_EMMC_RPMB
    
    Change-Id: I3c1989db974be233395080a777fc7d5cd554d70e
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 362e3843dd..d9f06f52dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -28,6 +28,8 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320C
 
 /* MMC/SD IP block */

commit 2a32feb3116845f729eda449405d8499c8a61e10
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:44:28 2018 +0800

    configs: rk3328_defconfig: update with save defconfig
    
    Change-Id: I58b2f69e7237126ad87c15da3b23817159abd471
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 82324f27f7..190b2dd904 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -110,10 +110,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit fee1ae3406b3348dab974acca10f130b696dad6d
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Nov 5 11:59:58 2018 +0800

    usb: phy: add missed siddq set for rk3288 platform
    
    power up usb phy analog blocks by siddq when reboot-loader.
    
    Change-Id: I2fb1f8640bbb00a14cb18252cab78e8190efdd19
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index 133664b380..edcdb3268f 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -33,6 +33,7 @@ struct usb2phy_reg {
  */
 struct rockchip_usb2_phy_cfg {
 	struct usb2phy_reg port_reset;
+	struct usb2phy_reg siddq;
 	struct usb2phy_reg soft_con;
 	struct usb2phy_reg suspend;
 };
@@ -44,6 +45,7 @@ struct rockchip_usb2_phy_dt_id {
 
 static const struct rockchip_usb2_phy_cfg rk3288_pdata = {
 	.port_reset     = {0x00, 12, 12, 0, 1},
+	.siddq		= {0x00, 13, 13, 0, 1},
 	.soft_con       = {0x08, 2, 2, 0, 1},
 	.suspend	= {0x0c, 5, 0, 0x01, 0x2A},
 };
@@ -153,6 +155,10 @@ void otg_phy_init(struct dwc2_udc *dev)
 		return;
 	}
 	pdata->priv = phy_cfg;
+
+	/* power up usb phy analog blocks by set siddq 0 */
+	property_enable(pdata, &phy_cfg->siddq, false);
+
 	/* disable software control */
 	property_enable(pdata, &phy_cfg->soft_con, false);
 

commit 11f8577f04767d17b0f62044b58a0800a1f498b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 6 14:14:14 2018 +0800

    rockchip: rk3036: add rk3036_defconfig
    
    enable kernel dtb.
    
    Change-Id: I1a62889b618c2ad068309e017ca4a4de174b52c2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3036_defconfig b/configs/rk3036_defconfig
new file mode 100644
index 0000000000..b19cbefe39
--- /dev/null
+++ b/configs/rk3036_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_ROCKCHIP_RK3036=y
+CONFIG_TPL_STACK=0x10081fff
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3036=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_TINY_FRAMEWORK=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_LED=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+# CONFIG_TPL_DM_SERIAL is not set
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310a
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_TEST_ROCKCHIP=y
diff --git a/include/configs/evb_rk3036.h b/include/configs/evb_rk3036.h
index 807bf7ec55..1bfb8c9178 100644
--- a/include/configs/evb_rk3036.h
+++ b/include/configs/evb_rk3036.h
@@ -38,6 +38,9 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_CMDLINE_TAG
 
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
 #endif
 
 #endif
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 065a517084..fec756cf7f 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -65,6 +65,7 @@
 	"fdt_high=0x7fffffff\0" \
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 #endif
 

commit 6ebb5f3d0d2a204fde747628af93d2c2310fe798
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Nov 6 10:30:37 2018 +0800

    common: boot_rkimg: get boot_mode from register without misc partition
    
    If the misc partition is nonexistent, it's still to be hope that get the
    boot mode from GRF register.
    
    Change-Id: I94e6a64b9433a0c95071e3ee380841b8fddf768d
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index c5f421480b..6c53a25d66 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -308,7 +308,7 @@ int rockchip_get_boot_mode(void)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	struct bootloader_message *bmsg;
+	struct bootloader_message *bmsg = NULL;
 	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
 		   * RK_BLK_SIZE;
 	int ret;
@@ -336,7 +336,7 @@ int rockchip_get_boot_mode(void)
 			&part_info);
 	if (ret < 0) {
 		printf("get part %s fail %d\n", PART_MISC, ret);
-		return -EIO;
+		goto fallback;
 	}
 
 	bmsg = memalign(ARCH_DMA_MINALIGN, size);
@@ -348,8 +348,9 @@ int rockchip_get_boot_mode(void)
 		return -EIO;
 	}
 
+fallback:
 	/* Mode from misc partition */
-	if (!strcmp(bmsg->command, "boot-recovery")) {
+	if (bmsg && !strcmp(bmsg->command, "boot-recovery")) {
 		boot_mode = BOOT_MODE_RECOVERY;
 	} else {
 		/* Mode from boot mode register */

commit 1631bee789029b0155e0efccad7d37b4522b9bb8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Nov 6 10:01:20 2018 +0800

    rockchip: dtsi: rk3128: sync from kernel
    
    base on commit 4d46be090:
            (clk: rockchip: rk3128: add hclk_sfc)
    
    Change-Id: Ied6584460fa5243abd26efa5602b2312222898a1
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 95efd48eb4..a5fc4b8377 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -120,6 +120,7 @@
 #define PCLK_MIPIPHY		370
 
 /* hclk gates */
+#define HCLK_SFC		439
 #define HCLK_SPDIF		440
 #define HCLK_GPS		441
 #define HCLK_USBHOST		442

commit c664c887179b5dc1b26fff5b9c9721aee7437c98
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 2 17:59:21 2018 +0800

    rockchip: rk1808: correct SDRAM_MAX_SIZE
    
    Change-Id: Icdefdeff0a9e4f1ae8a161eb15b748471b291b74
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index b7a25f4bbc..27e8dabaea 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -26,7 +26,7 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_MAX_SIZE			0xf8000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_PREBOOT
 

commit d8ce1d0595da2af8d07778962b063b2e8e05e755
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Nov 5 09:41:36 2018 +0800

    FROMRKLOCAL: configs: rk3328_defconfig: enable DTBO overlay
    
    Change-Id: Ib4c8a0bc5bb6a212d7f6ad7d469d3405e1efbed2
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 7b5c6f2c7e..0a3d1a3c3f 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -34,6 +34,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -120,6 +121,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y

commit 823ecf52e243ded1472198525f6568d319b258d6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 30 10:13:53 2018 +0800

    clk: rockchip: rk3328: add clk_set_defaults for cru node
    
    Change-Id: I715dde89f691fd95487db53569cc6d8164dc5f28
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index fec75dbd5d..d16d914060 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -1146,9 +1146,14 @@ static void rkclk_init(struct rk3328_clk_priv *priv)
 static int rk3328_clk_probe(struct udevice *dev)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
+	int ret = 0;
 
 	rkclk_init(priv);
 
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
 	return 0;
 }
 

commit 50aff7d28a6634483bed0f2206157aac6d56a87d
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Oct 29 15:18:55 2018 +0800

    rockchip: dts: rk1808: enable usb
    
    Change-Id: Ie0d4862c1ea835357c1e2adecab2d813c6240a66
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index d6bfe24d36..ee258ff182 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -87,3 +87,43 @@
 &uart7 {
 	u-boot,dm-pre-reloc;
 };
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_host {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usbdrd_dwc3 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit 460677440cba1cb616232ae4febd9c3cac72a879
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 31 14:48:58 2018 +0800

    rockchip: rk322x: update mmc base in boot info
    
    Correct sdmmc and emmc base addr for rk322x.
    
    Change-Id: I1a05fa5a477924c2ae829e7094f81766db41e95c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 252fdae86b..57a3d59a44 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -13,8 +13,8 @@
 #define SGRF_DDR_CON0	0x10150000
 
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
-	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
-	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+	[BROM_BOOTSOURCE_EMMC] = "/dwmmc@30020000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@30000000",
 };
 
 int arch_cpu_init(void)

commit bbf5ac4250981e60e89bb73d9c24e39845b619e5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 31 14:46:25 2018 +0800

    rockchip: fit_spl_optee: update U-Boot text base
    
    This is a fix to:
    50f3250a1d rockchip: rk322x: adjust U-Boot text base and init sp
    
    Change-Id: I52ef77a3b086c26169b23756a4738723deddc19c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its
index 3aeecb8ec5..e07a5394db 100644
--- a/arch/arm/mach-rockchip/fit_spl_optee.its
+++ b/arch/arm/mach-rockchip/fit_spl_optee.its
@@ -18,7 +18,7 @@
 			os = "U-Boot";
 			arch = "arm";
 			compression = "none";
-			load = <0x61000000>;
+			load = <0x60200000>;
 		};
 		optee@1 {
 			description = "OP-TEE";

commit 63fe98d53f6e12d4aa818bb43d3d719600cf843b
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 30 10:13:53 2018 +0800

    FROMRKLIST: clk: rockchip: rk3328: add clk_set_defaults for cru node
    
    Change-Id: I715dde89f691fd95487db53569cc6d8164dc5f28
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    (cherry picked from commit 34690234becf9722f07323c8ec1c8ab4882a1431)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index fec75dbd5d..d16d914060 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -1146,9 +1146,14 @@ static void rkclk_init(struct rk3328_clk_priv *priv)
 static int rk3328_clk_probe(struct udevice *dev)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
+	int ret = 0;
 
 	rkclk_init(priv);
 
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
 	return 0;
 }
 

commit 41410fa39a034c3b62b568f89ee12f7b26efd692
Author: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Date:   Fri Oct 26 09:54:25 2018 +0800

    rockchip: rk3126c : modify arch_cpu_init()
    
    raise rk3126c cif-qos
    
    Change-Id: Ib16b6a951961a0d46bb2af5196e68182f9a22484
    Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 56c36af60c..30b21e7d91 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -15,6 +15,7 @@
 #define	CPU_AXI_QOS_PRIORITY_BASE	0x1012f188
 #define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
 	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
+#define	CPU_AXI_CIF_QOS_PRIORITY_BASE	0x1012f208
 
 int arch_cpu_init(void)
 {
@@ -35,6 +36,9 @@ int arch_cpu_init(void)
 	 * is an IC hardware issue.
 	 */
 	writel(0, SDMMC_INTMASK);
+
+	/* raise cif ddr qos priority */
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(3, 3), CPU_AXI_CIF_QOS_PRIORITY_BASE);
 #endif
 
 	return 0;

commit 4a8182231192eb3b45eaa54413d2b910958cda19
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Nov 1 11:33:57 2018 +0800

    Revert "video/drm: logo: fix show 8bit bmp logo failed"
    
    This reverts commit 168e07b7d16ecbfcb7386c3ebb7c3f3f48789e73.

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index ca4d92b4e7..523506f278 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,13 +163,14 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
+	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -184,10 +185,11 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0) {
+	if (height < 0)
 		height = 0 - height;
-		flip = false;
-	}
+	else
+		flip = true;
+
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 0a875f829d..5e125004d2 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 69aa6b94c6..d8799ae909 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,11 +166,6 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool bmp_can_disp_direct(struct logo_info *logo)
-{
-	return logo->bpp == 24 || logo->bpp == 32;
-}
-
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -184,23 +179,21 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-
-	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
-	if (vop_data) {
+	if (state->crtc_state.crtc->data) {
+		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
-
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
-			printf("support mirror mode.\n");
+		if (vop_data->version >= VOP_VERSION(3, 0)) {
+			printf("Support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("not support mirror mode.\n");
+			printf("Not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -972,14 +965,12 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
-
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
 	crtc_state->src_h = logo->height;
 	crtc_state->src_x = 0;
 	crtc_state->src_y = 0;
-	crtc_state->rb_swap = logo->rb_swap;
 	crtc_state->ymirror = logo->ymirror;
 
 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
@@ -1132,8 +1123,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
-	bool bmp_disp_direct = false;
-	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1178,24 +1167,22 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-	vop_supp_ymirror = vop_support_ymirror(logo);
-	bmp_disp_direct = bmp_can_disp_direct(logo);
-	if (!vop_supp_ymirror || !bmp_disp_direct) {
+
+	if (!vop_support_ymirror(logo)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
-		logo->rb_swap = (logo->bpp == 8 ? true : false);
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
+
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp,
-			       !vop_supp_ymirror)) {
+		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1203,12 +1190,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
+
 		logo->offset = 0;
-		logo->ymirror = vop_supp_ymirror;
+		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->rb_swap = (logo->bpp != 32 ? true : false);
-		logo->ymirror = true;
+		logo->ymirror = 1;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 0173face1a..d30eb50c4b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -130,7 +130,6 @@ struct connector_state {
 struct logo_info {
 	int mode;
 	char *mem;
-	bool rb_swap;
 	bool ymirror;
 	u32 offset;
 	u32 width;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 01986844b1..b0fa315537 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
+	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit 6096696b6d1464512bf271d71f4fc4e979ae978d
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Oct 29 11:57:30 2018 +0800

    rkflash: drivers: rkflash_debug code is adjusted to use block desc
    standard api
    
    Change-Id: I47d6fc0f0a4e660d0fa88cd72dcf2bffb8bb090c
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index f30fdafb10..38c2842170 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -8,6 +8,7 @@
 
 #include "rkflash_debug.h"
 #include "rkflash_blk.h"
+#include "boot_rkimg.h"
 
 void rkflash_print_hex(char *s, void *buf, u32 width, u32 len)
 {
@@ -42,20 +43,24 @@ static u8 pread[max_test_sector * 512];
 static u32 *pwrite32;
 void blk_stress_test(struct udevice *udev)
 {
-	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
-	struct rkflash_info *priv = dev_get_priv(udev->parent);
+	struct blk_desc *block_dev = rockchip_get_bootdev();
 	u16 i, j, loop = 0;
 	u32 test_end_lba;
-	u32 test_lba = 0;
+	u32 test_lba;
 	u16 test_sec_count = 1;
 	u16 print_flag;
 
-	if (!priv || !block_dev) {
+	if (!block_dev) {
 		printf("device unknown\n");
 		return;
 	}
 
-	test_end_lba = priv->density;
+	if (block_dev->if_type == IF_TYPE_SPINOR)
+		test_lba = 0x800;
+	else
+		test_lba = 0;
+
+	test_end_lba = block_dev->lba;
 	pwrite32 = (u32 *)pwrite;
 	for (i = 0; i < (max_test_sector * 512); i++)
 		pwrite[i] = i;
@@ -65,8 +70,7 @@ void blk_stress_test(struct udevice *udev)
 		test_sec_count = 1;
 		printf("test_end_lba = %x\n", test_end_lba);
 		printf("test_lba = %x\n", test_lba);
-		for (test_lba = 0;
-		     (test_lba + test_sec_count) < test_end_lba;) {
+		for (; (test_lba + test_sec_count) < test_end_lba;) {
 			pwrite32[0] = test_lba;
 			blk_dwrite(block_dev, test_lba, test_sec_count, pwrite);
 			blk_dread(block_dev, test_lba, test_sec_count, pread);
@@ -101,8 +105,7 @@ void blk_stress_test(struct udevice *udev)
 		printf("---------Test ftl check---------\n");
 
 		test_sec_count = 1;
-		for (test_lba = 0;
-		     (test_lba + test_sec_count) < test_end_lba;) {
+		for (; (test_lba + test_sec_count) < test_end_lba;) {
 			pwrite32[0] = test_lba;
 			blk_dread(block_dev, test_lba, test_sec_count, pread);
 			print_flag = test_lba & 0x7FF;

commit 314d8b77cf1236e2acf50827ecbc59a0af6aeaec
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Oct 29 11:29:57 2018 +0800

    rkflash: drivers: add misoeration protection for idblock upgrading
    
    1.when upgrading not start at NAND_IDB_START, do nothing
    
    Change-Id: Ie0c46c41676adec2f87e43c543ef049bda64c3bf
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index a63d3b0c17..80bc31450f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-12
+ * date: 2018-10-29
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -13763,37 +13763,37 @@ sftl_write:
 	@ args = 0, pretend = 0, frame = 128
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	adds	r4, r0, r1
-	subs	r5, r4, #1
+	adds	r7, r0, r1
+	add	r8, r7, #-1
 	sub	sp, sp, #136
-	cmp	r5, #63
+	cmp	r8, #63
 	mov	fp, r0
 	str	r1, [sp, #24]
 	str	r2, [sp, #44]
+	ldr	r4, .L1871
 	bls	.L1827
 	cmp	r0, #576
-	bls	.L1828
+	bcc	.L1828
 .L1827:
-	ldr	r3, .L1869
-	ldr	r3, [r3]
-	cbz	r3, .L1829
-	ldr	r3, .L1869+4
+	ldr	r3, [r4]
+	cbz	r3, .L1830
+	ldr	r3, .L1871+4
 	ldr	r10, [r3]
-	ldr	r3, .L1869+8
+	ldr	r3, .L1871+8
 	ldr	r2, [r10]
 	cmp	r2, r3
-	beq	.L1830
-.L1847:
-	ldr	r3, .L1869
+	beq	.L1831
+.L1848:
+	ldr	r3, .L1871
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1869+4
+	ldr	r3, .L1871+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1869+12
+	ldr	r3, .L1871+12
 	ldr	r0, [r3]
 	bl	free
-.L1829:
+.L1830:
 	ldr	r3, [sp, #44]
 	mov	r1, fp
 	ldr	r2, [sp, #24]
@@ -13802,16 +13802,16 @@ sftl_write:
 	add	sp, sp, #136
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1830:
-	ldr	r3, .L1869+16
+.L1831:
+	ldr	r3, .L1871+16
 	add	r0, r10, #262144
 	movw	r2, #65535
 	ldrh	r4, [r3, #14]
 	ldrh	r5, [r3, #10]
 	movs	r3, #0
-.L1834:
+.L1835:
 	ldr	r1, [r0, #-4]
-	cbnz	r1, .L1831
+	cbnz	r1, .L1832
 	ldr	r1, [r10, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -13820,22 +13820,22 @@ sftl_write:
 	movhi	r3, #0
 	cmp	r2, #4096
 	str	r1, [r0, #-4]!
-	bne	.L1834
+	bne	.L1835
 	mov	r3, #512
 	str	r3, [sp, #12]
-	b	.L1833
-.L1831:
+	b	.L1834
+.L1832:
 	add	r3, r2, #127
-	ldr	r0, .L1869+20
+	ldr	r0, .L1871+20
 	lsrs	r3, r3, #7
 	str	r3, [sp, #12]
 	bl	printf
-.L1833:
+.L1834:
 	uxtb	r4, r4
 	mov	r8, #0
 	smulbb	r5, r4, r5
 	uxth	r3, r5
-	ldr	r5, .L1869+24
+	ldr	r5, .L1871+24
 	str	r3, [sp, #16]
 	subs	r0, r3, #1
 	mov	r1, r3
@@ -13852,23 +13852,23 @@ sftl_write:
 	ldr	r3, [sp, #12]
 	lsls	r3, r3, #7
 	str	r3, [sp, #56]
-	b	.L1846
-.L1854:
+	b	.L1847
+.L1856:
 	str	r3, [sp, #40]
-.L1846:
-	ldr	r3, .L1869+12
+.L1847:
+	ldr	r3, .L1871+12
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	mov	r0, r8
 	ldrh	r7, [r3, #14]
 	mov	r1, r7
 	uxtb	r6, r7
 	uxth	r3, r6
 	str	r3, [sp, #36]
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	ldrh	r4, [r3, #10]
 	ldrh	r3, [sp, #36]
 	smulbb	r4, r4, r3
@@ -13880,7 +13880,7 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bls	.L1835
+	bls	.L1836
 	mov	r1, r7
 	add	r0, r4, r8
 	bl	__aeabi_uidiv
@@ -13888,7 +13888,7 @@ sftl_write:
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1835:
+.L1836:
 	mov	r1, r4
 	mov	r0, r8
 	movs	r4, #0
@@ -13896,20 +13896,20 @@ sftl_write:
 	sub	r3, r8, r1
 	str	r1, [sp, #48]
 	str	r3, [sp, #52]
-.L1836:
+.L1837:
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bhi	.L1837
-	ldr	r3, .L1869+12
+	bhi	.L1838
+	ldr	r3, .L1871+12
 	mov	r0, r8
 	movs	r4, #0
 	ldr	r3, [r3]
 	str	r3, [sp, #52]
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	ldrb	r7, [r3, #14]	@ zero_extendqisi2
 	uxth	r3, r7
 	str	r3, [sp, #48]
-	ldr	r3, .L1869+16
+	ldr	r3, .L1871+16
 	ldrh	r1, [r3, #10]
 	ldrh	r3, [sp, #48]
 	smulbb	r1, r1, r3
@@ -13922,10 +13922,10 @@ sftl_write:
 	str	r3, [sp, #60]
 	bl	__aeabi_idivmod
 	uxth	r6, r1
-.L1838:
+.L1839:
 	ldr	r3, [sp, #12]
 	cmp	r4, r3
-	bcs	.L1842
+	bcs	.L1843
 	ldr	r3, [sp, #48]
 	mov	r1, r7
 	subs	r3, r3, r6
@@ -13950,26 +13950,26 @@ sftl_write:
 	movs	r0, #0
 	blx	r6
 	adds	r0, r0, #1
-	bne	.L1839
-.L1842:
-	ldr	r3, .L1869+12
+	bne	.L1840
+.L1843:
+	ldr	r3, .L1871+12
 	mov	r1, r10
 	movs	r4, #0
 	ldr	r0, [r3]
-.L1840:
+.L1841:
 	mov	r7, r1
 	ldr	r2, [r0, r4, lsl #2]
 	ldr	r3, [r7]
 	lsls	r6, r4, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1843
+	beq	.L1844
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1869+12
+	ldr	r3, .L1871+12
 	mov	r1, r8
-	ldr	r0, .L1869+28
+	ldr	r0, .L1871+28
 	ldr	r2, [r3]
 	str	r4, [sp]
 	ldr	r3, [r7]
@@ -13981,13 +13981,13 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1853
+	bls	.L1855
 	ldr	r2, [sp, #16]
 	movs	r0, #0
 	ldr	r3, [r5, #4]
 	add	r1, r2, r8
 	blx	r3
-.L1853:
+.L1855:
 	ldr	r2, [sp, #40]
 	ldr	r3, [sp, #20]
 	add	r3, r3, r2
@@ -13995,9 +13995,9 @@ sftl_write:
 	add	r8, r8, r2
 	ldr	r2, [sp, #40]
 	cmp	r2, #15
-	bls	.L1854
-	b	.L1847
-.L1837:
+	bls	.L1856
+	b	.L1848
+.L1838:
 	ldr	r3, [sp, #48]
 	mov	r1, r6
 	adds	r0, r3, r4
@@ -14022,89 +14022,103 @@ sftl_write:
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
 	uxth	r4, r4
-	b	.L1836
-.L1839:
+	b	.L1837
+.L1840:
 	ldr	r3, [sp, #64]
 	movs	r6, #0
 	add	r3, r3, r4
 	uxth	r4, r3
-	b	.L1838
-.L1843:
+	b	.L1839
+.L1844:
 	ldr	r3, [sp, #56]
 	adds	r4, r4, #1
 	cmp	r4, r3
-	bne	.L1840
+	bne	.L1841
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #32]
-	bls	.L1853
-	b	.L1847
+	bls	.L1855
+	b	.L1848
+.L1872:
+	.align	2
+.L1871:
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	-52655045
+	.word	.LANCHOR186
+	.word	.LANCHOR0
+	.word	.LC114
+	.word	.LANCHOR105
+	.word	.LC115
 .L1828:
 	cmp	r0, #64
-	ldr	r6, .L1869+4
-	bne	.L1848
+	bne	.L1849
+	ldr	r5, .L1873
 	mov	r0, #262144
 	bl	ftl_malloc
-	str	r0, [r6]
+	str	r0, [r5]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1869+12
+	ldr	r3, .L1873+4
 	str	r0, [r3]
-	ldr	r3, [r6]
-	cbz	r3, .L1849
-	cbz	r0, .L1849
-	ldr	r2, .L1869
-	movs	r1, #1
+	ldr	r3, [r5]
+	cbz	r3, .L1850
+	cbz	r0, .L1850
+	movs	r2, #1
+	movs	r1, #0
+	str	r2, [r4]
 	mov	r0, r3
-	str	r1, [r2]
 	mov	r2, #262144
-	movs	r1, #0
 	bl	ftl_memset
-.L1848:
+.L1849:
+	ldr	r3, [r4]
+	cmp	r3, #0
+	beq	.L1830
+	ldr	r3, .L1873
 	cmp	fp, #63
-	ldr	r0, [r6]
-	bhi	.L1850
+	ldr	r1, [r3]
+	bhi	.L1852
 	ldr	r3, [sp, #24]
-	rsb	r1, fp, #64
-	subs	r2, r3, r1
+	rsb	r5, fp, #64
+	mov	r4, r1
+	subs	r6, r3, r5
 	ldr	r3, [sp, #44]
-	add	r1, r3, r1, lsl #9
-.L1851:
-	cmp	r5, #576
-	ittt	hi
-	subhi	r2, r2, r4
-	mvnhi	r3, #446
-	addhi	r2, r2, r3
-	lsls	r2, r2, #9
+	add	r5, r3, r5, lsl #9
+.L1853:
+	cmp	r8, #576
+	ldr	r0, .L1873+8
+	it	cs
+	subcs	r6, r6, r7
+	mov	r3, r4
+	it	cs
+	subcs	r6, r6, #446
+	mov	r2, #262144
+	str	r6, [sp]
+	bl	printf
+	lsls	r2, r6, #9
+	mov	r1, r5
+	mov	r0, r4
 	bl	ftl_memcpy
-	b	.L1829
-.L1870:
+	b	.L1830
+.L1850:
+	ldr	r1, .L1873+12
+	ldr	r0, .L1873+16
+	bl	printf
+	b	.L1849
+.L1852:
+	ldr	r4, .L1873+20
+	ldr	r5, [sp, #44]
+	ldr	r6, [sp, #24]
+	add	r4, r4, fp
+	add	r4, r1, r4, lsl #9
+	b	.L1853
+.L1874:
 	.align	2
-.L1869:
-	.word	.LANCHOR184
+.L1873:
 	.word	.LANCHOR185
-	.word	-52655045
 	.word	.LANCHOR186
-	.word	.LANCHOR0
-	.word	.LC114
-	.word	.LANCHOR105
-	.word	.LC115
-.L1849:
-	ldr	r1, .L1871
-	ldr	r0, .L1871+4
-	bl	printf
-	b	.L1848
-.L1850:
-	ldr	r3, .L1871+8
-	ldr	r1, [sp, #44]
-	ldr	r2, [sp, #24]
-	add	r3, r3, fp
-	add	r0, r0, r3, lsl #9
-	b	.L1851
-.L1872:
-	.align	2
-.L1871:
+	.word	.LC117
 	.word	.LANCHOR187
 	.word	.LC116
 	.word	8388544
@@ -14122,61 +14136,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L1892
+	ldr	r7, .L1894
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L1874:
-	ldr	r3, .L1892+4
+.L1876:
+	ldr	r3, .L1894+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1880
-	ldr	r5, .L1892+8
+	bcc	.L1882
+	ldr	r5, .L1894+8
 	movs	r4, #0
-.L1881:
+.L1883:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1882
-	ldr	r4, .L1892+12
+	bhi	.L1884
+	ldr	r4, .L1894+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1883:
+.L1885:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1887
+	bgt	.L1889
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1884
+	beq	.L1886
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1885
+	beq	.L1887
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1884:
+.L1886:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1883
-.L1880:
-	ldr	r3, .L1892+16
-	ldr	r5, .L1892+20
+	b	.L1885
+.L1882:
+	ldr	r3, .L1894+16
+	ldr	r5, .L1894+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1892+24
+	ldr	r4, .L1894+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1892+28
+	ldr	r3, .L1894+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L1875
+	beq	.L1877
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -14193,13 +14207,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L1876:
+.L1878:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1874
-.L1875:
+	b	.L1876
+.L1877:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -14211,21 +14225,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1877:
+.L1879:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1878
+	beq	.L1880
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1892+16
+	ldr	r3, .L1894+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -14243,42 +14257,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L1892+32
+	ldr	r3, .L1894+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L1892+24
+	ldr	r0, .L1894+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L1892+24
+	ldr	r0, .L1894+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1876
+	bne	.L1878
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L1877
-.L1878:
+	b	.L1879
+.L1880:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1877
-.L1882:
+	b	.L1879
+.L1884:
 	bl	FtlBbmMapBadBlock
-	b	.L1881
-.L1885:
+	b	.L1883
+.L1887:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1886
+	bne	.L1888
 	strh	r5, [r4]	@ movhi
-	b	.L1884
-.L1886:
+	b	.L1886
+.L1888:
 	strh	r5, [r4, #4]	@ movhi
-.L1887:
-	ldr	r3, .L1892+36
+.L1889:
+	ldr	r3, .L1894+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -14310,9 +14324,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1893:
+.L1895:
 	.align	2
-.L1892:
+.L1894:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -14337,62 +14351,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1918
-	ldr	r2, .L1918+4
-	ldr	r5, .L1918+8
+	ldr	r6, .L1920
+	ldr	r2, .L1920+4
+	ldr	r5, .L1920+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1895
+	cbz	r0, .L1897
 	bl	FtlMakeBbt
-.L1895:
-	ldr	r3, .L1918+12
-	ldr	r2, .L1918+16
-	ldr	ip, .L1918+100
+.L1897:
+	ldr	r3, .L1920+12
+	ldr	r2, .L1920+16
+	ldr	ip, .L1920+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1918+20
+	ldr	r2, .L1920+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1896:
+.L1898:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1897
-	ldr	r3, .L1918+24
+	blt	.L1899
+	ldr	r3, .L1920+24
 	movs	r7, #0
-	ldr	r10, .L1918+104
+	ldr	r10, .L1920+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1898:
+.L1900:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1899
-	ldr	r4, .L1918+28
+	bhi	.L1901
+	ldr	r4, .L1920+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1900
-.L1904:
+	bgt	.L1902
+.L1906:
 	movs	r6, #0
 	mov	r7, r6
-.L1901:
+.L1903:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1905
+	bhi	.L1907
 	ldrh	r2, [fp]
-	ldr	r3, .L1918+32
+	ldr	r3, .L1920+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1918+36
+	ldr	r6, .L1920+36
 	str	r2, [r3]
-	ldr	r3, .L1918+40
+	ldr	r3, .L1920+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14402,13 +14416,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1918+44
+	ldr	r0, .L1920+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1906
+	ble	.L1908
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14420,11 +14434,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1906:
-	ldr	r2, .L1918+48
+.L1908:
+	ldr	r2, .L1920+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1908
-	ldr	r1, .L1918+44
+	cbz	r2, .L1910
+	ldr	r1, .L1920+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14435,24 +14449,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1908:
+.L1910:
 	ldr	r3, [sp]
-	ldr	r7, .L1918+52
-	ldr	r10, .L1918+108
+	ldr	r7, .L1920+52
+	ldr	r10, .L1920+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1918+56
+	ldr	r3, .L1920+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1918+60
+	ldr	r6, .L1920+60
 	muls	r4, r3, r4
-	ldr	r3, .L1918+64
+	ldr	r3, .L1920+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14461,13 +14475,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1918+68
+	ldr	r2, .L1920+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1918+72
+	ldr	r2, .L1920+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14478,30 +14492,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1918+76
+	ldr	r3, .L1920+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1910:
+.L1912:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1911
+	bne	.L1913
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1910
-.L1897:
+	b	.L1912
+.L1899:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1896
-.L1899:
+	b	.L1898
+.L1901:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14509,11 +14523,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1898
-.L1900:
+	b	.L1900
+.L1902:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1918+80
+	ldr	r3, .L1920+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14521,26 +14535,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1902:
+.L1904:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1904
+	bls	.L1906
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1902
-.L1905:
+	b	.L1904
+.L1907:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1901
-.L1911:
+	b	.L1903
+.L1913:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1918+84
+	ldr	r4, .L1920+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14556,19 +14570,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1912:
+.L1914:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1913
+	cbnz	r3, .L1915
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1912
-.L1913:
+	b	.L1914
+.L1915:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14577,10 +14591,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1918+88
+	ldr	r3, .L1920+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1918+92
+	ldr	r3, .L1920+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14593,18 +14607,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1914
-	ldr	r3, .L1918+96
+	cbnz	r0, .L1916
+	ldr	r3, .L1920+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1914:
+.L1916:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1919:
+.L1921:
 	.align	2
-.L1918:
+.L1920:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -16086,221 +16100,221 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10026,"a",%progbits
+	.section	.rodata.__func__.10034,"a",%progbits
 	.set	.LANCHOR176,. + 0
-	.type	__func__.10026, %object
-	.size	__func__.10026, 19
-__func__.10026:
+	.type	__func__.10034, %object
+	.size	__func__.10034, 19
+__func__.10034:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.10137,"a",%progbits
+	.section	.rodata.__func__.10145,"a",%progbits
 	.set	.LANCHOR180,. + 0
-	.type	__func__.10137, %object
-	.size	__func__.10137, 23
-__func__.10137:
+	.type	__func__.10145, %object
+	.size	__func__.10145, 23
+__func__.10145:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10399,"a",%progbits
+	.section	.rodata.__func__.10407,"a",%progbits
 	.set	.LANCHOR147,. + 0
-	.type	__func__.10399, %object
-	.size	__func__.10399, 15
-__func__.10399:
+	.type	__func__.10407, %object
+	.size	__func__.10407, 15
+__func__.10407:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10418,"a",%progbits
+	.section	.rodata.__func__.10426,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.10418, %object
-	.size	__func__.10418, 15
-__func__.10418:
+	.type	__func__.10426, %object
+	.size	__func__.10426, 15
+__func__.10426:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10442,"a",%progbits
+	.section	.rodata.__func__.10450,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10442, %object
-	.size	__func__.10442, 17
-__func__.10442:
+	.type	__func__.10450, %object
+	.size	__func__.10450, 17
+__func__.10450:
 	.ascii	"FlashEraseBlocks\000"
-	.section	.rodata.__func__.8806,"a",%progbits
+	.section	.rodata.__func__.8814,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8806, %object
-	.size	__func__.8806, 11
-__func__.8806:
+	.type	__func__.8814, %object
+	.size	__func__.8814, 11
+__func__.8814:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8930,"a",%progbits
+	.section	.rodata.__func__.8938,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.8930, %object
-	.size	__func__.8930, 13
-__func__.8930:
+	.type	__func__.8938, %object
+	.size	__func__.8938, 13
+__func__.8938:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8958,"a",%progbits
+	.section	.rodata.__func__.8966,"a",%progbits
 	.set	.LANCHOR183,. + 0
-	.type	__func__.8958, %object
-	.size	__func__.8958, 9
-__func__.8958:
+	.type	__func__.8966, %object
+	.size	__func__.8966, 9
+__func__.8966:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9064,"a",%progbits
+	.section	.rodata.__func__.9072,"a",%progbits
 	.set	.LANCHOR187,. + 0
-	.type	__func__.9064, %object
-	.size	__func__.9064, 14
-__func__.9064:
+	.type	__func__.9072, %object
+	.size	__func__.9072, 14
+__func__.9072:
 	.ascii	"FtlWriteToIDB\000"
-	.section	.rodata.__func__.9105,"a",%progbits
+	.section	.rodata.__func__.9113,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9105, %object
-	.size	__func__.9105, 14
-__func__.9105:
+	.type	__func__.9113, %object
+	.size	__func__.9113, 14
+__func__.9113:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9148,"a",%progbits
+	.section	.rodata.__func__.9156,"a",%progbits
 	.set	.LANCHOR150,. + 0
-	.type	__func__.9148, %object
-	.size	__func__.9148, 11
-__func__.9148:
+	.type	__func__.9156, %object
+	.size	__func__.9156, 11
+__func__.9156:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9263,"a",%progbits
+	.section	.rodata.__func__.9271,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9263, %object
-	.size	__func__.9263, 17
-__func__.9263:
+	.type	__func__.9271, %object
+	.size	__func__.9271, 17
+__func__.9271:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9268,"a",%progbits
+	.section	.rodata.__func__.9276,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9268, %object
-	.size	__func__.9268, 17
-__func__.9268:
+	.type	__func__.9276, %object
+	.size	__func__.9276, 17
+__func__.9276:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9299,"a",%progbits
+	.section	.rodata.__func__.9307,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9299, %object
-	.size	__func__.9299, 17
-__func__.9299:
+	.type	__func__.9307, %object
+	.size	__func__.9307, 17
+__func__.9307:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9331,"a",%progbits
+	.section	.rodata.__func__.9339,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9331, %object
-	.size	__func__.9331, 22
-__func__.9331:
+	.type	__func__.9339, %object
+	.size	__func__.9339, 22
+__func__.9339:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9340,"a",%progbits
+	.section	.rodata.__func__.9348,"a",%progbits
 	.set	.LANCHOR156,. + 0
-	.type	__func__.9340, %object
-	.size	__func__.9340, 16
-__func__.9340:
+	.type	__func__.9348, %object
+	.size	__func__.9348, 16
+__func__.9348:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9373,"a",%progbits
+	.section	.rodata.__func__.9381,"a",%progbits
 	.set	.LANCHOR107,. + 0
-	.type	__func__.9373, %object
-	.size	__func__.9373, 26
-__func__.9373:
+	.type	__func__.9381, %object
+	.size	__func__.9381, 26
+__func__.9381:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9384,"a",%progbits
+	.section	.rodata.__func__.9392,"a",%progbits
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9384, %object
-	.size	__func__.9384, 15
-__func__.9384:
+	.type	__func__.9392, %object
+	.size	__func__.9392, 15
+__func__.9392:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9399,"a",%progbits
+	.section	.rodata.__func__.9407,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9399, %object
-	.size	__func__.9399, 31
-__func__.9399:
+	.type	__func__.9407, %object
+	.size	__func__.9407, 31
+__func__.9407:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9413,"a",%progbits
+	.section	.rodata.__func__.9421,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9413, %object
-	.size	__func__.9413, 16
-__func__.9413:
+	.type	__func__.9421, %object
+	.size	__func__.9421, 16
+__func__.9421:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9438,"a",%progbits
+	.section	.rodata.__func__.9446,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9438, %object
-	.size	__func__.9438, 22
-__func__.9438:
+	.type	__func__.9446, %object
+	.size	__func__.9446, 22
+__func__.9446:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9455,"a",%progbits
+	.section	.rodata.__func__.9463,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9455, %object
-	.size	__func__.9455, 9
-__func__.9455:
+	.type	__func__.9463, %object
+	.size	__func__.9463, 9
+__func__.9463:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9528,"a",%progbits
+	.section	.rodata.__func__.9536,"a",%progbits
 	.set	.LANCHOR171,. + 0
-	.type	__func__.9528, %object
-	.size	__func__.9528, 15
-__func__.9528:
+	.type	__func__.9536, %object
+	.size	__func__.9536, 15
+__func__.9536:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9550,"a",%progbits
+	.section	.rodata.__func__.9558,"a",%progbits
 	.set	.LANCHOR149,. + 0
-	.type	__func__.9550, %object
-	.size	__func__.9550, 14
-__func__.9550:
+	.type	__func__.9558, %object
+	.size	__func__.9558, 14
+__func__.9558:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9607,"a",%progbits
+	.section	.rodata.__func__.9615,"a",%progbits
 	.set	.LANCHOR151,. + 0
-	.type	__func__.9607, %object
-	.size	__func__.9607, 15
-__func__.9607:
+	.type	__func__.9615, %object
+	.size	__func__.9615, 15
+__func__.9615:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9670,"a",%progbits
+	.section	.rodata.__func__.9678,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9670, %object
-	.size	__func__.9670, 16
-__func__.9670:
+	.type	__func__.9678, %object
+	.size	__func__.9678, 16
+__func__.9678:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9704,"a",%progbits
+	.section	.rodata.__func__.9712,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9704, %object
-	.size	__func__.9704, 22
-__func__.9704:
+	.type	__func__.9712, %object
+	.size	__func__.9712, 22
+__func__.9712:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9761,"a",%progbits
+	.section	.rodata.__func__.9769,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9761, %object
-	.size	__func__.9761, 16
-__func__.9761:
+	.type	__func__.9769, %object
+	.size	__func__.9769, 16
+__func__.9769:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9782,"a",%progbits
+	.section	.rodata.__func__.9790,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9782, %object
-	.size	__func__.9782, 18
-__func__.9782:
+	.type	__func__.9790, %object
+	.size	__func__.9790, 18
+__func__.9790:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9807,"a",%progbits
+	.section	.rodata.__func__.9815,"a",%progbits
 	.set	.LANCHOR173,. + 0
-	.type	__func__.9807, %object
-	.size	__func__.9807, 21
-__func__.9807:
+	.type	__func__.9815, %object
+	.size	__func__.9815, 21
+__func__.9815:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9823,"a",%progbits
+	.section	.rodata.__func__.9831,"a",%progbits
 	.set	.LANCHOR161,. + 0
-	.type	__func__.9823, %object
-	.size	__func__.9823, 14
-__func__.9823:
+	.type	__func__.9831, %object
+	.size	__func__.9831, 14
+__func__.9831:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9908,"a",%progbits
+	.section	.rodata.__func__.9916,"a",%progbits
 	.set	.LANCHOR163,. + 0
-	.type	__func__.9908, %object
-	.size	__func__.9908, 25
-__func__.9908:
+	.type	__func__.9916, %object
+	.size	__func__.9916, 25
+__func__.9916:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9929,"a",%progbits
+	.section	.rodata.__func__.9937,"a",%progbits
 	.set	.LANCHOR174,. + 0
-	.type	__func__.9929, %object
-	.size	__func__.9929, 29
-__func__.9929:
+	.type	__func__.9937, %object
+	.size	__func__.9937, 29
+__func__.9937:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9936,"a",%progbits
+	.section	.rodata.__func__.9944,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9936, %object
-	.size	__func__.9936, 19
-__func__.9936:
+	.type	__func__.9944, %object
+	.size	__func__.9944, 19
+__func__.9944:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9949,"a",%progbits
+	.section	.rodata.__func__.9957,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9949, %object
-	.size	__func__.9949, 16
-__func__.9949:
+	.type	__func__.9957, %object
+	.size	__func__.9957, 16
+__func__.9957:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9956,"a",%progbits
+	.section	.rodata.__func__.9964,"a",%progbits
 	.set	.LANCHOR165,. + 0
-	.type	__func__.9956, %object
-	.size	__func__.9956, 20
-__func__.9956:
+	.type	__func__.9964, %object
+	.size	__func__.9964, 20
+__func__.9964:
 	.ascii	"decrement_vpc_count\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC105:
@@ -16346,7 +16360,7 @@ __func__.9956:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.48 20180930\000"
+	.ascii	"SFTL version: 5.0.48 20181029\000"
 .LC71:
 	.ascii	"%s\012\000"
 	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
@@ -16356,4 +16370,6 @@ __func__.9956:
 	.ascii	"write_idblock fail! %x %x %x %x\012\000"
 .LC116:
 	.ascii	"%s idb buffer alloc fail\012\000"
+.LC117:
+	.ascii	"%p %x %p %x\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index b4b319d64e..04304422f9 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-10-12
+ * date: 2018-10-29
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -12098,48 +12098,46 @@ FtlWrite:
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-	stp	x29, x30, [sp, -272]!
+	stp	x29, x30, [sp, -256]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	add	w19, w0, w1
 	stp	x21, x22, [sp, 32]
-	sub	w20, w19, #1
-	stp	x25, x26, [sp, 64]
-	mov	w22, w0
+	mov	w21, w0
+	stp	x19, x20, [sp, 16]
+	add	w20, w0, w1
 	stp	x23, x24, [sp, 48]
-	mov	w25, w1
+	sub	w22, w20, #1
+	stp	x25, x26, [sp, 64]
+	mov	w24, w1
 	stp	x27, x28, [sp, 80]
-	cmp	w20, 63
-	str	x2, [x29, 184]
+	cmp	w22, 63
+	str	x2, [x29, 168]
+	adrp	x25, .LANCHOR184
 	bls	.L1664
-	cmp	w0, 576
+	cmp	w0, 575
 	bls	.L1665
 .L1664:
-	adrp	x0, .LANCHOR184
-	str	x0, [x29, 152]
-	ldr	w1, [x0, #:lo12:.LANCHOR184]
-	cbz	w1, .L1666
+	ldr	w0, [x25, #:lo12:.LANCHOR184]
+	cbz	w0, .L1667
 	adrp	x0, .LANCHOR185
-	str	x0, [x29, 144]
+	str	x0, [x29, 128]
 	mov	w1, 35899
-	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	ldr	x23, [x0, #:lo12:.LANCHOR185]
 	movk	w1, 0xfcdc, lsl 16
-	ldr	w2, [x24]
+	ldr	w2, [x23]
 	cmp	w2, w1
-	beq	.L1667
-.L1684:
-	ldr	x0, [x29, 152]
-	str	wzr, [x0, #:lo12:.LANCHOR184]
-	ldr	x0, [x29, 144]
+	beq	.L1668
+.L1685:
+	ldr	x0, [x29, 128]
+	str	wzr, [x25, #:lo12:.LANCHOR184]
 	ldr	x0, [x0, #:lo12:.LANCHOR185]
 	bl	free
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	bl	free
-.L1666:
-	ldr	x3, [x29, 184]
-	mov	w2, w25
-	mov	w1, w22
+.L1667:
+	ldr	x3, [x29, 168]
+	mov	w2, w24
+	mov	w1, w21
 	mov	w0, 0
 	bl	FtlWrite
 	ldp	x19, x20, [sp, 16]
@@ -12147,87 +12145,88 @@ sftl_write:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 272
+	ldp	x29, x30, [sp], 256
 	ret
-.L1667:
+.L1668:
 	adrp	x1, .LANCHOR0
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	w2, 65535
 	mov	w4, 4097
-	str	x1, [x29, 168]
-	ldrh	w19, [x0, 14]
-	ldrh	w20, [x0, 10]
+	str	x1, [x29, 152]
+	ldrh	w20, [x0, 14]
+	ldrh	w19, [x0, 10]
 	mov	x0, 262140
-	add	x3, x24, x0
+	add	x3, x23, x0
 	mov	w0, 0
-.L1671:
+.L1672:
 	ldr	w1, [x3]
-	cbnz	w1, .L1668
-	ldr	w1, [x24, w0, uxtw 2]
+	cbnz	w1, .L1669
+	ldr	w1, [x23, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w1, [x3], -4
 	cmp	w0, w4
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1671
-	mov	w23, 512
-	b	.L1670
-.L1668:
-	add	w23, w2, 127
+	bne	.L1672
+	mov	w22, 512
+	b	.L1671
+.L1669:
+	add	w22, w2, 127
 	adrp	x0, .LC114
-	lsr	w23, w23, 7
+	lsr	w22, w22, 7
 	add	x0, x0, :lo12:.LC114
-	mov	w3, w23
+	mov	w3, w22
 	bl	printf
-.L1670:
-	and	w19, w19, 255
+.L1671:
+	and	w20, w20, 255
 	adrp	x26, .LANCHOR105
-	mul	w20, w20, w19
+	mul	w19, w19, w20
+	and	w0, w19, 65535
+	str	w0, [x29, 188]
+	sub	w20, w0, #1
 	mov	w19, 0
-	and	w20, w20, 65535
-	sub	w21, w20, #1
-	add	w21, w21, w23
-	udiv	w21, w21, w20
-	mul	w0, w20, w21
-	stp	w21, wzr, [x29, 196]
-	str	w0, [x29, 204]
-	lsl	w0, w23, 7
-	str	w0, [x29, 192]
+	add	w20, w20, w22
+	udiv	w20, w20, w0
+	mul	w0, w0, w20
+	stp	w20, wzr, [x29, 176]
+	str	w0, [x29, 184]
+	lsl	w0, w22, 7
+	str	w0, [x29, 148]
 	add	x0, x26, :lo12:.LANCHOR105
-	str	x0, [x29, 136]
-	b	.L1683
-.L1674:
+	str	x0, [x29, 120]
+	b	.L1684
+.L1675:
 	add	w0, w5, w4
-	ldr	x3, [x29, 136]
+	ldr	x3, [x29, 120]
 	ubfiz	x2, x4, 9, 16
-	stp	w5, w7, [x29, 112]
-	str	w4, [x29, 120]
-	add	x2, x24, x2
+	stp	w5, w4, [x29, 100]
+	str	w6, [x29, 112]
+	add	x2, x23, x2
 	udiv	w0, w0, w27
-	str	w6, [x29, 128]
+	str	w7, [x29, 144]
 	ldr	x8, [x3, 16]
-	add	x3, x29, 208
+	add	x3, x29, 192
 	and	w0, w0, 65535
 	mul	w1, w0, w27
-	stp	w1, w7, [x29, 208]
+	stp	w1, w7, [x29, 192]
 	udiv	w1, w6, w27
 	add	w1, w1, w0
 	mov	w0, 0
 	blr	x8
-	ldr	w4, [x29, 120]
-	ldr	w0, [x29, 160]
-	ldp	w5, w7, [x29, 112]
+	ldp	w5, w4, [x29, 100]
+	ldr	w0, [x29, 136]
+	ldr	w6, [x29, 112]
 	add	w4, w0, w4
-	ldr	w6, [x29, 128]
+	ldr	w7, [x29, 144]
 	and	w4, w4, 65535
-	b	.L1673
-.L1676:
+	b	.L1674
+.L1677:
 	add	w27, w8, w27
 	mov	w0, 0
 	and	w27, w27, 65535
-	b	.L1675
-.L1681:
+	b	.L1676
+.L1682:
 	mov	x27, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x5, x1, 2
@@ -12235,14 +12234,14 @@ sftl_write:
 	add	x1, x1, 1
 	ldr	w3, [x27]
 	cmp	w4, w3
-	beq	.L1677
+	beq	.L1678
 	mov	x2, 512
 	mov	w1, 0
-	str	x5, [x29, 160]
+	str	x5, [x29, 136]
 	bl	memset
-	ldr	x0, [x29, 176]
+	ldr	x0, [x29, 160]
 	mov	w4, w28
-	ldr	x5, [x29, 160]
+	ldr	x5, [x29, 136]
 	mov	w1, w19
 	ldr	w3, [x27]
 	add	x27, x26, :lo12:.LANCHOR105
@@ -12255,68 +12254,69 @@ sftl_write:
 	mov	w1, w19
 	mov	w0, 0
 	blr	x2
-	cmp	w21, 1
-	bls	.L1690
+	cmp	w20, 1
+	bls	.L1692
 	ldr	x2, [x27, 8]
-	add	w1, w20, w19
+	ldr	w0, [x29, 188]
+	add	w1, w0, w19
 	mov	w0, 0
 	blr	x2
-.L1690:
-	ldr	w1, [x29, 204]
-	ldr	w0, [x29, 196]
+.L1692:
+	ldr	w1, [x29, 184]
+	ldr	w0, [x29, 176]
 	add	w19, w19, w1
-	ldr	w1, [x29, 196]
-	add	w0, w21, w0
+	ldr	w1, [x29, 176]
+	add	w0, w20, w0
 	cmp	w1, 15
-	bhi	.L1684
-	str	w0, [x29, 196]
-.L1683:
+	bhi	.L1685
+	str	w0, [x29, 176]
+.L1684:
 	adrp	x5, .LANCHOR186
 	mov	x2, 512
 	mov	w1, 0
-	str	x5, [x29, 176]
+	str	x5, [x29, 160]
 	ldr	x0, [x5, #:lo12:.LANCHOR186]
 	bl	memset
-	ldr	x0, [x29, 168]
+	ldr	x0, [x29, 152]
 	add	x4, x26, :lo12:.LANCHOR105
-	str	x4, [x29, 120]
+	str	x4, [x29, 104]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldr	x6, [x4, 8]
 	ldrh	w3, [x0, 14]
 	ldrh	w2, [x0, 10]
 	mov	w0, 0
 	and	w27, w3, 255
-	str	w3, [x29, 128]
-	str	w27, [x29, 160]
+	str	w3, [x29, 112]
+	str	w27, [x29, 136]
 	udiv	w1, w19, w3
 	mul	w2, w27, w2
 	and	w28, w2, 65535
 	blr	x6
-	ldr	w0, [x29, 204]
-	ldr	w3, [x29, 128]
+	ldr	w0, [x29, 184]
+	ldr	w3, [x29, 112]
 	cmp	w0, w28
-	ldr	x4, [x29, 120]
-	bls	.L1672
+	ldr	x4, [x29, 104]
+	bls	.L1673
 	add	w1, w28, w19
 	ldr	x4, [x4, 8]
 	mov	w0, 0
 	udiv	w1, w1, w3
 	blr	x4
-.L1672:
+.L1673:
 	udiv	w5, w19, w28
 	mov	w4, 0
 	mov	w7, 61424
 	msub	w5, w5, w28, w19
 	sub	w6, w19, w5
-.L1673:
-	ldr	w0, [x29, 204]
+.L1674:
+	ldr	w0, [x29, 184]
 	cmp	w0, w4
-	bhi	.L1674
-	ldr	x0, [x29, 176]
+	bhi	.L1675
+	ldr	x0, [x29, 160]
 	add	x10, x26, :lo12:.LANCHOR105
 	mov	w27, 0
 	ldr	x6, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x29, 168]
+	ldr	x0, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w4, [x0, 14]
 	ldrh	w5, [x0, 10]
@@ -12331,9 +12331,9 @@ sftl_write:
 	sdiv	w0, w1, w28
 	msub	w0, w0, w28, w1
 	and	w0, w0, 65535
-.L1675:
-	cmp	w27, w23
-	bcs	.L1679
+.L1676:
+	cmp	w27, w22
+	bcs	.L1680
 	add	w1, w5, w27
 	sub	w8, w4, w0
 	add	w0, w0, w7
@@ -12342,92 +12342,105 @@ sftl_write:
 	ubfiz	x2, x27, 9, 16
 	udiv	w1, w1, w28
 	add	x2, x6, x2
-	stp	w4, w8, [x29, 108]
-	add	x3, x29, 208
-	stp	w5, w7, [x29, 116]
-	str	x10, [x29, 128]
+	stp	w4, w8, [x29, 96]
+	add	x3, x29, 192
+	str	w7, [x29, 104]
+	str	x10, [x29, 112]
 	and	w1, w1, 65535
-	str	x6, [x29, 160]
+	str	x6, [x29, 136]
+	str	w5, [x29, 144]
 	madd	w1, w1, w28, w0
 	mov	w0, 0
 	udiv	w1, w1, w28
 	blr	x11
 	cmn	w0, #1
-	ldp	w4, w8, [x29, 108]
-	ldp	w5, w7, [x29, 116]
-	ldr	x10, [x29, 128]
-	ldr	x6, [x29, 160]
-	bne	.L1676
-.L1679:
-	ldr	x0, [x29, 176]
-	mov	x2, x24
+	ldp	w4, w8, [x29, 96]
+	ldr	w7, [x29, 104]
+	ldr	w5, [x29, 144]
+	ldr	x10, [x29, 112]
+	ldr	x6, [x29, 136]
+	bne	.L1677
+.L1680:
+	ldr	x0, [x29, 160]
+	mov	x2, x23
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1677:
-	ldr	w3, [x29, 192]
+.L1678:
+	ldr	w3, [x29, 148]
 	mov	w28, w1
 	cmp	w1, w3
-	bcc	.L1681
-	ldr	w0, [x29, 200]
+	bcc	.L1682
+	ldr	w0, [x29, 180]
 	add	w0, w0, 1
-	str	w0, [x29, 200]
+	str	w0, [x29, 180]
 	cmp	w0, 5
-	bls	.L1690
-	b	.L1684
+	bls	.L1692
+	b	.L1685
 .L1665:
 	cmp	w0, 64
-	adrp	x21, .LANCHOR185
-	bne	.L1685
+	bne	.L1686
+	adrp	x19, .LANCHOR185
 	mov	w0, 262144
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR185]
+	str	x0, [x19, #:lo12:.LANCHOR185]
 	mov	w0, 262144
 	bl	ftl_malloc
 	mov	x1, x0
 	adrp	x0, .LANCHOR186
 	str	x1, [x0, #:lo12:.LANCHOR186]
-	ldr	x0, [x21, #:lo12:.LANCHOR185]
-	cbz	x0, .L1686
-	cbz	x1, .L1686
-	adrp	x1, .LANCHOR184
-	mov	w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR184]
+	ldr	x0, [x19, #:lo12:.LANCHOR185]
+	cbz	x0, .L1687
+	cbz	x1, .L1687
+	mov	w1, 1
 	mov	w2, 262144
+	str	w1, [x25, #:lo12:.LANCHOR184]
 	mov	w1, 0
 	bl	ftl_memset
-.L1685:
-	ldr	x0, [x21, #:lo12:.LANCHOR185]
-	cmp	w22, 63
-	bhi	.L1687
-	mov	w1, 64
-	ldr	x3, [x29, 184]
-	sub	w1, w1, w22
-	sub	w2, w25, w1
-	ubfiz	x1, x1, 9, 25
-	add	x1, x3, x1
-.L1688:
-	cmp	w20, 576
-	bls	.L1689
-	sub	w2, w2, w19
-	sub	w2, w2, #447
-.L1689:
-	lsl	w2, w2, 9
-	bl	ftl_memcpy
-	b	.L1666
 .L1686:
+	ldr	w0, [x25, #:lo12:.LANCHOR184]
+	cbz	w0, .L1667
+	adrp	x0, .LANCHOR185
+	cmp	w21, 63
+	ldr	x1, [x0, #:lo12:.LANCHOR185]
+	bhi	.L1689
+	mov	w23, 64
+	ldr	x0, [x29, 168]
+	sub	w23, w23, w21
+	mov	x19, x1
+	sub	w25, w24, w23
+	ubfiz	x23, x23, 9, 25
+	add	x23, x0, x23
+.L1690:
+	cmp	w22, 575
+	bls	.L1691
+	sub	w25, w25, w20
+	sub	w25, w25, #446
+.L1691:
+	mov	w4, w25
+	mov	x3, x19
+	mov	w2, 262144
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
+	bl	printf
+	lsl	w2, w25, 9
+	mov	x1, x23
+	mov	x0, x19
+	bl	ftl_memcpy
+	b	.L1667
+.L1687:
 	adrp	x1, .LANCHOR187
 	adrp	x0, .LC116
 	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1685
-.L1687:
-	lsl	w1, w22, 7
-	mov	w2, w25
-	sub	w1, w1, #8192
-	add	x0, x0, x1, lsl 2
-	ldr	x1, [x29, 184]
-	b	.L1688
+	b	.L1686
+.L1689:
+	lsl	w19, w21, 7
+	mov	w25, w24
+	sub	w19, w19, #8192
+	ldr	x23, [x29, 168]
+	add	x19, x1, x19, lsl 2
+	b	.L1690
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -12453,42 +12466,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L1708:
+.L1710:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1714
+	bcc	.L1716
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1715:
+.L1717:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1716
+	bhi	.L1718
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1717:
+.L1719:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1721
+	bgt	.L1723
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1718
+	beq	.L1720
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1719
+	cbz	w0, .L1721
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1718:
+.L1720:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1717
-.L1714:
+	b	.L1719
+.L1716:
 	adrp	x2, .LANCHOR123
 	adrp	x0, .LANCHOR115
 	add	x19, x28, :lo12:.LANCHOR148
@@ -12500,7 +12513,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L1709
+	beq	.L1711
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -12515,14 +12528,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1710:
+.L1712:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1708
-.L1709:
+	b	.L1710
+.L1711:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -12535,12 +12548,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L1711:
+.L1713:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1712
+	beq	.L1714
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -12578,29 +12591,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1710
+	bne	.L1712
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L1711
-.L1712:
+	b	.L1713
+.L1714:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1711
-.L1716:
+	b	.L1713
+.L1718:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1715
-.L1719:
+	b	.L1717
+.L1721:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1720
+	bne	.L1722
 	strh	w19, [x21]
-	b	.L1718
-.L1720:
+	b	.L1720
+.L1722:
 	strh	w19, [x21, 4]
-.L1721:
+.L1723:
 	adrp	x0, .LANCHOR106
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -12657,9 +12670,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1728
+	cbz	w0, .L1730
 	bl	FtlMakeBbt
-.L1728:
+.L1730:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR118
 	mov	w6, 23752
@@ -12670,31 +12683,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1729:
+.L1731:
 	cmp	w0, w1
-	blt	.L1730
+	blt	.L1732
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1731:
+.L1733:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1732
+	bhi	.L1734
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1733
-.L1737:
+	bgt	.L1735
+.L1739:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1734:
+.L1736:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1738
+	bhi	.L1740
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -12711,28 +12724,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1739
+	ble	.L1741
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1739:
+.L1741:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1741
+	cbz	w1, .L1743
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1741
+	bge	.L1743
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1741:
+.L1743:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
@@ -12776,20 +12789,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1743:
+.L1745:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1744
+	cbnz	w1, .L1746
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1743
-.L1730:
+	b	.L1745
+.L1732:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12797,8 +12810,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1729
-.L1732:
+	b	.L1731
+.L1734:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12806,8 +12819,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1731
-.L1733:
+	b	.L1733
+.L1735:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12817,17 +12830,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1735:
+.L1737:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1737
+	bls	.L1739
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1735
-.L1738:
+	b	.L1737
+.L1740:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12835,8 +12848,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1734
-.L1744:
+	b	.L1736
+.L1746:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12856,20 +12869,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1745:
+.L1747:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1746
+	cbnz	w1, .L1748
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1745
-.L1746:
+	b	.L1747
+.L1748:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12895,11 +12908,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1747
+	cbnz	w0, .L1749
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1747:
+.L1749:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14352,257 +14365,257 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6119,"a",@progbits
+	.section	.rodata.__func__.6127,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6119, %object
-	.size	__func__.6119, 11
-__func__.6119:
+	.type	__func__.6127, %object
+	.size	__func__.6127, 11
+__func__.6127:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6243,"a",@progbits
+	.section	.rodata.__func__.6251,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.6243, %object
-	.size	__func__.6243, 13
-__func__.6243:
+	.type	__func__.6251, %object
+	.size	__func__.6251, 13
+__func__.6251:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6271,"a",@progbits
+	.section	.rodata.__func__.6279,"a",@progbits
 	.align	3
 	.set	.LANCHOR183,. + 0
-	.type	__func__.6271, %object
-	.size	__func__.6271, 9
-__func__.6271:
+	.type	__func__.6279, %object
+	.size	__func__.6279, 9
+__func__.6279:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6377,"a",@progbits
+	.section	.rodata.__func__.6385,"a",@progbits
 	.align	3
 	.set	.LANCHOR187,. + 0
-	.type	__func__.6377, %object
-	.size	__func__.6377, 14
-__func__.6377:
+	.type	__func__.6385, %object
+	.size	__func__.6385, 14
+__func__.6385:
 	.string	"FtlWriteToIDB"
-	.section	.rodata.__func__.6418,"a",@progbits
+	.section	.rodata.__func__.6426,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6418, %object
-	.size	__func__.6418, 14
-__func__.6418:
+	.type	__func__.6426, %object
+	.size	__func__.6426, 14
+__func__.6426:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6461,"a",@progbits
+	.section	.rodata.__func__.6469,"a",@progbits
 	.align	3
 	.set	.LANCHOR150,. + 0
-	.type	__func__.6461, %object
-	.size	__func__.6461, 11
-__func__.6461:
+	.type	__func__.6469, %object
+	.size	__func__.6469, 11
+__func__.6469:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6576,"a",@progbits
+	.section	.rodata.__func__.6584,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6576, %object
-	.size	__func__.6576, 17
-__func__.6576:
+	.type	__func__.6584, %object
+	.size	__func__.6584, 17
+__func__.6584:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6581,"a",@progbits
+	.section	.rodata.__func__.6589,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6581, %object
-	.size	__func__.6581, 17
-__func__.6581:
+	.type	__func__.6589, %object
+	.size	__func__.6589, 17
+__func__.6589:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6612,"a",@progbits
+	.section	.rodata.__func__.6620,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6612, %object
-	.size	__func__.6612, 17
-__func__.6612:
+	.type	__func__.6620, %object
+	.size	__func__.6620, 17
+__func__.6620:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6644,"a",@progbits
+	.section	.rodata.__func__.6652,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6644, %object
-	.size	__func__.6644, 22
-__func__.6644:
+	.type	__func__.6652, %object
+	.size	__func__.6652, 22
+__func__.6652:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6653,"a",@progbits
+	.section	.rodata.__func__.6661,"a",@progbits
 	.align	3
 	.set	.LANCHOR156,. + 0
-	.type	__func__.6653, %object
-	.size	__func__.6653, 16
-__func__.6653:
+	.type	__func__.6661, %object
+	.size	__func__.6661, 16
+__func__.6661:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6686,"a",@progbits
+	.section	.rodata.__func__.6694,"a",@progbits
 	.align	3
 	.set	.LANCHOR107,. + 0
-	.type	__func__.6686, %object
-	.size	__func__.6686, 26
-__func__.6686:
+	.type	__func__.6694, %object
+	.size	__func__.6694, 26
+__func__.6694:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6697,"a",@progbits
+	.section	.rodata.__func__.6705,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.6697, %object
-	.size	__func__.6697, 15
-__func__.6697:
+	.type	__func__.6705, %object
+	.size	__func__.6705, 15
+__func__.6705:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6712,"a",@progbits
+	.section	.rodata.__func__.6720,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6712, %object
-	.size	__func__.6712, 31
-__func__.6712:
+	.type	__func__.6720, %object
+	.size	__func__.6720, 31
+__func__.6720:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6726,"a",@progbits
+	.section	.rodata.__func__.6734,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.6726, %object
-	.size	__func__.6726, 16
-__func__.6726:
+	.type	__func__.6734, %object
+	.size	__func__.6734, 16
+__func__.6734:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6751,"a",@progbits
+	.section	.rodata.__func__.6759,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6751, %object
-	.size	__func__.6751, 22
-__func__.6751:
+	.type	__func__.6759, %object
+	.size	__func__.6759, 22
+__func__.6759:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6768,"a",@progbits
+	.section	.rodata.__func__.6776,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.6768, %object
-	.size	__func__.6768, 9
-__func__.6768:
+	.type	__func__.6776, %object
+	.size	__func__.6776, 9
+__func__.6776:
 	.string	"log2phys"
-	.section	.rodata.__func__.6841,"a",@progbits
+	.section	.rodata.__func__.6849,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.6841, %object
-	.size	__func__.6841, 15
-__func__.6841:
+	.type	__func__.6849, %object
+	.size	__func__.6849, 15
+__func__.6849:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6863,"a",@progbits
+	.section	.rodata.__func__.6871,"a",@progbits
 	.align	3
 	.set	.LANCHOR149,. + 0
-	.type	__func__.6863, %object
-	.size	__func__.6863, 14
-__func__.6863:
+	.type	__func__.6871, %object
+	.size	__func__.6871, 14
+__func__.6871:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6920,"a",@progbits
+	.section	.rodata.__func__.6928,"a",@progbits
 	.align	3
 	.set	.LANCHOR151,. + 0
-	.type	__func__.6920, %object
-	.size	__func__.6920, 15
-__func__.6920:
+	.type	__func__.6928, %object
+	.size	__func__.6928, 15
+__func__.6928:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6983,"a",@progbits
+	.section	.rodata.__func__.6991,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6983, %object
-	.size	__func__.6983, 16
-__func__.6983:
+	.type	__func__.6991, %object
+	.size	__func__.6991, 16
+__func__.6991:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.7017,"a",@progbits
+	.section	.rodata.__func__.7025,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.7017, %object
-	.size	__func__.7017, 22
-__func__.7017:
+	.type	__func__.7025, %object
+	.size	__func__.7025, 22
+__func__.7025:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7074,"a",@progbits
+	.section	.rodata.__func__.7082,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7074, %object
-	.size	__func__.7074, 16
-__func__.7074:
+	.type	__func__.7082, %object
+	.size	__func__.7082, 16
+__func__.7082:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7095,"a",@progbits
+	.section	.rodata.__func__.7103,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.7095, %object
-	.size	__func__.7095, 18
-__func__.7095:
+	.type	__func__.7103, %object
+	.size	__func__.7103, 18
+__func__.7103:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7120,"a",@progbits
+	.section	.rodata.__func__.7128,"a",@progbits
 	.align	3
 	.set	.LANCHOR173,. + 0
-	.type	__func__.7120, %object
-	.size	__func__.7120, 21
-__func__.7120:
+	.type	__func__.7128, %object
+	.size	__func__.7128, 21
+__func__.7128:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7136,"a",@progbits
+	.section	.rodata.__func__.7144,"a",@progbits
 	.align	3
 	.set	.LANCHOR161,. + 0
-	.type	__func__.7136, %object
-	.size	__func__.7136, 14
-__func__.7136:
+	.type	__func__.7144, %object
+	.size	__func__.7144, 14
+__func__.7144:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7221,"a",@progbits
+	.section	.rodata.__func__.7229,"a",@progbits
 	.align	3
 	.set	.LANCHOR163,. + 0
-	.type	__func__.7221, %object
-	.size	__func__.7221, 25
-__func__.7221:
+	.type	__func__.7229, %object
+	.size	__func__.7229, 25
+__func__.7229:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7242,"a",@progbits
+	.section	.rodata.__func__.7250,"a",@progbits
 	.align	3
 	.set	.LANCHOR174,. + 0
-	.type	__func__.7242, %object
-	.size	__func__.7242, 29
-__func__.7242:
+	.type	__func__.7250, %object
+	.size	__func__.7250, 29
+__func__.7250:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7249,"a",@progbits
+	.section	.rodata.__func__.7257,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7249, %object
-	.size	__func__.7249, 19
-__func__.7249:
+	.type	__func__.7257, %object
+	.size	__func__.7257, 19
+__func__.7257:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7262,"a",@progbits
+	.section	.rodata.__func__.7270,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.7262, %object
-	.size	__func__.7262, 16
-__func__.7262:
+	.type	__func__.7270, %object
+	.size	__func__.7270, 16
+__func__.7270:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7269,"a",@progbits
+	.section	.rodata.__func__.7277,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.7269, %object
-	.size	__func__.7269, 20
-__func__.7269:
+	.type	__func__.7277, %object
+	.size	__func__.7277, 20
+__func__.7277:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7339,"a",@progbits
+	.section	.rodata.__func__.7347,"a",@progbits
 	.align	3
 	.set	.LANCHOR176,. + 0
-	.type	__func__.7339, %object
-	.size	__func__.7339, 19
-__func__.7339:
+	.type	__func__.7347, %object
+	.size	__func__.7347, 19
+__func__.7347:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7450,"a",@progbits
+	.section	.rodata.__func__.7458,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.7450, %object
-	.size	__func__.7450, 23
-__func__.7450:
+	.type	__func__.7458, %object
+	.size	__func__.7458, 23
+__func__.7458:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7712,"a",@progbits
+	.section	.rodata.__func__.7720,"a",@progbits
 	.align	3
 	.set	.LANCHOR147,. + 0
-	.type	__func__.7712, %object
-	.size	__func__.7712, 15
-__func__.7712:
+	.type	__func__.7720, %object
+	.size	__func__.7720, 15
+__func__.7720:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7731,"a",@progbits
+	.section	.rodata.__func__.7739,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.7731, %object
-	.size	__func__.7731, 15
-__func__.7731:
+	.type	__func__.7739, %object
+	.size	__func__.7739, 15
+__func__.7739:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7755,"a",@progbits
+	.section	.rodata.__func__.7763,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7755, %object
-	.size	__func__.7755, 17
-__func__.7755:
+	.type	__func__.7763, %object
+	.size	__func__.7763, 17
+__func__.7763:
 	.string	"FlashEraseBlocks"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC105:
@@ -14647,7 +14660,7 @@ __func__.7755:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.48 20180930"
+	.string	"SFTL version: 5.0.48 20181029"
 .LC71:
 	.string	"%s\n"
 	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
@@ -14657,4 +14670,6 @@ __func__.7755:
 	.string	"write_idblock fail! %x %x %x %x\n"
 .LC116:
 	.string	"%s idb buffer alloc fail\n"
+.LC117:
+	.string	"%p %x %p %x\n"
 	.hidden	free

commit ee465021feb46515c76fe2291d3fdf31eb6dbb49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 20:20:21 2018 +0800

    android: support boot images packed with rockchip android hdr
    
    For some legacy reasons, rockchip use mkbootimg tool to pack android
    images with special pack parameters(SDK version lower than 8.1) to
    assign kernel/ramdisk/seconds address and page size.
    
    Android hdr on RK3399 SDK-7.1:
       kernel size:      1299808
       kernel address:   60408000
       ramdisk size:     1e6b80
       ramdisk addrress: 62000000
       second size:      41c00
       second address:   60f00000
       tags address:     60088000
       page size:        4000
       header_version:   0
       os_version:       e041114 (ver: 1.7.2, level: 2017.4)
       name:
       cmdline:          buildvariant=userdebug
    
    The kernel/ramdisk/seconds address base is not from 0x10000000 and
    page size is not 0x800!
    
    This patch makes bootflow to compatible with above legacy packing.
    
    Change-Id: I663a0d1386694658c97586706ff21ed887d6a2e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index e815ec4762..255e4921fe 100755
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -48,7 +48,7 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	 */
 	load_address &= ~0x7ffff;
 #endif
-	load_address -= 0x800; /* default page size for boot header */
+
 	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
 	if (!dev_desc) {
 		printf("Could not get %s %s\n", argv[1], argv[2]);
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 367a258d52..de7492d571 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -424,7 +424,7 @@ static void slot_set_unbootable(AvbABSlotData* slot)
 }
 
 static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
-			       unsigned long load_address,
+			       unsigned long *android_load_address,
 			       char *slot_suffix)
 {
 	const char *requested_partitions[1] = {NULL};
@@ -437,6 +437,8 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	size_t slot_index_to_boot = 0;
 	char verify_state[38] = {0};
 	char can_boot = 1;
+	unsigned long load_address = *android_load_address;
+	struct andr_img_hdr *hdr;
 
 	requested_partitions[0] = boot_partname;
 	ops = avb_ops_user_new();
@@ -539,6 +541,11 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			strcat(newbootargs, slot_data[0]->cmdline);
 		env_set("bootargs", newbootargs);
 
+		/* Reserve page_size */
+		hdr = (void *)slot_data[0]->loaded_partitions->data;
+		load_address -= hdr->page_size;
+		*android_load_address = load_address;
+
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
@@ -878,7 +885,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 #ifdef CONFIG_ANDROID_AVB
-	if (android_slot_verify(boot_partname, load_address, slot_suffix))
+	if (android_slot_verify(boot_partname, &load_address, slot_suffix))
 		return -1;
 #else
 	/*
diff --git a/common/image-android.c b/common/image-android.c
index 7148e3580c..5681775190 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -38,7 +38,25 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 	if (hdr->kernel_addr == ANDROID_IMAGE_DEFAULT_KERNEL_ADDR)
 		return (ulong)hdr + hdr->page_size;
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * If kernel is compressed, kernel_addr is set as decompressed address
+	 * after compressed being loaded to ram, so let's use it.
+	 */
+	if (android_kernel_comp_type != IH_COMP_NONE &&
+	    android_kernel_comp_type != IH_COMP_ZIMAGE)
+		return hdr->kernel_addr;
+
+	/*
+	 * Compatble with rockchip legacy packing with kernel/ramdisk/second
+	 * address base from 0x60000000(SDK versiont < 8.1), these are invalid
+	 * address, so we calc it by real size.
+	 */
+	return (ulong)hdr + hdr->page_size;
+#else
 	return hdr->kernel_addr;
+#endif
+
 }
 
 void android_image_set_comp(struct andr_img_hdr *hdr, u32 comp)
@@ -172,14 +190,14 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 		return -1;
 	}
 
-	printf("RAM disk load addr 0x%08x size %u KiB\n",
-	       hdr->ramdisk_addr, DIV_ROUND_UP(hdr->ramdisk_size, 1024));
-
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
-
 	*rd_len = hdr->ramdisk_size;
+
+	printf("RAM disk load addr 0x%08lx size %u KiB\n",
+	       *rd_data, DIV_ROUND_UP(hdr->ramdisk_size, 1024));
+
 	return 0;
 }
 
@@ -253,37 +271,48 @@ long android_image_load(struct blk_desc *dev_desc,
 	long blk_read = 0;
 	u32 comp;
 	u32 kload_addr;
+	u32 blkcnt;
+	struct andr_img_hdr *hdr;
 
 	if (max_size < part_info->blksz)
 		return -1;
 
-	/* We don't know the size of the Android image before reading the header
-	 * so we don't limit the size of the mapped memory.
-	 */
-	buf = map_sysmem(load_address, 0 /* size */);
-
-	/* Read the Android boot.img header and a few parts of
+	/*
+	 * Read the Android boot.img header and a few parts of
 	 * the head of kernel image.
 	 */
-	if (blk_dread(dev_desc, part_info->start, 8, buf) != 8)
+	blkcnt = DIV_ROUND_UP(sizeof(*hdr), 512);
+	hdr = memalign(ARCH_DMA_MINALIGN, blkcnt * 512);
+	if (!hdr) {
+		printf("%s: no memory\n", __func__);
+		return -1;
+	}
+
+	if (blk_dread(dev_desc, part_info->start, blkcnt, hdr) != blkcnt)
 		blk_read = -1;
 
-	if (!blk_read && android_image_check_header(buf) != 0) {
+	if (!blk_read && android_image_check_header(hdr) != 0) {
 		printf("** Invalid Android Image header **\n");
 		blk_read = -1;
 	}
 
+	/* page_size for image header */
+	load_address -= hdr->page_size;
 
+	/* We don't know the size of the Android image before reading the header
+	 * so we don't limit the size of the mapped memory.
+	 */
+	buf = map_sysmem(load_address, 0 /* size */);
 	if (!blk_read) {
-		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
+		blk_cnt = (android_image_get_end(hdr) - (ulong)hdr +
 			   part_info->blksz - 1) / part_info->blksz;
-		comp = android_image_parse_kernel_comp(buf);
+		comp = android_image_parse_kernel_comp(hdr);
 		/*
 		 * We should load a compressed kernel Image
 		 * to high memory
 		 */
 		if (comp != IH_COMP_NONE) {
-			load_address += android_image_get_ksize(buf) * 3;
+			load_address += android_image_get_ksize(hdr) * 3;
 			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
 			unmap_sysmem(buf);
 			buf = map_sysmem(load_address, 0 /* size */);
@@ -291,7 +320,7 @@ long android_image_load(struct blk_desc *dev_desc,
 
 		if (blk_cnt * part_info->blksz > max_size) {
 			debug("Android Image too big (%lu bytes, max %lu)\n",
-			      android_image_get_end(buf) - (ulong)buf,
+			      android_image_get_end(hdr) - (ulong)hdr,
 			      max_size);
 			blk_read = -1;
 		} else {
@@ -315,6 +344,7 @@ long android_image_load(struct blk_desc *dev_desc,
 
 	}
 
+	free(hdr);
 	unmap_sysmem(buf);
 
 	debug("%lu blocks read: %s\n",

commit ab70714e5a4975b7ff215aed85c5b4ce124c275c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 31 14:44:19 2018 +0800

    Makefile: clean img file
    
    Some img file is generate by local script, like uboot.img, trust,img,
    remove them in clean command.
    
    Change-Id: Ie724772dc10652c96b12cc2312ccbfce4231a9bb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/Makefile b/Makefile
index f81ac1f9f9..b3f61a2eac 100644
--- a/Makefile
+++ b/Makefile
@@ -1488,7 +1488,7 @@ CLEAN_DIRS  += $(MODVERDIR) \
 			$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
 
 CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
-	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin
+	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin *.img
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl \

commit c93db2f3565f17c8654f6b0e5e3c5e5d842df96b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 20:52:32 2018 +0800

    rockchip: rk3229: tpl skip rkclk_init
    
    The new rkclk_init is too complecate and not able to run in TPL,
    skip it in TPL.
    
    Change-Id: I46f30613050a86ee74060e713283bcb7980c3348
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 9716801b7a..59bcd0540c 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -862,6 +862,7 @@ static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+#ifndef CONFIG_TPL_BUILD
 static void rkclk_init(struct rk322x_clk_priv *priv)
 {
 	struct rk322x_cru *cru = priv->cru;
@@ -921,13 +922,14 @@ static void rkclk_init(struct rk322x_clk_priv *priv)
 	rk_clrsetreg(&cru->cru_misc_con, (0x1 << 13) |
 		     (0x1 << 15), (0 << 15) | (0 << 13));
 }
+#endif
 
 static int rk322x_clk_probe(struct udevice *dev)
 {
+#ifndef CONFIG_TPL_BUILD
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
-
 	rkclk_init(priv);
-
+#endif
 	return 0;
 }
 

commit 168e07b7d16ecbfcb7386c3ebb7c3f3f48789e73
Author: Gaoyang Ye <gaoyang.ye@rock-chips.com>
Date:   Fri Oct 12 14:36:37 2018 +0800

    video/drm: logo: fix show 8bit bmp logo failed
    
    Remark: 3996562  (Add: Allow logo in 16bit or 32bit color BMP)
    
    Change-Id: Ie5b1ed4af1c09ad0af3101b882278ecf3b8c6b35
    Signed-off-by: Gaoyang Ye <gaoyang.ye@rock-chips.com>
    (cherry picked from commit 78d830ca5bf0a0b904748403c801d5fa3a8ddc8f)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index 523506f278..ca4d92b4e7 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,14 +163,13 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
-	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -185,11 +184,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0)
+	if (height < 0) {
 		height = 0 - height;
-	else
-		flip = true;
-
+		flip = false;
+	}
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 5e125004d2..0a875f829d 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d8799ae909..69aa6b94c6 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,6 +166,11 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
+static bool bmp_can_disp_direct(struct logo_info *logo)
+{
+	return logo->bpp == 24 || logo->bpp == 32;
+}
+
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -179,21 +184,23 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-	if (state->crtc_state.crtc->data) {
-		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+
+	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+	if (vop_data) {
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
+
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (vop_data->version >= VOP_VERSION(3, 0)) {
-			printf("Support mirror mode.\n");
+		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
+			printf("support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("Not support mirror mode.\n");
+			printf("not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -965,12 +972,14 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
+
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
 	crtc_state->src_h = logo->height;
 	crtc_state->src_x = 0;
 	crtc_state->src_y = 0;
+	crtc_state->rb_swap = logo->rb_swap;
 	crtc_state->ymirror = logo->ymirror;
 
 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
@@ -1123,6 +1132,8 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
+	bool bmp_disp_direct = false;
+	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1167,22 +1178,24 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-
-	if (!vop_support_ymirror(logo)) {
+	vop_supp_ymirror = vop_support_ymirror(logo);
+	bmp_disp_direct = bmp_can_disp_direct(logo);
+	if (!vop_supp_ymirror || !bmp_disp_direct) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
+		logo->rb_swap = (logo->bpp == 8 ? true : false);
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
-
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp)) {
+		if (bmpdecoder(pdst, dst, logo->bpp,
+			       !vop_supp_ymirror)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1190,12 +1203,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
-
 		logo->offset = 0;
-		logo->ymirror = 0;
+		logo->ymirror = vop_supp_ymirror;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->ymirror = 1;
+		logo->rb_swap = (logo->bpp != 32 ? true : false);
+		logo->ymirror = true;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d30eb50c4b..0173face1a 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -130,6 +130,7 @@ struct connector_state {
 struct logo_info {
 	int mode;
 	char *mem;
+	bool rb_swap;
 	bool ymirror;
 	u32 offset;
 	u32 width;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b0fa315537..01986844b1 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
+	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit c37ac07049f31afa1f08f9c5a6a542a38d0c9f4b
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Wed Oct 31 08:25:45 2018 +0800

    Revert "FROMRKLIST: video/drm: logo: fix show 8bit bmp logo failed"
    
    This reverts commit 4913f90f7e8c2b0cfccf8400092730434e5859ff.

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index ca4d92b4e7..523506f278 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,13 +163,14 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
+	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -184,10 +185,11 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0) {
+	if (height < 0)
 		height = 0 - height;
-		flip = false;
-	}
+	else
+		flip = true;
+
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 0a875f829d..5e125004d2 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 1873819c74..d8799ae909 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,11 +166,6 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool bmp_can_disp_direct(struct logo_info *logo)
-{
-	return logo->bpp == 24 || logo->bpp == 32;
-}
-
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -184,23 +179,21 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-
-	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
-	if (vop_data) {
+	if (state->crtc_state.crtc->data) {
+		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
-
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
-			printf("support mirror mode.\n");
+		if (vop_data->version >= VOP_VERSION(3, 0)) {
+			printf("Support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("not support mirror mode.\n");
+			printf("Not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -1127,12 +1120,9 @@ static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-	struct display_state *state;
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
-	bool bmp_disp_direct = false;
-	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1161,12 +1151,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
 
-	if (logo->bpp == 8) {
-		state = container_of(logo, struct display_state, logo);
-		if (state->crtc_state.crtc)
-			state->crtc_state.rb_swap = true;
-	}
-
 	size = get_unaligned_le32(&header->file_size);
 	if (size > MEMORY_POOL_SIZE) {
 		printf("failed to use boot buf as temp bmp buffer\n");
@@ -1183,23 +1167,22 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-	vop_supp_ymirror = vop_support_ymirror(logo);
-	bmp_disp_direct = bmp_can_disp_direct(logo);
-	if (!vop_supp_ymirror || !bmp_disp_direct) {
+
+	if (!vop_support_ymirror(logo)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
+
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp,
-			       !vop_supp_ymirror)) {
+		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1207,11 +1190,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
+
 		logo->offset = 0;
-		logo->ymirror = vop_supp_ymirror;
+		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->ymirror = true;
+		logo->ymirror = 1;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 01986844b1..b0fa315537 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
+	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit 61c13b299ee40281878bfe1af05e306096cf6659
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Wed Sep 12 14:33:32 2018 +0800

    rockchip: dts: rk312x: correct pwm2 pin mux
    
    rk312x pwm2 pin mux should be gpio0_d4.
    
    Change-Id: I9a4dcf30bd987701ff17ed7cbc828848327a41e9
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e0b43c1b03..9bac7e40d8 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -904,7 +904,7 @@
 
 		pwm2 {
 			pwm2_pin: pwm2-pin {
-				rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD4 1 &pcfg_pull_none>;
 			};
 		};
 

commit 099b8ebcd186f9d17df7073f9cd2f3162e747269
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Oct 26 15:56:34 2018 +0800

    lib: optee_client: fix bug for security partition not find
    
    bug make error R&W when security partition is not defined
    
    Change-Id: Iddf840d3f9c090292e58f73492c20f84e4b3b4ea
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index c0f331dbd4..37f881b815 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -159,20 +159,21 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dread fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
@@ -183,20 +184,21 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
 		printf("blk_dwrite fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 static int rkss_read_patition_tables(unsigned char *data)
@@ -207,20 +209,21 @@ static int rkss_read_patition_tables(unsigned char *data)
 		dev_desc = rockchip_get_bootdev();
 		if (!dev_desc) {
 			printf("%s: Could not find device\n", __func__);
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
-			return TEEC_ERROR_GENERIC;
+			return -1;
 		}
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
 		printf("blk_dread fail \n");
-		return TEEC_ERROR_GENERIC;
+		return -1;
 	}
-	return TEEC_SUCCESS;
+	return 0;
 }
 
 #ifdef DEBUG_RKFSS
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 179c8c71c9..73b839db8a 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -175,6 +175,7 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}
@@ -204,6 +205,7 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}
@@ -233,6 +235,7 @@ static int rkss_read_patition_tables(unsigned char *data)
 		}
 
 		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			dev_desc = NULL;
 			printf("Could not find security partition\n");
 			return -1;
 		}

commit 5a616fcf52f0aaa308004becb01428fb3d57dd11
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 29 11:04:35 2018 +0800

    clk: rockchip: rk3288: support aclk_vop freq setting
    
    Change-Id: Ifb595f244608378bff1e6443dfc017418f28ce2a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 568a119bf4..846a34e6a0 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -155,6 +155,21 @@ enum {
 	DCLK_VOP1_SELECT_NPLL	= 2,
 };
 
+/* CRU_CLKSEL31_CON */
+enum {
+	ACLK_VOP_SELECT_CPLL	= 0,
+	ACLK_VOP_SELECT_GPLL	= 1,
+	ACLK_VOP_SELECT_USB480	= 2,
+	ACLK_VOP1_PLL_SHIFT	= 14,
+	ACLK_VOP1_PLL_MASK	= 3 << ACLK_VOP1_PLL_SHIFT,
+	ACLK_VOP1_DIV_SHIFT	= 8,
+	ACLK_VOP1_DIV_MASK	= 0x1f << ACLK_VOP1_DIV_SHIFT,
+	ACLK_VOP0_PLL_SHIFT	= 6,
+	ACLK_VOP0_PLL_MASK	= 3 << ACLK_VOP0_PLL_SHIFT,
+	ACLK_VOP0_DIV_SHIFT	= 0,
+	ACLK_VOP0_DIV_MASK	= 0x1f << ACLK_VOP0_DIV_SHIFT,
+};
+
 /* CRU_CLKSEL37_CON */
 enum {
 	PCLK_CORE_DBG_DIV_SHIFT	= 9,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 0c6a4651c2..941b619454 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -379,7 +379,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 	struct pll_div cpll_config = {0};
 	u32 lcdc_div, parent;
 	int ret;
-	unsigned int gpll_rate, npll_rate;
+	unsigned int gpll_rate, npll_rate, cpll_rate;
 
 	gpll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
 	npll_rate = rkclk_pll_get_rate(cru, CLK_NEW);
@@ -387,7 +387,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 	/* vop dclk source clk: cpll,dclk_div: 1 */
 	switch (periph) {
 	case DCLK_VOP0:
-		ret = (readl(&cru->cru_clksel_con[27]) && DCLK_VOP0_PLL_MASK) >>
+		ret = (readl(&cru->cru_clksel_con[27]) & DCLK_VOP0_PLL_MASK) >>
 		      DCLK_VOP0_PLL_SHIFT;
 		if (ret == DCLK_VOP0_SELECT_CPLL) {
 			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
@@ -424,7 +424,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			     (parent << DCLK_VOP0_PLL_SHIFT));
 		break;
 	case DCLK_VOP1:
-		ret = (readl(&cru->cru_clksel_con[29]) && DCLK_VOP1_PLL_MASK) >>
+		ret = (readl(&cru->cru_clksel_con[29]) & DCLK_VOP1_PLL_MASK) >>
 		      DCLK_VOP1_PLL_SHIFT;
 		if (ret == DCLK_VOP1_SELECT_CPLL) {
 			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
@@ -461,6 +461,22 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			     ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) |
 			     (parent << DCLK_VOP1_PLL_SHIFT));
 		break;
+	case ACLK_VOP0:
+		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
+		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     ACLK_VOP0_PLL_MASK | ACLK_VOP0_DIV_MASK,
+			     ACLK_VOP_SELECT_CPLL << ACLK_VOP0_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VOP0_DIV_SHIFT);
+		break;
+	case ACLK_VOP1:
+		cpll_rate = rkclk_pll_get_rate(cru, CLK_CODEC);
+		lcdc_div = DIV_ROUND_UP(cpll_rate, rate_hz);
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     ACLK_VOP1_PLL_MASK | ACLK_VOP1_DIV_MASK,
+			     ACLK_VOP_SELECT_CPLL << ACLK_VOP1_PLL_SHIFT |
+			     (lcdc_div - 1) << ACLK_VOP1_DIV_SHIFT);
+		break;
 	}
 
 	return 0;
@@ -865,6 +881,8 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case DCLK_VOP0:
 	case DCLK_VOP1:
+	case ACLK_VOP0:
+	case ACLK_VOP1:
 		new_rate = rockchip_vop_set_clk(cru, priv->grf, clk->id, rate);
 		break;
 	case SCLK_EDP_24M:
@@ -877,29 +895,6 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		rk_clrreg(&cru->cru_clksel_con[6], 1 << 15);
 		new_rate = rate;
 		break;
-	case ACLK_VOP0:
-	case ACLK_VOP1: {
-		u32 div;
-
-		/* vop aclk source clk: cpll */
-		div = CPLL_HZ / rate;
-		assert((div - 1 < 64) && (div * rate == CPLL_HZ));
-
-		switch (clk->id) {
-		case ACLK_VOP0:
-			rk_clrsetreg(&cru->cru_clksel_con[31],
-				     3 << 6 | 0x1f << 0,
-				     0 << 6 | (div - 1) << 0);
-			break;
-		case ACLK_VOP1:
-			rk_clrsetreg(&cru->cru_clksel_con[31],
-				     3 << 14 | 0x1f << 8,
-				     0 << 14 | (div - 1) << 8);
-			break;
-		}
-		new_rate = rate;
-		break;
-	}
 	case PCLK_HDMI_CTRL:
 		/* enable pclk hdmi ctrl */
 		rk_clrreg(&cru->cru_clkgate_con[16], 1 << 9);

commit 78d830ca5bf0a0b904748403c801d5fa3a8ddc8f
Author: Gaoyang Ye <gaoyang.ye@rock-chips.com>
Date:   Fri Oct 12 14:36:37 2018 +0800

    video/drm: logo: fix show 8bit bmp logo failed
    
    Remark: 3996562  (Add: Allow logo in 16bit or 32bit color BMP)
    
    Change-Id: Ie5b1ed4af1c09ad0af3101b882278ecf3b8c6b35
    Signed-off-by: Gaoyang Ye <gaoyang.ye@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index 523506f278..ca4d92b4e7 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,14 +163,13 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
-	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -185,11 +184,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0)
+	if (height < 0) {
 		height = 0 - height;
-	else
-		flip = true;
-
+		flip = false;
+	}
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 5e125004d2..0a875f829d 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d8799ae909..69aa6b94c6 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,6 +166,11 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
+static bool bmp_can_disp_direct(struct logo_info *logo)
+{
+	return logo->bpp == 24 || logo->bpp == 32;
+}
+
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -179,21 +184,23 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-	if (state->crtc_state.crtc->data) {
-		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+
+	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+	if (vop_data) {
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
+
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (vop_data->version >= VOP_VERSION(3, 0)) {
-			printf("Support mirror mode.\n");
+		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
+			printf("support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("Not support mirror mode.\n");
+			printf("not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -965,12 +972,14 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
+
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
 	crtc_state->src_h = logo->height;
 	crtc_state->src_x = 0;
 	crtc_state->src_y = 0;
+	crtc_state->rb_swap = logo->rb_swap;
 	crtc_state->ymirror = logo->ymirror;
 
 	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
@@ -1123,6 +1132,8 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
+	bool bmp_disp_direct = false;
+	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1167,22 +1178,24 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-
-	if (!vop_support_ymirror(logo)) {
+	vop_supp_ymirror = vop_support_ymirror(logo);
+	bmp_disp_direct = bmp_can_disp_direct(logo);
+	if (!vop_supp_ymirror || !bmp_disp_direct) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
+		logo->rb_swap = (logo->bpp == 8 ? true : false);
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
-
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp)) {
+		if (bmpdecoder(pdst, dst, logo->bpp,
+			       !vop_supp_ymirror)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1190,12 +1203,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
-
 		logo->offset = 0;
-		logo->ymirror = 0;
+		logo->ymirror = vop_supp_ymirror;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->ymirror = 1;
+		logo->rb_swap = (logo->bpp != 32 ? true : false);
+		logo->ymirror = true;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d30eb50c4b..0173face1a 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -130,6 +130,7 @@ struct connector_state {
 struct logo_info {
 	int mode;
 	char *mem;
+	bool rb_swap;
 	bool ymirror;
 	u32 offset;
 	u32 width;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b0fa315537..01986844b1 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
+	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit 4171cf46e3d13ab294cdafc102c9f5ab0ee2ad86
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Oct 29 15:29:36 2018 +0800

    android: fix error when the vbmeta is NULL or verification error
    
    If the vbmeta has no data or verify errors occur, the system get abort:
    "Synchronous Abort" handler, esr 0x96000010
    * Relocate offset = 000000003db40000
    * ELR(PC)    =   0000000000220d2c
    * LR         =   0000000000220d08
    * SP         =   0000000031d35040
    
    Change-Id: I452e9b109ef5f61dfc338ff5bfb72a687a2b0003
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index c24f9e8b85..367a258d52 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -436,6 +436,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	AvbABData ab_data, ab_data_orig;
 	size_t slot_index_to_boot = 0;
 	char verify_state[38] = {0};
+	char can_boot = 1;
 
 	requested_partitions[0] = boot_partname;
 	ops = avb_ops_user_new();
@@ -502,6 +503,11 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		break;
 	}
 
+	if (!slot_data[0]) {
+		can_boot = 0;
+		goto out;
+	}
+
 	if (verify_result == AVB_SLOT_VERIFY_RESULT_OK ||
 	    verify_result == AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED ||
 	    (unlocked & LOCK_MASK)) {
@@ -546,6 +552,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
 
+out:
 	env_update("bootargs", verify_state);
 	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
 		printf("Can not save metadata\n");
@@ -555,7 +562,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	if (slot_data[0] != NULL)
 		avb_slot_verify_data_free(slot_data[0]);
 
-	if (unlocked & LOCK_MASK)
+	if ((unlocked & LOCK_MASK) && can_boot)
 		return 0;
 	else
 		return verify_result;

commit 85d3ee272e7a973292dfa42802d779d11d0a74d1
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Oct 22 14:59:46 2018 +0800

    FROMRKLIST: configs: rk3328_common: Increase the size of malloc to 128MB.
    
    If vbmeta does not have signature information, avb will load all
    data in the vbmeta partition, which requires more malloc size.
    
    Change-Id: I8f03ec149a5b516d5dfa2b7906a54260c4e2e149
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 579110c839cee26b6d2f008fd38663f582a7b65b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index d9f06f52dd..a5be7c3bde 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 15d93d90f0c20734bed343035e8ed2abeeb85a67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 26 10:39:11 2018 +0800

    FROMRKLIST: configs: rk3328: remove unused modules to reduce size
    
    Change-Id: If4584ae2f608d482b07e2179056fbe1b7c7be596
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    (cherry picked from commit 4754a7bcd8bb3eb451f26d7a87243a97e471996a)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index d016dc85f3..7b5c6f2c7e 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -31,17 +31,30 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=32
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
@@ -62,15 +75,10 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
-CONFIG_GPIO_KEY=y
-CONFIG_RK_KEY=y
 CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
@@ -92,14 +100,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
@@ -116,9 +116,11 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
+# CONFIG_IRQ is not set
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit ba45c41f6b58e691292756b3666d6186ecb412fb
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:46:08 2018 +0800

    FROMRKLIST: configs: rk3328_defconfig: enable avb
    
    Change-Id: I1eb26f5f643e6ce5898e17a6a18ca6c37579e7c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 8e4256ae8b879a2d36bd882e9382fd166981df3b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 190b2dd904..d016dc85f3 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -21,6 +21,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
@@ -118,4 +119,11 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit 451d686fc22be3b7406acf5941038d32e3c90ec6
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 17:10:42 2018 +0800

    FROMRKLIST: configs: rk3328_common: enable CONFIG_SUPPORT_EMMC_RPMB
    
    Change-Id: I3c1989db974be233395080a777fc7d5cd554d70e
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit bfaaf2432cd2249e2aafadf2f2b2d4d2ad453c55)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 362e3843dd..d9f06f52dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -28,6 +28,8 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320C
 
 /* MMC/SD IP block */

commit 20142d6d6f14004fddde2d86643b238b625a6c85
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:44:28 2018 +0800

    FROMRKLIST: configs: rk3328_defconfig: update with save defconfig
    
    Change-Id: I58b2f69e7237126ad87c15da3b23817159abd471
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit d328621e14331777c775421a5c480ee0584d679f)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 82324f27f7..190b2dd904 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -110,10 +110,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 4913f90f7e8c2b0cfccf8400092730434e5859ff
Author: Gaoyang Ye <gaoyang.ye@rock-chips.com>
Date:   Fri Oct 12 14:36:37 2018 +0800

    FROMRKLIST: video/drm: logo: fix show 8bit bmp logo failed
    
    Remark: 3996562  (Add: Allow logo in 16bit or 32bit color BMP)
    
    Change-Id: Ie5b1ed4af1c09ad0af3101b882278ecf3b8c6b35
    Signed-off-by: Gaoyang Ye <gaoyang.ye@rock-chips.com>
    (cherry picked from commit eacd1bab93d7250ed6e2b43d2f741e4f776bcad2)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index 523506f278..ca4d92b4e7 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,14 +163,13 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
-	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -185,11 +184,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0)
+	if (height < 0) {
 		height = 0 - height;
-	else
-		flip = true;
-
+		flip = false;
+	}
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 5e125004d2..0a875f829d 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d8799ae909..1873819c74 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,6 +166,11 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
+static bool bmp_can_disp_direct(struct logo_info *logo)
+{
+	return logo->bpp == 24 || logo->bpp == 32;
+}
+
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -179,21 +184,23 @@ static bool vop_support_ymirror(struct logo_info *logo)
 
 	ret = false;
 	state = container_of(logo, struct display_state, logo);
-	if (state->crtc_state.crtc->data) {
-		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+
+	vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+	if (vop_data) {
 		printf("VOP hardware version v%d.%d, ",
 		       VOP_MAJOR(vop_data->version),
 		       VOP_MINOR(vop_data->version));
+
 		/*
 		 * if the version of VOP is higher than v3.0,
 		 * which means that the VOP support ymirror,
 		 * so it isn't need to mirror image by ourself.
 		 */
-		if (vop_data->version >= VOP_VERSION(3, 0)) {
-			printf("Support mirror mode.\n");
+		if (VOP_WIN_SUPPORT(vop_data, vop_data->win, ymirror)) {
+			printf("support mirror mode.\n");
 			ret = true;
 		} else {
-			printf("Not support mirror mode.\n");
+			printf("not support mirror mode.\n");
 		}
 	} else {
 		printf("Error: CRTC drivers is not ready.\n");
@@ -1120,9 +1127,12 @@ static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	struct display_state *state;
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
+	bool bmp_disp_direct = false;
+	bool vop_supp_ymirror = false;
 	int size, len;
 	int ret = 0;
 
@@ -1151,6 +1161,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
 
+	if (logo->bpp == 8) {
+		state = container_of(logo, struct display_state, logo);
+		if (state->crtc_state.crtc)
+			state->crtc_state.rb_swap = true;
+	}
+
 	size = get_unaligned_le32(&header->file_size);
 	if (size > MEMORY_POOL_SIZE) {
 		printf("failed to use boot buf as temp bmp buffer\n");
@@ -1167,22 +1183,23 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-
-	if (!vop_support_ymirror(logo)) {
+	vop_supp_ymirror = vop_support_ymirror(logo);
+	bmp_disp_direct = bmp_can_disp_direct(logo);
+	if (!vop_supp_ymirror || !bmp_disp_direct) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
-
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp)) {
+		if (bmpdecoder(pdst, dst, logo->bpp,
+			       !vop_supp_ymirror)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1190,12 +1207,11 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
-
 		logo->offset = 0;
-		logo->ymirror = 0;
+		logo->ymirror = vop_supp_ymirror;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
-		logo->ymirror = 1;
+		logo->ymirror = true;
 	}
 	logo->mem = dst;
 
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b0fa315537..01986844b1 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -72,7 +72,7 @@ static const struct vop_win rk3288_win01_data = {
 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
-	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
+	.ymirror = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 23, 3, 1, -1),
 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

commit bc5a0d1bf27c4f025aa19aca55a622d6f4e1f29f
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Sep 6 17:35:16 2018 +0800

    FROMRKLIST: common: boot_rkimg: Change storagemedia to androidboot.storagemedia
    
    androidboot.storagemedia=xxx is a kernel cmdline config which
    is passed to android init process. The init process parses
    this config and sets the properties ro.boot.storagemedia to xxx.
    
    Change-Id: I5c8b442b02df068a0ab98ccc81a4f008ebe540c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 27be6a5d17bd63115d6802c27b6602d5b111f24b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 5b4ab088e3..00ca62e181 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -195,10 +195,10 @@ int get_bootdev_type(void)
 		    (type == IF_TYPE_SPINAND) ||
 		    (type == IF_TYPE_SPINOR))
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s", boot_media);
+				 "androidboot.storagemedia=%s", boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s androidboot.mode=normal",
+				 "androidboot.storagemedia=%s androidboot.mode=normal",
 				 boot_media);
 		env_update("bootargs", boot_options);
 	}

commit d2d76a0905a77cd9f4caa67b3065e71e2ffffeb2
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Sep 6 16:19:43 2018 +0800

    FROMRKLIST: common: boot_rkimg: Fix the value of androidboot.mode error
    
    Typically, it seems that androidboot.mode can take up one of the
    following values: "normal" "charger". Other valuses affect services.
    
    Change-Id: I96debdcfc3d1267c8e1f8713b0c76d965b0d83f1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 1907204af0c3df97dd11616480c41debbdb6fe9b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index c5f421480b..5b4ab088e3 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -198,8 +198,8 @@ int get_bootdev_type(void)
 				 "storagemedia=%s", boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s androidboot.mode=%s",
-				 boot_media, boot_media);
+				 "storagemedia=%s androidboot.mode=normal",
+				 boot_media);
 		env_update("bootargs", boot_options);
 	}
 

commit 9c2dc280aaca453ae3b4a8e738fa8e39fdc66a25
Merge: 29a34e74ca b7ecfec62c
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:58:00 2018 +0800

    Merge branch 'next-dev' into stable-4.4-rk3328-box-9.0

commit 29a34e74ca325d0819d5572355943026c9f82a6e
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:57:00 2018 +0800

    Revert "FROMRKLIST: common: boot_rkimg: Fix the value of androidboot.mode error"
    
    This reverts commit d39bdb4aa277855c39d4588b84f5dd483872729c.

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 5b4ab088e3..c5f421480b 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -198,8 +198,8 @@ int get_bootdev_type(void)
 				 "storagemedia=%s", boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s androidboot.mode=normal",
-				 boot_media);
+				 "storagemedia=%s androidboot.mode=%s",
+				 boot_media, boot_media);
 		env_update("bootargs", boot_options);
 	}
 

commit 1de1a94a9cf9c04e93895c71482a04197983e7dc
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:56:50 2018 +0800

    Revert "FROMRKLIST: common: boot_rkimg: Change storagemedia to androidboot.storagemedia"
    
    This reverts commit a39c6751df7f0df918c55eb5fefd50d6a916f040.

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 00ca62e181..5b4ab088e3 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -195,10 +195,10 @@ int get_bootdev_type(void)
 		    (type == IF_TYPE_SPINAND) ||
 		    (type == IF_TYPE_SPINOR))
 			snprintf(boot_options, sizeof(boot_options),
-				 "androidboot.storagemedia=%s", boot_media);
+				 "storagemedia=%s", boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "androidboot.storagemedia=%s androidboot.mode=normal",
+				 "storagemedia=%s androidboot.mode=normal",
 				 boot_media);
 		env_update("bootargs", boot_options);
 	}

commit 693ebc8e2807ea921c6358ab17b7b3de772aca36
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:56:40 2018 +0800

    Revert "FROMRKLIST: video/drm: logo: fix show 8bit bmp logo failed"
    
    This reverts commit eec41c0fdaca1fe5f753ff7ae1d1c7154de86ea1.

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index ca4d92b4e7..523506f278 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,13 +163,14 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
+	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -184,10 +185,11 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0) {
+	if (height < 0)
 		height = 0 - height;
-		flip = false;
-	}
+	else
+		flip = true;
+
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 0a875f829d..5e125004d2 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 0056cb3e48..d8799ae909 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,11 +166,6 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool can_direct_logo(int bpp)
-{
-	return bpp == 24 || bpp == 32;
-}
-
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -1125,7 +1120,6 @@ static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
-	struct display_state *state;
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
@@ -1157,12 +1151,6 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
 
-	if (logo->bpp == 8) {
-		state = container_of(logo, struct display_state, logo);
-		if (state->crtc_state.crtc)
-			state->crtc_state.rb_swap = true;
-	}
-
 	size = get_unaligned_le32(&header->file_size);
 	if (size > MEMORY_POOL_SIZE) {
 		printf("failed to use boot buf as temp bmp buffer\n");
@@ -1179,21 +1167,22 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-	if (!vop_support_ymirror(logo) || !can_direct_logo(logo->bpp)) {
+
+	if (!vop_support_ymirror(logo)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
+
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp,
-			       !vop_support_ymirror(logo))) {
+		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1201,8 +1190,9 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
+
 		logo->offset = 0;
-		logo->ymirror = vop_support_ymirror(logo);
+		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
 		logo->ymirror = 1;

commit 1c03b1f4417e786218bc744ed935276d55511f37
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:56:28 2018 +0800

    Revert "FROMRKLIST: configs: rk3328_defconfig: update with save defconfig"
    
    This reverts commit abf4085df4b748ded2d41f338a8b520b3cae4a4a.

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 190b2dd904..82324f27f7 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -110,10 +110,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit b7baeb08592e4190a62e6a2e03ac7422afa83aff
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:56:17 2018 +0800

    Revert "FROMRKLIST: configs: rk3328_common: enable CONFIG_SUPPORT_EMMC_RPMB"
    
    This reverts commit 6bb4810fa2cb10e14783442de33b6bc2ccf5f4b3.

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index d9f06f52dd..362e3843dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -28,8 +28,6 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320C
 
 /* MMC/SD IP block */

commit ba2d57331c8bd0c0280ba7fe887551d44013c872
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:56:06 2018 +0800

    Revert "FROMRKLIST: configs: rk3328_defconfig: enable avb"
    
    This reverts commit 1f683880a013bc12e588affaba7db65657a6f75a.

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 9dd8deb9d0..190b2dd904 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -21,7 +21,6 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_ANDROID_AVB=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
@@ -119,12 +118,4 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-CONFIG_AVB_LIBAVB=y
-CONFIG_AVB_LIBAVB_AB=y
-CONFIG_AVB_LIBAVB_ATX=y
-CONFIG_AVB_LIBAVB_USER=y
-CONFIG_RK_AVB_LIBAVB_USER=y
-CONFIG_OPTEE_CLIENT=y
-CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit ff6e7ac1248bba1527815524a34b58f5dd870c1a
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:55:52 2018 +0800

    Revert "FROMRKLIST: configs: rk3328_common: Increase the size of malloc to 128MB."
    
    This reverts commit 7be0a0946a5845c46a512d7bdcfde20abc472b96.

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index a5be7c3bde..d9f06f52dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 5c5b6d925d46e2fdc3b5ac4e0468f103b64f26a0
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:55:42 2018 +0800

    Revert "FROMRKLIST: WORKAROUND: make.sh: rk3328: Config PLATFORM_UBOOT_IMG_SIZE to 2MB"
    
    This reverts commit 15f46195b20e8fa7138032b25a237b279035c6e4.

diff --git a/make.sh b/make.sh
index df312fd473..4be5eff987 100755
--- a/make.sh
+++ b/make.sh
@@ -441,8 +441,6 @@ fixup_platform_configure()
 			PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
 			PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 		fi
-	elif [ $RKCHIP = "RK3328" ]; then
-		PLATFORM_UBOOT_IMG_SIZE="--size 2048 2"
 	fi
 
 # <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms

commit 2d20e80b76521d2f8780f6ba7154417103725bad
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:55:32 2018 +0800

    Revert "FROMRKLIST: WORKAROUND: configs: rk3328: cut down unused modules"
    
    This reverts commit 601488408b051cdcc5ace0c20c8b69b35e43b523.

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 98a39e6273..9dd8deb9d0 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -13,7 +13,6 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_DEBUG_UART=y
-# CONFIG_DISTRO_DEFAULTS is not set
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -29,39 +28,27 @@ CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_HUSH_PARSER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_LZMADEC is not set
-# CONFIG_CMD_UNZIP is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-# CONFIG_DOS_PARTITION is not set
+CONFIG_CMD_TIME=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
@@ -81,8 +68,9 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
@@ -129,10 +117,7 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
-CONFIG_REGEX=y
-CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
-CONFIG_LZMA=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
@@ -142,3 +127,4 @@ CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit d09c2e6f487dbfdfb39fbc9af6ba9dc72ba14a4f
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 26 13:55:02 2018 +0800

    Revert "FROMRKLOCAL: WORKAROUND: configs: rk3328: Disable CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION"
    
    This reverts commit 8a670c00b6f36eea570905f5bf726abab0ee9ec7.

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 65eed345e3..98a39e6273 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -141,3 +141,4 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit b7ecfec62c4ce14e2764792ddd51bcda0fed9741
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 25 15:53:00 2018 +0800

    rockchip: update kernel default load address
    
    The 32bit arm kernel load address should be end with 0x8000 for
    non-compress Image.
    The compress zImage is fine for different address because the
    decomporess program will copy the Image to address end with 0x8000.
    
    Change-Id: I26fc58f06324fd93dbaeeb39a0b81c81fde0fef5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 7ef5972e24..fd7fce2c80 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -56,7 +56,7 @@
 	"scriptaddr=0x60500000\0" \
 	"pxefile_addr_r=0x60600000\0" \
 	"fdt_addr_r=0x61f00000\0" \
-	"kernel_addr_r=0x62000000\0" \
+	"kernel_addr_r=0x62008000\0" \
 	"ramdisk_addr_r=0x64000000\0"
 
 #include <config_distro_bootcmd.h>
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index f30ed6e753..947bb176e2 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -45,7 +45,7 @@
 	"scriptaddr=0x60000000\0" \
 	"pxefile_addr_r=0x60100000\0" \
 	"fdt_addr_r=0x61f00000\0" \
-	"kernel_addr_r=0x62000000\0" \
+	"kernel_addr_r=0x62008000\0" \
 	"ramdisk_addr_r=0x64000000\0"
 
 #include <config_distro_bootcmd.h>
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 0685002b05..8faf67d8ee 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -73,7 +73,7 @@
 	"scriptaddr=0x00000000\0" \
 	"pxefile_addr_r=0x00100000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02000000\0" \
+	"kernel_addr_r=0x02008000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 
 #include <config_distro_bootcmd.h>

commit 4711f91491300727937a3a02df8b6ad0bc24c3eb
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Wed Oct 24 17:04:12 2018 +0800

    lib: optee_client: Reduce keymaster ta size
    
    Change-Id: I2a82e33f92123ba29e6fb456b4e6b35312620e64
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 53809c04ff..a18356d16a 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index dfdefc81d8..66daec857b 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ

commit 6259b22e60ef6869825b19214eba043d34d093c8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 25 10:39:04 2018 +0800

    clk: rockchip: rk1808: add pll 100M config parameters
    
    PPLL 100M use refdiv =1 fbdiv = 150, postdiv1= 6,
    postdiv2=6, vco= 3.6G, is best for pcie.
    
    Change-Id: Ie9fddbb32baa0d4b8883b399b0e903b83afc820f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 260b4224be..4eddd0aaa9 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -42,6 +42,7 @@ static struct rockchip_pll_rate_table rk1808_pll_rates[] = {
 	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
 	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
 	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
+	RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
 	{ /* sentinel */ },
 };
 

commit 93c44d3481025e0a013d24b16c2e063dc867b1f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 25 11:39:45 2018 +0800

    configs: rk322x-gva/evb: increase CONFIG_SYS_MALLOC_F_LEN to 0x1000
    
    fix out of memory when bind pre-reloc drivers
    
    Change-Id: I7aecb52b117612ba31f58af7764928b2791c1402
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 32502c215f..49cdf3bb40 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index f438447f61..e2230b5322 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081004

commit a88d9d29380613d2aa323966b43c6da7f2ec9207
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 25 11:39:16 2018 +0800

    configs: rk3128x: increase CONFIG_SYS_MALLOC_F_LEN to 0x1000
    
    fix out of memory when bind pre-reloc drivers
    
    Change-Id: I8c936e45db0e813966eb09a0d39685a11d0ef597
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 665f8a226d..965309bf4f 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672

commit 5553e43343078d41d58b8a12d15741f2336a00fb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 18:11:58 2018 +0800

    configs: rk322x: increase CONFIG_SYS_MALLOC_F_LEN to 0x1000
    
    fix out of memory when bind pre-reloc drivers
    
    Change-Id: I1e0826b026d15ebf5f410cab19652c3a040a1805
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index bd8b4daf4f..728458d59a 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000

commit 2dd69d6619d0e0e038e5b570d64ede5bb231688b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 18:14:10 2018 +0800

    rockchip: dts: px30/rk3326: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Ia197686bef465b3c49c2be6ed7486ec9d672155e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 9eaa7d88e7..83e93d015a 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -13,16 +13,6 @@
 	model = "Rockchip PX30 EVB";
 	compatible = "rockchip,px30-evb", "rockchip,px30";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	dmc: dmc@20004000 {
-		u-boot,dm-pre-reloc;
-		compatible = "rockchip,px30-dmc", "syscon";
-		reg = <0x0 0xff2a0000 0x0 0x1000>;
-	};
-
 	adc-keys {
 		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
@@ -412,7 +402,7 @@
 	status = "okay";
 };
 
-&saradc {
+&uart2 {
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 0e294196b5..ae3e4f973a 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -9,12 +9,19 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
 };
 
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
-	status = "okay";
 };
 
 &nandc0 {
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 85c6460f60..668eb51257 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -69,6 +69,11 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	dmc: dmc {
+		compatible = "rockchip,px30-dmc", "syscon";
+		reg = <0x0 0xff2a0000 0x0 0x1000>;
+	};
+
 	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vopb_out>, <&vopl_out>;
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index fca2dac8be..6427423c0e 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -13,16 +13,6 @@
 	model = "Rockchip RK3326 EVB";
 	compatible = "rockchip,rk3326-evb", "rockchip,rk3326";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	dmc: dmc {
-		u-boot,dm-pre-reloc;
-		compatible = "rockchip,px30-dmc", "syscon";
-		reg = <0x0 0xff2a0000 0x0 0x1000>;
-	};
-
 	adc-keys {
 		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
@@ -436,3 +426,7 @@
 &u2phy_host {
 	status = "okay";
 };
+
+&uart2 {
+	status = "okay";
+};

commit a2815bda5f240d3db7fe7ca8e5f9aecc847ff97c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 18:10:12 2018 +0800

    rockchip: dts: rk322x: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: I0537f3aa0232901c3f506fa86a94bf07881bb06e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index f43fe86f6a..09665abb4c 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -7,21 +7,13 @@
 /dts-v1/;
 
 #include "rk322x.dtsi"
+#include "rk322x-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3229 Evaluation board";
 	compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	memory@60000000 {
-		device_type = "memory";
-		reg = <0x60000000 0x40000000>;
-	};
-
 	ext_gmac: ext_gmac {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;
@@ -68,7 +60,6 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -84,7 +75,6 @@
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index f6a8f97121..79770a95d9 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk322x.dtsi"
+#include "rk322x-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
@@ -288,12 +289,10 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
new file mode 100644
index 0000000000..4246af1b6c
--- /dev/null
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -0,0 +1,44 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&service_msch {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index e05835267d..f5fb16b6e1 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -91,6 +91,11 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	memory@60000000 {
+		device_type = "memory";
+		reg = <0x60000000 0x40000000>;
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		arm,cpu-registers-not-fw-configured;
@@ -166,7 +171,6 @@
 	};
 
 	grf: syscon@11000000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-grf", "syscon";
 		reg = <0x11000000 0x1000>;
 		#address-cells = <1>;
@@ -380,7 +384,6 @@
 	};
 
 	cru: clock-controller@110e0000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-cru";
 		reg = <0x110e0000 0x1000>;
 		rockchip,grf = <&grf>;
@@ -835,7 +838,6 @@
 	};
 
 	dmc: dmc@11200000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-dmc", "syscon";
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
@@ -846,7 +848,6 @@
 	};
 
 	service_msch: syscon@31090000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-msch", "syscon";
 		reg = <0x31090000 0x2000>;
 	};

commit 8a670c00b6f36eea570905f5bf726abab0ee9ec7
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 25 09:58:41 2018 +0800

    FROMRKLOCAL: WORKAROUND: configs: rk3328: Disable CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
    
    Change-Id: I4d0a27d8dd7344071a3beed837771b7f2a5f2b1f
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 98a39e6273..65eed345e3 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -141,4 +141,3 @@ CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit 99484ec71f2b633548eddf7c78d75b412c53b33d
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Oct 22 21:02:26 2018 +0800

    configs: rk3288: enable hdmi display
    
    and remove some unused config
    
    Change-Id: I01d19513037b88e2fd1467180045375934cb2ae8
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index f7522aeeaf..c0e6284571 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -81,10 +81,8 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y

commit 918c540d289c784b0cc5bb6d9232d4bbf329d2f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 17:29:39 2018 +0800

    rockchip: dts: rk3328: add adc key pre-reloc support
    
    clean up node to *-u-boot.dtsi and coding style.
    
    Change-Id: I9e7bd550cd9b86d273c7e833f751686955b98242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index aafafec649..c7256de867 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -8,13 +8,27 @@
 #include "rk3328.dtsi"
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr3-666.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3328 EVB";
 	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
 
-	chosen {
-		stdout-path = &uart2;
+	adc-keys {
+		status = "okay";
+
+		u-boot,dm-pre-reloc;
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
 	};
 
 	gmac_clkin: external-gmac-clock {
@@ -58,10 +72,6 @@
 	};
 };
 
-&saradc {
-	status = "okay";
-};
-
 &uart2 {
 	status = "okay";
 };
@@ -107,15 +117,15 @@
 };
 
 &u2phy {
-        status = "okay";
+	status = "okay";
 };
 
 &u2phy_otg {
-        status = "okay";
+	status = "okay";
 };
 
 &u2phy_host {
-        status = "okay";
+	status = "okay";
 };
 
 &usb_host0_ehci {
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 2a92490190..7a07362a95 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -9,6 +9,11 @@
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
 };
 
 &cru {
@@ -35,6 +40,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb20_otg {
 	u-boot,dm-pre-reloc;
 };

commit bcf84996f0eb29eedad33b308776f7c95380e9b0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 21:39:34 2018 +0800

    rockchip: rk3308: fix adc key read failed when kernel dtb is enabled
    
    return negative erro num makes board_r.c bootflow abort, so that
    the adc key driver can not be probe.
    
    Change-Id: I815b16427dc4bf1fdeaab3b75077ed40f5a2beab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 586c4efcf2..c864b31c2e 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -104,8 +104,8 @@ int rk_board_init(void)
 
 	ret = gpio_request(GPIO0_A4, "gpio0_a4");
 	if (ret < 0) {
-		debug("request for gpio0_a4 failed:%d\n", ret);
-		return ret;
+		printf("request for gpio0_a4 failed:%d\n", ret);
+		return 0;
 	}
 
 	gpio_direction_input(GPIO0_A4);
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
index fad6b81f37..e823a34ef1 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -12,6 +12,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define KEY_DOWN_MIN_VAL        0
 #define KEY_DOWN_MAX_VAL        30
 
+#ifndef CONFIG_USING_KERNEL_DTB
 /*
  * Two board variants whith adc channel 3 is for board id
  * v10: 1024, v11: 512
@@ -43,3 +44,4 @@ int rockchip_dnl_key_pressed(void)
 	else
 		return false;
 }
+#endif

commit bbbd2329f3b1db750ae5bff865e7921e23b8864b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 21:38:03 2018 +0800

    rockchip: dts: rk3308: support using U-Boot usb otg
    
    If kernel dtb is enabled but not load correctly, we
    could still use U-Boot usb otg to enter rockusb mode.
    
    Change-Id: If304fa157a7a720be7db054d3fab0d63e13aef9c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 7dabf27e04..4da226322c 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -64,6 +64,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+};
+
 &u2phy {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 8293adabef..d3853ef3eb 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -14,6 +14,7 @@
 	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
 
 	adc-keys0 {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 0>;
 		io-channel-names = "buttons";
@@ -21,6 +22,7 @@
 		keyup-threshold-microvolt = <1800000>;
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <18000>;
@@ -28,6 +30,7 @@
 	};
 
 	adc-keys1 {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 1>;
 		io-channel-names = "buttons";
@@ -59,6 +62,7 @@
 		};
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <18000>;

commit eeccd3064a868cef914671d809ec6c90a0de7872
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 20:36:58 2018 +0800

    rockchip: dts: rk3308: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Id20c365729ca249171b3b8d131365ed5db4fa212
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 5381939309..7dabf27e04 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -5,15 +5,18 @@
  */
 
 / {
-	dmc: dmc@20004000 {
-		u-boot,dm-pre-reloc;
-		compatible = "rockchip,rk3308-dmc";
-		reg = <0x0 0xff010000 0x0 0x10000>;
+
+	chosen {
+		stdout-path = &uart2;
 	};
 };
 
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
 &cru {
-        u-boot,dm-pre-reloc;
+	u-boot,dm-pre-reloc;
 };
 
 &emmc {
@@ -34,6 +37,11 @@
 	status = "okay";
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart0 {
 	u-boot,dm-pre-reloc;
 };
@@ -54,4 +62,23 @@
 
 &uart4 {
 	u-boot,dm-pre-reloc;
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&route_rgb {
+	status = "disabled";
 };
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 862c628fed..8293adabef 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -13,10 +13,6 @@
 	model = "Rockchip RK3308 EVB";
 	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
 
-	chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
 	adc-keys0 {
 		compatible = "adc-keys";
 		io-channels = <&saradc 0>;
@@ -290,10 +286,6 @@
 	status = "disabled";
 };
 
-&saradc {
-	status = "okay";
-};
-
 &u2phy {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 01a83c85ad..1e9ec023e6 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -84,6 +84,11 @@
 		};
 	};
 
+	dmc: dmc@20004000 {
+		compatible = "rockchip,rk3308-dmc";
+		reg = <0x0 0xff010000 0x0 0x10000>;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";

commit cc86a65c4a8f2d491615b6131ffdf57467b9de07
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 22 20:28:40 2018 +0800

    rockchip: dts: rk1808: clean up
    
    Movimg dm-pre-reloc nodes to *-u-boot.dtsi, it makes users easy
    to override their kernel dts when CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: I3305ef8ec164deb74cf8651d524c250f2575a1e7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 5129539227..728ca1c73b 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -14,18 +14,9 @@
 	model = "Rockchip RK1808 EVB";
 	compatible = "rockchip,rk1808-evb", "rockchip,rk1808";
 
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	xin24m: xin24m {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-		clock-output-names = "xin24m";
-	};
-
 	adc-keys {
+		status = "okay";
+
 		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
@@ -53,11 +44,6 @@
 	status = "okay";
 };
 
-&sdmmc {
-	supports-sd;
-	status = "disabled";
-};
-
 &uart2 {
 	clock-frequency = <24000000>;
 	status = "okay";
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index ae50dd12d2..d6bfe24d36 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -7,6 +7,8 @@
 / {
 	aliases {
 		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -16,6 +18,11 @@
 		serial6 = &uart6;
 		serial7 = &uart7;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
 };
 
 &dmc {
@@ -39,6 +46,11 @@
 	status = "okay";
 };
 
+&sdmmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &saradc {
 	u-boot,dm-pre-reloc;
 	status = "okay";

commit 48dac9b0c6212fb6c301b59b964b036f1f921d40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 30 15:38:30 2018 +0800

    rockchip: dts: rk3399: move dm-pre-reloc nodes to *-u-boot.dtsi
    
    it makes users easy to override their kernel dts when
    CONFIG_USING_KERNEL_DTB is disabled.
    
    Change-Id: Ifd6cab36dc03da767b7bb768a872e43264bed532
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 1a9e87c342..46bf2072b3 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -11,15 +11,25 @@
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
 #include "rk3399-u-boot.dtsi"
 #include <linux/media-bus-format.h>
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3399 Evaluation Board";
 	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
 		     "google,rk3399evb-rev2";
 
-	chosen {
-		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdhci, &sdmmc;
+	rk_key: rockchip-key {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,key";
+		status = "okay";
+		io-channels = <&saradc 1>;
+
+		vol-up-key {
+				u-boot,dm-pre-reloc;
+		        linux,code = <KEY_VOLUMEUP>;
+		        label = "volume up";
+		        rockchip,adc_value = <1>;
+		};
 	};
 
 	vdd_center: vdd-center {
@@ -189,6 +199,10 @@
 
 };
 
+&uart2 {
+	status = "okay";
+};
+
 &emmc_phy {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 8000614357..a67aa42fbd 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -9,12 +9,20 @@
 		mmc0 = &sdhci;
 		mmc1 = &sdmmc;
 	};
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sdhci, &sdmmc;
+	};
 };
 
 &uart2 {
 	clock-frequency = <24000000>;
 	u-boot,dm-pre-reloc;
-	status = "okay";
+};
+
+&saradc {
+	u-boot,dm-pre-reloc;
 };
 
 &sdmmc {

commit a45106b63b323a8bfd446273c8cdb2d2f9c9357c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 23 09:36:17 2018 +0800

    rockchip: atags: follow miniloader bootdev type definitions
    
    Change-Id: Id9fbb25aadc4dafe0432b38e27b219d9dfa5108f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index f7402861d0..150b171912 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -30,11 +30,13 @@
 #endif
 
 /* tag_bootdev.devtype */
-#define BOOT_TYPE_EMMC		0x0
-#define BOOT_TYPE_NAND		0x1
-#define BOOT_TYPE_SDCARD	0x2
-#define BOOT_TYPE_SPI_NOR	0x3
-#define BOOT_TYPE_SPI_NAND	0x4
+#define BOOT_TYPE_NAND		(1 << 0)
+#define BOOT_TYPE_EMMC		(1 << 1)
+#define BOOT_TYPE_SD0		(1 << 2)
+#define BOOT_TYPE_SD1		(1 << 3)
+#define BOOT_TYPE_SPI_NOR	(1 << 4)
+#define BOOT_TYPE_SPI_NAND	(1 << 5)
+#define BOOT_TYPE_RAM		(1 << 6)
 
 /* tag_serial.m_mode */
 #define SERIAL_M_MODE_M0	0x0

commit ed2a409163e58b38cd11ddb1d19d519e1a4ef7fd
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 22 18:02:22 2018 +0800

    clk: rockchip: rk3288: fix up the dclk_vop setting freq error
    
    fix the commit b328c914c:
    (clk: rockchip: rk3288: fix up the dclk_vop freq setting)
    
    Change-Id: Ic4df8bcd4410dbc0484c1ea50d73e70aa64556bb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 20b1fc82ee..0c6a4651c2 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -396,7 +396,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 
 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
 				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
-			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+			rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
 
 			/* waiting for pll lock */
 			while (1) {
@@ -433,7 +433,7 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 
 			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
 				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
-			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+			rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
 
 			/* waiting for pll lock */
 			while (1) {

commit 601488408b051cdcc5ace0c20c8b69b35e43b523
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 19 14:23:54 2018 +0800

    FROMRKLIST: WORKAROUND: configs: rk3328: cut down unused modules
    
    Change-Id: If4584ae2f608d482b07e2179056fbe1b7c7be596
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
    (cherry picked from commit 7ab90a08075641992d5ac0080b175a4d54917946)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 9dd8deb9d0..98a39e6273 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -28,27 +29,39 @@ CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_HUSH_PARSER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
-CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
@@ -68,9 +81,8 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
@@ -117,7 +129,10 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZMA=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
@@ -127,4 +142,3 @@ CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
-CONFIG_TEST_ROCKCHIP=y

commit 15f46195b20e8fa7138032b25a237b279035c6e4
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Oct 22 14:56:54 2018 +0800

    FROMRKLIST: WORKAROUND: make.sh: rk3328: Config PLATFORM_UBOOT_IMG_SIZE to 2MB
    
    Change-Id: Ic4a40c7b032f88410ec18cdab3c663b9d40a28c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit c70a7bfc846925c956620bf345cdd0532048e2a2)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/make.sh b/make.sh
index 4be5eff987..df312fd473 100755
--- a/make.sh
+++ b/make.sh
@@ -441,6 +441,8 @@ fixup_platform_configure()
 			PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
 			PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
 		fi
+	elif [ $RKCHIP = "RK3328" ]; then
+		PLATFORM_UBOOT_IMG_SIZE="--size 2048 2"
 	fi
 
 # <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms

commit 7be0a0946a5845c46a512d7bdcfde20abc472b96
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Oct 22 14:59:46 2018 +0800

    FROMRKLIST: configs: rk3328_common: Increase the size of malloc to 128MB.
    
    If vbmeta does not have signature information, avb will load all
    data in the vbmeta partition, which requires more malloc size.
    
    Change-Id: I8f03ec149a5b516d5dfa2b7906a54260c4e2e149
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 419948677e8adc10de07befca553d446655717c5)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index d9f06f52dd..a5be7c3bde 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 1f683880a013bc12e588affaba7db65657a6f75a
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:46:08 2018 +0800

    FROMRKLIST: configs: rk3328_defconfig: enable avb
    
    Change-Id: I1eb26f5f643e6ce5898e17a6a18ca6c37579e7c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 3bc2e3eeecedb6fab38feb2fc87b7a22600580a9)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 190b2dd904..9dd8deb9d0 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -21,6 +21,7 @@ CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
@@ -118,4 +119,12 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 6bb4810fa2cb10e14783442de33b6bc2ccf5f4b3
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 17:10:42 2018 +0800

    FROMRKLIST: configs: rk3328_common: enable CONFIG_SUPPORT_EMMC_RPMB
    
    Change-Id: I3c1989db974be233395080a777fc7d5cd554d70e
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit a90b74fac1ec586e86cadb00b4d714ad89c00069)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 362e3843dd..d9f06f52dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -28,6 +28,8 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320C
 
 /* MMC/SD IP block */

commit abf4085df4b748ded2d41f338a8b520b3cae4a4a
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 18 16:44:28 2018 +0800

    FROMRKLIST: configs: rk3328_defconfig: update with save defconfig
    
    Change-Id: I58b2f69e7237126ad87c15da3b23817159abd471
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit d481bb972a064238798a6a51785faa0bf3e87b4f)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 82324f27f7..190b2dd904 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -110,10 +110,10 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
-CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit fab096102c5c905a820e745efabf4667c54215e1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 11 15:57:47 2018 +0800

    clk: rockchip: rk1808: Support dclk_voplite to set any of the frequencies
    
    Change-Id: I7ac53f75244388e7fb448a721e55b6b1e789d4d7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 67f05c37c4..260b4224be 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -521,11 +521,11 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 			     DCLK_VOPRAW_SEL_MASK |
 			     DCLK_VOPRAW_PLL_SEL_MASK |
 			     DCLK_VOPRAW_DIV_CON_MASK,
-			     DCLK_VOPRAW_SEL_VOPRAW <<
-			     DCLK_VOPRAW_SEL_SHIFT |
-			     DCLK_VOPRAW_PLL_SEL_NPLL <<
-			     DCLK_VOPRAW_PLL_SEL_SHIFT |
-			     (src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT);
+			     (DCLK_VOPRAW_SEL_VOPRAW <<
+			     DCLK_VOPRAW_SEL_SHIFT) |
+			     (DCLK_VOPRAW_PLL_SEL_NPLL <<
+			     DCLK_VOPRAW_PLL_SEL_SHIFT) |
+			     ((src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT));
 		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
 				      priv->cru, NPLL, src_clk_div * hz);
 
@@ -534,15 +534,19 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 		/*
 		 * vopl dclk source from cpll, and equals to
 		 */
-		if (!(priv->npll_hz % hz)) {
-			parent = DCLK_VOPLITE_PLL_SEL_NPLL;
-			src_clk_div = do_div(priv->npll_hz, hz);
-		} else if (!(priv->cpll_hz % hz)) {
+		if (!(priv->cpll_hz % hz)) {
 			parent = DCLK_VOPLITE_PLL_SEL_CPLL;
-			src_clk_div = do_div(priv->cpll_hz, hz);
-		} else {
+			src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+		} else if (!(priv->gpll_hz % hz)) {
 			parent = DCLK_VOPLITE_PLL_SEL_GPLL;
 			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		} else {
+			parent = DCLK_VOPLITE_PLL_SEL_NPLL;
+			src_clk_div = DIV_ROUND_UP(RK1808_VOP_PLL_LIMIT_FREQ,
+						   hz);
+			rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+					      priv->cru, NPLL,
+					      src_clk_div * hz);
 		}
 		rk_clrsetreg(&cru->clksel_con[7],
 			     DCLK_VOPLITE_SEL_MASK | DCLK_VOPLITE_PLL_SEL_MASK |

commit 363be8774904c193177caf82385f045df7985986
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 19 09:47:14 2018 +0800

    make.sh: add debug subcmd to print entry warning "UUU..." in start.S
    
    Change-Id: Icac8e2479dbc11283e1e53cee430e479e401a710
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 4be5eff987..a9be77561f 100755
--- a/make.sh
+++ b/make.sh
@@ -249,6 +249,8 @@ sub_commands()
 			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
 			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
 			echo "    8. set CONFIG_BOOTDELAY=5"
+			echo "    9. armv7 start.S: print entry warning"
+			echo "   10. armv8 start.S: print entry warning"
 			echo
 			echo "Enabled: "
 			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
@@ -285,6 +287,14 @@ sub_commands()
 		elif [ "${opt}" = '8' ]; then
 			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
 			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+		elif [ "${opt}" = '9' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr r0, =CONFIG_DEBUG_UART_BASE\nmov r1, #100\nloop:\nmov r2, #0x55\nstr r2, [r0]\nsub r1, r1, #1\ncmp r1, #0\nbne loop\ndsb' \
+			./arch/arm/cpu/armv7/start.S
+			echo "DEBUG [9]: armv7 start.S entry warning 'UUUU...'"
+		elif [ "${opt}" = '10' ]; then
+			sed -i '/save_boot_params_ret:/a\ldr x0, =CONFIG_DEBUG_UART_BASE\nmov x1, #100\nloop:\nmov x2, #0x55\nstr x2, [x0]\nsub x1, x1, #1\ncmp x1, #0\nb.ne loop\ndsb sy' \
+			./arch/arm/cpu/armv8/start.S
+			echo "DEBUG [10]: armv8 start.S entry warning 'UUUU...'"
 		fi
 		echo
 		exit 0

commit 3310f2032b5bdf62e31cfee8112d1c66fab8e055
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 18 10:45:01 2018 +0800

    rockchip: dtsi: rk3308: add all serial nodes
    
    add alias and "u-boot,dm-pre-reloc;" to support
    preloader serial.
    
    Change-Id: Id563752bb07309a96a767e9ffdf957bcf7f0b008
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index f1ee370846..5381939309 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -34,8 +34,24 @@
 	status = "okay";
 };
 
+&uart0 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
 	status = "okay";
 };
+
+&uart3 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart4 {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 1502276446..01a83c85ad 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -21,6 +21,8 @@
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
 	};
 
 	cpus {
@@ -181,6 +183,28 @@
 		status = "disabled";
 	};
 
+	uart3: serial@ff0d0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0d0000 0x0 0x100>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	uart4: serial@ff0e0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0e0000 0x0 0x100>;
+		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
 	vop: vop@ff2e0000 {
 		compatible = "rockchip,rk3308-vop";
 		reg = <0x0 0xff2e0000 0x0 0x1fc>, <0x0 0xff2e0a00 0x0 0x400>;

commit 5b289214896ecfb6721623ce0f65499d72b4bc44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:38:59 2018 +0800

    rockchip: dts: rk1808: add/clean serial nodes
    
    add alias and "u-boot,dm-pre-reloc;" to support
    preloader serial.
    
    Change-Id: I70e65b59bc49e93af591ca96994b79abe5915021
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 11f750512f..5129539227 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -60,8 +60,5 @@
 
 &uart2 {
 	clock-frequency = <24000000>;
-	clocks = <&xin24m>, <&xin24m>;
-	clock-names = "baudclk", "apb_pclk";
-
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index 068f9c75c8..ae50dd12d2 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -7,6 +7,14 @@
 / {
 	aliases {
 		mmc0 = &emmc;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
 	};
 };
 
@@ -31,11 +39,39 @@
 	status = "okay";
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart1 {
+	u-boot,dm-pre-reloc;
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 };
 
-&saradc {
+&uart3 {
 	u-boot,dm-pre-reloc;
-	status = "okay";
-};
\ No newline at end of file
+};
+
+&uart4 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart5 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart6 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart7 {
+	u-boot,dm-pre-reloc;
+};

commit 58456f69ac94d0956295d42c3cb9851bed973e5a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 09:42:21 2018 +0800

    rockchip: rk1808: initialize debug uart only in TPL
    
    rk1808 uses preloader serial configure from TPL.
    
    Change-Id: Iff775590bf75bb1db4ef4802ae3e16daeff149b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
index 16525447ec..021da42f52 100644
--- a/arch/arm/mach-rockchip/rk1808/rk1808.c
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -61,6 +61,7 @@ enum {
  */
 void board_debug_uart_init(void)
 {
+#ifdef CONFIG_TPL_BUILD
 	static struct rk1808_grf * const grf = (void *)GRF_BASE;
 
 	/* Enable early UART2 channel m0 on the rk1808 */
@@ -72,4 +73,5 @@ void board_debug_uart_init(void)
 		     GPIO4A3_MASK | GPIO4A2_MASK,
 		     GPIO4A2_UART2_TX_M0 << GPIO4A2_SHIFT |
 		     GPIO4A3_UART2_RX_M0 << GPIO4A3_SHIFT);
+#endif
 }

commit 064eb4931464a5c5dc66e25fc3af2561bc4cb948
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:45:00 2018 +0800

    serial: ns16550: support using pre-loader serial
    
    - pass pre-loader serial configure by rk atags;
    - it depends on serial aliases to find uart port;
    - enabled by CONFIG_ROCKCHIP_USING_PRELOADER_SERIAL;
    
    Change-Id: I6723cccc5e1f3dac77203b4cc19cdac631f5133b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index f7e1755ea1..c6a9c90828 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -84,6 +84,7 @@ ENTRY(_main)
 	/* set up gd here, outside any C code */
 	mov	r9, r0
 	bl	board_init_f_init_reserve
+	bl	board_init_f_init_serial
 
 	mov	r0, #0
 	bl	board_init_f
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 9cb70552fe..bac5de4081 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -83,6 +83,7 @@ ENTRY(_main)
 	/* set up gd here, outside any C code */
 	mov	x18, x0
 	bl	board_init_f_init_reserve
+	bl	board_init_f_init_serial
 
 	mov	x0, #0
 	bl	board_init_f
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 02e0269e94..fe90a710b3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -519,6 +519,13 @@ config ROCKCHIP_PRELOADER_ATAGS
 	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
 	  and finally ends with U-Boot.
 
+config ROCKCHIP_PRELOADER_SERIAL
+	bool "Rockchip pre-loader serial"
+	default y if ROCKCHIP_PRELOADER_ATAGS
+	help
+	  This enable U-Boot using pre-loader atags serial configure to initialize console.
+	  It denpends on serial aliases to find pre-loader serial number.
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 9e3f5cfed5..954e17d8c3 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/rk_atags.h>
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 #include <power/charge_display.h>
 #endif
@@ -274,6 +275,27 @@ void enable_caches(void)
 	dcache_enable();
 }
 
+#ifdef CONFIG_ROCKCHIP_PRELOADER_SERIAL
+int board_init_f_init_serial(void)
+{
+	struct tag *t = atags_get_tag(ATAG_SERIAL);
+
+	if (t) {
+		gd->serial.using_pre_serial = t->u.serial.enable;
+		gd->serial.addr = t->u.serial.addr;
+		gd->serial.baudrate = t->u.serial.baudrate;
+		gd->serial.id = t->u.serial.id;
+
+		debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n",
+		      __func__, gd->serial.using_pre_serial,
+		      gd->serial.addr, gd->serial.baudrate,
+		      gd->serial.id);
+	}
+
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
 #include <fdt_support.h>
 #include <usb.h>
diff --git a/common/board_f.c b/common/board_f.c
index f76f7da756..8ce40bef74 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -117,7 +117,11 @@ __weak void board_add_ram_info(int use_default)
 
 static int init_baud_rate(void)
 {
-	gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
+	if (gd && gd->serial.using_pre_serial)
+		gd->baudrate = env_get_ulong("baudrate", 10, gd->serial.baudrate);
+	else
+		gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
+
 	return 0;
 }
 
@@ -142,6 +146,16 @@ static int display_text_info(void)
 	return 0;
 }
 
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL)
+static int announce_pre_serial(void)
+{
+	if (gd && gd->serial.using_pre_serial)
+		printf("PreSerial: %d\n", gd->serial.id);
+
+	return 0;
+}
+#endif
+
 static int announce_dram_init(void)
 {
 	puts("DRAM:  ");
@@ -803,6 +817,9 @@ static const init_fnc_t init_sequence_f[] = {
 #endif
 #if defined(CONFIG_HARD_SPI)
 	init_func_spi,
+#endif
+#if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL)
+	announce_pre_serial,
 #endif
 	announce_dram_init,
 	dram_init,		/* configure available RAM banks */
diff --git a/common/board_r.c b/common/board_r.c
index 818543446b..3885fd4c66 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -172,7 +172,22 @@ static int initr_reloc_global_data(void)
 
 static int initr_serial(void)
 {
+/*
+ * 1. Serial has been initialized in board_f.c => serial_init(), there is
+ *    no special reason to init it again;
+ *
+ * 2. Pre-serial works depending on aliases to get pre-serial phandle when
+ *    parse dtb. If CONFIG_USING_KERNEL_DTB is enabled, there are both kernel
+ *    dtb and U-Boot dtb aliases added into aliases_lookup, these nodes have
+ *    same names but different phanles(U-Boot nodes has high prior), this may
+ *    lead a wrong aliases node finding if try to get a node after kenrel dtb
+ *    unflattened, i.e. using U-Boot phandle to get kernel dtb node!!
+ *
+ *    Notice: of_alias_dump() is provided to dump all aliases node.
+ */
+#ifndef CONFIG_USING_KERNEL_DTB
 	serial_initialize();
+#endif
 	return 0;
 }
 
diff --git a/common/init/board_init.c b/common/init/board_init.c
index 4a391beba9..9269ca858d 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -129,6 +129,14 @@ void board_init_f_init_reserve(ulong base)
 #endif
 }
 
+/*
+ * Board-specific Platform code can init serial earlier if needed
+ */
+__weak int board_init_f_init_serial(void)
+{
+	return 0;
+}
+
 /*
  * Board-specific Platform code can reimplement show_boot_progress () if needed
  */
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index ff7be7b5b5..92443d401c 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -804,5 +804,17 @@ struct device_node *of_alias_dump(void)
 
 struct device_node *of_get_stdout(void)
 {
+	struct device_node *np;
+
+	if (gd && gd->serial.using_pre_serial) {
+		np = of_alias_get_dev("serial", gd->serial.id);
+		if (!np)
+			printf("Can't find alias serial%d\n", gd->serial.id);
+		else
+			debug("Find alias serial: %s\n", np->full_name);
+
+		of_stdout = np;
+	}
+
 	return of_stdout;
 }
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index ad7a3d77ab..6f2ee6960d 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -254,6 +254,13 @@ static inline void _debug_uart_init(void)
 	 */
 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
 					    CONFIG_BAUDRATE);
+
+	if (gd && gd->serial.using_pre_serial) {
+		com_port = (struct NS16550 *)gd->serial.addr;
+		baud_divisor = ns16550_calc_divisor(com_port,
+			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
+	}
+
 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
 	serial_dout(&com_port->mcr, UART_MCRVAL);
 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
@@ -268,6 +275,9 @@ static inline void _debug_uart_putc(int ch)
 {
 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
+	if (gd && gd->serial.using_pre_serial)
+		com_port = (struct NS16550 *)gd->serial.addr;
+
 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
 		;
 	serial_dout(&com_port->thr, ch);
@@ -288,6 +298,13 @@ static inline void _debug_uart_init(void)
 
 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
 					    CONFIG_BAUDRATE);
+
+	if (gd && gd->serial.using_pre_serial) {
+		com_port = (struct NS16550 *)gd->serial.addr;
+		baud_divisor = ns16550_calc_divisor(com_port,
+			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
+	}
+
 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
 	serial_dout(&com_port->mdr1, 0x7);
 	serial_dout(&com_port->mcr, UART_MCRVAL);
@@ -304,6 +321,9 @@ static inline void _debug_uart_putc(int ch)
 {
 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
+	if (gd && gd->serial.using_pre_serial)
+		com_port = (struct NS16550 *)gd->serial.addr;
+
 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
 		;
 	serial_dout(&com_port->thr, ch);
@@ -456,6 +476,10 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
 	plat->base = addr;
 #else
+
+	if (gd && gd->serial.using_pre_serial)
+		addr = gd->serial.addr;
+
 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
 #endif
 
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 2e5116f7ce..0c7a4d7c87 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -54,6 +54,23 @@ static int serial_check_stdout(const void *blob, struct udevice **devp)
 	}
 	if (node < 0)
 		node = fdt_path_offset(blob, "console");
+
+	if (gd && gd->serial.using_pre_serial) {
+		const char *serial_path;
+		char serial[12];
+
+		snprintf(serial, 12, "serial%d", gd->serial.id);
+		serial_path = fdt_get_alias(blob, serial);
+		if (serial_path) {
+			debug("Find alias %s, path: %s\n", serial, serial_path);
+			node = fdt_path_offset(blob, serial_path);
+			if (node < 0)
+				printf("Can't find %s by path\n", serial);
+		} else {
+			printf("Can't find alias %s\n", serial);
+		}
+	}
+
 	if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, devp))
 		return 0;
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index b46e542500..17103318b8 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -31,6 +31,13 @@ struct pm_ctx {
 	unsigned long suspend_regs[15];
 };
 
+struct pre_serial {
+	u32 using_pre_serial;
+	u32 id;
+	u32 baudrate;
+	ulong addr;
+};
+
 typedef struct global_data {
 	bd_t *bd;
 	unsigned long flags;
@@ -126,7 +133,7 @@ typedef struct global_data {
 #ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP
 	int new_line;
 #endif
-
+	struct pre_serial serial;
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */
diff --git a/include/common.h b/include/common.h
index 7c42b6453d..1c280d86f8 100644
--- a/include/common.h
+++ b/include/common.h
@@ -144,6 +144,11 @@ ulong board_init_f_alloc_reserve(ulong top);
  */
 void board_init_f_init_reserve(ulong base);
 
+/*
+ * Board-specific Platform code can init serial earlier if needed
+ */
+__weak int board_init_f_init_serial(void);
+
 /**
  * arch_setup_gd() - Set up the global_data pointer
  *

commit 701d3ebca892f339bb1719e7d424f7edbd190217
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 10:20:03 2018 +0800

    rockchip: sdram: support atags parse ddr and reserve atf/optee memory regions
    
    it compatibles with legacy ways.
    
    Change-Id: I0e66d7973263ed2284a1524e571c8d99ff77326f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index faeb0dffa5..16108c51ec 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
+#include <asm/arch/rk_atags.h>
 #include <asm/arch/sdram_common.h>
 #include <dm/uclass-internal.h>
 
@@ -57,74 +58,235 @@ static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
 	return checksum;
 }
 
-int dram_init_banksize(void)
+#define SDRAM_OFFSET(offset)	(CONFIG_SYS_SDRAM_BASE + (offset))
+#define NOT_INITIAL		-1
+static int __dram_init_banksize(int resv_tee)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
+	u64 start[CONFIG_NR_DRAM_BANKS], size[CONFIG_NR_DRAM_BANKS];
+	u64 tos_addr = 0, atf_addr = 0;
+	u64 tos_size = 0, atf_size = 0;
+	u32 checksum, i;
+	int idx = NOT_INITIAL;
 	struct tos_parameter_t *tos_parameter;
-	u32 checksum __maybe_unused;
-
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-
-	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				  sizeof(struct tos_parameter_t) - 8);
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+
+	/*
+	 * Get memory region of ATF
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: 2MB size and start from ddr 0x0 offset;
+	 */
+	t = atags_get_tag(ATAG_ATF_MEM);
+	if (t && t->u.atf_mem.size) {
+		atf_addr = t->u.atf_mem.phy_addr;
+		atf_size = t->u.atf_mem.size;
+		/* Sanity */
+		if (atf_addr + atf_size > SDRAM_OFFSET(SZ_1M)) {
+			printf("%s: ATF reserved region is not within 0-1MB offset(0x%08llx-0x%08llx)!\n",
+			       __func__, atf_addr, atf_addr + atf_size);
+			return -EINVAL;
+		}
+	}
 
-#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
-#else
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	/*
+	 * Get memory region of OP-TEE
+	 *
+	 * 1. New way: atags info;
+	 * 2. Leagcy way: info in ddr 34M offset;
+	 */
+	t = atags_get_tag(ATAG_TOS_MEM);
+	if (t && (t->u.tos_mem.tee_mem.flags == 1)) {
+		tos_addr = t->u.tos_mem.tee_mem.phy_addr;
+		tos_size = t->u.tos_mem.tee_mem.size;
+	}
 #endif
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 
-/*
- * OP-TEE:
- *	ARM64(AArch32) 64-bit: enable dcache; (U-boot: map region dcache cachable)
- *	ARM 32-bit: disable dcache; (U-boot: map region dcache off)
- */
+	/* Legacy */
+	if (!atf_size) {
+		if (IS_ENABLED(CONFIG_ARM64) ||
+		    IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32)) {
+			atf_addr = SDRAM_OFFSET(0);
+			atf_size = SZ_1M;
+		}
+	}
 
-#if !defined(CONFIG_ARM64_BOOT_AARCH32)
-	if ((checksum == tos_parameter->checksum) &&
-	    (tos_parameter->tee_mem.flags == 1)) {
-		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- gd->bd->bi_dram[0].start;
-		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
-					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
+	/* Legacy */
+	if (!tos_size) {
+		tos_parameter =
+		(struct tos_parameter_t *)(SDRAM_OFFSET(TRUST_PARAMETER_OFFSET));
+		checksum =
+		trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				sizeof(struct tos_parameter_t) - 8);
+		if ((checksum == tos_parameter->checksum) &&
+		    (tos_parameter->tee_mem.flags == 1)) {
+			tos_addr = tos_parameter->tee_mem.phy_addr;
+			tos_size = tos_parameter->tee_mem.size;
+		}
 	}
+
+	debug("ATF: 0x%llx - 0x%llx\n", atf_addr, atf_addr + atf_size);
+	debug("TOS: 0x%llx - 0x%llx\n", tos_addr, tos_addr + tos_size);
+
+	/*
+	 * Reserve region for ATF bl31
+	 *
+	 * What ever U-Boot runs on AArch64 or AArch32 mode, the bl31 is always
+	 * present and AArch64 mode, let's reserve it.
+	 *
+	 * Maybe:
+	 *	1. ATF region is from 0x0 offset and 1MB size(legacy);
+	 *	2. ATF region is from 0x0 offset but not 1MB size;
+	 *	3. ATF region is not from 0x0 offset but within 1MB;
+	 *
+	 * 1. The "*****" means visible region to kernel.
+	 * 2. 1M~2M is always reserved in ARM64 for pstore, shmem, etc.
+	 *
+	 *
+	 * Possible memory layout:
+	 *
+	 * Leagcy:
+	 *	 |------------o-------o------------------------|
+	 *	 |     ATF    | RES   |************************|
+	 *	 |------------o-------o------------------------|
+	 *	 0x0          1M      2M                      .....
+	 *
+	 *
+	 * New:
+	 *	 |-----|------o-------o------------------------|
+	 *	 | ATF |******| RES   |************************|
+	 *	 |-----|------o-------o------------------------|
+	 *	 0x0          1M      2M                      .....
+	 *
+	 *
+	 *	 |----|---|---o-------o------------------------|
+	 *	 |****|ATF|***| RES   |************************|
+	 *	 |----|---|---o-------o------------------------|
+	 *	 0x0  64K     1M      2M                      .....
+	 *
+	 * Note: these are only initilized once from dram_init_banksize(),
+	 *       which is before relocation.
+	 */
+	if (atf_size && !(gd->flags & GD_FLG_RELOC)) {
+		idx = 0;
+		memset(size, 0, sizeof(size));
+
+		start[0] = SDRAM_OFFSET(0);
+		 size[0] = atf_addr - start[0];
+		start[1] = atf_addr + atf_size;
+		 size[1] = SDRAM_OFFSET(SZ_1M) - start[1];
+		start[2] = SDRAM_OFFSET(SZ_2M);
+		 size[2] = top - start[2];
+
+		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+			if (!size[i])
+				continue;
+
+			gd->bd->bi_dram[idx].start = start[i];
+			gd->bd->bi_dram[idx].size = size[i];
+			idx++;
+		}
+	/* There is no bl31, fill whole ram size */
+	} else if (!(gd->flags & GD_FLG_RELOC)) {
+		gd->bd->bi_dram[0].start = SDRAM_OFFSET(0);
+		gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+	} else {
+		/*
+		 * Do nothing for bl31 when called from dram_initr_banksize(),
+		 * which is after relocation.
+		 */
+	}
+
+	/*
+	 * Reserve region for OP-TEE
+	 *
+	 * What ever U-Boot runs on AArch64 or AArch32 mode, the OP-TEE is
+	 * AArch64 mode.
+	 *
+	 * For OP-TEE:
+	 *	AArch64: dcache is enabled;
+	 *	AArch32: dcache is disabled(due to some unknown issues);
+	 *
+	 * For the data coherence, U-Boot has to follow the OP-TEE dcache
+	 * policy to map MMU attributes of OP-TEE region.
+	 *
+	 * For AArch64: MMU translate table is created manual by rkxxx.c file
+	 * and all memory region is mapped, that's good to match OP-TEE policy.
+	 * For AArch32: MMU translate table is setup according to bi_dram[..]
+	 * that OP-TEE region has been reserved and would not be mapped,
+	 * i.e. dcache is disabled, that's also good to match OP-TEE policy.
+	 *
+	 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot runs on AArch32
+	 * while OP-TEE runs on AArch64. U-Boot shouldn't reserved OP-TEE region
+	 * too early and should map MMU translate table of it(in intir_cache()).
+	 * So we reserve the region in dram_initr_banksize() after MMU setup.
+	 *
+	 *
+	 *	The are two kinds of OP-TEE memory layout
+	 *
+	 * legacy:
+	 * 	|----|-------o---------------------------------|
+	 * 	|....| OPTEE |*********************************|
+	 * 	|----|-------o---------------------------------|
+	 * 	0x0 2M      6M(or more)                 .....
+	 *
+	 * new:
+	 * 	|----|-------------------o-------o-------------|
+	 * 	|....|*******************| OPTEE |*************|
+	 * 	|----|-------------------o-------o-------------|
+	 * 	0x0  2M                132M     164M(or less) .....
+	 */
+
+	if (resv_tee && tos_size) {
+		/* If idx is not initialized, calculate idx */
+		if (idx == NOT_INITIAL) {
+			for (idx = 0; idx < CONFIG_NR_DRAM_BANKS; idx++) {
+				if (!gd->bd->bi_dram[idx].size)
+					break;
+			}
+		}
+
+		if (tos_addr == SZ_2M) {
+			gd->bd->bi_dram[idx - 1].start = tos_addr + tos_size;
+			gd->bd->bi_dram[idx - 1].size =
+					top - gd->bd->bi_dram[idx - 1].start;
+		} else {
+			gd->bd->bi_dram[idx - 1].size = tos_addr -
+					gd->bd->bi_dram[idx - 1].start;
+			gd->bd->bi_dram[idx].start = tos_addr + tos_size;
+			gd->bd->bi_dram[idx].size =
+					top - gd->bd->bi_dram[idx].start;
+		}
+#ifdef DEBUG
+		for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+			debug("%s: bank[%d]=0x%llx-0x%llx\n",
+			      __func__, i, (u64)gd->bd->bi_dram[i].start,
+			      (u64)gd->bd->bi_dram[i].start +
+			      gd->bd->bi_dram[i].size);
+		}
 #endif
+	}
 
 	return 0;
 }
 
-#if defined(CONFIG_ARM64_BOOT_AARCH32)
-int dram_initr_banksize(void)
+/*
+ * !defined(CONFIG_ARM64_BOOT_AARCH32) means: U-Boot and OP-TEE both run
+ * on AArch32 or AArch64, they are same mode. Otherwise OP-TEE is AArch64
+ * while U-Boot is AArch32. There is data cache coherence issue to fix.
+ */
+int dram_init_banksize(void)
 {
-	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
-			 gd->ram_top);
-	struct tos_parameter_t *tos_parameter;
-	u32 checksum;
-
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-
-	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				  sizeof(struct tos_parameter_t) - 8);
-
-	if ((checksum == tos_parameter->checksum) &&
-	    (tos_parameter->tee_mem.flags == 1)) {
-		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- gd->bd->bi_dram[0].start;
-		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
-					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
-	}
+	return __dram_init_banksize(!IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
+}
 
-	return 0;
+int dram_initr_banksize(void)
+{
+	return __dram_init_banksize(IS_ENABLED(CONFIG_ARM64_BOOT_AARCH32));
 }
 #endif
-#endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
@@ -226,6 +388,28 @@ int dram_init(void)
 	struct udevice *dev;
 	int ret;
 
+	/* New way: atags info */
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+	struct tag *t = NULL;
+	int i, count;
+
+	t = atags_get_tag(ATAG_DDR_MEM);
+	if (t && t->u.ddr_mem.count) {
+		gd->ram_size = 0;
+		count = t->u.ddr_mem.count;
+
+		for (i = 0; i < count; i++) {
+			gd->ram_size += t->u.ddr_mem.bank[i + count];
+			debug("%s: ram[%d] start=0x%08llx, size=0x%08llx, sum=0x%08llx\n",
+			      __func__, i, (u64)gd->bd->bi_dram[i].start,
+			      (u64)gd->bd->bi_dram[i].size, (u64)gd->ram_size);
+		}
+
+		return 0;
+	}
+#endif
+
+	/* Legacy way: os registers */
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		debug("DRAM init failed: %d\n", ret);
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index f159cbddf3..c8dfcb4248 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -20,7 +20,7 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#define CONFIG_NR_DRAM_BANKS		2
+#define CONFIG_NR_DRAM_BANKS		4
 
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>

commit b328c914c0d2f742a0badebd0420dc85e504bfcb
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 16 17:05:33 2018 +0800

    clk: rockchip: rk3288: fix up the dclk_vop freq setting
    
    Change-Id: I960a02cba63076afbc845e5ccdfb9f85a553d38b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index 79a6d6db80..568a119bf4 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -133,6 +133,28 @@ enum {
 	SPI0_DIV_MASK		= 0x7f << SPI0_DIV_SHIFT,
 };
 
+/* CRU_CLKSEL27_CON */
+enum {
+	DCLK_VOP0_DIV_SHIFT	= 8,
+	DCLK_VOP0_DIV_MASK	= 0xff << DCLK_VOP0_DIV_SHIFT,
+	DCLK_VOP0_PLL_SHIFT	= 0,
+	DCLK_VOP0_PLL_MASK	= 3 << DCLK_VOP0_PLL_SHIFT,
+	DCLK_VOP0_SELECT_CPLL	= 0,
+	DCLK_VOP0_SELECT_GPLL	= 1,
+	DCLK_VOP0_SELECT_NPLL	= 2,
+};
+
+/* CRU_CLKSEL29_CON */
+enum {
+	DCLK_VOP1_DIV_SHIFT	= 8,
+	DCLK_VOP1_DIV_MASK	= 0xff << DCLK_VOP1_DIV_SHIFT,
+	DCLK_VOP1_PLL_SHIFT	= 6,
+	DCLK_VOP1_PLL_MASK	= 3 << DCLK_VOP1_PLL_SHIFT,
+	DCLK_VOP1_SELECT_CPLL	= 0,
+	DCLK_VOP1_SELECT_GPLL	= 1,
+	DCLK_VOP1_SELECT_NPLL	= 2,
+};
+
 /* CRU_CLKSEL37_CON */
 enum {
 	PCLK_CORE_DBG_DIV_SHIFT	= 9,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 20dd359742..20b1fc82ee 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -177,6 +177,40 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 	return 0;
 }
 
+/* Get pll rate by id */
+static u32 rkclk_pll_get_rate(struct rk3288_cru *cru,
+			      enum rk_clk_id clk_id)
+{
+	u32 nr, no, nf;
+	u32 con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3288_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		GPLL_MODE_SHIFT, NPLL_MODE_SHIFT
+	};
+	uint shift;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	switch ((con >> shift) & CRU_MODE_MASK) {
+	case APLL_MODE_SLOW:
+		return OSC_HZ;
+	case APLL_MODE_NORMAL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		no = ((con & CLKOD_MASK) >> CLKOD_SHIFT) + 1;
+		nr = ((con & CLKR_MASK) >> CLKR_SHIFT) + 1;
+		con = readl(&pll->con1);
+		nf = ((con & CLKF_MASK) >> CLKF_SHIFT) + 1;
+
+		return (24 * nf / (nr * no)) * 1000000;
+	case APLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
 static int rkclk_configure_ddr(struct rk3288_cru *cru, struct rk3288_grf *grf,
 			       unsigned int hz)
 {
@@ -342,37 +376,90 @@ static int rockchip_mac_set_clk(struct rk3288_cru *cru, uint freq)
 static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
 				int periph, unsigned int rate_hz)
 {
-	struct pll_div npll_config = {0};
-	u32 lcdc_div;
+	struct pll_div cpll_config = {0};
+	u32 lcdc_div, parent;
 	int ret;
+	unsigned int gpll_rate, npll_rate;
 
-	ret = pll_para_config(rate_hz, &npll_config, &lcdc_div);
-	if (ret)
-		return ret;
-
-	rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK,
-		     NPLL_MODE_SLOW << NPLL_MODE_SHIFT);
-	rkclk_set_pll(cru, CLK_NEW, &npll_config);
-
-	/* waiting for pll lock */
-	while (1) {
-		if (readl(&grf->soc_status[1]) & SOCSTS_NPLL_LOCK)
-			break;
-		udelay(1);
-	}
-
-	rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK,
-		     NPLL_MODE_NORMAL << NPLL_MODE_SHIFT);
+	gpll_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	npll_rate = rkclk_pll_get_rate(cru, CLK_NEW);
 
-	/* vop dclk source clk: npll,dclk_div: 1 */
+	/* vop dclk source clk: cpll,dclk_div: 1 */
 	switch (periph) {
 	case DCLK_VOP0:
-		rk_clrsetreg(&cru->cru_clksel_con[27], 0xff << 8 | 3 << 0,
-			     (lcdc_div - 1) << 8 | 2 << 0);
+		ret = (readl(&cru->cru_clksel_con[27]) && DCLK_VOP0_PLL_MASK) >>
+		      DCLK_VOP0_PLL_SHIFT;
+		if (ret == DCLK_VOP0_SELECT_CPLL) {
+			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
+			if (ret)
+				return ret;
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
+			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+
+			/* waiting for pll lock */
+			while (1) {
+				if (readl(&grf->soc_status[1]) &
+					  SOCSTS_CPLL_LOCK)
+					break;
+				udelay(1);
+			}
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_NORMAL << CPLL_MODE_SHIFT);
+			parent = DCLK_VOP0_SELECT_CPLL;
+		} else if (ret == DCLK_VOP0_SELECT_GPLL) {
+			parent = DCLK_VOP0_SELECT_GPLL;
+			lcdc_div = DIV_ROUND_UP(gpll_rate,
+						rate_hz);
+		} else {
+			parent = DCLK_VOP0_SELECT_NPLL;
+			lcdc_div = DIV_ROUND_UP(npll_rate,
+						rate_hz);
+		}
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP0_DIV_MASK | DCLK_VOP0_PLL_MASK,
+			     ((lcdc_div - 1) << DCLK_VOP0_DIV_SHIFT) |
+			     (parent << DCLK_VOP0_PLL_SHIFT));
 		break;
 	case DCLK_VOP1:
-		rk_clrsetreg(&cru->cru_clksel_con[29], 0xff << 8 | 3 << 6,
-			     (lcdc_div - 1) << 8 | 2 << 6);
+		ret = (readl(&cru->cru_clksel_con[29]) && DCLK_VOP1_PLL_MASK) >>
+		      DCLK_VOP1_PLL_SHIFT;
+		if (ret == DCLK_VOP1_SELECT_CPLL) {
+			ret = pll_para_config(rate_hz, &cpll_config, &lcdc_div);
+			if (ret)
+				return ret;
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
+			rkclk_set_pll(cru, CLK_NEW, &cpll_config);
+
+			/* waiting for pll lock */
+			while (1) {
+				if (readl(&grf->soc_status[1]) &
+				    SOCSTS_CPLL_LOCK)
+					break;
+				udelay(1);
+			}
+
+			rk_clrsetreg(&cru->cru_mode_con, CPLL_MODE_MASK,
+				     CPLL_MODE_NORMAL << CPLL_MODE_SHIFT);
+
+			parent = DCLK_VOP1_SELECT_CPLL;
+		} else if (ret == DCLK_VOP1_SELECT_GPLL) {
+			parent = DCLK_VOP1_SELECT_GPLL;
+			lcdc_div = DIV_ROUND_UP(gpll_rate,
+						rate_hz);
+		} else {
+			parent = DCLK_VOP1_SELECT_NPLL;
+			lcdc_div = DIV_ROUND_UP(npll_rate,
+						rate_hz);
+		}
+		rk_clrsetreg(&cru->cru_clksel_con[29],
+			     DCLK_VOP1_DIV_MASK | DCLK_VOP1_PLL_MASK,
+			     ((lcdc_div - 1) << DCLK_VOP1_DIV_SHIFT) |
+			     (parent << DCLK_VOP1_PLL_SHIFT));
 		break;
 	}
 
@@ -495,40 +582,6 @@ void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf)
 		     APLL_MODE_NORMAL << APLL_MODE_SHIFT);
 }
 
-/* Get pll rate by id */
-static uint32_t rkclk_pll_get_rate(struct rk3288_cru *cru,
-				   enum rk_clk_id clk_id)
-{
-	uint32_t nr, no, nf;
-	uint32_t con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3288_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		GPLL_MODE_SHIFT, NPLL_MODE_SHIFT
-	};
-	uint shift;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	switch ((con >> shift) & CRU_MODE_MASK) {
-	case APLL_MODE_SLOW:
-		return OSC_HZ;
-	case APLL_MODE_NORMAL:
-		/* normal mode */
-		con = readl(&pll->con0);
-		no = ((con & CLKOD_MASK) >> CLKOD_SHIFT) + 1;
-		nr = ((con & CLKR_MASK) >> CLKR_SHIFT) + 1;
-		con = readl(&pll->con1);
-		nf = ((con & CLKF_MASK) >> CLKF_SHIFT) + 1;
-
-		return (24 * nf / (nr * no)) * 1000000;
-	case APLL_MODE_DEEP:
-	default:
-		return 32768;
-	}
-}
-
 static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,
 				  int periph)
 {
@@ -1039,11 +1092,52 @@ static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *pa
 	return -EINVAL;
 }
 
+static int __maybe_unused rk3288_vop_set_parent(struct clk *clk,
+						struct clk *parent)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	int parent_sel;
+
+	switch (parent->id) {
+	case PLL_CPLL:
+		parent_sel = 0;
+		break;
+	case PLL_GPLL:
+		parent_sel = 1;
+		break;
+	case PLL_NPLL:
+		parent_sel = 2;
+		break;
+	default:
+		parent_sel = 0;
+		break;
+	}
+
+	switch (clk->id) {
+	case DCLK_VOP0:
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP0_PLL_MASK, parent_sel << 0);
+		break;
+	case DCLK_VOP1:
+		rk_clrsetreg(&cru->cru_clksel_con[29],
+			     DCLK_VOP1_PLL_MASK, parent_sel << 6);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_MAC:
 		return rk3288_gmac_set_parent(clk, parent);
+	case DCLK_VOP0:
+	case DCLK_VOP1:
+		return rk3288_vop_set_parent(clk, parent);
 	case SCLK_USBPHY480M_SRC:
 		return 0;
 	}

commit ba5feded0a113bb8ec33b9cec56cf8853d0af22a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 28 17:03:59 2018 +0800

    clk: rockchip: rk312x: add cpll freq init
    
    Add cpll freq setting in rkclk_init.
    If have vop display, the cpll is just for dclk vop.
    The cpll freq will be setting by dclk freq set.
    But if no vop display, the cpll need to set init freq for other
    children clk.
    
    Change-Id: Ia45892dd3c8efb77cf32b631329d927aceb8dd86
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index b0d85824ef..43c63323a2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -14,6 +14,7 @@
 
 #define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(594 * MHz)
+#define CPLL_HZ		(400 * MHz)
 #define ACLK_BUS_HZ	(148500000)
 #define ACLK_PERI_HZ	(148500000)
 
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index e4064b8363..4f2b6c19f3 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -43,6 +43,7 @@ static struct rockchip_pll_rate_table rk3128_pll_rates[] = {
 	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
 	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
 	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	RK3036_PLL_RATE(400000000, 1, 100, 6, 1, 1, 0),
 	{ /* sentinel */ },
 };
 
@@ -756,6 +757,9 @@ static void rkclk_init(struct rk3128_clk_priv *priv)
 	rk3128_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ);
 	rk3128_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
 	rk3128_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+
+	rockchip_pll_set_rate(&rk3128_pll_clks[CPLL],
+			      priv->cru, CPLL, CPLL_HZ);
 }
 
 static int rk3128_clk_probe(struct udevice *dev)

commit 5ef89808109426b2107da160891518698b607d99
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 21 17:55:32 2018 +0800

    mmc: dw_mmc: set DWMCI_MSIZE to 6
    
    We set the fifo_depth to 0x100 word in Rockchip platform, and
    fifo_depth/2 must be multiple of dma_multiple_transaction_size.
    So we can set DWMCI_MSIZE to 6 according to max
    dma_multiple_transaction_size being 128.
    
    The DWMCI_MSIZE must be set as larger as possible. If not, dma fifo will
    be full, and crc error occur when the clock stop during the data phase.
    
    Change-Id: I013b6f9c272edbc723b2f627e88d30d653c42d1b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 5f894297ed..3a13b51a41 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -611,7 +611,8 @@ static int dwmci_init(struct mmc *mmc)
 
 		fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
 		fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1;
-		host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+		host->fifoth_val = MSIZE(DWMCI_MSIZE) |
+				RX_WMARK(fifo_size / 2 - 1) |
 				TX_WMARK(fifo_size / 2);
 	}
 	dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 382013bd6e..d159c6f64c 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -186,7 +186,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 		debug("MMC: sample clock not found, not support hs200!\n");
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
-	host->fifoth_val = MSIZE(0x2) |
+	host->fifoth_val = MSIZE(DWMCI_MSIZE) |
 		RX_WMARK(priv->fifo_depth / 2 - 1) |
 		TX_WMARK(priv->fifo_depth / 2);
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 2003f40b60..9e5966d320 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -135,6 +135,12 @@
 /* quirks */
 #define DWMCI_QUIRK_DISABLE_SMU		(1 << 0)
 
+/*
+ * DWMCI_MSIZE is uses to set burst size of multiple transaction.
+ * The burst size is set to 128 if DWMCI_MSIZE is set to 0x6.
+ */
+#define DWMCI_MSIZE    0x6
+
 /**
  * struct dwmci_host - Information about a designware MMC host
  *

commit c30b51158f59cb3336bfa7ed29c0c7b0b6993b9e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 25 10:47:37 2018 +0800

    mmc: re-init when read error occur
    
    Change-Id: I1cb7e913159c4588e0f5dee2180aa1945504eaf5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index b9a1795f91..afe772284d 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -308,7 +308,26 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 			mmc->cfg->b_max : blocks_todo;
 		if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 			debug("%s: Failed to read blocks\n", __func__);
-			return 0;
+			int timeout = 0;
+re_init_retry:
+			timeout++;
+			/*
+			 * Try re-init seven times.
+			 */
+			if (timeout > 7) {
+				printf("Re-init retry timeout\n");
+				return 0;
+			}
+
+			mmc->has_init = 0;
+			if (mmc_init(mmc))
+				return 0;
+
+			if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
+				printf("%s: Re-init mmc_read_blocks error\n",
+				       __func__);
+				goto re_init_retry;
+			}
 		}
 		blocks_todo -= cur;
 		start += cur;

commit 4a6b865662c5895170c5aabaa7e2f2728fad536e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 25 10:56:33 2018 +0800

    mmc: dw_mmc: change the strategy of tuning
    
    The valid window of mmc sample phase is 0-360. It is separated
    to four options for tuning to improve tuning efficiency.
    If init_retry counter exceeds four, set init_retry to zero.
    
    If the default_phase is set, we use it. If fail, try strategy of
    tuning above.
    
    Change-Id: I4938717937d37ef156c278277d188f1b25d6ebbc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7965f54afe..382013bd6e 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -103,120 +103,49 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-#define NUM_PHASES			270
-#define TUNING_ITERATION_TO_PHASE(i)	(DIV_ROUND_UP((i) * 270, NUM_PHASES))
-
 static int rockchip_dwmmc_execute_tuning(struct dwmci_host *host, u32 opcode)
 {
-	int ret = 0;
-	int i;
-	bool v, prev_v = 0, first_v;
-	struct range_t {
-		int start;
-		int end; /* inclusive */
-	};
-	struct range_t *ranges;
-	unsigned int range_count = 0;
-	int longest_range_len = -1;
-	int longest_range = -1;
-	int middle_phase;
+	int i = 0;
+	int ret = -1;
+	struct mmc *mmc = host->mmc;
 	struct udevice *dev = host->priv;
 	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
-	struct mmc *mmc = host->mmc;
 
 	if (IS_ERR(&priv->sample_clk))
 		return -EIO;
 
-	ranges = calloc(sizeof(*ranges), NUM_PHASES / 2 + 1);
-	if (!ranges)
-		return -ENOMEM;
-
-	/* Try each phase and extract good ranges */
-	for (i = 0; i < NUM_PHASES; ) {
-		clk_set_phase(&priv->sample_clk, TUNING_ITERATION_TO_PHASE(i));
-
-		v = !mmc_send_tuning(mmc, opcode);
-
-		if (i == 0)
-			first_v = v;
-
-		if ((!prev_v) && v) {
-			range_count++;
-			ranges[range_count - 1].start = i;
-		}
-		if (v) {
-			ranges[range_count - 1].end = i;
-			i++;
-		} else if (i == NUM_PHASES - 1) {
-			/* No extra skipping rules if we're at the end */
-			i++;
-		} else {
-			/*
-			 * No need to check too close to an invalid
-			 * one since testing bad phases is slow.  Skip
-			 * 20 degrees.
-			 */
-			i += DIV_ROUND_UP(20 * NUM_PHASES, NUM_PHASES);
-
-			/* Always test the last one */
-			if (i >= NUM_PHASES)
-				i = NUM_PHASES - 1;
-		}
-
-		prev_v = v;
-	}
-
-	if (range_count == 0) {
-		debug("All phases bad!");
-		ret = -EIO;
-		goto free;
-	}
-
-	/* wrap around case, merge the end points */
-	if ((range_count > 1) && first_v && v) {
-		ranges[0].start = ranges[range_count - 1].start;
-		range_count--;
-	}
-
-	if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) {
-		clk_set_phase(&priv->sample_clk,
-			      TUNING_ITERATION_TO_PHASE(NUM_PHASES / 2));
-		debug("All phases work, using middle phase.\n");
-		goto free;
+	if (mmc->default_phase > 0 && mmc->default_phase < 360) {
+		ret = clk_set_phase(&priv->sample_clk, mmc->default_phase);
+		if (ret)
+			printf("set clk phase fail\n");
+		else
+			ret = mmc_send_tuning(mmc, opcode);
+		mmc->default_phase = 0;
 	}
+	/*
+	 * If use default_phase to tune successfully, return.
+	 * Otherwise, use the othe phase to tune.
+	 */
+	if (!ret)
+		return ret;
 
-	/* Find the longest range */
-	for (i = 0; i < range_count; i++) {
-		int len = (ranges[i].end - ranges[i].start + 1);
-
-		if (len < 0)
-			len += NUM_PHASES;
+	for (i = 0; i < 5; i++) {
+		/* mmc->init_retry must be 0, 1, 2, 3 */
+		if (mmc->init_retry == 4)
+			mmc->init_retry = 0;
 
-		if (longest_range_len < len) {
-			longest_range_len = len;
-			longest_range = i;
+		ret = clk_set_phase(&priv->sample_clk, 90 * mmc->init_retry);
+		if (ret) {
+			printf("set clk phase fail\n");
+			break;
 		}
-
-		debug("Good phase range %d-%d (%d len)\n",
-		      TUNING_ITERATION_TO_PHASE(ranges[i].start),
-		      TUNING_ITERATION_TO_PHASE(ranges[i].end), len);
+		ret = mmc_send_tuning(mmc, opcode);
+		debug("Tuning phase is %d, ret is %d\n", mmc->init_retry * 90, ret);
+		mmc->init_retry++;
+		if (!ret)
+			break;
 	}
 
-	printf("Best phase range %d-%d (%d len)\n",
-	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].start),
-	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].end),
-	       longest_range_len);
-
-	middle_phase = ranges[longest_range].start + longest_range_len / 2;
-	middle_phase %= NUM_PHASES;
-	debug("Successfully tuned phase to %d\n",
-	      TUNING_ITERATION_TO_PHASE(middle_phase));
-
-	clk_set_phase(&priv->sample_clk,
-		      TUNING_ITERATION_TO_PHASE(middle_phase));
-
-free:
-	free(ranges);
 	return ret;
 }
 

commit e860ec325800fca3ea2cdfb09645a563b8bb37a1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 27 09:42:34 2018 +0800

    mmc: add init_retry
    
    Use the init_retry when mmc error occur.
    
    Change-Id: I5db56d59d4c1f2ed2744d800f475da228cfcaf69
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index ef57f0edfe..7965f54afe 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -284,6 +284,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 		plat->cfg.host_caps |= MMC_MODE_HS200;
 	plat->mmc.default_phase =
 		dev_read_u32_default(dev, "default-sample-phase", 0);
+	plat->mmc.init_retry = 0;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;
diff --git a/include/mmc.h b/include/mmc.h
index 94922945b6..e3e1bbaeaf 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -567,6 +567,7 @@ struct mmc {
 	uint erase_grp_size;	/* in 512-byte sectors */
 	uint hc_wp_grp_size;	/* in 512-byte sectors */
 	int default_phase;	/* set the default sample clock phase */
+	uint init_retry;        /* re-init mmc when error occur */
 	struct sd_ssr	ssr;	/* SD status register */
 	struct emmc_esr esr;    /* emmc status register */
 	u64 capacity;

commit eec41c0fdaca1fe5f753ff7ae1d1c7154de86ea1
Author: Gaoyang Ye <gaoyang.ye@rock-chips.com>
Date:   Fri Oct 12 14:36:37 2018 +0800

    FROMRKLIST: video/drm: logo: fix show 8bit bmp logo failed
    
    Remark: 3996562  (Add: Allow logo in 16bit or 32bit color BMP)
    
    Change-Id: Ie5b1ed4af1c09ad0af3101b882278ecf3b8c6b35
    Signed-off-by: Gaoyang Ye <gaoyang.ye@rock-chips.com>
    (cherry picked from commit 6345e176b0a0699988764c7ca73041555094c2dc)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
index 523506f278..ca4d92b4e7 100644
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -163,14 +163,13 @@ static void dump_bmp_dib_head(void *bmp_addr)
 		bmp->header.colors_used);
 }
 
-int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp, bool flip)
 {
 	int i, j;
 	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
-	bool flip = false;
 	uint16_t *cmap;
 	uint8_t *cmap_base;
 
@@ -185,11 +184,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
 	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
 
-	if (height < 0)
+	if (height < 0) {
 		height = 0 - height;
-	else
-		flip = true;
-
+		flip = false;
+	}
 	cmap_base = src + sizeof(bmp->header);
 	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
 
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
index 5e125004d2..0a875f829d 100644
--- a/drivers/video/drm/bmp_helper.h
+++ b/drivers/video/drm/bmp_helper.h
@@ -15,5 +15,5 @@
 
 #define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
 
-int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp, bool flip);
 #endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d8799ae909..0056cb3e48 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -166,6 +166,11 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
+static bool can_direct_logo(int bpp)
+{
+	return bpp == 24 || bpp == 32;
+}
+
 /**
  * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
  * @logo:	the pointer to the logo information.
@@ -1120,6 +1125,7 @@ static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	struct display_state *state;
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
@@ -1151,6 +1157,12 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
 
+	if (logo->bpp == 8) {
+		state = container_of(logo, struct display_state, logo);
+		if (state->crtc_state.crtc)
+			state->crtc_state.rb_swap = true;
+	}
+
 	size = get_unaligned_le32(&header->file_size);
 	if (size > MEMORY_POOL_SIZE) {
 		printf("failed to use boot buf as temp bmp buffer\n");
@@ -1167,22 +1179,21 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		ret = -ENOENT;
 		goto free_header;
 	}
-
-	if (!vop_support_ymirror(logo)) {
+	if (!vop_support_ymirror(logo) || !can_direct_logo(logo->bpp)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
 		 */
 		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
-
 		dst = get_display_buffer(dst_size);
 		if (!dst) {
 			ret = -ENOMEM;
 			goto free_header;
 		}
 		memset(dst, 0, dst_size);
-		if (bmpdecoder(pdst, dst, logo->bpp)) {
+		if (bmpdecoder(pdst, dst, logo->bpp,
+			       !vop_support_ymirror(logo))) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;
 			goto free_header;
@@ -1190,9 +1201,8 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		flush_dcache_range((ulong)dst,
 				   ALIGN((ulong)dst + dst_size,
 					 CONFIG_SYS_CACHELINE_SIZE));
-
 		logo->offset = 0;
-		logo->ymirror = 0;
+		logo->ymirror = vop_support_ymirror(logo);
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
 		logo->ymirror = 1;

commit a39c6751df7f0df918c55eb5fefd50d6a916f040
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Sep 6 17:35:16 2018 +0800

    FROMRKLIST: common: boot_rkimg: Change storagemedia to androidboot.storagemedia
    
    androidboot.storagemedia=xxx is a kernel cmdline config which
    is passed to android init process. The init process parses
    this config and sets the properties ro.boot.storagemedia to xxx.
    
    Change-Id: I5c8b442b02df068a0ab98ccc81a4f008ebe540c1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 27be6a5d17bd63115d6802c27b6602d5b111f24b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 5b4ab088e3..00ca62e181 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -195,10 +195,10 @@ int get_bootdev_type(void)
 		    (type == IF_TYPE_SPINAND) ||
 		    (type == IF_TYPE_SPINOR))
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s", boot_media);
+				 "androidboot.storagemedia=%s", boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s androidboot.mode=normal",
+				 "androidboot.storagemedia=%s androidboot.mode=normal",
 				 boot_media);
 		env_update("bootargs", boot_options);
 	}

commit d39bdb4aa277855c39d4588b84f5dd483872729c
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Sep 6 16:19:43 2018 +0800

    FROMRKLIST: common: boot_rkimg: Fix the value of androidboot.mode error
    
    Typically, it seems that androidboot.mode can take up one of the
    following values: "normal" "charger". Other valuses affect services.
    
    Change-Id: I96debdcfc3d1267c8e1f8713b0c76d965b0d83f1
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 1907204af0c3df97dd11616480c41debbdb6fe9b)
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index c5f421480b..5b4ab088e3 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -198,8 +198,8 @@ int get_bootdev_type(void)
 				 "storagemedia=%s", boot_media);
 		else
 			snprintf(boot_options, sizeof(boot_options),
-				 "storagemedia=%s androidboot.mode=%s",
-				 boot_media, boot_media);
+				 "storagemedia=%s androidboot.mode=normal",
+				 boot_media);
 		env_update("bootargs", boot_options);
 	}
 

commit 6ba4112660633d4412fb4a0ae45b5cf727c431c2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 8 14:25:23 2018 +0800

    board_r: env: support storage env when kernel dtb is enabled
    
    if we would like to use kernel dtb, it must depends on nowhere
    env to detect boot media and initialize it. After storage is
    initialized, we switch env from nowhere to CONFIG_ENV_IS_IN_xxx=y,
    nowhere env info will append or override to storage env.
    
    Change-Id: Id1cf44d4b25dcaba3c142b283ed093bed0decafe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index cd79e97bae..818543446b 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -32,6 +32,7 @@
 #endif
 #include <malloc.h>
 #include <mapmem.h>
+#include <memalign.h>
 #ifdef CONFIG_BITBANGMII
 #include <miiphy.h>
 #endif
@@ -435,6 +436,7 @@ static int initr_mmc(void)
 }
 #endif
 
+#if !defined(CONFIG_USING_KERNEL_DTB) || !defined(CONFIG_ENV_IS_NOWHERE)
 /*
  * Tell if it's OK to load the environment early in boot.
  *
@@ -473,6 +475,44 @@ static int initr_env(void)
 
 	return 0;
 }
+#endif
+
+#ifdef CONFIG_USING_KERNEL_DTB
+static int initr_env_nowhere(void)
+{
+#if defined(CONFIG_NEEDS_MANUAL_RELOC)
+	env_reloc();
+	env_htab.change_ok += gd->reloc_off;
+#endif
+	set_default_env(NULL);
+
+	return 0;
+}
+
+#if !defined(CONFIG_ENV_IS_NOWHERE)
+static int initr_env_switch(void)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(env_t, env_nowhere, 1);
+	int ret;
+
+	/* Export nowhere env for late use */
+	ret = env_export(env_nowhere);
+	if (ret) {
+		printf("%s: export nowhere env fail, ret=%d\n", __func__, ret);
+		return -EINVAL;
+	}
+
+	/* Destroy nowhere env and import storage env */
+	initr_env();
+
+	/* Append/override nowhere env to storage env */
+	himport_r(&env_htab, (char *)env_nowhere->data, ENV_SIZE, '\0',
+		  H_NOCLEAR, 0, 0, NULL);
+
+	return 0;
+}
+#endif	/* CONFIG_ENV_IS_NOWHERE */
+#endif	/* CONFIG_USING_KERNEL_DTB */
 
 #ifdef CONFIG_SYS_BOOTPARAMS_LEN
 static int initr_malloc_bootparams(void)
@@ -738,12 +778,27 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_DM
 	initr_dm,
 #endif
+
+/*
+ * kernel dtb must depends on nowhere to detect boot storage media
+ * and initialize it.
+ */
 #ifdef CONFIG_USING_KERNEL_DTB
-	initr_env,
+	initr_env_nowhere,
 #endif
+
 #if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
 	board_init,	/* Setup chipselects */
 #endif
+
+/*
+ * Now that storage has been initialized in board_init(), we could switch env
+ * from nowhere to storage, i.e. CONFIG_ENV_IS_IN_xxx=y.
+ */
+#if defined(CONFIG_USING_KERNEL_DTB) && !defined(CONFIG_ENV_IS_NOWHERE)
+	initr_env_switch,
+#endif
+
 	/*
 	 * TODO: printing of the clock inforamtion of the board is now
 	 * implemented as part of bdinfo command. Currently only support for

commit 2e02c4e25b46c09290872450562aa02248de403f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:40:28 2018 +0800

    dm: of_access: add of_alias_get_dev() and of_alias_dump()
    
     - support get device_node by given stem and alias id;
     - dump of alias nodes added in aliases_lookup.
    
    Change-Id: I3ed8bd4692dd3fbbeebe9978a797a5a2dcf7eb23
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index c31cba7fd6..ff7be7b5b5 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -766,6 +766,42 @@ int of_alias_get_id(const struct device_node *np, const char *stem)
 	return id;
 }
 
+struct device_node *of_alias_get_dev(const char *stem, int id)
+{
+	struct alias_prop *app;
+	struct device_node *np = NULL;
+
+	mutex_lock(&of_mutex);
+	list_for_each_entry(app, &aliases_lookup, link) {
+		if (strcmp(app->stem, stem) != 0)
+			continue;
+
+		if (id == app->id) {
+			np = app->np;
+			break;
+		}
+	}
+	mutex_unlock(&of_mutex);
+
+	return np;
+}
+
+struct device_node *of_alias_dump(void)
+{
+	struct alias_prop *app;
+	struct device_node *np = NULL;
+
+	mutex_lock(&of_mutex);
+	list_for_each_entry(app, &aliases_lookup, link) {
+		printf("%s: Alias %s%d: %s, phandle=%d\n", __func__,
+		       app->stem, app->id,
+		       app->np->full_name, app->np->phandle);
+	}
+	mutex_unlock(&of_mutex);
+
+	return np;
+}
+
 struct device_node *of_get_stdout(void)
 {
 	return of_stdout;
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index c49d287dd6..64efdb7035 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -393,6 +393,22 @@ int of_alias_scan(void);
  */
 int of_alias_get_id(const struct device_node *np, const char *stem);
 
+/**
+ * of_alias_get_dev - Get device_node by given stem and alias id
+ *
+ * Travels the lookup table to get the device_node by given stem and alias id.
+ *
+ * @stem:	Alias stem of the given device_node
+ * @id:         Alias id of the given device_node
+ * @return device_node, if found, else NULL
+ */
+struct device_node *of_alias_get_dev(const char *stem, int id);
+
+/**
+ * of_alias_dump - Dump of alias nodes added in aliases_lookup.
+ */
+struct device_node *of_alias_dump(void);
+
 /**
  * of_get_stdout() - Get node to use for stdout
  *

commit ebdb22331243b804491cf9049454d2c4f3886ccd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 16 10:13:33 2018 +0800

    make.sh: rk1808 support RSA-PKCS1 V2.1 pack for trust
    
    Change-Id: I9b27795c339516198cb2b499c2796ff7a7ef0b11
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 2851949c09..4be5eff987 100755
--- a/make.sh
+++ b/make.sh
@@ -423,8 +423,8 @@ fixup_platform_configure()
 	local count plat
 
 # <*> Fixup rsa/sha pack mode for platforms
-	# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+	# RK3308/PX30/RK3326/RK1808 use RSA-PKCS1 V2.1, it's pack magic is "3"
+	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" -o $RKCHIP = "RK1808" ]; then
 		PLATFORM_RSA="--rsa 3"
 	# RK3368 use rk big endian SHA256, it's pack magic is "2"
 	elif [ $RKCHIP = "RK3368" ]; then

commit 4e40f4e8332f82f7a741f4239387830ece41584f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 16 09:33:13 2018 +0800

    rockchip: atags: destroy atags only when atags header is valid
    
    Change-Id: Ied01c2460291084714002293a3b4ed01e69fa270
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index a8f0d99b2e..a7ceaf2333 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -227,7 +227,8 @@ struct tag *atags_get_tag(u32 magic)
 
 void atags_destroy(void)
 {
-	memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
+	if (atags_is_available())
+		memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
 }
 
 #if (defined(CONFIG_DEBUG_ATAGS) || defined(DEBUG)) && \

commit a59bd218a507e5913401e3faa77982ebfcd654bc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 10 12:09:03 2018 +0800

    rockchip: sdhci: support hs200&hs400
    
    Add the "mmc-hs200-1_8v & mmc-hs400-1_8v" to the dts
    to support hs200&hs400
    
    Change-Id: Ic141b75b328a56609853aae50c8a094c605931e1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 63b5ddddfd..af840fc56d 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -319,6 +319,10 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->max_clk = max_frequency;
 
+	if (dev_read_bool(dev, "mmc-hs200-1_8v"))
+		host->host_caps |= MMC_MODE_HS200;
+	else if (dev_read_bool(dev, "mmc-hs400-1_8v"))
+		host->host_caps |= MMC_MODE_HS400;
 	ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ);
 
 	host->mmc = &plat->mmc;

commit 09494d3a1b72d07d6b18a4c8b17c3260dfdddc47
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 25 09:50:11 2018 +0800

    mmc: add default_phase
    
    Add default sample clock phase and it can be used when
    run mmc_send_tuning.
    
    The function mmc_send_tuning will use default_phase directly
    to set the sample clock phase, and this can improve tuning's
    efficiency. If use default_phase to run mmc_send_tuning fail,
    it will change to tune 0&45...&270 phase.
    
    Change-Id: I747f7820a7d2a67ffb9152794acec31b15e97e2b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7030f2fc6a..ef57f0edfe 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -282,6 +282,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
 	if (dev_read_bool(dev, "mmc-hs200-1_8v"))
 		plat->cfg.host_caps |= MMC_MODE_HS200;
+	plat->mmc.default_phase =
+		dev_read_u32_default(dev, "default-sample-phase", 0);
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;
diff --git a/include/mmc.h b/include/mmc.h
index 9fb43b6a8c..94922945b6 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -566,6 +566,7 @@ struct mmc {
 	uint write_bl_len;
 	uint erase_grp_size;	/* in 512-byte sectors */
 	uint hc_wp_grp_size;	/* in 512-byte sectors */
+	int default_phase;	/* set the default sample clock phase */
 	struct sd_ssr	ssr;	/* SD status register */
 	struct emmc_esr esr;    /* emmc status register */
 	u64 capacity;

commit 26dd3474b39b26f6e68e08626b09657c4f976574
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Sep 29 16:35:37 2018 +0800

    usb: gadget: add SuperSpeed support to the Gadget Framework
    
    This patch implements the Binary Device Object Store (BOS)
    Descriptor for SuperSpeed. It also add SuperSpeed Endpoint
    Descriptors for fastboot and rockusb gadget.
    
    Change-Id: I7d858e1b5117d403919f5fdacb40072a5fad336f
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index ff89c1599c..90cbdddd28 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -57,6 +57,8 @@ int usb_add_function(struct usb_configuration *config,
 		config->fullspeed = 1;
 	if (!config->highspeed && function->hs_descriptors)
 		config->highspeed = 1;
+	if (!config->superspeed && function->ss_descriptors)
+		config->superspeed = 1;
 
 done:
 	if (value)
@@ -192,10 +194,17 @@ static int config_buf(struct usb_configuration *config,
 
 	/* add each function's descriptors */
 	list_for_each_entry(f, &config->functions, list) {
-		if (speed == USB_SPEED_HIGH)
+		switch (speed) {
+		case USB_SPEED_SUPER:
+			descriptors = f->ss_descriptors;
+			break;
+		case USB_SPEED_HIGH:
 			descriptors = f->hs_descriptors;
-		else
+			break;
+		default:
 			descriptors = f->descriptors;
+		}
+
 		if (!descriptors)
 			continue;
 		status = usb_descriptor_fillbuf(next, len,
@@ -219,7 +228,9 @@ static int config_desc(struct usb_composite_dev *cdev, unsigned w_value)
 	int                             hs = 0;
 	struct usb_configuration	*c;
 
-	if (gadget_is_dualspeed(gadget)) {
+	if (gadget->speed == USB_SPEED_SUPER)
+		speed = gadget->speed;
+	else if (gadget_is_dualspeed(gadget)) {
 		if (gadget->speed == USB_SPEED_HIGH)
 			hs = 1;
 		if (type == USB_DT_OTHER_SPEED_CONFIG)
@@ -230,13 +241,20 @@ static int config_desc(struct usb_composite_dev *cdev, unsigned w_value)
 
 	w_value &= 0xff;
 	list_for_each_entry(c, &cdev->configs, list) {
-		if (speed == USB_SPEED_HIGH) {
+		switch (speed) {
+		case USB_SPEED_SUPER:
+			if (!c->superspeed)
+				continue;
+			break;
+		case USB_SPEED_HIGH:
 			if (!c->highspeed)
 				continue;
-		} else {
+			break;
+		default:
 			if (!c->fullspeed)
 				continue;
 		}
+
 		if (w_value == 0)
 			return config_buf(c, speed, cdev->req->buf, type);
 		w_value--;
@@ -274,6 +292,8 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
 static int bos_desc(struct usb_composite_dev *cdev)
 {
 	struct usb_dev_cap_header	*cap;
+	struct usb_ext_cap_descriptor	*usb_ext;
+	struct usb_ss_cap_descriptor	*ss_cap;
 	struct usb_bos_descriptor	*bos = cdev->req->buf;
 
 	bos->bLength = USB_DT_BOS_SIZE;
@@ -281,12 +301,49 @@ static int bos_desc(struct usb_composite_dev *cdev)
 	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
 	bos->bNumDeviceCaps = 0;
 
-	cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
-	bos->bNumDeviceCaps++;
-	bos->wTotalLength = cpu_to_le16(bos->wTotalLength + sizeof(*cap));
-	cap->bLength = sizeof(*cap);
-	cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
-	cap->bDevCapabilityType = 0;
+	if (cdev->gadget->speed < USB_SPEED_SUPER) {
+		/* For rockusb with bcdUSB (0x0201) */
+		cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
+						sizeof(*cap));
+		cap->bLength = sizeof(*cap);
+		cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		cap->bDevCapabilityType = 0;
+	} else {
+		/*
+		 * A SuperSpeed device shall include the USB2.0
+		 * extension descriptor and shall support LPM when
+		 * operating in USB2.0 HS mode.
+		 */
+		usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
+						USB_DT_USB_EXT_CAP_SIZE);
+		usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE;
+		usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT;
+		usb_ext->bmAttributes = USB_LPM_SUPPORT;
+
+		/*
+		 * The Superspeed USB Capability descriptor shall be
+		 * implemented by all SuperSpeed devices.
+		 */
+		ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+		bos->bNumDeviceCaps++;
+		bos->wTotalLength = cpu_to_le16(bos->wTotalLength +
+						USB_DT_USB_SS_CAP_SIZE);
+		ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE;
+		ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+		ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE;
+		ss_cap->bmAttributes = 0; /* LTM is not supported yet */
+		ss_cap->wSpeedSupported = cpu_to_le16(USB_FULL_SPEED_OPERATION |
+				USB_HIGH_SPEED_OPERATION |
+				USB_5GBPS_OPERATION);
+		ss_cap->bFunctionalitySupport = USB_FULL_SPEED_OPERATION;
+		ss_cap->bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT;
+		ss_cap->bU2DevExitLat = cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT);
+	}
 
 	return le16_to_cpu(bos->wTotalLength);
 }
@@ -352,21 +409,24 @@ static int set_config(struct usb_composite_dev *cdev,
 		result = 0;
 
 	debug("%s: %s speed config #%d: %s\n", __func__,
-	     ({ char *speed;
-		     switch (gadget->speed) {
-		     case USB_SPEED_LOW:
-			     speed = "low";
-			     break;
-		     case USB_SPEED_FULL:
-			     speed = "full";
-			     break;
-		     case USB_SPEED_HIGH:
-			     speed = "high";
-			     break;
-		     default:
-			     speed = "?";
-			     break;
-		     };
+	      ({ char *speed;
+		switch (gadget->speed) {
+		case USB_SPEED_LOW:
+			speed = "low";
+			break;
+		case USB_SPEED_FULL:
+			speed = "full";
+			break;
+		case USB_SPEED_HIGH:
+			speed = "high";
+			break;
+		case USB_SPEED_SUPER:
+			speed = "super";
+			break;
+		default:
+			speed = "?";
+			break;
+		};
 		     speed;
 	     }), number, c ? c->label : "unconfigured");
 
@@ -387,10 +447,16 @@ static int set_config(struct usb_composite_dev *cdev,
 		 * function's setup callback instead of the current
 		 * configuration's setup callback.
 		 */
-		if (gadget->speed == USB_SPEED_HIGH)
+		switch (gadget->speed) {
+		case USB_SPEED_SUPER:
+			descriptors = f->ss_descriptors;
+			break;
+		case USB_SPEED_HIGH:
 			descriptors = f->hs_descriptors;
-		else
+			break;
+		default:
 			descriptors = f->descriptors;
+		}
 
 		for (; *descriptors; ++descriptors) {
 			if ((*descriptors)->bDescriptorType != USB_DT_ENDPOINT)
@@ -467,14 +533,13 @@ int usb_add_config(struct usb_composite_dev *cdev,
 		list_del(&config->list);
 		config->cdev = NULL;
 	} else {
-		debug("cfg %d/%p speeds:%s%s\n",
-			config->bConfigurationValue, config,
-			config->highspeed ? " high" : "",
-			config->fullspeed
-				? (gadget_is_dualspeed(cdev->gadget)
-					? " full"
-					: " full/low")
-				: "");
+		debug("cfg %d/%p speeds:%s%s%s\n",
+		      config->bConfigurationValue, config,
+		      config->superspeed ? " super" : "",
+		      config->highspeed ? " high" : "",
+		      config->fullspeed ?
+		      (gadget_is_dualspeed(cdev->gadget) ?
+		      " full" : " full/low") : "");
 
 		for (i = 0; i < MAX_CONFIG_INTERFACES; i++) {
 			f = config->interface[i];
@@ -742,6 +807,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 	gadget->ep0->driver_data = cdev;
 	standard = (ctrl->bRequestType & USB_TYPE_MASK)
 						== USB_TYPE_STANDARD;
+
 	if (!standard)
 		goto unknown;
 
@@ -758,6 +824,20 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 				count_configs(cdev, USB_DT_DEVICE);
 			cdev->desc.bMaxPacketSize0 =
 				cdev->gadget->ep0->maxpacket;
+			if (gadget_is_superspeed(gadget) &&
+			    gadget->speed >= USB_SPEED_SUPER) {
+				/*
+				 * bcdUSB should be 0x0300 for superspeed,
+				 * but we change it to 0x0301 for rockusb.
+				 */
+				if (!strncmp(cdev->driver->name,
+					     "rkusb_ums_dnl", 13))
+					cdev->desc.bcdUSB = cpu_to_le16(0x0301);
+				else
+					cdev->desc.bcdUSB = cpu_to_le16(0x0300);
+				cdev->desc.bMaxPacketSize0 = 9;
+			}
+
 			value = min(w_length, (u16) sizeof cdev->desc);
 			memcpy(req->buf, &cdev->desc, value);
 			break;
@@ -791,7 +871,8 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 			 * which request BOS descriptor in this case that bcdUSB
 			 * is set to 0x0201.
 			 */
-			if (!strncmp(cdev->driver->name, "rkusb_ums_dnl", 13)) {
+			if (gadget_is_superspeed(gadget) ||
+			    !strncmp(cdev->driver->name, "rkusb_ums_dnl", 13)) {
 				value = bos_desc(cdev);
 				value = min(w_length, (u16) value);
 			}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 9ec9d2bbd3..3bd1d7a1b8 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -114,6 +114,34 @@ static struct usb_endpoint_descriptor hs_ep_out = {
 	.wMaxPacketSize		= cpu_to_le16(512),
 };
 
+static struct usb_endpoint_descriptor ss_ep_in = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_IN,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor ss_ep_in_comp_desc = {
+	.bLength		= sizeof(ss_ep_in_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
+static struct usb_endpoint_descriptor ss_ep_out = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_OUT,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor ss_ep_out_comp_desc = {
+	.bLength		= sizeof(ss_ep_out_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
 static struct usb_interface_descriptor interface_desc = {
 	.bLength		= USB_DT_INTERFACE_SIZE,
 	.bDescriptorType	= USB_DT_INTERFACE,
@@ -138,13 +166,44 @@ static struct usb_descriptor_header *fb_hs_function[] = {
 	NULL,
 };
 
+static struct usb_descriptor_header *fb_ss_function[] = {
+	(struct usb_descriptor_header *)&interface_desc,
+	(struct usb_descriptor_header *)&ss_ep_in,
+	(struct usb_descriptor_header *)&ss_ep_in_comp_desc,
+	(struct usb_descriptor_header *)&ss_ep_out,
+	(struct usb_descriptor_header *)&ss_ep_out_comp_desc,
+	NULL,
+};
+
 static struct usb_endpoint_descriptor *
 fb_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
-	    struct usb_endpoint_descriptor *hs)
+	   struct usb_endpoint_descriptor *hs,
+	   struct usb_endpoint_descriptor *ss,
+	   struct usb_ss_ep_comp_descriptor *comp_desc,
+	   struct usb_ep *ep)
 {
-	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
-		return hs;
-	return fs;
+	struct usb_endpoint_descriptor *speed_desc = NULL;
+
+	/* select desired speed */
+	switch (g->speed) {
+	case USB_SPEED_SUPER:
+		if (gadget_is_superspeed(g)) {
+			speed_desc = ss;
+			ep->comp_desc = comp_desc;
+			break;
+		}
+		/* else: Fall trough */
+	case USB_SPEED_HIGH:
+		if (gadget_is_dualspeed(g)) {
+			speed_desc = hs;
+			break;
+		}
+		/* else: fall through */
+	default:
+		speed_desc = fs;
+	}
+
+	return speed_desc;
 }
 
 /*
@@ -301,6 +360,14 @@ static int fastboot_bind(struct usb_configuration *c, struct usb_function *f)
 		f->hs_descriptors = fb_hs_function;
 	}
 
+	if (gadget_is_superspeed(gadget)) {
+		/* Assume endpoint addresses are the same as full speed */
+		ss_ep_in.bEndpointAddress = fs_ep_in.bEndpointAddress;
+		ss_ep_out.bEndpointAddress = fs_ep_out.bEndpointAddress;
+		/* copy SS descriptors */
+		f->ss_descriptors = fb_ss_function;
+	}
+
 	s = env_get("serial#");
 	if (s)
 		g_dnl_set_serialnumber((char *)s);
@@ -363,7 +430,8 @@ static int fastboot_set_alt(struct usb_function *f,
 	debug("%s: func: %s intf: %d alt: %d\n",
 	      __func__, f->name, interface, alt);
 
-	d = fb_ep_desc(gadget, &fs_ep_out, &hs_ep_out);
+	d = fb_ep_desc(gadget, &fs_ep_out, &hs_ep_out, &ss_ep_out,
+		       &ss_ep_out_comp_desc, f_fb->out_ep);
 	ret = usb_ep_enable(f_fb->out_ep, d);
 	if (ret) {
 		puts("failed to enable out ep\n");
@@ -378,7 +446,8 @@ static int fastboot_set_alt(struct usb_function *f,
 	}
 	f_fb->out_req->complete = rx_handler_command;
 
-	d = fb_ep_desc(gadget, &fs_ep_in, &hs_ep_in);
+	d = fb_ep_desc(gadget, &fs_ep_in, &hs_ep_in, &ss_ep_in,
+		       &ss_ep_in_comp_desc, f_fb->in_ep);
 	ret = usb_ep_enable(f_fb->in_ep, d);
 	if (ret) {
 		puts("failed to enable in ep\n");
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index ce8a70bcb3..404e8eafdb 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -2253,14 +2253,18 @@ reset:
 
 	/* Enable the endpoints */
 	d = fsg_ep_desc(common->gadget,
-			&fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc);
+			&fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc,
+			&fsg_ss_bulk_in_desc, &fsg_ss_bulk_in_comp_desc,
+			fsg->bulk_in);
 	rc = enable_endpoint(common, fsg->bulk_in, d);
 	if (rc)
 		goto reset;
 	fsg->bulk_in_enabled = 1;
 
 	d = fsg_ep_desc(common->gadget,
-			&fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc);
+			&fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc,
+			&fsg_ss_bulk_out_desc, &fsg_ss_bulk_out_comp_desc,
+			fsg->bulk_out);
 	rc = enable_endpoint(common, fsg->bulk_out, d);
 	if (rc)
 		goto reset;
@@ -2735,6 +2739,23 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
 			return -ENOMEM;
 		}
 	}
+
+	if (gadget_is_superspeed(gadget)) {
+		/* Assume endpoint addresses are the same as full speed */
+		fsg_ss_bulk_in_desc.bEndpointAddress =
+			fsg_fs_bulk_in_desc.bEndpointAddress;
+		fsg_ss_bulk_out_desc.bEndpointAddress =
+			fsg_fs_bulk_out_desc.bEndpointAddress;
+
+		if (IS_RKUSB_UMS_DNL(c->cdev->driver->name))
+			f->ss_descriptors =
+				usb_copy_descriptors(rkusb_ss_function);
+
+		if (unlikely(!f->ss_descriptors)) {
+			free(f->descriptors);
+			return -ENOMEM;
+		}
+	}
 	return 0;
 
 autoconf_fail:
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index ceeafb6f2b..114da0bbc4 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -45,6 +45,15 @@ static struct usb_descriptor_header *rkusb_hs_function[] = {
 	NULL,
 };
 
+static struct usb_descriptor_header *rkusb_ss_function[] = {
+	(struct usb_descriptor_header *)&rkusb_intf_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_in_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_in_comp_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_out_desc,
+	(struct usb_descriptor_header *)&fsg_ss_bulk_out_comp_desc,
+	NULL,
+};
+
 struct rk_flash_info {
 	u32	flash_size;
 	u16	block_size;
diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index 4d5a9a8c42..ce1b0a3a85 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -530,14 +530,70 @@ static struct usb_descriptor_header *fsg_hs_function[] = {
 	NULL,
 };
 
+static struct usb_endpoint_descriptor
+fsg_ss_bulk_in_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	/* bEndpointAddress copied from fs_bulk_in_desc during fsg_bind() */
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize =	cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor
+fsg_ss_bulk_in_comp_desc = {
+	.bLength		= sizeof(fsg_ss_bulk_in_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
+static struct usb_endpoint_descriptor
+fsg_ss_bulk_out_desc = {
+	.bLength =		USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType =	USB_DT_ENDPOINT,
+
+	/* bEndpointAddress copied from fs_bulk_out_desc during fsg_bind() */
+	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize =	cpu_to_le16(1024),
+};
+
+static struct usb_ss_ep_comp_descriptor
+fsg_ss_bulk_out_comp_desc = {
+	.bLength		= sizeof(fsg_ss_bulk_out_comp_desc),
+	.bDescriptorType	= USB_DT_SS_ENDPOINT_COMP,
+	/* .bMaxBurst		= DYNAMIC, */
+};
+
 /* Maxpacket and other transfer characteristics vary by speed. */
 static struct usb_endpoint_descriptor *
 fsg_ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *fs,
-		struct usb_endpoint_descriptor *hs)
+	    struct usb_endpoint_descriptor *hs,
+	    struct usb_endpoint_descriptor *ss,
+	    struct usb_ss_ep_comp_descriptor *comp_desc,
+	    struct usb_ep *ep)
 {
-	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
-		return hs;
-	return fs;
+	struct usb_endpoint_descriptor *speed_desc = NULL;
+
+	/* select desired speed */
+	switch (g->speed) {
+	case USB_SPEED_SUPER:
+		if (gadget_is_superspeed(g)) {
+			speed_desc = ss;
+			ep->comp_desc = comp_desc;
+			break;
+		}
+		/* else: Fall trough */
+	case USB_SPEED_HIGH:
+		if (gadget_is_dualspeed(g)) {
+			speed_desc = hs;
+			break;
+		}
+		/* else: fall through */
+	default:
+		speed_desc = fs;
+	}
+
+	return speed_desc;
 }
 
 /* Static strings, in UTF-8 (for simplicity we use only ASCII characters) */
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index 86e1ceac3c..e676d8beff 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -49,6 +49,9 @@ struct usb_configuration;
  * @hs_descriptors: Table of high speed descriptors, using interface and
  *	string identifiers assigned during @bind().  If this pointer is null,
  *	the function will not be available at high speed.
+ * @ss_descriptors: Table of super speed descriptors, using interface and
+ *	string identifiers assigned during @bind(). If this pointer is null,
+ *	the function will not be available at super speed.
  * @config: assigned when @usb_add_function() is called; this is the
  *	configuration with which this function is associated.
  * @bind: Before the gadget can register, all of its functions bind() to the
@@ -96,6 +99,7 @@ struct usb_function {
 	struct usb_gadget_strings	**strings;
 	struct usb_descriptor_header	**descriptors;
 	struct usb_descriptor_header	**hs_descriptors;
+	struct usb_descriptor_header	**ss_descriptors;
 
 	struct usb_configuration	*config;
 
@@ -224,6 +228,7 @@ struct usb_configuration {
 	struct list_head	list;
 	struct list_head	functions;
 	u8			next_interface_id;
+	unsigned		superspeed:1;
 	unsigned		highspeed:1;
 	unsigned		fullspeed:1;
 	struct usb_function	*interface[MAX_CONFIG_INTERFACES];
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index b824f13477..0961a64cda 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -427,6 +427,8 @@ static inline void usb_ep_fifo_flush(struct usb_ep *ep)
 
 
 /*-------------------------------------------------------------------------*/
+#define USB_DEFAULT_U1_DEV_EXIT_LAT	0x01	/* Less then 1 microsec */
+#define USB_DEFAULT_U2_DEV_EXIT_LAT	0x1F4	/* Less then 500 microsec */
 
 struct usb_gadget;
 struct usb_gadget_driver;
@@ -549,6 +551,15 @@ static inline int gadget_is_dualspeed(struct usb_gadget *g)
 #endif
 }
 
+/**
+ * gadget_is_superspeed() - return true if the hardware handles superspeed
+ * @g: controller that might support superspeed
+ */
+static inline int gadget_is_superspeed(struct usb_gadget *g)
+{
+	return g->max_speed >= USB_SPEED_SUPER;
+}
+
 /**
  * gadget_is_otg - return true iff the hardware is OTG-ready
  * @g: controller that might have a Mini-AB connector

commit f97316439ce13fb11330d59cbbcf554722bc073d
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Oct 11 17:52:46 2018 +0800

    drivers: rkflash: fix gc recovery bug
    
    Read flash address is out of range.
    
    Change-Id: I46275995b361406ac53549a27c5fd6e6978b7463
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index a051330c1d..a63d3b0c17 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-09-29
+ * date: 2018-10-12
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -5095,7 +5095,7 @@ FlashReadPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r1
-	ldr	r3, .L638
+	ldr	r3, .L639
 	mov	r4, r0
 	mov	r10, #0
 	ldrh	r2, [r3, #12]
@@ -5103,43 +5103,53 @@ FlashReadPages:
 	str	r2, [sp]
 .L612:
 	cmp	r10, fp
-	bne	.L622
+	bne	.L623
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L622:
+.L623:
 	ldr	r3, [r4, #8]
 	cbz	r3, .L613
 	ldr	r3, [r4, #12]
 	cbnz	r3, .L614
 .L613:
 	movs	r2, #90
-	ldr	r1, .L638+4
-	ldr	r0, .L638+8
+	ldr	r1, .L639+4
+	ldr	r0, .L639+8
 	bl	printf
 .L614:
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
+	ldr	r0, [sp, #8]
+	cmp	r0, #3
+	bls	.L615
+	mov	r3, #-1
+	str	r3, [r4]
+.L616:
+	add	r10, r10, #1
+	adds	r4, r4, #20
+	b	.L612
+.L615:
 	ldr	r5, [r4, #8]
-	ldr	r8, .L638+20
-	ldr	r7, .L638+12
+	uxtb	r0, r0
+	ldr	r8, .L639+20
+	ldr	r7, .L639+12
 	tst	r5, #63
 	ldr	r3, [r4, #12]
 	it	ne
 	ldrne	r5, [r8]
 	ldr	r1, [sp, #12]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	mov	r2, r5
 	ldr	r6, [r7, #12]
+	mov	r2, r5
 	blx	r6
 	ldr	r3, [sp, #4]
 	str	r0, [r4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L617
+	bne	.L619
 	ldr	r0, [sp]
 	add	r2, r5, #2048
 	ldr	r3, [r4, #12]
@@ -5150,46 +5160,43 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r7
 	adds	r3, r0, #1
-	beq	.L618
+	beq	.L620
 	ldr	r3, [r4, #12]
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L619
+	bne	.L621
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L619
+	bne	.L621
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L619
-.L618:
+	beq	.L621
+.L620:
 	mov	r3, #-1
 	str	r3, [r4]
-.L619:
+.L621:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L617
+	beq	.L619
 	cmp	r0, #256
 	it	eq
 	streq	r0, [r4]
-.L617:
+.L619:
 	ldr	r3, [r8]
 	cmp	r5, r3
-	bne	.L621
+	bne	.L616
 	ldr	r0, [r4, #8]
 	cmp	r5, r0
-	beq	.L621
-	ldr	r3, .L638+16
+	beq	.L616
+	ldr	r3, .L639+16
 	mov	r1, r5
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L621:
-	add	r10, r10, #1
-	adds	r4, r4, #20
-	b	.L612
-.L639:
+	b	.L616
+.L640:
 	.align	2
-.L638:
+.L639:
 	.word	.LANCHOR0
 	.word	.LANCHOR147
 	.word	.LC1
@@ -5208,36 +5215,36 @@ FlashReadPages:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L650
+	ldr	r3, .L651
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L650+4
+	ldr	r5, .L651+4
 	ldr	r3, [r3]
-	ldr	r7, .L650+8
-	ldr	r10, .L650+20
+	ldr	r7, .L651+8
+	ldr	r10, .L651+20
 	str	r3, [r5, #8]
-	ldr	r3, .L650+12
+	ldr	r3, .L651+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L641:
-	ldr	r3, .L650+16
+.L642:
+	ldr	r3, .L651+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L646
+	bcc	.L647
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L646:
+.L647:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L650+4
+	ldr	fp, .L651+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L642:
+.L643:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L644
+	bgt	.L645
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -5247,22 +5254,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L643
+	beq	.L644
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L643
+	bne	.L644
 	strh	r4, [r7]	@ movhi
-.L644:
+.L645:
 	adds	r6, r6, #1
-	b	.L641
-.L643:
+	b	.L642
+.L644:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L642
-.L651:
+	b	.L643
+.L652:
 	.align	2
-.L650:
+.L651:
 	.word	.LANCHOR115
 	.word	.LANCHOR148
 	.word	.LANCHOR37+10
@@ -5284,17 +5291,17 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L664
+	ldreq	r3, .L665
 	sub	sp, sp, #88
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L664+4
+	ldrne	r3, .L665+4
 	mov	r6, r1
 	add	r0, sp, #4
 	movs	r1, #1
 	ldrh	r5, [r3]
-	ldr	r3, .L664+8
+	ldr	r3, .L665+8
 	subs	r5, r5, #1
 	ldr	r3, [r3]
 	sxth	r5, r5
@@ -5306,17 +5313,17 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L655
+	bne	.L656
 	mov	r8, #0
-.L656:
+.L657:
 	cmp	r8, r5
-	ble	.L659
-.L655:
+	ble	.L660
+.L656:
 	mov	r0, r5
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L659:
+.L660:
 	add	r3, r8, r5
 	mov	r2, r6
 	add	r3, r3, r3, lsr #31
@@ -5329,23 +5336,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L657
+	bne	.L658
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L657
+	bne	.L658
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L657
+	beq	.L658
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L656
-.L657:
+	b	.L657
+.L658:
 	adds	r4, r4, #1
 	sxth	r8, r4
-	b	.L656
-.L665:
+	b	.L657
+.L666:
 	.align	2
-.L664:
+.L665:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	.LANCHOR121
@@ -5363,69 +5370,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L747
+	ldr	r5, .L748
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L747+4
+	ldr	r3, .L748+4
 	ldr	r2, [r5]
-	ldr	r6, .L747+8
+	ldr	r6, .L748+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L747+12
+	ldr	r3, .L748+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L747+16
+	ldr	r7, .L748+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L747+20
+	ldr	r3, .L748+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L747+24
+	ldr	r3, .L748+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L747+28
+	ldr	r3, .L748+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L747+32
+	ldr	r0, .L748+32
 	bl	ftl_memset
-	ldr	r3, .L747+36
+	ldr	r3, .L748+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L667:
-	ldr	r3, .L747+40
+.L668:
+	ldr	r3, .L748+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L708
-	ldr	r3, .L747+44
+	bls	.L709
+	ldr	r3, .L748+44
 	movs	r5, #0
-	ldr	r1, .L747+48
+	ldr	r1, .L748+48
 	mov	fp, r5
 	movs	r7, #20
 	ldrh	r8, [r3]
-	ldr	r3, .L747+52
+	ldr	r3, .L748+52
 	ldr	r2, [r1]
-	ldr	r1, .L747+56
+	ldr	r1, .L748+56
 	ldr	r6, [r3]
-	ldr	r3, .L747+60
+	ldr	r3, .L748+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L747+64
-	b	.L709
-.L669:
+	ldr	r2, .L748+64
+	b	.L710
+.L670:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -5435,7 +5442,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L668
+	cbnz	r0, .L669
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -5448,31 +5455,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L668:
+.L669:
 	adds	r5, r5, #1
-.L709:
+.L710:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L669
+	bhi	.L670
 	cmp	fp, #0
-	bne	.L670
-.L707:
+	bne	.L671
+.L708:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L667
-.L670:
+	b	.L668
+.L671:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L671:
+.L672:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L707
-	ldr	r3, .L747+52
+	bls	.L708
+	ldr	r3, .L748+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -5482,10 +5489,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L674
+	bne	.L675
 	mov	r10, #16
-.L676:
-	ldr	r3, .L747+52
+.L677:
+	ldr	r3, .L748+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -5497,83 +5504,83 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L747+52
+	ldr	r3, .L748+52
 	ldr	r3, [r3]
-	bne	.L673
+	bne	.L674
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L747+52
+	ldr	r3, .L748+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L674
-.L675:
+	bne	.L675
+.L676:
 	movs	r1, #1
-	b	.L746
-.L673:
+	b	.L747
+.L674:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L674
+	bne	.L675
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L676
-	b	.L675
-.L674:
-	ldr	r3, .L747+68
+	bne	.L677
+	b	.L676
+.L675:
+	ldr	r3, .L748+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L677
+	beq	.L678
 	cmp	r2, r3
-	bhi	.L678
-.L677:
+	bhi	.L679
+.L678:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L747+68
+	ldrne	r1, .L748+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L678:
+.L679:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L680
-	bhi	.L681
+	beq	.L681
+	bhi	.L682
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L682
-.L679:
+	beq	.L683
+.L680:
 	adds	r7, r7, #1
-	b	.L671
-.L681:
+	b	.L672
+.L682:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L683
+	beq	.L684
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L679
+	bne	.L680
 	movs	r1, #0
-.L746:
+.L747:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L679
-.L683:
-	ldr	r3, .L747+8
+	b	.L680
+.L684:
+	ldr	r3, .L748+8
 	ldrh	r2, [r3]
-	ldr	r3, .L747
+	ldr	r3, .L748
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L685
+	bls	.L686
 	movw	r2, #1222
-	ldr	r1, .L747+72
-	ldr	r0, .L747+76
+	ldr	r1, .L748+72
+	ldr	r0, .L748+76
 	bl	printf
-.L685:
+.L686:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L747+12
+	ldr	r2, .L748+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -5581,61 +5588,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L686:
+.L687:
 	cmp	r3, r10
-	bgt	.L692
+	bgt	.L693
 	cmp	r3, #0
-	bge	.L724
-	b	.L679
-.L692:
+	bge	.L725
+	b	.L680
+.L693:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L687
+	bls	.L688
 	ldr	r2, [ip]
-	cbnz	r2, .L688
+	cbnz	r2, .L689
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L747+8
+	ldrne	r2, .L748+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L688:
-	ldr	r2, .L747+20
+.L689:
+	ldr	r2, .L748+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L689:
+.L690:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L690
+	bhi	.L691
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L679
-	ldr	r2, .L747+8
+	blt	.L680
+	ldr	r2, .L748+8
 	ldrh	r0, [r2]
-	ldr	r2, .L747
+	ldr	r2, .L748
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L679
-.L724:
-	ldr	r2, .L747+8
+	bgt	.L680
+.L725:
+	ldr	r2, .L748+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L747+20
-.L744:
+	ldr	r2, .L748+20
+.L745:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L679
-.L690:
+	b	.L680
+.L691:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -5643,14 +5650,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L689
-.L687:
+	b	.L690
+.L688:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L686
-.L748:
+	b	.L687
+.L749:
 	.align	2
-.L747:
+.L748:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR141
@@ -5671,72 +5678,72 @@ FtlScanSysBlk:
 	.word	.LANCHOR70
 	.word	.LANCHOR149
 	.word	.LC1
-.L682:
-	ldr	r8, .L749+12
-	ldr	r10, .L749+20
+.L683:
+	ldr	r8, .L750+12
+	ldr	r10, .L750+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L695
+	bls	.L696
 	movw	r2, #1263
-	ldr	r1, .L749
-	ldr	r0, .L749+4
+	ldr	r1, .L750
+	ldr	r0, .L750+4
 	bl	printf
-.L695:
-	ldr	r2, .L749+8
+.L696:
+	ldr	r2, .L750+8
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L696:
+.L697:
 	cmp	r3, r10
-	ble	.L701
+	ble	.L702
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L697
+	bls	.L698
 	ldr	r2, [r0]
-	cbnz	r2, .L698
+	cbnz	r2, .L699
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L749+12
+	ldrne	r2, .L750+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L698:
-	ldr	r2, .L749+16
+.L699:
+	ldr	r2, .L750+16
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L699:
+.L700:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L700
+	bhi	.L701
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L701:
+.L702:
 	cmp	r3, #0
-	blt	.L679
-	ldr	r2, .L749+20
-	ldr	ip, .L749+12
+	blt	.L680
+	ldr	r2, .L750+20
+	ldr	ip, .L750+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L679
+	bgt	.L680
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L749+16
-	b	.L744
-.L700:
+	ldr	r2, .L750+16
+	b	.L745
+.L701:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -5744,88 +5751,88 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L699
-.L697:
+	b	.L700
+.L698:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L696
-.L680:
-	ldr	r8, .L749+40
+	b	.L697
+.L681:
+	ldr	r8, .L750+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L703
-.L745:
+	bne	.L704
+.L746:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L679
-.L703:
+	b	.L680
+.L704:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L704
+	beq	.L705
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L704:
+.L705:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L705
+	bcs	.L706
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L745
-.L705:
+	b	.L746
+.L706:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L679
-.L708:
-	ldr	r3, .L749+24
+	b	.L680
+.L709:
+	ldr	r3, .L750+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L710
-.L713:
-	ldr	r3, .L749+16
+	cbz	r3, .L711
+.L714:
+	ldr	r3, .L750+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L711
-.L712:
-	ldr	r3, .L749+28
+	beq	.L712
+.L713:
+	ldr	r3, .L750+28
 	ldrh	r2, [r3]
-	ldr	r3, .L749+32
+	ldr	r3, .L750+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L743
+	bls	.L744
 	movw	r2, #1388
-	ldr	r1, .L749
-	ldr	r0, .L749+4
+	ldr	r1, .L750
+	ldr	r0, .L750+4
 	bl	printf
-.L743:
+.L744:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L710:
-	ldr	r1, .L749+28
+.L711:
+	ldr	r1, .L750+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L713
-	ldr	r5, .L749+32
+	beq	.L714
+	ldr	r5, .L750+32
 	ldr	r0, [r5]
-.L714:
+.L715:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L713
+	bcs	.L714
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L714
-	ldr	r3, .L749+36
+	beq	.L715
+	ldr	r3, .L750+36
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L715:
+.L716:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L713
+	bcs	.L714
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -5834,30 +5841,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L715
-.L711:
-	ldr	r3, .L749+12
+	b	.L716
+.L712:
+	ldr	r3, .L750+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L712
-	ldr	r5, .L749+20
+	beq	.L713
+	ldr	r5, .L750+20
 	ldrh	r1, [r5]
-.L720:
+.L721:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L712
+	bge	.L713
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L720
-	ldr	r2, .L749+8
+	beq	.L721
+	ldr	r2, .L750+8
 	movs	r0, #0
 	ldr	r2, [r2]
-.L721:
+.L722:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L712
+	bge	.L713
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -5866,10 +5873,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L721
-.L750:
+	b	.L722
+.L751:
 	.align	2
-.L749:
+.L750:
 	.word	.LANCHOR149
 	.word	.LC1
 	.word	.LANCHOR132
@@ -5894,24 +5901,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L780+40
-	ldr	r4, .L780
+	ldr	r8, .L781+40
+	ldr	r4, .L781
 	ldr	r3, [r8]
-	ldr	r7, .L780+4
+	ldr	r7, .L781+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L780+8
+	ldr	r3, .L781+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L752:
+.L753:
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L755
+	bgt	.L756
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -5920,7 +5927,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L753
+	bne	.L754
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -5928,101 +5935,101 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L753:
+.L754:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L754
+	beq	.L755
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L754
-	ldr	r3, .L780+12
+	bne	.L755
+	ldr	r3, .L781+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L755:
-	ldr	r5, .L780+12
+.L756:
+	ldr	r5, .L781+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L769
+	beq	.L770
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L759
+	beq	.L760
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L780
+	ldr	r0, .L781
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L759
+	beq	.L760
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L759
+	bne	.L760
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L759
+	bls	.L760
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L759:
-	ldr	r10, .L780
+.L760:
+	ldr	r10, .L781
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L761:
+.L762:
 	cmp	r7, #0
-	bge	.L764
+	bge	.L765
 	movs	r2, #253
-	ldr	r1, .L780+16
-	ldr	r0, .L780+20
+	ldr	r1, .L781+16
+	ldr	r0, .L781+20
 	bl	printf
-.L763:
+.L764:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L766
-	ldr	r3, .L780+24
+	beq	.L767
+	ldr	r3, .L781+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L766
-	ldr	r3, .L780+28
+	beq	.L767
+	ldr	r3, .L781+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L766
+	bcs	.L767
 	cmp	r0, r3
-	bcs	.L766
+	bcs	.L767
 	bl	FtlSysBlkNumInit
-.L766:
-	ldr	r6, .L780+32
-	movs	r5, #0
-	ldr	r7, .L780+36
-	ldr	r8, .L780+44
 .L767:
+	ldr	r6, .L781+32
+	movs	r5, #0
+	ldr	r7, .L781+36
+	ldr	r8, .L781+44
+.L768:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L768
+	bcc	.L769
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L754:
+.L755:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L752
-.L764:
+	b	.L753
+.L765:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -6034,16 +6041,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L762
+	beq	.L763
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L763
-.L762:
+	beq	.L764
+.L763:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L761
-.L768:
+	b	.L762
+.L769:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -6051,13 +6058,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L767
-.L769:
+	b	.L768
+.L770:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L781:
+.L782:
 	.align	2
-.L780:
+.L781:
 	.word	.LANCHOR148
 	.word	.LANCHOR17
 	.word	.LANCHOR123
@@ -6084,15 +6091,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L803+136
-	ldr	r5, .L803
+	ldr	r8, .L804+136
+	ldr	r5, .L804
 	ldr	r3, [r8]
-	ldr	r4, .L803+4
-	ldr	r10, .L803+140
+	ldr	r4, .L804+4
+	ldr	r10, .L804+140
 	ldrh	r2, [r5]
-	ldr	r7, .L803+8
+	ldr	r7, .L804+8
 	str	r3, [r4, #8]
-	ldr	r6, .L803+12
+	ldr	r6, .L804+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
@@ -6102,41 +6109,41 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L783
-.L791:
+	bne	.L784
+.L792:
 	mov	r0, #-1
-.L782:
+.L783:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L783:
+.L784:
 	movs	r1, #1
 	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L803+16
+	ldr	r3, .L804+16
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L785:
+.L786:
 	cmp	r7, #0
-	bge	.L788
+	bge	.L789
 	mov	r2, #1448
-	ldr	r1, .L803+20
-	ldr	r0, .L803+24
+	ldr	r1, .L804+20
+	ldr	r0, .L804+24
 	bl	printf
-.L787:
-	ldr	r2, .L803+28
+.L788:
+	ldr	r2, .L804+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L790
+	bcs	.L791
 	movw	r2, #1450
-	ldr	r1, .L803+20
-	ldr	r0, .L803+24
+	ldr	r1, .L804+20
+	ldr	r0, .L804+24
 	bl	printf
-.L790:
-	ldr	r7, .L803+32
+.L791:
+	ldr	r7, .L804+32
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
@@ -6157,60 +6164,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L803+36
+	ldr	r3, .L804+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r7]
-	ldr	r3, .L803+16
+	ldr	r3, .L804+16
 	cmp	r2, r3
-	bne	.L791
-	ldr	r3, .L803+40
+	bne	.L792
+	ldr	r3, .L804+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	ldrh	r5, [r7, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L791
-	ldr	r3, .L803+44
-	ldr	r2, .L803+48
+	bne	.L792
+	ldr	r3, .L804+44
+	ldr	r2, .L804+48
 	str	r5, [r3]
-	ldr	r3, .L803+52
+	ldr	r3, .L804+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L803+56
+	ldr	r2, .L804+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L803+60
+	ldr	r2, .L804+60
 	str	r3, [r2]
-	ldr	r3, .L803+64
+	ldr	r3, .L804+64
 	ldr	r6, [r3]
-	ldr	r3, .L803+68
+	ldr	r3, .L804+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L803+72
+	ldr	r3, .L804+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L803+76
+	ldr	r3, .L804+76
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L792
+	bls	.L793
 	mov	r2, #1472
-	ldr	r1, .L803+20
-	ldr	r0, .L803+24
+	ldr	r1, .L804+20
+	ldr	r0, .L804+24
 	bl	printf
-.L792:
+.L793:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L803+80
+	ldr	r3, .L804+80
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L803+84
+	ldr	r7, .L804+84
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L803+88
+	ldr	r1, .L804+88
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -6229,7 +6236,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L803+92
+	ldr	r2, .L804+92
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -6239,31 +6246,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L803+96
+	ldr	r5, .L804+96
 	str	r3, [r5]
-	ldr	r5, .L803+100
+	ldr	r5, .L804+100
 	str	r3, [r5]
-	ldr	r5, .L803+104
+	ldr	r5, .L804+104
 	str	r3, [r5]
-	ldr	r5, .L803+108
+	ldr	r5, .L804+108
 	str	r3, [r5]
-	ldr	r5, .L803+112
+	ldr	r5, .L804+112
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L803+116
+	ldr	r5, .L804+116
 	str	r3, [r5]
-	ldr	r5, .L803+120
+	ldr	r5, .L804+120
 	str	r3, [r5]
-	ldr	r5, .L803+124
+	ldr	r5, .L804+124
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L803+128
+	ldr	r3, .L804+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L803+132
+	ldr	r3, .L804+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -6271,34 +6278,34 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L795
-	ldr	r0, .L803+80
-	bl	make_superblock
-.L795:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
 	beq	.L796
-	ldr	r0, .L803+88
+	ldr	r0, .L804+80
 	bl	make_superblock
 .L796:
-	ldrh	r2, [r5]
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L797
-	ldr	r0, .L803+92
+	ldr	r0, .L804+88
 	bl	make_superblock
 .L797:
-	ldrh	r2, [r7]
+	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L798
-	ldr	r0, .L803+84
+	ldr	r0, .L804+92
 	bl	make_superblock
 .L798:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L799
+	ldr	r0, .L804+84
+	bl	make_superblock
+.L799:
 	movs	r0, #0
-	b	.L782
-.L788:
+	b	.L783
+.L789:
 	ldrh	r2, [r6]
 	mov	r0, fp
 	str	r3, [sp, #4]
@@ -6312,23 +6319,23 @@ FtlLoadSysInfo:
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L786
+	beq	.L787
 	ldr	r2, [r8]
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L786
+	bne	.L787
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L787
-.L786:
+	beq	.L788
+.L787:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L785
-.L804:
+	b	.L786
+.L805:
 	.align	2
-.L803:
+.L804:
 	.word	.LANCHOR5
 	.word	.LANCHOR148
 	.word	.LANCHOR42
@@ -6383,26 +6390,26 @@ FlashProgPages:
 	mov	r10, r1
 	mov	r4, r0
 	mov	r5, r0
-	ldr	r3, .L843
+	ldr	r3, .L846
 	mov	r8, #0
-	ldr	fp, .L843+48
+	ldr	fp, .L846+48
 	str	r2, [sp, #8]
 	ldrh	r3, [r3, #12]
 	str	r3, [sp]
 	lsls	r3, r3, #3
 	str	r3, [sp, #4]
-.L806:
+.L807:
 	cmp	r8, r10
-	bne	.L818
+	bne	.L820
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L836
-	ldr	r6, .L843+4
+	beq	.L838
+	ldr	r6, .L846+4
 	movs	r5, #0
-.L820:
+.L822:
 	cmp	r8, r5
-	beq	.L836
-	ldr	r7, .L843+8
+	beq	.L838
+	ldr	r7, .L846+8
 	movs	r1, #0
 	ldr	r2, [r6]
 	add	r0, sp, #28
@@ -6418,66 +6425,73 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r10, [sp, #28]
 	cmp	r10, #-1
-	bne	.L821
+	bne	.L823
 	ldr	r1, [r4, #4]
-	ldr	r0, .L843+12
+	ldr	r0, .L846+12
 	bl	printf
 	str	r10, [r4]
-.L821:
+.L823:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L822
+	cbz	r3, .L824
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L822
+	beq	.L824
 	ldr	r1, [r4, #4]
-	ldr	r0, .L843+16
+	ldr	r0, .L846+16
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L822:
+.L824:
 	ldr	r3, [r4, #8]
-	cbz	r3, .L823
+	cbz	r3, .L825
 	ldr	r2, [r3]
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L823
+	beq	.L825
 	ldr	r1, [r4, #4]
-	ldr	r0, .L843+20
+	ldr	r0, .L846+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L823:
+.L825:
 	adds	r5, r5, #1
 	adds	r4, r4, #20
-	b	.L820
-.L818:
+	b	.L822
+.L820:
 	ldr	r3, [r5, #8]
-	cbz	r3, .L807
+	cbz	r3, .L808
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L808
-.L807:
-	movs	r2, #130
-	ldr	r1, .L843+24
-	ldr	r0, .L843+28
-	bl	printf
+	cbnz	r3, .L809
 .L808:
+	movs	r2, #134
+	ldr	r1, .L846+24
+	ldr	r0, .L846+28
+	bl	printf
+.L809:
 	add	r2, sp, #20
 	add	r1, sp, #24
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
 	ldr	r6, [sp, #20]
-	cbnz	r6, .L809
+	cmp	r6, #3
+	bls	.L810
+.L845:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L811
+.L810:
+	cbnz	r6, .L812
 	ldr	r3, [sp, #24]
 	ldr	r2, [sp, #4]
 	cmp	r2, r3
-	bls	.L809
-	ldr	r5, .L843+24
-	ldr	r7, .L843+32
-	b	.L842
-.L811:
+	bls	.L812
+	ldr	r5, .L846+24
+	ldr	r7, .L846+32
+	b	.L844
+.L814:
 	mov	r3, #-1
 	ldr	r2, [r4, #-16]
 	str	r3, [r4, #-20]
@@ -6488,49 +6502,49 @@ FlashProgPages:
 	movs	r3, #16
 	movs	r2, #4
 	ldr	r1, [r4, #-12]
-	ldr	r0, .L843+36
+	ldr	r0, .L846+36
 	bl	rknand_print_hex
 	movs	r3, #4
 	ldr	r1, [r4, #-8]
 	mov	r2, r3
-	ldr	r0, .L843+40
+	ldr	r0, .L846+40
 	bl	rknand_print_hex
-.L842:
+.L844:
 	cmp	r6, r10
 	add	r4, r4, #20
-	bne	.L811
-.L836:
+	bne	.L814
+.L838:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L809:
+.L812:
 	ldr	r1, [r5, #8]
 	lsls	r3, r1, #26
-	beq	.L825
-	ldr	r3, .L843+4
+	beq	.L827
+	ldr	r3, .L846+4
 	ldr	r6, [r3]
 	cmp	r1, r6
-	beq	.L812
-	ldr	r3, .L843+44
+	beq	.L815
+	ldr	r3, .L846+44
 	mov	r0, r6
 	ldrh	r2, [r3]
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-.L812:
+.L815:
 	ldr	r3, [r5, #12]
 	mov	r2, r6
 	ldr	r1, [sp, #24]
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	ldr	r7, [fp, #8]
 	blx	r7
-	cbnz	r0, .L813
+	cbnz	r0, .L816
 	str	r0, [r5]
-.L814:
-	ldr	r3, .L843
+.L817:
+	ldr	r3, .L846
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L816
+	bne	.L811
 	ldr	r0, [sp]
 	add	r2, r6, #2048
 	ldr	r3, [r5, #12]
@@ -6540,23 +6554,22 @@ FlashProgPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #20]	@ zero_extendqisi2
 	blx	r6
-	cbz	r0, .L816
-	mov	r3, #-1
-	str	r3, [r5]
-.L816:
+	cmp	r0, #0
+	bne	.L845
+.L811:
 	add	r8, r8, #1
 	adds	r5, r5, #20
-	b	.L806
-.L825:
+	b	.L807
+.L827:
 	mov	r6, r1
-	b	.L812
-.L813:
+	b	.L815
+.L816:
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L814
-.L844:
+	b	.L817
+.L847:
 	.align	2
-.L843:
+.L846:
 	.word	.LANCHOR0
 	.word	.LANCHOR120
 	.word	.LANCHOR122
@@ -6582,133 +6595,133 @@ FlashProgPages:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L888
+	ldr	r3, .L891
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldr	r7, .L888+4
+	ldr	r7, .L891+4
 	mov	r8, #0
 	mov	r6, r1
 	mov	r5, r8
 	str	r0, [r3]
 	mov	r4, r8
-	ldr	r3, .L888+8
+	ldr	r3, .L891+8
 	mov	fp, #20
 	ldr	r10, [r7]
 	str	r0, [sp, #4]
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L888+12
+	ldr	r3, .L891+12
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L888+16
+	ldr	r3, .L891+16
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L888+20
+	ldr	r3, .L891+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L846:
+.L849:
 	ldr	r3, [sp, #12]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L850
+	bhi	.L853
 	cmp	r5, #0
-	beq	.L845
+	beq	.L848
 	mov	r0, r10
 	mov	r8, #0
 	mov	r10, #20
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.L853:
+.L856:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L855
+	bhi	.L858
 	cmp	r6, #0
-	beq	.L871
-	ldr	r3, .L888+24
+	beq	.L874
+	ldr	r3, .L891+24
 	mov	r10, #1
 	ldrh	r3, [r3]
 	str	r3, [sp, #8]
-.L856:
+.L859:
 	movs	r7, #0
-.L865:
-	ldr	r3, .L888+8
+.L868:
+	ldr	r3, .L891+8
 	mov	r8, #0
 	mov	r5, r8
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L888+4
+	ldr	r3, .L891+4
 	ldr	fp, [r3]
-	ldr	r3, .L888+28
+	ldr	r3, .L891+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L888+12
+	ldr	r3, .L891+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L888+20
+	ldr	r3, .L891+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.L857:
+.L860:
 	ldr	r3, [sp, #16]
 	uxth	r2, r8
 	cmp	r3, r2
-	bhi	.L860
-	cbz	r5, .L845
+	bhi	.L863
+	cbz	r5, .L848
 	mov	r0, fp
-	ldr	fp, .L888+4
+	ldr	fp, .L891+4
 	movs	r3, #1
 	mov	r2, r10
 	mov	r1, r5
 	mov	r8, #0
 	bl	FlashProgPages
 	movs	r3, #20
-.L862:
+.L865:
 	uxth	r2, r8
 	cmp	r5, r2
-	bhi	.L864
+	bhi	.L867
 	adds	r7, r7, #1
 	ldr	r2, [sp, #8]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L865
-	ldr	r8, .L888+4
+	bhi	.L868
+	ldr	r8, .L891+4
 	movs	r7, #0
 	mov	fp, #20
-.L866:
+.L869:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L868
+	bhi	.L871
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L869
-	cbz	r6, .L845
-.L869:
-	ldr	r3, .L888+4
+	bls	.L872
+	cbz	r6, .L848
+.L872:
+	ldr	r3, .L891+4
 	mov	r2, r5
 	mov	r1, r10
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L845:
+.L848:
 	mov	r0, r4
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L850:
+.L853:
 	mul	r2, fp, r8
 	movs	r3, #0
 	ldr	r1, [sp, #4]
 	str	r3, [r10, r2]
-	ldr	r3, .L888+32
+	ldr	r3, .L891+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #8]
-	cbz	r6, .L847
+	cbz	r6, .L850
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L848
-.L847:
+	cbnz	r0, .L851
+.L850:
 	ldr	r0, [sp, #8]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L849
+	cbnz	r0, .L852
 	ldr	r3, [sp, #8]
 	mla	r1, fp, r5, r10
 	lsls	r2, r3, #10
@@ -6723,50 +6736,50 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L848:
+.L851:
 	add	r8, r8, #1
-	b	.L846
-.L849:
+	b	.L849
+.L852:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L848
-.L855:
+	b	.L851
+.L858:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L854
+	bne	.L857
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L854:
+.L857:
 	add	r8, r8, #1
-	b	.L853
-.L871:
+	b	.L856
+.L874:
 	movs	r3, #2
 	mov	r10, r6
 	str	r3, [sp, #8]
-	b	.L856
-.L860:
+	b	.L859
+.L863:
 	movs	r3, #20
 	ldr	r1, [sp, #4]
 	mul	r2, r3, r8
 	movs	r3, #0
 	str	r3, [fp, r2]
-	ldr	r3, .L888+32
+	ldr	r3, .L891+32
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	V2P_block
 	str	r0, [sp, #12]
-	cbz	r6, .L858
+	cbz	r6, .L861
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L859
-.L858:
+	cbnz	r0, .L862
+.L861:
 	ldr	r0, [sp, #12]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L859
+	cbnz	r0, .L862
 	movs	r3, #20
 	mla	r1, r3, r5, fp
 	ldr	r3, [sp, #12]
@@ -6782,15 +6795,15 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L859:
+.L862:
 	add	r8, r8, #1
-	b	.L857
-.L864:
+	b	.L860
+.L867:
 	mul	r2, r3, r8
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L863
+	cbz	r2, .L866
 	ldr	r0, [r0, #4]
 	adds	r4, r4, #1
 	str	r3, [sp, #12]
@@ -6798,26 +6811,26 @@ FtlLowFormatEraseBlock:
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
 	ldr	r3, [sp, #12]
-.L863:
+.L866:
 	add	r8, r8, #1
-	b	.L862
-.L868:
-	cbz	r6, .L867
+	b	.L865
+.L871:
+	cbz	r6, .L870
 	mul	r3, fp, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L867
+	cbnz	r3, .L870
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L867:
+.L870:
 	adds	r7, r7, #1
-	b	.L866
-.L889:
+	b	.L869
+.L892:
 	.align	2
-.L888:
+.L891:
 	.word	.LANCHOR111
 	.word	.LANCHOR106
 	.word	.LANCHOR3
@@ -6845,14 +6858,14 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	ldr	r5, [r0, #12]
 	cmp	r3, r2
-	bne	.L891
+	bne	.L894
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L892
+	cbz	r3, .L895
 	movw	r2, #641
-	ldr	r1, .L900
-	ldr	r0, .L900+4
+	ldr	r1, .L903
+	ldr	r0, .L903+4
 	bl	printf
-.L892:
+.L895:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -6864,20 +6877,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L893:
+.L896:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L891:
+.L894:
 	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L900+8
-	ldr	r7, .L900+12
+	ldr	r2, .L903+8
+	ldr	r7, .L903+12
 	ldr	r6, [r0, #24]
 	orr	r3, r3, r5, lsl #10
 	ldr	r0, [r7]
 	str	r3, [r2, #4]
-	ldr	r3, .L900+16
+	ldr	r3, .L903+16
 	str	r0, [r2, #8]
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
@@ -6888,7 +6901,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r5, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L900+20
+	ldr	r3, .L903+20
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -6896,37 +6909,37 @@ Ftl_write_map_blk_to_last_page:
 	movs	r3, #0
 	ldr	r1, [r7]
 	mov	r2, r3
-.L894:
+.L897:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L896
+	bhi	.L899
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L900+8
+	ldr	r0, .L903+8
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L893
-.L896:
+	b	.L896
+.L899:
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
-	bne	.L895
+	bne	.L898
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
-.L895:
+.L898:
 	adds	r3, r3, #1
-	b	.L894
-.L901:
+	b	.L897
+.L904:
 	.align	2
-.L900:
+.L903:
 	.word	.LANCHOR154
 	.word	.LC1
 	.word	.LANCHOR148
@@ -6947,13 +6960,13 @@ FtlMapWritePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r8, .L926+28
+	ldr	r8, .L929+28
 	mov	r7, r1
 	movs	r6, #0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.L903:
-	ldr	r2, .L926
+.L906:
+	ldr	r2, .L929
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -6961,44 +6974,44 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L904
+	bge	.L907
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L905
-.L904:
+	bne	.L908
+.L907:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L905:
+.L908:
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L906
+	cbnz	r3, .L909
 	movw	r2, #699
-	ldr	r1, .L926+4
-	ldr	r0, .L926+8
+	ldr	r1, .L929+4
+	ldr	r0, .L929+8
 	bl	printf
-.L906:
+.L909:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L907
+	bcc	.L910
 	mov	r2, #700
-	ldr	r1, .L926+4
-	ldr	r0, .L926+8
+	ldr	r1, .L929+4
+	ldr	r0, .L929+8
 	bl	printf
-.L907:
+.L910:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L926+12
+	ldr	r5, .L929+12
 	ldrh	r10, [r3, r2, lsl #1]
 	ldrh	r2, [r4, #2]
 	ldr	r3, [sp, #4]
 	orr	r2, r2, r10, lsl #10
 	str	r3, [r5, #8]
 	str	r2, [r5, #4]
-	ldr	r2, .L926+16
+	ldr	r2, .L929+16
 	ldr	r0, [r2]
 	movs	r2, #16
 	str	r0, [r5, #12]
@@ -7021,10 +7034,10 @@ FtlMapWritePage:
 	uxth	r2, r2
 	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L908
+	bne	.L911
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L926+20
+	ldr	r0, .L929+20
 	uxth	r6, r6
 	bl	printf
 	ldrh	r2, [r4, #2]
@@ -7034,40 +7047,40 @@ FtlMapWritePage:
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L910
+	bls	.L913
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L926+24
+	ldr	r0, .L929+24
 	bl	printf
-.L911:
-	b	.L911
-.L910:
+.L914:
+	b	.L914
+.L913:
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L903
-.L925:
-	b	.L925
-.L908:
+	beq	.L906
+.L928:
+	b	.L928
+.L911:
 	cmp	r2, #1
-	beq	.L914
+	beq	.L917
 	cmp	r1, #256
-	beq	.L914
+	beq	.L917
 	ldr	r0, [r4, #36]
-	cbz	r0, .L915
-.L914:
+	cbz	r0, .L918
+.L917:
 	movs	r3, #0
 	str	r3, [r4, #36]
-	b	.L903
-.L915:
+	b	.L906
+.L918:
 	ldr	r2, [r5, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L927:
+.L930:
 	.align	2
-.L926:
+.L929:
 	.word	.LANCHOR66
 	.word	.LANCHOR155
 	.word	.LC1
@@ -7088,31 +7101,31 @@ FtlMapWritePage:
 load_l2p_region:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L935
+	ldr	r3, .L938
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r5, r0
 	mov	r10, r1
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L929
+	bcs	.L932
 	movw	r2, #485
-	ldr	r1, .L935+4
-	ldr	r0, .L935+8
+	ldr	r1, .L938+4
+	ldr	r0, .L938+8
 	bl	printf
-.L929:
-	ldr	fp, .L935+48
+.L932:
+	ldr	fp, .L938+48
 	movs	r4, #12
-	ldr	r7, .L935+12
+	ldr	r7, .L938+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
 	cmp	r8, #0
-	bne	.L930
+	bne	.L933
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L935+16
+	ldr	r2, .L938+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
@@ -7120,21 +7133,21 @@ load_l2p_region:
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	str	r8, [r1, #4]
-.L931:
+.L934:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L930:
+.L933:
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	ldr	r6, .L935+20
+	ldr	r6, .L938+20
 	add	r2, r2, r4
 	mov	r0, r6
 	ldr	r2, [r2, #8]
 	str	r8, [r6, #4]
 	str	r2, [r6, #8]
-	ldr	r2, .L935+24
+	ldr	r2, .L938+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	movs	r2, #1
@@ -7143,55 +7156,55 @@ load_l2p_region:
 	ldr	r10, [r6, #12]
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L932
+	beq	.L935
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L935+28
+	ldr	r0, .L938+28
 	bl	printf
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L935+32
+	ldr	r0, .L938+32
 	bl	rknand_print_hex
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L935+36
+	ldr	r0, .L938+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.L933:
+.L936:
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L934
+	beq	.L937
 	mov	r2, #508
-	ldr	r1, .L935+4
-	ldr	r0, .L935+8
+	ldr	r1, .L938+4
+	ldr	r0, .L938+8
 	bl	printf
-.L934:
+.L937:
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
 	strh	r5, [r3, r4]	@ movhi
-	b	.L931
-.L932:
+	b	.L934
+.L935:
 	ldr	r2, [r6]
 	cmp	r2, #256
-	bne	.L933
+	bne	.L936
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L935+40
+	ldr	r0, .L938+40
 	bl	printf
 	ldr	r3, [r7]
 	mov	r1, r5
-	ldr	r0, .L935+44
+	ldr	r0, .L938+44
 	add	r3, r3, r4
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-	b	.L933
-.L936:
+	b	.L936
+.L939:
 	.align	2
-.L935:
+.L938:
 	.word	.LANCHOR32
 	.word	.LANCHOR156
 	.word	.LC1
@@ -7227,13 +7240,13 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #5
 	cmp	r2, r3
-	blt	.L938
+	blt	.L941
 	uxth	r0, r0
 	ldrh	r8, [r5, r0, lsl #1]
 	cmp	r8, #0
-	beq	.L938
+	beq	.L941
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L938
+	cbnz	r3, .L941
 	movs	r2, #1
 	str	r2, [r4, #32]
 	strh	r3, [r5, r0, lsl #1]	@ movhi
@@ -7241,39 +7254,39 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L953
+	ldr	r3, .L956
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L939
+	bcc	.L942
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L939:
-	ldr	r5, .L953+4
+.L942:
+	ldr	r5, .L956+4
 	movs	r6, #0
-.L940:
+.L943:
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
 	cmp	r3, r10
-	bhi	.L947
+	bhi	.L950
 	movs	r1, #1
 	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L938:
-	ldr	r3, .L953
+.L941:
+	ldr	r3, .L956
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L948
+	bcc	.L951
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L948:
+.L951:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L947:
+.L950:
 	ldr	r3, [sp]
 	uxth	fp, r6
 	add	r3, r3, fp, lsl #2
@@ -7281,53 +7294,53 @@ ftl_map_blk_gc:
 	ldr	r3, [sp]
 	ldr	r2, [r3, fp, lsl #2]
 	cmp	r8, r2, lsr #10
-	bne	.L941
-	ldr	r3, .L953+8
+	bne	.L944
+	ldr	r3, .L956+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L953+4
+	ldr	r0, .L956+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L953+12
+	ldr	r1, .L956+12
 	ldr	r7, [r1]
 	mov	r1, r2
 	str	r7, [r5, #12]
 	bl	FlashReadPages
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	beq	.L942
+	beq	.L945
 	movw	r2, #611
-	ldr	r1, .L953+16
-	ldr	r0, .L953+20
+	ldr	r1, .L956+16
+	ldr	r0, .L956+20
 	bl	printf
-.L942:
+.L945:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	bne	.L943
-.L945:
+	bne	.L946
+.L948:
 	ldr	r2, [sp, #4]
 	movs	r3, #0
 	str	r3, [r2]
-.L944:
-	b	.L944
-.L943:
+.L947:
+	b	.L947
+.L946:
 	ldrh	r2, [r7, #8]
 	cmp	r2, r10
-	bne	.L945
+	bne	.L948
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L945
+	bne	.L948
 	ldr	r2, [r5, #8]
 	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L941:
+.L944:
 	adds	r6, r6, #1
-	b	.L940
-.L954:
+	b	.L943
+.L957:
 	.align	2
-.L953:
+.L956:
 	.word	.LANCHOR20
 	.word	.LANCHOR148
 	.word	.LANCHOR116
@@ -7359,16 +7372,16 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	ldr	r10, [r0, #12]
 	mov	r0, r8
-	ldr	r5, .L982
+	ldr	r5, .L985
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L982+4
+	ldr	r3, .L985+4
 	str	r6, [r4, #32]
 	str	r6, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	str	r2, [r5, #8]
-	ldr	r2, .L982+8
+	ldr	r2, .L985+8
 	ldr	r7, [r2]
 	movw	r2, #65535
 	str	r7, [r5, #12]
@@ -7376,16 +7389,16 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L956:
+.L959:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L973
+	bge	.L976
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L957
+	bne	.L960
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
@@ -7401,22 +7414,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L982
-.L958:
+	ldr	r3, .L985
+.L961:
 	sxth	r2, r6
 	cmp	r2, r10
-	ble	.L960
-.L973:
+	ble	.L963
+.L976:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L982+12
+	ldr	r3, .L985+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L962
+	bne	.L965
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L962:
+.L965:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -7425,9 +7438,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L960:
+.L963:
 	ldrh	r1, [r5]
-	ldr	r0, .L982
+	ldr	r0, .L985
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r3, #4]
@@ -7437,28 +7450,28 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L959
+	beq	.L962
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L959
+	bls	.L962
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L959:
+.L962:
 	adds	r6, r6, #1
-	b	.L958
-.L957:
+	b	.L961
+.L960:
 	ldr	r1, [sp, #8]
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	ldr	r0, .L982
+	ldr	r0, .L985
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L982+12
+	ldr	r3, .L985+12
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -7469,27 +7482,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L975
+	beq	.L978
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L975
+	bne	.L978
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L964
-.L975:
+	beq	.L967
+.L978:
 	movs	r3, #0
-.L965:
-	ldr	r1, .L982+12
+.L968:
+	ldr	r1, .L985+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L971
+	bge	.L974
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #16]
-	ldr	r0, .L982
+	ldr	r0, .L985
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
@@ -7499,33 +7512,33 @@ FtlMapTblRecovery:
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L969
+	beq	.L972
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L969
+	bls	.L972
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L969:
+.L972:
 	adds	r3, r3, #1
-	b	.L965
-.L964:
+	b	.L968
+.L967:
 	ldrh	r2, [r3]
 	movs	r1, #0
 	ldr	r3, [sp, #8]
 	subs	r2, r2, #1
 	ldr	ip, [r3]
-.L966:
+.L969:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L968
-.L971:
+	blt	.L971
+.L974:
 	adds	r6, r6, #1
-	b	.L956
-.L968:
+	b	.L959
+.L971:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -7536,10 +7549,10 @@ FtlMapTblRecovery:
 	movhi	r3, lr
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L966
-.L983:
+	b	.L969
+.L986:
 	.align	2
-.L982:
+.L985:
 	.word	.LANCHOR148
 	.word	.LANCHOR115
 	.word	.LANCHOR123
@@ -7557,36 +7570,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L985
-	ldr	r0, .L985+4
+	ldr	r3, .L988
+	ldr	r0, .L988+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L985+8
+	ldr	r3, .L988+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L985+12
+	ldr	r3, .L988+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L985+16
+	ldr	r3, .L988+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L985+20
+	ldr	r3, .L988+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L985+24
+	ldr	r3, .L988+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L985+28
+	ldr	r3, .L988+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L986:
+.L989:
 	.align	2
-.L985:
+.L988:
 	.word	.LANCHOR27
 	.word	.LANCHOR158
 	.word	.LANCHOR35
@@ -7609,13 +7622,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L988
+	ldr	r0, .L991
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L989:
+.L992:
 	.align	2
-.L988:
+.L991:
 	.word	.LANCHOR140
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.flush_l2p_region,"ax",%progbits
@@ -7631,9 +7644,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L991
+	ldr	r5, .L994
 	muls	r4, r0, r4
-	ldr	r0, .L991+4
+	ldr	r0, .L994+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -7646,9 +7659,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L992:
+.L995:
 	.align	2
-.L991:
+.L994:
 	.word	.LANCHOR55
 	.word	.LANCHOR140
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -7665,36 +7678,36 @@ log2phys:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r2
-	ldr	r4, .L1006
+	ldr	r4, .L1009
 	mov	r10, r0
 	mov	r5, r1
-	ldr	r3, .L1006+4
+	ldr	r3, .L1009+4
 	ldr	r2, [r4]
 	ldrh	fp, [r3]
 	cmp	r0, r2
-	bcc	.L994
+	bcc	.L997
 	movw	r2, #811
-	ldr	r1, .L1006+8
-	ldr	r0, .L1006+12
+	ldr	r1, .L1009+8
+	ldr	r0, .L1009+12
 	bl	printf
-.L994:
+.L997:
 	ldr	r3, [r4]
 	cmp	r10, r3
-	bcs	.L995
-	ldr	r3, .L1006+16
+	bcs	.L998
+	ldr	r3, .L1009+16
 	add	fp, fp, #7
 	lsr	r6, r10, fp
 	movs	r2, #0
 	ldrh	r1, [r3]
 	uxth	r6, r6
-	ldr	r3, .L1006+20
+	ldr	r3, .L1009+20
 	ldr	r0, [r3]
 	mov	r8, r3
 	movs	r3, #12
-.L996:
+.L999:
 	uxth	r4, r2
 	cmp	r4, r1
-	bcc	.L1001
+	bcc	.L1004
 	str	r3, [sp, #4]
 	bl	select_l2p_ram_region
 	ldr	r3, [sp, #4]
@@ -7705,31 +7718,31 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1002
+	beq	.L1005
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L1002
+	bge	.L1005
 	bl	flush_l2p_region
-.L1002:
+.L1005:
 	mov	r1, r4
 	mov	r0, r6
 	bl	load_l2p_region
-	b	.L998
-.L995:
+	b	.L1001
+.L998:
 	mov	r0, #-1
-	cbnz	r7, .L993
+	cbnz	r7, .L996
 	str	r0, [r5]
-.L993:
+.L996:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1001:
+.L1004:
 	adds	r2, r2, #1
 	mla	ip, r3, r2, r0
 	ldrh	ip, [ip, #-12]
 	cmp	ip, r6
-	bne	.L996
-.L998:
+	bne	.L999
+.L1001:
 	movs	r0, #1
 	ldr	r2, [r8]
 	lsl	r0, r0, fp
@@ -7738,35 +7751,35 @@ log2phys:
 	and	r0, r0, r10
 	uxth	r0, r0
 	mla	r3, r3, r4, r2
-	cbnz	r7, .L999
+	cbnz	r7, .L1002
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r0, lsl #2]
 	str	r3, [r5]
-.L1000:
+.L1003:
 	ldr	r2, [r8]
 	movs	r3, #12
 	mla	r4, r3, r4, r2
 	ldr	r3, [r4, #4]
 	adds	r2, r3, #1
-	beq	.L1004
+	beq	.L1007
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-.L1004:
+.L1007:
 	movs	r0, #0
-	b	.L993
-.L999:
+	b	.L996
+.L1002:
 	ldr	r1, [r5]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r0, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L1006+24
+	ldr	r3, .L1009+24
 	strh	r6, [r3]	@ movhi
-	b	.L1000
-.L1007:
+	b	.L1003
+.L1010:
 	.align	2
-.L1006:
+.L1009:
 	.word	.LANCHOR61
 	.word	.LANCHOR22
 	.word	.LANCHOR159
@@ -7788,22 +7801,22 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L1018
+	ldr	r5, .L1021
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L1009
-	ldr	r2, .L1018+4
+	cbnz	r3, .L1012
+	ldr	r2, .L1021+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L1010
-	ldr	r2, .L1018+8
+	beq	.L1013
+	ldr	r2, .L1021+8
 	movw	lr, #65535
-	ldr	ip, .L1018+24
-	ldr	r0, .L1018+12
+	ldr	ip, .L1021+24
+	ldr	r0, .L1021+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -7812,22 +7825,22 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L1011:
+.L1014:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L1010
+	bls	.L1013
 	cmp	r4, r7
-	bne	.L1012
+	bne	.L1015
 	mov	r1, r4
-	ldr	r0, .L1018+4
+	ldr	r0, .L1021+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L1013
+	cbnz	r3, .L1016
 	movw	r2, #1699
-	ldr	r1, .L1018+16
-	ldr	r0, .L1018+20
+	ldr	r1, .L1021+16
+	ldr	r0, .L1021+20
 	bl	printf
-.L1013:
+.L1016:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -7835,17 +7848,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L1009:
+.L1012:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L1010
-.L1012:
+	b	.L1013
+.L1015:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L1011
-.L1010:
+	bne	.L1014
+.L1013:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -7853,9 +7866,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1019:
+.L1022:
 	.align	2
-.L1018:
+.L1021:
 	.word	.LANCHOR42
 	.word	.LANCHOR47
 	.word	.LANCHOR40
@@ -7877,56 +7890,56 @@ ftl_check_vpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1044
-	ldr	r5, .L1044+4
-	ldr	r1, .L1044+8
-	ldr	r0, .L1044+12
+	ldr	r6, .L1047
+	ldr	r5, .L1047+4
+	ldr	r1, .L1047+8
+	ldr	r0, .L1047+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L1044+4
+	ldr	r0, .L1047+4
 	bl	ftl_memset
-.L1021:
+.L1024:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1023
-	ldr	r10, .L1044+48
+	bcc	.L1026
+	ldr	r10, .L1047+48
 	movs	r4, #0
-	ldr	r7, .L1044+16
+	ldr	r7, .L1047+16
 	mov	r6, r4
-.L1024:
+.L1027:
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L1026
-	ldr	r3, .L1044+20
+	bhi	.L1029
+	ldr	r3, .L1047+20
 	ldr	r4, [r3]
-	cbz	r4, .L1027
-	ldr	r3, .L1044+24
+	cbz	r4, .L1030
+	ldr	r3, .L1047+24
 	mov	r8, #0
-	ldr	r5, .L1044+28
-	ldr	r10, .L1044+16
+	ldr	r5, .L1047+28
+	ldr	r10, .L1047+16
 	ldrh	r7, [r3]
 	ldr	r3, [r5]
-	ldr	fp, .L1044+4
+	ldr	fp, .L1047+4
 	subs	r4, r4, r3
-	ldr	r3, .L1044+32
+	ldr	r3, .L1047+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L1028:
+.L1031:
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L1027
+	bls	.L1030
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L1029
+	cbz	r2, .L1032
 	movs	r6, #1
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L1044+36
+	ldr	r0, .L1047+36
 	bl	printf
-.L1029:
+.L1032:
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
@@ -7934,59 +7947,59 @@ ftl_check_vpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L1028
-.L1027:
-	cbz	r6, .L1020
+	bne	.L1031
+.L1030:
+	cbz	r6, .L1023
 	movw	r2, #2343
-	ldr	r1, .L1044+8
-	ldr	r0, .L1044+40
+	ldr	r1, .L1047+8
+	ldr	r0, .L1047+40
 	bl	printf
-.L1020:
+.L1023:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1023:
+.L1026:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1022
+	beq	.L1025
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L1022:
+.L1025:
 	adds	r4, r4, #1
-	b	.L1021
-.L1026:
+	b	.L1024
+.L1029:
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L1044+4
+	ldr	r8, .L1047+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L1025
+	beq	.L1028
 	mov	r1, r5
-	ldr	r0, .L1044+44
+	ldr	r0, .L1047+44
 	bl	printf
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L1025
+	beq	.L1028
 	ldrh	r2, [r8, r5, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L1025:
+.L1028:
 	adds	r4, r4, #1
-	b	.L1024
-.L1045:
+	b	.L1027
+.L1048:
 	.align	2
-.L1044:
+.L1047:
 	.word	.LANCHOR61
 	.word	check_vpc_table
 	.word	.LANCHOR161
@@ -8014,60 +8027,60 @@ ftl_scan_all_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L1060
+	ldr	r7, .L1063
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L1060+24
-	ldr	r0, .L1060+4
+	ldr	r8, .L1063+24
+	ldr	r0, .L1063+4
 	bl	printf
-.L1047:
+.L1050:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1053
+	bcc	.L1056
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1053:
+.L1056:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L1048
+	cbnz	r3, .L1051
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L1048:
+.L1051:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L1050
-	ldr	r4, .L1060+8
+	beq	.L1053
+	ldr	r4, .L1063+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L1060+12
+	ldr	r3, .L1063+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L1060+16
+	ldr	r3, .L1063+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L1051
+	beq	.L1054
 	adds	r3, r3, #1
-	beq	.L1051
+	beq	.L1054
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L1050
-.L1051:
+	beq	.L1053
+.L1054:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L1060+20
+	ldr	r0, .L1063+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -8082,12 +8095,12 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L1050:
+.L1053:
 	adds	r5, r5, #1
-	b	.L1047
-.L1061:
+	b	.L1050
+.L1064:
 	.align	2
-.L1060:
+.L1063:
 	.word	.LANCHOR61
 	.word	.LC97
 	.word	.LANCHOR148
@@ -8107,7 +8120,7 @@ ftl_scan_all_data:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1092
+	ldr	r3, .L1098
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	mov	r4, r0
@@ -8115,63 +8128,63 @@ FtlGcScanTempBlk:
 	ldrh	r5, [r3]
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1086
-	cbnz	r5, .L1063
-.L1064:
+	beq	.L1090
+	cbnz	r5, .L1066
+.L1067:
 	bl	FtlGcPageVarInit
-	b	.L1065
-.L1086:
+	b	.L1068
+.L1090:
 	movs	r5, #0
-.L1063:
-	ldr	r3, .L1092+4
+.L1066:
+	ldr	r3, .L1098+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	beq	.L1064
-.L1065:
-	ldr	fp, .L1092+48
+	beq	.L1067
+.L1068:
+	ldr	fp, .L1098+52
 	movs	r3, #0
 	str	r3, [sp]
-.L1066:
+.L1069:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	strb	r3, [r4, #8]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1067
-.L1083:
-	ldr	r3, .L1092+8
+	beq	.L1070
+.L1087:
+	ldr	r3, .L1098+8
 	movs	r2, #0
 	ldr	r0, [fp]
 	mov	r7, r2
 	movw	lr, #65535
 	mov	r8, #20
 	ldrh	r10, [r3]
-	ldr	r3, .L1092+12
+	ldr	r3, .L1098+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1092+16
+	ldr	r3, .L1098+16
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L1092+20
+	ldr	r3, .L1098+20
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L1092+24
+	ldr	r3, .L1098+24
 	ldrh	ip, [r3]
 	add	r3, r4, #16
 	str	r3, [sp, #4]
-.L1068:
+.L1071:
 	uxth	r3, r2
 	cmp	r10, r3
-	bhi	.L1070
+	bhi	.L1073
 	mov	r10, #0
 	movs	r2, #0
 	mov	r1, r7
 	bl	FlashReadPages
-.L1071:
+.L1074:
 	uxth	r3, r10
 	cmp	r7, r3
-	bhi	.L1081
+	bhi	.L1085
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxth	r5, r5
@@ -8180,14 +8193,14 @@ FtlGcScanTempBlk:
 	ldr	r2, [sp]
 	ldr	r3, [sp, #8]
 	cmp	r3, r2
-	ldr	r2, .L1092+4
-	bls	.L1082
-.L1084:
+	ldr	r2, .L1098+4
+	bls	.L1086
+.L1088:
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	bhi	.L1083
-.L1067:
-	ldr	r3, .L1092
+	bhi	.L1087
+.L1070:
+	ldr	r3, .L1098
 	movw	r2, #65535
 	strh	r5, [r4, #2]	@ movhi
 	mov	r1, r5
@@ -8196,13 +8209,13 @@ FtlGcScanTempBlk:
 	movs	r2, #0
 	strb	r2, [r4, #6]
 	bl	ftl_sb_update_avl_pages
-	b	.L1085
-.L1070:
+	b	.L1089
+.L1073:
 	ldr	r1, [sp, #4]
 	ldrh	r3, [r1], #2
 	cmp	r3, lr
 	str	r1, [sp, #4]
-	beq	.L1069
+	beq	.L1072
 	mla	r1, r8, r7, r0
 	ldr	r6, [sp, #12]
 	orr	r3, r5, r3, lsl #10
@@ -8219,10 +8232,10 @@ FtlGcScanTempBlk:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1069:
+.L1072:
 	adds	r2, r2, #1
-	b	.L1068
-.L1081:
+	b	.L1071
+.L1085:
 	movs	r3, #20
 	ldr	r1, [fp]
 	mul	r3, r3, r10
@@ -8230,110 +8243,105 @@ FtlGcScanTempBlk:
 	ldr	r6, [r1, r3]
 	ldr	r0, [r2, #4]
 	str	r0, [sp, #4]
-	cmp	r6, #0
-	bne	.L1072
+	cbnz	r6, .L1075
 	ldr	r8, [r2, #12]
-	movw	r1, #65535
-	ldrh	r2, [r8]
-	cmp	r2, r1
-	bne	.L1073
-	ldr	r3, .L1092+28
-	ldrh	r1, [r4]
-	str	r2, [sp, #4]
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L1076
+.L1075:
+	ldr	r3, .L1098+28
+	movs	r1, #0
+	ldrh	r2, [r4]
+	movs	r5, #0
 	ldr	r3, [r3]
-	strh	r6, [r3, r1, lsl #1]	@ movhi
+	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [r4]
 	bl	INSERT_FREE_LIST
-	ldr	r2, [sp, #4]
-	strh	r2, [r4]	@ movhi
-.L1091:
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
 	bl	FtlGcPageVarInit
-	movs	r5, #0
-	b	.L1066
-.L1073:
+	b	.L1069
+.L1076:
+	str	r3, [sp, #12]
+	ldr	r3, .L1098+32
+	ldr	r0, [r8, #8]
+	ldr	r2, [r3]
+	cmp	r0, r2
+	bhi	.L1075
 	mov	r2, r6
 	add	r1, sp, #24
-	ldr	r0, [r8, #8]
-	str	r3, [sp, #12]
 	bl	log2phys
 	ldr	r2, [r8, #12]
 	ldr	r1, [sp, #24]
 	ldr	r3, [sp, #12]
 	cmp	r2, r1
-	beq	.L1075
-.L1079:
+	beq	.L1079
+.L1080:
 	ldr	r2, [r8, #8]
 	add	r10, r10, #1
 	ldr	r1, [sp, #4]
 	ldr	r0, [r8, #12]
 	bl	FtlGcUpdatePage
-	b	.L1071
-.L1075:
+	b	.L1074
+.L1079:
 	str	r3, [sp, #12]
+	adds	r3, r2, #1
+	beq	.L1080
+	str	r2, [sp, #32]
 	movs	r1, #1
-	ldr	r3, .L1092+32
+	ldr	r2, .L1098+36
 	add	r0, sp, #28
-	str	r2, [sp, #32]
-	ldr	r2, [r3]
+	ldr	r2, [r2]
 	str	r2, [sp, #36]
-	ldr	r2, .L1092+36
+	ldr	r2, .L1098+40
 	ldr	r2, [r2]
 	str	r2, [sp, #40]
 	mov	r2, r6
 	bl	FlashReadPages
-	ldr	r2, .L1092+40
+	ldr	r2, .L1098+44
 	ldr	r1, [fp]
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	ldr	r0, [sp, #36]
 	add	ip, r3, r1
 	lsls	r2, r2, #7
-.L1076:
+.L1081:
 	cmp	r6, r2
-	beq	.L1079
+	beq	.L1080
 	ldr	r1, [ip, #8]
 	ldr	r3, [r0, r6, lsl #2]
 	ldr	r1, [r1, r6, lsl #2]
 	cmp	r1, r3
-	beq	.L1077
+	beq	.L1082
 	ldr	r2, [sp, #32]
 	ldrh	r1, [r4]
-	ldr	r0, .L1092+44
+	ldr	r0, .L1098+48
 	bl	printf
-.L1072:
-	ldr	r3, .L1092+28
-	movs	r1, #0
-	ldrh	r2, [r4]
-	ldr	r3, [r3]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4]
-	bl	INSERT_FREE_LIST
-	movw	r3, #65535
-	strh	r3, [r4]	@ movhi
-	b	.L1091
-.L1077:
-	adds	r6, r6, #1
-	b	.L1076
+	b	.L1075
 .L1082:
-	ldr	r1, .L1092
+	adds	r6, r6, #1
+	b	.L1081
+.L1086:
+	ldr	r1, .L1098
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
-	beq	.L1084
+	beq	.L1088
 	ldr	r0, [sp]
 	add	r3, r3, r0
 	strh	r3, [r1]	@ movhi
 	ldrh	r3, [r2]
 	cmp	r3, r5
-	bls	.L1084
-.L1085:
+	bls	.L1088
+.L1089:
 	mov	r0, #-1
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1093:
+.L1099:
 	.align	2
-.L1092:
+.L1098:
 	.word	.LANCHOR162
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -8342,6 +8350,7 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR92
 	.word	.LANCHOR24
 	.word	.LANCHOR42
+	.word	.LANCHOR61
 	.word	.LANCHOR119
 	.word	.LANCHOR124
 	.word	.LANCHOR12
@@ -8359,24 +8368,24 @@ FtlGcScanTempBlk:
 FtlReadRefresh:
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1107
+	ldr	r3, .L1113
 	push	{r4, r5, r6, lr}
 	sub	sp, sp, #88
 	mov	r4, r3
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
-	beq	.L1095
-	ldr	r6, .L1107+4
+	beq	.L1101
+	ldr	r6, .L1113+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
 	cmp	r0, r1
-	bcs	.L1096
+	bcs	.L1102
 	mov	r5, #2048
-.L1101:
+.L1107:
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L1098
+	bcs	.L1104
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
@@ -8385,10 +8394,10 @@ FtlReadRefresh:
 	adds	r1, r2, #1
 	add	r3, r3, #1
 	str	r3, [r4, #84]
-	beq	.L1099
+	beq	.L1105
 	str	r3, [sp, #20]
 	add	r0, sp, #88
-	ldr	r3, .L1107+8
+	ldr	r3, .L1113+8
 	movs	r1, #1
 	str	r2, [sp, #8]
 	movs	r2, #0
@@ -8400,58 +8409,58 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L1098
+	bne	.L1104
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L1098:
+.L1104:
 	mov	r0, #-1
-.L1094:
+.L1100:
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.L1099:
+.L1105:
 	subs	r5, r5, #1
-	bne	.L1101
-	b	.L1098
-.L1096:
-	ldr	r2, .L1107+12
+	bne	.L1107
+	b	.L1104
+.L1102:
+	ldr	r2, .L1113+12
 	movs	r0, #0
 	str	r0, [r3, #80]
 	str	r0, [r3, #84]
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
-	b	.L1094
-.L1095:
+	b	.L1100
+.L1101:
 	ldr	r1, [r3, #76]
-	ldr	r3, .L1107+12
+	ldr	r3, .L1113+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
-	bhi	.L1104
-	ldr	r3, .L1107+16
+	bhi	.L1110
+	ldr	r3, .L1113+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
 	asrs	r3, r3, r2
 	add	r3, r3, r1
 	cmp	r5, r3
-	bhi	.L1104
-	ldr	r3, .L1107+20
+	bhi	.L1110
+	ldr	r3, .L1113+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1094
-.L1104:
+	bne	.L1100
+.L1110:
 	movs	r3, #1
 	movs	r0, #0
 	str	r3, [r4, #80]
 	str	r0, [r4, #84]
 	str	r5, [r4, #76]
-	b	.L1094
-.L1108:
+	b	.L1100
+.L1114:
 	.align	2
-.L1107:
+.L1113:
 	.word	.LANCHOR81
 	.word	.LANCHOR61
 	.word	.LANCHOR121
@@ -8473,44 +8482,44 @@ FtlMapBlkWriteDump_data:
 	ldr	r3, [r0, #36]
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
-	cbz	r3, .L1109
+	cbz	r3, .L1115
 	ldrh	r5, [r0, #6]
 	movs	r3, #0
 	ldr	r2, [r0, #24]
 	str	r3, [r0, #36]
 	subs	r5, r5, #1
-	ldr	r3, .L1113
-	ldr	r1, .L1113+4
+	ldr	r3, .L1119
+	ldr	r1, .L1119+4
 	uxth	r5, r5
-	ldr	r4, .L1113+8
+	ldr	r4, .L1119+8
 	ldr	r2, [r2, r5, lsl #2]
 	ldr	r0, [r3]
 	ldr	r1, [r1]
 	str	r2, [r4, #4]
 	str	r0, [r4, #8]
 	str	r1, [r4, #12]
-	cbz	r2, .L1111
+	cbz	r2, .L1117
 	movs	r2, #1
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.L1112:
+.L1118:
 	ldr	r2, [r4, #8]
 	mov	r1, r5
 	mov	r0, r6
 	pop	{r4, r5, r6, lr}
 	b	FtlMapWritePage
-.L1111:
-	ldr	r3, .L1113+12
+.L1117:
+	ldr	r3, .L1119+12
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1112
-.L1109:
+	b	.L1118
+.L1115:
 	pop	{r4, r5, r6, pc}
-.L1114:
+.L1120:
 	.align	2
-.L1113:
+.L1119:
 	.word	.LANCHOR116
 	.word	.LANCHOR123
 	.word	.LANCHOR148
@@ -8531,8 +8540,8 @@ FlashTestBlk:
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #92
-	bls	.L1117
-	ldr	r5, .L1118
+	bls	.L1123
+	ldr	r5, .L1124
 	add	r0, sp, #24
 	movs	r2, #32
 	movs	r1, #165
@@ -8564,17 +8573,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1115:
+.L1121:
 	mov	r0, r4
 	add	sp, sp, #92
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1117:
+.L1123:
 	movs	r4, #0
-	b	.L1115
-.L1119:
+	b	.L1121
+.L1125:
 	.align	2
-.L1118:
+.L1124:
 	.word	.LANCHOR121
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -8590,28 +8599,28 @@ FtlBbmTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r7, .L1129
+	ldr	r7, .L1135
 	movs	r1, #0
-	ldr	r5, .L1129+4
+	ldr	r5, .L1135+4
 	ldr	r3, [r7]
 	mov	fp, r7
-	ldr	r8, .L1129+48
-	ldr	r6, .L1129+8
+	ldr	r8, .L1135+48
+	ldr	r6, .L1135+8
 	str	r3, [r5, #12]
-	ldr	r7, .L1129+12
-	ldr	r3, .L1129+16
-	ldr	r10, .L1129+52
+	ldr	r7, .L1135+12
+	ldr	r3, .L1135+16
+	ldr	r10, .L1135+52
 	ldr	r0, [r8]
 	ldrh	r2, [r3]
 	str	r0, [r5, #8]
 	bl	ftl_memset
-.L1121:
+.L1127:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1122
+	blt	.L1128
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1129+20
+	ldr	r4, .L1135+20
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -8628,10 +8637,10 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1129+24
+	ldr	r3, .L1135+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1123:
+.L1129:
 	ldr	r3, [r8]
 	ldrh	r2, [r4, #2]
 	ldrh	r1, [r4]
@@ -8645,14 +8654,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1129+28
+	ldr	r0, .L1135+28
 	bl	printf
-	ldr	r3, .L1129+32
+	ldr	r3, .L1135+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1124
+	blt	.L1130
 	ldr	r3, [r4, #8]
 	mov	r1, #0	@ movhi
 	ldrh	r2, [r4]
@@ -8663,7 +8672,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1129+36
+	ldr	r2, .L1135+36
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -8672,9 +8681,9 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-.L1124:
+.L1130:
 	movs	r3, #1
-	ldr	r0, .L1129+4
+	ldr	r0, .L1135+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -8683,21 +8692,21 @@ FtlBbmTblFlush:
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1125
+	bne	.L1131
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1129+40
+	ldr	r0, .L1135+40
 	bl	printf
 	cmp	r7, #3
-	bls	.L1123
+	bls	.L1129
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1129+44
+	ldr	r0, .L1135+44
 	bl	printf
-.L1127:
-	b	.L1127
-.L1122:
+.L1133:
+	b	.L1133
+.L1128:
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -8706,22 +8715,22 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1121
-.L1128:
+	b	.L1127
+.L1134:
 	movs	r3, #1
 	str	r3, [sp, #12]
-	b	.L1123
-.L1125:
+	b	.L1129
+.L1131:
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1128
+	beq	.L1134
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1130:
+.L1136:
 	.align	2
-.L1129:
+.L1135:
 	.word	.LANCHOR123
 	.word	.LANCHOR148
 	.word	.LANCHOR37+24
@@ -8750,26 +8759,26 @@ allocate_data_superblock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L1132:
-	ldr	r3, .L1171
-	ldr	r8, .L1171+68
+.L1138:
+	ldr	r3, .L1177
+	ldr	r8, .L1177+68
 	ldrh	r3, [r3]
-	ldr	r10, .L1171+72
+	ldr	r10, .L1177+72
 	ldrh	r2, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L1133
+	ble	.L1139
 	movw	r2, #2615
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1133:
-	ldr	r3, .L1171+12
+.L1139:
+	ldr	r3, .L1177+12
 	cmp	r4, r3
-	bne	.L1159
-	ldr	r3, .L1171
-	ldr	r2, .L1171+16
+	bne	.L1165
+	ldr	r3, .L1177
+	ldr	r2, .L1177+16
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -8777,118 +8786,118 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-	cbz	r1, .L1134
+	cbz	r1, .L1140
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1134:
-	ldr	r0, .L1171+20
+.L1140:
+	ldr	r0, .L1177+20
 	bl	List_pop_index_node
-	ldr	r3, .L1171
+	ldr	r3, .L1177
 	mov	r5, r0
 	uxth	r7, r0
 	ldrh	r3, [r3]
-	cbnz	r3, .L1135
+	cbnz	r3, .L1141
 	mov	r2, #2624
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1135:
-	ldr	r3, .L1171
-	ldr	r2, .L1171
+.L1141:
+	ldr	r3, .L1177
+	ldr	r2, .L1177
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r10]
 	cmp	r3, r7
-	bls	.L1132
+	bls	.L1138
 	uxth	r5, r5
 	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1171+24
+	ldr	r3, .L1177+24
 	ldr	r3, [r3]
 	ldrh	r6, [r3, r5, lsl #1]
 	cmp	r6, #0
-	bne	.L1132
+	bne	.L1138
 	strh	r7, [r4]	@ movhi
 	mov	r0, r4
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1137
-	ldr	r3, .L1171+24
+	cbnz	r3, .L1143
+	ldr	r3, .L1177+24
 	movw	r2, #65535
 	mov	r0, r7
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L1171
+	ldr	r3, .L1177
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L1132
+	ble	.L1138
 	movw	r2, #2638
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-	b	.L1132
-.L1159:
+	b	.L1138
+.L1165:
 	movs	r1, #0
-	b	.L1134
-.L1137:
-	ldr	r3, .L1171
+	b	.L1140
+.L1143:
+	ldr	r3, .L1177
 	ldrh	r2, [r8]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
 	ldrh	r2, [r10]
 	cmp	r3, r2
-	ble	.L1139
+	ble	.L1145
 	movw	r2, #2641
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1139:
-	ldr	r3, .L1171+28
+.L1145:
+	ldr	r3, .L1177+28
 	add	lr, r4, #16
-	ldr	r2, .L1171+32
+	ldr	r2, .L1177+32
 	mov	r8, #0
 	ldr	ip, [r3]
 	ldrh	r0, [r2]
 	movs	r2, #20
 	mov	r3, ip
 	mla	r0, r2, r0, ip
-.L1140:
+.L1146:
 	cmp	r0, r3
-	bne	.L1142
-	cbnz	r6, .L1143
+	bne	.L1148
+	cbnz	r6, .L1149
 	movw	r2, #2652
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1143:
-	ldr	r3, .L1171+36
+.L1149:
+	ldr	r3, .L1177+36
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L1144
+	bne	.L1150
 	movw	r2, #2654
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1144:
+.L1150:
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, .L1171+40
-	ldr	fp, .L1171+76
-	ldr	r8, .L1171+80
+	ldr	r3, .L1177+40
+	ldr	fp, .L1177+76
+	ldr	r8, .L1177+80
 	ldr	r1, [r3]
 	cmp	r2, #0
-	bne	.L1145
+	bne	.L1151
 	ldrh	r2, [r1, r5, lsl #1]
 	cmp	r2, #0
-	beq	.L1146
-	ldr	r0, .L1171+44
+	beq	.L1152
+	ldr	r0, .L1177+44
 	ldrh	r0, [r0]
 	add	r2, r2, r0
-.L1169:
+.L1175:
 	strh	r2, [r1, r5, lsl #1]	@ movhi
 	mov	r0, r7
 	ldr	r2, [fp]
@@ -8897,83 +8906,83 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [fp]
 	bl	ftl_set_blk_mode
-.L1170:
+.L1176:
 	ldr	r3, [sp, #4]
 	ldr	r0, [fp]
 	ldr	r3, [r3]
 	ldrh	r1, [r3, r5, lsl #1]
-	ldr	r3, .L1171+48
+	ldr	r3, .L1177+48
 	ldr	r2, [r3]
 	cmp	r1, r2
 	it	hi
 	strhi	r1, [r3]
-	ldr	r3, .L1171+44
+	ldr	r3, .L1177+44
 	ldrh	r1, [r10]
 	ldrh	r2, [r3]
 	ldr	r3, [r8]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1171+52
-	ldr	ip, .L1171+84
+	ldr	r3, .L1177+52
+	ldr	ip, .L1177+84
 	str	r0, [r3]
-	ldr	r3, .L1171+56
+	ldr	r3, .L1177+56
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
 	movs	r2, #20
-	ldr	r3, .L1171+28
+	ldr	r3, .L1177+28
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.L1150:
+.L1156:
 	adds	r3, r3, #20
 	cmp	r2, r3
-	bne	.L1151
+	bne	.L1157
 	mov	r2, r6
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r8, #0
 	bl	FlashEraseBlocks
 	mov	r10, r8
 	movs	r3, #20
-.L1152:
+.L1158:
 	uxth	r2, r8
 	cmp	r6, r2
-	bhi	.L1154
+	bhi	.L1160
 	cmp	r10, #0
-	beq	.L1155
+	beq	.L1161
 	mov	r0, r7
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1155:
+.L1161:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	cmp	r2, #0
-	bne	.L1156
-	ldr	r3, .L1171+24
+	bne	.L1162
+	ldr	r3, .L1177+24
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1132
-.L1142:
+	b	.L1138
+.L1148:
 	ldrh	r1, [lr], #2
 	movw	fp, #65535
 	str	r8, [r3, #8]
 	str	r8, [r3, #12]
 	cmp	r1, fp
-	beq	.L1141
+	beq	.L1147
 	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
 	lsls	r1, r1, #10
 	uxth	r6, r6
 	str	r1, [fp, #4]
-.L1141:
+.L1147:
 	adds	r3, r3, #20
-	b	.L1140
-.L1146:
+	b	.L1146
+.L1152:
 	movs	r2, #2
-	b	.L1169
-.L1145:
+	b	.L1175
+.L1151:
 	ldrh	r2, [r1, r5, lsl #1]
 	mov	r0, r7
 	str	r3, [sp, #4]
@@ -8983,20 +8992,20 @@ allocate_data_superblock:
 	adds	r2, r2, #1
 	str	r2, [r8]
 	bl	ftl_set_blk_mode.part.6
-	b	.L1170
-.L1151:
+	b	.L1176
+.L1157:
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L1150
-.L1154:
-	ldr	r1, .L1171+28
+	b	.L1156
+.L1160:
+	ldr	r1, .L1177+28
 	mul	r2, r3, r8
 	ldr	r1, [r1]
 	ldr	fp, [r1, r2]
 	adds	r0, r1, r2
 	cmp	fp, #-1
-	bne	.L1153
+	bne	.L1159
 	ldr	r0, [r0, #4]
 	add	r10, r10, #1
 	str	r3, [sp, #4]
@@ -9008,12 +9017,12 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.L1153:
+.L1159:
 	add	r8, r8, #1
-	b	.L1152
-.L1156:
-	ldr	r3, .L1171+60
-	ldr	r1, .L1171+64
+	b	.L1158
+.L1162:
+	ldr	r3, .L1177+60
+	ldr	r1, .L1177+64
 	ldrh	r3, [r3]
 	strh	r7, [r4]	@ movhi
 	smulbb	r3, r3, r2
@@ -9026,27 +9035,27 @@ allocate_data_superblock:
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r1]
-	ldr	r2, .L1171+24
+	ldr	r2, .L1177+24
 	ldr	r1, [sp]
 	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1157
+	cbz	r3, .L1163
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1158
-.L1157:
+	cbnz	r3, .L1164
+.L1163:
 	movw	r2, #2707
-	ldr	r1, .L1171+4
-	ldr	r0, .L1171+8
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-.L1158:
+.L1164:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1172:
+.L1178:
 	.align	2
-.L1171:
+.L1177:
 	.word	.LANCHOR48
 	.word	.LANCHOR163
 	.word	.LC1
@@ -9083,44 +9092,44 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1185
+	ldr	r4, .L1191
 	ldrh	r3, [r4]
-	cbz	r3, .L1174
-	ldr	r8, .L1185+16
+	cbz	r3, .L1180
+	ldr	r8, .L1191+16
 	movs	r6, #0
-.L1175:
-	ldr	r3, .L1185+4
+.L1181:
+	ldr	r3, .L1191+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1181
+	bhi	.L1187
 	bl	FtlGcReFreshBadBlk
-.L1174:
+.L1180:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1181:
-	ldr	r2, .L1185+8
+.L1187:
+	ldr	r2, .L1191+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-	ldr	r2, .L1185+12
+	ldr	r2, .L1191+12
 	mov	fp, r0
-.L1176:
+.L1182:
 	ldrh	r3, [r4]
 	uxth	r5, r7
 	cmp	r3, r5
-	bhi	.L1180
+	bhi	.L1186
 	adds	r6, r6, #1
-	b	.L1175
-.L1180:
+	b	.L1181
+.L1186:
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
-	bne	.L1177
+	bne	.L1183
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
@@ -9133,23 +9142,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.L1178:
+.L1184:
 	cmp	r5, r1
-	bcc	.L1179
+	bcc	.L1185
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.L1177:
+.L1183:
 	adds	r7, r7, #1
-	b	.L1176
-.L1179:
+	b	.L1182
+.L1185:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1178
-.L1186:
+	b	.L1184
+.L1192:
 	.align	2
-.L1185:
+.L1191:
 	.word	.LANCHOR101
 	.word	.LANCHOR3
 	.word	.LANCHOR13
@@ -9169,29 +9178,29 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1197
+	ldr	r3, .L1203
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1188
-	ldr	r2, .L1197+4
+	bne	.L1194
+	ldr	r2, .L1203+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1189
+	bne	.L1195
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1190:
-	ldr	r5, .L1197+8
+.L1196:
+	ldr	r5, .L1203+8
 	mov	r1, r4
-	ldr	r0, .L1197+12
+	ldr	r0, .L1203+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1192
+	cbnz	r3, .L1198
 	movw	r2, #2777
-	ldr	r1, .L1197+16
-	ldr	r0, .L1197+20
+	ldr	r1, .L1203+16
+	ldr	r0, .L1203+20
 	bl	printf
-.L1192:
+.L1198:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -9199,44 +9208,44 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1197+24
+	ldr	r3, .L1203+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1197+28
+	ldr	r2, .L1203+28
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1196
+	ble	.L1202
 	movw	r2, #2780
-	ldr	r1, .L1197+16
-	ldr	r0, .L1197+20
+	ldr	r1, .L1203+16
+	ldr	r0, .L1203+20
 	bl	printf
-.L1196:
+.L1202:
 	movs	r3, #1
-	b	.L1187
-.L1189:
-	ldr	r2, .L1197+32
+	b	.L1193
+.L1195:
+	ldr	r2, .L1203+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1187
-	ldr	r2, .L1197+36
+	beq	.L1193
+	ldr	r2, .L1203+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1187
-	ldr	r2, .L1197+40
+	beq	.L1193
+	ldr	r2, .L1203+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1190
-.L1187:
+	bne	.L1196
+.L1193:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1188:
+.L1194:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1187
-.L1198:
+	b	.L1193
+.L1204:
 	.align	2
-.L1197:
+.L1203:
 	.word	.LANCHOR42
 	.word	.LANCHOR80
 	.word	.LANCHOR45
@@ -9264,47 +9273,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1200
-	ldr	r5, .L1208
+	beq	.L1206
+	ldr	r5, .L1214
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1201
+	cbnz	r2, .L1207
 	mov	r1, r0
-	ldr	r0, .L1208+4
+	ldr	r0, .L1214+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1202
-.L1206:
+	cbz	r5, .L1208
+.L1212:
 	movs	r5, #0
-.L1199:
+.L1205:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1202:
+.L1208:
 	movw	r2, #2795
-.L1207:
-	ldr	r1, .L1208+8
-	ldr	r0, .L1208+12
+.L1213:
+	ldr	r1, .L1214+8
+	ldr	r0, .L1214+12
 	bl	printf
-	b	.L1199
-.L1201:
+	b	.L1205
+.L1207:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1200:
-	ldr	r6, .L1208+16
+.L1206:
+	ldr	r6, .L1214+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1204
+	bne	.L1210
 	strh	r4, [r6]	@ movhi
-	b	.L1206
-.L1204:
+	b	.L1212
+.L1210:
 	cmp	r4, r0
-	beq	.L1206
+	beq	.L1212
 	bl	update_vpc_list
-	ldr	r3, .L1208+20
+	ldr	r3, .L1214+20
 	adds	r5, r0, #0
-	ldr	r2, .L1208+24
+	ldr	r2, .L1214+24
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -9312,21 +9321,21 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1208+28
+	ldr	r3, .L1214+28
 	muls	r3, r2, r3
-	ldr	r2, .L1208
+	ldr	r2, .L1214
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1199
+	bne	.L1205
 	cmp	r4, r1
-	beq	.L1199
+	beq	.L1205
 	movw	r2, #2811
-	b	.L1207
-.L1209:
+	b	.L1213
+.L1215:
 	.align	2
-.L1208:
+.L1214:
 	.word	.LANCHOR42
 	.word	.LC105
 	.word	.LANCHOR165
@@ -9353,144 +9362,144 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	cmp	r3, r2
-	beq	.L1338
+	beq	.L1344
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #20]
-	ldr	r3, .L1346
+	ldr	r3, .L1352
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1213
+	bne	.L1219
 	strh	r3, [r0, #4]	@ movhi
-.L1344:
+.L1350:
 	strb	r3, [r8, #6]
-.L1338:
+.L1344:
 	movs	r0, #0
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1213:
+.L1219:
 	ldrh	r0, [r0, #16]
-.L1214:
+.L1220:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L1215
+	beq	.L1221
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L1216
-	ldr	r3, .L1346+4
+	beq	.L1222
+	ldr	r3, .L1352+4
 	movs	r2, #0
 	mov	r5, r2
 	movw	fp, #65535
 	mov	r10, #20
 	ldrh	ip, [r3]
-	ldr	r3, .L1346+8
+	ldr	r3, .L1352+8
 	ldr	r0, [r3]
-	ldr	r3, .L1346+12
+	ldr	r3, .L1352+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1346+16
+	ldr	r3, .L1352+16
 	ldrh	r7, [r3]
-	ldr	r3, .L1346+20
+	ldr	r3, .L1352+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1346+24
+	ldr	r3, .L1352+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1217:
+.L1223:
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1221
+	bhi	.L1227
 	movs	r2, #0
 	mov	r1, r5
 	bl	FlashReadPages
-	ldr	r2, .L1346+28
+	ldr	r2, .L1352+28
 	uxth	r1, r4
 	movw	fp, #65535
 	str	r1, [sp, #12]
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-	ldr	r3, .L1346+8
+	ldr	r3, .L1352+8
 	ldr	r10, [r3]
 	movs	r3, #0
 	mov	r7, r10
-.L1222:
+.L1228:
 	uxth	r1, r3
 	cmp	r5, r1
-	bhi	.L1227
-	bne	.L1225
+	bhi	.L1233
+	bne	.L1231
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.L1339:
+.L1345:
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldr	r3, .L1346
+	ldr	r3, .L1352
 	mov	r10, r0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1229
+	bne	.L1235
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r8, #6]
 	strh	r3, [r8, #4]	@ movhi
-.L1229:
+.L1235:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1230
+	bne	.L1236
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1230
+	bne	.L1236
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.L1345:
+.L1351:
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L1338
-.L1215:
+	b	.L1344
+.L1221:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-	b	.L1214
-.L1216:
+	b	.L1220
+.L1222:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1218
+	cbz	r3, .L1224
 	movw	r2, #1766
-	ldr	r1, .L1346+32
-	ldr	r0, .L1346+36
+	ldr	r1, .L1352+32
+	ldr	r0, .L1352+36
 	bl	printf
-.L1218:
+.L1224:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1219
+	cbz	r3, .L1225
 	cmp	r5, r3
-	beq	.L1219
+	beq	.L1225
 	movw	r2, #1767
-	ldr	r1, .L1346+32
-	ldr	r0, .L1346+36
+	ldr	r1, .L1352+32
+	ldr	r0, .L1352+36
 	bl	printf
-.L1219:
+.L1225:
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1344
-.L1221:
+	b	.L1350
+.L1227:
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
 	cmp	r3, fp
 	str	r1, [sp]
-	beq	.L1220
+	beq	.L1226
 	mla	r1, r10, r5, r0
 	ldr	r6, [sp, #8]
 	orr	r3, r4, r3, lsl #10
@@ -9506,53 +9515,53 @@ FtlRecoverySuperblock:
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1220:
+.L1226:
 	adds	r2, r2, #1
-	b	.L1217
-.L1227:
+	b	.L1223
+.L1233:
 	ldr	r1, [r7]
-	cbnz	r1, .L1223
+	cbnz	r1, .L1229
 	ldr	r1, [r7, #12]
 	ldr	r6, [r1, #4]
 	str	r1, [sp, #8]
 	adds	r1, r6, #1
-	beq	.L1224
+	beq	.L1230
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1224
+	cbz	r0, .L1230
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1224:
+.L1230:
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1226
-.L1225:
+	bne	.L1232
+.L1231:
 	uxth	r2, r4
 	uxth	r3, r3
 	str	r2, [sp, #8]
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1339
-.L1223:
+	b	.L1345
+.L1229:
 	ldr	fp, [sp, #12]
-.L1226:
+.L1232:
 	adds	r3, r3, #1
 	adds	r7, r7, #20
-	b	.L1222
-.L1230:
+	b	.L1228
+.L1236:
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1231
+	bne	.L1237
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1232
-.L1231:
-	ldr	r3, .L1346+40
+	bne	.L1238
+.L1237:
+	ldr	r3, .L1352+40
 	uxth	r6, r4
 	uxth	r4, r4
-	ldr	r7, .L1346+8
+	ldr	r7, .L1352+8
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -9565,10 +9574,10 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.L1235:
+.L1241:
 	cmp	r4, r6
-	bhi	.L1245
-	ldr	r3, .L1346+4
+	bhi	.L1251
+	ldr	r3, .L1352+4
 	movw	lr, #65535
 	ldr	r0, [r7]
 	mov	ip, #20
@@ -9577,47 +9586,47 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1246
-.L1237:
+	b	.L1252
+.L1243:
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #12]
-	beq	.L1236
+	beq	.L1242
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L1236:
+.L1242:
 	adds	r3, r3, #1
-.L1246:
+.L1252:
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1237
+	bhi	.L1243
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-	ldr	r3, .L1346+40
+	ldr	r3, .L1352+40
 	movs	r1, #20
 	movs	r0, #0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.L1238:
+.L1244:
 	cmp	r5, r3
-	bne	.L1243
-	cbz	r0, .L1244
-	ldr	r3, .L1346+40
+	bne	.L1249
+	cbz	r0, .L1250
+	ldr	r3, .L1352+40
 	str	r2, [r3]
-.L1244:
+.L1250:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1235
-.L1347:
+	b	.L1241
+.L1353:
 	.align	2
-.L1346:
+.L1352:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR112
@@ -9629,22 +9638,22 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR166
 	.word	.LC1
 	.word	.LANCHOR145
-.L1243:
+.L1249:
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1239
-	cbz	r0, .L1232
-.L1340:
-	ldr	r3, .L1348
+	beq	.L1245
+	cbz	r0, .L1238
+.L1346:
+	ldr	r3, .L1354
 	str	r2, [r3]
-.L1232:
+.L1238:
 	ldr	fp, [sp, #4]
 	movs	r2, #1
-	ldr	r6, .L1348+4
-	ldr	r3, .L1348+8
+	ldr	r6, .L1354+4
+	ldr	r3, .L1354+8
 	strh	r2, [r3]	@ movhi
-.L1247:
-	ldr	r3, .L1348+12
+.L1253:
+	ldr	r3, .L1354+12
 	movw	lr, #65535
 	ldr	r0, [r6]
 	movs	r7, #20
@@ -9652,64 +9661,64 @@ FtlRecoverySuperblock:
 	ldrh	r4, [r3]
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1248:
+.L1254:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L1250
+	bhi	.L1256
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1343:
+.L1349:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1278
-	ldr	r3, .L1348+16
+	bhi	.L1284
+	ldr	r3, .L1354+16
 	add	fp, fp, #1
 	uxth	fp, fp
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1247
-	ldr	r2, .L1348+12
+	bne	.L1253
+	ldr	r2, .L1354+12
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r8, #2]	@ movhi
 	strh	r3, [r8, #4]	@ movhi
 	ldrh	r2, [r2]
-.L1279:
+.L1285:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1338
+	bcs	.L1344
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #16]
 	add	r1, r3, #1
-	bne	.L1344
+	bne	.L1350
 	mov	r3, r1
-	b	.L1279
-.L1239:
+	b	.L1285
+.L1245:
 	ldr	r1, [r3, #12]
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1242
+	beq	.L1248
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1242:
+.L1248:
 	adds	r3, r3, #20
-	b	.L1238
-.L1245:
+	b	.L1244
+.L1251:
 	mov	r2, #-1
-	b	.L1340
-.L1250:
+	b	.L1346
+.L1256:
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
-	beq	.L1249
+	beq	.L1255
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
 	mla	ip, r7, r5, r0
@@ -9718,10 +9727,10 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1249:
+.L1255:
 	adds	r3, r3, #1
-	b	.L1248
-.L1278:
+	b	.L1254
+.L1284:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -9734,45 +9743,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1252
+	bcc	.L1258
 	ldr	r3, [sp, #28]
-	bne	.L1253
+	bne	.L1259
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1252
-.L1253:
+	bhi	.L1258
+.L1259:
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1254
+	bne	.L1260
 	cmp	r10, r0
-	beq	.L1255
-.L1254:
+	beq	.L1261
+.L1260:
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1256
+	beq	.L1262
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1257
+	beq	.L1263
 	ldrh	r0, [r8]
-.L1341:
+.L1347:
 	bl	decrement_vpc_count
-	b	.L1252
-.L1257:
+	b	.L1258
+.L1263:
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
 	adds	r2, r2, #1
-	beq	.L1258
-	ldr	r2, .L1348+20
+	beq	.L1264
+	ldr	r2, .L1354+20
 	ldr	r0, [sp]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1258
+	cbz	r0, .L1264
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1258:
+.L1264:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #40
 	ldr	r3, [r3, #12]
@@ -9780,17 +9789,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #36]
 	bl	log2phys
-	ldr	r3, .L1348
+	ldr	r3, .L1354
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1259
+	beq	.L1265
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1259
+	beq	.L1265
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1260
+	beq	.L1266
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9802,130 +9811,130 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1261
-.L1262:
+	bne	.L1267
+.L1268:
 	mov	r3, #-1
 	str	r3, [sp, #36]
-.L1269:
+.L1275:
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1252
-.L1282:
+	beq	.L1258
+.L1288:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1348+24
+	ldr	r3, .L1354+24
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1274
+	bhi	.L1280
 	movw	r2, #2019
-	ldr	r1, .L1348+28
-	ldr	r0, .L1348+32
+	ldr	r1, .L1354+28
+	ldr	r0, .L1354+32
 	bl	printf
-.L1274:
-	ldr	r3, .L1348+36
+.L1280:
+	ldr	r3, .L1354+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1275
+	beq	.L1281
 	mov	r0, r4
-	b	.L1341
-.L1260:
+	b	.L1347
+.L1266:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1252
+	bne	.L1258
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.L1252:
+.L1258:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1343
-.L1261:
+	b	.L1349
+.L1267:
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1262
-	ldr	r0, .L1348
+	bne	.L1268
+	ldr	r0, .L1354
 	ldr	r1, [r7, #4]
 	ldr	r0, [r0]
 	str	r1, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1262
+	beq	.L1268
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1264
-.L1267:
+	bne	.L1270
+.L1273:
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L1262
-.L1264:
+	b	.L1268
+.L1270:
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1262
+	beq	.L1268
 	adds	r0, r1, #1
-	beq	.L1265
+	beq	.L1271
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L1266:
+.L1272:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1267
+	beq	.L1273
 	ldr	r3, [r7, #4]
-	ldr	r2, .L1348
+	ldr	r2, .L1354
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1267
+	beq	.L1273
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1262
-	b	.L1267
-.L1265:
+	beq	.L1268
+	b	.L1273
+.L1271:
 	str	r1, [r2, r5]
-	b	.L1266
-.L1259:
+	b	.L1272
+.L1265:
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1269
+	beq	.L1275
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1269
+	beq	.L1275
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1282
+	beq	.L1288
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1348+40
+	ldr	r3, .L1354+40
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1273
-	ldr	r3, .L1348+44
+	beq	.L1279
+	ldr	r3, .L1354+44
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1273
-	ldr	r3, .L1348+48
+	beq	.L1279
+	ldr	r3, .L1354+48
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1269
-.L1273:
+	bne	.L1275
+.L1279:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -9935,20 +9944,20 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1269
+	beq	.L1275
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L1269
+	bne	.L1275
 	movs	r2, #1
 	add	r1, sp, #40
 	mov	r0, r4
 	bl	log2phys
-	b	.L1269
-.L1349:
+	b	.L1275
+.L1355:
 	.align	2
-.L1348:
+.L1354:
 	.word	.LANCHOR145
 	.word	.LANCHOR112
 	.word	.LANCHOR167
@@ -9962,47 +9971,47 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-.L1275:
+.L1281:
 	mov	r1, r4
-	ldr	r0, .L1350
+	ldr	r0, .L1356
 	bl	printf
-	b	.L1252
-.L1256:
-	ldr	r3, .L1350+4
+	b	.L1258
+.L1262:
+	ldr	r3, .L1356+4
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1276
-	ldr	r2, .L1350+8
+	bhi	.L1282
+	ldr	r2, .L1356+8
 	str	r4, [r2, r3, lsl #2]
 	adds	r3, r3, #1
-	ldr	r2, .L1350+4
+	ldr	r2, .L1356+4
 	str	r3, [r2]
-.L1276:
+.L1282:
 	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L1350+12
+	ldr	r3, .L1356+12
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1277
+	bne	.L1283
 	ldr	r2, [sp]
-.L1342:
+.L1348:
 	str	r2, [r3]
-	b	.L1252
-.L1277:
+	b	.L1258
+.L1283:
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1252
+	bcs	.L1258
 	mov	r2, r1
-	b	.L1342
-.L1255:
+	b	.L1348
+.L1261:
 	strb	r10, [r8, #6]
 	mov	r2, r10
 	strh	fp, [r8, #2]	@ movhi
 	mov	r1, fp
-	b	.L1345
-.L1351:
+	b	.L1351
+.L1357:
 	.align	2
-.L1350:
+.L1356:
 	.word	.LC106
 	.word	.LANCHOR168
 	.word	.LANCHOR169
@@ -10021,74 +10030,74 @@ FtlWriteDump_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r4, .L1371
+	ldr	r4, .L1377
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1353
+	beq	.L1359
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1353
-	ldr	r3, .L1371+4
+	bne	.L1359
+	ldr	r3, .L1377+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1353
+	beq	.L1359
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1352
-	ldr	r3, .L1371+8
+	cbnz	r7, .L1358
+	ldr	r3, .L1377+8
 	mov	r2, r7
 	mov	r1, sp
 	ldr	r6, [r3]
-	ldr	r3, .L1371+12
+	ldr	r3, .L1377+12
 	subs	r6, r6, #1
 	mov	r0, r6
 	ldrh	r8, [r3]
 	bl	log2phys
-	ldr	r2, .L1371+16
+	ldr	r2, .L1377+16
 	ldr	r3, [sp]
 	str	r6, [sp, #20]
 	ldr	r0, [r2]
-	ldr	r2, .L1371+20
+	ldr	r2, .L1377+20
 	str	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r0, [sp, #12]
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
 	str	r7, [r5, #4]
-	beq	.L1355
+	beq	.L1361
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.L1356:
-	ldr	fp, .L1371
+.L1362:
+	ldr	fp, .L1377
 	lsl	r8, r8, #2
-	ldr	r10, .L1371+28
+	ldr	r10, .L1377+28
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1357:
+.L1363:
 	cmp	r8, r7
-	bne	.L1361
-.L1358:
+	bne	.L1367
+.L1364:
 	movs	r3, #1
-.L1370:
+.L1376:
 	strb	r3, [r4, #10]
-.L1352:
+.L1358:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1355:
-	ldr	r3, .L1371+24
+.L1361:
+	ldr	r3, .L1377+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1356
-.L1361:
+	b	.L1362
+.L1367:
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1358
+	beq	.L1364
 	ldr	r3, [sp, #8]
 	mov	r0, fp
 	str	r6, [r5, #8]
@@ -10112,13 +10121,13 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1357
-.L1353:
+	b	.L1363
+.L1359:
 	movs	r3, #0
-	b	.L1370
-.L1372:
+	b	.L1376
+.L1378:
 	.align	2
-.L1371:
+.L1377:
 	.word	.LANCHOR51
 	.word	.LANCHOR19
 	.word	.LANCHOR61
@@ -10141,31 +10150,31 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L1377
-	ldr	r6, .L1377+4
+	ldr	r5, .L1383
+	ldr	r6, .L1383+4
 	bl	FtlWriteDump_data
-.L1374:
+.L1380:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L1376
+	bhi	.L1382
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1376:
+.L1382:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1375
+	bge	.L1381
 	bl	flush_l2p_region
-.L1375:
+.L1381:
 	adds	r4, r4, #1
-	b	.L1374
-.L1378:
+	b	.L1380
+.L1384:
 	.align	2
-.L1377:
+.L1383:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.size	l2p_flush, .-l2p_flush
@@ -10183,14 +10192,14 @@ FtlSuperblockPowerLostFix:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r3, #-1
 	sub	sp, sp, #24
-	ldr	r2, .L1392
+	ldr	r2, .L1398
 	movs	r6, #0
 	mov	r4, r0
 	str	r3, [sp, #20]
-	ldr	r3, .L1392+4
+	ldr	r3, .L1398+4
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r8, .L1392+16
+	ldr	r8, .L1398+16
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -10211,18 +10220,18 @@ FtlSuperblockPowerLostFix:
 	ite	eq
 	moveq	r7, #6
 	movne	r7, #7
-.L1385:
+.L1391:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1381
-.L1382:
-	ldr	r3, .L1392+8
+	cbnz	r3, .L1387
+.L1388:
+	ldr	r3, .L1398+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1392+12
+	ldr	r3, .L1398+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -10231,12 +10240,12 @@ FtlSuperblockPowerLostFix:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1381:
+.L1387:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1382
+	beq	.L1388
 	ldr	r3, [r8]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -10252,11 +10261,11 @@ FtlSuperblockPowerLostFix:
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
 	subs	r7, r7, #1
-	bne	.L1385
-	b	.L1382
-.L1393:
+	bne	.L1391
+	b	.L1388
+.L1399:
 	.align	2
-.L1392:
+.L1398:
 	.word	.LANCHOR123
 	.word	.LANCHOR115
 	.word	.LANCHOR42
@@ -10274,7 +10283,7 @@ FtlSuperblockPowerLostFix:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1406
+	ldr	r3, .L1412
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -10283,26 +10292,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1402
-	ldr	r3, .L1406+4
+	bhi	.L1408
+	ldr	r3, .L1412+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1396:
-	cbnz	r5, .L1401
-.L1394:
+.L1402:
+	cbnz	r5, .L1407
+.L1400:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1401:
-	ldr	r3, .L1406+8
+.L1407:
+	ldr	r3, .L1412+8
 	mov	r0, r7
-	ldr	r10, .L1406+24
+	ldr	r10, .L1412+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1406+12
+	ldr	r3, .L1412+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -10316,9 +10325,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1398
+	cbz	r2, .L1404
 	cmp	r4, r3
-	beq	.L1398
+	beq	.L1404
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -10328,7 +10337,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1399:
+.L1405:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -10341,7 +10350,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1406+16
+	ldr	r0, .L1412+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -10352,20 +10361,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1396
-.L1398:
-	ldr	r3, .L1406+20
+	b	.L1402
+.L1404:
+	ldr	r3, .L1412+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1399
-.L1402:
+	b	.L1405
+.L1408:
 	mov	r8, #-1
-	b	.L1394
-.L1407:
+	b	.L1400
+.L1413:
 	.align	2
-.L1406:
+.L1412:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -10386,57 +10395,57 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1410
-	ldr	r3, .L1410+4
+	ldr	r2, .L1416
+	ldr	r3, .L1416+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1408
-	ldr	r3, .L1410+8
+	bne	.L1414
+	ldr	r3, .L1416+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1410+12
+	ldr	r3, .L1416+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1410+16
+	ldr	r3, .L1416+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1410+20
+	ldr	r3, .L1416+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1410+24
+	ldr	r3, .L1416+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1410+28
+	ldr	r3, .L1416+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1410+32
+	ldr	r3, .L1416+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1410+36
+	ldr	r3, .L1416+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1410+40
+	ldr	r3, .L1416+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1410+44
+	ldr	r3, .L1416+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1410+48
+	ldr	r3, .L1416+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1410+52
+	ldr	r3, .L1416+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1410+56
+	ldr	r3, .L1416+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1408:
+.L1414:
 	bx	lr
-.L1411:
+.L1417:
 	.align	2
-.L1410:
+.L1416:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	1342177352
@@ -10464,7 +10473,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1417
+	ldr	r2, .L1423
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -10473,22 +10482,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1417+4
-	cbnz	r0, .L1414
+	ldr	r2, .L1423+4
+	cbnz	r0, .L1420
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1415
-.L1414:
+	bcc	.L1421
+.L1420:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1417+8
+	ldr	r3, .L1423+8
 	str	r3, [r2]
-	ldr	r3, .L1417+12
+	ldr	r3, .L1423+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -10499,12 +10508,12 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1415:
+.L1421:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1418:
+.L1424:
 	.align	2
-.L1417:
+.L1423:
 	.word	.LANCHOR170
 	.word	.LANCHOR127
 	.word	1112818501
@@ -10536,7 +10545,7 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1430
+	ldr	r3, .L1436
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -10545,28 +10554,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1429
-	ldr	r3, .L1430+4
+	bhi	.L1435
+	ldr	r3, .L1436+4
 	mov	r8, #0
-	ldr	fp, .L1430+28
+	ldr	fp, .L1436+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L1422:
-	cbnz	r6, .L1428
-.L1420:
+.L1428:
+	cbnz	r6, .L1434
+.L1426:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1428:
-	ldr	r3, .L1430+8
+.L1434:
+	ldr	r3, .L1436+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1430+12
+	ldr	r2, .L1436+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -10581,7 +10590,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L1424
+	beq	.L1430
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -10595,28 +10604,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L1430+16
+	ldr	r2, .L1436+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L1426
+	bne	.L1432
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L1430+20
+	ldr	r0, .L1436+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L1430+24
+	ldr	r0, .L1436+24
 	bl	FtlMapWritePage
-.L1426:
+.L1432:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1427:
+.L1433:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -10625,19 +10634,19 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L1422
-.L1424:
+	b	.L1428
+.L1430:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L1427
-.L1429:
+	b	.L1433
+.L1435:
 	mov	r8, #-1
-	b	.L1420
-.L1431:
+	b	.L1426
+.L1437:
 	.align	2
-.L1430:
+.L1436:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -10660,30 +10669,30 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1434
-	ldr	r5, .L1434+4
+	ldr	r4, .L1440
+	ldr	r5, .L1440+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1434+8
+	ldr	r3, .L1440+8
 	cmp	r2, r3
-	beq	.L1433
-	ldr	r1, .L1434+12
-	ldr	r0, .L1434+16
+	beq	.L1439
+	ldr	r1, .L1440+12
+	ldr	r0, .L1440+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1433:
+.L1439:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1435:
+.L1441:
 	.align	2
-.L1434:
+.L1440:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
@@ -10703,75 +10712,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1439
+	ldr	r4, .L1445
 	movs	r0, #0
-	ldr	r5, .L1439+4
+	ldr	r5, .L1445+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1437
+	beq	.L1443
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1437:
+.L1443:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1439+8
-	bne	.L1438
+	ldr	r3, .L1445+8
+	bne	.L1444
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1439+12
+	ldr	r2, .L1445+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1439+16
+	ldr	r2, .L1445+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1439+20
+	ldr	r2, .L1445+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1439+24
+	ldr	r2, .L1445+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1439+28
+	ldr	r2, .L1445+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1439+32
+	ldr	r2, .L1445+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1439+36
+	ldr	r2, .L1445+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1439+40
+	ldr	r2, .L1445+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1439+44
+	ldr	r2, .L1445+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1439+48
+	ldr	r2, .L1445+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1439+52
+	ldr	r2, .L1445+52
 	str	r1, [r2]
-.L1438:
-	ldr	r1, .L1439+56
-	ldr	r2, .L1439+60
+.L1444:
+	ldr	r1, .L1445+56
+	ldr	r2, .L1445+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1439+64
+	ldr	r1, .L1445+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1439+68
+	ldr	r3, .L1445+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1440:
+.L1446:
 	.align	2
-.L1439:
+.L1445:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	.LANCHOR73
@@ -10819,11 +10828,11 @@ FtlVpcTblFlush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, #0
-	ldr	r3, .L1457
-	ldr	r4, .L1457+4
-	ldr	r10, .L1457+76
+	ldr	r3, .L1463
+	ldr	r4, .L1463+4
+	ldr	r10, .L1463+76
 	ldr	r0, [r3]
-	ldr	r5, .L1457+8
+	ldr	r5, .L1463+8
 	ldr	r7, [r10]
 	ldrh	r2, [r4]
 	str	r0, [r5, #8]
@@ -10832,21 +10841,21 @@ FtlVpcTblFlush:
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
 	ldr	r2, [r4, #8]
-	ldr	r6, .L1457+12
-	ldr	ip, .L1457+80
+	ldr	r6, .L1463+12
+	ldr	ip, .L1463+80
 	str	r2, [r7, #4]
-	ldr	r2, .L1457+16
+	ldr	r2, .L1463+16
 	str	fp, [r7, #8]
 	str	fp, [r7, #12]
 	stm	r6, {r2, ip}
 	ldrh	r2, [r4, #6]
 	str	r3, [sp, #4]
-	ldr	r8, .L1457+84
+	ldr	r8, .L1463+84
 	strh	r2, [r6, #8]	@ movhi
-	ldr	r2, .L1457+20
+	ldr	r2, .L1463+20
 	ldrh	r2, [r2]
 	strb	r2, [r6, #10]
-	ldr	r2, .L1457+24
+	ldr	r2, .L1463+24
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r6, #14]	@ movhi
@@ -10854,7 +10863,7 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r6, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1457+28
+	ldr	r2, .L1463+28
 	strh	r1, [r6, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
@@ -10864,7 +10873,7 @@ FtlVpcTblFlush:
 	orr	r1, r1, ip, lsl #6
 	strh	r1, [r6, #20]	@ movhi
 	strb	r2, [r6, #12]
-	ldr	r2, .L1457+32
+	ldr	r2, .L1463+32
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
 	strh	r1, [r6, #22]	@ movhi
@@ -10872,33 +10881,33 @@ FtlVpcTblFlush:
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r6, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1457+36
+	ldr	r2, .L1463+36
 	strh	r1, [r6, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
 	str	r2, [r6, #32]
 	ldr	r2, [r8]
 	str	r2, [r6, #40]
-	ldr	r2, .L1457+40
+	ldr	r2, .L1463+40
 	ldr	r2, [r2]
 	str	r2, [r6, #36]
-	ldr	r2, .L1457+44
+	ldr	r2, .L1463+44
 	ldrh	r2, [r2]
 	bl	ftl_memset
 	mov	r1, r6
-	ldr	r6, .L1457+48
+	ldr	r6, .L1463+48
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
 	ldrh	r2, [r6]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1457+52
+	ldr	r1, .L1463+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
 	ldrh	r0, [r6]
-	ldr	r1, .L1457+56
+	ldr	r1, .L1463+56
 	ldr	r6, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -10912,7 +10921,7 @@ FtlVpcTblFlush:
 	mov	r0, fp
 	movw	fp, #65535
 	bl	FtlUpdateVaildLpn
-.L1443:
+.L1449:
 	ldr	r3, [sp, #4]
 	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
@@ -10922,11 +10931,11 @@ FtlVpcTblFlush:
 	str	r3, [r5, #12]
 	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, .L1457+60
+	ldr	r3, .L1463+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r1, r3
-	blt	.L1444
+	blt	.L1450
 	movs	r3, #0
 	ldrh	fp, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
@@ -10941,9 +10950,9 @@ FtlVpcTblFlush:
 	str	r2, [r5, #4]
 	str	r3, [r7, #4]
 	strh	r0, [r7, #2]	@ movhi
-.L1444:
+.L1450:
 	movs	r3, #1
-	ldr	r0, .L1457+8
+	ldr	r0, .L1463+8
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
@@ -10953,50 +10962,50 @@ FtlVpcTblFlush:
 	uxth	r3, r3
 	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1445
+	bne	.L1451
 	cmp	r3, #1
-	bne	.L1446
+	bne	.L1452
 	movw	r2, #1135
-	ldr	r1, .L1457+64
-	ldr	r0, .L1457+68
+	ldr	r1, .L1463+64
+	ldr	r0, .L1463+68
 	bl	printf
-.L1446:
+.L1452:
 	ldrh	r3, [r4, #2]
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1457+60
+	ldreq	r3, .L1463+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1443
+	bls	.L1449
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1457+72
+	ldr	r0, .L1463+72
 	bl	printf
-.L1449:
-	b	.L1449
-.L1445:
+.L1455:
+	b	.L1455
+.L1451:
 	cmp	r3, #1
-	beq	.L1443
+	beq	.L1449
 	cmp	r2, #256
-	beq	.L1443
+	beq	.L1449
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1450
+	beq	.L1456
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.L1450:
+.L1456:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1458:
+.L1464:
 	.align	2
-.L1457:
+.L1463:
 	.word	.LANCHOR115
 	.word	.LANCHOR79
 	.word	.LANCHOR148
@@ -11051,17 +11060,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1462
+	ldr	r3, .L1468
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1461
+	bne	.L1467
 	bl	FtlSysFlush
-.L1461:
+.L1467:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1463:
+.L1469:
 	.align	2
-.L1462:
+.L1468:
 	.word	.LANCHOR86
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -11075,24 +11084,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1479
+	ldr	r3, .L1485
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1472
+	bhi	.L1478
 	cmp	r1, #31
-	bhi	.L1466
-.L1471:
+	bhi	.L1472
+.L1477:
 	movs	r0, #0
-.L1464:
+.L1470:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1466:
-	ldr	r8, .L1479+12
+.L1472:
+	ldr	r8, .L1485+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -11100,7 +11109,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1467
+	cbz	r7, .L1473
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -11108,32 +11117,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1467:
-	ldr	r4, .L1479+4
+.L1473:
+	ldr	r4, .L1485+4
 	mov	r3, #-1
-	ldr	r7, .L1479+8
+	ldr	r7, .L1485+8
 	str	r3, [sp, #4]
-.L1468:
+.L1474:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1470
-	ldr	r3, .L1479+4
+	bcs	.L1476
+	ldr	r3, .L1485+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1471
+	bls	.L1477
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1471
-.L1470:
+	b	.L1477
+.L1476:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1469
+	beq	.L1475
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -11148,17 +11157,17 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1469:
+.L1475:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1468
-.L1472:
+	b	.L1474
+.L1478:
 	mov	r0, #-1
-	b	.L1464
-.L1480:
+	b	.L1470
+.L1486:
 	.align	2
-.L1479:
+.L1485:
 	.word	.LANCHOR34
 	.word	.LANCHOR172
 	.word	.LANCHOR63
@@ -11177,96 +11186,96 @@ FtlVpcCheckAndModify:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	movs	r4, #0
-	ldr	r1, .L1494
-	ldr	r0, .L1494+4
+	ldr	r1, .L1500
+	ldr	r0, .L1500+4
 	bl	printf
-	ldr	r3, .L1494+8
+	ldr	r3, .L1500+8
 	movs	r1, #0
-	ldr	r5, .L1494+12
-	ldr	r6, .L1494+16
+	ldr	r5, .L1500+12
+	ldr	r6, .L1500+16
 	ldrh	r2, [r3]
 	ldr	r0, [r5]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.L1482:
+.L1488:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L1484
-	ldr	r10, .L1494+36
+	bcc	.L1490
+	ldr	r10, .L1500+36
 	movs	r7, #0
-	ldr	r8, .L1494+40
-.L1485:
+	ldr	r8, .L1500+40
+.L1491:
 	ldrh	r3, [r10]
 	uxth	r6, r7
 	cmp	r3, r6
-	bhi	.L1490
+	bhi	.L1496
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1484:
+.L1490:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1483
+	beq	.L1489
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1483:
+.L1489:
 	adds	r4, r4, #1
-	b	.L1482
-.L1490:
+	b	.L1488
+.L1496:
 	ldr	r3, [r8]
 	uxth	r4, r7
 	ldrh	r2, [r3, r4, lsl #1]
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r2, r3
-	beq	.L1487
+	beq	.L1493
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1487
+	beq	.L1493
 	mov	r1, r4
-	ldr	r0, .L1494+20
+	ldr	r0, .L1500+20
 	bl	printf
-	ldr	r3, .L1494+24
+	ldr	r3, .L1500+24
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	beq	.L1487
-	ldr	r3, .L1494+28
+	beq	.L1493
+	ldr	r3, .L1500+28
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	beq	.L1487
-	ldr	r3, .L1494+32
+	beq	.L1493
+	ldr	r3, .L1500+32
 	ldrh	r3, [r3]
 	cmp	r3, r6
-	beq	.L1487
+	beq	.L1493
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbnz	r2, .L1489
+	cbnz	r2, .L1495
 	ldr	r2, [r5]
 	ldrh	r2, [r2, r4, lsl #1]
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1487:
+.L1493:
 	adds	r7, r7, #1
-	b	.L1485
-.L1489:
+	b	.L1491
+.L1495:
 	ldr	r2, [r5]
 	mov	r0, r6
 	ldrh	r2, [r2, r4, lsl #1]
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	update_vpc_list
-	b	.L1487
-.L1495:
+	b	.L1493
+.L1501:
 	.align	2
-.L1494:
+.L1500:
 	.word	.LANCHOR173
 	.word	.LC94
 	.word	.LANCHOR6
@@ -11290,47 +11299,47 @@ FtlVpcCheckAndModify:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1506
+	ldr	r3, .L1512
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1497
+	bcs	.L1503
 	movw	r2, #2714
-	ldr	r1, .L1506+4
-	ldr	r0, .L1506+8
+	ldr	r1, .L1512+4
+	ldr	r0, .L1512+8
 	bl	printf
-.L1497:
+.L1503:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1498
-	ldr	r3, .L1506+12
+	beq	.L1504
+	ldr	r3, .L1512+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1499
+	cbz	r3, .L1505
 	bl	INSERT_DATA_LIST
-.L1498:
-	ldr	r5, .L1506+16
+.L1504:
+	ldr	r5, .L1512+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1500
+	beq	.L1506
 	cmp	r4, r0
-	bne	.L1501
-	ldr	r3, .L1506+12
+	bne	.L1507
+	ldr	r3, .L1512+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1502
-.L1501:
+	cbz	r3, .L1508
+.L1507:
 	bl	update_vpc_list
-.L1502:
+.L1508:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1500:
+.L1506:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -11339,12 +11348,12 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1499:
+.L1505:
 	bl	INSERT_FREE_LIST
-	b	.L1498
-.L1507:
+	b	.L1504
+.L1513:
 	.align	2
-.L1506:
+.L1512:
 	.word	.LANCHOR5
 	.word	.LANCHOR174
 	.word	.LC1
@@ -11364,25 +11373,25 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1522+24
+	ldr	r8, .L1528+24
 	mov	r4, r3
 	movs	r2, #0
 	mov	r5, r0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r10, r1
 	bl	FlashProgPages
-.L1509:
+.L1515:
 	cmp	r6, r10
-	beq	.L1516
-	ldr	r7, .L1522
-	b	.L1517
-.L1512:
+	beq	.L1522
+	ldr	r7, .L1528
+	b	.L1523
+.L1518:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1510
+	bne	.L1516
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -11393,13 +11402,13 @@ FtlProgPages:
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1510:
+.L1516:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1511
+	cbnz	r3, .L1517
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1511:
-	ldr	r2, .L1522+4
+.L1517:
+	ldr	r2, .L1528+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -11415,20 +11424,20 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1517:
+.L1523:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1512
-	ldr	r3, .L1522+8
+	beq	.L1518
+	ldr	r3, .L1528+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1513
+	bcc	.L1519
 	movw	r2, #955
-	ldr	r1, .L1522+12
-	ldr	r0, .L1522+16
+	ldr	r1, .L1528+12
+	ldr	r0, .L1528+16
 	bl	printf
-.L1513:
+.L1519:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
 	movs	r2, #1
@@ -11441,37 +11450,37 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	cmp	fp, #-1
 	mov	r7, r0
-	beq	.L1514
+	beq	.L1520
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1515
+	cbnz	r2, .L1521
 	mov	r1, r0
-	ldr	r0, .L1522+20
+	ldr	r0, .L1528+20
 	bl	printf
-.L1515:
+.L1521:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1514:
+.L1520:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L1509
-.L1516:
-	ldr	r3, .L1522+8
+	b	.L1515
+.L1522:
+	ldr	r3, .L1528+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1508
+	bcc	.L1514
 	movw	r2, #970
-	ldr	r1, .L1522+12
-	ldr	r0, .L1522+16
+	ldr	r1, .L1528+12
+	ldr	r0, .L1528+16
 	bl	printf
-.L1508:
+.L1514:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1523:
+.L1529:
 	.align	2
-.L1522:
+.L1528:
 	.word	.LANCHOR19
 	.word	.LANCHOR81
 	.word	.LANCHOR3
@@ -11493,54 +11502,54 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r2, #65535
-	ldr	r4, .L1550
-	ldr	r6, .L1550+4
+	ldr	r4, .L1556
+	ldr	r6, .L1556+4
 	ldrh	r5, [r4]
 	ldrh	r1, [r6]
 	cmp	r5, r2
-	bne	.L1525
-.L1535:
-	ldr	r3, .L1550+8
+	bne	.L1531
+.L1541:
+	ldr	r3, .L1556+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1548
-.L1526:
+	bne	.L1554
+.L1532:
 	movs	r0, #0
-.L1524:
+.L1530:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1525:
-	cbz	r0, .L1528
-	ldr	r3, .L1550+12
+.L1531:
+	cbz	r0, .L1534
+	ldr	r3, .L1556+12
 	ldrh	r0, [r3]
 	cmp	r0, r2
-	beq	.L1529
-.L1530:
+	beq	.L1535
+.L1536:
 	movs	r1, #2
-.L1528:
-	ldr	r0, .L1550
+.L1534:
+	ldr	r0, .L1556
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L1531
-	ldr	r3, .L1550+16
+	beq	.L1537
+	ldr	r3, .L1556+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1532
+	bls	.L1538
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1532:
-	ldr	r4, .L1550+8
+.L1538:
+	ldr	r4, .L1556+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1533
-	ldr	r2, .L1550+20
+	cbnz	r2, .L1539
+	ldr	r2, .L1556+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11548,60 +11557,60 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1533:
+.L1539:
 	movs	r3, #0
 	str	r3, [r4]
-.L1544:
+.L1550:
 	movs	r0, #1
-	b	.L1524
-.L1529:
+	b	.L1530
+.L1535:
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1550+24
+	ldr	r3, .L1556+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1530
-	b	.L1528
-.L1531:
-	ldr	r3, .L1550+12
+	bhi	.L1536
+	b	.L1534
+.L1537:
+	ldr	r3, .L1556+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1544
-	b	.L1535
-.L1548:
+	bne	.L1550
+	b	.L1541
+.L1554:
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1550+28
+	ldr	r5, .L1556+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1536
+	beq	.L1542
 	movs	r2, #162
-	ldr	r1, .L1550+32
-	ldr	r0, .L1550+36
+	ldr	r1, .L1556+32
+	ldr	r0, .L1556+36
 	bl	printf
-.L1536:
+.L1542:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1550+40
+	ldr	r2, .L1556+40
 	ldrh	r0, [r4]
-	ldr	fp, .L1550+68
+	ldr	fp, .L1556+68
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1550+44
+	ldr	r1, .L1556+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1537:
+.L1543:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1541
+	bhi	.L1547
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldr	r3, [sp, #4]
@@ -11609,10 +11618,10 @@ FtlGcFreeTempBlock:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1542
+	beq	.L1548
 	bl	INSERT_DATA_LIST
-.L1543:
-	ldr	r3, .L1550+48
+.L1549:
+	ldr	r3, .L1556+48
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -11620,35 +11629,35 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1550+52
+	ldr	r3, .L1556+52
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1550+24
+	ldr	r3, .L1556+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1550+56
+	ldr	r3, .L1556+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1526
-	ldr	r3, .L1550+60
+	ble	.L1532
+	ldr	r3, .L1556+60
 	movs	r2, #20
 	strh	r2, [r3]	@ movhi
-	b	.L1526
-.L1541:
+	b	.L1532
+.L1547:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L1550+64
+	ldr	r3, .L1556+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1538
+	bcc	.L1544
 	movs	r2, #168
-	ldr	r1, .L1550+32
-	ldr	r0, .L1550+36
+	ldr	r1, .L1556+32
+	ldr	r0, .L1556+36
 	bl	printf
-.L1538:
+.L1544:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -11656,7 +11665,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1539
+	bne	.L1545
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -11665,23 +11674,23 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1549:
+.L1555:
 	bl	decrement_vpc_count
-.L1540:
+.L1546:
 	adds	r6, r6, #1
-	b	.L1537
-.L1539:
+	b	.L1543
+.L1545:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1540
+	beq	.L1546
 	ldrh	r0, [r4]
-	b	.L1549
-.L1542:
+	b	.L1555
+.L1548:
 	bl	INSERT_FREE_LIST
-	b	.L1543
-.L1551:
+	b	.L1549
+.L1557:
 	.align	2
-.L1550:
+.L1556:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR144
@@ -11713,27 +11722,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1554
-	ldr	r5, .L1554+4
+	ldr	r4, .L1560
+	ldr	r5, .L1560+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1552
-	ldr	r0, .L1554+8
+	bcc	.L1558
+	ldr	r0, .L1560+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1554+12
+	ldr	r3, .L1560+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1552:
+.L1558:
 	pop	{r3, r4, r5, pc}
-.L1555:
+.L1561:
 	.align	2
-.L1554:
+.L1560:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR140
@@ -11752,13 +11761,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1557
-	ldr	r3, .L1557+4
+	ldr	r5, .L1563
+	ldr	r3, .L1563+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1557+8
+	ldr	r5, .L1563+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -11769,9 +11778,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1558:
+.L1564:
 	.align	2
-.L1557:
+.L1563:
 	.word	.LANCHOR51
 	.word	.LANCHOR168
 	.word	.LANCHOR52
@@ -11789,45 +11798,45 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1566
+	ldr	r4, .L1572
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1566+4
+	ldr	r5, .L1572+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1560:
+.L1566:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1563
+	bhi	.L1569
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1566+8
+	ldr	r3, .L1572+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1559
+	cbnz	r3, .L1565
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1565
-.L1563:
+	b	.L1571
+.L1569:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1561
-	ldr	r3, .L1566+8
+	bne	.L1567
+	ldr	r3, .L1572+8
 	movs	r5, #0
-	ldr	r0, .L1566+12
+	ldr	r0, .L1572+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1566+16
+	ldr	r2, .L1572+16
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11836,20 +11845,20 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1565:
+.L1571:
 	movs	r0, #1
-.L1559:
+.L1565:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1561:
+.L1567:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1560
-.L1567:
+	b	.L1566
+.L1573:
 	.align	2
-.L1566:
+.L1572:
 	.word	.LANCHOR89
 	.word	.LANCHOR113
 	.word	.LANCHOR53
@@ -11869,34 +11878,34 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1571
+	ldr	r4, .L1577
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1569
+	beq	.L1575
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1570
-.L1569:
+	cbnz	r3, .L1576
+.L1575:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1571
+	ldr	r0, .L1577
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1571+4
+	ldr	r3, .L1577+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1571+8
+	ldr	r3, .L1577+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1570:
-	ldr	r0, .L1571
+.L1576:
+	ldr	r0, .L1577
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1572:
+.L1578:
 	.align	2
-.L1571:
+.L1577:
 	.word	.LANCHOR53
 	.word	.LANCHOR96
 	.word	.LANCHOR97
@@ -11914,27 +11923,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r6, .L1588
+	ldr	r6, .L1594
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1588+4
+	ldr	r3, .L1594+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1588+8
+	ldr	r3, .L1594+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1574
-.L1576:
+	bne	.L1580
+.L1582:
 	mov	r7, #-1
-.L1573:
+.L1579:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1574:
+.L1580:
 	bl	FtlLoadSysInfo
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1576
+	bne	.L1582
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -11944,40 +11953,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1588+12
+	ldr	r3, .L1594+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1588+16
+	ldr	r3, .L1594+16
 	ldr	r2, [r3]
 	mov	r3, r7
-.L1577:
+.L1583:
 	cmp	r3, r1
-	bge	.L1582
+	bge	.L1588
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1578
-.L1582:
-	ldr	r5, .L1588+20
+	bge	.L1584
+.L1588:
+	ldr	r5, .L1594+20
 	cmp	r3, r1
-	ldr	r4, .L1588+24
+	ldr	r4, .L1594+24
 	ldrh	r2, [r5, #28]
 	add	r2, r2, #1
 	strh	r2, [r5, #28]	@ movhi
-	bge	.L1587
-.L1579:
-	ldr	r6, .L1588+28
-	ldr	r0, .L1588+24
+	bge	.L1593
+.L1585:
+	ldr	r6, .L1594+28
+	ldr	r0, .L1594+24
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1588+32
+	ldr	r3, .L1594+32
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1588+36
+	ldr	r0, .L1594+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	ip, [r6]
 	ldrh	r3, [r0]
@@ -11999,39 +12008,39 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1583
-.L1578:
+	b	.L1589
+.L1584:
 	adds	r3, r3, #1
-	b	.L1577
-.L1587:
+	b	.L1583
+.L1593:
 	ldrh	r3, [r6]
 	cmp	r3, #0
-	bne	.L1579
-.L1583:
+	bne	.L1585
+.L1589:
 	bl	FtlVpcCheckAndModify
 	ldrh	r0, [r4]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1573
+	beq	.L1579
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1573
-	ldr	r4, .L1588+28
+	bne	.L1579
+	ldr	r4, .L1594+28
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1573
+	bne	.L1579
 	bl	FtlGcRefreshBlock
 	ldrh	r0, [r4]
 	bl	FtlGcRefreshBlock
 	bl	FtlVpcTblFlush
-	ldr	r0, .L1588+24
+	ldr	r0, .L1594+24
 	bl	allocate_new_data_superblock
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-	b	.L1573
-.L1589:
+	b	.L1579
+.L1595:
 	.align	2
-.L1588:
+.L1594:
 	.word	.LANCHOR167
 	.word	.LANCHOR4
 	.word	.LANCHOR79
@@ -12054,33 +12063,33 @@ FtlSysBlkInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1713
+	ldr	r3, .L1719
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #48
 	str	r0, [sp, #8]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1667
-	ldr	r3, .L1713+4
+	bne	.L1673
+	ldr	r3, .L1719+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1590
-	ldr	r3, .L1713+8
+	bls	.L1596
+	ldr	r3, .L1719+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1592
-.L1595:
-	ldr	r3, .L1713+12
+	bne	.L1598
+.L1601:
+	ldr	r3, .L1719+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1593
-.L1594:
+	bne	.L1599
+.L1600:
 	bl	FtlReadRefresh
-	ldr	r2, .L1713+16
+	ldr	r2, .L1719+16
 	movw	r5, #65535
-	ldr	r6, .L1713+20
+	ldr	r6, .L1719+20
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
 	ldrh	r0, [r6]
@@ -12088,251 +12097,251 @@ rk_ftl_garbage_collect:
 	add	r3, r3, r1, lsl #7
 	cmp	r0, r5
 	str	r3, [r2]
-	bne	.L1596
-	ldr	r1, .L1713+24
+	bne	.L1602
+	ldr	r1, .L1719+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1597
-	ldr	r0, .L1713+28
+	bne	.L1603
+	ldr	r0, .L1719+28
 	ldrh	r8, [r0]
 	cmp	r8, r1
-	bne	.L1598
-	ldr	r7, .L1713+32
+	bne	.L1604
+	ldr	r7, .L1719+32
 	ldrh	r1, [r7]
 	cmp	r1, #24
 	ite	cc
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1598
-	ldr	r3, .L1713+36
+	bls	.L1604
+	ldr	r3, .L1719+36
 	movs	r4, #0
 	str	r4, [r2]
 	strh	r4, [r3]	@ movhi
 	bl	GetSwlReplaceBlock
 	cmp	r0, r8
 	mov	r5, r0
-	bne	.L1671
-	ldr	r8, .L1713+96
+	bne	.L1677
+	ldr	r8, .L1719+96
 	ldrh	r2, [r7]
 	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcs	.L1601
+	bcs	.L1607
 	movs	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1603
+	beq	.L1609
 	mov	r0, r3
-	ldr	r3, .L1713+40
+	ldr	r3, .L1719+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1604
+	bhi	.L1610
 	mov	r0, r4
 	bl	List_get_gc_head_node
 	uxth	r4, r0
 	movs	r3, #128
 	strh	r3, [r8]	@ movhi
 	cmp	r4, r5
-	bne	.L1600
-.L1603:
+	bne	.L1606
+.L1609:
 	bl	FtlGcReFreshBadBlk
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1606
+	bne	.L1612
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1606
-.L1665:
-	ldr	r3, .L1713+32
+	bne	.L1612
+.L1671:
+	ldr	r3, .L1719+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1672
-	ldr	r2, .L1713+44
+	bhi	.L1678
+	ldr	r2, .L1719+44
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1608
+	bls	.L1614
 	lsrs	r4, r4, #5
-.L1607:
-	ldr	r1, .L1713+48
+.L1613:
+	ldr	r1, .L1719+48
 	ldrh	r2, [r1]
 	cmp	r2, r3
 	mov	r2, r1
-	bcs	.L1611
-	ldr	r3, .L1713+24
+	bcs	.L1617
+	ldr	r3, .L1719+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1612
-	ldr	r0, .L1713+28
+	bne	.L1618
+	ldr	r0, .L1719+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1612
-	ldr	r3, .L1713+36
+	bne	.L1618
+	ldr	r3, .L1719+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1613
-	ldr	r3, .L1713+52
-	ldr	r4, .L1713+56
+	cbnz	r0, .L1619
+	ldr	r3, .L1719+52
+	ldr	r4, .L1719+56
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1614
-.L1613:
-	ldr	r3, .L1713+60
+	bcs	.L1620
+.L1619:
+	ldr	r3, .L1719+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.L1615:
-	ldr	r3, .L1713+64
+.L1621:
+	ldr	r3, .L1719+64
 	movs	r2, #0
 	str	r2, [r3]
-.L1590:
+.L1596:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1592:
-	ldr	r2, .L1713+24
+.L1598:
+	ldr	r2, .L1719+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1595
+	beq	.L1601
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1595
+	beq	.L1601
 	movs	r0, #1
-	b	.L1590
-.L1593:
-	ldr	r1, .L1713+28
+	b	.L1596
+.L1599:
+	ldr	r1, .L1719+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-	b	.L1594
-.L1604:
+	b	.L1600
+.L1610:
 	movs	r3, #64
-.L1707:
+.L1713:
 	strh	r3, [r8]	@ movhi
-	b	.L1603
-.L1601:
+	b	.L1609
+.L1607:
 	movs	r3, #80
-	b	.L1707
-.L1671:
+	b	.L1713
+.L1677:
 	mov	r4, r0
-.L1600:
-	ldr	r3, .L1713+40
+.L1606:
+	ldr	r3, .L1719+40
 	mov	r5, r4
-	ldr	r1, .L1713+48
+	ldr	r1, .L1719+48
 	ldrh	r2, [r7]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1713+68
+	ldr	r0, .L1719+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1713+72
+	ldr	r1, .L1719+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-	b	.L1603
-.L1608:
+	b	.L1609
+.L1614:
 	cmp	r3, #12
-	bls	.L1609
+	bls	.L1615
 	lsrs	r4, r4, #4
-	b	.L1607
-.L1609:
+	b	.L1613
+.L1615:
 	cmp	r3, #8
-	bls	.L1607
+	bls	.L1613
 	lsrs	r4, r4, #2
-	b	.L1607
-.L1672:
+	b	.L1613
+.L1678:
 	movs	r4, #1
-	b	.L1607
-.L1614:
+	b	.L1613
+.L1620:
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1615
-.L1612:
-	ldr	r3, .L1713+60
+	b	.L1621
+.L1618:
+	ldr	r3, .L1719+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.L1611:
-	ldr	r3, .L1713+76
+.L1617:
+	ldr	r3, .L1719+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1673
+	cbz	r3, .L1679
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1673:
+.L1679:
 	movw	r5, #65535
-.L1617:
+.L1623:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1626
+	bne	.L1632
 	cmp	r5, r3
-	beq	.L1627
+	beq	.L1633
 	strh	r5, [r6]	@ movhi
-.L1628:
+.L1634:
 	ldrh	r0, [r6]
 	movw	r7, #65535
 	movs	r3, #0
 	strb	r3, [r6, #8]
 	cmp	r0, r7
-	beq	.L1626
+	beq	.L1632
 	bl	IsBlkInGcList
-	cbz	r0, .L1631
+	cbz	r0, .L1637
 	strh	r7, [r6]	@ movhi
-.L1631:
+.L1637:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1626
-	ldr	r0, .L1713+20
+	beq	.L1632
+	ldr	r0, .L1719+20
 	bl	make_superblock
-	ldr	r2, .L1713+80
+	ldr	r2, .L1719+80
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1713+40
+	ldr	r3, .L1719+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1713+84
+	ldr	r3, .L1719+84
 	strh	r2, [r3]	@ movhi
-.L1626:
-	ldr	r2, .L1713+88
+.L1632:
+	ldr	r2, .L1719+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1632
-	ldr	r2, .L1713+92
+	beq	.L1638
+	ldr	r2, .L1719+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1633
-.L1632:
+	bne	.L1639
+.L1638:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1633:
-	ldr	fp, .L1713+20
+.L1639:
+	ldr	fp, .L1719+20
 	mov	r6, fp
-.L1663:
+.L1669:
 	ldrh	r2, [fp]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1634
-	ldr	r10, .L1713+100
+	bne	.L1640
+	ldr	r10, .L1719+100
 	movs	r2, #0
-	ldr	r3, .L1713+64
+	ldr	r3, .L1719+64
 	mov	r8, r10
 	str	r2, [r3]
-.L1635:
+.L1641:
 	ldrh	r7, [r10]
 	mov	r0, r7
 	bl	List_get_gc_head_node
@@ -12340,14 +12349,14 @@ rk_ftl_garbage_collect:
 	movw	r1, #65535
 	cmp	r3, r1
 	strh	r3, [r6]	@ movhi
-	bne	.L1636
+	bne	.L1642
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L1590
-.L1714:
+	b	.L1596
+.L1720:
 	.align	2
-.L1713:
+.L1719:
 	.word	.LANCHOR108
 	.word	.LANCHOR45
 	.word	.LANCHOR162
@@ -12374,100 +12383,100 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.L1618:
-	ldr	r3, .L1715
+.L1624:
+	ldr	r3, .L1721
 	movs	r2, #0
-	ldr	r5, .L1715+4
-	ldr	r4, .L1715+8
+	ldr	r5, .L1721+4
+	ldr	r4, .L1721+8
 	str	r2, [r3]
 	ldrh	r2, [r5]
 	ldrh	r3, [r4]
-	ldr	r7, .L1715+12
+	ldr	r7, .L1721+12
 	cmp	r2, r3
-	bls	.L1619
+	bls	.L1625
 	ldrh	r3, [r7]
-	cbnz	r3, .L1620
-	ldr	r3, .L1715+16
-	ldr	r2, .L1715+20
+	cbnz	r3, .L1626
+	ldr	r3, .L1721+16
+	ldr	r2, .L1721+20
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, lsr #2
-	bcs	.L1621
-.L1620:
-	ldr	r3, .L1715+24
+	bcs	.L1627
+.L1626:
+	ldr	r3, .L1721+24
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-.L1708:
+.L1714:
 	strh	r3, [r4]	@ movhi
 	bl	FtlReadRefresh
 	movs	r0, #0
 	bl	List_get_gc_head_node
-	ldr	r3, .L1715+28
+	ldr	r3, .L1721+28
 	uxth	r0, r0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #4
-	bls	.L1619
-.L1711:
+	bls	.L1625
+.L1717:
 	ldrh	r0, [r7]
-	b	.L1590
-.L1621:
+	b	.L1596
+.L1627:
 	movs	r3, #18
-	b	.L1708
-.L1619:
+	b	.L1714
+.L1625:
 	ldrh	r0, [r7]
 	cmp	r0, #0
-	bne	.L1623
-	ldr	r3, .L1715+24
+	bne	.L1629
+	ldr	r3, .L1721+24
 	ldrh	r8, [r3]
 	add	r2, r8, r8, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r4]	@ movhi
 	bl	List_get_gc_head_node
-	ldr	r3, .L1715+28
+	ldr	r3, .L1721+28
 	uxth	r0, r0
-	ldr	r2, .L1715+32
+	ldr	r2, .L1721+32
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1715+36
+	ldr	r3, .L1721+36
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1624
+	ble	.L1630
 	ldrh	r2, [r5]
 	add	r3, r8, #-1
 	cmp	r2, r3
-	blt	.L1624
+	blt	.L1630
 	bl	FtlReadRefresh
-	b	.L1711
-.L1624:
+	b	.L1717
+.L1630:
 	cmp	r1, #0
-	bne	.L1623
+	bne	.L1629
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r0, [r5]
 	adds	r0, r0, #1
-	b	.L1590
-.L1627:
-	ldr	r3, .L1715+40
+	b	.L1596
+.L1633:
+	ldr	r3, .L1721+40
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1628
-	ldr	r1, .L1715+28
+	beq	.L1634
+	ldr	r1, .L1721+28
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1629
+	cbnz	r2, .L1635
 	strh	r5, [r3]	@ movhi
-.L1629:
+.L1635:
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1628
-.L1636:
+	b	.L1634
+.L1642:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -12475,11 +12484,11 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1637
+	cbz	r0, .L1643
 	strh	r7, [r10]	@ movhi
-	b	.L1635
-.L1637:
-	ldr	lr, .L1715+28
+	b	.L1641
+.L1643:
+	ldr	lr, .L1721+28
 	uxth	r0, r2
 	uxth	r7, r7
 	ldr	r2, [lr]
@@ -12487,111 +12496,111 @@ rk_ftl_garbage_collect:
 	str	lr, [sp, #16]
 	ldrh	ip, [r2, r0, lsl #1]
 	str	r2, [sp, #12]
-	ldr	r2, .L1715+44
+	ldr	r2, .L1721+44
 	ldrh	r2, [r2]
 	mov	r1, r2
-	ldr	r2, .L1715+32
+	ldr	r2, .L1721+32
 	ldrh	r2, [r2]
 	muls	r2, r1, r2
 	cmp	ip, r2, asr #1
-	bgt	.L1639
+	bgt	.L1645
 	cmp	r7, #48
-	bls	.L1640
+	bls	.L1646
 	cmp	ip, #8
-	bls	.L1640
-	ldr	r7, .L1715+48
+	bls	.L1646
+	ldr	r7, .L1721+48
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1640
-.L1639:
+	bhi	.L1646
+.L1645:
 	movs	r7, #0
 	strh	r7, [r8]	@ movhi
-.L1640:
+.L1646:
 	ldr	r1, [sp, #12]
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	r2, r1
-	bgt	.L1641
+	bgt	.L1647
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1641
+	bne	.L1647
 	ldrh	r2, [r8]
 	cmp	r2, #3
-	bhi	.L1641
+	bhi	.L1647
 	movs	r3, #0
 	strh	r5, [r6]	@ movhi
 	strh	r3, [r8]	@ movhi
-.L1712:
-	ldr	r3, .L1715+12
+.L1718:
+	ldr	r3, .L1721+12
 	ldrh	r0, [r3]
-	b	.L1590
-.L1641:
-	cbnz	r1, .L1642
+	b	.L1596
+.L1647:
+	cbnz	r1, .L1648
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r8]
 	adds	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	b	.L1635
-.L1642:
+	b	.L1641
+.L1648:
 	movs	r2, #0
 	strb	r2, [r6, #8]
-	ldr	r2, .L1715+52
+	ldr	r2, .L1721+52
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1643
+	bne	.L1649
 	mov	r2, #700
-	ldr	r1, .L1715+56
-	ldr	r0, .L1715+60
+	ldr	r1, .L1721+56
+	ldr	r0, .L1721+60
 	bl	printf
-.L1643:
-	ldr	r3, .L1715+64
+.L1649:
+	ldr	r3, .L1721+64
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1644
+	bne	.L1650
 	movw	r2, #701
-	ldr	r1, .L1715+56
-	ldr	r0, .L1715+60
+	ldr	r1, .L1721+56
+	ldr	r0, .L1721+60
 	bl	printf
-.L1644:
-	ldr	r3, .L1715+68
+.L1650:
+	ldr	r3, .L1721+68
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1645
+	bne	.L1651
 	movw	r2, #702
-	ldr	r1, .L1715+56
-	ldr	r0, .L1715+60
+	ldr	r1, .L1721+56
+	ldr	r0, .L1721+60
 	bl	printf
-.L1645:
+.L1651:
 	mov	r0, fp
 	bl	make_superblock
-	ldr	r2, .L1715+72
+	ldr	r2, .L1721+72
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1715+76
+	ldr	r2, .L1721+76
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1634:
-	ldr	r3, .L1715+80
+.L1640:
+	ldr	r3, .L1721+80
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1715+44
+	ldr	r3, .L1721+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1646
-	ldr	r3, .L1715+32
+	cbz	r3, .L1652
+	ldr	r3, .L1721+32
 	ldr	r2, [sp, #20]
 	ldrh	r1, [r6]
 	ldrh	r3, [r3]
 	muls	r3, r2, r3
-	ldr	r2, .L1715+28
+	ldr	r2, .L1721+28
 	ldr	r2, [r2]
 	ldrh	r2, [r2, r1, lsl #1]
 	subs	r3, r3, r2
@@ -12599,7 +12608,7 @@ rk_ftl_garbage_collect:
 	addmi	r3, r3, #3
 	add	r4, r4, r3, asr #2
 	uxth	r4, r4
-.L1646:
+.L1652:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #20]
 	adds	r2, r3, r4
@@ -12610,29 +12619,29 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-.L1710:
+.L1716:
 	str	r3, [sp, #28]
 	ldrh	r3, [sp, #28]
 	cmp	r4, r3
-	bls	.L1657
-	ldr	r3, .L1715+32
+	bls	.L1663
+	ldr	r3, .L1721+32
 	movw	lr, #65535
 	ldrh	r1, [fp, #2]
 	mov	ip, #20
-	ldr	r7, .L1715+84
+	ldr	r7, .L1721+84
 	ldrh	r8, [r3]
-	ldr	r3, .L1715+88
+	ldr	r3, .L1721+88
 	ldr	r0, [r3]
 	ldr	r3, [sp, #28]
 	adds	r3, r1, r3
 	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1658
-.L1651:
+	b	.L1664
+.L1657:
 	ldrh	r2, [r7, #2]!
 	cmp	r2, lr
-	beq	.L1650
+	beq	.L1656
 	ldr	r1, [sp, #12]
 	mla	r10, ip, r1, r0
 	ldr	r1, [sp, #16]
@@ -12642,28 +12651,28 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1650:
+.L1656:
 	adds	r3, r3, #1
-.L1658:
+.L1664:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L1651
+	bhi	.L1657
 	ldrb	r2, [fp, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1709:
+.L1715:
 	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1656
+	bhi	.L1662
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1710
-.L1716:
+	b	.L1716
+.L1722:
 	.align	2
-.L1715:
+.L1721:
 	.word	.LANCHOR87
 	.word	.LANCHOR48
 	.word	.LANCHOR82
@@ -12687,51 +12696,51 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR108
 	.word	.LANCHOR80+14
 	.word	.LANCHOR93
-.L1656:
+.L1662:
 	ldr	r3, [sp, #24]
 	movs	r7, #20
 	muls	r7, r3, r7
-	ldr	r3, .L1717
+	ldr	r3, .L1723
 	ldr	r3, [r3]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1653
+	beq	.L1659
 	ldr	r3, [r2, #12]
 	ldrh	r2, [r3]
 	str	r3, [sp, #16]
 	movw	r3, #61589
 	cmp	r2, r3
-	bne	.L1653
+	bne	.L1659
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
 	cmp	r8, #-1
-	bne	.L1654
+	bne	.L1660
 	mov	r2, #736
-	ldr	r1, .L1717+4
-	ldr	r0, .L1717+8
+	ldr	r1, .L1723+4
+	ldr	r0, .L1723+8
 	bl	printf
-.L1654:
+.L1660:
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-	ldr	r3, .L1717
+	ldr	r3, .L1723
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1653
-	ldr	r3, .L1717+12
+	bne	.L1659
+	ldr	r3, .L1723+12
 	mov	r10, #20
-	ldr	r2, .L1717+12
-	ldr	r8, .L1717+32
+	ldr	r2, .L1723+12
+	ldr	r8, .L1723+32
 	ldrh	r3, [r3]
 	ldr	r1, [r1, #16]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1717+16
+	ldr	r2, .L1723+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
@@ -12746,11 +12755,11 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1717
+	ldr	r2, .L1723
 	adds	r3, r3, #1
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	ldr	r7, .L1717+20
+	ldr	r7, .L1723+20
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
 	ldr	r2, [r0, #12]
@@ -12759,7 +12768,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r1, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L1717+24
+	ldr	r2, .L1723+24
 	str	r3, [r8]
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
@@ -12768,114 +12777,114 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1655
+	beq	.L1661
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1653
-.L1655:
+	cbnz	r3, .L1659
+.L1661:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1653
-	ldr	r3, .L1717+28
+	cbz	r0, .L1659
+	ldr	r3, .L1723+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1712
-.L1653:
+	b	.L1718
+.L1659:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1709
-.L1657:
+	b	.L1715
+.L1663:
 	ldrh	r3, [fp, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #20]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [fp, #2]	@ movhi
-	ldr	r4, .L1717+28
-	bhi	.L1659
-	ldr	r3, .L1717+32
+	ldr	r4, .L1723+28
+	bhi	.L1665
+	ldr	r3, .L1723+32
 	ldr	r3, [r3]
-	cbz	r3, .L1660
+	cbz	r3, .L1666
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1660
+	cbz	r0, .L1666
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1712
-.L1660:
-	ldr	r3, .L1717+12
+	b	.L1718
+.L1666:
+	ldr	r3, .L1723+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1661
-	ldr	r3, .L1717+36
+	cbnz	r1, .L1667
+	ldr	r3, .L1723+36
 	ldrh	r2, [fp]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1661
+	cbz	r0, .L1667
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	ldrh	r0, [fp]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1661:
+.L1667:
 	movw	r3, #65535
 	strh	r3, [fp]	@ movhi
-.L1659:
+.L1665:
 	movs	r3, #0
 	str	r3, [r4]
-	ldr	r3, .L1717+40
+	ldr	r3, .L1723+40
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1662
-	ldr	r3, .L1717+44
+	bhi	.L1668
+	ldr	r3, .L1723+44
 	ldrh	r4, [r3]
-	b	.L1663
-.L1662:
-	ldr	r2, .L1717+48
+	b	.L1669
+.L1668:
+	ldr	r2, .L1723+48
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1590
+	bne	.L1596
 	adds	r0, r3, #1
-	b	.L1590
-.L1667:
+	b	.L1596
+.L1673:
 	movs	r0, #0
-	b	.L1590
-.L1596:
+	b	.L1596
+.L1602:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L1665
-.L1606:
-	ldr	r3, .L1717+20
+	beq	.L1671
+.L1612:
+	ldr	r3, .L1723+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1676
-.L1666:
-	ldr	r3, .L1717+52
+	bne	.L1682
+.L1672:
+	ldr	r3, .L1723+52
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1676
+	bne	.L1682
 	cmp	r5, r3
-	bne	.L1676
+	bne	.L1682
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1618
-.L1623:
+	beq	.L1624
+.L1629:
 	movw	r5, #65535
-.L1676:
+.L1682:
 	movs	r4, #1
-	b	.L1617
-.L1598:
+	b	.L1623
+.L1604:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L1665
+	beq	.L1671
 	movw	r5, #65535
-	b	.L1666
-.L1597:
+	b	.L1672
+.L1603:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1623
-	b	.L1665
-.L1718:
+	bne	.L1629
+	b	.L1671
+.L1724:
 	.align	2
-.L1717:
+.L1723:
 	.word	.LANCHOR93
 	.word	.LANCHOR180
 	.word	.LC1
@@ -12904,41 +12913,41 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r3, #-1
-	ldr	r4, .L1725
-	ldr	r1, .L1725+4
-	ldr	r0, .L1725+8
+	ldr	r4, .L1731
+	ldr	r1, .L1731+4
+	ldr	r0, .L1731+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1725+12
+	ldr	r0, .L1731+12
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1725+16
+	ldr	r3, .L1731+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	r0, .L1723
+	cbnz	r0, .L1729
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1723
+	cbnz	r0, .L1729
 	movs	r3, #1
 	str	r3, [r4]
-	ldr	r3, .L1725+20
+	ldr	r3, .L1731+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1723
+	bhi	.L1729
 	movw	r4, #8129
-.L1722:
+.L1728:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1722
-.L1723:
+	bne	.L1728
+.L1729:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1726:
+.L1732:
 	.align	2
-.L1725:
+.L1731:
 	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
@@ -12979,31 +12988,31 @@ FtlRead:
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #24]
-	bne	.L1729
+	bne	.L1735
 	mov	r2, r3
 	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1728:
+.L1734:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1729:
+.L1735:
 	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1761
+	ldr	r3, .L1767
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1750
-	ldr	r3, .L1761+4
+	bhi	.L1756
+	ldr	r3, .L1767+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L1751
-	ldr	r3, .L1761+8
+	beq	.L1757
+	ldr	r3, .L1767+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -13016,7 +13025,7 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1761+12
+	ldr	r2, .L1767+12
 	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
 	ldr	r4, [sp, #16]
@@ -13029,54 +13038,54 @@ FtlRead:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1761+16
+	ldr	r2, .L1767+16
 	str	r7, [sp, #4]
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1731:
+.L1737:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1748
-	ldr	r3, .L1761+20
+	cbnz	r3, .L1754
+	ldr	r3, .L1767+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1749
-	ldr	r3, .L1761+24
+	cbnz	r3, .L1755
+	ldr	r3, .L1767+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1728
-.L1749:
+	bhi	.L1734
+.L1755:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1728
-.L1748:
+	b	.L1734
+.L1754:
 	movs	r2, #0
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
 	adds	r0, r3, #1
-	bne	.L1732
-	ldr	fp, .L1761+8
+	bne	.L1738
+	ldr	fp, .L1767+8
 	mov	r10, #0
-.L1733:
+.L1739:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1735
-.L1736:
+	bcc	.L1741
+.L1742:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1740
-	ldr	r3, .L1761+28
+	beq	.L1746
+	ldr	r3, .L1767+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1731
-.L1740:
+	bne	.L1737
+.L1746:
 	cmp	r5, #0
-	beq	.L1731
-	ldr	r3, .L1761+32
+	beq	.L1737
+	ldr	r3, .L1767+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -13090,29 +13099,29 @@ FtlRead:
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1747:
+.L1753:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1761+32
+	ldr	r3, .L1767+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1742
+	bne	.L1748
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1761+36
+	ldr	r2, .L1767+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1743
+	bne	.L1749
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1760:
+.L1766:
 	bl	ftl_memcpy
-.L1743:
-	ldr	r3, .L1761+32
+.L1749:
+	ldr	r3, .L1767+32
 	ldr	r3, [r3]
 	add	r2, r3, fp
 	ldr	r3, [r3, fp]
@@ -13121,49 +13130,49 @@ FtlRead:
 	ldr	r0, [r0, #8]
 	cmp	r1, r0
 	itttt	ne
-	ldrne	r0, .L1761+40
+	ldrne	r0, .L1767+40
 	ldrne	r1, [r0, #72]
 	addne	r1, r1, #1
 	strne	r1, [r0, #72]
 	adds	r1, r3, #1
-	bne	.L1745
-	ldr	r1, .L1761+40
+	bne	.L1751
+	ldr	r1, .L1767+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1746:
+.L1752:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1747
+	bne	.L1753
 	movs	r5, #0
-	b	.L1731
-.L1735:
+	b	.L1737
+.L1741:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1734
+	bhi	.L1740
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1734
+	bls	.L1740
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1734:
+.L1740:
 	add	r10, r10, #1
-	b	.L1733
-.L1732:
-	ldr	r2, .L1761+32
+	b	.L1739
+.L1738:
+	ldr	r2, .L1767+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1761+8
-	bne	.L1737
-	ldr	r2, .L1761+36
+	ldr	r3, .L1767+8
+	bne	.L1743
+	ldr	r2, .L1767+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -13178,11 +13187,11 @@ FtlRead:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #32]
-	bne	.L1738
+	bne	.L1744
 	str	r8, [r10, #8]
-.L1738:
-	ldr	r3, .L1761+44
-	ldr	r2, .L1761+48
+.L1744:
+	ldr	r3, .L1767+44
+	ldr	r2, .L1767+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -13191,12 +13200,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1736
-.L1737:
+	b	.L1742
+.L1743:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1739
-	ldr	r2, .L1761+52
+	bne	.L1745
+	ldr	r2, .L1767+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -13204,49 +13213,49 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1738
-.L1759:
+	bne	.L1744
+.L1765:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1738
-.L1739:
+	b	.L1744
+.L1745:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1759
-.L1742:
+	b	.L1765
+.L1748:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1743
-	ldr	r3, .L1761+52
+	bne	.L1749
+	ldr	r3, .L1767+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1743
-	ldr	r2, .L1761+8
+	bne	.L1749
+	ldr	r2, .L1767+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1760
-.L1745:
+	b	.L1766
+.L1751:
 	cmp	r3, #256
-	bne	.L1746
+	bne	.L1752
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1746
-.L1750:
+	b	.L1752
+.L1756:
 	mov	r3, #-1
-.L1751:
+.L1757:
 	str	r3, [sp, #4]
-	b	.L1728
-.L1762:
+	b	.L1734
+.L1768:
 	.align	2
-.L1761:
+.L1767:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR12
@@ -13297,46 +13306,46 @@ FtlWrite:
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1765
+	bne	.L1771
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	add	r0, r3, #256
 	bl	FtlVendorPartWrite
-.L1764:
+.L1770:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1765:
+.L1771:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #20]
 	adds	r4, r3, r2
-	ldr	r3, .L1816
+	ldr	r3, .L1822
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1802
-	ldr	r3, .L1816+4
+	bhi	.L1808
+	ldr	r3, .L1822+4
 	ldr	r0, [r3]
 	adds	r5, r0, #1
-	beq	.L1764
-	ldr	r3, .L1816+8
+	beq	.L1770
+	ldr	r3, .L1822+8
 	mov	r2, #2048
 	ldr	r0, [sp, #4]
 	str	r2, [r3]
-	ldr	r3, .L1816+12
+	ldr	r3, .L1822+12
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
 	mov	r1, r5
 	str	r0, [sp, #12]
 	subs	r0, r4, #1
-	ldr	r5, .L1816+16
+	ldr	r5, .L1822+16
 	bl	__aeabi_uidiv
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	str	r0, [sp, #28]
 	subs	r3, r0, r2
-	ldr	r2, .L1816+20
+	ldr	r2, .L1822+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
@@ -13344,70 +13353,70 @@ FtlWrite:
 	add	r3, r3, r1
 	ldr	r1, [sp, #8]
 	str	r3, [r2]
-	ldr	r2, .L1816+24
+	ldr	r2, .L1822+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L1816+28
+	ldr	r3, .L1822+28
 	ldr	r3, [r3]
-	cbz	r3, .L1767
+	cbz	r3, .L1773
 	ldrh	r2, [r5, #4]
-	ldr	r3, .L1816+32
+	ldr	r3, .L1822+32
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.L1767:
+.L1773:
 	ldr	r6, [sp, #12]
-.L1768:
+.L1774:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1797
-	ldr	r5, .L1816+36
+	cbnz	r3, .L1803
+	ldr	r5, .L1822+36
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
 	ldrh	r2, [r5]
 	cmp	r2, #5
-	bls	.L1798
-.L1800:
+	bls	.L1804
+.L1806:
 	movs	r0, #0
-	b	.L1764
-.L1797:
-	ldr	r3, .L1816+40
+	b	.L1770
+.L1803:
+	ldr	r3, .L1822+40
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1769
+	bcc	.L1775
 	movw	r2, #1011
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1769:
+.L1775:
 	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1770
-	ldr	r3, .L1816+16
-	ldr	r4, .L1816+28
+	cbnz	r2, .L1776
+	ldr	r3, .L1822+16
+	ldr	r4, .L1822+28
 	cmp	r5, r3
-	bne	.L1771
-	ldr	r0, .L1816+32
+	bne	.L1777
+	ldr	r0, .L1822+32
 	ldrh	r5, [r0, #4]
-	cbnz	r5, .L1772
+	cbnz	r5, .L1778
 	bl	allocate_new_data_superblock
 	str	r5, [r4]
-.L1772:
-	ldr	r0, .L1816+16
+.L1778:
+	ldr	r0, .L1822+16
 	bl	allocate_new_data_superblock
-	ldr	r5, .L1816+16
+	ldr	r5, .L1822+16
 	ldr	r2, [r4]
-	ldr	r3, .L1816+32
+	ldr	r3, .L1822+32
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1773:
+.L1779:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1770
+	cbnz	r3, .L1776
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1770:
+.L1776:
 	ldrh	r2, [r5, #4]
 	ldr	r3, [sp, #8]
 	cmp	r2, r3
@@ -13418,25 +13427,25 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1816+40
+	ldr	r3, .L1822+40
 	str	r2, [sp, #44]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1774
+	bcc	.L1780
 	movw	r2, #1044
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1774:
-	ldr	r8, .L1816+52
+.L1780:
+	ldr	r8, .L1822+52
 	mov	fp, #0
-.L1775:
+.L1781:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1795
-.L1776:
-	ldr	r0, .L1816+52
+	bne	.L1801
+.L1782:
+	ldr	r0, .L1822+52
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, fp
@@ -13444,30 +13453,30 @@ FtlWrite:
 	bl	FtlProgPages
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1796
+	bls	.L1802
 	movw	r2, #1121
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1796:
+.L1802:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-	b	.L1768
-.L1771:
+	b	.L1774
+.L1777:
 	str	r2, [r4]
 	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1807
+	cbnz	r2, .L1813
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-	b	.L1773
-.L1807:
+	b	.L1779
+.L1813:
 	mov	r5, r3
-	b	.L1770
-.L1795:
+	b	.L1776
+.L1801:
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1776
+	beq	.L1782
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r6
@@ -13476,7 +13485,7 @@ FtlWrite:
 	mov	r0, r5
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-	ldr	r3, .L1816+56
+	ldr	r3, .L1822+56
 	ldr	r1, [r8]
 	ldrh	r2, [r3]
 	add	r1, r1, r7
@@ -13484,7 +13493,7 @@ FtlWrite:
 	str	r6, [r1, #16]
 	mul	r0, r2, fp
 	bic	r3, r0, #3
-	ldr	r0, .L1816+60
+	ldr	r0, .L1822+60
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
@@ -13495,12 +13504,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1816+12
+	ldr	r2, .L1822+12
 	cmp	r6, r3
-	beq	.L1777
+	beq	.L1783
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	bne	.L1812
+	bne	.L1818
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
@@ -13510,8 +13519,8 @@ FtlWrite:
 	subs	r4, r4, r2
 	str	r3, [sp, #24]
 	uxth	r4, r4
-	b	.L1780
-.L1777:
+	b	.L1786
+.L1783:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
@@ -13522,13 +13531,13 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1780:
-	ldr	r2, .L1816+12
+.L1786:
+	ldr	r2, .L1822+12
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	cmp	r4, r2
 	ldr	r2, [r8]
-	bne	.L1781
+	bne	.L1787
 	cmp	r6, r3
 	add	r7, r7, r2
 	ittet	ne
@@ -13541,23 +13550,23 @@ FtlWrite:
 	streq	r3, [r7, #8]
 	addne	r4, r3, r4, lsl #9
 	strne	r4, [r7, #8]
-.L1783:
-	ldr	r3, .L1816+40
+.L1789:
+	ldr	r3, .L1822+40
 	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1792
+	bcc	.L1798
 	mov	r2, #1112
-	ldr	r1, .L1816+44
-	ldr	r0, .L1816+48
+	ldr	r1, .L1822+44
+	ldr	r0, .L1822+48
 	bl	printf
-.L1792:
+.L1798:
 	ldr	r3, [sp, #40]
 	movw	r2, #61589
 	ldr	r1, [sp, #36]
 	add	fp, fp, #1
 	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1816+64
+	ldr	r1, .L1822+64
 	str	r6, [r10, #8]
 	adds	r6, r6, #1
 	ldr	r2, [r1]
@@ -13571,10 +13580,10 @@ FtlWrite:
 	str	r2, [r10, #12]
 	ldrh	r2, [r5]
 	strh	r2, [r10, #2]	@ movhi
-	b	.L1775
-.L1817:
+	b	.L1781
+.L1823:
 	.align	2
-.L1816:
+.L1822:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR181
@@ -13592,17 +13601,17 @@ FtlWrite:
 	.word	.LANCHOR24
 	.word	.LANCHOR124
 	.word	.LANCHOR71
-.L1781:
+.L1787:
 	cmp	r6, r3
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1818
-	ldrne	r1, .L1818+4
+	ldreq	r1, .L1824
+	ldrne	r1, .L1824+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1786
+	beq	.L1792
 	str	r2, [sp, #56]
 	add	r0, sp, #52
 	ldr	r2, [r8]
@@ -13617,56 +13626,56 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1787
-	ldr	r1, .L1818+8
+	bne	.L1793
+	ldr	r1, .L1824+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1790:
+.L1796:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r6, r3
-	bne	.L1791
+	bne	.L1797
 	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
 	add	r7, r7, r1
 	ldr	r1, [sp, #16]
 	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1814:
+.L1820:
 	bl	ftl_memcpy
-	b	.L1783
-.L1787:
+	b	.L1789
+.L1793:
 	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1789
-	ldr	r0, .L1818+8
+	beq	.L1795
+	ldr	r0, .L1824+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	mov	r2, r6
-	ldr	r0, .L1818+12
+	ldr	r0, .L1824+12
 	bl	printf
-.L1789:
+.L1795:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1790
+	beq	.L1796
 	movw	r2, #1097
-	ldr	r1, .L1818+16
-	ldr	r0, .L1818+20
+	ldr	r1, .L1824+16
+	ldr	r0, .L1824+20
 	bl	printf
-	b	.L1790
-.L1786:
+	b	.L1796
+.L1792:
 	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1818+24
+	ldr	r2, .L1824+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-	b	.L1790
-.L1791:
-	ldr	r1, .L1818+28
+	b	.L1796
+.L1797:
+	ldr	r1, .L1824+28
 	ldr	r3, [sp, #4]
 	ldr	r0, [r8]
 	ldrh	r1, [r1]
@@ -13676,8 +13685,8 @@ FtlWrite:
 	subs	r1, r1, r3
 	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1814
-.L1812:
+	b	.L1820
+.L1818:
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [r8]
@@ -13687,30 +13696,30 @@ FtlWrite:
 	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1783
-.L1798:
-	ldr	r6, .L1818+32
+	b	.L1789
+.L1804:
+	ldr	r6, .L1824+32
 	mov	r4, #256
-	ldr	r7, .L1818+36
-.L1801:
+	ldr	r7, .L1824+36
+.L1807:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1799
+	bne	.L1805
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1799
+	bne	.L1805
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1799:
-	ldr	r2, .L1818+40
+.L1805:
+	ldr	r2, .L1824+40
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1818+44
+	ldr	r2, .L1824+44
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
@@ -13718,16 +13727,16 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	r3, [r5]
 	cmp	r3, #2
-	bhi	.L1800
+	bhi	.L1806
 	subs	r4, r4, #1
-	bne	.L1801
-	b	.L1800
-.L1802:
+	bne	.L1807
+	b	.L1806
+.L1808:
 	mov	r0, #-1
-	b	.L1764
-.L1819:
+	b	.L1770
+.L1825:
 	.align	2
-.L1818:
+.L1824:
 	.word	.LANCHOR118
 	.word	.LANCHOR119
 	.word	.LANCHOR81
@@ -13761,30 +13770,30 @@ sftl_write:
 	mov	fp, r0
 	str	r1, [sp, #24]
 	str	r2, [sp, #44]
-	bls	.L1821
+	bls	.L1827
 	cmp	r0, #576
-	bls	.L1822
-.L1821:
-	ldr	r3, .L1863
+	bls	.L1828
+.L1827:
+	ldr	r3, .L1869
 	ldr	r3, [r3]
-	cbz	r3, .L1823
-	ldr	r3, .L1863+4
+	cbz	r3, .L1829
+	ldr	r3, .L1869+4
 	ldr	r10, [r3]
-	ldr	r3, .L1863+8
+	ldr	r3, .L1869+8
 	ldr	r2, [r10]
 	cmp	r2, r3
-	beq	.L1824
-.L1841:
-	ldr	r3, .L1863
+	beq	.L1830
+.L1847:
+	ldr	r3, .L1869
 	movs	r2, #0
 	str	r2, [r3]
-	ldr	r3, .L1863+4
+	ldr	r3, .L1869+4
 	ldr	r0, [r3]
 	bl	free
-	ldr	r3, .L1863+12
+	ldr	r3, .L1869+12
 	ldr	r0, [r3]
 	bl	free
-.L1823:
+.L1829:
 	ldr	r3, [sp, #44]
 	mov	r1, fp
 	ldr	r2, [sp, #24]
@@ -13793,16 +13802,16 @@ sftl_write:
 	add	sp, sp, #136
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1824:
-	ldr	r3, .L1863+16
+.L1830:
+	ldr	r3, .L1869+16
 	add	r0, r10, #262144
 	movw	r2, #65535
 	ldrh	r4, [r3, #14]
 	ldrh	r5, [r3, #10]
 	movs	r3, #0
-.L1828:
+.L1834:
 	ldr	r1, [r0, #-4]
-	cbnz	r1, .L1825
+	cbnz	r1, .L1831
 	ldr	r1, [r10, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -13811,22 +13820,22 @@ sftl_write:
 	movhi	r3, #0
 	cmp	r2, #4096
 	str	r1, [r0, #-4]!
-	bne	.L1828
+	bne	.L1834
 	mov	r3, #512
 	str	r3, [sp, #12]
-	b	.L1827
-.L1825:
+	b	.L1833
+.L1831:
 	add	r3, r2, #127
-	ldr	r0, .L1863+20
+	ldr	r0, .L1869+20
 	lsrs	r3, r3, #7
 	str	r3, [sp, #12]
 	bl	printf
-.L1827:
+.L1833:
 	uxtb	r4, r4
 	mov	r8, #0
 	smulbb	r5, r4, r5
 	uxth	r3, r5
-	ldr	r5, .L1863+24
+	ldr	r5, .L1869+24
 	str	r3, [sp, #16]
 	subs	r0, r3, #1
 	mov	r1, r3
@@ -13843,23 +13852,23 @@ sftl_write:
 	ldr	r3, [sp, #12]
 	lsls	r3, r3, #7
 	str	r3, [sp, #56]
-	b	.L1840
-.L1848:
+	b	.L1846
+.L1854:
 	str	r3, [sp, #40]
-.L1840:
-	ldr	r3, .L1863+12
+.L1846:
+	ldr	r3, .L1869+12
 	mov	r2, #512
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	mov	r0, r8
 	ldrh	r7, [r3, #14]
 	mov	r1, r7
 	uxtb	r6, r7
 	uxth	r3, r6
 	str	r3, [sp, #36]
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	ldrh	r4, [r3, #10]
 	ldrh	r3, [sp, #36]
 	smulbb	r4, r4, r3
@@ -13871,7 +13880,7 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bls	.L1829
+	bls	.L1835
 	mov	r1, r7
 	add	r0, r4, r8
 	bl	__aeabi_uidiv
@@ -13879,7 +13888,7 @@ sftl_write:
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1829:
+.L1835:
 	mov	r1, r4
 	mov	r0, r8
 	movs	r4, #0
@@ -13887,20 +13896,20 @@ sftl_write:
 	sub	r3, r8, r1
 	str	r1, [sp, #48]
 	str	r3, [sp, #52]
-.L1830:
+.L1836:
 	ldr	r3, [sp, #28]
 	cmp	r3, r4
-	bhi	.L1831
-	ldr	r3, .L1863+12
+	bhi	.L1837
+	ldr	r3, .L1869+12
 	mov	r0, r8
 	movs	r4, #0
 	ldr	r3, [r3]
 	str	r3, [sp, #52]
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	ldrb	r7, [r3, #14]	@ zero_extendqisi2
 	uxth	r3, r7
 	str	r3, [sp, #48]
-	ldr	r3, .L1863+16
+	ldr	r3, .L1869+16
 	ldrh	r1, [r3, #10]
 	ldrh	r3, [sp, #48]
 	smulbb	r1, r1, r3
@@ -13913,10 +13922,10 @@ sftl_write:
 	str	r3, [sp, #60]
 	bl	__aeabi_idivmod
 	uxth	r6, r1
-.L1832:
+.L1838:
 	ldr	r3, [sp, #12]
 	cmp	r4, r3
-	bcs	.L1836
+	bcs	.L1842
 	ldr	r3, [sp, #48]
 	mov	r1, r7
 	subs	r3, r3, r6
@@ -13941,26 +13950,26 @@ sftl_write:
 	movs	r0, #0
 	blx	r6
 	adds	r0, r0, #1
-	bne	.L1833
-.L1836:
-	ldr	r3, .L1863+12
+	bne	.L1839
+.L1842:
+	ldr	r3, .L1869+12
 	mov	r1, r10
 	movs	r4, #0
 	ldr	r0, [r3]
-.L1834:
+.L1840:
 	mov	r7, r1
 	ldr	r2, [r0, r4, lsl #2]
 	ldr	r3, [r7]
 	lsls	r6, r4, #2
 	adds	r1, r1, #4
 	cmp	r2, r3
-	beq	.L1837
+	beq	.L1843
 	mov	r2, #512
 	movs	r1, #0
 	bl	memset
-	ldr	r3, .L1863+12
+	ldr	r3, .L1869+12
 	mov	r1, r8
-	ldr	r0, .L1863+28
+	ldr	r0, .L1869+28
 	ldr	r2, [r3]
 	str	r4, [sp]
 	ldr	r3, [r7]
@@ -13972,13 +13981,13 @@ sftl_write:
 	blx	r3
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1847
+	bls	.L1853
 	ldr	r2, [sp, #16]
 	movs	r0, #0
 	ldr	r3, [r5, #4]
 	add	r1, r2, r8
 	blx	r3
-.L1847:
+.L1853:
 	ldr	r2, [sp, #40]
 	ldr	r3, [sp, #20]
 	add	r3, r3, r2
@@ -13986,9 +13995,9 @@ sftl_write:
 	add	r8, r8, r2
 	ldr	r2, [sp, #40]
 	cmp	r2, #15
-	bls	.L1848
-	b	.L1841
-.L1831:
+	bls	.L1854
+	b	.L1847
+.L1837:
 	ldr	r3, [sp, #48]
 	mov	r1, r6
 	adds	r0, r3, r4
@@ -14013,55 +14022,55 @@ sftl_write:
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
 	uxth	r4, r4
-	b	.L1830
-.L1833:
+	b	.L1836
+.L1839:
 	ldr	r3, [sp, #64]
 	movs	r6, #0
 	add	r3, r3, r4
 	uxth	r4, r3
-	b	.L1832
-.L1837:
+	b	.L1838
+.L1843:
 	ldr	r3, [sp, #56]
 	adds	r4, r4, #1
 	cmp	r4, r3
-	bne	.L1834
+	bne	.L1840
 	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #32]
-	bls	.L1847
-	b	.L1841
-.L1822:
+	bls	.L1853
+	b	.L1847
+.L1828:
 	cmp	r0, #64
-	ldr	r6, .L1863+4
-	bne	.L1842
+	ldr	r6, .L1869+4
+	bne	.L1848
 	mov	r0, #262144
 	bl	ftl_malloc
 	str	r0, [r6]
 	mov	r0, #262144
 	bl	ftl_malloc
-	ldr	r3, .L1863+12
+	ldr	r3, .L1869+12
 	str	r0, [r3]
 	ldr	r3, [r6]
-	cbz	r3, .L1843
-	cbz	r0, .L1843
-	ldr	r2, .L1863
+	cbz	r3, .L1849
+	cbz	r0, .L1849
+	ldr	r2, .L1869
 	movs	r1, #1
 	mov	r0, r3
 	str	r1, [r2]
 	mov	r2, #262144
 	movs	r1, #0
 	bl	ftl_memset
-.L1842:
+.L1848:
 	cmp	fp, #63
 	ldr	r0, [r6]
-	bhi	.L1844
+	bhi	.L1850
 	ldr	r3, [sp, #24]
 	rsb	r1, fp, #64
 	subs	r2, r3, r1
 	ldr	r3, [sp, #44]
 	add	r1, r3, r1, lsl #9
-.L1845:
+.L1851:
 	cmp	r5, #576
 	ittt	hi
 	subhi	r2, r2, r4
@@ -14069,10 +14078,10 @@ sftl_write:
 	addhi	r2, r2, r3
 	lsls	r2, r2, #9
 	bl	ftl_memcpy
-	b	.L1823
-.L1864:
+	b	.L1829
+.L1870:
 	.align	2
-.L1863:
+.L1869:
 	.word	.LANCHOR184
 	.word	.LANCHOR185
 	.word	-52655045
@@ -14081,21 +14090,21 @@ sftl_write:
 	.word	.LC114
 	.word	.LANCHOR105
 	.word	.LC115
-.L1843:
-	ldr	r1, .L1865
-	ldr	r0, .L1865+4
+.L1849:
+	ldr	r1, .L1871
+	ldr	r0, .L1871+4
 	bl	printf
-	b	.L1842
-.L1844:
-	ldr	r3, .L1865+8
+	b	.L1848
+.L1850:
+	ldr	r3, .L1871+8
 	ldr	r1, [sp, #44]
 	ldr	r2, [sp, #24]
 	add	r3, r3, fp
 	add	r0, r0, r3, lsl #9
-	b	.L1845
-.L1866:
+	b	.L1851
+.L1872:
 	.align	2
-.L1865:
+.L1871:
 	.word	.LANCHOR187
 	.word	.LC116
 	.word	8388544
@@ -14113,61 +14122,61 @@ FtlMakeBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r7, .L1886
+	ldr	r7, .L1892
 	bl	FtlBbtMemInit
 	sub	r8, r7, #18
 	bl	FtlLoadFactoryBbt
-.L1868:
-	ldr	r3, .L1886+4
+.L1874:
+	ldr	r3, .L1892+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1874
-	ldr	r5, .L1886+8
+	bcc	.L1880
+	ldr	r5, .L1892+8
 	movs	r4, #0
-.L1875:
+.L1881:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1876
-	ldr	r4, .L1886+12
+	bhi	.L1882
+	ldr	r4, .L1892+12
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1877:
+.L1883:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1881
+	bgt	.L1887
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1878
+	beq	.L1884
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L1879
+	beq	.L1885
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L1878:
+.L1884:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1877
-.L1874:
-	ldr	r3, .L1886+16
-	ldr	r5, .L1886+20
+	b	.L1883
+.L1880:
+	ldr	r3, .L1892+16
+	ldr	r5, .L1892+20
 	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1886+24
+	ldr	r4, .L1892+24
 	ldr	r0, [r3]
 	movw	r3, #65535
 	ldr	r10, [r5]
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1886+28
+	ldr	r3, .L1892+28
 	str	r0, [r4, #8]
 	str	r10, [r4, #12]
-	beq	.L1869
+	beq	.L1875
 	ldrh	r5, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -14184,13 +14193,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L1870:
+.L1876:
 	uxth	r0, r5
 	adds	r6, r6, #1
 	adds	r7, r7, #4
 	bl	FtlBbmMapBadBlock
-	b	.L1868
-.L1869:
+	b	.L1874
+.L1875:
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -14202,21 +14211,21 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1871:
+.L1877:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1872
+	beq	.L1878
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
 	strh	r4, [r8]	@ movhi
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1886+16
+	ldr	r3, .L1892+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
@@ -14234,42 +14243,42 @@ FtlMakeBbt:
 	mla	r5, r6, r5, r3
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	ldr	r3, .L1886+32
+	ldr	r3, .L1892+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
 	movs	r2, #1
-	ldr	r0, .L1886+24
+	ldr	r0, .L1892+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
 	movs	r3, #1
-	ldr	r0, .L1886+24
+	ldr	r0, .L1892+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1870
+	bne	.L1876
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-	b	.L1871
-.L1872:
+	b	.L1877
+.L1878:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1871
-.L1876:
+	b	.L1877
+.L1882:
 	bl	FtlBbmMapBadBlock
-	b	.L1875
-.L1879:
+	b	.L1881
+.L1885:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1880
+	bne	.L1886
 	strh	r5, [r4]	@ movhi
-	b	.L1878
-.L1880:
+	b	.L1884
+.L1886:
 	strh	r5, [r4, #4]	@ movhi
-.L1881:
-	ldr	r3, .L1886+36
+.L1887:
+	ldr	r3, .L1892+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r1, #1
@@ -14301,9 +14310,9 @@ FtlMakeBbt:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1887:
+.L1893:
 	.align	2
-.L1886:
+.L1892:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -14328,62 +14337,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1912
-	ldr	r2, .L1912+4
-	ldr	r5, .L1912+8
+	ldr	r6, .L1918
+	ldr	r2, .L1918+4
+	ldr	r5, .L1918+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1889
+	cbz	r0, .L1895
 	bl	FtlMakeBbt
-.L1889:
-	ldr	r3, .L1912+12
-	ldr	r2, .L1912+16
-	ldr	ip, .L1912+100
+.L1895:
+	ldr	r3, .L1918+12
+	ldr	r2, .L1918+16
+	ldr	ip, .L1918+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1912+20
+	ldr	r2, .L1918+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1890:
+.L1896:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1891
-	ldr	r3, .L1912+24
+	blt	.L1897
+	ldr	r3, .L1918+24
 	movs	r7, #0
-	ldr	r10, .L1912+104
+	ldr	r10, .L1918+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1892:
+.L1898:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1893
-	ldr	r4, .L1912+28
+	bhi	.L1899
+	ldr	r4, .L1918+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1894
-.L1898:
+	bgt	.L1900
+.L1904:
 	movs	r6, #0
 	mov	r7, r6
-.L1895:
+.L1901:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1899
+	bhi	.L1905
 	ldrh	r2, [fp]
-	ldr	r3, .L1912+32
+	ldr	r3, .L1918+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1912+36
+	ldr	r6, .L1918+36
 	str	r2, [r3]
-	ldr	r3, .L1912+40
+	ldr	r3, .L1918+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -14393,13 +14402,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1912+44
+	ldr	r0, .L1918+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1900
+	ble	.L1906
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -14411,11 +14420,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1900:
-	ldr	r2, .L1912+48
+.L1906:
+	ldr	r2, .L1918+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1902
-	ldr	r1, .L1912+44
+	cbz	r2, .L1908
+	ldr	r1, .L1918+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -14426,24 +14435,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1902:
+.L1908:
 	ldr	r3, [sp]
-	ldr	r7, .L1912+52
-	ldr	r10, .L1912+108
+	ldr	r7, .L1918+52
+	ldr	r10, .L1918+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1912+56
+	ldr	r3, .L1918+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1912+60
+	ldr	r6, .L1918+60
 	muls	r4, r3, r4
-	ldr	r3, .L1912+64
+	ldr	r3, .L1918+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -14452,13 +14461,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1912+68
+	ldr	r2, .L1918+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1912+72
+	ldr	r2, .L1918+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -14469,30 +14478,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1912+76
+	ldr	r3, .L1918+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1904:
+.L1910:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1905
+	bne	.L1911
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1904
-.L1891:
+	b	.L1910
+.L1897:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1890
-.L1893:
+	b	.L1896
+.L1899:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -14500,11 +14509,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1892
-.L1894:
+	b	.L1898
+.L1900:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1912+80
+	ldr	r3, .L1918+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14512,26 +14521,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1896:
+.L1902:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1898
+	bls	.L1904
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1896
-.L1899:
+	b	.L1902
+.L1905:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1895
-.L1905:
+	b	.L1901
+.L1911:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1912+84
+	ldr	r4, .L1918+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14547,19 +14556,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1906:
+.L1912:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1907
+	cbnz	r3, .L1913
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1906
-.L1907:
+	b	.L1912
+.L1913:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14568,10 +14577,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1912+88
+	ldr	r3, .L1918+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1912+92
+	ldr	r3, .L1918+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14584,18 +14593,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1908
-	ldr	r3, .L1912+96
+	cbnz	r0, .L1914
+	ldr	r3, .L1918+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1908:
+.L1914:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1913:
+.L1919:
 	.align	2
-.L1912:
+.L1918:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -16095,17 +16104,17 @@ __func__.10137:
 	.size	__func__.10399, 15
 __func__.10399:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10417,"a",%progbits
+	.section	.rodata.__func__.10418,"a",%progbits
 	.set	.LANCHOR153,. + 0
-	.type	__func__.10417, %object
-	.size	__func__.10417, 15
-__func__.10417:
+	.type	__func__.10418, %object
+	.size	__func__.10418, 15
+__func__.10418:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.10440,"a",%progbits
+	.section	.rodata.__func__.10442,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10440, %object
-	.size	__func__.10440, 17
-__func__.10440:
+	.type	__func__.10442, %object
+	.size	__func__.10442, 17
+__func__.10442:
 	.ascii	"FlashEraseBlocks\000"
 	.section	.rodata.__func__.8806,"a",%progbits
 	.set	.LANCHOR138,. + 0
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 83c74a38c1..b4b319d64e 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-09-30
+ * date: 2018-10-12
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -4211,7 +4211,7 @@ FlashReadPages:
 	add	x25, x25, :lo12:.LC1
 .L538:
 	cmp	x23, x19
-	bne	.L548
+	bne	.L549
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4220,7 +4220,7 @@ FlashReadPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L548:
+.L549:
 	ldr	x0, [x19, 8]
 	cbz	x0, .L539
 	ldr	x0, [x19, 16]
@@ -4234,18 +4234,26 @@ FlashReadPages:
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
-	adrp	x26, .LANCHOR120
 	bl	l2p_addr_tran.isra.0
+	ldr	w0, [x29, 104]
+	cmp	w0, 3
+	bls	.L541
+	mov	w0, -1
+	str	w0, [x19]
+.L542:
+	add	x19, x19, 32
+	b	.L538
+.L541:
 	ldr	x20, [x19, 8]
+	adrp	x26, .LANCHOR120
 	tst	x20, 63
-	beq	.L541
+	beq	.L543
 	ldr	x20, [x26, #:lo12:.LANCHOR120]
-.L541:
+.L543:
 	adrp	x22, .LANCHOR105
 	add	x22, x22, :lo12:.LANCHOR105
-	ldrb	w0, [x29, 104]
-	mov	x2, x20
 	ldr	w1, [x29, 108]
+	mov	x2, x20
 	ldr	x3, [x19, 16]
 	ldr	x4, [x22, 24]
 	blr	x4
@@ -4253,7 +4261,7 @@ FlashReadPages:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L543
+	bne	.L545
 	ldrb	w0, [x29, 104]
 	add	x2, x20, 2048
 	ldr	x4, [x22, 24]
@@ -4263,42 +4271,40 @@ FlashReadPages:
 	add	x3, x3, 8
 	blr	x4
 	cmn	w0, #1
-	beq	.L544
+	beq	.L546
 	ldr	x1, [x19, 16]
 	ldr	w2, [x1, 12]
 	cmn	w2, #1
-	bne	.L545
+	bne	.L547
 	ldr	w2, [x1, 8]
 	cmn	w2, #1
-	bne	.L545
+	bne	.L547
 	ldr	w1, [x1]
 	cmn	w1, #1
-	beq	.L545
-.L544:
+	beq	.L547
+.L546:
 	mov	w1, -1
 	str	w1, [x19]
-.L545:
+.L547:
 	ldr	w1, [x19]
 	cmn	w1, #1
-	beq	.L543
+	beq	.L545
 	cmp	w0, 256
-	bne	.L543
+	bne	.L545
 	str	w0, [x19]
-.L543:
+.L545:
 	ldr	x0, [x26, #:lo12:.LANCHOR120]
 	cmp	x20, x0
-	bne	.L547
+	bne	.L542
 	ldr	x0, [x19, 8]
 	cmp	x20, x0
-	beq	.L547
+	beq	.L542
 	adrp	x1, .LANCHOR12
 	ldrh	w2, [x1, #:lo12:.LANCHOR12]
 	mov	x1, x20
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L547:
-	add	x19, x19, 32
-	b	.L538
+	b	.L542
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -4330,10 +4336,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L566:
+.L567:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L571
+	bcc	.L572
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4342,18 +4348,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L571:
+.L572:
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	add	x24, x22, :lo12:.LANCHOR148
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L567:
+.L568:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L569
+	bgt	.L570
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -4365,19 +4371,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L568
+	beq	.L569
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L568
+	bne	.L569
 	strh	w19, [x20]
-.L569:
+.L570:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L566
-.L568:
+	b	.L567
+.L569:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L567
+	b	.L568
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -4391,10 +4397,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L577
+	bne	.L578
 	adrp	x1, .LANCHOR20
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L578:
+.L579:
 	adrp	x1, .LANCHOR121
 	sub	w19, w19, #1
 	sxth	w19, w19
@@ -4411,24 +4417,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L579
+	bne	.L580
 	mov	w22, 0
 	mov	w24, 2
-.L580:
+.L581:
 	cmp	w22, w19
-	ble	.L583
-.L579:
+	ble	.L584
+.L580:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 160
 	ret
-.L577:
+.L578:
 	adrp	x1, .LANCHOR19
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L578
-.L583:
+	b	.L579
+.L584:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -4440,20 +4446,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L581
+	bne	.L582
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L581
+	bne	.L582
 	ldr	w0, [x29, 64]
 	cmn	w0, #1
-	beq	.L581
+	beq	.L582
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L580
-.L581:
+	b	.L581
+.L582:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L580
+	b	.L581
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
@@ -4513,12 +4519,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR70
 	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
-.L589:
+.L590:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L629
+	bls	.L630
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR112
 	adrp	x6, .LANCHOR13
@@ -4533,14 +4539,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L630
-.L591:
+	b	.L631
+.L592:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L590
+	cbnz	w0, .L591
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -4551,19 +4557,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L590:
+.L591:
 	add	x5, x5, 1
-.L630:
+.L631:
 	cmp	w12, w5, uxth
-	bhi	.L591
-	cbnz	w22, .L592
-.L628:
+	bhi	.L592
+	cbnz	w22, .L593
+.L629:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L589
-.L592:
+	b	.L590
+.L593:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -4574,7 +4580,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	str	x0, [x29, 136]
-.L627:
+.L628:
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -4582,10 +4588,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L595
+	bne	.L596
 	mov	w5, 16
 	mov	w7, 65535
-.L597:
+.L598:
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	add	x6, x25, :lo12:.LANCHOR112
 	mov	w2, 1
@@ -4603,78 +4609,78 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L594
+	bne	.L595
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L595
-.L596:
+	bne	.L596
+.L597:
 	mov	w1, 1
-	b	.L666
-.L594:
+	b	.L667
+.L595:
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L595
+	bne	.L596
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L597
-	b	.L596
-.L595:
+	bne	.L598
+	b	.L597
+.L596:
 	adrp	x0, .LANCHOR70
 	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L598
+	beq	.L599
 	cmp	w1, w0
-	bhi	.L599
-.L598:
+	bhi	.L600
+.L599:
 	cmn	w0, #1
-	beq	.L599
+	beq	.L600
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L599:
+.L600:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L601
-	bhi	.L602
+	beq	.L602
+	bhi	.L603
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L603
-.L600:
+	beq	.L604
+.L601:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L627
-	b	.L628
-.L602:
+	bne	.L628
+	b	.L629
+.L603:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L604
+	beq	.L605
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L600
+	bne	.L601
 	mov	w1, 0
-.L666:
+.L667:
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L600
-.L604:
+	b	.L601
+.L605:
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L606
+	bls	.L607
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1222
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L606:
+.L607:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
@@ -4685,53 +4691,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
 	sxth	w2, w2
-.L607:
+.L608:
 	cmp	w0, w2
-	bgt	.L613
-	tbz	w0, #31, .L647
-	b	.L600
-.L613:
+	bgt	.L614
+	tbz	w0, #31, .L648
+	b	.L601
+.L614:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L608
+	bls	.L609
 	ldr	w2, [x5]
-	cbnz	w2, .L609
+	cbnz	w2, .L610
 	cmp	w6, w1
-	beq	.L609
+	beq	.L610
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR141]
-.L609:
+.L610:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L610:
+.L611:
 	cmp	w1, w0
-	bne	.L611
+	bne	.L612
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L600
+	tbnz	w0, #31, .L601
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L600
-.L647:
+	bgt	.L601
+.L648:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L665:
+.L666:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L600
-.L611:
+	b	.L601
+.L612:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -4743,22 +4749,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L610
-.L608:
+	b	.L611
+.L609:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L607
-.L603:
+	b	.L608
+.L604:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L616
+	bls	.L617
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1263
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L616:
+.L617:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -4766,46 +4772,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L617:
+.L618:
 	cmp	w0, w5
-	ble	.L622
+	ble	.L623
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L618
+	bls	.L619
 	ldr	w5, [x1]
-	cbnz	w5, .L619
+	cbnz	w5, .L620
 	cmp	w6, w2
-	beq	.L619
+	beq	.L620
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L619:
+.L620:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L620:
+.L621:
 	cmp	w2, w0
-	bne	.L621
+	bne	.L622
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L622:
-	tbnz	w0, #31, .L600
+.L623:
+	tbnz	w0, #31, .L601
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L600
+	bgt	.L601
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L665
-.L621:
+	b	.L666
+.L622:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -4817,61 +4823,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L620
-.L618:
+	b	.L621
+.L619:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L617
-.L601:
+	b	.L618
+.L602:
 	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
-	bne	.L624
+	bne	.L625
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w0, [x2, 8]
-	b	.L600
-.L624:
+	b	.L601
+.L625:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L625
+	beq	.L626
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L625:
+.L626:
 	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L626
+	bcs	.L627
 	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w1, [x0, 8]
-	b	.L600
-.L626:
+	b	.L601
+.L627:
 	strh	w26, [x0, 4]
-	b	.L600
-.L629:
+	b	.L601
+.L630:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L631
-.L634:
+	cbz	w0, .L632
+.L635:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L632
-.L633:
+	cbz	w0, .L633
+.L634:
 	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L663
+	bls	.L664
 	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
 	mov	w2, 1388
 	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L663:
+.L664:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4880,24 +4886,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L631:
+.L632:
 	ldrh	w0, [x20, #:lo12:.LANCHOR141]
-	cbz	w0, .L634
+	cbz	w0, .L635
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L635:
+.L636:
 	cmp	w0, w1
-	bcs	.L634
+	bcs	.L635
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L636
+	cbz	w3, .L637
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L637:
+.L638:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L634
+	bcs	.L635
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -4909,29 +4915,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L637
-.L636:
+	b	.L638
+.L637:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L635
-.L632:
+	b	.L636
+.L633:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L633
+	cbz	w0, .L634
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L642:
+.L643:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L633
+	bge	.L634
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L643
+	cbz	w3, .L644
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.L644:
+.L645:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L633
+	bge	.L634
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -4943,11 +4949,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L644
-.L643:
+	b	.L645
+.L644:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L642
+	b	.L643
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -4975,11 +4981,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L668:
+.L669:
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L671
+	bgt	.L672
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -4988,7 +4994,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L669
+	bne	.L670
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -4996,13 +5002,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L669:
+.L670:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L670
+	beq	.L671
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L670
+	bne	.L671
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
@@ -5010,16 +5016,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L671:
+.L672:
 	adrp	x19, .LANCHOR37
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L685
+	beq	.L686
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L675
+	beq	.L676
 	add	x0, x22, :lo12:.LANCHOR148
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -5028,21 +5034,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR148]
 	cmn	w0, #1
-	beq	.L675
+	beq	.L676
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L675
+	bne	.L676
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L675
+	bls	.L676
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	strh	w0, [x20, 4]
-.L675:
+.L676:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
@@ -5052,35 +5058,35 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR148
-.L677:
-	tbz	w20, #31, .L680
+.L678:
+	tbz	w20, #31, .L681
 	adrp	x1, .LANCHOR150
 	adrp	x0, .LC1
 	mov	w2, 253
 	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L679:
+.L680:
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L682
+	beq	.L683
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L682
+	beq	.L683
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L682
+	bcs	.L683
 	cmp	w0, w1
-	bcs	.L682
+	bcs	.L683
 	bl	FtlSysBlkNumInit
-.L682:
+.L683:
 	add	x19, x19, :lo12:.LANCHOR37
 	adrp	x21, .LANCHOR10
 	adrp	x23, .LANCHOR137
@@ -5089,23 +5095,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR137
 	add	x22, x22, :lo12:.LANCHOR148
 	mov	w20, 0
-.L683:
+.L684:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L684
+	bcc	.L685
 	mov	w0, 0
-.L667:
+.L668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L670:
+.L671:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L668
-.L680:
+	b	.L669
+.L681:
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	mov	w2, 1
 	mov	w1, w2
@@ -5117,15 +5123,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L678
+	beq	.L679
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L679
-.L678:
+	beq	.L680
+.L679:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L677
-.L684:
+	b	.L678
+.L685:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -5134,10 +5140,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L683
-.L685:
+	b	.L684
+.L686:
 	mov	w0, -1
-	b	.L667
+	b	.L668
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -5170,10 +5176,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L698
-.L706:
+	bne	.L699
+.L707:
 	mov	w0, -1
-.L697:
+.L698:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -5181,7 +5187,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L698:
+.L699:
 	add	x27, x20, :lo12:.LANCHOR79
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -5191,28 +5197,28 @@ FtlLoadSysInfo:
 	strh	w0, [x27, 2]
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L700:
-	tbz	w22, #31, .L703
+.L701:
+	tbz	w22, #31, .L704
 	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
 	mov	w2, 1448
 	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L702:
+.L703:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L705
+	bcs	.L706
 	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
 	mov	w2, 1450
 	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L705:
+.L706:
 	add	x22, x19, :lo12:.LANCHOR148
 	adrp	x19, .LANCHOR39
 	add	x21, x19, :lo12:.LANCHOR39
@@ -5241,7 +5247,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L706
+	bne	.L707
 	add	x20, x20, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x21, 8]
@@ -5249,7 +5255,7 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L706
+	bne	.L707
 	adrp	x0, .LANCHOR152
 	adrp	x2, .LANCHOR61
 	adrp	x3, .LANCHOR3
@@ -5274,14 +5280,14 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR78
 	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L707
+	bls	.L708
 	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
 	mov	w2, 1472
 	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L707:
+.L708:
 	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
@@ -5346,47 +5352,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR70
 	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L708
+	bls	.L709
 	str	w3, [x1, #:lo12:.LANCHOR70]
-.L708:
+.L709:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR71
 	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L709
+	bls	.L710
 	str	w2, [x1, #:lo12:.LANCHOR71]
-.L709:
+.L710:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L710
+	beq	.L711
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L710:
+.L711:
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L711
+	beq	.L712
 	bl	make_superblock
-.L711:
+.L712:
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L712
+	beq	.L713
 	bl	make_superblock
-.L712:
+.L713:
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L713
+	beq	.L714
 	bl	make_superblock
-.L713:
+.L714:
 	mov	w0, 0
-	b	.L697
-.L703:
+	b	.L698
+.L704:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w2, 1
 	mov	w1, w2
@@ -5398,19 +5404,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L701
+	beq	.L702
 	ldr	x0, [x23, #:lo12:.LANCHOR115]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L701
+	bne	.L702
 	ldr	x0, [x26, #:lo12:.LANCHOR123]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L702
-.L701:
+	beq	.L703
+.L702:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L700
+	b	.L701
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -5437,18 +5443,18 @@ FlashProgPages:
 	mov	x25, x0
 	add	x28, x24, :lo12:.LANCHOR105
 	lsl	w27, w23, 3
-.L720:
+.L721:
 	cmp	x25, x20
-	bne	.L732
+	bne	.L734
 	ldr	w0, [x29, 104]
-	cbz	w0, .L745
+	cbz	w0, .L747
 	adrp	x21, .LANCHOR120
 	adrp	x22, .LANCHOR122
 	mov	x23, x21
 	mov	x24, x22
-.L734:
+.L736:
 	cmp	x19, x20
-	beq	.L745
+	beq	.L747
 	ldr	x1, [x21, #:lo12:.LANCHOR120]
 	ldr	x0, [x22, #:lo12:.LANCHOR122]
 	str	wzr, [x1]
@@ -5462,71 +5468,78 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 128]
 	cmn	w26, #1
-	bne	.L735
+	bne	.L737
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC85
 	add	x0, x0, :lo12:.LC85
 	bl	printf
 	str	w26, [x19]
-.L735:
+.L737:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L736
+	cbz	x0, .L738
 	ldr	w2, [x0]
 	ldr	x0, [x24, #:lo12:.LANCHOR122]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L736
+	beq	.L738
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L736:
+.L738:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L737
+	cbz	x0, .L739
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR120]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L737
+	beq	.L739
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC87
 	add	x0, x0, :lo12:.LC87
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L737:
+.L739:
 	add	x19, x19, 32
-	b	.L734
-.L732:
+	b	.L736
+.L734:
 	ldr	x0, [x25, 8]
-	cbz	x0, .L721
+	cbz	x0, .L722
 	ldr	x0, [x25, 16]
-	cbnz	x0, .L722
-.L721:
+	cbnz	x0, .L723
+.L722:
 	adrp	x0, .LC1
-	mov	w2, 130
+	mov	w2, 134
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L722:
+.L723:
 	ldr	w0, [x25, 4]
 	add	x2, x29, 120
 	add	x1, x29, 124
 	bl	l2p_addr_tran.isra.0
 	ldr	w0, [x29, 120]
-	cbnz	w0, .L723
+	cmp	w0, 3
+	bls	.L724
+.L760:
+	mov	w0, -1
+	str	w0, [x25]
+	b	.L725
+.L724:
+	cbnz	w0, .L726
 	ldr	w0, [x29, 124]
 	cmp	w27, w0
-	bls	.L723
+	bls	.L726
 	adrp	x21, .LANCHOR153
 	adrp	x22, .LC79
 	mov	w23, -1
 	add	x21, x21, :lo12:.LANCHOR153
 	add	x22, x22, :lo12:.LC79
-	b	.L756
-.L725:
+	b	.L758
+.L728:
 	ldr	w2, [x19, 4]
 	mov	x1, x21
 	str	w23, [x19]
@@ -5545,10 +5558,10 @@ FlashProgPages:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC81
 	bl	rknand_print_hex
-.L756:
+.L758:
 	cmp	x19, x20
-	bne	.L725
-.L745:
+	bne	.L728
+.L747:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5557,20 +5570,20 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L723:
+.L726:
 	ldr	x1, [x25, 8]
 	tst	x1, 63
-	beq	.L739
+	beq	.L741
 	adrp	x0, .LANCHOR120
 	ldr	x26, [x0, #:lo12:.LANCHOR120]
 	cmp	x1, x26
-	beq	.L726
+	beq	.L729
 	adrp	x0, .LANCHOR12
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	mov	x0, x26
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-.L726:
+.L729:
 	add	x0, x24, :lo12:.LANCHOR105
 	ldr	w1, [x29, 124]
 	ldr	x3, [x25, 16]
@@ -5578,13 +5591,13 @@ FlashProgPages:
 	ldr	x6, [x0, 16]
 	ldrb	w0, [x29, 120]
 	blr	x6
-	cbnz	w0, .L727
+	cbnz	w0, .L730
 	str	wzr, [x25]
-.L728:
+.L731:
 	add	x0, x21, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L730
+	bne	.L725
 	ldrb	w0, [x29, 120]
 	add	x2, x26, 2048
 	ldr	x6, [x28, 16]
@@ -5593,19 +5606,17 @@ FlashProgPages:
 	add	w1, w23, w1
 	add	x3, x3, 8
 	blr	x6
-	cbz	w0, .L730
-	mov	w0, -1
-	str	w0, [x25]
-.L730:
+	cbnz	w0, .L760
+.L725:
 	add	x25, x25, 32
-	b	.L720
-.L739:
+	b	.L721
+.L741:
 	mov	x26, x1
-	b	.L726
-.L727:
+	b	.L729
+.L730:
 	mov	w0, -1
 	str	w0, [x25]
-	b	.L728
+	b	.L731
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -5639,43 +5650,43 @@ FtlLowFormatEraseBlock:
 	ldrh	w12, [x25, #:lo12:.LANCHOR24]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 112]
-.L759:
+.L762:
 	cmp	w8, w5, uxth
-	bhi	.L763
-	cbz	w24, .L758
+	bhi	.L766
+	cbz	w24, .L761
 	mov	w2, w24
 	ubfiz	x24, x24, 5, 16
 	mov	x26, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.L767:
+.L770:
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	add	x1, x0, x26
 	ldr	w0, [x0, x26]
 	cmn	w0, #1
-	bne	.L766
+	bne	.L769
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L766:
+.L769:
 	add	x26, x26, 32
 	cmp	x26, x24
-	bne	.L767
-	cbz	w22, .L780
+	bne	.L770
+	cbz	w22, .L783
 	adrp	x0, .LANCHOR20
 	mov	w26, 1
 	ldrh	w28, [x0, #:lo12:.LANCHOR20]
-.L768:
+.L771:
 	add	x0, x20, :lo12:.LANCHOR3
 	adrp	x27, .LANCHOR13
 	str	x0, [x29, 120]
 	mov	w24, 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 104]
-.L776:
+.L779:
 	ldr	x0, [x29, 120]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR106]
@@ -5686,10 +5697,10 @@ FtlLowFormatEraseBlock:
 	ldr	x8, [x0, #:lo12:.LANCHOR118]
 	ldr	x0, [x29, 112]
 	ldr	x10, [x0, #:lo12:.LANCHOR119]
-.L769:
+.L772:
 	cmp	w7, w5, uxth
-	bhi	.L772
-	cbz	w20, .L758
+	bhi	.L775
+	cbz	w20, .L761
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w26
@@ -5697,11 +5708,11 @@ FtlLowFormatEraseBlock:
 	bl	FlashProgPages
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.L775:
+.L778:
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L774
+	cbz	w0, .L777
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	str	x1, [x29, 96]
@@ -5709,36 +5720,36 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldr	x1, [x29, 96]
-.L774:
+.L777:
 	add	x27, x27, 32
 	cmp	x1, x27
-	bne	.L775
+	bne	.L778
 	add	w24, w24, 1
 	cmp	w28, w24, uxth
-	bhi	.L776
+	bhi	.L779
 	mov	x24, 0
-.L778:
-	cbz	w22, .L777
+.L781:
+	cbz	w22, .L780
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
-	cbnz	w0, .L777
+	cbnz	w0, .L780
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L777:
+.L780:
 	add	x24, x24, 32
 	cmp	x24, x27
-	bne	.L778
+	bne	.L781
 	cmp	w23, 63
 	ccmp	w22, 0, 0, hi
-	beq	.L758
+	beq	.L761
 	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	mov	w2, w20
 	mov	w1, w26
 	bl	FlashEraseBlocks
-.L758:
+.L761:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5747,7 +5758,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L763:
+.L766:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5755,13 +5766,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w22, .L760
+	cbz	w22, .L763
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L761
-.L760:
+	cbnz	w0, .L764
+.L763:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L762
+	cbnz	w0, .L765
 	ubfiz	x0, x24, 5, 16
 	mul	w1, w24, w12
 	add	x0, x6, x0
@@ -5772,18 +5783,18 @@ FtlLowFormatEraseBlock:
 	add	x1, x11, x1, sxtw 2
 	str	w13, [x0, 4]
 	stp	x10, x1, [x0, 8]
-.L761:
+.L764:
 	add	x5, x5, 1
-	b	.L759
-.L762:
+	b	.L762
+.L765:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L761
-.L780:
+	b	.L764
+.L783:
 	mov	w26, 0
 	mov	w28, 2
-	b	.L768
-.L772:
+	b	.L771
+.L775:
 	lsl	x0, x5, 5
 	mov	w1, w23
 	str	wzr, [x6, x0]
@@ -5792,13 +5803,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w12, w0, 65535
 	mov	w13, w12
-	cbz	w22, .L770
+	cbz	w22, .L773
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L771
-.L770:
+	cbnz	w0, .L774
+.L773:
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L771
+	cbnz	w0, .L774
 	ubfiz	x0, x20, 5, 16
 	mul	w1, w20, w11
 	add	x0, x6, x0
@@ -5809,9 +5820,9 @@ FtlLowFormatEraseBlock:
 	add	x1, x10, x1, sxtw 2
 	str	w12, [x0, 4]
 	stp	x8, x1, [x0, 8]
-.L771:
+.L774:
 	add	x5, x5, 1
-	b	.L769
+	b	.L772
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -5828,16 +5839,16 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w0, [x0]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L802
+	bne	.L805
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L803
+	cbz	w0, .L806
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L803:
+.L806:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -5848,14 +5859,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L804:
+.L807:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L802:
+.L805:
 	ubfiz	x0, x0, 1, 16
 	adrp	x1, .LANCHOR123
 	adrp	x23, .LANCHOR115
@@ -5886,9 +5897,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x1, 0
 	ldr	x3, [x23, #:lo12:.LANCHOR115]
 	mov	w2, 0
-.L805:
+.L808:
 	cmp	w4, w1, uxth
-	bhi	.L807
+	bhi	.L810
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
@@ -5899,11 +5910,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L804
-.L807:
+	b	.L807
+.L810:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L806
+	bne	.L809
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -5911,9 +5922,9 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L806:
+.L809:
 	add	x1, x1, 1
-	b	.L805
+	b	.L808
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
@@ -5937,7 +5948,7 @@ FtlMapWritePage:
 	add	x28, x26, :lo12:.LANCHOR20
 	stp	x21, x22, [sp, 32]
 	mov	w22, 0
-.L813:
+.L816:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -5945,35 +5956,35 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L814
+	bge	.L817
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L815
-.L814:
+	bne	.L818
+.L817:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L815:
+.L818:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L816
+	cbnz	w0, .L819
 	adrp	x0, .LC1
 	mov	w2, 699
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L816:
+.L819:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L817
+	bcc	.L820
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L817:
+.L820:
 	ldrh	w1, [x19]
 	adrp	x21, .LANCHOR148
 	ldr	x0, [x19, 16]
@@ -6009,7 +6020,7 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L818
+	bne	.L821
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC88
 	add	x0, x0, :lo12:.LC88
@@ -6018,37 +6029,37 @@ FtlMapWritePage:
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L819
+	bhi	.L822
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L819:
+.L822:
 	cmp	w22, 3
-	bls	.L820
+	bls	.L823
 	add	x21, x21, :lo12:.LANCHOR148
 	adrp	x0, .LC89
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC89
 	ldr	w1, [x21, 4]
 	bl	printf
-.L821:
-	b	.L821
-.L820:
+.L824:
+	b	.L824
+.L823:
 	ldr	w0, [x19, 52]
-	cbz	w0, .L813
-.L835:
-	b	.L835
-.L818:
+	cbz	w0, .L816
+.L838:
+	b	.L838
+.L821:
 	cmp	w0, 1
-	beq	.L824
+	beq	.L827
 	cmp	w1, 256
-	beq	.L824
+	beq	.L827
 	ldr	w0, [x19, 56]
-	cbz	w0, .L825
-.L824:
+	cbz	w0, .L828
+.L827:
 	str	wzr, [x19, 56]
-	b	.L813
-.L825:
+	b	.L816
+.L828:
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
@@ -6078,20 +6089,20 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bcs	.L838
+	bcs	.L841
 	adrp	x1, .LANCHOR156
 	adrp	x0, .LC1
 	mov	w2, 485
 	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L838:
+.L841:
 	adrp	x27, .LANCHOR134
 	ubfiz	x0, x20, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x27, #:lo12:.LANCHOR134]
 	ldr	w23, [x1, x0]
-	cbnz	w23, .L839
+	cbnz	w23, .L842
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x1, .LANCHOR23
@@ -6104,7 +6115,7 @@ load_l2p_region:
 	add	x1, x0, x19
 	strh	w20, [x0, x19]
 	str	wzr, [x1, 4]
-.L840:
+.L843:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6113,7 +6124,7 @@ load_l2p_region:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L839:
+.L842:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
 	adrp	x26, .LANCHOR148
@@ -6132,7 +6143,7 @@ load_l2p_region:
 	ldr	x25, [x21, 16]
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L841
+	beq	.L844
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC90
@@ -6150,26 +6161,26 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC92
 	bl	rknand_print_hex
-.L842:
+.L845:
 	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	beq	.L843
+	beq	.L846
 	adrp	x1, .LANCHOR156
 	adrp	x0, .LC1
 	mov	w2, 508
 	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L843:
+.L846:
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
 	strh	w20, [x0, x19]
-	b	.L840
-.L841:
+	b	.L843
+.L844:
 	ldr	w0, [x26, #:lo12:.LANCHOR148]
 	cmp	w0, 256
-	bne	.L842
+	bne	.L845
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC93
@@ -6182,7 +6193,7 @@ load_l2p_region:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	bl	FtlMapWritePage
-	b	.L842
+	b	.L845
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -6205,12 +6216,12 @@ ftl_map_blk_gc:
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #5
 	cmp	w2, w1
-	blt	.L846
+	blt	.L849
 	ubfiz	x0, x0, 1, 16
 	ldrh	w22, [x20, x0]
-	cbz	w22, .L846
+	cbz	w22, .L849
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L846
+	cbnz	w1, .L849
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -6220,31 +6231,31 @@ ftl_map_blk_gc:
 	strh	w0, [x19, 8]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L847
+	bcc	.L850
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L847:
+.L850:
 	adrp	x26, .LANCHOR148
 	adrp	x23, .LANCHOR157
 	add	x27, x26, :lo12:.LANCHOR148
 	add	x23, x23, :lo12:.LANCHOR157
 	mov	w20, 0
-.L848:
+.L851:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L855
+	bhi	.L858
 	mov	w1, 1
 	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L846:
+.L849:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x24, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L856
+	bcc	.L859
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L856:
+.L859:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6253,12 +6264,12 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L855:
+.L858:
 	ubfiz	x0, x20, 2, 16
 	add	x28, x25, x0
 	ldr	w1, [x25, x0]
 	cmp	w22, w1, lsr 10
-	bne	.L849
+	bne	.L852
 	adrp	x2, .LANCHOR116
 	add	x0, x26, :lo12:.LANCHOR148
 	ldr	x2, [x2, #:lo12:.LANCHOR116]
@@ -6272,36 +6283,36 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	beq	.L850
+	beq	.L853
 	adrp	x0, .LC1
 	mov	w2, 611
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L850:
+.L853:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L851
-.L853:
+	bne	.L854
+.L856:
 	str	wzr, [x28]
-.L852:
-	b	.L852
-.L851:
+.L855:
+	b	.L855
+.L854:
 	ldrh	w0, [x21, 8]
 	cmp	w0, w20
-	bne	.L853
+	bne	.L856
 	ldrh	w1, [x21]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L853
+	bne	.L856
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L849:
+.L852:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L848
+	b	.L851
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -6351,14 +6362,14 @@ FtlMapTblRecovery:
 	str	w0, [x29, 136]
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L863:
+.L866:
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L880
+	bge	.L883
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L864
+	bne	.L867
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
@@ -6374,20 +6385,20 @@ FtlMapTblRecovery:
 	str	w0, [x19, 48]
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR148
-.L865:
+.L868:
 	cmp	w22, w26
-	ble	.L867
-.L880:
+	ble	.L870
+.L883:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L869
+	bne	.L872
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L869:
+.L872:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -6400,7 +6411,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L867:
+.L870:
 	ldrh	w0, [x24]
 	mov	w2, 1
 	mov	w1, w2
@@ -6410,22 +6421,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L866
+	beq	.L869
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L866
+	bls	.L869
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L866
+	bne	.L869
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L866:
+.L869:
 	add	w22, w22, 1
 	sxth	w22, w22
-	b	.L865
-.L864:
+	b	.L868
+.L867:
 	ldr	x0, [x26, #:lo12:.LANCHOR115]
 	mov	w2, 1
 	str	x0, [x20, 8]
@@ -6441,22 +6452,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L882
+	beq	.L885
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L882
+	bne	.L885
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L871
-.L882:
+	beq	.L874
+.L885:
 	mov	w5, 0
-.L872:
+.L875:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L878
+	bge	.L881
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w5, [x29, 108]
@@ -6468,48 +6479,48 @@ FtlMapTblRecovery:
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L876
+	beq	.L879
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L876
+	bls	.L879
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L876
+	bne	.L879
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L876:
+.L879:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L872
-.L871:
+	b	.L875
+.L874:
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	ldr	x10, [x26, #:lo12:.LANCHOR115]
 	sub	w5, w5, #1
-.L873:
+.L876:
 	cmp	w0, w5
-	blt	.L875
-.L878:
+	blt	.L878
+.L881:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L863
-.L875:
+	b	.L866
+.L878:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L874
+	bls	.L877
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
 	str	w2, [x21, x1]
-.L874:
+.L877:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L873
+	b	.L876
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -6610,17 +6621,17 @@ log2phys:
 	ldr	w1, [x0, #:lo12:.LANCHOR61]
 	mov	w21, w2
 	cmp	w25, w1
-	bcc	.L897
+	bcc	.L900
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	mov	w2, 811
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L897:
+.L900:
 	ldr	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w25, w0
-	bcs	.L898
+	bcs	.L901
 	adrp	x23, .LANCHOR55
 	add	w24, w24, 7
 	adrp	x0, .LANCHOR33
@@ -6629,10 +6640,10 @@ log2phys:
 	and	w22, w22, 65535
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.L899:
+.L902:
 	and	x19, x0, 65535
 	cmp	w19, w1
-	bcc	.L904
+	bcc	.L907
 	bl	select_l2p_ram_region
 	and	x19, x0, 65535
 	ldr	x2, [x23, #:lo12:.LANCHOR55]
@@ -6642,33 +6653,33 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L905
+	beq	.L908
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L905
+	tbz	w1, #31, .L908
 	bl	flush_l2p_region
-.L905:
+.L908:
 	mov	w1, w26
 	mov	w0, w22
 	bl	load_l2p_region
-	b	.L901
-.L898:
+	b	.L904
+.L901:
 	mov	w0, -1
-	cbnz	w21, .L896
+	cbnz	w21, .L899
 	str	w0, [x20]
-.L896:
+.L899:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L904:
+.L907:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L899
-.L901:
+	bne	.L902
+.L904:
 	mov	x0, 1
 	ldr	x1, [x23, #:lo12:.LANCHOR55]
 	lsl	x0, x0, x24
@@ -6676,22 +6687,22 @@ log2phys:
 	and	w0, w0, w25
 	and	x0, x0, 65535
 	add	x1, x1, x19, lsl 4
-	cbnz	w21, .L902
+	cbnz	w21, .L905
 	ldr	x1, [x1, 8]
 	ldr	w0, [x1, x0, lsl 2]
 	str	w0, [x20]
-.L903:
+.L906:
 	ldr	x0, [x23, #:lo12:.LANCHOR55]
 	add	x19, x0, x19, lsl 4
 	ldr	w0, [x19, 4]
 	cmn	w0, #1
-	beq	.L907
+	beq	.L910
 	add	w0, w0, 1
 	str	w0, [x19, 4]
-.L907:
+.L910:
 	mov	w0, 0
-	b	.L896
-.L902:
+	b	.L899
+.L905:
 	ldr	x2, [x1, 8]
 	ldr	w3, [x20]
 	str	w3, [x2, x0, lsl 2]
@@ -6700,7 +6711,7 @@ log2phys:
 	str	w0, [x1, 4]
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L903
+	b	.L906
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -6721,10 +6732,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L911
+	cbnz	w1, .L914
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L912
+	cbz	x19, .L915
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -6737,23 +6748,23 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L913:
+.L916:
 	cmp	w1, w4
-	beq	.L912
+	beq	.L915
 	cmp	w19, w3
-	bne	.L914
+	bne	.L917
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L915
+	cbnz	w0, .L918
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
 	mov	w2, 1699
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L915:
+.L918:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
@@ -6763,7 +6774,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L912:
+.L915:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -6773,18 +6784,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L914:
+.L917:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L912
+	beq	.L915
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L913
-.L911:
+	b	.L916
+.L914:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L912
+	b	.L915
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
@@ -6812,10 +6823,10 @@ ftl_check_vpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.L922:
+.L925:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L924
+	bcc	.L927
 	adrp	x22, .LANCHOR5
 	adrp	x24, .LC95
 	add	x22, x22, :lo12:.LANCHOR5
@@ -6824,13 +6835,13 @@ ftl_check_vpc:
 	mov	w23, 0
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-.L925:
+.L928:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L927
+	bhi	.L930
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L928
+	cbz	x19, .L931
 	adrp	x0, .LANCHOR48
 	adrp	x25, .LC96
 	add	x20, x20, :lo12:check_vpc_table
@@ -6848,17 +6859,17 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L929:
+.L932:
 	cmp	w22, w26
-	bne	.L931
-.L928:
-	cbz	w23, .L921
+	bne	.L934
+.L931:
+	cbz	w23, .L924
 	adrp	x0, .LC1
 	mov	w2, 2343
 	add	x1, x21, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L921:
+.L924:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6866,31 +6877,31 @@ ftl_check_vpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L924:
+.L927:
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L923
+	beq	.L926
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L923:
+.L926:
 	add	w22, w22, 1
-	b	.L922
-.L927:
+	b	.L925
+.L930:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L926
+	beq	.L929
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
@@ -6898,34 +6909,34 @@ ftl_check_vpc:
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L926
+	beq	.L929
 	ldrh	w1, [x26, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.L926:
+.L929:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L925
-.L931:
+	b	.L928
+.L934:
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L930
+	cbz	w2, .L933
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w23, 1
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.L930:
+.L933:
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L928
+	beq	.L931
 	add	w22, w22, 1
 	and	w22, w22, 65535
-	b	.L929
+	b	.L932
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -6947,32 +6958,32 @@ ftl_scan_all_data:
 	add	x21, x21, :lo12:.LANCHOR61
 	str	x23, [sp, 64]
 	bl	printf
-.L947:
+.L950:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L953
+	bcc	.L956
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L953:
+.L956:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L948
+	bne	.L951
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC98
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC98
 	bl	printf
-.L948:
+.L951:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L950
+	beq	.L953
 	add	x0, x20, :lo12:.LANCHOR148
 	str	wzr, [x20, #:lo12:.LANCHOR148]
 	mov	w2, 0
@@ -6989,11 +7000,11 @@ ftl_scan_all_data:
 	ldr	w0, [x20, #:lo12:.LANCHOR148]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L951
+	beq	.L954
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L950
-.L951:
+	beq	.L953
+.L954:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -7005,139 +7016,136 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC99
 	mov	w1, w19
 	bl	printf
-.L950:
+.L953:
 	add	w19, w19, 1
-	b	.L947
+	b	.L950
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcScanTempBlk
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -176]!
+	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR162
-	stp	x27, x28, [sp, 80]
-	mov	w27, w1
+	adrp	x22, .LANCHOR162
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldrh	w28, [x21, #:lo12:.LANCHOR162]
+	stp	x27, x28, [sp, 80]
 	mov	w0, 65535
+	ldrh	w20, [x22, #:lo12:.LANCHOR162]
+	mov	w27, w1
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w28, w0
-	beq	.L978
-	cbnz	w28, .L956
-.L957:
+	cmp	w20, w0
+	beq	.L982
+	cbnz	w20, .L959
+.L960:
 	bl	FtlGcPageVarInit
-	b	.L958
-.L978:
-	mov	w28, 0
-.L956:
+	b	.L961
+.L982:
+	mov	w20, 0
+.L959:
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w27
-	beq	.L957
-.L958:
-	mov	w24, 0
-.L959:
+	beq	.L960
+.L961:
+	adrp	x26, .LANCHOR61
+	add	x26, x26, :lo12:.LANCHOR61
+	mov	w25, 0
+.L962:
 	ldrh	w0, [x19]
-	mov	w22, 65535
+	mov	w23, 65535
 	strb	wzr, [x19, 8]
-	cmp	w0, w22
-	beq	.L960
-	adrp	x25, .LANCHOR23
-	add	x0, x25, :lo12:.LANCHOR23
-	str	x0, [x29, 104]
-.L975:
+	cmp	w0, w23
+	beq	.L963
+.L979:
 	adrp	x1, .LANCHOR91
-	adrp	x23, .LANCHOR112
-	add	x5, x19, 16
-	mov	w20, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR91]
-	ldr	x1, [x29, 104]
-	ldr	x0, [x23, #:lo12:.LANCHOR112]
-	ldrh	w7, [x1]
+	adrp	x24, .LANCHOR112
+	add	x4, x19, 16
+	mov	w21, 0
+	ldr	x5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x24, #:lo12:.LANCHOR112]
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
 	adrp	x1, .LANCHOR92
-	ldr	x8, [x1, #:lo12:.LANCHOR92]
+	ldr	x7, [x1, #:lo12:.LANCHOR92]
 	adrp	x1, .LANCHOR24
-	ldrh	w10, [x1, #:lo12:.LANCHOR24]
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
 	adrp	x1, .LANCHOR3
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L961:
-	cmp	x1, x5
-	bne	.L963
-	mov	w1, w20
+.L964:
+	cmp	x1, x4
+	bne	.L966
 	mov	w2, 0
-	adrp	x26, .LANCHOR12
+	mov	w1, w21
 	bl	FlashReadPages
-	add	x26, x26, :lo12:.LANCHOR12
-	ubfiz	x0, x20, 5, 16
-	mov	x20, 0
-	str	x0, [x29, 112]
-.L964:
-	ldr	x0, [x29, 112]
-	cmp	x20, x0
-	bne	.L973
-	add	w3, w28, 1
-	add	w24, w24, 1
-	and	w28, w3, 65535
-	cmp	w27, w24
+	mov	x28, 0
+	ubfiz	x0, x21, 5, 16
+	str	x0, [x29, 96]
+.L967:
+	ldr	x0, [x29, 96]
+	cmp	x0, x28
+	bne	.L977
+	add	w20, w20, 1
+	add	w25, w25, 1
+	and	w20, w20, 65535
+	cmp	w27, w25
 	adrp	x1, .LANCHOR19
-	bls	.L974
-.L976:
+	bls	.L978
+.L980:
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w28
-	bhi	.L975
-.L960:
-	strh	w28, [x19, 2]
+	cmp	w0, w20
+	bhi	.L979
+.L963:
+	strh	w20, [x19, 2]
 	mov	w0, -1
 	strb	wzr, [x19, 6]
 	mov	w2, 0
-	strh	w0, [x21, #:lo12:.LANCHOR162]
-	mov	w1, w28
+	strh	w0, [x22, #:lo12:.LANCHOR162]
+	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L977
-.L963:
-	ldrh	w4, [x5]
-	cmp	w4, w22
-	beq	.L962
-	ubfiz	x2, x20, 5, 16
-	orr	w4, w28, w4, lsl 10
+	b	.L981
+.L966:
+	ldrh	w3, [x4]
+	cmp	w3, w23
+	beq	.L965
+	ubfiz	x2, x21, 5, 16
+	orr	w3, w20, w3, lsl 10
 	add	x2, x0, x2
-	str	w4, [x2, 4]
-	mul	w4, w20, w7
-	asr	w4, w4, 2
-	add	x4, x6, x4, sxtw 2
-	str	x4, [x2, 8]
-	mul	w4, w20, w10
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	asr	w4, w4, 2
-	add	x4, x8, x4, sxtw 2
-	str	x4, [x2, 16]
-.L962:
-	add	x5, x5, 2
-	b	.L961
-.L973:
-	ldr	x1, [x23, #:lo12:.LANCHOR112]
-	add	x0, x1, x20
-	ldr	w1, [x1, x20]
-	ldr	w2, [x0, 4]
-	str	w2, [x29, 124]
-	cbnz	w1, .L965
-	ldr	x25, [x0, 16]
-	ldrh	w0, [x25]
-	cmp	w0, w22
-	bne	.L966
+	str	w3, [x2, 4]
+	mul	w3, w21, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	mul	w3, w21, w8
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
 .L965:
+	add	x4, x4, 2
+	b	.L964
+.L977:
+	ldr	x1, [x24, #:lo12:.LANCHOR112]
+	add	x0, x1, x28
+	ldr	w1, [x1, x28]
+	ldr	w2, [x0, 4]
+	str	w2, [x29, 108]
+	cbnz	w1, .L968
+	ldr	x21, [x0, 16]
+	ldrh	w0, [x21]
+	cmp	w0, w23
+	bne	.L969
+.L968:
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x19]
-	mov	w28, 0
+	mov	w20, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x19]
@@ -7145,73 +7153,79 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x19]
 	bl	FtlGcPageVarInit
-	b	.L959
-.L966:
-	ldr	w0, [x25, 8]
-	add	x1, x29, 140
+	b	.L962
+.L969:
+	ldr	w0, [x21, 8]
+	ldr	w1, [x26]
+	cmp	w0, w1
+	bhi	.L968
+	add	x1, x29, 124
 	mov	w2, 0
 	bl	log2phys
-	ldr	w0, [x25, 12]
-	ldr	w1, [x29, 140]
-	cmp	w0, w1
-	beq	.L968
-.L971:
-	ldp	w2, w0, [x25, 8]
-	add	x20, x20, 32
+	ldr	w0, [x21, 12]
 	ldr	w1, [x29, 124]
+	cmp	w0, w1
+	beq	.L972
+.L973:
+	ldp	w2, w0, [x21, 8]
+	add	x28, x28, 32
+	ldr	w1, [x29, 108]
 	bl	FtlGcUpdatePage
-	b	.L964
-.L968:
-	str	w0, [x29, 148]
+	b	.L967
+.L972:
+	cmn	w0, #1
+	beq	.L973
+	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR119
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR119]
-	str	x0, [x29, 152]
+	str	x0, [x29, 136]
 	adrp	x0, .LANCHOR124
 	ldr	x0, [x0, #:lo12:.LANCHOR124]
-	str	x0, [x29, 160]
-	add	x0, x29, 144
+	str	x0, [x29, 144]
+	add	x0, x29, 128
 	bl	FlashReadPages
-	ldrh	w1, [x26]
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x24, #:lo12:.LANCHOR112]
+	ldr	x5, [x29, 136]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+	add	x2, x2, x28
 	mov	x0, 0
-	ldr	x2, [x23, #:lo12:.LANCHOR112]
-	ldr	x6, [x29, 152]
-	add	x2, x2, x20
 	ubfiz	x1, x1, 9, 16
-.L969:
+.L974:
 	cmp	x0, x1
-	beq	.L971
-	ldr	x7, [x2, 8]
-	ldr	w8, [x7, x0]
+	beq	.L973
+	ldr	x6, [x2, 8]
+	ldr	w7, [x6, x0]
 	add	x0, x0, 4
-	add	x7, x6, x0
-	ldr	w7, [x7, -4]
-	cmp	w8, w7
-	beq	.L969
+	add	x6, x5, x0
+	ldr	w6, [x6, -4]
+	cmp	w7, w6
+	beq	.L974
 	ldrh	w1, [x19]
 	adrp	x0, .LC100
-	ldr	w2, [x29, 148]
+	ldr	w2, [x29, 132]
 	add	x0, x0, :lo12:.LC100
 	bl	printf
-	b	.L965
-.L974:
-	ldrh	w0, [x21, #:lo12:.LANCHOR162]
-	cmp	w0, w22
-	beq	.L976
-	add	w0, w0, w24
-	strh	w0, [x21, #:lo12:.LANCHOR162]
+	b	.L968
+.L978:
+	ldrh	w0, [x22, #:lo12:.LANCHOR162]
+	cmp	w0, w23
+	beq	.L980
+	add	w0, w0, w25
+	strh	w0, [x22, #:lo12:.LANCHOR162]
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w28
-	bls	.L976
-.L977:
+	cmp	w0, w20
+	bls	.L980
+.L981:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
+	ldp	x29, x30, [sp], 160
 	ret
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlReadRefresh,"ax",@progbits
@@ -7222,12 +7236,12 @@ FtlReadRefresh:
 	adrp	x1, .LANCHOR81
 	add	x0, x1, :lo12:.LANCHOR81
 	ldr	w2, [x0, 80]
-	cbz	w2, .L986
+	cbz	w2, .L993
 	adrp	x1, .LANCHOR61
 	ldr	w3, [x0, 84]
 	ldr	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w3, w2
-	bcs	.L987
+	bcs	.L994
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -7235,11 +7249,11 @@ FtlReadRefresh:
 	add	x20, x1, :lo12:.LANCHOR61
 	str	x21, [sp, 32]
 	mov	w21, 2048
-.L992:
+.L999:
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
-	bcs	.L989
+	bcs	.L996
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
@@ -7248,7 +7262,7 @@ FtlReadRefresh:
 	add	w0, w0, 1
 	str	w0, [x19, 84]
 	cmn	w1, #1
-	beq	.L990
+	beq	.L997
 	str	w0, [x29, 88]
 	adrp	x0, .LANCHOR121
 	str	w1, [x29, 68]
@@ -7263,36 +7277,36 @@ FtlReadRefresh:
 	bl	FlashReadPages
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L989
+	bne	.L996
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-.L989:
+.L996:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, -1
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	ret
-.L990:
+.L997:
 	subs	w21, w21, #1
-	bne	.L992
-	b	.L989
-.L987:
+	bne	.L999
+	b	.L996
+.L994:
 	adrp	x1, .LANCHOR62
 	str	wzr, [x0, 84]
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	stp	w1, wzr, [x0, 76]
-.L996:
+.L1003:
 	mov	w0, 0
 	ret
-.L986:
+.L993:
 	ldr	w4, [x0, 76]
 	adrp	x0, .LANCHOR62
 	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	add	w0, w2, 1048576
 	cmp	w4, w0
-	bhi	.L995
+	bhi	.L1002
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	lsr	w3, w0, 10
@@ -7300,16 +7314,16 @@ FtlReadRefresh:
 	asr	w0, w0, w3
 	add	w0, w0, w4
 	cmp	w2, w0
-	bhi	.L995
+	bhi	.L1002
 	adrp	x0, .LANCHOR39+28
 	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
-	cbnz	w0, .L996
-.L995:
+	cbnz	w0, .L1003
+.L1002:
 	add	x0, x1, :lo12:.LANCHOR81
 	mov	w1, 1
 	str	wzr, [x0, 84]
 	stp	w2, w1, [x0, 76]
-	b	.L996
+	b	.L1003
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
 	.align	2
@@ -7317,7 +7331,7 @@ FtlReadRefresh:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1002
+	cbz	w1, .L1009
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR148
 	adrp	x2, .LANCHOR123
@@ -7339,11 +7353,11 @@ FtlMapBlkWriteDump_data:
 	mov	x21, x1
 	ldr	w2, [x4, x2]
 	str	w2, [x0, 4]
-	cbz	w2, .L1004
+	cbz	w2, .L1011
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1005:
+.L1012:
 	add	x1, x21, :lo12:.LANCHOR148
 	mov	x0, x19
 	ldr	x21, [sp, 32]
@@ -7352,14 +7366,14 @@ FtlMapBlkWriteDump_data:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	FtlMapWritePage
-.L1004:
+.L1011:
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
 	mov	x0, x3
 	bl	ftl_memset
-	b	.L1005
-.L1002:
+	b	.L1012
+.L1009:
 	ret
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FlashTestBlk,"ax",@progbits
@@ -7372,7 +7386,7 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
 	cmp	w19, 11
-	bls	.L1011
+	bls	.L1018
 	adrp	x20, .LANCHOR121
 	mov	w2, 32
 	mov	w1, 165
@@ -7403,14 +7417,14 @@ FlashTestBlk:
 	add	x0, x29, 32
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1009:
+.L1016:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1011:
+.L1018:
 	mov	w19, 0
-	b	.L1009
+	b	.L1016
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -7443,10 +7457,10 @@ FtlBbmTblFlush:
 	add	x27, x27, :lo12:.LANCHOR137
 	mov	w1, 0
 	bl	ftl_memset
-.L1014:
+.L1021:
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L1015
+	blt	.L1022
 	add	x20, x20, :lo12:.LANCHOR148
 	add	x19, x21, :lo12:.LANCHOR37
 	mov	w2, 16
@@ -7473,7 +7487,7 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.L1016:
+.L1023:
 	ldrh	w1, [x19]
 	ldrh	w4, [x27, 10]
 	ldrh	w2, [x19, 2]
@@ -7491,7 +7505,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1017
+	blt	.L1024
 	ldr	w0, [x19, 8]
 	mov	w2, 1
 	ldrh	w1, [x19, 4]
@@ -7510,7 +7524,7 @@ FtlBbmTblFlush:
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.L1017:
+.L1024:
 	mov	w3, 1
 	mov	x0, x20
 	mov	w2, w3
@@ -7521,7 +7535,7 @@ FtlBbmTblFlush:
 	strh	w0, [x19, 2]
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1018
+	bne	.L1025
 	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC102
@@ -7529,15 +7543,15 @@ FtlBbmTblFlush:
 	add	x0, x0, :lo12:.LC102
 	bl	printf
 	cmp	w21, 3
-	bls	.L1016
+	bls	.L1023
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC103
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC103
 	bl	printf
-.L1020:
-	b	.L1020
-.L1015:
+.L1027:
+	b	.L1027
+.L1022:
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x19, 8]
@@ -7546,12 +7560,12 @@ FtlBbmTblFlush:
 	add	w24, w24, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1014
-.L1021:
+	b	.L1021
+.L1028:
 	mov	w25, 1
-	b	.L1016
-.L1018:
-	cbz	w25, .L1021
+	b	.L1023
+.L1025:
+	cbz	w25, .L1028
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7579,7 +7593,7 @@ allocate_data_superblock:
 	add	x0, x27, :lo12:.LANCHOR45
 	stp	x25, x26, [sp, 64]
 	str	x0, [x29, 104]
-.L1024:
+.L1031:
 	ldr	x1, [x29, 104]
 	adrp	x23, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -7587,18 +7601,18 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1025
+	ble	.L1032
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2615
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1025:
+.L1032:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L1051
+	bne	.L1058
 	adrp	x1, .LANCHOR87
 	ldrh	w0, [x24]
 	ldr	w1, [x1, #:lo12:.LANCHOR87]
@@ -7607,39 +7621,39 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
 	ands	w1, w1, 65535
-	beq	.L1026
+	beq	.L1033
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1026:
+.L1033:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
 	and	w22, w0, 65535
 	ldrh	w0, [x24]
-	cbnz	w0, .L1027
+	cbnz	w0, .L1034
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2624
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1027:
+.L1034:
 	ldrh	w0, [x24]
 	sub	w0, w0, #1
 	strh	w0, [x24]
 	ldrh	w0, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w22
-	bls	.L1024
+	bls	.L1031
 	adrp	x25, .LANCHOR42
 	ubfiz	x20, x22, 1, 16
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w21, [x0, x20]
-	cbnz	w21, .L1024
+	cbnz	w21, .L1031
 	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1029
+	cbnz	w0, .L1036
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x20]
@@ -7650,31 +7664,31 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1024
+	ble	.L1031
 	mov	w2, 2638
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1024
-.L1051:
+	b	.L1031
+.L1058:
 	mov	w1, 0
-	b	.L1026
-.L1029:
+	b	.L1033
+.L1036:
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x24]
 	add	w0, w0, w1
 	ldrh	w1, [x23, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1031
+	ble	.L1038
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2641
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1031:
+.L1038:
 	adrp	x0, .LANCHOR3
 	adrp	x25, .LANCHOR106
 	add	x26, x19, 16
@@ -7686,40 +7700,40 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L1032:
+.L1039:
 	cmp	x0, x1
-	bne	.L1034
-	cbnz	w21, .L1035
+	bne	.L1041
+	cbnz	w21, .L1042
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2652
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1035:
+.L1042:
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w22
-	bne	.L1036
+	bne	.L1043
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2654
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1036:
+.L1043:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR43
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR72
 	adrp	x4, .LANCHOR73
 	ldr	x1, [x6, #:lo12:.LANCHOR43]
-	cbnz	w0, .L1037
+	cbnz	w0, .L1044
 	ldrh	w0, [x1, x20]
-	cbz	w0, .L1038
+	cbz	w0, .L1045
 	ldrh	w2, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w2
-.L1062:
+.L1069:
 	strh	w0, [x1, x20]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR72]
@@ -7727,15 +7741,15 @@ allocate_data_superblock:
 	str	w0, [x5, #:lo12:.LANCHOR72]
 	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1040:
+.L1047:
 	ldr	x0, [x6, #:lo12:.LANCHOR43]
 	ldrh	w1, [x0, x20]
 	adrp	x0, .LANCHOR76
 	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	cmp	w1, w2
-	bls	.L1041
+	bls	.L1048
 	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1041:
+.L1048:
 	ldr	w2, [x5, #:lo12:.LANCHOR72]
 	ldr	w1, [x4, #:lo12:.LANCHOR73]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
@@ -7754,48 +7768,48 @@ allocate_data_superblock:
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1042:
+.L1049:
 	cmp	x1, x2
-	bne	.L1043
+	bne	.L1050
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
 	mov	x23, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
-.L1044:
+.L1051:
 	cmp	w21, w23, uxth
-	bhi	.L1046
-	cbz	w1, .L1047
+	bhi	.L1053
+	cbz	w1, .L1054
 	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1047:
+.L1054:
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1048
+	cbnz	w0, .L1055
 	adrp	x0, .LANCHOR42
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x20]
-	b	.L1024
-.L1034:
+	b	.L1031
+.L1041:
 	ldrh	w2, [x4]
 	stp	xzr, xzr, [x1]
 	cmp	w2, w6
-	beq	.L1033
+	beq	.L1040
 	ubfiz	x5, x21, 5, 16
 	add	w21, w21, 1
 	add	x5, x3, x5
 	and	w21, w21, 65535
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L1033:
+.L1040:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L1032
-.L1038:
+	b	.L1039
+.L1045:
 	mov	w0, 2
-	b	.L1062
-.L1037:
+	b	.L1069
+.L1044:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
@@ -7804,19 +7818,19 @@ allocate_data_superblock:
 	str	w0, [x4, #:lo12:.LANCHOR73]
 	mov	w0, w22
 	bl	ftl_set_blk_mode.part.6
-	b	.L1040
-.L1043:
+	b	.L1047
+.L1050:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L1042
-.L1046:
+	b	.L1049
+.L1053:
 	ldr	x2, [x25, #:lo12:.LANCHOR106]
 	lsl	x0, x23, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1045
+	bne	.L1052
 	add	w1, w1, 1
 	ldr	w0, [x3, 4]
 	stp	w2, w1, [x29, 96]
@@ -7827,11 +7841,11 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1045:
+.L1052:
 	add	x23, x23, 1
 	add	x26, x26, 2
-	b	.L1044
-.L1048:
+	b	.L1051
+.L1055:
 	adrp	x1, .LANCHOR19
 	adrp	x2, .LANCHOR70
 	strh	wzr, [x19, 2]
@@ -7849,17 +7863,17 @@ allocate_data_superblock:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w0, [x1, x20]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1049
+	cbz	w0, .L1056
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1050
-.L1049:
+	cbnz	w0, .L1057
+.L1056:
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
 	mov	w2, 2707
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1050:
+.L1057:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7884,17 +7898,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1064
+	cbz	w0, .L1071
 	adrp	x23, .LANCHOR102
 	add	x24, x23, :lo12:.LANCHOR102
 	mov	w19, 0
-.L1065:
+.L1072:
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L1071
+	bhi	.L1078
 	bl	FtlGcReFreshBadBlk
-.L1064:
+.L1071:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7903,7 +7917,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1071:
+.L1078:
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
@@ -7912,19 +7926,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1066:
+.L1073:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1070
+	bhi	.L1077
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1065
-.L1070:
+	b	.L1072
+.L1077:
 	add	x0, x23, :lo12:.LANCHOR102
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1067
+	bne	.L1074
 	mov	w1, w26
 	adrp	x0, .LC104
 	add	x0, x0, :lo12:.LC104
@@ -7936,22 +7950,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1068:
+.L1075:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1069
+	bhi	.L1076
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1067:
+.L1074:
 	and	w20, w27, 65535
-	b	.L1066
-.L1069:
+	b	.L1073
+.L1076:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1068
+	b	.L1075
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -7966,28 +7980,28 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1077
+	cbnz	w0, .L1084
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w19
-	bne	.L1078
+	bne	.L1085
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR80]
-.L1079:
+.L1086:
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L1081
+	cbnz	w0, .L1088
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 2777
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1081:
+.L1088:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
@@ -8002,39 +8016,39 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L1085
+	ble	.L1092
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 2780
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1085:
+.L1092:
 	mov	w0, 1
-	b	.L1076
-.L1078:
+	b	.L1083
+.L1085:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1084
+	beq	.L1091
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1084
+	beq	.L1091
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L1079
-.L1084:
+	bne	.L1086
+.L1091:
 	mov	w0, 0
-.L1076:
+.L1083:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1077:
+.L1084:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1084
+	b	.L1091
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -8048,12 +8062,12 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1088
+	beq	.L1095
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1089
+	cbnz	w0, .L1096
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC105
@@ -8061,37 +8075,37 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L1090
-.L1095:
+	cbz	w0, .L1097
+.L1102:
 	mov	w20, 0
-.L1087:
+.L1094:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1090:
+.L1097:
 	mov	w2, 2795
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1095
-.L1089:
+	b	.L1102
+.L1096:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L1088:
+.L1095:
 	adrp	x21, .LANCHOR142
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR142]
 	cmp	w0, w1
-	bne	.L1092
+	bne	.L1099
 	strh	w19, [x21, #:lo12:.LANCHOR142]
-	b	.L1095
-.L1092:
+	b	.L1102
+.L1099:
 	cmp	w19, w0
-	beq	.L1095
+	beq	.L1102
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR40
@@ -8109,16 +8123,16 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1087
+	cbnz	w1, .L1094
 	cmp	w19, w0, uxth
-	beq	.L1087
+	beq	.L1094
 	mov	w2, 2811
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1087
+	b	.L1094
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -8136,7 +8150,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1219
+	beq	.L1226
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
@@ -8144,11 +8158,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1099
+	bne	.L1106
 	strh	wzr, [x19, 4]
-.L1225:
+.L1232:
 	strb	wzr, [x19, 6]
-.L1219:
+.L1226:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8157,17 +8171,17 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1099:
+.L1106:
 	ldrh	w0, [x19, 16]
 	mov	w20, 0
-.L1100:
+.L1107:
 	cmp	w0, w1
-	beq	.L1101
+	beq	.L1108
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
 	mov	w23, w0
 	cmn	w0, #1
-	beq	.L1102
+	beq	.L1109
 	adrp	x1, .LANCHOR91
 	adrp	x2, .LANCHOR3
 	adrp	x20, .LANCHOR112
@@ -8188,9 +8202,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1103:
+.L1110:
 	cmp	x4, x1
-	bne	.L1107
+	bne	.L1114
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
@@ -8204,69 +8218,69 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	sub	w21, w21, #1
 	str	x0, [x29, 144]
-.L1108:
+.L1115:
 	cmp	w22, w3
-	bne	.L1113
+	bne	.L1120
 	add	w22, w23, 1
 	ldr	w0, [x4, 4]
 	and	w22, w22, 65535
-.L1221:
+.L1228:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	and	w27, w0, 65535
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1115
+	bne	.L1122
 	strh	w22, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L1115:
+.L1122:
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1116
-.L1226:
+	beq	.L1123
+.L1233:
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L1219
-.L1101:
+	b	.L1226
+.L1108:
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	add	x0, x19, x20, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L1100
-.L1102:
-	cbz	w26, .L1104
+	b	.L1107
+.L1109:
+	cbz	w26, .L1111
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
 	mov	w2, 1766
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1104:
+.L1111:
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1105
+	beq	.L1112
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
 	mov	w2, 1767
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1105:
+.L1112:
 	strh	wzr, [x19, 2]
-	b	.L1225
-.L1107:
+	b	.L1232
+.L1114:
 	ldrh	w3, [x4]
 	cmp	w3, w10
-	beq	.L1106
+	beq	.L1113
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
 	add	x2, x0, x2
@@ -8281,90 +8295,90 @@ FtlRecoverySuperblock:
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1106:
-	add	x4, x4, 2
-	b	.L1103
 .L1113:
+	add	x4, x4, 2
+	b	.L1110
+.L1120:
 	ldr	w0, [x11]
-	cbnz	w0, .L1109
+	cbnz	w0, .L1116
 	ldr	x8, [x11, 16]
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1110
+	beq	.L1117
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1110
+	cbz	w0, .L1117
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1110:
+.L1117:
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1112
+	bne	.L1119
 	ubfiz	x3, x3, 5, 16
 	and	w22, w23, 65535
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1221
-.L1109:
+	b	.L1228
+.L1116:
 	mov	w6, w10
-.L1112:
+.L1119:
 	add	w3, w3, 1
 	add	x11, x11, 32
 	and	w3, w3, 65535
-	b	.L1108
-.L1116:
+	b	.L1115
+.L1123:
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1117
+	bne	.L1124
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1118
-.L1117:
+	cbnz	w0, .L1125
+.L1124:
 	adrp	x25, .LANCHOR145
 	and	w28, w23, 65535
 	ldr	w0, [x25, #:lo12:.LANCHOR145]
 	cmn	w0, #1
-	bne	.L1119
+	bne	.L1126
 	str	w21, [x25, #:lo12:.LANCHOR145]
-.L1119:
+.L1126:
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1168
+	bge	.L1175
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.L1120:
+.L1127:
 	ldr	x0, [x29, 152]
 	mov	w3, 65535
 	mov	w5, 1
 	add	x4, x0, :lo12:.LANCHOR3
-.L1121:
+.L1128:
 	cmp	w24, w28
-	bhi	.L1131
+	bhi	.L1138
 	ldrh	w1, [x4]
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1132
-.L1168:
+	b	.L1139
+.L1175:
 	mov	w24, w26
-	b	.L1120
-.L1123:
+	b	.L1127
+.L1130:
 	ldrh	w6, [x2]
 	cmp	w6, w3
-	beq	.L1122
+	beq	.L1129
 	ubfiz	x7, x23, 5, 16
 	add	w23, w23, 1
 	add	x7, x0, x7
 	and	w23, w23, 65535
 	orr	w6, w24, w6, lsl 10
 	str	w6, [x7, 4]
-.L1122:
+.L1129:
 	add	x2, x2, 2
-.L1132:
+.L1139:
 	cmp	x2, x1
-	bne	.L1123
+	bne	.L1130
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
@@ -8381,21 +8395,21 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.L1124:
+.L1131:
 	cmp	x23, x0
-	bne	.L1129
-	cbz	w2, .L1130
+	bne	.L1136
+	cbz	w2, .L1137
 	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1130:
+.L1137:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1121
-.L1129:
+	b	.L1128
+.L1136:
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1125
-	cbz	w2, .L1118
+	cbz	w6, .L1132
+	cbz	w2, .L1125
 	str	w1, [x25, #:lo12:.LANCHOR145]
-.L1118:
+.L1125:
 	adrp	x0, .LANCHOR167
 	mov	w23, w26
 	mov	w1, 1
@@ -8403,7 +8417,7 @@ FtlRecoverySuperblock:
 	strh	w1, [x0, #:lo12:.LANCHOR167]
 	add	x0, x28, :lo12:.LANCHOR145
 	str	x0, [x29, 104]
-.L1133:
+.L1140:
 	ldr	x1, [x29, 152]
 	mov	w24, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
@@ -8412,9 +8426,9 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1134:
+.L1141:
 	cmp	x1, x2
-	bne	.L1136
+	bne	.L1143
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
@@ -8424,62 +8438,62 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR168
 	add	x0, x0, :lo12:.LANCHOR168
 	str	x0, [x29, 120]
-.L1137:
+.L1144:
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L1162
+	bne	.L1169
 	ldr	x0, [x29, 128]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L1133
+	bne	.L1140
 	ldr	x0, [x29, 152]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L1163:
+.L1170:
 	cmp	w0, w1
-	beq	.L1219
+	beq	.L1226
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
 	cmp	w3, w2
-	beq	.L1164
+	beq	.L1171
 	strb	w0, [x19, 6]
-	b	.L1219
-.L1125:
+	b	.L1226
+.L1132:
 	ldr	x6, [x0]
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1128
+	beq	.L1135
 	ldr	w6, [x6, 4]
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1128:
+.L1135:
 	add	x0, x0, 32
-	b	.L1124
-.L1131:
+	b	.L1131
+.L1138:
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR145]
-	b	.L1118
-.L1136:
+	b	.L1125
+.L1143:
 	ldrh	w3, [x2]
 	cmp	w3, w5
-	beq	.L1135
+	beq	.L1142
 	ubfiz	x4, x24, 5, 16
 	add	w24, w24, 1
 	add	x4, x0, x4
 	and	w24, w24, 65535
 	orr	w3, w23, w3, lsl 10
 	str	w3, [x4, 4]
-.L1135:
+.L1142:
 	add	x2, x2, 2
-	b	.L1134
-.L1162:
+	b	.L1141
+.L1169:
 	ldr	x4, [x20, #:lo12:.LANCHOR112]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -8488,38 +8502,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L1138
+	bcc	.L1145
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1138
+	bhi	.L1145
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1139
+	beq	.L1146
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1140
+	beq	.L1147
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1141
+	beq	.L1148
 	ldrh	w0, [x19]
-.L1223:
+.L1230:
 	bl	decrement_vpc_count
-	b	.L1138
-.L1141:
+	b	.L1145
+.L1148:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L1142
+	beq	.L1149
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1142
+	cbz	w0, .L1149
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR71]
-.L1142:
+.L1149:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 184
 	str	w0, [x29, 180]
@@ -8528,13 +8542,13 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR145]
 	cmn	w1, #1
-	beq	.L1143
+	beq	.L1150
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1143
+	cbz	w0, .L1150
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
-	beq	.L1144
+	beq	.L1151
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	mov	w2, 0
 	add	x0, x0, x25
@@ -8548,15 +8562,15 @@ FtlRecoverySuperblock:
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1145
-.L1146:
+	bne	.L1152
+.L1153:
 	mov	w0, -1
 	str	w0, [x29, 180]
-.L1153:
+.L1160:
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1138
-.L1167:
+	beq	.L1145
+.L1174:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -8564,7 +8578,7 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L1158
+	bhi	.L1165
 	mov	w2, 2019
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
@@ -8573,50 +8587,50 @@ FtlRecoverySuperblock:
 	str	w24, [x29, 136]
 	bl	printf
 	ldr	w3, [x29, 136]
-.L1158:
+.L1165:
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1159
+	cbz	w0, .L1166
 	mov	w0, w3
-	b	.L1223
-.L1144:
+	b	.L1230
+.L1151:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1138
+	bne	.L1145
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.L1138:
-	add	x25, x25, 32
-	b	.L1137
 .L1145:
+	add	x25, x25, 32
+	b	.L1144
+.L1152:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L1146
+	bne	.L1153
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
 	str	x3, [x29, 96]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR145]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1146
+	cbz	w0, .L1153
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
 	cmp	w0, w1
 	ldr	w1, [x29, 180]
-	bne	.L1148
-.L1222:
+	bne	.L1155
+.L1229:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L1146
-.L1148:
+	b	.L1153
+.L1155:
 	cmp	w0, w1
-	beq	.L1146
+	beq	.L1153
 	cmn	w0, #1
-	beq	.L1149
+	beq	.L1156
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -8625,57 +8639,57 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 96]
-.L1150:
+.L1157:
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1151
+	beq	.L1158
 	ldr	x0, [x29, 104]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1151
+	cbz	w0, .L1158
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L1146
-.L1151:
+	cbz	w0, .L1153
+.L1158:
 	ldr	w1, [x29, 180]
-	b	.L1222
-.L1149:
+	b	.L1229
+.L1156:
 	str	w0, [x4]
-	b	.L1150
-.L1143:
+	b	.L1157
+.L1150:
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1153
+	beq	.L1160
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1153
+	beq	.L1160
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1167
+	beq	.L1174
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1157
+	beq	.L1164
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1157
+	beq	.L1164
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1153
-.L1157:
+	bne	.L1160
+.L1164:
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	mov	w2, 0
 	mov	w1, 1
@@ -8686,55 +8700,55 @@ FtlRecoverySuperblock:
 	ldr	x0, [x20, #:lo12:.LANCHOR112]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1153
+	beq	.L1160
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1153
+	cbnz	w0, .L1160
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-	b	.L1153
-.L1159:
+	b	.L1160
+.L1166:
 	mov	w1, w24
 	adrp	x0, .LC106
 	add	x0, x0, :lo12:.LC106
 	bl	printf
-	b	.L1138
-.L1140:
+	b	.L1145
+.L1147:
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1160
+	bhi	.L1167
 	adrp	x1, .LANCHOR169
 	add	x1, x1, :lo12:.LANCHOR169
 	str	w5, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1160:
+.L1167:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR145]
 	cmn	w0, #1
-	bne	.L1161
-.L1224:
+	bne	.L1168
+.L1231:
 	str	w21, [x28, #:lo12:.LANCHOR145]
-	b	.L1138
-.L1161:
+	b	.L1145
+.L1168:
 	cmp	w21, w0
-	bcs	.L1138
-	b	.L1224
-.L1164:
+	bcs	.L1145
+	b	.L1231
+.L1171:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L1163
-.L1139:
+	b	.L1170
+.L1146:
 	strb	w27, [x19, 6]
 	strh	w22, [x19, 2]
-	b	.L1226
+	b	.L1233
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlWriteDump_data,"ax",@progbits
 	.align	2
@@ -8750,17 +8764,17 @@ FtlWriteDump_data:
 	stp	x23, x24, [sp, 48]
 	ldrh	w2, [x0, 4]
 	str	x25, [sp, 64]
-	cbz	w2, .L1228
+	cbz	w2, .L1235
 	ldrb	w1, [x0, 8]
-	cbnz	w1, .L1228
+	cbnz	w1, .L1235
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L1228
+	beq	.L1235
 	ldrb	w0, [x0, 10]
-	cbnz	w0, .L1227
+	cbnz	w0, .L1234
 	adrp	x0, .LANCHOR61
 	mov	w2, 0
 	add	x1, x29, 92
@@ -8780,12 +8794,12 @@ FtlWriteDump_data:
 	stp	x0, x20, [x29, 104]
 	str	w21, [x29, 120]
 	str	wzr, [x20, 4]
-	beq	.L1230
+	beq	.L1237
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.L1231:
+.L1238:
 	adrp	x23, .LANCHOR71
 	lsl	w25, w25, 2
 	add	x22, x19, :lo12:.LANCHOR51
@@ -8793,29 +8807,29 @@ FtlWriteDump_data:
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
-.L1232:
+.L1239:
 	cmp	w25, w24
-	bne	.L1236
-.L1233:
+	bne	.L1243
+.L1240:
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.L1227:
+.L1234:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1230:
+.L1237:
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1231
-.L1236:
+	b	.L1238
+.L1243:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L1233
+	cbz	w0, .L1240
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
 	stp	w21, w0, [x20, 8]
@@ -8837,11 +8851,11 @@ FtlWriteDump_data:
 	bl	FlashProgPages
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-	b	.L1232
-.L1228:
+	b	.L1239
+.L1235:
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
-	b	.L1227
+	b	.L1234
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.section	.text.l2p_flush,"ax",@progbits
 	.align	2
@@ -8857,27 +8871,27 @@ l2p_flush:
 	mov	w19, 0
 	adrp	x21, .LANCHOR55
 	bl	FtlWriteDump_data
-.L1246:
+.L1253:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1248
+	bhi	.L1255
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1248:
+.L1255:
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1247
+	tbz	w0, #31, .L1254
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1247:
+.L1254:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1246
+	b	.L1253
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -8914,10 +8928,10 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1256:
+.L1263:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1252
-.L1253:
+	cbnz	w0, .L1259
+.L1260:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -8935,12 +8949,12 @@ FtlSuperblockPowerLostFix:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1252:
+.L1259:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 52]
 	cmn	w0, #1
-	beq	.L1253
+	beq	.L1260
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x21, 4]
@@ -8955,8 +8969,8 @@ FtlSuperblockPowerLostFix:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	subs	w20, w20, #1
-	bne	.L1256
-	b	.L1253
+	bne	.L1263
+	b	.L1260
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -8976,7 +8990,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1272
+	bhi	.L1279
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -8986,9 +9000,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1266:
-	cbnz	w20, .L1271
-.L1264:
+.L1273:
+	cbnz	w20, .L1278
+.L1271:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8997,7 +9011,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1271:
+.L1278:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR133
 	adrp	x27, .LANCHOR117
@@ -9010,9 +9024,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1268
+	cbz	w2, .L1275
 	cmp	w19, w1
-	beq	.L1268
+	beq	.L1275
 	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
@@ -9022,7 +9036,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1269:
+.L1276:
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	lsl	w22, w22, 7
@@ -9043,16 +9057,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1266
-.L1268:
+	b	.L1273
+.L1275:
 	ldrh	w2, [x26]
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	bl	ftl_memset
-	b	.L1269
-.L1272:
+	b	.L1276
+.L1279:
 	mov	w23, -1
-	b	.L1264
+	b	.L1271
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -9065,7 +9079,7 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1277
+	bne	.L1284
 	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
@@ -9108,7 +9122,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1277:
+.L1284:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -9119,20 +9133,20 @@ FtlEctTblFlush:
 	adrp	x2, .LANCHOR170
 	ldrh	w1, [x2, #:lo12:.LANCHOR170]
 	cmp	w1, 31
-	bhi	.L1283
+	bhi	.L1290
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR170]
 	mov	w1, 1
-.L1280:
+.L1287:
 	adrp	x2, .LANCHOR127
-	cbnz	w0, .L1281
+	cbnz	w0, .L1288
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1285
-.L1281:
+	bcc	.L1292
+.L1288:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
@@ -9155,10 +9169,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1283:
+.L1290:
 	mov	w1, 32
-	b	.L1280
-.L1285:
+	b	.L1287
+.L1292:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -9188,7 +9202,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1297
+	bhi	.L1304
 	adrp	x0, .LANCHOR22
 	mov	x25, x2
 	mov	w24, 0
@@ -9198,9 +9212,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR12
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1290:
-	cbnz	w21, .L1296
-.L1288:
+.L1297:
+	cbnz	w21, .L1303
+.L1295:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9209,7 +9223,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1296:
+.L1303:
 	ldr	x0, [x27, #:lo12:.LANCHOR133]
 	ldr	w4, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
@@ -9222,7 +9236,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w26, w19, 9
-	cbz	w4, .L1292
+	cbz	w4, .L1299
 	adrp	x28, .LANCHOR117
 	mov	w2, 1
 	str	w4, [x29, 96]
@@ -9242,7 +9256,7 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR148]
 	cmp	w0, 256
-	bne	.L1294
+	bne	.L1301
 	mov	w2, w4
 	mov	w1, w20
 	adrp	x0, .LC107
@@ -9255,28 +9269,28 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR158
 	bl	FtlMapWritePage
 	ldr	x5, [x29, 96]
-.L1294:
+.L1301:
 	ldr	x1, [x5, #:lo12:.LANCHOR117]
 	lsl	w23, w23, 7
 	mov	w2, w26
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1295:
+.L1302:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x26, sxtw
-	b	.L1290
-.L1292:
+	b	.L1297
+.L1299:
 	mov	w2, w26
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1295
-.L1297:
+	b	.L1302
+.L1304:
 	mov	w24, -1
-	b	.L1288
+	b	.L1295
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -9297,7 +9311,7 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1300
+	beq	.L1307
 	adrp	x1, .LC108
 	adrp	x0, .LC71
 	add	x1, x1, :lo12:.LC108
@@ -9308,7 +9322,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1300:
+.L1307:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -9333,18 +9347,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1303
+	beq	.L1310
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1303:
+.L1310:
 	ldr	w1, [x19, #:lo12:.LANCHOR81]
 	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
 	adrp	x1, .LANCHOR73
-	bne	.L1304
+	bne	.L1311
 	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR68]
@@ -9379,7 +9393,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR77
 	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1304:
+.L1311:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR72
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
@@ -9519,7 +9533,7 @@ FtlVpcTblFlush:
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
 	str	x20, [x29, 104]
-.L1308:
+.L1315:
 	ldrh	w2, [x19, 2]
 	ldrh	w1, [x19]
 	ldr	x0, [x24, #:lo12:.LANCHOR115]
@@ -9531,7 +9545,7 @@ FtlVpcTblFlush:
 	ldrh	w0, [x20]
 	sub	w0, w0, #1
 	cmp	w2, w0
-	blt	.L1309
+	blt	.L1316
 	ldrh	w26, [x19, 4]
 	strh	wzr, [x19, 2]
 	strh	w1, [x19, 4]
@@ -9545,7 +9559,7 @@ FtlVpcTblFlush:
 	strh	w0, [x19]
 	strh	w0, [x27, 2]
 	str	w1, [x27, 4]
-.L1309:
+.L1316:
 	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
@@ -9557,48 +9571,48 @@ FtlVpcTblFlush:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1310
+	bne	.L1317
 	cmp	w0, 1
-	bne	.L1311
+	bne	.L1318
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
 	mov	w2, 1135
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1311:
+.L1318:
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1312
+	bne	.L1319
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1312:
+.L1319:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1308
+	bls	.L1315
 	add	x22, x22, :lo12:.LANCHOR148
 	adrp	x0, .LC109
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC109
 	ldr	w1, [x22, 4]
 	bl	printf
-.L1314:
-	b	.L1314
-.L1310:
+.L1321:
+	b	.L1321
+.L1317:
 	cmp	w0, 1
-	beq	.L1308
+	beq	.L1315
 	cmp	w1, 256
-	beq	.L1308
+	beq	.L1315
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1315
+	beq	.L1322
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.L1315:
+.L1322:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9631,14 +9645,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	bne	.L1328
+	bne	.L1335
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1328:
+.L1335:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -9657,56 +9671,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1339
+	bhi	.L1346
 	cmp	w19, 31
-	bhi	.L1333
-.L1347:
+	bhi	.L1340
+.L1354:
 	mov	w0, 0
-.L1331:
+.L1338:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1333:
+.L1340:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1334
+	beq	.L1341
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1334:
+.L1341:
 	adrp	x22, .LANCHOR172
 	adrp	x23, .LANCHOR63
 	add	x22, x22, :lo12:.LANCHOR172
 	add	x23, x23, :lo12:.LANCHOR63
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1335:
+.L1342:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1337
+	bcs	.L1344
 	adrp	x0, .LANCHOR172
 	ldr	w1, [x0, #:lo12:.LANCHOR172]
 	cmp	w1, 32
-	bls	.L1347
+	bls	.L1354
 	str	wzr, [x0, #:lo12:.LANCHOR172]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1347
-.L1337:
+	b	.L1354
+.L1344:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1336
+	beq	.L1343
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -9721,14 +9735,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1336:
+.L1343:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1335
-.L1339:
+	b	.L1342
+.L1346:
 	mov	w0, -1
-	b	.L1331
+	b	.L1338
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
@@ -9756,10 +9770,10 @@ FtlVpcCheckAndModify:
 	ldr	x0, [x24, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L1349:
+.L1356:
 	ldr	w0, [x20]
 	cmp	w19, w0
-	bcc	.L1351
+	bcc	.L1358
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LC110
 	add	x21, x21, :lo12:.LANCHOR5
@@ -9767,10 +9781,10 @@ FtlVpcCheckAndModify:
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
 	mov	w23, 65535
-.L1352:
+.L1359:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1357
+	bhi	.L1364
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	ldr	x25, [sp, 64]
@@ -9779,14 +9793,14 @@ FtlVpcCheckAndModify:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1351:
+.L1358:
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1350
+	beq	.L1357
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldr	x2, [x24, #:lo12:.LANCHOR128]
@@ -9794,51 +9808,51 @@ FtlVpcCheckAndModify:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1350:
-	add	w19, w19, 1
-	b	.L1349
 .L1357:
+	add	w19, w19, 1
+	b	.L1356
+.L1364:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x20, x19, 1, 16
 	ldrh	w2, [x0, x20]
 	ldr	x0, [x24, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x20]
 	cmp	w2, w3
-	beq	.L1354
+	beq	.L1361
 	cmp	w2, w23
-	beq	.L1354
+	beq	.L1361
 	mov	w1, w19
 	mov	x0, x22
 	bl	printf
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1354
+	beq	.L1361
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1354
+	beq	.L1361
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1354
+	beq	.L1361
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x20]
-	cbnz	w1, .L1356
+	cbnz	w1, .L1363
 	ldr	x1, [x24, #:lo12:.LANCHOR128]
 	ldrh	w1, [x1, x20]
 	strh	w1, [x0, x20]
-.L1354:
+.L1361:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1352
-.L1356:
+	b	.L1359
+.L1363:
 	ldr	x1, [x24, #:lo12:.LANCHOR128]
 	ldrh	w1, [x1, x20]
 	strh	w1, [x0, x20]
 	mov	w0, w19
 	bl	update_vpc_list
-	b	.L1354
+	b	.L1361
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -9854,25 +9868,25 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1363
+	bcs	.L1370
 	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
 	mov	w2, 2714
 	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1363:
+.L1370:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1364
+	beq	.L1371
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1365
+	cbz	w0, .L1372
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1364:
+.L1371:
 	adrp	x1, .LANCHOR142
 	mov	w0, 1
 	strb	w0, [x21, 8]
@@ -9880,20 +9894,20 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR142]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1366
+	beq	.L1373
 	cmp	w19, w0
-	bne	.L1367
+	bne	.L1374
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1368
-.L1367:
+	cbz	w1, .L1375
+.L1374:
 	bl	update_vpc_list
-.L1368:
+.L1375:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR142]
-.L1366:
+.L1373:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9905,10 +9919,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1365:
+.L1372:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1364
+	b	.L1371
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -9934,19 +9948,19 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR19
 	add	x23, x23, :lo12:.LANCHOR81
 	bl	FlashProgPages
-.L1374:
+.L1381:
 	cmp	x20, x21
-	beq	.L1381
+	beq	.L1388
 	sub	x22, x20, #4
 	adrp	x25, .LANCHOR42
-	b	.L1382
-.L1377:
+	b	.L1389
+.L1384:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1375
+	bne	.L1382
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9957,12 +9971,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1375:
+.L1382:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1376
+	cbnz	w0, .L1383
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1376:
+.L1383:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -9978,22 +9992,22 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1382:
+.L1389:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1377
+	beq	.L1384
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1378
+	bcc	.L1385
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 955
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1378:
+.L1385:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -10007,35 +10021,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1379
+	beq	.L1386
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1380
+	cbnz	w0, .L1387
 	adrp	x0, .LC111
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC111
 	bl	printf
-.L1380:
+.L1387:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1379:
+.L1386:
 	add	x20, x20, 32
-	b	.L1374
-.L1381:
+	b	.L1381
+.L1388:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1373
+	bcc	.L1380
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 970
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1373:
+.L1380:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10061,18 +10075,18 @@ FtlGcFreeTempBlock:
 	cmp	w20, w2
 	str	x27, [sp, 80]
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-	bne	.L1389
-.L1399:
+	bne	.L1396
+.L1406:
 	adrp	x0, .LANCHOR144
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	str	wzr, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1412
-.L1415:
+	bne	.L1419
+.L1422:
 	mov	w0, 0
-.L1388:
+.L1395:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10080,35 +10094,35 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1389:
-	cbz	w0, .L1392
+.L1396:
+	cbz	w0, .L1399
 	adrp	x0, .LANCHOR162
 	ldrh	w3, [x0, #:lo12:.LANCHOR162]
 	cmp	w3, w2
-	beq	.L1393
-.L1394:
+	beq	.L1400
+.L1401:
 	mov	w1, 2
-.L1392:
+.L1399:
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1395
+	beq	.L1402
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1396
+	bls	.L1403
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1396:
+.L1403:
 	adrp	x0, .LANCHOR144
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR144]
-	cbnz	w1, .L1397
+	cbnz	w1, .L1404
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
@@ -10118,40 +10132,40 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1397:
+.L1404:
 	str	wzr, [x19, #:lo12:.LANCHOR144]
-.L1408:
+.L1415:
 	mov	w0, 1
-	b	.L1388
-.L1393:
+	b	.L1395
+.L1400:
 	strh	wzr, [x0, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1394
-	b	.L1392
-.L1395:
+	bhi	.L1401
+	b	.L1399
+.L1402:
 	adrp	x0, .LANCHOR162
 	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1408
-	b	.L1399
-.L1412:
+	bne	.L1415
+	b	.L1406
+.L1419:
 	ldrb	w0, [x0, 7]
 	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1400
+	beq	.L1407
 	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 162
 	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1400:
+.L1407:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
@@ -10170,19 +10184,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR67]
-.L1401:
+.L1408:
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
-	bhi	.L1405
+	bhi	.L1412
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1406
+	cbz	w1, .L1413
 	bl	INSERT_DATA_LIST
-.L1407:
+.L1414:
 	adrp	x0, .LANCHOR95
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR97]
@@ -10198,12 +10212,12 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1415
+	ble	.L1422
 	adrp	x0, .LANCHOR82
 	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1415
-.L1405:
+	b	.L1422
+.L1412:
 	adrp	x0, .LANCHOR98
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR98]
@@ -10212,13 +10226,13 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1402
+	bcc	.L1409
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1402:
+.L1409:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -10226,7 +10240,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1403
+	bne	.L1410
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -10235,21 +10249,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L1414:
+.L1421:
 	bl	decrement_vpc_count
-.L1404:
+.L1411:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1401
-.L1403:
+	b	.L1408
+.L1410:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1404
+	beq	.L1411
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1414
-.L1406:
+	b	.L1421
+.L1413:
 	bl	INSERT_FREE_LIST
-	b	.L1407
+	b	.L1414
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -10268,7 +10282,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1416
+	bcc	.L1423
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	bl	FtlMapBlkWriteDump_data
@@ -10276,7 +10290,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR144
 	str	wzr, [x0, #:lo12:.LANCHOR144]
-.L1416:
+.L1423:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -10328,26 +10342,26 @@ Ftl_gc_temp_data_write_back:
 	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1422:
+.L1429:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1425
+	bcc	.L1432
 	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1426
+	cbnz	w0, .L1433
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1428
-.L1425:
+	b	.L1435
+.L1432:
 	ldr	x2, [x20, #:lo12:.LANCHOR113]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1423
+	bne	.L1430
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
@@ -10364,23 +10378,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1428:
+.L1435:
 	mov	w0, 1
-.L1421:
+.L1428:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1423:
+.L1430:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1422
-.L1426:
+	b	.L1429
+.L1433:
 	mov	w0, 0
-	b	.L1421
+	b	.L1428
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -10395,11 +10409,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1430
+	beq	.L1437
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1431
-.L1430:
+	cbnz	w0, .L1438
+.L1437:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -10413,7 +10427,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1431:
+.L1438:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -10439,20 +10453,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1434
-.L1436:
+	bne	.L1441
+.L1443:
 	mov	w23, -1
-.L1433:
+.L1440:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1434:
+.L1441:
 	bl	FtlLoadSysInfo
 	mov	w23, w0
-	cbnz	w0, .L1436
+	cbnz	w0, .L1443
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -10468,12 +10482,12 @@ FtlSysBlkInit:
 	adrp	x0, .LANCHOR55
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	add	x0, x0, 4
-.L1437:
+.L1444:
 	cmp	w1, w3
-	bge	.L1442
+	bge	.L1449
 	ldr	w2, [x0], 16
-	tbz	w2, #31, .L1438
-.L1442:
+	tbz	w2, #31, .L1445
+.L1449:
 	adrp	x0, .LANCHOR39
 	add	x4, x0, :lo12:.LANCHOR39
 	cmp	w1, w3
@@ -10482,8 +10496,8 @@ FtlSysBlkInit:
 	ldrh	w2, [x4, 28]
 	add	w2, w2, 1
 	strh	w2, [x4, 28]
-	bge	.L1447
-.L1439:
+	bge	.L1454
+.L1446:
 	add	x21, x22, :lo12:.LANCHOR51
 	adrp	x24, .LANCHOR52
 	mov	x0, x21
@@ -10521,26 +10535,26 @@ FtlSysBlkInit:
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L1443
-.L1438:
+	b	.L1450
+.L1445:
 	add	w1, w1, 1
-	b	.L1437
-.L1447:
+	b	.L1444
+.L1454:
 	ldrh	w0, [x20, #:lo12:.LANCHOR167]
-	cbnz	w0, .L1439
-.L1443:
+	cbnz	w0, .L1446
+.L1450:
 	bl	FtlVpcCheckAndModify
 	add	x20, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L1433
+	beq	.L1440
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1433
+	cbnz	w1, .L1440
 	adrp	x21, .LANCHOR52
 	add	x19, x21, :lo12:.LANCHOR52
 	ldrh	w1, [x19, 4]
-	cbnz	w1, .L1433
+	cbnz	w1, .L1440
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x21, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
@@ -10549,7 +10563,7 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-	b	.L1433
+	b	.L1440
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
@@ -10566,24 +10580,24 @@ rk_ftl_garbage_collect:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x1, [x29, 144]
-	cbnz	w2, .L1522
+	cbnz	w2, .L1529
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1522
+	bls	.L1529
 	str	w0, [x29, 152]
 	adrp	x0, .LANCHOR162
 	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1451
-.L1454:
+	bne	.L1458
+.L1461:
 	adrp	x0, .LANCHOR100
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
-	bne	.L1452
-.L1453:
+	bne	.L1459
+.L1460:
 	bl	FtlReadRefresh
 	adrp	x19, .LANCHOR80
 	adrp	x2, .LANCHOR84
@@ -10595,15 +10609,15 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	str	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w1, w21
-	bne	.L1455
+	bne	.L1462
 	adrp	x3, .LANCHOR53
 	ldrh	w21, [x3, #:lo12:.LANCHOR53]
 	cmp	w21, w1
-	bne	.L1525
+	bne	.L1532
 	adrp	x1, .LANCHOR99
 	ldrh	w20, [x1, #:lo12:.LANCHOR99]
 	cmp	w20, w21
-	bne	.L1455
+	bne	.L1462
 	adrp	x22, .LANCHOR48
 	mov	w3, 1024
 	ldrh	w1, [x22, #:lo12:.LANCHOR48]
@@ -10611,89 +10625,89 @@ rk_ftl_garbage_collect:
 	mov	w1, 5120
 	csel	w1, w1, w3, cc
 	cmp	w0, w1
-	bls	.L1528
+	bls	.L1535
 	adrp	x0, .LANCHOR177
 	str	wzr, [x2, #:lo12:.LANCHOR84]
 	strh	wzr, [x0, #:lo12:.LANCHOR177]
 	bl	GetSwlReplaceBlock
 	and	w21, w0, 65535
 	cmp	w21, w20
-	bne	.L1529
+	bne	.L1536
 	adrp	x5, .LANCHOR83
 	ldrh	w1, [x22, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bcs	.L1458
+	bcs	.L1465
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	and	w0, w0, 65535
 	cmp	w0, w21
-	beq	.L1460
+	beq	.L1467
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1461
+	bhi	.L1468
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	and	w20, w0, 65535
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR83]
 	cmp	w20, w21
-	bne	.L1457
-.L1460:
+	bne	.L1464
+.L1467:
 	bl	FtlGcReFreshBadBlk
-.L1455:
+.L1462:
 	ldr	w1, [x29, 152]
 	mov	w0, 65535
 	cmp	w1, 0
 	ccmp	w21, w0, 0, eq
-	bne	.L1463
+	bne	.L1470
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1530
+	bhi	.L1537
 	adrp	x1, .LANCHOR19
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR19]
-	bls	.L1465
+	bls	.L1472
 	lsr	w20, w20, 5
-.L1464:
+.L1471:
 	adrp	x2, .LANCHOR82
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bcs	.L1468
+	bcs	.L1475
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1469
+	bne	.L1476
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
-	bne	.L1469
+	bne	.L1476
 	adrp	x0, .LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1470
+	cbnz	w0, .L1477
 	adrp	x1, .LANCHOR61
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1471
-.L1470:
+	bcs	.L1478
+.L1477:
 	adrp	x1, .LANCHOR78
 	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1472:
+.L1479:
 	adrp	x1, .LANCHOR87
 	str	wzr, [x1, #:lo12:.LANCHOR87]
-.L1449:
+.L1456:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10701,36 +10715,36 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1451:
+.L1458:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1454
+	beq	.L1461
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1454
+	cbz	w0, .L1461
 	mov	w0, 1
-	b	.L1449
-.L1452:
+	b	.L1456
+.L1459:
 	adrp	x1, .LANCHOR99
 	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
-	bne	.L1453
+	bne	.L1460
 	strh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1453
-.L1461:
+	b	.L1460
+.L1468:
 	mov	w0, 64
-.L1557:
+.L1564:
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1460
-.L1458:
+	b	.L1467
+.L1465:
 	mov	w0, 80
-	b	.L1557
-.L1529:
+	b	.L1564
+.L1536:
 	mov	w20, w21
-.L1457:
+.L1464:
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x20, 1, 32
 	adrp	x3, .LANCHOR82
@@ -10746,69 +10760,69 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC112
 	add	x0, x0, :lo12:.LC112
 	bl	printf
-	b	.L1460
-.L1525:
+	b	.L1467
+.L1532:
 	mov	w21, w1
-	b	.L1455
-.L1528:
+	b	.L1462
+.L1535:
 	mov	w21, w20
-	b	.L1455
-.L1465:
+	b	.L1462
+.L1472:
 	cmp	w0, 12
-	bls	.L1466
+	bls	.L1473
 	lsr	w20, w20, 4
-	b	.L1464
-.L1466:
+	b	.L1471
+.L1473:
 	cmp	w0, 8
-	bls	.L1464
+	bls	.L1471
 	lsr	w20, w20, 2
-	b	.L1464
-.L1530:
+	b	.L1471
+.L1537:
 	mov	w20, 1
-	b	.L1464
-.L1471:
+	b	.L1471
+.L1478:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1472
-.L1469:
+	b	.L1479
+.L1476:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1468:
+.L1475:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1531
+	cbz	w0, .L1538
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L1531:
+.L1538:
 	mov	w21, 65535
-.L1474:
+.L1481:
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1483
+	bne	.L1490
 	cmp	w21, w0
-	beq	.L1484
+	beq	.L1491
 	strh	w21, [x19, #:lo12:.LANCHOR80]
-.L1485:
+.L1492:
 	add	x0, x19, :lo12:.LANCHOR80
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	beq	.L1483
+	beq	.L1490
 	bl	IsBlkInGcList
-	cbz	w0, .L1488
+	cbz	w0, .L1495
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1488:
+.L1495:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
-	beq	.L1483
+	beq	.L1490
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR178
@@ -10821,33 +10835,33 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR179
 	strh	w1, [x0, #:lo12:.LANCHOR179]
-.L1483:
+.L1490:
 	adrp	x1, .LANCHOR51
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	str	x1, [x29, 120]
 	ldrh	w2, [x1, #:lo12:.LANCHOR51]
 	cmp	w2, w0
-	beq	.L1489
+	beq	.L1496
 	adrp	x1, .LANCHOR52
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1490
-.L1489:
+	bne	.L1497
+.L1496:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1490:
+.L1497:
 	adrp	x25, .LANCHOR85
 	add	x26, x25, :lo12:.LANCHOR85
-.L1519:
+.L1526:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1491
+	bne	.L1498
 	adrp	x0, .LANCHOR87
 	adrp	x22, .LANCHOR19
 	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1492:
+.L1499:
 	ldrh	w5, [x25, #:lo12:.LANCHOR85]
 	add	x7, x25, :lo12:.LANCHOR85
 	mov	w0, w5
@@ -10856,28 +10870,28 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1493
+	bne	.L1500
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1449
-.L1463:
+	b	.L1456
+.L1470:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1534
+	bne	.L1541
 	adrp	x0, .LANCHOR99
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bne	.L1534
+	bne	.L1541
 	cmp	w21, w0
-	bne	.L1534
+	bne	.L1541
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	beq	.L1475
-.L1534:
+	beq	.L1482
+.L1541:
 	mov	w20, 1
-	b	.L1474
-.L1475:
+	b	.L1481
+.L1482:
 	adrp	x0, .LANCHOR87
 	adrp	x22, .LANCHOR48
 	adrp	x20, .LANCHOR82
@@ -10886,22 +10900,22 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x22, #:lo12:.LANCHOR48]
 	ldrh	w0, [x20, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bls	.L1476
+	bls	.L1483
 	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1477
+	cbnz	w0, .L1484
 	adrp	x0, .LANCHOR61
 	adrp	x1, .LANCHOR59
 	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ldr	w1, [x1, #:lo12:.LANCHOR59]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	bcs	.L1478
-.L1477:
+	bcs	.L1485
+.L1484:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-.L1558:
+.L1565:
 	strh	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlReadRefresh
 	mov	w0, 0
@@ -10911,16 +10925,16 @@ rk_ftl_garbage_collect:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 4
-	bls	.L1476
-.L1559:
+	bls	.L1483
+.L1566:
 	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	b	.L1449
-.L1478:
+	b	.L1456
+.L1485:
 	mov	w0, 18
-	b	.L1558
-.L1476:
+	b	.L1565
+.L1483:
 	ldrh	w0, [x23, #:lo12:.LANCHOR177]
-	cbnz	w0, .L1534
+	cbnz	w0, .L1541
 	adrp	x0, .LANCHOR78
 	ldrh	w5, [x0, #:lo12:.LANCHOR78]
 	add	w0, w5, w5, lsl 1
@@ -10938,46 +10952,46 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1481
+	ble	.L1488
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	sub	w5, w5, #1
 	cmp	w0, w5
-	blt	.L1481
+	blt	.L1488
 	bl	FtlReadRefresh
-	b	.L1559
-.L1481:
-	cbnz	w1, .L1534
+	b	.L1566
+.L1488:
+	cbnz	w1, .L1541
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1449
-.L1484:
+	b	.L1456
+.L1491:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w1, w21
-	beq	.L1485
+	beq	.L1492
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1486
+	cbnz	w1, .L1493
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1486:
+.L1493:
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	strh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1485
-.L1493:
+	b	.L1492
+.L1500:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1494
+	cbz	w0, .L1501
 	strh	w5, [x25, #:lo12:.LANCHOR85]
-	b	.L1492
-.L1494:
+	b	.L1499
+.L1501:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x22]
@@ -10989,80 +11003,80 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1496
+	bgt	.L1503
 	cmp	w5, 48
-	bls	.L1497
+	bls	.L1504
 	cmp	w3, 8
-	bls	.L1497
+	bls	.L1504
 	adrp	x3, .LANCHOR95
 	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
-	bhi	.L1497
-.L1496:
+	bhi	.L1504
+.L1503:
 	strh	wzr, [x26]
-.L1497:
+.L1504:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1498
+	bgt	.L1505
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L1498
+	bne	.L1505
 	ldrh	w0, [x26]
 	cmp	w0, 3
-	bhi	.L1498
+	bhi	.L1505
 	mov	w0, -1
 	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1560:
+.L1567:
 	adrp	x0, .LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR177]
-	b	.L1449
-.L1498:
-	cbnz	w1, .L1499
+	b	.L1456
+.L1505:
+	cbnz	w1, .L1506
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x26]
 	add	w0, w0, 1
 	strh	w0, [x26]
-	b	.L1492
-.L1499:
+	b	.L1499
+.L1506:
 	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1500
+	bne	.L1507
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 700
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1500:
+.L1507:
 	adrp	x0, .LANCHOR52
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1501
+	bne	.L1508
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 701
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1501:
+.L1508:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1502
+	bne	.L1509
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 702
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1502:
+.L1509:
 	add	x22, x19, :lo12:.LANCHOR80
 	mov	x0, x22
 	bl	make_superblock
@@ -11075,7 +11089,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR179]
 	strb	wzr, [x22, 6]
-.L1491:
+.L1498:
 	ldr	x1, [x29, 144]
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR108]
@@ -11084,7 +11098,7 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, #:lo12:.LANCHOR19]
 	ldr	w0, [x29, 152]
 	str	w1, [x29, 156]
-	cbz	w0, .L1503
+	cbz	w0, .L1510
 	adrp	x0, .LANCHOR3
 	ldrh	w2, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
@@ -11097,23 +11111,23 @@ rk_ftl_garbage_collect:
 	sdiv	w0, w0, w1
 	add	w20, w20, w0
 	and	w20, w20, 65535
-.L1503:
+.L1510:
 	add	x0, x19, :lo12:.LANCHOR80
 	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w2
-	ble	.L1504
+	ble	.L1511
 	sub	w20, w2, w0
 	and	w20, w20, 65535
-.L1504:
+.L1511:
 	adrp	x0, .LANCHOR178
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR178
 	str	x0, [x29, 136]
-.L1505:
+.L1512:
 	cmp	w20, w28, uxth
-	bls	.L1513
+	bls	.L1520
 	add	x1, x19, :lo12:.LANCHOR80
 	adrp	x0, .LANCHOR3
 	adrp	x23, .LANCHOR93
@@ -11125,24 +11139,24 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x23, #:lo12:.LANCHOR93]
 	mov	w6, 65535
 	add	w4, w4, w28
-	b	.L1514
-.L1507:
+	b	.L1521
+.L1514:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1506
+	beq	.L1513
 	ubfiz	x5, x22, 5, 16
 	add	w22, w22, 1
 	add	x5, x0, x5
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1506:
+.L1513:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1514:
+.L1521:
 	cmp	w2, w7
-	bne	.L1507
+	bne	.L1514
 	add	x1, x19, :lo12:.LANCHOR80
 	adrp	x24, .LANCHOR89
 	add	x24, x24, :lo12:.LANCHOR89
@@ -11152,26 +11166,26 @@ rk_ftl_garbage_collect:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 128]
-.L1508:
+.L1515:
 	ldr	x0, [x29, 128]
 	cmp	x0, x22
-	bne	.L1512
+	bne	.L1519
 	add	w28, w28, 1
-	b	.L1505
-.L1512:
+	b	.L1512
+.L1519:
 	ldr	x0, [x23, #:lo12:.LANCHOR93]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1509
+	beq	.L1516
 	ldr	x27, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1509
+	bne	.L1516
 	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1510
+	bne	.L1517
 	str	w4, [x29, 104]
 	mov	w2, 736
 	adrp	x1, .LANCHOR180
@@ -11180,7 +11194,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 	ldr	w4, [x29, 104]
-.L1510:
+.L1517:
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w4
@@ -11190,7 +11204,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1509
+	bne	.L1516
 	ldr	x1, [x29, 136]
 	adrp	x4, .LANCHOR113
 	ldr	x2, [x29, 136]
@@ -11232,20 +11246,20 @@ rk_ftl_garbage_collect:
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1511
+	beq	.L1518
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1509
-.L1511:
+	cbnz	w0, .L1516
+.L1518:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1509
-.L1561:
+	cbz	w0, .L1516
+.L1568:
 	ldr	x0, [x29, 144]
 	str	wzr, [x0, #:lo12:.LANCHOR108]
-	b	.L1560
-.L1509:
+	b	.L1567
+.L1516:
 	add	x22, x22, 32
-	b	.L1508
-.L1513:
+	b	.L1515
+.L1520:
 	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
@@ -11253,49 +11267,49 @@ rk_ftl_garbage_collect:
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w0, w20
-	bhi	.L1515
+	bhi	.L1522
 	adrp	x0, .LANCHOR89
 	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1516
+	cbz	w0, .L1523
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1561
-.L1516:
+	cbnz	w0, .L1568
+.L1523:
 	adrp	x0, .LANCHOR178
 	ldrh	w0, [x0, #:lo12:.LANCHOR178]
-	cbnz	w0, .L1517
+	cbnz	w0, .L1524
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1517
+	cbz	w2, .L1524
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1517:
+.L1524:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1515:
+.L1522:
 	ldr	x0, [x29, 144]
 	str	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1518
+	bhi	.L1525
 	ldr	x0, [x29, 112]
 	ldrh	w20, [x0, #:lo12:.LANCHOR19]
-	b	.L1519
-.L1518:
+	b	.L1526
+.L1525:
 	adrp	x1, .LANCHOR177
 	ldrh	w1, [x1, #:lo12:.LANCHOR177]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1449
-.L1522:
+	b	.L1456
+.L1529:
 	mov	w0, 0
-	b	.L1449
+	b	.L1456
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.sftl_init,"ax",@progbits
 	.align	2
@@ -11322,23 +11336,23 @@ sftl_init:
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	w0, .L1566
+	cbnz	w0, .L1573
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1566
+	cbnz	w0, .L1573
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1566
+	bhi	.L1573
 	mov	w19, 8129
-.L1565:
+.L1572:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L1565
-.L1566:
+	bne	.L1572
+.L1573:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11370,13 +11384,13 @@ FtlRead:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L1571
+	bne	.L1578
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1570:
+.L1577:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11385,18 +11399,18 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1571:
+.L1578:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1592
+	bhi	.L1599
 	adrp	x0, .LANCHOR86
 	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
-	beq	.L1570
+	beq	.L1577
 	adrp	x22, .LANCHOR12
 	adrp	x25, .LANCHOR81
 	add	x25, x25, :lo12:.LANCHOR81
@@ -11424,47 +11438,47 @@ FtlRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR62]
-.L1573:
+.L1580:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1590
+	cbnz	w0, .L1597
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1591
+	cbnz	w0, .L1598
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1570
-.L1591:
+	bhi	.L1577
+.L1598:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1570
-.L1590:
+	b	.L1577
+.L1597:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1574
+	bne	.L1581
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1575:
+.L1582:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1577
-.L1578:
+	bcc	.L1584
+.L1585:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1582
+	beq	.L1589
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w27, w0, lsl 2
-	bne	.L1573
-.L1582:
-	cbz	w27, .L1573
+	bne	.L1580
+.L1589:
+	cbz	w27, .L1580
 	ldr	x0, [x28, #:lo12:.LANCHOR112]
 	mov	w1, w27
 	mov	w2, 0
@@ -11483,57 +11497,57 @@ FtlRead:
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1589:
+.L1596:
 	ldr	x0, [x28, #:lo12:.LANCHOR112]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x27
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L1584
+	bne	.L1591
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR118
 	ldr	x0, [x0, #:lo12:.LANCHOR118]
 	cmp	x1, x0
-	bne	.L1585
+	bne	.L1592
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1603:
+.L1610:
 	bl	ftl_memcpy
-.L1585:
+.L1592:
 	ldr	x0, [x28, #:lo12:.LANCHOR112]
 	add	x0, x0, x27
 	ldr	x1, [x0, 16]
 	ldr	w2, [x0, 24]
 	ldr	w1, [x1, 8]
 	cmp	w2, w1
-	beq	.L1586
+	beq	.L1593
 	ldr	w1, [x25, 72]
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L1586:
+.L1593:
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1587
+	bne	.L1594
 	ldr	w0, [x25, 72]
 	mov	w21, w1
 	add	w0, w0, 1
 	str	w0, [x25, 72]
-.L1588:
+.L1595:
 	ldr	x0, [x29, 104]
 	add	x27, x27, 32
 	cmp	x0, x27
-	bne	.L1589
+	bne	.L1596
 	mov	w27, 0
-	b	.L1573
-.L1577:
+	b	.L1580
+.L1584:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1576
+	bhi	.L1583
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1576
+	bls	.L1583
 	sub	w0, w0, w19
 	str	x5, [x29, 120]
 	lsl	w0, w0, 9
@@ -11544,17 +11558,17 @@ FtlRead:
 	bl	ftl_memset
 	ldr	w4, [x29, 128]
 	ldr	x5, [x29, 120]
-.L1576:
+.L1583:
 	add	w4, w4, 1
-	b	.L1575
-.L1574:
+	b	.L1582
+.L1581:
 	ldr	x2, [x28, #:lo12:.LANCHOR112]
 	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L1579
+	bne	.L1586
 	adrp	x1, .LANCHOR118
 	ldr	x1, [x1, #:lo12:.LANCHOR118]
 	str	x1, [x0, 8]
@@ -11567,9 +11581,9 @@ FtlRead:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1580
+	bne	.L1587
 	str	x23, [x0, 8]
-.L1580:
+.L1587:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR124
 	str	w20, [x0, 24]
@@ -11580,10 +11594,10 @@ FtlRead:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1578
-.L1579:
+	b	.L1585
+.L1586:
 	cmp	w20, w24
-	bne	.L1581
+	bne	.L1588
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	adrp	x1, .LANCHOR119
 	ldr	w3, [x29, 136]
@@ -11593,25 +11607,25 @@ FtlRead:
 	sub	w3, w3, w1
 	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1580
-.L1602:
+	bne	.L1587
+.L1609:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1580
-.L1581:
+	b	.L1587
+.L1588:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1602
-.L1584:
+	b	.L1609
+.L1591:
 	cmp	w24, w1
-	bne	.L1585
+	bne	.L1592
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR119
 	ldr	x0, [x0, #:lo12:.LANCHOR119]
 	cmp	x1, x0
-	bne	.L1585
+	bne	.L1592
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
@@ -11619,18 +11633,18 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1603
-.L1587:
+	b	.L1610
+.L1594:
 	cmp	w1, 256
-	bne	.L1588
+	bne	.L1595
 	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1588
-.L1592:
+	b	.L1595
+.L1599:
 	mov	w21, -1
-	b	.L1570
+	b	.L1577
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -11660,12 +11674,12 @@ FtlWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	str	w2, [x29, 180]
-	bne	.L1606
+	bne	.L1613
 	add	w0, w1, 256
 	ldr	w1, [x29, 180]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1605:
+.L1612:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11673,7 +11687,7 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1606:
+.L1613:
 	ldr	w0, [x29, 180]
 	add	w0, w1, w0
 	str	w0, [x29, 168]
@@ -11681,11 +11695,11 @@ FtlWrite:
 	ldr	w1, [x29, 168]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1642
+	bhi	.L1649
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
-	beq	.L1605
+	beq	.L1612
 	adrp	x0, .LANCHOR181
 	mov	w1, 2048
 	adrp	x22, .LANCHOR12
@@ -11713,18 +11727,18 @@ FtlWrite:
 	ldr	w1, [x0, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1608
+	cbz	w1, .L1615
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1608
+	cbnz	w0, .L1615
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1608:
+.L1615:
 	mov	w20, w25
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.L1609:
-	cbnz	w24, .L1637
+.L1616:
+	cbnz	w24, .L1644
 	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
@@ -11732,38 +11746,38 @@ FtlWrite:
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 5
-	bls	.L1638
-.L1640:
+	bls	.L1645
+.L1647:
 	mov	w0, 0
-	b	.L1605
-.L1637:
+	b	.L1612
+.L1644:
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1610
+	bcc	.L1617
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1011
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1610:
+.L1617:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1611
+	cbnz	w0, .L1618
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1612
+	bne	.L1619
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1613
+	cbnz	w1, .L1620
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 160]
 	str	wzr, [x0, #:lo12:.LANCHOR182]
-.L1613:
+.L1620:
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
 	mov	x0, x19
@@ -11773,12 +11787,12 @@ FtlWrite:
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1614:
+.L1621:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1611
+	cbnz	w0, .L1618
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1611:
+.L1618:
 	ldrh	w0, [x19, 4]
 	ldrb	w1, [x19, 7]
 	cmp	w0, w24
@@ -11791,14 +11805,14 @@ FtlWrite:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1615
+	bcc	.L1622
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1044
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1615:
+.L1622:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	str	xzr, [x29, 184]
@@ -11806,44 +11820,44 @@ FtlWrite:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1616:
+.L1623:
 	ldr	w1, [x29, 148]
 	adrp	x27, .LANCHOR114
 	ldr	w23, [x29, 184]
 	cmp	w23, w1
-	bcc	.L1635
+	bcc	.L1642
 	mov	x23, x1
-.L1617:
+.L1624:
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
 	cmp	w24, w23
-	bcs	.L1636
+	bcs	.L1643
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1121
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1636:
+.L1643:
 	sub	w24, w24, w23
-	b	.L1609
-.L1612:
+	b	.L1616
+.L1619:
 	ldr	x1, [x29, 160]
 	str	wzr, [x1, #:lo12:.LANCHOR182]
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1647
+	cbnz	w1, .L1654
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-	b	.L1614
-.L1647:
+	b	.L1621
+.L1654:
 	mov	x19, x0
-	b	.L1611
-.L1635:
+	b	.L1618
+.L1642:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1617
+	cbz	w0, .L1624
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
@@ -11873,9 +11887,9 @@ FtlWrite:
 	ldr	w0, [x29, 156]
 	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1618
+	bne	.L1625
 	cmp	w20, w25
-	bne	.L1619
+	bne	.L1626
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
@@ -11885,29 +11899,29 @@ FtlWrite:
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
 	str	w0, [x29, 176]
-.L1620:
+.L1627:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	ldr	w1, [x29, 176]
 	cmp	w1, w0
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
-	bne	.L1621
+	bne	.L1628
 	add	x3, x0, x28
 	cmp	w20, w25
-	bne	.L1622
+	bne	.L1629
 	str	x26, [x3, 8]
-.L1623:
+.L1630:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1632
+	bcc	.L1639
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	mov	w2, 1112
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1632:
+.L1639:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -11926,34 +11940,34 @@ FtlWrite:
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1616
-.L1619:
+	b	.L1623
+.L1626:
 	ldr	w0, [x29, 168]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
 	stp	wzr, w0, [x29, 172]
-	b	.L1620
-.L1622:
+	b	.L1627
+.L1629:
 	ldr	w0, [x29, 176]
-.L1654:
+.L1661:
 	mul	w0, w0, w20
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1623
-.L1621:
+	b	.L1630
+.L1628:
 	add	x0, x0, x28
 	cmp	w20, w25
-	bne	.L1624
+	bne	.L1631
 	adrp	x1, .LANCHOR118
 	ldr	x1, [x1, #:lo12:.LANCHOR118]
-.L1653:
+.L1660:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1626
+	beq	.L1633
 	str	w0, [x29, 212]
 	mov	w2, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
@@ -11966,17 +11980,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1627
+	bne	.L1634
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1630:
+.L1637:
 	ldr	w0, [x29, 176]
 	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1631
+	bne	.L1638
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x1, x26
 	add	x3, x0, x28
@@ -11984,17 +11998,17 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1655:
+.L1662:
 	bl	ftl_memcpy
-	b	.L1623
-.L1624:
+	b	.L1630
+.L1631:
 	adrp	x1, .LANCHOR119
 	ldr	x1, [x1, #:lo12:.LANCHOR119]
-	b	.L1653
-.L1627:
+	b	.L1660
+.L1634:
 	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1629
+	beq	.L1636
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
@@ -12004,18 +12018,18 @@ FtlWrite:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1629:
+.L1636:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1630
+	beq	.L1637
 	mov	w2, 1097
 	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1630
-.L1626:
+	b	.L1637
+.L1633:
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x28
@@ -12023,8 +12037,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1630
-.L1631:
+	b	.L1637
+.L1638:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	add	x3, x0, x28
@@ -12033,13 +12047,13 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1655
-.L1618:
+	b	.L1662
+.L1625:
 	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	add	x3, x0, x28
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1654
-.L1638:
+	b	.L1661
+.L1645:
 	adrp	x23, .LANCHOR99
 	adrp	x20, .LANCHOR83
 	adrp	x21, .LANCHOR82
@@ -12047,19 +12061,19 @@ FtlWrite:
 	add	x20, x20, :lo12:.LANCHOR83
 	add	x21, x21, :lo12:.LANCHOR82
 	mov	w19, 256
-.L1641:
+.L1648:
 	adrp	x0, .LANCHOR80
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	bne	.L1639
+	bne	.L1646
 	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1639
+	bne	.L1646
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1639:
+.L1646:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
@@ -12071,13 +12085,13 @@ FtlWrite:
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1640
+	bhi	.L1647
 	subs	w19, w19, #1
-	bne	.L1641
-	b	.L1640
-.L1642:
+	bne	.L1648
+	b	.L1647
+.L1649:
 	mov	w0, -1
-	b	.L1605
+	b	.L1612
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
@@ -12097,14 +12111,14 @@ sftl_write:
 	stp	x27, x28, [sp, 80]
 	cmp	w20, 63
 	str	x2, [x29, 184]
-	bls	.L1657
+	bls	.L1664
 	cmp	w0, 576
-	bls	.L1658
-.L1657:
+	bls	.L1665
+.L1664:
 	adrp	x0, .LANCHOR184
 	str	x0, [x29, 152]
 	ldr	w1, [x0, #:lo12:.LANCHOR184]
-	cbz	w1, .L1659
+	cbz	w1, .L1666
 	adrp	x0, .LANCHOR185
 	str	x0, [x29, 144]
 	mov	w1, 35899
@@ -12112,8 +12126,8 @@ sftl_write:
 	movk	w1, 0xfcdc, lsl 16
 	ldr	w2, [x24]
 	cmp	w2, w1
-	beq	.L1660
-.L1677:
+	beq	.L1667
+.L1684:
 	ldr	x0, [x29, 152]
 	str	wzr, [x0, #:lo12:.LANCHOR184]
 	ldr	x0, [x29, 144]
@@ -12122,7 +12136,7 @@ sftl_write:
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	bl	free
-.L1659:
+.L1666:
 	ldr	x3, [x29, 184]
 	mov	w2, w25
 	mov	w1, w22
@@ -12135,7 +12149,7 @@ sftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 272
 	ret
-.L1660:
+.L1667:
 	adrp	x1, .LANCHOR0
 	add	x0, x1, :lo12:.LANCHOR0
 	mov	w2, 65535
@@ -12146,9 +12160,9 @@ sftl_write:
 	mov	x0, 262140
 	add	x3, x24, x0
 	mov	w0, 0
-.L1664:
+.L1671:
 	ldr	w1, [x3]
-	cbnz	w1, .L1661
+	cbnz	w1, .L1668
 	ldr	w1, [x24, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w1, [x3], -4
@@ -12156,17 +12170,17 @@ sftl_write:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1664
+	bne	.L1671
 	mov	w23, 512
-	b	.L1663
-.L1661:
+	b	.L1670
+.L1668:
 	add	w23, w2, 127
 	adrp	x0, .LC114
 	lsr	w23, w23, 7
 	add	x0, x0, :lo12:.LC114
 	mov	w3, w23
 	bl	printf
-.L1663:
+.L1670:
 	and	w19, w19, 255
 	adrp	x26, .LANCHOR105
 	mul	w20, w20, w19
@@ -12182,8 +12196,8 @@ sftl_write:
 	str	w0, [x29, 192]
 	add	x0, x26, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-	b	.L1676
-.L1667:
+	b	.L1683
+.L1674:
 	add	w0, w5, w4
 	ldr	x3, [x29, 136]
 	ubfiz	x2, x4, 9, 16
@@ -12207,13 +12221,13 @@ sftl_write:
 	add	w4, w0, w4
 	ldr	w6, [x29, 128]
 	and	w4, w4, 65535
-	b	.L1666
-.L1669:
+	b	.L1673
+.L1676:
 	add	w27, w8, w27
 	mov	w0, 0
 	and	w27, w27, 65535
-	b	.L1668
-.L1674:
+	b	.L1675
+.L1681:
 	mov	x27, x2
 	ldr	w4, [x0, x1, lsl 2]
 	lsl	x5, x1, 2
@@ -12221,7 +12235,7 @@ sftl_write:
 	add	x1, x1, 1
 	ldr	w3, [x27]
 	cmp	w4, w3
-	beq	.L1670
+	beq	.L1677
 	mov	x2, 512
 	mov	w1, 0
 	str	x5, [x29, 160]
@@ -12242,21 +12256,21 @@ sftl_write:
 	mov	w0, 0
 	blr	x2
 	cmp	w21, 1
-	bls	.L1683
+	bls	.L1690
 	ldr	x2, [x27, 8]
 	add	w1, w20, w19
 	mov	w0, 0
 	blr	x2
-.L1683:
+.L1690:
 	ldr	w1, [x29, 204]
 	ldr	w0, [x29, 196]
 	add	w19, w19, w1
 	ldr	w1, [x29, 196]
 	add	w0, w21, w0
 	cmp	w1, 15
-	bhi	.L1677
+	bhi	.L1684
 	str	w0, [x29, 196]
-.L1676:
+.L1683:
 	adrp	x5, .LANCHOR186
 	mov	x2, 512
 	mov	w1, 0
@@ -12282,22 +12296,22 @@ sftl_write:
 	ldr	w3, [x29, 128]
 	cmp	w0, w28
 	ldr	x4, [x29, 120]
-	bls	.L1665
+	bls	.L1672
 	add	w1, w28, w19
 	ldr	x4, [x4, 8]
 	mov	w0, 0
 	udiv	w1, w1, w3
 	blr	x4
-.L1665:
+.L1672:
 	udiv	w5, w19, w28
 	mov	w4, 0
 	mov	w7, 61424
 	msub	w5, w5, w28, w19
 	sub	w6, w19, w5
-.L1666:
+.L1673:
 	ldr	w0, [x29, 204]
 	cmp	w0, w4
-	bhi	.L1667
+	bhi	.L1674
 	ldr	x0, [x29, 176]
 	add	x10, x26, :lo12:.LANCHOR105
 	mov	w27, 0
@@ -12317,9 +12331,9 @@ sftl_write:
 	sdiv	w0, w1, w28
 	msub	w0, w0, w28, w1
 	and	w0, w0, 65535
-.L1668:
+.L1675:
 	cmp	w27, w23
-	bcs	.L1672
+	bcs	.L1679
 	add	w1, w5, w27
 	sub	w8, w4, w0
 	add	w0, w0, w7
@@ -12343,27 +12357,27 @@ sftl_write:
 	ldp	w5, w7, [x29, 116]
 	ldr	x10, [x29, 128]
 	ldr	x6, [x29, 160]
-	bne	.L1669
-.L1672:
+	bne	.L1676
+.L1679:
 	ldr	x0, [x29, 176]
 	mov	x2, x24
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
-.L1670:
+.L1677:
 	ldr	w3, [x29, 192]
 	mov	w28, w1
 	cmp	w1, w3
-	bcc	.L1674
+	bcc	.L1681
 	ldr	w0, [x29, 200]
 	add	w0, w0, 1
 	str	w0, [x29, 200]
 	cmp	w0, 5
-	bls	.L1683
-	b	.L1677
-.L1658:
+	bls	.L1690
+	b	.L1684
+.L1665:
 	cmp	w0, 64
 	adrp	x21, .LANCHOR185
-	bne	.L1678
+	bne	.L1685
 	mov	w0, 262144
 	bl	ftl_malloc
 	str	x0, [x21, #:lo12:.LANCHOR185]
@@ -12373,47 +12387,47 @@ sftl_write:
 	adrp	x0, .LANCHOR186
 	str	x1, [x0, #:lo12:.LANCHOR186]
 	ldr	x0, [x21, #:lo12:.LANCHOR185]
-	cbz	x0, .L1679
-	cbz	x1, .L1679
+	cbz	x0, .L1686
+	cbz	x1, .L1686
 	adrp	x1, .LANCHOR184
 	mov	w2, 1
 	str	w2, [x1, #:lo12:.LANCHOR184]
 	mov	w2, 262144
 	mov	w1, 0
 	bl	ftl_memset
-.L1678:
+.L1685:
 	ldr	x0, [x21, #:lo12:.LANCHOR185]
 	cmp	w22, 63
-	bhi	.L1680
+	bhi	.L1687
 	mov	w1, 64
 	ldr	x3, [x29, 184]
 	sub	w1, w1, w22
 	sub	w2, w25, w1
 	ubfiz	x1, x1, 9, 25
 	add	x1, x3, x1
-.L1681:
+.L1688:
 	cmp	w20, 576
-	bls	.L1682
+	bls	.L1689
 	sub	w2, w2, w19
 	sub	w2, w2, #447
-.L1682:
+.L1689:
 	lsl	w2, w2, 9
 	bl	ftl_memcpy
-	b	.L1659
-.L1679:
+	b	.L1666
+.L1686:
 	adrp	x1, .LANCHOR187
 	adrp	x0, .LC116
 	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1678
-.L1680:
+	b	.L1685
+.L1687:
 	lsl	w1, w22, 7
 	mov	w2, w25
 	sub	w1, w1, #8192
 	add	x0, x0, x1, lsl 2
 	ldr	x1, [x29, 184]
-	b	.L1681
+	b	.L1688
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -12439,42 +12453,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.L1701:
+.L1708:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1707
+	bcc	.L1714
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1708:
+.L1715:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1709
+	bhi	.L1716
 	add	x21, x20, :lo12:.LANCHOR37
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1710:
+.L1717:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1714
+	bgt	.L1721
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1711
+	beq	.L1718
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L1712
+	cbz	w0, .L1719
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L1711:
+.L1718:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1710
-.L1707:
+	b	.L1717
+.L1714:
 	adrp	x2, .LANCHOR123
 	adrp	x0, .LANCHOR115
 	add	x19, x28, :lo12:.LANCHOR148
@@ -12486,7 +12500,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	beq	.L1702
+	beq	.L1709
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
 	madd	w27, w4, w22, w1
@@ -12501,14 +12515,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L1703:
+.L1710:
 	mov	w0, w27
 	add	w22, w22, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1701
-.L1702:
+	b	.L1708
+.L1709:
 	mov	w1, w22
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -12521,12 +12535,12 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	and	w19, w19, 65535
 	str	x0, [x29, 104]
-.L1704:
+.L1711:
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L1705
+	beq	.L1712
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x21]
@@ -12564,29 +12578,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1703
+	bne	.L1710
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L1704
-.L1705:
+	b	.L1711
+.L1712:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1704
-.L1709:
+	b	.L1711
+.L1716:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1708
-.L1712:
+	b	.L1715
+.L1719:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1713
+	bne	.L1720
 	strh	w19, [x21]
-	b	.L1711
-.L1713:
+	b	.L1718
+.L1720:
 	strh	w19, [x21, 4]
-.L1714:
+.L1721:
 	adrp	x0, .LANCHOR106
 	add	x19, x20, :lo12:.LANCHOR37
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
@@ -12643,9 +12657,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1721
+	cbz	w0, .L1728
 	bl	FtlMakeBbt
-.L1721:
+.L1728:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR118
 	mov	w6, 23752
@@ -12656,31 +12670,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1722:
+.L1729:
 	cmp	w0, w1
-	blt	.L1723
+	blt	.L1730
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1724:
+.L1731:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1725
+	bhi	.L1732
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1726
-.L1730:
+	bgt	.L1733
+.L1737:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1727:
+.L1734:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1731
+	bhi	.L1738
 	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -12697,28 +12711,28 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1732
+	ble	.L1739
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1732:
+.L1739:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1734
+	cbz	w1, .L1741
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1734
+	bge	.L1741
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1734:
+.L1741:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
@@ -12762,20 +12776,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1736:
+.L1743:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1737
+	cbnz	w1, .L1744
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1736
-.L1723:
+	b	.L1743
+.L1730:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12783,8 +12797,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1722
-.L1725:
+	b	.L1729
+.L1732:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12792,8 +12806,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1724
-.L1726:
+	b	.L1731
+.L1733:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12803,17 +12817,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1728:
+.L1735:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1730
+	bls	.L1737
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1728
-.L1731:
+	b	.L1735
+.L1738:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12821,8 +12835,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1727
-.L1737:
+	b	.L1734
+.L1744:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12842,20 +12856,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1738:
+.L1745:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1739
+	cbnz	w1, .L1746
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1738
-.L1739:
+	b	.L1745
+.L1746:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12881,11 +12895,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1740
+	cbnz	w0, .L1747
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1740:
+.L1747:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14576,19 +14590,19 @@ __func__.7450:
 	.size	__func__.7712, 15
 __func__.7712:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7730,"a",@progbits
+	.section	.rodata.__func__.7731,"a",@progbits
 	.align	3
 	.set	.LANCHOR153,. + 0
-	.type	__func__.7730, %object
-	.size	__func__.7730, 15
-__func__.7730:
+	.type	__func__.7731, %object
+	.size	__func__.7731, 15
+__func__.7731:
 	.string	"FlashProgPages"
-	.section	.rodata.__func__.7753,"a",@progbits
+	.section	.rodata.__func__.7755,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7753, %object
-	.size	__func__.7753, 17
-__func__.7753:
+	.type	__func__.7755, %object
+	.size	__func__.7755, 17
+__func__.7755:
 	.string	"FlashEraseBlocks"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC105:

commit f18b06fb49ee7a4d1fbc876e72d427ee23b0c31b
Author: Tony Xu <tony.xu@rock-chips.com>
Date:   Thu Sep 13 11:41:37 2018 +0800

    lib: optee_clientApi: Optimze the function write_keybox_to_secure_storage
    
    Change-Id: Icb88355494eb23c9403fc078adb5f2f46c4a870c
    Signed-off-by: Tony Xu <tony.xu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 29a81bd45b..ceeafb6f2b 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -357,7 +357,7 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 				rc =
 				write_keybox_to_secure_storage((u8 *)data,
 							       vhead->size);
-				if (!rc)
+				if (rc < 0)
 					return -EIO;
 #endif
 			}
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 166c00446f..fc7d788a82 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -13,6 +13,8 @@
 #include <stdlib.h>
 
 #define	BOOT_FROM_EMMC	(1 << 1)
+#define	WIDEVINE_TAG	"KBOX"
+#define	ATTESTATION_TAG	"ATTE"
 
 uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 			      TEEC_UUID uuid,
@@ -126,73 +128,41 @@ uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
 
 int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
 {
-	typedef struct VENDOR_DATA {
-		uint8_t tag[4];
-		uint32_t key_size;
-		uint32_t data_size;
-		uint8_t *all_data;
-	} VENDOR_DATA;
-
-	uint8_t *key = NULL;
-	uint8_t *data = NULL;
-	VENDOR_DATA tmp_data;
-
-	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
-	memcpy(tmp_data.tag, uboot_data, 4);
-	tmp_data.key_size = *(uboot_data + 4);
-	tmp_data.data_size = *(uboot_data + 8);
-	tmp_data.all_data = malloc(tmp_data.key_size + tmp_data.data_size);
-	memcpy(tmp_data.all_data, uboot_data + 12,
-	       tmp_data.key_size + tmp_data.data_size);
-
-	uint8_t widevine_tag[] = {'K', 'B', 'O', 'X'};
-	uint8_t tag[] = {0};
-
-	uint32_t object_id = 101;
-
-	TEEC_UUID tmp_uuid;
+	uint32_t key_size;
+	uint32_t data_size;
+	uint32_t object_id;
+	TEEC_Result ret;
+	int rc = 0;
 
-	if (memcmp(uboot_data, widevine_tag, 4) == 0) {
+	if (memcmp(uboot_data, WIDEVINE_TAG, 4) == 0) {
+		/* widevine keybox */
 		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
 			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
-		tmp_uuid = widevine_uuid;
-		memcpy(tag, uboot_data, 4);
-		printf("check tag success! %s\n", tag);
-	} else {
-		memcpy(tag, uboot_data, 4);
-		printf("check tag failed! %s\n", tag);
-	}
-
-	key = malloc(tmp_data.key_size);
-	if (!key) {
-		printf("Malloc key failed!!\n");
-		goto reboot;
-	}
+		object_id = 101;
+
+		key_size = *(uboot_data + 4);
+		data_size = *(uboot_data + 8);
+
+		ret = rk_send_keybox_to_ta((uint8_t *)&object_id,
+					   sizeof(uint32_t),
+					   widevine_uuid,
+					   uboot_data + 12,
+					   key_size,
+					   uboot_data + 12 + key_size,
+					   data_size);
+		if (ret == TEEC_SUCCESS) {
+			rc = 0;
+			printf("write widevine keybox to secure storage success\n");
+		} else {
+			rc = -EIO;
+			printf("write widevine keybox to secure storage fail\n");
+		}
+	} else if (memcmp(uboot_data, ATTESTATION_TAG, 4) == 0) {
+		/* attestation key */
 
-	data = malloc(tmp_data.data_size);
-	if (!data) {
-		printf("Malloc data failed!!\n");
-		goto reboot;
 	}
 
-	memcpy(key, tmp_data.all_data, tmp_data.key_size);
-	memcpy(data, tmp_data.all_data + tmp_data.key_size,
-	       tmp_data.data_size);
-
-	rk_send_keybox_to_ta((uint8_t *)&object_id, sizeof(uint32_t),
-			     tmp_uuid,
-			     key, tmp_data.key_size,
-			     data, tmp_data.data_size);
-reboot:
-	if (key)
-		free(key);
-	if (data)
-		free(data);
-	if (tmp_data.all_data)
-	free(tmp_data.all_data);
-
-	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
-	return 0;
+	return rc;
 }
 
 void test_optee(void)

commit 8fd483da849f3e4d28c23fc8d96e8461cb1dcd60
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 11 10:25:05 2018 +0800

    rockchip: dtsi: rk1808: sync from kernel
    
    base on commit 54e75c20:
        (clk: rockchip: rk1808: add clk ID for clk_rtc32k_frac)
    
    Change-Id: Iac1db11af0e6c9d54e66a1d634d890ef6999c7d9
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 8ede0da498..e7de04cfd2 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -1110,7 +1110,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff4c0000 0x0 0x100>;
 			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_PMU_GPIO0>, <&cru PCLK_GPIO0_PMU>;
+			clocks = <&cru PCLK_GPIO0_PMU>, <&cru DBCLK_PMU_GPIO0>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1122,7 +1122,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff690000 0x0 0x100>;
 			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO1>, <&cru PCLK_GPIO1>;
+			clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1134,7 +1134,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff6a0000 0x0 0x100>;
 			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO2>, <&cru PCLK_GPIO2>;
+			clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1146,7 +1146,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff6b0000 0x0 0x100>;
 			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO3>, <&cru PCLK_GPIO3>;
+			clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
@@ -1158,7 +1158,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x0 0xff6c0000 0x0 0x100>;
 			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru SCLK_GPIO4>, <&cru PCLK_GPIO4>;
+			clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
 			gpio-controller;
 			#gpio-cells = <2>;
 
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index 91a71dd0a1..3dd5c76d52 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -78,10 +78,10 @@
 #define SCLK_SARADC		77
 #define SCLK_EFUSE_S		78
 #define SCLK_EFUSE_NS		79
-#define SCLK_GPIO1		80
-#define SCLK_GPIO2		81
-#define SCLK_GPIO3		82
-#define SCLK_GPIO4		83
+#define DBCLK_GPIO1		80
+#define DBCLK_GPIO2		81
+#define DBCLK_GPIO3		82
+#define DBCLK_GPIO4		83
 #define SCLK_PWM0		84
 #define SCLK_PWM1		85
 #define SCLK_PWM2		86
@@ -105,11 +105,12 @@
 #define SCLK_UART0_PMU		104
 #define SCLK_PVTM_PMU		105
 #define SCLK_PMU_I2C0		106
-#define SCLK_PMU_GPIO0		107
+#define DBCLK_PMU_GPIO0		107
 #define SCLK_REF24M_PMU		108
 #define SCLK_USBPHY_REF		109
 #define SCLK_MIPIDSIPHY_REF	110
 #define SCLK_PCIEPHY_REF	111
+#define SCLK_RTC32K_FRAC	112
 
 /* aclk gates */
 #define ACLK_GIC_PRE		145
@@ -147,7 +148,6 @@
 #define HCLK_VOPLITE		203
 #define HCLK_RGA		204
 #define HCLK_ISP		205
-#define HCLK_CIF		205
 #define LSCLK_PCIE		206
 #define HCLK_HOST		207
 #define LSCLK_PERI		208
@@ -165,6 +165,7 @@
 #define MSCLK_CORE_NIU		220
 #define HSCLK_IMEM		221
 #define HCLK_HOST_ARB		222
+#define HCLK_CIF		223
 
 /* pclk gates */
 #define PCLK_DDR		250

commit ba09f8360d44fe2dbbe07c3f8735a01eb3412bd1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Oct 11 10:16:07 2018 +0800

    thermal: rockchip: Use incremental code table for rk1808
    
    Change-Id: Ifcd0785fefdb34d0b766dcc3b414d30329769218
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index e826d5e12f..0d48b8299a 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -170,42 +170,42 @@ struct rockchip_thermal_priv {
 };
 
 static const struct tsadc_table rk1808_code_table[] = {
-	{TSADCV2_DATA_MASK, -40000},
-	{641, -40000},
-	{633, -35000},
-	{625, -30000},
-	{617, -25000},
-	{609, -20000},
-	{601, -15000},
-	{593, -10000},
-	{585, -5000},
-	{577, 0},
-	{569, 5000},
-	{561, 10000},
-	{553, 15000},
-	{545, 20000},
-	{537, 25000},
-	{529, 30000},
-	{520, 35000},
-	{512, 40000},
-	{504, 45000},
-	{496, 50000},
-	{487, 55000},
-	{479, 60000},
-	{471, 65000},
-	{463, 70000},
-	{454, 75000},
-	{446, 80000},
-	{437, 85000},
-	{429, 90000},
-	{421, 95000},
-	{412, 100000},
-	{404, 105000},
-	{395, 110000},
-	{387, 115000},
-	{378, 120000},
-	{370, 125000},
-	{0, 125000},
+	{0, -40000},
+	{3455, -40000},
+	{3463, -35000},
+	{3471, -30000},
+	{3479, -25000},
+	{3487, -20000},
+	{3495, -15000},
+	{3503, -10000},
+	{3511, -5000},
+	{3519, 0},
+	{3527, 5000},
+	{3535, 10000},
+	{3543, 15000},
+	{3551, 20000},
+	{3559, 25000},
+	{3567, 30000},
+	{3576, 35000},
+	{3584, 40000},
+	{3592, 45000},
+	{3600, 50000},
+	{3609, 55000},
+	{3617, 60000},
+	{3625, 65000},
+	{3633, 70000},
+	{3642, 75000},
+	{3650, 80000},
+	{3659, 85000},
+	{3667, 90000},
+	{3675, 95000},
+	{3684, 100000},
+	{3692, 105000},
+	{3701, 110000},
+	{3709, 115000},
+	{3718, 120000},
+	{3726, 125000},
+	{TSADCV2_DATA_MASK, 125000},
 };
 
 static const struct tsadc_table rk3228_code_table[] = {
@@ -846,7 +846,7 @@ static const struct rockchip_tsadc_chip rk1808_tsadc_data = {
 		.id = rk1808_code_table,
 		.length = ARRAY_SIZE(rk1808_code_table),
 		.data_mask = TSADCV2_DATA_MASK,
-		.mode = ADC_DECREMENT,
+		.mode = ADC_INCREMENT,
 	},
 };
 

commit 550311a9cad449567d5c16f7852838a12cc76d17
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 14:15:56 2018 +0800

    rockchip: atags: add tag_atf_mem support
    
    it's mainly for U-Boot to reserve ATF memory region.
    
    Change-Id: I1039204c263adf91e84ec3b813094e4cf588013f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 67762d3a15..f7402861d0 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -16,6 +16,7 @@
 #define ATAG_DDR_MEM		0x54410052
 #define ATAG_TOS_MEM		0x54410053
 #define ATAG_RAM_PARTITION	0x54410054
+#define ATAG_ATF_MEM		0x54410055
 
 /* Tag size and offset */
 #define ATAGS_SIZE		(0x2000)	/* 8K */
@@ -84,6 +85,14 @@ struct tag_tos_mem {
 	u64 reserved[8];
 } __packed;
 
+struct tag_atf_mem {
+	u32 version;
+	u64 phy_addr;
+	u32 size;
+	u32 flags;
+	u32 reserved[3];
+} __packed;
+
 struct tag_ram_partition {
 	u32 version;
 	u32 count;
@@ -117,6 +126,7 @@ struct tag {
 		struct tag_ddr_mem	ddr_mem;
 		struct tag_tos_mem	tos_mem;
 		struct tag_ram_partition ram_part;
+		struct tag_atf_mem	atf_mem;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 865e724105..a8f0d99b2e 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -80,7 +80,8 @@ static int inline bad_magic(u32 magic)
 		(magic != ATAG_BOOTDEV) &&
 		(magic != ATAG_DDR_MEM) &&
 		(magic != ATAG_TOS_MEM) &&
-		(magic != ATAG_RAM_PARTITION));
+		(magic != ATAG_RAM_PARTITION) &&
+		(magic != ATAG_ATF_MEM));
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)
@@ -167,7 +168,9 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_RAM_PARTITION:
 		size = tag_size(tag_ram_partition);
 		break;
-
+	case ATAG_ATF_MEM:
+		size = tag_size(tag_atf_mem);
+		break;
 	};
 
 	if (atags_size_overflow(t, size)) {
@@ -330,6 +333,16 @@ void atags_print_tag(struct tag *t)
 			       t->u.ram_part.part[i].start,
 			       t->u.ram_part.part[i].size);
 		break;
+	case ATAG_ATF_MEM:
+		printf("[atf_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.atf_mem.version);
+		printf("  phy_addr = 0x%llx\n", t->u.atf_mem.phy_addr);
+		printf("      size = 0x%x\n", t->u.atf_mem.size);
+		for (i = 0; i < ARRAY_SIZE(t->u.atf_mem.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.atf_mem.reserved[i]);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -367,12 +380,14 @@ void atags_test(void)
 	struct tag_ddr_mem t_ddr_mem;
 	struct tag_tos_mem t_tos_mem;
 	struct tag_ram_partition t_ram_param;
+	struct tag_atf_mem t_atf_mem;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
 	memset(&t_ddr_mem, 0x3, sizeof(t_ddr_mem));
 	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
-	memset(&t_tos_mem, 0x0, sizeof(t_ram_param));
+	memset(&t_ram_param, 0x0, sizeof(t_ram_param));
+	memset(&t_atf_mem, 0x5, sizeof(t_atf_mem));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
@@ -402,6 +417,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_DDR_MEM, &t_ddr_mem);
 	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
+	atags_set_tag(ATAG_ATF_MEM, &t_atf_mem);
 
 	atags_print_all_tags();
 	atags_stat();

commit 503a09680021b57201875d637541ed691696cc7d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 19:42:58 2018 +0800

    rockchip: atags: add serial id
    
    Change-Id: I13342303a3103b3610eec932b014f9e99e148381
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index d07bf1b0a1..67762d3a15 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -46,7 +46,8 @@ struct tag_serial {
 	u64 addr;
 	u32 baudrate;
 	u32 m_mode;
-	u32 reserved[4];
+	u32 id;
+	u32 reserved[3];
 } __packed;
 
 struct tag_bootdev {

commit 4fb128796ae2640ab4a259d7316acdc8c3a6129b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 11 18:07:02 2018 +0800

    Revert "rockchip: px30: add fdt_high/initrd_high to avoid relocation"
    
    This reverts commit d6ceaafd1a113ad77916608ec7c45e6f4f7f2730.
    
    Change-Id: Ia039a3e7fd4ced0f01fbc9ec1d6d168e5b4fc20a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index abec304cba..cb26415285 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -49,8 +49,6 @@
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-	"fdt_high=0xffffffffffffffff\0" \
-	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 6d57a5ae712146627fe41d21d831e5bef5c98794
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 11 17:52:46 2018 +0800

    Revert "rockchip: rk1808: add fdt_high/initrd_high to avoid relocation"
    
    This reverts commit 15349ff5d02923ba1f6358cb0c778f9f6cec0cab.
    
    Change-Id: I4fb10b36ab949c87adef83ec7d568897e799dcd8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 276db39af0..b7a25f4bbc 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -36,8 +36,6 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-	"fdt_high=0xffffffffffffffff\0" \
-	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 6cb8d50f5d5e662c6d224d0a5a77e3cecf41361d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 10 18:03:06 2018 +0800

    arm: bootm-fdt: improve bi_dram[] print format
    
    print start and end address is more easily for users to understand.
    
    Change-Id: I42bcf5aaa0ea7ce4b988336069649e96117f13dd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index b693496d39..d564746cf2 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -51,8 +51,8 @@ int arch_fixup_fdt(void *blob)
 		size[bank] = bd->bi_dram[bank].size;
 		if (size[bank] == 0)
 			continue;
-		printf("Adding bank: start=0x%08llx, size=0x%08llx\n",
-		       start[bank], size[bank]);
+		printf("Adding bank: 0x%08llx - 0x%08llx (size: 0x%08llx)\n",
+		       start[bank], start[bank] + size[bank], size[bank]);
 
 #ifdef CONFIG_ARMV7_NONSEC
 		ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);

commit 34ae5fd272ecdeec8035380ec6aaaa6b6079ffb3
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Oct 10 10:35:19 2018 +0800

    configs: rk1808: enable display subsystem module
    
    Change-Id: I4b99e564fa17343580be0e0e407977dab835900a
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index c033b50164..a634a3bbc1 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -11,6 +11,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
+# CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
@@ -80,6 +81,12 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
 CONFIG_LZ4=y
 # CONFIG_EFI_LOADER is not set
 CONFIG_TEST_ROCKCHIP=y

commit ad3aa75a65245306f52b94a1ccc0a0cbc92be834
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Oct 10 10:29:50 2018 +0800

    drm/rockchip: vop: Add support rk1808 vop lite
    
    Change-Id: I9a17036597bc8a5bd6ae197d9306260374933503
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 3fb1886df8..6fec03a71c 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -42,6 +42,11 @@ static const struct rockchip_crtc rk3308_vop_data = {
 	.data = &rk3308_vop,
 };
 
+static const struct rockchip_crtc rk1808_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk1808_vop,
+};
+
 static const struct rockchip_crtc rk3288_vop_big_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &rk3288_vop_big,
@@ -101,6 +106,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3308-vop",
 		.data = (ulong)&rk3308_vop_data,
+	}, {
+		.compatible = "rockchip,rk1808-vop-lit",
+		.data = (ulong)&rk1808_vop_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop-big",
 		.data = (ulong)&rk3288_vop_big_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 6681446c7e..75edb4c16f 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -31,6 +31,7 @@ extern const struct vop_data rk3036_vop;
 extern const struct vop_data px30_vop_lit;
 extern const struct vop_data px30_vop_big;
 extern const struct vop_data rk3308_vop;
+extern const struct vop_data rk1808_vop;
 extern const struct vop_data rk3288_vop_big;
 extern const struct vop_data rk3288_vop_lit;
 extern const struct vop_data rk3368_vop;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 8784138cbf..b0fa315537 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -658,6 +658,20 @@ const struct vop_data rk3308_vop = {
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };
 
+static const struct vop_grf_ctrl rk1808_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK1808_GRF_PD_VO_CON1, 0x1, 4),
+};
+
+const struct vop_data rk1808_vop = {
+	.version = VOP_VERSION(2, 8),
+	.max_output = {1920, 1080},
+	.ctrl = &px30_ctrl_data,
+	.grf_ctrl = &rk1808_grf_ctrl,
+	.win = &rk3366_win1_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
+
 const struct vop_data rv1108_vop = {
 	.version = VOP_VERSION(2, 4),
 	.max_output = {1920, 1080},
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index f300e7be63..18ee5d83f9 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -959,4 +959,9 @@
 #define PX30_AFBCD0_AXI_CTRL			0x00250
 #define PX30_GRF_PD_VO_CON1			0x00438
 /* px30 register definition end */
+
+/* rk1808 register definition start*/
+#define RK1808_GRF_PD_VO_CON1			0x00000444
+/* rk1808 register definition end*/
+
 #endif /* _ROCKCHIP_VOP_REG_H */

commit 1cd89291afa7d8a78e05895cb70927a36562bf7d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 9 14:58:01 2018 +0800

    rockchip: atags: add atags existence verify before get
    
    Change-Id: I939b1ff1a46c888fed928fe18f5298fdcb79215d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 58fbc654f4..865e724105 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -201,6 +201,9 @@ struct tag *atags_get_tag(u32 magic)
 {
 	struct tag *t;
 
+	if (!atags_is_available())
+		return NULL;
+
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (bad_magic(t->hdr.magic)) {
 #if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
@@ -266,7 +269,7 @@ void atags_print_tag(struct tag *t)
 		printf("   version = 0x%x\n", t->u.serial.version);
 		printf("    enable = 0x%x\n", t->u.serial.enable);
 		printf("      addr = 0x%llx\n", t->u.serial.addr);
-		printf("  baudrate = 0x%x\n", t->u.serial.baudrate);
+		printf("  baudrate = %d\n", t->u.serial.baudrate);
 		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
 		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);

commit 6b9c0415e61f8669c7996d049555124b00aaac05
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Oct 10 10:12:20 2018 +0800

    video/drm: rgb: Add support rk1808
    
    Change-Id: I9e7636fadb10b9652ac69151a6c901735b90bc46
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index ce737953ad..9d58987124 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -16,38 +16,55 @@
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 
-#define PX30_GRF_PD_VO_CON1	0x0438
-#define PX30_LCDC_DCLK_INV(v)	HIWORD_UPDATE(v, 4, 4)
-#define PX30_RGB_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
-#define PX30_RGB_VOP_SEL(v)	HIWORD_UPDATE(v, 2, 2)
+#define PX30_GRF_PD_VO_CON1		0x0438
+#define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
+#define PX30_RGB_VOP_SEL(v)		HIWORD_UPDATE(v, 2, 2)
 
-struct rockchip_rgb_priv {
+#define RK1808_GRF_PD_VO_CON1		0x0444
+#define RK1808_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
+
+struct rockchip_rgb;
+
+struct rockchip_rgb_funcs {
+	void (*enable)(struct rockchip_rgb *rgb, int pipe);
+	void (*disable)(struct rockchip_rgb *rgb);
+};
+
+struct rockchip_rgb {
 	struct regmap *grf;
+	const struct rockchip_rgb_funcs *funcs;
 };
 
-static int rockchip_rgb_enable(struct display_state *state)
+static inline struct rockchip_rgb *state_to_rgb(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct rockchip_rgb_priv *priv = dev_get_priv(conn_state->dev);
+
+	return dev_get_priv(conn_state->dev);
+}
+
+static int rockchip_rgb_connector_enable(struct display_state *state)
+{
+	struct rockchip_rgb *rgb = state_to_rgb(state);
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
 
-	if (!IS_ERR_OR_NULL(priv->grf)) {
-		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
-			     PX30_RGB_VOP_SEL(pipe));
-		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
-			     PX30_RGB_SYNC_BYPASS(1));
-	}
+	if (rgb->funcs && rgb->funcs->enable)
+		rgb->funcs->enable(rgb, pipe);
 
 	return 0;
 }
 
-static int rockchip_rgb_disable(struct display_state *state)
+static int rockchip_rgb_connector_disable(struct display_state *state)
 {
+	struct rockchip_rgb *rgb = state_to_rgb(state);
+
+	if (rgb->funcs && rgb->funcs->disable)
+		rgb->funcs->disable(rgb);
+
 	return 0;
 }
 
-static int rockchip_rgb_init(struct display_state *state)
+static int rockchip_rgb_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 
@@ -71,41 +88,94 @@ static int rockchip_rgb_init(struct display_state *state)
 	return 0;
 }
 
-static const struct rockchip_connector_funcs rockchip_rgb_funcs = {
-	.init = rockchip_rgb_init,
-	.enable = rockchip_rgb_enable,
-	.disable = rockchip_rgb_disable,
+static const struct rockchip_connector_funcs rockchip_rgb_connector_funcs = {
+	.init = rockchip_rgb_connector_init,
+	.enable = rockchip_rgb_connector_enable,
+	.disable = rockchip_rgb_connector_disable,
 };
 
 static int rockchip_rgb_probe(struct udevice *dev)
 {
-	struct rockchip_rgb_priv *priv = dev_get_priv(dev);
+	struct rockchip_rgb *rgb = dev_get_priv(dev);
+	const struct rockchip_connector *connector =
+		(const struct rockchip_connector *)dev_get_driver_data(dev);
 
-	priv->grf = syscon_get_regmap(dev_get_parent(dev));
+	rgb->funcs = connector->data;
+	rgb->grf = syscon_get_regmap(dev_get_parent(dev));
 
 	return 0;
 }
 
-static const struct rockchip_connector rockchip_rgb_data = {
-	 .funcs = &rockchip_rgb_funcs,
+static void px30_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_VOP_SEL(pipe));
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_DATA_SYNC_BYPASS(1));
+}
+
+static void px30_rgb_disable(struct rockchip_rgb *rgb)
+{
+	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1,
+		     PX30_RGB_DATA_SYNC_BYPASS(0));
+}
+
+static const struct rockchip_rgb_funcs px30_rgb_funcs = {
+	.enable = px30_rgb_enable,
+	.disable = px30_rgb_disable,
+};
+
+static const struct rockchip_connector px30_rgb_driver_data = {
+	 .funcs = &rockchip_rgb_connector_funcs,
+	 .data = &px30_rgb_funcs,
+};
+
+static void rk1808_rgb_enable(struct rockchip_rgb *rgb, int pipe)
+{
+	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
+		     RK1808_RGB_DATA_SYNC_BYPASS(1));
+}
+
+static void rk1808_rgb_disable(struct rockchip_rgb *rgb)
+{
+	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
+		     RK1808_RGB_DATA_SYNC_BYPASS(0));
+}
+
+static const struct rockchip_rgb_funcs rk1808_rgb_funcs = {
+	.enable = rk1808_rgb_enable,
+	.disable = rk1808_rgb_disable,
+};
+
+static const struct rockchip_connector rk1808_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
+	.data = &rk1808_rgb_funcs,
+};
+
+static const struct rockchip_connector rockchip_rgb_driver_data = {
+	.funcs = &rockchip_rgb_connector_funcs,
 };
 
 static const struct udevice_id rockchip_rgb_ids[] = {
 	{
 		.compatible = "rockchip,px30-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&px30_rgb_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk1808-rgb",
+		.data = (ulong)&rk1808_rgb_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3066-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&rockchip_rgb_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3308-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&rockchip_rgb_driver_data,
 	},
 	{
 		.compatible = "rockchip,rv1108-rgb",
-		.data = (ulong)&rockchip_rgb_data,
+		.data = (ulong)&rockchip_rgb_driver_data,
 	},
 	{}
 };
@@ -115,5 +185,5 @@ U_BOOT_DRIVER(rockchip_rgb) = {
 	.id = UCLASS_DISPLAY,
 	.of_match = rockchip_rgb_ids,
 	.probe = rockchip_rgb_probe,
-	.priv_auto_alloc_size = sizeof(struct rockchip_rgb_priv),
+	.priv_auto_alloc_size = sizeof(struct rockchip_rgb),
 };

commit edfa0430072456d0cd44fe11cac125191e2ccb1f
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Tue Sep 18 17:26:08 2018 +0800

    rockchip: dts: rk3326: amend dmc node name
    
    Make sure dmc node name of uboot's dts is the same as kernel,
    so that uboot can update dmc node when do device binding after
    uboot relocate.
    
    Change-Id: I1e56e92433545470533260f10b713da3b6494970
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index 278a8ba6a0..fca2dac8be 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -17,7 +17,7 @@
 		stdout-path = &uart2;
 	};
 
-	dmc: dmc@20004000 {
+	dmc: dmc {
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,px30-dmc", "syscon";
 		reg = <0x0 0xff2a0000 0x0 0x1000>;

commit a43995868a8d4c4577cdef9e9c62aabfd1767086
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Sep 13 18:23:30 2018 +0800

    drivers: rknand: register vendor ops interface
    
    Change-Id: Ia82a16f9fbc2c4600b4721018bf1b34ad0e85b51
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
index 533e25ab13..49347d9a94 100644
--- a/drivers/rknand/rknand.c
+++ b/drivers/rknand/rknand.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <asm/arch/vendor.h>
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -93,6 +94,34 @@ ulong rknand_berase(struct udevice *udev, lbaint_t start,
 	return blkcnt;
 }
 
+int rkftl_nand_vendor_read(struct blk_desc *dev_desc,
+			   u32 index,
+			   u32 n_sec,
+			   void *p_data)
+{
+	int ret;
+
+	ret = ftl_vendor_read(index, n_sec, p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
+int rkftl_nand_vendor_write(struct blk_desc *dev_desc,
+			    u32 index,
+			    u32 n_sec,
+			    void *p_data)
+{
+	int ret;
+
+	ret = ftl_vendor_write(index, n_sec, p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
 int rknand_scan_namespace(void)
 {
 	struct uclass *uc;
@@ -162,6 +191,10 @@ static int rockchip_nand_probe(struct udevice *udev)
 		ndev->read = ftl_read;
 		ndev->write = ftl_write;
 		ndev->erase = ftl_discard;
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+		flash_vendor_dev_ops_register(rkftl_nand_vendor_read,
+					      rkftl_nand_vendor_write);
+#endif
 	}
 
 	return ret;
diff --git a/drivers/rknand/rknand.h b/drivers/rknand/rknand.h
index 5ab9940b39..10534943dd 100644
--- a/drivers/rknand/rknand.h
+++ b/drivers/rknand/rknand.h
@@ -58,5 +58,6 @@ u32 ftl_read(u8 lun, u32 start, u32 blkcnt, void *buffer);
 u32 ftl_discard(u8 lun, u32 start, u32 blkcnt);
 u32 ftl_get_density(u8 lun);
 int rk_ftl_init(u32 *reg_base);
-
+u32 ftl_vendor_read(u32 index, u32 nsec, void *buf);
+u32 ftl_vendor_write(u32 index, u32 nsec, void *buf);
 #endif /* __DRIVER_RKNAND_H__ */

commit 6a188a49ffaa7951ca54d90d75afb6cface59ff4
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Sep 13 18:20:12 2018 +0800

    drivers: rknand: rkftl support spectek L84C/L84D/L05B NAND FLASH
    
    1. support spectek L84C/L84D/L05B NAND FLASH
    2. add vendor storage api
    
    Change-Id: Ib11cf39bd655032eb3f1fd164edc729a54a975b1
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index ebf23e322e..b16e02e93b 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-08-10
+ * date: 2018-09-5
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -4237,7 +4237,7 @@ ftl_map_blk_alloc_new_blk:
 	cmp	r3, r5
 	bhi	.L603
 	ldr	r1, .L605+8
-	mov	r2, #628
+	movw	r2, #629
 	ldr	r0, .L605+12
 	bl	printf
 	ldr	r1, .L605+16
@@ -4300,7 +4300,7 @@ select_l2p_ram_region:
 	bcc	.L616
 	cmp	r4, r2
 	bcc	.L609
-	movw	r2, #863
+	movw	r2, #855
 	ldr	r1, .L617+12
 	ldr	r0, .L617+16
 	bl	printf
@@ -4543,7 +4543,7 @@ make_superblock:
 	cmp	r2, r3
 	bcc	.L648
 	ldr	r1, .L660+4
-	movw	r2, #2613
+	mov	r2, #2544
 	ldr	r0, .L660+8
 	bl	printf
 	ldr	r1, .L660+12
@@ -5100,15 +5100,15 @@ FtlGcUpdatePage:
 	.word	.LANCHOR111
 	.word	.LANCHOR112
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshBlock
+	.global	FtlGcRefreshOpenBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	ip, .L732+12
@@ -5157,21 +5157,68 @@ FtlGcRefreshBlock:
 	.word	.LANCHOR115
 	.word	.LANCHOR116
 	.word	.LANCHOR113
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshOpenBlock
+	.global	FtlGcRefreshBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcRefreshOpenBlock, %function
-FtlGcRefreshOpenBlock:
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	FtlGcRefreshBlock
-	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	ldr	ip, .L744+12
+	push	{r4, r5, r6, r7, lr}
+	ldrh	lr, [ip]
+	cmp	lr, r0
+	beq	.L742
+	ldr	r6, .L744
+	ldrh	r7, [r6]
+	cmp	r0, r7
+	beq	.L742
+	ldr	r4, .L744+4
+	ldrh	r5, [r4]
+	cmp	r0, r5
+	beq	.L742
+	ldr	r2, .L744+8
+	ldrh	r1, [r2]
+	cmp	r0, r1
+	beq	.L742
+	movw	r3, #65535
+	cmp	lr, r3
+	bne	.L736
+	strh	r0, [ip]	@ movhi
+.L742:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, pc}
+.L736:
+	cmp	r7, r3
+	bne	.L737
+	strh	r0, [r6]	@ movhi
+	b	.L742
+.L737:
+	cmp	r5, r3
+	bne	.L738
+	strh	r0, [r4]	@ movhi
+	b	.L742
+.L738:
+	cmp	r1, r3
+	bne	.L743
+	strh	r0, [r2]	@ movhi
+	b	.L742
+.L743:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, pc}
+.L745:
+	.align	2
+.L744:
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR113
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
 	.global	FtlGcMarkBadPhyBlk
@@ -5188,44 +5235,44 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L743
+	ldr	r3, .L754
 	ldr	r3, [r3]
-	cbz	r3, .L736
-	ldr	r3, .L743+4
+	cbz	r3, .L747
+	ldr	r3, .L754+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #39
 	itt	hi
 	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L736:
-	ldr	r2, .L743+8
+.L747:
+	ldr	r2, .L754+8
 	movs	r1, #0
-	ldr	r5, .L743+12
+	ldr	r5, .L754+12
 	ldrh	r3, [r2]
-.L737:
+.L748:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L739
+	bhi	.L750
 	cmp	r3, #15
 	itttt	ls
 	addls	r1, r3, #1
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L743+12
+	ldrls	r2, .L754+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L738
-.L739:
+	b	.L749
+.L750:
 	adds	r1, r1, #1
 	add	r0, r5, r1, lsl #1
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L737
-.L738:
+	bne	.L748
+.L749:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L744:
+.L755:
 	.align	2
-.L743:
+.L754:
 	.word	.LANCHOR28
 	.word	.LANCHOR79
 	.word	.LANCHOR117
@@ -5242,22 +5289,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L751
+	ldr	r3, .L762
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L746
-	ldr	r2, .L751+4
+	cbz	r3, .L757
+	ldr	r2, .L762+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L746
-	ldr	r4, .L751+8
+	bne	.L757
+	ldr	r4, .L762+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L751+12
+	ldr	r3, .L762+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -5265,12 +5312,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L746:
+.L757:
 	movs	r0, #0
 	pop	{r4, pc}
-.L752:
+.L763:
 	.align	2
-.L751:
+.L762:
 	.word	.LANCHOR117
 	.word	.LANCHOR113
 	.word	.LANCHOR119
@@ -5288,17 +5335,17 @@ flash_boot_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L755
+	ldr	r3, .L766
 	ldr	r2, [r3]
-	ldr	r3, .L755+4
+	ldr	r3, .L766+4
 	cmp	r2, r3
-	bne	.L753
+	bne	.L764
 	b	flash_enter_slc_mode
-.L753:
+.L764:
 	bx	lr
-.L756:
+.L767:
 	.align	2
-.L755:
+.L766:
 	.word	.LANCHOR29
 	.word	1446522928
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
@@ -5314,17 +5361,17 @@ flash_boot_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L759
+	ldr	r3, .L770
 	ldr	r2, [r3]
-	ldr	r3, .L759+4
+	ldr	r3, .L770+4
 	cmp	r2, r3
-	bne	.L757
+	bne	.L768
 	b	flash_exit_slc_mode
-.L757:
+.L768:
 	bx	lr
-.L760:
+.L771:
 	.align	2
-.L759:
+.L770:
 	.word	.LANCHOR29
 	.word	1446522928
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
@@ -5338,7 +5385,7 @@ flash_boot_exit_slc_mode:
 FW_FlashBlockErase.constprop.41:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L762
+	ldr	r3, .L773
 	push	{r4, lr}
 	mov	r4, r0
 	movs	r0, #0
@@ -5356,9 +5403,9 @@ FW_FlashBlockErase.constprop.41:
 	bl	flash_boot_exit_slc_mode
 	uxtb	r0, r1
 	pop	{r4, pc}
-.L763:
+.L774:
 	.align	2
-.L762:
+.L773:
 	.word	.LANCHOR18
 	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
@@ -5388,54 +5435,54 @@ BuildFlashLsbPageTable:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r4, r1
-	cbnz	r0, .L766
-	ldr	r3, .L803
-.L767:
+	cbnz	r0, .L777
+	ldr	r3, .L814
+.L778:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
 	adds	r0, r0, #1
 	cmp	r0, #256
-	bne	.L767
-.L773:
+	bne	.L778
+.L784:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L803+4
+	ldr	r0, .L814+4
 	uxth	r4, r4
 	bl	ftl_memset
-	ldr	r1, .L803
+	ldr	r1, .L814
 	movs	r3, #0
-	ldr	r0, .L803+4
-.L768:
+	ldr	r0, .L814+4
+.L779:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L790
+	bhi	.L801
 	pop	{r4, pc}
-.L766:
+.L777:
 	cmp	r0, #1
-	bne	.L769
-	ldr	r1, .L803
+	bne	.L780
+	ldr	r1, .L814
 	movs	r3, #0
-.L772:
+.L783:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L770
+	bls	.L781
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L770:
+.L781:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L772
-	b	.L773
-.L769:
+	bne	.L783
+	b	.L784
+.L780:
 	cmp	r0, #2
-	bne	.L774
-	ldr	r1, .L803
+	bne	.L785
+	ldr	r1, .L814
 	movs	r2, #0
-.L776:
+.L787:
 	uxth	r3, r2
 	cmp	r2, #1
 	ittt	hi
@@ -5445,34 +5492,34 @@ BuildFlashLsbPageTable:
 	strh	r3, [r1, r2, lsl #1]	@ movhi
 	adds	r2, r2, #1
 	cmp	r2, #256
-	bne	.L776
-	b	.L773
-.L774:
+	bne	.L787
+	b	.L784
+.L785:
 	cmp	r0, #3
-	bne	.L777
-	ldr	r1, .L803
+	bne	.L788
+	ldr	r1, .L814
 	movs	r3, #0
-.L780:
+.L791:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L778
+	bls	.L789
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
 	uxth	r2, r2
-.L778:
+.L789:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #256
-	bne	.L780
-	b	.L773
-.L777:
+	bne	.L791
+	b	.L784
+.L788:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L781
-	ldr	r2, .L803
+	bne	.L792
+	ldr	r2, .L814
 	strh	r3, [r2]	@ movhi
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
@@ -5487,7 +5534,7 @@ BuildFlashLsbPageTable:
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
 	strh	r3, [r2, #14]!	@ movhi
-.L783:
+.L794:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
@@ -5497,56 +5544,56 @@ BuildFlashLsbPageTable:
 	uxth	r3, r3
 	strh	r1, [r2, #2]!	@ movhi
 	cmp	r3, #256
-	bne	.L783
-	b	.L773
-.L781:
+	bne	.L794
+	b	.L784
+.L792:
 	cmp	r0, #5
-	bne	.L784
-	ldr	r2, .L803
-.L785:
+	bne	.L795
+	ldr	r2, .L814
+.L796:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	cmp	r3, #16
-	bne	.L785
-	ldr	r2, .L803+8
-.L786:
+	bne	.L796
+	ldr	r2, .L814+8
+.L797:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
 	cmp	r3, #496
-	bne	.L786
-	b	.L773
-.L784:
+	bne	.L797
+	b	.L784
+.L795:
 	cmp	r0, #6
-	bne	.L773
-	ldr	r0, .L803
+	bne	.L784
+	ldr	r0, .L814
 	mov	r1, r3
-.L789:
+.L800:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L787
+	bls	.L798
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L787:
+.L798:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
 	adds	r1, r1, #1
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L789
-	b	.L773
-.L790:
+	bne	.L800
+	b	.L784
+.L801:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L768
-.L804:
+	b	.L779
+.L815:
 	.align	2
-.L803:
+.L814:
 	.word	.LANCHOR16
 	.word	.LANCHOR120
 	.word	.LANCHOR16+30
@@ -5564,92 +5611,92 @@ FlashDieInfoInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r2, .L823
-	ldr	r4, .L823+4
+	ldr	r2, .L834
+	ldr	r4, .L834+4
 	strb	r3, [r2]
 	str	r2, [sp]
 	strb	r3, [r4]
-	ldr	r3, .L823+8
-	ldr	r7, .L823+12
+	ldr	r3, .L834+8
+	ldr	r7, .L834+12
 	ldrh	r3, [r3, #10]
 	cmp	r3, #256
-	bls	.L806
+	bls	.L817
 	mov	r3, #512
-.L822:
+.L833:
 	movs	r2, #8
 	movs	r1, #0
-	ldr	r0, .L823+16
+	ldr	r0, .L834+16
 	movs	r6, #0
 	str	r3, [r7]
 	bl	ftl_memset
 	movs	r2, #32
 	movs	r1, #0
-	ldr	r0, .L823+20
+	ldr	r0, .L834+20
 	bl	ftl_memset
 	movs	r2, #128
 	movs	r1, #0
-	ldr	r0, .L823+24
+	ldr	r0, .L834+24
 	bl	ftl_memset
-	ldr	r3, .L823+28
-	ldr	fp, .L823+36
+	ldr	r3, .L834+28
+	ldr	fp, .L834+36
 	ldr	r5, [r3]
-	ldr	r3, .L823+16
+	ldr	r3, .L834+16
 	ldrb	r10, [r5]	@ zero_extendqisi2
 	add	r8, r5, #1
-.L810:
+.L821:
 	mov	r2, r10
 	add	r1, fp, r6, lsl #3
 	mov	r0, r8
 	str	r3, [sp, #4]
 	bl	FlashMemCmp8
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L809
+	cbnz	r0, .L820
 	ldrb	r2, [r4]	@ zero_extendqisi2
-	ldr	r1, .L823+20
+	ldr	r1, .L834+20
 	strb	r6, [r3, r2]
 	str	r0, [r1, r2, lsl #2]
 	adds	r1, r2, #1
 	strb	r1, [r4]
-.L809:
+.L820:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L810
+	bne	.L821
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	ldr	r2, [sp]
 	strb	r3, [r2]
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L811
-.L815:
+	beq	.L822
+.L826:
 	ldrh	r2, [r5, #14]
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
 	ldrb	r2, [r5, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L823+32
+	ldr	r2, .L834+32
 	strh	r3, [r2]	@ movhi
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L806:
+.L817:
 	cmp	r3, #128
 	it	hi
 	movhi	r3, #256
-	b	.L822
-.L811:
+	b	.L833
+.L822:
 	ldr	fp, [r7]
 	movs	r6, #0
-	ldr	r7, .L823+20
-	ldr	r3, .L823+16
-.L814:
+	ldr	r7, .L834+20
+	ldr	r3, .L834+16
+.L825:
 	str	r3, [sp]
 	mov	r2, r10
-	ldr	r3, .L823+36
+	ldr	r3, .L834+36
 	mov	r0, r8
 	add	r1, r3, r6, lsl #3
 	bl	FlashMemCmp8
 	ldr	r3, [sp]
-	cbnz	r0, .L812
+	cbnz	r0, .L823
 	ldrh	r2, [r5, #14]
 	ldrb	r1, [r4]	@ zero_extendqisi2
 	and	r0, r2, #65280
@@ -5658,21 +5705,21 @@ FlashDieInfoInit:
 	muls	r2, r0, r2
 	str	r2, [r7, r1, lsl #2]
 	ldrb	r0, [r5, #23]	@ zero_extendqisi2
-	cbz	r0, .L813
+	cbz	r0, .L824
 	lsls	r2, r2, #1
 	str	r2, [r7, r1, lsl #2]
-.L813:
+.L824:
 	adds	r2, r1, #1
 	strb	r6, [r3, r1]
 	strb	r2, [r4]
-.L812:
+.L823:
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L814
-	b	.L815
-.L824:
+	bne	.L825
+	b	.L826
+.L835:
 	.align	2
-.L823:
+.L834:
 	.word	.LANCHOR121
 	.word	.LANCHOR25
 	.word	.LANCHOR31
@@ -5700,10 +5747,10 @@ ReadFlashInfo:
 	movs	r1, #0
 	mov	r4, r0
 	bl	ftl_memset
-	ldr	r3, .L828
+	ldr	r3, .L839
 	movs	r2, #0
 	ldr	r1, [r3]
-	ldr	r3, .L828+4
+	ldr	r3, .L839+4
 	ldrb	r0, [r1, #9]	@ zero_extendqisi2
 	ldr	r3, [r3]
 	smulbb	r3, r3, r0
@@ -5711,10 +5758,10 @@ ReadFlashInfo:
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L828+8
+	ldr	r3, .L839+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L828+12
+	ldr	r3, .L839+12
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	strb	r5, [r4]
 	ldrb	r5, [r3, #1]	@ zero_extendqisi2
@@ -5728,28 +5775,28 @@ ReadFlashInfo:
 	movs	r3, #32
 	strb	r3, [r4, #8]
 	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L828+16
+	ldr	r0, .L839+16
 	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L828+20
+	ldr	r3, .L839+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L826:
+.L837:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L827
+	bhi	.L838
 	pop	{r4, r5, r6, pc}
-.L827:
+.L838:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L826
-.L829:
+	b	.L837
+.L840:
 	.align	2
-.L828:
+.L839:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
 	.word	.LANCHOR33
@@ -5768,35 +5815,35 @@ ReadFlashInfo:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L836
+	ldr	r3, .L847
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r5, r0
-	ldr	r7, .L836+4
+	ldr	r7, .L847+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L836+20
+	ldr	r8, .L847+20
 	mov	r0, r6
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L833:
+.L844:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L830
+	beq	.L841
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L832
+	bhi	.L843
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L836+8
+	ldr	r0, .L847+8
 	bl	printf
-	ldr	r1, .L836+12
-	ldr	r0, .L836+16
+	ldr	r1, .L847+12
+	ldr	r0, .L847+16
 	bl	printf
-.L832:
+.L843:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
 	cmp	r5, r4
@@ -5806,12 +5853,12 @@ FtlBbt2Bitmap:
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L833
-.L830:
+	bne	.L844
+.L841:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L837:
+.L848:
 	.align	2
-.L836:
+.L847:
 	.word	.LANCHOR123
 	.word	.LANCHOR51
 	.word	.LC5
@@ -5831,7 +5878,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L839
+	ldr	r0, .L850
 	movw	r3, #65535
 	movs	r2, #16
 	movs	r1, #255
@@ -5840,9 +5887,9 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	ftl_memset
-.L840:
+.L851:
 	.align	2
-.L839:
+.L850:
 	.word	.LANCHOR75
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
@@ -5856,7 +5903,7 @@ FtlBbtMemInit:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L842
+	ldr	r3, .L853
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -5869,9 +5916,9 @@ FtlFreeSysBlkQueueInit:
 	bl	ftl_memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L843:
+.L854:
 	.align	2
-.L842:
+.L853:
 	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
@@ -5890,88 +5937,96 @@ ftl_free_no_use_map_blk:
 	mov	r4, r0
 	ldr	r5, [r0, #20]
 	movs	r1, #0
-	ldr	r10, [r0, #12]
+	ldr	r7, [r0, #12]
 	lsls	r2, r2, #1
 	ldr	r6, [r0, #24]
 	mov	r0, r5
 	bl	ftl_memset
 	movs	r3, #0
-.L845:
+.L856:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L849
-	ldrh	r3, [r5]
+	bhi	.L860
+	ldr	r3, .L875
 	movs	r6, #0
-	ldr	r2, .L858
-	mov	fp, r6
-.L850:
-	ldrh	r0, [r4, #10]
-	uxth	r1, r6
-	cmp	r0, r1
-	bhi	.L854
-	mov	r0, fp
+	mov	r10, r6
+	ldrh	r2, [r3]
+	ldrh	r3, [r4]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	mov	r2, r6
+	ldrh	fp, [r5]
+.L861:
+	ldrh	r3, [r4, #10]
+	uxth	ip, r6
+	cmp	r3, ip
+	bhi	.L865
+	mov	r0, r10
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L849:
+.L860:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
 	movs	r2, #0
 	ubfx	r1, r1, #10, #16
-.L846:
-	ldrh	r7, [r4, #10]
+.L857:
+	ldrh	ip, [r4, #10]
 	uxth	r0, r2
-	cmp	r7, r0
-	bhi	.L848
+	cmp	ip, r0
+	bhi	.L859
 	adds	r3, r3, #1
-	b	.L845
-.L848:
+	b	.L856
+.L859:
 	uxth	r0, r2
+	ldrh	ip, [r7, r0, lsl #1]
+	cmp	ip, r1
+	bne	.L858
+	cbz	r1, .L858
+	ldrh	ip, [r5, r0, lsl #1]
+	add	ip, ip, #1
+	strh	ip, [r5, r0, lsl #1]	@ movhi
+.L858:
 	adds	r2, r2, #1
-	ldrh	r7, [r10, r0, lsl #1]
-	cmp	r7, r1
-	ittt	eq
-	ldrheq	r7, [r5, r0, lsl #1]
-	addeq	r7, r7, #1
-	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L846
-.L854:
-	ldrh	r0, [r4]
-	uxth	r7, r6
-	cmp	r0, r1
-	bne	.L851
-	ldrh	r0, [r2]
-	ldrh	ip, [r4, #2]
-	cmp	ip, r0
-	it	cc
-	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L851:
-	ldrh	r8, [r5, r7, lsl #1]
-	cmp	r3, r8
-	itt	hi
-	movhi	fp, r1
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L853
-	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L853
+	b	.L857
+.L865:
+	uxth	r1, r6
+	ldrh	r3, [r5, r1, lsl #1]
+	lsl	r8, r1, #1
+	cmp	fp, r3
+	bls	.L862
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cbnz	r0, .L863
+.L864:
+	adds	r6, r6, #1
+	b	.L861
+.L862:
+	cmp	r3, #0
+	bne	.L864
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cmp	r0, #0
+	beq	.L864
+.L866:
 	movs	r1, #1
 	str	r2, [sp, #4]
-	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-	strh	r8, [r10, r7, lsl #1]	@ movhi
 	ldr	r2, [sp, #4]
-	ldrh	r1, [r4, #8]
-	ldr	r3, [sp]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L853:
-	adds	r6, r6, #1
-	b	.L850
-.L859:
+	strh	r2, [r8]	@ movhi
+	ldrh	r3, [r4, #8]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L864
+.L863:
+	mov	r10, ip
+	mov	fp, r3
+	cmp	r3, #0
+	beq	.L866
+	b	.L864
+.L876:
 	.align	2
-.L858:
+.L875:
 	.word	.LANCHOR54
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
@@ -5987,14 +6042,14 @@ FtlL2PDataInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r5, .L863
-	ldr	r4, .L863+4
+	ldr	r5, .L880
+	ldr	r4, .L880+4
 	ldr	r2, [r5]
-	ldr	r7, .L863+8
-	ldr	r6, .L863+12
+	ldr	r7, .L880+8
+	ldr	r6, .L880+12
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	ldr	r8, .L863+44
+	ldr	r8, .L880+44
 	bl	ftl_memset
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -6002,7 +6057,7 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L863+16
+	ldr	r3, .L880+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	ldr	ip, [r8]
@@ -6013,48 +6068,47 @@ FtlL2PDataInit:
 	adds	r1, r2, r3
 	movs	r3, #0
 	mov	lr, r3
-.L861:
+.L878:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	cmp	r2, r1
-	bne	.L862
-	ldr	r3, .L863+20
+	bne	.L879
+	ldr	r3, .L880+20
 	ldr	r2, [r5]
 	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L863+24
+	ldr	r2, .L880+24
 	strh	r0, [r3]	@ movhi
-	strh	r0, [r3, #40]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L863+28
+	ldr	r2, .L880+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L863+32
+	ldr	r2, .L880+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L863+36
+	ldr	r2, .L880+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	ldr	r2, .L863+40
+	ldr	r2, .L880+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L862:
+.L879:
 	bic	r3, r3, #3
 	str	lr, [r2, #-8]
 	add	r3, r3, ip
 	strh	r0, [r2, #-12]	@ movhi
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L861
-.L864:
+	b	.L878
+.L881:
 	.align	2
-.L863:
+.L880:
 	.word	.LANCHOR65
 	.word	.LANCHOR125
 	.word	.LANCHOR58
@@ -6081,57 +6135,57 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L866
+	ldr	r3, .L883
 	movw	r2, #65535
 	mov	r1, r4
-	ldr	r5, .L866+4
+	ldr	r5, .L883+4
 	str	r4, [r3]
-	ldr	r3, .L866+8
+	ldr	r3, .L883+8
 	strh	r2, [r3]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L866+12
+	ldr	r3, .L883+12
 	str	r4, [r3]
-	ldr	r3, .L866+16
+	ldr	r3, .L883+16
 	str	r4, [r3]
-	ldr	r3, .L866+20
+	ldr	r3, .L883+20
 	str	r2, [r3]
-	ldr	r3, .L866+24
+	ldr	r3, .L883+24
 	str	r4, [r3]
-	ldr	r3, .L866+28
+	ldr	r3, .L883+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L866+32
+	ldr	r3, .L883+32
 	ldrh	r2, [r3]
-	ldr	r3, .L866+36
+	ldr	r3, .L883+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L866+40
+	ldr	r3, .L883+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L866+44
+	ldr	r3, .L883+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L866+48
+	ldr	r0, .L883+48
 	bl	ftl_memset
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L866+52
+	ldr	r0, .L883+52
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L867:
+.L884:
 	.align	2
-.L866:
+.L883:
 	.word	.LANCHOR132
 	.word	.LANCHOR41
 	.word	.LANCHOR133
@@ -6158,11 +6212,11 @@ FtlVariablesInit:
 SupperBlkListInit:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L879
+	ldr	r3, .L896
 	movs	r2, #6
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r6, .L879+4
+	ldr	r6, .L896+4
 	sub	sp, sp, #24
 	movs	r4, #0
 	ldrh	r3, [r3]
@@ -6172,39 +6226,39 @@ SupperBlkListInit:
 	mov	r10, r6
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L879+8
-	ldr	r2, .L879+12
-	ldr	r1, .L879+16
+	ldr	r3, .L896+8
+	ldr	r2, .L896+12
+	ldr	r1, .L896+16
 	str	r4, [r3]
-	ldr	r3, .L879+20
+	ldr	r3, .L896+20
 	strh	r4, [r2]	@ movhi
 	strh	r4, [r1]	@ movhi
 	str	r4, [r3]
-	ldr	r3, .L879+24
+	ldr	r3, .L896+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L879+28
+	ldr	r3, .L896+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L869:
-	ldr	r3, .L879+32
+.L886:
+	ldr	r3, .L896+32
 	sxth	r7, r4
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L876
-	ldr	r3, .L879+36
+	bge	.L893
+	ldr	r3, .L896+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
 	ldrh	r2, [r3]
-	ldr	r3, .L879+40
+	ldr	r3, .L896+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L877
-.L871:
+	b	.L894
+.L888:
 	str	r3, [sp, #20]
-	ldr	r3, .L879+44
+	ldr	r3, .L896+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
@@ -6212,85 +6266,85 @@ SupperBlkListInit:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L870
+	cbnz	r0, .L887
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
 	sxth	r6, r6
-.L870:
+.L887:
 	adds	r3, r3, #1
-.L877:
+.L894:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L871
+	blt	.L888
 	lsls	r3, r7, #1
-	cbz	r6, .L872
+	cbz	r6, .L889
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L873:
+.L890:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L879+48
+	ldr	r3, .L896+48
 	strh	r6, [r2, #4]	@ movhi
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L874
-	ldr	r3, .L879+52
+	beq	.L891
+	ldr	r3, .L896+52
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L874
-	ldr	r3, .L879+56
+	beq	.L891
+	ldr	r3, .L896+56
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L874
-	ldr	r3, .L879+60
+	beq	.L891
+	ldr	r3, .L896+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L875
+	cbnz	r3, .L892
 	add	r8, r8, #1
 	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-.L874:
+.L891:
 	adds	r4, r4, #1
-	b	.L869
-.L872:
-	ldr	r2, .L879+60
+	b	.L886
+.L889:
+	ldr	r2, .L896+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L873
-.L875:
+	b	.L890
+.L892:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	bl	INSERT_DATA_LIST
-	b	.L874
-.L876:
+	b	.L891
+.L893:
 	ldr	r2, [sp, #8]
 	strh	r8, [fp]	@ movhi
 	strh	r5, [r2]	@ movhi
 	add	r5, r5, r8
 	cmp	r3, r5
-	bge	.L878
-	ldr	r1, .L879+64
-	movw	r2, #2683
-	ldr	r0, .L879+68
+	bge	.L895
+	ldr	r1, .L896+64
+	movw	r2, #2614
+	ldr	r0, .L896+68
 	bl	printf
-	ldr	r1, .L879+72
-	ldr	r0, .L879+76
+	ldr	r1, .L896+72
+	ldr	r0, .L896+76
 	bl	printf
-.L878:
+.L895:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L880:
+.L897:
 	.align	2
-.L879:
+.L896:
 	.word	.LANCHOR41
 	.word	.LANCHOR82
 	.word	.LANCHOR88
@@ -6323,16 +6377,16 @@ SupperBlkListInit:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L882
+	ldr	r2, .L899
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
-	ldr	r4, .L882+4
+	ldr	r4, .L899+4
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L882+8
+	ldr	r2, .L899+8
 	strh	r3, [r2]	@ movhi
 	ldrh	r2, [r4]
-	ldr	r3, .L882+12
+	ldr	r3, .L899+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -6340,14 +6394,14 @@ FtlGcPageVarInit:
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L882+16
+	ldr	r3, .L899+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L883:
+.L900:
 	.align	2
-.L882:
+.L899:
 	.word	.LANCHOR110
 	.word	.LANCHOR55
 	.word	.LANCHOR111
@@ -6368,13 +6422,13 @@ idb_init:
 	push	{r3, lr}
 	mov	r2, #262144
 	movs	r1, #0
-	ldr	r0, .L885
+	ldr	r0, .L902
 	bl	ftl_memset
 	movs	r0, #0
 	pop	{r3, pc}
-.L886:
+.L903:
 	.align	2
-.L885:
+.L902:
 	.word	idb_buf
 	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
@@ -6404,13 +6458,13 @@ FlashReadIdbData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	mov	r2, #2048
-	ldr	r1, .L889
+	ldr	r1, .L906
 	bl	ftl_memcpy
 	movs	r0, #0
 	pop	{r3, pc}
-.L890:
+.L907:
 	.align	2
-.L889:
+.L906:
 	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
@@ -6426,52 +6480,52 @@ FlashLoadPhyInfoInRam:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #0
-	ldr	r7, .L899
-	ldr	r5, .L899+4
-.L894:
+	ldr	r7, .L916
+	ldr	r5, .L916+4
+.L911:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
 	mov	r4, r0
-	cbnz	r0, .L892
-	ldr	r5, .L899+8
+	cbnz	r0, .L909
+	ldr	r5, .L916+8
 	mov	r3, r4
-	ldr	r2, .L899+12
+	ldr	r2, .L916+12
 	add	r5, r5, r8
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L893:
+.L910:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L896
+	beq	.L913
 	adds	r3, r3, #1
 	cmp	r3, #4
-	bne	.L893
-.L896:
+	bne	.L910
+.L913:
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L899+16
+	ldr	r0, .L916+16
 	bl	ftl_memcpy
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L899+20
+	ldr	r0, .L916+20
 	bl	ftl_memcpy
-	b	.L891
-.L892:
+	b	.L908
+.L909:
 	adds	r6, r6, #1
 	adds	r7, r7, #32
 	cmp	r6, #77
-	bne	.L894
+	bne	.L911
 	mov	r4, #-1
-.L891:
+.L908:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L900:
+.L917:
 	.align	2
-.L899:
+.L916:
 	.word	.LANCHOR142+1
 	.word	.LANCHOR22
 	.word	.LANCHOR142
@@ -6492,15 +6546,15 @@ ftl_memcpy32:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	push	{r4, lr}
-.L902:
+.L919:
 	cmp	r3, r2
-	bne	.L903
+	bne	.L920
 	pop	{r4, pc}
-.L903:
+.L920:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
 	adds	r3, r3, #1
-	b	.L902
+	b	.L919
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6520,15 +6574,15 @@ NandcCopy1KB:
 	add	r6, r0, #512
 	add	r0, r2, r4, lsl #9
 	ldr	r5, [sp, #16]
-	bne	.L905
-	cbz	r3, .L906
+	bne	.L922
+	cbz	r3, .L923
 	lsls	r1, r3, #30
-	bne	.L907
+	bne	.L924
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L906:
-	cbz	r5, .L904
+.L923:
+	cbz	r5, .L921
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsrs	r4, r4, #1
 	ldrb	r3, [r5]	@ zero_extendqisi2
@@ -6541,21 +6595,21 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L907:
+.L924:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L906
-.L905:
-	cbz	r3, .L910
+	b	.L923
+.L922:
+	cbz	r3, .L927
 	lsls	r2, r3, #30
-	bne	.L911
+	bne	.L928
 	mov	r1, r0
 	mov	r2, #256
 	mov	r0, r3
 	bl	ftl_memcpy32
-.L910:
-	cbz	r5, .L904
+.L927:
+	cbz	r5, .L921
 	lsrs	r4, r4, #1
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
@@ -6567,14 +6621,14 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L904:
+.L921:
 	pop	{r4, r5, r6, pc}
-.L911:
+.L928:
 	mov	r1, r0
 	mov	r2, #1024
 	mov	r0, r3
 	bl	ftl_memcpy
-	b	.L910
+	b	.L927
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6589,7 +6643,7 @@ NandcXferData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L958
+	ldr	r3, .L975
 	sub	sp, sp, #96
 	mov	r6, r0
 	mov	r10, r2
@@ -6597,14 +6651,14 @@ NandcXferData:
 	ldr	r5, [r3, r0, lsl #3]
 	lsls	r3, r7, #26
 	ldr	r4, [sp, #128]
-	bne	.L923
-	cbnz	r4, .L924
+	bne	.L940
+	cbnz	r4, .L941
 	add	r4, sp, #32
 	movs	r2, #64
 	movs	r1, #255
 	add	r0, sp, #32
 	bl	ftl_memset
-.L924:
+.L941:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6616,10 +6670,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L948
-	ldr	r2, .L958+4
+	bne	.L965
+	ldr	r2, .L975+4
 	lsr	r0, r10, #1
-	ldr	ip, .L958+12
+	ldr	ip, .L975+12
 	ldr	r3, [r2]
 	cmp	r3, #25
 	ldr	r3, [sp, #12]
@@ -6627,31 +6681,31 @@ NandcXferData:
 	movcc	r7, #64
 	movcs	r7, #128
 	mov	r1, r3
-.L927:
+.L944:
 	cmp	r1, r0
 	add	r4, r4, #4
 	add	r6, r7, r3
-	bcc	.L928
-	ldr	r3, .L958+8
+	bcc	.L945
+	ldr	r3, .L975+8
 	lsr	r4, r10, #2
 	ldr	r0, [r2]
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L929:
+.L946:
 	cmp	r2, r4
-	bcs	.L925
-	cbnz	r0, .L935
-.L925:
+	bcs	.L942
+	cbnz	r0, .L952
+.L942:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L936:
-	ldr	r3, .L958+8
+.L953:
+	ldr	r3, .L975+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L922
+	bls	.L939
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L922
+	cbnz	r3, .L939
 	ldr	r3, [r5]
 	and	r2, r3, #139264
 	cmp	r2, #139264
@@ -6659,12 +6713,12 @@ NandcXferData:
 	moveq	r8, #-1
 	orreq	r3, r3, #131072
 	streq	r3, [r5]
-.L922:
+.L939:
 	mov	r0, r8
 	add	sp, sp, #96
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L928:
+.L945:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
 	adds	r1, r1, #1
@@ -6677,20 +6731,20 @@ NandcXferData:
 	strb	lr, [r4, #-2]
 	strb	r3, [r4, #-1]
 	mov	r3, r6
-	b	.L927
-.L935:
+	b	.L944
+.L952:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L951
+	bmi	.L968
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L951
+	bne	.L968
 	cmp	r1, #5
-	bls	.L931
+	bls	.L948
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6711,18 +6765,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L957:
+.L974:
 	orr	r3, r3, r6, lsl #5
-.L933:
+.L950:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L930:
+.L947:
 	adds	r2, r2, #1
-	b	.L929
-.L931:
+	b	.L946
+.L948:
 	cmp	r1, #3
-	bls	.L933
+	bls	.L950
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6743,33 +6797,33 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L957
-.L951:
+	b	.L974
+.L968:
 	mov	r8, #-1
-	b	.L930
-.L948:
+	b	.L947
+.L965:
 	mov	r8, #0
-	b	.L925
-.L923:
+	b	.L942
+.L940:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L937
+	bne	.L954
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L938:
+.L955:
 	cmp	r8, r10
-	bcc	.L940
+	bcc	.L957
 	mov	r8, #0
-	b	.L936
-.L940:
+	b	.L953
+.L957:
 	and	fp, r8, #3
-	cbz	r7, .L953
+	cbz	r7, .L970
 	add	r3, r7, r8, lsl #9
-.L939:
+.L956:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
@@ -6788,11 +6842,11 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L938
-.L953:
+	b	.L955
+.L970:
 	mov	r3, r7
-	b	.L939
-.L937:
+	b	.L956
+.L954:
 	mov	r8, #0
 	movs	r2, #2
 	mov	r3, r8
@@ -6808,16 +6862,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L941:
+.L958:
 	cmp	r4, r10
-	bcs	.L936
+	bcs	.L953
 	mov	r0, r6
 	adds	r4, r4, #2
 	bl	NandcXferComp
 	ldr	r3, [r5, #32]
 	cmp	r10, r4
 	str	r3, [sp, #28]
-	bls	.L942
+	bls	.L959
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6826,10 +6880,10 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L942:
+.L959:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L954
+	bmi	.L971
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
@@ -6838,7 +6892,7 @@ NandcXferData:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L943:
+.L960:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -6855,13 +6909,13 @@ NandcXferData:
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L941
-.L954:
+	b	.L958
+.L971:
 	mov	r8, #-1
-	b	.L943
-.L959:
+	b	.L960
+.L976:
 	.align	2
-.L958:
+.L975:
 	.word	.LANCHOR6
 	.word	.LANCHOR32
 	.word	.LANCHOR34
@@ -6880,21 +6934,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L962
+	ldr	r3, .L979
 	mov	r6, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L961
-	ldr	r3, .L962+4
-	ldr	r2, .L962+8
+	cbnz	r0, .L978
+	ldr	r3, .L979+4
+	ldr	r2, .L979+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
 	muls	r0, r3, r0
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L961:
+.L978:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -6917,9 +6971,9 @@ FlashReadRawPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L963:
+.L980:
 	.align	2
-.L962:
+.L979:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -6937,7 +6991,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L989
+	ldr	r3, .L1006
 	sub	sp, sp, #24
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
@@ -6945,7 +6999,7 @@ FlashDdrTunningRead:
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L989+4
+	ldr	r3, .L1006+4
 	ldr	r3, [r3]
 	cmp	r3, #8
 	ldr	r3, [sp, #56]
@@ -6953,9 +7007,9 @@ FlashDdrTunningRead:
 	movcc	fp, #6
 	movcs	fp, #12
 	cmp	r3, #0
-	beq	.L978
+	beq	.L995
 	movs	r0, #1
-	ldr	r4, .L989+8
+	ldr	r4, .L1006+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -6972,37 +7026,37 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
 	adds	r3, r6, #1
-	bne	.L967
-.L976:
+	bne	.L984
+.L993:
 	mov	r6, #-1
-.L964:
+.L981:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L967:
+.L984:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L989+12
+	ldr	r0, .L1006+12
 	bl	printf
-	ldr	r2, .L989+16
+	ldr	r2, .L1006+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	cmp	r3, #2048
-	bcs	.L969
+	bcs	.L986
 	str	r3, [r2]
-	b	.L964
-.L969:
+	b	.L981
+.L986:
 	movs	r7, #0
 	str	r7, [r2]
 	str	r7, [sp, #4]
-.L966:
+.L983:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L974:
+.L991:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
 	mov	r3, r7
@@ -7012,72 +7066,72 @@ FlashDdrTunningRead:
 	bl	FlashReadRawPage
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L970
+	bhi	.L987
 	cmp	r0, #2
-	bhi	.L980
+	bhi	.L997
 	adds	r4, r4, #1
 	cmp	r4, #9
-	bls	.L980
+	bls	.L997
 	mov	r3, r5
 	mov	r6, r0
 	sub	r5, fp, r4
 	mov	r8, #0
-.L972:
+.L989:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L973:
-	cbz	r5, .L975
+.L990:
+	cbz	r5, .L992
 	mov	r1, r5
-	ldr	r0, .L989+20
+	ldr	r0, .L1006+20
 	bl	printf
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L975:
+.L992:
 	cmp	r8, #0
-	beq	.L964
+	beq	.L981
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L989+24
+	ldr	r0, .L1006+24
 	bl	printf
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L976
+	beq	.L993
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L964
-.L978:
+	b	.L981
+.L995:
 	mov	r6, #1024
-	b	.L966
-.L970:
+	b	.L983
+.L987:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L981
+	bls	.L998
 	cmp	r4, #7
 	sub	r5, r10, r4
-	bhi	.L973
+	bhi	.L990
 	str	r4, [sp, #16]
-.L981:
+.L998:
 	movs	r4, #0
-	b	.L971
-.L980:
+	b	.L988
+.L997:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
 	mov	r7, r8
 	str	r8, [sp, #4]
-.L971:
+.L988:
 	add	fp, fp, #2
 	cmp	fp, #69
-	bls	.L974
+	bls	.L991
 	mov	r3, r5
 	mov	r5, r10
-	b	.L972
-.L990:
+	b	.L989
+.L1007:
 	.align	2
-.L989:
+.L1006:
 	.word	.LANCHOR19
 	.word	.LANCHOR34
 	.word	.LANCHOR24
@@ -7105,16 +7159,16 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
 	mov	r4, r0
-	bne	.L992
-	ldr	r10, .L1010+20
+	bne	.L1009
+	ldr	r10, .L1027+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L993
-.L995:
-	ldr	r3, .L1010
+	bne	.L1010
+.L1012:
+	ldr	r3, .L1027
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L992
-	ldr	r3, .L1010+4
+	cbz	r3, .L1009
+	ldr	r3, .L1027+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
@@ -7126,16 +7180,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r4, r0
-	beq	.L996
-	ldr	r3, .L1010+8
+	beq	.L1013
+	ldr	r3, .L1027+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L992
-.L996:
+	bls	.L1009
+.L1013:
 	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	b	.L992
-.L993:
+	b	.L1009
+.L1010:
 	movs	r3, #0
 	mov	r2, r7
 	strb	r3, [r10]
@@ -7145,15 +7199,15 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	strb	fp, [r10]
-	beq	.L995
+	beq	.L1012
 	mov	r4, r0
-.L992:
-	ldr	r10, .L1010+24
+.L1009:
+	ldr	r10, .L1027+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L991
+	beq	.L1008
 	adds	r2, r4, #1
-	bne	.L991
+	bne	.L1008
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
@@ -7163,13 +7217,13 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L1010+12
+	ldr	r0, .L1027+12
 	bl	printf
 	adds	r3, r4, #1
-	bne	.L991
-	ldr	r3, .L1010+16
+	bne	.L1008
+	ldr	r3, .L1027+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L991
+	cbz	r3, .L1008
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [r10]
@@ -7181,14 +7235,14 @@ FlashReadPage:
 	mov	r4, r0
 	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L991:
+.L1008:
 	mov	r0, r4
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1011:
+.L1028:
 	.align	2
-.L1010:
+.L1027:
 	.word	.LANCHOR30
 	.word	.LANCHOR19
 	.word	.LANCHOR33
@@ -7210,7 +7264,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r4, .L1023
+	ldr	r4, .L1040
 	movs	r5, #0
 	mov	r7, r1
 	ldrb	r0, [r4]	@ zero_extendqisi2
@@ -7228,33 +7282,33 @@ FlashDdrParaScan:
 	mov	r8, r0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1023+4
+	ldr	r5, .L1040+4
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L1013
+	beq	.L1030
 	cmp	r8, #-1
-	bne	.L1014
-.L1013:
+	bne	.L1031
+.L1030:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L1014
+	bpl	.L1031
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-.L1022:
+.L1039:
 	movs	r0, #0
 	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1014:
+.L1031:
 	movs	r3, #1
-	b	.L1022
-.L1024:
+	b	.L1039
+.L1041:
 	.align	2
-.L1023:
+.L1040:
 	.word	.LANCHOR24
 	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -7272,7 +7326,7 @@ FlashLoadPhyInfo:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	fp, .L1040+8
+	ldr	fp, .L1057+8
 	movs	r4, #0
 	movs	r7, #4
 	strb	r3, [sp, #20]
@@ -7281,13 +7335,13 @@ FlashLoadPhyInfo:
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	ldr	r1, .L1040
+	ldr	r1, .L1057
 	mov	r0, r4
 	strb	r3, [sp, #23]
 	mov	r6, #-1
 	ldrh	r3, [fp, #10]
-	ldr	r8, .L1040+36
-	ldr	r5, .L1040+4
+	ldr	r8, .L1057+36
+	ldr	r5, .L1057+4
 	str	r3, [sp, #4]
 	ldr	r3, [r1]
 	str	r4, [r8]
@@ -7295,11 +7349,11 @@ FlashLoadPhyInfo:
 	bl	flash_enter_slc_mode
 	mov	r10, r1
 	str	r8, [sp, #12]
-.L1026:
+.L1043:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1028:
+.L1045:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -7309,94 +7363,94 @@ FlashLoadPhyInfo:
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1027
+	bne	.L1044
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1027
+	bne	.L1044
 	add	r8, r8, #1
 	cmp	r8, #4
-	bne	.L1028
-.L1029:
+	bne	.L1045
+.L1046:
 	ldr	r3, [sp, #4]
 	subs	r7, r7, #1
 	add	r4, r4, r3
-	bne	.L1026
+	bne	.L1043
 	mov	r0, r7
-	b	.L1039
-.L1030:
+	b	.L1056
+.L1047:
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	JSHash
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1036
+	bne	.L1053
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1040+8
+	ldr	r0, .L1057+8
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1040+12
+	ldr	r0, .L1057+12
 	adds	r1, r1, #192
 	bl	ftl_memcpy
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1040+16
+	ldr	r0, .L1057+16
 	adds	r1, r1, #224
 	bl	ftl_memcpy
 	ldr	r6, [r5]
 	mov	r0, r4
-	ldr	r3, .L1040+20
+	ldr	r3, .L1057+20
 	ldrh	r1, [fp, #10]
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1040+24
+	ldr	r3, .L1057+24
 	adds	r2, r0, #1
-	cbz	r0, .L1032
-.L1038:
+	cbz	r0, .L1049
+.L1055:
 	str	r2, [r3]
 	ldrh	r2, [r6, #14]
 	movs	r6, #0
-	ldr	r3, .L1040+28
+	ldr	r3, .L1057+28
 	strb	r2, [r3]
-	b	.L1029
-.L1032:
+	b	.L1046
+.L1049:
 	movs	r2, #2
-	b	.L1038
-.L1036:
+	b	.L1055
+.L1053:
 	mov	r6, #-1
-	b	.L1029
-.L1027:
+	b	.L1046
+.L1044:
 	ldr	r8, [r5]
-	ldr	r2, .L1040+32
+	ldr	r2, .L1057+32
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1029
+	bne	.L1046
 	cmp	r6, #0
-	bne	.L1030
+	bne	.L1047
 	ldrh	r1, [fp, #10]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1040+24
+	ldr	r3, .L1057+24
 	adds	r0, r0, #1
 	str	r0, [r3]
 	mov	r0, r6
-.L1039:
+.L1056:
 	bl	flash_exit_slc_mode
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1041:
+.L1058:
 	.align	2
-.L1040:
+.L1057:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR31
@@ -7426,8 +7480,8 @@ ToshibaReadRetrial:
 	mov	fp, r3
 	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1069
-	ldr	r2, .L1069+4
+	ldr	r3, .L1086
+	ldr	r2, .L1086+4
 	ldr	r4, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
@@ -7437,83 +7491,83 @@ ToshibaReadRetrial:
 	subs	r3, r3, #67
 	add	r5, r4, r5, lsl #8
 	cmp	r3, #1
-	bls	.L1059
-	ldr	r3, .L1069+8
+	bls	.L1076
+	ldr	r3, .L1086+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1060
+	cbz	r3, .L1077
 	movs	r0, #0
 	bl	NandcSetDdrMode
 	movs	r3, #1
-.L1060:
+.L1077:
 	str	r3, [sp, #8]
 	add	r3, r4, r7, lsl #8
 	movs	r2, #92
 	str	r2, [r3, #2056]
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1043:
+.L1060:
 	mov	r8, #1
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1045:
-	ldr	r3, .L1069+12
+.L1062:
+	ldr	r3, .L1086+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1054
+	bcc	.L1071
 	ldr	r10, [sp, #4]
-.L1053:
+.L1070:
 	ldr	r3, [sp, #16]
 	movs	r1, #0
 	mov	r0, r5
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1055
+	bhi	.L1072
 	bl	SandiskSetRRPara
-.L1056:
+.L1073:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1069+16
+	ldr	r2, .L1086+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1057
+	bcc	.L1074
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1057:
+.L1074:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1042
+	cbz	r3, .L1059
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1042:
+.L1059:
 	mov	r0, r10
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1059:
+.L1076:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1043
-.L1054:
+	b	.L1060
+.L1071:
 	ldr	r3, [sp, #16]
 	mov	r0, r5
 	uxtb	r1, r8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1046
+	bhi	.L1063
 	bl	SandiskSetRRPara
-.L1047:
+.L1064:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1048
-	ldr	r3, .L1069+12
+	bne	.L1065
+	ldr	r3, .L1086+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
@@ -7521,14 +7575,14 @@ ToshibaReadRetrial:
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1048:
+.L1065:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
 	movs	r2, #93
 	str	r2, [r3, #2056]
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1049
+	cbz	r3, .L1066
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	mov	r3, fp
@@ -7539,10 +7593,10 @@ ToshibaReadRetrial:
 	mov	r10, r0
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.L1050:
+.L1067:
 	cmp	r10, #-1
-	beq	.L1051
-	ldr	r2, .L1069+16
+	beq	.L1068
+	ldr	r2, .L1086+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
@@ -7551,29 +7605,29 @@ ToshibaReadRetrial:
 	str	r3, [sp, #4]
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1053
+	bcc	.L1070
 	mov	fp, #0
 	str	fp, [sp, #12]
-.L1051:
+.L1068:
 	add	r8, r8, #1
-	b	.L1045
-.L1046:
+	b	.L1062
+.L1063:
 	bl	ToshibaSetRRPara
-	b	.L1047
-.L1049:
+	b	.L1064
+.L1066:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
 	mov	r10, r0
-	b	.L1050
-.L1055:
+	b	.L1067
+.L1072:
 	bl	ToshibaSetRRPara
-	b	.L1056
-.L1070:
+	b	.L1073
+.L1087:
 	.align	2
-.L1069:
+.L1086:
 	.word	.LANCHOR6
 	.word	.LANCHOR10
 	.word	.LANCHOR30
@@ -7598,35 +7652,35 @@ SamsungReadRetrial:
 	mov	fp, r1
 	movs	r6, #1
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1084
+	ldr	r2, .L1101
 	mov	r4, #-1
 	add	r3, r2, r7, lsl #3
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1072:
-	ldr	r3, .L1084+4
+.L1089:
+	ldr	r3, .L1101+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1076
-.L1075:
+	bcc	.L1093
+.L1092:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1084+8
+	ldr	r3, .L1101+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1071
+	bcc	.L1088
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1071:
+.L1088:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1076:
+.L1093:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
@@ -7636,26 +7690,26 @@ SamsungReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1073
-	ldr	r3, .L1084+8
+	beq	.L1090
+	ldr	r3, .L1101+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1079
+	bcc	.L1096
 	mov	r8, #0
 	mov	r10, r8
-.L1073:
+.L1090:
 	adds	r6, r6, #1
-	b	.L1072
-.L1079:
+	b	.L1089
+.L1096:
 	mov	r4, r0
-	b	.L1075
-.L1085:
+	b	.L1092
+.L1102:
 	.align	2
-.L1084:
+.L1101:
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LANCHOR33
@@ -7673,28 +7727,28 @@ MicronReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r7, r3
-	ldr	r3, .L1111
+	ldr	r3, .L1128
 	sub	sp, sp, #40
 	mov	r5, r0
 	str	r2, [sp, #16]
 	ldrb	r2, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1111+4
+	ldr	r3, .L1128+4
 	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1087
+	bne	.L1104
 	add	r2, r2, r2, lsl #1
 	asrs	r3, r2, #2
-.L1110:
-.L1088:
+.L1127:
+.L1105:
 	mov	r8, #0
 	str	r3, [sp, #12]
 	mov	r6, r8
-.L1098:
+.L1115:
 	mov	r0, r5
 	mov	r10, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1111+8
+	ldr	r3, .L1128+8
 	mov	r4, #-1
 	ldr	r2, [r3, r5, lsl #3]
 	add	r3, r3, r5, lsl #3
@@ -7702,12 +7756,12 @@ MicronReadRetrial:
 	str	r2, [sp, #24]
 	lsl	r3, fp, #8
 	str	r3, [sp, #32]
-.L1089:
-	ldr	r3, .L1111+12
+.L1106:
+	ldr	r3, .L1128+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r10, r3
-	bcc	.L1093
-.L1092:
+	bcc	.L1110
+.L1109:
 	ldr	r3, [sp, #24]
 	movs	r0, #200
 	add	fp, r3, fp, lsl #8
@@ -7722,7 +7776,7 @@ MicronReadRetrial:
 	cmp	r4, r3
 	str	r6, [fp, #2048]
 	str	r6, [fp, #2048]
-	bcc	.L1094
+	bcc	.L1111
 	adds	r1, r4, #1
 	mov	r3, r10
 	it	ne
@@ -7730,26 +7784,26 @@ MicronReadRetrial:
 	ldr	r2, [sp, #28]
 	str	r4, [sp]
 	mov	r1, r10
-	ldr	r0, .L1111+16
+	ldr	r0, .L1128+16
 	bl	printf
 	cmp	r8, #0
-	bne	.L1096
-	ldr	r3, .L1111+4
+	bne	.L1113
+	ldr	r3, .L1128+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1086
+	beq	.L1103
 	adds	r2, r4, #1
-	bne	.L1086
+	bne	.L1103
 	movs	r1, #3
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r8, #1
-	b	.L1098
-.L1087:
-	ldr	r3, .L1111+20
+	b	.L1115
+.L1104:
+	ldr	r3, .L1128+20
 	smull	r2, r3, r2, r3
-	b	.L1110
-.L1093:
+	b	.L1127
+.L1110:
 	ldr	r2, [sp, #32]
 	movs	r0, #200
 	ldr	r3, [sp, #24]
@@ -7774,46 +7828,46 @@ MicronReadRetrial:
 	mov	r3, r7
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L1090
+	beq	.L1107
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L1100
+	bcc	.L1117
 	movs	r7, #0
 	str	r7, [sp, #16]
-.L1090:
+.L1107:
 	ldr	r10, [sp, #20]
-	b	.L1089
-.L1100:
+	b	.L1106
+.L1117:
 	movs	r7, #0
 	mov	r4, r0
 	str	r7, [sp, #16]
-	b	.L1092
-.L1096:
+	b	.L1109
+.L1113:
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1086:
+.L1103:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1094:
+.L1111:
 	cmp	r8, #0
-	beq	.L1086
+	beq	.L1103
 	movs	r1, #0
 	mov	r0, r5
 	bl	micron_auto_read_calibration_config
 	mov	r4, #256
-	b	.L1086
-.L1112:
+	b	.L1103
+.L1129:
 	.align	2
-.L1111:
+.L1128:
 	.word	.LANCHOR33
 	.word	.LANCHOR8
 	.word	.LANCHOR6
@@ -7834,7 +7888,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r4, .L1130
+	ldr	r4, .L1147
 	mov	r8, #0
 	mov	r6, #-1
 	mov	r10, r3
@@ -7844,44 +7898,44 @@ HynixReadRetrial:
 	adds	r3, r4, r0
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
 	str	r2, [sp]
-	ldr	r2, .L1130+4
+	ldr	r2, .L1147+4
 	ldr	r2, [r2]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
 	cmp	r2, #7
 	it	eq
 	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-.L1115:
+.L1132:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1120
-.L1119:
-	ldr	r3, .L1130+4
+	bcc	.L1137
+.L1136:
+	ldr	r3, .L1147+4
 	add	r4, r4, r7
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	ldr	r3, .L1130+8
+	ldr	r3, .L1147+8
 	ite	eq
 	strbeq	r5, [r4, #20]
 	strbne	r5, [r4, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1113
+	bcc	.L1130
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1113:
+.L1130:
 	mov	r0, r6
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1120:
+.L1137:
 	ldr	r3, [sp]
 	adds	r5, r5, #1
 	uxtb	r5, r5
-	ldr	r2, .L1130+12
+	ldr	r2, .L1147+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
 	cmp	r3, r5
@@ -7895,26 +7949,26 @@ HynixReadRetrial:
 	mov	r0, r7
 	bl	FlashReadRawPage
 	adds	r2, r0, #1
-	beq	.L1117
-	ldr	r3, .L1130+8
+	beq	.L1134
+	ldr	r3, .L1147+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1124
+	bcc	.L1141
 	mov	r10, #0
 	mov	fp, r10
-.L1117:
+.L1134:
 	add	r8, r8, #1
-	b	.L1115
-.L1124:
+	b	.L1132
+.L1141:
 	mov	r6, r0
-	b	.L1119
-.L1131:
+	b	.L1136
+.L1148:
 	.align	2
-.L1130:
+.L1147:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
 	.word	.LANCHOR33
@@ -7933,24 +7987,24 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L1135
+	ldr	r3, .L1152
 	mov	r5, r1
 	mov	r7, r2
 	mov	r4, r0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1133
-	ldr	r3, .L1135+4
-	ldr	r2, .L1135+8
+	cbnz	r0, .L1150
+	ldr	r3, .L1152+4
+	ldr	r2, .L1152+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1133
-	ldr	r3, .L1135+12
+	bls	.L1150
+	ldr	r3, .L1152+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1134
+	cbnz	r3, .L1151
 	subs	r6, r6, #2
-.L1133:
+.L1150:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -7979,12 +8033,12 @@ FlashProgPage:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1134:
+.L1151:
 	movs	r6, #4
-	b	.L1133
-.L1136:
+	b	.L1150
+.L1153:
 	.align	2
-.L1135:
+.L1152:
 	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
@@ -8002,13 +8056,13 @@ FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1146
-	ldr	r4, .L1146+4
+	ldr	r7, .L1163
+	ldr	r4, .L1163+4
 	ldr	r3, [r7]
-	ldr	r10, .L1146+60
-	ldr	r8, .L1146+64
+	ldr	r10, .L1163+60
+	ldr	r8, .L1163+64
 	str	r3, [r4]
-	ldr	r3, .L1146+8
+	ldr	r3, .L1163+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
 	mov	r2, #2048
@@ -8017,49 +8071,49 @@ FlashSavePhyInfo:
 	bl	ftl_memset
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r3, .L1146+12
-	ldr	r1, .L1146+16
+	ldr	r3, .L1163+12
+	ldr	r1, .L1163+16
 	str	r10, [r0]
 	adds	r0, r0, #16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1146+20
+	ldr	r3, .L1163+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1146+24
+	ldr	r3, .L1163+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1146+28
+	ldr	r1, .L1163+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1146+32
+	ldr	r1, .L1163+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1146+36
+	ldr	r1, .L1163+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1146+40
+	ldr	r1, .L1163+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1146+44
+	ldr	r1, .L1163+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
 	bl	JSHash
-	ldr	r1, .L1146+48
+	ldr	r1, .L1163+48
 	mov	r3, #1592
 	str	r3, [r5, #4]
 	str	r0, [r5, #8]
@@ -8070,7 +8124,7 @@ FlashSavePhyInfo:
 	str	r3, [r4]
 	bl	flash_enter_slc_mode
 	mov	fp, r1
-.L1140:
+.L1157:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
@@ -8097,11 +8151,11 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1138
+	beq	.L1155
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1138
+	bne	.L1155
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
@@ -8111,21 +8165,21 @@ FlashSavePhyInfo:
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1138
-	ldr	r3, .L1146+52
+	bne	.L1155
+	ldr	r3, .L1163+52
 	cmp	r5, #1
 	str	r2, [r3]
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1146+56
+	ldr	r3, .L1163+56
 	str	r6, [r3]
-	beq	.L1141
+	beq	.L1158
 	movs	r5, #1
-.L1138:
+.L1155:
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1140
-.L1139:
+	bne	.L1157
+.L1156:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	clz	r0, r5
@@ -8134,12 +8188,12 @@ FlashSavePhyInfo:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1141:
+.L1158:
 	movs	r5, #2
-	b	.L1139
-.L1147:
+	b	.L1156
+.L1164:
 	.align	2
-.L1146:
+.L1163:
 	.word	.LANCHOR147
 	.word	.LANCHOR146
 	.word	.LANCHOR152
@@ -8172,7 +8226,7 @@ FlashReadIdbDataRaw:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #60
 	sub	sp, sp, #24
-	ldr	r2, .L1160
+	ldr	r2, .L1177
 	mov	r10, r0
 	strb	r3, [sp, #20]
 	movs	r3, #40
@@ -8181,49 +8235,49 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #22]
 	movs	r3, #16
 	strb	r3, [sp, #23]
-	ldr	r3, .L1160+4
+	ldr	r3, .L1177+4
 	ldr	r1, [r2]
 	str	r2, [sp, #8]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-	ldr	r3, .L1160+8
+	ldr	r3, .L1177+8
 	cmp	r1, r3
 	str	r3, [sp, #12]
-	bne	.L1149
+	bne	.L1166
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L1149:
+.L1166:
 	mov	r7, #-1
 	movs	r4, #2
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1150:
-	ldr	r3, .L1160+12
+.L1167:
+	ldr	r3, .L1177+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1155
-.L1154:
+	bcc	.L1172
+.L1171:
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1148
+	bne	.L1165
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1148:
+.L1165:
 	mov	r0, r7
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1155:
-	ldr	r5, .L1160+16
+.L1172:
+	ldr	r5, .L1177+16
 	movs	r6, #0
-	ldr	fp, .L1160+32
-.L1152:
+	ldr	fp, .L1177+32
+.L1169:
 	add	r3, sp, #20
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
@@ -8235,44 +8289,44 @@ FlashReadIdbDataRaw:
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L1151
+	bne	.L1168
 	adds	r6, r6, #1
 	cmp	r6, #4
-	bne	.L1152
-.L1153:
+	bne	.L1169
+.L1170:
 	adds	r4, r4, #1
-	b	.L1150
-.L1158:
+	b	.L1167
+.L1175:
 	movs	r7, #0
-	b	.L1154
-.L1151:
+	b	.L1171
+.L1168:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1160+20
+	ldr	r3, .L1177+20
 	cmp	r2, r3
-	bne	.L1153
+	bne	.L1170
 	mov	r1, r8
-	ldr	r0, .L1160+24
+	ldr	r0, .L1177+24
 	bl	printf
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
 	ldr	r3, [r5]
-	ldr	r2, .L1160+12
+	ldr	r2, .L1177+12
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1160+28
+	ldr	r3, .L1177+28
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1158
+	bcs	.L1175
 	str	r4, [r3]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-	b	.L1153
-.L1161:
+	b	.L1170
+.L1178:
 	.align	2
-.L1160:
+.L1177:
 	.word	.LANCHOR29
 	.word	.LANCHOR33
 	.word	1446522928
@@ -8296,34 +8350,34 @@ FlashPageProgMsbFFData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r2
-	ldr	r5, .L1172
+	ldr	r5, .L1189
 	mov	r6, r0
 	mov	r7, r1
 	ldr	r3, [r5]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1172+4
+	ldr	r3, .L1189+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1163
-	ldr	r3, .L1172+8
+	cbz	r3, .L1180
+	ldr	r3, .L1189+8
 	ldr	r1, [r3]
-	ldr	r3, .L1172+12
+	ldr	r3, .L1189+12
 	cmp	r1, r3
-	beq	.L1162
-.L1163:
+	beq	.L1179
+.L1180:
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1164
-	ldr	r2, .L1172+16
+	bhi	.L1181
+	ldr	r2, .L1189+16
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1166
+	bmi	.L1183
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1167:
+.L1184:
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1162
+	bne	.L1179
 	mov	r2, #32768
 	movs	r1, #255
 	ldr	r0, [r8]
@@ -8335,24 +8389,24 @@ FlashPageProgMsbFFData:
 	ldr	r2, [r8]
 	mov	r0, r6
 	bl	FlashProgPage
-.L1168:
+.L1185:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1167
+	bhi	.L1184
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1164:
+.L1181:
 	cmp	r2, #68
-	bne	.L1162
-.L1166:
-	ldr	r10, .L1172+20
-	ldr	r8, .L1172+24
-	b	.L1168
-.L1162:
+	bne	.L1179
+.L1183:
+	ldr	r10, .L1189+20
+	ldr	r8, .L1189+24
+	b	.L1185
+.L1179:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1173:
+.L1190:
 	.align	2
-.L1172:
+.L1189:
 	.word	.LANCHOR18
 	.word	.LANCHOR8
 	.word	.LANCHOR29
@@ -8378,45 +8432,45 @@ idb_write_data:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r2, #63
 	sub	sp, sp, #104
-	bls	.L1175
+	bls	.L1192
 	cmp	r0, #576
-	bcs	.L1176
-	ldr	r2, .L1227
+	bcs	.L1193
+	ldr	r2, .L1244
 	cmp	r0, #64
 	mov	r4, #1
 	str	r4, [r2]
-	bhi	.L1177
+	bhi	.L1194
 	rsb	r0, r0, #64
 	subs	r2, r3, r0
 	add	r1, r1, r0, lsl #9
-	ldr	r0, .L1227+4
+	ldr	r0, .L1244+4
 	lsls	r2, r2, #9
-.L1226:
+.L1243:
 	bl	ftl_memcpy
-.L1215:
+.L1232:
 	movs	r0, #0
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1177:
+.L1194:
 	rsb	r2, r0, #576
 	subs	r0, r0, #64
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1227+4
+	ldr	r3, .L1244+4
 	lsls	r2, r2, #9
 	add	r0, r3, r0, lsl #9
-	b	.L1226
-.L1175:
+	b	.L1243
+.L1192:
 	cmp	r0, #576
-	bcc	.L1215
-.L1176:
-	ldr	r3, .L1227
+	bcc	.L1232
+.L1193:
+	ldr	r3, .L1244
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1215
-	ldr	r3, .L1227+8
+	beq	.L1232
+	ldr	r3, .L1244+8
 	ldr	r2, [r3]
 	ldrb	r3, [r2, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2, #10]
@@ -8426,14 +8480,14 @@ idb_write_data:
 	addw	r0, r3, #511
 	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L1227+4
+	ldr	r1, .L1244+4
 	movs	r3, #0
 	str	r0, [sp, #20]
 	movw	r2, #65535
 	mov	r0, r1
-.L1181:
+.L1198:
 	ldr	r4, [r1, r2, lsl #2]
-	cbnz	r4, .L1179
+	cbnz	r4, .L1196
 	ldr	r4, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	cmp	r3, #4096
@@ -8442,13 +8496,13 @@ idb_write_data:
 	str	r4, [r1, r2, lsl #2]
 	subs	r2, r2, #1
 	cmp	r2, #4096
-	bne	.L1181
-.L1179:
+	bne	.L1198
+.L1196:
 	ldr	r1, [r0, r2, lsl #2]
 	mov	r3, #512
-	ldr	r0, .L1227+12
+	ldr	r0, .L1244+12
 	bl	printf
-	ldr	r3, .L1227+16
+	ldr	r3, .L1244+16
 	ldr	r2, [sp, #8]
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
@@ -8459,35 +8513,35 @@ idb_write_data:
 	mul	r4, r3, r2
 	movs	r3, #0
 	str	r3, [sp, #12]
-.L1182:
+.L1199:
 	ldr	r3, [sp, #16]
 	cmp	r3, #15
-	bls	.L1199
+	bls	.L1216
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L1201
+	cbnz	r3, .L1218
 	mov	r1, r3
-	ldr	r0, .L1227+20
+	ldr	r0, .L1244+20
 	bl	printf
-.L1201:
-	ldr	r3, .L1227
+.L1218:
+	ldr	r3, .L1244
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1215
-.L1228:
+	b	.L1232
+.L1245:
 	.align	2
-.L1227:
+.L1244:
 	.word	.LANCHOR154
 	.word	idb_buf
 	.word	.LANCHOR18
 	.word	.LC15
 	.word	.LANCHOR149
 	.word	.LC17
-.L1199:
+.L1216:
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1229
+	ldr	r0, .L1246
 	bl	memset
-	ldr	r3, .L1229+4
+	ldr	r3, .L1246+4
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
@@ -8496,61 +8550,61 @@ idb_write_data:
 	smulbb	r5, r5, fp
 	uxth	r5, r5
 	cmp	r5, #512
-	bcs	.L1183
+	bcs	.L1200
 	adds	r0, r5, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1183:
-	ldr	r7, .L1229+8
+.L1200:
+	ldr	r7, .L1246+8
 	mov	r1, r5
-	ldr	r10, .L1229+36
+	ldr	r10, .L1246+36
 	mov	r0, r4
 	bl	__aeabi_uidivmod
 	mov	r6, r1
 	subs	r3, r4, r1
 	str	r3, [sp, #24]
-.L1187:
+.L1204:
 	lsrs	r2, r6, #2
-	beq	.L1184
-	ldr	r0, .L1229+12
+	beq	.L1201
+	ldr	r0, .L1246+12
 	adds	r1, r2, #1
-	ldr	r3, .L1229+16
+	ldr	r3, .L1246+16
 	ldrb	r0, [r0]	@ zero_extendqisi2
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r0, .L1185
+	cbz	r0, .L1202
 	ldr	r0, [r10]
-	ldr	r5, .L1229+20
+	ldr	r5, .L1246+20
 	cmp	r0, r5
 	it	eq
 	moveq	r3, r1
-.L1185:
+.L1202:
 	add	r3, r3, #1073741824
 	subs	r3, r3, #1
 	lsls	r3, r3, #2
 	str	r3, [sp, #40]
-.L1184:
+.L1201:
 	movw	r3, #61424
 	str	r3, [sp, #44]
-	ldr	r3, .L1229+16
+	ldr	r3, .L1246+16
 	ldrh	r5, [r3, r2, lsl #1]
-	ldr	r3, .L1229+12
+	ldr	r3, .L1246+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1186
+	cbz	r3, .L1203
 	ldr	r3, [r10]
-	ldr	r1, .L1229+20
+	ldr	r1, .L1246+20
 	cmp	r3, r1
 	it	eq
 	moveq	r5, r2
-.L1186:
+.L1203:
 	ldr	r3, [sp, #24]
 	adds	r6, r6, #4
-	ldr	r2, .L1229+24
-	ldr	r8, .L1229+4
+	ldr	r2, .L1246+24
+	ldr	r8, .L1246+4
 	mla	r3, r5, fp, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r3, [sp, #32]
 	ldrb	r3, [r2]	@ zero_extendqisi2
-	ldr	r2, .L1229+28
+	ldr	r2, .L1246+28
 	str	r3, [sp, #28]
 	ldrb	r0, [r2]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -8578,12 +8632,12 @@ idb_write_data:
 	mov	r1, r0
 	movs	r0, #0
 	bl	FlashPageProgMsbFFData
-	ldr	r3, .L1229+32
+	ldr	r3, .L1246+32
 	cmp	r7, r3
-	bne	.L1187
+	bne	.L1204
 	ldr	r3, [r8]
 	mov	r0, r4
-	ldr	r7, .L1229
+	ldr	r7, .L1246
 	movs	r6, #0
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
 	ldrh	r1, [r3, #10]
@@ -8595,47 +8649,47 @@ idb_write_data:
 	subs	r3, r4, r1
 	str	r3, [sp, #28]
 	ubfx	r5, r5, #2, #2
-.L1188:
+.L1205:
 	cmp	r6, #512
-	bcs	.L1195
-	ldr	r1, .L1229+12
+	bcs	.L1212
+	ldr	r1, .L1246+12
 	rsb	r3, r5, #4
 	uxth	r3, r3
-	ldr	r2, .L1229+16
+	ldr	r2, .L1246+16
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r3, [sp, #24]
 	add	r3, r10, r6
 	lsrs	r3, r3, #2
 	ldrh	r2, [r2, r3, lsl #1]
-	cbz	r1, .L1189
-	ldr	r1, .L1229+36
-	ldr	r0, .L1229+20
+	cbz	r1, .L1206
+	ldr	r1, .L1246+36
+	ldr	r0, .L1246+20
 	ldr	r1, [r1]
 	cmp	r1, r0
 	it	eq
 	moveq	r2, r3
-.L1189:
+.L1206:
 	ldr	r3, [sp, #28]
 	add	r5, r5, r3
-	ldr	r3, .L1229+24
+	ldr	r3, .L1246+24
 	mla	r5, r2, r8, r5
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #32]
-	ldr	r3, .L1229+4
+	ldr	r3, .L1246+4
 	ldr	r3, [r3]
 	ldrb	fp, [r3, #9]	@ zero_extendqisi2
-	ldr	r3, .L1229+40
+	ldr	r3, .L1246+40
 	ldrh	r2, [r3, #26]
-	ldr	r3, .L1229+44
+	ldr	r3, .L1246+44
 	ldr	r3, [r3]
 	muls	r3, r2, r3
 	mul	r3, fp, r3
 	cmp	r5, r3
-	bcs	.L1190
-	ldr	r3, .L1229+28
+	bcs	.L1207
+	ldr	r3, .L1246+28
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.L1190:
+.L1207:
 	movs	r0, #0
 	bl	flash_boot_enter_slc_mode
 	mov	r1, fp
@@ -8649,11 +8703,11 @@ idb_write_data:
 	bl	FlashReadPage
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1191
-	ldr	r3, .L1229+28
+	bne	.L1208
+	ldr	r3, .L1246+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #40
-	beq	.L1191
+	beq	.L1208
 	movs	r0, #40
 	bl	FlashBchSel
 	add	r3, sp, #40
@@ -8662,7 +8716,7 @@ idb_write_data:
 	movs	r0, #0
 	bl	FlashReadPage
 	mov	r5, r0
-.L1191:
+.L1208:
 	movs	r0, #0
 	bl	flash_boot_exit_slc_mode
 	ldr	r0, [sp, #32]
@@ -8671,63 +8725,63 @@ idb_write_data:
 	mov	r5, #-1
 	it	ne
 	movne	r5, #0
-	cbz	r5, .L1192
-.L1195:
-	ldr	r3, .L1229+8
+	cbz	r5, .L1209
+.L1212:
+	ldr	r3, .L1246+8
 	movs	r5, #0
-	ldr	r6, .L1229
-.L1193:
+	ldr	r6, .L1246
+.L1210:
 	mov	r7, r3
 	ldr	r1, [r6, r5, lsl #2]
 	ldr	r2, [r7]
 	adds	r3, r3, #4
 	cmp	r1, r2
-	beq	.L1196
+	beq	.L1213
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1229
+	ldr	r0, .L1246
 	bl	memset
 	str	r5, [sp]
 	mov	r1, r4
 	ldr	r3, [r7]
 	ldr	r2, [r6, r5, lsl #2]
-	ldr	r0, .L1229+48
+	ldr	r0, .L1246+48
 	bl	printf
 	mov	r0, r4
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1197
+	bls	.L1214
 	ldr	r3, [sp, #8]
 	adds	r0, r3, r4
 	bl	FW_FlashBlockErase.constprop.41
-.L1197:
+.L1214:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #36]
 	add	r4, r4, r3
-	b	.L1182
-.L1192:
+	b	.L1199
+.L1209:
 	ldr	r3, [sp, #24]
 	add	r6, r6, r3
 	add	r7, r7, r3, lsl #9
 	uxth	r6, r6
-	b	.L1188
-.L1196:
+	b	.L1205
+.L1213:
 	adds	r5, r5, #1
 	cmp	r5, #65536
-	bne	.L1193
+	bne	.L1210
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #1
 	cmp	r3, #5
 	str	r3, [sp, #12]
-	bls	.L1197
-	b	.L1201
-.L1230:
+	bls	.L1214
+	b	.L1218
+.L1247:
 	.align	2
-.L1229:
+.L1246:
 	.word	gp_flash_check_buf
 	.word	.LANCHOR18
 	.word	idb_buf
@@ -8768,11 +8822,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1233
+	ldr	r0, .L1250
 	bx	lr
-.L1234:
+.L1251:
 	.align	2
-.L1233:
+.L1250:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -8803,9 +8857,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L1238
+	ldr	r3, .L1255
 	movs	r4, #0
-	ldr	r5, .L1238+4
+	ldr	r5, .L1255+4
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
@@ -8815,8 +8869,8 @@ NandcInit:
 	str	r0, [r3, #16]
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
-	ldr	r3, .L1238+8
-	ldr	r2, .L1238+12
+	ldr	r3, .L1255+8
+	ldr	r2, .L1255+12
 	str	r0, [r3]
 	ldr	r3, [r0]
 	and	r3, r3, #253952
@@ -8825,7 +8879,7 @@ NandcInit:
 	str	r1, [r2]
 	orr	r3, r3, #256
 	ldr	r2, [r0, #352]
-	ldr	r1, .L1238+16
+	ldr	r1, .L1255+16
 	ubfx	r2, r2, #16, #4
 	str	r2, [r1]
 	ldr	r2, [r0, #352]
@@ -8841,23 +8895,23 @@ NandcInit:
 	str	r3, [r0, #4]
 	movw	r3, #8322
 	str	r3, [r0, #344]
-	ldr	r3, .L1238+20
+	ldr	r3, .L1255+20
 	str	r3, [r0, #304]
 	mov	r0, #36864
 	bl	ftl_malloc
-	ldr	r3, .L1238+24
+	ldr	r3, .L1255+24
 	str	r0, [r3]
-	ldr	r3, .L1238+28
+	ldr	r3, .L1255+28
 	str	r0, [r3]
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
 	str	r4, [r3, #24]
-	ldr	r3, .L1238+32
+	ldr	r3, .L1255+32
 	str	r4, [r3]
 	pop	{r3, r4, r5, pc}
-.L1239:
+.L1256:
 	.align	2
-.L1238:
+.L1255:
 	.word	.LANCHOR6
 	.word	.LANCHOR29
 	.word	.LANCHOR19
@@ -8879,114 +8933,114 @@ NandcInit:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1245
+	ldr	r3, .L1262
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r2, .L1245+4
+	ldr	r2, .L1262+4
 	movs	r6, #12
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+8
-	ldr	r5, .L1245+12
-	ldr	r10, .L1245+304
+	ldr	r3, .L1262+8
+	ldr	r5, .L1262+12
+	ldr	r10, .L1262+304
 	str	r4, [r3]
-	ldr	r3, .L1245+16
-	ldr	r8, .L1245+308
-	ldr	fp, .L1245+312
+	ldr	r3, .L1262+16
+	ldr	r8, .L1262+308
+	ldr	fp, .L1262+312
 	str	r4, [r3]
-	ldr	r3, .L1245+20
+	ldr	r3, .L1262+20
 	str	r4, [r3]
-	ldr	r3, .L1245+24
+	ldr	r3, .L1262+24
 	str	r4, [r3]
-	ldr	r3, .L1245+28
+	ldr	r3, .L1262+28
 	str	r4, [r3]
-	ldr	r3, .L1245+32
+	ldr	r3, .L1262+32
 	str	r4, [r3]
-	ldr	r3, .L1245+36
+	ldr	r3, .L1262+36
 	str	r4, [r3]
-	ldr	r3, .L1245+40
+	ldr	r3, .L1262+40
 	str	r4, [r3]
-	ldr	r3, .L1245+44
+	ldr	r3, .L1262+44
 	str	r4, [r3]
-	ldr	r3, .L1245+48
+	ldr	r3, .L1262+48
 	str	r4, [r3]
-	ldr	r3, .L1245+52
+	ldr	r3, .L1262+52
 	str	r4, [r3]
-	ldr	r3, .L1245+56
+	ldr	r3, .L1262+56
 	str	r4, [r3]
-	ldr	r3, .L1245+60
+	ldr	r3, .L1262+60
 	str	r4, [r3]
-	ldr	r3, .L1245+64
+	ldr	r3, .L1262+64
 	str	r4, [r3]
-	ldr	r3, .L1245+68
+	ldr	r3, .L1262+68
 	str	r4, [r3]
-	ldr	r3, .L1245+72
+	ldr	r3, .L1262+72
 	str	r4, [r3]
-	ldr	r3, .L1245+76
+	ldr	r3, .L1262+76
 	str	r4, [r3]
 	movw	r3, #65535
 	str	r3, [r2]
-	ldr	r2, .L1245+80
+	ldr	r2, .L1262+80
 	str	r4, [r2]
-	ldr	r2, .L1245+84
+	ldr	r2, .L1262+84
 	str	r4, [r2]
-	ldr	r2, .L1245+88
+	ldr	r2, .L1262+88
 	str	r4, [r2]
-	ldr	r2, .L1245+92
+	ldr	r2, .L1262+92
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1245+96
+	ldr	r2, .L1262+96
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1245+100
+	ldr	r2, .L1262+100
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1245+104
+	ldr	r2, .L1262+104
 	strh	r3, [r2]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L1245+108
+	ldr	r3, .L1262+108
 	strh	r2, [r3]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L1245+112
+	ldr	r3, .L1262+112
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1245+116
+	ldr	r3, .L1262+116
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+120
+	ldr	r3, .L1262+120
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+124
+	ldr	r3, .L1262+124
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L1245+128
+	ldr	r3, .L1262+128
 	strh	r4, [r3]	@ movhi
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+132
+	ldr	r3, .L1262+132
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	movs	r5, #36
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+136
+	ldr	r3, .L1262+136
 	str	r0, [r3]
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1245+140
+	ldr	r3, .L1262+140
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+144
+	ldr	r3, .L1262+144
 	str	r0, [r3]
 	mov	r0, r7
 	bl	ftl_malloc
-	ldr	r3, .L1245+148
-	ldr	r7, .L1245+152
+	ldr	r3, .L1262+148
+	ldr	r7, .L1262+152
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+156
+	ldr	r3, .L1262+156
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+160
+	ldr	r3, .L1262+160
 	ldrh	r5, [r7]
 	str	r0, [r3]
 	ldrh	r3, [r10]
@@ -8995,157 +9049,157 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r8]
 	bl	ftl_malloc
-	ldr	r3, .L1245+164
+	ldr	r3, .L1262+164
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+168
+	ldr	r3, .L1262+168
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+172
+	ldr	r3, .L1262+172
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+176
+	ldr	r3, .L1262+176
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+180
+	ldr	r3, .L1262+180
 	str	r0, [r3]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+184
+	ldr	r3, .L1262+184
 	str	r0, [r3]
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+188
+	ldr	r3, .L1262+188
 	ldrh	r5, [r10]
-	ldr	r10, .L1245+316
+	ldr	r10, .L1262+316
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L1245+192
+	ldr	r3, .L1262+192
 	str	r0, [r3]
 	lsls	r0, r5, #2
-	ldr	r5, .L1245+196
+	ldr	r5, .L1262+196
 	bl	ftl_malloc
-	ldr	r3, .L1245+200
+	ldr	r3, .L1262+200
 	str	r0, [r3]
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
-	ldr	r8, .L1245+320
+	ldr	r8, .L1262+320
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+204
+	ldr	r3, .L1262+204
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1245+208
+	ldr	r3, .L1262+208
 	str	r0, [r3]
 	ldrh	r3, [r8]
-	ldr	r0, .L1245+212
+	ldr	r0, .L1262+212
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
 	and	r0, r0, r3, lsl #9
 	strh	r3, [r8]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L1245+216
+	ldr	r3, .L1262+216
 	str	r0, [r3]
 	adds	r0, r0, #32
-	ldr	r3, .L1245+220
+	ldr	r3, .L1262+220
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+224
+	ldr	r3, .L1262+224
 	str	r0, [r3]
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1245+228
+	ldr	r3, .L1262+228
 	str	r0, [r3]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L1245+232
-	ldr	r8, .L1245+324
+	ldr	r3, .L1262+232
+	ldr	r8, .L1262+324
 	str	r0, [r3]
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L1245+236
+	ldr	r3, .L1262+236
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+240
+	ldr	r3, .L1262+240
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L1245+244
+	ldr	r3, .L1262+244
 	str	r0, [r3]
 	ldrh	r0, [r8]
-	ldr	r8, .L1245+328
+	ldr	r8, .L1262+328
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1245+248
+	ldr	r3, .L1262+248
 	str	r0, [r3]
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
 	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L1245+252
+	ldr	r3, .L1262+252
 	lsls	r2, r2, #2
 	str	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L1245+256
+	ldr	r3, .L1262+256
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1245+260
+	ldr	r3, .L1262+260
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L1245+264
-	ldr	r4, .L1245+268
+	ldr	r3, .L1262+264
+	ldr	r4, .L1262+268
 	str	r0, [r3]
 	ldr	r0, [r10]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L1245+272
+	ldr	r3, .L1262+272
 	str	r0, [r3]
 	ldrh	r0, [r4]
 	muls	r0, r6, r0
-	ldr	r6, .L1245+276
+	ldr	r6, .L1262+276
 	bl	ftl_malloc
-	ldr	r3, .L1245+280
+	ldr	r3, .L1262+280
 	str	r0, [r3]
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+284
+	ldr	r3, .L1262+284
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r5]
-	ldr	r5, .L1245+288
+	ldr	r5, .L1262+288
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L1245+292
+	ldr	r3, .L1262+292
 	str	r0, [r3]
-	ldr	r3, .L1245+296
+	ldr	r3, .L1262+296
 	ldrh	r0, [r3]
 	ldrh	r3, [r6]
 	adds	r0, r0, #31
@@ -9156,15 +9210,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	ldrh	r1, [r5]
 	movs	r2, #1
-	ldr	r3, .L1245+300
+	ldr	r3, .L1262+300
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
 	mov	r4, r3
 	str	r0, [r4, #28]!
-	b	.L1246
-.L1247:
+	b	.L1263
+.L1264:
 	.align	2
-.L1245:
+.L1262:
 	.word	.LANCHOR139
 	.word	.LANCHOR173
 	.word	.LANCHOR157
@@ -9248,33 +9302,33 @@ FtlMemInit:
 	.word	.LANCHOR190
 	.word	.LANCHOR62
 	.word	.LANCHOR63
-.L1246:
+.L1263:
 	mov	r0, r1
-.L1241:
+.L1258:
 	cmp	r2, r6
-	bcc	.L1242
+	bcc	.L1259
 	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1248
+	ldr	r2, .L1265
 	movs	r1, #0
 	adds	r3, r3, #24
-.L1243:
+.L1260:
 	cmp	r3, r2
-	bne	.L1244
+	bne	.L1261
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1242:
+.L1259:
 	ldr	r5, [r3, #28]
 	adds	r2, r2, #1
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
-	b	.L1241
-.L1244:
+	b	.L1258
+.L1261:
 	str	r1, [r3, #4]!
-	b	.L1243
-.L1249:
+	b	.L1260
+.L1266:
 	.align	2
-.L1248:
+.L1265:
 	.word	.LANCHOR75+56
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
@@ -9374,12 +9428,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1256
+	ldr	r3, .L1273
 	ldr	r0, [r3]
 	bx	lr
-.L1257:
+.L1274:
 	.align	2
-.L1256:
+.L1273:
 	.word	.LANCHOR69
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
@@ -9395,51 +9449,51 @@ rknand_print_hex:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1267
+	ldr	r7, .L1284
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
 	mov	r4, r5
-.L1259:
+.L1276:
 	cmp	r4, r10
-	bne	.L1265
-	ldr	r1, .L1267+4
-	ldr	r0, .L1267+8
+	bne	.L1282
+	ldr	r1, .L1284+4
+	ldr	r0, .L1284+8
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L1265:
-	cbnz	r5, .L1260
+.L1282:
+	cbnz	r5, .L1277
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1267+12
+	ldr	r0, .L1284+12
 	bl	printf
-.L1260:
+.L1277:
 	cmp	r8, #4
-	bne	.L1261
+	bne	.L1278
 	ldr	r1, [r6, r4, lsl #2]
-.L1266:
+.L1283:
 	mov	r0, r7
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L1264
+	bls	.L1281
 	movs	r5, #0
-	ldr	r1, .L1267+4
-	ldr	r0, .L1267+8
+	ldr	r1, .L1284+4
+	ldr	r0, .L1284+8
 	bl	printf
-.L1264:
+.L1281:
 	adds	r4, r4, #1
-	b	.L1259
-.L1261:
+	b	.L1276
+.L1278:
 	cmp	r8, #2
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1266
-.L1268:
+	b	.L1283
+.L1285:
 	.align	2
-.L1267:
+.L1284:
 	.word	.LC19
 	.word	.LC20
 	.word	.LC7
@@ -9458,7 +9512,7 @@ HynixGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #172
-	ldr	r5, .L1368
+	ldr	r5, .L1385
 	cmp	r0, #2
 	mov	r1, #173
 	mov	r2, #174
@@ -9470,18 +9524,18 @@ HynixGetReadRetryDefault:
 	strb	r1, [r5, #5]
 	strb	r2, [r5, #6]
 	strb	r3, [r5, #7]
-	bne	.L1270
+	bne	.L1287
 	movs	r3, #167
 	movs	r2, #247
 	strb	r3, [r5, #4]
-	ldr	r3, .L1368+4
+	ldr	r3, .L1385+4
 	strb	r2, [r3, #17]
-.L1326:
+.L1343:
 	mov	r10, #7
-	b	.L1362
-.L1270:
+	b	.L1379
+.L1287:
 	cmp	r0, #3
-	bne	.L1272
+	bne	.L1289
 	movs	r3, #176
 	strb	r3, [r5, #4]
 	movs	r3, #177
@@ -9497,31 +9551,31 @@ HynixGetReadRetryDefault:
 	movs	r3, #182
 	strb	r3, [r5, #10]
 	movs	r3, #183
-.L1363:
+.L1380:
 	mov	r10, #8
 	strb	r3, [r5, #11]
 	mov	fp, r10
-.L1271:
+.L1288:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1276
+	bhi	.L1293
 	mov	r8, #0
-.L1277:
-	ldr	r3, .L1368+8
+.L1294:
+	ldr	r3, .L1385+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1283
-.L1284:
-	ldr	r3, .L1368
+	bhi	.L1300
+.L1301:
+	ldr	r3, .L1385
 	strb	fp, [r3, #1]
 	strb	r10, [r3, #2]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1272:
+.L1289:
 	cmp	r0, #4
-	bne	.L1273
+	bne	.L1290
 	movs	r0, #204
 	strb	r1, [r5, #9]
 	strb	r0, [r5, #4]
@@ -9534,10 +9588,10 @@ HynixGetReadRetryDefault:
 	movs	r0, #205
 	strb	r0, [r5, #8]
 	strb	r2, [r5, #10]
-	b	.L1363
-.L1273:
+	b	.L1380
+.L1290:
 	cmp	r0, #5
-	bne	.L1274
+	bne	.L1291
 	movs	r3, #56
 	mov	r10, #8
 	strb	r3, [r5, #4]
@@ -9547,12 +9601,12 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #59
 	strb	r3, [r5, #7]
-.L1362:
+.L1379:
 	mov	fp, #4
-	b	.L1271
-.L1274:
+	b	.L1288
+.L1291:
 	cmp	r0, #6
-	bne	.L1275
+	bne	.L1292
 	movs	r3, #14
 	mov	r10, #12
 	strb	r3, [r5, #4]
@@ -9562,10 +9616,10 @@ HynixGetReadRetryDefault:
 	strb	r3, [r5, #6]
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1362
-.L1275:
+	b	.L1379
+.L1292:
 	cmp	r0, #7
-	bne	.L1326
+	bne	.L1343
 	movs	r3, #176
 	mov	r10, #12
 	strb	r3, [r5, #4]
@@ -9588,12 +9642,12 @@ HynixGetReadRetryDefault:
 	movs	r3, #213
 	strb	r3, [r5, #13]
 	mov	fp, #10
-	b	.L1271
-.L1283:
-	ldr	r2, .L1368+12
+	b	.L1288
+.L1300:
+	ldr	r2, .L1385+12
 	movs	r6, #0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1368+16
+	ldr	r3, .L1385+16
 	ldr	r7, [r3, r2, lsl #3]
 	add	r4, r5, r2, lsl #6
 	add	r3, r3, r2, lsl #3
@@ -9602,7 +9656,7 @@ HynixGetReadRetryDefault:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1278:
+.L1295:
 	adds	r1, r5, r6
 	str	r2, [r3]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
@@ -9618,25 +9672,25 @@ HynixGetReadRetryDefault:
 	adds	r6, r6, #1
 	uxtb	r1, r6
 	cmp	fp, r1
-	bhi	.L1278
-	ldr	r7, .L1368+4
+	bhi	.L1295
+	ldr	r7, .L1385+4
 	mov	r1, r4
 	movs	r2, #0
-.L1281:
+.L1298:
 	movs	r3, #1
 	adds	r6, r7, r2
-.L1280:
+.L1297:
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
 	cmp	r3, #7
-	bne	.L1280
+	bne	.L1297
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	cmp	r2, #4
-	bne	.L1281
+	bne	.L1298
 	movs	r3, #0
 	add	r8, r8, #1
 	strb	r3, [r4, #16]
@@ -9646,11 +9700,11 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L1277
-.L1276:
+	b	.L1294
+.L1293:
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L1284
+	bhi	.L1301
 	smulbb	r3, r10, fp
 	asrs	r2, r3, #2
 	lsls	r3, r3, #4
@@ -9661,19 +9715,19 @@ HynixGetReadRetryDefault:
 	lsls	r3, r2, #2
 	str	r3, [sp, #32]
 	movs	r3, #0
-.L1367:
+.L1384:
 	str	r3, [sp, #28]
 	ldrb	r3, [sp, #28]	@ zero_extendqisi2
 	str	r3, [sp, #16]
-	ldr	r3, .L1368+8
+	ldr	r3, .L1385+8
 	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1284
+	bls	.L1301
 	ldr	r2, [sp, #16]
-	ldr	r3, .L1368+12
+	ldr	r3, .L1385+12
 	ldrb	r8, [r3, r2]	@ zero_extendqisi2
-	ldr	r3, .L1368+16
+	ldr	r3, .L1385+16
 	mov	r0, r8
 	ldr	r2, [r3, r8, lsl #3]
 	add	r3, r3, r8, lsl #3
@@ -9686,7 +9740,7 @@ HynixGetReadRetryDefault:
 	movs	r2, #255
 	str	r2, [r3, #2056]
 	bl	NandcWaitFlashReady
-	ldr	r1, .L1368
+	ldr	r1, .L1385
 	cmp	r4, #7
 	it	eq
 	moveq	r3, #160
@@ -9702,25 +9756,25 @@ HynixGetReadRetryDefault:
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1288
+	bne	.L1305
 	movs	r2, #255
 	str	r2, [r3, #2052]
 	movs	r2, #64
 	str	r2, [r3, #2048]
 	movs	r2, #204
-.L1365:
+.L1382:
 	str	r2, [r3, #2052]
 	movs	r2, #77
-	b	.L1366
-.L1288:
+	b	.L1383
+.L1305:
 	subs	r2, r4, #5
 	cmp	r2, #1
-	bhi	.L1290
-	ldr	r2, .L1368
+	bhi	.L1307
+	ldr	r2, .L1385
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
 	movs	r2, #82
-.L1366:
+.L1383:
 	str	r2, [r3, #2048]
 	cmp	r4, #6
 	ldr	r3, [sp, #4]
@@ -9755,57 +9809,57 @@ HynixGetReadRetryDefault:
 	subs	r3, r4, #5
 	cmp	r3, #1
 	str	r3, [sp, #40]
-	bls	.L1327
+	bls	.L1344
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1293:
-	ldr	r3, .L1368+20
+.L1310:
+	ldr	r3, .L1385+20
 	subs	r2, r2, #1
 	ldr	r3, [r3]
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1294:
+.L1311:
 	ldr	r6, [r5, #2048]
 	strb	r6, [r0, #1]!
 	cmp	r2, r0
-	bne	.L1294
+	bne	.L1311
 	cmp	r4, #7
-	bne	.L1295
+	bne	.L1312
 	movs	r2, #0
-.L1297:
+.L1314:
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
 	cmp	r0, #12
-	beq	.L1296
+	beq	.L1313
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1296
+	beq	.L1313
 	adds	r2, r2, #1
 	cmp	r2, #8
-	bne	.L1297
-.L1298:
+	bne	.L1314
+.L1315:
 	movs	r1, #0
-	ldr	r0, .L1368+24
+	ldr	r0, .L1385+24
 	bl	printf
-.L1300:
-	b	.L1300
-.L1290:
+.L1317:
+	b	.L1317
+.L1307:
 	movs	r2, #174
 	str	r2, [r3, #2052]
 	movs	r2, #0
 	str	r2, [r3, #2048]
 	movs	r2, #176
-	b	.L1365
-.L1327:
+	b	.L1382
+.L1344:
 	movs	r2, #16
-	b	.L1293
-.L1369:
+	b	.L1310
+.L1386:
 	.align	2
-.L1368:
+.L1385:
 	.word	.LANCHOR20
 	.word	.LANCHOR196
 	.word	.LANCHOR25
@@ -9813,44 +9867,44 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR6
 	.word	.LANCHOR147
 	.word	.LC21
-.L1296:
+.L1313:
 	cmp	r1, #6
-	bhi	.L1298
-.L1299:
-	ldr	r3, .L1370
+	bhi	.L1315
+.L1316:
+	ldr	r3, .L1387
 	ldr	lr, [r3]
 	mov	r3, lr
-.L1304:
+.L1321:
 	ldr	r1, [sp, #52]
 	sub	r2, r3, lr
 	cmp	r1, r2
-	bgt	.L1305
-	ldr	r3, .L1370
+	bgt	.L1322
+	ldr	r3, .L1387
 	ldr	r1, [r3]
 	ldr	r3, [sp, #32]
 	adds	r0, r1, r3
 	movs	r3, #8
-.L1307:
+.L1324:
 	mov	r7, r0
 	movs	r6, #0
-.L1306:
+.L1323:
 	ldr	r2, [r7]
 	adds	r6, r6, #1
 	mvns	r2, r2
 	str	r2, [r7], #4
 	ldr	r2, [sp, #12]
 	cmp	r2, r6
-	bgt	.L1306
+	bgt	.L1323
 	ldr	r2, [sp, #48]
 	subs	r3, r3, #1
 	add	r0, r0, r2
-	bne	.L1307
+	bne	.L1324
 	str	r1, [sp, #20]
 	str	r3, [sp, #24]
-.L1313:
+.L1330:
 	movs	r0, #0
 	mov	r2, r0
-.L1312:
+.L1329:
 	movs	r3, #1
 	mov	ip, #0
 	lsl	r7, r3, r2
@@ -9858,7 +9912,7 @@ HynixGetReadRetryDefault:
 	str	r3, [sp, #44]
 	mov	r6, r7
 	ldr	r7, [sp, #20]
-.L1310:
+.L1327:
 	ldr	r3, [r7]
 	bics	r3, r6, r3
 	ldr	r3, [sp, #32]
@@ -9868,14 +9922,14 @@ HynixGetReadRetryDefault:
 	ldr	r3, [sp, #44]
 	subs	r3, r3, #1
 	str	r3, [sp, #44]
-	bne	.L1310
+	bne	.L1327
 	cmp	ip, #8
 	add	r2, r2, #1
 	itt	hi
 	movhi	r3, r6
 	orrhi	r0, r0, r3
 	cmp	r2, #32
-	bne	.L1312
+	bne	.L1329
 	ldr	r3, [sp, #20]
 	str	r0, [r3], #4
 	str	r3, [sp, #20]
@@ -9885,78 +9939,78 @@ HynixGetReadRetryDefault:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #12]
 	cmp	r3, r2
-	bgt	.L1313
+	bgt	.L1330
 	subs	r2, r1, #4
 	add	r0, r1, #28
 	movs	r3, #0
-.L1316:
+.L1333:
 	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1315
+	cbnz	r6, .L1332
 	adds	r3, r3, #1
-.L1315:
+.L1332:
 	cmp	r0, r2
-	bne	.L1316
+	bne	.L1333
 	cmp	r3, #7
-	ble	.L1317
-	ldr	r0, .L1370+4
+	ble	.L1334
+	ldr	r0, .L1387+4
 	mov	r3, #1024
 	movs	r2, #1
 	bl	rknand_print_hex
 	movs	r1, #0
-	ldr	r0, .L1370+8
+	ldr	r0, .L1387+8
 	bl	printf
-.L1318:
-	b	.L1318
-.L1295:
+.L1335:
+	b	.L1335
+.L1312:
 	cmp	r4, #6
-	bne	.L1299
+	bne	.L1316
 	adds	r3, r3, #7
-.L1301:
+.L1318:
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
 	cmp	r2, #12
-	beq	.L1299
+	beq	.L1316
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1299
+	beq	.L1316
 	cmp	r3, r1
-	bne	.L1301
+	bne	.L1318
 	movs	r1, #0
-	ldr	r0, .L1370+8
+	ldr	r0, .L1387+8
 	bl	printf
-.L1303:
-	b	.L1303
-.L1305:
+.L1320:
+	b	.L1320
+.L1322:
 	ldr	r2, [r5, #2048]
 	strb	r2, [r3], #1
-	b	.L1304
-.L1317:
+	b	.L1321
+.L1334:
 	cmp	r4, #6
-	beq	.L1329
+	beq	.L1346
 	cmp	r4, #7
 	ite	eq
 	moveq	ip, #10
 	movne	ip, #8
-.L1319:
+.L1336:
 	add	r3, fp, #-1
 	ldr	r1, [sp, #36]
 	uxtb	r3, r3
 	movs	r0, #0
 	adds	r3, r3, #1
-.L1320:
+.L1337:
 	mov	r7, r1
 	mov	r2, lr
-.L1321:
+.L1338:
 	ldrb	r6, [r2], #1	@ zero_extendqisi2
 	strb	r6, [r7], #1
 	sub	r6, r2, lr
 	uxtb	r6, r6
 	cmp	fp, r6
-	bhi	.L1321
+	bhi	.L1338
 	adds	r0, r0, #1
 	add	lr, lr, r3
 	cmp	r10, r0
 	add	r1, r1, ip
-	bgt	.L1320
+	bgt	.L1337
 	ldr	r3, [sp, #4]
 	mov	r0, r8
 	ldr	r2, [sp, #8]
@@ -9966,11 +10020,11 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #40]
 	cmp	r3, #1
-	bhi	.L1323
+	bhi	.L1340
 	movs	r3, #54
 	mov	r1, #-1
 	str	r3, [r6, #2056]
-	ldr	r3, .L1370+12
+	ldr	r3, .L1387+12
 	ldr	r0, [sp, #16]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r5, #2052]
@@ -9979,22 +10033,22 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r6, #2056]
 	bl	FlashReadCmd
-.L1324:
+.L1341:
 	mov	r0, r8
 	bl	NandcWaitFlashReady
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1367
-.L1329:
+	b	.L1384
+.L1346:
 	mov	ip, #4
-	b	.L1319
-.L1323:
+	b	.L1336
+.L1340:
 	movs	r3, #56
 	str	r3, [r6, #2056]
-	b	.L1324
-.L1371:
+	b	.L1341
+.L1388:
 	.align	2
-.L1370:
+.L1387:
 	.word	.LANCHOR147
 	.word	.LC22
 	.word	.LC21
@@ -10013,72 +10067,72 @@ FlashGetReadRetryDefault:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	mov	r3, r0
-	cbz	r0, .L1372
+	cbz	r0, .L1389
 	subs	r2, r0, #1
 	cmp	r2, #6
-	bhi	.L1374
+	bhi	.L1391
 	b	HynixGetReadRetryDefault
-.L1374:
+.L1391:
 	cmp	r0, #49
-	bne	.L1375
-	ldr	r0, .L1395
+	bne	.L1392
+	ldr	r0, .L1412
 	movs	r2, #64
-	ldr	r1, .L1395+4
+	ldr	r1, .L1412+4
 	strb	r3, [r0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
-.L1393:
+.L1410:
 	adds	r0, r0, #4
 	b	ftl_memcpy
-.L1375:
+.L1392:
 	cmp	r0, #33
-	beq	.L1376
+	beq	.L1393
 	sub	r2, r0, #65
 	cmp	r2, #1
-	bhi	.L1377
-.L1376:
-	ldr	r0, .L1395
+	bhi	.L1394
+.L1393:
+	ldr	r0, .L1412
 	strb	r3, [r0]
 	movs	r3, #4
-.L1394:
+.L1411:
 	strb	r3, [r0, #1]
 	movs	r3, #7
 	strb	r3, [r0, #2]
 	movs	r2, #45
-	ldr	r1, .L1395+8
-	b	.L1393
-.L1377:
+	ldr	r1, .L1412+8
+	b	.L1410
+.L1394:
 	cmp	r0, #34
-	beq	.L1378
+	beq	.L1395
 	cmp	r0, #67
-	bne	.L1379
-.L1378:
-	ldr	r0, .L1395
+	bne	.L1396
+.L1395:
+	ldr	r0, .L1412
 	strb	r3, [r0]
 	movs	r3, #5
-	b	.L1394
-.L1379:
+	b	.L1411
+.L1396:
 	cmp	r0, #35
-	beq	.L1380
+	beq	.L1397
 	cmp	r0, #68
-	bne	.L1372
-.L1380:
-	ldr	r0, .L1395
+	bne	.L1389
+.L1397:
+	ldr	r0, .L1412
 	movs	r2, #95
-	ldr	r1, .L1395+12
+	ldr	r1, .L1412+12
 	strb	r3, [r0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
-	b	.L1393
-.L1372:
+	b	.L1410
+.L1389:
 	bx	lr
-.L1396:
+.L1413:
 	.align	2
-.L1395:
+.L1412:
 	.word	.LANCHOR20
 	.word	.LANCHOR14
 	.word	.LANCHOR9
@@ -10101,28 +10155,28 @@ FlashInit:
 	mov	r0, #32768
 	movs	r5, #0
 	bl	ftl_malloc
-	ldr	r3, .L1490
-	ldr	r10, .L1490+132
-	ldr	r8, .L1490+136
+	ldr	r3, .L1507
+	ldr	r10, .L1507+132
+	ldr	r8, .L1507+136
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1490+4
-	ldr	r6, .L1490+8
-	ldr	r7, .L1490+12
+	ldr	r3, .L1507+4
+	ldr	r6, .L1507+8
+	ldr	r7, .L1507+12
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1490+16
+	ldr	r3, .L1507+16
 	str	r0, [r3]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L1490+20
+	ldr	r3, .L1507+20
 	str	r0, [r3]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L1490+24
-	ldr	r2, .L1490+28
+	ldr	r3, .L1507+24
+	ldr	r2, .L1507+28
 	strb	r5, [r8]
 	str	r0, [r3]
 	movs	r3, #50
@@ -10130,23 +10184,23 @@ FlashInit:
 	mov	r0, r4
 	strb	r3, [r2]
 	movs	r2, #128
-	ldr	r3, .L1490+32
-	ldr	r4, .L1490+36
+	ldr	r3, .L1507+32
+	ldr	r4, .L1507+36
 	strb	r5, [r7]
 	str	r5, [r3]
-	ldr	r3, .L1490+40
+	ldr	r3, .L1507+40
 	str	r2, [r3]
-	ldr	r3, .L1490+44
+	ldr	r3, .L1507+44
 	str	r5, [r3]
 	movs	r3, #60
 	strb	r3, [r6]
 	bl	NandcInit
 	str	r10, [sp, #20]
-	ldr	r10, .L1490+140
+	ldr	r10, .L1507+140
 	str	r8, [sp, #16]
 	mov	r8, r6
 	mov	r6, r4
-.L1402:
+.L1419:
 	uxtb	fp, r5
 	mov	r0, fp
 	bl	FlashReset
@@ -10186,10 +10240,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1398
+	bhi	.L1415
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1490+48
+	ldr	r0, .L1507+48
 	str	r1, [sp, #12]
 	ldrb	r1, [r4, #4]	@ zero_extendqisi2
 	str	r1, [sp, #8]
@@ -10199,17 +10253,17 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
-.L1398:
-	cbnz	r5, .L1399
+.L1415:
+	cbnz	r5, .L1416
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L1443
+	bhi	.L1460
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L1443
-.L1399:
+	beq	.L1460
+.L1416:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	adds	r5, r5, #1
 	adds	r4, r4, #8
@@ -10218,38 +10272,38 @@ FlashInit:
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
 	cmp	r5, #4
-	bne	.L1402
+	bne	.L1419
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L1403
-	ldr	r3, .L1490+52
+	beq	.L1420
+	ldr	r3, .L1507+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
-.L1403:
+.L1420:
 	mov	r2, #852
 	movs	r1, #0
-	ldr	r0, .L1490+56
+	ldr	r0, .L1507+56
 	bl	ftl_memset
-	ldr	r4, .L1490+60
-	ldr	r3, .L1490+64
-	ldr	r5, .L1490+68
+	ldr	r4, .L1507+60
+	ldr	r3, .L1507+64
+	ldr	r5, .L1507+68
 	str	r3, [r4]
 	movs	r3, #0
 	strb	r3, [r5]
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #161
-	beq	.L1404
+	beq	.L1421
 	cmp	r3, #218
-	beq	.L1404
+	beq	.L1421
 	and	r2, r3, #223
 	cmp	r2, #209
-	beq	.L1404
+	beq	.L1421
 	cmp	r3, #220
-	bne	.L1405
+	bne	.L1422
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
-	bne	.L1405
-.L1404:
+	bne	.L1422
+.L1421:
 	ldr	r1, [sp, #16]
 	movs	r2, #1
 	strb	r2, [r1]
@@ -10258,113 +10312,113 @@ FlashInit:
 	strb	r2, [r8]
 	strb	r2, [r1]
 	ldrb	r1, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1490+72
+	ldr	r2, .L1507+72
 	cmp	r1, #152
 	strb	r1, [r2, #1]
 	strb	r3, [r2, #2]
-	bne	.L1406
+	bne	.L1423
 	ldrsb	r1, [r6, #4]
 	cmp	r1, #0
 	itt	ge
 	movge	r1, #24
 	strbge	r1, [r8]
-.L1406:
-	ldr	r1, .L1490+76
-	ldr	r0, .L1490+80
+.L1423:
+	ldr	r1, .L1507+76
+	ldr	r0, .L1507+80
 	ldr	r1, [r1]
 	cmp	r1, r0
-	beq	.L1407
+	beq	.L1424
 	movw	r0, #2049
 	cmp	r1, r0
-	bne	.L1408
-.L1407:
+	bne	.L1425
+.L1424:
 	movs	r1, #16
 	strb	r1, [r8]
-.L1408:
+.L1425:
 	cmp	r3, #218
-	bne	.L1409
+	bne	.L1426
 	mov	r1, #2048
-.L1486:
+.L1503:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L1410:
+.L1427:
 	movs	r2, #32
-	ldr	r1, .L1490+84
-	ldr	r0, .L1490+88
+	ldr	r1, .L1507+84
+	ldr	r0, .L1507+88
 	bl	ftl_memcpy
 	movs	r2, #32
-	ldr	r1, .L1490+72
-	ldr	r0, .L1490+64
+	ldr	r1, .L1507+72
+	ldr	r0, .L1507+64
 	bl	ftl_memcpy
-.L1405:
+.L1422:
 	ldr	r3, [sp, #16]
-	ldr	r8, .L1490+144
+	ldr	r8, .L1507+144
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1412
+	bne	.L1429
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L1414
+	cbnz	r0, .L1431
 	ldr	r3, [r4]
-	ldr	r10, .L1490+100
+	ldr	r10, .L1507+100
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
 	lsls	r1, r3, #31
 	and	r0, r3, #7
 	strb	r0, [r10]
-	bmi	.L1414
+	bmi	.L1431
 	movs	r3, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r10]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L1414:
+.L1431:
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L1412
+	beq	.L1429
 	ldr	r3, [r4]
-	ldr	r0, .L1490+92
+	ldr	r0, .L1507+92
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r2, r0, #1
-	beq	.L1397
+	beq	.L1414
 	bl	FlashDieInfoInit
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
 	ldr	r3, [r4]
-	ldr	r2, .L1490+96
+	ldr	r2, .L1507+96
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
-	blt	.L1417
+	blt	.L1434
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
 	cmp	r1, r2, asr #8
-	bge	.L1418
-.L1417:
+	bge	.L1435
+.L1434:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L1418:
-	ldr	r3, .L1490+100
+.L1435:
+	ldr	r3, .L1507+100
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1419
+	beq	.L1436
 	bl	FlashSavePhyInfo
-	ldr	r3, .L1490+104
+	ldr	r3, .L1507+104
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1419:
+.L1436:
 	bl	FlashSavePhyInfo
-.L1412:
+.L1429:
 	ldr	fp, [r4]
-	ldr	r10, .L1490+100
+	ldr	r10, .L1507+100
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
 	ldrh	r0, [fp, #10]
 	strb	r3, [r8]
@@ -10372,11 +10426,11 @@ FlashInit:
 	ubfx	r2, r3, #7, #1
 	ubfx	r1, r3, #3, #1
 	strb	r2, [r5]
-	ldr	r2, .L1490+108
-	ldr	r5, .L1490+112
+	ldr	r2, .L1507+108
+	ldr	r5, .L1507+112
 	strb	r1, [r2]
 	ubfx	r1, r3, #4, #1
-	ldr	r2, .L1490+116
+	ldr	r2, .L1507+116
 	ubfx	r3, r3, #8, #3
 	strb	r3, [r10]
 	movs	r3, #0
@@ -10392,21 +10446,21 @@ FlashInit:
 	mov	ip, r5
 	ldrh	r2, [r3, #16]
 	tst	r2, #64
-	beq	.L1421
+	beq	.L1438
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1490+120
-	ldr	r2, .L1490+124
+	ldr	r3, .L1507+120
+	ldr	r2, .L1507+124
 	strb	r0, [r3]
-	ldr	r3, .L1490+56
+	ldr	r3, .L1507+56
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
 	ldrb	lr, [r3, #2]	@ zero_extendqisi2
 	strb	r1, [r2]
-	ldr	r1, .L1490+128
+	ldr	r1, .L1507+128
 	strb	lr, [r1]
-	b	.L1491
-.L1492:
+	b	.L1508
+.L1509:
 	.align	2
-.L1490:
+.L1507:
 	.word	.LANCHOR147
 	.word	.LANCHOR153
 	.word	.LANCHOR152
@@ -10444,85 +10498,85 @@ FlashInit:
 	.word	.LANCHOR1
 	.word	.LANCHOR6
 	.word	.LANCHOR8
-.L1491:
+.L1508:
 	add	lr, r0, #-1
 	cmp	lr, #6
 	mov	lr, r1
-	bhi	.L1422
-	ldr	r2, .L1493
+	bhi	.L1439
+	ldr	r2, .L1510
 	str	r2, [r5]
 	subs	r2, r0, #5
 	cmp	r2, #1
-	bhi	.L1423
-	ldr	r2, .L1493+4
+	bhi	.L1440
+	ldr	r2, .L1510+4
 	adds	r3, r3, #20
 	movs	r1, #1
 	str	r1, [r2]
-.L1424:
+.L1441:
 	subs	r1, r3, #1
 	movs	r2, #0
 	adds	r3, r3, #31
-.L1426:
+.L1443:
 	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1425
+	cbnz	r5, .L1442
 	adds	r2, r2, #1
-.L1425:
+.L1442:
 	cmp	r3, r1
-	bne	.L1426
+	bne	.L1443
 	cmp	r2, #27
-	bls	.L1421
+	bls	.L1438
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1421:
-	ldr	r3, .L1493+8
+.L1438:
+	ldr	r3, .L1510+8
 	ldr	r2, [r3]
-	ldr	r3, .L1493+12
+	ldr	r3, .L1510+12
 	cmp	r2, r3
-	bne	.L1437
+	bne	.L1454
 	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1437
+	cbz	r3, .L1454
 	ldr	r3, [r4]
 	movs	r2, #0
 	strb	r2, [r3, #18]
-.L1437:
+.L1454:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L1438
+	bne	.L1455
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1438
+	cbz	r3, .L1455
 	movs	r3, #0
 	movs	r0, #1
 	strb	r3, [r7]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L1438:
+.L1455:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L1439
+	beq	.L1456
 	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1440
+	cbnz	r2, .L1457
 	lsls	r3, r3, #31
-	bmi	.L1439
-.L1440:
-	ldr	r3, .L1493+16
+	bmi	.L1456
+.L1457:
+	ldr	r3, .L1510+16
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
-.L1439:
+.L1456:
 	movs	r0, #0
 	movs	r7, #16
 	bl	flash_exit_slc_mode
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L1493+20
+	ldr	r0, .L1510+20
 	bl	FlashReadIdbDataRaw
 	ldr	r8, [r4]
 	ldr	r3, [sp, #20]
-	ldr	r4, .L1493+24
+	ldr	r4, .L1510+24
 	ldrb	r1, [r8, #12]	@ zero_extendqisi2
 	strb	r7, [r3]
 	ldrh	r5, [r8, #10]
@@ -10533,7 +10587,7 @@ FlashInit:
 	ldr	r3, [r6]
 	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	ldr	r3, .L1493+28
+	ldr	r3, .L1510+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r8, #13]	@ zero_extendqisi2
@@ -10553,7 +10607,7 @@ FlashInit:
 	uxth	r5, r5
 	cmp	r2, #1
 	strh	r5, [r4, #22]	@ movhi
-	bne	.L1441
+	bne	.L1458
 	lsls	r3, r3, #1
 	lsrs	r2, r6, #1
 	lsls	r5, r5, #1
@@ -10562,92 +10616,92 @@ FlashInit:
 	strh	r2, [r4, #14]	@ movhi
 	strh	r5, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L1441:
+.L1458:
 	ldrb	r0, [r8, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-.L1397:
+.L1414:
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1409:
+.L1426:
 	cmp	r3, #220
-	bne	.L1410
+	bne	.L1427
 	mov	r1, #4096
-	b	.L1486
-.L1423:
+	b	.L1503
+.L1440:
 	add	r2, r3, #28
 	adds	r3, r3, #20
 	cmp	r0, #7
 	it	eq
 	moveq	r3, r2
-	b	.L1424
-.L1422:
+	b	.L1441
+.L1439:
 	sub	r3, r0, #17
 	cmp	r3, #2
-	bhi	.L1428
-	ldr	r3, .L1493+32
+	bhi	.L1445
+	ldr	r3, .L1510+32
 	cmp	r0, #19
 	str	r3, [r5]
 	ite	ne
 	movne	r3, #7
 	moveq	r3, #15
 	strb	r3, [r1]
-	b	.L1421
-.L1428:
+	b	.L1438
+.L1445:
 	cmp	r0, #33
-	beq	.L1430
+	beq	.L1447
 	sub	r3, r0, #65
 	cmp	r3, #1
-	bhi	.L1431
-.L1430:
-	ldr	r3, .L1493+36
+	bhi	.L1448
+.L1447:
+	ldr	r3, .L1510+36
 	str	r3, [ip]
 	movs	r3, #4
 	strb	r3, [r2]
 	movs	r3, #7
 	strb	r3, [lr]
-	b	.L1421
-.L1431:
+	b	.L1438
+.L1448:
 	sub	r3, r0, #67
 	uxtb	r3, r3
 	cmp	r3, #1
-	bls	.L1432
+	bls	.L1449
 	sub	r1, r0, #34
 	cmp	r1, #1
-	bhi	.L1433
-.L1432:
-	ldr	r1, .L1493+36
+	bhi	.L1450
+.L1449:
+	ldr	r1, .L1510+36
 	cmp	r0, #35
 	str	r1, [ip]
-	ldr	r1, .L1493+40
-	beq	.L1434
+	ldr	r1, .L1510+40
+	beq	.L1451
 	cmp	r0, #68
-	beq	.L1434
+	beq	.L1451
 	movs	r0, #7
-.L1487:
+.L1504:
 	cmp	r3, #1
 	strb	r0, [r1]
 	ite	ls
 	movls	r3, #4
 	movhi	r3, #5
 	strb	r3, [r2]
-	b	.L1421
-.L1434:
+	b	.L1438
+.L1451:
 	movs	r0, #17
-	b	.L1487
-.L1433:
+	b	.L1504
+.L1450:
 	cmp	r0, #49
 	itt	eq
-	ldreq	r3, .L1493+44
+	ldreq	r3, .L1510+44
 	streq	r3, [r5]
-	b	.L1421
-.L1443:
+	b	.L1438
+.L1460:
 	mvn	r0, #1
-	b	.L1397
-.L1494:
+	b	.L1414
+.L1511:
 	.align	2
-.L1493:
+.L1510:
 	.word	HynixReadRetrial
 	.word	.LANCHOR36
 	.word	.LANCHOR29
@@ -10674,19 +10728,19 @@ FlashReadSlc2KPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r8, r1
-	ldr	r3, .L1524
+	ldr	r3, .L1541
 	mov	fp, r2
 	mov	r4, r0
 	movs	r7, #0
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1496:
+.L1513:
 	cmp	r7, r8
-	bne	.L1509
+	bne	.L1526
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1509:
+.L1526:
 	sub	r3, r8, r7
 	add	r2, sp, #12
 	uxtb	r3, r3
@@ -10695,19 +10749,19 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #8
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1524+4
+	ldr	r2, .L1541+4
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1497
+	bhi	.L1514
 	mov	r3, #-1
 	str	r3, [r4]
-.L1498:
+.L1515:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1496
-.L1497:
-	ldr	r2, .L1524+8
+	b	.L1513
+.L1514:
+	ldr	r2, .L1541+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -10725,7 +10779,7 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
-	ldr	r3, .L1524+12
+	ldr	r3, .L1541+12
 	mov	r6, r0
 	ldr	r1, [sp, #12]
 	mov	r0, r5
@@ -10733,13 +10787,13 @@ FlashReadSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L1499
+	cbz	r3, .L1516
 	add	r3, r3, #2048
-.L1499:
+.L1516:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L1500
+	cbz	r2, .L1517
 	adds	r2, r2, #8
-.L1500:
+.L1517:
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, r10
@@ -10748,60 +10802,60 @@ FlashReadSlc2KPages:
 	mov	r1, r0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L1524+16
+	ldr	r3, .L1541+16
 	cmp	r6, r1
 	it	cc
 	movcc	r6, r1
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	add	r3, r2, r2, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1501
+	bls	.L1518
 	adds	r5, r6, #1
 	it	ne
 	movne	r6, #256
 	str	r6, [r4]
-.L1504:
+.L1521:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1505
+	cbz	r3, .L1522
 	ldr	r1, [r3, #12]
 	adds	r1, r1, #1
-	bne	.L1505
+	bne	.L1522
 	ldr	r1, [r3, #8]
 	adds	r0, r1, #1
-	bne	.L1505
+	bne	.L1522
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	it	ne
 	strne	r1, [r4]
-.L1505:
+.L1522:
 	ldr	r3, [r4]
 	adds	r1, r3, #1
-	bne	.L1498
+	bne	.L1515
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1524+20
+	ldr	r0, .L1541+20
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1507
+	cbz	r1, .L1524
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1524+24
+	ldr	r0, .L1541+24
 	bl	rknand_print_hex
-.L1507:
+.L1524:
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
-	beq	.L1498
+	beq	.L1515
 	movs	r3, #4
-	ldr	r0, .L1524+28
+	ldr	r0, .L1541+28
 	mov	r2, r3
 	bl	rknand_print_hex
-	b	.L1498
-.L1501:
+	b	.L1515
+.L1518:
 	movs	r3, #0
 	str	r3, [r4]
-	b	.L1504
-.L1525:
+	b	.L1521
+.L1542:
 	.align	2
-.L1524:
+.L1541:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -10822,36 +10876,36 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1617
+	ldr	r3, .L1634
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	mov	r10, r0
 	str	r1, [sp, #24]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	cbnz	r3, .L1527
-	ldr	r2, .L1617+4
+	cbnz	r3, .L1544
+	ldr	r2, .L1634+4
 	mov	r8, r3
 	str	r3, [sp, #8]
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1617+8
+	ldr	r2, .L1634+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
-.L1528:
+.L1545:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
-	bcc	.L1566
+	bcc	.L1583
 	movs	r0, #0
-	b	.L1526
-.L1527:
+	b	.L1543
+.L1544:
 	bl	FlashReadSlc2KPages
-.L1526:
+.L1543:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1566:
+.L1583:
 	ldr	r2, [sp, #8]
 	movs	r3, #36
 	ldr	r1, [sp, #12]
@@ -10867,85 +10921,85 @@ FlashReadPages:
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1617+12
+	ldr	r2, .L1634+12
 	mov	r5, r0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1530
+	bhi	.L1547
 	mov	r3, #-1
 	str	r3, [r10, fp]
-.L1531:
+.L1548:
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-	b	.L1528
-.L1530:
-	ldr	r2, .L1617+16
+	b	.L1545
+.L1547:
+	ldr	r2, .L1634+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1617+20
+	ldr	r3, .L1634+20
 	mov	r0, r4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1617+24
+	ldr	r3, .L1634+24
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r1, #1
 	cmp	r3, #6
-	bhi	.L1533
-	ldr	r3, .L1617+28
+	bhi	.L1550
+	ldr	r3, .L1634+28
 	cmp	r1, #7
 	add	r2, r3, r4
 	ldrb	r3, [r2, #12]	@ zero_extendqisi2
 	it	eq
 	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
-	ldr	r2, .L1617+32
+	ldr	r2, .L1634+32
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1533
-	ldr	r2, .L1617+36
+	beq	.L1550
+	ldr	r2, .L1634+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1533:
+.L1550:
 	mov	r0, r4
 	bl	NandcFlashCs
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1535
+	beq	.L1552
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1536
-.L1535:
-	ldr	r3, .L1617+40
+	bge	.L1553
+.L1552:
+	ldr	r3, .L1634+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1536
+	cbz	r3, .L1553
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-.L1543:
+.L1560:
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
-	bne	.L1538
+	bne	.L1555
 	cmp	r4, #255
-	beq	.L1568
-.L1538:
-	cbz	r5, .L1540
-	ldr	r3, .L1617+44
+	beq	.L1585
+.L1555:
+	cbz	r5, .L1557
+	ldr	r3, .L1634+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
-.L1541:
+.L1558:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r5, .L1539
+	cbz	r5, .L1556
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
-.L1539:
+.L1556:
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -10953,30 +11007,30 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
-	ldr	r3, .L1617+8
+	ldr	r3, .L1634+8
 	mov	r6, r0
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1542
+	cbz	r3, .L1559
 	adds	r0, r0, #1
-	bne	.L1542
-	ldr	r3, .L1617+8
+	bne	.L1559
+	ldr	r3, .L1634+8
 	movs	r5, #0
 	strb	r5, [r3]
-	b	.L1543
-.L1536:
+	b	.L1560
+.L1553:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1543
-.L1540:
+	b	.L1560
+.L1557:
 	mov	r0, r4
 	bl	FlashReadCmd
-	b	.L1541
-.L1568:
+	b	.L1558
+.L1585:
 	movs	r5, #0
-	b	.L1539
-.L1542:
-	cbz	r5, .L1544
-	ldr	r3, .L1617+44
+	b	.L1556
+.L1559:
+	cbz	r5, .L1561
+	ldr	r3, .L1634+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -10995,30 +11049,30 @@ FlashReadPages:
 	mov	r8, r0
 	it	eq
 	moveq	r5, #0
-.L1544:
+.L1561:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-	ldr	r3, .L1617+8
+	ldr	r3, .L1634+8
 	adds	r1, r6, #1
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
-	bne	.L1545
-	ldr	r3, .L1617+48
+	bne	.L1562
+	ldr	r3, .L1634+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1546
-.L1550:
-	ldr	r3, .L1617+52
+	cbnz	r3, .L1563
+.L1567:
+	ldr	r3, .L1634+52
 	ldr	r5, [r3]
 	cmp	r5, #0
-	bne	.L1547
+	bne	.L1564
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	b	.L1616
-.L1546:
-	ldr	r3, .L1617+56
+	b	.L1633
+.L1563:
+	ldr	r3, .L1634+56
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
@@ -11030,33 +11084,33 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1549
-	ldr	r3, .L1617+60
+	beq	.L1566
+	ldr	r3, .L1634+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1569
-.L1549:
+	bls	.L1586
+.L1566:
 	ubfx	r0, r5, #8, #8
 	bl	NandcSetDdrPara
 	adds	r3, r6, #1
-	beq	.L1550
-.L1569:
+	beq	.L1567
+.L1586:
 	movs	r5, #0
-.L1545:
-	ldr	r3, .L1617+60
+.L1562:
+	ldr	r3, .L1634+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bls	.L1558
-	ldr	r3, .L1617+52
+	bls	.L1575
+	ldr	r3, .L1634+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1558
+	bne	.L1575
 	mov	r6, #256
-	b	.L1553
-.L1618:
+	b	.L1570
+.L1635:
 	.align	2
-.L1617:
+.L1634:
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR5
@@ -11073,7 +11127,7 @@ FlashReadPages:
 	.word	.LANCHOR145
 	.word	.LANCHOR19
 	.word	.LANCHOR33
-.L1547:
+.L1564:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -11081,128 +11135,128 @@ FlashReadPages:
 	blx	r5
 	adds	r5, r0, #1
 	mov	r6, r0
-	bne	.L1551
-	ldr	r3, .L1619
+	bne	.L1568
+	ldr	r3, .L1636
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1552
-	ldr	r2, .L1619+4
+	bhi	.L1569
+	ldr	r2, .L1636+4
 	movs	r3, #0
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1552:
+.L1569:
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
-	ldr	r2, .L1619+8
+	ldr	r2, .L1636+8
 	mov	r6, r0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1619+12
+	ldr	r0, .L1636+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	adds	r0, r6, #1
-	bne	.L1551
-	ldr	r3, .L1619+16
+	bne	.L1568
+	ldr	r3, .L1636+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1553
+	cbz	r5, .L1570
 	ldr	r3, [sp, #12]
 	mov	r0, r4
 	cmp	r3, #1
-	beq	.L1554
+	beq	.L1571
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1555
-.L1554:
+	bge	.L1572
+.L1571:
 	bl	flash_enter_slc_mode
-.L1556:
-	ldr	r3, .L1619+20
+.L1573:
+	ldr	r3, .L1636+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
-.L1616:
+.L1633:
 	adds	r1, r0, #1
 	mov	r6, r0
 	mov	r5, #0
-	bne	.L1558
-.L1553:
+	bne	.L1575
+.L1570:
 	str	r6, [r10, fp]
-.L1559:
+.L1576:
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
-	bne	.L1561
-	ldr	r2, .L1619+8
+	bne	.L1578
+	ldr	r2, .L1636+8
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1619+24
+	ldr	r0, .L1636+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1561
+	cbz	r1, .L1578
 	movs	r3, #4
-	ldr	r0, .L1619+28
+	ldr	r0, .L1636+28
 	mov	r2, r3
 	bl	rknand_print_hex
-.L1561:
-	cbz	r5, .L1563
-	ldr	r3, .L1619+8
+.L1578:
+	cbz	r5, .L1580
+	ldr	r3, .L1636+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
-	bls	.L1564
-	ldr	r3, .L1619+20
+	bls	.L1581
+	ldr	r3, .L1636+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
-.L1564:
+.L1581:
 	cmp	r8, #-1
 	add	r3, fp, #36
 	str	r8, [r10, r3]
-	beq	.L1563
+	beq	.L1580
 	cmp	r8, #256
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
-.L1563:
+.L1580:
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1565
+	beq	.L1582
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bge	.L1531
-.L1565:
-	ldr	r3, .L1619+16
+	bge	.L1548
+.L1582:
+	ldr	r3, .L1636+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1531
+	beq	.L1548
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-	b	.L1531
-.L1555:
+	b	.L1548
+.L1572:
 	bl	flash_exit_slc_mode
-	b	.L1556
-.L1551:
+	b	.L1573
+.L1568:
 	movs	r5, #0
-.L1558:
+.L1575:
 	cmp	r6, #256
-	beq	.L1553
+	beq	.L1570
 	movs	r3, #0
 	str	r3, [r10, fp]
-	b	.L1559
-.L1620:
+	b	.L1576
+.L1637:
 	.align	2
-.L1619:
+.L1636:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
 	.word	.LANCHOR33
@@ -11229,23 +11283,23 @@ FlashProgSlc2KPages:
 	mov	r8, r1
 	mov	r4, r0
 	mov	r6, r0
-	ldr	r3, .L1650
+	ldr	r3, .L1667
 	movs	r7, #0
-	ldr	fp, .L1650+28
+	ldr	fp, .L1667+28
 	str	r2, [sp, #8]
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.L1622:
+.L1639:
 	cmp	r7, r8
-	bne	.L1628
+	bne	.L1645
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L1639
-.L1649:
+	bne	.L1656
+.L1666:
 	movs	r0, #0
 	add	sp, sp, #64
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1628:
+.L1645:
 	sub	r3, r8, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
@@ -11254,19 +11308,19 @@ FlashProgSlc2KPages:
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1650+4
+	ldr	r2, .L1667+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L1623
+	bhi	.L1640
 	mov	r3, #-1
 	str	r3, [r6]
-.L1624:
+.L1641:
 	adds	r7, r7, #1
 	adds	r6, r6, #36
-	b	.L1622
-.L1623:
-	ldr	r2, .L1650+8
+	b	.L1639
+.L1640:
+	ldr	r2, .L1667+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -11298,13 +11352,13 @@ FlashProgSlc2KPages:
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
 	ldr	r3, [r6, #8]
-	cbz	r3, .L1625
+	cbz	r3, .L1642
 	add	r3, r3, #2048
-.L1625:
+.L1642:
 	ldr	r2, [r6, #12]
-	cbz	r2, .L1626
+	cbz	r2, .L1643
 	adds	r2, r2, #8
-.L1626:
+.L1643:
 	str	r2, [sp]
 	movs	r1, #1
 	mov	r2, r10
@@ -11326,24 +11380,24 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r6]
 	bl	NandcFlashDeCs
-	b	.L1624
-.L1635:
+	b	.L1641
+.L1652:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1630
+	bne	.L1647
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+12
+	ldr	r0, .L1667+12
 	bl	printf
-.L1631:
+.L1648:
 	add	r8, r8, #1
 	adds	r4, r4, #36
-.L1629:
+.L1646:
 	cmp	r7, r8
-	bne	.L1635
-	b	.L1649
-.L1630:
+	bne	.L1652
+	b	.L1666
+.L1647:
 	sub	r3, r7, r8
-	ldr	fp, .L1650+32
+	ldr	fp, .L1667+32
 	uxtb	r3, r3
 	add	r2, sp, #20
 	ldr	r1, [sp, #8]
@@ -11372,46 +11426,46 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
-	bne	.L1632
+	bne	.L1649
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+16
+	ldr	r0, .L1667+16
 	bl	printf
 	str	r5, [r4]
-.L1632:
+.L1649:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1633
+	cbz	r3, .L1650
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1633
+	beq	.L1650
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+20
+	ldr	r0, .L1667+20
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1633:
+.L1650:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1631
+	beq	.L1648
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1631
+	beq	.L1648
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1650+24
+	ldr	r0, .L1667+24
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1631
-.L1639:
+	b	.L1648
+.L1656:
 	mov	r8, #0
-	ldr	r10, .L1650+36
-	b	.L1629
-.L1651:
+	ldr	r10, .L1667+36
+	b	.L1646
+.L1668:
 	.align	2
-.L1650:
+.L1667:
 	.word	.LANCHOR31
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -11436,7 +11490,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #72
-	ldr	r5, .L1704
+	ldr	r5, .L1721
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
@@ -11444,36 +11498,36 @@ FlashProgPages:
 	str	r3, [sp, #20]
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
-	ldr	r5, .L1704+4
+	ldr	r5, .L1721+4
 	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1653
-	ldr	r3, .L1704+8
+	cbnz	r7, .L1670
+	ldr	r3, .L1721+8
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
-.L1654:
+.L1671:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	bcc	.L1667
-	ldr	r6, .L1704+12
+	bcc	.L1684
+	ldr	r6, .L1721+12
 	movs	r5, #0
-	ldr	r7, .L1704+16
-.L1668:
+	ldr	r7, .L1721+16
+.L1685:
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
-	bcc	.L1670
+	bcc	.L1687
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
-	bne	.L1671
-.L1679:
+	bne	.L1688
+.L1696:
 	movs	r0, #0
-	b	.L1652
-.L1653:
+	b	.L1669
+.L1670:
 	bl	FlashProgSlc2KPages
-.L1652:
+.L1669:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1667:
+.L1684:
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -11486,81 +11540,81 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1704+12
+	ldr	r3, .L1721+12
 	mov	r10, r0
 	ldr	r0, [sp, #32]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L1656
+	bhi	.L1673
 	mov	r3, #-1
 	str	r3, [r4, r6]
-.L1657:
+.L1674:
 	adds	r7, r7, #1
-	b	.L1654
-.L1656:
-	ldr	r3, .L1704+20
+	b	.L1671
+.L1673:
+	ldr	r3, .L1721+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	ldr	r3, .L1704+24
+	ldr	r3, .L1721+24
 	it	eq
 	moveq	r10, #0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1659
+	cbz	r3, .L1676
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1659:
+.L1676:
 	ldr	r3, [sp, #32]
 	movs	r1, #0
-	ldr	r2, .L1704+24
+	ldr	r2, .L1721+24
 	add	r2, r2, r3, lsl #4
 	str	r1, [r2, #12]
 	ldr	r1, [sp, #28]
 	str	fp, [r2, #8]
 	str	r1, [r2, #4]
 	cmp	r10, #0
-	beq	.L1660
+	beq	.L1677
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
-.L1660:
-	ldr	r2, .L1704+28
+.L1677:
+	ldr	r2, .L1721+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	lsls	r3, r3, #4
-	ldr	r2, .L1704+24
+	ldr	r2, .L1721+24
 	mov	r0, r5
 	strb	r5, [r2, r3]
-	ldr	r3, .L1704+12
+	ldr	r3, .L1721+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1661
+	bne	.L1678
 	bl	NandcWaitFlashReady
-.L1662:
+.L1679:
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1663
-	ldr	r3, .L1704+32
+	bhi	.L1680
+	ldr	r3, .L1721+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1663
-	ldr	r1, .L1704+36
+	cbz	r3, .L1680
+	ldr	r1, .L1721+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L1663:
+.L1680:
 	mov	r0, r5
 	bl	NandcFlashCs
 	cmp	r8, #1
 	mov	r0, r5
-	bne	.L1664
-	ldr	r3, .L1704+16
+	bne	.L1681
+	ldr	r3, .L1721+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1664
+	beq	.L1681
 	bl	flash_enter_slc_mode
-.L1665:
+.L1682:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
@@ -11572,11 +11626,11 @@ FlashProgPages:
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
 	cmp	r10, #0
-	beq	.L1666
+	beq	.L1683
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1704+40
+	ldr	r3, .L1721+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
 	adds	r6, r6, #36
@@ -11587,7 +11641,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1704+44
+	ldr	r3, .L1721+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
@@ -11600,19 +11654,19 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-.L1666:
+.L1683:
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
 	mov	r0, r5
 	add	r7, r7, r10
 	bl	NandcFlashDeCs
-	b	.L1657
-.L1661:
+	b	.L1674
+.L1678:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #32]
 	mov	r0, r5
-	ldr	r3, .L1704+40
+	ldr	r3, .L1721+40
 	ldr	r1, [sp, #28]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
@@ -11621,45 +11675,45 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r5
 	bl	NandcFlashDeCs
-	b	.L1662
-.L1664:
+	b	.L1679
+.L1681:
 	bl	flash_exit_slc_mode
-	b	.L1665
-.L1670:
+	b	.L1682
+.L1687:
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
 	cmp	r8, #1
-	bne	.L1669
+	bne	.L1686
 	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1669
-	ldr	r2, .L1704+24
+	cbz	r3, .L1686
+	ldr	r2, .L1721+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1669:
+.L1686:
 	adds	r5, r5, #1
-	b	.L1668
-.L1671:
-	ldr	r10, .L1704+64
+	b	.L1685
+.L1688:
+	ldr	r10, .L1721+64
 	movs	r7, #0
-.L1672:
+.L1689:
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
-	beq	.L1679
+	beq	.L1696
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1673
+	bne	.L1690
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+48
+	ldr	r0, .L1721+48
 	bl	printf
-.L1674:
+.L1691:
 	adds	r7, r7, #1
 	adds	r4, r4, #36
-	b	.L1672
-.L1673:
+	b	.L1689
+.L1690:
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1704+68
+	ldr	fp, .L1721+68
 	mov	r1, r8
 	mov	r0, r4
 	mov	r6, r4
@@ -11688,42 +11742,42 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
-	bne	.L1675
+	bne	.L1692
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+52
+	ldr	r0, .L1721+52
 	bl	printf
 	str	r5, [r4]
-.L1675:
+.L1692:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1676
+	cbz	r3, .L1693
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1676
+	beq	.L1693
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+56
+	ldr	r0, .L1721+56
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-.L1676:
+.L1693:
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
-	beq	.L1674
+	beq	.L1691
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	beq	.L1674
+	beq	.L1691
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1704+60
+	ldr	r0, .L1721+60
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4]
-	b	.L1674
-.L1705:
+	b	.L1691
+.L1722:
 	.align	2
-.L1704:
+.L1721:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR31
@@ -11754,14 +11808,14 @@ FlashProgPages:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1709
+	ldr	r3, .L1726
 	push	{r4, r5, lr}
 	mov	r4, r0
 	sub	sp, sp, #108
 	ldr	r3, [r3]
 	cmp	r0, r3
-	bcc	.L1708
-	ldr	r5, .L1709+4
+	bcc	.L1725
+	ldr	r5, .L1726+4
 	add	r0, sp, #40
 	movs	r2, #32
 	movs	r1, #165
@@ -11793,17 +11847,17 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 	bl	FlashEraseBlocks
-.L1706:
+.L1723:
 	mov	r0, r4
 	add	sp, sp, #108
 	@ sp needed
 	pop	{r4, r5, pc}
-.L1708:
+.L1725:
 	movs	r4, #0
-	b	.L1706
-.L1710:
+	b	.L1723
+.L1727:
 	.align	2
-.L1709:
+.L1726:
 	.word	.LANCHOR149
 	.word	.LANCHOR153
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -11818,48 +11872,48 @@ FlashTestBlk:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1756
+	ldr	r3, .L1773
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	str	r0, [sp, #8]
 	ldr	r3, [r3]
 	str	r1, [sp, #4]
 	cmp	r3, #0
-	bne	.L1738
-	ldr	r2, .L1756+4
+	bne	.L1755
+	ldr	r2, .L1773+4
 	mov	r10, r3
 	mov	r5, r3
 	mov	r4, r3
 	mov	r8, #36
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-	ldr	r2, .L1756+8
+	ldr	r2, .L1773+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #12]
-	ldr	r2, .L1756+12
+	ldr	r2, .L1773+12
 	str	r0, [r2]
-	ldr	r2, .L1756+16
+	ldr	r2, .L1773+16
 	ldrh	fp, [r2]
-	ldr	r2, .L1756+20
+	ldr	r2, .L1773+20
 	ldr	r7, [r2]
-	ldr	r2, .L1756+24
+	ldr	r2, .L1773+24
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
-	ldr	r2, .L1756+28
+	ldr	r2, .L1773+28
 	ldrh	r2, [r2]
 	str	r2, [sp, #24]
-.L1713:
+.L1730:
 	uxth	r2, r10
 	cmp	fp, r2
-	bhi	.L1717
+	bhi	.L1734
 	cmp	r5, #0
-	beq	.L1711
+	beq	.L1728
 	ldr	r3, [sp, #12]
 	mov	r0, r7
-	ldr	r10, .L1756+4
+	ldr	r10, .L1773+4
 	mov	r8, #0
 	mov	r2, r5
-	ldr	r7, .L1756+20
+	ldr	r7, .L1773+20
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
@@ -11869,44 +11923,44 @@ FtlLowFormatEraseBlock:
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
 	strb	r3, [r10]
 	mov	r10, #36
-.L1719:
+.L1736:
 	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L1721
+	bhi	.L1738
 	ldr	r3, [sp, #4]
 	cmp	r3, #0
-	bne	.L1722
+	bne	.L1739
 	uxth	r6, r6
 	movs	r3, #6
 	str	r3, [sp, #16]
 	movs	r3, #1
 	str	r3, [sp, #12]
-.L1723:
+.L1740:
 	mov	r8, #0
-.L1732:
-	ldr	r3, .L1756+16
+.L1749:
+	ldr	r3, .L1773+16
 	mov	fp, #0
 	mov	r5, fp
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L1756+20
+	ldr	r3, .L1773+20
 	ldr	r10, [r3]
-	ldr	r3, .L1756+32
+	ldr	r3, .L1773+32
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L1756+36
+	ldr	r3, .L1773+36
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L1756+28
+	ldr	r3, .L1773+28
 	ldrh	r3, [r3]
 	str	r3, [sp, #36]
-.L1724:
+.L1741:
 	ldr	r3, [sp, #24]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L1727
-	cbz	r5, .L1711
-	ldr	fp, .L1756+4
+	bhi	.L1744
+	cbz	r5, .L1728
+	ldr	fp, .L1773+4
 	movs	r3, #1
 	mov	r0, r10
 	movs	r7, #0
@@ -11915,59 +11969,59 @@ FtlLowFormatEraseBlock:
 	strb	r7, [fp]
 	bl	FlashProgPages
 	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	ldr	r10, .L1756+20
+	ldr	r10, .L1773+20
 	strb	r3, [fp]
 	mov	fp, #36
-.L1729:
+.L1746:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1731
+	bhi	.L1748
 	ldr	r3, [sp, #16]
 	add	r8, r8, r3
 	ldr	r3, [sp, #12]
 	uxth	r8, r8
 	cmp	r3, r8
-	bhi	.L1732
-	ldr	r8, .L1756+20
+	bhi	.L1749
+	ldr	r8, .L1773+20
 	movs	r7, #0
 	mov	r10, #36
-.L1733:
+.L1750:
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L1735
+	bhi	.L1752
 	ldr	r3, [sp, #8]
 	cmp	r3, #63
-	bls	.L1736
+	bls	.L1753
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1711
-.L1736:
-	ldr	r3, .L1756+20
+	cbz	r3, .L1728
+.L1753:
+	ldr	r3, .L1773+20
 	mov	r2, r5
 	mov	r1, r6
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.L1711:
+.L1728:
 	mov	r0, r4
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1717:
+.L1734:
 	mul	r2, r8, r10
 	movs	r3, #0
 	ldr	r1, [sp, #8]
 	str	r3, [r7, r2]
-	ldr	r3, .L1756+40
+	ldr	r3, .L1773+40
 	ldrb	r0, [r3, r10]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r6, r0
-	cbz	r3, .L1714
+	cbz	r3, .L1731
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1715
-.L1714:
+	cbnz	r0, .L1732
+.L1731:
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1716
+	cbnz	r0, .L1733
 	ldr	r3, [sp, #24]
 	mla	r1, r8, r5, r7
 	lsls	r6, r6, #10
@@ -11980,62 +12034,62 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1715:
+.L1732:
 	add	r10, r10, #1
-	b	.L1713
-.L1716:
+	b	.L1730
+.L1733:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1715
-.L1721:
+	b	.L1732
+.L1738:
 	mul	r3, r10, r8
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L1720
+	bne	.L1737
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1720:
+.L1737:
 	add	r8, r8, #1
-	b	.L1719
-.L1722:
-	ldr	r3, .L1756+44
+	b	.L1736
+.L1739:
+	ldr	r3, .L1773+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1756+8
+	ldr	r3, .L1773+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1739
+	cbnz	r3, .L1756
 	ldr	r3, [sp, #12]
 	movs	r6, #1
 	lsrs	r3, r3, #2
 	str	r3, [sp, #16]
-	b	.L1723
-.L1739:
+	b	.L1740
+.L1756:
 	movs	r6, #1
 	str	r6, [sp, #16]
-	b	.L1723
-.L1727:
+	b	.L1740
+.L1744:
 	movs	r3, #36
 	ldr	r1, [sp, #8]
 	mul	r2, r3, fp
 	movs	r3, #0
 	str	r3, [r10, r2]
-	ldr	r3, .L1756+40
+	ldr	r3, .L1773+40
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
 	ldr	r3, [sp, #4]
 	mov	r7, r0
-	cbz	r3, .L1725
+	cbz	r3, .L1742
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1726
-.L1725:
+	cbnz	r0, .L1743
+.L1742:
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1726
+	cbnz	r0, .L1743
 	movs	r3, #36
 	add	r7, r8, r7, lsl #10
 	mla	r1, r3, r5, r10
@@ -12050,44 +12104,44 @@ FtlLowFormatEraseBlock:
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L1726:
+.L1743:
 	add	fp, fp, #1
-	b	.L1724
-.L1731:
+	b	.L1741
+.L1748:
 	mul	r3, fp, r7
 	ldr	r2, [r10]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbz	r3, .L1730
+	cbz	r3, .L1747
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.L1730:
+.L1747:
 	adds	r7, r7, #1
-	b	.L1729
-.L1735:
+	b	.L1746
+.L1752:
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1734
+	cbz	r3, .L1751
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L1734
+	cbnz	r3, .L1751
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1734:
+.L1751:
 	adds	r7, r7, #1
-	b	.L1733
-.L1738:
+	b	.L1750
+.L1755:
 	movs	r4, #0
-	b	.L1711
-.L1757:
+	b	.L1728
+.L1774:
 	.align	2
-.L1756:
+.L1773:
 	.word	.LANCHOR77
 	.word	.LANCHOR27
 	.word	.LANCHOR8
@@ -12113,33 +12167,33 @@ FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L1769
+	ldr	r3, .L1786
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
-	bne	.L1760
-	ldr	r3, .L1769+4
+	bne	.L1777
+	ldr	r3, .L1786+4
 	mov	r1, r4
-	ldr	r7, .L1769+8
-	ldr	r5, .L1769+12
+	ldr	r7, .L1786+8
+	ldr	r5, .L1786+12
 	ldr	r3, [r3]
 	ldr	r0, [r7]
 	mov	r8, r7
-	ldr	r6, .L1769+16
+	ldr	r6, .L1786+16
 	str	r3, [r5, #12]
-	ldr	r7, .L1769+20
-	ldr	r3, .L1769+24
-	ldr	r10, .L1769+56
+	ldr	r7, .L1786+20
+	ldr	r3, .L1786+24
+	ldr	r10, .L1786+56
 	str	r0, [r5, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.L1761:
+.L1778:
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1762
+	blt	.L1779
 	ldr	r6, [r5, #12]
 	movs	r2, #16
-	ldr	r4, .L1769+28
+	ldr	r4, .L1786+28
 	movs	r1, #255
 	movs	r7, #0
 	mov	r0, r6
@@ -12156,16 +12210,16 @@ FtlBbmTblFlush:
 	strh	r3, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1769+32
+	ldr	r3, .L1786+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.L1763:
+.L1780:
 	ldr	r3, [r8]
 	mov	fp, #0
-	ldrh	r1, [r4]
 	ldrh	r2, [r4, #2]
+	ldrh	r1, [r4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1769+4
+	ldr	r3, .L1786+4
 	ldrh	r0, [r6, #10]
 	str	fp, [r5]
 	ldr	r3, [r3]
@@ -12174,19 +12228,14 @@ FtlBbmTblFlush:
 	str	r3, [r5, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1769+36
+	ldr	r0, .L1786+36
 	bl	printf
-	movs	r3, #1
-	ldr	r0, .L1769+12
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1769+40
+	ldr	r3, .L1786+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1764
+	blt	.L1781
 	ldr	r3, [r4, #8]
 	ldrh	r2, [r4]
 	strh	fp, [r4, #2]	@ movhi
@@ -12196,7 +12245,7 @@ FtlBbmTblFlush:
 	strh	r2, [r6, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1769+44
+	ldr	r2, .L1786+44
 	strh	r3, [r4]	@ movhi
 	lsls	r3, r3, #10
 	ldr	r0, [r2]
@@ -12205,38 +12254,38 @@ FtlBbmTblFlush:
 	mov	r1, r2
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
+.L1781:
 	movs	r3, #1
-	ldr	r0, .L1769+12
+	ldr	r0, .L1786+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.L1764:
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1765
+	bne	.L1782
 	adds	r7, r7, #1
 	ldr	r1, [r5, #4]
 	uxth	r7, r7
-	ldr	r0, .L1769+48
+	ldr	r0, .L1786+48
 	bl	printf
 	cmp	r7, #3
-	bls	.L1763
+	bls	.L1780
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1769+52
+	ldr	r0, .L1786+52
 	bl	printf
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
-.L1760:
+.L1777:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1762:
+.L1779:
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
@@ -12245,17 +12294,17 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-	b	.L1761
-.L1765:
+	b	.L1778
+.L1782:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1760
+	bne	.L1777
 	movs	r3, #1
 	str	r3, [sp, #8]
-	b	.L1763
-.L1770:
+	b	.L1780
+.L1787:
 	.align	2
-.L1769:
+.L1786:
 	.word	.LANCHOR77
 	.word	.LANCHOR188
 	.word	.LANCHOR183
@@ -12281,264 +12330,288 @@ FtlBbmTblFlush:
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1853
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r3, .L1834
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1773
-	ldr	r7, .L1834+4
-.L1772:
-	ldr	r3, .L1834+4
-	ldr	r6, .L1834+8
+	bne	.L1790
+.L1789:
+	ldr	r3, .L1853+4
+	ldr	r8, .L1853+60
+	ldr	r7, .L1853+8
 	ldrh	r3, [r3]
-	ldrh	r2, [r6]
+	ldrh	r2, [r8]
 	add	r3, r3, r2
-	ldr	r2, .L1834+12
-	ldrh	r2, [r2]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1774
-	ldr	r1, .L1834+16
-	mov	r2, #3168
-	ldr	r0, .L1834+20
+	ble	.L1791
+	ldr	r1, .L1853+12
+	movw	r2, #3108
+	ldr	r0, .L1853+16
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1853+20
+	ldr	r0, .L1853+24
 	bl	printf
-.L1774:
-	ldr	r3, .L1834+32
+.L1791:
+	ldr	r3, .L1853+28
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	bne	.L1775
-	ldr	r3, .L1834+36
-	ldrh	r5, [r7]
+	bne	.L1792
+	ldr	r3, .L1853+4
+	ldrh	r5, [r3]
+	ldr	r3, .L1853+32
 	ldr	r3, [r3]
 	lsrs	r0, r5, #1
-	mul	ip, r3, r5
 	adds	r1, r0, #1
-	add	r1, r1, ip, lsr #2
-	ldr	ip, .L1834+48
+	mul	r6, r3, r5
+	add	r1, r1, r6, lsr #2
+	ldr	r6, .L1853+36
 	uxth	r1, r1
-	ldr	ip, [ip]
-	cmp	ip, #0
-	beq	.L1776
-	ldr	ip, .L1834+52
-	ldr	ip, [ip]
-	cmp	ip, #39
-	bhi	.L1776
-	cmp	ip, #2
-	bls	.L1809
-	lsls	r5, r5, #31
-	bpl	.L1805
+	ldr	r6, [r6]
+	cbz	r6, .L1793
+	ldr	r6, .L1853+40
+	ldr	r6, [r6]
+	cmp	r6, #39
+	bhi	.L1793
+	cmp	r6, #2
+	bls	.L1827
+	lsls	r1, r5, #31
+	bpl	.L1823
 	cmp	r3, #0
-	beq	.L1809
-.L1805:
+	beq	.L1827
+.L1823:
 	mov	r1, r0
-	b	.L1776
-.L1775:
+	b	.L1793
+.L1792:
 	cmp	r2, #1
-	bne	.L1809
-	ldr	r3, .L1834+40
+	bne	.L1827
+	ldr	r3, .L1853+44
 	ldrh	r3, [r3]
 	cmp	r3, #1
-	beq	.L1809
-	ldr	r3, .L1834+44
+	beq	.L1827
+	ldr	r3, .L1853+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1809
-	ldr	r0, .L1834+48
-	ldrh	r3, [r7]
+	bne	.L1827
+	ldr	r3, .L1853+4
+	ldr	r0, .L1853+36
+	ldrh	r3, [r3]
 	ldr	r0, [r0]
 	lsrs	r1, r3, #3
-	cbz	r0, .L1776
-	ldr	r0, .L1834+52
+	cbz	r0, .L1793
+	ldr	r0, .L1853+40
 	ldr	r0, [r0]
 	cmp	r0, #1
-	bhi	.L1776
+	bhi	.L1793
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
-.L1776:
-	cbz	r1, .L1777
+.L1793:
+	cbz	r1, .L1794
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L1777:
-	ldr	r0, .L1834+56
+.L1794:
+	ldr	r0, .L1853+52
 	bl	List_pop_index_node
-	ldrh	r3, [r7]
+	ldr	r3, .L1853+4
 	mov	r5, r0
-	uxth	r8, r0
-	cbnz	r3, .L1778
-	ldr	r1, .L1834+16
-	movw	r2, #3188
-	ldr	r0, .L1834+20
+	uxth	r10, r0
+	ldrh	r3, [r3]
+	cbnz	r3, .L1795
+	ldr	r1, .L1853+12
+	movw	r2, #3128
+	ldr	r0, .L1853+16
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1853+20
+	ldr	r0, .L1853+24
 	bl	printf
-.L1778:
+.L1795:
+	ldr	r3, .L1853+4
+	ldr	r2, .L1853+4
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	strh	r3, [r2]	@ movhi
 	ldrh	r3, [r7]
+	cmp	r3, r10
+	bls	.L1789
+	uxth	r5, r5
+	lsls	r3, r5, #1
+	str	r3, [sp]
+	ldr	r3, .L1853+56
+	ldr	r3, [r3]
+	ldrh	r6, [r3, r5, lsl #1]
+	cmp	r6, #0
+	bne	.L1789
+	strh	r10, [r4]	@ movhi
 	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	strh	r8, [r4]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1779
-	ldr	r3, .L1834+60
-	uxth	r5, r5
+	cmp	r3, #0
+	bne	.L1797
+	ldr	r3, .L1853+56
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
+	ldr	r3, .L1853+4
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1834+12
-	ldrh	r2, [r2]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1772
-	mov	r2, #3200
-	ldr	r1, .L1834+16
-	ldr	r0, .L1834+20
+	ble	.L1789
+	movw	r2, #3144
+	ldr	r1, .L1853+12
+	ldr	r0, .L1853+16
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1853+20
+	ldr	r0, .L1853+24
 	bl	printf
-	b	.L1772
-.L1809:
+	b	.L1789
+.L1827:
 	movs	r1, #0
-	b	.L1777
-.L1779:
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
+	b	.L1794
+.L1854:
+	.align	2
+.L1853:
+	.word	.LANCHOR77
+	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR203
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR94
+	.word	.LANCHOR172
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.word	.LANCHOR44
+	.word	.LANCHOR8
+	.word	.LANCHOR88
+	.word	.LANCHOR84
+	.word	.LANCHOR86
+.L1797:
+	ldr	r3, .L1855
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1834+12
-	ldrh	r2, [r2]
+	ldrh	r2, [r7]
 	cmp	r3, r2
-	ble	.L1781
-	ldr	r1, .L1834+16
-	movw	r2, #3203
-	ldr	r0, .L1834+20
+	ble	.L1799
+	ldr	r1, .L1855+4
+	movw	r2, #3147
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1781:
-	ldr	r2, .L1834+64
-	movs	r6, #0
-	ldr	fp, .L1834+100
-	add	ip, r4, #16
-	mov	lr, r6
-	movw	r10, #65535
-	ldrh	r1, [r2]
+.L1799:
+	ldr	r3, .L1855+20
+	add	lr, r4, #16
+	ldr	r2, .L1855+24
+	mov	r8, #0
+	ldr	ip, [r3]
+	ldrh	r0, [r2]
 	movs	r2, #36
-	ldr	r0, [fp]
-	str	r2, [sp, #4]
-	mov	r3, r0
-	mla	r1, r2, r1, r0
-	str	r1, [sp]
-.L1782:
-	ldr	r2, [sp]
-	cmp	r2, r3
-	bne	.L1784
-	cbnz	r6, .L1785
-	ldr	r1, .L1834+16
-	movw	r2, #3215
-	ldr	r0, .L1834+20
+	mov	r3, ip
+	mla	r0, r2, r0, ip
+.L1800:
+	cmp	r0, r3
+	bne	.L1802
+	cbnz	r6, .L1803
+	ldr	r1, .L1855+4
+	movw	r2, #3159
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1785:
-	ldr	r3, .L1834+48
-	uxth	r5, r5
-	ldr	r10, .L1834+104
+.L1803:
+	ldr	r3, .L1855+28
+	ldr	r8, .L1855+80
 	ldr	r3, [r3]
-	cbz	r3, .L1786
-	ldr	r3, .L1834+68
+	cbz	r3, .L1804
+	ldr	r3, .L1855+32
 	cmp	r4, r3
-	bne	.L1786
-	ldr	r3, [r10]
+	bne	.L1804
+	ldr	r3, [r8]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #40
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
-.L1786:
-	ldr	r3, .L1834+72
+.L1804:
+	ldr	r3, .L1855+36
 	ldrh	r3, [r3]
-	cmp	r3, r8
-	bne	.L1787
-	ldr	r1, .L1834+16
-	movw	r2, #3222
-	ldr	r0, .L1834+20
+	cmp	r3, r10
+	bne	.L1805
+	ldr	r1, .L1855+4
+	movw	r2, #3166
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1834+24
-	ldr	r0, .L1834+28
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1787:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	ldr	r2, .L1834+76
-	ldr	r3, .L1834+80
-	cmp	r1, #0
-	bne	.L1788
-	ldr	r0, [r10]
-	ldrh	lr, [r0, r5, lsl #1]
-	cmp	lr, #0
-	beq	.L1789
-	ldr	r1, .L1834+84
-	ldrh	ip, [r1]
-	add	r1, lr, ip
-.L1832:
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r8
-	ldr	r1, [r2]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	adds	r1, r1, #1
-	str	r1, [r2]
+.L1805:
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L1855+40
+	ldr	fp, .L1855+84
+	cmp	r2, #0
+	bne	.L1806
+	ldr	r1, [r8]
+	ldrh	r2, [r1, r5, lsl #1]
+	cmp	r2, #0
+	beq	.L1807
+	ldr	r0, .L1855+44
+	ldrh	r0, [r0]
+	add	r2, r2, r0
+.L1850:
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	mov	r0, r10
+	ldr	r2, [r3]
 	movs	r1, #0
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	str	r2, [r3]
 	bl	ftl_set_blk_mode
-	ldm	sp, {r2, r3}
-.L1791:
-	lsls	r1, r5, #1
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	str	r1, [sp]
-	ldr	r1, [r10]
-	ldrh	ip, [r1, r5, lsl #1]
-	ldr	r1, .L1834+88
-	ldr	r0, [r1]
-	cmp	ip, r0
+.L1851:
+	ldr	r2, [r8]
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r2, r5, lsl #1]
+	ldr	r2, .L1855+48
+	ldr	r1, [r2]
+	cmp	r0, r1
+	ldrh	r1, [r7]
 	it	hi
-	strhi	ip, [r1]
-	ldr	r1, .L1834+84
-	ldrh	r0, [r1]
-	ldr	r1, .L1834+12
-	mla	r0, r2, r0, r3
-	ldrh	r1, [r1]
+	strhi	r0, [r2]
+	ldr	r2, .L1855+44
+	ldr	r0, [r3]
+	ldr	r3, [fp]
+	ldrh	r2, [r2]
+	ldr	r7, .L1855+52
+	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L1834+92
-	ldr	ip, .L1834+108
+	ldr	r3, .L1855+56
 	str	r0, [r3]
-	ldr	r3, .L1834+96
-	ldr	r0, [fp]
+	ldr	r3, .L1855+60
 	ldr	r2, [r3]
-	adds	r1, r0, #4
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
+	ldr	r3, .L1855+20
+	ldr	r0, [r3]
 	movs	r3, #36
+	adds	r1, r0, #4
 	mla	r3, r3, r6, r0
 	adds	r3, r3, #40
-.L1793:
+.L1811:
 	adds	r1, r1, #36
 	cmp	r3, r1
-	bne	.L1794
-	ldr	r3, .L1834+44
+	bne	.L1812
+	ldr	r3, .L1855+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1795
+	cbz	r3, .L1813
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	cmp	r3, #1
@@ -12546,171 +12619,151 @@ allocate_data_superblock:
 	moveq	r1, #0
 	movne	r1, #1
 	bl	FlashEraseBlocks
-.L1795:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+.L1813:
+	ldr	r3, .L1855+20
+	movs	r7, #0
+	mov	r8, r7
+	mov	fp, #36
 	mov	r2, r6
-	ldr	r0, [fp]
-	mov	r10, #0
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-	mov	r3, r10
-	movs	r1, #36
-.L1797:
-	uxth	r2, r10
-	cmp	r6, r2
-	bhi	.L1799
-	cbz	r3, .L1800
-	mov	r0, r8
+.L1815:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L1817
+	cmp	r8, #0
+	beq	.L1818
+	mov	r0, r10
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1800:
+.L1818:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1834+60
 	cmp	r2, #0
-	bne	.L1801
-	ldr	r3, [r1]
+	bne	.L1819
+	ldr	r3, .L1855+68
 	movw	r2, #65535
+	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1772
-.L1835:
-	.align	2
-.L1834:
-	.word	.LANCHOR77
-	.word	.LANCHOR89
-	.word	.LANCHOR86
-	.word	.LANCHOR40
-	.word	.LANCHOR203
-	.word	.LC5
-	.word	.LC6
-	.word	.LC7
-	.word	.LANCHOR94
-	.word	.LANCHOR172
-	.word	.LANCHOR44
-	.word	.LANCHOR8
-	.word	.LANCHOR28
-	.word	.LANCHOR170
-	.word	.LANCHOR88
-	.word	.LANCHOR84
-	.word	.LANCHOR38
-	.word	.LANCHOR92
-	.word	.LANCHOR204
-	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR48
-	.word	.LANCHOR169
-	.word	.LANCHOR205
-	.word	.LANCHOR191
-	.word	.LANCHOR78
-	.word	.LANCHOR79
-	.word	-1024
-.L1784:
-	ldrh	r1, [ip], #2
-	str	lr, [r3, #8]
-	str	lr, [r3, #12]
-	cmp	r1, r10
-	beq	.L1783
-	ldr	r2, [sp, #4]
-	lsls	r1, r1, #10
-	mla	r2, r2, r6, r0
+	b	.L1789
+.L1802:
+	ldrh	r1, [lr], #2
+	movw	fp, #65535
+	str	r8, [r3, #8]
+	str	r8, [r3, #12]
+	cmp	r1, fp
+	beq	.L1801
+	mla	fp, r2, r6, ip
 	adds	r6, r6, #1
+	lsls	r1, r1, #10
 	uxth	r6, r6
-	str	r1, [r2, #4]
-.L1783:
+	str	r1, [fp, #4]
+.L1801:
 	adds	r3, r3, #36
-	b	.L1782
-.L1789:
-	movs	r1, #2
-	b	.L1832
-.L1788:
-	ldr	r0, [r10]
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	ldrh	r1, [r0, r5, lsl #1]
-	adds	r1, r1, #1
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r8
-	ldr	r1, [r3]
-	adds	r1, r1, #1
-	str	r1, [r3]
+	b	.L1800
+.L1807:
+	movs	r2, #2
+	b	.L1850
+.L1806:
+	ldr	r1, [r8]
+	mov	r0, r10
+	str	r3, [sp, #4]
+	ldrh	r2, [r1, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	ldr	r2, [fp]
+	adds	r2, r2, #1
+	str	r2, [fp]
 	bl	ftl_set_blk_mode.part.10
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	b	.L1791
-.L1794:
+	b	.L1851
+.L1812:
 	ldr	r2, [r1, #-36]
-	and	r2, r2, ip
+	ands	r2, r2, r7
 	str	r2, [r1, #-36]
-	b	.L1793
-.L1799:
-	ldr	r0, .L1836
-	mul	r2, r1, r10
-	ldr	r0, [r0]
-	add	ip, r0, r2
-	ldr	r2, [r0, r2]
-	adds	r0, r2, #1
-	bne	.L1798
-	ldr	r0, [ip, #4]
-	adds	r3, r3, #1
-	str	r1, [sp, #12]
-	str	r2, [sp, #8]
+	b	.L1811
+.L1817:
+	ldr	r2, .L1855+20
+	mul	r3, fp, r7
+	ldr	r2, [r2]
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L1816
+	ldr	r0, [r1, #4]
+	add	r8, r8, #1
+	str	r2, [sp, #4]
 	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
-	ldr	r2, [sp, #8]
-	add	r0, r4, r10, lsl #1
-	ldr	r1, [sp, #12]
-	ldr	r3, [sp, #4]
-	strh	r2, [r0, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
-.L1798:
-	add	r10, r10, #1
-	b	.L1797
-.L1801:
-	ldr	r3, .L1836+4
-	ldr	r0, .L1836+8
+	ldr	r2, [sp, #4]
+	add	r3, r4, r7, lsl #1
+	strh	r2, [r3, #16]	@ movhi
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r4, #7]
+.L1816:
+	adds	r7, r7, #1
+	b	.L1815
+.L1819:
+	ldr	r3, .L1855+72
+	ldr	r1, .L1855+76
 	ldrh	r3, [r3]
-	strh	r8, [r4]	@ movhi
+	strh	r10, [r4]	@ movhi
 	smulbb	r3, r3, r2
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
-	ldr	r2, [r0]
+	ldr	r2, [r1]
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
-	str	r2, [r0]
-	ldr	r2, [r1]
+	str	r2, [r1]
+	ldr	r2, .L1855+68
 	ldr	r1, [sp]
+	ldr	r2, [r2]
 	strh	r3, [r2, r1]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1802
+	cbz	r3, .L1820
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1773
-.L1802:
-	ldr	r1, .L1836+12
-	movw	r2, #3281
-	ldr	r0, .L1836+16
+	cbnz	r3, .L1790
+.L1820:
+	ldr	r1, .L1855+4
+	movw	r2, #3225
+	ldr	r0, .L1855+8
 	bl	printf
-	ldr	r1, .L1836+20
-	ldr	r0, .L1836+24
+	ldr	r1, .L1855+12
+	ldr	r0, .L1855+16
 	bl	printf
-.L1773:
+.L1790:
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1837:
+.L1856:
 	.align	2
-.L1836:
-	.word	.LANCHOR78
-	.word	.LANCHOR53
-	.word	.LANCHOR159
+.L1855:
+	.word	.LANCHOR89
 	.word	.LANCHOR203
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LANCHOR78
+	.word	.LANCHOR38
+	.word	.LANCHOR28
+	.word	.LANCHOR92
+	.word	.LANCHOR204
+	.word	.LANCHOR167
+	.word	.LANCHOR48
+	.word	.LANCHOR169
+	.word	-1024
+	.word	.LANCHOR205
+	.word	.LANCHOR191
+	.word	.LANCHOR8
+	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.word	.LANCHOR159
+	.word	.LANCHOR79
+	.word	.LANCHOR168
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -12725,43 +12778,43 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r0
-	ldr	r4, .L1850
+	ldr	r4, .L1869
 	ldrh	r3, [r4]
-	cbz	r3, .L1839
-	ldr	r8, .L1850+12
+	cbz	r3, .L1858
+	ldr	r8, .L1869+12
 	movs	r7, #0
-.L1840:
-	ldr	r3, .L1850+4
+.L1859:
+	ldr	r3, .L1869+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
-	bhi	.L1846
+	bhi	.L1865
 	bl	FtlGcReFreshBadBlk
-.L1839:
+.L1858:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1846:
-	ldr	r2, .L1850+8
+.L1865:
+	ldr	r2, .L1869+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r1, r0
-.L1841:
+.L1860:
 	ldrh	r3, [r4]
 	uxth	r5, fp
 	cmp	r3, r5
-	bhi	.L1845
+	bhi	.L1864
 	adds	r7, r7, #1
-	b	.L1840
-.L1845:
+	b	.L1859
+.L1864:
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
-	bne	.L1842
+	bne	.L1861
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -12769,23 +12822,23 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
-.L1843:
+.L1862:
 	cmp	r5, r2
-	bcc	.L1844
+	bcc	.L1863
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-.L1842:
+.L1861:
 	add	fp, fp, #1
-	b	.L1841
-.L1844:
+	b	.L1860
+.L1863:
 	ldrh	r0, [r3, #2]!
 	adds	r5, r5, #1
 	uxth	r5, r5
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1843
-.L1851:
+	b	.L1862
+.L1870:
 	.align	2
-.L1850:
+.L1869:
 	.word	.LANCHOR117
 	.word	.LANCHOR38
 	.word	.LANCHOR47
@@ -12804,32 +12857,32 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1862
+	ldr	r3, .L1881
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1853
-	ldr	r2, .L1862+4
+	bne	.L1872
+	ldr	r2, .L1881+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1854
+	bne	.L1873
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1855:
-	ldr	r5, .L1862+8
+.L1874:
+	ldr	r5, .L1881+8
 	mov	r1, r4
-	ldr	r0, .L1862+12
+	ldr	r0, .L1881+12
 	bl	List_remove_node
 	ldrh	r3, [r5]
-	cbnz	r3, .L1857
-	ldr	r1, .L1862+16
-	mov	r2, #3392
-	ldr	r0, .L1862+20
+	cbnz	r3, .L1876
+	ldr	r1, .L1881+16
+	movw	r2, #3336
+	ldr	r0, .L1881+20
 	bl	printf
-	ldr	r1, .L1862+24
-	ldr	r0, .L1862+28
+	ldr	r1, .L1881+24
+	ldr	r0, .L1881+28
 	bl	printf
-.L1857:
+.L1876:
 	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -12837,47 +12890,47 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1862+32
+	ldr	r3, .L1881+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1862+36
+	ldr	r2, .L1881+36
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1861
-	ldr	r1, .L1862+16
-	movw	r2, #3395
-	ldr	r0, .L1862+20
+	ble	.L1880
+	ldr	r1, .L1881+16
+	movw	r2, #3339
+	ldr	r0, .L1881+20
 	bl	printf
-	ldr	r1, .L1862+24
-	ldr	r0, .L1862+28
+	ldr	r1, .L1881+24
+	ldr	r0, .L1881+28
 	bl	printf
-.L1861:
+.L1880:
 	movs	r3, #1
-	b	.L1852
-.L1854:
-	ldr	r2, .L1862+40
+	b	.L1871
+.L1873:
+	ldr	r2, .L1881+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1852
-	ldr	r2, .L1862+44
+	beq	.L1871
+	ldr	r2, .L1881+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1852
-	ldr	r2, .L1862+48
+	beq	.L1871
+	ldr	r2, .L1881+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1855
-.L1852:
+	bne	.L1874
+.L1871:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1853:
+.L1872:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1852
-.L1863:
+	b	.L1871
+.L1882:
 	.align	2
-.L1862:
+.L1881:
 	.word	.LANCHOR84
 	.word	.LANCHOR204
 	.word	.LANCHOR86
@@ -12907,47 +12960,47 @@ decrement_vpc_count:
 	push	{r4, r5, r6, lr}
 	cmp	r0, r3
 	mov	r4, r0
-	beq	.L1865
-	ldr	r5, .L1876
+	beq	.L1884
+	ldr	r5, .L1895
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cmp	r2, #0
-	bne	.L1866
+	bne	.L1885
 	mov	r1, r0
-	ldr	r0, .L1876+4
+	ldr	r0, .L1895+4
 	bl	printf
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L1867
-	ldr	r1, .L1876+8
-	movw	r2, #3410
-	ldr	r0, .L1876+12
+	cbnz	r3, .L1886
+	ldr	r1, .L1895+8
+	movw	r2, #3354
+	ldr	r0, .L1895+12
 	bl	printf
-	ldr	r1, .L1876+16
-	ldr	r0, .L1876+20
+	ldr	r1, .L1895+16
+	ldr	r0, .L1895+20
 	bl	printf
-.L1867:
+.L1886:
 	ldr	r3, [r5]
 	movs	r2, #32
 	mov	r1, r4
-	ldr	r0, .L1876+24
+	ldr	r0, .L1895+24
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	test_node_in_list
-	cbz	r0, .L1868
-	ldr	r6, .L1876+28
+	cbz	r0, .L1887
+	ldr	r6, .L1895+28
 	mov	r1, r4
-	ldr	r0, .L1876+24
+	ldr	r0, .L1895+24
 	bl	List_remove_node
 	ldrh	r3, [r6]
-	cbnz	r3, .L1869
-	ldr	r1, .L1876+8
-	movw	r2, #3414
-	ldr	r0, .L1876+12
+	cbnz	r3, .L1888
+	ldr	r1, .L1895+8
+	movw	r2, #3358
+	ldr	r0, .L1895+12
 	bl	printf
-	ldr	r1, .L1876+16
-	ldr	r0, .L1876+20
+	ldr	r1, .L1895+16
+	ldr	r0, .L1895+20
 	bl	printf
-.L1869:
+.L1888:
 	ldrh	r3, [r6]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -12955,33 +13008,33 @@ decrement_vpc_count:
 	bl	INSERT_DATA_LIST
 	ldr	r3, [r5]
 	mov	r1, r4
-	ldr	r0, .L1876+32
+	ldr	r0, .L1895+32
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.L1868:
+.L1887:
 	mov	r0, r4
 	bl	FtlGcRefreshBlock
-.L1872:
+.L1891:
 	movs	r5, #0
-	b	.L1864
-.L1866:
+	b	.L1883
+.L1885:
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1865:
-	ldr	r6, .L1876+36
+.L1884:
+	ldr	r6, .L1895+36
 	movw	r3, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r3
-	bne	.L1871
+	bne	.L1890
 	strh	r4, [r6]	@ movhi
-	b	.L1872
-.L1871:
+	b	.L1891
+.L1890:
 	cmp	r4, r0
-	beq	.L1872
+	beq	.L1891
 	bl	update_vpc_list
-	ldr	r3, .L1876+40
+	ldr	r3, .L1895+40
 	adds	r5, r0, #0
-	ldr	r2, .L1876+44
+	ldr	r2, .L1895+44
 	it	ne
 	movne	r5, #1
 	strh	r4, [r6]	@ movhi
@@ -12989,28 +13042,28 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1876+48
+	ldr	r3, .L1895+48
 	muls	r3, r2, r3
-	ldr	r2, .L1876
+	ldr	r2, .L1895
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
-	cbnz	r2, .L1864
+	cbnz	r2, .L1883
 	cmp	r4, r1
-	beq	.L1864
-	ldr	r1, .L1876+8
-	movw	r2, #3435
-	ldr	r0, .L1876+12
+	beq	.L1883
+	ldr	r1, .L1895+8
+	movw	r2, #3379
+	ldr	r0, .L1895+12
 	bl	printf
-	ldr	r1, .L1876+16
-	ldr	r0, .L1876+20
+	ldr	r1, .L1895+16
+	ldr	r0, .L1895+20
 	bl	printf
-.L1864:
+.L1883:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1877:
+.L1896:
 	.align	2
-.L1876:
+.L1895:
 	.word	.LANCHOR84
 	.word	.LC36
 	.word	.LANCHOR207
@@ -13040,71 +13093,71 @@ FtlSlcSuperblockCheck:
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	cmp	r3, #0
-	beq	.L1878
+	beq	.L1897
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1878
+	beq	.L1897
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1889
-	ldr	r6, .L1889+4
+	ldr	r5, .L1908
+	ldr	r6, .L1908+4
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
-.L1882:
+.L1901:
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1884
+	beq	.L1903
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1885
+	bne	.L1904
 	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1885
+	cbnz	r1, .L1904
 	ldrh	r1, [r4, #2]
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
-	bne	.L1885
+	bne	.L1904
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
 	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1884
+	cbnz	r2, .L1903
 	ldrh	r3, [r4, #2]
 	strb	r2, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L1884:
+.L1903:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r2, .L1889+8
+	ldr	r2, .L1908+8
 	adds	r3, r3, #1
 	ldrh	r2, [r2]
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1883
+	bne	.L1902
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1883:
+.L1902:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-	b	.L1882
-.L1885:
+	b	.L1901
+.L1904:
 	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1878
+	cbz	r2, .L1897
 	cmp	r3, #1
-	bne	.L1878
-	ldr	r3, .L1889+12
+	bne	.L1897
+	ldr	r3, .L1908+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1878
-	ldr	r3, .L1889+16
+	bcc	.L1897
+	ldr	r3, .L1908+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13112,16 +13165,16 @@ FtlSlcSuperblockCheck:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	movs	r3, #0
-	ldr	r2, .L1889+20
+	ldr	r2, .L1908+20
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
-.L1878:
+.L1897:
 	pop	{r4, r5, r6, pc}
-.L1890:
+.L1909:
 	.align	2
-.L1889:
+.L1908:
 	.word	.LANCHOR8
 	.word	.LANCHOR120
 	.word	.LANCHOR38
@@ -13145,93 +13198,93 @@ get_new_active_ppa:
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L1892
-	ldr	r1, .L1913
-	movw	r2, #3332
-	ldr	r0, .L1913+4
+	bne	.L1911
+	ldr	r1, .L1932
+	movw	r2, #3276
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1892:
-	ldr	r5, .L1913+16
+.L1911:
+	ldr	r5, .L1932+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1893
-	ldr	r1, .L1913
-	movw	r2, #3333
-	ldr	r0, .L1913+4
+	bne	.L1912
+	ldr	r1, .L1932
+	movw	r2, #3277
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1893:
+.L1912:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1894
-	ldr	r1, .L1913
-	movw	r2, #3334
-	ldr	r0, .L1913+4
+	cbnz	r3, .L1913
+	ldr	r1, .L1932
+	movw	r2, #3278
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1894:
+.L1913:
 	movs	r3, #0
-	ldr	r7, .L1913+20
+	ldr	r7, .L1932+20
 	strb	r3, [r4, #10]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldr	r6, .L1913+24
+	ldr	r6, .L1932+24
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-.L1895:
+.L1914:
 	movw	r0, #65535
 	cmp	r2, r0
-	beq	.L1896
+	beq	.L1915
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
-	bne	.L1898
+	bne	.L1917
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
-	bne	.L1898
-	ldr	ip, .L1913+28
+	bne	.L1917
+	ldr	ip, .L1932+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
-	bne	.L1898
+	bne	.L1917
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1896:
+.L1915:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r2, r3
 	strb	r3, [r4, #6]
-	bne	.L1897
+	bne	.L1916
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
-.L1897:
+.L1916:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
-	b	.L1895
-.L1898:
-	ldr	r8, .L1913+24
+	b	.L1914
+.L1917:
+	ldr	r8, .L1932+24
 	orr	r6, r1, r2, lsl #10
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1899:
+.L1918:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movw	r2, #65535
 	ldrh	r0, [r7]
-.L1901:
+.L1920:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r0
@@ -13243,31 +13296,31 @@ get_new_active_ppa:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
-	beq	.L1901
+	beq	.L1920
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1902
+	bne	.L1921
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1903
-	ldr	r1, .L1913+28
+	cbnz	r1, .L1922
+	ldr	r1, .L1932+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
-	bne	.L1902
+	bne	.L1921
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1902
+	cbz	r3, .L1921
 	subs	r3, r3, #1
 	ldrh	r0, [r4]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1899
-.L1903:
-	ldr	r2, .L1913+32
+	b	.L1918
+.L1922:
+	ldr	r2, .L1932+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	bcc	.L1902
-	ldr	r3, .L1913+36
+	bcc	.L1921
+	ldr	r3, .L1932+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -13279,26 +13332,26 @@ get_new_active_ppa:
 	strh	r3, [r4, #4]	@ movhi
 	strb	r3, [r4, #6]
 	strh	r2, [r4, #2]	@ movhi
-.L1902:
+.L1921:
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L1891
+	bne	.L1910
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1891
-	ldr	r1, .L1913
-	movw	r2, #3378
-	ldr	r0, .L1913+4
+	cbz	r3, .L1910
+	ldr	r1, .L1932
+	movw	r2, #3322
+	ldr	r0, .L1932+4
 	bl	printf
-	ldr	r1, .L1913+8
-	ldr	r0, .L1913+12
+	ldr	r1, .L1932+8
+	ldr	r0, .L1932+12
 	bl	printf
-.L1891:
+.L1910:
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1914:
+.L1933:
 	.align	2
-.L1913:
+.L1932:
 	.word	.LANCHOR208
 	.word	.LC5
 	.word	.LC6
@@ -13321,98 +13374,98 @@ get_new_active_ppa:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1935
+	ldr	r2, .L1954
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r1, [r3]
-	str	r3, [sp]
-	cmp	r1, #0
-	bne	.L1917
-	ldr	r3, .L1935+4
-	ldr	r7, .L1935+8
-	ldr	r8, .L1935+112
-	ldr	r4, .L1935+12
-	ldr	r6, [r7]
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	str	r6, [r4, #12]
-	str	r0, [r4, #8]
+	ldr	r3, [r2]
+	str	r2, [sp, #4]
+	cmp	r3, #0
+	bne	.L1936
+	ldr	r4, .L1954+4
+	ldr	fp, .L1954+108
+	ldr	r8, .L1954+112
+	ldr	r5, .L1954+8
+	ldr	r0, [fp]
+	ldr	r6, [r8]
+	ldrh	r2, [r4]
+	str	r0, [r5, #8]
+	str	r6, [r5, #12]
 	strh	r2, [r6, #2]	@ movhi
 	movw	r2, #61604
-	ldr	r5, .L1935+16
+	ldr	r7, .L1954+12
 	strh	r2, [r6]	@ movhi
-	ldr	r2, [r3, #8]
-	ldrh	r3, [r3, #6]
-	str	r1, [r6, #8]
+	str	r3, [r6, #12]
+	ldr	ip, .L1954+116
+	ldr	r2, [r4, #8]
+	str	r3, [r6, #8]
+	ldr	r3, .L1954+16
 	str	r2, [r6, #4]
-	strh	r3, [r5, #8]	@ movhi
-	ldr	r3, .L1935+20
-	ldr	ip, .L1935+116
-	ldr	r2, .L1935+24
+	stm	r7, {r3, ip}
+	ldrh	r3, [r4, #6]
+	strh	r3, [r7, #8]	@ movhi
+	ldr	r3, .L1954+20
 	ldrh	r3, [r3]
-	str	r1, [r6, #12]
-	stm	r5, {r2, ip}
-	strb	r3, [r5, #10]
-	ldr	r3, .L1935+28
+	strb	r3, [r7, #10]
+	ldr	r3, .L1954+24
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r5, #14]	@ movhi
+	strh	r2, [r7, #14]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #11]
+	strb	r3, [r7, #11]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1935+32
-	strh	r2, [r5, #16]	@ movhi
+	ldr	r3, .L1954+28
+	strh	r2, [r7, #16]	@ movhi
 	ldrh	r2, [r3]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r5, #18]	@ movhi
+	strh	r2, [r7, #18]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #12]
+	strb	r3, [r7, #12]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1935+36
-	strh	r2, [r5, #20]	@ movhi
+	ldr	r3, .L1954+32
+	strh	r2, [r7, #20]	@ movhi
 	ldrh	r2, [r3]
-	strh	r2, [r5, #22]	@ movhi
+	strh	r2, [r7, #22]	@ movhi
 	ldrh	r1, [r3, #2]
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #13]
+	strb	r3, [r7, #13]
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1935+40
+	ldr	r3, .L1954+36
 	movs	r1, #255
-	strh	r2, [r5, #24]	@ movhi
+	strh	r2, [r7, #24]	@ movhi
 	ldr	r3, [r3]
-	str	r3, [r5, #32]
-	ldr	r3, .L1935+44
+	str	r3, [r7, #32]
+	ldr	r3, .L1954+40
 	ldr	r3, [r3]
-	str	r3, [r5, #40]
-	ldr	r3, .L1935+48
+	str	r3, [r7, #40]
+	ldr	r3, .L1954+44
 	ldr	r3, [r3]
-	str	r3, [r5, #36]
-	ldr	r3, .L1935+52
+	str	r3, [r7, #36]
+	ldr	r3, .L1954+48
 	ldrh	r3, [r3]
-	strh	r3, [r5, #44]	@ movhi
-	ldr	r3, .L1935+56
+	strh	r3, [r7, #44]	@ movhi
+	ldr	r3, .L1954+52
 	ldrh	r3, [r3]
-	strh	r3, [r5, #46]	@ movhi
-	ldr	r3, .L1935+60
+	strh	r3, [r7, #46]	@ movhi
+	ldr	r3, .L1954+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	mov	r1, r5
-	ldr	r5, .L1935+64
+	mov	r1, r7
+	ldr	r7, .L1954+60
 	movs	r2, #48
-	ldr	r0, [r4, #8]
+	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-	ldrh	r2, [r5]
-	ldr	r3, .L1935+68
-	ldr	r0, [r4, #8]
+	ldrh	r2, [r7]
+	ldr	r3, .L1954+64
+	ldr	r0, [r5, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	ftl_memcpy
-	ldrh	r0, [r5]
-	ldr	r3, [r4, #8]
-	ldr	r1, .L1935+72
+	ldrh	r0, [r7]
+	ldr	r3, [r5, #8]
+	ldr	r1, .L1954+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -13421,135 +13474,124 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L1935+76
-	str	r7, [sp, #4]
+	ldr	r3, .L1954+72
 	ldrh	r3, [r3]
-	cbz	r3, .L1918
-	ldrh	r0, [r5]
-	ldr	r3, .L1935+80
-	ldr	r1, .L1935+84
+	cbz	r3, .L1937
+	ldrh	r0, [r7]
+	ldr	r3, .L1954+76
+	ldr	r1, .L1954+80
 	ldrh	r2, [r3]
 	lsrs	r3, r0, #3
 	ldr	r1, [r1]
 	add	r3, r3, r0, lsl #1
-	ldr	r0, [r4, #8]
+	ldr	r0, [r5, #8]
 	adds	r3, r3, #52
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
-.L1918:
-	ldr	r5, .L1935+4
+.L1937:
 	movs	r7, #0
-	movw	fp, #65535
+	movw	r10, #65535
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
-	mov	r10, r5
-.L1919:
+.L1938:
+	ldr	r3, [fp]
+	ldrh	r1, [r4, #2]
+	ldrh	r2, [r4]
+	str	r3, [r5, #8]
 	ldr	r3, [r8]
-	ldrh	r2, [r5]
-	ldr	r0, .L1935+12
-	str	r3, [r4, #8]
-	ldr	r3, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [r4, #12]
-	ldrh	r3, [r5, #2]
-	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #4]
-	movs	r3, #1
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1935+88
-	ldrh	r2, [r5, #2]
+	str	r3, [r5, #12]
+	orr	r3, r1, r2, lsl #10
+	str	r3, [r5, #4]
+	ldr	r3, .L1954+84
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1920
-	ldrh	r3, [r5]
-	ldrh	fp, [r5, #4]
-	strh	r3, [r5, #4]	@ movhi
+	cmp	r1, r3
+	blt	.L1939
 	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
+	ldrh	r10, [r4, #4]
+	strh	r3, [r4, #2]	@ movhi
+	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1935+44
-	strh	r0, [r5]	@ movhi
-	ldr	r3, [r2]
-	adds	r1, r3, #1
-	str	r3, [r5, #8]
-	str	r1, [r2]
+	ldr	r3, .L1954+40
+	ldr	r1, .L1954+40
+	strh	r0, [r4]	@ movhi
+	ldr	r3, [r3]
+	adds	r2, r3, #1
+	str	r3, [r4, #8]
+	str	r2, [r1]
 	lsls	r2, r0, #10
-	str	r2, [r4, #4]
+	str	r2, [r5, #4]
 	str	r3, [r6, #4]
-	movs	r3, #1
 	strh	r0, [r6, #2]	@ movhi
+.L1939:
+	movs	r3, #1
+	ldr	r0, .L1954+8
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1935+12
 	bl	FlashProgPages
-.L1920:
-	ldrh	r3, [r10, #2]
-	ldr	r2, [r4]
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r5]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	adds	r1, r2, #1
-	strh	r3, [r10, #2]	@ movhi
-	bne	.L1921
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L1940
 	cmp	r3, #1
-	bne	.L1922
-	ldr	r1, .L1935+92
-	movw	r2, #1219
-	ldr	r0, .L1935+96
+	bne	.L1941
+	ldr	r1, .L1954+88
+	movw	r2, #1209
+	ldr	r0, .L1954+92
 	bl	printf
-	ldr	r1, .L1935+100
-	ldr	r0, .L1935+104
+	ldr	r1, .L1954+96
+	ldr	r0, .L1954+100
 	bl	printf
-.L1922:
-	ldrh	r3, [r10, #2]
+.L1941:
+	ldrh	r3, [r4, #2]
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1935+88
+	ldreq	r3, .L1954+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
-	strheq	r3, [r10, #2]	@ movhi
+	strheq	r3, [r4, #2]	@ movhi
 	cmp	r7, #3
-	bls	.L1919
+	bls	.L1938
 	mov	r2, r7
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1935+108
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1954+104
 	bl	printf
-	ldr	r2, [sp]
+	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
-.L1917:
+.L1936:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1921:
+.L1940:
 	cmp	r3, #1
-	beq	.L1919
+	beq	.L1938
 	cmp	r2, #256
-	beq	.L1919
+	beq	.L1938
 	movw	r3, #65535
-	cmp	fp, r3
-	beq	.L1917
+	cmp	r10, r3
+	beq	.L1936
 	movs	r1, #1
-	mov	r0, fp
+	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1917
-.L1936:
+	b	.L1936
+.L1955:
 	.align	2
-.L1935:
+.L1954:
 	.word	.LANCHOR77
 	.word	.LANCHOR209
-	.word	.LANCHOR188
 	.word	.LANCHOR202
 	.word	.LANCHOR81
-	.word	.LANCHOR45
 	.word	1179929683
+	.word	.LANCHOR45
 	.word	.LANCHOR92
 	.word	.LANCHOR93
 	.word	.LANCHOR94
@@ -13572,7 +13614,8 @@ FtlVpcTblFlush:
 	.word	.LC7
 	.word	.LC38
 	.word	.LANCHOR183
-	.word	1342177353
+	.word	.LANCHOR188
+	.word	1342177360
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -13585,31 +13628,31 @@ FtlVpcTblFlush:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1952
+	ldr	r3, .L1971
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
 	sub	sp, sp, #44
 	ldr	r8, [r3]
 	cmp	r8, #0
-	bne	.L1937
-	ldr	r3, .L1952+4
+	bne	.L1956
+	ldr	r3, .L1971+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1948
+	beq	.L1967
 	ldrb	r3, [r0, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1948
+	bne	.L1967
 	ldrh	r6, [r0, #4]
 	mov	r8, r3
-.L1939:
+.L1958:
 	mov	r3, #-1
-	ldr	r2, .L1952+8
+	ldr	r2, .L1971+8
 	str	r3, [sp, #20]
 	movs	r7, #0
-	ldr	r3, .L1952+12
+	ldr	r3, .L1971+12
 	ldr	r5, [r2]
 	mvn	r2, #2
-	ldr	r10, .L1952+24
+	ldr	r10, .L1971+24
 	ldr	r3, [r3]
 	str	r5, [sp, #16]
 	str	r3, [sp, #12]
@@ -13625,38 +13668,38 @@ FtlSuperblockPowerLostFix:
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.L1940:
+.L1959:
 	adds	r6, r6, #-1
-	bcc	.L1943
+	bcc	.L1962
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1941
-.L1943:
-	ldr	r3, .L1952+16
+	cbnz	r3, .L1960
+.L1962:
+	ldr	r3, .L1971+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1952+20
+	ldr	r3, .L1971+20
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1937:
+.L1956:
 	add	sp, sp, #44
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1948:
+.L1967:
 	movs	r6, #12
-	b	.L1939
-.L1941:
+	b	.L1958
+.L1960:
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1943
+	beq	.L1962
 	ldr	r3, [r10]
 	movs	r1, #1
 	add	r0, sp, #4
@@ -13671,10 +13714,10 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-	b	.L1940
-.L1953:
+	b	.L1959
+.L1972:
 	.align	2
-.L1952:
+.L1971:
 	.word	.LANCHOR77
 	.word	.LANCHOR8
 	.word	.LANCHOR188
@@ -13694,36 +13737,36 @@ FtlSuperblockPowerLostFix:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1964
+	ldr	r3, .L1983
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r5, .L1964+4
+	ldr	r5, .L1983+4
 	ldr	r3, [r3]
-	ldr	r7, .L1964+8
-	ldr	r10, .L1964+20
+	ldr	r7, .L1983+8
+	ldr	r10, .L1983+20
 	str	r3, [r5, #8]
-	ldr	r3, .L1964+12
+	ldr	r3, .L1983+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.L1955:
-	ldr	r3, .L1964+16
+.L1974:
+	ldr	r3, .L1983+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1960
+	bcc	.L1979
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1960:
+.L1979:
 	ldrh	r4, [r10]
 	movw	r3, #65535
-	ldr	fp, .L1964+4
+	ldr	fp, .L1983+4
 	strh	r3, [r7, #2]!	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1956:
+.L1975:
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L1958
+	bgt	.L1977
 	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
@@ -13733,22 +13776,22 @@ FtlLoadFactoryBbt:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1957
+	beq	.L1976
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L1957
+	bne	.L1976
 	strh	r4, [r7]	@ movhi
-.L1958:
+.L1977:
 	adds	r6, r6, #1
-	b	.L1955
-.L1957:
+	b	.L1974
+.L1976:
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1956
-.L1965:
+	b	.L1975
+.L1984:
 	.align	2
-.L1964:
+.L1983:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
 	.word	.LANCHOR75+10
@@ -13770,12 +13813,12 @@ FtlGetLastWrittenPage:
 	cmp	r1, #1
 	push	{r4, r5, r6, r7, r8, lr}
 	it	eq
-	ldreq	r3, .L1978
+	ldreq	r3, .L1997
 	sub	sp, sp, #104
 	lsl	r7, r0, #10
 	mov	r2, r1
 	it	ne
-	ldrne	r3, .L1978+4
+	ldrne	r3, .L1997+4
 	mov	r8, r1
 	movs	r6, #0
 	movs	r1, #1
@@ -13791,16 +13834,16 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1969
-.L1970:
+	bne	.L1988
+.L1989:
 	cmp	r6, r5
-	ble	.L1973
-.L1969:
+	ble	.L1992
+.L1988:
 	mov	r0, r5
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1973:
+.L1992:
 	adds	r3, r6, r5
 	mov	r2, r8
 	add	r3, r3, r3, lsr #31
@@ -13813,23 +13856,23 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1971
+	bne	.L1990
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L1971
+	bne	.L1990
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	beq	.L1971
+	beq	.L1990
 	subs	r4, r4, #1
 	sxth	r5, r4
-	b	.L1970
-.L1971:
+	b	.L1989
+.L1990:
 	adds	r4, r4, #1
 	sxth	r6, r4
-	b	.L1970
-.L1979:
+	b	.L1989
+.L1998:
 	.align	2
-.L1978:
+.L1997:
 	.word	.LANCHOR54
 	.word	.LANCHOR53
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -13845,24 +13888,24 @@ FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L2009+48
-	ldr	r4, .L2009
+	ldr	r8, .L2028+48
+	ldr	r4, .L2028
 	ldr	r3, [r8]
-	ldr	r7, .L2009+4
+	ldr	r7, .L2028+4
 	mov	r10, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L2009+8
+	ldr	r3, .L2028+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FtlBbtMemInit
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1981:
+.L2000:
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1984
+	bgt	.L2003
 	lsls	r3, r5, #10
 	movs	r2, #1
 	mov	r1, r2
@@ -13871,7 +13914,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1982
+	bne	.L2001
 	ldr	r3, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
@@ -13879,104 +13922,104 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
 	bl	FlashReadPages
-.L1982:
+.L2001:
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1983
+	beq	.L2002
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1983
-	ldr	r3, .L2009+12
+	bne	.L2002
+	ldr	r3, .L2028+12
 	ldr	r2, [r6, #4]
 	strh	r5, [r3]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L1984:
-	ldr	r5, .L2009+12
+.L2003:
+	ldr	r5, .L2028+12
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L1998
+	beq	.L2017
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L1988
+	beq	.L2007
 	lsls	r3, r3, #10
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L2009
+	ldr	r0, .L2028
 	str	r3, [r4, #4]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1988
+	beq	.L2007
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1988
+	bne	.L2007
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1988
+	bls	.L2007
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r6, #8]
 	strh	r2, [r5]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L1988:
-	ldr	r10, .L2009
+.L2007:
+	ldr	r10, .L2028
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L1990:
+.L2009:
 	cmp	r7, #0
-	bge	.L1993
-	ldr	r1, .L2009+16
-	mov	r2, #336
-	ldr	r0, .L2009+20
+	bge	.L2012
+	ldr	r1, .L2028+16
+	movw	r2, #335
+	ldr	r0, .L2028+20
 	bl	printf
-	ldr	r1, .L2009+24
-	ldr	r0, .L2009+28
+	ldr	r1, .L2028+24
+	ldr	r0, .L2028+28
 	bl	printf
-.L1992:
+.L2011:
 	ldrh	r3, [r6, #10]
 	ldrh	r0, [r6, #12]
 	strh	r3, [r5, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1995
-	ldr	r3, .L2009+32
+	beq	.L2014
+	ldr	r3, .L2028+32
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L1995
-	ldr	r3, .L2009+36
+	beq	.L2014
+	ldr	r3, .L2028+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1995
+	bcs	.L2014
 	cmp	r0, r3
-	bcs	.L1995
+	bcs	.L2014
 	bl	FtlSysBlkNumInit
-.L1995:
-	ldr	r6, .L2009+40
+.L2014:
+	ldr	r6, .L2028+40
 	movs	r5, #0
-	ldr	r7, .L2009+44
-	ldr	r8, .L2009+52
-.L1996:
+	ldr	r7, .L2028+44
+	ldr	r8, .L2028+52
+.L2015:
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1997
+	bcc	.L2016
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1983:
+.L2002:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1981
-.L1993:
+	b	.L2000
+.L2012:
 	ldrh	r3, [r5]
 	movs	r2, #1
 	mov	r1, r2
@@ -13988,16 +14031,16 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1991
+	beq	.L2010
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1992
-.L1991:
+	beq	.L2011
+.L2010:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L1990
-.L1997:
+	b	.L2009
+.L2016:
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
@@ -14005,13 +14048,13 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	adds	r5, r5, #1
 	bl	ftl_memcpy
-	b	.L1996
-.L1998:
+	b	.L2015
+.L2017:
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2010:
+.L2029:
 	.align	2
-.L2009:
+.L2028:
 	.word	.LANCHOR202
 	.word	.LANCHOR51
 	.word	.LANCHOR188
@@ -14036,178 +14079,136 @@ FtlLoadBbt:
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
 	ldr	r3, [r0, #24]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
 	ldr	r5, [r0, #12]
-	str	r3, [sp, #8]
+	str	r3, [sp]
 	bl	ftl_free_no_use_map_blk
-	ldrh	ip, [r4, #10]
+	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
-	ldrh	r1, [r4, #40]
-	sub	r3, ip, #4
-	ldr	r6, .L2032
-	cmp	r2, r3
-	bge	.L2012
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L2014
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
+	subs	r3, r3, #4
 	cmp	r2, r3
-	bcc	.L2015
-.L2012:
-	movw	r3, #65535
+	blt	.L2031
 	uxth	r0, r0
-	cmp	r1, r3
-	beq	.L2016
-	ldrh	r3, [r4, #2]
-	ldrh	r2, [r6]
-	cmp	r2, r3
-	bls	.L2017
-.L2016:
-	ldrh	r3, [r5, r0, lsl #1]
-	lsls	r2, r0, #1
-	str	r3, [sp, #4]
-	cbz	r3, .L2014
+	ldrh	r8, [r5, r0, lsl #1]
+	cmp	r8, #0
+	beq	.L2031
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L2014
-	movs	r1, #1
-	str	r1, [r4, #32]
-	strh	r3, [r5, r2]	@ movhi
+	cbnz	r3, .L2031
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
 	ldrh	r3, [r4, #8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldrh	r3, [r6]
+	ldr	r3, .L2043
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2022
+	bcc	.L2032
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2022:
-	ldr	r5, .L2032+4
-	movs	r7, #0
-.L2023:
+.L2032:
+	ldr	r5, .L2043+4
+	movs	r6, #0
+.L2033:
 	ldrh	r3, [r4, #6]
-	uxth	fp, r7
-	cmp	r3, fp
-	bhi	.L2028
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L2039
 	movs	r1, #1
-	ldr	r0, [sp, #4]
+	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L2014:
+.L2031:
+	ldr	r3, .L2043
 	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2015
+	bcc	.L2037
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L2015
-.L2020:
-	ldrh	r8, [r5, r2, lsl #1]
-	add	lr, r2, #1
-	cmp	r8, r1
-	beq	.L2018
-	mov	r2, lr
-.L2019:
-	uxth	r7, r2
-	cmp	r7, ip
-	bcc	.L2020
-	mov	r7, r0
-.L2018:
-	uxth	r2, r2
-	ldr	r0, .L2032+8
-	ldrh	r2, [r5, r2, lsl #1]
-	bl	printf
-	movw	r3, #65535
-	mov	r0, r7
-	strh	r3, [r4, #40]	@ movhi
-	b	.L2016
-.L2017:
-	movs	r2, #0
-	b	.L2019
-.L2028:
-	ldr	r3, [sp, #8]
-	uxth	r10, r7
-	add	r3, r3, r10, lsl #2
-	str	r3, [sp, #12]
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3, r10, lsl #2]
-	ldr	r3, [sp, #4]
-	cmp	r3, r2, lsr #10
-	bne	.L2024
-	ldr	r3, .L2032+12
+	b	.L2037
+.L2039:
+	ldr	r3, [sp]
+	uxth	fp, r6
+	add	r3, r3, fp, lsl #2
+	str	r3, [sp, #4]
+	ldr	r3, [sp]
+	ldr	r2, [r3, fp, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L2034
+	ldr	r3, .L2043+8
 	str	r2, [r5, #4]
 	movs	r2, #1
-	ldr	r0, .L2032+4
+	ldr	r0, .L2043+4
 	ldr	r1, [r3]
 	str	r1, [r5, #8]
-	ldr	r1, .L2032+16
-	ldr	r8, [r1]
+	ldr	r1, .L2043+12
+	ldr	r7, [r1]
 	mov	r1, r2
-	str	r8, [r5, #12]
+	str	r7, [r5, #12]
 	bl	FlashReadPages
-	ldrh	r2, [r8, #8]
-	cmp	r2, fp
-	beq	.L2025
-	ldr	r1, .L2032+20
-	mov	r2, #672
-	ldr	r0, .L2032+24
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	beq	.L2035
+	ldr	r1, .L2043+16
+	movw	r2, #661
+	ldr	r0, .L2043+20
 	bl	printf
-	ldr	r1, .L2032+28
-	ldr	r0, .L2032+32
+	ldr	r1, .L2043+24
+	ldr	r0, .L2043+28
 	bl	printf
-.L2025:
+.L2035:
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	ldrh	r2, [r8, #8]
-	bne	.L2026
-.L2027:
-	ldr	r1, [sp, #12]
+	ldrh	r2, [r7, #8]
+	bne	.L2036
+.L2038:
+	ldr	r1, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L2032+36
+	ldr	r0, .L2043+32
 	str	r3, [r1]
 	ldr	r1, [r5, #4]
 	bl	printf
-	ldr	r3, .L2032+40
+	ldr	r3, .L2043+36
 	movs	r2, #1
 	str	r2, [r3]
-.L2015:
+.L2037:
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2026:
-	cmp	r2, fp
-	bne	.L2027
-	ldrh	r0, [r8]
+.L2036:
+	cmp	r2, r10
+	bne	.L2038
+	ldrh	r0, [r7]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L2027
+	bne	.L2038
 	ldr	r2, [r5, #8]
-	mov	r1, r10
+	mov	r1, fp
 	mov	r0, r4
 	bl	FtlMapWritePage
-.L2024:
-	adds	r7, r7, #1
-	b	.L2023
-.L2033:
+.L2034:
+	adds	r6, r6, #1
+	b	.L2033
+.L2044:
 	.align	2
-.L2032:
+.L2043:
 	.word	.LANCHOR54
 	.word	.LANCHOR202
-	.word	.LC39
 	.word	.LANCHOR184
 	.word	.LANCHOR188
 	.word	.LANCHOR212
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC40
+	.word	.LC39
 	.word	.LANCHOR77
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -14221,26 +14222,26 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2044
+	ldr	r3, .L2055
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	ldr	r5, [r3]
-	cbnz	r5, .L2035
+	cbnz	r5, .L2046
 	ldrh	r3, [r0]
 	movw	r2, #65535
 	ldr	r6, [r0, #12]
 	cmp	r3, r2
-	bne	.L2036
+	bne	.L2047
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L2037
-	ldr	r1, .L2044+4
-	mov	r2, #708
-	ldr	r0, .L2044+8
+	cbz	r3, .L2048
+	ldr	r1, .L2055+4
+	movw	r2, #697
+	ldr	r0, .L2055+8
 	bl	printf
-	ldr	r1, .L2044+12
-	ldr	r0, .L2044+16
+	ldr	r1, .L2055+12
+	ldr	r0, .L2055+16
 	bl	printf
-.L2037:
+.L2048:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -14252,20 +14253,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.L2035:
+.L2046:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2036:
+.L2047:
 	ldrh	r6, [r6, r3, lsl #1]
 	movs	r1, #255
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L2044+20
-	ldr	r8, .L2044+32
+	ldr	r2, .L2055+20
+	ldr	r8, .L2055+32
 	ldr	r7, [r0, #24]
 	orr	r3, r3, r6, lsl #10
 	ldr	r0, [r8]
 	str	r3, [r2, #4]
-	ldr	r3, .L2044+24
+	ldr	r3, .L2055+24
 	str	r0, [r2, #8]
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
@@ -14276,7 +14277,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r6, [r3, #2]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L2044+28
+	ldr	r3, .L2055+28
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
@@ -14284,37 +14285,37 @@ Ftl_write_map_blk_to_last_page:
 	mov	r3, r5
 	ldr	r1, [r8]
 	mov	r2, r5
-.L2038:
+.L2049:
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L2040
+	bhi	.L2051
 	movs	r2, #1
 	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L2044+20
+	ldr	r0, .L2055+20
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
 	mov	r0, r4
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-	b	.L2035
-.L2040:
+	b	.L2046
+.L2051:
 	ldr	r0, [r7, r3, lsl #2]
 	cmp	r6, r0, lsr #10
-	bne	.L2039
+	bne	.L2050
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r3, [r1, r2, lsl #3]
 	add	r5, r1, r2, lsl #3
 	ldr	r0, [r7, r3, lsl #2]
 	str	r0, [r5, #4]
-.L2039:
+.L2050:
 	adds	r3, r3, #1
-	b	.L2038
-.L2045:
+	b	.L2049
+.L2056:
 	.align	2
-.L2044:
+.L2055:
 	.word	.LANCHOR77
 	.word	.LANCHOR213
 	.word	.LC5
@@ -14334,16 +14335,17 @@ Ftl_write_map_blk_to_last_page:
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r10, .L2069+36
+	ldr	r10, .L2079+40
 	mov	r8, r1
 	movs	r6, #0
-	str	r2, [sp]
-.L2047:
-	ldr	r2, .L2069
+	str	r2, [sp, #4]
+	mov	fp, r10
+.L2058:
+	ldr	r2, .L2079
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -14351,57 +14353,56 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L2048
+	bge	.L2059
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2049
-.L2048:
+	bne	.L2060
+.L2059:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L2049:
-	ldr	r3, .L2069+4
+.L2060:
+	ldr	r3, .L2079+4
 	ldr	r2, [r3]
-	str	r3, [sp, #4]
+	str	r3, [sp, #8]
 	cmp	r2, #0
-	bne	.L2064
+	bne	.L2075
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L2051
-	ldr	r1, .L2069+8
-	mov	r2, #768
-	ldr	r0, .L2069+12
+	cbnz	r3, .L2062
+	ldr	r1, .L2079+8
+	movw	r2, #757
+	ldr	r0, .L2079+12
 	bl	printf
-	ldr	r1, .L2069+16
-	ldr	r0, .L2069+20
+	ldr	r1, .L2079+16
+	ldr	r0, .L2079+20
 	bl	printf
-.L2051:
+.L2062:
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L2052
-	ldr	r1, .L2069+8
-	movw	r2, #769
-	ldr	r0, .L2069+12
+	bcc	.L2063
+	ldr	r1, .L2079+8
+	movw	r2, #758
+	ldr	r0, .L2079+12
 	bl	printf
-	ldr	r1, .L2069+16
-	ldr	r0, .L2069+20
+	ldr	r1, .L2079+16
+	ldr	r0, .L2079+20
 	bl	printf
-.L2052:
+.L2063:
 	ldrh	r2, [r4]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
-	ldr	r5, .L2069+24
+	ldr	r5, .L2079+24
 	ldrh	r7, [r3, r2, lsl #1]
 	movs	r2, #16
 	ldrh	r3, [r4, #2]
-	mov	fp, r5
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #4]
-	ldr	r3, [sp]
+	ldr	r3, [sp, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L2069+28
+	ldr	r3, .L2079+28
 	ldr	r0, [r3]
 	str	r0, [r5, #12]
 	bl	ftl_memset
@@ -14422,52 +14423,62 @@ FtlMapWritePage:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	adds	r3, r1, #1
+	mov	r3, r5
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L2053
+	bne	.L2064
 	ldr	r1, [r5, #4]
 	adds	r6, r6, #1
-	ldr	r0, .L2069+32
+	ldr	r0, .L2079+32
 	uxth	r6, r6
+	str	r5, [sp, #12]
 	bl	printf
 	ldrh	r2, [r4, #2]
+	ldr	r3, [sp, #12]
 	cmp	r2, #2
-	itttt	ls
-	ldrls	r3, .L2069+36
-	ldrhls	r2, [r3]
+	ittt	ls
+	ldrhls	r2, [fp]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L2047
+	bls	.L2058
 	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L2069+40
+	ldr	r1, [r3, #4]
+	ldr	r0, .L2079+36
 	bl	printf
-	ldr	r2, [sp, #4]
+	ldr	r2, [sp, #8]
 	movs	r3, #1
 	str	r3, [r2]
-.L2064:
+.L2075:
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2053:
-	cbz	r1, .L2056
+.L2064:
+	cbz	r1, .L2067
 	cmp	r2, #1
 	strh	r7, [r4, #40]	@ movhi
-	beq	.L2047
-	cmp	r1, #256
+	bne	.L2068
+.L2069:
+	movs	r3, #0
+	str	r3, [r4, #36]
+	b	.L2058
 .L2068:
-	beq	.L2047
-	ldr	r2, [fp, #4]
+	cmp	r1, #256
+.L2078:
+	beq	.L2069
+	ldr	r2, [r4, #36]
+	cmp	r2, #0
+	bne	.L2069
+	ldr	r2, [r3, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
-	b	.L2064
-.L2056:
+	b	.L2075
+.L2067:
 	cmp	r2, #1
-	b	.L2068
-.L2070:
+	b	.L2078
+.L2080:
 	.align	2
-.L2069:
+.L2079:
 	.word	.LANCHOR165
 	.word	.LANCHOR77
 	.word	.LANCHOR214
@@ -14476,9 +14487,9 @@ FtlMapWritePage:
 	.word	.LC7
 	.word	.LANCHOR202
 	.word	.LANCHOR188
+	.word	.LC40
 	.word	.LC41
 	.word	.LANCHOR54
-	.word	.LC42
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -14493,9 +14504,9 @@ flush_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
-	ldr	r5, .L2072
+	ldr	r5, .L2082
 	muls	r4, r0, r4
-	ldr	r0, .L2072+4
+	ldr	r0, .L2082+4
 	ldr	r3, [r5]
 	adds	r2, r3, r4
 	ldrh	r1, [r3, r4]
@@ -14508,9 +14519,9 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L2073:
+.L2083:
 	.align	2
-.L2072:
+.L2082:
 	.word	.LANCHOR97
 	.word	.LANCHOR127
 	.size	flush_l2p_region, .-flush_l2p_region
@@ -14527,30 +14538,30 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	movs	r4, #0
-	ldr	r5, .L2078
-	ldr	r6, .L2078+4
-.L2075:
+	ldr	r5, .L2088
+	ldr	r6, .L2088+4
+.L2085:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	cmp	r3, r0
-	bhi	.L2077
+	bhi	.L2087
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2077:
+.L2087:
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L2076
+	bge	.L2086
 	bl	flush_l2p_region
-.L2076:
+.L2086:
 	adds	r4, r4, #1
-	b	.L2075
-.L2079:
+	b	.L2085
+.L2089:
 	.align	2
-.L2078:
+.L2088:
 	.word	.LANCHOR68
 	.word	.LANCHOR97
 	.size	l2p_flush, .-l2p_flush
@@ -14565,7 +14576,7 @@ l2p_flush:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2092
+	ldr	r3, .L2102
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	str	r2, [sp]
@@ -14574,26 +14585,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2088
-	ldr	r3, .L2092+4
+	bhi	.L2098
+	ldr	r3, .L2102+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2082:
-	cbnz	r5, .L2087
-.L2080:
+.L2092:
+	cbnz	r5, .L2097
+.L2090:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2087:
-	ldr	r3, .L2092+8
+.L2097:
+	ldr	r3, .L2102+8
 	mov	r0, r7
-	ldr	r10, .L2092+24
+	ldr	r10, .L2102+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2092+12
+	ldr	r3, .L2102+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -14607,9 +14618,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2084
+	cbz	r2, .L2094
 	cmp	r4, r3
-	beq	.L2084
+	beq	.L2094
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -14619,7 +14630,7 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L2085:
+.L2095:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -14632,7 +14643,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2092+16
+	ldr	r0, .L2102+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -14643,20 +14654,20 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2082
-.L2084:
-	ldr	r3, .L2092+20
+	b	.L2092
+.L2094:
+	ldr	r3, .L2102+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2085
-.L2088:
+	b	.L2095
+.L2098:
 	mov	r8, #-1
-	b	.L2080
-.L2093:
+	b	.L2090
+.L2103:
 	.align	2
-.L2092:
+.L2102:
 	.word	.LANCHOR50
 	.word	.LANCHOR57
 	.word	.LANCHOR194
@@ -14677,66 +14688,66 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2096
-	ldr	r3, .L2096+4
+	ldr	r2, .L2106
+	ldr	r3, .L2106+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2094
-	ldr	r3, .L2096+8
+	bne	.L2104
+	ldr	r3, .L2106+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L2096+12
+	ldr	r3, .L2106+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2096+16
+	ldr	r3, .L2106+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2096+20
+	ldr	r3, .L2106+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2096+24
+	ldr	r3, .L2106+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2096+28
+	ldr	r3, .L2106+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2096+32
+	ldr	r3, .L2106+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2096+36
+	ldr	r3, .L2106+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2096+40
+	ldr	r3, .L2106+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2096+44
+	ldr	r3, .L2106+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2096+48
+	ldr	r3, .L2106+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2096+52
+	ldr	r3, .L2106+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2096+56
+	ldr	r3, .L2106+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2096+60
+	ldr	r3, .L2106+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2096+64
+	ldr	r3, .L2106+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L2094:
+.L2104:
 	bx	lr
-.L2097:
+.L2107:
 	.align	2
-.L2096:
+.L2106:
 	.word	.LANCHOR138
 	.word	1179929683
-	.word	1342177353
+	.word	1342177360
 	.word	.LANCHOR216
 	.word	.LANCHOR217
 	.word	.LANCHOR161
@@ -14764,40 +14775,40 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2105
+	ldr	r3, .L2115
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2103
-	ldr	r3, .L2105+4
+	beq	.L2113
+	ldr	r3, .L2115+4
 	ldr	r3, [r3]
 	cmp	r3, #39
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2099:
-	ldr	r1, .L2105+8
+.L2109:
+	ldr	r1, .L2115+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
 	ittt	ls
 	addls	r2, r2, #1
 	movls	r3, #1
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2105+12
-	cbnz	r0, .L2101
+	ldr	r2, .L2115+12
+	cbnz	r0, .L2111
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L2102
-.L2101:
+	bcc	.L2112
+.L2111:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L2105+16
+	ldr	r3, .L2115+16
 	str	r3, [r2]
-	ldr	r3, .L2105+20
+	ldr	r3, .L2115+20
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -14808,15 +14819,15 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L2102:
+.L2112:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2103:
+.L2113:
 	movs	r3, #32
-	b	.L2099
-.L2106:
+	b	.L2109
+.L2116:
 	.align	2
-.L2105:
+.L2115:
 	.word	.LANCHOR28
 	.word	.LANCHOR170
 	.word	.LANCHOR218
@@ -14835,108 +14846,108 @@ FtlEctTblFlush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2134
+	ldr	r3, .L2144
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2108
-	ldr	r1, .L2134+4
-	movw	r2, #3289
-	ldr	r0, .L2134+8
+	bcs	.L2118
+	ldr	r1, .L2144+4
+	movw	r2, #3233
+	ldr	r0, .L2144+8
 	bl	printf
-	ldr	r1, .L2134+12
-	ldr	r0, .L2134+16
+	ldr	r1, .L2144+12
+	ldr	r0, .L2144+16
 	bl	printf
-.L2108:
-	ldr	r3, .L2134+20
+.L2118:
+	ldr	r3, .L2144+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2109
+	bne	.L2119
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2110
-	ldr	r3, .L2134+24
+	beq	.L2120
+	ldr	r3, .L2144+24
 	mov	r0, r5
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2111
+	cbz	r3, .L2121
 	bl	INSERT_DATA_LIST
-.L2110:
+.L2120:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2134+28
+	ldr	r3, .L2144+28
 	cmp	r4, r3
-	beq	.L2112
-	ldr	r3, .L2134+32
+	beq	.L2122
+	ldr	r3, .L2144+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2112
-	ldr	r3, .L2134+36
+	beq	.L2122
+	ldr	r3, .L2144+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2113
-.L2112:
+	cbz	r3, .L2123
+.L2122:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2114:
-	ldr	r6, .L2134+40
+.L2124:
+	ldr	r6, .L2144+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2119
+	beq	.L2129
 	cmp	r5, r0
-	bne	.L2120
-	ldr	r3, .L2134+24
+	bne	.L2130
+	ldr	r3, .L2144+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2121
-.L2120:
+	cbz	r3, .L2131
+.L2130:
 	bl	update_vpc_list
-.L2121:
+.L2131:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2119:
+.L2129:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2109:
+.L2119:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2111:
+.L2121:
 	bl	INSERT_FREE_LIST
-	b	.L2110
-.L2113:
-	ldr	r3, .L2134+44
+	b	.L2120
+.L2123:
+	ldr	r3, .L2144+44
 	cmp	r4, r3
-	bne	.L2114
+	bne	.L2124
 	cmp	r2, #3
-	beq	.L2116
-	ldr	r2, .L2134+48
+	beq	.L2126
+	ldr	r2, .L2144+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2117
-.L2116:
+	bne	.L2127
+.L2126:
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2117:
-	ldr	r2, .L2134+52
+.L2127:
+	ldr	r2, .L2144+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2114
-	ldr	r2, .L2134+56
+	beq	.L2124
+	ldr	r2, .L2144+56
 	ldr	r2, [r2]
 	cmp	r2, #39
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2114
-.L2135:
+	b	.L2124
+.L2145:
 	.align	2
-.L2134:
+.L2144:
 	.word	.LANCHOR40
 	.word	.LANCHOR219
 	.word	.LC5
@@ -14964,7 +14975,7 @@ allocate_new_data_superblock:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2146
+	ldr	r3, .L2156
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r2
 	adds	r2, r0, r1
@@ -14973,28 +14984,28 @@ FtlVendorPartRead:
 	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2145
-	ldr	r3, .L2146+4
+	bhi	.L2155
+	ldr	r3, .L2156+4
 	mov	r8, #0
-	ldr	fp, .L2146+28
+	ldr	fp, .L2156+28
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2138:
-	cbnz	r6, .L2144
-.L2136:
+.L2148:
+	cbnz	r6, .L2154
+.L2146:
 	mov	r0, r8
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2144:
-	ldr	r3, .L2146+8
+.L2154:
+	ldr	r3, .L2156+8
 	mov	r0, r7
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2146+12
+	ldr	r2, .L2156+12
 	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
@@ -15009,7 +15020,7 @@ FtlVendorPartRead:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
 	cmp	r3, #0
-	beq	.L2140
+	beq	.L2150
 	ldr	r2, [fp]
 	add	r0, sp, #20
 	str	r3, [sp, #24]
@@ -15023,28 +15034,28 @@ FtlVendorPartRead:
 	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	ldr	r2, .L2146+16
+	ldr	r2, .L2156+16
 	it	eq
 	moveq	r8, #-1
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2142
+	bne	.L2152
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2146+20
+	ldr	r0, .L2156+20
 	bl	printf
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2146+24
+	ldr	r0, .L2156+24
 	bl	FtlMapWritePage
-.L2142:
+.L2152:
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2143:
+.L2153:
 	ldr	r3, [sp, #8]
 	adds	r5, r5, #1
 	subs	r6, r6, r4
@@ -15053,25 +15064,25 @@ FtlVendorPartRead:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2138
-.L2140:
+	b	.L2148
+.L2150:
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2143
-.L2145:
+	b	.L2153
+.L2155:
 	mov	r8, #-1
-	b	.L2136
-.L2147:
+	b	.L2146
+.L2157:
 	.align	2
-.L2146:
+.L2156:
 	.word	.LANCHOR50
 	.word	.LANCHOR57
 	.word	.LANCHOR194
 	.word	.LANCHOR56
 	.word	.LANCHOR202
-	.word	.LC43
+	.word	.LC42
 	.word	.LANCHOR215
 	.word	.LANCHOR185
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -15088,34 +15099,34 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L2150
-	ldr	r5, .L2150+4
+	ldr	r4, .L2160
+	ldr	r5, .L2160+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2150+8
+	ldr	r3, .L2160+8
 	cmp	r2, r3
-	beq	.L2149
-	ldr	r1, .L2150+12
-	ldr	r0, .L2150+16
+	beq	.L2159
+	ldr	r1, .L2160+12
+	ldr	r0, .L2160+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2149:
+.L2159:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2151:
+.L2161:
 	.align	2
-.L2150:
+.L2160:
 	.word	.LANCHOR191
 	.word	.LANCHOR190
 	.word	1112818501
-	.word	.LC44
+	.word	.LC43
 	.word	.LC7
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
@@ -15131,92 +15142,92 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L2156
+	ldr	r4, .L2166
 	movs	r0, #0
-	ldr	r5, .L2156+4
+	ldr	r5, .L2166+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2153
+	beq	.L2163
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L2153:
+.L2163:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2156+8
-	bne	.L2154
+	ldr	r5, .L2166+8
+	bne	.L2164
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2156+12
+	ldr	r3, .L2166+12
 	str	r2, [r3]
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2156+16
+	ldr	r3, .L2166+16
 	str	r2, [r3]
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2156+20
+	ldr	r3, .L2166+20
 	str	r2, [r3]
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2156+24
+	ldr	r3, .L2166+24
 	str	r2, [r3]
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2156+28
+	ldr	r3, .L2166+28
 	str	r2, [r3]
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2156+32
+	ldr	r3, .L2166+32
 	str	r2, [r3]
 	ldr	r3, [r4, #28]
 	ldr	r2, [r4, #32]
 	str	r3, [r5]
-	ldr	r3, .L2156+36
+	ldr	r3, .L2166+36
 	str	r2, [r3]
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2156+40
+	ldr	r3, .L2166+40
 	str	r2, [r3]
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2156+44
+	ldr	r3, .L2166+44
 	str	r2, [r3]
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2156+48
+	ldr	r3, .L2166+48
 	str	r2, [r3]
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2156+52
+	ldr	r3, .L2166+52
 	str	r2, [r3]
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2156+56
+	ldr	r3, .L2166+56
 	str	r2, [r3]
-.L2154:
-	ldr	r3, .L2156+60
+.L2164:
+	ldr	r3, .L2166+60
 	movs	r2, #0
 	str	r2, [r3]
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2156+64
+	ldr	r3, .L2166+64
 	cmp	r2, r3
-	bne	.L2155
-	ldr	r3, .L2156+68
+	bne	.L2165
+	ldr	r3, .L2166+68
 	movs	r2, #1
-	ldr	r1, .L2156+72
-	ldr	r0, .L2156+76
+	ldr	r1, .L2166+72
+	ldr	r0, .L2166+76
 	str	r2, [r3]
 	bl	printf
-.L2155:
-	ldr	r3, .L2156+80
-	ldr	r1, .L2156+84
+.L2165:
+	ldr	r3, .L2166+80
+	ldr	r1, .L2166+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2156+88
+	ldr	r3, .L2166+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2156+92
+	ldr	r3, .L2166+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2157:
+.L2167:
 	.align	2
-.L2156:
+.L2166:
 	.word	.LANCHOR138
 	.word	1179929683
 	.word	.LANCHOR168
@@ -15235,13 +15246,43 @@ Ftl_load_ext_data:
 	.word	.LANCHOR157
 	.word	305432421
 	.word	.LANCHOR28
-	.word	.LC45
+	.word	.LC44
 	.word	.LC7
 	.word	.LANCHOR48
 	.word	.LANCHOR40
 	.word	.LANCHOR167
 	.word	.LANCHOR205
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.ftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartRead
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.ftl_sys_read,"ax",%progbits
+	.align	1
+	.global	ftl_sys_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sys_read, %function
+ftl_sys_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #512
+	b	FtlVendorPartRead
+	.size	ftl_sys_read, .-ftl_sys_read
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
 	.align	1
 	.global	FtlMapBlkWriteDumpData
@@ -15257,34 +15298,34 @@ FtlMapBlkWriteDumpData:
 	mov	r4, r0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2158
+	beq	.L2170
 	movs	r3, #0
 	ldrh	r6, [r0, #6]
 	str	r3, [r0, #36]
-	ldr	r3, .L2172
+	ldr	r3, .L2184
 	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2158
-	ldr	r3, .L2172+4
-	ldr	r5, .L2172+8
+	bne	.L2170
+	ldr	r3, .L2184+4
+	ldr	r5, .L2184+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2172+12
+	ldr	r3, .L2184+12
 	ldr	r8, [r3]
 	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2162
-	ldr	r2, .L2172+16
+	cbz	r3, .L2174
+	ldr	r2, .L2184+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2162
+	bge	.L2174
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2162
+	beq	.L2174
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -15296,44 +15337,44 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2162
+	beq	.L2174
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2162
+	bne	.L2174
 	ldr	r2, [r5, #8]
-.L2171:
+.L2183:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FtlMapWritePage
-.L2162:
+.L2174:
 	subs	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
 	str	r3, [r7, #4]
-	cbz	r3, .L2163
+	cbz	r3, .L2175
 	movs	r2, #1
-	ldr	r0, .L2172+8
+	ldr	r0, .L2184+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2164:
+.L2176:
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2171
-.L2163:
-	ldr	r3, .L2172+20
+	b	.L2183
+.L2175:
+	ldr	r3, .L2184+20
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2164
-.L2158:
+	b	.L2176
+.L2170:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2173:
+.L2185:
 	.align	2
-.L2172:
+.L2184:
 	.word	.LANCHOR77
 	.word	.LANCHOR184
 	.word	.LANCHOR202
@@ -15354,69 +15395,69 @@ FtlScanSysBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L2256
+	ldr	r5, .L2268
 	sub	sp, sp, #32
 	mov	r1, r4
-	ldr	r3, .L2256+4
+	ldr	r3, .L2268+4
 	ldr	r2, [r5]
-	ldr	r6, .L2256+8
+	ldr	r6, .L2268+8
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2256+12
+	ldr	r3, .L2268+12
 	lsls	r2, r2, #2
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2256+16
+	ldr	r7, .L2268+16
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2256+20
+	ldr	r3, .L2268+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2256+24
+	ldr	r3, .L2268+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L2256+28
+	ldr	r3, .L2268+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L2256+32
+	ldr	r0, .L2268+32
 	bl	ftl_memset
-	ldr	r3, .L2256+36
+	ldr	r3, .L2268+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.L2175:
-	ldr	r3, .L2256+40
+.L2187:
+	ldr	r3, .L2268+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2217
-	ldr	r3, .L2256+44
+	bls	.L2229
+	ldr	r3, .L2268+44
 	movs	r5, #0
-	ldr	r1, .L2256+48
+	ldr	r1, .L2268+48
 	mov	fp, r5
 	movs	r7, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2256+52
+	ldr	r3, .L2268+52
 	ldr	r2, [r1]
-	ldr	r1, .L2256+56
+	ldr	r1, .L2268+56
 	ldr	r6, [r3]
-	ldr	r3, .L2256+60
+	ldr	r3, .L2268+60
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	ldr	r3, [r3]
-	ldr	r2, .L2256+64
-	b	.L2218
-.L2177:
+	ldr	r2, .L2268+64
+	b	.L2230
+.L2189:
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
@@ -15426,7 +15467,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L2176
+	cbnz	r0, .L2188
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
 	ldr	r4, [sp, #8]
@@ -15439,31 +15480,31 @@ FtlScanSysBlk:
 	str	r1, [r0, #12]
 	add	r1, fp, #1
 	uxth	fp, r1
-.L2176:
+.L2188:
 	adds	r5, r5, #1
-.L2218:
+.L2230:
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L2177
+	bhi	.L2189
 	cmp	fp, #0
-	bne	.L2178
-.L2216:
+	bne	.L2190
+.L2228:
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-	b	.L2175
-.L2178:
+	b	.L2187
+.L2190:
 	movs	r7, #0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.L2179:
+.L2191:
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L2216
-	ldr	r3, .L2256+52
+	bls	.L2228
+	ldr	r3, .L2268+52
 	mov	r8, #36
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -15473,10 +15514,10 @@ FtlScanSysBlk:
 	ldr	r6, [r2, #12]
 	adds	r3, r3, #1
 	ubfx	r5, r5, #10, #16
-	bne	.L2182
+	bne	.L2194
 	mov	r10, #16
-.L2184:
-	ldr	r3, .L2256+52
+.L2196:
+	ldr	r3, .L2268+52
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, [r3]
@@ -15488,88 +15529,88 @@ FtlScanSysBlk:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	ldr	r3, .L2256+52
+	ldr	r3, .L2268+52
 	ldr	r3, [r3]
-	bne	.L2181
+	bne	.L2193
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2256+52
+	ldr	r3, .L2268+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2183
-.L2182:
-	ldr	r3, .L2256+68
+	beq	.L2195
+.L2194:
+	ldr	r3, .L2268+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L2185
+	beq	.L2197
 	cmp	r2, r3
-	bhi	.L2186
-.L2185:
+	bhi	.L2198
+.L2197:
 	adds	r2, r3, #1
 	ittt	ne
-	ldrne	r1, .L2256+68
+	ldrne	r1, .L2268+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2186:
+.L2198:
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2188
-	bhi	.L2189
+	beq	.L2200
+	bhi	.L2201
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2190
-.L2187:
+	beq	.L2202
+.L2199:
 	adds	r7, r7, #1
-	b	.L2179
-.L2181:
+	b	.L2191
+.L2193:
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2182
+	bne	.L2194
 	add	r10, r10, #-1
 	uxth	r10, r10
 	cmp	r10, #0
-	bne	.L2184
-.L2183:
-	ldr	r3, .L2256+72
+	bne	.L2196
+.L2195:
+	ldr	r3, .L2268+72
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2255
-.L2214:
+	cbnz	r1, .L2267
+.L2226:
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2187
-.L2189:
+	b	.L2199
+.L2201:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2191
+	beq	.L2203
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2187
-.L2255:
+	bne	.L2199
+.L2267:
 	movs	r1, #0
-	b	.L2214
-.L2191:
-	ldr	r3, .L2256+8
+	b	.L2226
+.L2203:
+	ldr	r3, .L2268+8
 	ldrh	r2, [r3]
-	ldr	r3, .L2256
+	ldr	r3, .L2268
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2193
-	ldr	r1, .L2256+76
-	movw	r2, #1308
-	ldr	r0, .L2256+80
+	bls	.L2205
+	ldr	r1, .L2268+76
+	movw	r2, #1297
+	ldr	r0, .L2268+80
 	bl	printf
-	ldr	r1, .L2256+84
-	ldr	r0, .L2256+88
+	ldr	r1, .L2268+84
+	ldr	r0, .L2268+88
 	bl	printf
-.L2193:
+.L2205:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	ldr	r2, .L2256+12
+	ldr	r2, .L2268+12
 	uxth	r10, r1
 	ldr	ip, [r2]
 	add	r3, r10, #-1
@@ -15577,61 +15618,61 @@ FtlScanSysBlk:
 	add	r10, r10, #-1
 	sxth	r3, r3
 	sxth	r10, r10
-.L2194:
+.L2206:
 	cmp	r3, r10
-	bgt	.L2200
+	bgt	.L2212
 	cmp	r3, #0
-	bge	.L2233
-	b	.L2187
-.L2200:
+	bge	.L2245
+	b	.L2199
+.L2212:
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L2195
+	bls	.L2207
 	ldr	r2, [ip]
-	cbnz	r2, .L2196
+	cbnz	r2, .L2208
 	cmp	r1, r0
 	ittt	ne
-	ldrne	r2, .L2256+8
+	ldrne	r2, .L2268+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L2196:
-	ldr	r2, .L2256+20
+.L2208:
+	ldr	r2, .L2268+20
 	uxth	r10, r3
 	ldr	r0, [r2]
 	movs	r2, #0
-.L2197:
+.L2209:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2198
+	bhi	.L2210
 	ldr	r2, [r6, #4]
 	cmp	r3, #0
 	str	r2, [r8]
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2187
-	ldr	r2, .L2256+8
+	blt	.L2199
+	ldr	r2, .L2268+8
 	ldrh	r0, [r2]
-	ldr	r2, .L2256
+	ldr	r2, .L2268
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2187
-.L2233:
-	ldr	r2, .L2256+8
+	bgt	.L2199
+.L2245:
+	ldr	r2, .L2268+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2256+20
-.L2253:
+	ldr	r2, .L2268+20
+.L2265:
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2187
-.L2198:
+	b	.L2199
+.L2210:
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15639,14 +15680,14 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [ip, r1, lsl #2]
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2197
-.L2195:
+	b	.L2209
+.L2207:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2194
-.L2257:
+	b	.L2206
+.L2269:
 	.align	2
-.L2256:
+.L2268:
 	.word	.LANCHOR65
 	.word	.LANCHOR71
 	.word	.LANCHOR128
@@ -15670,75 +15711,75 @@ FtlScanSysBlk:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-.L2190:
-	ldr	r8, .L2258+20
-	ldr	r10, .L2258+28
+.L2202:
+	ldr	r8, .L2270+20
+	ldr	r10, .L2270+28
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L2203
-	ldr	r1, .L2258
-	movw	r2, #1355
-	ldr	r0, .L2258+4
+	bls	.L2215
+	ldr	r1, .L2270
+	mov	r2, #1344
+	ldr	r0, .L2270+4
 	bl	printf
-	ldr	r1, .L2258+8
-	ldr	r0, .L2258+12
+	ldr	r1, .L2270+8
+	ldr	r0, .L2270+12
 	bl	printf
-.L2203:
-	ldr	r2, .L2258+16
+.L2215:
+	ldr	r2, .L2270+16
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
 	ldr	r0, [r2]
 	add	r10, lr, #-1
 	sxth	r3, r10
 	sub	r10, r10, ip
-.L2204:
+.L2216:
 	cmp	r3, r10
-	ble	.L2209
+	ble	.L2221
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L2205
+	bls	.L2217
 	ldr	r2, [r0]
-	cbnz	r2, .L2206
+	cbnz	r2, .L2218
 	cmp	lr, ip
 	ittt	ne
-	ldrne	r2, .L2258+20
+	ldrne	r2, .L2270+20
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L2206:
-	ldr	r2, .L2258+24
+.L2218:
+	ldr	r2, .L2270+24
 	uxth	r10, r3
 	ldr	ip, [r2]
 	movs	r2, #0
-.L2207:
+.L2219:
 	uxth	lr, r2
 	sxth	r1, r2
 	cmp	r10, lr
-	bhi	.L2208
+	bhi	.L2220
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2209:
+.L2221:
 	cmp	r3, #0
-	blt	.L2187
-	ldr	r2, .L2258+28
-	ldr	ip, .L2258+20
+	blt	.L2199
+	ldr	r2, .L2270+28
+	ldr	ip, .L2270+20
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2187
+	bgt	.L2199
 	ldr	r2, [r6, #4]
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
 	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2258+24
-	b	.L2253
-.L2208:
+	ldr	r2, .L2270+24
+	b	.L2265
+.L2220:
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
@@ -15746,91 +15787,91 @@ FtlScanSysBlk:
 	ldrh	lr, [lr, #2]
 	str	r4, [r0, r1, lsl #2]
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2207
-.L2205:
+	b	.L2219
+.L2217:
 	subs	r3, r3, #1
 	sxth	r3, r3
-	b	.L2204
-.L2188:
-	ldr	r8, .L2258+48
+	b	.L2216
+.L2200:
+	ldr	r8, .L2270+48
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2211
-.L2254:
+	bne	.L2223
+.L2266:
 	strh	r5, [r8]	@ movhi
 	str	r3, [r8, #8]
-	b	.L2187
-.L2211:
+	b	.L2199
+.L2223:
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2212
+	beq	.L2224
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2212:
+.L2224:
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L2213
+	bcs	.L2225
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L2254
-.L2213:
+	b	.L2266
+.L2225:
 	strh	r5, [r8, #4]	@ movhi
-	b	.L2187
-.L2217:
-	ldr	r3, .L2258+32
+	b	.L2199
+.L2229:
+	ldr	r3, .L2270+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2219
-.L2222:
-	ldr	r3, .L2258+24
+	cbz	r3, .L2231
+.L2234:
+	ldr	r3, .L2270+24
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L2220
-.L2221:
-	ldr	r3, .L2258+36
+	beq	.L2232
+.L2233:
+	ldr	r3, .L2270+36
 	ldrh	r2, [r3]
-	ldr	r3, .L2258+40
+	ldr	r3, .L2270+40
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2252
-	ldr	r1, .L2258
-	movw	r2, #1489
-	ldr	r0, .L2258+4
+	bls	.L2264
+	ldr	r1, .L2270
+	movw	r2, #1478
+	ldr	r0, .L2270+4
 	bl	printf
-	ldr	r1, .L2258+8
-	ldr	r0, .L2258+12
+	ldr	r1, .L2270+8
+	ldr	r0, .L2270+12
 	bl	printf
-.L2252:
+.L2264:
 	movs	r0, #0
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2219:
-	ldr	r1, .L2258+36
+.L2231:
+	ldr	r1, .L2270+36
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L2222
-	ldr	r5, .L2258+40
+	beq	.L2234
+	ldr	r5, .L2270+40
 	ldr	r0, [r5]
-.L2223:
+.L2235:
 	sxth	r1, r3
 	cmp	r1, r0
-	bcs	.L2222
+	bcs	.L2234
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L2223
-	ldr	r3, .L2258+44
+	beq	.L2235
+	ldr	r3, .L2270+44
 	movs	r6, #0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L2224:
+.L2236:
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L2222
+	bcs	.L2234
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
@@ -15839,30 +15880,30 @@ FtlScanSysBlk:
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	sxth	r3, r3
-	b	.L2224
-.L2220:
-	ldr	r3, .L2258+20
+	b	.L2236
+.L2232:
+	ldr	r3, .L2270+20
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2221
-	ldr	r5, .L2258+28
+	beq	.L2233
+	ldr	r5, .L2270+28
 	ldrh	r1, [r5]
-.L2229:
+.L2241:
 	sxth	r3, r2
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L2221
+	bge	.L2233
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L2229
-	ldr	r2, .L2258+16
+	beq	.L2241
+	ldr	r2, .L2270+16
 	movs	r0, #0
 	ldr	r2, [r2]
-.L2230:
+.L2242:
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L2221
+	bge	.L2233
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
@@ -15871,10 +15912,10 @@ FtlScanSysBlk:
 	adds	r1, r3, #1
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-	b	.L2230
-.L2259:
+	b	.L2242
+.L2271:
 	.align	2
-.L2258:
+.L2270:
 	.word	.LANCHOR220
 	.word	.LC5
 	.word	.LC6
@@ -15902,15 +15943,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L2285+156
-	ldr	r5, .L2285
+	ldr	r8, .L2297+156
+	ldr	r5, .L2297
 	ldr	r3, [r8]
-	ldr	r4, .L2285+4
-	ldr	r10, .L2285+160
+	ldr	r4, .L2297+4
+	ldr	r10, .L2297+160
 	ldrh	r2, [r5]
-	ldr	r7, .L2285+8
+	ldr	r7, .L2297+8
 	str	r3, [r4, #8]
-	ldr	r6, .L2285+12
+	ldr	r6, .L2297+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
@@ -15920,49 +15961,49 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L2261
-.L2270:
+	bne	.L2273
+.L2282:
 	mov	r0, #-1
-.L2260:
+.L2272:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2261:
+.L2273:
 	movs	r1, #1
 	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L2285+16
+	ldr	r3, .L2297+16
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L2263:
+.L2275:
 	cmp	r7, #0
-	bge	.L2266
-	ldr	r1, .L2285+20
-	movw	r2, #1549
-	ldr	r0, .L2285+24
+	bge	.L2278
+	ldr	r1, .L2297+20
+	movw	r2, #1538
+	ldr	r0, .L2297+24
 	bl	printf
-	ldr	r1, .L2285+28
-	ldr	r0, .L2285+32
+	ldr	r1, .L2297+28
+	ldr	r0, .L2297+32
 	bl	printf
-.L2265:
-	ldr	r2, .L2285+36
+.L2277:
+	ldr	r2, .L2297+36
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2268
-	ldr	r1, .L2285+20
-	movw	r2, #1551
-	ldr	r0, .L2285+24
+	bcs	.L2280
+	ldr	r1, .L2297+20
+	movw	r2, #1540
+	ldr	r0, .L2297+24
 	bl	printf
-	ldr	r1, .L2285+28
-	ldr	r0, .L2285+32
+	ldr	r1, .L2297+28
+	ldr	r0, .L2297+32
 	bl	printf
-.L2268:
+.L2280:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2285+40
+	ldr	r0, .L2297+40
 	bl	ftl_memcpy
 	ldrh	r2, [r5]
 	ldr	r3, [sp]
@@ -15979,14 +16020,14 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2285+44
+	ldr	r3, .L2297+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2285+48
+	ldr	r3, .L2297+48
 	ldrh	r3, [r3]
-	cbz	r3, .L2269
+	cbz	r3, .L2281
 	ldrh	r1, [r5]
-	ldr	r3, .L2285+52
+	ldr	r3, .L2297+52
 	ldrh	r2, [r3]
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
@@ -15995,65 +16036,65 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2285+56
+	ldr	r3, .L2297+56
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2269:
-	ldr	r4, .L2285+40
-	ldr	r3, .L2285+16
+.L2281:
+	ldr	r4, .L2297+40
+	ldr	r3, .L2297+16
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2270
-	ldr	r3, .L2285+60
+	bne	.L2282
+	ldr	r3, .L2297+60
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
 	ldrh	r5, [r4, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L2270
-	ldr	r3, .L2285+64
-	ldr	r2, .L2285+68
+	bne	.L2282
+	ldr	r3, .L2297+64
+	ldr	r2, .L2297+68
 	str	r5, [r3]
-	ldr	r3, .L2285+72
+	ldr	r3, .L2297+72
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L2285+76
+	ldr	r2, .L2297+76
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2285+80
+	ldr	r2, .L2297+80
 	str	r3, [r2]
-	ldr	r3, .L2285+84
+	ldr	r3, .L2297+84
 	ldr	r6, [r3]
-	ldr	r3, .L2285+88
+	ldr	r3, .L2297+88
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2285+92
+	ldr	r3, .L2297+92
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L2285+96
+	ldr	r3, .L2297+96
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L2271
-	ldr	r1, .L2285+20
-	movw	r2, #1578
-	ldr	r0, .L2285+24
+	bls	.L2283
+	ldr	r1, .L2297+20
+	movw	r2, #1567
+	ldr	r0, .L2297+24
 	bl	printf
-	ldr	r1, .L2285+28
-	ldr	r0, .L2285+32
+	ldr	r1, .L2297+28
+	ldr	r0, .L2297+32
 	bl	printf
-.L2271:
+.L2283:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2285+100
+	ldr	r3, .L2297+100
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2285+104
+	ldr	r7, .L2297+104
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2285+108
+	ldr	r1, .L2297+108
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -16072,7 +16113,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L2285+112
+	ldr	r2, .L2297+112
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -16082,31 +16123,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L2285+116
+	ldr	r5, .L2297+116
 	str	r3, [r5]
-	ldr	r5, .L2285+120
+	ldr	r5, .L2297+120
 	str	r3, [r5]
-	ldr	r5, .L2285+124
+	ldr	r5, .L2297+124
 	str	r3, [r5]
-	ldr	r5, .L2285+128
+	ldr	r5, .L2297+128
 	str	r3, [r5]
-	ldr	r5, .L2285+132
+	ldr	r5, .L2297+132
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2285+136
+	ldr	r5, .L2297+136
 	str	r3, [r5]
-	ldr	r5, .L2285+140
+	ldr	r5, .L2297+140
 	str	r3, [r5]
-	ldr	r5, .L2285+144
+	ldr	r5, .L2297+144
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L2285+148
+	ldr	r3, .L2297+148
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2285+152
+	ldr	r3, .L2297+152
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -16114,34 +16155,34 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2274
-	ldr	r0, .L2285+100
+	beq	.L2286
+	ldr	r0, .L2297+100
 	bl	make_superblock
-.L2274:
+.L2286:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2275
-	ldr	r0, .L2285+108
+	beq	.L2287
+	ldr	r0, .L2297+108
 	bl	make_superblock
-.L2275:
+.L2287:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2276
-	ldr	r0, .L2285+112
+	beq	.L2288
+	ldr	r0, .L2297+112
 	bl	make_superblock
-.L2276:
+.L2288:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2277
-	ldr	r0, .L2285+104
+	beq	.L2289
+	ldr	r0, .L2297+104
 	bl	make_superblock
-.L2277:
+.L2289:
 	movs	r0, #0
-	b	.L2260
-.L2266:
+	b	.L2272
+.L2278:
 	ldrh	r2, [r6]
 	mov	r0, fp
 	str	r3, [sp, #4]
@@ -16155,23 +16196,23 @@ FtlLoadSysInfo:
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2264
+	beq	.L2276
 	ldr	r2, [r8]
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L2264
+	bne	.L2276
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L2265
-.L2264:
+	beq	.L2277
+.L2276:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L2263
-.L2286:
+	b	.L2275
+.L2298:
 	.align	2
-.L2285:
+.L2297:
 	.word	.LANCHOR40
 	.word	.LANCHOR202
 	.word	.LANCHOR84
@@ -16227,97 +16268,97 @@ FtlDumpBlockInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	ubfx	r0, r0, #10, #16
-	ldr	r4, .L2299
+	ldr	r4, .L2311
 	sub	sp, sp, #88
 	mov	r8, r1
 	ldrh	r3, [r4]
 	str	r3, [sp, #24]
 	bl	P2V_block_in_plane
-	ldr	r1, .L2299+4
+	ldr	r1, .L2311+4
 	mov	r6, r0
-	ldr	r0, .L2299+8
+	ldr	r0, .L2311+8
 	bl	printf
-	ldr	r3, .L2299+12
+	ldr	r3, .L2311+12
 	mov	r1, r6
-	ldr	r0, .L2299+16
+	ldr	r0, .L2311+16
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r6, lsl #1]
 	bl	printf
 	add	r0, sp, #88
 	strh	r6, [r0, #-48]!	@ movhi
 	bl	make_superblock
-	ldr	r3, .L2299+20
+	ldr	r3, .L2311+20
 	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L2288
+	cbz	r5, .L2300
 	cmp	r8, #0
-	bne	.L2297
+	bne	.L2309
 	mov	r0, r6
 	bl	ftl_get_blk_mode
 	cmp	r0, #1
 	mov	r5, r0
-	bne	.L2288
-	ldr	r3, .L2299+24
+	bne	.L2300
+	ldr	r3, .L2311+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #24]
-.L2288:
+.L2300:
 	movs	r6, #0
 	ldrh	r3, [r4]
 	ldr	r2, [sp, #24]
 	mov	r1, r5
-	ldr	r0, .L2299+28
+	ldr	r0, .L2311+28
 	bl	printf
-.L2289:
-	ldr	r3, .L2299+32
+.L2301:
+	ldr	r3, .L2311+32
 	movs	r2, #0
 	add	ip, sp, #54
 	mov	r4, r2
 	movw	r10, #65535
 	mov	fp, #36
 	ldrh	lr, [r3]
-	ldr	r3, .L2299+36
+	ldr	r3, .L2311+36
 	ldr	r0, [r3]
-	ldr	r3, .L2299+40
+	ldr	r3, .L2311+40
 	ldr	r3, [r3]
 	str	r3, [sp, #28]
-	ldr	r3, .L2299+44
+	ldr	r3, .L2311+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2299+48
+	ldr	r3, .L2311+48
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2299+52
+	ldr	r3, .L2311+52
 	ldrh	r8, [r3]
-.L2290:
+.L2302:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2292
-	ldr	fp, .L2299+56
+	bhi	.L2304
+	ldr	fp, .L2311+56
 	mov	r8, #0
 	mov	r10, #36
 	mov	r2, r5
 	mov	r1, r4
 	bl	FlashReadPages
-.L2293:
+.L2305:
 	uxth	r3, r8
 	cmp	r4, r3
-	bhi	.L2294
+	bhi	.L2306
 	adds	r6, r6, #1
 	ldr	r3, [sp, #24]
 	uxth	r6, r6
 	cmp	r3, r6
-	bne	.L2289
-.L2295:
+	bne	.L2301
+.L2307:
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2297:
+.L2309:
 	movs	r5, #0
-	b	.L2288
-.L2292:
+	b	.L2300
+.L2304:
 	ldrh	r3, [ip, #2]!
 	cmp	r3, r10
-	beq	.L2291
+	beq	.L2303
 	mla	r1, fp, r4, r0
 	ldr	r7, [sp, #28]
 	orr	r3, r6, r3, lsl #10
@@ -16334,11 +16375,11 @@ FtlDumpBlockInfo:
 	bic	r3, r3, #3
 	add	r3, r3, r7
 	str	r3, [r1, #12]
-.L2291:
+.L2303:
 	adds	r2, r2, #1
-	b	.L2290
-.L2294:
-	ldr	r3, .L2299+36
+	b	.L2302
+.L2306:
+	ldr	r3, .L2311+36
 	mul	r0, r10, r8
 	ldrh	r1, [sp, #40]
 	add	r8, r8, #1
@@ -16362,25 +16403,25 @@ FtlDumpBlockInfo:
 	ldr	r2, [ip, r0]
 	mov	r0, fp
 	bl	printf
-	b	.L2293
-.L2300:
+	b	.L2305
+.L2312:
 	.align	2
-.L2299:
+.L2311:
 	.word	.LANCHOR53
 	.word	.LANCHOR224
-	.word	.LC46
+	.word	.LC45
 	.word	.LANCHOR84
-	.word	.LC47
+	.word	.LC46
 	.word	.LANCHOR8
 	.word	.LANCHOR54
-	.word	.LC48
+	.word	.LC47
 	.word	.LANCHOR38
 	.word	.LANCHOR180
 	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR106
 	.word	.LANCHOR59
-	.word	.LC49
+	.word	.LC48
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",%progbits
 	.align	1
@@ -16395,86 +16436,86 @@ FtlScanAllBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #88
-	ldr	r6, .L2311
-	ldr	r1, .L2311+4
-	ldr	r0, .L2311+8
+	ldr	r6, .L2323
+	ldr	r1, .L2323+4
+	ldr	r0, .L2323+8
 	bl	printf
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2302:
-	ldr	r3, .L2311+12
+.L2314:
+	ldr	r3, .L2323+12
 	ldrh	r0, [sp, #28]
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2310
+	bhi	.L2322
 	movs	r0, #0
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2310:
+.L2322:
 	add	r4, sp, #88
 	add	r7, sp, #54
 	strh	r0, [r4, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	ftl_get_blk_mode
-	ldr	r3, .L2311+16
+	ldr	r3, .L2323+16
 	mov	fp, #36
 	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
 	mov	r3, r0
-	ldr	r0, .L2311+20
+	ldr	r0, .L2323+20
 	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
 	mov	r0, r4
 	bl	make_superblock
-	ldr	r3, .L2311+24
+	ldr	r3, .L2323+24
 	movs	r2, #0
 	ldr	r0, [r6]
 	mov	r4, r2
 	ldrh	lr, [r3]
-	ldr	r3, .L2311+28
+	ldr	r3, .L2323+28
 	ldr	r3, [r3]
 	str	r3, [sp, #32]
-	ldr	r3, .L2311+32
+	ldr	r3, .L2323+32
 	ldrh	ip, [r3]
-	ldr	r3, .L2311+36
+	ldr	r3, .L2323+36
 	ldr	r3, [r3]
 	str	r3, [sp, #36]
-	ldr	r3, .L2311+40
+	ldr	r3, .L2323+40
 	ldrh	r8, [r3]
-.L2303:
+.L2315:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2305
-	ldr	r10, .L2311+44
+	bhi	.L2317
+	ldr	r10, .L2323+44
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #0
 	mov	r1, r4
 	bl	FlashReadPages
-.L2306:
+.L2318:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2307
-	ldr	r10, .L2311+48
+	bhi	.L2319
+	ldr	r10, .L2323+48
 	movs	r7, #0
 	mov	r8, #36
 	movs	r2, #1
 	mov	r1, r4
 	ldr	r0, [r6]
 	bl	FlashReadPages
-.L2308:
+.L2320:
 	uxth	r3, r7
 	cmp	r4, r3
-	bhi	.L2309
+	bhi	.L2321
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
-	b	.L2302
-.L2305:
+	b	.L2314
+.L2317:
 	ldrh	r3, [r7, #2]!
 	cmp	r3, r10
-	beq	.L2304
+	beq	.L2316
 	mla	r1, fp, r4, r0
 	ldr	r5, [sp, #32]
 	lsls	r3, r3, #10
@@ -16490,10 +16531,10 @@ FtlScanAllBlock:
 	bic	r3, r3, #3
 	add	r3, r3, r5
 	str	r3, [r1, #12]
-.L2304:
+.L2316:
 	adds	r2, r2, #1
-	b	.L2303
-.L2307:
+	b	.L2315
+.L2319:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16517,8 +16558,8 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2306
-.L2309:
+	b	.L2318
+.L2321:
 	mul	r2, r8, r7
 	ldr	r0, [r6]
 	ldrh	r1, [sp, #40]
@@ -16542,23 +16583,23 @@ FtlScanAllBlock:
 	mov	r0, r10
 	ldr	r3, [lr, #4]
 	bl	printf
-	b	.L2308
-.L2312:
+	b	.L2320
+.L2324:
 	.align	2
-.L2311:
+.L2323:
 	.word	.LANCHOR180
 	.word	.LANCHOR225
-	.word	.LC46
+	.word	.LC45
 	.word	.LANCHOR41
 	.word	.LANCHOR84
-	.word	.LC50
+	.word	.LC49
 	.word	.LANCHOR38
 	.word	.LANCHOR105
 	.word	.LANCHOR58
 	.word	.LANCHOR106
 	.word	.LANCHOR59
+	.word	.LC50
 	.word	.LC51
-	.word	.LC52
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -16584,16 +16625,16 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	ldr	r10, [r0, #12]
 	mov	r0, r8
-	ldr	r5, .L2338
+	ldr	r5, .L2352
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L2338+4
+	ldr	r3, .L2352+4
 	str	r6, [r4, #32]
 	str	r6, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	str	r2, [r5, #8]
-	ldr	r2, .L2338+8
+	ldr	r2, .L2352+8
 	ldr	r7, [r2]
 	movw	r2, #65535
 	str	r7, [r5, #12]
@@ -16601,16 +16642,16 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L2314:
+.L2326:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L2332
+	bge	.L2343
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L2315
+	bne	.L2327
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
@@ -16626,22 +16667,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L2338
-.L2316:
+	ldr	r3, .L2352
+.L2328:
 	sxth	r2, r6
 	cmp	r2, r10
-	ble	.L2319
-.L2332:
+	ble	.L2330
+.L2343:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2338+12
+	ldr	r3, .L2352+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2321
+	bne	.L2332
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2321:
+.L2332:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -16650,9 +16691,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2319:
+.L2330:
 	ldrh	r1, [r5]
-	ldr	r0, .L2338
+	ldr	r0, .L2352
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r3, #4]
@@ -16662,32 +16703,28 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L2317
+	beq	.L2329
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L2318
-	ldrh	r0, [r7]
+	bls	.L2329
 	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
 	cmp	r0, r1
-	bne	.L2318
-	ldr	r1, [r3, #4]
-	str	r1, [r8, r2, lsl #2]
-.L2318:
+	itt	eq
+	ldreq	r1, [r3, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L2329:
 	adds	r6, r6, #1
-	b	.L2316
-.L2317:
-	ldrh	r2, [r5]
-	strh	r2, [r4, #40]	@ movhi
-	b	.L2318
-.L2315:
+	b	.L2328
+.L2327:
 	ldr	r1, [sp, #8]
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	ldr	r0, .L2338
+	ldr	r0, .L2352
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L2338+12
+	ldr	r3, .L2352+12
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -16698,27 +16735,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L2334
+	beq	.L2345
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L2334
+	bne	.L2345
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L2323
-.L2334:
+	beq	.L2334
+.L2345:
 	movs	r3, #0
-.L2324:
-	ldr	r1, .L2338+12
+.L2335:
+	ldr	r1, .L2352+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L2330
+	bge	.L2341
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #16]
-	ldr	r0, .L2338
+	ldr	r0, .L2352
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
@@ -16728,33 +16765,33 @@ FtlMapTblRecovery:
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L2328
+	beq	.L2339
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L2328
+	bls	.L2339
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L2328:
+.L2339:
 	adds	r3, r3, #1
-	b	.L2324
-.L2323:
+	b	.L2335
+.L2334:
 	ldrh	r2, [r3]
 	movs	r1, #0
 	ldr	r3, [sp, #8]
 	subs	r2, r2, #1
 	ldr	ip, [r3]
-.L2325:
+.L2336:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L2327
-.L2330:
+	blt	.L2338
+.L2341:
 	adds	r6, r6, #1
-	b	.L2314
-.L2327:
+	b	.L2326
+.L2338:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
@@ -16765,10 +16802,10 @@ FtlMapTblRecovery:
 	movhi	r3, lr
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L2325
-.L2339:
+	b	.L2336
+.L2353:
 	.align	2
-.L2338:
+.L2352:
 	.word	.LANCHOR202
 	.word	.LANCHOR183
 	.word	.LANCHOR188
@@ -16786,38 +16823,36 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2341
-	ldr	r0, .L2341+4
+	ldr	r3, .L2355
+	ldr	r0, .L2355+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2341+8
+	ldr	r3, .L2355+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2341+12
+	ldr	r3, .L2355+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2341+16
+	ldr	r3, .L2355+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2341+20
+	ldr	r3, .L2355+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2341+24
+	ldr	r3, .L2355+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2341+28
+	ldr	r3, .L2355+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
-	movw	r3, #65535
-	strh	r3, [r0, #40]	@ movhi
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2342:
+.L2356:
 	.align	2
-.L2341:
+.L2355:
 	.word	.LANCHOR62
 	.word	.LANCHOR215
 	.word	.LANCHOR71
@@ -16840,13 +16875,13 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L2344
+	ldr	r0, .L2358
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L2345:
+.L2359:
 	.align	2
-.L2344:
+.L2358:
 	.word	.LANCHOR127
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
@@ -16860,7 +16895,7 @@ FtlLoadMapInfo:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2373
+	ldr	r3, .L2387
 	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
@@ -16868,71 +16903,71 @@ FtlGcScanTempBlk:
 	ldrh	r4, [r3]
 	str	r3, [sp, #16]
 	cmp	r4, r2
-	beq	.L2364
-	cbnz	r4, .L2347
-.L2348:
+	beq	.L2378
+	cbnz	r4, .L2361
+.L2362:
 	bl	FtlGcPageVarInit
-	b	.L2349
-.L2364:
+	b	.L2363
+.L2378:
 	movs	r4, #0
-.L2347:
-	ldr	r3, .L2373+4
+.L2361:
+	ldr	r3, .L2387+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2348
-.L2349:
-	ldr	fp, .L2373+44
+	beq	.L2362
+.L2363:
+	ldr	fp, .L2387+44
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2361:
+.L2375:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	movs	r0, #0
 	strb	r0, [r5, #8]
 	cmp	r2, r3
-	beq	.L2350
-.L2363:
-	ldr	r3, .L2373+8
+	beq	.L2364
+.L2377:
+	ldr	r3, .L2387+8
 	movw	ip, #65535
 	ldr	r0, [fp]
 	mov	lr, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2373+12
+	ldr	r3, .L2387+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2373+16
+	ldr	r3, .L2387+16
 	ldrh	r10, [r3]
 	add	r3, r5, #16
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-.L2351:
+.L2365:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2353
+	bhi	.L2367
 	movs	r7, #0
 	mov	r10, #36
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
-.L2354:
+.L2368:
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2362
-	ldr	r3, .L2373+4
+	bhi	.L2376
+	ldr	r3, .L2387+4
 	adds	r4, r4, #1
 	uxth	r4, r4
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bhi	.L2363
+	bhi	.L2377
 	movs	r0, #0
-	b	.L2350
-.L2353:
+	b	.L2364
+.L2367:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
 	cmp	r2, ip
 	str	r1, [sp, #4]
-	beq	.L2352
+	beq	.L2366
 	mla	r1, lr, r6, r0
 	orr	r2, r4, r2, lsl #10
 	str	r2, [r1, #4]
@@ -16946,10 +16981,10 @@ FtlGcScanTempBlk:
 	ldr	r2, [sp, #12]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2352:
+.L2366:
 	adds	r3, r3, #1
-	b	.L2351
-.L2362:
+	b	.L2365
+.L2376:
 	mul	r8, r10, r7
 	ldr	r2, [fp]
 	str	r2, [sp, #20]
@@ -16962,18 +16997,18 @@ FtlGcScanTempBlk:
 	ldr	r2, [sp, #20]
 	ldr	r1, [sp, #4]
 	ldr	r2, [r2, r8]
-	cbnz	r2, .L2355
+	cbnz	r2, .L2369
 	ldr	r3, [sp, #12]
 	movw	ip, #65535
 	adds	r7, r7, #1
 	ldr	r3, [r3, #12]
 	ldrh	r2, [r3]
 	cmp	r2, ip
-	bne	.L2356
-	ldr	r3, .L2373+20
+	bne	.L2370
+	ldr	r3, .L2387+20
 	movs	r2, #1
 	str	r2, [r3]
-.L2350:
+.L2364:
 	ldr	r2, [sp, #16]
 	movw	r3, #65535
 	strb	r0, [r5, #6]
@@ -16987,41 +17022,41 @@ FtlGcScanTempBlk:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2356:
+.L2370:
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2354
-.L2355:
+	b	.L2368
+.L2369:
 	mov	r2, r1
-	ldr	r0, .L2373+24
+	ldr	r0, .L2387+24
 	ldrh	r1, [r5]
 	bl	printf
-	ldr	r3, .L2373+28
+	ldr	r3, .L2387+28
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
-	cbnz	r3, .L2357
-	ldr	r3, .L2373+32
+	cbnz	r3, .L2371
+	ldr	r3, .L2387+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2358
-.L2357:
-	ldr	r3, .L2373+36
+	cbz	r3, .L2372
+.L2371:
+	ldr	r3, .L2387+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #159
-	bls	.L2359
-.L2358:
+	bls	.L2373
+.L2372:
 	ldr	r3, [fp]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2360
-.L2359:
+	bne	.L2374
+.L2373:
 	ldr	r3, [fp]
 	add	r3, r3, r8
 	ldr	r3, [r3, #4]
 	str	r3, [sp, #8]
-.L2360:
-	ldr	r3, .L2373+40
+.L2374:
+	ldr	r3, .L2387+40
 	movs	r4, #0
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -17030,17 +17065,17 @@ FtlGcScanTempBlk:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L2361
-.L2374:
+	b	.L2375
+.L2388:
 	.align	2
-.L2373:
+.L2387:
 	.word	.LANCHOR226
 	.word	.LANCHOR53
 	.word	.LANCHOR38
 	.word	.LANCHOR106
 	.word	.LANCHOR59
 	.word	.LANCHOR135
-	.word	.LC53
+	.word	.LC52
 	.word	.LANCHOR28
 	.word	.LANCHOR8
 	.word	.LANCHOR79
@@ -17060,18 +17095,18 @@ FlashReadFacBbtData:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	fp, r2
-	ldr	r2, .L2388
+	ldr	r2, .L2402
 	sub	sp, sp, #48
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2388+4
+	ldr	r7, .L2402+4
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
 	ldr	r2, [r7]
 	uxth	r3, r3
 	str	r2, [sp, #20]
-	ldr	r2, .L2388+8
+	ldr	r2, .L2402+8
 	subs	r5, r3, #1
 	mul	r10, r6, r3
 	uxth	r5, r5
@@ -17079,12 +17114,12 @@ FlashReadFacBbtData:
 	ldr	r1, [r2]
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2376:
+.L2390:
 	cmp	r3, r5
-	ble	.L2383
+	ble	.L2397
 	mov	r0, #-1
-	b	.L2375
-.L2383:
+	b	.L2389
+.L2397:
 	add	r2, r5, r10
 	add	r0, sp, #12
 	lsls	r2, r2, #10
@@ -17096,60 +17131,60 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2377
+	beq	.L2391
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2377
-	cbz	r4, .L2384
-	cbz	r6, .L2379
-.L2382:
+	bne	.L2391
+	cbz	r4, .L2398
+	cbz	r6, .L2393
+.L2396:
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
 	movs	r3, #4
-	ldr	r0, .L2388+12
+	ldr	r0, .L2402+12
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
 	movs	r0, #0
-.L2375:
+.L2389:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2379:
+.L2393:
 	ldr	r1, [r7]
 	mov	ip, #1
-	ldr	r5, .L2388+16
-.L2380:
+	ldr	r5, .L2402+16
+.L2394:
 	ldr	r0, [r5]
 	uxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bcs	.L2382
+	bcs	.L2396
 	lsrs	r0, r3, #5
 	and	r3, r3, #31
 	lsl	r3, ip, r3
 	ldr	r2, [r1, r0, lsl #2]
 	orrs	r3, r3, r2
 	str	r3, [r1, r0, lsl #2]
-	b	.L2380
-.L2377:
+	b	.L2394
+.L2391:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2376
-.L2384:
+	b	.L2390
+.L2398:
 	mov	r0, r4
-	b	.L2375
-.L2389:
+	b	.L2389
+.L2403:
 	.align	2
-.L2388:
+.L2402:
 	.word	.LANCHOR15
 	.word	.LANCHOR147
 	.word	.LANCHOR197
-	.word	.LC54
+	.word	.LC53
 	.word	.LANCHOR149
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -17165,8 +17200,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2400
-	ldr	r6, .L2400+4
+	ldr	r3, .L2414
+	ldr	r6, .L2414+4
 	ldr	r3, [r3]
 	ldr	r0, [r6]
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
@@ -17177,25 +17212,25 @@ FlashGetBadBlockList:
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	bne	.L2391
-.L2395:
+	bne	.L2405
+.L2409:
 	movs	r3, #0
-.L2392:
+.L2406:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2391:
+.L2405:
 	ldr	r7, [r6]
 	movs	r2, #0
 	lsr	ip, r4, #4
 	mov	r3, r2
 	subs	r4, r4, #1
 	mov	lr, #1
-.L2393:
+.L2407:
 	uxth	r1, r2
 	cmp	r1, r4
-	bge	.L2392
+	bge	.L2406
 	lsrs	r6, r1, #5
 	and	r0, r1, #31
 	lsl	r0, lr, r0
@@ -17207,11 +17242,11 @@ FlashGetBadBlockList:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
 	cmp	r3, ip
-	bcc	.L2393
-	b	.L2395
-.L2401:
+	bcc	.L2407
+	b	.L2409
+.L2415:
 	.align	2
-.L2400:
+.L2414:
 	.word	.LANCHOR18
 	.word	.LANCHOR153
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17226,66 +17261,66 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2422
+	ldr	r3, .L2436
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2403
-	ldr	r8, .L2422+40
-	ldr	r4, .L2422+4
+	bne	.L2417
+	ldr	r8, .L2436+40
+	ldr	r4, .L2436+4
 	bl	FtlBbtMemInit
 	sub	r10, r8, #18
 	bl	FtlLoadFactoryBbt
-.L2404:
-	ldr	r3, .L2422+8
+.L2418:
+	ldr	r3, .L2436+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2410
-	ldr	r5, .L2422+12
+	bcc	.L2424
+	ldr	r5, .L2436+12
 	movs	r4, #0
-.L2411:
+.L2425:
 	ldrh	r3, [r5]
 	uxth	r0, r4
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2412
-	ldr	r4, .L2422+16
+	bhi	.L2426
+	ldr	r4, .L2436+16
 	movw	r6, #65535
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2413:
+.L2427:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2417
+	bgt	.L2431
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2414
+	beq	.L2428
 	mov	r0, r5
 	bl	FlashTestBlk
 	cmp	r0, #0
-	beq	.L2415
+	beq	.L2429
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2414:
+.L2428:
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L2413
-.L2410:
-	ldr	r3, .L2422+20
+	b	.L2427
+.L2424:
+	ldr	r3, .L2436+20
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
 	ldr	r0, [r3]
-	ldr	r3, .L2422+24
+	ldr	r3, .L2436+24
 	cmp	r2, r1
 	str	r0, [r4, #8]
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2422+28
+	ldr	r3, .L2436+28
 	str	fp, [r4, #12]
-	beq	.L2405
+	beq	.L2419
 	ldrh	r6, [r3]
 	mov	r0, r4
 	str	r3, [sp]
@@ -17302,13 +17337,13 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2406:
+.L2420:
 	uxth	r0, r6
 	adds	r7, r7, #1
 	add	r8, r8, #4
 	bl	FtlBbmMapBadBlock
-	b	.L2404
-.L2405:
+	b	.L2418
+.L2419:
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
@@ -17317,17 +17352,17 @@ FtlMakeBbt:
 	bl	FtlBbt2Bitmap
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2408:
+.L2422:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2407:
+.L2421:
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2408
+	beq	.L2422
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
@@ -17347,7 +17382,7 @@ FtlMakeBbt:
 	mla	r6, r7, r6, r3
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2422+32
+	ldr	r3, .L2436+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
@@ -17362,23 +17397,23 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2406
+	bne	.L2420
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2407
-.L2412:
+	b	.L2421
+.L2426:
 	bl	FtlBbmMapBadBlock
-	b	.L2411
-.L2415:
+	b	.L2425
+.L2429:
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2416
+	bne	.L2430
 	strh	r5, [r4]	@ movhi
-	b	.L2414
-.L2416:
+	b	.L2428
+.L2430:
 	strh	r5, [r4, #4]	@ movhi
-.L2417:
-	ldr	r3, .L2422+36
+.L2431:
+	ldr	r3, .L2436+36
 	movs	r5, #0
 	str	r5, [r4, #8]
 	movs	r2, #2
@@ -17406,14 +17441,14 @@ FtlMakeBbt:
 	strh	r2, [r4]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2403:
+.L2417:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2423:
+.L2437:
 	.align	2
-.L2422:
+.L2436:
 	.word	.LANCHOR77
 	.word	.LANCHOR202
 	.word	.LANCHOR45
@@ -17438,210 +17473,208 @@ log2phys:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2443
-	str	r1, [sp, #4]
-	ldrh	r5, [r3]
+	ldr	r3, .L2457
 	str	r2, [sp, #8]
-	adds	r3, r5, #7
-	movs	r5, #1
-	lsr	r8, r0, r3
-	lsls	r5, r5, r3
-	ldr	r3, .L2443+4
-	subs	r5, r5, #1
-	uxth	r7, r8
-	ands	r5, r5, r0
+	ldrh	r3, [r3]
+	str	r1, [sp, #4]
+	adds	r2, r3, #7
+	movs	r3, #1
+	lsls	r3, r3, r2
+	lsr	r7, r0, r2
+	subs	r3, r3, #1
+	uxth	r6, r7
+	ands	r3, r3, r0
+	uxth	fp, r3
+	ldr	r3, .L2457+4
 	ldr	r3, [r3]
-	uxth	r5, r5
 	cmp	r0, r3
-	bcc	.L2425
-	ldr	r1, .L2443+8
-	mov	r2, #888
-	ldr	r0, .L2443+12
+	bcc	.L2439
+	ldr	r1, .L2457+8
+	mov	r2, #880
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2443+16
-	ldr	r0, .L2443+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2425:
-	ldr	r6, .L2443+24
+.L2439:
+	ldr	r5, .L2457+24
 	movs	r4, #12
-	ldr	r3, .L2443+28
-	ldr	r1, [r6]
+	ldr	r3, .L2457+28
+	ldr	r1, [r5]
 	ldrh	r2, [r3]
 	movs	r3, #0
-.L2426:
+.L2440:
 	uxth	r10, r3
 	cmp	r10, r2
-	bcc	.L2431
+	bcc	.L2445
 	bl	select_l2p_ram_region
 	muls	r4, r0, r4
-	ldr	r3, [r6]
+	ldr	r3, [r5]
 	mov	r10, r0
 	ldrh	r1, [r3, r4]
 	adds	r2, r3, r4
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L2432
+	beq	.L2446
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L2432
+	bge	.L2446
 	bl	flush_l2p_region
-.L2432:
-	ldr	r3, .L2443+32
-	ldrh	r2, [r3]
-	str	r3, [sp, #12]
-	cmp	r2, r7
-	bcs	.L2433
-	ldr	r1, .L2443+36
+.L2446:
+	ldr	r3, .L2457+32
+	ldrh	r3, [r3]
+	cmp	r3, r6
+	bcs	.L2447
+	ldr	r1, .L2457+36
 	movw	r2, #526
-	ldr	r0, .L2443+12
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2443+16
-	ldr	r0, .L2443+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2433:
-	ldr	r3, .L2443+40
-	uxth	r8, r8
+.L2447:
+	ldr	r3, .L2457+40
+	uxth	r7, r7
 	ldr	r3, [r3]
-	ldr	fp, [r3, r8, lsl #2]
-	cmp	fp, #0
-	bne	.L2434
-	ldr	r3, [r6]
+	ldr	r3, [r3, r7, lsl #2]
+	cmp	r3, #0
+	bne	.L2448
+	ldr	r2, [r5]
 	movs	r1, #255
-	ldr	r2, .L2443+44
-	add	r3, r3, r4
+	str	r3, [sp]
+	adds	r0, r2, r4
+	ldr	r2, .L2457+44
+	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
-	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	ldr	r3, [r6]
-	adds	r2, r3, r4
-	strh	r7, [r3, r4]	@ movhi
-	str	fp, [r2, #4]
-	b	.L2427
-.L2431:
+	ldr	r2, [r5]
+	ldr	r3, [sp]
+	adds	r1, r2, r4
+	strh	r6, [r2, r4]	@ movhi
+	str	r3, [r1, #4]
+	b	.L2441
+.L2445:
 	adds	r3, r3, #1
 	mla	r0, r4, r3, r1
 	ldrh	r0, [r0, #-12]
-	cmp	r0, r7
-	bne	.L2426
-.L2427:
+	cmp	r0, r6
+	bne	.L2440
+.L2441:
 	ldr	r2, [sp, #8]
 	movs	r3, #12
-	ldr	r1, .L2443+24
-	cbnz	r2, .L2428
+	ldr	r1, .L2457+24
+	cbnz	r2, .L2442
 	ldr	r2, [r1]
 	mla	r3, r3, r10, r2
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r5, lsl #2]
+	ldr	r3, [r3, fp, lsl #2]
 	str	r3, [r2]
-.L2429:
+.L2443:
 	ldr	r2, [r1]
 	movs	r3, #12
 	mla	r10, r3, r10, r2
 	ldr	r3, [r10, #4]
 	adds	r2, r3, #1
-	beq	.L2440
+	beq	.L2454
 	adds	r3, r3, #1
 	str	r3, [r10, #4]
-.L2440:
+.L2454:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2428:
-	ldr	r2, [r6]
+.L2442:
+	ldr	r2, [r5]
 	mla	r3, r3, r10, r2
 	ldr	r2, [sp, #4]
 	ldr	r0, [r2]
 	ldr	r2, [r3, #8]
-	str	r0, [r2, r5, lsl #2]
+	str	r0, [r2, fp, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L2443+48
-	strh	r7, [r3]	@ movhi
-	b	.L2429
-.L2434:
-	ldr	r2, [r6]
-	ldr	r3, .L2443+52
+	ldr	r3, .L2457+48
+	strh	r6, [r3]	@ movhi
+	b	.L2443
+.L2448:
+	ldr	r2, [r5]
+	ldr	r8, .L2457+80
+	str	r3, [sp, #12]
 	add	r2, r2, r4
 	ldr	r2, [r2, #8]
-	mov	r0, r3
-	str	fp, [r3, #4]
-	str	r3, [sp]
-	str	r2, [r3, #8]
-	ldr	r2, .L2443+56
+	mov	r0, r8
+	str	r3, [r8, #4]
+	str	r2, [r8, #8]
+	ldr	r2, .L2457+52
 	ldr	r2, [r2]
-	str	r2, [r3, #12]
+	str	r2, [r8, #12]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r2, [r3, #12]
-	ldr	r3, [r3]
-	str	r2, [sp]
-	cmp	r3, #256
-	bne	.L2435
-	mov	r2, fp
-	mov	r1, r8
-	ldr	r0, .L2443+60
-	bl	printf
-	ldr	r0, .L2443+64
-	lsr	r3, fp, #10
-	mov	r1, r8
-	strh	r3, [r0, #40]	@ movhi
-	ldr	r3, [r6]
-	add	r3, r3, r4
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-.L2435:
-	ldr	r3, [sp]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r7
-	beq	.L2436
-	mov	r2, fp
-	mov	r1, r8
-	ldr	r0, .L2443+68
+	ldr	r3, [r8, #12]
+	ldrh	r2, [r3, #8]
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	cmp	r2, r6
+	beq	.L2449
+	mov	r2, r3
+	mov	r1, r7
+	ldr	r0, .L2457+56
 	bl	printf
-	ldr	r1, .L2443+52
 	movs	r3, #4
+	ldr	r1, [r8, #12]
 	mov	r2, r3
-	ldr	r0, .L2443+72
-	ldr	r1, [r1, #12]
+	ldr	r0, .L2457+60
 	bl	rknand_print_hex
-	ldr	r3, [sp, #12]
+	ldr	r3, .L2457+32
 	movs	r2, #4
-	ldr	r1, .L2443+40
-	ldr	r0, .L2443+76
+	ldr	r1, .L2457+40
+	ldr	r0, .L2457+64
 	ldrh	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r3, .L2443+80
+	ldr	r3, .L2457+68
 	movs	r2, #1
 	str	r2, [r3]
-.L2436:
+.L2450:
 	ldr	r3, [sp]
 	ldrh	r3, [r3, #8]
-	cmp	r3, r7
-	beq	.L2437
-	ldr	r1, .L2443+36
-	movw	r2, #553
-	ldr	r0, .L2443+12
+	cmp	r3, r6
+	beq	.L2451
+	ldr	r1, .L2457+36
+	mov	r2, #552
+	ldr	r0, .L2457+12
 	bl	printf
-	ldr	r1, .L2443+16
-	ldr	r0, .L2443+20
+	ldr	r1, .L2457+16
+	ldr	r0, .L2457+20
 	bl	printf
-.L2437:
-	ldr	r3, .L2443+24
+.L2451:
+	ldr	r3, .L2457+24
 	movs	r1, #0
 	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	strh	r7, [r3, r4]	@ movhi
-	b	.L2427
-.L2444:
+	strh	r6, [r3, r4]	@ movhi
+	b	.L2441
+.L2449:
+	ldr	r2, [r8]
+	cmp	r2, #256
+	bne	.L2450
+	mov	r2, r3
+	mov	r1, r7
+	ldr	r0, .L2457+72
+	bl	printf
+	ldr	r3, [r5]
+	mov	r1, r7
+	ldr	r0, .L2457+76
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	b	.L2450
+.L2458:
 	.align	2
-.L2443:
+.L2457:
 	.word	.LANCHOR57
 	.word	.LANCHOR73
 	.word	.LANCHOR227
@@ -17655,14 +17688,14 @@ log2phys:
 	.word	.LANCHOR131
 	.word	.LANCHOR58
 	.word	.LANCHOR98
-	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LC55
-	.word	.LANCHOR127
-	.word	.LC56
+	.word	.LC54
 	.word	.LC27
-	.word	.LC57
+	.word	.LC55
 	.word	.LANCHOR77
+	.word	.LC56
+	.word	.LANCHOR127
+	.word	.LANCHOR202
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -17677,73 +17710,73 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L2465
+	ldr	r3, .L2479
 	mov	r5, r0
 	mov	r10, r1
 	ldr	r7, [r3]
 	mov	r8, r3
-	cbnz	r7, .L2445
-	ldr	r3, .L2465+4
+	cbnz	r7, .L2459
+	ldr	r3, .L2479+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2460
+	cbz	r3, .L2474
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2447:
-	ldr	fp, .L2465+40
+.L2461:
+	ldr	fp, .L2479+40
 	mov	r2, r6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r1, r10
 	mov	r0, r5
 	bl	FlashProgPages
-.L2448:
+.L2462:
 	cmp	r7, r10
-	bne	.L2458
-	ldr	r3, .L2465+8
+	bne	.L2472
+	ldr	r3, .L2479+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2445
-	ldr	r1, .L2465+12
+	bcc	.L2459
+	ldr	r1, .L2479+12
 	mov	r2, #1600
-	ldr	r0, .L2465+16
+	ldr	r0, .L2479+16
 	bl	printf
-	ldr	r1, .L2465+20
-	ldr	r0, .L2465+24
+	ldr	r1, .L2479+20
+	ldr	r0, .L2479+24
 	bl	printf
-.L2445:
+.L2459:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2460:
+.L2474:
 	mov	r6, r7
-	b	.L2447
-.L2451:
+	b	.L2461
+.L2465:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2449
+	bne	.L2463
 	ldr	r1, [fp]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L2465+28
+	ldr	r3, .L2479+28
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L2449:
+.L2463:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2450
+	cbnz	r3, .L2464
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2450:
-	ldr	r2, .L2465+32
+.L2464:
+	ldr	r2, .L2479+32
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17761,27 +17794,27 @@ FtlProgPages:
 	bl	FlashProgPages
 	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2445
-.L2458:
+	bne	.L2459
+.L2472:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2451
-	ldr	r3, .L2465+8
+	beq	.L2465
+	ldr	r3, .L2479+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2452
-	ldr	r1, .L2465+12
+	bcc	.L2466
+	ldr	r1, .L2479+12
 	movw	r2, #1583
-	ldr	r0, .L2465+16
+	ldr	r0, .L2479+16
 	bl	printf
-	ldr	r1, .L2465+20
-	ldr	r0, .L2465+24
+	ldr	r1, .L2479+20
+	ldr	r0, .L2479+24
 	bl	printf
-.L2452:
+.L2466:
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2453
-.L2464:
+	cbnz	r6, .L2467
+.L2478:
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
@@ -17795,28 +17828,28 @@ FtlProgPages:
 	ldr	r2, [sp, #4]
 	mov	r3, r0
 	adds	r2, r2, #1
-	beq	.L2455
+	beq	.L2469
 	ldr	r2, [fp]
 	ldrh	r2, [r2, r0, lsl #1]
-	cbnz	r2, .L2456
+	cbnz	r2, .L2470
 	mov	r1, r0
 	str	r0, [sp, #4]
-	ldr	r0, .L2465+36
+	ldr	r0, .L2479+36
 	bl	printf
 	ldr	r3, [sp, #4]
-.L2456:
+.L2470:
 	mov	r0, r3
 	bl	decrement_vpc_count
-.L2455:
+.L2469:
 	adds	r7, r7, #1
 	adds	r5, r5, #36
-	b	.L2448
-.L2453:
+	b	.L2462
+.L2467:
 	orr	r3, r3, #-2147483648
-	b	.L2464
-.L2466:
+	b	.L2478
+.L2480:
 	.align	2
-.L2465:
+.L2479:
 	.word	.LANCHOR77
 	.word	.LANCHOR8
 	.word	.LANCHOR38
@@ -17826,7 +17859,7 @@ FtlProgPages:
 	.word	.LC7
 	.word	.LANCHOR53
 	.word	.LANCHOR138
-	.word	.LC58
+	.word	.LC57
 	.word	.LANCHOR84
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
@@ -17841,24 +17874,24 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r3, .L2472
+	ldr	r3, .L2486
 	ldr	r4, [r3]
-	cbnz	r4, .L2468
-	ldr	r5, .L2472+4
+	cbnz	r4, .L2482
+	ldr	r5, .L2486+4
 	ldr	r0, [r5]
-	cbz	r0, .L2468
-	ldr	r3, .L2472+8
+	cbz	r0, .L2482
+	ldr	r3, .L2486+8
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
 	str	r4, [r5]
-.L2468:
+.L2482:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2473:
+.L2487:
 	.align	2
-.L2472:
+.L2486:
 	.word	.LANCHOR77
 	.word	.LANCHOR132
 	.word	.LANCHOR230
@@ -17875,20 +17908,20 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2476
+	ldr	r3, .L2490
 	ldr	r3, [r3]
-	cbnz	r3, .L2475
+	cbnz	r3, .L2489
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2475:
+.L2489:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2477:
+.L2491:
 	.align	2
-.L2476:
+.L2490:
 	.word	.LANCHOR77
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
@@ -17903,17 +17936,17 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2480
+	ldr	r3, .L2494
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2479
+	bne	.L2493
 	bl	FtlSysFlush
-.L2479:
+.L2493:
 	movs	r0, #0
 	pop	{r3, pc}
-.L2481:
+.L2495:
 	.align	2
-.L2480:
+.L2494:
 	.word	.LANCHOR231
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
@@ -17944,28 +17977,28 @@ rk_ftl_de_init:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2498
+	ldr	r3, .L2512
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r5, r2
 	adds	r2, r1, r2
 	mov	r6, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2491
+	bhi	.L2505
 	cmp	r5, #31
-	bhi	.L2485
-.L2486:
+	bhi	.L2499
+.L2500:
 	movs	r0, #0
-.L2483:
+.L2497:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2485:
-	ldr	r3, .L2498+4
+.L2499:
+	ldr	r3, .L2512+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2486
-	ldr	r8, .L2498+16
+	bne	.L2500
+	ldr	r8, .L2512+16
 	bl	FtlCacheWriteBack
 	mov	r0, r6
 	ldrh	r4, [r8]
@@ -17975,7 +18008,7 @@ ftl_discard:
 	mov	r7, r0
 	subs	r6, r6, r3
 	uxth	r6, r6
-	cbz	r6, .L2487
+	cbz	r6, .L2501
 	subs	r4, r4, r6
 	adds	r7, r7, #1
 	cmp	r4, r5
@@ -17983,32 +18016,32 @@ ftl_discard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L2487:
-	ldr	r4, .L2498+8
+.L2501:
+	ldr	r4, .L2512+8
 	mov	r3, #-1
-	ldr	r6, .L2498+12
+	ldr	r6, .L2512+12
 	str	r3, [sp, #4]
-.L2488:
+.L2502:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2490
-	ldr	r3, .L2498+8
+	bcs	.L2504
+	ldr	r3, .L2512+8
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2486
+	bls	.L2500
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2486
-.L2490:
+	b	.L2500
+.L2504:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2489
+	beq	.L2503
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -18023,17 +18056,17 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2489:
+.L2503:
 	ldrh	r3, [r8]
 	adds	r7, r7, #1
 	subs	r5, r5, r3
-	b	.L2488
-.L2491:
+	b	.L2502
+.L2505:
 	mov	r0, #-1
-	b	.L2483
-.L2499:
+	b	.L2497
+.L2513:
 	.align	2
-.L2498:
+.L2512:
 	.word	.LANCHOR69
 	.word	.LANCHOR77
 	.word	.LANCHOR232
@@ -18053,60 +18086,60 @@ Ftlscanalldata:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-	ldr	r7, .L2514
+	ldr	r7, .L2528
 	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r8, .L2514+24
-	ldr	r0, .L2514+4
+	ldr	r8, .L2528+24
+	ldr	r0, .L2528+4
 	bl	printf
-.L2501:
+.L2515:
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L2507
+	bcc	.L2521
 	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2507:
+.L2521:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L2502
+	cbnz	r3, .L2516
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.L2502:
+.L2516:
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L2504
-	ldr	r4, .L2514+8
+	beq	.L2518
+	ldr	r4, .L2528+8
 	movs	r2, #0
 	movs	r1, #1
 	str	r3, [r4, #4]
 	mov	r0, r4
-	ldr	r3, .L2514+12
+	ldr	r3, .L2528+12
 	str	r5, [r4, #16]
 	str	r2, [r4]
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	ldr	r3, .L2514+16
+	ldr	r3, .L2528+16
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
 	bl	FlashReadPages
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L2505
+	beq	.L2519
 	adds	r3, r3, #1
-	beq	.L2505
+	beq	.L2519
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L2504
-.L2505:
+	beq	.L2518
+.L2519:
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L2514+20
+	ldr	r0, .L2528+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -18121,19 +18154,19 @@ Ftlscanalldata:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.L2504:
+.L2518:
 	adds	r5, r5, #1
-	b	.L2501
-.L2515:
+	b	.L2515
+.L2529:
 	.align	2
-.L2514:
+.L2528:
 	.word	.LANCHOR73
-	.word	.LC59
+	.word	.LC58
 	.word	.LANCHOR202
 	.word	.LANCHOR183
 	.word	.LANCHOR188
-	.word	.LC61
 	.word	.LC60
+	.word	.LC59
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -18148,7 +18181,7 @@ FtlReUsePrevPpa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L2526
+	ldr	r5, .L2540
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
@@ -18156,15 +18189,15 @@ FtlReUsePrevPpa:
 	mov	r7, r0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2517
-	ldr	r2, .L2526+4
+	bne	.L2531
+	ldr	r2, .L2540+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2518
-	ldr	r2, .L2526+8
+	beq	.L2532
+	ldr	r2, .L2540+8
 	movw	lr, #65535
-	ldr	ip, .L2526+32
-	ldr	r0, .L2526+12
+	ldr	ip, .L2540+32
+	ldr	r0, .L2540+12
 	ldr	r2, [r2]
 	ldrh	r1, [r0]
 	mov	r8, r0
@@ -18173,25 +18206,25 @@ FtlReUsePrevPpa:
 	mul	r4, ip, r4
 	mov	ip, #6
 	uxth	r4, r4
-.L2519:
+.L2533:
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2518
+	bls	.L2532
 	cmp	r4, r7
-	bne	.L2520
+	bne	.L2534
 	mov	r1, r4
-	ldr	r0, .L2526+4
+	ldr	r0, .L2540+4
 	bl	List_remove_node
 	ldrh	r3, [r8]
-	cbnz	r3, .L2521
-	ldr	r1, .L2526+16
-	movw	r2, #2140
-	ldr	r0, .L2526+20
+	cbnz	r3, .L2535
+	ldr	r1, .L2540+16
+	movw	r2, #2070
+	ldr	r0, .L2540+20
 	bl	printf
-	ldr	r1, .L2526+24
-	ldr	r0, .L2526+28
+	ldr	r1, .L2540+24
+	ldr	r0, .L2540+28
 	bl	printf
-.L2521:
+.L2535:
 	ldrh	r3, [r8]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -18199,17 +18232,17 @@ FtlReUsePrevPpa:
 	bl	INSERT_DATA_LIST
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2517:
+.L2531:
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2518
-.L2520:
+	b	.L2532
+.L2534:
 	mul	r4, ip, r4
 	adds	r3, r3, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2519
-.L2518:
+	bne	.L2533
+.L2532:
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
@@ -18217,9 +18250,9 @@ FtlReUsePrevPpa:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2527:
+.L2541:
 	.align	2
-.L2526:
+.L2540:
 	.word	.LANCHOR84
 	.word	.LANCHOR88
 	.word	.LANCHOR82
@@ -18247,254 +18280,255 @@ FtlRecoverySuperblock:
 	mov	r10, r0
 	sub	sp, sp, #56
 	cmp	r3, r2
-	beq	.L2689
+	beq	.L2702
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #12]
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	str	r3, [sp, #28]
-	ldr	r3, .L2698
+	ldr	r3, .L2711
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2531
+	bne	.L2545
 	strh	r3, [r0, #4]	@ movhi
-.L2696:
+.L2709:
 	strb	r3, [r10, #6]
-.L2689:
+.L2702:
 	movs	r0, #0
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2531:
+.L2545:
 	ldrh	r0, [r0, #16]
-.L2532:
+.L2546:
 	cmp	r0, r2
 	uxth	r5, r3
 	add	r3, r3, #1
-	beq	.L2533
+	beq	.L2547
 	ldrb	r1, [r10, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2534
+	bne	.L2548
 	bl	FtlGetLastWrittenPage
 	adds	r6, r0, #1
 	mov	r4, r0
-	beq	.L2535
-	ldr	r3, .L2698+4
+	beq	.L2549
+	ldr	r3, .L2711+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2613
-	ldr	r3, .L2698+8
-	ldrh	r6, [r3, r0, lsl #1]
-.L2536:
-	ldr	r3, .L2698+12
-	movw	lr, #65535
-	mov	r8, #36
-	ldrh	fp, [r3]
-	ldr	r3, .L2698+16
+	bne	.L2626
+	ldr	r3, .L2711+8
+	ldrh	r5, [r3, r0, lsl #1]
+.L2550:
+	ldr	r3, .L2711+12
+	movw	r8, #65535
+	mov	fp, #36
+	ldrh	ip, [r3]
+	ldr	r3, .L2711+16
 	ldr	r0, [r3]
-	ldr	r3, .L2698+20
+	ldr	r3, .L2711+20
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L2698+24
-	ldrh	ip, [r3]
+	ldr	r3, .L2711+24
+	ldrh	lr, [r3]
 	add	r3, r10, #16
 	str	r3, [sp, #20]
 	str	r3, [sp, #4]
 	movs	r3, #0
-	mov	r7, r3
-.L2537:
+	mov	r6, r3
+.L2551:
 	uxth	r2, r3
-	cmp	fp, r2
-	bhi	.L2541
+	cmp	ip, r2
+	bhi	.L2555
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L2614
-	ldr	r3, .L2698+4
+	bne	.L2627
+	ldr	r3, .L2711+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2690:
+.L2703:
 	str	r3, [sp, #36]
-	mov	r1, r7
+	mov	r1, r6
 	ldr	r2, [sp, #36]
-	movs	r5, #0
+	movs	r7, #0
 	bl	FlashReadPages
-	ldr	r3, .L2698+28
+	ldr	r3, .L2711+28
 	movw	fp, #65535
-	ldr	r8, .L2698+16
+	ldr	r8, .L2711+16
 	ldr	r3, [r3]
 	subs	r3, r3, #1
 	str	r3, [sp, #4]
-.L2543:
-	uxth	r3, r5
-	cmp	r7, r3
-	bhi	.L2548
-	bne	.L2546
+.L2557:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L2562
+	bne	.L2560
 	adds	r4, r4, #1
 	uxth	r3, r4
 	str	r3, [sp, #8]
 	ldr	r3, [r8]
 	ldr	r0, [r3, #4]
-.L2691:
+.L2704:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	str	r0, [sp, #16]
 	cmp	r3, #1
-	bne	.L2550
-	ldr	r2, .L2698+4
+	bne	.L2564
+	ldr	r2, .L2711+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2550
+	cbnz	r2, .L2564
 	ldr	r1, [sp, #8]
-	ldr	r2, .L2698+8
+	ldr	r2, .L2711+8
 	ldrh	r2, [r2, r1, lsl #1]
 	str	r2, [sp, #8]
-.L2550:
-	ldr	r2, .L2698
+.L2564:
+	ldr	r2, .L2711
 	ldr	r1, [sp, #8]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2551
+	bne	.L2565
 	ldrh	r2, [sp, #8]
 	strh	r2, [r10, #2]	@ movhi
 	movs	r2, #0
 	strb	r2, [r10, #6]
 	strh	r2, [r10, #4]	@ movhi
-.L2551:
+.L2565:
 	ldr	r2, [sp, #8]
 	ldr	r1, [sp, #12]
 	cmp	r2, r1
-	bne	.L2552
+	bne	.L2566
 	ldr	r2, [sp, #16]
 	ldr	r1, [sp, #28]
 	cmp	r2, r1
-	bne	.L2552
-.L2697:
+	bne	.L2566
+.L2710:
 	ldr	r1, [sp, #8]
 	mov	r0, r10
 	bl	ftl_sb_update_avl_pages
-	b	.L2689
-.L2533:
+	b	.L2702
+.L2547:
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2532
-.L2534:
+	b	.L2546
+.L2548:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L2535
-.L2613:
-	mov	r6, r4
-	b	.L2536
-.L2535:
+	beq	.L2549
+.L2626:
+	mov	r5, r4
+	b	.L2550
+.L2549:
 	ldr	r3, [sp, #12]
-	cbz	r3, .L2538
-	ldr	r1, .L2698+32
-	movw	r2, #2211
-	ldr	r0, .L2698+36
+	cbz	r3, .L2552
+	ldr	r1, .L2711+32
+	movw	r2, #2141
+	ldr	r0, .L2711+36
 	bl	printf
-	ldr	r1, .L2698+40
-	ldr	r0, .L2698+44
+	ldr	r1, .L2711+40
+	ldr	r0, .L2711+44
 	bl	printf
-.L2538:
+.L2552:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L2539
+	cbz	r3, .L2553
 	cmp	r5, r3
-	beq	.L2539
-	ldr	r1, .L2698+32
-	movw	r2, #2212
-	ldr	r0, .L2698+36
+	beq	.L2553
+	ldr	r1, .L2711+32
+	movw	r2, #2142
+	ldr	r0, .L2711+36
 	bl	printf
-	ldr	r1, .L2698+40
-	ldr	r0, .L2698+44
+	ldr	r1, .L2711+40
+	ldr	r0, .L2711+44
 	bl	printf
-.L2539:
+.L2553:
 	movs	r3, #0
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2696
-.L2541:
+	b	.L2709
+.L2555:
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
-	cmp	r2, lr
+	cmp	r2, r8
 	str	r1, [sp, #4]
-	beq	.L2540
-	mla	r1, r8, r7, r0
-	orr	r2, r6, r2, lsl #10
+	beq	.L2554
+	mla	r1, fp, r6, r0
+	orr	r2, r5, r2, lsl #10
 	str	r2, [r1, #4]
 	movs	r2, #0
 	str	r2, [r1, #8]
-	mul	r2, ip, r7
-	adds	r7, r7, #1
-	uxth	r7, r7
+	mul	r2, lr, r6
+	adds	r6, r6, #1
+	uxth	r6, r6
 	bic	r2, r2, #3
-	mov	r5, r2
+	mov	r7, r2
 	ldr	r2, [sp, #8]
-	add	r5, r5, r2
-	str	r5, [r1, #12]
-.L2540:
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2554:
 	adds	r3, r3, #1
-	b	.L2537
-.L2614:
+	b	.L2551
+.L2627:
 	movs	r3, #0
-	b	.L2690
-.L2548:
+	b	.L2703
+.L2562:
 	movs	r3, #36
 	ldr	r1, [r8]
-	muls	r3, r5, r3
+	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2544
+	cbnz	r3, .L2558
 	ldr	r2, [r2, #12]
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2545
-	ldr	r1, .L2698+28
+	beq	.L2559
+	ldr	r1, .L2711+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2545
-	ldr	r1, .L2698+28
+	cbz	r0, .L2559
+	ldr	r1, .L2711+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2545:
+.L2559:
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2547
-.L2546:
+	bne	.L2561
+.L2560:
 	uxth	r3, r4
-	uxth	r5, r5
+	uxth	r7, r7
 	str	r3, [sp, #8]
 	movs	r2, #36
 	ldr	r3, [r8]
-	mla	r5, r2, r5, r3
-	ldr	r0, [r5, #4]
-	b	.L2691
-.L2544:
+	mla	r7, r2, r7, r3
+	ldr	r0, [r7, #4]
+	b	.L2704
+.L2558:
 	ldr	r1, [r2, #4]
-	uxth	fp, r6
-	ldr	r0, .L2698+48
+	uxth	fp, r5
+	ldr	r0, .L2711+48
 	bl	printf
 	ldrh	r2, [r10]
-	ldr	r3, .L2698+52
+	ldr	r3, .L2711+52
 	strh	r2, [r3]	@ movhi
-.L2547:
-	adds	r5, r5, #1
-	b	.L2543
-.L2552:
+.L2561:
+	adds	r7, r7, #1
+	b	.L2557
+.L2566:
 	movw	r2, #65535
 	cmp	fp, r2
-	bne	.L2553
+	bne	.L2567
 	cmp	r3, #0
-	bne	.L2554
-.L2553:
-	ldr	r3, .L2698+56
-	uxth	fp, r6
-	uxth	r6, r6
+	bne	.L2568
+.L2567:
+	ldr	r3, .L2711+56
+	uxth	fp, r5
+	uxth	r5, r5
 	mov	r7, #-1
+	mov	r6, r7
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	itt	eq
@@ -18504,69 +18538,68 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #24]
 	ldr	r3, [sp, #12]
 	adds	r3, r3, #7
-	cmp	r6, r3
-	mov	r6, r7
+	cmp	r5, r3
 	itet	gt
 	subgt	r4, fp, #7
 	ldrle	r4, [sp, #12]
 	uxthgt	r4, r4
-.L2557:
+.L2571:
 	cmp	r4, fp
-	bhi	.L2572
-	ldr	r3, .L2698+12
+	bhi	.L2586
+	ldr	r3, .L2711+12
 	movw	lr, #65535
 	mov	ip, #36
 	ldrh	r8, [r3]
-	ldr	r3, .L2698+16
+	ldr	r3, .L2711+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
 	str	r3, [sp, #32]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2573
-.L2559:
+	b	.L2587
+.L2573:
 	ldr	r1, [sp, #32]
 	ldrh	r2, [r1], #2
 	cmp	r2, lr
 	str	r1, [sp, #32]
-	beq	.L2558
+	beq	.L2572
 	mla	r1, ip, r5, r0
 	adds	r5, r5, #1
 	orr	r2, r4, r2, lsl #10
 	uxth	r5, r5
 	str	r2, [r1, #4]
-.L2558:
+.L2572:
 	adds	r3, r3, #1
-.L2573:
+.L2587:
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2559
+	bhi	.L2573
 	mov	r1, r5
 	ldr	r2, [sp, #36]
 	bl	FlashReadPages
-	ldr	r2, .L2698+4
+	ldr	r2, .L2711+4
 	movs	r1, #36
-	ldr	r3, .L2698+56
+	ldr	r3, .L2711+56
 	movs	r0, #0
 	movw	ip, #65535
 	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2698+16
+	ldr	r2, .L2711+16
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	mla	r5, r1, r5, r2
-.L2560:
-	cmp	r2, r5
-	bne	.L2570
-	cbz	r0, .L2571
-	ldr	r2, .L2698+56
+.L2574:
+	cmp	r5, r2
+	bne	.L2584
+	cbz	r0, .L2585
+	ldr	r2, .L2711+56
 	str	r3, [r2]
-.L2571:
+.L2585:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L2557
-.L2699:
+	b	.L2571
+.L2712:
 	.align	2
-.L2698:
+.L2711:
 	.word	.LANCHOR53
 	.word	.LANCHOR8
 	.word	.LANCHOR16
@@ -18579,126 +18612,124 @@ FtlRecoverySuperblock:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC62
+	.word	.LC61
 	.word	.LANCHOR235
 	.word	.LANCHOR136
-.L2570:
+.L2584:
 	ldr	r1, [r2]
-	cbnz	r1, .L2561
+	cbnz	r1, .L2575
 	ldr	r1, [r2, #12]
 	ldrh	r8, [r1]
 	cmp	r8, ip
-	beq	.L2617
+	beq	.L2630
 	ldr	r1, [r1, #4]
 	cmp	r1, #-1
-	beq	.L2617
+	beq	.L2630
 	adds	r0, r7, #1
-	bne	.L2619
-	ldr	r0, .L2700
+	bne	.L2632
+	ldr	r0, .L2713
 	ldrh	r0, [r0, r4, lsl #1]
 	cmp	r0, ip
-	bne	.L2563
+	bne	.L2577
 	cmp	lr, #0
-	beq	.L2619
-.L2563:
+	beq	.L2632
+.L2577:
 	ldr	r0, [sp, #4]
 	cmp	r0, r3
 	it	ne
 	movne	r7, r3
-.L2619:
+.L2632:
 	movs	r0, #1
-	b	.L2562
-.L2561:
-	cbz	r0, .L2564
-	ldr	r2, .L2700+4
+	b	.L2576
+.L2575:
+	cbz	r0, .L2578
+	ldr	r2, .L2713+4
 	str	r3, [r2]
-.L2564:
-	ldr	r3, .L2700+8
+.L2578:
+	ldr	r3, .L2713+8
 	ldrh	r2, [r10]
 	strh	r2, [r3]	@ movhi
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2554
-	ldr	r3, .L2700
+	cbnz	r3, .L2568
+	ldr	r3, .L2713
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2566
+	bne	.L2580
 	adds	r1, r7, #1
-	ldr	r3, .L2700+4
-	beq	.L2567
+	ldr	r3, .L2713+4
+	beq	.L2581
 	str	r7, [r3]
-.L2554:
-	ldr	r3, .L2700+12
+.L2568:
+	ldr	fp, [sp, #12]
 	movs	r2, #1
-	ldr	r0, .L2700+16
-	ldr	r6, .L2700+20
+	ldr	r6, .L2713+12
+	ldr	r3, .L2713+16
 	strh	r2, [r3]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	fp, [sp, #12]
-.L2574:
-	ldr	r3, .L2700+24
+.L2588:
+	ldr	r3, .L2713+20
 	movw	ip, #65535
 	ldr	r0, [r6]
 	mov	lr, #36
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2700+28
+	ldr	r3, .L2713+24
 	str	r2, [sp, #24]
 	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2575:
+.L2589:
 	uxth	r3, r2
 	cmp	r3, r5
-	bcc	.L2578
+	bcc	.L2592
 	ldr	r2, [sp, #36]
 	ldr	r1, [sp, #24]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2695:
+.L2708:
 	str	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldrh	r3, [sp, #32]
 	cmp	r2, r3
-	bhi	.L2607
+	bhi	.L2620
 	ldrb	r3, [r10, #8]	@ zero_extendqisi2
 	add	fp, fp, #1
 	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2608
-	ldr	r3, .L2700+28
+	bne	.L2621
+	ldr	r3, .L2713+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2608
-	ldr	r3, .L2700+32
+	cbz	r3, .L2621
+	ldr	r3, .L2713+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2608
+	bne	.L2621
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	beq	.L2583
-.L2608:
-	ldr	r3, .L2700+36
+	beq	.L2597
+.L2621:
+	ldr	r3, .L2713+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2574
-	ldr	r2, .L2700+24
+	bne	.L2588
+	ldr	r2, .L2713+20
 	movw	r0, #65535
 	movs	r3, #0
 	strh	fp, [r10, #2]	@ movhi
 	strh	r3, [r10, #4]	@ movhi
 	ldrh	r2, [r2]
-.L2609:
+.L2622:
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2689
+	bcs	.L2702
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
 	cmp	r4, r0
 	str	r1, [sp, #20]
 	add	r1, r3, #1
-	bne	.L2696
+	bne	.L2709
 	mov	r3, r1
-	b	.L2609
-.L2567:
+	b	.L2622
+.L2581:
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
@@ -18706,62 +18737,62 @@ FtlRecoverySuperblock:
 	ldreq	r2, [r3]
 	movne	r2, r1
 	addeq	r2, r2, #-1
-.L2692:
+.L2705:
 	str	r2, [r3]
-	b	.L2554
-.L2566:
+	b	.L2568
+.L2580:
 	ldr	r3, [sp, #4]
 	cmp	r6, r3
-	beq	.L2569
+	beq	.L2583
 	adds	r2, r6, #1
-	beq	.L2554
-	ldr	r3, .L2700+4
+	beq	.L2568
+	ldr	r3, .L2713+4
 	str	r6, [r3]
-	b	.L2554
-.L2569:
-	ldr	r2, .L2700+4
+	b	.L2568
+.L2583:
+	ldr	r2, .L2713+4
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2554
+	beq	.L2568
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2554
-.L2617:
+	b	.L2568
+.L2630:
 	mov	r1, r3
 	mov	r3, r6
-.L2562:
+.L2576:
 	mov	r6, r3
 	adds	r2, r2, #36
 	mov	r3, r1
-	b	.L2560
-.L2572:
+	b	.L2574
+.L2586:
 	mov	r2, #-1
-	ldr	r3, .L2700+4
-	b	.L2692
-.L2578:
+	ldr	r3, .L2713+4
+	b	.L2705
+.L2592:
 	ldrh	r3, [r1], #2
 	cmp	r3, ip
-	beq	.L2576
+	beq	.L2590
 	ldr	r4, [sp, #24]
 	orr	r3, fp, r3, lsl #10
 	mla	r4, lr, r4, r0
 	str	r3, [r4, #4]
 	ldrb	r8, [r10, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L2577
-	cbz	r7, .L2577
+	bne	.L2591
+	cbz	r7, .L2591
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2577:
+.L2591:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L2576:
+.L2590:
 	adds	r2, r2, #1
-	b	.L2575
-.L2607:
+	b	.L2589
+.L2620:
 	ldr	r3, [sp, #32]
 	movs	r5, #36
 	ldr	r8, [r6]
@@ -18773,49 +18804,45 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	ldr	r3, [sp, #12]
 	cmp	fp, r3
-	bcc	.L2580
-	bne	.L2581
+	bcc	.L2594
+	bne	.L2595
 	ldr	r3, [sp, #28]
 	cmp	r3, r0
-	bhi	.L2580
-.L2581:
+	bhi	.L2594
+.L2595:
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bne	.L2582
+	bne	.L2596
 	ldr	r3, [sp, #16]
 	cmp	r3, r0
-	beq	.L2583
-.L2582:
+	beq	.L2597
+.L2596:
 	ldr	r3, [r8, r5]
 	adds	r3, r3, #1
-	beq	.L2584
+	beq	.L2598
 	ldr	r3, [r7, #12]
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2585
-.L2591:
+	beq	.L2599
 	ldrh	r0, [r10]
-.L2694:
+.L2706:
 	bl	decrement_vpc_count
-.L2580:
-	ldr	r3, [sp, #32]
-	adds	r3, r3, #1
-	b	.L2695
-.L2585:
+	b	.L2594
+.L2599:
 	ldr	r2, [r3, #4]
 	str	r2, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2586
-	ldr	r2, .L2700+40
+	beq	.L2600
+	ldr	r2, .L2713+36
 	ldr	r0, [sp, #4]
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2586
+	cbz	r0, .L2600
 	ldr	r1, [sp, #4]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L2586:
+.L2600:
 	ldr	r4, [r3, #8]
 	add	r1, sp, #48
 	ldr	r3, [r3, #12]
@@ -18823,17 +18850,17 @@ FtlRecoverySuperblock:
 	mov	r0, r4
 	str	r3, [sp, #44]
 	bl	log2phys
-	ldr	r3, .L2700+4
+	ldr	r3, .L2713+4
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L2587
+	beq	.L2601
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2587
+	beq	.L2601
 	ldr	r3, [sp, #44]
 	adds	r7, r3, #1
-	beq	.L2588
+	beq	.L2602
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -18845,58 +18872,78 @@ FtlRecoverySuperblock:
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2589
-.L2590:
+	bne	.L2603
+.L2604:
 	mov	r3, #-1
-	ldrh	r0, [r10]
 	str	r3, [sp, #44]
-	bl	decrement_vpc_count
-.L2598:
+.L2611:
 	ldr	r7, [sp, #44]
 	adds	r0, r7, #1
-	beq	.L2580
-.L2612:
+	beq	.L2594
+.L2625:
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2700+44
+	ldr	r3, .L2713+40
 	mov	r4, r0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2603
-	ldr	r1, .L2700+48
-	movw	r2, #2494
-	ldr	r0, .L2700+52
+	bhi	.L2616
+	ldr	r1, .L2713+44
+	movw	r2, #2425
+	ldr	r0, .L2713+48
 	bl	printf
-	ldr	r1, .L2700+56
-	ldr	r0, .L2700+60
+	ldr	r1, .L2713+52
+	ldr	r0, .L2713+56
 	bl	printf
-.L2603:
-	ldr	r3, .L2700+64
+.L2616:
+	ldr	r3, .L2713+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2604
+	beq	.L2617
 	mov	r0, r4
-	b	.L2694
-.L2588:
+	b	.L2706
+.L2602:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2591
+	bne	.L2594
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-	b	.L2591
-.L2701:
+.L2594:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	b	.L2708
+.L2603:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L2604
+	ldr	r8, [r7, #4]
+	ldr	r0, .L2713+4
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2604
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bne	.L2606
+.L2609:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L2604
+.L2714:
 	.align	2
-.L2700:
+.L2713:
 	.word	.LANCHOR120
 	.word	.LANCHOR136
 	.word	.LANCHOR235
-	.word	.LANCHOR236
-	.word	.LANCHOR127
 	.word	.LANCHOR180
+	.word	.LANCHOR236
 	.word	.LANCHOR38
 	.word	.LANCHOR8
 	.word	.LANCHOR54
@@ -18908,89 +18955,69 @@ FtlRecoverySuperblock:
 	.word	.LC6
 	.word	.LC7
 	.word	.LANCHOR84
-.L2589:
-	ldr	r1, [r7, #8]
-	cmp	r4, r1
-	bne	.L2590
-	ldr	r8, [r7, #4]
-	ldr	r0, .L2702
-	mov	r1, r8
-	ldr	r0, [r0]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L2590
-	ldr	r1, [sp, #48]
-	ldr	r0, [sp, #52]
-	cmp	r1, r0
-	bne	.L2593
-.L2596:
-	ldr	r1, [sp, #44]
-	mov	r0, r4
-	bl	FtlReUsePrevPpa
-	b	.L2590
-.L2593:
+.L2606:
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2590
+	beq	.L2604
 	adds	r0, r1, #1
-	beq	.L2594
+	beq	.L2607
 	str	r1, [r3, #4]
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
 	ldr	r7, [r3, #12]
 	bl	FlashReadPages
-.L2595:
+.L2608:
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2596
+	beq	.L2609
 	ldr	r3, [r7, #4]
-	ldr	r2, .L2702
+	ldr	r2, .L2715
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2596
+	beq	.L2609
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L2590
-	b	.L2596
-.L2594:
+	beq	.L2604
+	b	.L2609
+.L2607:
 	str	r1, [r2, r5]
-	b	.L2595
-.L2587:
+	b	.L2608
+.L2601:
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2598
+	beq	.L2611
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r7, [sp, #48]
 	adds	r5, r7, #1
-	beq	.L2598
+	beq	.L2611
 	ldr	r3, [sp, #44]
 	cmp	r7, r3
-	beq	.L2612
+	beq	.L2625
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2702+4
+	ldr	r3, .L2715+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2602
-	ldr	r3, .L2702+8
+	beq	.L2615
+	ldr	r3, .L2715+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2602
-	ldr	r3, .L2702+12
+	beq	.L2615
+	ldr	r3, .L2715+12
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2598
-.L2602:
+	bne	.L2611
+.L2615:
 	ldr	r0, [r6]
 	movs	r2, #0
 	movs	r1, #1
@@ -19000,73 +19027,73 @@ FtlRecoverySuperblock:
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2598
+	beq	.L2611
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp, #4]
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	bne	.L2598
+	bne	.L2611
 	movs	r2, #1
 	add	r1, sp, #48
 	mov	r0, r4
 	bl	log2phys
-	b	.L2598
-.L2604:
+	b	.L2611
+.L2617:
 	mov	r1, r4
-	ldr	r0, .L2702+16
+	ldr	r0, .L2715+16
 	bl	printf
-	b	.L2580
-.L2584:
+	b	.L2594
+.L2598:
 	ldrh	r3, [r10]
 	mov	r1, r4
-	ldr	r2, .L2702+20
-	ldr	r0, .L2702+24
+	ldr	r2, .L2715+20
+	ldr	r0, .L2715+24
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [sp, #4]
 	bl	printf
-	ldr	r2, .L2702+28
+	ldr	r2, .L2715+28
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2605
+	bhi	.L2618
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2702+32
+	ldr	r1, .L2715+32
 	str	r0, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2605:
+.L2618:
 	ldrh	r0, [r10]
 	bl	decrement_vpc_count
-	ldr	r3, .L2702
+	ldr	r3, .L2715
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2606
+	bne	.L2619
 	ldr	r2, [sp, #4]
-.L2693:
+.L2707:
 	str	r2, [r3]
-	b	.L2580
-.L2606:
+	b	.L2594
+.L2619:
 	ldr	r1, [sp, #4]
 	cmp	r1, r2
-	bcs	.L2580
+	bcs	.L2594
 	mov	r2, r1
-	b	.L2693
-.L2583:
+	b	.L2707
+.L2597:
 	ldrb	r3, [sp, #16]	@ zero_extendqisi2
 	ldr	r2, [sp, #16]
 	strb	r3, [r10, #6]
 	ldrh	r3, [sp, #8]
 	strh	r3, [r10, #2]	@ movhi
-	b	.L2697
-.L2703:
+	b	.L2710
+.L2716:
 	.align	2
-.L2702:
+.L2715:
 	.word	.LANCHOR136
 	.word	.LANCHOR92
 	.word	.LANCHOR93
 	.word	.LANCHOR94
-	.word	.LC63
+	.word	.LC62
 	.word	.LANCHOR235
-	.word	.LC64
+	.word	.LC63
 	.word	.LANCHOR237
 	.word	.LANCHOR238
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -19082,42 +19109,42 @@ FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2727
+	ldr	r3, .L2740
 	ldr	r3, [r3]
-	cbz	r3, .L2705
-.L2710:
+	cbz	r3, .L2718
+.L2723:
 	movs	r0, #0
-.L2704:
+.L2717:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2705:
-	ldr	r0, .L2727+4
+.L2718:
+	ldr	r0, .L2740+4
 	movw	r3, #65535
-	ldr	r5, .L2727+8
+	ldr	r5, .L2740+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2707
-	ldr	r3, .L2727+12
+	beq	.L2720
+	ldr	r3, .L2740+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L2707
-	ldr	r3, .L2727+16
+	beq	.L2720
+	ldr	r3, .L2740+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2708
+	bls	.L2721
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L2708:
+.L2721:
 	ldr	r3, [r5]
-	cbnz	r3, .L2709
-	ldr	r2, .L2727+20
+	cbnz	r3, .L2722
+	ldr	r2, .L2740+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19125,73 +19152,73 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2709:
+.L2722:
 	movs	r3, #0
 	movs	r0, #1
 	str	r3, [r5]
-	b	.L2704
-.L2707:
+	b	.L2717
+.L2720:
 	ldrh	r2, [r4]
 	movs	r3, #0
 	str	r3, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2710
-	ldr	r6, .L2727+12
+	beq	.L2723
+	ldr	r6, .L2740+12
 	bl	FtlCacheWriteBack
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2727+24
+	ldr	r5, .L2740+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2711
-	ldr	r1, .L2727+28
+	beq	.L2724
+	ldr	r1, .L2740+28
 	movs	r2, #163
-	ldr	r0, .L2727+32
+	ldr	r0, .L2740+32
 	bl	printf
-	ldr	r1, .L2727+36
-	ldr	r0, .L2727+40
+	ldr	r1, .L2740+36
+	ldr	r0, .L2740+40
 	bl	printf
-.L2711:
+.L2724:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2727+44
+	ldr	r2, .L2740+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2727+84
+	ldr	fp, .L2740+84
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2727+48
+	ldr	r1, .L2740+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2712:
+.L2725:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2716
+	bhi	.L2729
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2727+52
+	ldr	r3, .L2740+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2717
+	cbz	r3, .L2730
 	ldrh	r1, [r4]
-	ldr	r0, .L2727+56
+	ldr	r0, .L2740+56
 	bl	printf
-.L2717:
+.L2730:
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2718
+	beq	.L2731
 	bl	INSERT_DATA_LIST
-.L2719:
-	ldr	r3, .L2727+60
+.L2732:
+	ldr	r3, .L2740+60
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -19199,39 +19226,39 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2727+64
+	ldr	r3, .L2740+64
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L2740+68
 	ldrh	r2, [r3]
-	ldr	r3, .L2727+68
+	ldr	r3, .L2740+72
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2710
-	ldr	r3, .L2727+72
+	ble	.L2723
+	ldr	r3, .L2740+76
 	movs	r2, #20
 	mov	r0, r4
-	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2727+76
 	strh	r2, [r3]	@ movhi
-	b	.L2704
-.L2716:
+	b	.L2717
+.L2729:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L2727+80
+	ldr	r3, .L2740+80
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L2713
-	ldr	r1, .L2727+28
+	bcc	.L2726
+	ldr	r1, .L2740+28
 	movs	r2, #168
-	ldr	r0, .L2727+32
+	ldr	r0, .L2740+32
 	bl	printf
-	ldr	r1, .L2727+36
-	ldr	r0, .L2727+40
+	ldr	r1, .L2740+36
+	ldr	r0, .L2740+40
 	bl	printf
-.L2713:
+.L2726:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -19239,7 +19266,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L2714
+	bne	.L2727
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -19248,23 +19275,23 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L2726:
+.L2739:
 	bl	decrement_vpc_count
-.L2715:
+.L2728:
 	adds	r6, r6, #1
-	b	.L2712
-.L2714:
+	b	.L2725
+.L2727:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L2715
+	beq	.L2728
 	ldrh	r0, [r4]
-	b	.L2726
-.L2718:
+	b	.L2739
+.L2731:
 	bl	INSERT_FREE_LIST
-	b	.L2719
-.L2728:
+	b	.L2732
+.L2741:
 	.align	2
-.L2727:
+.L2740:
 	.word	.LANCHOR77
 	.word	.LANCHOR94
 	.word	.LANCHOR135
@@ -19279,11 +19306,11 @@ FtlGcFreeTempBlock:
 	.word	.LANCHOR84
 	.word	.LANCHOR161
 	.word	.LANCHOR8
-	.word	.LC65
+	.word	.LC64
 	.word	.LANCHOR110
+	.word	.LANCHOR204
 	.word	.LANCHOR89
 	.word	.LANCHOR223
-	.word	.LANCHOR204
 	.word	.LANCHOR176
 	.word	.LANCHOR112
 	.word	.LANCHOR73
@@ -19300,27 +19327,27 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2731
-	ldr	r5, .L2731+4
+	ldr	r4, .L2744
+	ldr	r5, .L2744+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2729
-	ldr	r0, .L2731+8
+	bcc	.L2742
+	ldr	r0, .L2744+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2731+12
+	ldr	r3, .L2744+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2729:
+.L2742:
 	pop	{r3, r4, r5, pc}
-.L2732:
+.L2745:
 	.align	2
-.L2731:
+.L2744:
 	.word	.LANCHOR53
 	.word	.LANCHOR94
 	.word	.LANCHOR127
@@ -19339,13 +19366,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L2734
-	ldr	r3, .L2734+4
+	ldr	r5, .L2747
+	ldr	r3, .L2747+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L2734+8
+	ldr	r5, .L2747+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -19356,9 +19383,9 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2735:
+.L2748:
 	.align	2
-.L2734:
+.L2747:
 	.word	.LANCHOR92
 	.word	.LANCHOR237
 	.word	.LANCHOR93
@@ -19376,30 +19403,30 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L2746
+	ldr	r4, .L2758
 	movw	r5, #65535
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2746+4
+	ldr	r3, .L2758+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2746+8
+	ldr	r3, .L2758+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L2746+12
+	ldr	r3, .L2758+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
 	mov	r5, r4
-	bne	.L2737
-.L2739:
+	bne	.L2750
+.L2752:
 	mov	r4, #-1
-.L2736:
+.L2749:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2737:
+.L2750:
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L2739
+	bne	.L2752
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -19409,65 +19436,65 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2746+16
+	ldr	r3, .L2758+16
 	movs	r0, #12
 	ldrh	r2, [r3]
-	ldr	r3, .L2746+20
+	ldr	r3, .L2758+20
 	ldr	r1, [r3]
 	mov	r3, r4
-.L2740:
+.L2753:
 	cmp	r3, r2
-	blt	.L2742
+	blt	.L2755
 	ldrh	r3, [r5]
 	cmp	r3, #0
-	beq	.L2736
-.L2741:
-	ldr	r3, .L2746+24
+	beq	.L2756
+.L2754:
+	ldr	r3, .L2758+24
 	ldr	r1, [r3]
-	ldr	r3, .L2746+28
+	ldr	r3, .L2758+28
 	ldrh	r0, [r3]
 	ldrh	r5, [r3, #4]
 	ldrh	r2, [r1, r0, lsl #1]
 	subs	r2, r2, r5
-	ldr	r5, .L2746+32
+	ldr	r5, .L2758+32
 	strh	r2, [r1, r0, lsl #1]	@ movhi
 	ldrh	r2, [r5]
 	strh	r2, [r3, #2]	@ movhi
 	movs	r2, #0
 	strh	r2, [r3, #4]	@ movhi
 	strb	r2, [r3, #6]
-	ldr	r3, .L2746+36
+	ldr	r3, .L2758+36
 	ldrh	r6, [r3]
 	ldrh	r7, [r3, #4]
 	ldrh	r0, [r1, r6, lsl #1]
 	subs	r0, r0, r7
 	strh	r0, [r1, r6, lsl #1]	@ movhi
-	ldrh	r1, [r5]
-	ldr	r0, .L2746+40
 	strb	r2, [r3, #6]
-	strh	r1, [r3, #2]	@ movhi
+	ldrh	r1, [r5]
 	strh	r2, [r3, #4]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L2746+44
-	bl	FtlMapBlkWriteDumpData
-	ldr	r2, .L2746+48
+	ldr	r2, .L2758+40
+	strh	r1, [r3, #2]	@ movhi
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+.L2757:
 	bl	FtlVpcTblFlush
-	b	.L2736
-.L2742:
+	b	.L2749
+.L2755:
 	mla	r6, r0, r3, r1
 	ldr	r6, [r6, #4]
 	cmp	r6, #0
-	blt	.L2741
+	blt	.L2754
 	adds	r3, r3, #1
-	b	.L2740
-.L2747:
+	b	.L2753
+.L2756:
+	bl	l2p_flush
+	b	.L2757
+.L2759:
 	.align	2
-.L2746:
+.L2758:
 	.word	.LANCHOR236
 	.word	.LANCHOR235
 	.word	.LANCHOR39
@@ -19478,8 +19505,6 @@ FtlSysBlkInit:
 	.word	.LANCHOR92
 	.word	.LANCHOR53
 	.word	.LANCHOR93
-	.word	.LANCHOR127
-	.word	.LANCHOR215
 	.word	.LANCHOR81
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",%progbits
@@ -19493,87 +19518,87 @@ FtlSysBlkInit:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2779
+	ldr	r3, .L2791
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
 	ldr	r4, [r3]
 	cmp	r4, #0
-	bne	.L2750
-	ldr	r5, .L2779+4
+	bne	.L2762
+	ldr	r5, .L2791+4
 	mov	r1, r4
-	ldr	r3, .L2779+8
-	ldr	r6, .L2779+12
+	ldr	r3, .L2791+8
+	ldr	r6, .L2791+12
 	ldrh	r2, [r5]
 	ldr	r0, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2779+16
-	ldr	r5, .L2779+20
+	ldr	r3, .L2791+16
+	ldr	r5, .L2791+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2779+24
+	ldr	r3, .L2791+24
 	ldrh	r0, [r6]
 	str	r4, [r5]
 	str	r4, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2751
+	cbz	r0, .L2763
 	bl	FtlMakeBbt
-.L2751:
-	ldr	r3, .L2779+28
-	ldr	r2, .L2779+32
-	ldr	ip, .L2779+112
+.L2763:
+	ldr	r3, .L2791+28
+	ldr	r2, .L2791+32
+	ldr	ip, .L2791+112
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2779+36
+	ldr	r2, .L2791+36
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L2752:
+.L2764:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L2753
-	ldr	r3, .L2779+40
+	blt	.L2765
+	ldr	r3, .L2791+40
 	movs	r7, #0
-	ldr	fp, .L2779+116
+	ldr	fp, .L2791+116
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
-.L2754:
+.L2766:
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2755
-	ldr	r4, .L2779+44
+	bhi	.L2767
+	ldr	r4, .L2791+44
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2756
-.L2760:
+	bgt	.L2768
+.L2772:
 	movs	r7, #0
 	mov	r6, r7
-.L2757:
+.L2769:
 	ldrh	r3, [r8]
 	uxth	r0, r7
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2761
+	bhi	.L2773
 	ldrh	r2, [r10]
-	ldr	r3, .L2779+48
+	ldr	r3, .L2791+48
 	ldrh	r4, [r4]
-	ldr	r7, .L2779+52
+	ldr	r7, .L2791+52
 	str	r2, [r3]
-	ldr	r3, .L2779+56
+	ldr	r3, .L2791+56
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2779+60
+	ldr	r1, .L2791+60
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -19584,7 +19609,7 @@ FtlLowFormat:
 	str	r3, [sp, #4]
 	str	r1, [sp, #8]
 	cmp	r6, r2
-	ble	.L2762
+	ble	.L2774
 	ldr	r3, [sp, #16]
 	mov	r1, r4
 	subs	r0, r3, r6
@@ -19594,12 +19619,12 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2762:
-	ldr	r3, .L2779+64
+.L2774:
+	ldr	r3, .L2791+64
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2763
-	ldr	r2, .L2779+60
+	bne	.L2775
+	ldr	r2, .L2791+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19611,11 +19636,11 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2763:
-	ldr	r3, .L2779+68
+.L2775:
+	ldr	r3, .L2791+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2764
-	ldr	r2, .L2779+60
+	cbz	r3, .L2776
+	ldr	r2, .L2791+60
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -19627,55 +19652,55 @@ FtlLowFormat:
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2764:
-	ldr	r3, .L2779+72
+.L2776:
+	ldr	r3, .L2791+72
 	ldrh	r3, [r3]
-	cbz	r3, .L2766
-	ldr	r2, .L2779+60
+	cbz	r3, .L2778
+	ldr	r2, .L2791+60
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2766
+	bge	.L2778
 	ldr	r1, [sp, #4]
 	adds	r3, r3, #32
 	str	fp, [r7]
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2766:
+.L2778:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2779+76
+	ldr	r6, .L2791+76
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2779+80
+	ldr	r3, .L2791+80
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2779+84
+	ldr	r7, .L2791+84
 	muls	r4, r3, r4
-	ldr	r3, .L2779+88
+	ldr	r3, .L2791+88
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2779+120
+	ldr	r10, .L2791+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2779+92
+	ldr	r2, .L2791+92
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2779+96
+	ldr	r2, .L2791+96
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -19686,30 +19711,30 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2779+100
+	ldr	r3, .L2791+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2768:
+.L2780:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2769
+	bne	.L2781
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2768
-.L2753:
+	b	.L2780
+.L2765:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L2752
-.L2755:
+	b	.L2764
+.L2767:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -19717,11 +19742,11 @@ FtlLowFormat:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L2754
-.L2756:
+	b	.L2766
+.L2768:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2779+104
+	ldr	r3, .L2791+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -19729,26 +19754,26 @@ FtlLowFormat:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L2758:
+.L2770:
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2760
+	bls	.L2772
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L2758
-.L2761:
+	b	.L2770
+.L2773:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r6, r6, r0
 	uxth	r6, r6
-	b	.L2757
-.L2769:
+	b	.L2769
+.L2781:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2779+108
+	ldr	r4, .L2791+108
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -19764,22 +19789,22 @@ FtlLowFormat:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2770:
+.L2782:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2771
+	bne	.L2783
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2770
-.L2780:
+	b	.L2782
+.L2792:
 	.align	2
-.L2779:
+.L2791:
 	.word	.LANCHOR77
 	.word	.LANCHOR67
 	.word	.LANCHOR195
@@ -19811,7 +19836,7 @@ FtlLowFormat:
 	.word	168778952
 	.word	.LANCHOR41
 	.word	.LANCHOR84
-.L2771:
+.L2783:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -19820,10 +19845,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2781
+	ldr	r3, .L2793
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2781+4
+	ldr	r3, .L2793+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -19836,18 +19861,18 @@ FtlLowFormat:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2750
-	ldr	r3, .L2781+8
+	cbnz	r0, .L2762
+	ldr	r3, .L2793+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2750:
+.L2762:
 	movs	r0, #0
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2782:
+.L2794:
 	.align	2
-.L2781:
+.L2793:
 	.word	.LANCHOR94
 	.word	.LANCHOR209
 	.word	.LANCHOR231
@@ -19865,35 +19890,35 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L2786
+	ldr	r4, .L2798
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L2784
+	beq	.L2796
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2785
-.L2784:
+	cbnz	r3, .L2797
+.L2796:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2786
+	ldr	r0, .L2798
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L2786+4
+	ldr	r3, .L2798+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2786+8
+	ldr	r3, .L2798+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2785:
-	ldr	r0, .L2786
+.L2797:
+	ldr	r0, .L2798
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L2787:
+.L2799:
 	.align	2
-.L2786:
+.L2798:
 	.word	.LANCHOR94
 	.word	.LANCHOR110
 	.word	.LANCHOR111
@@ -19910,26 +19935,26 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2803
+	ldr	r3, .L2815
 	ldr	r3, [r3]
-	cbz	r3, .L2789
-.L2792:
+	cbz	r3, .L2801
+.L2804:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2789:
-	ldr	r3, .L2803+4
-	ldr	r5, .L2803+8
+.L2801:
+	ldr	r3, .L2815+4
+	ldr	r5, .L2815+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2791
+	cbz	r3, .L2803
 	ldr	r3, [r5]
 	lsls	r2, r3, #31
-	bpl	.L2791
-	ldr	r3, .L2803+12
+	bpl	.L2803
+	ldr	r3, .L2815+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2792
-.L2791:
-	ldr	r4, .L2803+16
+	bne	.L2804
+.L2803:
+	ldr	r4, .L2815+16
 	movs	r3, #0
 	movs	r6, #0
 	movs	r7, #36
@@ -19937,38 +19962,38 @@ Ftl_gc_temp_data_write_back:
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2793:
+.L2805:
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2795
+	bcc	.L2807
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2803+12
+	ldr	r3, .L2815+12
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2792
+	bne	.L2804
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2802
-.L2795:
+	b	.L2814
+.L2807:
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L2794
-	ldr	r3, .L2803+12
+	bne	.L2806
+	ldr	r3, .L2815+12
 	movs	r5, #0
-	ldr	r0, .L2803+20
+	ldr	r0, .L2815+20
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2803+24
+	ldr	r2, .L2815+24
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -19977,19 +20002,19 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2802:
+.L2814:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2794:
+.L2806:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2793
-.L2804:
+	b	.L2805
+.L2816:
 	.align	2
-.L2803:
+.L2815:
 	.word	.LANCHOR77
 	.word	.LANCHOR8
 	.word	.LANCHOR103
@@ -20009,34 +20034,34 @@ Ftl_gc_temp_data_write_back:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2895
+	ldr	r3, .L2907
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2857
-	ldr	r3, .L2895+4
+	bne	.L2869
+	ldr	r3, .L2907+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2857
-	ldr	r2, .L2895+8
+	bne	.L2869
+	ldr	r2, .L2907+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2859
-	ldr	r5, .L2895+12
+	bls	.L2871
+	ldr	r5, .L2907+12
 	movw	r2, #65535
 	ldrh	ip, [r5]
 	cmp	ip, r2
-	beq	.L2807
-	ldr	r7, .L2895+16
+	beq	.L2819
+	ldr	r7, .L2907+16
 	ldrh	r3, [r7]
 	cmp	r3, r2
-	bne	.L2807
-	ldr	r1, .L2895+20
+	bne	.L2819
+	ldr	r1, .L2907+20
 	ldrh	r6, [r1]
 	cmp	r6, r3
-	beq	.L2807
-	ldr	r2, .L2895+24
+	beq	.L2819
+	ldr	r2, .L2907+24
 	ldrh	r4, [r2]
 	cmp	r4, r3
 	itttt	ne
@@ -20044,164 +20069,164 @@ rk_ftl_garbage_collect:
 	strhne	r6, [r5]	@ movhi
 	strhne	r4, [r1]	@ movhi
 	strhne	r3, [r2]	@ movhi
-.L2807:
+.L2819:
 	cmp	r0, #0
-	bne	.L2860
-	ldr	r3, .L2895+28
+	bne	.L2872
+	ldr	r3, .L2907+28
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2861
-	ldr	r2, .L2895+32
+	bhi	.L2873
+	ldr	r2, .L2907+32
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L2810
+	bls	.L2822
 	lsrs	r4, r4, #5
-.L2809:
-	ldr	r2, .L2895+36
+.L2821:
+	ldr	r2, .L2907+36
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2813
-	ldr	r3, .L2895+40
+	bcs	.L2825
+	ldr	r3, .L2907+40
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2814
-	ldr	r0, .L2895+16
+	bne	.L2826
+	ldr	r0, .L2907+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2814
-	ldr	r3, .L2895+44
+	bne	.L2826
+	ldr	r3, .L2907+44
 	ldrh	r0, [r3]
-	cbnz	r0, .L2815
-	ldr	r3, .L2895+48
-	ldr	r4, .L2895+52
+	cbnz	r0, .L2827
+	ldr	r3, .L2907+48
+	ldr	r4, .L2907+52
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2816
-.L2815:
-	ldr	r3, .L2895+56
+	bcs	.L2828
+.L2827:
+	ldr	r3, .L2907+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2817:
-	ldr	r3, .L2895+60
+.L2829:
+	ldr	r3, .L2907+60
 	movs	r2, #0
 	str	r2, [r3]
-.L2805:
+.L2817:
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2810:
+.L2822:
 	cmp	r3, #12
-	bls	.L2811
+	bls	.L2823
 	lsrs	r4, r4, #4
-	b	.L2809
-.L2811:
+	b	.L2821
+.L2823:
 	cmp	r3, #8
-	bls	.L2809
+	bls	.L2821
 	lsrs	r4, r4, #2
-	b	.L2809
-.L2861:
+	b	.L2821
+.L2873:
 	movs	r4, #1
-	b	.L2809
-.L2816:
+	b	.L2821
+.L2828:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2817
-.L2814:
-	ldr	r3, .L2895+56
+	b	.L2829
+.L2826:
+	ldr	r3, .L2907+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2813:
-	ldr	r3, .L2895+64
+.L2825:
+	ldr	r3, .L2907+64
 	ldrh	r3, [r3]
-	cbz	r3, .L2808
+	cbz	r3, .L2820
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L2808:
-	ldr	r5, .L2895+68
+.L2820:
+	ldr	r5, .L2907+68
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2820
-	ldr	r3, .L2895+16
+	bne	.L2832
+	ldr	r3, .L2907+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2821
-	ldr	r0, .L2895+72
+	beq	.L2833
+	ldr	r0, .L2907+72
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2822
+	cbnz	r1, .L2834
 	strh	r2, [r3]	@ movhi
-.L2822:
+.L2834:
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2821:
+.L2833:
 	ldrh	r0, [r5]
 	movw	r6, #65535
 	movs	r3, #0
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L2820
+	beq	.L2832
 	bl	IsBlkInGcList
-	cbz	r0, .L2824
+	cbz	r0, .L2836
 	strh	r6, [r5]	@ movhi
-.L2824:
-	ldr	r3, .L2895+76
+.L2836:
+	ldr	r3, .L2907+76
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2825
+	cbz	r3, .L2837
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
 	strb	r0, [r5, #8]
-.L2825:
+.L2837:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2820
-	ldr	r0, .L2895+68
+	beq	.L2832
+	ldr	r0, .L2907+68
 	bl	make_superblock
-	ldr	r2, .L2895+80
+	ldr	r2, .L2907+80
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2895+72
+	ldr	r3, .L2907+72
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2895+84
+	ldr	r3, .L2907+84
 	strh	r2, [r3]	@ movhi
-.L2820:
-	ldr	r2, .L2895+88
+.L2832:
+	ldr	r2, .L2907+88
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2826
-	ldr	r2, .L2895+92
+	beq	.L2838
+	ldr	r2, .L2907+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2826
-	ldr	r5, .L2895+68
+	beq	.L2838
+	ldr	r5, .L2907+68
 	mov	r6, r5
-.L2827:
+.L2839:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2828
-	ldr	r10, .L2895+100
+	bne	.L2840
+	ldr	r10, .L2907+100
 	movs	r2, #0
-	ldr	r3, .L2895+60
+	ldr	r3, .L2907+60
 	mov	r7, r10
 	str	r2, [r3]
-.L2829:
+.L2841:
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
@@ -20209,36 +20234,36 @@ rk_ftl_garbage_collect:
 	movw	r3, #65535
 	cmp	fp, r3
 	strh	fp, [r6]	@ movhi
-	bne	.L2830
+	bne	.L2842
 	movs	r3, #0
 	movs	r0, #8
 	strh	r3, [r10]	@ movhi
-	b	.L2805
-.L2860:
+	b	.L2817
+.L2872:
 	movs	r4, #1
-	b	.L2808
-.L2826:
+	b	.L2820
+.L2838:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2893:
-	ldr	r3, .L2895+44
+.L2905:
+	ldr	r3, .L2907+44
 	ldrh	r0, [r3]
-	b	.L2805
-.L2830:
+	b	.L2817
+.L2842:
 	str	r0, [sp, #8]
 	mov	r0, fp
 	bl	IsBlkInGcList
 	add	r3, r8, #1
 	ldr	r2, [sp, #8]
-	cbz	r0, .L2831
+	cbz	r0, .L2843
 	strh	r3, [r10]	@ movhi
-	b	.L2829
-.L2831:
-	ldr	r1, .L2895+32
+	b	.L2841
+.L2843:
+	ldr	r1, .L2907+32
 	uxth	r3, r3
-	ldr	lr, .L2895+104
+	ldr	lr, .L2907+104
 	uxth	r2, r2
-	ldr	r8, .L2895+72
+	ldr	r8, .L2907+72
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
@@ -20246,39 +20271,39 @@ rk_ftl_garbage_collect:
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2833
+	bgt	.L2845
 	cmp	r3, #48
-	bls	.L2834
+	bls	.L2846
 	cmp	ip, #8
-	bls	.L2834
-	ldr	r3, .L2895+96
+	bls	.L2846
+	ldr	r3, .L2907+96
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2834
-.L2833:
+	bhi	.L2846
+.L2845:
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2834:
+.L2846:
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2835
+	bgt	.L2847
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2893
-.L2835:
+	b	.L2905
+.L2847:
 	cmp	r3, #0
-	bne	.L2836
+	bne	.L2848
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2829
-.L2896:
+	b	.L2841
+.L2908:
 	.align	2
-.L2895:
+.L2907:
 	.word	.LANCHOR77
 	.word	.LANCHOR171
 	.word	.LANCHOR86
@@ -20306,86 +20331,86 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR110
 	.word	.LANCHOR178
 	.word	.LANCHOR38
-.L2836:
+.L2848:
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	ldr	r3, .L2897
+	ldr	r3, .L2909
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2837
+	cbz	r3, .L2849
 	mov	r0, fp
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L2837:
-	ldr	r3, .L2897+4
+.L2849:
+	ldr	r3, .L2909+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2838
-	ldr	r1, .L2897+8
-	movw	r2, #851
-	ldr	r0, .L2897+12
+	bne	.L2850
+	ldr	r1, .L2909+8
+	movw	r2, #857
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2838:
-	ldr	r3, .L2897+24
+.L2850:
+	ldr	r3, .L2909+24
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2839
-	ldr	r1, .L2897+8
-	mov	r2, #852
-	ldr	r0, .L2897+12
+	bne	.L2851
+	ldr	r1, .L2909+8
+	movw	r2, #858
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2839:
-	ldr	r3, .L2897+28
+.L2851:
+	ldr	r3, .L2909+28
 	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2840
-	ldr	r1, .L2897+8
-	movw	r2, #853
-	ldr	r0, .L2897+12
+	bne	.L2852
+	ldr	r1, .L2909+8
+	movw	r2, #859
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2840:
+.L2852:
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L2897+32
+	ldr	r2, .L2909+32
 	movs	r3, #0
 	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2897+36
+	ldr	r2, .L2909+36
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L2828:
-	ldr	r3, .L2897+40
+.L2840:
+	ldr	r3, .L2909+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2897+44
+	ldr	r3, .L2909+44
 	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2897
+	ldr	r3, .L2909
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2841
+	cbz	r3, .L2853
 	ldrb	r3, [r6, #8]	@ zero_extendqisi2
 	cmp	r3, r2
 	ittt	eq
-	ldreq	r3, .L2897+48
+	ldreq	r3, .L2909+48
 	ldrheq	r3, [r3]
 	streq	r3, [sp, #12]
-.L2841:
+.L2853:
 	ldrh	r3, [r6, #2]
 	ldr	r1, [sp, #12]
-	ldr	fp, .L2897+84
+	ldr	fp, .L2909+84
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -20395,11 +20420,11 @@ rk_ftl_garbage_collect:
 	it	gt
 	uxthgt	r4, r4
 	str	r3, [sp, #20]
-.L2843:
+.L2855:
 	ldrh	r3, [sp, #20]
 	cmp	r4, r3
-	bls	.L2851
-	ldr	r3, .L2897+52
+	bls	.L2863
+	ldr	r3, .L2909+52
 	movw	r8, #65535
 	ldrh	lr, [r5, #2]
 	mov	r10, #36
@@ -20407,17 +20432,17 @@ rk_ftl_garbage_collect:
 	ldrh	r7, [r3]
 	ldr	r3, [sp, #20]
 	add	lr, lr, r3
-	ldr	r3, .L2897+56
+	ldr	r3, .L2909+56
 	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L2852
-.L2845:
+	b	.L2864
+.L2857:
 	ldr	r1, [sp, #16]
 	ldrh	r2, [r1, #2]!
 	cmp	r2, r8
 	str	r1, [sp, #16]
-	beq	.L2844
+	beq	.L2856
 	ldr	r1, [sp, #8]
 	orr	r2, lr, r2, lsl #10
 	mla	ip, r10, r1, r0
@@ -20426,27 +20451,27 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #8]
-.L2844:
+.L2856:
 	adds	r3, r3, #1
-.L2852:
+.L2864:
 	uxth	r2, r3
 	cmp	r2, r7
-	bcc	.L2845
+	bcc	.L2857
 	ldrb	r2, [r5, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #8]
 	bl	FlashReadPages
 	movs	r3, #0
-.L2892:
+.L2904:
 	str	r3, [sp, #16]
 	ldr	r2, [sp, #8]
 	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L2850
+	bhi	.L2862
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
 	str	r3, [sp, #20]
-	b	.L2843
-.L2850:
+	b	.L2855
+.L2862:
 	ldr	r3, [sp, #16]
 	movs	r7, #36
 	muls	r7, r3, r7
@@ -20454,23 +20479,23 @@ rk_ftl_garbage_collect:
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2847
+	beq	.L2859
 	ldr	r8, [r2, #12]
 	movw	r3, #61589
 	ldrh	r2, [r8]
 	cmp	r2, r3
-	bne	.L2847
+	bne	.L2859
 	ldr	r10, [r8, #8]
 	cmp	r10, #-1
-	bne	.L2848
-	ldr	r1, .L2897+8
-	mov	r2, #892
-	ldr	r0, .L2897+12
+	bne	.L2860
+	ldr	r1, .L2909+8
+	movw	r2, #898
+	ldr	r0, .L2909+12
 	bl	printf
-	ldr	r1, .L2897+16
-	ldr	r0, .L2897+20
+	ldr	r1, .L2909+16
+	ldr	r0, .L2909+20
 	bl	printf
-.L2848:
+.L2860:
 	movs	r2, #0
 	add	r1, sp, #36
 	mov	r0, r10
@@ -20481,10 +20506,10 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2847
-	ldr	r2, .L2897+32
-	ldr	r1, .L2897+60
-	ldr	r10, .L2897+68
+	bne	.L2859
+	ldr	r2, .L2909+32
+	ldr	r1, .L2909+60
+	ldr	r10, .L2909+68
 	ldrh	r3, [r2]
 	str	r1, [sp, #28]
 	adds	r3, r3, #1
@@ -20506,7 +20531,7 @@ rk_ftl_garbage_collect:
 	ldr	r0, [fp]
 	mla	r2, r1, r3, r2
 	add	r0, r0, r7
-	ldr	r7, .L2897+28
+	ldr	r7, .L2909+28
 	ldr	r1, [r0, #8]
 	adds	r3, r3, #1
 	str	r1, [r2, #8]
@@ -20517,62 +20542,62 @@ rk_ftl_garbage_collect:
 	str	r2, [r8, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2897+64
+	ldr	r2, .L2909+64
 	str	r3, [r10]
 	ldr	r2, [r2]
 	str	r2, [r8, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2897
+	ldr	r3, .L2909
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2849
+	cbnz	r3, .L2861
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L2849
+	beq	.L2861
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2847
-.L2849:
+	cbnz	r3, .L2859
+.L2861:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2847
-.L2894:
-	ldr	r3, .L2897+40
+	cbz	r0, .L2859
+.L2906:
+	ldr	r3, .L2909+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L2893
-.L2847:
+	b	.L2905
+.L2859:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L2892
-.L2851:
+	b	.L2904
+.L2863:
 	ldrh	r3, [r5, #2]
 	add	r4, r4, r3
 	ldr	r3, [sp, #12]
 	uxth	r4, r4
 	cmp	r3, r4
 	strh	r4, [r5, #2]	@ movhi
-	bhi	.L2853
-	ldr	r3, .L2897+68
+	bhi	.L2865
+	ldr	r3, .L2909+68
 	ldr	r3, [r3]
-	cbz	r3, .L2854
+	cbz	r3, .L2866
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L2894
-.L2854:
-	ldr	r3, .L2897+32
+	bne	.L2906
+.L2866:
+	ldr	r3, .L2909+32
 	ldrh	r4, [r3]
-	cbnz	r4, .L2855
-	ldr	r7, .L2897+72
+	cbnz	r4, .L2867
+	ldr	r7, .L2909+72
 	ldrh	r1, [r5]
 	ldr	r3, [r7]
 	ldrh	r3, [r3, r1, lsl #1]
-	cbz	r3, .L2855
-	ldr	r0, .L2897+36
+	cbz	r3, .L2867
+	ldr	r0, .L2909+36
 	ldrh	r2, [r5, #2]
 	ldrh	r0, [r0]
 	str	r3, [sp]
 	mov	r3, r4
 	str	r0, [sp, #4]
-	ldr	r0, .L2897+76
+	ldr	r0, .L2909+76
 	bl	printf
 	ldrh	r2, [r5]
 	ldr	r3, [r7]
@@ -20582,26 +20607,26 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2855:
+.L2867:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2853:
-	ldr	r3, .L2897+80
+.L2865:
+	ldr	r3, .L2909+80
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L2856
-	ldr	r3, .L2897+44
+	bhi	.L2868
+	ldr	r3, .L2909+44
 	ldrh	r4, [r3]
-	b	.L2827
-.L2856:
-	ldr	r3, .L2897+40
+	b	.L2839
+.L2868:
+	ldr	r3, .L2909+40
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3]
-	b	.L2805
-.L2898:
+	b	.L2817
+.L2910:
 	.align	2
-.L2897:
+.L2909:
 	.word	.LANCHOR8
 	.word	.LANCHOR92
 	.word	.LANCHOR243
@@ -20621,15 +20646,15 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR160
 	.word	.LANCHOR103
 	.word	.LANCHOR84
-	.word	.LC66
+	.word	.LC65
 	.word	.LANCHOR89
 	.word	.LANCHOR107
-.L2857:
+.L2869:
 	movs	r0, #0
-	b	.L2805
-.L2859:
+	b	.L2817
+.L2871:
 	mov	r0, r3
-	b	.L2805
+	b	.L2817
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -20644,67 +20669,67 @@ FtlInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r4, .L2908
+	ldr	r4, .L2920
 	mov	r5, r0
-	ldr	r2, .L2908+4
+	ldr	r2, .L2920+4
 	str	r3, [r4]
 	movs	r3, #0
-	ldr	r1, .L2908+8
+	ldr	r1, .L2920+8
 	str	r3, [r2]
-	ldr	r2, .L2908+12
-	ldr	r0, .L2908+16
+	ldr	r2, .L2920+12
+	ldr	r0, .L2920+16
 	str	r3, [r2]
 	bl	printf
 	mov	r0, r5
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L2908+20
+	ldr	r3, .L2920+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2900
-	ldr	r1, .L2908+24
-	ldr	r0, .L2908+28
-.L2907:
+	cbz	r0, .L2912
+	ldr	r1, .L2920+24
+	ldr	r0, .L2920+28
+.L2919:
 	bl	printf
-.L2901:
+.L2913:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2900:
+.L2912:
 	bl	FtlSysBlkInit
-	cbz	r0, .L2902
-	ldr	r1, .L2908+24
-	ldr	r0, .L2908+32
-	b	.L2907
-.L2902:
+	cbz	r0, .L2914
+	ldr	r1, .L2920+24
+	ldr	r0, .L2920+32
+	b	.L2919
+.L2914:
 	movs	r1, #1
 	str	r1, [r4]
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L2908+36
+	ldr	r3, .L2920+36
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L2901
+	bhi	.L2913
 	mov	r4, #1024
-.L2904:
+.L2916:
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L2904
-	b	.L2901
-.L2909:
+	bne	.L2916
+	b	.L2913
+.L2921:
 	.align	2
-.L2908:
+.L2920:
 	.word	.LANCHOR231
 	.word	.LANCHOR244
-	.word	.LC67
+	.word	.LC66
 	.word	.LANCHOR77
 	.word	.LC7
 	.word	.LANCHOR39
 	.word	.LANCHOR245
+	.word	.LC67
 	.word	.LC68
-	.word	.LC69
 	.word	.LANCHOR89
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
@@ -20721,21 +20746,21 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2911
-	ldr	r0, .L2912
+	cbnz	r0, .L2923
+	ldr	r0, .L2924
 	bl	FtlInit
-.L2911:
+.L2923:
 	bl	idb_init
 	mov	r1, r4
-	ldr	r0, .L2912+4
+	ldr	r0, .L2924+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2913:
+.L2925:
 	.align	2
-.L2912:
+.L2924:
 	.word	.LANCHOR15
-	.word	.LC70
+	.word	.LC69
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -20748,71 +20773,71 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2928
+	ldr	r3, .L2940
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #56
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2914
-	ldr	r7, .L2928+4
-	ldr	r6, .L2928+8
-	ldr	r10, .L2928+32
+	beq	.L2926
+	ldr	r7, .L2940+4
+	ldr	r6, .L2940+8
+	ldr	r10, .L2940+32
 	ldrh	r5, [r7]
 	ldr	r3, [r6]
-	ldr	r4, .L2928+12
+	ldr	r4, .L2940+12
 	mov	r1, r5
-	ldr	r0, .L2928+16
+	ldr	r0, .L2940+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
 	ldrh	r0, [r10]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	ldrh	r0, [r4]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	mov	r0, r10
 	bl	allocate_new_data_superblock
 	mov	r0, r4
 	movw	r4, #4097
 	bl	allocate_new_data_superblock
 	str	r7, [sp, #4]
-.L2916:
+.L2928:
 	subs	r4, r4, #1
-	beq	.L2920
+	beq	.L2932
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L2916
-.L2920:
+	bne	.L2928
+.L2932:
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2928+16
+	ldr	r0, .L2940+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2918
+	cbnz	r4, .L2930
 	add	r0, sp, #56
-	ldr	r7, .L2928+20
+	ldr	r7, .L2940+20
 	strh	r5, [r0, #-48]!	@ movhi
 	movw	r10, #65535
 	bl	make_superblock
-	ldr	r3, .L2928+24
+	ldr	r3, .L2940+24
 	add	r0, sp, #22
 	ldr	r8, [r7]
 	mov	r2, r4
 	mov	fp, #36
 	mov	ip, r4
 	ldrh	lr, [r3]
-.L2921:
+.L2933:
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2923
+	bhi	.L2935
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2928+28
+	ldr	r0, .L2940+28
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
 	mov	r2, r4
@@ -20823,18 +20848,18 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L2918:
+.L2930:
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L2914:
+.L2926:
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2923:
+.L2935:
 	ldrh	r3, [r0, #2]!
 	cmp	r3, r10
-	beq	.L2922
+	beq	.L2934
 	mla	r1, fp, r4, r8
 	adds	r4, r4, #1
 	lsls	r3, r3, #10
@@ -20842,20 +20867,20 @@ ftl_fix_nand_power_lost_error:
 	str	r3, [r1, #4]
 	str	ip, [r1, #8]
 	str	ip, [r1, #12]
-.L2922:
+.L2934:
 	adds	r2, r2, #1
-	b	.L2921
-.L2929:
+	b	.L2933
+.L2941:
 	.align	2
-.L2928:
+.L2940:
 	.word	.LANCHOR8
 	.word	.LANCHOR235
 	.word	.LANCHOR84
 	.word	.LANCHOR93
-	.word	.LC71
+	.word	.LC70
 	.word	.LANCHOR78
 	.word	.LANCHOR38
-	.word	.LC72
+	.word	.LC71
 	.word	.LANCHOR92
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
@@ -20875,34 +20900,34 @@ ftl_read:
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #52]
-	bne	.L2931
+	bne	.L2943
 	mov	r2, r3
 	ldr	r1, [sp, #52]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #32]
-.L2930:
+.L2942:
 	ldr	r0, [sp, #32]
 	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2931:
+.L2943:
 	ldr	r3, [sp, #52]
 	adds	r3, r1, r3
 	str	r3, [sp, #36]
-	ldr	r3, .L2969
+	ldr	r3, .L2981
 	ldr	r2, [sp, #36]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2954
-	ldr	r3, .L2969+4
+	bhi	.L2966
+	ldr	r3, .L2981+4
 	ldr	r3, [r3]
 	adds	r4, r3, #1
-	beq	.L2955
+	beq	.L2967
 	bl	FtlCacheWriteBack
-	ldr	r3, .L2969+8
+	ldr	r3, .L2981+8
 	mov	r0, r6
-	ldr	r10, .L2969+52
+	ldr	r10, .L2981+52
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -20912,7 +20937,7 @@ ftl_read:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #40]
-	ldr	r2, .L2969+12
+	ldr	r2, .L2981+12
 	ldr	r4, [sp, #40]
 	rsb	r3, r3, #1
 	str	r0, [sp, #44]
@@ -20927,44 +20952,44 @@ ftl_read:
 	str	r3, [sp, #24]
 	str	r3, [sp, #48]
 	str	r3, [sp, #32]
-.L2933:
+.L2945:
 	ldr	r3, [sp, #28]
-	cbnz	r3, .L2953
-	ldr	r3, .L2969+16
+	cbnz	r3, .L2965
+	ldr	r3, .L2981+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2930
+	beq	.L2942
 	movs	r1, #1
 	ldr	r0, [sp, #28]
 	bl	rk_ftl_garbage_collect
-	b	.L2930
-.L2953:
+	b	.L2942
+.L2965:
 	movs	r2, #0
 	add	r1, sp, #84
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #84]
 	adds	r0, r3, #1
-	bne	.L2934
-	ldr	fp, .L2969+8
+	bne	.L2946
+	ldr	fp, .L2981+8
 	mov	r8, #0
-.L2935:
+.L2947:
 	ldrh	r0, [fp]
 	cmp	r8, r0
-	bcc	.L2937
-.L2938:
+	bcc	.L2949
+.L2950:
 	ldr	r3, [sp, #28]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	beq	.L2942
-	ldr	r3, .L2969+20
+	beq	.L2954
+	ldr	r3, .L2981+20
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L2933
-.L2942:
+	bne	.L2945
+.L2954:
 	cmp	r5, #0
-	beq	.L2933
+	beq	.L2945
 	movs	r2, #0
 	mov	r1, r5
 	ldr	r0, [r10]
@@ -20979,7 +21004,7 @@ ftl_read:
 	ldr	r3, [sp, #48]
 	lsls	r3, r3, #9
 	str	r3, [sp, #64]
-.L2952:
+.L2964:
 	mov	r8, #36
 	ldr	r3, [r10]
 	mul	r8, r8, fp
@@ -20987,27 +21012,27 @@ ftl_read:
 	add	r3, r3, r8
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L2944
+	bne	.L2956
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2969+24
+	ldr	r3, .L2981+24
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2945
+	bne	.L2957
 	ldr	r3, [sp, #60]
 	mov	r0, r7
 	ldr	r2, [sp, #64]
 	add	r1, r1, r3
-.L2968:
+.L2980:
 	bl	ftl_memcpy
-.L2945:
+.L2957:
 	ldr	r2, [r10]
 	add	r2, r2, r8
 	ldr	r3, [r2, #12]
 	ldr	lr, [r2, #16]
 	ldr	r0, [r3, #8]
 	cmp	lr, r0
-	beq	.L2946
-	ldr	ip, .L2969+32
+	beq	.L2958
+	ldr	ip, .L2981+32
 	ldr	r0, [ip, #72]
 	adds	r0, r0, #1
 	str	r0, [ip, #72]
@@ -21023,52 +21048,52 @@ ftl_read:
 	str	r0, [sp, #4]
 	ldr	r0, [r3, #4]
 	str	r0, [sp]
-	ldr	r0, .L2969+28
+	ldr	r0, .L2981+28
 	ldr	r3, [r3]
 	ldr	r2, [r2, #4]
 	bl	printf
-.L2946:
+.L2958:
 	ldr	r3, [r10]
 	add	r2, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r1, r3, #1
-	bne	.L2947
-	ldr	r1, .L2969+32
+	bne	.L2959
+	ldr	r1, .L2981+32
 	str	r3, [sp, #32]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L2948:
+.L2960:
 	add	fp, fp, #1
 	cmp	r5, fp
-	bne	.L2952
+	bne	.L2964
 	movs	r5, #0
-	b	.L2933
-.L2937:
+	b	.L2945
+.L2949:
 	mla	r0, r0, r4, r8
 	cmp	r6, r0
-	bhi	.L2936
+	bhi	.L2948
 	ldr	r3, [sp, #36]
 	cmp	r3, r0
-	bls	.L2936
+	bls	.L2948
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L2936:
+.L2948:
 	add	r8, r8, #1
-	b	.L2935
-.L2934:
+	b	.L2947
+.L2946:
 	ldr	r2, [r10]
 	mov	r8, #36
 	mla	r8, r8, r5, r2
 	str	r3, [r8, #4]
 	ldr	r3, [sp, #40]
 	cmp	r4, r3
-	ldr	r3, .L2969+8
-	bne	.L2939
-	ldr	r2, .L2969+24
+	ldr	r3, .L2981+8
+	bne	.L2951
+	ldr	r2, .L2981+24
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
@@ -21083,11 +21108,11 @@ ftl_read:
 	movcs	r3, r2
 	cmp	fp, r3
 	str	r3, [sp, #48]
-	bne	.L2940
+	bne	.L2952
 	str	r7, [r8, #8]
-.L2940:
-	ldr	r3, .L2969+36
-	ldr	r2, .L2969+40
+.L2952:
+	ldr	r3, .L2981+36
+	ldr	r2, .L2981+40
 	str	r4, [r8, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -21096,12 +21121,12 @@ ftl_read:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r8, #12]
-	b	.L2938
-.L2939:
+	b	.L2950
+.L2951:
 	ldr	r2, [sp, #44]
 	cmp	r4, r2
-	bne	.L2941
-	ldr	r2, .L2969+44
+	bne	.L2953
+	ldr	r2, .L2981+44
 	ldr	r1, [sp, #36]
 	ldr	r2, [r2]
 	str	r2, [r8, #8]
@@ -21110,50 +21135,50 @@ ftl_read:
 	subs	r1, r1, r3
 	cmp	r2, r1
 	str	r1, [sp, #24]
-	bne	.L2940
-.L2967:
+	bne	.L2952
+.L2979:
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
 	str	r3, [r8, #8]
-	b	.L2940
-.L2941:
+	b	.L2952
+.L2953:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L2967
-.L2944:
+	b	.L2979
+.L2956:
 	ldr	r1, [sp, #44]
 	cmp	r1, r2
-	bne	.L2945
+	bne	.L2957
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2969+44
+	ldr	r3, .L2981+44
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2945
-	ldr	r3, .L2969+8
+	bne	.L2957
+	ldr	r3, .L2981+8
 	ldr	r2, [sp, #68]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L2968
-.L2947:
+	b	.L2980
+.L2959:
 	cmp	r3, #256
-	bne	.L2948
+	bne	.L2960
 	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	mov	r8, r0
 	bl	FtlGcRefreshBlock
-	ldr	r2, .L2969+48
+	ldr	r2, .L2981+48
 	movw	r3, #2049
-.L2950:
+.L2962:
 	subs	r3, r3, #1
-	bne	.L2949
-.L2951:
+	bne	.L2961
+.L2963:
 	bl	FtlSysFlush
-	b	.L2948
-.L2949:
+	b	.L2960
+.L2961:
 	movs	r1, #1
 	str	r2, [sp, #76]
 	mov	r0, r1
@@ -21163,16 +21188,16 @@ ftl_read:
 	ldr	r3, [sp, #72]
 	ldrh	r1, [r2]
 	cmp	r1, r8
-	beq	.L2950
-	b	.L2951
-.L2954:
+	beq	.L2962
+	b	.L2963
+.L2966:
 	mov	r3, #-1
-.L2955:
+.L2967:
 	str	r3, [sp, #32]
-	b	.L2930
-.L2970:
+	b	.L2942
+.L2982:
 	.align	2
-.L2969:
+.L2981:
 	.word	.LANCHOR69
 	.word	.LANCHOR231
 	.word	.LANCHOR56
@@ -21180,7 +21205,7 @@ ftl_read:
 	.word	.LANCHOR117
 	.word	.LANCHOR38
 	.word	.LANCHOR186
-	.word	.LC61
+	.word	.LC60
 	.word	.LANCHOR138
 	.word	.LANCHOR59
 	.word	.LANCHOR189
@@ -21201,39 +21226,39 @@ FtlWrite:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r10, r3
-	ldr	r3, .L3019
+	ldr	r3, .L3031
 	sub	sp, sp, #80
 	mov	r6, r1
 	str	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L3004
+	bne	.L3016
 	cmp	r0, #16
-	bne	.L2973
+	bne	.L2985
 	mov	r2, r10
 	ldr	r1, [sp, #12]
 	add	r0, r6, #256
 	bl	FtlVendorPartWrite
-.L2971:
+.L2983:
 	add	sp, sp, #80
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2973:
+.L2985:
 	ldr	r3, [sp, #12]
 	adds	r5, r1, r3
-	ldr	r3, .L3019+4
+	ldr	r3, .L3031+4
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L3005
-	ldr	r3, .L3019+8
+	bhi	.L3017
+	ldr	r3, .L3031+8
 	ldr	r0, [r3]
 	adds	r4, r0, #1
-	beq	.L2971
-	ldr	r3, .L3019+12
+	beq	.L2983
+	ldr	r3, .L3031+12
 	mov	r2, #2048
 	mov	r0, r6
 	str	r2, [r3]
-	ldr	r3, .L3019+16
+	ldr	r3, .L3031+16
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -21241,7 +21266,7 @@ FtlWrite:
 	mov	r8, r0
 	subs	r0, r5, #1
 	bl	__aeabi_uidiv
-	ldr	r2, .L3019+20
+	ldr	r2, .L3031+20
 	sub	r5, r0, r8
 	adds	r3, r5, #1
 	adds	r1, r5, #1
@@ -21250,29 +21275,29 @@ FtlWrite:
 	str	r0, [sp, #16]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L3019+24
+	ldr	r3, .L3031+24
 	ldr	fp, [r3]
 	cmp	fp, #0
-	beq	.L2975
+	beq	.L2987
 	ldr	r3, [fp, #16]
 	cmp	r8, r3
-	beq	.L2976
+	beq	.L2988
 	bl	FtlCacheWriteBack
-.L2975:
-	ldr	r7, .L3019+28
+.L2987:
+	ldr	r7, .L3031+28
 	mov	r4, r8
-.L2977:
+.L2989:
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L3003
+	cbnz	r3, .L3015
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #4]
 	sub	r1, r3, r8
 	bl	rk_ftl_garbage_collect
-.L3004:
+.L3016:
 	movs	r0, #0
-	b	.L2971
-.L2976:
-	ldr	r2, .L3019+32
+	b	.L2983
+.L2988:
+	ldr	r2, .L3031+32
 	mov	r1, r4
 	mov	r0, r6
 	ldr	r3, [r2]
@@ -21292,7 +21317,7 @@ FtlWrite:
 	mov	r2, r7
 	bl	ftl_memcpy
 	cmp	r5, #0
-	beq	.L3004
+	beq	.L3016
 	ldr	r3, [sp, #12]
 	add	r6, r6, r4
 	add	r10, r10, r7
@@ -21301,27 +21326,27 @@ FtlWrite:
 	str	r3, [sp, #12]
 	bl	FtlCacheWriteBack
 	str	r5, [sp, #4]
-	b	.L2975
-.L3003:
-	ldr	r5, .L3019+36
+	b	.L2987
+.L3015:
+	ldr	r5, .L3031+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2978
-	ldr	r1, .L3019+40
+	bcc	.L2990
+	ldr	r1, .L3031+40
 	movw	r2, #1668
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L2978:
+.L2990:
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2979
+	cbnz	r3, .L2991
 	bl	FtlCacheWriteBack
 	mov	r0, r7
 	bl	allocate_new_data_superblock
-.L2979:
+.L2991:
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7, #4]
 	lsls	r3, r3, #2
@@ -21336,24 +21361,24 @@ FtlWrite:
 	str	r3, [sp, #36]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bcc	.L2980
-	ldr	r1, .L3019+40
+	bcc	.L2992
+	ldr	r1, .L3031+40
 	movw	r2, #1701
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L2980:
+.L2992:
 	movs	r3, #0
-.L3018:
+.L3030:
 	str	r3, [sp, #8]
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #36]
 	cmp	r3, r2
-	bne	.L3001
-.L2982:
-	ldr	r0, .L3019+56
+	bne	.L3013
+.L2994:
+	ldr	r0, .L3031+56
 	mov	r3, r7
 	movs	r2, #0
 	ldr	r1, [sp, #8]
@@ -21362,24 +21387,24 @@ FtlWrite:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	cmp	r3, r2
-	bcs	.L3002
-	ldr	r1, .L3019+40
+	bcs	.L3014
+	ldr	r1, .L3031+40
 	movw	r2, #1790
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L3002:
+.L3014:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
 	subs	r3, r3, r2
 	str	r3, [sp, #4]
-	b	.L2977
-.L3001:
+	b	.L2989
+.L3013:
 	ldrh	r3, [r7, #4]
 	cmp	r3, #0
-	beq	.L2982
+	beq	.L2994
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
@@ -21388,9 +21413,9 @@ FtlWrite:
 	mov	r0, r7
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #8]
-	ldr	r2, .L3019+60
+	ldr	r2, .L3031+60
 	muls	r5, r3, r5
-	ldr	r3, .L3019+56
+	ldr	r3, .L3031+56
 	ldrh	r2, [r2]
 	ldr	r1, [r3]
 	str	r3, [sp, #20]
@@ -21400,7 +21425,7 @@ FtlWrite:
 	str	r4, [r1, #16]
 	mul	r0, r2, r3
 	bic	r3, r0, #3
-	ldr	r0, .L3019+64
+	ldr	r0, .L3031+64
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -21411,12 +21436,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	cmp	r4, r8
-	ldr	r1, .L3019+16
-	beq	.L2983
+	ldr	r1, .L3031+16
+	beq	.L2995
 	ldr	r3, [sp, #16]
 	cmp	r3, r4
 	ldr	r3, [sp, #20]
-	bne	.L3014
+	bne	.L3026
 	ldr	r3, [sp, #12]
 	adds	r2, r6, r3
 	ldrh	r3, [r1]
@@ -21427,8 +21452,8 @@ FtlWrite:
 	str	r3, [sp, #20]
 	movs	r3, #0
 	str	r3, [sp, #24]
-	b	.L2986
-.L2983:
+	b	.L2998
+.L2995:
 	ldrh	r2, [r1]
 	mov	r0, r6
 	mov	r1, r2
@@ -21443,14 +21468,14 @@ FtlWrite:
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #20]
-.L2986:
-	ldr	r3, .L3019+16
+.L2998:
+	ldr	r3, .L3031+16
 	ldr	r2, [sp, #20]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	ldr	r3, .L3019+56
+	ldr	r3, .L3031+56
 	ldr	r3, [r3]
-	bne	.L2987
+	bne	.L2999
 	cmp	r4, r8
 	add	r5, r5, r3
 	itett	ne
@@ -21461,25 +21486,25 @@ FtlWrite:
 	itt	ne
 	addne	r2, r10, r2, lsl #9
 	strne	r2, [r5, #8]
-.L2989:
-	ldr	r3, .L3019+36
+.L3001:
+	ldr	r3, .L3031+36
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2998
-	ldr	r1, .L3019+40
+	bcc	.L3010
+	ldr	r1, .L3031+40
 	movw	r2, #1775
-	ldr	r0, .L3019+44
+	ldr	r0, .L3031+44
 	bl	printf
-	ldr	r1, .L3019+48
-	ldr	r0, .L3019+52
+	ldr	r1, .L3031+48
+	ldr	r0, .L3031+52
 	bl	printf
-.L2998:
+.L3010:
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L3019+68
+	ldr	r2, .L3031+68
 	str	r4, [fp, #8]
 	adds	r4, r4, #1
 	ldr	r3, [r2]
@@ -21495,10 +21520,10 @@ FtlWrite:
 	strh	r3, [fp, #2]	@ movhi
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	b	.L3018
-.L3020:
+	b	.L3030
+.L3032:
 	.align	2
-.L3019:
+.L3031:
 	.word	.LANCHOR77
 	.word	.LANCHOR69
 	.word	.LANCHOR231
@@ -21517,18 +21542,18 @@ FtlWrite:
 	.word	.LANCHOR59
 	.word	.LANCHOR189
 	.word	.LANCHOR160
-.L2987:
+.L2999:
 	cmp	r4, r8
 	add	r3, r3, r5
 	ite	eq
-	ldreq	r2, .L3021
-	ldrne	r2, .L3021+4
+	ldreq	r2, .L3033
+	ldrne	r2, .L3033+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
 	ldr	r2, [sp, #40]
-	ldr	r3, .L3021+8
+	ldr	r3, .L3033+8
 	adds	r0, r2, #1
-	beq	.L2992
+	beq	.L3004
 	ldr	r3, [r3]
 	movs	r1, #1
 	str	r2, [sp, #48]
@@ -21543,60 +21568,60 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2993
-	ldr	r2, .L3021+12
+	bne	.L3005
+	ldr	r2, .L3033+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L2996:
+.L3008:
 	ldr	r2, [sp, #20]
 	cmp	r4, r8
-	ldr	r3, .L3021+8
+	ldr	r3, .L3033+8
 	lsl	r2, r2, #9
-	bne	.L2997
+	bne	.L3009
 	ldr	r3, [r3]
 	mov	r1, r10
 	add	r5, r5, r3
 	ldr	r3, [sp, #24]
 	ldr	r0, [r5, #8]
 	add	r0, r0, r3, lsl #9
-.L3016:
+.L3028:
 	bl	ftl_memcpy
-	b	.L2989
-.L2993:
+	b	.L3001
+.L3005:
 	ldr	r1, [fp, #8]
 	cmp	r4, r1
-	beq	.L2995
-	ldr	r2, .L3021+12
-	ldr	r0, .L3021+16
+	beq	.L3007
+	ldr	r2, .L3033+12
+	ldr	r0, .L3033+16
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
 	mov	r2, r4
 	bl	printf
-.L2995:
+.L3007:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L2996
+	beq	.L3008
 	movw	r2, #1754
-	ldr	r1, .L3021+20
-	ldr	r0, .L3021+24
+	ldr	r1, .L3033+20
+	ldr	r0, .L3033+24
 	bl	printf
-	ldr	r1, .L3021+28
-	ldr	r0, .L3021+32
+	ldr	r1, .L3033+28
+	ldr	r0, .L3033+32
 	bl	printf
-	b	.L2996
-.L2992:
+	b	.L3008
+.L3004:
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L3021+36
+	ldr	r2, .L3033+36
 	add	r3, r3, r5
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L2996
-.L2997:
-	ldr	r1, .L3021+40
+	b	.L3008
+.L3009:
+	ldr	r1, .L3033+40
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
 	add	r5, r5, r3
@@ -21604,8 +21629,8 @@ FtlWrite:
 	muls	r1, r4, r1
 	subs	r1, r1, r6
 	add	r1, r10, r1, lsl #9
-	b	.L3016
-.L3014:
+	b	.L3028
+.L3026:
 	ldr	r3, [r3]
 	add	r5, r5, r3
 	ldrh	r3, [r1]
@@ -21613,18 +21638,18 @@ FtlWrite:
 	subs	r3, r3, r6
 	add	r3, r10, r3, lsl #9
 	str	r3, [r5, #8]
-	b	.L2989
-.L3005:
+	b	.L3001
+.L3017:
 	mov	r0, #-1
-	b	.L2971
-.L3022:
+	b	.L2983
+.L3034:
 	.align	2
-.L3021:
+.L3033:
 	.word	.LANCHOR186
 	.word	.LANCHOR187
 	.word	.LANCHOR182
 	.word	.LANCHOR138
-	.word	.LC73
+	.word	.LC72
 	.word	.LANCHOR247
 	.word	.LC5
 	.word	.LC6
@@ -21632,6 +21657,42 @@ FtlWrite:
 	.word	.LANCHOR58
 	.word	.LANCHOR56
 	.size	FtlWrite, .-FtlWrite
+	.section	.text.ftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	ftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	mov	r1, r0
+	movs	r0, #16
+	b	FtlWrite
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.ftl_sys_write,"ax",%progbits
+	.align	1
+	.global	ftl_sys_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sys_write, %function
+ftl_sys_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r2, r1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	ftl_sys_write, .-ftl_sys_write
 	.section	.text.StorageSysDataStore,"ax",%progbits
 	.align	1
 	.global	StorageSysDataStore
@@ -21684,11 +21745,11 @@ ftl_write:
 	mov	r4, r2
 	mov	r5, r3
 	mov	r6, r0
-	cbnz	r0, .L3026
+	cbnz	r0, .L3040
 	mov	r3, r2
 	mov	r2, r5
 	bl	idb_write_data
-.L3026:
+.L3040:
 	mov	r3, r5
 	mov	r2, r4
 	mov	r1, r7
@@ -21709,69 +21770,69 @@ FtlCheckVpc:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L3051
-	ldr	r5, .L3051+4
-	ldr	r1, .L3051+8
-	ldr	r0, .L3051+12
+	ldr	r6, .L3065
+	ldr	r5, .L3065+4
+	ldr	r1, .L3065+8
+	ldr	r0, .L3065+12
 	bl	printf
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L3051+4
+	ldr	r0, .L3065+4
 	bl	memset
-.L3028:
+.L3042:
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L3030
-	ldr	r7, .L3051+16
+	bcc	.L3044
+	ldr	r7, .L3065+16
 	movs	r4, #0
-	ldr	r5, .L3051+20
+	ldr	r5, .L3065+20
 	movs	r2, #2
-	ldr	r10, .L3051+4
+	ldr	r10, .L3065+4
 	mov	r6, r4
-	ldr	fp, .L3051+60
+	ldr	fp, .L3065+60
 	mov	r8, r7
 	ldrh	r3, [r7]
 	ldr	r1, [r5]
-	ldr	r0, .L3051+24
+	ldr	r0, .L3065+24
 	bl	rknand_print_hex
 	ldrh	r3, [r7]
 	movs	r2, #2
-	ldr	r1, .L3051+4
-	ldr	r0, .L3051+28
+	ldr	r1, .L3065+4
+	ldr	r0, .L3065+28
 	bl	rknand_print_hex
-.L3031:
+.L3045:
 	ldrh	r2, [r8]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L3033
-	ldr	r3, .L3051+32
+	bhi	.L3047
+	ldr	r3, .L3065+32
 	ldr	r4, [r3]
-	cbz	r4, .L3034
-	ldr	r3, .L3051+36
+	cbz	r4, .L3048
+	ldr	r3, .L3065+36
 	mov	r8, #0
-	ldr	r7, .L3051+40
-	ldr	fp, .L3051+64
+	ldr	r7, .L3065+40
+	ldr	fp, .L3065+64
 	ldrh	r10, [r3]
 	ldr	r3, [r7]
 	subs	r4, r4, r3
-	ldr	r3, .L3051+44
+	ldr	r3, .L3065+44
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.L3035:
+.L3049:
 	uxth	r3, r8
 	cmp	r10, r3
-	bls	.L3034
+	bls	.L3048
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L3036
-	ldr	r3, .L3051+4
+	cbz	r2, .L3050
+	ldr	r3, .L3065+4
 	movs	r6, #1
 	mov	r1, r4
 	mov	r0, fp
 	ldrh	r3, [r3, r4, lsl #1]
 	bl	printf
-.L3036:
+.L3050:
 	movs	r3, #6
 	ldr	r2, [r7]
 	muls	r4, r3, r4
@@ -21779,43 +21840,43 @@ FtlCheckVpc:
 	add	r8, r8, #1
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L3035
-.L3034:
-	cbz	r6, .L3027
-	ldr	r1, .L3051+8
-	mov	r2, #1680
-	ldr	r0, .L3051+48
+	bne	.L3049
+.L3048:
+	cbz	r6, .L3041
+	ldr	r1, .L3065+8
+	movw	r2, #1669
+	ldr	r0, .L3065+48
 	bl	printf
-	ldr	r1, .L3051+52
-	ldr	r0, .L3051+56
+	ldr	r1, .L3065+52
+	ldr	r0, .L3065+56
 	bl	printf
-.L3027:
+.L3041:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3030:
+.L3044:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L3029
+	beq	.L3043
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L3029:
+.L3043:
 	adds	r4, r4, #1
-	b	.L3028
-.L3033:
+	b	.L3042
+.L3047:
 	ldr	r3, [r5]
 	uxth	r7, r4
 	ldrh	r2, [r3, r7, lsl #1]
 	ldrh	r3, [r10, r7, lsl #1]
 	cmp	r2, r3
-	beq	.L3032
+	beq	.L3046
 	mov	r1, r7
 	mov	r0, fp
 	bl	printf
@@ -21823,25 +21884,25 @@ FtlCheckVpc:
 	movw	r2, #65535
 	ldrh	r3, [r3, r7, lsl #1]
 	cmp	r3, r2
-	beq	.L3032
+	beq	.L3046
 	ldrh	r2, [r10, r7, lsl #1]
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.L3032:
+.L3046:
 	adds	r4, r4, #1
-	b	.L3031
-.L3052:
+	b	.L3045
+.L3066:
 	.align	2
-.L3051:
+.L3065:
 	.word	.LANCHOR73
 	.word	check_valid_page_count_table
 	.word	.LANCHOR248
-	.word	.LC46
+	.word	.LC45
 	.word	.LANCHOR40
 	.word	.LANCHOR84
+	.word	.LC73
 	.word	.LC74
-	.word	.LC75
 	.word	.LANCHOR88
 	.word	.LANCHOR89
 	.word	.LANCHOR82
@@ -21849,8 +21910,8 @@ FtlCheckVpc:
 	.word	.LC5
 	.word	.LC6
 	.word	.LC7
+	.word	.LC75
 	.word	.LC76
-	.word	.LC77
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",%progbits
 	.align	1
@@ -21865,27 +21926,27 @@ FtlDumpSysBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	lsl	r10, r0, #10
-	ldr	r5, .L3060
+	ldr	r5, .L3074
 	sub	sp, sp, #24
 	mov	r7, r0
 	movs	r6, #0
-	ldr	r4, .L3060+4
+	ldr	r4, .L3074+4
 	ldr	r3, [r5]
-	ldr	r8, .L3060+20
+	ldr	r8, .L3074+20
 	mov	fp, r4
 	str	r3, [r4, #8]
-	ldr	r3, .L3060+8
+	ldr	r3, .L3074+8
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
-.L3054:
+.L3068:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	cmp	r3, r2
-	blt	.L3056
+	blt	.L3070
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L3056:
+.L3070:
 	movs	r2, #1
 	orr	r3, r3, r10
 	mov	r1, r2
@@ -21895,7 +21956,7 @@ FtlDumpSysBlock:
 	ldr	r2, [r4, #8]
 	mov	r1, r7
 	ldr	r3, [r4, #12]
-	ldr	r0, .L3060+12
+	ldr	r0, .L3074+12
 	ldr	r2, [r2]
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
@@ -21911,23 +21972,23 @@ FtlDumpSysBlock:
 	ldr	r3, [r4, #12]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L3055
+	beq	.L3069
 	mov	r3, #768
 	movs	r2, #4
 	ldr	r1, [r5]
-	ldr	r0, .L3060+16
+	ldr	r0, .L3074+16
 	bl	rknand_print_hex
-.L3055:
+.L3069:
 	adds	r6, r6, #1
-	b	.L3054
-.L3061:
+	b	.L3068
+.L3075:
 	.align	2
-.L3060:
+.L3074:
 	.word	.LANCHOR183
 	.word	.LANCHOR202
 	.word	.LANCHOR188
+	.word	.LC77
 	.word	.LC78
-	.word	.LC79
 	.word	.LANCHOR54
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",%progbits
@@ -21941,32 +22002,32 @@ FtlDumpSysBlock:
 dump_map_info:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L3076
+	ldr	r3, .L3090
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	ldr	r8, .L3076+72
+	ldr	r8, .L3090+72
 	ldrh	r5, [r3]
-.L3063:
-	ldr	r3, .L3076+4
+.L3077:
+	ldr	r3, .L3090+4
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bhi	.L3070
-	ldr	r4, .L3076+8
+	bhi	.L3084
+	ldr	r4, .L3090+8
 	movs	r7, #0
-.L3071:
-	ldr	r3, .L3076+12
+.L3085:
+	ldr	r3, .L3090+12
 	sxth	r5, r7
 	ldrh	r3, [r3]
 	cmp	r5, r3
-	bge	.L3074
+	bge	.L3088
 	lsls	r5, r5, #1
 	movs	r6, #0
-	ldr	r8, .L3076+76
-	b	.L3075
-.L3065:
+	ldr	r8, .L3090+76
+	b	.L3089
+.L3079:
 	str	r3, [sp, #36]
 	mov	r1, r5
-	ldr	r3, .L3076+16
+	ldr	r3, .L3090+16
 	str	r2, [sp, #32]
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	V2P_block
@@ -21974,7 +22035,7 @@ dump_map_info:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #32]
 	ldr	r3, [sp, #36]
-	cbnz	r0, .L3064
+	cbnz	r0, .L3078
 	ldr	r1, [sp, #28]
 	mla	r0, fp, r4, r7
 	lsls	r1, r1, #10
@@ -21987,29 +22048,29 @@ dump_map_info:
 	ldr	r1, [sp, #24]
 	add	r1, r1, ip
 	str	r1, [r0, #12]
-.L3064:
+.L3078:
 	adds	r6, r6, #1
-.L3072:
+.L3086:
 	uxth	r1, r6
 	cmp	r2, r1
-	bhi	.L3065
-	cbnz	r4, .L3066
-.L3069:
+	bhi	.L3079
+	cbnz	r4, .L3080
+.L3083:
 	adds	r5, r5, #1
 	uxth	r5, r5
-	b	.L3063
-.L3066:
-	ldr	r10, .L3076+80
+	b	.L3077
+.L3080:
+	ldr	r10, .L3090+80
 	mov	r0, r7
 	movs	r6, #0
 	movs	r7, #36
 	movs	r2, #1
 	mov	r1, r4
 	bl	FlashReadPages
-.L3067:
+.L3081:
 	uxth	r3, r6
 	cmp	r4, r3
-	bls	.L3069
+	bls	.L3083
 	ldr	r3, [r8]
 	mla	r3, r7, r6, r3
 	adds	r6, r6, #1
@@ -22030,24 +22091,24 @@ dump_map_info:
 	ldr	r3, [r1]
 	ubfx	r1, r2, #10, #16
 	bl	printf
-	b	.L3067
-.L3070:
-	ldr	r1, .L3076+20
+	b	.L3081
+.L3084:
+	ldr	r1, .L3090+20
 	movs	r6, #0
-	ldr	r3, .L3076+24
+	ldr	r3, .L3090+24
 	mov	r4, r6
 	ldr	r7, [r8]
 	mov	fp, #36
 	ldr	r1, [r1]
 	ldrh	r2, [r3]
-	ldr	r3, .L3076+28
+	ldr	r3, .L3090+28
 	str	r1, [sp, #24]
-	ldr	r1, .L3076+32
+	ldr	r1, .L3090+32
 	ldr	r3, [r3]
 	ldrh	r10, [r1]
-	b	.L3072
-.L3073:
-	ldr	r10, .L3076+44
+	b	.L3086
+.L3087:
+	ldr	r10, .L3090+44
 	mov	r0, r4
 	ldr	r2, [r10]
 	ldrh	r2, [r2, r5]
@@ -22063,7 +22124,7 @@ dump_map_info:
 	ldrh	r1, [r1, r5]
 	str	r0, [sp, #20]
 	ldr	r2, [r2]
-	ldr	r0, .L3076+36
+	ldr	r0, .L3090+36
 	str	r2, [sp, #16]
 	ldr	r2, [r3, #12]
 	str	r2, [sp, #12]
@@ -22075,41 +22136,41 @@ dump_map_info:
 	str	r3, [sp]
 	ldm	r4, {r2, r3}
 	bl	printf
-.L3075:
+.L3089:
 	ldrh	r2, [r8]
 	sxth	r3, r6
 	adds	r6, r6, #1
 	cmp	r3, r2
-	blt	.L3073
+	blt	.L3087
 	adds	r7, r7, #1
-	b	.L3071
-.L3074:
-	ldr	r3, .L3076+40
+	b	.L3085
+.L3088:
+	ldr	r3, .L3090+40
 	movs	r2, #2
-	ldr	r1, .L3076+44
-	ldr	r0, .L3076+48
+	ldr	r1, .L3090+44
+	ldr	r0, .L3090+48
 	ldr	r3, [r3]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r4, .L3076+52
+	ldr	r4, .L3090+52
 	movs	r2, #4
-	ldr	r1, .L3076+56
-	ldr	r0, .L3076+60
+	ldr	r1, .L3090+56
+	ldr	r0, .L3090+60
 	ldrh	r3, [r4]
 	ldr	r1, [r1]
 	bl	rknand_print_hex
-	ldr	r1, .L3076+64
+	ldr	r1, .L3090+64
 	movs	r2, #4
 	ldrh	r3, [r4]
-	ldr	r0, .L3076+68
+	ldr	r0, .L3090+68
 	ldr	r1, [r1]
 	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	rknand_print_hex
-.L3077:
+.L3091:
 	.align	2
-.L3076:
+.L3090:
 	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR202
@@ -22119,18 +22180,18 @@ dump_map_info:
 	.word	.LANCHOR38
 	.word	.LANCHOR105
 	.word	.LANCHOR59
-	.word	.LC49
+	.word	.LC48
 	.word	.LANCHOR65
 	.word	.LANCHOR129
-	.word	.LC81
+	.word	.LC80
 	.word	.LANCHOR67
 	.word	.LANCHOR131
-	.word	.LC82
+	.word	.LC81
 	.word	.LANCHOR195
-	.word	.LC83
+	.word	.LC82
 	.word	.LANCHOR180
 	.word	.LANCHOR54
-	.word	.LC80
+	.word	.LC79
 	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -26445,7 +26506,7 @@ refValueDefault:
 .LC32:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC54:
+.LC53:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
 .LC14:
@@ -26475,29 +26536,29 @@ refValueDefault:
 .LC35:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
-.LC74:
+.LC73:
 	.ascii	"vpc1\000"
-.LC75:
+.LC74:
 	.ascii	"vpc2\000"
-.LC76:
+.LC75:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC77:
+.LC76:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
-.LC46:
+.LC45:
 	.ascii	"...%s enter...\012\000"
-.LC47:
+.LC46:
 	.ascii	"superBlkID = %x vpc=%x\012\000"
-.LC48:
+.LC47:
 	.ascii	"flashmode = %x pagenum = %x %x\012\000"
-.LC49:
+.LC48:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
-.LC78:
+.LC77:
 	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
 	.ascii	"\000"
-.LC79:
+.LC78:
 	.ascii	":\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC3:
@@ -26506,64 +26567,64 @@ refValueDefault:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC65:
+.LC64:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC53:
+.LC52:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
+.LC66:
+	.ascii	"FTL version: 5.0.50 20180905\000"
 .LC67:
-	.ascii	"FTL version: 5.0.49 20180810\000"
-.LC68:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC69:
+.LC68:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC44:
+.LC43:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC41:
+.LC40:
 	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC42:
+.LC41:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC58:
+.LC57:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC62:
+.LC61:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC63:
+.LC62:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC64:
+.LC63:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
-.LC50:
+.LC49:
 	.ascii	"blk = %x vpc=%x mode = %x\012\000"
-.LC51:
+.LC50:
 	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
-.LC52:
+.LC51:
 	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
 	.ascii	"%x\012\000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC43:
+.LC42:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
 .LC38:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC73:
+.LC72:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
-.LC45:
+.LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
-.LC59:
+.LC58:
 	.ascii	"Ftlscanalldata = %x\012\000"
-.LC60:
+.LC59:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC61:
+.LC60:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
@@ -26581,203 +26642,203 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
 .LC13:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10473,"a",%progbits
+	.section	.rodata.__func__.10408,"a",%progbits
 	.set	.LANCHOR245,. + 0
-	.type	__func__.10473, %object
-	.size	__func__.10473, 8
-__func__.10473:
+	.type	__func__.10408, %object
+	.size	__func__.10408, 8
+__func__.10408:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10533,"a",%progbits
+	.section	.rodata.__func__.10468,"a",%progbits
 	.set	.LANCHOR229,. + 0
-	.type	__func__.10533, %object
-	.size	__func__.10533, 13
-__func__.10533:
+	.type	__func__.10468, %object
+	.size	__func__.10468, 13
+__func__.10468:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10559,"a",%progbits
+	.section	.rodata.__func__.10494,"a",%progbits
 	.set	.LANCHOR247,. + 0
-	.type	__func__.10559, %object
-	.size	__func__.10559, 9
-__func__.10559:
+	.type	__func__.10494, %object
+	.size	__func__.10494, 9
+__func__.10494:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.10622,"a",%progbits
+	.section	.rodata.__func__.10577,"a",%progbits
 	.set	.LANCHOR124,. + 0
-	.type	__func__.10622, %object
-	.size	__func__.10622, 14
-__func__.10622:
+	.type	__func__.10577, %object
+	.size	__func__.10577, 14
+__func__.10577:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10668,"a",%progbits
+	.section	.rodata.__func__.10623,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10668, %object
-	.size	__func__.10668, 11
-__func__.10668:
+	.type	__func__.10623, %object
+	.size	__func__.10623, 11
+__func__.10623:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10761,"a",%progbits
+	.section	.rodata.__func__.10716,"a",%progbits
 	.set	.LANCHOR90,. + 0
-	.type	__func__.10761, %object
-	.size	__func__.10761, 17
-__func__.10761:
+	.type	__func__.10716, %object
+	.size	__func__.10716, 17
+__func__.10716:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10765,"a",%progbits
+	.section	.rodata.__func__.10720,"a",%progbits
 	.set	.LANCHOR87,. + 0
-	.type	__func__.10765, %object
-	.size	__func__.10765, 17
-__func__.10765:
+	.type	__func__.10720, %object
+	.size	__func__.10720, 17
+__func__.10720:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10802,"a",%progbits
+	.section	.rodata.__func__.10757,"a",%progbits
 	.set	.LANCHOR91,. + 0
-	.type	__func__.10802, %object
-	.size	__func__.10802, 17
-__func__.10802:
+	.type	__func__.10757, %object
+	.size	__func__.10757, 17
+__func__.10757:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10832,"a",%progbits
+	.section	.rodata.__func__.10787,"a",%progbits
 	.set	.LANCHOR95,. + 0
-	.type	__func__.10832, %object
-	.size	__func__.10832, 22
-__func__.10832:
+	.type	__func__.10787, %object
+	.size	__func__.10787, 22
+__func__.10787:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10839,"a",%progbits
+	.section	.rodata.__func__.10794,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.10839, %object
-	.size	__func__.10839, 20
-__func__.10839:
+	.type	__func__.10794, %object
+	.size	__func__.10794, 20
+__func__.10794:
 	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10870,"a",%progbits
+	.section	.rodata.__func__.10825,"a",%progbits
 	.set	.LANCHOR96,. + 0
-	.type	__func__.10870, %object
-	.size	__func__.10870, 26
-__func__.10870:
+	.type	__func__.10825, %object
+	.size	__func__.10825, 26
+__func__.10825:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10884,"a",%progbits
+	.section	.rodata.__func__.10835,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10884, %object
-	.size	__func__.10884, 15
-__func__.10884:
+	.type	__func__.10835, %object
+	.size	__func__.10835, 15
+__func__.10835:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10897,"a",%progbits
+	.section	.rodata.__func__.10848,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10897, %object
-	.size	__func__.10897, 31
-__func__.10897:
+	.type	__func__.10848, %object
+	.size	__func__.10848, 31
+__func__.10848:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10910,"a",%progbits
+	.section	.rodata.__func__.10861,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10910, %object
-	.size	__func__.10910, 16
-__func__.10910:
+	.type	__func__.10861, %object
+	.size	__func__.10861, 16
+__func__.10861:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10930,"a",%progbits
+	.section	.rodata.__func__.10881,"a",%progbits
 	.set	.LANCHOR99,. + 0
-	.type	__func__.10930, %object
-	.size	__func__.10930, 22
-__func__.10930:
+	.type	__func__.10881, %object
+	.size	__func__.10881, 22
+__func__.10881:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10946,"a",%progbits
+	.section	.rodata.__func__.10897,"a",%progbits
 	.set	.LANCHOR227,. + 0
-	.type	__func__.10946, %object
-	.size	__func__.10946, 9
-__func__.10946:
+	.type	__func__.10897, %object
+	.size	__func__.10897, 9
+__func__.10897:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.11008,"a",%progbits
+	.section	.rodata.__func__.10959,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.11008, %object
-	.size	__func__.11008, 15
-__func__.11008:
+	.type	__func__.10959, %object
+	.size	__func__.10959, 15
+__func__.10959:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.11027,"a",%progbits
+	.section	.rodata.__func__.10978,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.11027, %object
-	.size	__func__.11027, 14
-__func__.11027:
+	.type	__func__.10978, %object
+	.size	__func__.10978, 14
+__func__.10978:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11081,"a",%progbits
+	.section	.rodata.__func__.11032,"a",%progbits
 	.set	.LANCHOR221,. + 0
-	.type	__func__.11081, %object
-	.size	__func__.11081, 15
-__func__.11081:
+	.type	__func__.11032, %object
+	.size	__func__.11032, 15
+__func__.11032:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11092,"a",%progbits
+	.section	.rodata.__func__.11043,"a",%progbits
 	.set	.LANCHOR248,. + 0
-	.type	__func__.11092, %object
-	.size	__func__.11092, 12
-__func__.11092:
+	.type	__func__.11043, %object
+	.size	__func__.11043, 12
+__func__.11043:
 	.ascii	"FtlCheckVpc\000"
-	.section	.rodata.__func__.11124,"a",%progbits
+	.section	.rodata.__func__.11075,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.11124, %object
-	.size	__func__.11124, 17
-__func__.11124:
+	.type	__func__.11075, %object
+	.size	__func__.11075, 17
+__func__.11075:
 	.ascii	"FtlDumpBlockInfo\000"
-	.section	.rodata.__func__.11143,"a",%progbits
+	.section	.rodata.__func__.11094,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11143, %object
-	.size	__func__.11143, 16
-__func__.11143:
+	.type	__func__.11094, %object
+	.size	__func__.11094, 16
+__func__.11094:
 	.ascii	"FtlScanAllBlock\000"
-	.section	.rodata.__func__.11248,"a",%progbits
+	.section	.rodata.__func__.11199,"a",%progbits
 	.set	.LANCHOR233,. + 0
-	.type	__func__.11248, %object
-	.size	__func__.11248, 16
-__func__.11248:
+	.type	__func__.11199, %object
+	.size	__func__.11199, 16
+__func__.11199:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11281,"a",%progbits
+	.section	.rodata.__func__.11232,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11281, %object
-	.size	__func__.11281, 22
-__func__.11281:
+	.type	__func__.11232, %object
+	.size	__func__.11232, 22
+__func__.11232:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11335,"a",%progbits
+	.section	.rodata.__func__.11286,"a",%progbits
 	.set	.LANCHOR102,. + 0
-	.type	__func__.11335, %object
-	.size	__func__.11335, 16
-__func__.11335:
+	.type	__func__.11286, %object
+	.size	__func__.11286, 16
+__func__.11286:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11355,"a",%progbits
+	.section	.rodata.__func__.11306,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.11355, %object
-	.size	__func__.11355, 18
-__func__.11355:
+	.type	__func__.11306, %object
+	.size	__func__.11306, 18
+__func__.11306:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11432,"a",%progbits
+	.section	.rodata.__func__.11383,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11432, %object
-	.size	__func__.11432, 25
-__func__.11432:
+	.type	__func__.11383, %object
+	.size	__func__.11383, 25
+__func__.11383:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11446,"a",%progbits
+	.section	.rodata.__func__.11397,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11446, %object
-	.size	__func__.11446, 29
-__func__.11446:
+	.type	__func__.11397, %object
+	.size	__func__.11397, 29
+__func__.11397:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11452,"a",%progbits
+	.section	.rodata.__func__.11403,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.11452, %object
-	.size	__func__.11452, 19
-__func__.11452:
+	.type	__func__.11403, %object
+	.size	__func__.11403, 19
+__func__.11403:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11463,"a",%progbits
+	.section	.rodata.__func__.11414,"a",%progbits
 	.set	.LANCHOR206,. + 0
-	.type	__func__.11463, %object
-	.size	__func__.11463, 16
-__func__.11463:
+	.type	__func__.11414, %object
+	.size	__func__.11414, 16
+__func__.11414:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11468,"a",%progbits
+	.section	.rodata.__func__.11419,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.11468, %object
-	.size	__func__.11468, 20
-__func__.11468:
+	.type	__func__.11419, %object
+	.size	__func__.11419, 20
+__func__.11419:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11536,"a",%progbits
+	.section	.rodata.__func__.11487,"a",%progbits
 	.set	.LANCHOR239,. + 0
-	.type	__func__.11536, %object
-	.size	__func__.11536, 19
-__func__.11536:
+	.type	__func__.11487, %object
+	.size	__func__.11487, 19
+__func__.11487:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11630,"a",%progbits
+	.section	.rodata.__func__.11581,"a",%progbits
 	.set	.LANCHOR243,. + 0
-	.type	__func__.11630, %object
-	.size	__func__.11630, 23
-__func__.11630:
+	.type	__func__.11581, %object
+	.size	__func__.11581, 23
+__func__.11581:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC36:
@@ -26785,27 +26846,25 @@ __func__.11630:
 .LC37:
 	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
 	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
-.LC80:
+.LC79:
 	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
-.LC81:
+.LC80:
 	.ascii	"Mblk:\000"
-.LC82:
+.LC81:
 	.ascii	"L2P:\000"
-.LC83:
+.LC82:
 	.ascii	"L2PC:\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC71:
+.LC70:
 	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC72:
+.LC71:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
 .LC8:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
 .LC39:
-	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC40:
 	.ascii	"page map lost: %x %x\012\000"
 	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
 .LC15:
@@ -26815,17 +26874,17 @@ __func__.11630:
 .LC17:
 	.ascii	"write_idblock fail! %x\012\000"
 	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
-.LC55:
-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-.LC56:
+.LC54:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC57:
+.LC55:
 	.ascii	"map_ppn:\000"
+.LC56:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC66:
+.LC65:
 	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC70:
+.LC69:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC18:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 6afa53b285..d2d1e42d45 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-08-10
+ * date: 2018-09-05
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.c"
@@ -3347,7 +3347,7 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
 	bhi	.L491
-	mov	w2, 628
+	mov	w2, 629
 	adrp	x1, .LANCHOR96
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR96
@@ -3406,7 +3406,7 @@ select_l2p_ram_region:
 	bne	.L502
 	cmp	w19, w1
 	bcc	.L495
-	mov	w2, 863
+	mov	w2, 855
 	adrp	x1, .LANCHOR99
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR99
@@ -3602,7 +3602,7 @@ make_superblock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
 	bcc	.L525
-	mov	w2, 2613
+	mov	w2, 2544
 	adrp	x1, .LANCHOR102
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR102
@@ -4052,11 +4052,11 @@ FtlGcUpdatePage:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
 	.align	2
-	.global	FtlGcRefreshBlock
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
+	.global	FtlGcRefreshOpenBlock
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
 	adrp	x8, .LANCHOR113
 	and	w0, w0, 65535
 	ldrh	w10, [x8, #:lo12:.LANCHOR113]
@@ -4096,14 +4096,55 @@ FtlGcRefreshBlock:
 	bne	.L598
 	strh	w0, [x2, #:lo12:.LANCHOR116]
 	b	.L598
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
-	.align	2
-	.global	FtlGcRefreshOpenBlock
-	.type	FtlGcRefreshOpenBlock, %function
-FtlGcRefreshOpenBlock:
-	b	FtlGcRefreshBlock
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshBlock
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	adrp	x8, .LANCHOR113
+	and	w0, w0, 65535
+	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	cmp	w10, w0
+	beq	.L610
+	adrp	x6, .LANCHOR114
+	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	cmp	w0, w7
+	beq	.L610
+	adrp	x4, .LANCHOR115
+	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	cmp	w0, w5
+	beq	.L610
+	adrp	x2, .LANCHOR116
+	ldrh	w3, [x2, #:lo12:.LANCHOR116]
+	cmp	w0, w3
+	beq	.L610
+	mov	w1, 65535
+	cmp	w10, w1
+	bne	.L604
+	strh	w0, [x8, #:lo12:.LANCHOR113]
+.L610:
+	mov	w0, 0
+	ret
+.L604:
+	cmp	w7, w1
+	bne	.L605
+	strh	w0, [x6, #:lo12:.LANCHOR114]
+	b	.L610
+.L605:
+	cmp	w5, w1
+	bne	.L606
+	strh	w0, [x4, #:lo12:.LANCHOR115]
+	b	.L610
+.L606:
+	cmp	w3, w1
+	bne	.L611
+	strh	w0, [x2, #:lo12:.LANCHOR116]
+	b	.L610
+.L611:
+	mov	w0, -1
+	ret
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
@@ -4118,39 +4159,39 @@ FtlGcMarkBadPhyBlk:
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L604
+	cbz	w0, .L613
 	adrp	x1, .LANCHOR79
 	ubfiz	x0, x11, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 39
-	bls	.L604
+	bls	.L613
 	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L604:
+.L613:
 	adrp	x1, .LANCHOR117
 	adrp	x3, .LANCHOR118
 	add	x3, x3, :lo12:.LANCHOR118
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR117]
-.L605:
+.L614:
 	cmp	w0, w2, uxth
-	bhi	.L607
+	bhi	.L616
 	cmp	w0, 15
-	bhi	.L606
+	bhi	.L615
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR117]
 	adrp	x1, .LANCHOR118
 	add	x1, x1, :lo12:.LANCHOR118
 	strh	w12, [x1, w0, sxtw 1]
-	b	.L606
-.L607:
+	b	.L615
+.L616:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w12
-	bne	.L605
-.L606:
+	bne	.L614
+.L615:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4162,20 +4203,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR117
 	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L619
+	cbz	w0, .L628
 	adrp	x1, .LANCHOR113
 	ldrh	w2, [x1, #:lo12:.LANCHOR113]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L619
+	bne	.L628
 	stp	x29, x30, [sp, -16]!
 	adrp	x11, .LANCHOR119
 	add	x29, sp, 0
 	ldrh	w1, [x11, #:lo12:.LANCHOR119]
 	cmp	w1, w0
-	bcc	.L614
+	bcc	.L623
 	strh	wzr, [x11, #:lo12:.LANCHOR119]
-.L614:
+.L623:
 	ldrh	w1, [x11, #:lo12:.LANCHOR119]
 	adrp	x0, .LANCHOR118
 	add	x0, x0, :lo12:.LANCHOR118
@@ -4188,7 +4229,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x11, #:lo12:.LANCHOR119]
 	mov	w0, 0
 	ret
-.L619:
+.L628:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4203,9 +4244,9 @@ flash_boot_enter_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L622
+	bne	.L631
 	b	flash_enter_slc_mode
-.L622:
+.L631:
 	ret
 	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
 	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
@@ -4219,9 +4260,9 @@ flash_boot_exit_slc_mode:
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	cmp	w2, w1
-	bne	.L624
+	bne	.L633
 	b	flash_exit_slc_mode
-.L624:
+.L633:
 	ret
 	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
 	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
@@ -4264,16 +4305,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L630
+	cbnz	w0, .L639
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L631:
+.L640:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L631
-.L637:
+	bne	.L640
+.L646:
 	adrp	x19, .LANCHOR120
 	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
@@ -4284,41 +4325,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L632:
+.L641:
 	cmp	w20, w0, uxth
-	bhi	.L654
+	bhi	.L663
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L630:
+.L639:
 	cmp	w0, 1
-	bne	.L633
+	bne	.L642
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L636:
+.L645:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L634
+	bls	.L643
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L634:
+.L643:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L636
-	b	.L637
-.L633:
+	bne	.L645
+	b	.L646
+.L642:
 	cmp	w0, 2
-	bne	.L638
+	bne	.L647
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L640:
+.L649:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4327,32 +4368,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L640
-	b	.L637
-.L638:
+	bne	.L649
+	b	.L646
+.L647:
 	cmp	w0, 3
-	bne	.L641
+	bne	.L650
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L644:
+.L653:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L642
+	bls	.L651
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L642:
+.L651:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L644
-	b	.L637
-.L641:
+	bne	.L653
+	b	.L646
+.L650:
 	cmp	w0, 4
-	bne	.L645
+	bne	.L654
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4371,7 +4412,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L647:
+.L656:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4380,57 +4421,57 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L647
-	b	.L637
-.L645:
+	bne	.L656
+	b	.L646
+.L654:
 	cmp	w0, 5
-	bne	.L648
+	bne	.L657
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L649:
+.L658:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L649
+	bne	.L658
 	add	x1, x1, 32
-.L650:
+.L659:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L650
-	b	.L637
-.L648:
+	bne	.L659
+	b	.L646
+.L657:
 	cmp	w0, 6
-	bne	.L637
+	bne	.L646
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L653:
+.L662:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L651
+	bls	.L660
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L651:
+.L660:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L653
-	b	.L637
-.L654:
+	bne	.L662
+	b	.L646
+.L663:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L632
+	b	.L641
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4451,9 +4492,9 @@ FlashDieInfoInit:
 	cmp	w0, 256
 	strb	wzr, [x20, #:lo12:.LANCHOR121]
 	str	x25, [sp, 64]
-	bls	.L670
+	bls	.L679
 	mov	w0, 512
-.L687:
+.L696:
 	adrp	x25, .LANCHOR26
 	add	x22, x25, :lo12:.LANCHOR26
 	str	w0, [x23, #:lo12:.LANCHOR3]
@@ -4480,27 +4521,27 @@ FlashDieInfoInit:
 	mov	x8, 0
 	add	x10, x7, 1
 	ldrb	w11, [x7]
-.L674:
+.L683:
 	mov	w2, w11
 	add	x1, x15, x8, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L673
+	cbnz	w0, .L682
 	ldrb	w1, [x14]
 	add	w0, w1, 1
 	strb	w0, [x14]
 	str	wzr, [x21, x1, lsl 2]
 	strb	w8, [x22, x1]
-.L673:
+.L682:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L674
+	bne	.L683
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	strb	w0, [x20, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L675
-.L679:
+	beq	.L684
+.L688:
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4514,24 +4555,24 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L670:
+.L679:
 	cmp	w0, 128
-	bls	.L687
+	bls	.L696
 	mov	w0, 256
-	b	.L687
-.L675:
+	b	.L696
+.L684:
 	ldr	w20, [x23, #:lo12:.LANCHOR3]
 	add	x12, x12, :lo12:.LANCHOR22
 	add	x14, x19, :lo12:.LANCHOR25
 	add	x24, x24, :lo12:.LANCHOR17
 	add	x13, x25, :lo12:.LANCHOR26
 	mov	x15, 0
-.L678:
+.L687:
 	mov	w2, w11
 	add	x1, x12, x15, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L676
+	cbnz	w0, .L685
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x14]
@@ -4541,18 +4582,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x24, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L677
+	cbz	w3, .L686
 	lsl	w0, w0, 1
 	str	w0, [x24, x2, lsl 2]
-.L677:
+.L686:
 	add	w1, w1, 1
 	strb	w15, [x13, x2]
 	strb	w1, [x14]
-.L676:
+.L685:
 	add	x15, x15, 1
 	cmp	x15, 4
-	bne	.L678
-	b	.L679
+	bne	.L687
+	b	.L688
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4600,20 +4641,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L689:
+.L698:
 	cmp	w3, w1, uxtb
-	bhi	.L690
+	bhi	.L699
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L690:
+.L699:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L689
+	b	.L698
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4639,13 +4680,13 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L695:
+.L704:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L692
+	beq	.L701
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L694
+	bhi	.L703
 	mov	w2, 79
 	mov	x1, x23
 	adrp	x0, .LC5
@@ -4656,7 +4697,7 @@ FtlBbt2Bitmap:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L694:
+.L703:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4668,8 +4709,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L695
-.L692:
+	bne	.L704
+.L701:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4726,87 +4767,92 @@ ftl_free_no_use_map_blk:
 	stp	x21, x22, [sp, 32]
 	ldp	x21, x20, [x0, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
+	ldr	x22, [x0, 16]
 	lsl	w2, w2, 1
-	ldr	x23, [x0, 16]
 	mov	x0, x21
+	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L703:
+.L712:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L707
-	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR54
-	add	x24, x24, :lo12:.LANCHOR54
-	mov	w25, 0
+	bhi	.L716
+	adrp	x0, .LANCHOR54
+	mov	w23, 0
 	mov	w20, 0
-.L708:
+	ldrh	w1, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x19]
+	strh	w1, [x21, x0, lsl 1]
+	ldrh	w24, [x21]
+.L717:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L712
-	mov	w0, w25
+	bhi	.L721
+	mov	w0, w23
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L707:
+.L716:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L704:
+.L713:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L706
+	bhi	.L715
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L703
-.L706:
+	b	.L712
+.L715:
 	ubfiz	x3, x1, 1, 16
-	ldrh	w4, [x23, x3]
+	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L705
+	bne	.L714
+	cbz	w2, .L714
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L705:
+.L714:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L704
-.L712:
-	ldrh	w0, [x19]
-	uxtw	x22, w20
-	cmp	w0, w20
-	bne	.L709
-	ldrh	w0, [x24]
-	ldrh	w1, [x19, 2]
-	cmp	w1, w0
-	bcs	.L709
-	strh	w0, [x21, x22, lsl 1]
-.L709:
-	lsl	x22, x22, 1
-	ldrh	w0, [x21, x22]
-	cmp	w26, w0
-	bls	.L710
-	mov	w25, w20
-	mov	w26, w0
-.L710:
-	cbnz	w0, .L711
-	ldrh	w0, [x23, x22]
-	cbz	w0, .L711
+	b	.L713
+.L721:
+	ubfiz	x0, x20, 1, 16
+	ldrh	w1, [x21, x0]
+	cmp	w24, w1
+	bls	.L718
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbnz	w0, .L719
+.L720:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L717
+.L718:
+	cbnz	w1, .L720
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbz	w0, .L720
+.L722:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-	strh	wzr, [x23, x22]
+	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L711:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L708
+	b	.L720
+.L723:
+	mov	w24, 0
+	b	.L722
+.L719:
+	mov	w23, w20
+	cbz	w1, .L723
+	mov	w24, w1
+	b	.L720
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4842,10 +4888,10 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR58]
 	add	x3, x0, x3, lsl 4
-.L718:
+.L733:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L719
+	bne	.L734
 	adrp	x1, .LANCHOR127
 	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
@@ -4860,7 +4906,6 @@ FtlL2PDataInit:
 	ldrh	w1, [x1, #:lo12:.LANCHOR128]
 	strh	w1, [x0, 8]
 	adrp	x1, .LANCHOR67
-	strh	w2, [x0, 60]
 	ldrh	w1, [x1, #:lo12:.LANCHOR67]
 	strh	w1, [x0, 6]
 	adrp	x1, .LANCHOR129
@@ -4877,7 +4922,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L719:
+.L734:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4885,7 +4930,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L718
+	b	.L733
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4988,35 +5033,35 @@ SupperBlkListInit:
 	str	xzr, [x0, #:lo12:.LANCHOR85]
 	adrp	x0, .LANCHOR139
 	strh	wzr, [x0, #:lo12:.LANCHOR139]
-.L724:
+.L739:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L731
+	bge	.L746
 	adrp	x0, .LANCHOR53
 	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR53]
-	b	.L732
-.L726:
+	b	.L747
+.L741:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L725
+	cbnz	w0, .L740
 	add	w5, w7, w5
 	sxth	w5, w5
-.L725:
+.L740:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L732:
+.L747:
 	cmp	w6, w8
-	blt	.L726
-	cbz	w5, .L727
+	blt	.L741
+	cbz	w5, .L742
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L728:
+.L743:
 	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
@@ -5024,46 +5069,46 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L729
+	beq	.L744
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L729
+	beq	.L744
 	adrp	x0, .LANCHOR94
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w19, w0
-	beq	.L729
+	beq	.L744
 	adrp	x0, .LANCHOR84
 	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L730
+	cbnz	w0, .L745
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L729:
+.L744:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L724
-.L727:
+	b	.L739
+.L742:
 	adrp	x0, .LANCHOR84
 	mov	w1, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L728
-.L730:
+	b	.L743
+.L745:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L729
-.L731:
+	b	.L744
+.L746:
 	strh	w20, [x23, #:lo12:.LANCHOR86]
 	add	w20, w20, w21
 	strh	w21, [x22, #:lo12:.LANCHOR89]
 	cmp	w0, w20
-	bge	.L733
-	mov	w2, 2683
+	bge	.L748
+	mov	w2, 2614
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR140
@@ -5074,7 +5119,7 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L733:
+.L748:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -5168,7 +5213,7 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L745:
+.L760:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x20, x10, 5
@@ -5176,7 +5221,7 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w19, w0
-	cbnz	w0, .L743
+	cbnz	w0, .L758
 	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
 	add	x20, x0, x20
@@ -5185,17 +5230,17 @@ FlashLoadPhyInfoInRam:
 	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L744:
+.L759:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L747
+	beq	.L762
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L744
+	bne	.L759
 	mov	w2, w0
-.L747:
+.L762:
 	ubfiz	x0, x2, 5, 32
 	add	x1, x1, :lo12:.LANCHOR143
 	add	x1, x1, x0
@@ -5208,14 +5253,14 @@ FlashLoadPhyInfoInRam:
 	adrp	x0, .LANCHOR31
 	add	x0, x0, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-	b	.L742
-.L743:
+	b	.L757
+.L758:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 77
-	bne	.L745
+	bne	.L760
 	mov	w19, -1
-.L742:
+.L757:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5227,15 +5272,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L752:
+.L767:
 	cmp	w2, w3
-	bhi	.L753
+	bhi	.L768
 	ret
-.L753:
+.L768:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L752
+	b	.L767
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5254,15 +5299,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L755
-	cbz	x3, .L756
+	bne	.L770
+	cbz	x3, .L771
 	tst	x3, 3
-	bne	.L757
+	bne	.L772
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L756:
-	cbz	x20, .L754
+.L771:
+	cbz	x20, .L769
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5274,26 +5319,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L754:
+.L769:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L757:
+.L772:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L756
-.L755:
-	cbz	x3, .L760
+	b	.L771
+.L770:
+	cbz	x3, .L775
 	tst	x3, 3
-	bne	.L761
+	bne	.L776
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L760:
-	cbz	x20, .L754
+.L775:
+	cbz	x20, .L769
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5305,13 +5350,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L754
-.L761:
+	b	.L769
+.L776:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L760
+	b	.L775
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5335,14 +5380,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L774
-	cbnz	x4, .L775
+	bne	.L789
+	cbnz	x4, .L790
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L775:
+.L790:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5352,7 +5397,7 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L799
+	cbnz	w20, .L814
 	adrp	x0, .LANCHOR32
 	adrp	x4, .LANCHOR35
 	mov	x1, x0
@@ -5365,38 +5410,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L778:
+.L793:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L779
+	bne	.L794
 	adrp	x0, .LANCHOR34
 	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
 	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L780:
+.L795:
 	cmp	w2, w24
-	bcs	.L776
-	cbnz	w4, .L786
-.L776:
+	bcs	.L791
+	cbnz	w4, .L801
+.L791:
 	str	wzr, [x19, 16]
-.L787:
+.L802:
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L773
-	cbnz	w20, .L773
+	bls	.L788
+	cbnz	w20, .L788
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L773
+	bne	.L788
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L773:
+.L788:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5405,7 +5450,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L779:
+.L794:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5418,18 +5463,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L778
-.L786:
+	b	.L793
+.L801:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L802
+	tbnz	x0, 2, .L817
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L802
+	tbnz	x0, 15, .L817
 	cmp	w3, 5
-	bls	.L782
+	bls	.L797
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5442,26 +5487,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L783
+	bls	.L798
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L808:
+.L823:
 	orr	w0, w1, w0, lsl 5
-.L784:
+.L799:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L781:
+.L796:
 	add	w2, w2, 1
-	b	.L780
-.L783:
+	b	.L795
+.L798:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L808
-.L782:
+	b	.L823
+.L797:
 	cmp	w3, 3
-	bls	.L803
+	bls	.L818
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5474,45 +5519,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L785
+	bls	.L800
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L808
-.L785:
+	b	.L823
+.L800:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L808
-.L803:
+	b	.L823
+.L818:
 	mov	w0, 0
-	b	.L784
-.L802:
+	b	.L799
+.L817:
 	mov	w22, -1
-	b	.L781
-.L799:
+	b	.L796
+.L814:
 	mov	w22, 0
-	b	.L776
-.L774:
+	b	.L791
+.L789:
 	cmp	w20, 1
-	bne	.L788
+	bne	.L803
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L789:
+.L804:
 	cmp	w22, w24
-	bcc	.L791
+	bcc	.L806
 	mov	w22, 0
-	b	.L787
-.L791:
+	b	.L802
+.L806:
 	and	w28, w22, 3
-	cbz	x26, .L804
+	cbz	x26, .L819
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L790:
+.L805:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5529,11 +5574,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L789
-.L804:
+	b	.L804
+.L819:
 	mov	x3, 0
-	b	.L790
-.L788:
+	b	.L805
+.L803:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5549,16 +5594,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L792:
+.L807:
 	cmp	w24, w23
-	bls	.L787
+	bls	.L802
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L793
+	bls	.L808
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5566,9 +5611,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L793:
+.L808:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L805
+	tbnz	x0, 2, .L820
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5576,12 +5621,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L794:
+.L809:
 	and	w2, w23, 3
-	cbz	x26, .L806
+	cbz	x26, .L821
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L795:
+.L810:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5589,13 +5634,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L792
-.L805:
+	b	.L807
+.L820:
 	mov	w22, -1
-	b	.L794
-.L806:
+	b	.L809
+.L821:
 	mov	x3, 0
-	b	.L795
+	b	.L810
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5613,7 +5658,7 @@ FlashReadRawPage:
 	mov	x22, x2
 	mov	x23, x3
 	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
-	bne	.L810
+	bne	.L825
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5622,7 +5667,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L810:
+.L825:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5675,7 +5720,7 @@ FlashDdrTunningRead:
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L826
+	cbz	w4, .L841
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5694,10 +5739,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L815
-.L824:
+	bne	.L830
+.L839:
 	mov	w21, -1
-.L812:
+.L827:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5706,7 +5751,7 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L815:
+.L830:
 	mov	w1, w25
 	mov	w2, w21
 	adrp	x0, .LC9
@@ -5716,20 +5761,20 @@ FlashDdrTunningRead:
 	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L817
+	bhi	.L832
 	str	w0, [x1, #:lo12:.LANCHOR144]
-	b	.L812
-.L817:
+	b	.L827
+.L832:
 	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L814:
+.L829:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L822:
+.L837:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5741,65 +5786,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L818
+	bhi	.L833
 	cmp	w0, 2
-	bhi	.L828
+	bhi	.L843
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L828
+	bls	.L843
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L820:
+.L835:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L821:
-	cbz	w20, .L823
+.L836:
+	cbz	w20, .L838
 	mov	w1, w20
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L823:
-	cbz	w27, .L812
+.L838:
+	cbz	w27, .L827
 	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L824
+	cbz	w26, .L839
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L812
-.L826:
+	b	.L827
+.L841:
 	mov	w21, 1024
-	b	.L814
-.L818:
+	b	.L829
+.L833:
 	cmp	w19, w6
-	bls	.L829
+	bls	.L844
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L821
+	bhi	.L836
 	mov	w6, w19
-.L829:
+.L844:
 	mov	w19, 0
-	b	.L819
-.L828:
+	b	.L834
+.L843:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L819:
+.L834:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L822
+	bls	.L837
 	mov	w1, w20
 	mov	w20, w5
-	b	.L820
+	b	.L835
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5820,14 +5865,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L839
+	bne	.L854
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L840
-.L842:
+	cbnz	w25, .L855
+.L857:
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L839
+	cbz	w0, .L854
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5839,16 +5884,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L843
+	beq	.L858
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L839
-.L843:
+	bls	.L854
+.L858:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L839
-.L840:
+	b	.L854
+.L855:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5857,14 +5902,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L842
+	beq	.L857
 	mov	w19, w0
-.L839:
+.L854:
 	adrp	x24, .LANCHOR145
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
-	cbz	x4, .L838
+	cbz	x4, .L853
 	cmn	w19, #1
-	bne	.L838
+	bne	.L853
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5878,10 +5923,10 @@ FlashReadPage:
 	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L838
+	bne	.L853
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L838
+	cbz	w0, .L853
 	mov	w0, w20
 	bl	flash_enter_slc_mode
 	ldr	x4, [x24, #:lo12:.LANCHOR145]
@@ -5893,7 +5938,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L838:
+.L853:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5932,27 +5977,27 @@ FlashDdrParaScan:
 	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L859
+	beq	.L874
 	cmn	w22, #1
-	bne	.L860
-.L859:
+	bne	.L875
+.L874:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L860
+	tbz	x0, 0, .L875
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
 	strb	wzr, [x20, #:lo12:.LANCHOR30]
-.L861:
+.L876:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L860:
+.L875:
 	mov	w0, 1
 	strb	w0, [x20, #:lo12:.LANCHOR30]
-	b	.L861
+	b	.L876
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -5991,10 +6036,10 @@ FlashLoadPhyInfo:
 	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L870:
+.L885:
 	add	w28, w19, 1
 	mov	x27, 0
-.L872:
+.L887:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
@@ -6004,30 +6049,30 @@ FlashLoadPhyInfo:
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L871
+	bne	.L886
 	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L871
+	bne	.L886
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L872
-.L873:
+	bne	.L887
+.L888:
 	ldr	w0, [x29, 108]
 	subs	w25, w25, #1
 	add	w19, w19, w0
-	bne	.L870
-	b	.L878
-.L874:
+	bne	.L885
+	b	.L893
+.L889:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L880
+	bne	.L895
 	add	x23, x20, :lo12:.LANCHOR31
 	add	x1, x6, 160
 	mov	w2, 32
@@ -6053,36 +6098,36 @@ FlashLoadPhyInfo:
 	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
 	add	w3, w0, 1
-	cbz	w0, .L876
+	cbz	w0, .L891
 	str	w3, [x2, #:lo12:.LANCHOR149]
-.L877:
+.L892:
 	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
 	strb	w1, [x0, #:lo12:.LANCHOR150]
-	b	.L873
-.L876:
+	b	.L888
+.L891:
 	mov	w0, 2
 	str	w0, [x2, #:lo12:.LANCHOR149]
-	b	.L877
-.L880:
+	b	.L892
+.L895:
 	mov	w23, -1
-	b	.L873
-.L871:
+	b	.L888
+.L886:
 	ldr	x6, [x21, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L873
-	cbnz	w23, .L874
+	bne	.L888
+	cbnz	w23, .L889
 	add	x20, x20, :lo12:.LANCHOR31
 	ldrh	w0, [x20, 10]
 	udiv	w19, w19, w0
 	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
 	str	w19, [x0, #:lo12:.LANCHOR149]
-.L878:
+.L893:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6127,34 +6172,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L900
+	bls	.L915
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbz	w0, .L901
+	cbz	w0, .L916
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L885:
+.L900:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L884:
+.L899:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L886:
+.L901:
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L895
+	bcc	.L910
 	mov	w28, w24
-.L894:
+.L909:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6162,9 +6207,9 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L896
+	bhi	.L911
 	bl	SandiskSetRRPara
-.L897:
+.L912:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
@@ -6174,17 +6219,17 @@ ToshibaReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L898
+	bcc	.L913
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L898:
+.L913:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L883
+	cbz	w23, .L898
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L883:
+.L898:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6193,13 +6238,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L901:
+.L916:
 	mov	w23, 0
-	b	.L885
-.L900:
+	b	.L900
+.L915:
 	mov	w23, 0
-	b	.L884
-.L895:
+	b	.L899
+.L910:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6207,28 +6252,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L887
+	bhi	.L902
 	bl	SandiskSetRRPara
-.L888:
+.L903:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w0, 34
-	bne	.L889
+	bne	.L904
 	adrp	x0, .LANCHOR151
 	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L889
+	bne	.L904
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L889:
+.L904:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L890
+	cbz	w23, .L905
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6239,35 +6284,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L891:
+.L906:
 	cmn	w28, #1
-	beq	.L892
+	beq	.L907
 	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L894
+	bcc	.L909
 	mov	x26, 0
 	mov	x25, 0
-.L892:
+.L907:
 	add	w20, w20, 1
-	b	.L886
-.L887:
+	b	.L901
+.L902:
 	bl	ToshibaSetRRPara
-	b	.L888
-.L890:
+	b	.L903
+.L905:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L891
-.L896:
+	b	.L906
+.L911:
 	bl	ToshibaSetRRPara
-	b	.L897
+	b	.L912
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6301,12 +6346,12 @@ SamsungReadRetrial:
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L912:
+.L927:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L916
-.L915:
+	bcc	.L931
+.L930:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
@@ -6314,11 +6359,11 @@ SamsungReadRetrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L911
+	bcc	.L926
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L911:
+.L926:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6327,7 +6372,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L916:
+.L931:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6337,21 +6382,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L913
+	beq	.L928
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L918
+	bcc	.L933
 	mov	x25, 0
 	mov	x24, 0
-.L913:
+.L928:
 	add	w21, w21, 1
-	b	.L912
-.L918:
+	b	.L927
+.L933:
 	mov	w19, w0
-	b	.L915
+	b	.L930
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6374,16 +6419,16 @@ MicronReadRetrial:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 128]
-	cbnz	w1, .L926
+	cbnz	w1, .L941
 	add	w19, w19, w19, lsl 1
 	asr	w19, w19, 2
-.L927:
+.L942:
 	adrp	x21, .LANCHOR6
 	add	x21, x21, :lo12:.LANCHOR6
 	add	x21, x21, x20, sxtw 4
 	mov	w23, 0
 	mov	w28, 137
-.L937:
+.L952:
 	mov	w0, w20
 	bl	NandcWaitFlashReady
 	ldrb	w4, [x21, 8]
@@ -6393,11 +6438,11 @@ MicronReadRetrial:
 	mov	w22, 0
 	mov	w26, -1
 	add	x27, x8, x4, lsl 8
-.L928:
+.L943:
 	ldrb	w0, [x7]
 	cmp	w22, w0
-	bcc	.L932
-.L931:
+	bcc	.L947
+.L946:
 	add	x4, x8, x4, lsl 8
 	mov	w0, 239
 	str	x4, [x29, 120]
@@ -6411,14 +6456,14 @@ MicronReadRetrial:
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
 	str	wzr, [x4, 2048]
-	bcc	.L933
+	bcc	.L948
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L933:
+.L948:
 	cmp	w26, 256
 	ccmn	w26, #1, 4, ne
-	bne	.L934
+	bne	.L949
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC13
 	mov	w4, w26
@@ -6426,22 +6471,22 @@ MicronReadRetrial:
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-	cbnz	w23, .L935
+	cbnz	w23, .L950
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L925
+	cbz	w0, .L940
 	cmn	w26, #1
-	bne	.L925
+	bne	.L940
 	mov	w1, 3
 	mov	w0, w20
 	mov	w23, 1
 	bl	micron_auto_read_calibration_config
-	b	.L937
-.L926:
+	b	.L952
+.L941:
 	mov	w0, 3
 	sdiv	w19, w19, w0
-	b	.L927
-.L932:
+	b	.L942
+.L947:
 	mov	w0, 239
 	str	w0, [x27, 2056]
 	str	w28, [x27, 2052]
@@ -6464,29 +6509,29 @@ MicronReadRetrial:
 	ldr	w10, [x29, 120]
 	ldp	x4, x7, [x29, 96]
 	ldr	x8, [x29, 112]
-	beq	.L929
+	beq	.L944
 	cmn	w26, #1
 	csel	w26, w26, w0, ne
 	cmp	w0, w19
-	bcc	.L939
+	bcc	.L954
 	mov	x25, 0
 	mov	x24, 0
-.L929:
+.L944:
 	mov	w22, w10
-	b	.L928
-.L939:
+	b	.L943
+.L954:
 	mov	w26, w0
 	mov	x25, 0
 	mov	x24, 0
-	b	.L931
-.L935:
+	b	.L946
+.L950:
 	mov	w0, w20
 	mov	w1, 0
 	bl	micron_auto_read_calibration_config
 	cmn	w26, #1
 	mov	w0, 256
 	csel	w26, w26, w0, eq
-.L925:
+.L940:
 	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6495,13 +6540,13 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L934:
-	cbz	w23, .L925
+.L949:
+	cbz	w23, .L940
 	mov	w1, 0
 	mov	w0, w20
 	mov	w26, 256
 	bl	micron_auto_read_calibration_config
-	b	.L925
+	b	.L940
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6529,9 +6574,9 @@ HynixReadRetrial:
 	ldrb	w20, [x0, 12]
 	ldrb	w1, [x1, 19]
 	cmp	w1, 7
-	bne	.L951
+	bne	.L966
 	ldrb	w20, [x0, 20]
-.L951:
+.L966:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
@@ -6540,27 +6585,27 @@ HynixReadRetrial:
 	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
 	mov	w21, -1
-.L952:
+.L967:
 	cmp	w4, w24
-	bcc	.L957
-.L956:
+	bcc	.L972
+.L971:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
 	cmp	w0, 7
-	bne	.L958
+	bne	.L973
 	strb	w20, [x19, 20]
-.L959:
+.L974:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w21, w0, lsr 2
-	bcc	.L950
+	bcc	.L965
 	cmn	w21, #1
 	mov	w0, 256
 	csel	w21, w21, w0, eq
-.L950:
+.L965:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6569,7 +6614,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L957:
+.L972:
 	add	w20, w20, 1
 	ldrb	w1, [x6, 1]
 	and	w20, w20, 255
@@ -6591,24 +6636,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L954
+	beq	.L969
 	ldrb	w1, [x5]
 	cmn	w21, #1
 	csel	w21, w21, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L961
+	bcc	.L976
 	mov	x27, 0
 	mov	x26, 0
-.L954:
+.L969:
 	add	w4, w4, 1
-	b	.L952
-.L961:
+	b	.L967
+.L976:
 	mov	w21, w0
-	b	.L956
-.L958:
+	b	.L971
+.L973:
 	strb	w20, [x19, 12]
-	b	.L959
+	b	.L974
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6626,19 +6671,19 @@ FlashProgPage:
 	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L969
+	bne	.L984
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L969
+	bls	.L984
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L970
+	cbnz	w0, .L985
 	sub	w21, w21, #2
-.L969:
+.L984:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6669,9 +6714,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L970:
+.L985:
 	mov	w21, 4
-	b	.L969
+	b	.L984
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6761,7 +6806,7 @@ FlashSavePhyInfo:
 	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L975:
+.L990:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6788,30 +6833,30 @@ FlashSavePhyInfo:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L973
+	beq	.L988
 	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L973
+	bne	.L988
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L973
+	bne	.L988
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
 	adrp	x0, .LANCHOR148
 	str	w20, [x0, #:lo12:.LANCHOR148]
-	beq	.L976
+	beq	.L991
 	mov	w23, 1
-.L973:
+.L988:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L975
-.L974:
+	bne	.L990
+.L989:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6822,9 +6867,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L976:
+.L991:
 	mov	w23, 2
-	b	.L974
+	b	.L989
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6855,10 +6900,10 @@ FlashReadIdbDataRaw:
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
 	cmp	w2, w1
-	bne	.L983
+	bne	.L998
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L983:
+.L998:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6870,11 +6915,11 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L984:
+.L999:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L989
-.L988:
+	bcc	.L1004
+.L1003:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
@@ -6882,10 +6927,10 @@ FlashReadIdbDataRaw:
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L982
+	bne	.L997
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L982:
+.L997:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6894,10 +6939,10 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L989:
+.L1004:
 	mov	x4, 0
 	adrp	x25, .LANCHOR147
-.L986:
+.L1001:
 	ldrb	w5, [x4, x27]
 	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
@@ -6912,24 +6957,24 @@ FlashReadIdbDataRaw:
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L985
+	bne	.L1000
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L986
-.L987:
+	bne	.L1001
+.L1002:
 	add	w19, w19, 1
-	b	.L984
-.L992:
+	b	.L999
+.L1007:
 	mov	w20, 0
-	b	.L988
-.L985:
+	b	.L1003
+.L1000:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L987
+	bne	.L1002
 	mov	w1, w5
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
@@ -6944,11 +6989,11 @@ FlashReadIdbDataRaw:
 	adrp	x0, .LANCHOR149
 	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L992
+	bcs	.L1007
 	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L987
+	b	.L1002
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -6969,44 +7014,44 @@ FlashPageProgMsbFFData:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x0, 19]
-	cbz	w3, .L996
+	cbz	w3, .L1011
 	adrp	x2, .LANCHOR29
 	ldr	w3, [x2, #:lo12:.LANCHOR29]
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	cmp	w3, w2
-	beq	.L995
-.L996:
+	beq	.L1010
+.L1011:
 	sub	w0, w0, #5
 	and	w0, w0, 255
 	cmp	w0, 63
-	bhi	.L995
+	bhi	.L1010
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x0
-	tbz	x0, 0, .L995
+	tbz	x0, 0, .L1010
 	adrp	x20, .LANCHOR120
 	mov	w24, w1
 	add	x20, x20, :lo12:.LANCHOR120
 	mov	w23, 65535
 	adrp	x25, .LANCHOR153
-.L998:
+.L1013:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L999
-.L995:
+	bhi	.L1014
+.L1010:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L999:
+.L1014:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w23
-	bne	.L995
+	bne	.L1010
 	ldr	x0, [x25, #:lo12:.LANCHOR153]
 	mov	w2, 32768
 	mov	w1, 255
@@ -7018,7 +7063,7 @@ FlashPageProgMsbFFData:
 	mov	w0, w21
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L998
+	b	.L1013
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -7035,16 +7080,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1005
+	bls	.L1020
 	cmp	w1, 575
-	bhi	.L1006
+	bhi	.L1021
 	adrp	x0, .LANCHOR154
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
 	str	w2, [x0, #:lo12:.LANCHOR154]
 	adrp	x0, idb_buf
-	bhi	.L1007
+	bhi	.L1022
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -7052,9 +7097,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1057:
+.L1072:
 	bl	ftl_memcpy
-.L1040:
+.L1055:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -7063,7 +7108,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1007:
+.L1022:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -7073,15 +7118,15 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1057
-.L1005:
+	b	.L1072
+.L1020:
 	cmp	w1, 575
-	bls	.L1040
-.L1006:
+	bls	.L1055
+.L1021:
 	adrp	x0, .LANCHOR154
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR154]
-	cbz	w1, .L1040
+	cbz	w1, .L1055
 	adrp	x21, .LANCHOR18
 	adrp	x1, idb_buf+262140
 	adrp	x25, idb_buf
@@ -7098,9 +7143,9 @@ idb_write_data:
 	udiv	w0, w0, w20
 	str	w0, [x29, 172]
 	mov	w0, 0
-.L1011:
+.L1026:
 	ldr	w4, [x1]
-	cbnz	w4, .L1009
+	cbnz	w4, .L1024
 	ldr	w4, [x5, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w4, [x1], -4
@@ -7108,8 +7153,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1011
-.L1009:
+	bne	.L1026
+.L1024:
 	add	x0, x25, :lo12:idb_buf
 	mov	w3, 512
 	mov	w23, 0
@@ -7126,19 +7171,19 @@ idb_write_data:
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 160]
-.L1012:
+.L1027:
 	cmp	w24, 15
-	bls	.L1030
-	cbnz	w23, .L1032
+	bls	.L1045
+	cbnz	w23, .L1047
 	adrp	x0, .LC17
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC17
 	bl	printf
-.L1032:
+.L1047:
 	ldr	x0, [x29, 112]
 	str	wzr, [x0, #:lo12:.LANCHOR154]
-	b	.L1040
-.L1030:
+	b	.L1055
+.L1045:
 	adrp	x27, gp_flash_check_buf
 	mov	x2, 512
 	mov	w1, 0
@@ -7153,21 +7198,21 @@ idb_write_data:
 	mul	w26, w22, w26
 	and	w26, w26, 65535
 	cmp	w26, 511
-	bhi	.L1013
+	bhi	.L1028
 	add	w0, w26, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1013:
+.L1028:
 	udiv	w4, w19, w26
 	adrp	x5, .LANCHOR8
 	add	x5, x5, :lo12:.LANCHOR8
 	mov	x28, 0
 	msub	w4, w4, w26, w19
 	sub	w26, w19, w4
-.L1014:
+.L1029:
 	add	x6, x25, :lo12:idb_buf
 	cmp	x28, 128
 	add	x6, x6, x28, lsl 11
-	bne	.L1018
+	bne	.L1033
 	ldr	x0, [x21, #:lo12:.LANCHOR18]
 	mov	w26, 0
 	ldr	x1, [x29, 136]
@@ -7185,9 +7230,9 @@ idb_write_data:
 	str	w0, [x29, 128]
 	mul	w0, w22, w28
 	ubfx	x0, x0, 2, 2
-.L1019:
+.L1034:
 	cmp	w26, 511
-	bhi	.L1026
+	bhi	.L1041
 	ldr	x3, [x29, 104]
 	mov	w1, 4
 	sub	w1, w1, w0
@@ -7198,14 +7243,14 @@ idb_write_data:
 	lsr	w2, w2, 2
 	ldrb	w3, [x3]
 	ldrh	w1, [x1, w2, sxtw 1]
-	cbz	w3, .L1020
+	cbz	w3, .L1035
 	adrp	x3, .LANCHOR29
 	mov	w4, 12336
 	movk	w4, 0x5638, lsl 16
 	ldr	w3, [x3, #:lo12:.LANCHOR29]
 	cmp	w3, w4
 	csel	w1, w1, w2, ne
-.L1020:
+.L1035:
 	ldr	w2, [x29, 128]
 	add	w0, w0, w2
 	madd	w3, w28, w1, w0
@@ -7221,11 +7266,11 @@ idb_write_data:
 	mul	w0, w0, w1
 	mul	w0, w0, w4
 	cmp	w3, w0
-	bcs	.L1021
+	bcs	.L1036
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	bl	FlashBchSel
-.L1021:
+.L1036:
 	mov	w0, 0
 	bl	flash_boot_enter_slc_mode
 	udiv	w1, w3, w4
@@ -7236,11 +7281,11 @@ idb_write_data:
 	bl	FlashReadPage
 	mov	w3, w0
 	cmn	w0, #1
-	bne	.L1022
+	bne	.L1037
 	adrp	x0, .LANCHOR152
 	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	cmp	w0, 40
-	beq	.L1022
+	beq	.L1037
 	mov	w0, 40
 	bl	FlashBchSel
 	ldr	w1, [x29, 168]
@@ -7249,26 +7294,26 @@ idb_write_data:
 	mov	w0, 0
 	bl	FlashReadPage
 	mov	w3, w0
-.L1022:
+.L1037:
 	mov	w0, 0
 	bl	flash_boot_exit_slc_mode
 	ldrb	w0, [x29, 124]
 	bl	FlashBchSel
 	cmn	w3, #1
-	bne	.L1023
-.L1026:
+	bne	.L1038
+.L1041:
 	ldr	x0, [x29, 136]
 	add	x1, x25, :lo12:idb_buf
 	mov	x22, 0
 	add	x26, x0, :lo12:gp_flash_check_buf
-.L1024:
+.L1039:
 	lsl	x0, x22, 2
 	mov	w27, w22
 	add	x28, x0, x1
 	ldr	w2, [x0, x26]
 	ldr	w0, [x0, x1]
 	cmp	w2, w0
-	beq	.L1027
+	beq	.L1042
 	mov	x2, 512
 	mov	w1, 0
 	mov	x0, x26
@@ -7284,48 +7329,48 @@ idb_write_data:
 	bl	FW_FlashBlockErase.constprop.41
 	ldr	w0, [x29, 172]
 	cmp	w0, 1
-	bls	.L1028
+	bls	.L1043
 	add	w0, w20, w19
 	bl	FW_FlashBlockErase.constprop.41
-.L1028:
+.L1043:
 	ldr	w0, [x29, 172]
 	add	w24, w24, w0
 	ldr	w0, [x29, 120]
 	add	w19, w19, w0
-	b	.L1012
-.L1018:
+	b	.L1027
+.L1033:
 	add	w1, w4, w28, lsl 2
 	lsr	w1, w1, 2
-	cbz	w1, .L1015
+	cbz	w1, .L1030
 	ldr	x0, [x29, 160]
 	add	w2, w1, 1
 	ldrb	w3, [x5]
 	ldrh	w0, [x0, w2, sxtw 1]
-	cbz	w3, .L1016
+	cbz	w3, .L1031
 	adrp	x3, .LANCHOR29
 	mov	w7, 12336
 	movk	w7, 0x5638, lsl 16
 	ldr	w3, [x3, #:lo12:.LANCHOR29]
 	cmp	w3, w7
 	csel	w0, w0, w2, ne
-.L1016:
+.L1031:
 	lsl	w0, w0, 2
 	sub	w0, w0, #4
 	str	w0, [x29, 176]
-.L1015:
+.L1030:
 	mov	w0, 61424
 	str	w0, [x29, 180]
 	ldr	x0, [x29, 160]
 	ldrh	w27, [x0, w1, sxtw 1]
 	ldrb	w0, [x5]
-	cbz	w0, .L1017
+	cbz	w0, .L1032
 	adrp	x0, .LANCHOR29
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	cmp	w0, w2
 	csel	w27, w27, w1, ne
-.L1017:
+.L1032:
 	adrp	x0, .LANCHOR33
 	madd	w8, w22, w27, w26
 	str	x5, [x29, 128]
@@ -7356,8 +7401,8 @@ idb_write_data:
 	bl	FlashPageProgMsbFFData
 	ldr	w4, [x29, 168]
 	ldr	x5, [x29, 128]
-	b	.L1014
-.L1023:
+	b	.L1029
+.L1038:
 	ldr	x0, [x29, 144]
 	ubfiz	x0, x0, 9, 16
 	add	x27, x27, x0
@@ -7365,15 +7410,15 @@ idb_write_data:
 	add	w26, w0, w26
 	mov	w0, 0
 	and	w26, w26, 65535
-	b	.L1019
-.L1027:
+	b	.L1034
+.L1042:
 	add	x22, x22, 1
 	cmp	x22, 65536
-	bne	.L1024
+	bne	.L1039
 	add	w23, w23, 1
 	cmp	w23, 5
-	bls	.L1028
-	b	.L1032
+	bls	.L1043
+	b	.L1047
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7437,10 +7482,10 @@ NandcInit:
 	ldr	w2, [x0, 352]
 	str	w2, [x4, #:lo12:.LANCHOR29]
 	cmp	w2, 2049
-	bne	.L1062
+	bne	.L1077
 	mov	w2, 8
 	str	w2, [x3, #:lo12:.LANCHOR34]
-.L1062:
+.L1077:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -7757,36 +7802,36 @@ FtlMemInit:
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L1065:
+.L1080:
 	cmp	w0, w7
-	bcc	.L1066
+	bcc	.L1081
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR75
 	mov	x3, 0
-.L1067:
+.L1082:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L1068
+	bne	.L1083
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1066:
+.L1081:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L1065
-.L1068:
+	b	.L1080
+.L1083:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L1067
+	b	.L1082
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7874,9 +7919,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC20
-.L1078:
+.L1093:
 	cmp	x25, x19
-	bne	.L1084
+	bne	.L1099
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
@@ -7888,38 +7933,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1084:
-	cbnz	w20, .L1079
+.L1099:
+	cbnz	w20, .L1094
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1079:
+.L1094:
 	cmp	w24, 4
-	bne	.L1080
+	bne	.L1095
 	ldr	w1, [x22, x19, lsl 2]
-.L1086:
+.L1101:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1083
+	bls	.L1098
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC20
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1083:
+.L1098:
 	add	x19, x19, 1
-	b	.L1078
-.L1080:
+	b	.L1093
+.L1095:
 	cmp	w24, 2
-	bne	.L1082
+	bne	.L1097
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1086
-.L1082:
+	b	.L1101
+.L1097:
 	ldrb	w1, [x22, x19]
-	b	.L1086
+	b	.L1101
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7946,18 +7991,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1088
+	bne	.L1103
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR196+17]
-.L1144:
+.L1159:
 	mov	w27, 7
-	b	.L1179
-.L1088:
+	b	.L1194
+.L1103:
 	cmp	w26, 3
-	bne	.L1090
+	bne	.L1105
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7973,14 +8018,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1180:
+.L1195:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1089:
+.L1104:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1094
+	bhi	.L1109
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -7988,11 +8033,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1095:
+.L1110:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1101
-.L1102:
+	bhi	.L1116
+.L1117:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -8003,9 +8048,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1090:
+.L1105:
 	cmp	w26, 4
-	bne	.L1091
+	bne	.L1106
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -8018,10 +8063,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1180
-.L1091:
+	b	.L1195
+.L1106:
 	cmp	w26, 5
-	bne	.L1092
+	bne	.L1107
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -8031,12 +8076,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1179:
+.L1194:
 	mov	w28, 4
-	b	.L1089
-.L1092:
+	b	.L1104
+.L1107:
 	cmp	w26, 6
-	bne	.L1093
+	bne	.L1108
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -8046,10 +8091,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1179
-.L1093:
+	b	.L1194
+.L1108:
 	cmp	w26, 7
-	bne	.L1144
+	bne	.L1159
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -8072,8 +8117,8 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1089
-.L1101:
+	b	.L1104
+.L1116:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -8087,7 +8132,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1096:
+.L1111:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -8102,15 +8147,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1096
+	bhi	.L1111
 	adrp	x2, .LANCHOR196
 	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1099:
+.L1114:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1098:
+.L1113:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -8119,10 +8164,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1098
+	bne	.L1113
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1099
+	bne	.L1114
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8132,11 +8177,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1095
-.L1094:
+	b	.L1110
+.L1109:
 	sub	w0, w26, #3
 	cmp	w0, 4
-	bhi	.L1102
+	bhi	.L1117
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -8153,11 +8198,11 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1103:
+.L1118:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1102
+	bls	.L1117
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -8174,37 +8219,37 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1104
+	beq	.L1119
 	ubfiz	x0, x22, 6, 8
 	add	x0, x0, 20
-.L1181:
+.L1196:
 	add	x3, x1, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1106
+	bne	.L1121
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1182:
+.L1197:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1183
-.L1104:
+	b	.L1198
+.L1119:
 	mov	x3, 28
 	mov	w0, 160
 	umaddl	x0, w0, w22, x3
-	b	.L1181
-.L1106:
+	b	.L1196
+.L1121:
 	cmp	w25, 1
-	bhi	.L1108
+	bhi	.L1123
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1183:
+.L1198:
 	str	w0, [x19, 2048]
 	mov	w0, 22
 	str	w0, [x19, 2056]
@@ -8218,10 +8263,10 @@ HynixGetReadRetryDefault:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1109
+	bne	.L1124
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1110:
+.L1125:
 	mov	w7, 2
 	str	w7, [x19, 2052]
 	str	wzr, [x19, 2052]
@@ -8233,120 +8278,120 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1145
+	bls	.L1160
 	ldr	w7, [x29, 136]
 	cmp	w26, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L1111:
+.L1126:
 	adrp	x8, .LANCHOR147
 	mov	x7, 0
 	ldr	x0, [x8, #:lo12:.LANCHOR147]
-.L1112:
+.L1127:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1112
+	bhi	.L1127
 	cmp	w26, 7
-	bne	.L1113
+	bne	.L1128
 	mov	w1, 0
-.L1115:
+.L1130:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1114
+	beq	.L1129
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1114
+	beq	.L1129
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1115
-.L1116:
+	bne	.L1130
+.L1131:
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1118:
-	b	.L1118
-.L1108:
+.L1133:
+	b	.L1133
+.L1123:
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1182
-.L1109:
+	b	.L1197
+.L1124:
 	str	wzr, [x19, 2052]
-	b	.L1110
-.L1145:
+	b	.L1125
+.L1160:
 	mov	w1, 16
-	b	.L1111
-.L1114:
+	b	.L1126
+.L1129:
 	cmp	w1, 6
-	bhi	.L1116
-.L1117:
+	bhi	.L1131
+.L1132:
 	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1122:
+.L1137:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1123
+	bgt	.L1138
 	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1125:
+.L1140:
 	mov	x0, 0
-.L1124:
+.L1139:
 	ldr	w11, [x8, x0, lsl 2]
 	mvn	w11, w11
 	str	w11, [x8, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1124
+	bgt	.L1139
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 2
-	bne	.L1125
+	bne	.L1140
 	mov	x11, x1
 	mov	w12, 0
 	mov	w16, 1
-.L1131:
+.L1146:
 	mov	w8, 0
 	mov	w0, 0
-.L1130:
+.L1145:
 	mov	x15, x11
 	lsl	w10, w16, w0
 	mov	w14, 16
 	mov	w13, 0
-.L1128:
+.L1143:
 	ldr	w17, [x15]
 	add	x15, x15, x24
 	bics	wzr, w10, w17
 	cinc	w13, w13, eq
 	subs	w14, w14, #1
-	bne	.L1128
+	bne	.L1143
 	cmp	w13, 9
 	orr	w10, w8, w10
 	add	w0, w0, 1
 	csel	w8, w10, w8, cs
 	cmp	w0, 32
-	bne	.L1130
+	bne	.L1145
 	str	w8, [x11], 4
 	add	w12, w12, 1
 	cmp	w23, w12
-	bgt	.L1131
+	bgt	.L1146
 	mov	x0, 0
 	mov	w8, 0
-.L1134:
+.L1149:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1134
+	bne	.L1149
 	cmp	w8, 7
-	ble	.L1135
+	ble	.L1150
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC22
@@ -8356,64 +8401,64 @@ HynixGetReadRetryDefault:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1136:
-	b	.L1136
-.L1113:
+.L1151:
+	b	.L1151
+.L1128:
 	cmp	w26, 6
-	bne	.L1117
+	bne	.L1132
 	mov	x1, 0
-.L1119:
+.L1134:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1117
+	beq	.L1132
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1117
+	beq	.L1132
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1119
+	bne	.L1134
 	adrp	x0, .LC21
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1121:
-	b	.L1121
-.L1123:
+.L1136:
+	b	.L1136
+.L1138:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1122
-.L1135:
+	b	.L1137
+.L1150:
 	cmp	w26, 6
-	beq	.L1147
+	beq	.L1162
 	cmp	w26, 7
 	mov	x1, 8
 	mov	x0, 10
 	csel	x0, x0, x1, eq
-.L1137:
+.L1152:
 	mov	x1, x3
 	mov	w8, 0
-.L1138:
+.L1153:
 	mov	x3, 0
-.L1139:
+.L1154:
 	ldrb	w10, [x7, x3]
 	strb	w10, [x1, x3]
 	add	x3, x3, 1
 	cmp	w28, w3, uxtb
-	bhi	.L1139
+	bhi	.L1154
 	ldr	x2, [x29, 112]
 	add	w8, w8, 1
 	add	x1, x1, x0
 	cmp	w27, w8
 	add	x7, x7, x2
-	bgt	.L1138
+	bgt	.L1153
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1141
+	bhi	.L1156
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -8425,19 +8470,19 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1142:
+.L1157:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1103
-.L1147:
+	b	.L1118
+.L1162:
 	mov	x0, 4
-	b	.L1137
-.L1141:
+	b	.L1152
+.L1156:
 	mov	w0, 56
 	str	w0, [x19, 2056]
-	b	.L1142
+	b	.L1157
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -8445,14 +8490,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1184
+	cbz	w0, .L1199
 	sub	w2, w0, #1
 	cmp	w2, 6
-	bhi	.L1186
+	bhi	.L1201
 	b	HynixGetReadRetryDefault
-.L1186:
+.L1201:
 	cmp	w0, 49
-	bne	.L1187
+	bne	.L1202
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8463,41 +8508,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR14
 	add	x1, x1, :lo12:.LANCHOR14
 	mov	w2, 64
-.L1196:
+.L1211:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1187:
+.L1202:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1188
+	bhi	.L1203
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1197:
+.L1212:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR10
 	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1196
-.L1188:
+	b	.L1211
+.L1203:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1189
+	bne	.L1204
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1197
-.L1189:
+	b	.L1212
+.L1204:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1184
+	bne	.L1199
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8508,8 +8553,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1196
-.L1184:
+	b	.L1211
+.L1199:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8575,7 +8620,7 @@ FlashInit:
 	mov	x27, x19
 	add	x0, x26, :lo12:.LC23
 	str	x0, [x29, 104]
-.L1203:
+.L1218:
 	and	w26, w28, 255
 	mov	w0, w26
 	bl	FlashReset
@@ -8610,7 +8655,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1199
+	bhi	.L1214
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8619,35 +8664,35 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 104]
 	bl	printf
-.L1199:
-	cbnz	w28, .L1200
+.L1214:
+	cbnz	w28, .L1215
 	ldrb	w0, [x27]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1241
+	bhi	.L1256
 	ldrb	w0, [x27, 1]
 	cmp	w0, 255
-	beq	.L1241
-.L1200:
+	beq	.L1256
+.L1215:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1202
+	bne	.L1217
 	mov	w0, 44
 	strb	w0, [x19]
-.L1202:
+.L1217:
 	add	w28, w28, 1
 	add	x25, x25, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1203
+	bne	.L1218
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1204
+	beq	.L1219
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1204:
+.L1219:
 	mov	w2, 852
 	adrp	x26, .LANCHOR20
 	mov	w1, 0
@@ -8662,18 +8707,18 @@ FlashInit:
 	ldrb	w2, [x0, 1]
 	strb	wzr, [x27, #:lo12:.LANCHOR5]
 	cmp	w2, 161
-	beq	.L1205
+	beq	.L1220
 	cmp	w2, 218
-	beq	.L1205
+	beq	.L1220
 	and	w1, w2, -33
 	cmp	w1, 209
-	beq	.L1205
+	beq	.L1220
 	cmp	w2, 220
-	bne	.L1206
+	bne	.L1221
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1206
-.L1205:
+	bne	.L1221
+.L1220:
 	mov	w0, 1
 	adrp	x25, .LANCHOR200
 	add	x1, x25, :lo12:.LANCHOR200
@@ -8686,31 +8731,31 @@ FlashInit:
 	strb	w0, [x1, 1]
 	strb	w2, [x1, 2]
 	cmp	w0, 152
-	bne	.L1207
+	bne	.L1222
 	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1207
+	tbnz	w0, #31, .L1222
 	mov	w0, 24
 	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1207:
+.L1222:
 	adrp	x0, .LANCHOR29
 	mov	w1, 12336
 	movk	w1, 0x5638, lsl 16
 	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	cmp	w0, 2049
 	ccmp	w0, w1, 4, ne
-	bne	.L1208
+	bne	.L1223
 	mov	w0, 16
 	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1208:
+.L1223:
 	cmp	w2, 218
-	bne	.L1209
+	bne	.L1224
 	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1279:
+.L1294:
 	strb	w1, [x0, 2]
-.L1210:
+.L1225:
 	adrp	x1, .LANCHOR143
 	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
@@ -8722,29 +8767,29 @@ FlashInit:
 	add	x1, x25, :lo12:.LANCHOR200
 	add	x0, x28, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1206:
+.L1221:
 	ldrb	w0, [x22, #:lo12:.LANCHOR1]
 	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1212
+	cbnz	w0, .L1227
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1214
+	cbnz	w0, .L1229
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
 	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1214
+	tbnz	x1, 0, .L1229
 	mov	w1, 1
 	strb	w1, [x21, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1214:
+.L1229:
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
 	strb	w0, [x25, #:lo12:.LANCHOR8]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1212
+	cbz	w0, .L1227
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC24
@@ -8752,7 +8797,7 @@ FlashInit:
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1198
+	beq	.L1213
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
@@ -8763,28 +8808,28 @@ FlashInit:
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1217
+	blt	.L1232
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1218
-.L1217:
+	bge	.L1233
+.L1232:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1218:
+.L1233:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1219
+	beq	.L1234
 	bl	FlashSavePhyInfo
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1219:
+.L1234:
 	bl	FlashSavePhyInfo
-.L1212:
+.L1227:
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w0, [x2, 26]
@@ -8810,7 +8855,7 @@ FlashInit:
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1221
+	tbz	x1, 6, .L1236
 	adrp	x1, .LANCHOR11
 	ldrb	w0, [x0, 19]
 	adrp	x3, .LANCHOR13
@@ -8825,69 +8870,69 @@ FlashInit:
 	and	w4, w4, 255
 	cmp	w4, 6
 	mov	x4, x3
-	bhi	.L1222
+	bhi	.L1237
 	adrp	x2, HynixReadRetrial
 	add	x2, x2, :lo12:HynixReadRetrial
 	str	x2, [x27, #:lo12:.LANCHOR145]
 	sub	w2, w0, #5
 	and	w2, w2, 255
 	cmp	w2, 1
-	bhi	.L1223
+	bhi	.L1238
 	adrp	x2, .LANCHOR36
 	add	x1, x1, 20
 	mov	w3, 1
 	str	w3, [x2, #:lo12:.LANCHOR36]
-.L1224:
+.L1239:
 	mov	x2, 0
 	mov	w3, 0
-.L1226:
+.L1241:
 	ldrsb	w4, [x1, x2]
 	add	x2, x2, 1
 	cmp	w4, 0
 	cinc	w3, w3, eq
 	cmp	x2, 32
-	bne	.L1226
+	bne	.L1241
 	cmp	w3, 27
-	bls	.L1221
+	bls	.L1236
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1221:
+.L1236:
 	adrp	x0, .LANCHOR29
 	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1235
+	bne	.L1250
 	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1235
+	cbz	w0, .L1250
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1235:
+.L1250:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1236
+	bne	.L1251
 	ldrb	w0, [x21, #:lo12:.LANCHOR30]
-	cbz	w0, .L1236
+	cbz	w0, .L1251
 	strb	wzr, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1236:
+.L1251:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1237
+	beq	.L1252
 	ldrb	w1, [x21, #:lo12:.LANCHOR30]
-	cbnz	w1, .L1238
-	tbnz	x0, 0, .L1237
-.L1238:
+	cbnz	w1, .L1253
+	tbnz	x0, 0, .L1252
+.L1253:
 	adrp	x0, .LANCHOR148
 	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1237:
+.L1252:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
@@ -8930,7 +8975,7 @@ FlashInit:
 	strh	w1, [x0, 22]
 	ldrb	w5, [x22, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1239
+	bne	.L1254
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8939,11 +8984,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1239:
+.L1254:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1198:
+.L1213:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8951,90 +8996,90 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1209:
+.L1224:
 	cmp	w2, 220
-	bne	.L1210
+	bne	.L1225
 	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1279
-.L1223:
+	b	.L1294
+.L1238:
 	add	x2, x1, 20
 	cmp	w0, 7
 	add	x1, x1, 28
 	csel	x1, x1, x2, eq
-	b	.L1224
-.L1222:
+	b	.L1239
+.L1237:
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L1228
+	bhi	.L1243
 	adrp	x1, MicronReadRetrial
 	add	x1, x1, :lo12:MicronReadRetrial
 	str	x1, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	beq	.L1229
-.L1283:
+	beq	.L1244
+.L1298:
 	mov	w0, 7
-	b	.L1281
-.L1229:
+	b	.L1296
+.L1244:
 	mov	w0, 15
-.L1281:
+.L1296:
 	strb	w0, [x2, #:lo12:.LANCHOR151]
-	b	.L1221
-.L1228:
+	b	.L1236
+.L1243:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L1230
+	bhi	.L1245
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
 	str	x0, [x27, #:lo12:.LANCHOR145]
 	mov	w0, 4
 	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1283
-.L1230:
+	b	.L1298
+.L1245:
 	sub	w3, w0, #34
 	sub	w1, w0, #67
 	and	w3, w3, 255
 	and	w1, w1, 255
 	cmp	w3, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L1231
+	bhi	.L1246
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
 	str	x3, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1232
+	beq	.L1247
 	mov	w0, 7
-.L1280:
+.L1295:
 	strb	w0, [x2, #:lo12:.LANCHOR151]
 	cmp	w1, 1
-	bhi	.L1234
+	bhi	.L1249
 	mov	w0, 4
-.L1282:
+.L1297:
 	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1221
-.L1232:
+	b	.L1236
+.L1247:
 	mov	w0, 17
-	b	.L1280
-.L1234:
+	b	.L1295
+.L1249:
 	mov	w0, 5
-	b	.L1282
-.L1231:
+	b	.L1297
+.L1246:
 	cmp	w0, 49
-	bne	.L1221
+	bne	.L1236
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
 	str	x0, [x27, #:lo12:.LANCHOR145]
-	b	.L1221
-.L1241:
+	b	.L1236
+.L1256:
 	mov	w0, -2
-	b	.L1198
+	b	.L1213
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -9059,9 +9104,9 @@ FlashReadSlc2KPages:
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1285:
+.L1300:
 	cmp	x22, x19
-	bne	.L1297
+	bne	.L1312
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9070,7 +9115,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1297:
+.L1312:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -9080,15 +9125,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1286
+	bhi	.L1301
 	mov	w0, -1
 	str	w0, [x19]
-.L1287:
+.L1302:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1285
-.L1286:
+	b	.L1300
+.L1301:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -9133,51 +9178,51 @@ FlashReadSlc2KPages:
 	ldrb	w2, [x1, #:lo12:.LANCHOR33]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1290
+	bls	.L1305
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1290:
+.L1305:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1293
+	cbz	x0, .L1308
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L1293
+	bne	.L1308
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1293
+	bne	.L1308
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1293
+	beq	.L1308
 	str	w1, [x19]
-.L1293:
+.L1308:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1287
+	bne	.L1302
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1295
+	cbz	x1, .L1310
 	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1295:
+.L1310:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1287
+	cbz	x1, .L1302
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1287
+	b	.L1302
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -9194,7 +9239,7 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1316
+	cbnz	w3, .L1331
 	mov	x25, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
@@ -9210,15 +9255,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1317:
+.L1332:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1351
+	bcc	.L1366
 	mov	w0, 0
-	b	.L1315
-.L1316:
+	b	.L1330
+.L1331:
 	bl	FlashReadSlc2KPages
-.L1315:
+.L1330:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9226,7 +9271,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1351:
+.L1366:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -9242,13 +9287,13 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1319
+	bhi	.L1334
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1320:
+.L1335:
 	add	w22, w22, 1
-	b	.L1317
-.L1319:
+	b	.L1332
+.L1334:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9265,65 +9310,65 @@ FlashReadPages:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1322
+	bhi	.L1337
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x1, w19
 	add	x0, x0, x1
 	cmp	w2, 7
 	ldrb	w3, [x0, 12]
-	bne	.L1323
+	bne	.L1338
 	ldrb	w3, [x0, 20]
-.L1323:
+.L1338:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x1]
 	cmp	w0, w3
-	beq	.L1322
+	beq	.L1337
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1322:
+.L1337:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1324
+	cbz	w24, .L1339
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1324
+	cbz	w0, .L1339
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1325:
+.L1340:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1331:
+.L1346:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1326
+	bne	.L1341
 	cmp	w19, 255
-	beq	.L1353
-.L1326:
-	cbz	w20, .L1328
+	beq	.L1368
+.L1341:
+	cbz	w20, .L1343
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1329:
+.L1344:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1327
+	cbz	w20, .L1342
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1327:
+.L1342:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -9332,26 +9377,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1330
+	cbz	w0, .L1345
 	cmn	w28, #1
-	bne	.L1330
+	bne	.L1345
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1331
-.L1324:
+	b	.L1346
+.L1339:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1325
-.L1328:
+	b	.L1340
+.L1343:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1329
-.L1353:
+	b	.L1344
+.L1368:
 	mov	w20, 0
-	b	.L1327
-.L1330:
-	cbz	w20, .L1332
+	b	.L1342
+.L1345:
+	cbz	w20, .L1347
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -9370,27 +9415,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1332:
+.L1347:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1333
+	bne	.L1348
 	adrp	x0, .LANCHOR30
 	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L1334
-.L1338:
+	cbnz	w0, .L1349
+.L1353:
 	adrp	x20, .LANCHOR145
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
-	cbnz	x4, .L1335
+	cbnz	x4, .L1350
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1390
-.L1334:
+	b	.L1405
+.L1349:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -9401,36 +9446,36 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1337
+	beq	.L1352
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1354
-.L1337:
+	bls	.L1369
+.L1352:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1338
-.L1354:
+	beq	.L1353
+.L1369:
 	mov	w20, 0
-.L1333:
+.L1348:
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1339
+	bls	.L1354
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1339:
+.L1354:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1346
+	bne	.L1361
 	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
 	ldrb	w2, [x0, #:lo12:.LANCHOR33]
@@ -9438,25 +9483,25 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1346
+	cbz	x1, .L1361
 	mov	w3, 4
 	adrp	x0, .LC27
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1346:
-	cbz	w20, .L1348
+.L1361:
+	cbz	w20, .L1363
 	adrp	x0, .LANCHOR33
 	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1349
+	bls	.L1364
 	adrp	x0, .LANCHOR145
 	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1349:
+.L1364:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -9464,37 +9509,37 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1348:
+.L1363:
 	add	w22, w22, w20
-	cbz	w24, .L1320
+	cbz	w24, .L1335
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1320
+	cbz	w0, .L1335
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1320
-.L1335:
+	b	.L1335
+.L1350:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1357
+	bne	.L1372
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1340
+	bhi	.L1355
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1340:
+.L1355:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
@@ -9508,27 +9553,27 @@ FlashReadPages:
 	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1357
+	bne	.L1372
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1357
+	cbz	w0, .L1372
 	mov	w0, w19
-	cbz	w24, .L1341
+	cbz	w24, .L1356
 	bl	flash_enter_slc_mode
-.L1342:
+.L1357:
 	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1390:
+.L1405:
 	mov	w28, w0
-.L1357:
+.L1372:
 	mov	w20, 0
-	b	.L1339
-.L1341:
+	b	.L1354
+.L1356:
 	bl	flash_exit_slc_mode
-	b	.L1342
+	b	.L1357
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9555,12 +9600,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1392:
+.L1407:
 	cmp	x20, x23
-	bne	.L1398
+	bne	.L1413
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1399
-.L1418:
+	cbnz	w0, .L1414
+.L1433:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9569,7 +9614,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1398:
+.L1413:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9580,15 +9625,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1393
+	bhi	.L1408
 	mov	w0, -1
 	str	w0, [x20]
-.L1394:
+.L1409:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1392
-.L1393:
+	b	.L1407
+.L1408:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9641,30 +9686,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1397
+	tbz	x0, 0, .L1412
 	mov	w0, -1
 	str	w0, [x20]
-.L1397:
+.L1412:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1394
-.L1405:
+	b	.L1409
+.L1420:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1400
+	bne	.L1415
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1401:
+.L1416:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1419:
+.L1434:
 	cmp	x27, x20
-	bne	.L1405
-	b	.L1418
-.L1400:
+	bne	.L1420
+	b	.L1433
+.L1415:
 	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9687,45 +9732,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1402
+	bne	.L1417
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1402:
+.L1417:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1403
+	cbz	x0, .L1418
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1403
+	beq	.L1418
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1403:
+.L1418:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1401
+	cbz	x0, .L1416
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1401
+	beq	.L1416
 	ldr	w1, [x27, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1401
-.L1399:
+	b	.L1416
+.L1414:
 	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1419
+	b	.L1434
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9745,7 +9790,7 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1422
+	cbnz	w4, .L1437
 	mov	x19, x0
 	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
@@ -9755,28 +9800,28 @@ FlashProgPages:
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1423:
+.L1438:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1436
+	bcc	.L1451
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1437:
+.L1452:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1439
+	bhi	.L1454
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1440
-.L1448:
+	cbnz	w0, .L1455
+.L1463:
 	mov	w0, 0
-	b	.L1421
-.L1422:
+	b	.L1436
+.L1437:
 	bl	FlashProgSlc2KPages
-.L1421:
+.L1436:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9784,7 +9829,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1436:
+.L1451:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9798,13 +9843,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1425
+	bhi	.L1440
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1426:
+.L1441:
 	add	w21, w21, 1
-	b	.L1423
-.L1425:
+	b	.L1438
+.L1440:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9814,20 +9859,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1428
+	cbz	x1, .L1443
 	bl	FlashWaitCmdDone
-.L1428:
+.L1443:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1429
+	cbz	w23, .L1444
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1429:
+.L1444:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9837,17 +9882,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1430
+	bne	.L1445
 	bl	NandcWaitFlashReady
-.L1431:
+.L1446:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 6
-	bhi	.L1432
+	bhi	.L1447
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1432
+	cbz	w0, .L1447
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9855,17 +9900,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1432:
+.L1447:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1433
+	bne	.L1448
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1433
+	cbz	w0, .L1448
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1434:
+.L1449:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9874,7 +9919,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1435
+	cbz	w23, .L1450
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9902,15 +9947,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1435:
+.L1450:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1426
-.L1430:
+	b	.L1441
+.L1445:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9923,47 +9968,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1431
-.L1433:
+	b	.L1446
+.L1448:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1434
-.L1439:
+	b	.L1449
+.L1454:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1438
+	bne	.L1453
 	ldrb	w0, [x21]
-	cbz	w0, .L1438
+	cbz	w0, .L1453
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1438:
+.L1453:
 	add	x20, x20, 1
-	b	.L1437
-.L1440:
+	b	.L1452
+.L1455:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1441:
+.L1456:
 	cmp	x24, x19
-	beq	.L1448
+	beq	.L1463
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1442
+	bne	.L1457
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1443:
+.L1458:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1441
-.L1442:
+	b	.L1456
+.L1457:
 	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
@@ -9986,41 +10031,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1444
+	bne	.L1459
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1444:
+.L1459:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1445
+	cbz	x0, .L1460
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1445
+	beq	.L1460
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC31
 	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1445:
+.L1460:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1443
+	cbz	x0, .L1458
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1443
+	beq	.L1458
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC32
 	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1443
+	b	.L1458
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -10034,7 +10079,7 @@ FlashTestBlk:
 	adrp	x0, .LANCHOR149
 	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1476
+	bcc	.L1491
 	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
@@ -10065,14 +10110,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1474:
+.L1489:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1476:
+.L1491:
 	mov	w19, 0
-	b	.L1474
+	b	.L1489
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -10089,7 +10134,7 @@ FtlLowFormatEraseBlock:
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1501
+	cbnz	w0, .L1516
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
 	adrp	x20, .LANCHOR8
@@ -10115,10 +10160,10 @@ FtlLowFormatEraseBlock:
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1480:
+.L1495:
 	cmp	w11, w5, uxth
-	bhi	.L1484
-	cbz	w24, .L1478
+	bhi	.L1499
+	cbz	w24, .L1493
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -10131,31 +10176,31 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1487:
+.L1502:
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1486
+	bne	.L1501
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1486:
+.L1501:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1487
-	cbnz	w25, .L1488
+	bne	.L1502
+	cbnz	w25, .L1503
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1489:
+.L1504:
 	adrp	x0, .LANCHOR47
 	mov	w24, 0
 	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1497:
+.L1512:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
 	ldr	x6, [x21, #:lo12:.LANCHOR78]
@@ -10168,10 +10213,10 @@ FtlLowFormatEraseBlock:
 	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR59]
-.L1490:
+.L1505:
 	cmp	w7, w5, uxth
-	bhi	.L1493
-	cbz	w20, .L1478
+	bhi	.L1508
+	cbz	w20, .L1493
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -10183,11 +10228,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1496:
+.L1511:
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1495
+	cbz	w0, .L1510
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -10195,39 +10240,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1495:
+.L1510:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1496
+	bne	.L1511
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1497
+	bhi	.L1512
 	mov	x23, 0
-.L1499:
-	cbz	w25, .L1498
+.L1514:
+	cbz	w25, .L1513
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1498
+	cbnz	w0, .L1513
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1498:
+.L1513:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1499
+	bne	.L1514
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1478
+	beq	.L1493
 	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1478:
+.L1493:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10236,7 +10281,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1484:
+.L1499:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -10244,13 +10289,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1481
+	cbz	w25, .L1496
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1482
-.L1481:
+	cbnz	w0, .L1497
+.L1496:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1483
+	cbnz	w0, .L1498
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -10260,26 +10305,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1482:
+.L1497:
 	add	x5, x5, 1
-	b	.L1480
-.L1483:
+	b	.L1495
+.L1498:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1482
-.L1488:
+	b	.L1497
+.L1503:
 	adrp	x0, .LANCHOR54
 	ldrh	w27, [x0, #:lo12:.LANCHOR54]
 	ldrb	w0, [x20, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1502
+	cbnz	w0, .L1517
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1489
-.L1502:
+	b	.L1504
+.L1517:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1489
-.L1493:
+	b	.L1504
+.L1508:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -10289,13 +10334,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1491
+	cbz	w25, .L1506
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1492
-.L1491:
+	cbnz	w0, .L1507
+.L1506:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1492
+	cbnz	w0, .L1507
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -10305,12 +10350,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1492:
+.L1507:
 	add	x5, x5, 1
-	b	.L1490
-.L1501:
+	b	.L1505
+.L1516:
 	mov	w19, 0
-	b	.L1478
+	b	.L1493
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -10326,16 +10371,16 @@ FtlBbmTblFlush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1525
+	cbnz	w0, .L1540
 	adrp	x24, .LANCHOR188
 	adrp	x23, .LANCHOR183
-	adrp	x19, .LANCHOR202
-	add	x20, x19, :lo12:.LANCHOR202
+	adrp	x20, .LANCHOR202
+	add	x19, x20, :lo12:.LANCHOR202
 	ldr	x1, [x24, #:lo12:.LANCHOR188]
 	adrp	x21, .LANCHOR75
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	add	x26, x21, :lo12:.LANCHOR75
-	stp	x0, x1, [x20, 8]
+	stp	x0, x1, [x19, 8]
 	adrp	x1, .LANCHOR58
 	adrp	x27, .LANCHOR45
 	adrp	x28, .LANCHOR123
@@ -10346,17 +10391,17 @@ FtlBbmTblFlush:
 	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1526:
+.L1541:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1527
-	add	x19, x19, :lo12:.LANCHOR202
-	add	x20, x21, :lo12:.LANCHOR75
+	blt	.L1542
+	add	x20, x20, :lo12:.LANCHOR202
+	add	x19, x21, :lo12:.LANCHOR75
 	mov	w2, 16
 	mov	w1, 255
 	adrp	x25, .LC33
 	adrp	x27, .LANCHOR54
-	ldr	x28, [x19, 16]
+	ldr	x28, [x20, 16]
 	add	x25, x25, :lo12:.LC33
 	add	x27, x27, :lo12:.LANCHOR54
 	mov	w26, 0
@@ -10364,88 +10409,83 @@ FtlBbmTblFlush:
 	bl	ftl_memset
 	mov	w0, -3887
 	strh	w0, [x28]
-	ldr	w0, [x20, 8]
+	ldr	w0, [x19, 8]
 	str	w0, [x28, 4]
 	ldrh	w0, [x21, #:lo12:.LANCHOR75]
 	mov	w21, 0
 	strh	w0, [x28, 2]
-	ldrh	w0, [x20, 4]
+	ldrh	w0, [x19, 4]
 	strh	w0, [x28, 8]
-	ldrh	w0, [x20, 6]
+	ldrh	w0, [x19, 6]
 	strh	w0, [x28, 10]
 	adrp	x0, .LANCHOR37
 	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1528:
+.L1543:
+	ldrh	w1, [x19]
 	ldrh	w4, [x28, 10]
-	ldrh	w1, [x20]
-	ldrh	w2, [x20, 2]
-	ldrh	w3, [x20, 4]
+	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 4]
 	ldr	x0, [x23, #:lo12:.LANCHOR183]
-	str	x0, [x19, 8]
+	str	x0, [x20, 8]
 	ldr	x0, [x24, #:lo12:.LANCHOR188]
-	str	x0, [x19, 16]
+	str	x0, [x20, 16]
 	orr	w0, w2, w1, lsl 10
-	str	wzr, [x19]
-	str	w0, [x19, 4]
+	str	wzr, [x20]
+	str	w0, [x20, 4]
 	mov	x0, x25
 	bl	printf
-	mov	w3, 1
-	mov	x0, x19
-	mov	w1, w3
-	mov	w2, w3
-	bl	FlashProgPages
 	ldrh	w0, [x27]
-	ldrh	w1, [x20, 2]
+	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1529
-	ldr	w0, [x20, 8]
+	blt	.L1544
+	ldr	w0, [x19, 8]
 	mov	w2, 1
-	ldrh	w1, [x20, 4]
+	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
-	str	w0, [x20, 8]
+	str	w0, [x19, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x20]
+	ldrh	w0, [x19]
 	strh	w0, [x28, 8]
-	strh	w0, [x20, 4]
+	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR78
-	strh	w1, [x20]
+	strh	w1, [x19]
 	lsl	w1, w1, 10
 	ldr	x0, [x0, #:lo12:.LANCHOR78]
-	str	w1, [x19, 4]
-	strh	wzr, [x20, 2]
+	str	w1, [x20, 4]
+	strh	wzr, [x19, 2]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
+.L1544:
 	mov	w3, 1
-	mov	x0, x19
+	mov	x0, x20
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L1529:
-	ldrh	w0, [x20, 2]
+	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-	strh	w0, [x20, 2]
-	ldr	w0, [x19]
+	strh	w0, [x19, 2]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1530
-	ldr	w1, [x19, 4]
+	bne	.L1545
+	ldr	w1, [x20, 4]
 	add	w21, w21, 1
 	adrp	x0, .LC34
 	and	w21, w21, 65535
 	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1528
-	ldr	w1, [x19, 4]
+	bls	.L1543
+	ldr	w1, [x20, 4]
 	mov	w2, w21
 	adrp	x0, .LC35
 	add	x0, x0, :lo12:.LC35
 	bl	printf
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR77]
-.L1525:
+.L1540:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10454,20 +10494,20 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1527:
+.L1542:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
-	ldr	x0, [x20, 8]
+	ldr	x0, [x19, 8]
 	mul	w3, w2, w25
 	lsl	w2, w2, 2
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1526
-.L1530:
-	cbnz	w26, .L1525
+	b	.L1541
+.L1545:
+	cbnz	w26, .L1540
 	mov	w26, 1
-	b	.L1528
+	b	.L1543
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
@@ -10476,7 +10516,7 @@ FtlBbmTblFlush:
 allocate_data_superblock:
 	adrp	x1, .LANCHOR77
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1598
+	cbnz	w1, .L1614
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10490,17 +10530,17 @@ allocate_data_superblock:
 	add	x23, x0, :lo12:.LANCHOR89
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1589:
+.L1605:
 	ldr	x1, [x29, 120]
 	adrp	x0, .LANCHOR89
-	adrp	x25, .LANCHOR40
+	adrp	x24, .LANCHOR40
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1538
-	mov	w2, 3168
+	ble	.L1553
+	mov	w2, 3108
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10511,11 +10551,11 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1538:
+.L1553:
 	adrp	x0, .LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR94
 	cmp	x19, x0
-	bne	.L1539
+	bne	.L1554
 	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
 	ldr	w3, [x1, #:lo12:.LANCHOR172]
@@ -10526,54 +10566,54 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1540
+	cbz	w4, .L1555
 	adrp	x4, .LANCHOR170
 	ldr	w4, [x4, #:lo12:.LANCHOR170]
 	cmp	w4, 39
-	bhi	.L1540
+	bhi	.L1555
 	cmp	w4, 2
-	bls	.L1573
-	tbz	x2, 0, .L1569
-	cbz	w3, .L1573
-.L1569:
+	bls	.L1589
+	tbz	x2, 0, .L1585
+	cbz	w3, .L1589
+.L1585:
 	mov	w1, w0
-	b	.L1540
-.L1539:
+	b	.L1555
+.L1554:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1573
+	bne	.L1589
 	adrp	x0, .LANCHOR44
 	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1573
+	beq	.L1589
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1573
+	cbnz	w0, .L1589
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1540
+	cbz	w2, .L1555
 	adrp	x2, .LANCHOR170
 	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1540
+	bhi	.L1555
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1540:
-	cbz	w1, .L1541
+.L1555:
+	cbz	w1, .L1556
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1541:
+.L1556:
 	ldrb	w2, [x19, 8]
 	adrp	x0, .LANCHOR88
 	add	x0, x0, :lo12:.LANCHOR88
 	bl	List_pop_index_node
-	and	w21, w0, 65535
+	and	w22, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1542
-	mov	w2, 3188
+	cbnz	w0, .L1557
+	mov	w2, 3128
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10584,27 +10624,33 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1542:
+.L1557:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-	strh	w21, [x19]
+	ldrh	w0, [x24, #:lo12:.LANCHOR40]
+	cmp	w0, w22
+	bls	.L1605
+	adrp	x25, .LANCHOR84
+	ubfiz	x21, x22, 1, 16
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldrh	w20, [x0, x21]
+	cbnz	w20, .L1605
+	strh	w22, [x19]
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1543
-	adrp	x0, .LANCHOR84
-	ubfiz	x21, x21, 1, 16
+	cbnz	w0, .L1559
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, x21]
 	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1589
-	mov	w2, 3200
+	ble	.L1605
+	mov	w2, 3144
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10615,18 +10661,18 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1589
-.L1573:
+	b	.L1605
+.L1589:
 	mov	w1, 0
-	b	.L1541
-.L1543:
+	b	.L1556
+.L1559:
 	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1545
-	mov	w2, 3203
+	ble	.L1561
+	mov	w2, 3147
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10637,25 +10683,24 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1545:
+.L1561:
 	adrp	x1, .LANCHOR38
-	adrp	x24, .LANCHOR78
+	adrp	x25, .LANCHOR78
 	mov	w2, 56
 	mov	x3, 8
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x26, x19, 16
-	ldr	x4, [x24, #:lo12:.LANCHOR78]
+	ldr	x4, [x25, #:lo12:.LANCHOR78]
 	mov	x5, x26
-	mov	w20, 0
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1546:
+.L1562:
 	cmp	x1, x0
-	bne	.L1548
-	cbnz	w20, .L1549
-	mov	w2, 3215
+	bne	.L1564
+	cbnz	w20, .L1565
+	mov	w2, 3159
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10666,27 +10711,26 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1549:
+.L1565:
 	adrp	x0, .LANCHOR28
-	uxtw	x22, w21
 	adrp	x28, .LANCHOR79
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1550
+	cbz	w0, .L1566
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	bne	.L1550
+	bne	.L1566
 	ldr	x0, [x28, #:lo12:.LANCHOR79]
-	ldrh	w0, [x0, x22, lsl 1]
+	ldrh	w0, [x0, x21]
 	cmp	w0, 40
-	bls	.L1550
+	bls	.L1566
 	strb	wzr, [x19, 8]
-.L1550:
+.L1566:
 	adrp	x0, .LANCHOR204
 	ldrh	w0, [x0, #:lo12:.LANCHOR204]
-	cmp	w0, w21
-	bne	.L1551
-	mov	w2, 3222
+	cmp	w0, w22
+	bne	.L1567
+	mov	w2, 3166
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10697,42 +10741,40 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1551:
+.L1567:
 	ldrb	w0, [x19, 8]
 	adrp	x6, .LANCHOR48
 	adrp	x5, .LANCHOR167
 	adrp	x4, .LANCHOR168
-	cbnz	w0, .L1552
-	ldr	x2, [x28, #:lo12:.LANCHOR79]
-	lsl	x1, x22, 1
-	ldrh	w0, [x2, x1]
-	cbz	w0, .L1553
-	ldrh	w7, [x6, #:lo12:.LANCHOR48]
-	add	w0, w0, w7
-.L1601:
-	strh	w0, [x2, x1]
+	ldr	x1, [x28, #:lo12:.LANCHOR79]
+	cbnz	w0, .L1568
+	ldrh	w0, [x1, x21]
+	cbz	w0, .L1569
+	ldrh	w2, [x6, #:lo12:.LANCHOR48]
+	add	w0, w0, w2
+.L1617:
+	strh	w0, [x1, x21]
 	mov	w1, 0
 	ldr	w0, [x5, #:lo12:.LANCHOR167]
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR167]
-	mov	w0, w21
+	mov	w0, w22
 	bl	ftl_set_blk_mode
-.L1555:
+.L1571:
 	ldr	x0, [x28, #:lo12:.LANCHOR79]
-	lsl	x22, x22, 1
-	ldrh	w1, [x0, x22]
+	ldrh	w1, [x0, x21]
 	adrp	x0, .LANCHOR169
 	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1556
+	bls	.L1572
 	str	w1, [x0, #:lo12:.LANCHOR169]
-.L1556:
+.L1572:
 	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
 	ldr	w1, [x4, #:lo12:.LANCHOR168]
 	ldrh	w0, [x6, #:lo12:.LANCHOR48]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR40]
+	ldrh	w1, [x24, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR205
 	str	w0, [x1, #:lo12:.LANCHOR205]
@@ -10742,91 +10784,89 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x24, #:lo12:.LANCHOR78]
+	ldr	x0, [x25, #:lo12:.LANCHOR78]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1557:
+.L1573:
 	cmp	x1, x2
-	bne	.L1558
+	bne	.L1574
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1559
+	cbz	w1, .L1575
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1560
+	bne	.L1576
 	mov	w1, 0
-.L1602:
+.L1618:
 	bl	FlashEraseBlocks
-.L1559:
+.L1575:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x24, #:lo12:.LANCHOR78]
-	mov	x25, 0
+	ldr	x0, [x25, #:lo12:.LANCHOR78]
+	mov	x24, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1561:
-	cmp	w20, w25, uxth
-	bhi	.L1563
-	cbz	w1, .L1564
-	mov	w0, w21
+.L1577:
+	cmp	w20, w24, uxth
+	bhi	.L1579
+	cbz	w1, .L1580
+	mov	w0, w22
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1564:
+.L1580:
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR84
-	cbnz	w0, .L1565
-	ldr	x0, [x2, #:lo12:.LANCHOR84]
+	cbnz	w0, .L1581
+	adrp	x0, .LANCHOR84
 	mov	w1, -1
-	strh	w1, [x0, x22]
-	b	.L1589
-.L1548:
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
+	strh	w1, [x0, x21]
+	b	.L1605
+.L1564:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1547
+	beq	.L1563
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1547:
+.L1563:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1546
-.L1553:
+	b	.L1562
+.L1569:
 	mov	w0, 2
-	b	.L1601
-.L1552:
-	ldr	x2, [x28, #:lo12:.LANCHOR79]
-	lsl	x0, x22, 1
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
+	b	.L1617
+.L1568:
+	ldrh	w0, [x1, x21]
+	add	w0, w0, 1
+	strh	w0, [x1, x21]
 	ldr	w0, [x4, #:lo12:.LANCHOR168]
 	add	w0, w0, 1
 	str	w0, [x4, #:lo12:.LANCHOR168]
-	mov	w0, w21
+	mov	w0, w22
 	bl	ftl_set_blk_mode.part.10
-	b	.L1555
-.L1558:
+	b	.L1571
+.L1574:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1557
-.L1560:
+	b	.L1573
+.L1576:
 	mov	w1, 1
-	b	.L1602
-.L1563:
-	mul	x0, x25, x3
-	ldr	x2, [x24, #:lo12:.LANCHOR78]
+	b	.L1618
+.L1579:
+	mul	x0, x24, x3
+	ldr	x2, [x25, #:lo12:.LANCHOR78]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1562
+	bne	.L1578
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10839,32 +10879,33 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1562:
-	add	x25, x25, 1
+.L1578:
+	add	x24, x24, 1
 	add	x26, x26, 2
-	b	.L1561
-.L1565:
+	b	.L1577
+.L1581:
 	adrp	x1, .LANCHOR53
-	adrp	x3, .LANCHOR159
-	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	adrp	x2, .LANCHOR159
 	strh	wzr, [x19, 2]
-	strh	w21, [x19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	strh	w22, [x19]
+	strb	wzr, [x19, 6]
 	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR159]
+	ldr	w1, [x2, #:lo12:.LANCHOR159]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR159]
-	ldr	x1, [x2, #:lo12:.LANCHOR84]
+	str	w1, [x2, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR84
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	strh	w0, [x1, x22]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	strh	w0, [x1, x21]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1566
+	cbz	w0, .L1582
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1537
-.L1566:
-	mov	w2, 3281
+	cbnz	w0, .L1552
+.L1582:
+	mov	w2, 3225
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR203
@@ -10875,7 +10916,7 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1537:
+.L1552:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10884,7 +10925,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1598:
+.L1614:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10903,17 +10944,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1604
+	cbz	w0, .L1620
 	adrp	x23, .LANCHOR118
 	add	x24, x23, :lo12:.LANCHOR118
 	mov	w19, 0
-.L1605:
+.L1621:
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1611
+	bhi	.L1627
 	bl	FtlGcReFreshBadBlk
-.L1604:
+.L1620:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10922,7 +10963,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1611:
+.L1627:
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
@@ -10931,19 +10972,19 @@ FtlGcFreeBadSuperBlk:
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1606:
+.L1622:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1610
+	bhi	.L1626
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1605
-.L1610:
+	b	.L1621
+.L1626:
 	add	x0, x23, :lo12:.LANCHOR118
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1607
+	bne	.L1623
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10951,22 +10992,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1608:
+.L1624:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1609
+	bhi	.L1625
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1607:
+.L1623:
 	and	w20, w27, 65535
-	b	.L1606
-.L1609:
+	b	.L1622
+.L1625:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1608
+	b	.L1624
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -10981,22 +11022,22 @@ update_vpc_list:
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1617
+	cbnz	w0, .L1633
 	adrp	x0, .LANCHOR204
 	ldrh	w1, [x0, #:lo12:.LANCHOR204]
 	cmp	w1, w19
-	bne	.L1618
+	bne	.L1634
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR204]
-.L1619:
+.L1635:
 	adrp	x20, .LANCHOR86
 	mov	w1, w19
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	bl	List_remove_node
 	ldrh	w0, [x20, #:lo12:.LANCHOR86]
-	cbnz	w0, .L1621
-	mov	w2, 3392
+	cbnz	w0, .L1637
+	mov	w2, 3336
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11007,7 +11048,7 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1621:
+.L1637:
 	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR86]
@@ -11022,8 +11063,8 @@ update_vpc_list:
 	adrp	x1, .LANCHOR40
 	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1625
-	mov	w2, 3395
+	ble	.L1641
+	mov	w2, 3339
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR206
@@ -11034,32 +11075,32 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1625:
+.L1641:
 	mov	w0, 1
-	b	.L1616
-.L1618:
+	b	.L1632
+.L1634:
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1624
+	beq	.L1640
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L1624
+	beq	.L1640
 	adrp	x0, .LANCHOR94
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w19
-	bne	.L1619
-.L1624:
+	bne	.L1635
+.L1640:
 	mov	w0, 0
-.L1616:
+.L1632:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1617:
+.L1633:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1624
+	b	.L1640
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -11073,12 +11114,12 @@ decrement_vpc_count:
 	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1628
+	beq	.L1644
 	adrp	x20, .LANCHOR84
 	ubfiz	x21, x19, 1, 16
 	ldr	x1, [x20, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x21]
-	cbnz	w0, .L1629
+	cbnz	w0, .L1645
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC36
@@ -11086,8 +11127,8 @@ decrement_vpc_count:
 	bl	printf
 	ldr	x0, [x20, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, x21]
-	cbnz	w0, .L1630
-	mov	w2, 3410
+	cbnz	w0, .L1646
+	mov	w2, 3354
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11098,7 +11139,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1630:
+.L1646:
 	ldr	x0, [x20, #:lo12:.LANCHOR84]
 	adrp	x6, .LANCHOR88
 	add	x6, x6, :lo12:.LANCHOR88
@@ -11107,14 +11148,14 @@ decrement_vpc_count:
 	mov	w1, w19
 	mov	x0, x6
 	bl	test_node_in_list
-	cbz	w0, .L1631
+	cbz	w0, .L1647
 	adrp	x22, .LANCHOR89
 	mov	w1, w19
 	mov	x0, x6
 	bl	List_remove_node
 	ldrh	w0, [x22, #:lo12:.LANCHOR89]
-	cbnz	w0, .L1632
-	mov	w2, 3414
+	cbnz	w0, .L1648
+	mov	w2, 3358
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11125,7 +11166,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1632:
+.L1648:
 	ldrh	w0, [x22, #:lo12:.LANCHOR89]
 	sub	w0, w0, #1
 	strh	w0, [x22, #:lo12:.LANCHOR89]
@@ -11137,26 +11178,26 @@ decrement_vpc_count:
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L1631:
+.L1647:
 	mov	w0, w19
 	bl	FtlGcRefreshBlock
-.L1635:
+.L1651:
 	mov	w20, 0
-	b	.L1627
-.L1629:
+	b	.L1643
+.L1645:
 	sub	w0, w0, #1
 	strh	w0, [x1, x21]
-.L1628:
+.L1644:
 	adrp	x21, .LANCHOR133
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1634
+	bne	.L1650
 	strh	w19, [x21, #:lo12:.LANCHOR133]
-	b	.L1635
-.L1634:
+	b	.L1651
+.L1650:
 	cmp	w19, w0
-	beq	.L1635
+	beq	.L1651
 	bl	update_vpc_list
 	cmp	w0, 0
 	adrp	x1, .LANCHOR82
@@ -11174,10 +11215,10 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1627
+	cbnz	w1, .L1643
 	cmp	w19, w0, uxth
-	beq	.L1627
-	mov	w2, 3435
+	beq	.L1643
+	mov	w2, 3379
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR207
@@ -11188,7 +11229,7 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1627:
+.L1643:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11201,7 +11242,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1652
+	cbz	w1, .L1668
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -11210,7 +11251,7 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1640
+	beq	.L1656
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR8
@@ -11219,37 +11260,37 @@ FtlSlcSuperblockCheck:
 	add	x23, x22, :lo12:.LANCHOR8
 	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1644:
+.L1660:
 	cmp	w0, w20
-	beq	.L1646
+	beq	.L1662
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1647
+	bne	.L1663
 	ldrb	w1, [x23]
-	cbnz	w1, .L1647
+	cbnz	w1, .L1663
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1647
+	bne	.L1663
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1646
+	cbnz	w0, .L1662
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1655:
+.L1671:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1640:
+.L1656:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1646:
+.L1662:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
@@ -11257,26 +11298,26 @@ FtlSlcSuperblockCheck:
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1645
+	bne	.L1661
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1645:
+.L1661:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1644
-.L1647:
+	b	.L1660
+.L1663:
 	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1640
+	cbz	w1, .L1656
 	cmp	w0, 1
-	bne	.L1640
+	bne	.L1656
 	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1640
+	bcc	.L1656
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
@@ -11288,8 +11329,8 @@ FtlSlcSuperblockCheck:
 	adrp	x0, .LANCHOR53
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	b	.L1655
-.L1652:
+	b	.L1671
+.L1668:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -11307,8 +11348,8 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1657
-	mov	w2, 3332
+	bne	.L1673
+	mov	w2, 3276
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11319,13 +11360,13 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1657:
+.L1673:
 	adrp	x20, .LANCHOR53
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1658
-	mov	w2, 3333
+	bne	.L1674
+	mov	w2, 3277
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11336,10 +11377,10 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1658:
+.L1674:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1659
-	mov	w2, 3334
+	cbnz	w0, .L1675
+	mov	w2, 3278
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11350,7 +11391,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1659:
+.L1675:
 	ldrb	w0, [x19, 6]
 	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
@@ -11361,42 +11402,42 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1660:
+.L1676:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1661
+	beq	.L1677
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1663
+	bne	.L1679
 	ldrb	w3, [x23]
-	cbnz	w3, .L1663
+	cbnz	w3, .L1679
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1663
+	bne	.L1679
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1661:
+.L1677:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1662
+	bne	.L1678
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1662:
+.L1678:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1660
-.L1663:
+	b	.L1676
+.L1679:
 	adrp	x23, .LANCHOR8
 	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
@@ -11404,46 +11445,46 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1664:
+.L1680:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
 	ldrh	w3, [x21, #:lo12:.LANCHOR38]
-.L1666:
+.L1682:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1665
+	bne	.L1681
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1665:
+.L1681:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1666
+	beq	.L1682
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1667
+	bne	.L1683
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1668
+	cbnz	w2, .L1684
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1667
+	bne	.L1683
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1667
+	cbz	w0, .L1683
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1664
-.L1668:
+	b	.L1680
+.L1684:
 	adrp	x1, .LANCHOR54
 	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	cmp	w0, w1
-	bcc	.L1667
+	bcc	.L1683
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
@@ -11456,14 +11497,14 @@ get_new_active_ppa:
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1667:
+.L1683:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1656
+	bne	.L1672
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1656
-	mov	w2, 3378
+	cbz	w0, .L1672
+	mov	w2, 3322
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR208
@@ -11474,7 +11515,7 @@ get_new_active_ppa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1656:
+.L1672:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -11491,23 +11532,23 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR77
+	adrp	x24, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR77]
+	ldr	w0, [x24, #:lo12:.LANCHOR77]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	str	x23, [x29, 104]
-	cbnz	w0, .L1681
-	adrp	x25, .LANCHOR188
+	str	x24, [x29, 104]
+	cbnz	w0, .L1697
+	adrp	x26, .LANCHOR188
 	adrp	x28, .LANCHOR202
-	adrp	x27, .LANCHOR209
+	adrp	x23, .LANCHOR209
 	add	x21, x28, :lo12:.LANCHOR202
-	ldr	x20, [x25, #:lo12:.LANCHOR188]
-	adrp	x24, .LANCHOR183
-	ldrh	w2, [x27, #:lo12:.LANCHOR209]
-	add	x1, x27, :lo12:.LANCHOR209
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	ldr	x20, [x26, #:lo12:.LANCHOR188]
+	adrp	x25, .LANCHOR183
+	ldrh	w2, [x23, #:lo12:.LANCHOR209]
+	add	x1, x23, :lo12:.LANCHOR209
+	ldr	x0, [x25, #:lo12:.LANCHOR183]
 	mov	w3, 19539
 	stp	x0, x20, [x21, 8]
 	movk	w3, 0x4654, lsl 16
@@ -11516,14 +11557,14 @@ FtlVpcTblFlush:
 	strh	w2, [x20]
 	adrp	x22, .LANCHOR159
 	ldr	w2, [x1, 8]
-	adrp	x26, .LANCHOR40
+	adrp	x27, .LANCHOR40
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
 	adrp	x2, .LANCHOR81
 	add	x19, x2, :lo12:.LANCHOR81
 	str	wzr, [x20, 12]
 	str	w3, [x2, #:lo12:.LANCHOR81]
-	mov	w2, 73
+	mov	w2, 80
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR45
@@ -11584,13 +11625,13 @@ FtlVpcTblFlush:
 	mov	x19, x28
 	bl	ftl_memcpy
 	adrp	x1, .LANCHOR84
-	ldrh	w2, [x26, #:lo12:.LANCHOR40]
+	ldrh	w2, [x27, #:lo12:.LANCHOR40]
 	ldr	x0, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x26, #:lo12:.LANCHOR40]
+	ldrh	w0, [x27, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR0]
@@ -11603,8 +11644,8 @@ FtlVpcTblFlush:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR70
 	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L1682
-	ldrh	w0, [x26, #:lo12:.LANCHOR40]
+	cbz	w0, .L1698
+	ldrh	w0, [x27, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR67
 	ldr	x3, [x21, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR67]
@@ -11617,65 +11658,58 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1682:
-	mov	w0, 0
+.L1698:
 	add	x28, x19, :lo12:.LANCHOR202
+	mov	w0, 0
+	add	x24, x23, :lo12:.LANCHOR209
 	bl	FtlUpdateVaildLpn
-	add	x23, x27, :lo12:.LANCHOR209
+	adrp	x23, .LANCHOR54
 	mov	w21, 0
-	adrp	x27, .LANCHOR54
-	mov	w26, 65535
-	add	x0, x27, :lo12:.LANCHOR54
-	str	x0, [x29, 96]
-.L1683:
-	ldr	x0, [x24, #:lo12:.LANCHOR183]
-	mov	w3, 1
+	add	x23, x23, :lo12:.LANCHOR54
+	mov	w27, 65535
+	str	x23, [x29, 96]
+.L1699:
+	ldrh	w2, [x24, 2]
+	ldrh	w1, [x24]
+	ldr	x0, [x25, #:lo12:.LANCHOR183]
 	str	x0, [x28, 8]
-	mov	w2, w3
-	ldr	x0, [x25, #:lo12:.LANCHOR188]
-	ldrh	w1, [x23, 2]
+	ldr	x0, [x26, #:lo12:.LANCHOR188]
 	str	x0, [x28, 16]
-	ldrh	w0, [x23]
-	orr	w0, w1, w0, lsl 10
-	mov	w1, w3
+	orr	w0, w2, w1, lsl 10
 	str	w0, [x28, 4]
-	mov	x0, x28
-	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR54]
-	ldrh	w1, [x23, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L1684
 	ldrh	w0, [x23]
-	ldrh	w26, [x23, 4]
-	strh	wzr, [x23, 2]
-	strh	w0, [x23, 4]
+	sub	w0, w0, #1
+	cmp	w2, w0
+	blt	.L1700
+	ldrh	w27, [x24, 4]
+	strh	wzr, [x24, 2]
+	strh	w1, [x24, 4]
 	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x23]
 	ldr	w1, [x22, #:lo12:.LANCHOR159]
-	mov	w3, 1
-	str	w1, [x23, 8]
+	str	w1, [x24, 8]
 	add	w2, w1, 1
 	str	w2, [x22, #:lo12:.LANCHOR159]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
+	strh	w0, [x24]
 	strh	w0, [x20, 2]
-	mov	w2, w3
 	str	w1, [x20, 4]
+.L1700:
+	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
+	mov	w2, w3
 	bl	FlashProgPages
-.L1684:
-	ldrh	w0, [x23, 2]
+	ldrh	w0, [x24, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x23, 2]
+	strh	w0, [x24, 2]
 	cmn	w1, #1
-	bne	.L1685
+	bne	.L1701
 	cmp	w0, 1
-	bne	.L1686
-	mov	w2, 1219
+	bne	.L1702
+	mov	w2, 1209
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR210
@@ -11686,19 +11720,19 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1686:
-	ldrh	w0, [x23, 2]
+.L1702:
+	ldrh	w0, [x24, 2]
 	cmp	w0, 1
-	bne	.L1687
+	bne	.L1703
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
-	strh	w0, [x23, 2]
-.L1687:
+	strh	w0, [x24, 2]
+.L1703:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1683
+	bls	.L1699
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, w21
 	adrp	x0, .LC38
@@ -11708,7 +11742,7 @@ FtlVpcTblFlush:
 	ldr	x1, [x29, 104]
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR77]
-.L1681:
+.L1697:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11717,18 +11751,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1685:
+.L1701:
 	cmp	w0, 1
-	beq	.L1683
+	beq	.L1699
 	cmp	w1, 256
-	beq	.L1683
+	beq	.L1699
 	mov	w0, 65535
-	cmp	w26, w0
-	beq	.L1681
+	cmp	w27, w0
+	beq	.L1697
 	mov	w1, 1
-	mov	w0, w26
+	mov	w0, w27
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1681
+	b	.L1697
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11742,16 +11776,16 @@ FtlSuperblockPowerLostFix:
 	ldr	w23, [x1, #:lo12:.LANCHOR77]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	cbnz	w23, .L1700
+	cbnz	w23, .L1716
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1711
+	cbz	w1, .L1727
 	ldrb	w1, [x0, 8]
 	cmp	w1, 1
-	bne	.L1711
+	bne	.L1727
 	ldrh	w21, [x0, 4]
 	mov	w23, w1
-.L1702:
+.L1718:
 	adrp	x1, .LANCHOR188
 	mov	x19, x0
 	mov	w0, -1
@@ -11775,13 +11809,13 @@ FtlSuperblockPowerLostFix:
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.L1703:
+.L1719:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1706
+	beq	.L1722
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1704
-.L1706:
+	cbnz	w0, .L1720
+.L1722:
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
@@ -11795,21 +11829,21 @@ FtlSuperblockPowerLostFix:
 	strh	wzr, [x19, 4]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
-.L1700:
+.L1716:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1711:
+.L1727:
 	mov	w21, 12
-	b	.L1702
-.L1704:
+	b	.L1718
+.L1720:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1706
+	beq	.L1722
 	ldr	w0, [x22]
 	mov	w3, 0
 	str	w0, [x20, 4]
@@ -11823,7 +11857,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1703
+	b	.L1719
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11855,10 +11889,10 @@ FtlLoadFactoryBbt:
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1717:
+.L1733:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1722
+	bcc	.L1738
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11867,18 +11901,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1722:
+.L1738:
 	ldrh	w19, [x26, #:lo12:.LANCHOR51]
 	add	x24, x22, :lo12:.LANCHOR202
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1718:
+.L1734:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1720
+	bgt	.L1736
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11890,19 +11924,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1719
+	beq	.L1735
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1719
+	bne	.L1735
 	strh	w19, [x20]
-.L1720:
+.L1736:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1717
-.L1719:
+	b	.L1733
+.L1735:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1718
+	b	.L1734
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11916,10 +11950,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1728
+	bne	.L1744
 	adrp	x1, .LANCHOR54
 	ldrh	w19, [x1, #:lo12:.LANCHOR54]
-.L1729:
+.L1745:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11933,24 +11967,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1730
+	bne	.L1746
 	mov	w22, 0
 	mov	w24, 2
-.L1731:
+.L1747:
 	cmp	w22, w19
-	ble	.L1734
-.L1730:
+	ble	.L1750
+.L1746:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1728:
+.L1744:
 	adrp	x1, .LANCHOR53
 	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-	b	.L1729
-.L1734:
+	b	.L1745
+.L1750:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11962,20 +11996,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1732
+	bne	.L1748
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1732
+	bne	.L1748
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1732
+	beq	.L1748
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1731
-.L1732:
+	b	.L1747
+.L1748:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1731
+	b	.L1747
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -12003,11 +12037,11 @@ FtlLoadBbt:
 	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1740:
+.L1756:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1743
+	bgt	.L1759
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -12016,7 +12050,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1741
+	bne	.L1757
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -12024,13 +12058,13 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1741:
+.L1757:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1742
+	beq	.L1758
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1742
+	bne	.L1758
 	adrp	x1, .LANCHOR75
 	add	x0, x1, :lo12:.LANCHOR75
 	strh	w19, [x1, #:lo12:.LANCHOR75]
@@ -12038,16 +12072,16 @@ FtlLoadBbt:
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1743:
+.L1759:
 	adrp	x19, .LANCHOR75
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x19, #:lo12:.LANCHOR75]
 	cmp	w1, w0
-	beq	.L1757
+	beq	.L1773
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1747
+	beq	.L1763
 	add	x0, x22, :lo12:.LANCHOR202
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -12056,21 +12090,21 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1747
+	beq	.L1763
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1747
+	bne	.L1763
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1747
+	bls	.L1763
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
 	strh	w1, [x19, #:lo12:.LANCHOR75]
 	strh	w0, [x20, 4]
-.L1747:
+.L1763:
 	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	add	x24, x19, :lo12:.LANCHOR75
 	mov	w1, 1
@@ -12080,9 +12114,9 @@ FtlLoadBbt:
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	add	x24, x22, :lo12:.LANCHOR202
-.L1749:
-	tbz	w20, #31, .L1752
-	mov	w2, 336
+.L1765:
+	tbz	w20, #31, .L1768
+	mov	w2, 335
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR211
@@ -12093,27 +12127,27 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1751:
+.L1767:
 	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1754
+	beq	.L1770
 	adrp	x1, .LANCHOR37
 	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1754
+	beq	.L1770
 	adrp	x1, .LANCHOR41
 	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1754
+	bcs	.L1770
 	cmp	w0, w1
-	bcs	.L1754
+	bcs	.L1770
 	bl	FtlSysBlkNumInit
-.L1754:
+.L1770:
 	add	x19, x19, :lo12:.LANCHOR75
 	adrp	x21, .LANCHOR45
 	adrp	x23, .LANCHOR123
@@ -12122,23 +12156,23 @@ FtlLoadBbt:
 	add	x23, x23, :lo12:.LANCHOR123
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w20, 0
-.L1755:
+.L1771:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1756
+	bcc	.L1772
 	mov	w0, 0
-.L1739:
+.L1755:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1742:
+.L1758:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1740
-.L1752:
+	b	.L1756
+.L1768:
 	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mov	w2, 1
 	mov	w1, w2
@@ -12150,15 +12184,15 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1750
+	beq	.L1766
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1751
-.L1750:
+	beq	.L1767
+.L1766:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1749
-.L1756:
+	b	.L1765
+.L1772:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -12167,10 +12201,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1755
-.L1757:
+	b	.L1771
+.L1773:
 	mov	w0, -1
-	b	.L1739
+	b	.L1755
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -12181,42 +12215,24 @@ ftl_map_blk_gc:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR54
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR54
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	x20, [x0, 16]
-	ldr	x23, [x0, 40]
+	ldr	x26, [x0, 40]
 	bl	ftl_free_no_use_map_blk
-	ldrh	w4, [x19, 10]
+	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
-	sub	w1, w4, #4
+	sub	w1, w1, #4
 	cmp	w2, w1
-	ldrh	w1, [x19, 60]
-	bge	.L1770
-	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L1772
-	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR54]
-	cmp	w3, w2
-	bcc	.L1773
-.L1770:
-	mov	w2, 65535
-	and	w0, w0, 65535
-	cmp	w1, w2
-	beq	.L1774
-	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR54]
-	cmp	w2, w3
-	bls	.L1775
-.L1774:
-	ubfiz	x0, x0, 1, 32
-	ldrh	w22, [x20, x0]
-	cbz	w22, .L1772
+	blt	.L1786
+	ubfiz	x0, x0, 1, 16
+	ldrh	w21, [x20, x0]
+	cbz	w21, .L1786
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1772
+	cbnz	w1, .L1786
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -12224,67 +12240,43 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x21, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1780
+	bcc	.L1787
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1780:
-	adrp	x24, .LANCHOR202
-	adrp	x26, .LANCHOR212
-	mov	x25, x24
-	add	x27, x24, :lo12:.LANCHOR202
-	add	x26, x26, :lo12:.LANCHOR212
+.L1787:
+	adrp	x22, .LANCHOR202
+	adrp	x24, .LANCHOR212
+	mov	x23, x22
+	add	x27, x22, :lo12:.LANCHOR202
+	add	x24, x24, :lo12:.LANCHOR212
 	mov	w20, 0
-.L1781:
+.L1788:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1786
+	bhi	.L1794
 	mov	w1, 1
-	mov	w0, w22
+	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1772:
+.L1786:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR54]
+	ldrh	w0, [x25, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1773
+	bcc	.L1792
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-	b	.L1773
-.L1778:
-	ldrh	w6, [x20, x2, lsl 1]
-	add	x5, x2, 1
-	cmp	w6, w1
-	beq	.L1776
-	mov	x2, x5
-.L1777:
-	and	w22, w2, 65535
-	cmp	w22, w4
-	bcc	.L1778
-	mov	w22, w0
-.L1776:
-	and	x2, x2, 65535
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
-	ldrh	w2, [x20, x2, lsl 1]
-	bl	printf
-	mov	w0, -1
-	strh	w0, [x19, 60]
-	mov	w0, w22
-	b	.L1774
-.L1775:
-	mov	x2, 0
-	b	.L1777
-.L1786:
+	b	.L1792
+.L1794:
 	ubfiz	x0, x20, 2, 16
-	add	x1, x23, x0
+	add	x1, x26, x0
 	str	x1, [x29, 104]
-	ldr	w1, [x23, x0]
-	cmp	w22, w1, lsr 10
-	bne	.L1782
+	ldr	w1, [x26, x0]
+	cmp	w21, w1, lsr 10
+	bne	.L1789
 	adrp	x2, .LANCHOR184
-	add	x0, x24, :lo12:.LANCHOR202
+	add	x0, x22, :lo12:.LANCHOR202
 	ldr	x2, [x2, #:lo12:.LANCHOR184]
 	str	x2, [x0, 8]
 	adrp	x2, .LANCHOR188
@@ -12296,9 +12288,9 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1783
-	mov	w2, 672
-	mov	x1, x26
+	beq	.L1790
+	mov	w2, 661
+	mov	x1, x24
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -12307,23 +12299,23 @@ ftl_map_blk_gc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1783:
+.L1790:
 	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
 	cmn	w0, #1
-	bne	.L1784
-.L1785:
+	bne	.L1791
+.L1793:
 	ldr	x0, [x29, 104]
-	add	x25, x25, :lo12:.LANCHOR202
+	add	x23, x23, :lo12:.LANCHOR202
 	str	wzr, [x0]
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
-	ldr	w1, [x25, 4]
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	ldr	w1, [x23, 4]
 	bl	printf
 	adrp	x0, .LANCHOR77
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR77]
-.L1773:
+.L1792:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12332,21 +12324,21 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1784:
+.L1791:
 	cmp	w2, w20
-	bne	.L1785
+	bne	.L1793
 	ldrh	w1, [x28]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L1785
+	bne	.L1793
 	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.L1782:
+.L1789:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1781
+	b	.L1788
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
@@ -12355,7 +12347,7 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	adrp	x1, .LANCHOR77
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L1802
+	cbnz	w1, .L1810
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -12366,10 +12358,10 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x19, 16]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L1793
+	bne	.L1801
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1794
-	mov	w2, 708
+	cbz	w0, .L1802
+	mov	w2, 697
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR213
@@ -12380,7 +12372,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1794:
+.L1802:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -12391,14 +12383,14 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1792:
+.L1800:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1793:
+.L1801:
 	ubfiz	x0, x0, 1, 16
 	adrp	x1, .LANCHOR188
 	adrp	x23, .LANCHOR183
@@ -12429,9 +12421,9 @@ Ftl_write_map_blk_to_last_page:
 	mov	x1, 0
 	ldr	x3, [x23, #:lo12:.LANCHOR183]
 	mov	w2, 0
-.L1795:
+.L1803:
 	cmp	w4, w1, uxth
-	bhi	.L1797
+	bhi	.L1805
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
@@ -12442,11 +12434,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1792
-.L1797:
+	b	.L1800
+.L1805:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L1796
+	bne	.L1804
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -12454,10 +12446,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L1796:
+.L1804:
 	add	x1, x1, 1
-	b	.L1795
-.L1802:
+	b	.L1803
+.L1810:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -12483,7 +12475,7 @@ FtlMapWritePage:
 	mov	w21, 0
 	add	x0, x24, :lo12:.LANCHOR54
 	stp	x0, x2, [x29, 96]
-.L1806:
+.L1814:
 	ldr	w0, [x22]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
@@ -12491,22 +12483,22 @@ FtlMapWritePage:
 	ldrh	w0, [x24, #:lo12:.LANCHOR54]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1807
+	bge	.L1815
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1808
-.L1807:
+	bne	.L1816
+.L1815:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L1808:
+.L1816:
 	ldr	w0, [x27]
-	cbnz	w0, .L1820
+	cbnz	w0, .L1829
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1810
-	mov	w2, 768
+	cbnz	w0, .L1818
+	mov	w2, 757
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12517,12 +12509,12 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1810:
+.L1818:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L1811
-	mov	w2, 769
+	bcc	.L1819
+	mov	w2, 758
 	adrp	x1, .LANCHOR214
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR214
@@ -12533,7 +12525,7 @@ FtlMapWritePage:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1811:
+.L1819:
 	ldrh	w1, [x19]
 	adrp	x20, .LANCHOR202
 	ldr	x0, [x19, 16]
@@ -12568,32 +12560,32 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1812
+	bne	.L1820
 	ldr	w1, [x28, 4]
-	adrp	x0, .LC41
-	add	x0, x0, :lo12:.LC41
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L1813
+	bhi	.L1821
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1813:
+.L1821:
 	cmp	w21, 3
-	bls	.L1806
+	bls	.L1814
 	add	x20, x20, :lo12:.LANCHOR202
 	mov	w2, w21
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
 	str	w0, [x25, #:lo12:.LANCHOR77]
-.L1820:
+.L1829:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12602,22 +12594,28 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1812:
-	cbz	w1, .L1815
+.L1820:
+	cbz	w1, .L1823
 	strh	w26, [x19, 60]
 	cmp	w0, 1
-	beq	.L1806
+	bne	.L1824
+.L1825:
+	str	wzr, [x19, 56]
+	b	.L1814
+.L1824:
 	cmp	w1, 256
-.L1828:
-	beq	.L1806
+.L1835:
+	beq	.L1825
+	ldr	w0, [x19, 56]
+	cbnz	w0, .L1825
 	add	x20, x20, :lo12:.LANCHOR202
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w23, uxtw 2]
-	b	.L1820
-.L1815:
+	b	.L1829
+.L1823:
 	cmp	w0, 1
-	b	.L1828
+	b	.L1835
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12659,27 +12657,27 @@ l2p_flush:
 	str	x21, [sp, 32]
 	mov	w19, 0
 	adrp	x21, .LANCHOR97
-.L1832:
+.L1839:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1834
+	bhi	.L1841
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1834:
+.L1841:
 	ldr	x1, [x21, #:lo12:.LANCHOR97]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1833
+	tbz	w0, #31, .L1840
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1833:
+.L1840:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1832
+	b	.L1839
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12699,7 +12697,7 @@ FtlVendorPartWrite:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1844
+	bhi	.L1851
 	adrp	x0, .LANCHOR57
 	adrp	x26, .LANCHOR56
 	adrp	x27, .LANCHOR58
@@ -12709,9 +12707,9 @@ FtlVendorPartWrite:
 	add	x27, x27, :lo12:.LANCHOR58
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1838:
-	cbnz	w20, .L1843
-.L1836:
+.L1845:
+	cbnz	w20, .L1850
+.L1843:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12720,7 +12718,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1843:
+.L1850:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR194
 	adrp	x28, .LANCHOR185
@@ -12733,9 +12731,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1840
+	cbz	w2, .L1847
 	cmp	w19, w1
-	beq	.L1840
+	beq	.L1847
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -12743,7 +12741,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1841:
+.L1848:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
@@ -12764,16 +12762,16 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1838
-.L1840:
+	b	.L1845
+.L1847:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1841
-.L1844:
+	b	.L1848
+.L1851:
 	mov	w24, -1
-	b	.L1836
+	b	.L1843
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -12786,8 +12784,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1849
-	mov	w0, 73
+	bne	.L1856
+	mov	w0, 80
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12835,7 +12833,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1849:
+.L1856:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12845,31 +12843,31 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1856
+	cbz	w1, .L1863
 	adrp	x1, .LANCHOR170
 	mov	w2, 4
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1852:
+.L1859:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1853
+	bhi	.L1860
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1853:
+.L1860:
 	adrp	x2, .LANCHOR191
-	cbnz	w0, .L1854
+	cbnz	w0, .L1861
 	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1859
-.L1854:
+	bcc	.L1866
+.L1861:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR191]
@@ -12892,10 +12890,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1856:
+.L1863:
 	mov	w1, 32
-	b	.L1852
-.L1859:
+	b	.L1859
+.L1866:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12913,8 +12911,8 @@ allocate_new_data_superblock:
 	str	x21, [sp, 32]
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1862
-	mov	w2, 3289
+	bcs	.L1869
+	mov	w2, 3233
 	adrp	x1, .LANCHOR219
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR219
@@ -12925,99 +12923,99 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1862:
+.L1869:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L1863
+	cbnz	w0, .L1870
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1864
+	beq	.L1871
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x20, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1865
+	cbz	w0, .L1872
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1864:
+.L1871:
 	strb	wzr, [x19, 8]
 	adrp	x0, .LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	beq	.L1866
+	beq	.L1873
 	adrp	x0, .LANCHOR44
 	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1866
+	beq	.L1873
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1867
-.L1866:
+	cbz	w0, .L1874
+.L1873:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1868:
+.L1875:
 	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1873
+	beq	.L1880
 	cmp	w20, w0
-	bne	.L1874
+	bne	.L1881
 	adrp	x2, .LANCHOR84
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1875
-.L1874:
+	cbz	w1, .L1882
+.L1881:
 	bl	update_vpc_list
-.L1875:
+.L1882:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR133]
-.L1873:
+.L1880:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1863:
+.L1870:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1865:
+.L1872:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1864
-.L1867:
+	b	.L1871
+.L1874:
 	adrp	x0, .LANCHOR92
 	add	x2, x0, :lo12:.LANCHOR92
 	cmp	x19, x2
-	bne	.L1868
+	bne	.L1875
 	cmp	w1, 3
-	beq	.L1870
+	beq	.L1877
 	adrp	x1, .LANCHOR158
 	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1871
-.L1870:
+	bne	.L1878
+.L1877:
 	add	x1, x0, :lo12:.LANCHOR92
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1871:
+.L1878:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1868
+	cbz	w1, .L1875
 	adrp	x1, .LANCHOR170
 	ldr	w1, [x1, #:lo12:.LANCHOR170]
 	cmp	w1, 39
-	bhi	.L1868
+	bhi	.L1875
 	add	x0, x0, :lo12:.LANCHOR92
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1868
+	b	.L1875
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
@@ -13037,7 +13035,7 @@ FtlVendorPartRead:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1898
+	bhi	.L1905
 	adrp	x0, .LANCHOR57
 	adrp	x26, .LANCHOR185
 	mov	x25, x2
@@ -13048,9 +13046,9 @@ FtlVendorPartRead:
 	add	x0, x0, :lo12:.LANCHOR56
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1891:
-	cbnz	w21, .L1897
-.L1889:
+.L1898:
+	cbnz	w21, .L1904
+.L1896:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13059,7 +13057,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1897:
+.L1904:
 	adrp	x0, .LANCHOR194
 	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13073,7 +13071,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1893
+	cbz	w3, .L1900
 	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13089,39 +13087,39 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L1895
+	bne	.L1902
 	mov	w2, w3
 	mov	w1, w20
-	adrp	x0, .LC43
-	add	x0, x0, :lo12:.LC43
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	ldr	x2, [x26, #:lo12:.LANCHOR185]
 	adrp	x0, .LANCHOR215
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1895:
+.L1902:
 	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1896:
+.L1903:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1891
-.L1893:
+	b	.L1898
+.L1900:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1896
-.L1898:
+	b	.L1903
+.L1905:
 	mov	w24, -1
-	b	.L1889
+	b	.L1896
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13142,10 +13140,10 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1901
-	adrp	x1, .LC44
+	beq	.L1908
+	adrp	x1, .LC43
 	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC44
+	add	x1, x1, :lo12:.LC43
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR191]
@@ -13153,7 +13151,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1901:
+.L1908:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13178,18 +13176,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1904
+	beq	.L1911
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR138]
-.L1904:
+.L1911:
 	ldr	w1, [x19, #:lo12:.LANCHOR138]
 	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
 	adrp	x20, .LANCHOR168
-	bne	.L1905
+	bne	.L1912
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
@@ -13227,7 +13225,7 @@ Ftl_load_ext_data:
 	ldr	w1, [x0, 60]
 	adrp	x0, .LANCHOR158
 	str	w1, [x0, #:lo12:.LANCHOR158]
-.L1905:
+.L1912:
 	add	x19, x19, :lo12:.LANCHOR138
 	adrp	x0, .LANCHOR157
 	str	wzr, [x0, #:lo12:.LANCHOR157]
@@ -13235,16 +13233,16 @@ Ftl_load_ext_data:
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1906
+	bne	.L1913
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
-	adrp	x1, .LC45
+	adrp	x1, .LC44
 	adrp	x0, .LC7
-	add	x1, x1, :lo12:.LC45
+	add	x1, x1, :lo12:.LC44
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1906:
+.L1913:
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
@@ -13261,13 +13259,29 @@ Ftl_load_ext_data:
 	str	w0, [x1, #:lo12:.LANCHOR205]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.ftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
+	add	w0, w0, 256
+	b	FtlVendorPartRead
+	.size	ftl_vendor_read, .-ftl_vendor_read
+	.section	.text.ftl_sys_read,"ax",@progbits
+	.align	2
+	.global	ftl_sys_read
+	.type	ftl_sys_read, %function
+ftl_sys_read:
+	add	w0, w0, 512
+	b	FtlVendorPartRead
+	.size	ftl_sys_read, .-ftl_sys_read
 	.section	.text.FtlMapBlkWriteDumpData,"ax",@progbits
 	.align	2
 	.global	FtlMapBlkWriteDumpData
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1922
+	cbz	w1, .L1931
 	stp	x29, x30, [sp, -80]!
 	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
@@ -13279,7 +13293,7 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1908
+	cbnz	w1, .L1917
 	mov	x19, x0
 	adrp	x0, .LANCHOR184
 	adrp	x23, .LANCHOR202
@@ -13291,16 +13305,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1912
+	cbz	w0, .L1921
 	adrp	x1, .LANCHOR54
 	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1912
+	bge	.L1921
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1912
+	beq	.L1921
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13313,16 +13327,16 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1912
+	beq	.L1921
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1912
+	bne	.L1921
 	ldr	x2, [x21, 8]
-.L1925:
+.L1934:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13330,37 +13344,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1912:
+.L1921:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR202
 	str	w1, [x0, 4]
-	cbz	w1, .L1913
+	cbz	w1, .L1922
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1914:
+.L1923:
 	add	x22, x22, :lo12:.LANCHOR202
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1925
-.L1913:
+	b	.L1934
+.L1922:
 	adrp	x1, .LANCHOR58
 	ldr	x0, [x0, 8]
 	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1914
-.L1908:
+	b	.L1923
+.L1917:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1922:
+.L1931:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13421,12 +13435,12 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR159
 	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1927:
+.L1936:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1968
+	bls	.L1977
 	adrp	x0, .LANCHOR38
 	adrp	x25, .LANCHOR180
 	adrp	x6, .LANCHOR47
@@ -13442,14 +13456,14 @@ FtlScanSysBlk:
 	ldr	x11, [x0, #:lo12:.LANCHOR106]
 	adrp	x0, .LANCHOR59
 	ldrh	w10, [x0, #:lo12:.LANCHOR59]
-	b	.L1969
-.L1929:
+	b	.L1978
+.L1938:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1928
+	cbnz	w0, .L1937
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13459,19 +13473,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1928:
+.L1937:
 	add	x5, x5, 1
-.L1969:
+.L1978:
 	cmp	w13, w5, uxth
-	bhi	.L1929
-	cbnz	w22, .L1930
-.L1967:
+	bhi	.L1938
+	cbnz	w22, .L1939
+.L1976:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1927
-.L1930:
+	b	.L1936
+.L1939:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13483,7 +13497,7 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR220
 	add	x0, x0, :lo12:.LANCHOR220
 	str	x0, [x29, 136]
-.L1966:
+.L1975:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
@@ -13491,10 +13505,10 @@ FtlScanSysBlk:
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1933
+	bne	.L1942
 	mov	w5, 16
 	mov	w7, 65535
-.L1935:
+.L1944:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
@@ -13512,71 +13526,71 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1932
+	bne	.L1941
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2005
-.L1933:
+	beq	.L2014
+.L1942:
 	adrp	x0, .LANCHOR159
 	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1936
+	beq	.L1945
 	cmp	w1, w0
-	bhi	.L1937
-.L1936:
+	bhi	.L1946
+.L1945:
 	cmn	w0, #1
-	beq	.L1937
+	beq	.L1946
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1937:
+.L1946:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1939
-	bhi	.L1940
+	beq	.L1948
+	bhi	.L1949
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1941
-.L1938:
+	beq	.L1950
+.L1947:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1966
-	b	.L1967
-.L1932:
+	bne	.L1975
+	b	.L1976
+.L1941:
 	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1933
+	bne	.L1942
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1935
-.L2005:
+	bne	.L1944
+.L2014:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1938
-.L1940:
+	b	.L1947
+.L1949:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1942
+	beq	.L1951
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2005
-	b	.L1938
-.L1942:
+	beq	.L2014
+	b	.L1947
+.L1951:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L1944
+	bls	.L1953
 	ldr	x1, [x29, 136]
-	mov	w2, 1308
+	mov	w2, 1297
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13585,7 +13599,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1944:
+.L1953:
 	ldr	w6, [x21, #:lo12:.LANCHOR65]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
@@ -13596,53 +13610,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1945:
+.L1954:
 	cmp	w0, w2
-	bgt	.L1951
-	tbz	w0, #31, .L1986
-	b	.L1938
-.L1951:
+	bgt	.L1960
+	tbz	w0, #31, .L1995
+	b	.L1947
+.L1960:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1946
+	bls	.L1955
 	ldr	w2, [x5]
-	cbnz	w2, .L1947
+	cbnz	w2, .L1956
 	cmp	w6, w1
-	beq	.L1947
+	beq	.L1956
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
-.L1947:
+.L1956:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L1948:
+.L1957:
 	cmp	w1, w0
-	bne	.L1949
+	bne	.L1958
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1938
+	tbnz	w0, #31, .L1947
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w2, [x21, #:lo12:.LANCHOR65]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1938
-.L1986:
+	bgt	.L1947
+.L1995:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L2004:
+.L2013:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1938
-.L1949:
+	b	.L1947
+.L1958:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13654,18 +13668,18 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1948
-.L1946:
+	b	.L1957
+.L1955:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1945
-.L1941:
+	b	.L1954
+.L1950:
 	ldrh	w1, [x23, #:lo12:.LANCHOR71]
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bls	.L1954
+	bls	.L1963
 	ldr	x1, [x29, 136]
-	mov	w2, 1355
+	mov	w2, 1344
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
@@ -13674,7 +13688,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1954:
+.L1963:
 	ldrh	w6, [x19, #:lo12:.LANCHOR62]
 	ldrh	w2, [x23, #:lo12:.LANCHOR71]
 	sub	w1, w6, #1
@@ -13682,46 +13696,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR193]
-.L1955:
+.L1964:
 	cmp	w0, w5
-	ble	.L1960
+	ble	.L1969
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1956
+	bls	.L1965
 	ldr	w5, [x1]
-	cbnz	w5, .L1957
+	cbnz	w5, .L1966
 	cmp	w6, w2
-	beq	.L1957
+	beq	.L1966
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR71]
-.L1957:
+.L1966:
 	ldr	x6, [x28, #:lo12:.LANCHOR72]
 	mov	w2, 0
-.L1958:
+.L1967:
 	cmp	w2, w0
-	bne	.L1959
+	bne	.L1968
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1960:
-	tbnz	w0, #31, .L1938
+.L1969:
+	tbnz	w0, #31, .L1947
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldrh	w5, [x23, #:lo12:.LANCHOR71]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1938
+	bgt	.L1947
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR71]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR72]
-	b	.L2004
-.L1959:
+	b	.L2013
+.L1968:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13733,55 +13747,55 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1958
-.L1956:
+	b	.L1967
+.L1965:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1955
-.L1939:
+	b	.L1964
+.L1948:
 	ldrh	w5, [x24, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR209
 	cmp	w5, w1
-	bne	.L1962
+	bne	.L1971
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w0, [x2, 8]
-	b	.L1938
-.L1962:
+	b	.L1947
+.L1971:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1963
+	beq	.L1972
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1963:
+.L1972:
 	add	x0, x24, :lo12:.LANCHOR209
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1964
+	bcs	.L1973
 	ldrh	w2, [x24, #:lo12:.LANCHOR209]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w1, [x0, 8]
-	b	.L1938
-.L1964:
+	b	.L1947
+.L1973:
 	strh	w26, [x0, 4]
-	b	.L1938
-.L1968:
+	b	.L1947
+.L1977:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L1970
-.L1973:
+	cbz	w0, .L1979
+.L1982:
 	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1]
-	cbz	w0, .L1971
-.L1972:
+	cbz	w0, .L1980
+.L1981:
 	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L2002
-	mov	w2, 1489
+	bls	.L2011
+	mov	w2, 1478
 	adrp	x1, .LANCHOR220
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR220
@@ -13792,7 +13806,7 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2002:
+.L2011:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13801,24 +13815,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1970:
+.L1979:
 	ldrh	w0, [x20, #:lo12:.LANCHOR128]
-	cbz	w0, .L1973
+	cbz	w0, .L1982
 	ldr	w1, [x21, #:lo12:.LANCHOR65]
 	mov	w0, 0
-.L1974:
+.L1983:
 	cmp	w0, w1
-	bcs	.L1973
+	bcs	.L1982
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1975
+	cbz	w3, .L1984
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR65
 	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L1976:
+.L1985:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1973
+	bcs	.L1982
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13830,29 +13844,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1976
-.L1975:
+	b	.L1985
+.L1984:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1974
-.L1971:
+	b	.L1983
+.L1980:
 	ldrh	w0, [x23, #:lo12:.LANCHOR71]
-	cbz	w0, .L1972
+	cbz	w0, .L1981
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 0
-.L1981:
+.L1990:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1972
+	bge	.L1981
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1982
+	cbz	w3, .L1991
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR62
 	ldr	x3, [x2, #:lo12:.LANCHOR193]
-.L1983:
+.L1992:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1972
+	bge	.L1981
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13864,11 +13878,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1983
-.L1982:
+	b	.L1992
+.L1991:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1981
+	b	.L1990
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -13901,10 +13915,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2007
-.L2016:
+	bne	.L2016
+.L2025:
 	mov	w0, -1
-.L2006:
+.L2015:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13912,7 +13926,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2007:
+.L2016:
 	add	x27, x21, :lo12:.LANCHOR209
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -13922,9 +13936,9 @@ FtlLoadSysInfo:
 	strh	w0, [x27, 2]
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L2009:
-	tbz	w23, #31, .L2012
-	mov	w2, 1549
+.L2018:
+	tbz	w23, #31, .L2021
+	mov	w2, 1538
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13935,14 +13949,14 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2011:
+.L2020:
 	adrp	x1, .LANCHOR58
 	ldrh	w0, [x22, #:lo12:.LANCHOR40]
 	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2014
-	mov	w2, 1551
+	bcs	.L2023
+	mov	w2, 1540
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -13953,7 +13967,7 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2014:
+.L2023:
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, 48
 	adrp	x20, .LANCHOR81
@@ -13979,7 +13993,7 @@ FtlLoadSysInfo:
 	bl	ftl_memcpy
 	adrp	x0, .LANCHOR70
 	ldrh	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L2015
+	cbz	w0, .L2024
 	ldrh	w1, [x22, #:lo12:.LANCHOR40]
 	adrp	x0, .LANCHOR67
 	ldrh	w2, [x0, #:lo12:.LANCHOR67]
@@ -13993,13 +14007,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR195
 	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2015:
+.L2024:
 	ldr	w2, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
 	add	x0, x20, :lo12:.LANCHOR81
 	cmp	w2, w1
-	bne	.L2016
+	bne	.L2025
 	add	x21, x21, :lo12:.LANCHOR209
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
@@ -14007,7 +14021,7 @@ FtlLoadSysInfo:
 	strh	w1, [x21, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2016
+	bne	.L2025
 	adrp	x0, .LANCHOR222
 	adrp	x2, .LANCHOR73
 	adrp	x3, .LANCHOR38
@@ -14032,8 +14046,8 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR223
 	strh	w0, [x3, #:lo12:.LANCHOR223]
-	bls	.L2017
-	mov	w2, 1578
+	bls	.L2026
+	mov	w2, 1567
 	adrp	x1, .LANCHOR221
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR221
@@ -14044,7 +14058,7 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2017:
+.L2026:
 	add	x1, x20, :lo12:.LANCHOR81
 	adrp	x0, .LANCHOR92
 	add	x3, x0, :lo12:.LANCHOR92
@@ -14109,47 +14123,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR159
 	ldr	w5, [x1, #:lo12:.LANCHOR159]
 	cmp	w3, w5
-	bls	.L2018
+	bls	.L2027
 	str	w3, [x1, #:lo12:.LANCHOR159]
-.L2018:
+.L2027:
 	add	x20, x20, :lo12:.LANCHOR81
 	adrp	x1, .LANCHOR160
 	ldr	w3, [x1, #:lo12:.LANCHOR160]
 	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2019
+	bls	.L2028
 	str	w2, [x1, #:lo12:.LANCHOR160]
-.L2019:
+.L2028:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L2020
+	beq	.L2029
 	add	x0, x0, :lo12:.LANCHOR92
 	bl	make_superblock
-.L2020:
+.L2029:
 	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2021
+	beq	.L2030
 	bl	make_superblock
-.L2021:
+.L2030:
 	ldrh	w2, [x22, #:lo12:.LANCHOR94]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR94
 	cmp	w2, w1
-	beq	.L2022
+	beq	.L2031
 	bl	make_superblock
-.L2022:
+.L2031:
 	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	mov	w1, 65535
 	add	x0, x19, :lo12:.LANCHOR204
 	cmp	w2, w1
-	beq	.L2023
+	beq	.L2032
 	bl	make_superblock
-.L2023:
+.L2032:
 	mov	w0, 0
-	b	.L2006
-.L2012:
+	b	.L2015
+.L2021:
 	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w2, 1
 	mov	w1, w2
@@ -14161,19 +14175,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2010
+	beq	.L2019
 	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2010
+	bne	.L2019
 	ldr	x0, [x26, #:lo12:.LANCHOR188]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L2011
-.L2010:
+	beq	.L2020
+.L2019:
 	sub	w23, w23, #1
 	sxth	w23, w23
-	b	.L2009
+	b	.L2018
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlDumpBlockInfo,"ax",@progbits
 	.align	2
@@ -14196,44 +14210,44 @@ FtlDumpBlockInfo:
 	ldrh	w25, [x19, #:lo12:.LANCHOR53]
 	and	w21, w0, 65535
 	adrp	x1, .LANCHOR224
-	adrp	x0, .LC46
+	adrp	x0, .LC45
 	add	x1, x1, :lo12:.LANCHOR224
-	add	x0, x0, :lo12:.LC46
+	add	x0, x0, :lo12:.LC45
 	bl	printf
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x21, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w2, [x1, x0]
 	mov	w1, w21
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	bl	printf
 	strh	w21, [x23, -48]!
 	mov	x0, x23
 	bl	make_superblock
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2042
-	cbnz	w22, .L2042
+	cbz	w0, .L2051
+	cbnz	w22, .L2051
 	mov	w0, w21
 	bl	ftl_get_blk_mode
 	mov	w21, w0
 	cmp	w0, 1
-	bne	.L2033
+	bne	.L2042
 	adrp	x0, .LANCHOR54
 	ldrh	w25, [x0, #:lo12:.LANCHOR54]
-.L2033:
+.L2042:
 	ldrh	w3, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LC49
-	add	x26, x26, :lo12:.LC49
+	adrp	x26, .LC48
+	add	x26, x26, :lo12:.LC48
 	mov	w20, 0
 	mov	w27, 56
 	mov	w2, w25
 	mov	w1, w21
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L2034:
+.L2043:
 	adrp	x1, .LANCHOR105
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR180
@@ -14250,22 +14264,22 @@ FtlDumpBlockInfo:
 	adrp	x1, .LANCHOR59
 	ldrh	w10, [x1, #:lo12:.LANCHOR59]
 	mov	w1, 0
-.L2035:
+.L2044:
 	cmp	w1, w5
-	bne	.L2037
+	bne	.L2046
 	mov	w1, w19
 	umull	x19, w19, w27
 	mov	x22, 0
 	mov	w2, w21
 	bl	FlashReadPages
-.L2038:
+.L2047:
 	cmp	x22, x19
-	bne	.L2039
+	bne	.L2048
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	cmp	w25, w20
-	bne	.L2034
-.L2040:
+	bne	.L2043
+.L2049:
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14275,13 +14289,13 @@ FtlDumpBlockInfo:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2042:
+.L2051:
 	mov	w21, 0
-	b	.L2033
-.L2037:
+	b	.L2042
+.L2046:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2036
+	beq	.L2045
 	umaddl	x4, w19, w27, x0
 	orr	w2, w20, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14295,12 +14309,12 @@ FtlDumpBlockInfo:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2036:
+.L2045:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2035
-.L2039:
+	b	.L2044
+.L2048:
 	ldr	x8, [x24, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 96]
 	add	x2, x8, x22
@@ -14316,7 +14330,7 @@ FtlDumpBlockInfo:
 	ldr	w2, [x8, x22]
 	add	x22, x22, 56
 	bl	printf
-	b	.L2038
+	b	.L2047
 	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
 	.section	.text.FtlScanAllBlock,"ax",@progbits
 	.align	2
@@ -14325,25 +14339,25 @@ FtlDumpBlockInfo:
 FtlScanAllBlock:
 	sub	sp, sp, #144
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC46
+	adrp	x0, .LC45
 	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC46
+	add	x0, x0, :lo12:.LC45
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x23, x24, [sp, 64]
 	adrp	x23, .LANCHOR41
 	stp	x19, x20, [sp, 32]
-	adrp	x24, .LC51
+	adrp	x24, .LC50
 	stp	x21, x22, [sp, 48]
 	mov	w20, 0
 	add	x23, x23, :lo12:.LANCHOR41
-	add	x24, x24, :lo12:.LC51
+	add	x24, x24, :lo12:.LC50
 	str	x25, [sp, 80]
 	bl	printf
-.L2046:
+.L2055:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L2054
+	bhi	.L2063
 	ldp	x19, x20, [sp, 32]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 48]
@@ -14352,15 +14366,15 @@ FtlScanAllBlock:
 	ldr	x25, [sp, 80]
 	add	sp, sp, 144
 	ret
-.L2054:
+.L2063:
 	strh	w20, [x29, 80]
 	mov	w0, w20
 	bl	ftl_get_blk_mode
 	mov	w3, w0
 	adrp	x2, .LANCHOR84
 	ubfiz	x1, x20, 1, 16
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	adrp	x22, .LANCHOR180
 	mov	w19, 0
@@ -14384,35 +14398,35 @@ FtlScanAllBlock:
 	adrp	x1, .LANCHOR59
 	ldrh	w10, [x1, #:lo12:.LANCHOR59]
 	mov	w1, 0
-.L2047:
+.L2056:
 	cmp	w1, w5
-	bne	.L2049
+	bne	.L2058
 	mov	w25, 56
 	mov	x21, 0
 	mov	w2, 0
 	mov	w1, w19
 	umull	x25, w19, w25
 	bl	FlashReadPages
-.L2050:
+.L2059:
 	cmp	x21, x25
-	bne	.L2051
+	bne	.L2060
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
-	adrp	x25, .LC52
-	add	x25, x25, :lo12:.LC52
+	adrp	x25, .LC51
+	add	x25, x25, :lo12:.LC51
 	mov	w1, w19
 	mov	x19, 0
 	mov	w2, 1
 	bl	FlashReadPages
-.L2052:
+.L2061:
 	cmp	x21, x19
-	bne	.L2053
+	bne	.L2062
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2046
-.L2049:
+	b	.L2055
+.L2058:
 	ldrh	w2, [x3]
 	cmp	w2, w11
-	beq	.L2048
+	beq	.L2057
 	umaddl	x4, w19, w12, x0
 	lsl	w2, w2, 10
 	str	w2, [x4, 4]
@@ -14426,12 +14440,12 @@ FtlScanAllBlock:
 	asr	w2, w2, 2
 	add	x2, x8, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2048:
+.L2057:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	and	w1, w1, 65535
-	b	.L2047
-.L2051:
+	b	.L2056
+.L2060:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x21
@@ -14447,8 +14461,8 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x21]
 	add	x21, x21, 56
 	bl	printf
-	b	.L2050
-.L2053:
+	b	.L2059
+.L2062:
 	ldr	x8, [x22, #:lo12:.LANCHOR180]
 	ldrh	w1, [x29, 80]
 	add	x2, x8, x19
@@ -14464,7 +14478,7 @@ FtlScanAllBlock:
 	ldr	w2, [x8, x19]
 	add	x19, x19, 56
 	bl	printf
-	b	.L2052
+	b	.L2061
 	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14514,14 +14528,14 @@ FtlMapTblRecovery:
 	str	w0, [x29, 136]
 	add	x0, x24, :lo12:.LANCHOR54
 	str	x0, [x29, 112]
-.L2057:
+.L2066:
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L2075
+	bge	.L2083
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L2058
+	bne	.L2067
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
@@ -14537,20 +14551,20 @@ FtlMapTblRecovery:
 	str	w0, [x19, 48]
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR202
-.L2059:
+.L2068:
 	cmp	w22, w26
-	ble	.L2062
-.L2075:
+	ble	.L2070
+.L2083:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
 	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bne	.L2064
+	bne	.L2072
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L2064:
+.L2072:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -14563,7 +14577,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2062:
+.L2070:
 	ldrh	w0, [x24]
 	mov	w2, 1
 	mov	w1, w2
@@ -14573,26 +14587,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2060
+	beq	.L2069
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2061
+	bls	.L2069
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2061
+	bne	.L2069
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L2061:
+.L2069:
 	add	w22, w22, 1
 	sxth	w22, w22
-	b	.L2059
-.L2060:
-	ldrh	w0, [x24]
-	strh	w0, [x19, 60]
-	b	.L2061
-.L2058:
+	b	.L2068
+.L2067:
 	ldr	x0, [x26, #:lo12:.LANCHOR183]
 	mov	w2, 1
 	str	x0, [x20, 8]
@@ -14608,22 +14618,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2077
+	beq	.L2085
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L2077
+	bne	.L2085
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2066
-.L2077:
+	beq	.L2074
+.L2085:
 	mov	w5, 0
-.L2067:
+.L2075:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L2073
+	bge	.L2081
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w5, [x29, 108]
@@ -14635,48 +14645,48 @@ FtlMapTblRecovery:
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L2071
+	beq	.L2079
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2071
+	bls	.L2079
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2071
+	bne	.L2079
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L2071:
+.L2079:
 	add	w5, w5, 1
 	sxth	w5, w5
-	b	.L2067
-.L2066:
+	b	.L2075
+.L2074:
 	ldrh	w5, [x24, #:lo12:.LANCHOR54]
 	mov	w0, 0
 	ldr	x10, [x26, #:lo12:.LANCHOR183]
 	sub	w5, w5, #1
-.L2068:
+.L2076:
 	cmp	w0, w5
-	blt	.L2070
-.L2073:
+	blt	.L2078
+.L2081:
 	add	w4, w27, 1
 	sxth	w27, w4
-	b	.L2057
-.L2070:
+	b	.L2066
+.L2078:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L2069
+	bls	.L2077
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
 	str	w2, [x21, x1]
-.L2069:
+.L2077:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2068
+	b	.L2076
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -14710,8 +14720,6 @@ FtlLoadVonderInfo:
 	adrp	x1, .LANCHOR194
 	ldr	x1, [x1, #:lo12:.LANCHOR194]
 	str	x1, [x0, 40]
-	mov	w1, -1
-	strh	w1, [x0, 60]
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -14749,30 +14757,30 @@ FtlGcScanTempBlk:
 	stp	x25, x26, [sp, 64]
 	cmp	w19, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2104
-	cbnz	w19, .L2087
-.L2088:
+	beq	.L2115
+	cbnz	w19, .L2098
+.L2099:
 	bl	FtlGcPageVarInit
-	b	.L2089
-.L2104:
+	b	.L2100
+.L2115:
 	mov	w19, 0
-.L2087:
+.L2098:
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	beq	.L2088
-.L2089:
+	beq	.L2099
+.L2100:
 	adrp	x25, .LANCHOR59
 	add	x25, x25, :lo12:.LANCHOR59
 	mov	w26, -1
 	mov	w24, 65535
-.L2101:
+.L2112:
 	ldrh	w0, [x20]
 	strb	wzr, [x20, 8]
 	cmp	w0, w24
-	beq	.L2105
+	beq	.L2116
 	mov	w27, 56
-.L2103:
+.L2114:
 	adrp	x1, .LANCHOR106
 	adrp	x22, .LANCHOR180
 	ldrh	w6, [x25]
@@ -14784,30 +14792,30 @@ FtlGcScanTempBlk:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.L2091:
+.L2102:
 	cmp	x3, x1
-	bne	.L2093
+	bne	.L2104
 	mov	w1, w21
 	umull	x21, w21, w27
 	mov	x28, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L2094:
+.L2105:
 	cmp	x28, x21
-	bne	.L2102
+	bne	.L2113
 	adrp	x0, .LANCHOR53
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bhi	.L2103
-.L2105:
+	bhi	.L2114
+.L2116:
 	mov	w2, 0
-	b	.L2090
-.L2093:
+	b	.L2101
+.L2104:
 	ldrh	w2, [x3]
 	cmp	w2, w24
-	beq	.L2092
+	beq	.L2103
 	umaddl	x4, w21, w27, x0
 	orr	w2, w19, w2, lsl 10
 	str	w2, [x4, 4]
@@ -14818,10 +14826,10 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x5, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2092:
+.L2103:
 	add	x3, x3, 2
-	b	.L2091
-.L2102:
+	b	.L2102
+.L2113:
 	ldr	x6, [x22, #:lo12:.LANCHOR180]
 	add	x5, x6, x28
 	ldr	w4, [x5, 4]
@@ -14829,16 +14837,16 @@ FtlGcScanTempBlk:
 	bl	P2V_plane
 	and	w2, w0, 65535
 	ldr	w0, [x6, x28]
-	cbnz	w0, .L2095
+	cbnz	w0, .L2106
 	ldr	x0, [x5, 16]
 	add	x28, x28, 56
 	ldrh	w1, [x0]
 	cmp	w1, w24
-	bne	.L2096
+	bne	.L2107
 	adrp	x0, .LANCHOR135
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR135]
-.L2090:
+.L2101:
 	strb	w2, [x20, 6]
 	mov	w0, -1
 	strh	w19, [x20, 2]
@@ -14854,41 +14862,41 @@ FtlGcScanTempBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2096:
+.L2107:
 	ldp	w2, w0, [x0, 8]
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-	b	.L2094
-.L2095:
+	b	.L2105
+.L2106:
 	ldrh	w1, [x20]
 	mov	w2, w4
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
 	bl	printf
 	adrp	x0, .LANCHOR28
 	ldr	w1, [x0, #:lo12:.LANCHOR28]
 	ldrh	w0, [x20]
-	cbnz	w1, .L2097
+	cbnz	w1, .L2108
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2098
-.L2097:
+	cbz	w1, .L2109
+.L2108:
 	adrp	x2, .LANCHOR79
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 159
-	bls	.L2099
-.L2098:
+	bls	.L2110
+.L2109:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	ldr	w1, [x1, x28]
 	cmn	w1, #1
-	bne	.L2100
-.L2099:
+	bne	.L2111
+.L2110:
 	ldr	x1, [x22, #:lo12:.LANCHOR180]
 	add	x28, x1, x28
 	ldr	w26, [x28, 4]
-.L2100:
+.L2111:
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x0, 1, 16
 	mov	w19, 0
@@ -14899,7 +14907,7 @@ FtlGcScanTempBlk:
 	mov	w0, -1
 	strh	w0, [x20]
 	bl	FtlGcPageVarInit
-	b	.L2101
+	b	.L2112
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FlashReadFacBbtData,"ax",@progbits
 	.align	2
@@ -14934,11 +14942,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2115:
+.L2126:
 	cmp	w19, w20
-	ble	.L2122
+	ble	.L2133
 	mov	w0, -1
-.L2114:
+.L2125:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14946,7 +14954,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2122:
+.L2133:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -14956,37 +14964,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2116
+	beq	.L2127
 	ldr	x0, [x22, #:lo12:.LANCHOR197]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2116
-	cbz	x23, .L2123
-	cbz	w25, .L2118
-.L2121:
+	bne	.L2127
+	cbz	x23, .L2134
+	cbz	w25, .L2129
+.L2132:
 	ldr	x1, [x21, #:lo12:.LANCHOR147]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC54
+	adrp	x0, .LC53
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC53
 	bl	rknand_print_hex
-.L2123:
+.L2134:
 	mov	w0, 0
-	b	.L2114
-.L2118:
+	b	.L2125
+.L2129:
 	ldr	x5, [x21, #:lo12:.LANCHOR147]
 	adrp	x2, .LANCHOR149
 	add	x2, x2, :lo12:.LANCHOR149
 	mov	w0, 0
 	mov	w6, 1
-.L2119:
+.L2130:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2121
+	bcs	.L2132
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -14996,11 +15004,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2119
-.L2116:
+	b	.L2130
+.L2127:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2115
+	b	.L2126
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -15024,10 +15032,10 @@ FlashGetBadBlockList:
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2129
-.L2133:
+	bne	.L2140
+.L2144:
 	mov	w0, 0
-.L2130:
+.L2141:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -15036,32 +15044,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2129:
+.L2140:
 	ldr	x4, [x21, #:lo12:.LANCHOR153]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2131:
+.L2142:
 	cmp	w1, w19
-	bge	.L2130
+	bge	.L2141
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2132
+	beq	.L2143
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2132:
+.L2143:
 	cmp	w0, w5
-	bcs	.L2133
+	bcs	.L2144
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2131
+	b	.L2142
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -15077,7 +15085,7 @@ FtlMakeBbt:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2140
+	cbnz	w21, .L2151
 	bl	FtlBbtMemInit
 	adrp	x20, .LANCHOR75
 	add	x22, x20, :lo12:.LANCHOR75
@@ -15089,42 +15097,42 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR45
 	add	x0, x0, :lo12:.LANCHOR45
 	str	x0, [x29, 120]
-.L2141:
+.L2152:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2147
+	bcc	.L2158
 	adrp	x21, .LANCHOR60
 	add	x21, x21, :lo12:.LANCHOR60
 	mov	w19, 0
-.L2148:
+.L2159:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2149
+	bhi	.L2160
 	add	x21, x20, :lo12:.LANCHOR75
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2150:
+.L2161:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2154
+	bgt	.L2165
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2151
+	beq	.L2162
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2152
+	cbz	w0, .L2163
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2151:
+.L2162:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2150
-.L2147:
+	b	.L2161
+.L2158:
 	adrp	x2, .LANCHOR188
 	adrp	x0, .LANCHOR183
 	add	x19, x28, :lo12:.LANCHOR202
@@ -15136,7 +15144,7 @@ FtlMakeBbt:
 	stp	x0, x26, [x19, 8]
 	adrp	x23, .LANCHOR51
 	str	x2, [x29, 112]
-	beq	.L2142
+	beq	.L2153
 	ldrh	w4, [x23, #:lo12:.LANCHOR51]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
@@ -15151,14 +15159,14 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2143:
+.L2154:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2141
-.L2142:
+	b	.L2152
+.L2153:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
@@ -15171,12 +15179,12 @@ FtlMakeBbt:
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2144:
+.L2155:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2145
+	beq	.L2156
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -15209,29 +15217,29 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2143
+	bne	.L2154
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2144
-.L2145:
+	b	.L2155
+.L2156:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2144
-.L2149:
+	b	.L2155
+.L2160:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2148
-.L2152:
+	b	.L2159
+.L2163:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2153
+	bne	.L2164
 	strh	w19, [x21]
-	b	.L2151
-.L2153:
+	b	.L2162
+.L2164:
 	strh	w19, [x21, 4]
-.L2154:
+.L2165:
 	adrp	x0, .LANCHOR78
 	add	x19, x20, :lo12:.LANCHOR75
 	ldrh	w1, [x20, #:lo12:.LANCHOR75]
@@ -15260,7 +15268,7 @@ FtlMakeBbt:
 	strh	w0, [x19, 4]
 	strh	w1, [x20, #:lo12:.LANCHOR75]
 	bl	FtlBbmTblFlush
-.L2140:
+.L2151:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15277,29 +15285,28 @@ FtlMakeBbt:
 log2phys:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	x26, x1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x1
 	adrp	x1, .LANCHOR57
-	stp	x21, x22, [sp, 32]
-	str	w2, [x29, 120]
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	stp	x19, x20, [sp, 16]
-	add	w2, w1, 7
-	mov	x1, 1
-	stp	x23, x24, [sp, 48]
-	lsl	x1, x1, x2
-	sub	w1, w1, #1
-	and	w1, w1, w0
+	stp	x21, x22, [sp, 32]
+	ldrh	w20, [x1, #:lo12:.LANCHOR57]
+	stp	x25, x26, [sp, 64]
+	add	w1, w20, 7
+	mov	x20, 1
 	stp	x27, x28, [sp, 80]
-	and	w1, w1, 65535
-	str	w1, [x29, 124]
+	lsl	x20, x20, x1
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	lsr	w22, w0, w1
+	and	w1, w20, 65535
+	stp	w2, w1, [x29, 120]
 	adrp	x1, .LANCHOR73
-	lsr	w25, w0, w2
-	and	w22, w25, 65535
+	and	w21, w22, 65535
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	cmp	w0, w1
-	bcc	.L2161
-	mov	w2, 888
+	bcc	.L2172
+	mov	w2, 880
 	adrp	x1, .LANCHOR227
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR227
@@ -15310,33 +15317,33 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2161:
+.L2172:
 	adrp	x19, .LANCHOR97
 	adrp	x0, .LANCHOR68
 	ldr	x2, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, #:lo12:.LANCHOR68]
 	mov	x0, 0
-.L2162:
-	and	x20, x0, 65535
-	cmp	w20, w1
-	bcc	.L2167
+.L2173:
+	and	x25, x0, 65535
+	cmp	w25, w1
+	bcc	.L2178
 	bl	select_l2p_ram_region
-	and	x20, x0, 65535
+	and	x25, x0, 65535
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ubfiz	x21, x20, 4, 16
-	add	x2, x1, x21
-	ldrh	w3, [x1, x21]
+	ubfiz	x26, x25, 4, 16
+	add	x2, x1, x26
+	ldrh	w3, [x1, x26]
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L2168
+	beq	.L2179
 	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L2168
+	tbz	w1, #31, .L2179
 	bl	flush_l2p_region
-.L2168:
-	adrp	x24, .LANCHOR67
-	ldrh	w0, [x24, #:lo12:.LANCHOR67]
-	cmp	w0, w22
-	bcs	.L2169
+.L2179:
+	adrp	x28, .LANCHOR67
+	ldrh	w0, [x28, #:lo12:.LANCHOR67]
+	cmp	w0, w21
+	bcs	.L2180
 	mov	w2, 526
 	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
@@ -15348,48 +15355,47 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2169:
-	adrp	x1, .LANCHOR131
-	ubfiz	x0, x22, 2, 16
-	str	x1, [x29, 112]
-	ldr	x2, [x1, #:lo12:.LANCHOR131]
-	ldr	w28, [x2, x0]
-	cbnz	w28, .L2170
+.L2180:
+	adrp	x24, .LANCHOR131
+	ubfiz	x0, x21, 2, 16
+	ldr	x1, [x24, #:lo12:.LANCHOR131]
+	ldr	w3, [x1, x0]
+	cbnz	w3, .L2181
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	adrp	x1, .LANCHOR58
-	add	x0, x0, x21
+	add	x0, x0, x26
 	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x21
-	strh	w22, [x0, x21]
+	add	x1, x0, x26
+	strh	w21, [x0, x26]
 	str	wzr, [x1, 4]
-	b	.L2163
-.L2167:
+	b	.L2174
+.L2178:
 	add	x0, x0, 1
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L2162
-.L2163:
-	ldp	w0, w1, [x29, 120]
-	cbnz	w0, .L2164
+	cmp	w3, w21
+	bne	.L2173
+.L2174:
+	ldp	w0, w20, [x29, 120]
+	cbnz	w0, .L2175
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x0, x0, x20, lsl 4
+	add	x0, x0, x25, lsl 4
 	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x1, lsl 2]
-	str	w0, [x26]
-.L2165:
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x23]
+.L2176:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x20, x0, x20, lsl 4
-	ldr	w0, [x20, 4]
+	add	x25, x0, x25, lsl 4
+	ldr	w0, [x25, 4]
 	cmn	w0, #1
-	beq	.L2175
+	beq	.L2186
 	add	w0, w0, 1
-	str	w0, [x20, 4]
-.L2175:
+	str	w0, [x25, 4]
+.L2186:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15398,85 +15404,66 @@ log2phys:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2164:
+.L2175:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldr	w3, [x26]
-	add	x0, x0, x20, lsl 4
-	ldr	x2, [x0, 8]
-	str	w3, [x2, x1, lsl 2]
+	ldr	w2, [x23]
+	add	x0, x0, x25, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x20, lsl 2]
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
 	adrp	x0, .LANCHOR98
-	strh	w22, [x0, #:lo12:.LANCHOR98]
-	b	.L2165
-.L2170:
+	strh	w21, [x0, #:lo12:.LANCHOR98]
+	b	.L2176
+.L2181:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x23, .LANCHOR202
-	add	x27, x23, :lo12:.LANCHOR202
+	adrp	x5, .LANCHOR202
+	add	x20, x5, :lo12:.LANCHOR202
 	mov	w2, 1
-	add	x0, x0, x21
+	add	x0, x0, x26
+	str	x5, [x29, 104]
+	str	w3, [x29, 116]
 	mov	w1, w2
-	str	w28, [x27, 4]
+	str	w3, [x20, 4]
 	ldr	x0, [x0, 8]
-	str	x0, [x27, 8]
+	str	x0, [x20, 8]
 	adrp	x0, .LANCHOR188
 	ldr	x0, [x0, #:lo12:.LANCHOR188]
-	str	x0, [x27, 16]
-	mov	x0, x27
+	str	x0, [x20, 16]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	x27, [x27, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR202]
-	cmp	w0, 256
-	bne	.L2171
-	and	w4, w25, 65535
-	mov	w2, w28
-	mov	w1, w4
-	str	w4, [x29, 108]
+	ldr	x27, [x20, 16]
+	ldr	w3, [x29, 116]
+	ldr	x5, [x29, 104]
+	ldrh	w0, [x27, 8]
+	cmp	w0, w21
+	beq	.L2182
+	mov	w2, w3
+	and	w1, w22, 65535
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+	ldr	x1, [x20, 16]
+	mov	w3, 4
+	adrp	x0, .LC27
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC27
+	bl	rknand_print_hex
+	ldr	x1, [x24, #:lo12:.LANCHOR131]
+	mov	w2, 4
+	ldrh	w3, [x28, #:lo12:.LANCHOR67]
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
-	bl	printf
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
-	lsr	w1, w28, 10
-	ldr	w4, [x29, 108]
-	strh	w1, [x0, 60]
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	add	x1, x1, x21
-	ldr	x2, [x1, 8]
-	mov	w1, w4
-	bl	FtlMapWritePage
-.L2171:
-	ldrh	w0, [x27, 8]
-	cmp	w0, w22
-	beq	.L2172
-	add	x23, x23, :lo12:.LANCHOR202
-	mov	w2, w28
-	and	w1, w25, 65535
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
-	bl	printf
-	ldr	x1, [x23, 16]
-	mov	w3, 4
-	adrp	x0, .LC27
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC27
-	bl	rknand_print_hex
-	ldr	x0, [x29, 112]
-	mov	w2, 4
-	ldrh	w3, [x24, #:lo12:.LANCHOR67]
-	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR77
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR77]
-.L2172:
+.L2183:
 	ldrh	w0, [x27, 8]
-	cmp	w0, w22
-	beq	.L2173
-	mov	w2, 553
+	cmp	w0, w21
+	beq	.L2184
+	mov	w2, 552
 	adrp	x1, .LANCHOR228
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR228
@@ -15487,12 +15474,30 @@ log2phys:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2173:
+.L2184:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	add	x1, x0, x21
+	add	x1, x0, x26
 	str	wzr, [x1, 4]
-	strh	w22, [x0, x21]
-	b	.L2163
+	strh	w21, [x0, x26]
+	b	.L2174
+.L2182:
+	ldr	w0, [x5, #:lo12:.LANCHOR202]
+	cmp	w0, 256
+	bne	.L2183
+	and	w22, w22, 65535
+	mov	w2, w3
+	mov	w1, w22
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	mov	w1, w22
+	add	x0, x0, x26
+	ldr	x2, [x0, 8]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	FtlMapWritePage
+	b	.L2183
 	.size	log2phys, .-log2phys
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -15507,14 +15512,14 @@ FtlProgPages:
 	ldr	w2, [x23, #:lo12:.LANCHOR77]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	cbnz	w2, .L2180
+	cbnz	w2, .L2191
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2195
+	cbz	w2, .L2206
 	ldrb	w2, [x3, 8]
 	cmp	w2, 1
 	cset	w22, eq
-.L2182:
+.L2193:
 	mov	x20, x3
 	ldrb	w3, [x3, 9]
 	mov	w21, w1
@@ -15527,21 +15532,21 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR138
 	mov	w1, 56
 	umaddl	x21, w21, w1, x19
-.L2183:
+.L2194:
 	cmp	x19, x21
-	beq	.L2192
+	beq	.L2203
 	adrp	x26, .LANCHOR84
-	b	.L2193
-.L2195:
+	b	.L2204
+.L2206:
 	mov	w22, 0
-	b	.L2182
-.L2186:
+	b	.L2193
+.L2197:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x20]
 	cmp	w1, w0, uxth
-	bne	.L2184
+	bne	.L2195
 	ldr	x2, [x26, #:lo12:.LANCHOR84]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x20, 4]
@@ -15552,12 +15557,12 @@ FtlProgPages:
 	ldrh	w0, [x25]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L2184:
+.L2195:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L2185
+	cbnz	w0, .L2196
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L2185:
+.L2196:
 	ldr	w0, [x24, 96]
 	add	w0, w0, 1
 	str	w0, [x24, 96]
@@ -15574,16 +15579,16 @@ FtlProgPages:
 	mov	x0, x19
 	bl	FlashProgPages
 	ldr	w0, [x23, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2180
-.L2193:
+	cbnz	w0, .L2191
+.L2204:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2186
+	beq	.L2197
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2187
+	bcc	.L2198
 	mov	w2, 1583
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
@@ -15595,10 +15600,10 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2187:
+.L2198:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L2188
-.L2200:
+	cbnz	w22, .L2199
+.L2211:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -15611,31 +15616,31 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w26, w1
 	cmn	w3, #1
-	beq	.L2190
+	beq	.L2201
 	adrp	x2, .LANCHOR84
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L2191
-	adrp	x0, .LC58
+	cbnz	w0, .L2202
+	adrp	x0, .LC57
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC58
+	add	x0, x0, :lo12:.LC57
 	bl	printf
-.L2191:
+.L2202:
 	mov	w0, w26
 	bl	decrement_vpc_count
-.L2190:
+.L2201:
 	add	x19, x19, 56
-	b	.L2183
-.L2188:
+	b	.L2194
+.L2199:
 	orr	w0, w0, -2147483648
-	b	.L2200
-.L2192:
+	b	.L2211
+.L2203:
 	adrp	x0, .LANCHOR38
 	ldrb	w1, [x20, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2180
+	bcc	.L2191
 	mov	w2, 1600
 	adrp	x1, .LANCHOR229
 	adrp	x0, .LC5
@@ -15647,7 +15652,7 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2180:
+.L2191:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15662,25 +15667,25 @@ FtlProgPages:
 FtlCacheWriteBack:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2207
+	cbnz	w0, .L2218
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR132
 	ldr	x0, [x19, #:lo12:.LANCHOR132]
-	cbz	x0, .L2202
+	cbz	x0, .L2213
 	adrp	x1, .LANCHOR230
 	mov	w2, 0
 	ldr	x3, [x1, #:lo12:.LANCHOR230]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR132]
-.L2202:
+.L2213:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2207:
+.L2218:
 	mov	w0, 0
 	ret
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
@@ -15691,7 +15696,7 @@ FtlCacheWriteBack:
 FtlSysFlush:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2213
+	cbnz	w0, .L2224
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -15702,7 +15707,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2213:
+.L2224:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -15714,14 +15719,14 @@ FtlDeInit:
 	adrp	x0, .LANCHOR231
 	ldr	w0, [x0, #:lo12:.LANCHOR231]
 	cmp	w0, 1
-	bne	.L2219
+	bne	.L2230
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2219:
+.L2230:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -15752,61 +15757,61 @@ ftl_discard:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L2232
+	bhi	.L2243
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L2226
-.L2240:
+	bhi	.L2237
+.L2251:
 	mov	w0, 0
-.L2224:
+.L2235:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2226:
+.L2237:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2240
+	cbnz	w0, .L2251
 	adrp	x22, .LANCHOR56
 	bl	FtlCacheWriteBack
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L2228
+	beq	.L2239
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L2228:
+.L2239:
 	adrp	x20, .LANCHOR232
 	adrp	x23, .LANCHOR163
 	add	x20, x20, :lo12:.LANCHOR232
 	add	x23, x23, :lo12:.LANCHOR163
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L2229:
+.L2240:
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	cmp	w19, w0
-	bcs	.L2231
+	bcs	.L2242
 	adrp	x0, .LANCHOR232
 	ldr	w1, [x0, #:lo12:.LANCHOR232]
 	cmp	w1, 32
-	bls	.L2240
+	bls	.L2251
 	str	wzr, [x0, #:lo12:.LANCHOR232]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L2240
-.L2231:
+	b	.L2251
+.L2242:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L2230
+	beq	.L2241
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -15821,14 +15826,14 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L2230:
+.L2241:
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L2229
-.L2232:
+	b	.L2240
+.L2243:
 	mov	w0, -1
-	b	.L2224
+	b	.L2235
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.Ftlscanalldata,"ax",@progbits
 	.align	2
@@ -15836,9 +15841,9 @@ ftl_discard:
 	.type	Ftlscanalldata, %function
 Ftlscanalldata:
 	sub	sp, sp, #96
-	adrp	x0, .LC59
+	adrp	x0, .LC58
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC58
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
@@ -15850,32 +15855,32 @@ Ftlscanalldata:
 	add	x21, x21, :lo12:.LANCHOR73
 	str	x23, [sp, 64]
 	bl	printf
-.L2242:
+.L2253:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L2248
+	bcc	.L2259
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
 	ret
-.L2248:
+.L2259:
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
 	tst	x19, 2047
-	bne	.L2243
+	bne	.L2254
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC60
+	adrp	x0, .LC59
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L2243:
+.L2254:
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L2245
+	beq	.L2256
 	add	x0, x20, :lo12:.LANCHOR202
 	str	wzr, [x20, #:lo12:.LANCHOR202]
 	mov	w2, 0
@@ -15892,25 +15897,25 @@ Ftlscanalldata:
 	ldr	w0, [x20, #:lo12:.LANCHOR202]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L2246
+	beq	.L2257
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L2245
-.L2246:
+	beq	.L2256
+.L2257:
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC61
+	adrp	x0, .LC60
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC61
+	add	x0, x0, :lo12:.LC60
 	mov	w1, w19
 	bl	printf
-.L2245:
+.L2256:
 	add	w19, w19, 1
-	b	.L2242
+	b	.L2253
 	.size	Ftlscanalldata, .-Ftlscanalldata
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -15931,10 +15936,10 @@ FtlReUsePrevPpa:
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L2251
+	cbnz	w1, .L2262
 	adrp	x0, .LANCHOR88
 	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2252
+	cbz	x19, .L2263
 	adrp	x2, .LANCHOR82
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
@@ -15947,17 +15952,17 @@ FtlReUsePrevPpa:
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L2253:
+.L2264:
 	cmp	w1, w4
-	beq	.L2252
+	beq	.L2263
 	cmp	w19, w3
-	bne	.L2254
+	bne	.L2265
 	mov	w1, w19
 	add	x0, x0, :lo12:.LANCHOR88
 	bl	List_remove_node
 	ldrh	w0, [x23, #:lo12:.LANCHOR89]
-	cbnz	w0, .L2255
-	mov	w2, 2140
+	cbnz	w0, .L2266
+	mov	w2, 2070
 	adrp	x1, .LANCHOR233
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR233
@@ -15968,7 +15973,7 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2255:
+.L2266:
 	ldrh	w0, [x23, #:lo12:.LANCHOR89]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR89]
@@ -15978,7 +15983,7 @@ FtlReUsePrevPpa:
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L2252:
+.L2263:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -15988,18 +15993,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2254:
+.L2265:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L2252
+	beq	.L2263
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2253
-.L2251:
+	b	.L2264
+.L2262:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L2252
+	b	.L2263
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
@@ -16017,7 +16022,7 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2420
+	beq	.L2430
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
 	adrp	x0, .LANCHOR53
@@ -16025,11 +16030,11 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR53]
 	cmp	w2, w26
-	bne	.L2264
+	bne	.L2275
 	strh	wzr, [x19, 4]
-.L2427:
+.L2437:
 	strb	wzr, [x19, 6]
-.L2420:
+.L2430:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -16038,26 +16043,26 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2264:
+.L2275:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2265:
+.L2276:
 	cmp	w0, w1
-	beq	.L2266
+	beq	.L2277
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2267
+	bne	.L2278
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2268
+	beq	.L2279
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2345
+	cbnz	w0, .L2355
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2269:
+.L2280:
 	adrp	x1, .LANCHOR106
 	adrp	x2, .LANCHOR38
 	adrp	x22, .LANCHOR180
@@ -16075,23 +16080,23 @@ FtlRecoverySuperblock:
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2270:
+.L2281:
 	cmp	x1, x4
-	bne	.L2274
+	bne	.L2285
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2346
+	bne	.L2356
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2275:
+.L2286:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC62
+	adrp	x24, .LC61
 	adrp	x25, .LANCHOR235
-	add	x24, x24, :lo12:.LC62
+	add	x24, x24, :lo12:.LC61
 	add	x25, x25, :lo12:.LANCHOR235
 	mov	x28, 0
 	bl	FlashReadPages
@@ -16100,68 +16105,68 @@ FtlRecoverySuperblock:
 	str	x0, [x29, 168]
 	ldr	w21, [x0, #:lo12:.LANCHOR160]
 	sub	w21, w21, #1
-.L2276:
+.L2287:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2281
-	bne	.L2279
+	bhi	.L2292
+	bne	.L2290
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2422:
+.L2432:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2283
+	bne	.L2294
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2283
+	cbnz	w0, .L2294
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2283:
+.L2294:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w20
-	bne	.L2284
+	bne	.L2295
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2284:
+.L2295:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2285
-.L2428:
+	beq	.L2296
+.L2438:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2420
-.L2266:
+	b	.L2430
+.L2277:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2265
-.L2267:
+	b	.L2276
+.L2278:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2268
-.L2345:
+	beq	.L2279
+.L2355:
 	mov	w23, w20
-	b	.L2269
-.L2268:
-	cbz	w26, .L2271
-	mov	w2, 2211
+	b	.L2280
+.L2279:
+	cbz	w26, .L2282
+	mov	w2, 2141
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR234
@@ -16172,12 +16177,12 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2271:
+.L2282:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2272
-	mov	w2, 2212
+	beq	.L2283
+	mov	w2, 2142
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR234
@@ -16188,13 +16193,13 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2272:
+.L2283:
 	strh	wzr, [x19, 2]
-	b	.L2427
-.L2274:
+	b	.L2437
+.L2285:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2273
+	beq	.L2284
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -16205,81 +16210,81 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2273:
+.L2284:
 	add	x4, x4, 2
-	b	.L2270
-.L2346:
+	b	.L2281
+.L2356:
 	str	wzr, [x29, 176]
-	b	.L2275
-.L2281:
+	b	.L2286
+.L2292:
 	mov	x0, 56
 	ldr	x2, [x22, #:lo12:.LANCHOR180]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2277
+	cbnz	w0, .L2288
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2278
+	beq	.L2289
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2278
+	cbz	w0, .L2289
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
 	str	w4, [x0, #:lo12:.LANCHOR160]
-.L2278:
+.L2289:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2280
-.L2279:
+	bne	.L2291
+.L2290:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2422
-.L2277:
+	b	.L2432
+.L2288:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2280:
+.L2291:
 	add	x28, x28, 1
-	b	.L2276
-.L2285:
+	b	.L2287
+.L2296:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2286
-	cbnz	w1, .L2287
-.L2286:
+	bne	.L2297
+	cbnz	w1, .L2298
+.L2297:
 	adrp	x24, .LANCHOR136
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2288
+	bne	.L2299
 	str	w21, [x24, #:lo12:.LANCHOR136]
-.L2288:
+.L2299:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR136]
 	cmp	w0, w23, uxth
-	bge	.L2347
+	bge	.L2357
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2289:
+.L2300:
 	mov	w3, -1
 	adrp	x5, .LANCHOR120
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR120
 	mov	w4, 65535
-.L2290:
+.L2301:
 	cmp	w23, w6
-	bhi	.L2305
+	bhi	.L2316
 	ldr	x1, [x29, 160]
 	mov	w25, 0
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16288,24 +16293,24 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2306
-.L2347:
+	b	.L2317
+.L2357:
 	mov	w23, w26
-	b	.L2289
-.L2292:
+	b	.L2300
+.L2303:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2291
+	beq	.L2302
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2291:
+.L2302:
 	add	x2, x2, 2
-.L2306:
+.L2317:
 	cmp	x2, x1
-	bne	.L2292
+	bne	.L2303
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -16329,70 +16334,67 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2293:
+.L2304:
 	cmp	x25, x1
-	bne	.L2303
-	cbz	w2, .L2304
+	bne	.L2314
+	cbz	w2, .L2315
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2304:
+.L2315:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2290
-.L2303:
+	b	.L2301
+.L2314:
 	ldr	w8, [x1]
-	cbnz	w8, .L2294
+	cbnz	w8, .L2305
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2349
+	beq	.L2359
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2349
+	beq	.L2359
 	cmn	w3, #1
-	bne	.L2351
+	bne	.L2361
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2296
-	cbz	w10, .L2351
-.L2296:
+	bne	.L2307
+	cbz	w10, .L2361
+.L2307:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2295:
+.L2306:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2293
-.L2294:
-	cbz	w2, .L2297
+	b	.L2304
+.L2305:
+	cbz	w2, .L2308
 	str	w0, [x24, #:lo12:.LANCHOR136]
-.L2297:
+.L2308:
 	adrp	x0, .LANCHOR235
 	ldrh	w1, [x19]
 	strh	w1, [x0, #:lo12:.LANCHOR235]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2287
+	cbnz	w0, .L2298
 	adrp	x0, .LANCHOR120
 	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2299
+	bne	.L2310
 	cmn	w3, #1
-	beq	.L2300
+	beq	.L2311
 	str	w3, [x24, #:lo12:.LANCHOR136]
-.L2287:
-	mov	w1, 1
+.L2298:
 	adrp	x0, .LANCHOR236
 	mov	w23, w26
+	mov	w1, 1
 	adrp	x28, .LANCHOR136
 	strh	w1, [x0, #:lo12:.LANCHOR236]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
-	bl	FtlMapBlkWriteDumpData
 	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2307:
+.L2318:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR8
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
@@ -16404,9 +16406,9 @@ FtlRecoverySuperblock:
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2308:
+.L2319:
 	cmp	x2, x3
-	bne	.L2311
+	bne	.L2322
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -16417,100 +16419,100 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR235
 	add	x0, x0, :lo12:.LANCHOR235
 	str	x0, [x29, 120]
-.L2312:
+.L2323:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2338
+	bne	.L2348
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2339
+	bne	.L2349
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2339
+	cbz	w0, .L2349
 	adrp	x0, .LANCHOR54
 	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, w23
-	bne	.L2339
+	bne	.L2349
 	cmp	w20, w23
-	beq	.L2314
-.L2339:
+	beq	.L2325
+.L2349:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2307
+	bne	.L2318
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
 	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2340:
+.L2350:
 	cmp	w0, w1
-	beq	.L2420
+	beq	.L2430
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2341
+	beq	.L2351
 	strb	w0, [x19, 6]
-	b	.L2420
-.L2300:
+	b	.L2430
+.L2311:
 	cmp	w21, w7
-	beq	.L2301
+	beq	.L2312
 	str	w7, [x24, #:lo12:.LANCHOR136]
-	b	.L2287
-.L2301:
+	b	.L2298
+.L2312:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
-.L2429:
+.L2439:
 	sub	w0, w0, #1
-.L2423:
+.L2433:
 	str	w0, [x24, #:lo12:.LANCHOR136]
-	b	.L2287
-.L2299:
+	b	.L2298
+.L2310:
 	cmp	w28, w21
-	beq	.L2302
+	beq	.L2313
 	cmn	w28, #1
-	beq	.L2287
+	beq	.L2298
 	str	w28, [x24, #:lo12:.LANCHOR136]
-	b	.L2287
-.L2302:
+	b	.L2298
+.L2313:
 	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2429
-	b	.L2287
-.L2349:
+	bne	.L2439
+	b	.L2298
+.L2359:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2295
-.L2351:
+	b	.L2306
+.L2361:
 	mov	w2, 1
-	b	.L2295
-.L2305:
+	b	.L2306
+.L2316:
 	mov	w0, -1
-	b	.L2423
-.L2311:
+	b	.L2433
+.L2322:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2309
+	beq	.L2320
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2310
-	cbz	w5, .L2310
+	bne	.L2321
+	cbz	w5, .L2321
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2310:
+.L2321:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2309:
+.L2320:
 	add	x3, x3, 2
-	b	.L2308
-.L2338:
+	b	.L2319
+.L2348:
 	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
@@ -16519,41 +16521,38 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2313
+	bcc	.L2324
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2313
+	bhi	.L2324
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2314
+	beq	.L2325
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2315
+	beq	.L2326
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2316
-.L2322:
+	beq	.L2327
 	ldrh	w0, [x19]
-.L2426:
+.L2435:
 	bl	decrement_vpc_count
-.L2313:
-	add	x25, x25, 56
-	b	.L2312
-.L2316:
+	b	.L2324
+.L2327:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2317
+	beq	.L2328
 	ldr	x0, [x29, 168]
 	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2317
+	cbz	w0, .L2328
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR160]
-.L2317:
+.L2328:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -16562,13 +16561,13 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR136]
 	cmn	w1, #1
-	beq	.L2318
+	beq	.L2329
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2318
+	cbz	w0, .L2329
 	ldr	w1, [x29, 196]
 	cmn	w1, #1
-	beq	.L2319
+	beq	.L2330
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	add	x0, x0, x25
@@ -16582,17 +16581,15 @@ FtlRecoverySuperblock:
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2320
-.L2321:
+	bne	.L2331
+.L2332:
 	mov	w0, -1
 	str	w0, [x29, 196]
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-.L2329:
+.L2339:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2313
-.L2344:
+	beq	.L2324
+.L2354:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
@@ -16600,8 +16597,8 @@ FtlRecoverySuperblock:
 	mov	w3, w24
 	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2334
-	mov	w2, 2494
+	bhi	.L2344
+	mov	w2, 2425
 	adrp	x1, .LANCHOR234
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR234
@@ -16614,48 +16611,50 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2334:
+.L2344:
 	adrp	x1, .LANCHOR84
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2335
+	cbz	w0, .L2345
 	mov	w0, w3
-	b	.L2426
-.L2319:
+	b	.L2435
+.L2330:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2322
+	bne	.L2324
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-	b	.L2322
-.L2320:
+.L2324:
+	add	x25, x25, 56
+	b	.L2323
+.L2331:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L2321
+	bne	.L2332
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 152]
 	str	x3, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2321
+	cbz	w0, .L2332
 	ldp	w0, w1, [x29, 200]
 	ldr	x3, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2324
-.L2424:
+	bne	.L2334
+.L2434:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2321
-.L2324:
+	b	.L2332
+.L2334:
 	cmp	w0, w1
-	beq	.L2321
+	beq	.L2332
 	cmn	w0, #1
-	beq	.L2325
+	beq	.L2335
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -16664,57 +16663,57 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 104]
-.L2326:
+.L2336:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2327
+	beq	.L2337
 	ldr	x0, [x29, 112]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2327
+	cbz	w0, .L2337
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2321
-.L2327:
+	cbz	w0, .L2332
+.L2337:
 	ldr	w1, [x29, 196]
-	b	.L2424
-.L2325:
+	b	.L2434
+.L2335:
 	str	w0, [x4]
-	b	.L2326
-.L2318:
+	b	.L2336
+.L2329:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2329
+	beq	.L2339
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2329
+	beq	.L2339
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2344
+	beq	.L2354
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	adrp	x1, .LANCHOR92
 	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2333
+	beq	.L2343
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	beq	.L2333
+	beq	.L2343
 	adrp	x1, .LANCHOR94
 	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L2329
-.L2333:
+	bne	.L2339
+.L2343:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
@@ -16725,63 +16724,63 @@ FtlRecoverySuperblock:
 	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2329
+	beq	.L2339
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2329
+	cbnz	w0, .L2339
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2329
-.L2335:
+	b	.L2339
+.L2345:
 	mov	w1, w24
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	b	.L2313
-.L2315:
+	b	.L2324
+.L2326:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	bl	printf
 	adrp	x2, .LANCHOR237
 	ldr	w0, [x2, #:lo12:.LANCHOR237]
 	cmp	w0, 31
-	bhi	.L2336
+	bhi	.L2346
 	adrp	x1, .LANCHOR238
 	add	x1, x1, :lo12:.LANCHOR238
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x2, #:lo12:.LANCHOR237]
-.L2336:
+.L2346:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2337
-.L2425:
+	bne	.L2347
+.L2436:
 	str	w21, [x28, #:lo12:.LANCHOR136]
-	b	.L2313
-.L2337:
+	b	.L2324
+.L2347:
 	cmp	w21, w0
-	bcs	.L2313
-	b	.L2425
-.L2341:
+	bcs	.L2324
+	b	.L2436
+.L2351:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2340
-.L2314:
+	b	.L2350
+.L2325:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2428
+	b	.L2438
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
@@ -16790,10 +16789,10 @@ FtlRecoverySuperblock:
 FtlGcFreeTempBlock:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2431
+	cbz	w0, .L2441
 	mov	w0, 0
 	ret
-.L2431:
+.L2441:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -16807,26 +16806,26 @@ FtlGcFreeTempBlock:
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	str	x27, [sp, 80]
-	beq	.L2433
+	beq	.L2443
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2433
+	beq	.L2443
 	adrp	x0, .LANCHOR79
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR79]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2434
+	bls	.L2444
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2434:
+.L2444:
 	ldr	w0, [x21, #:lo12:.LANCHOR135]
-	cbnz	w0, .L2435
+	cbnz	w0, .L2445
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 96]
@@ -16836,10 +16835,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2435:
+.L2445:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 1
-.L2430:
+.L2440:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16847,13 +16846,13 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2433:
+.L2443:
 	str	wzr, [x21, #:lo12:.LANCHOR135]
 	mov	w0, 65535
 	ldrh	w1, [x19, #:lo12:.LANCHOR94]
 	add	x21, x19, :lo12:.LANCHOR94
 	cmp	w1, w0
-	beq	.L2456
+	beq	.L2466
 	bl	FtlCacheWriteBack
 	adrp	x20, .LANCHOR111
 	adrp	x0, .LANCHOR53
@@ -16863,7 +16862,7 @@ FtlGcFreeTempBlock:
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2437
+	beq	.L2447
 	mov	w2, 163
 	adrp	x1, .LANCHOR239
 	adrp	x0, .LC5
@@ -16875,7 +16874,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2437:
+.L2447:
 	add	x0, x19, :lo12:.LANCHOR94
 	adrp	x23, .LANCHOR84
 	ldrh	w3, [x21, #:lo12:.LANCHOR53]
@@ -16894,27 +16893,27 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR161]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR161]
-.L2438:
+.L2448:
 	ldrh	w0, [x20, #:lo12:.LANCHOR111]
 	cmp	w0, w21
-	bhi	.L2442
+	bhi	.L2452
 	mov	w0, -1
 	bl	decrement_vpc_count
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2443
+	cbz	w0, .L2453
 	ldrh	w1, [x19, #:lo12:.LANCHOR94]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	bl	printf
-.L2443:
+.L2453:
 	ldrh	w0, [x19, #:lo12:.LANCHOR94]
 	ldr	x2, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2444
+	cbz	w1, .L2454
 	bl	INSERT_DATA_LIST
-.L2445:
+.L2455:
 	adrp	x0, .LANCHOR109
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR111]
@@ -16922,22 +16921,22 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR109]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR204
+	strh	w21, [x0, #:lo12:.LANCHOR204]
 	adrp	x0, .LANCHOR89
 	ldrh	w1, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2456
-	adrp	x0, .LANCHOR204
-	mov	w1, 20
-	strh	w21, [x0, #:lo12:.LANCHOR204]
+	ble	.L2466
 	adrp	x0, .LANCHOR176
+	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L2456:
+.L2466:
 	mov	w0, 0
-	b	.L2430
-.L2442:
+	b	.L2440
+.L2452:
 	adrp	x0, .LANCHOR112
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR112]
@@ -16946,7 +16945,7 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L2439
+	bcc	.L2449
 	mov	w2, 168
 	mov	x1, x26
 	adrp	x0, .LC5
@@ -16957,7 +16956,7 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2439:
+.L2449:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -16965,7 +16964,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2440
+	bne	.L2450
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -16974,21 +16973,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L2455:
+.L2465:
 	bl	decrement_vpc_count
-.L2441:
+.L2451:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2438
-.L2440:
+	b	.L2448
+.L2450:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L2441
+	beq	.L2451
 	ldrh	w0, [x19, #:lo12:.LANCHOR94]
-	b	.L2455
-.L2444:
+	b	.L2465
+.L2454:
 	bl	INSERT_FREE_LIST
-	b	.L2445
+	b	.L2455
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -17007,7 +17006,7 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L2457
+	bcc	.L2467
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
@@ -17015,7 +17014,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR135
 	str	wzr, [x0, #:lo12:.LANCHOR135]
-.L2457:
+.L2467:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -17062,27 +17061,27 @@ FtlSysBlkInit:
 	strh	w1, [x0, #:lo12:.LANCHOR235]
 	adrp	x0, .LANCHOR39
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR236
+	adrp	x20, .LANCHOR236
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
-	strh	wzr, [x19, #:lo12:.LANCHOR236]
+	strh	wzr, [x20, #:lo12:.LANCHOR236]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
 	adrp	x0, .LANCHOR209
 	ldrh	w1, [x0, #:lo12:.LANCHOR209]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2463
-.L2465:
-	mov	w20, -1
-.L2462:
-	mov	w0, w20
+	bne	.L2473
+.L2475:
+	mov	w19, -1
+.L2472:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2463:
+.L2473:
 	bl	FtlLoadSysInfo
-	mov	w20, w0
-	cbnz	w0, .L2465
+	mov	w19, w0
+	cbnz	w0, .L2475
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -17100,16 +17099,17 @@ FtlSysBlkInit:
 	add	x2, x3, x2, uxtw 4
 	add	x1, x0, 4
 	add	x0, x0, x2
-.L2466:
+.L2476:
 	cmp	x1, x0
-	bne	.L2468
-	ldrh	w0, [x19, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2467
-	b	.L2462
-.L2468:
+	bne	.L2478
+	ldrh	w0, [x20, #:lo12:.LANCHOR236]
+	cbnz	w0, .L2477
+	bl	l2p_flush
+	b	.L2481
+.L2478:
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2466
-.L2467:
+	tbz	w2, #31, .L2476
+.L2477:
 	adrp	x0, .LANCHOR84
 	adrp	x1, .LANCHOR92
 	ldr	x2, [x0, #:lo12:.LANCHOR84]
@@ -17137,12 +17137,6 @@ FtlSysBlkInit:
 	ldrh	w1, [x4, #:lo12:.LANCHOR53]
 	strh	w1, [x0, 2]
 	strh	wzr, [x0, 4]
-	adrp	x0, .LANCHOR127
-	add	x0, x0, :lo12:.LANCHOR127
-	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
-	bl	FtlMapBlkWriteDumpData
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldrh	w1, [x0, 30]
@@ -17150,8 +17144,9 @@ FtlSysBlkInit:
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+.L2481:
 	bl	FtlVpcTblFlush
-	b	.L2462
+	b	.L2472
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.FtlLowFormat,"ax",@progbits
 	.align	2
@@ -17160,7 +17155,7 @@ FtlSysBlkInit:
 FtlLowFormat:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbnz	w0, .L2505
+	cbnz	w0, .L2514
 	stp	x29, x30, [sp, -80]!
 	adrp	x0, .LANCHOR195
 	mov	w1, 0
@@ -17188,9 +17183,9 @@ FtlLowFormat:
 	ldrh	w0, [x25, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2476
+	cbz	w0, .L2485
 	bl	FtlMakeBbt
-.L2476:
+.L2485:
 	adrp	x22, .LANCHOR56
 	adrp	x0, .LANCHOR186
 	mov	w6, 23752
@@ -17201,31 +17196,31 @@ FtlLowFormat:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 0
-.L2477:
+.L2486:
 	cmp	w0, w1
-	blt	.L2478
+	blt	.L2487
 	adrp	x21, .LANCHOR40
 	adrp	x19, .LANCHOR41
 	add	x26, x19, :lo12:.LANCHOR41
 	mov	w23, 0
 	ldrh	w24, [x21, #:lo12:.LANCHOR40]
-.L2479:
+.L2488:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2480
+	bhi	.L2489
 	adrp	x24, .LANCHOR38
 	sub	w1, w23, #2
 	ldrh	w0, [x24, #:lo12:.LANCHOR38]
 	cmp	w1, w0, lsl 1
-	bgt	.L2481
-.L2485:
+	bgt	.L2490
+.L2494:
 	add	x26, x21, :lo12:.LANCHOR40
 	mov	w23, 0
 	mov	w25, 0
-.L2482:
+.L2491:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2486
+	bhi	.L2495
 	adrp	x0, .LANCHOR74
 	ldrh	w1, [x19, #:lo12:.LANCHOR41]
 	ldrh	w3, [x24, #:lo12:.LANCHOR38]
@@ -17242,47 +17237,47 @@ FtlLowFormat:
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2487
+	ble	.L2496
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
 	str	w2, [x0, #:lo12:.LANCHOR73]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2487:
+.L2496:
 	adrp	x2, .LANCHOR28
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2488
+	bne	.L2497
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2488:
+.L2497:
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2489
+	cbz	w2, .L2498
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR223]
-.L2489:
+.L2498:
 	adrp	x2, .LANCHOR49
 	ldrh	w2, [x2, #:lo12:.LANCHOR49]
-	cbz	w2, .L2491
+	cbz	w2, .L2500
 	ldrh	w4, [x1, #:lo12:.LANCHOR223]
 	add	w4, w4, w2, lsr 1
 	strh	w4, [x1, #:lo12:.LANCHOR223]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2491
+	bge	.L2500
 	add	w2, w2, 32
 	str	w6, [x0, #:lo12:.LANCHOR73]
 	add	w2, w5, w2
 	strh	w2, [x1, #:lo12:.LANCHOR223]
-.L2491:
+.L2500:
 	ldrh	w2, [x1, #:lo12:.LANCHOR223]
 	adrp	x25, .LANCHOR222
 	ldr	w1, [x0, #:lo12:.LANCHOR73]
@@ -17326,20 +17321,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2493:
+.L2502:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2494
+	cbnz	w1, .L2503
 	ldr	x1, [x24, #:lo12:.LANCHOR84]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2493
-.L2478:
+	b	.L2502
+.L2487:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -17347,8 +17342,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2477
-.L2480:
+	b	.L2486
+.L2489:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -17356,8 +17351,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2479
-.L2481:
+	b	.L2488
+.L2490:
 	udiv	w0, w23, w0
 	adrp	x1, .LANCHOR66
 	ldr	w23, [x1, #:lo12:.LANCHOR66]
@@ -17367,17 +17362,17 @@ FtlLowFormat:
 	add	x25, x19, :lo12:.LANCHOR41
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w23, [x21, #:lo12:.LANCHOR40]
-.L2483:
+.L2492:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2485
+	bls	.L2494
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2483
-.L2486:
+	b	.L2492
+.L2495:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -17385,8 +17380,8 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2482
-.L2494:
+	b	.L2491
+.L2503:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17406,20 +17401,20 @@ FtlLowFormat:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2495:
+.L2504:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2496
+	cbnz	w1, .L2505
 	ldr	x1, [x24, #:lo12:.LANCHOR84]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2495
-.L2496:
+	b	.L2504
+.L2505:
 	ldr	w1, [x20, #:lo12:.LANCHOR159]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -17445,11 +17440,11 @@ FtlLowFormat:
 	str	w0, [x20, #:lo12:.LANCHOR159]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2475
+	cbnz	w0, .L2484
 	adrp	x0, .LANCHOR231
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR231]
-.L2475:
+.L2484:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17457,7 +17452,7 @@ FtlLowFormat:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2505:
+.L2514:
 	mov	w0, 0
 	ret
 	.size	FtlLowFormat, .-FtlLowFormat
@@ -17474,11 +17469,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w2
-	beq	.L2509
+	beq	.L2518
 	add	x1, x0, :lo12:.LANCHOR94
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2510
-.L2509:
+	cbnz	w0, .L2519
+.L2518:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
@@ -17493,7 +17488,7 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2510:
+.L2519:
 	add	x0, x19, :lo12:.LANCHOR94
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17506,29 +17501,29 @@ Ftl_get_new_temp_ppa:
 Ftl_gc_temp_data_write_back:
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	cbz	w0, .L2513
+	cbz	w0, .L2522
 	mov	w0, 0
 	ret
-.L2516:
+.L2525:
 	mov	w0, 0
-.L2512:
+.L2521:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2513:
+.L2522:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR8
 	add	x29, sp, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR103
-	cbz	w0, .L2515
+	cbz	w0, .L2524
 	ldr	w0, [x19, #:lo12:.LANCHOR103]
-	tbz	x0, 0, .L2515
+	tbz	x0, 0, .L2524
 	adrp	x0, .LANCHOR94+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2516
-.L2515:
+	cbnz	w0, .L2525
+.L2524:
 	adrp	x20, .LANCHOR181
 	ldr	w1, [x19, #:lo12:.LANCHOR103]
 	mov	w3, 0
@@ -17538,26 +17533,26 @@ Ftl_gc_temp_data_write_back:
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2517:
+.L2526:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2519
+	bcc	.L2528
 	ldr	x0, [x20, #:lo12:.LANCHOR181]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR94+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
-	cbnz	w0, .L2516
+	cbnz	w0, .L2525
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2529
-.L2519:
+	b	.L2538
+.L2528:
 	umull	x0, w11, w12
 	ldr	x2, [x20, #:lo12:.LANCHOR181]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L2518
+	bne	.L2527
 	adrp	x0, .LANCHOR94
 	adrp	x3, .LANCHOR84
 	ldrh	w4, [x0, #:lo12:.LANCHOR94]
@@ -17574,17 +17569,17 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2529:
+.L2538:
 	mov	w0, 1
-	b	.L2512
-.L2518:
+	b	.L2521
+.L2527:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2517
+	b	.L2526
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
@@ -17593,7 +17588,7 @@ Ftl_gc_temp_data_write_back:
 rk_ftl_garbage_collect:
 	adrp	x1, .LANCHOR77
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
-	cbnz	w1, .L2582
+	cbnz	w1, .L2591
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
@@ -17603,79 +17598,79 @@ rk_ftl_garbage_collect:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2584
+	cbnz	w1, .L2593
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, 47
-	bls	.L2584
+	bls	.L2593
 	adrp	x5, .LANCHOR114
 	mov	w2, 65535
 	ldrh	w8, [x5, #:lo12:.LANCHOR114]
 	cmp	w8, w2
-	beq	.L2532
+	beq	.L2541
 	adrp	x7, .LANCHOR113
 	ldrh	w1, [x7, #:lo12:.LANCHOR113]
 	cmp	w1, w2
-	bne	.L2532
+	bne	.L2541
 	adrp	x3, .LANCHOR115
 	ldrh	w6, [x3, #:lo12:.LANCHOR115]
 	cmp	w6, w1
-	beq	.L2532
+	beq	.L2541
 	adrp	x2, .LANCHOR116
 	ldrh	w4, [x2, #:lo12:.LANCHOR116]
 	cmp	w4, w1
-	beq	.L2532
+	beq	.L2541
 	mov	w1, -1
 	strh	w8, [x7, #:lo12:.LANCHOR113]
 	strh	w6, [x5, #:lo12:.LANCHOR114]
 	strh	w4, [x3, #:lo12:.LANCHOR115]
 	strh	w1, [x2, #:lo12:.LANCHOR116]
-.L2532:
-	cbnz	w0, .L2585
+.L2541:
+	cbnz	w0, .L2594
 	adrp	x0, .LANCHOR89
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 24
-	bhi	.L2586
+	bhi	.L2595
 	adrp	x1, .LANCHOR53
 	cmp	w0, 16
 	ldrh	w20, [x1, #:lo12:.LANCHOR53]
-	bls	.L2535
+	bls	.L2544
 	lsr	w20, w20, 5
-.L2534:
+.L2543:
 	adrp	x2, .LANCHOR176
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2538
+	bcs	.L2547
 	adrp	x0, .LANCHOR94
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bne	.L2539
+	bne	.L2548
 	adrp	x1, .LANCHOR113
 	ldrh	w1, [x1, #:lo12:.LANCHOR113]
 	cmp	w1, w0
-	bne	.L2539
+	bne	.L2548
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	cbnz	w0, .L2540
+	cbnz	w0, .L2549
 	adrp	x1, .LANCHOR73
 	adrp	x4, .LANCHOR101
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	ldr	w4, [x4, #:lo12:.LANCHOR101]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2541
-.L2540:
+	bcs	.L2550
+.L2549:
 	adrp	x1, .LANCHOR223
 	ldrh	w1, [x1, #:lo12:.LANCHOR223]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR176]
-.L2542:
+.L2551:
 	adrp	x1, .LANCHOR172
 	str	wzr, [x1, #:lo12:.LANCHOR172]
-.L2530:
+.L2539:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17683,82 +17678,82 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2535:
+.L2544:
 	cmp	w0, 12
-	bls	.L2536
+	bls	.L2545
 	lsr	w20, w20, 4
-	b	.L2534
-.L2536:
+	b	.L2543
+.L2545:
 	cmp	w0, 8
-	bls	.L2534
+	bls	.L2543
 	lsr	w20, w20, 2
-	b	.L2534
-.L2586:
+	b	.L2543
+.L2595:
 	mov	w20, 1
-	b	.L2534
-.L2541:
+	b	.L2543
+.L2550:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR176]
-	b	.L2542
-.L2539:
+	b	.L2551
+.L2548:
 	adrp	x0, .LANCHOR223
 	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR176]
-.L2538:
+.L2547:
 	adrp	x0, .LANCHOR117
 	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2533
+	cbz	w0, .L2542
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2533:
+.L2542:
 	adrp	x19, .LANCHOR204
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	cmp	w2, w0
-	bne	.L2545
+	bne	.L2554
 	adrp	x0, .LANCHOR113
 	ldrh	w1, [x0, #:lo12:.LANCHOR113]
 	cmp	w1, w2
-	beq	.L2546
+	beq	.L2555
 	adrp	x2, .LANCHOR84
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2547
+	cbnz	w1, .L2556
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2547:
+.L2556:
 	ldrh	w1, [x0, #:lo12:.LANCHOR113]
 	strh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR113]
-.L2546:
+.L2555:
 	add	x0, x19, :lo12:.LANCHOR204
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2545
+	beq	.L2554
 	bl	IsBlkInGcList
-	cbz	w0, .L2549
+	cbz	w0, .L2558
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2549:
+.L2558:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2550
+	cbz	w0, .L2559
 	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	add	x3, x19, :lo12:.LANCHOR204
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2550:
+.L2559:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR204
 	cmp	w1, w0
-	beq	.L2545
+	beq	.L2554
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR241
@@ -17771,31 +17766,31 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR242
 	strh	w1, [x0, #:lo12:.LANCHOR242]
-.L2545:
+.L2554:
 	adrp	x0, .LANCHOR92
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	str	x0, [x29, 144]
 	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2551
+	beq	.L2560
 	adrp	x0, .LANCHOR93
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	beq	.L2551
+	beq	.L2560
 	adrp	x23, .LANCHOR178
 	add	x0, x23, :lo12:.LANCHOR178
 	str	x0, [x29, 168]
-.L2552:
+.L2561:
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2553
+	bne	.L2562
 	adrp	x0, .LANCHOR172
 	adrp	x22, .LANCHOR53
 	add	x22, x22, :lo12:.LANCHOR53
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-.L2554:
+.L2563:
 	ldrh	w5, [x23, #:lo12:.LANCHOR178]
 	add	x7, x23, :lo12:.LANCHOR178
 	mov	w0, w5
@@ -17804,28 +17799,28 @@ rk_ftl_garbage_collect:
 	strh	w6, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2555
+	bne	.L2564
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2530
-.L2585:
+	b	.L2539
+.L2594:
 	mov	w20, 1
-	b	.L2533
-.L2551:
+	b	.L2542
+.L2560:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2621:
+.L2630:
 	adrp	x0, .LANCHOR240
 	ldrh	w0, [x0, #:lo12:.LANCHOR240]
-	b	.L2530
-.L2555:
+	b	.L2539
+.L2564:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2556
+	cbz	w0, .L2565
 	strh	w5, [x23, #:lo12:.LANCHOR178]
-	b	.L2554
-.L2556:
+	b	.L2563
+.L2565:
 	adrp	x24, .LANCHOR84
 	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
@@ -17837,29 +17832,29 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2558
+	bgt	.L2567
 	cmp	w5, 48
-	bls	.L2559
+	bls	.L2568
 	cmp	w3, 8
-	bls	.L2559
+	bls	.L2568
 	adrp	x3, .LANCHOR109
 	ldrh	w3, [x3, #:lo12:.LANCHOR109]
 	cmp	w3, 35
-	bhi	.L2559
-.L2558:
+	bhi	.L2568
+.L2567:
 	ldr	x3, [x29, 168]
 	strh	wzr, [x3]
-.L2559:
+.L2568:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2560
+	bgt	.L2569
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
 	adrp	x0, .LANCHOR178
 	strh	wzr, [x0, #:lo12:.LANCHOR178]
-	b	.L2621
-.L2560:
-	cbnz	w1, .L2561
+	b	.L2630
+.L2569:
+	cbnz	w1, .L2570
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldr	x0, [x29, 168]
@@ -17867,22 +17862,22 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L2554
-.L2561:
+	b	.L2563
+.L2570:
 	adrp	x0, .LANCHOR8
 	add	x3, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2562
+	cbz	w0, .L2571
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2562:
+.L2571:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w6
-	bne	.L2563
-	mov	w2, 851
+	bne	.L2572
+	mov	w2, 857
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17893,13 +17888,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2563:
+.L2572:
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2564
-	mov	w2, 852
+	bne	.L2573
+	mov	w2, 858
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17910,13 +17905,13 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2564:
+.L2573:
 	adrp	x0, .LANCHOR94
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L2565
-	mov	w2, 853
+	bne	.L2574
+	mov	w2, 859
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR243
@@ -17927,7 +17922,7 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2565:
+.L2574:
 	add	x22, x19, :lo12:.LANCHOR204
 	mov	x0, x22
 	bl	make_superblock
@@ -17940,7 +17935,7 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR242]
 	strb	wzr, [x22, 6]
-.L2553:
+.L2562:
 	mov	w0, 1
 	str	w0, [x21, #:lo12:.LANCHOR171]
 	adrp	x0, .LANCHOR8
@@ -17948,29 +17943,29 @@ rk_ftl_garbage_collect:
 	stp	x0, x1, [x29, 120]
 	ldrb	w2, [x0, #:lo12:.LANCHOR8]
 	ldrh	w26, [x1, #:lo12:.LANCHOR53]
-	cbz	w2, .L2566
+	cbz	w2, .L2575
 	add	x0, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2566
+	bne	.L2575
 	adrp	x0, .LANCHOR54
 	ldrh	w26, [x0, #:lo12:.LANCHOR54]
-.L2566:
+.L2575:
 	add	x0, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w26
-	ble	.L2567
+	ble	.L2576
 	sub	w20, w26, w0
 	and	w20, w20, 65535
-.L2567:
+.L2576:
 	adrp	x0, .LANCHOR241
 	mov	w27, 0
 	add	x0, x0, :lo12:.LANCHOR241
 	str	x0, [x29, 160]
-.L2568:
+.L2577:
 	cmp	w20, w27, uxth
-	bls	.L2576
+	bls	.L2585
 	add	x1, x19, :lo12:.LANCHOR204
 	adrp	x0, .LANCHOR38
 	adrp	x24, .LANCHOR107
@@ -17983,23 +17978,23 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	add	w4, w4, w27
 	mov	w5, 56
-	b	.L2577
-.L2570:
+	b	.L2586
+.L2579:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2569
+	beq	.L2578
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2569:
+.L2578:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2577:
+.L2586:
 	cmp	w2, w7
-	bne	.L2570
+	bne	.L2579
 	add	x1, x19, :lo12:.LANCHOR204
 	adrp	x25, .LANCHOR103
 	add	x25, x25, :lo12:.LANCHOR103
@@ -18010,27 +18005,27 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2571:
+.L2580:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2575
+	bne	.L2584
 	add	w27, w27, 1
-	b	.L2568
-.L2575:
+	b	.L2577
+.L2584:
 	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2572
+	beq	.L2581
 	ldr	x28, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x28]
 	cmp	w1, w0
-	bne	.L2572
+	bne	.L2581
 	ldr	w4, [x28, 8]
 	cmn	w4, #1
-	bne	.L2573
-	mov	w2, 892
+	bne	.L2582
+	mov	w2, 898
 	str	w4, [x29, 112]
 	adrp	x1, .LANCHOR243
 	adrp	x0, .LC5
@@ -18043,7 +18038,7 @@ rk_ftl_garbage_collect:
 	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 112]
-.L2573:
+.L2582:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
@@ -18054,7 +18049,7 @@ rk_ftl_garbage_collect:
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2572
+	bne	.L2581
 	ldr	x1, [x29, 160]
 	adrp	x4, .LANCHOR181
 	ldr	x2, [x29, 160]
@@ -18100,52 +18095,52 @@ rk_ftl_garbage_collect:
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2574
+	cbnz	w0, .L2583
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x25]
 	cmp	w1, w0
-	beq	.L2574
+	beq	.L2583
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2572
-.L2574:
+	cbnz	w0, .L2581
+.L2583:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2572
-.L2622:
+	cbz	w0, .L2581
+.L2631:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
-	b	.L2621
-.L2572:
+	b	.L2630
+.L2581:
 	add	x22, x22, 56
-	b	.L2571
-.L2576:
+	b	.L2580
+.L2585:
 	add	x1, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w26, w20
-	bhi	.L2578
+	bhi	.L2587
 	adrp	x0, .LANCHOR103
 	ldr	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L2579
+	cbz	w0, .L2588
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2622
-.L2579:
+	cbnz	w0, .L2631
+.L2588:
 	adrp	x0, .LANCHOR241
 	ldrh	w0, [x0, #:lo12:.LANCHOR241]
-	cbnz	w0, .L2580
+	cbnz	w0, .L2589
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	adrp	x20, .LANCHOR84
 	add	x0, x19, :lo12:.LANCHOR204
 	ldr	x3, [x20, #:lo12:.LANCHOR84]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w4, [x3, x2]
-	cbz	w4, .L2580
+	cbz	w4, .L2589
 	adrp	x2, .LANCHOR242
 	mov	w3, 0
 	ldrh	w5, [x2, #:lo12:.LANCHOR242]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC66
-	add	x0, x0, :lo12:.LC66
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	bl	printf
 	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	ldr	x0, [x20, #:lo12:.LANCHOR84]
@@ -18155,27 +18150,27 @@ rk_ftl_garbage_collect:
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2580:
+.L2589:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR204]
-.L2578:
+.L2587:
 	adrp	x0, .LANCHOR89
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 2
-	bhi	.L2581
+	bhi	.L2590
 	ldr	x0, [x29, 128]
 	ldrh	w20, [x0, #:lo12:.LANCHOR53]
-	b	.L2552
-.L2581:
+	b	.L2561
+.L2590:
 	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2530
-.L2582:
+	b	.L2539
+.L2591:
 	mov	w0, 0
 	ret
-.L2584:
+.L2593:
 	mov	w0, 0
-	b	.L2530
+	b	.L2539
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -18183,8 +18178,8 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC67
-	add	x1, x1, :lo12:.LC67
+	adrp	x1, .LC66
+	add	x1, x1, :lo12:.LC66
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR231
@@ -18206,42 +18201,42 @@ FtlInit:
 	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2624
+	cbz	w0, .L2633
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC68
+	adrp	x0, .LC67
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC68
-.L2632:
+	add	x0, x0, :lo12:.LC67
+.L2641:
 	bl	printf
-.L2625:
+.L2634:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2624:
+.L2633:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2626
+	cbz	w0, .L2635
 	adrp	x1, .LANCHOR245
-	adrp	x0, .LC69
+	adrp	x0, .LC68
 	add	x1, x1, :lo12:.LANCHOR245
-	add	x0, x0, :lo12:.LC69
-	b	.L2632
-.L2626:
+	add	x0, x0, :lo12:.LC68
+	b	.L2641
+.L2635:
 	mov	w1, 1
 	str	w1, [x19, #:lo12:.LANCHOR231]
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR89
 	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 15
-	bhi	.L2625
+	bhi	.L2634
 	mov	w19, 1024
-.L2628:
+.L2637:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2628
-	b	.L2625
+	bne	.L2637
+	b	.L2634
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -18253,15 +18248,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2634
+	cbnz	w0, .L2643
 	adrp	x0, .LANCHOR15
 	add	x0, x0, :lo12:.LANCHOR15
 	bl	FtlInit
-.L2634:
+.L2643:
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -18275,7 +18270,7 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2651
+	cbz	w0, .L2660
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
@@ -18288,41 +18283,41 @@ ftl_fix_nand_power_lost_error:
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC71
+	adrp	x19, .LC70
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC70
 	bl	printf
 	adrp	x0, .LANCHOR92
 	add	x11, x0, :lo12:.LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	adrp	x0, .LANCHOR93
 	add	x20, x0, :lo12:.LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
-	bl	FtlGcRefreshBlock
+	bl	FtlGcRefreshOpenBlock
 	mov	x0, x11
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2638:
+.L2647:
 	subs	w20, w20, #1
-	beq	.L2642
+	beq	.L2651
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2638
-.L2642:
+	cbnz	w0, .L2647
+.L2651:
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC71
+	add	x0, x19, :lo12:.LC70
 	bl	printf
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2640
+	cbnz	w19, .L2649
 	add	x20, x29, 128
 	adrp	x22, .LANCHOR78
 	strh	w23, [x20, -48]!
@@ -18335,14 +18330,14 @@ ftl_fix_nand_power_lost_error:
 	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2643:
+.L2652:
 	cmp	w0, w3
-	bne	.L2645
+	bne	.L2654
 	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC72
-	add	x0, x0, :lo12:.LC72
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR78]
 	mov	w2, w19
@@ -18352,7 +18347,7 @@ ftl_fix_nand_power_lost_error:
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2640:
+.L2649:
 	mov	w0, -1
 	strh	w0, [x25, #:lo12:.LANCHOR235]
 	ldp	x19, x20, [sp, 16]
@@ -18361,22 +18356,22 @@ ftl_fix_nand_power_lost_error:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2645:
+.L2654:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2644
+	beq	.L2653
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2644:
+.L2653:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2643
-.L2651:
+	b	.L2652
+.L2660:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -18397,13 +18392,13 @@ ftl_read:
 	mov	w27, w2
 	stp	x21, x22, [sp, 48]
 	stp	x25, x26, [sp, 80]
-	bne	.L2655
+	bne	.L2664
 	mov	x2, x3
 	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2654:
+.L2663:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18413,18 +18408,18 @@ ftl_read:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 208
 	ret
-.L2655:
+.L2664:
 	add	w0, w1, w2
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR69
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w1, w0
-	bhi	.L2678
+	bhi	.L2687
 	adrp	x0, .LANCHOR231
 	ldr	w21, [x0, #:lo12:.LANCHOR231]
 	cmn	w21, #1
-	beq	.L2654
+	beq	.L2663
 	adrp	x22, .LANCHOR56
 	bl	FtlCacheWriteBack
 	adrp	x25, .LANCHOR138
@@ -18450,42 +18445,42 @@ ftl_read:
 	ldr	w2, [x29, 172]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR166]
-.L2657:
+.L2666:
 	ldr	w0, [x29, 172]
-	cbnz	w0, .L2677
+	cbnz	w0, .L2686
 	adrp	x0, .LANCHOR117
 	ldrh	w0, [x0, #:lo12:.LANCHOR117]
-	cbz	w0, .L2654
+	cbz	w0, .L2663
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2654
-.L2677:
+	b	.L2663
+.L2686:
 	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2658
+	bne	.L2667
 	add	x3, x22, :lo12:.LANCHOR56
 	mov	w28, 0
-.L2659:
+.L2668:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2661
-.L2662:
+	bcc	.L2670
+.L2671:
 	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 172]
-	beq	.L2666
+	beq	.L2675
 	adrp	x0, .LANCHOR38
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w24, w0, lsl 2
-	bne	.L2657
-.L2666:
-	cbz	w24, .L2657
+	bne	.L2666
+.L2675:
+	cbz	w24, .L2666
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w1, w24
 	mov	w2, 0
@@ -18504,35 +18499,35 @@ ftl_read:
 	umull	x0, w24, w0
 	mov	x24, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LC61
-	add	x0, x0, :lo12:.LC61
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
 	str	x0, [x29, 112]
-.L2676:
+.L2685:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w2, [x29, 168]
 	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2668
+	bne	.L2677
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR186
 	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2669
+	bne	.L2678
 	ldr	x0, [x29, 136]
 	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2693:
+.L2702:
 	bl	ftl_memcpy
-.L2669:
+.L2678:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x0, x0, x24
 	ldr	x2, [x0, 16]
 	ldr	w1, [x0, 24]
 	ldr	w3, [x2, 8]
 	cmp	w1, w3
-	beq	.L2670
+	beq	.L2679
 	ldr	w3, [x25, 72]
 	add	w3, w3, 1
 	str	w3, [x25, 72]
@@ -18546,30 +18541,30 @@ ftl_read:
 	ldr	w2, [x0, 4]
 	ldr	x0, [x29, 112]
 	bl	printf
-.L2670:
+.L2679:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	add	x1, x0, x24
 	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2671
+	bne	.L2680
 	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x25, 72]
-.L2672:
+.L2681:
 	ldr	x0, [x29, 120]
 	add	x24, x24, 56
 	cmp	x0, x24
-	bne	.L2676
+	bne	.L2685
 	mov	w24, 0
-	b	.L2657
-.L2661:
+	b	.L2666
+.L2670:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2660
+	bhi	.L2669
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2660
+	bls	.L2669
 	sub	w0, w0, w19
 	str	x3, [x29, 136]
 	lsl	w0, w0, 9
@@ -18578,17 +18573,17 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 136]
-.L2660:
+.L2669:
 	add	w28, w28, 1
-	b	.L2659
-.L2658:
+	b	.L2668
+.L2667:
 	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
 	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2663
+	bne	.L2672
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
@@ -18601,9 +18596,9 @@ ftl_read:
 	csel	w2, w27, w2, ls
 	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2664
+	bne	.L2673
 	str	x23, [x0, 8]
-.L2664:
+.L2673:
 	adrp	x1, .LANCHOR59
 	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
@@ -18614,11 +18609,11 @@ ftl_read:
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2662
-.L2663:
+	b	.L2671
+.L2672:
 	ldr	w1, [x29, 164]
 	cmp	w20, w1
-	bne	.L2665
+	bne	.L2674
 	ldrh	w2, [x22, #:lo12:.LANCHOR56]
 	adrp	x1, .LANCHOR187
 	ldr	w3, [x29, 148]
@@ -18628,35 +18623,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2664
-.L2692:
+	bne	.L2673
+.L2701:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2664
-.L2665:
+	b	.L2673
+.L2674:
 	ldrh	w1, [x22, #:lo12:.LANCHOR56]
 	mul	w1, w1, w20
-	b	.L2692
-.L2668:
+	b	.L2701
+.L2677:
 	ldr	w2, [x29, 164]
 	cmp	w2, w1
-	bne	.L2669
+	bne	.L2678
 	ldr	x1, [x0, 8]
 	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2669
+	bne	.L2678
 	ldrh	w0, [x22, #:lo12:.LANCHOR56]
 	mul	w0, w0, w2
 	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2693
-.L2671:
+	b	.L2702
+.L2680:
 	cmp	w0, 256
-	bne	.L2672
+	bne	.L2681
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -18665,13 +18660,13 @@ ftl_read:
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
 	adrp	x3, .LANCHOR204
-.L2674:
+.L2683:
 	subs	w2, w2, #1
-	bne	.L2673
-.L2675:
+	bne	.L2682
+.L2684:
 	bl	FtlSysFlush
-	b	.L2672
-.L2673:
+	b	.L2681
+.L2682:
 	mov	w1, 1
 	str	x3, [x29, 96]
 	mov	w0, w1
@@ -18682,11 +18677,11 @@ ftl_read:
 	ldr	w2, [x29, 108]
 	ldrh	w0, [x3, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2674
-	b	.L2675
-.L2678:
+	beq	.L2683
+	b	.L2684
+.L2687:
 	mov	w21, -1
-	b	.L2654
+	b	.L2663
 	.size	ftl_read, .-ftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
@@ -18703,17 +18698,17 @@ FtlWrite:
 	ldr	w1, [x1, #:lo12:.LANCHOR77]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2726
+	cbnz	w1, .L2735
 	and	w0, w0, 255
 	mov	w23, w2
 	mov	x24, x3
 	cmp	w0, 16
-	bne	.L2696
+	bne	.L2705
 	mov	x2, x3
 	mov	w1, w23
 	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2694:
+.L2703:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18721,16 +18716,16 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2696:
+.L2705:
 	adrp	x0, .LANCHOR69
 	add	w2, w21, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w2, w0
-	bhi	.L2727
+	bhi	.L2736
 	adrp	x0, .LANCHOR231
 	ldr	w0, [x0, #:lo12:.LANCHOR231]
 	cmn	w0, #1
-	beq	.L2694
+	beq	.L2703
 	adrp	x0, .LANCHOR246
 	adrp	x26, .LANCHOR56
 	mov	w1, 2048
@@ -18749,25 +18744,25 @@ FtlWrite:
 	str	w0, [x2, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR132
 	ldr	x2, [x0, #:lo12:.LANCHOR132]
-	cbz	x2, .L2698
+	cbz	x2, .L2707
 	ldr	w0, [x2, 24]
 	cmp	w20, w0
-	beq	.L2699
+	beq	.L2708
 	bl	FtlCacheWriteBack
-.L2698:
+.L2707:
 	adrp	x0, .LANCHOR92
 	mov	w19, w20
 	add	x22, x0, :lo12:.LANCHOR92
-.L2700:
-	cbnz	w25, .L2725
+.L2709:
+	cbnz	w25, .L2734
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w20
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2726:
+.L2735:
 	mov	w0, 0
-	b	.L2694
-.L2699:
+	b	.L2703
+.L2708:
 	adrp	x3, .LANCHOR164
 	ldr	w0, [x3, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
@@ -18783,15 +18778,15 @@ FtlWrite:
 	mov	x1, x24
 	mov	w2, w22
 	bl	ftl_memcpy
-	cbz	w27, .L2726
+	cbz	w27, .L2735
 	sub	w23, w23, w19
 	add	w21, w21, w19
 	add	x24, x24, x22
 	add	w20, w20, 1
 	bl	FtlCacheWriteBack
 	mov	w25, w27
-	b	.L2698
-.L2725:
+	b	.L2707
+.L2734:
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
 	adrp	x1, .LANCHOR38
@@ -18799,7 +18794,7 @@ FtlWrite:
 	ldrb	w2, [x0, 6]
 	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2701
+	bcc	.L2710
 	mov	w2, 1668
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18811,13 +18806,13 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2701:
+.L2710:
 	ldrh	w0, [x22, 4]
-	cbnz	w0, .L2702
+	cbnz	w0, .L2711
 	bl	FtlCacheWriteBack
 	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2702:
+.L2711:
 	ldrb	w0, [x22, 7]
 	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
@@ -18830,7 +18825,7 @@ FtlWrite:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2703
+	bcc	.L2712
 	mov	w2, 1701
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18842,7 +18837,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2703:
+.L2712:
 	adrp	x0, .LANCHOR59
 	add	x0, x0, :lo12:.LANCHOR59
 	str	xzr, [x29, 168]
@@ -18850,21 +18845,21 @@ FtlWrite:
 	adrp	x0, .LANCHOR58
 	add	x0, x0, :lo12:.LANCHOR58
 	str	x0, [x29, 104]
-.L2704:
+.L2713:
 	ldr	w1, [x29, 144]
 	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2723
+	bcc	.L2732
 	mov	x27, x1
-.L2705:
+.L2714:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x3, x22
 	mov	w2, 0
 	mov	w1, w27
 	bl	FtlProgPages
 	cmp	w25, w27
-	bcs	.L2724
+	bcs	.L2733
 	mov	w2, 1790
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18876,12 +18871,12 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2724:
+.L2733:
 	sub	w25, w25, w27
-	b	.L2700
-.L2723:
+	b	.L2709
+.L2732:
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L2705
+	cbz	w0, .L2714
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -18912,9 +18907,9 @@ FtlWrite:
 	ldr	w0, [x29, 152]
 	cmp	w19, w20
 	ccmp	w0, w19, 4, ne
-	bne	.L2706
+	bne	.L2715
 	cmp	w19, w20
-	bne	.L2707
+	bne	.L2716
 	ldr	x0, [x29, 160]
 	ldrh	w2, [x0, #:lo12:.LANCHOR56]
 	udiv	w0, w21, w2
@@ -18924,23 +18919,23 @@ FtlWrite:
 	cmp	w2, w23
 	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2708:
+.L2717:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
 	ldrh	w0, [x0, #:lo12:.LANCHOR56]
 	cmp	w0, w1
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
-	bne	.L2709
+	bne	.L2718
 	add	x3, x0, x26
 	cmp	w19, w20
-	bne	.L2710
+	bne	.L2719
 	str	x24, [x3, 8]
-.L2711:
+.L2720:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x22, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2720
+	bcc	.L2729
 	mov	w2, 1775
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -18952,7 +18947,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2720:
+.L2729:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -18971,8 +18966,8 @@ FtlWrite:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2704
-.L2707:
+	b	.L2713
+.L2716:
 	ldr	x0, [x29, 160]
 	add	w2, w21, w23
 	str	wzr, [x29, 148]
@@ -18980,27 +18975,27 @@ FtlWrite:
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2708
-.L2710:
+	b	.L2717
+.L2719:
 	ldr	w0, [x29, 156]
-.L2738:
+.L2747:
 	mul	w0, w0, w19
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x24, x0
 	str	x0, [x3, 8]
-	b	.L2711
-.L2709:
+	b	.L2720
+.L2718:
 	add	x0, x0, x26
 	cmp	w19, w20
-	bne	.L2712
+	bne	.L2721
 	adrp	x1, .LANCHOR186
 	ldr	x1, [x1, #:lo12:.LANCHOR186]
-.L2737:
+.L2746:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2714
+	beq	.L2723
 	str	w0, [x29, 188]
 	mov	w2, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19013,17 +19008,17 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2715
+	bne	.L2724
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2718:
+.L2727:
 	ldr	w0, [x29, 156]
 	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2719
+	bne	.L2728
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	mov	x1, x24
 	add	x3, x0, x26
@@ -19031,30 +19026,30 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L2739:
+.L2748:
 	bl	ftl_memcpy
-	b	.L2711
-.L2712:
+	b	.L2720
+.L2721:
 	adrp	x1, .LANCHOR187
 	ldr	x1, [x1, #:lo12:.LANCHOR187]
-	b	.L2737
-.L2715:
+	b	.L2746
+.L2724:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2717
+	beq	.L2726
 	adrp	x0, .LANCHOR138
 	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC73
+	adrp	x0, .LC72
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L2717:
+.L2726:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2718
+	beq	.L2727
 	mov	w2, 1754
 	adrp	x1, .LANCHOR247
 	adrp	x0, .LC5
@@ -19066,8 +19061,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2718
-.L2714:
+	b	.L2727
+.L2723:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x26
@@ -19075,8 +19070,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2718
-.L2719:
+	b	.L2727
+.L2728:
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x0, #:lo12:.LANCHOR56]
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
@@ -19086,17 +19081,39 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x24, x1
-	b	.L2739
-.L2706:
+	b	.L2748
+.L2715:
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	add	x3, x0, x26
 	ldr	x0, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR56]
-	b	.L2738
-.L2727:
+	b	.L2747
+.L2736:
 	mov	w0, -1
-	b	.L2694
+	b	.L2703
 	.size	FtlWrite, .-FtlWrite
+	.section	.text.ftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 16
+	b	FtlWrite
+	.size	ftl_vendor_write, .-ftl_vendor_write
+	.section	.text.ftl_sys_write,"ax",@progbits
+	.align	2
+	.global	ftl_sys_write
+	.type	ftl_sys_write, %function
+ftl_sys_write:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 256
+	mov	w0, 16
+	b	FtlWrite
+	.size	ftl_sys_write, .-ftl_sys_write
 	.section	.text.StorageSysDataStore,"ax",@progbits
 	.align	2
 	.global	StorageSysDataStore
@@ -19132,12 +19149,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L2743
+	bne	.L2754
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L2743:
+.L2754:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -19153,8 +19170,8 @@ ftl_write:
 	.type	FtlCheckVpc, %function
 FtlCheckVpc:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR73
@@ -19173,42 +19190,42 @@ FtlCheckVpc:
 	mov	w1, 0
 	mov	x0, x19
 	bl	memset
-.L2746:
+.L2757:
 	ldr	w0, [x23]
 	cmp	w21, w0
-	bcc	.L2748
+	bcc	.L2759
 	adrp	x24, .LANCHOR40
 	adrp	x23, .LANCHOR84
 	mov	w2, 2
-	adrp	x0, .LC74
+	adrp	x0, .LC73
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
-	add	x0, x0, :lo12:.LC74
+	add	x0, x0, :lo12:.LC73
 	ldr	x1, [x23, #:lo12:.LANCHOR84]
 	add	x21, x20, :lo12:check_valid_page_count_table
-	adrp	x26, .LC76
-	add	x26, x26, :lo12:.LC76
+	adrp	x26, .LC75
+	add	x26, x26, :lo12:.LC75
 	mov	w25, 0
 	mov	w19, 0
 	bl	rknand_print_hex
 	ldrh	w3, [x24, #:lo12:.LANCHOR40]
 	mov	w2, 2
 	mov	x1, x21
-	adrp	x0, .LC75
+	adrp	x0, .LC74
 	add	x24, x24, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC75
+	add	x0, x0, :lo12:.LC74
 	bl	rknand_print_hex
 	mov	w4, 65535
-.L2749:
+.L2760:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bhi	.L2751
+	bhi	.L2762
 	adrp	x0, .LANCHOR88
 	ldr	x19, [x0, #:lo12:.LANCHOR88]
-	cbz	x19, .L2752
+	cbz	x19, .L2763
 	adrp	x0, .LANCHOR89
-	adrp	x26, .LC77
+	adrp	x26, .LC76
 	add	x20, x20, :lo12:check_valid_page_count_table
-	add	x26, x26, :lo12:.LC77
+	add	x26, x26, :lo12:.LC76
 	ldrh	w27, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR82
 	mov	x24, x0
@@ -19222,12 +19239,12 @@ FtlCheckVpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.L2753:
+.L2764:
 	cmp	w21, w27
-	bne	.L2755
-.L2752:
-	cbz	w25, .L2745
-	mov	w2, 1680
+	bne	.L2766
+.L2763:
+	cbz	w25, .L2756
+	mov	w2, 1669
 	add	x1, x22, :lo12:.LANCHOR248
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
@@ -19237,7 +19254,7 @@ FtlCheckVpc:
 	add	x1, x1, :lo12:.LC6
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2745:
+.L2756:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19245,31 +19262,31 @@ FtlCheckVpc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2748:
+.L2759:
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 124]
 	cmn	w0, #1
-	beq	.L2747
+	beq	.L2758
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.L2747:
+.L2758:
 	add	w21, w21, 1
-	b	.L2746
-.L2751:
+	b	.L2757
+.L2762:
 	ldr	x0, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x21, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L2750
+	beq	.L2761
 	str	w4, [x29, 108]
 	mov	w1, w19
 	mov	x0, x26
@@ -19278,19 +19295,19 @@ FtlCheckVpc:
 	ldr	w4, [x29, 108]
 	ldrh	w0, [x0, x28]
 	cmp	w0, w4
-	beq	.L2750
+	beq	.L2761
 	ldrh	w1, [x21, x27, lsl 1]
 	cmp	w1, w0
 	csinc	w25, w25, wzr, ls
-.L2750:
+.L2761:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2749
-.L2755:
+	b	.L2760
+.L2766:
 	ldr	x1, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L2754
+	cbz	w2, .L2765
 	ldrh	w3, [x20, w19, sxtw 1]
 	mov	w1, w19
 	str	w4, [x29, 108]
@@ -19298,15 +19315,15 @@ FtlCheckVpc:
 	mov	w25, 1
 	bl	printf
 	ldr	w4, [x29, 108]
-.L2754:
+.L2765:
 	umull	x19, w19, w28
 	ldr	x0, [x24, #:lo12:.LANCHOR82]
 	ldrh	w19, [x0, x19]
 	cmp	w19, w4
-	beq	.L2752
+	beq	.L2763
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2753
+	b	.L2764
 	.size	FtlCheckVpc, .-FtlCheckVpc
 	.section	.text.FtlDumpSysBlock,"ax",@progbits
 	.align	2
@@ -19327,22 +19344,22 @@ FtlDumpSysBlock:
 	stp	x23, x24, [sp, 64]
 	lsl	w26, w25, 10
 	stp	x19, x20, [sp, 32]
-	adrp	x23, .LC78
+	adrp	x23, .LC77
 	str	x27, [sp, 96]
-	adrp	x24, .LC79
+	adrp	x24, .LC78
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR188
 	add	x22, x22, :lo12:.LANCHOR54
-	add	x23, x23, :lo12:.LC78
+	add	x23, x23, :lo12:.LC77
 	ldr	x2, [x2, #:lo12:.LANCHOR188]
-	add	x24, x24, :lo12:.LC79
+	add	x24, x24, :lo12:.LC78
 	mov	x27, x0
 	mov	w19, 0
 	str	x2, [x1, 16]
-.L2771:
+.L2782:
 	ldrh	w0, [x22]
 	cmp	w19, w0
-	blt	.L2773
+	blt	.L2784
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19351,7 +19368,7 @@ FtlDumpSysBlock:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L2773:
+.L2784:
 	add	x20, x21, :lo12:.LANCHOR202
 	orr	w0, w19, w26
 	mov	w2, 1
@@ -19372,16 +19389,16 @@ FtlDumpSysBlock:
 	ldr	x0, [x20, 16]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2772
+	beq	.L2783
 	ldr	x1, [x27, #:lo12:.LANCHOR183]
 	mov	w3, 768
 	mov	w2, 4
 	mov	x0, x24
 	bl	rknand_print_hex
-.L2772:
+.L2783:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L2771
+	b	.L2782
 	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
 	.section	.text.dump_map_info,"ax",@progbits
 	.align	2
@@ -19402,33 +19419,33 @@ dump_map_info:
 	add	x22, x22, :lo12:.LANCHOR41
 	stp	x25, x26, [sp, 80]
 	adrp	x24, .LANCHOR38
-.L2779:
+.L2790:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L2785
+	bhi	.L2796
 	adrp	x25, .LANCHOR128
 	adrp	x19, .LANCHOR202
 	add	x25, x25, :lo12:.LANCHOR128
 	add	x19, x19, :lo12:.LANCHOR202
 	mov	w26, 0
-.L2786:
+.L2797:
 	ldrh	w0, [x25]
 	cmp	w26, w0
-	bge	.L2789
+	bge	.L2800
 	adrp	x21, .LANCHOR54
-	adrp	x0, .LC49
+	adrp	x0, .LC48
 	sbfiz	x23, x26, 1, 32
 	mov	w20, 0
 	add	x21, x21, :lo12:.LANCHOR54
-	add	x24, x0, :lo12:.LC49
-	b	.L2790
-.L2781:
+	add	x24, x0, :lo12:.LC48
+	b	.L2801
+.L2792:
 	ldrb	w0, [x23, x5]
 	mov	w1, w20
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L2780
+	cbnz	w0, .L2791
 	umaddl	x1, w19, w7, x6
 	lsl	w4, w4, 10
 	mul	w0, w19, w8
@@ -19438,27 +19455,27 @@ dump_map_info:
 	str	w4, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x11, x0, [x1, 8]
-.L2780:
+.L2791:
 	add	x5, x5, 1
-.L2787:
+.L2798:
 	cmp	w12, w5, uxth
-	bhi	.L2781
-	cbnz	w19, .L2782
-.L2784:
+	bhi	.L2792
+	cbnz	w19, .L2793
+.L2795:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2779
-.L2782:
+	b	.L2790
+.L2793:
 	mov	w1, w19
 	mov	w2, 1
 	mov	x0, x6
 	bl	FlashReadPages
 	mov	w0, 56
-	adrp	x26, .LC80
-	add	x26, x26, :lo12:.LC80
+	adrp	x26, .LC79
+	add	x26, x26, :lo12:.LC79
 	mov	x25, 0
 	umull	x19, w19, w0
-.L2783:
+.L2794:
 	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	add	x0, x0, x25
 	add	x25, x25, 56
@@ -19474,9 +19491,9 @@ dump_map_info:
 	ubfx	x1, x2, 10, 16
 	bl	printf
 	cmp	x25, x19
-	bne	.L2783
-	b	.L2784
-.L2785:
+	bne	.L2794
+	b	.L2795
+.L2796:
 	adrp	x0, .LANCHOR105
 	adrp	x21, .LANCHOR180
 	ldrh	w12, [x24, #:lo12:.LANCHOR38]
@@ -19489,8 +19506,8 @@ dump_map_info:
 	adrp	x0, .LANCHOR59
 	mov	w7, 56
 	ldrh	w8, [x0, #:lo12:.LANCHOR59]
-	b	.L2787
-.L2788:
+	b	.L2798
+.L2799:
 	adrp	x22, .LANCHOR129
 	mov	w2, 1
 	mov	w1, w2
@@ -19514,38 +19531,38 @@ dump_map_info:
 	mov	x0, x24
 	ldp	w2, w3, [x19]
 	bl	printf
-.L2790:
+.L2801:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	blt	.L2788
+	blt	.L2799
 	add	w0, w26, 1
 	sxth	w26, w0
-	b	.L2786
-.L2789:
+	b	.L2797
+.L2800:
 	adrp	x0, .LANCHOR65
 	mov	w2, 2
 	adrp	x19, .LANCHOR67
 	ldr	w3, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR129
 	ldr	x1, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR131
 	ldrh	w3, [x19, #:lo12:.LANCHOR67]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR195
 	ldrh	w3, [x19, #:lo12:.LANCHOR67]
 	ldp	x21, x22, [sp, 48]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR195]
-	adrp	x0, .LC83
+	adrp	x0, .LC82
 	ldp	x19, x20, [sp, 32]
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC82
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
 	ldp	x29, x30, [sp, 16]
@@ -23875,7 +23892,7 @@ refValueDefault:
 .LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC54:
+.LC53:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
 .LC14:
@@ -23904,27 +23921,27 @@ refValueDefault:
 .LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
-.LC74:
+.LC73:
 	.string	"vpc1"
-.LC75:
+.LC74:
 	.string	"vpc2"
-.LC76:
+.LC75:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC77:
+.LC76:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
-.LC46:
+.LC45:
 	.string	"...%s enter...\n"
-.LC47:
+.LC46:
 	.string	"superBlkID = %x vpc=%x\n"
-.LC48:
+.LC47:
 	.string	"flashmode = %x pagenum = %x %x\n"
-.LC49:
+.LC48:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
-.LC78:
+.LC77:
 	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
-.LC79:
+.LC78:
 	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC3:
@@ -23932,61 +23949,61 @@ refValueDefault:
 .LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC65:
+.LC64:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC53:
+.LC52:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
+.LC66:
+	.string	"FTL version: 5.0.50 20180905"
 .LC67:
-	.string	"FTL version: 5.0.49 20180810"
-.LC68:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC69:
+.LC68:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC44:
+.LC43:
 	.string	"no ect"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC41:
+.LC40:
 	.string	"FtlMapWritePage error = %x\n"
-.LC42:
+.LC41:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC58:
+.LC57:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC62:
+.LC61:
 	.string	"RSB refresh addr %x\n"
-.LC63:
+.LC62:
 	.string	"spuer block %x vpn is 0\n "
-.LC64:
+.LC63:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
-.LC50:
+.LC49:
 	.string	"blk = %x vpc=%x mode = %x\n"
-.LC51:
+.LC50:
 	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
-.LC52:
+.LC51:
 	.string	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC43:
+.LC42:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
 .LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC73:
+.LC72:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
-.LC45:
+.LC44:
 	.string	"slc mode"
 	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
-.LC59:
+.LC58:
 	.string	"Ftlscanalldata = %x\n"
-.LC60:
+.LC59:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC61:
+.LC60:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
 .LC21:
@@ -24003,263 +24020,261 @@ refValueDefault:
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
 .LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10009,"a",@progbits
-	.align	3
-	.set	.LANCHOR248,. + 0
-	.type	__func__.10009, %object
-	.size	__func__.10009, 12
-__func__.10009:
-	.string	"FtlCheckVpc"
-	.section	.rodata.__func__.10041,"a",@progbits
-	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.10041, %object
-	.size	__func__.10041, 17
-__func__.10041:
-	.string	"FtlDumpBlockInfo"
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10011,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 16
-__func__.10060:
+	.type	__func__.10011, %object
+	.size	__func__.10011, 16
+__func__.10011:
 	.string	"FtlScanAllBlock"
-	.section	.rodata.__func__.10165,"a",@progbits
+	.section	.rodata.__func__.10116,"a",@progbits
 	.align	3
 	.set	.LANCHOR233,. + 0
-	.type	__func__.10165, %object
-	.size	__func__.10165, 16
-__func__.10165:
+	.type	__func__.10116, %object
+	.size	__func__.10116, 16
+__func__.10116:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10198,"a",@progbits
+	.section	.rodata.__func__.10149,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.10198, %object
-	.size	__func__.10198, 22
-__func__.10198:
+	.type	__func__.10149, %object
+	.size	__func__.10149, 22
+__func__.10149:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10252,"a",@progbits
+	.section	.rodata.__func__.10203,"a",@progbits
 	.align	3
 	.set	.LANCHOR102,. + 0
-	.type	__func__.10252, %object
-	.size	__func__.10252, 16
-__func__.10252:
+	.type	__func__.10203, %object
+	.size	__func__.10203, 16
+__func__.10203:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10272,"a",@progbits
+	.section	.rodata.__func__.10223,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.10272, %object
-	.size	__func__.10272, 18
-__func__.10272:
+	.type	__func__.10223, %object
+	.size	__func__.10223, 18
+__func__.10223:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10349,"a",@progbits
+	.section	.rodata.__func__.10300,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.10349, %object
-	.size	__func__.10349, 25
-__func__.10349:
+	.type	__func__.10300, %object
+	.size	__func__.10300, 25
+__func__.10300:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10363,"a",@progbits
+	.section	.rodata.__func__.10314,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10363, %object
-	.size	__func__.10363, 29
-__func__.10363:
+	.type	__func__.10314, %object
+	.size	__func__.10314, 29
+__func__.10314:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10369,"a",@progbits
+	.section	.rodata.__func__.10320,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10369, %object
-	.size	__func__.10369, 19
-__func__.10369:
+	.type	__func__.10320, %object
+	.size	__func__.10320, 19
+__func__.10320:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10380,"a",@progbits
+	.section	.rodata.__func__.10331,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.10380, %object
-	.size	__func__.10380, 16
-__func__.10380:
+	.type	__func__.10331, %object
+	.size	__func__.10331, 16
+__func__.10331:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10385,"a",@progbits
+	.section	.rodata.__func__.10336,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10385, %object
-	.size	__func__.10385, 20
-__func__.10385:
+	.type	__func__.10336, %object
+	.size	__func__.10336, 20
+__func__.10336:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10453,"a",@progbits
+	.section	.rodata.__func__.10404,"a",@progbits
 	.align	3
 	.set	.LANCHOR239,. + 0
-	.type	__func__.10453, %object
-	.size	__func__.10453, 19
-__func__.10453:
+	.type	__func__.10404, %object
+	.size	__func__.10404, 19
+__func__.10404:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10547,"a",@progbits
+	.section	.rodata.__func__.10498,"a",@progbits
 	.align	3
 	.set	.LANCHOR243,. + 0
-	.type	__func__.10547, %object
-	.size	__func__.10547, 23
-__func__.10547:
+	.type	__func__.10498, %object
+	.size	__func__.10498, 23
+__func__.10498:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9390,"a",@progbits
+	.section	.rodata.__func__.9325,"a",@progbits
 	.align	3
 	.set	.LANCHOR245,. + 0
-	.type	__func__.9390, %object
-	.size	__func__.9390, 8
-__func__.9390:
+	.type	__func__.9325, %object
+	.size	__func__.9325, 8
+__func__.9325:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9450,"a",@progbits
+	.section	.rodata.__func__.9385,"a",@progbits
 	.align	3
 	.set	.LANCHOR229,. + 0
-	.type	__func__.9450, %object
-	.size	__func__.9450, 13
-__func__.9450:
+	.type	__func__.9385, %object
+	.size	__func__.9385, 13
+__func__.9385:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9476,"a",@progbits
+	.section	.rodata.__func__.9411,"a",@progbits
 	.align	3
 	.set	.LANCHOR247,. + 0
-	.type	__func__.9476, %object
-	.size	__func__.9476, 9
-__func__.9476:
+	.type	__func__.9411, %object
+	.size	__func__.9411, 9
+__func__.9411:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.9539,"a",@progbits
+	.section	.rodata.__func__.9494,"a",@progbits
 	.align	3
 	.set	.LANCHOR124,. + 0
-	.type	__func__.9539, %object
-	.size	__func__.9539, 14
-__func__.9539:
+	.type	__func__.9494, %object
+	.size	__func__.9494, 14
+__func__.9494:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9585,"a",@progbits
+	.section	.rodata.__func__.9540,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9585, %object
-	.size	__func__.9585, 11
-__func__.9585:
+	.type	__func__.9540, %object
+	.size	__func__.9540, 11
+__func__.9540:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9678,"a",@progbits
+	.section	.rodata.__func__.9633,"a",@progbits
 	.align	3
 	.set	.LANCHOR90,. + 0
-	.type	__func__.9678, %object
-	.size	__func__.9678, 17
-__func__.9678:
+	.type	__func__.9633, %object
+	.size	__func__.9633, 17
+__func__.9633:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9682,"a",@progbits
+	.section	.rodata.__func__.9637,"a",@progbits
 	.align	3
 	.set	.LANCHOR87,. + 0
-	.type	__func__.9682, %object
-	.size	__func__.9682, 17
-__func__.9682:
+	.type	__func__.9637, %object
+	.size	__func__.9637, 17
+__func__.9637:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9719,"a",@progbits
+	.section	.rodata.__func__.9674,"a",@progbits
 	.align	3
 	.set	.LANCHOR91,. + 0
-	.type	__func__.9719, %object
-	.size	__func__.9719, 17
-__func__.9719:
+	.type	__func__.9674, %object
+	.size	__func__.9674, 17
+__func__.9674:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9749,"a",@progbits
+	.section	.rodata.__func__.9704,"a",@progbits
 	.align	3
 	.set	.LANCHOR95,. + 0
-	.type	__func__.9749, %object
-	.size	__func__.9749, 22
-__func__.9749:
+	.type	__func__.9704, %object
+	.size	__func__.9704, 22
+__func__.9704:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9756,"a",@progbits
+	.section	.rodata.__func__.9711,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.9756, %object
-	.size	__func__.9756, 20
-__func__.9756:
+	.type	__func__.9711, %object
+	.size	__func__.9711, 20
+__func__.9711:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9742,"a",@progbits
 	.align	3
 	.set	.LANCHOR96,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 26
-__func__.9787:
+	.type	__func__.9742, %object
+	.size	__func__.9742, 26
+__func__.9742:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9801,"a",@progbits
+	.section	.rodata.__func__.9752,"a",@progbits
 	.align	3
 	.set	.LANCHOR212,. + 0
-	.type	__func__.9801, %object
-	.size	__func__.9801, 15
-__func__.9801:
+	.type	__func__.9752, %object
+	.size	__func__.9752, 15
+__func__.9752:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9814,"a",@progbits
+	.section	.rodata.__func__.9765,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9814, %object
-	.size	__func__.9814, 31
-__func__.9814:
+	.type	__func__.9765, %object
+	.size	__func__.9765, 31
+__func__.9765:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9827,"a",@progbits
+	.section	.rodata.__func__.9778,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.9827, %object
-	.size	__func__.9827, 16
-__func__.9827:
+	.type	__func__.9778, %object
+	.size	__func__.9778, 16
+__func__.9778:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9847,"a",@progbits
+	.section	.rodata.__func__.9798,"a",@progbits
 	.align	3
 	.set	.LANCHOR99,. + 0
-	.type	__func__.9847, %object
-	.size	__func__.9847, 22
-__func__.9847:
+	.type	__func__.9798, %object
+	.size	__func__.9798, 22
+__func__.9798:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9863,"a",@progbits
+	.section	.rodata.__func__.9814,"a",@progbits
 	.align	3
 	.set	.LANCHOR227,. + 0
-	.type	__func__.9863, %object
-	.size	__func__.9863, 9
-__func__.9863:
+	.type	__func__.9814, %object
+	.size	__func__.9814, 9
+__func__.9814:
 	.string	"log2phys"
-	.section	.rodata.__func__.9925,"a",@progbits
+	.section	.rodata.__func__.9876,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9925, %object
-	.size	__func__.9925, 15
-__func__.9925:
+	.type	__func__.9876, %object
+	.size	__func__.9876, 15
+__func__.9876:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9944,"a",@progbits
+	.section	.rodata.__func__.9895,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.9944, %object
-	.size	__func__.9944, 14
-__func__.9944:
+	.type	__func__.9895, %object
+	.size	__func__.9895, 14
+__func__.9895:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9998,"a",@progbits
+	.section	.rodata.__func__.9949,"a",@progbits
 	.align	3
 	.set	.LANCHOR221,. + 0
-	.type	__func__.9998, %object
-	.size	__func__.9998, 15
-__func__.9998:
+	.type	__func__.9949, %object
+	.size	__func__.9949, 15
+__func__.9949:
 	.string	"FtlLoadSysInfo"
+	.section	.rodata.__func__.9960,"a",@progbits
+	.align	3
+	.set	.LANCHOR248,. + 0
+	.type	__func__.9960, %object
+	.size	__func__.9960, 12
+__func__.9960:
+	.string	"FtlCheckVpc"
+	.section	.rodata.__func__.9992,"a",@progbits
+	.align	3
+	.set	.LANCHOR224,. + 0
+	.type	__func__.9992, %object
+	.size	__func__.9992, 17
+__func__.9992:
+	.string	"FtlDumpBlockInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC36:
 	.string	"decrement_vpc_count %x = %d\n"
 .LC37:
 	.string	"decrement_vpc_count %x = %d in free list\n"
 	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
-.LC80:
+.LC79:
 	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
-.LC81:
+.LC80:
 	.string	"Mblk:"
-.LC82:
+.LC81:
 	.string	"L2P:"
-.LC83:
+.LC82:
 	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC71:
+.LC70:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC72:
+.LC71:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
 .LC8:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
 .LC39:
-	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
-.LC40:
 	.string	"page map lost: %x %x\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
 .LC15:
@@ -24269,17 +24284,17 @@ __func__.9998:
 .LC17:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC55:
-	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-.LC56:
+.LC54:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC57:
+.LC55:
 	.string	"map_ppn:"
+.LC56:
+	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC66:
+.LC65:
 	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC70:
+.LC69:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC18:

commit 1e4c51caed644d3feb892772b21787ccb97f8488
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Oct 9 17:42:39 2018 +0800

    drm/rockchip: update drm uboot driver version to v1.0.1
    
    Change-Id: I186b6ee6887047baff111538b5b2fe78b9285fc8
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 452d16cdb5..d8799ae909 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -34,12 +34,13 @@
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
 
-#define DRIVER_VERSION	"v1.0.0"
+#define DRIVER_VERSION	"v1.0.1"
 
 /***********************************************************************
  *  Rockchip UBOOT DRM driver version
  *
  *  v1.0.0	: add basic version for rockchip drm driver(hjc)
+ *  v1.0.1	: add much dsi update(hjc)
  *
  **********************************************************************/
 

commit 1ae6d6e5c841cc3093e92b65c74791b2e3380c4f
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Oct 10 09:03:18 2018 +0800

    clk: rockchip: rk1808: fix up the dclk_raw/lite set rate error
    
    Change-Id: I0b8c7d0e15501c7ecc3c5acb0e0844e722ad18ab
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 33fb895eb3..cf67ed18fb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -122,9 +122,9 @@ enum {
 	HCLK_VOP_DIV_CON_MASK		= 0x1f << HCLK_VOP_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL5_CON */
-	DCLK_VOPRAW_SEL_VOPRAW		= 1,
-	DCLK_VOPRAW_SEL_VOPRAW_FRAC	= 2,
-	DCLK_VOPRAW_SEL_XIN24M		= 3,
+	DCLK_VOPRAW_SEL_VOPRAW		= 0,
+	DCLK_VOPRAW_SEL_VOPRAW_FRAC	= 1,
+	DCLK_VOPRAW_SEL_XIN24M		= 2,
 	DCLK_VOPRAW_SEL_SHIFT		= 14,
 	DCLK_VOPRAW_SEL_MASK		= 3 << DCLK_VOPRAW_SEL_SHIFT,
 	DCLK_VOPRAW_PLL_SEL_CPLL	= 0,
@@ -133,12 +133,12 @@ enum {
 	DCLK_VOPRAW_PLL_SEL_SHIFT	= 10,
 	DCLK_VOPRAW_PLL_SEL_MASK	= 3 << DCLK_VOPRAW_PLL_SEL_SHIFT,
 	DCLK_VOPRAW_DIV_CON_SHIFT	= 0,
-	DCLK_VOPRAW_DIV_CON_MASK	= 0xf << DCLK_VOPRAW_DIV_CON_SHIFT,
+	DCLK_VOPRAW_DIV_CON_MASK	= 0xff << DCLK_VOPRAW_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL7_CON */
-	DCLK_VOPLITE_SEL_VOPRAW		= 1,
-	DCLK_VOPLITE_SEL_VOPRAW_FRAC	= 2,
-	DCLK_VOPLITE_SEL_XIN24M		= 3,
+	DCLK_VOPLITE_SEL_VOPRAW		= 0,
+	DCLK_VOPLITE_SEL_VOPRAW_FRAC	= 1,
+	DCLK_VOPLITE_SEL_XIN24M		= 2,
 	DCLK_VOPLITE_SEL_SHIFT		= 14,
 	DCLK_VOPLITE_SEL_MASK		= 3 << DCLK_VOPLITE_SEL_SHIFT,
 	DCLK_VOPLITE_PLL_SEL_CPLL	= 0,
@@ -147,7 +147,7 @@ enum {
 	DCLK_VOPLITE_PLL_SEL_SHIFT	= 10,
 	DCLK_VOPLITE_PLL_SEL_MASK	= 3 << DCLK_VOPLITE_PLL_SEL_SHIFT,
 	DCLK_VOPLITE_DIV_CON_SHIFT	= 0,
-	DCLK_VOPLITE_DIV_CON_MASK	= 0xf << DCLK_VOPLITE_DIV_CON_SHIFT,
+	DCLK_VOPLITE_DIV_CON_MASK	= 0xff << DCLK_VOPLITE_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL19_CON */
 	CLK_PERI_PLL_SEL_GPLL		= 0,
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 4763dcae04..67f05c37c4 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -84,7 +84,7 @@ static struct rockchip_pll_clock rk1808_pll_clks[] = {
 		    RK1808_MODE_CON, 4, 10, 0, rk1808_pll_rates),
 	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK1808_PLL_CON(24),
 		     RK1808_MODE_CON, 6, 10, 0, rk1808_pll_rates),
-	[NPLL] = PLL(pll_rk3036, PLL_NPLL, RK1808_PLL_CON(24),
+	[NPLL] = PLL(pll_rk3036, PLL_NPLL, RK1808_PLL_CON(32),
 		     RK1808_MODE_CON, 8, 10, 0, rk1808_pll_rates),
 	[PPLL] = PLL(pll_rk3036, PLL_PPLL, RK1808_PMU_PLL_CON(0),
 		     RK1808_PMU_MODE_CON, 0, 10, 0, rk1808_pll_rates),
@@ -517,8 +517,6 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 		 * vopb dclk source from npll, and equals to
 		 */
 		src_clk_div = DIV_ROUND_UP(RK1808_VOP_PLL_LIMIT_FREQ, hz);
-		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
-				      priv->cru, NPLL, src_clk_div * hz);
 		rk_clrsetreg(&cru->clksel_con[5],
 			     DCLK_VOPRAW_SEL_MASK |
 			     DCLK_VOPRAW_PLL_SEL_MASK |
@@ -528,6 +526,9 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 			     DCLK_VOPRAW_PLL_SEL_NPLL <<
 			     DCLK_VOPRAW_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT);
+		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+				      priv->cru, NPLL, src_clk_div * hz);
+
 		break;
 	case DCLK_VOPLITE:
 		/*
@@ -546,9 +547,10 @@ static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
 		rk_clrsetreg(&cru->clksel_con[7],
 			     DCLK_VOPLITE_SEL_MASK | DCLK_VOPLITE_PLL_SEL_MASK |
 			     DCLK_VOPLITE_DIV_CON_MASK,
-			     DCLK_VOPLITE_SEL_VOPRAW << DCLK_VOPLITE_SEL_SHIFT |
-			     parent << DCLK_VOPLITE_PLL_SEL_SHIFT |
-			     (src_clk_div - 1) << DCLK_VOPLITE_DIV_CON_SHIFT);
+			     (DCLK_VOPLITE_SEL_VOPRAW <<
+			     DCLK_VOPLITE_SEL_SHIFT) |
+			     (parent << DCLK_VOPLITE_PLL_SEL_SHIFT) |
+			     ((src_clk_div - 1) << DCLK_VOPLITE_DIV_CON_SHIFT));
 		break;
 	default:
 		printf("do not support this vop freq\n");
@@ -1076,6 +1078,8 @@ static int rk1808_clk_probe(struct udevice *dev)
 					      priv->cru, CPLL);
 	priv->gpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[GPLL],
 					      priv->cru, GPLL);
+	priv->npll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+					      priv->cru, NPLL);
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);

commit 25098c06f428f9a711f1525b520552d5d7373944
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Sat Sep 29 17:58:50 2018 +0800

    drivers: rkflash: add new spi nand flash support
    
    1.FS35ND01G-S1,FS35ND02G-S2
    
    Change-Id: I4cd7f4b55902c48b25d26f42d6952aca3d468ba6
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 72eeebe705..f9c3d91054 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -36,23 +36,27 @@ static struct nand_info spi_nand_tbl[] = {
 	/* IS37SML01G1 */
 	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UAACAE */
-	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UDACAE */
-	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, 4, 20, NULL},
 	/* HYF2GQ4UHCCAE */
-	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF1GQ4UDACAE */
-	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, NULL},
 	/* F50L1G41LB */
-	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0xFF, 20, 36, NULL},
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xFF, 0xFF, 20, 36, NULL},
 	/* XT26G02A */
-	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
+	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
 	/* XT26G01A */
-	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
+	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
+	/* FS35ND01G-S1 */
+	{0xCDB1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0x0, 16, 20, &sfc_nand_ecc_status_sp5},
+	/* FS35ND02G-S2 */
+	{0xCDA2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x03, 0x02, 0xD8, 0x00, 19, 4, 0xFF, 0xFF, 16, 20, &sfc_nand_ecc_status_sp5},
 };
 
 static u8 id_byte[8];
@@ -271,6 +275,84 @@ u32 sfc_nand_ecc_status_sp3(void)
 	return ret;
 }
 
+/*
+ * ecc spectial type4:
+ * [0x0000], No bit errors were detected;
+ * [0x0001, 0x0111], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x1000], Multiple bit errors were detected and
+ *	not corrected.
+ * [0x1100], Bit error count equals the bit flip
+ *	detectionthreshold
+ * else, reserved
+ */
+u32 sfc_nand_ecc_status_sp4(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 2) & 0x0f;
+	if (ecc < 7)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 7 || ecc == 12)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type5:
+ * [0x0], No bit errors were detected;
+ * [0x001, 0x011], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x100], Bit error count equals the bit flip
+ *	detectionthreshold
+ * [0x101, 0x110], Reserved;
+ * [0x111], Multiple bit errors were detected and
+ *	not corrected.
+ */
+u32 sfc_nand_ecc_status_sp5(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x07;
+	if (ecc < 4)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 4)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
@@ -306,8 +388,8 @@ static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 
 	sfc_nand_write_en();
 	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
-	    p_nand_info->QE_address == 0xFF &&
-	    sfc_get_version() != SFC_VER_3)
+	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
+	    sfc_get_version() < SFC_VER_3)
 		sfc_nand_rw_preset();
 
 	sfcmd.d32 = 0;
@@ -357,8 +439,8 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 		ecc_result = sfc_nand_ecc_status();
 
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
-	    p_nand_info->QE_address == 0xFF &&
-	    sfc_get_version() != SFC_VER_3)
+	    p_nand_info->feature & FEA_SOFT_QOP_BIT &&
+	    sfc_get_version() < SFC_VER_3)
 		sfc_nand_rw_preset();
 
 	sfcmd.d32 = 0;
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
index 7b0b8318b1..82641acc2f 100644
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -24,6 +24,7 @@
 #define FEA_4BIT_PROG           BIT(3)
 #define FEA_4BYTE_ADDR          BIT(4)
 #define FEA_4BYTE_ADDR_MODE	BIT(5)
+#define FEA_SOFT_QOP_BIT	BIT(6)
 
 #define MID_WINBOND             0xEF
 #define MID_GIGADEV             0xC8
@@ -125,5 +126,7 @@ void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
 u32 sfc_nand_ecc_status_sp1(void);
 u32 sfc_nand_ecc_status_sp3(void);
+u32 sfc_nand_ecc_status_sp4(void);
+u32 sfc_nand_ecc_status_sp5(void);
 
 #endif

commit 27ffef75bfdb3c941c4371e81cd9d52bc11b7901
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Sat Sep 29 17:29:33 2018 +0800

    drivers: rkflash: fix firmware-lost-error in power lost case
    
    1.Fix recovery vpn mistaken subtraction
    2.Improve cache flush strategy
    3.Avoid currunt map_block being gc
    4.Make ftl buffer align
    5.Rm unuse file ftl_flash_plat.c
    6.Update ftl version to 5.0.48
    7.support NANDC ver 9
    
    Change-Id: Iccfa6b8301ea9d19f913a0b1447b2334ea748f8d
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index 36452367ce..f8efb695bd 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -18,6 +18,7 @@
 #define	    NANDC_MASTER_EN
 
 void __iomem *nandc_base;
+static u8 g_nandc_ver;
 
 static u32 g_nandc_ecc_bits;
 #ifdef NANDC_MASTER_EN
@@ -32,9 +33,21 @@ void nandc_init(void __iomem *nandc_addr)
 	nandc_base = nandc_addr;
 
 	ctl_reg.d32 = 0;
-	ctl_reg.V6.wp = 1;
-	nandc_writel(ctl_reg.d32, NANDC_FMCTL);
-	nandc_writel(0, NANDC_RANDMZ_CFG);
+	g_nandc_ver = 6;
+	if (nandc_readl(NANDC_V9_NANDC_VER) == RK3326_NANDC_VER)
+		g_nandc_ver = 9;
+	if (g_nandc_ver == 9) {
+		ctl_reg.V9.wp = 1;
+		ctl_reg.V9.sif_read_delay = 2;
+		nandc_writel(ctl_reg.d32, NANDC_V9_FMCTL);
+		nandc_writel(0, NANDC_V9_RANDMZ_CFG);
+		nandc_writel(0x1041, NANDC_V9_FMWAIT);
+	} else {
+		ctl_reg.V6.wp = 1;
+		nandc_writel(ctl_reg.d32, NANDC_FMCTL);
+		nandc_writel(0, NANDC_RANDMZ_CFG);
+		nandc_writel(0x1061, NANDC_FMWAIT);
+	}
 	nandc_time_cfg(40);
 
 #ifdef NANDC_MASTER_EN
@@ -98,148 +111,255 @@ void nandc_randmz_sel(u8 chip_sel, u32 randmz_seed)
 
 void nandc_time_cfg(u32 ns)
 {
-	if (ns < 36)
-		nandc_writel(0x1061, NANDC_FMWAIT);
-	else if (ns >= 100)
-		nandc_writel(0x2082, NANDC_FMWAIT);
-	else
-		nandc_writel(0x1081, NANDC_FMWAIT);
+	if (g_nandc_ver == 9) {
+		if (ns < 36)
+			nandc_writel(0x1041, NANDC_V9_FMWAIT);
+		else if (ns >= 100)
+			nandc_writel(0x2082, NANDC_V9_FMWAIT);
+		else
+			nandc_writel(0x1061, NANDC_V9_FMWAIT);
+	} else {
+		if (ns < 36)
+			nandc_writel(0x1061, NANDC_FMWAIT);
+		else if (ns >= 100)
+			nandc_writel(0x2082, NANDC_FMWAIT);
+		else
+			nandc_writel(0x1081, NANDC_FMWAIT);
+	}
 }
 
 void nandc_bch_sel(u8 bits)
 {
 	union BCH_CTL_T tmp;
 	union FL_CTL_T fl_reg;
+	u8 bch_config;
 
 	fl_reg.d32 = 0;
 	fl_reg.V6.rst = 1;
-	nandc_writel(fl_reg.d32, NANDC_FLCTL);
 	g_nandc_ecc_bits = bits;
-	tmp.d32 = 0;
-	tmp.V6.addr = 0x10;
-	tmp.V6.bch_mode1 = 0;
-	if (bits == 16) {
-		tmp.V6.bch_mode = 0;
-	} else if (bits == 24) {
-		tmp.V6.bch_mode = 1;
+	if (g_nandc_ver == 9) {
+		nandc_writel(fl_reg.d32, NANDC_V9_FLCTL);
+		if (bits == 70)
+			bch_config = 0;
+		else if (bits == 60)
+			bch_config = 3;
+		else if (bits == 40)
+			bch_config = 2;
+		else
+			bch_config = 1;
+		tmp.d32 = 0;
+		tmp.V9.bchmode = bch_config;
+		tmp.V9.bchrst = 1;
+		nandc_writel(tmp.d32, NANDC_V9_BCHCTL);
 	} else {
-		tmp.V6.bch_mode1 = 1;
-		tmp.V6.bch_mode = 1;
-		if (bits == 40)
+		nandc_writel(fl_reg.d32, NANDC_FLCTL);
+		tmp.d32 = 0;
+		tmp.V6.addr = 0x10;
+		tmp.V6.bch_mode1 = 0;
+		if (bits == 16) {
 			tmp.V6.bch_mode = 0;
+		} else if (bits == 24) {
+			tmp.V6.bch_mode = 1;
+		} else {
+			tmp.V6.bch_mode1 = 1;
+			tmp.V6.bch_mode = 1;
+			if (bits == 40)
+				tmp.V6.bch_mode = 0;
+		}
+		tmp.V6.rst = 1;
+		nandc_writel(tmp.d32, NANDC_BCHCTL);
 	}
-	tmp.V6.rst = 1;
-	nandc_writel(tmp.d32, NANDC_BCHCTL);
 }
 
-static void nandc_xfer_start(u8 chip_sel,
-			     u8 dir,
-			     u8 sector_count,
-			     u8 st_buf,
-			     u32 *p_data,
-			     u32 *p_spare)
+/*
+ *Nandc xfer data transmission
+ *1. set bch register except nandc version equals 9
+ *2. set internal transfer control register
+ *3. set bus transfer
+ *	a. target memory data address
+ *	b. ahb setting
+ *4. configure register orderly and start transmission
+ */
+static void nandc_xfer_start(u8 dir, u8 n_sec, u32 *data, u32 *spare)
 {
 	union BCH_CTL_T bch_reg;
 	union FL_CTL_T fl_reg;
-	u8 bus_mode = (p_spare || p_data);
 	u32 i;
 	union MTRANS_CFG_T master_reg;
-	u16 *p_spare_tmp = (u16 *)p_spare;
-	u64 vir_addr;
+	u16 *p_spare_tmp = (u16 *)spare;
+	unsigned long vir_addr;
 
 	fl_reg.d32 = 0;
-	bch_reg.d32 = nandc_readl(NANDC_BCHCTL);
-	bch_reg.V6.addr = 0x10;
-	bch_reg.V6.power_down = 0;
-	bch_reg.V6.region = chip_sel;
-
-	fl_reg.V6.rdn = dir;
-	fl_reg.V6.dma = 1;
-	fl_reg.V6.tr_count = 1;
-	fl_reg.V6.async_tog_mix = 1;
-	fl_reg.V6.cor_en = 1;
-	fl_reg.V6.st_addr = st_buf / 2;
-
-	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
-	master_reg.V6.bus_mode = 0;
-	#ifdef NANDC_MASTER_EN
-	if (bus_mode != 0 && dir != 0) {
-		u32 spare_sz = 64;
-
-		for (i = 0; i < sector_count / 2; i++) {
-			if (p_spare) {
-				master.spare_buf[i * spare_sz / 4] =
-				(p_spare_tmp[0]) | ((u32)p_spare_tmp[1] << 16);
-				p_spare_tmp += 2;
-			} else{
-				master.spare_buf[i * spare_sz / 4] =
-				0xffffffff;
+	if (g_nandc_ver == 9) {
+		fl_reg.V9.flash_rdn = dir;
+		fl_reg.V9.bypass = 1;
+		fl_reg.V9.tr_count = 1;
+		fl_reg.V9.async_tog_mix = 1;
+		fl_reg.V9.cor_able = 1;
+		fl_reg.V9.st_addr = 0;
+		fl_reg.V9.page_num = (n_sec + 1) / 2;
+		/* dma start transfer data do care flash rdy */
+		fl_reg.V9.flash_st_mod = 1;
+
+		if (dir != 0) {
+			for (i = 0; i < n_sec / 2; i++) {
+				if (spare) {
+					master.spare_buf[i] =
+						(p_spare_tmp[0]) |
+						((u32)p_spare_tmp[1] << 16);
+					p_spare_tmp += 2;
+				} else {
+					master.spare_buf[i] = 0xffffffff;
+				}
 			}
+		} else {
+			master.spare_buf[0] = 1;
 		}
-	}
-	fl_reg.V6.page_num = (sector_count + 1) / 2;
-	master.page_vir = (u32 *)((p_data == (u32 *)NULL) ?
-				  master.page_buf :
-				  (u32 *)p_data);
-	master.spare_vir = (u32 *)master.spare_buf;
-
-	master.page_phy = (u32)((unsigned long)master.page_vir);
-	master.spare_phy = (u32)((unsigned long)master.spare_vir);
-	vir_addr = ((unsigned long)master.page_phy);
-	flush_dcache_range(vir_addr & (~0x3FuL),
-			   ((vir_addr + 63) & (~0x3FuL)) +
-				fl_reg.V6.page_num * 1024);
-	vir_addr = ((unsigned long)master.spare_phy);
-	flush_dcache_range(vir_addr & (~0x3FuL),
-			   ((vir_addr + 63) & (~0x3FuL)) +
-				fl_reg.V6.page_num * 128);
-	master.mapped = 1;
-	nandc_writel(master.page_phy, NANDC_MTRANS_SADDR0);
-	nandc_writel(master.spare_phy, NANDC_MTRANS_SADDR1);
-	master_reg.d32 = 0;
-	master_reg.V6.incr_num = 16;
-	master_reg.V6.burst = 7;
-	if ((((unsigned long)p_data) & 0x03) == 0)
+		master.page_vir = (u32 *)((data == (u32 *)NULL) ?
+					  master.page_buf :
+					  (u32 *)data);
+		master.spare_vir = (u32 *)master.spare_buf;
+
+		master.page_phy = (u32)((unsigned long)master.page_vir);
+		master.spare_phy = (u32)((unsigned long)master.spare_vir);
+		vir_addr = ((unsigned long)master.page_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 1024);
+		vir_addr = ((unsigned long)master.spare_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 128);
+		master.mapped = 1;
+		nandc_writel(master.page_phy, NANDC_V9_MTRANS_SADDR0);
+		nandc_writel(master.spare_phy, NANDC_V9_MTRANS_SADDR1);
+
+		master_reg.d32 =  nandc_readl(NANDC_V9_MTRANS_CFG);
+		master_reg.V9.incr_num = 16;
+		master_reg.V9.burst = 7;
+		master_reg.V9.hsize = 2;
+		master_reg.V9.bus_mode = 1;
+		master_reg.V9.ahb_wr = !dir;
+		master_reg.V9.ahb_wr_st = 1;
+		master_reg.V9.redundance_size = 0;
+
+		nandc_writel(master_reg.d32, NANDC_V9_MTRANS_CFG);
+		nandc_writel(fl_reg.d32, NANDC_V9_FLCTL);
+		fl_reg.V9.flash_st = 1;
+		nandc_writel(fl_reg.d32, NANDC_V9_FLCTL);
+	} else {
+		bch_reg.d32 = nandc_readl(NANDC_BCHCTL);
+		bch_reg.V6.addr = 0x10;
+		bch_reg.V6.power_down = 0;
+		bch_reg.V6.region = 0;
+
+		fl_reg.V6.rdn = dir;
+		fl_reg.V6.dma = 1;
+		fl_reg.V6.tr_count = 1;
+		fl_reg.V6.async_tog_mix = 1;
+		fl_reg.V6.cor_en = 1;
+		fl_reg.V6.st_addr = 0;
+
+		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+		master_reg.V6.bus_mode = 0;
+		if (dir != 0) {
+			u32 spare_sz = 64;
+
+			for (i = 0; i < n_sec / 2; i++) {
+				if (spare) {
+					master.spare_buf[i * spare_sz / 4] =
+					(p_spare_tmp[0]) |
+					((u32)p_spare_tmp[1] << 16);
+					p_spare_tmp += 2;
+				} else {
+					master.spare_buf[i * spare_sz / 4] =
+					0xffffffff;
+				}
+			}
+		}
+		fl_reg.V6.page_num = (n_sec + 1) / 2;
+		master.page_vir = (u32 *)((data == (u32 *)NULL) ?
+					  master.page_buf :
+					  (u32 *)data);
+		master.spare_vir = (u32 *)master.spare_buf;
+
+		master.page_phy = (u32)((unsigned long)master.page_vir);
+		master.spare_phy = (u32)((unsigned long)master.spare_vir);
+		vir_addr = ((unsigned long)master.page_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 1024);
+		vir_addr = ((unsigned long)master.spare_phy);
+		flush_dcache_range(vir_addr & (~0x3FuL),
+				   ((vir_addr + 63) & (~0x3FuL)) +
+					fl_reg.V6.page_num * 128);
+		master.mapped = 1;
+		nandc_writel(master.page_phy, NANDC_MTRANS_SADDR0);
+		nandc_writel(master.spare_phy, NANDC_MTRANS_SADDR1);
+		master_reg.d32 = 0;
+		master_reg.V6.incr_num = 16;
+		master_reg.V6.burst = 7;
 		master_reg.V6.hsize = 2;
-	master_reg.V6.bus_mode = 1;
-	master_reg.V6.ahb_wr = !dir;
-	master_reg.V6.ahb_wr_st = 1;
-	#endif
-
-	nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);
-	nandc_writel(bch_reg.d32, NANDC_BCHCTL);
-	nandc_writel(fl_reg.d32, NANDC_FLCTL);
-	fl_reg.V6.start = 1;
-	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+		master_reg.V6.bus_mode = 1;
+		master_reg.V6.ahb_wr = !dir;
+		master_reg.V6.ahb_wr_st = 1;
+
+		nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);
+		nandc_writel(bch_reg.d32, NANDC_BCHCTL);
+		nandc_writel(fl_reg.d32, NANDC_FLCTL);
+		fl_reg.V6.start = 1;
+		nandc_writel(fl_reg.d32, NANDC_FLCTL);
+	}
 }
 
-static void nandc_xfer_comp(u8 chip_sel)
+/*
+ * Wait for the end of data transmission
+ */
+static void nandc_xfer_done(void)
 {
 	union FL_CTL_T fl_reg;
 	union MTRANS_CFG_T master_reg;
 
-	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
-	if (master_reg.V6.bus_mode != 0) {
+	if (g_nandc_ver == 9) {
 		union MTRANS_STAT_T stat_reg;
 
+		master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG);
+		if (master_reg.V9.ahb_wr != 0) {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL);
+				stat_reg.d32 = nandc_readl(NANDC_V9_MTRANS_STAT);
+			} while (stat_reg.V9.mtrans_cnt < fl_reg.V9.page_num ||
+				 fl_reg.V9.tr_rdy == 0);
+		} else {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL);
+			} while (fl_reg.V9.tr_rdy == 0);
+		}
+	} else {
+		master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+		if (master_reg.V6.bus_mode != 0) {
+			union MTRANS_STAT_T stat_reg;
+
 		if (master_reg.V6.ahb_wr != 0) {
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
 				stat_reg.d32 = nandc_readl(NANDC_MTRANS_STAT);
-			} while (stat_reg.V6.mtrans_cnt < fl_reg.V6.page_num);
+			} while (stat_reg.V6.mtrans_cnt < fl_reg.V6.page_num ||
+				 fl_reg.V6.tr_rdy == 0);
 		} else {
 			do {
 				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
 			} while (fl_reg.V6.tr_rdy == 0);
+			}
+		} else {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+			} while ((fl_reg.V6.tr_rdy == 0));
 		}
-	} else {
-		do {
-			fl_reg.d32 = nandc_readl(NANDC_FLCTL);
-		} while ((fl_reg.V6.tr_rdy == 0));
 	}
 }
 
-u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 sector_count,
+u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 n_sec,
 		    u32 *p_data, u32 *p_spare)
 {
 	u32 status = NAND_STS_OK;
@@ -251,39 +371,63 @@ u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 sector_count,
 		p_spare = (u32 *)spare;
 		memset(spare, 0xFF, sizeof(spare));
 	}
-	nandc_xfer_start(chip_sel, dir, sector_count, 0, p_data, p_spare);
-	nandc_xfer_comp(chip_sel);
+	nandc_xfer_start(dir, n_sec, p_data, p_spare);
+	nandc_xfer_done();
 	if (dir == NANDC_READ) {
-		if (p_spare) {
-			u32 spare_sz = 64;
-			u32 temp_data;
-			u8 *p_spare_temp = (u8 *)p_spare;
-
-			for (i = 0; i < sector_count / 2; i++) {
-				temp_data = master.spare_buf[i * spare_sz / 4];
-				*p_spare_temp++ = (u8)temp_data;
-				*p_spare_temp++ = (u8)(temp_data >> 8);
-				*p_spare_temp++ = (u8)(temp_data >> 16);
-				*p_spare_temp++ = (u8)(temp_data >> 24);
+		if (g_nandc_ver == 9) {
+			for (i = 0; i < n_sec / 4; i++) {
+				bch_st_reg.d32 = nandc_readl(NANDC_V9_BCHST(i));
+				if (n_sec > 2) {
+					if (bch_st_reg.V9.fail0 || bch_st_reg.V9.fail1) {
+						status = NAND_STS_ECC_ERR;
+					} else {
+						u32 tmp = max((u32)bch_st_reg.V9.err_bits0,
+							      (u32)bch_st_reg.V9.err_bits1);
+						status = max(tmp, status);
+					}
+				} else {
+					if (bch_st_reg.V9.fail0)
+						status = NAND_STS_ECC_ERR;
+					else
+						status = bch_st_reg.V9.err_bits0;
+				}
 			}
-		}
-		for (i = 0; i < sector_count / 4 ; i++) {
-			bch_st_reg.d32 = nandc_readl(NANDC_BCHST(i));
-			if (bch_st_reg.V6.fail0 || bch_st_reg.V6.fail1) {
-				status = NAND_STS_ECC_ERR;
-			} else {
-				u32 tmp = 0;
-
-				tmp =
-				max(bch_st_reg.V6.err_bits0 |
-				    ((u32)bch_st_reg.V6.err_bits0_5 << 5),
-				    bch_st_reg.V6.err_bits1 |
-				    ((u32)bch_st_reg.V6.err_bits1_5 << 5));
-				status = max(tmp, status);
+			if (p_spare) {
+				for (i = 0; i < n_sec / 2; i++)
+					p_spare[i] = master.spare_buf[i];
+			}
+		} else {
+			for (i = 0; i < n_sec / 4 ; i++) {
+				bch_st_reg.d32 = nandc_readl(NANDC_BCHST(i));
+				if (bch_st_reg.V6.fail0 || bch_st_reg.V6.fail1) {
+					status = NAND_STS_ECC_ERR;
+				} else {
+					u32 tmp = 0;
+
+					tmp =
+					max(bch_st_reg.V6.err_bits0 |
+					    ((u32)bch_st_reg.V6.err_bits0_5 << 5),
+					    bch_st_reg.V6.err_bits1 |
+					    ((u32)bch_st_reg.V6.err_bits1_5 << 5));
+					status = max(tmp, status);
+				}
+			}
+			if (p_spare) {
+				u32 spare_sz = 64;
+				u32 temp_data;
+				u8 *p_spare_temp = (u8 *)p_spare;
+
+				for (i = 0; i < n_sec / 2; i++) {
+					temp_data = master.spare_buf[i * spare_sz / 4];
+					*p_spare_temp++ = (u8)temp_data;
+					*p_spare_temp++ = (u8)(temp_data >> 8);
+					*p_spare_temp++ = (u8)(temp_data >> 16);
+					*p_spare_temp++ = (u8)(temp_data >> 24);
+				}
 			}
+			nandc_writel(0, NANDC_MTRANS_CFG);
 		}
 	}
-	nandc_writel(0, NANDC_MTRANS_CFG);
 	return status;
 }
 
diff --git a/drivers/rkflash/nandc.h b/drivers/rkflash/nandc.h
index 689f50f5cc..7043329691 100644
--- a/drivers/rkflash/nandc.h
+++ b/drivers/rkflash/nandc.h
@@ -14,6 +14,7 @@
 
 #define NANDC_READ	0
 #define NANDC_WRITE	1
+#define RK3326_NANDC_VER	0x56393030
 
 /* INT ID */
 enum NANDC_IRQ_NUM_T {
@@ -24,6 +25,13 @@ enum NANDC_IRQ_NUM_T {
 	NC_IRQ_LLP
 };
 
+enum ENUM_NANDC_BCH_CFG {
+	NC_BCH_70 = 0,
+	NC_BCH_24,
+	NC_BCH_40,
+	NC_BCH_60,
+};
+
 union FM_CTL_T {
 	u32 d32;
 	struct {
@@ -42,6 +50,22 @@ union FM_CTL_T {
 		unsigned read_delay : 3;	/* bits[24:26] */
 		unsigned reserved27_31 : 5;	/* bits[27:31] */
 	} V6;
+	struct	{
+		unsigned cs : 8;
+		unsigned wp : 1;
+		unsigned frdy : 1;
+		unsigned fifo_empth_flash : 1;
+		unsigned reserved11_12 : 2;
+		unsigned tm : 1;
+		unsigned syn_clken : 1;
+		unsigned syn_mode : 1;
+		unsigned flash_abort_en : 1;
+		/*share with flash_abort_stat*/
+		unsigned flash_abort_clear : 1;
+		unsigned sif_read_delay : 3;
+		unsigned io_mux : 3;
+		unsigned reserved24_31 : 8;
+	} V9;
 };
 
 union FM_WAIT_T {
@@ -56,6 +80,17 @@ union FM_WAIT_T {
 		unsigned fmw_dly_en : 1;
 		unsigned reserved31_31 : 1;
 	} V6;
+	struct {
+		unsigned rwcs : 5;
+		unsigned rwpw : 6;
+		unsigned hard_rdy : 1;
+		unsigned csrw : 6;
+		unsigned wait_frdy_dly : 5;
+		unsigned reserved23_23 : 1;
+		unsigned fmw_dly : 6;
+		unsigned fmw_dly_en : 1;
+		unsigned reserved31_31 : 1;
+	} V9;
 };
 
 union FL_CTL_T {
@@ -82,6 +117,29 @@ union FL_CTL_T {
 		unsigned async_tog_mix : 1;
 		unsigned reserved30_31 : 2;
 	} V6;
+	struct {
+		unsigned flash_rst : 1;
+		unsigned flash_rdn : 1;
+		unsigned flash_st : 1;
+		unsigned bypass : 1;
+		unsigned st_addr : 1;
+		unsigned tr_count : 2;
+		unsigned flash_st_mod : 1;
+		unsigned not_tran_data : 1;
+		unsigned tran_seed : 1;
+		unsigned cor_able : 1;
+		unsigned lba_en : 1;
+		unsigned lba_spare_sel : 1;
+		unsigned reserved13_18 : 6;
+		unsigned bchst_trans : 1;
+		unsigned tr_rdy : 1;
+		unsigned page_size : 1;
+		unsigned page_num : 6;
+		unsigned low_power : 1;
+		unsigned async_tog_mix : 1;
+		unsigned bypass_fifo_mode : 1;
+		unsigned reserved31_31 : 1;
+	} V9;
 };
 
 union BCH_CTL_T {
@@ -100,6 +158,17 @@ union BCH_CTL_T {
 		unsigned thres : 8;
 		unsigned reserved27_31 : 5;
 	} V6;
+	struct {
+		unsigned bchrst : 1;
+		unsigned wcnt_clear : 1;
+		unsigned reserved2 : 1;
+		unsigned bchepd : 1;
+		unsigned reserved4_15 : 12;
+		unsigned bchpage : 1;
+		unsigned bchthre : 8;
+		unsigned bchmode : 3;
+		unsigned reserved28_31 : 4;
+	} V9;
 };
 
 union BCH_ST_T {
@@ -123,6 +192,21 @@ union BCH_ST_T {
 		unsigned err_bits_low1_5 : 1;
 		unsigned reserved31_31 : 1;
 	} V6;
+	struct {
+		unsigned errf0 : 1;
+		unsigned done0 : 1;
+		unsigned fail0 : 1;
+		unsigned err_bits0 : 7;
+		unsigned all_f_flag0 : 1;
+		unsigned reserved11_15 : 5;
+		unsigned errf1 : 1;
+		unsigned done1 : 1;
+		unsigned fail1 : 1;
+		unsigned err_bits1 : 7;
+		unsigned all_f_flag1 : 1;
+		unsigned reserved27_30 : 4;
+		unsigned bch_ready_flag: 1;
+	} V9;
 };
 
 union MTRANS_CFG_T {
@@ -138,6 +222,18 @@ union MTRANS_CFG_T {
 		unsigned ahb_rst : 1;
 		unsigned reserved16_31 : 16;
 	} V6;
+	struct {
+		unsigned ahb_wr_st : 1;
+		unsigned ahb_wr : 1;
+		unsigned bus_mode : 1;
+		unsigned hsize : 3;
+		unsigned burst : 3;
+		unsigned incr_num : 5;
+		unsigned fl_pwd : 1;
+		unsigned ahb_rst : 1;
+		unsigned redundance_size : 11;
+		unsigned reserved27_31 : 5;
+	} V9;
 };
 
 union MTRANS_STAT_T {
@@ -147,6 +243,11 @@ union MTRANS_STAT_T {
 		unsigned mtrans_cnt : 5;
 		unsigned reserved21_31 : 11;
 	} V6;
+	struct {
+		unsigned bus_err : 16;
+		unsigned mtrans_cnt : 6;
+		unsigned reserved22_31 : 10;
+	} V9;
 };
 
 /* NANDC Registers */
@@ -182,6 +283,29 @@ union MTRANS_STAT_T {
 #define NANDC_CHIP_ADDR(id)	(0x800 + (id) * 0x100 + 0x4)
 #define NANDC_CHIP_CMD(id)	(0x800 + (id) * 0x100 + 0x8)
 
+#define NANDC_V9_FMCTL		0x0
+#define NANDC_V9_FMWAIT		0x4
+#define NANDC_V9_FLCTL		0x10
+#define NANDC_V9_BCHCTL		0x20
+#define NANDC_V9_MTRANS_CFG	0x30
+#define NANDC_V9_MTRANS_SADDR0	0x34
+#define NANDC_V9_MTRANS_SADDR1	0x38
+#define NANDC_V9_MTRANS_STAT	0x40
+#define NANDC_V9_MTRANS_STAT2	0x44
+#define NANDC_V9_NANDC_VER	0x80
+
+#define NANDC_V9_INTEN		0x120
+#define NANDC_V9_INTCLR		0x124
+#define NANDC_V9_INTST		0x128
+#define NANDC_V9_SPARE0		0x200
+#define NANDC_V9_SPARE1		0x204
+#define NANDC_V9_RANDMZ_CFG	0x208
+#define NANDC_V9_BCHST(i)	(0x150 + (i) * 4)
+
+#define NANDC_V9_CHIP_DATA(id)	(0x800 + (id) * 0x100)
+#define NANDC_V9_CHIP_ADDR(id)	(0x800 + (id) * 0x100 + 0x4)
+#define NANDC_V9_CHIP_CMD(id)	(0x800 + (id) * 0x100 + 0x8)
+
 struct MASTER_INFO_T {
 	u32  *page_buf;		/* [DATA_LEN]; */
 	u32  *spare_buf;	/* [DATA_LEN / (1024/128)]; */
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 749f0077e0..a051330c1d 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-08-02
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-09-29
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -991,7 +991,7 @@ INSERT_DATA_LIST:
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L111
-	movs	r2, #221
+	movs	r2, #214
 	ldr	r1, .L113+8
 	ldr	r0, .L113+12
 	pop	{r3, lr}
@@ -1107,7 +1107,7 @@ INSERT_FREE_LIST:
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L124
-	movs	r2, #214
+	movs	r2, #207
 	ldr	r1, .L126+8
 	ldr	r0, .L126+12
 	pop	{r3, lr}
@@ -1147,7 +1147,7 @@ List_remove_node:
 	ldr	r3, [r0]
 	cmp	r4, r3
 	beq	.L129
-	movw	r2, #379
+	mov	r2, #372
 	ldr	r1, .L134+4
 	ldr	r0, .L134+8
 	bl	printf
@@ -1357,7 +1357,7 @@ List_update_data_list:
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
 	bne	.L159
-	mov	r2, #470
+	movw	r2, #463
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
@@ -1391,7 +1391,7 @@ List_update_data_list:
 	bl	List_remove_node
 	ldrh	r3, [r5]
 	cbnz	r3, .L162
-	movw	r2, #481
+	mov	r2, #474
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
@@ -1468,7 +1468,7 @@ select_l2p_ram_region:
 	bcc	.L176
 	cmp	r4, r2
 	bcc	.L169
-	mov	r2, #784
+	movw	r2, #787
 	ldr	r1, .L177+12
 	ldr	r0, .L177+16
 	bl	printf
@@ -1755,7 +1755,7 @@ make_superblock:
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L216
-	movw	r2, #2097
+	movw	r2, #2110
 	ldr	r1, .L220+4
 	ldr	r0, .L220+8
 	bl	printf
@@ -1775,11 +1775,10 @@ make_superblock:
 	ldr	r2, .L220+16
 	movs	r0, #0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	movs	r3, #1
-	strb	r3, [r4, #9]
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L219:
 	ldrh	r1, [r4]
@@ -1973,314 +1972,333 @@ FtlPrintInfo2buf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #64
+	ldr	r2, .L257
 	mov	r8, r0
-	ldr	r1, .L257
-	bl	sprintf
+	bl	snprintf
 	ldr	r3, .L257+4
 	add	r5, r8, r0
-	ldr	r1, .L257+8
+	ldr	r2, .L257+8
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r4, .L257+12
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r6, .L257+12
+	ldr	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldr	r1, .L257+16
+	ldr	r2, .L257+16
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r10, .L257+352
-	bl	sprintf
+	bl	snprintf
 	ldr	r3, .L257+20
 	add	r5, r5, r0
-	ldr	r1, .L257+24
+	ldr	r2, .L257+24
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r6, .L257+28
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r4, .L257+28
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+32
 	add	r5, r5, r0
-	ldr	r1, .L257+36
+	ldr	r2, .L257+36
+	movs	r1, #64
 	mov	r0, r5
 	ldr	r7, .L257+40
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+44
 	add	r5, r5, r0
-	ldr	r1, .L257+48
+	ldr	r2, .L257+48
+	movs	r1, #64
 	mov	r0, r5
-	ldr	fp, .L257+356
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r10, .L257+328
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+52
 	add	r5, r5, r0
-	ldr	r1, .L257+56
+	ldr	r2, .L257+56
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+60
 	add	r5, r5, r0
-	ldr	r1, .L257+64
+	ldr	r2, .L257+64
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+68
 	add	r5, r5, r0
-	ldr	r1, .L257+72
+	ldr	r2, .L257+72
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+76
 	add	r5, r5, r0
-	ldr	r1, .L257+80
+	ldr	r2, .L257+80
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+84
 	add	r5, r5, r0
-	ldr	r1, .L257+88
+	ldr	r2, .L257+88
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+92
 	add	r5, r5, r0
-	ldr	r1, .L257+96
+	ldr	r2, .L257+96
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	lsrs	r2, r2, #11
-	bl	sprintf
+	ldr	r3, [r3]
+	lsrs	r3, r3, #11
+	bl	snprintf
 	ldr	r3, .L257+100
 	add	r5, r5, r0
-	ldr	r1, .L257+104
+	ldr	r2, .L257+104
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	lsrs	r2, r2, #11
-	bl	sprintf
+	ldr	r3, [r3]
+	lsrs	r3, r3, #11
+	bl	snprintf
 	ldr	r3, .L257+108
 	add	r5, r5, r0
-	ldr	r1, .L257+112
+	ldr	r2, .L257+112
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+116
 	add	r5, r5, r0
-	ldr	r1, .L257+120
+	ldr	r2, .L257+120
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #6]
-	ldr	r1, .L257+124
+	ldrh	r3, [r6, #6]
+	ldr	r2, .L257+124
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r10]
-	ldr	r1, .L257+128
+	ldrh	r3, [r4]
+	ldr	r2, .L257+128
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	ldr	r3, .L257+132
 	add	r5, r5, r0
-	ldr	r1, .L257+136
+	ldr	r2, .L257+136
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+140
 	add	r5, r5, r0
-	ldr	r1, .L257+144
+	ldr	r2, .L257+144
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+148
 	add	r5, r5, r0
-	ldr	r1, .L257+152
+	ldr	r2, .L257+152
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+156
 	add	r5, r5, r0
-	ldr	r1, .L257+160
+	ldr	r2, .L257+160
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+164
 	add	r5, r5, r0
-	ldr	r1, .L257+168
+	ldr	r2, .L257+168
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+172
 	add	r5, r5, r0
-	ldr	r1, .L257+176
+	ldr	r2, .L257+176
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r6, #30]
-	ldr	r1, .L257+180
+	ldrh	r3, [r7, #30]
+	ldr	r2, .L257+180
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r6, #28]
-	ldr	r1, .L257+184
+	ldrh	r3, [r7, #28]
+	ldr	r2, .L257+184
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
-	ldr	r3, .L257+188
+	ldr	r7, .L257+188
+	bl	snprintf
+	ldr	r3, .L257+192
 	add	r5, r5, r0
-	ldr	r1, .L257+192
+	ldr	r2, .L257+196
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r6, .L257+196
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+200
 	add	r5, r5, r0
-	ldr	r1, .L257+204
+	ldr	r2, .L257+204
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+208
 	add	r5, r5, r0
-	ldr	r1, .L257+212
+	ldr	r2, .L257+212
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+216
 	add	r5, r5, r0
-	ldr	r1, .L257+220
+	ldr	r2, .L257+220
+	movs	r1, #64
 	mov	r0, r5
-	ldrh	r2, [r3, #6]
-	bl	sprintf
+	ldrh	r3, [r3, #6]
+	bl	snprintf
 	ldr	r3, .L257+224
 	add	r5, r5, r0
-	ldr	r1, .L257+228
+	ldr	r2, .L257+228
+	movs	r1, #64
 	mov	r0, r5
-	ldrh	r2, [r3]
-	bl	sprintf
+	ldrh	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+232
 	add	r5, r5, r0
-	ldr	r1, .L257+236
+	ldr	r2, .L257+236
+	movs	r1, #64
 	mov	r0, r5
-	ldrh	r2, [r3]
-	bl	sprintf
+	ldrh	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+240
 	add	r5, r5, r0
-	ldr	r1, .L257+244
+	ldr	r2, .L257+244
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r2, [r3]
-	bl	sprintf
+	ldr	r3, [r3]
+	bl	snprintf
 	ldr	r3, .L257+248
 	add	r5, r5, r0
-	ldr	r1, .L257+252
-	mov	r0, r5
-	ldrh	r2, [r3]
-	bl	sprintf
-	ldrh	r2, [r4]
-	add	r5, r5, r0
-	ldr	r4, .L257+256
-	mov	r0, r5
-	ldr	r1, .L257+260
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4, #2]
-	ldr	r1, .L257+264
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+268
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrh	r2, [r4]
-	ldr	r1, .L257+272
-	mov	r0, r5
-	bl	sprintf
-	add	r5, r5, r0
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L257+276
+	ldr	r2, .L257+252
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	ldrh	r3, [r3]
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #4]
-	ldr	r1, .L257+280
+	ldrh	r3, [r6]
+	ldr	r2, .L257+256
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [r6]
+	ldr	r6, .L257+260
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4]
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L257+264
+	movs	r1, #64
 	mov	r0, r5
-	ldr	r4, .L257+284
-	ldr	r1, .L257+288
-	ldrh	r2, [r3, r2, lsl #1]
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #2]
-	ldr	r1, .L257+292
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L257+268
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+296
+	ldrh	r3, [r7]
+	ldr	r2, .L257+272
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4]
-	ldr	r1, .L257+300
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L257+276
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L257+304
+	ldrh	r3, [r7, #4]
+	ldr	r2, .L257+280
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
+	ldrh	r2, [r7]
 	add	r5, r5, r0
-	ldrh	r2, [r4, #4]
-	ldr	r1, .L257+308
-	mov	r0, r5
-	bl	sprintf
 	ldr	r3, [r6]
-	add	r5, r5, r0
-	ldrh	r2, [r4]
+	movs	r1, #64
+	ldr	r7, .L257+284
 	mov	r0, r5
-	ldr	r4, .L257+312
-	ldr	r1, .L257+316
-	ldrh	r2, [r3, r2, lsl #1]
-	bl	sprintf
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L257+288
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #2]
-	ldr	r1, .L257+320
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L257+292
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+324
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L257+296
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4]
-	ldr	r1, .L257+328
+	ldrh	r3, [r7]
+	ldr	r2, .L257+300
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L257+332
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L257+304
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r4, #4]
-	ldr	r1, .L257+336
+	ldrh	r3, [r7, #4]
+	ldr	r2, .L257+308
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
+	ldrh	r2, [r7]
 	add	r5, r5, r0
-	ldrh	r2, [r7, #2]
-	ldr	r1, .L257+340
+	ldr	r3, [r6]
+	movs	r1, #64
+	ldr	r7, .L257+312
 	mov	r0, r5
-	bl	sprintf
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L257+316
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r7, #6]	@ zero_extendqisi2
-	ldr	r1, .L257+344
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L257+320
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r7]
-	ldr	r1, .L257+348
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L257+324
+	movs	r1, #64
 	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
 	b	.L258
 .L259:
 	.align	2
@@ -2292,10 +2310,10 @@ FtlPrintInfo2buf:
 	.word	.LC4
 	.word	.LANCHOR61
 	.word	.LC5
-	.word	.LANCHOR39
+	.word	.LANCHOR48
 	.word	.LANCHOR59
 	.word	.LC6
-	.word	.LANCHOR80
+	.word	.LANCHOR39
 	.word	.LANCHOR62
 	.word	.LC7
 	.word	.LANCHOR63
@@ -2332,9 +2350,9 @@ FtlPrintInfo2buf:
 	.word	.LC24
 	.word	.LC25
 	.word	.LC26
+	.word	.LANCHOR51
 	.word	.LANCHOR34
 	.word	.LC27
-	.word	.LANCHOR42
 	.word	.LANCHOR31
 	.word	.LC28
 	.word	.LANCHOR2
@@ -2349,8 +2367,8 @@ FtlPrintInfo2buf:
 	.word	.LC33
 	.word	.LANCHOR79
 	.word	.LC34
-	.word	.LANCHOR51
 	.word	.LC35
+	.word	.LANCHOR42
 	.word	.LC36
 	.word	.LC37
 	.word	.LC38
@@ -2367,83 +2385,123 @@ FtlPrintInfo2buf:
 	.word	.LC47
 	.word	.LC48
 	.word	.LC49
-	.word	.LC50
-	.word	.LC51
-	.word	.LC52
-	.word	.LC53
-	.word	.LC54
-	.word	.LC55
-	.word	.LANCHOR48
 	.word	.LANCHOR81
 .L258:
-	bl	sprintf
+	ldrh	r3, [r7]
+	ldr	r2, .L260
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L260+4
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	ldrh	r3, [r7, #4]
+	add	r5, r5, r0
+	ldr	r7, .L260+8
+	movs	r1, #64
+	ldr	r2, .L260+12
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrh	r3, [r7, #2]
+	ldr	r2, .L260+16
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
 	add	r5, r5, r0
-	ldrb	r2, [r7, #8]	@ zero_extendqisi2
-	ldr	r1, .L260
+	ldrb	r3, [r7, #6]	@ zero_extendqisi2
+	ldr	r2, .L260+20
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
+	bl	snprintf
 	add	r5, r5, r0
-	ldrh	r2, [r7, #4]
-	ldr	r1, .L260+4
+	ldrh	r3, [r7]
+	ldr	r2, .L260+24
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrb	r3, [r7, #8]	@ zero_extendqisi2
+	ldr	r2, .L260+28
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrh	r3, [r7, #4]
+	ldr	r2, .L260+32
+	movs	r1, #64
 	mov	r0, r5
-	bl	sprintf
-	ldr	r3, [fp, #76]
+	bl	snprintf
+	ldr	r3, [r10, #76]
 	add	r5, r5, r0
-	ldr	r1, .L260+8
+	ldr	r2, .L260+36
+	movs	r1, #64
 	mov	r0, r5
+	str	r3, [sp, #4]
+	ldr	r3, [r10, #84]
 	str	r3, [sp]
-	ldr	r3, [fp, #84]
-	ldr	r2, [fp, #80]
-	bl	sprintf
-	adds	r4, r5, r0
-	ldr	r2, [fp, #72]
-	ldr	r1, .L260+12
-	mov	r0, r4
-	bl	sprintf
-	add	r4, r4, r0
-	ldr	r2, [fp, #96]
-	ldr	r1, .L260+16
-	mov	r0, r4
-	bl	sprintf
-	ldr	r3, .L260+20
-	add	r4, r4, r0
-	ldr	r1, .L260+24
-	mov	r0, r4
-	ldrh	r2, [r3]
-	bl	sprintf
-	ldr	r3, .L260+28
-	add	r4, r4, r0
-	ldr	r1, .L260+32
-	mov	r0, r4
-	ldrh	r2, [r3]
-	bl	sprintf
-	ldr	r3, .L260+36
-	add	r4, r4, r0
-	ldr	r1, .L260+40
-	mov	r0, r4
-	ldr	r2, [r3]
-	bl	sprintf
-	ldr	r3, .L260+44
-	add	r4, r4, r0
-	ldr	r1, .L260+48
-	mov	r0, r4
-	ldrh	r2, [r3]
-	bl	sprintf
-	add	r4, r4, r0
+	ldr	r3, [r10, #80]
+	bl	snprintf
+	add	r5, r5, r0
+	ldr	r3, [r10, #72]
+	ldr	r2, .L260+40
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldr	r3, [r10, #96]
+	ldr	r2, .L260+44
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	ldr	r3, .L260+48
+	add	r5, r5, r0
+	ldr	r2, .L260+52
+	movs	r1, #64
+	mov	r0, r5
+	ldrh	r3, [r3]
+	bl	snprintf
+	ldr	r3, .L260+56
+	add	r5, r5, r0
+	ldr	r2, .L260+60
+	movs	r1, #64
+	mov	r0, r5
+	ldrh	r3, [r3]
+	bl	snprintf
+	ldr	r3, .L260+64
+	add	r5, r5, r0
+	ldr	r2, .L260+68
+	movs	r1, #64
+	mov	r0, r5
+	ldr	r3, [r3]
+	bl	snprintf
+	ldr	r3, .L260+72
+	add	r5, r5, r0
+	ldr	r2, .L260+76
+	movs	r1, #64
+	mov	r0, r5
+	ldrh	r3, [r3]
+	bl	snprintf
+	add	r5, r5, r0
 	bl	GetFreeBlockMinEraseCount
-	ldr	r1, .L260+52
-	mov	r2, r0
-	mov	r0, r4
-	bl	sprintf
-	add	r4, r4, r0
-	ldrh	r0, [r10]
+	ldr	r2, .L260+80
+	mov	r3, r0
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	add	r5, r5, r0
+	ldrh	r0, [r4]
 	bl	GetFreeBlockMaxEraseCount
-	ldr	r1, .L260+56
-	mov	r2, r0
-	mov	r0, r4
-	bl	sprintf
-	ldr	r3, .L260+60
-	add	r4, r4, r0
+	ldr	r2, .L260+84
+	mov	r3, r0
+	movs	r1, #64
+	mov	r0, r5
+	bl	snprintf
+	ldr	r3, .L260+88
+	adds	r4, r5, r0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L246
@@ -2459,52 +2517,54 @@ FtlPrintInfo2buf:
 	beq	.L248
 	ldr	r2, [r6]
 	mov	r0, r4
-	ldr	r1, .L260+64
-	ldrh	r2, [r2, r3, lsl #1]
-	bl	sprintf
+	movs	r1, #64
+	ldrh	r3, [r2, r3, lsl #1]
+	ldr	r2, .L260+92
+	bl	snprintf
 	add	r4, r4, r0
 .L248:
 	movs	r0, #0
-	ldr	r5, .L260+68
-	ldr	fp, .L260+84
+	ldr	r5, .L260+96
+	ldr	fp, .L260+112
 	movs	r7, #0
 	bl	List_get_gc_head_node
-	uxth	r3, r0
+	uxth	r0, r0
 .L250:
-	movw	r2, #65535
-	cmp	r3, r2
+	movw	r3, #65535
+	cmp	r0, r3
 	beq	.L249
-	ldr	r2, [fp]
+	ldr	r3, [fp]
 	mov	r10, #6
-	mul	r10, r10, r3
+	mul	r10, r10, r0
+	ldr	r2, .L260+100
+	movs	r1, #64
+	ldrh	r3, [r3, r0, lsl #1]
+	str	r3, [sp, #12]
+	ldr	r3, [r5]
+	add	r3, r3, r10
+	ldrh	r3, [r3, #4]
+	str	r3, [sp, #8]
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r0, lsl #1]
+	stm	sp, {r0, r3}
+	mov	r3, r7
 	mov	r0, r4
-	ldr	r1, .L260+72
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #8]
-	ldr	r2, [r5]
-	add	r2, r2, r10
-	ldrh	r2, [r2, #4]
-	str	r2, [sp, #4]
-	ldr	r2, [r6]
-	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp]
-	mov	r2, r7
-	bl	sprintf
 	adds	r7, r7, #1
+	bl	snprintf
 	ldr	r3, [r5]
 	cmp	r7, #16
 	add	r4, r4, r0
-	ldrh	r3, [r3, r10]
+	ldrh	r0, [r3, r10]
 	bne	.L250
 .L249:
-	ldr	r3, .L260+76
+	ldr	r3, .L260+104
 	movs	r7, #0
 	ldr	r2, [r5]
-	ldr	r10, .L260+84
+	ldr	r10, .L260+112
 	ldr	r3, [r3]
-	ldr	fp, .L260+88
+	ldr	fp, .L260+116
 	subs	r3, r3, r2
-	ldr	r2, .L260+80
+	ldr	r2, .L260+108
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	uxth	r3, r3
@@ -2516,16 +2576,18 @@ FtlPrintInfo2buf:
 	movs	r6, #6
 	muls	r6, r3, r6
 	mov	r0, r4
-	mov	r1, fp
+	movs	r1, #64
 	ldrh	r2, [r2, r3, lsl #1]
-	str	r2, [sp, #4]
+	str	r2, [sp, #8]
 	ldr	r2, [r5]
 	add	r2, r2, r6
 	ldrh	r2, [r2, #4]
-	str	r2, [sp]
-	mov	r2, r7
+	str	r3, [sp]
+	mov	r3, r7
 	adds	r7, r7, #1
-	bl	sprintf
+	str	r2, [sp, #4]
+	mov	r2, fp
+	bl	snprintf
 	cmp	r7, #4
 	add	r4, r4, r0
 	beq	.L251
@@ -2535,6 +2597,13 @@ FtlPrintInfo2buf:
 .L261:
 	.align	2
 .L260:
+	.word	.LC50
+	.word	.LC51
+	.word	.LANCHOR80
+	.word	.LC52
+	.word	.LC53
+	.word	.LC54
+	.word	.LC55
 	.word	.LC56
 	.word	.LC57
 	.word	.LC58
@@ -2570,11 +2639,15 @@ FtlPrintInfo2buf:
 rknand_proc_ftlread:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #2048
 	push	{r3, r4, r5, lr}
-	mov	r5, r0
-	ldr	r2, .L263
-	ldr	r1, .L263+4
-	bl	sprintf
+	mov	r5, r1
+	blt	.L264
+	ldr	r3, .L265
+	movs	r1, #64
+	ldr	r2, .L265+4
+	mov	r0, r5
+	bl	snprintf
 	adds	r4, r5, r0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
@@ -2582,8 +2655,11 @@ rknand_proc_ftlread:
 	subs	r0, r0, r5
 	pop	{r3, r4, r5, pc}
 .L264:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L266:
 	.align	2
-.L263:
+.L265:
 	.word	.LC70
 	.word	.LC71
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
@@ -2600,85 +2676,85 @@ GetSwlReplaceBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	ldr	r3, .L293
-	ldr	r6, .L293+4
+	ldr	r3, .L295
+	ldr	r6, .L295+4
 	ldr	r5, [r3]
 	mov	r10, r3
 	ldr	r1, [r6]
 	cmp	r1, r5
-	bcs	.L266
-	ldr	r2, .L293+8
+	bcs	.L268
+	ldr	r2, .L295+8
 	movs	r3, #0
-	ldr	r4, .L293+12
+	ldr	r4, .L295+12
 	mov	r0, r3
 	ldrh	r1, [r2]
-	ldr	r2, .L293+16
+	ldr	r2, .L295+16
 	str	r3, [r4]
 	ldr	r7, [r2]
 	mov	r2, r3
-.L267:
+.L269:
 	cmp	r2, r1
-	bcc	.L268
-	cbz	r3, .L269
+	bcc	.L270
+	cbz	r3, .L271
 	str	r0, [r4]
-.L269:
+.L271:
 	ldr	r7, [r4]
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L293+20
+	ldr	r3, .L295+20
 	str	r0, [r6]
 	ldr	r0, [r3]
-	ldr	r3, .L293+24
+	ldr	r3, .L295+24
 	subs	r0, r7, r0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	str	r0, [r4]
-.L270:
+.L272:
 	ldr	r6, [r6]
 	add	r3, r5, #256
 	cmp	r3, r6
-	bls	.L275
-	ldr	r2, .L293+28
+	bls	.L277
+	ldr	r2, .L295+28
 	add	r3, r5, #768
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bls	.L275
-.L277:
+	bls	.L277
+.L279:
 	movw	r4, #65535
-.L276:
+.L278:
 	mov	r0, r4
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L268:
+.L270:
 	ldrh	r3, [r7, r2, lsl #1]
 	adds	r2, r2, #1
 	add	r0, r0, r3
 	movs	r3, #1
-	b	.L267
-.L266:
-	ldr	r2, .L293+28
+	b	.L269
+.L268:
+	ldr	r2, .L295+28
 	ldr	r3, [r2]
 	cmp	r1, r3
-	bls	.L270
+	bls	.L272
 	adds	r3, r3, #1
-	ldr	r0, .L293+8
+	ldr	r0, .L295+8
 	str	r3, [r2]
 	movs	r2, #0
-	ldr	r3, .L293+16
+	ldr	r3, .L295+16
 	ldr	r3, [r3]
 	subs	r3, r3, #2
-.L272:
+.L274:
 	ldrh	r1, [r0]
 	cmp	r2, r1
-	bcs	.L270
+	bcs	.L272
 	ldrh	r1, [r3, #2]
 	adds	r2, r2, #1
 	adds	r1, r1, #1
 	strh	r1, [r3, #2]!	@ movhi
-	b	.L272
-.L275:
-	ldr	r3, .L293+32
+	b	.L274
+.L277:
+	ldr	r3, .L295+32
 	ldrh	r0, [r3]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
@@ -2686,56 +2762,56 @@ GetSwlReplaceBlock:
 	add	r3, r5, #64
 	mov	r2, r0
 	cmp	r0, r3
-	bcc	.L277
-	ldr	r3, .L293+36
+	bcc	.L279
+	ldr	r3, .L295+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L277
-	ldr	r1, .L293+8
+	beq	.L279
+	ldr	r1, .L295+8
 	movs	r0, #0
 	mov	fp, #6
 	ldrh	r1, [r1]
 	str	r1, [sp, #20]
-	ldr	r1, .L293+40
+	ldr	r1, .L295+40
 	ldr	r8, [r1]
-	ldr	r1, .L293+16
+	ldr	r1, .L295+16
 	ldr	r7, [r1]
 	movw	r1, #65535
 	mov	ip, r1
-.L278:
+.L280:
 	ldrh	lr, [r3]
 	movw	r4, #65535
 	cmp	lr, r4
-	bne	.L281
+	bne	.L283
 	mov	r4, ip
-.L280:
+.L282:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L277
+	beq	.L279
 	ldrh	r7, [r7, r4, lsl #1]
 	lsl	r8, r4, #1
 	cmp	r5, r7
-	bcs	.L282
+	bcs	.L284
 	bl	GetFreeBlockMinEraseCount
 	cmp	r5, r0
 	it	cc
 	strcc	r1, [r10]
-.L282:
+.L284:
 	cmp	r6, r7
-	bls	.L277
+	bls	.L279
 	add	r3, r7, #128
 	cmp	r2, r3
-	ble	.L277
+	ble	.L279
 	add	r3, r7, #256
-	ldr	r0, .L293+28
+	ldr	r0, .L295+28
 	cmp	r6, r3
-	bhi	.L283
+	bhi	.L285
 	ldr	r1, [r0]
 	add	r3, r7, #768
 	cmp	r3, r1
-	bcs	.L277
-.L283:
-	ldr	r3, .L293+44
+	bcs	.L279
+.L285:
+	ldr	r3, .L295+44
 	mov	r1, r4
 	str	r2, [sp, #8]
 	mov	r2, r6
@@ -2744,38 +2820,38 @@ GetSwlReplaceBlock:
 	ldrh	r3, [r3, r8]
 	str	r3, [sp]
 	ldr	r3, [r0]
-	ldr	r0, .L293+48
+	ldr	r0, .L295+48
 	bl	printf
-	ldr	r3, .L293+52
+	ldr	r3, .L295+52
 	movs	r2, #1
 	str	r2, [r3]
-	b	.L276
-.L281:
+	b	.L278
+.L283:
 	adds	r0, r0, #1
 	ldr	r4, [sp, #20]
 	uxth	r0, r0
 	cmp	r0, r4
-	bhi	.L277
+	bhi	.L279
 	ldrh	r4, [r3, #4]
-	cbz	r4, .L279
-	ldr	r4, .L293+56
+	cbz	r4, .L281
+	ldr	r4, .L295+56
 	sub	r3, r3, r8
 	asrs	r3, r3, #1
 	muls	r3, r4, r3
 	uxth	r4, r3
 	ldrh	r3, [r7, r4, lsl #1]
 	cmp	r5, r3
-	bcs	.L280
+	bcs	.L282
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
 	movhi	ip, r4
-.L279:
+.L281:
 	mla	r3, fp, lr, r8
-	b	.L278
-.L294:
+	b	.L280
+.L296:
 	.align	2
-.L293:
+.L295:
 	.word	.LANCHOR77
 	.word	.LANCHOR74
 	.word	.LANCHOR5
@@ -2806,18 +2882,18 @@ free_data_superblock:
 	movw	r2, #65535
 	push	{r3, lr}
 	cmp	r0, r2
-	beq	.L296
-	ldr	r2, .L297
+	beq	.L298
+	ldr	r2, .L299
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L296:
+.L298:
 	movs	r0, #0
 	pop	{r3, pc}
-.L298:
+.L300:
 	.align	2
-.L297:
+.L299:
 	.word	.LANCHOR42
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -2836,42 +2912,42 @@ get_new_active_ppa:
 	movw	r3, #65535
 	mov	r4, r0
 	cmp	r2, r3
-	bne	.L300
-	movw	r2, #2710
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	bne	.L302
+	movw	r2, #2740
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L300:
-	ldr	r5, .L313+8
+.L302:
+	ldr	r5, .L315+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L301
-	movw	r2, #2711
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	bne	.L303
+	movw	r2, #2741
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L301:
+.L303:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L302
-	movw	r2, #2712
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	cbnz	r3, .L304
+	movw	r2, #2742
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L302:
+.L304:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	movs	r3, #0
 	strb	r3, [r4, #10]
 	movw	r6, #65535
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-	ldr	r2, .L313+12
+	ldr	r2, .L315+12
 	ldrh	r1, [r2]
 	mov	r2, r3
-.L303:
+.L305:
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L305
+	beq	.L307
 	ldrh	r2, [r4, #4]
 	ldrh	r6, [r4, #2]
 	subs	r2, r2, #1
@@ -2879,7 +2955,7 @@ get_new_active_ppa:
 	orr	r6, r6, r0, lsl #10
 	movw	r0, #65535
 	strh	r2, [r4, #4]	@ movhi
-.L307:
+.L309:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r1, r3
@@ -2891,21 +2967,21 @@ get_new_active_ppa:
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L307
+	beq	.L309
 	strb	r3, [r4, #6]
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r1, r3
-	bne	.L299
-	cbz	r2, .L299
-	movw	r2, #2733
-	ldr	r1, .L313
-	ldr	r0, .L313+4
+	bne	.L301
+	cbz	r2, .L301
+	movw	r2, #2763
+	ldr	r1, .L315
+	ldr	r0, .L315+4
 	bl	printf
-.L299:
+.L301:
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L305:
+.L307:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r1
@@ -2918,10 +2994,10 @@ get_new_active_ppa:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-	b	.L303
-.L314:
+	b	.L305
+.L316:
 	.align	2
-.L313:
+.L315:
 	.word	.LANCHOR88
 	.word	.LC1
 	.word	.LANCHOR19
@@ -2940,54 +3016,54 @@ FtlGcBufInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r1, .L320
+	ldr	r1, .L322
 	mov	fp, #1
-	ldr	r2, .L320+4
+	ldr	r2, .L322+4
 	ldr	r5, [r1]
-	ldr	r1, .L320+8
+	ldr	r1, .L322+8
 	str	r3, [r2]
-	ldr	r2, .L320+12
+	ldr	r2, .L322+12
 	mov	r0, r5
 	ldr	r1, [r1]
 	ldrh	r2, [r2]
 	str	r1, [sp, #4]
-	ldr	r1, .L320+16
+	ldr	r1, .L322+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	ldr	r1, .L320+20
+	ldr	r1, .L322+20
 	ldr	r10, [r1]
-	ldr	r1, .L320+24
+	ldr	r1, .L322+24
 	ldrh	r7, [r1]
-	ldr	r1, .L320+28
+	ldr	r1, .L322+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
 	mov	r1, r3
-.L316:
+.L318:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L317
-	ldr	r3, .L320+32
+	bne	.L319
+	ldr	r3, .L322+32
 	mov	lr, #12
 	mov	r8, #0
 	ldr	r0, [r3]
-	ldr	r3, .L320+8
+	ldr	r3, .L322+8
 	ldr	r4, [r3]
-	ldr	r3, .L320+20
+	ldr	r3, .L322+20
 	ldr	ip, [r3]
-.L318:
+.L320:
 	cmp	r2, r0
-	bcc	.L319
+	bcc	.L321
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L317:
+.L319:
 	bic	r1, r1, #3
 	bic	r3, r3, #3
 	mov	r6, r1
@@ -3001,8 +3077,8 @@ FtlGcBufInit:
 	str	r3, [r4, #-16]
 	mov	r3, ip
 	str	r6, [r4, #-20]
-	b	.L316
-.L319:
+	b	.L318
+.L321:
 	ldr	r3, [sp]
 	mul	r10, lr, r2
 	muls	r3, r2, r3
@@ -3017,10 +3093,10 @@ FtlGcBufInit:
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L318
-.L321:
+	b	.L320
+.L323:
 	.align	2
-.L320:
+.L322:
 	.word	.LANCHOR90
 	.word	.LANCHOR89
 	.word	.LANCHOR91
@@ -3042,41 +3118,41 @@ FtlGcBufInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L329
+	ldr	r3, .L331
 	mov	ip, #12
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
 	mov	fp, #20
 	mov	lr, r4
 	ldr	r7, [r3]
-	ldr	r3, .L329+4
+	ldr	r3, .L331+4
 	ldr	r5, [r3]
-.L323:
+.L325:
 	uxth	r3, r4
 	cmp	r1, r3
-	bls	.L322
+	bls	.L324
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L324:
+.L326:
 	uxth	r3, r2
 	cmp	r7, r3
-	bls	.L325
+	bls	.L327
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L324
+	bne	.L326
 	str	lr, [r10, #8]
-.L325:
+.L327:
 	adds	r4, r4, #1
-	b	.L323
-.L322:
+	b	.L325
+.L324:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L330:
+.L332:
 	.align	2
-.L329:
+.L331:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -3091,43 +3167,43 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L338
+	ldr	r3, .L340
 	movs	r2, #0
 	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
 	movs	r7, #1
 	mov	lr, #20
 	ldr	r4, [r3]
-	ldr	r3, .L338+4
+	ldr	r3, .L340+4
 	ldr	r5, [r3]
-.L332:
+.L334:
 	uxth	r8, r2
 	cmp	r1, r8
-	bhi	.L336
+	bhi	.L338
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L336:
+.L338:
 	mov	r10, #0
-.L333:
+.L335:
 	uxth	r3, r10
 	cmp	r4, r3
-	bls	.L334
+	bls	.L336
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L333
+	bne	.L335
 	mla	r8, lr, r8, r0
 	str	r7, [r3, #8]
 	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
 	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L334:
+.L336:
 	adds	r2, r2, #1
-	b	.L332
-.L339:
+	b	.L334
+.L341:
 	.align	2
-.L338:
+.L340:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -3143,25 +3219,25 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L345
-	ldr	r2, .L345+4
+	ldr	r3, .L347
+	ldr	r2, .L347+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L341:
+.L343:
 	cmp	r3, r2
-	bne	.L343
+	bne	.L345
 	movs	r0, #0
 	bx	lr
-.L343:
+.L345:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L341
+	bne	.L343
 	movs	r0, #1
 	bx	lr
-.L346:
+.L348:
 	.align	2
-.L345:
+.L347:
 	.word	.LANCHOR95
 	.word	.LANCHOR96
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3178,35 +3254,35 @@ FtlGcUpdatePage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r4, .L351
+	ldr	r4, .L353
 	ubfx	r0, r0, #10, #16
 	mov	r6, r1
 	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L351+4
+	ldr	r3, .L353+4
 	ldrh	r1, [r4]
 	ldr	r2, [r3]
 	movs	r3, #0
-.L348:
+.L350:
 	uxth	ip, r3
 	cmp	ip, r1
-	bcc	.L350
-	bne	.L349
+	bcc	.L352
+	bne	.L351
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L349
-.L350:
+	b	.L351
+.L352:
 	adds	r3, r3, #1
 	add	ip, r2, r3, lsl #1
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L348
-.L349:
-	ldr	r2, .L351+8
+	bne	.L350
+.L351:
+	ldr	r2, .L353+8
 	movs	r0, #12
-	ldr	r1, .L351+12
+	ldr	r1, .L353+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -3217,9 +3293,9 @@ FtlGcUpdatePage:
 	str	r5, [r1, r0]
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L352:
+.L354:
 	.align	2
-.L351:
+.L353:
 	.word	.LANCHOR96
 	.word	.LANCHOR95
 	.word	.LANCHOR97
@@ -3239,31 +3315,31 @@ FtlGcRefreshBlock:
 	push	{r3, r4, r5, lr}
 	mov	r1, r0
 	mov	r4, r0
-	ldr	r0, .L356
+	ldr	r0, .L358
 	bl	printf
-	ldr	r0, .L356+4
+	ldr	r0, .L358+4
 	ldrh	r5, [r0]
 	cmp	r4, r5
-	beq	.L354
-	ldr	r3, .L356+8
+	beq	.L356
+	ldr	r3, .L358+8
 	ldrh	r1, [r3]
 	cmp	r4, r1
-	beq	.L354
+	beq	.L356
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L355
+	bne	.L357
 	strh	r4, [r0]	@ movhi
-.L354:
+.L356:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L355:
+.L357:
 	cmp	r1, r2
 	it	eq
 	strheq	r4, [r3]	@ movhi
-	b	.L354
-.L357:
+	b	.L356
+.L359:
 	.align	2
-.L356:
+.L358:
 	.word	.LC73
 	.word	.LANCHOR99
 	.word	.LANCHOR100
@@ -3281,41 +3357,41 @@ FtlGcMarkBadPhyBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
 	mov	r5, r0
-	ldr	r4, .L362
+	ldr	r4, .L364
 	bl	P2V_block_in_plane
 	mov	r2, r5
 	mov	r6, r0
 	ldrh	r1, [r4]
-	ldr	r0, .L362+4
+	ldr	r0, .L364+4
 	bl	printf
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
 	ldrh	r3, [r4]
 	movs	r2, #0
-	ldr	r0, .L362+8
-.L359:
+	ldr	r0, .L364+8
+.L361:
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L361
+	bhi	.L363
 	cmp	r3, #15
 	itttt	ls
 	addls	r2, r3, #1
 	strhls	r2, [r4]	@ movhi
-	ldrls	r2, .L362+8
+	ldrls	r2, .L364+8
 	strhls	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L360
-.L361:
+	b	.L362
+.L363:
 	adds	r2, r2, #1
 	add	r1, r0, r2, lsl #1
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L359
-.L360:
+	bne	.L361
+.L362:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L363:
+.L365:
 	.align	2
-.L362:
+.L364:
 	.word	.LANCHOR101
 	.word	.LC74
 	.word	.LANCHOR102
@@ -3331,22 +3407,22 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L370
+	ldr	r3, .L372
 	push	{r4, lr}
 	ldrh	r3, [r3]
-	cbz	r3, .L365
-	ldr	r2, .L370+4
+	cbz	r3, .L367
+	ldr	r2, .L372+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L365
-	ldr	r4, .L370+8
+	bne	.L367
+	ldr	r4, .L372+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L370+12
+	ldr	r3, .L372+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -3354,12 +3430,12 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L365:
+.L367:
 	movs	r0, #0
 	pop	{r4, pc}
-.L371:
+.L373:
 	.align	2
-.L370:
+.L372:
 	.word	.LANCHOR101
 	.word	.LANCHOR99
 	.word	.LANCHOR103
@@ -3413,1107 +3489,481 @@ rknand_print_hex:
 	mov	r10, r3
 	mov	r5, r6
 	mov	r4, r6
-.L375:
+.L377:
 	cmp	r4, r10
-	bcc	.L381
-	ldr	r0, .L384
+	bcc	.L383
+	ldr	r0, .L386
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	b	printf
-.L381:
-	cbnz	r5, .L376
+.L383:
+	cbnz	r5, .L378
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L384+4
+	ldr	r0, .L386+4
 	bl	printf
-.L376:
+.L378:
 	cmp	r8, #4
-	bne	.L377
+	bne	.L379
 	ldr	r1, [r7, r4, lsl #2]
-.L383:
-	ldr	r0, .L384+8
-.L382:
+.L385:
+	ldr	r0, .L386+8
+.L384:
 	adds	r5, r5, #1
 	bl	printf
 	cmp	r5, #15
-	bls	.L380
+	bls	.L382
 	movs	r5, #0
-	ldr	r0, .L384
+	ldr	r0, .L386
 	bl	printf
-.L380:
+.L382:
 	adds	r4, r4, #1
 	add	r6, r6, r8
-	b	.L375
-.L377:
-	cmp	r8, #2
-	bne	.L379
-	ldrsh	r1, [r7, r4, lsl #1]
-	b	.L383
+	b	.L377
 .L379:
+	cmp	r8, #2
+	bne	.L381
+	ldrh	r1, [r7, r4, lsl #1]
+	b	.L385
+.L381:
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L384+12
-	b	.L382
-.L385:
+	ldr	r0, .L386+12
+	b	.L384
+.L387:
 	.align	2
-.L384:
+.L386:
 	.word	.LC78
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
 	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashReadPages,"ax",%progbits
+	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
-	.global	FlashReadPages
+	.global	FlashEraseBlocks
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadPages, %function
-FlashReadPages:
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r1
-	ldr	r3, .L404
 	mov	r4, r0
-	movs	r5, #0
-	ldr	fp, .L404+12
-	ldrh	r2, [r3, #12]
-	mov	r10, r3
-	str	r2, [sp, #4]
-.L387:
-	cmp	r5, r8
-	bne	.L394
+	ldr	r6, .L404
+	add	r8, r0, #4
+	movs	r7, #0
+	ldr	fp, .L404+20
+	ldrh	r10, [r6, #12]
+	str	r2, [sp]
+	lsl	r3, r10, #3
+	str	r3, [sp, #4]
+.L389:
+	ldr	r3, [sp]
+	cmp	r7, r3
+	beq	.L403
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r8]
+	bl	l2p_addr_tran.isra.0
+	ldr	r5, [sp, #8]
+	cbnz	r5, .L390
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bls	.L390
+	ldr	r6, .L404+4
+	ldr	r7, .L404+8
+.L391:
+	ldr	r3, [sp]
+	adds	r4, r4, #20
+	cmp	r5, r3
+	bne	.L392
+.L403:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L394:
-	ldr	r3, [r4, #8]
-	cbz	r3, .L388
-	ldr	r3, [r4, #12]
-	cbnz	r3, .L389
-.L388:
-	movs	r2, #96
-	ldr	r1, .L404+4
-	mov	r0, fp
+.L392:
+	mov	r3, #-1
+	ldr	r2, [sp, #12]
+	str	r3, [r4, #-20]
+	mov	r1, r6
+	mov	r0, r7
+	adds	r5, r5, #1
 	bl	printf
-.L389:
-	ldr	r6, .L404+8
-	add	r2, sp, #8
-	add	r1, sp, #12
-	ldr	r0, [r4, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r3, [r4, #12]
-	ldr	r2, [r4, #8]
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L404+12
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L404+16
+	bl	rknand_print_hex
+	b	.L391
+.L390:
+	ldr	r2, [fp, #4]
+	uxtb	r0, r5
 	ldr	r1, [sp, #12]
-	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	ldr	r7, [r6, #12]
-	blx	r7
-	ldrh	r3, [r10, #14]
-	str	r0, [r4]
-	cmp	r3, #4
-	bne	.L391
-	ldr	r0, [sp, #4]
-	ldr	r3, [r4, #12]
-	ldr	r2, [r4, #8]
+	blx	r2
+	cbnz	r0, .L393
+	str	r0, [r8, #-4]
+.L394:
+	ldrh	r2, [r6, #14]
+	cmp	r2, #4
+	bne	.L396
 	ldr	r1, [sp, #12]
-	ldr	r6, [r6, #12]
-	adds	r3, r3, #8
-	add	r2, r2, #2048
-	add	r1, r1, r0
+	ldr	r2, [fp, #4]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
-	blx	r6
-	adds	r0, r0, #1
-	beq	.L392
-	ldr	r3, [r4, #12]
-	ldr	r2, [r3, #12]
-	adds	r2, r2, #1
-	bne	.L391
-	ldr	r2, [r3, #8]
-	adds	r2, r2, #1
-	bne	.L391
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L391
-.L392:
-	mov	r3, #-1
-	str	r3, [r4]
-.L391:
-	adds	r5, r5, #1
-	adds	r4, r4, #20
-	b	.L387
+	add	r1, r1, r10
+	blx	r2
+	cbz	r0, .L396
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+.L396:
+	adds	r7, r7, #1
+	add	r8, r8, #20
+	b	.L389
+.L393:
+	mov	r2, #-1
+	str	r2, [r8, #-4]
+	b	.L394
 .L405:
 	.align	2
 .L404:
 	.word	.LANCHOR0
 	.word	.LANCHOR104
+	.word	.LC79
+	.word	.LC80
+	.word	.LC81
 	.word	.LANCHOR105
-	.word	.LC1
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	FtlFreeSysBlkQueueIn
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L416
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r5, .L416+4
-	ldr	r3, [r3]
-	ldr	r7, .L416+8
-	ldr	r10, .L416+20
-	str	r3, [r5, #8]
-	ldr	r3, .L416+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-.L407:
-	ldr	r3, .L416+16
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L412
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L412:
-	ldrh	r4, [r10]
-	movw	r3, #65535
-	ldr	fp, .L416+4
-	strh	r3, [r7, #2]!	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L408:
-	ldrh	r3, [r10]
-	sub	r2, r3, #15
-	cmp	r2, r4
-	bgt	.L410
-	mla	r3, r6, r3, r4
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	cmp	r3, r2
+	bhi	.L406
+	ldr	r4, .L415
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1024
+	beq	.L406
+	cbz	r1, .L408
+	bl	P2V_block_in_plane
+	ldr	r3, .L415+4
+	mov	r6, r0
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, fp
-	lsls	r3, r3, #10
-	str	r3, [r5, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5]
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L415+8
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
-	beq	.L409
-	ldrh	r2, [r8]
-	movw	r3, #61664
-	cmp	r2, r3
-	bne	.L409
-	strh	r4, [r7]	@ movhi
-.L410:
-	adds	r6, r6, #1
-	b	.L407
-.L409:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L408
-.L417:
-	.align	2
-.L416:
-	.word	.LANCHOR107
-	.word	.LANCHOR106
-	.word	.LANCHOR37+10
-	.word	.LANCHOR108
-	.word	.LANCHOR10
-	.word	.LANCHOR17
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L415+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L408:
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+.L406:
+	pop	{r4, r5, r6, pc}
+.L416:
+	.align	2
+.L415:
+	.word	.LANCHOR38
+	.word	.LANCHOR106
+	.word	.LANCHOR43
+	.word	.LANCHOR75
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	FtlGetLastWrittenPage
+	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 88
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, lr}
-	it	eq
-	ldreq	r3, .L427
-	sub	sp, sp, #88
-	lsl	r7, r0, #10
-	mov	r2, r1
-	it	ne
-	ldrne	r3, .L427+4
-	mov	r6, r1
-	add	r0, sp, #4
-	movs	r1, #1
-	ldrh	r5, [r3]
-	ldr	r3, .L427+8
-	subs	r5, r5, #1
-	sxth	r5, r5
-	str	r3, [sp, #12]
-	add	r3, sp, #24
-	str	r3, [sp, #16]
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L422
+	ldrh	r2, [r4, #6]
+	cbz	r2, .L421
+	ldrh	r3, [r4, #2]
+	subs	r2, r2, #1
+	strh	r2, [r4, #6]	@ movhi
+	movs	r2, #1
+	adds	r1, r3, #4
 	adds	r3, r3, #1
-	bne	.L421
-	mov	r8, #0
-.L422:
-	cmp	r8, r5
-	ble	.L425
+	ubfx	r3, r3, #0, #10
+	ldrh	r5, [r4, r1, lsl #1]
+	strh	r3, [r4, #2]	@ movhi
+	mov	r1, r2
+	ldr	r3, .L422+4
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r2, .L422+8
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L418:
+	subs	r3, r5, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L419
+	ldrh	r2, [r4, #6]
+	mov	r1, r5
+	ldr	r0, .L422+12
+	bl	printf
+.L420:
+	b	.L420
 .L421:
+	movw	r5, #65535
+	b	.L418
+.L419:
 	mov	r0, r5
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L425:
-	add	r3, r8, r5
-	mov	r2, r6
-	add	r3, r3, r3, lsr #31
-	movs	r1, #1
-	add	r0, sp, #4
-	asrs	r4, r3, #1
-	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	bne	.L423
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	bne	.L423
-	subs	r4, r4, #1
-	sxth	r5, r4
-	b	.L422
+	pop	{r3, r4, r5, pc}
 .L423:
-	adds	r4, r4, #1
-	sxth	r8, r4
-	b	.L422
-.L428:
 	.align	2
-.L427:
-	.word	.LANCHOR20
-	.word	.LANCHOR19
-	.word	ftl_temp_buf
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FlashProgPages,"ax",%progbits
+.L422:
+	.word	.LANCHOR38
+	.word	.LANCHOR106
+	.word	.LANCHOR75
+	.word	.LC82
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	FlashProgPages
+	.global	ftl_map_blk_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgPages, %function
-FlashProgPages:
-	@ args = 0, pretend = 0, frame = 40
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #40
-	str	r3, [sp]
-	mov	r10, r1
-	mov	r7, r2
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r3, .L459
-	mov	r5, r0
-	movs	r6, #0
-	ldrh	r8, [r3, #12]
-	str	r3, [sp, #4]
-.L430:
-	cmp	r6, r10
-	bne	.L438
-	ldr	r3, [sp]
-	cmp	r3, #0
-	bne	.L445
-.L458:
-	movs	r0, #0
-	add	sp, sp, #40
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L438:
-	ldr	r3, [r5, #8]
-	cbz	r3, .L431
-	ldr	r3, [r5, #12]
-	cbnz	r3, .L432
-.L431:
-	movs	r2, #126
-	ldr	r1, .L459+4
-	ldr	r0, .L459+8
-	bl	printf
-.L432:
-	add	r2, sp, #12
-	add	r1, sp, #16
-	ldr	r0, [r5, #4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r3, .L459+12
-	ldr	r2, [r5, #8]
-	ldr	r1, [sp, #16]
-	ldr	fp, [r3, #8]
-	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-	ldr	r3, [r5, #12]
-	blx	fp
-	cbnz	r0, .L433
-	str	r0, [r5]
-.L434:
-	ldr	r3, [sp, #4]
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L436
-	ldr	r1, .L459+12
-	ldr	r3, [r5, #12]
-	ldr	r2, [r5, #8]
-	ldr	fp, [r1, #8]
-	ldr	r1, [sp, #16]
-	adds	r3, r3, #8
-	add	r2, r2, #2048
-	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-	add	r1, r1, r8
-	blx	fp
-	cbz	r0, .L436
-	mov	r3, #-1
-	str	r3, [r5]
-.L436:
-	adds	r6, r6, #1
-	adds	r5, r5, #20
-	b	.L430
-.L433:
-	mov	r3, #-1
-	str	r3, [r5]
-	b	.L434
-.L443:
 	movs	r3, #0
-	mov	r2, r7
-	str	r3, [r8]
-	movs	r1, #1
-	str	r3, [r10]
-	add	r0, sp, #20
-	ldr	r3, [r4, #4]
-	str	r8, [sp, #28]
-	str	r10, [sp, #32]
-	str	r3, [sp, #24]
-	bl	FlashReadPages
-	ldr	fp, [sp, #20]
-	cmp	fp, #-1
-	bne	.L440
-	ldr	r1, [r4, #4]
-	ldr	r0, .L459+16
-	bl	printf
-	str	fp, [r4]
-.L440:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L441
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	cmp	r2, r3
-	beq	.L441
-	ldr	r1, [r4, #4]
-	ldr	r0, .L459+20
+.L425:
+	uxth	r5, r3
+	cmp	r5, r1
+	bcs	.L428
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L425
+	bl	FtlFreeSysBlkQueueOut
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	cmp	r3, r2
+	bls	.L426
+	ldr	r3, .L432
+	ldr	r0, .L432+4
+	ldrh	r2, [r3, #6]
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L441:
-	ldr	r3, [r4, #8]
-	cbz	r3, .L442
-	ldr	r2, [r3]
-	ldr	r3, [r8]
-	cmp	r2, r3
-	beq	.L442
-	ldr	r1, [r4, #4]
-	ldr	r0, .L459+24
+.L427:
+	b	.L427
+.L426:
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	strh	r5, [r4]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L428:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L430
+	movw	r2, #578
+	ldr	r1, .L432+8
+	ldr	r0, .L432+12
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4]
-.L442:
-	adds	r5, r5, #1
-	adds	r4, r4, #20
-.L439:
-	cmp	r6, r5
-	bne	.L443
-	b	.L458
-.L445:
-	movs	r5, #0
-	ldr	r8, .L459+28
-	ldr	r10, .L459+32
-	b	.L439
-.L460:
+.L430:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L433:
 	.align	2
-.L459:
-	.word	.LANCHOR0
-	.word	.LANCHOR109
+.L432:
+	.word	.LANCHOR38
+	.word	.LC83
+	.word	.LANCHOR107
 	.word	.LC1
-	.word	.LANCHOR105
-	.word	.LC79
-	.word	.LC80
-	.word	.LC81
-	.word	check_buf
-	.word	.LANCHOR110
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FlashEraseBlocks,"ax",%progbits
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlocks
+	.global	ftl_memset
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	mov	r7, r2
-	ldr	r5, .L472
-	adds	r4, r0, #4
-	movs	r6, #0
-	ldr	r10, .L472+4
-	ldrh	r8, [r5, #12]
-.L462:
-	cmp	r6, r7
-	bne	.L468
-	movs	r0, #0
-	add	sp, sp, #12
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L468:
-	add	r1, sp, #4
-	mov	r2, sp
-	ldr	r0, [r4]
-	bl	l2p_addr_tran.isra.0
-	ldr	r3, [r10, #4]
-	ldr	r1, [sp, #4]
-	ldrb	r0, [sp]	@ zero_extendqisi2
-	blx	r3
-	cbnz	r0, .L463
-	str	r0, [r4, #-4]
-.L464:
-	ldrh	r3, [r5, #14]
-	cmp	r3, #4
-	bne	.L466
-	ldr	r1, [sp, #4]
-	ldr	r3, [r10, #4]
-	ldrb	r0, [sp]	@ zero_extendqisi2
-	add	r1, r1, r8
-	blx	r3
-	cbz	r0, .L466
-	mov	r3, #-1
-	str	r3, [r4, #-4]
-.L466:
-	adds	r6, r6, #1
-	adds	r4, r4, #20
-	b	.L462
-.L463:
-	mov	r3, #-1
-	str	r3, [r4, #-4]
-	b	.L464
-.L473:
-	.align	2
-.L472:
-	.word	.LANCHOR0
-	.word	.LANCHOR105
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueIn
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	push	{r4, r5, r6, lr}
-	mov	r5, r0
-	cmp	r3, r2
-	bhi	.L474
-	ldr	r4, .L483
-	ldrh	r3, [r4, #6]
-	cmp	r3, #1024
-	beq	.L474
-	cbz	r1, .L476
-	bl	P2V_block_in_plane
-	ldr	r3, .L483+4
-	mov	r6, r0
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, [r3]
-	lsls	r3, r5, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L483+8
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L483+12
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L476:
-	ldrh	r3, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	ldrh	r3, [r4, #4]
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	strh	r5, [r4, r2, lsl #1]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-.L474:
-	pop	{r4, r5, r6, pc}
-.L484:
-	.align	2
-.L483:
-	.word	.LANCHOR38
-	.word	.LANCHOR111
-	.word	.LANCHOR43
-	.word	.LANCHOR75
-	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	FtlLowFormatEraseBlock
+	.global	FtlMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlMemInit, %function
+FtlMemInit:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L528
+	ldr	r3, .L536
+	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldr	r6, .L528+4
-	mov	fp, #0
-	mov	r5, fp
-	mov	r4, fp
+	sub	sp, sp, #24
+	ldr	r2, .L536+4
+	mov	r10, #12
+	str	r1, [r3]
+	ldr	r3, .L536+8
+	ldr	r4, .L536+12
+	ldr	r8, .L536+292
+	str	r1, [r3]
+	ldr	r3, .L536+16
+	ldrh	r0, [r4]
+	str	r1, [sp, #12]
+	str	r1, [r3]
+	ldr	r3, .L536+20
+	lsls	r0, r0, #1
+	ldr	r6, .L536+24
+	ldr	fp, .L536+296
+	str	r1, [r3]
+	ldr	r3, .L536+28
+	ldr	r7, .L536+32
+	str	r1, [r3]
+	ldr	r3, .L536+36
+	str	r1, [r3]
+	ldr	r3, .L536+40
+	str	r1, [r3]
+	ldr	r3, .L536+44
+	str	r1, [r3]
+	ldr	r3, .L536+48
+	str	r1, [r3]
+	ldr	r3, .L536+52
+	str	r1, [r3]
+	ldr	r3, .L536+56
+	str	r1, [r3]
+	ldr	r3, .L536+60
+	str	r1, [r3]
+	ldr	r3, .L536+64
+	str	r1, [r3]
+	ldr	r3, .L536+68
+	str	r1, [r3]
+	ldr	r3, .L536+72
+	str	r1, [r3]
+	movw	r3, #65535
+	str	r3, [r2]
+	ldr	r2, .L536+76
+	str	r1, [r2]
+	ldr	r2, .L536+80
+	str	r1, [r2]
+	ldr	r2, .L536+84
+	str	r1, [r2]
+	ldr	r2, .L536+88
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L536+92
+	strh	r3, [r2]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L536+96
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L536+100
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L536+104
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L536+108
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L536+112
+	strh	r1, [r3]	@ movhi
+	bl	ftl_malloc
+	str	r0, [r8]
+	ldrh	r0, [r4]
+	movs	r4, #20
+	mul	r0, r10, r0
+	bl	ftl_malloc
+	ldr	r3, .L536+116
+	str	r0, [r3]
+	ldrh	r3, [r6]
+	muls	r4, r3, r4
+	lsls	r5, r4, #2
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L536+120
 	str	r0, [r3]
-	mov	r10, #20
-	ldr	r3, .L528+8
-	ldr	r8, [r6]
-	str	r0, [sp, #4]
-	ldrh	r3, [r3]
-	str	r1, [sp]
-	str	r3, [sp, #8]
-	ldr	r3, .L528+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L528+16
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L528+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #20]
-.L486:
-	ldr	r3, [sp, #8]
-	uxth	r2, fp
-	cmp	r3, r2
-	bhi	.L490
-	cmp	r5, #0
-	beq	.L485
-	mov	r0, r8
-	movs	r7, #0
-	mov	r8, #20
-	mov	r2, r5
-	movs	r1, #0
-	bl	FlashEraseBlocks
-.L493:
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L495
-	ldr	r3, [sp]
-	cmp	r3, #0
-	beq	.L511
-	ldr	r3, .L528+24
-	mov	r8, #1
-	ldrh	r10, [r3]
-	lsr	r3, r10, #2
-	str	r3, [sp, #12]
-.L496:
-	movs	r6, #0
-.L505:
-	ldr	r3, .L528+8
-	mov	fp, #0
-	mov	r5, fp
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L528+4
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L528+28
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L528+12
-	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	ldr	r3, .L528+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-.L497:
-	ldr	r3, [sp, #16]
-	uxth	r2, fp
-	cmp	r3, r2
-	bhi	.L500
-	cbz	r5, .L485
-	ldr	fp, .L528+4
-	movs	r3, #1
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, [sp, #8]
-	movs	r7, #0
-	bl	FlashProgPages
-	movs	r3, #20
-.L502:
-	uxth	r2, r7
-	cmp	r5, r2
-	bhi	.L504
-	ldr	r3, [sp, #12]
-	add	r6, r6, r3
-	uxth	r6, r6
-	cmp	r10, r6
-	bhi	.L505
-	ldr	r7, .L528+4
-	movs	r6, #0
-	mov	r10, #20
-.L506:
-	uxth	r3, r6
-	cmp	r5, r3
-	bhi	.L508
-	ldr	r3, [sp, #4]
-	cmp	r3, #63
-	bls	.L509
-	ldr	r3, [sp]
-	cbz	r3, .L485
-.L509:
-	ldr	r3, .L528+4
-	mov	r2, r5
-	mov	r1, r8
-	ldr	r0, [r3]
-	bl	FlashEraseBlocks
-.L485:
 	mov	r0, r4
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L490:
-	mul	r2, r10, fp
-	movs	r3, #0
-	ldr	r1, [sp, #4]
-	str	r3, [r8, r2]
-	ldr	r3, .L528+32
-	ldrb	r0, [r3, fp]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r3, [sp]
-	mov	r7, r0
-	cbz	r3, .L487
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L488
-.L487:
-	mov	r0, r7
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L489
-	mla	r1, r10, r5, r8
-	ldr	r3, [sp, #12]
-	lsls	r7, r7, #10
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #20]
-	str	r7, [r1, #4]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #16]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L488:
-	add	fp, fp, #1
-	b	.L486
-.L489:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L488
-.L495:
-	mul	r3, r8, r7
-	ldr	r2, [r6]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L494
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.L494:
-	adds	r7, r7, #1
-	b	.L493
-.L511:
-	movs	r3, #6
-	ldr	r8, [sp]
-	str	r3, [sp, #12]
-	mov	r10, #1
-	b	.L496
-.L500:
-	movs	r3, #20
-	mul	r2, r3, fp
-	ldr	r3, [sp, #8]
-	mov	r1, r3
-	movs	r3, #0
-	str	r3, [r1, r2]
-	ldr	r3, .L528+32
-	ldr	r1, [sp, #4]
-	ldrb	r0, [r3, fp]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r3, [sp]
-	mov	r7, r0
-	cbz	r3, .L498
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L499
-.L498:
-	mov	r0, r7
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L499
-	ldr	r3, [sp, #8]
-	movs	r2, #20
-	add	r7, r6, r7, lsl #10
-	mla	r1, r2, r5, r3
-	ldr	r3, [sp, #20]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #28]
-	str	r7, [r1, #4]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #24]
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
-.L499:
-	add	fp, fp, #1
-	b	.L497
-.L504:
-	mul	r2, r3, r7
-	ldr	r1, [fp]
-	adds	r0, r1, r2
-	ldr	r2, [r1, r2]
-	cbz	r2, .L503
-	ldr	r0, [r0, #4]
-	adds	r4, r4, #1
-	str	r3, [sp, #8]
-	uxth	r4, r4
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-	ldr	r3, [sp, #8]
-.L503:
-	adds	r7, r7, #1
-	b	.L502
-.L508:
-	ldr	r3, [sp]
-	cbz	r3, .L507
-	mul	r3, r10, r6
-	ldr	r2, [r7]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbnz	r3, .L507
-	ldr	r0, [r1, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
-.L507:
-	adds	r6, r6, #1
-	b	.L506
-.L529:
-	.align	2
-.L528:
-	.word	.LANCHOR112
-	.word	.LANCHOR111
-	.word	.LANCHOR3
-	.word	.LANCHOR113
-	.word	.LANCHOR114
-	.word	.LANCHOR24
-	.word	.LANCHOR20
-	.word	.LANCHOR115
-	.word	.LANCHOR13
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r4, .L537
-	ldr	r6, .L537+4
-.L531:
-	ldrh	r1, [r4, #6]
-	cbz	r1, .L532
-	ldrh	r3, [r4, #2]
-	subs	r1, r1, #1
-	strh	r1, [r4, #6]	@ movhi
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	ldrh	r5, [r4, r2, lsl #1]
-	ubfx	r3, r3, #0, #10
-	strh	r3, [r4, #2]	@ movhi
-	mov	r0, r5
-	bl	P2V_block_in_plane
-	mov	r7, r0
-	ldr	r0, [r6]
-	lsls	r3, r5, #10
-	movs	r2, #1
-	mov	r1, r2
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L537+8
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r7, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	ldr	r2, .L537+12
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	subs	r3, r5, #1
-	uxth	r3, r3
-	movw	r2, #65533
-	cmp	r3, r2
-	bhi	.L533
-	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, pc}
-.L532:
-	ldr	r0, .L537+16
-	bl	printf
-.L535:
-	b	.L535
-.L533:
-	ldrh	r2, [r4, #6]
-	mov	r1, r5
-	ldr	r0, .L537+20
-	bl	printf
-	b	.L531
-.L538:
-	.align	2
-.L537:
-	.word	.LANCHOR38
-	.word	.LANCHOR111
-	.word	.LANCHOR43
-	.word	.LANCHOR75
-	.word	.LC82
-	.word	.LC83
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_alloc_new_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	movs	r3, #0
-.L540:
-	uxth	r5, r3
-	cmp	r5, r1
-	bcs	.L543
-	mov	r7, r2
-	adds	r3, r3, #1
-	ldrh	r6, [r7]
-	adds	r2, r2, #2
-	cmp	r6, #0
-	bne	.L540
-	bl	FtlFreeSysBlkQueueOut
-	subs	r3, r0, #1
-	movw	r2, #65533
-	uxth	r3, r3
-	mov	r1, r0
-	strh	r0, [r7]	@ movhi
-	cmp	r3, r2
-	bls	.L541
-	ldr	r3, .L547
-	ldr	r0, .L547+4
-	ldrh	r2, [r3, #6]
-	bl	printf
-.L542:
-	b	.L542
-.L541:
-	ldr	r3, [r4, #28]
-	strh	r6, [r4, #2]	@ movhi
-	strh	r5, [r4]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L543:
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bhi	.L545
-	movw	r2, #581
-	ldr	r1, .L547+8
-	ldr	r0, .L547+12
-	bl	printf
-.L545:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L548:
-	.align	2
-.L547:
-	.word	.LANCHOR38
-	.word	.LC84
-	.word	.LANCHOR116
-	.word	.LC1
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.section	.text.ftl_memset,"ax",%progbits
-	.align	1
-	.global	ftl_memset
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.FtlMemInit,"ax",%progbits
-	.align	1
-	.global	FtlMemInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #0
-	ldr	r3, .L651
-	mov	r8, #12
-	ldr	r2, .L651+4
-	str	r1, [r3]
-	ldr	r3, .L651+8
-	ldr	r4, .L651+12
-	str	r1, [sp, #4]
-	str	r1, [r3]
-	ldr	r3, .L651+16
-	ldrh	r0, [r4]
-	ldr	fp, .L651+288
-	str	r1, [r3]
-	ldr	r3, .L651+20
-	lsls	r0, r0, #1
-	ldr	r10, .L651+292
-	ldr	r5, .L651+24
-	str	r1, [r3]
-	ldr	r3, .L651+28
-	ldr	r7, .L651+32
-	str	r1, [r3]
-	ldr	r3, .L651+36
-	str	r1, [r3]
-	ldr	r3, .L651+40
-	str	r1, [r3]
-	ldr	r3, .L651+44
-	str	r1, [r3]
-	ldr	r3, .L651+48
-	str	r1, [r3]
-	ldr	r3, .L651+52
-	str	r1, [r3]
-	ldr	r3, .L651+56
-	str	r1, [r3]
-	ldr	r3, .L651+60
-	str	r1, [r3]
-	ldr	r3, .L651+64
-	str	r1, [r3]
-	ldr	r3, .L651+68
-	str	r1, [r3]
-	ldr	r3, .L651+72
-	str	r1, [r3]
-	movw	r3, #65535
-	str	r3, [r2]
-	ldr	r2, .L651+76
-	str	r1, [r2]
-	ldr	r2, .L651+80
-	str	r1, [r2]
-	ldr	r2, .L651+84
-	str	r1, [r2]
-	ldr	r2, .L651+88
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L651+92
-	strh	r3, [r2]	@ movhi
-	movs	r2, #32
-	ldr	r3, .L651+96
-	strh	r2, [r3]	@ movhi
-	movs	r2, #128
-	ldr	r3, .L651+100
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L651+104
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L651+108
-	strh	r1, [r3]	@ movhi
-	ldr	r3, .L651+112
-	strh	r1, [r3]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L651+116
-	str	r0, [r3]
-	ldrh	r0, [r4]
-	movs	r4, #20
-	mul	r0, r8, r0
 	bl	ftl_malloc
-	ldrh	r2, [fp]
-	ldr	r3, .L651+120
-	muls	r4, r2, r4
+	ldr	r3, .L536+124
 	str	r0, [r3]
-	lsls	r6, r4, #2
-	mov	r0, r6
+	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L651+124
-	str	r0, [r3]
+	str	r0, [fp]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+128
+	ldr	r3, .L536+128
+	ldr	r5, .L536+132
 	str	r0, [r3]
-	mov	r0, r6
-	bl	ftl_malloc
-	ldr	r3, .L651+132
-	ldr	r6, .L651+136
-	str	r0, [r3]
-	mov	r0, r4
-	bl	ftl_malloc
-	str	r0, [r10]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+140
-	ldrh	r2, [fp]
+	ldr	r3, .L536+136
 	str	r0, [r3]
-	ldr	r3, .L651+144
-	lsls	r2, r2, #1
+	ldrh	r0, [r6]
+	ldr	r3, .L536+140
+	lsls	r0, r0, #1
 	ldrh	r4, [r3]
-	adds	r2, r2, #1
-	str	r2, [r5]
+	adds	r0, r0, #1
+	str	r0, [r5]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+148
+	ldr	r3, .L536+144
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L651+152
+	ldr	r3, .L536+148
 	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
@@ -4521,179 +3971,177 @@ FtlMemInit:
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	str	r0, [r6]
+	ldr	r3, .L536+152
+	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r2, .L651+156
-	str	r0, [r2]
+	ldr	r3, .L536+156
+	str	r0, [r3]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r2, .L651+160
-	ldr	r4, .L651+164
-	str	r0, [r2]
-	ldr	r0, [r5]
-	mul	r0, r8, r0
-	bl	ftl_malloc
-	ldr	r2, .L651+168
-	ldrh	r3, [fp]
-	str	r0, [r2]
-	ldrh	r2, [r4]
-	mul	fp, r3, r2
-	mov	r0, fp
-	bl	ftl_malloc
-	ldr	r2, .L651+172
-	str	r0, [r2]
-	lsl	r0, fp, #2
-	bl	ftl_malloc
-	ldr	r3, .L651+176
+	ldr	r3, .L536+160
 	str	r0, [r3]
-	ldrh	r3, [r4]
 	ldr	r0, [r5]
-	ldr	r4, .L651+180
-	ldr	r5, .L651+184
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L651+188
-	str	r0, [r3]
-	ldrh	r0, [r4]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r5]	@ movhi
+	mul	r0, r10, r0
 	bl	ftl_malloc
-	ldr	r3, .L651+192
+	ldr	r3, .L536+164
 	str	r0, [r3]
-	ldrh	r3, [r5]
-	ldr	r0, .L651+196
-	addw	r3, r3, #547
-	lsrs	r3, r3, #9
-	and	r0, r0, r3, lsl #9
-	strh	r3, [r5]	@ movhi
+	mov	r0, r4
 	bl	ftl_malloc
-	ldrh	fp, [r4]
-	ldr	r3, .L651+200
-	str	r0, [r3]
-	lsl	fp, fp, #1
-	ldr	r3, .L651+204
-	adds	r0, r0, #32
+	ldr	r3, .L536+168
 	str	r0, [r3]
-	mov	r0, fp
+	mov	r0, r4
+	ldr	r4, .L536+172
 	bl	ftl_malloc
-	ldr	r3, .L651+208
-	str	r0, [r3]
-	mov	r0, fp
+	str	r0, [r4]
+	ldr	r0, .L536+176
+	ldr	r4, .L536+180
+	ldrh	r0, [r0]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	str	r0, [r4]
+	ldr	r4, .L536+184
+	ldrh	r2, [r6]
+	ldr	r6, .L536+152
+	ldrh	r0, [r4]
+	muls	r2, r0, r2
+	mov	r0, r2
+	str	r2, [sp, #4]
 	bl	ftl_malloc
-	ldr	fp, .L651+296
-	ldr	r3, .L651+212
+	ldr	r2, [sp, #4]
+	ldr	r3, .L536+188
 	str	r0, [r3]
-	ldr	r3, [fp]
+	lsls	r0, r2, #2
+	bl	ftl_malloc
+	ldr	r2, .L536+192
+	str	r0, [r2]
+	ldrh	r2, [r4]
+	ldr	r0, [r5]
+	ldr	r4, .L536+196
+	ldr	r5, .L536+200
+	muls	r0, r2, r0
+	bl	ftl_malloc
+	ldr	r3, .L536+204
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r5]	@ movhi
+	bl	ftl_malloc
+	ldr	r2, .L536+208
+	str	r0, [r2]
+	ldrh	r2, [r5]
+	ldr	r0, .L536+212
+	addw	r2, r2, #547
+	lsrs	r2, r2, #9
+	and	r0, r0, r2, lsl #9
+	strh	r2, [r5]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L536+216
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L536+220
+	str	r0, [r3]
+	ldrh	r3, [r4]
 	lsls	r5, r3, #1
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r2, .L651+216
+	ldr	r2, .L536+224
 	str	r0, [r2]
 	mov	r0, r5
 	bl	ftl_malloc
-	ldr	r3, .L651+220
-	ldr	r5, .L651+224
+	ldr	r3, .L536+228
 	str	r0, [r3]
+	ldr	r3, .L536+232
+	ldr	r2, [r3]
+	str	r3, [sp, #8]
+	lsls	r5, r2, #1
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r2, .L536+236
+	str	r0, [r2]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r2, .L536+240
+	ldr	r5, .L536+244
+	str	r0, [r2]
 	ldrh	r0, [r4]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L651+228
-	str	r0, [r3]
+	ldr	r2, .L536+248
+	str	r0, [r2]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r2, .L651+232
+	ldr	r2, .L536+252
 	str	r0, [r2]
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r2, .L651+236
+	ldr	r2, .L536+256
 	str	r0, [r2]
 	ldrh	r0, [r5]
-	ldr	r5, .L651+120
+	ldr	r5, .L536+116
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L651+240
-	str	r0, [r3]
-	ldr	r3, .L651+244
-	ldrh	r0, [r3]
-	str	r3, [sp]
+	ldr	r2, .L536+260
+	str	r0, [r2]
+	ldr	r2, .L536+264
+	ldrh	r0, [r2]
+	str	r2, [sp, #4]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, [sp]
-	ldr	r2, .L651+248
-	ldr	r1, [sp, #4]
-	str	r0, [r2]
-	ldrh	r2, [r3]
+	ldr	r2, [sp, #4]
+	ldr	ip, .L536+300
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r2]
+	str	r0, [ip]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-	ldr	r3, .L651+252
-	ldrh	r0, [r3]
+	ldr	r2, .L536+268
+	ldrh	r0, [r2]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L651+256
-	str	r0, [r3]
-	ldr	r0, [fp]
-	ldr	fp, .L651+300
+	ldr	r2, .L536+272
+	ldr	r3, [sp, #8]
+	str	r0, [r2]
+	ldr	r0, [r3]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L651+260
+	ldr	r3, .L536+276
 	str	r0, [r3]
-	ldrh	r0, [fp]
-	mul	r0, r8, r0
-	ldr	r8, .L651+304
+	ldr	r3, .L536+280
+	ldrh	r0, [r3]
+	str	r3, [sp, #4]
+	mul	r0, r10, r0
+	ldr	r10, .L536+304
 	bl	ftl_malloc
-	ldr	r2, .L651+144
-	ldr	r3, .L651+264
-	str	r0, [r3]
+	ldr	r2, .L536+284
+	ldr	r3, [sp, #4]
+	str	r0, [r2]
+	ldr	r2, .L536+140
+	ldrh	r3, [r3]
 	ldrh	r0, [r2]
-	ldrh	r3, [fp]
-	ldr	fp, .L651+132
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L651+268
+	ldr	r3, .L536+288
 	str	r0, [r3]
 	movs	r0, #6
 	ldrh	r3, [r4]
-	ldr	r4, .L651+272
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L651+276
-	str	r0, [r3]
-	ldr	r3, .L651+280
-	ldrh	r0, [r3]
-	ldrh	r3, [r8]
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
-	strh	r0, [r4]	@ movhi
-	muls	r0, r3, r0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r2, .L651+284
-	str	r5, [sp, #4]
-	ldr	r5, .L651+124
-	mov	r1, r2
-	ldrh	r3, [r8]
-	str	r0, [r1, #28]!
-	ldrh	r0, [r4]
-	ldr	r8, .L651+140
-	ldr	lr, .L651+148
-	b	.L652
-.L653:
+	b	.L537
+.L538:
 	.align	2
-.L651:
+.L536:
 	.word	.LANCHOR70
-	.word	.LANCHOR118
+	.word	.LANCHOR109
 	.word	.LANCHOR71
 	.word	.LANCHOR21
 	.word	.LANCHOR67
 	.word	.LANCHOR64
-	.word	.LANCHOR94
+	.word	.LANCHOR3
 	.word	.LANCHOR63
-	.word	.LANCHOR124
+	.word	.LANCHOR117
 	.word	.LANCHOR65
 	.word	.LANCHOR66
 	.word	.LANCHOR62
@@ -4702,11 +4150,11 @@ FtlMemInit:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR117
+	.word	.LANCHOR108
 	.word	.LANCHOR87
-	.word	.LANCHOR119
+	.word	.LANCHOR110
 	.word	.LANCHOR84
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR99
 	.word	.LANCHOR100
 	.word	.LANCHOR82
@@ -4714,22 +4162,26 @@ FtlMemInit:
 	.word	.LANCHOR85
 	.word	.LANCHOR101
 	.word	.LANCHOR103
-	.word	.LANCHOR95
 	.word	.LANCHOR98
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR122
-	.word	.LANCHOR91
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR106
+	.word	.LANCHOR94
 	.word	.LANCHOR93
 	.word	.LANCHOR23
-	.word	.LANCHOR107
-	.word	.LANCHOR123
 	.word	.LANCHOR115
-	.word	.LANCHOR113
-	.word	.LANCHOR24
+	.word	.LANCHOR116
+	.word	.LANCHOR91
+	.word	.LANCHOR118
+	.word	.LANCHOR119
 	.word	.LANCHOR90
-	.word	.LANCHOR108
-	.word	.LANCHOR114
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR12
+	.word	.LANCHOR122
+	.word	.LANCHOR24
+	.word	.LANCHOR123
+	.word	.LANCHOR124
 	.word	.LANCHOR6
 	.word	.LANCHOR125
 	.word	.LANCHOR92
@@ -4739,6 +4191,7 @@ FtlMemInit:
 	.word	.LANCHOR43
 	.word	.LANCHOR128
 	.word	.LANCHOR42
+	.word	.LANCHOR30
 	.word	.LANCHOR129
 	.word	.LANCHOR130
 	.word	.LANCHOR27
@@ -4747,1919 +4200,3141 @@ FtlMemInit:
 	.word	.LANCHOR131
 	.word	.LANCHOR132
 	.word	.LANCHOR28
-	.word	.LANCHOR133
 	.word	.LANCHOR32
 	.word	.LANCHOR134
 	.word	.LANCHOR135
+	.word	.LANCHOR33
 	.word	.LANCHOR55
 	.word	.LANCHOR136
-	.word	.LANCHOR137
-	.word	.LANCHOR40
-	.word	.LANCHOR17
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR111
-	.word	.LANCHOR30
-	.word	.LANCHOR33
+	.word	.LANCHOR95
+	.word	.LANCHOR114
+	.word	.LANCHOR133
 	.word	.LANCHOR10
-.L652:
-	ldr	ip, .L654+100
+.L537:
+	ldr	r4, .L539
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L539+4
+	str	r0, [r3]
+	ldr	r3, .L539+8
+	ldrh	r0, [r3]
+	ldrh	r3, [r10]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r4]	@ movhi
+	muls	r0, r3, r0
 	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r2, .L539+12
 	str	r5, [sp, #8]
-	ldr	r5, .L654
-	str	r3, [sp]
+	ldr	r5, .L539+16
+	mov	r1, r2
+	ldrh	r3, [r10]
+	str	r0, [r1, #28]!
+	ldrh	r0, [r4]
+	str	r5, [sp, #12]
+	ldr	r5, .L539+20
+	ldr	r10, .L539+116
+	lsls	r0, r0, #2
+	ldr	lr, .L539+120
+	ldr	ip, .L539+124
+	str	r5, [sp, #16]
 	mov	r4, r0
+	ldr	r5, .L539+24
+	str	r3, [sp, #4]
 	movs	r3, #1
-	str	r5, [sp, #12]
-.L551:
-	ldr	r5, [sp]
+	str	r5, [sp, #20]
+.L436:
+	ldr	r5, [sp, #4]
 	cmp	r3, r5
-	bcc	.L552
+	bcc	.L437
 	add	r3, r2, r3, lsl #2
-	ldr	r1, .L654+4
+	ldr	r1, .L539+28
 	movs	r0, #0
 	adds	r3, r3, #24
-.L553:
+.L438:
 	cmp	r1, r3
-	bne	.L554
-	ldr	r3, .L654+8
+	bne	.L439
+	ldr	r3, .L539+32
 	ldr	r3, [r3]
-	cbnz	r3, .L555
-.L557:
-	ldr	r1, .L654+12
-	ldr	r0, .L654+16
+	cbnz	r3, .L440
+.L442:
+	ldr	r1, .L539+36
+	ldr	r0, .L539+40
 	bl	printf
 	mov	r0, #-1
-.L550:
-	add	sp, sp, #16
+.L435:
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L552:
+.L437:
 	ldr	r5, [r2, #28]
 	adds	r3, r3, #1
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
-	b	.L551
-.L554:
+	b	.L436
+.L439:
 	str	r0, [r3, #4]!
-	b	.L553
-.L555:
-	ldr	r3, .L654+20
+	b	.L438
+.L440:
+	ldr	r3, .L539+44
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+24
+	beq	.L442
+	ldr	r3, .L539+48
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+28
+	beq	.L442
+	ldr	r3, .L539+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+32
+	beq	.L442
+	ldr	r3, .L539+56
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+36
+	beq	.L442
+	ldr	r3, .L539+60
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+40
+	beq	.L442
+	ldr	r3, .L539+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+44
+	beq	.L442
+	ldr	r3, .L539+64
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+48
-	ldr	r3, [r3]
+	beq	.L442
+	ldr	r3, [r8]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [sp, #4]
+	beq	.L442
+	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [sp, #8]
+	beq	.L442
+	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [fp]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [r8]
+	beq	.L442
+	ldr	r3, [sp, #20]
+	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, [sp, #12]
+	beq	.L442
+	ldr	r3, [sp, #16]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [lr]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [ip]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r7]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+52
+	beq	.L442
+	ldr	r3, .L539+68
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+56
+	beq	.L442
+	ldr	r3, .L539+72
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+60
+	beq	.L442
+	ldr	r3, .L539+76
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+64
+	beq	.L442
+	ldr	r3, .L539+80
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+68
+	beq	.L442
+	ldr	r3, .L539+84
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+72
+	beq	.L442
+	ldr	r3, .L539+88
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+76
+	beq	.L442
+	ldr	r3, .L539+92
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+80
+	beq	.L442
+	ldr	r3, .L539+96
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+84
+	beq	.L442
+	ldr	r3, .L539+100
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+88
+	beq	.L442
+	ldr	r3, .L539+104
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+92
+	beq	.L442
+	ldr	r3, .L539+108
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
-	ldr	r3, .L654+96
+	beq	.L442
+	ldr	r3, .L539+112
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L557
+	beq	.L442
+	movs	r0, #0
+	b	.L435
+.L540:
+	.align	2
+.L539:
+	.word	.LANCHOR137
+	.word	.LANCHOR40
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR93
+	.word	.LANCHOR37+56
+	.word	.LANCHOR129
+	.word	.LANCHOR138
+	.word	.LC84
+	.word	.LANCHOR130
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR55
+	.word	.LANCHOR136
+	.word	.LANCHOR42
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR90
+	.word	.LANCHOR123
+	.word	.LANCHOR124
+	.word	.LANCHOR92
+	.word	.LANCHOR43
+	.word	.LANCHOR126
+	.word	.LANCHOR36
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR106
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L547
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r7, .L547+4
+	mov	r6, r1
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	ldrh	r2, [r3]
+	movs	r1, #0
+	ldr	r8, .L547+12
+	mov	r0, r6
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.L544:
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L541
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bhi	.L543
+	movs	r2, #74
+	mov	r1, r8
+	ldr	r0, .L547+8
+	bl	printf
+.L543:
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	cmp	r5, r4
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	bne	.L544
+.L541:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L548:
+	.align	2
+.L547:
+	.word	.LANCHOR137
+	.word	.LANCHOR17
+	.word	.LC1
+	.word	.LANCHOR139
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
+	.align	1
+	.global	FtlBbtMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L550
+	movw	r3, #65535
+	movs	r2, #16
+	movs	r1, #255
+	strh	r3, [r0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	ftl_memset
+.L551:
+	.align	2
+.L550:
+	.word	.LANCHOR37
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L553
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	ftl_memset
+	mov	r0, r4
+	pop	{r4, pc}
+.L554:
+	.align	2
+.L553:
+	.word	.LANCHOR38
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
+	movs	r1, #0
+	ldr	r7, [r0, #12]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
+	mov	r0, r5
+	bl	ftl_memset
+	movs	r3, #0
+.L556:
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L560
+	ldr	r3, .L575
+	movs	r6, #0
+	mov	r10, r6
+	ldrh	r2, [r3]
+	ldrh	r3, [r4]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	mov	r2, r6
+	ldrh	fp, [r5]
+.L561:
+	ldrh	r3, [r4, #10]
+	uxth	ip, r6
+	cmp	r3, ip
+	bhi	.L565
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L560:
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
+	movs	r2, #0
+	ubfx	r1, r1, #10, #16
+.L557:
+	ldrh	ip, [r4, #10]
+	uxth	r0, r2
+	cmp	ip, r0
+	bhi	.L559
+	adds	r3, r3, #1
+	b	.L556
+.L559:
+	uxth	r0, r2
+	ldrh	ip, [r7, r0, lsl #1]
+	cmp	ip, r1
+	bne	.L558
+	cbz	r1, .L558
+	ldrh	ip, [r5, r0, lsl #1]
+	add	ip, ip, #1
+	strh	ip, [r5, r0, lsl #1]	@ movhi
+.L558:
+	adds	r2, r2, #1
+	b	.L557
+.L565:
+	uxth	r1, r6
+	ldrh	r3, [r5, r1, lsl #1]
+	lsl	r8, r1, #1
+	cmp	fp, r3
+	bls	.L562
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cbnz	r0, .L563
+.L564:
+	adds	r6, r6, #1
+	b	.L561
+.L562:
+	cmp	r3, #0
+	bne	.L564
+	ldrh	r0, [r7, r1, lsl #1]
+	add	r8, r8, r7
+	cmp	r0, #0
+	beq	.L564
+.L566:
+	movs	r1, #1
+	str	r2, [sp, #4]
+	bl	FtlFreeSysBlkQueueIn
+	ldr	r2, [sp, #4]
+	strh	r2, [r8]	@ movhi
+	ldrh	r3, [r4, #8]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L564
+.L563:
+	mov	r10, ip
+	mov	fp, r3
+	cmp	r3, #0
+	beq	.L566
+	b	.L564
+.L576:
+	.align	2
+.L575:
+	.word	.LANCHOR20
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r1, #0
+	ldr	r5, .L580
+	ldr	r4, .L580+4
+	ldr	r2, [r5]
+	ldr	r7, .L580+8
+	ldr	r6, .L580+12
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	ldr	r8, .L580+44
+	bl	ftl_memset
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L580+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	movs	r3, #0
+	mov	lr, r3
+.L578:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L579
+	ldr	r3, .L580+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L580+24
+	strh	r0, [r3]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L580+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L580+32
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	ldr	r2, .L580+36
+	ldr	r2, [r2]
+	str	r2, [r3, #16]
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	ldr	r2, .L580+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L579:
+	bic	r3, r3, #3
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L578
+.L581:
+	.align	2
+.L580:
+	.word	.LANCHOR30
+	.word	.LANCHOR130
+	.word	.LANCHOR23
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR140
+	.word	.LANCHOR141
+	.word	.LANCHOR32
+	.word	.LANCHOR129
+	.word	.LANCHOR135
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r2, #65535
+	ldr	r3, .L583
+	movs	r4, #0
+	mov	r1, r4
+	ldr	r5, .L583+4
+	strh	r2, [r3]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L583+8
+	str	r4, [r3]
+	ldr	r3, .L583+12
+	str	r4, [r3]
+	ldr	r3, .L583+16
+	str	r2, [r3]
+	ldr	r3, .L583+20
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L583+24
+	ldrh	r2, [r3]
+	ldr	r3, .L583+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L583+32
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L583+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L583+40
+	bl	ftl_memset
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L583+44
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L584:
+	.align	2
+.L583:
+	.word	.LANCHOR142
+	.word	.LANCHOR6
+	.word	.LANCHOR143
+	.word	.LANCHOR144
+	.word	.LANCHOR145
+	.word	.LANCHOR35
+	.word	.LANCHOR27
+	.word	.LANCHOR36
+	.word	.LANCHOR43
+	.word	.LANCHOR126
+	.word	.LANCHOR39
+	.word	.LANCHOR81
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
+	.align	1
+	.global	SupperBlkListInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #6
+	ldr	r3, .L596
+	movs	r1, #0
+	movs	r4, #0
+	ldr	r6, .L596+4
+	mov	r8, r4
+	ldrh	r3, [r3]
+	mov	r5, r4
+	ldr	r0, [r6]
+	mov	r10, r6
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L596+8
+	ldr	r2, .L596+12
+	str	r4, [r3]
+	ldr	r3, .L596+16
+	strh	r4, [r2]	@ movhi
+	str	r2, [sp, #4]
+	str	r4, [r3]
+	ldr	r3, .L596+20
+	str	r4, [r3]
+	ldr	r3, .L596+24
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.L586:
+	ldr	r3, .L596+28
+	uxth	r7, r4
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcs	.L593
+	ldr	r3, .L596+32
+	ldrh	r2, [r3]
+	ldr	r3, .L596+36
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #0
+	mov	r6, r3
+	b	.L594
+.L588:
+	str	r2, [sp, #12]
+	mov	r1, r7
+	ldr	r2, .L596+40
+	str	r3, [sp, #8]
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L587
+	ldr	r1, [sp]
+	add	r6, r6, r1
+	uxth	r6, r6
+.L587:
+	adds	r3, r3, #1
+.L594:
+	uxth	r1, r3
+	cmp	r2, r1
+	bhi	.L588
+	uxth	r3, r4
+	cbz	r6, .L589
+	mov	r1, r6
+	str	r3, [sp]
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	ldr	r3, [sp]
+	uxth	r6, r0
+.L590:
+	ldr	r1, [r10]
+	movs	r2, #6
+	mla	r2, r2, r3, r1
+	strh	r6, [r2, #4]	@ movhi
+	ldr	r2, .L596+44
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L591
+	ldr	r2, .L596+48
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L591
+	ldr	r2, .L596+52
+	ldrh	r2, [r2]
+	cmp	r2, r7
+	beq	.L591
+	ldr	r2, .L596+56
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbnz	r3, .L592
+	add	r8, r8, #1
+	mov	r0, r7
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+.L591:
+	adds	r4, r4, #1
+	b	.L586
+.L589:
+	ldr	r2, .L596+56
+	movw	r1, #65535
+	ldr	r2, [r2]
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	b	.L590
+.L592:
+	adds	r5, r5, #1
+	mov	r0, r7
+	uxth	r5, r5
+	bl	INSERT_DATA_LIST
+	b	.L591
+.L593:
+	ldr	r2, [sp, #4]
+	strh	r8, [fp]	@ movhi
+	strh	r5, [r2]	@ movhi
+	add	r5, r5, r8
+	cmp	r5, r3
+	ble	.L595
+	movw	r2, #2170
+	ldr	r1, .L596+60
+	ldr	r0, .L596+64
+	bl	printf
+.L595:
 	movs	r0, #0
-	b	.L550
-.L655:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L597:
 	.align	2
-.L654:
-	.word	.LANCHOR121
-	.word	.LANCHOR37+56
-	.word	.LANCHOR129
-	.word	.LANCHOR138
-	.word	.LC85
-	.word	.LANCHOR130
-	.word	.LANCHOR134
-	.word	.LANCHOR135
-	.word	.LANCHOR55
-	.word	.LANCHOR136
+.L596:
+	.word	.LANCHOR6
 	.word	.LANCHOR40
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR42
+	.word	.LANCHOR146
+	.word	.LC1
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.align	1
+	.global	FtlGcPageVarInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L599
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	ldr	r4, .L599+4
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L599+8
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4]
+	ldr	r3, .L599+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L599+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L600:
+	.align	2
+.L599:
+	.word	.LANCHOR96
+	.word	.LANCHOR21
+	.word	.LANCHOR97
 	.word	.LANCHOR95
-	.word	.LANCHOR115
-	.word	.LANCHOR113
-	.word	.LANCHOR90
-	.word	.LANCHOR108
-	.word	.LANCHOR114
-	.word	.LANCHOR92
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR36
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.word	.LANCHOR133
-	.word	.LANCHOR123
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.word	.LANCHOR98
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
-	.global	FtlBbt2Bitmap
+	.global	FlashGetBadBlockList
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L662
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r5, r0
-	ldr	r7, .L662+4
-	mov	r6, r1
-	subs	r4, r5, #2
-	addw	r5, r5, #1022
-	ldrh	r2, [r3]
-	movs	r1, #0
-	ldr	r8, .L662+12
-	mov	r0, r6
-	lsls	r2, r2, #2
+	push	{r3, r4, r5, lr}
+	mov	r2, #256
+	mov	r5, r1
+	movs	r1, #255
+	mov	r4, r0
 	bl	ftl_memset
-.L659:
-	ldrh	r3, [r4, #2]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L656
-	ldrh	r2, [r7]
-	cmp	r2, r3
-	bhi	.L658
-	movs	r2, #74
-	mov	r1, r8
-	ldr	r0, .L662+8
-	bl	printf
-.L658:
-	ldrh	r3, [r4, #2]!
-	movs	r2, #1
-	cmp	r5, r4
-	lsr	r1, r3, #5
-	and	r3, r3, #31
-	lsl	r3, r2, r3
-	ldr	r2, [r6, r1, lsl #2]
-	orr	r2, r2, r3
-	str	r2, [r6, r1, lsl #2]
-	bne	.L659
-.L656:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L663:
+	ldr	r3, .L608
+	mov	r1, r5
+	mov	r0, r4
+	ldr	r3, [r3]
+	blx	r3
+	uxth	r0, r0
+	cmp	r0, #50
+	bls	.L602
+	mov	r2, #256
+	movs	r1, #255
+	mov	r0, r4
+	bl	ftl_memset
+	movs	r0, #0
+.L602:
+	ldr	r3, .L608+4
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L607
+	add	r1, r4, r0, lsl #1
+	mov	r3, r4
+.L604:
+	cmp	r3, r1
+	bne	.L605
+.L607:
+	pop	{r3, r4, r5, pc}
+.L605:
+	ldrh	r2, [r3]
+	lsrs	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	b	.L604
+.L609:
 	.align	2
-.L662:
-	.word	.LANCHOR137
-	.word	.LANCHOR17
-	.word	.LC1
-	.word	.LANCHOR139
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
+.L608:
+	.word	.LANCHOR105
+	.word	.LANCHOR0
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	FtlBbtMemInit
+	.global	ftl_memcpy
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
+	.type	ftl_memcpy, %function
+ftl_memcpy:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L665
-	movw	r3, #65535
-	movs	r2, #16
-	movs	r1, #255
-	strh	r3, [r0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	ftl_memset
-.L666:
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r1
+	ldr	r3, .L638
+	mov	r4, r0
+	mov	r10, #0
+	ldrh	r2, [r3, #12]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+.L612:
+	cmp	r10, fp
+	bne	.L622
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L622:
+	ldr	r3, [r4, #8]
+	cbz	r3, .L613
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L614
+.L613:
+	movs	r2, #90
+	ldr	r1, .L638+4
+	ldr	r0, .L638+8
+	bl	printf
+.L614:
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r4, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r5, [r4, #8]
+	ldr	r8, .L638+20
+	ldr	r7, .L638+12
+	tst	r5, #63
+	ldr	r3, [r4, #12]
+	it	ne
+	ldrne	r5, [r8]
+	ldr	r1, [sp, #12]
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	mov	r2, r5
+	ldr	r6, [r7, #12]
+	blx	r6
+	ldr	r3, [sp, #4]
+	str	r0, [r4]
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L617
+	ldr	r0, [sp]
+	add	r2, r5, #2048
+	ldr	r3, [r4, #12]
+	ldr	r1, [sp, #12]
+	ldr	r7, [r7, #12]
+	adds	r3, r3, #8
+	add	r1, r1, r0
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	blx	r7
+	adds	r3, r0, #1
+	beq	.L618
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3, #12]
+	adds	r2, r2, #1
+	bne	.L619
+	ldr	r2, [r3, #8]
+	adds	r2, r2, #1
+	bne	.L619
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L619
+.L618:
+	mov	r3, #-1
+	str	r3, [r4]
+.L619:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L617
+	cmp	r0, #256
+	it	eq
+	streq	r0, [r4]
+.L617:
+	ldr	r3, [r8]
+	cmp	r5, r3
+	bne	.L621
+	ldr	r0, [r4, #8]
+	cmp	r5, r0
+	beq	.L621
+	ldr	r3, .L638+16
+	mov	r1, r5
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+.L621:
+	add	r10, r10, #1
+	adds	r4, r4, #20
+	b	.L612
+.L639:
 	.align	2
-.L665:
-	.word	.LANCHOR37
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+.L638:
+	.word	.LANCHOR0
+	.word	.LANCHOR147
+	.word	.LC1
+	.word	.LANCHOR105
+	.word	.LANCHOR12
+	.word	.LANCHOR120
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueInit
+	.global	FtlLoadFactoryBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L668
-	mov	r2, #2048
-	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	ftl_memset
-	mov	r0, r4
-	pop	{r4, pc}
-.L669:
-	.align	2
-.L668:
-	.word	.LANCHOR38
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.load_l2p_region,"ax",%progbits
-	.align	1
-	.global	load_l2p_region
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L676
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r5, r0
-	mov	r10, r1
-	ldrh	r2, [r3]
-	str	r3, [sp, #4]
-	cmp	r2, r0
-	bcs	.L671
-	mov	r2, #492
-	ldr	r1, .L676+4
-	ldr	r0, .L676+8
-	bl	printf
-.L671:
-	ldr	fp, .L676+40
-	movs	r4, #12
-	ldr	r7, .L676+12
-	ldr	r3, [fp]
-	ldr	r8, [r3, r5, lsl #2]
-	cmp	r8, #0
-	bne	.L672
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	movs	r1, #255
-	adds	r0, r2, r4
-	ldr	r2, .L676+16
-	ldr	r0, [r0, #8]
-	ldrh	r2, [r2]
-	bl	ftl_memset
-	ldr	r2, [r7]
-	adds	r1, r2, r4
-	strh	r5, [r2, r4]	@ movhi
-	str	r8, [r1, #4]
-.L673:
+	ldr	r3, .L650
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r5, .L650+4
+	ldr	r3, [r3]
+	ldr	r7, .L650+8
+	ldr	r10, .L650+20
+	str	r3, [r5, #8]
+	ldr	r3, .L650+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L641:
+	ldr	r3, .L650+16
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L646
 	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L672:
-	mul	r4, r4, r10
-	ldr	r2, [r7]
-	ldr	r6, .L676+20
-	add	r2, r2, r4
-	mov	r0, r6
-	ldr	r2, [r2, #8]
-	str	r8, [r6, #4]
-	str	r2, [r6, #8]
-	ldr	r2, .L676+24
-	ldr	r2, [r2]
-	str	r2, [r6, #12]
+.L646:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L650+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L642:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L644
+	mla	r3, r6, r3, r4
 	movs	r2, #1
 	mov	r1, r2
+	mov	r0, fp
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
 	bl	FlashReadPages
-	ldr	r10, [r6, #12]
-	ldrh	r2, [r10, #8]
-	cmp	r2, r5
-	beq	.L674
-	mov	r2, r8
-	mov	r1, r5
-	ldr	r0, .L676+28
-	bl	printf
-	movs	r3, #4
-	ldr	r1, [r6, #12]
-	mov	r2, r3
-	ldr	r0, .L676+32
-	bl	rknand_print_hex
-	ldr	r3, [sp, #4]
-	movs	r2, #4
-	ldr	r1, [fp]
-	ldr	r0, .L676+36
-	ldrh	r3, [r3]
-	bl	rknand_print_hex
-.L674:
-	ldrh	r3, [r10, #8]
-	cmp	r3, r5
-	beq	.L675
-	movw	r2, #513
-	ldr	r1, .L676+4
-	ldr	r0, .L676+8
-	bl	printf
-.L675:
-	ldr	r3, [r7]
-	movs	r1, #0
-	adds	r2, r3, r4
-	str	r1, [r2, #4]
-	strh	r5, [r3, r4]	@ movhi
-	b	.L673
-.L677:
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L643
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L643
+	strh	r4, [r7]	@ movhi
+.L644:
+	adds	r6, r6, #1
+	b	.L641
+.L643:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L642
+.L651:
 	.align	2
-.L676:
-	.word	.LANCHOR32
-	.word	.LANCHOR140
-	.word	.LC1
-	.word	.LANCHOR55
-	.word	.LANCHOR23
-	.word	.LANCHOR106
-	.word	.LANCHOR108
-	.word	.LC86
-	.word	.LC87
-	.word	.LC88
-	.word	.LANCHOR134
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+.L650:
+	.word	.LANCHOR115
+	.word	.LANCHOR148
+	.word	.LANCHOR37+10
+	.word	.LANCHOR123
+	.word	.LANCHOR10
+	.word	.LANCHOR17
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	ftl_free_no_use_map_blk
+	.global	FtlGetLastWrittenPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #20]
-	movs	r1, #0
-	ldr	r10, [r0, #12]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #24]
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L664
+	sub	sp, sp, #88
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L664+4
+	mov	r6, r1
+	add	r0, sp, #4
+	movs	r1, #1
+	ldrh	r5, [r3]
+	ldr	r3, .L664+8
+	subs	r5, r5, #1
+	ldr	r3, [r3]
+	sxth	r5, r5
+	str	r3, [sp, #12]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L655
+	mov	r8, #0
+.L656:
+	cmp	r8, r5
+	ble	.L659
+.L655:
 	mov	r0, r5
-	bl	ftl_memset
-	movs	r3, #0
-.L679:
-	ldrh	r1, [r4, #6]
-	uxth	r2, r3
-	cmp	r1, r2
-	bhi	.L683
-	ldrh	r3, [r5]
-	movs	r6, #0
-	ldr	r2, .L692
-	mov	fp, r6
-.L684:
-	ldrh	r0, [r4, #10]
-	uxth	r1, r6
-	cmp	r0, r1
-	bhi	.L688
-	mov	r0, fp
-	add	sp, sp, #8
+	add	sp, sp, #88
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L683:
-	uxth	r2, r3
-	ldr	r1, [r6, r2, lsl #2]
-	movs	r2, #0
-	ubfx	r1, r1, #10, #16
-.L680:
-	ldrh	r7, [r4, #10]
-	uxth	r0, r2
-	cmp	r7, r0
-	bhi	.L682
-	adds	r3, r3, #1
-	b	.L679
-.L682:
-	uxth	r0, r2
-	adds	r2, r2, #1
-	ldrh	r7, [r10, r0, lsl #1]
-	cmp	r7, r1
-	ittt	eq
-	ldrheq	r7, [r5, r0, lsl #1]
-	addeq	r7, r7, #1
-	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L680
-.L688:
-	ldrh	r0, [r4]
-	uxth	r7, r6
-	cmp	r0, r1
-	bne	.L685
-	ldrh	r0, [r2]
-	ldrh	ip, [r4, #2]
-	cmp	ip, r0
-	it	cc
-	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L685:
-	ldrh	r8, [r5, r7, lsl #1]
-	cmp	r3, r8
-	itt	hi
-	movhi	fp, r1
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L687
-	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L687
+	pop	{r4, r5, r6, r7, r8, pc}
+.L659:
+	add	r3, r8, r5
+	mov	r2, r6
+	add	r3, r3, r3, lsr #31
 	movs	r1, #1
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	bl	FtlFreeSysBlkQueueIn
-	strh	r8, [r10, r7, lsl #1]	@ movhi
-	ldr	r2, [sp, #4]
-	ldrh	r1, [r4, #8]
-	ldr	r3, [sp]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L687:
-	adds	r6, r6, #1
-	b	.L684
-.L693:
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L657
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	bne	.L657
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L657
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L656
+.L657:
+	adds	r4, r4, #1
+	sxth	r8, r4
+	b	.L656
+.L665:
 	.align	2
-.L692:
+.L664:
 	.word	.LANCHOR20
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.word	.LANCHOR19
+	.word	.LANCHOR121
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	FtlScanSysBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r2, #65535
-	ldrh	r3, [r0]
-	mov	r4, r0
-	ldr	r5, [r0, #12]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L747
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L747+4
+	ldr	r2, [r5]
+	ldr	r6, .L747+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L747+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L747+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L747+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L747+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L747+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L747+32
+	bl	ftl_memset
+	ldr	r3, .L747+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L667:
+	ldr	r3, .L747+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L695
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L696
-	movw	r2, #641
-	ldr	r1, .L704
-	ldr	r0, .L704+4
-	bl	printf
-.L696:
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	movs	r3, #0
-	strh	r0, [r5]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [r4]	@ movhi
-	ldr	r3, [r4, #28]
+	bls	.L708
+	ldr	r3, .L747+44
+	movs	r5, #0
+	ldr	r1, .L747+48
+	mov	fp, r5
+	movs	r7, #20
+	ldrh	r8, [r3]
+	ldr	r3, .L747+52
+	ldr	r2, [r1]
+	ldr	r1, .L747+56
+	ldr	r6, [r3]
+	ldr	r3, .L747+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L747+64
+	b	.L709
+.L669:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L668
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L668:
+	adds	r5, r5, #1
+.L709:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L669
+	cmp	fp, #0
+	bne	.L670
+.L707:
+	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	str	r3, [r4, #28]
-.L697:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L695:
-	ldrh	r5, [r5, r3, lsl #1]
-	movs	r1, #255
-	ldrh	r3, [r0, #2]
-	ldr	r2, .L704+8
-	ldr	r7, .L704+12
-	ldr	r6, [r0, #24]
-	orr	r3, r3, r5, lsl #10
-	ldr	r0, [r7]
-	str	r3, [r2, #4]
-	ldr	r3, .L704+16
-	str	r0, [r2, #8]
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L667
+.L670:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L671:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L707
+	ldr	r3, .L747+52
+	mov	r8, #20
+	mul	r8, r8, r7
 	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r5, [r3, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r3, .L704+20
-	ldrh	r2, [r3]
-	lsls	r2, r2, #3
-	bl	ftl_memset
-	ldrh	ip, [r4, #6]
-	movs	r3, #0
-	ldr	r1, [r7]
-	mov	r2, r3
-.L698:
-	uxth	r0, r3
-	cmp	ip, r0
-	bhi	.L700
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
+	adds	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L674
+	mov	r10, #16
+.L676:
+	ldr	r3, .L747+52
 	movs	r2, #1
-	movs	r3, #0
 	mov	r1, r2
-	ldr	r0, .L704+8
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	mov	r0, r4
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	bl	ftl_map_blk_gc
-	b	.L697
-.L700:
-	ldr	r0, [r6, r3, lsl #2]
-	cmp	r5, r0, lsr #10
-	bne	.L699
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r7, r1, r2, lsl #3
-	ldr	r0, [r6, r3, lsl #2]
-	str	r0, [r7, #4]
-.L699:
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
 	adds	r3, r3, #1
-	b	.L698
-.L705:
-	.align	2
-.L704:
-	.word	.LANCHOR141
-	.word	.LC1
-	.word	.LANCHOR106
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR20
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
-	.align	1
-	.global	FtlMapWritePage
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r8, .L725+28
-	mov	r7, r1
-	movs	r6, #0
-	str	r2, [sp, #4]
-	mov	fp, r8
-.L707:
-	ldr	r2, .L725
-	ldr	r3, [r2]
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	ldr	r3, .L747+52
+	ldr	r3, [r3]
+	bne	.L673
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L747+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	bne	.L674
+.L675:
+	movs	r1, #1
+	b	.L746
+.L673:
+	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	str	r3, [r2]
-	ldrh	r3, [r8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
+	bne	.L674
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L676
+	b	.L675
+.L674:
+	ldr	r3, .L747+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L677
+	cmp	r2, r3
+	bhi	.L678
+.L677:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L747+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L678:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L680
+	bhi	.L681
+	movw	r3, #61574
 	cmp	r2, r3
-	bge	.L708
-	ldrh	r2, [r4]
-	movw	r3, #65535
+	beq	.L682
+.L679:
+	adds	r7, r7, #1
+	b	.L671
+.L681:
+	movw	r3, #61634
 	cmp	r2, r3
-	bne	.L709
-.L708:
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.L709:
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L710
-	movw	r2, #699
-	ldr	r1, .L725+4
-	ldr	r0, .L725+8
-	bl	printf
-.L710:
-	ldrh	r2, [r4]
-	ldrh	r3, [r4, #10]
+	beq	.L683
+	movw	r3, #65535
 	cmp	r2, r3
-	bcc	.L711
-	mov	r2, #700
-	ldr	r1, .L725+4
-	ldr	r0, .L725+8
-	bl	printf
-.L711:
-	ldrh	r2, [r4]
+	bne	.L679
 	movs	r1, #0
-	ldr	r3, [r4, #12]
-	ldr	r5, .L725+12
-	ldrh	r10, [r3, r2, lsl #1]
-	ldrh	r2, [r4, #2]
-	ldr	r3, [sp, #4]
-	orr	r2, r2, r10, lsl #10
-	str	r3, [r5, #8]
-	str	r2, [r5, #4]
-	ldr	r2, .L725+16
-	ldr	r0, [r2]
-	movs	r2, #16
-	str	r0, [r5, #12]
-	bl	ftl_memset
-	ldr	r2, [r5, #12]
-	movs	r3, #1
-	ldr	r1, [r4, #28]
+.L746:
 	mov	r0, r5
-	strh	r7, [r2, #8]	@ movhi
-	str	r1, [r2, #4]
-	ldrh	r1, [r4, #4]
-	strh	r10, [r2, #2]	@ movhi
-	strh	r1, [r2]	@ movhi
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r3, [r5]
-	adds	r2, r2, #1
-	uxth	r2, r2
-	adds	r3, r3, #1
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L712
-	ldr	r1, [r5, #4]
-	adds	r6, r6, #1
-	ldr	r0, .L725+20
-	uxth	r6, r6
-	bl	printf
-	ldrh	r2, [r4, #2]
-	cmp	r2, #2
-	ittt	ls
-	ldrhls	r2, [fp]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
-	cmp	r6, #3
-	bls	.L714
-	mov	r2, r6
-	ldr	r1, [r5, #4]
-	ldr	r0, .L725+24
+	bl	FtlFreeSysBlkQueueIn
+	b	.L679
+.L683:
+	ldr	r3, .L747+8
+	ldrh	r2, [r3]
+	ldr	r3, .L747
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L685
+	movw	r2, #1222
+	ldr	r1, .L747+72
+	ldr	r0, .L747+76
 	bl	printf
-.L715:
-	b	.L715
-.L714:
-	ldr	r3, [r4, #32]
+.L685:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L747+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L686:
+	cmp	r3, r10
+	bgt	.L692
+	cmp	r3, #0
+	bge	.L724
+	b	.L679
+.L692:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L687
+	ldr	r2, [ip]
+	cbnz	r2, .L688
+	cmp	r1, r0
+	ittt	ne
+	ldrne	r2, .L747+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L688:
+	ldr	r2, .L747+20
+	uxth	r10, r3
+	ldr	r0, [r2]
+	movs	r2, #0
+.L689:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L690
+	ldr	r2, [r6, #4]
 	cmp	r3, #0
-	beq	.L707
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L679
+	ldr	r2, .L747+8
+	ldrh	r0, [r2]
+	ldr	r2, .L747
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L679
 .L724:
-	b	.L724
-.L712:
-	cmp	r2, #1
-	beq	.L707
-	ldr	r2, [r5, #4]
-	movs	r0, #0
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r7, lsl #2]
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L726:
+	ldr	r2, .L747+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L747+20
+.L744:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L679
+.L690:
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L689
+.L687:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L686
+.L748:
 	.align	2
-.L725:
-	.word	.LANCHOR66
-	.word	.LANCHOR142
+.L747:
+	.word	.LANCHOR30
+	.word	.LANCHOR35
+	.word	.LANCHOR141
+	.word	.LANCHOR135
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR132
+	.word	.LANCHOR36
+	.word	.LANCHOR79
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.word	.LANCHOR3
+	.word	.LANCHOR92
+	.word	.LANCHOR112
+	.word	.LANCHOR24
+	.word	.LANCHOR91
+	.word	.LANCHOR13
+	.word	.LANCHOR70
+	.word	.LANCHOR149
 	.word	.LC1
-	.word	.LANCHOR106
-	.word	.LANCHOR108
-	.word	.LC89
-	.word	.LC90
-	.word	.LANCHOR20
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_gc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #12]
-	str	r3, [sp]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
-	ldrh	r2, [r4, #8]
-	subs	r3, r3, #4
-	cmp	r2, r3
-	blt	.L728
-	uxth	r0, r0
-	ldrh	r7, [r5, r0, lsl #1]
-	cbz	r7, .L728
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L728
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L739
-	ldrh	r3, [r3]
+.L682:
+	ldr	r8, .L749+12
+	ldr	r10, .L749+20
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcc	.L729
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L729:
-	ldr	r5, .L739+4
-	movs	r6, #0
-	ldr	fp, .L739+20
-.L730:
-	ldrh	r3, [r4, #6]
-	uxth	r10, r6
+	bls	.L695
+	movw	r2, #1263
+	ldr	r1, .L749
+	ldr	r0, .L749+4
+	bl	printf
+.L695:
+	ldr	r2, .L749+8
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L696:
 	cmp	r3, r10
-	bhi	.L734
+	ble	.L701
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L697
+	ldr	r2, [r0]
+	cbnz	r2, .L698
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L749+12
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L698:
+	ldr	r2, .L749+16
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L699:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L700
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L701:
+	cmp	r3, #0
+	blt	.L679
+	ldr	r2, .L749+20
+	ldr	ip, .L749+12
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L679
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L749+16
+	b	.L744
+.L700:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L699
+.L697:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L696
+.L680:
+	ldr	r8, .L749+40
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L703
+.L745:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L679
+.L703:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L704
 	movs	r1, #1
-	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-	movs	r3, #0
-	str	r3, [r4, #32]
-.L728:
-	ldr	r3, .L739
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+.L704:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcc	.L735
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L735:
+	bcs	.L705
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L745
+.L705:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L679
+.L708:
+	ldr	r3, .L749+24
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L710
+.L713:
+	ldr	r3, .L749+16
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L711
+.L712:
+	ldr	r3, .L749+28
+	ldrh	r2, [r3]
+	ldr	r3, .L749+32
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L743
+	movw	r2, #1388
+	ldr	r1, .L749
+	ldr	r0, .L749+4
+	bl	printf
+.L743:
 	movs	r0, #0
-	add	sp, sp, #8
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L734:
-	ldr	r3, [sp]
-	uxth	r8, r6
-	ldr	r2, [r3, r8, lsl #2]
-	cmp	r7, r2, lsr #10
-	bne	.L731
-	ldr	r3, [fp]
-	str	r2, [r5, #4]
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L739+4
-	str	r3, [r5, #8]
-	ldr	r3, .L739+8
-	ldr	r3, [r3]
-	str	r3, [r5, #12]
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r10
-	beq	.L732
-	movw	r2, #613
-	ldr	r1, .L739+12
-	ldr	r0, .L739+16
-	bl	printf
-.L732:
-	ldr	r3, [r5]
+.L710:
+	ldr	r1, .L749+28
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L713
+	ldr	r5, .L749+32
+	ldr	r0, [r5]
+.L714:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L713
+	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
-	bne	.L733
-	ldr	r2, [sp]
-	movs	r3, #0
-	str	r3, [r2, r8, lsl #2]
-.L731:
-	adds	r6, r6, #1
-	b	.L730
-.L733:
-	ldr	r2, [r5, #8]
-	mov	r1, r8
-	mov	r0, r4
-	bl	FtlMapWritePage
-	b	.L731
-.L740:
+	cmp	r4, #0
+	beq	.L714
+	ldr	r3, .L749+36
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L715:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L713
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L715
+.L711:
+	ldr	r3, .L749+12
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L712
+	ldr	r5, .L749+20
+	ldrh	r1, [r5]
+.L720:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L712
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L720
+	ldr	r2, .L749+8
+	movs	r0, #0
+	ldr	r2, [r2]
+.L721:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L712
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L721
+.L750:
 	.align	2
-.L739:
-	.word	.LANCHOR20
-	.word	.LANCHOR106
-	.word	.LANCHOR108
-	.word	.LANCHOR143
+.L749:
+	.word	.LANCHOR149
 	.word	.LC1
-	.word	.LANCHOR123
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.flush_l2p_region,"ax",%progbits
+	.word	.LANCHOR132
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR141
+	.word	.LANCHOR30
+	.word	.LANCHOR135
+	.word	.LANCHOR79
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	flush_l2p_region
+	.global	FtlLoadBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	flush_l2p_region, %function
-flush_l2p_region:
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #12
-	ldr	r5, .L742
-	muls	r4, r0, r4
-	ldr	r0, .L742+4
-	ldr	r3, [r5]
-	adds	r2, r3, r4
-	ldrh	r1, [r3, r4]
-	ldr	r2, [r2, #8]
-	bl	FtlMapWritePage
-	ldr	r3, [r5]
-	movs	r0, #0
-	add	r4, r4, r3
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r8, .L780+40
+	ldr	r4, .L780
+	ldr	r3, [r8]
+	ldr	r7, .L780+4
+	mov	r10, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L780+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L752:
+	ldrh	r3, [r7]
+	subs	r3, r3, #15
+	cmp	r3, r5
+	bgt	.L755
+	lsls	r3, r5, #10
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L753
 	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	adds	r3, r3, #1
 	str	r3, [r4, #4]
-	pop	{r3, r4, r5, pc}
-.L743:
-	.align	2
-.L742:
-	.word	.LANCHOR55
-	.word	.LANCHOR144
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",%progbits
-	.align	1
-	.global	log2phys
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L758
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r1
-	mov	r10, r2
-	ldrh	r4, [r3]
-	adds	r3, r4, #7
-	movs	r4, #1
-	lsr	r8, r0, r3
-	lsls	r4, r4, r3
-	ldr	r3, .L758+4
-	subs	r4, r4, #1
-	uxth	r8, r8
-	ands	r4, r4, r0
-	ldr	r3, [r3]
-	uxth	r4, r4
-	cmp	r0, r3
-	bcc	.L745
-	mov	r2, #808
-	ldr	r1, .L758+8
-	ldr	r0, .L758+12
-	bl	printf
-.L745:
-	ldr	r6, .L758+16
-	mov	fp, #12
-	ldr	r3, .L758+20
-	ldr	r1, [r6]
-	ldrh	r2, [r3]
-	movs	r3, #0
-.L746:
-	uxth	r5, r3
-	cmp	r5, r2
-	bcc	.L751
-	bl	select_l2p_ram_region
-	mul	fp, fp, r0
-	ldr	r3, [r6]
-	mov	r5, r0
-	ldrh	r1, [r3, fp]
-	add	r2, r3, fp
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L752
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L752
-	bl	flush_l2p_region
-.L752:
-	mov	r1, r5
-	mov	r0, r8
-	bl	load_l2p_region
-	b	.L747
-.L751:
+	bl	FlashReadPages
+.L753:
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	mla	r0, fp, r3, r1
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r8
-	bne	.L746
-.L747:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r3, r3, r5, r2
-	cmp	r10, #0
-	bne	.L748
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r4, lsl #2]
-	str	r3, [r7]
-.L749:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r5, r3, r5, r2
-	ldr	r3, [r5, #4]
-	adds	r2, r3, #1
-	beq	.L755
+	beq	.L754
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L754
+	ldr	r3, .L780+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L755:
+	ldr	r5, .L780+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L769
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L759
+	lsls	r3, r3, #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L780
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [r5, #4]
-.L755:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L748:
-	ldr	r1, [r7]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r4, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L758+24
-	strh	r8, [r3]	@ movhi
-	b	.L749
+	beq	.L759
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L759
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L759
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
 .L759:
+	ldr	r10, .L780
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L761:
+	cmp	r7, #0
+	bge	.L764
+	movs	r2, #253
+	ldr	r1, .L780+16
+	ldr	r0, .L780+20
+	bl	printf
+.L763:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L766
+	ldr	r3, .L780+24
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L766
+	ldr	r3, .L780+28
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L766
+	cmp	r0, r3
+	bcs	.L766
+	bl	FtlSysBlkNumInit
+.L766:
+	ldr	r6, .L780+32
+	movs	r5, #0
+	ldr	r7, .L780+36
+	ldr	r8, .L780+44
+.L767:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L768
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L754:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L752
+.L764:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L762
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L763
+.L762:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L761
+.L768:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L767
+.L769:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L781:
 	.align	2
-.L758:
-	.word	.LANCHOR22
-	.word	.LANCHOR61
-	.word	.LANCHOR145
+.L780:
+	.word	.LANCHOR148
+	.word	.LANCHOR17
+	.word	.LANCHOR123
+	.word	.LANCHOR37
+	.word	.LANCHOR150
 	.word	.LC1
-	.word	.LANCHOR55
-	.word	.LANCHOR33
-	.word	.LANCHOR56
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.word	.LANCHOR2
+	.word	.LANCHOR6
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR115
+	.word	.LANCHOR137
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
-	.global	FtlReUsePrevPpa
+	.global	FtlLoadSysInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L770
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r2, [r5]
-	mov	r7, r0
-	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L761
-	ldr	r2, .L770+4
-	ldr	r4, [r2]
-	cmp	r4, #0
-	beq	.L762
-	ldr	r2, .L770+8
-	movw	lr, #65535
-	ldr	ip, .L770+24
-	ldr	r0, .L770+12
-	ldr	r2, [r2]
-	ldrh	r1, [r0]
-	mov	r8, r0
-	subs	r4, r4, r2
-	asrs	r4, r4, #1
-	mul	r4, ip, r4
-	mov	ip, #6
-	uxth	r4, r4
-.L763:
-	uxth	r0, r3
-	cmp	r1, r0
-	bls	.L762
-	cmp	r4, r7
-	bne	.L764
-	mov	r1, r4
-	ldr	r0, .L770+4
-	bl	List_remove_node
-	ldrh	r3, [r8]
-	cbnz	r3, .L765
-	mov	r2, #1688
-	ldr	r1, .L770+16
-	ldr	r0, .L770+20
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r8, .L803+136
+	ldr	r5, .L803
+	ldr	r3, [r8]
+	ldr	r4, .L803+4
+	ldr	r10, .L803+140
+	ldrh	r2, [r5]
+	ldr	r7, .L803+8
+	str	r3, [r4, #8]
+	ldr	r6, .L803+12
+	ldr	r3, [r10]
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	str	r3, [r4, #12]
+	bl	ftl_memset
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r7, [sp]
+	cmp	r0, r3
+	bne	.L783
+.L791:
+	mov	r0, #-1
+.L782:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L783:
+	movs	r1, #1
+	mov	fp, r4
+	bl	FtlGetLastWrittenPage
+	ldr	r3, .L803+16
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r6, #2]	@ movhi
+.L785:
+	cmp	r7, #0
+	bge	.L788
+	mov	r2, #1448
+	ldr	r1, .L803+20
+	ldr	r0, .L803+24
 	bl	printf
-.L765:
-	ldrh	r3, [r8]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r7, lsl #1]
-.L761:
-	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L762
-.L764:
-	mul	r4, ip, r4
-	adds	r3, r3, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, lr
-	bne	.L763
-.L762:
+.L787:
+	ldr	r2, .L803+28
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L790
+	movw	r2, #1450
+	ldr	r1, .L803+20
+	ldr	r0, .L803+24
+	bl	printf
+.L790:
+	ldr	r7, .L803+32
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	mov	r0, r7
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r1, [r4, #8]
+	ldr	r3, [sp]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldrh	r1, [r5]
+	ldr	r3, [r4, #8]
+	mov	r4, r7
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L803+36
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r2, [r7]
+	ldr	r3, .L803+16
+	cmp	r2, r3
+	bne	.L791
+	ldr	r3, .L803+40
+	ldrb	r2, [r7, #10]	@ zero_extendqisi2
+	ldrh	r5, [r7, #8]
+	ldrh	r3, [r3]
+	strh	r5, [r6, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L791
+	ldr	r3, .L803+44
+	ldr	r2, .L803+48
+	str	r5, [r3]
+	ldr	r3, .L803+52
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	ldr	r2, .L803+56
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L803+60
+	str	r3, [r2]
+	ldr	r3, .L803+64
+	ldr	r6, [r3]
+	ldr	r3, .L803+68
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L803+72
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L803+76
+	cmp	r5, r6
+	strh	r0, [r3]	@ movhi
+	bls	.L792
+	mov	r2, #1472
+	ldr	r1, .L803+20
+	ldr	r0, .L803+24
+	bl	printf
+.L792:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L803+80
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L803+84
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L803+88
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	movs	r3, #0
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L803+92
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L803+96
+	str	r3, [r5]
+	ldr	r5, .L803+100
+	str	r3, [r5]
+	ldr	r5, .L803+104
+	str	r3, [r5]
+	ldr	r5, .L803+108
+	str	r3, [r5]
+	ldr	r5, .L803+112
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L803+116
+	str	r3, [r5]
+	ldr	r5, .L803+120
+	str	r3, [r5]
+	ldr	r5, .L803+124
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L803+128
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L803+132
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L795
+	ldr	r0, .L803+80
+	bl	make_superblock
+.L795:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L796
+	ldr	r0, .L803+88
+	bl	make_superblock
+.L796:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L797
+	ldr	r0, .L803+92
+	bl	make_superblock
+.L797:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L798
+	ldr	r0, .L803+84
+	bl	make_superblock
+.L798:
+	movs	r0, #0
+	b	.L782
+.L788:
+	ldrh	r2, [r6]
+	mov	r0, fp
+	str	r3, [sp, #4]
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
 	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r6
-	bl	log2phys
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L771:
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L786
+	ldr	r2, [r8]
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L786
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L787
+.L786:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L785
+.L804:
 	.align	2
-.L770:
+.L803:
+	.word	.LANCHOR5
+	.word	.LANCHOR148
 	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR40
-	.word	.LANCHOR48
-	.word	.LANCHOR146
+	.word	.LANCHOR79
+	.word	1179929683
+	.word	.LANCHOR151
 	.word	.LC1
-	.word	-1431655765
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.word	.LANCHOR23
+	.word	.LANCHOR39
+	.word	.LANCHOR1
+	.word	.LANCHOR10
+	.word	.LANCHOR152
+	.word	.LANCHOR61
+	.word	.LANCHOR19
+	.word	.LANCHOR12
+	.word	.LANCHOR34
+	.word	.LANCHOR7
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR78
+	.word	.LANCHOR51
+	.word	.LANCHOR80
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR67
+	.word	.LANCHOR64
+	.word	.LANCHOR62
+	.word	.LANCHOR66
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR76
+	.word	.LANCHOR65
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	ftl_scan_all_data
+	.global	FlashProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
+	str	r3, [sp, #12]
+	mov	r10, r1
+	mov	r4, r0
+	mov	r5, r0
+	ldr	r3, .L843
+	mov	r8, #0
+	ldr	fp, .L843+48
+	str	r2, [sp, #8]
+	ldrh	r3, [r3, #12]
+	str	r3, [sp]
+	lsls	r3, r3, #3
+	str	r3, [sp, #4]
+.L806:
+	cmp	r8, r10
+	bne	.L818
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L836
+	ldr	r6, .L843+4
 	movs	r5, #0
-	ldr	r7, .L786
-	sub	sp, sp, #32
+.L820:
+	cmp	r8, r5
+	beq	.L836
+	ldr	r7, .L843+8
 	movs	r1, #0
-	ldr	r8, .L786+24
-	ldr	r0, .L786+4
-	bl	printf
-.L773:
+	ldr	r2, [r6]
+	add	r0, sp, #28
 	ldr	r3, [r7]
-	cmp	r5, r3
-	bcc	.L779
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L779:
-	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r5
-	bl	log2phys
-	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L774
-	ldr	r2, [sp, #28]
-	mov	r1, r5
-	mov	r0, r8
-	bl	printf
-.L774:
-	ldr	r3, [sp, #28]
-	adds	r2, r3, #1
-	beq	.L776
-	ldr	r4, .L786+8
-	movs	r2, #0
+	str	r1, [r2]
+	str	r1, [r3]
+	ldr	r1, [r4, #4]
+	str	r2, [sp, #36]
+	ldr	r2, [sp, #8]
+	str	r1, [sp, #32]
 	movs	r1, #1
-	str	r3, [r4, #4]
-	mov	r0, r4
-	ldr	r3, .L786+12
-	str	r5, [r4, #16]
-	str	r2, [r4]
-	ldr	r3, [r3]
-	str	r3, [r4, #8]
-	ldr	r3, .L786+16
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
+	str	r3, [sp, #40]
 	bl	FlashReadPages
-	ldr	r3, [r4]
-	cmp	r3, #256
-	beq	.L777
-	adds	r3, r3, #1
-	beq	.L777
-	ldr	r3, [r6, #8]
-	cmp	r5, r3
-	beq	.L776
-.L777:
-	ldr	r2, [r4, #8]
+	ldr	r10, [sp, #28]
+	cmp	r10, #-1
+	bne	.L821
+	ldr	r1, [r4, #4]
+	ldr	r0, .L843+12
+	bl	printf
+	str	r10, [r4]
+.L821:
 	ldr	r3, [r4, #12]
-	ldr	r0, .L786+20
-	ldr	r1, [r2, #4]
-	str	r1, [sp, #16]
-	mov	r1, r5
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #8]
-	ldr	r2, [r3, #8]
-	str	r2, [sp, #4]
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	ldr	r2, [r4, #4]
+	cbz	r3, .L822
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L822
+	ldr	r1, [r4, #4]
+	ldr	r0, .L843+16
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L822:
+	ldr	r3, [r4, #8]
+	cbz	r3, .L823
+	ldr	r2, [r3]
+	ldr	r3, [r6]
 	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L823
+	ldr	r1, [r4, #4]
+	ldr	r0, .L843+20
 	bl	printf
-.L776:
+	mov	r3, #-1
+	str	r3, [r4]
+.L823:
 	adds	r5, r5, #1
-	b	.L773
-.L787:
+	adds	r4, r4, #20
+	b	.L820
+.L818:
+	ldr	r3, [r5, #8]
+	cbz	r3, .L807
+	ldr	r3, [r5, #12]
+	cbnz	r3, .L808
+.L807:
+	movs	r2, #130
+	ldr	r1, .L843+24
+	ldr	r0, .L843+28
+	bl	printf
+.L808:
+	add	r2, sp, #20
+	add	r1, sp, #24
+	ldr	r0, [r5, #4]
+	bl	l2p_addr_tran.isra.0
+	ldr	r6, [sp, #20]
+	cbnz	r6, .L809
+	ldr	r3, [sp, #24]
+	ldr	r2, [sp, #4]
+	cmp	r2, r3
+	bls	.L809
+	ldr	r5, .L843+24
+	ldr	r7, .L843+32
+	b	.L842
+.L811:
+	mov	r3, #-1
+	ldr	r2, [r4, #-16]
+	str	r3, [r4, #-20]
+	mov	r1, r5
+	mov	r0, r7
+	adds	r6, r6, #1
+	bl	printf
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r4, #-12]
+	ldr	r0, .L843+36
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4, #-8]
+	mov	r2, r3
+	ldr	r0, .L843+40
+	bl	rknand_print_hex
+.L842:
+	cmp	r6, r10
+	add	r4, r4, #20
+	bne	.L811
+.L836:
+	movs	r0, #0
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L809:
+	ldr	r1, [r5, #8]
+	lsls	r3, r1, #26
+	beq	.L825
+	ldr	r3, .L843+4
+	ldr	r6, [r3]
+	cmp	r1, r6
+	beq	.L812
+	ldr	r3, .L843+44
+	mov	r0, r6
+	ldrh	r2, [r3]
+	lsls	r2, r2, #9
+	bl	ftl_memcpy
+.L812:
+	ldr	r3, [r5, #12]
+	mov	r2, r6
+	ldr	r1, [sp, #24]
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	ldr	r7, [fp, #8]
+	blx	r7
+	cbnz	r0, .L813
+	str	r0, [r5]
+.L814:
+	ldr	r3, .L843
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L816
+	ldr	r0, [sp]
+	add	r2, r6, #2048
+	ldr	r3, [r5, #12]
+	ldr	r1, [sp, #24]
+	ldr	r6, [fp, #8]
+	adds	r3, r3, #8
+	add	r1, r1, r0
+	ldrb	r0, [sp, #20]	@ zero_extendqisi2
+	blx	r6
+	cbz	r0, .L816
+	mov	r3, #-1
+	str	r3, [r5]
+.L816:
+	add	r8, r8, #1
+	adds	r5, r5, #20
+	b	.L806
+.L825:
+	mov	r6, r1
+	b	.L812
+.L813:
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L814
+.L844:
 	.align	2
-.L786:
-	.word	.LANCHOR61
-	.word	.LC91
-	.word	.LANCHOR106
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LC93
-	.word	.LC92
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlReadRefresh,"ax",%progbits
+.L843:
+	.word	.LANCHOR0
+	.word	.LANCHOR120
+	.word	.LANCHOR122
+	.word	.LC85
+	.word	.LC86
+	.word	.LC87
+	.word	.LANCHOR153
+	.word	.LC1
+	.word	.LC79
+	.word	.LC80
+	.word	.LC81
+	.word	.LANCHOR12
+	.word	.LANCHOR105
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlReadRefresh
+	.global	FtlLowFormatEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	@ args = 0, pretend = 0, frame = 88
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L801
-	push	{r4, r5, r6, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	ldr	r0, [r3, #80]
-	cmp	r0, #0
-	beq	.L789
-	ldr	r6, .L801+4
-	ldr	r0, [r3, #84]
-	ldr	r1, [r6]
-	cmp	r0, r1
-	bcs	.L790
-	mov	r5, #2048
-.L795:
-	ldr	r0, [r4, #84]
-	ldr	r3, [r6]
-	cmp	r0, r3
-	bcs	.L792
-	movs	r2, #0
-	mov	r1, sp
-	bl	log2phys
-	ldr	r2, [sp]
-	ldr	r3, [r4, #84]
-	adds	r1, r2, #1
-	add	r3, r3, #1
-	str	r3, [r4, #84]
-	beq	.L793
-	str	r3, [sp, #20]
-	add	r0, sp, #88
-	ldr	r3, .L801+8
-	movs	r1, #1
-	str	r2, [sp, #8]
-	movs	r2, #0
-	str	r2, [r0, #-84]!
+	ldr	r3, .L888
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r7, .L888+4
+	mov	r8, #0
+	mov	r6, r1
+	mov	r5, r8
+	str	r0, [r3]
+	mov	r4, r8
+	ldr	r3, .L888+8
+	mov	fp, #20
+	ldr	r10, [r7]
+	str	r0, [sp, #4]
+	ldrh	r3, [r3]
 	str	r3, [sp, #12]
-	add	r3, sp, #24
+	ldr	r3, .L888+12
+	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	cmp	r3, #256
-	bne	.L792
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L792:
-	mov	r0, #-1
-.L788:
-	add	sp, sp, #88
-	@ sp needed
-	pop	{r4, r5, r6, pc}
-.L793:
-	subs	r5, r5, #1
-	bne	.L795
-	b	.L792
-.L790:
-	ldr	r2, .L801+12
-	movs	r0, #0
-	str	r0, [r3, #80]
-	str	r0, [r3, #84]
-	ldr	r2, [r2]
-	str	r2, [r3, #76]
-	b	.L788
-.L789:
-	ldr	r1, [r3, #76]
-	ldr	r3, .L801+12
-	ldr	r5, [r3]
-	add	r3, r5, #1048576
-	cmp	r1, r3
-	bhi	.L798
-	ldr	r3, .L801+16
-	ldr	r2, [r3]
-	mov	r3, #33554432
-	lsrs	r2, r2, #10
-	asrs	r3, r3, r2
-	add	r3, r3, r1
+	ldr	r3, .L888+16
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L888+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+.L846:
+	ldr	r3, [sp, #12]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L850
+	cmp	r5, #0
+	beq	.L845
+	mov	r0, r10
+	mov	r8, #0
+	mov	r10, #20
+	mov	r2, r5
+	movs	r1, #0
+	bl	FlashEraseBlocks
+.L853:
+	uxth	r3, r8
 	cmp	r5, r3
-	bhi	.L798
-	ldr	r3, .L801+20
-	ldrb	r3, [r3, #28]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L788
-.L798:
+	bhi	.L855
+	cmp	r6, #0
+	beq	.L871
+	ldr	r3, .L888+24
+	mov	r10, #1
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+.L856:
+	movs	r7, #0
+.L865:
+	ldr	r3, .L888+8
+	mov	r8, #0
+	mov	r5, r8
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L888+4
+	ldr	fp, [r3]
+	ldr	r3, .L888+28
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L888+12
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, .L888+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.L857:
+	ldr	r3, [sp, #16]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L860
+	cbz	r5, .L845
+	mov	r0, fp
+	ldr	fp, .L888+4
 	movs	r3, #1
-	movs	r0, #0
-	str	r3, [r4, #80]
-	str	r0, [r4, #84]
-	str	r5, [r4, #76]
-	b	.L788
-.L802:
+	mov	r2, r10
+	mov	r1, r5
+	mov	r8, #0
+	bl	FlashProgPages
+	movs	r3, #20
+.L862:
+	uxth	r2, r8
+	cmp	r5, r2
+	bhi	.L864
+	adds	r7, r7, #1
+	ldr	r2, [sp, #8]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L865
+	ldr	r8, .L888+4
+	movs	r7, #0
+	mov	fp, #20
+.L866:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L868
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L869
+	cbz	r6, .L845
+.L869:
+	ldr	r3, .L888+4
+	mov	r2, r5
+	mov	r1, r10
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L845:
+	mov	r0, r4
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L850:
+	mul	r2, fp, r8
+	movs	r3, #0
+	ldr	r1, [sp, #4]
+	str	r3, [r10, r2]
+	ldr	r3, .L888+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #8]
+	cbz	r6, .L847
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L848
+.L847:
+	ldr	r0, [sp, #8]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L849
+	ldr	r3, [sp, #8]
+	mla	r1, fp, r5, r10
+	lsls	r2, r3, #10
+	ldr	r3, [sp, #16]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #24]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L848:
+	add	r8, r8, #1
+	b	.L846
+.L849:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L848
+.L855:
+	mul	r3, r10, r8
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L854
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L854:
+	add	r8, r8, #1
+	b	.L853
+.L871:
+	movs	r3, #2
+	mov	r10, r6
+	str	r3, [sp, #8]
+	b	.L856
+.L860:
+	movs	r3, #20
+	ldr	r1, [sp, #4]
+	mul	r2, r3, r8
+	movs	r3, #0
+	str	r3, [fp, r2]
+	ldr	r3, .L888+32
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #12]
+	cbz	r6, .L858
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L859
+.L858:
+	ldr	r0, [sp, #12]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L859
+	movs	r3, #20
+	mla	r1, r3, r5, fp
+	ldr	r3, [sp, #12]
+	add	r2, r7, r3, lsl #10
+	ldr	r3, [sp, #20]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #28]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #24]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L859:
+	add	r8, r8, #1
+	b	.L857
+.L864:
+	mul	r2, r3, r8
+	ldr	r1, [fp]
+	adds	r0, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L863
+	ldr	r0, [r0, #4]
+	adds	r4, r4, #1
+	str	r3, [sp, #12]
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	ldr	r3, [sp, #12]
+.L863:
+	add	r8, r8, #1
+	b	.L862
+.L868:
+	cbz	r6, .L867
+	mul	r3, fp, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L867
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L867:
+	adds	r7, r7, #1
+	b	.L866
+.L889:
 	.align	2
-.L801:
-	.word	.LANCHOR81
-	.word	.LANCHOR61
-	.word	ftl_temp_buf
-	.word	.LANCHOR62
-	.word	.LANCHOR76
-	.word	.LANCHOR39
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+.L888:
+	.word	.LANCHOR111
+	.word	.LANCHOR106
+	.word	.LANCHOR3
+	.word	.LANCHOR119
+	.word	.LANCHOR124
+	.word	.LANCHOR24
+	.word	.LANCHOR20
+	.word	.LANCHOR118
+	.word	.LANCHOR13
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlMapBlkWriteDump_data
+	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #36]
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	cbz	r3, .L803
-	ldrh	r5, [r0, #6]
+	push	{r3, r4, r5, r6, r7, lr}
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	cmp	r3, r2
+	bne	.L891
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L892
+	movw	r2, #641
+	ldr	r1, .L900
+	ldr	r0, .L900+4
+	bl	printf
+.L892:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
 	movs	r3, #0
-	ldr	r2, [r0, #24]
-	str	r3, [r0, #36]
-	subs	r5, r5, #1
-	ldr	r3, .L807
-	ldr	r1, .L807+4
-	uxth	r5, r5
-	ldr	r4, .L807+8
-	ldr	r2, [r2, r5, lsl #2]
-	ldr	r0, [r3]
-	ldr	r1, [r1]
-	str	r2, [r4, #4]
-	str	r0, [r4, #8]
-	str	r1, [r4, #12]
-	cbz	r2, .L805
-	movs	r2, #1
-	mov	r0, r4
-	mov	r1, r2
-	bl	FlashReadPages
-.L806:
-	ldr	r2, [r4, #8]
-	mov	r1, r5
-	mov	r0, r6
-	pop	{r4, r5, r6, lr}
-	b	FtlMapWritePage
-.L805:
-	ldr	r3, .L807+12
+	strh	r0, [r5]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L893:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L891:
+	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L900+8
+	ldr	r7, .L900+12
+	ldr	r6, [r0, #24]
+	orr	r3, r3, r5, lsl #10
+	ldr	r0, [r7]
+	str	r3, [r2, #4]
+	ldr	r3, .L900+16
+	str	r0, [r2, #8]
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r5, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L900+20
 	ldrh	r2, [r3]
+	lsls	r2, r2, #3
 	bl	ftl_memset
-	b	.L806
-.L803:
-	pop	{r4, r5, r6, pc}
-.L808:
+	ldrh	ip, [r4, #6]
+	movs	r3, #0
+	ldr	r1, [r7]
+	mov	r2, r3
+.L894:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L896
+	movs	r2, #1
+	movs	r3, #0
+	mov	r1, r2
+	ldr	r0, .L900+8
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L893
+.L896:
+	ldr	r0, [r6, r3, lsl #2]
+	cmp	r5, r0, lsr #10
+	bne	.L895
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	r7, r1, r2, lsl #3
+	ldr	r0, [r6, r3, lsl #2]
+	str	r0, [r7, #4]
+.L895:
+	adds	r3, r3, #1
+	b	.L894
+.L901:
 	.align	2
-.L807:
+.L900:
+	.word	.LANCHOR154
+	.word	.LC1
+	.word	.LANCHOR148
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR20
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r8, .L926+28
+	mov	r7, r1
+	movs	r6, #0
+	str	r2, [sp, #4]
+	mov	fp, r8
+.L903:
+	ldr	r2, .L926
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	ldrh	r3, [r8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L904
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L905
+.L904:
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.L905:
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L906
+	movw	r2, #699
+	ldr	r1, .L926+4
+	ldr	r0, .L926+8
+	bl	printf
+.L906:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L907
+	mov	r2, #700
+	ldr	r1, .L926+4
+	ldr	r0, .L926+8
+	bl	printf
+.L907:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r5, .L926+12
+	ldrh	r10, [r3, r2, lsl #1]
+	ldrh	r2, [r4, #2]
+	ldr	r3, [sp, #4]
+	orr	r2, r2, r10, lsl #10
+	str	r3, [r5, #8]
+	str	r2, [r5, #4]
+	ldr	r2, .L926+16
+	ldr	r0, [r2]
+	movs	r2, #16
+	str	r0, [r5, #12]
+	bl	ftl_memset
+	ldr	r2, [r5, #12]
+	movs	r3, #1
+	ldr	r1, [r4, #28]
+	mov	r0, r5
+	strh	r7, [r2, #8]	@ movhi
+	str	r1, [r2, #4]
+	ldrh	r1, [r4, #4]
+	strh	r10, [r2, #2]	@ movhi
+	strh	r1, [r2]	@ movhi
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r5]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L908
+	ldr	r1, [r5, #4]
+	adds	r6, r6, #1
+	ldr	r0, .L926+20
+	uxth	r6, r6
+	bl	printf
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	ittt	ls
+	ldrhls	r2, [fp]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r6, #3
+	bls	.L910
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L926+24
+	bl	printf
+.L911:
+	b	.L911
+.L910:
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L903
+.L925:
+	b	.L925
+.L908:
+	cmp	r2, #1
+	beq	.L914
+	cmp	r1, #256
+	beq	.L914
+	ldr	r0, [r4, #36]
+	cbz	r0, .L915
+.L914:
+	movs	r3, #0
+	str	r3, [r4, #36]
+	b	.L903
+.L915:
+	ldr	r2, [r5, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r7, lsl #2]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L927:
+	.align	2
+.L926:
+	.word	.LANCHOR66
+	.word	.LANCHOR155
+	.word	.LC1
+	.word	.LANCHOR148
 	.word	.LANCHOR123
-	.word	.LANCHOR108
-	.word	.LANCHOR106
-	.word	.LANCHOR23
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.word	.LC88
+	.word	.LC89
+	.word	.LANCHOR20
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	load_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 32
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r5, .L889
-	sub	sp, sp, #32
-	mov	r1, r4
-	ldr	r3, .L889+4
-	ldr	r2, [r5]
-	ldr	r6, .L889+8
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L889+12
-	lsls	r2, r2, #2
-	strh	r4, [r6]	@ movhi
-	ldr	r7, .L889+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L889+20
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L889+24
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r7]
-	mov	r1, r4
-	ldr	r3, .L889+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	movs	r2, #12
+	ldr	r3, .L935
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r0
+	mov	r10, r1
+	ldrh	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, r0
+	bcs	.L929
+	movw	r2, #485
+	ldr	r1, .L935+4
+	ldr	r0, .L935+8
+	bl	printf
+.L929:
+	ldr	fp, .L935+48
+	movs	r4, #12
+	ldr	r7, .L935+12
+	ldr	r3, [fp]
+	ldr	r8, [r3, r5, lsl #2]
+	cmp	r8, #0
+	bne	.L930
+	mul	r4, r4, r10
+	ldr	r2, [r7]
 	movs	r1, #255
-	ldr	r0, .L889+32
+	adds	r0, r2, r4
+	ldr	r2, .L935+16
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
 	bl	ftl_memset
-	ldr	r3, .L889+36
-	str	r6, [sp, #12]
-	str	r5, [sp, #16]
-	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-.L810:
-	ldr	r3, .L889+40
-	ldr	r2, [sp, #4]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bls	.L851
-	ldr	r3, .L889+44
-	movs	r5, #0
-	ldr	r1, .L889+48
-	mov	fp, r5
-	movs	r7, #20
-	ldrh	r8, [r3]
-	ldr	r3, .L889+52
-	ldr	r2, [r1]
-	ldr	r1, .L889+56
-	ldr	r6, [r3]
-	ldr	r3, .L889+60
-	str	r2, [sp, #8]
-	ldrh	r10, [r1]
-	ldr	r3, [r3]
-	ldr	r2, .L889+64
-	b	.L852
-.L812:
-	ldrb	r0, [r2, r5]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #28]
-	str	r2, [sp, #24]
-	bl	V2P_block
-	str	r0, [sp, #20]
-	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L811
-	ldr	r1, [sp, #20]
-	mla	r0, r7, fp, r6
-	ldr	r4, [sp, #8]
-	lsls	r1, r1, #10
-	str	r3, [r0, #8]
-	str	r1, [r0, #4]
-	mul	r1, r10, fp
-	bic	r1, r1, #3
-	add	r1, r1, r4
-	str	r1, [r0, #12]
-	add	r1, fp, #1
-	uxth	fp, r1
-.L811:
-	adds	r5, r5, #1
-.L852:
-	uxth	r1, r5
-	cmp	r8, r1
-	bhi	.L812
-	cmp	fp, #0
-	bne	.L813
-.L850:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L810
-.L813:
-	movs	r7, #0
-	movs	r2, #1
-	mov	r1, fp
+	ldr	r2, [r7]
+	adds	r1, r2, r4
+	strh	r5, [r2, r4]	@ movhi
+	str	r8, [r1, #4]
+.L931:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L930:
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	ldr	r6, .L935+20
+	add	r2, r2, r4
 	mov	r0, r6
-	bl	FlashReadPages
-.L814:
-	uxth	r3, r7
-	cmp	fp, r3
-	bls	.L850
-	ldr	r3, .L889+52
-	mov	r8, #20
-	mul	r8, r8, r7
-	ldr	r3, [r3]
-	add	r2, r3, r8
-	ldr	r3, [r3, r8]
-	ldr	r5, [r2, #4]
-	ldr	r6, [r2, #12]
-	adds	r3, r3, #1
-	ubfx	r5, r5, #10, #16
-	bne	.L817
-	mov	r10, #16
-.L819:
-	ldr	r3, .L889+52
+	ldr	r2, [r2, #8]
+	str	r8, [r6, #4]
+	str	r2, [r6, #8]
+	ldr	r2, .L935+24
+	ldr	r2, [r2]
+	str	r2, [r6, #12]
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, [r3]
-	add	r0, r0, r8
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
 	bl	FlashReadPages
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	ldr	r3, .L889+52
-	ldr	r3, [r3]
-	bne	.L816
-	mov	r2, #-1
-	str	r2, [r3, r8]
-	ldr	r3, .L889+52
-	ldr	r3, [r3]
-	ldr	r3, [r3, r8]
-	cmp	r3, r2
-	bne	.L817
-.L818:
-	movs	r1, #0
-	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-	b	.L822
-.L816:
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L817
-	add	r10, r10, #-1
-	uxth	r10, r10
-	cmp	r10, #0
-	bne	.L819
-	b	.L818
-.L817:
-	ldr	r3, .L889+68
-	ldr	r2, [r3]
-	ldr	r3, [r6, #4]
-	adds	r1, r2, #1
-	beq	.L820
-	cmp	r2, r3
-	bhi	.L821
-.L820:
-	adds	r2, r3, #1
-	ittt	ne
-	ldrne	r1, .L889+68
-	addne	r2, r3, #1
-	strne	r2, [r1]
-.L821:
-	ldrh	r2, [r6]
-	movw	r1, #61604
-	cmp	r2, r1
-	beq	.L823
-	bhi	.L824
-	movw	r3, #61574
-	cmp	r2, r3
-	beq	.L825
-.L822:
-	adds	r7, r7, #1
-	b	.L814
-.L824:
-	movw	r3, #61634
-	cmp	r2, r3
-	beq	.L826
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L818
-	b	.L822
-.L826:
-	ldr	r3, .L889+8
-	ldrh	r2, [r3]
-	ldr	r3, .L889
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L828
-	movw	r2, #1211
-	ldr	r1, .L889+72
-	ldr	r0, .L889+76
-	bl	printf
-.L828:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #12]
-	ldr	r1, [r3]
-	ldrh	r0, [r2]
-	ldr	r2, .L889+12
-	uxth	r10, r1
-	ldr	ip, [r2]
-	add	r3, r10, #-1
-	sub	r10, r10, r0
-	add	r10, r10, #-1
-	sxth	r3, r3
-	sxth	r10, r10
-.L829:
-	cmp	r3, r10
-	bgt	.L835
-	cmp	r3, #0
-	bge	.L867
-	b	.L822
-.L835:
-	ldr	r2, [ip, r3, lsl #2]
-	add	r8, ip, r3, lsl #2
-	ldr	r4, [r6, #4]
-	cmp	r4, r2
-	bls	.L830
-	ldr	r2, [ip]
-	cbnz	r2, .L831
-	cmp	r1, r0
-	ittt	ne
-	ldrne	r2, .L889+8
-	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L831:
-	ldr	r2, .L889+20
-	uxth	r10, r3
-	ldr	r0, [r2]
-	movs	r2, #0
-.L832:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L833
-	ldr	r2, [r6, #4]
-	cmp	r3, #0
-	str	r2, [r8]
-	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L822
-	ldr	r2, .L889+8
-	ldrh	r0, [r2]
-	ldr	r2, .L889
-	ldr	r2, [r2]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L822
-.L867:
-	ldr	r2, .L889+8
-	adds	r0, r0, #1
-	strh	r0, [r2]	@ movhi
-	ldr	r2, [r6, #4]
-	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L889+20
-.L887:
-	ldr	r2, [r2]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L822
-.L833:
-	add	lr, ip, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [ip, r1, lsl #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L832
-.L830:
-	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L829
-.L890:
+	ldr	r10, [r6, #12]
+	ldrh	r2, [r10, #8]
+	cmp	r2, r5
+	beq	.L932
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L935+28
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r6, #12]
+	mov	r2, r3
+	ldr	r0, .L935+32
+	bl	rknand_print_hex
+	ldr	r3, [sp, #4]
+	movs	r2, #4
+	ldr	r1, [fp]
+	ldr	r0, .L935+36
+	ldrh	r3, [r3]
+	bl	rknand_print_hex
+.L933:
+	ldrh	r3, [r10, #8]
+	cmp	r3, r5
+	beq	.L934
+	mov	r2, #508
+	ldr	r1, .L935+4
+	ldr	r0, .L935+8
+	bl	printf
+.L934:
+	ldr	r3, [r7]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r5, [r3, r4]	@ movhi
+	b	.L931
+.L932:
+	ldr	r2, [r6]
+	cmp	r2, #256
+	bne	.L933
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L935+40
+	bl	printf
+	ldr	r3, [r7]
+	mov	r1, r5
+	ldr	r0, .L935+44
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	b	.L933
+.L936:
 	.align	2
-.L889:
-	.word	.LANCHOR30
-	.word	.LANCHOR35
-	.word	.LANCHOR147
-	.word	.LANCHOR135
-	.word	.LANCHOR27
-	.word	.LANCHOR129
-	.word	.LANCHOR132
-	.word	.LANCHOR36
-	.word	.LANCHOR79
-	.word	.LANCHOR5
-	.word	.LANCHOR6
-	.word	.LANCHOR3
-	.word	.LANCHOR92
-	.word	.LANCHOR120
-	.word	.LANCHOR24
-	.word	.LANCHOR91
-	.word	.LANCHOR13
-	.word	.LANCHOR70
-	.word	.LANCHOR148
+.L935:
+	.word	.LANCHOR32
+	.word	.LANCHOR156
 	.word	.LC1
-.L825:
-	ldr	r8, .L891+12
-	ldr	r10, .L891+20
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
+	.word	.LANCHOR55
+	.word	.LANCHOR23
+	.word	.LANCHOR148
+	.word	.LANCHOR123
+	.word	.LC90
+	.word	.LC91
+	.word	.LC92
+	.word	.LC93
+	.word	.LANCHOR140
+	.word	.LANCHOR134
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	str	r3, [sp]
+	bl	ftl_free_no_use_map_blk
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #5
 	cmp	r2, r3
-	bls	.L838
-	movw	r2, #1252
-	ldr	r1, .L891
-	ldr	r0, .L891+4
-	bl	printf
-.L838:
-	ldr	r2, .L891+8
-	ldrh	lr, [r10]
-	ldrh	ip, [r8]
-	ldr	r0, [r2]
-	add	r10, lr, #-1
-	sxth	r3, r10
-	sub	r10, r10, ip
-.L839:
-	cmp	r3, r10
-	ble	.L844
-	ldr	r1, [r6, #4]
-	add	r8, r0, r3, lsl #2
-	ldr	r2, [r0, r3, lsl #2]
-	cmp	r1, r2
-	bls	.L840
-	ldr	r2, [r0]
-	cbnz	r2, .L841
-	cmp	lr, ip
-	ittt	ne
-	ldrne	r2, .L891+12
-	addne	ip, ip, #1
-	strhne	ip, [r2]	@ movhi
-.L841:
-	ldr	r2, .L891+16
-	uxth	r10, r3
-	ldr	ip, [r2]
-	movs	r2, #0
-.L842:
-	uxth	lr, r2
-	sxth	r1, r2
-	cmp	r10, lr
-	bhi	.L843
-	ldr	r2, [r6, #4]
-	str	r2, [r8]
-	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L844:
-	cmp	r3, #0
-	blt	.L822
-	ldr	r2, .L891+20
-	ldr	ip, .L891+12
-	ldrh	r2, [r2]
-	ldrh	r1, [ip]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L822
-	ldr	r2, [r6, #4]
-	adds	r1, r1, #1
-	strh	r1, [ip]	@ movhi
-	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L891+16
-	b	.L887
-.L843:
-	add	lr, r0, r1, lsl #2
-	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, ip, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [r0, r1, lsl #2]
-	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L842
-.L840:
+	blt	.L938
+	uxth	r0, r0
+	ldrh	r8, [r5, r0, lsl #1]
+	cmp	r8, #0
+	beq	.L938
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L938
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
-	sxth	r3, r3
-	b	.L839
-.L823:
-	ldr	r8, .L891+40
-	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L846
-.L888:
-	strh	r5, [r8]	@ movhi
-	str	r3, [r8, #8]
-	b	.L822
-.L846:
-	ldrh	r0, [r8, #4]
-	cmp	r0, r2
-	beq	.L847
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L953
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L939
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L939:
+	ldr	r5, .L953+4
+	movs	r6, #0
+.L940:
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+	cmp	r3, r10
+	bhi	.L947
 	movs	r1, #1
+	mov	r0, r8
 	bl	FtlFreeSysBlkQueueIn
-.L847:
-	ldr	r3, [r6, #4]
-	ldr	r2, [r8, #8]
-	cmp	r2, r3
-	bcs	.L848
-	ldrh	r2, [r8]
-	strh	r2, [r8, #4]	@ movhi
-	b	.L888
-.L848:
-	strh	r5, [r8, #4]	@ movhi
-	b	.L822
-.L851:
-	ldr	r3, .L891+24
-	ldr	r2, [r3]
-	ldrh	r3, [r2]
-	cbz	r3, .L853
-.L856:
-	ldr	r3, .L891+16
-	ldr	r4, [r3]
-	ldrh	r2, [r4]
-	cmp	r2, #0
-	beq	.L854
-.L855:
-	ldr	r3, .L891+28
-	ldrh	r2, [r3]
-	ldr	r3, .L891+32
-	ldr	r3, [r3]
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L938:
+	ldr	r3, .L953
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bls	.L886
-	movw	r2, #1377
-	ldr	r1, .L891
-	ldr	r0, .L891+4
-	bl	printf
-.L886:
+	bcc	.L948
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L948:
 	movs	r0, #0
-	add	sp, sp, #32
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L853:
-	ldr	r1, .L891+28
-	ldrh	r1, [r1]
-	cmp	r1, #0
-	beq	.L856
-	ldr	r5, .L891+32
-	ldr	r0, [r5]
-.L857:
-	sxth	r1, r3
-	cmp	r1, r0
-	bcs	.L856
-	ldrh	r4, [r2, r1, lsl #1]
-	adds	r3, r3, #1
-	cmp	r4, #0
-	beq	.L857
-	ldr	r3, .L891+36
-	movs	r6, #0
-	ldr	r0, [r3]
-	mov	r3, r1
-.L858:
-	ldr	r4, [r5]
-	cmp	r3, r4
-	bcs	.L856
-	ldrh	r7, [r2, r3, lsl #1]
-	subs	r4, r3, r1
-	strh	r7, [r2, r4, lsl #1]	@ movhi
-	ldr	r7, [r0, r3, lsl #2]
-	str	r7, [r0, r4, lsl #2]
-	strh	r6, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	sxth	r3, r3
-	b	.L858
-.L854:
-	ldr	r3, .L891+12
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L855
-	ldr	r5, .L891+20
-	ldrh	r1, [r5]
-.L863:
-	sxth	r3, r2
-	cmp	r3, r1
-	mov	r6, r3
-	bge	.L855
-	ldrh	r0, [r4, r3, lsl #1]
-	adds	r2, r2, #1
-	cmp	r0, #0
-	beq	.L863
-	ldr	r2, .L891+8
-	movs	r0, #0
-	ldr	r2, [r2]
-.L864:
-	ldrh	r1, [r5]
-	cmp	r3, r1
-	bge	.L855
-	ldrh	r7, [r4, r3, lsl #1]
-	subs	r1, r3, r6
-	strh	r7, [r4, r1, lsl #1]	@ movhi
-	ldr	r7, [r2, r3, lsl #2]
-	str	r7, [r2, r1, lsl #2]
-	adds	r1, r3, #1
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-	sxth	r3, r1
-	b	.L864
-.L892:
+.L947:
+	ldr	r3, [sp]
+	uxth	fp, r6
+	add	r3, r3, fp, lsl #2
+	str	r3, [sp, #4]
+	ldr	r3, [sp]
+	ldr	r2, [r3, fp, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L941
+	ldr	r3, .L953+8
+	str	r2, [r5, #4]
+	movs	r2, #1
+	ldr	r0, .L953+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L953+12
+	ldr	r7, [r1]
+	mov	r1, r2
+	str	r7, [r5, #12]
+	bl	FlashReadPages
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	beq	.L942
+	movw	r2, #611
+	ldr	r1, .L953+16
+	ldr	r0, .L953+20
+	bl	printf
+.L942:
+	ldr	r2, [r5]
+	adds	r2, r2, #1
+	bne	.L943
+.L945:
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	str	r3, [r2]
+.L944:
+	b	.L944
+.L943:
+	ldrh	r2, [r7, #8]
+	cmp	r2, r10
+	bne	.L945
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	bne	.L945
+	ldr	r2, [r5, #8]
+	mov	r1, fp
+	mov	r0, r4
+	bl	FtlMapWritePage
+.L941:
+	adds	r6, r6, #1
+	b	.L940
+.L954:
 	.align	2
-.L891:
+.L953:
+	.word	.LANCHOR20
 	.word	.LANCHOR148
+	.word	.LANCHOR116
+	.word	.LANCHOR123
+	.word	.LANCHOR157
 	.word	.LC1
-	.word	.LANCHOR132
-	.word	.LANCHOR35
-	.word	.LANCHOR36
-	.word	.LANCHOR27
-	.word	.LANCHOR129
-	.word	.LANCHOR147
-	.word	.LANCHOR30
-	.word	.LANCHOR135
-	.word	.LANCHOR79
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
 	.global	FtlMapTblRecovery
@@ -6684,16 +7359,16 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	ldr	r10, [r0, #12]
 	mov	r0, r8
-	ldr	r5, .L920
+	ldr	r5, .L982
 	str	r3, [sp, #4]
 	bl	ftl_memset
-	ldr	r3, .L920+4
+	ldr	r3, .L982+4
 	str	r6, [r4, #32]
 	str	r6, [r4, #28]
 	ldr	r2, [r3]
 	str	r3, [sp, #8]
 	str	r2, [r5, #8]
-	ldr	r2, .L920+8
+	ldr	r2, .L982+8
 	ldr	r7, [r2]
 	movw	r2, #65535
 	str	r7, [r5, #12]
@@ -6701,16 +7376,16 @@ FtlMapTblRecovery:
 	strh	r2, [r4, #2]	@ movhi
 	movs	r2, #1
 	str	r2, [r4, #36]
-.L894:
+.L956:
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
 	cmp	r3, r2
-	bge	.L911
+	bge	.L973
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L895
+	bne	.L957
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
@@ -6726,22 +7401,22 @@ FtlMapTblRecovery:
 	strh	r0, [r4, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-	ldr	r3, .L920
-.L896:
+	ldr	r3, .L982
+.L958:
 	sxth	r2, r6
 	cmp	r2, r10
-	ble	.L898
-.L911:
+	ble	.L960
+.L973:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L920+12
+	ldr	r3, .L982+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L900
+	bne	.L962
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L900:
+.L962:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -6750,9 +7425,9 @@ FtlMapTblRecovery:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L898:
+.L960:
 	ldrh	r1, [r5]
-	ldr	r0, .L920
+	ldr	r0, .L982
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r3, #4]
@@ -6762,28 +7437,28 @@ FtlMapTblRecovery:
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L897
+	beq	.L959
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L897
+	bls	.L959
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L897:
+.L959:
 	adds	r6, r6, #1
-	b	.L896
-.L895:
+	b	.L958
+.L957:
 	ldr	r1, [sp, #8]
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	ldr	r0, .L920
+	ldr	r0, .L982
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L920+12
+	ldr	r3, .L982+12
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -6794,27 +7469,27 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L913
+	beq	.L975
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L913
+	bne	.L975
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L902
-.L913:
+	beq	.L964
+.L975:
 	movs	r3, #0
-.L903:
-	ldr	r1, .L920+12
+.L965:
+	ldr	r1, .L982+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L909
+	bge	.L971
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #16]
-	ldr	r0, .L920
+	ldr	r0, .L982
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
@@ -6824,3042 +7499,2770 @@ FtlMapTblRecovery:
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L907
+	beq	.L969
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L907
+	bls	.L969
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L907:
+.L969:
 	adds	r3, r3, #1
-	b	.L903
-.L902:
+	b	.L965
+.L964:
 	ldrh	r2, [r3]
 	movs	r1, #0
 	ldr	r3, [sp, #8]
 	subs	r2, r2, #1
 	ldr	ip, [r3]
-.L904:
+.L966:
 	sxth	r3, r1
 	cmp	r3, r2
-	blt	.L906
-.L909:
+	blt	.L968
+.L971:
 	adds	r6, r6, #1
-	b	.L894
-.L906:
+	b	.L956
+.L968:
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
 	adds	r1, r1, #1
 	uxth	lr, r3
 	cmp	fp, lr
-	itttt	hi
-	addhi	r0, r0, ip
-	movhi	r3, lr
-	ldrhi	r0, [r0, #4]
-	strhi	r0, [r8, r3, lsl #2]
-	b	.L904
-.L921:
-	.align	2
-.L920:
-	.word	.LANCHOR106
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR20
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadVonderInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L923
-	ldr	r0, .L923+4
-	ldrh	r3, [r3]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L923+8
-	ldrh	r3, [r3]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L923+12
-	ldrh	r3, [r3]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L923+16
-	ldr	r3, [r3]
-	str	r3, [r0, #12]
-	ldr	r3, .L923+20
-	ldr	r3, [r3]
-	str	r3, [r0, #16]
-	ldr	r3, .L923+24
-	ldr	r3, [r3]
-	str	r3, [r0, #20]
-	ldr	r3, .L923+28
-	ldr	r3, [r3]
-	str	r3, [r0, #24]
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L924:
-	.align	2
-.L923:
-	.word	.LANCHOR27
-	.word	.LANCHOR149
-	.word	.LANCHOR35
-	.word	.LANCHOR28
-	.word	.LANCHOR36
-	.word	.LANCHOR132
-	.word	.LANCHOR131
-	.word	.LANCHOR133
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlL2PDataInit,"ax",%progbits
-	.align	1
-	.global	FtlL2PDataInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r1, #0
-	ldr	r5, .L928
-	ldr	r4, .L928+4
-	ldr	r2, [r5]
-	ldr	r7, .L928+8
-	ldr	r6, .L928+12
-	ldr	r0, [r4]
-	lsls	r2, r2, #1
-	ldr	r8, .L928+44
-	bl	ftl_memset
-	ldrh	r3, [r7]
-	movs	r1, #255
-	ldrh	r2, [r6]
-	ldr	r0, [r8]
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L928+16
-	movw	r0, #65535
-	ldrh	r1, [r6]
-	ldr	ip, [r8]
-	ldr	r2, [r3]
-	movs	r3, #12
-	ldrh	r7, [r7]
-	mla	r3, r1, r3, r3
-	adds	r1, r2, r3
-	movs	r3, #0
-	mov	lr, r3
-.L926:
-	adds	r2, r2, #12
-	adds	r6, r3, r7
-	cmp	r2, r1
-	bne	.L927
-	ldr	r3, .L928+20
-	ldr	r2, [r5]
-	strh	r0, [r3, #2]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L928+24
-	strh	r0, [r3]	@ movhi
-	ldrh	r2, [r2]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L928+28
-	ldrh	r2, [r2]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L928+32
-	ldr	r2, [r2]
-	str	r2, [r3, #12]
-	ldr	r2, .L928+36
-	ldr	r2, [r2]
-	str	r2, [r3, #16]
-	ldr	r2, [r4]
-	str	r2, [r3, #20]
-	ldr	r2, .L928+40
-	ldr	r2, [r2]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L927:
-	bic	r3, r3, #3
-	str	lr, [r2, #-8]
-	add	r3, r3, ip
-	strh	r0, [r2, #-12]	@ movhi
-	str	r3, [r2, #-4]
-	mov	r3, r6
-	b	.L926
-.L929:
-	.align	2
-.L928:
-	.word	.LANCHOR30
-	.word	.LANCHOR130
-	.word	.LANCHOR23
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR144
-	.word	.LANCHOR147
-	.word	.LANCHOR32
-	.word	.LANCHOR129
-	.word	.LANCHOR135
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadMapInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L931
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L932:
-	.align	2
-.L931:
-	.word	.LANCHOR144
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlVariablesInit,"ax",%progbits
-	.align	1
-	.global	FtlVariablesInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movw	r2, #65535
-	ldr	r3, .L934
-	movs	r4, #0
-	mov	r1, r4
-	ldr	r5, .L934+4
-	strh	r2, [r3]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L934+8
-	str	r4, [r3]
-	ldr	r3, .L934+12
-	str	r4, [r3]
-	ldr	r3, .L934+16
-	str	r2, [r3]
-	ldr	r3, .L934+20
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L934+24
-	ldrh	r2, [r3]
-	ldr	r3, .L934+28
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L934+32
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L934+36
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L934+40
-	bl	ftl_memset
-	mov	r2, #512
-	mov	r1, r4
-	ldr	r0, .L934+44
-	bl	ftl_memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L935:
+	itttt	hi
+	addhi	r0, r0, ip
+	movhi	r3, lr
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r8, r3, lsl #2]
+	b	.L966
+.L983:
 	.align	2
-.L934:
-	.word	.LANCHOR150
-	.word	.LANCHOR6
-	.word	.LANCHOR151
-	.word	.LANCHOR152
-	.word	.LANCHOR153
-	.word	.LANCHOR35
-	.word	.LANCHOR27
-	.word	.LANCHOR36
-	.word	.LANCHOR43
-	.word	.LANCHOR126
-	.word	.LANCHOR39
-	.word	.LANCHOR81
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.SupperBlkListInit,"ax",%progbits
+.L982:
+	.word	.LANCHOR148
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR20
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	FtlLoadVonderInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r2, #6
-	ldr	r3, .L947
-	movs	r1, #0
-	movs	r4, #0
-	ldr	r5, .L947+4
-	mov	r8, r4
-	ldrh	r3, [r3]
-	mov	r6, r4
-	ldr	r0, [r5]
-	mov	r10, r5
-	muls	r2, r3, r2
-	bl	ftl_memset
-	ldr	r3, .L947+8
-	ldr	r2, .L947+12
-	str	r4, [r3]
-	ldr	r3, .L947+16
-	strh	r4, [r2]	@ movhi
-	str	r2, [sp, #4]
-	str	r4, [r3]
-	ldr	r3, .L947+20
-	str	r4, [r3]
-	ldr	r3, .L947+24
-	mov	fp, r3
-	strh	r4, [r3]	@ movhi
-.L937:
-	ldr	r3, .L947+28
-	uxth	r7, r4
-	ldrh	r3, [r3]
-	cmp	r7, r3
-	bcs	.L943
-	ldr	r3, .L947+32
-	ldrh	r2, [r3]
-	ldr	r3, .L947+36
-	ldrh	r3, [r3]
-	str	r3, [sp]
-	movs	r3, #0
-	mov	r5, r3
-	b	.L944
-.L939:
-	str	r2, [sp, #12]
-	mov	r1, r7
-	ldr	r2, .L947+40
-	str	r3, [sp, #8]
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	cbnz	r0, .L938
-	ldr	r1, [sp]
-	add	r5, r5, r1
-	uxth	r5, r5
-.L938:
-	adds	r3, r3, #1
-.L944:
-	uxth	r1, r3
-	cmp	r2, r1
-	bhi	.L939
-	cbz	r5, .L946
-	mov	r1, r5
-	mov	r0, #32768
-	bl	__aeabi_idiv
-.L940:
-	ldr	r1, [r10]
-	uxth	r2, r4
-	movs	r3, #6
-	mla	r3, r3, r2, r1
-	strh	r0, [r3, #4]	@ movhi
-	ldr	r3, .L947+44
+	push	{r3, lr}
+	ldr	r3, .L985
+	ldr	r0, .L985+4
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	beq	.L941
-	ldr	r3, .L947+48
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L985+8
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	beq	.L941
-	ldr	r3, .L947+52
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L985+12
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	beq	.L941
-	ldr	r3, .L947+56
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L985+16
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L942
-	add	r8, r8, #1
-	mov	r0, r7
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-.L941:
-	adds	r4, r4, #1
-	b	.L937
-.L946:
-	mov	r0, r5
-	b	.L940
-.L942:
-	adds	r6, r6, #1
-	mov	r0, r7
-	uxth	r6, r6
-	bl	INSERT_DATA_LIST
-	b	.L941
-.L943:
-	ldr	r2, [sp, #4]
-	strh	r8, [fp]	@ movhi
-	strh	r6, [r2]	@ movhi
-	add	r6, r6, r8
-	cmp	r6, r3
-	ble	.L945
-	movw	r2, #2154
-	ldr	r1, .L947+60
-	ldr	r0, .L947+64
-	bl	printf
-.L945:
+	str	r3, [r0, #12]
+	ldr	r3, .L985+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L985+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L985+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L948:
-	.align	2
-.L947:
-	.word	.LANCHOR6
-	.word	.LANCHOR40
-	.word	.LANCHOR47
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR44
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR13
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR42
-	.word	.LANCHOR154
-	.word	.LC1
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.ftl_check_vpc,"ax",%progbits
-	.align	1
-	.global	ftl_check_vpc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r6, .L973
-	ldr	r5, .L973+4
-	ldr	r1, .L973+8
-	ldr	r0, .L973+12
-	bl	printf
-	mov	r2, #8192
-	movs	r1, #0
-	ldr	r0, .L973+4
-	bl	ftl_memset
-.L950:
-	ldr	r3, [r6]
-	cmp	r4, r3
-	bcc	.L952
-	ldr	r10, .L973+48
-	movs	r4, #0
-	ldr	r7, .L973+16
-	mov	r6, r4
-.L953:
-	ldrh	r2, [r10]
-	uxth	r3, r4
-	cmp	r2, r3
-	bhi	.L955
-	ldr	r3, .L973+20
-	ldr	r4, [r3]
-	cbz	r4, .L956
-	ldr	r3, .L973+24
-	mov	r8, #0
-	ldr	r5, .L973+28
-	ldr	r10, .L973+16
-	ldrh	r7, [r3]
-	ldr	r3, [r5]
-	ldr	fp, .L973+4
-	subs	r4, r4, r3
-	ldr	r3, .L973+32
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
-	uxth	r4, r4
-.L957:
-	uxth	r3, r8
-	cmp	r7, r3
-	bls	.L956
-	ldr	r3, [r10]
-	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L958
-	movs	r6, #1
-	ldrh	r3, [fp, r4, lsl #1]
-	mov	r1, r4
-	ldr	r0, .L973+36
-	bl	printf
-.L958:
-	movs	r3, #6
-	ldr	r2, [r5]
-	muls	r4, r3, r4
-	movw	r3, #65535
-	add	r8, r8, #1
-	ldrh	r4, [r2, r4]
-	cmp	r4, r3
-	bne	.L957
-.L956:
-	cbz	r6, .L949
-	movw	r2, #2321
-	ldr	r1, .L973+8
-	ldr	r0, .L973+40
-	bl	printf
-.L949:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L952:
-	movs	r2, #0
-	add	r1, sp, #4
-	mov	r0, r4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	adds	r3, r0, #1
-	beq	.L951
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r5, r0, lsl #1]
-	adds	r3, r3, #1
-	strh	r3, [r5, r0, lsl #1]	@ movhi
-.L951:
-	adds	r4, r4, #1
-	b	.L950
-.L955:
-	ldr	r3, [r7]
-	uxth	r5, r4
-	ldr	r8, .L973+4
-	ldrh	r2, [r3, r5, lsl #1]
-	ldrh	r3, [r8, r5, lsl #1]
-	cmp	r2, r3
-	beq	.L954
-	mov	r1, r5
-	ldr	r0, .L973+44
-	bl	printf
-	ldr	r3, [r7]
-	movw	r2, #65535
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, r2
-	beq	.L954
-	ldrh	r2, [r8, r5, lsl #1]
-	cmp	r2, r3
-	it	hi
-	movhi	r6, #1
-.L954:
-	adds	r4, r4, #1
-	b	.L953
-.L974:
+	pop	{r3, pc}
+.L986:
 	.align	2
-.L973:
-	.word	.LANCHOR61
-	.word	check_vpc_table
-	.word	.LANCHOR155
-	.word	.LC94
-	.word	.LANCHOR42
-	.word	.LANCHOR47
-	.word	.LANCHOR48
-	.word	.LANCHOR40
-	.word	-1431655765
-	.word	.LC96
-	.word	.LC1
-	.word	.LC95
-	.word	.LANCHOR5
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+.L985:
+	.word	.LANCHOR27
+	.word	.LANCHOR158
+	.word	.LANCHOR35
+	.word	.LANCHOR28
+	.word	.LANCHOR36
+	.word	.LANCHOR132
+	.word	.LANCHOR131
+	.word	.LANCHOR133
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FtlLoadMapInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L976
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	ldr	r4, .L976+4
-	strh	r3, [r2]	@ movhi
-	ldr	r2, .L976+8
-	strh	r3, [r2]	@ movhi
-	ldrh	r2, [r4]
-	ldr	r3, .L976+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldrh	r3, [r4]
-	movs	r2, #12
-	movs	r1, #255
-	muls	r2, r3, r2
-	ldr	r3, .L976+16
-	ldr	r0, [r3]
-	bl	ftl_memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
-.L977:
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L988
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L989:
 	.align	2
-.L976:
-	.word	.LANCHOR96
-	.word	.LANCHOR21
-	.word	.LANCHOR97
-	.word	.LANCHOR95
-	.word	.LANCHOR98
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+.L988:
+	.word	.LANCHOR140
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	flush_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 24
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1001
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r5, r0
-	str	r1, [sp, #8]
-	ldrh	r4, [r3]
-	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L995
-	cbnz	r4, .L979
-.L980:
-	bl	FtlGcPageVarInit
-	b	.L981
-.L995:
-	movs	r4, #0
-.L979:
-	ldr	r3, .L1001+4
-	ldr	r2, [sp, #8]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	beq	.L980
-.L981:
-	movs	r7, #0
-.L989:
-	ldrh	r2, [r5]
-	movw	r3, #65535
+	push	{r3, r4, r5, lr}
+	movs	r4, #12
+	ldr	r5, .L991
+	muls	r4, r0, r4
+	ldr	r0, .L991+4
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
 	movs	r0, #0
-	strb	r0, [r5, #8]
-	cmp	r2, r3
-	beq	.L982
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	pop	{r3, r4, r5, pc}
 .L992:
-	ldr	r3, .L1001+8
-	movs	r2, #0
-	add	ip, r5, #16
-	mov	r6, r2
-	movw	lr, #65535
-	mov	r8, #20
-	ldrh	fp, [r3]
-	ldr	r3, .L1001+12
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L1001+16
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1001+20
-	ldrh	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1001+24
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1001+28
-	ldrh	r10, [r3]
-.L983:
-	uxth	r3, r2
-	cmp	fp, r3
-	bhi	.L985
-	mov	r8, #0
-	mov	fp, #20
-	movs	r2, #0
-	mov	r1, r6
-	ldr	r0, [sp, #4]
-	bl	FlashReadPages
-.L986:
-	uxth	r3, r8
-	cmp	r6, r3
-	bhi	.L990
-	ldr	r3, [sp, #8]
-	adds	r7, r7, #1
-	adds	r4, r4, #1
-	ldr	r2, .L1001+4
-	uxth	r4, r4
-	cmp	r3, r7
-	bls	.L991
-.L993:
-	ldrh	r3, [r2]
-	cmp	r3, r4
-	bhi	.L992
-	movs	r0, #0
-	b	.L982
-.L985:
-	ldrh	r3, [ip], #2
-	cmp	r3, lr
-	beq	.L984
-	ldr	r1, [sp, #4]
-	orr	r3, r4, r3, lsl #10
-	ldr	r0, [sp, #12]
-	mla	r1, r8, r6, r1
-	str	r3, [r1, #4]
-	ldr	r3, [sp, #16]
-	muls	r3, r6, r3
-	bic	r3, r3, #3
-	add	r3, r3, r0
-	ldr	r0, [sp, #20]
-	str	r3, [r1, #8]
-	mul	r3, r10, r6
-	adds	r6, r6, #1
-	uxth	r6, r6
-	bic	r3, r3, #3
-	add	r3, r3, r0
-	str	r3, [r1, #12]
-.L984:
-	adds	r2, r2, #1
-	b	.L983
-.L990:
-	ldr	r3, .L1001+12
-	mul	r10, fp, r8
-	ldr	r2, [r3]
-	add	r3, r2, r10
-	str	r2, [sp, #16]
-	ldr	r1, [r3, #4]
-	str	r3, [sp, #12]
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_plane
-	ldr	r2, [sp, #16]
-	ldr	r2, [r2, r10]
-	cbnz	r2, .L987
-	ldr	r3, [sp, #12]
-	movw	r2, #65535
-	add	r8, r8, #1
-	ldr	r1, [sp, #4]
-	ldr	r3, [r3, #12]
-	ldrh	ip, [r3]
-	cmp	ip, r2
-	bne	.L988
-	ldr	r3, .L1001+32
-	movs	r2, #1
-	str	r2, [r3]
-.L982:
-	ldr	r3, .L1001
-	movw	r2, #65535
-	strb	r0, [r5, #6]
-	mov	r1, r4
-	strh	r4, [r5, #2]	@ movhi
-	strh	r2, [r3]	@ movhi
-	mov	r2, r0
-	mov	r0, r5
-	bl	ftl_sb_update_avl_pages
-	b	.L994
-.L988:
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-	b	.L986
-.L987:
-	ldr	r3, .L1001+36
-	movs	r4, #0
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5]
-	bl	INSERT_FREE_LIST
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L989
-.L991:
-	ldr	r1, .L1001
-	movw	r0, #65535
-	ldrh	r3, [r1]
-	cmp	r3, r0
-	beq	.L993
-	add	r3, r3, r7
-	strh	r3, [r1]	@ movhi
-	ldrh	r3, [r2]
-	cmp	r3, r4
-	bls	.L993
-.L994:
-	mov	r0, #-1
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1002:
 	.align	2
-.L1001:
-	.word	.LANCHOR156
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR120
-	.word	.LANCHOR91
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
-	.word	.LANCHOR152
-	.word	.LANCHOR42
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashTestBlk,"ax",%progbits
+.L991:
+	.word	.LANCHOR55
+	.word	.LANCHOR140
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	FlashTestBlk
+	.global	log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	@ args = 0, pretend = 0, frame = 88
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r0, #11
-	push	{r4, r5, lr}
-	mov	r4, r0
-	sub	sp, sp, #92
-	bls	.L1005
-	ldr	r5, .L1006
-	add	r0, sp, #24
-	movs	r2, #32
-	movs	r1, #165
-	str	r0, [sp, #16]
-	lsls	r4, r4, #10
-	str	r5, [sp, #12]
-	bl	ftl_memset
-	movs	r2, #8
-	movs	r1, #90
-	mov	r0, r5
-	bl	ftl_memset
-	movs	r2, #1
-	add	r0, sp, #4
-	mov	r1, r2
-	str	r4, [sp, #8]
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	add	r0, sp, #4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r4, [sp, #4]
-	movs	r2, #1
-	movs	r1, #0
-	add	r0, sp, #4
-	adds	r4, r4, #0
-	it	ne
-	movne	r4, #1
-	negs	r4, r4
-	bl	FlashEraseBlocks
-.L1003:
-	mov	r0, r4
-	add	sp, sp, #92
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r4, .L1006
+	mov	r10, r0
+	mov	r5, r1
+	ldr	r3, .L1006+4
+	ldr	r2, [r4]
+	ldrh	fp, [r3]
+	cmp	r0, r2
+	bcc	.L994
+	movw	r2, #811
+	ldr	r1, .L1006+8
+	ldr	r0, .L1006+12
+	bl	printf
+.L994:
+	ldr	r3, [r4]
+	cmp	r10, r3
+	bcs	.L995
+	ldr	r3, .L1006+16
+	add	fp, fp, #7
+	lsr	r6, r10, fp
+	movs	r2, #0
+	ldrh	r1, [r3]
+	uxth	r6, r6
+	ldr	r3, .L1006+20
+	ldr	r0, [r3]
+	mov	r8, r3
+	movs	r3, #12
+.L996:
+	uxth	r4, r2
+	cmp	r4, r1
+	bcc	.L1001
+	str	r3, [sp, #4]
+	bl	select_l2p_ram_region
+	ldr	r3, [sp, #4]
+	mov	r4, r0
+	ldr	r2, [r8]
+	muls	r3, r0, r3
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1002
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L1002
+	bl	flush_l2p_region
+.L1002:
+	mov	r1, r4
+	mov	r0, r6
+	bl	load_l2p_region
+	b	.L998
+.L995:
+	mov	r0, #-1
+	cbnz	r7, .L993
+	str	r0, [r5]
+.L993:
+	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, pc}
-.L1005:
-	movs	r4, #0
-	b	.L1003
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1001:
+	adds	r2, r2, #1
+	mla	ip, r3, r2, r0
+	ldrh	ip, [ip, #-12]
+	cmp	ip, r6
+	bne	.L996
+.L998:
+	movs	r0, #1
+	ldr	r2, [r8]
+	lsl	r0, r0, fp
+	movs	r3, #12
+	subs	r0, r0, #1
+	and	r0, r0, r10
+	uxth	r0, r0
+	mla	r3, r3, r4, r2
+	cbnz	r7, .L999
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r0, lsl #2]
+	str	r3, [r5]
+.L1000:
+	ldr	r2, [r8]
+	movs	r3, #12
+	mla	r4, r3, r4, r2
+	ldr	r3, [r4, #4]
+	adds	r2, r3, #1
+	beq	.L1004
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+.L1004:
+	movs	r0, #0
+	b	.L993
+.L999:
+	ldr	r1, [r5]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r0, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L1006+24
+	strh	r6, [r3]	@ movhi
+	b	.L1000
 .L1007:
 	.align	2
 .L1006:
-	.word	ftl_temp_buf
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.word	.LANCHOR61
+	.word	.LANCHOR22
+	.word	.LANCHOR159
+	.word	.LC1
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	FlashGetBadBlockList
+	.global	FtlReUsePrevPpa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r2, #256
-	mov	r5, r1
-	movs	r1, #255
-	mov	r4, r0
-	bl	ftl_memset
-	ldr	r3, .L1015
-	mov	r1, r5
-	mov	r0, r4
-	ldr	r3, [r3]
-	blx	r3
-	uxth	r0, r0
-	cmp	r0, #50
-	bls	.L1009
-	mov	r2, #256
-	movs	r1, #255
-	mov	r0, r4
-	bl	ftl_memset
-	movs	r0, #0
-.L1009:
-	ldr	r3, .L1015+4
-	ldrh	r3, [r3, #14]
-	cmp	r3, #4
-	bne	.L1014
-	add	r1, r4, r0, lsl #1
-	mov	r3, r4
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L1018
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
+	cbnz	r3, .L1009
+	ldr	r2, .L1018+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L1010
+	ldr	r2, .L1018+8
+	movw	lr, #65535
+	ldr	ip, .L1018+24
+	ldr	r0, .L1018+12
+	ldr	r2, [r2]
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
 .L1011:
-	cmp	r3, r1
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L1010
+	cmp	r4, r7
 	bne	.L1012
-.L1014:
-	pop	{r3, r4, r5, pc}
+	mov	r1, r4
+	ldr	r0, .L1018+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L1013
+	movw	r2, #1699
+	ldr	r1, .L1018+16
+	ldr	r0, .L1018+20
+	bl	printf
+.L1013:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L1009:
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L1010
 .L1012:
-	ldrh	r2, [r3]
-	lsrs	r2, r2, #1
-	strh	r2, [r3], #2	@ movhi
-	b	.L1011
-.L1016:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L1011
+.L1010:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1019:
 	.align	2
-.L1015:
-	.word	.LANCHOR105
-	.word	.LANCHOR0
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.ftl_memcpy,"ax",%progbits
+.L1018:
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR40
+	.word	.LANCHOR48
+	.word	.LANCHOR160
+	.word	.LC1
+	.word	-1431655765
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_check_vpc,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy
+	.global	ftl_check_vpc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1044
+	ldr	r5, .L1044+4
+	ldr	r1, .L1044+8
+	ldr	r0, .L1044+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L1044+4
+	bl	ftl_memset
+.L1021:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L1023
+	ldr	r10, .L1044+48
+	movs	r4, #0
+	ldr	r7, .L1044+16
+	mov	r6, r4
+.L1024:
+	ldrh	r2, [r10]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L1026
+	ldr	r3, .L1044+20
+	ldr	r4, [r3]
+	cbz	r4, .L1027
+	ldr	r3, .L1044+24
+	mov	r8, #0
+	ldr	r5, .L1044+28
+	ldr	r10, .L1044+16
+	ldrh	r7, [r3]
+	ldr	r3, [r5]
+	ldr	fp, .L1044+4
+	subs	r4, r4, r3
+	ldr	r3, .L1044+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L1028:
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L1027
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L1029
+	movs	r6, #1
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L1044+36
+	bl	printf
+.L1029:
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L1028
+.L1027:
+	cbz	r6, .L1020
+	movw	r2, #2343
+	ldr	r1, .L1044+8
+	ldr	r0, .L1044+40
+	bl	printf
+.L1020:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1023:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L1022
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L1022:
+	adds	r4, r4, #1
+	b	.L1021
+.L1026:
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L1044+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L1025
+	mov	r1, r5
+	ldr	r0, .L1044+44
+	bl	printf
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L1025
+	ldrh	r2, [r8, r5, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L1025:
+	adds	r4, r4, #1
+	b	.L1024
+.L1045:
+	.align	2
+.L1044:
+	.word	.LANCHOR61
+	.word	check_vpc_table
+	.word	.LANCHOR161
+	.word	.LC94
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LC96
+	.word	.LC1
+	.word	.LC95
+	.word	.LANCHOR5
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",%progbits
 	.align	1
-	.global	FtlBbmTblFlush
+	.global	ftl_scan_all_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r4, #0
-	ldr	r7, .L1027
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L1060
+	sub	sp, sp, #32
 	movs	r1, #0
-	ldr	r5, .L1027+4
+	ldr	r8, .L1060+24
+	ldr	r0, .L1060+4
+	bl	printf
+.L1047:
 	ldr	r3, [r7]
-	mov	fp, r7
-	ldr	r8, .L1027+48
-	ldr	r6, .L1027+8
-	str	r3, [r5, #12]
-	ldr	r7, .L1027+12
-	ldr	r3, .L1027+16
-	ldr	r10, .L1027+52
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	str	r0, [r5, #8]
-	bl	ftl_memset
-.L1019:
-	ldrh	r3, [r7]
-	cmp	r4, r3
-	blt	.L1020
-	ldr	r6, [r5, #12]
-	movs	r2, #16
-	ldr	r4, .L1027+20
-	movs	r1, #255
-	movs	r7, #0
-	mov	r0, r6
-	bl	ftl_memset
-	movw	r3, #61649
-	mov	r10, r4
-	strh	r3, [r6]	@ movhi
-	ldr	r3, [r4, #8]
-	str	r7, [sp, #12]
-	str	r3, [r6, #4]
-	ldrh	r3, [r4]
-	strh	r3, [r6, #2]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r3, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #6]
-	strh	r3, [r6, #10]	@ movhi
-	ldr	r3, .L1027+24
-	ldr	r3, [r3]
-	strh	r3, [r6, #12]	@ movhi
-.L1021:
-	ldr	r3, [r8]
-	ldrh	r1, [r4]
-	ldrh	r2, [r4, #2]
-	str	r3, [r5, #8]
-	ldr	r3, [fp]
-	ldrh	r0, [r6, #10]
-	str	r3, [r5, #12]
-	movs	r3, #0
-	str	r3, [r5]
-	orr	r3, r2, r1, lsl #10
-	str	r3, [r5, #4]
-	ldrh	r3, [r4, #4]
-	str	r0, [sp]
-	ldr	r0, .L1027+28
+	cmp	r5, r3
+	bcc	.L1053
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1053:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L1048
+	ldr	r2, [sp, #28]
+	mov	r1, r5
+	mov	r0, r8
 	bl	printf
-	movs	r3, #1
-	ldr	r0, .L1027+4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1027+32
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1022
-	ldr	r3, [r4, #8]
-	mov	r1, #0	@ movhi
-	ldrh	r2, [r4]
-	strh	r1, [r4, #2]	@ movhi
-	adds	r3, r3, #1
+.L1048:
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L1050
+	ldr	r4, .L1060+8
+	movs	r2, #0
+	movs	r1, #1
+	str	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r3, .L1060+12
+	str	r5, [r4, #16]
+	str	r2, [r4]
+	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	str	r3, [r6, #4]
-	strh	r2, [r6, #8]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1027+36
-	strh	r3, [r4]	@ movhi
-	lsls	r3, r3, #10
-	ldr	r0, [r2]
-	movs	r2, #1
-	str	r3, [r5, #4]
-	mov	r1, r2
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1027+4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.L1022:
-	ldrh	r3, [r10, #2]
-	adds	r3, r3, #1
-	strh	r3, [r10, #2]	@ movhi
-	ldr	r3, [r5]
+	ldr	r3, .L1060+16
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L1051
 	adds	r3, r3, #1
-	bne	.L1023
-	adds	r7, r7, #1
-	ldr	r1, [r5, #4]
-	uxth	r7, r7
-	ldr	r0, .L1027+40
-	bl	printf
-	cmp	r7, #3
-	bls	.L1021
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1027+44
+	beq	.L1051
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L1050
+.L1051:
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L1060+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
 	bl	printf
-.L1025:
-	b	.L1025
-.L1020:
-	ldrh	r2, [r10]
-	ldr	r3, [r5, #8]
-	ldr	r1, [r6, #4]!
-	mul	r0, r2, r4
-	lsls	r2, r2, #2
-	adds	r4, r4, #1
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memcpy
-	b	.L1019
-.L1026:
-	movs	r3, #1
-	str	r3, [sp, #12]
-	b	.L1021
-.L1023:
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L1026
-	movs	r0, #0
-	add	sp, sp, #16
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1028:
+.L1050:
+	adds	r5, r5, #1
+	b	.L1047
+.L1061:
 	.align	2
-.L1027:
-	.word	.LANCHOR108
-	.word	.LANCHOR106
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR23
-	.word	.LANCHOR37
-	.word	.LANCHOR2
+.L1060:
+	.word	.LANCHOR61
 	.word	.LC97
-	.word	.LANCHOR20
-	.word	.LANCHOR111
-	.word	.LC98
+	.word	.LANCHOR148
+	.word	.LANCHOR115
+	.word	.LANCHOR123
 	.word	.LC99
-	.word	.LANCHOR107
-	.word	.LANCHOR137
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",%progbits
+	.word	.LC98
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
-	.global	allocate_data_superblock
+	.global	FtlGcScanTempBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1092
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #48
 	mov	r4, r0
-	ldr	r8, .L1067
-.L1030:
-	ldr	r3, .L1067
-	ldr	r6, .L1067+4
-	ldr	fp, .L1067+76
-	ldrh	r3, [r3]
-	ldrh	r2, [r6]
-	add	r3, r3, r2
-	ldrh	r2, [fp]
-	cmp	r3, r2
-	ble	.L1031
-	movw	r2, #2588
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1031:
-	ldr	r3, .L1067+16
-	cmp	r4, r3
-	bne	.L1056
-	ldr	r2, .L1067+20
-	ldrh	r3, [r8]
-	ldr	r2, [r2]
-	lsrs	r1, r3, #1
-	muls	r2, r3, r2
-	adds	r1, r1, #1
-	add	r1, r1, r2, lsr #2
-	uxth	r1, r1
-	cbz	r1, .L1032
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L1032:
-	ldr	r0, .L1067+24
-	bl	List_pop_index_node
-	ldrh	r3, [r8]
-	mov	r5, r0
-	uxth	r7, r0
-	cbnz	r3, .L1033
-	movw	r2, #2597
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1033:
-	ldrh	r3, [r8]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	strh	r7, [r4]	@ movhi
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1034
-	ldr	r3, .L1067+28
-	uxth	r5, r5
-	movw	r2, #65535
-	mov	r0, r7
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldrh	r2, [r6]
-	ldrh	r3, [r8]
-	add	r3, r3, r2
-	ldrh	r2, [fp]
-	cmp	r3, r2
-	ble	.L1030
-	mov	r2, #2608
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-	b	.L1030
-.L1056:
-	movs	r1, #0
-	b	.L1032
-.L1034:
-	ldrh	r2, [r6]
-	ldrh	r3, [r8]
-	add	r3, r3, r2
-	ldrh	r2, [fp]
+	str	r1, [sp, #8]
+	ldrh	r5, [r3]
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L1086
+	cbnz	r5, .L1063
+.L1064:
+	bl	FtlGcPageVarInit
+	b	.L1065
+.L1086:
+	movs	r5, #0
+.L1063:
+	ldr	r3, .L1092+4
+	ldr	r2, [sp, #8]
+	ldrh	r3, [r3]
 	cmp	r3, r2
-	ble	.L1036
-	movw	r2, #2611
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1036:
-	ldr	r3, .L1067+32
-	movs	r6, #0
-	ldr	r2, .L1067+36
-	add	ip, r4, #16
-	mov	lr, r6
-	movw	r10, #65535
-	ldr	r0, [r3]
-	ldrh	r1, [r2]
-	movs	r2, #20
-	str	r2, [sp, #4]
-	mov	r3, r0
-	mla	r1, r2, r1, r0
-	str	r1, [sp]
-.L1037:
-	ldr	r2, [sp]
+	beq	.L1064
+.L1065:
+	ldr	fp, .L1092+48
+	movs	r3, #0
+	str	r3, [sp]
+.L1066:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1039
-	cbnz	r6, .L1040
-	movw	r2, #2622
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1040:
-	ldr	r3, .L1067+40
+	beq	.L1067
+.L1083:
+	ldr	r3, .L1092+8
+	movs	r2, #0
+	ldr	r0, [fp]
+	mov	r7, r2
+	movw	lr, #65535
+	mov	r8, #20
+	ldrh	r10, [r3]
+	ldr	r3, .L1092+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1092+16
 	ldrh	r3, [r3]
-	cmp	r3, r7
-	bne	.L1041
-	mov	r2, #2624
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
-	bl	printf
-.L1041:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	uxth	r5, r5
-	ldr	r2, .L1067+44
-	ldr	r3, .L1067+48
-	ldr	r10, .L1067+80
-	cmp	r1, #0
-	bne	.L1042
-	ldr	r0, [r2]
-	ldrh	lr, [r0, r5, lsl #1]
-	cmp	lr, #0
-	beq	.L1043
-	ldr	r1, .L1067+52
-	ldrh	ip, [r1]
-	add	r1, lr, ip
-.L1066:
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r7
-	ldr	r1, [r3]
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	adds	r1, r1, #1
-	str	r1, [r3]
-	movs	r1, #0
-	bl	ftl_set_blk_mode
+	str	r3, [sp, #16]
+	ldr	r3, .L1092+20
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L1092+24
+	ldrh	ip, [r3]
+	add	r3, r4, #16
+	str	r3, [sp, #4]
+.L1068:
+	uxth	r3, r2
+	cmp	r10, r3
+	bhi	.L1070
+	mov	r10, #0
+	movs	r2, #0
+	mov	r1, r7
+	bl	FlashReadPages
+.L1071:
+	uxth	r3, r10
+	cmp	r7, r3
+	bhi	.L1081
 	ldr	r3, [sp]
-	ldr	r2, [sp, #4]
-.L1045:
-	ldr	r2, [r2]
-	lsls	r1, r5, #1
-	str	r1, [sp]
-	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1067+56
-	ldr	r1, [r2]
-	cmp	r0, r1
-	ldrh	r1, [fp]
-	it	hi
-	strhi	r0, [r2]
-	ldr	r2, .L1067+52
-	ldr	r0, [r3]
-	ldr	r3, [r10]
-	ldrh	r2, [r2]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-	ldr	r3, .L1067+60
-	ldr	ip, .L1067+84
-	str	r0, [r3]
-	ldr	r3, .L1067+64
-	ldr	r2, [r3]
-	ldr	r3, [r2, #16]
+	adds	r5, r5, #1
+	uxth	r5, r5
 	adds	r3, r3, #1
-	str	r3, [r2, #16]
-	movs	r2, #20
-	ldr	r3, .L1067+32
-	ldr	r0, [r3]
-	adds	r3, r0, #4
-	mla	r2, r2, r6, r0
-	adds	r2, r2, #24
-.L1047:
-	adds	r3, r3, #20
-	cmp	r2, r3
-	bne	.L1048
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r2, r6
-	mov	r10, #0
-	bl	FlashEraseBlocks
-	mov	r3, r10
-	movs	r1, #20
-.L1049:
-	uxth	r2, r10
-	cmp	r6, r2
-	bhi	.L1051
-	cbz	r3, .L1052
-	mov	r0, r7
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1052:
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1067+28
-	cmp	r2, #0
-	bne	.L1053
-	ldr	r3, [r1]
+	str	r3, [sp]
+	ldr	r2, [sp]
+	ldr	r3, [sp, #8]
+	cmp	r3, r2
+	ldr	r2, .L1092+4
+	bls	.L1082
+.L1084:
+	ldrh	r3, [r2]
+	cmp	r3, r5
+	bhi	.L1083
+.L1067:
+	ldr	r3, .L1092
 	movw	r2, #65535
-	mov	r0, r7
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	bl	INSERT_DATA_LIST
-	b	.L1030
-.L1039:
-	ldrh	r1, [ip], #2
-	str	lr, [r3, #8]
-	str	lr, [r3, #12]
-	cmp	r1, r10
-	beq	.L1038
-	ldr	r2, [sp, #4]
-	lsls	r1, r1, #10
-	mla	r2, r2, r6, r0
-	adds	r6, r6, #1
-	uxth	r6, r6
-	str	r1, [r2, #4]
-.L1038:
-	adds	r3, r3, #20
-	b	.L1037
-.L1043:
-	movs	r1, #2
-	b	.L1066
-.L1042:
-	ldr	r0, [r2]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	ldrh	r1, [r0, r5, lsl #1]
-	adds	r1, r1, #1
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	mov	r0, r7
-	ldr	r1, [r10]
-	adds	r1, r1, #1
-	str	r1, [r10]
-	bl	ftl_set_blk_mode.part.6
-	ldm	sp, {r2, r3}
-	b	.L1045
-.L1048:
-	ldr	r1, [r3, #-20]
-	and	r1, r1, ip
-	str	r1, [r3, #-20]
-	b	.L1047
-.L1051:
-	ldr	r0, .L1067+32
-	mul	r2, r1, r10
-	ldr	r0, [r0]
-	add	ip, r0, r2
-	ldr	r2, [r0, r2]
-	adds	r0, r2, #1
-	bne	.L1050
-	ldr	r0, [ip, #4]
-	adds	r3, r3, #1
-	str	r1, [sp, #12]
-	str	r2, [sp, #8]
-	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #4]
-	bl	FtlBbmMapBadBlock
-	ldr	r2, [sp, #8]
-	add	r0, r4, r10, lsl #1
-	ldr	r1, [sp, #12]
-	ldr	r3, [sp, #4]
-	strh	r2, [r0, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
-.L1050:
-	add	r10, r10, #1
-	b	.L1049
-.L1053:
-	ldr	r3, .L1067+68
-	ldr	r0, .L1067+72
-	ldrh	r3, [r3]
-	strh	r7, [r4]	@ movhi
-	smulbb	r3, r3, r2
+	strh	r5, [r4, #2]	@ movhi
+	mov	r1, r5
+	mov	r0, r4
+	strh	r2, [r3]	@ movhi
 	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
-	ldr	r2, [r0]
-	uxth	r3, r3
-	strh	r3, [r4, #4]	@ movhi
-	str	r2, [r4, #12]
+	bl	ftl_sb_update_avl_pages
+	b	.L1085
+.L1070:
+	ldr	r1, [sp, #4]
+	ldrh	r3, [r1], #2
+	cmp	r3, lr
+	str	r1, [sp, #4]
+	beq	.L1069
+	mla	r1, r8, r7, r0
+	ldr	r6, [sp, #12]
+	orr	r3, r5, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #16]
+	muls	r3, r7, r3
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	ldr	r6, [sp, #20]
+	str	r3, [r1, #8]
+	mul	r3, ip, r7
+	adds	r7, r7, #1
+	uxth	r7, r7
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+.L1069:
 	adds	r2, r2, #1
-	str	r2, [r0]
-	ldr	r2, [r1]
-	ldr	r1, [sp]
-	strh	r3, [r2, r1]	@ movhi
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1054
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1055
-.L1054:
-	movw	r2, #2677
-	ldr	r1, .L1067+8
-	ldr	r0, .L1067+12
+	b	.L1068
+.L1081:
+	movs	r3, #20
+	ldr	r1, [fp]
+	mul	r3, r3, r10
+	adds	r2, r1, r3
+	ldr	r6, [r1, r3]
+	ldr	r0, [r2, #4]
+	str	r0, [sp, #4]
+	cmp	r6, #0
+	bne	.L1072
+	ldr	r8, [r2, #12]
+	movw	r1, #65535
+	ldrh	r2, [r8]
+	cmp	r2, r1
+	bne	.L1073
+	ldr	r3, .L1092+28
+	ldrh	r1, [r4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	strh	r6, [r3, r1, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	ldr	r2, [sp, #4]
+	strh	r2, [r4]	@ movhi
+.L1091:
+	bl	FtlGcPageVarInit
+	movs	r5, #0
+	b	.L1066
+.L1073:
+	mov	r2, r6
+	add	r1, sp, #24
+	ldr	r0, [r8, #8]
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r2, [r8, #12]
+	ldr	r1, [sp, #24]
+	ldr	r3, [sp, #12]
+	cmp	r2, r1
+	beq	.L1075
+.L1079:
+	ldr	r2, [r8, #8]
+	add	r10, r10, #1
+	ldr	r1, [sp, #4]
+	ldr	r0, [r8, #12]
+	bl	FtlGcUpdatePage
+	b	.L1071
+.L1075:
+	str	r3, [sp, #12]
+	movs	r1, #1
+	ldr	r3, .L1092+32
+	add	r0, sp, #28
+	str	r2, [sp, #32]
+	ldr	r2, [r3]
+	str	r2, [sp, #36]
+	ldr	r2, .L1092+36
+	ldr	r2, [r2]
+	str	r2, [sp, #40]
+	mov	r2, r6
+	bl	FlashReadPages
+	ldr	r2, .L1092+40
+	ldr	r1, [fp]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	ldr	r0, [sp, #36]
+	add	ip, r3, r1
+	lsls	r2, r2, #7
+.L1076:
+	cmp	r6, r2
+	beq	.L1079
+	ldr	r1, [ip, #8]
+	ldr	r3, [r0, r6, lsl #2]
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r1, r3
+	beq	.L1077
+	ldr	r2, [sp, #32]
+	ldrh	r1, [r4]
+	ldr	r0, .L1092+44
 	bl	printf
-.L1055:
-	movs	r0, #0
-	add	sp, sp, #16
+.L1072:
+	ldr	r3, .L1092+28
+	movs	r1, #0
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	b	.L1091
+.L1077:
+	adds	r6, r6, #1
+	b	.L1076
+.L1082:
+	ldr	r1, .L1092
+	movw	r0, #65535
+	ldrh	r3, [r1]
+	cmp	r3, r0
+	beq	.L1084
+	ldr	r0, [sp]
+	add	r3, r3, r0
+	strh	r3, [r1]	@ movhi
+	ldrh	r3, [r2]
+	cmp	r3, r5
+	bls	.L1084
+.L1085:
+	mov	r0, #-1
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1068:
+.L1093:
 	.align	2
-.L1067:
-	.word	.LANCHOR48
-	.word	.LANCHOR45
-	.word	.LANCHOR157
-	.word	.LC1
-	.word	.LANCHOR53
-	.word	.LANCHOR87
-	.word	.LANCHOR47
-	.word	.LANCHOR42
-	.word	.LANCHOR111
-	.word	.LANCHOR3
-	.word	.LANCHOR80
-	.word	.LANCHOR43
-	.word	.LANCHOR72
-	.word	.LANCHOR14
-	.word	.LANCHOR76
-	.word	.LANCHOR74
-	.word	.LANCHOR127
+.L1092:
+	.word	.LANCHOR162
 	.word	.LANCHOR19
-	.word	.LANCHOR70
-	.word	.LANCHOR5
-	.word	.LANCHOR73
-	.word	-1024
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.word	.LANCHOR3
+	.word	.LANCHOR91
+	.word	.LANCHOR23
+	.word	.LANCHOR92
+	.word	.LANCHOR24
+	.word	.LANCHOR42
+	.word	.LANCHOR119
+	.word	.LANCHOR124
+	.word	.LANCHOR12
+	.word	.LC100
+	.word	.LANCHOR112
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlReadRefresh,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeBadSuperBlk
+	.global	FtlReadRefresh
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
-	ldr	r4, .L1081
-	ldrh	r3, [r4]
-	cbz	r3, .L1070
-	ldr	r8, .L1081+16
-	movs	r6, #0
-.L1071:
-	ldr	r3, .L1081+4
-	ldrh	r2, [r3]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L1077
-	bl	FtlGcReFreshBadBlk
-.L1070:
-	movs	r0, #0
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1077:
-	ldr	r2, .L1081+8
-	uxth	r3, r6
-	mov	r1, r10
-	movs	r7, #0
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-	ldr	r2, .L1081+12
-	mov	fp, r0
-.L1072:
-	ldrh	r3, [r4]
-	uxth	r5, r7
-	cmp	r3, r5
-	bhi	.L1076
-	adds	r6, r6, #1
-	b	.L1071
-.L1076:
-	uxth	r3, r7
-	ldrh	r1, [r8, r3, lsl #1]
-	cmp	r1, fp
-	bne	.L1073
-	mov	r1, fp
-	mov	r0, r2
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	bl	printf
-	mov	r0, fp
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [sp, #4]
-	ldrh	r1, [r4]
+	ldr	r3, .L1107
+	push	{r4, r5, r6, lr}
+	sub	sp, sp, #88
+	mov	r4, r3
+	ldr	r0, [r3, #80]
+	cmp	r0, #0
+	beq	.L1095
+	ldr	r6, .L1107+4
+	ldr	r0, [r3, #84]
+	ldr	r1, [r6]
+	cmp	r0, r1
+	bcs	.L1096
+	mov	r5, #2048
+.L1101:
+	ldr	r0, [r4, #84]
+	ldr	r3, [r6]
+	cmp	r0, r3
+	bcs	.L1098
+	movs	r2, #0
+	mov	r1, sp
+	bl	log2phys
 	ldr	r2, [sp]
-	add	r3, r8, r3, lsl #1
-.L1074:
-	cmp	r5, r1
-	bcc	.L1075
-	subs	r1, r1, #1
-	strh	r1, [r4]	@ movhi
-.L1073:
-	adds	r7, r7, #1
-	b	.L1072
-.L1075:
-	ldrh	r0, [r3, #2]!
-	adds	r5, r5, #1
-	uxth	r5, r5
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1074
-.L1082:
+	ldr	r3, [r4, #84]
+	adds	r1, r2, #1
+	add	r3, r3, #1
+	str	r3, [r4, #84]
+	beq	.L1099
+	str	r3, [sp, #20]
+	add	r0, sp, #88
+	ldr	r3, .L1107+8
+	movs	r1, #1
+	str	r2, [sp, #8]
+	movs	r2, #0
+	str	r2, [r0, #-84]!
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	cmp	r3, #256
+	bne	.L1098
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+.L1098:
+	mov	r0, #-1
+.L1094:
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L1099:
+	subs	r5, r5, #1
+	bne	.L1101
+	b	.L1098
+.L1096:
+	ldr	r2, .L1107+12
+	movs	r0, #0
+	str	r0, [r3, #80]
+	str	r0, [r3, #84]
+	ldr	r2, [r2]
+	str	r2, [r3, #76]
+	b	.L1094
+.L1095:
+	ldr	r1, [r3, #76]
+	ldr	r3, .L1107+12
+	ldr	r5, [r3]
+	add	r3, r5, #1048576
+	cmp	r1, r3
+	bhi	.L1104
+	ldr	r3, .L1107+16
+	ldr	r2, [r3]
+	mov	r3, #33554432
+	lsrs	r2, r2, #10
+	asrs	r3, r3, r2
+	add	r3, r3, r1
+	cmp	r5, r3
+	bhi	.L1104
+	ldr	r3, .L1107+20
+	ldrb	r3, [r3, #28]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1094
+.L1104:
+	movs	r3, #1
+	movs	r0, #0
+	str	r3, [r4, #80]
+	str	r0, [r4, #84]
+	str	r5, [r4, #76]
+	b	.L1094
+.L1108:
 	.align	2
-.L1081:
-	.word	.LANCHOR101
-	.word	.LANCHOR3
-	.word	.LANCHOR13
-	.word	.LC100
-	.word	.LANCHOR102
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
+.L1107:
+	.word	.LANCHOR81
+	.word	.LANCHOR61
+	.word	.LANCHOR121
+	.word	.LANCHOR62
+	.word	.LANCHOR76
+	.word	.LANCHOR39
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
 	.align	1
-	.global	update_vpc_list
+	.global	FtlMapBlkWriteDump_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	update_vpc_list, %function
-update_vpc_list:
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L1093
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L1084
-	ldr	r2, .L1093+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L1085
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L1086:
-	ldr	r5, .L1093+8
-	mov	r1, r4
-	ldr	r0, .L1093+12
-	bl	List_remove_node
-	ldrh	r3, [r5]
-	cbnz	r3, .L1088
-	movw	r2, #2747
-	ldr	r1, .L1093+16
-	ldr	r0, .L1093+20
-	bl	printf
-.L1088:
-	ldrh	r3, [r5]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	bl	free_data_superblock
-	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1093+24
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldr	r2, .L1093+28
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1092
-	movw	r2, #2750
-	ldr	r1, .L1093+16
-	ldr	r0, .L1093+20
-	bl	printf
-.L1092:
-	movs	r3, #1
-	b	.L1083
-.L1085:
-	ldr	r2, .L1093+32
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1083
-	ldr	r2, .L1093+36
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1083
-	ldr	r2, .L1093+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L1086
-.L1083:
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.L1084:
-	bl	List_update_data_list
+	ldr	r3, [r0, #36]
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	cbz	r3, .L1109
+	ldrh	r5, [r0, #6]
 	movs	r3, #0
-	b	.L1083
-.L1094:
+	ldr	r2, [r0, #24]
+	str	r3, [r0, #36]
+	subs	r5, r5, #1
+	ldr	r3, .L1113
+	ldr	r1, .L1113+4
+	uxth	r5, r5
+	ldr	r4, .L1113+8
+	ldr	r2, [r2, r5, lsl #2]
+	ldr	r0, [r3]
+	ldr	r1, [r1]
+	str	r2, [r4, #4]
+	str	r0, [r4, #8]
+	str	r1, [r4, #12]
+	cbz	r2, .L1111
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashReadPages
+.L1112:
+	ldr	r2, [r4, #8]
+	mov	r1, r5
+	mov	r0, r6
+	pop	{r4, r5, r6, lr}
+	b	FtlMapWritePage
+.L1111:
+	ldr	r3, .L1113+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L1112
+.L1109:
+	pop	{r4, r5, r6, pc}
+.L1114:
 	.align	2
-.L1093:
-	.word	.LANCHOR42
-	.word	.LANCHOR80
-	.word	.LANCHOR45
-	.word	.LANCHOR41
-	.word	.LANCHOR158
-	.word	.LC1
-	.word	.LANCHOR48
-	.word	.LANCHOR5
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
+.L1113:
+	.word	.LANCHOR116
+	.word	.LANCHOR123
+	.word	.LANCHOR148
+	.word	.LANCHOR23
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
-	.global	decrement_vpc_count
+	.global	FlashTestBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	push	{r4, r5, r6, lr}
-	cmp	r0, r3
+	cmp	r0, #11
+	push	{r4, r5, lr}
 	mov	r4, r0
-	beq	.L1096
-	ldr	r5, .L1104
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1097
-	mov	r1, r0
-	ldr	r0, .L1104+4
-	bl	printf
+	sub	sp, sp, #92
+	bls	.L1117
+	ldr	r5, .L1118
+	add	r0, sp, #24
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r4, r4, #10
 	ldr	r3, [r5]
-	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1098
-.L1102:
-	movs	r5, #0
-.L1095:
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.L1098:
-	movw	r2, #2765
-.L1103:
-	ldr	r1, .L1104+8
-	ldr	r0, .L1104+12
-	bl	printf
-	b	.L1095
-.L1097:
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1096:
-	ldr	r6, .L1104+16
-	movw	r3, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r3
-	bne	.L1100
-	strh	r4, [r6]	@ movhi
-	b	.L1102
-.L1100:
-	cmp	r4, r0
-	beq	.L1102
-	bl	update_vpc_list
-	ldr	r3, .L1104+20
-	adds	r5, r0, #0
-	ldr	r2, .L1104+24
+	str	r3, [sp, #12]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r4, [sp, #8]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r4, [sp, #4]
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	adds	r4, r4, #0
 	it	ne
-	movne	r5, #1
-	strh	r4, [r6]	@ movhi
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1104+28
-	muls	r3, r2, r3
-	ldr	r2, .L1104
-	ldr	r2, [r2]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
-	cmp	r2, #0
-	bne	.L1095
-	cmp	r4, r1
-	beq	.L1095
-	movw	r2, #2781
-	b	.L1103
-.L1105:
+	movne	r4, #1
+	negs	r4, r4
+	bl	FlashEraseBlocks
+.L1115:
+	mov	r0, r4
+	add	sp, sp, #92
+	@ sp needed
+	pop	{r4, r5, pc}
+.L1117:
+	movs	r4, #0
+	b	.L1115
+.L1119:
 	.align	2
-.L1104:
-	.word	.LANCHOR42
-	.word	.LC101
-	.word	.LANCHOR159
-	.word	.LC1
-	.word	.LANCHOR150
-	.word	.LANCHOR41
-	.word	.LANCHOR40
-	.word	-1431655765
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.FtlWriteDump_data,"ax",%progbits
+.L1118:
+	.word	.LANCHOR121
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlWriteDump_data
+	.global	FtlBbmTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldr	r4, .L1125
-	ldrh	r2, [r4, #4]
-	cmp	r2, #0
-	beq	.L1107
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1107
-	ldr	r3, .L1125+4
-	ldrb	r1, [r4, #7]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1107
-	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1106
-	ldr	r3, .L1125+8
-	mov	r2, r7
-	mov	r1, sp
-	ldr	r6, [r3]
-	ldr	r3, .L1125+12
-	subs	r6, r6, #1
-	mov	r0, r6
-	ldrh	r8, [r3]
-	bl	log2phys
-	ldr	r2, .L1125+16
-	ldr	r3, [sp]
-	str	r6, [sp, #20]
-	ldr	r0, [r2]
-	ldr	r2, .L1125+20
-	str	r3, [sp, #8]
-	adds	r3, r3, #1
-	str	r0, [sp, #12]
-	ldr	r5, [r2]
-	str	r5, [sp, #16]
-	str	r7, [r5, #4]
-	beq	.L1109
-	mov	r2, r7
-	movs	r1, #1
-	add	r0, sp, #4
-	bl	FlashReadPages
-.L1110:
-	ldr	fp, .L1125
-	lsl	r8, r8, #2
-	ldr	r10, .L1125+28
-	movs	r7, #0
-	movw	r3, #61589
-	strh	r3, [r5]	@ movhi
-.L1111:
-	cmp	r8, r7
-	bne	.L1115
-.L1112:
-	movs	r3, #1
-.L1124:
-	strb	r3, [r4, #10]
-.L1106:
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1109:
-	ldr	r3, .L1125+24
-	movs	r1, #255
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r7, .L1129
+	movs	r1, #0
+	ldr	r5, .L1129+4
+	ldr	r3, [r7]
+	mov	fp, r7
+	ldr	r8, .L1129+48
+	ldr	r6, .L1129+8
+	str	r3, [r5, #12]
+	ldr	r7, .L1129+12
+	ldr	r3, .L1129+16
+	ldr	r10, .L1129+52
+	ldr	r0, [r8]
 	ldrh	r2, [r3]
+	str	r0, [r5, #8]
 	bl	ftl_memset
-	b	.L1110
-.L1115:
+.L1121:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1122
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L1129+20
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #12]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
 	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	beq	.L1112
-	ldr	r3, [sp, #8]
-	mov	r0, fp
-	str	r6, [r5, #8]
-	adds	r7, r7, #1
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L1129+24
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L1123:
+	ldr	r3, [r8]
+	ldrh	r2, [r4, #2]
+	ldrh	r1, [r4]
+	str	r3, [r5, #8]
+	ldr	r3, [fp]
+	ldrh	r0, [r6, #10]
 	str	r3, [r5, #12]
-	ldrh	r3, [r4]
-	strh	r3, [r5, #2]	@ movhi
-	bl	get_new_active_ppa
-	ldr	r3, [r10]
-	movs	r1, #1
-	str	r0, [sp, #8]
-	add	r0, sp, #4
+	movs	r3, #0
+	str	r3, [r5]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1129+28
+	bl	printf
+	ldr	r3, .L1129+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1124
+	ldr	r3, [r4, #8]
+	mov	r1, #0	@ movhi
+	ldrh	r2, [r4]
+	strh	r1, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1129+36
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
+	movs	r2, #1
 	str	r3, [r5, #4]
-	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, #0
-	str	r3, [r10]
-	movs	r3, #0
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+.L1124:
+	movs	r3, #1
+	ldr	r0, .L1129+4
 	mov	r2, r3
+	mov	r1, r3
 	bl	FlashProgPages
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	b	.L1111
-.L1107:
-	movs	r3, #0
-	b	.L1124
-.L1126:
-	.align	2
-.L1125:
-	.word	.LANCHOR51
-	.word	.LANCHOR19
-	.word	.LANCHOR61
-	.word	.LANCHOR3
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR23
-	.word	.LANCHOR71
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",%progbits
-	.align	1
-	.global	l2p_flush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	l2p_flush, %function
-l2p_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r4, #0
-	ldr	r5, .L1131
-	ldr	r6, .L1131+4
-	bl	FtlWriteDump_data
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1125
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L1129+40
+	bl	printf
+	cmp	r7, #3
+	bls	.L1123
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1129+44
+	bl	printf
+.L1127:
+	b	.L1127
+.L1122:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	adds	r4, r4, #1
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L1121
 .L1128:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	cmp	r3, r0
-	bhi	.L1130
+	movs	r3, #1
+	str	r3, [sp, #12]
+	b	.L1123
+.L1125:
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L1128
 	movs	r0, #0
-	pop	{r4, r5, r6, pc}
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1130:
-	ldr	r2, [r6]
-	uxth	r3, r4
-	movs	r1, #12
-	mla	r3, r1, r3, r2
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L1129
-	bl	flush_l2p_region
-.L1129:
-	adds	r4, r4, #1
-	b	.L1128
-.L1132:
 	.align	2
-.L1131:
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+.L1129:
+	.word	.LANCHOR123
+	.word	.LANCHOR148
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR23
+	.word	.LANCHOR37
+	.word	.LANCHOR2
+	.word	.LC101
+	.word	.LANCHOR20
+	.word	.LANCHOR106
+	.word	.LC102
+	.word	.LC103
+	.word	.LANCHOR115
+	.word	.LANCHOR137
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	FtlRecoverySuperblock
+	.global	allocate_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	@ args = 0, pretend = 0, frame = 48
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0]
-	movw	r2, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r0
-	sub	sp, sp, #48
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+.L1132:
+	ldr	r3, .L1171
+	ldr	r8, .L1171+68
+	ldrh	r3, [r3]
+	ldr	r10, .L1171+72
+	ldrh	r2, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
 	cmp	r3, r2
-	beq	.L1262
-	ldrh	r3, [r0, #2]
-	str	r3, [sp, #4]
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #20]
-	ldr	r3, .L1270
+	ble	.L1133
+	movw	r2, #2615
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+.L1133:
+	ldr	r3, .L1171+12
+	cmp	r4, r3
+	bne	.L1159
+	ldr	r3, .L1171
+	ldr	r2, .L1171+16
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	lsrs	r1, r3, #1
+	muls	r2, r3, r2
+	adds	r1, r1, #1
+	add	r1, r1, r2, lsr #2
+	uxth	r1, r1
+	cbz	r1, .L1134
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L1134:
+	ldr	r0, .L1171+20
+	bl	List_pop_index_node
+	ldr	r3, .L1171
+	mov	r5, r0
+	uxth	r7, r0
+	ldrh	r3, [r3]
+	cbnz	r3, .L1135
+	mov	r2, #2624
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+.L1135:
+	ldr	r3, .L1171
+	ldr	r2, .L1171
 	ldrh	r3, [r3]
-	cmp	r3, r1
-	mov	r3, #0
-	bne	.L1136
-	strh	r3, [r0, #4]	@ movhi
-.L1268:
-	strb	r3, [r8, #6]
-.L1262:
-	movs	r0, #0
-	add	sp, sp, #48
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1136:
-	ldrh	r0, [r0, #16]
-.L1137:
-	cmp	r0, r2
-	uxth	r5, r3
-	add	r3, r3, #1
-	beq	.L1138
-	movs	r1, #1
-	bl	FtlGetLastWrittenPage
-	mov	r4, r0
-	adds	r0, r0, #1
-	beq	.L1139
-	ldr	r3, .L1270+4
-	movs	r2, #0
-	mov	r5, r2
-	movw	fp, #65535
-	mov	r10, #20
-	ldrh	ip, [r3]
-	ldr	r3, .L1270+8
-	ldr	r0, [r3]
-	ldr	r3, .L1270+12
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L1270+16
-	ldrh	r7, [r3]
-	ldr	r3, .L1270+20
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L1270+24
-	ldrh	lr, [r3]
-	add	r3, r8, #16
-	str	r3, [sp, #16]
-	str	r3, [sp]
-.L1140:
-	uxth	r3, r2
-	cmp	ip, r3
-	bhi	.L1144
-	movs	r2, #0
-	mov	r1, r5
-	bl	FlashReadPages
-	ldr	r2, .L1270+28
-	uxth	r1, r4
-	movw	fp, #65535
-	str	r1, [sp, #12]
-	ldr	r3, [r2]
 	subs	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldrh	r3, [r10]
+	cmp	r3, r7
+	bls	.L1132
+	uxth	r5, r5
+	lsls	r3, r5, #1
 	str	r3, [sp]
-	ldr	r3, .L1270+8
-	ldr	r10, [r3]
-	movs	r3, #0
-	mov	r7, r10
-.L1145:
-	uxth	r1, r3
-	cmp	r5, r1
-	bhi	.L1150
-	bne	.L1148
-	adds	r3, r4, #1
-	uxth	r3, r3
-	str	r3, [sp, #8]
-.L1263:
-	ldr	r0, [r10, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
-	ldr	r3, .L1270
-	mov	r10, r0
-	ldr	r2, [sp, #8]
+	ldr	r3, .L1171+24
+	ldr	r3, [r3]
+	ldrh	r6, [r3, r5, lsl #1]
+	cmp	r6, #0
+	bne	.L1132
+	strh	r7, [r4]	@ movhi
+	mov	r0, r4
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1137
+	ldr	r3, .L1171+24
+	movw	r2, #65535
+	mov	r0, r7
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L1171
+	ldrh	r2, [r8]
 	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
 	cmp	r3, r2
-	bne	.L1152
-	ldrh	r3, [sp, #8]
-	strh	r3, [r8, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r8, #6]
-	strh	r3, [r8, #4]	@ movhi
-.L1152:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #4]
+	ble	.L1132
+	movw	r2, #2638
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+	b	.L1132
+.L1159:
+	movs	r1, #0
+	b	.L1134
+.L1137:
+	ldr	r3, .L1171
+	ldrh	r2, [r8]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldrh	r2, [r10]
 	cmp	r3, r2
-	bne	.L1153
-	ldr	r3, [sp, #20]
-	cmp	r10, r3
-	bne	.L1153
-	ldr	r1, [sp, #8]
-	mov	r2, r10
-.L1269:
-	mov	r0, r8
-	bl	ftl_sb_update_avl_pages
-	b	.L1262
-.L1138:
-	uxth	r1, r3
-	adds	r1, r1, #8
-	ldrh	r0, [r8, r1, lsl #1]
-	b	.L1137
+	ble	.L1139
+	movw	r2, #2641
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
 .L1139:
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1141
-	movw	r2, #1755
-	ldr	r1, .L1270+32
-	ldr	r0, .L1270+36
+	ldr	r3, .L1171+28
+	add	lr, r4, #16
+	ldr	r2, .L1171+32
+	mov	r8, #0
+	ldr	ip, [r3]
+	ldrh	r0, [r2]
+	movs	r2, #20
+	mov	r3, ip
+	mla	r0, r2, r0, ip
+.L1140:
+	cmp	r0, r3
+	bne	.L1142
+	cbnz	r6, .L1143
+	movw	r2, #2652
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
 	bl	printf
-.L1141:
-	ldr	r3, [sp, #20]
-	cbz	r3, .L1142
-	cmp	r5, r3
-	beq	.L1142
-	movw	r2, #1756
-	ldr	r1, .L1270+32
-	ldr	r0, .L1270+36
+.L1143:
+	ldr	r3, .L1171+36
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bne	.L1144
+	movw	r2, #2654
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
 	bl	printf
-.L1142:
-	movs	r3, #0
-	strh	r3, [r8, #2]	@ movhi
-	b	.L1268
 .L1144:
-	ldr	r1, [sp]
-	ldrh	r3, [r1], #2
-	cmp	r3, fp
-	str	r1, [sp]
-	beq	.L1143
-	mla	r1, r10, r5, r0
-	ldr	r6, [sp, #8]
-	orr	r3, r4, r3, lsl #10
-	str	r3, [r1, #4]
-	mul	r3, r7, r5
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	ldr	r6, [sp, #12]
-	str	r3, [r1, #8]
-	mul	r3, lr, r5
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r3, r3, #3
-	add	r3, r3, r6
-	str	r3, [r1, #12]
-.L1143:
-	adds	r2, r2, #1
-	b	.L1140
-.L1150:
-	ldr	r1, [r7]
-	cbnz	r1, .L1146
-	ldr	r1, [r7, #12]
-	ldr	r6, [r1, #4]
-	str	r1, [sp, #8]
-	adds	r1, r6, #1
-	beq	.L1147
-	ldr	r1, [r2]
-	mov	r0, r6
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1147
-	adds	r6, r6, #1
-	str	r6, [r2]
-.L1147:
-	ldr	r1, [sp, #8]
-	ldr	r1, [r1]
-	adds	r1, r1, #1
-	bne	.L1149
-.L1148:
-	uxth	r2, r4
-	uxth	r3, r3
-	str	r2, [sp, #8]
-	movs	r2, #20
-	mla	r10, r2, r3, r10
-	b	.L1263
-.L1146:
-	ldr	fp, [sp, #12]
-.L1149:
-	adds	r3, r3, #1
-	adds	r7, r7, #20
-	b	.L1145
-.L1153:
-	movw	r3, #65535
-	cmp	fp, r3
-	bne	.L1154
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1155
-.L1154:
-	ldr	r3, .L1270+40
-	uxth	r6, r4
-	uxth	r4, r4
-	ldr	r7, .L1270+8
-	ldr	r2, [r3]
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, .L1171+40
+	ldr	fp, .L1171+76
+	ldr	r8, .L1171+80
+	ldr	r1, [r3]
+	cmp	r2, #0
+	bne	.L1145
+	ldrh	r2, [r1, r5, lsl #1]
+	cmp	r2, #0
+	beq	.L1146
+	ldr	r0, .L1171+44
+	ldrh	r0, [r0]
+	add	r2, r2, r0
+.L1169:
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	mov	r0, r7
+	ldr	r2, [fp]
+	movs	r1, #0
+	str	r3, [sp, #4]
 	adds	r2, r2, #1
-	itt	eq
-	ldreq	r2, [sp]
-	streq	r2, [r3]
+	str	r2, [fp]
+	bl	ftl_set_blk_mode
+.L1170:
 	ldr	r3, [sp, #4]
-	adds	r3, r3, #7
-	cmp	r4, r3
-	itet	gt
-	subgt	r4, r6, #7
-	ldrle	r4, [sp, #4]
-	uxthgt	r4, r4
-.L1158:
-	cmp	r4, r6
-	bhi	.L1168
-	ldr	r3, .L1270+4
-	movw	lr, #65535
-	ldr	r0, [r7]
-	mov	ip, #20
-	ldrh	fp, [r3]
-	ldr	r3, [sp, #16]
-	str	r3, [sp, #12]
-	movs	r3, #0
-	mov	r5, r3
-	b	.L1169
-.L1160:
-	ldr	r1, [sp, #12]
-	ldrh	r2, [r1], #2
-	cmp	r2, lr
-	str	r1, [sp, #12]
-	beq	.L1159
-	mla	r1, ip, r5, r0
-	adds	r5, r5, #1
-	orr	r2, r4, r2, lsl #10
-	uxth	r5, r5
-	str	r2, [r1, #4]
-.L1159:
-	adds	r3, r3, #1
-.L1169:
-	uxth	r2, r3
-	cmp	fp, r2
-	bhi	.L1160
-	mov	r1, r5
-	movs	r2, #0
-	bl	FlashReadPages
-	ldr	r3, .L1270+40
-	movs	r1, #20
-	movs	r0, #0
-	movw	ip, #65535
+	ldr	r0, [fp]
+	ldr	r3, [r3]
+	ldrh	r1, [r3, r5, lsl #1]
+	ldr	r3, .L1171+48
 	ldr	r2, [r3]
-	ldr	r3, [r7]
-	mla	r5, r1, r5, r3
-.L1161:
-	cmp	r3, r5
-	bne	.L1166
-	cbz	r0, .L1167
-	ldr	r3, .L1270+40
-	str	r2, [r3]
-.L1167:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1158
-.L1271:
-	.align	2
-.L1270:
-	.word	.LANCHOR19
-	.word	.LANCHOR3
-	.word	.LANCHOR120
-	.word	.LANCHOR91
-	.word	.LANCHOR23
-	.word	.LANCHOR92
-	.word	.LANCHOR24
-	.word	.LANCHOR71
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	.LANCHOR153
-.L1166:
-	ldr	r1, [r3]
-	cmp	r1, #0
-	beq	.L1162
-	cbz	r0, .L1155
-.L1264:
-	ldr	r3, .L1272
-	str	r2, [r3]
-.L1155:
-	ldr	r3, .L1272+4
-	movs	r2, #1
-	ldr	r0, .L1272+8
-	ldr	r6, .L1272+12
-	strh	r2, [r3]	@ movhi
-	bl	FtlMapBlkWriteDump_data
-	ldr	fp, [sp, #4]
-.L1170:
-	ldr	r3, .L1272+16
-	movw	lr, #65535
-	ldr	r0, [r6]
-	movs	r7, #20
-	ldr	r1, [sp, #16]
-	ldrh	r4, [r3]
-	movs	r3, #0
-	str	r3, [sp, #12]
-.L1171:
-	uxth	r2, r3
-	cmp	r2, r4
-	bcc	.L1173
-	movs	r2, #0
-	ldr	r1, [sp, #12]
-	bl	FlashReadPages
-	movs	r3, #0
-.L1267:
-	str	r3, [sp, #24]
-	ldr	r2, [sp, #12]
-	ldrh	r3, [sp, #24]
-	cmp	r2, r3
-	bhi	.L1202
-	ldr	r3, .L1272+20
-	add	fp, fp, #1
-	uxth	fp, fp
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L1170
-	ldr	r2, .L1272+16
-	movw	r0, #65535
-	movs	r3, #0
-	strh	fp, [r8, #2]	@ movhi
-	strh	r3, [r8, #4]	@ movhi
-	ldrh	r2, [r2]
-.L1203:
-	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1262
-	ldr	r1, [sp, #16]
-	ldrh	r4, [r1], #2
-	cmp	r4, r0
-	str	r1, [sp, #16]
-	add	r1, r3, #1
-	bne	.L1268
-	mov	r3, r1
-	b	.L1203
-.L1162:
-	ldr	r1, [r3, #12]
-	ldrh	lr, [r1]
-	cmp	lr, ip
-	beq	.L1165
-	ldr	r1, [r1, #4]
-	cmp	r1, #-1
-	itt	ne
-	movne	r2, r1
-	movne	r0, #1
-.L1165:
+	it	hi
+	strhi	r1, [r3]
+	ldr	r3, .L1171+44
+	ldrh	r1, [r10]
+	ldrh	r2, [r3]
+	ldr	r3, [r8]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L1171+52
+	ldr	ip, .L1171+84
+	str	r0, [r3]
+	ldr	r3, .L1171+56
+	ldr	r2, [r3]
+	ldr	r3, [r2, #16]
+	adds	r3, r3, #1
+	str	r3, [r2, #16]
+	movs	r2, #20
+	ldr	r3, .L1171+28
+	ldr	r0, [r3]
+	adds	r3, r0, #4
+	mla	r2, r2, r6, r0
+	adds	r2, r2, #24
+.L1150:
 	adds	r3, r3, #20
-	b	.L1161
-.L1168:
-	mov	r2, #-1
-	b	.L1264
-.L1173:
-	ldrh	r2, [r1], #2
-	cmp	r2, lr
-	beq	.L1172
-	ldr	r5, [sp, #12]
-	orr	r2, fp, r2, lsl #10
-	mla	ip, r7, r5, r0
-	str	r2, [ip, #4]
-	mov	r2, r5
+	cmp	r2, r3
+	bne	.L1151
+	mov	r2, r6
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r8, #0
+	bl	FlashEraseBlocks
+	mov	r10, r8
+	movs	r3, #20
+.L1152:
+	uxth	r2, r8
+	cmp	r6, r2
+	bhi	.L1154
+	cmp	r10, #0
+	beq	.L1155
+	mov	r0, r7
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1155:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	cmp	r2, #0
+	bne	.L1156
+	ldr	r3, .L1171+24
+	movw	r2, #65535
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1132
+.L1142:
+	ldrh	r1, [lr], #2
+	movw	fp, #65535
+	str	r8, [r3, #8]
+	str	r8, [r3, #12]
+	cmp	r1, fp
+	beq	.L1141
+	mla	fp, r2, r6, ip
+	adds	r6, r6, #1
+	lsls	r1, r1, #10
+	uxth	r6, r6
+	str	r1, [fp, #4]
+.L1141:
+	adds	r3, r3, #20
+	b	.L1140
+.L1146:
+	movs	r2, #2
+	b	.L1169
+.L1145:
+	ldrh	r2, [r1, r5, lsl #1]
+	mov	r0, r7
+	str	r3, [sp, #4]
+	adds	r2, r2, #1
+	strh	r2, [r1, r5, lsl #1]	@ movhi
+	ldr	r2, [r8]
 	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r2, [sp, #12]
-.L1172:
-	adds	r3, r3, #1
-	b	.L1171
-.L1202:
-	ldr	r3, [sp, #24]
-	movs	r5, #20
-	muls	r5, r3, r5
-	ldr	r3, [r6]
-	str	r3, [sp, #28]
-	adds	r7, r3, r5
-	ldr	r4, [r7, #4]
-	ubfx	r0, r4, #10, #16
-	str	r4, [sp, #44]
-	bl	P2V_plane
+	str	r2, [r8]
+	bl	ftl_set_blk_mode.part.6
+	b	.L1170
+.L1151:
+	ldr	r1, [r3, #-20]
+	and	r1, r1, ip
+	str	r1, [r3, #-20]
+	b	.L1150
+.L1154:
+	ldr	r1, .L1171+28
+	mul	r2, r3, r8
+	ldr	r1, [r1]
+	ldr	fp, [r1, r2]
+	adds	r0, r1, r2
+	cmp	fp, #-1
+	bne	.L1153
+	ldr	r0, [r0, #4]
+	add	r10, r10, #1
+	str	r3, [sp, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	add	r2, r4, r8, lsl #1
 	ldr	r3, [sp, #4]
-	cmp	fp, r3
-	bcc	.L1175
-	ldr	r3, [sp, #28]
-	bne	.L1176
-	ldr	r2, [sp, #20]
-	cmp	r2, r0
-	bhi	.L1175
+	strh	fp, [r2, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L1153:
+	add	r8, r8, #1
+	b	.L1152
+.L1156:
+	ldr	r3, .L1171+60
+	ldr	r1, .L1171+64
+	ldrh	r3, [r3]
+	strh	r7, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r1]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r1]
+	ldr	r2, .L1171+24
+	ldr	r1, [sp]
+	ldr	r2, [r2]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1157
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1158
+.L1157:
+	movw	r2, #2707
+	ldr	r1, .L1171+4
+	ldr	r0, .L1171+8
+	bl	printf
+.L1158:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1172:
+	.align	2
+.L1171:
+	.word	.LANCHOR48
+	.word	.LANCHOR163
+	.word	.LC1
+	.word	.LANCHOR53
+	.word	.LANCHOR87
+	.word	.LANCHOR47
+	.word	.LANCHOR42
+	.word	.LANCHOR106
+	.word	.LANCHOR3
+	.word	.LANCHOR80
+	.word	.LANCHOR43
+	.word	.LANCHOR14
+	.word	.LANCHOR76
+	.word	.LANCHOR74
+	.word	.LANCHOR127
+	.word	.LANCHOR19
+	.word	.LANCHOR70
+	.word	.LANCHOR45
+	.word	.LANCHOR5
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	-1024
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeBadSuperBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r4, .L1185
+	ldrh	r3, [r4]
+	cbz	r3, .L1174
+	ldr	r8, .L1185+16
+	movs	r6, #0
+.L1175:
+	ldr	r3, .L1185+4
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L1181
+	bl	FtlGcReFreshBadBlk
+.L1174:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1181:
+	ldr	r2, .L1185+8
+	uxth	r3, r6
+	mov	r1, r10
+	movs	r7, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r2, .L1185+12
+	mov	fp, r0
 .L1176:
-	ldr	r2, [sp, #8]
-	cmp	fp, r2
+	ldrh	r3, [r4]
+	uxth	r5, r7
+	cmp	r3, r5
+	bhi	.L1180
+	adds	r6, r6, #1
+	b	.L1175
+.L1180:
+	uxth	r3, r7
+	ldrh	r1, [r8, r3, lsl #1]
+	cmp	r1, fp
 	bne	.L1177
-	cmp	r10, r0
-	beq	.L1178
+	mov	r1, fp
+	mov	r0, r2
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	bl	printf
+	mov	r0, fp
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [sp, #4]
+	ldrh	r1, [r4]
+	ldr	r2, [sp]
+	add	r3, r8, r3, lsl #1
+.L1178:
+	cmp	r5, r1
+	bcc	.L1179
+	subs	r1, r1, #1
+	strh	r1, [r4]	@ movhi
 .L1177:
-	ldr	r3, [r3, r5]
-	adds	r3, r3, #1
-	beq	.L1179
-	ldr	r3, [r7, #12]
-	movw	r2, #61589
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	beq	.L1180
+	adds	r7, r7, #1
+	b	.L1176
+.L1179:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1178
 .L1186:
-	ldrh	r0, [r8]
-.L1266:
-	bl	decrement_vpc_count
-.L1175:
-	ldr	r3, [sp, #24]
-	adds	r3, r3, #1
-	b	.L1267
-.L1180:
-	ldr	r2, [r3, #4]
-	str	r2, [sp]
-	adds	r2, r2, #1
-	beq	.L1181
-	ldr	r2, .L1272+24
-	ldr	r0, [sp]
-	ldr	r1, [r2]
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1181
-	ldr	r1, [sp]
-	adds	r1, r1, #1
-	str	r1, [r2]
-.L1181:
-	ldr	r4, [r3, #8]
-	add	r1, sp, #40
-	ldr	r3, [r3, #12]
-	movs	r2, #0
-	mov	r0, r4
-	str	r3, [sp, #36]
-	bl	log2phys
-	ldr	r3, .L1272
-	ldr	r1, [r3]
-	adds	r3, r1, #1
-	beq	.L1182
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1182
-	ldr	r3, [sp, #36]
-	adds	r7, r3, #1
-	beq	.L1183
-	ldr	r0, [r6]
-	movs	r2, #0
-	movs	r1, #1
-	add	r0, r0, r5
-	str	r3, [r0, #4]
-	ldr	r7, [r0, #12]
-	bl	FlashReadPages
-	ldr	r2, [r6]
-	ldr	r1, [r2, r5]
-	adds	r3, r2, r5
-	adds	r1, r1, #1
-	bne	.L1184
+	.align	2
 .L1185:
-	mov	r3, #-1
-	ldrh	r0, [r8]
-	str	r3, [sp, #36]
-	bl	decrement_vpc_count
-.L1193:
-	ldr	r7, [sp, #36]
-	adds	r0, r7, #1
-	beq	.L1175
-.L1206:
-	ubfx	r0, r7, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1272+28
+	.word	.LANCHOR101
+	.word	.LANCHOR3
+	.word	.LANCHOR13
+	.word	.LC104
+	.word	.LANCHOR102
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L1198
-	movw	r2, #2006
-	ldr	r1, .L1272+32
-	ldr	r0, .L1272+36
-	bl	printf
-.L1198:
-	ldr	r3, .L1272+40
+	ldr	r3, .L1197
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, #0
-	beq	.L1199
-	mov	r0, r4
-	b	.L1266
-.L1183:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	bne	.L1186
-	movs	r2, #1
-	add	r1, sp, #36
-	mov	r0, r4
-	bl	log2phys
-	b	.L1186
-.L1184:
-	ldr	r1, [r7, #8]
-	cmp	r4, r1
-	bne	.L1185
-	ldr	r0, .L1272
-	ldr	r1, [r7, #4]
-	ldr	r0, [r0]
-	str	r1, [sp, #28]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1185
-	ldr	r1, [sp, #40]
-	ldr	r0, [sp, #44]
-	cmp	r1, r0
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
 	bne	.L1188
-.L1191:
-	ldr	r1, [sp, #36]
-	mov	r0, r4
-	bl	FtlReUsePrevPpa
-	b	.L1185
-.L1188:
-	ldr	r0, [sp, #36]
+	ldr	r2, .L1197+4
+	ldrh	r1, [r2]
 	cmp	r1, r0
-	beq	.L1185
-	adds	r0, r1, #1
-	beq	.L1189
-	str	r1, [r3, #4]
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r3
-	ldr	r7, [r3, #12]
-	bl	FlashReadPages
+	bne	.L1189
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
 .L1190:
-	ldr	r3, [r6]
-	ldr	r3, [r3, r5]
-	adds	r3, r3, #1
-	beq	.L1191
-	ldr	r3, [r7, #4]
-	ldr	r2, .L1272
-	mov	r1, r3
-	ldr	r0, [r2]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1191
-	mov	r1, r3
-	ldr	r0, [sp, #28]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1185
-	b	.L1191
-.L1189:
-	str	r1, [r2, r5]
-	b	.L1190
-.L1273:
-	.align	2
-.L1272:
-	.word	.LANCHOR153
-	.word	.LANCHOR161
-	.word	.LANCHOR144
-	.word	.LANCHOR120
-	.word	.LANCHOR3
-	.word	.LANCHOR19
-	.word	.LANCHOR71
-	.word	.LANCHOR5
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	.LANCHOR42
-.L1182:
-	ldr	r3, [sp, #44]
-	ldr	r2, [sp, #40]
-	cmp	r2, r3
-	beq	.L1193
-	movs	r2, #1
-	add	r1, sp, #44
+	ldr	r5, .L1197+8
+	mov	r1, r4
+	ldr	r0, .L1197+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L1192
+	movw	r2, #2777
+	ldr	r1, .L1197+16
+	ldr	r0, .L1197+20
+	bl	printf
+.L1192:
+	ldrh	r3, [r5]
 	mov	r0, r4
-	bl	log2phys
-	ldr	r7, [sp, #40]
-	adds	r5, r7, #1
-	beq	.L1193
-	ldr	r3, [sp, #36]
-	cmp	r7, r3
-	beq	.L1206
-	ubfx	r0, r7, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1274
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L1197
-	ldr	r3, .L1274+4
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L1197
-	ldr	r3, .L1274+8
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L1193
-.L1197:
-	ldr	r0, [r6]
-	movs	r2, #0
-	movs	r1, #1
-	str	r7, [r0, #4]
-	ldr	r5, [r0, #12]
-	bl	FlashReadPages
-	ldr	r3, [r6]
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L1193
-	ldr	r1, [r5, #4]
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	bne	.L1193
-	movs	r2, #1
-	add	r1, sp, #40
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
 	mov	r0, r4
-	bl	log2phys
-	b	.L1193
-.L1199:
-	mov	r1, r4
-	ldr	r0, .L1274+12
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1197+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1197+28
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1196
+	movw	r2, #2780
+	ldr	r1, .L1197+16
+	ldr	r0, .L1197+20
 	bl	printf
-	b	.L1175
-.L1179:
-	ldr	r3, .L1274+16
-	ldr	r3, [r3]
-	cmp	r3, #31
-	bhi	.L1200
-	ldr	r2, .L1274+20
-	str	r4, [r2, r3, lsl #2]
-	adds	r3, r3, #1
-	ldr	r2, .L1274+16
-	str	r3, [r2]
-.L1200:
-	ldrh	r0, [r8]
-	bl	decrement_vpc_count
-	ldr	r3, .L1274+24
-	ldr	r2, [r3]
-	adds	r1, r2, #1
-	bne	.L1201
-	ldr	r2, [sp]
-.L1265:
-	str	r2, [r3]
-	b	.L1175
-.L1201:
-	ldr	r1, [sp]
-	cmp	r1, r2
-	bcs	.L1175
-	mov	r2, r1
-	b	.L1265
-.L1178:
-	strb	r10, [r8, #6]
-	mov	r2, r10
-	strh	fp, [r8, #2]	@ movhi
-	mov	r1, fp
-	b	.L1269
-.L1275:
+.L1196:
+	movs	r3, #1
+	b	.L1187
+.L1189:
+	ldr	r2, .L1197+32
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1187
+	ldr	r2, .L1197+36
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1187
+	ldr	r2, .L1197+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1190
+.L1187:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1188:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L1187
+.L1198:
 	.align	2
-.L1274:
+.L1197:
+	.word	.LANCHOR42
+	.word	.LANCHOR80
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR164
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR5
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LC102
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR153
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	decrement_vpc_count
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	@ args = 0, pretend = 0, frame = 24
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r3, #-1
-	sub	sp, sp, #24
-	ldr	r2, .L1287
-	movs	r6, #0
+	movw	r3, #65535
+	push	{r4, r5, r6, lr}
+	cmp	r0, r3
+	mov	r4, r0
+	beq	.L1200
+	ldr	r5, .L1208
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1201
+	mov	r1, r0
+	ldr	r0, .L1208+4
+	bl	printf
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L1202
+.L1206:
+	movs	r5, #0
+.L1199:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1202:
+	movw	r2, #2795
+.L1207:
+	ldr	r1, .L1208+8
+	ldr	r0, .L1208+12
+	bl	printf
+	b	.L1199
+.L1201:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1200:
+	ldr	r6, .L1208+16
+	movw	r3, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L1204
+	strh	r4, [r6]	@ movhi
+	b	.L1206
+.L1204:
+	cmp	r4, r0
+	beq	.L1206
+	bl	update_vpc_list
+	ldr	r3, .L1208+20
+	adds	r5, r0, #0
+	ldr	r2, .L1208+24
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1208+28
+	muls	r3, r2, r3
+	ldr	r2, .L1208
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L1199
+	cmp	r4, r1
+	beq	.L1199
+	movw	r2, #2811
+	b	.L1207
+.L1209:
+	.align	2
+.L1208:
+	.word	.LANCHOR42
+	.word	.LC105
+	.word	.LANCHOR165
+	.word	.LC1
+	.word	.LANCHOR142
+	.word	.LANCHOR41
+	.word	.LANCHOR40
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	sub	sp, sp, #48
+	cmp	r3, r2
+	beq	.L1338
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #4]
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #20]
+	ldr	r3, .L1346
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	mov	r3, #0
+	bne	.L1213
+	strh	r3, [r0, #4]	@ movhi
+.L1344:
+	strb	r3, [r8, #6]
+.L1338:
+	movs	r0, #0
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1213:
+	ldrh	r0, [r0, #16]
+.L1214:
+	cmp	r0, r2
+	uxth	r5, r3
+	add	r3, r3, #1
+	beq	.L1215
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
 	mov	r4, r0
-	str	r3, [sp, #20]
-	movs	r7, #7
-	ldr	r3, .L1287+4
-	ldr	r5, [r2]
-	mvn	r2, #2
-	ldr	r8, .L1287+16
+	adds	r0, r0, #1
+	beq	.L1216
+	ldr	r3, .L1346+4
+	movs	r2, #0
+	mov	r5, r2
+	movw	fp, #65535
+	mov	r10, #20
+	ldrh	ip, [r3]
+	ldr	r3, .L1346+8
+	ldr	r0, [r3]
+	ldr	r3, .L1346+12
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1346+16
+	ldrh	r7, [r3]
+	ldr	r3, .L1346+20
 	ldr	r3, [r3]
-	str	r5, [sp, #16]
 	str	r3, [sp, #12]
-	str	r2, [r5, #8]
-	mvn	r2, #1
-	str	r2, [r5, #12]
-	ldrh	r2, [r0]
-	strh	r6, [r5]	@ movhi
-	strh	r2, [r5, #2]	@ movhi
-	movw	r2, #61589
-	str	r2, [r3]
-	add	r2, r2, #304087040
-	add	r2, r2, #1269760
-	addw	r2, r2, #1507
-	str	r2, [r3, #4]
-.L1277:
-	subs	r7, r7, #1
-	beq	.L1279
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1278
-.L1279:
-	ldr	r3, .L1287+8
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldr	r3, .L1287+12
+	ldr	r3, .L1346+24
+	ldrh	lr, [r3]
+	add	r3, r8, #16
+	str	r3, [sp, #16]
+	str	r3, [sp]
+.L1217:
+	uxth	r3, r2
+	cmp	ip, r3
+	bhi	.L1221
+	movs	r2, #0
+	mov	r1, r5
+	bl	FlashReadPages
+	ldr	r2, .L1346+28
+	uxth	r1, r4
+	movw	fp, #65535
+	str	r1, [sp, #12]
+	ldr	r3, [r2]
+	subs	r3, r3, #1
+	str	r3, [sp]
+	ldr	r3, .L1346+8
+	ldr	r10, [r3]
+	movs	r3, #0
+	mov	r7, r10
+.L1222:
+	uxth	r1, r3
+	cmp	r5, r1
+	bhi	.L1227
+	bne	.L1225
+	adds	r3, r4, #1
+	uxth	r3, r3
+	str	r3, [sp, #8]
+.L1339:
+	ldr	r0, [r10, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldr	r3, .L1346
+	mov	r10, r0
+	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
+	cmp	r3, r2
+	bne	.L1229
+	ldrh	r3, [sp, #8]
+	strh	r3, [r8, #2]	@ movhi
 	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1278:
-	mov	r0, r4
-	bl	get_new_active_ppa
-	str	r0, [sp, #8]
-	adds	r0, r0, #1
-	beq	.L1279
-	ldr	r3, [r8]
-	movs	r1, #1
-	add	r0, sp, #4
-	str	r3, [r5, #4]
+	strb	r3, [r8, #6]
+	strh	r3, [r8, #4]	@ movhi
+.L1229:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #4]
+	cmp	r3, r2
+	bne	.L1230
+	ldr	r3, [sp, #20]
+	cmp	r10, r3
+	bne	.L1230
+	ldr	r1, [sp, #8]
+	mov	r2, r10
+.L1345:
+	mov	r0, r8
+	bl	ftl_sb_update_avl_pages
+	b	.L1338
+.L1215:
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r8, r1, lsl #1]
+	b	.L1214
+.L1216:
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1218
+	movw	r2, #1766
+	ldr	r1, .L1346+32
+	ldr	r0, .L1346+36
+	bl	printf
+.L1218:
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1219
+	cmp	r5, r3
+	beq	.L1219
+	movw	r2, #1767
+	ldr	r1, .L1346+32
+	ldr	r0, .L1346+36
+	bl	printf
+.L1219:
+	movs	r3, #0
+	strh	r3, [r8, #2]	@ movhi
+	b	.L1344
+.L1221:
+	ldr	r1, [sp]
+	ldrh	r3, [r1], #2
+	cmp	r3, fp
+	str	r1, [sp]
+	beq	.L1220
+	mla	r1, r10, r5, r0
+	ldr	r6, [sp, #8]
+	orr	r3, r4, r3, lsl #10
+	str	r3, [r1, #4]
+	mul	r3, r7, r5
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	ldr	r6, [sp, #12]
+	str	r3, [r1, #8]
+	mul	r3, lr, r5
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+.L1220:
+	adds	r2, r2, #1
+	b	.L1217
+.L1227:
+	ldr	r1, [r7]
+	cbnz	r1, .L1223
+	ldr	r1, [r7, #12]
+	ldr	r6, [r1, #4]
+	str	r1, [sp, #8]
+	adds	r1, r6, #1
+	beq	.L1224
+	ldr	r1, [r2]
+	mov	r0, r6
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1224
+	adds	r6, r6, #1
+	str	r6, [r2]
+.L1224:
+	ldr	r1, [sp, #8]
+	ldr	r1, [r1]
+	adds	r1, r1, #1
+	bne	.L1226
+.L1225:
+	uxth	r2, r4
+	uxth	r3, r3
+	str	r2, [sp, #8]
+	movs	r2, #20
+	mla	r10, r2, r3, r10
+	b	.L1339
+.L1223:
+	ldr	fp, [sp, #12]
+.L1226:
 	adds	r3, r3, #1
-	adds	r2, r3, #1
-	it	eq
-	moveq	r3, r6
-	str	r3, [r8]
+	adds	r7, r7, #20
+	b	.L1222
+.L1230:
+	movw	r3, #65535
+	cmp	fp, r3
+	bne	.L1231
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1232
+.L1231:
+	ldr	r3, .L1346+40
+	uxth	r6, r4
+	uxth	r4, r4
+	ldr	r7, .L1346+8
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	itt	eq
+	ldreq	r2, [sp]
+	streq	r2, [r3]
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #7
+	cmp	r4, r3
+	itet	gt
+	subgt	r4, r6, #7
+	ldrle	r4, [sp, #4]
+	uxthgt	r4, r4
+.L1235:
+	cmp	r4, r6
+	bhi	.L1245
+	ldr	r3, .L1346+4
+	movw	lr, #65535
+	ldr	r0, [r7]
+	mov	ip, #20
+	ldrh	fp, [r3]
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #12]
 	movs	r3, #0
-	mov	r2, r3
-	bl	FlashProgPages
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-	b	.L1277
-.L1288:
+	mov	r5, r3
+	b	.L1246
+.L1237:
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #12]
+	beq	.L1236
+	mla	r1, ip, r5, r0
+	adds	r5, r5, #1
+	orr	r2, r4, r2, lsl #10
+	uxth	r5, r5
+	str	r2, [r1, #4]
+.L1236:
+	adds	r3, r3, #1
+.L1246:
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L1237
+	mov	r1, r5
+	movs	r2, #0
+	bl	FlashReadPages
+	ldr	r3, .L1346+40
+	movs	r1, #20
+	movs	r0, #0
+	movw	ip, #65535
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	mla	r5, r1, r5, r3
+.L1238:
+	cmp	r5, r3
+	bne	.L1243
+	cbz	r0, .L1244
+	ldr	r3, .L1346+40
+	str	r2, [r3]
+.L1244:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1235
+.L1347:
 	.align	2
-.L1287:
-	.word	.LANCHOR108
-	.word	.LANCHOR107
-	.word	.LANCHOR42
+.L1346:
 	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR112
+	.word	.LANCHOR91
+	.word	.LANCHOR23
+	.word	.LANCHOR92
+	.word	.LANCHOR24
 	.word	.LANCHOR71
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLoadBbt,"ax",%progbits
-	.align	1
-	.global	FtlLoadBbt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	ldr	r8, .L1318+40
-	ldr	r4, .L1318
-	ldr	r3, [r8]
-	ldr	r7, .L1318+4
-	mov	r10, r4
-	str	r3, [r4, #8]
-	ldr	r3, .L1318+8
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-	bl	FtlBbtMemInit
-	ldrh	r5, [r7]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1290:
-	ldrh	r3, [r7]
-	subs	r3, r3, #15
-	cmp	r3, r5
-	bgt	.L1293
-	lsls	r3, r5, #10
+	.word	.LANCHOR166
+	.word	.LC1
+	.word	.LANCHOR145
+.L1243:
+	ldr	r1, [r3]
+	cmp	r1, #0
+	beq	.L1239
+	cbz	r0, .L1232
+.L1340:
+	ldr	r3, .L1348
+	str	r2, [r3]
+.L1232:
+	ldr	fp, [sp, #4]
 	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	str	r3, [r4, #4]
+	ldr	r6, .L1348+4
+	ldr	r3, .L1348+8
+	strh	r2, [r3]	@ movhi
+.L1247:
+	ldr	r3, .L1348+12
+	movw	lr, #65535
+	ldr	r0, [r6]
+	movs	r7, #20
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r3]
+	movs	r3, #0
+	str	r3, [sp, #12]
+.L1248:
+	uxth	r2, r3
+	cmp	r4, r2
+	bhi	.L1250
+	movs	r2, #0
+	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4]
+	movs	r3, #0
+.L1343:
+	str	r3, [sp, #24]
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #24]
+	cmp	r2, r3
+	bhi	.L1278
+	ldr	r3, .L1348+16
+	add	fp, fp, #1
+	uxth	fp, fp
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L1247
+	ldr	r2, .L1348+12
+	movw	r0, #65535
+	movs	r3, #0
+	strh	fp, [r8, #2]	@ movhi
+	strh	r3, [r8, #4]	@ movhi
+	ldrh	r2, [r2]
+.L1279:
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L1338
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r1], #2
+	cmp	r4, r0
+	str	r1, [sp, #16]
+	add	r1, r3, #1
+	bne	.L1344
+	mov	r3, r1
+	b	.L1279
+.L1239:
+	ldr	r1, [r3, #12]
+	ldrh	lr, [r1]
+	cmp	lr, ip
+	beq	.L1242
+	ldr	r1, [r1, #4]
+	cmp	r1, #-1
+	itt	ne
+	movne	r2, r1
+	movne	r0, #1
+.L1242:
+	adds	r3, r3, #20
+	b	.L1238
+.L1245:
+	mov	r2, #-1
+	b	.L1340
+.L1250:
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	beq	.L1249
+	ldr	r5, [sp, #12]
+	orr	r2, fp, r2, lsl #10
+	mla	ip, r7, r5, r0
+	str	r2, [ip, #4]
+	mov	r2, r5
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #12]
+.L1249:
 	adds	r3, r3, #1
-	bne	.L1291
-	ldr	r3, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
+	b	.L1248
+.L1278:
+	ldr	r3, [sp, #24]
+	movs	r5, #20
+	muls	r5, r3, r5
+	ldr	r3, [r6]
+	str	r3, [sp, #28]
+	adds	r7, r3, r5
+	ldr	r4, [r7, #4]
+	ubfx	r0, r4, #10, #16
+	str	r4, [sp, #44]
+	bl	P2V_plane
+	ldr	r3, [sp, #4]
+	cmp	fp, r3
+	bcc	.L1252
+	ldr	r3, [sp, #28]
+	bne	.L1253
+	ldr	r2, [sp, #20]
+	cmp	r2, r0
+	bhi	.L1252
+.L1253:
+	ldr	r2, [sp, #8]
+	cmp	fp, r2
+	bne	.L1254
+	cmp	r10, r0
+	beq	.L1255
+.L1254:
+	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	str	r3, [r4, #4]
+	beq	.L1256
+	ldr	r3, [r7, #12]
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L1257
+	ldrh	r0, [r8]
+.L1341:
+	bl	decrement_vpc_count
+	b	.L1252
+.L1257:
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	adds	r2, r2, #1
+	beq	.L1258
+	ldr	r2, .L1348+20
+	ldr	r0, [sp]
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1258
+	ldr	r1, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L1258:
+	ldr	r4, [r3, #8]
+	add	r1, sp, #40
+	ldr	r3, [r3, #12]
+	movs	r2, #0
+	mov	r0, r4
+	str	r3, [sp, #36]
+	bl	log2phys
+	ldr	r3, .L1348
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L1259
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1259
+	ldr	r3, [sp, #36]
+	adds	r7, r3, #1
+	beq	.L1260
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	add	r0, r0, r5
+	str	r3, [r0, #4]
+	ldr	r7, [r0, #12]
 	bl	FlashReadPages
-.L1291:
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L1292
-	ldrh	r2, [r6]
-	movw	r3, #61649
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L1261
+.L1262:
+	mov	r3, #-1
+	str	r3, [sp, #36]
+.L1269:
+	ldr	r7, [sp, #36]
+	adds	r0, r7, #1
+	beq	.L1252
+.L1282:
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1348+24
+	mov	r4, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1274
+	movw	r2, #2019
+	ldr	r1, .L1348+28
+	ldr	r0, .L1348+32
+	bl	printf
+.L1274:
+	ldr	r3, .L1348+36
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	beq	.L1275
+	mov	r0, r4
+	b	.L1341
+.L1260:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1292
-	ldr	r3, .L1318+12
-	ldr	r2, [r6, #4]
-	strh	r5, [r3]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r6, #8]
-	strh	r2, [r3, #4]	@ movhi
-.L1293:
-	ldr	r5, .L1318+12
-	movw	r2, #65535
-	ldrh	r3, [r5]
-	cmp	r3, r2
-	beq	.L1307
-	ldrh	r3, [r5, #4]
-	cmp	r3, r2
-	beq	.L1297
-	lsls	r3, r3, #10
+	bne	.L1252
 	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L1318
-	str	r3, [r4, #4]
-	bl	FlashReadPages
-	ldr	r3, [r4]
+	add	r1, sp, #36
+	mov	r0, r4
+	bl	log2phys
+.L1252:
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	beq	.L1297
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1297
-	ldr	r3, [r6, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L1297
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r6, #8]
-	strh	r2, [r5]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L1297:
-	ldr	r10, .L1318
+	b	.L1343
+.L1261:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L1262
+	ldr	r0, .L1348
+	ldr	r1, [r7, #4]
+	ldr	r0, [r0]
+	str	r1, [sp, #28]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1262
+	ldr	r1, [sp, #40]
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	bne	.L1264
+.L1267:
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L1262
+.L1264:
+	ldr	r0, [sp, #36]
+	cmp	r1, r0
+	beq	.L1262
+	adds	r0, r1, #1
+	beq	.L1265
+	str	r1, [r3, #4]
+	movs	r2, #0
 	movs	r1, #1
-	ldrh	r0, [r5]
-	bl	FtlGetLastWrittenPage
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L1299:
-	cmp	r7, #0
-	bge	.L1302
-	movs	r2, #254
-	ldr	r1, .L1318+16
-	ldr	r0, .L1318+20
-	bl	printf
-.L1301:
-	ldrh	r3, [r6, #10]
-	ldrh	r0, [r6, #12]
-	strh	r3, [r5, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1304
-	ldr	r3, .L1318+24
-	ldr	r2, [r3]
-	cmp	r0, r2
-	beq	.L1304
-	ldr	r3, .L1318+28
-	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
+	mov	r0, r3
+	ldr	r7, [r3, #12]
+	bl	FlashReadPages
+.L1266:
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L1267
+	ldr	r3, [r7, #4]
+	ldr	r2, .L1348
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1267
+	mov	r1, r3
+	ldr	r0, [sp, #28]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1262
+	b	.L1267
+.L1265:
+	str	r1, [r2, r5]
+	b	.L1266
+.L1259:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bcs	.L1304
-	cmp	r0, r3
-	bcs	.L1304
-	bl	FtlSysBlkNumInit
-.L1304:
-	ldr	r6, .L1318+32
-	movs	r5, #0
-	ldr	r7, .L1318+36
-	ldr	r8, .L1318+44
-.L1305:
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L1306
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1292:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1290
-.L1302:
-	ldrh	r3, [r5]
+	beq	.L1269
 	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	orr	r3, r7, r3, lsl #10
-	str	r3, [r4, #4]
-	ldr	r3, [r8]
-	str	r3, [r4, #8]
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #40]
+	adds	r5, r7, #1
+	beq	.L1269
+	ldr	r3, [sp, #36]
+	cmp	r7, r3
+	beq	.L1282
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1348+40
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1273
+	ldr	r3, .L1348+44
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1273
+	ldr	r3, .L1348+48
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1269
+.L1273:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	str	r7, [r0, #4]
+	ldr	r5, [r0, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4]
+	ldr	r3, [r6]
+	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1300
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	beq	.L1301
-.L1300:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L1299
-.L1306:
-	ldrh	r2, [r8]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r5, r2, r1
-	adds	r5, r5, #1
-	bl	ftl_memcpy
-	b	.L1305
-.L1307:
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1319:
+	beq	.L1269
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	bne	.L1269
+	movs	r2, #1
+	add	r1, sp, #40
+	mov	r0, r4
+	bl	log2phys
+	b	.L1269
+.L1349:
 	.align	2
-.L1318:
-	.word	.LANCHOR106
-	.word	.LANCHOR17
-	.word	.LANCHOR108
-	.word	.LANCHOR37
-	.word	.LANCHOR164
+.L1348:
+	.word	.LANCHOR145
+	.word	.LANCHOR112
+	.word	.LANCHOR167
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR71
+	.word	.LANCHOR5
+	.word	.LANCHOR166
 	.word	.LC1
-	.word	.LANCHOR2
-	.word	.LANCHOR6
-	.word	.LANCHOR37+24
-	.word	.LANCHOR10
-	.word	.LANCHOR107
-	.word	.LANCHOR137
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlMakeBbt,"ax",%progbits
+	.word	.LANCHOR42
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+.L1275:
+	mov	r1, r4
+	ldr	r0, .L1350
+	bl	printf
+	b	.L1252
+.L1256:
+	ldr	r3, .L1350+4
+	ldr	r3, [r3]
+	cmp	r3, #31
+	bhi	.L1276
+	ldr	r2, .L1350+8
+	str	r4, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	ldr	r2, .L1350+4
+	str	r3, [r2]
+.L1276:
+	ldrh	r0, [r8]
+	bl	decrement_vpc_count
+	ldr	r3, .L1350+12
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L1277
+	ldr	r2, [sp]
+.L1342:
+	str	r2, [r3]
+	b	.L1252
+.L1277:
+	ldr	r1, [sp]
+	cmp	r1, r2
+	bcs	.L1252
+	mov	r2, r1
+	b	.L1342
+.L1255:
+	strb	r10, [r8, #6]
+	mov	r2, r10
+	strh	fp, [r8, #2]	@ movhi
+	mov	r1, fp
+	b	.L1345
+.L1351:
+	.align	2
+.L1350:
+	.word	.LC106
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR145
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlWriteDump_data,"ax",%progbits
 	.align	1
-	.global	FtlMakeBbt
+	.global	FtlWriteDump_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r7, .L1339
-	bl	FtlBbtMemInit
-	sub	r8, r7, #18
-	bl	FtlLoadFactoryBbt
-.L1321:
-	ldr	r3, .L1339+4
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, .L1371
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1353
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1353
+	ldr	r3, .L1371+4
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1327
-	ldr	r5, .L1339+8
-	movs	r4, #0
-.L1328:
-	ldrh	r3, [r5]
-	uxth	r0, r4
-	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L1329
-	ldr	r4, .L1339+12
-	movw	r6, #65535
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1330:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1334
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1331
-	mov	r0, r5
-	bl	FlashTestBlk
-	cmp	r0, #0
-	beq	.L1332
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.L1331:
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1330
-.L1327:
-	ldr	r3, .L1339+16
-	ldr	r5, .L1339+20
-	ldrh	r2, [r8, #2]!
-	ldr	r4, .L1339+24
-	ldr	r0, [r3]
-	movw	r3, #65535
-	ldr	r10, [r5]
+	muls	r3, r1, r3
 	cmp	r2, r3
-	mov	fp, r4
-	ldr	r3, .L1339+28
-	str	r0, [r4, #8]
-	str	r10, [r4, #12]
-	beq	.L1322
-	ldrh	r5, [r3]
-	mov	r0, r4
-	str	r3, [sp]
-	mla	r5, r6, r5, r2
-	lsls	r2, r5, #10
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r7]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.L1323:
-	uxth	r0, r5
-	adds	r6, r6, #1
-	adds	r7, r7, #4
-	bl	FtlBbmMapBadBlock
-	b	.L1321
-.L1322:
-	mov	r1, r6
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-	ldr	r0, [r4, #8]
-	ldr	r1, [r7]
-	bl	FtlBbt2Bitmap
-	ldr	r3, [sp]
-	str	r5, [sp, #4]
-	ldrh	r4, [r3]
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1324:
+	beq	.L1353
+	ldrb	r7, [r4, #10]	@ zero_extendqisi2
+	cbnz	r7, .L1352
+	ldr	r3, .L1371+8
+	mov	r2, r7
+	mov	r1, sp
+	ldr	r6, [r3]
+	ldr	r3, .L1371+12
+	subs	r6, r6, #1
+	mov	r0, r6
+	ldrh	r8, [r3]
+	bl	log2phys
+	ldr	r2, .L1371+16
 	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r6, r4
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L1325
-	ldr	r3, [sp, #4]
-	movs	r2, #16
-	movs	r1, #0
-	strh	r4, [r8]	@ movhi
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r3, .L1339+16
-	mov	r2, #4096
-	movs	r1, #0
-	ldr	r0, [r3]
-	bl	ftl_memset
-	ldr	r2, [sp]
-	movw	r3, #61664
-	strh	r3, [r10]	@ movhi
-	movs	r3, #0
-	str	r3, [r10, #4]
-	ldrh	r5, [r2]
-	ldrh	r3, [r8]
-	ldr	r1, [r7]
-	ldr	r0, [fp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	mla	r5, r6, r5, r3
-	lsls	r3, r5, #10
-	str	r3, [fp, #4]
-	ldr	r3, .L1339+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-	movs	r2, #1
-	ldr	r0, .L1339+24
-	mov	r1, r2
-	bl	FlashEraseBlocks
-	movs	r3, #1
-	ldr	r0, .L1339+24
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, [fp]
+	str	r6, [sp, #20]
+	ldr	r0, [r2]
+	ldr	r2, .L1371+20
+	str	r3, [sp, #8]
 	adds	r3, r3, #1
-	bne	.L1323
-	uxth	r0, r5
-	bl	FtlBbmMapBadBlock
-	b	.L1324
-.L1325:
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1324
-.L1329:
-	bl	FtlBbmMapBadBlock
-	b	.L1328
-.L1332:
+	str	r0, [sp, #12]
+	ldr	r5, [r2]
+	str	r5, [sp, #16]
+	str	r7, [r5, #4]
+	beq	.L1355
+	mov	r2, r7
+	movs	r1, #1
+	add	r0, sp, #4
+	bl	FlashReadPages
+.L1356:
+	ldr	fp, .L1371
+	lsl	r8, r8, #2
+	ldr	r10, .L1371+28
+	movs	r7, #0
+	movw	r3, #61589
+	strh	r3, [r5]	@ movhi
+.L1357:
+	cmp	r8, r7
+	bne	.L1361
+.L1358:
+	movs	r3, #1
+.L1370:
+	strb	r3, [r4, #10]
+.L1352:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1355:
+	ldr	r3, .L1371+24
+	movs	r1, #255
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L1356
+.L1361:
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	beq	.L1358
+	ldr	r3, [sp, #8]
+	mov	r0, fp
+	str	r6, [r5, #8]
+	adds	r7, r7, #1
+	str	r3, [r5, #12]
 	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L1333
-	strh	r5, [r4]	@ movhi
-	b	.L1331
-.L1333:
-	strh	r5, [r4, #4]	@ movhi
-.L1334:
-	ldr	r3, .L1339+36
-	movs	r5, #0
-	str	r5, [r4, #8]
+	strh	r3, [r5, #2]	@ movhi
+	bl	get_new_active_ppa
+	ldr	r3, [r10]
 	movs	r1, #1
-	movs	r2, #2
-	strh	r5, [r4, #2]	@ movhi
-	ldr	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #24]
-	bl	FlashEraseBlocks
+	str	r0, [sp, #8]
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r10]
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
 	ldrh	r0, [r4]
-	bl	FtlBbmMapBadBlock
+	bl	decrement_vpc_count
+	b	.L1357
+.L1353:
+	movs	r3, #0
+	b	.L1370
+.L1372:
+	.align	2
+.L1371:
+	.word	.LANCHOR51
+	.word	.LANCHOR19
+	.word	.LANCHOR61
+	.word	.LANCHOR3
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR23
+	.word	.LANCHOR71
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r4, #0
+	ldr	r5, .L1377
+	ldr	r6, .L1377+4
+	bl	FtlWriteDump_data
+.L1374:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L1376
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L1376:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1375
+	bl	flush_l2p_region
+.L1375:
+	adds	r4, r4, #1
+	b	.L1374
+.L1378:
+	.align	2
+.L1377:
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r3, #-1
+	sub	sp, sp, #24
+	ldr	r2, .L1392
+	movs	r6, #0
+	mov	r4, r0
+	str	r3, [sp, #20]
+	ldr	r3, .L1392+4
+	ldr	r5, [r2]
+	mvn	r2, #2
+	ldr	r8, .L1392+16
+	ldr	r3, [r3]
+	str	r5, [sp, #16]
+	str	r3, [sp, #12]
+	str	r2, [r5, #8]
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	ldrh	r2, [r0]
+	strh	r6, [r5]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
+	movw	r2, #61589
+	str	r2, [r3]
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+	ldrh	r3, [r0, #4]
+	tst	r3, #1
+	ite	eq
+	moveq	r7, #6
+	movne	r7, #7
+.L1385:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1381
+.L1382:
+	ldr	r3, .L1392+8
+	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #8]
-	ldrh	r2, [r4, #4]
-	strh	r5, [r4, #2]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	ldrh	r3, [r4]
-	strh	r2, [r4]	@ movhi
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L1392+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-	bl	FtlBbmTblFlush
-	mov	r0, r5
-	add	sp, sp, #8
+	add	sp, sp, #24
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1340:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1381:
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1382
+	ldr	r3, [r8]
+	movs	r1, #1
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, r6
+	str	r3, [r8]
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	subs	r7, r7, #1
+	bne	.L1385
+	b	.L1382
+.L1393:
 	.align	2
-.L1339:
-	.word	.LANCHOR37+28
-	.word	.LANCHOR10
-	.word	.LANCHOR25
-	.word	.LANCHOR37
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR106
-	.word	.LANCHOR17
-	.word	.LANCHOR137
-	.word	.LANCHOR111
-	.size	FtlMakeBbt, .-FtlMakeBbt
+.L1392:
+	.word	.LANCHOR123
+	.word	.LANCHOR115
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR71
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
 	.global	FtlVendorPartWrite
@@ -9871,7 +10274,7 @@ FtlMakeBbt:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1353
+	ldr	r3, .L1406
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #104
 	str	r2, [sp]
@@ -9880,26 +10283,26 @@ FtlVendorPartWrite:
 	mov	r5, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1349
-	ldr	r3, .L1353+4
+	bhi	.L1402
+	ldr	r3, .L1406+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L1343:
-	cbnz	r5, .L1348
-.L1341:
+.L1396:
+	cbnz	r5, .L1401
+.L1394:
 	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1348:
-	ldr	r3, .L1353+8
+.L1401:
+	ldr	r3, .L1406+8
 	mov	r0, r7
-	ldr	r10, .L1353+24
+	ldr	r10, .L1406+24
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L1353+12
+	ldr	r3, .L1406+12
 	str	r2, [sp, #12]
 	ldrh	r3, [r3]
 	mov	r1, r3
@@ -9913,9 +10316,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L1345
+	cbz	r2, .L1398
 	cmp	r4, r3
-	beq	.L1345
+	beq	.L1398
 	ldr	r3, [r10]
 	add	r0, sp, #20
 	str	r2, [sp, #24]
@@ -9925,7 +10328,7 @@ FtlVendorPartWrite:
 	add	r3, sp, #40
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-.L1346:
+.L1399:
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	subs	r5, r5, r4
@@ -9938,7 +10341,7 @@ FtlVendorPartWrite:
 	bl	ftl_memcpy
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1353+16
+	ldr	r0, .L1406+16
 	adds	r6, r6, #1
 	bl	FtlMapWritePage
 	ldr	r3, [sp]
@@ -9949,27 +10352,27 @@ FtlVendorPartWrite:
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L1343
-.L1345:
-	ldr	r3, .L1353+20
+	b	.L1396
+.L1398:
+	ldr	r3, .L1406+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L1346
-.L1349:
+	b	.L1399
+.L1402:
 	mov	r8, #-1
-	b	.L1341
-.L1354:
+	b	.L1394
+.L1407:
 	.align	2
-.L1353:
+.L1406:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
 	.word	.LANCHOR12
-	.word	.LANCHOR149
+	.word	.LANCHOR158
 	.word	.LANCHOR23
-	.word	.LANCHOR124
+	.word	.LANCHOR117
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -9983,60 +10386,60 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1357
-	ldr	r3, .L1357+4
+	ldr	r2, .L1410
+	ldr	r3, .L1410+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1355
-	ldr	r3, .L1357+8
+	bne	.L1408
+	ldr	r3, .L1410+8
 	movs	r1, #1
 	movs	r0, #0
 	str	r3, [r2, #4]
-	ldr	r3, .L1357+12
+	ldr	r3, .L1410+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L1357+16
+	ldr	r3, .L1410+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L1357+20
+	ldr	r3, .L1410+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L1357+24
+	ldr	r3, .L1410+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L1357+28
+	ldr	r3, .L1410+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L1357+32
+	ldr	r3, .L1410+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L1357+36
+	ldr	r3, .L1410+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L1357+40
+	ldr	r3, .L1410+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L1357+44
+	ldr	r3, .L1410+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L1357+48
+	ldr	r3, .L1410+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L1357+52
+	ldr	r3, .L1410+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L1357+56
+	ldr	r3, .L1410+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	b	FtlVendorPartWrite
-.L1355:
+.L1408:
 	bx	lr
-.L1358:
+.L1411:
 	.align	2
-.L1357:
+.L1410:
 	.word	.LANCHOR81
 	.word	1179929683
-	.word	1342177348
+	.word	1342177352
 	.word	.LANCHOR68
 	.word	.LANCHOR69
 	.word	.LANCHOR67
@@ -10061,7 +10464,7 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L1364
+	ldr	r2, .L1417
 	push	{r3, lr}
 	ldrh	r3, [r2]
 	cmp	r3, #31
@@ -10070,22 +10473,22 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	strhls	r3, [r2]	@ movhi
 	movls	r3, #1
-	ldr	r2, .L1364+4
-	cbnz	r0, .L1361
+	ldr	r2, .L1417+4
+	cbnz	r0, .L1414
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1362
-.L1361:
+	bcc	.L1415
+.L1414:
 	ldr	r2, [r2]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1364+8
+	ldr	r3, .L1417+8
 	str	r3, [r2]
-	ldr	r3, .L1364+12
+	ldr	r3, .L1417+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -10096,13 +10499,13 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1362:
+.L1415:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1365:
+.L1418:
 	.align	2
-.L1364:
-	.word	.LANCHOR165
+.L1417:
+	.word	.LANCHOR170
 	.word	.LANCHOR127
 	.word	1112818501
 	.word	.LANCHOR125
@@ -10133,94 +10536,116 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1376
+	ldr	r3, .L1430
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r2
+	mov	r10, r2
 	adds	r2, r0, r1
 	sub	sp, sp, #104
-	mov	r6, r0
-	mov	r5, r1
+	mov	r7, r0
+	mov	r6, r1
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1375
-	ldr	r3, .L1376+4
-	movs	r7, #0
-	ldr	fp, .L1376+16
-	ldrh	r3, [r3]
-	lsr	r3, r0, r3
-	lsls	r3, r3, #2
-	str	r3, [sp, #4]
-.L1369:
-	cbnz	r5, .L1374
-.L1367:
-	mov	r0, r7
+	bhi	.L1429
+	ldr	r3, .L1430+4
+	mov	r8, #0
+	ldr	fp, .L1430+28
+	ldrh	r5, [r3]
+	lsr	r5, r0, r5
+	lsls	r3, r5, #2
+	str	r3, [sp]
+.L1422:
+	cbnz	r6, .L1428
+.L1420:
+	mov	r0, r8
 	add	sp, sp, #104
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1374:
-	ldr	r3, .L1376+8
-	mov	r0, r6
-	ldr	r2, [sp, #4]
+.L1428:
+	ldr	r3, .L1430+8
+	mov	r0, r7
+	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1376+12
-	str	r3, [sp, #12]
+	ldr	r2, .L1430+12
+	str	r3, [sp, #8]
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
 	subs	r4, r4, r1
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	uxth	r4, r4
-	str	r1, [sp, #8]
-	cmp	r5, r4
+	str	r1, [sp, #4]
+	cmp	r6, r4
 	it	cc
-	uxthcc	r4, r5
-	lsl	r10, r4, #9
-	cbz	r3, .L1371
+	uxthcc	r4, r6
+	lsls	r2, r4, #9
+	str	r2, [sp, #8]
+	cmp	r3, #0
+	beq	.L1424
+	ldr	r2, [fp]
+	add	r0, sp, #20
 	str	r3, [sp, #24]
+	str	r3, [sp, #12]
+	str	r2, [sp, #28]
+	add	r2, sp, #40
+	str	r2, [sp, #32]
 	movs	r2, #1
-	ldr	r3, [fp]
 	mov	r1, r2
-	add	r0, sp, #20
-	str	r3, [sp, #28]
-	add	r3, sp, #40
-	str	r3, [sp, #32]
 	bl	FlashReadPages
-	ldr	r3, [sp, #20]
-	mov	r2, r10
-	ldr	r1, [fp]
-	mov	r0, r8
-	adds	r3, r3, #1
-	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
+	adds	r2, r2, #1
+	ldr	r2, .L1430+16
 	it	eq
-	moveq	r7, #-1
+	moveq	r8, #-1
+	ldr	r2, [r2]
+	cmp	r2, #256
+	bne	.L1426
+	mov	r2, r3
+	mov	r1, r5
+	ldr	r0, .L1430+20
+	bl	printf
+	ldr	r2, [fp]
+	mov	r1, r5
+	ldr	r0, .L1430+24
+	bl	FtlMapWritePage
+.L1426:
+	ldr	r1, [fp]
+	lsls	r2, r4, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L1373:
-	ldr	r3, [sp, #4]
-	subs	r5, r5, r4
-	add	r6, r6, r4
-	add	r8, r8, r10
+.L1427:
+	ldr	r3, [sp, #8]
+	adds	r5, r5, #1
+	subs	r6, r6, r4
+	add	r7, r7, r4
+	add	r10, r10, r3
+	ldr	r3, [sp]
 	adds	r3, r3, #4
-	str	r3, [sp, #4]
-	b	.L1369
-.L1371:
-	mov	r2, r10
+	str	r3, [sp]
+	b	.L1422
+.L1424:
+	lsls	r2, r4, #9
 	mov	r1, r3
-	mov	r0, r8
+	mov	r0, r10
 	bl	ftl_memset
-	b	.L1373
-.L1375:
-	mov	r7, #-1
-	b	.L1367
-.L1377:
+	b	.L1427
+.L1429:
+	mov	r8, #-1
+	b	.L1420
+.L1431:
 	.align	2
-.L1376:
+.L1430:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
 	.word	.LANCHOR12
-	.word	.LANCHOR124
+	.word	.LANCHOR148
+	.word	.LC107
+	.word	.LANCHOR158
+	.word	.LANCHOR117
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -10235,34 +10660,34 @@ FtlLoadEctTbl:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #64
-	ldr	r4, .L1380
-	ldr	r5, .L1380+4
+	ldr	r4, .L1434
+	ldr	r5, .L1434+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1380+8
+	ldr	r3, .L1434+8
 	cmp	r2, r3
-	beq	.L1379
-	ldr	r1, .L1380+12
-	ldr	r0, .L1380+16
+	beq	.L1433
+	ldr	r1, .L1434+12
+	ldr	r0, .L1434+16
 	bl	printf
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L1379:
+.L1433:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1381:
+.L1435:
 	.align	2
-.L1380:
+.L1434:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
-	.word	.LC103
+	.word	.LC108
 	.word	.LC71
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
@@ -10278,75 +10703,75 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldr	r4, .L1385
+	ldr	r4, .L1439
 	movs	r0, #0
-	ldr	r5, .L1385+4
+	ldr	r5, .L1439+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1383
+	beq	.L1437
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
 	str	r5, [r4]
-.L1383:
+.L1437:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1385+8
-	bne	.L1384
+	ldr	r3, .L1439+8
+	bne	.L1438
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1385+12
+	ldr	r2, .L1439+12
 	str	r1, [r2]
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1385+16
+	ldr	r2, .L1439+16
 	str	r1, [r2]
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1385+20
+	ldr	r2, .L1439+20
 	str	r1, [r2]
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1385+24
+	ldr	r2, .L1439+24
 	str	r1, [r2]
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1385+28
+	ldr	r2, .L1439+28
 	str	r1, [r2]
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1385+32
+	ldr	r2, .L1439+32
 	str	r1, [r2]
 	ldr	r2, [r4, #28]
 	ldr	r1, [r4, #32]
 	str	r2, [r3]
-	ldr	r2, .L1385+36
+	ldr	r2, .L1439+36
 	str	r1, [r2]
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1385+40
+	ldr	r2, .L1439+40
 	str	r1, [r2]
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1385+44
+	ldr	r2, .L1439+44
 	str	r1, [r2]
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1385+48
+	ldr	r2, .L1439+48
 	str	r1, [r2]
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1385+52
+	ldr	r2, .L1439+52
 	str	r1, [r2]
-.L1384:
-	ldr	r1, .L1385+56
-	ldr	r2, .L1385+60
+.L1438:
+	ldr	r1, .L1439+56
+	ldr	r2, .L1439+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1385+64
+	ldr	r1, .L1439+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1385+68
+	ldr	r3, .L1439+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1386:
+.L1440:
 	.align	2
-.L1385:
+.L1439:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	.LANCHOR73
@@ -10393,213 +10818,207 @@ FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r6, #0
-	ldr	r3, .L1400
-	movw	fp, #65535
-	ldr	r8, .L1400+80
-	ldr	r10, .L1400+84
-	ldrh	r2, [r3]
-	ldr	r0, [r8]
+	mov	fp, #0
+	ldr	r3, .L1457
+	ldr	r4, .L1457+4
+	ldr	r10, .L1457+76
+	ldr	r0, [r3]
+	ldr	r5, .L1457+8
 	ldr	r7, [r10]
-	ldr	r5, .L1400+4
-	ldr	r4, .L1400+8
-	ldr	r1, .L1400+12
+	ldrh	r2, [r4]
 	str	r0, [r5, #8]
 	str	r7, [r5, #12]
 	strh	r2, [r7, #2]	@ movhi
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
-	ldr	r2, [r3, #8]
-	str	r6, [r7, #8]
-	str	r6, [r7, #12]
+	ldr	r2, [r4, #8]
+	ldr	r6, .L1457+12
+	ldr	ip, .L1457+80
 	str	r2, [r7, #4]
-	ldr	r2, .L1400+16
+	ldr	r2, .L1457+16
+	str	fp, [r7, #8]
+	str	fp, [r7, #12]
+	stm	r6, {r2, ip}
+	ldrh	r2, [r4, #6]
 	str	r3, [sp, #4]
-	stm	r4, {r1, r2}
-	ldrh	r2, [r3, #6]
-	strh	r2, [r4, #8]	@ movhi
-	ldr	r2, .L1400+20
+	ldr	r8, .L1457+84
+	strh	r2, [r6, #8]	@ movhi
+	ldr	r2, .L1457+20
 	ldrh	r2, [r2]
-	strb	r2, [r4, #10]
-	ldr	r2, .L1400+24
+	strb	r2, [r6, #10]
+	ldr	r2, .L1457+24
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r4, #14]	@ movhi
+	strh	r1, [r6, #14]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r4, #11]
+	strb	r2, [r6, #11]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1400+28
-	strh	r1, [r4, #16]	@ movhi
+	ldr	r2, .L1457+28
+	strh	r1, [r6, #16]	@ movhi
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r4, #18]	@ movhi
+	strh	r1, [r6, #18]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	orr	r1, r1, ip, lsl #6
-	strh	r1, [r4, #20]	@ movhi
-	strb	r2, [r4, #12]
-	ldr	r2, .L1400+32
+	strh	r1, [r6, #20]	@ movhi
+	strb	r2, [r6, #12]
+	ldr	r2, .L1457+32
 	ldrh	r1, [r2]
 	ldrh	ip, [r2, #2]
-	strh	r1, [r4, #22]	@ movhi
+	strh	r1, [r6, #22]	@ movhi
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	strb	r2, [r4, #13]
+	strb	r2, [r6, #13]
 	orr	r1, r1, ip, lsl #6
-	ldr	r2, .L1400+36
-	strh	r1, [r4, #24]	@ movhi
+	ldr	r2, .L1457+36
+	strh	r1, [r6, #24]	@ movhi
 	movs	r1, #255
 	ldr	r2, [r2]
-	str	r2, [r4, #32]
-	ldr	r2, .L1400+40
-	ldr	r2, [r2]
-	str	r2, [r4, #40]
-	ldr	r2, .L1400+44
+	str	r2, [r6, #32]
+	ldr	r2, [r8]
+	str	r2, [r6, #40]
+	ldr	r2, .L1457+40
 	ldr	r2, [r2]
-	str	r2, [r4, #36]
-	ldr	r2, .L1400+48
+	str	r2, [r6, #36]
+	ldr	r2, .L1457+44
 	ldrh	r2, [r2]
 	bl	ftl_memset
-	mov	r1, r4
-	ldr	r4, .L1400+52
+	mov	r1, r6
+	ldr	r6, .L1457+48
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-	ldrh	r2, [r4]
+	ldrh	r2, [r6]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1400+56
+	ldr	r1, .L1457+52
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-	ldrh	r0, [r4]
-	ldr	r1, .L1400+60
-	ldr	r4, [r5, #8]
+	ldrh	r0, [r6]
+	ldr	r1, .L1457+56
+	ldr	r6, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
 	ldr	r1, [r1]
 	adds	r2, r2, #4
 	bic	r0, r0, #3
-	add	r0, r0, r4
+	add	r0, r0, r6
+	mov	r6, fp
 	bl	ftl_memcpy
-	mov	r0, r6
+	mov	r0, fp
+	movw	fp, #65535
 	bl	FtlUpdateVaildLpn
+.L1443:
 	ldr	r3, [sp, #4]
-	mov	r4, r3
-.L1389:
-	ldr	r3, [r8]
+	ldrh	r1, [r4, #2]
 	ldrh	r2, [r4]
-	ldr	r0, .L1400+4
+	ldr	r3, [r3]
 	str	r3, [r5, #8]
 	ldr	r3, [r10]
 	str	r3, [r5, #12]
-	ldrh	r3, [r4, #2]
-	orr	r3, r3, r2, lsl #10
+	orr	r3, r1, r2, lsl #10
 	str	r3, [r5, #4]
-	movs	r3, #1
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-	ldr	r3, .L1400+64
-	ldrh	r2, [r4, #2]
+	ldr	r3, .L1457+60
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1390
-	ldrh	r3, [r4]
-	ldrh	fp, [r4, #4]
-	strh	r3, [r4, #4]	@ movhi
+	cmp	r1, r3
+	blt	.L1444
 	movs	r3, #0
+	ldrh	fp, [r4, #4]
 	strh	r3, [r4, #2]	@ movhi
+	strh	r2, [r4, #4]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1400+40
+	ldr	r3, [r8]
 	strh	r0, [r4]	@ movhi
-	ldr	r3, [r2]
-	adds	r1, r3, #1
+	adds	r2, r3, #1
 	str	r3, [r4, #8]
-	str	r1, [r2]
+	str	r2, [r8]
 	lsls	r2, r0, #10
 	str	r2, [r5, #4]
 	str	r3, [r7, #4]
-	movs	r3, #1
 	strh	r0, [r7, #2]	@ movhi
+.L1444:
+	movs	r3, #1
+	ldr	r0, .L1457+8
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1400+4
 	bl	FlashProgPages
-.L1390:
 	ldrh	r3, [r4, #2]
 	ldr	r2, [r5]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	adds	r2, r2, #1
+	adds	r1, r2, #1
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1391
+	bne	.L1445
 	cmp	r3, #1
-	bne	.L1392
-	movw	r2, #1124
-	ldr	r1, .L1400+68
-	ldr	r0, .L1400+72
+	bne	.L1446
+	movw	r2, #1135
+	ldr	r1, .L1457+64
+	ldr	r0, .L1457+68
 	bl	printf
-.L1392:
+.L1446:
 	ldrh	r3, [r4, #2]
 	adds	r6, r6, #1
 	uxth	r6, r6
 	cmp	r3, #1
 	itttt	eq
-	ldreq	r3, .L1400+64
+	ldreq	r3, .L1457+60
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	cmp	r6, #3
-	bls	.L1389
+	bls	.L1443
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1400+76
+	ldr	r0, .L1457+72
 	bl	printf
-.L1395:
-	b	.L1395
-.L1391:
+.L1449:
+	b	.L1449
+.L1445:
 	cmp	r3, #1
-	beq	.L1389
+	beq	.L1443
+	cmp	r2, #256
+	beq	.L1443
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1396
+	beq	.L1450
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.L1396:
+.L1450:
 	movs	r0, #0
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1401:
+.L1458:
 	.align	2
-.L1400:
+.L1457:
+	.word	.LANCHOR115
 	.word	.LANCHOR79
-	.word	.LANCHOR106
+	.word	.LANCHOR148
 	.word	.LANCHOR39
 	.word	1179929683
-	.word	1342177348
 	.word	.LANCHOR10
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
 	.word	.LANCHOR72
-	.word	.LANCHOR70
 	.word	.LANCHOR71
 	.word	.LANCHOR23
 	.word	.LANCHOR5
 	.word	.LANCHOR42
 	.word	.LANCHOR1
 	.word	.LANCHOR20
-	.word	.LANCHOR166
+	.word	.LANCHOR171
 	.word	.LC1
-	.word	.LC104
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+	.word	.LC109
+	.word	.LANCHOR123
+	.word	1342177352
+	.word	.LANCHOR70
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -10632,17 +11051,17 @@ sftl_deinit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1405
+	ldr	r3, .L1462
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1404
+	bne	.L1461
 	bl	FtlSysFlush
-.L1404:
+.L1461:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1406:
+.L1463:
 	.align	2
-.L1405:
+.L1462:
 	.word	.LANCHOR86
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
@@ -10656,24 +11075,24 @@ sftl_deinit:
 FtlDiscard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1422
+	ldr	r3, .L1479
 	adds	r2, r0, r1
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r7, r0
 	mov	r5, r1
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1415
+	bhi	.L1472
 	cmp	r1, #31
-	bhi	.L1409
-.L1414:
+	bhi	.L1466
+.L1471:
 	movs	r0, #0
-.L1407:
+.L1464:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1409:
-	ldr	r8, .L1422+12
+.L1466:
+	ldr	r8, .L1479+12
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
@@ -10681,7 +11100,7 @@ FtlDiscard:
 	mov	r6, r0
 	subs	r7, r7, r3
 	uxth	r7, r7
-	cbz	r7, .L1410
+	cbz	r7, .L1467
 	subs	r4, r4, r7
 	adds	r6, r6, #1
 	cmp	r4, r5
@@ -10689,32 +11108,32 @@ FtlDiscard:
 	movcs	r4, r5
 	uxth	r4, r4
 	subs	r5, r5, r4
-.L1410:
-	ldr	r4, .L1422+4
+.L1467:
+	ldr	r4, .L1479+4
 	mov	r3, #-1
-	ldr	r7, .L1422+8
+	ldr	r7, .L1479+8
 	str	r3, [sp, #4]
-.L1411:
+.L1468:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1413
-	ldr	r3, .L1422+4
+	bcs	.L1470
+	ldr	r3, .L1479+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1414
+	bls	.L1471
 	movs	r4, #0
 	str	r4, [r3]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1414
-.L1413:
+	b	.L1471
+.L1470:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1412
+	beq	.L1469
 	ldr	r3, [r4]
 	movs	r2, #1
 	add	r1, sp, #4
@@ -10729,19 +11148,19 @@ FtlDiscard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1412:
+.L1469:
 	ldrh	r3, [r8]
 	adds	r6, r6, #1
 	subs	r5, r5, r3
-	b	.L1411
-.L1415:
+	b	.L1468
+.L1472:
 	mov	r0, #-1
-	b	.L1407
-.L1423:
+	b	.L1464
+.L1480:
 	.align	2
-.L1422:
+.L1479:
 	.word	.LANCHOR34
-	.word	.LANCHOR167
+	.word	.LANCHOR172
 	.word	.LANCHOR63
 	.word	.LANCHOR12
 	.size	FtlDiscard, .-FtlDiscard
@@ -10757,96 +11176,103 @@ FtlVpcCheckAndModify:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	movs	r5, #0
-	ldr	r1, .L1436
-	ldr	r0, .L1436+4
+	movs	r4, #0
+	ldr	r1, .L1494
+	ldr	r0, .L1494+4
 	bl	printf
-	ldr	r3, .L1436+8
+	ldr	r3, .L1494+8
 	movs	r1, #0
-	ldr	r4, .L1436+12
-	ldr	r6, .L1436+16
+	ldr	r5, .L1494+12
+	ldr	r6, .L1494+16
 	ldrh	r2, [r3]
-	ldr	r0, [r4]
+	ldr	r0, [r5]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.L1425:
+.L1482:
 	ldr	r3, [r6]
-	cmp	r5, r3
-	bcc	.L1427
-	ldr	r10, .L1436+36
+	cmp	r4, r3
+	bcc	.L1484
+	ldr	r10, .L1494+36
 	movs	r7, #0
-	ldr	r8, .L1436+40
-.L1428:
+	ldr	r8, .L1494+40
+.L1485:
 	ldrh	r3, [r10]
-	uxth	r5, r7
-	cmp	r3, r5
-	bhi	.L1432
+	uxth	r6, r7
+	cmp	r3, r6
+	bhi	.L1490
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
 	add	sp, sp, #12
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L1427:
+.L1484:
 	movs	r2, #0
 	add	r1, sp, #4
-	mov	r0, r5
+	mov	r0, r4
 	bl	log2phys
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1426
+	beq	.L1483
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r2, [r4]
+	ldr	r2, [r5]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.L1426:
-	adds	r5, r5, #1
-	b	.L1425
-.L1432:
+.L1483:
+	adds	r4, r4, #1
+	b	.L1482
+.L1490:
 	ldr	r3, [r8]
-	uxth	r6, r7
-	ldrh	r2, [r3, r6, lsl #1]
-	ldr	r3, [r4]
-	ldrh	r3, [r3, r6, lsl #1]
+	uxth	r4, r7
+	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r2, r3
-	beq	.L1430
+	beq	.L1487
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1430
-	mov	r1, r6
-	ldr	r0, .L1436+20
+	beq	.L1487
+	mov	r1, r4
+	ldr	r0, .L1494+20
 	bl	printf
-	ldr	r3, .L1436+24
+	ldr	r3, .L1494+24
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	beq	.L1430
-	ldr	r3, .L1436+28
+	cmp	r3, r6
+	beq	.L1487
+	ldr	r3, .L1494+28
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	beq	.L1430
-	ldr	r3, .L1436+32
+	cmp	r3, r6
+	beq	.L1487
+	ldr	r3, .L1494+32
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	beq	.L1430
-	ldr	r3, [r4]
-	mov	r0, r5
-	ldrh	r2, [r3, r6, lsl #1]
+	cmp	r3, r6
+	beq	.L1487
 	ldr	r3, [r8]
-	strh	r2, [r3, r6, lsl #1]	@ movhi
-	bl	update_vpc_list
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1430:
+	ldrh	r2, [r3, r4, lsl #1]
+	cbnz	r2, .L1489
+	ldr	r2, [r5]
+	ldrh	r2, [r2, r4, lsl #1]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+.L1487:
 	adds	r7, r7, #1
-	b	.L1428
-.L1437:
+	b	.L1485
+.L1489:
+	ldr	r2, [r5]
+	mov	r0, r6
+	ldrh	r2, [r2, r4, lsl #1]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	update_vpc_list
+	b	.L1487
+.L1495:
 	.align	2
-.L1436:
-	.word	.LANCHOR168
+.L1494:
+	.word	.LANCHOR173
 	.word	.LC94
 	.word	.LANCHOR6
 	.word	.LANCHOR128
 	.word	.LANCHOR61
-	.word	.LC105
+	.word	.LC110
 	.word	.LANCHOR51
 	.word	.LANCHOR53
 	.word	.LANCHOR52
@@ -10864,47 +11290,47 @@ FtlVpcCheckAndModify:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1448
+	ldr	r3, .L1506
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r0]
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1439
-	movw	r2, #2684
-	ldr	r1, .L1448+4
-	ldr	r0, .L1448+8
+	bcs	.L1497
+	movw	r2, #2714
+	ldr	r1, .L1506+4
+	ldr	r0, .L1506+8
 	bl	printf
-.L1439:
+.L1497:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1440
-	ldr	r3, .L1448+12
+	beq	.L1498
+	ldr	r3, .L1506+12
 	mov	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1441
+	cbz	r3, .L1499
 	bl	INSERT_DATA_LIST
-.L1440:
-	ldr	r5, .L1448+16
+.L1498:
+	ldr	r5, .L1506+16
 	movw	r2, #65535
 	movs	r3, #1
 	strb	r3, [r6, #8]
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1442
+	beq	.L1500
 	cmp	r4, r0
-	bne	.L1443
-	ldr	r3, .L1448+12
+	bne	.L1501
+	ldr	r3, .L1506+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1444
-.L1443:
+	cbz	r3, .L1502
+.L1501:
 	bl	update_vpc_list
-.L1444:
+.L1502:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1442:
+.L1500:
 	mov	r0, r6
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -10913,17 +11339,17 @@ allocate_new_data_superblock:
 	bl	FtlVpcTblFlush
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1441:
+.L1499:
 	bl	INSERT_FREE_LIST
-	b	.L1440
-.L1449:
+	b	.L1498
+.L1507:
 	.align	2
-.L1448:
+.L1506:
 	.word	.LANCHOR5
-	.word	.LANCHOR169
+	.word	.LANCHOR174
 	.word	.LC1
 	.word	.LANCHOR42
-	.word	.LANCHOR150
+	.word	.LANCHOR142
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -10938,25 +11364,25 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r6, #0
-	ldr	r8, .L1464+24
+	ldr	r8, .L1522+24
 	mov	r4, r3
 	movs	r2, #0
 	mov	r5, r0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	mov	r10, r1
 	bl	FlashProgPages
-.L1451:
+.L1509:
 	cmp	r6, r10
-	beq	.L1458
-	ldr	r7, .L1464
-	b	.L1459
-.L1454:
+	beq	.L1516
+	ldr	r7, .L1522
+	b	.L1517
+.L1512:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1452
+	bne	.L1510
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
 	ldrh	r2, [r1, r3, lsl #1]
@@ -10967,13 +11393,13 @@ FtlProgPages:
 	movs	r3, #0
 	strb	r3, [r4, #6]
 	strh	r3, [r4, #4]	@ movhi
-.L1452:
+.L1510:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1453
+	cbnz	r3, .L1511
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1453:
-	ldr	r2, .L1464+4
+.L1511:
+	ldr	r2, .L1522+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -10989,20 +11415,20 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L1459:
+.L1517:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1454
-	ldr	r3, .L1464+8
+	beq	.L1512
+	ldr	r3, .L1522+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1455
-	movw	r2, #933
-	ldr	r1, .L1464+12
-	ldr	r0, .L1464+16
+	bcc	.L1513
+	movw	r2, #955
+	ldr	r1, .L1522+12
+	ldr	r0, .L1522+16
 	bl	printf
-.L1455:
+.L1513:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
 	movs	r2, #1
@@ -11015,43 +11441,43 @@ FtlProgPages:
 	bl	P2V_block_in_plane
 	cmp	fp, #-1
 	mov	r7, r0
-	beq	.L1456
+	beq	.L1514
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1457
+	cbnz	r2, .L1515
 	mov	r1, r0
-	ldr	r0, .L1464+20
+	ldr	r0, .L1522+20
 	bl	printf
-.L1457:
+.L1515:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.L1456:
+.L1514:
 	adds	r6, r6, #1
 	adds	r5, r5, #20
-	b	.L1451
-.L1458:
-	ldr	r3, .L1464+8
+	b	.L1509
+.L1516:
+	ldr	r3, .L1522+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1450
-	mov	r2, #948
-	ldr	r1, .L1464+12
-	ldr	r0, .L1464+16
+	bcc	.L1508
+	movw	r2, #970
+	ldr	r1, .L1522+12
+	ldr	r0, .L1522+16
 	bl	printf
-.L1450:
+.L1508:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1465:
+.L1523:
 	.align	2
-.L1464:
+.L1522:
 	.word	.LANCHOR19
 	.word	.LANCHOR81
 	.word	.LANCHOR3
-	.word	.LANCHOR170
+	.word	.LANCHOR175
 	.word	.LC1
-	.word	.LC106
+	.word	.LC111
 	.word	.LANCHOR42
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
@@ -11067,54 +11493,54 @@ FtlGcFreeTempBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movw	r2, #65535
-	ldr	r4, .L1492
-	ldr	r6, .L1492+4
+	ldr	r4, .L1550
+	ldr	r6, .L1550+4
 	ldrh	r5, [r4]
 	ldrh	r1, [r6]
 	cmp	r5, r2
-	bne	.L1467
-.L1477:
-	ldr	r3, .L1492+8
+	bne	.L1525
+.L1535:
+	ldr	r3, .L1550+8
 	movs	r2, #0
 	str	r2, [r3]
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1490
-.L1468:
+	bne	.L1548
+.L1526:
 	movs	r0, #0
-.L1466:
+.L1524:
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1467:
-	cbz	r0, .L1470
-	ldr	r3, .L1492+12
+.L1525:
+	cbz	r0, .L1528
+	ldr	r3, .L1550+12
 	ldrh	r0, [r3]
 	cmp	r0, r2
-	beq	.L1471
-.L1472:
+	beq	.L1529
+.L1530:
 	movs	r1, #2
-.L1470:
-	ldr	r0, .L1492
+.L1528:
+	ldr	r0, .L1550
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #12]
 	adds	r0, r0, #1
-	beq	.L1473
-	ldr	r3, .L1492+16
+	beq	.L1531
+	ldr	r3, .L1550+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1474
+	bls	.L1532
 	subs	r3, r3, #5
 	movs	r0, #1
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1474:
-	ldr	r4, .L1492+8
+.L1532:
+	ldr	r4, .L1550+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1475
-	ldr	r2, .L1492+20
+	cbnz	r2, .L1533
+	ldr	r2, .L1550+20
 	ldr	r0, [sp, #12]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11122,60 +11548,60 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1475:
+.L1533:
 	movs	r3, #0
 	str	r3, [r4]
-.L1486:
+.L1544:
 	movs	r0, #1
-	b	.L1466
-.L1471:
+	b	.L1524
+.L1529:
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1492+24
+	ldr	r3, .L1550+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1472
-	b	.L1470
-.L1473:
-	ldr	r3, .L1492+12
+	bhi	.L1530
+	b	.L1528
+.L1531:
+	ldr	r3, .L1550+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1486
-	b	.L1477
-.L1490:
+	bne	.L1544
+	b	.L1535
+.L1548:
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1492+28
+	ldr	r5, .L1550+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1478
+	beq	.L1536
 	movs	r2, #162
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1550+32
+	ldr	r0, .L1550+36
 	bl	printf
-.L1478:
+.L1536:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1492+40
+	ldr	r2, .L1550+40
 	ldrh	r0, [r4]
-	ldr	fp, .L1492+68
+	ldr	fp, .L1550+68
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
 	movs	r6, #0
 	str	r2, [sp, #4]
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L1492+44
+	ldr	r1, .L1550+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L1479:
+.L1537:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1483
+	bhi	.L1541
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldr	r3, [sp, #4]
@@ -11183,10 +11609,10 @@ FtlGcFreeTempBlock:
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1484
+	beq	.L1542
 	bl	INSERT_DATA_LIST
-.L1485:
-	ldr	r3, .L1492+48
+.L1543:
+	ldr	r3, .L1550+48
 	movw	r6, #65535
 	strh	r6, [r4]	@ movhi
 	movs	r4, #0
@@ -11194,35 +11620,35 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1492+24
+	ldr	r3, .L1550+52
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L1550+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1492+52
+	ldr	r3, .L1550+56
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1468
-	ldr	r3, .L1492+56
+	ble	.L1526
+	ldr	r3, .L1550+60
 	movs	r2, #20
-	strh	r6, [r3]	@ movhi
-	ldr	r3, .L1492+60
 	strh	r2, [r3]	@ movhi
-	b	.L1468
-.L1483:
+	b	.L1526
+.L1541:
 	uxth	r3, r6
 	movs	r7, #12
 	ldr	r2, [fp]
 	muls	r7, r3, r7
-	ldr	r3, .L1492+64
+	ldr	r3, .L1550+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1480
+	bcc	.L1538
 	movs	r2, #168
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1550+32
+	ldr	r0, .L1550+36
 	bl	printf
-.L1480:
+.L1538:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
@@ -11230,7 +11656,7 @@ FtlGcFreeTempBlock:
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1481
+	bne	.L1539
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	movs	r2, #1
@@ -11239,38 +11665,38 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r10, #8]
 	bl	log2phys
 	mov	r0, r7
-.L1491:
+.L1549:
 	bl	decrement_vpc_count
-.L1482:
+.L1540:
 	adds	r6, r6, #1
-	b	.L1479
-.L1481:
+	b	.L1537
+.L1539:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1482
+	beq	.L1540
 	ldrh	r0, [r4]
-	b	.L1491
-.L1484:
+	b	.L1549
+.L1542:
 	bl	INSERT_FREE_LIST
-	b	.L1485
-.L1493:
+	b	.L1543
+.L1551:
 	.align	2
-.L1492:
+.L1550:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
-	.word	.LANCHOR152
-	.word	.LANCHOR156
+	.word	.LANCHOR144
+	.word	.LANCHOR162
 	.word	.LANCHOR43
 	.word	.LANCHOR81
 	.word	.LANCHOR48
 	.word	.LANCHOR97
-	.word	.LANCHOR171
+	.word	.LANCHOR176
 	.word	.LC1
 	.word	.LANCHOR42
 	.word	.LANCHOR67
 	.word	.LANCHOR96
-	.word	.LANCHOR78
 	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LANCHOR82
 	.word	.LANCHOR98
 	.word	.LANCHOR61
@@ -11287,31 +11713,31 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1496
-	ldr	r5, .L1496+4
+	ldr	r4, .L1554
+	ldr	r5, .L1554+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1494
-	ldr	r0, .L1496+8
+	bcc	.L1552
+	ldr	r0, .L1554+8
 	bl	FtlMapBlkWriteDump_data
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1496+12
+	ldr	r3, .L1554+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1494:
+.L1552:
 	pop	{r3, r4, r5, pc}
-.L1497:
+.L1555:
 	.align	2
-.L1496:
+.L1554:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
+	.word	.LANCHOR140
 	.word	.LANCHOR144
-	.word	.LANCHOR152
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -11326,13 +11752,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r5, .L1499
-	ldr	r3, .L1499+4
+	ldr	r5, .L1557
+	ldr	r3, .L1557+4
 	mov	r0, r5
 	str	r4, [r3]
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1499+8
+	ldr	r5, .L1557+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -11343,11 +11769,11 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1500:
+.L1558:
 	.align	2
-.L1499:
+.L1557:
 	.word	.LANCHOR51
-	.word	.LANCHOR162
+	.word	.LANCHOR168
 	.word	.LANCHOR52
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
@@ -11363,45 +11789,45 @@ Ftl_gc_temp_data_write_back:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r4, .L1508
+	ldr	r4, .L1566
 	movs	r6, #0
 	movs	r7, #20
 	mov	r2, r3
-	ldr	r5, .L1508+4
+	ldr	r5, .L1566+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.L1502:
+.L1560:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1505
+	bhi	.L1563
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-	ldr	r3, .L1508+8
+	ldr	r3, .L1566+8
 	movs	r0, #0
 	str	r0, [r4]
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1501
+	cbnz	r3, .L1559
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L1507
-.L1505:
+	b	.L1565
+.L1563:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1503
-	ldr	r3, .L1508+8
+	bne	.L1561
+	ldr	r3, .L1566+8
 	movs	r5, #0
-	ldr	r0, .L1508+12
+	ldr	r0, .L1566+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L1508+16
+	ldr	r2, .L1566+16
 	ldr	r0, [r1, #4]
 	ldr	r3, [r2, #96]
 	ubfx	r0, r0, #10, #16
@@ -11410,22 +11836,22 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1507:
+.L1565:
 	movs	r0, #1
-.L1501:
+.L1559:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1503:
+.L1561:
 	ldr	r3, [r1, #12]
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L1502
-.L1509:
+	b	.L1560
+.L1567:
 	.align	2
-.L1508:
+.L1566:
 	.word	.LANCHOR89
-	.word	.LANCHOR121
+	.word	.LANCHOR113
 	.word	.LANCHOR53
 	.word	.LANCHOR42
 	.word	.LANCHOR81
@@ -11443,38 +11869,180 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r4, .L1513
+	ldr	r4, .L1571
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1511
+	beq	.L1569
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1512
-.L1511:
+	cbnz	r3, .L1570
+.L1569:
 	movs	r0, #0
 	movs	r5, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1513
+	ldr	r0, .L1571
 	strb	r5, [r4, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1513+4
+	ldr	r3, .L1571+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L1513+8
+	ldr	r3, .L1571+8
 	strh	r5, [r3]	@ movhi
 	bl	l2p_flush
 	mov	r0, r5
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1512:
-	ldr	r0, .L1513
+.L1570:
+	ldr	r0, .L1571
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1514:
+.L1572:
 	.align	2
-.L1513:
+.L1571:
 	.word	.LANCHOR53
 	.word	.LANCHOR96
 	.word	.LANCHOR97
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r6, .L1588
+	strh	r3, [r6]	@ movhi
+	ldr	r3, .L1588+4
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L1588+8
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1574
+.L1576:
+	mov	r7, #-1
+.L1573:
+	mov	r0, r7
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1574:
+	bl	FtlLoadSysInfo
+	mov	r7, r0
+	cmp	r0, #0
+	bne	.L1576
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L1588+12
+	movs	r0, #12
+	ldrh	r1, [r3]
+	ldr	r3, .L1588+16
+	ldr	r2, [r3]
+	mov	r3, r7
+.L1577:
+	cmp	r3, r1
+	bge	.L1582
+	mla	r4, r0, r3, r2
+	ldr	r4, [r4, #4]
+	cmp	r4, #0
+	bge	.L1578
+.L1582:
+	ldr	r5, .L1588+20
+	cmp	r3, r1
+	ldr	r4, .L1588+24
+	ldrh	r2, [r5, #28]
+	add	r2, r2, #1
+	strh	r2, [r5, #28]	@ movhi
+	bge	.L1587
+.L1579:
+	ldr	r6, .L1588+28
+	ldr	r0, .L1588+24
+	bl	FtlSuperblockPowerLostFix
+	mov	r0, r6
+	bl	FtlSuperblockPowerLostFix
+	ldr	r3, .L1588+32
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	ldr	r0, .L1588+36
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	ip, [r6]
+	ldrh	r3, [r0]
+	ldrh	lr, [r6, #4]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	ldrh	r1, [r2, ip, lsl #1]
+	sub	r1, r1, lr
+	strh	r1, [r2, ip, lsl #1]	@ movhi
+	strb	r3, [r6, #6]
+	strh	r3, [r6, #4]	@ movhi
+	ldrh	r3, [r5, #30]
+	ldrh	r2, [r0]
+	adds	r3, r3, #1
+	strh	r2, [r6, #2]	@ movhi
+	strh	r3, [r5, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L1583
+.L1578:
+	adds	r3, r3, #1
+	b	.L1577
+.L1587:
+	ldrh	r3, [r6]
+	cmp	r3, #0
+	bne	.L1579
+.L1583:
+	bl	FtlVpcCheckAndModify
+	ldrh	r0, [r4]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1573
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1573
+	ldr	r4, .L1588+28
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1573
+	bl	FtlGcRefreshBlock
+	ldrh	r0, [r4]
+	bl	FtlGcRefreshBlock
+	bl	FtlVpcTblFlush
+	ldr	r0, .L1588+24
+	bl	allocate_new_data_superblock
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+	b	.L1573
+.L1589:
+	.align	2
+.L1588:
+	.word	.LANCHOR167
+	.word	.LANCHOR4
+	.word	.LANCHOR79
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR39
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -11486,334 +12054,310 @@ Ftl_get_new_temp_ppa:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1633
+	ldr	r3, .L1713
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
 	sub	sp, sp, #48
+	str	r0, [sp, #8]
 	ldr	r0, [r3]
 	cmp	r0, #0
-	bne	.L1590
-	ldr	r3, .L1633+4
+	bne	.L1667
+	ldr	r3, .L1713+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1515
-	ldr	r3, .L1633+8
+	bls	.L1590
+	ldr	r3, .L1713+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1517
-.L1520:
-	ldr	r3, .L1633+12
+	bne	.L1592
+.L1595:
+	ldr	r3, .L1713+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1518
-.L1519:
-	ldr	r2, .L1633+16
+	bne	.L1593
+.L1594:
+	bl	FtlReadRefresh
+	ldr	r2, .L1713+16
 	movw	r5, #65535
-	ldr	r6, .L1633+20
+	ldr	r6, .L1713+20
+	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
 	ldrh	r0, [r6]
 	adds	r3, r3, #1
-	add	r3, r3, r7, lsl #7
+	add	r3, r3, r1, lsl #7
 	cmp	r0, r5
 	str	r3, [r2]
-	bne	.L1521
-	ldr	r1, .L1633+24
+	bne	.L1596
+	ldr	r1, .L1713+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1522
-	ldr	r0, .L1633+28
-	ldrh	r10, [r0]
-	cmp	r10, r1
-	bne	.L1523
-	ldr	r1, .L1633+32
-	ldrh	r0, [r1]
-	mov	r8, r1
-	cmp	r0, #24
+	bne	.L1597
+	ldr	r0, .L1713+28
+	ldrh	r8, [r0]
+	cmp	r8, r1
+	bne	.L1598
+	ldr	r7, .L1713+32
+	ldrh	r1, [r7]
+	cmp	r1, #24
 	ite	cc
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1523
-	ldr	r3, .L1633+36
+	bls	.L1598
+	ldr	r3, .L1713+36
 	movs	r4, #0
 	str	r4, [r2]
 	strh	r4, [r3]	@ movhi
 	bl	GetSwlReplaceBlock
-	cmp	r0, r10
+	cmp	r0, r8
 	mov	r5, r0
-	bne	.L1594
-	ldr	r10, .L1633+96
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
+	bne	.L1671
+	ldr	r8, .L1713+96
+	ldrh	r2, [r7]
+	ldrh	r3, [r8]
 	cmp	r2, r3
-	bcs	.L1526
+	bcs	.L1601
 	movs	r0, #64
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1528
+	beq	.L1603
 	mov	r0, r3
-	ldr	r3, .L1633+40
+	ldr	r3, .L1713+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1529
+	bhi	.L1604
 	mov	r0, r4
 	bl	List_get_gc_head_node
 	uxth	r4, r0
 	movs	r3, #128
-	strh	r3, [r10]	@ movhi
+	strh	r3, [r8]	@ movhi
 	cmp	r4, r5
-	bne	.L1525
-.L1528:
+	bne	.L1600
+.L1603:
 	bl	FtlGcReFreshBadBlk
-	cmp	r7, #0
-	bne	.L1531
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1606
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1531
-.L1588:
-	ldr	r3, .L1633+32
+	bne	.L1606
+.L1665:
+	ldr	r3, .L1713+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1595
-	ldr	r2, .L1633+44
+	bhi	.L1672
+	ldr	r2, .L1713+44
 	cmp	r3, #16
 	ldrh	r4, [r2]
-	bls	.L1533
+	bls	.L1608
 	lsrs	r4, r4, #5
-.L1532:
-	ldr	r2, .L1633+48
-	ldrh	r1, [r2]
-	cmp	r1, r3
-	mov	r1, r2
-	bcs	.L1536
-	ldr	r3, .L1633+24
+.L1607:
+	ldr	r1, .L1713+48
+	ldrh	r2, [r1]
+	cmp	r2, r3
+	mov	r2, r1
+	bcs	.L1611
+	ldr	r3, .L1713+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1537
-	ldr	r0, .L1633+28
+	bne	.L1612
+	ldr	r0, .L1713+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1537
-	ldr	r3, .L1633+36
+	bne	.L1612
+	ldr	r3, .L1713+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1538
-	ldr	r3, .L1633+52
-	ldr	r4, .L1633+56
+	cbnz	r0, .L1613
+	ldr	r3, .L1713+52
+	ldr	r4, .L1713+56
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1539
-.L1538:
-	ldr	r3, .L1633+60
+	bcs	.L1614
+.L1613:
+	ldr	r3, .L1713+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L1540:
-	ldr	r3, .L1633+64
+	strh	r3, [r2]	@ movhi
+.L1615:
+	ldr	r3, .L1713+64
 	movs	r2, #0
 	str	r2, [r3]
-.L1515:
+.L1590:
 	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1517:
-	ldr	r2, .L1633+24
+.L1592:
+	ldr	r2, .L1713+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1520
+	beq	.L1595
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
 	cmp	r0, #0
-	beq	.L1520
+	beq	.L1595
 	movs	r0, #1
-	b	.L1515
-.L1518:
-	ldr	r1, .L1633+28
+	b	.L1590
+.L1593:
+	ldr	r1, .L1713+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	itt	eq
 	strheq	r0, [r1]	@ movhi
 	strheq	r2, [r3]	@ movhi
-	b	.L1519
-.L1529:
+	b	.L1594
+.L1604:
 	movs	r3, #64
-.L1627:
-	strh	r3, [r10]	@ movhi
-	b	.L1528
-.L1526:
+.L1707:
+	strh	r3, [r8]	@ movhi
+	b	.L1603
+.L1601:
 	movs	r3, #80
-	b	.L1627
-.L1594:
+	b	.L1707
+.L1671:
 	mov	r4, r0
-.L1525:
-	ldr	r3, .L1633+40
+.L1600:
+	ldr	r3, .L1713+40
 	mov	r5, r4
-	ldr	r1, .L1633+48
-	ldrh	r2, [r8]
+	ldr	r1, .L1713+48
+	ldrh	r2, [r7]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1633+68
+	ldr	r0, .L1713+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1633+72
+	ldr	r1, .L1713+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-	b	.L1528
-.L1533:
+	b	.L1603
+.L1608:
 	cmp	r3, #12
-	bls	.L1534
+	bls	.L1609
 	lsrs	r4, r4, #4
-	b	.L1532
-.L1534:
+	b	.L1607
+.L1609:
 	cmp	r3, #8
-	bls	.L1532
+	bls	.L1607
 	lsrs	r4, r4, #2
-	b	.L1532
-.L1595:
+	b	.L1607
+.L1672:
 	movs	r4, #1
-	b	.L1532
-.L1539:
+	b	.L1607
+.L1614:
 	movs	r3, #18
-	strh	r3, [r2]	@ movhi
-	b	.L1540
-.L1537:
-	ldr	r3, .L1633+60
+	strh	r3, [r1]	@ movhi
+	b	.L1615
+.L1612:
+	ldr	r3, .L1713+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L1536:
-	ldr	r3, .L1633+76
+	strh	r3, [r2]	@ movhi
+.L1611:
+	ldr	r3, .L1713+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1596
+	cbz	r3, .L1673
 	adds	r4, r4, #32
 	uxth	r4, r4
-.L1596:
+.L1673:
 	movw	r5, #65535
-.L1542:
+.L1617:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1551
+	bne	.L1626
 	cmp	r5, r3
-	beq	.L1552
+	beq	.L1627
 	strh	r5, [r6]	@ movhi
-.L1553:
+.L1628:
 	ldrh	r0, [r6]
 	movw	r7, #65535
 	movs	r3, #0
 	strb	r3, [r6, #8]
 	cmp	r0, r7
-	beq	.L1551
+	beq	.L1626
 	bl	IsBlkInGcList
-	cbz	r0, .L1556
+	cbz	r0, .L1631
 	strh	r7, [r6]	@ movhi
-.L1556:
+.L1631:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1551
-	ldr	r0, .L1633+20
+	beq	.L1626
+	ldr	r0, .L1713+20
 	bl	make_superblock
-	ldr	r2, .L1633+80
+	ldr	r2, .L1713+80
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	strb	r3, [r6, #6]
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L1633+40
+	ldr	r3, .L1713+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1633+84
+	ldr	r3, .L1713+84
 	strh	r2, [r3]	@ movhi
-.L1551:
-	ldr	r2, .L1633+88
+.L1626:
+	ldr	r2, .L1713+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	ldr	r2, .L1633+92
+	beq	.L1632
+	ldr	r2, .L1713+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	ldr	r6, .L1633+20
-	mov	fp, r6
-.L1558:
-	ldrh	r2, [r6]
+	bne	.L1633
+.L1632:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L1633:
+	ldr	fp, .L1713+20
+	mov	r6, fp
+.L1663:
+	ldrh	r2, [fp]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1559
-	ldr	r8, .L1633+100
+	bne	.L1634
+	ldr	r10, .L1713+100
 	movs	r2, #0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1713+64
+	mov	r8, r10
 	str	r2, [r3]
-.L1560:
-	ldrh	r7, [r8]
+.L1635:
+	ldrh	r7, [r10]
 	mov	r0, r7
 	bl	List_get_gc_head_node
 	uxth	r3, r0
 	movw	r1, #65535
 	cmp	r3, r1
-	strh	r3, [fp]	@ movhi
-	bne	.L1561
+	strh	r3, [r6]	@ movhi
+	bne	.L1636
 	movs	r3, #0
 	movs	r0, #8
-	strh	r3, [r8]	@ movhi
-	b	.L1515
-.L1543:
-	ldr	r3, .L1633+64
-	movs	r2, #0
-	ldr	r1, .L1633+48
-	ldr	r4, .L1633+32
-	str	r2, [r3]
-	ldrh	r3, [r1]
-	mov	r2, r1
-	ldrh	r8, [r4]
-	ldr	r5, .L1633+36
-	cmp	r3, r8
-	bcs	.L1544
-	ldrh	r3, [r5]
-	cbnz	r3, .L1545
-	ldr	r3, .L1633+52
-	ldr	r0, .L1633+56
-	ldr	r3, [r3]
-	ldr	r0, [r0]
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcs	.L1546
-.L1545:
-	ldr	r3, .L1633+60
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r2]	@ movhi
-.L1630:
-	bl	FtlReadRefresh
-	ldrh	r0, [r5]
-	b	.L1515
-.L1634:
+	strh	r3, [r10]	@ movhi
+	b	.L1590
+.L1714:
 	.align	2
-.L1633:
-	.word	.LANCHOR117
+.L1713:
+	.word	.LANCHOR108
 	.word	.LANCHOR45
-	.word	.LANCHOR156
+	.word	.LANCHOR162
 	.word	.LANCHOR100
 	.word	.LANCHOR84
 	.word	.LANCHOR80
 	.word	.LANCHOR53
 	.word	.LANCHOR99
 	.word	.LANCHOR48
-	.word	.LANCHOR172
+	.word	.LANCHOR177
 	.word	.LANCHOR42
 	.word	.LANCHOR19
 	.word	.LANCHOR82
@@ -11821,75 +12365,109 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR59
 	.word	.LANCHOR78
 	.word	.LANCHOR87
-	.word	.LC107
+	.word	.LC112
 	.word	.LANCHOR43
 	.word	.LANCHOR101
-	.word	.LANCHOR173
-	.word	.LANCHOR174
+	.word	.LANCHOR178
+	.word	.LANCHOR179
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.L1546:
+.L1618:
+	ldr	r3, .L1715
+	movs	r2, #0
+	ldr	r5, .L1715+4
+	ldr	r4, .L1715+8
+	str	r2, [r3]
+	ldrh	r2, [r5]
+	ldrh	r3, [r4]
+	ldr	r7, .L1715+12
+	cmp	r2, r3
+	bls	.L1619
+	ldrh	r3, [r7]
+	cbnz	r3, .L1620
+	ldr	r3, .L1715+16
+	ldr	r2, .L1715+20
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, lsr #2
+	bcs	.L1621
+.L1620:
+	ldr	r3, .L1715+24
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+.L1708:
+	strh	r3, [r4]	@ movhi
+	bl	FtlReadRefresh
+	movs	r0, #0
+	bl	List_get_gc_head_node
+	ldr	r3, .L1715+28
+	uxth	r0, r0
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #4
+	bls	.L1619
+.L1711:
+	ldrh	r0, [r7]
+	b	.L1590
+.L1621:
 	movs	r3, #18
-	strh	r3, [r1]	@ movhi
-	b	.L1630
-.L1544:
-	ldrh	r0, [r5]
+	b	.L1708
+.L1619:
+	ldrh	r0, [r7]
 	cmp	r0, #0
-	bne	.L1548
-	ldr	r3, .L1635
-	ldrh	r7, [r3]
-	add	r2, r7, r7, lsl #1
+	bne	.L1623
+	ldr	r3, .L1715+24
+	ldrh	r8, [r3]
+	add	r2, r8, r8, lsl #1
 	asrs	r2, r2, #2
-	strh	r2, [r1]	@ movhi
+	strh	r2, [r4]	@ movhi
 	bl	List_get_gc_head_node
-	ldr	r3, .L1635+4
+	ldr	r3, .L1715+28
 	uxth	r0, r0
-	ldr	r2, .L1635+8
+	ldr	r2, .L1715+32
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1635+12
+	ldr	r3, .L1715+36
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1549
-	subs	r3, r7, #1
-	cmp	r8, r3
-	bge	.L1630
-.L1549:
+	ble	.L1624
+	ldrh	r2, [r5]
+	add	r3, r8, #-1
+	cmp	r2, r3
+	blt	.L1624
+	bl	FtlReadRefresh
+	b	.L1711
+.L1624:
 	cmp	r1, #0
-	bne	.L1548
+	bne	.L1623
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldrh	r0, [r4]
+	ldrh	r0, [r5]
 	adds	r0, r0, #1
-	b	.L1515
-.L1552:
-	ldr	r3, .L1635+16
+	b	.L1590
+.L1627:
+	ldr	r3, .L1715+40
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1553
-	ldr	r1, .L1635+4
+	beq	.L1628
+	ldr	r1, .L1715+28
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1554
+	cbnz	r2, .L1629
 	strh	r5, [r3]	@ movhi
-.L1554:
+.L1629:
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1553
-.L1557:
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L1631:
-	ldr	r3, .L1635+20
-	ldrh	r0, [r3]
-	b	.L1515
-.L1561:
+	b	.L1628
+.L1636:
 	str	r0, [sp, #16]
 	mov	r0, r3
 	str	r3, [sp, #12]
@@ -11897,111 +12475,133 @@ rk_ftl_garbage_collect:
 	bl	IsBlkInGcList
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1562
-	strh	r7, [r8]	@ movhi
-	b	.L1560
-.L1562:
+	cbz	r0, .L1637
+	strh	r7, [r10]	@ movhi
+	b	.L1635
+.L1637:
+	ldr	lr, .L1715+28
 	uxth	r0, r2
-	ldr	r2, .L1635+24
-	ldr	r10, .L1635+4
 	uxth	r7, r7
-	ldrh	lr, [r2]
-	ldr	r2, .L1635+8
-	ldr	r1, [r10]
-	strh	r7, [r8]	@ movhi
+	ldr	r2, [lr]
+	strh	r7, [r10]	@ movhi
+	str	lr, [sp, #16]
+	ldrh	ip, [r2, r0, lsl #1]
+	str	r2, [sp, #12]
+	ldr	r2, .L1715+44
+	ldrh	r2, [r2]
+	mov	r1, r2
+	ldr	r2, .L1715+32
 	ldrh	r2, [r2]
-	ldrh	ip, [r1, r0, lsl #1]
-	mul	lr, r2, lr
-	cmp	ip, lr, asr #1
-	bgt	.L1564
+	muls	r2, r1, r2
+	cmp	ip, r2, asr #1
+	bgt	.L1639
 	cmp	r7, #48
-	bls	.L1565
+	bls	.L1640
 	cmp	ip, #8
-	bls	.L1565
-	ldr	r7, .L1635+28
+	bls	.L1640
+	ldr	r7, .L1715+48
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1565
-.L1564:
-	ldr	r2, .L1635+32
+	bhi	.L1640
+.L1639:
 	movs	r7, #0
-	strh	r7, [r2]	@ movhi
-.L1565:
+	strh	r7, [r8]	@ movhi
+.L1640:
+	ldr	r1, [sp, #12]
 	ldrh	r1, [r1, r0, lsl #1]
-	cmp	lr, r1
-	bgt	.L1566
+	cmp	r2, r1
+	bgt	.L1641
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1566
-	ldr	r2, .L1635+32
+	bne	.L1641
+	ldrh	r2, [r8]
+	cmp	r2, #3
+	bhi	.L1641
 	movs	r3, #0
-	strh	r5, [fp]	@ movhi
-	strh	r3, [r2]	@ movhi
-	b	.L1631
-.L1566:
-	cbnz	r1, .L1567
+	strh	r5, [r6]	@ movhi
+	strh	r3, [r8]	@ movhi
+.L1712:
+	ldr	r3, .L1715+12
+	ldrh	r0, [r3]
+	b	.L1590
+.L1641:
+	cbnz	r1, .L1642
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L1635+32
-	ldr	r2, .L1635+32
-	ldrh	r3, [r3]
+	ldrh	r3, [r8]
 	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	b	.L1560
-.L1567:
+	strh	r3, [r8]	@ movhi
+	b	.L1635
+.L1642:
 	movs	r2, #0
-	strb	r2, [fp, #8]
-	ldr	r2, .L1635+36
+	strb	r2, [r6, #8]
+	ldr	r2, .L1715+52
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1568
-	movw	r2, #658
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1643
+	mov	r2, #700
+	ldr	r1, .L1715+56
+	ldr	r0, .L1715+60
 	bl	printf
-.L1568:
-	ldr	r3, .L1635+48
-	ldrh	r2, [fp]
+.L1643:
+	ldr	r3, .L1715+64
+	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1569
-	movw	r2, #659
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1644
+	movw	r2, #701
+	ldr	r1, .L1715+56
+	ldr	r0, .L1715+60
 	bl	printf
-.L1569:
-	ldr	r3, .L1635+52
-	ldrh	r2, [fp]
+.L1644:
+	ldr	r3, .L1715+68
+	ldrh	r2, [r6]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1570
-	mov	r2, #660
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1645
+	movw	r2, #702
+	ldr	r1, .L1715+56
+	ldr	r0, .L1715+60
 	bl	printf
-.L1570:
-	mov	r0, r6
+.L1645:
+	mov	r0, fp
 	bl	make_superblock
-	ldr	r2, .L1635+56
+	ldr	r2, .L1715+72
 	movs	r3, #0
-	ldrh	r1, [fp]
+	ldrh	r1, [r6]
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [r10]
+	ldr	r2, [sp, #16]
+	ldr	r2, [r2]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1635+60
-	strh	r3, [fp, #2]	@ movhi
-	strb	r3, [fp, #6]
+	ldr	r2, .L1715+76
+	strh	r3, [r6, #2]	@ movhi
+	strb	r3, [r6, #6]
 	strh	r1, [r2]	@ movhi
-.L1559:
-	bl	FtlReadRefresh
-	ldr	r3, .L1635+64
+.L1634:
+	ldr	r3, .L1715+80
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L1635+24
+	ldr	r3, .L1715+44
 	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-	ldrh	r3, [fp, #2]
-	ldr	r1, [sp, #28]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #8]
+	cbz	r3, .L1646
+	ldr	r3, .L1715+32
+	ldr	r2, [sp, #20]
+	ldrh	r1, [r6]
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L1715+28
+	ldr	r2, [r2]
+	ldrh	r2, [r2, r1, lsl #1]
+	subs	r3, r3, r2
+	it	mi
+	addmi	r3, r3, #3
+	add	r4, r4, r3, asr #2
+	uxth	r4, r4
+.L1646:
+	ldrh	r3, [r6, #2]
+	ldr	r1, [sp, #20]
 	adds	r2, r3, r4
 	cmp	r2, r1
 	itt	gt
@@ -12010,121 +12610,128 @@ rk_ftl_garbage_collect:
 	mov	r3, #0
 	it	gt
 	uxthgt	r4, r4
-.L1629:
-	str	r3, [sp, #24]
-	ldrh	r3, [sp, #24]
+.L1710:
+	str	r3, [sp, #28]
+	ldrh	r3, [sp, #28]
 	cmp	r4, r3
-	bls	.L1580
-	ldr	r3, .L1635+8
-	movw	r10, #65535
-	ldrh	r8, [r6, #2]
-	ldr	r1, .L1635+68
-	ldrh	ip, [r3]
-	ldr	r3, .L1635+72
+	bls	.L1657
+	ldr	r3, .L1715+32
+	movw	lr, #65535
+	ldrh	r1, [fp, #2]
+	mov	ip, #20
+	ldr	r7, .L1715+84
+	ldrh	r8, [r3]
+	ldr	r3, .L1715+88
 	ldr	r0, [r3]
-	ldr	r3, [sp, #24]
-	add	r8, r8, r3
+	ldr	r3, [sp, #28]
+	adds	r3, r1, r3
+	str	r3, [sp, #16]
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1581
-.L1574:
-	ldrh	r2, [r1, #2]!
-	cmp	r2, r10
-	beq	.L1573
-	ldr	r7, [sp, #12]
-	mov	lr, #20
-	orr	r2, r8, r2, lsl #10
-	mla	lr, lr, r7, r0
-	str	r2, [lr, #4]
-	mov	r2, r7
+	b	.L1658
+.L1651:
+	ldrh	r2, [r7, #2]!
+	cmp	r2, lr
+	beq	.L1650
+	ldr	r1, [sp, #12]
+	mla	r10, ip, r1, r0
+	ldr	r1, [sp, #16]
+	orr	r2, r1, r2, lsl #10
+	str	r2, [r10, #4]
+	ldr	r2, [sp, #12]
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.L1573:
+.L1650:
 	adds	r3, r3, #1
-.L1581:
+.L1658:
 	uxth	r2, r3
-	cmp	ip, r2
-	bhi	.L1574
-	ldrb	r2, [r6, #8]	@ zero_extendqisi2
+	cmp	r8, r2
+	bhi	.L1651
+	ldrb	r2, [fp, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
 	movs	r3, #0
-.L1628:
-	str	r3, [sp, #20]
+.L1709:
+	str	r3, [sp, #24]
 	ldr	r2, [sp, #12]
-	ldrh	r3, [sp, #20]
+	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1579
-	ldr	r3, [sp, #24]
+	bhi	.L1656
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L1629
-.L1636:
+	b	.L1710
+.L1716:
 	.align	2
-.L1635:
+.L1715:
+	.word	.LANCHOR87
+	.word	.LANCHOR48
+	.word	.LANCHOR82
+	.word	.LANCHOR177
+	.word	.LANCHOR61
+	.word	.LANCHOR59
 	.word	.LANCHOR78
 	.word	.LANCHOR42
 	.word	.LANCHOR3
 	.word	.LANCHOR20
 	.word	.LANCHOR99
-	.word	.LANCHOR172
 	.word	.LANCHOR19
 	.word	.LANCHOR96
-	.word	.LANCHOR85
 	.word	.LANCHOR51
-	.word	.LANCHOR175
+	.word	.LANCHOR180
 	.word	.LC1
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR173
-	.word	.LANCHOR174
-	.word	.LANCHOR117
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR108
 	.word	.LANCHOR80+14
 	.word	.LANCHOR93
-.L1579:
-	ldr	r3, [sp, #20]
+.L1656:
+	ldr	r3, [sp, #24]
 	movs	r7, #20
 	muls	r7, r3, r7
-	ldr	r3, .L1637
+	ldr	r3, .L1717
 	ldr	r3, [r3]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1576
+	beq	.L1653
 	ldr	r3, [r2, #12]
 	ldrh	r2, [r3]
 	str	r3, [sp, #16]
 	movw	r3, #61589
 	cmp	r2, r3
-	bne	.L1576
+	bne	.L1653
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
 	cmp	r8, #-1
-	bne	.L1577
-	mov	r2, #696
-	ldr	r1, .L1637+4
-	ldr	r0, .L1637+8
+	bne	.L1654
+	mov	r2, #736
+	ldr	r1, .L1717+4
+	ldr	r0, .L1717+8
 	bl	printf
-.L1577:
+.L1654:
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-	ldr	r3, .L1637
+	ldr	r3, .L1717
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1576
-	ldr	r2, .L1637+12
+	bne	.L1653
+	ldr	r3, .L1717+12
 	mov	r10, #20
-	ldr	r8, .L1637+36
+	ldr	r2, .L1717+12
+	ldr	r8, .L1717+32
+	ldrh	r3, [r3]
 	ldr	r1, [r1, #16]
-	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1637+16
+	ldr	r2, .L1717+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
@@ -12139,11 +12746,11 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1637
+	ldr	r2, .L1717
 	adds	r3, r3, #1
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	ldr	r7, .L1637+20
+	ldr	r7, .L1717+20
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
 	ldr	r2, [r0, #12]
@@ -12152,7 +12759,7 @@ rk_ftl_garbage_collect:
 	str	r2, [r1, #12]
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	ldr	r2, .L1637+24
+	ldr	r2, .L1717+24
 	str	r3, [r8]
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
@@ -12161,133 +12768,184 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1578
+	beq	.L1655
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1576
-.L1578:
+	cbnz	r3, .L1653
+.L1655:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1576
-.L1632:
-	ldr	r3, .L1637+28
+	cbz	r0, .L1653
+	ldr	r3, .L1717+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1631
-.L1576:
-	ldr	r3, [sp, #20]
+	b	.L1712
+.L1653:
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1628
-.L1580:
-	ldrh	r3, [r6, #2]
+	b	.L1709
+.L1657:
+	ldrh	r3, [fp, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #20]
 	uxth	r4, r4
 	cmp	r3, r4
-	strh	r4, [r6, #2]	@ movhi
-	bls	.L1582
-	ldr	r3, .L1637+12
-	ldrh	r2, [r3]
-	ldr	r3, .L1637+32
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L1583
-.L1582:
-	ldr	r3, .L1637+36
+	strh	r4, [fp, #2]	@ movhi
+	ldr	r4, .L1717+28
+	bhi	.L1659
+	ldr	r3, .L1717+32
 	ldr	r3, [r3]
-	cbz	r3, .L1584
+	cbz	r3, .L1660
 	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	bne	.L1632
-.L1584:
-	ldr	r3, .L1637+12
+	cbz	r0, .L1660
+	movs	r3, #0
+	str	r3, [r4]
+	b	.L1712
+.L1660:
+	ldr	r3, .L1717+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1585
-	ldr	r3, .L1637+40
-	ldrh	r2, [r6]
+	cbnz	r1, .L1661
+	ldr	r3, .L1717+36
+	ldrh	r2, [fp]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1585
+	cbz	r0, .L1661
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r6]
+	ldrh	r0, [fp]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1585:
+.L1661:
 	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L1583:
-	ldr	r3, .L1637+44
+	strh	r3, [fp]	@ movhi
+.L1659:
+	movs	r3, #0
+	str	r3, [r4]
+	ldr	r3, .L1717+40
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1586
-	ldr	r3, .L1637+48
+	bhi	.L1662
+	ldr	r3, .L1717+44
 	ldrh	r4, [r3]
-	b	.L1558
-.L1586:
-	ldr	r2, .L1637+28
-	movs	r1, #0
-	str	r1, [r2]
-	ldr	r2, .L1637+52
+	b	.L1663
+.L1662:
+	ldr	r2, .L1717+48
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1515
+	bne	.L1590
 	adds	r0, r3, #1
-	b	.L1515
-.L1590:
+	b	.L1590
+.L1667:
 	movs	r0, #0
-	b	.L1515
-.L1521:
-	cmp	r7, #0
-	beq	.L1588
-.L1531:
-	ldr	r3, .L1637+20
+	b	.L1590
+.L1596:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L1665
+.L1606:
+	ldr	r3, .L1717+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1599
-.L1589:
-	ldr	r3, .L1637+56
+	bne	.L1676
+.L1666:
+	ldr	r3, .L1717+52
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1599
+	bne	.L1676
 	cmp	r5, r3
-	bne	.L1599
+	bne	.L1676
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1543
-.L1548:
+	beq	.L1618
+.L1623:
 	movw	r5, #65535
-.L1599:
+.L1676:
 	movs	r4, #1
-	b	.L1542
-.L1523:
-	cmp	r7, #0
-	beq	.L1588
+	b	.L1617
+.L1598:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L1665
 	movw	r5, #65535
-	b	.L1589
-.L1522:
-	cmp	r7, #0
-	bne	.L1548
-	b	.L1588
-.L1638:
+	b	.L1666
+.L1597:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1623
+	b	.L1665
+.L1718:
 	.align	2
-.L1637:
+.L1717:
 	.word	.LANCHOR93
-	.word	.LANCHOR175
+	.word	.LANCHOR180
 	.word	.LC1
-	.word	.LANCHOR173
-	.word	.LANCHOR121
+	.word	.LANCHOR178
+	.word	.LANCHOR113
 	.word	.LANCHOR53
 	.word	.LANCHOR71
-	.word	.LANCHOR117
-	.word	.LANCHOR174
+	.word	.LANCHOR108
 	.word	.LANCHOR89
 	.word	.LANCHOR42
 	.word	.LANCHOR48
 	.word	.LANCHOR19
-	.word	.LANCHOR172
+	.word	.LANCHOR177
 	.word	.LANCHOR99
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_init,"ax",%progbits
+	.align	1
+	.global	sftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_init, %function
+sftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r3, #-1
+	ldr	r4, .L1725
+	ldr	r1, .L1725+4
+	ldr	r0, .L1725+8
+	str	r3, [r4]
+	bl	printf
+	ldr	r0, .L1725+12
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1725+16
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbnz	r0, .L1723
+	bl	FtlSysBlkInit
+	cbnz	r0, .L1723
+	movs	r3, #1
+	str	r3, [r4]
+	ldr	r3, .L1725+20
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L1723
+	movw	r4, #8129
+.L1722:
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L1722
+.L1723:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1726:
+	.align	2
+.L1725:
+	.word	.LANCHOR86
+	.word	.LC70
+	.word	.LC71
+	.word	.LANCHOR0
+	.word	.LANCHOR4
+	.word	.LANCHOR48
+	.size	sftl_init, .-sftl_init
 	.section	.text.sftl_gc,"ax",%progbits
 	.align	1
 	.global	sftl_gc
@@ -12320,32 +12978,32 @@ FtlRead:
 	sub	sp, sp, #56
 	mov	r6, r1
 	mov	r8, r3
-	str	r2, [sp, #32]
-	bne	.L1641
+	str	r2, [sp, #24]
+	bne	.L1729
 	mov	r2, r3
-	ldr	r1, [sp, #32]
+	ldr	r1, [sp, #24]
 	add	r0, r6, #256
 	bl	FtlVendorPartRead
 	str	r0, [sp, #4]
-.L1640:
+.L1728:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1641:
-	ldr	r3, [sp, #32]
+.L1729:
+	ldr	r3, [sp, #24]
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1672
+	ldr	r3, .L1761
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1661
-	ldr	r3, .L1672+4
+	bhi	.L1750
+	ldr	r3, .L1761+4
 	ldr	r3, [r3]
-	adds	r0, r3, #1
-	beq	.L1662
-	ldr	r3, .L1672+8
+	adds	r4, r3, #1
+	beq	.L1751
+	ldr	r3, .L1761+8
 	mov	r0, r6
 	movs	r7, #0
 	mov	r5, r7
@@ -12358,62 +13016,67 @@ FtlRead:
 	subs	r0, r3, #1
 	bl	__aeabi_uidiv
 	ldr	r3, [sp, #16]
-	ldr	r2, .L1672+12
-	ldr	r4, [sp, #16]
+	ldr	r2, .L1761+12
+	ldr	r1, [sp, #24]
 	rsb	r3, r3, #1
-	str	r0, [sp, #20]
+	ldr	r4, [sp, #16]
 	add	r3, r3, r0
-	str	r7, [sp, #28]
+	str	r0, [sp, #20]
 	str	r3, [sp, #8]
-	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-	str	r7, [sp, #24]
+	str	r7, [sp, #32]
+	str	r7, [sp, #28]
+	add	r3, r3, r1
+	ldr	r1, [sp, #8]
+	str	r3, [r2]
+	ldr	r2, .L1761+16
 	str	r7, [sp, #4]
+	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-.L1643:
+.L1731:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1659
-	ldr	r3, .L1672+16
+	cbnz	r3, .L1748
+	ldr	r3, .L1761+20
 	ldrh	r3, [r3]
-	cbnz	r3, .L1660
-	ldr	r3, .L1672+20
+	cbnz	r3, .L1749
+	ldr	r3, .L1761+24
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1640
-.L1660:
+	bhi	.L1728
+.L1749:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	b	.L1640
-.L1659:
-	add	r1, sp, #52
+	b	.L1728
+.L1748:
 	movs	r2, #0
+	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
 	ldr	r3, [sp, #52]
-	adds	r1, r3, #1
-	bne	.L1644
-	ldr	fp, .L1672+8
+	adds	r0, r3, #1
+	bne	.L1732
+	ldr	fp, .L1761+8
 	mov	r10, #0
-.L1645:
+.L1733:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1647
-.L1648:
+	bcc	.L1735
+.L1736:
 	ldr	r3, [sp, #8]
 	adds	r4, r4, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1652
-	ldr	r3, .L1672+24
+	beq	.L1740
+	ldr	r3, .L1761+28
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1643
-.L1652:
+	bne	.L1731
+.L1740:
 	cmp	r5, #0
-	beq	.L1643
-	ldr	r3, .L1672+28
+	beq	.L1731
+	ldr	r3, .L1761+32
 	movs	r2, #0
 	mov	r1, r5
 	mov	r10, #0
@@ -12421,96 +13084,105 @@ FtlRead:
 	bl	FlashReadPages
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
-	ldr	r3, [sp, #24]
+	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L1658:
+.L1747:
 	movs	r3, #20
 	mul	fp, r3, r10
-	ldr	r3, .L1672+28
+	ldr	r3, .L1761+32
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1654
+	bne	.L1742
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1672+32
+	ldr	r2, .L1761+36
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1655
+	bne	.L1743
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1671:
+.L1760:
 	bl	ftl_memcpy
-.L1655:
-	ldr	r3, .L1672+28
-	ldr	r2, [r3]
-	ldr	r3, [r2, fp]
-	add	r1, r2, fp
-	adds	r2, r3, #1
-	bne	.L1656
-	ldr	r1, .L1672+36
+.L1743:
+	ldr	r3, .L1761+32
+	ldr	r3, [r3]
+	add	r2, r3, fp
+	ldr	r3, [r3, fp]
+	ldr	r0, [r2, #12]
+	ldr	r1, [r2, #16]
+	ldr	r0, [r0, #8]
+	cmp	r1, r0
+	itttt	ne
+	ldrne	r0, .L1761+40
+	ldrne	r1, [r0, #72]
+	addne	r1, r1, #1
+	strne	r1, [r0, #72]
+	adds	r1, r3, #1
+	bne	.L1745
+	ldr	r1, .L1761+40
 	str	r3, [sp, #4]
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1657:
+.L1746:
 	add	r10, r10, #1
 	cmp	r5, r10
-	bne	.L1658
+	bne	.L1747
 	movs	r5, #0
-	b	.L1643
-.L1647:
+	b	.L1731
+.L1735:
 	mla	r0, r0, r4, r10
 	cmp	r6, r0
-	bhi	.L1646
+	bhi	.L1734
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1646
+	bls	.L1734
 	subs	r0, r0, r6
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.L1646:
+.L1734:
 	add	r10, r10, #1
-	b	.L1645
-.L1644:
-	ldr	r2, .L1672+28
+	b	.L1733
+.L1732:
+	ldr	r2, .L1761+32
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1672+8
-	bne	.L1649
-	ldr	r2, .L1672+32
+	ldr	r3, .L1761+8
+	bne	.L1737
+	ldr	r2, .L1761+36
 	mov	r0, r6
 	ldrh	fp, [r3]
 	ldr	r2, [r2]
 	mov	r1, fp
 	str	r2, [r10, #8]
 	bl	__aeabi_uidivmod
-	ldr	r2, [sp, #32]
+	ldr	r2, [sp, #24]
 	sub	r3, fp, r1
-	str	r1, [sp, #24]
+	str	r1, [sp, #28]
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
 	cmp	fp, r3
-	str	r3, [sp, #28]
-	bne	.L1650
+	str	r3, [sp, #32]
+	bne	.L1738
 	str	r8, [r10, #8]
-.L1650:
-	ldr	r3, .L1672+40
-	ldr	r2, .L1672+44
+.L1738:
+	ldr	r3, .L1761+44
+	ldr	r2, .L1761+48
 	str	r4, [r10, #16]
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
@@ -12519,12 +13191,12 @@ FtlRead:
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1648
-.L1649:
+	b	.L1736
+.L1737:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1651
-	ldr	r2, .L1672+48
+	bne	.L1739
+	ldr	r2, .L1761+52
 	ldr	r1, [sp, #12]
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
@@ -12532,62 +13204,63 @@ FtlRead:
 	mul	r3, r2, r4
 	subs	r7, r1, r3
 	cmp	r2, r7
-	bne	.L1650
-.L1670:
+	bne	.L1738
+.L1759:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1650
-.L1651:
+	b	.L1738
+.L1739:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1670
-.L1654:
+	b	.L1759
+.L1742:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1655
-	ldr	r3, .L1672+48
+	bne	.L1743
+	ldr	r3, .L1761+52
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1655
-	ldr	r2, .L1672+8
+	bne	.L1743
+	ldr	r2, .L1761+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1671
-.L1656:
+	b	.L1760
+.L1745:
 	cmp	r3, #256
-	bne	.L1657
-	ldr	r0, [r1, #4]
+	bne	.L1746
+	ldr	r0, [r2, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1657
-.L1661:
+	b	.L1746
+.L1750:
 	mov	r3, #-1
-.L1662:
+.L1751:
 	str	r3, [sp, #4]
-	b	.L1640
-.L1673:
+	b	.L1728
+.L1762:
 	.align	2
-.L1672:
+.L1761:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR12
+	.word	.LANCHOR69
 	.word	.LANCHOR62
 	.word	.LANCHOR101
 	.word	.LANCHOR48
 	.word	.LANCHOR3
-	.word	.LANCHOR120
-	.word	.LANCHOR115
+	.word	.LANCHOR112
+	.word	.LANCHOR118
 	.word	.LANCHOR81
 	.word	.LANCHOR24
-	.word	.LANCHOR114
-	.word	.LANCHOR113
+	.word	.LANCHOR124
+	.word	.LANCHOR119
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",%progbits
 	.align	1
@@ -12624,141 +13297,146 @@ FtlWrite:
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	bne	.L1676
+	bne	.L1765
 	mov	r2, r3
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	add	r0, r3, #256
 	bl	FtlVendorPartWrite
-.L1675:
+.L1764:
 	add	sp, sp, #72
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1676:
+.L1765:
 	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #20]
 	adds	r4, r3, r2
-	ldr	r3, .L1726
+	ldr	r3, .L1816
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1712
-	ldr	r3, .L1726+4
+	bhi	.L1802
+	ldr	r3, .L1816+4
 	ldr	r0, [r3]
 	adds	r5, r0, #1
-	beq	.L1675
-	ldr	r3, .L1726+8
+	beq	.L1764
+	ldr	r3, .L1816+8
 	mov	r2, #2048
 	ldr	r0, [sp, #4]
 	str	r2, [r3]
-	ldr	r3, .L1726+12
+	ldr	r3, .L1816+12
 	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidiv
 	mov	r1, r5
 	str	r0, [sp, #12]
 	subs	r0, r4, #1
-	ldr	r5, .L1726+16
+	ldr	r5, .L1816+16
 	bl	__aeabi_uidiv
 	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
 	str	r0, [sp, #28]
 	subs	r3, r0, r2
-	ldr	r2, .L1726+20
+	ldr	r2, .L1816+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
+	ldr	r3, [r2]
+	add	r3, r3, r1
 	ldr	r1, [sp, #8]
+	str	r3, [r2]
+	ldr	r2, .L1816+24
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L1726+24
+	ldr	r3, .L1816+28
 	ldr	r3, [r3]
-	cbz	r3, .L1678
+	cbz	r3, .L1767
 	ldrh	r2, [r5, #4]
-	ldr	r3, .L1726+28
+	ldr	r3, .L1816+32
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.L1678:
+.L1767:
 	ldr	r6, [sp, #12]
-.L1679:
+.L1768:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1708
-	ldr	r4, .L1726+32
+	cbnz	r3, .L1797
+	ldr	r5, .L1816+36
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
-	ldrh	r2, [r4]
-	cmp	r2, #15
-	bls	.L1709
-.L1711:
+	ldrh	r2, [r5]
+	cmp	r2, #5
+	bls	.L1798
+.L1800:
 	movs	r0, #0
-	b	.L1675
-.L1708:
-	ldr	r3, .L1726+36
+	b	.L1764
+.L1797:
+	ldr	r3, .L1816+40
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1680
-	mov	r2, #988
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bcc	.L1769
+	movw	r2, #1011
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1680:
+.L1769:
 	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1681
-	ldr	r3, .L1726+16
-	ldr	r4, .L1726+24
+	cbnz	r2, .L1770
+	ldr	r3, .L1816+16
+	ldr	r4, .L1816+28
 	cmp	r5, r3
-	bne	.L1682
-	ldr	r0, .L1726+28
+	bne	.L1771
+	ldr	r0, .L1816+32
 	ldrh	r5, [r0, #4]
-	cbnz	r5, .L1683
+	cbnz	r5, .L1772
 	bl	allocate_new_data_superblock
 	str	r5, [r4]
-.L1683:
-	ldr	r0, .L1726+16
+.L1772:
+	ldr	r0, .L1816+16
 	bl	allocate_new_data_superblock
-	ldr	r5, .L1726+16
+	ldr	r5, .L1816+16
 	ldr	r2, [r4]
-	ldr	r3, .L1726+28
+	ldr	r3, .L1816+32
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1684:
+.L1773:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1681
+	cbnz	r3, .L1770
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1681:
-	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	ldrh	r3, [r5, #4]
-	ldr	r1, [sp, #8]
-	lsls	r2, r2, #2
-	cmp	r3, r1
+.L1770:
+	ldrh	r2, [r5, #4]
+	ldr	r3, [sp, #8]
+	cmp	r2, r3
 	it	cs
-	movcs	r3, r1
+	movcs	r2, r3
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	lsls	r3, r3, #2
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	ldr	r3, .L1726+36
+	ldr	r3, .L1816+40
 	str	r2, [sp, #44]
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1685
-	movw	r2, #1021
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bcc	.L1774
+	movw	r2, #1044
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1685:
-	ldr	r8, .L1726+48
+.L1774:
+	ldr	r8, .L1816+52
 	mov	fp, #0
-.L1686:
+.L1775:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1706
-.L1687:
-	ldr	r0, .L1726+48
+	bne	.L1795
+.L1776:
+	ldr	r0, .L1816+52
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, fp
@@ -12766,30 +13444,30 @@ FtlWrite:
 	bl	FtlProgPages
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1707
-	movw	r2, #1098
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bls	.L1796
+	movw	r2, #1121
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1707:
+.L1796:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-	b	.L1679
-.L1682:
+	b	.L1768
+.L1771:
 	str	r2, [r4]
 	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1717
+	cbnz	r2, .L1807
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-	b	.L1684
-.L1717:
+	b	.L1773
+.L1807:
 	mov	r5, r3
-	b	.L1681
-.L1706:
+	b	.L1770
+.L1795:
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1687
+	beq	.L1776
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r6
@@ -12798,7 +13476,7 @@ FtlWrite:
 	mov	r0, r5
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-	ldr	r3, .L1726+52
+	ldr	r3, .L1816+56
 	ldr	r1, [r8]
 	ldrh	r2, [r3]
 	add	r1, r1, r7
@@ -12806,7 +13484,7 @@ FtlWrite:
 	str	r6, [r1, #16]
 	mul	r0, r2, fp
 	bic	r3, r0, #3
-	ldr	r0, .L1726+56
+	ldr	r0, .L1816+60
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
@@ -12817,12 +13495,12 @@ FtlWrite:
 	movs	r1, #0
 	bl	ftl_memset
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1726+12
+	ldr	r2, .L1816+12
 	cmp	r6, r3
-	beq	.L1688
+	beq	.L1777
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	bne	.L1721
+	bne	.L1812
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
@@ -12832,8 +13510,8 @@ FtlWrite:
 	subs	r4, r4, r2
 	str	r3, [sp, #24]
 	uxth	r4, r4
-	b	.L1691
-.L1688:
+	b	.L1780
+.L1777:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
@@ -12844,13 +13522,13 @@ FtlWrite:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.L1691:
-	ldr	r2, .L1726+12
+.L1780:
+	ldr	r2, .L1816+12
 	ldr	r3, [sp, #12]
 	ldrh	r2, [r2]
 	cmp	r4, r2
 	ldr	r2, [r8]
-	bne	.L1692
+	bne	.L1781
 	cmp	r6, r3
 	add	r7, r7, r2
 	ittet	ne
@@ -12863,23 +13541,23 @@ FtlWrite:
 	streq	r3, [r7, #8]
 	addne	r4, r3, r4, lsl #9
 	strne	r4, [r7, #8]
-.L1694:
-	ldr	r3, .L1726+36
+.L1783:
+	ldr	r3, .L1816+40
 	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1703
-	movw	r2, #1089
-	ldr	r1, .L1726+40
-	ldr	r0, .L1726+44
+	bcc	.L1792
+	mov	r2, #1112
+	ldr	r1, .L1816+44
+	ldr	r0, .L1816+48
 	bl	printf
-.L1703:
+.L1792:
 	ldr	r3, [sp, #40]
 	movw	r2, #61589
 	ldr	r1, [sp, #36]
 	add	fp, fp, #1
 	strh	r2, [r3, r1]	@ movhi
-	ldr	r1, .L1726+60
+	ldr	r1, .L1816+64
 	str	r6, [r10, #8]
 	adds	r6, r6, #1
 	ldr	r2, [r1]
@@ -12893,37 +13571,38 @@ FtlWrite:
 	str	r2, [r10, #12]
 	ldrh	r2, [r5]
 	strh	r2, [r10, #2]	@ movhi
-	b	.L1686
-.L1727:
+	b	.L1775
+.L1817:
 	.align	2
-.L1726:
+.L1816:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
-	.word	.LANCHOR176
+	.word	.LANCHOR181
 	.word	.LANCHOR12
 	.word	.LANCHOR51
+	.word	.LANCHOR68
 	.word	.LANCHOR64
-	.word	.LANCHOR177
+	.word	.LANCHOR182
 	.word	.LANCHOR52
 	.word	.LANCHOR48
 	.word	.LANCHOR3
-	.word	.LANCHOR178
+	.word	.LANCHOR183
 	.word	.LC1
-	.word	.LANCHOR122
-	.word	.LANCHOR24
 	.word	.LANCHOR114
+	.word	.LANCHOR24
+	.word	.LANCHOR124
 	.word	.LANCHOR71
-.L1692:
+.L1781:
 	cmp	r6, r3
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1728
-	ldrne	r1, .L1728+4
+	ldreq	r1, .L1818
+	ldrne	r1, .L1818+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1697
+	beq	.L1786
 	str	r2, [sp, #56]
 	add	r0, sp, #52
 	ldr	r2, [r8]
@@ -12938,56 +13617,56 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1698
-	ldr	r1, .L1728+8
+	bne	.L1787
+	ldr	r1, .L1818+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1701:
+.L1790:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r6, r3
-	bne	.L1702
+	bne	.L1791
 	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
 	add	r7, r7, r1
 	ldr	r1, [sp, #16]
 	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1724:
+.L1814:
 	bl	ftl_memcpy
-	b	.L1694
-.L1698:
+	b	.L1783
+.L1787:
 	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1700
-	ldr	r0, .L1728+8
+	beq	.L1789
+	ldr	r0, .L1818+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	mov	r2, r6
-	ldr	r0, .L1728+12
+	ldr	r0, .L1818+12
 	bl	printf
-.L1700:
+.L1789:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1701
-	movw	r2, #1074
-	ldr	r1, .L1728+16
-	ldr	r0, .L1728+20
+	beq	.L1790
+	movw	r2, #1097
+	ldr	r1, .L1818+16
+	ldr	r0, .L1818+20
 	bl	printf
-	b	.L1701
-.L1697:
+	b	.L1790
+.L1786:
 	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1728+24
+	ldr	r2, .L1818+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-	b	.L1701
-.L1702:
-	ldr	r1, .L1728+28
+	b	.L1790
+.L1791:
+	ldr	r1, .L1818+28
 	ldr	r3, [sp, #4]
 	ldr	r0, [r8]
 	ldrh	r1, [r1]
@@ -12997,8 +13676,8 @@ FtlWrite:
 	subs	r1, r1, r3
 	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1724
-.L1721:
+	b	.L1814
+.L1812:
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [r8]
@@ -13008,49 +13687,52 @@ FtlWrite:
 	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1694
-.L1709:
-	ldr	r5, .L1728+32
-	ldr	r6, .L1728+36
-.L1722:
-	ldrh	r3, [r5]
+	b	.L1783
+.L1798:
+	ldr	r6, .L1818+32
+	mov	r4, #256
+	ldr	r7, .L1818+36
+.L1801:
+	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1710
-	ldrh	r2, [r6]
+	bne	.L1799
+	ldrh	r2, [r7]
 	cmp	r2, r3
-	bne	.L1710
+	bne	.L1799
 	movs	r0, #0
 	bl	List_get_gc_head_node
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.L1710:
-	ldr	r2, .L1728+40
+.L1799:
+	ldr	r2, .L1818+40
 	movs	r3, #128
 	movs	r1, #1
 	mov	r0, r1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L1728+44
+	ldr	r2, .L1818+44
 	strh	r3, [r2]	@ movhi
 	bl	rk_ftl_garbage_collect
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-	ldrh	r3, [r4]
-	cmp	r3, #8
-	bls	.L1722
-	b	.L1711
-.L1712:
+	ldrh	r3, [r5]
+	cmp	r3, #2
+	bhi	.L1800
+	subs	r4, r4, #1
+	bne	.L1801
+	b	.L1800
+.L1802:
 	mov	r0, #-1
-	b	.L1675
-.L1729:
-	.align	2
-.L1728:
-	.word	.LANCHOR115
-	.word	.LANCHOR113
+	b	.L1764
+.L1819:
+	.align	2
+.L1818:
+	.word	.LANCHOR118
+	.word	.LANCHOR119
 	.word	.LANCHOR81
-	.word	.LC108
-	.word	.LANCHOR178
+	.word	.LC113
+	.word	.LANCHOR183
 	.word	.LC1
 	.word	.LANCHOR23
 	.word	.LANCHOR12
@@ -13069,743 +13751,570 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-	@ args = 0, pretend = 0, frame = 112
+	@ args = 0, pretend = 0, frame = 128
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	adds	r4, r0, r1
 	subs	r5, r4, #1
-	sub	sp, sp, #120
+	sub	sp, sp, #136
 	cmp	r5, #63
-	str	r0, [sp, #8]
-	str	r1, [sp, #16]
-	str	r2, [sp, #36]
-	ldr	r6, .L1762
-	bls	.L1731
+	mov	fp, r0
+	str	r1, [sp, #24]
+	str	r2, [sp, #44]
+	bls	.L1821
 	cmp	r0, #576
-	bls	.L1732
-.L1731:
-	ldr	r3, [r6]
-	cmp	r3, #0
-	beq	.L1733
-	ldr	r2, .L1762+4
-	mov	r0, #512
-	ldrh	r3, [r2, #14]
-	str	r3, [sp, #20]
-	ldrh	r3, [r2, #10]
-	ldrb	r1, [sp, #20]	@ zero_extendqisi2
-	smulbb	r3, r3, r1
-	uxth	r3, r3
-	mov	r1, r3
-	str	r3, [sp, #24]
-	bl	__aeabi_uidiv
-	ldr	r2, .L1762+8
+	bls	.L1822
+.L1821:
+	ldr	r3, .L1863
+	ldr	r3, [r3]
+	cbz	r3, .L1823
+	ldr	r3, .L1863+4
+	ldr	r10, [r3]
+	ldr	r3, .L1863+8
+	ldr	r2, [r10]
+	cmp	r2, r3
+	beq	.L1824
+.L1841:
+	ldr	r3, .L1863
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r3, .L1863+4
+	ldr	r0, [r3]
+	bl	free
+	ldr	r3, .L1863+12
+	ldr	r0, [r3]
+	bl	free
+.L1823:
+	ldr	r3, [sp, #44]
+	mov	r1, fp
+	ldr	r2, [sp, #24]
+	movs	r0, #0
+	bl	FtlWrite
+	add	sp, sp, #136
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1824:
+	ldr	r3, .L1863+16
+	add	r0, r10, #262144
+	movw	r2, #65535
+	ldrh	r4, [r3, #14]
+	ldrh	r5, [r3, #10]
 	movs	r3, #0
-	ldr	r1, .L1762+12
-	str	r0, [sp, #12]
-	sub	r4, r2, #262144
-.L1737:
-	ldr	r0, [r2, #-4]
-	cmp	r0, #0
-	beq	.L1734
-.L1738:
+.L1828:
+	ldr	r1, [r0, #-4]
+	cbnz	r1, .L1825
+	ldr	r1, [r10, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	add	r2, r2, #-1
+	it	hi
+	movhi	r3, #0
+	cmp	r2, #4096
+	str	r1, [r0, #-4]!
+	bne	.L1828
+	mov	r3, #512
+	str	r3, [sp, #12]
+	b	.L1827
+.L1825:
+	add	r3, r2, #127
+	ldr	r0, .L1863+20
+	lsrs	r3, r3, #7
+	str	r3, [sp, #12]
+	bl	printf
+.L1827:
+	uxtb	r4, r4
+	mov	r8, #0
+	smulbb	r5, r4, r5
+	uxth	r3, r5
+	ldr	r5, .L1863+24
+	str	r3, [sp, #16]
+	subs	r0, r3, #1
+	mov	r1, r3
 	ldr	r3, [sp, #12]
-	movs	r4, #0
-	ldr	r2, [sp, #24]
-	ldr	r6, .L1762+16
-	str	r4, [sp, #28]
+	add	r0, r0, r3
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #16]
+	mov	r3, r0
+	str	r0, [sp, #20]
+	str	r0, [sp, #40]
+	str	r8, [sp, #32]
 	muls	r3, r2, r3
-	str	r3, [sp, #48]
+	str	r3, [sp, #28]
 	ldr	r3, [sp, #12]
-	str	r3, [sp, #32]
-.L1735:
+	lsls	r3, r3, #7
+	str	r3, [sp, #56]
+	b	.L1840
+.L1848:
+	str	r3, [sp, #40]
+.L1840:
+	ldr	r3, .L1863+12
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1762+20
+	ldr	r0, [r3]
 	bl	memset
-	ldr	r3, .L1762+4
-	mov	r0, r4
+	ldr	r3, .L1863+16
+	mov	r0, r8
 	ldrh	r7, [r3, #14]
 	mov	r1, r7
-	uxtb	r8, r7
-	uxth	r3, r8
-	str	r3, [sp, #40]
-	ldr	r3, .L1762+4
-	ldrh	r5, [r3, #10]
-	ldrh	r3, [sp, #40]
-	smulbb	r5, r5, r3
+	uxtb	r6, r7
+	uxth	r3, r6
+	str	r3, [sp, #36]
+	ldr	r3, .L1863+16
+	ldrh	r4, [r3, #10]
+	ldrh	r3, [sp, #36]
+	smulbb	r4, r4, r3
 	bl	__aeabi_uidiv
-	uxth	r5, r5
+	ldr	r3, [r5, #4]
 	mov	r1, r0
-	ldr	r3, [r6, #4]
 	movs	r0, #0
+	uxth	r4, r4
 	blx	r3
-	cmp	r5, #512
-	bcs	.L1739
+	ldr	r3, [sp, #28]
+	cmp	r3, r4
+	bls	.L1829
 	mov	r1, r7
-	adds	r0, r5, r4
+	add	r0, r4, r8
 	bl	__aeabi_uidiv
-	ldr	r3, [r6, #4]
+	ldr	r3, [r5, #4]
 	mov	r1, r0
 	movs	r0, #0
 	blx	r3
-.L1739:
-	mov	r1, r5
-	mov	r0, r4
+.L1829:
+	mov	r1, r4
+	mov	r0, r8
+	movs	r4, #0
 	bl	__aeabi_uidivmod
-	movs	r5, #0
-	mov	r10, r1
-	subs	r3, r4, r1
-	str	r3, [sp, #44]
-.L1740:
-	cmp	r5, #512
-	bcc	.L1741
-	ldr	r3, .L1762+4
-	mov	r0, r4
-	movs	r5, #0
-	ldrb	r8, [r3, #14]	@ zero_extendqisi2
-	uxth	r3, r8
-	str	r3, [sp, #40]
-	ldr	r3, .L1762+4
+	sub	r3, r8, r1
+	str	r1, [sp, #48]
+	str	r3, [sp, #52]
+.L1830:
+	ldr	r3, [sp, #28]
+	cmp	r3, r4
+	bhi	.L1831
+	ldr	r3, .L1863+12
+	mov	r0, r8
+	movs	r4, #0
+	ldr	r3, [r3]
+	str	r3, [sp, #52]
+	ldr	r3, .L1863+16
+	ldrb	r7, [r3, #14]	@ zero_extendqisi2
+	uxth	r3, r7
+	str	r3, [sp, #48]
+	ldr	r3, .L1863+16
 	ldrh	r1, [r3, #10]
-	ldrh	r3, [sp, #40]
+	ldrh	r3, [sp, #48]
 	smulbb	r1, r1, r3
 	uxth	r1, r1
 	bl	__aeabi_uidivmod
-	mov	fp, r1
-	subs	r3, r4, r1
-	uxth	r0, fp
-	mov	r1, r8
-	str	r3, [sp, #44]
+	str	r1, [sp, #36]
+	sub	r3, r8, r1
+	ldrh	r0, [sp, #36]
+	mov	r1, r7
+	str	r3, [sp, #60]
 	bl	__aeabi_idivmod
-	uxth	r7, r1
-.L1742:
-	cmp	r5, #512
-	bcs	.L1746
-	ldr	r3, [sp, #40]
-	mov	r1, r8
-	add	r0, fp, r5
-	sub	r10, r3, r7
-	ldr	r3, .L1762+20
-	uxth	r10, r10
-	add	r2, r3, r5, lsl #9
-	str	r2, [sp, #52]
+	uxth	r6, r1
+.L1832:
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	bcs	.L1836
+	ldr	r3, [sp, #48]
+	mov	r1, r7
+	subs	r3, r3, r6
+	uxth	r3, r3
+	str	r3, [sp, #64]
+	ldr	r3, [sp, #52]
+	add	r2, r3, r4, lsl #9
+	ldr	r3, [sp, #36]
+	str	r2, [sp, #68]
+	adds	r0, r3, r4
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #44]
+	ldr	r3, [sp, #60]
 	uxth	r0, r0
-	mov	r1, r8
-	add	r7, r7, r3
-	mla	r0, r8, r0, r7
+	mov	r1, r7
+	add	r6, r6, r3
+	mla	r0, r7, r0, r6
 	bl	__aeabi_uidiv
-	ldr	r7, [r6, #12]
+	ldr	r6, [r5, #12]
 	mov	r1, r0
-	add	r3, sp, #56
-	ldr	r2, [sp, #52]
+	add	r3, sp, #72
+	ldr	r2, [sp, #68]
 	movs	r0, #0
-	blx	r7
+	blx	r6
 	adds	r0, r0, #1
-	bne	.L1743
-.L1746:
-	ldr	r3, .L1762+24
-	movs	r5, #0
-.L1744:
-	ldr	r2, .L1762+20
-	mov	r7, r3
-	adds	r3, r3, #4
-	ldr	r1, [r2, r5, lsl #2]
-	ldr	r2, [r7]
-	cmp	r1, r2
-	beq	.L1747
+	bne	.L1833
+.L1836:
+	ldr	r3, .L1863+12
+	mov	r1, r10
+	movs	r4, #0
+	ldr	r0, [r3]
+.L1834:
+	mov	r7, r1
+	ldr	r2, [r0, r4, lsl #2]
+	ldr	r3, [r7]
+	lsls	r6, r4, #2
+	adds	r1, r1, #4
+	cmp	r2, r3
+	beq	.L1837
 	mov	r2, #512
 	movs	r1, #0
-	ldr	r0, .L1762+20
 	bl	memset
-	ldr	r2, .L1762+20
-	mov	r1, r4
-	str	r5, [sp]
+	ldr	r3, .L1863+12
+	mov	r1, r8
+	ldr	r0, .L1863+28
+	ldr	r2, [r3]
+	str	r4, [sp]
 	ldr	r3, [r7]
-	ldr	r2, [r2, r5, lsl #2]
-	ldr	r0, .L1762+28
+	ldr	r2, [r2, r6]
 	bl	printf
-	ldr	r1, [sp, #20]
-	mov	r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [r6, #4]
-	mov	r1, r0
+	ldr	r3, [r5, #4]
+	mov	r1, r8
 	movs	r0, #0
 	blx	r3
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #20]
 	cmp	r3, #1
-	bls	.L1748
-	ldr	r3, [sp, #24]
-	ldr	r1, [sp, #20]
-	adds	r0, r3, r4
-	bl	__aeabi_uidiv
-	ldr	r3, [r6, #4]
-	mov	r1, r0
+	bls	.L1847
+	ldr	r2, [sp, #16]
 	movs	r0, #0
+	ldr	r3, [r5, #4]
+	add	r1, r2, r8
 	blx	r3
-.L1748:
-	ldr	r2, [sp, #32]
-	ldr	r3, [sp, #12]
+.L1847:
+	ldr	r2, [sp, #40]
+	ldr	r3, [sp, #20]
 	add	r3, r3, r2
-	ldr	r2, [sp, #48]
-	add	r4, r4, r2
-	ldr	r2, [sp, #32]
+	ldr	r2, [sp, #28]
+	add	r8, r8, r2
+	ldr	r2, [sp, #40]
 	cmp	r2, #15
-	bls	.L1754
-.L1753:
-	ldr	r3, .L1762
-	movs	r2, #0
-	str	r2, [r3]
-.L1733:
-	ldr	r3, [sp, #36]
-	movs	r0, #0
-	ldr	r2, [sp, #16]
-	ldr	r1, [sp, #8]
-	bl	FtlWrite
-	add	sp, sp, #120
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1734:
-	ldr	r0, [r4, r3, lsl #2]
-	adds	r3, r3, #1
-	cmp	r3, #4096
-	it	hi
-	movhi	r3, #0
-	str	r0, [r2, #-4]!
-	cmp	r1, r2
-	bne	.L1737
-	b	.L1738
-.L1754:
-	str	r3, [sp, #32]
-	b	.L1735
-.L1741:
-	mov	r1, r8
-	add	r0, r10, r5
+	bls	.L1848
+	b	.L1841
+.L1831:
+	ldr	r3, [sp, #48]
+	mov	r1, r6
+	adds	r0, r3, r4
 	bl	__aeabi_uidiv
-	uxth	fp, r0
-	mov	r1, r8
-	ldr	r0, [sp, #44]
-	mul	r3, r8, fp
-	str	r3, [sp, #56]
+	uxth	r3, r0
+	add	r2, r10, r4, lsl #9
+	ldr	r0, [sp, #52]
+	mov	r7, r3
+	muls	r3, r6, r3
+	mov	r1, r6
+	str	r2, [sp, #60]
+	str	r3, [sp, #72]
 	movw	r3, #61424
-	str	r3, [sp, #60]
-	ldr	r3, .L1762+24
-	add	r2, r3, r5, lsl #9
-	str	r2, [sp, #52]
+	str	r3, [sp, #76]
 	bl	__aeabi_uidiv
-	add	r3, sp, #56
-	add	r1, r0, fp
-	ldr	r2, [sp, #52]
+	add	r3, sp, #72
+	adds	r1, r0, r7
+	ldr	r2, [sp, #60]
 	movs	r0, #0
-	ldr	r7, [r6, #8]
+	ldr	r7, [r5, #8]
 	blx	r7
-	ldr	r3, [sp, #40]
-	add	r5, r5, r3
-	uxth	r5, r5
-	b	.L1740
-.L1743:
-	add	r5, r5, r10
-	movs	r7, #0
-	uxth	r5, r5
-	b	.L1742
-.L1747:
-	adds	r5, r5, #1
-	cmp	r5, #65536
-	bne	.L1744
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #36]
+	add	r4, r4, r3
+	uxth	r4, r4
+	b	.L1830
+.L1833:
+	ldr	r3, [sp, #64]
+	movs	r6, #0
+	add	r3, r3, r4
+	uxth	r4, r3
+	b	.L1832
+.L1837:
+	ldr	r3, [sp, #56]
+	adds	r4, r4, #1
+	cmp	r4, r3
+	bne	.L1834
+	ldr	r3, [sp, #32]
 	adds	r3, r3, #1
 	cmp	r3, #5
-	str	r3, [sp, #28]
-	bls	.L1748
-	b	.L1753
-.L1732:
-	ldr	r3, [sp, #8]
-	ldr	r0, .L1762+24
-	cmp	r3, #63
-	bhi	.L1750
-	rsb	r1, r3, #64
-	ldr	r3, [sp, #16]
+	str	r3, [sp, #32]
+	bls	.L1847
+	b	.L1841
+.L1822:
+	cmp	r0, #64
+	ldr	r6, .L1863+4
+	bne	.L1842
+	mov	r0, #262144
+	bl	ftl_malloc
+	str	r0, [r6]
+	mov	r0, #262144
+	bl	ftl_malloc
+	ldr	r3, .L1863+12
+	str	r0, [r3]
+	ldr	r3, [r6]
+	cbz	r3, .L1843
+	cbz	r0, .L1843
+	ldr	r2, .L1863
+	movs	r1, #1
+	mov	r0, r3
+	str	r1, [r2]
+	mov	r2, #262144
+	movs	r1, #0
+	bl	ftl_memset
+.L1842:
+	cmp	fp, #63
+	ldr	r0, [r6]
+	bhi	.L1844
+	ldr	r3, [sp, #24]
+	rsb	r1, fp, #64
 	subs	r2, r3, r1
-	ldr	r3, [sp, #36]
-	add	r1, r3, r1, lsl #9
-.L1751:
-	movs	r3, #1
+	ldr	r3, [sp, #44]
+	add	r1, r3, r1, lsl #9
+.L1845:
 	cmp	r5, #576
-	str	r3, [r6]
 	ittt	hi
 	subhi	r2, r2, r4
 	mvnhi	r3, #446
 	addhi	r2, r2, r3
 	lsls	r2, r2, #9
-	bl	memcpy
-	b	.L1733
-.L1750:
-	ldr	r2, [sp, #8]
-	ldr	r3, .L1762+32
-	ldr	r1, [sp, #36]
-	add	r3, r3, r2
-	ldr	r2, [sp, #16]
-	add	r0, r0, r3, lsl #9
-	b	.L1751
-.L1763:
-	.align	2
-.L1762:
-	.word	.LANCHOR179
+	bl	ftl_memcpy
+	b	.L1823
+.L1864:
+	.align	2
+.L1863:
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	-52655045
+	.word	.LANCHOR186
 	.word	.LANCHOR0
-	.word	idb_buf+262144
-	.word	idb_buf+16388
+	.word	.LC114
 	.word	.LANCHOR105
-	.word	gp_flash_check_buf
-	.word	idb_buf
-	.word	.LC109
-	.word	8388544
-	.size	sftl_write, .-sftl_write
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadSysInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r1, #0
-	ldr	r8, .L1785+136
-	ldr	r5, .L1785
-	ldr	r3, [r8]
-	ldr	r4, .L1785+4
-	ldr	r10, .L1785+140
-	ldrh	r2, [r5]
-	ldr	r7, .L1785+8
-	str	r3, [r4, #8]
-	ldr	r6, .L1785+12
-	ldr	r3, [r10]
-	lsls	r2, r2, #1
-	ldr	r0, [r7]
-	str	r3, [r4, #12]
-	bl	ftl_memset
-	ldrh	r0, [r6]
-	movw	r3, #65535
-	str	r7, [sp]
-	cmp	r0, r3
-	bne	.L1765
-.L1773:
-	mov	r0, #-1
-.L1764:
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1765:
-	movs	r1, #1
-	mov	fp, r4
-	bl	FtlGetLastWrittenPage
-	ldr	r3, .L1785+16
-	sxth	r7, r0
-	adds	r0, r0, #1
-	strh	r0, [r6, #2]	@ movhi
-.L1767:
-	cmp	r7, #0
-	bge	.L1770
-	movw	r2, #1437
-	ldr	r1, .L1785+20
-	ldr	r0, .L1785+24
-	bl	printf
-.L1769:
-	ldr	r2, .L1785+28
-	ldrh	r3, [r5]
-	ldrh	r2, [r2]
-	adds	r3, r3, #24
-	cmp	r2, r3, lsl #1
-	bcs	.L1772
-	movw	r2, #1439
-	ldr	r1, .L1785+20
-	ldr	r0, .L1785+24
-	bl	printf
-.L1772:
-	ldr	r7, .L1785+32
-	movs	r2, #48
-	ldr	r1, [r4, #8]
-	mov	r0, r7
-	bl	ftl_memcpy
-	ldrh	r2, [r5]
-	ldr	r1, [r4, #8]
-	ldr	r3, [sp]
-	lsls	r2, r2, #1
-	adds	r1, r1, #48
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldrh	r1, [r5]
-	ldr	r3, [r4, #8]
-	mov	r4, r7
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L1785+36
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-	ldr	r2, [r7]
-	ldr	r3, .L1785+16
-	cmp	r2, r3
-	bne	.L1773
-	ldr	r3, .L1785+40
-	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	ldrh	r5, [r7, #8]
-	ldrh	r3, [r3]
-	strh	r5, [r6, #6]	@ movhi
-	cmp	r2, r3
-	bne	.L1773
-	ldr	r3, .L1785+44
-	ldr	r2, .L1785+48
-	str	r5, [r3]
-	ldr	r3, .L1785+52
-	ldrh	r3, [r3]
-	muls	r3, r5, r3
-	str	r3, [r2]
-	ldr	r2, .L1785+56
-	ldrh	r2, [r2]
-	muls	r3, r2, r3
-	ldr	r2, .L1785+60
-	str	r3, [r2]
-	ldr	r3, .L1785+64
-	ldr	r6, [r3]
-	ldr	r3, .L1785+68
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L1785+72
-	subs	r0, r6, r0
-	ldrh	r1, [r3]
-	subs	r0, r0, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L1785+76
-	cmp	r5, r6
-	strh	r0, [r3]	@ movhi
-	bls	.L1774
-	movw	r2, #1461
-	ldr	r1, .L1785+20
-	ldr	r0, .L1785+24
+	.word	.LC115
+.L1843:
+	ldr	r1, .L1865
+	ldr	r0, .L1865+4
 	bl	printf
-.L1774:
-	ldrh	r2, [r4, #16]
-	ldr	r3, .L1785+80
-	ldrh	ip, [r4, #14]
-	ldr	r7, .L1785+84
-	lsrs	r1, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r3, #6]
-	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1785+88
-	strb	r2, [r3, #8]
-	ldrh	r2, [r4, #18]
-	strh	ip, [r3]	@ movhi
-	movw	r3, #65535
-	strh	r3, [r7]	@ movhi
-	movs	r3, #0
-	strh	r2, [r1]	@ movhi
-	ldrh	r2, [r4, #20]
-	strh	r3, [r7, #2]	@ movhi
-	strb	r3, [r7, #6]
-	strb	r3, [r7, #8]
-	lsrs	r5, r2, #6
-	and	r2, r2, #63
-	strb	r2, [r1, #6]
-	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	strh	r5, [r1, #2]	@ movhi
-	ldrh	r5, [r4, #22]
-	strb	r2, [r1, #8]
-	ldr	r2, .L1785+92
-	strh	r5, [r2]	@ movhi
-	ldrh	r5, [r4, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r2, #6]
-	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	strh	r6, [r2, #2]	@ movhi
-	ldr	r6, [r4, #32]
-	strb	r5, [r2, #8]
-	ldr	r5, .L1785+96
-	str	r3, [r5]
-	ldr	r5, .L1785+100
-	str	r3, [r5]
-	ldr	r5, .L1785+104
-	str	r3, [r5]
-	ldr	r5, .L1785+108
-	str	r3, [r5]
-	ldr	r5, .L1785+112
-	str	r6, [r5]
-	mov	r6, r1
-	ldr	r5, .L1785+116
-	str	r3, [r5]
-	ldr	r5, .L1785+120
-	str	r3, [r5]
-	ldr	r5, .L1785+124
-	ldr	lr, [r4, #40]
-	str	r3, [r5]
-	ldr	r3, .L1785+128
-	ldr	r5, [r3]
-	cmp	lr, r5
-	mov	r5, r2
-	it	hi
-	strhi	lr, [r3]
-	ldr	r3, .L1785+132
-	ldr	r2, [r4, #36]
-	ldr	r1, [r3]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3]
-	movw	r3, #65535
-	cmp	ip, r3
-	beq	.L1777
-	ldr	r0, .L1785+80
-	bl	make_superblock
-.L1777:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1778
-	ldr	r0, .L1785+88
-	bl	make_superblock
-.L1778:
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1779
-	ldr	r0, .L1785+92
-	bl	make_superblock
-.L1779:
-	ldrh	r2, [r7]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1780
-	ldr	r0, .L1785+84
-	bl	make_superblock
-.L1780:
-	movs	r0, #0
-	b	.L1764
-.L1770:
-	ldrh	r2, [r6]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	ldr	r2, [r8]
-	str	r2, [r4, #8]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1768
-	ldr	r2, [r8]
-	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L1768
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L1769
-.L1768:
-	subs	r7, r7, #1
-	sxth	r7, r7
-	b	.L1767
-.L1786:
+	b	.L1842
+.L1844:
+	ldr	r3, .L1865+8
+	ldr	r1, [sp, #44]
+	ldr	r2, [sp, #24]
+	add	r3, r3, fp
+	add	r0, r0, r3, lsl #9
+	b	.L1845
+.L1866:
 	.align	2
-.L1785:
-	.word	.LANCHOR5
-	.word	.LANCHOR106
-	.word	.LANCHOR42
-	.word	.LANCHOR79
-	.word	1179929683
-	.word	.LANCHOR180
-	.word	.LC1
-	.word	.LANCHOR23
-	.word	.LANCHOR39
-	.word	.LANCHOR1
-	.word	.LANCHOR10
-	.word	.LANCHOR181
-	.word	.LANCHOR61
-	.word	.LANCHOR19
-	.word	.LANCHOR12
-	.word	.LANCHOR34
-	.word	.LANCHOR7
-	.word	.LANCHOR37
-	.word	.LANCHOR3
-	.word	.LANCHOR78
-	.word	.LANCHOR51
-	.word	.LANCHOR80
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR67
-	.word	.LANCHOR64
-	.word	.LANCHOR62
-	.word	.LANCHOR66
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR76
-	.word	.LANCHOR65
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlSysBlkInit,"ax",%progbits
+.L1865:
+	.word	.LANCHOR187
+	.word	.LC116
+	.word	8388544
+	.size	sftl_write, .-sftl_write
+	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
-	.global	FtlSysBlkInit
+	.global	FtlMakeBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r3, #0
-	ldr	r6, .L1802
-	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1802+4
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L1802+8
-	ldrh	r2, [r3]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r7, .L1886
+	bl	FtlBbtMemInit
+	sub	r8, r7, #18
+	bl	FtlLoadFactoryBbt
+.L1868:
+	ldr	r3, .L1886+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1874
+	ldr	r5, .L1886+8
+	movs	r4, #0
+.L1875:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L1876
+	ldr	r4, .L1886+12
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1877:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1881
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1878
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L1879
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L1878:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1877
+.L1874:
+	ldr	r3, .L1886+16
+	ldr	r5, .L1886+20
+	ldrh	r2, [r8, #2]!
+	ldr	r4, .L1886+24
+	ldr	r0, [r3]
 	movw	r3, #65535
+	ldr	r10, [r5]
 	cmp	r2, r3
-	bne	.L1788
-.L1790:
-	mov	r7, #-1
-.L1787:
-	mov	r0, r7
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1788:
-	bl	FtlLoadSysInfo
-	mov	r7, r0
-	cmp	r0, #0
-	bne	.L1790
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1802+12
-	movs	r0, #12
-	ldrh	r1, [r3]
-	ldr	r3, .L1802+16
-	ldr	r2, [r3]
-	mov	r3, r7
-.L1791:
-	cmp	r3, r1
-	bge	.L1796
-	mla	r4, r0, r3, r2
-	ldr	r4, [r4, #4]
-	cmp	r4, #0
-	bge	.L1792
-.L1796:
-	ldr	r4, .L1802+20
-	cmp	r3, r1
-	ldr	r5, .L1802+24
-	ldrh	r2, [r4, #28]
-	add	r2, r2, #1
-	strh	r2, [r4, #28]	@ movhi
-	bge	.L1800
-.L1793:
-	ldr	r6, .L1802+28
-	ldr	r0, .L1802+24
-	bl	FtlSuperblockPowerLostFix
-	mov	r0, r6
-	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1802+32
-	ldrh	r1, [r5]
-	ldrh	r0, [r5, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	ldr	r0, .L1802+36
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	ldrh	ip, [r6]
-	ldrh	r3, [r0]
-	ldrh	lr, [r6, #4]
-	strh	r3, [r5, #2]	@ movhi
+	mov	fp, r4
+	ldr	r3, .L1886+28
+	str	r0, [r4, #8]
+	str	r10, [r4, #12]
+	beq	.L1869
+	ldrh	r5, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L1870:
+	uxth	r0, r5
+	adds	r6, r6, #1
+	adds	r7, r7, #4
+	bl	FtlBbmMapBadBlock
+	b	.L1868
+.L1869:
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	str	r5, [sp, #4]
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1871:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1872
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r4, [r8]	@ movhi
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L1886+16
+	mov	r2, #4096
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
 	movs	r3, #0
-	strb	r3, [r5, #6]
-	strh	r3, [r5, #4]	@ movhi
-	ldrh	r1, [r2, ip, lsl #1]
-	sub	r1, r1, lr
-	strh	r1, [r2, ip, lsl #1]	@ movhi
-	ldrh	r2, [r0]
-	ldr	r0, .L1802+40
-	strb	r3, [r6, #6]
-	strh	r2, [r6, #2]	@ movhi
-	strh	r3, [r6, #4]	@ movhi
-	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1802+44
-	bl	FtlMapBlkWriteDump_data
-	ldrh	r3, [r4, #30]
+	str	r3, [r10, #4]
+	ldrh	r5, [r2]
+	ldrh	r3, [r8]
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	mla	r5, r6, r5, r3
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	ldr	r3, .L1886+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	ldr	r0, .L1886+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1886+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [fp]
 	adds	r3, r3, #1
-	strh	r3, [r4, #30]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1801:
-	bl	FtlVpcTblFlush
-	ldrh	r0, [r5]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1799
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1799
-	ldr	r5, .L1802+28
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1799
-	bl	FtlGcRefreshBlock
-	ldrh	r0, [r5]
-	bl	FtlGcRefreshBlock
-	ldr	r0, .L1802+24
-	bl	allocate_new_data_superblock
-	mov	r0, r5
-	bl	allocate_new_data_superblock
-.L1799:
-	ldrh	r3, [r4, #28]
-	lsls	r3, r3, #27
-	bne	.L1787
-	bl	FtlVpcCheckAndModify
-	b	.L1787
-.L1792:
+	bne	.L1870
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+	b	.L1871
+.L1872:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1871
+.L1876:
+	bl	FtlBbmMapBadBlock
+	b	.L1875
+.L1879:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L1880
+	strh	r5, [r4]	@ movhi
+	b	.L1878
+.L1880:
+	strh	r5, [r4, #4]	@ movhi
+.L1881:
+	ldr	r3, .L1886+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r1, #1
+	movs	r2, #2
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #24]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	b	.L1791
-.L1800:
-	ldrh	r3, [r6]
-	cmp	r3, #0
-	bne	.L1793
-	bl	l2p_flush
-	b	.L1801
-.L1803:
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1887:
 	.align	2
-.L1802:
-	.word	.LANCHOR161
-	.word	.LANCHOR4
-	.word	.LANCHOR79
-	.word	.LANCHOR33
-	.word	.LANCHOR55
-	.word	.LANCHOR39
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR42
-	.word	.LANCHOR19
-	.word	.LANCHOR144
-	.word	.LANCHOR149
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
+.L1886:
+	.word	.LANCHOR37+28
+	.word	.LANCHOR10
+	.word	.LANCHOR25
+	.word	.LANCHOR37
+	.word	.LANCHOR115
+	.word	.LANCHOR123
+	.word	.LANCHOR148
+	.word	.LANCHOR17
+	.word	.LANCHOR137
+	.word	.LANCHOR106
+	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
 	.global	ftl_low_format
@@ -13819,62 +14328,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1828
-	ldr	r2, .L1828+4
-	ldr	r5, .L1828+8
+	ldr	r6, .L1912
+	ldr	r2, .L1912+4
+	ldr	r5, .L1912+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1805
+	cbz	r0, .L1889
 	bl	FtlMakeBbt
-.L1805:
-	ldr	r3, .L1828+12
-	ldr	r2, .L1828+16
-	ldr	ip, .L1828+100
+.L1889:
+	ldr	r3, .L1912+12
+	ldr	r2, .L1912+16
+	ldr	ip, .L1912+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1828+20
+	ldr	r2, .L1912+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1806:
+.L1890:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1807
-	ldr	r3, .L1828+24
+	blt	.L1891
+	ldr	r3, .L1912+24
 	movs	r7, #0
-	ldr	r10, .L1828+104
+	ldr	r10, .L1912+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1808:
+.L1892:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1809
-	ldr	r4, .L1828+28
+	bhi	.L1893
+	ldr	r4, .L1912+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1810
-.L1814:
+	bgt	.L1894
+.L1898:
 	movs	r6, #0
 	mov	r7, r6
-.L1811:
+.L1895:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1815
+	bhi	.L1899
 	ldrh	r2, [fp]
-	ldr	r3, .L1828+32
+	ldr	r3, .L1912+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1828+36
+	ldr	r6, .L1912+36
 	str	r2, [r3]
-	ldr	r3, .L1828+40
+	ldr	r3, .L1912+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -13884,13 +14393,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1828+44
+	ldr	r0, .L1912+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1816
+	ble	.L1900
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -13902,11 +14411,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1816:
-	ldr	r2, .L1828+48
+.L1900:
+	ldr	r2, .L1912+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1818
-	ldr	r1, .L1828+44
+	cbz	r2, .L1902
+	ldr	r1, .L1912+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -13917,24 +14426,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1818:
+.L1902:
 	ldr	r3, [sp]
-	ldr	r7, .L1828+52
-	ldr	r10, .L1828+108
+	ldr	r7, .L1912+52
+	ldr	r10, .L1912+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1828+56
+	ldr	r3, .L1912+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1828+60
+	ldr	r6, .L1912+60
 	muls	r4, r3, r4
-	ldr	r3, .L1828+64
+	ldr	r3, .L1912+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -13943,13 +14452,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1828+68
+	ldr	r2, .L1912+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1828+72
+	ldr	r2, .L1912+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -13960,30 +14469,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1828+76
+	ldr	r3, .L1912+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1820:
+.L1904:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1821
+	bne	.L1905
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1820
-.L1807:
+	b	.L1904
+.L1891:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1806
-.L1809:
+	b	.L1890
+.L1893:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -13991,11 +14500,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1808
-.L1810:
+	b	.L1892
+.L1894:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1828+80
+	ldr	r3, .L1912+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -14003,26 +14512,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1812:
+.L1896:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1814
+	bls	.L1898
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1812
-.L1815:
+	b	.L1896
+.L1899:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1811
-.L1821:
+	b	.L1895
+.L1905:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1828+84
+	ldr	r4, .L1912+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -14038,19 +14547,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1822:
+.L1906:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1823
+	cbnz	r3, .L1907
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1822
-.L1823:
+	b	.L1906
+.L1907:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -14059,10 +14568,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1828+88
+	ldr	r3, .L1912+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1828+92
+	ldr	r3, .L1912+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -14075,32 +14584,32 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1824
-	ldr	r3, .L1828+96
+	cbnz	r0, .L1908
+	ldr	r3, .L1912+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1824:
+.L1908:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1829:
+.L1913:
 	.align	2
-.L1828:
+.L1912:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
 	.word	.LANCHOR12
-	.word	.LANCHOR115
-	.word	.LANCHOR113
+	.word	.LANCHOR118
+	.word	.LANCHOR119
 	.word	.LANCHOR5
 	.word	.LANCHOR3
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR61
 	.word	.LANCHOR7
 	.word	.LANCHOR78
 	.word	.LANCHOR15
-	.word	.LANCHOR181
+	.word	.LANCHOR152
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
@@ -14116,61 +14625,6 @@ ftl_low_format:
 	.word	.LANCHOR6
 	.word	.LANCHOR42
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.sftl_init,"ax",%progbits
-	.align	1
-	.global	sftl_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_init, %function
-sftl_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r3, #-1
-	ldr	r4, .L1836
-	ldr	r1, .L1836+4
-	ldr	r0, .L1836+8
-	str	r3, [r4]
-	bl	printf
-	ldr	r0, .L1836+12
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1836+16
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	r0, .L1834
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1834
-	movs	r3, #1
-	str	r3, [r4]
-	ldr	r3, .L1836+20
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L1834
-	movw	r4, #8129
-.L1833:
-	movs	r1, #1
-	movs	r0, #0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1833
-.L1834:
-	movs	r0, #0
-	pop	{r4, pc}
-.L1837:
-	.align	2
-.L1836:
-	.word	.LANCHOR86
-	.word	.LC70
-	.word	.LC71
-	.word	.LANCHOR0
-	.word	.LANCHOR4
-	.word	.LANCHOR48
-	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
 	.global	ftl_memcmp
@@ -14185,7 +14639,6 @@ ftl_memcmp:
 	@ link register save eliminated.
 	b	memcmp
 	.size	ftl_memcmp, .-ftl_memcmp
-	.global	ftl_temp_buf
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -14200,6 +14653,9 @@ ftl_memcmp:
 	.global	g_recovery_ppa_tbl
 	.global	g_recovery_page_min_ver
 	.global	g_recovery_page_num
+	.global	sftl_nand_check_spare_buf
+	.global	sftl_temp_buf
+	.global	sftl_nand_check_buf
 	.global	g_cur_erase_blk
 	.global	g_gc_skip_write_count
 	.global	g_gc_head_data_block_count
@@ -14577,19 +15033,6 @@ c_gc_page_buf_num:
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.space	2
-	.section	.bss.check_buf,"aw",%nobits
-	.align	2
-	.type	check_buf, %object
-	.size	check_buf, 4096
-check_buf:
-	.space	4096
-	.section	.bss.check_spare_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR110,. + 0
-	.type	check_spare_buf, %object
-	.size	check_spare_buf, 512
-check_spare_buf:
-	.space	512
 	.section	.bss.check_vpc_table,"aw",%nobits
 	.align	1
 	.type	check_vpc_table, %object
@@ -14598,17 +15041,11 @@ check_vpc_table:
 	.space	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
-	.section	.bss.ftl_temp_buf,"aw",%nobits
-	.align	2
-	.type	ftl_temp_buf, %object
-	.size	ftl_temp_buf, 4096
-ftl_temp_buf:
-	.space	4096
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
 	.set	.LANCHOR37,. + 0
@@ -14618,7 +15055,7 @@ gBbtInfo:
 	.space	60
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 40
 gL2pMapInfo:
@@ -14639,7 +15076,7 @@ gSysInfo:
 	.space	12
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 40
 gVendorBlkInfo:
@@ -14667,7 +15104,7 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -14702,7 +15139,7 @@ g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -14716,14 +15153,14 @@ g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -14765,14 +15202,14 @@ g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -14786,14 +15223,14 @@ g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
@@ -14856,7 +15293,7 @@ g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
@@ -14919,28 +15356,28 @@ g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -14961,7 +15398,7 @@ g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -15003,7 +15440,7 @@ g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
@@ -15038,7 +15475,7 @@ g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
@@ -15073,14 +15510,14 @@ g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -15094,10 +15531,11 @@ gp_ect_tbl_info:
 	.space	4
 	.section	.bss.gp_flash_check_buf,"aw",%nobits
 	.align	2
+	.set	.LANCHOR186,. + 0
 	.type	gp_flash_check_buf, %object
-	.size	gp_flash_check_buf, 262144
+	.size	gp_flash_check_buf, 4
 gp_flash_check_buf:
-	.space	262144
+	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
 	.set	.LANCHOR90,. + 0
@@ -15113,13 +15551,14 @@ gp_last_act_superblock:
 	.space	4
 	.section	.bss.idb_buf,"aw",%nobits
 	.align	2
+	.set	.LANCHOR185,. + 0
 	.type	idb_buf, %object
-	.size	idb_buf, 262144
+	.size	idb_buf, 4
 idb_buf:
-	.space	262144
+	.space	4
 	.section	.bss.idb_need_write_back,"aw",%nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -15196,21 +15635,21 @@ p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
@@ -15272,21 +15711,21 @@ p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
@@ -15328,7 +15767,7 @@ p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
@@ -15342,7 +15781,7 @@ p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
@@ -15356,35 +15795,56 @@ req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
 	.space	20
+	.section	.bss.sftl_nand_check_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	sftl_nand_check_buf, %object
+	.size	sftl_nand_check_buf, 4
+sftl_nand_check_buf:
+	.space	4
+	.section	.bss.sftl_nand_check_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR122,. + 0
+	.type	sftl_nand_check_spare_buf, %object
+	.size	sftl_nand_check_spare_buf, 4
+sftl_nand_check_spare_buf:
+	.space	4
+	.section	.bss.sftl_temp_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR121,. + 0
+	.type	sftl_temp_buf, %object
+	.size	sftl_temp_buf, 4
+sftl_temp_buf:
+	.space	4
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
@@ -15398,37 +15858,42 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",%progbits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
-	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
+	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",%progbits,1
 .LC79:
-	.ascii	"prog read error: = %x\012\000"
+	.ascii	"%s: addr: %x is in id block!!!!!!!!!!\012\000"
 .LC80:
-	.ascii	"prog read s error: = %x %x %x\012\000"
+	.ascii	"not free: w: d:\000"
 .LC81:
+	.ascii	"not free: w: s:\000"
+	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
+.LC85:
+	.ascii	"prog read error: = %x\012\000"
+.LC86:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC87:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC0:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC97:
+.LC101:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC98:
+.LC102:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC99:
+.LC103:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
 .LC82:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
-.LC83:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
 	.ascii	"\000"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
-.LC100:
+.LC104:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
 .LC74:
@@ -15436,16 +15901,19 @@ power_up_flag:
 	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",%progbits,1
 .LC73:
 	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
+.LC100:
+	.ascii	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC103:
+.LC108:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC89:
+.LC88:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC90:
+.LC89:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
-.LC85:
+.LC84:
 	.ascii	"%s error allocating memory. return -1\012\000"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
 .LC2:
@@ -15585,19 +16053,22 @@ power_up_flag:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC106:
+.LC111:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC102:
+.LC106:
 	.ascii	"spuer block %x vpn is 0\012 \000"
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
+.LC107:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",%progbits,1
-.LC105:
+.LC110:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC104:
+.LC109:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC108:
+.LC113:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
 .LC72:
@@ -15606,212 +16077,224 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10016,"a",%progbits
-	.set	.LANCHOR171,. + 0
-	.type	__func__.10016, %object
-	.size	__func__.10016, 19
-__func__.10016:
+	.section	.rodata.__func__.10026,"a",%progbits
+	.set	.LANCHOR176,. + 0
+	.type	__func__.10026, %object
+	.size	__func__.10026, 19
+__func__.10026:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.10122,"a",%progbits
-	.set	.LANCHOR175,. + 0
-	.type	__func__.10122, %object
-	.size	__func__.10122, 23
-__func__.10122:
+	.section	.rodata.__func__.10137,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10137, %object
+	.size	__func__.10137, 23
+__func__.10137:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10389,"a",%progbits
-	.set	.LANCHOR104,. + 0
-	.type	__func__.10389, %object
-	.size	__func__.10389, 15
-__func__.10389:
+	.section	.rodata.__func__.10399,"a",%progbits
+	.set	.LANCHOR147,. + 0
+	.type	__func__.10399, %object
+	.size	__func__.10399, 15
+__func__.10399:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10406,"a",%progbits
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10406, %object
-	.size	__func__.10406, 15
-__func__.10406:
+	.section	.rodata.__func__.10417,"a",%progbits
+	.set	.LANCHOR153,. + 0
+	.type	__func__.10417, %object
+	.size	__func__.10417, 15
+__func__.10417:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8796,"a",%progbits
+	.section	.rodata.__func__.10440,"a",%progbits
+	.set	.LANCHOR104,. + 0
+	.type	__func__.10440, %object
+	.size	__func__.10440, 17
+__func__.10440:
+	.ascii	"FlashEraseBlocks\000"
+	.section	.rodata.__func__.8806,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8796, %object
-	.size	__func__.8796, 11
-__func__.8796:
+	.type	__func__.8806, %object
+	.size	__func__.8806, 11
+__func__.8806:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8920,"a",%progbits
-	.set	.LANCHOR170,. + 0
-	.type	__func__.8920, %object
-	.size	__func__.8920, 13
-__func__.8920:
+	.section	.rodata.__func__.8930,"a",%progbits
+	.set	.LANCHOR175,. + 0
+	.type	__func__.8930, %object
+	.size	__func__.8930, 13
+__func__.8930:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8948,"a",%progbits
-	.set	.LANCHOR178,. + 0
-	.type	__func__.8948, %object
-	.size	__func__.8948, 9
-__func__.8948:
+	.section	.rodata.__func__.8958,"a",%progbits
+	.set	.LANCHOR183,. + 0
+	.type	__func__.8958, %object
+	.size	__func__.8958, 9
+__func__.8958:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9094,"a",%progbits
+	.section	.rodata.__func__.9064,"a",%progbits
+	.set	.LANCHOR187,. + 0
+	.type	__func__.9064, %object
+	.size	__func__.9064, 14
+__func__.9064:
+	.ascii	"FtlWriteToIDB\000"
+	.section	.rodata.__func__.9105,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9094, %object
-	.size	__func__.9094, 14
-__func__.9094:
+	.type	__func__.9105, %object
+	.size	__func__.9105, 14
+__func__.9105:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9137,"a",%progbits
-	.set	.LANCHOR164,. + 0
-	.type	__func__.9137, %object
-	.size	__func__.9137, 11
-__func__.9137:
+	.section	.rodata.__func__.9148,"a",%progbits
+	.set	.LANCHOR150,. + 0
+	.type	__func__.9148, %object
+	.size	__func__.9148, 11
+__func__.9148:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9254,"a",%progbits
+	.section	.rodata.__func__.9263,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9254, %object
-	.size	__func__.9254, 17
-__func__.9254:
+	.type	__func__.9263, %object
+	.size	__func__.9263, 17
+__func__.9263:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9259,"a",%progbits
+	.section	.rodata.__func__.9268,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9259, %object
-	.size	__func__.9259, 17
-__func__.9259:
+	.type	__func__.9268, %object
+	.size	__func__.9268, 17
+__func__.9268:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9290,"a",%progbits
+	.section	.rodata.__func__.9299,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9290, %object
-	.size	__func__.9290, 17
-__func__.9290:
+	.type	__func__.9299, %object
+	.size	__func__.9299, 17
+__func__.9299:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9322,"a",%progbits
-	.set	.LANCHOR54,. + 0
-	.type	__func__.9322, %object
-	.size	__func__.9322, 22
-__func__.9322:
-	.ascii	"List_update_data_list\000"
 	.section	.rodata.__func__.9331,"a",%progbits
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	__func__.9331, %object
-	.size	__func__.9331, 16
+	.size	__func__.9331, 22
 __func__.9331:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.9340,"a",%progbits
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9340, %object
+	.size	__func__.9340, 16
+__func__.9340:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9364,"a",%progbits
-	.set	.LANCHOR116,. + 0
-	.type	__func__.9364, %object
-	.size	__func__.9364, 26
-__func__.9364:
+	.section	.rodata.__func__.9373,"a",%progbits
+	.set	.LANCHOR107,. + 0
+	.type	__func__.9373, %object
+	.size	__func__.9373, 26
+__func__.9373:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9375,"a",%progbits
-	.set	.LANCHOR143,. + 0
-	.type	__func__.9375, %object
-	.size	__func__.9375, 15
-__func__.9375:
+	.section	.rodata.__func__.9384,"a",%progbits
+	.set	.LANCHOR157,. + 0
+	.type	__func__.9384, %object
+	.size	__func__.9384, 15
+__func__.9384:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9389,"a",%progbits
-	.set	.LANCHOR141,. + 0
-	.type	__func__.9389, %object
-	.size	__func__.9389, 31
-__func__.9389:
+	.section	.rodata.__func__.9399,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9399, %object
+	.size	__func__.9399, 31
+__func__.9399:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9403,"a",%progbits
-	.set	.LANCHOR142,. + 0
-	.type	__func__.9403, %object
-	.size	__func__.9403, 16
-__func__.9403:
+	.section	.rodata.__func__.9413,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.9413, %object
+	.size	__func__.9413, 16
+__func__.9413:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9428,"a",%progbits
+	.section	.rodata.__func__.9438,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9428, %object
-	.size	__func__.9428, 22
-__func__.9428:
+	.type	__func__.9438, %object
+	.size	__func__.9438, 22
+__func__.9438:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9445,"a",%progbits
-	.set	.LANCHOR145,. + 0
-	.type	__func__.9445, %object
-	.size	__func__.9445, 9
-__func__.9445:
+	.section	.rodata.__func__.9455,"a",%progbits
+	.set	.LANCHOR159,. + 0
+	.type	__func__.9455, %object
+	.size	__func__.9455, 9
+__func__.9455:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9518,"a",%progbits
-	.set	.LANCHOR166,. + 0
-	.type	__func__.9518, %object
-	.size	__func__.9518, 15
-__func__.9518:
+	.section	.rodata.__func__.9528,"a",%progbits
+	.set	.LANCHOR171,. + 0
+	.type	__func__.9528, %object
+	.size	__func__.9528, 15
+__func__.9528:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9540,"a",%progbits
-	.set	.LANCHOR148,. + 0
-	.type	__func__.9540, %object
-	.size	__func__.9540, 14
-__func__.9540:
+	.section	.rodata.__func__.9550,"a",%progbits
+	.set	.LANCHOR149,. + 0
+	.type	__func__.9550, %object
+	.size	__func__.9550, 14
+__func__.9550:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9597,"a",%progbits
-	.set	.LANCHOR180,. + 0
-	.type	__func__.9597, %object
-	.size	__func__.9597, 15
-__func__.9597:
+	.section	.rodata.__func__.9607,"a",%progbits
+	.set	.LANCHOR151,. + 0
+	.type	__func__.9607, %object
+	.size	__func__.9607, 15
+__func__.9607:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9660,"a",%progbits
-	.set	.LANCHOR146,. + 0
-	.type	__func__.9660, %object
-	.size	__func__.9660, 16
-__func__.9660:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9694,"a",%progbits
+	.section	.rodata.__func__.9670,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9694, %object
-	.size	__func__.9694, 22
-__func__.9694:
+	.type	__func__.9670, %object
+	.size	__func__.9670, 16
+__func__.9670:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.9704,"a",%progbits
+	.set	.LANCHOR166,. + 0
+	.type	__func__.9704, %object
+	.size	__func__.9704, 22
+__func__.9704:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9751,"a",%progbits
+	.section	.rodata.__func__.9761,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9751, %object
-	.size	__func__.9751, 16
-__func__.9751:
+	.type	__func__.9761, %object
+	.size	__func__.9761, 16
+__func__.9761:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9772,"a",%progbits
-	.set	.LANCHOR154,. + 0
-	.type	__func__.9772, %object
-	.size	__func__.9772, 18
-__func__.9772:
+	.section	.rodata.__func__.9782,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9782, %object
+	.size	__func__.9782, 18
+__func__.9782:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9797,"a",%progbits
-	.set	.LANCHOR168,. + 0
-	.type	__func__.9797, %object
-	.size	__func__.9797, 21
-__func__.9797:
+	.section	.rodata.__func__.9807,"a",%progbits
+	.set	.LANCHOR173,. + 0
+	.type	__func__.9807, %object
+	.size	__func__.9807, 21
+__func__.9807:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9813,"a",%progbits
-	.set	.LANCHOR155,. + 0
-	.type	__func__.9813, %object
-	.size	__func__.9813, 14
-__func__.9813:
+	.section	.rodata.__func__.9823,"a",%progbits
+	.set	.LANCHOR161,. + 0
+	.type	__func__.9823, %object
+	.size	__func__.9823, 14
+__func__.9823:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9898,"a",%progbits
-	.set	.LANCHOR157,. + 0
-	.type	__func__.9898, %object
-	.size	__func__.9898, 25
-__func__.9898:
+	.section	.rodata.__func__.9908,"a",%progbits
+	.set	.LANCHOR163,. + 0
+	.type	__func__.9908, %object
+	.size	__func__.9908, 25
+__func__.9908:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9919,"a",%progbits
-	.set	.LANCHOR169,. + 0
-	.type	__func__.9919, %object
-	.size	__func__.9919, 29
-__func__.9919:
+	.section	.rodata.__func__.9929,"a",%progbits
+	.set	.LANCHOR174,. + 0
+	.type	__func__.9929, %object
+	.size	__func__.9929, 29
+__func__.9929:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9926,"a",%progbits
+	.section	.rodata.__func__.9936,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9926, %object
-	.size	__func__.9926, 19
-__func__.9926:
+	.type	__func__.9936, %object
+	.size	__func__.9936, 19
+__func__.9936:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9939,"a",%progbits
-	.set	.LANCHOR158,. + 0
-	.type	__func__.9939, %object
-	.size	__func__.9939, 16
-__func__.9939:
+	.section	.rodata.__func__.9949,"a",%progbits
+	.set	.LANCHOR164,. + 0
+	.type	__func__.9949, %object
+	.size	__func__.9949, 16
+__func__.9949:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9946,"a",%progbits
-	.set	.LANCHOR159,. + 0
-	.type	__func__.9946, %object
-	.size	__func__.9946, 20
-__func__.9946:
+	.section	.rodata.__func__.9956,"a",%progbits
+	.set	.LANCHOR165,. + 0
+	.type	__func__.9956, %object
+	.size	__func__.9956, 20
+__func__.9956:
 	.ascii	"decrement_vpc_count\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC101:
+.LC105:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
 .LC94:
@@ -15821,25 +16304,27 @@ __func__.9946:
 .LC96:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC84:
+.LC83:
 	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC91:
+.LC97:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC92:
+.LC98:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC93:
+.LC99:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC86:
+.LC90:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC87:
+.LC91:
 	.ascii	"spare:\000"
-.LC88:
+.LC92:
 	.ascii	"map_ppn:\000"
+.LC93:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC107:
+.LC112:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC75:
@@ -15852,10 +16337,14 @@ __func__.9946:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.44 20180713\000"
+	.ascii	"SFTL version: 5.0.48 20180930\000"
 .LC71:
 	.ascii	"%s\012\000"
 	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
-.LC109:
+.LC114:
+	.ascii	"write_idblock fix data %x %x %x\012\000"
+.LC115:
 	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC116:
+	.ascii	"%s idb buffer alloc fail\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 4211de05f7..83c74a38c1 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-08-02
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-09-30
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -698,7 +698,7 @@ INSERT_DATA_LIST:
 	cmp	w1, w0
 	bcs	.L85
 	ldp	x29, x30, [sp], 16
-	mov	w2, 221
+	mov	w2, 214
 	adrp	x1, .LANCHOR46
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR46
@@ -795,7 +795,7 @@ INSERT_FREE_LIST:
 	cmp	w1, w0
 	bcs	.L95
 	ldp	x29, x30, [sp], 16
-	mov	w2, 214
+	mov	w2, 207
 	adrp	x1, .LANCHOR49
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR49
@@ -831,7 +831,7 @@ List_remove_node:
 	beq	.L99
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
-	mov	w2, 379
+	mov	w2, 372
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1022,7 +1022,7 @@ List_update_data_list:
 	bne	.L128
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 470
+	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1059,7 +1059,7 @@ List_update_data_list:
 	cbnz	w0, .L131
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 481
+	mov	w2, 474
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1115,7 +1115,7 @@ select_l2p_ram_region:
 	bne	.L144
 	cmp	w19, w1
 	bcc	.L137
-	mov	w2, 784
+	mov	w2, 787
 	adrp	x1, .LANCHOR57
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
@@ -1345,7 +1345,7 @@ make_superblock:
 	bcc	.L173
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2097
+	mov	w2, 2110
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
@@ -1364,11 +1364,10 @@ make_superblock:
 	bhi	.L176
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
+	strb	wzr, [x19, 9]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	mov	w0, 1
-	strb	w0, [x19, 9]
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -1530,8 +1529,9 @@ GetFreeBlockMaxEraseCount:
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
 	stp	x29, x30, [sp, -96]!
-	adrp	x1, .LC2
-	add	x1, x1, :lo12:.LC2
+	mov	x1, 64
+	adrp	x2, .LC2
+	add	x2, x2, :lo12:.LC2
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR37
@@ -1542,444 +1542,508 @@ FtlPrintInfo2buf:
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR39
 	str	x27, [sp, 80]
-	bl	sprintf
+	bl	snprintf
 	add	x20, x21, x0, sxtw
 	adrp	x0, .LANCHOR26
-	adrp	x1, .LC3
-	add	x1, x1, :lo12:.LC3
-	ldr	w2, [x0, #:lo12:.LANCHOR26]
+	mov	x1, 64
+	adrp	x2, .LC3
+	ldr	w3, [x0, #:lo12:.LANCHOR26]
+	add	x2, x2, :lo12:.LC3
 	mov	x0, x20
 	add	x22, x22, :lo12:.LANCHOR39
 	adrp	x24, .LANCHOR51
-	adrp	x25, .LANCHOR80
-	bl	sprintf
+	adrp	x25, .LANCHOR81
+	add	x25, x25, :lo12:.LANCHOR81
+	bl	snprintf
 	add	x20, x20, x0, sxtw
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC4
-	add	x1, x1, :lo12:.LC4
-	bl	sprintf
+	adrp	x2, .LC4
+	add	x2, x2, :lo12:.LC4
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR61
-	adrp	x1, .LC5
-	add	x1, x1, :lo12:.LC5
-	ldr	w2, [x0, #:lo12:.LANCHOR61]
+	mov	x1, 64
+	adrp	x2, .LC5
+	add	x2, x2, :lo12:.LC5
+	ldr	w3, [x0, #:lo12:.LANCHOR61]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR59
-	adrp	x1, .LC6
-	add	x1, x1, :lo12:.LC6
-	ldr	w2, [x0, #:lo12:.LANCHOR59]
+	mov	x1, 64
+	adrp	x2, .LC6
+	add	x2, x2, :lo12:.LC6
+	ldr	w3, [x0, #:lo12:.LANCHOR59]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR62
-	adrp	x1, .LC7
-	add	x1, x1, :lo12:.LC7
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	mov	x1, 64
+	adrp	x2, .LC7
+	add	x2, x2, :lo12:.LC7
+	ldr	w3, [x0, #:lo12:.LANCHOR62]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR63
-	adrp	x1, .LC8
-	add	x1, x1, :lo12:.LC8
-	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	mov	x1, 64
+	adrp	x2, .LC8
+	add	x2, x2, :lo12:.LC8
+	ldr	w3, [x0, #:lo12:.LANCHOR63]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR64
-	adrp	x1, .LC9
-	add	x1, x1, :lo12:.LC9
-	ldr	w2, [x0, #:lo12:.LANCHOR64]
+	mov	x1, 64
+	adrp	x2, .LC9
+	add	x2, x2, :lo12:.LC9
+	ldr	w3, [x0, #:lo12:.LANCHOR64]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR65
-	adrp	x1, .LC10
-	add	x1, x1, :lo12:.LC10
-	ldr	w2, [x0, #:lo12:.LANCHOR65]
+	mov	x1, 64
+	adrp	x2, .LC10
+	add	x2, x2, :lo12:.LC10
+	ldr	w3, [x0, #:lo12:.LANCHOR65]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR66
-	adrp	x1, .LC11
-	add	x1, x1, :lo12:.LC11
-	ldr	w2, [x0, #:lo12:.LANCHOR66]
+	mov	x1, 64
+	adrp	x2, .LC11
+	add	x2, x2, :lo12:.LC11
+	ldr	w3, [x0, #:lo12:.LANCHOR66]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR67
-	adrp	x1, .LC12
-	add	x1, x1, :lo12:.LC12
-	ldr	w2, [x0, #:lo12:.LANCHOR67]
+	mov	x1, 64
+	adrp	x2, .LC12
+	add	x2, x2, :lo12:.LC12
+	ldr	w3, [x0, #:lo12:.LANCHOR67]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR68
-	adrp	x1, .LC13
-	add	x1, x1, :lo12:.LC13
-	ldr	w2, [x0, #:lo12:.LANCHOR68]
+	mov	x1, 64
+	adrp	x2, .LC13
+	add	x2, x2, :lo12:.LC13
+	ldr	w3, [x0, #:lo12:.LANCHOR68]
 	mov	x0, x20
-	lsr	w2, w2, 11
-	bl	sprintf
+	lsr	w3, w3, 11
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR69
-	adrp	x1, .LC14
-	add	x1, x1, :lo12:.LC14
-	ldr	w2, [x0, #:lo12:.LANCHOR69]
+	mov	x1, 64
+	adrp	x2, .LC14
+	ldr	w3, [x0, #:lo12:.LANCHOR69]
+	add	x2, x2, :lo12:.LC14
 	mov	x0, x20
-	lsr	w2, w2, 11
-	bl	sprintf
+	lsr	w3, w3, 11
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR70
-	adrp	x1, .LC15
-	add	x1, x1, :lo12:.LC15
-	ldr	w2, [x0, #:lo12:.LANCHOR70]
+	mov	x1, 64
+	adrp	x2, .LC15
+	ldr	w3, [x0, #:lo12:.LANCHOR70]
+	add	x2, x2, :lo12:.LC15
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR71
-	adrp	x1, .LC16
-	add	x1, x1, :lo12:.LC16
-	ldr	w2, [x0, #:lo12:.LANCHOR71]
+	mov	x1, 64
+	adrp	x2, .LC16
+	add	x2, x2, :lo12:.LC16
+	ldr	w3, [x0, #:lo12:.LANCHOR71]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	add	x0, x19, :lo12:.LANCHOR37
-	adrp	x1, .LC17
-	add	x1, x1, :lo12:.LC17
-	ldrh	w2, [x0, 6]
+	mov	x1, 64
+	adrp	x2, .LC17
+	add	x2, x2, :lo12:.LC17
+	ldrh	w3, [x0, 6]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	ldrh	w3, [x23, #:lo12:.LANCHOR48]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC18
-	add	x1, x1, :lo12:.LC18
-	bl	sprintf
+	adrp	x2, .LC18
+	add	x2, x2, :lo12:.LC18
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR72
-	adrp	x1, .LC19
-	add	x1, x1, :lo12:.LC19
-	ldr	w2, [x0, #:lo12:.LANCHOR72]
+	mov	x1, 64
+	adrp	x2, .LC19
+	add	x2, x2, :lo12:.LC19
+	ldr	w3, [x0, #:lo12:.LANCHOR72]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR73
-	adrp	x1, .LC20
-	add	x1, x1, :lo12:.LC20
-	ldr	w2, [x0, #:lo12:.LANCHOR73]
+	mov	x1, 64
+	adrp	x2, .LC20
+	add	x2, x2, :lo12:.LC20
+	ldr	w3, [x0, #:lo12:.LANCHOR73]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR74
-	adrp	x1, .LC21
-	add	x1, x1, :lo12:.LC21
-	ldr	w2, [x0, #:lo12:.LANCHOR74]
+	mov	x1, 64
+	adrp	x2, .LC21
+	add	x2, x2, :lo12:.LC21
+	ldr	w3, [x0, #:lo12:.LANCHOR74]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR75
-	adrp	x1, .LC22
-	add	x1, x1, :lo12:.LC22
-	ldr	w2, [x0, #:lo12:.LANCHOR75]
+	mov	x1, 64
+	adrp	x2, .LC22
+	add	x2, x2, :lo12:.LC22
+	ldr	w3, [x0, #:lo12:.LANCHOR75]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR76
-	adrp	x1, .LC23
-	add	x1, x1, :lo12:.LC23
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	mov	x1, 64
+	adrp	x2, .LC23
+	add	x2, x2, :lo12:.LC23
+	ldr	w3, [x0, #:lo12:.LANCHOR76]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR77
-	adrp	x1, .LC24
-	add	x1, x1, :lo12:.LC24
-	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	mov	x1, 64
+	adrp	x2, .LC24
+	add	x2, x2, :lo12:.LC24
+	ldr	w3, [x0, #:lo12:.LANCHOR77]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x22, 30]
+	ldrh	w3, [x22, 30]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC25
-	add	x1, x1, :lo12:.LC25
-	bl	sprintf
+	adrp	x2, .LC25
+	add	x2, x2, :lo12:.LC25
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x22, 28]
+	ldrh	w3, [x22, 28]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC26
-	add	x1, x1, :lo12:.LC26
+	adrp	x2, .LC26
+	add	x2, x2, :lo12:.LC26
 	adrp	x22, .LANCHOR42
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR34
-	adrp	x1, .LC27
-	add	x1, x1, :lo12:.LC27
-	ldr	w2, [x0, #:lo12:.LANCHOR34]
+	mov	x1, 64
+	adrp	x2, .LC27
+	add	x2, x2, :lo12:.LC27
+	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR31
-	adrp	x1, .LC28
-	add	x1, x1, :lo12:.LC28
-	ldr	w2, [x0, #:lo12:.LANCHOR31]
+	mov	x1, 64
+	adrp	x2, .LC28
+	add	x2, x2, :lo12:.LC28
+	ldr	w3, [x0, #:lo12:.LANCHOR31]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR2
-	adrp	x1, .LC29
-	add	x1, x1, :lo12:.LC29
-	ldr	w2, [x0, #:lo12:.LANCHOR2]
+	mov	x1, 64
+	adrp	x2, .LC29
+	add	x2, x2, :lo12:.LC29
+	ldr	w3, [x0, #:lo12:.LANCHOR2]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR38+6
-	adrp	x1, .LC30
-	add	x1, x1, :lo12:.LC30
-	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
+	mov	x1, 64
+	adrp	x2, .LC30
+	add	x2, x2, :lo12:.LC30
+	ldrh	w3, [x0, #:lo12:.LANCHOR38+6]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR5
-	adrp	x1, .LC31
-	add	x1, x1, :lo12:.LC31
-	ldrh	w2, [x0, #:lo12:.LANCHOR5]
+	mov	x1, 64
+	adrp	x2, .LC31
+	add	x2, x2, :lo12:.LC31
+	ldrh	w3, [x0, #:lo12:.LANCHOR5]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR78
-	adrp	x1, .LC32
-	add	x1, x1, :lo12:.LC32
-	ldrh	w2, [x0, #:lo12:.LANCHOR78]
+	mov	x1, 64
+	adrp	x2, .LC32
+	add	x2, x2, :lo12:.LC32
+	ldrh	w3, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR7
-	adrp	x1, .LC33
-	add	x1, x1, :lo12:.LC33
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	mov	x1, 64
+	adrp	x2, .LC33
+	add	x2, x2, :lo12:.LC33
+	ldr	w3, [x0, #:lo12:.LANCHOR7]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	adrp	x0, .LANCHOR79
-	adrp	x1, .LC34
-	add	x1, x1, :lo12:.LC34
-	ldrh	w2, [x0, #:lo12:.LANCHOR79]
+	mov	x1, 64
+	adrp	x2, .LC34
+	add	x2, x2, :lo12:.LC34
+	ldrh	w3, [x0, #:lo12:.LANCHOR79]
 	mov	x0, x20
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, #:lo12:.LANCHOR37]
+	ldrh	w3, [x19, #:lo12:.LANCHOR37]
 	add	x19, x24, :lo12:.LANCHOR51
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC35
-	add	x1, x1, :lo12:.LC35
-	bl	sprintf
+	adrp	x2, .LC35
+	add	x2, x2, :lo12:.LC35
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC36
-	add	x1, x1, :lo12:.LC36
-	bl	sprintf
+	adrp	x2, .LC36
+	add	x2, x2, :lo12:.LC36
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC37
-	add	x1, x1, :lo12:.LC37
-	bl	sprintf
+	adrp	x2, .LC37
+	add	x2, x2, :lo12:.LC37
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x24, #:lo12:.LANCHOR51]
+	ldrh	w3, [x24, #:lo12:.LANCHOR51]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC38
-	add	x1, x1, :lo12:.LC38
-	bl	sprintf
+	adrp	x2, .LC38
+	add	x2, x2, :lo12:.LC38
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC39
-	add	x1, x1, :lo12:.LC39
-	bl	sprintf
+	adrp	x2, .LC39
+	add	x2, x2, :lo12:.LC39
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
+	ldrh	w3, [x19, 4]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC40
-	add	x1, x1, :lo12:.LC40
-	bl	sprintf
+	adrp	x2, .LC40
+	add	x2, x2, :lo12:.LC40
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	ldrh	w1, [x24, #:lo12:.LANCHOR51]
 	adrp	x24, .LANCHOR52
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	add	x19, x24, :lo12:.LANCHOR52
-	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x2, .LC41
+	add	x2, x2, :lo12:.LC41
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC41
-	add	x1, x1, :lo12:.LC41
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC42
-	add	x1, x1, :lo12:.LC42
-	bl	sprintf
+	adrp	x2, .LC42
+	add	x2, x2, :lo12:.LC42
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC43
-	add	x1, x1, :lo12:.LC43
-	bl	sprintf
+	adrp	x2, .LC43
+	add	x2, x2, :lo12:.LC43
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x24, #:lo12:.LANCHOR52]
+	ldrh	w3, [x24, #:lo12:.LANCHOR52]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC44
-	add	x1, x1, :lo12:.LC44
-	bl	sprintf
+	adrp	x2, .LC44
+	add	x2, x2, :lo12:.LC44
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC45
-	add	x1, x1, :lo12:.LC45
-	bl	sprintf
+	adrp	x2, .LC45
+	add	x2, x2, :lo12:.LC45
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
+	ldrh	w3, [x19, 4]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC46
-	add	x1, x1, :lo12:.LC46
-	bl	sprintf
+	adrp	x2, .LC46
+	add	x2, x2, :lo12:.LC46
+	bl	snprintf
 	add	x20, x20, x0, sxtw
 	ldrh	w1, [x24, #:lo12:.LANCHOR52]
 	adrp	x24, .LANCHOR53
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	add	x19, x24, :lo12:.LANCHOR53
-	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x2, .LC47
+	add	x2, x2, :lo12:.LC47
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC47
-	add	x1, x1, :lo12:.LC47
-	bl	sprintf
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC48
-	add	x1, x1, :lo12:.LC48
-	bl	sprintf
+	adrp	x2, .LC48
+	add	x2, x2, :lo12:.LC48
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC49
-	add	x1, x1, :lo12:.LC49
-	bl	sprintf
+	adrp	x2, .LC49
+	add	x2, x2, :lo12:.LC49
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x24, #:lo12:.LANCHOR53]
+	ldrh	w3, [x24, #:lo12:.LANCHOR53]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC50
-	add	x1, x1, :lo12:.LC50
-	adrp	x24, .LANCHOR81
-	add	x24, x24, :lo12:.LANCHOR81
-	bl	sprintf
+	adrp	x2, .LC50
+	add	x2, x2, :lo12:.LC50
+	adrp	x24, .LANCHOR80
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC51
-	add	x1, x1, :lo12:.LC51
-	bl	sprintf
+	adrp	x2, .LC51
+	add	x2, x2, :lo12:.LC51
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
-	add	x19, x25, :lo12:.LANCHOR80
+	ldrh	w3, [x19, 4]
+	add	x19, x24, :lo12:.LANCHOR80
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC52
-	add	x1, x1, :lo12:.LC52
-	bl	sprintf
+	adrp	x2, .LC52
+	add	x2, x2, :lo12:.LC52
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 2]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC53
-	add	x1, x1, :lo12:.LC53
-	bl	sprintf
+	adrp	x2, .LC53
+	add	x2, x2, :lo12:.LC53
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 6]
+	ldrb	w3, [x19, 6]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC54
-	add	x1, x1, :lo12:.LC54
-	bl	sprintf
+	adrp	x2, .LC54
+	add	x2, x2, :lo12:.LC54
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	ldrh	w3, [x24, #:lo12:.LANCHOR80]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC55
-	add	x1, x1, :lo12:.LC55
-	bl	sprintf
+	adrp	x2, .LC55
+	add	x2, x2, :lo12:.LC55
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrb	w2, [x19, 8]
+	ldrb	w3, [x19, 8]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC56
-	add	x1, x1, :lo12:.LC56
-	bl	sprintf
+	adrp	x2, .LC56
+	add	x2, x2, :lo12:.LC56
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldrh	w2, [x19, 4]
+	ldrh	w3, [x19, 4]
+	mov	x1, 64
 	mov	x0, x20
-	adrp	x1, .LC57
-	add	x1, x1, :lo12:.LC57
-	bl	sprintf
+	adrp	x2, .LC57
+	add	x2, x2, :lo12:.LC57
+	bl	snprintf
 	add	x20, x20, x0, sxtw
-	ldp	w4, w2, [x24, 76]
-	adrp	x1, .LC58
-	ldr	w3, [x24, 84]
-	add	x1, x1, :lo12:.LC58
+	ldp	w5, w3, [x25, 76]
+	mov	x1, 64
+	ldr	w4, [x25, 84]
+	adrp	x2, .LC58
 	mov	x0, x20
-	bl	sprintf
+	add	x2, x2, :lo12:.LC58
+	bl	snprintf
 	add	x19, x20, x0, sxtw
-	ldr	w2, [x24, 72]
+	ldr	w3, [x25, 72]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC59
-	add	x1, x1, :lo12:.LC59
-	bl	sprintf
+	adrp	x2, .LC59
+	add	x2, x2, :lo12:.LC59
+	bl	snprintf
 	add	x19, x19, x0, sxtw
-	ldr	w2, [x24, 96]
+	ldr	w3, [x25, 96]
+	mov	x1, 64
 	mov	x0, x19
-	adrp	x1, .LC60
-	add	x1, x1, :lo12:.LC60
-	bl	sprintf
+	adrp	x2, .LC60
+	add	x2, x2, :lo12:.LC60
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR82
-	adrp	x1, .LC61
-	add	x1, x1, :lo12:.LC61
-	ldrh	w2, [x0, #:lo12:.LANCHOR82]
+	mov	x1, 64
+	adrp	x2, .LC61
+	add	x2, x2, :lo12:.LC61
+	ldrh	w3, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR83
-	adrp	x1, .LC62
-	add	x1, x1, :lo12:.LC62
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	mov	x1, 64
+	adrp	x2, .LC62
+	add	x2, x2, :lo12:.LC62
+	ldrh	w3, [x0, #:lo12:.LANCHOR83]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR84
-	adrp	x1, .LC63
-	add	x1, x1, :lo12:.LC63
-	ldr	w2, [x0, #:lo12:.LANCHOR84]
+	mov	x1, 64
+	adrp	x2, .LC63
+	add	x2, x2, :lo12:.LC63
+	ldr	w3, [x0, #:lo12:.LANCHOR84]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR85
-	adrp	x1, .LC64
-	add	x1, x1, :lo12:.LC64
-	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	adrp	x2, .LC64
+	add	x2, x2, :lo12:.LC64
+	mov	x1, 64
+	ldrh	w3, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	bl	GetFreeBlockMinEraseCount
-	and	w2, w0, 65535
-	adrp	x1, .LC65
+	and	w3, w0, 65535
+	mov	x1, 64
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC65
-	bl	sprintf
+	adrp	x2, .LC65
+	add	x2, x2, :lo12:.LC65
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	bl	GetFreeBlockMaxEraseCount
-	and	w2, w0, 65535
-	adrp	x1, .LC66
+	and	w3, w0, 65535
+	adrp	x2, .LC66
 	mov	x0, x19
-	add	x1, x1, :lo12:.LC66
-	bl	sprintf
+	add	x2, x2, :lo12:.LC66
+	mov	x1, 64
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
@@ -1995,87 +2059,90 @@ FtlPrintInfo2buf:
 	ldp	x29, x30, [sp], 96
 	ret
 .L203:
-	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	ldrh	w0, [x24, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L205
 	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
-	ldrh	w2, [x1, x0]
+	adrp	x2, .LC67
+	add	x2, x2, :lo12:.LC67
+	ldrh	w3, [x1, x0]
 	mov	x0, x19
-	adrp	x1, .LC67
-	add	x1, x1, :lo12:.LC67
-	bl	sprintf
+	mov	x1, 64
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 .L205:
 	mov	w0, 0
 	adrp	x24, .LC68
 	bl	List_get_gc_head_node
 	add	x24, x24, :lo12:.LC68
-	and	w3, w0, 65535
+	and	w4, w0, 65535
 	mov	w23, 0
 	mov	w27, 65535
 	adrp	x20, .LANCHOR40
 	mov	w26, 6
 .L207:
-	cmp	w3, w27
+	cmp	w4, w27
 	beq	.L206
 	adrp	x0, .LANCHOR43
-	umull	x25, w3, w26
+	umull	x25, w4, w26
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	ubfiz	x1, x3, 1, 16
-	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	ubfiz	x1, x4, 1, 16
+	ldr	x3, [x0, #:lo12:.LANCHOR43]
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	add	x0, x0, x25
-	ldrh	w6, [x4, x1]
-	ldrh	w4, [x2, x1]
-	mov	w2, w23
-	ldrh	w5, [x0, 4]
-	mov	x1, x24
+	ldrh	w5, [x2, x1]
+	ldrh	w7, [x3, x1]
+	mov	x2, x24
+	mov	w3, w23
+	mov	x1, 64
+	ldrh	w6, [x0, 4]
 	mov	x0, x19
 	add	w23, w23, 1
-	bl	sprintf
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	cmp	w23, 16
-	ldrh	w3, [x0, x25]
+	ldrh	w4, [x0, x25]
 	bne	.L207
 .L206:
 	adrp	x0, .LANCHOR47
 	adrp	x23, .LC69
 	add	x23, x23, :lo12:.LC69
 	mov	w22, 0
-	ldr	x3, [x0, #:lo12:.LANCHOR47]
+	ldr	x4, [x0, #:lo12:.LANCHOR47]
 	mov	w25, 65535
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	mov	w26, 6
 	adrp	x27, .LANCHOR43
-	sub	x3, x3, x0
+	sub	x4, x4, x0
 	mov	x0, -6148914691236517206
-	asr	x3, x3, 1
+	asr	x4, x4, 1
 	movk	x0, 0xaaab, lsl 0
-	mul	x3, x3, x0
-	and	w3, w3, 65535
+	mul	x4, x4, x0
+	and	w4, w4, 65535
 .L209:
-	cmp	w3, w25
+	cmp	w4, w25
 	beq	.L208
-	umull	x24, w3, w26
+	umull	x24, w4, w26
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldr	x2, [x27, #:lo12:.LANCHOR43]
-	ubfiz	x1, x3, 1, 16
+	ubfiz	x1, x4, 1, 16
 	add	x0, x0, x24
-	ldrh	w5, [x2, x1]
-	mov	w2, w22
-	ldrh	w4, [x0, 4]
-	mov	x1, x23
-	mov	x0, x19
+	mov	w3, w22
 	add	w22, w22, 1
-	bl	sprintf
+	ldrh	w6, [x2, x1]
+	mov	x2, x23
+	ldrh	w5, [x0, 4]
+	mov	x1, 64
+	mov	x0, x19
+	bl	snprintf
 	add	x19, x19, x0, sxtw
 	cmp	w22, 4
 	beq	.L208
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	ldrh	w3, [x0, x24]
+	ldrh	w4, [x0, x24]
 	b	.L209
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.section	.text.rknand_proc_ftlread,"ax",@progbits
@@ -2083,15 +2150,19 @@ FtlPrintInfo2buf:
 	.global	rknand_proc_ftlread
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
+	cmp	w0, 2047
+	ble	.L217
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LC70
-	adrp	x1, .LC71
-	add	x2, x2, :lo12:.LC70
+	adrp	x3, .LC70
+	adrp	x2, .LC71
+	add	x3, x3, :lo12:.LC70
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LC71
+	add	x2, x2, :lo12:.LC71
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	bl	sprintf
+	mov	x20, x1
+	mov	x1, 64
+	mov	x0, x20
+	bl	snprintf
 	add	x19, x20, x0, sxtw
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
@@ -2100,6 +2171,9 @@ rknand_proc_ftlread:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
+.L217:
+	mov	w0, 0
+	ret
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.section	.text.GetSwlReplaceBlock,"ax",@progbits
 	.align	2
@@ -2114,7 +2188,7 @@ GetSwlReplaceBlock:
 	ldr	w3, [x2, #:lo12:.LANCHOR74]
 	ldr	w7, [x8, #:lo12:.LANCHOR77]
 	cmp	w3, w7
-	bcs	.L218
+	bcs	.L223
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR72
 	mov	w5, 0
@@ -2124,12 +2198,12 @@ GetSwlReplaceBlock:
 	str	wzr, [x0, #:lo12:.LANCHOR72]
 	ldr	x6, [x1, #:lo12:.LANCHOR43]
 	mov	x1, 0
-.L219:
+.L224:
 	cmp	w3, w1
-	bhi	.L220
-	cbz	w5, .L221
+	bhi	.L225
+	cbz	w5, .L226
 	str	w4, [x0, #:lo12:.LANCHOR72]
-.L221:
+.L226:
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	udiv	w3, w1, w3
 	str	w3, [x2, #:lo12:.LANCHOR74]
@@ -2140,34 +2214,34 @@ GetSwlReplaceBlock:
 	ldrh	w3, [x3, #:lo12:.LANCHOR14]
 	udiv	w1, w1, w3
 	str	w1, [x0, #:lo12:.LANCHOR72]
-.L222:
+.L227:
 	ldr	w10, [x2, #:lo12:.LANCHOR74]
 	add	w0, w7, 256
 	cmp	w0, w10
-	bls	.L227
+	bls	.L232
 	adrp	x1, .LANCHOR76
 	add	w0, w7, 768
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	cmp	w0, w1
-	bls	.L227
-.L229:
+	bls	.L232
+.L234:
 	mov	w19, 65535
-.L228:
+.L233:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L220:
+.L225:
 	ldrh	w5, [x6, x1, lsl 1]
 	add	x1, x1, 1
 	add	w4, w4, w5
 	mov	w5, 1
-	b	.L219
-.L218:
+	b	.L224
+.L223:
 	adrp	x1, .LANCHOR76
 	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	cmp	w3, w0
-	bls	.L222
+	bls	.L227
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR43
@@ -2175,17 +2249,17 @@ GetSwlReplaceBlock:
 	add	x1, x1, :lo12:.LANCHOR5
 	ldr	x4, [x0, #:lo12:.LANCHOR43]
 	mov	w0, 0
-.L224:
+.L229:
 	ldrh	w3, [x1]
 	cmp	w0, w3
-	bcs	.L222
+	bcs	.L227
 	ubfiz	x5, x0, 1, 32
 	add	w0, w0, 1
 	ldrh	w3, [x4, x5]
 	add	w3, w3, 1
 	strh	w3, [x4, x5]
-	b	.L224
-.L227:
+	b	.L229
+.L232:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w0, lsl 1
@@ -2194,10 +2268,10 @@ GetSwlReplaceBlock:
 	and	w6, w0, 65535
 	add	w0, w7, 64
 	cmp	w6, w0
-	bcc	.L229
+	bcc	.L234
 	adrp	x0, .LANCHOR41
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L229
+	cbz	x0, .L234
 	adrp	x1, .LANCHOR5
 	mov	w3, 65535
 	mov	x14, -6148914691236517206
@@ -2211,38 +2285,38 @@ GetSwlReplaceBlock:
 	mov	w15, 6
 	ldr	x4, [x1, #:lo12:.LANCHOR43]
 	mov	w1, 0
-.L230:
+.L235:
 	ldrh	w5, [x0]
 	cmp	w5, w12
-	bne	.L233
+	bne	.L238
 	mov	w19, w2
-.L232:
+.L237:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L229
+	beq	.L234
 	ubfiz	x2, x19, 1, 32
 	ldrh	w5, [x4, x2]
 	cmp	w7, w5
-	bcs	.L234
+	bcs	.L239
 	bl	GetFreeBlockMinEraseCount
 	cmp	w7, w0, uxth
-	bcs	.L234
+	bcs	.L239
 	str	w3, [x8, #:lo12:.LANCHOR77]
-.L234:
+.L239:
 	cmp	w10, w5
-	bls	.L229
+	bls	.L234
 	add	w0, w5, 128
 	cmp	w6, w0
-	ble	.L229
+	ble	.L234
 	add	w0, w5, 256
 	adrp	x1, .LANCHOR76
 	cmp	w10, w0
-	bhi	.L235
+	bhi	.L240
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	add	w0, w5, 768
 	cmp	w0, w3
-	bcs	.L229
-.L235:
+	bcs	.L234
+.L240:
 	adrp	x0, .LANCHOR42
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	mov	w1, w19
@@ -2255,14 +2329,14 @@ GetSwlReplaceBlock:
 	adrp	x0, .LANCHOR87
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR87]
-	b	.L228
-.L233:
+	b	.L233
+.L238:
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	cmp	w1, w13
-	bhi	.L229
+	bhi	.L234
 	ldrh	w16, [x0, 4]
-	cbz	w16, .L231
+	cbz	w16, .L236
 	sub	x0, x0, x11
 	asr	x0, x0, 1
 	mul	x0, x0, x14
@@ -2270,14 +2344,14 @@ GetSwlReplaceBlock:
 	and	x0, x0, 65535
 	ldrh	w0, [x4, x0, lsl 1]
 	cmp	w7, w0
-	bcs	.L232
+	bcs	.L237
 	cmp	w3, w0
-	bls	.L231
+	bls	.L236
 	mov	w3, w0
 	mov	w2, w19
-.L231:
+.L236:
 	umaddl	x0, w5, w15, x11
-	b	.L230
+	b	.L235
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.section	.text.free_data_superblock,"ax",@progbits
 	.align	2
@@ -2287,7 +2361,7 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L249
+	beq	.L254
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
@@ -2298,7 +2372,7 @@ free_data_superblock:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L249:
+.L254:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -2315,35 +2389,35 @@ get_new_active_ppa:
 	mov	w0, 65535
 	str	x21, [sp, 32]
 	cmp	w1, w0
-	bne	.L253
+	bne	.L258
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2710
+	mov	w2, 2740
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L253:
+.L258:
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L254
+	bne	.L259
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2711
+	mov	w2, 2741
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L254:
+.L259:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L255
+	cbnz	w0, .L260
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2712
+	mov	w2, 2742
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L255:
+.L260:
 	ldrb	w0, [x19, 6]
 	adrp	x1, .LANCHOR3
 	strb	wzr, [x19, 10]
@@ -2351,9 +2425,9 @@ get_new_active_ppa:
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
 	mov	w1, 65535
 	ldrh	w0, [x19, x0, lsl 1]
-.L256:
+.L261:
 	cmp	w0, w1
-	beq	.L258
+	beq	.L263
 	ldrh	w21, [x19, 2]
 	mov	w3, 65535
 	ldrh	w1, [x19, 4]
@@ -2362,54 +2436,54 @@ get_new_active_ppa:
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L260:
+.L265:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w2, w0
-	bne	.L259
+	bne	.L264
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L259:
+.L264:
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L260
+	beq	.L265
 	strb	w0, [x19, 6]
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
-	bne	.L252
-	cbz	w1, .L252
+	bne	.L257
+	cbz	w1, .L257
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2733
+	mov	w2, 2763
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L252:
+.L257:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L258:
+.L263:
 	ldrb	w0, [x19, 6]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w0, w2
-	bne	.L257
+	bne	.L262
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L257:
+.L262:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L256
+	b	.L261
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
@@ -2440,21 +2514,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L268:
+.L273:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L269
+	bne	.L274
 	adrp	x1, .LANCHOR94
 	ldr	x7, [x7, #:lo12:.LANCHOR91]
 	ldr	x6, [x6, #:lo12:.LANCHOR92]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR94]
-.L270:
+.L275:
 	cmp	w0, w4
-	bcc	.L271
+	bcc	.L276
 	ret
-.L269:
+.L274:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -2466,8 +2540,8 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L268
-.L271:
+	b	.L273
+.L276:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -2481,7 +2555,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L270
+	b	.L275
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -2494,31 +2568,31 @@ FtlGcBufFree:
 	ldr	w7, [x2, #:lo12:.LANCHOR94]
 	adrp	x2, .LANCHOR90
 	ldr	x5, [x2, #:lo12:.LANCHOR90]
-.L273:
+.L278:
 	cmp	w3, w1
-	bcs	.L272
+	bcs	.L277
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L278
-.L274:
+	b	.L283
+.L279:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L278:
+.L283:
 	cmp	w2, w7
-	bcs	.L275
+	bcs	.L280
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L274
+	bne	.L279
 	str	wzr, [x10, 16]
-.L275:
+.L280:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L273
-.L272:
+	b	.L278
+.L277:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -2533,31 +2607,31 @@ FtlGcBufAlloc:
 	ldr	w5, [x2, #:lo12:.LANCHOR94]
 	adrp	x2, .LANCHOR90
 	ldr	x6, [x2, #:lo12:.LANCHOR90]
-.L280:
+.L285:
 	cmp	w3, w1
-	bcs	.L279
+	bcs	.L284
 	mov	w2, 0
-	b	.L285
-.L281:
+	b	.L290
+.L286:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L285:
+.L290:
 	cmp	w2, w5
-	bcs	.L282
+	bcs	.L287
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L281
+	cbnz	w10, .L286
 	ubfiz	x2, x3, 5, 16
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L282:
+.L287:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L280
-.L279:
+	b	.L285
+.L284:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -2571,17 +2645,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR96
 	ldr	x3, [x1, #:lo12:.LANCHOR96]
 	mov	x1, 0
-.L287:
+.L292:
 	cmp	w2, w1, uxth
-	bhi	.L289
+	bhi	.L294
 	mov	w0, 0
 	ret
-.L289:
+.L294:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L287
+	bne	.L292
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -2603,24 +2677,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR95]
 	ldr	x5, [x2, #:lo12:.LANCHOR96]
-.L292:
+.L297:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L294
-	bne	.L293
+	bcc	.L299
+	bne	.L298
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR95]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR95]
-	b	.L293
-.L294:
+	b	.L298
+.L299:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L292
-.L293:
+	bne	.L297
+.L298:
 	adrp	x4, .LANCHOR97
 	adrp	x1, .LANCHOR98
 	mov	w3, 12
@@ -2651,25 +2725,25 @@ FtlGcRefreshBlock:
 	adrp	x3, .LANCHOR99
 	ldrh	w4, [x3, #:lo12:.LANCHOR99]
 	cmp	w19, w4
-	beq	.L297
+	beq	.L302
 	adrp	x0, .LANCHOR100
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w19, w2
-	beq	.L297
+	beq	.L302
 	mov	w1, 65535
 	cmp	w4, w1
-	bne	.L298
+	bne	.L303
 	strh	w19, [x3, #:lo12:.LANCHOR99]
-.L297:
+.L302:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L298:
+.L303:
 	cmp	w2, w1
-	bne	.L297
+	bne	.L302
 	strh	w19, [x0, #:lo12:.LANCHOR100]
-	b	.L297
+	b	.L302
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
@@ -2696,24 +2770,24 @@ FtlGcMarkBadPhyBlk:
 	adrp	x2, .LANCHOR102
 	add	x2, x2, :lo12:.LANCHOR102
 	mov	x1, 0
-.L301:
+.L306:
 	cmp	w0, w1, uxth
-	bhi	.L303
+	bhi	.L308
 	cmp	w0, 15
-	bhi	.L302
+	bhi	.L307
 	add	w1, w0, 1
 	strh	w1, [x19, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR102
 	add	x1, x1, :lo12:.LANCHOR102
 	strh	w20, [x1, w0, sxtw 1]
-	b	.L302
-.L303:
+	b	.L307
+.L308:
 	add	x1, x1, 1
 	add	x3, x2, x1, lsl 1
 	ldrh	w3, [x3, -2]
 	cmp	w3, w20
-	bne	.L301
-.L302:
+	bne	.L306
+.L307:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
@@ -2727,21 +2801,21 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L312
+	cbz	w0, .L317
 	adrp	x1, .LANCHOR99
 	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L312
+	bne	.L317
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR103
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	cmp	w1, w0
-	bcc	.L307
+	bcc	.L312
 	strh	wzr, [x19, #:lo12:.LANCHOR103]
-.L307:
+.L312:
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR102
 	add	x0, x0, :lo12:.LANCHOR102
@@ -2755,7 +2829,7 @@ FtlGcReFreshBadBlk:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L312:
+.L317:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -2799,9 +2873,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x26, .LC76
-.L318:
+.L323:
 	cmp	w27, w19
-	bhi	.L324
+	bhi	.L329
 	ldp	x19, x20, [sp, 16]
 	adrp	x0, .LC78
 	ldp	x21, x22, [sp, 32]
@@ -2811,490 +2885,150 @@ rknand_print_hex:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L324:
-	cbnz	w20, .L319
+.L329:
+	cbnz	w20, .L324
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.L319:
+.L324:
 	cmp	w23, 4
-	bne	.L320
+	bne	.L325
 	ldr	w1, [x22, x19, lsl 2]
-.L327:
+.L332:
 	add	x0, x26, :lo12:.LC76
-.L326:
+.L331:
 	bl	printf
 	add	w20, w20, 1
 	cmp	w20, 15
-	bls	.L323
+	bls	.L328
 	mov	w20, 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L323:
+.L328:
 	add	x19, x19, 1
 	add	w21, w21, w23
-	b	.L318
-.L320:
+	b	.L323
+.L325:
 	cmp	w23, 2
-	bne	.L322
-	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L327
-.L322:
+	bne	.L327
+	ldrh	w1, [x22, x19, lsl 1]
+	b	.L332
+.L327:
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L326
+	b	.L331
 	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashReadPages,"ax",@progbits
+	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
-	.global	FlashReadPages
-	.type	FlashReadPages, %function
-FlashReadPages:
-	stp	x29, x30, [sp, -96]!
-	adrp	x2, .LANCHOR0
-	add	x3, x2, :lo12:.LANCHOR0
-	ubfiz	x1, x1, 5, 32
+	.global	FlashEraseBlocks
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	str	x25, [sp, 64]
-	ldrh	w25, [x3, 12]
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR104
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC1
 	stp	x19, x20, [sp, 16]
-	add	x24, x0, x1
-	mov	x19, x0
-	mov	x23, x2
-	add	x21, x21, :lo12:.LANCHOR104
-	add	x22, x22, :lo12:.LC1
-.L329:
-	cmp	x19, x24
-	bne	.L336
+	mov	x20, x0
+	adrp	x0, .LANCHOR0
+	add	x1, x0, :lo12:.LANCHOR0
+	stp	x23, x24, [sp, 48]
+	add	x19, x20, 4
+	stp	x21, x22, [sp, 32]
+	ubfiz	x21, x2, 5, 32
+	ldrh	w24, [x1, 12]
+	add	x23, x21, 4
+	stp	x25, x26, [sp, 64]
+	add	x23, x20, x23
+	adrp	x25, .LANCHOR105
+	str	x27, [sp, 80]
+	lsl	w26, w24, 3
+	mov	x22, x0
+	add	x27, x25, :lo12:.LANCHOR105
+.L334:
+	cmp	x19, x23
+	beq	.L348
+	ldr	w0, [x19]
+	add	x2, x29, 104
+	add	x1, x29, 108
+	bl	l2p_addr_tran.isra.0
+	ldr	w0, [x29, 104]
+	cbnz	w0, .L335
+	ldr	w1, [x29, 108]
+	cmp	w26, w1
+	bls	.L335
+	mov	x19, x20
+	add	x21, x20, x21
+	adrp	x22, .LC79
+	adrp	x20, .LANCHOR104
+	add	x22, x22, :lo12:.LC79
+	add	x20, x20, :lo12:.LANCHOR104
+	mov	w23, -1
+.L336:
+	cmp	x19, x21
+	bne	.L337
+.L348:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L336:
-	ldr	x0, [x19, 8]
-	cbz	x0, .L330
-	ldr	x0, [x19, 16]
-	cbnz	x0, .L331
-.L330:
-	mov	w2, 96
-	mov	x1, x21
+.L337:
+	ldr	w2, [x29, 108]
+	mov	x1, x20
+	str	w23, [x19]
 	mov	x0, x22
+	add	x19, x19, 32
 	bl	printf
-.L331:
-	ldr	w0, [x19, 4]
-	adrp	x20, .LANCHOR105
-	add	x20, x20, :lo12:.LANCHOR105
-	add	x2, x29, 88
-	add	x1, x29, 92
-	bl	l2p_addr_tran.isra.0
-	ldrb	w0, [x29, 88]
-	ldr	w1, [x29, 92]
-	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x20, 24]
-	blr	x4
-	str	w0, [x19]
-	add	x0, x23, :lo12:.LANCHOR0
+	ldr	x1, [x19, -24]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	ldr	x1, [x19, -16]
+	mov	w3, 4
+	adrp	x0, .LC81
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC81
+	bl	rknand_print_hex
+	b	.L336
+.L335:
+	add	x1, x25, :lo12:.LANCHOR105
+	ldr	x2, [x1, 8]
+	ldr	w1, [x29, 108]
+	blr	x2
+	cbnz	w0, .L338
+	str	wzr, [x19, -4]
+.L339:
+	add	x0, x22, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L333
-	ldrb	w0, [x29, 88]
-	ldr	x4, [x20, 24]
-	ldp	x2, x3, [x19, 8]
-	ldr	w1, [x29, 92]
-	add	x3, x3, 8
-	add	x2, x2, 2048
-	add	w1, w25, w1
-	blr	x4
-	cmn	w0, #1
-	beq	.L334
-	ldr	x0, [x19, 16]
-	ldr	w1, [x0, 12]
-	cmn	w1, #1
-	bne	.L333
-	ldr	w1, [x0, 8]
-	cmn	w1, #1
-	bne	.L333
-	ldr	w0, [x0]
-	cmn	w0, #1
-	beq	.L333
-.L334:
+	bne	.L341
+	ldrb	w0, [x29, 104]
+	ldr	x2, [x27, 8]
+	ldr	w1, [x29, 108]
+	add	w1, w24, w1
+	blr	x2
+	cbz	w0, .L341
 	mov	w0, -1
-	str	w0, [x19]
-.L333:
+	str	w0, [x19, -4]
+.L341:
 	add	x19, x19, 32
-	b	.L329
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
+	b	.L334
+.L338:
+	mov	w0, -1
+	str	w0, [x19, -4]
+	b	.L339
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
-	.global	FtlLoadFactoryBbt
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR107
-	adrp	x0, .LANCHOR106
-	add	x1, x0, :lo12:.LANCHOR106
-	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR107]
-	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR17
-	stp	x27, x28, [sp, 80]
-	add	x28, x26, :lo12:.LANCHOR17
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
-	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR37
-	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR108
-	adrp	x23, .LANCHOR10
-	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR108]
-	add	x23, x23, :lo12:.LANCHOR10
-	mov	w21, 0
-	mov	w27, -1
-	str	x25, [x1, 16]
-.L348:
-	ldrh	w0, [x23]
-	cmp	w21, w0
-	bcc	.L353
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L353:
-	ldrh	w19, [x26, #:lo12:.LANCHOR17]
-	add	x24, x22, :lo12:.LANCHOR106
-	strh	w27, [x20]
-	mov	w3, 61664
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L349:
-	ldrh	w0, [x28]
-	sub	w1, w0, #15
-	cmp	w1, w19
-	bgt	.L351
-	madd	w0, w0, w21, w19
-	mov	w2, 1
-	str	w3, [x29, 108]
-	mov	w1, w2
-	lsl	w0, w0, 10
-	str	w0, [x24, 4]
-	mov	x0, x24
-	bl	FlashReadPages
-	ldr	w0, [x24]
-	ldr	w3, [x29, 108]
-	cmn	w0, #1
-	beq	.L350
-	ldrh	w0, [x25]
-	cmp	w0, w3
-	bne	.L350
-	strh	w19, [x20]
-.L351:
-	add	w21, w21, 1
-	add	x20, x20, 2
-	b	.L348
-.L350:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L349
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
-	.align	2
-	.global	FtlGetLastWrittenPage
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	stp	x29, x30, [sp, -160]!
-	cmp	w1, 1
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	bne	.L359
-	adrp	x1, .LANCHOR20
-	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L360:
-	sub	w19, w19, #1
-	adrp	x1, ftl_temp_buf
-	sxth	w19, w19
-	add	x1, x1, :lo12:ftl_temp_buf
-	lsl	w21, w0, 10
-	str	x1, [x29, 72]
-	orr	w0, w19, w21
-	add	x1, x29, 96
-	str	w0, [x29, 68]
-	mov	w2, w23
-	str	x1, [x29, 80]
-	add	x0, x29, 64
-	mov	w1, 1
-	bl	FlashReadPages
-	ldr	w0, [x29, 96]
-	cmn	w0, #1
-	bne	.L361
-	mov	w22, 0
-	mov	w24, 2
-.L362:
-	cmp	w22, w19
-	ble	.L365
-.L361:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 160
-	ret
-.L359:
-	adrp	x1, .LANCHOR19
-	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L360
-.L365:
-	add	w20, w22, w19
-	mov	w2, w23
-	mov	w1, 1
-	sdiv	w20, w20, w24
-	sxth	w0, w20
-	orr	w0, w0, w21
-	str	w0, [x29, 68]
-	add	x0, x29, 64
-	bl	FlashReadPages
-	ldr	w0, [x29, 96]
-	cmn	w0, #1
-	bne	.L363
-	ldr	w0, [x29, 100]
-	cmn	w0, #1
-	bne	.L363
-	sub	w19, w20, #1
-	sxth	w19, w19
-	b	.L362
-.L363:
-	add	w20, w20, 1
-	sxth	w22, w20
-	b	.L362
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FlashProgPages,"ax",@progbits
-	.align	2
-	.global	FlashProgPages
-	.type	FlashProgPages, %function
-FlashProgPages:
-	stp	x29, x30, [sp, -144]!
-	ubfiz	x1, x1, 5, 32
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w2
-	mov	w26, w3
-	adrp	x2, .LANCHOR0
-	add	x3, x2, :lo12:.LANCHOR0
-	stp	x27, x28, [sp, 80]
-	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	stp	x21, x22, [sp, 32]
-	mov	x19, x0
-	ldrh	w27, [x3, 12]
-	adrp	x21, .LANCHOR109
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR105
-	add	x24, x0, x1
-	mov	x23, x2
-	add	x21, x21, :lo12:.LANCHOR109
-	add	x28, x22, :lo12:.LANCHOR105
-.L368:
-	cmp	x19, x24
-	bne	.L376
-	cbnz	w26, .L377
-.L395:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L376:
-	ldr	x0, [x19, 8]
-	cbz	x0, .L369
-	ldr	x0, [x19, 16]
-	cbnz	x0, .L370
-.L369:
-	adrp	x0, .LC1
-	mov	w2, 126
-	mov	x1, x21
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L370:
-	ldr	w0, [x19, 4]
-	add	x2, x29, 104
-	add	x1, x29, 108
-	bl	l2p_addr_tran.isra.0
-	add	x0, x22, :lo12:.LANCHOR105
-	ldr	w1, [x29, 108]
-	ldp	x2, x3, [x19, 8]
-	ldr	x4, [x0, 16]
-	ldrb	w0, [x29, 104]
-	blr	x4
-	cbnz	w0, .L371
-	str	wzr, [x19]
-.L372:
-	add	x0, x23, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 14]
-	cmp	w0, 4
-	bne	.L374
-	ldrb	w0, [x29, 104]
-	ldr	x4, [x28, 16]
-	ldp	x2, x3, [x19, 8]
-	ldr	w1, [x29, 108]
-	add	x3, x3, 8
-	add	x2, x2, 2048
-	add	w1, w27, w1
-	blr	x4
-	cbz	w0, .L374
-	mov	w0, -1
-	str	w0, [x19]
-.L374:
-	add	x19, x19, 32
-	b	.L368
-.L371:
-	mov	w0, -1
-	str	w0, [x19]
-	b	.L372
-.L381:
-	str	wzr, [x22]
-	mov	w2, w25
-	str	wzr, [x24]
-	mov	w1, 1
-	stp	x22, x24, [x29, 120]
-	ldr	w0, [x20, 4]
-	str	w0, [x29, 116]
-	add	x0, x29, 112
-	bl	FlashReadPages
-	ldr	w26, [x29, 112]
-	cmn	w26, #1
-	bne	.L378
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
-	bl	printf
-	str	w26, [x20]
-.L378:
-	ldr	x0, [x20, 16]
-	cbz	x0, .L379
-	ldr	w3, [x23, #:lo12:.LANCHOR110]
-	ldr	w2, [x0]
-	cmp	w2, w3
-	beq	.L379
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
-	bl	printf
-	mov	w0, -1
-	str	w0, [x20]
-.L379:
-	ldr	x0, [x20, 8]
-	cbz	x0, .L380
-	ldr	w3, [x21, #:lo12:check_buf]
-	ldr	w2, [x0]
-	cmp	w2, w3
-	beq	.L380
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
-	bl	printf
-	mov	w0, -1
-	str	w0, [x20]
-.L380:
-	add	x20, x20, 32
-.L396:
-	cmp	x20, x19
-	bne	.L381
-	b	.L395
-.L377:
-	adrp	x21, check_buf
-	adrp	x23, .LANCHOR110
-	add	x22, x21, :lo12:check_buf
-	add	x24, x23, :lo12:.LANCHOR110
-	b	.L396
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FlashEraseBlocks,"ax",@progbits
-	.align	2
-	.global	FlashEraseBlocks
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR0
-	add	x3, x1, :lo12:.LANCHOR0
-	ubfiz	x2, x2, 5, 32
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	add	x2, x2, 4
-	ldrh	w23, [x3, 12]
-	stp	x19, x20, [sp, 16]
-	add	x19, x0, 4
-	stp	x21, x22, [sp, 32]
-	mov	x20, x1
-	adrp	x21, .LANCHOR105
-	add	x22, x0, x2
-	add	x24, x21, :lo12:.LANCHOR105
-.L399:
-	cmp	x19, x22
-	bne	.L405
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L405:
-	ldr	w0, [x19]
-	add	x2, x29, 72
-	add	x1, x29, 76
-	bl	l2p_addr_tran.isra.0
-	add	x0, x21, :lo12:.LANCHOR105
-	ldr	w1, [x29, 76]
-	ldr	x2, [x0, 8]
-	ldrb	w0, [x29, 72]
-	blr	x2
-	cbnz	w0, .L400
-	str	wzr, [x19, -4]
-.L401:
-	add	x0, x20, :lo12:.LANCHOR0
-	ldrh	w0, [x0, 14]
-	cmp	w0, 4
-	bne	.L403
-	ldrb	w0, [x29, 72]
-	ldr	x2, [x24, 8]
-	ldr	w1, [x29, 76]
-	add	w1, w23, w1
-	blr	x2
-	cbz	w0, .L403
-	mov	w0, -1
-	str	w0, [x19, -4]
-.L403:
-	add	x19, x19, 32
-	b	.L399
-.L400:
-	mov	w0, -1
-	str	w0, [x19, -4]
-	b	.L401
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueIn
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
-	stp	x29, x30, [sp, -48]!
+	.global	FtlFreeSysBlkQueueIn
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
@@ -3302,22 +3036,22 @@ FtlFreeSysBlkQueueIn:
 	sub	w2, w20, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcc	.L410
+	bcc	.L350
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L410
+	beq	.L350
 	and	w1, w1, 65535
-	cbz	w1, .L412
+	cbz	w1, .L352
 	mov	w0, w20
 	bl	P2V_block_in_plane
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR111
+	adrp	x0, .LANCHOR106
 	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
@@ -3331,7 +3065,7 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR75]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR75]
-.L412:
+.L352:
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
@@ -3342,291 +3076,65 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w20, [x2, 8]
-.L410:
+.L350:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
-	.global	FtlLowFormatEraseBlock
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	stp	x29, x30, [sp, -144]!
-	adrp	x7, .LANCHOR13
-	add	x7, x7, :lo12:.LANCHOR13
-	mov	x5, 0
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	adrp	x0, .LANCHOR38
+	add	x1, x0, :lo12:.LANCHOR38
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 65535
-	adrp	x0, .LANCHOR112
+	ldrh	w2, [x1, 6]
 	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	and	w23, w1, 255
-	str	w24, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR114
-	adrp	x1, .LANCHOR113
-	adrp	x20, .LANCHOR3
-	adrp	x21, .LANCHOR111
-	ldr	x11, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR24
-	ldrh	w8, [x20, #:lo12:.LANCHOR3]
-	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	mov	w22, 0
-	ldr	x10, [x1, #:lo12:.LANCHOR113]
-	mov	w19, 0
-	ldrh	w12, [x0, #:lo12:.LANCHOR24]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	stp	x0, x1, [x29, 120]
-.L421:
-	cmp	w8, w5, uxth
-	bhi	.L425
-	cbz	w22, .L420
-	mov	w2, w22
-	ubfiz	x22, x22, 5, 16
-	mov	x25, 0
-	mov	w1, 0
-	mov	x0, x6
-	bl	FlashEraseBlocks
-.L429:
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	add	x1, x0, x25
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	bne	.L428
-	ldr	w0, [x1, 4]
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-.L428:
-	add	x25, x25, 32
-	cmp	x25, x22
-	bne	.L429
-	cbz	w23, .L442
-	adrp	x0, .LANCHOR20
-	mov	w25, 1
-	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-	lsr	w28, w26, 2
-.L430:
-	add	x0, x20, :lo12:.LANCHOR3
-	adrp	x27, .LANCHOR13
-	str	x0, [x29, 136]
-	mov	w22, 0
-	add	x0, x27, :lo12:.LANCHOR13
-	str	x0, [x29, 112]
-.L438:
-	ldr	x0, [x29, 136]
-	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	mov	w20, 0
-	ldrh	w7, [x0]
-	adrp	x0, .LANCHOR115
-	ldr	x8, [x0, #:lo12:.LANCHOR115]
-	ldr	x0, [x29, 128]
-	ldr	x10, [x0, #:lo12:.LANCHOR113]
-	ldr	x0, [x29, 120]
-	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.L431:
-	cmp	w7, w5, uxth
-	bhi	.L434
-	cbz	w20, .L420
-	mov	w1, w20
-	mov	w3, 1
-	mov	w2, w25
-	mov	x0, x6
-	bl	FlashProgPages
-	mov	x27, 0
-	ubfiz	x1, x20, 5, 16
-.L437:
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	add	x3, x0, x27
-	ldr	w0, [x0, x27]
-	cbz	w0, .L436
-	ldr	w0, [x3, 4]
-	add	w19, w19, 1
-	str	x1, [x29, 104]
-	and	w19, w19, 65535
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	ldr	x1, [x29, 104]
-.L436:
-	add	x27, x27, 32
-	cmp	x1, x27
-	bne	.L437
-	add	w22, w22, w28
-	and	w22, w22, 65535
-	cmp	w26, w22
-	bhi	.L438
-	mov	x22, 0
-.L440:
-	cbz	w23, .L439
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	add	x1, x0, x22
-	ldr	w0, [x0, x22]
-	cbnz	w0, .L439
-	ldr	w0, [x1, 4]
-	mov	w1, 1
-	lsr	w0, w0, 10
-	bl	FtlFreeSysBlkQueueIn
-.L439:
-	add	x22, x22, 32
-	cmp	x22, x27
-	bne	.L440
-	cmp	w24, 63
-	ccmp	w23, 0, 0, hi
-	beq	.L420
-	ldr	x0, [x21, #:lo12:.LANCHOR111]
-	mov	w2, w20
-	mov	w1, w25
-	bl	FlashEraseBlocks
-.L420:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L425:
-	lsl	x0, x5, 5
-	mov	w1, w24
-	str	wzr, [x6, x0]
-	ldrb	w0, [x7, x5]
-	bl	V2P_block
-	and	w13, w0, 65535
-	mov	w14, w13
-	cbz	w23, .L422
-	bl	IsBlkInVendorPart
-	cbnz	w0, .L423
-.L422:
-	mov	w0, w14
-	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L424
-	ubfiz	x0, x22, 5, 16
-	mul	w1, w22, w12
-	add	x0, x6, x0
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	lsl	w13, w13, 10
-	asr	w1, w1, 2
-	add	x1, x11, x1, sxtw 2
-	str	w13, [x0, 4]
-	stp	x10, x1, [x0, 8]
-.L423:
-	add	x5, x5, 1
-	b	.L421
-.L424:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L423
-.L442:
-	mov	w25, 0
-	mov	w28, 6
-	mov	w26, 1
-	b	.L430
-.L434:
-	lsl	x0, x5, 5
-	mov	w1, w24
-	str	wzr, [x6, x0]
-	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, x5]
-	bl	V2P_block
-	and	w12, w0, 65535
-	mov	w13, w12
-	cbz	w23, .L432
-	bl	IsBlkInVendorPart
-	cbnz	w0, .L433
-.L432:
-	mov	w0, w13
-	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L433
-	ubfiz	x0, x20, 5, 16
-	mul	w1, w20, w11
-	add	x0, x6, x0
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	add	w12, w22, w12, lsl 10
-	asr	w1, w1, 2
-	add	x1, x10, x1, sxtw 2
-	str	w12, [x0, 4]
-	stp	x8, x1, [x0, 8]
-.L433:
-	add	x5, x5, 1
-	b	.L431
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	stp	x29, x30, [sp, -64]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR38
-	stp	x21, x22, [sp, 32]
-	add	x19, x19, :lo12:.LANCHOR38
-	adrp	x21, .LANCHOR75
-	str	x23, [sp, 48]
-	add	x21, x21, :lo12:.LANCHOR75
-	adrp	x23, .LC83
-	add	x23, x23, :lo12:.LC83
-.L464:
-	ldrh	w1, [x19, 6]
-	cbz	w1, .L465
-	ldrh	w0, [x19, 2]
-	sub	w1, w1, #1
-	strh	w1, [x19, 6]
-	add	x2, x19, x0, sxtw 1
+	mov	x19, x0
+	cbz	w2, .L364
+	ldrh	w0, [x1, 2]
+	sub	w2, w2, #1
+	strh	w2, [x1, 6]
+	mov	w2, 1
+	add	x3, x1, x0, sxtw 1
 	add	w0, w0, 1
 	and	w0, w0, 1023
-	strh	w0, [x19, 2]
-	ldrh	w20, [x2, 8]
-	mov	w0, w20
-	bl	P2V_block_in_plane
-	and	w22, w0, 65535
-	adrp	x0, .LANCHOR111
+	strh	w0, [x1, 2]
+	adrp	x0, .LANCHOR106
+	ldrh	w20, [x3, 8]
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
 	lsl	w1, w20, 10
-	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR43
-	ubfiz	x0, x22, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
-	ldr	w0, [x21]
-	sub	w1, w20, #1
+	adrp	x1, .LANCHOR75
+	ldr	w0, [x1, #:lo12:.LANCHOR75]
 	add	w0, w0, 1
-	str	w0, [x21]
-	mov	w0, 65533
-	cmp	w0, w1, uxth
-	bcc	.L466
-	mov	w0, w20
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L465:
+	str	w0, [x1, #:lo12:.LANCHOR75]
+.L361:
+	sub	w0, w20, #1
+	mov	w1, 65533
+	cmp	w1, w0, uxth
+	bcs	.L362
+	add	x0, x19, :lo12:.LANCHOR38
+	mov	w1, w20
+	ldrh	w2, [x0, 6]
 	adrp	x0, .LC82
-	mov	w1, 0
 	add	x0, x0, :lo12:.LC82
 	bl	printf
-.L468:
-	b	.L468
-.L466:
-	ldrh	w2, [x19, 6]
-	mov	w1, w20
-	mov	x0, x23
-	bl	printf
-	b	.L464
+.L363:
+	b	.L363
+.L364:
+	mov	w20, 65535
+	b	.L361
+.L362:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -3641,27 +3149,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L472:
+.L367:
 	cmp	w20, w1
-	beq	.L476
+	beq	.L371
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L473
+	cbnz	w2, .L368
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L474
+	bcs	.L369
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
-	adrp	x0, .LC84
-	add	x0, x0, :lo12:.LC84
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
 	bl	printf
-.L475:
-	b	.L475
-.L474:
+.L370:
+	b	.L370
+.L369:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3670,26 +3178,26 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L476:
+.L371:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L478
-	adrp	x1, .LANCHOR116
+	bhi	.L373
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC1
-	mov	w2, 581
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 578
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L478:
+.L373:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L473:
+.L368:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L472
+	b	.L367
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
@@ -3723,11 +3231,11 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR64]
 	adrp	x0, .LANCHOR63
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR108
+	adrp	x24, .LANCHOR118
 	str	wzr, [x0, #:lo12:.LANCHOR63]
 	adrp	x0, .LANCHOR65
 	stp	x27, x28, [sp, 80]
-	adrp	x23, .LANCHOR114
+	adrp	x23, .LANCHOR124
 	str	wzr, [x0, #:lo12:.LANCHOR65]
 	adrp	x0, .LANCHOR66
 	adrp	x25, .LANCHOR42
@@ -3746,19 +3254,19 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR76]
 	adrp	x0, .LANCHOR77
 	str	wzr, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR117
-	str	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR108
+	str	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR87
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR118
-	str	w1, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR109
+	str	w1, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR110
 	adrp	x1, .LANCHOR99
-	str	wzr, [x0, #:lo12:.LANCHOR119]
+	str	wzr, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR84
 	str	wzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR112
-	str	wzr, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR111
+	str	wzr, [x0, #:lo12:.LANCHOR111]
 	mov	w0, -1
 	strh	w0, [x1, #:lo12:.LANCHOR99]
 	adrp	x1, .LANCHOR100
@@ -3785,31 +3293,31 @@ FtlMemInit:
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	adrp	x3, .LANCHOR98
-	str	x3, [x29, 104]
+	adrp	x5, .LANCHOR98
+	str	x5, [x29, 104]
 	lsl	w20, w19, 5
 	lsl	w19, w19, 7
-	str	x0, [x3, #:lo12:.LANCHOR98]
+	str	x0, [x5, #:lo12:.LANCHOR98]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x15, .LANCHOR120
+	adrp	x15, .LANCHOR112
 	str	x15, [x29, 112]
-	str	x0, [x15, #:lo12:.LANCHOR120]
+	str	x0, [x15, #:lo12:.LANCHOR112]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x11, .LANCHOR121
+	adrp	x11, .LANCHOR113
 	str	x11, [x29, 120]
-	str	x0, [x11, #:lo12:.LANCHOR121]
+	str	x0, [x11, #:lo12:.LANCHOR113]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x14, .LANCHOR122
+	adrp	x14, .LANCHOR114
 	str	x14, [x29, 128]
-	str	x0, [x14, #:lo12:.LANCHOR122]
+	str	x0, [x14, #:lo12:.LANCHOR114]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x13, .LANCHOR111
+	adrp	x13, .LANCHOR106
 	str	x13, [x29, 136]
-	str	x0, [x13, #:lo12:.LANCHOR111]
+	str	x0, [x13, #:lo12:.LANCHOR106]
 	mov	w0, w20
 	bl	ftl_malloc
 	adrp	x20, .LANCHOR94
@@ -3823,19 +3331,19 @@ FtlMemInit:
 	str	w0, [x20, #:lo12:.LANCHOR94]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x10, .LANCHOR107
+	adrp	x10, .LANCHOR115
 	str	x10, [x29, 152]
-	str	x0, [x10, #:lo12:.LANCHOR107]
+	str	x0, [x10, #:lo12:.LANCHOR115]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x8, .LANCHOR123
+	adrp	x8, .LANCHOR116
 	str	x8, [x29, 160]
-	str	x0, [x8, #:lo12:.LANCHOR123]
+	str	x0, [x8, #:lo12:.LANCHOR116]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x7, .LANCHOR124
+	adrp	x7, .LANCHOR117
 	str	x7, [x29, 168]
-	str	x0, [x7, #:lo12:.LANCHOR124]
+	str	x0, [x7, #:lo12:.LANCHOR117]
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
 	mul	w0, w19, w0
 	bl	ftl_malloc
@@ -3844,31 +3352,45 @@ FtlMemInit:
 	str	x0, [x6, #:lo12:.LANCHOR91]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x5, .LANCHOR115
-	str	x5, [x29, 184]
-	str	x0, [x5, #:lo12:.LANCHOR115]
+	str	x0, [x24, #:lo12:.LANCHOR118]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR24
-	adrp	x4, .LANCHOR113
+	adrp	x4, .LANCHOR119
 	ldr	w2, [x20, #:lo12:.LANCHOR94]
-	str	x4, [x29, 192]
-	str	x0, [x4, #:lo12:.LANCHOR113]
+	str	x4, [x29, 184]
+	str	x0, [x4, #:lo12:.LANCHOR119]
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
+	adrp	x3, .LANCHOR90
+	str	x3, [x29, 192]
+	str	x0, [x3, #:lo12:.LANCHOR90]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x2, .LANCHOR120
+	str	x0, [x2, #:lo12:.LANCHOR120]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x19, .LANCHOR24
+	adrp	x2, .LANCHOR121
+	str	x0, [x2, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR12
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x2, .LANCHOR122
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	adrp	x1, .LANCHOR90
-	str	x0, [x1, #:lo12:.LANCHOR90]
+	str	x0, [x2, #:lo12:.LANCHOR122]
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	adrp	x22, .LANCHOR92
 	mul	w28, w28, w0
 	mov	w0, w28
 	bl	ftl_malloc
-	str	x0, [x24, #:lo12:.LANCHOR108]
+	adrp	x1, .LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR123]
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR114]
+	str	x0, [x23, #:lo12:.LANCHOR124]
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
 	adrp	x28, .LANCHOR125
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
@@ -3987,46 +3509,47 @@ FtlMemInit:
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldp	x3, x15, [x29, 104]
+	ldp	x5, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
 	ldrh	w20, [x20, #:lo12:.LANCHOR137]
 	add	x2, x1, :lo12:.LANCHOR37
 	ldp	x11, x14, [x29, 120]
 	mov	w30, w20
 	ldp	x13, x12, [x29, 136]
-	mov	x16, x3
+	mov	x16, x5
 	ldp	x10, x8, [x29, 152]
-	str	x0, [x2, 32]
+	mov	x5, x24
 	ldp	x7, x6, [x29, 168]
+	str	x0, [x2, 32]
+	ldp	x4, x3, [x29, 184]
 	adrp	x17, .LANCHOR96
-	ldp	x5, x4, [x29, 184]
-	adrp	x3, .LANCHOR90
 	ldrh	w28, [x21, #:lo12:.LANCHOR10]
 	add	x21, x2, 40
+	adrp	x24, .LANCHOR123
 	mov	x0, 1
 	str	x19, [x29, 200]
-.L482:
+.L377:
 	cmp	w0, w28
-	bcc	.L483
+	bcc	.L378
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
 	add	x1, x1, :lo12:.LANCHOR37
 	mov	x19, 0
-.L484:
+.L379:
 	add	x19, x19, 1
 	cmp	x19, x2
-	bne	.L485
+	bne	.L380
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L486
-.L488:
+	cbnz	x0, .L381
+.L383:
 	adrp	x1, .LANCHOR138
-	adrp	x0, .LC85
+	adrp	x0, .LC84
 	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC84
 	bl	printf
 	mov	w0, -1
-.L481:
+.L376:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4034,95 +3557,95 @@ FtlMemInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L483:
+.L378:
 	ldr	x19, [x2, 32]
 	add	w0, w0, 1
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
-	b	.L482
-.L485:
+	b	.L377
+.L380:
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
-	b	.L484
-.L486:
+	b	.L379
+.L381:
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR55
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR40
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x17, #:lo12:.LANCHOR96]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x16, #:lo12:.LANCHOR98]
-	cbz	x0, .L488
-	ldr	x0, [x15, #:lo12:.LANCHOR120]
-	cbz	x0, .L488
-	ldr	x0, [x14, #:lo12:.LANCHOR122]
-	cbz	x0, .L488
-	ldr	x0, [x13, #:lo12:.LANCHOR111]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x15, #:lo12:.LANCHOR112]
+	cbz	x0, .L383
+	ldr	x0, [x14, #:lo12:.LANCHOR114]
+	cbz	x0, .L383
+	ldr	x0, [x13, #:lo12:.LANCHOR106]
+	cbz	x0, .L383
 	ldr	x0, [x12, #:lo12:.LANCHOR93]
-	cbz	x0, .L488
-	ldr	x0, [x11, #:lo12:.LANCHOR121]
-	cbz	x0, .L488
-	ldr	x0, [x10, #:lo12:.LANCHOR107]
-	cbz	x0, .L488
-	ldr	x0, [x8, #:lo12:.LANCHOR123]
-	cbz	x0, .L488
-	ldr	x0, [x7, #:lo12:.LANCHOR124]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x11, #:lo12:.LANCHOR113]
+	cbz	x0, .L383
+	ldr	x0, [x10, #:lo12:.LANCHOR115]
+	cbz	x0, .L383
+	ldr	x0, [x8, #:lo12:.LANCHOR116]
+	cbz	x0, .L383
+	ldr	x0, [x7, #:lo12:.LANCHOR117]
+	cbz	x0, .L383
 	ldr	x0, [x6, #:lo12:.LANCHOR91]
-	cbz	x0, .L488
-	ldr	x0, [x5, #:lo12:.LANCHOR115]
-	cbz	x0, .L488
-	ldr	x0, [x4, #:lo12:.LANCHOR113]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x5, #:lo12:.LANCHOR118]
+	cbz	x0, .L383
+	ldr	x0, [x4, #:lo12:.LANCHOR119]
+	cbz	x0, .L383
 	ldr	x0, [x3, #:lo12:.LANCHOR90]
-	cbz	x0, .L488
-	ldr	x0, [x24, #:lo12:.LANCHOR108]
-	cbz	x0, .L488
-	ldr	x0, [x23, #:lo12:.LANCHOR114]
-	cbz	x0, .L488
+	cbz	x0, .L383
+	ldr	x0, [x24, #:lo12:.LANCHOR123]
+	cbz	x0, .L383
+	ldr	x0, [x23, #:lo12:.LANCHOR124]
+	cbz	x0, .L383
 	ldr	x0, [x22, #:lo12:.LANCHOR92]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	ldr	x0, [x29, 200]
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L488
+	cbz	x0, .L383
 	mov	w0, 0
-	b	.L481
+	b	.L376
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4148,19 +3671,19 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L586:
+.L481:
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L583
+	beq	.L478
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L585
+	bhi	.L480
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L585:
+.L480:
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
@@ -4171,8 +3694,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L586
-.L583:
+	bne	.L481
+.L478:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4215,998 +3738,724 @@ FtlFreeSysBlkQueueInit:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.load_l2p_region,"ax",@progbits
+	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
 	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
+	.global	ftl_free_no_use_map_blk
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
 	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	and	x19, x1, 65535
+	mov	x19, x0
+	ldrh	w2, [x0, 10]
 	stp	x21, x22, [sp, 32]
-	and	w21, w0, 65535
-	stp	x25, x26, [sp, 64]
-	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-	cmp	w0, w21
-	bcs	.L594
-	adrp	x1, .LANCHOR140
-	adrp	x0, .LC1
-	mov	w2, 492
-	add	x1, x1, :lo12:.LANCHOR140
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L594:
-	adrp	x26, .LANCHOR134
-	ubfiz	x0, x21, 2, 16
-	adrp	x22, .LANCHOR55
-	ldr	x1, [x26, #:lo12:.LANCHOR134]
-	ldr	w24, [x1, x0]
-	cbnz	w24, .L595
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
-	adrp	x1, .LANCHOR23
-	add	x0, x0, x19
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w1, 255
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	strh	w21, [x0, x19]
-	str	wzr, [x1, 4]
-.L596:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L595:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	lsl	x19, x19, 4
-	adrp	x20, .LANCHOR106
-	add	x20, x20, :lo12:.LANCHOR106
-	add	x0, x0, x19
-	mov	w2, 1
-	mov	w1, w2
-	str	w24, [x20, 4]
-	ldr	x0, [x0, 8]
-	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	str	x0, [x20, 16]
-	mov	x0, x20
-	bl	FlashReadPages
-	ldr	x25, [x20, 16]
-	ldrh	w0, [x25, 8]
-	cmp	w0, w21
-	beq	.L597
-	mov	w2, w24
-	mov	w1, w21
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
-	bl	printf
-	ldr	x1, [x20, 16]
-	mov	w3, 4
-	adrp	x0, .LC87
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC87
-	bl	rknand_print_hex
-	ldrh	w3, [x23, #:lo12:.LANCHOR32]
-	adrp	x0, .LC88
-	ldr	x1, [x26, #:lo12:.LANCHOR134]
-	mov	w2, 4
-	add	x0, x0, :lo12:.LC88
-	bl	rknand_print_hex
-.L597:
-	ldrh	w0, [x25, 8]
-	cmp	w0, w21
-	beq	.L598
-	adrp	x1, .LANCHOR140
-	adrp	x0, .LC1
-	mov	w2, 513
-	add	x1, x1, :lo12:.LANCHOR140
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L598:
-	ldr	x0, [x22, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	str	wzr, [x1, 4]
-	strh	w21, [x0, x19]
-	b	.L596
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
-	.align	2
-	.global	ftl_free_no_use_map_blk
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	stp	x29, x30, [sp, -80]!
-	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w2, [x0, 10]
-	stp	x21, x22, [sp, 32]
-	ldp	x21, x20, [x0, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	lsl	w2, w2, 1
-	ldr	x23, [x0, 16]
-	mov	x0, x21
+	ldp	x21, x20, [x0, 32]
+	stp	x23, x24, [sp, 48]
+	ldr	x22, [x0, 16]
+	lsl	w2, w2, 1
+	mov	x0, x21
+	str	x25, [sp, 64]
 	bl	ftl_memset
 	mov	w0, 0
-.L601:
+.L489:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L605
-	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR20
-	add	x24, x24, :lo12:.LANCHOR20
-	mov	w25, 0
+	bhi	.L493
+	adrp	x0, .LANCHOR20
+	mov	w23, 0
 	mov	w20, 0
-.L606:
+	ldrh	w1, [x0, #:lo12:.LANCHOR20]
+	ldrh	w0, [x19]
+	strh	w1, [x21, x0, lsl 1]
+	ldrh	w24, [x21]
+.L494:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L610
-	mov	w0, w25
+	bhi	.L498
+	mov	w0, w23
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L605:
+.L493:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L602:
+.L490:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L604
+	bhi	.L492
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L601
-.L604:
+	b	.L489
+.L492:
 	ubfiz	x3, x1, 1, 16
-	ldrh	w4, [x23, x3]
+	ldrh	w4, [x22, x3]
 	cmp	w4, w2
-	bne	.L603
+	bne	.L491
+	cbz	w2, .L491
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L603:
+.L491:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L602
-.L610:
-	ldrh	w0, [x19]
-	uxtw	x22, w20
-	cmp	w0, w20
-	bne	.L607
-	ldrh	w0, [x24]
-	ldrh	w1, [x19, 2]
-	cmp	w1, w0
-	bcs	.L607
-	strh	w0, [x21, x22, lsl 1]
-.L607:
-	lsl	x22, x22, 1
-	ldrh	w0, [x21, x22]
-	cmp	w26, w0
-	bls	.L608
-	mov	w25, w20
-	mov	w26, w0
-.L608:
-	cbnz	w0, .L609
-	ldrh	w0, [x23, x22]
-	cbz	w0, .L609
+	b	.L490
+.L498:
+	ubfiz	x0, x20, 1, 16
+	ldrh	w1, [x21, x0]
+	cmp	w24, w1
+	bls	.L495
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbnz	w0, .L496
+.L497:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L494
+.L495:
+	cbnz	w1, .L497
+	add	x25, x22, x0
+	ldrh	w0, [x22, x0]
+	cbz	w0, .L497
+.L499:
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-	strh	wzr, [x23, x22]
+	strh	wzr, [x25]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L609:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L606
+	b	.L497
+.L500:
+	mov	w24, 0
+	b	.L499
+.L496:
+	mov	w23, w20
+	cbz	w1, .L500
+	mov	w24, w1
+	b	.L497
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
-	.global	Ftl_write_map_blk_to_last_page
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
+	.global	FtlL2PDataInit
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
 	stp	x29, x30, [sp, -64]!
-	mov	w1, 65535
+	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x20, [x0, 16]
+	adrp	x19, .LANCHOR130
+	adrp	x20, .LANCHOR30
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
+	ldr	x0, [x19, #:lo12:.LANCHOR130]
+	adrp	x22, .LANCHOR23
+	ldr	w2, [x20, #:lo12:.LANCHOR30]
+	adrp	x21, .LANCHOR33
 	str	x23, [sp, 48]
-	cmp	w0, w1
-	bne	.L616
-	ldrh	w0, [x19, 8]
-	cbz	w0, .L617
+	adrp	x23, .LANCHOR136
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x21, #:lo12:.LANCHOR33]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR23]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR136]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR55
+	ldrh	w3, [x21, #:lo12:.LANCHOR33]
+	ldr	x6, [x23, #:lo12:.LANCHOR136]
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+	mov	w2, -1
+	ldrh	w5, [x22, #:lo12:.LANCHOR23]
+	add	x3, x0, x3, lsl 4
+.L510:
+	add	x4, x1, x5
+	cmp	x0, x3
+	bne	.L511
+	adrp	x1, .LANCHOR140
+	add	x0, x1, :lo12:.LANCHOR140
+	ldp	x21, x22, [sp, 32]
+	strh	w2, [x1, #:lo12:.LANCHOR140]
+	ldr	w1, [x20, #:lo12:.LANCHOR30]
+	strh	w1, [x0, 10]
+	mov	w1, -3902
+	strh	w1, [x0, 4]
 	adrp	x1, .LANCHOR141
-	adrp	x0, .LC1
-	mov	w2, 641
-	add	x1, x1, :lo12:.LANCHOR141
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L617:
-	ldrh	w0, [x19, 8]
-	add	w0, w0, 1
-	strh	w0, [x19, 8]
-	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x20]
-	ldr	w0, [x19, 48]
-	strh	wzr, [x19, 2]
-	add	w0, w0, 1
-	strh	wzr, [x19]
-	str	w0, [x19, 48]
-.L618:
-	mov	w0, 0
 	ldr	x23, [sp, 48]
+	strh	w2, [x0, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR141]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR32
+	ldrh	w1, [x1, #:lo12:.LANCHOR32]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR129
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR135
+	ldr	x1, [x1, #:lo12:.LANCHOR135]
+	str	x1, [x0, 24]
+	ldr	x1, [x19, #:lo12:.LANCHOR130]
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR134
+	ldr	x1, [x1, #:lo12:.LANCHOR134]
+	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L616:
-	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR108
-	adrp	x23, .LANCHOR107
-	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
-	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR106
-	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR106
-	orr	w0, w0, w21, lsl 10
-	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x1, [x2, 16]
-	str	x0, [x2, 8]
-	ldr	w2, [x19, 48]
-	str	w2, [x1, 4]
-	mov	w2, -1291
-	strh	w2, [x1, 8]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1]
-	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR20
-	ldrh	w2, [x1, #:lo12:.LANCHOR20]
-	mov	w1, 255
-	lsl	w2, w2, 3
-	bl	ftl_memset
-	ldrh	w4, [x19, 6]
-	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR107]
-	mov	w2, 0
-.L619:
-	cmp	w4, w1, uxth
-	bhi	.L621
-	mov	w2, 1
-	mov	w3, 0
-	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR106
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	b	.L618
-.L621:
-	ldr	w0, [x22, x1, lsl 2]
-	cmp	w21, w0, lsr 10
-	bne	.L620
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	ubfiz	x0, x2, 1, 16
-	str	w1, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	ldr	w5, [x22, x1, lsl 2]
-	str	w5, [x3, x0, lsl 2]
-.L620:
-	add	x1, x1, 1
-	b	.L619
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",@progbits
+.L511:
+	and	x1, x1, -4
+	strh	w2, [x0]
+	add	x1, x6, x1
+	str	wzr, [x0, 4]
+	str	x1, [x0, 8]
+	add	x0, x0, 16
+	mov	x1, x4
+	b	.L510
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
-	.global	FtlMapWritePage
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	stp	x29, x30, [sp, -112]!
+	.global	FtlVariablesInit
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR142
+	mov	w1, -1
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR66
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR142
-	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR20
-	stp	x19, x20, [sp, 16]
-	mov	w25, w1
-	mov	x19, x0
-	mov	x27, x2
-	add	x23, x23, :lo12:.LANCHOR66
-	add	x24, x24, :lo12:.LANCHOR142
-	add	x28, x26, :lo12:.LANCHOR20
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-.L627:
-	ldr	w0, [x23]
-	ldrh	w1, [x19, 2]
-	add	w0, w0, 1
-	str	w0, [x23]
-	ldrh	w0, [x26, #:lo12:.LANCHOR20]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	bge	.L628
-	ldrh	w1, [x19]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L629
-.L628:
-	mov	x0, x19
-	bl	Ftl_write_map_blk_to_last_page
-.L629:
-	ldrh	w1, [x19]
-	ldr	x0, [x19, 16]
-	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L630
-	adrp	x0, .LC1
-	mov	w2, 699
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L630:
-	ldrh	w1, [x19]
-	ldrh	w0, [x19, 10]
-	cmp	w1, w0
-	bcc	.L631
-	adrp	x0, .LC1
-	mov	w2, 700
-	mov	x1, x24
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L631:
-	ldrh	w1, [x19]
-	adrp	x21, .LANCHOR106
-	ldr	x0, [x19, 16]
-	add	x20, x21, :lo12:.LANCHOR106
-	mov	w2, 16
-	ldrh	w3, [x0, x1, lsl 1]
+	strh	w1, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	mov	w1, -1
+	str	x19, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR144
+	adrp	x19, .LANCHOR6
+	str	wzr, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
+	str	w1, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR35
 	mov	w1, 0
-	ldrh	w0, [x19, 2]
-	str	w3, [x29, 108]
-	str	x27, [x20, 8]
-	orr	w0, w0, w3, lsl 10
-	str	w0, [x20, 4]
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	str	x0, [x20, 16]
+	strh	wzr, [x0, #:lo12:.LANCHOR35]
+	adrp	x0, .LANCHOR27
+	ldrh	w2, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR36
+	ldr	x0, [x0, #:lo12:.LANCHOR36]
+	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x20, 16]
-	ldr	w1, [x19, 48]
-	ldr	w3, [x29, 108]
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	strh	w1, [x0]
-	strh	w3, [x0, 2]
-	mov	w3, 1
-	strh	w25, [x0, 8]
-	mov	w1, w3
-	mov	w2, w3
-	mov	x0, x20
-	bl	FlashProgPages
-	ldrh	w0, [x19, 2]
-	ldr	w1, [x21, #:lo12:.LANCHOR106]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x19, 2]
-	cmn	w1, #1
-	bne	.L632
-	ldr	w1, [x20, 4]
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	bl	printf
-	ldrh	w0, [x19, 2]
-	cmp	w0, 2
-	bhi	.L633
-	ldrh	w0, [x28]
-	sub	w0, w0, #1
-	strh	w0, [x19, 2]
-.L633:
-	cmp	w22, 3
-	bls	.L634
-	add	x21, x21, :lo12:.LANCHOR106
-	adrp	x0, .LC90
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC90
-	ldr	w1, [x21, 4]
-	bl	printf
-.L635:
-	b	.L635
-.L634:
-	ldr	w0, [x19, 52]
-	cbz	w0, .L627
-.L644:
-	b	.L644
-.L632:
-	cmp	w0, 1
-	beq	.L627
-	ldr	x0, [x19, 40]
-	ldr	w1, [x20, 4]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x27, x28, [sp, 80]
-	str	w1, [x0, w25, uxtw 2]
-	ldp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR43
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR126
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	mov	w2, 48
+	mov	w1, 0
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	bl	ftl_memset
+	mov	w2, 512
+	mov	w1, 0
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	ldr	x19, [sp, 16]
 	mov	w0, 0
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",@progbits
 	.align	2
-	.global	ftl_map_blk_gc
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
+	.global	SupperBlkListInit
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
 	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR6
+	mov	w1, 0
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	ldrh	w2, [x0, #:lo12:.LANCHOR6]
+	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR20
+	adrp	x24, .LANCHOR40
+	stp	x19, x20, [sp, 16]
+	adrp	x23, .LANCHOR45
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR48
+	mul	w2, w2, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldr	x20, [x0, 16]
-	ldr	x24, [x0, 40]
-	bl	ftl_free_no_use_map_blk
-	ldrh	w1, [x19, 10]
-	ldrh	w2, [x19, 8]
-	sub	w1, w1, #4
-	cmp	w2, w1
-	blt	.L647
-	ubfiz	x0, x0, 1, 16
-	ldrh	w21, [x20, x0]
-	cbz	w21, .L647
-	ldr	w1, [x19, 52]
-	cbnz	w1, .L647
-	mov	w1, 1
-	str	w1, [x19, 52]
-	strh	wzr, [x20, x0]
-	ldrh	w0, [x19, 8]
-	ldrh	w1, [x19, 2]
-	sub	w0, w0, #1
-	strh	w0, [x19, 8]
-	ldrh	w0, [x23, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L648
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L648:
-	adrp	x25, .LANCHOR106
-	adrp	x22, .LANCHOR143
-	add	x26, x25, :lo12:.LANCHOR106
-	add	x22, x22, :lo12:.LANCHOR143
+	adrp	x25, .LANCHOR5
+	str	x27, [sp, 80]
+	adrp	x26, .LANCHOR13
+	add	x25, x25, :lo12:.LANCHOR5
+	add	x26, x26, :lo12:.LANCHOR13
+	bl	ftl_memset
+	mov	w21, 0
+	adrp	x0, .LANCHOR47
 	mov	w20, 0
-.L649:
-	ldrh	w0, [x19, 6]
-	cmp	w0, w20
-	bhi	.L653
-	mov	w1, 1
-	mov	w0, w21
-	bl	FtlFreeSysBlkQueueIn
-	str	wzr, [x19, 52]
-.L647:
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bcc	.L654
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L654:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L653:
-	ubfiz	x27, x20, 2, 16
-	ldr	w1, [x24, x27]
-	cmp	w21, w1, lsr 10
-	bne	.L650
-	adrp	x2, .LANCHOR123
-	add	x0, x25, :lo12:.LANCHOR106
-	ldr	x2, [x2, #:lo12:.LANCHOR123]
-	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR108
-	str	w1, [x0, 4]
-	ldr	x28, [x2, #:lo12:.LANCHOR108]
-	mov	w2, 1
-	str	x28, [x0, 16]
-	mov	w1, w2
-	bl	FlashReadPages
-	ldrh	w0, [x28, 8]
-	cmp	w0, w20
-	beq	.L651
-	adrp	x0, .LC1
-	mov	w2, 613
-	mov	x1, x22
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L651:
-	ldr	w0, [x26]
-	cmn	w0, #1
-	bne	.L652
-	str	wzr, [x24, x27]
-.L650:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L649
-.L652:
-	ldr	x2, [x26, 8]
-	mov	w1, w20
-	mov	x0, x19
-	bl	FtlMapWritePage
-	b	.L650
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.flush_l2p_region,"ax",@progbits
-	.align	2
-	.global	flush_l2p_region
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR55
-	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x1, x0, x19
-	ldr	x2, [x1, 8]
-	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR55]
-	add	x0, x0, x19
-	ldp	x19, x20, [sp, 16]
-	ldr	w1, [x0, 4]
-	and	w1, w1, 2147483647
-	str	w1, [x0, 4]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",@progbits
-	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	x23, x1
-	adrp	x1, .LANCHOR22
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	mov	w24, w2
-	ldrh	w19, [x1, #:lo12:.LANCHOR22]
-	str	x25, [sp, 64]
-	add	w1, w19, 7
-	mov	x19, 1
-	lsr	w22, w0, w1
-	and	w22, w22, 65535
-	lsl	x19, x19, x1
-	adrp	x1, .LANCHOR61
-	sub	w19, w19, #1
-	ldr	w1, [x1, #:lo12:.LANCHOR61]
-	and	w19, w19, w0
-	and	x19, x19, 65535
-	cmp	w0, w1
-	bcc	.L662
-	adrp	x1, .LANCHOR145
+	mov	w19, 0
+	strh	wzr, [x23, #:lo12:.LANCHOR45]
+	str	xzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR41
+	strh	wzr, [x22, #:lo12:.LANCHOR48]
+	adrp	x27, .LANCHOR3
+	str	xzr, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR44
+	str	xzr, [x0, #:lo12:.LANCHOR44]
+.L516:
+	ldrh	w0, [x25]
+	cmp	w19, w0
+	bcs	.L523
+	adrp	x0, .LANCHOR19
+	ldrh	w8, [x27, #:lo12:.LANCHOR3]
+	mov	x6, 0
+	mov	w5, 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR19]
+	b	.L524
+.L518:
+	ldrb	w0, [x26, x6]
+	mov	w1, w19
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L517
+	add	w5, w5, w7
+	and	w5, w5, 65535
+.L517:
+	add	x6, x6, 1
+.L524:
+	cmp	w8, w6, uxth
+	bhi	.L518
+	cbz	w5, .L519
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.L520:
+	ldr	x1, [x24, #:lo12:.LANCHOR40]
+	mov	w0, 6
+	umaddl	x0, w19, w0, x1
+	strh	w5, [x0, 4]
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L521
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L521
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L521
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x19, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L522
+	add	w21, w21, 1
+	mov	w0, w19
+	and	w21, w21, 65535
+	bl	INSERT_FREE_LIST
+.L521:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L516
+.L519:
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x19, 1, 16
+	mov	w2, -1
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	strh	w2, [x1, x0]
+	b	.L520
+.L522:
+	add	w20, w20, 1
+	mov	w0, w19
+	and	w20, w20, 65535
+	bl	INSERT_DATA_LIST
+	b	.L521
+.L523:
+	strh	w20, [x23, #:lo12:.LANCHOR45]
+	add	w20, w20, w21
+	strh	w21, [x22, #:lo12:.LANCHOR48]
+	cmp	w20, w0
+	ble	.L525
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 808
-	add	x1, x1, :lo12:.LANCHOR145
+	mov	w2, 2170
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L662:
-	adrp	x21, .LANCHOR55
-	adrp	x0, .LANCHOR33
-	ldr	x2, [x21, #:lo12:.LANCHOR55]
-	ldrh	w1, [x0, #:lo12:.LANCHOR33]
-	mov	x0, 0
-.L663:
-	and	x20, x0, 65535
-	cmp	w20, w1
-	bcc	.L668
-	bl	select_l2p_ram_region
-	and	x20, x0, 65535
-	ldr	x2, [x21, #:lo12:.LANCHOR55]
-	ubfiz	x1, x20, 4, 16
-	mov	w25, w0
-	add	x3, x2, x1
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L669
-	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L669
-	bl	flush_l2p_region
-.L669:
-	mov	w1, w25
-	mov	w0, w22
-	bl	load_l2p_region
-	b	.L664
-.L668:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L663
-.L664:
-	ldr	x0, [x21, #:lo12:.LANCHOR55]
-	add	x0, x0, x20, lsl 4
-	cbnz	w24, .L665
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x19, lsl 2]
-	str	w0, [x23]
-.L666:
-	ldr	x0, [x21, #:lo12:.LANCHOR55]
-	add	x20, x0, x20, lsl 4
-	ldr	w0, [x20, 4]
-	cmn	w0, #1
-	beq	.L671
-	add	w0, w0, 1
-	str	w0, [x20, 4]
-.L671:
+.L525:
 	mov	w0, 0
-	ldr	x25, [sp, 64]
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L665:
-	ldr	x1, [x0, 8]
-	ldr	w2, [x23]
-	str	w2, [x1, x19, lsl 2]
-	ldr	w1, [x0, 4]
-	orr	w1, w1, -2147483648
-	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR56
-	strh	w22, [x0, #:lo12:.LANCHOR56]
-	b	.L666
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",@progbits
 	.align	2
-	.global	FtlReUsePrevPpa
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	stp	x29, x30, [sp, -80]!
+	.global	FtlGcPageVarInit
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR95
+	mov	w1, 255
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR97
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR21
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR96
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	mov	w0, 12
+	mov	w1, 255
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR98
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	bl	ftl_memset
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	FtlGcBufInit
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 256
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR42
 	stp	x19, x20, [sp, 16]
-	mov	w21, w0
-	str	w1, [x29, 76]
-	lsr	w0, w1, 10
-	str	x23, [sp, 48]
-	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	and	w3, w0, 65535
-	ubfiz	x20, x3, 1, 16
-	ldrh	w1, [x2, x20]
-	cbnz	w1, .L677
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L678
-	adrp	x2, .LANCHOR40
-	mov	x5, -6148914691236517206
-	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR48
-	ldr	x2, [x2, #:lo12:.LANCHOR40]
-	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-	sub	x19, x19, x2
-	asr	x19, x19, 1
-	mul	x19, x19, x5
-	mov	w5, 6
-	and	w19, w19, 65535
-.L679:
-	cmp	w1, w4
-	beq	.L678
-	cmp	w19, w3
-	bne	.L680
-	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L681
-	adrp	x1, .LANCHOR146
-	adrp	x0, .LC1
-	mov	w2, 1688
-	add	x1, x1, :lo12:.LANCHOR146
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L681:
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR48]
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
-	strh	w0, [x1, x20]
-.L678:
-	add	x1, x29, 76
-	mov	w2, 1
-	mov	w0, w21
-	bl	log2phys
+	mov	x19, x0
+	mov	w20, w1
+	mov	w1, 255
+	bl	ftl_memset
+	adrp	x0, .LANCHOR105
+	mov	w1, w20
+	ldr	x2, [x0, #:lo12:.LANCHOR105]
+	mov	x0, x19
+	blr	x2
+	and	w0, w0, 65535
+	cmp	w0, 50
+	bls	.L530
+	mov	w2, 256
+	mov	w1, 255
+	mov	x0, x19
+	bl	ftl_memset
+	mov	w0, 0
+.L530:
+	adrp	x1, .LANCHOR0+14
+	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
+	cmp	w1, 4
+	bne	.L534
+	mov	x1, 0
+.L532:
+	cmp	w0, w1, uxth
+	bhi	.L533
+.L534:
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 32
 	ret
-.L680:
-	umull	x19, w19, w5
-	ldrh	w19, [x2, x19]
-	cmp	w19, w6
-	beq	.L678
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L679
-.L677:
-	add	w1, w1, 1
-	strh	w1, [x2, x20]
-	b	.L678
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.ftl_scan_all_data,"ax",@progbits
+.L533:
+	ldrh	w2, [x19, x1, lsl 1]
+	lsr	w2, w2, 1
+	strh	w2, [x19, x1, lsl 1]
+	add	x1, x1, 1
+	b	.L532
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #96
-	adrp	x0, .LC91
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC91
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x20, .LANCHOR106
-	stp	x21, x22, [sp, 48]
-	mov	w19, 0
-	adrp	x21, .LANCHOR61
-	add	x22, x20, :lo12:.LANCHOR106
-	add	x21, x21, :lo12:.LANCHOR61
-	str	x23, [sp, 64]
-	bl	printf
-.L688:
-	ldr	w0, [x21]
-	cmp	w19, w0
-	bcc	.L694
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x29, x30, [sp, 16]
-	ldr	x23, [sp, 64]
-	add	sp, sp, 96
-	ret
-.L694:
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w19
-	bl	log2phys
-	tst	x19, 2047
-	bne	.L689
-	ldr	w2, [x29, 76]
-	adrp	x0, .LC92
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC92
-	bl	printf
-.L689:
-	ldr	w1, [x29, 76]
-	cmn	w1, #1
-	beq	.L691
-	add	x0, x20, :lo12:.LANCHOR106
-	str	wzr, [x20, #:lo12:.LANCHOR106]
-	mov	w2, 0
-	str	w1, [x0, 4]
-	adrp	x1, .LANCHOR107
-	str	w19, [x0, 24]
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	str	x1, [x0, 8]
-	adrp	x1, .LANCHOR108
-	ldr	x23, [x1, #:lo12:.LANCHOR108]
-	mov	w1, 1
-	str	x23, [x0, 16]
-	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR106]
-	cmp	w0, 256
-	ccmn	w0, #1, 4, ne
-	beq	.L692
-	ldr	w0, [x23, 8]
-	cmp	w19, w0
-	beq	.L691
-.L692:
-	ldp	x1, x0, [x22, 8]
-	ldr	w2, [x1, 4]
-	str	w2, [sp]
-	ldr	w2, [x22, 4]
-	ldp	w3, w4, [x0]
-	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC93
-	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC93
-	mov	w1, w19
-	bl	printf
-.L691:
-	add	w19, w19, 1
-	b	.L688
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.FtlReadRefresh,"ax",@progbits
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
-	.global	FtlReadRefresh
-	.type	FtlReadRefresh, %function
-FtlReadRefresh:
-	adrp	x1, .LANCHOR81
-	add	x0, x1, :lo12:.LANCHOR81
-	ldr	w2, [x0, 80]
-	cbz	w2, .L697
-	adrp	x1, .LANCHOR61
-	ldr	w3, [x0, 84]
-	ldr	w2, [x1, #:lo12:.LANCHOR61]
-	cmp	w3, w2
-	bcs	.L698
-	stp	x29, x30, [sp, -160]!
+	.global	FlashReadPages
+	.type	FlashReadPages, %function
+FlashReadPages:
+	stp	x29, x30, [sp, -112]!
+	ubfiz	x1, x1, 5, 32
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
+	add	x2, x21, :lo12:.LANCHOR0
+	str	x27, [sp, 80]
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR147
 	stp	x19, x20, [sp, 16]
+	add	x23, x0, x1
+	ldrh	w27, [x2, 12]
 	mov	x19, x0
-	add	x20, x1, :lo12:.LANCHOR61
-	str	x21, [sp, 32]
-	mov	w21, 2048
-.L703:
-	ldr	w0, [x19, 84]
-	ldr	w1, [x20]
-	cmp	w0, w1
-	bcs	.L700
-	add	x1, x29, 60
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x19, 84]
-	ldr	w1, [x29, 60]
-	add	w0, w0, 1
-	str	w0, [x19, 84]
-	cmn	w1, #1
-	beq	.L701
-	str	w0, [x29, 88]
-	adrp	x0, ftl_temp_buf
-	add	x0, x0, :lo12:ftl_temp_buf
-	str	x0, [x29, 72]
-	add	x0, x29, 96
-	str	x0, [x29, 80]
-	add	x0, x29, 160
-	str	w1, [x29, 68]
-	mov	w2, 0
-	mov	w1, 1
-	str	wzr, [x0, -96]!
-	bl	FlashReadPages
-	ldr	w0, [x29, 64]
-	cmp	w0, 256
-	bne	.L700
-	ldr	w0, [x29, 60]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-.L700:
+	stp	x25, x26, [sp, 64]
+	add	x24, x24, :lo12:.LANCHOR147
+	adrp	x25, .LC1
+	add	x25, x25, :lo12:.LC1
+.L538:
+	cmp	x23, x19
+	bne	.L548
 	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 160
-	ret
-.L701:
-	subs	w21, w21, #1
-	bne	.L703
-	b	.L700
-.L698:
-	adrp	x1, .LANCHOR62
-	str	wzr, [x0, 84]
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	stp	w1, wzr, [x0, 76]
-.L707:
 	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L697:
-	ldr	w4, [x0, 76]
-	adrp	x0, .LANCHOR62
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
-	add	w0, w2, 1048576
-	cmp	w4, w0
-	bhi	.L706
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	lsr	w3, w0, 10
-	mov	w0, 33554432
-	asr	w0, w0, w3
-	add	w0, w0, w4
-	cmp	w2, w0
-	bhi	.L706
-	adrp	x0, .LANCHOR39+28
-	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
-	cbnz	w0, .L707
-.L706:
-	add	x0, x1, :lo12:.LANCHOR81
-	mov	w1, 1
-	str	wzr, [x0, 84]
-	stp	w2, w1, [x0, 76]
-	b	.L707
-	.size	FtlReadRefresh, .-FtlReadRefresh
-	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+.L548:
+	ldr	x0, [x19, 8]
+	cbz	x0, .L539
+	ldr	x0, [x19, 16]
+	cbnz	x0, .L540
+.L539:
+	mov	w2, 90
+	mov	x1, x24
+	mov	x0, x25
+	bl	printf
+.L540:
+	ldr	w0, [x19, 4]
+	add	x2, x29, 104
+	add	x1, x29, 108
+	adrp	x26, .LANCHOR120
+	bl	l2p_addr_tran.isra.0
+	ldr	x20, [x19, 8]
+	tst	x20, 63
+	beq	.L541
+	ldr	x20, [x26, #:lo12:.LANCHOR120]
+.L541:
+	adrp	x22, .LANCHOR105
+	add	x22, x22, :lo12:.LANCHOR105
+	ldrb	w0, [x29, 104]
+	mov	x2, x20
+	ldr	w1, [x29, 108]
+	ldr	x3, [x19, 16]
+	ldr	x4, [x22, 24]
+	blr	x4
+	str	w0, [x19]
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L543
+	ldrb	w0, [x29, 104]
+	add	x2, x20, 2048
+	ldr	x4, [x22, 24]
+	ldr	w1, [x29, 108]
+	ldr	x3, [x19, 16]
+	add	w1, w27, w1
+	add	x3, x3, 8
+	blr	x4
+	cmn	w0, #1
+	beq	.L544
+	ldr	x1, [x19, 16]
+	ldr	w2, [x1, 12]
+	cmn	w2, #1
+	bne	.L545
+	ldr	w2, [x1, 8]
+	cmn	w2, #1
+	bne	.L545
+	ldr	w1, [x1]
+	cmn	w1, #1
+	beq	.L545
+.L544:
+	mov	w1, -1
+	str	w1, [x19]
+.L545:
+	ldr	w1, [x19]
+	cmn	w1, #1
+	beq	.L543
+	cmp	w0, 256
+	bne	.L543
+	str	w0, [x19]
+.L543:
+	ldr	x0, [x26, #:lo12:.LANCHOR120]
+	cmp	x20, x0
+	bne	.L547
+	ldr	x0, [x19, 8]
+	cmp	x20, x0
+	beq	.L547
+	adrp	x1, .LANCHOR12
+	ldrh	w2, [x1, #:lo12:.LANCHOR12]
+	mov	x1, x20
+	lsl	w2, w2, 9
+	bl	ftl_memcpy
+.L547:
+	add	x19, x19, 32
+	b	.L538
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
-	.global	FtlMapBlkWriteDump_data
-	.type	FtlMapBlkWriteDump_data, %function
-FtlMapBlkWriteDump_data:
-	ldr	w1, [x0, 56]
-	cbz	w1, .L713
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR106
-	adrp	x2, .LANCHOR108
+	.global	FtlLoadFactoryBbt
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	stp	x29, x30, [sp, -112]!
+	adrp	x2, .LANCHOR115
+	adrp	x0, .LANCHOR148
+	add	x1, x0, :lo12:.LANCHOR148
 	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR17
+	stp	x27, x28, [sp, 80]
+	add	x28, x26, :lo12:.LANCHOR17
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w20, [x0, 6]
-	adrp	x0, .LANCHOR123
-	ldr	x2, [x2, #:lo12:.LANCHOR108]
-	ldr	x3, [x0, #:lo12:.LANCHOR123]
-	add	x0, x1, :lo12:.LANCHOR106
-	sub	w20, w20, #1
-	ldr	x4, [x19, 40]
-	and	w20, w20, 65535
-	str	x21, [sp, 32]
-	stp	x3, x2, [x0, 8]
-	ubfiz	x2, x20, 2, 16
-	str	wzr, [x19, 56]
-	mov	x21, x1
-	ldr	w2, [x4, x2]
-	str	w2, [x0, 4]
-	cbz	w2, .L715
-	mov	w2, 1
-	mov	w1, w2
-	bl	FlashReadPages
-.L716:
-	add	x1, x21, :lo12:.LANCHOR106
-	mov	x0, x19
-	ldr	x21, [sp, 32]
-	ldr	x2, [x1, 8]
-	mov	w1, w20
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	FtlMapWritePage
-.L715:
-	adrp	x0, .LANCHOR23
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-	mov	x0, x3
-	bl	ftl_memset
-	b	.L716
-.L713:
-	ret
-	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
-	.section	.text.FtlScanSysBlk,"ax",@progbits
+	adrp	x20, .LANCHOR37
+	stp	x23, x24, [sp, 48]
+	add	x20, x20, :lo12:.LANCHOR37
+	str	x2, [x1, 8]
+	adrp	x2, .LANCHOR123
+	adrp	x23, .LANCHOR10
+	add	x20, x20, 12
+	ldr	x25, [x2, #:lo12:.LANCHOR123]
+	add	x23, x23, :lo12:.LANCHOR10
+	mov	w21, 0
+	mov	w27, -1
+	str	x25, [x1, 16]
+.L566:
+	ldrh	w0, [x23]
+	cmp	w21, w0
+	bcc	.L571
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L571:
+	ldrh	w19, [x26, #:lo12:.LANCHOR17]
+	add	x24, x22, :lo12:.LANCHOR148
+	strh	w27, [x20]
+	mov	w3, 61664
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L567:
+	ldrh	w0, [x28]
+	sub	w1, w0, #15
+	cmp	w1, w19
+	bgt	.L569
+	madd	w0, w0, w21, w19
+	mov	w2, 1
+	str	w3, [x29, 108]
+	mov	w1, w2
+	lsl	w0, w0, 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	ldr	w3, [x29, 108]
+	cmn	w0, #1
+	beq	.L568
+	ldrh	w0, [x25]
+	cmp	w0, w3
+	bne	.L568
+	strh	w19, [x20]
+.L569:
+	add	w21, w21, 1
+	add	x20, x20, 2
+	b	.L566
+.L568:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L567
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
+	.align	2
+	.global	FtlGetLastWrittenPage
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	stp	x29, x30, [sp, -160]!
+	cmp	w1, 1
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	bne	.L577
+	adrp	x1, .LANCHOR20
+	ldrh	w19, [x1, #:lo12:.LANCHOR20]
+.L578:
+	adrp	x1, .LANCHOR121
+	sub	w19, w19, #1
+	sxth	w19, w19
+	lsl	w21, w0, 10
+	ldr	x1, [x1, #:lo12:.LANCHOR121]
+	orr	w0, w19, w21
+	str	x1, [x29, 72]
+	add	x1, x29, 96
+	str	w0, [x29, 68]
+	mov	w2, w23
+	str	x1, [x29, 80]
+	add	x0, x29, 64
+	mov	w1, 1
+	bl	FlashReadPages
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L579
+	mov	w22, 0
+	mov	w24, 2
+.L580:
+	cmp	w22, w19
+	ble	.L583
+.L579:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 160
+	ret
+.L577:
+	adrp	x1, .LANCHOR19
+	ldrh	w19, [x1, #:lo12:.LANCHOR19]
+	b	.L578
+.L583:
+	add	w20, w22, w19
+	mov	w2, w23
+	mov	w1, 1
+	sdiv	w20, w20, w24
+	sxth	w0, w20
+	orr	w0, w0, w21
+	str	w0, [x29, 68]
+	add	x0, x29, 64
+	bl	FlashReadPages
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L581
+	ldr	w0, [x29, 100]
+	cmn	w0, #1
+	bne	.L581
+	ldr	w0, [x29, 64]
+	cmn	w0, #1
+	beq	.L581
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L580
+.L581:
+	add	w20, w20, 1
+	sxth	w22, w20
+	b	.L580
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
 	.global	FtlScanSysBlk
 	.type	FtlScanSysBlk, %function
@@ -5222,13 +4471,13 @@ FtlScanSysBlk:
 	adrp	x22, .LANCHOR132
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR147
+	adrp	x20, .LANCHOR141
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR35
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR129
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR147]
+	strh	wzr, [x20, #:lo12:.LANCHOR141]
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
 	bl	ftl_memset
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
@@ -5264,19 +4513,19 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR70
 	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
-.L721:
+.L589:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L761
+	bls	.L629
 	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR120
+	adrp	x25, .LANCHOR112
 	adrp	x6, .LANCHOR13
 	mov	x5, 0
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
 	adrp	x0, .LANCHOR91
-	ldr	x7, [x25, #:lo12:.LANCHOR120]
+	ldr	x7, [x25, #:lo12:.LANCHOR112]
 	mov	w22, 0
 	ldr	x11, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LANCHOR92
@@ -5284,14 +4533,14 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L762
-.L723:
+	b	.L630
+.L591:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L722
+	cbnz	w0, .L590
 	ubfiz	x0, x22, 5, 16
 	mul	w1, w22, w8
 	add	x0, x7, x0
@@ -5302,19 +4551,19 @@ FtlScanSysBlk:
 	add	x1, x10, x1, sxtw 2
 	str	w4, [x0, 4]
 	stp	x11, x1, [x0, 8]
-.L722:
+.L590:
 	add	x5, x5, 1
-.L762:
+.L630:
 	cmp	w12, w5, uxth
-	bhi	.L723
-	cbnz	w22, .L724
-.L760:
+	bhi	.L591
+	cbnz	w22, .L592
+.L628:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L721
-.L724:
+	b	.L589
+.L592:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -5322,23 +4571,23 @@ FtlScanSysBlk:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR148
-	add	x0, x0, :lo12:.LANCHOR148
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
 	str	x0, [x29, 136]
-.L759:
-	ldr	x0, [x25, #:lo12:.LANCHOR120]
+.L627:
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L727
+	bne	.L595
 	mov	w5, 16
 	mov	w7, 65535
-.L729:
-	ldr	x0, [x25, #:lo12:.LANCHOR120]
-	add	x6, x25, :lo12:.LANCHOR120
+.L597:
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
+	add	x6, x25, :lo12:.LANCHOR112
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -5354,79 +4603,81 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L726
+	bne	.L594
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L727
-.L728:
-	mov	w1, 0
-	mov	w0, w26
-	bl	FtlFreeSysBlkQueueIn
-	b	.L732
-.L726:
-	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	bne	.L595
+.L596:
+	mov	w1, 1
+	b	.L666
+.L594:
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L727
+	bne	.L595
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L729
-	b	.L728
-.L727:
+	bne	.L597
+	b	.L596
+.L595:
 	adrp	x0, .LANCHOR70
 	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L730
+	beq	.L598
 	cmp	w1, w0
-	bhi	.L731
-.L730:
+	bhi	.L599
+.L598:
 	cmn	w0, #1
-	beq	.L731
+	beq	.L599
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L731:
+.L599:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L733
-	bhi	.L734
+	beq	.L601
+	bhi	.L602
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L735
-.L732:
+	beq	.L603
+.L600:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L759
-	b	.L760
-.L734:
+	bne	.L627
+	b	.L628
+.L602:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L736
+	beq	.L604
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L728
-	b	.L732
-.L736:
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	bne	.L600
+	mov	w1, 0
+.L666:
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+	b	.L600
+.L604:
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L738
+	bls	.L606
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1211
+	mov	w2, 1222
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L738:
+.L606:
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
@@ -5434,53 +4685,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
 	sxth	w2, w2
-.L739:
+.L607:
 	cmp	w0, w2
-	bgt	.L745
-	tbz	w0, #31, .L779
-	b	.L732
-.L745:
+	bgt	.L613
+	tbz	w0, #31, .L647
+	b	.L600
+.L613:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L740
+	bls	.L608
 	ldr	w2, [x5]
-	cbnz	w2, .L741
+	cbnz	w2, .L609
 	cmp	w6, w1
-	beq	.L741
+	beq	.L609
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR147]
-.L741:
+	strh	w1, [x20, #:lo12:.LANCHOR141]
+.L609:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L742:
+.L610:
 	cmp	w1, w0
-	bne	.L743
+	bne	.L611
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L732
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	tbnz	w0, #31, .L600
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L732
-.L779:
+	bgt	.L600
+.L647:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR147]
+	strh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L797:
+.L665:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L732
-.L743:
+	b	.L600
+.L611:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -5492,22 +4743,22 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L742
-.L740:
+	b	.L610
+.L608:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L739
-.L735:
+	b	.L607
+.L603:
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L748
+	bls	.L616
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1252
+	mov	w2, 1263
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L748:
+.L616:
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
@@ -5515,46 +4766,46 @@ FtlScanSysBlk:
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L749:
+.L617:
 	cmp	w0, w5
-	ble	.L754
+	ble	.L622
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L750
+	bls	.L618
 	ldr	w5, [x1]
-	cbnz	w5, .L751
+	cbnz	w5, .L619
 	cmp	w6, w2
-	beq	.L751
+	beq	.L619
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L751:
+.L619:
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L752:
+.L620:
 	cmp	w2, w0
-	bne	.L753
+	bne	.L621
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L754:
-	tbnz	w0, #31, .L732
+.L622:
+	tbnz	w0, #31, .L600
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L732
+	bgt	.L600
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
 	strh	w5, [x23, #:lo12:.LANCHOR35]
 	str	w2, [x1, x0, lsl 2]
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L797
-.L753:
+	b	.L665
+.L621:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -5566,61 +4817,61 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L752
-.L750:
+	b	.L620
+.L618:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L749
-.L733:
+	b	.L617
+.L601:
 	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
-	bne	.L756
+	bne	.L624
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w0, [x2, 8]
-	b	.L732
-.L756:
+	b	.L600
+.L624:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L757
+	beq	.L625
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L757:
+.L625:
 	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L758
+	bcs	.L626
 	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR79]
 	str	w1, [x0, 8]
-	b	.L732
-.L758:
+	b	.L600
+.L626:
 	strh	w26, [x0, 4]
-	b	.L732
-.L761:
+	b	.L600
+.L629:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L763
-.L766:
+	cbz	w0, .L631
+.L634:
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L764
-.L765:
-	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	cbz	w0, .L632
+.L633:
+	ldrh	w1, [x20, #:lo12:.LANCHOR141]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L795
-	adrp	x1, .LANCHOR148
+	bls	.L663
+	adrp	x1, .LANCHOR149
 	adrp	x0, .LC1
-	mov	w2, 1377
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 1388
+	add	x1, x1, :lo12:.LANCHOR149
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L795:
+.L663:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5629,24 +4880,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L763:
-	ldrh	w0, [x20, #:lo12:.LANCHOR147]
-	cbz	w0, .L766
+.L631:
+	ldrh	w0, [x20, #:lo12:.LANCHOR141]
+	cbz	w0, .L634
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L767:
+.L635:
 	cmp	w0, w1
-	bcs	.L766
+	bcs	.L634
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L768
+	cbz	w3, .L636
 	ldr	x1, [x29, 152]
 	add	x7, x21, :lo12:.LANCHOR30
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L769:
+.L637:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L766
+	bcs	.L634
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -5658,29 +4909,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L769
-.L768:
+	b	.L637
+.L636:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L767
-.L764:
+	b	.L635
+.L632:
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L765
+	cbz	w0, .L633
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L774:
+.L642:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L765
+	bge	.L633
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L775
+	cbz	w3, .L643
 	ldr	x2, [x29, 144]
 	add	x19, x19, :lo12:.LANCHOR27
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.L776:
+.L644:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L765
+	bge	.L633
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -5692,1462 +4943,1168 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L776
-.L775:
+	b	.L644
+.L643:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L774
+	b	.L642
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
-	.global	FtlMapTblRecovery
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	stp	x29, x30, [sp, -144]!
-	mov	w1, 0
+	.global	FtlLoadBbt
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR106
-	ldrh	w23, [x0, 6]
-	adrp	x24, .LANCHOR20
+	adrp	x23, .LANCHOR115
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR17
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, 40]
-	ldr	x22, [x0, 16]
-	lsl	w2, w23, 2
-	ldr	x0, [x0, 24]
-	str	x0, [x29, 128]
-	ldrh	w0, [x19, 8]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	str	w0, [x29, 140]
-	mov	x0, x21
-	bl	ftl_memset
-	str	x20, [x29, 120]
-	adrp	x7, .LANCHOR107
-	add	x3, x20, :lo12:.LANCHOR106
-	mov	x26, x7
-	mov	x20, x3
-	ldr	x0, [x7, #:lo12:.LANCHOR107]
-	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR108
-	stp	wzr, wzr, [x19, 48]
-	ldr	x25, [x0, #:lo12:.LANCHOR108]
-	mov	w0, -1
-	str	x25, [x3, 16]
-	strh	w0, [x19]
-	strh	w0, [x19, 2]
-	mov	w0, 1
-	str	w0, [x19, 56]
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
-	str	w0, [x29, 136]
-	add	x0, x24, :lo12:.LANCHOR20
-	str	x0, [x29, 112]
-.L799:
-	ldr	w0, [x29, 140]
-	cmp	w27, w0
-	bge	.L816
-	ldr	w0, [x29, 136]
-	sxtw	x28, w27
-	cmp	w27, w0
-	bne	.L800
-	lsl	x0, x28, 1
-	mov	w1, 1
-	add	x24, x22, x0
-	ldrh	w0, [x22, x0]
-	mov	w22, 0
-	bl	FtlGetLastWrittenPage
-	sxth	w26, w0
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-	ldr	x0, [x29, 128]
-	strh	w27, [x19]
-	ldr	w0, [x0, x28, lsl 2]
-	str	w0, [x19, 48]
-	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR106
-.L801:
-	cmp	w22, w26
-	ble	.L803
-.L816:
-	mov	x0, x19
-	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR20
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
-	cmp	w1, w0
-	bne	.L805
-	mov	x0, x19
-	bl	ftl_map_blk_alloc_new_blk
-.L805:
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	x0, x19
-	bl	ftl_map_blk_gc
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L803:
+	adrp	x22, .LANCHOR148
+	add	x20, x22, :lo12:.LANCHOR148
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x25, [sp, 64]
+	mov	w25, 61649
+	str	x0, [x20, 8]
+	adrp	x0, .LANCHOR123
+	ldr	x21, [x0, #:lo12:.LANCHOR123]
+	str	x21, [x20, 16]
+	bl	FtlBbtMemInit
+	ldrh	w19, [x24, #:lo12:.LANCHOR17]
+	add	x24, x24, :lo12:.LANCHOR17
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L668:
 	ldrh	w0, [x24]
+	sub	w0, w0, #15
+	cmp	w0, w19
+	bgt	.L671
+	lsl	w0, w19, 10
 	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
 	str	w0, [x20, 4]
+	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L802
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L802
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L802
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L802:
-	add	w22, w22, 1
-	sxth	w22, w22
-	b	.L801
-.L800:
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	bne	.L669
+	ldr	w0, [x20, 4]
 	mov	w2, 1
-	str	x0, [x20, 8]
-	lsl	x0, x28, 1
-	ldrh	w1, [x24, #:lo12:.LANCHOR20]
-	add	x28, x22, x0
-	ldrh	w0, [x22, x0]
-	sub	w1, w1, #1
-	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
+	add	w0, w0, 1
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
+.L669:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L818
-	ldrh	w1, [x25]
-	ldrh	w0, [x19, 4]
+	beq	.L670
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	bne	.L670
+	adrp	x1, .LANCHOR37
+	add	x0, x1, :lo12:.LANCHOR37
+	strh	w19, [x1, #:lo12:.LANCHOR37]
+	ldr	w1, [x21, 4]
+	str	w1, [x0, 8]
+	ldrh	w1, [x21, 8]
+	strh	w1, [x0, 4]
+.L671:
+	adrp	x19, .LANCHOR37
+	mov	w0, 65535
+	add	x20, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bne	.L818
-	ldrh	w1, [x25, 8]
-	mov	w0, 64245
+	beq	.L685
+	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L807
-.L818:
-	mov	w5, 0
-.L808:
-	ldr	x0, [x29, 112]
-	ldrh	w0, [x0]
-	cmp	w5, w0
-	bge	.L814
-	ldrh	w0, [x28]
+	beq	.L675
+	add	x0, x22, :lo12:.LANCHOR148
+	lsl	w1, w1, 10
 	mov	w2, 1
-	str	w5, [x29, 108]
+	str	w1, [x0, 4]
 	mov	w1, w2
-	orr	w0, w5, w0, lsl 10
-	str	w0, [x20, 4]
-	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x20]
-	ldr	w5, [x29, 108]
+	ldr	w0, [x22, #:lo12:.LANCHOR148]
 	cmn	w0, #1
-	beq	.L812
-	ldrh	w0, [x25, 8]
-	cmp	w23, w0
-	bls	.L812
-	ldrh	w2, [x25]
-	ldrh	w1, [x19, 4]
-	cmp	w2, w1
-	bne	.L812
-	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x20, 4]
-	str	w1, [x21, x0]
-.L812:
-	add	w5, w5, 1
-	sxth	w5, w5
-	b	.L808
-.L807:
-	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR107]
-	sub	w5, w5, #1
-.L809:
-	cmp	w0, w5
-	blt	.L811
-.L814:
-	add	w4, w27, 1
-	sxth	w27, w4
-	b	.L799
-.L811:
-	lsl	w2, w0, 1
-	sxtw	x2, w2
-	lsl	x1, x2, 2
-	ldrh	w1, [x10, x1]
-	cmp	w23, w1
-	bls	.L810
-	add	x2, x2, 1
-	ubfiz	x1, x1, 2, 16
-	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x21, x1]
-.L810:
+	beq	.L675
+	ldrh	w1, [x21]
+	mov	w0, 61649
+	cmp	w1, w0
+	bne	.L675
+	ldr	w1, [x20, 8]
+	ldr	w0, [x21, 4]
+	cmp	w0, w1
+	bls	.L675
+	ldrh	w1, [x20, 4]
+	str	w0, [x20, 8]
+	ldrh	w0, [x21, 8]
+	strh	w1, [x19, #:lo12:.LANCHOR37]
+	strh	w0, [x20, 4]
+.L675:
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	add	x24, x19, :lo12:.LANCHOR37
+	mov	w1, 1
+	mov	w25, 61649
+	bl	FtlGetLastWrittenPage
+	sxth	w20, w0
 	add	w0, w0, 1
-	sxth	w0, w0
-	b	.L809
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadVonderInfo
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR27
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
-	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR27]
-	strh	w1, [x0, 10]
-	mov	w1, -3962
-	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR35
-	ldrh	w1, [x1, #:lo12:.LANCHOR35]
-	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR28
-	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w0, [x24, 2]
+	add	x24, x22, :lo12:.LANCHOR148
+.L677:
+	tbz	w20, #31, .L680
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC1
+	mov	w2, 253
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L679:
+	add	x0, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR36
-	ldr	x1, [x1, #:lo12:.LANCHOR36]
-	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR132
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
-	str	x1, [x0, 24]
-	adrp	x1, .LANCHOR131
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
-	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR133
-	ldr	x1, [x1, #:lo12:.LANCHOR133]
-	str	x1, [x0, 40]
-	bl	FtlMapTblRecovery
+	mov	w1, 65535
+	ldrh	w0, [x21, 12]
+	cmp	w0, w1
+	beq	.L682
+	adrp	x1, .LANCHOR2
+	ldr	w2, [x1, #:lo12:.LANCHOR2]
+	cmp	w0, w2
+	beq	.L682
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	lsr	w1, w1, 2
+	cmp	w2, w1
+	bcs	.L682
+	cmp	w0, w1
+	bcs	.L682
+	bl	FtlSysBlkNumInit
+.L682:
+	add	x19, x19, :lo12:.LANCHOR37
+	adrp	x21, .LANCHOR10
+	adrp	x23, .LANCHOR137
+	add	x19, x19, 32
+	add	x21, x21, :lo12:.LANCHOR10
+	add	x23, x23, :lo12:.LANCHOR137
+	add	x22, x22, :lo12:.LANCHOR148
+	mov	w20, 0
+.L683:
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	bcc	.L684
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+.L667:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlL2PDataInit,"ax",@progbits
+.L670:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L668
+.L680:
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x24, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x0, [x24, 8]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	cmn	w0, #1
+	beq	.L678
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	beq	.L679
+.L678:
+	sub	w20, w20, #1
+	sxth	w20, w20
+	b	.L677
+.L684:
+	ldrh	w2, [x23]
+	ldr	x0, [x22, 8]
+	mul	w1, w2, w20
+	lsl	w2, w2, 2
+	add	w20, w20, 1
+	add	x1, x0, x1, lsl 2
+	ldr	x0, [x19], 8
+	bl	ftl_memcpy
+	b	.L683
+.L685:
+	mov	w0, -1
+	b	.L667
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
-	.global	FtlL2PDataInit
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
-	stp	x29, x30, [sp, -64]!
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	stp	x29, x30, [sp, -96]!
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR130
-	adrp	x20, .LANCHOR30
+	adrp	x19, .LANCHOR148
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR115
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR130]
-	adrp	x22, .LANCHOR23
-	ldr	w2, [x20, #:lo12:.LANCHOR30]
-	adrp	x21, .LANCHOR33
-	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR136
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR33]
-	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR23]
-	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR136]
-	bl	ftl_memset
-	adrp	x0, .LANCHOR55
-	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	ldr	x6, [x23, #:lo12:.LANCHOR136]
-	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR55]
-	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR23]
-	add	x3, x0, x3, lsl 4
-.L829:
-	add	x4, x1, x5
-	cmp	x0, x3
-	bne	.L830
-	adrp	x1, .LANCHOR144
-	add	x0, x1, :lo12:.LANCHOR144
-	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR144]
-	ldr	w1, [x20, #:lo12:.LANCHOR30]
-	strh	w1, [x0, 10]
-	mov	w1, -3902
-	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR147
-	ldr	x23, [sp, 48]
-	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR147]
-	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR32
-	ldrh	w1, [x1, #:lo12:.LANCHOR32]
-	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR129
-	ldr	x1, [x1, #:lo12:.LANCHOR129]
-	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR135
-	ldr	x1, [x1, #:lo12:.LANCHOR135]
-	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR130]
-	ldp	x19, x20, [sp, 16]
-	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR134
-	ldr	x1, [x1, #:lo12:.LANCHOR134]
-	str	x1, [x0, 40]
-	ldp	x29, x30, [sp], 64
-	ret
-.L830:
-	and	x1, x1, -4
-	strh	w2, [x0]
-	add	x1, x6, x1
-	str	wzr, [x0, 4]
-	str	x1, [x0, 8]
-	add	x0, x0, 16
-	mov	x1, x4
-	b	.L829
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.FtlLoadMapInfo,"ax",@progbits
-	.align	2
-	.global	FtlLoadMapInfo
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapTblRecovery
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlVariablesInit,"ax",@progbits
-	.align	2
-	.global	FtlVariablesInit
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR150
-	mov	w1, -1
-	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR151
-	mov	w1, -1
-	str	x19, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR152
-	adrp	x19, .LANCHOR6
-	str	wzr, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR153
-	str	w1, [x0, #:lo12:.LANCHOR153]
-	adrp	x0, .LANCHOR35
-	mov	w1, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR35]
-	adrp	x0, .LANCHOR27
-	ldrh	w2, [x0, #:lo12:.LANCHOR27]
-	adrp	x0, .LANCHOR36
-	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	adrp	x0, .LANCHOR43
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	adrp	x0, .LANCHOR126
-	ldrh	w2, [x19, #:lo12:.LANCHOR6]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	mov	w2, 48
-	mov	w1, 0
-	adrp	x0, .LANCHOR39
-	add	x0, x0, :lo12:.LANCHOR39
-	bl	ftl_memset
-	mov	w2, 512
-	mov	w1, 0
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
-	bl	ftl_memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	ldr	x19, [sp, 16]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.SupperBlkListInit,"ax",@progbits
-	.align	2
-	.global	SupperBlkListInit
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR6
-	mov	w1, 0
-	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR6]
-	mov	w0, 6
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR40
-	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR45
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR48
-	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	add	x21, x19, :lo12:.LANCHOR148
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR5
-	str	x27, [sp, 80]
-	adrp	x26, .LANCHOR13
-	add	x25, x25, :lo12:.LANCHOR5
-	add	x26, x26, :lo12:.LANCHOR13
+	adrp	x26, .LANCHOR123
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LANCHOR42
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	adrp	x24, .LANCHOR5
+	str	x0, [x21, 8]
+	adrp	x20, .LANCHOR79
+	ldr	x0, [x26, #:lo12:.LANCHOR123]
+	str	x0, [x21, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	lsl	w2, w2, 1
 	bl	ftl_memset
-	mov	w21, 0
-	adrp	x0, .LANCHOR47
-	mov	w20, 0
-	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	str	xzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR41
-	strh	wzr, [x22, #:lo12:.LANCHOR48]
-	adrp	x27, .LANCHOR3
-	str	xzr, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR44
-	str	xzr, [x0, #:lo12:.LANCHOR44]
-.L837:
-	ldrh	w0, [x25]
-	cmp	w19, w0
-	bcs	.L843
-	adrp	x0, .LANCHOR19
-	ldrh	w8, [x27, #:lo12:.LANCHOR3]
-	mov	x6, 0
-	mov	w5, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L844
-.L839:
-	ldrb	w0, [x26, x6]
-	mov	w1, w19
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L838
-	add	w5, w5, w7
-	and	w5, w5, 65535
-.L838:
-	add	x6, x6, 1
-.L844:
-	cmp	w8, w6, uxth
-	bhi	.L839
-	cbz	w5, .L846
-	mov	w0, 32768
-	sdiv	w5, w0, w5
-.L840:
-	ldr	x1, [x24, #:lo12:.LANCHOR40]
-	mov	w0, 6
-	umaddl	x0, w19, w0, x1
-	strh	w5, [x0, 4]
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L841
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L841
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	beq	.L841
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x0]
-	cbnz	w0, .L842
-	add	w21, w21, 1
-	mov	w0, w19
-	and	w21, w21, 65535
-	bl	INSERT_FREE_LIST
-.L841:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L837
-.L846:
-	mov	w5, 0
-	b	.L840
-.L842:
-	add	w20, w20, 1
-	mov	w0, w19
-	and	w20, w20, 65535
-	bl	INSERT_DATA_LIST
-	b	.L841
-.L843:
-	strh	w20, [x23, #:lo12:.LANCHOR45]
-	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR48]
-	cmp	w20, w0
-	ble	.L845
-	adrp	x1, .LANCHOR154
-	adrp	x0, .LC1
-	mov	w2, 2154
-	add	x1, x1, :lo12:.LANCHOR154
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L845:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L698
+.L706:
+	mov	w0, -1
+.L697:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.ftl_check_vpc,"ax",@progbits
-	.align	2
-	.global	ftl_check_vpc
-	.type	ftl_check_vpc, %function
-ftl_check_vpc:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR61
-	add	x23, x23, :lo12:.LANCHOR61
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR155
-	stp	x27, x28, [sp, 80]
-	add	x1, x21, :lo12:.LANCHOR155
-	adrp	x20, check_vpc_table
-	bl	printf
-	add	x19, x20, :lo12:check_vpc_table
-	mov	w2, 8192
-	mov	w1, 0
-	mov	x0, x19
-	bl	ftl_memset
-.L849:
-	ldr	w0, [x23]
-	cmp	w22, w0
-	bcc	.L851
-	adrp	x22, .LANCHOR5
-	adrp	x24, .LC95
-	add	x22, x22, :lo12:.LANCHOR5
-	add	x26, x20, :lo12:check_vpc_table
-	add	x24, x24, :lo12:.LC95
-	mov	w23, 0
-	mov	w19, 0
-	adrp	x25, .LANCHOR42
-.L852:
-	ldrh	w0, [x22]
-	cmp	w0, w19
-	bhi	.L854
-	adrp	x0, .LANCHOR47
-	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L855
-	adrp	x0, .LANCHOR48
-	adrp	x25, .LC96
-	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC96
-	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR40
-	mov	x24, x0
-	mov	w22, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR40]
-	adrp	x27, .LANCHOR42
-	mov	w28, 6
-	sub	x19, x19, x1
-	mov	x1, -6148914691236517206
-	asr	x19, x19, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x19, x19, x1
-	and	w19, w19, 65535
-.L856:
-	cmp	w22, w26
-	bne	.L858
-.L855:
-	cbz	w23, .L848
+.L698:
+	add	x27, x20, :lo12:.LANCHOR79
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+	sxth	w22, w0
+	add	w0, w0, 1
+	mov	w28, 61604
+	strh	w0, [x27, 2]
+	mov	w27, 19539
+	movk	w27, 0x4654, lsl 16
+.L700:
+	tbz	w22, #31, .L703
+	adrp	x1, .LANCHOR151
 	adrp	x0, .LC1
-	mov	w2, 2321
-	add	x1, x21, :lo12:.LANCHOR155
+	mov	w2, 1448
+	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L848:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L851:
-	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w22
-	bl	log2phys
-	ldr	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L850
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	and	x0, x0, 65535
-	ldrh	w1, [x19, x0, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x19, x0, lsl 1]
-.L850:
-	add	w22, w22, 1
-	b	.L849
-.L854:
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x28, x19, 1, 16
-	sxtw	x27, w19
-	ldrh	w2, [x0, x28]
-	ldrh	w3, [x26, x27, lsl 1]
-	cmp	w2, w3
-	beq	.L853
-	mov	w1, w19
-	mov	x0, x24
+.L702:
+	adrp	x1, .LANCHOR23
+	ldrh	w0, [x24, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L705
+	adrp	x1, .LANCHOR151
+	adrp	x0, .LC1
+	mov	w2, 1450
+	add	x1, x1, :lo12:.LANCHOR151
+	add	x0, x0, :lo12:.LC1
 	bl	printf
+.L705:
+	add	x22, x19, :lo12:.LANCHOR148
+	adrp	x19, .LANCHOR39
+	add	x21, x19, :lo12:.LANCHOR39
+	mov	w2, 48
+	mov	x0, x21
+	ldr	x1, [x22, 8]
+	bl	ftl_memcpy
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	mov	w1, 65535
-	ldrh	w0, [x0, x28]
-	cmp	w0, w1
-	beq	.L853
-	ldrh	w1, [x26, x27, lsl 1]
-	cmp	w1, w0
-	csinc	w23, w23, wzr, ls
-.L853:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L852
-.L858:
-	ldr	x1, [x27, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L857
-	ldrh	w3, [x20, w19, sxtw 1]
-	mov	w23, 1
-	mov	w1, w19
-	mov	x0, x25
-	bl	printf
-.L857:
-	ldr	x0, [x24, #:lo12:.LANCHOR40]
-	umull	x19, w19, w28
-	ldrh	w19, [x0, x19]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L855
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	b	.L856
-	.size	ftl_check_vpc, .-ftl_check_vpc
-	.section	.text.FtlGcPageVarInit,"ax",@progbits
-	.align	2
-	.global	FtlGcPageVarInit
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR95
-	mov	w1, 255
-	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR97
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR21
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR96
-	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	ldr	x1, [x22, 8]
 	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	mov	w0, 12
-	mov	w1, 255
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR98
-	ldr	x0, [x0, #:lo12:.LANCHOR98]
-	bl	ftl_memset
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	FtlGcBufInit
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
-	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR156
-	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	stp	x27, x28, [sp, 80]
-	mov	w0, 65535
-	ldrh	w19, [x21, #:lo12:.LANCHOR156]
-	mov	w28, w1
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w19, w0
-	beq	.L892
-	cbnz	w19, .L876
-.L877:
-	bl	FtlGcPageVarInit
-	b	.L878
-.L892:
-	mov	w19, 0
-.L876:
-	adrp	x0, .LANCHOR19
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w28
-	beq	.L877
-.L878:
-	adrp	x27, .LANCHOR23
-	add	x27, x27, :lo12:.LANCHOR23
-	mov	w22, 0
-	mov	w23, 65535
-.L886:
-	ldrh	w0, [x20]
-	strb	wzr, [x20, 8]
-	cmp	w0, w23
-	beq	.L893
-	adrp	x25, .LANCHOR24
-	adrp	x26, .LANCHOR3
-	add	x25, x25, :lo12:.LANCHOR24
-	add	x26, x26, :lo12:.LANCHOR3
-.L889:
-	adrp	x1, .LANCHOR91
-	adrp	x24, .LANCHOR120
-	ldrh	w7, [x27]
-	add	x5, x20, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR92
-	ldr	x0, [x24, #:lo12:.LANCHOR120]
-	mov	w3, 0
-	ldr	x8, [x1, #:lo12:.LANCHOR92]
-	ldrh	w1, [x26]
-	ldrh	w10, [x25]
-	add	x1, x1, 8
-	add	x1, x20, x1, lsl 1
-.L880:
-	cmp	x1, x5
-	bne	.L882
-	mov	w1, w3
-	str	w3, [x29, 108]
-	mov	w2, 0
-	bl	FlashReadPages
-	ldr	w3, [x29, 108]
-	mov	x11, 0
-	ubfiz	x12, x3, 5, 16
-.L883:
-	cmp	x11, x12
-	bne	.L887
-	add	w19, w19, 1
-	add	w22, w22, 1
-	and	w19, w19, 65535
-	cmp	w28, w22
-	adrp	x1, .LANCHOR19
-	bls	.L888
-.L890:
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w19
-	bhi	.L889
-.L893:
-	mov	w2, 0
-	b	.L879
-.L882:
-	ldrh	w4, [x5]
-	cmp	w4, w23
-	beq	.L881
-	ubfiz	x2, x3, 5, 16
-	orr	w4, w19, w4, lsl 10
-	add	x2, x0, x2
-	str	w4, [x2, 4]
-	mul	w4, w3, w7
-	asr	w4, w4, 2
-	add	x4, x6, x4, sxtw 2
-	str	x4, [x2, 8]
-	mul	w4, w3, w10
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	asr	w4, w4, 2
-	add	x4, x8, x4, sxtw 2
-	str	x4, [x2, 16]
-.L881:
-	add	x5, x5, 2
-	b	.L880
-.L887:
-	ldr	x6, [x24, #:lo12:.LANCHOR120]
-	add	x5, x6, x11
-	ldr	w4, [x5, 4]
-	lsr	w0, w4, 10
-	bl	P2V_plane
-	and	w2, w0, 65535
-	ldr	w0, [x6, x11]
-	cbnz	w0, .L884
-	ldr	x0, [x5, 16]
-	add	x11, x11, 32
-	ldrh	w1, [x0]
-	cmp	w1, w23
-	bne	.L885
+	add	x1, x1, 48
+	bl	ftl_memcpy
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	ldr	x0, [x22, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	bl	ftl_memcpy
+	ldr	w1, [x19, #:lo12:.LANCHOR39]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L706
+	add	x20, x20, :lo12:.LANCHOR79
+	adrp	x0, .LANCHOR10
+	ldrh	w1, [x21, 8]
+	ldrb	w2, [x21, 10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	strh	w1, [x20, 6]
+	cmp	w2, w0
+	bne	.L706
 	adrp	x0, .LANCHOR152
-	mov	w1, 1
+	adrp	x2, .LANCHOR61
+	adrp	x3, .LANCHOR3
 	str	w1, [x0, #:lo12:.LANCHOR152]
-.L879:
-	strh	w19, [x20, 2]
-	mov	w0, -1
-	strb	w2, [x20, 6]
-	mov	w1, w19
-	strh	w0, [x21, #:lo12:.LANCHOR156]
-	mov	x0, x20
-	bl	ftl_sb_update_avl_pages
-	b	.L891
-.L885:
-	ldp	w2, w0, [x0, 8]
-	mov	w1, w4
-	bl	FtlGcUpdatePage
-	b	.L883
-.L884:
-	adrp	x0, .LANCHOR42
-	ldrh	w1, [x20]
-	mov	w19, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x20]
-	bl	INSERT_FREE_LIST
+	adrp	x0, .LANCHOR19
+	ldrh	w3, [x3, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR61]
+	adrp	x2, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR12]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR34
+	str	w0, [x2, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR7
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
+	cmp	w1, w2
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR78
+	strh	w0, [x3, #:lo12:.LANCHOR78]
+	bls	.L707
+	adrp	x1, .LANCHOR151
+	adrp	x0, .LC1
+	mov	w2, 1472
+	add	x1, x1, :lo12:.LANCHOR151
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L707:
+	add	x1, x19, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR51
+	add	x3, x0, :lo12:.LANCHOR51
+	adrp	x20, .LANCHOR80
+	ldrh	w2, [x1, 16]
+	ldrh	w6, [x1, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR51]
+	lsr	w4, w2, 6
+	and	w2, w2, 63
+	strb	w2, [x3, 6]
+	ldrb	w2, [x1, 11]
+	strb	w2, [x3, 8]
+	add	x2, x20, :lo12:.LANCHOR80
+	strh	w4, [x3, 2]
+	mov	w3, -1
+	strh	w3, [x20, #:lo12:.LANCHOR80]
+	strh	wzr, [x2, 2]
+	strb	wzr, [x2, 6]
+	strb	wzr, [x2, 8]
+	adrp	x2, .LANCHOR52
+	ldrh	w3, [x1, 18]
+	add	x4, x2, :lo12:.LANCHOR52
+	strh	w3, [x2, #:lo12:.LANCHOR52]
+	mov	x21, x2
+	ldrh	w3, [x1, 20]
+	lsr	w5, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x4, 6]
+	ldrb	w3, [x1, 12]
+	strh	w5, [x4, 2]
+	strb	w3, [x4, 8]
+	adrp	x4, .LANCHOR53
+	ldrh	w3, [x1, 22]
+	add	x5, x4, :lo12:.LANCHOR53
+	strh	w3, [x4, #:lo12:.LANCHOR53]
+	mov	x22, x4
+	ldrh	w3, [x1, 24]
+	lsr	w7, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x5, 6]
+	ldrb	w3, [x1, 13]
+	strb	w3, [x5, 8]
+	adrp	x3, .LANCHOR67
+	strh	w7, [x5, 2]
+	ldr	w5, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR67]
+	adrp	x3, .LANCHOR64
+	str	wzr, [x3, #:lo12:.LANCHOR64]
+	adrp	x3, .LANCHOR62
+	str	wzr, [x3, #:lo12:.LANCHOR62]
+	adrp	x3, .LANCHOR66
+	str	wzr, [x3, #:lo12:.LANCHOR66]
+	adrp	x3, .LANCHOR72
+	str	w5, [x3, #:lo12:.LANCHOR72]
+	adrp	x3, .LANCHOR73
+	str	wzr, [x3, #:lo12:.LANCHOR73]
+	adrp	x3, .LANCHOR76
+	str	wzr, [x3, #:lo12:.LANCHOR76]
+	adrp	x3, .LANCHOR65
+	str	wzr, [x3, #:lo12:.LANCHOR65]
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR70
+	ldr	w5, [x1, #:lo12:.LANCHOR70]
+	cmp	w3, w5
+	bls	.L708
+	str	w3, [x1, #:lo12:.LANCHOR70]
+.L708:
+	add	x19, x19, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR71
+	ldr	w3, [x1, #:lo12:.LANCHOR71]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L709
+	str	w2, [x1, #:lo12:.LANCHOR71]
+.L709:
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L710
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	make_superblock
+.L710:
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR52
+	cmp	w2, w1
+	beq	.L711
+	bl	make_superblock
+.L711:
+	ldrh	w2, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR53
+	cmp	w2, w1
+	beq	.L712
+	bl	make_superblock
+.L712:
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR80
+	cmp	w2, w1
+	beq	.L713
+	bl	make_superblock
+.L713:
+	mov	w0, 0
+	b	.L697
+.L703:
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x21, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x0, [x21, 8]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	w0, [x21]
+	cmn	w0, #1
+	beq	.L701
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L701
+	ldr	x0, [x26, #:lo12:.LANCHOR123]
+	ldrh	w0, [x0]
+	cmp	w0, w28
+	beq	.L702
+.L701:
+	sub	w22, w22, #1
+	sxth	w22, w22
+	b	.L700
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FlashProgPages,"ax",@progbits
+	.align	2
+	.global	FlashProgPages
+	.type	FlashProgPages, %function
+FlashProgPages:
+	stp	x29, x30, [sp, -160]!
+	ubfiz	x1, x1, 5, 32
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR153
+	stp	w3, w2, [x29, 104]
+	add	x2, x21, :lo12:.LANCHOR0
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR105
+	stp	x27, x28, [sp, 80]
+	mov	x19, x0
+	ldrh	w23, [x2, 12]
+	add	x20, x0, x1
+	stp	x25, x26, [sp, 64]
+	add	x22, x22, :lo12:.LANCHOR153
+	mov	x25, x0
+	add	x28, x24, :lo12:.LANCHOR105
+	lsl	w27, w23, 3
+.L720:
+	cmp	x25, x20
+	bne	.L732
+	ldr	w0, [x29, 104]
+	cbz	w0, .L745
+	adrp	x21, .LANCHOR120
+	adrp	x22, .LANCHOR122
+	mov	x23, x21
+	mov	x24, x22
+.L734:
+	cmp	x19, x20
+	beq	.L745
+	ldr	x1, [x21, #:lo12:.LANCHOR120]
+	ldr	x0, [x22, #:lo12:.LANCHOR122]
+	str	wzr, [x1]
+	str	wzr, [x0]
+	stp	x1, x0, [x29, 136]
+	mov	w1, 1
+	ldr	w2, [x19, 4]
+	add	x0, x29, 128
+	str	w2, [x29, 132]
+	ldr	w2, [x29, 108]
+	bl	FlashReadPages
+	ldr	w26, [x29, 128]
+	cmn	w26, #1
+	bne	.L735
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
+	bl	printf
+	str	w26, [x19]
+.L735:
+	ldr	x0, [x19, 16]
+	cbz	x0, .L736
+	ldr	w2, [x0]
+	ldr	x0, [x24, #:lo12:.LANCHOR122]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L736
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	bl	printf
 	mov	w0, -1
-	strh	w0, [x20]
-	bl	FtlGcPageVarInit
-	b	.L886
-.L888:
-	ldrh	w0, [x21, #:lo12:.LANCHOR156]
-	cmp	w0, w23
-	beq	.L890
-	add	w0, w0, w22
-	strh	w0, [x21, #:lo12:.LANCHOR156]
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	cmp	w0, w19
-	bls	.L890
-.L891:
-	ldp	x19, x20, [sp, 16]
+	str	w0, [x19]
+.L736:
+	ldr	x0, [x19, 8]
+	cbz	x0, .L737
+	ldr	w2, [x0]
+	ldr	x0, [x23, #:lo12:.LANCHOR120]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L737
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
+	bl	printf
 	mov	w0, -1
+	str	w0, [x19]
+.L737:
+	add	x19, x19, 32
+	b	.L734
+.L732:
+	ldr	x0, [x25, 8]
+	cbz	x0, .L721
+	ldr	x0, [x25, 16]
+	cbnz	x0, .L722
+.L721:
+	adrp	x0, .LC1
+	mov	w2, 130
+	mov	x1, x22
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L722:
+	ldr	w0, [x25, 4]
+	add	x2, x29, 120
+	add	x1, x29, 124
+	bl	l2p_addr_tran.isra.0
+	ldr	w0, [x29, 120]
+	cbnz	w0, .L723
+	ldr	w0, [x29, 124]
+	cmp	w27, w0
+	bls	.L723
+	adrp	x21, .LANCHOR153
+	adrp	x22, .LC79
+	mov	w23, -1
+	add	x21, x21, :lo12:.LANCHOR153
+	add	x22, x22, :lo12:.LC79
+	b	.L756
+.L725:
+	ldr	w2, [x19, 4]
+	mov	x1, x21
+	str	w23, [x19]
+	mov	x0, x22
+	add	x19, x19, 32
+	bl	printf
+	ldr	x1, [x19, -24]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	ldr	x1, [x19, -16]
+	mov	w3, 4
+	adrp	x0, .LC81
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC81
+	bl	rknand_print_hex
+.L756:
+	cmp	x19, x20
+	bne	.L725
+.L745:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 160
 	ret
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FlashTestBlk,"ax",@progbits
+.L723:
+	ldr	x1, [x25, 8]
+	tst	x1, 63
+	beq	.L739
+	adrp	x0, .LANCHOR120
+	ldr	x26, [x0, #:lo12:.LANCHOR120]
+	cmp	x1, x26
+	beq	.L726
+	adrp	x0, .LANCHOR12
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
+	mov	x0, x26
+	lsl	w2, w2, 9
+	bl	ftl_memcpy
+.L726:
+	add	x0, x24, :lo12:.LANCHOR105
+	ldr	w1, [x29, 124]
+	ldr	x3, [x25, 16]
+	mov	x2, x26
+	ldr	x6, [x0, 16]
+	ldrb	w0, [x29, 120]
+	blr	x6
+	cbnz	w0, .L727
+	str	wzr, [x25]
+.L728:
+	add	x0, x21, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L730
+	ldrb	w0, [x29, 120]
+	add	x2, x26, 2048
+	ldr	x6, [x28, 16]
+	ldr	w1, [x29, 124]
+	ldr	x3, [x25, 16]
+	add	w1, w23, w1
+	add	x3, x3, 8
+	blr	x6
+	cbz	w0, .L730
+	mov	w0, -1
+	str	w0, [x25]
+.L730:
+	add	x25, x25, 32
+	b	.L720
+.L739:
+	mov	x26, x1
+	b	.L726
+.L727:
+	mov	w0, -1
+	str	w0, [x25]
+	b	.L728
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
-	.global	FlashTestBlk
-	.type	FlashTestBlk, %function
-FlashTestBlk:
+	.global	FtlLowFormatEraseBlock
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
 	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	cmp	w19, 11
-	bls	.L901
-	add	x0, x29, 64
-	mov	w2, 32
-	mov	w1, 165
-	adrp	x20, ftl_temp_buf
-	add	x20, x20, :lo12:ftl_temp_buf
-	stp	x20, x0, [x29, 40]
-	bl	ftl_memset
-	lsl	w19, w19, 10
-	mov	w2, 8
-	mov	w1, 90
-	mov	x0, x20
-	bl	ftl_memset
-	mov	w2, 1
-	str	w19, [x29, 36]
-	mov	w1, w2
-	add	x0, x29, 32
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	add	x0, x29, 32
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x29, 32]
-	mov	w2, 1
-	mov	w1, 0
-	cmp	w0, 0
-	add	x0, x29, 32
-	csetm	w19, ne
-	bl	FlashEraseBlocks
-.L899:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 128
-	ret
-.L901:
-	mov	w19, 0
-	b	.L899
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FlashGetBadBlockList,"ax",@progbits
-	.align	2
-	.global	FlashGetBadBlockList
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-	stp	x29, x30, [sp, -32]!
-	mov	w2, 256
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	mov	w20, w1
-	mov	w1, 255
-	bl	ftl_memset
-	adrp	x0, .LANCHOR105
-	mov	w1, w20
-	ldr	x2, [x0, #:lo12:.LANCHOR105]
-	mov	x0, x19
-	blr	x2
-	and	w0, w0, 65535
-	cmp	w0, 50
-	bls	.L904
-	mov	w2, 256
-	mov	w1, 255
-	mov	x0, x19
-	bl	ftl_memset
-	mov	w0, 0
-.L904:
-	adrp	x1, .LANCHOR0+14
-	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
-	cmp	w1, 4
-	bne	.L908
-	mov	x1, 0
-.L906:
-	cmp	w0, w1, uxth
-	bhi	.L907
-.L908:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L907:
-	ldrh	w2, [x19, x1, lsl 1]
-	lsr	w2, w2, 1
-	strh	w2, [x19, x1, lsl 1]
-	add	x1, x1, 1
-	b	.L906
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.ftl_memcpy,"ax",@progbits
-	.align	2
-	.global	ftl_memcpy
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	uxtw	x2, w2
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.FtlBbmTblFlush,"ax",@progbits
-	.align	2
-	.global	FtlBbmTblFlush
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-	stp	x29, x30, [sp, -96]!
+	adrp	x7, .LANCHOR13
+	add	x7, x7, :lo12:.LANCHOR13
+	mov	x5, 0
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR108
+	and	w23, w0, 65535
+	adrp	x0, .LANCHOR111
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR106
 	stp	x21, x22, [sp, 32]
-	add	x20, x19, :lo12:.LANCHOR106
-	adrp	x22, .LANCHOR107
-	ldr	x1, [x23, #:lo12:.LANCHOR108]
+	adrp	x20, .LANCHOR3
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR37
-	str	x27, [sp, 80]
-	add	x25, x21, :lo12:.LANCHOR37
-	ldr	x0, [x22, #:lo12:.LANCHOR107]
-	adrp	x26, .LANCHOR10
-	stp	x0, x1, [x20, 8]
-	adrp	x1, .LANCHOR23
-	adrp	x27, .LANCHOR137
-	add	x25, x25, 32
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	and	w22, w1, 255
+	str	w23, [x0, #:lo12:.LANCHOR111]
+	adrp	x21, .LANCHOR106
+	adrp	x0, .LANCHOR119
+	adrp	x1, .LANCHOR124
+	adrp	x25, .LANCHOR24
+	ldrh	w8, [x20, #:lo12:.LANCHOR3]
+	ldr	x6, [x21, #:lo12:.LANCHOR106]
 	mov	w24, 0
-	add	x26, x26, :lo12:.LANCHOR10
-	add	x27, x27, :lo12:.LANCHOR137
+	ldr	x10, [x0, #:lo12:.LANCHOR119]
+	mov	w19, 0
+	ldr	x11, [x1, #:lo12:.LANCHOR124]
+	ldrh	w12, [x25, #:lo12:.LANCHOR24]
+	stp	x27, x28, [sp, 80]
+	str	x0, [x29, 112]
+.L759:
+	cmp	w8, w5, uxth
+	bhi	.L763
+	cbz	w24, .L758
+	mov	w2, w24
+	ubfiz	x24, x24, 5, 16
+	mov	x26, 0
 	mov	w1, 0
-	bl	ftl_memset
-.L912:
-	ldrh	w0, [x26]
-	cmp	w24, w0
-	blt	.L913
-	add	x19, x19, :lo12:.LANCHOR106
-	add	x20, x21, :lo12:.LANCHOR37
-	mov	w2, 16
-	mov	w1, 255
-	adrp	x24, .LC97
-	adrp	x26, .LANCHOR20
-	ldr	x27, [x19, 16]
-	add	x24, x24, :lo12:.LC97
-	add	x26, x26, :lo12:.LANCHOR20
-	mov	w25, 0
-	mov	x0, x27
-	bl	ftl_memset
-	mov	w0, -3887
-	strh	w0, [x27]
-	ldr	w0, [x20, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR37]
-	mov	w21, 0
-	strh	w0, [x27, 2]
-	ldrh	w0, [x20, 4]
-	strh	w0, [x27, 8]
-	ldrh	w0, [x20, 6]
-	strh	w0, [x27, 10]
-	adrp	x0, .LANCHOR2
-	ldr	w0, [x0, #:lo12:.LANCHOR2]
-	strh	w0, [x27, 12]
-.L914:
-	ldrh	w4, [x27, 10]
-	ldrh	w1, [x20]
-	ldrh	w2, [x20, 2]
-	ldrh	w3, [x20, 4]
-	ldr	x0, [x22, #:lo12:.LANCHOR107]
-	str	x0, [x19, 8]
-	ldr	x0, [x23, #:lo12:.LANCHOR108]
-	str	x0, [x19, 16]
-	orr	w0, w2, w1, lsl 10
-	str	wzr, [x19]
-	str	w0, [x19, 4]
-	mov	x0, x24
-	bl	printf
-	mov	w3, 1
-	mov	x0, x19
-	mov	w1, w3
-	mov	w2, w3
-	bl	FlashProgPages
-	ldrh	w0, [x26]
-	ldrh	w1, [x20, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L915
-	ldr	w0, [x20, 8]
-	mov	w2, 1
-	ldrh	w1, [x20, 4]
-	add	w0, w0, 1
-	str	w0, [x20, 8]
-	str	w0, [x27, 4]
-	ldrh	w0, [x20]
-	strh	w0, [x27, 8]
-	strh	w0, [x20, 4]
-	adrp	x0, .LANCHOR111
-	strh	w1, [x20]
-	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	str	w1, [x19, 4]
-	strh	wzr, [x20, 2]
-	str	w1, [x0, 4]
-	mov	w1, w2
+	mov	x0, x6
 	bl	FlashEraseBlocks
+.L767:
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	add	x1, x0, x26
+	ldr	w0, [x0, x26]
+	cmn	w0, #1
+	bne	.L766
+	ldr	w0, [x1, 4]
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.L766:
+	add	x26, x26, 32
+	cmp	x26, x24
+	bne	.L767
+	cbz	w22, .L780
+	adrp	x0, .LANCHOR20
+	mov	w26, 1
+	ldrh	w28, [x0, #:lo12:.LANCHOR20]
+.L768:
+	add	x0, x20, :lo12:.LANCHOR3
+	adrp	x27, .LANCHOR13
+	str	x0, [x29, 120]
+	mov	w24, 0
+	add	x0, x27, :lo12:.LANCHOR13
+	str	x0, [x29, 104]
+.L776:
+	ldr	x0, [x29, 120]
+	mov	x5, 0
+	ldr	x6, [x21, #:lo12:.LANCHOR106]
+	mov	w20, 0
+	ldrh	w11, [x25, #:lo12:.LANCHOR24]
+	ldrh	w7, [x0]
+	adrp	x0, .LANCHOR118
+	ldr	x8, [x0, #:lo12:.LANCHOR118]
+	ldr	x0, [x29, 112]
+	ldr	x10, [x0, #:lo12:.LANCHOR119]
+.L769:
+	cmp	w7, w5, uxth
+	bhi	.L772
+	cbz	w20, .L758
+	mov	w1, w20
 	mov	w3, 1
-	mov	x0, x19
-	mov	w2, w3
-	mov	w1, w3
+	mov	w2, w26
+	mov	x0, x6
 	bl	FlashProgPages
-.L915:
-	ldrh	w0, [x20, 2]
-	add	w0, w0, 1
-	strh	w0, [x20, 2]
-	ldr	w0, [x19]
-	cmn	w0, #1
-	bne	.L916
-	ldr	w1, [x19, 4]
-	add	w21, w21, 1
-	adrp	x0, .LC98
-	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC98
-	bl	printf
-	cmp	w21, 3
-	bls	.L914
-	ldr	w1, [x19, 4]
-	adrp	x0, .LC99
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC99
-	bl	printf
-.L918:
-	b	.L918
-.L913:
-	ldrh	w2, [x27]
-	ldr	x1, [x25], 8
-	ldr	x0, [x20, 8]
-	mul	w3, w24, w2
-	lsl	w2, w2, 2
+	mov	x27, 0
+	ubfiz	x1, x20, 5, 16
+.L775:
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	add	x3, x0, x27
+	ldr	w0, [x0, x27]
+	cbz	w0, .L774
+	ldr	w0, [x3, 4]
+	add	w19, w19, 1
+	str	x1, [x29, 96]
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldr	x1, [x29, 96]
+.L774:
+	add	x27, x27, 32
+	cmp	x1, x27
+	bne	.L775
 	add	w24, w24, 1
-	add	x0, x0, x3, sxtw 2
-	bl	ftl_memcpy
-	b	.L912
-.L919:
-	mov	w25, 1
-	b	.L914
-.L916:
-	cbz	w25, .L919
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	cmp	w28, w24, uxth
+	bhi	.L776
+	mov	x24, 0
+.L778:
+	cbz	w22, .L777
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	add	x1, x0, x24
+	ldr	w0, [x0, x24]
+	cbnz	w0, .L777
+	ldr	w0, [x1, 4]
+	mov	w1, 1
+	lsr	w0, w0, 10
+	bl	FtlFreeSysBlkQueueIn
+.L777:
+	add	x24, x24, 32
+	cmp	x24, x27
+	bne	.L778
+	cmp	w23, 63
+	ccmp	w22, 0, 0, hi
+	beq	.L758
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	mov	w2, w20
+	mov	w1, w26
+	bl	FlashEraseBlocks
+.L758:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",@progbits
-	.align	2
-	.global	allocate_data_superblock
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	stp	x29, x30, [sp, -112]!
+.L763:
+	lsl	x0, x5, 5
+	mov	w1, w23
+	str	wzr, [x6, x0]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+	and	w13, w0, 65535
+	mov	w14, w13
+	cbz	w22, .L760
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L761
+.L760:
+	mov	w0, w14
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L762
+	ubfiz	x0, x24, 5, 16
+	mul	w1, w24, w12
+	add	x0, x6, x0
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	lsl	w13, w13, 10
+	asr	w1, w1, 2
+	add	x1, x11, x1, sxtw 2
+	str	w13, [x0, 4]
+	stp	x10, x1, [x0, 8]
+.L761:
+	add	x5, x5, 1
+	b	.L759
+.L762:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L761
+.L780:
+	mov	w26, 0
+	mov	w28, 2
+	b	.L768
+.L772:
+	lsl	x0, x5, 5
+	mov	w1, w23
+	str	wzr, [x6, x0]
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x5]
+	bl	V2P_block
+	and	w12, w0, 65535
+	mov	w13, w12
+	cbz	w22, .L770
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L771
+.L770:
+	mov	w0, w13
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L771
+	ubfiz	x0, x20, 5, 16
+	mul	w1, w20, w11
+	add	x0, x6, x0
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	add	w12, w24, w12, lsl 10
+	asr	w1, w1, 2
+	add	x1, x10, x1, sxtw 2
+	str	w12, [x0, 4]
+	stp	x8, x1, [x0, 8]
+.L771:
+	add	x5, x5, 1
+	b	.L769
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 65535
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	adrp	x28, .LANCHOR48
-	stp	x23, x24, [sp, 48]
-	add	x23, x28, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
-	adrp	x27, .LANCHOR45
 	mov	x19, x0
+	ldr	x20, [x0, 16]
 	stp	x21, x22, [sp, 32]
-	add	x0, x27, :lo12:.LANCHOR45
-	stp	x25, x26, [sp, 64]
-	str	x0, [x29, 104]
-.L922:
-	ldr	x1, [x29, 104]
-	adrp	x24, .LANCHOR5
-	ldrh	w0, [x28, #:lo12:.LANCHOR48]
-	ldrh	w1, [x1]
-	add	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	ldrh	w0, [x0]
+	str	x23, [sp, 48]
 	cmp	w0, w1
-	ble	.L923
-	adrp	x1, .LANCHOR157
+	bne	.L802
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L803
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 2588
-	add	x1, x1, :lo12:.LANCHOR157
+	mov	w2, 641
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L923:
-	adrp	x0, .LANCHOR53
-	add	x0, x0, :lo12:.LANCHOR53
-	cmp	x19, x0
-	bne	.L948
-	adrp	x1, .LANCHOR87
-	ldrh	w0, [x23]
-	ldr	w1, [x1, #:lo12:.LANCHOR87]
-	mul	w1, w0, w1
-	lsr	w0, w0, 1
+.L803:
+	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
-	add	w1, w0, w1, lsr 2
-	ands	w1, w1, 65535
-	beq	.L924
-	sub	w1, w1, #1
-	and	w1, w1, 65535
-.L924:
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
-	bl	List_pop_index_node
-	and	w20, w0, 65535
-	ldrh	w0, [x23]
-	cbnz	w0, .L925
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	mov	w2, 2597
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L925:
-	ldrh	w0, [x23]
+	strh	w0, [x19, 8]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x20]
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	strh	wzr, [x19]
+	str	w0, [x19, 48]
+.L804:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L802:
+	ubfiz	x0, x0, 1, 16
+	adrp	x1, .LANCHOR123
+	adrp	x23, .LANCHOR115
+	ldr	x22, [x19, 40]
+	ldr	x1, [x1, #:lo12:.LANCHOR123]
+	ldrh	w21, [x20, x0]
+	adrp	x20, .LANCHOR148
+	ldrh	w0, [x19, 2]
+	add	x2, x20, :lo12:.LANCHOR148
+	orr	w0, w0, w21, lsl 10
+	str	w0, [x2, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	str	x1, [x2, 16]
+	str	x0, [x2, 8]
+	ldr	w2, [x19, 48]
+	str	w2, [x1, 4]
+	mov	w2, -1291
+	strh	w2, [x1, 8]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1]
+	strh	w21, [x1, 2]
+	adrp	x1, .LANCHOR20
+	ldrh	w2, [x1, #:lo12:.LANCHOR20]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+	ldrh	w4, [x19, 6]
+	mov	x1, 0
+	ldr	x3, [x23, #:lo12:.LANCHOR115]
+	mov	w2, 0
+.L805:
+	cmp	w4, w1, uxth
+	bhi	.L807
+	mov	w2, 1
+	mov	w3, 0
+	mov	w1, w2
+	add	x0, x20, :lo12:.LANCHOR148
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	b	.L804
+.L807:
+	ldr	w0, [x22, x1, lsl 2]
+	cmp	w21, w0, lsr 10
+	bne	.L806
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	ubfiz	x0, x2, 1, 16
+	str	w1, [x3, x0, lsl 2]
+	add	x0, x0, 1
+	ldr	w5, [x22, x1, lsl 2]
+	str	w5, [x3, x0, lsl 2]
+.L806:
+	add	x1, x1, 1
+	b	.L805
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
+	.align	2
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR66
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LANCHOR155
+	stp	x27, x28, [sp, 80]
+	adrp	x26, .LANCHOR20
+	stp	x19, x20, [sp, 16]
+	mov	w25, w1
+	mov	x19, x0
+	mov	x27, x2
+	add	x23, x23, :lo12:.LANCHOR66
+	add	x24, x24, :lo12:.LANCHOR155
+	add	x28, x26, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+.L813:
+	ldr	w0, [x23]
+	ldrh	w1, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x23]
+	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
-	strh	w0, [x23]
-	strh	w20, [x19]
+	cmp	w1, w0
+	bge	.L814
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L815
+.L814:
 	mov	x0, x19
-	bl	make_superblock
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L926
-	adrp	x1, .LANCHOR42
-	ubfiz	x0, x20, 1, 16
-	mov	w2, -1
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	strh	w2, [x1, x0]
-	mov	w0, w20
-	bl	INSERT_DATA_LIST
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x23]
-	add	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L922
-	mov	w2, 2608
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L922
-.L948:
-	mov	w1, 0
-	b	.L924
-.L926:
-	ldrh	w1, [x27, #:lo12:.LANCHOR45]
-	ldrh	w0, [x23]
-	add	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L928
-	adrp	x1, .LANCHOR157
+	bl	Ftl_write_map_blk_to_last_page
+.L815:
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L816
 	adrp	x0, .LC1
-	mov	w2, 2611
-	add	x1, x1, :lo12:.LANCHOR157
+	mov	w2, 699
+	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L928:
-	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR111
-	add	x26, x19, 16
-	mov	w21, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	mov	x4, x26
-	ldr	x3, [x25, #:lo12:.LANCHOR111]
-	mov	w6, 65535
-	ubfiz	x0, x0, 5, 16
-	add	x1, x3, 8
-	add	x0, x0, 8
-	add	x0, x3, x0
-.L929:
-	cmp	x0, x1
-	bne	.L931
-	cbnz	w21, .L932
-	adrp	x1, .LANCHOR157
+.L816:
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L817
 	adrp	x0, .LC1
-	mov	w2, 2622
-	add	x1, x1, :lo12:.LANCHOR157
+	mov	w2, 700
+	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L932:
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w0, w20
-	bne	.L933
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	mov	w2, 2624
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L933:
-	ldrb	w0, [x19, 8]
-	uxtw	x22, w20
-	adrp	x6, .LANCHOR43
-	adrp	x7, .LANCHOR14
-	adrp	x5, .LANCHOR72
-	adrp	x4, .LANCHOR73
-	cbnz	w0, .L934
-	ldr	x2, [x6, #:lo12:.LANCHOR43]
-	lsl	x1, x22, 1
-	ldrh	w0, [x2, x1]
-	cbz	w0, .L935
-	ldrh	w3, [x7, #:lo12:.LANCHOR14]
-	add	w0, w0, w3
-.L959:
-	strh	w0, [x2, x1]
-	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR72]
-	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR72]
-	mov	w0, w20
-	bl	ftl_set_blk_mode
-.L937:
-	ldr	x0, [x6, #:lo12:.LANCHOR43]
-	lsl	x22, x22, 1
-	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR76
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
-	cmp	w1, w2
-	bls	.L938
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L938:
-	ldr	w2, [x5, #:lo12:.LANCHOR72]
-	ldr	w1, [x4, #:lo12:.LANCHOR73]
-	ldrh	w0, [x7, #:lo12:.LANCHOR14]
-	madd	w0, w0, w2, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR74
-	str	w0, [x1, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR127
-	ldr	x1, [x0, #:lo12:.LANCHOR127]
-	ldr	w0, [x1, 16]
-	add	w0, w0, 1
-	str	w0, [x1, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR111]
-	ubfiz	x1, x21, 5, 16
-	add	x1, x1, 4
-	add	x2, x0, 4
-	add	x1, x0, x1
-.L939:
-	cmp	x1, x2
-	bne	.L940
-	ldrb	w1, [x19, 8]
-	mov	w2, w21
-	mov	x24, 0
-	bl	FlashEraseBlocks
+.L817:
+	ldrh	w1, [x19]
+	adrp	x21, .LANCHOR148
+	ldr	x0, [x19, 16]
+	add	x20, x21, :lo12:.LANCHOR148
+	mov	w2, 16
+	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 0
-.L941:
-	cmp	w21, w24, uxth
-	bhi	.L943
-	cbz	w1, .L944
-	mov	w0, w20
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L944:
-	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR42
-	cbnz	w0, .L945
-	ldr	x0, [x2, #:lo12:.LANCHOR42]
-	mov	w1, -1
-	strh	w1, [x0, x22]
-	mov	w0, w20
-	bl	INSERT_DATA_LIST
-	b	.L922
-.L931:
-	ldrh	w2, [x4]
-	stp	xzr, xzr, [x1]
-	cmp	w2, w6
-	beq	.L930
-	ubfiz	x5, x21, 5, 16
-	add	w21, w21, 1
-	add	x5, x3, x5
-	and	w21, w21, 65535
-	lsl	w2, w2, 10
-	str	w2, [x5, 4]
-.L930:
-	add	x1, x1, 32
-	add	x4, x4, 2
-	b	.L929
-.L935:
-	mov	w0, 2
-	b	.L959
-.L934:
-	ldr	x2, [x6, #:lo12:.LANCHOR43]
-	lsl	x0, x22, 1
-	ldrh	w1, [x2, x0]
-	add	w1, w1, 1
-	strh	w1, [x2, x0]
-	ldr	w0, [x4, #:lo12:.LANCHOR73]
+	ldrh	w0, [x19, 2]
+	str	w3, [x29, 108]
+	str	x27, [x20, 8]
+	orr	w0, w0, w3, lsl 10
+	str	w0, [x20, 4]
+	adrp	x0, .LANCHOR123
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
+	str	x0, [x20, 16]
+	bl	ftl_memset
+	ldr	x0, [x20, 16]
+	ldr	w1, [x19, 48]
+	ldr	w3, [x29, 108]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x0]
+	strh	w3, [x0, 2]
+	mov	w3, 1
+	strh	w25, [x0, 8]
+	mov	w1, w3
+	mov	w2, w3
+	mov	x0, x20
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	ldr	w1, [x21, #:lo12:.LANCHOR148]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR73]
-	mov	w0, w20
-	bl	ftl_set_blk_mode.part.6
-	b	.L937
-.L940:
-	ldr	w3, [x2]
-	and	w3, w3, -1024
-	str	w3, [x2], 32
-	b	.L939
-.L943:
-	ldr	x2, [x25, #:lo12:.LANCHOR111]
-	lsl	x0, x24, 5
-	add	x3, x2, x0
-	ldr	w2, [x2, x0]
-	cmn	w2, #1
-	bne	.L942
-	add	w1, w1, 1
-	ldr	w0, [x3, 4]
-	stp	w2, w1, [x29, 96]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
-	ldp	w2, w1, [x29, 96]
-	strh	w2, [x26]
-	ldrb	w0, [x19, 7]
-	sub	w0, w0, #1
-	strb	w0, [x19, 7]
-.L942:
-	add	x24, x24, 1
-	add	x26, x26, 2
-	b	.L941
-.L945:
-	adrp	x1, .LANCHOR19
-	adrp	x3, .LANCHOR70
-	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	strh	wzr, [x19, 2]
-	strh	w20, [x19]
-	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR70]
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR70]
-	ldr	x1, [x2, #:lo12:.LANCHOR42]
 	and	w0, w0, 65535
-	strh	w0, [x19, 4]
-	strh	w0, [x1, x22]
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L946
-	ldrb	w0, [x19, 7]
-	cbnz	w0, .L947
-.L946:
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC1
-	mov	w2, 2677
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC1
+	strh	w0, [x19, 2]
+	cmn	w1, #1
+	bne	.L818
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
+	add	w22, w22, 1
+	and	w22, w22, 65535
 	bl	printf
-.L947:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L819
+	ldrh	w0, [x28]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L819:
+	cmp	w22, 3
+	bls	.L820
+	add	x21, x21, :lo12:.LANCHOR148
+	adrp	x0, .LC89
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC89
+	ldr	w1, [x21, 4]
+	bl	printf
+.L821:
+	b	.L821
+.L820:
+	ldr	w0, [x19, 52]
+	cbz	w0, .L813
+.L835:
+	b	.L835
+.L818:
+	cmp	w0, 1
+	beq	.L824
+	cmp	w1, 256
+	beq	.L824
+	ldr	w0, [x19, 56]
+	cbz	w0, .L825
+.L824:
+	str	wzr, [x19, 56]
+	b	.L813
+.L825:
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, w25, uxtw 2]
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 112
 	ret
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
-	.global	FtlGcFreeBadSuperBlk
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR32
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR101
+	and	x19, x1, 65535
+	ldrh	w0, [x24, #:lo12:.LANCHOR32]
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR101]
-	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L961
-	adrp	x23, .LANCHOR102
-	add	x24, x23, :lo12:.LANCHOR102
-	mov	w19, 0
-.L962:
-	adrp	x0, .LANCHOR3
-	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	cmp	w0, w19
-	bhi	.L968
-	bl	FtlGcReFreshBadBlk
-.L961:
+	cmp	w0, w20
+	bcs	.L838
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC1
+	mov	w2, 485
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L838:
+	adrp	x27, .LANCHOR134
+	ubfiz	x0, x20, 2, 16
+	adrp	x22, .LANCHOR55
+	ldr	x1, [x27, #:lo12:.LANCHOR134]
+	ldr	w23, [x1, x0]
+	cbnz	w23, .L839
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
+	adrp	x1, .LANCHOR23
+	add	x0, x0, x19
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	strh	w20, [x0, x19]
+	str	wzr, [x1, 4]
+.L840:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -7156,1464 +6113,2851 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L968:
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
-	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR101
-	mov	w20, 0
-	ldrb	w0, [x0, w19, sxtw]
-	bl	V2P_block
-	and	w26, w0, 65535
-.L963:
-	ldrh	w0, [x22]
+.L839:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	lsl	x19, x19, 4
+	adrp	x26, .LANCHOR148
+	add	x21, x26, :lo12:.LANCHOR148
+	add	x0, x0, x19
+	mov	w2, 1
+	mov	w1, w2
+	str	w23, [x21, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR123
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
+	str	x0, [x21, 16]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	x25, [x21, 16]
+	ldrh	w0, [x25, 8]
 	cmp	w0, w20
-	bhi	.L967
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L962
-.L967:
-	add	x0, x23, :lo12:.LANCHOR102
-	add	w27, w20, 1
-	ldrh	w0, [x0, w20, sxtw 1]
-	cmp	w0, w26
-	bne	.L964
-	mov	w1, w26
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	beq	.L841
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-	mov	w0, w26
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldrh	w1, [x22]
-	sxtw	x3, w27
-	and	x4, x20, 65535
-	mov	x0, 0
-.L965:
-	add	w2, w20, w0
-	cmp	w1, w2, uxth
-	bhi	.L966
-	sub	w1, w1, #1
-	strh	w1, [x22]
-.L964:
-	and	w20, w27, 65535
-	b	.L963
-.L966:
-	add	x2, x3, x0
-	ldrh	w5, [x24, x2, lsl 1]
-	add	x2, x4, x0
-	add	x0, x0, 1
-	strh	w5, [x24, x2, lsl 1]
-	b	.L965
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",@progbits
-	.align	2
-	.global	update_vpc_list
-	.type	update_vpc_list, %function
-update_vpc_list:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR42
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	ubfiz	x0, x19, 1, 16
-	ldrh	w0, [x1, x0]
-	cbnz	w0, .L974
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	cmp	w1, w19
-	bne	.L975
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR80]
-.L976:
-	adrp	x20, .LANCHOR45
-	mov	w1, w19
-	adrp	x0, .LANCHOR41
-	add	x0, x0, :lo12:.LANCHOR41
-	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L978
-	adrp	x1, .LANCHOR158
+	ldr	x1, [x21, 16]
+	mov	w3, 4
+	adrp	x0, .LC91
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC91
+	bl	rknand_print_hex
+	ldrh	w3, [x24, #:lo12:.LANCHOR32]
+	adrp	x0, .LC92
+	ldr	x1, [x27, #:lo12:.LANCHOR134]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC92
+	bl	rknand_print_hex
+.L842:
+	ldrh	w0, [x25, 8]
+	cmp	w0, w20
+	beq	.L843
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC1
-	mov	w2, 2747
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 508
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L978:
-	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR45]
-	mov	w0, w19
-	bl	free_data_superblock
-	mov	w0, w19
-	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR48
-	ldrh	w1, [x20, #:lo12:.LANCHOR45]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR5]
-	cmp	w0, w1
-	ble	.L982
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC1
-	mov	w2, 2750
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC1
+.L843:
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	strh	w20, [x0, x19]
+	b	.L840
+.L841:
+	ldr	w0, [x26, #:lo12:.LANCHOR148]
+	cmp	w0, 256
+	bne	.L842
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L982:
-	mov	w0, 1
-	b	.L973
-.L975:
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	cmp	w0, w19
-	beq	.L981
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	beq	.L981
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
-	cmp	w0, w19
-	bne	.L976
-.L981:
-	mov	w0, 0
-.L973:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L974:
-	mov	w0, w19
-	bl	List_update_data_list
-	b	.L981
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",@progbits
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
+	mov	w1, w20
+	add	x0, x0, x19
+	ldr	x2, [x0, 8]
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
+	bl	FtlMapWritePage
+	b	.L842
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
-	.global	decrement_vpc_count
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	stp	x29, x30, [sp, -48]!
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	str	x21, [sp, 32]
-	mov	w0, 65535
-	cmp	w19, w0
-	beq	.L985
-	adrp	x21, .LANCHOR42
-	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR42]
-	ldrh	w0, [x1, x20]
-	cbnz	w0, .L986
-	mov	w2, 0
-	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR42]
-	ldrh	w0, [x0, x20]
-	cbz	w0, .L987
-.L992:
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR20
+	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	ldr	x20, [x0, 16]
+	ldr	x25, [x0, 40]
+	bl	ftl_free_no_use_map_blk
+	ldrh	w1, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w1, #5
+	cmp	w2, w1
+	blt	.L846
+	ubfiz	x0, x0, 1, 16
+	ldrh	w22, [x20, x0]
+	cbz	w22, .L846
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L846
+	mov	w1, 1
+	str	w1, [x19, 52]
+	strh	wzr, [x20, x0]
+	ldrh	w0, [x19, 8]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L847
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L847:
+	adrp	x26, .LANCHOR148
+	adrp	x23, .LANCHOR157
+	add	x27, x26, :lo12:.LANCHOR148
+	add	x23, x23, :lo12:.LANCHOR157
 	mov	w20, 0
-.L984:
-	mov	w0, w20
-	ldr	x21, [sp, 32]
+.L848:
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L855
+	mov	w1, 1
+	mov	w0, w22
+	bl	FtlFreeSysBlkQueueIn
+	str	wzr, [x19, 52]
+.L846:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L856
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L856:
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L987:
-	mov	w2, 2765
-	adrp	x1, .LANCHOR159
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR159
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-	b	.L992
-.L986:
-	sub	w0, w0, #1
-	strh	w0, [x1, x20]
-.L985:
-	adrp	x21, .LANCHOR150
-	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR150]
-	cmp	w0, w1
-	bne	.L989
-	strh	w19, [x21, #:lo12:.LANCHOR150]
-	b	.L992
-.L989:
-	cmp	w19, w0
-	beq	.L992
-	bl	update_vpc_list
-	cmp	w0, 0
-	adrp	x1, .LANCHOR40
-	adrp	x0, .LANCHOR41
-	strh	w19, [x21, #:lo12:.LANCHOR150]
-	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	sub	x0, x0, x1
-	mov	x1, -6148914691236517206
-	asr	x0, x0, 1
-	movk	x1, 0xaaab, lsl 0
-	mul	x0, x0, x1
-	adrp	x1, .LANCHOR42
-	ldr	x1, [x1, #:lo12:.LANCHOR42]
-	and	x2, x0, 65535
-	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L984
-	cmp	w19, w0, uxth
-	beq	.L984
-	mov	w2, 2781
-	adrp	x1, .LANCHOR159
+.L855:
+	ubfiz	x0, x20, 2, 16
+	add	x28, x25, x0
+	ldr	w1, [x25, x0]
+	cmp	w22, w1, lsr 10
+	bne	.L849
+	adrp	x2, .LANCHOR116
+	add	x0, x26, :lo12:.LANCHOR148
+	ldr	x2, [x2, #:lo12:.LANCHOR116]
+	str	x2, [x0, 8]
+	adrp	x2, .LANCHOR123
+	str	w1, [x0, 4]
+	ldr	x21, [x2, #:lo12:.LANCHOR123]
+	mov	w2, 1
+	str	x21, [x0, 16]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	beq	.L850
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 611
+	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L984
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.FtlWriteDump_data,"ax",@progbits
+.L850:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	bne	.L851
+.L853:
+	str	wzr, [x28]
+.L852:
+	b	.L852
+.L851:
+	ldrh	w0, [x21, 8]
+	cmp	w0, w20
+	bne	.L853
+	ldrh	w1, [x21]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L853
+	ldr	x2, [x27, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+.L849:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L848
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
-	.global	FtlWriteDump_data
-	.type	FtlWriteDump_data, %function
-FtlWriteDump_data:
-	stp	x29, x30, [sp, -128]!
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	stp	x29, x30, [sp, -144]!
+	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR51
-	add	x0, x19, :lo12:.LANCHOR51
-	stp	x21, x22, [sp, 32]
+	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	ldrh	w2, [x0, 4]
-	str	x25, [sp, 64]
-	cbz	w2, .L994
-	ldrb	w1, [x0, 8]
-	cbnz	w1, .L994
-	adrp	x3, .LANCHOR19
-	ldrb	w1, [x0, 7]
-	ldrh	w3, [x3, #:lo12:.LANCHOR19]
-	mul	w1, w1, w3
-	cmp	w2, w1
-	beq	.L994
-	ldrb	w0, [x0, 10]
-	cbnz	w0, .L993
-	adrp	x0, .LANCHOR61
-	mov	w2, 0
-	add	x1, x29, 92
-	ldr	w21, [x0, #:lo12:.LANCHOR61]
-	adrp	x0, .LANCHOR3
-	sub	w21, w21, #1
-	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	mov	w0, w21
-	bl	log2phys
-	adrp	x2, .LANCHOR108
-	adrp	x0, .LANCHOR107
-	ldr	w1, [x29, 92]
-	ldr	x20, [x2, #:lo12:.LANCHOR108]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	cmn	w1, #1
-	str	w1, [x29, 100]
-	stp	x0, x20, [x29, 104]
-	str	w21, [x29, 120]
-	str	wzr, [x20, 4]
-	beq	.L996
-	mov	w2, 0
-	mov	w1, 1
-	add	x0, x29, 96
-	bl	FlashReadPages
-.L997:
-	adrp	x23, .LANCHOR71
-	lsl	w25, w25, 2
-	add	x22, x19, :lo12:.LANCHOR51
-	add	x23, x23, :lo12:.LANCHOR71
-	mov	w0, -3947
-	mov	w24, 0
-	strh	w0, [x20]
-.L998:
-	cmp	w25, w24
-	bne	.L1002
-.L999:
-	add	x19, x19, :lo12:.LANCHOR51
-	mov	w0, 1
-	strb	w0, [x19, 10]
-.L993:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 128
-	ret
-.L996:
-	adrp	x1, .LANCHOR23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	mov	w1, 255
-	bl	ftl_memset
-	b	.L997
-.L1002:
-	ldrh	w0, [x22, 4]
-	cbz	w0, .L999
-	ldr	w0, [x29, 100]
-	add	w24, w24, 1
-	stp	w21, w0, [x20, 8]
-	ldrh	w0, [x22]
-	strh	w0, [x20, 2]
-	mov	x0, x22
-	bl	get_new_active_ppa
-	str	w0, [x29, 100]
-	ldr	w0, [x23]
-	mov	w3, 0
-	str	w0, [x20, 4]
-	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
-	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x23]
-	add	x0, x29, 96
-	bl	FlashProgPages
-	ldrh	w0, [x22]
-	bl	decrement_vpc_count
-	b	.L998
-.L994:
-	add	x19, x19, :lo12:.LANCHOR51
-	strb	wzr, [x19, 10]
-	b	.L993
-	.size	FtlWriteDump_data, .-FtlWriteDump_data
-	.section	.text.l2p_flush,"ax",@progbits
-	.align	2
-	.global	l2p_flush
-	.type	l2p_flush, %function
-l2p_flush:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR33
-	add	x20, x20, :lo12:.LANCHOR33
-	str	x21, [sp, 32]
-	mov	w19, 0
-	adrp	x21, .LANCHOR55
-	bl	FtlWriteDump_data
-.L1012:
-	ldrh	w0, [x20]
-	cmp	w0, w19
-	bhi	.L1014
-	mov	w0, 0
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L1014:
-	ldr	x1, [x21, #:lo12:.LANCHOR55]
-	ubfiz	x0, x19, 4, 16
-	add	x0, x1, x0
-	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1013
-	mov	w0, w19
-	bl	flush_l2p_region
-.L1013:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1012
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.FtlRecoverySuperblock,"ax",@progbits
-	.align	2
-	.global	FtlRecoverySuperblock
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	stp	x29, x30, [sp, -192]!
-	mov	w1, 65535
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	adrp	x20, .LANCHOR148
+	ldrh	w23, [x0, 6]
+	adrp	x24, .LANCHOR20
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
-	stp	x23, x24, [sp, 48]
+	ldr	x21, [x0, 40]
+	ldr	x22, [x0, 16]
+	lsl	w2, w23, 2
+	ldr	x0, [x0, 24]
+	str	x0, [x29, 128]
+	ldrh	w0, [x19, 8]
 	stp	x25, x26, [sp, 64]
-	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L1140
-	ldrb	w0, [x19, 6]
-	str	w0, [x29, 164]
-	adrp	x0, .LANCHOR19
-	ldrh	w26, [x19, 2]
-	str	x0, [x29, 128]
-	ldrh	w2, [x0, #:lo12:.LANCHOR19]
-	cmp	w2, w26
-	bne	.L1019
-	strh	wzr, [x19, 4]
-.L1146:
-	strb	wzr, [x19, 6]
-.L1140:
-	ldp	x19, x20, [sp, 16]
+	mov	w27, 0
+	str	w0, [x29, 140]
+	mov	x0, x21
+	bl	ftl_memset
+	str	x20, [x29, 120]
+	adrp	x7, .LANCHOR115
+	add	x3, x20, :lo12:.LANCHOR148
+	mov	x26, x7
+	mov	x20, x3
+	ldr	x0, [x7, #:lo12:.LANCHOR115]
+	str	x0, [x3, 8]
+	adrp	x0, .LANCHOR123
+	stp	wzr, wzr, [x19, 48]
+	ldr	x25, [x0, #:lo12:.LANCHOR123]
+	mov	w0, -1
+	str	x25, [x3, 16]
+	strh	w0, [x19]
+	strh	w0, [x19, 2]
+	mov	w0, 1
+	str	w0, [x19, 56]
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	str	w0, [x29, 136]
+	add	x0, x24, :lo12:.LANCHOR20
+	str	x0, [x29, 112]
+.L863:
+	ldr	w0, [x29, 140]
+	cmp	w27, w0
+	bge	.L880
+	ldr	w0, [x29, 136]
+	sxtw	x28, w27
+	cmp	w27, w0
+	bne	.L864
+	lsl	x0, x28, 1
+	mov	w1, 1
+	add	x24, x22, x0
+	ldrh	w0, [x22, x0]
+	mov	w22, 0
+	bl	FtlGetLastWrittenPage
+	sxth	w26, w0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	x0, [x29, 128]
+	strh	w27, [x19]
+	ldr	w0, [x0, x28, lsl 2]
+	str	w0, [x19, 48]
+	ldr	x0, [x29, 120]
+	add	x20, x0, :lo12:.LANCHOR148
+.L865:
+	cmp	w22, w26
+	ble	.L867
+.L880:
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+	adrp	x0, .LANCHOR20
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bne	.L869
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L869:
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	x0, x19
+	bl	ftl_map_blk_gc
 	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x29, x30, [sp], 144
 	ret
-.L1019:
-	ldrh	w0, [x19, 16]
-	mov	w20, 0
-.L1020:
-	cmp	w0, w1
-	beq	.L1021
-	mov	w1, 1
-	bl	FtlGetLastWrittenPage
-	mov	w23, w0
+.L867:
+	ldrh	w0, [x24]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1022
-	adrp	x1, .LANCHOR91
-	adrp	x2, .LANCHOR3
-	adrp	x20, .LANCHOR120
-	add	x4, x19, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR23
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w22, 0
-	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	adrp	x1, .LANCHOR92
-	mov	w10, 65535
-	str	x2, [x29, 152]
-	ldr	x7, [x1, #:lo12:.LANCHOR92]
-	adrp	x1, .LANCHOR24
-	ldrh	w8, [x1, #:lo12:.LANCHOR24]
-	add	x1, x19, 16
-	str	x1, [x29, 168]
-	ldrh	w1, [x2, #:lo12:.LANCHOR3]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-.L1023:
-	cmp	x4, x1
-	bne	.L1027
-	mov	w2, 0
-	mov	w1, w22
+	beq	.L866
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L866
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L866
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L866:
+	add	w22, w22, 1
+	sxth	w22, w22
+	b	.L865
+.L864:
+	ldr	x0, [x26, #:lo12:.LANCHOR115]
+	mov	w2, 1
+	str	x0, [x20, 8]
+	lsl	x0, x28, 1
+	ldrh	w1, [x24, #:lo12:.LANCHOR20]
+	add	x28, x22, x0
+	ldrh	w0, [x22, x0]
+	sub	w1, w1, #1
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w2
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR71
-	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	and	w10, w23, 65535
-	add	x7, x0, :lo12:.LANCHOR71
-	ldr	w21, [x0, #:lo12:.LANCHOR71]
-	mov	x11, x4
-	mov	w6, 65535
-	mov	w3, 0
-	sub	w21, w21, #1
-	str	x0, [x29, 144]
-.L1028:
-	cmp	w22, w3
-	bne	.L1033
-	add	w22, w23, 1
-	ldr	w0, [x4, 4]
-	and	w22, w22, 65535
-.L1142:
-	lsr	w0, w0, 10
-	bl	P2V_plane
-	and	w27, w0, 65535
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w22
-	bne	.L1035
-	strh	w22, [x19, 2]
-	strb	wzr, [x19, 6]
-	strh	wzr, [x19, 4]
-.L1035:
-	ldr	w0, [x29, 164]
-	cmp	w22, w26
-	cset	w1, eq
-	cmp	w27, w0
-	cset	w0, eq
-	tst	w1, w0
-	beq	.L1036
-.L1147:
-	mov	w2, w27
-	mov	w1, w22
-	mov	x0, x19
-	bl	ftl_sb_update_avl_pages
-	b	.L1140
-.L1021:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	add	x0, x19, x20, sxtw 1
-	ldrh	w0, [x0, 16]
-	b	.L1020
-.L1022:
-	cbz	w26, .L1024
-	adrp	x1, .LANCHOR160
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L882
+	ldrh	w1, [x25]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L882
+	ldrh	w1, [x25, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L871
+.L882:
+	mov	w5, 0
+.L872:
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0]
+	cmp	w5, w0
+	bge	.L878
+	ldrh	w0, [x28]
+	mov	w2, 1
+	str	w5, [x29, 108]
+	mov	w1, w2
+	orr	w0, w5, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+	ldr	w0, [x20]
+	ldr	w5, [x29, 108]
+	cmn	w0, #1
+	beq	.L876
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L876
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L876
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L876:
+	add	w5, w5, 1
+	sxth	w5, w5
+	b	.L872
+.L871:
+	ldrh	w5, [x24, #:lo12:.LANCHOR20]
+	mov	w0, 0
+	ldr	x10, [x26, #:lo12:.LANCHOR115]
+	sub	w5, w5, #1
+.L873:
+	cmp	w0, w5
+	blt	.L875
+.L878:
+	add	w4, w27, 1
+	sxth	w27, w4
+	b	.L863
+.L875:
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x10, x1]
+	cmp	w23, w1
+	bls	.L874
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+	ldr	w2, [x10, x2, lsl 2]
+	str	w2, [x21, x1]
+.L874:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L873
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR27
+	adrp	x0, .LANCHOR158
+	add	x0, x0, :lo12:.LANCHOR158
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR27]
+	strh	w1, [x0, 10]
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR28
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR36
+	ldr	x1, [x1, #:lo12:.LANCHOR36]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR132
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	str	x1, [x0, 24]
+	adrp	x1, .LANCHOR131
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR133
+	ldr	x1, [x1, #:lo12:.LANCHOR133]
+	str	x1, [x0, 40]
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlL2PDataInit
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR55
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x1, x0, x19
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
+	bl	FtlMapWritePage
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+	add	x0, x0, x19
+	ldp	x19, x20, [sp, 16]
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR22
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	x20, x1
+	ldrh	w24, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR61
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR61]
+	mov	w21, w2
+	cmp	w25, w1
+	bcc	.L897
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
-	mov	w2, 1755
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 811
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
+.L897:
+	ldr	w0, [x19, #:lo12:.LANCHOR61]
+	cmp	w25, w0
+	bcs	.L898
+	adrp	x23, .LANCHOR55
+	add	w24, w24, 7
+	adrp	x0, .LANCHOR33
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	lsr	w22, w25, w24
+	and	w22, w22, 65535
+	ldrh	w1, [x0, #:lo12:.LANCHOR33]
+	mov	x0, 0
+.L899:
+	and	x19, x0, 65535
+	cmp	w19, w1
+	bcc	.L904
+	bl	select_l2p_ram_region
+	and	x19, x0, 65535
+	ldr	x2, [x23, #:lo12:.LANCHOR55]
+	ubfiz	x1, x19, 4, 16
+	mov	w26, w0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L905
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L905
+	bl	flush_l2p_region
+.L905:
+	mov	w1, w26
+	mov	w0, w22
+	bl	load_l2p_region
+	b	.L901
+.L898:
+	mov	w0, -1
+	cbnz	w21, .L896
+	str	w0, [x20]
+.L896:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L904:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L899
+.L901:
+	mov	x0, 1
+	ldr	x1, [x23, #:lo12:.LANCHOR55]
+	lsl	x0, x0, x24
+	sub	w0, w0, #1
+	and	w0, w0, w25
+	and	x0, x0, 65535
+	add	x1, x1, x19, lsl 4
+	cbnz	w21, .L902
+	ldr	x1, [x1, 8]
+	ldr	w0, [x1, x0, lsl 2]
+	str	w0, [x20]
+.L903:
+	ldr	x0, [x23, #:lo12:.LANCHOR55]
+	add	x19, x0, x19, lsl 4
+	ldr	w0, [x19, 4]
+	cmn	w0, #1
+	beq	.L907
+	add	w0, w0, 1
+	str	w0, [x19, 4]
+.L907:
+	mov	w0, 0
+	b	.L896
+.L902:
+	ldr	x2, [x1, 8]
+	ldr	w3, [x20]
+	str	w3, [x2, x0, lsl 2]
+	ldr	w0, [x1, 4]
+	orr	w0, w0, -2147483648
+	str	w0, [x1, 4]
+	adrp	x0, .LANCHOR56
+	strh	w22, [x0, #:lo12:.LANCHOR56]
+	b	.L903
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR42
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L911
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L912
+	adrp	x2, .LANCHOR40
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR48
+	ldr	x2, [x2, #:lo12:.LANCHOR40]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR48]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L913:
+	cmp	w1, w4
+	beq	.L912
+	cmp	w19, w3
+	bne	.L914
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_remove_node
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cbnz	w0, .L915
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+	mov	w2, 1699
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L915:
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR48]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L912:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L914:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L912
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L913
+.L911:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L912
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_check_vpc,"ax",@progbits
+	.align	2
+	.global	ftl_check_vpc
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR61
+	add	x23, x23, :lo12:.LANCHOR61
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR161
+	stp	x27, x28, [sp, 80]
+	add	x1, x21, :lo12:.LANCHOR161
+	adrp	x20, check_vpc_table
+	bl	printf
+	add	x19, x20, :lo12:check_vpc_table
+	mov	w2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+.L922:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L924
+	adrp	x22, .LANCHOR5
+	adrp	x24, .LC95
+	add	x22, x22, :lo12:.LANCHOR5
+	add	x26, x20, :lo12:check_vpc_table
+	add	x24, x24, :lo12:.LC95
+	mov	w23, 0
+	mov	w19, 0
+	adrp	x25, .LANCHOR42
+.L925:
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L927
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L928
+	adrp	x0, .LANCHOR48
+	adrp	x25, .LC96
+	add	x20, x20, :lo12:check_vpc_table
+	add	x25, x25, :lo12:.LC96
+	ldrh	w26, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR40
+	mov	x24, x0
+	mov	w22, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	adrp	x27, .LANCHOR42
+	mov	w28, 6
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L929:
+	cmp	w22, w26
+	bne	.L931
+.L928:
+	cbz	w23, .L921
+	adrp	x0, .LC1
+	mov	w2, 2343
+	add	x1, x21, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L921:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L924:
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+	ldr	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L923
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L923:
+	add	w22, w22, 1
+	b	.L922
+.L927:
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L926
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L926
+	ldrh	w1, [x26, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.L926:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L925
+.L931:
+	ldr	x1, [x27, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L930
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w23, 1
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.L930:
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	umull	x19, w19, w28
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L928
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	b	.L929
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #96
+	adrp	x0, .LC97
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC97
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR148
+	stp	x21, x22, [sp, 48]
+	mov	w19, 0
+	adrp	x21, .LANCHOR61
+	add	x22, x20, :lo12:.LANCHOR148
+	add	x21, x21, :lo12:.LANCHOR61
+	str	x23, [sp, 64]
+	bl	printf
+.L947:
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L953
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
+	ret
+.L953:
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w19
+	bl	log2phys
+	tst	x19, 2047
+	bne	.L948
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC98
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC98
+	bl	printf
+.L948:
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L950
+	add	x0, x20, :lo12:.LANCHOR148
+	str	wzr, [x20, #:lo12:.LANCHOR148]
+	mov	w2, 0
+	str	w1, [x0, 4]
+	adrp	x1, .LANCHOR115
+	str	w19, [x0, 24]
+	ldr	x1, [x1, #:lo12:.LANCHOR115]
+	str	x1, [x0, 8]
+	adrp	x1, .LANCHOR123
+	ldr	x23, [x1, #:lo12:.LANCHOR123]
+	mov	w1, 1
+	str	x23, [x0, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR148]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L951
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L950
+.L951:
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC99
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC99
+	mov	w1, w19
+	bl	printf
+.L950:
+	add	w19, w19, 1
+	b	.L947
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR162
+	stp	x27, x28, [sp, 80]
+	mov	w27, w1
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w28, [x21, #:lo12:.LANCHOR162]
+	mov	w0, 65535
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w28, w0
+	beq	.L978
+	cbnz	w28, .L956
+.L957:
+	bl	FtlGcPageVarInit
+	b	.L958
+.L978:
+	mov	w28, 0
+.L956:
+	adrp	x0, .LANCHOR19
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w27
+	beq	.L957
+.L958:
+	mov	w24, 0
+.L959:
+	ldrh	w0, [x19]
+	mov	w22, 65535
+	strb	wzr, [x19, 8]
+	cmp	w0, w22
+	beq	.L960
+	adrp	x25, .LANCHOR23
+	add	x0, x25, :lo12:.LANCHOR23
+	str	x0, [x29, 104]
+.L975:
+	adrp	x1, .LANCHOR91
+	adrp	x23, .LANCHOR112
+	add	x5, x19, 16
+	mov	w20, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR91]
+	ldr	x1, [x29, 104]
+	ldr	x0, [x23, #:lo12:.LANCHOR112]
+	ldrh	w7, [x1]
+	adrp	x1, .LANCHOR92
+	ldr	x8, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR24
+	ldrh	w10, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR3
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L961:
+	cmp	x1, x5
+	bne	.L963
+	mov	w1, w20
+	mov	w2, 0
+	adrp	x26, .LANCHOR12
+	bl	FlashReadPages
+	add	x26, x26, :lo12:.LANCHOR12
+	ubfiz	x0, x20, 5, 16
+	mov	x20, 0
+	str	x0, [x29, 112]
+.L964:
+	ldr	x0, [x29, 112]
+	cmp	x20, x0
+	bne	.L973
+	add	w3, w28, 1
+	add	w24, w24, 1
+	and	w28, w3, 65535
+	cmp	w27, w24
+	adrp	x1, .LANCHOR19
+	bls	.L974
+.L976:
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w28
+	bhi	.L975
+.L960:
+	strh	w28, [x19, 2]
+	mov	w0, -1
+	strb	wzr, [x19, 6]
+	mov	w2, 0
+	strh	w0, [x21, #:lo12:.LANCHOR162]
+	mov	w1, w28
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L977
+.L963:
+	ldrh	w4, [x5]
+	cmp	w4, w22
+	beq	.L962
+	ubfiz	x2, x20, 5, 16
+	orr	w4, w28, w4, lsl 10
+	add	x2, x0, x2
+	str	w4, [x2, 4]
+	mul	w4, w20, w7
+	asr	w4, w4, 2
+	add	x4, x6, x4, sxtw 2
+	str	x4, [x2, 8]
+	mul	w4, w20, w10
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	asr	w4, w4, 2
+	add	x4, x8, x4, sxtw 2
+	str	x4, [x2, 16]
+.L962:
+	add	x5, x5, 2
+	b	.L961
+.L973:
+	ldr	x1, [x23, #:lo12:.LANCHOR112]
+	add	x0, x1, x20
+	ldr	w1, [x1, x20]
+	ldr	w2, [x0, 4]
+	str	w2, [x29, 124]
+	cbnz	w1, .L965
+	ldr	x25, [x0, 16]
+	ldrh	w0, [x25]
+	cmp	w0, w22
+	bne	.L966
+.L965:
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x19]
+	mov	w28, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x19]
+	bl	FtlGcPageVarInit
+	b	.L959
+.L966:
+	ldr	w0, [x25, 8]
+	add	x1, x29, 140
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x25, 12]
+	ldr	w1, [x29, 140]
+	cmp	w0, w1
+	beq	.L968
+.L971:
+	ldp	w2, w0, [x25, 8]
+	add	x20, x20, 32
+	ldr	w1, [x29, 124]
+	bl	FtlGcUpdatePage
+	b	.L964
+.L968:
+	str	w0, [x29, 148]
+	adrp	x0, .LANCHOR119
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR119]
+	str	x0, [x29, 152]
+	adrp	x0, .LANCHOR124
+	ldr	x0, [x0, #:lo12:.LANCHOR124]
+	str	x0, [x29, 160]
+	add	x0, x29, 144
+	bl	FlashReadPages
+	ldrh	w1, [x26]
+	mov	x0, 0
+	ldr	x2, [x23, #:lo12:.LANCHOR112]
+	ldr	x6, [x29, 152]
+	add	x2, x2, x20
+	ubfiz	x1, x1, 9, 16
+.L969:
+	cmp	x0, x1
+	beq	.L971
+	ldr	x7, [x2, 8]
+	ldr	w8, [x7, x0]
+	add	x0, x0, 4
+	add	x7, x6, x0
+	ldr	w7, [x7, -4]
+	cmp	w8, w7
+	beq	.L969
+	ldrh	w1, [x19]
+	adrp	x0, .LC100
+	ldr	w2, [x29, 148]
+	add	x0, x0, :lo12:.LC100
+	bl	printf
+	b	.L965
+.L974:
+	ldrh	w0, [x21, #:lo12:.LANCHOR162]
+	cmp	w0, w22
+	beq	.L976
+	add	w0, w0, w24
+	strh	w0, [x21, #:lo12:.LANCHOR162]
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w28
+	bls	.L976
+.L977:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, -1
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlReadRefresh,"ax",@progbits
+	.align	2
+	.global	FtlReadRefresh
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+	adrp	x1, .LANCHOR81
+	add	x0, x1, :lo12:.LANCHOR81
+	ldr	w2, [x0, 80]
+	cbz	w2, .L986
+	adrp	x1, .LANCHOR61
+	ldr	w3, [x0, 84]
+	ldr	w2, [x1, #:lo12:.LANCHOR61]
+	cmp	w3, w2
+	bcs	.L987
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	add	x20, x1, :lo12:.LANCHOR61
+	str	x21, [sp, 32]
+	mov	w21, 2048
+.L992:
+	ldr	w0, [x19, 84]
+	ldr	w1, [x20]
+	cmp	w0, w1
+	bcs	.L989
+	add	x1, x29, 60
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x19, 84]
+	ldr	w1, [x29, 60]
+	add	w0, w0, 1
+	str	w0, [x19, 84]
+	cmn	w1, #1
+	beq	.L990
+	str	w0, [x29, 88]
+	adrp	x0, .LANCHOR121
+	str	w1, [x29, 68]
+	mov	w2, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR121]
+	mov	w1, 1
+	str	x0, [x29, 72]
+	add	x0, x29, 96
+	str	x0, [x29, 80]
+	add	x0, x29, 160
+	str	wzr, [x0, -96]!
+	bl	FlashReadPages
+	ldr	w0, [x29, 64]
+	cmp	w0, 256
+	bne	.L989
+	ldr	w0, [x29, 60]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+.L989:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, -1
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 160
+	ret
+.L990:
+	subs	w21, w21, #1
+	bne	.L992
+	b	.L989
+.L987:
+	adrp	x1, .LANCHOR62
+	str	wzr, [x0, 84]
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	stp	w1, wzr, [x0, 76]
+.L996:
+	mov	w0, 0
+	ret
+.L986:
+	ldr	w4, [x0, 76]
+	adrp	x0, .LANCHOR62
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	add	w0, w2, 1048576
+	cmp	w4, w0
+	bhi	.L995
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	lsr	w3, w0, 10
+	mov	w0, 33554432
+	asr	w0, w0, w3
+	add	w0, w0, w4
+	cmp	w2, w0
+	bhi	.L995
+	adrp	x0, .LANCHOR39+28
+	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
+	cbnz	w0, .L996
+.L995:
+	add	x0, x1, :lo12:.LANCHOR81
+	mov	w1, 1
+	str	wzr, [x0, 84]
+	stp	w2, w1, [x0, 76]
+	b	.L996
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDump_data
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+	ldr	w1, [x0, 56]
+	cbz	w1, .L1002
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR148
+	adrp	x2, .LANCHOR123
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x0, 6]
+	adrp	x0, .LANCHOR116
+	ldr	x2, [x2, #:lo12:.LANCHOR123]
+	ldr	x3, [x0, #:lo12:.LANCHOR116]
+	add	x0, x1, :lo12:.LANCHOR148
+	sub	w20, w20, #1
+	ldr	x4, [x19, 40]
+	and	w20, w20, 65535
+	str	x21, [sp, 32]
+	stp	x3, x2, [x0, 8]
+	ubfiz	x2, x20, 2, 16
+	str	wzr, [x19, 56]
+	mov	x21, x1
+	ldr	w2, [x4, x2]
+	str	w2, [x0, 4]
+	cbz	w2, .L1004
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashReadPages
+.L1005:
+	add	x1, x21, :lo12:.LANCHOR148
+	mov	x0, x19
+	ldr	x21, [sp, 32]
+	ldr	x2, [x1, 8]
+	mov	w1, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	FtlMapWritePage
+.L1004:
+	adrp	x0, .LANCHOR23
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR23]
+	mov	x0, x3
+	bl	ftl_memset
+	b	.L1005
+.L1002:
+	ret
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FlashTestBlk,"ax",@progbits
+	.align	2
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	cmp	w19, 11
+	bls	.L1011
+	adrp	x20, .LANCHOR121
+	mov	w2, 32
+	mov	w1, 165
+	lsl	w19, w19, 10
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	str	x0, [x29, 40]
+	add	x0, x29, 64
+	str	x0, [x29, 48]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	str	w19, [x29, 36]
+	mov	w2, 1
+	add	x0, x29, 32
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	add	x0, x29, 32
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x29, 32]
+	mov	w2, 1
+	mov	w1, 0
+	cmp	w0, 0
+	add	x0, x29, 32
+	csetm	w19, ne
+	bl	FlashEraseBlocks
+.L1009:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1011:
+	mov	w19, 0
+	b	.L1009
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR123
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR148
+	stp	x21, x22, [sp, 32]
+	add	x19, x20, :lo12:.LANCHOR148
+	adrp	x22, .LANCHOR115
+	ldr	x1, [x23, #:lo12:.LANCHOR123]
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR37
+	str	x27, [sp, 80]
+	add	x25, x21, :lo12:.LANCHOR37
+	ldr	x0, [x22, #:lo12:.LANCHOR115]
+	adrp	x26, .LANCHOR10
+	stp	x0, x1, [x19, 8]
+	adrp	x1, .LANCHOR23
+	adrp	x27, .LANCHOR137
+	add	x25, x25, 32
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR10
+	add	x27, x27, :lo12:.LANCHOR137
+	mov	w1, 0
+	bl	ftl_memset
+.L1014:
+	ldrh	w0, [x26]
+	cmp	w24, w0
+	blt	.L1015
+	add	x20, x20, :lo12:.LANCHOR148
+	add	x19, x21, :lo12:.LANCHOR37
+	mov	w2, 16
+	mov	w1, 255
+	adrp	x24, .LC101
+	adrp	x26, .LANCHOR20
+	ldr	x27, [x20, 16]
+	add	x24, x24, :lo12:.LC101
+	add	x26, x26, :lo12:.LANCHOR20
+	mov	w25, 0
+	mov	x0, x27
+	bl	ftl_memset
+	mov	w0, -3887
+	strh	w0, [x27]
+	ldr	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x21, #:lo12:.LANCHOR37]
+	mov	w21, 0
+	strh	w0, [x27, 2]
+	ldrh	w0, [x19, 4]
+	strh	w0, [x27, 8]
+	ldrh	w0, [x19, 6]
+	strh	w0, [x27, 10]
+	adrp	x0, .LANCHOR2
+	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	strh	w0, [x27, 12]
+.L1016:
+	ldrh	w1, [x19]
+	ldrh	w4, [x27, 10]
+	ldrh	w2, [x19, 2]
+	ldrh	w3, [x19, 4]
+	ldr	x0, [x22, #:lo12:.LANCHOR115]
+	str	x0, [x20, 8]
+	ldr	x0, [x23, #:lo12:.LANCHOR123]
+	str	x0, [x20, 16]
+	orr	w0, w2, w1, lsl 10
+	str	wzr, [x20]
+	str	w0, [x20, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x26]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1017
+	ldr	w0, [x19, 8]
+	mov	w2, 1
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	str	w0, [x27, 4]
+	ldrh	w0, [x19]
+	strh	w0, [x27, 8]
+	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR106
+	strh	w1, [x19]
+	lsl	w1, w1, 10
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	str	w1, [x20, 4]
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.L1017:
+	mov	w3, 1
+	mov	x0, x20
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L1018
+	ldr	w1, [x20, 4]
+	add	w21, w21, 1
+	adrp	x0, .LC102
+	and	w21, w21, 65535
+	add	x0, x0, :lo12:.LC102
+	bl	printf
+	cmp	w21, 3
+	bls	.L1016
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC103
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.L1020:
+	b	.L1020
+.L1015:
+	ldrh	w2, [x27]
+	ldr	x1, [x25], 8
+	ldr	x0, [x19, 8]
+	mul	w3, w24, w2
+	lsl	w2, w2, 2
+	add	w24, w24, 1
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+	b	.L1014
+.L1021:
+	mov	w25, 1
+	b	.L1016
+.L1018:
+	cbz	w25, .L1021
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	adrp	x28, .LANCHOR48
+	stp	x23, x24, [sp, 48]
+	add	x24, x28, :lo12:.LANCHOR48
+	stp	x19, x20, [sp, 16]
+	adrp	x27, .LANCHOR45
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	add	x0, x27, :lo12:.LANCHOR45
+	stp	x25, x26, [sp, 64]
+	str	x0, [x29, 104]
 .L1024:
-	ldr	w0, [x29, 164]
-	cmp	w0, 0
-	ccmp	w20, w0, 4, ne
-	beq	.L1025
-	adrp	x1, .LANCHOR160
+	ldr	x1, [x29, 104]
+	adrp	x23, .LANCHOR5
+	ldrh	w0, [x28, #:lo12:.LANCHOR48]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1025
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
-	mov	w2, 1756
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 2615
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
 	bl	printf
 .L1025:
-	strh	wzr, [x19, 2]
-	b	.L1146
-.L1027:
-	ldrh	w3, [x4]
-	cmp	w3, w10
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
+	cmp	x19, x0
+	bne	.L1051
+	adrp	x1, .LANCHOR87
+	ldrh	w0, [x24]
+	ldr	w1, [x1, #:lo12:.LANCHOR87]
+	mul	w1, w0, w1
+	lsr	w0, w0, 1
+	add	w0, w0, 1
+	add	w1, w0, w1, lsr 2
+	ands	w1, w1, 65535
 	beq	.L1026
-	ubfiz	x2, x22, 5, 16
-	orr	w3, w23, w3, lsl 10
-	add	x2, x0, x2
-	str	w3, [x2, 4]
-	mul	w3, w22, w6
-	asr	w3, w3, 2
-	add	x3, x5, x3, sxtw 2
-	str	x3, [x2, 8]
-	mul	w3, w22, w8
-	add	w22, w22, 1
-	and	w22, w22, 65535
-	asr	w3, w3, 2
-	add	x3, x7, x3, sxtw 2
-	str	x3, [x2, 16]
+	sub	w1, w1, #1
+	and	w1, w1, 65535
 .L1026:
-	add	x4, x4, 2
-	b	.L1023
-.L1033:
-	ldr	w0, [x11]
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_pop_index_node
+	and	w22, w0, 65535
+	ldrh	w0, [x24]
+	cbnz	w0, .L1027
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2624
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1027:
+	ldrh	w0, [x24]
+	sub	w0, w0, #1
+	strh	w0, [x24]
+	ldrh	w0, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w22
+	bls	.L1024
+	adrp	x25, .LANCHOR42
+	ubfiz	x20, x22, 1, 16
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	ldrh	w21, [x0, x20]
+	cbnz	w21, .L1024
+	strh	w22, [x19]
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w0, [x19, 7]
 	cbnz	w0, .L1029
-	ldr	x8, [x11, 16]
-	ldr	w5, [x8, 4]
-	cmn	w5, #1
-	beq	.L1030
-	ldr	w1, [x7]
-	mov	w0, w5
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1030
-	add	w5, w5, 1
-	str	w5, [x7]
-.L1030:
-	ldr	w0, [x8]
-	cmn	w0, #1
-	bne	.L1032
-	ubfiz	x3, x3, 5, 16
-	and	w22, w23, 65535
-	add	x3, x4, x3
-	ldr	w0, [x3, 4]
-	b	.L1142
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	mov	w1, -1
+	strh	w1, [x0, x20]
+	mov	w0, w22
+	bl	INSERT_DATA_LIST
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1024
+	mov	w2, 2638
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L1024
+.L1051:
+	mov	w1, 0
+	b	.L1026
 .L1029:
-	mov	w6, w10
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x24]
+	add	w0, w0, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1031
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2641
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1031:
+	adrp	x0, .LANCHOR3
+	adrp	x25, .LANCHOR106
+	add	x26, x19, 16
+	mov	w6, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	x4, x26
+	ldr	x3, [x25, #:lo12:.LANCHOR106]
+	ubfiz	x0, x0, 5, 16
+	add	x1, x3, 8
+	add	x0, x0, 8
+	add	x0, x3, x0
 .L1032:
-	add	w3, w3, 1
-	add	x11, x11, 32
-	and	w3, w3, 65535
-	b	.L1028
+	cmp	x0, x1
+	bne	.L1034
+	cbnz	w21, .L1035
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2652
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1035:
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w22
+	bne	.L1036
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC1
+	mov	w2, 2654
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .L1036:
-	mov	w0, 65535
-	cmp	w6, w0
-	bne	.L1037
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1038
-.L1037:
-	adrp	x25, .LANCHOR153
-	and	w28, w23, 65535
-	ldr	w0, [x25, #:lo12:.LANCHOR153]
-	cmn	w0, #1
-	bne	.L1039
-	str	w21, [x25, #:lo12:.LANCHOR153]
-.L1039:
-	add	w0, w26, 7
-	cmp	w0, w23, uxth
-	bge	.L1089
-	sub	w24, w28, #7
-	and	w24, w24, 65535
+	adrp	x6, .LANCHOR43
+	adrp	x7, .LANCHOR14
+	adrp	x5, .LANCHOR72
+	adrp	x4, .LANCHOR73
+	ldr	x1, [x6, #:lo12:.LANCHOR43]
+	cbnz	w0, .L1037
+	ldrh	w0, [x1, x20]
+	cbz	w0, .L1038
+	ldrh	w2, [x7, #:lo12:.LANCHOR14]
+	add	w0, w0, w2
+.L1062:
+	strh	w0, [x1, x20]
+	mov	w1, 0
+	ldr	w0, [x5, #:lo12:.LANCHOR72]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR72]
+	mov	w0, w22
+	bl	ftl_set_blk_mode
 .L1040:
-	ldr	x0, [x29, 152]
-	mov	w3, 65535
-	mov	w5, 1
-	add	x4, x0, :lo12:.LANCHOR3
+	ldr	x0, [x6, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x20]
+	adrp	x0, .LANCHOR76
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	cmp	w1, w2
+	bls	.L1041
+	str	w1, [x0, #:lo12:.LANCHOR76]
 .L1041:
-	cmp	w24, w28
-	bhi	.L1051
-	ldrh	w1, [x4]
-	mov	w23, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	add	x1, x1, 8
-	ldr	x2, [x29, 168]
-	add	x1, x19, x1, lsl 1
-	b	.L1052
-.L1089:
-	mov	w24, w26
-	b	.L1040
-.L1043:
-	ldrh	w6, [x2]
-	cmp	w6, w3
-	beq	.L1042
-	ubfiz	x7, x23, 5, 16
-	add	w23, w23, 1
-	add	x7, x0, x7
-	and	w23, w23, 65535
-	orr	w6, w24, w6, lsl 10
-	str	w6, [x7, 4]
+	ldr	w2, [x5, #:lo12:.LANCHOR72]
+	ldr	w1, [x4, #:lo12:.LANCHOR73]
+	ldrh	w0, [x7, #:lo12:.LANCHOR14]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x23, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR127
+	ldr	x1, [x0, #:lo12:.LANCHOR127]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR106]
+	ubfiz	x1, x21, 5, 16
+	add	x1, x1, 4
+	add	x2, x0, 4
+	add	x1, x0, x1
 .L1042:
-	add	x2, x2, 2
-.L1052:
-	cmp	x2, x1
+	cmp	x1, x2
 	bne	.L1043
-	mov	w1, w23
-	mov	w2, 0
-	str	w5, [x29, 112]
-	ubfiz	x23, x23, 5, 16
-	str	w3, [x29, 120]
-	add	x23, x23, 16
-	str	x4, [x29, 136]
-	bl	FlashReadPages
-	ldr	x2, [x20, #:lo12:.LANCHOR120]
-	ldr	w1, [x25, #:lo12:.LANCHOR153]
-	ldr	w5, [x29, 112]
-	add	x0, x2, 16
-	ldr	w3, [x29, 120]
-	add	x23, x2, x23
-	ldr	x4, [x29, 136]
-	mov	w2, 0
+	ldrb	w1, [x19, 8]
+	mov	w2, w21
+	mov	x23, 0
+	bl	FlashEraseBlocks
+	mov	w1, 0
 .L1044:
-	cmp	x23, x0
-	bne	.L1049
-	cbz	w2, .L1050
-	str	w1, [x25, #:lo12:.LANCHOR153]
-.L1050:
-	add	w24, w24, 1
-	and	w24, w24, 65535
-	b	.L1041
-.L1049:
-	ldr	w6, [x0, -16]
-	cbz	w6, .L1045
-	cbz	w2, .L1038
-	str	w1, [x25, #:lo12:.LANCHOR153]
+	cmp	w21, w23, uxth
+	bhi	.L1046
+	cbz	w1, .L1047
+	mov	w0, w22
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1047:
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1048
+	adrp	x0, .LANCHOR42
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	strh	w1, [x0, x20]
+	b	.L1024
+.L1034:
+	ldrh	w2, [x4]
+	stp	xzr, xzr, [x1]
+	cmp	w2, w6
+	beq	.L1033
+	ubfiz	x5, x21, 5, 16
+	add	w21, w21, 1
+	add	x5, x3, x5
+	and	w21, w21, 65535
+	lsl	w2, w2, 10
+	str	w2, [x5, 4]
+.L1033:
+	add	x1, x1, 32
+	add	x4, x4, 2
+	b	.L1032
 .L1038:
-	mov	w1, 1
-	adrp	x0, .LANCHOR161
-	mov	w23, w26
-	adrp	x28, .LANCHOR153
-	strh	w1, [x0, #:lo12:.LANCHOR161]
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapBlkWriteDump_data
-	add	x0, x28, :lo12:.LANCHOR153
-	str	x0, [x29, 104]
-.L1053:
-	ldr	x1, [x29, 152]
-	mov	w24, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w5, 65535
-	ldr	x2, [x29, 168]
-	ldrh	w1, [x1, #:lo12:.LANCHOR3]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-.L1054:
-	cmp	x1, x2
-	bne	.L1056
-	mov	w2, 0
-	mov	w1, w24
-	bl	FlashReadPages
-	mov	x25, 0
-	ubfiz	x0, x24, 5, 16
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR162
-	add	x0, x0, :lo12:.LANCHOR162
-	str	x0, [x29, 120]
-.L1057:
-	ldr	x0, [x29, 112]
-	cmp	x25, x0
-	bne	.L1083
-	ldr	x0, [x29, 128]
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	cmp	w0, w23
-	bne	.L1053
-	ldr	x0, [x29, 152]
-	mov	w2, 65535
-	strh	w23, [x19, 2]
-	strh	wzr, [x19, 4]
-	ldrh	w1, [x0, #:lo12:.LANCHOR3]
-	mov	w0, 0
-.L1084:
-	cmp	w0, w1
-	beq	.L1140
-	ldr	x4, [x29, 168]
-	ldrh	w3, [x4], 2
-	str	x4, [x29, 168]
-	cmp	w3, w2
-	beq	.L1085
-	strb	w0, [x19, 6]
-	b	.L1140
+	mov	w0, 2
+	b	.L1062
+.L1037:
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+	ldr	w0, [x4, #:lo12:.LANCHOR73]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR73]
+	mov	w0, w22
+	bl	ftl_set_blk_mode.part.6
+	b	.L1040
+.L1043:
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 32
+	b	.L1042
+.L1046:
+	ldr	x2, [x25, #:lo12:.LANCHOR106]
+	lsl	x0, x23, 5
+	add	x3, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L1045
+	add	w1, w1, 1
+	ldr	w0, [x3, 4]
+	stp	w2, w1, [x29, 96]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldp	w2, w1, [x29, 96]
+	strh	w2, [x26]
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
 .L1045:
-	ldr	x6, [x0]
-	ldrh	w7, [x6]
-	cmp	w7, w3
-	beq	.L1048
-	ldr	w6, [x6, 4]
-	cmn	w6, #1
-	csel	w1, w1, w6, eq
-	csel	w2, w2, w5, eq
-.L1048:
-	add	x0, x0, 32
+	add	x23, x23, 1
+	add	x26, x26, 2
 	b	.L1044
-.L1051:
-	mov	w0, -1
-	str	w0, [x25, #:lo12:.LANCHOR153]
-	b	.L1038
-.L1056:
-	ldrh	w3, [x2]
-	cmp	w3, w5
-	beq	.L1055
-	ubfiz	x4, x24, 5, 16
-	add	w24, w24, 1
-	add	x4, x0, x4
-	and	w24, w24, 65535
-	orr	w3, w23, w3, lsl 10
-	str	w3, [x4, 4]
-.L1055:
-	add	x2, x2, 2
-	b	.L1054
-.L1083:
-	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	add	x4, x4, x25
-	ldr	w5, [x4, 4]
-	str	w5, [x29, 188]
-	lsr	w0, w5, 10
-	bl	P2V_plane
+.L1048:
+	adrp	x1, .LANCHOR19
+	adrp	x2, .LANCHOR70
+	strh	wzr, [x19, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	strh	w22, [x19]
+	strb	wzr, [x19, 6]
+	mul	w0, w0, w1
+	ldr	w1, [x2, #:lo12:.LANCHOR70]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR42
 	and	w0, w0, 65535
-	cmp	w23, w26
-	bcc	.L1058
-	ldr	w1, [x29, 164]
-	ccmp	w1, w0, 0, eq
-	bhi	.L1058
-	cmp	w23, w22
-	ccmp	w27, w0, 0, eq
-	beq	.L1059
-	ldr	w0, [x4]
-	cmn	w0, #1
-	beq	.L1060
-	ldr	x3, [x4, 16]
-	mov	w0, 61589
-	ldrh	w1, [x3]
-	cmp	w1, w0
-	beq	.L1061
-.L1067:
-	ldrh	w0, [x19]
-.L1145:
-	bl	decrement_vpc_count
-.L1058:
-	add	x25, x25, 32
-	b	.L1057
-.L1061:
-	ldr	w21, [x3, 4]
-	cmn	w21, #1
-	beq	.L1062
-	ldr	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
-	mov	w0, w21
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1062
-	ldr	x1, [x29, 144]
-	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR71]
-.L1062:
-	ldp	w24, w0, [x3, 8]
-	add	x1, x29, 184
-	str	w0, [x29, 180]
-	mov	w2, 0
-	mov	w0, w24
-	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR153]
-	cmn	w1, #1
-	beq	.L1063
-	mov	w0, w21
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1063
-	ldr	w1, [x29, 180]
-	cmn	w1, #1
-	beq	.L1064
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w2, 0
-	add	x0, x0, x25
-	ldr	x3, [x0, 16]
-	str	w1, [x0, 4]
-	mov	w1, 1
-	str	x3, [x29, 136]
-	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	ldr	x3, [x29, 136]
-	add	x4, x0, x25
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	bne	.L1065
-.L1066:
-	mov	w0, -1
-	str	w0, [x29, 180]
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-.L1074:
-	ldr	w3, [x29, 180]
-	cmn	w3, #1
-	beq	.L1058
-.L1088:
-	lsr	w0, w3, 10
-	bl	P2V_block_in_plane
-	and	w24, w0, 65535
-	adrp	x0, .LANCHOR5
-	mov	w3, w24
-	ldrh	w0, [x0, #:lo12:.LANCHOR5]
-	cmp	w0, w24
-	bhi	.L1079
-	mov	w2, 2006
-	adrp	x1, .LANCHOR160
+	strh	w0, [x19, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	strh	w0, [x1, x20]
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1049
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1050
+.L1049:
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 2707
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC1
-	str	w24, [x29, 136]
 	bl	printf
-	ldr	w3, [x29, 136]
-.L1079:
+.L1050:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR101
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR101]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cbz	w0, .L1064
+	adrp	x23, .LANCHOR102
+	add	x24, x23, :lo12:.LANCHOR102
+	mov	w19, 0
+.L1065:
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w0, w19
+	bhi	.L1071
+	bl	FtlGcReFreshBadBlk
+.L1064:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1071:
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	mov	w1, w25
+	add	x22, x21, :lo12:.LANCHOR101
+	mov	w20, 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+	and	w26, w0, 65535
+.L1066:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L1070
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1065
+.L1070:
+	add	x0, x23, :lo12:.LANCHOR102
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L1067
+	mov	w1, w26
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	w1, [x22]
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	mov	x0, 0
+.L1068:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L1069
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.L1067:
+	and	w20, w27, 65535
+	b	.L1066
+.L1069:
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+	strh	w5, [x24, x2, lsl 1]
+	b	.L1068
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
+	.align	2
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+	stp	x29, x30, [sp, -32]!
 	adrp	x1, .LANCHOR42
-	ubfiz	x0, x24, 1, 16
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1080
-	mov	w0, w3
-	b	.L1145
-.L1064:
-	ldp	w1, w0, [x29, 184]
-	cmp	w1, w0
-	bne	.L1067
-	mov	w2, 1
-	add	x1, x29, 180
-	mov	w0, w24
-	bl	log2phys
-	b	.L1067
-.L1065:
-	ldr	w0, [x3, 8]
-	cmp	w24, w0
-	bne	.L1066
-	ldr	w0, [x3, 4]
-	str	w0, [x29, 136]
-	str	x3, [x29, 96]
-	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR153]
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1066
-	ldp	w0, w1, [x29, 184]
-	ldr	x3, [x29, 96]
-	cmp	w0, w1
-	ldr	w1, [x29, 180]
-	bne	.L1069
-.L1143:
-	mov	w0, w24
-	bl	FtlReUsePrevPpa
-	b	.L1066
-.L1069:
-	cmp	w0, w1
-	beq	.L1066
-	cmn	w0, #1
-	beq	.L1070
-	ldr	x3, [x4, 16]
-	mov	w2, 0
-	str	w0, [x4, 4]
-	mov	w1, 1
-	str	x3, [x29, 96]
-	mov	x0, x4
-	bl	FlashReadPages
-	ldr	x3, [x29, 96]
-.L1071:
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	beq	.L1072
-	ldr	x0, [x29, 104]
-	ldr	w3, [x3, 4]
-	mov	w1, w3
-	ldr	w0, [x0]
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1072
-	ldr	w0, [x29, 136]
-	mov	w1, w3
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L1066
-.L1072:
-	ldr	w1, [x29, 180]
-	b	.L1143
-.L1070:
-	str	w0, [x4]
-	b	.L1071
-.L1063:
-	ldp	w1, w0, [x29, 184]
-	cmp	w1, w0
-	beq	.L1074
-	mov	w2, 1
-	add	x1, x29, 188
-	mov	w0, w24
-	bl	log2phys
-	ldr	w3, [x29, 184]
-	cmn	w3, #1
-	beq	.L1074
-	ldr	w0, [x29, 180]
-	cmp	w3, w0
-	beq	.L1088
-	lsr	w0, w3, 10
-	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR51
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
-	cmp	w1, w0
-	beq	.L1078
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
-	cmp	w1, w0
-	beq	.L1078
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
-	cmp	w1, w0
-	bne	.L1074
-.L1078:
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	mov	w2, 0
-	mov	w1, 1
-	ldr	x4, [x0, 16]
-	str	w3, [x0, 4]
-	str	x4, [x29, 136]
-	bl	FlashReadPages
-	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	ldr	w0, [x0]
-	cmn	w0, #1
-	beq	.L1074
-	ldr	x4, [x29, 136]
-	mov	w0, w21
-	ldr	w1, [x4, 4]
-	bl	ftl_cmp_data_ver
-	cbnz	w0, .L1074
-	mov	w2, 1
-	add	x1, x29, 184
-	mov	w0, w24
-	bl	log2phys
-	b	.L1074
-.L1080:
-	mov	w1, w24
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	cbnz	w0, .L1077
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	cmp	w1, w19
+	bne	.L1078
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR80]
+.L1079:
+	adrp	x20, .LANCHOR45
+	mov	w1, w19
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L1081
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC1
+	mov	w2, 2777
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1058
-.L1060:
-	ldr	x0, [x29, 120]
-	ldr	w0, [x0]
-	cmp	w0, 31
-	bhi	.L1081
-	adrp	x1, .LANCHOR163
-	add	x1, x1, :lo12:.LANCHOR163
-	str	w5, [x1, w0, uxtw 2]
-	add	w0, w0, 1
-	ldr	x1, [x29, 120]
-	str	w0, [x1]
 .L1081:
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR153]
-	cmn	w0, #1
-	bne	.L1082
-.L1144:
-	str	w21, [x28, #:lo12:.LANCHOR153]
-	b	.L1058
-.L1082:
-	cmp	w21, w0
-	bcs	.L1058
-	b	.L1144
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	mov	w0, w19
+	bl	free_data_superblock
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L1085
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC1
+	mov	w2, 2780
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .L1085:
-	add	w0, w0, 1
-	and	w0, w0, 65535
+	mov	w0, 1
+	b	.L1076
+.L1078:
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L1084
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L1084
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bne	.L1079
+.L1084:
+	mov	w0, 0
+.L1076:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1077:
+	mov	w0, w19
+	bl	List_update_data_list
 	b	.L1084
-.L1059:
-	strb	w27, [x19, 6]
-	strh	w22, [x19, 2]
-	b	.L1147
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
-	.global	FtlSuperblockPowerLostFix
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR108
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1088
+	adrp	x21, .LANCHOR42
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L1089
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR42]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L1090
+.L1095:
+	mov	w20, 0
+.L1087:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1090:
+	mov	w2, 2795
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR165
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L1095
+.L1089:
+	sub	w0, w0, #1
+	strh	w0, [x1, x20]
+.L1088:
+	adrp	x21, .LANCHOR142
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR142]
+	cmp	w0, w1
+	bne	.L1092
+	strh	w19, [x21, #:lo12:.LANCHOR142]
+	b	.L1095
+.L1092:
+	cmp	w19, w0
+	beq	.L1095
+	bl	update_vpc_list
+	cmp	w0, 0
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR41
+	strh	w19, [x21, #:lo12:.LANCHOR142]
+	cset	w20, ne
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L1087
+	cmp	w19, w0, uxth
+	beq	.L1087
+	mov	w2, 2811
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR165
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+	b	.L1087
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	stp	x29, x30, [sp, -192]!
+	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	mov	w0, -1
-	ldr	x20, [x1, #:lo12:.LANCHOR108]
-	str	w0, [x29, 72]
-	adrp	x0, .LANCHOR107
 	stp	x21, x22, [sp, 32]
-	mov	w1, -3
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	adrp	x21, .LANCHOR71
-	str	x20, [x29, 64]
-	add	x21, x21, :lo12:.LANCHOR71
-	str	x0, [x29, 56]
-	mov	w22, 7
-	str	w1, [x20, 8]
-	mov	w1, -2
-	str	w1, [x20, 12]
-	ldrh	w1, [x19]
-	strh	w1, [x20, 2]
-	strh	wzr, [x20]
-	mov	w1, 61589
-	str	w1, [x0]
-	mov	w1, 22136
-	movk	w1, 0x1234, lsl 16
-	str	w1, [x0, 4]
-.L1149:
-	subs	w22, w22, #1
-	beq	.L1151
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1150
-.L1151:
-	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR42
-	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR42]
-	lsl	x0, x0, 1
-	ldrh	w1, [x2, x0]
-	sub	w1, w1, w3
-	strh	w1, [x2, x0]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L1219
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 164]
 	adrp	x0, .LANCHOR19
-	strb	wzr, [x19, 6]
+	ldrh	w26, [x19, 2]
+	str	x0, [x29, 128]
+	ldrh	w2, [x0, #:lo12:.LANCHOR19]
+	cmp	w2, w26
+	bne	.L1099
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	strh	w0, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+.L1225:
+	strb	wzr, [x19, 6]
+.L1219:
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 80
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
 	ret
-.L1150:
-	mov	x0, x19
-	bl	get_new_active_ppa
-	str	w0, [x29, 52]
+.L1099:
+	ldrh	w0, [x19, 16]
+	mov	w20, 0
+.L1100:
+	cmp	w0, w1
+	beq	.L1101
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+	mov	w23, w0
 	cmn	w0, #1
-	beq	.L1151
-	ldr	w0, [x21]
-	mov	w3, 0
-	str	w0, [x20, 4]
+	beq	.L1102
+	adrp	x1, .LANCHOR91
+	adrp	x2, .LANCHOR3
+	adrp	x20, .LANCHOR112
+	add	x4, x19, 16
+	ldr	x5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR23
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w22, 0
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR92
+	mov	w10, 65535
+	str	x2, [x29, 152]
+	ldr	x7, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR24
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
+	add	x1, x19, 16
+	str	x1, [x29, 168]
+	ldrh	w1, [x2, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1103:
+	cmp	x4, x1
+	bne	.L1107
 	mov	w2, 0
-	add	w0, w0, 1
-	mov	w1, 1
+	mov	w1, w22
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR71
+	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	and	w10, w23, 65535
+	add	x7, x0, :lo12:.LANCHOR71
+	ldr	w21, [x0, #:lo12:.LANCHOR71]
+	mov	x11, x4
+	mov	w6, 65535
+	mov	w3, 0
+	sub	w21, w21, #1
+	str	x0, [x29, 144]
+.L1108:
+	cmp	w22, w3
+	bne	.L1113
+	add	w22, w23, 1
+	ldr	w0, [x4, 4]
+	and	w22, w22, 65535
+.L1221:
+	lsr	w0, w0, 10
+	bl	P2V_plane
+	and	w27, w0, 65535
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w22
+	bne	.L1115
+	strh	w22, [x19, 2]
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+.L1115:
+	ldr	w0, [x29, 164]
+	cmp	w22, w26
+	cset	w1, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w1, w0
+	beq	.L1116
+.L1226:
+	mov	w2, w27
+	mov	w1, w22
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L1219
+.L1101:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	add	x0, x19, x20, sxtw 1
+	ldrh	w0, [x0, 16]
+	b	.L1100
+.L1102:
+	cbz	w26, .L1104
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC1
+	mov	w2, 1766
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1104:
+	ldr	w0, [x29, 164]
+	cmp	w0, 0
+	ccmp	w20, w0, 4, ne
+	beq	.L1105
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC1
+	mov	w2, 1767
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1105:
+	strh	wzr, [x19, 2]
+	b	.L1225
+.L1107:
+	ldrh	w3, [x4]
+	cmp	w3, w10
+	beq	.L1106
+	ubfiz	x2, x22, 5, 16
+	orr	w3, w23, w3, lsl 10
+	add	x2, x0, x2
+	str	w3, [x2, 4]
+	mul	w3, w22, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	mul	w3, w22, w8
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
+.L1106:
+	add	x4, x4, 2
+	b	.L1103
+.L1113:
+	ldr	w0, [x11]
+	cbnz	w0, .L1109
+	ldr	x8, [x11, 16]
+	ldr	w5, [x8, 4]
+	cmn	w5, #1
+	beq	.L1110
+	ldr	w1, [x7]
+	mov	w0, w5
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1110
+	add	w5, w5, 1
+	str	w5, [x7]
+.L1110:
+	ldr	w0, [x8]
 	cmn	w0, #1
-	csel	w0, w0, wzr, ne
-	str	w0, [x21]
-	add	x0, x29, 48
-	bl	FlashProgPages
-	ldrh	w0, [x19]
-	bl	decrement_vpc_count
-	b	.L1149
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLoadBbt,"ax",@progbits
-	.align	2
-	.global	FtlLoadBbt
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR107
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR17
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR106
-	add	x20, x22, :lo12:.LANCHOR106
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x25, [sp, 64]
-	mov	w25, 61649
-	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR108
-	ldr	x21, [x0, #:lo12:.LANCHOR108]
-	str	x21, [x20, 16]
-	bl	FtlBbtMemInit
-	ldrh	w19, [x24, #:lo12:.LANCHOR17]
-	add	x24, x24, :lo12:.LANCHOR17
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L1161:
-	ldrh	w0, [x24]
-	sub	w0, w0, #15
-	cmp	w0, w19
-	bgt	.L1164
-	lsl	w0, w19, 10
-	mov	w2, 1
-	str	w0, [x20, 4]
-	mov	w1, w2
-	mov	x0, x20
+	bne	.L1112
+	ubfiz	x3, x3, 5, 16
+	and	w22, w23, 65535
+	add	x3, x4, x3
+	ldr	w0, [x3, 4]
+	b	.L1221
+.L1109:
+	mov	w6, w10
+.L1112:
+	add	w3, w3, 1
+	add	x11, x11, 32
+	and	w3, w3, 65535
+	b	.L1108
+.L1116:
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L1117
+	ldrb	w0, [x19, 8]
+	cbnz	w0, .L1118
+.L1117:
+	adrp	x25, .LANCHOR145
+	and	w28, w23, 65535
+	ldr	w0, [x25, #:lo12:.LANCHOR145]
+	cmn	w0, #1
+	bne	.L1119
+	str	w21, [x25, #:lo12:.LANCHOR145]
+.L1119:
+	add	w0, w26, 7
+	cmp	w0, w23, uxth
+	bge	.L1168
+	sub	w24, w28, #7
+	and	w24, w24, 65535
+.L1120:
+	ldr	x0, [x29, 152]
+	mov	w3, 65535
+	mov	w5, 1
+	add	x4, x0, :lo12:.LANCHOR3
+.L1121:
+	cmp	w24, w28
+	bhi	.L1131
+	ldrh	w1, [x4]
+	mov	w23, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	add	x1, x1, 8
+	ldr	x2, [x29, 168]
+	add	x1, x19, x1, lsl 1
+	b	.L1132
+.L1168:
+	mov	w24, w26
+	b	.L1120
+.L1123:
+	ldrh	w6, [x2]
+	cmp	w6, w3
+	beq	.L1122
+	ubfiz	x7, x23, 5, 16
+	add	w23, w23, 1
+	add	x7, x0, x7
+	and	w23, w23, 65535
+	orr	w6, w24, w6, lsl 10
+	str	w6, [x7, 4]
+.L1122:
+	add	x2, x2, 2
+.L1132:
+	cmp	x2, x1
+	bne	.L1123
+	mov	w1, w23
+	mov	w2, 0
+	str	w5, [x29, 112]
+	ubfiz	x23, x23, 5, 16
+	str	w3, [x29, 120]
+	add	x23, x23, 16
+	str	x4, [x29, 136]
+	bl	FlashReadPages
+	ldr	x2, [x20, #:lo12:.LANCHOR112]
+	ldr	w1, [x25, #:lo12:.LANCHOR145]
+	ldr	w5, [x29, 112]
+	add	x0, x2, 16
+	ldr	w3, [x29, 120]
+	add	x23, x2, x23
+	ldr	x4, [x29, 136]
+	mov	w2, 0
+.L1124:
+	cmp	x23, x0
+	bne	.L1129
+	cbz	w2, .L1130
+	str	w1, [x25, #:lo12:.LANCHOR145]
+.L1130:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L1121
+.L1129:
+	ldr	w6, [x0, -16]
+	cbz	w6, .L1125
+	cbz	w2, .L1118
+	str	w1, [x25, #:lo12:.LANCHOR145]
+.L1118:
+	adrp	x0, .LANCHOR167
+	mov	w23, w26
+	mov	w1, 1
+	adrp	x28, .LANCHOR145
+	strh	w1, [x0, #:lo12:.LANCHOR167]
+	add	x0, x28, :lo12:.LANCHOR145
+	str	x0, [x29, 104]
+.L1133:
+	ldr	x1, [x29, 152]
+	mov	w24, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w5, 65535
+	ldr	x2, [x29, 168]
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1134:
+	cmp	x1, x2
+	bne	.L1136
+	mov	w2, 0
+	mov	w1, w24
 	bl	FlashReadPages
-	ldr	w0, [x20]
-	cmn	w0, #1
+	mov	x25, 0
+	ubfiz	x0, x24, 5, 16
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR168
+	add	x0, x0, :lo12:.LANCHOR168
+	str	x0, [x29, 120]
+.L1137:
+	ldr	x0, [x29, 112]
+	cmp	x25, x0
 	bne	.L1162
-	ldr	w0, [x20, 4]
-	mov	w2, 1
-	mov	w1, w2
-	add	w0, w0, 1
-	str	w0, [x20, 4]
-	mov	x0, x20
-	bl	FlashReadPages
+	ldr	x0, [x29, 128]
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w23
+	bne	.L1133
+	ldr	x0, [x29, 152]
+	mov	w2, 65535
+	strh	w23, [x19, 2]
+	strh	wzr, [x19, 4]
+	ldrh	w1, [x0, #:lo12:.LANCHOR3]
+	mov	w0, 0
+.L1163:
+	cmp	w0, w1
+	beq	.L1219
+	ldr	x4, [x29, 168]
+	ldrh	w3, [x4], 2
+	str	x4, [x29, 168]
+	cmp	w3, w2
+	beq	.L1164
+	strb	w0, [x19, 6]
+	b	.L1219
+.L1125:
+	ldr	x6, [x0]
+	ldrh	w7, [x6]
+	cmp	w7, w3
+	beq	.L1128
+	ldr	w6, [x6, 4]
+	cmn	w6, #1
+	csel	w1, w1, w6, eq
+	csel	w2, w2, w5, eq
+.L1128:
+	add	x0, x0, 32
+	b	.L1124
+.L1131:
+	mov	w0, -1
+	str	w0, [x25, #:lo12:.LANCHOR145]
+	b	.L1118
+.L1136:
+	ldrh	w3, [x2]
+	cmp	w3, w5
+	beq	.L1135
+	ubfiz	x4, x24, 5, 16
+	add	w24, w24, 1
+	add	x4, x0, x4
+	and	w24, w24, 65535
+	orr	w3, w23, w3, lsl 10
+	str	w3, [x4, 4]
+.L1135:
+	add	x2, x2, 2
+	b	.L1134
 .L1162:
-	ldr	w0, [x20]
+	ldr	x4, [x20, #:lo12:.LANCHOR112]
+	add	x4, x4, x25
+	ldr	w5, [x4, 4]
+	str	w5, [x29, 188]
+	lsr	w0, w5, 10
+	bl	P2V_plane
+	and	w0, w0, 65535
+	cmp	w23, w26
+	bcc	.L1138
+	ldr	w1, [x29, 164]
+	ccmp	w1, w0, 0, eq
+	bhi	.L1138
+	cmp	w23, w22
+	ccmp	w27, w0, 0, eq
+	beq	.L1139
+	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L1163
-	ldrh	w0, [x21]
-	cmp	w0, w25
-	bne	.L1163
-	adrp	x1, .LANCHOR37
-	add	x0, x1, :lo12:.LANCHOR37
-	strh	w19, [x1, #:lo12:.LANCHOR37]
-	ldr	w1, [x21, 4]
-	str	w1, [x0, 8]
-	ldrh	w1, [x21, 8]
-	strh	w1, [x0, 4]
-.L1164:
-	adrp	x19, .LANCHOR37
-	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR37
-	ldrh	w1, [x19, #:lo12:.LANCHOR37]
-	cmp	w1, w0
-	beq	.L1178
-	ldrh	w1, [x20, 4]
+	beq	.L1140
+	ldr	x3, [x4, 16]
+	mov	w0, 61589
+	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1168
-	add	x0, x22, :lo12:.LANCHOR106
-	lsl	w1, w1, 10
-	mov	w2, 1
+	beq	.L1141
+	ldrh	w0, [x19]
+.L1223:
+	bl	decrement_vpc_count
+	b	.L1138
+.L1141:
+	ldr	w21, [x3, 4]
+	cmn	w21, #1
+	beq	.L1142
+	ldr	x0, [x29, 144]
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1142
+	ldr	x1, [x29, 144]
+	add	w0, w21, 1
+	str	w0, [x1, #:lo12:.LANCHOR71]
+.L1142:
+	ldp	w24, w0, [x3, 8]
+	add	x1, x29, 184
+	str	w0, [x29, 180]
+	mov	w2, 0
+	mov	w0, w24
+	bl	log2phys
+	ldr	w1, [x28, #:lo12:.LANCHOR145]
+	cmn	w1, #1
+	beq	.L1143
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1143
+	ldr	w1, [x29, 180]
+	cmn	w1, #1
+	beq	.L1144
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w2, 0
+	add	x0, x0, x25
+	ldr	x3, [x0, 16]
 	str	w1, [x0, 4]
-	mov	w1, w2
+	mov	w1, 1
+	str	x3, [x29, 136]
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR106]
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	x3, [x29, 136]
+	add	x4, x0, x25
+	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1168
-	ldrh	w1, [x21]
-	mov	w0, 61649
-	cmp	w1, w0
-	bne	.L1168
-	ldr	w1, [x20, 8]
-	ldr	w0, [x21, 4]
-	cmp	w0, w1
-	bls	.L1168
-	ldrh	w1, [x20, 4]
-	str	w0, [x20, 8]
-	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR37]
-	strh	w0, [x20, 4]
-.L1168:
-	ldrh	w0, [x19, #:lo12:.LANCHOR37]
-	add	x24, x19, :lo12:.LANCHOR37
-	mov	w1, 1
-	mov	w25, 61649
-	bl	FtlGetLastWrittenPage
-	sxth	w20, w0
-	add	w0, w0, 1
-	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR106
-.L1170:
-	tbz	w20, #31, .L1173
-	adrp	x1, .LANCHOR164
+	bne	.L1145
+.L1146:
+	mov	w0, -1
+	str	w0, [x29, 180]
+.L1153:
+	ldr	w3, [x29, 180]
+	cmn	w3, #1
+	beq	.L1138
+.L1167:
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w24, w0, 65535
+	adrp	x0, .LANCHOR5
+	mov	w3, w24
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w0, w24
+	bhi	.L1158
+	mov	w2, 2019
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
-	mov	w2, 254
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
+	str	w24, [x29, 136]
 	bl	printf
-.L1172:
-	add	x0, x19, :lo12:.LANCHOR37
-	ldrh	w1, [x21, 10]
-	strh	w1, [x0, 6]
-	mov	w1, 65535
-	ldrh	w0, [x21, 12]
+	ldr	w3, [x29, 136]
+.L1158:
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x24, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1159
+	mov	w0, w3
+	b	.L1223
+.L1144:
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	bne	.L1138
+	mov	w2, 1
+	add	x1, x29, 180
+	mov	w0, w24
+	bl	log2phys
+.L1138:
+	add	x25, x25, 32
+	b	.L1137
+.L1145:
+	ldr	w0, [x3, 8]
+	cmp	w24, w0
+	bne	.L1146
+	ldr	w0, [x3, 4]
+	str	w0, [x29, 136]
+	str	x3, [x29, 96]
+	uxtw	x1, w0
+	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1146
+	ldp	w0, w1, [x29, 184]
+	ldr	x3, [x29, 96]
 	cmp	w0, w1
-	beq	.L1175
-	adrp	x1, .LANCHOR2
-	ldr	w2, [x1, #:lo12:.LANCHOR2]
-	cmp	w0, w2
-	beq	.L1175
-	adrp	x1, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	lsr	w1, w1, 2
-	cmp	w2, w1
-	bcs	.L1175
+	ldr	w1, [x29, 180]
+	bne	.L1148
+.L1222:
+	mov	w0, w24
+	bl	FtlReUsePrevPpa
+	b	.L1146
+.L1148:
 	cmp	w0, w1
-	bcs	.L1175
-	bl	FtlSysBlkNumInit
-.L1175:
-	add	x19, x19, :lo12:.LANCHOR37
-	adrp	x21, .LANCHOR10
-	adrp	x23, .LANCHOR137
-	add	x19, x19, 32
-	add	x21, x21, :lo12:.LANCHOR10
-	add	x23, x23, :lo12:.LANCHOR137
-	add	x22, x22, :lo12:.LANCHOR106
-	mov	w20, 0
-.L1176:
-	ldrh	w0, [x21]
-	cmp	w20, w0
-	bcc	.L1177
-	mov	w0, 0
-.L1160:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1163:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1161
-.L1173:
-	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	beq	.L1146
+	cmn	w0, #1
+	beq	.L1149
+	ldr	x3, [x4, 16]
+	mov	w2, 0
+	str	w0, [x4, 4]
+	mov	w1, 1
+	str	x3, [x29, 96]
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	x3, [x29, 96]
+.L1150:
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	beq	.L1151
+	ldr	x0, [x29, 104]
+	ldr	w3, [x3, 4]
+	mov	w1, w3
+	ldr	w0, [x0]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1151
+	ldr	w0, [x29, 136]
+	mov	w1, w3
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L1146
+.L1151:
+	ldr	w1, [x29, 180]
+	b	.L1222
+.L1149:
+	str	w0, [x4]
+	b	.L1150
+.L1143:
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	beq	.L1153
 	mov	w2, 1
-	mov	w1, w2
-	orr	w0, w20, w0, lsl 10
-	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x0, [x24, 8]
-	mov	x0, x24
+	add	x1, x29, 188
+	mov	w0, w24
+	bl	log2phys
+	ldr	w3, [x29, 184]
+	cmn	w3, #1
+	beq	.L1153
+	ldr	w0, [x29, 180]
+	cmp	w3, w0
+	beq	.L1167
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	adrp	x1, .LANCHOR51
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	beq	.L1157
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	beq	.L1157
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1153
+.L1157:
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 136]
 	bl	FlashReadPages
-	ldr	w0, [x24]
+	ldr	x0, [x20, #:lo12:.LANCHOR112]
+	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1171
-	ldrh	w0, [x21]
-	cmp	w0, w25
-	beq	.L1172
-.L1171:
-	sub	w20, w20, #1
-	sxth	w20, w20
-	b	.L1170
-.L1177:
-	ldrh	w2, [x23]
-	ldr	x0, [x22, 8]
-	mul	w1, w2, w20
-	lsl	w2, w2, 2
-	add	w20, w20, 1
-	add	x1, x0, x1, lsl 2
-	ldr	x0, [x19], 8
-	bl	ftl_memcpy
-	b	.L1176
-.L1178:
-	mov	w0, -1
-	b	.L1160
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlMakeBbt,"ax",@progbits
+	beq	.L1153
+	ldr	x4, [x29, 136]
+	mov	w0, w21
+	ldr	w1, [x4, 4]
+	bl	ftl_cmp_data_ver
+	cbnz	w0, .L1153
+	mov	w2, 1
+	add	x1, x29, 184
+	mov	w0, w24
+	bl	log2phys
+	b	.L1153
+.L1159:
+	mov	w1, w24
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
+	bl	printf
+	b	.L1138
+.L1140:
+	ldr	x0, [x29, 120]
+	ldr	w0, [x0]
+	cmp	w0, 31
+	bhi	.L1160
+	adrp	x1, .LANCHOR169
+	add	x1, x1, :lo12:.LANCHOR169
+	str	w5, [x1, w0, uxtw 2]
+	add	w0, w0, 1
+	ldr	x1, [x29, 120]
+	str	w0, [x1]
+.L1160:
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	ldr	w0, [x28, #:lo12:.LANCHOR145]
+	cmn	w0, #1
+	bne	.L1161
+.L1224:
+	str	w21, [x28, #:lo12:.LANCHOR145]
+	b	.L1138
+.L1161:
+	cmp	w21, w0
+	bcs	.L1138
+	b	.L1224
+.L1164:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	b	.L1163
+.L1139:
+	strb	w27, [x19, 6]
+	strh	w22, [x19, 2]
+	b	.L1226
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlWriteDump_data,"ax",@progbits
 	.align	2
-	.global	FtlMakeBbt
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
+	.global	FtlWriteDump_data
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR37
+	adrp	x19, .LANCHOR51
+	add	x0, x19, :lo12:.LANCHOR51
+	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	add	x21, x20, :lo12:.LANCHOR37
-	stp	x25, x26, [sp, 64]
-	add	x24, x21, 32
-	stp	x27, x28, [sp, 80]
-	bl	FtlBbtMemInit
-	bl	FtlLoadFactoryBbt
-	adrp	x28, .LANCHOR106
-	add	x21, x21, 12
-	add	x25, x28, :lo12:.LANCHOR106
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	str	x0, [x29, 120]
-.L1191:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w22, w0
-	bcc	.L1197
-	adrp	x21, .LANCHOR25
-	add	x21, x21, :lo12:.LANCHOR25
-	mov	w19, 0
-.L1198:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L1199
-	add	x21, x20, :lo12:.LANCHOR37
-	mov	w22, 65535
-	ldrh	w19, [x21, 12]
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L1200:
-	ldrh	w0, [x21, 12]
-	sub	w0, w0, #47
-	cmp	w0, w19
-	bgt	.L1204
-	mov	w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1201
-	mov	w0, w19
-	bl	FlashTestBlk
-	cbz	w0, .L1202
-	mov	w0, w19
-	bl	FtlBbmMapBadBlock
-.L1201:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1200
-.L1197:
-	adrp	x2, .LANCHOR108
-	adrp	x0, .LANCHOR107
-	add	x19, x28, :lo12:.LANCHOR106
-	ldrh	w1, [x21]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR108]
-	cmp	w1, w3
-	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR17
-	str	x2, [x29, 112]
-	beq	.L1192
-	ldrh	w4, [x23, #:lo12:.LANCHOR17]
-	mov	w2, 1
-	madd	w27, w4, w22, w1
-	mov	w1, w2
-	lsl	w0, w27, 10
-	str	w0, [x19, 4]
-	mov	x0, x19
+	ldrh	w2, [x0, 4]
+	str	x25, [sp, 64]
+	cbz	w2, .L1228
+	ldrb	w1, [x0, 8]
+	cbnz	w1, .L1228
+	adrp	x3, .LANCHOR19
+	ldrb	w1, [x0, 7]
+	ldrh	w3, [x3, #:lo12:.LANCHOR19]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L1228
+	ldrb	w0, [x0, 10]
+	cbnz	w0, .L1227
+	adrp	x0, .LANCHOR61
+	mov	w2, 0
+	add	x1, x29, 92
+	ldr	w21, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR3
+	sub	w21, w21, #1
+	ldrh	w25, [x0, #:lo12:.LANCHOR3]
+	mov	w0, w21
+	bl	log2phys
+	adrp	x2, .LANCHOR123
+	adrp	x0, .LANCHOR115
+	ldr	w1, [x29, 92]
+	ldr	x20, [x2, #:lo12:.LANCHOR123]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	cmn	w1, #1
+	str	w1, [x29, 100]
+	stp	x0, x20, [x29, 104]
+	str	w21, [x29, 120]
+	str	wzr, [x20, 4]
+	beq	.L1230
+	mov	w2, 0
+	mov	w1, 1
+	add	x0, x29, 96
 	bl	FlashReadPages
-	ldr	x1, [x19, 8]
-	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR17]
-	add	w2, w2, 7
-	lsr	w2, w2, 3
-	bl	ftl_memcpy
-.L1193:
-	mov	w0, w27
-	add	w22, w22, 1
-	bl	FtlBbmMapBadBlock
-	add	x24, x24, 8
-	add	x21, x21, 2
-	b	.L1191
-.L1192:
-	mov	w1, w22
-	bl	FlashGetBadBlockList
-	ldr	x0, [x19, 8]
-	ldr	x1, [x24]
-	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR17]
-	add	x23, x23, :lo12:.LANCHOR17
-	adrp	x0, .LANCHOR137
-	sub	w19, w19, #1
-	add	x0, x0, :lo12:.LANCHOR137
-	and	w19, w19, 65535
-	str	x0, [x29, 104]
-.L1194:
-	ldrh	w0, [x23]
-	madd	w0, w22, w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L1195
-	ldr	x0, [x29, 112]
-	mov	w2, 16
-	strh	w19, [x21]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	bl	ftl_memset
-	adrp	x0, .LANCHOR107
-	mov	w2, 4096
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	bl	ftl_memset
-	mov	w0, -3872
-	strh	w0, [x26]
-	ldrh	w4, [x23]
-	ldrh	w0, [x21]
-	strh	w0, [x26, 2]
-	ldr	x1, [x24]
-	str	wzr, [x26, 4]
-	madd	w27, w4, w22, w0
-	lsl	w0, w27, 10
-	str	w0, [x25, 4]
-	ldr	x0, [x29, 104]
-	ldrh	w2, [x0]
-	ldr	x0, [x25, 8]
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	mov	w2, 1
-	mov	x0, x25
-	mov	w1, w2
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	mov	x0, x25
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x25]
+.L1231:
+	adrp	x23, .LANCHOR71
+	lsl	w25, w25, 2
+	add	x22, x19, :lo12:.LANCHOR51
+	add	x23, x23, :lo12:.LANCHOR71
+	mov	w0, -3947
+	mov	w24, 0
+	strh	w0, [x20]
+.L1232:
+	cmp	w25, w24
+	bne	.L1236
+.L1233:
+	add	x19, x19, :lo12:.LANCHOR51
+	mov	w0, 1
+	strb	w0, [x19, 10]
+.L1227:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1230:
+	adrp	x1, .LANCHOR23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+	b	.L1231
+.L1236:
+	ldrh	w0, [x22, 4]
+	cbz	w0, .L1233
+	ldr	w0, [x29, 100]
+	add	w24, w24, 1
+	stp	w21, w0, [x20, 8]
+	ldrh	w0, [x22]
+	strh	w0, [x20, 2]
+	mov	x0, x22
+	bl	get_new_active_ppa
+	str	w0, [x29, 100]
+	ldr	w0, [x23]
+	mov	w3, 0
+	str	w0, [x20, 4]
+	mov	w2, 0
+	add	w0, w0, 1
+	mov	w1, 1
 	cmn	w0, #1
-	bne	.L1193
-	mov	w0, w27
-	bl	FtlBbmMapBadBlock
-	b	.L1194
-.L1195:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L1194
-.L1199:
+	csel	w0, w0, wzr, ne
+	str	w0, [x23]
+	add	x0, x29, 96
+	bl	FlashProgPages
+	ldrh	w0, [x22]
+	bl	decrement_vpc_count
+	b	.L1232
+.L1228:
+	add	x19, x19, :lo12:.LANCHOR51
+	strb	wzr, [x19, 10]
+	b	.L1227
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",@progbits
+	.align	2
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
+	str	x21, [sp, 32]
+	mov	w19, 0
+	adrp	x21, .LANCHOR55
+	bl	FtlWriteDump_data
+.L1246:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1248
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1248:
+	ldr	x1, [x21, #:lo12:.LANCHOR55]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L1247
 	mov	w0, w19
+	bl	flush_l2p_region
+.L1247:
 	add	w19, w19, 1
-	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L1198
-.L1202:
-	ldrh	w0, [x21]
-	cmp	w0, w22
-	bne	.L1203
-	strh	w19, [x21]
-	b	.L1201
-.L1203:
-	strh	w19, [x21, 4]
-.L1204:
-	adrp	x0, .LANCHOR111
-	add	x19, x20, :lo12:.LANCHOR37
-	ldrh	w1, [x20, #:lo12:.LANCHOR37]
-	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	str	wzr, [x19, 8]
-	lsl	w1, w1, 10
-	strh	wzr, [x19, 2]
+	b	.L1246
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.align	2
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	stp	x29, x30, [sp, -80]!
+	adrp	x1, .LANCHOR123
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	mov	w0, -1
+	stp	x21, x22, [sp, 32]
+	str	w0, [x29, 72]
+	adrp	x0, .LANCHOR115
+	ldr	x21, [x1, #:lo12:.LANCHOR123]
+	mov	w1, -3
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	adrp	x22, .LANCHOR71
+	str	x21, [x29, 64]
+	add	x22, x22, :lo12:.LANCHOR71
+	str	x0, [x29, 56]
+	ldrh	w20, [x19, 4]
+	str	w1, [x21, 8]
+	mov	w1, -2
+	str	w1, [x21, 12]
+	and	w20, w20, 1
+	ldrh	w1, [x19]
+	add	w20, w20, 6
+	strh	w1, [x21, 2]
+	strh	wzr, [x21]
+	mov	w1, 61589
+	str	w1, [x0]
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	lsl	w1, w1, 10
-	str	w1, [x0, 36]
-	mov	w1, 1
-	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmMapBadBlock
+.L1256:
 	ldrh	w0, [x19, 4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	strh	wzr, [x19, 2]
-	ldr	w0, [x19, 8]
-	ldrh	w1, [x19, 4]
-	add	w0, w0, 1
-	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR37]
-	bl	FtlBbmTblFlush
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
+	cbnz	w0, .L1252
+.L1253:
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR42
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR19
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	FtlMakeBbt, .-FtlMakeBbt
+.L1252:
+	mov	x0, x19
+	bl	get_new_active_ppa
+	str	w0, [x29, 52]
+	cmn	w0, #1
+	beq	.L1253
+	ldr	w0, [x22]
+	mov	w3, 0
+	str	w0, [x21, 4]
+	mov	w2, 0
+	add	w0, w0, 1
+	mov	w1, 1
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x22]
+	add	x0, x29, 48
+	bl	FlashProgPages
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	subs	w20, w20, #1
+	bne	.L1256
+	b	.L1253
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartWrite
@@ -8632,7 +8976,7 @@ FtlVendorPartWrite:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bhi	.L1218
+	bhi	.L1272
 	adrp	x0, .LANCHOR22
 	adrp	x25, .LANCHOR12
 	adrp	x26, .LANCHOR23
@@ -8642,9 +8986,9 @@ FtlVendorPartWrite:
 	add	x26, x26, :lo12:.LANCHOR23
 	mov	w23, 0
 	lsr	w21, w28, w21
-.L1212:
-	cbnz	w20, .L1217
-.L1210:
+.L1266:
+	cbnz	w20, .L1271
+.L1264:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8653,10 +8997,10 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1217:
+.L1271:
 	ldrh	w1, [x25]
 	adrp	x0, .LANCHOR133
-	adrp	x27, .LANCHOR124
+	adrp	x27, .LANCHOR117
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
 	udiv	w22, w28, w1
 	ldr	w2, [x0, w21, uxtw 2]
@@ -8666,10 +9010,10 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1214
+	cbz	w2, .L1268
 	cmp	w19, w1
-	beq	.L1214
-	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	beq	.L1268
+	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
 	str	w2, [x29, 116]
@@ -8678,19 +9022,19 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 112
 	bl	FlashReadPages
-.L1215:
+.L1269:
 	lsl	w4, w19, 9
-	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	lsl	w22, w22, 7
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x27, #:lo12:.LANCHOR124]
+	ldr	x2, [x27, #:lo12:.LANCHOR117]
 	mov	w1, w21
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
+	adrp	x0, .LANCHOR158
+	add	x0, x0, :lo12:.LANCHOR158
 	sub	w20, w20, w19
 	add	w28, w28, w19
 	add	w21, w21, 1
@@ -8699,16 +9043,16 @@ FtlVendorPartWrite:
 	ldr	w4, [x29, 108]
 	csinv	w23, w23, wzr, ne
 	add	x24, x24, x4, sxtw
-	b	.L1212
-.L1214:
+	b	.L1266
+.L1268:
 	ldrh	w2, [x26]
 	mov	w1, 0
-	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	ldr	x0, [x27, #:lo12:.LANCHOR117]
 	bl	ftl_memset
-	b	.L1215
-.L1218:
+	b	.L1269
+.L1272:
 	mov	w23, -1
-	b	.L1210
+	b	.L1264
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
@@ -8721,8 +9065,8 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1223
-	mov	w0, 68
+	bne	.L1277
+	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -8764,7 +9108,7 @@ Ftl_save_ext_data:
 	str	w0, [x2, 48]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1223:
+.L1277:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -8772,23 +9116,23 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x2, .LANCHOR165
-	ldrh	w1, [x2, #:lo12:.LANCHOR165]
+	adrp	x2, .LANCHOR170
+	ldrh	w1, [x2, #:lo12:.LANCHOR170]
 	cmp	w1, 31
-	bhi	.L1229
+	bhi	.L1283
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR165]
+	strh	w1, [x2, #:lo12:.LANCHOR170]
 	mov	w1, 1
-.L1226:
+.L1280:
 	adrp	x2, .LANCHOR127
-	cbnz	w0, .L1227
+	cbnz	w0, .L1281
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1231
-.L1227:
+	bcc	.L1285
+.L1281:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
@@ -8811,10 +9155,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1229:
+.L1283:
 	mov	w1, 32
-	b	.L1226
-.L1231:
+	b	.L1280
+.L1285:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -8833,30 +9177,31 @@ sftl_vendor_write:
 FtlVendorPartRead:
 	stp	x29, x30, [sp, -208]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w1
 	stp	x21, x22, [sp, 32]
+	mov	w22, w0
+	mov	w21, w1
 	add	w1, w0, w1
-	mov	w21, w0
 	adrp	x0, .LANCHOR16
+	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1242
+	bhi	.L1297
 	adrp	x0, .LANCHOR22
-	adrp	x24, .LANCHOR12
-	mov	x23, x2
-	add	x24, x24, :lo12:.LANCHOR12
-	ldrh	w3, [x0, #:lo12:.LANCHOR22]
-	mov	w22, 0
-	adrp	x25, .LANCHOR133
-	lsr	w26, w21, w3
-.L1236:
-	cbnz	w20, .L1241
-.L1234:
-	mov	w0, w22
+	mov	x25, x2
+	mov	w24, 0
+	adrp	x27, .LANCHOR133
+	ldrh	w20, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR12
+	add	x0, x0, :lo12:.LANCHOR12
+	str	x0, [x29, 104]
+	lsr	w20, w22, w20
+.L1290:
+	cbnz	w21, .L1296
+.L1288:
+	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8864,55 +9209,74 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L1241:
-	ldrh	w19, [x24]
-	ldr	x0, [x25, #:lo12:.LANCHOR133]
-	udiv	w27, w21, w19
-	ldr	w1, [x0, w26, uxtw 2]
-	and	w0, w20, 65535
-	msub	w27, w27, w19, w21
-	sub	w19, w19, w27
+.L1296:
+	ldr	x0, [x27, #:lo12:.LANCHOR133]
+	ldr	w4, [x0, w20, uxtw 2]
+	ldr	x0, [x29, 104]
+	ldrh	w19, [x0]
+	and	w0, w21, 65535
+	udiv	w23, w22, w19
+	msub	w23, w23, w19, w22
+	sub	w19, w19, w23
 	and	w19, w19, 65535
-	cmp	w20, w19
+	cmp	w21, w19
 	csel	w19, w0, w19, cc
-	lsl	w28, w19, 9
-	cbz	w1, .L1238
-	adrp	x4, .LANCHOR124
+	lsl	w26, w19, 9
+	cbz	w4, .L1292
+	adrp	x28, .LANCHOR117
 	mov	w2, 1
-	str	x4, [x29, 104]
-	lsl	w27, w27, 7
-	ldr	x0, [x4, #:lo12:.LANCHOR124]
+	str	w4, [x29, 96]
+	mov	w1, w2
+	ldr	x0, [x28, #:lo12:.LANCHOR117]
 	str	x0, [x29, 120]
 	add	x0, x29, 144
-	str	w1, [x29, 116]
-	mov	w1, w2
+	str	w4, [x29, 116]
 	str	x0, [x29, 128]
 	add	x0, x29, 112
 	bl	FlashReadPages
-	ldr	x4, [x29, 104]
-	mov	w2, w28
 	ldr	w0, [x29, 112]
+	mov	x5, x28
+	ldr	w4, [x29, 96]
 	cmn	w0, #1
-	mov	x0, x23
-	ldr	x1, [x4, #:lo12:.LANCHOR124]
-	csinv	w22, w22, wzr, ne
-	add	x1, x1, x27, sxtw 2
+	adrp	x0, .LANCHOR148
+	csinv	w24, w24, wzr, ne
+	ldr	w0, [x0, #:lo12:.LANCHOR148]
+	cmp	w0, 256
+	bne	.L1294
+	mov	w2, w4
+	mov	w1, w20
+	adrp	x0, .LC107
+	str	x28, [x29, 96]
+	add	x0, x0, :lo12:.LC107
+	bl	printf
+	ldr	x2, [x28, #:lo12:.LANCHOR117]
+	mov	w1, w20
+	adrp	x0, .LANCHOR158
+	add	x0, x0, :lo12:.LANCHOR158
+	bl	FtlMapWritePage
+	ldr	x5, [x29, 96]
+.L1294:
+	ldr	x1, [x5, #:lo12:.LANCHOR117]
+	lsl	w23, w23, 7
+	mov	w2, w26
+	mov	x0, x25
+	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1240:
-	add	w26, w26, 1
-	sub	w20, w20, w19
-	add	w21, w21, w19
-	add	x23, x23, x28, sxtw
-	b	.L1236
-.L1238:
-	mov	w2, w28
+.L1295:
+	add	w20, w20, 1
+	sub	w21, w21, w19
+	add	w22, w22, w19
+	add	x25, x25, x26, sxtw
+	b	.L1290
+.L1292:
+	mov	w2, w26
 	mov	w1, 0
-	mov	x0, x23
+	mov	x0, x25
 	bl	ftl_memset
-	b	.L1240
-.L1242:
-	mov	w22, -1
-	b	.L1234
+	b	.L1295
+.L1297:
+	mov	w24, -1
+	b	.L1288
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -8933,10 +9297,10 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1245
-	adrp	x1, .LC103
+	beq	.L1300
+	adrp	x1, .LC108
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC103
+	add	x1, x1, :lo12:.LC108
 	add	x0, x0, :lo12:.LC71
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
@@ -8944,7 +9308,7 @@ FtlLoadEctTbl:
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1245:
+.L1300:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -8969,18 +9333,18 @@ Ftl_load_ext_data:
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1248
+	beq	.L1303
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
 	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1248:
+.L1303:
 	ldr	w1, [x19, #:lo12:.LANCHOR81]
 	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
 	adrp	x1, .LANCHOR73
-	bne	.L1249
+	bne	.L1304
 	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR68]
@@ -9015,7 +9379,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR77
 	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1249:
+.L1304:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR72
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
@@ -9050,195 +9414,191 @@ FtlVpcTblFlush:
 	mov	w2, 19539
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR108
+	adrp	x25, .LANCHOR123
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR106
+	adrp	x22, .LANCHOR148
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR107
+	adrp	x24, .LANCHOR115
 	stp	x27, x28, [sp, 80]
-	add	x28, x22, :lo12:.LANCHOR106
-	ldr	x21, [x25, #:lo12:.LANCHOR108]
+	add	x28, x22, :lo12:.LANCHOR148
+	ldr	x27, [x25, #:lo12:.LANCHOR123]
 	movk	w2, 0x4654, lsl 16
 	stp	x19, x20, [sp, 16]
-	add	x19, x1, :lo12:.LANCHOR79
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	add	x20, x1, :lo12:.LANCHOR79
+	ldr	x0, [x24, #:lo12:.LANCHOR115]
 	adrp	x23, .LANCHOR70
 	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	adrp	x27, .LANCHOR20
-	stp	x0, x21, [x28, 8]
+	mov	w21, 0
+	stp	x0, x27, [x28, 8]
 	mov	w26, 65535
-	strh	w1, [x21, 2]
+	strh	w1, [x27, 2]
 	mov	w1, -3932
-	strh	w1, [x21]
-	ldr	w1, [x19, 8]
-	stp	w1, wzr, [x21, 4]
+	strh	w1, [x27]
+	ldr	w1, [x20, 8]
+	stp	w1, wzr, [x27, 4]
 	adrp	x1, .LANCHOR39
-	add	x20, x1, :lo12:.LANCHOR39
-	str	wzr, [x21, 12]
+	add	x19, x1, :lo12:.LANCHOR39
+	str	wzr, [x27, 12]
 	str	w2, [x1, #:lo12:.LANCHOR39]
-	mov	w1, 68
+	mov	w1, 72
 	movk	w1, 0x5000, lsl 16
-	str	w1, [x20, 4]
-	ldrh	w1, [x19, 6]
+	str	w1, [x19, 4]
+	ldrh	w1, [x20, 6]
 	adrp	x2, .LANCHOR51
-	strh	w1, [x20, 8]
+	strh	w1, [x19, 8]
 	adrp	x1, .LANCHOR10
 	ldrh	w1, [x1, #:lo12:.LANCHOR10]
-	strb	w1, [x20, 10]
+	strb	w1, [x19, 10]
 	add	x1, x2, :lo12:.LANCHOR51
 	ldrh	w2, [x2, #:lo12:.LANCHOR51]
-	strh	w2, [x20, 14]
+	strh	w2, [x19, 14]
 	ldrh	w2, [x1, 2]
 	ldrb	w3, [x1, 6]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x20, 11]
+	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x20, 16]
+	strh	w2, [x19, 16]
 	adrp	x2, .LANCHOR52
 	add	x1, x2, :lo12:.LANCHOR52
 	ldrh	w2, [x2, #:lo12:.LANCHOR52]
 	ldrb	w3, [x1, 6]
-	strh	w2, [x20, 18]
+	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x20, 12]
+	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x20, 20]
+	strh	w2, [x19, 20]
 	adrp	x2, .LANCHOR53
 	add	x1, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	ldrb	w3, [x1, 6]
-	strh	w2, [x20, 22]
+	strh	w2, [x19, 22]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
-	strb	w1, [x20, 13]
+	strb	w1, [x19, 13]
 	adrp	x1, .LANCHOR72
 	orr	w2, w3, w2, lsl 6
-	strh	w2, [x20, 24]
+	strh	w2, [x19, 24]
 	ldr	w1, [x1, #:lo12:.LANCHOR72]
-	str	w1, [x20, 32]
+	str	w1, [x19, 32]
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	str	w1, [x20, 40]
+	str	w1, [x19, 40]
 	adrp	x1, .LANCHOR71
 	ldr	w1, [x1, #:lo12:.LANCHOR71]
-	str	w1, [x20, 36]
+	str	w1, [x19, 36]
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x28, 8]
-	mov	x1, x20
+	mov	x1, x19
 	mov	w2, 48
-	adrp	x20, .LANCHOR5
+	adrp	x19, .LANCHOR5
 	bl	ftl_memcpy
 	adrp	x1, .LANCHOR42
-	ldrh	w2, [x20, #:lo12:.LANCHOR5]
+	ldrh	w2, [x19, #:lo12:.LANCHOR5]
 	ldr	x0, [x28, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x20, #:lo12:.LANCHOR5]
+	ldrh	w1, [x19, #:lo12:.LANCHOR5]
+	mov	x19, x20
+	ldr	x0, [x28, 8]
+	adrp	x20, .LANCHOR20
+	add	x20, x20, :lo12:.LANCHOR20
+	lsr	w2, w1, 3
+	ubfiz	x3, x1, 1, 16
 	adrp	x1, .LANCHOR1
-	ldr	x3, [x28, 8]
-	mov	w20, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR1]
-	lsr	w2, w0, 3
-	ubfiz	x0, x0, 1, 16
+	add	x3, x3, 48
+	and	x3, x3, -4
 	add	w2, w2, 4
-	add	x0, x0, 48
-	and	x0, x0, -4
-	add	x0, x3, x0
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
+	add	x0, x0, x3
 	bl	ftl_memcpy
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-	add	x0, x27, :lo12:.LANCHOR20
-	str	x0, [x29, 104]
-.L1253:
-	ldr	x0, [x24, #:lo12:.LANCHOR107]
-	mov	w3, 1
+	str	x20, [x29, 104]
+.L1308:
+	ldrh	w2, [x19, 2]
+	ldrh	w1, [x19]
+	ldr	x0, [x24, #:lo12:.LANCHOR115]
 	str	x0, [x28, 8]
-	mov	w2, w3
-	ldr	x0, [x25, #:lo12:.LANCHOR108]
-	ldrh	w1, [x19, 2]
+	ldr	x0, [x25, #:lo12:.LANCHOR123]
 	str	x0, [x28, 16]
-	ldrh	w0, [x19]
-	orr	w0, w1, w0, lsl 10
-	mov	w1, w3
+	orr	w0, w2, w1, lsl 10
 	str	w0, [x28, 4]
-	mov	x0, x28
-	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR20]
-	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20]
 	sub	w0, w0, #1
-	cmp	w1, w0
-	blt	.L1254
-	ldrh	w0, [x19]
+	cmp	w2, w0
+	blt	.L1309
 	ldrh	w26, [x19, 4]
 	strh	wzr, [x19, 2]
-	strh	w0, [x19, 4]
+	strh	w1, [x19, 4]
 	bl	FtlFreeSysBlkQueueOut
-	strh	w0, [x19]
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	mov	w3, 1
 	str	w1, [x19, 8]
 	add	w2, w1, 1
 	str	w2, [x23, #:lo12:.LANCHOR70]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
-	strh	w0, [x21, 2]
-	mov	w2, w3
-	str	w1, [x21, 4]
+	strh	w0, [x19]
+	strh	w0, [x27, 2]
+	str	w1, [x27, 4]
+.L1309:
+	mov	w3, 1
 	mov	x0, x28
 	mov	w1, w3
+	mov	w2, w3
 	bl	FlashProgPages
-.L1254:
 	ldrh	w0, [x19, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1255
+	bne	.L1310
 	cmp	w0, 1
-	bne	.L1256
-	adrp	x1, .LANCHOR166
+	bne	.L1311
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
-	mov	w2, 1124
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 1135
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1256:
+.L1311:
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1257
+	bne	.L1312
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1257:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	cmp	w20, 3
-	bls	.L1253
-	add	x22, x22, :lo12:.LANCHOR106
-	adrp	x0, .LC104
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC104
+.L1312:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	cmp	w21, 3
+	bls	.L1308
+	add	x22, x22, :lo12:.LANCHOR148
+	adrp	x0, .LC109
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC109
 	ldr	w1, [x22, 4]
 	bl	printf
-.L1259:
-	b	.L1259
-.L1255:
+.L1314:
+	b	.L1314
+.L1310:
 	cmp	w0, 1
-	beq	.L1253
+	beq	.L1308
+	cmp	w1, 256
+	beq	.L1308
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1260
+	beq	.L1315
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.L1260:
+.L1315:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9271,14 +9631,14 @@ sftl_deinit:
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	bne	.L1270
+	bne	.L1328
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1270:
+.L1328:
 	mov	w0, 0
 	ret
 	.size	sftl_deinit, .-sftl_deinit
@@ -9297,56 +9657,56 @@ FtlDiscard:
 	str	x23, [sp, 48]
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1281
+	bhi	.L1339
 	cmp	w19, 31
-	bhi	.L1275
-.L1289:
+	bhi	.L1333
+.L1347:
 	mov	w0, 0
-.L1273:
+.L1331:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1275:
+.L1333:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
 	msub	w0, w1, w20, w0
 	ands	w0, w0, 65535
-	beq	.L1276
+	beq	.L1334
 	sub	w1, w1, w0
 	add	w20, w20, 1
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	sub	w19, w19, w1, uxth
-.L1276:
-	adrp	x22, .LANCHOR167
+.L1334:
+	adrp	x22, .LANCHOR172
 	adrp	x23, .LANCHOR63
-	add	x22, x22, :lo12:.LANCHOR167
+	add	x22, x22, :lo12:.LANCHOR172
 	add	x23, x23, :lo12:.LANCHOR63
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1277:
+.L1335:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1279
-	adrp	x0, .LANCHOR167
-	ldr	w1, [x0, #:lo12:.LANCHOR167]
+	bcs	.L1337
+	adrp	x0, .LANCHOR172
+	ldr	w1, [x0, #:lo12:.LANCHOR172]
 	cmp	w1, 32
-	bls	.L1289
-	str	wzr, [x0, #:lo12:.LANCHOR167]
+	bls	.L1347
+	str	wzr, [x0, #:lo12:.LANCHOR172]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1289
-.L1279:
+	b	.L1347
+.L1337:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1278
+	beq	.L1336
 	ldr	w0, [x22]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -9361,14 +9721,14 @@ FtlDiscard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1278:
+.L1336:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L1277
-.L1281:
+	b	.L1335
+.L1339:
 	mov	w0, -1
-	b	.L1273
+	b	.L1331
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
@@ -9376,102 +9736,109 @@ FtlDiscard:
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 	stp	x29, x30, [sp, -96]!
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC94
-	add	x1, x1, :lo12:.LANCHOR168
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	add	x0, x0, :lo12:.LC94
-	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR128
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR61
+	adrp	x24, .LANCHOR128
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR61
 	str	x25, [sp, 64]
 	bl	printf
 	adrp	x0, .LANCHOR6
 	mov	w19, 0
-	add	x21, x21, :lo12:.LANCHOR61
+	add	x20, x20, :lo12:.LANCHOR61
 	mov	w1, 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
-	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	ldr	x0, [x24, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.L1291:
-	ldr	w0, [x21]
+.L1349:
+	ldr	w0, [x20]
 	cmp	w19, w0
-	bcc	.L1293
-	adrp	x22, .LANCHOR5
-	adrp	x23, .LC105
-	add	x22, x22, :lo12:.LANCHOR5
-	add	x23, x23, :lo12:.LC105
+	bcc	.L1351
+	adrp	x21, .LANCHOR5
+	adrp	x22, .LC110
+	add	x21, x21, :lo12:.LANCHOR5
+	add	x22, x22, :lo12:.LC110
 	mov	w19, 0
 	adrp	x25, .LANCHOR42
-	mov	w24, 65535
-.L1294:
-	ldrh	w0, [x22]
+	mov	w23, 65535
+.L1352:
+	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1298
+	bhi	.L1357
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1293:
+.L1351:
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1292
+	beq	.L1350
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-	ldr	x2, [x20, #:lo12:.LANCHOR128]
+	ldr	x2, [x24, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1292:
+.L1350:
 	add	w19, w19, 1
-	b	.L1291
-.L1298:
+	b	.L1349
+.L1357:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ubfiz	x21, x19, 1, 16
-	ldrh	w2, [x0, x21]
-	ldr	x0, [x20, #:lo12:.LANCHOR128]
-	ldrh	w3, [x0, x21]
+	ubfiz	x20, x19, 1, 16
+	ldrh	w2, [x0, x20]
+	ldr	x0, [x24, #:lo12:.LANCHOR128]
+	ldrh	w3, [x0, x20]
 	cmp	w2, w3
-	beq	.L1296
-	cmp	w2, w24
-	beq	.L1296
+	beq	.L1354
+	cmp	w2, w23
+	beq	.L1354
 	mov	w1, w19
-	mov	x0, x23
+	mov	x0, x22
 	bl	printf
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1296
+	beq	.L1354
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1296
+	beq	.L1354
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1296
-	ldr	x0, [x20, #:lo12:.LANCHOR128]
-	ldrh	w1, [x0, x21]
+	beq	.L1354
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	strh	w1, [x0, x21]
-	mov	w0, w19
-	bl	update_vpc_list
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1296:
+	ldrh	w1, [x0, x20]
+	cbnz	w1, .L1356
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldrh	w1, [x1, x20]
+	strh	w1, [x0, x20]
+.L1354:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1294
+	b	.L1352
+.L1356:
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldrh	w1, [x1, x20]
+	strh	w1, [x0, x20]
+	mov	w0, w19
+	bl	update_vpc_list
+	b	.L1354
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
@@ -9487,46 +9854,46 @@ allocate_new_data_superblock:
 	adrp	x0, .LANCHOR5
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1304
-	adrp	x1, .LANCHOR169
+	bcs	.L1363
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC1
-	mov	w2, 2684
-	add	x1, x1, :lo12:.LANCHOR169
+	mov	w2, 2714
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1304:
+.L1363:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1305
+	beq	.L1364
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1306
+	cbz	w0, .L1365
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L1305:
-	adrp	x1, .LANCHOR150
+.L1364:
+	adrp	x1, .LANCHOR142
 	mov	w0, 1
 	strb	w0, [x21, 8]
 	mov	w2, 65535
-	ldrh	w0, [x1, #:lo12:.LANCHOR150]
+	ldrh	w0, [x1, #:lo12:.LANCHOR142]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1307
+	beq	.L1366
 	cmp	w19, w0
-	bne	.L1308
+	bne	.L1367
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1309
-.L1308:
+	cbz	w1, .L1368
+.L1367:
 	bl	update_vpc_list
-.L1309:
+.L1368:
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR150]
-.L1307:
+	strh	w0, [x20, #:lo12:.LANCHOR142]
+.L1366:
 	mov	x0, x21
 	bl	allocate_data_superblock
 	bl	l2p_flush
@@ -9538,10 +9905,10 @@ allocate_new_data_superblock:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1306:
+.L1365:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-	b	.L1305
+	b	.L1364
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -9567,19 +9934,19 @@ FtlProgPages:
 	add	x24, x24, :lo12:.LANCHOR19
 	add	x23, x23, :lo12:.LANCHOR81
 	bl	FlashProgPages
-.L1315:
+.L1374:
 	cmp	x20, x21
-	beq	.L1322
+	beq	.L1381
 	sub	x22, x20, #4
 	adrp	x25, .LANCHOR42
-	b	.L1323
-.L1318:
+	b	.L1382
+.L1377:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1316
+	bne	.L1375
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
@@ -9590,12 +9957,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
-.L1316:
+.L1375:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1317
+	cbnz	w0, .L1376
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1317:
+.L1376:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -9611,22 +9978,22 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.L1323:
+.L1382:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1318
+	beq	.L1377
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1319
-	adrp	x1, .LANCHOR170
+	bcc	.L1378
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 933
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 955
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1319:
+.L1378:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
 	mov	w2, 1
@@ -9640,35 +10007,35 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w22, w1
 	cmn	w3, #1
-	beq	.L1320
+	beq	.L1379
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1321
-	adrp	x0, .LC106
+	cbnz	w0, .L1380
+	adrp	x0, .LC111
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC106
+	add	x0, x0, :lo12:.LC111
 	bl	printf
-.L1321:
+.L1380:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.L1320:
+.L1379:
 	add	x20, x20, 32
-	b	.L1315
-.L1322:
+	b	.L1374
+.L1381:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1314
-	adrp	x1, .LANCHOR170
+	bcc	.L1373
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 970
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1314:
+.L1373:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9694,18 +10061,18 @@ FtlGcFreeTempBlock:
 	cmp	w20, w2
 	str	x27, [sp, 80]
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-	bne	.L1330
-.L1340:
-	adrp	x0, .LANCHOR152
+	bne	.L1389
+.L1399:
+	adrp	x0, .LANCHOR144
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
-	str	wzr, [x0, #:lo12:.LANCHOR152]
+	str	wzr, [x0, #:lo12:.LANCHOR144]
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1353
-.L1356:
+	bne	.L1412
+.L1415:
 	mov	w0, 0
-.L1329:
+.L1388:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9713,35 +10080,35 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1330:
-	cbz	w0, .L1333
-	adrp	x0, .LANCHOR156
-	ldrh	w3, [x0, #:lo12:.LANCHOR156]
+.L1389:
+	cbz	w0, .L1392
+	adrp	x0, .LANCHOR162
+	ldrh	w3, [x0, #:lo12:.LANCHOR162]
 	cmp	w3, w2
-	beq	.L1334
-.L1335:
+	beq	.L1393
+.L1394:
 	mov	w1, 2
-.L1333:
+.L1392:
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L1336
+	beq	.L1395
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1337
+	bls	.L1396
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L1337:
-	adrp	x0, .LANCHOR152
+.L1396:
+	adrp	x0, .LANCHOR144
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
-	cbnz	w1, .L1338
+	ldr	w1, [x0, #:lo12:.LANCHOR144]
+	cbnz	w1, .L1397
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
@@ -9751,50 +10118,50 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1338:
-	str	wzr, [x19, #:lo12:.LANCHOR152]
-.L1349:
+.L1397:
+	str	wzr, [x19, #:lo12:.LANCHOR144]
+.L1408:
 	mov	w0, 1
-	b	.L1329
-.L1334:
-	strh	wzr, [x0, #:lo12:.LANCHOR156]
+	b	.L1388
+.L1393:
+	strh	wzr, [x0, #:lo12:.LANCHOR162]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1335
-	b	.L1333
-.L1336:
-	adrp	x0, .LANCHOR156
-	ldrh	w1, [x0, #:lo12:.LANCHOR156]
+	bhi	.L1394
+	b	.L1392
+.L1395:
+	adrp	x0, .LANCHOR162
+	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1349
-	b	.L1340
-.L1353:
+	bne	.L1408
+	b	.L1399
+.L1412:
 	ldrb	w0, [x0, 7]
 	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1341
-	adrp	x1, .LANCHOR171
+	beq	.L1400
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC1
 	mov	w2, 162
-	add	x1, x1, :lo12:.LANCHOR171
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1341:
+.L1400:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
 	adrp	x25, .LANCHOR61
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	adrp	x26, .LANCHOR171
+	adrp	x26, .LANCHOR176
 	ldrb	w0, [x0, 7]
 	add	x25, x25, :lo12:.LANCHOR61
 	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	add	x26, x26, :lo12:.LANCHOR171
+	add	x26, x26, :lo12:.LANCHOR176
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
@@ -9803,19 +10170,19 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR67]
-.L1342:
+.L1401:
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
-	bhi	.L1346
+	bhi	.L1405
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1347
+	cbz	w1, .L1406
 	bl	INSERT_DATA_LIST
-.L1348:
+.L1407:
 	adrp	x0, .LANCHOR95
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR97]
@@ -9823,20 +10190,20 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR80
+	strh	w21, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1356
-	adrp	x0, .LANCHOR80
-	mov	w1, 20
-	strh	w21, [x0, #:lo12:.LANCHOR80]
+	ble	.L1415
 	adrp	x0, .LANCHOR82
+	mov	w1, 20
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1356
-.L1346:
+	b	.L1415
+.L1405:
 	adrp	x0, .LANCHOR98
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR98]
@@ -9845,13 +10212,13 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1343
+	bcc	.L1402
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1343:
+.L1402:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -9859,7 +10226,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1344
+	bne	.L1403
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -9868,21 +10235,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L1355:
+.L1414:
 	bl	decrement_vpc_count
-.L1345:
+.L1404:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L1342
-.L1344:
+	b	.L1401
+.L1403:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1345
+	beq	.L1404
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1355
-.L1347:
+	b	.L1414
+.L1406:
 	bl	INSERT_FREE_LIST
-	b	.L1348
+	b	.L1407
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -9901,15 +10268,15 @@ FtlGcPageRecovery:
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1357
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
+	bcc	.L1416
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
 	bl	FtlMapBlkWriteDump_data
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR152
-	str	wzr, [x0, #:lo12:.LANCHOR152]
-.L1357:
+	adrp	x0, .LANCHOR144
+	str	wzr, [x0, #:lo12:.LANCHOR144]
+.L1416:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -9920,12 +10287,12 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR162
+	adrp	x0, .LANCHOR168
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	str	wzr, [x0, #:lo12:.LANCHOR162]
+	str	wzr, [x0, #:lo12:.LANCHOR168]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -9955,32 +10322,32 @@ Ftl_gc_temp_data_write_back:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR89
-	adrp	x20, .LANCHOR121
+	adrp	x20, .LANCHOR113
 	ldr	w1, [x19, #:lo12:.LANCHOR89]
 	add	x19, x19, :lo12:.LANCHOR89
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FlashProgPages
 	mov	w11, 0
-.L1363:
+.L1422:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1366
-	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	bcc	.L1425
+	ldr	x0, [x20, #:lo12:.LANCHOR113]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1367
+	cbnz	w0, .L1426
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L1369
-.L1366:
-	ldr	x2, [x20, #:lo12:.LANCHOR121]
+	b	.L1428
+.L1425:
+	ldr	x2, [x20, #:lo12:.LANCHOR113]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1364
+	bne	.L1423
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
@@ -9997,23 +10364,23 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L1369:
+.L1428:
 	mov	w0, 1
-.L1362:
+.L1421:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1364:
+.L1423:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L1363
-.L1367:
+	b	.L1422
+.L1426:
 	mov	w0, 0
-	b	.L1362
+	b	.L1421
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -10028,11 +10395,11 @@ Ftl_get_new_temp_ppa:
 	mov	x19, x0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1371
+	beq	.L1430
 	add	x1, x0, :lo12:.LANCHOR53
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1372
-.L1371:
+	cbnz	w0, .L1431
+.L1430:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
 	add	x0, x19, :lo12:.LANCHOR53
@@ -10046,377 +10413,523 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1372:
+.L1431:
 	add	x0, x19, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR4
+	add	x29, sp, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR167
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	strh	wzr, [x20, #:lo12:.LANCHOR167]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR79
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1434
+.L1436:
+	mov	w23, -1
+.L1433:
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1434:
+	bl	FtlLoadSysInfo
+	mov	w23, w0
+	cbnz	w0, .L1436
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x0, .LANCHOR33
+	mov	w1, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR55
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+	add	x0, x0, 4
+.L1437:
+	cmp	w1, w3
+	bge	.L1442
+	ldr	w2, [x0], 16
+	tbz	w2, #31, .L1438
+.L1442:
+	adrp	x0, .LANCHOR39
+	add	x4, x0, :lo12:.LANCHOR39
+	cmp	w1, w3
+	mov	x19, x0
+	adrp	x22, .LANCHOR51
+	ldrh	w2, [x4, 28]
+	add	w2, w2, 1
+	strh	w2, [x4, 28]
+	bge	.L1447
+.L1439:
+	add	x21, x22, :lo12:.LANCHOR51
+	adrp	x24, .LANCHOR52
+	mov	x0, x21
+	add	x20, x24, :lo12:.LANCHOR52
+	bl	FtlSuperblockPowerLostFix
+	mov	x0, x20
+	bl	FtlSuperblockPowerLostFix
+	adrp	x0, .LANCHOR42
+	ldrh	w3, [x21, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	adrp	x3, .LANCHOR19
+	strh	w2, [x1, x0]
+	strb	wzr, [x21, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x21, 2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR52]
+	strh	wzr, [x21, 4]
+	ldrh	w4, [x20, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x20, 2]
+	add	x0, x19, :lo12:.LANCHOR39
+	strh	wzr, [x20, 4]
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L1443
+.L1438:
+	add	w1, w1, 1
+	b	.L1437
+.L1447:
+	ldrh	w0, [x20, #:lo12:.LANCHOR167]
+	cbnz	w0, .L1439
+.L1443:
+	bl	FtlVpcCheckAndModify
+	add	x20, x22, :lo12:.LANCHOR51
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L1433
+	ldrh	w1, [x20, 4]
+	cbnz	w1, .L1433
+	adrp	x21, .LANCHOR52
+	add	x19, x21, :lo12:.LANCHOR52
+	ldrh	w1, [x19, 4]
+	cbnz	w1, .L1433
+	bl	FtlGcRefreshBlock
+	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	bl	FtlGcRefreshBlock
+	bl	FtlVpcTblFlush
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+	b	.L1433
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	stp	x29, x30, [sp, -192]!
+	stp	x29, x30, [sp, -176]!
+	adrp	x1, .LANCHOR108
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR117
+	ldr	w2, [x1, #:lo12:.LANCHOR108]
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x22, #:lo12:.LANCHOR117]
+	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L1446
+	str	x1, [x29, 144]
+	cbnz	w2, .L1522
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1446
-	mov	w24, w0
-	adrp	x0, .LANCHOR156
-	ldrh	w1, [x0, #:lo12:.LANCHOR156]
+	bls	.L1522
+	str	w0, [x29, 152]
+	adrp	x0, .LANCHOR162
+	ldrh	w1, [x0, #:lo12:.LANCHOR162]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1376
-.L1379:
+	bne	.L1451
+.L1454:
 	adrp	x0, .LANCHOR100
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
-	bne	.L1377
-.L1378:
-	adrp	x2, .LANCHOR84
+	bne	.L1452
+.L1453:
+	bl	FtlReadRefresh
 	adrp	x19, .LANCHOR80
-	mov	w20, 65535
-	ldr	w1, [x2, #:lo12:.LANCHOR84]
-	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	add	w1, w1, 1
-	add	w1, w1, w24, lsl 7
-	str	w1, [x2, #:lo12:.LANCHOR84]
-	cmp	w0, w20
-	bne	.L1380
+	adrp	x2, .LANCHOR84
+	ldr	w1, [x29, 152]
+	mov	w21, 65535
+	ldr	w0, [x2, #:lo12:.LANCHOR84]
+	add	w0, w0, 1
+	add	w0, w0, w1, lsl 7
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	str	w0, [x2, #:lo12:.LANCHOR84]
+	cmp	w1, w21
+	bne	.L1455
 	adrp	x3, .LANCHOR53
-	ldrh	w20, [x3, #:lo12:.LANCHOR53]
-	cmp	w20, w0
-	bne	.L1449
-	adrp	x0, .LANCHOR99
-	ldrh	w21, [x0, #:lo12:.LANCHOR99]
-	cmp	w21, w20
-	bne	.L1380
-	adrp	x23, .LANCHOR48
+	ldrh	w21, [x3, #:lo12:.LANCHOR53]
+	cmp	w21, w1
+	bne	.L1525
+	adrp	x1, .LANCHOR99
+	ldrh	w20, [x1, #:lo12:.LANCHOR99]
+	cmp	w20, w21
+	bne	.L1455
+	adrp	x22, .LANCHOR48
 	mov	w3, 1024
-	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cmp	w0, 24
-	mov	w0, 5120
-	csel	w0, w0, w3, cc
-	cmp	w1, w0
-	bls	.L1452
-	adrp	x0, .LANCHOR172
+	ldrh	w1, [x22, #:lo12:.LANCHOR48]
+	cmp	w1, 24
+	mov	w1, 5120
+	csel	w1, w1, w3, cc
+	cmp	w0, w1
+	bls	.L1528
+	adrp	x0, .LANCHOR177
 	str	wzr, [x2, #:lo12:.LANCHOR84]
-	strh	wzr, [x0, #:lo12:.LANCHOR172]
+	strh	wzr, [x0, #:lo12:.LANCHOR177]
 	bl	GetSwlReplaceBlock
-	and	w20, w0, 65535
-	cmp	w20, w21
-	bne	.L1453
+	and	w21, w0, 65535
+	cmp	w21, w20
+	bne	.L1529
 	adrp	x5, .LANCHOR83
-	ldrh	w1, [x23, #:lo12:.LANCHOR48]
+	ldrh	w1, [x22, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bcs	.L1383
+	bcs	.L1458
 	mov	w0, 64
 	bl	List_get_gc_head_node
 	and	w0, w0, 65535
-	cmp	w0, w20
-	beq	.L1385
+	cmp	w0, w21
+	beq	.L1460
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1386
+	bhi	.L1461
 	mov	w0, 0
 	bl	List_get_gc_head_node
-	and	w21, w0, 65535
+	and	w20, w0, 65535
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	cmp	w21, w20
-	bne	.L1382
-.L1385:
+	cmp	w20, w21
+	bne	.L1457
+.L1460:
 	bl	FtlGcReFreshBadBlk
-.L1380:
-	cmp	w24, 0
+.L1455:
+	ldr	w1, [x29, 152]
 	mov	w0, 65535
-	ccmp	w20, w0, 0, eq
-	bne	.L1388
+	cmp	w1, 0
+	ccmp	w21, w0, 0, eq
+	bne	.L1463
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1454
+	bhi	.L1530
 	adrp	x1, .LANCHOR19
 	cmp	w0, 16
-	ldrh	w21, [x1, #:lo12:.LANCHOR19]
-	bls	.L1390
-	lsr	w21, w21, 5
-.L1389:
+	ldrh	w20, [x1, #:lo12:.LANCHOR19]
+	bls	.L1465
+	lsr	w20, w20, 5
+.L1464:
 	adrp	x2, .LANCHOR82
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bcs	.L1393
+	bcs	.L1468
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1394
+	bne	.L1469
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
-	bne	.L1394
-	adrp	x0, .LANCHOR172
-	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1395
+	bne	.L1469
+	adrp	x0, .LANCHOR177
+	ldrh	w0, [x0, #:lo12:.LANCHOR177]
+	cbnz	w0, .L1470
 	adrp	x1, .LANCHOR61
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1396
-.L1395:
+	bcs	.L1471
+.L1470:
 	adrp	x1, .LANCHOR78
 	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1397:
+.L1472:
 	adrp	x1, .LANCHOR87
 	str	wzr, [x1, #:lo12:.LANCHOR87]
-.L1374:
+.L1449:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 192
+	ldp	x29, x30, [sp], 176
 	ret
-.L1376:
+.L1451:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1379
+	beq	.L1454
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	cbz	w0, .L1379
+	cbz	w0, .L1454
 	mov	w0, 1
-	b	.L1374
-.L1377:
+	b	.L1449
+.L1452:
 	adrp	x1, .LANCHOR99
 	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
-	bne	.L1378
+	bne	.L1453
 	strh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1378
-.L1386:
+	b	.L1453
+.L1461:
 	mov	w0, 64
-.L1478:
+.L1557:
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1385
-.L1383:
+	b	.L1460
+.L1458:
 	mov	w0, 80
-	b	.L1478
-.L1453:
-	mov	w21, w20
-.L1382:
+	b	.L1557
+.L1529:
+	mov	w20, w21
+.L1457:
 	adrp	x1, .LANCHOR43
-	ubfiz	x0, x21, 1, 32
+	ubfiz	x0, x20, 1, 32
 	adrp	x3, .LANCHOR82
-	mov	w20, w21
+	mov	w21, w20
 	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	adrp	x1, .LANCHOR42
 	ldrh	w5, [x3, #:lo12:.LANCHOR82]
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w4, [x2, x0]
-	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	ldrh	w2, [x22, #:lo12:.LANCHOR48]
 	ldrh	w3, [x1, x0]
-	mov	w1, w21
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	mov	w1, w20
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
 	bl	printf
-	b	.L1385
-.L1449:
-	mov	w20, w0
-	b	.L1380
-.L1452:
-	mov	w20, w21
-	b	.L1380
-.L1390:
+	b	.L1460
+.L1525:
+	mov	w21, w1
+	b	.L1455
+.L1528:
+	mov	w21, w20
+	b	.L1455
+.L1465:
 	cmp	w0, 12
-	bls	.L1391
-	lsr	w21, w21, 4
-	b	.L1389
-.L1391:
+	bls	.L1466
+	lsr	w20, w20, 4
+	b	.L1464
+.L1466:
 	cmp	w0, 8
-	bls	.L1389
-	lsr	w21, w21, 2
-	b	.L1389
-.L1454:
-	mov	w21, 1
-	b	.L1389
-.L1396:
+	bls	.L1464
+	lsr	w20, w20, 2
+	b	.L1464
+.L1530:
+	mov	w20, 1
+	b	.L1464
+.L1471:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1397
-.L1394:
+	b	.L1472
+.L1469:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1393:
+.L1468:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1455
-	add	w21, w21, 32
-	and	w21, w21, 65535
-.L1455:
-	mov	w20, 65535
-.L1399:
+	cbz	w0, .L1531
+	add	w20, w20, 32
+	and	w20, w20, 65535
+.L1531:
+	mov	w21, 65535
+.L1474:
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1408
-	cmp	w20, w0
-	beq	.L1409
-	strh	w20, [x19, #:lo12:.LANCHOR80]
-.L1410:
+	bne	.L1483
+	cmp	w21, w0
+	beq	.L1484
+	strh	w21, [x19, #:lo12:.LANCHOR80]
+.L1485:
 	add	x0, x19, :lo12:.LANCHOR80
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	beq	.L1408
+	beq	.L1483
 	bl	IsBlkInGcList
-	cbz	w0, .L1413
+	cbz	w0, .L1488
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1413:
+.L1488:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
-	add	x23, x19, :lo12:.LANCHOR80
+	add	x22, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
-	beq	.L1408
-	mov	x0, x23
+	beq	.L1483
+	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR173
+	adrp	x0, .LANCHOR178
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x23, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	strh	wzr, [x22, 2]
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
 	adrp	x0, .LANCHOR42
-	strb	wzr, [x23, 6]
+	strb	wzr, [x22, 6]
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR174
-	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1408:
-	adrp	x0, .LANCHOR51
-	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR51]
-	cmp	w2, w1
-	beq	.L1414
-	adrp	x0, .LANCHOR52
-	str	x0, [x29, 128]
-	ldrh	w2, [x0, #:lo12:.LANCHOR52]
-	cmp	w2, w1
-	beq	.L1414
-	adrp	x24, .LANCHOR85
-	add	x0, x24, :lo12:.LANCHOR85
-	str	x0, [x29, 160]
-.L1415:
+	adrp	x0, .LANCHOR179
+	strh	w1, [x0, #:lo12:.LANCHOR179]
+.L1483:
+	adrp	x1, .LANCHOR51
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	str	x1, [x29, 120]
+	ldrh	w2, [x1, #:lo12:.LANCHOR51]
+	cmp	w2, w0
+	beq	.L1489
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bne	.L1490
+.L1489:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR80]
+.L1490:
+	adrp	x25, .LANCHOR85
+	add	x26, x25, :lo12:.LANCHOR85
+.L1519:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1416
+	bne	.L1491
 	adrp	x0, .LANCHOR87
-	adrp	x25, .LANCHOR19
-	add	x25, x25, :lo12:.LANCHOR19
+	adrp	x22, .LANCHOR19
+	add	x22, x22, :lo12:.LANCHOR19
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1417:
-	ldrh	w5, [x24, #:lo12:.LANCHOR85]
-	add	x7, x24, :lo12:.LANCHOR85
+.L1492:
+	ldrh	w5, [x25, #:lo12:.LANCHOR85]
+	add	x7, x25, :lo12:.LANCHOR85
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1418
+	bne	.L1493
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L1374
-.L1388:
+	b	.L1449
+.L1463:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1458
+	bne	.L1534
 	adrp	x0, .LANCHOR99
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bne	.L1458
-	cmp	w20, w0
-	bne	.L1458
+	bne	.L1534
+	cmp	w21, w0
+	bne	.L1534
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	cmp	w0, w20
-	beq	.L1400
-.L1458:
-	mov	w21, 1
-	b	.L1399
-.L1400:
+	cmp	w0, w21
+	beq	.L1475
+.L1534:
+	mov	w20, 1
+	b	.L1474
+.L1475:
 	adrp	x0, .LANCHOR87
-	adrp	x21, .LANCHOR48
-	adrp	x23, .LANCHOR172
+	adrp	x22, .LANCHOR48
+	adrp	x20, .LANCHOR82
+	adrp	x23, .LANCHOR177
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR82
-	ldrh	w6, [x21, #:lo12:.LANCHOR48]
-	mov	x2, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR82]
-	cmp	w1, w6
-	ldrh	w1, [x23, #:lo12:.LANCHOR172]
-	bcs	.L1401
-	cbnz	w1, .L1402
-	adrp	x1, .LANCHOR61
-	adrp	x3, .LANCHOR59
-	ldr	w1, [x1, #:lo12:.LANCHOR61]
-	ldr	w3, [x3, #:lo12:.LANCHOR59]
-	add	w1, w1, w1, lsl 1
-	cmp	w3, w1, lsr 2
-	bcs	.L1403
-.L1402:
+	ldrh	w1, [x22, #:lo12:.LANCHOR48]
+	ldrh	w0, [x20, #:lo12:.LANCHOR82]
+	cmp	w1, w0
+	bls	.L1476
+	ldrh	w0, [x23, #:lo12:.LANCHOR177]
+	cbnz	w0, .L1477
+	adrp	x0, .LANCHOR61
+	adrp	x1, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	ldr	w1, [x1, #:lo12:.LANCHOR59]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	bcs	.L1478
+.L1477:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR82]
-.L1479:
+.L1558:
+	strh	w0, [x20, #:lo12:.LANCHOR82]
 	bl	FtlReadRefresh
-	ldrh	w0, [x23, #:lo12:.LANCHOR172]
-	b	.L1374
-.L1403:
-	mov	w1, 18
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1479
-.L1401:
-	cbnz	w1, .L1458
-	adrp	x1, .LANCHOR78
-	ldrh	w5, [x1, #:lo12:.LANCHOR78]
-	add	w1, w5, w5, lsl 1
-	asr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR82]
 	mov	w0, 0
 	bl	List_get_gc_head_node
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w0, [x1, x0]
+	cmp	w0, 4
+	bls	.L1476
+.L1559:
+	ldrh	w0, [x23, #:lo12:.LANCHOR177]
+	b	.L1449
+.L1478:
+	mov	w0, 18
+	b	.L1558
+.L1476:
+	ldrh	w0, [x23, #:lo12:.LANCHOR177]
+	cbnz	w0, .L1534
+	adrp	x0, .LANCHOR78
+	ldrh	w5, [x0, #:lo12:.LANCHOR78]
+	add	w0, w5, w5, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x20, #:lo12:.LANCHOR82]
+	mov	w0, 0
+	bl	List_get_gc_head_node
 	adrp	x1, .LANCHOR42
+	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR3
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w2, [x2, #:lo12:.LANCHOR3]
@@ -10425,357 +10938,412 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1406
+	ble	.L1481
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	sub	w5, w5, #1
-	cmp	w6, w5
-	bge	.L1479
-.L1406:
-	cbnz	w1, .L1458
+	cmp	w0, w5
+	blt	.L1481
+	bl	FtlReadRefresh
+	b	.L1559
+.L1481:
+	cbnz	w1, .L1534
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldrh	w0, [x21, #:lo12:.LANCHOR48]
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1374
-.L1409:
+	b	.L1449
+.L1484:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	cmp	w1, w20
-	beq	.L1410
+	cmp	w1, w21
+	beq	.L1485
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1411
+	cbnz	w1, .L1486
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1411:
+.L1486:
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	strh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1410
-.L1414:
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1480:
-	adrp	x0, .LANCHOR172
-	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1374
-.L1418:
+	b	.L1485
+.L1493:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L1419
-	strh	w5, [x24, #:lo12:.LANCHOR85]
-	b	.L1417
-.L1419:
+	cbz	w0, .L1494
+	strh	w5, [x25, #:lo12:.LANCHOR85]
+	b	.L1492
+.L1494:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
-	ldrh	w0, [x25]
+	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	and	w5, w5, 65535
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	strh	w5, [x24, #:lo12:.LANCHOR85]
+	strh	w5, [x25, #:lo12:.LANCHOR85]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1421
+	bgt	.L1496
 	cmp	w5, 48
-	bls	.L1422
+	bls	.L1497
 	cmp	w3, 8
-	bls	.L1422
+	bls	.L1497
 	adrp	x3, .LANCHOR95
 	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
-	bhi	.L1422
-.L1421:
-	ldr	x3, [x29, 160]
-	strh	wzr, [x3]
-.L1422:
+	bhi	.L1497
+.L1496:
+	strh	wzr, [x26]
+.L1497:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1423
+	bgt	.L1498
 	mov	w0, 65535
-	cmp	w20, w0
-	bne	.L1423
+	cmp	w21, w0
+	bne	.L1498
+	ldrh	w0, [x26]
+	cmp	w0, 3
+	bhi	.L1498
 	mov	w0, -1
+	strh	wzr, [x26]
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
-	b	.L1480
-.L1423:
-	cbnz	w1, .L1424
+.L1560:
+	adrp	x0, .LANCHOR177
+	ldrh	w0, [x0, #:lo12:.LANCHOR177]
+	b	.L1449
+.L1498:
+	cbnz	w1, .L1499
 	mov	w0, -1
 	bl	decrement_vpc_count
-	ldr	x0, [x29, 160]
-	ldr	x1, [x29, 160]
-	ldrh	w0, [x0]
+	ldrh	w0, [x26]
 	add	w0, w0, 1
-	strh	w0, [x1]
-	b	.L1417
-.L1424:
+	strh	w0, [x26]
+	b	.L1492
+.L1499:
 	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
-	ldr	x0, [x29, 136]
+	ldr	x0, [x29, 120]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1425
-	adrp	x1, .LANCHOR175
+	bne	.L1500
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	mov	w2, 658
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 700
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1425:
-	ldr	x0, [x29, 128]
+.L1500:
+	adrp	x0, .LANCHOR52
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1426
-	adrp	x1, .LANCHOR175
+	bne	.L1501
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	mov	w2, 659
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 701
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1426:
+.L1501:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1427
-	adrp	x1, .LANCHOR175
+	bne	.L1502
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	mov	w2, 660
-	add	x1, x1, :lo12:.LANCHOR175
+	mov	w2, 702
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1427:
-	add	x25, x19, :lo12:.LANCHOR80
-	mov	x0, x25
+.L1502:
+	add	x22, x19, :lo12:.LANCHOR80
+	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR173
+	adrp	x0, .LANCHOR178
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR174
-	strh	wzr, [x25, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR174]
-	strb	wzr, [x25, 6]
-.L1416:
-	bl	FtlReadRefresh
-	adrp	x1, .LANCHOR19
+	adrp	x0, .LANCHOR179
+	strh	wzr, [x22, 2]
+	strh	w1, [x0, #:lo12:.LANCHOR179]
+	strb	wzr, [x22, 6]
+.L1491:
+	ldr	x1, [x29, 144]
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR117]
-	ldrh	w0, [x1, #:lo12:.LANCHOR19]
-	str	w0, [x29, 172]
+	str	w0, [x1, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR19
+	str	x0, [x29, 112]
+	ldrh	w1, [x0, #:lo12:.LANCHOR19]
+	ldr	w0, [x29, 152]
+	str	w1, [x29, 156]
+	cbz	w0, .L1503
+	adrp	x0, .LANCHOR3
+	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
+	ldrh	w1, [x1, x2, lsl 1]
+	sub	w0, w0, w1
+	mov	w1, 4
+	sdiv	w0, w0, w1
+	add	w20, w20, w0
+	and	w20, w20, 65535
+.L1503:
 	add	x0, x19, :lo12:.LANCHOR80
-	str	x1, [x29, 120]
-	ldr	w3, [x29, 172]
+	ldr	w2, [x29, 156]
 	ldrh	w0, [x0, 2]
-	add	w2, w0, w21
-	cmp	w2, w3
-	ble	.L1428
-	sub	w21, w3, w0
-	and	w21, w21, 65535
-.L1428:
-	adrp	x0, .LANCHOR173
-	mov	w27, 0
-	add	x0, x0, :lo12:.LANCHOR173
-	str	x0, [x29, 152]
-.L1429:
-	cmp	w21, w27, uxth
-	bls	.L1437
+	add	w1, w0, w20
+	cmp	w1, w2
+	ble	.L1504
+	sub	w20, w2, w0
+	and	w20, w20, 65535
+.L1504:
+	adrp	x0, .LANCHOR178
+	mov	w28, 0
+	add	x0, x0, :lo12:.LANCHOR178
+	str	x0, [x29, 136]
+.L1505:
+	cmp	w20, w28, uxth
+	bls	.L1513
 	add	x1, x19, :lo12:.LANCHOR80
 	adrp	x0, .LANCHOR3
-	adrp	x25, .LANCHOR93
+	adrp	x23, .LANCHOR93
 	add	x1, x1, 16
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
-	mov	w23, 0
+	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
 	mov	w6, 65535
-	add	w4, w4, w27
-	b	.L1438
-.L1431:
+	add	w4, w4, w28
+	b	.L1514
+.L1507:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L1430
-	ubfiz	x5, x23, 5, 16
-	add	w23, w23, 1
+	beq	.L1506
+	ubfiz	x5, x22, 5, 16
+	add	w22, w22, 1
 	add	x5, x0, x5
-	and	w23, w23, 65535
+	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x5, 4]
-.L1430:
+.L1506:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L1438:
+.L1514:
 	cmp	w2, w7
-	bne	.L1431
+	bne	.L1507
 	add	x1, x19, :lo12:.LANCHOR80
-	adrp	x26, .LANCHOR89
-	add	x26, x26, :lo12:.LANCHOR89
+	adrp	x24, .LANCHOR89
+	add	x24, x24, :lo12:.LANCHOR89
 	ldrb	w2, [x1, 8]
-	mov	w1, w23
+	mov	w1, w22
 	bl	FlashReadPages
-	ubfiz	x0, x23, 5, 16
-	mov	x23, 0
-	str	x0, [x29, 144]
-.L1432:
-	ldr	x0, [x29, 144]
-	cmp	x0, x23
-	bne	.L1436
-	add	w27, w27, 1
-	b	.L1429
-.L1436:
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	add	x1, x0, x23
-	ldr	w0, [x0, x23]
+	ubfiz	x0, x22, 5, 16
+	mov	x22, 0
+	str	x0, [x29, 128]
+.L1508:
+	ldr	x0, [x29, 128]
+	cmp	x0, x22
+	bne	.L1512
+	add	w28, w28, 1
+	b	.L1505
+.L1512:
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L1433
-	ldr	x28, [x1, 16]
+	beq	.L1509
+	ldr	x27, [x1, 16]
 	mov	w0, 61589
-	ldrh	w1, [x28]
+	ldrh	w1, [x27]
 	cmp	w1, w0
-	bne	.L1433
-	ldr	w4, [x28, 8]
+	bne	.L1509
+	ldr	w4, [x27, 8]
 	cmn	w4, #1
-	bne	.L1434
-	str	w4, [x29, 112]
-	mov	w2, 696
-	adrp	x1, .LANCHOR175
+	bne	.L1510
+	str	w4, [x29, 104]
+	mov	w2, 736
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	ldr	w4, [x29, 112]
-.L1434:
+	ldr	w4, [x29, 104]
+.L1510:
 	mov	w2, 0
-	add	x1, x29, 188
+	add	x1, x29, 172
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	ldr	w1, [x29, 188]
-	add	x0, x0, x23
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	ldr	w1, [x29, 172]
+	add	x0, x0, x22
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1433
-	ldr	x1, [x29, 152]
-	adrp	x4, .LANCHOR121
-	ldr	x2, [x29, 152]
+	bne	.L1509
+	ldr	x1, [x29, 136]
+	adrp	x4, .LANCHOR113
+	ldr	x2, [x29, 136]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	ldr	x2, [x4, #:lo12:.LANCHOR121]
-	ldr	w1, [x26]
+	ldr	x2, [x4, #:lo12:.LANCHOR113]
+	ldr	w1, [x24]
 	add	x1, x2, x1, lsl 5
-	stp	x4, x1, [x29, 104]
+	stp	x4, x1, [x29, 96]
 	str	w0, [x1, 24]
 	bl	Ftl_get_new_temp_ppa
-	ldp	x4, x1, [x29, 104]
-	ldr	x2, [x4, #:lo12:.LANCHOR121]
+	ldp	x4, x1, [x29, 96]
+	ldr	x2, [x4, #:lo12:.LANCHOR113]
 	str	w0, [x1, 4]
-	ldr	w1, [x26]
+	ldr	w1, [x24]
 	ubfiz	x0, x1, 5, 32
 	add	w1, w1, 1
 	add	x2, x2, x0
-	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	add	x0, x0, x23
+	ldr	x0, [x23, #:lo12:.LANCHOR93]
+	add	x0, x0, x22
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	ldr	w2, [x29, 188]
-	str	w2, [x28, 12]
+	ldr	w2, [x29, 172]
+	str	w2, [x27, 12]
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
-	strh	w2, [x28, 2]
+	strh	w2, [x27, 2]
 	adrp	x2, .LANCHOR71
-	str	w1, [x26]
+	str	w1, [x24]
 	mov	w1, 1
 	ldr	w2, [x2, #:lo12:.LANCHOR71]
-	str	w2, [x28, 4]
+	str	w2, [x27, 4]
 	bl	FtlGcBufAlloc
 	ldrb	w1, [x11, 7]
-	ldr	w0, [x26]
+	ldr	w0, [x24]
 	cmp	w1, w0
-	beq	.L1435
+	beq	.L1511
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1433
-.L1435:
+	cbnz	w0, .L1509
+.L1511:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L1433
-.L1481:
-	str	wzr, [x22, #:lo12:.LANCHOR117]
-	b	.L1480
-.L1433:
-	add	x23, x23, 32
-	b	.L1432
-.L1437:
+	cbz	w0, .L1509
+.L1561:
+	ldr	x0, [x29, 144]
+	str	wzr, [x0, #:lo12:.LANCHOR108]
+	b	.L1560
+.L1509:
+	add	x22, x22, 32
+	b	.L1508
+.L1513:
 	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
-	add	w21, w21, w0
-	ldr	w0, [x29, 172]
-	and	w21, w21, 65535
-	strh	w21, [x1, 2]
-	cmp	w0, w21
-	bls	.L1439
-	adrp	x0, .LANCHOR173
-	ldrh	w1, [x0, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR174
-	ldrh	w0, [x0, #:lo12:.LANCHOR174]
-	cmp	w1, w0
-	bne	.L1440
-.L1439:
+	add	w20, w20, w0
+	ldr	w0, [x29, 156]
+	and	w20, w20, 65535
+	strh	w20, [x1, 2]
+	cmp	w0, w20
+	bhi	.L1515
 	adrp	x0, .LANCHOR89
 	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1441
+	cbz	w0, .L1516
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L1481
-.L1441:
-	adrp	x0, .LANCHOR173
-	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1442
+	cbnz	w0, .L1561
+.L1516:
+	adrp	x0, .LANCHOR178
+	ldrh	w0, [x0, #:lo12:.LANCHOR178]
+	cbnz	w0, .L1517
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1442
+	cbz	w2, .L1517
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1442:
+.L1517:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1440:
+.L1515:
+	ldr	x0, [x29, 144]
+	str	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1443
-	ldr	x0, [x29, 120]
-	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-	b	.L1415
-.L1443:
-	adrp	x1, .LANCHOR172
-	str	wzr, [x22, #:lo12:.LANCHOR117]
-	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	bhi	.L1518
+	ldr	x0, [x29, 112]
+	ldrh	w20, [x0, #:lo12:.LANCHOR19]
+	b	.L1519
+.L1518:
+	adrp	x1, .LANCHOR177
+	ldrh	w1, [x1, #:lo12:.LANCHOR177]
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1374
-.L1446:
+	b	.L1449
+.L1522:
 	mov	w0, 0
-	b	.L1374
+	b	.L1449
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_init,"ax",@progbits
+	.align	2
+	.global	sftl_init
+	.type	sftl_init, %function
+sftl_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LC70
+	add	x1, x1, :lo12:.LC70
+	mov	w0, -1
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR86
+	str	w0, [x19, #:lo12:.LANCHOR86]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbnz	w0, .L1566
+	bl	FtlSysBlkInit
+	cbnz	w0, .L1566
+	mov	w0, 1
+	str	w0, [x19, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 15
+	bhi	.L1566
+	mov	w19, 8129
+.L1565:
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	subs	w19, w19, #1
+	bne	.L1565
+.L1566:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	sftl_init, .-sftl_init
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
 	.global	sftl_gc
@@ -10798,17 +11366,17 @@ FtlRead:
 	mov	w19, w1
 	stp	x23, x24, [sp, 48]
 	mov	x23, x3
-	stp	x27, x28, [sp, 80]
-	mov	w27, w2
-	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	bne	.L1484
+	mov	w26, w2
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	bne	.L1571
 	mov	x2, x3
-	mov	w1, w27
+	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L1483:
+.L1570:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10817,237 +11385,252 @@ FtlRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1484:
+.L1571:
 	add	w0, w1, w2
-	str	w0, [x29, 140]
+	str	w0, [x29, 136]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1504
+	bhi	.L1592
 	adrp	x0, .LANCHOR86
 	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
-	beq	.L1483
+	beq	.L1570
 	adrp	x22, .LANCHOR12
-	sub	w24, w1, #1
-	adrp	x1, .LANCHOR62
-	mov	w25, 0
+	adrp	x25, .LANCHOR81
+	add	x25, x25, :lo12:.LANCHOR81
+	mov	w27, 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	mov	w21, 0
-	adrp	x28, .LANCHOR120
-	stp	wzr, wzr, [x29, 144]
-	udiv	w26, w19, w0
+	adrp	x28, .LANCHOR112
+	stp	wzr, wzr, [x29, 140]
+	udiv	w1, w19, w0
+	stp	wzr, w1, [x29, 148]
+	add	w1, w19, w2
+	sub	w24, w1, #1
+	adrp	x1, .LANCHOR69
+	ldr	w20, [x29, 152]
 	udiv	w24, w24, w0
-	mov	w20, w26
-	sub	w0, w24, w26
+	ldr	w0, [x29, 152]
+	sub	w0, w24, w0
 	add	w0, w0, 1
-	stp	wzr, w0, [x29, 152]
-	ldr	w0, [x1, #:lo12:.LANCHOR62]
+	str	w0, [x29, 156]
+	ldr	w0, [x1, #:lo12:.LANCHOR69]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR62
 	ldr	w2, [x29, 156]
+	ldr	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
-	str	x0, [x29, 128]
-.L1486:
+.L1573:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1502
+	cbnz	w0, .L1590
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1503
+	cbnz	w0, .L1591
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1483
-.L1503:
+	bhi	.L1570
+.L1591:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L1483
-.L1502:
+	b	.L1570
+.L1590:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1487
+	bne	.L1574
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1488:
+.L1575:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1490
-.L1491:
+	bcc	.L1577
+.L1578:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L1495
+	beq	.L1582
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
-	cmp	w25, w0, lsl 2
-	bne	.L1486
-.L1495:
-	cbz	w25, .L1486
-	ldr	x0, [x28, #:lo12:.LANCHOR120]
-	mov	w1, w25
+	cmp	w27, w0, lsl 2
+	bne	.L1573
+.L1582:
+	cbz	w27, .L1573
+	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	mov	w1, w27
 	mov	w2, 0
 	bl	FlashReadPages
-	ldr	w0, [x29, 144]
-	lsl	w0, w0, 9
-	str	w0, [x29, 136]
-	ldr	w0, [x29, 152]
+	ldr	w0, [x29, 140]
 	lsl	w0, w0, 9
-	str	x0, [x29, 120]
+	str	w0, [x29, 116]
 	ldr	w0, [x29, 148]
 	lsl	w0, w0, 9
-	str	w0, [x29, 112]
-	ubfiz	x0, x25, 5, 32
-	mov	x25, 0
+	str	x0, [x29, 128]
+	ldr	w0, [x29, 144]
+	lsl	w0, w0, 9
+	str	w0, [x29, 120]
+	ubfiz	x0, x27, 5, 32
+	mov	x27, 0
 	str	x0, [x29, 104]
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1501:
-	ldr	x0, [x28, #:lo12:.LANCHOR120]
-	add	x0, x0, x25
+.L1589:
+	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	ldr	w2, [x29, 152]
+	add	x0, x0, x27
 	ldr	w1, [x0, 24]
-	cmp	w26, w1
-	bne	.L1497
+	cmp	w2, w1
+	bne	.L1584
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR115
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR118
+	ldr	x0, [x0, #:lo12:.LANCHOR118]
 	cmp	x1, x0
-	bne	.L1498
-	ldr	x0, [x29, 120]
-	ldr	w2, [x29, 112]
+	bne	.L1585
+	ldr	x0, [x29, 128]
+	ldr	w2, [x29, 120]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1515:
+.L1603:
 	bl	ftl_memcpy
-.L1498:
-	ldr	x0, [x28, #:lo12:.LANCHOR120]
-	add	x1, x0, x25
-	ldr	w0, [x0, x25]
-	cmn	w0, #1
-	bne	.L1499
-	ldr	x1, [x29, 128]
-	mov	w21, w0
-	ldr	x2, [x29, 128]
-	ldr	w1, [x1, 72]
+.L1585:
+	ldr	x0, [x28, #:lo12:.LANCHOR112]
+	add	x0, x0, x27
+	ldr	x1, [x0, 16]
+	ldr	w2, [x0, 24]
+	ldr	w1, [x1, 8]
+	cmp	w2, w1
+	beq	.L1586
+	ldr	w1, [x25, 72]
 	add	w1, w1, 1
-	str	w1, [x2, 72]
-.L1500:
+	str	w1, [x25, 72]
+.L1586:
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L1587
+	ldr	w0, [x25, 72]
+	mov	w21, w1
+	add	w0, w0, 1
+	str	w0, [x25, 72]
+.L1588:
 	ldr	x0, [x29, 104]
-	add	x25, x25, 32
-	cmp	x0, x25
-	bne	.L1501
-	mov	w25, 0
-	b	.L1486
-.L1490:
+	add	x27, x27, 32
+	cmp	x0, x27
+	bne	.L1589
+	mov	w27, 0
+	b	.L1573
+.L1577:
 	madd	w0, w20, w0, w4
 	cmp	w19, w0
-	bhi	.L1489
-	ldr	w1, [x29, 140]
+	bhi	.L1576
+	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L1489
+	bls	.L1576
 	sub	w0, w0, w19
-	str	x5, [x29, 112]
+	str	x5, [x29, 120]
 	lsl	w0, w0, 9
-	str	w4, [x29, 120]
+	str	w4, [x29, 128]
 	mov	w2, 512
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-	ldr	w4, [x29, 120]
-	ldr	x5, [x29, 112]
-.L1489:
+	ldr	w4, [x29, 128]
+	ldr	x5, [x29, 120]
+.L1576:
 	add	w4, w4, 1
-	b	.L1488
-.L1487:
-	ldr	x2, [x28, #:lo12:.LANCHOR120]
-	ubfiz	x0, x25, 5, 32
-	cmp	w20, w26
+	b	.L1575
+.L1574:
+	ldr	x2, [x28, #:lo12:.LANCHOR112]
+	ubfiz	x0, x27, 5, 32
 	add	x0, x2, x0
 	str	w1, [x0, 4]
-	bne	.L1492
-	adrp	x1, .LANCHOR115
-	ldr	x1, [x1, #:lo12:.LANCHOR115]
+	ldr	w1, [x29, 152]
+	cmp	w20, w1
+	bne	.L1579
+	adrp	x1, .LANCHOR118
+	ldr	x1, [x1, #:lo12:.LANCHOR118]
 	str	x1, [x0, 8]
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
-	str	w2, [x29, 152]
-	sub	w2, w1, w2
-	cmp	w27, w2
-	csel	w2, w27, w2, ls
 	str	w2, [x29, 148]
+	sub	w2, w1, w2
+	cmp	w26, w2
+	csel	w2, w26, w2, ls
+	str	w2, [x29, 144]
 	cmp	w1, w2
-	bne	.L1493
+	bne	.L1580
 	str	x23, [x0, 8]
-.L1493:
+.L1580:
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR114
+	adrp	x2, .LANCHOR124
 	str	w20, [x0, 24]
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR114]
-	mul	w1, w1, w25
-	add	w25, w25, 1
+	ldr	x2, [x2, #:lo12:.LANCHOR124]
+	mul	w1, w1, w27
+	add	w27, w27, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1491
-.L1492:
+	b	.L1578
+.L1579:
 	cmp	w20, w24
-	bne	.L1494
+	bne	.L1581
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	adrp	x1, .LANCHOR113
-	ldr	w3, [x29, 140]
-	ldr	x1, [x1, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR119
+	ldr	w3, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
 	str	x1, [x0, 8]
 	mul	w1, w20, w2
 	sub	w3, w3, w1
-	str	w3, [x29, 144]
+	str	w3, [x29, 140]
 	cmp	w2, w3
-	bne	.L1493
-.L1514:
+	bne	.L1580
+.L1602:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1493
-.L1494:
+	b	.L1580
+.L1581:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1514
-.L1497:
+	b	.L1602
+.L1584:
 	cmp	w24, w1
-	bne	.L1498
+	bne	.L1585
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR113
-	ldr	x0, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR119
+	ldr	x0, [x0, #:lo12:.LANCHOR119]
 	cmp	x1, x0
-	bne	.L1498
+	bne	.L1585
 	ldr	x0, [x29, 96]
-	ldr	w2, [x29, 136]
+	ldr	w2, [x29, 116]
 	ldrh	w0, [x0]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1515
-.L1499:
-	cmp	w0, 256
-	bne	.L1500
-	ldr	w0, [x1, 4]
+	b	.L1603
+.L1587:
+	cmp	w1, 256
+	bne	.L1588
+	ldr	w0, [x0, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	b	.L1500
-.L1504:
+	b	.L1588
+.L1592:
 	mov	w21, -1
-	b	.L1483
+	b	.L1570
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
@@ -11076,13 +11659,13 @@ FtlWrite:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	str	w2, [x29, 176]
-	bne	.L1518
+	str	w2, [x29, 180]
+	bne	.L1606
 	add	w0, w1, 256
-	ldr	w1, [x29, 176]
+	ldr	w1, [x29, 180]
 	mov	x2, x3
 	bl	FtlVendorPartWrite
-.L1517:
+.L1605:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11090,127 +11673,132 @@ FtlWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L1518:
-	ldr	w0, [x29, 176]
+.L1606:
+	ldr	w0, [x29, 180]
 	add	w0, w1, w0
 	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR34
 	ldr	w1, [x29, 168]
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1553
+	bhi	.L1642
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
-	beq	.L1517
-	adrp	x0, .LANCHOR176
+	beq	.L1605
+	adrp	x0, .LANCHOR181
 	mov	w1, 2048
 	adrp	x22, .LANCHOR12
-	str	w1, [x0, #:lo12:.LANCHOR176]
+	ldr	w2, [x29, 180]
+	str	w1, [x0, #:lo12:.LANCHOR181]
 	ldr	w1, [x29, 168]
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	sub	w1, w1, #1
 	udiv	w25, w21, w0
 	udiv	w0, w1, w0
-	adrp	x1, .LANCHOR64
+	adrp	x1, .LANCHOR68
 	str	w0, [x29, 156]
 	sub	w0, w0, w25
 	add	w24, w0, 1
 	str	w0, [x29, 152]
+	ldr	w0, [x1, #:lo12:.LANCHOR68]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR64
 	ldr	w0, [x1, #:lo12:.LANCHOR64]
 	add	w0, w0, w24
 	str	w0, [x1, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR177
+	adrp	x0, .LANCHOR182
 	str	x0, [x29, 160]
-	ldr	w1, [x0, #:lo12:.LANCHOR177]
+	ldr	w1, [x0, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1520
+	cbz	w1, .L1608
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1520
+	cbnz	w0, .L1608
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1520:
+.L1608:
 	mov	w20, w25
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.L1521:
-	cbnz	w24, .L1549
+.L1609:
+	cbnz	w24, .L1637
 	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	cmp	w1, 15
-	bls	.L1550
-.L1552:
+	cmp	w1, 5
+	bls	.L1638
+.L1640:
 	mov	w0, 0
-	b	.L1517
-.L1549:
+	b	.L1605
+.L1637:
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1522
-	adrp	x1, .LANCHOR178
+	bcc	.L1610
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 988
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1011
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1522:
+.L1610:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1611
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1524
+	bne	.L1612
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1525
+	cbnz	w1, .L1613
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 160]
-	str	wzr, [x0, #:lo12:.LANCHOR177]
-.L1525:
+	str	wzr, [x0, #:lo12:.LANCHOR182]
+.L1613:
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
 	mov	x0, x19
 	bl	allocate_new_data_superblock
 	ldr	x0, [x29, 160]
-	ldr	w0, [x0, #:lo12:.LANCHOR177]
+	ldr	w0, [x0, #:lo12:.LANCHOR182]
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1526:
+.L1614:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1611
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.L1523:
+.L1611:
 	ldrh	w0, [x19, 4]
 	ldrb	w1, [x19, 7]
 	cmp	w0, w24
 	csel	w0, w0, w24, ls
 	lsl	w1, w1, 2
-	cmp	w1, w0
-	csel	w0, w1, w0, ls
+	cmp	w0, w1
+	csel	w0, w0, w1, ls
 	str	w0, [x29, 148]
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1527
-	adrp	x1, .LANCHOR178
+	bcc	.L1615
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1021
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1044
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1527:
+.L1615:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	str	xzr, [x29, 184]
@@ -11218,44 +11806,44 @@ FtlWrite:
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1528:
+.L1616:
 	ldr	w1, [x29, 148]
-	adrp	x28, .LANCHOR122
+	adrp	x27, .LANCHOR114
 	ldr	w23, [x29, 184]
 	cmp	w23, w1
-	bcc	.L1547
+	bcc	.L1635
 	mov	x23, x1
-.L1529:
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+.L1617:
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
 	cmp	w24, w23
-	bcs	.L1548
-	adrp	x1, .LANCHOR178
+	bcs	.L1636
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1098
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1121
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1548:
+.L1636:
 	sub	w24, w24, w23
-	b	.L1521
-.L1524:
+	b	.L1609
+.L1612:
 	ldr	x1, [x29, 160]
-	str	wzr, [x1, #:lo12:.LANCHOR177]
+	str	wzr, [x1, #:lo12:.LANCHOR182]
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1558
+	cbnz	w1, .L1647
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-	b	.L1526
-.L1558:
+	b	.L1614
+.L1647:
 	mov	x19, x0
-	b	.L1523
-.L1547:
+	b	.L1611
+.L1635:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1529
+	cbz	w0, .L1617
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
@@ -11263,9 +11851,9 @@ FtlWrite:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	ldr	x1, [x29, 184]
-	lsl	x27, x1, 5
-	ldr	x1, [x28, #:lo12:.LANCHOR122]
-	add	x1, x1, x27
+	lsl	x28, x1, 5
+	ldr	x1, [x27, #:lo12:.LANCHOR114]
+	add	x1, x1, x28
 	str	w0, [x1, 4]
 	ldr	x0, [x29, 112]
 	str	w20, [x1, 24]
@@ -11273,9 +11861,9 @@ FtlWrite:
 	mul	w23, w23, w2
 	and	x0, x23, 4294967292
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR124
 	ldr	x3, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	ldr	x0, [x0, #:lo12:.LANCHOR124]
 	str	x0, [x29, 128]
 	add	x23, x0, x3
 	str	x23, [x1, 16]
@@ -11285,41 +11873,41 @@ FtlWrite:
 	ldr	w0, [x29, 156]
 	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1530
+	bne	.L1618
 	cmp	w20, w25
-	bne	.L1531
+	bne	.L1619
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
 	str	w0, [x29, 172]
 	sub	w2, w2, w0
-	ldr	w0, [x29, 176]
+	ldr	w0, [x29, 180]
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
-	str	w0, [x29, 180]
-.L1532:
+	str	w0, [x29, 176]
+.L1620:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	ldr	w1, [x29, 180]
+	ldr	w1, [x29, 176]
 	cmp	w1, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	bne	.L1533
-	add	x3, x0, x27
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	bne	.L1621
+	add	x3, x0, x28
 	cmp	w20, w25
-	bne	.L1534
+	bne	.L1622
 	str	x26, [x3, 8]
-.L1535:
+.L1623:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1544
-	adrp	x1, .LANCHOR178
+	bcc	.L1632
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	mov	w2, 1089
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 1112
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1544:
+.L1632:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
@@ -11338,40 +11926,39 @@ FtlWrite:
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1528
-.L1531:
+	b	.L1616
+.L1619:
 	ldr	w0, [x29, 168]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	str	wzr, [x29, 172]
 	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
-	str	w0, [x29, 180]
-	b	.L1532
-.L1534:
-	ldr	w0, [x29, 180]
-.L1565:
+	stp	wzr, w0, [x29, 172]
+	b	.L1620
+.L1622:
+	ldr	w0, [x29, 176]
+.L1654:
 	mul	w0, w0, w20
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1535
-.L1533:
-	add	x0, x0, x27
+	b	.L1623
+.L1621:
+	add	x0, x0, x28
 	cmp	w20, w25
-	bne	.L1536
-	adrp	x1, .LANCHOR115
-	ldr	x1, [x1, #:lo12:.LANCHOR115]
-.L1564:
+	bne	.L1624
+	adrp	x1, .LANCHOR118
+	ldr	x1, [x1, #:lo12:.LANCHOR118]
+.L1653:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1538
+	beq	.L1626
 	str	w0, [x29, 212]
 	mov	w2, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	str	w20, [x29, 232]
-	add	x0, x0, x27
+	add	x0, x0, x28
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 216]
 	mov	w1, 1
@@ -11379,218 +11966,343 @@ FtlWrite:
 	bl	FlashReadPages
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1539
+	bne	.L1627
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1542:
-	ldr	w0, [x29, 180]
+.L1630:
+	ldr	w0, [x29, 176]
 	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1543
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	bne	.L1631
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	mov	x1, x26
-	add	x3, x0, x27
+	add	x3, x0, x28
 	ldr	w0, [x29, 172]
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1566:
+.L1655:
 	bl	ftl_memcpy
-	b	.L1535
-.L1536:
-	adrp	x1, .LANCHOR113
-	ldr	x1, [x1, #:lo12:.LANCHOR113]
-	b	.L1564
-.L1539:
+	b	.L1623
+.L1624:
+	adrp	x1, .LANCHOR119
+	ldr	x1, [x1, #:lo12:.LANCHOR119]
+	b	.L1653
+.L1627:
 	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1541
+	beq	.L1629
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC108
+	adrp	x0, .LC113
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1541:
+.L1629:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1542
-	mov	w2, 1074
-	adrp	x1, .LANCHOR178
+	beq	.L1630
+	mov	w2, 1097
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR178
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-	b	.L1542
-.L1538:
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	b	.L1630
+.L1626:
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
 	ldr	x1, [x29, 104]
-	add	x0, x0, x27
+	add	x0, x0, x28
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L1542
-.L1543:
+	b	.L1630
+.L1631:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x3, x0, x27
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	add	x3, x0, x28
 	mul	w1, w1, w20
 	sub	w1, w1, w21
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1566
-.L1530:
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x3, x0, x27
+	b	.L1655
+.L1618:
+	ldr	x0, [x27, #:lo12:.LANCHOR114]
+	add	x3, x0, x28
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1565
-.L1550:
-	adrp	x21, .LANCHOR99
+	b	.L1654
+.L1638:
+	adrp	x23, .LANCHOR99
 	adrp	x20, .LANCHOR83
-	adrp	x19, .LANCHOR82
-	add	x21, x21, :lo12:.LANCHOR99
+	adrp	x21, .LANCHOR82
+	add	x23, x23, :lo12:.LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR83
-	add	x19, x19, :lo12:.LANCHOR82
-.L1562:
+	add	x21, x21, :lo12:.LANCHOR82
+	mov	w19, 256
+.L1641:
 	adrp	x0, .LANCHOR80
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	bne	.L1551
-	ldrh	w1, [x21]
+	bne	.L1639
+	ldrh	w1, [x23]
 	cmp	w1, w0
-	bne	.L1551
+	bne	.L1639
 	mov	w0, 0
 	bl	List_get_gc_head_node
 	bl	FtlGcRefreshBlock
-.L1551:
+.L1639:
 	mov	w0, 128
 	mov	w1, 1
 	strh	w0, [x20]
-	strh	w0, [x19]
+	strh	w0, [x21]
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	cmp	w0, 8
-	bls	.L1562
-	b	.L1552
-.L1553:
+	cmp	w0, 2
+	bhi	.L1640
+	subs	w19, w19, #1
+	bne	.L1641
+	b	.L1640
+.L1642:
 	mov	w0, -1
-	b	.L1517
+	b	.L1605
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-	stp	x29, x30, [sp, -240]!
-	add	w4, w0, w1
-	sub	w5, w4, #1
+	stp	x29, x30, [sp, -272]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	cmp	w5, 63
+	add	w19, w0, w1
 	stp	x21, x22, [sp, 32]
-	mov	w20, w0
-	stp	x23, x24, [sp, 48]
-	mov	w22, w1
+	sub	w20, w19, #1
 	stp	x25, x26, [sp, 64]
-	mov	x24, x2
+	mov	w22, w0
+	stp	x23, x24, [sp, 48]
+	mov	w25, w1
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR179
-	bls	.L1568
+	cmp	w20, 63
+	str	x2, [x29, 184]
+	bls	.L1657
 	cmp	w0, 576
-	bls	.L1569
-.L1568:
-	ldr	w0, [x25, #:lo12:.LANCHOR179]
-	cbz	w0, .L1570
-	adrp	x2, .LANCHOR0
-	add	x1, x2, :lo12:.LANCHOR0
-	mov	w21, 512
-	adrp	x3, idb_buf
-	mov	x4, -49148
-	stp	x3, x2, [x29, 144]
-	ldrh	w0, [x1, 14]
-	add	x2, x3, :lo12:idb_buf
-	ldrh	w1, [x1, 10]
-	mov	x7, 262140
-	str	w0, [x29, 172]
-	and	w0, w0, 255
-	mov	w5, 4097
-	movk	x4, 0xfffc, lsl 16
-	mul	w0, w0, w1
-	mov	x1, 0
-	and	w0, w0, 65535
-	str	w0, [x29, 168]
-	udiv	w21, w21, w0
+	bls	.L1658
+.L1657:
+	adrp	x0, .LANCHOR184
+	str	x0, [x29, 152]
+	ldr	w1, [x0, #:lo12:.LANCHOR184]
+	cbz	w1, .L1659
+	adrp	x0, .LANCHOR185
+	str	x0, [x29, 144]
+	mov	w1, 35899
+	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	movk	w1, 0xfcdc, lsl 16
+	ldr	w2, [x24]
+	cmp	w2, w1
+	beq	.L1660
+.L1677:
+	ldr	x0, [x29, 152]
+	str	wzr, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	bl	free
+	adrp	x0, .LANCHOR186
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	bl	free
+.L1659:
+	ldr	x3, [x29, 184]
+	mov	w2, w25
+	mov	w1, w22
 	mov	w0, 0
-.L1574:
-	add	x3, x1, x7
-	ldr	w6, [x3, x2]
-	cbz	w6, .L1571
-.L1575:
-	ldr	w0, [x29, 168]
+	bl	FtlWrite
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 272
+	ret
+.L1660:
+	adrp	x1, .LANCHOR0
+	add	x0, x1, :lo12:.LANCHOR0
+	mov	w2, 65535
+	mov	w4, 4097
+	str	x1, [x29, 168]
+	ldrh	w19, [x0, 14]
+	ldrh	w20, [x0, 10]
+	mov	x0, 262140
+	add	x3, x24, x0
+	mov	w0, 0
+.L1664:
+	ldr	w1, [x3]
+	cbnz	w1, .L1661
+	ldr	w1, [x24, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w1, [x3], -4
+	cmp	w0, w4
+	sub	w2, w2, #1
+	csel	w0, w0, wzr, cc
+	cmp	w2, 4096
+	bne	.L1664
+	mov	w23, 512
+	b	.L1663
+.L1661:
+	add	w23, w2, 127
+	adrp	x0, .LC114
+	lsr	w23, w23, 7
+	add	x0, x0, :lo12:.LC114
+	mov	w3, w23
+	bl	printf
+.L1663:
+	and	w19, w19, 255
+	adrp	x26, .LANCHOR105
+	mul	w20, w20, w19
 	mov	w19, 0
-	mov	w26, 0
-	mul	w0, w0, w21
-	stp	w0, wzr, [x29, 160]
-	adrp	x0, .LANCHOR105
-	add	x23, x0, :lo12:.LANCHOR105
-.L1572:
-	adrp	x5, gp_flash_check_buf
+	and	w20, w20, 65535
+	sub	w21, w20, #1
+	add	w21, w21, w23
+	udiv	w21, w21, w20
+	mul	w0, w20, w21
+	stp	w21, wzr, [x29, 196]
+	str	w0, [x29, 204]
+	lsl	w0, w23, 7
+	str	w0, [x29, 192]
+	add	x0, x26, :lo12:.LANCHOR105
+	str	x0, [x29, 136]
+	b	.L1676
+.L1667:
+	add	w0, w5, w4
+	ldr	x3, [x29, 136]
+	ubfiz	x2, x4, 9, 16
+	stp	w5, w7, [x29, 112]
+	str	w4, [x29, 120]
+	add	x2, x24, x2
+	udiv	w0, w0, w27
+	str	w6, [x29, 128]
+	ldr	x8, [x3, 16]
+	add	x3, x29, 208
+	and	w0, w0, 65535
+	mul	w1, w0, w27
+	stp	w1, w7, [x29, 208]
+	udiv	w1, w6, w27
+	add	w1, w1, w0
+	mov	w0, 0
+	blr	x8
+	ldr	w4, [x29, 120]
+	ldr	w0, [x29, 160]
+	ldp	w5, w7, [x29, 112]
+	add	w4, w0, w4
+	ldr	w6, [x29, 128]
+	and	w4, w4, 65535
+	b	.L1666
+.L1669:
+	add	w27, w8, w27
+	mov	w0, 0
+	and	w27, w27, 65535
+	b	.L1668
+.L1674:
+	mov	x27, x2
+	ldr	w4, [x0, x1, lsl 2]
+	lsl	x5, x1, 2
+	add	x2, x2, 4
+	add	x1, x1, 1
+	ldr	w3, [x27]
+	cmp	w4, w3
+	beq	.L1670
 	mov	x2, 512
 	mov	w1, 0
-	add	x0, x5, :lo12:gp_flash_check_buf
-	str	x5, [x29, 136]
+	str	x5, [x29, 160]
 	bl	memset
-	ldr	x0, [x29, 152]
+	ldr	x0, [x29, 176]
+	mov	w4, w28
+	ldr	x5, [x29, 160]
+	mov	w1, w19
+	ldr	w3, [x27]
+	add	x27, x26, :lo12:.LANCHOR105
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	w2, [x0, x5]
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
+	bl	printf
+	ldr	x2, [x27, 8]
+	mov	w1, w19
+	mov	w0, 0
+	blr	x2
+	cmp	w21, 1
+	bls	.L1683
+	ldr	x2, [x27, 8]
+	add	w1, w20, w19
+	mov	w0, 0
+	blr	x2
+.L1683:
+	ldr	w1, [x29, 204]
+	ldr	w0, [x29, 196]
+	add	w19, w19, w1
+	ldr	w1, [x29, 196]
+	add	w0, w21, w0
+	cmp	w1, 15
+	bhi	.L1677
+	str	w0, [x29, 196]
+.L1676:
+	adrp	x5, .LANCHOR186
+	mov	x2, 512
+	mov	w1, 0
+	str	x5, [x29, 176]
+	ldr	x0, [x5, #:lo12:.LANCHOR186]
+	bl	memset
+	ldr	x0, [x29, 168]
+	add	x4, x26, :lo12:.LANCHOR105
+	str	x4, [x29, 120]
 	add	x0, x0, :lo12:.LANCHOR0
+	ldr	x6, [x4, 8]
 	ldrh	w3, [x0, 14]
 	ldrh	w2, [x0, 10]
-	adrp	x0, .LANCHOR105
-	and	w27, w3, 255
-	add	x4, x0, :lo12:.LANCHOR105
-	str	w3, [x29, 120]
 	mov	w0, 0
+	and	w27, w3, 255
+	str	w3, [x29, 128]
+	str	w27, [x29, 160]
 	udiv	w1, w19, w3
-	str	x4, [x29, 112]
 	mul	w2, w27, w2
-	ldr	x6, [x4, 8]
-	str	w27, [x29, 128]
 	and	w28, w2, 65535
 	blr	x6
-	cmp	w28, 511
-	ldr	w3, [x29, 120]
-	ldr	x4, [x29, 112]
-	bhi	.L1576
+	ldr	w0, [x29, 204]
+	ldr	w3, [x29, 128]
+	cmp	w0, w28
+	ldr	x4, [x29, 120]
+	bls	.L1665
 	add	w1, w28, w19
 	ldr	x4, [x4, 8]
 	mov	w0, 0
 	udiv	w1, w1, w3
 	blr	x4
-.L1576:
+.L1665:
 	udiv	w5, w19, w28
-	ldr	x0, [x29, 144]
 	mov	w4, 0
 	mov	w7, 61424
-	add	x8, x0, :lo12:idb_buf
 	msub	w5, w5, w28, w19
 	sub	w6, w19, w5
-.L1577:
-	cmp	w4, 511
-	bls	.L1578
-	ldr	x0, [x29, 152]
+.L1666:
+	ldr	w0, [x29, 204]
+	cmp	w0, w4
+	bhi	.L1667
+	ldr	x0, [x29, 176]
+	add	x10, x26, :lo12:.LANCHOR105
 	mov	w27, 0
+	ldr	x6, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x29, 168]
 	add	x0, x0, :lo12:.LANCHOR0
 	ldrh	w4, [x0, 14]
 	ldrh	w5, [x0, 10]
@@ -11601,596 +12313,317 @@ sftl_write:
 	udiv	w5, w19, w0
 	msub	w5, w5, w0, w19
 	and	w1, w5, 65535
-	sub	w6, w19, w5
+	sub	w7, w19, w5
 	sdiv	w0, w1, w28
 	msub	w0, w0, w28, w1
-	ldr	x1, [x29, 136]
 	and	w0, w0, 65535
-	add	x8, x1, :lo12:gp_flash_check_buf
-.L1579:
-	cmp	w27, 511
-	bhi	.L1583
+.L1668:
+	cmp	w27, w23
+	bcs	.L1672
 	add	w1, w5, w27
-	sub	w7, w4, w0
-	add	w0, w0, w6
-	ldr	x10, [x23, 24]
-	and	w7, w7, 65535
+	sub	w8, w4, w0
+	add	w0, w0, w7
+	ldr	x11, [x10, 24]
+	and	w8, w8, 65535
 	ubfiz	x2, x27, 9, 16
 	udiv	w1, w1, w28
-	add	x2, x8, x2
-	stp	w4, w7, [x29, 104]
-	add	x3, x29, 176
-	str	w5, [x29, 112]
-	str	w6, [x29, 120]
+	add	x2, x6, x2
+	stp	w4, w8, [x29, 108]
+	add	x3, x29, 208
+	stp	w5, w7, [x29, 116]
+	str	x10, [x29, 128]
 	and	w1, w1, 65535
-	str	x8, [x29, 128]
+	str	x6, [x29, 160]
 	madd	w1, w1, w28, w0
 	mov	w0, 0
 	udiv	w1, w1, w28
-	blr	x10
+	blr	x11
 	cmn	w0, #1
-	ldp	w4, w7, [x29, 104]
-	ldr	w5, [x29, 112]
-	ldr	w6, [x29, 120]
-	ldr	x8, [x29, 128]
-	bne	.L1580
-.L1583:
-	ldr	x0, [x29, 144]
-	mov	x27, 0
-	add	x1, x0, :lo12:idb_buf
-	ldr	x0, [x29, 136]
-	add	x28, x0, :lo12:gp_flash_check_buf
-.L1581:
-	lsl	x0, x27, 2
-	add	x3, x0, x1
-	ldr	w2, [x0, x28]
-	ldr	w0, [x0, x1]
-	cmp	w2, w0
-	beq	.L1584
-	mov	x2, 512
-	mov	w1, 0
-	str	x3, [x29, 128]
-	mov	x0, x28
-	str	w27, [x29, 136]
-	bl	memset
-	ldr	w5, [x29, 136]
-	mov	w4, w27
-	ldr	x3, [x29, 128]
-	mov	w1, w19
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
-	ldr	w2, [x28, w5, uxtw 2]
-	ldr	w3, [x3]
-	bl	printf
-	ldr	w0, [x29, 172]
-	ldr	x2, [x23, 8]
-	udiv	w1, w19, w0
-	mov	w0, 0
-	blr	x2
-	cmp	w21, 1
-	bls	.L1585
-	ldr	w0, [x29, 168]
-	ldr	x2, [x23, 8]
-	add	w1, w0, w19
-	ldr	w0, [x29, 172]
-	udiv	w1, w1, w0
-	mov	w0, 0
-	blr	x2
-.L1585:
-	ldr	w0, [x29, 160]
-	add	w26, w26, w21
-	cmp	w26, 15
-	add	w19, w19, w0
-	bls	.L1572
-.L1590:
-	str	wzr, [x25, #:lo12:.LANCHOR179]
-.L1570:
-	mov	x3, x24
-	mov	w2, w22
-	mov	w1, w20
-	mov	w0, 0
-	bl	FtlWrite
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 240
-	ret
-.L1571:
-	ldr	w6, [x2, w0, uxtw 2]
-	add	w0, w0, 1
-	str	w6, [x3, x2]
-	cmp	w0, w5
-	sub	x1, x1, #4
-	csel	w0, w0, wzr, cc
-	cmp	x1, x4
-	bne	.L1574
-	b	.L1575
-.L1578:
-	add	w0, w5, w4
-	ldr	x10, [x23, 16]
-	ubfiz	x2, x4, 9, 16
-	stp	w5, w7, [x29, 100]
-	add	x2, x8, x2
-	stp	w4, w6, [x29, 108]
-	udiv	w0, w0, w27
-	str	x8, [x29, 120]
-	add	x3, x29, 176
-	and	w0, w0, 65535
-	mul	w1, w0, w27
-	stp	w1, w7, [x29, 176]
-	udiv	w1, w6, w27
-	add	w1, w1, w0
-	mov	w0, 0
-	blr	x10
-	ldp	w4, w6, [x29, 108]
-	ldr	w0, [x29, 128]
-	ldp	w5, w7, [x29, 100]
-	add	w4, w0, w4
-	and	w4, w4, 65535
-	ldr	x8, [x29, 120]
-	b	.L1577
-.L1580:
-	add	w27, w7, w27
-	mov	w0, 0
-	and	w27, w27, 65535
-	b	.L1579
-.L1584:
-	add	x27, x27, 1
-	cmp	x27, 65536
-	bne	.L1581
-	ldr	w0, [x29, 164]
+	ldp	w4, w8, [x29, 108]
+	ldp	w5, w7, [x29, 116]
+	ldr	x10, [x29, 128]
+	ldr	x6, [x29, 160]
+	bne	.L1669
+.L1672:
+	ldr	x0, [x29, 176]
+	mov	x2, x24
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+.L1670:
+	ldr	w3, [x29, 192]
+	mov	w28, w1
+	cmp	w1, w3
+	bcc	.L1674
+	ldr	w0, [x29, 200]
 	add	w0, w0, 1
-	str	w0, [x29, 164]
+	str	w0, [x29, 200]
 	cmp	w0, 5
-	bls	.L1585
-	b	.L1590
-.L1569:
-	cmp	w0, 63
-	adrp	x3, idb_buf
-	bhi	.L1587
+	bls	.L1683
+	b	.L1677
+.L1658:
+	cmp	w0, 64
+	adrp	x21, .LANCHOR185
+	bne	.L1678
+	mov	w0, 262144
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR185]
+	mov	w0, 262144
+	bl	ftl_malloc
+	mov	x1, x0
+	adrp	x0, .LANCHOR186
+	str	x1, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x21, #:lo12:.LANCHOR185]
+	cbz	x0, .L1679
+	cbz	x1, .L1679
+	adrp	x1, .LANCHOR184
+	mov	w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR184]
+	mov	w2, 262144
+	mov	w1, 0
+	bl	ftl_memset
+.L1678:
+	ldr	x0, [x21, #:lo12:.LANCHOR185]
+	cmp	w22, 63
+	bhi	.L1680
 	mov	w1, 64
-	sub	w1, w1, w0
-	sub	w2, w22, w1
+	ldr	x3, [x29, 184]
+	sub	w1, w1, w22
+	sub	w2, w25, w1
 	ubfiz	x1, x1, 9, 25
-	add	x1, x24, x1
-	add	x0, x3, :lo12:idb_buf
-.L1588:
-	mov	w3, 1
-	str	w3, [x25, #:lo12:.LANCHOR179]
-	cmp	w5, 576
-	bls	.L1589
-	sub	w2, w2, w4
+	add	x1, x3, x1
+.L1681:
+	cmp	w20, 576
+	bls	.L1682
+	sub	w2, w2, w19
 	sub	w2, w2, #447
-.L1589:
+.L1682:
 	lsl	w2, w2, 9
-	bl	memcpy
-	b	.L1570
-.L1587:
-	lsl	w0, w0, 7
-	add	x3, x3, :lo12:idb_buf
-	sub	w0, w0, #8192
-	mov	x1, x2
-	add	x0, x3, x0, lsl 2
-	mov	w2, w22
-	b	.L1588
+	bl	ftl_memcpy
+	b	.L1659
+.L1679:
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC116
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC116
+	bl	printf
+	b	.L1678
+.L1680:
+	lsl	w1, w22, 7
+	mov	w2, w25
+	sub	w1, w1, #8192
+	add	x0, x0, x1, lsl 2
+	ldr	x1, [x29, 184]
+	b	.L1681
 	.size	sftl_write, .-sftl_write
-	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
-	.global	FtlLoadSysInfo
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	stp	x29, x30, [sp, -96]!
-	mov	w1, 0
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR106
+	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR107
-	stp	x21, x22, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR106
+	add	x21, x20, :lo12:.LANCHOR37
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR108
+	add	x24, x21, 32
 	stp	x27, x28, [sp, 80]
-	adrp	x25, .LANCHOR42
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	adrp	x24, .LANCHOR5
-	str	x0, [x21, 8]
-	adrp	x20, .LANCHOR79
-	ldr	x0, [x26, #:lo12:.LANCHOR108]
-	str	x0, [x21, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	mov	w1, 65535
-	cmp	w0, w1
-	bne	.L1601
-.L1609:
-	mov	w0, -1
-.L1600:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1601:
-	add	x27, x20, :lo12:.LANCHOR79
-	mov	w1, 1
-	bl	FtlGetLastWrittenPage
-	sxth	w22, w0
-	add	w0, w0, 1
-	mov	w28, 61604
-	strh	w0, [x27, 2]
-	mov	w27, 19539
-	movk	w27, 0x4654, lsl 16
-.L1603:
-	tbz	w22, #31, .L1606
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1437
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1605:
-	adrp	x1, .LANCHOR23
-	ldrh	w0, [x24, #:lo12:.LANCHOR5]
-	ldrh	w1, [x1, #:lo12:.LANCHOR23]
-	add	x0, x0, 24
-	cmp	x1, x0, lsl 1
-	bcs	.L1608
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1439
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1608:
-	add	x22, x19, :lo12:.LANCHOR106
-	adrp	x19, .LANCHOR39
-	add	x21, x19, :lo12:.LANCHOR39
-	mov	w2, 48
-	mov	x0, x21
-	ldr	x1, [x22, 8]
-	bl	ftl_memcpy
-	ldr	x0, [x25, #:lo12:.LANCHOR42]
-	ldrh	w2, [x24, #:lo12:.LANCHOR5]
-	ldr	x1, [x22, 8]
-	lsl	w2, w2, 1
-	add	x1, x1, 48
-	bl	ftl_memcpy
-	ldrh	w1, [x24, #:lo12:.LANCHOR5]
-	ldr	x0, [x22, 8]
-	lsr	w2, w1, 3
-	ubfiz	x1, x1, 1, 16
-	add	x1, x1, 48
-	add	w2, w2, 4
-	and	x1, x1, -4
-	add	x1, x0, x1
-	adrp	x0, .LANCHOR1
-	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	bl	ftl_memcpy
-	ldr	w1, [x19, #:lo12:.LANCHOR39]
-	mov	w0, 19539
-	movk	w0, 0x4654, lsl 16
-	cmp	w1, w0
-	bne	.L1609
-	add	x20, x20, :lo12:.LANCHOR79
+	bl	FtlBbtMemInit
+	bl	FtlLoadFactoryBbt
+	adrp	x28, .LANCHOR148
+	add	x21, x21, 12
+	add	x25, x28, :lo12:.LANCHOR148
 	adrp	x0, .LANCHOR10
-	ldrh	w1, [x21, 8]
-	ldrb	w2, [x21, 10]
-	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	strh	w1, [x20, 6]
-	cmp	w2, w0
-	bne	.L1609
-	adrp	x0, .LANCHOR181
-	adrp	x2, .LANCHOR61
-	adrp	x3, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR181]
-	adrp	x0, .LANCHOR19
-	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	ldrh	w0, [x0, #:lo12:.LANCHOR19]
-	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR61]
-	adrp	x2, .LANCHOR12
-	ldrh	w2, [x2, #:lo12:.LANCHOR12]
-	mul	w0, w2, w0
-	adrp	x2, .LANCHOR34
-	str	w0, [x2, #:lo12:.LANCHOR34]
-	adrp	x0, .LANCHOR7
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LANCHOR37+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	cmp	w1, w2
-	sub	w0, w2, w0
-	sub	w0, w0, w1
-	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR78
-	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L1610
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1461
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.L1610:
-	add	x1, x19, :lo12:.LANCHOR39
-	adrp	x0, .LANCHOR51
-	add	x3, x0, :lo12:.LANCHOR51
-	adrp	x20, .LANCHOR80
-	ldrh	w2, [x1, 16]
-	ldrh	w6, [x1, 14]
-	strh	w6, [x0, #:lo12:.LANCHOR51]
-	lsr	w4, w2, 6
-	and	w2, w2, 63
-	strb	w2, [x3, 6]
-	ldrb	w2, [x1, 11]
-	strb	w2, [x3, 8]
-	add	x2, x20, :lo12:.LANCHOR80
-	strh	w4, [x3, 2]
-	mov	w3, -1
-	strh	w3, [x20, #:lo12:.LANCHOR80]
-	strh	wzr, [x2, 2]
-	strb	wzr, [x2, 6]
-	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR52
-	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR52
-	strh	w3, [x2, #:lo12:.LANCHOR52]
-	mov	x21, x2
-	ldrh	w3, [x1, 20]
-	lsr	w5, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x4, 6]
-	ldrb	w3, [x1, 12]
-	strh	w5, [x4, 2]
-	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR53
-	ldrh	w3, [x1, 22]
-	add	x5, x4, :lo12:.LANCHOR53
-	strh	w3, [x4, #:lo12:.LANCHOR53]
-	mov	x22, x4
-	ldrh	w3, [x1, 24]
-	lsr	w7, w3, 6
-	and	w3, w3, 63
-	strb	w3, [x5, 6]
-	ldrb	w3, [x1, 13]
-	strb	w3, [x5, 8]
-	adrp	x3, .LANCHOR67
-	strh	w7, [x5, 2]
-	ldr	w5, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR67]
-	adrp	x3, .LANCHOR64
-	str	wzr, [x3, #:lo12:.LANCHOR64]
-	adrp	x3, .LANCHOR62
-	str	wzr, [x3, #:lo12:.LANCHOR62]
-	adrp	x3, .LANCHOR66
-	str	wzr, [x3, #:lo12:.LANCHOR66]
-	adrp	x3, .LANCHOR72
-	str	w5, [x3, #:lo12:.LANCHOR72]
-	adrp	x3, .LANCHOR73
-	str	wzr, [x3, #:lo12:.LANCHOR73]
-	adrp	x3, .LANCHOR76
-	str	wzr, [x3, #:lo12:.LANCHOR76]
-	adrp	x3, .LANCHOR65
-	str	wzr, [x3, #:lo12:.LANCHOR65]
-	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR70
-	ldr	w5, [x1, #:lo12:.LANCHOR70]
-	cmp	w3, w5
-	bls	.L1611
-	str	w3, [x1, #:lo12:.LANCHOR70]
-.L1611:
-	add	x19, x19, :lo12:.LANCHOR39
-	adrp	x1, .LANCHOR71
-	ldr	w3, [x1, #:lo12:.LANCHOR71]
-	ldr	w2, [x19, 36]
-	cmp	w2, w3
-	bls	.L1612
-	str	w2, [x1, #:lo12:.LANCHOR71]
-.L1612:
-	mov	w1, 65535
-	cmp	w6, w1
-	beq	.L1613
-	add	x0, x0, :lo12:.LANCHOR51
-	bl	make_superblock
-.L1613:
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
-	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR52
-	cmp	w2, w1
-	beq	.L1614
-	bl	make_superblock
-.L1614:
-	ldrh	w2, [x22, #:lo12:.LANCHOR53]
-	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR53
-	cmp	w2, w1
-	beq	.L1615
-	bl	make_superblock
-.L1615:
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR80
-	cmp	w2, w1
-	beq	.L1616
-	bl	make_superblock
-.L1616:
-	mov	w0, 0
-	b	.L1600
-.L1606:
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	add	x0, x0, :lo12:.LANCHOR10
+	str	x0, [x29, 120]
+.L1701:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L1707
+	adrp	x21, .LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR25
+	mov	w19, 0
+.L1708:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L1709
+	add	x21, x20, :lo12:.LANCHOR37
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L1710:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L1714
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L1711
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L1712
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L1711:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1710
+.L1707:
+	adrp	x2, .LANCHOR123
+	adrp	x0, .LANCHOR115
+	add	x19, x28, :lo12:.LANCHOR148
+	ldrh	w1, [x21]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR123]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR17
+	str	x2, [x29, 112]
+	beq	.L1702
+	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	mov	w2, 1
+	madd	w27, w4, w22, w1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x21, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	str	x0, [x21, 8]
-	mov	x0, x21
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
 	bl	FlashReadPages
-	ldr	w0, [x21]
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR17]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L1703:
+	mov	w0, w27
+	add	w22, w22, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x21, x21, 2
+	b	.L1701
+.L1702:
+	mov	w1, w22
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR17]
+	add	x23, x23, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR137
+	sub	w19, w19, #1
+	add	x0, x0, :lo12:.LANCHOR137
+	and	w19, w19, 65535
+	str	x0, [x29, 104]
+.L1704:
+	ldrh	w0, [x23]
+	madd	w0, w22, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L1705
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x21]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR123]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR115
+	mov	w2, 4096
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x21]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w22, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
 	cmn	w0, #1
-	beq	.L1604
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L1604
-	ldr	x0, [x26, #:lo12:.LANCHOR108]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	beq	.L1605
-.L1604:
-	sub	w22, w22, #1
-	sxth	w22, w22
-	b	.L1603
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlSysBlkInit,"ax",@progbits
-	.align	2
-	.global	FtlSysBlkInit
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR4
-	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR161
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	strh	wzr, [x20, #:lo12:.LANCHOR161]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR79
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L1623
-.L1625:
-	mov	w23, -1
-.L1622:
-	mov	w0, w23
+	bne	.L1703
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L1704
+.L1705:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1704
+.L1709:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L1708
+.L1712:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L1713
+	strh	w19, [x21]
+	b	.L1711
+.L1713:
+	strh	w19, [x21, 4]
+.L1714:
+	adrp	x0, .LANCHOR106
+	add	x19, x20, :lo12:.LANCHOR37
+	ldrh	w1, [x20, #:lo12:.LANCHOR37]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 36]
+	mov	w1, 1
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmTblFlush
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1623:
-	bl	FtlLoadSysInfo
-	mov	w23, w0
-	cbnz	w0, .L1625
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	mov	w0, 1
-	bl	FtlUpdateVaildLpn
-	adrp	x0, .LANCHOR33
-	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	adrp	x0, .LANCHOR55
-	ldr	x1, [x0, #:lo12:.LANCHOR55]
-	mov	w0, 0
-	add	x1, x1, 4
-.L1626:
-	cmp	w0, w2
-	bge	.L1631
-	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1627
-.L1631:
-	adrp	x19, .LANCHOR39
-	add	x3, x19, :lo12:.LANCHOR39
-	cmp	w0, w2
-	adrp	x22, .LANCHOR51
-	ldrh	w1, [x3, 28]
-	add	w1, w1, 1
-	strh	w1, [x3, 28]
-	bge	.L1635
-.L1628:
-	add	x21, x22, :lo12:.LANCHOR51
-	adrp	x24, .LANCHOR52
-	mov	x0, x21
-	add	x20, x24, :lo12:.LANCHOR52
-	bl	FtlSuperblockPowerLostFix
-	mov	x0, x20
-	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR42
-	ldrh	w3, [x21, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR42]
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w3
-	adrp	x3, .LANCHOR19
-	strh	w2, [x1, x0]
-	strb	wzr, [x21, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x21, 2]
-	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	strh	wzr, [x21, 4]
-	ldrh	w4, [x20, 4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w4
-	strh	w2, [x1, x0]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR19]
-	strh	w0, [x20, 2]
-	strh	wzr, [x20, 4]
-	adrp	x0, .LANCHOR144
-	add	x0, x0, :lo12:.LANCHOR144
-	bl	FtlMapBlkWriteDump_data
-	adrp	x0, .LANCHOR149
-	add	x0, x0, :lo12:.LANCHOR149
-	bl	FtlMapBlkWriteDump_data
-	add	x1, x19, :lo12:.LANCHOR39
-	ldrh	w0, [x1, 30]
-	add	w0, w0, 1
-	strh	w0, [x1, 30]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1637:
-	bl	FtlVpcTblFlush
-	add	x21, x22, :lo12:.LANCHOR51
-	ldrh	w0, [x22, #:lo12:.LANCHOR51]
-	mov	w1, 65535
-	cmp	w0, w1
-	beq	.L1634
-	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1634
-	adrp	x22, .LANCHOR52
-	add	x20, x22, :lo12:.LANCHOR52
-	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1634
-	bl	FtlGcRefreshBlock
-	ldrh	w0, [x22, #:lo12:.LANCHOR52]
-	bl	FtlGcRefreshBlock
-	mov	x0, x21
-	bl	allocate_new_data_superblock
-	mov	x0, x20
-	bl	allocate_new_data_superblock
-.L1634:
-	add	x19, x19, :lo12:.LANCHOR39
-	ldrh	w0, [x19, 28]
-	tst	x0, 31
-	bne	.L1622
-	bl	FtlVpcCheckAndModify
-	b	.L1622
-.L1627:
-	add	w0, w0, 1
-	b	.L1626
-.L1635:
-	ldrh	w0, [x20, #:lo12:.LANCHOR161]
-	cbnz	w0, .L1628
-	bl	l2p_flush
-	b	.L1637
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
@@ -12210,49 +12643,49 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1639
+	cbz	w0, .L1721
 	bl	FtlMakeBbt
-.L1639:
+.L1721:
 	adrp	x23, .LANCHOR12
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR118
 	mov	w6, 23752
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR113
+	ldr	x4, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR119
 	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR113]
+	ldr	x5, [x0, #:lo12:.LANCHOR119]
 	mov	w0, 0
-.L1640:
+.L1722:
 	cmp	w0, w1
-	blt	.L1641
+	blt	.L1723
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1642:
+.L1724:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1643
+	bhi	.L1725
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1644
-.L1648:
+	bgt	.L1726
+.L1730:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1645:
+.L1727:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1649
-	adrp	x0, .LANCHOR112
+	bhi	.L1731
+	adrp	x0, .LANCHOR111
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR78
-	str	w1, [x0, #:lo12:.LANCHOR112]
+	str	w1, [x0, #:lo12:.LANCHOR111]
 	adrp	x0, .LANCHOR7
 	adrp	x3, .LANCHOR61
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
@@ -12264,37 +12697,37 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1650
+	ble	.L1732
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1650:
+.L1732:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1652
+	cbz	w1, .L1734
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1652
+	bge	.L1734
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1652:
+.L1734:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
-	adrp	x25, .LANCHOR181
+	adrp	x25, .LANCHOR152
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
 	adrp	x24, .LANCHOR42
 	sub	w0, w0, w1
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR181]
+	str	w0, [x25, #:lo12:.LANCHOR152]
 	mul	w0, w1, w0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	str	w0, [x3, #:lo12:.LANCHOR61]
@@ -12329,20 +12762,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1654:
+.L1736:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1655
+	cbnz	w1, .L1737
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1654
-.L1641:
+	b	.L1736
+.L1723:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12350,8 +12783,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1640
-.L1643:
+	b	.L1722
+.L1725:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12359,8 +12792,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1642
-.L1644:
+	b	.L1724
+.L1726:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12370,17 +12803,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1646:
+.L1728:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1648
+	bls	.L1730
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1646
-.L1649:
+	b	.L1728
+.L1731:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12388,8 +12821,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1645
-.L1655:
+	b	.L1727
+.L1737:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12409,20 +12842,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1656:
+.L1738:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1657
+	cbnz	w1, .L1739
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1656
-.L1657:
+	b	.L1738
+.L1739:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12438,7 +12871,7 @@ ftl_low_format:
 	adrp	x2, .LANCHOR79
 	add	x1, x2, :lo12:.LANCHOR79
 	strh	w0, [x2, #:lo12:.LANCHOR79]
-	ldr	w0, [x25, #:lo12:.LANCHOR181]
+	ldr	w0, [x25, #:lo12:.LANCHOR152]
 	strh	w0, [x1, 6]
 	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
@@ -12448,11 +12881,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1658
+	cbnz	w0, .L1740
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1658:
+.L1740:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12461,53 +12894,6 @@ ftl_low_format:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.sftl_init,"ax",@progbits
-	.align	2
-	.global	sftl_init
-	.type	sftl_init, %function
-sftl_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC70
-	add	x1, x1, :lo12:.LC70
-	mov	w0, -1
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR86
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printf
-	adrp	x0, .LANCHOR0
-	add	x0, x0, :lo12:.LANCHOR0
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR4
-	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	w0, .L1667
-	bl	FtlSysBlkInit
-	cbnz	w0, .L1667
-	mov	w0, 1
-	str	w0, [x19, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR48
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
-	cmp	w0, 15
-	bhi	.L1667
-	mov	w19, 8129
-.L1666:
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-	subs	w19, w19, #1
-	bne	.L1666
-.L1667:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
 	.global	ftl_memcmp
@@ -12516,7 +12902,6 @@ ftl_memcmp:
 	uxtw	x2, w2
 	b	memcmp
 	.size	ftl_memcmp, .-ftl_memcmp
-	.global	ftl_temp_buf
 	.global	g_nand_ops
 	.global	g_nand_phy_info
 	.global	gc_ink_free_return_value
@@ -12531,6 +12916,9 @@ ftl_memcmp:
 	.global	g_recovery_ppa_tbl
 	.global	g_recovery_page_min_ver
 	.global	g_recovery_page_num
+	.global	sftl_nand_check_spare_buf
+	.global	sftl_temp_buf
+	.global	sftl_nand_check_buf
 	.global	g_cur_erase_blk
 	.global	g_gc_skip_write_count
 	.global	g_gc_head_data_block_count
@@ -12908,19 +13296,6 @@ c_gc_page_buf_num:
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.zero	2
-	.section	.bss.check_buf,"aw",@nobits
-	.align	3
-	.type	check_buf, %object
-	.size	check_buf, 4096
-check_buf:
-	.zero	4096
-	.section	.bss.check_spare_buf,"aw",@nobits
-	.align	3
-	.set	.LANCHOR110,. + 0
-	.type	check_spare_buf, %object
-	.size	check_spare_buf, 512
-check_spare_buf:
-	.zero	512
 	.section	.bss.check_vpc_table,"aw",@nobits
 	.align	3
 	.type	check_vpc_table, %object
@@ -12929,17 +13304,11 @@ check_vpc_table:
 	.zero	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
-	.section	.bss.ftl_temp_buf,"aw",@nobits
-	.align	3
-	.type	ftl_temp_buf, %object
-	.size	ftl_temp_buf, 4096
-ftl_temp_buf:
-	.zero	4096
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
 	.set	.LANCHOR37,. + 0
@@ -12949,7 +13318,7 @@ gBbtInfo:
 	.zero	96
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
@@ -12970,7 +13339,7 @@ gSysInfo:
 	.zero	12
 	.section	.bss.gVendorBlkInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	gVendorBlkInfo, %object
 	.size	gVendorBlkInfo, 64
 gVendorBlkInfo:
@@ -12998,7 +13367,7 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -13033,7 +13402,7 @@ g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -13047,14 +13416,14 @@ g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -13096,14 +13465,14 @@ g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
@@ -13117,14 +13486,14 @@ g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
@@ -13187,7 +13556,7 @@ g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
@@ -13250,28 +13619,28 @@ g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
@@ -13292,7 +13661,7 @@ g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -13334,7 +13703,7 @@ g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
@@ -13369,7 +13738,7 @@ g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
@@ -13404,14 +13773,14 @@ g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -13425,10 +13794,11 @@ gp_ect_tbl_info:
 	.zero	8
 	.section	.bss.gp_flash_check_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR186,. + 0
 	.type	gp_flash_check_buf, %object
-	.size	gp_flash_check_buf, 262144
+	.size	gp_flash_check_buf, 8
 gp_flash_check_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR90,. + 0
@@ -13444,13 +13814,14 @@ gp_last_act_superblock:
 	.zero	8
 	.section	.bss.idb_buf,"aw",@nobits
 	.align	3
+	.set	.LANCHOR185,. + 0
 	.type	idb_buf, %object
-	.size	idb_buf, 262144
+	.size	idb_buf, 8
 idb_buf:
-	.zero	262144
+	.zero	8
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -13527,21 +13898,21 @@ p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
@@ -13604,21 +13975,21 @@ p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -13660,7 +14031,7 @@ p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
@@ -13674,7 +14045,7 @@ p_vendor_region_ppn_table:
 	.zero	8
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
@@ -13688,35 +14059,56 @@ req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
 	.zero	32
+	.section	.bss.sftl_nand_check_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR120,. + 0
+	.type	sftl_nand_check_buf, %object
+	.size	sftl_nand_check_buf, 8
+sftl_nand_check_buf:
+	.zero	8
+	.section	.bss.sftl_nand_check_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	sftl_nand_check_spare_buf, %object
+	.size	sftl_nand_check_spare_buf, 8
+sftl_nand_check_spare_buf:
+	.zero	8
+	.section	.bss.sftl_temp_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR121,. + 0
+	.type	sftl_temp_buf, %object
+	.size	sftl_temp_buf, 8
+sftl_temp_buf:
+	.zero	8
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
@@ -13730,35 +14122,40 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",@progbits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
-	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
+	.section	.rodata.FlashEraseBlocks.str1.1,"aMS",@progbits,1
 .LC79:
-	.string	"prog read error: = %x\n"
+	.string	"%s: addr: %x is in id block!!!!!!!!!!\n"
 .LC80:
-	.string	"prog read s error: = %x %x %x\n"
+	.string	"not free: w: d:"
 .LC81:
+	.string	"not free: w: s:"
+	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
+.LC85:
+	.string	"prog read error: = %x\n"
+.LC86:
+	.string	"prog read s error: = %x %x %x\n"
+.LC87:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC97:
+.LC101:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC98:
+.LC102:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC99:
+.LC103:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
 .LC82:
-	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
-.LC83:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
-.LC100:
+.LC104:
 	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
 .LC74:
@@ -13766,16 +14163,19 @@ power_up_flag:
 	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",@progbits,1
 .LC73:
 	.string	"FtlGcRefreshBlock  0x%x\n"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
+.LC100:
+	.string	"FtlGcScanTempBlk Error ID %x %x!!!!!!! \n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC103:
+.LC108:
 	.string	"no ect"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC89:
+.LC88:
 	.string	"FtlMapWritePage error = %x \n"
-.LC90:
+.LC89:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
-.LC85:
+.LC84:
 	.string	"%s error allocating memory. return -1\n"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
 .LC2:
@@ -13915,19 +14315,22 @@ power_up_flag:
 .LC69:
 	.string	"free %d. [0x%x] 0x%x  0x%x\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC106:
+.LC111:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC102:
+.LC106:
 	.string	"spuer block %x vpn is 0\n "
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
+.LC107:
+	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
-.LC105:
+.LC110:
 	.string	"FtlCheckVpc %x = %x  %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC104:
+.LC109:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC108:
+.LC113:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
 .LC72:
@@ -13935,246 +14338,260 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6109,"a",@progbits
+	.section	.rodata.__func__.6119,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6109, %object
-	.size	__func__.6109, 11
-__func__.6109:
+	.type	__func__.6119, %object
+	.size	__func__.6119, 11
+__func__.6119:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6233,"a",@progbits
+	.section	.rodata.__func__.6243,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.6233, %object
-	.size	__func__.6233, 13
-__func__.6233:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.6243, %object
+	.size	__func__.6243, 13
+__func__.6243:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6261,"a",@progbits
+	.section	.rodata.__func__.6271,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.6261, %object
-	.size	__func__.6261, 9
-__func__.6261:
+	.set	.LANCHOR183,. + 0
+	.type	__func__.6271, %object
+	.size	__func__.6271, 9
+__func__.6271:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6407,"a",@progbits
+	.section	.rodata.__func__.6377,"a",@progbits
+	.align	3
+	.set	.LANCHOR187,. + 0
+	.type	__func__.6377, %object
+	.size	__func__.6377, 14
+__func__.6377:
+	.string	"FtlWriteToIDB"
+	.section	.rodata.__func__.6418,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6407, %object
-	.size	__func__.6407, 14
-__func__.6407:
+	.type	__func__.6418, %object
+	.size	__func__.6418, 14
+__func__.6418:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6450,"a",@progbits
+	.section	.rodata.__func__.6461,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.6450, %object
-	.size	__func__.6450, 11
-__func__.6450:
+	.set	.LANCHOR150,. + 0
+	.type	__func__.6461, %object
+	.size	__func__.6461, 11
+__func__.6461:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6567,"a",@progbits
+	.section	.rodata.__func__.6576,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6567, %object
-	.size	__func__.6567, 17
-__func__.6567:
+	.type	__func__.6576, %object
+	.size	__func__.6576, 17
+__func__.6576:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6572,"a",@progbits
+	.section	.rodata.__func__.6581,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6572, %object
-	.size	__func__.6572, 17
-__func__.6572:
+	.type	__func__.6581, %object
+	.size	__func__.6581, 17
+__func__.6581:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6603,"a",@progbits
+	.section	.rodata.__func__.6612,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6603, %object
-	.size	__func__.6603, 17
-__func__.6603:
+	.type	__func__.6612, %object
+	.size	__func__.6612, 17
+__func__.6612:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6635,"a",@progbits
-	.align	3
-	.set	.LANCHOR54,. + 0
-	.type	__func__.6635, %object
-	.size	__func__.6635, 22
-__func__.6635:
-	.string	"List_update_data_list"
 	.section	.rodata.__func__.6644,"a",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	__func__.6644, %object
-	.size	__func__.6644, 16
+	.size	__func__.6644, 22
 __func__.6644:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.6653,"a",@progbits
+	.align	3
+	.set	.LANCHOR156,. + 0
+	.type	__func__.6653, %object
+	.size	__func__.6653, 16
+__func__.6653:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6677,"a",@progbits
+	.section	.rodata.__func__.6686,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.6677, %object
-	.size	__func__.6677, 26
-__func__.6677:
+	.set	.LANCHOR107,. + 0
+	.type	__func__.6686, %object
+	.size	__func__.6686, 26
+__func__.6686:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6688,"a",@progbits
+	.section	.rodata.__func__.6697,"a",@progbits
 	.align	3
-	.set	.LANCHOR143,. + 0
-	.type	__func__.6688, %object
-	.size	__func__.6688, 15
-__func__.6688:
+	.set	.LANCHOR157,. + 0
+	.type	__func__.6697, %object
+	.size	__func__.6697, 15
+__func__.6697:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6702,"a",@progbits
+	.section	.rodata.__func__.6712,"a",@progbits
 	.align	3
-	.set	.LANCHOR141,. + 0
-	.type	__func__.6702, %object
-	.size	__func__.6702, 31
-__func__.6702:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.6712, %object
+	.size	__func__.6712, 31
+__func__.6712:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6716,"a",@progbits
+	.section	.rodata.__func__.6726,"a",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
-	.type	__func__.6716, %object
-	.size	__func__.6716, 16
-__func__.6716:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.6726, %object
+	.size	__func__.6726, 16
+__func__.6726:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6741,"a",@progbits
+	.section	.rodata.__func__.6751,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6741, %object
-	.size	__func__.6741, 22
-__func__.6741:
+	.type	__func__.6751, %object
+	.size	__func__.6751, 22
+__func__.6751:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6758,"a",@progbits
+	.section	.rodata.__func__.6768,"a",@progbits
 	.align	3
-	.set	.LANCHOR145,. + 0
-	.type	__func__.6758, %object
-	.size	__func__.6758, 9
-__func__.6758:
+	.set	.LANCHOR159,. + 0
+	.type	__func__.6768, %object
+	.size	__func__.6768, 9
+__func__.6768:
 	.string	"log2phys"
-	.section	.rodata.__func__.6831,"a",@progbits
+	.section	.rodata.__func__.6841,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
-	.type	__func__.6831, %object
-	.size	__func__.6831, 15
-__func__.6831:
+	.set	.LANCHOR171,. + 0
+	.type	__func__.6841, %object
+	.size	__func__.6841, 15
+__func__.6841:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6853,"a",@progbits
+	.section	.rodata.__func__.6863,"a",@progbits
 	.align	3
-	.set	.LANCHOR148,. + 0
-	.type	__func__.6853, %object
-	.size	__func__.6853, 14
-__func__.6853:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.6863, %object
+	.size	__func__.6863, 14
+__func__.6863:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6910,"a",@progbits
+	.section	.rodata.__func__.6920,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.6910, %object
-	.size	__func__.6910, 15
-__func__.6910:
+	.set	.LANCHOR151,. + 0
+	.type	__func__.6920, %object
+	.size	__func__.6920, 15
+__func__.6920:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6973,"a",@progbits
+	.section	.rodata.__func__.6983,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.6973, %object
-	.size	__func__.6973, 16
-__func__.6973:
+	.set	.LANCHOR160,. + 0
+	.type	__func__.6983, %object
+	.size	__func__.6983, 16
+__func__.6983:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.7007,"a",@progbits
+	.section	.rodata.__func__.7017,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.7007, %object
-	.size	__func__.7007, 22
-__func__.7007:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.7017, %object
+	.size	__func__.7017, 22
+__func__.7017:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.7064,"a",@progbits
+	.section	.rodata.__func__.7074,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.7064, %object
-	.size	__func__.7064, 16
-__func__.7064:
+	.type	__func__.7074, %object
+	.size	__func__.7074, 16
+__func__.7074:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7085,"a",@progbits
+	.section	.rodata.__func__.7095,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.7085, %object
-	.size	__func__.7085, 18
-__func__.7085:
+	.set	.LANCHOR146,. + 0
+	.type	__func__.7095, %object
+	.size	__func__.7095, 18
+__func__.7095:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7110,"a",@progbits
+	.section	.rodata.__func__.7120,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
-	.type	__func__.7110, %object
-	.size	__func__.7110, 21
-__func__.7110:
+	.set	.LANCHOR173,. + 0
+	.type	__func__.7120, %object
+	.size	__func__.7120, 21
+__func__.7120:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7126,"a",@progbits
+	.section	.rodata.__func__.7136,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.7126, %object
-	.size	__func__.7126, 14
-__func__.7126:
+	.set	.LANCHOR161,. + 0
+	.type	__func__.7136, %object
+	.size	__func__.7136, 14
+__func__.7136:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7211,"a",@progbits
+	.section	.rodata.__func__.7221,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.7211, %object
-	.size	__func__.7211, 25
-__func__.7211:
+	.set	.LANCHOR163,. + 0
+	.type	__func__.7221, %object
+	.size	__func__.7221, 25
+__func__.7221:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7232,"a",@progbits
+	.section	.rodata.__func__.7242,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.7232, %object
-	.size	__func__.7232, 29
-__func__.7232:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.7242, %object
+	.size	__func__.7242, 29
+__func__.7242:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7239,"a",@progbits
+	.section	.rodata.__func__.7249,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7239, %object
-	.size	__func__.7239, 19
-__func__.7239:
+	.type	__func__.7249, %object
+	.size	__func__.7249, 19
+__func__.7249:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7252,"a",@progbits
+	.section	.rodata.__func__.7262,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.7252, %object
-	.size	__func__.7252, 16
-__func__.7252:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.7262, %object
+	.size	__func__.7262, 16
+__func__.7262:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7259,"a",@progbits
+	.section	.rodata.__func__.7269,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.7259, %object
-	.size	__func__.7259, 20
-__func__.7259:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.7269, %object
+	.size	__func__.7269, 20
+__func__.7269:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7329,"a",@progbits
+	.section	.rodata.__func__.7339,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.7329, %object
-	.size	__func__.7329, 19
-__func__.7329:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.7339, %object
+	.size	__func__.7339, 19
+__func__.7339:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7435,"a",@progbits
+	.section	.rodata.__func__.7450,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.7435, %object
-	.size	__func__.7435, 23
-__func__.7435:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.7450, %object
+	.size	__func__.7450, 23
+__func__.7450:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7702,"a",@progbits
+	.section	.rodata.__func__.7712,"a",@progbits
 	.align	3
-	.set	.LANCHOR104,. + 0
-	.type	__func__.7702, %object
-	.size	__func__.7702, 15
-__func__.7702:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.7712, %object
+	.size	__func__.7712, 15
+__func__.7712:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7719,"a",@progbits
+	.section	.rodata.__func__.7730,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.7719, %object
-	.size	__func__.7719, 15
-__func__.7719:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.7730, %object
+	.size	__func__.7730, 15
+__func__.7730:
 	.string	"FlashProgPages"
+	.section	.rodata.__func__.7753,"a",@progbits
+	.align	3
+	.set	.LANCHOR104,. + 0
+	.type	__func__.7753, %object
+	.size	__func__.7753, 17
+__func__.7753:
+	.string	"FlashEraseBlocks"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC101:
+.LC105:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
 .LC94:
@@ -14184,24 +14601,26 @@ __func__.7719:
 .LC96:
 	.string	"free blk vpc error %x = %x  %x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC84:
+.LC83:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC91:
+.LC97:
 	.string	"ftl_scan_all_data = %x\n"
-.LC92:
+.LC98:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC93:
+.LC99:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC86:
+.LC90:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC87:
+.LC91:
 	.string	"spare:"
-.LC88:
+.LC92:
 	.string	"map_ppn:"
+.LC93:
+	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC107:
+.LC112:
 	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC75:
@@ -14214,10 +14633,14 @@ __func__.7719:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.44 20180713"
+	.string	"SFTL version: 5.0.48 20180930"
 .LC71:
 	.string	"%s\n"
 	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
-.LC109:
+.LC114:
+	.string	"write_idblock fix data %x %x %x\n"
+.LC115:
 	.string	"write_idblock fail! %x %x %x %x\n"
+.LC116:
+	.string	"%s idb buffer alloc fail\n"
 	.hidden	free

commit babab61fd115004f40be8806e4dba594c07613f9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 8 14:30:52 2018 +0800

    rockchip: rk1808: define CONFIG_SYS_MMC_ENV_DEV as 0
    
    Change-Id: I34584893af47880d73b4016923af44a5fb6b7b1d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk1808.h b/include/configs/evb_rk1808.h
index e2eb28768a..95731169ec 100644
--- a/include/configs/evb_rk1808.h
+++ b/include/configs/evb_rk1808.h
@@ -13,6 +13,8 @@
 			"stdout=serial,vidconsole\0" \
 			"stderr=serial,vidconsole\0"
 
+#define CONFIG_SYS_MMC_ENV_DEV		0
+
 #ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND

commit 2e544f944cd34ff30016786e5cb0d8c5a0c4fd3d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 8 14:37:36 2018 +0800

    configs: rk1808: enable env relative commands
    
    these commands are necessary if env is not in nowhere,
    
    Fixes: f88d7e9
    (configs: rk1808: cut down unused modules)
    
    Change-Id: Iab6d247bfc895ff74e9de2c7e1d852d8e5e4b644
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 65dac1e786..c033b50164 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -20,10 +20,6 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
 # CONFIG_CMD_LZMADEC is not set
 # CONFIG_CMD_UNZIP is not set
 # CONFIG_CMD_FLASH is not set

commit 39965620e81ccfb2848305331c45b947bf23e1ea
Author: Ye Gaoyang <gaoyang.ye@rock-chips.com>
Date:   Wed Sep 26 09:17:18 2018 +0800

    Add: Allow logo in 16bit or 32bit color BMP
    
    Change-Id: Ife719d3d567df4c98d40ddfe67c6952fa2929fec
    Signed-off-by: Ye Gaoyang <gaoyang.ye@rock-chips.com>

diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
old mode 100755
new mode 100644
index a95fe88147..523506f278
--- a/drivers/video/drm/bmp_helper.c
+++ b/drivers/video/drm/bmp_helper.c
@@ -4,6 +4,8 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#include <command.h>
+#include <log.h>
 #include <config.h>
 #include <common.h>
 #include <malloc.h>
@@ -141,9 +143,30 @@ static void decode_rle8_bitmap(void *psrc, void *pdst, uint16_t *cmap,
 	}
 }
 
+static void dump_bmp_dib_head(void *bmp_addr)
+{
+	struct bmp_image *bmp = bmp_addr;
+
+	debug("########## BMP DIB_HEAD ##########\n"
+	      "Width  : %u\n"
+	      "Height : %u\n"
+	      "Bpp    : %u\n"
+	      "Compression method : %u\n"
+	      "Image size : %u\n"
+	      "Colors in palette  : %u\n"
+	      "##################################\n",
+		bmp->header.width,
+		bmp->header.height,
+		bmp->header.bit_count,
+		bmp->header.compression,
+		bmp->header.image_size,
+		bmp->header.colors_used);
+}
+
 int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 {
-	int stride, padded_width, bpp, i, width, height;
+	int i, j;
+	int stride, padded_width, bpp, width, height;
 	struct bmp_image *bmp = bmp_addr;
 	uint8_t *src = bmp_addr;
 	uint8_t *dst = pdst;
@@ -153,9 +176,10 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 
 	if (!bmp || !(bmp->header.signature[0] == 'B' &&
 	    bmp->header.signature[1] == 'M')) {
-		printf("cat not find bmp file\n");
+		printf("Error: Invalid bmp file.\n");
 		return -1;
 	}
+	dump_bmp_dib_head(bmp);
 	width = get_unaligned_le32(&bmp->header.width);
 	height = get_unaligned_le32(&bmp->header.height);
 	bpp = get_unaligned_le16(&bmp->header.bit_count);
@@ -172,8 +196,8 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 	switch (bpp) {
 	case 8:
 		if (dst_bpp != 16) {
-			printf("can't support covert bmap to bit[%d]\n",
-			       dst_bpp);
+			printf("Error: Target pixel's bpp is not 16bit.\n");
+
 			return -1;
 		}
 		cmap = malloc(sizeof(cmap) * 256);
@@ -193,7 +217,6 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 			decode_rle8_bitmap(src, dst, cmap, width, height,
 					   bpp, 0, 0, flip);
 		} else {
-			int j;
 			stride = width * 2;
 
 			if (flip)
@@ -211,9 +234,35 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 		}
 		free(cmap);
 		break;
+	case 16:
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			printf("Error: Failed to decompression bmp file.\n");
+
+			return -1;
+		}
+		stride = ALIGN(width * bpp / 8, 4);
+		if (flip)
+			src += stride * (height - 1);
+		for (i = 0; i < height; i++) {
+			for (j = 0; j < width; j++) {
+				ushort color = (src[1] << 8) | src[0];
+
+				color = (((color & 0x7c00) << 1) |
+					((color & 0x03e0) << 1) |
+					(color & 0x001f));
+				*(uint16_t *)dst = color;
+				src += 2;
+				dst += 2;
+			}
+			src += (padded_width - width);
+			if (flip)
+				src -= stride * 2;
+		}
+		break;
 	case 24:
 		if (get_unaligned_le32(&bmp->header.compression)) {
-			printf("can't not support compression for 24bit bmap");
+			printf("Error: Failed to decompression bmp file.\n");
+
 			return -1;
 		}
 		stride = ALIGN(width * 3, 4);
@@ -228,10 +277,26 @@ int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
 				src -= stride * 2;
 		}
 		break;
-	case 16:
 	case 32:
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			printf("Error: Failed to decompression bmp file.\n");
+
+			return -1;
+		}
+		stride = ALIGN(width * 4, 4);
+		if (flip)
+			src += stride * (height - 1);
+
+		for (i = 0; i < height; i++) {
+			memcpy(dst, src, 4 * width);
+			dst += stride;
+			src += stride;
+			if (flip)
+				src -= stride * 2;
+		}
+		break;
 	default:
-		printf("unsupport bit=%d now\n", bpp);
+		printf("Error: Can't decode this bmp file with bit=%d\n", bpp);
 		return -1;
 	}
 
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 85c92e2e01..452d16cdb5 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
@@ -28,6 +29,7 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
+#include "rockchip_vop.h"
 #include <dm.h>
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
@@ -163,9 +165,40 @@ static unsigned long get_display_size(void)
 	return memory_end - memory_start;
 }
 
-static bool can_direct_logo(int bpp)
+/**
+ * vop_support_ymirror - ensure whethere vop support the feature of ymirror.
+ * @logo:	the pointer to the logo information.
+ *
+ */
+static bool vop_support_ymirror(struct logo_info *logo)
 {
-	return bpp == 24 || bpp == 32;
+	bool ret;
+	struct display_state *state;
+	struct vop_data *vop_data;
+
+	ret = false;
+	state = container_of(logo, struct display_state, logo);
+	if (state->crtc_state.crtc->data) {
+		vop_data = (struct vop_data *)state->crtc_state.crtc->data;
+		printf("VOP hardware version v%d.%d, ",
+		       VOP_MAJOR(vop_data->version),
+		       VOP_MINOR(vop_data->version));
+		/*
+		 * if the version of VOP is higher than v3.0,
+		 * which means that the VOP support ymirror,
+		 * so it isn't need to mirror image by ourself.
+		 */
+		if (vop_data->version >= VOP_VERSION(3, 0)) {
+			printf("Support mirror mode.\n");
+			ret = true;
+		} else {
+			printf("Not support mirror mode.\n");
+		}
+	} else {
+		printf("Error: CRTC drivers is not ready.\n");
+	}
+
+	return ret;
 }
 
 
@@ -323,7 +356,7 @@ static int connector_panel_init(struct display_state *state)
 
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
-		debug("%s can not find dsp-lut node\n", __func__);
+		printf("%s can not find dsp-lut node\n", __func__);
 		return 0;
 	}
 
@@ -931,7 +964,6 @@ static int display_logo(struct display_state *state)
 		printf("can't support bmp bits[%d]\n", logo->bpp);
 		return -EINVAL;
 	}
-	crtc_state->rb_swap = logo->bpp != 32;
 	hdisplay = conn_state->mode.hdisplay;
 	vdisplay = conn_state->mode.vdisplay;
 	crtc_state->src_w = logo->width;
@@ -1117,20 +1149,17 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
 	logo->height = get_unaligned_le32(&header->height);
-	size = get_unaligned_le32(&header->file_size);
-	if (!can_direct_logo(logo->bpp)) {
-		if (size > MEMORY_POOL_SIZE) {
-			printf("failed to use boot buf as temp bmp buffer\n");
-			ret = -ENOMEM;
-			goto free_header;
-		}
-		pdst = get_display_buffer(size);
 
-	} else {
-		pdst = get_display_buffer(size);
-		dst = pdst;
+	size = get_unaligned_le32(&header->file_size);
+	if (size > MEMORY_POOL_SIZE) {
+		printf("failed to use boot buf as temp bmp buffer\n");
+		ret = -ENOMEM;
+		goto free_header;
 	}
 
+	pdst = get_display_buffer(size);
+	dst = pdst;
+
 	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
 	if (len != size) {
 		printf("failed to load bmp %s\n", bmp_name);
@@ -1138,7 +1167,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		goto free_header;
 	}
 
-	if (!can_direct_logo(logo->bpp)) {
+	if (!vop_support_ymirror(logo)) {
 		int dst_size;
 		/*
 		 * TODO: force use 16bpp if bpp less than 16;
@@ -1151,6 +1180,7 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 			ret = -ENOMEM;
 			goto free_header;
 		}
+		memset(dst, 0, dst_size);
 		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
 			ret = -EINVAL;

commit 565ab70da67d3e38321f738b0d5b04991c9742f3
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 16:06:29 2018 +0800

    video/drm: dsi: Add mipi_dsi_set_maximum_return_packet_size and mipi_dsi_dcs_get_power_mode helper
    
    Change-Id: Ia4d517ae4afcd61c429428fb4b0e4bb184800fff
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
index 7fb5967de4..649f74281a 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -218,6 +218,44 @@ ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state)
 	return connector->funcs->transfer(state, &msg);
 }
 
+int mipi_dsi_dcs_get_power_mode(struct display_state *state, u8 *mode)
+{
+	ssize_t err;
+
+	err = mipi_dsi_dcs_read(state, MIPI_DCS_GET_POWER_MODE, mode,
+				sizeof(*mode));
+	if (err <= 0) {
+		if (err == 0)
+			err = -ENODATA;
+
+		return err;
+	}
+
+	return 0;
+}
+
+int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
+					    u16 value)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	u8 tx[2] = { value & 0xff, value >> 8 };
+	struct mipi_dsi_msg msg = {
+		.channel = 0,
+		.type = MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
+		.tx_len = sizeof(tx),
+		.tx_buf = tx,
+	};
+
+	if (!connector)
+		return -ENODEV;
+
+	if (!connector->funcs || !connector->funcs->transfer)
+		return -ENOSYS;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
 static bool mipi_dsi_packet_format_is_short(u8 type)
 {
 	switch (type) {
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
index 0e1bb5af27..b3919a86a8 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.h
+++ b/drivers/video/drm/rockchip_mipi_dsi.h
@@ -7,6 +7,8 @@
 #ifndef __ROCKCHIP_MIPI_DSI_H__
 #define __ROCKCHIP_MIPI_DSI_H__
 
+#include <mipi_display.h>
+
 #define MSEC_PER_SEC	1000L
 #define USEC_PER_MSEC	1000L
 #define NSEC_PER_USEC	1000L
@@ -35,54 +37,6 @@
 	(cond) ? 0 : -ETIMEDOUT; \
 })
 
-/* MIPI DSI Processor-to-Peripheral transaction types */
-enum {
-	MIPI_DSI_V_SYNC_START				= 0x01,
-	MIPI_DSI_V_SYNC_END				= 0x11,
-	MIPI_DSI_H_SYNC_START				= 0x21,
-	MIPI_DSI_H_SYNC_END				= 0x31,
-
-	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
-	MIPI_DSI_COLOR_MODE_ON				= 0x12,
-	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
-	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,
-
-	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
-	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
-	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,
-
-	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
-	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
-	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,
-
-	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
-	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,
-
-	MIPI_DSI_DCS_READ				= 0x06,
-
-	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,
-
-	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,
-
-	MIPI_DSI_NULL_PACKET				= 0x09,
-	MIPI_DSI_BLANKING_PACKET			= 0x19,
-	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
-	MIPI_DSI_DCS_LONG_WRITE				= 0x39,
-
-	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,
-
-	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
-	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
-	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,
-
-	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
-	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
-	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
-	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
-};
-
 /* request ACK from peripheral */
 #define MIPI_DSI_MSG_REQ_ACK	BIT(0)
 /* use Low Power Mode to transmit message */
@@ -242,4 +196,7 @@ ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
 			      size_t num_params, void *data, size_t size);
 ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state);
 ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state);
+int mipi_dsi_set_maximum_return_packet_size(struct display_state *state,
+					    u16 value);
+int mipi_dsi_dcs_get_pixel_format(struct display_state *state, u8 *format);
 #endif /* __ROCKCHIP_MIPI_DSI__ */

commit 38f6fe906d5519a8210b9047fafacafb973b72c7
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:51:35 2018 +0800

    video/drm: dsi: support EoTp feature
    
    rk/kernel:develop-4.4:fca44d3e4ec0eea3a48bb51f218543616ef7cdb2
    
    Change-Id: Ie8b141963151fb269edb372cd06657476ed19a6d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 10c6c8d2cd..7a33dab5bd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -63,11 +63,11 @@
 #define DSI_DBI_CMDSIZE			0x28
 
 #define DSI_PCKHDL_CFG			0x2c
-#define EN_CRC_RX			BIT(4)
-#define EN_ECC_RX			BIT(3)
-#define EN_BTA				BIT(2)
-#define EN_EOTP_RX			BIT(1)
-#define EN_EOTP_TX			BIT(0)
+#define CRC_RX_EN			BIT(4)
+#define ECC_RX_EN			BIT(3)
+#define BTA_EN				BIT(2)
+#define EOTP_RX_EN			BIT(1)
+#define EOTP_TX_EN			BIT(0)
 
 #define DSI_MODE_CFG			0x34
 #define ENABLE_VIDEO_MODE		0
@@ -906,7 +906,12 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 
 static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
 {
-	dsi_write(dsi, DSI_PCKHDL_CFG, EN_CRC_RX | EN_ECC_RX | EN_BTA);
+	u32 val = CRC_RX_EN | ECC_RX_EN | BTA_EN | EOTP_TX_EN;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)
+		val &= ~EOTP_TX_EN;
+
+	dsi_write(dsi, DSI_PCKHDL_CFG, val);
 }
 
 static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,

commit 6fe39b66dfafa528fdbe57242ea7ac6d7736e49a
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:48:22 2018 +0800

    video/drm: dsi: Remove link skew for dual channel mode
    
    android/rk/u-boot:rkdevelop:daf3276d77cc5aa02d260028ef7c905fff0d593d
    
    Change-Id: Ib08953a3ab2be00a8a22c61d54a2f4bc96153448
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index b1080a0c35..10c6c8d2cd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -915,7 +915,7 @@ static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
 	int pkt_size;
 
 	if (dsi->slave || dsi->master)
-		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2 + 4);
+		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2);
 	else
 		pkt_size = VID_PKT_SIZE(mode->hdisplay);
 

commit 8bc2665b12dae581cee0f62a1abf349a98aefa90
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:47:18 2018 +0800

    video/drm: dsi: fix 3126c screen shows black bars on the side
    
    android/rk/u-boot:rkdevelop:b5403c01a46fc9f909d7409cf00a1688ae4b0764
    
    Change-Id: I39016d2f68c43c2878d666a010ffe94c2ff40cb0
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 885800cd97..b1080a0c35 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -265,16 +265,6 @@ enum {
 	BIASEXTR_127_7,
 };
 
-enum soc_type {
-	PX30,
-	RK3128,
-	RK3288,
-	RK3366,
-	RK3368,
-	RK3399,
-	RV1108,
-};
-
 #define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
 
 enum grf_reg_fields {
@@ -297,7 +287,6 @@ struct dw_mipi_dsi_plat_data {
 	const u32 *dsi0_grf_reg_fields;
 	const u32 *dsi1_grf_reg_fields;
 	unsigned long max_bit_rate_per_lane;
-	enum soc_type soc_type;
 };
 
 struct mipi_dphy {
@@ -908,9 +897,6 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 		val |= HSYNC_ACTIVE_LOW;
 
-	if (dsi->pdata->soc_type == RK3128)
-		val ^= VSYNC_ACTIVE_LOW;
-
 	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
 	dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
 	dsi_write(dsi, DSI_DPI_CFG_POL, val);
@@ -1269,7 +1255,6 @@ static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = px30_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = PX30,
 };
 
 static const struct rockchip_connector px30_mipi_dsi_driver_data = {
@@ -1288,7 +1273,6 @@ static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3128_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RK3128,
 };
 
 static const struct rockchip_connector rk3128_mipi_dsi_driver_data = {
@@ -1326,7 +1310,6 @@ static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3288_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3288_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
-	.soc_type = RK3288,
 };
 
 static const struct rockchip_connector rk3288_mipi_dsi_driver_data = {
@@ -1347,7 +1330,6 @@ static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3366_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RK3366,
 };
 
 static const struct rockchip_connector rk3366_mipi_dsi_driver_data = {
@@ -1367,7 +1349,6 @@ static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3368_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RK3368,
 };
 
 static const struct rockchip_connector rk3368_mipi_dsi_driver_data = {
@@ -1404,7 +1385,6 @@ static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3399_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3399_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
-	.soc_type = RK3399,
 };
 
 static const struct rockchip_connector rk3399_mipi_dsi_driver_data = {
@@ -1424,7 +1404,6 @@ static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
 static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rv1108_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
-	.soc_type = RV1108,
 };
 
 static const struct rockchip_connector rv1108_mipi_dsi_driver_data = {

commit 8d45754cae973d6484b3b9c64a6a783eae3c9603
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:44:14 2018 +0800

    video/drm: dsi: Add Turn On/Shutdown Peripheral command support
    
    android/rk/u-boot:rkdevelop:d3c5fcc01d20a1b4230bda3a16023d0ecbc9b442
    
    Change-Id: I3dfb222a1a9c52f17f5ab63fbdfdd58fe51e3385
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 01f4dbef90..885800cd97 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -75,11 +75,14 @@
 
 #define DSI_VID_MODE_CFG		0x38
 #define VPG_EN				BIT(16)
+#define LP_CMD_EN			BIT(15)
 #define FRAME_BTA_ACK			BIT(14)
 #define LP_HFP_EN			BIT(13)
 #define LP_HBP_EN			BIT(12)
-#define ENABLE_LOW_POWER		(0xf << 8)
-#define ENABLE_LOW_POWER_MASK		(0xf << 8)
+#define LP_VACT_EN			BIT(11)
+#define LP_VFP_EN			BIT(10)
+#define LP_VBP_EN			BIT(9)
+#define LP_VSA_EN			BIT(8)
 #define VID_MODE_TYPE_BURST_SYNC_PULSES	0x0
 #define VID_MODE_TYPE_BURST_SYNC_EVENTS	0x1
 #define VID_MODE_TYPE_BURST		0x2
@@ -401,6 +404,16 @@ static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 	rk_clrsetreg(dsi->grf + reg, GENMASK(msb, lsb), val << lsb);
 }
 
+static inline void dpishutdn_assert(struct dw_mipi_dsi *dsi)
+{
+	grf_field_write(dsi, DPISHUTDN, 1);
+}
+
+static inline void dpishutdn_deassert(struct dw_mipi_dsi *dsi)
+{
+	grf_field_write(dsi, DPISHUTDN, 0);
+}
+
 static int genif_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
@@ -680,6 +693,24 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	return 0;
 }
 
+static int dw_mipi_dsi_turn_on_peripheral(struct dw_mipi_dsi *dsi)
+{
+	dpishutdn_assert(dsi);
+	udelay(20);
+	dpishutdn_deassert(dsi);
+
+	return 0;
+}
+
+static int dw_mipi_dsi_shutdown_peripheral(struct dw_mipi_dsi *dsi)
+{
+	dpishutdn_deassert(dsi);
+	udelay(20);
+	dpishutdn_assert(dsi);
+
+	return 0;
+}
+
 static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 				    const struct mipi_dsi_msg *msg)
 {
@@ -687,6 +718,28 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 	int ret;
 	int val;
 
+	switch (msg->type) {
+	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
+		return dw_mipi_dsi_shutdown_peripheral(dsi);
+	case MIPI_DSI_TURN_ON_PERIPHERAL:
+		return dw_mipi_dsi_turn_on_peripheral(dsi);
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_DCS_READ:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+		break;
+	default:
+		return -EINVAL;
+	}
+
 	/* create a packet to the DSI protocol */
 	ret = mipi_dsi_create_packet(&packet, msg);
 	if (ret) {
@@ -765,9 +818,14 @@ static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
 
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
-	u32 val;
+	u32 val = LP_VACT_EN | LP_VFP_EN | LP_VBP_EN | LP_VSA_EN |
+		  LP_HFP_EN | LP_HBP_EN | LP_CMD_EN;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)
+		val &= ~LP_HFP_EN;
 
-	val = LP_HFP_EN | ENABLE_LOW_POWER;
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)
+		val &= ~LP_HBP_EN;
 
 	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
 		val |= VID_MODE_TYPE_BURST;
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
index e2bba46a34..7fb5967de4 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -176,6 +176,48 @@ ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
 	return connector->funcs->transfer(state, &msg);
 }
 
+ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg = {
+		.channel = 0,
+		.type = MIPI_DSI_SHUTDOWN_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+		.flags = MIPI_DSI_MSG_USE_LPM,
+	};
+
+	if (!connector)
+		return -ENODEV;
+
+	if (!connector->funcs || !connector->funcs->transfer)
+		return -ENOSYS;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg = {
+		.channel = 0,
+		.type = MIPI_DSI_TURN_ON_PERIPHERAL,
+		.tx_buf = (u8 [2]) { 0, 0 },
+		.tx_len = 2,
+		.flags = MIPI_DSI_MSG_USE_LPM,
+	};
+
+	if (!connector)
+		return -ENODEV;
+
+	if (!connector->funcs || !connector->funcs->transfer)
+		return -ENOSYS;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
 static bool mipi_dsi_packet_format_is_short(u8 type)
 {
 	switch (type) {
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
index 44a66618fe..0e1bb5af27 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.h
+++ b/drivers/video/drm/rockchip_mipi_dsi.h
@@ -240,4 +240,6 @@ ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
 			  size_t len);
 ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
 			      size_t num_params, void *data, size_t size);
+ssize_t mipi_dsi_shutdown_peripheral(struct display_state *state);
+ssize_t mipi_dsi_turn_on_peripheral(struct display_state *state);
 #endif /* __ROCKCHIP_MIPI_DSI__ */

commit 107a4a2199d8d56e121317cf595384477e23745e
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:31:33 2018 +0800

    video/drm: dsi: support transmit data in high speed
    
    android/rk/u-boot:rkdevelop:00e6449089cd9822bb9d7848bde32ce06dd7221d
    
    Change-Id: Iee4ab6e18a12240f12232f54a4b6bbd8cdfe614c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index a09fda16c3..01f4dbef90 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -619,9 +619,9 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
+static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi)
 {
-	if (flags & MIPI_DSI_MSG_USE_LPM) {
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM) {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
 		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
 	} else {
@@ -694,7 +694,7 @@ static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
 		return ret;
 	}
 
-	dw_mipi_dsi_set_transfer_mode(dsi, msg->flags);
+	dw_mipi_dsi_set_transfer_mode(dsi);
 
 	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {

commit e6277b64d5ac844daa457122940957cddbc7d578
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 15:29:42 2018 +0800

    video/drm: dsi: fix vendor specific prefix
    
    android/rk/u-boot:rkdevelop:c7f74cf00c70be54432a355413c021d246e4576c
    
    Change-Id: I42f44af382e4f556c13dacb8e7820499e50f6bbb
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index f97062ddf9..a09fda16c3 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -401,7 +401,7 @@ static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 	rk_clrsetreg(dsi->grf + reg, GENMASK(msb, lsb), val << lsb);
 }
 
-static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
+static int genif_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
 	int ret;
@@ -417,7 +417,7 @@ static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static int rockchip_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
+static int genif_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
 	int ret;
@@ -433,7 +433,7 @@ static int rockchip_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
-static int rockchip_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
+static int genif_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
 	u32 mask;
@@ -472,9 +472,38 @@ static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
 	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
 }
 
+static int mipi_dphy_power_on(struct dw_mipi_dsi *dsi)
+{
+	u32 val;
+	int ret;
+
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
+		  PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
+	mdelay(2);
+
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
+				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		dev_err(dsi->dev, "PHY is not locked\n");
+		return ret;
+	}
+
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
+				 val, val & STOP_STATE_CLK_LANE, 1000,
+				 PHY_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		dev_err(dsi->dev, "lane module is not in stop state\n");
+		return ret;
+	}
+
+	udelay(10);
+
+	return 0;
+}
+
 static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 {
-	int ret, testdin, vco, val;
+	int testdin, vco, val;
 
 	vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
 
@@ -485,19 +514,14 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 		return testdin;
 	}
 
-	dsi_write(dsi, DSI_PWR_UP, POWERUP);
-
 	dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
 					 VCO_RANGE_CON_SEL(vco) |
 					 VCO_IN_CAP_CON_LOW |
 					 REF_BIAS_CUR_SEL);
-
 	dw_mipi_dsi_phy_write(dsi, 0x11, CP_CURRENT_3MA);
 	dw_mipi_dsi_phy_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
 					 LPF_RESISTORS_20_KOHM);
-
 	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
-
 	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
 	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
 	dw_mipi_dsi_phy_write(dsi, 0x18, val);
@@ -505,45 +529,25 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
 	dw_mipi_dsi_phy_write(dsi, 0x18, val);
 	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-
 	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
 					 BIAS_BLOCK_ON | BANDGAP_ON);
-
 	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
 					 SETRD_MAX | TER_RESISTORS_ON);
 	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
 					 SETRD_MAX | POWER_MANAGE |
 					 TER_RESISTORS_ON);
-
 	dw_mipi_dsi_phy_write(dsi, 0x22, LOW_PROGRAM_EN |
 					 BIASEXTR_SEL(BIASEXTR_127_7));
 	dw_mipi_dsi_phy_write(dsi, 0x22, HIGH_PROGRAM_EN |
 					 BANDGAP_SEL(BANDGAP_96_10));
-
 	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
 	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
 	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
 
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
-				     PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
-
-	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
-	if (ret < 0) {
-		printf("failed to wait for phy lock state %p\n", dsi->base);
-		return ret;
-	}
-
-	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
-				 val, val & STOP_STATE_CLK_LANE, 1000,
-				 PHY_STATUS_TIMEOUT_US);
-	if (ret < 0)
-		printf("failed to wait for phy clk lane stop state\n");
-
-	return ret;
+	return 0;
 }
 
-static unsigned long rockchip_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
+static unsigned long dw_mipi_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
 {
 	int bpp;
 	unsigned long mpclk, tmp;
@@ -591,7 +595,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	if (dsi->master)
 		return 0;
 
-	target_mbps = rockchip_dsi_calc_bandwidth(dsi);
+	target_mbps = dw_mipi_dsi_calc_bandwidth(dsi);
 
 	/* ref clk : 24MHz*/
 	pllref = 24;
@@ -611,16 +615,11 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 	dsi->lane_mbps = pllref / n * m;
 	dsi->dphy.input_div = n;
 	dsi->dphy.feedback_div = m;
-	if (dsi->slave) {
-		dsi->slave->lane_mbps = dsi->lane_mbps;
-		dsi->slave->dphy.input_div = n;
-		dsi->slave->dphy.feedback_div = m;
-	}
 
 	return 0;
 }
 
-static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
+static void dw_mipi_dsi_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 {
 	if (flags & MIPI_DSI_MSG_USE_LPM) {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
@@ -681,8 +680,8 @@ static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
 	return 0;
 }
 
-static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
-					const struct mipi_dsi_msg *msg)
+static ssize_t dw_mipi_dsi_transfer(struct dw_mipi_dsi *dsi,
+				    const struct mipi_dsi_msg *msg)
 {
 	struct mipi_dsi_packet packet;
 	int ret;
@@ -695,7 +694,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 		return ret;
 	}
 
-	rockchip_set_transfer_mode(dsi, msg->flags);
+	dw_mipi_dsi_set_transfer_mode(dsi, msg->flags);
 
 	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {
@@ -708,7 +707,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 		 * making it possible to use FIFO sizes smaller than
 		 * the amount of data of the longest packet to be written.
 		 */
-		ret = rockchip_wait_w_pld_fifo_not_full(dsi);
+		ret = genif_wait_w_pld_fifo_not_full(dsi);
 		if (ret)
 			return ret;
 
@@ -726,7 +725,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 		}
 	}
 
-	ret = rockchip_wait_cmd_fifo_not_full(dsi);
+	ret = genif_wait_cmd_fifo_not_full(dsi);
 	if (ret)
 		return ret;
 
@@ -734,7 +733,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	val = get_unaligned_le32(packet.header);
 	dsi_write(dsi, DSI_GEN_HDR, val);
 
-	ret = rockchip_wait_write_fifo_empty(dsi);
+	ret = genif_wait_write_fifo_empty(dsi);
 	if (ret)
 		return ret;
 
@@ -745,7 +744,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	}
 
 	if (dsi->slave) {
-		ret = rockchip_dsi_send_packet(dsi->slave, msg);
+		ret = dw_mipi_dsi_transfer(dsi->slave, msg);
 		if (ret) {
 			printf("failed to send command through dsi slave, ret = %d\n", ret);
 			return ret;
@@ -755,13 +754,13 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	return msg->rx_len ? msg->rx_len : msg->tx_len;
 }
 
-static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
-					     const struct mipi_dsi_msg *msg)
+static ssize_t dw_mipi_dsi_connector_transfer(struct display_state *state,
+					      const struct mipi_dsi_msg *msg)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	return rockchip_dsi_send_packet(dsi, msg);
+	return dw_mipi_dsi_transfer(dsi, msg);
 }
 
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
@@ -793,16 +792,20 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
 	}
 }
 
+static void dw_mipi_dsi_enable(struct dw_mipi_dsi *dsi)
+{
+	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
+
+	if (dsi->slave)
+		dw_mipi_dsi_enable(dsi->slave);
+}
+
 static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 {
 	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
-
-	/* host */
 	dsi_write(dsi, DSI_LPCLK_CTRL, 0);
 	dsi_write(dsi, DSI_PWR_UP, RESET);
-
-	/* phy */
-	dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ);
+	dsi_write(dsi, DSI_PHY_RSTZ, 0);
 
 	if (dsi->slave)
 		dw_mipi_dsi_disable(dsi->slave);
@@ -955,7 +958,7 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
-static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
+static int dw_mipi_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 {
 	int phandle;
 	struct device_node *np;
@@ -1000,7 +1003,7 @@ static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_init(struct display_state *state)
+static int dw_mipi_dsi_connector_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
@@ -1056,7 +1059,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	FDT_GET_INT(dsi->mode_flags, "dsi,flags");
 	FDT_GET_INT(dsi->channel, "reg");
 
-	ret = rockchip_dsi_dual_channel_probe(dsi);
+	ret = dw_mipi_dsi_dual_channel_probe(dsi);
 	if (ret)
 		return ret;
 
@@ -1067,26 +1070,12 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	return 0;
 }
 
-static void rockchip_dw_mipi_dsi_deinit(struct display_state *state)
+static void dw_mipi_dsi_pre_init(struct dw_mipi_dsi *dsi)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
-
-	if (dsi->slave)
-		free(dsi->slave);
-	free(dsi);
-}
-
-static void rockchip_dw_dsi_pre_init(struct display_state *state,
-				     struct dw_mipi_dsi *dsi)
-{
-	struct connector_state *conn_state = &state->conn_state;
 	unsigned long bw, rate;
 
-	dsi->mode = &conn_state->mode;
-
 	if (dsi->dphy.phy) {
-		bw = rockchip_dsi_calc_bandwidth(dsi);
+		bw = dw_mipi_dsi_calc_bandwidth(dsi);
 		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
 		dsi->lane_mbps = rate / USEC_PER_SEC;
 		rockchip_phy_power_on(dsi->dphy.phy);
@@ -1094,14 +1083,18 @@ static void rockchip_dw_dsi_pre_init(struct display_state *state,
 		dw_mipi_dsi_get_lane_bps(dsi);
 	}
 
+	if (dsi->slave) {
+		dsi->slave->mode = dsi->mode;
+		dsi->slave->lane_mbps = dsi->lane_mbps;
+		dsi->slave->dphy.input_div = dsi->dphy.input_div;
+		dsi->slave->dphy.feedback_div = dsi->dphy.feedback_div;
+	}
+
 	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
 	       dsi->lane_mbps, dsi->lanes);
-
-	if (dsi->slave)
-		rockchip_dw_dsi_pre_init(state, dsi->slave);
 }
 
-static void rockchip_dw_dsi_host_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_host_init(struct dw_mipi_dsi *dsi)
 {
 	dw_mipi_dsi_init(dsi);
 	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
@@ -1142,6 +1135,9 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 	grf_field_write(dsi, FORCERXMODE, 0);
 	udelay(1);
 
+	if (!dsi->dphy.phy)
+		dw_mipi_dsi_phy_init(dsi);
+
 	/* Enable Data Lane Module */
 	grf_field_write(dsi, ENABLE_N, map[dsi->lanes - 1]);
 
@@ -1149,67 +1145,58 @@ static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
 	grf_field_write(dsi, ENABLECLK, 1);
 }
 
-static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
+static void dw_mipi_dsi_pre_enable(struct dw_mipi_dsi *dsi)
 {
-	rockchip_dw_dsi_host_init(dsi);
-
-	mdelay(10);
+	dw_mipi_dsi_host_init(dsi);
 	mipi_dphy_init(dsi);
-	dw_mipi_dsi_phy_init(dsi);
+	mipi_dphy_power_on(dsi);
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
 
 	if (dsi->slave)
-		rockchip_dw_dsi_controller_init(dsi->slave);
+		dw_mipi_dsi_pre_enable(dsi->slave);
 }
 
-static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
+static int dw_mipi_dsi_connector_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
-
-	rockchip_dw_dsi_pre_init(state, dsi);
+	dsi->mode = &conn_state->mode;
 
-	rockchip_dw_dsi_controller_init(dsi);
+	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
+	dw_mipi_dsi_pre_init(dsi);
+	dw_mipi_dsi_pre_enable(dsi);
 
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+static int dw_mipi_dsi_connector_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
-	if (dsi->slave)
-		dw_mipi_dsi_set_mode(dsi->slave, DSI_VIDEO_MODE);
+	dw_mipi_dsi_enable(dsi);
 
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
+static int dw_mipi_dsi_connector_disable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	/*
-	 * This is necessary to make sure the peripheral will be driven
-	 * normally when the display is enabled again later.
-	 */
-	mdelay(120);
-
 	dw_mipi_dsi_disable(dsi);
+
 	return 0;
 }
 
-static const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
-	.init = rockchip_dw_mipi_dsi_init,
-	.deinit = rockchip_dw_mipi_dsi_deinit,
-	.prepare = rockchip_dw_mipi_dsi_prepare,
-	.enable = rockchip_dw_mipi_dsi_enable,
-	.disable = rockchip_dw_mipi_dsi_disable,
-	.transfer = rockchip_dw_mipi_dsi_transfer,
+static const struct rockchip_connector_funcs dw_mipi_dsi_connector_funcs = {
+	.init = dw_mipi_dsi_connector_init,
+	.prepare = dw_mipi_dsi_connector_prepare,
+	.enable = dw_mipi_dsi_connector_enable,
+	.disable = dw_mipi_dsi_connector_disable,
+	.transfer = dw_mipi_dsi_connector_transfer,
 };
 
 static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1221,15 +1208,15 @@ static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[VOPSEL]		= GRF_REG_FIELD(0x0438,  0,  0),
 };
 
-static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = px30_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = PX30,
 };
 
-static const struct rockchip_connector px30_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &px30_mipi_dsi_drv_data,
+static const struct rockchip_connector px30_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &px30_mipi_dsi_plat_data,
 };
 
 static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1240,15 +1227,15 @@ static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[DPISHUTDN]		= GRF_REG_FIELD(0x0150,  4,  4),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3128_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RK3128,
 };
 
-static const struct rockchip_connector rk3128_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3128_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3128_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3128_mipi_dsi_plat_data,
 };
 
 static const u32 rk3288_dsi0_grf_reg_fields[MAX_FIELDS] = {
@@ -1277,16 +1264,16 @@ static const u32 rk3288_dsi1_grf_reg_fields[MAX_FIELDS] = {
 	[DPIUPDATECFG]		= GRF_REG_FIELD(0x03a8,  1,  1),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3288_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3288_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
 	.soc_type = RK3288,
 };
 
-static const struct rockchip_connector rk3288_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3288_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3288_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3288_mipi_dsi_plat_data,
 };
 
 static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1299,15 +1286,15 @@ static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  5,  5),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3366_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RK3366,
 };
 
-static const struct rockchip_connector rk3366_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3366_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3366_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3366_mipi_dsi_plat_data,
 };
 
 static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1319,15 +1306,15 @@ static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[TURNDISABLE]		= GRF_REG_FIELD(0x041c,  5,  5),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3368_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RK3368,
 };
 
-static const struct rockchip_connector rk3368_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3368_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3368_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3368_mipi_dsi_plat_data,
 };
 
 static const u32 rk3399_dsi0_grf_reg_fields[MAX_FIELDS] = {
@@ -1355,16 +1342,16 @@ static const u32 rk3399_dsi1_grf_reg_fields[MAX_FIELDS] = {
 	[TURNREQUEST]		= GRF_REG_FIELD(0x6260,  0,  3),
 };
 
-static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rk3399_dsi0_grf_reg_fields,
 	.dsi1_grf_reg_fields = rk3399_dsi1_grf_reg_fields,
 	.max_bit_rate_per_lane = 1500000000UL,
 	.soc_type = RK3399,
 };
 
-static const struct rockchip_connector rk3399_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3399_mipi_dsi_drv_data,
+static const struct rockchip_connector rk3399_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rk3399_mipi_dsi_plat_data,
 };
 
 static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
@@ -1376,51 +1363,58 @@ static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  4,  4),
 };
 
-static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_drv_data = {
+static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_plat_data = {
 	.dsi0_grf_reg_fields = rv1108_dsi_grf_reg_fields,
 	.max_bit_rate_per_lane = 1000000000UL,
 	.soc_type = RV1108,
 };
 
-static const struct rockchip_connector rv1108_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rv1108_mipi_dsi_drv_data,
+static const struct rockchip_connector rv1108_mipi_dsi_driver_data = {
+	 .funcs = &dw_mipi_dsi_connector_funcs,
+	 .data = &rv1108_mipi_dsi_plat_data,
 };
 
-static const struct udevice_id rockchip_mipi_dsi_ids[] = {
+static const struct udevice_id dw_mipi_dsi_ids[] = {
 	{
 		.compatible = "rockchip,px30-mipi-dsi",
-		.data = (ulong)&px30_mipi_dsi_data,
+		.data = (ulong)&px30_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3128-mipi-dsi",
-		.data = (ulong)&rk3128_mipi_dsi_data,
+		.data = (ulong)&rk3128_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3288-mipi-dsi",
-		.data = (ulong)&rk3288_mipi_dsi_data,
+		.data = (ulong)&rk3288_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3366-mipi-dsi",
-		.data = (ulong)&rk3366_mipi_dsi_data,
+		.data = (ulong)&rk3366_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3368-mipi-dsi",
-		.data = (ulong)&rk3368_mipi_dsi_data,
+		.data = (ulong)&rk3368_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rk3399-mipi-dsi",
-		.data = (ulong)&rk3399_mipi_dsi_data,
+		.data = (ulong)&rk3399_mipi_dsi_driver_data,
 	},
 	{
 		.compatible = "rockchip,rv1108-mipi-dsi",
-		.data = (ulong)&rv1108_mipi_dsi_data,
+		.data = (ulong)&rv1108_mipi_dsi_driver_data,
 	},
 	{}
 };
 
-U_BOOT_DRIVER(rockchip_mipi_dsi) = {
-	.name = "rockchip_mipi_dsi",
+static int dw_mipi_dsi_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+U_BOOT_DRIVER(dw_mipi_dsi) = {
+	.name = "dw_mipi_dsi",
 	.id = UCLASS_DISPLAY,
-	.of_match = rockchip_mipi_dsi_ids,
+	.of_match = dw_mipi_dsi_ids,
+	.probe = dw_mipi_dsi_probe,
+	.priv_auto_alloc_size = sizeof(struct dw_mipi_dsi),
 };

commit 15081c50589d283729be0591b79f327d95270cc0
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 14:21:09 2018 +0800

    video/drm: Refactor phy code
    
    Change-Id: Id56d83b954eacf47228278562fb5d94409020517
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 152f0377b2..c95614367f 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -2463,11 +2463,12 @@ int inno_dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data)
 		bus_width = color_depth;
 	else
 		bus_width = 8;
-	rockchip_phy_set_bus_width(state, bus_width);
-	rockchip_phy_set_pll(state, conn_state->mode.crtc_clock * 1000);
+	rockchip_phy_set_bus_width(conn_state->phy, bus_width);
+	rockchip_phy_set_pll(conn_state->phy,
+			     conn_state->mode.crtc_clock * 1000);
 	if (hdmi->edid_data.display_info.hdmi.scdc.supported)
 		rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi);
-	rockchip_phy_power_on(state);
+	rockchip_phy_power_on(conn_state->phy);
 
 	return 0;
 }
@@ -2497,6 +2498,7 @@ inno_dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data)
 void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data)
 {
 	struct display_state *state = (struct display_state *)data;
+	struct connector_state *conn_state = &state->conn_state;
 	struct hdmi_edid_data *edid_data = &hdmi->edid_data;
 	unsigned long rate;
 	int i, ret;
@@ -2511,7 +2513,7 @@ void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data)
 			rate = mode_buf[i].clock * 1000;
 
 		/* Check whether mode is out of phy cfg range. */
-		ret = rockchip_phy_round_rate(state, rate);
+		ret = rockchip_phy_round_rate(conn_state->phy, rate);
 
 		if (ret < 0)
 			edid_data->mode_buf[i].invalid = true;
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 103c3ad9b8..f97062ddf9 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -299,7 +299,7 @@ struct dw_mipi_dsi_plat_data {
 
 struct mipi_dphy {
 	/* Non-SNPS PHY */
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 
 	u16 input_div;
 	u16 feedback_div;
@@ -1032,6 +1032,8 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	dsi->id = id;
 	dsi->blob = state->blob;
 	dsi->node = mipi_node;
+	dsi->dphy.phy = conn_state->phy;
+
 	conn_state->private = dsi;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
@@ -1083,11 +1085,11 @@ static void rockchip_dw_dsi_pre_init(struct display_state *state,
 
 	dsi->mode = &conn_state->mode;
 
-	if (conn_state->phy) {
+	if (dsi->dphy.phy) {
 		bw = rockchip_dsi_calc_bandwidth(dsi);
-		rate = rockchip_phy_set_pll(state, bw * USEC_PER_SEC);
+		rate = rockchip_phy_set_pll(dsi->dphy.phy, bw * USEC_PER_SEC);
 		dsi->lane_mbps = rate / USEC_PER_SEC;
-		rockchip_phy_power_on(state);
+		rockchip_phy_power_on(dsi->dphy.phy);
 	} else {
 		dw_mipi_dsi_get_lane_bps(dsi);
 	}
diff --git a/drivers/video/drm/rockchip-inno-hdmi-phy.c b/drivers/video/drm/rockchip-inno-hdmi-phy.c
index 99d1c922ab..783280083d 100644
--- a/drivers/video/drm/rockchip-inno-hdmi-phy.c
+++ b/drivers/video/drm/rockchip-inno-hdmi-phy.c
@@ -157,7 +157,7 @@ struct phy_config {
 };
 
 struct inno_hdmi_phy {
-	const void *blob;
+	struct udevice *dev;
 	ofnode node;
 	void *regs;
 
@@ -397,10 +397,9 @@ static u8 rk_get_cpu_version(void)
 	return val;
 }
 
-static int inno_hdmi_phy_power_on(struct display_state *state)
+static int inno_hdmi_phy_power_on(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 	const struct post_pll_config *cfg = post_pll_cfg_table;
 	const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table;
 	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno->pixclock);
@@ -444,10 +443,9 @@ static int inno_hdmi_phy_power_on(struct display_state *state)
 		return -EINVAL;
 }
 
-static int inno_hdmi_phy_power_off(struct display_state *state)
+static int inno_hdmi_phy_power_off(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 
 	if (inno->plat_data->ops->power_off)
 		inno->plat_data->ops->power_off(inno);
@@ -456,10 +454,8 @@ static int inno_hdmi_phy_power_off(struct display_state *state)
 	return 0;
 }
 
-static int inno_hdmi_phy_clk_is_prepared(struct display_state *state)
+static int inno_hdmi_phy_clk_is_prepared(struct inno_hdmi_phy *inno)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
 	u8 status;
 
 	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
@@ -470,11 +466,8 @@ static int inno_hdmi_phy_clk_is_prepared(struct display_state *state)
 	return status ? 0 : 1;
 }
 
-static int inno_hdmi_phy_clk_prepare(struct display_state *state)
+static int inno_hdmi_phy_clk_prepare(struct inno_hdmi_phy *inno)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
-
 	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
 		inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK,
 				 PRE_PLL_POWER_UP);
@@ -484,11 +477,9 @@ static int inno_hdmi_phy_clk_prepare(struct display_state *state)
 	return 0;
 }
 
-static int inno_hdmi_phy_clk_set_rate(struct display_state *state,
+static int inno_hdmi_phy_clk_set_rate(struct inno_hdmi_phy *inno,
 				      unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
 	const struct pre_pll_config *cfg = pre_pll_cfg_table;
 	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
 
@@ -937,30 +928,21 @@ static const struct rockchip_inno_data inno_hdmi_phy_of_match[] = {
 	{}
 };
 
-static int inno_hdmi_phy_init(struct display_state *state)
+static int inno_hdmi_phy_init(struct rockchip_phy *phy)
 {
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct udevice *dev = conn_state->phy_dev;
-	ofnode phy_node = conn_state->phy_node;
-	struct inno_hdmi_phy *inno;
+	struct udevice *dev = phy->dev;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 	int i, val, phy_table_size, ret;
 	const char *name;
 	u32 *phy_config;
 
-	inno = malloc(sizeof(*inno));
-	if (!inno)
-		return -ENOMEM;
-
-	inno->blob = blob;
-	inno->node = phy_node;
+	inno->node = dev->node;
 
 	inno->regs = dev_read_addr_ptr(dev);
 	if (!inno->regs) {
 		printf("%s: failed to get phy address\n", __func__);
 		return -ENOMEM;
 	}
-	conn_state->phy_private = inno;
 
 	name = dev_read_string(dev, "compatible");
 	for (i = 0; i < ARRAY_SIZE(inno_hdmi_phy_of_match); i++) {
@@ -1018,31 +1000,33 @@ static int inno_hdmi_phy_init(struct display_state *state)
 	return 0;
 }
 
-static unsigned long inno_hdmi_phy_set_pll(struct display_state *state,
+static unsigned long inno_hdmi_phy_set_pll(struct rockchip_phy *phy,
 					   unsigned long rate)
 {
-	inno_hdmi_phy_clk_prepare(state);
-	inno_hdmi_phy_clk_is_prepared(state);
-	inno_hdmi_phy_clk_set_rate(state, rate);
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+
+	inno_hdmi_phy_clk_prepare(inno);
+	inno_hdmi_phy_clk_is_prepared(inno);
+	inno_hdmi_phy_clk_set_rate(inno, rate);
 	return 0;
 }
 
-static void
-inno_hdmi_phy_set_bus_width(struct display_state *state, u32 bus_width)
+static int
+inno_hdmi_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 
 	inno->bus_width = bus_width;
+
+	return 0;
 }
 
 static long
-inno_hdmi_phy_clk_round_rate(struct display_state *state, unsigned long rate)
+inno_hdmi_phy_clk_round_rate(struct rockchip_phy *phy, unsigned long rate)
 {
+	struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
 	int i;
 	const struct pre_pll_config *cfg = pre_pll_cfg_table;
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_hdmi_phy *inno = conn_state->phy_private;
 	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
 
 	for (; cfg->pixclock != ~0UL; cfg++)
@@ -1085,3 +1069,39 @@ const struct rockchip_phy_funcs inno_hdmi_phy_funcs = {
 	.set_bus_width = inno_hdmi_phy_set_bus_width,
 	.round_rate = inno_hdmi_phy_clk_round_rate,
 };
+
+static struct rockchip_phy inno_hdmi_phy_driver_data = {
+	 .funcs = &inno_hdmi_phy_funcs,
+};
+
+static const struct udevice_id inno_hdmi_phy_ids[] = {
+	{
+	 .compatible = "rockchip,rk3328-hdmi-phy",
+	 .data = (ulong)&inno_hdmi_phy_driver_data,
+	},
+	{
+	 .compatible = "rockchip,rk3228-hdmi-phy",
+	 .data = (ulong)&inno_hdmi_phy_driver_data,
+	},
+	{}
+};
+
+static int inno_hdmi_phy_probe(struct udevice *dev)
+{
+	struct inno_hdmi_phy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+
+	inno->dev = dev;
+	phy->dev = dev;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(inno_hdmi_phy) = {
+	.name = "inno_hdmi_phy",
+	.id = UCLASS_PHY,
+	.of_match = inno_hdmi_phy_ids,
+	.probe = inno_hdmi_phy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_hdmi_phy),
+};
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 78ea041ef7..267770387e 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -12,6 +12,10 @@
 #include <asm/io.h>
 #include <linux/list.h>
 #include <div64.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -127,13 +131,10 @@ struct inno_mipi_dphy_timing {
 };
 
 struct inno_mipi_dphy {
-	const void *blob;
-	ofnode node;
+	struct udevice *dev;
 	void __iomem *regs;
-
 	unsigned int lane_mbps;
 	int lanes;
-	int bpp;
 };
 
 static const u32 lane_reg_offset[] = {
@@ -488,10 +489,9 @@ static inline void inno_mipi_dphy_bgpd_disable(struct inno_mipi_dphy *inno)
 	inno_update_bits(inno, INNO_PHY_LVDS_CTRL, LVDS_BGPD, LVDS_BGPD);
 }
 
-static int inno_mipi_dphy_power_on(struct display_state *state)
+static int inno_mipi_dphy_power_on(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 
 	inno_mipi_dphy_bgpd_enable(inno);
 	inno_mipi_dphy_da_pwrok_enable(inno);
@@ -509,10 +509,9 @@ static inline void inno_mipi_dphy_lane_disable(struct inno_mipi_dphy *inno)
 	inno_update_bits(inno, INNO_PHY_LANE_CTRL, 0x7c, 0x00);
 }
 
-static int inno_mipi_dphy_power_off(struct display_state *state)
+static int inno_mipi_dphy_power_off(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 
 	inno_mipi_dphy_lane_disable(inno);
 	inno_mipi_dphy_pll_ldo_disable(inno);
@@ -522,11 +521,10 @@ static int inno_mipi_dphy_power_off(struct display_state *state)
 	return 0;
 }
 
-static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
+static unsigned long inno_mipi_dphy_set_pll(struct rockchip_phy *phy,
 					    unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 	unsigned long fin, fout;
 	u16 fbdiv = 0;
 	u8 prediv = 0;
@@ -551,55 +549,82 @@ static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
 	return fout;
 }
 
-static int inno_mipi_dphy_parse_dt(ofnode panel_node, struct inno_mipi_dphy *inno)
+static int inno_mipi_dphy_parse_dt(struct inno_mipi_dphy *inno)
 {
-	int format;
-
-	inno->lanes = ofnode_read_s32_default(panel_node, "dsi,lanes", -1);
-	if (inno->lanes < 0)
-		inno->lanes = 4;
+	struct udevice *dev = inno->dev;
 
-	format = ofnode_read_s32_default(panel_node, "dsi,format", -1);
-	inno->bpp = mipi_dsi_pixel_format_to_bpp(format);
-	if (inno->bpp < 0)
-		inno->bpp = 24;
+	inno->lanes = ofnode_read_u32_default(dev->node, "inno,lanes", 4);
 
 	return 0;
 }
 
-static int inno_mipi_dphy_init(struct display_state *state)
+static int inno_mipi_dphy_init(struct rockchip_phy *phy)
 {
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode node = conn_state->phy_node;
-	ofnode panel_node = panel_state->node;
-	struct inno_mipi_dphy *inno;
+	struct inno_mipi_dphy *inno = dev_get_priv(phy->dev);
 	int ret;
 
-	inno = malloc(sizeof(*inno));
-	if (!inno)
-		return -ENOMEM;
-
-	inno->blob = blob;
-	inno->node = node;
-
-	ret = inno_mipi_dphy_parse_dt(panel_node, inno);
+	ret = inno_mipi_dphy_parse_dt(inno);
 	if (ret) {
 		printf("%s: failed to parse DT\n", __func__);
 		return ret;
 	}
 
-	inno->regs = (void __iomem *)ofnode_get_addr(node);
-
-	conn_state->phy_private = inno;
+	inno->regs = dev_read_addr_ptr(inno->dev);
 
 	return 0;
 }
 
-const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
+static const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
 	.init = inno_mipi_dphy_init,
 	.power_on = inno_mipi_dphy_power_on,
 	.power_off = inno_mipi_dphy_power_off,
 	.set_pll = inno_mipi_dphy_set_pll,
 };
+
+static struct rockchip_phy inno_mipi_dphy_driver_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
+
+static const struct udevice_id inno_mipi_dphy_ids[] = {
+	{
+		.compatible = "rockchip,px30-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3128-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3366-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{
+		.compatible = "rockchip,rv1108-mipi-dphy",
+		.data = (ulong)&inno_mipi_dphy_driver_data,
+	},
+	{}
+};
+
+static int inno_mipi_dphy_probe(struct udevice *dev)
+{
+	struct inno_mipi_dphy *inno = dev_get_priv(dev);
+	struct rockchip_phy *phy =
+		(struct rockchip_phy *)dev_get_driver_data(dev);
+
+	inno->dev = dev;
+	phy->dev = dev;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(inno_mipi_dphy) = {
+	.name = "inno_mipi_dphy",
+	.id = UCLASS_PHY,
+	.of_match = inno_mipi_dphy_ids,
+	.probe = inno_mipi_dphy_probe,
+	.priv_auto_alloc_size = sizeof(struct inno_mipi_dphy),
+};
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index dff5c6c7c9..85c92e2e01 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -61,7 +61,6 @@ enum public_use_phy {
 
 /* save public phy data */
 struct public_phy_data {
-	void *private_date;
 	const struct rockchip_phy *phy_drv;
 	int phy_node;
 	int public_phy_type;
@@ -91,18 +90,18 @@ static int get_public_phy(struct display_state *state,
 			  struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 	struct udevice *dev;
 	int ret = 0;
 
 	switch (data->public_phy_type) {
 	case INNO_HDMI_PHY:
 #if defined(CONFIG_ROCKCHIP_RK3328)
-		ret = uclass_find_device_by_name(UCLASS_PHY,
-						 "hdmiphy@ff430000", &dev);
+		ret = uclass_get_device_by_name(UCLASS_PHY,
+						"hdmiphy@ff430000", &dev);
 #elif defined(CONFIG_ROCKCHIP_RK322X)
-		ret = uclass_find_device_by_name(UCLASS_PHY,
-						 "hdmi-phy@12030000", &dev);
+		ret = uclass_get_device_by_name(UCLASS_PHY,
+						"hdmi-phy@12030000", &dev);
 #else
 		ret = -EINVAL;
 #endif
@@ -111,7 +110,7 @@ static int get_public_phy(struct display_state *state,
 			return 0;
 		}
 
-		phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
+		phy = (struct rockchip_phy *)dev_get_driver_data(dev);
 		if (!phy) {
 			printf("failed to get phy driver\n");
 			return 0;
@@ -119,16 +118,16 @@ static int get_public_phy(struct display_state *state,
 
 		conn_state->phy_dev = dev;
 		conn_state->phy_node = dev->node;
-		if (!phy->funcs || !phy->funcs->init ||
-		    phy->funcs->init(state)) {
+
+		ret = rockchip_phy_init(phy);
+		if (ret) {
 			printf("failed to init phy driver\n");
-			return -EINVAL;
+			return ret;
 		}
 		conn_state->phy = phy;
 
 		printf("inno hdmi phy init success, save it\n");
 		data->phy_node = ofnode_to_offset(conn_state->phy_node);
-		data->private_date = conn_state->phy_private;
 		data->phy_drv = conn_state->phy;
 		data->phy_init = true;
 		return 0;
@@ -232,7 +231,7 @@ static int connector_phy_init(struct display_state *state,
 			      struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 	struct udevice *dev;
 	int ret, type;
 
@@ -253,8 +252,7 @@ static int connector_phy_init(struct display_state *state,
 
 		/* if this phy has been initialized, get it directly */
 		conn_state->phy_node = offset_to_ofnode(data->phy_node);
-		conn_state->phy_private = data->private_date;
-		conn_state->phy = data->phy_drv;
+		conn_state->phy = (struct rockchip_phy *)data->phy_drv;
 		return 0;
 	}
 
@@ -269,7 +267,7 @@ static int connector_phy_init(struct display_state *state,
 		return 0;
 	}
 
-	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
+	phy = (struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
 		printf("failed to find phy driver\n");
 		return 0;
@@ -278,12 +276,14 @@ static int connector_phy_init(struct display_state *state,
 	conn_state->phy_dev = dev;
 	conn_state->phy_node = dev->node;
 
-	if (!phy->funcs || !phy->funcs->init ||
-	    phy->funcs->init(state)) {
+	ret = rockchip_phy_init(phy);
+	if (ret) {
 		printf("failed to init phy driver\n");
-		return -EINVAL;
+		return ret;
 	}
+
 	conn_state->phy = phy;
+
 	return 0;
 }
 
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index ce8f45169c..d30eb50c4b 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -106,12 +106,11 @@ struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
 	struct udevice *phy_dev;
-	const struct rockchip_phy *phy;
+	struct rockchip_phy *phy;
 	ofnode node;
 	ofnode phy_node;
 
 	void *private;
-	void *phy_private;
 
 	struct drm_display_mode mode;
 	struct overscan overscan;
diff --git a/drivers/video/drm/rockchip_drm_tve.c b/drivers/video/drm/rockchip_drm_tve.c
index 79fd98fa11..91748be98b 100644
--- a/drivers/video/drm/rockchip_drm_tve.c
+++ b/drivers/video/drm/rockchip_drm_tve.c
@@ -403,7 +403,7 @@ static int rockchip_drm_tve_enable(struct display_state *state)
 
 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
 	/* set inno hdmi phy clk. */
-	rockchip_phy_set_pll(state, 27000000);
+	rockchip_phy_set_pll(conn_state->phy, 27000000);
 #endif
 	if (mode->vdisplay == 576)
 		tve_type = TVOUT_CVBS_PAL;
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 960d561c70..9609f8c2ac 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -4,149 +4,72 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <config.h>
 #include <common.h>
-#include <dm/device.h>
-#include <errno.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-static const struct rockchip_phy rockchip_inno_mipi_dphy_data = {
-	 .funcs = &inno_mipi_dphy_funcs,
-};
-#endif
-
-#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
-static const struct rockchip_phy rockchip_inno_hdmi_phy_data = {
-	 .funcs = &inno_hdmi_phy_funcs,
-};
-#endif
-
-static const struct udevice_id rockchip_phy_ids[] = {
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-	{
-		.compatible = "rockchip,px30-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rk3128-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rk3366-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rk3368-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-	{
-		.compatible = "rockchip,rv1108-mipi-dphy",
-		.data = (ulong)&rockchip_inno_mipi_dphy_data,
-	},
-#endif
-#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
-	{
-	 .compatible = "rockchip,rk3328-hdmi-phy",
-	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
-	},
-	{
-	 .compatible = "rockchip,rk3228-hdmi-phy",
-	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
-	},
-
-#endif
-	{}
-};
-
-static int rockchip_phy_probe(struct udevice *dev)
+int rockchip_phy_init(struct rockchip_phy *phy)
 {
-	return 0;
-}
+	if (!phy)
+		return -ENODEV;
+
+	if (phy->funcs || phy->funcs->init)
+		return phy->funcs->init(phy);
 
-static int rockchip_phy_bind(struct udevice *dev)
-{
 	return 0;
 }
 
-U_BOOT_DRIVER(rockchip_phy) = {
-	.name = "rockchip_phy",
-	.id = UCLASS_PHY,
-	.of_match = rockchip_phy_ids,
-	.bind	= rockchip_phy_bind,
-	.probe	= rockchip_phy_probe,
-};
-
-int rockchip_phy_power_on(struct display_state *state)
+int rockchip_phy_power_on(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy = conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->power_on) {
-		printf("%s: failed to find phy power on funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->power_on(state);
+	if (phy->funcs || phy->funcs->power_on)
+		return phy->funcs->power_on(phy);
+
+	return 0;
 }
 
-int rockchip_phy_power_off(struct display_state *state)
+int rockchip_phy_power_off(struct rockchip_phy *phy)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy = conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->power_off) {
-		printf("%s: failed to find phy power_off funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->power_off(state);
+	if (phy->funcs && phy->funcs->power_off)
+		return phy->funcs->power_off(phy);
+
+	return 0;
 }
 
-unsigned long rockchip_phy_set_pll(struct display_state *state,
+unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy,
 				   unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy = conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->set_pll) {
-		printf("%s: failed to find phy set_pll funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->set_pll(state, rate);
+	if (phy->funcs && phy->funcs->set_pll)
+		return phy->funcs->set_pll(phy, rate);
+
+	return 0;
 }
 
-void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width)
+int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy =
-		(struct rockchip_phy *)conn_state->phy;
+	if (!phy)
+		return -ENODEV;
 
-	if (!phy || !phy->funcs || !phy->funcs->set_bus_width) {
-		debug("%s: failed to find phy set_bus_width funcs\n", __func__);
-		return;
-	}
+	if (phy->funcs && phy->funcs->set_bus_width)
+		return phy->funcs->set_bus_width(phy, bus_width);
 
-	return phy->funcs->set_bus_width(state, bus_width);
+	return 0;
 }
 
-long rockchip_phy_round_rate(struct display_state *state, unsigned long rate)
+long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate)
 {
-	struct connector_state *conn_state = &state->conn_state;
-	const struct rockchip_phy *phy =
-		(struct rockchip_phy *)conn_state->phy;
-
-	if (!phy || !phy->funcs || !phy->funcs->round_rate) {
-		debug("%s: failed to find phy round_rate funcs\n", __func__);
+	if (!phy)
 		return -ENODEV;
-	}
 
-	return phy->funcs->round_rate(state, rate);
+	if (phy->funcs && phy->funcs->round_rate)
+		return phy->funcs->round_rate(phy, rate);
+
+	return 0;
 }
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index 4fed5a0cc9..ae0f9d49f4 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -7,34 +7,29 @@
 #ifndef _ROCKCHIP_PHY_H_
 #define _ROCKCHIP_PHY_H_
 
+struct rockchip_phy;
+
 struct rockchip_phy_funcs {
-	int (*init)(struct display_state *state);
-	int (*power_on)(struct display_state *state);
-	int (*power_off)(struct display_state *state);
-	unsigned long (*set_pll)(struct display_state *state,
-				 unsigned long rate);
-	void (*set_bus_width)(struct display_state *state, u32 bus_width);
-	long (*round_rate)(struct display_state *state, unsigned long rate);
+	int (*init)(struct rockchip_phy *phy);
+	int (*power_on)(struct rockchip_phy *phy);
+	int (*power_off)(struct rockchip_phy *phy);
+	unsigned long (*set_pll)(struct rockchip_phy *phy, unsigned long rate);
+	int (*set_bus_width)(struct rockchip_phy *phy, u32 bus_width);
+	long (*round_rate)(struct rockchip_phy *phy, unsigned long rate);
 };
 
 struct rockchip_phy {
+	struct udevice *dev;
 	const struct rockchip_phy_funcs *funcs;
 	const void *data;
 };
 
-const struct rockchip_phy *
-rockchip_get_phy(const void *blob, int phy_node);
-int rockchip_phy_power_off(struct display_state *state);
-int rockchip_phy_power_on(struct display_state *state);
-unsigned long rockchip_phy_set_pll(struct display_state *state,
+int rockchip_phy_init(struct rockchip_phy *phy);
+int rockchip_phy_power_off(struct rockchip_phy *phy);
+int rockchip_phy_power_on(struct rockchip_phy *phy);
+unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy,
 				   unsigned long rate);
-void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width);
-long rockchip_phy_round_rate(struct display_state *state, unsigned long rate);
+int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width);
+long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate);
 
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
-#endif
-#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
-extern const struct rockchip_phy_funcs inno_hdmi_phy_funcs;
-#endif
 #endif

commit 4e78a5d4d8d397aa44fc855b7d764aef682fa69d
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Tue Aug 14 14:29:21 2018 +0800

    drivers: rknand: zftl: support spectek L84C/L84D/L05B NAND FLASH
    
    1. support spectek L84C/L84D/L05B NAND FLASH
    2. add vendor read and write api
    3. set ftl version v1.14
    
    Change-Id: I483a451acdbdc3b3bfde79dd0ea8689a2b7351ee
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index ff7c3447d4..125ba6d30c 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-07-18
+ * date: 2018-09-08
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -1146,7 +1146,7 @@ flash_wait_device_ready_raw:
 	bhi	.L254
 	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 602
+	mov	w2, 606
 	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1562,7 +1562,7 @@ flash_start_page_read:
 	bhi	.L337
 	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
-	mov	w2, 744
+	mov	w2, 748
 	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1637,7 +1637,7 @@ flash_erase_duplane_block:
 	bhi	.L346
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 513
+	mov	w2, 517
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1732,37 +1732,38 @@ flash_erase_duplane_block:
 flash_erase_block_en:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
-	str	x25, [sp, 64]
+	stp	x25, x26, [sp, 64]
 	mov	w21, w2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	and	w26, w1, 255
+	stp	x19, x20, [sp, 16]
 	and	w22, w2, 2097151
-	stp	x23, x24, [sp, 48]
-	and	w25, w1, 255
-	cmp	w0, w19
+	cmp	w0, w23
 	bhi	.L361
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
-	mov	w2, 558
+	mov	w2, 562
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L361:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w20, [x0, w19, sxtw]
+	ldrb	w20, [x0, w23, sxtw]
 	adrp	x0, .LANCHOR13
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LANCHOR14
 	and	x19, x20, 255
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	add	x23, x19, 8
-	add	x23, x24, x23, lsl 8
+	add	x24, x19, 8
+	add	x24, x25, x24, lsl 8
 	tbz	x0, 4, .L362
 	adrp	x0, .LC33
+	mov	w3, w26
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
@@ -1772,10 +1773,10 @@ flash_erase_block_en:
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L363
+	cbnz	w26, .L363
 	bl	zftl_flash_enter_slc_mode
 .L364:
-	add	x0, x24, x19, lsl 8
+	add	x0, x25, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
 	and	w1, w21, 255
@@ -1787,7 +1788,7 @@ flash_erase_block_en:
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x23
+	mov	x0, x24
 	bl	flash_read_status
 	mov	w19, w0
 	bl	nandc_de_cs.constprop.29
@@ -1795,18 +1796,19 @@ flash_erase_block_en:
 	ands	w19, w19, w0
 	beq	.L365
 	adrp	x0, .LANCHOR2
-	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR2]
+	mov	w3, w19
+	mov	w1, w23
+	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	adrp	x0, .LC34
 	add	x0, x0, :lo12:.LC34
-	udiv	w1, w21, w1
+	udiv	w2, w21, w2
 	bl	printf
 .L365:
 	mov	w0, w19
-	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
 .L363:
@@ -1895,7 +1897,7 @@ flash_start_plane_read:
 	bhi	.L381
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 839
+	mov	w2, 843
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -5671,21 +5673,27 @@ ftl_vpn_decrement:
 	cmp	w19, w0
 	beq	.L1006
 	adrp	x0, .LANCHOR9
-	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR9]
-	ldrh	w0, [x2, x1]
+	uxtw	x1, w19
+	lsl	x2, x1, 1
+	ldr	x3, [x0, #:lo12:.LANCHOR9]
+	ldrh	w0, [x3, x2]
 	cbnz	w0, .L1007
-	adrp	x0, .LC59
+	adrp	x0, .LANCHOR7
 	mov	w2, 0
-	mov	w1, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
+	add	x1, x0, x1, lsl 2
+	adrp	x0, .LC59
 	add	x0, x0, :lo12:.LC59
+	ldrb	w3, [x1, 2]
+	mov	w1, w19
+	ubfx	x3, x3, 5, 3
 	bl	printf
 .L1012:
 	mov	w0, 0
 	b	.L1005
 .L1007:
 	sub	w0, w0, #1
-	strh	w0, [x2, x1]
+	strh	w0, [x3, x2]
 .L1006:
 	adrp	x20, .LANCHOR63
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
@@ -7022,34 +7030,30 @@ zftl_read_flash_info:
 	adrp	x1, .LANCHOR34
 	add	x1, x1, :lo12:.LANCHOR34
 	adrp	x0, .LANCHOR2
+	adrp	x3, .LANCHOR58
+	strb	wzr, [x19, 10]
 	mov	w4, 1
-	ldrb	w3, [x1, 9]
+	ldrb	w2, [x1, 9]
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
-	mul	w0, w3, w0
-	and	w2, w0, 65535
-	strb	w2, [x19, 4]
-	ubfx	x0, x2, 8, 8
+	mul	w0, w2, w0
+	strb	w0, [x19, 4]
+	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w0, [x19, 7]
-	ldrb	w0, [x1, 13]
-	mul	w0, w0, w2
-	ldrh	w2, [x1, 14]
-	strb	wzr, [x19, 10]
-	mul	w0, w0, w2
-	ldrb	w2, [x1, 8]
-	strb	w3, [x19, 6]
-	mul	w0, w0, w2
-	strb	w0, [x19]
-	ubfx	x2, x0, 8, 8
-	strb	w2, [x19, 1]
-	ubfx	x2, x0, 16, 8
-	lsr	w0, w0, 24
-	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR29
+	add	x0, x3, :lo12:.LANCHOR58
+	ldrb	w3, [x3, #:lo12:.LANCHOR58]
+	strb	w3, [x19]
+	ldrb	w3, [x0, 1]
+	strb	w3, [x19, 1]
+	ldrb	w3, [x0, 2]
+	ldrb	w0, [x0, 3]
+	strb	w3, [x19, 2]
 	strb	w0, [x19, 3]
 	mov	w0, 32
+	strb	w2, [x19, 6]
+	adrp	x2, .LANCHOR29
 	strb	w0, [x19, 8]
 	add	x2, x2, :lo12:.LANCHOR29
 	ldrb	w0, [x1, 7]
@@ -9824,9 +9828,9 @@ micron_read_retrial:
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
 	tbz	x0, 12, .L1641
+	mov	w4, w7
 	str	w7, [x29, 112]
-	mov	w4, w28
-	mov	w3, w21
+	mov	w3, w28
 	mov	w2, w22
 	mov	w1, w21
 	adrp	x0, .LC103
@@ -10368,75 +10372,78 @@ hynix_read_retrial:
 	.type	flash_ddr_tuning_read, %function
 flash_ddr_tuning_read:
 	stp	x29, x30, [sp, -144]!
-	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w20, w1
+	and	w20, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC109
+	mov	w22, w1
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR43
+	mov	x23, x2
 	stp	x25, x26, [sp, 64]
-	add	x21, x21, :lo12:.LC109
+	mov	x24, x3
 	stp	x27, x28, [sp, 80]
-	mov	x26, x3
-	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR43
-	str	x2, [x29, 128]
-	mov	w28, 0
-	str	w0, [x29, 136]
+	adrp	x25, .LANCHOR43
+	str	w4, [x29, 136]
 	bl	nandc_get_ddr_para
-	mov	w23, 0
-	str	w0, [x29, 124]
-	mov	w24, 0
+	add	x25, x25, :lo12:.LANCHOR43
+	str	w0, [x29, 132]
 	adrp	x0, .LANCHOR14
-	mov	w27, 1024
 	add	x0, x0, :lo12:.LANCHOR14
-	mov	w25, 6
-	mov	w19, -1
+	mov	w28, 0
+	str	x0, [x29, 120]
+	mov	w26, 0
+	adrp	x0, .LC109
+	mov	w27, 0
+	add	x0, x0, :lo12:.LC109
+	mov	w19, 1024
+	mov	w21, -1
+	mov	w7, 6
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
 .L1766:
-	mov	w0, w25
+	mov	w0, w7
+	str	w7, [x29, 128]
 	bl	nandc_set_ddr_para
-	ldr	w4, [x29, 120]
-	mov	x3, x26
-	ldrb	w0, [x29, 136]
-	mov	w1, w20
-	ldr	x2, [x29, 128]
+	ldr	w4, [x29, 136]
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
 	bl	flash_read_page
 	mov	w4, w0
-	ldr	x0, [x29, 112]
+	ldr	x0, [x29, 120]
+	ldr	w7, [x29, 128]
 	ldr	w0, [x0]
 	tbz	x0, 4, .L1761
+	ldr	x0, [x29, 112]
 	mov	w3, w4
+	mov	w1, w7
 	str	w4, [x29, 108]
-	mov	w2, w20
-	mov	w1, w25
-	mov	x0, x21
+	str	w7, [x29, 128]
+	mov	w2, w22
 	bl	printf
 	ldr	w4, [x29, 108]
+	ldr	w7, [x29, 128]
 .L1761:
-	add	w0, w27, 1
+	add	w0, w19, 1
 	cmp	w4, w0
 	bhi	.L1762
 	adrp	x0, .LANCHOR151
-	ldr	x0, [x0, #:lo12:.LANCHOR151]
-	str	x0, [x29, 128]
+	ldr	x23, [x0, #:lo12:.LANCHOR151]
 	adrp	x0, .LANCHOR153
-	ldr	x26, [x0, #:lo12:.LANCHOR153]
-	ldrb	w0, [x22]
+	ldr	x24, [x0, #:lo12:.LANCHOR153]
+	ldrb	w0, [x25]
 	cmp	w4, w0, lsr 2
-	bcs	.L1771
-	add	w24, w24, 1
-	cmp	w24, 7
-	bls	.L1771
-	sub	w28, w25, w24
-	mov	w27, w4
-	mov	w19, 0
+	bcs	.L1772
+	add	w27, w27, 1
+	cmp	w27, 7
+	bls	.L1772
+	sub	w28, w7, w27
+	mov	w19, w4
+	mov	w21, 0
 .L1764:
 	ldr	w0, [x29, 140]
-	cmp	w24, w23
+	cmp	w27, w26
 	csel	w28, w28, w0, cs
 .L1765:
 	cbz	w28, .L1767
@@ -10444,24 +10451,60 @@ flash_ddr_tuning_read:
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
-	cmp	w0, w27
+	cmp	w0, w19
 	bls	.L1767
 	mov	w1, w28
 	adrp	x0, .LC110
 	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1781:
+.L1783:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1760
-	ldr	w1, [x29, 136]
+	cbz	w21, .L1760
+	mov	w2, w22
+	mov	w1, w20
 	adrp	x0, .LC111
-	mov	w2, w20
 	add	x0, x0, :lo12:.LC111
-	mov	w27, w19
 	bl	printf
+	mov	w0, w20
+	bl	flash_reset
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+	bl	nandc_set_if_mode
+	adrp	x0, .LANCHOR35
+	add	x0, x0, :lo12:.LANCHOR35
+	mov	w1, 2
+	strb	w1, [x0, w20, sxtw]
+	mov	w0, w20
+	bl	zftl_flash_enter_slc_mode
+	ldr	w4, [x29, 136]
+	mov	x3, x24
+	mov	x2, x23
+	mov	w1, w22
+	mov	w0, w20
+	bl	flash_read_page
+	mov	w19, w0
+	mov	w3, w0
+	mov	w2, w22
+	mov	w1, w20
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
+	bl	printf
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	cmp	w19, w0
+	bhi	.L1774
+	adrp	x1, .LANCHOR155
+	ldr	w0, [x1, #:lo12:.LANCHOR155]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR155]
+	cmp	w0, 100
+	bls	.L1770
+	adrp	x0, .LANCHOR20
+	strb	wzr, [x0, #:lo12:.LANCHOR20]
 .L1760:
-	mov	w0, w27
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10470,28 +10513,37 @@ flash_ddr_tuning_read:
 	ldp	x29, x30, [sp], 144
 	ret
 .L1762:
-	cmp	w24, w23
-	bls	.L1772
-	sub	w0, w28, w24
+	cmp	w27, w26
+	bls	.L1773
+	sub	w0, w28, w27
 	str	w0, [x29, 140]
-	cmp	w24, 7
+	cmp	w27, 7
 	bhi	.L1765
-	mov	w23, w24
-.L1772:
-	mov	w24, 0
+	mov	w26, w27
+.L1773:
+	mov	w27, 0
 	b	.L1763
-.L1771:
-	mov	w28, w25
-	mov	w27, w4
-	mov	w19, 0
+.L1772:
+	mov	w28, w7
+	mov	w19, w4
+	mov	w21, 0
 .L1763:
-	add	w25, w25, 2
-	cmp	w25, 50
+	add	w7, w7, 2
+	cmp	w7, 50
 	bne	.L1766
 	b	.L1764
 .L1767:
-	ldrb	w0, [x29, 124]
-	b	.L1781
+	ldrb	w0, [x29, 132]
+	b	.L1783
+.L1774:
+	mov	w19, w21
+.L1770:
+	adrp	x20, .LANCHOR42
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	bl	flash_set_interface_mode
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	bl	nandc_set_if_mode
+	b	.L1760
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10515,47 +10567,47 @@ flash_read_page_en:
 	ubfx	x26, x19, 24, 2
 	mov	x25, x0
 	cmp	w1, w21
-	bhi	.L1783
-	adrp	x1, .LANCHOR155
+	bhi	.L1785
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
-	mov	w2, 380
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 382
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1783:
+.L1785:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w21, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bcs	.L1784
+	bcs	.L1786
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 6, .L1784
-	adrp	x0, .LC112
+	tbz	x0, 6, .L1786
+	adrp	x0, .LC113
 	mov	w3, w19
 	mov	w2, w21
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC112
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1784:
-	cbnz	w26, .L1785
+.L1786:
+	cbnz	w26, .L1787
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1786
+	cbz	w0, .L1788
 	ldrb	w0, [x1, #:lo12:.LANCHOR1]
-	cbz	w0, .L1785
-.L1786:
+	cbz	w0, .L1787
+.L1788:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1787
+	cbz	w1, .L1789
 	add	w19, w0, w19, lsl 1
-.L1785:
+.L1787:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10564,26 +10616,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1782
+	bne	.L1784
 	adrp	x25, .LANCHOR45
 	mov	x26, x25
 	ldrb	w27, [x25, #:lo12:.LANCHOR45]
-	cbnz	w27, .L1789
-.L1792:
-	adrp	x0, .LANCHOR156
-	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1790
-.L1791:
+	cbnz	w27, .L1791
+.L1794:
+	adrp	x0, .LANCHOR157
+	ldr	x5, [x0, #:lo12:.LANCHOR157]
+	cbnz	x5, .L1792
+.L1793:
 	ldrb	w4, [x26, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1782
+	cbz	w0, .L1784
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10596,13 +10648,13 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1787:
+.L1789:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1785
-.L1789:
+	b	.L1787
+.L1791:
 	strb	wzr, [x25, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
@@ -10612,10 +10664,10 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w27, [x25, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1792
-.L1810:
+	beq	.L1794
+.L1812:
 	mov	w21, w0
-.L1782:
+.L1784:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10624,7 +10676,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1790:
+.L1792:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10632,8 +10684,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1791
-	b	.L1810
+	beq	.L1793
+	b	.L1812
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10663,23 +10715,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1812
+	bne	.L1814
 	mov	w27, 0
 	mov	w28, 2
-.L1813:
+.L1815:
 	cmp	w27, w19
-	ble	.L1816
-.L1812:
+	ble	.L1818
+.L1814:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1817
+	tbz	x0, 12, .L1819
 	ldr	w3, [x22]
-	adrp	x0, .LC114
+	adrp	x0, .LC115
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC114
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1817:
+.L1819:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10688,7 +10740,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1816:
+.L1818:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10698,14 +10750,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1814
+	bne	.L1816
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1813
-.L1814:
+	b	.L1815
+.L1816:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1813
+	b	.L1815
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -10742,46 +10794,46 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1824
+	tbz	x0, 12, .L1826
 	ldr	x4, [x20, #:lo12:.LANCHOR26]
-	adrp	x2, .LANCHOR157
-	adrp	x0, .LC115
+	adrp	x2, .LANCHOR158
+	adrp	x0, .LC116
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR157
+	add	x2, x2, :lo12:.LANCHOR158
 	mov	w1, 49
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-.L1824:
-	adrp	x21, .LANCHOR158
+.L1826:
+	adrp	x21, .LANCHOR159
 	adrp	x23, .LANCHOR2
 	mov	w24, 21321
 	add	x26, x23, :lo12:.LANCHOR2
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1827:
+.L1829:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR158]
+	ldr	x3, [x21, #:lo12:.LANCHOR159]
 	mov	w0, 0
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
-	add	x27, x21, :lo12:.LANCHOR158
+	add	x27, x21, :lo12:.LANCHOR159
 	add	x25, x20, :lo12:.LANCHOR26
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1825
+	beq	.L1827
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1826
-.L1825:
+	beq	.L1828
+.L1827:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1827
-.L1851:
+	bne	.L1829
+.L1853:
 	mov	w0, -1
-.L1823:
+.L1825:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10789,16 +10841,16 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1835:
+.L1837:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1836
+	bne	.L1838
 	ldr	w19, [x0, 4]
-.L1829:
-	add	x24, x21, :lo12:.LANCHOR159
+.L1831:
+	add	x24, x21, :lo12:.LANCHOR160
 	ldrh	w0, [x23, #:lo12:.LANCHOR2]
-	ldr	x3, [x22, #:lo12:.LANCHOR158]
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldrb	w1, [x24, 1]
@@ -10806,85 +10858,85 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1830
+	beq	.L1832
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1830
+	bne	.L1832
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1830
+	bcs	.L1832
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR159]
+	strb	w1, [x21, #:lo12:.LANCHOR160]
 	strb	w0, [x24, 1]
-.L1830:
-	ldrb	w1, [x21, #:lo12:.LANCHOR159]
-	add	x24, x21, :lo12:.LANCHOR159
-	ldr	x3, [x22, #:lo12:.LANCHOR158]
+.L1832:
+	ldrb	w1, [x21, #:lo12:.LANCHOR160]
+	add	x24, x21, :lo12:.LANCHOR160
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR159]
+	ldrb	w21, [x21, #:lo12:.LANCHOR160]
 	strh	w0, [x24, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR2]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1831:
-	tbz	w19, #31, .L1833
+.L1833:
+	tbz	w19, #31, .L1835
 	cmn	w19, #1
-	bne	.L1834
+	bne	.L1836
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w1, [x0]
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-	b	.L1851
-.L1833:
-	ldr	x3, [x22, #:lo12:.LANCHOR158]
+	b	.L1853
+.L1835:
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1832
+	beq	.L1834
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1832
-.L1834:
+	bne	.L1834
+.L1836:
 	mov	w0, 0
-	b	.L1823
-.L1832:
+	b	.L1825
+.L1834:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1831
-.L1826:
-	adrp	x21, .LANCHOR159
-	add	x1, x21, :lo12:.LANCHOR159
+	b	.L1833
+.L1828:
+	adrp	x21, .LANCHOR160
+	add	x1, x21, :lo12:.LANCHOR160
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR159]
+	strb	w0, [x21, #:lo12:.LANCHOR160]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1835
-.L1836:
+	bne	.L1837
+.L1838:
 	mov	w19, 0
-	b	.L1829
+	b	.L1831
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10904,34 +10956,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR20]
-	adrp	x24, .LANCHOR161
+	adrp	x24, .LANCHOR162
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR160
+	adrp	x25, .LANCHOR161
 	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR160]
+	ldr	x3, [x25, #:lo12:.LANCHOR161]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR161]
+	ldr	x2, [x24, #:lo12:.LANCHOR162]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR160]
+	ldr	x3, [x25, #:lo12:.LANCHOR161]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR161]
+	ldr	x2, [x24, #:lo12:.LANCHOR162]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1853
+	bne	.L1855
 	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1853
+	tbz	x1, 0, .L1855
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1854:
+.L1856:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10939,10 +10991,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1853:
+.L1855:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1854
+	b	.L1856
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -10962,14 +11014,14 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1860
-	adrp	x1, .LANCHOR162
+	bhi	.L1862
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 785
-	add	x1, x1, :lo12:.LANCHOR162
+	mov	w2, 789
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1860:
+.L1862:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w6, [x0, w23, sxtw]
@@ -10977,11 +11029,11 @@ flash_complete_plane_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1861
+	cbnz	w20, .L1863
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1861:
+.L1863:
 	adrp	x0, .LANCHOR19+16
 	and	x1, x6, 255
 	and	w3, w19, 255
@@ -10990,28 +11042,28 @@ flash_complete_plane_page_read:
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1862
+	bne	.L1864
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1873:
+.L1875:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1871:
+.L1873:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1865
-	cbz	w20, .L1865
+	bne	.L1867
+	cbz	w20, .L1867
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1872:
+.L1874:
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR34+9
 	mov	x4, x22
@@ -11028,15 +11080,15 @@ flash_complete_plane_page_read:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1862:
+.L1864:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1864
+	bne	.L1866
 	mov	w4, 5
-	b	.L1873
-.L1864:
+	b	.L1875
+.L1866:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11047,10 +11099,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1871
-.L1865:
+	b	.L1873
+.L1867:
 	mov	w0, w19
-	b	.L1872
+	b	.L1874
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11073,14 +11125,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1875
-	adrp	x1, .LANCHOR163
+	bhi	.L1877
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
-	mov	w2, 907
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 911
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1875:
+.L1877:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
@@ -11088,11 +11140,11 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1876
+	cbnz	w21, .L1878
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1876:
+.L1878:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11111,12 +11163,12 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1877
-	cbz	w21, .L1877
+	bne	.L1879
+	cbz	w21, .L1879
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1904:
+.L1906:
 	adrp	x20, .LANCHOR34
 	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
@@ -11127,10 +11179,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1879
+	bne	.L1881
 	adrp	x26, .LANCHOR45
 	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1880
+	cbz	w27, .L1882
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR45]
@@ -11139,16 +11191,16 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1881
-.L1886:
+	cbnz	w21, .L1883
+.L1888:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1881
+	cbz	w1, .L1883
 	adrp	x1, .LANCHOR43
 	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1881
+	blt	.L1883
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -11156,7 +11208,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1874:
+.L1876:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11164,31 +11216,31 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1877:
+.L1879:
 	mov	w0, w19
-	b	.L1904
-.L1881:
+	b	.L1906
+.L1883:
 	cmn	w0, #1
-	bne	.L1874
+	bne	.L1876
+.L1889:
+	adrp	x0, .LANCHOR157
+	ldr	x5, [x0, #:lo12:.LANCHOR157]
+	cbnz	x5, .L1885
 .L1887:
-	adrp	x0, .LANCHOR156
-	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1883
-.L1885:
 	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
 	ldrb	w4, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1884
+	cbnz	w0, .L1886
 	mov	w0, -1
-	b	.L1874
-.L1883:
+	b	.L1876
+.L1885:
 	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
@@ -11197,9 +11249,9 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1885
-	b	.L1874
-.L1884:
+	beq	.L1887
+	b	.L1876
+.L1886:
 	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -11213,12 +11265,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1879:
-	cbz	w21, .L1886
-	b	.L1874
-.L1880:
-	cbnz	w21, .L1887
-	b	.L1886
+.L1881:
+	cbz	w21, .L1888
+	b	.L1876
+.L1882:
+	cbnz	w21, .L1889
+	b	.L1888
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -11234,11 +11286,11 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1906
-.L1935:
+	bne	.L1908
+.L1937:
 	mov	w21, 0
-	b	.L1905
-.L1906:
+	b	.L1907
+.L1908:
 	adrp	x19, .LANCHOR49
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR49
@@ -11247,44 +11299,44 @@ queue_wait_first_req_completed:
 	ldr	w24, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1935
-	adrp	x1, .L1909
-	add	x1, x1, :lo12:.L1909
+	bhi	.L1937
+	adrp	x1, .L1911
+	add	x1, x1, :lo12:.L1911
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1909
+	adr	x3, .Lrtx1911
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1909:
+.Lrtx1911:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1909:
-	.2byte	(.L1908 - .Lrtx1909) / 4
-	.2byte	(.L1910 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1912 - .Lrtx1909) / 4
-	.2byte	(.L1913 - .Lrtx1909) / 4
-	.2byte	(.L1914 - .Lrtx1909) / 4
-	.2byte	(.L1911 - .Lrtx1909) / 4
-	.2byte	(.L1914 - .Lrtx1909) / 4
+.L1911:
+	.2byte	(.L1910 - .Lrtx1911) / 4
+	.2byte	(.L1912 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1914 - .Lrtx1911) / 4
+	.2byte	(.L1915 - .Lrtx1911) / 4
+	.2byte	(.L1916 - .Lrtx1911) / 4
+	.2byte	(.L1913 - .Lrtx1911) / 4
+	.2byte	(.L1916 - .Lrtx1911) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1908:
+.L1910:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1935
+	tbz	x0, 6, .L1937
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1916
+	cbz	x2, .L1918
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1916:
+.L1918:
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, w24
 	add	x20, x19, x20, lsl 6
@@ -11296,12 +11348,12 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1935
-.L1910:
+	b	.L1937
+.L1912:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1935
+	tbz	x0, 6, .L1937
 	add	x0, x19, :lo12:.LANCHOR49
 	lsl	x2, x20, 6
 	add	x1, x0, x2
@@ -11309,23 +11361,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1917
+	cbz	x0, .L1919
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR121
 	ldrb	w1, [x1, #:lo12:.LANCHOR121]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1917:
+.L1919:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1918
+	cbz	x1, .L1920
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1918:
+.L1920:
 	add	x22, x19, :lo12:.LANCHOR49
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -11340,15 +11392,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1919
+	beq	.L1921
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1920
+	beq	.L1922
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1920
-.L1919:
+	beq	.L1922
+.L1921:
 	add	x22, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x22, x22, x20, lsl 6
@@ -11362,36 +11414,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1921
+	beq	.L1923
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1921
+	beq	.L1923
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1921
+	tbz	x1, 6, .L1923
 	ldr	w3, [x0]
-	adrp	x0, .LC118
+	adrp	x0, .LC119
 	ldr	w1, [x22, 40]
-	add	x0, x0, :lo12:.LC118
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1921:
+.L1923:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1920
+	beq	.L1922
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1920
-	adrp	x1, .LANCHOR164
+	beq	.L1922
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
 	mov	w2, 338
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1920:
+.L1922:
 	add	x0, x19, :lo12:.LANCHOR49
 	mov	w1, 12
 	add	x20, x0, x20, lsl 6
@@ -11401,16 +11453,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1922
+	beq	.L1924
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1924
+	beq	.L1926
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1924
-.L1922:
+	beq	.L1926
+.L1924:
 	add	x20, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x20, x20, x21, lsl 6
@@ -11423,36 +11475,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1926
+	beq	.L1928
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1926
+	beq	.L1928
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1926
+	tbz	x1, 6, .L1928
 	ldr	w3, [x0]
-	adrp	x0, .LC118
+	adrp	x0, .LC119
 	ldr	w1, [x20, 40]
-	add	x0, x0, :lo12:.LC118
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1926:
+.L1928:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1924
+	beq	.L1926
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1924
-	adrp	x1, .LANCHOR164
+	beq	.L1926
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
 	mov	w2, 353
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1924:
+.L1926:
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 12
 	add	x21, x19, x21, lsl 6
@@ -11461,32 +11513,32 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1935
-.L1911:
+	b	.L1937
+.L1913:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1935
+	tbz	x21, 6, .L1937
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 5
 	add	x20, x19, x20, lsl 6
 	tst	w21, w0
-	beq	.L1934
+	beq	.L1936
 	ldrb	w1, [x20, 1]
 	mov	w0, 11
 	ldr	w3, [x20, 40]
 	mov	w4, 11
 	strb	w0, [x20, 58]
 	mov	w2, w21
-	adrp	x0, .LC119
-	add	x0, x0, :lo12:.LC119
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1995:
+.L1997:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1905
-.L1914:
+	b	.L1907
+.L1916:
 	cmp	w2, 10
 	add	x21, x19, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 8
@@ -11496,46 +11548,46 @@ queue_wait_first_req_completed:
 	csel	w2, w2, w1, eq
 	ubfx	x3, x24, 21, 3
 	mov	x22, x21
-.L1929:
+.L1931:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1933
+	bne	.L1935
 	mov	w21, -1
-	b	.L1905
-.L1933:
+	b	.L1907
+.L1935:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x22, x23, lsl 6
 	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1929
+	bne	.L1931
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1929
+	bne	.L1931
 	mov	w0, w24
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1931
+	tbz	x24, 6, .L1933
 	add	x22, x22, x20, lsl 6
 	ands	w21, w0, 15
-	beq	.L1932
+	beq	.L1934
 	ldrb	w1, [x22, 1]
 	mov	w2, w0
 	ldr	w3, [x22, 40]
 	mov	w4, 11
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
 	mov	w21, w24
 	bl	printf
 	mov	w0, 11
 	strb	w0, [x22, 58]
 	mov	w0, -1
 	str	w0, [x22, 52]
-.L1931:
+.L1933:
 	add	x1, x19, :lo12:.LANCHOR49
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -11543,7 +11595,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1905:
+.L1907:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -11552,40 +11604,40 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1932:
+.L1934:
 	mov	w0, 12
 	str	wzr, [x22, 52]
 	strb	w0, [x22, 58]
-	b	.L1931
-.L1912:
+	b	.L1933
+.L1914:
 	mov	w1, 32
 	mov	w0, w24
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1935
+	tbz	x21, 5, .L1937
 	add	x19, x19, :lo12:.LANCHOR49
 	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1934
+	beq	.L1936
 	mov	w0, 11
 	strb	w0, [x20, 58]
-	b	.L1995
-.L1934:
+	b	.L1997
+.L1936:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1935
-.L1913:
+	b	.L1937
+.L1915:
 	mov	w1, 64
 	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1935
+	tbz	x0, 6, .L1937
 	add	x19, x19, :lo12:.LANCHOR49
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1935
+	b	.L1937
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11597,17 +11649,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR53
 	add	x19, x19, :lo12:.LANCHOR53
-.L1997:
+.L1999:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1998
+	bne	.L2000
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1998:
+.L2000:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1997
+	b	.L1999
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11675,19 +11727,19 @@ sblk_read_page:
 	mov	x19, x0
 	stp	x25, x26, [sp, 64]
 	mov	x23, x0
-	adrp	x26, .LANCHOR165
+	adrp	x26, .LANCHOR166
 	mov	w20, w22
-	add	x26, x26, :lo12:.LANCHOR165
+	add	x26, x26, :lo12:.LANCHOR166
 	add	x21, x21, :lo12:.LANCHOR49
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR105
-.L2005:
-	cbnz	w20, .L2015
-.L2028:
+.L2007:
+	cbnz	w20, .L2017
+.L2030:
 	adrp	x19, .LANCHOR49
 	add	x19, x19, :lo12:.LANCHOR49
-.L2016:
-	cbnz	w22, .L2018
+.L2018:
+	cbnz	w22, .L2020
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11696,51 +11748,51 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2015:
+.L2017:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2006:
+.L2008:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2007
+	cbnz	w0, .L2009
 	cmp	w20, 1
-	beq	.L2012
+	beq	.L2014
 	ldrb	w0, [x26]
-	cbnz	w0, .L2009
-.L2012:
+	cbnz	w0, .L2011
+.L2014:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2010
-.L2007:
+	b	.L2012
+.L2009:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2006
-.L2009:
+	b	.L2008
+.L2011:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2011
+	bne	.L2013
 	str	w4, [x29, 124]
 	mov	w2, 624
-	adrp	x1, .LANCHOR166
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR166
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2011:
+.L2013:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2012
+	bne	.L2014
 	ldrh	w0, [x27, #:lo12:.LANCHOR105]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2012
+	bne	.L2014
 	ldr	w0, [x19, 40]
 	adrp	x25, .LANCHOR53
 	ldrb	w24, [x21, x2]
@@ -11766,26 +11818,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2010:
+.L2012:
 	subs	w20, w20, #1
-	beq	.L2028
+	beq	.L2030
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2005
-.L2018:
+	b	.L2007
+.L2020:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 12
-	bne	.L2017
+	bne	.L2019
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2017
+	beq	.L2019
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2017:
+.L2019:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2016
+	b	.L2018
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11812,22 +11864,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2031
-	adrp	x0, .LC121
+	tbz	x0, 4, .L2033
+	adrp	x0, .LC122
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2031:
+.L2033:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2032
+	cbnz	w28, .L2034
 	bl	zftl_flash_enter_slc_mode
-.L2033:
+.L2035:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11856,15 +11908,15 @@ flash_prog_page:
 	mov	w2, w0
 	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2030
+	tbz	x2, 2, .L2032
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2030
-	adrp	x0, .LC122
+	tbz	x0, 12, .L2032
+	adrp	x0, .LC123
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L2030:
+.L2032:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11873,9 +11925,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2032:
+.L2034:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2033
+	b	.L2035
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11906,10 +11958,10 @@ flash_test_blk:
 	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	bne	.L2046
-.L2048:
+	bne	.L2048
+.L2050:
 	mov	w21, -1
-.L2047:
+.L2049:
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_erase_block
@@ -11919,7 +11971,7 @@ flash_test_blk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2046:
+.L2048:
 	adrp	x23, .LANCHOR34
 	add	x23, x23, :lo12:.LANCHOR34
 	ldr	x3, [x21, #:lo12:.LANCHOR153]
@@ -11929,7 +11981,7 @@ flash_test_blk:
 	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2048
+	beq	.L2050
 	ldrb	w4, [x23, 9]
 	mov	w1, w19
 	ldr	x3, [x21, #:lo12:.LANCHOR153]
@@ -11937,20 +11989,20 @@ flash_test_blk:
 	ldr	x2, [x22, #:lo12:.LANCHOR151]
 	bl	flash_read_page
 	cmn	w0, #1
-	beq	.L2048
+	beq	.L2050
 	ldr	x0, [x22, #:lo12:.LANCHOR151]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	bne	.L2048
+	bne	.L2050
 	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
 	csetm	w21, ne
-	b	.L2047
+	b	.L2049
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11961,45 +12013,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR167
+	adrp	x0, .LANCHOR168
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
+	ldrb	w0, [x0, #:lo12:.LANCHOR168]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2056
+	cbnz	w0, .L2058
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2056
+	bhi	.L2058
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2056
+	tbz	x0, 0, .L2058
 	adrp	x21, .LANCHOR133
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
 	adrp	x24, .LANCHOR151
-.L2058:
+.L2060:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2059
-.L2056:
+	bhi	.L2061
+.L2058:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2059:
+.L2061:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2056
+	bne	.L2058
 	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12012,7 +12064,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2058
+	b	.L2060
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -12029,16 +12081,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L2062
+	bls	.L2064
 	cmp	w1, 575
-	bhi	.L2063
-	adrp	x0, .LANCHOR168
+	bhi	.L2065
+	adrp	x0, .LANCHOR169
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR168]
+	str	w2, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, idb_buf
-	bhi	.L2064
+	bhi	.L2066
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -12046,9 +12098,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2140:
+.L2142:
 	bl	ftl_memcpy
-.L2119:
+.L2121:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12057,7 +12109,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L2064:
+.L2066:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -12067,58 +12119,64 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2140
-.L2062:
+	b	.L2142
+.L2064:
 	cmp	w1, 575
-	bls	.L2119
-.L2063:
-	adrp	x0, .LANCHOR168
-	ldr	w0, [x0, #:lo12:.LANCHOR168]
-	cbz	w0, .L2119
+	bls	.L2121
+.L2065:
+	adrp	x0, .LANCHOR169
+	ldr	w0, [x0, #:lo12:.LANCHOR169]
+	cbz	w0, .L2121
+	adrp	x0, idb_buf
+	mov	w1, 35899
+	movk	w1, 0xfcdc, lsl 16
+	ldr	w2, [x0, #:lo12:idb_buf]
+	cmp	w2, w1
+	bne	.L2069
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
-	adrp	x3, idb_buf
-	add	x6, x3, :lo12:idb_buf
+	add	x6, x0, :lo12:idb_buf
+	adrp	x3, idb_buf+262140
+	add	x3, x3, :lo12:idb_buf+262140
+	ldrh	w2, [x1, 10]
+	ldrb	w4, [x1, 12]
+	ldrb	w20, [x1, 9]
+	lsl	w2, w2, 2
+	ldrh	w19, [x1, 26]
+	mov	w1, 0
+	sdiv	w27, w2, w4
+	mov	w2, 512
 	mov	w4, 4097
-	ldrh	w0, [x1, 10]
-	ldrb	w2, [x1, 9]
-	ldrb	w1, [x1, 12]
-	mul	w2, w0, w2
-	lsl	w0, w0, 2
-	and	w2, w2, 65535
-	str	w2, [x29, 132]
-	sdiv	w27, w0, w1
-	mov	w0, 512
-	adrp	x1, idb_buf+262140
-	add	x1, x1, :lo12:idb_buf+262140
-	mov	w2, 65535
 	cmp	w27, 512
-	csel	w27, w27, w0, lt
-	mov	w0, 0
-.L2069:
-	ldr	w5, [x1]
-	cbnz	w5, .L2067
-	ldr	w5, [x6, w0, uxtw 2]
-	add	w0, w0, 1
-	str	w5, [x1], -4
-	cmp	w0, w4
+	csel	w27, w27, w2, lt
+	mov	w2, 65535
+.L2073:
+	ldr	w5, [x3]
+	cbnz	w5, .L2071
+	ldr	w5, [x6, w1, uxtw 2]
+	add	w1, w1, 1
+	str	w5, [x3], -4
+	cmp	w1, w4
 	sub	w2, w2, #1
-	csel	w0, w0, wzr, cc
+	csel	w1, w1, wzr, cc
 	cmp	w2, 4096
-	bne	.L2069
-.L2067:
-	add	x0, x3, :lo12:idb_buf
+	bne	.L2073
+.L2071:
+	add	x0, x0, :lo12:idb_buf
+	mul	w19, w19, w20
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
+	and	w0, w19, 65535
+	str	w0, [x29, 132]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2103:
+.L2107:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -12131,7 +12189,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2070
+	beq	.L2074
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
@@ -12142,7 +12200,7 @@ idb_write_data:
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
 	mov	w0, 0
 	ldrb	w21, [x25, 9]
-	ldrh	w23, [x25, 10]
+	ldrh	w23, [x25, 26]
 	udiv	w1, w26, w21
 	mul	w23, w21, w23
 	and	w22, w23, 65535
@@ -12151,11 +12209,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2109
+	bne	.L2111
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2109
+	bne	.L2111
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -12191,19 +12249,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L2071:
+.L2075:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR167
+	adrp	x28, .LANCHOR168
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR167
+	add	x0, x28, :lo12:.LANCHOR168
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2073:
+.L2077:
 	cmp	w27, w20
-	bhi	.L2084
+	bhi	.L2088
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR45
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
@@ -12212,7 +12270,7 @@ idb_write_data:
 	mov	w22, 0
 	str	wzr, [x29, 144]
 	ldrb	w1, [x0, 9]
-	ldrh	w28, [x0, 10]
+	ldrh	w28, [x0, 26]
 	uxtw	x0, w1
 	mul	w28, w0, w28
 	and	w28, w28, 65535
@@ -12229,10 +12287,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2085:
+.L2089:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2099
+	bcc	.L2103
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -12241,21 +12299,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2100:
+.L2104:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2101
+	bcc	.L2105
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L2070
-	b	.L2105
-.L2109:
+	bls	.L2074
+	b	.L2069
+.L2111:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L2071
-.L2084:
+	b	.L2075
+.L2088:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -12263,30 +12321,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2075
+	cbz	w2, .L2079
 	adrp	x0, .LANCHOR1
 	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2075:
+.L2079:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2077
-.L2138:
+	bne	.L2081
+.L2140:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2079
+	cbnz	w2, .L2083
 	mov	w5, w0
-.L2080:
+.L2084:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR43
 	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2081
+	cbnz	x6, .L2085
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12306,31 +12364,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR167]
+	ldrb	w0, [x28, #:lo12:.LANCHOR168]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2082
+	cbnz	w0, .L2086
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2082:
+.L2086:
 	add	x22, x22, 2048
-.L2083:
+.L2087:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2073
-.L2077:
+	b	.L2077
+.L2081:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2138
-.L2079:
+	b	.L2140
+.L2083:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2080
-.L2081:
+	b	.L2084
+.L2085:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12349,21 +12407,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2083
-.L2099:
+	b	.L2087
+.L2103:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR167
+	adrp	x1, .LANCHOR168
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR167]
+	ldrb	w1, [x1, #:lo12:.LANCHOR168]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2086
+	cbnz	w1, .L2090
 	mov	w19, w0
-.L2087:
+.L2091:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
@@ -12383,7 +12441,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2088:
+.L2092:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12392,32 +12450,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2089
+	bne	.L2093
 	ldrb	w6, [x25]
-	cbnz	w6, .L2090
-.L2093:
-	adrp	x0, .LANCHOR156
-	ldr	x6, [x0, #:lo12:.LANCHOR156]
-	cbnz	x6, .L2091
-.L2092:
+	cbnz	w6, .L2094
+.L2097:
+	adrp	x0, .LANCHOR157
+	ldr	x6, [x0, #:lo12:.LANCHOR157]
+	cbnz	x6, .L2095
+.L2096:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2089
+	cbz	w0, .L2093
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2139
-.L2086:
+	b	.L2141
+.L2090:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2087
-.L2090:
+	b	.L2091
+.L2094:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12431,21 +12489,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2093
-.L2139:
+	beq	.L2097
+.L2141:
 	mov	w5, w0
-.L2089:
+.L2093:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2095
+	beq	.L2099
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2088
-.L2091:
+	b	.L2092
+.L2095:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12455,9 +12513,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2092
-	b	.L2139
-.L2095:
+	beq	.L2096
+	b	.L2141
+.L2099:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12467,62 +12525,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2097
+	bne	.L2101
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2097
+	cbnz	w0, .L2101
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2097
+	bne	.L2101
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2098:
+.L2102:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2085
-.L2097:
+	b	.L2089
+.L2101:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2098
-.L2101:
+	b	.L2102
+.L2105:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2100
+	beq	.L2104
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2070:
+.L2074:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2103
+	bne	.L2107
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2105
-	adrp	x0, .LC125
+	cbnz	w0, .L2069
+	adrp	x0, .LC126
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2105:
-	adrp	x0, .LANCHOR168
-	str	wzr, [x0, #:lo12:.LANCHOR168]
-	b	.L2119
+.L2069:
+	adrp	x0, .LANCHOR169
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+	b	.L2121
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12545,14 +12603,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2142
-	adrp	x1, .LANCHOR169
+	bhi	.L2144
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 651
-	add	x1, x1, :lo12:.LANCHOR169
+	mov	w2, 655
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2142:
+.L2144:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12560,12 +12618,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2143
+	cbz	w25, .L2145
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2143:
+.L2145:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12665,21 +12723,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2151:
+.L2153:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2152
+	cbnz	w0, .L2154
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2152:
+.L2154:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2151
+	b	.L2153
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12696,13 +12754,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2155:
+.L2157:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2156
+	cbnz	w0, .L2158
 	cmp	w24, 2
-	bne	.L2157
+	bne	.L2159
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12782,21 +12840,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2158:
+.L2160:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2156:
+.L2158:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2155
-.L2157:
+	b	.L2157
+.L2159:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2158
+	b	.L2160
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12819,40 +12877,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2161
-	adrp	x1, .LANCHOR170
+	bhi	.L2163
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 702
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 706
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2161:
+.L2163:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2162
+	cbnz	w0, .L2164
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2163
+	bne	.L2165
 	bl	nandc_wait_flash_ready
-.L2162:
+.L2164:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2164
+	cbnz	w22, .L2166
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2165
+	cbz	w0, .L2167
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2165:
+.L2167:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -12882,16 +12940,16 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs.constprop.29
-.L2163:
+.L2165:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2162
-.L2164:
+	b	.L2164
+.L2166:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2165
+	b	.L2167
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -12910,23 +12968,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2171
+	beq	.L2173
 	adrp	x2, .LANCHOR49
 	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2173:
+.L2175:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2172
+	bne	.L2174
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2172
+	bne	.L2174
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2171:
+.L2173:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12938,12 +12996,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2172:
+.L2174:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2173
-	b	.L2171
+	bne	.L2175
+	b	.L2173
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12960,25 +13018,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2180
+	cbz	w0, .L2182
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2180
+	tbz	x0, 8, .L2182
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC126
+	adrp	x0, .LC127
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2180:
+.L2182:
 	adrp	x25, .LANCHOR38
 	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
 	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2181:
-	cbnz	w20, .L2192
-.L2205:
+.L2183:
+	cbnz	w20, .L2194
+.L2207:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12987,49 +13045,49 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2192:
+.L2194:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2182:
+.L2184:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2183
+	cbnz	w0, .L2185
 	cmp	w20, 1
-	beq	.L2184
+	beq	.L2186
 	ldrb	w0, [x25]
-	cbnz	w0, .L2185
-.L2184:
+	cbnz	w0, .L2187
+.L2186:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2186:
+.L2188:
 	subs	w20, w20, #1
-	beq	.L2205
+	beq	.L2207
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2181
-.L2183:
+	b	.L2183
+.L2185:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2182
-.L2185:
+	b	.L2184
+.L2187:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2187
-	adrp	x1, .LANCHOR171
+	bne	.L2189
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR171
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2187:
+.L2189:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2188
+	bne	.L2190
 	adrp	x0, .LANCHOR99
 	ldrh	w2, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR98
@@ -13052,9 +13110,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2188
+	bne	.L2190
 	cmp	w21, w3
-	beq	.L2188
+	beq	.L2190
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13070,12 +13128,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2186
-.L2188:
+	b	.L2188
+.L2190:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2186
+	b	.L2188
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13088,17 +13146,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR172
-	cbz	w1, .L2208
-	ldrb	w2, [x20, #:lo12:.LANCHOR172]
+	adrp	x20, .LANCHOR173
+	cbz	w1, .L2210
+	ldrb	w2, [x20, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2208:
+.L2210:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR172]
+	strb	w0, [x20, #:lo12:.LANCHOR173]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13113,126 +13171,138 @@ ftl_flush:
 flash_prog_page_en:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w22, w0, 255
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
 	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
 	mov	w20, w1
 	stp	x25, x26, [sp, 64]
-	mov	x24, x2
+	mov	x23, x2
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	mov	x23, x3
+	mov	x22, x3
 	mov	w25, w4
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
-	cmp	w0, w22
-	bhi	.L2214
-	adrp	x1, .LANCHOR173
+	cmp	w0, w24
+	bhi	.L2216
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 476
-	add	x1, x1, :lo12:.LANCHOR173
+	mov	w2, 478
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2214:
+.L2216:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2224
+	ldrb	w26, [x0, w24, sxtw]
+	cbnz	w19, .L2226
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2216
+	cbz	w1, .L2218
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2224
-.L2216:
+	cbz	w1, .L2226
+.L2218:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2217
+	cbz	w0, .L2219
 	add	w19, w19, w1, lsl 1
-.L2215:
+.L2217:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2218
-	adrp	x0, .LC127
+	tbz	x0, 4, .L2220
+	adrp	x0, .LC128
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2218:
+.L2220:
 	mov	w1, w19
 	mov	w4, w25
-	mov	x3, x23
-	mov	x2, x24
+	mov	x3, x22
+	mov	x2, x23
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2219
-	adrp	x26, .LANCHOR160
-	adrp	x21, .LANCHOR161
+	cbz	w21, .L2221
+	adrp	x26, .LANCHOR161
+	adrp	x21, .LANCHOR162
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR160]
-	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR161]
+	ldr	x3, [x26, #:lo12:.LANCHOR161]
+	mov	w0, w24
+	ldr	x2, [x21, #:lo12:.LANCHOR162]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2220
-	ldr	x0, [x21, #:lo12:.LANCHOR161]
-	ldr	w1, [x24]
+	beq	.L2222
+	ldr	x0, [x21, #:lo12:.LANCHOR162]
+	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2220
-	ldr	x0, [x26, #:lo12:.LANCHOR160]
-	ldr	w1, [x23]
+	bne	.L2222
+	ldr	x0, [x26, #:lo12:.LANCHOR161]
+	ldr	w1, [x22]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2219
-.L2220:
-	ldr	x1, [x26, #:lo12:.LANCHOR160]
+	beq	.L2221
+.L2222:
 	mov	w3, 4
-	adrp	x0, .LC128
+	mov	x1, x23
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC128
-	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR161]
-	mov	w3, 4
 	adrp	x0, .LC129
-	mov	w2, w3
 	add	x0, x0, :lo12:.LC129
 	bl	rknand_print_hex
-.L2221:
-	mov	w1, w20
+	mov	w3, 4
+	mov	x1, x22
+	mov	w2, w3
 	adrp	x0, .LC130
 	add	x0, x0, :lo12:.LC130
+	bl	rknand_print_hex
+	ldr	x1, [x26, #:lo12:.LANCHOR161]
+	mov	w3, 4
+	adrp	x0, .LC131
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC131
+	bl	rknand_print_hex
+	ldr	x1, [x21, #:lo12:.LANCHOR162]
+	mov	w3, 4
+	adrp	x0, .LC132
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC132
+	bl	rknand_print_hex
+.L2223:
+	mov	w1, w20
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-	mov	w2, 502
-	adrp	x1, .LANCHOR173
+	mov	w2, 506
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR173
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2222
-.L2217:
+	b	.L2224
+.L2219:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2215
-.L2224:
+	b	.L2217
+.L2226:
 	mov	w19, w20
-	b	.L2215
-.L2219:
+	b	.L2217
+.L2221:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2221
-.L2222:
+	beq	.L2223
+.L2224:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13250,7 +13320,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR174
+	adrp	x25, .LANCHOR175
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
@@ -13263,45 +13333,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR174]
+	str	wzr, [x25, #:lo12:.LANCHOR175]
 	str	x0, [x29, 96]
-.L2236:
+.L2238:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2246
+	bls	.L2248
 	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2247
-.L2245:
+	b	.L2249
+.L2247:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2237
-	adrp	x0, .LC131
+	tbz	x0, 12, .L2239
+	adrp	x0, .LC134
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2237:
+.L2239:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2238
+	cbnz	w20, .L2240
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2239
-.L2238:
+	bcs	.L2241
+.L2240:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2239
+	cbnz	w0, .L2241
 	adrp	x0, .LANCHOR105
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR105]
@@ -13309,54 +13379,54 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2240
+	cbz	w0, .L2242
 	adrp	x0, .LANCHOR68
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2262
+	bne	.L2264
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2262
+	cbz	w0, .L2264
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2262
-.L2244:
+	cbnz	w0, .L2264
+.L2246:
 	adrp	x0, .LANCHOR68
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2243:
+.L2245:
 	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR174
+	add	x3, x25, :lo12:.LANCHOR175
 	add	x2, x24, :lo12:ftl_tmp_buffer
 	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2239
-.L2262:
+	cbz	w0, .L2241
+.L2264:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2239:
+.L2241:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2247:
+.L2249:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2245
+	bhi	.L2247
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2236
-.L2240:
-	cbz	w23, .L2243
-	b	.L2244
-.L2246:
-	cbz	w23, .L2248
+	b	.L2238
+.L2242:
+	cbz	w23, .L2245
+	b	.L2246
+.L2248:
+	cbz	w23, .L2250
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -13364,7 +13434,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2248:
+.L2250:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13399,18 +13469,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2263
+	bne	.L2265
 	mov	w2, 2150
-	adrp	x1, .LANCHOR175
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC130
+	adrp	x0, .LC133
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L2263:
+.L2265:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13429,24 +13499,24 @@ ftl_info_flush:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR177
+	adrp	x22, .LANCHOR178
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR177
+	add	x25, x22, :lo12:.LANCHOR178
 	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR176
+	adrp	x20, .LANCHOR177
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR176
+	add	x0, x20, :lo12:.LANCHOR177
 	bl	ftl_memset
-.L2267:
-	add	x0, x22, :lo12:.LANCHOR177
-	ldrb	w6, [x22, #:lo12:.LANCHOR177]
+.L2269:
+	add	x0, x22, :lo12:.LANCHOR178
+	ldrb	w6, [x22, #:lo12:.LANCHOR178]
 	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
 	adrp	x0, .LANCHOR97
@@ -13454,41 +13524,41 @@ ftl_info_flush:
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR176
-	str	w27, [x20, #:lo12:.LANCHOR176]
+	add	x0, x20, :lo12:.LANCHOR177
+	str	w27, [x20, #:lo12:.LANCHOR177]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2268
+	tbz	x0, 12, .L2270
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC132
+	adrp	x0, .LC135
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC135
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2268:
+.L2270:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2269
-	adrp	x19, .LANCHOR178
+	bhi	.L2271
+	adrp	x19, .LANCHOR179
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR178
+	add	x19, x19, :lo12:.LANCHOR179
 	add	x3, x3, :lo12:.LC0
-.L2276:
+.L2278:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2270
+	bls	.L2272
 	mov	x0, 0
-.L2275:
+.L2277:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13497,24 +13567,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2271
+	bhi	.L2273
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2274:
+.L2276:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2270:
+.L2272:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2276
+	beq	.L2278
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -13522,7 +13592,7 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR176
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13530,53 +13600,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2277:
+.L2279:
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR176
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR179
+	adrp	x0, .LANCHOR180
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2278
-	ldrb	w1, [x0, #:lo12:.LANCHOR179]
-	cbz	w1, .L2279
-.L2278:
-	strb	wzr, [x0, #:lo12:.LANCHOR179]
-	b	.L2267
-.L2271:
+	beq	.L2280
+	ldrb	w1, [x0, #:lo12:.LANCHOR180]
+	cbz	w1, .L2281
+.L2280:
+	strb	wzr, [x0, #:lo12:.LANCHOR180]
+	b	.L2269
+.L2273:
 	cmp	w2, 255
-	bne	.L2274
+	bne	.L2276
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2275
+	bne	.L2277
 	mov	w24, w0
-	b	.L2274
-.L2269:
+	b	.L2276
+.L2271:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2277
+	cbnz	w0, .L2279
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2277
-.L2279:
-	cbnz	w24, .L2280
-.L2288:
-	adrp	x0, .LANCHOR177
-	ldrb	w0, [x0, #:lo12:.LANCHOR177]
+	b	.L2279
+.L2281:
+	cbnz	w24, .L2282
+.L2290:
+	adrp	x0, .LANCHOR178
+	ldrb	w0, [x0, #:lo12:.LANCHOR178]
 	cmp	w0, 255
-	bne	.L2282
-	adrp	x1, .LANCHOR178
+	bne	.L2284
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR178
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2282:
+.L2284:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13585,17 +13655,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2280:
+.L2282:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR178
+	adrp	x20, .LANCHOR179
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR178
+	add	x20, x20, :lo12:.LANCHOR179
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2283:
+.L2285:
 	cmp	w19, 7
-	bhi	.L2288
+	bhi	.L2290
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13603,24 +13673,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2284
+	bhi	.L2286
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2285:
+.L2287:
 	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2286
-.L2284:
-	cmp	w23, 255
-	bne	.L2285
+	b	.L2288
 .L2286:
+	cmp	w23, 255
+	bne	.L2287
+.L2288:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2283
+	b	.L2285
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13628,17 +13698,17 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR180
-	adrp	x1, .LANCHOR179
+	adrp	x0, .LANCHOR181
+	adrp	x1, .LANCHOR180
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR180]
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR179]
-	adrp	x1, .LANCHOR181
+	strb	w0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR182
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR181]
+	strb	w0, [x1, #:lo12:.LANCHOR182]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
@@ -13647,7 +13717,7 @@ ftl_info_blk_init:
 	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR177
+	adrp	x21, .LANCHOR178
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
@@ -13663,7 +13733,7 @@ ftl_info_blk_init:
 	bl	ftl_memset
 	adrp	x25, .LANCHOR121
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR177
+	add	x0, x21, :lo12:.LANCHOR178
 	mov	w27, 21574
 	add	x26, x26, :lo12:.LANCHOR105
 	add	x25, x25, :lo12:.LANCHOR121
@@ -13671,9 +13741,9 @@ ftl_info_blk_init:
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR177]
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strh	wzr, [x0, 2]
-.L2304:
+.L2306:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13681,26 +13751,26 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2303
-.L2308:
+	bne	.L2305
+.L2310:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2304
+	bne	.L2306
 	mov	w24, 0
-.L2305:
+.L2307:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2309
+	tbz	x0, 12, .L2311
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2309:
+.L2311:
 	cmn	w19, #1
-	bne	.L2310
+	bne	.L2312
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
@@ -13709,11 +13779,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 17
+	mov	w1, 20
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2302:
+.L2304:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13721,12 +13791,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2303:
+.L2305:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR176
-	add	x7, x7, :lo12:.LANCHOR176
+	adrp	x7, .LANCHOR177
+	add	x7, x7, :lo12:.LANCHOR177
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13739,7 +13809,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2306
+	bne	.L2308
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13747,30 +13817,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2306:
+.L2308:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2307
+	tbz	x0, 12, .L2309
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2307:
+.L2309:
 	cmn	w5, #1
-	beq	.L2308
+	beq	.L2310
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2308
+	bne	.L2310
 	mov	w19, w24
-	b	.L2305
-.L2310:
+	b	.L2307
+.L2312:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
@@ -13782,11 +13852,11 @@ ftl_info_blk_init:
 	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR177
-	strb	w1, [x21, #:lo12:.LANCHOR177]
+	add	x0, x21, :lo12:.LANCHOR178
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR176
-	add	x24, x24, :lo12:.LANCHOR176
+	adrp	x24, .LANCHOR177
+	add	x24, x24, :lo12:.LANCHOR177
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -13794,11 +13864,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR177]
+	ldrb	w25, [x21, #:lo12:.LANCHOR178]
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2312:
-	tbnz	w23, #31, .L2315
+.L2314:
+	tbnz	w23, #31, .L2317
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13806,13 +13876,13 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2313
+	beq	.L2315
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2313
-.L2315:
-	add	x21, x21, :lo12:.LANCHOR177
+	bne	.L2315
+.L2317:
+	add	x21, x21, :lo12:.LANCHOR178
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
@@ -13824,12 +13894,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2302
-.L2313:
+	b	.L2304
+.L2315:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2312
+	b	.L2314
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13846,21 +13916,21 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2331
+	cbz	w1, .L2333
 	str	wzr, [x0, 520]
-.L2331:
+.L2333:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR182
+	adrp	x22, .LANCHOR183
 	adrp	x21, .LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR182
+	add	x22, x22, :lo12:.LANCHOR183
 	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2332:
+.L2334:
 	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2335:
+.L2337:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -13868,26 +13938,26 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2333
+	bcc	.L2335
 	bl	ftl_ext_alloc_new_blk
-.L2333:
+.L2335:
 	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2334
+	bne	.L2336
 	adrp	x0, .LC0
 	mov	w2, 1746
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2334:
+.L2336:
 	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR176
-	add	x25, x27, :lo12:.LANCHOR176
+	adrp	x27, .LANCHOR177
+	add	x25, x27, :lo12:.LANCHOR177
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13909,7 +13979,7 @@ ftl_ext_info_flush:
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR176]
+	str	wzr, [x27, #:lo12:.LANCHOR177]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
@@ -13922,16 +13992,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2335
+	beq	.L2337
 	cmn	w0, #1
-	adrp	x0, .LANCHOR181
-	beq	.L2336
-	ldrb	w1, [x0, #:lo12:.LANCHOR181]
-	cbz	w1, .L2337
-.L2336:
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
-	b	.L2332
-.L2337:
+	adrp	x0, .LANCHOR182
+	beq	.L2338
+	ldrb	w1, [x0, #:lo12:.LANCHOR182]
+	cbz	w1, .L2339
+.L2338:
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
+	b	.L2334
+.L2339:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13958,11 +14028,11 @@ ftl_ext_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR176
+	adrp	x24, .LANCHOR177
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR176
+	add	x3, x24, :lo12:.LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
@@ -13979,18 +14049,18 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2348
+	tbz	x0, 12, .L2350
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR183
+	adrp	x1, .LANCHOR184
 	and	w4, w21, 65535
 	mov	w3, w22
 	mov	w2, 1790
-	add	x1, x1, :lo12:.LANCHOR183
+	add	x1, x1, :lo12:.LANCHOR184
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2348:
+.L2350:
 	adrp	x26, .LANCHOR121
 	adrp	x28, .LANCHOR105
 	mov	w5, 20038
@@ -13998,14 +14068,14 @@ ftl_ext_info_init:
 	add	x28, x28, :lo12:.LANCHOR105
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2349:
+.L2351:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2354
+	tbnz	x0, 15, .L2356
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR176
+	add	x3, x24, :lo12:.LANCHOR177
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14014,22 +14084,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2350
+	beq	.L2352
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2350
-.L2354:
+	bne	.L2352
+.L2356:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2352
+	bgt	.L2354
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2352:
+.L2354:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14050,9 +14120,9 @@ ftl_ext_info_init:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2350:
+.L2352:
 	add	w23, w23, 1
-	b	.L2349
+	b	.L2351
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14085,14 +14155,14 @@ ftl_low_format_data_init:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2363
-	adrp	x1, .LANCHOR184
+	bcs	.L2365
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
 	mov	w2, 1973
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2363:
+.L2365:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
@@ -14116,8 +14186,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR185
-	ldrh	w1, [x1, #:lo12:.LANCHOR185]
+	adrp	x1, .LANCHOR186
+	ldrh	w1, [x1, #:lo12:.LANCHOR186]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14184,13 +14254,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR186
+	adrp	x20, .LANCHOR187
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR186
+	add	x20, x20, :lo12:.LANCHOR187
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14198,30 +14268,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2368:
+.L2370:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2366
+	bhi	.L2368
 	mov	w2, 2027
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2366:
+.L2368:
 	cmp	w21, 255
-	beq	.L2367
+	beq	.L2369
 	adrp	x0, .LANCHOR105
 	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2367:
+.L2369:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2368
+	bne	.L2370
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14235,9 +14305,9 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2369:
+.L2371:
 	cmp	x0, x2
-	bne	.L2370
+	bne	.L2372
 	adrp	x21, .LANCHOR97
 	mov	w1, 21574
 	adrp	x24, .LANCHOR59
@@ -14248,11 +14318,11 @@ ftl_low_format:
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2371:
+.L2373:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2379
+	bhi	.L2381
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
 	ldrb	w2, [x23, #:lo12:.LANCHOR98]
@@ -14271,7 +14341,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2382:
+.L2384:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14280,7 +14350,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2382
+	bne	.L2384
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
@@ -14292,14 +14362,14 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2383
-	adrp	x0, .LC137
+	tbz	x0, 12, .L2385
+	adrp	x0, .LC140
 	mov	w3, w20
 	mov	w2, 128
 	mov	w1, 2073
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2383:
+.L2385:
 	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
@@ -14322,9 +14392,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2384:
+.L2386:
 	cmp	w20, w12
-	bcc	.L2390
+	bcc	.L2392
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14340,14 +14410,14 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2370:
+.L2372:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2369
-.L2379:
+	b	.L2371
+.L2381:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
@@ -14361,16 +14431,16 @@ ftl_low_format:
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2372:
+.L2374:
 	cmp	w8, w14
-	bcs	.L2376
+	bcs	.L2378
 	add	w15, w11, w7
-	b	.L2377
-.L2375:
+	b	.L2379
+.L2377:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2373
+	cbz	w0, .L2375
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14378,29 +14448,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2374:
+.L2376:
 	add	w7, w7, 1
-.L2377:
+.L2379:
 	cmp	w7, w15
-	bne	.L2375
+	bne	.L2377
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2372
-.L2373:
+	b	.L2374
+.L2375:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2374
-.L2376:
-	cbnz	w10, .L2378
+	b	.L2376
+.L2378:
+	cbnz	w10, .L2380
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2378:
+.L2380:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2371
-.L2390:
+	b	.L2373
+.L2392:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14408,48 +14478,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2385:
+.L2387:
 	cmp	w5, w15
-	bcc	.L2392
+	bcc	.L2394
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2384
-.L2388:
+	b	.L2386
+.L2390:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2386
+	tbnz	x11, 0, .L2388
 	cmp	w13, 1
-	bls	.L2391
+	bls	.L2393
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2387:
+.L2389:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2386:
+.L2388:
 	add	x7, x7, 1
-.L2389:
+.L2391:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2388
+	bcc	.L2390
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2385
-.L2391:
-	mov	w0, w1
 	b	.L2387
-.L2392:
-	mov	x7, 0
+.L2393:
+	mov	w0, w1
 	b	.L2389
+.L2394:
+	mov	x7, 0
+	b	.L2391
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14458,8 +14528,8 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
@@ -14476,9 +14546,9 @@ ftl_re_low_format:
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2403:
+.L2405:
 	cmp	w1, w7
-	bcc	.L2407
+	bcc	.L2409
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14489,29 +14559,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2407:
+.L2409:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2404
+	bne	.L2406
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2405:
+.L2407:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2403
-.L2404:
+	b	.L2405
+.L2406:
 	cmp	w6, 16
-	bne	.L2406
+	bne	.L2408
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2405
-.L2406:
+	b	.L2407
+.L2408:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2405
+	b	.L2407
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14533,7 +14603,7 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2412
+	bne	.L2414
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
@@ -14545,15 +14615,15 @@ ftl_write_last_log_page:
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2413
+	beq	.L2415
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR174
+	adrp	x0, .LANCHOR175
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR174
+	add	x6, x0, :lo12:.LANCHOR175
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR174]
+	str	w1, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
@@ -14570,13 +14640,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2413:
+.L2415:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2412:
+.L2414:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14596,41 +14666,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2419
+	tbz	x0, 12, .L2421
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2419:
+.L2421:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2420
+	tbz	x0, 12, .L2422
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2420:
+.L2422:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2421
+	tbz	x0, 12, .L2423
 	ldrh	w1, [x28]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	printf
-.L2421:
+.L2423:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2422
+	tbz	x0, 12, .L2424
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC142
+	adrp	x0, .LC145
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-.L2422:
+.L2424:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2418
+	bcs	.L2420
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
@@ -14641,11 +14711,11 @@ ftl_open_sblk_recovery:
 	add	x0, x26, :lo12:.LANCHOR121
 	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2425:
+.L2427:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2438
-.L2428:
+	bhi	.L2440
+.L2430:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -14655,22 +14725,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2439
-	adrp	x1, .LANCHOR187
+	beq	.L2441
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1472
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2439:
+.L2441:
 	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2440:
+.L2442:
 	cmp	w1, w3
-	bcc	.L2442
+	bcc	.L2444
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR9
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -14678,32 +14748,32 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2443
+	tbz	x0, 12, .L2445
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC143
+	adrp	x0, .LC146
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC146
 	bl	printf
-.L2443:
+.L2445:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR73
-	adrp	x26, .LC144
+	adrp	x26, .LC147
 	add	x24, x24, :lo12:.LANCHOR73
 	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC144
+	add	x26, x26, :lo12:.LC147
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2444:
+.L2446:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2447
+	bcc	.L2449
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
@@ -14713,17 +14783,17 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2448
-	adrp	x1, .LANCHOR187
+	beq	.L2450
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1502
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2448:
+.L2450:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2418
+	bne	.L2420
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14732,25 +14802,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2438:
+.L2440:
 	ldrb	w20, [x28, 5]
 	adrp	x24, .LANCHOR105
 	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2426:
+.L2428:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2437
+	bhi	.L2439
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2425
-.L2437:
+	b	.L2427
+.L2439:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2427
+	beq	.L2429
 	ldr	x1, [x29, 136]
 	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
@@ -14760,36 +14830,36 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2428
+	beq	.L2430
 	cmn	w0, #1
-	beq	.L2429
+	beq	.L2431
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2429
+	bne	.L2431
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2429
+	bne	.L2431
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2428
-.L2429:
-	adrp	x0, .LANCHOR180
+	beq	.L2430
+.L2431:
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR180]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2430
-	adrp	x1, .LANCHOR187
+	beq	.L2432
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1395
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2430:
+.L2432:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -14797,28 +14867,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2431
-	adrp	x1, .LANCHOR187
+	beq	.L2433
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2431:
+.L2433:
 	cmn	w24, #1
-	beq	.L2433
+	beq	.L2435
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2433
+	beq	.L2435
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2435
+	cbz	x25, .L2437
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2435
+	beq	.L2437
 	cmn	w0, #1
-	beq	.L2435
+	beq	.L2437
 	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
@@ -14833,11 +14903,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2435
+	bne	.L2437
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR176
+	adrp	x8, .LANCHOR177
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR176
+	add	x2, x8, :lo12:.LANCHOR177
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14846,13 +14916,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR176]
+	ldr	w0, [x8, #:lo12:.LANCHOR177]
 	cmp	w10, w0
-	bhi	.L2435
+	bhi	.L2437
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2433
+	beq	.L2435
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
 	ldrh	w1, [x6, #:lo12:.LANCHOR99]
@@ -14864,7 +14934,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2433:
+.L2435:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14872,37 +14942,37 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2427:
+.L2429:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2426
-.L2442:
+	b	.L2428
+.L2444:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2441
+	beq	.L2443
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2441:
+.L2443:
 	add	w1, w1, 1
-	b	.L2440
-.L2447:
-	cbz	w27, .L2445
+	b	.L2442
+.L2449:
+	cbz	w27, .L2447
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2445
+	bls	.L2447
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2446
+	tbz	x0, 12, .L2448
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2446:
+.L2448:
 	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
@@ -14918,37 +14988,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2445:
+.L2447:
 	add	w20, w20, 1
-	b	.L2444
-.L2435:
+	b	.L2446
+.L2437:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR118
 	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2433
+	bcs	.L2435
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2433
+	bge	.L2435
 	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2436
+	bls	.L2438
 	str	w1, [x0, 8]
-.L2436:
+.L2438:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2433
-.L2418:
+	b	.L2435
+.L2420:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14978,7 +15048,7 @@ pm_write_page:
 	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2498:
+.L2500:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
@@ -14986,37 +15056,37 @@ pm_write_page:
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2499
+	bcs	.L2501
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2500
-.L2499:
+	bne	.L2502
+.L2501:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2500:
+.L2502:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2501
-	adrp	x1, .LANCHOR188
+	bne	.L2503
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR188
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2501:
+.L2503:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR189
+	adrp	x27, .LANCHOR190
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR189]
+	ldr	x0, [x27, #:lo12:.LANCHOR190]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR189]
+	ldr	x3, [x27, #:lo12:.LANCHOR190]
 	mov	x2, x25
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
@@ -15033,28 +15103,28 @@ pm_write_page:
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR190
-	beq	.L2502
-	ldrb	w3, [x1, #:lo12:.LANCHOR190]
-	cbz	w3, .L2503
-.L2502:
-	strb	wzr, [x1, #:lo12:.LANCHOR190]
-	b	.L2498
-.L2503:
+	adrp	x1, .LANCHOR191
+	beq	.L2504
+	ldrb	w3, [x1, #:lo12:.LANCHOR191]
+	cbz	w3, .L2505
+.L2504:
+	strb	wzr, [x1, #:lo12:.LANCHOR191]
+	b	.L2500
+.L2505:
 	cmn	w0, #1
-	bne	.L2505
+	bne	.L2507
 	mov	w1, w26
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2498
-.L2505:
+	b	.L2500
+.L2507:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2506
+	bcs	.L2508
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2506:
+.L2508:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15078,33 +15148,33 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2512
-	adrp	x2, .LANCHOR191
+	tbz	x0, 12, .L2514
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR191
-	mov	w1, 251
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 250
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2512:
-	adrp	x23, .LANCHOR158
+.L2514:
+	adrp	x23, .LANCHOR159
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR158]
-	adrp	x21, .LANCHOR159
+	ldr	x0, [x23, #:lo12:.LANCHOR159]
+	adrp	x21, .LANCHOR160
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC147
+	adrp	x24, .LC150
 	adrp	x25, .LANCHOR135
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC147
+	add	x24, x24, :lo12:.LC150
 	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR159
+	add	x27, x21, :lo12:.LANCHOR160
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15112,9 +15182,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2513:
-	add	x28, x21, :lo12:.LANCHOR159
-	ldrb	w4, [x21, #:lo12:.LANCHOR159]
+.L2515:
+	add	x28, x21, :lo12:.LANCHOR160
+	ldrb	w4, [x21, #:lo12:.LANCHOR160]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -15127,7 +15197,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2514
+	blt	.L2516
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15135,32 +15205,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR159]
+	ldrb	w0, [x21, #:lo12:.LANCHOR160]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR159]
+	strb	w7, [x21, #:lo12:.LANCHOR160]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2523:
+.L2525:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2515
-.L2518:
+	b	.L2517
+.L2520:
 	mov	w26, 1
-	b	.L2513
-.L2514:
+	b	.L2515
+.L2516:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2523
-.L2515:
+	cbz	w1, .L2525
+.L2517:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR158]
+	ldr	x3, [x23, #:lo12:.LANCHOR159]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -15174,14 +15244,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2516
+	bne	.L2518
 	mov	w1, w19
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-	b	.L2513
-.L2516:
-	cbz	w26, .L2518
+	b	.L2515
+.L2518:
+	cbz	w26, .L2520
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15205,23 +15275,25 @@ nand_flash_init:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2525
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2527
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2220
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2239
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2525:
-	mov	x0, x19
+.L2527:
+	adrp	x0, .LANCHOR155
 	adrp	x23, .LANCHOR16
+	adrp	x22, .LANCHOR41
+	add	x24, x22, :lo12:.LANCHOR41
+	str	wzr, [x0, #:lo12:.LANCHOR155]
+	mov	x0, x19
 	bl	nandc_init
 	adrp	x19, .LANCHOR34
-	adrp	x22, .LANCHOR41
 	add	x0, x19, :lo12:.LANCHOR34
-	add	x24, x22, :lo12:.LANCHOR41
-	str	x0, [x23, #:lo12:.LANCHOR16]
 	mov	x25, x24
+	str	x0, [x23, #:lo12:.LANCHOR16]
 	adrp	x0, .LANCHOR18
 	mov	w1, 1
 	mov	w20, 0
@@ -15237,19 +15309,19 @@ nand_flash_init:
 	adrp	x0, .LANCHOR136
 	add	x0, x0, :lo12:.LANCHOR136
 	bl	ftl_memset
-.L2531:
+.L2533:
 	mov	x1, x24
 	mov	w0, w20
 	bl	flash_read_id
-	cbnz	w20, .L2526
+	cbnz	w20, .L2528
 	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2527
-.L2529:
+	bls	.L2529
+.L2531:
 	mov	w19, -2
-.L2524:
+.L2526:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15257,56 +15329,56 @@ nand_flash_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2527:
+.L2529:
 	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2529
-.L2526:
+	beq	.L2531
+.L2528:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2530
+	bne	.L2532
 	strb	w26, [x24]
-.L2530:
+.L2532:
 	add	w20, w20, 1
 	add	x24, x24, 8
 	and	w20, w20, 255
 	cmp	w20, 4
-	bne	.L2531
-	adrp	x0, .LANCHOR193
-	add	x8, x0, :lo12:.LANCHOR193
+	bne	.L2533
+	adrp	x0, .LANCHOR194
+	add	x8, x0, :lo12:.LANCHOR194
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x22, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2534:
+.L2536:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2532
-	add	x0, x7, :lo12:.LANCHOR193
+	cbnz	w0, .L2534
+	add	x0, x7, :lo12:.LANCHOR194
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR194
-	add	x4, x1, :lo12:.LANCHOR194
+	adrp	x1, .LANCHOR195
+	add	x4, x1, :lo12:.LANCHOR195
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2533:
+.L2535:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2535
+	beq	.L2537
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2533
+	bne	.L2535
 	mov	w2, w0
-.L2535:
+.L2537:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR194
+	add	x1, x1, :lo12:.LANCHOR195
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
@@ -15320,41 +15392,41 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2536
+	bhi	.L2538
 	ldrb	w1, [x20, 20]
 	cmp	w1, 60
-	bls	.L2537
+	bls	.L2539
 	mov	w1, 60
 	strb	w1, [x20, 20]
-.L2537:
+.L2539:
 	cmp	w0, 8
-	bne	.L2536
+	bne	.L2538
 	ldrb	w0, [x22, #:lo12:.LANCHOR41]
 	mov	w1, 137
 	cmp	w0, 44
 	ccmp	w0, w1, 4, ne
-	bne	.L2536
+	bne	.L2538
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2536
+	bne	.L2538
 	strb	wzr, [x0, 28]
-.L2536:
+.L2538:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2538
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2540
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2244
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2264
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2538:
+.L2540:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR162
 	adrp	x22, .LANCHOR26
 	add	x20, x19, :lo12:.LANCHOR34
-	str	x0, [x1, #:lo12:.LANCHOR161]
+	str	x0, [x1, #:lo12:.LANCHOR162]
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR151
@@ -15364,33 +15436,33 @@ nand_flash_init:
 	str	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR160
-	str	x0, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR161
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	mov	w0, 64
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR153
 	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR158
-	str	x0, [x1, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR195
-	strb	wzr, [x0, #:lo12:.LANCHOR195]
+	adrp	x1, .LANCHOR159
+	str	x0, [x1, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR196
+	strb	wzr, [x0, #:lo12:.LANCHOR196]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR156
+	adrp	x20, .LANCHOR157
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR156]
+	str	xzr, [x20, #:lo12:.LANCHOR157]
 	ldr	x1, [x23, #:lo12:.LANCHOR16]
 	adrp	x23, .LANCHOR42
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
 	strb	w2, [x23, #:lo12:.LANCHOR42]
-	adrp	x2, .LANCHOR165
+	adrp	x2, .LANCHOR166
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR165]
+	strb	w3, [x2, #:lo12:.LANCHOR166]
 	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR38]
@@ -15411,178 +15483,172 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2539
+	bne	.L2541
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2539:
+.L2541:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR167
+	adrp	x1, .LANCHOR168
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR167]
+	strb	w0, [x1, #:lo12:.LANCHOR168]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2541
+	tbz	x1, 6, .L2542
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2542
-	adrp	x1, micron_read_retrial
-	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR156]
-	cmp	w0, 19
+	bhi	.L2543
+	adrp	x0, micron_read_retrial
+	mov	w1, 15
+	add	x0, x0, :lo12:micron_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR157]
+.L2593:
 	adrp	x0, .LANCHOR154
-	beq	.L2543
-	mov	w1, 7
-.L2590:
 	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2541
-.L2532:
+	b	.L2542
+.L2534:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 32
-	bne	.L2534
-	b	.L2529
+	cmp	x10, 36
+	bne	.L2536
+	b	.L2531
 .L2543:
-	mov	w1, 15
-	b	.L2590
-.L2542:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2545
+	bhi	.L2544
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR156]
+	str	x0, [x20, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
 .L2592:
 	mov	w1, 7
-	adrp	x0, .LANCHOR154
-	b	.L2590
-.L2545:
+	b	.L2593
+.L2544:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2546
+	bhi	.L2545
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR156]
+	str	x2, [x20, #:lo12:.LANCHOR157]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR154
-	beq	.L2547
+	beq	.L2546
 	mov	w2, 7
-.L2589:
+.L2591:
 	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2549
+	bhi	.L2548
 	mov	w1, 4
-.L2591:
+.L2594:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2541:
+.L2542:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2550
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2549
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2292
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2312
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2550:
+.L2549:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2551
+	tbz	x0, 0, .L2550
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2593:
+.L2595:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2553
+	bne	.L2552
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2554
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2553
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2313
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2347
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2554:
+.L2553:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2524
-.L2547:
+	b	.L2526
+.L2546:
 	mov	w2, 17
-	b	.L2589
-.L2549:
-	mov	w1, 5
 	b	.L2591
-.L2546:
-	sub	w0, w0, #36
+.L2548:
+	mov	w1, 5
+	b	.L2594
+.L2545:
+	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2541
+	bhi	.L2542
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR156]
+	str	x0, [x20, #:lo12:.LANCHOR157]
 	b	.L2592
-.L2551:
+.L2550:
 	mov	w0, 4
-	b	.L2593
-.L2553:
+	b	.L2595
+.L2552:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2555
+	bhi	.L2554
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR156]
-.L2555:
+	str	x0, [x20, #:lo12:.LANCHOR157]
+.L2554:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2557
+	tbz	x0, 2, .L2556
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2557
-	adrp	x0, .LANCHOR159
-	ldrb	w1, [x0, #:lo12:.LANCHOR159]
+	cbz	w0, .L2556
+	adrp	x0, .LANCHOR160
+	ldrb	w1, [x0, #:lo12:.LANCHOR160]
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2557
+	cbnz	w0, .L2556
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2557:
+.L2556:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2559
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2558
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
-	mov	w1, 2370
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	w1, 2404
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2559:
+.L2558:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2524
+	b	.L2526
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15610,20 +15676,20 @@ ftl_sysblk_dump:
 	add	x27, x27, :lo12:.LANCHOR105
 	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2595:
+.L2597:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2597
+	bhi	.L2599
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2598
-	adrp	x1, .LANCHOR196
+	cbz	w20, .L2600
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 1338
-	add	x1, x1, :lo12:.LANCHOR196
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2598:
+.L2600:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15633,7 +15699,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2597:
+.L2599:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15662,19 +15728,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2595
+	b	.L2597
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15685,32 +15751,32 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC151
+	adrp	x0, .LC154
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC151
+	add	x0, x0, :lo12:.LC154
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR10
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR177
-	add	x1, x0, :lo12:.LANCHOR177
+	adrp	x0, .LANCHOR178
+	add	x1, x0, :lo12:.LANCHOR178
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR177]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	ldrb	w1, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -15718,8 +15784,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15728,8 +15794,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x19, .LANCHOR73
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -15742,21 +15808,21 @@ dump_ftl_info:
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR111
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC157
+	adrp	x0, .LC160
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC157
+	add	x0, x0, :lo12:.LC160
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15764,15 +15830,15 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR110
-	adrp	x0, .LC160
+	adrp	x0, .LC163
 	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC163
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
@@ -15784,8 +15850,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15812,20 +15878,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2609
+	bne	.L2611
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2609:
+.L2611:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15841,42 +15907,42 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2615
-	adrp	x1, .LANCHOR197
+	bls	.L2617
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2615:
+.L2617:
 	adrp	x22, .LANCHOR97
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2616
+	bcs	.L2618
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	bl	printf
-	adrp	x0, .LANCHOR198
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR198]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2618
+	bcs	.L2620
 	mov	w2, 35
-.L2623:
-	adrp	x1, .LANCHOR197
+.L2625:
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2618
-.L2616:
+	b	.L2620
+.L2618:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -15885,69 +15951,69 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2619
+	cbnz	w21, .L2621
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	bl	printf
-	adrp	x0, .LANCHOR198
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR198]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2618:
+.L2620:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2619:
-	adrp	x20, .LANCHOR189
+.L2621:
+	adrp	x20, .LANCHOR190
 	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR189]
+	ldr	x2, [x20, #:lo12:.LANCHOR190]
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR189]
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2620
+	beq	.L2622
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	bl	printf
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR189]
-	adrp	x0, .LC168
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	adrp	x0, .LC171
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC171
 	bl	rknand_print_hex
-.L2620:
-	ldr	x0, [x20, #:lo12:.LANCHOR189]
+.L2622:
+	ldr	x0, [x20, #:lo12:.LANCHOR190]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2618
+	beq	.L2620
 	mov	w2, 59
-	b	.L2623
+	b	.L2625
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15967,21 +16033,21 @@ pm_gc:
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2626
+	blt	.L2628
 	bl	pm_free_sblk
 	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2626
+	blt	.L2628
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2628
-	adrp	x1, .LANCHOR199
-	add	x1, x1, :lo12:.LANCHOR199
+	bne	.L2630
+	adrp	x1, .LANCHOR200
+	add	x1, x1, :lo12:.LANCHOR200
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
@@ -15990,7 +16056,7 @@ pm_gc:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2628:
+.L2630:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR130
@@ -16002,28 +16068,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2629
+	beq	.L2631
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2629
+	cbz	x1, .L2631
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2629
+	tbz	w2, #31, .L2631
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2629:
+.L2631:
 	add	x1, x23, :lo12:.LANCHOR130
 	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2630:
+.L2632:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2632
+	bhi	.L2634
 	bl	pm_free_sblk
-.L2626:
+.L2628:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16031,7 +16097,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2632:
+.L2634:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16046,7 +16112,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2631
+	bne	.L2633
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16055,10 +16121,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2631:
+.L2633:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2630
+	b	.L2632
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16080,10 +16146,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR128
 	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2638
+	cbz	w0, .L2640
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2638:
+.L2640:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16101,17 +16167,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2645:
+.L2647:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2644
+	tbz	w0, #31, .L2646
 	mov	w0, w20
 	bl	pm_flush_id
-.L2644:
+.L2646:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2645
+	bne	.L2647
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16165,35 +16231,35 @@ pm_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR130
 	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR190
+	adrp	x0, .LANCHOR191
 	stp	x25, x26, [sp, 64]
 	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR190]
+	strb	w1, [x0, #:lo12:.LANCHOR191]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR189
+	adrp	x1, .LANCHOR190
 	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
 	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR189]
+	str	x0, [x1, #:lo12:.LANCHOR190]
 	mov	w25, -1
-.L2655:
+.L2657:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2654
+	cbz	w24, .L2656
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2654:
+.L2656:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2655
+	bne	.L2657
 	add	x0, x20, :lo12:.LANCHOR130
 	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR189]
+	ldr	x24, [x21, #:lo12:.LANCHOR190]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
@@ -16207,11 +16273,11 @@ pm_init:
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2656
+	bgt	.L2658
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
 	adrp	x27, .LANCHOR105
 	adrp	x28, .LANCHOR121
 	add	x27, x27, :lo12:.LANCHOR105
@@ -16219,14 +16285,14 @@ pm_init:
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2657:
+.L2659:
 	cmp	w21, w26
-	ble	.L2659
-	adrp	x0, .LANCHOR180
+	ble	.L2661
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
 	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR180]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
@@ -16236,7 +16302,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2656:
+.L2658:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16247,7 +16313,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2659:
+.L2661:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
@@ -16266,25 +16332,25 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2658
+	beq	.L2660
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2658
+	bcs	.L2660
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2658:
+.L2660:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2657
+	b	.L2659
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -16309,51 +16375,51 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2669
+	bcc	.L2671
 	mov	w1, w0
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	mov	w0, -1
-.L2668:
+.L2670:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2669:
+.L2671:
 	adrp	x24, .LANCHOR130
 	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2675:
+.L2677:
 	ldr	x1, [x0]
-	cbz	x1, .L2671
+	cbz	x1, .L2673
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2671
-.L2672:
-	cbnz	w23, .L2673
+	bne	.L2673
+.L2674:
+	cbnz	w23, .L2675
 	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2674:
+.L2676:
 	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2677
+	beq	.L2679
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2677:
+.L2679:
 	mov	w0, 0
-	b	.L2668
-.L2673:
+	b	.L2670
+.L2675:
 	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
@@ -16364,13 +16430,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR131
 	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2674
-.L2671:
+	b	.L2676
+.L2673:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2675
+	bne	.L2677
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -16380,17 +16446,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2676
+	beq	.L2678
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2676
+	tbz	w1, #31, .L2678
 	bl	pm_flush_id
-.L2676:
-	adrp	x0, .LANCHOR200
+.L2678:
+	adrp	x0, .LANCHOR201
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR200]
+	strb	w19, [x0, #:lo12:.LANCHOR201]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2672
+	b	.L2674
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16418,7 +16484,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2684
+	beq	.L2686
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16438,29 +16504,29 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2685
+	bne	.L2687
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2729:
+.L2731:
 	str	w0, [x26, 40]
-.L2686:
+.L2688:
 	mov	w1, 1
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2687
+	beq	.L2689
 	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2688
-.L2687:
+	beq	.L2690
+.L2689:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x1, [x26, 24]
@@ -16473,13 +16539,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC172
+	adrp	x0, .LC175
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC172
+	add	x0, x0, :lo12:.LC175
 	ldr	w1, [x26, 40]
 	ldr	w2, [x26, 52]
 	bl	printf
-.L2733:
+.L2735:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -16488,11 +16554,11 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2689:
+.L2691:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16502,9 +16568,9 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2716
+	beq	.L2718
 	bl	ftl_free_sblk
-.L2716:
+.L2718:
 	adrp	x0, .LANCHOR97
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
@@ -16513,7 +16579,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2683:
+.L2685:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16522,16 +16588,16 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2685:
+.L2687:
 	cmp	w0, 2
-	bne	.L2686
+	bne	.L2688
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2729
-.L2688:
+	b	.L2731
+.L2690:
 	adrp	x28, .LANCHOR72
 	adrp	x22, .LANCHOR73
 	adrp	x27, .LANCHOR147
@@ -16557,29 +16623,29 @@ gc_recovery:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2690
-.L2730:
+	beq	.L2692
+.L2732:
 	str	w0, [x29, 184]
-	adrp	x25, .LC173
+	adrp	x25, .LC176
 	ldr	x0, [x29, 152]
 	mov	w23, 0
 	mov	w22, 0
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
-	add	x0, x25, :lo12:.LC173
+	add	x0, x25, :lo12:.LC176
 	str	x0, [x29, 120]
-.L2692:
+.L2694:
 	sub	w0, w23, #1
 	str	w0, [x29, 188]
 	cmp	w23, w14
-	beq	.L2701
+	beq	.L2703
 	mov	x19, 0
-	b	.L2702
-.L2690:
+	b	.L2704
+.L2692:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2730
-.L2698:
+	b	.L2732
+.L2700:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16589,10 +16655,10 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2693
+	bne	.L2695
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2731:
+.L2733:
 	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
@@ -16604,13 +16670,13 @@ gc_recovery:
 	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2696
+	bne	.L2698
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2697
-.L2696:
+	beq	.L2699
+.L2698:
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
@@ -16626,35 +16692,35 @@ gc_recovery:
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2697
+	beq	.L2699
 	mov	x0, x26
 	bl	buf_free
-	b	.L2733
-.L2693:
+	b	.L2735
+.L2695:
 	cmp	w1, 2
-	bne	.L2695
+	bne	.L2697
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2731
-.L2695:
-	add	w0, w23, w0
-	b	.L2731
+	b	.L2733
 .L2697:
+	add	w0, w23, w0
+	b	.L2733
+.L2699:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2700:
+.L2702:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2698
+	bcs	.L2700
 	add	x19, x19, 1
-.L2702:
+.L2704:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2699
+	ble	.L2701
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
@@ -16662,11 +16728,11 @@ gc_recovery:
 	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2700
-.L2699:
-	add	w23, w23, 1
-	b	.L2692
+	b	.L2702
 .L2701:
+	add	w23, w23, 1
+	b	.L2694
+.L2703:
 	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -16685,20 +16751,20 @@ gc_recovery:
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2703:
+.L2705:
 	sub	w0, w28, #1
 	str	w0, [x29, 136]
 	cmp	w23, w28
-	beq	.L2714
+	beq	.L2716
 	mov	x26, 0
-	b	.L2715
-.L2711:
+	b	.L2717
+.L2713:
 	ldr	w0, [x29, 188]
 	ldr	x1, [x27, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
 	ldr	w5, [x1, x0]
 	cmn	w5, #1
-	beq	.L2704
+	beq	.L2706
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
@@ -16708,14 +16774,14 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w5, [x29, 108]
-	bne	.L2705
+	bne	.L2707
 	mov	w0, w5
 	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w5, [x29, 108]
-.L2705:
+.L2707:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
@@ -16724,10 +16790,10 @@ gc_recovery:
 	ldr	x1, [x29, 168]
 	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2706
+	bne	.L2708
 	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2732:
+.L2734:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16745,14 +16811,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2709
+	bne	.L2711
 	add	x1, x29, 200
 	mov	w0, w5
 	bl	pm_log2phys
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2710:
+.L2712:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16761,68 +16827,68 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2704
+	bne	.L2706
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2704
+	cbz	w1, .L2706
 	strh	wzr, [x0, x19]
-.L2704:
+.L2706:
 	add	w25, w25, 1
-.L2713:
+.L2715:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2711
+	bcs	.L2713
 	add	x26, x26, 1
-.L2715:
+.L2717:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2712
+	ble	.L2714
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR98
 	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2713
-.L2706:
+	b	.L2715
+.L2708:
 	cmp	w1, 2
-	bne	.L2708
+	bne	.L2710
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2732
-.L2708:
+	b	.L2734
+.L2710:
 	add	w0, w28, w0
-	b	.L2732
-.L2709:
+	b	.L2734
+.L2711:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2710
-.L2712:
-	add	w28, w28, 1
-	b	.L2703
+	b	.L2712
 .L2714:
+	add	w28, w28, 1
+	b	.L2705
+.L2716:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w22, [x0, x1, lsl 1]
 	ldrh	w0, [x20, 80]
 	bl	zftl_insert_data_list
-	b	.L2689
-.L2684:
+	b	.L2691
+.L2686:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2683
+	beq	.L2685
 	adrp	x19, .LANCHOR97
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2718
+	bne	.L2720
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -16832,11 +16898,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2718:
+.L2720:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2683
+	b	.L2685
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16858,21 +16924,21 @@ zftl_init:
 	strb	w0, [x1, #:lo12:.LANCHOR124]
 	adrp	x1, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR198
+	adrp	x20, .LANCHOR199
 	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR172
+	adrp	x1, .LANCHOR173
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR172]
+	strb	w0, [x1, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR119
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR201
-	str	w1, [x0, #:lo12:.LANCHOR201]
-	adrp	x1, .LC175
+	adrp	x0, .LANCHOR202
+	str	w1, [x0, #:lo12:.LANCHOR202]
+	adrp	x1, .LC178
 	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC175
+	add	x1, x1, :lo12:.LC178
 	add	x0, x0, :lo12:.LC91
 	bl	printf
 	adrp	x1, .LANCHOR34
@@ -16903,14 +16969,14 @@ zftl_init:
 	strh	w8, [x22, #:lo12:.LANCHOR80]
 	mul	w6, w6, w3
 	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR198]
+	strh	w10, [x20, #:lo12:.LANCHOR199]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
 	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2735:
+.L2737:
 	cmp	w4, w3
-	bcs	.L2736
+	bcs	.L2738
 	mul	w2, w0, w2
 	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
@@ -16919,9 +16985,9 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2737:
+.L2739:
 	cmp	w11, w1
-	bcs	.L2738
+	bcs	.L2740
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -16929,9 +16995,9 @@ zftl_init:
 	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR185
+	adrp	x24, .LANCHOR186
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR203
+	adrp	x27, .LANCHOR204
 	mul	w2, w2, w6
 	adrp	x26, .LANCHOR141
 	lsl	w1, w1, w4
@@ -16939,10 +17005,10 @@ zftl_init:
 	sub	w2, w2, #1
 	adrp	x25, .LANCHOR84
 	str	w1, [x4, #:lo12:.LANCHOR58]
-	adrp	x4, .LANCHOR202
-	str	w3, [x4, #:lo12:.LANCHOR202]
+	adrp	x4, .LANCHOR203
+	str	w3, [x4, #:lo12:.LANCHOR203]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR203]
+	str	w3, [x27, #:lo12:.LANCHOR204]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
 	adrp	x2, .LANCHOR101
@@ -16950,7 +17016,7 @@ zftl_init:
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR185]
+	strh	w0, [x24, #:lo12:.LANCHOR186]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
 	adrp	x8, .LANCHOR88
@@ -16963,10 +17029,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2739
+	bhi	.L2741
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2739:
+.L2741:
 	adrp	x7, .LANCHOR102
 	mov	w0, 2000
 	adrp	x3, .LANCHOR100
@@ -16983,11 +17049,11 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2740
+	beq	.L2742
 	adrp	x5, .LANCHOR70
 	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2741
-.L2740:
+	cbz	w5, .L2743
+.L2742:
 	mov	w5, 150
 	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
@@ -16996,80 +17062,80 @@ zftl_init:
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2741
+	cbnz	w2, .L2743
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2741:
+.L2743:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2743
+	tbz	x0, 12, .L2745
 	str	x4, [x29, 96]
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2743:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2744
-	ldr	w1, [x4, #:lo12:.LANCHOR202]
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
-	bl	printf
-.L2744:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2745
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
-	adrp	x0, .LC178
-	add	x0, x0, :lo12:.LC178
-	bl	printf
 .L2745:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2746
-	ldr	w1, [x27, #:lo12:.LANCHOR203]
-	adrp	x0, .LC179
-	add	x0, x0, :lo12:.LC179
+	ldr	w1, [x4, #:lo12:.LANCHOR203]
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	printf
 .L2746:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2747
-	ldrh	w1, [x24, #:lo12:.LANCHOR185]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
 .L2747:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2748
-	ldrh	w1, [x20, #:lo12:.LANCHOR198]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	ldr	w1, [x27, #:lo12:.LANCHOR204]
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
 	bl	printf
 .L2748:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2749
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
-	adrp	x0, .LC182
-	add	x0, x0, :lo12:.LC182
+	ldrh	w1, [x24, #:lo12:.LANCHOR186]
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
 .L2749:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2750
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	ldrh	w1, [x20, #:lo12:.LANCHOR199]
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
 .L2750:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L2751
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
+	bl	printf
+.L2751:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2752
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
+	bl	printf
+.L2752:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2753
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
-.L2751:
+.L2753:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17101,15 +17167,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2752
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	tbz	x0, 12, .L2754
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2752:
+.L2754:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR73]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR185]
+	ldrh	w22, [x24, #:lo12:.LANCHOR186]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17118,37 +17184,37 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2753
-	ldrh	w3, [x20, #:lo12:.LANCHOR198]
-	adrp	x0, .LC186
+	tbz	x0, 12, .L2755
+	ldrh	w3, [x20, #:lo12:.LANCHOR199]
+	adrp	x0, .LC189
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2753:
-	ldrh	w0, [x20, #:lo12:.LANCHOR198]
+.L2755:
+	ldrh	w0, [x20, #:lo12:.LANCHOR199]
 	cmp	w21, w0
-	bhi	.L2754
+	bhi	.L2756
 	cmp	w22, w0
-	bls	.L2755
-.L2754:
-.L2798:
-	b	.L2798
-.L2736:
+	bls	.L2757
+.L2756:
+.L2800:
+	b	.L2800
+.L2738:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2735
-.L2738:
+	b	.L2737
+.L2740:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2737
-.L2755:
+	b	.L2739
+.L2757:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2734
+	beq	.L2736
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR97
 	mov	w0, 1
@@ -17179,20 +17245,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR180
-	ldrb	w0, [x0, #:lo12:.LANCHOR180]
-	cbz	w0, .L2757
+	adrp	x0, .LANCHOR181
+	ldrb	w0, [x0, #:lo12:.LANCHOR181]
+	cbz	w0, .L2759
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2757:
+.L2759:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2734:
+.L2736:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17210,14 +17276,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2802
+	cbnz	w0, .L2804
 	bl	zftl_init
-.L2802:
+.L2804:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17246,12 +17312,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2805
+	tbz	x1, 8, .L2807
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2805:
+.L2807:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17262,12 +17328,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR121
 	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2806:
+.L2808:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2816
+	bhi	.L2818
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2817
+	tbz	x0, 8, .L2819
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17275,22 +17341,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC194
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2817:
+.L2819:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2818
-	adrp	x1, .LANCHOR204
+	beq	.L2820
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
 	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2818:
+.L2820:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17303,13 +17369,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2816:
+.L2818:
 	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2807
+	beq	.L2809
 	adrp	x0, .LANCHOR121
 	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
@@ -17317,42 +17383,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2808
+	tbz	x0, 8, .L2810
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC189
+	adrp	x0, .LC192
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2808:
+.L2810:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2809:
+.L2811:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2815
-.L2807:
+	bne	.L2817
+.L2809:
 	add	x22, x22, 1
-	b	.L2806
-.L2815:
+	b	.L2808
+.L2817:
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2810
+	beq	.L2812
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2810
+	bne	.L2812
 	adrp	x0, .LANCHOR148
 	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
@@ -17360,15 +17426,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2811
+	bne	.L2813
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2811:
+.L2813:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2812
+	bne	.L2814
 	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
@@ -17390,177 +17456,170 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2838:
+.L2840:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2810:
-	add	x19, x19, 4
-	b	.L2809
 .L2812:
+	add	x19, x19, 4
+	b	.L2811
+.L2814:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2814
+	tbz	x0, 8, .L2816
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2814:
+.L2816:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2838
+	b	.L2840
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
 	.global	gc_scan_src_blk_one_page
 	.type	gc_scan_src_blk_one_page, %function
 gc_scan_src_blk_one_page:
-	stp	x29, x30, [sp, -96]!
-	mov	w5, 0
-	mov	w6, 0
-	mov	w7, 65535
+	stp	x29, x30, [sp, -112]!
+	mov	w3, 0
+	mov	w4, 0
+	mov	w5, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR62
 	add	x1, x19, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
+	adrp	x20, .LANCHOR73
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	ldrb	w6, [x20, #:lo12:.LANCHOR73]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
-	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR73
-	ldrb	w4, [x2, #:lo12:.LANCHOR73]
+	ldrh	w21, [x2, 40]
 	ldrh	w2, [x1, 2]
-.L2840:
-	cmp	w3, w7
-	beq	.L2842
-	cbz	w6, .L2843
+.L2842:
+	cmp	w21, w5
+	beq	.L2844
+	cbz	w4, .L2845
 	add	x1, x19, :lo12:.LANCHOR62
-	strb	w0, [x1, 4]
-.L2843:
-	cbz	w5, .L2844
-	add	x0, x19, :lo12:.LANCHOR62
-	strh	w2, [x0, 2]
-.L2844:
-	adrp	x0, .LANCHOR105
-	ldrh	w22, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR68
-	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR68]
-	mul	w22, w22, w3
-	cmp	w1, 2
-	bne	.L2845
-	add	x0, x19, :lo12:.LANCHOR62
-	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2845
-	ldrh	w0, [x0, 2]
-	add	w22, w22, w0, lsl 1
-.L2846:
+	strh	w2, [x1, 2]
+.L2845:
+	cbz	w3, .L2846
 	add	x1, x19, :lo12:.LANCHOR62
-	ldrb	w0, [x1, 4]
-	add	w0, w0, 1
-	and	w0, w0, 255
 	strb	w0, [x1, 4]
-	cmp	w4, w0
-	bne	.L2847
-	ldrh	w0, [x1, 2]
-	strb	wzr, [x1, 4]
-	add	w0, w0, 1
-	strh	w0, [x1, 2]
-.L2847:
+.L2846:
 	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR62
+	adrp	x22, .LANCHOR105
 	bl	buf_alloc
+	adrp	x23, .LANCHOR68
+	mov	x24, x0
+	add	x22, x22, :lo12:.LANCHOR105
 	add	x23, x23, :lo12:.LANCHOR68
-	mov	x21, x0
-	mov	w20, 0
-	adrp	x24, .LANCHOR65
-.L2857:
-	ldrb	w0, [x19, 6]
-	cmp	w0, 3
-	bne	.L2848
-	cbz	w20, .L2849
-.L2848:
-	cmp	w0, w20
-	bgt	.L2850
-.L2858:
-	mov	x0, x21
+	mov	w26, 1
+.L2847:
+	add	x25, x19, :lo12:.LANCHOR62
+	ldrb	w1, [x25, 6]
+	cmp	w26, w1
+	ble	.L2855
+	mov	x0, x24
 	bl	buf_free
+	ldrb	w0, [x25, 4]
+	ldrb	w1, [x20, #:lo12:.LANCHOR73]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x25, 4]
+	cmp	w1, w0
+	bne	.L2841
+	ldrh	w0, [x25, 2]
+	strb	wzr, [x25, 4]
+	add	w0, w0, 1
+	strh	w0, [x25, 2]
+.L2841:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L2842:
+.L2844:
 	add	w0, w0, 1
 	and	w0, w0, 255
-	cmp	w0, w4
-	bne	.L2841
+	cmp	w0, w6
+	bne	.L2843
 	add	w2, w2, 1
-	mov	w5, 1
-	and	w2, w2, 65535
 	mov	w0, 0
-.L2841:
+	and	w2, w2, 65535
+	mov	w4, 1
+.L2843:
 	add	x3, x1, x0, sxtw 1
-	mov	w6, 1
-	ldrh	w3, [x3, 40]
-	b	.L2840
-.L2845:
-	add	x0, x19, :lo12:.LANCHOR62
-	ldrh	w0, [x0, 2]
-	add	w22, w0, w22
-	b	.L2846
-.L2850:
-	ldrb	w1, [x23]
-	cmp	w1, 2
-	bne	.L2851
-	cbnz	w0, .L2851
-	add	w0, w20, w22
-	orr	w0, w0, 33554432
-.L2871:
-	str	w0, [x21, 40]
+	ldrh	w21, [x3, 40]
+	mov	w3, 1
+	b	.L2842
+.L2855:
+	ldrh	w0, [x22]
+	cmp	w1, 3
+	mul	w2, w0, w21
+	ldrh	w0, [x25, 2]
+	bne	.L2848
+	add	w0, w0, w2
+	orr	w0, w0, w26, lsl 24
+.L2864:
+	str	w0, [x24, 40]
 	mov	w1, 1
-	mov	x0, x21
+	mov	x0, x24
+	ldr	w25, [x24, 40]
 	bl	sblk_read_page
-	ldr	w0, [x21, 52]
+	ldr	w0, [x24, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2854
-	ldr	x0, [x21, 24]
-	ldr	w25, [x0, 4]
-	mov	w0, w25
+	beq	.L2852
+	ldr	x0, [x24, 24]
+	ldr	w27, [x0, 4]
+	mov	w0, w27
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
+	str	w0, [x29, 108]
 	cmn	w0, #1
-	bne	.L2855
+	bne	.L2853
 	mov	w2, 0
-	add	x1, x29, 92
-	mov	w0, w25
+	add	x1, x29, 108
+	mov	w0, w27
 	bl	pm_log2phys
-.L2855:
-	ldr	w0, [x29, 92]
-	cmp	w22, w0
-	bne	.L2854
-	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR65]
-	ubfiz	x1, x0, 2, 16
+.L2853:
+	ldr	w1, [x24, 40]
+	ldr	w0, [x29, 108]
+	cmp	w1, w0
+	bne	.L2852
+	add	x1, x19, :lo12:.LANCHOR62
+	adrp	x3, .LANCHOR65
+	ldr	x3, [x3, #:lo12:.LANCHOR65]
+	ldrh	w0, [x1, 24]
+	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
-	str	w22, [x2, x1]
-	strh	w0, [x19, 24]
-.L2854:
-	ldrh	w0, [x19, 26]
+	str	w25, [x3, x2]
+	strh	w0, [x1, 24]
+.L2852:
+	add	x1, x19, :lo12:.LANCHOR62
+	add	w26, w26, 1
+	ldrh	w0, [x1, 26]
 	add	w0, w0, 1
-	strh	w0, [x19, 26]
-.L2849:
-	add	w20, w20, 1
-	cmp	w20, 4
-	bne	.L2857
-	b	.L2858
-.L2851:
-	orr	w0, w22, w20, lsl 24
-	b	.L2871
+	strh	w0, [x1, 26]
+	b	.L2847
+.L2848:
+	cmp	w1, 2
+	bne	.L2850
+	lsl	w0, w0, 1
+	sub	w1, w0, #1
+	add	w0, w26, w2
+	add	w0, w1, w0
+	ldrb	w1, [x23]
+	orr	w0, w0, w1, lsl 24
+	b	.L2864
+.L2850:
+	add	w0, w0, w2
+	b	.L2864
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17577,42 +17636,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2873
-	adrp	x1, .LANCHOR205
+	bne	.L2866
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 926
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 919
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2873:
+.L2866:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2893
+	beq	.L2886
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2875
+	tbz	x0, 8, .L2868
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
-.L2875:
+.L2868:
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2876
+	cbnz	w1, .L2869
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2893:
+.L2886:
 	mov	w0, 0
-	b	.L2872
-.L2876:
+	b	.L2865
+.L2869:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
@@ -17622,59 +17681,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2877
+	beq	.L2870
 	cmp	w1, 224
-	beq	.L2877
-	cbz	w1, .L2878
+	beq	.L2870
+	cbz	w1, .L2871
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2877
+	beq	.L2870
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2877
+	beq	.L2870
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2907
-.L2877:
+	bne	.L2900
+.L2870:
 	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2893
-.L2878:
+	b	.L2886
+.L2871:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2880
-	adrp	x1, .LANCHOR205
+	cbz	w1, .L2873
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 946
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 939
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2880:
+.L2873:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2877
-.L2907:
+	b	.L2870
+.L2900:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2881
-	adrp	x1, .LANCHOR205
+	bne	.L2874
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 954
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 947
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2881:
+.L2874:
 	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
 	adrp	x2, .LANCHOR80
@@ -17690,14 +17749,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2894
+	bne	.L2887
 	adrp	x1, .LANCHOR68
 	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2883
+	beq	.L2876
 	and	w21, w21, 65535
-.L2882:
+.L2875:
 	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17705,6 +17764,7 @@ gc_scan_src_blk:
 	strh	wzr, [x22, 2]
 	strb	wzr, [x22, 4]
 	strh	wzr, [x22, 26]
+	strh	wzr, [x22, 28]
 	bl	buf_alloc
 	str	w20, [x0, 40]
 	mov	x25, x0
@@ -17723,41 +17783,41 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2884
-.L2909:
+	bne	.L2877
+.L2902:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2872:
+.L2865:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2883:
+.L2876:
 	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2882
-.L2894:
+	b	.L2875
+.L2887:
 	mov	w21, 1
-	b	.L2882
-.L2884:
+	b	.L2875
+.L2877:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2885
-	mov	w2, 986
-	adrp	x1, .LANCHOR205
+	beq	.L2878
+	mov	w2, 980
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR205
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2909
-.L2885:
+	b	.L2902
+.L2878:
 	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	adrp	x22, .LANCHOR99
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -17769,9 +17829,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2886:
+.L2879:
 	cmp	w21, w26
-	bgt	.L2891
+	bgt	.L2884
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -17783,11 +17843,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2892
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	beq	.L2885
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2892:
+.L2885:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -17795,20 +17855,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2872
-.L2891:
+	b	.L2865
+.L2884:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2888
+	beq	.L2881
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2889
+	bne	.L2882
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2889:
+.L2882:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17823,16 +17883,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2888
+	bne	.L2881
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2888:
+.L2881:
 	add	x26, x26, 1
-	b	.L2886
+	b	.L2879
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17848,13 +17908,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2911
-	adrp	x21, .LANCHOR206
+	beq	.L2904
+	adrp	x21, .LANCHOR207
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR206
+	add	x21, x21, :lo12:.LANCHOR207
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2919:
+.L2912:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -17862,7 +17922,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2912
+	beq	.L2905
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17872,7 +17932,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2913
+	bne	.L2906
 	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -17888,21 +17948,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2913:
+.L2906:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2914
-	mov	w2, 1425
+	beq	.L2907
+	mov	w2, 1419
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2914:
+.L2907:
 	mov	x0, x23
 	bl	buf_free
-.L2912:
+.L2905:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR118
 	ldr	w2, [x2, #:lo12:.LANCHOR118]
@@ -17910,7 +17970,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2915
+	bcc	.L2908
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17921,42 +17981,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2910:
+.L2903:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2915:
+.L2908:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2910
+	bne	.L2903
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2919
-	b	.L2910
-.L2911:
+	bne	.L2912
+	b	.L2903
+.L2904:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2921
+	bhi	.L2914
 	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2910
-.L2921:
+	bls	.L2903
+.L2914:
 	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2910
+	b	.L2903
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17982,29 +18042,29 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC194
+	adrp	x0, .LC197
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC197
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2948
+	beq	.L2941
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2948
+	bls	.L2941
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2949
+	bne	.L2942
 	adrp	x0, .LANCHOR68
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2929:
+.L2922:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	mov	w0, w21
@@ -18020,11 +18080,11 @@ ftl_sblk_dump:
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC195
+	adrp	x0, .LC198
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC195
+	add	x0, x0, :lo12:.LC198
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18039,36 +18099,36 @@ ftl_sblk_dump:
 	adrp	x0, .LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2930:
+.L2923:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2945
+	bls	.L2938
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	str	x0, [x29, 120]
-	b	.L2946
-.L2949:
-	mov	w25, 1
-	b	.L2929
+	b	.L2939
 .L2942:
+	mov	w25, 1
+	b	.L2922
+.L2935:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2931
+	beq	.L2924
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2932
+	bne	.L2925
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2933:
+.L2926:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18110,22 +18170,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2931
+	beq	.L2924
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2936
+	bne	.L2929
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2936:
+.L2929:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2937
+	bne	.L2930
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18133,81 +18193,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2937:
+.L2930:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2939
+	cbz	x0, .L2932
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2940
+	beq	.L2933
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2940
-	adrp	x0, .LC197
+	tbz	x0, 12, .L2933
+	adrp	x0, .LC200
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC200
 	bl	printf
-.L2940:
+.L2933:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2939
+	beq	.L2932
 	cmn	w0, #1
-	beq	.L2939
-	adrp	x1, .LANCHOR207
+	beq	.L2932
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 1299
-	add	x1, x1, :lo12:.LANCHOR207
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2939:
+.L2932:
 	add	w27, w27, 1
-.L2931:
+.L2924:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2944:
+.L2937:
 	cmp	w25, w22
-	bcs	.L2942
+	bcs	.L2935
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2946:
+.L2939:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2943
+	bls	.L2936
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2944
-.L2932:
+	b	.L2937
+.L2925:
 	cmp	w25, 2
-	bne	.L2934
+	bne	.L2927
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2933
-.L2934:
+	b	.L2926
+.L2927:
 	add	w19, w20, w19
-	b	.L2933
-.L2943:
+	b	.L2926
+.L2936:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2930
-.L2945:
+	b	.L2923
+.L2938:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18216,11 +18276,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2927:
+.L2920:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18229,9 +18289,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2948:
+.L2941:
 	mov	w0, 0
-	b	.L2927
+	b	.L2920
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -18251,22 +18311,22 @@ zftl_read:
 	stp	x23, x24, [sp, 48]
 	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2960
+	tbz	x0, 12, .L2953
 	mov	w3, w2
-	adrp	x0, .LC199
+	adrp	x0, .LC202
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC199
+	add	x0, x0, :lo12:.LC202
 	mov	w1, w20
 	bl	printf
-.L2960:
-	cbnz	w20, .L2961
+.L2953:
+	cbnz	w20, .L2954
 	adrp	x0, .LANCHOR58
 	mov	w20, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2962:
+.L2955:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2990
+	bcc	.L2983
 	adrp	x1, .LANCHOR97
 	add	w20, w20, w19
 	add	w3, w26, w20
@@ -18288,10 +18348,10 @@ zftl_read:
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2964:
-	cbnz	w25, .L2988
+.L2957:
+	cbnz	w25, .L2981
 	ldr	w0, [x29, 164]
-.L2959:
+.L2952:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18299,22 +18359,22 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2961:
+.L2954:
 	cmp	w20, 3
-	bhi	.L2990
+	bhi	.L2983
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2962
-.L2988:
+	b	.L2955
+.L2981:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L2991
+	bne	.L2984
 	cmp	w21, w27
-	bne	.L2966
+	bne	.L2959
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18323,17 +18383,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2965:
+.L2958:
 	adrp	x23, .LANCHOR49
 	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2969:
+.L2962:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2967
+	bne	.L2960
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2967
+	tbz	x2, 3, .L2960
 	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -18345,87 +18405,87 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2968:
+.L2961:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L2975:
+.L2968:
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 2
-	bls	.L2976
-	cbnz	w25, .L2964
-.L2976:
+	bls	.L2969
+	cbnz	w25, .L2957
+.L2969:
 	adrp	x0, .LANCHOR125
 	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2964
+	cbz	w1, .L2957
 	adrp	x24, .LANCHOR124
 	add	x0, x23, :lo12:.LANCHOR49
 	ldrb	w2, [x24, #:lo12:.LANCHOR124]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR208
-	add	x0, x0, :lo12:.LANCHOR208
+	adrp	x0, .LANCHOR209
+	add	x0, x0, :lo12:.LANCHOR209
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L2978:
+.L2971:
 	ldrb	w0, [x28]
-	cbnz	w0, .L2987
+	cbnz	w0, .L2980
 	mov	w0, -1
 	strb	wzr, [x28]
 	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2964
-.L2966:
+	b	.L2957
+.L2959:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2991:
+.L2984:
 	mov	w24, 0
-	b	.L2965
-.L2967:
+	b	.L2958
+.L2960:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2969
+	bne	.L2962
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2970
+	bne	.L2963
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2970:
+.L2963:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2971
+	bne	.L2964
 	ldr	x0, [x29, 168]
 	mov	w19, 0
 	add	x24, x0, :lo12:.LANCHOR121
-.L2972:
+.L2965:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2968
+	bcs	.L2961
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L2973
+	bhi	.L2966
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2973
+	bls	.L2966
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2973:
+.L2966:
 	add	w19, w19, 1
-	b	.L2972
-.L2971:
+	b	.L2965
+.L2964:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L2975
+	cbz	x0, .L2968
 	ldr	x2, [x29, 120]
 	ldr	x3, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x3, 40]
@@ -18440,15 +18500,15 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2968
-.L2987:
+	b	.L2961
+.L2980:
 	ldrb	w0, [x24, #:lo12:.LANCHOR124]
 	cmp	w0, 255
-	bne	.L2979
+	bne	.L2972
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1065
 	bl	printf
-.L2979:
+.L2972:
 	ldrb	w19, [x24, #:lo12:.LANCHOR124]
 	add	x0, x23, :lo12:.LANCHOR49
 	ubfiz	x1, x19, 6, 8
@@ -18460,21 +18520,21 @@ zftl_read:
 	strb	w0, [x24, #:lo12:.LANCHOR124]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L2980
+	bne	.L2973
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2981:
+.L2974:
 	add	x10, x23, :lo12:.LANCHOR49
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
 	ldr	w2, [x10, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w2
-	beq	.L2982
+	beq	.L2975
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
@@ -18485,9 +18545,9 @@ zftl_read:
 	ldrb	w1, [x10, 1]
 	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC201
+	adrp	x0, .LC204
 	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC204
 	bl	printf
 	ldr	x10, [x29, 112]
 	adrp	x0, .LANCHOR99
@@ -18506,28 +18566,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L2982:
+.L2975:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L2983
+	bne	.L2976
 	cmn	w8, #1
-	bne	.L2984
-.L2983:
+	bne	.L2977
+.L2976:
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1086
 	bl	printf
-.L2984:
+.L2977:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w0, w2
-	bls	.L2985
+	bls	.L2978
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18535,7 +18595,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2986:
+.L2979:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
@@ -18545,10 +18605,10 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L2978
-.L2980:
+	b	.L2971
+.L2973:
 	cmp	w8, 256
-	bne	.L2981
+	bne	.L2974
 	adrp	x0, .LANCHOR99
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
@@ -18563,8 +18623,8 @@ zftl_read:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
 	bl	printf
@@ -18575,27 +18635,27 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L2981
-.L2985:
+	b	.L2974
+.L2978:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L2986
-.L2990:
+	b	.L2979
+.L2983:
 	mov	w0, -1
-	b	.L2959
+	b	.L2952
 	.size	zftl_read, .-zftl_read
-	.section	.text.zftl_vendor_read,"ax",@progbits
+	.section	.text.ftl_vendor_read,"ax",@progbits
 	.align	2
-	.global	zftl_vendor_read
-	.type	zftl_vendor_read, %function
-zftl_vendor_read:
+	.global	ftl_vendor_read
+	.type	ftl_vendor_read, %function
+ftl_vendor_read:
 	mov	x3, x2
 	mov	w2, w1
 	add	w1, w0, 512
 	mov	w0, 2
 	b	zftl_read
-	.size	zftl_vendor_read, .-zftl_vendor_read
+	.size	ftl_vendor_read, .-ftl_vendor_read
 	.section	.text.zftl_sys_read,"ax",@progbits
 	.align	2
 	.global	zftl_sys_read
@@ -18666,46 +18726,46 @@ gc_check_data_one_wl:
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3013
+	cbnz	x0, .L3006
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3013:
+.L3006:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3014
-	adrp	x1, .LANCHOR209
+	cbnz	x22, .L3007
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	mov	w2, 367
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3014:
+.L3007:
 	adrp	x2, .LANCHOR105
 	add	x28, x21, 96
 	add	x27, x21, 80
 	add	x2, x2, :lo12:.LANCHOR105
 	mov	w26, 0
-.L3015:
+.L3008:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3024
+	bge	.L3017
 	adrp	x25, .LANCHOR68
 	mov	w24, 1
 	add	x23, x19, :lo12:.LANCHOR62
 	add	x25, x25, :lo12:.LANCHOR68
-	b	.L3025
-.L3023:
+	b	.L3018
+.L3016:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3016
+	bne	.L3009
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3037:
+.L3030:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
@@ -18715,7 +18775,7 @@ gc_check_data_one_wl:
 	adrp	x1, .LANCHOR147
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3019
+	beq	.L3012
 	ldrh	w0, [x23, 22]
 	ldr	x4, [x1, #:lo12:.LANCHOR147]
 	ldr	x3, [x22, 24]
@@ -18723,28 +18783,28 @@ gc_check_data_one_wl:
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3019
+	bne	.L3012
 	adrp	x4, .LANCHOR148
 	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3020
-.L3019:
+	beq	.L3013
+.L3012:
 	add	x4, x1, :lo12:.LANCHOR147
 	ldrh	w0, [x23, 22]
 	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3020
+	beq	.L3013
 	adrp	x19, .LANCHOR72
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w3, w3, w0
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC205
+	add	x0, x0, :lo12:.LC205
 	bl	rknand_print_hex
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	adrp	x19, .LANCHOR148
@@ -18752,13 +18812,13 @@ gc_check_data_one_wl:
 	mov	w2, 4
 	ldr	x1, [x19, #:lo12:.LANCHOR148]
 	mul	w3, w3, w0
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3021
+	tbz	x0, 10, .L3014
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
@@ -18769,13 +18829,13 @@ gc_check_data_one_wl:
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC204
+	adrp	x0, .LC207
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC204
+	add	x0, x0, :lo12:.LC207
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3021:
+.L3014:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -18785,7 +18845,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3012:
+.L3005:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18794,43 +18854,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3016:
+.L3009:
 	cmp	w3, 2
-	bne	.L3018
+	bne	.L3011
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3037
-.L3018:
+	b	.L3030
+.L3011:
 	add	w0, w0, w1
-	b	.L3037
-.L3020:
+	b	.L3030
+.L3013:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3025:
+.L3018:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3023
+	ble	.L3016
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3015
-.L3024:
+	b	.L3008
+.L3017:
 	add	x19, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbz	w1, .L3026
+	cbz	w1, .L3019
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3026:
-.L3022:
+.L3019:
+.L3015:
 	mov	w0, 0
-	b	.L3012
+	b	.L3005
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18857,35 +18917,35 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3039
-	adrp	x1, .LANCHOR210
+	beq	.L3032
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
 	mov	w2, 1575
-	add	x1, x1, :lo12:.LANCHOR210
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3039:
+.L3032:
 	adrp	x27, .LANCHOR121
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR121
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3040:
+.L3033:
 	cmp	w24, w23
-	blt	.L3046
+	blt	.L3039
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3047
+	tbz	x0, 12, .L3040
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC208
+	adrp	x0, .LC211
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3047:
+.L3040:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -18896,38 +18956,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3046:
+.L3039:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3041
+	beq	.L3034
 	ldrb	w20, [x27, #:lo12:.LANCHOR121]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3042
-	adrp	x0, .LC205
+	tbz	x0, 12, .L3035
+	adrp	x0, .LC208
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC205
+	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3042:
+.L3035:
 	adrp	x25, .LANCHOR105
-	adrp	x26, .LC206
+	adrp	x26, .LC209
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC206
-.L3045:
+	add	x26, x26, :lo12:.LC209
+.L3038:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3043
+	beq	.L3036
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3043
+	bne	.L3036
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18939,15 +18999,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3044
+	cbz	w0, .L3037
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC207
-	add	x0, x0, :lo12:.LC207
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	bl	rknand_print_hex
-.L3044:
+.L3037:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18956,13 +19016,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3043:
+.L3036:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3045
-.L3041:
+	bgt	.L3038
+.L3034:
 	add	x24, x24, 1
-	b	.L3040
+	b	.L3033
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18978,9 +19038,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3069
+	beq	.L3062
 	bl	zftl_insert_data_list
-.L3069:
+.L3062:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -19012,10 +19072,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3074:
+.L3067:
 	adrp	x2, .LANCHOR57
 	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3076
+	cbz	w1, .L3069
 	adrp	x3, .LANCHOR56
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
@@ -19034,24 +19094,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L3078
-	adrp	x1, .LANCHOR211
+	bcc	.L3071
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
 	mov	w2, 496
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3078:
+.L3071:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3079
+	bcc	.L3072
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3073:
+.L3066:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19059,7 +19119,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3079:
+.L3072:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -19067,17 +19127,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3081
-	adrp	x0, .LANCHOR172
-	ldrb	w1, [x0, #:lo12:.LANCHOR172]
+	cbz	w1, .L3074
+	adrp	x0, .LANCHOR173
+	ldrb	w1, [x0, #:lo12:.LANCHOR173]
 	add	x1, x23, x1, lsl 6
-.L3082:
+.L3075:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3083
+	bne	.L3076
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3081
+	bne	.L3074
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19086,33 +19146,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3074
-.L3083:
+	b	.L3067
+.L3076:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3082
-.L3081:
+	b	.L3075
+.L3074:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3085
+	bne	.L3078
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3085:
+.L3078:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3088:
+.L3081:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3086
+	bne	.L3079
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3086
+	tbz	x2, 3, .L3079
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19120,50 +19180,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3087:
+.L3080:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3112
+	bcs	.L3105
 	add	w20, w21, w20
-	cbz	x24, .L3090
-	cbz	w21, .L3091
+	cbz	x24, .L3083
+	cbz	w21, .L3084
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3091:
+.L3084:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3092
+	bcc	.L3085
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3112:
+.L3105:
 	mov	w24, 0
-	b	.L3089
-.L3086:
+	b	.L3082
+.L3079:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3088
+	bne	.L3081
 	mov	x24, 0
-	b	.L3087
-.L3092:
+	b	.L3080
+.L3085:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3112
-.L3090:
+	b	.L3105
+.L3083:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3093
+	beq	.L3086
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19176,11 +19236,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3094
+	bne	.L3087
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3095
-.L3094:
+	bne	.L3088
+.L3087:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19188,53 +19248,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC168
+	adrp	x0, .LC171
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC171
 	bl	rknand_print_hex
-.L3095:
+.L3088:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3096
+	bne	.L3089
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3097
-.L3096:
-	adrp	x1, .LANCHOR211
+	bne	.L3090
+.L3089:
+	adrp	x1, .LANCHOR212
 	adrp	x0, .LC0
 	mov	w2, 567
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR212
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3097:
-	cbz	w21, .L3098
+.L3090:
+	cbz	w21, .L3091
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3099
+	beq	.L3092
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3100:
+.L3093:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3098:
+.L3091:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3101
-	bls	.L3102
+	bcc	.L3094
+	bls	.L3095
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3102:
-	cbz	x27, .L3089
+.L3095:
+	cbz	x27, .L3082
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -19244,17 +19304,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3089:
+.L3082:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3104
+	cbnz	w0, .L3097
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3104:
+.L3097:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR172
+	adrp	x20, .LANCHOR173
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19275,33 +19335,33 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR172
+	add	x0, x20, :lo12:.LANCHOR173
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
 	ldrb	w2, [x0, #:lo12:.LANCHOR119]
 	add	w2, w2, 1
 	and	w2, w2, 255
 	strb	w2, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR212
+	adrp	x0, .LANCHOR213
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR212]
+	str	wzr, [x0, #:lo12:.LANCHOR213]
 	ldrh	w0, [x19, 6]
-	bhi	.L3105
+	bhi	.L3098
 	cmp	w0, 1
-	bne	.L3077
-.L3105:
+	bne	.L3070
+.L3098:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR172]
+	ldrb	w0, [x20, #:lo12:.LANCHOR173]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3109:
+.L3102:
 	cmp	w1, w4
-	bne	.L3110
-	strb	w3, [x20, #:lo12:.LANCHOR172]
+	bne	.L3103
+	strb	w3, [x20, #:lo12:.LANCHOR173]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
@@ -19311,58 +19371,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3077
+	bne	.L3070
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3077:
+.L3070:
 	adrp	x0, .LANCHOR57
 	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3074
-.L3076:
+	cbnz	w0, .L3067
+.L3069:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3073
-.L3101:
+	b	.L3066
+.L3094:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3103
+	beq	.L3096
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3102
-.L3103:
+	b	.L3095
+.L3096:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3102
-.L3110:
+	b	.L3095
+.L3103:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3109
-.L3111:
+	b	.L3102
+.L3104:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3099:
+.L3092:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3100
-.L3093:
-	cbnz	w21, .L3111
+	b	.L3093
+.L3086:
+	cbnz	w21, .L3104
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3098
+	b	.L3091
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19379,10 +19439,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3135
+	cbnz	w0, .L3128
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3134
+	cbz	x0, .L3127
 	adrp	x20, .LANCHOR62
 	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
@@ -19398,52 +19458,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3137
-	adrp	x1, .LANCHOR213
+	bne	.L3130
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
 	mov	w2, 601
-	add	x1, x1, :lo12:.LANCHOR213
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3137:
+.L3130:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3138
+	bne	.L3131
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3138:
+.L3131:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3139
+	bne	.L3132
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3142:
+.L3135:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3140
+	bne	.L3133
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3140
+	tbz	x2, 1, .L3133
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3134
+	tbz	x0, 8, .L3127
 	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC210
+	adrp	x0, .LC213
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC213
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3134:
+.L3127:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19452,10 +19512,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3140:
+.L3133:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3142
+	bne	.L3135
 	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -19470,19 +19530,19 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3143
+	tbz	x0, 8, .L3136
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC211
+	adrp	x0, .LC214
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC214
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3143:
+.L3136:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -19495,27 +19555,27 @@ gc_do_copy_back:
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3134
-.L3139:
+	b	.L3127
+.L3132:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3144
+	tbz	x0, 8, .L3137
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC211
+	adrp	x0, .LC214
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3144:
+.L3137:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3134
-.L3135:
+	b	.L3127
+.L3128:
 	adrp	x1, .LANCHOR10
 	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
@@ -19524,10 +19584,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3145
+	bne	.L3138
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3146
+	cbz	w0, .L3139
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19536,7 +19596,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3147:
+.L3140:
 	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR62
@@ -19548,18 +19608,18 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR148
 	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3150:
+.L3143:
 	cmp	w2, w8
-	blt	.L3152
-.L3179:
+	blt	.L3145
+.L3172:
 	mov	w23, 1
-	b	.L3148
-.L3146:
+	b	.L3141
+.L3139:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR214
-	add	x0, x0, :lo12:.LANCHOR214
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19570,12 +19630,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3147
-.L3148:
+	beq	.L3140
+.L3141:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3153
+	tbz	x1, 8, .L3146
 	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -19583,18 +19643,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR148]
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC212
+	adrp	x0, .LC215
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC212
+	add	x0, x0, :lo12:.LC215
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3153:
+.L3146:
 	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3154:
+.L3147:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19602,27 +19662,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3166
+	blt	.L3159
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3167
+	beq	.L3160
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3168:
+.L3161:
 	cmp	w2, w3
-	blt	.L3174
+	blt	.L3167
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3173
-.L3145:
+	b	.L3166
+.L3138:
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3149
+	cbnz	w0, .L3142
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19630,8 +19690,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3147
-.L3149:
+	b	.L3140
+.L3142:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19639,28 +19699,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3147
-.L3152:
+	b	.L3140
+.L3145:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3179
+	beq	.L3172
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3151
+	bne	.L3144
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3134
+	bcs	.L3127
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3151:
+.L3144:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3150
-.L3166:
+	b	.L3143
+.L3159:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19669,11 +19729,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3155
+	bne	.L3148
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3156
+	cbnz	x0, .L3149
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19681,8 +19741,8 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3134
-.L3156:
+	cbz	x0, .L3127
+.L3149:
 	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR72
@@ -19702,7 +19762,7 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3157
+	bne	.L3150
 	adrp	x0, .LANCHOR147
 	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
@@ -19748,7 +19808,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3155:
+.L3148:
 	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
@@ -19767,7 +19827,7 @@ gc_do_copy_back:
 	strb	w23, [x3, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3161
+	bne	.L3154
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR105
 	ldrh	w6, [x6, #:lo12:.LANCHOR105]
@@ -19785,10 +19845,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3162:
+.L3155:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3165
+	tbz	x0, 8, .L3158
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -19802,19 +19862,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3165:
+.L3158:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3154
-.L3157:
+	b	.L3147
+.L3150:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR148]
@@ -19827,7 +19887,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3159
+	bne	.L3152
 	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR99]
@@ -19846,30 +19906,30 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3159
+	bne	.L3152
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3159
-	adrp	x1, .LANCHOR213
+	bne	.L3152
+	adrp	x1, .LANCHOR214
 	adrp	x0, .LC0
 	mov	w2, 716
-	add	x1, x1, :lo12:.LANCHOR213
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3159:
+.L3152:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR118
 	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3160
+	bcc	.L3153
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3160:
+.L3153:
 	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -19877,32 +19937,32 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3155
-.L3161:
+	b	.L3148
+.L3154:
 	cmp	w0, 2
-	bne	.L3163
+	bne	.L3156
 	adrp	x0, .LANCHOR104
 	adrp	x1, .LANCHOR105
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3164
+	cbnz	w0, .L3157
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3222:
+.L3215:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3163:
+.L3156:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3162
-.L3164:
+	b	.L3155
+.L3157:
 	add	w0, w19, w26, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
@@ -19910,32 +19970,32 @@ gc_do_copy_back:
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3222
-.L3167:
+	b	.L3215
+.L3160:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3169
-.L3172:
+	cbz	w3, .L3162
+.L3165:
 	strb	wzr, [x1, 60]
-	b	.L3170
-.L3169:
+	b	.L3163
+.L3162:
 	cmp	w23, 1
-	bne	.L3171
+	bne	.L3164
 	mov	w3, 9
-.L3221:
+.L3214:
 	strb	w3, [x1, 60]
-.L3170:
+.L3163:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3173:
+.L3166:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3175
+	cbz	w1, .L3168
 	add	w0, w0, w0, lsl 1
-.L3176:
+.L3169:
 	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR62
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
@@ -19950,34 +20010,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3177
+	blt	.L3170
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3177:
+.L3170:
 	bl	gc_write_completed
-	b	.L3134
-.L3171:
+	b	.L3127
+.L3164:
 	cmp	w23, 2
-	bne	.L3172
+	bne	.L3165
 	mov	w3, 13
-	b	.L3221
-.L3174:
+	b	.L3214
+.L3167:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3168
-.L3175:
+	b	.L3161
+.L3168:
 	adrp	x1, .LANCHOR104
 	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3176
+	b	.L3169
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -20002,35 +20062,35 @@ zftl_do_gc:
 	stp	x27, x28, [sp, 96]
 	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3330
+	bhi	.L3323
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3226
-	add	x0, x0, :lo12:.L3226
+	adrp	x0, .L3219
+	add	x0, x0, :lo12:.L3219
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3226
+	adr	x1, .Lrtx3219
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3226:
+.Lrtx3219:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3226:
-	.2byte	(.L3225 - .Lrtx3226) / 4
-	.2byte	(.L3227 - .Lrtx3226) / 4
-	.2byte	(.L3228 - .Lrtx3226) / 4
-	.2byte	(.L3229 - .Lrtx3226) / 4
-	.2byte	(.L3230 - .Lrtx3226) / 4
-	.2byte	(.L3231 - .Lrtx3226) / 4
-	.2byte	(.L3232 - .Lrtx3226) / 4
+.L3219:
+	.2byte	(.L3218 - .Lrtx3219) / 4
+	.2byte	(.L3220 - .Lrtx3219) / 4
+	.2byte	(.L3221 - .Lrtx3219) / 4
+	.2byte	(.L3222 - .Lrtx3219) / 4
+	.2byte	(.L3223 - .Lrtx3219) / 4
+	.2byte	(.L3224 - .Lrtx3219) / 4
+	.2byte	(.L3225 - .Lrtx3219) / 4
 	.section	.text.zftl_do_gc
-.L3231:
+.L3224:
 	adrp	x20, .LANCHOR62
 	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3233:
+.L3226:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3326
+	cbz	w0, .L3319
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20047,8 +20107,8 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3394
-.L3225:
+	b	.L3387
+.L3218:
 	adrp	x0, .LANCHOR92
 	adrp	x28, .LANCHOR85
 	adrp	x27, .LANCHOR83
@@ -20062,16 +20122,16 @@ zftl_do_gc:
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3234
-	cbnz	w26, .L3235
+	beq	.L3227
+	cbnz	w26, .L3228
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3235
-.L3330:
+	blt	.L3228
+.L3323:
 	mov	w20, 16
-	b	.L3223
-.L3235:
+	b	.L3216
+.L3228:
 	adrp	x5, .LANCHOR82
 	mov	w1, 5
 	adrp	x26, .LANCHOR71
@@ -20083,7 +20143,7 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3236
+	beq	.L3229
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20096,120 +20156,120 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3237
+	bcs	.L3230
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3236
+	bls	.L3229
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3236
-.L3237:
+	bls	.L3229
+.L3230:
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3238
+	cbz	w0, .L3231
 	mov	w0, 1
 	str	wzr, [x20, #:lo12:.LANCHOR146]
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3236:
+	b	.L3323
+.L3229:
 	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3238:
+.L3231:
 	cmp	w22, 15
-	bls	.L3332
+	bls	.L3325
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3332
+	bhi	.L3325
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3239:
+.L3232:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3240
+	tbz	x0, 8, .L3233
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
-	mov	w1, 1856
+	mov	w1, 1850
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	bl	printf
-.L3240:
+.L3233:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3241
-.L3242:
+	ble	.L3234
+.L3235:
 	mov	w0, 1
-.L3396:
+.L3389:
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3332:
+	b	.L3323
+.L3325:
 	mov	w20, 2
-	b	.L3239
-.L3241:
+	b	.L3232
+.L3234:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3242
-	b	.L3330
-.L3234:
+	bgt	.L3235
+	b	.L3323
+.L3227:
 	cmp	w26, 1
-	bne	.L3244
+	bne	.L3237
 	bl	gc_scan_static_data
 	adrp	x24, .LANCHOR71
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3245
-.L3246:
+	cbz	w0, .L3238
+.L3239:
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3396
-.L3245:
+	b	.L3389
+.L3238:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3246
-	cbnz	w22, .L3247
-.L3251:
+	cbnz	w0, .L3239
+	cbnz	w22, .L3240
+.L3244:
 	mov	w20, 16
-.L3248:
+.L3241:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
 	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3256
+	cbz	w5, .L3249
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3223
+	tbz	x1, 8, .L3216
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC215
+	adrp	x0, .LC218
 	mov	w2, 0
-	mov	w1, 1954
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1948
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3223:
+.L3216:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20219,25 +20279,25 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3247:
+.L3240:
 	cmp	w21, w25
 	adrp	x1, .LANCHOR87
 	adrp	x2, .LANCHOR84
-	bcs	.L3249
+	bcs	.L3242
 	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3250
-.L3249:
+	blt	.L3243
+.L3242:
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3250
+	blt	.L3243
 	adrp	x0, .LANCHOR88
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3251
-.L3250:
+	bcc	.L3244
+.L3243:
 	adrp	x5, .LANCHOR146
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
@@ -20247,17 +20307,17 @@ zftl_do_gc:
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3252
+	bls	.L3245
 	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3252
+	bls	.L3245
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3251
+	beq	.L3244
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20268,82 +20328,82 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3251
+	bgt	.L3244
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3384:
+.L3377:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3251
-	b	.L3242
-.L3252:
+	cbz	w0, .L3244
+	b	.L3235
+.L3245:
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3254
+	bcc	.L3247
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3384
-.L3254:
+	b	.L3377
+.L3247:
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3255
+	cbnz	w0, .L3248
 	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3248
-.L3255:
+	bls	.L3241
+.L3248:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3384
-.L3244:
+	b	.L3377
+.L3237:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3330
-	b	.L3251
-.L3256:
+	bcc	.L3323
+	b	.L3244
+.L3249:
 	adrp	x2, .LANCHOR74
 	mov	x24, x2
 	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3257
-	cbz	w22, .L3258
+	bcs	.L3250
+	cbz	w22, .L3251
 	cmp	w22, 16
-	bls	.L3259
+	bls	.L3252
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3259
+	bhi	.L3252
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3260
+	bne	.L3253
 	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3386:
+.L3379:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3261:
-	cbnz	w0, .L3263
-	b	.L3223
-.L3260:
+.L3254:
+	cbnz	w0, .L3256
+	b	.L3216
+.L3253:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3263
+	beq	.L3256
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20356,16 +20416,16 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3264
+	bcs	.L3257
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3263
+	bls	.L3256
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3263
-.L3264:
+	bls	.L3256
+.L3257:
 	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
@@ -20373,67 +20433,67 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3263:
+.L3256:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3223
-.L3259:
+	b	.L3216
+.L3252:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3393:
+.L3386:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3263
+	bne	.L3256
 	mov	w2, 2
-.L3389:
+.L3382:
 	mov	w1, 3
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3386
-.L3258:
+	b	.L3379
+.L3251:
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3266
+	tbz	x1, 8, .L3259
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC215
+	adrp	x0, .LC218
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1984
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1978
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3266:
+.L3259:
 	cmp	w21, 16
-	bls	.L3267
+	bls	.L3260
 	mov	w2, 4
-	b	.L3389
-.L3267:
+	b	.L3382
+.L3260:
 	mov	w2, 1
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3393
-.L3257:
+	b	.L3386
+.L3250:
 	cmp	w26, 1
-	bne	.L3223
+	bne	.L3216
 	cmp	w21, w4, lsl 1
-	bge	.L3268
+	bge	.L3261
 	cmp	w25, w22, lsr 1
-	bcs	.L3269
+	bcs	.L3262
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcs	.L3269
+	bcs	.L3262
 	adrp	x0, .LANCHOR84
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3223
-.L3269:
+	b	.L3216
+.L3262:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -20441,21 +20501,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3270
-.L3275:
+	bne	.L3263
+.L3268:
 	cmp	w22, 1
-	bhi	.L3271
-.L3272:
+	bhi	.L3264
+.L3265:
 	cmp	w21, w25
 	adrp	x21, .LANCHOR84
-	bcs	.L3279
+	bcs	.L3272
 	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3279
+	beq	.L3272
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20466,13 +20526,13 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3281
-.L3279:
+	ble	.L3274
+.L3272:
 	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3223
-.L3270:
+	b	.L3216
+.L3263:
 	adrp	x2, .LANCHOR146
 	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
@@ -20482,14 +20542,14 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
 	adrp	x4, .LANCHOR9
-	bls	.L3273
+	bls	.L3266
 	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3273
+	bcs	.L3266
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20497,167 +20557,167 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3263
-.L3273:
+	cbnz	w0, .L3256
+.L3266:
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3274
+	bhi	.L3267
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3263
-.L3274:
+	b	.L3256
+.L3267:
 	ldrh	w2, [x27, #:lo12:.LANCHOR83]
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
 	adrp	x2, .LANCHOR84
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3275
+	ble	.L3268
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3272
-	b	.L3275
-.L3271:
+	bcc	.L3265
+	b	.L3268
+.L3264:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3276
+	bls	.L3269
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3276
+	bhi	.L3269
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3277
+	bne	.L3270
 	mov	w2, 4
-.L3385:
+.L3378:
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3277:
+.L3270:
 	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3387
+	bls	.L3380
 	lsr	w1, w1, 2
-.L3388:
+.L3381:
 	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3261
-.L3276:
+	b	.L3254
+.L3269:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3277
+	bne	.L3270
 	mov	w2, 2
-	b	.L3385
-.L3281:
+	b	.L3378
+.L3274:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3387:
+.L3380:
 	lsr	w1, w1, 1
-	b	.L3388
-.L3268:
+	b	.L3381
+.L3261:
 	adrp	x0, .LANCHOR84
 	mov	w20, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3223
-.L3227:
+	b	.L3216
+.L3220:
 	adrp	x7, .LANCHOR62
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3282
+	bne	.L3275
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3282:
+.L3275:
 	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3395
+	beq	.L3388
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3284
+	cbz	w5, .L3277
 	add	x1, x1, 58
 	mov	w0, 0
-.L3286:
+.L3279:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3285
-.L3290:
+	bne	.L3278
+.L3283:
 	adrp	x0, .LANCHOR62
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3330
-.L3285:
+	b	.L3323
+.L3278:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3286
-.L3284:
+	bne	.L3279
+.L3277:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3287
+	beq	.L3280
 	tst	w0, 192
-	bne	.L3288
-.L3287:
+	bne	.L3281
+.L3280:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3290
-	mov	w2, 2217
-	adrp	x1, .LANCHOR215
+	cbz	w0, .L3283
+	mov	w2, 2211
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3290
-.L3288:
+	b	.L3283
+.L3281:
 	mov	w0, 2
-	b	.L3396
-.L3228:
+	b	.L3389
+.L3221:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3291
+	bne	.L3284
 	mov	w0, 3
-	b	.L3396
-.L3291:
+	b	.L3389
+.L3284:
 	adrp	x20, .LANCHOR62
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3242
+	beq	.L3235
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3292
+	cbz	w2, .L3285
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3292:
+	b	.L3323
+.L3285:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR9
@@ -20665,14 +20725,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3293
-	adrp	x1, .LANCHOR215
+	cbz	w1, .L3286
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2245
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2239
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3293:
+.L3286:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20683,70 +20743,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3294
+	bhi	.L3287
 	strh	w0, [x21, 30]
-	b	.L3290
-.L3294:
+	b	.L3283
+.L3287:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3290
-.L3229:
+	b	.L3283
+.L3222:
 	adrp	x20, .LANCHOR62
 	adrp	x23, .LANCHOR80
 	add	x22, x20, :lo12:.LANCHOR62
 	add	x23, x23, :lo12:.LANCHOR80
-.L3365:
+.L3358:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3296
+	bcs	.L3289
 	cmp	w21, 7
-	bls	.L3365
-	b	.L3330
-.L3296:
+	bls	.L3358
+	b	.L3323
+.L3289:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3297
+	cbz	w3, .L3290
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3298
+	tbz	x0, 8, .L3291
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3298:
+.L3291:
 	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	add	x0, x20, :lo12:.LANCHOR62
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3299
-	adrp	x1, .LANCHOR215
+	beq	.L3292
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2279
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2273
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3299:
+.L3292:
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3330
-.L3297:
+	b	.L3323
+.L3290:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -20754,27 +20814,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3300
+	tbz	x0, 8, .L3293
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3300:
+.L3293:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3301
+	beq	.L3294
 	tst	w0, 192
-	bne	.L3302
-.L3301:
-	adrp	x1, .LANCHOR215
+	bne	.L3295
+.L3294:
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2289
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2283
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3302:
+.L3295:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20784,56 +20844,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3303
+	bhi	.L3296
 	strh	w0, [x19, 30]
-	b	.L3330
-.L3303:
+	b	.L3323
+.L3296:
 	strh	wzr, [x19, 30]
-.L3394:
+.L3387:
 	bl	flt_sys_flush
-	b	.L3330
-.L3230:
+	b	.L3323
+.L3223:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3304
+	bne	.L3297
 	adrp	x0, .LANCHOR71
 	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3304
+	bne	.L3297
 	bl	ftl_flush
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3305
+	cbz	w1, .L3298
 	mov	w0, w22
 	mov	w1, 5
-.L3391:
+.L3384:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3307
+	beq	.L3300
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3308
-	adrp	x1, .LANCHOR215
+	beq	.L3301
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2318
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2312
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3308:
+.L3301:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3329:
+.L3322:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20896,12 +20956,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3330
-.L3305:
+	b	.L3323
+.L3298:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3391
-.L3304:
+	b	.L3384
+.L3297:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20914,24 +20974,24 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR71
 	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3311:
+.L3304:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3330
+	beq	.L3323
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3312
+	cbnz	w0, .L3305
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3313
+	bhi	.L3306
 	bl	ftl_write_commit
-.L3313:
+.L3306:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3311
+	bcc	.L3304
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
@@ -20941,37 +21001,37 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3315
-	adrp	x1, .LANCHOR215
+	cbz	w1, .L3308
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	mov	w2, 2393
-	add	x1, x1, :lo12:.LANCHOR215
+	mov	w2, 2387
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3315:
+.L3308:
 	ldrh	w0, [x21, #:lo12:.LANCHOR62]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3316
+	cbnz	w1, .L3309
 	bl	ftl_free_sblk
-	b	.L3290
-.L3316:
+	b	.L3283
+.L3309:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3290
-.L3312:
+	b	.L3283
+.L3305:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3317
+	cbz	w0, .L3310
 	strh	wzr, [x20, 320]
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
 	ldr	w0, [x20, 324]
 	cmn	w0, #1
-	beq	.L3318
+	beq	.L3311
 	bl	ftl_mask_bad_block
-.L3318:
+.L3311:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20986,28 +21046,28 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3319
+	cbz	x0, .L3312
 	bl	buf_free
-.L3319:
+.L3312:
 	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2431
+	mov	w2, 2425
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	adrp	x1, .LANCHOR215
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3330
-.L3317:
+	b	.L3323
+.L3310:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3320
+	bls	.L3313
 	cmp	w1, w0
-	bcc	.L3311
+	bcc	.L3304
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
@@ -21018,12 +21078,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3330
-.L3320:
+	b	.L3323
+.L3313:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3321
+	bcc	.L3314
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -21032,7 +21092,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3321:
+.L3314:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -21050,40 +21110,40 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3323
+	bne	.L3316
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbnz	w1, .L3323
+	cbnz	w1, .L3316
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3323:
+.L3316:
 	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3330
-.L3326:
+	b	.L3323
+.L3319:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3327
+	bcc	.L3320
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3330
-.L3327:
+	b	.L3323
+.L3320:
 	cmp	w21, 15
-	bls	.L3233
+	bls	.L3226
 	cmp	w26, 1
-	bne	.L3330
+	bne	.L3323
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3233
-	b	.L3330
-.L3232:
+	bls	.L3226
+	b	.L3323
+.L3225:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21096,17 +21156,17 @@ zftl_do_gc:
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3395:
+.L3388:
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3307:
-	mov	w2, 2324
-	adrp	x1, .LANCHOR215
+	b	.L3323
+.L3300:
+	mov	w2, 2318
+	adrp	x1, .LANCHOR216
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR215
+	add	x1, x1, :lo12:.LANCHOR216
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3329
+	b	.L3322
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21126,22 +21186,22 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3398
+	tbz	x0, 12, .L3391
 	mov	w3, w2
-	adrp	x0, .LC218
+	adrp	x0, .LC221
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC221
 	mov	w1, w27
 	bl	printf
-.L3398:
-	cbnz	w27, .L3399
+.L3391:
+	cbnz	w27, .L3392
 	adrp	x0, .LANCHOR58
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3400:
+.L3393:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3414
+	bcc	.L3407
 	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
@@ -21156,8 +21216,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3402:
-	cbnz	w21, .L3410
+.L3395:
+	cbnz	w21, .L3403
 	adrp	x20, .LANCHOR90
 	adrp	x19, .LANCHOR94
 	add	x20, x20, :lo12:.LANCHOR90
@@ -21167,14 +21227,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3411:
+.L3404:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3412
+	ble	.L3405
 	mov	w0, 0
-.L3397:
+.L3390:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21182,28 +21242,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3399:
+.L3392:
 	cmp	w27, 3
-	bhi	.L3414
+	bhi	.L3407
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3400
-.L3410:
+	b	.L3393
+.L3403:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3403
+	cbnz	x0, .L3396
 	bl	ftl_write_commit
-	b	.L3402
-.L3403:
+	b	.L3395
+.L3396:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3406
+	bne	.L3399
 	cmp	w26, w22
-	bne	.L3407
+	bne	.L3400
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21212,9 +21272,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3419:
+.L3412:
 	strb	w3, [x28, 56]
-.L3406:
+.L3399:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -21236,31 +21296,31 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3402
-.L3407:
+	b	.L3395
+.L3400:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3419
-.L3412:
+	b	.L3412
+.L3405:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3411
-.L3414:
+	b	.L3404
+.L3407:
 	mov	w0, -1
-	b	.L3397
+	b	.L3390
 	.size	zftl_write, .-zftl_write
-	.section	.text.zftl_vendor_write,"ax",@progbits
+	.section	.text.ftl_vendor_write,"ax",@progbits
 	.align	2
-	.global	zftl_vendor_write
-	.type	zftl_vendor_write, %function
-zftl_vendor_write:
+	.global	ftl_vendor_write
+	.type	ftl_vendor_write, %function
+ftl_vendor_write:
 	mov	x3, x2
 	mov	w2, w1
 	add	w1, w0, 512
 	mov	w0, 2
 	b	zftl_write
-	.size	zftl_vendor_write, .-zftl_vendor_write
+	.size	ftl_vendor_write, .-ftl_vendor_write
 	.section	.text.zftl_sys_write,"ax",@progbits
 	.align	2
 	.global	zftl_sys_write
@@ -21307,12 +21367,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3425
+	bne	.L3418
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3425:
+.L3418:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21339,23 +21399,23 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3448
-	adrp	x24, .LANCHOR216
+	bcc	.L3441
+	adrp	x24, .LANCHOR217
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR216]
+	ldr	w1, [x24, #:lo12:.LANCHOR217]
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR216]
-	tbz	x2, 12, .L3429
-	adrp	x0, .LC219
+	str	w1, [x24, #:lo12:.LANCHOR217]
+	tbz	x2, 12, .L3422
+	adrp	x0, .LC222
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3429:
+.L3422:
 	adrp	x23, .LANCHOR97
 	adrp	x26, .LANCHOR121
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
@@ -21367,7 +21427,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3430
+	cbz	w25, .L3423
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21375,20 +21435,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3431
+	bne	.L3424
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3431:
+.L3424:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3433
+	beq	.L3426
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3433
+	cbz	x0, .L3426
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21407,53 +21467,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3433:
+.L3426:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3430:
-	cbz	w19, .L3435
+.L3423:
+	cbz	w19, .L3428
 	bl	ftl_flush
-.L3435:
+.L3428:
 	adrp	x25, .LANCHOR99
 	add	x21, x26, :lo12:.LANCHOR121
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3436:
+.L3429:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3441
-	cbz	w19, .L3443
+	bcs	.L3434
+	cbz	w19, .L3436
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3444
+	bne	.L3437
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3444:
+.L3437:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3443
+	beq	.L3436
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3443
+	cbz	x0, .L3436
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3446
-	adrp	x1, .LANCHOR217
+	bcc	.L3439
+	adrp	x1, .LANCHOR218
 	adrp	x0, .LC0
 	mov	w2, 1236
-	add	x1, x1, :lo12:.LANCHOR217
+	add	x1, x1, :lo12:.LANCHOR218
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3446:
+.L3439:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21465,38 +21525,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3443:
-	ldr	w1, [x24, #:lo12:.LANCHOR216]
+.L3436:
+	ldr	w1, [x24, #:lo12:.LANCHOR217]
 	cmp	w1, 8192
-	bls	.L3449
+	bls	.L3442
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3447
-	adrp	x0, .LC219
+	tbz	x0, 12, .L3440
+	adrp	x0, .LC222
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC219
+	add	x0, x0, :lo12:.LC222
 	bl	printf
-.L3447:
-	str	wzr, [x24, #:lo12:.LANCHOR216]
+.L3440:
+	str	wzr, [x24, #:lo12:.LANCHOR217]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3449:
+.L3442:
 	mov	w0, 0
-	b	.L3427
-.L3441:
+	b	.L3420
+.L3434:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3437
+	beq	.L3430
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3439
+	cbz	x0, .L3432
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21508,24 +21568,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3475:
+.L3468:
 	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3439:
+.L3432:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3436
-.L3437:
+	b	.L3429
+.L3430:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3439
+	beq	.L3432
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21543,10 +21603,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3475
-.L3448:
+	b	.L3468
+.L3441:
 	mov	w0, -1
-.L3427:
+.L3420:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21748,7 +21808,7 @@ _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21799,7 +21859,7 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -21854,7 +21914,7 @@ _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -21868,7 +21928,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -21922,7 +21982,7 @@ _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR216,. + 0
+	.set	.LANCHOR217,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
@@ -21934,9 +21994,16 @@ discard_sector_count:
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
+	.section	.bss.flash_ddr_tuning_sdr_read_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR155,. + 0
+	.type	flash_ddr_tuning_sdr_read_count, %object
+	.size	flash_ddr_tuning_sdr_read_count, 4
+flash_ddr_tuning_sdr_read_count:
+	.zero	4
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
@@ -21975,14 +22042,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR212,. + 0
+	.set	.LANCHOR213,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -21995,7 +22062,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -22008,7 +22075,7 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -22049,7 +22116,7 @@ ftl_sblk_vpn:
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22062,7 +22129,7 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -22116,7 +22183,7 @@ g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -22141,20 +22208,20 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22167,14 +22234,14 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
@@ -22201,7 +22268,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -22220,7 +22287,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22291,7 +22358,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22549,7 +22616,7 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -22599,7 +22666,7 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
@@ -22612,7 +22679,7 @@ pm_first_write:
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
@@ -22632,7 +22699,7 @@ pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
@@ -22706,7 +22773,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -22795,7 +22862,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -23243,7 +23310,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
+	.set	.LANCHOR215,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -23640,9 +23707,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 1024
+	.size	zftl_nand_flash_para_tbl, 1152
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -24116,7 +24183,7 @@ zftl_nand_flash_para_tbl:
 	.byte	4
 	.byte	0
 	.hword	512
-	.byte	2
+	.byte	1
 	.byte	-38
 	.byte	-33
 	.byte	0
@@ -24318,6 +24385,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	5
 	.byte	44
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1044
+	.hword	471
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	44
 	.byte	-124
 	.byte	68
 	.byte	50
@@ -24344,6 +24439,62 @@ zftl_nand_flash_para_tbl:
 	.byte	-38
 	.byte	-33
 	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	-60
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	9671
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-38
+	.byte	-33
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	52
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	9671
+	.byte	5
+	.byte	19
+	.byte	70
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	4
+	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-38
+	.byte	-33
+	.byte	0
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -24484,6 +24635,34 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
+	.byte	6
+	.byte	-83
+	.byte	-41
+	.byte	20
+	.byte	-98
+	.byte	52
+	.byte	74
+	.byte	2
+	.byte	1
+	.byte	16
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1056
+	.hword	473
+	.byte	2
+	.byte	5
+	.byte	40
+	.byte	32
+	.byte	4
+	.byte	1
+	.byte	3
+	.byte	0
+	.hword	256
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
 	.byte	5
 	.byte	-119
 	.byte	100
@@ -24498,7 +24677,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1024
-	.hword	1479
+	.hword	455
 	.byte	3
 	.byte	17
 	.byte	40
@@ -24526,7 +24705,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1024
-	.hword	1479
+	.hword	455
 	.byte	3
 	.byte	17
 	.byte	40
@@ -24556,7 +24735,7 @@ __func__.10085:
 	.string	"_list_update_data_list"
 	.section	.rodata.__func__.10193,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	__func__.10193, %object
 	.size	__func__.10193, 15
 __func__.10193:
@@ -24584,21 +24763,21 @@ __func__.10276:
 	.string	"ftl_free_sys_blk"
 	.section	.rodata.__func__.10311,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	__func__.10311, %object
 	.size	__func__.10311, 14
 __func__.10311:
 	.string	"ftl_sblk_dump"
 	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	__func__.10335, %object
 	.size	__func__.10335, 16
 __func__.10335:
 	.string	"ftl_sysblk_dump"
 	.section	.rodata.__func__.10354,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	__func__.10354, %object
 	.size	__func__.10354, 23
 __func__.10354:
@@ -24612,7 +24791,7 @@ __func__.10380:
 	.string	"ftl_get_ppa_from_index"
 	.section	.rodata.__func__.10401,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR211,. + 0
 	.type	__func__.10401, %object
 	.size	__func__.10401, 19
 __func__.10401:
@@ -24633,63 +24812,63 @@ __func__.10430:
 	.string	"ftl_ext_alloc_new_blk"
 	.section	.rodata.__func__.10455,"a",@progbits
 	.align	3
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	__func__.10455, %object
 	.size	__func__.10455, 19
 __func__.10455:
 	.string	"ftl_ext_info_flush"
 	.section	.rodata.__func__.10467,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	__func__.10467, %object
 	.size	__func__.10467, 18
 __func__.10467:
 	.string	"ftl_ext_info_init"
 	.section	.rodata.__func__.10504,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	__func__.10504, %object
 	.size	__func__.10504, 25
 __func__.10504:
 	.string	"ftl_low_format_data_init"
 	.section	.rodata.__func__.10519,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	__func__.10519, %object
 	.size	__func__.10519, 15
 __func__.10519:
 	.string	"ftl_low_format"
 	.section	.rodata.__func__.10567,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	__func__.10567, %object
 	.size	__func__.10567, 14
 __func__.10567:
 	.string	"ftl_prog_page"
 	.section	.rodata.__func__.10684,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	__func__.10684, %object
 	.size	__func__.10684, 31
 __func__.10684:
 	.string	"queue_wait_first_req_completed"
 	.section	.rodata.__func__.10737,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	__func__.10737, %object
 	.size	__func__.10737, 15
 __func__.10737:
 	.string	"sblk_prog_page"
 	.section	.rodata.__func__.10764,"a",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	__func__.10764, %object
 	.size	__func__.10764, 15
 __func__.10764:
 	.string	"sblk_read_page"
 	.section	.rodata.__func__.10803,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	__func__.10803, %object
 	.size	__func__.10803, 16
 __func__.10803:
@@ -24703,7 +24882,7 @@ __func__.10817:
 	.string	"pm_free_sblk"
 	.section	.rodata.__func__.10837,"a",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	__func__.10837, %object
 	.size	__func__.10837, 6
 __func__.10837:
@@ -24717,7 +24896,7 @@ __func__.10853:
 	.string	"pm_alloc_new_blk"
 	.section	.rodata.__func__.10863,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	__func__.10863, %object
 	.size	__func__.10863, 14
 __func__.10863:
@@ -24731,14 +24910,14 @@ __func__.10881:
 	.string	"pm_select_ram_region"
 	.section	.rodata.__func__.8530,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	__func__.8530, %object
 	.size	__func__.8530, 19
 __func__.8530:
 	.string	"flash_read_page_en"
 	.section	.rodata.__func__.8559,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	__func__.8559, %object
 	.size	__func__.8559, 19
 __func__.8559:
@@ -24766,14 +24945,14 @@ __func__.8599:
 	.string	"flash_wait_device_ready_raw"
 	.section	.rodata.__func__.8623,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	__func__.8623, %object
 	.size	__func__.8623, 26
 __func__.8623:
 	.string	"flash_start_tlc_page_prog"
 	.section	.rodata.__func__.8641,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.8641, %object
 	.size	__func__.8641, 22
 __func__.8641:
@@ -24787,7 +24966,7 @@ __func__.8652:
 	.string	"flash_start_page_read"
 	.section	.rodata.__func__.8665,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	__func__.8665, %object
 	.size	__func__.8665, 31
 __func__.8665:
@@ -24801,7 +24980,7 @@ __func__.8677:
 	.string	"flash_start_plane_read"
 	.section	.rodata.__func__.8690,"a",@progbits
 	.align	3
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	__func__.8690, %object
 	.size	__func__.8690, 25
 __func__.8690:
@@ -24820,163 +24999,163 @@ __func__.9001:
 	.size	__func__.9011, 22
 __func__.9011:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.9055,"a",@progbits
+	.section	.rodata.__func__.9056,"a",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
-	.type	__func__.9055, %object
-	.size	__func__.9055, 16
-__func__.9055:
+	.set	.LANCHOR193,. + 0
+	.type	__func__.9056, %object
+	.size	__func__.9056, 16
+__func__.9056:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9078,"a",@progbits
+	.section	.rodata.__func__.9079,"a",@progbits
 	.align	3
 	.set	.LANCHOR144,. + 0
-	.type	__func__.9078, %object
-	.size	__func__.9078, 11
-__func__.9078:
+	.type	__func__.9079, %object
+	.size	__func__.9079, 11
+__func__.9079:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9238,"a",@progbits
+	.section	.rodata.__func__.9239,"a",@progbits
 	.align	3
 	.set	.LANCHOR52,. + 0
-	.type	__func__.9238, %object
-	.size	__func__.9238, 13
-__func__.9238:
+	.type	__func__.9239, %object
+	.size	__func__.9239, 13
+__func__.9239:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9251,"a",@progbits
+	.section	.rodata.__func__.9252,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9251, %object
-	.size	__func__.9251, 10
-__func__.9251:
+	.type	__func__.9252, %object
+	.size	__func__.9252, 10
+__func__.9252:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9265,"a",@progbits
+	.section	.rodata.__func__.9266,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.9265, %object
-	.size	__func__.9265, 16
-__func__.9265:
+	.type	__func__.9266, %object
+	.size	__func__.9266, 16
+__func__.9266:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9277,"a",@progbits
+	.section	.rodata.__func__.9278,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.9277, %object
-	.size	__func__.9277, 20
-__func__.9277:
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9278, %object
+	.size	__func__.9278, 20
+__func__.9278:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9288,"a",@progbits
+	.section	.rodata.__func__.9289,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9288, %object
-	.size	__func__.9288, 21
-__func__.9288:
+	.type	__func__.9289, %object
+	.size	__func__.9289, 21
+__func__.9289:
 	.string	"flash_info_data_init"
-	.section	.rodata.__func__.9310,"a",@progbits
+	.section	.rodata.__func__.9311,"a",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
-	.type	__func__.9310, %object
-	.size	__func__.9310, 17
-__func__.9310:
+	.set	.LANCHOR192,. + 0
+	.type	__func__.9311, %object
+	.size	__func__.9311, 17
+__func__.9311:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9386,"a",@progbits
+	.section	.rodata.__func__.9387,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.9386, %object
-	.size	__func__.9386, 17
-__func__.9386:
+	.type	__func__.9387, %object
+	.size	__func__.9387, 17
+__func__.9387:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9433,"a",@progbits
+	.section	.rodata.__func__.9434,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9433, %object
-	.size	__func__.9433, 17
-__func__.9433:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9434, %object
+	.size	__func__.9434, 17
+__func__.9434:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9451,"a",@progbits
+	.section	.rodata.__func__.9452,"a",@progbits
 	.align	3
 	.set	.LANCHOR120,. + 0
-	.type	__func__.9451, %object
-	.size	__func__.9451, 14
-__func__.9451:
+	.type	__func__.9452, %object
+	.size	__func__.9452, 14
+__func__.9452:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9495,"a",@progbits
+	.section	.rodata.__func__.9496,"a",@progbits
 	.align	3
 	.set	.LANCHOR123,. + 0
-	.type	__func__.9495, %object
-	.size	__func__.9495, 18
-__func__.9495:
+	.type	__func__.9496, %object
+	.size	__func__.9496, 18
+__func__.9496:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9528,"a",@progbits
+	.section	.rodata.__func__.9529,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.9528, %object
-	.size	__func__.9528, 10
-__func__.9528:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9529, %object
+	.size	__func__.9529, 10
+__func__.9529:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9559,"a",@progbits
+	.section	.rodata.__func__.9560,"a",@progbits
 	.align	3
-	.set	.LANCHOR217,. + 0
-	.type	__func__.9559, %object
-	.size	__func__.9559, 13
-__func__.9559:
+	.set	.LANCHOR218,. + 0
+	.type	__func__.9560, %object
+	.size	__func__.9560, 13
+__func__.9560:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9678,"a",@progbits
+	.section	.rodata.__func__.9679,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9678, %object
-	.size	__func__.9678, 12
-__func__.9678:
+	.type	__func__.9679, %object
+	.size	__func__.9679, 12
+__func__.9679:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9699,"a",@progbits
+	.section	.rodata.__func__.9700,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.9699, %object
-	.size	__func__.9699, 21
-__func__.9699:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9700, %object
+	.size	__func__.9700, 21
+__func__.9700:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9733,"a",@progbits
+	.section	.rodata.__func__.9734,"a",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
-	.type	__func__.9733, %object
-	.size	__func__.9733, 22
-__func__.9733:
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9734, %object
+	.size	__func__.9734, 22
+__func__.9734:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9746,"a",@progbits
+	.section	.rodata.__func__.9747,"a",@progbits
 	.align	3
 	.set	.LANCHOR67,. + 0
-	.type	__func__.9746, %object
-	.size	__func__.9746, 19
-__func__.9746:
+	.type	__func__.9747, %object
+	.size	__func__.9747, 19
+__func__.9747:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9775,"a",@progbits
+	.section	.rodata.__func__.9776,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9775, %object
-	.size	__func__.9775, 16
-__func__.9775:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9776, %object
+	.size	__func__.9776, 16
+__func__.9776:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9797,"a",@progbits
+	.section	.rodata.__func__.9798,"a",@progbits
 	.align	3
 	.set	.LANCHOR103,. + 0
-	.type	__func__.9797, %object
-	.size	__func__.9797, 16
-__func__.9797:
+	.type	__func__.9798, %object
+	.size	__func__.9798, 16
+__func__.9798:
 	.string	"gc_free_src_blk"
 	.section	.rodata.__func__.9842,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	__func__.9842, %object
 	.size	__func__.9842, 16
 __func__.9842:
 	.string	"gc_scan_src_blk"
 	.section	.rodata.__func__.9900,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	__func__.9900, %object
 	.size	__func__.9900, 20
 __func__.9900:
 	.string	"gc_scan_static_data"
 	.section	.rodata.__func__.9967,"a",@progbits
 	.align	3
-	.set	.LANCHOR215,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	__func__.9967, %object
 	.size	__func__.9967, 11
 __func__.9967:
@@ -24985,27 +25164,27 @@ __func__.9967:
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC151:
+.LC154:
 	.string	"free_buf_count: %d\n"
-.LC152:
+.LC155:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC153:
+.LC156:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC154:
+.LC157:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC155:
+.LC158:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC156:
+.LC159:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC157:
+.LC160:
 	.string	"lpa:"
-.LC158:
+.LC161:
 	.string	"vpn:"
-.LC159:
+.LC162:
 	.string	"sblk:"
-.LC160:
+.LC163:
 	.string	"lpa_hash:"
-.LC161:
+.LC164:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -25013,7 +25192,7 @@ __func__.9967:
 .LC69:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC117:
+.LC118:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
 .LC109:
@@ -25022,53 +25201,59 @@ __func__.9967:
 	.string	"sync para %d\n"
 .LC111:
 	.string	"DDR mode Read error %x %x\n"
+.LC112:
+	.string	"SDR mode Read %x %x ecc:%x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
 	.string	"erase done: %x\n"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
 .LC33:
-	.string	"flash_erase_block %x %x\n"
+	.string	"flash_erase_block %x %x %x\n"
 .LC34:
-	.string	"flash_erase_block block = %x status = %x\n"
+	.string	"flash_erase_block %d block = %x status = %x\n"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
 .LC31:
 	.string	"flash_erase_duplane_block %x %x %x\n"
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC114:
+.LC115:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC115:
-	.string	"...%d @ %s %d %p\n"
 .LC116:
+	.string	"...%d @ %s %d %p\n"
+.LC117:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
 .LC84:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC146:
+.LC149:
 	.string	"finfo:"
-.LC147:
+.LC150:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC148:
+.LC151:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC121:
-	.string	"flash_prog_page %x %x %x\n"
 .LC122:
+	.string	"flash_prog_page %x %x %x\n"
+.LC123:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC127:
-	.string	"flash_prog_page_en:%x %x\n"
 .LC128:
-	.string	"spare"
+	.string	"flash_prog_page_en:%x %x\n"
 .LC129:
-	.string	"data"
+	.string	"w d:"
 .LC130:
+	.string	"w s:"
+.LC131:
+	.string	"spare"
+.LC132:
+	.string	"data"
+.LC133:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -25077,9 +25262,9 @@ __func__.9967:
 .LC102:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC112:
-	.string	"flash_read_page_en %x %x %x\n"
 .LC113:
+	.string	"flash_read_page_en %x %x %x\n"
+.LC114:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -25090,7 +25275,7 @@ __func__.9967:
 .LC67:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC135:
+.LC138:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
@@ -25098,70 +25283,70 @@ __func__.9967:
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC133:
+.LC136:
 	.string	"%d %x @%d %x\n"
-.LC134:
+.LC137:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC132:
+.LC135:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC136:
+.LC139:
 	.string	"ftl_low_format %d\n"
-.LC137:
+.LC140:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC139:
+.LC142:
 	.string	"saved_active_page  = %x\n"
-.LC140:
+.LC143:
 	.string	"saved_active_plane = %x\n"
-.LC141:
+.LC144:
 	.string	"sblk = %x\n"
-.LC142:
+.LC145:
 	.string	"phy_blk = %x %x\n"
-.LC143:
+.LC146:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC144:
+.LC147:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC138:
+.LC141:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC194:
+.LC197:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC195:
+.LC198:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC196:
+.LC199:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC197:
+.LC200:
 	.string	"index= %x, lpa=%x\n"
-.LC198:
+.LC201:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC149:
+.LC152:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC150:
+.LC153:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC131:
+.LC134:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC205:
+.LC208:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC206:
+.LC209:
 	.string	"ftl_update_l2p_map"
-.LC207:
+.LC210:
 	.string	"lpa_tbl:"
-.LC208:
+.LC211:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
-	.string	"ftl_vpn_decrement %x = %d\n"
+	.string	"ftl_vpn_decrement %x = %d, %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC209:
+.LC212:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -25172,20 +25357,20 @@ __func__.9967:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC202:
+.LC205:
 	.string	"gc_lpa:"
-.LC203:
+.LC206:
 	.string	"gc_ppa:"
-.LC204:
+.LC207:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC210:
+.LC213:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC211:
+.LC214:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC212:
+.LC215:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC213:
+.LC216:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -25196,16 +25381,16 @@ __func__.9967:
 .LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC172:
+.LC175:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC173:
+.LC176:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC174:
+.LC177:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC192:
+.LC195:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC193:
+.LC196:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC47:
@@ -25232,13 +25417,13 @@ __func__.9967:
 .LC81:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC188:
+.LC191:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC189:
+.LC192:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC190:
+.LC193:
 	.string	"lpa: %x %x %x\n"
-.LC191:
+.LC194:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC43:
@@ -25254,31 +25439,31 @@ __func__.9967:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC123:
-	.string	"1 write_idblock fix data %x %x %x\n"
 .LC124:
-	.string	"write_idblock check fail! %x\n"
+	.string	"1 write_idblock fix data %x %x %x\n"
 .LC125:
+	.string	"write_idblock check fail! %x\n"
+.LC126:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC163:
+.LC166:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC164:
+.LC167:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC165:
+.LC168:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC166:
+.LC169:
 	.string	"pm_ppa:"
-.LC167:
+.LC170:
 	.string	"data:"
-.LC168:
+.LC171:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
 .LC103:
-	.string	"micron %d row=%x,count %d,status=%d\n"
+	.string	"micron %d row=%x,last status %d,status = %d\n"
 .LC104:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
@@ -25376,18 +25561,18 @@ __func__.9967:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC169:
+.LC172:
 	.string	"pm_init posr %x %x %x\n"
-.LC170:
+.LC173:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC171:
+.LC174:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC162:
+.LC165:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC145:
+.LC148:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -25409,11 +25594,11 @@ __func__.9967:
 .LC54:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC118:
-	.string	"read: %x %x %x %x\n"
 .LC119:
-	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
+	.string	"read: %x %x %x %x\n"
 .LC120:
+	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC121:
 	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
@@ -25550,7 +25735,7 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC187:
+.LC190:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC88:
@@ -25565,7 +25750,7 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC126:
+.LC127:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -26163,16 +26348,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC219:
+.LC222:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC214:
+.LC217:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC215:
+.LC218:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC216:
+.LC219:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC217:
+.LC220:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -26185,41 +26370,41 @@ toshiba_ref_value:
 .LC52:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC175:
-	.string	"FTL version: 6.0.11 20180718"
-.LC176:
+.LC178:
+	.string	"FTL version: 6.0.14 20180908"
+.LC179:
 	.string	"_c_user_data_density := %d\n"
-.LC177:
+.LC180:
 	.string	"_c_totle_phy_density := %d\n"
-.LC178:
+.LC181:
 	.string	"_c_totle_log_page := %d\n"
-.LC179:
+.LC182:
 	.string	"_c_totle_data_density := %d\n"
-.LC180:
+.LC183:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC181:
+.LC184:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC182:
+.LC185:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC183:
+.LC186:
 	.string	"_min_slc_super_block := %d\n"
-.LC184:
+.LC187:
 	.string	"_max_xlc_super_block := %d\n"
-.LC185:
+.LC188:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC186:
+.LC189:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC199:
+.LC202:
 	.string	"ftl_read %x %x %x\n"
-.LC200:
+.LC203:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC201:
+.LC204:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC218:
+.LC221:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit eff8995ad7e97cc6b31597394274aa3e3dbe8dba
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 09:35:15 2018 +0800

    video/drm: dsi: support non-continuous clock behavior
    
    android/rk/u-boot:rkdevelop:1e3808f13bac9cca1dc67e0db14d5c34dab94067
    
    Change-Id: Ibe35ec4d3de4f3bd4fba95cb5480d96c1950597c
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 0032520d91..103c3ad9b8 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -372,6 +372,17 @@ static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
 	return readl(dsi->base + reg);
 }
 
+static inline void dsi_update_bits(struct dw_mipi_dsi *dsi,
+				   u32 reg, u32 mask, u32 val)
+{
+	u32 orig, tmp;
+
+	orig = dsi_read(dsi, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	dsi_write(dsi, reg, tmp);
+}
+
 static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
 			    unsigned int val)
 {
@@ -613,10 +624,11 @@ static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 {
 	if (flags & MIPI_DSI_MSG_USE_LPM) {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
-		dsi_write(dsi, DSI_LPCLK_CTRL, 0);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS, 0);
 	} else {
 		dsi_write(dsi, DSI_CMD_MODE_CFG, 0);
-		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+		dsi_update_bits(dsi, DSI_LPCLK_CTRL,
+				PHY_TXREQUESTCLKHS, PHY_TXREQUESTCLKHS);
 	}
 }
 

commit 5b620ada08931fa9d2878a8e03c3e3ca18451563
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 17:05:57 2018 +0800

    video/drm: panel: fix return value check of mipi_dsi_dcs_write/mipi_dsi_generic_write
    
    Change-Id: Ib80b478b5873ef2abb40b5069364aaf621299f64
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 10cd29384c..ebf599635d 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -239,7 +239,7 @@ static int rockchip_panel_send_dsi_cmds(struct display_state *state,
 			return -EINVAL;
 		}
 
-		if (ret) {
+		if (ret < 0) {
 			printf("failed to write cmd%d: %d\n", i, ret);
 			return ret;
 		}

commit 43a0418788666721052f2d72a302155986a4da26
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Sep 26 09:22:01 2018 +0800

    video/drm: dsi: support read command
    
    android/rk/u-boot:rkdevelop:e7fabfb74b7c08fc30fd5cbd2538c85b40897a9a
    
    Change-Id: Ib2d1d8523cda02f51d01df0bb4d6ef8cfb53c2b3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 04784d5d79..0032520d91 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -620,6 +620,55 @@ static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 	}
 }
 
+static int dw_mipi_dsi_read_from_fifo(struct dw_mipi_dsi *dsi,
+				      const struct mipi_dsi_msg *msg)
+{
+	u8 *payload = msg->rx_buf;
+	u16 length;
+	u32 val;
+	int ret;
+
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 val, !(val & GEN_RD_CMD_BUSY), 50, 5000);
+	if (ret) {
+		printf("entire response isn't stored in the FIFO\n");
+		return ret;
+	}
+
+	/* Receive payload */
+	for (length = msg->rx_len; length; length -= 4) {
+		ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+					 val, !(val & GEN_PLD_R_EMPTY),
+					 50, 5000);
+		if (ret) {
+			printf("Read payload FIFO is empty\n");
+			return ret;
+		}
+
+		val = dsi_read(dsi, DSI_GEN_PLD_DATA);
+
+		switch (length) {
+		case 3:
+			payload[2] = (val >> 16) & 0xff;
+			/* Fall through */
+		case 2:
+			payload[1] = (val >> 8) & 0xff;
+			/* Fall through */
+		case 1:
+			payload[0] = val & 0xff;
+			return 0;
+		}
+
+		payload[0] = (val >>  0) & 0xff;
+		payload[1] = (val >>  8) & 0xff;
+		payload[2] = (val >> 16) & 0xff;
+		payload[3] = (val >> 24) & 0xff;
+		payload += 4;
+	}
+
+	return 0;
+}
+
 static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 					const struct mipi_dsi_msg *msg)
 {
@@ -636,7 +685,7 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 
 	rockchip_set_transfer_mode(dsi, msg->flags);
 
-	/* Send payload,  */
+	/* Send payload */
 	while (DIV_ROUND_UP(packet.payload_length, 4)) {
 		/*
 		 * Alternatively, you can always keep the FIFO
@@ -677,6 +726,12 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 	if (ret)
 		return ret;
 
+	if (msg->rx_len) {
+		ret = dw_mipi_dsi_read_from_fifo(dsi, msg);
+		if (ret < 0)
+			return ret;
+	}
+
 	if (dsi->slave) {
 		ret = rockchip_dsi_send_packet(dsi->slave, msg);
 		if (ret) {
@@ -684,7 +739,8 @@ static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
 			return ret;
 		}
 	}
-	return 0;
+
+	return msg->rx_len ? msg->rx_len : msg->tx_len;
 }
 
 static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,

commit fdb51f0a384d063d996e2f576f2578450945239f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 15:57:03 2018 +0800

    rockchip: query recovery partition existence before enter recovery mode
    
    if there is not recovery partition, just boot on.
    
    Change-Id: Ib2a4fa9be6ab26e927680eef1bbae93a7fddd7df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 8a20a3a31e..59b8beb26e 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -112,6 +112,22 @@ void rockchip_dnl_mode_check(void)
 			set_back_to_bootrom_dnl_flag();
 			do_reset(NULL, 0, 0, NULL);
 		} else {
+#ifdef CONFIG_RKIMG_BOOTLOADER
+			/* If there is no recovery partition, just boot on */
+			struct blk_desc *dev_desc;
+			disk_partition_t part_info;
+
+			dev_desc = rockchip_get_bootdev();
+			if (!dev_desc) {
+				printf("%s: dev_desc is NULL!\n", __func__);
+				return;
+			}
+			if (part_get_info_by_name(dev_desc, PART_RECOVERY,
+						  &part_info)) {
+				debug("%s: no recovery partition\n", __func__);
+				return;
+			}
+#endif
 			printf("recovery key pressed, entering recovery mode!\n");
 			env_set("reboot_mode", "recovery");
 		}

commit f88d7e9780061da726ed1780e49ecd464bb03688
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 28 15:27:15 2018 +0800

    configs: rk1808: cut down unused modules
    
    Change-Id: I90749f153f61af25c784d4176745b8db677b0eab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index e5fb298bbd..65dac1e786 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_EVB_RK1808=y
 CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
@@ -17,15 +16,30 @@ CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
+# CONFIG_CMD_LOADB is not set
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -71,3 +85,5 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_LZ4=y
+# CONFIG_EFI_LOADER is not set
+CONFIG_TEST_ROCKCHIP=y

commit bcf5a32a7cea8605423b0ecb34aca509b4701fb5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 13:11:26 2018 +0800

    lib: gzip: lower the message when parse header
    
    Change-Id: Iedd2cbefac99fb17256770dc334741b9e760c449
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/gunzip.c b/lib/gunzip.c
index adb86c7550..3a5df68de6 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -50,7 +50,7 @@ int gzip_parse_header(const unsigned char *src, unsigned long len)
 	i = 10;
 	flags = src[3];
 	if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
-		puts ("Error: Bad gzipped data\n");
+		debug("Error: Bad gzipped data\n");
 		return (-1);
 	}
 	if ((flags & EXTRA_FIELD) != 0)

commit d6ceaafd1a113ad77916608ec7c45e6f4f7f2730
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 14:49:59 2018 +0800

    rockchip: px30: add fdt_high/initrd_high to avoid relocation
    
    Change-Id: Ib6dd7b98ea5b44cecd0f52e570643c486940e83c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index cb26415285..abec304cba 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -49,6 +49,8 @@
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
+	"fdt_high=0xffffffffffffffff\0" \
+	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 15349ff5d02923ba1f6358cb0c778f9f6cec0cab
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 13:04:08 2018 +0800

    rockchip: rk1808: add fdt_high/initrd_high to avoid relocation
    
    Change-Id: Icc418811d2ffa73c710391a7850dd6e292eddc6e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index b7a25f4bbc..276db39af0 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -36,6 +36,8 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
+	"fdt_high=0xffffffffffffffff\0" \
+	"initrd_high=0xffffffffffffffff\0" \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \

commit 1dfe3932bf8ddec130b80fedc2d73f2ae08621a4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 12:55:51 2018 +0800

    rockchip: rk1808: support decomp lz4 kernel image
    
    Change-Id: Ia8867efe104fd59974b83c10770aece61f4643d7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index eaa285a3e0..e5fb298bbd 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -70,3 +70,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_LZ4=y
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index af189ae03e..b7a25f4bbc 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -40,6 +40,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>

commit 70641c3416f4ad6cab3ae95bf31c2f9cb2170cfd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 11:40:42 2018 +0800

    dm: i2c: print i2c speed
    
    i2c speed is an important factor for boot time, it's good
    for developers to notice this.
    
    Change-Id: I46472e8ec89f3328cf6f20b72351deb512dfdaa1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 1397f34dda..206a4f6d1b 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -491,7 +491,7 @@ static int i2c_post_probe(struct udevice *dev)
 	struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
 
 	i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
-
+	printf("I2c speed: %dHz\n", i2c->speed_hz);
 	return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
 #else
 	return 0;

commit 992f4e77226545930c08c876ae3030c36a2fab3b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 11:35:31 2018 +0800

    power: charge animation: enable regulator-mem-state
    
    Change-Id: I31a687ca5a53c57d5b49fb23ec5951b34b1e25f1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 854e961798..8e556ec242 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -161,6 +161,8 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
+		putc('0');
+		regulators_enable_state_mem(false);
 		putc('1');
 		local_irq_disable();
 		putc('2');

commit 0ae9790ca7754378cd92b002ada33c9f3cd9fce9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 11:28:50 2018 +0800

    dm: regulator: drop regulator-state-mem initial from autoset
    
    init regulator-state-mem wastes time a lot and is only needed when
    system suspend is called, so provide regulators_enable_state_mem()
    the driver that implements system suspend.
    
    Change-Id: I2499df7caa9224879eed057d9269e8dcdce11c51
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 7182bcc90b..5b1f574e86 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -244,6 +244,20 @@ int device_get_supply_regulator(struct udevice *dev, const char *supply_name,
 					    supply_name, devp);
 }
 
+static int regulator_init_suspend(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	int ret;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+
+	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
+	if (!ret && uc_pdata->suspend_on)
+		return regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+
+	return 0;
+}
+
 int regulator_autoset(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -254,16 +268,6 @@ int regulator_autoset(struct udevice *dev)
 	if (uc_pdata->ramp_delay != -ENODATA)
 		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
 
-	/*
-	 * Suspend configure is not necessary and should not influence normal
-	 * configure, so that we set "ret=0" even failed here.
-	 */
-	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
-	if (!ret && uc_pdata->suspend_on)
-		regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
-	else
-		ret = 0;
-
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;
 
@@ -464,6 +468,31 @@ static int regulator_pre_probe(struct udevice *dev)
 	return 0;
 }
 
+int regulators_enable_state_mem(bool verbose)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		ret = regulator_init_suspend(dev);
+
+		if (ret == -EMEDIUMTYPE)
+			ret = 0;
+		if (verbose)
+			regulator_show(dev, ret);
+		if (ret == -ENOSYS)
+			ret = 0;
+	}
+
+	return ret;
+}
+
 int regulators_enable_boot_on(bool verbose)
 {
 	struct udevice *dev;
@@ -477,6 +506,7 @@ int regulators_enable_boot_on(bool verbose)
 	     dev;
 	     uclass_next_device(&dev)) {
 		ret = regulator_autoset(dev);
+
 		if (ret == -EMEDIUMTYPE)
 			ret = 0;
 		if (verbose)
diff --git a/include/power/regulator.h b/include/power/regulator.h
index 8e5f7c855d..a6a942bb90 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -394,23 +394,11 @@ int regulator_set_mode(struct udevice *dev, int mode_id);
 int regulators_enable_boot_on(bool verbose);
 
 /**
- * regulator_autoset: setup the voltage/current on a regulator
+ * regulators_enable_state_mem() - enable regulators state mem configure
  *
- * The setup depends on constraints found in device's uclass's platform data
- * (struct dm_regulator_uclass_platdata):
- *
- * - Enable - will set - if any of: 'always_on' or 'boot_on' is set to true,
- *   or if both are unset, then the function returns
- * - Voltage value - will set - if '.min_uV' and '.max_uV' values are equal
- * - Current limit - will set - if '.min_uA' and '.max_uA' values are equal
- *
- * The function returns on the first-encountered error.
- *
- * @platname - expected string for dm_regulator_uclass_platdata .name field
- * @devp     - returned pointer to the regulator device - if non-NULL passed
- * @return: 0 on success or negative value of errno.
+ * This sets regulator-state-mem state for all regulators ;
  */
-int regulator_autoset(struct udevice *dev);
+int regulators_enable_state_mem(bool verbose);
 
 /**
  * regulator_autoset_by_name: setup the regulator given by its uclass's

commit 7bd9afa1c69dea06eeedb349273f15d330e20b15
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 10:51:58 2018 +0800

    rockchip: add rk1808 chip info support
    
    Change-Id: I368ea86665da002b2bfe67b1dda9d93e51b8d1d8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 15baad390e..ad9c49c711 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -88,6 +88,8 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 		chip_info[0] = 0x33333043;
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+		chip_info[0] = 0x31383041;
 #endif
 	}
 

commit fc99e0440b4b6d4c96074ec9ae1d634871b72d5f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Oct 7 10:08:59 2018 +0800

    make.sh: support parse address with reloc offset
    
    Usage:
            ./make.sh [reloc_addr]-[reloc_offset]
    
    Example:
            ./make.sh 7fe8fb88-7f88d000(same as: ./make.sh 602b88)
    
    Change-Id: I08bb733702d18ddea89127e8d8f2db71faabe95c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index ff106db8ab..2851949c09 100755
--- a/make.sh
+++ b/make.sh
@@ -75,26 +75,27 @@ help()
 	echo "Example:"
 	echo
 	echo "1. Build board:"
-	echo "	./make.sh evb-rk3399            ---- build for evb-rk3399_defconfig"
-	echo "	./make.sh evb-rk3399 O=rockdev  ---- build for evb-rk3399_defconfig with output dir "./rockdev""
-	echo "	./make.sh firefly-rk3288        ---- build for firefly-rk3288_defconfig"
-	echo "	./make.sh                       ---- build with exist .config"
+	echo "	./make.sh evb-rk3399               --- build for evb-rk3399_defconfig"
+	echo "	./make.sh evb-rk3399 O=rockdev     --- build for evb-rk3399_defconfig with output dir "./rockdev""
+	echo "	./make.sh firefly-rk3288           --- build for firefly-rk3288_defconfig"
+	echo "	./make.sh                          --- build with exist .config"
 	echo
-	echo "	After build, images of uboot, loader and trust are all generated."
+	echo "	After build, Images of uboot, loader and trust are all generated."
 	echo
 	echo "2. Pack helper:"
-	echo "	./make.sh trust         --- pack trust.img"
-	echo "	./make.sh uboot         --- pack uboot.img"
-	echo "	./make.sh loader        --- pack loader bin"
-	echo "	./make.sh loader-all	--- pack loader bin (all supported loaders)"
+	echo "	./make.sh trust                    --- pack trust.img"
+	echo "	./make.sh uboot                    --- pack uboot.img"
+	echo "	./make.sh loader                   --- pack loader bin"
+	echo "	./make.sh loader-all	           --- pack loader bin (all supported loaders)"
 	echo
 	echo "3. Debug helper:"
-	echo "	./make.sh elf           --- dump elf file with -D(default)"
-	echo "	./make.sh elf-S         --- dump elf file with -S"
-	echo "	./make.sh elf-d         --- dump elf file with -d"
-	echo "	./make.sh <addr>        --- dump function symbol and code position of address"
-	echo "	./make.sh map           --- cat u-boot.map"
-	echo "	./make.sh sym           --- cat u-boot.sym"
+	echo "	./make.sh elf                      --- dump elf file with -D(default)"
+	echo "	./make.sh elf-S                    --- dump elf file with -S"
+	echo "	./make.sh elf-d                    --- dump elf file with -d"
+	echo "	./make.sh <no reloc_addr>          --- dump function symbol and code position of address(no relocated)"
+	echo "	./make.sh <reloc_addr-reloc_off>   --- dump function symbol and code position of address(relocated)"
+	echo "	./make.sh map                      --- cat u-boot.map"
+	echo "	./make.sh sym                      --- cat u-boot.sym"
 }
 
 prepare()
@@ -154,7 +155,7 @@ prepare()
 
 		*)
 		#Func address is valid ?
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ]; then
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ]; then
 			return
 		elif [ ! -f configs/${BOARD}_defconfig ]; then
 			echo
@@ -316,12 +317,27 @@ sub_commands()
 
 		*)
 		# Search function and code position of address
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ] && [ ${FUNCADDR} ]; then
+		RELOC_OFF=${FUNCADDR#*-}
+		FUNCADDR=${FUNCADDR%-*}
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X,-]//g') ] && [ ${FUNCADDR} ]; then
 			# With prefix: '0x' or '0X'
 			if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
 				FUNCADDR=`echo $FUNCADDR | awk '{ print strtonum($0) }'`
 				FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
 			fi
+			if [ `echo ${RELOC_OFF} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ] && [ ${RELOC_OFF} ]; then
+				RELOC_OFF=`echo $RELOC_OFF | awk '{ print strtonum($0) }'`
+				RELOC_OFF=`echo "obase=16;${RELOC_OFF}"|bc |tr '[A-Z]' '[a-z]'`
+			fi
+
+			# If reloc address is assigned, do sub
+			if [ "${FUNCADDR}" != "${RELOC_OFF}" ]; then
+				# Hex -> Dec -> SUB -> Hex
+				FUNCADDR=`echo $((16#${FUNCADDR}))`
+				RELOC_OFF=`echo $((16#${RELOC_OFF}))`
+				FUNCADDR=$((FUNCADDR-RELOC_OFF))
+				FUNCADDR=$(echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]')
+			fi
 
 			echo
 			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym

commit 1b6c85a0dfb512f9ae507b8b64e9cab8a740cd7b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Sep 30 12:55:05 2018 +0800

    make.sh: add debug-N sub commands
    
    this command is mainly for debugging.
    
    Usage:
            ./make.sh debug-N
    
    Example:
            ./make.sh debug    ------ for debug help
            ./make.sh debug-1  ------ enable case1 debug
            ......
    
    Change-Id: I1a0b063863cbdfc2be6bcc33da9c08f6d7536b3e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0cdde4f527..ff106db8ab 100755
--- a/make.sh
+++ b/make.sh
@@ -109,7 +109,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|loader*|trust|uboot|map|sym)
+			''|elf*|loader*|debug*|trust|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -149,7 +149,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|loader*|trust|uboot|map|sym)
+		''|elf*|loader*|debug*|trust|uboot|map|sym)
 		;;
 
 		*)
@@ -235,6 +235,60 @@ sub_commands()
 		fi
 		;;
 
+		debug)
+		if [ "${cmd}" = 'debug' -a "${opt}" = 'debug' ]; then
+			echo
+			echo "The commands will modify .config and files, and can't auto restore changes!"
+			echo "debug-N, the N:"
+			echo "    1. lib/initcall.c debug() -> printf()"
+			echo "    2. common/board_r.c and common/board_f.c debug() -> printf()"
+			echo "    3. global #define DEBUG"
+			echo "    4. enable CONFIG_ROCKCHIP_DEBUGGER"
+			echo "    5. enable CONFIG_ROCKCHIP_CRC"
+			echo "    6. enable CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			echo "    7. enable CONFIG_ROCKCHIP_CRASH_DUMP"
+			echo "    8. set CONFIG_BOOTDELAY=5"
+			echo
+			echo "Enabled: "
+			grep '^CONFIG_ROCKCHIP_DEBUGGER=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_DEBUGGER"
+			grep '^CONFIG_ROCKCHIP_CRC=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRC"
+			grep '^CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP"
+			grep '^CONFIG_ROCKCHIP_CRASH_DUMP=y' ${OUTDIR}/.config > /dev/null \
+			&& echo "    CONFIG_ROCKCHIP_CRASH_DUMP"
+
+		elif [ "${opt}" = '1' ]; then
+			sed -i 's/\<debug\>/printf/g' lib/initcall.c
+			echo "DEBUG [1]: lib/initcall.c debug() -> printf()"
+		elif [ "${opt}" = '2' ]; then
+			sed -i 's/\<debug\>/printf/g' ./common/board_f.c
+			sed -i 's/\<debug\>/printf/g' ./common/board_r.c
+			echo "DEBUG [2]: common/board_r.c and common/board_f.c debug() -> printf()"
+		elif [ "${opt}" = '3' ]; then
+			sed -i '$i \#define DEBUG\' include/configs/rockchip-common.h
+			echo "DEBUG [3]: global #define DEBUG"
+		elif [ "${opt}" = '4' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_DEBUGGER is not set/CONFIG_ROCKCHIP_DEBUGGER=y/g' ${OUTDIR}/.config
+			echo "DEBUG [4]: CONFIG_ROCKCHIP_DEBUGGER is enabled"
+		elif [ "${opt}" = '5' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRC is not set/CONFIG_ROCKCHIP_CRC=y/g' ${OUTDIR}/.config
+			echo "DEBUG [5]: CONFIG_ROCKCHIP_CRC is enabled"
+		elif [ "${opt}" = '6' ]; then
+			sed -i 's/\# CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is not set/CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [6]: CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP is enabled"
+		elif [ "${opt}" = '7' ]; then
+			sed -i 's/\# CONFIG_ROCKCHIP_CRASH_DUMP is not set/CONFIG_ROCKCHIP_CRASH_DUMP=y/g' ${OUTDIR}/.config
+			echo "DEBUG [7]: CONFIG_ROCKCHIP_CRASH_DUMP is enabled"
+		elif [ "${opt}" = '8' ]; then
+			sed -i 's/^CONFIG_BOOTDELAY=0/CONFIG_BOOTDELAY=5/g' ${OUTDIR}/.config
+			echo "DEBUG [8]: CONFIG_BOOTDELAY is 5s"
+		fi
+		echo
+		exit 0
+		;;
+
 		map)
 		cat ${OUTDIR}/u-boot.map | less
 		exit 0

commit 5af94f7887ab4057e9feb37243f843b811a5c0cf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Sep 29 15:55:33 2018 +0800

    android: get fdt by suitable ways
    
    We may have special operations for fdt(optional):
    - apply fdt overlay;
    - select fdt by adc or gpio;
    
    We can't read default rk-kernel.dtb and pass it to kernel,
    call rockchip_read_dtb_file() to get dtb.
    
    Change-Id: I3aba002b0cfe324cc7c3852bf8b9561575590fd4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 4ecf549961..8f08462820 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -630,8 +630,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (ret < 0)
 		return ret;
 
-#if defined(CONFIG_CMD_DTIMG) && \
-    defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 05a9b39af5..c24f9e8b85 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -933,16 +933,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
 	if (!ret)
 		env_set_hex("fdt_addr", fdt_addr);
-
-/*
- * Actually if CONFIG_USING_KERNEL_DTB is enbled, we have already read kernel
- * dtb and apply overlay in init_kernel_dtb(), so that we don't need to apply
- * again, we would pass the current fdt to kernel.
- */
-#if defined(CONFIG_CMD_DTIMG) && \
-    defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
-	android_fdt_overlay_apply((void *)fdt_addr);
-#endif
 #endif
 	android_bootloader_boot_kernel(load_address);
 
diff --git a/common/image-android.c b/common/image-android.c
index c15efb23d3..7148e3580c 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -190,27 +190,55 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		*rd_data = 0;
 		return -1;
 	}
-
-	printf("FDT load addr 0x%08x size %u KiB\n",
-	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 /*
- * Actually we have read kernel dtb in init_kernel_dtb() and do overlay
- * when CONFIG_USING_KERNEL_DTB is enbled, and we also didn't update it at all.
- * So that we pass current fdt blob to kernel, otherwise we have to do overlay
- * again which wastes time.
+ * If kernel dtb is enabled, we have read kernel dtb in
+ * init_kernel_dtb() -> rockchip_read_dtb_file() and may have been
+ * done(optional) selection:
+ *
+ * 1. apply fdt overlay;
+ * 2. select fdt by adc or gpio;
+ *
+ * After that, we didn't update dtb at all untill run here, it's fine to
+ * pass current fdt to kernel.
  */
-#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_USING_KERNEL_DTB)
 	*rd_data = (ulong)gd->fdt_blob;
+
+/*
+ * If kernel dtb is disabled and support rockchip image, we need to call
+ * rockchip_read_dtb_file() to get dtb with some optional selection.
+ */
+#elif defined(CONFIG_RKIMG_BOOTLOADER)
+	ulong fdt_addr = 0;
+	int ret;
+
+	/* Get resource addr and fdt addr */
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
+	}
+
+	ret = rockchip_read_dtb_file((void *)fdt_addr);
+	if (ret < 0) {
+		printf("%s: failed to read dtb file, ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	*rd_data = fdt_addr;
+
+/*
+ * If kernel dtb is disabled and not support rockchip image,
+ * get dtb from second position.
+ */
 #else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-#ifdef CONFIG_RKIMG_BOOTLOADER
-	*rd_data += (rockchip_get_resource_file((void *)*rd_data,
-		     ANDROID_ARG_FDT_FILENAME))
-			* 512;
-#endif
+
+	printf("FDT load addr 0x%08x size %u KiB\n",
+	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
 #endif
 
 	return 0;

commit dad148955913e9e16bee05201f447a7ee2fb6b2e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sat Oct 6 20:23:19 2018 +0800

    clk: rockchip: rk1808: support pclk_pmu freq setting
    
    set pclk_pmu freq before ppll freq setting.
    
    Change-Id: Ieab142dd9e41d98d9798be08a0f01f941d3ad9a4
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
index 38ff81f8b6..33fb895eb3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -12,6 +12,7 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 #define APLL_HZ		(600 * MHz)
+#define PCLK_PMU_HZ	(100 * MHz)
 
 /* PX30 pll id */
 enum rk1808_pll_id {
@@ -266,5 +267,9 @@ enum {
 	CLK_I2C0_DIV_CON_SHIFT		= 8,
 	CLK_I2C0_PLL_SEL_MASK		= 1 << CLK_I2C0_PLL_SEL_SHIFT,
 	CLK_I2C0_DIV_CON_MASK		= 0x3f << CLK_I2C0_DIV_CON_SHIFT,
+
+	/* PMUCRU_CLK_SEL0_CON */
+	PCLK_PMU_DIV_CON_SHIFT		= 0,
+	PCLK_PMU_DIV_CON_MASK		= 0x1f << PCLK_PMU_DIV_CON_SHIFT,
 };
 #endif
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index ecb08a04bf..4763dcae04 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -689,6 +689,22 @@ static ulong rk1808_peri_set_clk(struct rk1808_clk_priv *priv,
 	return rk1808_peri_get_clk(priv, clk_id);
 }
 
+static ulong rk1808_pclk_pmu_set_clk(struct rk1808_clk_priv *priv,
+				     ulong clk_id, ulong parent_hz, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(parent_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	rk_clrsetreg(&cru->pmu_clksel_con[0],
+		     PCLK_PMU_DIV_CON_MASK,
+		     (src_clk_div - 1) << PCLK_PMU_DIV_CON_SHIFT);
+
+	return parent_hz / src_clk_div;
+}
+
 static ulong rk1808_armclk_set_clk(struct rk1808_clk_priv *priv, ulong hz)
 {
 	struct rk1808_cru *cru = priv->cru;
@@ -821,10 +837,14 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case PLL_APLL:
 	case PLL_DPLL:
-	case PLL_PPLL:
 		ret = rockchip_pll_set_rate(&rk1808_pll_clks[clk->id - 1],
 					    priv->cru, clk->id - 1, rate);
 		break;
+	case PLL_PPLL:
+		ret = rk1808_pclk_pmu_set_clk(priv, clk->id, rate, PCLK_PMU_HZ);
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[PPLL],
+					    priv->cru, PPLL, rate);
+		break;
 	case PLL_CPLL:
 		ret = rockchip_pll_set_rate(&rk1808_pll_clks[CPLL],
 					    priv->cru, CPLL, rate);

commit b31aa7beb9bbd417b3d5048992d6adc461642894
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Oct 6 19:00:57 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk1808
    
    Change-Id: Ia9cf71aa0d8cc8ce3b612cbc6a55acee4df514cd
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 010c745be7..2206681f35 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -556,6 +556,59 @@ static struct phy_ops rockchip_usb2phy_ops = {
 	.of_xlate = rockchip_usb2phy_of_xlate,
 };
 
+static const struct rockchip_usb2phy_cfg rk1808_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0110, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0114, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+				.iddig_output	= { 0x0100, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0100, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0110, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0x0114, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0x0110, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0x0114, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
+				.ls_det_en	= { 0x0110, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0114, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0118, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x0120, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x0120, 9, 9, 0, 1 },
+				.utmi_iddig	= { 0x0120, 6, 6, 0, 1 },
+				.utmi_ls	= { 0x0120, 5, 4, 0, 1 },
+				.vbus_det_en	= { 0x001c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x104, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0120, 24, 24, 0, 1 },
+			.dcp_det	= { 0x0120, 23, 23, 0, 1 },
+			.dp_det		= { 0x0120, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
 	{
 		.reg = 0x17c,
@@ -811,6 +864,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 };
 
 static const struct udevice_id rockchip_usb2phy_ids[] = {
+	{ .compatible = "rockchip,rk1808-usb2phy", .data = (ulong)&rk1808_phy_cfgs },
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
 	{ .compatible = "rockchip,rk322x-usb2phy", .data = (ulong)&rk322x_phy_cfgs },
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },

commit dd620b6350d40eae52002964a989120a897cac62
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Oct 6 17:52:40 2018 +0800

    rockchip: rk1808: add usb configs
    
    Change-Id: I793c306d3dc0c070b885423a74e5ae02fb307149
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
index 313c93ad8e..eaa285a3e0 100644
--- a/configs/rk1808_defconfig
+++ b/configs/rk1808_defconfig
@@ -14,12 +14,17 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
@@ -34,6 +39,7 @@ CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
@@ -51,3 +57,16 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 5e41b20ef0..af189ae03e 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -32,8 +32,8 @@
 
 #ifndef CONFIG_SPL_BUILD
 /* usb mass storage */
-/* #define CONFIG_USB_FUNCTION_MASS_STORAGE */
-/* #define CONFIG_ROCKUSB_G_DNL_PID        0x330d */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID	0x330d
 
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \

commit 706cec90612bdd2ec6ae91736fdd447744e06620
Author: William Wu <william.wu@rock-chips.com>
Date:   Sat Oct 6 17:54:15 2018 +0800

    rockchip: rk1808: add dwc3 board init
    
    Change-Id: I52953d7d1b84b4841d494c68bb79074b394811ca
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/board/rockchip/evb_rk1808/evb_rk1808.c b/board/rockchip/evb_rk1808/evb_rk1808.c
index 3a69da06e1..1a8054f7af 100644
--- a/board/rockchip/evb_rk1808/evb_rk1808.c
+++ b/board/rockchip/evb_rk1808/evb_rk1808.c
@@ -5,5 +5,29 @@
  */
 
 #include <common.h>
+#include <dwc3-uboot.h>
+#include <usb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfd000000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif

commit a12af6273a52ef6e201e1b684ac51d760d7ca27d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Oct 6 20:37:30 2018 +0800

    rockchip: dts: rk1808: add adc recovery key support
    
    Change-Id: Ia5b0a49675baba2c4e27b785c1c80dc8f6dc6eeb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
index 116a64e5c2..11f750512f 100644
--- a/arch/arm/dts/rk1808-evb.dts
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -24,6 +24,21 @@
 		clock-frequency = <24000000>;
 		clock-output-names = "xin24m";
 	};
+
+	adc-keys {
+		u-boot,dm-pre-reloc;
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			u-boot,dm-pre-reloc;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
+	};
 };
 
 &emmc {
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index a52e9d45f3..068f9c75c8 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -34,3 +34,8 @@
 &uart2 {
 	u-boot,dm-pre-reloc;
 };
+
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index 551058fc4b..8ede0da498 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -1013,6 +1013,18 @@
 		status = "disabled";
 	};
 
+	saradc: saradc@ff3c0000 {
+		compatible = "rockchip,rk1808-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xff3c0000 0x0 0x100>;
+		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
 	sdmmc: dwmmc@ffcf0000 {
 		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xffcf0000 0x0 0x4000>;

commit 48898c50116ec39dde58a8c12d42c7dfc6165e3d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Sep 29 08:37:16 2018 +0800

    rockchip: resource: print fdt from which partition
    
    it's mainly for debug.
    
    Change-Id: I4627c8a3f636ac226bcb2d7ac7d0b60a1019b038
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index bb93c758c1..4ecf549961 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -164,6 +164,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int resource_found = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
+	char *boot_partname = PART_BOOT;
 
 /*
  * Primary detect AOSP format image, try to get resource image from
@@ -172,7 +173,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
  */
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	struct andr_img_hdr *andr_hdr;
-	char *boot_partname = PART_BOOT;
 #endif
 
 	if (hdr) {
@@ -255,7 +255,8 @@ next:
 	if (!resource_found) {
 		debug("%s: Load resource from resource part\n", __func__);
 		/* Read resource from Rockchip Resource partition */
-		ret = part_get_info_by_name(dev_desc, PART_RESOURCE, &part_info);
+		boot_partname = PART_RESOURCE;
+		ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 		if (ret < 0) {
 			printf("%s: failed to get resource part, ret=%d\n",
 			       __func__, ret);
@@ -298,6 +299,7 @@ next:
 		add_file_to_list(entry, offset);
 	}
 
+	printf("Load FDT from %s part\n", boot_partname);
 err:
 	free(content);
 out:

commit 16e939f9051e6f0146dc30e4556ac0a81d7adff6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 28 16:21:32 2018 +0800

    rockchip: dtsi: rk1808: sync from kernel
    
    base on commit dabd2ea:
    (arm64: dts: rockchip: fix mapping address for rk1808 pmugrf)
    
    Change-Id: I6536c03fc2c90ddf1dd8eeb626b7d03f33fdbcc9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index ec59306083..551058fc4b 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -5,6 +5,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk1808-power.h>
 
 / {
 	compatible = "rockchip,rk1808";
@@ -20,7 +21,14 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		serial0 = &uart0;
+		serial1 = &uart1;
 		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
 		spi0 = &spi0;
 		spi1 = &spi1;
 		spi2 = &spi2;
@@ -52,6 +60,10 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>;
 	};
 
+	dmc: dmc {
+		compatible = "rockchip,rk1808-dmc";
+	};
+
 	gmac_clkin: external-gmac-clock {
 		compatible = "fixed-clock";
 		clock-frequency = <125000000>;
@@ -82,18 +94,172 @@
 		#clock-cells = <0>;
 	};
 
+	usbdrd3: usb {
+		compatible = "rockchip,rk1808-dwc3";
+		clocks = <&cru SCLK_USB3_OTG0_REF>, <&cru ACLK_USB3OTG>,
+			 <&cru SCLK_USB3_OTG0_SUSPEND>;
+		clock-names = "ref_clk", "bus_clk",
+			      "suspend_clk";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		status = "disabled";
+
+		usbdrd_dwc3: dwc3@fd000000 {
+			compatible = "snps,dwc3";
+			reg = <0x0 0xfd000000 0x0 0x200000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+			dr_mode = "otg";
+			phys = <&u2phy_otg>;
+			phy-names = "usb2-phy";
+			phy_type = "utmi_wide";
+			snps,dis_enblslpm_quirk;
+			snps,dis-u2-freeclk-exists-quirk;
+			snps,dis_u2_susphy_quirk;
+			snps,dis-del-phy-power-chg-quirk;
+			snps,tx-ipgap-linecheck-dis-quirk;
+			status = "disabled";
+		};
+	};
+
 	grf: syscon@fe000000 {
 		compatible = "rockchip,rk1808-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xfe000000 0x0 0x1000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
+
+		io_domains: io-domains {
+			compatible = "rockchip,rk1808-io-voltage-domain";
+			status = "disabled";
+		};
+
+		rgb: rgb {
+			compatible = "rockchip,rk1808-rgb";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					rgb_in_vop_lite: endpoint {
+						remote-endpoint = <&vop_lite_out_rgb>;
+					};
+				};
+			};
+		};
+	};
+
+	usb2phy_grf: syscon@fe010000 {
+		compatible = "rockchip,rk1808-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xfe010000 0x0 0x8000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,rk1808-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&cru SCLK_USBPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			clock-output-names = "usb480m_phy";
+			status = "disabled";
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+		};
 	};
 
-	pmugrf: syscon@fe410000 {
+	pmugrf: syscon@fe020000 {
 		compatible = "rockchip,rk1808-pmugrf", "syscon", "simple-mfd";
-		reg = <0x0 0xfe410000 0x0 0x1000>;
+		reg = <0x0 0xfe020000 0x0 0x1000>;
 		#address-cells = <1>;
 		#size-cells = <1>;
+
+		pmu_io_domains: io-domains {
+			compatible = "rockchip,rk1808-pmu-io-voltage-domain";
+			status = "disabled";
+		};
+	};
+
+	qos_npu: qos@fe850000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe850000 0x0 0x20>;
+	};
+
+	qos_pcie: qos@fe880000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe880000 0x0 0x20>;
+	};
+
+	qos_isp: qos@fe8a0000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0000 0x0 0x20>;
+	};
+
+	qos_rga_rd: qos@fe8a0080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0080 0x0 0x20>;
+	};
+
+	qos_rga_wr: qos@fe8a0100 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0100 0x0 0x20>;
+	};
+
+	qos_vip: qos@fe8a0180 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8a0180 0x0 0x20>;
+	};
+
+	qos_vop_dma: qos@fe8b0000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8b0000 0x0 0x20>;
+	};
+
+	qos_vop_lite: qos@fe8b0080 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8b0080 0x0 0x20>;
+	};
+
+	qos_vpu: qos@fe8cc000 {
+		compatible = "syscon";
+		reg = <0x0 0xfe8c000 0x0 0x20>;
+	};
+
+	sram: sram@fec00000 {
+		compatible = "mmio-sram";
+		reg = <0x0 0xfec00000 0x0 0x200000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x0 0xfec00000 0x200000>;
+		/* reserved for ddr dvfs and system suspend/resume */
+		ddr-sram@0 {
+			reg = <0x0 0x8000>;
+		};
+		/* reserved for vad audio buffer */
+		vad_sram: vad-sram@1c0000 {
+			reg = <0x1c0000 0x40000>;
+		};
 	};
 
 	gic: interrupt-controller@ff100000 {
@@ -117,10 +283,6 @@
 		};
 	};
 
-	dmc: dmc {
-		compatible = "rockchip,rk1808-dmc";
-	};
-
 	cru: clock-controller@ff350000 {
 		compatible = "rockchip,rk1808-cru";
 		reg = <0x0 0xff350000 0x0 0x5000>;
@@ -142,6 +304,20 @@
 			<100000000>;
 	};
 
+	mipi_dphy: mipi-dphy@ff370000 {
+		compatible = "rockchip,rk1808-mipi-dphy";
+		reg = <0x0 0xff370000 0x0 0x500>;
+		clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
+		clock-names = "ref", "pclk";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_MIPIDSIPHY_P>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
 	tsadc: tsadc@ff3a0000 {
 		compatible = "rockchip,rk1808-tsadc";
 		reg = <0x0 0xff3a0000 0x0 0x100>;
@@ -246,6 +422,70 @@
 		status = "disabled";
 	};
 
+	pmu: power-management@ff3e0000 {
+		compatible = "rockchip,rk1808-pmu", "syscon", "simple-mfd";
+		reg = <0x0 0xff3e0000 0x0 0x1000>;
+
+		power: power-controller {
+			compatible = "rockchip,rk1808-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			/* These power domains are grouped by VD_NPU */
+			pd_npu@RK1808_VD_NPU {
+				reg = <RK1808_VD_NPU>;
+				clocks = <&cru SCLK_NPU>,
+					 <&cru ACLK_NPU>,
+					 <&cru HCLK_NPU>;
+				pm_qos = <&qos_npu>;
+			};
+
+			/* These power domains are grouped by VD_LOGIC */
+			pd_pcie@RK1808_PD_PCIE {
+				reg = <RK1808_PD_PCIE>;
+				clocks = <&cru HSCLK_PCIE>,
+					 <&cru LSCLK_PCIE>,
+					 <&cru ACLK_PCIE>,
+					 <&cru ACLK_PCIE_MST>,
+					 <&cru ACLK_PCIE_SLV>,
+					 <&cru PCLK_PCIE>,
+					 <&cru SCLK_PCIE_AUX>;
+				pm_qos = <&qos_pcie>;
+			};
+			pd_vpu@RK1808_PD_VPU {
+				reg = <RK1808_PD_VPU>;
+				clocks = <&cru ACLK_VPU>,
+					 <&cru HCLK_VPU>;
+				pm_qos = <&qos_vpu>;
+			};
+			pd_vio@RK1808_PD_VIO {
+				reg = <RK1808_PD_VIO>;
+				clocks = <&cru HSCLK_VIO>,
+					 <&cru LSCLK_VIO>,
+					 <&cru ACLK_VOPRAW>,
+					 <&cru HCLK_VOPRAW>,
+					 <&cru ACLK_VOPLITE>,
+					 <&cru HCLK_VOPLITE>,
+					 <&cru PCLK_DSI_TX>,
+					 <&cru PCLK_CSI_TX>,
+					 <&cru ACLK_RGA>,
+					 <&cru HCLK_RGA>,
+					 <&cru ACLK_ISP>,
+					 <&cru HCLK_ISP>,
+					 <&cru ACLK_CIF>,
+					 <&cru HCLK_CIF>,
+					 <&cru PCLK_CSI2HOST>,
+					 <&cru DCLK_VOPRAW>,
+					 <&cru DCLK_VOPLITE>;
+				pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
+					 <&qos_isp>, <&qos_vip>,
+					 <&qos_vop_dma>, <&qos_vop_lite>;
+			};
+		};
+	};
+
 	i2c0: i2c@ff410000 {
 		compatible = "rockchip,rk3399-i2c";
 		reg = <0x0 0xff410000 0x0 0x1000>;
@@ -259,21 +499,29 @@
 		status = "disabled";
 	};
 
-	amba {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
+	dmac: dmac@ff4e0000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x0 0xff4e0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_DMAC>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		peripherals-req-type-burst;
+	};
 
-		dmac: dmac@ff4e0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x0 0xff4e0000 0x0 0x4000>;
-			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-			//clocks = <&cru ACLK_DMAC>;
-			//clock-names = "apb_pclk";
-			#dma-cells = <1>;
-			peripherals-req-type-burst;
-		};
+	uart0: serial@ff430000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff430000 0x0 0x100>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0_PMU>, <&cru PCLK_UART0_PMU>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 0>, <&dmac 1>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		status = "disabled";
 	};
 
 	i2c1: i2c@ff500000 {
@@ -373,6 +621,66 @@
 		status = "disabled";
 	};
 
+	uart1: serial@ff540000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff540000 0x0 0x100>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 2>, <&dmac 3>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1m0_xfer &uart1_cts &uart1_rts>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff550000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff550000 0x0 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 4>, <&dmac 5>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "disabled";
+	};
+
+	uart3: serial@ff560000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff560000 0x0 0x100>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 6>, <&dmac 7>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m0_xfer &uart3_ctsm0 &uart3_rtsm0>;
+		status = "disabled";
+	};
+
+	uart4: serial@ff570000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff570000 0x0 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 8>, <&dmac 9>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
+		status = "disabled";
+	};
+
 	spi2: spi@ff580000 {
 		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
 		reg = <0x0 0xff580000 0x0 0x1000>;
@@ -389,12 +697,123 @@
 		status = "disabled";
 	};
 
-	uart2: serial@ff550000 {
+	uart5: serial@ff5a0000 {
 		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
-		reg = <0x0 0xff550000 0x0 0x100>;
-		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x0 0xff5a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
+		clock-names = "baudclk", "apb_pclk";
 		reg-shift = <2>;
 		reg-io-width = <4>;
+		dmas = <&dmac 25>, <&dmac 26>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart5_xfer>;
+		status = "disabled";
+	};
+
+	uart6: serial@ff5b0000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff5b0000 0x0 0x100>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 27>, <&dmac 28>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart6_xfer>;
+		status = "disabled";
+	};
+
+	uart7: serial@ff5c0000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff5c0000 0x0 0x100>;
+		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 29>, <&dmac 30>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart7_xfer>;
+		status = "disabled";
+	};
+
+	vop_lite: vop@ffb00000 {
+		compatible = "rockchip,rk1808-vop-lit";
+		reg = <0x0 0xffb00000 0x0 0x200>;
+		reg-names = "regs";
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPLITE>, <&cru DCLK_VOPLITE>,
+			 <&cru HCLK_VOPLITE>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		power-domains = <&power RK1808_PD_VIO>;
+		iommus = <&vopl_mmu>;
+		status = "disabled";
+
+		vop_lite_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_lite_out_dsi: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&dsi_in_vop_lite>;
+			};
+
+			vop_lite_out_rgb: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&rgb_in_vop_lite>;
+			};
+		};
+	};
+
+	vopl_mmu: iommu@ffb00f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xffb00f00 0x0 0x100>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopl_mmu";
+		clocks = <&cru ACLK_VOPLITE>, <&cru HCLK_VOPLITE>;
+		clock-names = "aclk", "hclk";
+		power-domains = <&power RK1808_PD_VIO>;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vop_raw: vop@ffb40000 {
+		compatible = "rockchip,rk1808-vop-raw";
+		reg = <0x0 0xffb40000 0x0 0x500>;
+		reg-names = "regs";
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPRAW>, <&cru DCLK_VOPRAW>,
+			 <&cru HCLK_VOPRAW>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		power-domains = <&power RK1808_PD_VIO>;
+		iommus = <&vopr_mmu>;
+		status = "disabled";
+
+		vop_raw_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_raw_out_csi: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&csi_in_vop_raw>;
+			};
+		};
+	};
+
+	vopr_mmu: iommu@ffb40f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xffb40f00 0x0 0x100>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopr_mmu";
+		clocks = <&cru ACLK_VOPRAW>, <&cru HCLK_VOPRAW>;
+		clock-names = "aclk", "hclk";
+		power-domains = <&power RK1808_PD_VIO>;
+		#iommu-cells = <0>;
 		status = "disabled";
 	};
 
@@ -442,6 +861,158 @@
 		status = "disabled";
 	};
 
+	i2s0: i2s@ff7e0000 {
+		compatible = "rockchip,rk1808-i2s-tdm";
+		reg = <0x0 0xff7e0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S0_8CH_TX>, <&cru SCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>;
+		clock-names = "mclk_tx", "mclk_rx", "hclk";
+		dmas = <&dmac 16>, <&dmac 17>;
+		dma-names = "tx", "rx";
+		resets = <&cru SRST_I2S0_TX>, <&cru SRST_I2S0_RX>;
+		reset-names = "tx-m", "rx-m";
+		rockchip,cru = <&cru>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s0_8ch_sclktx
+			     &i2s0_8ch_sclkrx
+			     &i2s0_8ch_lrcktx
+			     &i2s0_8ch_lrckrx
+			     &i2s0_8ch_sdi0
+			     &i2s0_8ch_sdi1
+			     &i2s0_8ch_sdi2
+			     &i2s0_8ch_sdi3
+			     &i2s0_8ch_sdo0
+			     &i2s0_8ch_sdo1
+			     &i2s0_8ch_sdo2
+			     &i2s0_8ch_sdo3
+			     &i2s0_8ch_mclk>;
+		status = "disabled";
+	};
+
+	i2s1: i2s@ff7f0000 {
+		compatible = "rockchip,rk1808-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff7f0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S1_2CH>, <&cru HCLK_I2S1_2CH>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 18>, <&dmac 19>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1_2ch_sclk
+			     &i2s1_2ch_lrck
+			     &i2s1_2ch_sdi
+			     &i2s1_2ch_sdo>;
+		status = "disabled";
+	};
+
+	pdm: pdm@ff800000 {
+		compatible = "rockchip,rk1808-pdm", "rockchip,pdm";
+		reg = <0x0 0xff800000 0x0 0x1000>;
+		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac 24>;
+		dma-names = "rx";
+		resets = <&cru SRST_PDM>;
+		reset-names = "pdm-m";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pdm_clk
+			     &pdm_clk1
+			     &pdm_sdi0
+			     &pdm_sdi1
+			     &pdm_sdi2
+			     &pdm_sdi3>;
+		status = "disabled";
+	};
+
+	vad: vad@ff810000 {
+		compatible = "rockchip,rk1808-vad";
+		reg = <0x0 0xff810000 0x0 0x10000>;
+		reg-names = "vad";
+		clocks = <&cru HCLK_VAD>;
+		clock-names = "hclk";
+		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,audio-sram = <&vad_sram>;
+		rockchip,audio-src = <0>;
+		rockchip,det-channel = <0>;
+		rockchip,mode = <1>;
+		status = "disabled";
+	};
+
+	csi_tx: csi@ffb20000 {
+		compatible = "rockchip,rk1808-mipi-csi";
+		reg = <0x0 0xffb20000 0x0 0x500>;
+		reg-names = "csi_regs";
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_CSI_TX>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru SRST_CSITX_P>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power RK1808_PD_VIO>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port {
+				csi_in_vop_raw: endpoint {
+					remote-endpoint = <&vop_raw_out_csi>;
+				};
+			};
+		};
+	};
+
+	dsi: dsi@ffb30000 {
+		compatible = "rockchip,rk1808-mipi-dsi";
+		reg = <0x0 0xffb30000 0x0 0x500>;
+		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_DSI_TX>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru SRST_MIPIDSI_HOST_P>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power RK1808_PD_VIO>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			port {
+				dsi_in_vop_lite: endpoint {
+					remote-endpoint = <&vop_lite_out_dsi>;
+				};
+			};
+		};
+	};
+
+	sdio: dwmmc@ffc60000 {
+		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xffc60000 0x0 0x4000>;
+		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		max-frequency = <150000000>;
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
+		status = "disabled";
+	};
+
+	npu: npu@ffbc0000 {
+		compatible = "rockchip,npu";
+		reg = <0x0 0xffbc0000 0x0 0x1000>;
+		clocks =  <&cru SCLK_NPU>, <&cru HCLK_NPU>;
+		clock-names = "sclk_npu", "hclk_npu";
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
 	sdmmc: dwmmc@ffcf0000 {
 		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xffcf0000 0x0 0x4000>;
@@ -468,6 +1039,30 @@
 		status = "disabled";
 	};
 
+	usb_host0_ehci: usb@ffd80000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xffd80000 0x0 0x10000>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ffd90000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xffd90000 0x0 0x10000>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
 	gmac: ethernet@ffdd0000 {
 		compatible = "rockchip,rk1808-gmac";
 		reg = <0x0 0xffdd0000 0x0 0x10000>;
@@ -642,13 +1237,13 @@
 			emmc_clk: emmc-clk {
 				rockchip,pins =
 					/* emmc_clkout */
-					<1 9 1 &pcfg_pull_none>;
+					<1 RK_PB1 1 &pcfg_pull_none>;
 			};
 
 			emmc_rstnout: emmc-rstnout {
 				rockchip,pins =
 					/* emmc_rstn */
-					<1 11 1 &pcfg_pull_none>;
+					<1 RK_PB3 1 &pcfg_pull_none>;
 			};
 
 			emmc_bus8: emmc-bus8 {
@@ -880,6 +1475,120 @@
 			};
 		};
 
+		lcdc {
+			lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
+				rockchip,pins =
+					/* lcdc_clkm0 */
+					<2 RK_PC6 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_den_pin: lcdc-rgb-den-pin {
+				rockchip,pins =
+					/* lcdc_denm0 */
+					<2 RK_PC7 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
+				rockchip,pins =
+					/* lcdc_hsyncm0 */
+					<2 RK_PB2 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
+				rockchip,pins =
+					/* lcdc_vsyncm0 */
+					<2 RK_PB3 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m1_hsync_pin: lcdc-rgb-m1-hsync-pin {
+				rockchip,pins =
+					/* lcdc_hsyncm1 */
+					<3 RK_PB2 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m1_vsync_pin: lcdc-rgb-m1-vsync-pin {
+				rockchip,pins =
+					/* lcdc_vsyncm1 */
+					<3 RK_PB3 3 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb666_data_pins: lcdc-rgb666-data-pins {
+				rockchip,pins =
+					/* lcdc_d0m0 */
+					<2 RK_PA2 3 &pcfg_pull_none>,
+					/* lcdc_d1m0 */
+					<2 RK_PA3 3 &pcfg_pull_none>,
+					/* lcdc_d2m0 */
+					<2 RK_PC2 3 &pcfg_pull_none>,
+					/* lcdc_d3m0 */
+					<2 RK_PC3 3 &pcfg_pull_none>,
+					/* lcdc_d4m0 */
+					<2 RK_PC4 3 &pcfg_pull_none>,
+					/* lcdc_d5m0 */
+					<2 RK_PC5 3 &pcfg_pull_none>,
+					/* lcdc_d6m0 */
+					<2 RK_PA0 3 &pcfg_pull_none>,
+					/* lcdc_d7m0 */
+					<2 RK_PA1 3 &pcfg_pull_none>,
+					/* lcdc_d8 */
+					<3 RK_PC2 1 &pcfg_pull_none>,
+					/* lcdc_d9 */
+					<3 RK_PC3 1 &pcfg_pull_none>,
+					/* lcdc_d10 */
+					<3 RK_PC4 1 &pcfg_pull_none>,
+					/* lcdc_d11 */
+					<3 RK_PC5 1 &pcfg_pull_none>,
+					/* lcdc_d12 */
+					<3 RK_PC6 1 &pcfg_pull_none>,
+					/* lcdc_d13 */
+					<3 RK_PC7 1 &pcfg_pull_none>,
+					/* lcdc_d14 */
+					<3 RK_PD0 1 &pcfg_pull_none>,
+					/* lcdc_d15 */
+					<3 RK_PD1 1 &pcfg_pull_none>,
+					/* lcdc_d16 */
+					<3 RK_PD2 1 &pcfg_pull_none>,
+					/* lcdc_d17 */
+					<3 RK_PD3 1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb565_data_pins: lcdc-rgb565-data-pins {
+				rockchip,pins =
+					/* lcdc_d0m0 */
+					<2 RK_PA2 3 &pcfg_pull_none>,
+					/* lcdc_d1m0 */
+					<2 RK_PA3 3 &pcfg_pull_none>,
+					/* lcdc_d2m0 */
+					<2 RK_PC2 3 &pcfg_pull_none>,
+					/* lcdc_d3m0 */
+					<2 RK_PC3 3 &pcfg_pull_none>,
+					/* lcdc_d4m0 */
+					<2 RK_PC4 3 &pcfg_pull_none>,
+					/* lcdc_d5m0 */
+					<2 RK_PC5 3 &pcfg_pull_none>,
+					/* lcdc_d6m0 */
+					<2 RK_PA0 3 &pcfg_pull_none>,
+					/* lcdc_d7m0 */
+					<2 RK_PA1 3 &pcfg_pull_none>,
+					/* lcdc_d8 */
+					<3 RK_PC2 1 &pcfg_pull_none>,
+					/* lcdc_d9 */
+					<3 RK_PC3 1 &pcfg_pull_none>,
+					/* lcdc_d10 */
+					<3 RK_PC4 1 &pcfg_pull_none>,
+					/* lcdc_d11 */
+					<3 RK_PC5 1 &pcfg_pull_none>,
+					/* lcdc_d12 */
+					<3 RK_PC6 1 &pcfg_pull_none>,
+					/* lcdc_d13 */
+					<3 RK_PC7 1 &pcfg_pull_none>,
+					/* lcdc_d14 */
+					<3 RK_PD0 1 &pcfg_pull_none>,
+					/* lcdc_d15 */
+					<3 RK_PD1 1 &pcfg_pull_none>;
+			};
+		};
+
 		pciusb {
 			pciusb_pins: pciusb-pins {
 				rockchip,pins =
@@ -1060,7 +1769,7 @@
 
 			sdmmc1_clk: sdmmc1-clk {
 				rockchip,pins =
-					<4 RK_PB1 1 &pcfg_pull_none>;
+					<4 RK_PA7 1 &pcfg_pull_none>;
 			};
 		};
 
@@ -1186,27 +1895,27 @@
 
 			spi1m1_clk_hs: spi1m1-clk-hs {
 				rockchip,pins =
-					<3 RK_PC7 3 &pcfg_pull_none>;
+					<3 RK_PC7 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_mosi_hs: spi1m1-mosi-hs {
 				rockchip,pins =
-					<3 RK_PD0 3 &pcfg_pull_none>;
+					<3 RK_PD0 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_csn0_hs: spi1m1-csn0-hs {
 				rockchip,pins =
-					<3 RK_PD1 3 &pcfg_pull_none>;
+					<3 RK_PD1 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_miso_hs: spi1m1-miso-hs {
 				rockchip,pins =
-					<3 RK_PD2 3 &pcfg_pull_none>;
+					<3 RK_PD2 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi1m1_csn1_hs: spi1m1-csn1-hs {
 				rockchip,pins =
-					<3 RK_PD3 3 &pcfg_pull_none>;
+					<3 RK_PD3 3 &pcfg_pull_up_8ma>;
 			};
 		};
 
@@ -1275,26 +1984,74 @@
 
 			spi2m1_miso_hs: spi2m1-miso-hs {
 				rockchip,pins =
-					<2 RK_PA4 3 &pcfg_pull_none>;
+					<2 RK_PA4 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi2m1_clk_hs: spi2m1-clk-hs {
 				rockchip,pins =
-					<2 RK_PA5 3 &pcfg_pull_none>;
+					<2 RK_PA5 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi2m1_mosi_hs: spi2m1-mosi-hs {
 				rockchip,pins =
-					<2 RK_PA6 3 &pcfg_pull_none>;
+					<2 RK_PA6 3 &pcfg_pull_up_8ma>;
 			};
 
 			spi2m1_csn_hs: spi2m1-csn-hs {
 				rockchip,pins =
-					<2 RK_PA7 3 &pcfg_pull_none>;
+					<2 RK_PA7 3 &pcfg_pull_up_8ma>;
 			};
 		};
 
-		uart2m0 {
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins =
+					/* uart0_rx */
+					<0 RK_PB3 1 &pcfg_pull_none>,
+					/* uart0_tx */
+					<0 RK_PB2 1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins =
+					<0 RK_PB4 1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins =
+					<0 RK_PB5 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1m0_xfer: uart1m0-xfer {
+				rockchip,pins =
+					/* uart1_rxm0 */
+					<4 RK_PB0 2 &pcfg_pull_none>,
+					/* uart1_txm0 */
+					<4 RK_PB1 2 &pcfg_pull_none>;
+			};
+
+			uart1m1_xfer: uart1m1-xfer {
+				rockchip,pins =
+					/* uart1_rxm1 */
+					<1 RK_PB4 3 &pcfg_pull_none>,
+					/* uart1_txm1 */
+					<1 RK_PB5 3 &pcfg_pull_none>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins =
+					<4 RK_PB2 2 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins =
+					<4 RK_PB3 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2 {
 			uart2m0_xfer: uart2m0-xfer {
 				rockchip,pins =
 					/* uart2_rxm0 */
@@ -1302,9 +2059,7 @@
 					/* uart2_txm0 */
 					<4 RK_PA2 2 &pcfg_pull_none>;
 			};
-		};
 
-		uart2m1 {
 			uart2m1_xfer: uart2m1-xfer {
 				rockchip,pins =
 					/* uart2_rxm1 */
@@ -1312,9 +2067,7 @@
 					/* uart2_txm1 */
 					<2 RK_PD0 2 &pcfg_pull_none>;
 			};
-		};
 
-		uart2m2 {
 			uart2m2_xfer: uart2m2-xfer {
 				rockchip,pins =
 					/* uart2_rxm2 */
@@ -1323,6 +2076,77 @@
 					<3 RK_PA3 2 &pcfg_pull_none>;
 			};
 		};
+
+		uart3 {
+			uart3m0_xfer: uart3m0-xfer {
+				rockchip,pins =
+					/* uart3_rxm0 */
+					<0 RK_PC5 2 &pcfg_pull_none>,
+					/* uart3_txm0 */
+					<0 RK_PC4 2 &pcfg_pull_none>;
+			};
+
+			uart3_ctsm0: uart3-ctsm0 {
+				rockchip,pins =
+					<0 RK_PC7 2 &pcfg_pull_none>;
+			};
+
+			uart3_rtsm0: uart3-rtsm0 {
+				rockchip,pins =
+					<0 RK_PD0 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart4 {
+			uart4_xfer: uart4-xfer {
+				rockchip,pins =
+					/* uart4_rx */
+					<4 RK_PB4 1 &pcfg_pull_none>,
+					/* uart4_tx */
+					<4 RK_PB5 1 &pcfg_pull_none>;
+			};
+
+			uart4_cts: uart4-cts {
+				rockchip,pins =
+					<4 RK_PB6 1 &pcfg_pull_none>;
+			};
+
+			uart4_rts: uart4-rts {
+				rockchip,pins =
+					<4 RK_PB7 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart5 {
+			uart5_xfer: uart5-xfer {
+				rockchip,pins =
+					/* uart5_rx */
+					<3 RK_PC3 1 &pcfg_pull_none>,
+					/* uart5_tx */
+					<3 RK_PC2 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart6 {
+			uart6_xfer: uart6-xfer {
+				rockchip,pins =
+					/* uart6_rx */
+					<3 RK_PC5 1 &pcfg_pull_none>,
+					/* uart6_tx */
+					<3 RK_PC4 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart7 {
+			uart7_xfer: uart7-xfer {
+				rockchip,pins =
+					/* uart7_rx */
+					<3 RK_PC7 1 &pcfg_pull_none>,
+					/* uart7_tx */
+					<3 RK_PC6 1 &pcfg_pull_none>;
+			};
+		};
+
 		tsadc {
 			tsadc_otp_gpio: tsadc-otp-gpio {
 				rockchip,pins =
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index 79938f7388..91a71dd0a1 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -137,8 +137,10 @@
 #define HSCLK_BUS_PRE		171
 #define ACLK_CRYPTO		172
 #define ACLK_DCF		173
+#define ACLK_DMAC		174
 
 /* hclk gates */
+#define HCLK_NPU		199
 #define HCLK_VPU		200
 #define LSCLK_VIO		201
 #define HCLK_VOPRAW		202
@@ -159,9 +161,10 @@
 #define HCLK_VAD		216
 #define HCLK_PDM		217
 #define HCLK_I2S0_8CH		218
-#define HCLK_I2S1_8CH		219
+#define HCLK_I2S1_2CH		219
 #define MSCLK_CORE_NIU		220
 #define HSCLK_IMEM		221
+#define HCLK_HOST_ARB		222
 
 /* pclk gates */
 #define PCLK_DDR		250
@@ -208,7 +211,8 @@
 #define PCLK_GPIO0_PMU		292
 #define PCLK_UART0_PMU		293
 #define PCLK_I2C0_PMU		294
-#define PCLK_PMU_PRE		295
+#define PCLK_USB3PHY_PIPE	295
+#define PCLK_PMU_PRE		296
 
 #define CLK_NR_CLKS		(PCLK_PMU_PRE + 1)
 
diff --git a/include/dt-bindings/power/rk1808-power.h b/include/dt-bindings/power/rk1808-power.h
new file mode 100644
index 0000000000..32342c1e7d
--- /dev/null
+++ b/include/dt-bindings/power/rk1808-power.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK1808_POWER_H__
+#define __DT_BINDINGS_POWER_RK1808_POWER_H__
+
+/* VD_CORE */
+#define RK1808_PD_A35_0		0
+#define RK1808_PD_A35_1		1
+#define RK1808_PD_SCU		2
+#define RK1808_VD_CORE          3
+
+/* VD_NPU */
+#define RK1808_VD_NPU           4
+
+/* VD_LOGIC */
+#define RK1808_PD_DDR           5
+#define RK1808_PD_PCIE		6
+#define RK1808_PD_VPU		7
+#define RK1808_PD_VIO		8
+
+#endif

commit aa8c29873310a700f4ce82e56acf578b4fb49184
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Sep 12 09:49:28 2018 +0800

    clk: rockchip: mmc: add mmc set and get phase
    
    add mmc set and get phase for rk3128\rk3328\rk3368
    
    Change-Id: Ic8d7764391165f28c54721c4af218f8623b2f3a7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 312f9d26d2..e4064b8363 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -588,9 +588,140 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3128_mmc_get_phase(struct clk *clk)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3128_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3128_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->cru_sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->cru_sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3128_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3128_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3128_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->cru_sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3128_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3128_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3128_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3128_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3128_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3128_clk_ops = {
 	.get_rate	= rk3128_clk_get_rate,
 	.set_rate	= rk3128_clk_set_rate,
+	.get_phase	= rk3128_clk_get_phase,
+	.set_phase	= rk3128_clk_set_phase,
 };
 
 static int rk3128_clk_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 8c27f99b43..fec75dbd5d 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -965,10 +965,141 @@ static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
 	return -ENOENT;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3328_mmc_get_phase(struct clk *clk)
+{
+	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3328_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3328_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3328_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3328_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3328_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3328_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3328_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3328_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3328_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk3328_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3328_clk_ops = {
 	.get_rate = rk3328_clk_get_rate,
 	.set_rate = rk3328_clk_set_rate,
 	.set_parent = rk3328_clk_set_parent,
+	.get_phase = rk3328_clk_get_phase,
+	.set_phase = rk3328_clk_set_phase,
 };
 
 static void rkclk_init(struct rk3328_clk_priv *priv)
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 9446c9f8b1..99cd7a6796 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -1020,9 +1020,140 @@ static int __maybe_unused rk3368_clk_set_parent(struct clk *clk, struct clk *par
 	return -ENOENT;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk3368_mmc_get_phase(struct clk *clk)
+{
+	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3368_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3368_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->sdio0_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk3368_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3368_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3368_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdio0_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk3368_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3368_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO0_SAMPLE:
+		ret = rk3368_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3368_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO0_SAMPLE:
+		ret = rk3368_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3368_clk_ops = {
 	.get_rate = rk3368_clk_get_rate,
 	.set_rate = rk3368_clk_set_rate,
+	.get_phase = rk3368_clk_get_phase,
+	.set_phase = rk3368_clk_set_phase,
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent = rk3368_clk_set_parent,
 #endif

commit 77745e86fd1a1512f6cebcb5e58b8501730d2f4e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 28 14:43:08 2018 +0800

    rockchip: dts: rk1808: add "u-boot,dm-pre-reloc" for dmc node
    
    Change-Id: I0c552e05f0359520715edb24a777d05dcb7bdc76
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
index ba09a1dc12..a52e9d45f3 100644
--- a/arch/arm/dts/rk1808-u-boot.dtsi
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -10,6 +10,10 @@
 	};
 };
 
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
 &cru {
 	u-boot,dm-pre-reloc;
 };

commit 23ba6841ccdaeb51290dc49d4e32f175bd3baa34
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 26 18:30:20 2018 +0800

    tools: rockchip: support hostprogs for pack tools
    
    - include: boot_merge/trust_merge/loaderimage/resource_tool/checksum;
    - porting from rkdevelop and base on commit 8fd1d8f
      (resource: get resource primary from boot partition);
    - clean generated binary file when execute clean command;
    
    Change-Id: I41c1893c2da0a0f25c2d39dbbd933f89fbb04948
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 6e6866c509..0cdde4f527 100755
--- a/make.sh
+++ b/make.sh
@@ -34,14 +34,16 @@ TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_a
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
+BIN_PATH_FIXUP="--replace tools/rk_tools/ ./"
+RKTOOLS=./tools
+
 # Declare global INI file searching index name for every chip, update in select_chip_info()
 RKCHIP=
 RKCHIP_LABEL=
 RKCHIP_LOADER=
 RKCHIP_TRUST=
 
-# Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
-RKTOOLS=
+# Declare rkbin repository path, updated in prepare()
 RKBIN=
 
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
@@ -170,11 +172,10 @@ prepare()
 		;;
 	esac
 
-	# Initialize RKBIN and RKTOOLS
+	# Initialize RKBIN
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
 		RKBIN=${absolute_path}
-		RKTOOLS=${absolute_path}/tools
 	else
 		echo
 		echo "Can't find '../rkbin/' repository, please download it before pack image!"
@@ -415,12 +416,12 @@ pack_loader_image()
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then
-				${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
+				${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} $ini
 				echo "pack loader okay! Input: $ini"
 			fi
 		done
 	else
-		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+		${RKTOOLS}/boot_merger ${BIN_PATH_FIXUP} ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
 		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
 	fi
 
@@ -439,7 +440,7 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} ${BIN_PATH_FIXUP} ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
 
 		cd - && mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
diff --git a/tools/.gitignore b/tools/.gitignore
index 6a487d2202..abc6c2dc86 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -28,3 +28,8 @@
 /sunxi-spl-image-builder
 /ubsha1
 /xway-swap-bytes
+/trust_merger
+/boot_merger
+/loaderimage
+/checksum
+/resource_tool
diff --git a/tools/Makefile b/tools/Makefile
index 89827564e6..73701a814b 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -57,6 +57,21 @@ mkenvimage-objs := mkenvimage.o os_support.o lib/crc32.o
 hostprogs-y += dumpimage mkimage
 hostprogs-$(CONFIG_FIT_SIGNATURE) += fit_info fit_check_sign
 
+# Rockchip pack tools
+ifdef CONFIG_ARCH_ROCKCHIP
+hostprogs-y += boot_merger
+hostprogs-y += trust_merger
+hostprogs-y += loaderimage
+hostprogs-y += resource_tool
+hostprogs-y += checksum
+
+boot_merger-objs := rockchip/boot_merger.o rockchip/sha2.o lib/sha256.o
+trust_merger-objs := rockchip/trust_merger.o rockchip/sha2.o lib/sha256.o
+loaderimage-objs := rockchip/loaderimage.o rockchip/sha.o lib/sha256.o rockchip/crc32_rk.o
+resource_tool-objs := rockchip/resource_tool.o
+checksum-objs := rockchip/checksum.o rockchip/crc32_rk.o
+endif
+
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 
 # The following files are synced with upstream DTC.
diff --git a/tools/rockchip/boot_merger.c b/tools/rockchip/boot_merger.c
new file mode 100644
index 0000000000..fd8916e2ba
--- /dev/null
+++ b/tools/rockchip/boot_merger.c
@@ -0,0 +1,1061 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include "boot_merger.h"
+#include <time.h>
+#include <sys/stat.h>
+#include <version.h>
+
+/* #define USE_P_RC4 */
+
+bool gDebug =
+#ifdef DEBUG
+        true;
+#else
+        false;
+#endif /* DEBUG */
+
+#define ENTRY_ALIGN (2048)
+options gOpts;
+char gLegacyPath[MAX_LINE_LEN] = { 0 };
+char gNewPath[MAX_LINE_LEN] = { 0 };
+char gSubfix[MAX_LINE_LEN] = OUT_SUBFIX;
+char gEat[MAX_LINE_LEN];
+char *gConfigPath;
+uint8_t *gBuf;
+
+static uint32_t g_merge_max_size = MAX_MERGE_SIZE;
+
+uint32_t gTable_Crc32[256] = {
+	0x00000000, 0x04c10db7, 0x09821b6e, 0x0d4316d9, 0x130436dc, 0x17c53b6b,
+	0x1a862db2, 0x1e472005, 0x26086db8, 0x22c9600f, 0x2f8a76d6, 0x2b4b7b61,
+	0x350c5b64, 0x31cd56d3, 0x3c8e400a, 0x384f4dbd, 0x4c10db70, 0x48d1d6c7,
+	0x4592c01e, 0x4153cda9, 0x5f14edac, 0x5bd5e01b, 0x5696f6c2, 0x5257fb75,
+	0x6a18b6c8, 0x6ed9bb7f, 0x639aada6, 0x675ba011, 0x791c8014, 0x7ddd8da3,
+	0x709e9b7a, 0x745f96cd, 0x9821b6e0, 0x9ce0bb57, 0x91a3ad8e, 0x9562a039,
+	0x8b25803c, 0x8fe48d8b, 0x82a79b52, 0x866696e5, 0xbe29db58, 0xbae8d6ef,
+	0xb7abc036, 0xb36acd81, 0xad2ded84, 0xa9ece033, 0xa4aff6ea, 0xa06efb5d,
+	0xd4316d90, 0xd0f06027, 0xddb376fe, 0xd9727b49, 0xc7355b4c, 0xc3f456fb,
+	0xceb74022, 0xca764d95, 0xf2390028, 0xf6f80d9f, 0xfbbb1b46, 0xff7a16f1,
+	0xe13d36f4, 0xe5fc3b43, 0xe8bf2d9a, 0xec7e202d, 0x34826077, 0x30436dc0,
+	0x3d007b19, 0x39c176ae, 0x278656ab, 0x23475b1c, 0x2e044dc5, 0x2ac54072,
+	0x128a0dcf, 0x164b0078, 0x1b0816a1, 0x1fc91b16, 0x018e3b13, 0x054f36a4,
+	0x080c207d, 0x0ccd2dca, 0x7892bb07, 0x7c53b6b0, 0x7110a069, 0x75d1adde,
+	0x6b968ddb, 0x6f57806c, 0x621496b5, 0x66d59b02, 0x5e9ad6bf, 0x5a5bdb08,
+	0x5718cdd1, 0x53d9c066, 0x4d9ee063, 0x495fedd4, 0x441cfb0d, 0x40ddf6ba,
+	0xaca3d697, 0xa862db20, 0xa521cdf9, 0xa1e0c04e, 0xbfa7e04b, 0xbb66edfc,
+	0xb625fb25, 0xb2e4f692, 0x8aabbb2f, 0x8e6ab698, 0x8329a041, 0x87e8adf6,
+	0x99af8df3, 0x9d6e8044, 0x902d969d, 0x94ec9b2a, 0xe0b30de7, 0xe4720050,
+	0xe9311689, 0xedf01b3e, 0xf3b73b3b, 0xf776368c, 0xfa352055, 0xfef42de2,
+	0xc6bb605f, 0xc27a6de8, 0xcf397b31, 0xcbf87686, 0xd5bf5683, 0xd17e5b34,
+	0xdc3d4ded, 0xd8fc405a, 0x6904c0ee, 0x6dc5cd59, 0x6086db80, 0x6447d637,
+	0x7a00f632, 0x7ec1fb85, 0x7382ed5c, 0x7743e0eb, 0x4f0cad56, 0x4bcda0e1,
+	0x468eb638, 0x424fbb8f, 0x5c089b8a, 0x58c9963d, 0x558a80e4, 0x514b8d53,
+	0x25141b9e, 0x21d51629, 0x2c9600f0, 0x28570d47, 0x36102d42, 0x32d120f5,
+	0x3f92362c, 0x3b533b9b, 0x031c7626, 0x07dd7b91, 0x0a9e6d48, 0x0e5f60ff,
+	0x101840fa, 0x14d94d4d, 0x199a5b94, 0x1d5b5623, 0xf125760e, 0xf5e47bb9,
+	0xf8a76d60, 0xfc6660d7, 0xe22140d2, 0xe6e04d65, 0xeba35bbc, 0xef62560b,
+	0xd72d1bb6, 0xd3ec1601, 0xdeaf00d8, 0xda6e0d6f, 0xc4292d6a, 0xc0e820dd,
+	0xcdab3604, 0xc96a3bb3, 0xbd35ad7e, 0xb9f4a0c9, 0xb4b7b610, 0xb076bba7,
+	0xae319ba2, 0xaaf09615, 0xa7b380cc, 0xa3728d7b, 0x9b3dc0c6, 0x9ffccd71,
+	0x92bfdba8, 0x967ed61f, 0x8839f61a, 0x8cf8fbad, 0x81bbed74, 0x857ae0c3,
+	0x5d86a099, 0x5947ad2e, 0x5404bbf7, 0x50c5b640, 0x4e829645, 0x4a439bf2,
+	0x47008d2b, 0x43c1809c, 0x7b8ecd21, 0x7f4fc096, 0x720cd64f, 0x76cddbf8,
+	0x688afbfd, 0x6c4bf64a, 0x6108e093, 0x65c9ed24, 0x11967be9, 0x1557765e,
+	0x18146087, 0x1cd56d30, 0x02924d35, 0x06534082, 0x0b10565b, 0x0fd15bec,
+	0x379e1651, 0x335f1be6, 0x3e1c0d3f, 0x3add0088, 0x249a208d, 0x205b2d3a,
+	0x2d183be3, 0x29d93654, 0xc5a71679, 0xc1661bce, 0xcc250d17, 0xc8e400a0,
+	0xd6a320a5, 0xd2622d12, 0xdf213bcb, 0xdbe0367c, 0xe3af7bc1, 0xe76e7676,
+	0xea2d60af, 0xeeec6d18, 0xf0ab4d1d, 0xf46a40aa, 0xf9295673, 0xfde85bc4,
+	0x89b7cd09, 0x8d76c0be, 0x8035d667, 0x84f4dbd0, 0x9ab3fbd5, 0x9e72f662,
+	0x9331e0bb, 0x97f0ed0c, 0xafbfa0b1, 0xab7ead06, 0xa63dbbdf, 0xa2fcb668,
+	0xbcbb966d, 0xb87a9bda, 0xb5398d03, 0xb1f880b4,
+};
+
+uint32_t CRC_32(uint8_t *pData, uint32_t ulSize)
+{
+	uint32_t i;
+	uint32_t nAccum = 0;
+	for (i = 0; i < ulSize; i++) {
+		nAccum = (nAccum << 8) ^ gTable_Crc32[(nAccum >> 24) ^ (*pData++)];
+	}
+	return nAccum;
+}
+
+void P_RC4(uint8_t *buf, uint32_t len)
+{
+	uint8_t S[256], K[256], temp;
+	uint32_t i, j, t, x;
+	uint8_t key[16] = { 124, 78, 3, 4, 85, 5, 9, 7, 45, 44, 123, 56, 23, 13, 23,
+	                    17
+	                  };
+
+	j = 0;
+	for (i = 0; i < 256; i++) {
+		S[i] = (uint8_t) i;
+		j &= 0x0f;
+		K[i] = key[j];
+		j++;
+	}
+
+	j = 0;
+	for (i = 0; i < 256; i++) {
+		j = (j + S[i] + K[i]) % 256;
+		temp = S[i];
+		S[i] = S[j];
+		S[j] = temp;
+	}
+
+	i = j = 0;
+	for (x = 0; x < len; x++) {
+		i = (i + 1) % 256;
+		j = (j + S[i]) % 256;
+		temp = S[i];
+		S[i] = S[j];
+		S[j] = temp;
+		t = (S[i] + (S[j] % 256)) % 256;
+		buf[x] = buf[x] ^ S[t];
+	}
+}
+
+static inline void fixPath(char *path)
+{
+	int i, len = strlen(path);
+	char tmp[MAX_LINE_LEN];
+	char *start, *end;
+
+	for (i = 0; i < len; i++) {
+		if (path[i] == '\\')
+			path[i] = '/';
+		else if (path[i] == '\r' || path[i] == '\n')
+			path[i] = '\0';
+	}
+
+	if (strlen(gLegacyPath) && strlen(gNewPath)) {
+		start = strstr(path, gLegacyPath);
+		if (start) {
+			end = start + strlen(gLegacyPath);
+			/* Backup, so tmp can be src for strcat() */
+			strcpy(tmp, end);
+			/* Terminate, so path can be dest for strcat() */
+			*start = '\0';
+			strcat(path, tmp);
+		}
+	}
+}
+
+static bool parseChip(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_NAME "=%s", gOpts.chip) != 1) {
+		return false;
+	}
+	LOGD("chip:%s\n", gOpts.chip);
+	return true;
+}
+
+static bool parseVersion(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MAJOR "=%d", &gOpts.major) != 1)
+		return false;
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MINOR "=%d", &gOpts.minor) != 1)
+		return false;
+	LOGD("major:%d, minor:%d\n", gOpts.major, gOpts.minor);
+	return true;
+}
+
+static bool parse471(FILE *file)
+{
+	int i, index, pos;
+	char buf[MAX_LINE_LEN];
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_NUM "=%d", &gOpts.code471Num) != 1)
+		return false;
+	LOGD("num:%d\n", gOpts.code471Num);
+	if (!gOpts.code471Num)
+		return true;
+	if (gOpts.code471Num < 0)
+		return false;
+	gOpts.code471Path = (line_t *)malloc(sizeof(line_t) * gOpts.code471Num);
+	for (i = 0; i < gOpts.code471Num; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, OPT_PATH "%d=%[^\r^\n]", &index, buf) != 2)
+			return false;
+		index--;
+		fixPath(buf);
+		strcpy((char *)gOpts.code471Path[index], buf);
+		LOGD("path%i:%s\n", index, gOpts.code471Path[index]);
+	}
+	pos = ftell(file);
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_SLEEP "=%d", &gOpts.code471Sleep) != 1)
+		fseek(file, pos, SEEK_SET);
+	LOGD("sleep:%d\n", gOpts.code471Sleep);
+	return true;
+}
+
+static bool parse472(FILE *file)
+{
+	int i, index, pos;
+	char buf[MAX_LINE_LEN];
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_NUM "=%d", &gOpts.code472Num) != 1)
+		return false;
+	LOGD("num:%d\n", gOpts.code472Num);
+	if (!gOpts.code472Num)
+		return true;
+	if (gOpts.code472Num < 0)
+		return false;
+	gOpts.code472Path = (line_t *)malloc(sizeof(line_t) * gOpts.code472Num);
+	for (i = 0; i < gOpts.code472Num; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, OPT_PATH "%d=%[^\r^\n]", &index, buf) != 2)
+			return false;
+		fixPath(buf);
+		index--;
+		strcpy((char *)gOpts.code472Path[index], buf);
+		LOGD("path%i:%s\n", index, gOpts.code472Path[index]);
+	}
+	pos = ftell(file);
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_SLEEP "=%d", &gOpts.code472Sleep) != 1)
+		fseek(file, pos, SEEK_SET);
+	LOGD("sleep:%d\n", gOpts.code472Sleep);
+	return true;
+}
+
+static bool parseLoader(FILE *file)
+{
+	int i, j, index, pos;
+	char buf[MAX_LINE_LEN];
+	char buf2[MAX_LINE_LEN];
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	pos = ftell(file);
+	if (fscanf(file, OPT_NUM "=%d", &gOpts.loaderNum) != 1) {
+		fseek(file, pos, SEEK_SET);
+		if (fscanf(file, OPT_LOADER_NUM "=%d", &gOpts.loaderNum) != 1) {
+			return false;
+		}
+	}
+	LOGD("num:%d\n", gOpts.loaderNum);
+	if (!gOpts.loaderNum)
+		return false;
+	if (gOpts.loaderNum < 0)
+		return false;
+	gOpts.loader = (name_entry *)malloc(sizeof(name_entry) * gOpts.loaderNum);
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, OPT_LOADER_NAME "%d=%s", &index, buf) != 2)
+			return false;
+		index--;
+		strcpy(gOpts.loader[index].name, buf);
+		LOGD("name%d:%s\n", index, gOpts.loader[index].name);
+	}
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (SCANF_EAT(file) != 0) {
+			return false;
+		}
+		if (fscanf(file, "%[^=]=%[^\r^\n]", buf, buf2) != 2)
+			return false;
+		for (j = 0; j < gOpts.loaderNum; j++) {
+			if (!strcmp(gOpts.loader[j].name, buf)) {
+				fixPath(buf2);
+				strcpy(gOpts.loader[j].path, buf2);
+				LOGD("%s=%s\n", gOpts.loader[j].name, gOpts.loader[j].path);
+				break;
+			}
+		}
+		if (j >= gOpts.loaderNum) {
+			return false;
+		}
+	}
+	return true;
+}
+
+static bool parseOut(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
+		return false;
+	fixPath(gOpts.outPath);
+	printf("out:%s\n", gOpts.outPath);
+	return true;
+}
+
+void printOpts(FILE *out)
+{
+	uint32_t i;
+	fprintf(out, SEC_CHIP "\n" OPT_NAME "=%s\n", gOpts.chip);
+	fprintf(out, SEC_VERSION "\n" OPT_MAJOR "=%d\n" OPT_MINOR "=%d\n",
+	        gOpts.major, gOpts.minor);
+
+	fprintf(out, SEC_471 "\n" OPT_NUM "=%d\n", gOpts.code471Num);
+	for (i = 0; i < gOpts.code471Num; i++) {
+		fprintf(out, OPT_PATH "%d=%s\n", i + 1, gOpts.code471Path[i]);
+	}
+	if (gOpts.code471Sleep > 0)
+		fprintf(out, OPT_SLEEP "=%d\n", gOpts.code471Sleep);
+
+	fprintf(out, SEC_472 "\n" OPT_NUM "=%d\n", gOpts.code472Num);
+	for (i = 0; i < gOpts.code472Num; i++) {
+		fprintf(out, OPT_PATH "%d=%s\n", i + 1, gOpts.code472Path[i]);
+	}
+	if (gOpts.code472Sleep > 0)
+		fprintf(out, OPT_SLEEP "=%d\n", gOpts.code472Sleep);
+
+	fprintf(out, SEC_LOADER "\n" OPT_NUM "=%d\n", gOpts.loaderNum);
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		fprintf(out, OPT_LOADER_NAME "%d=%s\n", i + 1, gOpts.loader[i].name);
+	}
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		fprintf(out, "%s=%s\n", gOpts.loader[i].name, gOpts.loader[i].path);
+	}
+
+	fprintf(out, SEC_OUT "\n" OPT_OUT_PATH "=%s\n", gOpts.outPath);
+}
+
+static bool parseOpts_from_file(void)
+{
+	bool ret = false;
+	bool chipOk = false;
+	bool versionOk = false;
+	bool code471Ok = true;
+	bool code472Ok = true;
+	bool loaderOk = false;
+	bool outOk = false;
+	char buf[MAX_LINE_LEN];
+
+	char *configPath = (gConfigPath == NULL) ? DEF_CONFIG_FILE : gConfigPath;
+	FILE *file;
+	file = fopen(configPath, "r");
+	if (!file) {
+		fprintf(stderr, "config(%s) not found!\n", configPath);
+		if (configPath == (char *)DEF_CONFIG_FILE) {
+			file = fopen(DEF_CONFIG_FILE, "w");
+			if (file) {
+				fprintf(stderr, "create defconfig\n");
+				printOpts(file);
+			}
+		}
+		goto end;
+	}
+
+	LOGD("start parse\n");
+
+	if (SCANF_EAT(file) != 0) {
+		goto end;
+	}
+	while (fscanf(file, "%s", buf) == 1) {
+		if (!strcmp(buf, SEC_CHIP)) {
+			chipOk = parseChip(file);
+			if (!chipOk) {
+				LOGE("parseChip failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_VERSION)) {
+			versionOk = parseVersion(file);
+			if (!versionOk) {
+				LOGE("parseVersion failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_471)) {
+			code471Ok = parse471(file);
+			if (!code471Ok) {
+				LOGE("parse471 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_472)) {
+			code472Ok = parse472(file);
+			if (!code472Ok) {
+				LOGE("parse472 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_LOADER)) {
+			loaderOk = parseLoader(file);
+			if (!loaderOk) {
+				LOGE("parseLoader failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_OUT)) {
+			outOk = parseOut(file);
+			if (!outOk) {
+				LOGE("parseOut failed!\n");
+				goto end;
+			}
+		} else if (buf[0] == '#') {
+			continue;
+		} else {
+			LOGE("unknown sec: %s!\n", buf);
+			goto end;
+		}
+		if (SCANF_EAT(file) != 0) {
+			goto end;
+		}
+	}
+
+	if (chipOk && versionOk && code471Ok && code472Ok && loaderOk && outOk)
+		ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool parseOpts_from_cmdline(int argc, char **argv)
+{
+	int i;
+	int tag = 0;
+	int v0, v1, v2, v3;
+
+	for (i = 2; i < argc; i++) {
+		if (!strcmp(OPT_471, argv[i])) {
+			i++;
+			snprintf(gOpts.code471Path[0], sizeof(gOpts.code471Path[0]), "%s",
+			         argv[i]);
+			tag |= 1;
+		} else if (!strcmp(OPT_472, argv[i])) {
+			i++;
+			snprintf(gOpts.code472Path[0], sizeof(gOpts.code472Path[0]), "%s",
+			         argv[i]);
+			tag |= 2;
+		} else if (!strcmp(OPT_DATA, argv[i])) {
+			i++;
+			snprintf(gOpts.loader[0].path, sizeof(gOpts.loader[0].path), "%s",
+			         argv[i]);
+			tag |= 4;
+		} else if (!strcmp(OPT_BOOT, argv[i])) {
+			i++;
+			snprintf(gOpts.loader[1].path, sizeof(gOpts.loader[1].path), "%s",
+			         argv[i]);
+			tag |= 8;
+		} else if (!strcmp(OPT_OUT, argv[i])) {
+			i++;
+			snprintf(gOpts.outPath, sizeof(gOpts.outPath), "%s", argv[i]);
+			tag |= 0x10;
+		} else if (!strcmp(OPT_CHIP, argv[i])) {
+			i++;
+			snprintf(gOpts.chip, sizeof(gOpts.chip), "%s", argv[i]);
+			tag |= 0x20;
+		} else if (!strcmp(OPT_VERSION, argv[i])) {
+		}
+	}
+
+	sscanf(gOpts.loader[0].path, "%*[^v]v%d.%d.bin", &v0, &v1);
+	sscanf(gOpts.loader[1].path, "%*[^v]v%d.%d.bin", &v2, &v3);
+	gOpts.major = v2;
+	gOpts.minor = v3;
+	snprintf(gOpts.outPath, sizeof(gOpts.outPath),
+	         "%s_loader_v%d.%02d.%d%02d.bin", gOpts.chip, v0, v1, v2, v3);
+	return ((tag & 0x0f) == 0x0f) ? true : false;
+}
+
+bool initOpts(int argc, char **argv)
+{
+	bool ret;
+
+	/* set default opts */
+	gOpts.major = DEF_MAJOR;
+	gOpts.minor = DEF_MINOR;
+	strcpy(gOpts.chip, DEF_CHIP);
+	gOpts.code471Sleep = DEF_CODE471_SLEEP;
+	gOpts.code472Sleep = DEF_CODE472_SLEEP;
+	gOpts.code471Num = DEF_CODE471_NUM;
+	gOpts.code471Path = (line_t *)malloc(sizeof(line_t) * gOpts.code471Num);
+	strcpy((char *)gOpts.code471Path[0], DEF_CODE471_PATH);
+	gOpts.code472Num = DEF_CODE472_NUM;
+	gOpts.code472Path = (line_t *)malloc(sizeof(line_t) * gOpts.code472Num);
+	strcpy((char *)gOpts.code472Path[0], DEF_CODE472_PATH);
+	gOpts.loaderNum = DEF_LOADER_NUM;
+	gOpts.loader = (name_entry *)malloc(sizeof(name_entry) * gOpts.loaderNum);
+	strcpy(gOpts.loader[0].name, DEF_LOADER0);
+	strcpy(gOpts.loader[0].path, DEF_LOADER0_PATH);
+	strcpy(gOpts.loader[1].name, DEF_LOADER1);
+	strcpy(gOpts.loader[1].path, DEF_LOADER1_PATH);
+	strcpy(gOpts.outPath, DEF_OUT_PATH);
+
+	if (argc > 10)
+		ret = parseOpts_from_cmdline(argc, argv);
+	else
+		ret = parseOpts_from_file();
+
+	return ret;
+}
+
+/************merge code****************/
+
+static inline uint32_t getBCD(unsigned short value)
+{
+	uint8_t tmp[2] = { 0 };
+	int i;
+	uint32_t ret;
+	if (value > 0xFFFF) {
+		return 0;
+	}
+	for (i = 0; i < 2; i++) {
+		tmp[i] = (((value / 10) % 10) << 4) | (value % 10);
+		value /= 100;
+	}
+	ret = ((uint16_t)(tmp[1] << 8)) | tmp[0];
+
+	LOGD("ret:%x\n", ret);
+	return ret & 0xFF;
+}
+
+static inline void str2wide(const char *str, uint16_t *wide, int len)
+{
+	int i;
+	for (i = 0; i < len; i++) {
+		wide[i] = (uint16_t) str[i];
+	}
+	wide[len] = 0;
+}
+
+static inline void getName(char *path, uint16_t *dst)
+{
+	char *end;
+	char *start;
+	int len;
+	if (!path || !dst)
+		return;
+	start = strrchr(path, '/');
+	if (!start)
+		start = path;
+	else
+		start++;
+	end = strrchr(path, '.');
+	if (!end)
+		end = path + strlen(path);
+	len = end - start;
+	if (len >= MAX_NAME_LEN)
+		len = MAX_NAME_LEN - 1;
+	str2wide(start, dst, len);
+
+	if (gDebug) {
+		char name[MAX_NAME_LEN];
+		memset(name, 0, sizeof(name));
+		memcpy(name, start, len);
+		LOGD("path:%s, name:%s\n", path, name);
+	}
+}
+
+static inline bool getFileSize(const char *path, uint32_t *size)
+{
+	struct stat st;
+	if (stat(path, &st) < 0)
+		return false;
+	*size = st.st_size;
+	LOGD("path:%s, size:%d\n", path, *size);
+	return true;
+}
+
+static inline rk_time getTime(void)
+{
+	rk_time rkTime;
+
+	struct tm *tm;
+	time_t tt = time(NULL);
+	tm = localtime(&tt);
+	rkTime.year = tm->tm_year + 1900;
+	rkTime.month = tm->tm_mon + 1;
+	rkTime.day = tm->tm_mday;
+	rkTime.hour = tm->tm_hour;
+	rkTime.minute = tm->tm_min;
+	rkTime.second = tm->tm_sec;
+	LOGD("%d-%d-%d %02d:%02d:%02d\n", rkTime.year, rkTime.month, rkTime.day,
+	     rkTime.hour, rkTime.minute, rkTime.second);
+	return rkTime;
+}
+
+static bool writeFile(FILE *outFile, const char *path, bool fix)
+{
+	bool ret = false;
+	uint32_t size = 0, fixSize = 0;
+	uint8_t *buf;
+
+	FILE *inFile = fopen(path, "rb");
+	if (!inFile)
+		goto end;
+
+	if (!getFileSize(path, &size))
+		goto end;
+	if (fix) {
+		fixSize = ((size - 1) / SMALL_PACKET + 1) * SMALL_PACKET;
+		uint32_t tmp = fixSize % ENTRY_ALIGN;
+		tmp = tmp ? (ENTRY_ALIGN - tmp) : 0;
+		fixSize += tmp;
+		memset(gBuf, 0, fixSize);
+	} else {
+		memset(gBuf, 0, size + ENTRY_ALIGN);
+	}
+	if (!fread(gBuf, size, 1, inFile))
+		goto end;
+
+	if (fix) {
+
+		buf = gBuf;
+		size = fixSize;
+		while (1) {
+			P_RC4(buf, fixSize < SMALL_PACKET ? fixSize : SMALL_PACKET);
+			buf += SMALL_PACKET;
+			if (fixSize <= SMALL_PACKET)
+				break;
+			fixSize -= SMALL_PACKET;
+		}
+	} else {
+		uint32_t tmp = size % ENTRY_ALIGN;
+		tmp = tmp ? (ENTRY_ALIGN - tmp) : 0;
+		size += tmp;
+		P_RC4(gBuf, size);
+	}
+
+	if (!fwrite(gBuf, size, 1, outFile))
+		goto end;
+	ret = true;
+end:
+	if (inFile)
+		fclose(inFile);
+	if (!ret)
+		LOGE("write entry(%s) failed\n", path);
+	return ret;
+}
+
+static bool saveEntry(FILE *outFile, char *path, rk_entry_type type,
+                      uint16_t delay, uint32_t *offset, char *fixName,
+                      bool fix)
+{
+	LOGD("write:%s\n", path);
+	uint32_t size;
+	rk_boot_entry entry;
+	memset(&entry, 0, sizeof(rk_boot_entry));
+
+	LOGD("write:%s\n", path);
+
+	getName(fixName ? fixName : path, entry.name);
+	entry.size = sizeof(rk_boot_entry);
+	entry.type = type;
+	entry.dataOffset = *offset;
+	if (!getFileSize(path, &size)) {
+		LOGE("save entry(%s) failed:\n\tcannot get file size.\n", path);
+		return false;
+	}
+	if (fix)
+		size = ((size - 1) / SMALL_PACKET + 1) * SMALL_PACKET;
+	uint32_t tmp = size % ENTRY_ALIGN;
+	size += tmp ? (ENTRY_ALIGN - tmp) : 0;
+	LOGD("align size:%d\n", size);
+	entry.dataSize = size;
+	entry.dataDelay = delay;
+	*offset += size;
+	fwrite(&entry, sizeof(rk_boot_entry), 1, outFile);
+	return true;
+}
+
+static inline uint32_t convertChipType(const char *chip)
+{
+	char buffer[5];
+	memset(buffer, 0, sizeof(buffer));
+	snprintf(buffer, sizeof(buffer), "%s", chip);
+	return buffer[0] << 24 | buffer[1] << 16 | buffer[2] << 8 | buffer[3];
+}
+
+static inline uint32_t getChipType(const char *chip)
+{
+	LOGD("chip:%s\n", chip);
+	int chipType = RKNONE_DEVICE;
+	if (!chip) {
+		goto end;
+	}
+	if (!strcmp(chip, CHIP_RK28)) {
+		chipType = RK28_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK28)) {
+		chipType = RK28_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK281X)) {
+		chipType = RK281X_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKPANDA)) {
+		chipType = RKPANDA_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK27)) {
+		chipType = RK27_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKNANO)) {
+		chipType = RKNANO_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKSMART)) {
+		chipType = RKSMART_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKCROWN)) {
+		chipType = RKCROWN_DEVICE;
+	} else if (!strcmp(chip, CHIP_RKCAYMAN)) {
+		chipType = RKCAYMAN_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK29)) {
+		chipType = RK29_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK292X)) {
+		chipType = RK292X_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK30)) {
+		chipType = RK30_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK30B)) {
+		chipType = RK30B_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK31)) {
+		chipType = RK31_DEVICE;
+	} else if (!strcmp(chip, CHIP_RK32)) {
+		chipType = RK32_DEVICE;
+	} else {
+		chipType = convertChipType(chip + 2);
+	}
+
+end:
+	LOGD("type:0x%x\n", chipType);
+	if (chipType == RKNONE_DEVICE) {
+		LOGE("chip type not support!\n");
+	}
+	return chipType;
+}
+
+static inline void getBoothdr(rk_boot_header *hdr)
+{
+	memset(hdr, 0, sizeof(rk_boot_header));
+	hdr->tag = TAG;
+	hdr->size = sizeof(rk_boot_header);
+	hdr->version = (getBCD(gOpts.major) << 8) | getBCD(gOpts.minor);
+	hdr->mergerVersion = MERGER_VERSION;
+	hdr->releaseTime = getTime();
+	hdr->chipType = getChipType(gOpts.chip);
+
+	hdr->code471Num = gOpts.code471Num;
+	hdr->code471Offset = sizeof(rk_boot_header);
+	hdr->code471Size = sizeof(rk_boot_entry);
+
+	hdr->code472Num = gOpts.code472Num;
+	hdr->code472Offset = hdr->code471Offset + gOpts.code471Num * hdr->code471Size;
+	hdr->code472Size = sizeof(rk_boot_entry);
+
+	hdr->loaderNum = gOpts.loaderNum;
+	hdr->loaderOffset = hdr->code472Offset + gOpts.code472Num * hdr->code472Size;
+	hdr->loaderSize = sizeof(rk_boot_entry);
+#ifndef USE_P_RC4
+	hdr->rc4Flag = 1;
+#endif
+}
+
+static inline uint32_t getCrc(const char *path)
+{
+	uint32_t size = 0;
+	uint32_t crc = 0;
+	FILE *file = fopen(path, "rb");
+	getFileSize(path, &size);
+	if (!file)
+		goto end;
+	if (!fread(gBuf, size, 1, file))
+		goto end;
+	crc = CRC_32(gBuf, size);
+	LOGD("crc:0x%08x\n", crc);
+end:
+	if (file)
+		fclose(file);
+	return crc;
+}
+
+static bool mergeBoot(int argc, char **argv)
+{
+	uint32_t dataOffset;
+	bool ret = false;
+	int i;
+	FILE *outFile;
+	uint32_t crc;
+	rk_boot_header hdr;
+
+	if (!initOpts(argc, argv))
+		return false;
+	{
+		char *subfix = strstr(gOpts.outPath, OUT_SUBFIX);
+		char version[MAX_LINE_LEN];
+		snprintf(version, sizeof(version), "%s", gSubfix);
+		if (subfix && !strcmp(subfix, OUT_SUBFIX)) {
+			subfix[0] = '\0';
+		}
+		strcat(gOpts.outPath, version);
+		printf("fix opt:%s\n", gOpts.outPath);
+	}
+
+	if (gDebug) {
+		printf("---------------\nUSING CONFIG:\n");
+		printOpts(stdout);
+		printf("---------------\n\n");
+	}
+
+	outFile = fopen(gOpts.outPath, "wb+");
+	if (!outFile) {
+		LOGE("open out file(%s) failed\n", gOpts.outPath);
+		goto end;
+	}
+
+	getBoothdr(&hdr);
+	LOGD("write hdr\n");
+	fwrite(&hdr, 1, sizeof(rk_boot_header), outFile);
+
+	dataOffset = sizeof(rk_boot_header) +
+	             (gOpts.code471Num + gOpts.code472Num + gOpts.loaderNum) *
+	             sizeof(rk_boot_entry);
+
+	LOGD("write code 471 entry\n");
+	for (i = 0; i < gOpts.code471Num; i++) {
+		if (!saveEntry(outFile, (char *)gOpts.code471Path[i], ENTRY_471,
+		               gOpts.code471Sleep, &dataOffset, NULL, false))
+			goto end;
+	}
+	LOGD("write code 472 entry\n");
+	for (i = 0; i < gOpts.code472Num; i++) {
+		if (!saveEntry(outFile, (char *)gOpts.code472Path[i], ENTRY_472,
+		               gOpts.code472Sleep, &dataOffset, NULL, false))
+			goto end;
+	}
+	LOGD("write loader entry\n");
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (!saveEntry(outFile, gOpts.loader[i].path, ENTRY_LOADER, 0, &dataOffset,
+		               gOpts.loader[i].name, true))
+			goto end;
+	}
+
+	LOGD("write code 471\n");
+	for (i = 0; i < gOpts.code471Num; i++) {
+		if (!writeFile(outFile, (char *)gOpts.code471Path[i], false))
+			goto end;
+	}
+	LOGD("write code 472\n");
+	for (i = 0; i < gOpts.code472Num; i++) {
+		if (!writeFile(outFile, (char *)gOpts.code472Path[i], false))
+			goto end;
+	}
+	LOGD("write loader\n");
+	for (i = 0; i < gOpts.loaderNum; i++) {
+		if (!writeFile(outFile, gOpts.loader[i].path, true))
+			goto end;
+	}
+	fflush(outFile);
+
+	LOGD("write crc\n");
+	crc = getCrc(gOpts.outPath);
+	if (!fwrite(&crc, sizeof(crc), 1, outFile))
+		goto end;
+
+	ret = true;
+end:
+	if (outFile)
+		fclose(outFile);
+	return ret;
+}
+
+/************merge code end************/
+/************unpack code***************/
+
+static inline void wide2str(const uint16_t *wide, char *str, int len)
+{
+	int i;
+	for (i = 0; i < len; i++) {
+		str[i] = (char)(wide[i] & 0xFF);
+	}
+	str[len] = 0;
+}
+
+static bool unpackEntry(rk_boot_entry *entry, const char *name, FILE *inFile)
+{
+	bool ret = false;
+	int size, i;
+	FILE *outFile = fopen(name, "wb+");
+	if (!outFile)
+		goto end;
+	printf("unpack entry(%s)\n", name);
+	fseek(inFile, entry->dataOffset, SEEK_SET);
+	size = entry->dataSize;
+	if (!fread(gBuf, size, 1, inFile))
+		goto end;
+	if (entry->type == ENTRY_LOADER) {
+		for (i = 0; i < size / SMALL_PACKET; i++)
+			P_RC4(gBuf + i * SMALL_PACKET, SMALL_PACKET);
+		if (size % SMALL_PACKET) {
+			P_RC4(gBuf + i * SMALL_PACKET, size - SMALL_PACKET * 512);
+		}
+	} else {
+		P_RC4(gBuf, size);
+	}
+	if (!fwrite(gBuf, size, 1, outFile))
+		goto end;
+	ret = true;
+end:
+	if (outFile)
+		fclose(outFile);
+	return ret;
+}
+
+static bool unpackBoot(char *path)
+{
+	bool ret = false;
+	FILE *inFile = fopen(path, "rb");
+	int entryNum, i;
+	char name[MAX_NAME_LEN];
+	rk_boot_entry *entrys;
+	if (!inFile) {
+		fprintf(stderr, "loader(%s) not found\n", path);
+		goto end;
+	}
+
+	rk_boot_header hdr;
+	if (!fread(&hdr, sizeof(rk_boot_header), 1, inFile)) {
+		fprintf(stderr, "read header failed\n");
+		goto end;
+	}
+
+	entryNum = hdr.code471Num + hdr.code472Num + hdr.loaderNum;
+	entrys = (rk_boot_entry *)malloc(sizeof(rk_boot_entry) * entryNum);
+	if (!fread(entrys, sizeof(rk_boot_entry) * entryNum, 1, inFile)) {
+		fprintf(stderr, "read data failed\n");
+		goto end;
+	}
+
+	LOGD("entry num:%d\n", entryNum);
+	for (i = 0; i < entryNum; i++) {
+		wide2str(entrys[i].name, name, MAX_NAME_LEN);
+
+		LOGD("entry:t=%d, name=%s, off=%d, size=%d\n", entrys[i].type, name,
+		     entrys[i].dataOffset, entrys[i].dataSize);
+		if (!unpackEntry(entrys + i, name, inFile)) {
+			fprintf(stderr, "unpack entry(%s) failed\n", name);
+			goto end;
+		}
+	}
+
+	ret = true;
+end:
+	if (inFile)
+		fclose(inFile);
+	return ret;
+}
+
+/************unpack code end***********/
+
+static void printHelp(void)
+{
+	printf("Usage1: boot_merger [options]... FILE\n");
+	printf("Merge or unpack Rockchip's loader (Default action is to merge.)\n");
+	printf("Options:\n");
+	printf("\t" OPT_MERGE "\t\t\tMerge loader with specified config.\n");
+	printf("\t" OPT_UNPACK "\t\tUnpack specified loader to current dir.\n");
+	printf("\t" OPT_VERBOSE "\t\tDisplay more runtime informations.\n");
+	printf("\t" OPT_HELP "\t\t\tDisplay this information.\n");
+	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
+	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
+	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_SIZE
+	       "\t\tImage size.\"--size [image KB size]\", must be 512KB aligned\n");
+	printf("Usage2: boot_merger [options] [parameter]\n");
+	printf("All below five option are must in this mode!\n");
+	printf("\t" OPT_CHIP "\t\tChip type, used for check with usbplug.\n");
+	printf("\t" OPT_471 "\t\t471 for download, ddr.bin.\n");
+	printf("\t" OPT_472 "\t\t472 for download, usbplug.bin.\n");
+	printf("\t" OPT_DATA "\t\tloader0 for flash, ddr.bin.\n");
+	printf("\t" OPT_BOOT "\t\tloader1 for flash, miniloader.bin.\n");
+	printf("\n./tools/boot_merger --pack --verbose -c RK322A -1 "
+	       "rkbin/rk322x_ddr_300MHz_v1.04.bin -2 "
+	       "rkbin/rk32/rk322x_usbplug_v2.32.bin -d "
+	       "rkbin/rk32/rk322x_ddr_300MHz_v1.04.bin -b "
+	       "rkbin/rk32/rk322x_miniloader_v2.32.bin\n");
+}
+
+int main(int argc, char **argv)
+{
+
+	int i;
+	bool merge = true;
+	char *optPath = NULL;
+
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(OPT_VERBOSE, argv[i])) {
+			gDebug = true;
+			printf("enable debug\n");
+		} else if (!strcmp(OPT_HELP, argv[i])) {
+			printHelp();
+			return 0;
+		} else if (!strcmp(OPT_VERSION, argv[i])) {
+			printf("boot_merger (cjf@rock-chips.com)\t" VERSION "\n");
+			return 0;
+		} else if (!strcmp(OPT_MERGE, argv[i])) {
+			merge = true;
+		} else if (!strcmp(OPT_UNPACK, argv[i])) {
+			merge = false;
+		} else if (!strcmp(OPT_SUBFIX, argv[i])) {
+			i++;
+			snprintf(gSubfix, sizeof(gSubfix), "%s", argv[i]);
+		} else if (!strcmp(OPT_REPLACE, argv[i])) {
+			i++;
+			snprintf(gLegacyPath, sizeof(gLegacyPath), "%s", argv[i]);
+			i++;
+			snprintf(gNewPath, sizeof(gNewPath), "%s", argv[i]);
+		} else if (!strcmp(OPT_SIZE, argv[i])) {
+			g_merge_max_size = strtoul(argv[++i], NULL, 10);
+			if (g_merge_max_size % 512) {
+				printHelp();
+				return -1;
+			}
+			g_merge_max_size *= 1024; /* bytes */
+		} else {
+			optPath = argv[i];
+			break;
+		}
+	}
+	if (!merge && !optPath) {
+		fprintf(stderr, "need set out path to unpack!\n");
+		printHelp();
+		return -1;
+	}
+
+	gBuf = calloc(g_merge_max_size, 1);
+	if (!gBuf) {
+		LOGE("Merge image: calloc buffer error.\n");
+		return -1;
+	}
+
+	if (merge) {
+		LOGD("do_merge\n");
+		gConfigPath = optPath;
+		if (!mergeBoot(argc, argv)) {
+			fprintf(stderr, "merge failed!\n");
+			return -1;
+		}
+		printf("merge success(%s)\n", gOpts.outPath);
+	} else {
+		LOGD("do_unpack\n");
+		if (!unpackBoot(optPath)) {
+			fprintf(stderr, "unpack failed!\n");
+			return -1;
+		}
+		printf("unpack success\n");
+	}
+	return 0;
+}
diff --git a/tools/rockchip/boot_merger.h b/tools/rockchip/boot_merger.h
new file mode 100644
index 0000000000..ef25a2236d
--- /dev/null
+++ b/tools/rockchip/boot_merger.h
@@ -0,0 +1,201 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef BOOT_MERGER_H
+#define BOOT_MERGER_H
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <memory.h>
+#include <stdbool.h>
+
+/* #define DEBUG */
+
+extern bool gDebug;
+
+#define LOGE(fmt, args...) fprintf(stderr, "E: [%s] "fmt, __func__, ##args)
+#define LOGD(fmt, args...) do {\
+	if (gDebug) \
+	fprintf(stderr, "W: [%s] "fmt, __func__, ##args); \
+} while (0)
+
+
+#define SCANF_EAT(in)   fscanf(in, "%*[ \r\n\t/]")//, gEat)
+#define MAX_LINE_LEN        256
+extern char gEat[MAX_LINE_LEN];
+
+typedef char line_t[MAX_LINE_LEN];
+
+
+
+#define DEF_CONFIG_FILE     "CONFIG.ini"
+
+#define DEF_MAJOR           0
+#define DEF_MINOR           3
+#define DEF_CHIP            "RK30"
+#define DEF_CODE471_NUM     1
+#define DEF_CODE472_NUM     1
+#define DEF_CODE471_SLEEP   0
+#define DEF_CODE472_SLEEP   0
+#define DEF_CODE471_PATH    "30_LPDDR2_300MHz_DDR3_300MHz.bin"
+#define DEF_CODE472_PATH    "rk30usbplug.bin"
+#define DEF_LOADER_NUM      2
+#define DEF_LOADER0         "FlashData"
+#define DEF_LOADER0_PATH    "30_LPDDR2_300MHz_DDR3_300MHz.bin"
+#define DEF_LOADER1         "FlashBoot"
+#define DEF_LOADER1_PATH    "../../u-boot.bin"
+#define DEF_OUT_PATH        "../../RK30xxLoader_uboot.bin"
+
+#define OUT_SUBFIX          ".bin"
+
+#define SEC_CHIP            "[CHIP_NAME]"
+#define SEC_VERSION         "[VERSION]"
+#define SEC_471             "[CODE471_OPTION]"
+#define SEC_472             "[CODE472_OPTION]"
+#define SEC_LOADER          "[LOADER_OPTION]"
+#define SEC_OUT             "[OUTPUT]"
+
+#define OPT_NAME            "NAME"
+#define OPT_MAJOR           "MAJOR"
+#define OPT_MINOR           "MINOR"
+#define OPT_NUM             "NUM"
+#define OPT_LOADER_NUM      "LOADERCOUNT"
+#define OPT_PATH            "Path"
+#define OPT_SLEEP           "Sleep"
+#define OPT_LOADER_NAME     "LOADER"
+#define OPT_OUT_PATH        "PATH"
+
+typedef struct {
+	char       name[MAX_LINE_LEN];
+	char       path[MAX_LINE_LEN];
+} name_entry;
+
+typedef struct {
+	int         major;
+	int         minor;
+	char        chip[MAX_LINE_LEN];
+	int         code471Sleep;
+	int         code472Sleep;
+	int         code471Num;
+	int         code472Num;
+	line_t*     code471Path;
+	line_t*     code472Path;
+	int         loaderNum;
+	name_entry* loader;
+	char        outPath[MAX_LINE_LEN];
+} options;
+
+
+#define TAG						0x544F4F42
+#define MERGER_VERSION          0x01030000
+#define SMALL_PACKET			512
+
+#define MAX_NAME_LEN            20
+#define MAX_MERGE_SIZE          (512 << 10)
+
+#define SEC_CHIP_TYPES          "[CHIP_TYPES]"
+
+#define CHIP_RK28               "RK28"
+#define CHIP_RK281X             "RK281X"
+#define CHIP_RKPANDA            "RKPANDA"
+#define CHIP_RK27               "RK27"
+#define CHIP_RKNANO             "RKNANO"
+#define CHIP_RKSMART            "RKSMART"
+#define CHIP_RKCROWN            "RKCROWN"
+#define CHIP_RKCAYMAN           "RKCAYMAN"
+#define CHIP_RK29               "RK29"
+#define CHIP_RK292X             "RK292X"
+#define CHIP_RK30               "RK30"
+#define CHIP_RK30B              "RK30B"
+#define CHIP_RK31               "RK31"
+#define CHIP_RK32               "RK32"
+
+typedef enum {
+	RKNONE_DEVICE   =0,
+	RK27_DEVICE     =0x10,
+	RKCAYMAN_DEVICE =0x11,
+	RK28_DEVICE     =0x20,
+	RK281X_DEVICE   =0x21,
+	RKPANDA_DEVICE  =0x22,
+	RKNANO_DEVICE   =0x30,
+	RKSMART_DEVICE  =0x31,
+	RKCROWN_DEVICE  =0x40,
+	RK29_DEVICE     =0x50,
+	RK292X_DEVICE   =0x51,
+	RK30_DEVICE     =0x60,
+	RK30B_DEVICE    =0x61,
+	RK31_DEVICE     =0x70,
+	RK32_DEVICE     =0x80
+} rk_chip_type;
+
+typedef enum {
+	ENTRY_471       =1,
+	ENTRY_472       =2,
+	ENTRY_LOADER    =4,
+} rk_entry_type;
+
+#pragma pack(1)
+typedef struct {
+	uint16_t  year;
+	uint8_t   month;
+	uint8_t   day;
+	uint8_t   hour;
+	uint8_t   minute;
+	uint8_t   second;
+} rk_time;
+
+#define  BOOT_RESERVED_SIZE 57
+typedef struct {
+	uint32_t        tag;
+	uint16_t        size;
+	uint32_t        version;
+	uint32_t        mergerVersion;
+	rk_time         releaseTime;
+	uint32_t        chipType;
+	uint8_t         code471Num;
+	uint32_t        code471Offset;
+	uint8_t         code471Size;
+	uint8_t         code472Num;
+	uint32_t        code472Offset;
+	uint8_t         code472Size;
+	uint8_t         loaderNum;
+	uint32_t        loaderOffset;
+	uint8_t         loaderSize;
+	uint8_t         signFlag;
+	uint8_t         rc4Flag;
+	uint8_t         reserved[BOOT_RESERVED_SIZE];
+} rk_boot_header;
+
+typedef struct {
+	uint8_t         size;
+	rk_entry_type   type;
+	uint16_t        name[MAX_NAME_LEN];
+	uint32_t        dataOffset;
+	uint32_t        dataSize;
+	uint32_t        dataDelay;
+} rk_boot_entry;
+#pragma pack()
+
+#define OPT_VERBOSE         "--verbose"
+#define OPT_HELP            "--help"
+#define OPT_VERSION         "--version"
+#define OPT_MERGE           "--pack"
+#define OPT_UNPACK          "--unpack"
+#define OPT_SUBFIX          "--subfix"
+#define OPT_REPLACE         "--replace"
+#define OPT_SIZE	    "--size"
+
+#define OPT_CHIP	"-c"
+#define OPT_471		"-1"
+#define OPT_472		"-2"
+#define	OPT_DATA	"-d"
+#define	OPT_BOOT	"-b"
+#define	OPT_OUT		"-o"
+
+
+#define VERSION             "2013-8-12 14:27:23"
+
+#endif/* BOOT_MERGER_H */
diff --git a/tools/rockchip/checksum.c b/tools/rockchip/checksum.c
new file mode 100644
index 0000000000..15304cd426
--- /dev/null
+++ b/tools/rockchip/checksum.c
@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <sys/stat.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <u-boot/crc.h>
+
+extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
+
+#define SZ_4M 0x00400000
+#define SZ_16M 0x01000000
+#define SZ_32M 0x02000000
+#define RK_BLK_SIZE 512
+
+void usage(const char *prog)
+{
+	fprintf(stderr, "Usage: %s <image>\n", prog);
+}
+
+/*
+ * Neutralize little endians.
+ */
+uint32_t le_uint32(uint32_t x)
+{
+	uint32_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p++ & 0xff) << 8;
+	val |= (*p++ & 0xff) << 16;
+	val |= (*p & 0xff) << 24;
+
+	return val;
+}
+
+int main(int argc, char *argv[])
+{
+	FILE *fp;
+	uint32_t blocks = 0;
+
+	fp = fopen(argv[1], "rb");
+	if (!fp) {
+		perror(argv[1]);
+		return -1;
+	}
+
+	struct stat sb;
+	int ret = stat(argv[1], &sb);
+	if (!fp || ret) {
+		perror(argv[1]);
+		return -1;
+	}
+	blocks = sb.st_size / RK_BLK_SIZE;
+	if (sb.st_size % RK_BLK_SIZE) {
+		printf("size should align %d", RK_BLK_SIZE);
+		return -1;
+	}
+
+	printf("totle blocks:0x%08x\n", blocks);
+
+#ifdef CONFIG_FASTBOOT_TRANSFER_BUFFER_SIZE_EACH
+	uint32_t buf_size = CONFIG_FASTBOOT_TRANSFER_BUFFER_SIZE_EACH;
+#else
+	uint32_t buf_size = 16 * 1024 * 1024;
+#endif
+	void *buf = malloc(buf_size);
+	uint16_t buf_blocks = buf_size / RK_BLK_SIZE;
+	uint32_t offset = 0;
+#ifndef CONFIG_QUICK_CHECKSUM
+	uint32_t *crc_array = (uint32_t *)malloc(buf_size);
+	uint16_t crc_counts = 0;
+	uint32_t checksum = 0;
+#else
+	long long unsigned int checksum = 0;
+#endif
+	while (blocks > 0) {
+		uint16_t read_blocks = blocks > buf_blocks ? buf_blocks : blocks;
+
+		if (fread(buf, read_blocks * RK_BLK_SIZE, 1, fp) != 1) {
+			printf("read failed, offset:0x%08x, blocks:0x%08x\n", offset,
+			       read_blocks);
+			return -1;
+		}
+		offset += read_blocks;
+		blocks -= read_blocks;
+#ifndef CONFIG_QUICK_CHECKSUM
+		crc_array[crc_counts] = crc32_rk(0, buf, read_blocks * RK_BLK_SIZE);
+		printf("offset:0x%08x, blocks:0x%08x, crc:0x%08x\n", offset, read_blocks,
+		       crc_array[crc_counts]);
+		crc_counts++;
+#else
+		int i = 0;
+		uint32_t *data = (uint32_t *)buf;
+		for (i = 0; i<read_blocks *RK_BLK_SIZE>> 2; i++)
+			checksum += le_uint32(data[i]);
+		printf("offset:0x%08x, blocks:0x%08x, checksum:0x%016llx\n", offset,
+		       read_blocks, checksum);
+#endif
+	}
+
+#ifndef CONFIG_QUICK_CHECKSUM
+	/* 3:compute whole checksum */
+	checksum = (crc_counts == 1) ? crc_array[0]
+	           : crc32_rk(0, (unsigned char *)crc_array,
+	                      sizeof(uint32_t) * crc_counts);
+	printf("whole checksum:0x%08x\n", checksum);
+	free(crc_array);
+#else
+	printf("whole checksum:0x%016llx\n", checksum);
+#endif
+	free(buf);
+
+	fclose(fp);
+	return 0;
+}
diff --git a/tools/rockchip/crc32_rk.c b/tools/rockchip/crc32_rk.c
new file mode 100644
index 0000000000..13619aa67a
--- /dev/null
+++ b/tools/rockchip/crc32_rk.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ * Peter, Software Engineering, <superpeter.cai@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifdef USE_HOSTCC
+#include <arpa/inet.h>
+#else
+#include <common.h>
+#endif
+#include <compiler.h>
+#include <u-boot/crc.h>
+#include "u-boot/zlib.h"
+
+#define tole(x) cpu_to_le32(x)
+
+/* ========================================================================
+ * Table of CRC-32's of all single-byte values (made by make_crc_table)
+ */
+static const uint32_t crc_table[256] = {
+	tole(0x00000000L), tole(0x04c10db7L), tole(0x09821b6eL), tole(0x0d4316d9L),
+	tole(0x130436dcL), tole(0x17c53b6bL), tole(0x1a862db2L), tole(0x1e472005L),
+	tole(0x26086db8L), tole(0x22c9600fL), tole(0x2f8a76d6L), tole(0x2b4b7b61L),
+	tole(0x350c5b64L), tole(0x31cd56d3L), tole(0x3c8e400aL), tole(0x384f4dbdL),
+	tole(0x4c10db70L), tole(0x48d1d6c7L), tole(0x4592c01eL), tole(0x4153cda9L),
+	tole(0x5f14edacL), tole(0x5bd5e01bL), tole(0x5696f6c2L), tole(0x5257fb75L),
+	tole(0x6a18b6c8L), tole(0x6ed9bb7fL), tole(0x639aada6L), tole(0x675ba011L),
+	tole(0x791c8014L), tole(0x7ddd8da3L), tole(0x709e9b7aL), tole(0x745f96cdL),
+	tole(0x9821b6e0L), tole(0x9ce0bb57L), tole(0x91a3ad8eL), tole(0x9562a039L),
+	tole(0x8b25803cL), tole(0x8fe48d8bL), tole(0x82a79b52L), tole(0x866696e5L),
+	tole(0xbe29db58L), tole(0xbae8d6efL), tole(0xb7abc036L), tole(0xb36acd81L),
+	tole(0xad2ded84L), tole(0xa9ece033L), tole(0xa4aff6eaL), tole(0xa06efb5dL),
+	tole(0xd4316d90L), tole(0xd0f06027L), tole(0xddb376feL), tole(0xd9727b49L),
+	tole(0xc7355b4cL), tole(0xc3f456fbL), tole(0xceb74022L), tole(0xca764d95L),
+	tole(0xf2390028L), tole(0xf6f80d9fL), tole(0xfbbb1b46L), tole(0xff7a16f1L),
+	tole(0xe13d36f4L), tole(0xe5fc3b43L), tole(0xe8bf2d9aL), tole(0xec7e202dL),
+	tole(0x34826077L), tole(0x30436dc0L), tole(0x3d007b19L), tole(0x39c176aeL),
+	tole(0x278656abL), tole(0x23475b1cL), tole(0x2e044dc5L), tole(0x2ac54072L),
+	tole(0x128a0dcfL), tole(0x164b0078L), tole(0x1b0816a1L), tole(0x1fc91b16L),
+	tole(0x018e3b13L), tole(0x054f36a4L), tole(0x080c207dL), tole(0x0ccd2dcaL),
+	tole(0x7892bb07L), tole(0x7c53b6b0L), tole(0x7110a069L), tole(0x75d1addeL),
+	tole(0x6b968ddbL), tole(0x6f57806cL), tole(0x621496b5L), tole(0x66d59b02L),
+	tole(0x5e9ad6bfL), tole(0x5a5bdb08L), tole(0x5718cdd1L), tole(0x53d9c066L),
+	tole(0x4d9ee063L), tole(0x495fedd4L), tole(0x441cfb0dL), tole(0x40ddf6baL),
+	tole(0xaca3d697L), tole(0xa862db20L), tole(0xa521cdf9L), tole(0xa1e0c04eL),
+	tole(0xbfa7e04bL), tole(0xbb66edfcL), tole(0xb625fb25L), tole(0xb2e4f692L),
+	tole(0x8aabbb2fL), tole(0x8e6ab698L), tole(0x8329a041L), tole(0x87e8adf6L),
+	tole(0x99af8df3L), tole(0x9d6e8044L), tole(0x902d969dL), tole(0x94ec9b2aL),
+	tole(0xe0b30de7L), tole(0xe4720050L), tole(0xe9311689L), tole(0xedf01b3eL),
+	tole(0xf3b73b3bL), tole(0xf776368cL), tole(0xfa352055L), tole(0xfef42de2L),
+	tole(0xc6bb605fL), tole(0xc27a6de8L), tole(0xcf397b31L), tole(0xcbf87686L),
+	tole(0xd5bf5683L), tole(0xd17e5b34L), tole(0xdc3d4dedL), tole(0xd8fc405aL),
+	tole(0x6904c0eeL), tole(0x6dc5cd59L), tole(0x6086db80L), tole(0x6447d637L),
+	tole(0x7a00f632L), tole(0x7ec1fb85L), tole(0x7382ed5cL), tole(0x7743e0ebL),
+	tole(0x4f0cad56L), tole(0x4bcda0e1L), tole(0x468eb638L), tole(0x424fbb8fL),
+	tole(0x5c089b8aL), tole(0x58c9963dL), tole(0x558a80e4L), tole(0x514b8d53L),
+	tole(0x25141b9eL), tole(0x21d51629L), tole(0x2c9600f0L), tole(0x28570d47L),
+	tole(0x36102d42L), tole(0x32d120f5L), tole(0x3f92362cL), tole(0x3b533b9bL),
+	tole(0x031c7626L), tole(0x07dd7b91L), tole(0x0a9e6d48L), tole(0x0e5f60ffL),
+	tole(0x101840faL), tole(0x14d94d4dL), tole(0x199a5b94L), tole(0x1d5b5623L),
+	tole(0xf125760eL), tole(0xf5e47bb9L), tole(0xf8a76d60L), tole(0xfc6660d7L),
+	tole(0xe22140d2L), tole(0xe6e04d65L), tole(0xeba35bbcL), tole(0xef62560bL),
+	tole(0xd72d1bb6L), tole(0xd3ec1601L), tole(0xdeaf00d8L), tole(0xda6e0d6fL),
+	tole(0xc4292d6aL), tole(0xc0e820ddL), tole(0xcdab3604L), tole(0xc96a3bb3L),
+	tole(0xbd35ad7eL), tole(0xb9f4a0c9L), tole(0xb4b7b610L), tole(0xb076bba7L),
+	tole(0xae319ba2L), tole(0xaaf09615L), tole(0xa7b380ccL), tole(0xa3728d7bL),
+	tole(0x9b3dc0c6L), tole(0x9ffccd71L), tole(0x92bfdba8L), tole(0x967ed61fL),
+	tole(0x8839f61aL), tole(0x8cf8fbadL), tole(0x81bbed74L), tole(0x857ae0c3L),
+	tole(0x5d86a099L), tole(0x5947ad2eL), tole(0x5404bbf7L), tole(0x50c5b640L),
+	tole(0x4e829645L), tole(0x4a439bf2L), tole(0x47008d2bL), tole(0x43c1809cL),
+	tole(0x7b8ecd21L), tole(0x7f4fc096L), tole(0x720cd64fL), tole(0x76cddbf8L),
+	tole(0x688afbfdL), tole(0x6c4bf64aL), tole(0x6108e093L), tole(0x65c9ed24L),
+	tole(0x11967be9L), tole(0x1557765eL), tole(0x18146087L), tole(0x1cd56d30L),
+	tole(0x02924d35L), tole(0x06534082L), tole(0x0b10565bL), tole(0x0fd15becL),
+	tole(0x379e1651L), tole(0x335f1be6L), tole(0x3e1c0d3fL), tole(0x3add0088L),
+	tole(0x249a208dL), tole(0x205b2d3aL), tole(0x2d183be3L), tole(0x29d93654L),
+	tole(0xc5a71679L), tole(0xc1661bceL), tole(0xcc250d17L), tole(0xc8e400a0L),
+	tole(0xd6a320a5L), tole(0xd2622d12L), tole(0xdf213bcbL), tole(0xdbe0367cL),
+	tole(0xe3af7bc1L), tole(0xe76e7676L), tole(0xea2d60afL), tole(0xeeec6d18L),
+	tole(0xf0ab4d1dL), tole(0xf46a40aaL), tole(0xf9295673L), tole(0xfde85bc4L),
+	tole(0x89b7cd09L), tole(0x8d76c0beL), tole(0x8035d667L), tole(0x84f4dbd0L),
+	tole(0x9ab3fbd5L), tole(0x9e72f662L), tole(0x9331e0bbL), tole(0x97f0ed0cL),
+	tole(0xafbfa0b1L), tole(0xab7ead06L), tole(0xa63dbbdfL), tole(0xa2fcb668L),
+	tole(0xbcbb966dL), tole(0xb87a9bdaL), tole(0xb5398d03L), tole(0xb1f880b4L)
+};
+
+/* ========================================================================= */
+#define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)
+uint32_t crc32_rk(uint32_t crc, const unsigned char *s, uint32_t len)
+{
+	const uint32_t *tab;
+	tab = crc_table;
+	crc = cpu_to_le32(crc);
+	do {
+		DO_CRC(*s++);
+	} while (--len);
+	return le32_to_cpu(crc);
+}
+#undef DO_CRC
diff --git a/tools/rockchip/loaderimage.c b/tools/rockchip/loaderimage.c
new file mode 100644
index 0000000000..1a98f72de9
--- /dev/null
+++ b/tools/rockchip/loaderimage.c
@@ -0,0 +1,366 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include "compiler.h"
+#include <version.h>
+#include "sha.h"
+#include <u-boot/sha256.h>
+#include <u-boot/crc.h>
+#include <linux/sizes.h>
+#include <linux/kconfig.h>
+#include <config.h>
+
+extern uint32_t crc32_rk(uint32_t, const unsigned char *, uint32_t);
+
+#define OPT_PACK "--pack"
+#define OPT_UNPACK "--unpack"
+#define OPT_UBOOT "--uboot"
+#define OPT_TRUSTOS "--trustos"
+#define OPT_SIZE "--size"
+#define OPT_VERSION "--version"
+#define OPT_INFO "--info"
+
+/* pack or unpack */
+#define MODE_PACK 0
+#define MODE_UNPACK 1
+#define MODE_INFO 2
+#define CONFIG_SECUREBOOT_SHA256
+
+/* image type */
+#define IMAGE_UBOOT 0
+#define IMAGE_TRUST 1
+
+/* magic and hash size */
+#define LOADER_MAGIC_SIZE 8
+#define LOADER_HASH_SIZE 32
+
+/* uboot image config */
+#define UBOOT_NAME "uboot"
+#ifdef CONFIG_RK_NVME_BOOT_EN
+#define UBOOT_NUM 2
+#define UBOOT_MAX_SIZE 512 * 1024
+#else
+#define UBOOT_NUM 4
+#define UBOOT_MAX_SIZE 1024 * 1024
+#endif
+
+#define UBOOT_VERSION_STRING                                                   \
+  U_BOOT_VERSION " (" U_BOOT_DATE " - " U_BOOT_TIME ")" CONFIG_IDENT_STRING
+
+#define RK_UBOOT_MAGIC "LOADER  "
+#define RK_UBOOT_RUNNING_ADDR CONFIG_SYS_TEXT_BASE
+
+/* trust image config */
+#define TRUST_NAME "trustos"
+#define TRUST_NUM 4
+#define TRUST_MAX_SIZE 1024 * 1024
+#define TRUST_VERSION_STRING "Trust os"
+
+#define RK_TRUST_MAGIC "TOS     "
+#define RK_TRUST_RUNNING_ADDR (CONFIG_SYS_TEXT_BASE + SZ_128M + SZ_4M)
+
+typedef struct tag_second_loader_hdr {
+	uint8_t magic[LOADER_MAGIC_SIZE]; /* magic */
+	uint32_t version;
+	uint32_t reserved0;
+	uint32_t loader_load_addr;      /* physical load addr */
+	uint32_t loader_load_size;      /* size in bytes */
+	uint32_t crc32;                 /* crc32 */
+	uint32_t hash_len;              /* 20 or 32 , 0 is no hash */
+	uint8_t hash[LOADER_HASH_SIZE]; /* sha */
+
+	uint8_t reserved[1024 - 32 - 32];
+	uint32_t signTag;     /* 0x4E474953 */
+	uint32_t signlen;     /* maybe 128 or 256 */
+	uint8_t rsaHash[256]; /* maybe 128 or 256, using max size 256 */
+	uint8_t reserved2[2048 - 1024 - 256 - 8];
+} second_loader_hdr;
+
+void usage(const char *prog)
+{
+	fprintf(stderr, "Usage: %s [--pack|--unpack] [--uboot|--trustos]\
+		file_in "
+	        "file_out [load_addr]  [--size] [size number]\
+		[--version] "
+	        "[version] | [--info] [file]\n",
+	        prog);
+}
+
+unsigned int str2hex(char *str)
+{
+	int i = 0;
+	unsigned int value = 0;
+
+	if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X'))
+		str += 2;
+	if (*str == 'x' || *str == 'X')
+		str += 1;
+
+	for (i = 0; *str != '\0'; i++, ++str) {
+		if (*str >= '0' && *str <= '9')
+			value = value * 16 + *str - '0';
+		else if (*str >= 'a' && *str <= 'f')
+			value = value * 16 + *str - 'a' + 10;
+		else if (*str >= 'A' && *str <= 'F')
+			value = value * 16 + *str - 'A' + 10;
+		else
+			break;
+	}
+	return value;
+}
+
+int main(int argc, char *argv[])
+{
+	int mode = -1, image = -1;
+	int max_size, max_num;
+	int size, i;
+	uint32_t loader_addr, in_loader_addr = -1;
+	char *magic, *version, *name;
+	FILE *fi, *fo;
+	second_loader_hdr hdr;
+	char *buf = 0;
+	uint32_t in_size = 0, in_num = 0;
+	char *file_in = NULL, *file_out = NULL;
+	uint32_t curr_version = 0;
+
+	if (argc < 3) {
+		usage(argv[0]);
+		exit(EXIT_FAILURE);
+	}
+
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(argv[i], OPT_PACK)) {
+			mode = MODE_PACK;
+		} else if (!strcmp(argv[i], OPT_UNPACK)) {
+			mode = MODE_UNPACK;
+		} else if (!strcmp(argv[i], OPT_UBOOT)) {
+			image = IMAGE_UBOOT;
+			file_in = argv[++i];
+			file_out = argv[++i];
+			/* detect whether loader address is delivered */
+			if ((argv[i + 1]) && (strncmp(argv[i + 1], "--", 2)))
+				in_loader_addr = str2hex(argv[++i]);
+		} else if (!strcmp(argv[i], OPT_TRUSTOS)) {
+			image = IMAGE_TRUST;
+			file_in = argv[++i];
+			file_out = argv[++i];
+			/* detect whether loader address is delivered */
+			if ((argv[i + 1]) && (strncmp(argv[i + 1], "--", 2)))
+				in_loader_addr = str2hex(argv[++i]);
+		} else if (!strcmp(argv[i], OPT_SIZE)) {
+			in_size = strtoul(argv[++i], NULL, 10);
+			/*
+			 * Usually, it must be at 512kb align due to preloader
+			 * detects every 512kb. But some product has critial
+			 * flash size requirement, we have to make it small than
+			 * 512KB.
+			 */
+			if (in_size % 64) {
+				usage(argv[0]);
+				exit(EXIT_FAILURE);
+			}
+			in_size *= 1024;
+
+			in_num = strtoul(argv[++i], NULL, 10);
+		} else if (!strcmp(argv[i], OPT_VERSION)) {
+			curr_version = strtoul(argv[++i], NULL, 10);
+			printf("curr_version = 0x%x\n", curr_version);
+		} else if (!strcmp(argv[i], OPT_INFO)) {
+			mode = MODE_INFO;
+			file_in = argv[++i];
+		} else {
+			usage(argv[0]);
+			exit(EXIT_FAILURE);
+		}
+	}
+
+	/* config image information */
+	if (image == IMAGE_UBOOT) {
+		name = UBOOT_NAME;
+		magic = RK_UBOOT_MAGIC;
+		version = UBOOT_VERSION_STRING;
+		max_size = in_size ? in_size : UBOOT_MAX_SIZE;
+		max_num = in_num ? in_num : UBOOT_NUM;
+		loader_addr =
+		        (in_loader_addr == -1) ? RK_UBOOT_RUNNING_ADDR : in_loader_addr;
+	} else if (image == IMAGE_TRUST) {
+		name = TRUST_NAME;
+		magic = RK_TRUST_MAGIC;
+		version = TRUST_VERSION_STRING;
+		max_size = in_size ? in_size : TRUST_MAX_SIZE;
+		max_num = in_num ? in_num : TRUST_NUM;
+		loader_addr =
+		        (in_loader_addr == -1) ? RK_TRUST_RUNNING_ADDR : in_loader_addr;
+	} else if (mode == MODE_INFO) {
+
+	} else {
+		exit(EXIT_FAILURE);
+	}
+
+	if (mode == MODE_PACK) {
+		buf = calloc(max_size, max_num);
+		if (!buf) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+		printf("\n load addr is 0x%x!\n", loader_addr);
+		if (!file_in || !file_out) {
+			usage(argv[0]);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file in */
+		fi = fopen(file_in, "rb");
+		if (!fi) {
+			perror(file_in);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file out */
+		fo = fopen(file_out, "wb");
+		if (!fo) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+
+		printf("pack input %s \n", file_in);
+		fseek(fi, 0, SEEK_END);
+		size = ftell(fi);
+		fseek(fi, 0, SEEK_SET);
+		printf("pack file size: %d \n", size);
+		if (size > max_size - sizeof(second_loader_hdr)) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+		memset(&hdr, 0, sizeof(second_loader_hdr));
+		memcpy((char *)hdr.magic, magic, LOADER_MAGIC_SIZE);
+		hdr.version = curr_version;
+		hdr.loader_load_addr = loader_addr;
+		if (!fread(buf + sizeof(second_loader_hdr), size, 1, fi))
+			exit(EXIT_FAILURE);
+
+		/* Aligned size to 4-byte, Rockchip HW Crypto need 4-byte align */
+		size = (((size + 3) >> 2) << 2);
+		hdr.loader_load_size = size;
+
+		hdr.crc32 = crc32_rk(
+		                    0, (const unsigned char *)buf + sizeof(second_loader_hdr), size);
+		printf("crc = 0x%08x\n", hdr.crc32);
+
+#ifndef CONFIG_SECUREBOOT_SHA256
+		SHA_CTX ctx;
+		uint8_t *sha;
+		hdr.hash_len = (SHA_DIGEST_SIZE > LOADER_HASH_SIZE) ? LOADER_HASH_SIZE
+		               : SHA_DIGEST_SIZE;
+		SHA_init(&ctx);
+		SHA_update(&ctx, buf + sizeof(second_loader_hdr), size);
+		if (hdr.version > 0)
+			SHA_update(&ctx, (void *)&hdr.version, 8);
+
+		SHA_update(&ctx, &hdr.loader_load_addr, sizeof(hdr.loader_load_addr));
+		SHA_update(&ctx, &hdr.loader_load_size, sizeof(hdr.loader_load_size));
+		SHA_update(&ctx, &hdr.hash_len, sizeof(hdr.hash_len));
+		sha = (uint8_t *)SHA_final(&ctx);
+		memcpy(hdr.hash, sha, hdr.hash_len);
+#else
+		sha256_context ctx;
+		uint8_t hash[LOADER_HASH_SIZE];
+
+		memset(hash, 0, LOADER_HASH_SIZE);
+
+		hdr.hash_len = 32; /* sha256 */
+		sha256_starts(&ctx);
+		sha256_update(&ctx, (void *)buf + sizeof(second_loader_hdr), size);
+		if (hdr.version > 0)
+			sha256_update(&ctx, (void *)&hdr.version, 8);
+
+		sha256_update(&ctx, (void *)&hdr.loader_load_addr,
+		              sizeof(hdr.loader_load_addr));
+		sha256_update(&ctx, (void *)&hdr.loader_load_size,
+		              sizeof(hdr.loader_load_size));
+		sha256_update(&ctx, (void *)&hdr.hash_len, sizeof(hdr.hash_len));
+		sha256_finish(&ctx, hash);
+		memcpy(hdr.hash, hash, hdr.hash_len);
+#endif /* CONFIG_SECUREBOOT_SHA256 */
+
+		printf("%s version: %s\n", name, version);
+		memcpy(buf, &hdr, sizeof(second_loader_hdr));
+		for (i = 0; i < max_num; i++)
+			fwrite(buf, max_size, 1, fo);
+
+		printf("pack %s success! \n", file_out);
+		fclose(fi);
+		fclose(fo);
+	} else if (mode == MODE_UNPACK) {
+		buf = calloc(max_size, max_num);
+		if (!buf) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+		if (!file_in || !file_out) {
+			usage(argv[0]);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file in */
+		fi = fopen(file_in, "rb");
+		if (!fi) {
+			perror(file_in);
+			exit(EXIT_FAILURE);
+		}
+
+		/* file out */
+		fo = fopen(file_out, "wb");
+		if (!fo) {
+			perror(file_out);
+			exit(EXIT_FAILURE);
+		}
+
+		printf("unpack input %s \n", file_in);
+		memset(&hdr, 0, sizeof(second_loader_hdr));
+		if (!fread(&hdr, sizeof(second_loader_hdr), 1, fi))
+			exit(EXIT_FAILURE);
+
+		if (!fread(buf, hdr.loader_load_size, 1, fi))
+			exit(EXIT_FAILURE);
+
+		fwrite(buf, hdr.loader_load_size, 1, fo);
+		printf("unpack %s success! \n", file_out);
+		fclose(fi);
+		fclose(fo);
+	} else if (mode == MODE_INFO) {
+		second_loader_hdr *hdr;
+
+		hdr = malloc(sizeof(struct tag_second_loader_hdr));
+		if (hdr == NULL) {
+			printf("Memory error!\n");
+			exit(EXIT_FAILURE);
+		}
+		/* file in */
+		fi = fopen(file_in, "rb");
+		if (!fi) {
+			perror(file_in);
+			exit(EXIT_FAILURE);
+		}
+
+		if (!fread(hdr, sizeof(struct tag_second_loader_hdr), 1, fi))
+			exit(EXIT_FAILURE);
+
+		if (!(memcmp(RK_UBOOT_MAGIC, hdr->magic, 5)) ||
+		    !(memcmp(RK_TRUST_MAGIC, hdr->magic, 3))) {
+			printf("The image info:\n");
+			printf("Rollback index is %d\n", hdr->version);
+			printf("Load Addr is 0x%x\n", hdr->loader_load_addr);
+		} else {
+			printf("Please input the correct file.\n");
+		}
+
+		fclose(fi);
+		free(hdr);
+	}
+	free(buf);
+
+	return 0;
+}
diff --git a/tools/rockchip/resource_tool.c b/tools/rockchip/resource_tool.c
new file mode 100644
index 0000000000..217ad31a2e
--- /dev/null
+++ b/tools/rockchip/resource_tool.c
@@ -0,0 +1,1009 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <errno.h>
+#include <memory.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <sys/stat.h>
+#include <time.h>
+
+/* #define DEBUG */
+
+static bool g_debug =
+#ifdef DEBUG
+        true;
+#else
+        false;
+#endif /* DEBUG */
+
+#define LOGE(fmt, args...)                                                     \
+  fprintf(stderr, "E/%s(%d): " fmt "\n", __func__, __LINE__, ##args)
+#define LOGD(fmt, args...)                                                     \
+  do {                                                                         \
+    if (g_debug)                                                               \
+      fprintf(stderr, "D/%s(%d): " fmt "\n", __func__, __LINE__, ##args);      \
+  } while (0)
+
+/* sync with ./board/rockchip/rk30xx/rkloader.c #define FDT_PATH */
+#define FDT_PATH "rk-kernel.dtb"
+#define DTD_SUBFIX ".dtb"
+
+#define DEFAULT_IMAGE_PATH "resource.img"
+#define DEFAULT_UNPACK_DIR "out"
+#define BLOCK_SIZE 512
+
+#define RESOURCE_PTN_HDR_SIZE 1
+#define INDEX_TBL_ENTR_SIZE 1
+
+#define RESOURCE_PTN_VERSION 0
+#define INDEX_TBL_VERSION 0
+
+#define RESOURCE_PTN_HDR_MAGIC "RSCE"
+typedef struct {
+	char magic[4]; /* tag, "RSCE" */
+	uint16_t resource_ptn_version;
+	uint16_t index_tbl_version;
+	uint8_t header_size;    /* blocks, size of ptn header. */
+	uint8_t tbl_offset;     /* blocks, offset of index table. */
+	uint8_t tbl_entry_size; /* blocks, size of index table's entry. */
+	uint32_t tbl_entry_num; /* numbers of index table's entry. */
+} resource_ptn_header;
+
+#define INDEX_TBL_ENTR_TAG "ENTR"
+#define MAX_INDEX_ENTRY_PATH_LEN 256
+typedef struct {
+	char tag[4]; /* tag, "ENTR" */
+	char path[MAX_INDEX_ENTRY_PATH_LEN];
+	uint32_t content_offset; /* blocks, offset of resource content. */
+	uint32_t content_size;   /* bytes, size of resource content. */
+} index_tbl_entry;
+
+#define OPT_VERBOSE "--verbose"
+#define OPT_HELP "--help"
+#define OPT_VERSION "--version"
+#define OPT_PRINT "--print"
+#define OPT_PACK "--pack"
+#define OPT_UNPACK "--unpack"
+#define OPT_TEST_LOAD "--test_load"
+#define OPT_TEST_CHARGE "--test_charge"
+#define OPT_IMAGE "--image="
+#define OPT_ROOT "--root="
+
+#define VERSION "2014-5-31 14:43:42"
+
+typedef struct {
+	char path[MAX_INDEX_ENTRY_PATH_LEN];
+	uint32_t content_offset; /* blocks, offset of resource content. */
+	uint32_t content_size;   /* bytes, size of resource content. */
+	void *load_addr;
+} resource_content;
+
+typedef struct {
+	int max_level;
+	int num;
+	int delay;
+	char prefix[MAX_INDEX_ENTRY_PATH_LEN];
+} anim_level_conf;
+
+#define DEF_CHARGE_DESC_PATH "charge_anim_desc.txt"
+
+#define OPT_CHARGE_ANIM_DELAY "delay="
+#define OPT_CHARGE_ANIM_LOOP_CUR "only_current_level="
+#define OPT_CHARGE_ANIM_LEVELS "levels="
+#define OPT_CHARGE_ANIM_LEVEL_CONF "max_level="
+#define OPT_CHARGE_ANIM_LEVEL_NUM "num="
+#define OPT_CHARGE_ANIM_LEVEL_PFX "prefix="
+
+static char image_path[MAX_INDEX_ENTRY_PATH_LEN] = "\0";
+
+static int fix_blocks(size_t size)
+{
+	return (size + BLOCK_SIZE - 1) / BLOCK_SIZE;
+}
+
+static const char *fix_path(const char *path)
+{
+	if (!memcmp(path, "./", 2)) {
+		return path + 2;
+	}
+	return path;
+}
+
+static uint16_t switch_short(uint16_t x)
+{
+	uint16_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p & 0xff) << 8;
+
+	return val;
+}
+
+static uint32_t switch_int(uint32_t x)
+{
+	uint32_t val;
+	uint8_t *p = (uint8_t *)(&x);
+
+	val = (*p++ & 0xff) << 0;
+	val |= (*p++ & 0xff) << 8;
+	val |= (*p++ & 0xff) << 16;
+	val |= (*p & 0xff) << 24;
+
+	return val;
+}
+
+static void fix_header(resource_ptn_header *header)
+{
+	/* switch for be. */
+	header->resource_ptn_version = switch_short(header->resource_ptn_version);
+	header->index_tbl_version = switch_short(header->index_tbl_version);
+	header->tbl_entry_num = switch_int(header->tbl_entry_num);
+}
+
+static void fix_entry(index_tbl_entry *entry)
+{
+	/* switch for be. */
+	entry->content_offset = switch_int(entry->content_offset);
+	entry->content_size = switch_int(entry->content_size);
+}
+
+static int inline get_ptn_offset(void)
+{
+	return 0;
+}
+
+static bool StorageWriteLba(int offset_block, void *data, int blocks)
+{
+	bool ret = false;
+	FILE *file = fopen(image_path, "rb+");
+	if (!file)
+		goto end;
+	int offset = offset_block * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		LOGE("Failed to seek %s to %d!", image_path, offset);
+		goto end;
+	}
+	if (!fwrite(data, blocks * BLOCK_SIZE, 1, file)) {
+		LOGE("Failed to write %s!", image_path);
+		goto end;
+	}
+	ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool StorageReadLba(int offset_block, void *data, int blocks)
+{
+	bool ret = false;
+	FILE *file = fopen(image_path, "rb");
+	if (!file)
+		goto end;
+	int offset = offset_block * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		goto end;
+	}
+	if (!fread(data, blocks * BLOCK_SIZE, 1, file)) {
+		goto end;
+	}
+	ret = true;
+end:
+	if (file)
+		fclose(file);
+	return ret;
+}
+
+static bool write_data(int offset_block, void *data, size_t len)
+{
+	bool ret = false;
+	if (!data)
+		goto end;
+	int blocks = len / BLOCK_SIZE;
+	if (blocks && !StorageWriteLba(offset_block, data, blocks)) {
+		goto end;
+	}
+	int left = len % BLOCK_SIZE;
+	if (left) {
+		char buf[BLOCK_SIZE] = "\0";
+		memcpy(buf, data + blocks * BLOCK_SIZE, left);
+		if (!StorageWriteLba(offset_block + blocks, buf, 1))
+			goto end;
+	}
+	ret = true;
+end:
+	return ret;
+}
+
+/**********************load test************************/
+static int load_file(const char *file_path, int offset_block, int blocks);
+
+static int test_load(int argc, char **argv)
+{
+	if (argc < 1) {
+		LOGE("Nothing to load!");
+		return -1;
+	}
+	const char *file_path;
+	int offset_block = 0;
+	int blocks = 0;
+	if (argc > 0) {
+		file_path = (const char *)fix_path(argv[0]);
+		argc--, argv++;
+	}
+	if (argc > 0) {
+		offset_block = atoi(argv[0]);
+		argc--, argv++;
+	}
+	if (argc > 0) {
+		blocks = atoi(argv[0]);
+	}
+	return load_file(file_path, offset_block, blocks);
+}
+
+static void free_content(resource_content *content)
+{
+	if (content->load_addr) {
+		free(content->load_addr);
+		content->load_addr = 0;
+	}
+}
+
+static void tests_dump_file(const char *path, void *data, int len)
+{
+	FILE *file = fopen(path, "wb");
+	if (!file)
+		return;
+	fwrite(data, len, 1, file);
+	fclose(file);
+}
+
+static bool load_content(resource_content *content)
+{
+	if (content->load_addr)
+		return true;
+	int blocks = fix_blocks(content->content_size);
+	content->load_addr = malloc(blocks * BLOCK_SIZE);
+	if (!content->load_addr)
+		return false;
+	if (!StorageReadLba(get_ptn_offset() + content->content_offset,
+	                    content->load_addr, blocks)) {
+		free_content(content);
+		return false;
+	}
+
+	tests_dump_file(content->path, content->load_addr, content->content_size);
+	return true;
+}
+
+static bool load_content_data(resource_content *content, int offset_block,
+                              void *data, int blocks)
+{
+	if (!StorageReadLba(get_ptn_offset() + content->content_offset + offset_block,
+	                    data, blocks)) {
+		return false;
+	}
+	tests_dump_file(content->path, data, blocks * BLOCK_SIZE);
+	return true;
+}
+
+static bool get_entry(const char *file_path, index_tbl_entry *entry)
+{
+	bool ret = false;
+	char buf[BLOCK_SIZE];
+	resource_ptn_header header;
+	if (!StorageReadLba(get_ptn_offset(), buf, 1)) {
+		LOGE("Failed to read header!");
+		goto end;
+	}
+	memcpy(&header, buf, sizeof(header));
+
+	if (memcmp(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic))) {
+		LOGE("Not a resource image(%s)!", image_path);
+		goto end;
+	}
+	/* test on pc, switch for be. */
+	fix_header(&header);
+
+	/* TODO: support header_size & tbl_entry_size */
+	if (header.resource_ptn_version != RESOURCE_PTN_VERSION ||
+	    header.header_size != RESOURCE_PTN_HDR_SIZE ||
+	    header.index_tbl_version != INDEX_TBL_VERSION ||
+	    header.tbl_entry_size != INDEX_TBL_ENTR_SIZE) {
+		LOGE("Not supported in this version!");
+		goto end;
+	}
+
+	int i;
+	for (i = 0; i < header.tbl_entry_num; i++) {
+		/* TODO: support tbl_entry_size */
+		if (!StorageReadLba(
+		            get_ptn_offset() + header.header_size + i * header.tbl_entry_size,
+		            buf, 1)) {
+			LOGE("Failed to read index entry:%d!", i);
+			goto end;
+		}
+		memcpy(entry, buf, sizeof(*entry));
+
+		if (memcmp(entry->tag, INDEX_TBL_ENTR_TAG, sizeof(entry->tag))) {
+			LOGE("Something wrong with index entry:%d!", i);
+			goto end;
+		}
+
+		if (!strncmp(entry->path, file_path, sizeof(entry->path)))
+			break;
+	}
+	if (i == header.tbl_entry_num) {
+		LOGE("Cannot find %s!", file_path);
+		goto end;
+	}
+	/* test on pc, switch for be. */
+	fix_entry(entry);
+
+	printf("Found entry:\n\tpath:%s\n\toffset:%d\tsize:%d\n", entry->path,
+	       entry->content_offset, entry->content_size);
+
+	ret = true;
+end:
+	return ret;
+}
+
+static bool get_content(resource_content *content)
+{
+	bool ret = false;
+	index_tbl_entry entry;
+	if (!get_entry(content->path, &entry))
+		goto end;
+	content->content_offset = entry.content_offset;
+	content->content_size = entry.content_size;
+	ret = true;
+end:
+	return ret;
+}
+
+static int load_file(const char *file_path, int offset_block, int blocks)
+{
+	printf("Try to load:%s", file_path);
+	if (blocks) {
+		printf(", offset block:%d, blocks:%d\n", offset_block, blocks);
+	} else {
+		printf("\n");
+	}
+	bool ret = false;
+	resource_content content;
+	snprintf(content.path, sizeof(content.path), "%s", file_path);
+	content.load_addr = 0;
+	if (!get_content(&content)) {
+		goto end;
+	}
+	if (!blocks) {
+		if (!load_content(&content)) {
+			goto end;
+		}
+	} else {
+		void *data = malloc(blocks * BLOCK_SIZE);
+		if (!data)
+			goto end;
+		if (!load_content_data(&content, offset_block, data, blocks)) {
+			goto end;
+		}
+	}
+	ret = true;
+end:
+	free_content(&content);
+	return ret;
+}
+
+/**********************load test end************************/
+/**********************anim test************************/
+
+static bool parse_level_conf(const char *arg, anim_level_conf *level_conf)
+{
+	memset(level_conf, 0, sizeof(anim_level_conf));
+	char *buf = NULL;
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_CONF);
+	if (buf) {
+		level_conf->max_level = atoi(buf + strlen(OPT_CHARGE_ANIM_LEVEL_CONF));
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_CONF);
+		return false;
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_NUM);
+	if (buf) {
+		level_conf->num = atoi(buf + strlen(OPT_CHARGE_ANIM_LEVEL_NUM));
+		if (level_conf->num <= 0) {
+			return false;
+		}
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_NUM);
+		return false;
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_DELAY);
+	if (buf) {
+		level_conf->delay = atoi(buf + strlen(OPT_CHARGE_ANIM_DELAY));
+	}
+	buf = strstr(arg, OPT_CHARGE_ANIM_LEVEL_PFX);
+	if (buf) {
+		snprintf(level_conf->prefix, sizeof(level_conf->prefix), "%s",
+		         buf + strlen(OPT_CHARGE_ANIM_LEVEL_PFX));
+	} else {
+		LOGE("Not found:%s", OPT_CHARGE_ANIM_LEVEL_PFX);
+		return false;
+	}
+
+	LOGD("Found conf:\nmax_level:%d, num:%d, delay:%d, prefix:%s",
+	     level_conf->max_level, level_conf->num, level_conf->delay,
+	     level_conf->prefix);
+	return true;
+}
+
+static int test_charge(int argc, char **argv)
+{
+	const char *desc;
+	if (argc > 0) {
+		desc = argv[0];
+	} else {
+		desc = DEF_CHARGE_DESC_PATH;
+	}
+
+	resource_content content;
+	snprintf(content.path, sizeof(content.path), "%s", desc);
+	content.load_addr = 0;
+	if (!get_content(&content)) {
+		goto end;
+	}
+	if (!load_content(&content)) {
+		goto end;
+	}
+
+	char *buf = (char *)content.load_addr;
+	char *end = buf + content.content_size - 1;
+	*end = '\0';
+	LOGD("desc:\n%s", buf);
+
+	int pos = 0;
+	while (1) {
+		char *line = (char *)memchr(buf + pos, '\n', strlen(buf + pos));
+		if (!line)
+			break;
+		*line = '\0';
+		LOGD("splite:%s", buf + pos);
+		pos += (strlen(buf + pos) + 1);
+	}
+
+	int delay = 900;
+	int only_current_level = false;
+	anim_level_conf *level_confs = NULL;
+	int level_conf_pos = 0;
+	int level_conf_num = 0;
+
+	while (true) {
+		if (buf >= end)
+			break;
+		const char *arg = buf;
+		buf += (strlen(buf) + 1);
+
+		LOGD("parse arg:%s", arg);
+		if (!memcmp(arg, OPT_CHARGE_ANIM_LEVEL_CONF,
+		            strlen(OPT_CHARGE_ANIM_LEVEL_CONF))) {
+			if (!level_confs) {
+				LOGE("Found level conf before levels!");
+				goto end;
+			}
+			if (level_conf_pos >= level_conf_num) {
+				LOGE("Too many level confs!(%d >= %d)", level_conf_pos, level_conf_num);
+				goto end;
+			}
+			if (!parse_level_conf(arg, level_confs + level_conf_pos)) {
+				LOGE("Failed to parse level conf:%s", arg);
+				goto end;
+			}
+			level_conf_pos++;
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_DELAY,
+		                   strlen(OPT_CHARGE_ANIM_DELAY))) {
+			delay = atoi(arg + strlen(OPT_CHARGE_ANIM_DELAY));
+			LOGD("Found delay:%d", delay);
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_LOOP_CUR,
+		                   strlen(OPT_CHARGE_ANIM_LOOP_CUR))) {
+			only_current_level =
+			        !memcmp(arg + strlen(OPT_CHARGE_ANIM_LOOP_CUR), "true", 4);
+			LOGD("Found only_current_level:%d", only_current_level);
+		} else if (!memcmp(arg, OPT_CHARGE_ANIM_LEVELS,
+		                   strlen(OPT_CHARGE_ANIM_LEVELS))) {
+			if (level_conf_num) {
+				goto end;
+			}
+			level_conf_num = atoi(arg + strlen(OPT_CHARGE_ANIM_LEVELS));
+			if (!level_conf_num) {
+				goto end;
+			}
+			level_confs =
+			        (anim_level_conf *)malloc(level_conf_num * sizeof(anim_level_conf));
+			LOGD("Found levels:%d", level_conf_num);
+		} else {
+			LOGE("Unknown arg:%s", arg);
+			goto end;
+		}
+	}
+
+	if (level_conf_pos != level_conf_num || !level_conf_num) {
+		LOGE("Something wrong with level confs!");
+		goto end;
+	}
+
+	int i = 0, j = 0;
+	for (i = 0; i < level_conf_num; i++) {
+		if (!level_confs[i].delay) {
+			level_confs[i].delay = delay;
+		}
+		if (!level_confs[i].delay) {
+			LOGE("Missing delay in level conf:%d", i);
+			goto end;
+		}
+		for (j = 0; j < i; j++) {
+			if (level_confs[j].max_level == level_confs[i].max_level) {
+				LOGE("Dup level conf:%d", i);
+				goto end;
+			}
+			if (level_confs[j].max_level > level_confs[i].max_level) {
+				anim_level_conf conf = level_confs[i];
+				memmove(level_confs + j + 1, level_confs + j,
+				        (i - j) * sizeof(anim_level_conf));
+				level_confs[j] = conf;
+			}
+		}
+	}
+
+	printf("Parse anim desc(%s):\n", desc);
+	printf("only_current_level=%d\n", only_current_level);
+	printf("level conf:\n");
+	for (i = 0; i < level_conf_num; i++) {
+		printf("\tmax=%d, delay=%d, num=%d, prefix=%s\n", level_confs[i].max_level,
+		       level_confs[i].delay, level_confs[i].num, level_confs[i].prefix);
+	}
+
+end:
+	free_content(&content);
+	return 0;
+}
+
+/**********************anim test end************************/
+/**********************append file************************/
+
+static const char *PROG = NULL;
+static resource_ptn_header header;
+static bool just_print = false;
+static char root_path[MAX_INDEX_ENTRY_PATH_LEN] = "\0";
+
+static void version(void)
+{
+	printf("%s (cjf@rock-chips.com)\t" VERSION "\n", PROG);
+}
+
+static void usage(void)
+{
+	printf("Usage: %s [options] [FILES]\n", PROG);
+	printf("Tools for Rockchip's resource image.\n");
+	version();
+	printf("Options:\n");
+	printf("\t" OPT_PACK "\t\t\tPack image from given files.\n");
+	printf("\t" OPT_UNPACK "\t\tUnpack given image to current dir.\n");
+	printf("\t" OPT_IMAGE "path"
+	       "\t\tSpecify input/output image path.\n");
+	printf("\t" OPT_PRINT "\t\t\tJust print informations.\n");
+	printf("\t" OPT_VERBOSE "\t\tDisplay more runtime informations.\n");
+	printf("\t" OPT_HELP "\t\t\tDisplay this information.\n");
+	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
+	printf("\t" OPT_ROOT "path"
+	       "\t\tSpecify resources' root dir.\n");
+}
+
+static int pack_image(int file_num, const char **files);
+static int unpack_image(const char *unpack_dir);
+
+enum ACTION {
+	ACTION_PACK,
+	ACTION_UNPACK,
+	ACTION_TEST_LOAD,
+	ACTION_TEST_CHARGE,
+};
+
+int main(int argc, char **argv)
+{
+	PROG = fix_path(argv[0]);
+
+	enum ACTION action = ACTION_PACK;
+
+	argc--, argv++;
+	while (argc > 0 && argv[0][0] == '-') {
+		/* it's a opt arg. */
+		const char *arg = argv[0];
+		argc--, argv++;
+		if (!strcmp(OPT_VERBOSE, arg)) {
+			g_debug = true;
+		} else if (!strcmp(OPT_HELP, arg)) {
+			usage();
+			return 0;
+		} else if (!strcmp(OPT_VERSION, arg)) {
+			version();
+			return 0;
+		} else if (!strcmp(OPT_PRINT, arg)) {
+			just_print = true;
+		} else if (!strcmp(OPT_PACK, arg)) {
+			action = ACTION_PACK;
+		} else if (!strcmp(OPT_UNPACK, arg)) {
+			action = ACTION_UNPACK;
+		} else if (!strcmp(OPT_TEST_LOAD, arg)) {
+			action = ACTION_TEST_LOAD;
+		} else if (!strcmp(OPT_TEST_CHARGE, arg)) {
+			action = ACTION_TEST_CHARGE;
+		} else if (!memcmp(OPT_IMAGE, arg, strlen(OPT_IMAGE))) {
+			snprintf(image_path, sizeof(image_path), "%s", arg + strlen(OPT_IMAGE));
+		} else if (!memcmp(OPT_ROOT, arg, strlen(OPT_ROOT))) {
+			snprintf(root_path, sizeof(root_path), "%s", arg + strlen(OPT_ROOT));
+		} else {
+			LOGE("Unknown opt:%s", arg);
+			usage();
+			return -1;
+		}
+	}
+
+	if (!image_path[0]) {
+		snprintf(image_path, sizeof(image_path), "%s", DEFAULT_IMAGE_PATH);
+	}
+
+	switch (action) {
+	case ACTION_PACK: {
+		int file_num = argc;
+		const char **files = (const char **)argv;
+		if (!file_num) {
+			LOGE("No file to pack!");
+			return 0;
+		}
+		LOGD("try to pack %d files.", file_num);
+		return pack_image(file_num, files);
+	}
+	case ACTION_UNPACK: {
+		return unpack_image(argc > 0 ? argv[0] : DEFAULT_UNPACK_DIR);
+	}
+	case ACTION_TEST_LOAD: {
+		return test_load(argc, argv);
+	}
+	case ACTION_TEST_CHARGE: {
+		return test_charge(argc, argv);
+	}
+	}
+	/* not reach here. */
+	return -1;
+}
+
+/************unpack code****************/
+static bool mkdirs(char *path)
+{
+	char *tmp = path;
+	char *pos = NULL;
+	char buf[MAX_INDEX_ENTRY_PATH_LEN];
+	bool ret = true;
+	while ((pos = memchr(tmp, '/', strlen(tmp)))) {
+		strcpy(buf, path);
+		buf[pos - path] = '\0';
+		tmp = pos + 1;
+		LOGD("mkdir:%s", buf);
+		if (!mkdir(buf, 0755)) {
+			ret = false;
+		}
+	}
+	if (!ret)
+		LOGD("Failed to mkdir(%s)!", path);
+	return ret;
+}
+
+static bool dump_file(FILE *file, const char *unpack_dir,
+                      index_tbl_entry entry)
+{
+	LOGD("try to dump entry:%s", entry.path);
+	bool ret = false;
+	FILE *out_file = NULL;
+	long int pos = 0;
+	char path[MAX_INDEX_ENTRY_PATH_LEN * 2 + 1];
+	if (just_print) {
+		ret = true;
+		goto done;
+	}
+
+	pos = ftell(file);
+	snprintf(path, sizeof(path), "%s/%s", unpack_dir, entry.path);
+	mkdirs(path);
+	out_file = fopen(path, "wb");
+	if (!out_file) {
+		LOGE("Failed to create:%s", path);
+		goto end;
+	}
+	long int offset = entry.content_offset * BLOCK_SIZE;
+	fseek(file, offset, SEEK_SET);
+	if (offset != ftell(file)) {
+		LOGE("Failed to read content:%s", entry.path);
+		goto end;
+	}
+	char buf[BLOCK_SIZE];
+	int n;
+	int len = entry.content_size;
+	while (len > 0) {
+		n = len > BLOCK_SIZE ? BLOCK_SIZE : len;
+		if (!fread(buf, n, 1, file)) {
+			LOGE("Failed to read content:%s", entry.path);
+			goto end;
+		}
+		if (!fwrite(buf, n, 1, out_file)) {
+			LOGE("Failed to write:%s", entry.path);
+			goto end;
+		}
+		len -= n;
+	}
+done:
+	ret = true;
+end:
+	if (out_file)
+		fclose(out_file);
+	if (pos)
+		fseek(file, pos, SEEK_SET);
+	return ret;
+}
+
+static int unpack_image(const char *dir)
+{
+	FILE *image_file = NULL;
+	bool ret = false;
+	char unpack_dir[MAX_INDEX_ENTRY_PATH_LEN];
+	if (just_print)
+		dir = ".";
+	snprintf(unpack_dir, sizeof(unpack_dir), "%s", dir);
+	if (!strlen(unpack_dir)) {
+		goto end;
+	} else if (unpack_dir[strlen(unpack_dir) - 1] == '/') {
+		unpack_dir[strlen(unpack_dir) - 1] = '\0';
+	}
+
+	mkdir(unpack_dir, 0755);
+	image_file = fopen(image_path, "rb");
+	char buf[BLOCK_SIZE];
+	if (!image_file) {
+		LOGE("Failed to open:%s", image_path);
+		goto end;
+	}
+	if (!fread(buf, BLOCK_SIZE, 1, image_file)) {
+		LOGE("Failed to read header!");
+		goto end;
+	}
+	memcpy(&header, buf, sizeof(header));
+
+	if (memcmp(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic))) {
+		LOGE("Not a resource image(%s)!", image_path);
+		goto end;
+	}
+	/* switch for be. */
+	fix_header(&header);
+
+	printf("Dump header:\n");
+	printf("partition version:%d.%d\n", header.resource_ptn_version,
+	       header.index_tbl_version);
+	printf("header size:%d\n", header.header_size);
+	printf("index tbl:\n\toffset:%d\tentry size:%d\tentry num:%d\n",
+	       header.tbl_offset, header.tbl_entry_size, header.tbl_entry_num);
+
+	/* TODO: support header_size & tbl_entry_size */
+	if (header.resource_ptn_version != RESOURCE_PTN_VERSION ||
+	    header.header_size != RESOURCE_PTN_HDR_SIZE ||
+	    header.index_tbl_version != INDEX_TBL_VERSION ||
+	    header.tbl_entry_size != INDEX_TBL_ENTR_SIZE) {
+		LOGE("Not supported in this version!");
+		goto end;
+	}
+
+	printf("Dump Index table:\n");
+	index_tbl_entry entry;
+	int i;
+	for (i = 0; i < header.tbl_entry_num; i++) {
+		/* TODO: support tbl_entry_size */
+		if (!fread(buf, BLOCK_SIZE, 1, image_file)) {
+			LOGE("Failed to read index entry:%d!", i);
+			goto end;
+		}
+		memcpy(&entry, buf, sizeof(entry));
+
+		if (memcmp(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag))) {
+			LOGE("Something wrong with index entry:%d!", i);
+			goto end;
+		}
+		/* switch for be. */
+		fix_entry(&entry);
+
+		printf("entry(%d):\n\tpath:%s\n\toffset:%d\tsize:%d\n", i, entry.path,
+		       entry.content_offset, entry.content_size);
+		if (!dump_file(image_file, unpack_dir, entry)) {
+			goto end;
+		}
+	}
+	printf("Unack %s to %s successed!\n", image_path, unpack_dir);
+	ret = true;
+end:
+	if (image_file)
+		fclose(image_file);
+	return ret ? 0 : -1;
+}
+
+/************unpack code end****************/
+/************pack code****************/
+
+static inline size_t get_file_size(const char *path)
+{
+	LOGD("try to get size(%s)...", path);
+	struct stat st;
+	if (stat(path, &st) < 0) {
+		LOGE("Failed to get size:%s", path);
+		return -1;
+	}
+	LOGD("path:%s, size:%ld", path, st.st_size);
+	return st.st_size;
+}
+
+static int write_file(int offset_block, const char *src_path)
+{
+	LOGD("try to write file(%s) to offset:%d...", src_path, offset_block);
+	char buf[BLOCK_SIZE];
+	int ret = -1;
+	size_t file_size;
+	int blocks;
+	FILE *src_file = fopen(src_path, "rb");
+	if (!src_file) {
+		LOGE("Failed to open:%s", src_path);
+		goto end;
+	}
+
+	file_size = get_file_size(src_path);
+	if (file_size < 0) {
+		goto end;
+	}
+	blocks = fix_blocks(file_size);
+
+	int i;
+	for (i = 0; i < blocks; i++) {
+		memset(buf, 0, sizeof(buf));
+		if (!fread(buf, 1, BLOCK_SIZE, src_file)) {
+			LOGE("Failed to read:%s", src_path);
+			goto end;
+		}
+		if (!write_data(offset_block + i, buf, BLOCK_SIZE)) {
+			goto end;
+		}
+	}
+	ret = blocks;
+end:
+	if (src_file)
+		fclose(src_file);
+	return ret;
+}
+
+static bool write_header(const int file_num)
+{
+	LOGD("try to write header...");
+	memcpy(header.magic, RESOURCE_PTN_HDR_MAGIC, sizeof(header.magic));
+	header.resource_ptn_version = RESOURCE_PTN_VERSION;
+	header.index_tbl_version = INDEX_TBL_VERSION;
+	header.header_size = RESOURCE_PTN_HDR_SIZE;
+	header.tbl_offset = header.header_size;
+	header.tbl_entry_size = INDEX_TBL_ENTR_SIZE;
+	header.tbl_entry_num = file_num;
+
+	/* switch for le. */
+	resource_ptn_header hdr = header;
+	fix_header(&hdr);
+	return write_data(0, &hdr, sizeof(hdr));
+}
+
+static bool write_index_tbl(const int file_num, const char **files)
+{
+	LOGD("try to write index table...");
+	bool ret = false;
+	bool foundFdt = false;
+	int offset =
+	        header.header_size + header.tbl_entry_size * header.tbl_entry_num;
+	index_tbl_entry entry;
+	memcpy(entry.tag, INDEX_TBL_ENTR_TAG, sizeof(entry.tag));
+	int i;
+	for (i = 0; i < file_num; i++) {
+		size_t file_size = get_file_size(files[i]);
+		if (file_size < 0)
+			goto end;
+		entry.content_size = file_size;
+		entry.content_offset = offset;
+
+		if (write_file(offset, files[i]) < 0)
+			goto end;
+
+		LOGD("try to write index entry(%s)...", files[i]);
+
+		/* switch for le. */
+		fix_entry(&entry);
+		memset(entry.path, 0, sizeof(entry.path));
+		const char *path = files[i];
+		if (root_path[0]) {
+			if (!strncmp(path, root_path, strlen(root_path))) {
+				path += strlen(root_path);
+				if (path[0] == '/')
+					path++;
+			}
+		}
+		path = fix_path(path);
+		if (!strcmp(files[i] + strlen(files[i]) - strlen(DTD_SUBFIX), DTD_SUBFIX)) {
+			if (!foundFdt) {
+				/* use default path. */
+				LOGD("mod fdt path:%s -> %s...", files[i], FDT_PATH);
+				path = FDT_PATH;
+				foundFdt = true;
+			}
+		}
+		snprintf(entry.path, sizeof(entry.path), "%s", path);
+		offset += fix_blocks(file_size);
+		if (!write_data(header.header_size + i * header.tbl_entry_size, &entry,
+		                sizeof(entry)))
+			goto end;
+	}
+	ret = true;
+end:
+	return ret;
+}
+
+static int pack_image(int file_num, const char **files)
+{
+	bool ret = false;
+	FILE *image_file = fopen(image_path, "wb");
+	if (!image_file) {
+		LOGE("Failed to create:%s", image_path);
+		goto end;
+	}
+	fclose(image_file);
+
+	/* prepare files */
+	int i = 0;
+	int pos = 0;
+	const char *tmp;
+	for (i = 0; i < file_num; i++) {
+		if (!strcmp(files[i] + strlen(files[i]) - strlen(DTD_SUBFIX), DTD_SUBFIX)) {
+			/* dtb files for kernel. */
+			tmp = files[pos];
+			files[pos] = files[i];
+			files[i] = tmp;
+			pos++;
+		} else if (!strcmp(fix_path(image_path), fix_path(files[i]))) {
+			/* not to pack image itself! */
+			tmp = files[file_num - 1];
+			files[file_num - 1] = files[i];
+			files[i] = tmp;
+			file_num--;
+		}
+	}
+
+	if (!write_header(file_num)) {
+		LOGE("Failed to write header!");
+		goto end;
+	}
+	if (!write_index_tbl(file_num, files)) {
+		LOGE("Failed to write index table!");
+		goto end;
+	}
+	printf("Pack to %s successed!\n", image_path);
+	ret = true;
+end:
+	return ret ? 0 : -1;
+}
+
+/************pack code end****************/
diff --git a/tools/rockchip/sha.c b/tools/rockchip/sha.c
new file mode 100644
index 0000000000..b26fa740f8
--- /dev/null
+++ b/tools/rockchip/sha.c
@@ -0,0 +1,320 @@
+/* sha.c
+**
+** Copyright 2008, The Android Open Source Project
+**
+** Redistribution and use in source and binary forms, with or without
+** modification, are permitted provided that the following conditions are met:
+**     * Redistributions of source code must retain the above copyright
+**       notice, this list of conditions and the following disclaimer.
+**     * Redistributions in binary form must reproduce the above copyright
+**       notice, this list of conditions and the following disclaimer in the
+**       documentation and/or other materials provided with the distribution.
+**     * Neither the name of Google Inc. nor the names of its contributors may
+**       be used to endorse or promote products derived from this software
+**       without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY Google Inc. ``AS IS'' AND ANY EXPRESS OR
+** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+** EVENT SHALL Google Inc. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+** SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+** PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+** OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+** OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+** ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "sha.h"
+
+/*
+ Some machines lack byteswap.h and endian.h.  These have to use the
+ slower code, even if they're little-endian.
+*/
+
+#if defined(HAVE_ENDIAN_H) && defined(HAVE_LITTLE_ENDIAN)
+
+#include <byteswap.h>
+#include <memory.h>
+
+/*
+ This version is about 28% faster than the generic version below,
+ but assumes little-endianness.
+*/
+
+static inline uint32_t ror27(uint32_t val)
+{
+	return (val >> 27) | (val << 5);
+}
+static inline uint32_t ror2(uint32_t val)
+{
+	return (val >> 2) | (val << 30);
+}
+static inline uint32_t ror31(uint32_t val)
+{
+	return (val >> 31) | (val << 1);
+}
+
+static void SHA1_Transform(SHA_CTX *ctx)
+{
+	uint32_t W[80];
+	register uint32_t A, B, C, D, E;
+	int t;
+
+	A = ctx->state[0];
+	B = ctx->state[1];
+	C = ctx->state[2];
+	D = ctx->state[3];
+	E = ctx->state[4];
+
+#define SHA_F1(A, B, C, D, E, t)                                               \
+  E += ror27(A) + (W[t] = bswap_32(ctx->buf.w[t])) + (D ^ (B & (C ^ D))) +     \
+       0x5A827999;                                                             \
+  B = ror2(B);
+
+	for (t = 0; t < 15; t += 5) {
+		SHA_F1(A, B, C, D, E, t + 0);
+		SHA_F1(E, A, B, C, D, t + 1);
+		SHA_F1(D, E, A, B, C, t + 2);
+		SHA_F1(C, D, E, A, B, t + 3);
+		SHA_F1(B, C, D, E, A, t + 4);
+	}
+	SHA_F1(A, B, C, D, E, t + 0); /* 16th one, t == 15 */
+
+#undef SHA_F1
+
+#define SHA_F1(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      (D ^ (B & (C ^ D))) + 0x5A827999;                                        \
+  B = ror2(B);
+
+	SHA_F1(E, A, B, C, D, t + 1);
+	SHA_F1(D, E, A, B, C, t + 2);
+	SHA_F1(C, D, E, A, B, t + 3);
+	SHA_F1(B, C, D, E, A, t + 4);
+
+#undef SHA_F1
+
+#define SHA_F2(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      (B ^ C ^ D) + 0x6ED9EBA1;                                                \
+  B = ror2(B);
+
+	for (t = 20; t < 40; t += 5) {
+		SHA_F2(A, B, C, D, E, t + 0);
+		SHA_F2(E, A, B, C, D, t + 1);
+		SHA_F2(D, E, A, B, C, t + 2);
+		SHA_F2(C, D, E, A, B, t + 3);
+		SHA_F2(B, C, D, E, A, t + 4);
+	}
+
+#undef SHA_F2
+
+#define SHA_F3(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      ((B & C) | (D & (B | C))) + 0x8F1BBCDC;                                  \
+  B = ror2(B);
+
+	for (; t < 60; t += 5) {
+		SHA_F3(A, B, C, D, E, t + 0);
+		SHA_F3(E, A, B, C, D, t + 1);
+		SHA_F3(D, E, A, B, C, t + 2);
+		SHA_F3(C, D, E, A, B, t + 3);
+		SHA_F3(B, C, D, E, A, t + 4);
+	}
+
+#undef SHA_F3
+
+#define SHA_F4(A, B, C, D, E, t)                                               \
+  E +=                                                                         \
+      ror27(A) + (W[t] = ror31(W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16])) + \
+      (B ^ C ^ D) + 0xCA62C1D6;                                                \
+  B = ror2(B);
+
+	for (; t < 80; t += 5) {
+		SHA_F4(A, B, C, D, E, t + 0);
+		SHA_F4(E, A, B, C, D, t + 1);
+		SHA_F4(D, E, A, B, C, t + 2);
+		SHA_F4(C, D, E, A, B, t + 3);
+		SHA_F4(B, C, D, E, A, t + 4);
+	}
+
+#undef SHA_F4
+
+	ctx->state[0] += A;
+	ctx->state[1] += B;
+	ctx->state[2] += C;
+	ctx->state[3] += D;
+	ctx->state[4] += E;
+}
+
+void SHA_update(SHA_CTX *ctx, const void *data, int len)
+{
+	int i = ctx->count % sizeof(ctx->buf);
+	const uint8_t *p = (const uint8_t *)data;
+
+	ctx->count += len;
+
+	while (len > sizeof(ctx->buf) - i) {
+		memcpy(&ctx->buf.b[i], p, sizeof(ctx->buf) - i);
+		len -= sizeof(ctx->buf) - i;
+		p += sizeof(ctx->buf) - i;
+		SHA1_Transform(ctx);
+		i = 0;
+	}
+
+	while (len--) {
+		ctx->buf.b[i++] = *p++;
+		if (i == sizeof(ctx->buf)) {
+			SHA1_Transform(ctx);
+			i = 0;
+		}
+	}
+}
+
+const uint8_t *SHA_final(SHA_CTX *ctx)
+{
+	uint64_t cnt = ctx->count * 8;
+	int i;
+
+	SHA_update(ctx, (uint8_t *)"\x80", 1);
+	while ((ctx->count % sizeof(ctx->buf)) != (sizeof(ctx->buf) - 8)) {
+		SHA_update(ctx, (uint8_t *)"\0", 1);
+	}
+	for (i = 0; i < 8; ++i) {
+		uint8_t tmp = cnt >> ((7 - i) * 8);
+		SHA_update(ctx, &tmp, 1);
+	}
+
+	for (i = 0; i < 5; i++) {
+		ctx->buf.w[i] = bswap_32(ctx->state[i]);
+	}
+
+	return ctx->buf.b;
+}
+
+#else /* #if defined(HAVE_ENDIAN_H) && defined(HAVE_LITTLE_ENDIAN)*/
+
+#define rol(bits, value) (((value) << (bits)) | ((value) >> (32 - (bits))))
+
+static void SHA1_transform(SHA_CTX *ctx)
+{
+	uint32_t W[80];
+	uint32_t A, B, C, D, E;
+	uint8_t *p = ctx->buf;
+	int t;
+
+	for (t = 0; t < 16; ++t) {
+		uint32_t tmp = *p++ << 24;
+		tmp |= *p++ << 16;
+		tmp |= *p++ << 8;
+		tmp |= *p++;
+		W[t] = tmp;
+	}
+
+	for (; t < 80; t++) {
+		W[t] = rol(1, W[t - 3] ^ W[t - 8] ^ W[t - 14] ^ W[t - 16]);
+	}
+
+	A = ctx->state[0];
+	B = ctx->state[1];
+	C = ctx->state[2];
+	D = ctx->state[3];
+	E = ctx->state[4];
+
+	for (t = 0; t < 80; t++) {
+		uint32_t tmp = rol(5, A) + E + W[t];
+
+		if (t < 20)
+			tmp += (D ^ (B & (C ^ D))) + 0x5A827999;
+		else if (t < 40)
+			tmp += (B ^ C ^ D) + 0x6ED9EBA1;
+		else if (t < 60)
+			tmp += ((B & C) | (D & (B | C))) + 0x8F1BBCDC;
+		else
+			tmp += (B ^ C ^ D) + 0xCA62C1D6;
+
+		E = D;
+		D = C;
+		C = rol(30, B);
+		B = A;
+		A = tmp;
+	}
+
+	ctx->state[0] += A;
+	ctx->state[1] += B;
+	ctx->state[2] += C;
+	ctx->state[3] += D;
+	ctx->state[4] += E;
+}
+
+void SHA_update(SHA_CTX *ctx, const void *data, int len)
+{
+	int i = ctx->count % sizeof(ctx->buf);
+	const uint8_t *p = (const uint8_t *)data;
+
+	ctx->count += len;
+
+	while (len--) {
+		ctx->buf[i++] = *p++;
+		if (i == sizeof(ctx->buf)) {
+			SHA1_transform(ctx);
+			i = 0;
+		}
+	}
+}
+const uint8_t *SHA_final(SHA_CTX *ctx)
+{
+	uint8_t *p = ctx->buf;
+	uint64_t cnt = ctx->count * 8;
+	int i;
+
+	SHA_update(ctx, (uint8_t *)"\x80", 1);
+	while ((ctx->count % sizeof(ctx->buf)) != (sizeof(ctx->buf) - 8)) {
+		SHA_update(ctx, (uint8_t *)"\0", 1);
+	}
+	for (i = 0; i < 8; ++i) {
+		uint8_t tmp = cnt >> ((7 - i) * 8);
+		SHA_update(ctx, &tmp, 1);
+	}
+
+	for (i = 0; i < 5; i++) {
+		uint32_t tmp = ctx->state[i];
+		*p++ = tmp >> 24;
+		*p++ = tmp >> 16;
+		*p++ = tmp >> 8;
+		*p++ = tmp >> 0;
+	}
+
+	return ctx->buf;
+}
+
+#endif /* endianness */
+
+void SHA_init(SHA_CTX *ctx)
+{
+	ctx->state[0] = 0x67452301;
+	ctx->state[1] = 0xEFCDAB89;
+	ctx->state[2] = 0x98BADCFE;
+	ctx->state[3] = 0x10325476;
+	ctx->state[4] = 0xC3D2E1F0;
+	ctx->count = 0;
+}
+
+/* Convenience function */
+const uint8_t *SHA(const void *data, int len, uint8_t *digest)
+{
+	const uint8_t *p;
+	int i;
+	SHA_CTX ctx;
+	SHA_init(&ctx);
+	SHA_update(&ctx, data, len);
+	p = SHA_final(&ctx);
+	for (i = 0; i < SHA_DIGEST_SIZE; ++i) {
+		digest[i] = *p++;
+	}
+	return digest;
+}
diff --git a/tools/rockchip/sha.h b/tools/rockchip/sha.h
new file mode 100644
index 0000000000..d3001ee9e5
--- /dev/null
+++ b/tools/rockchip/sha.h
@@ -0,0 +1,63 @@
+/* sha.h
+**
+** Copyright 2008, The Android Open Source Project
+**
+** Redistribution and use in source and binary forms, with or without
+** modification, are permitted provided that the following conditions are met:
+**     * Redistributions of source code must retain the above copyright
+**       notice, this list of conditions and the following disclaimer.
+**     * Redistributions in binary form must reproduce the above copyright
+**       notice, this list of conditions and the following disclaimer in the
+**       documentation and/or other materials provided with the distribution.
+**     * Neither the name of Google Inc. nor the names of its contributors may
+**       be used to endorse or promote products derived from this software
+**       without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY Google Inc. ``AS IS'' AND ANY EXPRESS OR
+** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+** MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+** EVENT SHALL Google Inc. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+** SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+** PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+** OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+** WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+** OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+** ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _EMBEDDED_SHA_H_
+#define _EMBEDDED_SHA_H_
+
+#include <inttypes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+	typedef struct SHA_CTX {
+		uint64_t count;
+		uint32_t state[5];
+#if defined(HAVE_ENDIAN_H) && defined(HAVE_LITTLE_ENDIAN)
+		union {
+			uint8_t b[64];
+			uint32_t w[16];
+		} buf;
+#else
+		uint8_t buf[64];
+#endif
+	} SHA_CTX;
+
+	void SHA_init(SHA_CTX* ctx);
+	void SHA_update(SHA_CTX* ctx, const void* data, int len);
+	const uint8_t* SHA_final(SHA_CTX* ctx);
+
+	/* Convenience method. Returns digest parameter value. */
+	const uint8_t* SHA(const void* data, int len, uint8_t* digest);
+
+#define SHA_DIGEST_SIZE 20
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/tools/rockchip/sha2.c b/tools/rockchip/sha2.c
new file mode 100644
index 0000000000..9699904579
--- /dev/null
+++ b/tools/rockchip/sha2.c
@@ -0,0 +1,760 @@
+/*
+ ---------------------------------------------------------------------------
+ Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
+ All rights reserved.
+
+ LICENSE TERMS
+
+ The free distribution and use of this software in both source and binary
+ form is allowed (with or without changes) provided that:
+
+   1. distributions of this source code include the above copyright
+      notice, this list of conditions and the following disclaimer;
+
+   2. distributions in binary form include the above copyright
+      notice, this list of conditions and the following disclaimer
+      in the documentation and/or other associated materials;
+
+   3. the copyright holder's name is not used to endorse products
+      built using this software without specific written permission.
+
+ ALTERNATIVELY, provided that this notice is retained in full, this product
+ may be distributed under the terms of the GNU General Public License (GPL),
+ in which case the provisions of the GPL apply INSTEAD OF those given above.
+
+ DISCLAIMER
+
+ This software is provided 'as is' with no explicit or implied warranties
+ in respect of its properties, including, but not limited to, correctness
+ and/or fitness for purpose.
+ ---------------------------------------------------------------------------
+ Issue Date: 30/11/2002
+
+ This is a byte oriented version of SHA2 that operates on arrays of bytes
+ stored in memory. This code implements sha256, sha384 and sha512 but the
+ latter two functions rely on efficient 64-bit integer operations that
+ may not be very efficient on 32-bit machines
+
+ The sha256 functions use a type 'sha256_ctx' to hold details of the
+ current hash state and uses the following three calls:
+
+       void sha256_begin(sha256_ctx ctx[1])
+       void sha256_hash(sha256_ctx ctx[1], const unsigned char data[],
+                            unsigned long len)
+       void sha256_end(sha256_ctx ctx[1], unsigned char hval[])
+
+ The first subroutine initialises a hash computation by setting up the
+ context in the sha256_ctx context. The second subroutine hashes 8-bit
+ bytes from array data[] into the hash state withinh sha256_ctx context,
+ the number of bytes to be hashed being given by the the unsigned long
+ integer len.  The third subroutine completes the hash calculation and
+ places the resulting digest value in the array of 8-bit bytes hval[].
+
+ The sha384 and sha512 functions are similar and use the interfaces:
+
+       void sha384_begin(sha384_ctx ctx[1]);
+       void sha384_hash(sha384_ctx ctx[1], const unsigned char data[],
+                            unsigned long len);
+       void sha384_end(sha384_ctx ctx[1], unsigned char hval[]);
+
+       void sha512_begin(sha512_ctx ctx[1]);
+       void sha512_hash(sha512_ctx ctx[1], const unsigned char data[],
+                            unsigned long len);
+       void sha512_end(sha512_ctx ctx[1], unsigned char hval[]);
+
+ In addition there is a function sha2 that can be used to call all these
+ functions using a call with a hash length parameter as follows:
+
+       int sha2_begin(sha2_ctx ctx[1], unsigned long len);
+       void sha2_hash(sha2_ctx ctx[1], const unsigned char data[],
+                            unsigned long len);
+       void sha2_end(sha2_ctx ctx[1], unsigned char hval[]);
+
+ My thanks to Erik Andersen <andersen@codepoet.org> for testing this code
+ on big-endian systems and for his assistance with corrections
+*/
+
+/* define the hash functions that you need          */
+
+#define SHA_2 /* for dynamic hash length  */
+#define SHA_256
+#define SHA_384
+#define SHA_512
+
+#ifdef USE_HOSTCC
+#include <string.h> /* for memcpy() etc.        */
+#include <stdlib.h> /* for _lrotr with VC++     */
+#endif
+
+#include "sha2.h"
+
+/* rockchip crypto byte order */
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+
+/*  1. PLATFORM SPECIFIC INCLUDES */
+
+// #if defined(__GNU_LIBRARY__)
+// #  include <byteswap.h>
+// #  include <endian.h>
+// #elif defined(__CRYPTLIB__)
+// #  if defined( INC_ALL )
+// #    include "crypt.h"
+// #  elif defined( INC_CHILD )
+// #    include "../crypt.h"
+// #  else
+// #    include "crypt.h"
+// #  endif
+// #  if defined(DATA_LITTLEENDIAN)
+// #    define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+// #  else
+// #    define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+// #  endif
+// #if defined(_MSC_VER)
+// #  include <stdlib.h>
+// #elif !defined(WIN32)
+// #  include <stdlib.h>
+// #  if !defined (_ENDIAN_H)
+// #    include <sys/param.h>
+// #  else
+// #    include _ENDIAN_H
+// #  endif
+// #endif
+
+/*  2. BYTE ORDER IN 32-BIT WORDS
+
+    To obtain the highest speed on processors with 32-bit words, this code
+    needs to determine the order in which bytes are packed into such words.
+    The following block of code is an attempt to capture the most obvious
+    ways in which various environments specify their endian definitions.
+    It may well fail, in which case the definitions will need to be set by
+    editing at the points marked **** EDIT HERE IF NECESSARY **** below.
+*/
+#define SHA_LITTLE_ENDIAN 1234 /* byte 0 is least significant (i386) */
+#define SHA_BIG_ENDIAN 4321    /* byte 0 is most significant (mc68k) */
+
+#if !defined(PLATFORM_BYTE_ORDER)
+#if defined(LITTLE_ENDIAN) || defined(BIG_ENDIAN)
+#if defined(LITTLE_ENDIAN) && defined(BIG_ENDIAN)
+#if defined(BYTE_ORDER)
+#if (BYTE_ORDER == LITTLE_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif(BYTE_ORDER == BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#endif
+#elif defined(LITTLE_ENDIAN) && !defined(BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif !defined(LITTLE_ENDIAN) && defined(BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#elif defined(_LITTLE_ENDIAN) || defined(_BIG_ENDIAN)
+#if defined(_LITTLE_ENDIAN) && defined(_BIG_ENDIAN)
+#if defined(_BYTE_ORDER)
+#if (_BYTE_ORDER == _LITTLE_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif(_BYTE_ORDER == _BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#endif
+#elif defined(_LITTLE_ENDIAN) && !defined(_BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif !defined(_LITTLE_ENDIAN) && defined(_BIG_ENDIAN)
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#elif 0 /* **** EDIT HERE IF NECESSARY **** */
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif 0 /* **** EDIT HERE IF NECESSARY **** */
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#elif(('1234' >> 24) == '1')
+#define PLATFORM_BYTE_ORDER SHA_LITTLE_ENDIAN
+#elif(('4321' >> 24) == '1')
+#define PLATFORM_BYTE_ORDER SHA_BIG_ENDIAN
+#endif
+#endif
+
+#if !defined(PLATFORM_BYTE_ORDER)
+#error Please set undetermined byte order (lines 159 or 161 of sha2.c).
+#endif
+
+#ifdef _MSC_VER
+#pragma intrinsic(memcpy)
+#endif
+
+#define rotr32(x, n) (((x) >> n) | ((x) << (32 - n)))
+
+#if !defined(bswap_32)
+#define bswap_32(x)                                                            \
+  ((rotr32((x), 24) & 0x00ff00ff) | (rotr32((x), 8) & 0xff00ff00))
+#endif
+
+#if (PLATFORM_BYTE_ORDER == SHA_LITTLE_ENDIAN)
+#define SWAP_BYTES
+#else
+#undef SWAP_BYTES
+#endif
+
+#if defined(SHA_2) || defined(SHA_256)
+
+#define SHA256_MASK (SHA256_BLOCK_SIZE - 1)
+
+#if defined(SWAP_BYTES)
+#define bsw_32(p, n)                                                           \
+  {                                                                            \
+    int _i = (n);                                                              \
+    while (_i--)                                                               \
+      p[_i] = bswap_32(p[_i]);                                                 \
+  }
+#else
+#define bsw_32(p, n)
+#endif
+
+/* SHA256 mixing function definitions   */
+
+#define ch(x, y, z) (((x) & (y)) ^ (~(x) & (z)))
+#define maj(x, y, z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
+
+#define s256_0(x) (rotr32((x), 2) ^ rotr32((x), 13) ^ rotr32((x), 22))
+#define s256_1(x) (rotr32((x), 6) ^ rotr32((x), 11) ^ rotr32((x), 25))
+#define g256_0(x) (rotr32((x), 7) ^ rotr32((x), 18) ^ ((x) >> 3))
+#define g256_1(x) (rotr32((x), 17) ^ rotr32((x), 19) ^ ((x) >> 10))
+
+/* rotated SHA256 round definition. Rather than swapping variables as in    */
+/* FIPS-180, different variables are 'rotated' on each round, returning     */
+/* to their starting positions every eight rounds                           */
+
+#define h2(i)                                                                  \
+  ctx->wbuf[i & 15] +=                                                         \
+      g256_1(ctx->wbuf[(i + 14) & 15]) + ctx->wbuf[(i + 9) & 15] +             \
+      g256_0(ctx->wbuf[(i + 1) & 15])
+
+#define h2_cycle(i, j)                                                         \
+  v[(7 - i) & 7] +=                                                            \
+      (j ? h2(i) : ctx->wbuf[i & 15]) + k256[i + j] + s256_1(v[(4 - i) & 7]) + \
+      ch(v[(4 - i) & 7], v[(5 - i) & 7], v[(6 - i) & 7]);                      \
+  v[(3 - i) & 7] += v[(7 - i) & 7];                                            \
+  v[(7 - i) & 7] += s256_0(v[(0 - i) & 7]) +                                   \
+                    maj(v[(0 - i) & 7], v[(1 - i) & 7], v[(2 - i) & 7])
+
+/* SHA256 mixing data   */
+
+const sha2_32t k256[64] = {
+	n_u32(428a2f98), n_u32(71374491), n_u32(b5c0fbcf), n_u32(e9b5dba5),
+	n_u32(3956c25b), n_u32(59f111f1), n_u32(923f82a4), n_u32(ab1c5ed5),
+	n_u32(d807aa98), n_u32(12835b01), n_u32(243185be), n_u32(550c7dc3),
+	n_u32(72be5d74), n_u32(80deb1fe), n_u32(9bdc06a7), n_u32(c19bf174),
+	n_u32(e49b69c1), n_u32(efbe4786), n_u32(0fc19dc6), n_u32(240ca1cc),
+	n_u32(2de92c6f), n_u32(4a7484aa), n_u32(5cb0a9dc), n_u32(76f988da),
+	n_u32(983e5152), n_u32(a831c66d), n_u32(b00327c8), n_u32(bf597fc7),
+	n_u32(c6e00bf3), n_u32(d5a79147), n_u32(06ca6351), n_u32(14292967),
+	n_u32(27b70a85), n_u32(2e1b2138), n_u32(4d2c6dfc), n_u32(53380d13),
+	n_u32(650a7354), n_u32(766a0abb), n_u32(81c2c92e), n_u32(92722c85),
+	n_u32(a2bfe8a1), n_u32(a81a664b), n_u32(c24b8b70), n_u32(c76c51a3),
+	n_u32(d192e819), n_u32(d6990624), n_u32(f40e3585), n_u32(106aa070),
+	n_u32(19a4c116), n_u32(1e376c08), n_u32(2748774c), n_u32(34b0bcb5),
+	n_u32(391c0cb3), n_u32(4ed8aa4a), n_u32(5b9cca4f), n_u32(682e6ff3),
+	n_u32(748f82ee), n_u32(78a5636f), n_u32(84c87814), n_u32(8cc70208),
+	n_u32(90befffa), n_u32(a4506ceb), n_u32(bef9a3f7), n_u32(c67178f2),
+};
+
+/* SHA256 initialisation data */
+
+const sha2_32t i256[8] = { n_u32(6a09e667), n_u32(bb67ae85), n_u32(3c6ef372),
+                           n_u32(a54ff53a), n_u32(510e527f), n_u32(9b05688c),
+                           n_u32(1f83d9ab), n_u32(5be0cd19)
+                         };
+
+void sha256_begin(sha256_ctx ctx[1])
+{
+	ctx->count[0] = ctx->count[1] = 0;
+	memcpy(ctx->hash, i256, 8 * sizeof(sha2_32t));
+}
+
+/* Compile 64 bytes of hash data into SHA256 digest value   */
+/* NOTE: this routine assumes that the byte order in the    */
+/* ctx->wbuf[] at this point is in such an order that low   */
+/* address bytes in the ORIGINAL byte stream placed in this */
+/* buffer will now go to the high end of words on BOTH big  */
+/* and little endian systems                                */
+
+void sha256_compile(sha256_ctx ctx[1])
+{
+	sha2_32t v[8], j;
+
+	memcpy(v, ctx->hash, 8 * sizeof(sha2_32t));
+
+	for (j = 0; j < 64; j += 16) {
+		h2_cycle(0, j);
+		h2_cycle(1, j);
+		h2_cycle(2, j);
+		h2_cycle(3, j);
+		h2_cycle(4, j);
+		h2_cycle(5, j);
+		h2_cycle(6, j);
+		h2_cycle(7, j);
+		h2_cycle(8, j);
+		h2_cycle(9, j);
+		h2_cycle(10, j);
+		h2_cycle(11, j);
+		h2_cycle(12, j);
+		h2_cycle(13, j);
+		h2_cycle(14, j);
+		h2_cycle(15, j);
+	}
+
+	ctx->hash[0] += v[0];
+	ctx->hash[1] += v[1];
+	ctx->hash[2] += v[2];
+	ctx->hash[3] += v[3];
+	ctx->hash[4] += v[4];
+	ctx->hash[5] += v[5];
+	ctx->hash[6] += v[6];
+	ctx->hash[7] += v[7];
+}
+
+/* SHA256 hash data in an array of bytes into hash buffer   */
+/* and call the hash_compile function as required.          */
+
+void sha256_hash(sha256_ctx ctx[1], const unsigned char data[],
+                 unsigned long len)
+{
+	sha2_32t pos = (sha2_32t)(ctx->count[0] & SHA256_MASK),
+	         space = SHA256_BLOCK_SIZE - pos;
+	const unsigned char *sp = data;
+
+	if ((ctx->count[0] += len) < len)
+		++(ctx->count[1]);
+
+	while (len >= space) { /* tranfer whole blocks while possible  */
+		memcpy(((unsigned char *)ctx->wbuf) + pos, sp, space);
+		sp += space;
+		len -= space;
+		space = SHA256_BLOCK_SIZE;
+		pos = 0;
+		bsw_32(ctx->wbuf, SHA256_BLOCK_SIZE >> 2);
+		sha256_compile(ctx);
+	}
+
+	memcpy(((unsigned char *)ctx->wbuf) + pos, sp, len);
+}
+
+/* SHA256 Final padding and digest calculation  */
+
+static sha2_32t m1[4] = { n_u32(00000000), n_u32(ff000000), n_u32(ffff0000),
+                          n_u32(ffffff00)
+                        };
+
+static sha2_32t b1[4] = { n_u32(80000000), n_u32(00800000), n_u32(00008000),
+                          n_u32(00000080)
+                        };
+
+void sha256_end(sha256_ctx ctx[1], unsigned char hval[])
+{
+	sha2_32t i = (sha2_32t)(ctx->count[0] & SHA256_MASK);
+
+	bsw_32(ctx->wbuf, (i + 3) >> 2)
+	/* bytes in the buffer are now in an order in which references  */
+	/* to 32-bit words will put bytes with lower addresses into the */
+	/* top of 32 bit words on BOTH big and little endian machines   */
+
+	/* we now need to mask valid bytes and add the padding which is */
+	/* a single 1 bit and as many zero bits as necessary.           */
+	ctx->wbuf[i >> 2] = (ctx->wbuf[i >> 2] & m1[i & 3]) | b1[i & 3];
+
+	/* we need 9 or more empty positions, one for the padding byte  */
+	/* (above) and eight for the length count.  If there is not     */
+	/* enough space pad and empty the buffer                        */
+	if (i > SHA256_BLOCK_SIZE - 9) {
+		if (i < 60)
+			ctx->wbuf[15] = 0;
+		sha256_compile(ctx);
+		i = 0;
+	} else /* compute a word index for the empty buffer positions  */
+		i = (i >> 2) + 1;
+
+	while (i < 14) /* and zero pad all but last two positions      */
+		ctx->wbuf[i++] = 0;
+
+	/* the following 32-bit length fields are assembled in the      */
+	/* wrong byte order on little endian machines but this is       */
+	/* corrected later since they are only ever used as 32-bit      */
+	/* word values.                                                 */
+
+	ctx->wbuf[14] = (ctx->count[1] << 3) | (ctx->count[0] >> 29);
+	ctx->wbuf[15] = ctx->count[0] << 3;
+
+	sha256_compile(ctx);
+
+	/* extract the hash value as bytes in case the hash buffer is   */
+	/* mislaigned for 32-bit words                                  */
+	for (i = 0; i < SHA256_DIGEST_SIZE; ++i)
+		hval[i] = (unsigned char)(ctx->hash[i >> 2] >> 8 * (~i & 3));
+}
+
+void sha256(unsigned char hval[], const unsigned char data[],
+            unsigned long len)
+{
+	sha256_ctx cx[1];
+
+	sha256_begin(cx);
+	sha256_hash(cx, data, len);
+	sha256_end(cx, hval);
+}
+
+#endif
+
+#if defined(SHA_2) || defined(SHA_384) || defined(SHA_512)
+
+#define SHA512_MASK (SHA512_BLOCK_SIZE - 1)
+
+#define rotr64(x, n) (((x) >> n) | ((x) << (64 - n)))
+
+#if !defined(bswap_64)
+#define bswap_64(x)                                                            \
+  (((sha2_64t)(bswap_32((sha2_32t)(x)))) << 32 |                               \
+   bswap_32((sha2_32t)((x) >> 32)))
+#endif
+
+#if defined(SWAP_BYTES)
+#define bsw_64(p, n)                                                           \
+  {                                                                            \
+    int _i = (n);                                                              \
+    while (_i--)                                                               \
+      p[_i] = bswap_64(p[_i]);                                                 \
+  }
+#else
+#define bsw_64(p, n)
+#endif
+
+/* SHA512 mixing function definitions   */
+
+#define s512_0(x) (rotr64((x), 28) ^ rotr64((x), 34) ^ rotr64((x), 39))
+#define s512_1(x) (rotr64((x), 14) ^ rotr64((x), 18) ^ rotr64((x), 41))
+#define g512_0(x) (rotr64((x), 1) ^ rotr64((x), 8) ^ ((x) >> 7))
+#define g512_1(x) (rotr64((x), 19) ^ rotr64((x), 61) ^ ((x) >> 6))
+
+/* rotated SHA512 round definition. Rather than swapping variables as in    */
+/* FIPS-180, different variables are 'rotated' on each round, returning     */
+/* to their starting positions every eight rounds                           */
+
+#define h5(i)                                                                  \
+  ctx->wbuf[i & 15] +=                                                         \
+      g512_1(ctx->wbuf[(i + 14) & 15]) + ctx->wbuf[(i + 9) & 15] +             \
+      g512_0(ctx->wbuf[(i + 1) & 15])
+
+#define h5_cycle(i, j)                                                         \
+  v[(7 - i) & 7] +=                                                            \
+      (j ? h5(i) : ctx->wbuf[i & 15]) + k512[i + j] + s512_1(v[(4 - i) & 7]) + \
+      ch(v[(4 - i) & 7], v[(5 - i) & 7], v[(6 - i) & 7]);                      \
+  v[(3 - i) & 7] += v[(7 - i) & 7];                                            \
+  v[(7 - i) & 7] += s512_0(v[(0 - i) & 7]) +                                   \
+                    maj(v[(0 - i) & 7], v[(1 - i) & 7], v[(2 - i) & 7])
+
+/* SHA384/SHA512 mixing data    */
+
+const sha2_64t k512[80] = {
+	n_u64(428a2f98d728ae22), n_u64(7137449123ef65cd), n_u64(b5c0fbcfec4d3b2f),
+	n_u64(e9b5dba58189dbbc), n_u64(3956c25bf348b538), n_u64(59f111f1b605d019),
+	n_u64(923f82a4af194f9b), n_u64(ab1c5ed5da6d8118), n_u64(d807aa98a3030242),
+	n_u64(12835b0145706fbe), n_u64(243185be4ee4b28c), n_u64(550c7dc3d5ffb4e2),
+	n_u64(72be5d74f27b896f), n_u64(80deb1fe3b1696b1), n_u64(9bdc06a725c71235),
+	n_u64(c19bf174cf692694), n_u64(e49b69c19ef14ad2), n_u64(efbe4786384f25e3),
+	n_u64(0fc19dc68b8cd5b5), n_u64(240ca1cc77ac9c65), n_u64(2de92c6f592b0275),
+	n_u64(4a7484aa6ea6e483), n_u64(5cb0a9dcbd41fbd4), n_u64(76f988da831153b5),
+	n_u64(983e5152ee66dfab), n_u64(a831c66d2db43210), n_u64(b00327c898fb213f),
+	n_u64(bf597fc7beef0ee4), n_u64(c6e00bf33da88fc2), n_u64(d5a79147930aa725),
+	n_u64(06ca6351e003826f), n_u64(142929670a0e6e70), n_u64(27b70a8546d22ffc),
+	n_u64(2e1b21385c26c926), n_u64(4d2c6dfc5ac42aed), n_u64(53380d139d95b3df),
+	n_u64(650a73548baf63de), n_u64(766a0abb3c77b2a8), n_u64(81c2c92e47edaee6),
+	n_u64(92722c851482353b), n_u64(a2bfe8a14cf10364), n_u64(a81a664bbc423001),
+	n_u64(c24b8b70d0f89791), n_u64(c76c51a30654be30), n_u64(d192e819d6ef5218),
+	n_u64(d69906245565a910), n_u64(f40e35855771202a), n_u64(106aa07032bbd1b8),
+	n_u64(19a4c116b8d2d0c8), n_u64(1e376c085141ab53), n_u64(2748774cdf8eeb99),
+	n_u64(34b0bcb5e19b48a8), n_u64(391c0cb3c5c95a63), n_u64(4ed8aa4ae3418acb),
+	n_u64(5b9cca4f7763e373), n_u64(682e6ff3d6b2b8a3), n_u64(748f82ee5defb2fc),
+	n_u64(78a5636f43172f60), n_u64(84c87814a1f0ab72), n_u64(8cc702081a6439ec),
+	n_u64(90befffa23631e28), n_u64(a4506cebde82bde9), n_u64(bef9a3f7b2c67915),
+	n_u64(c67178f2e372532b), n_u64(ca273eceea26619c), n_u64(d186b8c721c0c207),
+	n_u64(eada7dd6cde0eb1e), n_u64(f57d4f7fee6ed178), n_u64(06f067aa72176fba),
+	n_u64(0a637dc5a2c898a6), n_u64(113f9804bef90dae), n_u64(1b710b35131c471b),
+	n_u64(28db77f523047d84), n_u64(32caab7b40c72493), n_u64(3c9ebe0a15c9bebc),
+	n_u64(431d67c49c100d4c), n_u64(4cc5d4becb3e42b6), n_u64(597f299cfc657e2a),
+	n_u64(5fcb6fab3ad6faec), n_u64(6c44198c4a475817)
+};
+
+/* Compile 64 bytes of hash data into SHA384/SHA512 digest value  */
+
+void sha512_compile(sha512_ctx ctx[1])
+{
+	sha2_64t v[8];
+	sha2_32t j;
+
+	memcpy(v, ctx->hash, 8 * sizeof(sha2_64t));
+
+	for (j = 0; j < 80; j += 16) {
+		h5_cycle(0, j);
+		h5_cycle(1, j);
+		h5_cycle(2, j);
+		h5_cycle(3, j);
+		h5_cycle(4, j);
+		h5_cycle(5, j);
+		h5_cycle(6, j);
+		h5_cycle(7, j);
+		h5_cycle(8, j);
+		h5_cycle(9, j);
+		h5_cycle(10, j);
+		h5_cycle(11, j);
+		h5_cycle(12, j);
+		h5_cycle(13, j);
+		h5_cycle(14, j);
+		h5_cycle(15, j);
+	}
+
+	ctx->hash[0] += v[0];
+	ctx->hash[1] += v[1];
+	ctx->hash[2] += v[2];
+	ctx->hash[3] += v[3];
+	ctx->hash[4] += v[4];
+	ctx->hash[5] += v[5];
+	ctx->hash[6] += v[6];
+	ctx->hash[7] += v[7];
+}
+
+/* Compile 128 bytes of hash data into SHA256 digest value  */
+/* NOTE: this routine assumes that the byte order in the    */
+/* ctx->wbuf[] at this point is in such an order that low   */
+/* address bytes in the ORIGINAL byte stream placed in this */
+/* buffer will now go to the high end of words on BOTH big  */
+/* and little endian systems                                */
+
+void sha512_hash(sha512_ctx ctx[1], const unsigned char data[],
+                 unsigned long len)
+{
+	sha2_32t pos = (sha2_32t)(ctx->count[0] & SHA512_MASK),
+	         space = SHA512_BLOCK_SIZE - pos;
+	const unsigned char *sp = data;
+
+	if ((ctx->count[0] += len) < len)
+		++(ctx->count[1]);
+
+	while (len >= space) { /* tranfer whole blocks while possible  */
+		memcpy(((unsigned char *)ctx->wbuf) + pos, sp, space);
+		sp += space;
+		len -= space;
+		space = SHA512_BLOCK_SIZE;
+		pos = 0;
+		bsw_64(ctx->wbuf, SHA512_BLOCK_SIZE >> 3);
+		sha512_compile(ctx);
+	}
+
+	memcpy(((unsigned char *)ctx->wbuf) + pos, sp, len);
+}
+
+/* SHA384/512 Final padding and digest calculation  */
+
+static sha2_64t m2[8] = { n_u64(0000000000000000), n_u64(ff00000000000000),
+                          n_u64(ffff000000000000), n_u64(ffffff0000000000),
+                          n_u64(ffffffff00000000), n_u64(ffffffffff000000),
+                          n_u64(ffffffffffff0000), n_u64(ffffffffffffff00)
+                        };
+
+static sha2_64t b2[8] = { n_u64(8000000000000000), n_u64(0080000000000000),
+                          n_u64(0000800000000000), n_u64(0000008000000000),
+                          n_u64(0000000080000000), n_u64(0000000000800000),
+                          n_u64(0000000000008000), n_u64(0000000000000080)
+                        };
+
+static void sha_end(sha512_ctx ctx[1], unsigned char hval[],
+                    const unsigned int hlen)
+{
+	sha2_32t i = (sha2_32t)(ctx->count[0] & SHA512_MASK);
+
+	bsw_64(ctx->wbuf, (i + 7) >> 3);
+
+	/* bytes in the buffer are now in an order in which references  */
+	/* to 64-bit words will put bytes with lower addresses into the */
+	/* top of 64 bit words on BOTH big and little endian machines   */
+
+	/* we now need to mask valid bytes and add the padding which is */
+	/* a single 1 bit and as many zero bits as necessary.           */
+	ctx->wbuf[i >> 3] = (ctx->wbuf[i >> 3] & m2[i & 7]) | b2[i & 7];
+
+	/* we need 17 or more empty byte positions, one for the padding */
+	/* byte (above) and sixteen for the length count.  If there is  */
+	/* not enough space pad and empty the buffer                    */
+	if (i > SHA512_BLOCK_SIZE - 17) {
+		if (i < 120)
+			ctx->wbuf[15] = 0;
+		sha512_compile(ctx);
+		i = 0;
+	} else
+		i = (i >> 3) + 1;
+
+	while (i < 14)
+		ctx->wbuf[i++] = 0;
+
+	/* the following 64-bit length fields are assembled in the      */
+	/* wrong byte order on little endian machines but this is       */
+	/* corrected later since they are only ever used as 64-bit      */
+	/* word values.                                                 */
+
+	ctx->wbuf[14] = (ctx->count[1] << 3) | (ctx->count[0] >> 61);
+	ctx->wbuf[15] = ctx->count[0] << 3;
+
+	sha512_compile(ctx);
+
+	/* extract the hash value as bytes in case the hash buffer is   */
+	/* misaligned for 32-bit words                                  */
+	for (i = 0; i < hlen; ++i)
+		hval[i] = (unsigned char)(ctx->hash[i >> 3] >> 8 * (~i & 7));
+}
+
+#endif
+
+#if defined(SHA_2) || defined(SHA_384)
+
+/* SHA384 initialisation data   */
+
+const sha2_64t i384[80] = { n_u64(cbbb9d5dc1059ed8), n_u64(629a292a367cd507),
+                            n_u64(9159015a3070dd17), n_u64(152fecd8f70e5939),
+                            n_u64(67332667ffc00b31), n_u64(8eb44a8768581511),
+                            n_u64(db0c2e0d64f98fa7), n_u64(47b5481dbefa4fa4)
+                          };
+
+void sha384_begin(sha384_ctx ctx[1])
+{
+	ctx->count[0] = ctx->count[1] = 0;
+	memcpy(ctx->hash, i384, 8 * sizeof(sha2_64t));
+}
+
+void sha384_end(sha384_ctx ctx[1], unsigned char hval[])
+{
+	sha_end(ctx, hval, SHA384_DIGEST_SIZE);
+}
+
+void sha384(unsigned char hval[], const unsigned char data[],
+            unsigned long len)
+{
+	sha384_ctx cx[1];
+
+	sha384_begin(cx);
+	sha384_hash(cx, data, len);
+	sha384_end(cx, hval);
+}
+
+#endif
+
+#if defined(SHA_2) || defined(SHA_512)
+
+/* SHA512 initialisation data   */
+
+const sha2_64t i512[80] = { n_u64(6a09e667f3bcc908), n_u64(bb67ae8584caa73b),
+                            n_u64(3c6ef372fe94f82b), n_u64(a54ff53a5f1d36f1),
+                            n_u64(510e527fade682d1), n_u64(9b05688c2b3e6c1f),
+                            n_u64(1f83d9abfb41bd6b), n_u64(5be0cd19137e2179)
+                          };
+
+void sha512_begin(sha512_ctx ctx[1])
+{
+	ctx->count[0] = ctx->count[1] = 0;
+	memcpy(ctx->hash, i512, 8 * sizeof(sha2_64t));
+}
+
+void sha512_end(sha512_ctx ctx[1], unsigned char hval[])
+{
+	sha_end(ctx, hval, SHA512_DIGEST_SIZE);
+}
+
+void sha512(unsigned char hval[], const unsigned char data[],
+            unsigned long len)
+{
+	sha512_ctx cx[1];
+
+	sha512_begin(cx);
+	sha512_hash(cx, data, len);
+	sha512_end(cx, hval);
+}
+
+#endif
+
+#if defined(SHA_2)
+
+#define CTX_256(x) ((x)->uu->ctx256)
+#define CTX_384(x) ((x)->uu->ctx512)
+#define CTX_512(x) ((x)->uu->ctx512)
+
+/* SHA2 initialisation */
+
+int sha2_begin(sha2_ctx ctx[1], unsigned long len)
+{
+	unsigned long l = len;
+	switch (len) {
+	case 256:
+		l = len >> 3;
+	case 32:
+		CTX_256(ctx)->count[0] = CTX_256(ctx)->count[1] = 0;
+		memcpy(CTX_256(ctx)->hash, i256, 32);
+		break;
+	case 384:
+		l = len >> 3;
+	case 48:
+		CTX_384(ctx)->count[0] = CTX_384(ctx)->count[1] = 0;
+		memcpy(CTX_384(ctx)->hash, i384, 64);
+		break;
+	case 512:
+		l = len >> 3;
+	case 64:
+		CTX_512(ctx)->count[0] = CTX_512(ctx)->count[1] = 0;
+		memcpy(CTX_512(ctx)->hash, i512, 64);
+		break;
+	default:
+		return SHA2_BAD;
+	}
+
+	ctx->sha2_len = l;
+	return SHA2_GOOD;
+}
+
+void sha2_hash(sha2_ctx ctx[1], const unsigned char data[], unsigned long len)
+{
+	switch (ctx->sha2_len) {
+	case 32:
+		sha256_hash(CTX_256(ctx), data, len);
+		return;
+	case 48:
+		sha384_hash(CTX_384(ctx), data, len);
+		return;
+	case 64:
+		sha512_hash(CTX_512(ctx), data, len);
+		return;
+	}
+}
+
+void sha2_end(sha2_ctx ctx[1], unsigned char hval[])
+{
+	switch (ctx->sha2_len) {
+	case 32:
+		sha256_end(CTX_256(ctx), hval);
+		return;
+	case 48:
+		sha_end(CTX_384(ctx), hval, SHA384_DIGEST_SIZE);
+		return;
+	case 64:
+		sha_end(CTX_512(ctx), hval, SHA512_DIGEST_SIZE);
+		return;
+	}
+}
+
+int sha2(unsigned char hval[], unsigned long size, const unsigned char data[],
+         unsigned long len)
+{
+	sha2_ctx cx[1];
+
+	if (sha2_begin(cx, size) == SHA2_GOOD) {
+		sha2_hash(cx, data, len);
+		sha2_end(cx, hval);
+		return SHA2_GOOD;
+	} else
+		return SHA2_BAD;
+}
+
+#endif
diff --git a/tools/rockchip/sha2.h b/tools/rockchip/sha2.h
new file mode 100644
index 0000000000..e6a8bc20aa
--- /dev/null
+++ b/tools/rockchip/sha2.h
@@ -0,0 +1,161 @@
+/*
+ ---------------------------------------------------------------------------
+ Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
+ All rights reserved.
+
+ LICENSE TERMS
+
+ The free distribution and use of this software in both source and binary
+ form is allowed (with or without changes) provided that:
+
+   1. distributions of this source code include the above copyright
+      notice, this list of conditions and the following disclaimer;
+
+   2. distributions in binary form include the above copyright
+      notice, this list of conditions and the following disclaimer
+      in the documentation and/or other associated materials;
+
+   3. the copyright holder's name is not used to endorse products
+      built using this software without specific written permission.
+
+ ALTERNATIVELY, provided that this notice is retained in full, this product
+ may be distributed under the terms of the GNU General Public License (GPL),
+ in which case the provisions of the GPL apply INSTEAD OF those given above.
+
+ DISCLAIMER
+
+ This software is provided 'as is' with no explicit or implied warranties
+ in respect of its properties, including, but not limited to, correctness
+ and/or fitness for purpose.
+ ---------------------------------------------------------------------------
+ Issue Date: 30/11/2002
+*/
+
+#ifndef _SHA2_H
+#define _SHA2_H
+
+#ifdef USE_HOSTCC
+#include <limits.h>
+#endif
+
+/*  Defines for suffixes to 32 and 64 bit unsigned numeric values   */
+
+#define sfx_lo(x,y) x##y
+#define sfx_hi(x,y) sfx_lo(x,y)
+#define n_u32(p)    sfx_hi(0x##p,s_u32)
+#define n_u64(p)    sfx_hi(0x##p,s_u64)
+
+#ifdef USE_HOSTCC
+/* define an unsigned 32-bit type */
+
+#if UINT_MAX == 0xffffffff
+typedef   unsigned int     sha2_32t;
+#define s_u32    u
+#elif ULONG_MAX == 0xffffffff
+typedef   unsigned long    sha2_32t;
+#define s_u32   ul
+#else
+#error Please define sha2_32t as an unsigned 32 bit type in sha2.h
+#endif
+
+/* define an unsigned 64-bit type */
+
+#if defined( _MSC_VER )
+typedef unsigned __int64   sha2_64t;
+#define s_u64 ui64
+#elif ULONG_MAX == 0xffffffffffffffff
+typedef unsigned long      sha2_64t;
+#define s_u64   ul
+#elif ULONG_MAX == 0xffffffff
+typedef unsigned long long sha2_64t;   /* a somewhat dangerous guess */
+#define s_u64  ull
+#else
+#error Please define sha2_64t as an unsigned 64 bit type in sha2.h
+#endif
+
+#else
+#include <common.h>
+
+typedef uint32_t	sha2_32t;
+#define s_u32	u
+
+typedef uint64_t	sha2_64t;   /* a somewhat dangerous guess */
+#define s_u64	ull
+#endif /* USE_HOSTCC */
+
+#if defined(__cplusplus)
+extern "C"
+{
+#endif
+
+#define SHA256_DIGEST_SIZE  32
+#define SHA384_DIGEST_SIZE  48
+#define SHA512_DIGEST_SIZE  64
+
+#define SHA256_BLOCK_SIZE   64
+#define SHA384_BLOCK_SIZE  128
+#define SHA512_BLOCK_SIZE  128
+
+#define SHA2_DIGEST_SIZE        SHA256_DIGEST_SIZE
+#define SHA2_MAX_DIGEST_SIZE    SHA512_DIGEST_SIZE
+
+#define SHA2_GOOD   0
+#define SHA2_BAD    1
+
+	/* type to hold the SHA256 context				*/
+
+	typedef struct {
+		sha2_32t count[2];
+		sha2_32t hash[8];
+		sha2_32t wbuf[16];
+	} sha256_ctx;
+
+	/* type to hold the SHA384/512 context			*/
+
+	typedef struct {
+		sha2_64t count[2];
+		sha2_64t hash[8];
+		sha2_64t wbuf[16];
+	} sha512_ctx;
+
+	typedef sha512_ctx  sha384_ctx;
+
+	/* type to hold a SHA2 context (256/384/512)  */
+
+	typedef struct {
+		union {
+			sha256_ctx  ctx256[1];
+			sha512_ctx  ctx512[1];
+		} uu[1];
+		sha2_32t    sha2_len;
+	} sha2_ctx;
+
+	void sha256_compile(sha256_ctx ctx[1]);
+	void sha512_compile(sha512_ctx ctx[1]);
+
+	void sha256_begin(sha256_ctx ctx[1]);
+	void sha256_hash(sha256_ctx ctx[1], const unsigned char data[], unsigned long len);
+	void sha256_end(sha256_ctx ctx[1], unsigned char hval[]);
+	void sha256(unsigned char hval[], const unsigned char data[], unsigned long len);
+
+	void sha384_begin(sha384_ctx ctx[1]);
+#define sha384_hash sha512_hash
+	void sha384_end(sha384_ctx ctx[1], unsigned char hval[]);
+	void sha384(unsigned char hval[], const unsigned char data[], unsigned long len);
+
+	void sha512_begin(sha512_ctx ctx[1]);
+	void sha512_hash(sha512_ctx ctx[1], const unsigned char data[], unsigned long len);
+	void sha512_end(sha512_ctx ctx[1], unsigned char hval[]);
+	void sha512(unsigned char hval[], const unsigned char data[], unsigned long len);
+
+	int sha2_begin(sha2_ctx ctx[1], unsigned long size);
+	void sha2_hash(sha2_ctx ctx[1], const unsigned char data[], unsigned long len);
+	void sha2_end(sha2_ctx ctx[1], unsigned char hval[]);
+	int sha2(unsigned char hval[], unsigned long size, const unsigned char data[], unsigned long len);
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+#endif
diff --git a/tools/rockchip/trust_merger.c b/tools/rockchip/trust_merger.c
new file mode 100644
index 0000000000..a73ea81f96
--- /dev/null
+++ b/tools/rockchip/trust_merger.c
@@ -0,0 +1,930 @@
+/*
+ * Rockchip trust image generator
+ *
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ * Peter, Software Engineering, <superpeter.cai@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <sys/stat.h>
+#include <u-boot/sha256.h>
+#include "trust_merger.h"
+#include "sha2.h"
+
+/* #define DEBUG */
+
+static bool gDebug =
+#ifdef DEBUG
+        true;
+#else
+        false;
+#endif /* DEBUG */
+
+#define LOGE(fmt, args...) fprintf(stderr, "E: [%s] " fmt, __func__, ##args)
+#define LOGD(fmt, args...)                                                     \
+  do {                                                                         \
+    if (gDebug)                                                                \
+      fprintf(stderr, "D: [%s] " fmt, __func__, ##args);                       \
+  } while (0)
+
+/* trust image has g_trust_max_num backups */
+static uint32_t g_trust_max_num = 2;
+static uint32_t g_trust_max_size = 2 * 1024 * 1024;
+
+/* config sha and rsa */
+#define SHA_SEL_256 3    /* little endian */
+#define SHA_SEL_256_RK 2 /* big endian: only rk3368 need it */
+#define SHA_SEL_160 1
+#define SHA_SEL_NONE 0
+
+#define RSA_SEL_2048_PSS 3 /* only RK3326, PX30, RK3308 */
+#define RSA_SEL_2048 2     /* most platforms except above PSS */
+#define RSA_SEL_1024 1
+#define RSA_SEL_NONE 0
+
+#define is_digit(c) ((c) >= '0' && (c) <= '9')
+
+static char *gConfigPath;
+static OPT_T gOpts;
+#define BL3X_FILESIZE_MAX (512 * 1024)
+static uint8_t gBuf[BL3X_FILESIZE_MAX];
+static bool gSubfix;
+static char *gLegacyPath;
+static char *gNewPath;
+static uint8_t gRSAmode = RSA_SEL_2048;
+static uint8_t gSHAmode = SHA_SEL_256;
+
+const uint8_t gBl3xID[BL_MAX_SEC][4] = { { 'B', 'L', '3', '0' },
+	{ 'B', 'L', '3', '1' },
+	{ 'B', 'L', '3', '2' },
+	{ 'B', 'L', '3', '3' }
+};
+
+static inline uint32_t getBCD(uint16_t value)
+{
+	uint8_t tmp[2] = { 0 };
+	int i;
+	uint32_t ret;
+
+	if (value > 0xFFFF) {
+		return 0;
+	}
+
+	for (i = 0; i < 2; i++) {
+		tmp[i] = (((value / 10) % 10) << 4) | (value % 10);
+		value /= 100;
+	}
+	ret = ((uint16_t)(tmp[1] << 8)) | tmp[0];
+
+	LOGD("ret:%x\n", ret);
+	return ret & 0xFF;
+}
+
+static inline void fixPath(char *path)
+{
+	int i, len = strlen(path);
+	char tmp[MAX_LINE_LEN];
+	char *start, *end;
+
+	for (i = 0; i < len; i++) {
+		if (path[i] == '\\')
+			path[i] = '/';
+		else if (path[i] == '\r' || path[i] == '\n')
+			path[i] = '\0';
+	}
+
+	if (gLegacyPath && gNewPath) {
+		start = strstr(path, gLegacyPath);
+		if (start) {
+			end = start + strlen(gLegacyPath);
+			/* Backup, so tmp can be src for strcat() */
+			strcpy(tmp, end);
+			/* Terminate, so path can be dest for strcat() */
+			*start = '\0';
+			strcat(path, tmp);
+		}
+	}
+}
+
+static bool parseVersion(FILE *file)
+{
+	int d = 0;
+
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MAJOR "=%d", &d) != 1)
+		return false;
+	gOpts.major = (uint16_t) d;
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_MINOR "=%d", &d) != 1)
+		return false;
+	gOpts.minor = (uint16_t) d;
+	LOGD("major:%d, minor:%d\n", gOpts.major, gOpts.minor);
+	return true;
+}
+
+static bool parseBL3x(FILE *file, int bl3x_id)
+{
+	int pos;
+	int sec;
+	char buf[MAX_LINE_LEN];
+	bl_entry_t *pbl3x = NULL;
+
+	if (bl3x_id >= BL_MAX_SEC) {
+		return false;
+	}
+
+	pbl3x = &gOpts.bl3x[bl3x_id];
+
+	/* SEC */
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_SEC "=%d", &sec) != 1) {
+		return false;
+	}
+	if ((gSubfix) && (bl3x_id == BL32_SEC)) {
+		if (sec == 0) {
+			sec = 1;
+			printf("BL3%d adjust sec from 0 to 1\n", bl3x_id);
+		}
+	}
+	pbl3x->sec = sec;
+	LOGD("bl3%d sec: %d\n", bl3x_id, pbl3x->sec);
+
+	/* PATH */
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	memset(buf, 0, MAX_LINE_LEN);
+	if (fscanf(file, OPT_PATH "=%s", buf) != 1) {
+		if (pbl3x->sec)
+			return false;
+	} else {
+		if (strlen(buf) != 0) {
+			fixPath(buf);
+			strcpy(pbl3x->path, buf);
+			LOGD("bl3%d path:%s\n", bl3x_id, pbl3x->path);
+		}
+	}
+
+	/* ADDR */
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	memset(buf, 0, MAX_LINE_LEN);
+	if (fscanf(file, OPT_ADDR "=%s", buf) != 1) {
+		if (pbl3x->sec)
+			return false;
+	} else {
+		if (strlen(buf) != 0) {
+			pbl3x->addr = strtoul(buf, NULL, 16);
+			LOGD("bl3%d addr:0x%x\n", bl3x_id, pbl3x->addr);
+		}
+	}
+
+	pos = ftell(file);
+	if (pos < 0) {
+		return false;
+	}
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+
+	return true;
+}
+
+static bool parseOut(FILE *file)
+{
+	if (SCANF_EAT(file) != 0) {
+		return false;
+	}
+	if (fscanf(file, OPT_OUT_PATH "=%[^\r^\n]", gOpts.outPath) != 1)
+		return false;
+	fixPath(gOpts.outPath);
+	printf("out:%s\n", gOpts.outPath);
+
+	return true;
+}
+
+void printOpts(FILE *out)
+{
+	fprintf(out, SEC_BL30 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL30_SEC].sec);
+	if (gOpts.bl3x[BL30_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL30_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL30_SEC].addr);
+	}
+
+	fprintf(out, SEC_BL31 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL31_SEC].sec);
+	if (gOpts.bl3x[BL31_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL31_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL31_SEC].addr);
+	}
+
+	fprintf(out, SEC_BL32 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL32_SEC].sec);
+	if (gOpts.bl3x[BL32_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL32_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL32_SEC].addr);
+	}
+
+	fprintf(out, SEC_BL33 "\n" OPT_SEC "=%d\n", gOpts.bl3x[BL33_SEC].sec);
+	if (gOpts.bl3x[BL33_SEC].sec) {
+		fprintf(out, OPT_PATH "=%s\n", gOpts.bl3x[BL33_SEC].path);
+		fprintf(out, OPT_ADDR "=0x%08x\n", gOpts.bl3x[BL33_SEC].addr);
+	}
+
+	fprintf(out, SEC_OUT "\n" OPT_OUT_PATH "=%s\n", gOpts.outPath);
+}
+
+static bool parseOpts(void)
+{
+	FILE *file = NULL;
+	char *configPath = (gConfigPath == NULL) ? DEF_CONFIG_FILE : gConfigPath;
+	bool bl30ok = false, bl31ok = false, bl32ok = false, bl33ok = false;
+	bool outOk = false;
+	bool versionOk = false;
+	char buf[MAX_LINE_LEN];
+	bool ret = false;
+
+	file = fopen(configPath, "r");
+	if (!file) {
+		fprintf(stderr, "config(%s) not found!\n", configPath);
+		if (configPath == (char *)DEF_CONFIG_FILE) {
+			file = fopen(DEF_CONFIG_FILE, "w");
+			if (file) {
+				fprintf(stderr, "create defconfig\n");
+				printOpts(file);
+			}
+		}
+		goto end;
+	}
+
+	LOGD("start parse\n");
+
+	if (SCANF_EAT(file) != 0) {
+		goto end;
+	}
+	while (fscanf(file, "%s", buf) == 1) {
+		if (!strcmp(buf, SEC_VERSION)) {
+			versionOk = parseVersion(file);
+			if (!versionOk) {
+				LOGE("parseVersion failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL30)) {
+			bl30ok = parseBL3x(file, BL30_SEC);
+			if (!bl30ok) {
+				LOGE("parseBL30 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL31)) {
+			bl31ok = parseBL3x(file, BL31_SEC);
+			if (!bl31ok) {
+				LOGE("parseBL31 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL32)) {
+			bl32ok = parseBL3x(file, BL32_SEC);
+			if (!bl32ok) {
+				LOGE("parseBL32 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_BL33)) {
+			bl33ok = parseBL3x(file, BL33_SEC);
+			if (!bl33ok) {
+				LOGE("parseBL33 failed!\n");
+				goto end;
+			}
+		} else if (!strcmp(buf, SEC_OUT)) {
+			outOk = parseOut(file);
+			if (!outOk) {
+				LOGE("parseOut failed!\n");
+				goto end;
+			}
+		} else if (buf[0] == '#') {
+			continue;
+		} else {
+			LOGE("unknown sec: %s!\n", buf);
+			goto end;
+		}
+		if (SCANF_EAT(file) != 0) {
+			goto end;
+		}
+	}
+
+	if (bl30ok && bl31ok && bl32ok && bl33ok && outOk)
+		ret = true;
+end:
+	if (file)
+		fclose(file);
+
+	return ret;
+}
+
+bool initOpts(void)
+{
+
+	memset(&gOpts, 0, sizeof(gOpts));
+
+	gOpts.major = DEF_MAJOR;
+	gOpts.minor = DEF_MINOR;
+
+	memcpy(&gOpts.bl3x[BL30_SEC].id, gBl3xID[BL30_SEC], 4);
+	strcpy(gOpts.bl3x[BL30_SEC].path, DEF_BL30_PATH);
+
+	memcpy(&gOpts.bl3x[BL31_SEC].id, gBl3xID[BL31_SEC], 4);
+	strcpy(gOpts.bl3x[BL31_SEC].path, DEF_BL31_PATH);
+
+	memcpy(&gOpts.bl3x[BL32_SEC].id, gBl3xID[BL32_SEC], 4);
+	strcpy(gOpts.bl3x[BL32_SEC].path, DEF_BL32_PATH);
+
+	memcpy(&gOpts.bl3x[BL33_SEC].id, gBl3xID[BL33_SEC], 4);
+	strcpy(gOpts.bl3x[BL33_SEC].path, DEF_BL33_PATH);
+
+	strcpy(gOpts.outPath, DEF_OUT_PATH);
+
+	return parseOpts();
+}
+
+static inline bool getFileSize(const char *path, uint32_t *size)
+{
+	struct stat st;
+
+	if (stat(path, &st) < 0)
+		return false;
+	*size = st.st_size;
+	LOGD("path:%s, size:%d\n", path, *size);
+	return true;
+}
+
+void fill_file(FILE *file, char ch, uint32_t fill_size)
+{
+	uint8_t fill_buffer[1024];
+	uint32_t cur_write;
+
+	memset(fill_buffer, ch, 1024);
+	while (fill_size > 0) {
+		cur_write = (fill_size >= 1024) ? 1024 : fill_size;
+		fwrite(fill_buffer, 1, cur_write, file);
+		fill_size -= cur_write;
+	}
+}
+
+bool filter_elf(uint32_t index, uint8_t *pMeta, uint32_t *pMetaNum,
+                bool *bElf)
+{
+	bool ret = false;
+	FILE *file = NULL;
+	uint8_t *file_buffer = NULL;
+	uint32_t file_size, read_size, i;
+	Elf32_Ehdr *pElfHeader32;
+	Elf32_Phdr *pElfProgram32;
+	Elf64_Ehdr *pElfHeader64;
+	Elf64_Phdr *pElfProgram64;
+	bl_entry_t *pEntry = (bl_entry_t *)(pMeta + sizeof(bl_entry_t) * (*pMetaNum));
+	LOGD("index=%d,file=%s\n", index, gOpts.bl3x[index].path);
+
+	if (!getFileSize(gOpts.bl3x[index].path, &file_size))
+		goto exit_fileter_elf;
+	file = fopen(gOpts.bl3x[index].path, "rb");
+	if (!file) {
+		LOGE("open file(%s) failed\n", gOpts.bl3x[index].path);
+		goto exit_fileter_elf;
+	}
+	file_buffer = malloc(file_size);
+	if (!file_buffer)
+		goto exit_fileter_elf;
+	read_size = fread(file_buffer, 1, file_size, file);
+	if (read_size != file_size)
+		goto exit_fileter_elf;
+
+	if (*((uint32_t *)file_buffer) != ELF_MAGIC) {
+		ret = true;
+		*bElf = false;
+		goto exit_fileter_elf;
+	}
+	*bElf = true;
+	if (file_buffer[5] != 1) { /* only support little endian */
+		goto exit_fileter_elf;
+	}
+	if (*((uint16_t *)(file_buffer + EI_NIDENT)) !=
+	    2) { /* only support executable case */
+		goto exit_fileter_elf;
+	}
+
+	if (file_buffer[4] == 2) {
+		pElfHeader64 = (Elf64_Ehdr *)file_buffer;
+		for (i = 0; i < pElfHeader64->e_phnum; i++) {
+			pElfProgram64 = (Elf64_Phdr *)(file_buffer + pElfHeader64->e_phoff +
+			                               i * pElfHeader64->e_phentsize);
+			if (pElfProgram64->p_type == 1) { /* PT_LOAD */
+				pEntry->id = gOpts.bl3x[index].id;
+				strcpy(pEntry->path, gOpts.bl3x[index].path);
+				pEntry->size = (uint32_t) pElfProgram64->p_filesz;
+				pEntry->offset = (uint32_t) pElfProgram64->p_offset;
+				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
+				pEntry->addr = (uint32_t) pElfProgram64->p_vaddr;
+				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
+					LOGE("elf_file %s too large,segment=%d.\n", pEntry->path, i);
+					goto exit_fileter_elf;
+				}
+				LOGD("bl3%d: filesize = %d, imagesize = %d, segment=%d\n", index,
+				     pEntry->size, pEntry->align_size, i);
+				pEntry++;
+				(*pMetaNum)++;
+			}
+		}
+
+	} else {
+		pElfHeader32 = (Elf32_Ehdr *)file_buffer;
+		for (i = 0; i < pElfHeader32->e_phnum; i++) {
+			pElfProgram32 = (Elf32_Phdr *)(file_buffer + pElfHeader32->e_phoff +
+			                               i * pElfHeader32->e_phentsize);
+			if (pElfProgram32->p_type == 1) { /* PT_LOAD */
+				pEntry->id = gOpts.bl3x[index].id;
+				strcpy(pEntry->path, gOpts.bl3x[index].path);
+				pEntry->size = pElfProgram32->p_filesz;
+				pEntry->offset = pElfProgram32->p_offset;
+				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
+				pEntry->addr = pElfProgram32->p_vaddr;
+				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
+					LOGE("elf_file %s too large,segment=%d.\n", pEntry->path, i);
+					goto exit_fileter_elf;
+				}
+				LOGD("bl3%d: filesize = %d, imagesize = %d, segment=%d\n", index,
+				     pEntry->size, pEntry->align_size, i);
+				pEntry++;
+				(*pMetaNum)++;
+			}
+		}
+	}
+	ret = true;
+exit_fileter_elf:
+	if (file)
+		fclose(file);
+	if (file_buffer)
+		free(file_buffer);
+	return ret;
+}
+
+#define SHA256_CHECK_SZ ((uint32_t)(256 * 1024))
+static bool bl3xHash256(uint8_t *pHash, uint8_t *pData, uint32_t nDataSize)
+{
+	uint32_t nHashSize, nHasHashSize;
+
+	if (!pHash || !pData || !nDataSize) {
+		return false;
+	}
+
+	nHasHashSize = 0;
+
+	if (gSHAmode == SHA_SEL_256_RK) {
+		sha256_ctx ctx;
+
+		sha256_begin(&ctx);
+		while (nDataSize > 0) {
+			nHashSize = (nDataSize >= SHA256_CHECK_SZ) ? SHA256_CHECK_SZ : nDataSize;
+			sha256_hash(&ctx, pData + nHasHashSize, nHashSize);
+			nHasHashSize += nHashSize;
+			nDataSize -= nHashSize;
+		}
+		sha256_end(&ctx, pHash);
+	} else {
+		sha256_context ctx;
+
+		sha256_starts(&ctx);
+		while (nDataSize > 0) {
+			nHashSize = (nDataSize >= SHA256_CHECK_SZ) ? SHA256_CHECK_SZ : nDataSize;
+			sha256_update(&ctx, pData + nHasHashSize, nHashSize);
+			nHasHashSize += nHashSize;
+			nDataSize -= nHashSize;
+		}
+		sha256_finish(&ctx, pHash);
+	}
+	return true;
+}
+
+static bool mergetrust(void)
+{
+	FILE *outFile = NULL;
+	uint32_t OutFileSize;
+	uint32_t SrcFileNum, SignOffset, nComponentNum;
+	TRUST_HEADER *pHead = NULL;
+	COMPONENT_DATA *pComponentData = NULL;
+	TRUST_COMPONENT *pComponent = NULL;
+	bool ret = false, bElf;
+	uint32_t i, n;
+	uint8_t *outBuf = NULL, *pbuf = NULL, *pMetaBuf = NULL;
+	bl_entry_t *pEntry = NULL;
+	if (!initOpts())
+		return false;
+
+	if (gDebug) {
+		printf("---------------\nUSING CONFIG:\n");
+		printOpts(stdout);
+		printf("---------------\n\n");
+	}
+	pMetaBuf = malloc(sizeof(bl_entry_t) * 32);
+	if (!pMetaBuf) {
+		LOGE("Merge trust image: malloc buffer error.\n");
+		goto end;
+	}
+
+	nComponentNum = SrcFileNum = 0;
+	for (i = BL30_SEC; i < BL_MAX_SEC; i++) {
+		if (gOpts.bl3x[i].sec) {
+			if (!filter_elf(i, pMetaBuf, &nComponentNum, &bElf)) {
+				LOGE("filter_elf %s file failed\n", gOpts.bl3x[i].path);
+				goto end;
+			}
+			if (!bElf) {
+				pEntry = (bl_entry_t *)(pMetaBuf + sizeof(bl_entry_t) * nComponentNum);
+				pEntry->id = gOpts.bl3x[i].id;
+				strcpy(pEntry->path, gOpts.bl3x[i].path);
+				getFileSize(pEntry->path, &pEntry->size);
+				pEntry->offset = 0;
+				pEntry->align_size = DO_ALIGN(pEntry->size, ENTRY_ALIGN);
+				pEntry->addr = gOpts.bl3x[i].addr;
+				if (pEntry->align_size > BL3X_FILESIZE_MAX) {
+					LOGE("file %s too large.\n", gOpts.bl3x[i].path);
+					goto end;
+				}
+				LOGD("bl3%d: filesize = %d, imagesize = %d\n", i, pEntry->size,
+				     pEntry->align_size);
+				pEntry++;
+				nComponentNum++;
+			}
+
+		}
+	}
+	LOGD("bl3x bin sec = %d\n", nComponentNum);
+
+	/* 2048bytes for head */
+	memset(gBuf, 0, TRUST_HEADER_SIZE);
+
+	/* Trust Head */
+	pHead = (TRUST_HEADER *)gBuf;
+	memcpy(&pHead->tag, TRUST_HEAD_TAG, 4);
+	pHead->version = (getBCD(gOpts.major) << 8) | getBCD(gOpts.minor);
+	pHead->flags = 0;
+	pHead->flags |= (gSHAmode << 0);
+	pHead->flags |= (gRSAmode << 4);
+
+	SignOffset = sizeof(TRUST_HEADER) + nComponentNum * sizeof(COMPONENT_DATA);
+	LOGD("trust bin sign offset = %d\n", SignOffset);
+	pHead->size = (nComponentNum << 16) | (SignOffset >> 2);
+
+	pComponent = (TRUST_COMPONENT *)(gBuf + SignOffset + SIGNATURE_SIZE);
+	pComponentData = (COMPONENT_DATA *)(gBuf + sizeof(TRUST_HEADER));
+
+	OutFileSize = TRUST_HEADER_SIZE;
+	pEntry = (bl_entry_t *)pMetaBuf;
+	for (i = 0; i < nComponentNum; i++) {
+		/* bl3x load and run address */
+		pComponentData->LoadAddr = pEntry->addr;
+
+		pComponent->ComponentID = pEntry->id;
+		pComponent->StorageAddr = (OutFileSize >> 9);
+		pComponent->ImageSize = (pEntry->align_size >> 9);
+
+		LOGD("bl3%c: LoadAddr = 0x%08x, StorageAddr = %d, ImageSize = %d\n",
+		     (char)((pEntry->id & 0xFF000000) >> 24), pComponentData->LoadAddr,
+		     pComponent->StorageAddr, pComponent->ImageSize);
+
+		OutFileSize += pEntry->align_size;
+		pComponentData++;
+		pComponent++;
+		pEntry++;
+	}
+
+	/* create out file */
+	outFile = fopen(gOpts.outPath, "wb+");
+	if (!outFile) {
+		LOGE("open out file(%s) failed\n", gOpts.outPath);
+
+		outFile = fopen(DEF_OUT_PATH, "wb");
+		if (!outFile) {
+			LOGE("open default out file:%s failed!\n", DEF_OUT_PATH);
+			goto end;
+		}
+	}
+
+	/* 0 for g_trust_max_num backups */
+#if 0
+	/* save trust head to out file */
+	if (!fwrite(gBuf, TRUST_HEADER_SIZE, 1, outFile))
+		goto end;
+
+	/* save trust bl3x bin */
+	for (i = BL30_SEC; i < BL_MAX_SEC; i++) {
+		if (gOpts.bl3x[i].sec) {
+			FILE *inFile = fopen(gOpts.bl3x[i].path, "rb");
+			if (!inFile)
+				goto end;
+
+			memset(gBuf, 0, imagesize[i]);
+			if (!fread(gBuf, filesize[i], 1, inFile))
+				goto end;
+			fclose(inFile);
+
+			if (!fwrite(gBuf, imagesize[i], 1, outFile))
+				goto end;
+		}
+	}
+#else
+	/* check bin size */
+	if (OutFileSize > g_trust_max_size) {
+		LOGE("Merge trust image: trust bin size overfull.\n");
+		goto end;
+	}
+
+	/* malloc buffer */
+	pbuf = outBuf = calloc(g_trust_max_size, g_trust_max_num);
+	if (!outBuf) {
+		LOGE("Merge trust image: calloc buffer error.\n");
+		goto end;
+	}
+	memset(outBuf, 0, (g_trust_max_size * g_trust_max_num));
+
+	/* save trust head data */
+	memcpy(pbuf, gBuf, TRUST_HEADER_SIZE);
+	pbuf += TRUST_HEADER_SIZE;
+
+	uint8_t *pHashData = NULL;
+	pComponentData = (COMPONENT_DATA *)(outBuf + sizeof(TRUST_HEADER));
+
+	/* save trust bl3x bin */
+	pEntry = (bl_entry_t *)pMetaBuf;
+	for (i = 0; i < nComponentNum; i++) {
+		FILE *inFile = fopen(pEntry->path, "rb");
+		if (!inFile)
+			goto end;
+
+		memset(gBuf, 0, pEntry->align_size);
+		fseek(inFile, pEntry->offset, SEEK_SET);
+		if (!fread(gBuf, pEntry->size, 1, inFile))
+			goto end;
+		fclose(inFile);
+
+		/* bl3x bin hash256 */
+		pHashData = (uint8_t *)&pComponentData->HashData[0];
+		bl3xHash256(pHashData, gBuf, pEntry->align_size);
+		memcpy(pbuf, gBuf, pEntry->align_size);
+
+		pComponentData++;
+		pbuf += pEntry->align_size;
+		pEntry++;
+	}
+
+	/* copy other (g_trust_max_num - 1) backup bin */
+	for (n = 1; n < g_trust_max_num; n++) {
+		memcpy(outBuf + g_trust_max_size * n, outBuf, g_trust_max_size);
+	}
+
+	/* save date to file */
+	if (!fwrite(outBuf, g_trust_max_size * g_trust_max_num, 1, outFile)) {
+		LOGE("Merge trust image: write file error.\n");
+		goto end;
+	}
+#endif
+
+	ret = true;
+
+end:
+	/*
+		for (i = BL30_SEC; i < BL_MAX_SEC; i++) {
+			if (gOpts.bl3x[i].sec != false) {
+				if (gOpts.bl3x[i].is_elf) {
+					if (stat(gOpts.bl3x[i].path, &st) >= 0)
+						remove(gOpts.bl3x[i].path);
+				}
+			}
+		}
+	*/
+	if (pMetaBuf)
+		free(pMetaBuf);
+	if (outBuf)
+		free(outBuf);
+	if (outFile)
+		fclose(outFile);
+	return ret;
+}
+
+static int saveDatatoFile(char *FileName, void *pBuf, uint32_t size)
+{
+	FILE *OutFile = NULL;
+	int ret = -1;
+
+	OutFile = fopen(FileName, "wb");
+	if (!OutFile) {
+		printf("open OutPutFlie:%s failed!\n", FileName);
+		goto end;
+	}
+	if (1 != fwrite(pBuf, size, 1, OutFile)) {
+		printf("write output file failed!\n");
+		goto end;
+	}
+
+	ret = 0;
+end:
+	if (OutFile)
+		fclose(OutFile);
+
+	return ret;
+}
+
+static bool unpacktrust(char *path)
+{
+	FILE *FileSrc = NULL;
+	uint32_t FileSize;
+	uint8_t *pBuf = NULL;
+	uint32_t SrcFileNum, SignOffset;
+	TRUST_HEADER *pHead = NULL;
+	COMPONENT_DATA *pComponentData = NULL;
+	TRUST_COMPONENT *pComponent = NULL;
+	char str[MAX_LINE_LEN];
+	bool ret = false;
+	uint32_t i;
+
+	FileSrc = fopen(path, "rb");
+	if (FileSrc == NULL) {
+		printf("open %s failed!\n", path);
+		goto end;
+	}
+
+	if (getFileSize(path, &FileSize) == false) {
+		printf("File Size failed!\n");
+		goto end;
+	}
+	printf("File Size = %d\n", FileSize);
+
+	pBuf = (uint8_t *)malloc(FileSize);
+	if (1 != fread(pBuf, FileSize, 1, FileSrc)) {
+		printf("read input file failed!\n");
+		goto end;
+	}
+
+	pHead = (TRUST_HEADER *)pBuf;
+
+	memcpy(str, &pHead->tag, 4);
+	str[4] = '\0';
+	printf("Header Tag:%s\n", str);
+	printf("Header version:%d\n", pHead->version);
+	printf("Header flag:%d\n", pHead->flags);
+
+	SrcFileNum = (pHead->size >> 16) & 0xffff;
+	SignOffset = (pHead->size & 0xffff) << 2;
+	printf("SrcFileNum:%d\n", SrcFileNum);
+	printf("SignOffset:%d\n", SignOffset);
+
+	pComponent = (TRUST_COMPONENT *)(pBuf + SignOffset + SIGNATURE_SIZE);
+	pComponentData = (COMPONENT_DATA *)(pBuf + sizeof(TRUST_HEADER));
+
+	for (i = 0; i < SrcFileNum; i++) {
+		printf("Component %d:\n", i);
+
+		memcpy(str, &pComponent->ComponentID, 4);
+		str[4] = '\0';
+		printf("ComponentID:%s\n", str);
+		printf("StorageAddr:0x%x\n", pComponent->StorageAddr);
+		printf("ImageSize:0x%x\n", pComponent->ImageSize);
+		printf("LoadAddr:0x%x\n", pComponentData->LoadAddr);
+
+		saveDatatoFile(str, pBuf + (pComponent->StorageAddr << 9),
+		               pComponent->ImageSize << 9);
+
+		pComponentData++;
+		pComponent++;
+	}
+
+	ret = true;
+end:
+	if (FileSrc)
+		fclose(FileSrc);
+	if (pBuf)
+		free(pBuf);
+
+	return ret;
+}
+
+static void printHelp(void)
+{
+	printf("Usage: trust_merger [options]... FILE\n");
+	printf(
+	        "Merge or unpack Rockchip's trust image (Default action is to merge.)\n");
+	printf("Options:\n");
+	printf("\t" OPT_MERGE "\t\t\tMerge trust with specified config.\n");
+	printf("\t" OPT_UNPACK "\t\tUnpack specified trust to current dir.\n");
+	printf("\t" OPT_VERBOSE "\t\tDisplay more runtime informations.\n");
+	printf("\t" OPT_HELP "\t\t\tDisplay this information.\n");
+	printf("\t" OPT_VERSION "\t\tDisplay version information.\n");
+	printf("\t" OPT_SUBFIX "\t\tSpec subfix.\n");
+	printf("\t" OPT_REPLACE "\t\tReplace some part of binary path.\n");
+	printf("\t" OPT_RSA "\t\t\tRSA mode.\"--rsa [mode]\", [mode] can be: "
+	       "0(none), 1(1024), 2(2048), 3(2048 pss).\n");
+	printf("\t" OPT_SHA
+	       "\t\t\tSHA mode.\"--sha [mode]\", [mode] can be: 0(none), 1(160), "
+	       "2(256 RK big endian), 3(256 little endian).\n");
+	printf("\t" OPT_SIZE "\t\t\tTrustImage size.\"--size [per image KB size] "
+	       "[copy count]\", per image must be 64KB aligned\n");
+}
+
+int main(int argc, char **argv)
+{
+	bool merge = true;
+	char *optPath = NULL;
+	int i;
+
+	gConfigPath = NULL;
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(OPT_VERBOSE, argv[i])) {
+			gDebug = true;
+		} else if (!strcmp(OPT_HELP, argv[i])) {
+			printHelp();
+			return 0;
+		} else if (!strcmp(OPT_VERSION, argv[i])) {
+			printf("trust_merger (cwz@rock-chips.com)\t" VERSION "\n");
+			return 0;
+		} else if (!strcmp(OPT_MERGE, argv[i])) {
+			merge = true;
+		} else if (!strcmp(OPT_UNPACK, argv[i])) {
+			merge = false;
+		} else if (!strcmp(OPT_SUBFIX, argv[i])) {
+			gSubfix = true;
+			printf("trust_merger: Spec subfix!\n");
+		} else if (!strcmp(OPT_REPLACE, argv[i])) {
+			i++;
+			gLegacyPath = argv[i];
+			i++;
+			gNewPath = argv[i];
+		} else if (!strcmp(OPT_RSA, argv[i])) {
+			i++;
+			if (!is_digit(*(argv[i]))) {
+				printHelp();
+				return -1;
+			}
+			gRSAmode = *(argv[i]) - '0';
+			LOGD("rsa mode:%d\n", gRSAmode);
+		} else if (!strcmp(OPT_SHA, argv[i])) {
+			i++;
+			if (!is_digit(*(argv[i]))) {
+				printHelp();
+				return -1;
+			}
+			gSHAmode = *(argv[i]) - '0';
+			LOGD("sha mode:%d\n", gSHAmode);
+		} else if (!strcmp(OPT_SIZE, argv[i])) {
+			/* Per trust image size */
+			g_trust_max_size = strtoul(argv[++i], NULL, 10);
+			/*
+			 * Usually, it must be at 512kb align due to preloader
+			 * detects every 512kb. But some product has critial
+			 * flash size requirement, we have to make it small than
+			 * 512KB.
+			 */
+			if (g_trust_max_size % 64) {
+				printHelp();
+				return -1;
+			}
+			g_trust_max_size *= 1024; /* bytes */
+
+			/* Total backup numbers */
+			g_trust_max_num = strtoul(argv[++i], NULL, 10);
+		} else {
+			if (optPath) {
+				fprintf(stderr, "only need one path arg, but we have:\n%s\n%s.\n",
+				        optPath, argv[i]);
+				printHelp();
+				return -1;
+			}
+			optPath = argv[i];
+		}
+	}
+	if (!merge && !optPath) {
+		fprintf(stderr, "need set out path to unpack!\n");
+		printHelp();
+		return -1;
+	}
+
+	if (merge) {
+		LOGD("do_merge\n");
+		gConfigPath = optPath;
+		if (!mergetrust()) {
+			fprintf(stderr, "merge failed!\n");
+			return -1;
+		}
+		printf("merge success(%s)\n", gOpts.outPath);
+	} else {
+		LOGD("do_unpack\n");
+		if (!unpacktrust(optPath)) {
+			fprintf(stderr, "unpack failed!\n");
+			return -1;
+		}
+		printf("unpack success\n");
+	}
+
+	return 0;
+}
diff --git a/tools/rockchip/trust_merger.h b/tools/rockchip/trust_merger.h
new file mode 100644
index 0000000000..42628fe09f
--- /dev/null
+++ b/tools/rockchip/trust_merger.h
@@ -0,0 +1,185 @@
+/*
+ * Rockchip trust image generator
+ *
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ * Peter, Software Engineering, <superpeter.cai@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TRUST_MERGER_H
+#define TRUST_MERGER_H
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <memory.h>
+#include <stdbool.h>
+
+
+#define VERSION             "v1.0 (2015-06-15)"
+#define DO_ALIGN(a, b)	(((a) > 0) ? ((((a) - 1) / (b) + 1) * (b)) : (a))
+
+
+/* config file */
+#define SEC_VERSION         "[VERSION]"
+#define SEC_BL30            "[BL30_OPTION]"
+#define SEC_BL31            "[BL31_OPTION]"
+#define SEC_BL32            "[BL32_OPTION]"
+#define SEC_BL33            "[BL33_OPTION]"
+#define SEC_OUT             "[OUTPUT]"
+
+#define OPT_MAJOR           "MAJOR"
+#define OPT_MINOR           "MINOR"
+#define OPT_SEC             "SEC"
+#define OPT_PATH            "PATH"
+#define OPT_ADDR            "ADDR"
+#define OPT_OUT_PATH        "PATH"
+
+/* options */
+#define OPT_VERBOSE         "--verbose"
+#define OPT_HELP            "--help"
+#define OPT_VERSION         "--version"
+#define OPT_MERGE           "--pack"
+#define OPT_UNPACK          "--unpack"
+#define OPT_SUBFIX          "--subfix"
+#define OPT_REPLACE         "--replace"
+#define OPT_RSA		    "--rsa"
+#define OPT_SHA		    "--sha"
+#define OPT_SIZE	    "--size"
+
+#define DEF_MAJOR           0
+#define DEF_MINOR           0
+#define DEF_BL30_PATH       "bl30.bin"
+#define DEF_BL31_PATH       "bl31.bin"
+#define DEF_BL32_PATH       "bl32.bin"
+#define DEF_BL33_PATH       "bl33.bin"
+
+#define DEF_OUT_PATH        "trust.img"
+
+#define DEF_CONFIG_FILE     "RKTRUST.ini"
+
+
+#define MAX_LINE_LEN        256
+#define SCANF_EAT(in)       fscanf(in, "%*[ \r\n\t/]")
+
+#define ENTRY_ALIGN         (2048)
+
+enum {
+	BL30_SEC = 0,
+	BL31_SEC,
+	BL32_SEC,
+	BL33_SEC,
+	BL_MAX_SEC
+};
+
+
+
+typedef struct {
+	bool		sec;
+	uint32_t	id;
+	char		path[MAX_LINE_LEN];
+	uint32_t	addr;
+	uint32_t	offset;
+	uint32_t	size;
+	uint32_t	align_size;
+} bl_entry_t;
+
+typedef struct {
+	uint16_t	major;
+	uint16_t	minor;
+	bl_entry_t	bl3x[BL_MAX_SEC];
+	char	outPath[MAX_LINE_LEN];
+} OPT_T;
+
+
+#define TRUST_HEAD_TAG			"BL3X"
+#define SIGNATURE_SIZE			256
+#define TRUST_HEADER_SIZE		2048
+
+typedef struct {
+	uint32_t tag;
+	uint32_t version;
+	uint32_t flags;
+	uint32_t size;
+	uint32_t reserved[4];
+	uint32_t RSA_N[64];
+	uint32_t RSA_E[64];
+	uint32_t RSA_C[64];
+} TRUST_HEADER, *PTRUST_HEADER;
+
+
+typedef struct {
+	uint32_t HashData[8];
+	uint32_t LoadAddr;
+	uint32_t reserved[3];
+} COMPONENT_DATA, *PCOMPONENT_DATA;
+
+
+typedef struct {
+	uint32_t ComponentID;
+	uint32_t StorageAddr;
+	uint32_t ImageSize;
+	uint32_t reserved;
+} TRUST_COMPONENT, *PTRUST_COMPONENT;
+
+#define EI_NIDENT	16
+#define ELF_MAGIC 0x464c457f
+
+typedef struct {
+	uint8_t	e_ident[EI_NIDENT];
+	uint16_t	e_type;
+	uint16_t	e_machine;
+	uint32_t	e_version;
+	uint32_t	e_entry;  /* Entry point */
+	uint32_t	e_phoff;
+	uint32_t	e_shoff;
+	uint32_t	e_flags;
+	uint16_t	e_ehsize;
+	uint16_t	e_phentsize;
+	uint16_t	e_phnum;
+	uint16_t	e_shentsize;
+	uint16_t	e_shnum;
+	uint16_t	e_shstrndx;
+} Elf32_Ehdr;
+
+typedef struct {
+	uint8_t	e_ident[EI_NIDENT];	/* ELF "magic number" */
+	uint16_t e_type;
+	uint16_t e_machine;
+	uint32_t e_version;
+	uint64_t e_entry;		/* Entry point virtual address */
+	uint64_t e_phoff;		/* Program header table file offset */
+	uint64_t e_shoff;		/* Section header table file offset */
+	uint32_t e_flags;
+	uint16_t e_ehsize;
+	uint16_t e_phentsize;
+	uint16_t e_phnum;
+	uint16_t e_shentsize;
+	uint16_t e_shnum;
+	uint16_t e_shstrndx;
+} Elf64_Ehdr;
+
+typedef struct {
+	uint32_t	p_type;
+	uint32_t	p_offset;
+	uint32_t	p_vaddr;
+	uint32_t	p_paddr;
+	uint32_t	p_filesz;
+	uint32_t	p_memsz;
+	uint32_t	p_flags;
+	uint32_t	p_align;
+} Elf32_Phdr;
+
+typedef struct {
+	uint32_t p_type;
+	uint32_t p_flags;
+	uint64_t p_offset;		/* Segment file offset */
+	uint64_t p_vaddr;		/* Segment virtual address */
+	uint64_t p_paddr;		/* Segment physical address */
+	uint64_t p_filesz;		/* Segment size in file */
+	uint64_t p_memsz;		/* Segment size in memory */
+	uint64_t p_align;		/* Segment alignment, file & memory */
+} Elf64_Phdr;
+
+#endif /* TRUST_MERGER_H */

commit bbef4bcaa1ec3a7f024062f813105f936b71bbdd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 26 17:00:15 2018 +0800

    sysreset: use psci sysreset as primary for rockchip platforms
    
    "rockchip_reset" is applied if PSCI is not enabled.
    
    Change-Id: Id219bf6d4c5d75e2b35af41b42ee0fc718800b68
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 3b100df3b9..76fcd3165a 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -5,7 +5,9 @@
 #
 
 obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
+endif
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 0747c52b60..489f80fd48 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -30,6 +30,20 @@ int sysreset_walk(enum sysreset_t type)
 	struct udevice *dev;
 	int ret = -ENOSYS;
 
+	/*
+	 * Use psci sysreset as primary for rockchip platforms,
+	 * "rockchip_reset" is applied if PSCI is disabled.
+	 */
+#if !defined(CONFIG_TPL_BUILD) && \
+     defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_SYSRESET_PSCI)
+	ret = uclass_get_device_by_driver(UCLASS_SYSRESET,
+					  DM_GET_DRIVER(psci_sysreset), &dev);
+	if (!ret)
+		sysreset_request(dev, type);
+	else
+		printf("WARN: PSCI sysreset is disabled\n");
+#endif
+
 	while (ret != -EINPROGRESS && type < SYSRESET_COUNT) {
 		for (uclass_first_device(UCLASS_SYSRESET, &dev);
 		     dev;

commit aeed442f965911ae61129982d7bb5f34b2bde1cf
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Sep 19 17:37:03 2018 +0800

    thermal: support rockchip thermal drivers
    
    Create driver to support all Rockchip SoCs tsadc get temp.
    Example of usage:
            struct udevice *thermal;
            int *temp = 0;
    
            ret = uclass_get_device(UCLASS_THERMAL, 0, &thermal);
            thermal_get_temp(thermal, temp);
    
    Change-Id: Ie63d3832c2186b4197215a670903d49046ed722a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 886f5fa546..daa36d5b7e 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -17,4 +17,10 @@ config IMX_THERMAL
           cpufreq is used as the cooling device to throttle CPUs when the
           passive trip is crossed.
 
+config ROCKCHIP_THERMAL
+	bool "Temperature sensor driver for Rockchip SoCs"
+	depends on CLK
+	help
+	  Support for Temperature Monitor (TEMPMON) found on Rockchip SoCs.
+
 endif # if DM_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index d768f5ef80..05f60926ac 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -7,3 +7,4 @@
 
 obj-$(CONFIG_DM_THERMAL) += thermal-uclass.o
 obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
+obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
new file mode 100644
index 0000000000..e826d5e12f
--- /dev/null
+++ b/drivers/thermal/rockchip_thermal.c
@@ -0,0 +1,1096 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <thermal.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <div64.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <clk.h>
+#include <clk-uclass.h>
+#include <reset.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * If the temperature over a period of time High,
+ * the resulting TSHUT gave CRU module,let it reset the entire chip,
+ * or via GPIO give PMIC.
+ */
+enum tshut_mode {
+	TSHUT_MODE_CRU = 0,
+	TSHUT_MODE_GPIO,
+};
+
+/**
+ * The system Temperature Sensors tshut(tshut) polarity
+ * the bit 8 is tshut polarity.
+ * 0: low active, 1: high active
+ */
+enum tshut_polarity {
+	TSHUT_LOW_ACTIVE = 0,
+	TSHUT_HIGH_ACTIVE,
+};
+
+/**
+ * The conversion table has the adc value and temperature.
+ * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
+ * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
+ */
+enum adc_sort_mode {
+	ADC_DECREMENT = 0,
+	ADC_INCREMENT,
+};
+
+#define SOC_MAX_SENSORS				2
+
+#define TSADCV2_USER_CON			0x00
+#define TSADCV2_AUTO_CON			0x04
+#define TSADCV2_INT_EN				0x08
+#define TSADCV2_INT_PD				0x0c
+#define TSADCV2_DATA(chn)			(0x20 + (chn) * 0x04)
+#define TSADCV2_COMP_INT(chn)		        (0x30 + (chn) * 0x04)
+#define TSADCV2_COMP_SHUT(chn)		        (0x40 + (chn) * 0x04)
+#define TSADCV2_HIGHT_INT_DEBOUNCE		0x60
+#define TSADCV2_HIGHT_TSHUT_DEBOUNCE		0x64
+#define TSADCV2_AUTO_PERIOD			0x68
+#define TSADCV2_AUTO_PERIOD_HT			0x6c
+
+#define TSADCV2_AUTO_EN				BIT(0)
+#define TSADCV2_AUTO_SRC_EN(chn)		BIT(4 + (chn))
+#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH	BIT(8)
+
+#define TSADCV3_AUTO_Q_SEL_EN			BIT(1)
+
+#define TSADCV2_INT_SRC_EN(chn)			BIT(chn)
+#define TSADCV2_SHUT_2GPIO_SRC_EN(chn)		BIT(4 + (chn))
+#define TSADCV2_SHUT_2CRU_SRC_EN(chn)		BIT(8 + (chn))
+
+#define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
+#define TSADCV3_INT_PD_CLEAR_MASK		~BIT(16)
+
+#define TSADCV2_DATA_MASK			0xfff
+#define TSADCV3_DATA_MASK			0x3ff
+
+#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
+#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
+#define TSADCV2_AUTO_PERIOD_TIME		250
+#define TSADCV2_AUTO_PERIOD_HT_TIME		50
+#define TSADCV3_AUTO_PERIOD_TIME		1875
+#define TSADCV3_AUTO_PERIOD_HT_TIME		1875
+
+#define TSADCV2_USER_INTER_PD_SOC		0x340	/* 13 clocks */
+
+#define GRF_SARADC_TESTBIT			0x0e644
+#define GRF_TSADC_TESTBIT_L			0x0e648
+#define GRF_TSADC_TESTBIT_H			0x0e64c
+
+#define PX30_GRF_SOC_CON2			0x0408
+
+#define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
+#define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
+#define GRF_TSADC_VCM_EN_L			(0x10001 << 7)
+#define GRF_TSADC_VCM_EN_H			(0x10001 << 7)
+
+#define GRF_CON_TSADC_CH_INV			(0x10001 << 1)
+
+#define MIN_TEMP				(-40000)
+#define LOWEST_TEMP				(-273000)
+#define MAX_TEMP				(125000)
+#define MAX_ENV_TEMP				(85000)
+
+#define BASE					(1024)
+#define BASE_SHIFT				(10)
+#define START_DEBOUNCE_COUNT			(100)
+#define HIGHER_DEBOUNCE_TEMP			(30000)
+#define LOWER_DEBOUNCE_TEMP			(15000)
+
+/**
+ * struct tsadc_table - hold information about code and temp mapping
+ * @code: raw code from tsadc ip
+ * @temp: the mapping temperature
+ */
+
+struct tsadc_table {
+	unsigned long code;
+	int temp;
+};
+
+struct chip_tsadc_table {
+	const struct tsadc_table *id;
+	unsigned int length;
+	u32 data_mask;
+	enum adc_sort_mode mode;
+};
+
+enum sensor_id {
+	SENSOR_CPU = 0,
+	SENSOR_GPU,
+};
+
+struct rockchip_tsadc_chip {
+	/* The sensor id of chip correspond to the ADC channel */
+	int chn_id[SOC_MAX_SENSORS];
+	int chn_num;
+	fdt_addr_t base;
+	fdt_addr_t grf;
+
+	/* The hardware-controlled tshut property */
+	int tshut_temp;
+	enum tshut_mode tshut_mode;
+	enum tshut_polarity tshut_polarity;
+
+	void (*tsadc_control)(struct udevice *dev, bool enable);
+	void (*tsadc_init)(struct udevice *dev);
+	int (*tsadc_get_temp)(struct udevice *dev, int chn,
+			      int *temp);
+	void (*irq_ack)(struct udevice *dev);
+	void (*set_alarm_temp)(struct udevice *dev,
+			       int chn, int temp);
+	void (*set_tshut_temp)(struct udevice *dev,
+			       int chn, int temp);
+	void (*set_tshut_mode)(struct udevice *dev, int chn, enum tshut_mode m);
+	struct chip_tsadc_table table;
+};
+
+struct rockchip_thermal_priv {
+	void *base;
+	void *grf;
+	enum tshut_mode tshut_mode;
+	const struct rockchip_tsadc_chip *data;
+};
+
+static const struct tsadc_table rk1808_code_table[] = {
+	{TSADCV2_DATA_MASK, -40000},
+	{641, -40000},
+	{633, -35000},
+	{625, -30000},
+	{617, -25000},
+	{609, -20000},
+	{601, -15000},
+	{593, -10000},
+	{585, -5000},
+	{577, 0},
+	{569, 5000},
+	{561, 10000},
+	{553, 15000},
+	{545, 20000},
+	{537, 25000},
+	{529, 30000},
+	{520, 35000},
+	{512, 40000},
+	{504, 45000},
+	{496, 50000},
+	{487, 55000},
+	{479, 60000},
+	{471, 65000},
+	{463, 70000},
+	{454, 75000},
+	{446, 80000},
+	{437, 85000},
+	{429, 90000},
+	{421, 95000},
+	{412, 100000},
+	{404, 105000},
+	{395, 110000},
+	{387, 115000},
+	{378, 120000},
+	{370, 125000},
+	{0, 125000},
+};
+
+static const struct tsadc_table rk3228_code_table[] = {
+	{0, -40000},
+	{588, -40000},
+	{593, -35000},
+	{598, -30000},
+	{603, -25000},
+	{608, -20000},
+	{613, -15000},
+	{618, -10000},
+	{623, -5000},
+	{629, 0},
+	{634, 5000},
+	{639, 10000},
+	{644, 15000},
+	{649, 20000},
+	{654, 25000},
+	{660, 30000},
+	{665, 35000},
+	{670, 40000},
+	{675, 45000},
+	{681, 50000},
+	{686, 55000},
+	{691, 60000},
+	{696, 65000},
+	{702, 70000},
+	{707, 75000},
+	{712, 80000},
+	{717, 85000},
+	{723, 90000},
+	{728, 95000},
+	{733, 100000},
+	{738, 105000},
+	{744, 110000},
+	{749, 115000},
+	{754, 120000},
+	{760, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
+static const struct tsadc_table rk3288_code_table[] = {
+	{TSADCV2_DATA_MASK, -40000},
+	{3800, -40000},
+	{3792, -35000},
+	{3783, -30000},
+	{3774, -25000},
+	{3765, -20000},
+	{3756, -15000},
+	{3747, -10000},
+	{3737, -5000},
+	{3728, 0},
+	{3718, 5000},
+	{3708, 10000},
+	{3698, 15000},
+	{3688, 20000},
+	{3678, 25000},
+	{3667, 30000},
+	{3656, 35000},
+	{3645, 40000},
+	{3634, 45000},
+	{3623, 50000},
+	{3611, 55000},
+	{3600, 60000},
+	{3588, 65000},
+	{3575, 70000},
+	{3563, 75000},
+	{3550, 80000},
+	{3537, 85000},
+	{3524, 90000},
+	{3510, 95000},
+	{3496, 100000},
+	{3482, 105000},
+	{3467, 110000},
+	{3452, 115000},
+	{3437, 120000},
+	{3421, 125000},
+};
+
+static const struct tsadc_table rk3328_code_table[] = {
+	{0, -40000},
+	{296, -40000},
+	{304, -35000},
+	{313, -30000},
+	{331, -20000},
+	{340, -15000},
+	{349, -10000},
+	{359, -5000},
+	{368, 0},
+	{378, 5000},
+	{388, 10000},
+	{398, 15000},
+	{408, 20000},
+	{418, 25000},
+	{429, 30000},
+	{440, 35000},
+	{451, 40000},
+	{462, 45000},
+	{473, 50000},
+	{485, 55000},
+	{496, 60000},
+	{508, 65000},
+	{521, 70000},
+	{533, 75000},
+	{546, 80000},
+	{559, 85000},
+	{572, 90000},
+	{586, 95000},
+	{600, 100000},
+	{614, 105000},
+	{629, 110000},
+	{644, 115000},
+	{659, 120000},
+	{675, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
+static const struct tsadc_table rk3368_code_table[] = {
+	{0, -40000},
+	{106, -40000},
+	{108, -35000},
+	{110, -30000},
+	{112, -25000},
+	{114, -20000},
+	{116, -15000},
+	{118, -10000},
+	{120, -5000},
+	{122, 0},
+	{124, 5000},
+	{126, 10000},
+	{128, 15000},
+	{130, 20000},
+	{132, 25000},
+	{134, 30000},
+	{136, 35000},
+	{138, 40000},
+	{140, 45000},
+	{142, 50000},
+	{144, 55000},
+	{146, 60000},
+	{148, 65000},
+	{150, 70000},
+	{152, 75000},
+	{154, 80000},
+	{156, 85000},
+	{158, 90000},
+	{160, 95000},
+	{162, 100000},
+	{163, 105000},
+	{165, 110000},
+	{167, 115000},
+	{169, 120000},
+	{171, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
+static const struct tsadc_table rk3399_code_table[] = {
+	{0, -40000},
+	{402, -40000},
+	{410, -35000},
+	{419, -30000},
+	{427, -25000},
+	{436, -20000},
+	{444, -15000},
+	{453, -10000},
+	{461, -5000},
+	{470, 0},
+	{478, 5000},
+	{487, 10000},
+	{496, 15000},
+	{504, 20000},
+	{513, 25000},
+	{521, 30000},
+	{530, 35000},
+	{538, 40000},
+	{547, 45000},
+	{555, 50000},
+	{564, 55000},
+	{573, 60000},
+	{581, 65000},
+	{590, 70000},
+	{599, 75000},
+	{607, 80000},
+	{616, 85000},
+	{624, 90000},
+	{633, 95000},
+	{642, 100000},
+	{650, 105000},
+	{659, 110000},
+	{668, 115000},
+	{677, 120000},
+	{685, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
+/*
+ * Struct used for matching a device
+ */
+struct of_device_id {
+	char compatible[32];
+	const void *data;
+};
+
+static int tsadc_code_to_temp(struct chip_tsadc_table *table, u32 code,
+			      int *temp)
+{
+	unsigned int low = 1;
+	unsigned int high = table->length - 1;
+	unsigned int mid = (low + high) / 2;
+	unsigned int num;
+	unsigned long denom;
+
+	switch (table->mode) {
+	case ADC_DECREMENT:
+		code &= table->data_mask;
+		if (code < table->id[high].code)
+			return -EAGAIN;	/* Incorrect reading */
+
+		while (low <= high) {
+			if (code >= table->id[mid].code &&
+			    code < table->id[mid - 1].code)
+				break;
+			else if (code < table->id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	case ADC_INCREMENT:
+		code &= table->data_mask;
+		if (code < table->id[low].code)
+			return -EAGAIN;	/* Incorrect reading */
+
+		while (low <= high) {
+			if (code <= table->id[mid].code &&
+			    code > table->id[mid - 1].code)
+				break;
+			else if (code > table->id[mid].code)
+				low = mid + 1;
+			else
+				high = mid - 1;
+
+			mid = (low + high) / 2;
+		}
+		break;
+	default:
+		printf("%s: Invalid the conversion table mode=%d\n",
+		       __func__, table->mode);
+		return -EINVAL;
+	}
+
+	/*
+	 * The 5C granularity provided by the table is too much. Let's
+	 * assume that the relationship between sensor readings and
+	 * temperature between 2 table entries is linear and interpolate
+	 * to produce less granular result.
+	 */
+	num = table->id[mid].temp - table->id[mid - 1].temp;
+	num *= abs(table->id[mid - 1].code - code);
+	denom = abs(table->id[mid - 1].code - table->id[mid].code);
+	*temp = table->id[mid - 1].temp + (num / denom);
+
+	return 0;
+}
+
+static u32 tsadc_temp_to_code_v2(struct chip_tsadc_table table,
+				 int temp)
+{
+	int high, low, mid;
+	u32 error = table.data_mask;
+
+	low = 0;
+	high = table.length - 1;
+	mid = (high + low) / 2;
+
+	/* Return mask code data when the temp is over table range */
+	if (temp < table.id[low].temp || temp > table.id[high].temp)
+		goto exit;
+
+	while (low <= high) {
+		if (temp == table.id[mid].temp)
+			return table.id[mid].code;
+		else if (temp < table.id[mid].temp)
+			high = mid - 1;
+		else
+			low = mid + 1;
+		mid = (low + high) / 2;
+	}
+
+exit:
+	pr_err("%s: Invalid conversion table: code=%d, temperature=%d\n",
+	       __func__, error, temp);
+
+	return error;
+}
+
+static void tsadc_irq_ack_v2(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_INT_PD);
+	writel(val & TSADCV2_INT_PD_CLEAR_MASK, priv->base + TSADCV2_INT_PD);
+}
+
+static void tsadc_irq_ack_v3(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_INT_PD);
+	writel(val & TSADCV3_INT_PD_CLEAR_MASK, priv->base + TSADCV2_INT_PD);
+}
+
+static void tsadc_control_v3(struct udevice *dev, bool enable)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_AUTO_CON);
+	if (enable)
+		val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
+	else
+		val &= ~TSADCV2_AUTO_EN;
+
+	writel(val, priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_control_v2(struct udevice *dev, bool enable)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_AUTO_CON);
+	if (enable)
+		val |= TSADCV2_AUTO_EN;
+	else
+		val &= ~TSADCV2_AUTO_EN;
+
+	writel(val, priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_init_v2(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	writel(TSADCV2_AUTO_PERIOD_TIME,
+	       priv->base + TSADCV2_AUTO_PERIOD);
+	writel(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+	       priv->base + TSADCV2_HIGHT_INT_DEBOUNCE);
+	writel(TSADCV2_AUTO_PERIOD_HT_TIME,
+	       priv->base + TSADCV2_AUTO_PERIOD_HT);
+	writel(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+	       priv->base + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
+
+	if (priv->data->tshut_polarity == TSHUT_HIGH_ACTIVE)
+		writel(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+		       priv->base + TSADCV2_AUTO_CON);
+	else
+		writel(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+		       priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_init_v3(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	if (!IS_ERR(priv->grf)) {
+		writel(GRF_TSADC_VCM_EN_L, priv->grf + GRF_TSADC_TESTBIT_L);
+		writel(GRF_TSADC_VCM_EN_H, priv->grf + GRF_TSADC_TESTBIT_H);
+
+		udelay(100);/* The spec note says at least 15 us */
+		writel(GRF_SARADC_TESTBIT_ON, priv->grf + GRF_SARADC_TESTBIT);
+		writel(GRF_TSADC_TESTBIT_H_ON, priv->grf + GRF_TSADC_TESTBIT_H);
+		udelay(200);/* The spec note says at least 90 us */
+	}
+	tsadc_init_v2(dev);
+}
+
+static void __maybe_unused tsadc_init_v5(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	/* Set interleave value to workround ic time sync issue */
+	writel(TSADCV2_USER_INTER_PD_SOC, priv->base +
+		       TSADCV2_USER_CON);
+	tsadc_init_v2(dev);
+}
+
+static void tsadc_init_v4(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	tsadc_init_v2(dev);
+	if (!IS_ERR(priv->grf))
+		writel(GRF_CON_TSADC_CH_INV, priv->grf + PX30_GRF_SOC_CON2);
+}
+
+static int tsadc_get_temp_v2(struct udevice *dev,
+			     int chn, int *temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct chip_tsadc_table table = priv->data->table;
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_DATA(chn));
+
+	return tsadc_code_to_temp(&table, val, temp);
+}
+
+static int predict_temp(int temp)
+{
+	/*
+	 * The deviation of prediction. the temperature will not change rapidly,
+	 * so this cov_q is small
+	 */
+	int cov_q = 18;
+	/*
+	 * The deviation of tsadc's reading, deviation of tsadc is very big when
+	 * abnormal temperature is get
+	 */
+	int cov_r = 542;
+
+	int gain;
+	int temp_mid;
+	int temp_now;
+	int prob_mid;
+	int prob_now;
+	static int temp_last = LOWEST_TEMP;
+	static int prob_last = 160;
+	static int bounding_cnt;
+
+	/*
+	 * init temp_last with a more suitable value, which mostly equals to
+	 * temp reading from tsadc, but not higher than MAX_ENV_TEMP. If the
+	 * temp is higher than MAX_ENV_TEMP, it is assumed to be abnormal
+	 * value and temp_last is adjusted to MAX_ENV_TEMP.
+	 */
+	if (temp_last == LOWEST_TEMP)
+		temp_last = min(temp, MAX_ENV_TEMP);
+
+	/*
+	 * Before START_DEBOUNCE_COUNT's samples of temperature, we consider
+	 * tsadc is stable, i.e. after that, the temperature may be not stable
+	 * and may have abnormal reading, so we set a bounding temperature. If
+	 * the reading from tsadc is too big, we set the delta temperature of
+	 * DEBOUNCE_TEMP/3 comparing to the last temperature.
+	 */
+
+	if (bounding_cnt++ > START_DEBOUNCE_COUNT) {
+		bounding_cnt = START_DEBOUNCE_COUNT;
+		if (temp - temp_last > HIGHER_DEBOUNCE_TEMP)
+			temp = temp_last + HIGHER_DEBOUNCE_TEMP / 3;
+		if (temp_last - temp > LOWER_DEBOUNCE_TEMP)
+			temp = temp_last - LOWER_DEBOUNCE_TEMP / 3;
+	}
+
+	temp_mid = temp_last;
+
+	/* calculate the probability of this time's prediction */
+	prob_mid = prob_last + cov_q;
+
+	/* calculate the Kalman Gain */
+	gain = (prob_mid * BASE) / (prob_mid + cov_r);
+
+	/* calculate the prediction of temperature */
+	temp_now = (temp_mid * BASE + gain * (temp - temp_mid)) >> BASE_SHIFT;
+
+	/*
+	 * Base on this time's Kalman Gain, ajust our probability of prediction
+	 * for next time calculation
+	 */
+	prob_now = ((BASE - gain) * prob_mid) >> BASE_SHIFT;
+
+	prob_last = prob_now;
+	temp_last = temp_now;
+
+	return temp_last;
+}
+
+static int tsadc_get_temp_v3(struct udevice *dev,
+			     int chn, int *temp)
+{
+	int ret;
+
+	ret = tsadc_get_temp_v2(dev, chn, temp);
+	if (!ret)
+		*temp = predict_temp(*temp);
+
+	return ret;
+}
+
+static void tsadc_alarm_temp_v2(struct udevice *dev,
+				int chn, int temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct chip_tsadc_table table = priv->data->table;
+	u32 alarm_value, int_en;
+
+	alarm_value = tsadc_temp_to_code_v2(table, temp);
+	if (alarm_value == table.data_mask)
+		return;
+
+	writel(alarm_value, priv->base + TSADCV2_COMP_INT(chn));
+
+	int_en = readl(priv->base + TSADCV2_INT_EN);
+	int_en |= TSADCV2_INT_SRC_EN(chn);
+	writel(int_en, priv->base + TSADCV2_INT_EN);
+}
+
+static void tsadc_tshut_temp_v2(struct udevice *dev,
+				int chn, int temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct chip_tsadc_table table = priv->data->table;
+	u32 tshut_value, val;
+
+	tshut_value = tsadc_temp_to_code_v2(table, temp);
+	if (tshut_value == table.data_mask)
+		return;
+
+	writel(tshut_value, priv->base + TSADCV2_COMP_SHUT(chn));
+
+	/* TSHUT will be valid */
+	val = readl(priv->base + TSADCV2_AUTO_CON);
+	writel(val | TSADCV2_AUTO_SRC_EN(chn), priv->base + TSADCV2_AUTO_CON);
+}
+
+static void tsadc_tshut_mode_v2(struct udevice *dev, int chn,
+				enum tshut_mode mode)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	u32 val;
+
+	val = readl(priv->base + TSADCV2_INT_EN);
+	if (mode == TSHUT_MODE_GPIO) {
+		val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
+		val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
+	} else {
+		val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
+		val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
+	}
+
+	writel(val, priv->base + TSADCV2_INT_EN);
+}
+
+int rockchip_thermal_get_temp(struct udevice *dev, int *temp)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	priv->data->tsadc_get_temp(dev, 0, temp);
+
+	return 0;
+}
+
+static const struct dm_thermal_ops rockchip_thermal_ops = {
+	.get_temp	= rockchip_thermal_get_temp,
+};
+
+static int rockchip_thermal_probe(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+	struct rockchip_tsadc_chip *tsadc;
+	int ret, i, shut_temp;
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		printf("%s clk_set_defaults failed %d\n", __func__, ret);
+
+	tsadc = (struct rockchip_tsadc_chip *)dev_get_driver_data(dev);
+	priv->data = tsadc;
+
+	priv->tshut_mode = dev_read_u32_default(dev,
+						"rockchip,hw-tshut-mode",
+						-1);
+	if (priv->tshut_mode < 0)
+		priv->tshut_mode = priv->data->tshut_mode;
+
+	if (priv->tshut_mode == TSHUT_MODE_GPIO)
+		pinctrl_select_state(dev, "otpout");
+	else
+		pinctrl_select_state(dev, "gpio");
+
+	tsadc->tsadc_init(dev);
+	tsadc->irq_ack(dev);
+
+	shut_temp = dev_read_u32_default(dev, "rockchip,hw-tshut-temp", -1);
+	if (shut_temp < 0)
+		shut_temp = 120000;
+
+	for (i = 0; i < tsadc->chn_num; i++) {
+		tsadc->set_alarm_temp(dev, i, tsadc->tshut_temp);
+		tsadc->set_tshut_temp(dev, i, shut_temp);
+		if (priv->tshut_mode == TSHUT_MODE_GPIO)
+			tsadc->set_tshut_mode(dev, i, TSHUT_MODE_GPIO);
+		else
+			tsadc->set_tshut_mode(dev, i, TSHUT_MODE_CRU);
+	}
+
+	tsadc->tsadc_control(dev, true);
+	udelay(1000);
+
+	debug("tsadc probed successfully\n");
+
+	return 0;
+}
+
+static int rockchip_thermal_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_thermal_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	return 0;
+}
+
+static const struct rockchip_tsadc_chip rk1808_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channel for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk1808_code_table,
+		.length = ARRAY_SIZE(rk1808_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_DECREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channel for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3228_code_table,
+		.length = ARRAY_SIZE(rk3228_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
+	.chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v2,
+	.tsadc_get_temp = tsadc_get_temp_v3,
+	.irq_ack = tsadc_irq_ack_v2,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3288_code_table,
+		.length = ARRAY_SIZE(rk3288_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_DECREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3308_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* 2 channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v4,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip px30_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* 2 channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v4,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3328_code_table,
+		.length = ARRAY_SIZE(rk3328_code_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v3,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3228_code_table,
+		.length = ARRAY_SIZE(rk3228_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v2,
+	.tsadc_control = tsadc_control_v2,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v2,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3368_code_table,
+		.length = ARRAY_SIZE(rk3368_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.tsadc_init = tsadc_init_v3,
+	.tsadc_control = tsadc_control_v3,
+	.tsadc_get_temp = tsadc_get_temp_v2,
+	.irq_ack = tsadc_irq_ack_v3,
+	.set_alarm_temp = tsadc_alarm_temp_v2,
+	.set_tshut_temp = tsadc_tshut_temp_v2,
+	.set_tshut_mode = tsadc_tshut_mode_v2,
+
+	.table = {
+		.id = rk3399_code_table,
+		.length = ARRAY_SIZE(rk3399_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
+static const struct udevice_id rockchip_thermal_match[] = {
+	{
+		.compatible = "rockchip,px30-tsadc",
+		.data = (ulong)&px30_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk1808-tsadc",
+		.data = (ulong)&rk1808_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3228-tsadc",
+		.data = (ulong)&rk3228_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-tsadc",
+		.data = (ulong)&rk3288_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3308-tsadc",
+		.data = (ulong)&rk3308_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3328-tsadc",
+		.data = (ulong)&rk3328_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3366-tsadc",
+		.data = (ulong)&rk3366_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-tsadc",
+		.data = (ulong)&rk3368_tsadc_data,
+	},
+	{
+		.compatible = "rockchip,rk3399-tsadc",
+		.data = (ulong)&rk3399_tsadc_data,
+	},
+	{ /* end */ },
+};
+
+U_BOOT_DRIVER(rockchip_thermal) = {
+	.name		= "rockchip_thermal",
+	.id		= UCLASS_THERMAL,
+	.of_match	= rockchip_thermal_match,
+	.priv_auto_alloc_size = sizeof(struct rockchip_thermal_priv),
+	.ofdata_to_platdata = rockchip_thermal_ofdata_to_platdata,
+	.ops		= &rockchip_thermal_ops,
+	.probe		= rockchip_thermal_probe,
+};

commit cb3c37fcc0b85ba79736fde8194cd9add5e18511
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Sep 19 17:35:32 2018 +0800

    clk: rockchip: support clk_tsadc setting freq
    
    Change-Id: Ie5e91c95d6ff3caf618ff1a5e5e3b7dcf6723325
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index ba249ae0da..f867e4f8aa 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -665,6 +665,32 @@ static ulong px30_saradc_set_clk(struct px30_clk_priv *priv, uint hz)
 	return px30_saradc_get_clk(priv);
 }
 
+static ulong px30_tsadc_get_clk(struct px30_clk_priv *priv)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[54]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong px30_tsadc_set_clk(struct px30_clk_priv *priv, uint hz)
+{
+	struct px30_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 <= 2047);
+
+	rk_clrsetreg(&cru->clksel_con[54],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return px30_tsadc_get_clk(priv);
+}
+
 static ulong px30_spi_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
 	struct px30_cru *cru = priv->cru;
@@ -1063,6 +1089,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = px30_saradc_get_clk(priv);
 		break;
+	case SCLK_TSADC:
+		rate = px30_tsadc_get_clk(priv);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		rate = px30_spi_get_clk(priv, clk->id);
@@ -1131,6 +1160,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = px30_saradc_set_clk(priv, rate);
 		break;
+	case SCLK_TSADC:
+		ret = px30_tsadc_set_clk(priv, rate);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		ret = px30_spi_set_clk(priv, clk->id, rate);
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
index 77013ee8c6..ecb08a04bf 100644
--- a/drivers/clk/rockchip/clk_rk1808.c
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -353,6 +353,32 @@ static ulong rk1808_saradc_set_clk(struct rk1808_clk_priv *priv, uint hz)
 	return rk1808_saradc_get_clk(priv);
 }
 
+static ulong rk1808_tsadc_get_clk(struct rk1808_clk_priv *priv)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[62]);
+	div = con & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk1808_tsadc_set_clk(struct rk1808_clk_priv *priv, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 < 2047);
+
+	rk_clrsetreg(&cru->clksel_con[62],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk1808_tsadc_get_clk(priv);
+}
+
 static ulong rk1808_spi_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
 {
 	struct rk1808_cru *cru = priv->cru;
@@ -755,6 +781,9 @@ static ulong rk1808_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk1808_saradc_get_clk(priv);
 		break;
+	case SCLK_TSADC:
+		rate = rk1808_tsadc_get_clk(priv);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 	case SCLK_SPI2:
@@ -844,6 +873,9 @@ static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk1808_saradc_set_clk(priv, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk1808_tsadc_set_clk(priv, rate);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 	case SCLK_SPI2:
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 44ecb71958..20dd359742 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -88,6 +88,11 @@ enum {
 	PD_BUS_ACLK_DIV1_SHIFT	= 0,
 	PD_BUS_ACLK_DIV1_MASK	= 0x7 << PD_BUS_ACLK_DIV1_SHIFT,
 
+	/* CLKSEL2: tsadc */
+	CLK_TSADC_DIV_CON_SHIFT	= 0,
+	CLK_TSADC_DIV_CON_MASK		= GENMASK(5, 0),
+	CLK_TSADC_DIV_CON_WIDTH	= 6,
+
 	/*
 	 * CLKSEL10
 	 * peripheral bus pclk div:
@@ -698,6 +703,31 @@ static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz)
 	return rockchip_saradc_get_clk(cru);
 }
 
+static ulong rockchip_tsadc_get_clk(struct rk3288_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[2]);
+	div = bitfield_extract(val, CLK_TSADC_DIV_CON_SHIFT,
+			       CLK_TSADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(32768, div);
+}
+
+static ulong rockchip_tsadc_set_clk(struct rk3288_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[2],
+		     CLK_TSADC_DIV_CON_MASK,
+		     src_clk_div << CLK_TSADC_DIV_CON_SHIFT);
+
+	return rockchip_tsadc_get_clk(cru);
+}
+
 static ulong rk3288_clk_get_rate(struct clk *clk)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
@@ -735,6 +765,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_get_clk(priv->cru);
 		break;
+	case SCLK_TSADC:
+		new_rate = rockchip_tsadc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -828,6 +861,9 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_TSADC:
+		new_rate = rockchip_tsadc_set_clk(priv->cru, rate);
+		break;
 	case PLL_GPLL:
 	case PLL_CPLL:
 	case PLL_NPLL:
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 73b774dfed..cfeff9e267 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -307,6 +307,34 @@ static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 	return rk3308_saradc_get_clk(clk);
 }
 
+static ulong rk3308_tsadc_get_clk(struct clk *clk)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[33]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3308_tsadc_set_clk(struct clk *clk, uint hz)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 <= 2047);
+
+	rk_clrsetreg(&cru->clksel_con[33],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3308_tsadc_get_clk(clk);
+}
+
 static ulong rk3308_spi_get_clk(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -708,6 +736,9 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3308_saradc_get_clk(clk);
 		break;
+	case SCLK_TSADC:
+		rate = rk3308_tsadc_get_clk(clk);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		rate = rk3308_spi_get_clk(clk);
@@ -773,6 +804,9 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk3308_saradc_set_clk(clk, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk3308_tsadc_set_clk(clk, rate);
+		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
 		ret = rk3308_spi_set_clk(clk, rate);
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 15711ba844..8c27f99b43 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -399,6 +399,33 @@ static ulong rk3328_saradc_set_clk(struct rk3328_clk_priv *priv, uint hz)
 	return rk3328_saradc_get_clk(priv);
 }
 
+static ulong rk3328_tsadc_get_clk(struct rk3328_clk_priv *priv)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[22]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3328_tsadc_set_clk(struct rk3328_clk_priv *priv, uint hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[22],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3328_tsadc_get_clk(priv);
+}
+
 static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
 {
 	struct rk3328_cru *cru = priv->cru;
@@ -696,6 +723,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3328_saradc_get_clk(priv);
 		break;
+	case SCLK_TSADC:
+		rate = rk3328_tsadc_get_clk(priv);
+		break;
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
 	case HCLK_VIO_PRE:
@@ -769,6 +799,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk3328_saradc_set_clk(priv, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk3328_tsadc_set_clk(priv, rate);
+		break;
 	case DCLK_LCDC:
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index e6ba48fae3..cd2a85b6e2 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -922,6 +922,32 @@ static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz)
 	return rk3399_saradc_get_clk(cru);
 }
 
+static ulong rk3399_tsadc_get_clk(struct rk3399_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[27]);
+	div = bitfield_extract(val, CLK_TSADC_SEL_SHIFT,
+			       10);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3399_tsadc_set_clk(struct rk3399_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div <= 255);
+
+	rk_clrsetreg(&cru->clksel_con[27],
+		     CLK_TSADC_DIV_CON_MASK | CLK_TSADC_SEL_MASK,
+		     (CLK_TSADC_SEL_X24M << CLK_TSADC_SEL_SHIFT) |
+		     (src_clk_div << CLK_TSADC_DIV_CON_SHIFT));
+
+	return rk3399_tsadc_get_clk(cru);
+}
+
 static ulong rk3399_clk_get_rate(struct clk *clk)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
@@ -969,6 +995,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3399_saradc_get_clk(priv->cru);
 		break;
+	case SCLK_TSADC:
+		rate = rk3399_tsadc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -1037,6 +1066,9 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret = rk3399_saradc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_TSADC:
+		ret = rk3399_tsadc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit cab28f403dae8ca7690a93e8ff7433749b79e91f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 27 15:39:45 2018 +0800

    tool: rkcommon: add support for px30
    
    PX30 have 10K sram available.
    
    Change-Id: I67c565c84d00bc0141d79c437035993746ea9245
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index cc16ec0b36..8f184c1301 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -77,6 +77,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3328", "RK32", 0x8000 - 0x1000, false },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
+	{ "px30", "RK33", 0x2800, false },
 	{ "rv1108", "RK11", 0x1800, false },
 };
 

commit f588f59eac0afdfa1a2245ae1a95d4cfec9d943f
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Sep 26 21:22:32 2018 +0800

    driver: ram: rockhip: px30: fix lpddr2 bug
    
    set lpddr2 detect max row = 15 to match lpddr2 inc file
    
    Change-Id: I8fd57984331d35bafaf263829760204c582d120d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 940558092b..35149d046e 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -920,7 +920,10 @@ static u64 dram_detect_cap(struct dram_info *dram,
 		/* detect col and bk for ddr3/lpddr3 */
 		coltmp = 12;
 		bktmp = 3;
-		rowtmp = 16;
+		if (dram_type == LPDDR2)
+			rowtmp = 15;
+		else
+			rowtmp = 16;
 
 		for (col = coltmp; col >= 9; col -= 1) {
 			writel(0, CONFIG_SYS_SDRAM_BASE);

commit ca0ddd934d52302d42dda29cd6145caec7df6c6c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 26 11:54:53 2018 +0800

    rockchip: bootrom: update support for back to brom via boot_mode reg
    
    We should clear that the purpose is enter maskrom and get into USB boot:
    1. set the bootmode reg to bootrom mode in U-Boot/Kernel by cmd or Tool;
    2. Get back to bootrom with non-zero return value if not boot from USB;
    3. Clean the tag if already enter USB boot.
    
    Change-Id: I1127357c3b2f499519387880830b2b382f46af10
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index bef2a90d1f..f248869c00 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -31,28 +31,31 @@ void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
 }
 
 /*
- * we back to bootrom download mode if get a
+ * We back to bootrom download mode if get a
  * BOOT_BROM_DOWNLOAD flag in boot mode register
  *
- * note: the boot mode register is configured by
- * application(next stage bootloader, kernel, etc),
- * and the bootrom never check this register, so we need
+ * The bootrom never check this register, so we need
  * to check it and back to bootrom at very early bootstage(before
  * some basic configurations(such as interrupts) been
  * changed by TPL/SPL, as the bootrom download operation
  * relys on many default settings(such as interrupts) by
  * it's self.
+ * Note: the boot mode register is configured by
+ * application(next stage bootloader, kernel, etc) via command or PC Tool,
+ * cleared by USB download(bootrom mode) or loader(other mode) after the
+ * tag has work.
  */
 static bool check_back_to_brom_dnl_flag(void)
 {
-	u32 boot_mode;
+	u32 boot_mode, boot_id;
 
-	if (CONFIG_ROCKCHIP_BOOT_MODE_REG) {
+	if (CONFIG_ROCKCHIP_BOOT_MODE_REG && BROM_BOOTSOURCE_ID_ADDR) {
 		boot_mode = readl(CONFIG_ROCKCHIP_BOOT_MODE_REG);
-		if (boot_mode == BOOT_BROM_DOWNLOAD) {
+		boot_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+		if (boot_id == BROM_BOOTSOURCE_USB)
 			writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		else if (boot_mode == BOOT_BROM_DOWNLOAD)
 			return true;
-		}
 	}
 
 	return false;

commit 2daa9732c06dc558a7df67f08d9c4f915ab6d8bb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 26 11:53:52 2018 +0800

    rockchip: move BROM_BOOTSOURCE_ID_ADDR to bootrom.h
    
    The macro BROM_BOOTSOURCE_ID_ADDR does not belong to sdram_common.h
    
    Change-Id: I0490ff10b08287d71e3231baa999d3f096068c7c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 78f9da6a64..15bf7a94c9 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -58,6 +58,7 @@ extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
 /**
  * Locations of the boot-device identifier in SRAM
  */
-#define RK3399_BROM_BOOTSOURCE_ID_ADDR   0xff8c0010
+#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
+
 
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index d250759c11..33c8192f8e 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -78,8 +78,6 @@ enum {
 #define SYS_REG1_CS1_COL_SHIFT(ch)		(0 + (ch) * 2)
 #define SYS_REG1_CS1_COL_MASK			3
 
-#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
-
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
 

commit cf41a383b33a575d0b871a03a700bc6bea85a603
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Sep 19 20:50:26 2018 +0800

    rockchip: ram: using common code for rk chip dmc probe
    
    Include rk1808, rk3036, rk3308 and rk3326/px30 use this common
    rockchip_sdram.c
    
    Change-Id: Iee3e100992b07027c05f132fa536504ecc02f11f
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index dffed38f8a..9b12db19d4 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,13 +6,14 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
-obj-$(CONFIG_ROCKCHIP_RK1808) = sdram_rk1808.o
-obj-$(CONFIG_ROCKCHIP_RK3036) = sdram_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
-obj-$(CONFIG_ROCKCHIP_RK3308) = sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
+obj-$(CONFIG_ROCKCHIP_PX30) += rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK1808) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK3036) = rockchip_sdram.o
+obj-$(CONFIG_ROCKCHIP_RK3308) = rockchip_sdram.o
diff --git a/drivers/ram/rockchip/rockchip_sdram.c b/drivers/ram/rockchip/rockchip_sdram.c
new file mode 100644
index 0000000000..aa65623108
--- /dev/null
+++ b/drivers/ram/rockchip/rockchip_sdram.c
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_px30.h>
+#include <asm/arch/grf_rk1808.h>
+#include <asm/arch/grf_rk3036.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_TPL_BUILD
+struct dram_info {
+	struct ram_info info;
+};
+
+static int dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	struct rk3036_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]);
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+#elif defined(CONFIG_ROCKCHIP_PX30)
+	struct px30_pmugrf *pmugrf =
+		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+	struct rk1808_pmugrf *pmugrf =
+		syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&pmugrf->os_reg[2]);
+#else
+#error chip error
+#endif
+
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+
+	return 0;
+}
+
+static int dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops dmc_ops = {
+	.get_info = dmc_get_info,
+};
+
+static const struct udevice_id dmc_ids[] = {
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	{ .compatible = "rockchip,rk3036-dmc" },
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	{ .compatible = "rockchip,rk3308-dmc" },
+#elif defined(CONFIG_ROCKCHIP_PX30)
+	{ .compatible = "rockchip,px30-dmc" },
+#elif defined(CONFIG_ROCKCHIP_RK1808)
+	{ .compatible = "rockchip,rk1808-dmc" },
+#endif
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_tiny) = {
+	.name = "rockchip_dmc",
+	.id = UCLASS_RAM,
+	.of_match = dmc_ids,
+	.ops = &dmc_ops,
+	.probe = dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};
+#endif
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 03622e67c6..940558092b 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -26,21 +26,20 @@
 #endif
 #endif
 
+#ifdef CONFIG_TPL_BUILD
+
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
-#ifdef CONFIG_TPL_BUILD
 	struct px30_ddr_pctl_regs *pctl;
 	struct px30_ddr_phy_regs *phy;
 	struct px30_cru *cru;
 	struct px30_msch_regs *msch;
 	struct px30_ddr_grf_regs *ddr_grf;
 	struct px30_grf *grf;
-#endif
 	struct ram_info info;
 	struct px30_pmugrf *pmugrf;
 };
 
-#ifdef CONFIG_TPL_BUILD
 #define PMUGRF_BASE_ADDR		0xFF010000
 #define CRU_BASE_ADDR			0xFF2B0000
 #define GRF_BASE_ADDR			0xFF140000
@@ -1229,46 +1228,4 @@ int sdram_init(void)
 error:
 	return (-1);
 }
-
-#else /* CONFIG_TPL_BUILD */
-
-static int px30_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
-
-	return 0;
-}
-
-static int px30_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops px30_dmc_ops = {
-	.get_info = px30_dmc_get_info,
-};
-
-static const struct udevice_id px30_dmc_ids[] = {
-	{ .compatible = "rockchip,px30-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_px30) = {
-	.name = "rockchip_px30_dmc",
-	.id = UCLASS_RAM,
-	.of_match = px30_dmc_ids,
-	.ops = &px30_dmc_ops,
-	.probe = px30_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};
 #endif /* CONFIG_TPL_BUILD */
diff --git a/drivers/ram/rockchip/sdram_rk1808.c b/drivers/ram/rockchip/sdram_rk1808.c
deleted file mode 100644
index 681a2901d4..0000000000
--- a/drivers/ram/rockchip/sdram_rk1808.c
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk1808.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct dram_info {
-	struct ram_info info;
-	struct rk1808_pmugrf *pmugrf;
-};
-
-static int rk1808_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size =
-		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
-
-	return 0;
-}
-
-static int rk1808_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops rk1808_dmc_ops = {
-	.get_info = rk1808_dmc_get_info,
-};
-
-static const struct udevice_id rk1808_dmc_ids[] = {
-	{ .compatible = "rockchip,rk1808-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_rk1808) = {
-	.name = "rockchip_rk1808_dmc",
-	.id = UCLASS_RAM,
-	.of_match = rk1808_dmc_ids,
-	.ops = &rk1808_dmc_ops,
-	.probe = rk1808_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};
diff --git a/drivers/ram/rockchip/sdram_rk3036.c b/drivers/ram/rockchip/sdram_rk3036.c
deleted file mode 100644
index 44c6a1c949..0000000000
--- a/drivers/ram/rockchip/sdram_rk3036.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3036.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct dram_info {
-	struct ram_info info;
-	struct rk3036_grf *grf;
-};
-
-static int rk3036_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-				(phys_addr_t)&priv->grf->os_reg[1]);
-
-	return 0;
-}
-
-static int rk3036_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops rk3036_dmc_ops = {
-	.get_info = rk3036_dmc_get_info,
-};
-
-static const struct udevice_id rk3036_dmc_ids[] = {
-	{ .compatible = "rockchip,rk3036-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_rk3036) = {
-	.name = "rockchip_rk3036_dmc",
-	.id = UCLASS_RAM,
-	.of_match = rk3036_dmc_ids,
-	.ops = &rk3036_dmc_ops,
-	.probe = rk3036_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};
diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c
deleted file mode 100644
index 03a52535b7..0000000000
--- a/drivers/ram/rockchip/sdram_rk3308.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3308.h>
-#include <asm/arch/sdram_common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct dram_info {
-	struct ram_info info;
-};
-
-static int rk3308_dmc_probe(struct udevice *dev)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
-
-	return 0;
-}
-
-static int rk3308_dmc_get_info(struct udevice *dev, struct ram_info *info)
-{
-	struct dram_info *priv = dev_get_priv(dev);
-
-	*info = priv->info;
-
-	return 0;
-}
-
-static struct ram_ops rk3308_dmc_ops = {
-	.get_info = rk3308_dmc_get_info,
-};
-
-
-static const struct udevice_id rk3308_dmc_ids[] = {
-	{ .compatible = "rockchip,rk3308-dmc" },
-	{ }
-};
-
-U_BOOT_DRIVER(dmc_rk3308) = {
-	.name = "rockchip_rk3308_dmc",
-	.id = UCLASS_RAM,
-	.of_match = rk3308_dmc_ids,
-	.ops = &rk3308_dmc_ops,
-	.probe = rk3308_dmc_probe,
-	.priv_auto_alloc_size = sizeof(struct dram_info),
-};

commit b615ccb0844f46ace55769875ee3ab1bceda90c9
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 18:27:11 2018 +0800

    configs: px30: enable rk809/rk817 sound support
    
    Change-Id: I4deae9b8e5a101c7b37e18d998e800da405726c0
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index bf13cd167e..b7a0aab7d1 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -77,6 +77,10 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SOUND=y
+CONFIG_I2S_ROCKCHIP=y
+CONFIG_SOUND_RK817=y
+CONFIG_SOUND_ROCKCHIP=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y

commit 75958dd45d3be2e76bdd7e3ce6c761c2b527491f
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 18:24:51 2018 +0800

    configs: px30: update by make savedefconfig
    
    Change-Id: I44d3afebe124096676af6cb448d4ea45406dd6c4
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index f9945a3cee..bf13cd167e 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -6,10 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
@@ -19,10 +20,10 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
@@ -36,6 +37,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
@@ -47,7 +49,6 @@ CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
-# CONFIG_CMD_NET is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y
@@ -75,7 +76,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -92,13 +92,10 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 5b9c2cccdfdeb81adbd95163ea6c431777c0fe5c
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 17:15:29 2018 +0800

    sound: rockchip: add driver support for simple card
    
    This patch adds driver support for rockchip simple card.
    
    Change-Id: If6b0e2c8d5bbe5dff268d2b5abbdce5f3528282b
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index dbb43509f2..9f31d8d3c1 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -56,6 +56,12 @@ config SOUND_RK817
 	  Enable the rk809/rk817 audio codec. This is connected via I2S for
 	  audio data and I2C for codec control.
 
+config SOUND_ROCKCHIP
+	bool "Support Rockchip Simple Sound Card"
+	depends on I2S_ROCKCHIP
+	help
+	  Enable the Rockchip Simple Sound Card.
+
 config SOUND_SANDBOX
 	bool "Support sandbox emulated audio codec"
 	depends on SANDBOX && SOUND
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index acb0238a5e..f07887fd5d 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_SOUND_SANDBOX)	+= sandbox.o
 obj-$(CONFIG_SOUND_WM8994)	+= wm8994.o
 obj-$(CONFIG_SOUND_MAX98095)	+= max98095.o
 obj-$(CONFIG_SOUND_RK817)	+= rk817_codec.o
+obj-$(CONFIG_SOUND_ROCKCHIP)	+= rockchip-sound.o
diff --git a/drivers/sound/rockchip-sound.c b/drivers/sound/rockchip-sound.c
new file mode 100644
index 0000000000..cf58725907
--- /dev/null
+++ b/drivers/sound/rockchip-sound.c
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <dm.h>
+#include <malloc.h>
+#include <common.h>
+#include <asm/io.h>
+#include <libfdt.h>
+#include <fdtdec.h>
+#include <i2s.h>
+#include <sound.h>
+#include <asm/arch-rockchip/resource_img.h>
+
+#define WAV_SIZE		(5 * 1024 * 1024) /* BYTE */
+#define SAMPLERATE		44100
+
+static struct udevice *i2s_dev, *codec_dev;
+
+static int load_audio_wav(void *buf, const char *wav_name, int size)
+{
+	int ret = 0;
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	ret = rockchip_read_resource_file(buf, wav_name, 0, size);
+#endif
+
+	return ret;
+}
+
+static int sound_hw_params(struct udevice *dev, unsigned int samplerate,
+			   unsigned int fmt, unsigned int channels)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->hw_params)
+		return -ENOTSUPP;
+
+	return ops->hw_params(dev, samplerate, fmt, channels);
+}
+
+static int sound_startup(struct udevice *dev)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->startup)
+		return -ENOTSUPP;
+
+	return ops->startup(dev);
+}
+
+static int sound_set_sysclk(struct udevice *dev, unsigned int freq)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_sysclk)
+		return -ENOTSUPP;
+
+	return ops->set_sysclk(dev, freq);
+}
+
+int sound_init(const void *blob)
+{
+	int ret;
+
+	ret = uclass_get_device(UCLASS_I2S, 0, &i2s_dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get i2s device failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	ret = uclass_get_device(UCLASS_CODEC, 0, &codec_dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get codec device failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	sound_set_sysclk(i2s_dev, SAMPLERATE * 256);
+	sound_hw_params(i2s_dev, SAMPLERATE, 16, 2);
+	sound_hw_params(codec_dev, SAMPLERATE, 16, 2);
+	sound_startup(i2s_dev);
+	sound_startup(codec_dev);
+
+	return ret;
+}
+
+static int _sound_play(struct udevice *dev, unsigned int *data,
+		       unsigned long data_size)
+{
+	const struct snd_soc_dai_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->transfer)
+		return -ENOTSUPP;
+
+	return ops->transfer(dev, data, data_size);
+}
+
+int sound_play(u32 msec, u32 frequency)
+{
+	unsigned int *buf;
+	unsigned long buf_size;
+	unsigned int ret = 0;
+
+	buf_size = WAV_SIZE;
+
+	buf = malloc(buf_size);
+	if (!buf) {
+		debug("%s: buf malloc failed\n", __func__);
+		return -ENOMEM;
+	}
+	ret = load_audio_wav(buf, "boot.wav", buf_size);
+	/* if boot.wav not find, use sound_create_square_wave */
+	if (ret <= 0)
+		sound_create_square_wave((unsigned short *)buf,
+					 buf_size / sizeof(unsigned short),
+					 frequency);
+
+	ret = _sound_play(i2s_dev, buf, (buf_size / sizeof(int)));
+	free(buf);
+
+	return ret;
+}

commit 4afb7f9c57158713fb4381cb9584975983abac3b
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 17:01:05 2018 +0800

    sound: rockchip: add driver support for rk809/rk817
    
    This patch adds driver support for rockchip rk809/rk817.
    
    Change-Id: I0e8355fa6dffb23d8413c0b3a198757aa2d2360c
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index ec75f5220a..dbb43509f2 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -49,6 +49,13 @@ config SOUND_MAX98095
 	  audio data and I2C for codec control. At present it only works
 	  with the Samsung I2S driver.
 
+config SOUND_RK817
+	bool "Support Rockchip rk809/rk817 audio codec"
+	depends on I2S_ROCKCHIP && PMIC_RK8XX
+	help
+	  Enable the rk809/rk817 audio codec. This is connected via I2S for
+	  audio data and I2C for codec control.
+
 config SOUND_SANDBOX
 	bool "Support sandbox emulated audio codec"
 	depends on SANDBOX && SOUND
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index 21dfcae3a3..acb0238a5e 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_I2S_SAMSUNG)	+= samsung-i2s.o
 obj-$(CONFIG_SOUND_SANDBOX)	+= sandbox.o
 obj-$(CONFIG_SOUND_WM8994)	+= wm8994.o
 obj-$(CONFIG_SOUND_MAX98095)	+= max98095.o
+obj-$(CONFIG_SOUND_RK817)	+= rk817_codec.o
diff --git a/drivers/sound/rk817_codec.c b/drivers/sound/rk817_codec.c
new file mode 100644
index 0000000000..b753d7e828
--- /dev/null
+++ b/drivers/sound/rk817_codec.c
@@ -0,0 +1,368 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+#include <sound.h>
+#include "rk817_codec.h"
+
+#define DBG(format, ...) \
+		printf("RK817: " format, ## __VA_ARGS__)
+
+/* For route */
+#define RK817_CODEC_PLAYBACK	1
+#define RK817_CODEC_CAPTURE	2
+#define RK817_CODEC_INCALL	4
+#define RK817_CODEC_ALL	(RK817_CODEC_PLAYBACK |\
+	RK817_CODEC_CAPTURE | RK817_CODEC_INCALL)
+
+/*
+ * DDAC L/R volume setting
+ * 0db~-95db,0.375db/step,for example:
+ * 0: 0dB
+ * 0x0a: -3.75dB
+ * 0x7d: -46dB
+ * 0xff: -95dB
+ */
+#define OUT_VOLUME	(0x03)
+
+#define CODEC_SET_SPK 1
+#define CODEC_SET_HP 2
+#define INITIAL_VOLUME	3
+
+struct rk817_codec_priv {
+	struct udevice *dev;
+	struct rk8xx_priv *rk817;
+	unsigned int stereo_sysclk;
+	unsigned int rate;
+	unsigned int spk_volume;
+	unsigned int hp_volume;
+	bool use_ext_amplifier;
+	long int playback_path;
+	int spk_mute_delay;
+	int hp_mute_delay;
+};
+
+static int snd_soc_write(struct udevice *dev, unsigned int reg,
+			 unsigned int val)
+{
+	return pmic_reg_write(dev, reg, val);
+}
+
+static int snd_soc_update_bits(struct udevice *dev, unsigned int reg,
+			       unsigned int mask, unsigned int value)
+{
+	return pmic_clrsetbits(dev, reg, mask, value);
+}
+
+static int rk817_reset(struct rk817_codec_priv *priv)
+{
+	struct udevice *codec = priv->dev->parent;
+
+	snd_soc_write(codec, RK817_CODEC_DTOP_LPT_SRST, 0x40);
+	snd_soc_write(codec, RK817_CODEC_DDAC_POPD_DACST, 0x02);
+
+	return 0;
+}
+
+static struct rk817_reg_val_typ playback_power_up_list[] = {
+	{RK817_CODEC_AREF_RTCFG1, 0x40},
+	{RK817_CODEC_DDAC_POPD_DACST, 0x02},
+	{RK817_CODEC_DDAC_SR_LMT0, 0x02},
+	/* {RK817_CODEC_DTOP_DIGEN_CLKE, 0x0f}, */
+	/* APLL */
+	{RK817_CODEC_APLL_CFG0, 0x04},
+	{RK817_CODEC_APLL_CFG1, 0x58},
+	{RK817_CODEC_APLL_CFG2, 0x2d},
+	{RK817_CODEC_APLL_CFG3, 0x0c},
+	{RK817_CODEC_APLL_CFG4, 0xa5},
+	{RK817_CODEC_APLL_CFG5, 0x00},
+
+	{RK817_CODEC_DI2S_RXCMD_TSD, 0x00},
+	{RK817_CODEC_DI2S_RSD, 0x00},
+	/* {RK817_CODEC_DI2S_CKM, 0x00}, */
+	{RK817_CODEC_DI2S_RXCR1, 0x00},
+	{RK817_CODEC_DI2S_RXCMD_TSD, 0x20},
+	{RK817_CODEC_DTOP_VUCTIME, 0xf4},
+	{RK817_CODEC_DDAC_MUTE_MIXCTL, 0x00},
+
+	{RK817_CODEC_DDAC_VOLL, 0x0a},
+	{RK817_CODEC_DDAC_VOLR, 0x0a},
+};
+
+#define RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN \
+	ARRAY_SIZE(playback_power_up_list)
+
+static struct rk817_reg_val_typ playback_power_down_list[] = {
+	{RK817_CODEC_DDAC_MUTE_MIXCTL, 0x01},
+	{RK817_CODEC_ADAC_CFG1, 0x0f},
+	/* HP */
+	{RK817_CODEC_AHP_CFG0, 0xe0},
+	{RK817_CODEC_AHP_CP, 0x09},
+	/* SPK */
+	{RK817_CODEC_ACLASSD_CFG1, 0x69},
+};
+
+#define RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN \
+	ARRAY_SIZE(playback_power_down_list)
+
+static int rk817_codec_power_up(struct rk817_codec_priv *rk817, int type)
+{
+	struct udevice *codec = rk817->dev->parent;
+	int i;
+
+	DBG("%s : power up %s %s %s\n", __func__,
+	    type & RK817_CODEC_PLAYBACK ? "playback" : "",
+	    type & RK817_CODEC_CAPTURE ? "capture" : "",
+	    type & RK817_CODEC_INCALL ? "incall" : "");
+
+	if (type & RK817_CODEC_PLAYBACK) {
+		snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
+				    DAC_DIG_CLK_MASK, DAC_DIG_CLK_EN);
+		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN; i++) {
+			snd_soc_write(codec, playback_power_up_list[i].reg,
+				      playback_power_up_list[i].value);
+		}
+	}
+
+	return 0;
+}
+
+static int rk817_codec_power_down(struct rk817_codec_priv *rk817, int type)
+{
+	struct udevice *codec = rk817->dev->parent;
+	int i;
+
+	DBG("%s : power down %s %s %s\n", __func__,
+	    type & RK817_CODEC_PLAYBACK ? "playback" : "",
+	    type & RK817_CODEC_CAPTURE ? "capture" : "",
+	    type & RK817_CODEC_INCALL ? "incall" : "");
+
+	/* mute output for pop noise */
+	if ((type & RK817_CODEC_PLAYBACK) ||
+	    (type & RK817_CODEC_INCALL)) {
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_ENABLE);
+	}
+
+	if (type & RK817_CODEC_PLAYBACK) {
+		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
+			snd_soc_write(codec, playback_power_down_list[i].reg,
+				      playback_power_down_list[i].value);
+		}
+		snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
+				    DAC_DIG_CLK_MASK, DAC_DIG_CLK_DIS);
+	}
+
+	if (type == RK817_CODEC_ALL) {
+		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
+			snd_soc_write(codec, playback_power_down_list[i].reg,
+				      playback_power_down_list[i].value);
+		}
+		snd_soc_write(codec, RK817_CODEC_DTOP_DIGEN_CLKE, 0x00);
+		snd_soc_write(codec, RK817_CODEC_APLL_CFG5, 0x01);
+		snd_soc_write(codec, RK817_CODEC_AREF_RTCFG1, 0x06);
+	}
+
+	return 0;
+}
+
+static int rk817_playback_path_put(struct rk817_codec_priv *rk817, int path)
+{
+	struct udevice *codec = rk817->dev->parent;
+	long int pre_path;
+
+	if (rk817->playback_path == path) {
+		DBG("%s : playback_path is not changed!\n", __func__);
+		return 0;
+	}
+
+	pre_path = rk817->playback_path;
+	rk817->playback_path = path;
+
+	DBG("%s : set playback_path %ld, pre_path %ld\n",
+	    __func__, rk817->playback_path, pre_path);
+
+	switch (rk817->playback_path) {
+	case OFF:
+		rk817_codec_power_down(rk817, RK817_CODEC_PLAYBACK);
+		break;
+	case RCV:
+	case SPK_PATH:
+	case RING_SPK:
+		if (pre_path == OFF)
+			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
+		if (!rk817->use_ext_amplifier) {
+			/* power on dac ibias/l/r */
+			snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+				      PWD_DACBIAS_ON | PWD_DACD_ON |
+				      PWD_DACL_ON | PWD_DACR_ON);
+			/* CLASS D mode */
+			snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
+			/* CLASS D enable */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
+			/* restart CLASS D, OCPP/N */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
+		} else {
+			/* HP_CP_EN , CP 2.3V */
+			snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
+			/* power on HP two stage opamp ,HP amplitude 0db */
+			snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
+			/* power on dac ibias/l/r */
+			snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+				      PWD_DACBIAS_ON | PWD_DACD_DOWN |
+				      PWD_DACL_ON | PWD_DACR_ON);
+			snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+					    DACMT_ENABLE, DACMT_DISABLE);
+		}
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->spk_volume);
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->spk_volume);
+		break;
+	case HP_PATH:
+	case HP_NO_MIC:
+	case RING_HP:
+	case RING_HP_NO_MIC:
+		if (pre_path == OFF)
+			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
+		/* HP_CP_EN , CP 2.3V */
+		snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
+		/* power on HP two stage opamp ,HP amplitude 0db */
+		snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
+		/* power on dac ibias/l/r */
+		snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+			      PWD_DACBIAS_ON | PWD_DACD_DOWN |
+			      PWD_DACL_ON | PWD_DACR_ON);
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_DISABLE);
+
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
+		break;
+	case BT:
+		break;
+	case SPK_HP:
+	case RING_SPK_HP:
+		if (pre_path == OFF)
+			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
+
+		/* HP_CP_EN , CP 2.3V  */
+		snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
+		/* power on HP two stage opamp ,HP amplitude 0db */
+		snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
+
+		/* power on dac ibias/l/r */
+		snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
+			      PWD_DACBIAS_ON | PWD_DACD_ON |
+			      PWD_DACL_ON | PWD_DACR_ON);
+
+		if (!rk817->use_ext_amplifier) {
+			/* CLASS D mode */
+			snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
+			/* CLASS D enable */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
+			/* restart CLASS D, OCPP/N */
+			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
+		}
+
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
+		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rk817_hw_params(struct udevice *dev, unsigned int samplerate,
+			   unsigned int fmt, unsigned int channels)
+{
+	struct rk817_codec_priv *rk817 = dev_get_priv(dev);
+	struct udevice *codec = rk817->dev->parent;
+
+	snd_soc_update_bits(codec, RK817_CODEC_DI2S_CKM,
+			    RK817_I2S_MODE_MASK, RK817_I2S_MODE_SLV);
+	snd_soc_write(codec, RK817_CODEC_DI2S_RXCR2, VDW_RX_16BITS);
+	snd_soc_write(codec, RK817_CODEC_DI2S_TXCR2, VDW_TX_16BITS);
+
+	return 0;
+}
+
+static int rk817_digital_mute(struct rk817_codec_priv *rk817, int mute)
+{
+	struct udevice *codec = rk817->dev->parent;
+
+	if (mute)
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_ENABLE);
+	else
+		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
+				    DACMT_ENABLE, DACMT_DISABLE);
+
+	return 0;
+}
+
+static int rk817_startup(struct udevice *dev)
+{
+	struct rk817_codec_priv *rk817 = dev_get_priv(dev);
+
+	rk817_playback_path_put(rk817, SPK_HP);
+	rk817_digital_mute(rk817, 0);
+
+	return 0;
+}
+
+static const struct snd_soc_dai_ops rk817_codec_ops = {
+	.hw_params = rk817_hw_params,
+	.startup = rk817_startup,
+};
+
+static int rk817_codec_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *rk817 = dev_get_priv(dev->parent);
+	struct rk817_codec_priv *rk817_codec = dev_get_priv(dev);
+
+	if (!rk817) {
+		printf("%s : rk817 is null\n", __func__);
+		return -EINVAL;
+	}
+
+	switch (rk817->variant) {
+	case RK809_ID:
+	case RK817_ID:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	rk817_codec->dev = dev;
+	rk817_codec->hp_volume = INITIAL_VOLUME;
+	rk817_codec->spk_volume = INITIAL_VOLUME;
+	rk817_codec->playback_path = OFF;
+	rk817_reset(rk817_codec);
+
+	return 0;
+}
+
+static const struct udevice_id rk817_codec_ids[] = {
+	{ .compatible = "rockchip,rk817-codec" },
+	{ }
+};
+
+U_BOOT_DRIVER(rk817) = {
+	.name = "rk817_codec",
+	.id = UCLASS_CODEC,
+	.of_match = rk817_codec_ids,
+	.probe = rk817_codec_probe,
+	.priv_auto_alloc_size = sizeof(struct rk817_codec_priv),
+	.ops = &rk817_codec_ops,
+};
+
+UCLASS_DRIVER(codec) = {
+	.id = UCLASS_CODEC,
+	.name = "codec",
+};
diff --git a/drivers/sound/rk817_codec.h b/drivers/sound/rk817_codec.h
new file mode 100644
index 0000000000..d4956a1e5c
--- /dev/null
+++ b/drivers/sound/rk817_codec.h
@@ -0,0 +1,203 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __RK817_CODEC_H__
+#define __RK817_CODEC_H__
+
+/* codec register */
+#define RK817_CODEC_BASE		0x0000
+
+#define RK817_CODEC_DTOP_VUCTL		(RK817_CODEC_BASE + 0x12)
+#define RK817_CODEC_DTOP_VUCTIME	(RK817_CODEC_BASE + 0x13)
+#define RK817_CODEC_DTOP_LPT_SRST	(RK817_CODEC_BASE + 0x14)
+#define RK817_CODEC_DTOP_DIGEN_CLKE	(RK817_CODEC_BASE + 0x15)
+#define RK817_CODEC_AREF_RTCFG0		(RK817_CODEC_BASE + 0x16)
+#define RK817_CODEC_AREF_RTCFG1		(RK817_CODEC_BASE + 0x17)
+#define RK817_CODEC_AADC_CFG0		(RK817_CODEC_BASE + 0x18)
+#define RK817_CODEC_AADC_CFG1		(RK817_CODEC_BASE + 0x19)
+#define RK817_CODEC_DADC_VOLL		(RK817_CODEC_BASE + 0x1a)
+#define RK817_CODEC_DADC_VOLR		(RK817_CODEC_BASE + 0x1b)
+#define RK817_CODEC_DADC_SR_ACL0	(RK817_CODEC_BASE + 0x1e)
+#define RK817_CODEC_DADC_ALC1		(RK817_CODEC_BASE + 0x1f)
+#define RK817_CODEC_DADC_ALC2		(RK817_CODEC_BASE + 0x20)
+#define RK817_CODEC_DADC_NG		(RK817_CODEC_BASE + 0x21)
+#define RK817_CODEC_DADC_HPF		(RK817_CODEC_BASE + 0x22)
+#define RK817_CODEC_DADC_RVOLL		(RK817_CODEC_BASE + 0x23)
+#define RK817_CODEC_DADC_RVOLR		(RK817_CODEC_BASE + 0x24)
+#define RK817_CODEC_AMIC_CFG0		(RK817_CODEC_BASE + 0x27)
+#define RK817_CODEC_AMIC_CFG1		(RK817_CODEC_BASE + 0x28)
+#define RK817_CODEC_DMIC_PGA_GAIN	(RK817_CODEC_BASE + 0x29)
+#define RK817_CODEC_DMIC_LMT1		(RK817_CODEC_BASE + 0x2a)
+#define RK817_CODEC_DMIC_LMT2		(RK817_CODEC_BASE + 0x2b)
+#define RK817_CODEC_DMIC_NG1		(RK817_CODEC_BASE + 0x2c)
+#define RK817_CODEC_DMIC_NG2		(RK817_CODEC_BASE + 0x2d)
+#define RK817_CODEC_ADAC_CFG0		(RK817_CODEC_BASE + 0x2e)
+#define RK817_CODEC_ADAC_CFG1		(RK817_CODEC_BASE + 0x2f)
+#define RK817_CODEC_DDAC_POPD_DACST	(RK817_CODEC_BASE + 0x30)
+#define RK817_CODEC_DDAC_VOLL		(RK817_CODEC_BASE + 0x31)
+#define RK817_CODEC_DDAC_VOLR		(RK817_CODEC_BASE + 0x32)
+#define RK817_CODEC_DDAC_SR_LMT0	(RK817_CODEC_BASE + 0x35)
+#define RK817_CODEC_DDAC_LMT1		(RK817_CODEC_BASE + 0x36)
+#define RK817_CODEC_DDAC_LMT2		(RK817_CODEC_BASE + 0x37)
+#define RK817_CODEC_DDAC_MUTE_MIXCTL	(RK817_CODEC_BASE + 0x38)
+#define RK817_CODEC_DDAC_RVOLL		(RK817_CODEC_BASE + 0x39)
+#define RK817_CODEC_DDAC_RVOLR		(RK817_CODEC_BASE + 0x3a)
+#define RK817_CODEC_AHP_ANTI0		(RK817_CODEC_BASE + 0x3b)
+#define RK817_CODEC_AHP_ANTI1		(RK817_CODEC_BASE + 0x3c)
+#define RK817_CODEC_AHP_CFG0		(RK817_CODEC_BASE + 0x3d)
+#define RK817_CODEC_AHP_CFG1		(RK817_CODEC_BASE + 0x3e)
+#define RK817_CODEC_AHP_CP		(RK817_CODEC_BASE + 0x3f)
+#define RK817_CODEC_ACLASSD_CFG1	(RK817_CODEC_BASE + 0x40)
+#define RK817_CODEC_ACLASSD_CFG2	(RK817_CODEC_BASE + 0x41)
+#define RK817_CODEC_APLL_CFG0		(RK817_CODEC_BASE + 0x42)
+#define RK817_CODEC_APLL_CFG1		(RK817_CODEC_BASE + 0x43)
+#define RK817_CODEC_APLL_CFG2		(RK817_CODEC_BASE + 0x44)
+#define RK817_CODEC_APLL_CFG3		(RK817_CODEC_BASE + 0x45)
+#define RK817_CODEC_APLL_CFG4		(RK817_CODEC_BASE + 0x46)
+#define RK817_CODEC_APLL_CFG5		(RK817_CODEC_BASE + 0x47)
+#define RK817_CODEC_DI2S_CKM		(RK817_CODEC_BASE + 0x48)
+#define RK817_CODEC_DI2S_RSD		(RK817_CODEC_BASE + 0x49)
+#define RK817_CODEC_DI2S_RXCR1		(RK817_CODEC_BASE + 0x4a)
+#define RK817_CODEC_DI2S_RXCR2		(RK817_CODEC_BASE + 0x4b)
+#define RK817_CODEC_DI2S_RXCMD_TSD	(RK817_CODEC_BASE + 0x4c)
+#define RK817_CODEC_DI2S_TXCR1		(RK817_CODEC_BASE + 0x4d)
+#define RK817_CODEC_DI2S_TXCR2		(RK817_CODEC_BASE + 0x4e)
+#define RK817_CODEC_DI2S_TXCR3_TXCMD	(RK817_CODEC_BASE + 0x4f)
+
+/* RK817_CODEC_DTOP_DIGEN_CLKE */
+#define ADC_DIG_CLK_MASK		(0xf << 4)
+#define ADC_DIG_CLK_SFT			4
+#define ADC_DIG_CLK_DIS			(0x0 << 4)
+#define ADC_DIG_CLK_EN			(0xf << 4)
+
+#define DAC_DIG_CLK_MASK		(0xf << 0)
+#define DAC_DIG_CLK_SFT			0
+#define DAC_DIG_CLK_DIS			(0x0 << 0)
+#define DAC_DIG_CLK_EN			(0xf << 0)
+
+/* RK817_CODEC_APLL_CFG5 */
+#define PLL_PW_DOWN			(0x01 << 0)
+#define PLL_PW_UP			(0x00 << 0)
+
+/* RK817_CODEC_DI2S_CKM */
+#define PDM_EN_MASK			(0x1 << 3)
+#define PDM_EN_SFT			3
+#define PDM_EN_DISABLE			(0x0 << 3)
+#define PDM_EN_ENABLE			(0x1 << 3)
+
+#define SCK_EN_ENABLE			(0x1 << 2)
+#define SCK_EN_DISABLE			(0x0 << 2)
+
+#define RK817_I2S_MODE_MASK		(0x1 << 0)
+#define RK817_I2S_MODE_SFT		0
+#define RK817_I2S_MODE_MST		(0x1 << 0)
+#define RK817_I2S_MODE_SLV		(0x0 << 0)
+
+/* RK817_CODEC_DDAC_MUTE_MIXCTL */
+#define DACMT_ENABLE			(0x1 << 0)
+#define DACMT_DISABLE			(0x0 << 0)
+
+/* RK817_CODEC_DI2S_RXCR2 */
+#define VDW_RX_24BITS			(0x17)
+#define VDW_RX_16BITS			(0x0f)
+/* RK817_CODEC_DI2S_TXCR2 */
+#define VDW_TX_24BITS			(0x17)
+#define VDW_TX_16BITS			(0x0f)
+
+/* RK817_CODEC_AHP_CFG1 */
+#define HP_ANTIPOP_ENABLE		(0x1 << 4)
+#define HP_ANTIPOP_DISABLE		(0x0 << 4)
+
+/* RK817_CODEC_ADAC_CFG1 */
+#define PWD_DACBIAS_MASK		(0x1 << 3)
+#define PWD_DACBIAS_SFT			3
+#define PWD_DACBIAS_DOWN		(0x1 << 3)
+#define PWD_DACBIAS_ON			(0x0 << 3)
+
+#define PWD_DACD_MASK			(0x1 << 2)
+#define PWD_DACD_SFT			2
+#define PWD_DACD_DOWN			(0x1 << 2)
+#define PWD_DACD_ON			(0x0 << 2)
+
+#define PWD_DACL_MASK			(0x1 << 1)
+#define PWD_DACL_SFT			1
+#define PWD_DACL_DOWN			(0x1 << 1)
+#define PWD_DACL_ON			(0x0 << 1)
+
+#define PWD_DACR_MASK			(0x1 << 0)
+#define PWD_DACR_SFT			0
+#define PWD_DACR_DOWN			(0x1 << 0)
+#define PWD_DACR_ON			(0x0 << 0)
+
+/* RK817_CODEC_AADC_CFG0 */
+#define ADC_L_PWD_MASK			(0x1 << 7)
+#define ADC_L_PWD_SFT			7
+#define ADC_L_PWD_DIS			(0x0 << 7)
+#define ADC_L_PWD_EN			(0x1 << 7)
+
+#define ADC_R_PWD_MASK			(0x1 << 6)
+#define ADC_R_PWD_SFT			6
+#define ADC_R_PWD_DIS			(0x0 << 6)
+#define ADC_R_PWD_EN			(0x1 << 6)
+
+/* RK817_CODEC_AMIC_CFG0 */
+#define MIC_DIFF_MASK			(0x1 << 7)
+#define MIC_DIFF_SFT			7
+#define MIC_DIFF_DIS			(0x0 << 7)
+#define MIC_DIFF_EN			(0x1 << 7)
+
+#define PWD_PGA_L_MASK			(0x1 << 5)
+#define PWD_PGA_L_SFT			5
+#define PWD_PGA_L_DIS			(0x0 << 5)
+#define PWD_PGA_L_EN			(0x1 << 5)
+
+#define PWD_PGA_R_MASK			(0x1 << 4)
+#define PWD_PGA_R_SFT			4
+#define PWD_PGA_R_DIS			(0x0 << 4)
+#define PWD_PGA_R_EN			(0x1 << 4)
+
+enum {
+	RK817_HIFI,
+	RK817_VOICE,
+};
+
+enum {
+	RK817_MONO = 1,
+	RK817_STEREO,
+};
+
+enum {
+	OFF,
+	RCV,
+	SPK_PATH,
+	HP_PATH,
+	HP_NO_MIC,
+	BT,
+	SPK_HP,
+	RING_SPK,
+	RING_HP,
+	RING_HP_NO_MIC,
+	RING_SPK_HP,
+};
+
+enum {
+	MIC_OFF,
+	MAIN_MIC,
+	HANDS_FREE_MIC,
+	BT_SCO_MIC,
+};
+
+struct rk817_reg_val_typ {
+	unsigned int reg;
+	unsigned int value;
+};
+
+struct rk817_init_bit_typ {
+	unsigned int reg;
+	unsigned int power_bit;
+	unsigned int init_bit;
+};
+
+#endif /* __RK817_CODEC_H__ */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index ed58b5d89c..fdfa9b5f58 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -31,6 +31,7 @@ enum uclass_id {
 	UCLASS_BLK,		/* Block device */
 	UCLASS_CLK,		/* Clock source, e.g. used by peripherals */
 	UCLASS_CPU,		/* CPU, typically part of an SoC */
+	UCLASS_CODEC,		/* audio codec */
 	UCLASS_CROS_EC,		/* Chrome OS EC */
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
 	UCLASS_DMA,		/* Direct Memory Access */

commit 7a5efcbd6704ebbdcd1b6d46ae7f1bd6c6e96a9f
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 16:50:29 2018 +0800

    power: pmic: rk8xx: bind codec for rk809/rk817
    
    Change-Id: I600f49799dde318d46e349264f568e38225a6414
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index d9abd6de6f..7ad88b75b7 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -44,6 +44,11 @@ static const struct pmic_child_info fuel_gauge_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info rk817_codec_info[] = {
+	{ .prefix = "codec", .driver = "rk817_codec"},
+	{ },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
 	return RK808_NUM_OF_REGS;
@@ -146,6 +151,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, rk817_codec_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	/* Always return success for this device */
 	return 0;
 }

commit 69ab2873d7dfde4d3bde450cbbcd415ad5a6a883
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 16:31:49 2018 +0800

    sound: rockchip: add support for i2s
    
    This patch add driver support for rockchip i2s bus.
    
    Change-Id: I2c7f2b46d628706fa000055f7962ba6b4ff6d0b6
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig
index 5de86c05c6..ec75f5220a 100644
--- a/drivers/sound/Kconfig
+++ b/drivers/sound/Kconfig
@@ -31,6 +31,16 @@ config I2S_SAMSUNG
 	  option provides an implementation for sound_init() and
 	  sound_play().
 
+config I2S_ROCKCHIP
+	bool "Enable I2S support for rockchip SoCs"
+	depends on SOUND
+	help
+	  Rockchip SoCs support an I2S interface for sending audio
+	  data to an audio codec. This option enables support for this,
+	  using one of the available audio codec drivers. Enabling this
+	  option provides an implementation for sound_init() and
+	  sound_play().
+
 config SOUND_MAX98095
 	bool "Support Maxim max98095 audio codec"
 	depends on I2S_SAMSUNG
diff --git a/drivers/sound/Makefile b/drivers/sound/Makefile
index 981ed614b1..21dfcae3a3 100644
--- a/drivers/sound/Makefile
+++ b/drivers/sound/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_SOUND)	+= sound.o
 obj-$(CONFIG_I2S)	+= sound-i2s.o
+obj-$(CONFIG_I2S_ROCKCHIP)	+= rockchip-i2s.o
 obj-$(CONFIG_I2S_SAMSUNG)	+= samsung-i2s.o
 obj-$(CONFIG_SOUND_SANDBOX)	+= sandbox.o
 obj-$(CONFIG_SOUND_WM8994)	+= wm8994.o
diff --git a/drivers/sound/rockchip-i2s.c b/drivers/sound/rockchip-i2s.c
new file mode 100644
index 0000000000..f1f9bf21ab
--- /dev/null
+++ b/drivers/sound/rockchip-i2s.c
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <sound.h>
+#include "rockchip-i2s.h"
+
+#define I2S_FIFO_LENGTH (31)
+
+struct rk_i2s_dev {
+	void *regbase;
+	struct clk mclk;
+};
+
+static inline u32 i2s_reg_readl(struct rk_i2s_dev *dev, u32 offset)
+{
+	return readl(dev->regbase + offset);
+}
+
+static inline void i2s_reg_writel(struct rk_i2s_dev *dev, u32 offset, u32 val)
+{
+	writel(val, dev->regbase + offset);
+}
+
+static inline void i2s_reg_update_bits(struct rk_i2s_dev *dev, u32 offset,
+				       u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = readl(dev->regbase + offset);
+
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+
+	if (tmp != orig)
+		writel(tmp, dev->regbase + offset);
+}
+
+static void dump_regs(struct rk_i2s_dev *dev)
+{
+	int i = 0;
+
+	for (i = 0; i <= I2S_RXDR; i += 4)
+		debug("0x%02x: 0x%08x\n", i, readl(dev->regbase + i));
+}
+
+static int rk_i2s_hw_params(struct udevice *udev, unsigned int samplerate,
+			    unsigned int fmt, unsigned int channels)
+{
+	struct rk_i2s_dev *dev = dev_get_priv(udev);
+
+	/* set fmt */
+	i2s_reg_update_bits(dev, I2S_CKR,
+			    I2S_CKR_MSS_MASK, I2S_CKR_MSS_MASTER);
+	i2s_reg_update_bits(dev, I2S_TXCR,
+			    I2S_TXCR_IBM_MASK, I2S_TXCR_IBM_NORMAL);
+	i2s_reg_update_bits(dev, I2S_RXCR,
+			    I2S_RXCR_IBM_MASK, I2S_RXCR_IBM_NORMAL);
+	/* set div */
+	i2s_reg_update_bits(dev, I2S_CKR,
+			    I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK,
+			    I2S_CKR_TSD(64) | I2S_CKR_RSD(64));
+	i2s_reg_update_bits(dev, I2S_CKR,
+			    I2S_CKR_MDIV_MASK, I2S_CKR_MDIV(4));
+	/* set hwparams */
+	i2s_reg_update_bits(dev, I2S_TXCR,
+			    I2S_TXCR_VDW_MASK |
+			    I2S_TXCR_CSR_MASK,
+			    I2S_TXCR_VDW(16) |
+			    I2S_TXCR_CHN_2);
+	i2s_reg_update_bits(dev, I2S_RXCR,
+			    I2S_RXCR_CSR_MASK |
+			    I2S_RXCR_VDW_MASK,
+			    I2S_TXCR_VDW(16) |
+			    I2S_TXCR_CHN_2);
+	i2s_reg_update_bits(dev, I2S_DMACR,
+			    I2S_DMACR_TDL_MASK | I2S_DMACR_RDL_MASK,
+			    I2S_DMACR_TDL(16) | I2S_DMACR_RDL(16));
+
+	return 0;
+}
+
+static void rk_i2s_txctrl(struct rk_i2s_dev *dev, int on)
+{
+	if (on) {
+		i2s_reg_update_bits(dev, I2S_XFER,
+				    I2S_XFER_TXS_MASK | I2S_XFER_RXS_MASK,
+				    I2S_XFER_TXS_START | I2S_XFER_RXS_START);
+	} else {
+		i2s_reg_update_bits(dev, I2S_XFER,
+				    I2S_XFER_TXS_MASK |
+				    I2S_XFER_RXS_MASK,
+				    I2S_XFER_TXS_STOP |
+				    I2S_XFER_RXS_STOP);
+
+		i2s_reg_update_bits(dev, I2S_CLR,
+				    I2S_CLR_TXC_MASK | I2S_CLR_RXC_MASK,
+				    I2S_CLR_TXC | I2S_CLR_RXC);
+	}
+}
+
+static int rk_i2s_transfer_tx_data(struct udevice *udev, unsigned int *data,
+				   unsigned long data_size)
+{
+	struct rk_i2s_dev *dev = dev_get_priv(udev);
+	u32 val;
+
+	if (data_size < I2S_FIFO_LENGTH) {
+		debug("%s : invalid data size\n", __func__);
+		return -EINVAL;
+	}
+
+	rk_i2s_txctrl(dev, 1);
+	while (data_size > 0) {
+		val = i2s_reg_readl(dev, I2S_FIFOLR);
+		if (val < I2S_FIFO_LENGTH) {
+			i2s_reg_writel(dev, I2S_TXDR, *data++);
+			data_size--;
+		}
+	}
+
+	return 0;
+}
+
+static int rk_i2s_set_sysclk(struct udevice *dev, unsigned int freq)
+{
+	struct rk_i2s_dev *i2s = dev_get_priv(dev);
+
+	clk_set_rate(&i2s->mclk, freq);
+
+	return 0;
+}
+
+static const struct snd_soc_dai_ops rockchip_i2s_ops = {
+	.hw_params = rk_i2s_hw_params,
+	.set_sysclk = rk_i2s_set_sysclk,
+	.transfer = rk_i2s_transfer_tx_data,
+};
+
+static int rockchip_i2s_probe(struct udevice *dev)
+{
+	struct rk_i2s_dev *i2s = dev_get_priv(dev);
+	int ret;
+
+	i2s->regbase = dev_read_addr_ptr(dev);
+
+	ret = clk_get_by_name(dev, "i2s_clk", &i2s->mclk);
+	if (ret) {
+		printf("%s get i2s mclk fail!\n", __func__);
+		return -EINVAL;
+	}
+
+	dump_regs(i2s);
+	return 0;
+}
+
+static const struct udevice_id rockchip_i2s_ids[] = {
+	{ .compatible = "rockchip,px30-i2s", },
+	{ .compatible = "rockchip,rk3036-i2s", },
+	{ .compatible = "rockchip,rk3066-i2s", },
+	{ .compatible = "rockchip,rk3128-i2s", },
+	{ .compatible = "rockchip,rk3188-i2s", },
+	{ .compatible = "rockchip,rk3288-i2s", },
+	{ .compatible = "rockchip,rk3328-i2s", },
+	{ .compatible = "rockchip,rk3368-i2s", },
+	{ .compatible = "rockchip,rk3399-i2s", },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_i2s) = {
+	.name = "rockchip_i2s",
+	.id = UCLASS_I2S,
+	.of_match = rockchip_i2s_ids,
+	.probe = rockchip_i2s_probe,
+	.priv_auto_alloc_size = sizeof(struct rk_i2s_dev),
+	.ops = &rockchip_i2s_ops,
+};
+
+UCLASS_DRIVER(i2s) = {
+	.id = UCLASS_I2S,
+	.name = "i2s_bus",
+};
diff --git a/drivers/sound/rockchip-i2s.h b/drivers/sound/rockchip-i2s.h
new file mode 100644
index 0000000000..977d2d3202
--- /dev/null
+++ b/drivers/sound/rockchip-i2s.h
@@ -0,0 +1,209 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ROCKCHIP_I2S_H__
+#define __ROCKCHIP_I2S_H__
+
+/* I2S REGS */
+#define I2S_TXCR	(0x0000)
+#define I2S_RXCR	(0x0004)
+#define I2S_CKR		(0x0008)
+#define I2S_FIFOLR	(0x000c)
+#define I2S_DMACR	(0x0010)
+#define I2S_INTCR	(0x0014)
+#define I2S_INTSR	(0x0018)
+#define I2S_XFER	(0x001c)
+#define I2S_CLR		(0x0020)
+#define I2S_TXDR	(0x0024)
+#define I2S_RXDR	(0x0028)
+
+/*
+ * TXCR
+ * transmit operation control register
+ */
+#define I2S_TXCR_RCNT_SHIFT	17
+#define I2S_TXCR_RCNT_MASK	(0x3f << I2S_TXCR_RCNT_SHIFT)
+#define I2S_TXCR_CSR_SHIFT	15
+#define I2S_TXCR_CSR(x)		(x << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_2		(0 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_4		(1 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_6		(2 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CHN_8		(3 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_CSR_MASK	(3 << I2S_TXCR_CSR_SHIFT)
+#define I2S_TXCR_HWT		BIT(14)
+#define I2S_TXCR_SJM_SHIFT	12
+#define I2S_TXCR_SJM_R		(0 << I2S_TXCR_SJM_SHIFT)
+#define I2S_TXCR_SJM_L		(1 << I2S_TXCR_SJM_SHIFT)
+#define I2S_TXCR_FBM_SHIFT	11
+#define I2S_TXCR_FBM_MSB	(0 << I2S_TXCR_FBM_SHIFT)
+#define I2S_TXCR_FBM_LSB	(1 << I2S_TXCR_FBM_SHIFT)
+#define I2S_TXCR_IBM_SHIFT	9
+#define I2S_TXCR_IBM_NORMAL	(0 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_IBM_LSJM	(1 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_IBM_RSJM	(2 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_IBM_MASK	(3 << I2S_TXCR_IBM_SHIFT)
+#define I2S_TXCR_PBM_SHIFT	7
+#define I2S_TXCR_PBM_MODE(x)	(x << I2S_TXCR_PBM_SHIFT)
+#define I2S_TXCR_PBM_MASK	(3 << I2S_TXCR_PBM_SHIFT)
+#define I2S_TXCR_TFS_SHIFT	5
+#define I2S_TXCR_TFS_I2S	(0 << I2S_TXCR_TFS_SHIFT)
+#define I2S_TXCR_TFS_PCM	(1 << I2S_TXCR_TFS_SHIFT)
+#define I2S_TXCR_TFS_MASK	(1 << I2S_TXCR_TFS_SHIFT)
+#define I2S_TXCR_VDW_SHIFT	0
+#define I2S_TXCR_VDW(x)		((x - 1) << I2S_TXCR_VDW_SHIFT)
+#define I2S_TXCR_VDW_MASK	(0x1f << I2S_TXCR_VDW_SHIFT)
+
+/*
+ * RXCR
+ * receive operation control register
+ */
+#define I2S_RXCR_CSR_SHIFT	15
+#define I2S_RXCR_CSR(x)		(x << I2S_RXCR_CSR_SHIFT)
+#define I2S_RXCR_CSR_MASK	(3 << I2S_RXCR_CSR_SHIFT)
+#define I2S_RXCR_HWT		BIT(14)
+#define I2S_RXCR_SJM_SHIFT	12
+#define I2S_RXCR_SJM_R		(0 << I2S_RXCR_SJM_SHIFT)
+#define I2S_RXCR_SJM_L		(1 << I2S_RXCR_SJM_SHIFT)
+#define I2S_RXCR_FBM_SHIFT	11
+#define I2S_RXCR_FBM_MSB	(0 << I2S_RXCR_FBM_SHIFT)
+#define I2S_RXCR_FBM_LSB	(1 << I2S_RXCR_FBM_SHIFT)
+#define I2S_RXCR_IBM_SHIFT	9
+#define I2S_RXCR_IBM_NORMAL	(0 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_IBM_LSJM	(1 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_IBM_RSJM	(2 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_IBM_MASK	(3 << I2S_RXCR_IBM_SHIFT)
+#define I2S_RXCR_PBM_SHIFT	7
+#define I2S_RXCR_PBM_MODE(x)	(x << I2S_RXCR_PBM_SHIFT)
+#define I2S_RXCR_PBM_MASK	(3 << I2S_RXCR_PBM_SHIFT)
+#define I2S_RXCR_TFS_SHIFT	5
+#define I2S_RXCR_TFS_I2S	(0 << I2S_RXCR_TFS_SHIFT)
+#define I2S_RXCR_TFS_PCM	(1 << I2S_RXCR_TFS_SHIFT)
+#define I2S_RXCR_TFS_MASK	(1 << I2S_RXCR_TFS_SHIFT)
+#define I2S_RXCR_VDW_SHIFT	0
+#define I2S_RXCR_VDW(x)		((x - 1) << I2S_RXCR_VDW_SHIFT)
+#define I2S_RXCR_VDW_MASK	(0x1f << I2S_RXCR_VDW_SHIFT)
+
+/*
+ * CKR
+ * clock generation register
+ */
+#define I2S_CKR_MSS_SHIFT	27
+#define I2S_CKR_MSS_MASTER	(0 << I2S_CKR_MSS_SHIFT)
+#define I2S_CKR_MSS_SLAVE	(1 << I2S_CKR_MSS_SHIFT)
+#define I2S_CKR_MSS_MASK	(1 << I2S_CKR_MSS_SHIFT)
+#define I2S_CKR_CKP_SHIFT	26
+#define I2S_CKR_CKP_NEG		(0 << I2S_CKR_CKP_SHIFT)
+#define I2S_CKR_CKP_POS		(1 << I2S_CKR_CKP_SHIFT)
+#define I2S_CKR_RLP_SHIFT	25
+#define I2S_CKR_RLP_NORMAL	(0 << I2S_CKR_RLP_SHIFT)
+#define I2S_CKR_RLP_OPPSITE	(1 << I2S_CKR_RLP_SHIFT)
+#define I2S_CKR_TLP_SHIFT	24
+#define I2S_CKR_TLP_NORMAL	(0 << I2S_CKR_TLP_SHIFT)
+#define I2S_CKR_TLP_OPPSITE	(1 << I2S_CKR_TLP_SHIFT)
+#define I2S_CKR_MDIV_SHIFT	16
+#define I2S_CKR_MDIV(x)		(((x) - 1) << I2S_CKR_MDIV_SHIFT)
+#define I2S_CKR_MDIV_MASK	(0xff << I2S_CKR_MDIV_SHIFT)
+#define I2S_CKR_RSD_SHIFT	8
+#define I2S_CKR_RSD(x)		(((x) - 1) << I2S_CKR_RSD_SHIFT)
+#define I2S_CKR_RSD_MASK	(0xff << I2S_CKR_RSD_SHIFT)
+#define I2S_CKR_TSD_SHIFT	0
+#define I2S_CKR_TSD(x)		(((x) - 1) << I2S_CKR_TSD_SHIFT)
+#define I2S_CKR_TSD_MASK	(0xff << I2S_CKR_TSD_SHIFT)
+
+/*
+ * FIFOLR
+ * FIFO level register
+ */
+#define I2S_FIFOLR_RFL_SHIFT	24
+#define I2S_FIFOLR_RFL_MASK	(0x3f << I2S_FIFOLR_RFL_SHIFT)
+#define I2S_FIFOLR_TFL3_SHIFT	18
+#define I2S_FIFOLR_TFL3_MASK	(0x3f << I2S_FIFOLR_TFL3_SHIFT)
+#define I2S_FIFOLR_TFL2_SHIFT	12
+#define I2S_FIFOLR_TFL2_MASK	(0x3f << I2S_FIFOLR_TFL2_SHIFT)
+#define I2S_FIFOLR_TFL1_SHIFT	6
+#define I2S_FIFOLR_TFL1_MASK	(0x3f << I2S_FIFOLR_TFL1_SHIFT)
+#define I2S_FIFOLR_TFL0_SHIFT	0
+#define I2S_FIFOLR_TFL0_MASK	(0x3f << I2S_FIFOLR_TFL0_SHIFT)
+
+/*
+ * DMACR
+ * DMA control register
+ */
+#define I2S_DMACR_RDE_SHIFT	24
+#define I2S_DMACR_RDE_DISABLE	(0 << I2S_DMACR_RDE_SHIFT)
+#define I2S_DMACR_RDE_ENABLE	(1 << I2S_DMACR_RDE_SHIFT)
+#define I2S_DMACR_RDE_MASK	(1 << I2S_DMACR_RDE_SHIFT)
+#define I2S_DMACR_RDL_SHIFT	16
+#define I2S_DMACR_RDL(x)	((x - 1) << I2S_DMACR_RDL_SHIFT)
+#define I2S_DMACR_RDL_MASK	(0x1f << I2S_DMACR_RDL_SHIFT)
+#define I2S_DMACR_TDE_SHIFT	8
+#define I2S_DMACR_TDE_DISABLE	(0 << I2S_DMACR_TDE_SHIFT)
+#define I2S_DMACR_TDE_ENABLE	(1 << I2S_DMACR_TDE_SHIFT)
+#define I2S_DMACR_TDE_MASK	(1 << I2S_DMACR_TDE_SHIFT)
+#define I2S_DMACR_TDL_SHIFT	0
+#define I2S_DMACR_TDL(x)	((x) << I2S_DMACR_TDL_SHIFT)
+#define I2S_DMACR_TDL_MASK	(0x1f << I2S_DMACR_TDL_SHIFT)
+
+/*
+ * INTCR
+ * interrupt control register
+ */
+#define I2S_INTCR_RFT_SHIFT	20
+#define I2S_INTCR_RFT(x)	((x - 1) << I2S_INTCR_RFT_SHIFT)
+#define I2S_INTCR_RXOIC		BIT(18)
+#define I2S_INTCR_RXOIE_SHIFT	17
+#define I2S_INTCR_RXOIE_DISABLE	(0 << I2S_INTCR_RXOIE_SHIFT)
+#define I2S_INTCR_RXOIE_ENABLE	(1 << I2S_INTCR_RXOIE_SHIFT)
+#define I2S_INTCR_RXFIE_SHIFT	16
+#define I2S_INTCR_RXFIE_DISABLE	(0 << I2S_INTCR_RXFIE_SHIFT)
+#define I2S_INTCR_RXFIE_ENABLE	(1 << I2S_INTCR_RXFIE_SHIFT)
+#define I2S_INTCR_TFT_SHIFT	4
+#define I2S_INTCR_TFT(x)	((x - 1) << I2S_INTCR_TFT_SHIFT)
+#define I2S_INTCR_TFT_MASK	(0x1f << I2S_INTCR_TFT_SHIFT)
+#define I2S_INTCR_TXUIC		BIT(2)
+#define I2S_INTCR_TXUIE_SHIFT	1
+#define I2S_INTCR_TXUIE_DISABLE	(0 << I2S_INTCR_TXUIE_SHIFT)
+#define I2S_INTCR_TXUIE_ENABLE	(1 << I2S_INTCR_TXUIE_SHIFT)
+
+/*
+ * INTSR
+ * interrupt status register
+ */
+#define I2S_INTSR_RXOI_SHIFT	17
+#define I2S_INTSR_RXOI_INA	(0 << I2S_INTSR_RXOI_SHIFT)
+#define I2S_INTSR_RXOI_ACT	(1 << I2S_INTSR_RXOI_SHIFT)
+#define I2S_INTSR_RXFI_SHIFT	16
+#define I2S_INTSR_RXFI_INA	(0 << I2S_INTSR_RXFI_SHIFT)
+#define I2S_INTSR_RXFI_ACT	(1 << I2S_INTSR_RXFI_SHIFT)
+#define I2S_INTSR_TXUI_SHIFT	1
+#define I2S_INTSR_TXUI_INA	(0 << I2S_INTSR_TXUI_SHIFT)
+#define I2S_INTSR_TXUI_ACT	(1 << I2S_INTSR_TXUI_SHIFT)
+#define I2S_INTSR_TXEI_SHIFT	0
+#define I2S_INTSR_TXEI_INA	(0 << I2S_INTSR_TXEI_SHIFT)
+#define I2S_INTSR_TXEI_ACT	(1 << I2S_INTSR_TXEI_SHIFT)
+
+/*
+ * XFER
+ * Transfer start register
+ */
+#define I2S_XFER_RXS_SHIFT	1
+#define I2S_XFER_RXS_STOP	(0 << I2S_XFER_RXS_SHIFT)
+#define I2S_XFER_RXS_START	(1 << I2S_XFER_RXS_SHIFT)
+#define I2S_XFER_RXS_MASK	(1 << I2S_XFER_RXS_SHIFT)
+#define I2S_XFER_TXS_SHIFT	0
+#define I2S_XFER_TXS_STOP	(0 << I2S_XFER_TXS_SHIFT)
+#define I2S_XFER_TXS_START	(1 << I2S_XFER_TXS_SHIFT)
+#define I2S_XFER_TXS_MASK	(1 << I2S_XFER_TXS_SHIFT)
+
+/*
+ * CLR
+ * clear SCLK domain logic register
+ */
+#define I2S_CLR_RXC	BIT(1)
+#define I2S_CLR_RXC_MASK	BIT(1)
+#define I2S_CLR_TXC	BIT(0)
+#define I2S_CLR_TXC_MASK	BIT(0)
+
+#endif
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 441f14b237..ed58b5d89c 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -41,6 +41,7 @@ enum uclass_id {
 	UCLASS_I2C_EEPROM,	/* I2C EEPROM device */
 	UCLASS_I2C_GENERIC,	/* Generic I2C device */
 	UCLASS_I2C_MUX,		/* I2C multiplexer */
+	UCLASS_I2S,		/* I2S bus */
 	UCLASS_IDE,		/* IDE device */
 	UCLASS_IRQ,		/* Interrupt controller */
 	UCLASS_KEYBOARD,	/* Keyboard input device */
diff --git a/include/sound.h b/include/sound.h
index 155e1b40e2..73c1daaf3e 100644
--- a/include/sound.h
+++ b/include/sound.h
@@ -53,4 +53,14 @@ int sound_init(const void *blob);
  */
 int sound_play(uint32_t msec, uint32_t frequency);
 
+struct snd_soc_dai_ops {
+	int (*hw_params)(struct udevice *dev, unsigned int samplerate,
+			 unsigned int fmt, unsigned int channels);
+	int (*startup)(struct udevice *dev);
+	int (*shutdown)(struct udevice *dev);
+	int (*transfer)(struct udevice *dev, unsigned int *data,
+			unsigned long data_size);
+	int (*set_sysclk)(struct udevice *dev, unsigned int freq);
+};
+
 #endif  /* __SOUND__H__ */

commit 95f2641240fb67e33a7d87e5cff4c083b997f195
Author: Sugar Zhang <sugar.zhang@rock-chips.com>
Date:   Fri Sep 21 16:09:31 2018 +0800

    clk: rockchip: px30: add support clock for SCLK_I2S1
    
    Change-Id: Iaaacd6fdabe2c702202ffe09dc95cd6d648597d6
    Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index ca4655b40d..6703603744 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -314,6 +314,26 @@ enum {
 	UART2_DIVNP5_SHIFT	= 0,
 	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
 
+	/* CRU_CLK_SEL30_CON */
+	CLK_I2S1_DIV_CON_MASK	= 0x7f,
+	CLK_I2S1_PLL_SEL_MASK	= 0X1 << 8,
+	CLK_I2S1_PLL_SEL_GPLL	= 0X0 << 8,
+	CLK_I2S1_PLL_SEL_NPLL	= 0X1 << 8,
+	CLK_I2S1_SEL_MASK	= 0x3 << 10,
+	CLK_I2S1_SEL_I2S1	= 0x0 << 10,
+	CLK_I2S1_SEL_FRAC	= 0x1 << 10,
+	CLK_I2S1_SEL_MCLK_IN	= 0x2 << 10,
+	CLK_I2S1_SEL_OSC	= 0x3 << 10,
+	CLK_I2S1_OUT_SEL_MASK	= 0x1 << 15,
+	CLK_I2S1_OUT_SEL_I2S1	= 0x0 << 15,
+	CLK_I2S1_OUT_SEL_OSC	= 0x1 << 15,
+
+	/* CRU_CLK_SEL31_CON */
+	CLK_I2S1_FRAC_NUMERATOR_SHIFT	= 16,
+	CLK_I2S1_FRAC_NUMERATOR_MASK	= 0xffff << 16,
+	CLK_I2S1_FRAC_DENOMINATOR_SHIFT	= 0,
+	CLK_I2S1_FRAC_DENOMINATOR_MASK	= 0xffff,
+
 	/* CRU_CLK_SEL49_CON */
 	CLK_I2C_PLL_SEL_GPLL		= 0,
 	CLK_I2C_PLL_SEL_24M,
@@ -354,6 +374,11 @@ enum {
 	CLK_SARADC_DIV_CON_SHIFT	= 0,
 	CLK_SARADC_DIV_CON_MASK		= 0x7ff,
 
+	/* CRU_CLK_GATE10_CON */
+	CLK_I2S1_OUT_MCLK_PAD_MASK	= 0x1 << 9,
+	CLK_I2S1_OUT_MCLK_PAD_ENABLE	= 0x1 << 9,
+	CLK_I2S1_OUT_MCLK_PAD_DISABLE	= 0x0 << 9,
+
 	/* CRU_PMU_MODE */
 	GPLL_MODE_SHIFT			= 0,
 	GPLL_MODE_MASK			= 3 << GPLL_MODE_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index adbf431a68..ba249ae0da 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -367,6 +367,120 @@ static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	return px30_i2c_get_clk(priv, clk_id);
 }
 
+/*
+ * calculate best rational approximation for a given fraction
+ * taking into account restricted register size, e.g. to find
+ * appropriate values for a pll with 5 bit denominator and
+ * 8 bit numerator register fields, trying to set up with a
+ * frequency ratio of 3.1415, one would say:
+ *
+ * rational_best_approximation(31415, 10000,
+ *		(1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(
+	unsigned long given_numerator, unsigned long given_denominator,
+	unsigned long max_numerator, unsigned long max_denominator,
+	unsigned long *best_numerator, unsigned long *best_denominator)
+{
+	unsigned long n, d, n0, d0, n1, d1;
+
+	n = given_numerator;
+	d = given_denominator;
+	n0 = 0;
+	d1 = 0;
+	n1 = 1;
+	d0 = 1;
+	for (;;) {
+		unsigned long t, a;
+
+		if (n1 > max_numerator || d1 > max_denominator) {
+			n1 = n0;
+			d1 = d0;
+			break;
+		}
+		if (d == 0)
+			break;
+		t = d;
+		a = n / d;
+		d = n % d;
+		n = t;
+		t = n0 + a * n1;
+		n0 = n1;
+		n1 = t;
+		t = d0 + a * d1;
+		d0 = d1;
+		d1 = t;
+	}
+	*best_numerator = n1;
+	*best_denominator = d1;
+}
+
+static ulong px30_i2s_get_clk(struct px30_clk_priv *priv, ulong clk_id)
+{
+	u32 con, fracdiv, gate;
+	u32 clk_src = GPLL_HZ / 2;
+	unsigned long m, n;
+	struct px30_cru *cru = priv->cru;
+
+	switch (clk_id) {
+	case SCLK_I2S1:
+		con = readl(&cru->clksel_con[30]);
+		fracdiv = readl(&cru->clksel_con[31]);
+		gate = readl(&cru->clkgate_con[10]);
+		m = fracdiv & CLK_I2S1_FRAC_NUMERATOR_MASK;
+		m >>= CLK_I2S1_FRAC_NUMERATOR_SHIFT;
+		n = fracdiv & CLK_I2S1_FRAC_DENOMINATOR_MASK;
+		n >>= CLK_I2S1_FRAC_DENOMINATOR_SHIFT;
+		debug("con30: 0x%x, gate: 0x%x, frac: 0x%x\n",
+		      con, gate, fracdiv);
+		break;
+	default:
+		printf("do not support this i2s bus\n");
+		return -EINVAL;
+	}
+
+	return clk_src * n / m;
+}
+
+static ulong px30_i2s_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
+{
+	u32 clk_src;
+	unsigned long m, n, val;
+	struct px30_cru *cru = priv->cru;
+
+	clk_src = GPLL_HZ / 2;
+	rational_best_approximation(hz, clk_src,
+				    GENMASK(16 - 1, 0),
+				    GENMASK(16 - 1, 0),
+				    &m, &n);
+	switch (clk_id) {
+	case SCLK_I2S1:
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_I2S1_PLL_SEL_MASK, CLK_I2S1_PLL_SEL_GPLL);
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_I2S1_DIV_CON_MASK, 0x1);
+		rk_clrsetreg(&cru->clksel_con[30],
+			     CLK_I2S1_SEL_MASK, CLK_I2S1_SEL_FRAC);
+		val = m << CLK_I2S1_FRAC_NUMERATOR_SHIFT | n;
+		writel(val, &cru->clksel_con[31]);
+		rk_clrsetreg(&cru->clkgate_con[10],
+			     CLK_I2S1_OUT_MCLK_PAD_MASK,
+			     CLK_I2S1_OUT_MCLK_PAD_ENABLE);
+		break;
+	default:
+		printf("do not support this i2s bus\n");
+		return -EINVAL;
+	}
+
+	return px30_i2s_get_clk(priv, clk_id);
+}
+
 static ulong px30_nandc_get_clk(struct px30_clk_priv *priv)
 {
 	struct px30_cru *cru = priv->cru;
@@ -939,6 +1053,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_I2C3:
 		rate = px30_i2c_get_clk(priv, clk->id);
 		break;
+	case SCLK_I2S1:
+		rate = px30_i2s_get_clk(priv, clk->id);
+		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
 		rate = px30_pwm_get_clk(priv, clk->id);
@@ -1004,6 +1121,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		ret = px30_i2c_set_clk(priv, clk->id, rate);
 		break;
+	case SCLK_I2S1:
+		ret = px30_i2s_set_clk(priv, clk->id, rate);
+		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
 		ret = px30_pwm_set_clk(priv, clk->id, rate);

commit a2a3fc8f3af299acb3f5492ef5cef8cec860b4f6
Author: Jianqun Xu <jay.xu@rock-chips.com>
Date:   Fri Aug 3 11:41:39 2018 +0800

    pinctrl: rockchip: Add pinctrl support for rk1808
    
    Change-Id: Ia60accc1940ed5cb0fa04f017fa97e34dff480cb
    Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 9f83c15723..3590b01912 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -18,6 +18,7 @@
 enum rockchip_pinctrl_type {
 	PX30,
 	RV1108,
+	RK1808,
 	RK2928,
 	RK3066B,
 	RK3128,
@@ -616,6 +617,45 @@ static struct rockchip_mux_route_data px30_mux_route_data[] = {
 	},
 };
 
+static struct rockchip_mux_route_data rk1808_mux_route_data[] = {
+	{
+		/* i2c2m0_sda */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* i2c2m1_sda */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* uart2_rxm0 */
+		.bank_num = 4,
+		.pin = 3,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(16 + 15),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 2,
+		.pin = 25,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(14) | BIT(16 + 15),
+	}, {
+		/* uart2_rxm2 */
+		.bank_num = 3,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x190,
+		.route_val = BIT(16 + 14) | BIT(16 + 15) | BIT(15),
+	},
+};
+
 static struct rockchip_mux_route_data rk3128_mux_route_data[] = {
 	{
 		/* spi-0 */
@@ -1338,6 +1378,84 @@ static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
 	return 0;
 }
 
+#define RK1808_PULL_PMU_OFFSET		0x10
+#define RK1808_PULL_GRF_OFFSET		0x80
+#define RK1808_PULL_PINS_PER_REG	8
+#define RK1808_PULL_BITS_PER_PIN	2
+#define RK1808_PULL_BANK_STRIDE		16
+
+static void rk1808_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num,
+					 struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_PULL_PMU_OFFSET;
+	} else {
+		*reg = RK1808_PULL_GRF_OFFSET;
+		*regmap = priv->regmap_base;
+	}
+
+	*reg += ((pin_num / RK1808_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RK1808_PULL_PINS_PER_REG);
+	*bit *= RK1808_PULL_BITS_PER_PIN;
+}
+
+#define RK1808_DRV_PMU_OFFSET		0x20
+#define RK1808_DRV_GRF_OFFSET		0x140
+#define RK1808_DRV_BITS_PER_PIN		2
+#define RK1808_DRV_PINS_PER_REG		8
+#define RK1808_DRV_BANK_STRIDE		16
+
+static void rk1808_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num,
+					struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK1808_DRV_GRF_OFFSET;
+	}
+
+	*reg += ((pin_num / RK1808_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % RK1808_DRV_PINS_PER_REG;
+	*bit *= RK1808_DRV_BITS_PER_PIN;
+}
+
+#define RK1808_SCHMITT_PMU_OFFSET		0x0040
+#define RK1808_SCHMITT_GRF_OFFSET		0x0100
+#define RK1808_SCHMITT_BANK_STRIDE		16
+#define RK1808_SCHMITT_PINS_PER_REG		8
+
+static int rk1808_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK1808_SCHMITT_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK1808_SCHMITT_GRF_OFFSET;
+		*reg += (bank->bank_num  - 1) * RK1808_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / RK1808_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK1808_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
 #define RK2928_PULL_OFFSET		0x118
 #define RK2928_PULL_PINS_PER_REG	16
 #define RK2928_PULL_BANK_STRIDE		8
@@ -1826,6 +1944,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 		break;
 	case PX30:
 	case RV1108:
+	case RK1808:
 	case RK3188:
 	case RK3288:
 	case RK3308:
@@ -1925,6 +2044,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
 		return pull ? false : true;
 	case PX30:
 	case RV1108:
+	case RK1808:
 	case RK3188:
 	case RK3288:
 	case RK3308:
@@ -2336,6 +2456,48 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
 	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
 };
 
+static struct rockchip_pin_bank rk1808_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0",
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU,
+			     IOMUX_SOURCE_PMU),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4",
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT,
+			     IOMUX_WIDTH_4BIT),
+};
+
+static struct rockchip_pin_ctrl rk1808_pin_ctrl = {
+	.pin_banks		= rk1808_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk1808_pin_banks),
+	.label			= "RK1808-GPIO",
+	.type			= RK1808,
+	.iomux_routes		= rk1808_mux_route_data,
+	.niomux_routes		= ARRAY_SIZE(rk1808_mux_route_data),
+	.grf_mux_offset		= 0x0,
+	.pmu_mux_offset		= 0x0,
+	.pull_calc_reg		= rk1808_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rk1808_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rk1808_calc_schmitt_reg_and_bit,
+};
+
 static struct rockchip_pin_bank rk2928_pin_banks[] = {
 	PIN_BANK(0, 32, "gpio0"),
 	PIN_BANK(1, 32, "gpio1"),
@@ -2671,6 +2833,8 @@ static const struct udevice_id rockchip_pinctrl_dt_match[] = {
 		.data = (ulong)&px30_pin_ctrl },
 	{ .compatible = "rockchip,rv1108-pinctrl",
 		.data = (ulong)&rv1108_pin_ctrl },
+	{ .compatible = "rockchip,rk1808-pinctrl",
+		.data = (ulong)&rk1808_pin_ctrl },
 	{ .compatible = "rockchip,rk2928-pinctrl",
 		.data = (ulong)&rk2928_pin_ctrl },
 	{ .compatible = "rockchip,rk3036-pinctrl",

commit 72c44abc767ab065bfe64a8a1de9fc9b21d0f804
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 25 11:46:39 2018 +0800

    rk3399: decrease 16KB from BSS section
    
    the 16KB size is used for SPL code, it fixes compile issue:
    
    section .bss VMA [00000000ff8e0000,00000000ff8e01bf] overlaps
    section .u_boot_list VMA [00000000ff8df450,00000000ff8e0bf7]
    
    Change-Id: I05b5b9c8b05825835d7d80f843c590d390abe482
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 980703db0e..6f5b909762 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -24,8 +24,8 @@
 #define CONFIG_SPL_TEXT_BASE		0xff8c2000
 #define CONFIG_SPL_MAX_SIZE		0x30000 - 0x2000
 /*  BSS setup */
-#define CONFIG_SPL_BSS_START_ADDR       0xff8e0000
-#define CONFIG_SPL_BSS_MAX_SIZE         0x10000
+#define CONFIG_SPL_BSS_START_ADDR       0xff8e4000
+#define CONFIG_SPL_BSS_MAX_SIZE         0x10000 - 0x4000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 

commit f561125910ee60b180129bf6ff11b3fa4a5cc65b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 25 11:27:52 2018 +0800

    configs: lion-rk3368: increase TPL size to 32KB
    
    it fixes TPL size overflow compile issue.
    
    Change-Id: I5c936d2c170f34bc820ecc4630d061d0c9af8705
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 6c8eee760f..2185049082 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_MAX_SIZE=32768
 CONFIG_ROCKCHIP_RK3368=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TPL_LIBCOMMON_SUPPORT=y

commit 71e299d362bb8dd358c327e05fe8d73163dc13b0
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Aug 29 10:43:01 2018 +0800

    rockchip: dts: rk1808: add dmc node
    
    Change-Id: I4c4b26ec8889ad44bb70ebcbe771682894052bc0
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
index b56bb3bca3..ec59306083 100644
--- a/arch/arm/dts/rk1808.dtsi
+++ b/arch/arm/dts/rk1808.dtsi
@@ -117,6 +117,10 @@
 		};
 	};
 
+	dmc: dmc {
+		compatible = "rockchip,rk1808-dmc";
+	};
+
 	cru: clock-controller@ff350000 {
 		compatible = "rockchip,rk1808-cru";
 		reg = <0x0 0xff350000 0x0 0x5000>;

commit f1fc975dacf3d9cf751d82fdb6f9d48b37aa9c65
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Wed Aug 29 10:39:45 2018 +0800

    drivers: ram: rockchip: add rk1808 sdram support
    
    Change-Id: I8dc6eaaf6bb9460ed05d4bda1658fc859bb522af
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 674a58cc77..dffed38f8a 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RK1808) = sdram_rk1808.o
 obj-$(CONFIG_ROCKCHIP_RK3036) = sdram_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
diff --git a/drivers/ram/rockchip/sdram_rk1808.c b/drivers/ram/rockchip/sdram_rk1808.c
new file mode 100644
index 0000000000..681a2901d4
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk1808.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk1808.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+	struct ram_info info;
+	struct rk1808_pmugrf *pmugrf;
+};
+
+static int rk1808_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
+
+	return 0;
+}
+
+static int rk1808_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk1808_dmc_ops = {
+	.get_info = rk1808_dmc_get_info,
+};
+
+static const struct udevice_id rk1808_dmc_ids[] = {
+	{ .compatible = "rockchip,rk1808-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk1808) = {
+	.name = "rockchip_rk1808_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk1808_dmc_ids,
+	.ops = &rk1808_dmc_ops,
+	.probe = rk1808_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit a28d53bfbfd17e87a8ae72a9e544a5cf650b7bb1
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Aug 30 16:10:17 2018 +0800

    rockchip: rk_atags: add memset/memcpy for TINY TPL
    
    For some TPL with TINY mode didn't define LIBGENERIC_SUPPORT,
    need to realize memset/memcpy for rk_atags whit TPL.
    
    Change-Id: I9c7a343836592aa03fcee910404fb2f1e37a4989
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index da24bedbd1..d07bf1b0a1 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -167,4 +167,11 @@ void atags_test(void);
 /* Atags stat */
 void atags_stat(void);
 
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
+	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
+	defined(CONFIG_ARM64)
+void *memset(void *s, int c, size_t count);
+void *memcpy(void *dest, const void *src, size_t count);
+#endif
+
 #endif
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index b2b57cd857..58fbc654f4 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -6,12 +6,72 @@
 
 #include <common.h>
 #include <asm/arch/rk_atags.h>
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+#include <debug_uart.h>
+#endif
 
 #define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
 #define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
 #define for_each_tag(t, base)		\
 	for (t = base; t->hdr.size; t = tag_next(t))
 
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) &&		\
+	!CONFIG_IS_ENABLED(LIBGENERIC_SUPPORT) &&	\
+	defined(CONFIG_ARM64)
+/**
+ * memset - Fill a region of memory with the given value
+ * @s: Pointer to the start of the area.
+ * @c: The byte to fill the area with
+ * @count: The size of the area.
+ *
+ * Do not use memset() to access IO space, use memset_io() instead.
+ */
+void *memset(void *s, int c, size_t count)
+{
+	unsigned long *sl = (unsigned long *)s;
+	char *s8;
+
+	s8 = (char *)sl;
+	while (count--)
+		*s8++ = c;
+
+	return s;
+}
+
+/**
+ * memcpy - Copy one area of memory to another
+ * @dest: Where to copy to
+ * @src: Where to copy from
+ * @count: The size of the area.
+ *
+ * You should not use this function to access IO space, use memcpy_toio()
+ * or memcpy_fromio() instead.
+ */
+void *memcpy(void *dest, const void *src, size_t count)
+{
+	unsigned long *dl = (unsigned long *)dest, *sl = (unsigned long *)src;
+	char *d8, *s8;
+
+	if (src == dest)
+		return dest;
+
+	/* while all data is aligned (common case), copy a word at a time */
+	if ((((ulong)dest | (ulong)src) & (sizeof(*dl) - 1)) == 0) {
+		while (count >= sizeof(*dl)) {
+			*dl++ = *sl++;
+			count -= sizeof(*dl);
+		}
+	}
+	/* copy the reset one byte at a time */
+	d8 = (char *)dl;
+	s8 = (char *)sl;
+	while (count--)
+		*d8++ = *s8++;
+
+	return dest;
+}
+#endif
+
 static int inline bad_magic(u32 magic)
 {
 	return ((magic != ATAG_CORE) &&
@@ -44,7 +104,12 @@ int atags_set_tag(u32 magic, void *tagdata)
 		return -ENODATA;
 
 	if (bad_magic(magic)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 		printf("%s: magic(%x) is not support\n", __func__, magic);
+#else
+		printascii("magic is not support\n");
+#endif
+
 		return -EINVAL;
 	}
 
@@ -70,8 +135,13 @@ int atags_set_tag(u32 magic, void *tagdata)
 			 * some unknown reason.
 			 */
 			if (bad_magic(t->hdr.magic)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 				printf("%s: find unknown magic(%x)\n",
 				       __func__, t->hdr.magic);
+#else
+				printascii("find unknown magic\n");
+#endif
+
 				return -EINVAL;
 			}
 
@@ -101,8 +171,13 @@ int atags_set_tag(u32 magic, void *tagdata)
 	};
 
 	if (atags_size_overflow(t, size)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 		printf("%s: failed! no memory to setup magic(%x), max_mem=0x%x\n",
 		       __func__, magic, ATAGS_SIZE);
+#else
+		printascii("no memory to setup magic\n");
+#endif
+
 		return -ENOMEM;
 	}
 
@@ -128,8 +203,12 @@ struct tag *atags_get_tag(u32 magic)
 
 	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
 		if (bad_magic(t->hdr.magic)) {
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 			printf("%s: find unknown magic(%x)\n",
 			       __func__, t->hdr.magic);
+#else
+			printascii("find unknown magic\n");
+#endif
 			return NULL;
 		}
 

commit 58d85a144db34ea8fa73f05f77bf9618ec59e550
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 11:00:19 2018 +0800

    armv8: dump SP content when system crash
    
    Change-Id: I8f1d068f10eddf467413fb459934b1cb85481bb0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 0781034b03..d88a62232f 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <linux/compiler.h>
 #include <efi_loader.h>
+#include <iomem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
@@ -205,6 +206,10 @@ void show_regs(struct pt_regs *regs)
 	for (i = 0; i < 29; i += 2)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
+
+	printf("\n");
+	iomem_show("SP", regs->sp, 0x00, 0xfc);
+
 	printf("\n");
 
 #ifdef CONFIG_ROCKCHIP_CRASH_DUMP

commit 2897464340fff586087c2fd4f8e4568caf2e874f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:37:42 2018 +0800

    rockchip: rk3036: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I3d1ad775b5d3de2af50276dd93c233220e692408
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index f136a5bb2b..065a517084 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -18,8 +18,8 @@
 
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_MEM32
-#define CONFIG_SYS_TEXT_BASE		0x61000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_TEXT_BASE		0x60200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60400000
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
 #define CONFIG_SPL_TEXT_BASE		0x60000000
 

commit 895938f1d450c618bd07f99913c1e0780a1a5362
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:37:26 2018 +0800

    rockchip: rk3188: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I6e2e164ea9f77a7955a935b1a9f6aee7dd248768
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index d93f9adcf4..4d52e59a4d 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -24,9 +24,9 @@
 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #else
-#define CONFIG_SYS_TEXT_BASE		0x60100000
+#define CONFIG_SYS_TEXT_BASE		0x60200000
 #endif
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60400000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(0x8000 - 0x800)

commit 50f3250a1d681def40d1e268a54cb27b52c791ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:37:04 2018 +0800

    rockchip: rk322x: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I4a482d854bc00e1592f5877cf7f3217b8752c81c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 1230d4331a..f30ed6e753 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -16,8 +16,8 @@
 
 
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_TEXT_BASE		0x61000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_TEXT_BASE		0x60200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60400000
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
 #define CONFIG_SPL_TEXT_BASE		0x60000000
 

commit e36a44135631ceb5a3e1c46ef2260b091610bde5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 20 10:34:57 2018 +0800

    rockchip: rk3288: adjust U-Boot text base and init sp
    
    - set text base to 2MB offset;
    - set init sp to 4MB offset;
    
    Change-Id: I9f250c3561cbe8c0b4ee1c9da625766f7306c2f2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 91611c1cd4..0685002b05 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -24,9 +24,9 @@
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x00000000
 #else
-#define CONFIG_SYS_TEXT_BASE		0x00100000
+#define CONFIG_SYS_TEXT_BASE		0x00200000
 #endif
-#define CONFIG_SYS_INIT_SP_ADDR		0x00100000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
 

commit 3776a9bd6fd2faeb1cae6a2696a2d12c031353b1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 13 09:51:45 2018 +0800

    make.sh: add rk399pro-npu build
    
    Change-Id: I96c8dd6dc07c65549860631ecd70416f8f2f492e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 319822127b..6e6866c509 100755
--- a/make.sh
+++ b/make.sh
@@ -15,6 +15,7 @@ SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 #
 # Format:           target board               label         loader      trust
 RKCHIP_INI_DESC=("CONFIG_TARGET_GVA_RK3229       NA          RK322XAT     NA"
+                 "CONFIG_COPROCESSOR_RK1808  RK3399PRO-NPU  RK3399PRONPU  RK3399PRONPU"
 # to be add...
                 )
 

commit b9578fc8d61dfbf2eddb38b79381351456391e13
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 20:18:36 2018 +0800

    configs: add rk3399pro-npu_defconfig
    
    Change-Id: I547f744fcbf2a89584fa487bcd76101f916e40a6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399pro-npu_defconfig b/configs/rk3399pro-npu_defconfig
new file mode 100644
index 0000000000..eea5cceccf
--- /dev/null
+++ b/configs/rk3399pro-npu_defconfig
@@ -0,0 +1,71 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK1808=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_COPROCESSOR_RK1808=y
+CONFIG_TARGET_EVB_RK1808=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-npu-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+# CONFIG_ADC is not set
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+# CONFIG_MMC is not set
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_RAM=y
+CONFIG_DM_RAMDISK=y
+CONFIG_RAMDISK_READONLY=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff550000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+# CONFIG_SYS_WHITE_ON_BLACK is not set
+CONFIG_REGEX=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+# CONFIG_EFI_LOADER is not set

commit 2aa1fe77050121db490853510664f2980ee4f72c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 13 09:44:08 2018 +0800

    rockchip: kconfig: add CONFIG_COPROCESSOR_RK1808
    
    This indicates the RK1808 is working as a coprocessor for
    another more powerful SoC.
    
    Change-Id: Id843495de2acfa03508b9a378e9a48eedc3a7c62
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 9d237d4bd6..02e0269e94 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -288,6 +288,16 @@ config ROCKCHIP_RK1808
 	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
 	  Cortex-A35.
 
+if ROCKCHIP_RK1808
+
+config COPROCESSOR_RK1808
+	bool "RK1808 coprocessor"
+	help
+	  This indicates the RK1808 is working as a coprocessor for another
+	  more powerful SoC.
+
+endif
+
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
@@ -509,7 +519,6 @@ config ROCKCHIP_PRELOADER_ATAGS
 	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
 	  and finally ends with U-Boot.
 
-
 config GICV2
 	bool "ARM GICv2"
 

commit db58bbb1c1563ea1ea37c6148016bda2e966cb1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 13 10:13:49 2018 +0800

    arm: dts: add rk3399pro-npu-evb.dts
    
    Change-Id: Ib5a74849fcc0939e1be7ca481a58bfd1ac2e7c94
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3399pro-npu-evb.dts b/arch/arm/dts/rk3399pro-npu-evb.dts
new file mode 100644
index 0000000000..939baf5842
--- /dev/null
+++ b/arch/arm/dts/rk3399pro-npu-evb.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include "rk1808.dtsi"
+#include "rk1808-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+#include <linux/media-bus-format.h>
+
+/ {
+	model = "Rockchip RK3399PRO NPU";
+	compatible = "rockchip,rk3399pro-npu";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	ramdisk-readonly {
+		u-boot,dm-pre-reloc;
+		compatible = "ramdisk-readonly";
+		status = "okay";
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+};
+
+&emmc {
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+
+	status = "okay";
+};
+
+&sdmmc {
+	supports-sd;
+	status = "disabled";
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	clocks = <&xin24m>, <&xin24m>;
+	clock-names = "baudclk", "apb_pclk";
+
+	status = "okay";
+};

commit bf6219b03bb26f2eb7e5e43a03782b6b0f4ec6f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 12 17:45:04 2018 +0800

    rockchip: rk1808: set ramdisk as devtype when DM_RAMDISK enabled
    
    Change-Id: I6162c5bf2db963101215c3f7e2f2cc190663d779
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 6a7c2ea020..5e41b20ef0 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -43,6 +43,14 @@
 	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
+
+#ifdef CONFIG_DM_RAMDISK
+#undef RKIMG_DET_BOOTDEV
+#define RKIMG_DET_BOOTDEV \
+	"rkimg_bootdev=" \
+	"setenv devtype ramdisk; setenv devnum 0; \0"
+#endif
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \

commit 225168aa839ae76612d5839a76575180a184b45e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 21:00:08 2018 +0800

    rockchip: rk1808: set CONFIG_SYS_TEXT_BASE to 6MB offset
    
    Memory layout:
        0 ~ 2M: ATF;
        2 ~ 6M: OP-TEE;
        6 ~ 7M: U-Boot;
    
    Change-Id: I1eb7517f62151041f11ba80a84fc12649654aa69
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index cb92d5b727..6a7c2ea020 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -12,8 +12,8 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
+#define CONFIG_SYS_TEXT_BASE		0x00600000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 #define COUNTER_FREQUENCY		24000000

commit b15a0aa284a9169b52110105e45a6fc5c0d634f0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 20:06:57 2018 +0800

    rockchip: resource: add CONFIG_ADC for rockchip_read_dtb_by_adc()
    
    Change-Id: I77ccb8b7a18995e913e69fea2eba955ef0ae848c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 027d563a30..bb93c758c1 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -384,6 +384,7 @@ int rockchip_read_resource_file(void *buf, const char *name,
 #define MAX_ADC_CH_NR		10
 #define MAX_GPIO_NR		10
 
+#ifdef CONFIG_ADC
 /*
  * How to make it works ?
  *
@@ -472,6 +473,12 @@ static int rockchip_read_dtb_by_adc(const char *file_name)
 
 	return found ? 0 : -ENOENT;
 }
+#else
+static int rockchip_read_dtb_by_adc(const char *file_name)
+{
+	return  -ENOENT;
+}
+#endif
 
 static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
 {

commit da734065442b6274900b88a9a901dfffb31a2d89
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 20:36:42 2018 +0800

    arm: rockchip: select DM_MMC if !DM_RAMDISK
    
    Change-Id: I1bf3af449d9bf9551de06763d10dba0c0910fdb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a17879ddb6..895346ab40 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1122,7 +1122,7 @@ config ARCH_ROCKCHIP
 	select SPL_SYS_MALLOC_SIMPLE if SPL
 	select DM_GPIO
 	select DM_I2C
-	select DM_MMC
+	select DM_MMC if !DM_RAMDISK
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH

commit 98ff9f07f82f3210800a927d73e33c7ec1da6c97
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 09:45:39 2018 +0800

    rockchip: add IF_TYPE_RAMDISK support
    
    Change-Id: I505606516bf186d8e869702c77f563d5cf0d6f37
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b56edebf13..9e3f5cfed5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -28,6 +28,9 @@
 #ifdef CONFIG_ROCKCHIP_DEBUGGER
 #include <rockchip_debugger.h>
 #endif
+#ifdef CONFIG_DM_RAMDISK
+#include <ramdisk.h>
+#endif
 #include <mmc.h>
 #include <of_live.h>
 #include <dm/root.h>
@@ -175,9 +178,15 @@ int init_kernel_dtb(void)
 	int ret = 0;
 	ulong fdt_addr = 0;
 
+#ifdef CONFIG_DM_MMC
 	ret = mmc_initialize(gd->bd);
 	if (ret)
-		debug("%s mmc initialized fail\n", __func__);
+		debug("%s: mmc initialized failed, ret=%d\n", __func__ ,ret);
+#else
+	ret = bramdisk_initialize();
+	if (ret)
+		debug("%s: bramdisk initialized failed, ret=%d\n", __func__, ret);
+#endif
 
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 37b58c4f6c..c5f421480b 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -177,6 +177,9 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "spinor")) {
 		type = IF_TYPE_SPINOR;
 		boot_media = "nor";
+	} else if (!strcmp(devtype, "ramdisk")) {
+		type = IF_TYPE_RAMDISK;
+		boot_media = "ramdisk";
 	} else {
 		/* Add new to support */
 	}

commit a3fec70d49c3effc5e206c450e3d0ac20d8a3ebc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 09:38:13 2018 +0800

    dm: blk: add ramdisk uclass support
    
    - Use ram as a disk which appears as block devices.
    - Provide a read only ramdisk driver.
    
    Change-Id: Ie6dc1a036c8a2841cacd0d467599c11b74b4ad77
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index ed7392ecd0..b60a856daa 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -27,6 +27,8 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_RKNAND]	= "rknand",
 	[IF_TYPE_SPINAND]	= "spinand",
 	[IF_TYPE_SPINOR]	= "spinor",
+	[IF_TYPE_RAMDISK]	= "ramdisk",
+
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -43,6 +45,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
 	[IF_TYPE_SPINAND]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_SPINOR]	= UCLASS_SPI_FLASH,
+	[IF_TYPE_RAMDISK]	= UCLASS_RAMDISK,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index c3273ab7d9..d26c590d9f 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -33,3 +33,16 @@ config STM32_SDRAM
 	  STM32F7 family devices support flexible memory controller(FMC) to
 	  support external memories like sdram, psram & nand.
 	  This driver is for the sdram memory interface with the FMC.
+
+config DM_RAMDISK
+        bool "Enable Driver Model for RAMDISK drivers"
+        depends on DM
+        help
+          This enables the Ramdisk uclass support. These appear as block devices
+          in U-Boot.
+
+config RAMDISK_READONLY
+        bool "Enable read only ramdisk support"
+        depends on DM_RAMDISK
+        help
+          This enables the read only ramdisk support.
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 8d102f9c1d..9d6abb0cfa 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -10,3 +10,5 @@ obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
 obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_DM_RAMDISK) += ramdisk-uclass.o
+obj-$(CONFIG_RAMDISK_READONLY) += ramdisk_readonly.o
diff --git a/drivers/ram/ramdisk-uclass.c b/drivers/ram/ramdisk-uclass.c
new file mode 100644
index 0000000000..edb1b7bdfd
--- /dev/null
+++ b/drivers/ram/ramdisk-uclass.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include <ramdisk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int bramdisk_initialize(void)
+{
+	struct udevice *dev;
+
+	return uclass_get_device(UCLASS_BLK, 0, &dev);
+}
+
+static ulong ramdisk_bread(struct udevice *dev, lbaint_t start,
+			   lbaint_t blkcnt, void *dst)
+{
+	const struct ramdisk_ops *ops = dev_get_driver_ops(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+	if (!blkcnt)
+		return 0;
+
+	if (!ops->read)
+		return -ENOSYS;
+
+	return ops->read(desc, start, blkcnt, dst);
+}
+
+static ulong ramdisk_bwrite(struct udevice *dev, lbaint_t start,
+			    lbaint_t blkcnt, const void *src)
+{
+	const struct ramdisk_ops *ops = dev_get_driver_ops(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+	if (!blkcnt)
+		return 0;
+
+	if (!ops->write)
+		return -ENOSYS;
+
+	return ops->write(desc, start, blkcnt, src);
+}
+
+static ulong ramdisk_berase(struct udevice *dev,
+			    lbaint_t start, lbaint_t blkcnt)
+{
+	const struct ramdisk_ops *ops = dev_get_driver_ops(dev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+	if (!blkcnt)
+		return 0;
+
+	if (!ops->erase)
+		return -ENOSYS;
+
+	return ops->erase(desc, start, blkcnt);
+}
+
+static const struct blk_ops ramdisk_blk_ops = {
+	.read	= ramdisk_bread,
+#ifndef CONFIG_SPL_BUILD
+	.write	= ramdisk_bwrite,
+	.erase	= ramdisk_berase,
+#endif
+};
+
+U_BOOT_DRIVER(ramdisk_blk) = {
+	.name		= "ramdisk_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &ramdisk_blk_ops,
+};
+
+UCLASS_DRIVER(ramdisk) = {
+	.id		= UCLASS_RAMDISK,
+	.name		= "ramdisk",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+};
diff --git a/drivers/ram/ramdisk_readonly.c b/drivers/ram/ramdisk_readonly.c
new file mode 100644
index 0000000000..7f2b3b8c7a
--- /dev/null
+++ b/drivers/ram/ramdisk_readonly.c
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include <ramdisk.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static ulong ramdisk_readonly_bread(struct blk_desc *desc, lbaint_t start,
+				    lbaint_t blkcnt, void *dst)
+{
+	unsigned long b_size, b_start;
+
+	/* Byte */
+	b_start = start * desc->blksz;
+	b_size = blkcnt * desc->blksz;
+	memcpy((char *)dst, (char *)b_start, b_size);
+
+	debug("%s: b_start=0x%lx, b_size=0x%lx. dst=%p\n",
+	      __func__, b_start, b_size, dst);
+
+	return blkcnt;
+}
+
+static int ramdisk_readonly_bind(struct udevice *dev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(dev, "ramdisk_blk", "blk",
+				 IF_TYPE_RAMDISK, 0, 512, 0, &bdev);
+	if (ret) {
+		debug("Can't create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct ramdisk_ops ramdisk_readonly_ops = {
+	.read = ramdisk_readonly_bread,
+};
+
+static const struct udevice_id ramdisk_readonly_ids[] = {
+	{ .compatible = "ramdisk-readonly" },
+	{ }
+};
+
+U_BOOT_DRIVER(ramdisk_readonly) = {
+	.name		= "ramdisk-readonly",
+	.id		= UCLASS_RAMDISK,
+	.ops		= &ramdisk_readonly_ops,
+	.of_match	= ramdisk_readonly_ids,
+	.bind		= ramdisk_readonly_bind,
+};
diff --git a/include/blk.h b/include/blk.h
index d8e3825454..4eb79ed748 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -37,6 +37,7 @@ enum if_type {
 	IF_TYPE_RKNAND,
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
+	IF_TYPE_RAMDISK,
 
 	IF_TYPE_COUNT,			/* Number of interface types */
 };
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index e74fcdd38a..441f14b237 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -71,6 +71,7 @@ enum uclass_id {
 	UCLASS_REMOTEPROC,	/* Remote Processor device */
 	UCLASS_RESET,		/* Reset controller device */
 	UCLASS_RKNAND,		/* Rockchip nand device with ftl */
+	UCLASS_RAMDISK,		/* Virtual ram disk */
 	UCLASS_RTC,		/* Real time clock device */
 	UCLASS_SCSI,		/* SCSI device */
 	UCLASS_SERIAL,		/* Serial UART */
diff --git a/include/ramdisk.h b/include/ramdisk.h
new file mode 100644
index 0000000000..73432eaef2
--- /dev/null
+++ b/include/ramdisk.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __RAMDISK_H__
+#define __RAMDISK_H__
+
+struct ramdisk_ops {
+	/*
+	 * read() - read from a block device
+	 *
+	 * @desc:	Block descriptor
+	 * @start:	Start block number to read
+	 * @blkcnt:	Number of blocks to read
+	 * @buffer:	Destination buffer for data read
+	 *
+	 * @return blkcnt is OK, otherwise is error.
+	 */
+	ulong (*read)(struct blk_desc *desc,
+		      lbaint_t start, lbaint_t blkcnt, void *buffer);
+
+	/*
+	 * write() - write to a block device
+	 *
+	 * @desc:	Block descriptor
+	 * @start:	Start block number to write
+	 * @blkcnt:	Number of blocks to write
+	 * @buffer:	Source buffer for data to write
+	 *
+	 * @return blkcnt is OK, otherwise is error.
+	 */
+
+	ulong (*write)(struct blk_desc *desc,
+		       lbaint_t start, lbaint_t blkcnt, const void *buffer);
+	/*
+	 * erase() - erase a section of a block device
+	 *
+	 * @desc:	Block descriptor
+	 * @start:	Start block number to erase
+	 * @blkcnt:	Number of blocks to erase
+	 *
+	 * @return blkcnt is OK, otherwise is error.
+	 */
+	ulong (*erase)(struct blk_desc *desc, lbaint_t start, lbaint_t blkcnt);
+};
+
+/*
+ * bramdisk_initialize() - do blk ramdisk initialize
+ */
+int bramdisk_initialize(void);
+
+#endif /* __RAMDISK_H__ */

commit c7e2486eb2d7aeb9fb9f685355da986a771efdcf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 09:28:51 2018 +0800

    disk: rkparam: support get partition info from atags
    
    - for some platform without storage, pre-loader passes partition info by atags.
    - search order: mmc/nand -> atags
    
    Change-Id: Ie2699e217999e4772168c96de3b16c084241891e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 1d4a7d74fd..156608cf8b 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <malloc.h>
+#ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS
+#include <asm/arch/rk_atags.h>
+#endif
 
 #ifdef HAVE_BLOCK_DEVICE
 #define RK_PARAM_OFFSET			0x2000
@@ -27,6 +30,13 @@ struct rkparm_part {
 
 
 static LIST_HEAD(parts_head);
+
+/*
+ * What's this?
+ *
+ * There maybe two different storage media need to use this partition driver,
+ * e.g. rkand with SD card. So we need a flag info to recognize it.
+ */
 static int dev_num = -1;
 
 static int rkparm_param_parse(char *param, struct list_head *parts_head,
@@ -40,7 +50,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	unsigned long size, start;
 
 	if (!cmdline) {
-		debug("RKPARM: Invalid parameter part table\n");
+		debug("RKPARM: Invalid parameter part table from storage\n");
 		return -EINVAL;
 	}
 
@@ -96,8 +106,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	return 0;
 }
 
-static int rkparm_init_param(struct blk_desc *dev_desc,
-				struct list_head *parts_head)
+static int rkparm_init_param_from_storage(struct blk_desc *dev_desc,
+					  struct list_head *parts_head)
 {
 	struct rkparm_param *param;
 	int offset = 0;
@@ -119,7 +129,91 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 	}
 
 	return rkparm_param_parse(param->params, parts_head, dev_desc);
+}
+
+#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && defined(CONFIG_DM_RAMDISK)
+static int rkparm_init_param_from_atags(struct blk_desc *dev_desc,
+					struct list_head *parts_head)
+{
+	struct rkparm_part *part;
+	struct tag *t;
+	u64 start, size;
+	int i, len;
+
+	if (!atags_is_available()) {
+		debug("%s: can't find ATAGS\n", __func__);
+		return -ENODATA;
+	}
+
+	t = atags_get_tag(ATAG_RAM_PARTITION);
+	if (!t) {
+		debug("%s: can't find ATAGS ramdisk partition\n", __func__);
+		return -ENODATA;
+	}
+
+	INIT_LIST_HEAD(parts_head);
+
+	for (i = 0; i < t->u.ram_part.count; i++) {
+		part = malloc(sizeof(*part));
+		if (!part) {
+			printf("%s: out of memory\n", __func__);
+			break;
+		}
+
+		len = strlen(t->u.ram_part.part[i].name) + 1;
+		memcpy((char *)&part->name,
+		       (char *)&t->u.ram_part.part[i].name, len);
+
+		start = t->u.ram_part.part[i].start;
+		size = t->u.ram_part.part[i].size;
+
+		if (!IS_ALIGNED(start, dev_desc->blksz)) {
+			printf("%s: '%s' addr(0x%llx) is not %ld byte aligned\n",
+			       __func__, part->name, start, dev_desc->blksz);
+			return -EINVAL;
+		} else if (!IS_ALIGNED(size, dev_desc->blksz)) {
+			printf("%s: '%s' size(0x%llx) is not %ld byte aligned\n",
+			       __func__, part->name, size, dev_desc->blksz);
+			return -EINVAL;
+		}
 
+		/* Convert bytes to blksz */
+		part->start = start / dev_desc->blksz;
+		part->size = size / dev_desc->blksz;
+		list_add_tail(&part->node, parts_head);
+
+		debug("%s: name=%s, start=0x%lx, size=0x%lx, blksz=0x%lx\n",
+		      __func__, part->name, part->start,
+		      part->size, dev_desc->blksz);
+	}
+
+	dev_num = ((dev_desc->if_type << 8) + dev_desc->devnum);
+
+	return 0;
+}
+#endif
+
+static int rkparm_init_param(struct blk_desc *dev_desc,
+			     struct list_head *parts_head)
+{
+	int ret;
+
+	ret = rkparm_init_param_from_storage(dev_desc, parts_head);
+	if (ret) {
+		debug("%s: failed to init param from storage\n", __func__);
+#if defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) && defined(CONFIG_DM_RAMDISK)
+		ret = rkparm_init_param_from_atags(dev_desc, parts_head);
+		if (ret) {
+			debug("%s: failed to init param from ram\n", __func__);
+			return ret;
+		}
+#endif
+	}
+
+	if (ret)
+		printf("RKPARM: Invalid parameter part table\n");
+
+	return ret;
 }
 
 static void part_print_rkparm(struct blk_desc *dev_desc)
@@ -145,7 +239,6 @@ static void part_print_rkparm(struct blk_desc *dev_desc)
 		       p->start, p->size, p->name);
 	}
 
-
 	return;
 }
 

commit 7e1a37f59e0266d3b62f4b32d9f8f2881e01c720
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 21:57:28 2018 +0800

    rockchip: atags: add atags_stat()
    
    Change-Id: I3ab086747cb9232118fd4e4f131648c242574309
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index aaa0500b0f..da24bedbd1 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -164,4 +164,7 @@ void atags_print_all_tags(void);
 /* An atags example test */
 void atags_test(void);
 
+/* Atags stat */
+void atags_stat(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index e02048656a..b2b57cd857 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -147,6 +147,31 @@ void atags_destroy(void)
 
 #if (defined(CONFIG_DEBUG_ATAGS) || defined(DEBUG)) && \
     !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+void atags_stat(void)
+{
+	u32 in_use = 0, in_available = 0;
+	u32 start = ATAGS_PHYS_BASE, end = ATAGS_PHYS_BASE + ATAGS_SIZE;
+	struct tag *t;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (bad_magic(t->hdr.magic)) {
+			printf("%s: find unknown magic(%x)\n",
+			       __func__, t->hdr.magic);
+			return;
+		}
+
+		in_use += (t->hdr.size << 2);
+	}
+
+	in_available = ATAGS_SIZE - in_use;
+
+	printf("ATAGS state:\n");
+	printf("              addr = 0x%08x ~ 0x%08x\n", start, end);
+	printf("        Total size = 0x%08x\n", ATAGS_SIZE);
+	printf("       in use size = 0x%08x\n", in_use);
+	printf("    available size = 0x%08x\n", in_available);
+}
+
 void atags_print_tag(struct tag *t)
 {
 	u32 i;
@@ -297,6 +322,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 
 	atags_print_all_tags();
+	atags_stat();
 }
 
 static int dump_atags(cmd_tbl_t *cmdtp, int flag,
@@ -315,4 +341,5 @@ U_BOOT_CMD(
 void inline atags_print_tag(struct tag *t) {}
 void inline atags_print_all_tags(void) {}
 void inline atags_test(void) {}
+void atags_stat(void) {};
 #endif

commit 0e9918bc21fc80f39e1c5e373914af6163d3c87e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 5 08:48:05 2018 +0800

    rockchip: atags: add ram partition support
    
    Maybe there is no flash storage for some SoC which is used
    as coprocessor, preloader will load images for U-Boot and
    pass partition info by atags.
    
    Change-Id: Ieb6efff80cb615b3b5a7bcd51c672649f3c97115
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index 30a3cf6311..aaa0500b0f 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -15,6 +15,7 @@
 #define ATAG_BOOTDEV		0x54410051
 #define ATAG_DDR_MEM		0x54410052
 #define ATAG_TOS_MEM		0x54410053
+#define ATAG_RAM_PARTITION	0x54410054
 
 /* Tag size and offset */
 #define ATAGS_SIZE		(0x2000)	/* 8K */
@@ -82,6 +83,18 @@ struct tag_tos_mem {
 	u64 reserved[8];
 } __packed;
 
+struct tag_ram_partition {
+	u32 version;
+	u32 count;
+	u32 reserved[4];
+
+	struct {
+		char name[16];
+		u64 start;
+		u64 size;
+	} part[16];
+} __packed;
+
 struct tag_core {
 	u32 flags;
 	u32 pagesize;
@@ -102,6 +115,7 @@ struct tag {
 		struct tag_bootdev	bootdev;
 		struct tag_ddr_mem	ddr_mem;
 		struct tag_tos_mem	tos_mem;
+		struct tag_ram_partition ram_part;
 	} u;
 } __aligned(4);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index ffb03532ac..e02048656a 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -19,7 +19,8 @@ static int inline bad_magic(u32 magic)
 		(magic != ATAG_SERIAL) &&
 		(magic != ATAG_BOOTDEV) &&
 		(magic != ATAG_DDR_MEM) &&
-		(magic != ATAG_TOS_MEM));
+		(magic != ATAG_TOS_MEM) &&
+		(magic != ATAG_RAM_PARTITION));
 }
 
 static int inline atags_size_overflow(struct tag *t, u32 tag_size)
@@ -93,6 +94,10 @@ int atags_set_tag(u32 magic, void *tagdata)
 	case ATAG_DDR_MEM:
 		size = tag_size(tag_ddr_mem);
 		break;
+	case ATAG_RAM_PARTITION:
+		size = tag_size(tag_ram_partition);
+		break;
+
 	};
 
 	if (atags_size_overflow(t, size)) {
@@ -203,6 +208,21 @@ void atags_print_tag(struct tag *t)
 		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
 			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
 		break;
+	case ATAG_RAM_PARTITION:
+		printf("[ram_partition]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("   version = 0x%x\n", t->u.ram_part.version);
+		printf("     count = 0x%x\n", t->u.ram_part.count);
+		for (i = 0; i < ARRAY_SIZE(t->u.ram_part.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.ram_part.reserved[i]);
+
+		printf("    Part:  Name       Start Addr      Size\t\n");
+		for (i = 0; i < t->u.ram_part.count; i++)
+			printf("%16s      0x%08llx      0x%08llx\n",
+			       t->u.ram_part.part[i].name,
+			       t->u.ram_part.part[i].start,
+			       t->u.ram_part.part[i].size);
+		break;
 	case ATAG_CORE:
 		printf("[core]:\n");
 		printf("     magic = 0x%x\n", t->hdr.magic);
@@ -239,15 +259,34 @@ void atags_test(void)
 	struct tag_bootdev t_bootdev;
 	struct tag_ddr_mem t_ddr_mem;
 	struct tag_tos_mem t_tos_mem;
+	struct tag_ram_partition t_ram_param;
 
 	memset(&t_serial,  0x1, sizeof(t_serial));
 	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
 	memset(&t_ddr_mem, 0x3, sizeof(t_ddr_mem));
 	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
+	memset(&t_tos_mem, 0x0, sizeof(t_ram_param));
 
 	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
 	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
 
+	t_ram_param.count = 4;
+	memcpy(&t_ram_param.part[0].name, "misc", 9);
+	t_ram_param.part[0].start = 0x00600000;
+	t_ram_param.part[0].size =  0x00200000;
+
+	memcpy(&t_ram_param.part[1].name, "resource", 9);
+	t_ram_param.part[1].start = 0x00800000;
+	t_ram_param.part[1].size =  0x00200000;
+
+	memcpy(&t_ram_param.part[2].name, "kernel", 7);
+	t_ram_param.part[2].start = 0x00a00000;
+	t_ram_param.part[2].size =  0x02000000;
+
+	memcpy(&t_ram_param.part[3].name, "boot", 5);
+	t_ram_param.part[3].start = 0x04000000;
+	t_ram_param.part[3].size =  0x02000000;
+
 	/* First pre-loader must call it before atags_set_tag() */
 	atags_destroy();
 
@@ -255,6 +294,7 @@ void atags_test(void)
 	atags_set_tag(ATAG_BOOTDEV, &t_bootdev);
 	atags_set_tag(ATAG_DDR_MEM, &t_ddr_mem);
 	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
+	atags_set_tag(ATAG_RAM_PARTITION, &t_ram_param);
 
 	atags_print_all_tags();
 }

commit 6b93bf2ba9dabdb29c5757074e5f865e79a64bab
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Sep 14 10:31:57 2018 +0800

    video/drm: rgb: Fix output mode setting
    
    Change-Id: I1adf38aa6262e889cc518c07325d6aeeb730f874
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 77009f0040..ce737953ad 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -10,6 +10,7 @@
 #include <regmap.h>
 #include <dm/device.h>
 #include <dm/read.h>
+#include <linux/media-bus-format.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -24,7 +25,7 @@ struct rockchip_rgb_priv {
 	struct regmap *grf;
 };
 
-static int rockchip_rgb_prepare(struct display_state *state)
+static int rockchip_rgb_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct rockchip_rgb_priv *priv = dev_get_priv(conn_state->dev);
@@ -41,54 +42,39 @@ static int rockchip_rgb_prepare(struct display_state *state)
 	return 0;
 }
 
-static int rockchip_rgb_unprepare(struct display_state *state)
+static int rockchip_rgb_disable(struct display_state *state)
 {
 	return 0;
 }
 
-static int to_output_mode(const char *s)
-{
-	const struct {
-		const char *name;
-		int format;
-	} formats[] = {
-		{ "p888", ROCKCHIP_OUT_MODE_P888 },
-		{ "p666", ROCKCHIP_OUT_MODE_P666 },
-		{ "p565", ROCKCHIP_OUT_MODE_P565 },
-		{ "s888", ROCKCHIP_OUT_MODE_S888 },
-		{ "s888_dummy", ROCKCHIP_OUT_MODE_S888_DUMMY }
-	};
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(formats); i++)
-		if (!strncmp(s, formats[i].name, strlen(formats[i].name)))
-			return formats[i].format;
-
-	return ROCKCHIP_OUT_MODE_P888;
-}
-
 static int rockchip_rgb_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	const char *mode;
 
 	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
-	mode = dev_read_string(panel_state->dev, "rgb-mode");
-	if (mode)
-		conn_state->output_mode = to_output_mode(mode);
-	else
+	switch (conn_state->bus_format) {
+	case MEDIA_BUS_FMT_RGB666_1X18:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
+		break;
+	case MEDIA_BUS_FMT_RGB565_1X16:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P565;
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+	default:
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+		break;
+	}
 
 	return 0;
 }
 
 static const struct rockchip_connector_funcs rockchip_rgb_funcs = {
 	.init = rockchip_rgb_init,
-	.enable = rockchip_rgb_prepare,
-	.disable = rockchip_rgb_unprepare,
+	.enable = rockchip_rgb_enable,
+	.disable = rockchip_rgb_disable,
 };
 
 static int rockchip_rgb_probe(struct udevice *dev)

commit 8659d08d2b589693d121c1298484e861b7dafc4f
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Sep 11 18:19:10 2018 +0800

    usb: dwc2: amend the maximum request length
    
    Amend the maximum request length equate to the maximum transfer
    size of endpoind.
    
    Change-Id: I926c23ddf347f33cf166c51c80d099441978ca7e
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 687046151d..73ba0daa4d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -98,7 +98,7 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
 
 	buf = req->req.buf + req->req.actual;
 	length = min_t(u32, req->req.length - req->req.actual,
-		       ep_num ? DMA_BUFFER_SIZE : ep->ep.maxpacket);
+		       ep_num ? DOEPT_SIZ_XFER_SIZE_MAX_EP : ep->ep.maxpacket);
 
 	ep->len = length;
 	ep->dma_buf = buf;

commit 5b2bcb4f4876b482fa1a7e95cccab65aad50f90b
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Sep 11 18:12:13 2018 +0800

    usb: dwc2: fix the maximum dieptsizn/doeptsizn
    
    The maximum transfer size supported should be 2^19 bytes
    from Table 5-79 (P372) of the DWC OTG Databook V3.10.
    
    Change-Id: I258b6c2119270fa2f31453af86f7eb179359e171
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 7f5a7ab9a3..1e7210063e 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -262,7 +262,7 @@ struct dwc2_usbotg_reg {
 #define DOEPT_SIZ_PKT_CNT(x)                      (x << 19)
 #define DOEPT_SIZ_XFER_SIZE(x)                    (x << 0)
 #define DOEPT_SIZ_XFER_SIZE_MAX_EP0               (0x7F << 0)
-#define DOEPT_SIZ_XFER_SIZE_MAX_EP                (0x7FFF << 0)
+#define DOEPT_SIZ_XFER_SIZE_MAX_EP                (0x7FFFF << 0)
 
 /* Device Endpoint-N Control Register (DIEPCTLn/DOEPCTLn) */
 #define DIEPCTL_TX_FIFO_NUM(x)                    (x << 22)

commit 812df22a142e8ba661e725f85c18f0140b50a54f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 18 20:47:17 2018 +0800

    dm: mmc: add trim erase mode
    
    BUG: If erase is set as MMC_ERASE_ARG, the erase command
    perform an erase on erase group(s). If so, when the start
    address is close to the next partition address and the
    blkcnt is less than erase group size, the mmc_berase()
    will recalculate the end address and may exceed the next
    partition start address. This will erase the other partition
    useful data.
    
    Solve: Set erase mode as trim, the erase command perform an
    erase on the sector(s).
    
    The erase command of SD card perform an erase on the sector(s).
    We can just send the start and end address to erase SD card
    and send CMD38 with argument MMC_ERASE_ARG.
    
    Change-Id: Ic4251b77e9f9feb6a087324c0241625ff013a0a0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index 54acbf7336..1faea7b009 100644
--- a/drivers/mmc/mmc_write.c
+++ b/drivers/mmc/mmc_write.c
@@ -20,6 +20,7 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
 	struct mmc_cmd cmd;
 	ulong end;
 	int err, start_cmd, end_cmd;
+	uint erase_mode;
 
 	if (mmc->high_capacity) {
 		end = start + blkcnt - 1;
@@ -28,12 +29,24 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
 		start *= mmc->write_bl_len;
 	}
 
+	/*
+	 * The SD card have just one erase mode, the erase command
+	 * perform an erase on the sector(s).
+	 * The Emmc have four erase mode. We use the trim mode with
+	 * cmd.cmdarg equal to MMC_TRIM_ARG which command performs an
+	 * erase on the sector(s).
+	 */
 	if (IS_SD(mmc)) {
 		start_cmd = SD_CMD_ERASE_WR_BLK_START;
 		end_cmd = SD_CMD_ERASE_WR_BLK_END;
+		erase_mode = MMC_ERASE_ARG;
 	} else {
 		start_cmd = MMC_CMD_ERASE_GROUP_START;
 		end_cmd = MMC_CMD_ERASE_GROUP_END;
+		if (mmc->esr.mmc_can_trim)
+			erase_mode = MMC_TRIM_ARG;
+		else
+			erase_mode = MMC_ERASE_ARG;
 	}
 
 	cmd.cmdidx = start_cmd;
@@ -52,7 +65,7 @@ static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
 		goto err_out;
 
 	cmd.cmdidx = MMC_CMD_ERASE;
-	cmd.cmdarg = MMC_ERASE_ARG;
+	cmd.cmdarg = erase_mode;
 	cmd.resp_type = MMC_RSP_R1b;
 
 	err = mmc_send_cmd(mmc, &cmd, NULL);
@@ -81,50 +94,69 @@ ulong mmc_berase(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt)
 	struct mmc *mmc = find_mmc_device(dev_num);
 	lbaint_t blk = 0, blk_r = 0;
 	int timeout = 1000;
+	int mode = 0;
 
 	if (!mmc)
 		return -1;
 
+	if (!blkcnt)
+		return 0;
+
 	err = blk_select_hwpart_devnum(IF_TYPE_MMC, dev_num,
 				       block_dev->hwpart);
+
 	if (err < 0)
 		return -1;
 
-	/*
-	 * We want to see if the requested start or total block count are
-	 * unaligned.  We discard the whole numbers and only care about the
-	 * remainder.
-	 */
-	err = div_u64_rem(start, mmc->erase_grp_size, &start_rem);
-	err = div_u64_rem(blkcnt, mmc->erase_grp_size, &blkcnt_rem);
-	if (start_rem || blkcnt_rem)
-		printf("\n\nCaution! Your devices Erase group is 0x%x\n"
-		       "The erase range would be change to "
-		       "0x" LBAF "~0x" LBAF "\n\n",
-		       mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
-		       ((start + blkcnt + mmc->erase_grp_size)
-		       & ~(mmc->erase_grp_size - 1)) - 1);
-
-	while (blk < blkcnt) {
-		if (IS_SD(mmc) && mmc->ssr.au) {
-			blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
-				mmc->ssr.au : (blkcnt - blk);
-		} else {
-			blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
-				mmc->erase_grp_size : (blkcnt - blk);
-		}
-		err = mmc_erase_t(mmc, start + blk, blk_r);
-		if (err)
-			break;
-
-		blk += blk_r;
+	if (!IS_SD(mmc)) {
+		if (mmc->esr.mmc_can_trim)
+			mode = 1;
+	}
 
-		/* Waiting for the ready status */
+	if (mode) {
+		err = mmc_erase_t(mmc, start, blkcnt);
+		if (err)
+			return err;
 		if (mmc_send_status(mmc, timeout))
 			return 0;
-	}
 
-	return blk;
+		return blkcnt;
+	} else {
+		/*
+		 * We want to see if the requested start or total block
+		 * count are unaligned.  We discard the whole numbers and
+		 * only care about the remainder.
+		 */
+		err = div_u64_rem(start, mmc->erase_grp_size, &start_rem);
+		err = div_u64_rem(blkcnt, mmc->erase_grp_size, &blkcnt_rem);
+		if (start_rem || blkcnt_rem)
+			printf("\n\nCaution! Your devices Erase group is 0x%x\n"
+			       "The erase range would be change to "
+			       "0x" LBAF "~0x" LBAF "\n\n",
+			       mmc->erase_grp_size,
+			       start & ~(mmc->erase_grp_size - 1),
+			       ((start + blkcnt + mmc->erase_grp_size)
+			       & ~(mmc->erase_grp_size - 1)) - 1);
+		while (blk < blkcnt) {
+			if (IS_SD(mmc) && mmc->ssr.au) {
+				blk_r = ((blkcnt - blk) > mmc->ssr.au) ?
+				mmc->ssr.au : (blkcnt - blk);
+			} else {
+				blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
+					mmc->erase_grp_size : (blkcnt - blk);
+			}
+			err = mmc_erase_t(mmc, start + blk, blk_r);
+			if (err)
+				break;
+
+			blk += blk_r;
+
+			/* Waiting for the ready status */
+			if (mmc_send_status(mmc, timeout))
+				return 0;
+		}
+		return blk;
+	}
 }
 
 static ulong mmc_write_blocks(struct mmc *mmc, lbaint_t start,

commit f680c019e6d910332958f764cee0f6af8b674bfe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 12 15:46:19 2018 +0800

    clk: rockchip: add debug info for waiting pll
    
    On FPGA, PLL is fake and can't give a lock state which causes
    dead waiting, so that adding a debug message to easily notice
    this situation.
    
    Change-Id: Ic7dccedb3d7e5c7588da85bb4c4552b924f60e43
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 6ace3db348..6d309a801c 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -233,8 +233,10 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
 		  1 << RK3036_PLLCON1_PWRDOWN_SHIT);
 
 	/* waiting for pll lock */
-	while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift)))
+	while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift))) {
 		udelay(1);
+		debug("%s: wait pll lock, pll_id=%ld\n", __func__, pll_id);
+	}
 
 	rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
 		     RKCLK_PLL_MODE_NORMAL << pll->mode_shift);

commit b8412744f419f7b74a8a181d3029f8e1e3604333
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:29:44 2018 +0800

    rockchip: rv1808: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I971c4fd63175137968430b130c25da03709d26e4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 73b75b16c7..b0f6b90ddf 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -16,7 +16,7 @@
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x200000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
 /* SPL support */

commit 954fa96c8300251b985ee4e7a369e56150c9ab50
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:29:30 2018 +0800

    rockchip: rk3368: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: Ib137428bb5fa10ee5b30b79a2623a016ecfc19e3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 0013e3cc4e..e9e3a97aee 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -22,7 +22,7 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00280000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 

commit f3ed57b767ad6d89ad8cc61f9c3a0424d97eb701
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:29:11 2018 +0800

    rockchip: rk3328: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I572e5edb26e2f7430c89fd057761ddc9abf077c6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 3e41d4d9b6..362e3843dd 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -16,7 +16,7 @@
 #define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000

commit 2a864b7a8090e6f8adffb9901d5f20cd634137e5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:28:47 2018 +0800

    rockchip: rk3399: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I4e17b934dc3dd19f66bda374263dcb674c53b057
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index bf5f445011..980703db0e 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -18,7 +18,7 @@
 #endif
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff8effff
 #define CONFIG_SPL_TEXT_BASE		0xff8c2000

commit a25a7031bc17b035245241ece1d6ecec92a040b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:28:25 2018 +0800

    rockchip: rk3308: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: Ie3bdadd58da954bff3de182725d28cfb6877e672
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index b562c94cd3..a728fa3709 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -18,7 +18,7 @@
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00600000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00700000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00800000
 #define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */

commit 6cfe5b317bf51c7f8bd3d1c2c02bd1bd27776c12
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:28:02 2018 +0800

    rockchip: rk1808: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: Ia310eda1317ae65aa374dca9294114813a645315
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
index 70945ccf27..cb92d5b727 100644
--- a/include/configs/rk1808_common.h
+++ b/include/configs/rk1808_common.h
@@ -13,7 +13,7 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 #define COUNTER_FREQUENCY		24000000

commit aacf8d54f1300d6dcbd033fe45d16796c394ae91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 11 16:25:01 2018 +0800

    rockchip: px30: set init sp address backward
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I0209a4294f9b85e89ce22a3a5c1e1b79a0ff37aa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 425659eac4..cb26415285 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -18,7 +18,7 @@
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00400000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000

commit 3680acb5fc21f1b3efc366369bb84936b579fe55
Author: Hao Xiaowei <hxw@rock-chips.com>
Date:   Tue Sep 11 09:29:42 2018 +0800

    configs: rk3126 rockchip: rk3128: enable avb for Android P
    
    Change-Id: I94ff27757b59343dac38d938f45c3b5b0fff6557
    Signed-off-by: Hao Xiaowei <hxw@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
index 2481be321d..ea939356ef 100644
--- a/configs/rk3126_defconfig
+++ b/configs/rk3126_defconfig
@@ -1,4 +1,13 @@
 CONFIG_ARM=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_ANDROID_AVB=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x38000
 CONFIG_ROCKCHIP_RK3128=y
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index d768f56148..7ef5972e24 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -22,6 +22,8 @@
 #define GICC_BASE			0x1013A000
 #define GICD_BASE			0x10139000
 
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x310C

commit bdf50261ca5dae56c75b1ff7d8d1a335d6bfe2f1
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Sep 11 08:52:24 2018 +0800

    lib: optee_client: search security partition once
    
    Change-Id: I4f3fbdb1e319e5b200225353a2d945bebd888f8c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index d9ff4dd4bc..c0f331dbd4 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -149,21 +149,23 @@ static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
 static int dir_num;
 static int dir_seek;
 
+static struct blk_desc *dev_desc = NULL;
+static disk_partition_t part_info;
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return TEEC_ERROR_GENERIC;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return TEEC_ERROR_GENERIC;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return TEEC_ERROR_GENERIC;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return TEEC_ERROR_GENERIC;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -176,18 +178,18 @@ static int rkss_read_multi_sections(unsigned char *data, unsigned long index, un
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return TEEC_ERROR_GENERIC;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return TEEC_ERROR_GENERIC;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return TEEC_ERROR_GENERIC;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return TEEC_ERROR_GENERIC;
+		}
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -200,18 +202,18 @@ static int rkss_write_multi_sections(unsigned char *data, unsigned long index, u
 static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return TEEC_ERROR_GENERIC;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return TEEC_ERROR_GENERIC;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return TEEC_ERROR_GENERIC;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return TEEC_ERROR_GENERIC;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 4281dcb56b..179c8c71c9 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -161,21 +161,23 @@ extern unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer);
 
+static struct blk_desc *dev_desc = NULL;
+static disk_partition_t part_info;
 static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return -1;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return -1;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return -1;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -193,18 +195,18 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return -1;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return -1;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return -1;
+		}
 	}
 	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
 	if (ret != num) {
@@ -222,18 +224,18 @@ static int rkss_write_section(struct rk_secure_storage *rkss)
 static int rkss_read_patition_tables(unsigned char *data)
 {
 	unsigned long ret;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return -1;
-	}
+	if (dev_desc == NULL) {
+		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: Could not find device\n", __func__);
+			return -1;
+		}
 
-	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
-		return -1;
+		if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+			printf("Could not find security partition\n");
+			return -1;
+		}
 	}
 	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
 	if (ret != RKSS_PARTITION_TABLE_COUNT) {

commit 1b4602e0391655a1dbf006953783fb9d6441dcd5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 5 11:27:48 2018 +0800

    gpt: free gpt_pte memory before we get a new one
    
    The memory leak will happen if there is a dev access switch, fix it
    by free the memory before we get a new one.
    
    Change-Id: I5d11609ab5b6cc37f2812d901f2427a1c83fd3a4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index f2454e28d3..bc5ce215f6 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -275,9 +275,15 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	if (!gpt_head)
 		gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 
-	/* We suppose different dev have different size, eg. emmc vs sd */
-	if (gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
+	/*
+	 * We suppose different dev have different size, eg. emmc vs sd
+	 * free the pte first if exist and then will malloc and init a new one.
+	 */
+	if (gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba) {
+		if (gpt_pte)
+			free(gpt_pte);
 		gpt_pte = NULL;
+	}
 
 	/* "part" argument must be at least 1 */
 	if (part < 1) {

commit e2bd44da4a983fcbfe1034514624e08a7fc46743
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 10 09:24:56 2018 +0800

    rockchip: rk3128: fix U-Boot code override by init sp
    
    U-Boot max size is default 1MB, so that if init sp starts
    from the tail of 1M, it overrides the U-Boot images which
    causes a relocation failure.
    
    Change-Id: I5a92fd069a63ca6ce78ac680b335a6ac6767ac02
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 9d1df8360d..d768f56148 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -16,7 +16,7 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SYS_TEXT_BASE		0x60000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60300000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 
 #define GICC_BASE			0x1013A000

commit 14ae479d491a5c251700897eb2c8a34529b55dd1
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Sep 5 16:39:15 2018 +0800

    rockchip: configs: rk3308-aarch32: remove TPL_SYS_MALLOC_F_LEN,UART_ANNOUNCE
    
    Change-Id: I13c03c90d4bcb1599a834cb9780ae88e91c0c692
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
index ed98594362..7b7d2412b6 100644
--- a/configs/rk3308-aarch32_defconfig
+++ b/configs/rk3308-aarch32_defconfig
@@ -9,7 +9,6 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -60,7 +59,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit 188cef68c614783c4be73d8f62cc759a101cf4f0
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Sep 5 16:34:27 2018 +0800

    rockchip: configs: evb-aarch32-rk3308: remove TPL_SYS_MALLOC_F_LEN
    
    remove CONFIG_TPL_SYS_MALLOC_F_LEN and CONFIG_DEBUG_UART_ANNOUNCE.
    
    Change-Id: Ib1552dadebd5bd5ee0b9bb18e26d5f81cc4cf1be
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 5255e19da8..c836b2c1a1 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -10,7 +10,6 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -53,7 +52,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit 6f3de9de6f194c90d292d593b891bd17eae83c74
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Sep 5 16:23:32 2018 +0800

    rockchip: configs: evb-rk3308: remove TPL_SYS_MALLOC_F_LEN and UART_ANNOUNCE
    
    TPL do not need CONFIG_TPL_SYS_MALLOC_F_LEN to reserve early malloc area.
    U-boot, u-boot-spl and u-boot-tpl do not want to print "<debug_uart>" in
    debug_uart_init() function, so remove CONFIG_DEBUG_UART_ANNOUNCE.
    
    Change-Id: I30527bef4958655538f8aa62c1ceb51f485fb245
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 29a7ad44e9..fcc1e167eb 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -8,7 +8,6 @@ CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -51,7 +50,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit d61082e9dfc265c229156f10d08b8019bc795bd1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Sep 7 17:34:06 2018 +0800

    cmd: part: use MAX_SEARCH_PARTITIONS for part search
    
    Use Macro instead of hard code.
    
    Change-Id: I8a41a762bb16ca77816871b357ededdde0b1c875
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/part.c b/cmd/part.c
index 746bf40b2d..834f942446 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -86,7 +86,7 @@ static int do_part_list(int argc, char * const argv[])
 		char str[512] = { '\0', };
 		disk_partition_t info;
 
-		for (p = 1; p < 128; p++) {
+		for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
 			char t[5];
 			int r = part_get_info(desc, p, &info);
 

commit 8fc4f040872ae7fa9c58f5e54ec51f6db9b6a73a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Sep 7 17:26:30 2018 +0800

    part: rkparm: update message don't print by default
    
    The print "invalid parameter" is confused, make it clear to show this is
    a warning from RKPARM partition table.
    
    Change-Id: I1381dd6e60d963f1f233d08c8527495b6ca6101c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index b4a4359f4f..1d4a7d74fd 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -40,7 +40,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	unsigned long size, start;
 
 	if (!cmdline) {
-		printf("invalid parameter\n");
+		debug("RKPARM: Invalid parameter part table\n");
 		return -EINVAL;
 	}
 

commit 1e72694f2c2f8824de9d936ede201edcf1cbb92d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 6 15:26:18 2018 +0800

    rockchip: dw_mmc: do not print msg when not find sample clock
    
    Use debug instead of print for not always print the message, we can use
    mmc info to know MMC mode.
    Update the info by the way.
    
    Change-Id: Iaf5762246b4dbbbb4baf92aca478304dc1f49746
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 6e55ec4538..7030f2fc6a 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -254,7 +254,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 
 	ret = clk_get_by_name(dev, "ciu-sample", &priv->sample_clk);
 	if (ret < 0)
-		printf("Caution: find clock fail, not support hs200!\n");
+		debug("MMC: sample clock not found, not support hs200!\n");
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |

commit 551e2a5047ffdf3182c2207841d279d9bf210974
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 6 10:05:09 2018 +0800

    rockchip: rk3328: add usb for pre-reloc
    
    Enable usb otg when enable kenrel dtb.
    
    Change-Id: I710bfc2137aac6904f9c5f7688a2852575b5208b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 67842670ed..2a92490190 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -34,3 +34,19 @@
 &sdmmc {
 	u-boot,dm-pre-reloc;
 };
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+};
+
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 94d39b1b35..670b98d6fa 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -435,12 +435,6 @@
 		u2phy: usb2-phy@100 {
 			compatible = "rockchip,rk3328-usb2phy";
 			reg = <0x100 0x10>;
-			clocks = <&xin24m>;
-			clock-names = "phyclk";
-			clock-output-names = "usb480m_phy";
-			#clock-cells = <0>;
-			assigned-clocks = <&cru USB480M>;
-			assigned-clock-parents = <&u2phy>;
 			#phy-cells = <1>;
 			status = "disabled";
 

commit 9f9a9f6d1f57a0ce18e01c2f365860936f8cab20
Author: Dayao Ji <jdy@rock-chips.com>
Date:   Thu Sep 6 12:26:22 2018 +0800

    rockchip: resource: get resource from boot partition when AB is enable
    
    In AB system, build recovery as boot, there is no recovery partition
    any more.
    
    Change-Id: I434102d589b369a48ed71c6be3635a9a84f788e0
    Signed-off-by: Dayao Ji <jdy@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b67af6816f..027d563a30 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -199,8 +199,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	/* Get boot mode from misc */
+#ifndef CONFIG_ANDROID_AB
 	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
+#endif
 
 	/* Read boot/recovery and chenc if this is an AOSP img */
 #ifdef CONFIG_ANDROID_AB

commit affcebcd8fd85785644a5be11c469c438434695c
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Aug 16 15:31:09 2018 +0800

    android: verity: Fix environment variable "bootargs" override
    
    Change-Id: Idd079d8773f536928d02f1b32bb562d5540ee85a
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index bf4aa75172..05a9b39af5 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -505,10 +505,37 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	if (verify_result == AVB_SLOT_VERIFY_RESULT_OK ||
 	    verify_result == AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED ||
 	    (unlocked & LOCK_MASK)) {
+		int len = 0;
+		char *bootargs, *newbootargs;
+
+		if (*slot_data[0]->cmdline) {
+			debug("Kernel command line: %s\n", slot_data[0]->cmdline);
+			len += strlen(slot_data[0]->cmdline);
+		}
+
+		bootargs = env_get("bootargs");
+		if (bootargs)
+			len += strlen(bootargs);
+
+		newbootargs = malloc(len + 2);
+
+		if (!newbootargs) {
+			puts("Error: malloc in android_slot_verify failed!\n");
+			return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		}
+		*newbootargs = '\0';
+
+		if (bootargs) {
+			strcpy(newbootargs, bootargs);
+			strcat(newbootargs, " ");
+		}
+		if (*slot_data[0]->cmdline)
+			strcat(newbootargs, slot_data[0]->cmdline);
+		env_set("bootargs", newbootargs);
+
 		memcpy((uint8_t *)load_address,
 		       slot_data[0]->loaded_partitions->data,
 		       slot_data[0]->loaded_partitions->data_size);
-		env_set("bootargs", slot_data[0]->cmdline);
 
 		/* ... and decrement tries remaining, if applicable. */
 		if (!ab_data.slots[slot_index_to_boot].successful_boot &&

commit 270cc02165848317e720ccb8d56d7a29f18630a6
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Sep 5 14:06:09 2018 +0800

    rockchip: px30: fix GPIO IOMUX define error
    
    Change-Id: Ic0c9b1d8b4889769a29e918e1c7d5129d5b67290
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 02b2fd27ad..86e7248982 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -101,7 +101,7 @@ void board_debug_uart_init(void)
 		GPIO2B5_GPIO		= 0,
 		GPIO2B5_PWM2,
 
-		GPIO2B4_SHIFT		= 4,
+		GPIO2B4_SHIFT		= 0,
 		GPIO2B4_MASK		= 0xf << GPIO2B4_SHIFT,
 		GPIO2B4_GPIO		= 0,
 		GPIO2B4_CIF_D0M0,
@@ -156,7 +156,7 @@ void board_debug_uart_init(void)
 		GPIO1D1_GPIO		= 0,
 		GPIO1D1_SDIO_D3,
 
-		GPIO1D0_SHIFT		= 4,
+		GPIO1D0_SHIFT		= 0,
 		GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
 		GPIO1D0_GPIO		= 0,
 		GPIO1D0_SDIO_D2,

commit 440068083588e486bc028f27af469d976e4d2b5c
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Sep 3 17:08:07 2018 +0800

    drm/rockchip: vop: Fix interlace resolution kernel logo move up
    
    Using crtc timing to decide display vertical start point.
    
    Change-Id: I3524cd192c6088311d9d04f489d6c294a1125470
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 74813bf3bd..8113a4e395 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -656,8 +656,8 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_info = (crtc_h - 1) << 16;
 	dsp_info |= (crtc_w - 1) & 0xffff;
 
-	dsp_stx = crtc_x + mode->htotal - mode->hsync_start;
-	dsp_sty = crtc_y + mode->vtotal - mode->vsync_start;
+	dsp_stx = crtc_x + mode->crtc_htotal - mode->crtc_hsync_start;
+	dsp_sty = crtc_y + mode->crtc_vtotal - mode->crtc_vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 
 	if (crtc_state->ymirror) {

commit f8281ef08adde78ada2f3a9e59d54427c9dc8820
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Sep 3 09:39:48 2018 +0800

    video/drm: display: add rockchip_of_find_connector function
    
    Fixes: 747dfc263cb6 (video/drm: display: add rockchip_of_find_connector function)
    Change-Id: Idec9b8a0924fd7863ff39f59bdf2d596332b8e75
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 53ce8cc070..dff5c6c7c9 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1229,46 +1229,37 @@ void rockchip_show_logo(void)
 	}
 }
 
-static struct udevice *rockchip_of_find_connector(struct udevice *dev)
+static struct udevice *rockchip_of_find_connector(ofnode endpoint)
 {
-	ofnode conn_node, port, ep;
-	struct udevice *conn_dev;
+	ofnode ep, port, ports, conn;
+	uint phandle;
+	struct udevice *dev;
 	int ret;
 
-	port = dev_read_subnode(dev, "port");
-	if (!ofnode_valid(port))
+	if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
 		return NULL;
 
-	ofnode_for_each_subnode(ep, port) {
-		ofnode _ep, _port, _ports;
-		uint phandle;
-
-		if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
-			continue;
-
-		_ep = ofnode_get_by_phandle(phandle);
-		if (!ofnode_valid(_ep) || !ofnode_is_available(_ep))
-			continue;
+	ep = ofnode_get_by_phandle(phandle);
+	if (!ofnode_valid(ep) || !ofnode_is_available(ep))
+		return NULL;
 
-		_port = ofnode_get_parent(_ep);
-		if (!ofnode_valid(_port))
-			continue;
+	port = ofnode_get_parent(ep);
+	if (!ofnode_valid(port))
+		return NULL;
 
-		_ports = ofnode_get_parent(_port);
-		if (!ofnode_valid(_ports))
-			continue;
+	ports = ofnode_get_parent(port);
+	if (!ofnode_valid(ports))
+		return NULL;
 
-		conn_node = ofnode_get_parent(_ports);
-		if (!ofnode_valid(conn_node) || !ofnode_is_available(conn_node))
-			continue;
+	conn = ofnode_get_parent(ports);
+	if (!ofnode_valid(conn) || !ofnode_is_available(conn))
+		return NULL;
 
-		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn_node,
-						  &conn_dev);
-		if (!ret)
-			return conn_dev;
-	}
+	ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
+	if (ret)
+		return NULL;
 
-	return NULL;
+	return dev;
 }
 
 static int rockchip_display_probe(struct udevice *dev)
@@ -1336,7 +1327,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		}
 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
-		conn_dev = rockchip_of_find_connector(crtc_dev);
+		conn_dev = rockchip_of_find_connector(np_to_ofnode(ep_node));
 		if (!conn_dev) {
 			printf("Warn: can't find connect driver\n");
 			continue;

commit 175c2742764d13eb9336631be9324d4e3082aeea
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Sep 4 21:55:13 2018 +0800

    driver: ram: rockhip: px30: fix PCTL.MSTR write error
    
    The programming mode of PCTL.MSTR is static,and only Can be written
    when the controller is in reset.
    
    Change-Id: If812a2bcec9f4f907b2539a3418b1526e1a6e1d2
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index d186258f53..03622e67c6 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -726,15 +726,6 @@ static void enable_low_power(struct dram_info *dram,
 	/* off digit module clock when enter power down */
 	setbits_le32(PHY_REG(phy_base, 7), 1 << 7);
 
-	/*
-	 * If DDR3 or DDR4 active_ranks=1,
-	 * it will gate memory clock when enter power down.
-	 * Force set active_ranks to 3 to workaround it.
-	 */
-	if (sdram_params->dramtype == DDR3 || sdram_params->dramtype == DDR4)
-		clrsetbits_le32(pctl_base + DDR_PCTL2_MSTR, 0x3 << 24,
-				0x3 << 24);
-
 	/* enable sr, pd */
 	if (PD_IDLE == 0)
 		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
@@ -1081,7 +1072,13 @@ static u32 remodify_sdram_params(struct px30_sdram_params *sdram_params)
 		break;
 	}
 
-	if (sdram_params->ch.rank == 2)
+	/*
+	 * If DDR3 or DDR4 MSTR.active_ranks=1,
+	 * it will gate memory clock when enter power down.
+	 * Force set active_ranks to 3 to workaround it.
+	 */
+	if (sdram_params->ch.rank == 2 || sdram_params->dramtype == DDR3 ||
+	    sdram_params->dramtype == DDR4)
 		tmp |= 3 << 24;
 	else
 		tmp |= 1 << 24;

commit 7a9c5709e13e2724f77e726d8c2de6bc2e8e7a8d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 4 16:58:22 2018 +0800

    configs: add rk3308-aarch32_defconfig
    
    What's different with evb-aarch32-rk3308_defconfig?
    
    - it enables CONFIG_USING_KERNEL_DTB to use kernel dtb;
    - it doesn't care much about boot time and image size;
    - it can be used for most rk3308 aarch32 board that doesn't have
      very critial quirements on boot time and image size.
    
    Change-Id: Ifca60d29416026b15b3f2a4935f88acb12ce955e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3308-aarch32_defconfig b/configs/rk3308-aarch32_defconfig
new file mode 100644
index 0000000000..ed98594362
--- /dev/null
+++ b/configs/rk3308-aarch32_defconfig
@@ -0,0 +1,76 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ARM64_BOOT_AARCH32=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit f01cc52bce224d1eb46a4adee461c7ccf2752461
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Aug 31 11:51:49 2018 +0800

    lib: optee_client: speed up secure store
    
    use R&W multi blocks and cache used flag to
    speed up secure store.
    
    Change-Id: Ib534fa33e1bb03006ed3b85992d1d48b5fe36f39
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index e5834d64db..d9ff4dd4bc 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -149,7 +149,7 @@ static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
 static int dir_num;
 static int dir_seek;
 
-static int rkss_read_section(struct rk_secure_storage *rkss)
+static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
 	struct blk_desc *dev_desc;
@@ -165,16 +165,15 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 		printf("Could not find security partition\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret != 1) {
+	ret = blk_dread(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
 		printf("blk_dread fail \n");
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
-static int rkss_write_section(struct rk_secure_storage *rkss)
+static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
 	unsigned long ret;
 	struct blk_desc *dev_desc;
@@ -190,12 +189,11 @@ static int rkss_write_section(struct rk_secure_storage *rkss)
 		printf("Could not find security partition\n");
 		return TEEC_ERROR_GENERIC;
 	}
-	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret != 1) {
+	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
 		printf("blk_dwrite fail \n");
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
@@ -220,7 +218,6 @@ static int rkss_read_patition_tables(unsigned char *data)
 		printf("blk_dread fail \n");
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
@@ -243,15 +240,23 @@ static void rkss_dump_ptable(void)
 	int i, n, ret;
 	void *pdata;
 	struct rkss_file_info *p;
+	unsigned char *table_data;
+
+	table_data = malloc(RKSS_PARTITION_TABLE_COUNT * RKSS_DATA_LEN);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return;
+	}
 
 	printf("-------------- DUMP ptable --------------");
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
 		rkss.index = i;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0) {
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
 			pdata = rkss.data;
@@ -262,6 +267,7 @@ static void rkss_dump_ptable(void)
 					p->index, p->size);
 		}
 	}
+	free(table_data);
 	printf("-------------- DUMP END --------------");
 }
 
@@ -271,44 +277,40 @@ static void rkss_dump_usedflags(void)
 	int ret;
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return;
 	}
 	rkss_dump(rkss.data, RKSS_DATA_LEN);
 }
 #endif
 
-static int rkss_verify_ptable(struct rk_secure_storage *rkss)
+static int rkss_verify_ptable(unsigned char *table_data)
 {
-	void *vp = (void *)rkss->data;
-	char *cp = (char *)vp;
+	unsigned char *cp, *vp;
 	struct rkss_file_verification *verify;
-	int ret;
-
-	if (rkss->index > RKSS_PARTITION_TABLE_COUNT) {
-		printf("cannot support verifing other section.");
-		return TEEC_ERROR_GENERIC;
-	}
+	int ret, i;
 
-	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
-	verify = (struct rkss_file_verification *)(void *)cp;
-
-	if (verify->version != RKSS_VERSION
-			|| verify->checkstr != RKSS_CHECK_STR) {
-		printf("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, RKSS_DATA_LEN);
-		verify->checkstr = RKSS_CHECK_STR;
-		verify->version = RKSS_VERSION;
-		ret = rkss_write_section(rkss);
-		if (ret < 0) {
-			printf("cleanning ptable fail ! ret: %d.", ret);
-			return TEEC_ERROR_GENERIC;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		cp = table_data + (i * RKSS_DATA_LEN);
+		vp = cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification);
+		verify = (struct rkss_file_verification *)(void *)vp;
+
+		if (verify->version != RKSS_VERSION
+				|| verify->checkstr != RKSS_CHECK_STR) {
+			printf("verify [%d] fail, cleanning ....", i);
+			memset(cp, 0, RKSS_DATA_LEN);
+			verify->checkstr = RKSS_CHECK_STR;
+			verify->version = RKSS_VERSION;
 		}
-		return TEEC_SUCCESS;
 	}
-	debug("verify success. %lu", rkss->index);
+	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+	debug("verify ptable success.");
 	return TEEC_SUCCESS;
 }
 
@@ -330,7 +332,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
 						(*flagw & 0x0F) | (value << 4);
 			}
-			ret = rkss_write_section(rkss);
+			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
 			if (ret < 0) {
 				printf("clean usedflags section failed!!! ret: %d.", ret);
 				return TEEC_ERROR_GENERIC;
@@ -353,9 +355,9 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	struct rkss_file_info *p;
 
 	rkss.index = i;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -370,6 +372,7 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
 		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+
 	return TEEC_SUCCESS;
 }
 
@@ -532,9 +535,9 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	uint8_t value;
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -555,75 +558,74 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	return TEEC_ERROR_GENERIC;
 }
 
-static int rkss_incref_usedflags_section(int index)
+static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
 	struct rk_secure_storage rkss = {0};
-	int ret, value;
+	int ret, value, i;
 	uint8_t *flag;
 
-	if (index >= RKSS_DATA_SECTION_COUNT) {
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
 		printf("index[%d] out of range.", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
-	flag = (uint8_t *)rkss.data + (int)index/2;
-	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (++value > 0xF) {
-		printf("reference out of data: %d", value);
-		value = 0xF;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (++value > 0xF) {
+			printf("reference out of data: %d", value);
+			value = 0xF;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_section fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
-static int rkss_decref_usedflags_section(int index)
+static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
 	struct rk_secure_storage rkss = {0};
-	int ret, value;
+	int ret, value, i;
 	uint8_t *flag;
 
-	if (index >= RKSS_DATA_SECTION_COUNT) {
-		debug("index[%d] out of range.", index);
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
+		printf("index[%d] out of range.", index);
 		return TEEC_ERROR_GENERIC;
 	}
 
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-
-	flag = (uint8_t *)rkss.data + (int)index/2;
-	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (--value < 0) {
-		printf("reference out of data: %d", value);
-		value = 0x0;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (--value < 0) {
+			printf("reference out of data: %d", value);
+			value = 0x0;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_section fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
-
 	return TEEC_SUCCESS;
 }
 
@@ -662,9 +664,9 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 				debug("write emt ptable : [%d,%d] name:%s, index:%d, ",
 					i, n, p->name, p->index);
 				debug("size:%d, used:%d \n",  p->size, p->used);
-				ret = rkss_write_section(&rkss);
+				ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 				if (ret < 0) {
-					printf("rkss_write_section fail ! ret: %d.", ret);
+					printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 					free(table_data);
 					return TEEC_ERROR_GENERIC;
 				}
@@ -689,9 +691,9 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	struct rkss_file_info *p;
 
 	rkss.index = i;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 
@@ -703,14 +705,15 @@ static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
 	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d \n",
 			i, n, p->name, p->index, p->size, p->used);
 
-	ret = rkss_write_section(&rkss);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_write_section fail ! ret: %d.", ret);
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 #ifdef DEBUG_RKFSS
 	rkss_dump_ptable();
 #endif
+
 	return TEEC_SUCCESS;
 }
 
@@ -751,11 +754,12 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 {
 	char *filename;
 	int fd;
-	int ret, num, i;
+	int ret, num;
 	struct rkss_file_info p = {0};
 	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
 	 * if file exists, we must remove it first.
 	 */
+
 	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
@@ -773,12 +777,10 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		debug("ree_fs_new_create : file exist, clear it. %s", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
-		for (i = 0; i < num; i++) {
-			ret = rkss_decref_usedflags_section(p.index + i);
-			if (ret < 0) {
-				printf("rkss_decref_usedflags_section error !");
-				return TEEC_ERROR_GENERIC;
-			}
+		ret = rkss_decref_multi_usedflags_sections(p.index, num);
+		if (ret < 0) {
+			printf("rkss_decref_multi_usedflags_sections error !");
+			return TEEC_ERROR_GENERIC;
 		}
 
 		/* rm from ptable */
@@ -826,8 +828,8 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	int fd;
 	int ret;
 	struct rkss_file_info p = {0};
-	int section_offs, num, left, di, i, read;
-	struct rk_secure_storage rkss = {0};
+	int di, section_num;
+	uint8_t *temp_file_data;
 
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
@@ -851,35 +853,20 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	if (offs >= p.size)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	section_offs = offs % RKSS_DATA_LEN;
-	num = (len + section_offs) / RKSS_DATA_LEN + 1;
-	left = len > p.size ? p.size : len;
-	di = 0;
-	debug("reading section[%d], fd:%d, len:%zu, offs:%ld, section_offs:%d, filesize:%d \n",
-			p.index, fd, len, offs, section_offs, p.size);
-	for (i = 0; i < num; i++) {
-		rkss.index = p.index + i + offs / RKSS_DATA_LEN;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0) {
-			printf("unavailable file index %lu!", rkss.index);
-			return TEEC_ERROR_GENERIC;
-		}
-
-		if (i == 0) {
-			read = left > RKSS_DATA_LEN - section_offs ? RKSS_DATA_LEN - section_offs : left;
-			memcpy((char *)data + di, rkss.data + section_offs, read);
-		} else {
-			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-			memcpy((char *)data + di, rkss.data, read);
-		}
-#ifdef DEBUG_RKFSS
-		rkss_dump((char *)data + di, read);
-#endif
-		di += read;
-		left -= read;
+	section_num = p.size / RKSS_DATA_LEN + 1;
+	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+	ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
+	if (ret < 0) {
+		printf("unavailable file index!");
+		free(temp_file_data);
+		return TEEC_ERROR_GENERIC;
 	}
-
+	di = (offs + len) > p.size ? (p.size - offs) : len;
+	memcpy(data, temp_file_data + offs, di);
+	free(temp_file_data);
+	temp_file_data = 0;
 	params[1].u.memref.size = di;
+
 	return TEEC_SUCCESS;
 }
 
@@ -889,11 +876,10 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	uint8_t *data;
 	size_t len;
 	off_t offs;
-	struct rk_secure_storage rkss = {0};
 	struct rkss_file_info p = {0};
-	int ret, i, left, fd, new_size;
-	int section_num, di, read, lastw, ws;
-	uint8_t *file_data;
+	int ret, fd, new_size;
+	int section_num;
+	uint8_t *file_data=0, *temp_file_data=0;
 
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
@@ -921,32 +907,21 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	if (p.size != 0) {
 		/* Read old file data out */
 		section_num = p.size / RKSS_DATA_LEN + 1;
-		left = p.size;
-		di = 0;
-		read = 0;
-		for (i = 0; i < section_num; i++) {
-			rkss.index = p.index + i;
-			ret = rkss_read_section(&rkss);
-			if (ret < 0) {
-				printf("unavailable file index %lu!", rkss.index);
-				ret = TEEC_ERROR_GENERIC;
-				goto out;
-			}
-
-			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-			memcpy(file_data + di, rkss.data, read);
-#ifdef DEBUG_RKFSS
-			rkss_dump((char *)data + di, read);
-#endif
-			di += read;
-			left -= read;
-			/* decrease ref from usedflags */
-			ret = rkss_decref_usedflags_section(rkss.index);
-			if (ret < 0) {
-				printf("rkss_decref_usedflags_section error !");
-				ret = TEEC_ERROR_GENERIC;
-				goto out;
-			}
+		temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+		ret = rkss_read_multi_sections(temp_file_data, p.index, section_num);
+		if (ret < 0) {
+			printf("unavailable file index %d section_num %d", p.index, section_num);
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+		memcpy(file_data, temp_file_data, p.size);
+		free(temp_file_data);
+		temp_file_data = 0;
+		ret = rkss_decref_multi_usedflags_sections(p.index, section_num);
+		if (ret < 0) {
+			printf("rkss_decref_multi_usedflags_sections error !");
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
 		}
 	}
 
@@ -957,13 +932,11 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	p.index = rkss_get_empty_section_from_usedflags(section_num);
 	debug("Get Empty section in %d \n", p.index);
 	p.used = 1;
-	for (i = 0; i < section_num; i++) {
-		ret = rkss_incref_usedflags_section(p.index + i);
-		if (ret < 0) {
-			printf("rkss_incref_usedflags_section error !");
-			ret = TEEC_ERROR_GENERIC;
-			goto out;
-		}
+	ret = rkss_incref_multi_usedflags_sections(p.index, section_num);
+	if (ret < 0) {
+		printf("rkss_incref_multi_usedflags_sections error !");
+		ret = TEEC_ERROR_GENERIC;
+		goto out;
 	}
 
 	ret = rkss_write_back_ptable(fd, &p);
@@ -974,26 +947,12 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	}
 
 	/* write new file data */
-	left = p.size;
-	lastw = 0;
-	for (i = 0; i < section_num; i++) {
-		rkss.index = p.index + i;
-		ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-		memset(rkss.data, 0, sizeof(rkss.data));
-		memcpy(rkss.data, file_data + lastw, ws);
-		lastw += ws;
-		left -= RKSS_DATA_LEN;
-		left = left < 0 ? 0 : left;
-#ifdef DEBUG_RKFSS
-		rkss_dump(rkss.data, ws);
-#endif
-		ret = rkss_write_section(&rkss);
-		if (ret < 0) {
-			printf("rkss_write_section: write error!");
-			ret = TEEC_ERROR_GENERIC;
-			goto out;
-		}
-	}
+	temp_file_data = malloc(section_num * RKSS_DATA_LEN);
+	memset(temp_file_data, 0, section_num * RKSS_DATA_LEN);
+	memcpy(temp_file_data, file_data, p.size);
+	rkss_write_multi_sections(temp_file_data, p.index, section_num);
+	free(temp_file_data);
+	temp_file_data = 0;
 
 #ifdef DEBUG_RKFSS
 	rkss_dump_usedflags();
@@ -1002,6 +961,10 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 out:
 	if (file_data)
 		free(file_data);
+	if (temp_file_data) {
+		free(temp_file_data);
+		temp_file_data = 0;
+	}
 
 	return TEEC_SUCCESS;
 }
@@ -1013,6 +976,7 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 	size_t len;
 	int fd, ret;
 	struct rkss_file_info p = {0};
+	unsigned int section_num_old, section_num_new;
 
 	fd = params[0].u.value.b;
 	len = params[0].u.value.c;
@@ -1024,7 +988,17 @@ static TEEC_Result ree_fs_new_truncate(size_t num_params,
 		printf("fd:%d unvailable!", fd);
 		return TEEC_ERROR_GENERIC;
 	}
-
+	if (len > p.size) {
+		printf("truncate error!");
+		return TEEC_ERROR_GENERIC;
+	}
+	section_num_old = p.size / RKSS_DATA_LEN + 1;
+	section_num_new = len / RKSS_DATA_LEN + 1;
+	ret = rkss_decref_multi_usedflags_sections(p.index + section_num_new, section_num_old - section_num_new);
+	if (ret < 0) {
+		printf("rkss_decref_multi_usedflags_sections error !");
+		ret = TEEC_ERROR_GENERIC;
+	}
 	p.size = len;
 	ret = rkss_write_back_ptable(fd, &p);
 	if (ret < 0) {
@@ -1040,7 +1014,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 {
 	char *filename;
 	struct rkss_file_info p = {0};
-	int ret, fd, num, i;
+	int ret, fd, num;
 
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
@@ -1060,13 +1034,10 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 
 	/* decrease ref from usedflags */
 	num = p.size / RKSS_DATA_LEN + 1;
-	i = 0;
-	for (i = 0; i < num; i++) {
-		ret = rkss_decref_usedflags_section(p.index + i);
-		if (ret < 0) {
-			printf("rkss_decref_usedflags_section error !");
-			return TEEC_ERROR_GENERIC;
-		}
+	ret = rkss_decref_multi_usedflags_sections(p.index, num);
+	if (ret < 0) {
+		printf("rkss_decref_multi_usedflags_sections error !");
+		return TEEC_ERROR_GENERIC;
 	}
 
 	/* rm from ptable */
@@ -1081,6 +1052,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	rkss_dump_ptable();
 	rkss_dump_usedflags();
 #endif
+
 	return TEEC_SUCCESS;
 }
 
@@ -1205,39 +1177,42 @@ int tee_supp_rk_fs_init(void)
 	assert(sizeof(struct rkss_file_info) == 126);
 	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
 
-	int i, ret;
+	int ret;
 	struct rk_secure_storage rkss = {0};
+	unsigned char *table_data;
 
 	/* clean secure storage*/
 #ifdef DEBUG_CLEAN_RKSS
+	int i = 0;
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
 		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
-		rkss_write_section(&rkss);
+		rkss_write_multi_sections(rkss.data, rkss.index, 1);
 		printf("cleaned [%d]", i);
 	}
 #endif
 
-	/* Verify Partition Table*/
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
-		debug("rkss_get_fileinfo_by_name: reading %d", i);
-		rkss.index = i;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0) {
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return TEEC_ERROR_GENERIC;
-		}
-		if (rkss_verify_ptable(&rkss) < 0) {
-			printf("rkss_verify_ptable fail !");
-			return TEEC_ERROR_GENERIC;
-		}
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
 	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	/* Verify Partition Table*/
+	rkss_verify_ptable(table_data);
+	free(table_data);
+	table_data = NULL;
 
 	/* Verify Usedflags Section*/
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	ret = rkss_read_section(&rkss);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
 	if (ret < 0) {
-		printf("rkss_read_section fail ! ret: %d.", ret);
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return TEEC_ERROR_GENERIC;
 	}
 	ret = rkss_verify_usedflags(&rkss);
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index c38a128fdf..4281dcb56b 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -161,32 +161,67 @@ extern unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
 extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
 			 lbaint_t blkcnt, const void *buffer);
 
-static int rkss_read_section(struct rk_secure_storage *rkss)
+static int rkss_read_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
 {
-	int ret;
+	unsigned long ret;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		debug("%s: Could not find device\n", __func__);
+		printf("%s: Could not find device\n", __func__);
 		return -1;
 	}
 
 	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		debug("Could not find security partition\n");
+		printf("Could not find security partition\n");
 		return -1;
 	}
-	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret < 0)
+	ret = blk_dread(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
+		printf("blk_dread fail \n");
 		return -1;
+	}
+	return 0;
+}
+
+static int rkss_read_section(struct rk_secure_storage *rkss)
+{
+	return rkss_read_multi_sections(rkss->data, rkss->index, 1);
+}
 
+static int rkss_write_multi_sections(unsigned char *data, unsigned long index, unsigned int num)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return -1;
+	}
+	ret = blk_dwrite(dev_desc, part_info.start + index, num, data);
+	if (ret != num) {
+		printf("blk_dwrite fail \n");
+		return -1;
+	}
 	return 0;
 }
 
 static int rkss_write_section(struct rk_secure_storage *rkss)
 {
-	int ret;
+	return rkss_write_multi_sections(rkss->data, rkss->index, 1);
+}
+
+static int rkss_read_patition_tables(unsigned char *data)
+{
+	unsigned long ret;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
@@ -200,10 +235,11 @@ static int rkss_write_section(struct rk_secure_storage *rkss)
 		printf("Could not find security partition\n");
 		return -1;
 	}
-	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
-	if (ret < 0)
+	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
+	if (ret != RKSS_PARTITION_TABLE_COUNT) {
+		printf("blk_dread fail \n");
 		return -1;
-
+	}
 	return 0;
 }
 
@@ -224,17 +260,26 @@ static void rkss_dump(void* data, unsigned int len)
 static void rkss_dump_ptable(void)
 {
 	printf("-------------- DUMP ptable --------------");
-	int i = 0;
+	int i = 0, ret;
+	unsigned char *table_data;
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return;
+	}
+
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		int n ;
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
@@ -248,6 +293,7 @@ static void rkss_dump_ptable(void)
 					p->index, p->size);
 		}
 	}
+	free(table_data);
 	printf("-------------- DUMP END --------------");
 }
 
@@ -265,63 +311,54 @@ static void rkss_dump_usedflags(void)
 }
 #endif
 
-static int rkss_verify_ptable(struct rk_secure_storage* rkss)
+static int rkss_verify_ptable(unsigned char *table_data)
 {
-	void *vp = (void *)rkss->data;
-	char *cp = (char *)vp;
-
-	if ( rkss->index > RKSS_PARTITION_TABLE_COUNT)
-	{
-		printf("cannot support verifing other section.");
-		return 0;
-	}
-
-	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
-	struct rkss_file_verification *verify =
-			(struct rkss_file_verification *)(void *)cp;
-
-	if (verify->version != RKSS_VERSION
-			|| verify->checkstr != RKSS_CHECK_STR)
-	{
-		debug("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, RKSS_DATA_LEN);
-		verify->checkstr = RKSS_CHECK_STR;
-		verify->version = RKSS_VERSION;
-		int ret = rkss_write_section(rkss);
-		if (ret < 0)
-		{
-			printf("cleanning ptable fail ! ret: %d.", ret);
-			return -1;
+	unsigned char *cp, *vp;
+	struct rkss_file_verification *verify;
+	int ret, i;
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		cp = table_data + (i * RKSS_DATA_LEN);
+		vp = cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification);
+		verify = (struct rkss_file_verification *)(void *)vp;
+
+		if (verify->version != RKSS_VERSION
+				|| verify->checkstr != RKSS_CHECK_STR) {
+			printf("verify [%d] fail, cleanning ....", i);
+			memset(cp, 0, RKSS_DATA_LEN);
+			verify->checkstr = RKSS_CHECK_STR;
+			verify->version = RKSS_VERSION;
 		}
-		return 0;
 	}
+	ret = rkss_write_multi_sections(table_data, 0, RKSS_PARTITION_TABLE_COUNT);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections failed!!! ret: %d.", ret);
+		return -1;
+	}
+	debug("verify ptable success.");
 	return 0;
 }
 
-static int rkss_verify_usedflags(struct rk_secure_storage* rkss)
+static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
 {
 	uint8_t *flags = (uint8_t *)rkss->data;
+	int i, duel, flag, n, value, ret;
+	uint8_t *flagw;
 
-	int i = 0;
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++)
-	{
-		int duel = *(flags + (int)i/2);
-		int flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
-		if ( flag != 0x1 )
-		{
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1) {
 			debug("init usedflags section ...");
 			memset(rkss->data, 0x00, RKSS_DATA_LEN);
-			int n = 0;
-			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++)
-			{
-				uint8_t *flagw = (uint8_t *)rkss->data + (int)n/2;
-				uint8_t value = 0x1;
+			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
+				flagw = (uint8_t *)rkss->data + (int)n/2;
+				value = 0x1;
 				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
 						(*flagw & 0x0F) | (value << 4);
 			}
-			int ret = rkss_write_section(rkss);
-			if (ret < 0)
-			{
+			ret = rkss_write_multi_sections(rkss->data, rkss->index, 1);
+			if (ret < 0) {
 				printf("clean usedflags section failed!!! ret: %d.", ret);
 				return -1;
 			}
@@ -329,6 +366,7 @@ static int rkss_verify_usedflags(struct rk_secure_storage* rkss)
 			return 0;
 		}
 	}
+	debug("rkss_verify_usedflags: sucess.");
 	return 0;
 }
 
@@ -336,36 +374,40 @@ static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
 {
 	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
 	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
-
 	struct rk_secure_storage rkss = {0};
+	int ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
 	rkss.index = i;
-	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
 
-	void *pdata = rkss.data;
-	struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+	pdata = rkss.data;
+	p = (struct rkss_file_info *)pdata;
 	p += n;
 
-	if (p->used != 1)
-	{
-		printf("error: unused section! ");
+	if (p->used != 1) {
+		debug("error: unused section! ");
 		return -1;
 	}
-
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+		p->used, p->name, p->index, p->size);
 	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+
 	return 0;
 }
 
 static int rkss_get_fileinfo_by_name(
 		char* filename, struct rkss_file_info *pfileinfo)
 {
-	int i = 0;
+	int i = 0, ret;
 	uint8_t n = 0;
 	unsigned int len;
+	unsigned char *table_data;
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
@@ -374,16 +416,23 @@ static int rkss_get_fileinfo_by_name(
 		return -1;
 	}
 
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
 		{
@@ -399,6 +448,7 @@ static int rkss_get_fileinfo_by_name(
 				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]",
 						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
 				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+				free(table_data);
 				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
 			}
 
@@ -427,20 +477,23 @@ static int rkss_get_fileinfo_by_name(
 			} while(cur_inpos && cur_svpos);
 
 			debug("Matched folder: %s", p->name);
+			free(table_data);
 			return -100;
 UNMATCHFOLDER:
 			debug("Unmatched ...");
 		}
 	}
 	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	free(table_data);
 	return -1;
 }
 
 static int rkss_get_dirs_by_name(char* filename)
 {
-	int i = 0;
+	int i = 0, ret;
 	uint8_t n = 0;
 	unsigned int len;
+	unsigned char *table_data;
 
 	len = strlen(filename);
 	if (len > RKSS_NAME_MAX_LENGTH - 1)
@@ -449,17 +502,24 @@ static int rkss_get_dirs_by_name(char* filename)
 		return -1;
 	}
 
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
 	dir_num = 0;
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
 		{
@@ -488,6 +548,7 @@ static int rkss_get_dirs_by_name(char* filename)
 			}
 		}
 	}
+	free(table_data);
 	return dir_num;
 }
 
@@ -526,95 +587,100 @@ static int rkss_get_empty_section_from_usedflags(int section_size)
 	return -10;
 }
 
-static int rkss_incref_usedflags_section(int index)
+static int rkss_incref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
-	debug("rkss_incref_usedflags_section :%d", index);
-	if (index >= RKSS_DATA_SECTION_COUNT)
-	{
+	struct rk_secure_storage rkss = {0};
+	int ret, value, i;
+	uint8_t *flag;
+
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
 		printf("index[%d] out of range.", index);
 		return -1;
 	}
 
-	struct rk_secure_storage rkss = {0};
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
 
-	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
-	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (++value > 0xF)
-	{
-		printf("reference out of data: %d", value);
-		value = 0xF;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (++value > 0xF) {
+			printf("reference out of data: %d", value);
+			value = 0xF;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_write_section fail ! ret: %d.", ret);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
-
 	return 0;
 }
 
-static int rkss_decref_usedflags_section(int index)
+static int rkss_decref_multi_usedflags_sections(unsigned int index, unsigned int num)
 {
-	debug("rkss_decref_usedflags_section :%d", index);
-	if (index >= RKSS_DATA_SECTION_COUNT)
-	{
+	struct rk_secure_storage rkss = {0};
+	int ret, value, i;
+	uint8_t *flag;
+
+	if ((index + num) >= RKSS_DATA_SECTION_COUNT) {
 		printf("index[%d] out of range.", index);
 		return -1;
 	}
 
-	struct rk_secure_storage rkss = {0};
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	int ret = rkss_read_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_read_section fail ! ret: %d.", ret);
+	ret = rkss_read_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_read_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
-
-	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
-	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
-	if (--value < 0)
-	{
-		printf("reference out of data: %d", value);
-		value = 0x0;
+	for (i = 0; i < num; i++, index++) {
+		flag = (uint8_t *)rkss.data + (int)index/2;
+		value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+		if (--value < 0) {
+			printf("reference out of data: %d", value);
+			value = 0x0;
+		}
+		*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+				(*flag & 0x0F) | (value << 4);
 	}
-	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
-			(*flag & 0x0F) | (value << 4);
-
-	ret = rkss_write_section(&rkss);
-	if (ret < 0)
-	{
-		printf("rkss_write_section fail ! ret: %d.", ret);
+	ret = rkss_write_multi_sections(rkss.data, rkss.index, 1);
+	if (ret < 0) {
+		printf("rkss_write_multi_sections fail ! ret: %d.", ret);
 		return -1;
 	}
-
 	return 0;
 }
 
 static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 {
-	int i = 0;
+	int i = 0, ret;
+	unsigned char *table_data;
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
+	}
+
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
 	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
 		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
 
 		int n = 0;
 		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
@@ -634,14 +700,16 @@ static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
 				if (ret < 0)
 				{
 					printf("rkss_write_section fail ! ret: %d.", ret);
+					free(table_data);
 					return -1;
 				}
-
+				free(table_data);
 				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
 			}
 		}
 	}
 	printf("No enough ptable space available in secure storage.");
+	free(table_data);
 	return -1;
 }
 
@@ -783,30 +851,21 @@ static int tee_fs_read(struct tee_fs_rpc *fsrpc)
 	}
 
 	int num = fsrpc->len / RKSS_DATA_LEN + 1;
-	int left = fsrpc->len > p.size ? p.size : fsrpc->len;
 	int di = 0;
 	debug("reading section[%d], fd:%d, len:%d, filesize:%d",
 			p.index, fsrpc->fd, fsrpc->len, p.size);
-	int i = 0;
-	for (i = 0; i < num; i++)
-	{
-		struct rk_secure_storage rkss = {0};
-		rkss.index = p.index + i;
-		ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			printf("unavailable file index %lu!", rkss.index);
-			return -1;
-		}
 
-		int read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-		memcpy(data + di, rkss.data, read);
-#ifdef DEBUG_RKFSS
-		rkss_dump(data + di, read);
-#endif
-		di += read;
-		left -= read;
+	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
+	ret = rkss_read_multi_sections(temp_file_data, p.index, num);
+	if (ret < 0) {
+		printf("unavailable file index");
+		free(temp_file_data);
+		return -1;
 	}
+	di = fsrpc->len > p.size ? p.size : fsrpc->len;
+	memcpy(data, temp_file_data, di);
+	free(temp_file_data);
+	temp_file_data = 0;
 	return di;
 }
 
@@ -839,15 +898,11 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 	p.index = rkss_get_empty_section_from_usedflags(num);
 	debug("Get Empty section in %d", p.index);
 	p.used = 1;
-	int i = 0;
-	for (i = 0; i < num; i++)
-	{
-		ret = rkss_incref_usedflags_section(p.index + i);
-		if (ret < 0)
-		{
-			printf("rkss_incref_usedflags_section error !");
-			return -1;
-		}
+
+	ret = rkss_incref_multi_usedflags_sections(p.index, num);
+	if (ret < 0) {
+		printf("rkss_incref_multi_usedflags_sections error !");
+		ret = -1;
 	}
 
 	ret = rkss_write_back_ptable(fsrpc->fd, &p);
@@ -857,28 +912,12 @@ static int tee_fs_write(struct tee_fs_rpc *fsrpc)
 		return -1;
 	}
 
-	int left = p.size;
-	int lastw = 0;
-	for (i = 0; i < num; i++)
-	{
-		struct rk_secure_storage rkss = {0};
-		rkss.index = p.index + i;
-		int ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
-		memcpy(rkss.data, (char *)data + lastw, ws);
-		lastw += ws;
-		left -= RKSS_DATA_LEN;
-		left = left < 0 ? 0 : left;
-		debug("writing: fd:%d, section[%lu], size:%d", fsrpc->fd, rkss.index, ws);
-#ifdef DEBUG_RKFSS
-		rkss_dump(rkss.data, ws);
-#endif
-		ret = rkss_write_section(&rkss);
-		if (ret < 0)
-		{
-			printf("rkss_write_section: write error!");
-			return -1;
-		}
-	}
+	uint8_t *temp_file_data = malloc(num * RKSS_DATA_LEN);
+	memset(temp_file_data, 0, num * RKSS_DATA_LEN);
+	memcpy(temp_file_data, data, p.size);
+	rkss_write_multi_sections(temp_file_data, p.index, num);
+	free(temp_file_data);
+	temp_file_data = 0;
 
 #ifdef DEBUG_RKFSS
 	rkss_dump_usedflags();
@@ -937,15 +976,11 @@ static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
 
 	/* decrease ref from usedflags */
 	int num = p.size / RKSS_DATA_LEN + 1;
-	int i = 0;
-	for (i = 0; i < num; i++)
+	ret = rkss_decref_multi_usedflags_sections(p.index, num);
+	if (ret < 0)
 	{
-		ret = rkss_decref_usedflags_section(p.index + i);
-		if (ret < 0)
-		{
-			printf("rkss_decref_usedflags_section error !");
-			return -1;
-		}
+		printf("rkss_decref_multi_usedflags_sections error !");
+		return -1;
 	}
 
 	/* rm from ptable */
@@ -998,15 +1033,11 @@ static int tee_fs_link(struct tee_fs_rpc *fsrpc)
 	}
 
 	int num = p_new.size / RKSS_DATA_LEN + 1;
-	int i = 0;
-	for (i = 0; i < num; i++)
+	ret = rkss_incref_multi_usedflags_sections(p_new.index, num);
+	if (ret < 0)
 	{
-		ret = rkss_incref_usedflags_section(p_new.index + i);
-		if (ret < 0)
-		{
-			printf("rkss_incref_usedflags_section error !");
-			return -1;
-		}
+		printf("rkss_incref_multi_usedflags_sections error !");
+		return -1;
 	}
 
 #ifdef DEBUG_RKFSS
@@ -1179,7 +1210,8 @@ int tee_supp_rk_fs_init(void)
 	assert(sizeof(struct rkss_file_info) == 126);
 	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
 
-	int i = 0;
+	__maybe_unused int i = 0;
+	unsigned char *table_data;
 #ifdef DEBUG_CLEAN_RKSS // clean secure storage
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
 	{
@@ -1192,28 +1224,32 @@ int tee_supp_rk_fs_init(void)
 #endif
 
 	// Verify Partition Table
-	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
-	{
-		//DMSG("rkss_get_fileinfo_by_name: reading %d",i);
-		struct rk_secure_storage rkss = {0};
-		rkss.index = i;
-		int ret = rkss_read_section(&rkss);
-		if (ret < 0)
-		{
-			debug("rkss_read_section fail ! ret: %d.", ret);
-			return -1;
-		}
-		if (rkss_verify_ptable(&rkss) < 0)
-		{
-			printf("rkss_verify_ptable fail !");
-			return -1;
-		}
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return -1;
 	}
+	int ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+
+	/* Verify Partition Table*/
+	ret = rkss_verify_ptable(table_data);
+	if (ret < 0) {
+		printf("rkss_verify_ptable fail ! ret: %d.", ret);
+		free(table_data);
+		return -1;
+	}
+	free(table_data);
+	table_data = NULL;
 
 	// Verify Usedflags Section
 	struct rk_secure_storage rkss = {0};
 	rkss.index = RKSS_USEDFLAGS_INDEX;
-	int ret = rkss_read_section(&rkss);
+	ret = rkss_read_section(&rkss);
 	if (ret < 0)
 	{
 		printf("rkss_read_section fail ! ret: %d.", ret);

commit 0c0ee60291e48cd1cc6fb05dddf363cd816237fb
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Sep 4 16:42:31 2018 +0800

    phy: rockchip: getting usb-phy device by name
    
    Amend getting usb-phy device by name instead of by index in case that
    various phy devices were existed in DT.
    
    Change-Id: I39e094e0319706554703c52997dd132d9a3e1fad
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index de1a74271a..010c745be7 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -255,7 +255,7 @@ int rockchip_chg_get_type(void)
 	bool is_dcd, vout;
 	int ret;
 
-	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	ret = uclass_get_device_by_name(UCLASS_PHY, "usb2-phy", &udev);
 	if (ret == -ENODEV) {
 		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return ret;
@@ -366,7 +366,7 @@ void otg_phy_init(struct dwc2_udc *dev)
 	void __iomem *base;
 	int ret;
 
-	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	ret = uclass_get_device_by_name(UCLASS_PHY, "usb2-phy", &udev);
 	if (ret == -ENODEV) {
 		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return;

commit f26f96c5879c31a180c636608c1664e793dd0cf1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 17:52:08 2018 +0800

    test: rockchip: add rockusb and fastboot cmd
    
    Change-Id: I23072323c2f2ee655a57af0150c2cb90135d3227
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index ec770d0ae5..303eb3a880 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -14,6 +14,16 @@ typedef struct board_module {
 	int (*test)(int argc, char * const argv[]);
 } board_module_t;
 
+static int board_rockusb_test(int argc, char * const argv[])
+{
+	return run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
+}
+
+static int board_fastboot_test(int argc, char * const argv[])
+{
+	return run_command_list("fastboot usb 0", -1, 0);
+}
+
 static board_module_t g_board_modules[] = {
 #if defined(CONFIG_IRQ)
 	{
@@ -27,7 +37,16 @@ static board_module_t g_board_modules[] = {
 		.desc = "enter bootrom download mode",
 		.test = board_brom_dnl_test
 	},
-
+	{
+		.name = "rockusb",
+		.desc = "enter rockusb download mode",
+		.test = board_rockusb_test
+	},
+	{
+		.name = "fastboot",
+		.desc = "enter fastboot download mode",
+		.test = board_fastboot_test
+	},
 #if defined(CONFIG_DM_KEY)
 	{
 		.name = "key",
@@ -85,7 +104,7 @@ static void help(void)
 	int i;
 
 	printf("Command: rktest [module] [args...]\n"
-	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor\n"
+	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|rockusb|fastboot|vendor\n"
 	       "  - args: depends on module, try 'rktest [module]' for test or more help\n\n");
 
 	printf("  - Enabled modules:\n");

commit 175257e48ba541b92e6fe8f5a3a724f00f1dd5e5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 4 17:06:36 2018 +0800

    power: charge animation: support without CONFIG_IRQ enabled
    
    If CONFIG_IRQ is not enabled, cpu can't suspend to ATF or wfi,
    so that the wakeup period timer is useless.
    
    Give a message warning when CONFIG_IRQ is not enabled.
    
    Change-Id: I9af7e7114ab5d3b3d1026a3ba19ce6cbe56399eb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index bd89383405..854e961798 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -12,7 +12,6 @@
 #include <errno.h>
 #include <key.h>
 #include <pwm.h>
-#include <irq-generic.h>
 #include <asm/arch/rockchip_smccc.h>
 #include <asm/suspend.h>
 #include <linux/input.h>
@@ -23,8 +22,11 @@
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
 #include <power/regulator.h>
-#include <rk_timer_irq.h>
 #include <video_rockchip.h>
+#ifdef CONFIG_IRQ
+#include <irq-generic.h>
+#include <rk_timer_irq.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -141,6 +143,20 @@ static int check_key_press(struct udevice *dev)
 	return state;
 }
 
+/*
+ * If not enable CONFIG_IRQ, cpu can't suspend to ATF or wfi, so that wakeup
+ * period timer is useless.
+ */
+#ifndef CONFIG_IRQ
+static int system_suspend_enter(struct charge_animation_pdata *pdata)
+{
+	return 0;
+}
+
+static void autowakeup_timer_init(struct udevice *dev, uint32_t seconds) {}
+static void autowakeup_timer_uninit(void) {}
+
+#else
 static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
@@ -179,7 +195,6 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 
 	return 0;
 }
-
 static void timer_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -214,6 +229,7 @@ static void autowakeup_timer_uninit(void)
 {
 	irq_free_handler(TIMER_IRQ);
 }
+#endif
 
 #ifdef CONFIG_DRM_ROCKCHIP
 static void charge_show_bmp(const char *name)
@@ -385,7 +401,12 @@ static int charge_animation_show(struct udevice *dev)
 		autowakeup_timer_init(dev, pdata->auto_wakeup_interval);
 	}
 
+/* Give a message warning when CONFIG_IRQ is not enabled */
+#ifdef CONFIG_IRQ
 	printf("Enter U-Boot charging mode\n");
+#else
+	printf("Enter U-Boot charging mode(without IRQ)\n");
+#endif
 
 	charge_start = get_timer(0);
 	delta = get_timer(0);

commit 5166b2759b64d7b88a70f71cdb9a873ddee3630c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 4 16:58:47 2018 +0800

    fuel gauge: rk816: fix compile warning
    
    Change-Id: I934f7a6b75c58d8827e0f0fa1838054608ff77f1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index aa601ee39d..7257211d60 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -930,9 +930,9 @@ static int rk816_bat_get_charger_type(struct battery_priv *di)
 
 static bool rk816_bat_need_initialize(struct battery_priv *di)
 {
-	struct charge_animation_pdata *pdata;
 	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
+	struct charge_animation_pdata *pdata;
 	struct udevice *dev;
 	int est_voltage;
 

commit 2146330a8a382031fcb0c32013014803aaf6f328
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:17:12 2018 +0800

    power: charge animaition doesn't depends on ROCKCHIP_DRM_ROCKCHIP
    
    at some time, we need virtual power mode supported by fuel gauge to
    set a static adapter input current, which don't reall want charge
    animation images show.
    
    Change-Id: If256b15eb585990f5c99781f830480b0d0a83cb4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 0e5b1c84cf..d1eac1757f 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -77,7 +77,7 @@ endchoice
 
 config CHARGE_ANIMATION
 	bool "Enable charge animation"
-	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE && DRM_ROCKCHIP
+	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
 	help
 	  This adds a simple function for charge animation display.
 

commit 1e7c429d5d4fa84a0a74287f1edd55f4e7812500
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 17:01:01 2018 +0800

    test: rockchip: add command description
    
    => rktest
    Command: rktest [module] [args...]
      - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor
      - args: depends on module, try 'rktest [module]' for test or more help
    
      - Enabled modules:
         -      timer: test timer and interrupt
         -       brom: enter bootrom download mode
         -        key: test board keys
         -       emmc: test emmc read/write speed
         -     rknand: test rknand read/write speed
         -  regulator: test regulator volatge set and show regulator status
         -     vendor: test vendor storage partition read/write
    
    Change-Id: I1f58dd65f7ffb229970cb86cb2f568cbca933336
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 8ecf5d524d..ec770d0ae5 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -10,43 +10,90 @@
 
 typedef struct board_module {
 	char *name;
+	char *desc;
 	int (*test)(int argc, char * const argv[]);
 } board_module_t;
 
 static board_module_t g_board_modules[] = {
 #if defined(CONFIG_IRQ)
-	{ .name = "timer",	.test = board_timer_test },
+	{
+		.name = "timer",
+		.desc = "test timer and interrupt",
+		.test = board_timer_test
+	},
 #endif
-	{ .name = "brom",	.test = board_brom_dnl_test },
+	{
+		.name = "brom",
+		.desc = "enter bootrom download mode",
+		.test = board_brom_dnl_test
+	},
 
 #if defined(CONFIG_DM_KEY)
-	{ .name = "key",	.test = board_key_test },
+	{
+		.name = "key",
+		.desc = "test board keys",
+		.test = board_key_test
+	},
 #endif
 #if defined(CONFIG_MMC)
-	{ .name = "emmc",	.test = board_emmc_test },
-#endif
-#if defined(CONFIG_DM_REGULATOR)
-	{ .name = "regulator",	.test = board_regulator_test },
+	{
+		.name = "emmc",
+		.desc = "test emmc read/write speed",
+		.test = board_emmc_test
+	},
 #endif
 #if defined(CONFIG_RKNAND)
-	{ .name = "rknand",	.test = board_rknand_test },
+	{
+		.name = "rknand",
+		.desc = "test rknand read/write speed",
+		.test = board_rknand_test
+	},
+#endif
+
+#if defined(CONFIG_DM_REGULATOR)
+	{
+		.name = "regulator",
+		.desc = "test regulator volatge set and show regulator status",
+		.test = board_regulator_test
+	},
 #endif
 #if defined(CONFIG_GMAC_ROCKCHIP)
-	{ .name = "eth",        .test = board_eth_test },
+	{
+		.name = "eth",
+		.desc = "test ethernet",
+		.test = board_eth_test
+	},
 #endif
 #if defined(CONFIG_RK_IR)
-	{ .name = "ir",		.test = board_ir_test },
+	{
+		.name = "ir",
+		.desc = "test pwm ir remoter for box product",
+		.test = board_ir_test
+	},
 #endif
 #if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
-	{ .name = "vendor",	.test = board_vendor_storage_test },
+	{
+		.name = "vendor",
+		.desc = "test vendor storage partition read/write",
+		.test = board_vendor_storage_test
+	},
 #endif
 };
 
 static void help(void)
 {
-	printf("Command: rktest [module] [args...]\n\n"
+	int i;
+
+	printf("Command: rktest [module] [args...]\n"
 	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor\n"
-	       "  - args: depends on module\n");
+	       "  - args: depends on module, try 'rktest [module]' for test or more help\n\n");
+
+	printf("  - Enabled modules:\n");
+	for (i = 0; i < ARRAY_SIZE(g_board_modules); i++)
+		printf("     - %10s%s %s\n",
+		       g_board_modules[i].name,
+		       g_board_modules[i].desc ? ":" : "",
+		       g_board_modules[i].desc ? g_board_modules[i].desc : "");
 }
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
@@ -68,7 +115,6 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	if (!module_name)
 		return 0;
 
-
 	for (index = 0; index < ARRAY_SIZE(g_board_modules); index++) {
 		module = &g_board_modules[index];
 		if (module && !strcmp(module->name, module_name)) {

commit 32db71f8ce59df938deea5c2559e2ba744e137bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 3 11:17:27 2018 +0800

    dm: regulator: print unfixed bucks voltage
    
    This is mainly for debugging since voltage info is so important
    when system abort at early boot flow of U-Boot or kernel. On
    rockchip platforms, it usually prints vdd_arm and vdd_logic.
    
    Change-Id: Ibb58cb8865ab6857a51a8f50d8a7633c9132985d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index c319b53b95..7182bcc90b 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -267,8 +267,16 @@ int regulator_autoset(struct udevice *dev)
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;
 
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
+	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV) {
 		ret = regulator_set_value(dev, uc_pdata->min_uV);
+	} else {
+		if ((uc_pdata->type == REGULATOR_TYPE_BUCK) &&
+		    (uc_pdata->min_uV != -ENODATA) &&
+		    (uc_pdata->max_uV != -ENODATA))
+			printf("%s %d uV\n",
+			       uc_pdata->name, regulator_get_value(dev));
+	}
+
 	if (uc_pdata->init_uV > 0) {
 		ret = regulator_set_value(dev, uc_pdata->init_uV);
 		if (!ret)

commit cc314ad24f9c9d35747a385a0f99f4d1b05b7146
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 18:06:26 2018 +0800

    rockchip: atags: add atags_is_available()
    
    we would compatible pre-loaders parameters deliver by atags
    and fixed memory address(legacy), this interface gives a way
    to detect if atags is used now.
    
    Change-Id: I75c96faa23812c621e4084c58398605df29d043d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
index ff58c8f927..30a3cf6311 100644
--- a/arch/arm/include/asm/arch-rockchip/rk_atags.h
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -133,6 +133,14 @@ int atags_set_tag(u32 magic, void *tagdata);
  */
 struct tag *atags_get_tag(u32 magic);
 
+/*
+ * atags_is_available - check if atags is available, used for second or
+ *			later pre-loaders.
+ *
+ * return: 0 is not available, otherwise available.
+ */
+int atags_is_available(void);
+
 /* Print only one tag */
 void atags_print_tag(struct tag *t);
 
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 39809d0bed..ffb03532ac 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -27,6 +27,13 @@ static int inline atags_size_overflow(struct tag *t, u32 tag_size)
 	return (unsigned long)t + (tag_size << 2) - ATAGS_PHYS_BASE > ATAGS_SIZE;
 }
 
+int atags_is_available(void)
+{
+	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
+
+	return (t->hdr.magic == ATAG_CORE);
+}
+
 int atags_set_tag(u32 magic, void *tagdata)
 {
 	u32 length, size = 0;

commit de714de0da8c6124890909eaf3456bbaec82b8f7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 17:40:29 2018 +0800

    rockchip: atags: add U_BOOT_CMD "atags" do dump content
    
    Change-Id: I21e6422200e1c60ffc0cc9d520df10fa506b930e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
index 8b992f600e..39809d0bed 100644
--- a/arch/arm/mach-rockchip/rk_atags.c
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -133,7 +133,8 @@ void atags_destroy(void)
 	memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
 }
 
-#ifdef DEBUG_ATAGS
+#if (defined(CONFIG_DEBUG_ATAGS) || defined(DEBUG)) && \
+    !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
 void atags_print_tag(struct tag *t)
 {
 	u32 i;
@@ -250,6 +251,19 @@ void atags_test(void)
 
 	atags_print_all_tags();
 }
+
+static int dump_atags(cmd_tbl_t *cmdtp, int flag,
+		      int argc, char * const argv[])
+{
+	atags_print_all_tags();
+	return 0;
+}
+
+U_BOOT_CMD(
+	atags, 1, 1, dump_atags,
+	"Dump the content of the atags",
+	""
+);
 #else
 void inline atags_print_tag(struct tag *t) {}
 void inline atags_print_all_tags(void) {}

commit 8870d6b7ed68e67a20fdef679977e0ab67d68987
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 09:21:12 2018 +0800

    rockchip: rk1808: add evb board support
    
    Change-Id: Id2beac9acc5b4b96fe480b3b2bea88e2f3c158aa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk1808-evb.dts b/arch/arm/dts/rk1808-evb.dts
new file mode 100644
index 0000000000..116a64e5c2
--- /dev/null
+++ b/arch/arm/dts/rk1808-evb.dts
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/dts-v1/;
+#include "rk1808.dtsi"
+#include "rk1808-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+#include <linux/media-bus-format.h>
+
+/ {
+	model = "Rockchip RK1808 EVB";
+	compatible = "rockchip,rk1808-evb", "rockchip,rk1808";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+};
+
+&emmc {
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+
+	status = "okay";
+};
+
+&sdmmc {
+	supports-sd;
+	status = "disabled";
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	clocks = <&xin24m>, <&xin24m>;
+	clock-names = "baudclk", "apb_pclk";
+
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk1808-u-boot.dtsi b/arch/arm/dts/rk1808-u-boot.dtsi
new file mode 100644
index 0000000000..ba09a1dc12
--- /dev/null
+++ b/arch/arm/dts/rk1808-u-boot.dtsi
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+	};
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk1808.dtsi b/arch/arm/dts/rk1808.dtsi
new file mode 100644
index 0000000000..b56bb3bca3
--- /dev/null
+++ b/arch/arm/dts/rk1808.dtsi
@@ -0,0 +1,1334 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+#include <dt-bindings/clock/rk1808-cru.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	compatible = "rockchip,rk1808";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		serial2 = &uart2;
+		spi0 = &spi0;
+		spi1 = &spi1;
+		spi2 = &spi2;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x0>;
+			clocks = <&cru ARMCLK>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x1>;
+			clocks = <&cru ARMCLK>;
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>;
+	};
+
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+		arm,no-tick-in-suspend;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+		#clock-cells = <0>;
+	};
+
+	xin32k: xin32k {
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		#clock-cells = <0>;
+	};
+
+	grf: syscon@fe000000 {
+		compatible = "rockchip,rk1808-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xfe000000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+	pmugrf: syscon@fe410000 {
+		compatible = "rockchip,rk1808-pmugrf", "syscon", "simple-mfd";
+		reg = <0x0 0xfe410000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+	gic: interrupt-controller@ff100000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+
+		reg = <0x0 0xff100000 0 0x10000>, /* GICD */
+		      <0x0 0xff140000 0 0xc0000>, /* GICR */
+		      <0x0 0xff300000 0 0x10000>, /* GICC */
+		      <0x0 0xff310000 0 0x10000>, /* GICH */
+		      <0x0 0xff320000 0 0x10000>; /* GICV */
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		its: interrupt-controller@ff120000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			reg = <0x0 0xff120000 0x0 0x20000>;
+		};
+	};
+
+	cru: clock-controller@ff350000 {
+		compatible = "rockchip,rk1808-cru";
+		reg = <0x0 0xff350000 0x0 0x5000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&cru PLL_GPLL>, <&cru PLL_CPLL>,
+			<&cru PLL_PPLL>, <&cru ARMCLK>,
+			<&cru MSCLK_PERI>, <&cru LSCLK_PERI>,
+			<&cru HSCLK_BUS_PRE>, <&cru MSCLK_BUS_PRE>,
+			<&cru LSCLK_BUS_PRE>;
+		assigned-clock-rates =
+			<1200000000>, <1000000000>,
+			<416000000>, <816000000>,
+			<200000000>, <100000000>,
+			<300000000>, <200000000>,
+			<100000000>;
+	};
+
+	tsadc: tsadc@ff3a0000 {
+		compatible = "rockchip,rk1808-tsadc";
+		reg = <0x0 0xff3a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <120000>;
+		status = "disabled";
+	};
+
+	pwm0: pwm@ff3d0000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff3d0010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff3d0020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff3d0030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm4: pwm@ff3d8000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm4_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@ff3d8010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm5_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@ff3d8020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm6_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@ff3d8030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff3d8030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm7_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	i2c0: i2c@ff410000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff410000 0x0 0x1000>;
+		clocks =  <&cru SCLK_PMU_I2C0>, <&cru PCLK_I2C0_PMU>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	amba {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dmac: dmac@ff4e0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff4e0000 0x0 0x4000>;
+			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru ACLK_DMAC>;
+			//clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			peripherals-req-type-burst;
+		};
+	};
+
+	i2c1: i2c@ff500000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff500000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@ff504000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff504000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2m0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@ff508000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff508000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c4: i2c@ff50c000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff50c000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C4>, <&cru PCLK_I2C4>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c4_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c5: i2c@ff510000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff100000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C5>, <&cru PCLK_I2C5>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c5_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	spi0: spi@ff520000 {
+		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff520000 0x0 0x1000>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 10>, <&dmac 11>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>;
+		pinctrl-1 = <&spi0_clk_hs &spi0_csn &spi0_miso_hs &spi0_mosi_hs>;
+		status = "disabled";
+	};
+
+	spi1: spi@ff530000 {
+		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff530000 0x0 0x1000>;
+		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 12>, <&dmac 13>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>;
+		pinctrl-1 = <&spi1_clk_hs &spi1_csn0 &spi1_csn1 &spi1_miso_hs &spi1_mosi_hs>;
+		status = "disabled";
+	};
+
+	spi2: spi@ff580000 {
+		compatible = "rockchip,rk1808-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff580000 0x0 0x1000>;
+		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 14>, <&dmac 15>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default", "high_speed";
+		pinctrl-0 = <&spi2m0_clk &spi2m0_csn &spi2m0_miso &spi2m0_mosi>;
+		pinctrl-1 = <&spi2m0_clk_hs &spi2m0_csn &spi2m0_miso_hs &spi2m0_mosi_hs>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff550000 {
+		compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff550000 0x0 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	pwm8: pwm@ff5d0000 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm8_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm9: pwm@fff5d0010 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm9_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm10: pwm@ff5d0020 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm10_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm11: pwm@ff5d0030 {
+		compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff5d0030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm11_pin>;
+		clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	sdmmc: dwmmc@ffcf0000 {
+		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xffcf0000 0x0 0x4000>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		max-frequency = <150000000>;
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@ffd00000 {
+		compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xffd00000 0x0 0x4000>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		max-frequency = <150000000>;
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	gmac: ethernet@ffdd0000 {
+		compatible = "rockchip,rk1808-gmac";
+		reg = <0x0 0xffdd0000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_GMAC>, <&cru SCLK_GMAC_RX_TX>,
+			 <&cru SCLK_GMAC_RX_TX>, <&cru SCLK_GMAC_REF>,
+			 <&cru SCLK_GMAC_REFOUT>, <&cru ACLK_GMAC>,
+			 <&cru PCLK_GMAC>, <&cru SCLK_GMAC_RGMII_SPEED>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac", "clk_mac_speed";
+		phy-mode = "rgmii";
+		pinctrl-names = "default";
+		pinctrl-0 = <&rgmii_pins>;
+		resets = <&cru SRST_GAMC_A>;
+		reset-names = "stmmaceth";
+		/* power-domains = <&power RK1808_PD_GMAC>; */
+		status = "disabled";
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk1808-pinctrl";
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmugrf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio0@ff4c0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff4c0000 0x0 0x100>;
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_PMU_GPIO0>, <&cru PCLK_GPIO0_PMU>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@ff690000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff690000 0x0 0x100>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO1>, <&cru PCLK_GPIO1>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@ff6a0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff6a0000 0x0 0x100>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO2>, <&cru PCLK_GPIO2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@ff6b0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff6b0000 0x0 0x100>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO3>, <&cru PCLK_GPIO3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio4@ff6c0000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff6c0000 0x0 0x100>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru SCLK_GPIO4>, <&cru PCLK_GPIO4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+			bias-pull-up;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_4ma: pcfg-pull-up-4ma {
+			bias-pull-up;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_4ma: pcfg-pull-none-4ma {
+			bias-disable;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_down_4ma: pcfg-pull-down-4ma {
+			bias-pull-down;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+			bias-disable;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+			bias-disable;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+			bias-pull-up;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
+		pcfg_output_high: pcfg-output-high {
+			output-high;
+		};
+
+		pcfg_output_low: pcfg-output-low {
+			output-low;
+		};
+
+		pcfg_input_high: pcfg-input-high {
+			bias-pull-up;
+			input-enable;
+		};
+
+		pcfg_input: pcfg-input {
+			input-enable;
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins =
+					/* emmc_clkout */
+					<1 9 1 &pcfg_pull_none>;
+			};
+
+			emmc_rstnout: emmc-rstnout {
+				rockchip,pins =
+					/* emmc_rstn */
+					<1 11 1 &pcfg_pull_none>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins =
+					/* emmc_d0 */
+					<1 RK_PA0 1 &pcfg_pull_none>,
+					/* emmc_d1 */
+					<1 RK_PA1 1 &pcfg_pull_none>,
+					/* emmc_d2 */
+					<1 RK_PA2 1 &pcfg_pull_none>,
+					/* emmc_d3 */
+					<1 RK_PA3 1 &pcfg_pull_none>,
+					/* emmc_d4 */
+					<1 RK_PA4 1 &pcfg_pull_none>,
+					/* emmc_d5 */
+					<1 RK_PA5 1 &pcfg_pull_none>,
+					/* emmc_d6 */
+					<1 RK_PA6 1 &pcfg_pull_none>,
+					/* emmc_d7 */
+					<1 RK_PA7 1 &pcfg_pull_none>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins =
+					<1 RK_PB0 1 &pcfg_pull_none>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins =
+					<1 RK_PB2 1 &pcfg_pull_none>;
+			};
+		};
+
+		gmac {
+			rgmii_pins: rgmii-pins {
+				rockchip,pins =
+					/* rgmii_txen */
+					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					/* rgmii_txd1 */
+					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					/* rgmii_txd0 */
+					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					/* rgmii_rxd0 */
+					<2 RK_PA4 2 &pcfg_pull_none>,
+					/* rgmii_rxd1 */
+					<2 RK_PA5 2 &pcfg_pull_none>,
+					/* rgmii_rxdv */
+					<2 RK_PA7 2 &pcfg_pull_none>,
+					/* rgmii_mdio */
+					<2 RK_PB0 2 &pcfg_pull_none>,
+					/* rgmii_mdc */
+					<2 RK_PB2 2 &pcfg_pull_none>,
+					/* rgmii_txd3 */
+					<2 RK_PB3 2 &pcfg_pull_none_12ma>,
+					/* rgmii_txd2 */
+					<2 RK_PB4 2 &pcfg_pull_none_12ma>,
+					/* rgmii_rxd2 */
+					<2 RK_PB5 2 &pcfg_pull_none>,
+					/* rgmii_rxd3 */
+					<2 RK_PB6 2 &pcfg_pull_none>,
+					/* rgmii_clk */
+					<2 RK_PB7 2 &pcfg_pull_none>,
+					/* rgmii_txclk */
+					<2 RK_PC1 2 &pcfg_pull_none_12ma>,
+					/* rgmii_rxclk */
+					<2 RK_PC2 2 &pcfg_pull_none>;
+			};
+
+			rmii_pins: rmii-pins {
+				rockchip,pins =
+					/* rmii_txen */
+					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					/* rmii_txd1 */
+					<2 RK_PA2 2 &pcfg_pull_none_12ma>,
+					/* rmii_txd0 */
+					<2 RK_PA3 2 &pcfg_pull_none_12ma>,
+					/* rmii_rxd0 */
+					<2 RK_PA4 2 &pcfg_pull_none>,
+					/* rmii_rxd1 */
+					<2 RK_PA5 2 &pcfg_pull_none>,
+					/* rmii_rxer */
+					<2 RK_PA6 2 &pcfg_pull_none>,
+					/* rmii_rxdv */
+					<2 RK_PA7 2 &pcfg_pull_none>,
+					/* rmii_mdio */
+					<2 RK_PB0 2 &pcfg_pull_none>,
+					/* rmii_mdc */
+					<2 RK_PB2 2 &pcfg_pull_none>,
+					/* rmii_clk */
+					<2 RK_PB7 2 &pcfg_pull_none>;
+			};
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins =
+					/* i2c0_sda */
+					<0 RK_PB1 1 &pcfg_pull_none_smt>,
+					/* i2c0_scl */
+					<0 RK_PB0 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins =
+					/* i2c1_sda */
+					<0 RK_PC1 1 &pcfg_pull_none_smt>,
+					/* i2c1_scl */
+					<0 RK_PC0 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c2m0 {
+			i2c2m0_xfer: i2c2m0-xfer {
+				rockchip,pins =
+					/* i2c2m0_sda */
+					<3 RK_PB4 2 &pcfg_pull_none_smt>,
+					/* i2c2m0_scl */
+					<3 RK_PB3 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins =
+					/* i2c3_sda */
+					<2 RK_PD1 1 &pcfg_pull_none_smt>,
+					/* i2c3_scl */
+					<2 RK_PD0 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c4 {
+			i2c4_xfer: i2c4-xfer {
+				rockchip,pins =
+					/* i2c4_sda */
+					<3 RK_PC3 3 &pcfg_pull_none_smt>,
+					/* i2c4_scl */
+					<3 RK_PC2 3 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c5 {
+			i2c5_xfer: i2c5-xfer {
+				rockchip,pins =
+					/* i2c5_sda */
+					<4 RK_PC2 1 &pcfg_pull_none_smt>,
+					/* i2c5_scl */
+					<4 RK_PC1 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2s1 {
+			i2s1_2ch_lrck: i2s1-2ch-lrck {
+				rockchip,pins =
+					<3 RK_PA0 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_sclk: i2s1-2ch-sclk {
+				rockchip,pins =
+					<3 RK_PA1 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_mclk: i2s1-2ch-mclk {
+				rockchip,pins =
+					<3 RK_PA2 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_sdo: i2s1-2ch-sdo {
+				rockchip,pins =
+					<3 RK_PA3 1 &pcfg_pull_none>;
+			};
+			i2s1_2ch_sdi: i2s1-2ch-sdi {
+				rockchip,pins =
+					<3 RK_PA4 1 &pcfg_pull_none>;
+			};
+		};
+
+		i2s0 {
+			i2s0_8ch_sdi3: i2s0-8ch-sdi3 {
+				rockchip,pins =
+					<3 RK_PA5 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdi2: i2s0-8ch-sdi2 {
+				rockchip,pins =
+					<3 RK_PA6 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdi1: i2s0-8ch-sdi1 {
+				rockchip,pins =
+					<3 RK_PA7 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sclkrx: i2s0-8ch-sclkrx {
+				rockchip,pins =
+					<3 RK_PB0 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_lrckrx: i2s0-8ch-lrckrx {
+				rockchip,pins =
+					<3 RK_PB1 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo3: i2s0-8ch-sdo3 {
+				rockchip,pins =
+					<3 RK_PB2 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo2: i2s0-8ch-sdo2 {
+				rockchip,pins =
+					<3 RK_PB3 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo1: i2s0-8ch-sdo1 {
+				rockchip,pins =
+					<3 RK_PB4 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_mclk: i2s0-8ch-mclk {
+				rockchip,pins =
+					<3 RK_PB5 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_lrcktx: i2s0-8ch-lrcktx {
+				rockchip,pins =
+					<3 RK_PB6 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sclktx: i2s0-8ch-sclktx {
+				rockchip,pins =
+					<3 RK_PB7 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdo0: i2s0-8ch-sdo0 {
+				rockchip,pins =
+					<3 RK_PC0 1 &pcfg_pull_none>;
+			};
+			i2s0_8ch_sdi0: i2s0-8ch-sdi0 {
+				rockchip,pins =
+					<3 RK_PC1 1 &pcfg_pull_none>;
+			};
+		};
+
+		pciusb {
+			pciusb_pins: pciusb-pins {
+				rockchip,pins =
+					/* pciusb_debug0 */
+					<4 RK_PB4 3 &pcfg_pull_none>,
+					/* pciusb_debug1 */
+					<4 RK_PB5 3 &pcfg_pull_none>,
+					/* pciusb_debug2 */
+					<4 RK_PB6 3 &pcfg_pull_none>,
+					/* pciusb_debug3 */
+					<4 RK_PB7 3 &pcfg_pull_none>,
+					/* pciusb_debug4 */
+					<4 RK_PC0 3 &pcfg_pull_none>,
+					/* pciusb_debug5 */
+					<4 RK_PC1 3 &pcfg_pull_none>,
+					/* pciusb_debug6 */
+					<4 RK_PC2 3 &pcfg_pull_none>,
+					/* pciusb_debug7 */
+					<4 RK_PC3 3 &pcfg_pull_none>;
+			};
+		};
+
+		pdm {
+			pdm_clk: pdm-clk {
+				rockchip,pins =
+					/* pdm_clk0 */
+					<3 RK_PB0 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi3: pdm-sdi3 {
+				rockchip,pins =
+					<3 RK_PA5 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi2: pdm-sdi2 {
+				rockchip,pins =
+					<3 RK_PA6 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi1: pdm-sdi1 {
+				rockchip,pins =
+					<3 RK_PA7 2 &pcfg_pull_none>;
+			};
+
+			pdm_clk1: pdm-clk1 {
+				rockchip,pins =
+					<3 RK_PB1 2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi0: pdm-sdi0 {
+				rockchip,pins =
+					<3 RK_PC1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins =
+					<0 RK_PB7 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins =
+					<0 RK_PC3 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins =
+					<0 RK_PC5 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins =
+					<0 RK_PC4 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm4 {
+			pwm4_pin: pwm4-pin {
+				rockchip,pins =
+					<1 RK_PB6 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm5 {
+			pwm5_pin: pwm5-pin {
+				rockchip,pins =
+					<1 RK_PB7 2 &pcfg_pull_none>;
+			};
+		};
+		pwm6 {
+			pwm6_pin: pwm6-pin {
+				rockchip,pins =
+					<3 RK_PA1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm7 {
+			pwm7_pin: pwm7-pin {
+				rockchip,pins =
+					<3 RK_PA2 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm8 {
+			pwm8_pin: pwm8-pin {
+				rockchip,pins =
+					<3 RK_PD0 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm9 {
+			pwm9_pin: pwm9-pin {
+				rockchip,pins =
+					<3 RK_PD1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm10 {
+			pwm10_pin: pwm10-pin {
+				rockchip,pins =
+					<3 RK_PD2 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm11 {
+			pwm11_pin: pwm11-pin {
+				rockchip,pins =
+					<3 RK_PD3 2 &pcfg_pull_none>;
+			};
+		};
+
+		sdmmc0 {
+			sdmmc0_bus4: sdmmc0-bus4 {
+				rockchip,pins =
+				/* sdmmc0_d0 */
+				<4 RK_PA2 1 &pcfg_pull_none>,
+				/* sdmmc0_d1 */
+				<4 RK_PA3 1 &pcfg_pull_none>,
+				/* sdmmc0_d2 */
+				<4 RK_PA4 1 &pcfg_pull_none>,
+				/* sdmmc0_d3 */
+				<4 RK_PA5 1 &pcfg_pull_none>;
+			};
+			sdmmc0_cmd: sdmmc0-cmd {
+				rockchip,pins =
+					<4 RK_PA0 1 &pcfg_pull_none>;
+			};
+			sdmmc0_clk: sdmmc0-clk {
+				rockchip,pins =
+					<4 RK_PA1 1 &pcfg_pull_none>;
+			};
+		};
+
+		sdmmc1 {
+			sdmmc1_bus4: sdmmc1-bus4 {
+				rockchip,pins =
+				/* sdmmc1_d0 */
+				<4 RK_PB0 1 &pcfg_pull_none>,
+				/* sdmmc1_d1 */
+				<4 RK_PB1 1 &pcfg_pull_none>,
+				/* sdmmc1_d2 */
+				<4 RK_PB2 1 &pcfg_pull_none>,
+				/* sdmmc1_d3 */
+				<4 RK_PB3 1 &pcfg_pull_none>;
+			};
+
+			sdmmc1_cmd: sdmmc1-cmd {
+				rockchip,pins =
+					<4 RK_PA6 1 &pcfg_pull_none>;
+			};
+
+			sdmmc1_clk: sdmmc1-clk {
+				rockchip,pins =
+					<4 RK_PB1 1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_mosi: spi0-mosi {
+				rockchip,pins =
+					<1 RK_PB4 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_miso: spi0-miso {
+				rockchip,pins =
+					<1 RK_PB5 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_csn: spi0-csn {
+				rockchip,pins =
+					<1 RK_PB6 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_clk: spi0-clk {
+				rockchip,pins =
+					<1 RK_PB7 1 &pcfg_pull_up_4ma>;
+			};
+
+			spi0_mosi_hs: spi0-mosi-hs {
+				rockchip,pins =
+					<1 RK_PB4 1 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_miso_hs: spi0-miso-hs {
+				rockchip,pins =
+					<1 RK_PB5 1 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_csn_hs: spi0-csn-hs {
+				rockchip,pins =
+					<1 RK_PB6 1 &pcfg_pull_up_8ma>;
+			};
+
+			spi0_clk_hs: spi0-clk-hs {
+				rockchip,pins =
+					<1 RK_PB7 1 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins =
+					<4 RK_PB4 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_mosi: spi1-mosi {
+				rockchip,pins =
+					<4 RK_PB5 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_csn0: spi1-csn0 {
+				rockchip,pins =
+					<4 RK_PB6 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_miso: spi1-miso {
+				rockchip,pins =
+					<4 RK_PB7 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_csn1: spi1-csn1 {
+				rockchip,pins =
+					<4 RK_PC0 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi1_clk_hs: spi1-clk-hs {
+				rockchip,pins =
+					<4 RK_PB4 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_mosi_hs: spi1-mosi-hs {
+				rockchip,pins =
+					<4 RK_PB5 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_csn0_hs: spi1-csn0-hs {
+				rockchip,pins =
+					<4 RK_PB6 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_miso_hs: spi1-miso-hs {
+				rockchip,pins =
+					<4 RK_PB7 2 &pcfg_pull_up_8ma>;
+			};
+
+			spi1_csn1_hs: spi1-csn1-hs {
+				rockchip,pins =
+					<4 RK_PC0 2 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		spi1m1 {
+			spi1m1_clk: spi1m1-clk {
+				rockchip,pins =
+					<3 RK_PC7 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_mosi: spi1m1-mosi {
+				rockchip,pins =
+					<3 RK_PD0 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_csn0: spi1m1-csn0 {
+				rockchip,pins =
+					<3 RK_PD1 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_miso: spi1m1-miso {
+				rockchip,pins =
+					<3 RK_PD2 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_csn1: spi1m1-csn1 {
+				rockchip,pins =
+					<3 RK_PD3 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi1m1_clk_hs: spi1m1-clk-hs {
+				rockchip,pins =
+					<3 RK_PC7 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_mosi_hs: spi1m1-mosi-hs {
+				rockchip,pins =
+					<3 RK_PD0 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_csn0_hs: spi1m1-csn0-hs {
+				rockchip,pins =
+					<3 RK_PD1 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_miso_hs: spi1m1-miso-hs {
+				rockchip,pins =
+					<3 RK_PD2 3 &pcfg_pull_none>;
+			};
+
+			spi1m1_csn1_hs: spi1m1-csn1-hs {
+				rockchip,pins =
+					<3 RK_PD3 3 &pcfg_pull_none>;
+			};
+		};
+
+		spi2m0 {
+			spi2m0_miso: spi2m0-miso {
+				rockchip,pins =
+					<1 RK_PA6 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_clk: spi2m0-clk {
+				rockchip,pins =
+					<1 RK_PA7 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_mosi: spi2m0-mosi {
+				rockchip,pins =
+					<1 RK_PB0 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_csn: spi2m0-csn {
+				rockchip,pins =
+					<1 RK_PB1 2 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m0_miso_hs: spi2m0-miso-hs {
+				rockchip,pins =
+					<1 RK_PA6 2 &pcfg_pull_none>;
+			};
+
+			spi2m0_clk_hs: spi2m0-clk-hs {
+				rockchip,pins =
+					<1 RK_PA7 2 &pcfg_pull_none>;
+			};
+
+			spi2m0_mosi_hs: spi2m0-mosi-hs {
+				rockchip,pins =
+					<1 RK_PB0 2 &pcfg_pull_none>;
+			};
+
+			spi2m0_csn_hs: spi2m0-csn-hs {
+				rockchip,pins =
+					<1 RK_PB1 2 &pcfg_pull_none>;
+			};
+		};
+
+		spi2m1 {
+			spi2m1_miso: spi2m1-miso {
+				rockchip,pins =
+					<2 RK_PA4 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_clk: spi2m1-clk {
+				rockchip,pins =
+					<2 RK_PA5 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_mosi: spi2m1-mosi {
+				rockchip,pins =
+					<2 RK_PA6 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_csn: spi2m1-csn {
+				rockchip,pins =
+					<2 RK_PA7 3 &pcfg_pull_up_4ma>;
+			};
+
+			spi2m1_miso_hs: spi2m1-miso-hs {
+				rockchip,pins =
+					<2 RK_PA4 3 &pcfg_pull_none>;
+			};
+
+			spi2m1_clk_hs: spi2m1-clk-hs {
+				rockchip,pins =
+					<2 RK_PA5 3 &pcfg_pull_none>;
+			};
+
+			spi2m1_mosi_hs: spi2m1-mosi-hs {
+				rockchip,pins =
+					<2 RK_PA6 3 &pcfg_pull_none>;
+			};
+
+			spi2m1_csn_hs: spi2m1-csn-hs {
+				rockchip,pins =
+					<2 RK_PA7 3 &pcfg_pull_none>;
+			};
+		};
+
+		uart2m0 {
+			uart2m0_xfer: uart2m0-xfer {
+				rockchip,pins =
+					/* uart2_rxm0 */
+					<4 RK_PA3 2 &pcfg_pull_none>,
+					/* uart2_txm0 */
+					<4 RK_PA2 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2m1 {
+			uart2m1_xfer: uart2m1-xfer {
+				rockchip,pins =
+					/* uart2_rxm1 */
+					<2 RK_PD1 2 &pcfg_pull_none>,
+					/* uart2_txm1 */
+					<2 RK_PD0 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2m2 {
+			uart2m2_xfer: uart2m2-xfer {
+				rockchip,pins =
+					/* uart2_rxm2 */
+					<3 RK_PA4 2 &pcfg_pull_none>,
+					/* uart2_txm2 */
+					<3 RK_PA3 2 &pcfg_pull_none>;
+			};
+		};
+		tsadc {
+			tsadc_otp_gpio: tsadc-otp-gpio {
+				rockchip,pins =
+					<0 RK_PA6 0 &pcfg_pull_none>;
+			};
+
+			tsadc_otp_out: tsadc-otp-out {
+				rockchip,pins =
+					<0 RK_PA6 2 &pcfg_pull_none>;
+			};
+		};
+	};
+};
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index afa6a772ef..9d237d4bd6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -527,5 +527,6 @@ source "arch/arm/mach-rockchip/rk3308/Kconfig"
 source "arch/arm/mach-rockchip/rk3328/Kconfig"
 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
+source "arch/arm/mach-rockchip/rk1808/Kconfig"
 source "arch/arm/mach-rockchip/rv1108/Kconfig"
 endif
diff --git a/arch/arm/mach-rockchip/rk1808/Kconfig b/arch/arm/mach-rockchip/rk1808/Kconfig
new file mode 100644
index 0000000000..66ad22f518
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/Kconfig
@@ -0,0 +1,15 @@
+if ROCKCHIP_RK1808
+
+config TARGET_EVB_RK1808
+	bool "EVB_RK1808"
+	select BOARD_LATE_INIT
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+source "board/rockchip/evb_rk1808/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_rk1808/Kconfig b/board/rockchip/evb_rk1808/Kconfig
new file mode 100644
index 0000000000..0da54f0137
--- /dev/null
+++ b/board/rockchip/evb_rk1808/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK1808
+
+config SYS_BOARD
+	default "evb_rk1808"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk1808"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk1808/MAINTAINERS b/board/rockchip/evb_rk1808/MAINTAINERS
new file mode 100644
index 0000000000..883c15ab85
--- /dev/null
+++ b/board/rockchip/evb_rk1808/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK1808
+M:      Joseph Chen <chenjh@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk1808
+F:      include/configs/evb_rk1808.h
+F:      configs/rk1808_defconfig
diff --git a/board/rockchip/evb_rk1808/Makefile b/board/rockchip/evb_rk1808/Makefile
new file mode 100644
index 0000000000..145218c226
--- /dev/null
+++ b/board/rockchip/evb_rk1808/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_rk1808.o
diff --git a/board/rockchip/evb_rk1808/evb_rk1808.c b/board/rockchip/evb_rk1808/evb_rk1808.c
new file mode 100644
index 0000000000..3a69da06e1
--- /dev/null
+++ b/board/rockchip/evb_rk1808/evb_rk1808.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/rk1808_defconfig b/configs/rk1808_defconfig
new file mode 100644
index 0000000000..313c93ad8e
--- /dev/null
+++ b/configs/rk1808_defconfig
@@ -0,0 +1,53 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK1808=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_RK1808=y
+CONFIG_DEFAULT_DEVICE_TREE="rk1808-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff550000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
diff --git a/include/configs/evb_rk1808.h b/include/configs/evb_rk1808.h
new file mode 100644
index 0000000000..e2eb28768a
--- /dev/null
+++ b/include/configs/evb_rk1808.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __EVB_RK1808_H
+#define __EVB_RK1808_H
+
+#include <configs/rk1808_common.h>
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+			"stdout=serial,vidconsole\0" \
+			"stderr=serial,vidconsole\0"
+
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
+#endif
diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
index f42e43b43c..79938f7388 100644
--- a/include/dt-bindings/clock/rk1808-cru.h
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -54,7 +54,7 @@
 #define SCLK_GMAC		53
 #define SCLK_GMAC_REF		54
 #define SCLK_GMAC_REFOUT	55
-#define SCLK_GMAC_RGMI_SPEED	56
+#define SCLK_GMAC_RGMII_SPEED	56
 #define SCLK_GMAC_RMII_SPEED	57
 #define SCLK_GMAC_RX_TX		58
 #define SCLK_CRYPTO		59
@@ -351,8 +351,9 @@
 #define SRST_SFC_H		136
 #define SRST_SFC		137
 #define SRST_GMAC_NIU_A		140
-#define SRST_GMAC_NIU_P		141
-#define SRST_GAMC_A		142
+#define SRST_GMAC_NIU_H		141
+#define SRST_GMAC_NIU_P		142
+#define SRST_GAMC_A		143
 
 /* cru_softrst_con9 */
 #define SRST_PMU_NIU_P		144

commit 10660eccefaf133a5efee34520f3e01cf5352414
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 3 10:52:24 2018 +0800

    rockchip: resource: improve error and debug message
    
    Change-Id: I35cb6229048952f35701e33b30fb30fcca93a7ca
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index e871649178..b67af6816f 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -113,7 +113,8 @@ static int resource_image_check_header(const struct resource_img_hdr *hdr)
 
 	ret = memcmp(RESOURCE_MAGIC, hdr->magic, RESOURCE_MAGIC_SIZE);
 	if (ret) {
-		printf("bad resource image magic\n");
+		printf("bad resource image magic: %s\n",
+		       hdr->magic ? hdr->magic : "none");
 		ret = -EINVAL;
 	}
 	debug("resource image header:\n");
@@ -192,7 +193,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!hdr) {
-		printf("%s out of memory!\n", __func__);
+		printf("%s: out of memory!\n", __func__);
 		return -ENOMEM;
 	}
 
@@ -213,7 +214,8 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 #endif
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
-		printf("fail to get %s part\n", boot_partname);
+		printf("%s: failed to get %s part, ret=%d\n",
+		       __func__, boot_partname, ret);
 		/* RKIMG can support part table without 'boot' */
 		goto next;
 	}
@@ -225,12 +227,13 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
 	if (ret != 1) {
-		printf("%s read fail\n", __func__);
+		printf("%s: failed to read %s hdr, ret=%d\n",
+		       __func__, part_info.name, ret);
 		goto out;
 	}
 	ret = android_image_check_header(andr_hdr);
 	if (!ret) {
-		debug("%s Load resource from %s senond pos\n",
+		debug("%s: Load resource from %s second pos\n",
 		      __func__, part_info.name);
 		/* Read resource from second offset */
 		offset = part_info.start * RK_BLK_SIZE;
@@ -248,20 +251,24 @@ next:
 	 * try to read RK format images(resource part).
 	 */
 	if (!resource_found) {
+		debug("%s: Load resource from resource part\n", __func__);
 		/* Read resource from Rockchip Resource partition */
 		ret = part_get_info_by_name(dev_desc, PART_RESOURCE, &part_info);
 		if (ret < 0) {
-			printf("fail to get %s part\n", PART_RESOURCE);
+			printf("%s: failed to get resource part, ret=%d\n",
+			       __func__, ret);
 			goto out;
 		}
 		offset = part_info.start;
-		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}
 
 	/* Only read header and check magic */
 	ret = blk_dread(dev_desc, offset, 1, hdr);
-	if (ret != 1)
+	if (ret != 1) {
+		printf("%s: failed to read resource hdr, ret=%d\n",
+		       __func__, ret);
 		goto out;
+	}
 
 	ret = resource_image_check_header(hdr);
 	if (ret < 0)
@@ -270,15 +277,18 @@ next:
 	content = memalign(ARCH_DMA_MINALIGN,
 			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
 	if (!content) {
-		printf("alloc memory for content failed\n");
+		printf("%s: failed to alloc memory for content\n", __func__);
 		goto out;
 	}
 
-	/* Real read whole resource image */
+	/* Read all entries from resource image */
 	ret = blk_dread(dev_desc, offset + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
-	if (ret != (hdr->e_blks * hdr->e_nums))
+	if (ret != (hdr->e_blks * hdr->e_nums)) {
+		printf("%s: failed to read resource entries, ret=%d\n",
+		       __func__, ret);
 		goto err;
+	}
 
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * RK_BLK_SIZE;

commit be5c9a601780fbd6d3c31a18ba0a0ebdf9e92ce0
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Sat Sep 1 13:54:55 2018 +0800

    rockchip: configs: evb-aarch-rk3308: enable rockchip vendor partition
    
    Change-Id: Ic3a360320bd61a524cd2d39c7ebdbabce2db96e3
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 5a2b43d056..5255e19da8 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -5,6 +5,7 @@ CONFIG_ROCKCHIP_RK3308=y
 CONFIG_ARM64_BOOT_AARCH32=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
@@ -46,8 +47,8 @@ CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKNANDC_NAND=y
-CONFIG_RKSFC_NOR=y
 CONFIG_RKSFC_NAND=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 491dd3347b3f01fe45d4cb6a646edd7d65025d6e
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Tue Aug 28 17:41:40 2018 +0800

    rockchip: rv1108: tpl: Add RV1108 TPL_TINY_FRAMEWORK support
    
    We can init ddr in tiny tpl because of SRAM size limit.
    
    Change-Id: I2d914b7dc9c01399b418539f1b564f9cbbe1be5b
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3a86a718e4..afa6a772ef 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -292,12 +292,30 @@ config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
 	select BOARD_LATE_INIT
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.
 
+if ROCKCHIP_RV1108
+
+config TPL_LDSCRIPT
+        default "arch/arm/mach-rockchip/u-boot-tpl.lds"
+
+config TPL_TEXT_BASE
+        default 0x10080800
+
+config TPL_MAX_SIZE
+        default 6144
+
+config TPL_STACK
+        default 0x10082000
+
+endif
+
 config SPL_ROCKCHIP_BACK_TO_BROM
 	bool "SPL returns to bootrom"
 	default y if ROCKCHIP_RK3036
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index f8b09f8a88..6a5c098770 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -4,6 +4,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
 # CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -14,6 +15,8 @@ CONFIG_DEBUG_UART=y
 # CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_TPL_TINY_FRAMEWORK=y
+CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
@@ -27,8 +30,10 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_SPL_OF_PLATDATA=y
+CONFIG_TPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -55,6 +60,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKFLASH=y
 CONFIG_RKSFC_NOR=y

commit a3f8c59f08a40d8cd3a986390546c9926df5745a
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Tue Aug 28 17:16:37 2018 +0800

    rockchip: ARM: tpl: add TPL_TINY_FRAMEWORK flow for arm
    
    If sram size is small for TPL build, it can defined
    CONFIG_TPL_TINY_FRAMEWORK to reduce TPL size.
    For ARM if defined CONFIG_TPL_TINY_FRAMEWORK when build TPL, after
    save_boot_params(), it jump to board_init_f() directly, then return to
    maskrom. and stack also use maskrom defined result, never change the SP.
    
    Change-Id: I9a90d031a5d200f86c437175e9ea47e8a34062ac
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 289ebc03f6..8d4d4a577d 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -36,6 +36,8 @@
 	.global	switch_to_hypervisor_ret
 #endif
 
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+
 reset:
 	/* Allow the board to save important registers */
 	b	save_boot_params
@@ -109,6 +111,8 @@ ENTRY(c_runtime_cpu_setup)
 
 ENDPROC(c_runtime_cpu_setup)
 
+#endif/* !CONFIG_IS_ENABLED(TINY_FRAMEWORK) */
+
 /*************************************************************************
  *
  * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index d5bbe31e84..feb659d07b 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -42,9 +42,17 @@ entry_counter:
 
 #if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
 	/* U-Boot proper of armv7 do not need this */
-#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) && defined(CONFIG_ARM64)
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+#if !defined(CONFIG_ARM64)
+	/*
+	 * For armv7, the addr '_start' will check by u-boot-tpl.lds file.
+	 */
+_start:
+#endif
 	/* Allow the board to save important registers */
 	b save_boot_params
+
+.type   save_boot_params_ret, % function
 .globl	save_boot_params_ret
 save_boot_params_ret:
 	b board_init_f
@@ -54,7 +62,7 @@ save_boot_params_ret:
 
 #endif
 
-#if !defined(CONFIG_ARM64)
+#if !defined(CONFIG_ARM64) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
 	 * and write to VBAR register, which needs to aligned to 0x20.
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index ee70aae527..73e4ed386c 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -34,13 +34,13 @@ void putc(char c)
 #endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
 #ifndef CONFIG_TPL_LIBGENERIC_SUPPORT
-#ifdef CONFIG_ARM64
-/* for ARM64,it don't have define timer_init and __udelay except lib/timer.c */
 int __weak timer_init(void)
 {
 	return 0;
 }
 
+#ifdef CONFIG_ARM64
+/* for ARM64,it don't have define timer_init and __udelay except lib/timer.c */
 void __weak __udelay(unsigned long usec)
 {
 	u64 i, j, count;
@@ -56,6 +56,24 @@ void __weak __udelay(unsigned long usec)
 			break;
 	}
 }
+#else
+void __weak __udelay(unsigned long usec)
+{
+	u32 nowl, nowu;
+	u64 cur_count, end_count;
+
+	asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl), "=r" (nowu));
+	cur_count = (u64)nowu << 32 | nowl;
+	/* usec to count,24MHz */
+	end_count = usec * 24 + cur_count;
+	while (1) {
+		asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl),
+			     "=r" (nowu));
+		cur_count = (u64)nowu << 32 | nowl;
+		if (cur_count > end_count)
+			break;
+	}
+}
 #endif /* CONFIG_ARM64 */
 
 void udelay(unsigned long usec)
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 38ff08a57f..f159cbddf3 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -9,7 +9,13 @@
 #include <linux/sizes.h>
 
 #define COUNTER_FREQUENCY               24000000
+
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) && !defined(CONFIG_ARM64)
+#undef CONFIG_SYS_ARCH_TIMER
+#else
 #define CONFIG_SYS_ARCH_TIMER
+#endif
+
 #define CONFIG_SYS_HZ_CLOCK	24000000
 
 #define CONFIG_SYS_NS16550_MEM32

commit a82a427da447f04e8385434b08970df4a51d05d1
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Aug 28 17:13:15 2018 +0800

    driver: ram: rockhip: px30: fix auto power down issue
    
    1.The recommends value of dfi_tlp_resp is 7.
    2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
    3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
    gate memory clock when enter power down.
    
    Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
index 561273f40c..422364f462 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
@@ -45,7 +45,7 @@
 			{0x00000180, 0x00800020},	/* ZQCTL0 */
 			{0x00000184, 0x00000000},	/* ZQCTL1 */
 			{0x00000190, 0x07010001},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x06000604},	/* ODTCFG */
 			{0x00000244, 0x00000201},	/* ODTMAP */
diff --git a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
index dddd2f0269..0d4152769a 100644
--- a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
@@ -48,7 +48,7 @@
 			{0x00000180, 0x01000040},	/* ZQCTL0 */
 			{0x00000184, 0x00000000},	/* ZQCTL1 */
 			{0x00000190, 0x07030003},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x06000604},	/* ODTCFG */
 			{0x00000244, 0x00000201},	/* ODTMAP */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
index b65cb0a98f..ec51ad42be 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
@@ -47,7 +47,7 @@
 			{0x00000180, 0x003c000f},	/* ZQCTL0 */
 			{0x00000184, 0x00900000},	/* ZQCTL1 */
 			{0x00000190, 0x07020001},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x07030718},	/* ODTCFG */
 			{0x00000250, 0x00001f00},	/* SCHED */
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
index f3a1816ee6..606f6ddd94 100644
--- a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
+++ b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
@@ -47,7 +47,7 @@
 			{0x00000180, 0x003c000f},	/* ZQCTL0 */
 			{0x00000184, 0x00900000},	/* ZQCTL1 */
 			{0x00000190, 0x07020000},	/* DFITMG0 */
-			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x00000198, 0x07000101},	/* DFILPCFG0 */
 			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
 			{0x00000240, 0x0900090c},	/* ODTCFG */
 			{0x00000244, 0x00000101},	/* ODTMAP */
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index fc99d024f6..d186258f53 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -697,6 +697,7 @@ static void enable_low_power(struct dram_info *dram,
 			     struct px30_sdram_params *sdram_params)
 {
 	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
 	void __iomem *ddr_grf_base = dram->ddr_grf;
 	u32 grf_lp_con;
 
@@ -722,6 +723,18 @@ static void enable_low_power(struct dram_info *dram,
 	grf_lp_con = grf_lp_con | (0x1 << (9 + 16)) | (0x1 << 9);
 	writel(grf_lp_con, ddr_grf_base + DDR_GRF_LP_CON);
 
+	/* off digit module clock when enter power down */
+	setbits_le32(PHY_REG(phy_base, 7), 1 << 7);
+
+	/*
+	 * If DDR3 or DDR4 active_ranks=1,
+	 * it will gate memory clock when enter power down.
+	 * Force set active_ranks to 3 to workaround it.
+	 */
+	if (sdram_params->dramtype == DDR3 || sdram_params->dramtype == DDR4)
+		clrsetbits_le32(pctl_base + DDR_PCTL2_MSTR, 0x3 << 24,
+				0x3 << 24);
+
 	/* enable sr, pd */
 	if (PD_IDLE == 0)
 		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));

commit 28d6bb028c63c86a61b454f218408a992b1bab3b
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Aug 28 17:10:13 2018 +0800

    driver: ram: rockhip: px30: fix deskew config error
    
    Change-Id: Ia2df921eafc2758431aec2f7079aac5b01d58d53
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 7b28887404..fc99d024f6 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -364,7 +364,7 @@ static void phy_cfg(struct dram_info *dram,
 	copy_to_reg(PHY_REG(phy_base, 0x70),
 		    &sdram_params->skew->cs0_dm0_skew[0], 44 * 4);
 	copy_to_reg(PHY_REG(phy_base, 0xc0),
-		    &sdram_params->skew->cs0_dm1_skew[0], 44 * 4);
+		    &sdram_params->skew->cs1_dm0_skew[0], 44 * 4);
 }
 
 static int update_refresh_reg(struct dram_info *dram)

commit 0c653b7e3f8a27a7e5a5898b873d6f56ed11fe2f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 16:05:13 2018 +0800

    test: rockchip: emmc/rknand: remove unused head file
    
    Change-Id: I7d38b27d0e61df979facb1c17907ef18e882b1ad
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index 7dc538e45d..383998b663 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -7,8 +7,6 @@
 #include <asm/io.h>
 #include <cli.h>
 #include <common.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 #include <linux/compat.h>
 #include <malloc.h>
 #include "test-rockchip.h"
diff --git a/test/rockchip/test-rknand.c b/test/rockchip/test-rknand.c
index c02b003039..59a6e2be6f 100644
--- a/test/rockchip/test-rknand.c
+++ b/test/rockchip/test-rknand.c
@@ -8,8 +8,6 @@
 #include <cli.h>
 #include <common.h>
 #include <linux/compat.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 #include <malloc.h>
 #include "test-rockchip.h"
 

commit dbe1e39c43687087fc857590d6b2c9feb97fbc80
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 16:04:50 2018 +0800

    test: rockchip: timer: compile depends on CONFIG_IRQ
    
    Change-Id: Ibe626355a882af3e879a604820b7c685c8bd533d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 4739485926..319f22f553 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -5,8 +5,8 @@
 #
 
 obj-y += test-rockchip.o
-obj-y += test-timer.o
 obj-y += test-brom-dnl.o
+obj-$(CONFIG_IRQ) += test-timer.o
 obj-$(CONFIG_DM_KEY) += test-key.o
 obj-$(CONFIG_MMC) += test-emmc.o
 obj-$(CONFIG_DM_REGULATOR)+= test-regulator.o
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 29a4fc3dae..8ecf5d524d 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -14,7 +14,9 @@ typedef struct board_module {
 } board_module_t;
 
 static board_module_t g_board_modules[] = {
+#if defined(CONFIG_IRQ)
 	{ .name = "timer",	.test = board_timer_test },
+#endif
 	{ .name = "brom",	.test = board_brom_dnl_test },
 
 #if defined(CONFIG_DM_KEY)

commit 7623c170e8eb86c0787bf8a1ba50ce48fcba067f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 30 14:49:17 2018 +0800

    pmic: rk8xx: print source on and off
    
    It tells the reason why PMIC current powers on an last powers off,
    this helps a lot for debugging when system suddenly power off or
    restart due to unknown power supply cause.
    
    Change-Id: Iec0c38dc1ac5745a9bc473848b5d617059b16faf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 732f3dca5e..d9abd6de6f 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -158,6 +158,7 @@ static int rk8xx_probe(struct udevice *dev)
 	int init_data_num = 0;
 	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
+	uint8_t on_source = 0, off_source = 0;
 
 	/* read Chip variant */
 	if (device_is_compatible(dev, "rockchip,rk817") ||
@@ -185,9 +186,13 @@ static int rk8xx_probe(struct udevice *dev)
 	case RK805_ID:
 	case RK816_ID:
 	case RK818_ID:
+		on_source = RK8XX_ON_SOURCE;
+		off_source = RK8XX_OFF_SOURCE;
 		break;
 	case RK809_ID:
 	case RK817_ID:
+		on_source = RK817_ON_SOURCE;
+		off_source = RK817_OFF_SOURCE;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 		init_data = rk817_init_reg;
 		init_data_num = ARRAY_SIZE(rk817_init_reg);
@@ -212,7 +217,16 @@ static int rk8xx_probe(struct udevice *dev)
 		      pmic_reg_read(dev, init_data[i].reg));
 	}
 
-	printf("PMIC:  RK%x\n", show_variant);
+	printf("PMIC:  RK%x ", show_variant);
+
+	if (on_source && off_source) {
+		on_source = pmic_reg_read(dev, on_source);
+		off_source = pmic_reg_read(dev, off_source);
+		printf("(on=0x%02x, off=0x%02x)",
+		       pmic_reg_read(dev, on_source),
+		       pmic_reg_read(dev, off_source));
+	}
+	printf("\n");
 
 	return 0;
 }
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index f8297db791..81b58a88c1 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -199,6 +199,11 @@ enum {
 #define RK817_PMIC_SYS_CFG3	0xf4
 #define RK817_GPIO_INT_CFG	0xfe
 
+#define RK8XX_ON_SOURCE		0xae
+#define RK8XX_OFF_SOURCE	0xaf
+#define RK817_ON_SOURCE		0xf5
+#define RK817_OFF_SOURCE	0xf6
+
 struct reg_data {
 	u8 reg;
 	u8 val;

commit dc490422b65c7e18b8543dff36a26f5478272d67
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 23 17:43:13 2018 +0800

    rockchip: add rk atags support
    
    The atags information is deliverd among rockchip pre-loaders,
    i.e. ddr, miniloader, atf, tos and U-boot, etc.
    
    Notice: the first pre-loader who creates the atags must call
    atags_destroy() before atags_set_tag(), because atags_set_tag()
    may detect last valid and existence ATAG_CORE tag in memory and
    lead a wrong setup, that is not what we expect.
    
    Change-Id: I6c2bf7633699af14afd472f2069e7d3ed91f5196
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rk_atags.h b/arch/arm/include/asm/arch-rockchip/rk_atags.h
new file mode 100644
index 0000000000..ff58c8f927
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rk_atags.h
@@ -0,0 +1,145 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __RK_ATAGS_H_
+#define __RK_ATAGS_H_
+
+/* Tag magic */
+#define ATAG_CORE		0x54410001
+#define ATAG_NONE		0x00000000
+
+#define ATAG_SERIAL		0x54410050
+#define ATAG_BOOTDEV		0x54410051
+#define ATAG_DDR_MEM		0x54410052
+#define ATAG_TOS_MEM		0x54410053
+
+/* Tag size and offset */
+#define ATAGS_SIZE		(0x2000)	/* 8K */
+#define ATAGS_OFFSET		(0x200000 - ATAGS_SIZE)/* [2M-8K, 2M] */
+
+/* Tag sdram position!! */
+#define ATAGS_PHYS_BASE		(CONFIG_SYS_SDRAM_BASE + ATAGS_OFFSET)
+
+#ifndef ATAGS_PHYS_BASE
+"ERROR: ATAGS_PHYS_BASE is not defined!!"
+#endif
+
+/* tag_bootdev.devtype */
+#define BOOT_TYPE_EMMC		0x0
+#define BOOT_TYPE_NAND		0x1
+#define BOOT_TYPE_SDCARD	0x2
+#define BOOT_TYPE_SPI_NOR	0x3
+#define BOOT_TYPE_SPI_NAND	0x4
+
+/* tag_serial.m_mode */
+#define SERIAL_M_MODE_M0	0x0
+#define SERIAL_M_MODE_M1	0x1
+#define SERIAL_M_MODE_M2	0x2
+
+struct tag_serial {
+	u32 version;
+	u32 enable;
+	u64 addr;
+	u32 baudrate;
+	u32 m_mode;
+	u32 reserved[4];
+} __packed;
+
+struct tag_bootdev {
+	u32 version;
+	u32 devtype;
+	u32 devnum;
+	u32 mode;
+	u32 reserved[8];
+} __packed;
+
+struct tag_ddr_mem {
+	u32 count;
+	u32 version;
+	u64 bank[20];
+	u32 reserved[4];
+} __packed;
+
+struct tag_tos_mem {
+	u32 version;
+	struct {
+		char name[8];
+		u64 phy_addr;
+		u32 size;
+		u32 flags;
+	} tee_mem;
+
+	struct {
+		char name[8];
+		u64 phy_addr;
+		u32 size;
+		u32 flags;
+	} drm_mem;
+
+	u64 reserved[8];
+} __packed;
+
+struct tag_core {
+	u32 flags;
+	u32 pagesize;
+	u32 rootdev;
+} __packed;
+
+struct tag_header {
+	u32 size;	/* bytes = size * 4 */
+	u32 magic;
+} __packed;
+
+/* Must be 4 bytes align */
+struct tag {
+	struct tag_header hdr;
+	union {
+		struct tag_core		core;
+		struct tag_serial	serial;
+		struct tag_bootdev	bootdev;
+		struct tag_ddr_mem	ddr_mem;
+		struct tag_tos_mem	tos_mem;
+	} u;
+} __aligned(4);
+
+/*
+ * Destroy atags
+ *
+ * first pre-loader who creates atags must call it before atags_set_tag(),
+ * because atags_set_tag() may detect last valid and existence ATAG_CORE
+ * tag in memory and lead a wrong setup, that is not what we expect.
+ */
+void atags_destroy(void);
+
+/*
+ * atags_set_tag - set tag data
+ *
+ * @magic: tag magic, i.e. ATAG_SERIAL, ATAG_BOOTDEV, ....
+ * @tagdata: core data of struct, i.e. struct tag_serial/tag_bootdev ...
+ *
+ * return: 0 on success, others failed.
+ */
+int atags_set_tag(u32 magic, void *tagdata);
+
+/*
+ * atags_get_tag - get tag by tag magic
+ *
+ * @magic: tag magic, i.e. ATAG_SERIAL, ATAG_BOOTDEV, ...
+ *
+ * return: NULL on failed, otherwise return the tag that we want.
+ */
+struct tag *atags_get_tag(u32 magic);
+
+/* Print only one tag */
+void atags_print_tag(struct tag *t);
+
+/* Print all tags */
+void atags_print_all_tags(void);
+
+/* An atags example test */
+void atags_test(void);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ebb94e284a..3a86a718e4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -483,6 +483,15 @@ config ROCKCHIP_CRASH_DUMP
 	  This enable dump registers when system crash, the registers you would like
 	  to dump can be added in show_regs().
 
+config ROCKCHIP_PRELOADER_ATAGS
+	bool "Rockchip pre-loader atags"
+	default y if ARCH_ROCKCHIP
+	help
+	  This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF,
+	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
+	  and finally ends with U-Boot.
+
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 17d860daa7..98351b7ac6 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -56,3 +56,5 @@ obj-spl-$(CONFIG_TPL_BUILD) =
 # Now add SPL/TPL objects back into the main build
 obj-$(CONFIG_SPL_BUILD) += $(obj-spl-y)
 obj-$(CONFIG_TPL_BUILD) += $(obj-tpl-y)
+
+obj-$(CONFIG_ROCKCHIP_PRELOADER_ATAGS) += rk_atags.o
diff --git a/arch/arm/mach-rockchip/rk_atags.c b/arch/arm/mach-rockchip/rk_atags.c
new file mode 100644
index 0000000000..8b992f600e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk_atags.c
@@ -0,0 +1,257 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#include <common.h>
+#include <asm/arch/rk_atags.h>
+
+#define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+#define for_each_tag(t, base)		\
+	for (t = base; t->hdr.size; t = tag_next(t))
+
+static int inline bad_magic(u32 magic)
+{
+	return ((magic != ATAG_CORE) &&
+		(magic != ATAG_NONE) &&
+		(magic != ATAG_SERIAL) &&
+		(magic != ATAG_BOOTDEV) &&
+		(magic != ATAG_DDR_MEM) &&
+		(magic != ATAG_TOS_MEM));
+}
+
+static int inline atags_size_overflow(struct tag *t, u32 tag_size)
+{
+	return (unsigned long)t + (tag_size << 2) - ATAGS_PHYS_BASE > ATAGS_SIZE;
+}
+
+int atags_set_tag(u32 magic, void *tagdata)
+{
+	u32 length, size = 0;
+	struct tag *t = (struct tag *)ATAGS_PHYS_BASE;
+
+	if (!tagdata)
+		return -ENODATA;
+
+	if (bad_magic(magic)) {
+		printf("%s: magic(%x) is not support\n", __func__, magic);
+		return -EINVAL;
+	}
+
+	/* Not allowed to be set by user directly, so do nothing */
+	if ((magic == ATAG_CORE) || (magic == ATAG_NONE))
+		return -EPERM;
+
+	/* If not initialized, setup now! */
+	if (t->hdr.magic != ATAG_CORE) {
+		t->hdr.magic = ATAG_CORE;
+		t->hdr.size = tag_size(tag_core);
+		t->u.core.flags = 0;
+		t->u.core.pagesize = 0;
+		t->u.core.rootdev = 0;
+
+		t = tag_next(t);
+	} else {
+		/* Find the end, and use it as a new tag */
+		for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+			/*
+			 * We had better check magic to avoid traversing an
+			 * unknown tag, in case of atags has been damaged by
+			 * some unknown reason.
+			 */
+			if (bad_magic(t->hdr.magic)) {
+				printf("%s: find unknown magic(%x)\n",
+				       __func__, t->hdr.magic);
+				return -EINVAL;
+			}
+
+			if (t->hdr.magic == ATAG_NONE)
+				break;
+		}
+	}
+
+	/* Initialize new tag */
+	switch (magic) {
+	case ATAG_SERIAL:
+		size = tag_size(tag_serial);
+		break;
+	case ATAG_BOOTDEV:
+		size = tag_size(tag_bootdev);
+		break;
+	case ATAG_TOS_MEM:
+		size = tag_size(tag_tos_mem);
+		break;
+	case ATAG_DDR_MEM:
+		size = tag_size(tag_ddr_mem);
+		break;
+	};
+
+	if (atags_size_overflow(t, size)) {
+		printf("%s: failed! no memory to setup magic(%x), max_mem=0x%x\n",
+		       __func__, magic, ATAGS_SIZE);
+		return -ENOMEM;
+	}
+
+	/* It's okay to setup a new tag */
+	t->hdr.magic = magic;
+	t->hdr.size = size;
+	length = (t->hdr.size << 2) - sizeof(struct tag_header);
+	memcpy(&t->u, (char *)tagdata, length);
+
+	/* Next tag */
+	t = tag_next(t);
+
+	/* Setup done */
+	t->hdr.magic = ATAG_NONE;
+	t->hdr.size = 0;
+
+	return 0;
+}
+
+struct tag *atags_get_tag(u32 magic)
+{
+	struct tag *t;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (bad_magic(t->hdr.magic)) {
+			printf("%s: find unknown magic(%x)\n",
+			       __func__, t->hdr.magic);
+			return NULL;
+		}
+
+		if (t->hdr.magic == magic)
+			return t;
+	}
+
+	return NULL;
+}
+
+void atags_destroy(void)
+{
+	memset((char *)ATAGS_PHYS_BASE, 0, sizeof(struct tag));
+}
+
+#ifdef DEBUG_ATAGS
+void atags_print_tag(struct tag *t)
+{
+	u32 i;
+
+	if (!t)
+		return;
+
+	switch (t->hdr.magic) {
+	case ATAG_SERIAL:
+		printf("[serial]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.serial.version);
+		printf("    enable = 0x%x\n", t->u.serial.enable);
+		printf("      addr = 0x%llx\n", t->u.serial.addr);
+		printf("  baudrate = 0x%x\n", t->u.serial.baudrate);
+		printf("    m_mode = 0x%x\n", t->u.serial.m_mode);
+		for (i = 0; i < ARRAY_SIZE(t->u.serial.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.serial.reserved[i]);
+		break;
+	case ATAG_BOOTDEV:
+		printf("[bootdev]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.bootdev.version);
+		printf("   devtype = 0x%x\n", t->u.bootdev.devtype);
+		printf("    devnum = 0x%x\n", t->u.bootdev.devnum);
+		printf("      mode = 0x%x\n", t->u.bootdev.mode);
+		for (i = 0; i < ARRAY_SIZE(t->u.bootdev.reserved); i++)
+			printf("    res[%d] = 0x%x\n",
+			       i, t->u.bootdev.reserved[i]);
+		break;
+	case ATAG_TOS_MEM:
+		printf("[tos_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("   version = 0x%x\n", t->u.tos_mem.version);
+		printf("   tee_mem:\n");
+		printf("            name = %s\n", t->u.tos_mem.tee_mem.name);
+		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.tee_mem.phy_addr);
+		printf("            size = 0x%x\n", t->u.tos_mem.tee_mem.size);
+		printf("           flags = 0x%x\n", t->u.tos_mem.tee_mem.flags);
+		printf("   drm_mem:\n");
+		printf("            name = %s\n", t->u.tos_mem.drm_mem.name);
+		printf("        phy_addr = 0x%llx\n", t->u.tos_mem.drm_mem.phy_addr);
+		printf("            size = 0x%x\n", t->u.tos_mem.drm_mem.size);
+		printf("           flags = 0x%x\n", t->u.tos_mem.drm_mem.flags);
+		for (i = 0; i < ARRAY_SIZE(t->u.tos_mem.reserved); i++)
+			printf("   res[%d] = 0x%llx\n", i, t->u.tos_mem.reserved[i]);
+		break;
+	case ATAG_DDR_MEM:
+		printf("[ddr_mem]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("     count = 0x%x\n", t->u.ddr_mem.count);
+		printf("   version = 0x%x\n", t->u.ddr_mem.version);
+		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.bank); i++)
+			printf("  bank[%d] = 0x%llx\n", i, t->u.ddr_mem.bank[i]);
+		for (i = 0; i < ARRAY_SIZE(t->u.ddr_mem.reserved); i++)
+			printf("    res[%d] = 0x%x\n", i, t->u.ddr_mem.reserved[i]);
+		break;
+	case ATAG_CORE:
+		printf("[core]:\n");
+		printf("     magic = 0x%x\n", t->hdr.magic);
+		printf("      size = 0x%x\n\n", t->hdr.size << 2);
+		printf("     flags = 0x%x\n", t->u.core.flags);
+		printf("  pagesize = 0x%x\n", t->u.core.pagesize);
+		printf("   rootdev = 0x%x\n", t->u.core.rootdev);
+		break;
+	default:
+		printf("%s: magic(%x) is not support\n", __func__, t->hdr.magic);
+	}
+
+	printf("\n");
+}
+
+void atags_print_all_tags(void)
+{
+	struct tag *t;
+
+	for_each_tag(t, (struct tag *)ATAGS_PHYS_BASE) {
+		if (bad_magic(t->hdr.magic)) {
+			printf("%s: find unknown magic(%x)\n",
+			       __func__, t->hdr.magic);
+			return;
+		}
+
+		atags_print_tag(t);
+	}
+}
+
+void atags_test(void)
+{
+	struct tag_serial t_serial;
+	struct tag_bootdev t_bootdev;
+	struct tag_ddr_mem t_ddr_mem;
+	struct tag_tos_mem t_tos_mem;
+
+	memset(&t_serial,  0x1, sizeof(t_serial));
+	memset(&t_bootdev, 0x2, sizeof(t_bootdev));
+	memset(&t_ddr_mem, 0x3, sizeof(t_ddr_mem));
+	memset(&t_tos_mem, 0x4, sizeof(t_tos_mem));
+
+	memcpy(&t_tos_mem.tee_mem.name, "tee_mem", 8);
+	memcpy(&t_tos_mem.drm_mem.name, "drm_mem", 8);
+
+	/* First pre-loader must call it before atags_set_tag() */
+	atags_destroy();
+
+	atags_set_tag(ATAG_SERIAL,  &t_serial);
+	atags_set_tag(ATAG_BOOTDEV, &t_bootdev);
+	atags_set_tag(ATAG_DDR_MEM, &t_ddr_mem);
+	atags_set_tag(ATAG_TOS_MEM, &t_tos_mem);
+
+	atags_print_all_tags();
+}
+#else
+void inline atags_print_tag(struct tag *t) {}
+void inline atags_print_all_tags(void) {}
+void inline atags_test(void) {}
+#endif

commit 45a3782ab41527e08a172e525c6eaf58076cdf9a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Aug 6 10:27:46 2018 +0800

    rockchip: clk: rk1808: add clk driver for rk1808
    
    Add basic clock for rk1808 which including pll, cpu, bus,
    emmc, i2c, spi, pwm, saradc clock init.
    
    Change-Id: I302c91e64d0c44ea991d734371811ab4be77c9ab
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk1808.h b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
new file mode 100644
index 0000000000..38ff81f8b6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk1808.h
@@ -0,0 +1,270 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_CRU_rk1808_H
+#define _ASM_ARCH_CRU_rk1808_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define KHz		1000
+#define OSC_HZ		(24 * MHz)
+#define APLL_HZ		(600 * MHz)
+
+/* PX30 pll id */
+enum rk1808_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	PPLL,
+	PLL_COUNT,
+};
+
+struct rk1808_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk1808_clk_priv {
+	struct rk1808_cru *cru;
+	ulong armclk_hz;
+	ulong cpll_hz;
+	ulong gpll_hz;
+	ulong npll_hz;
+};
+
+struct rk1808_pll {
+	unsigned int con0;
+	unsigned int con1;
+	unsigned int con2;
+	unsigned int con3;
+	unsigned int con4;
+	unsigned int reserved0[3];
+};
+
+struct rk1808_cru {
+	struct rk1808_pll pll[5];
+	unsigned int mode;
+	unsigned int misc;
+	unsigned int misc1;
+	unsigned int reserved2[1];
+	unsigned int glb_cnt_th;
+	unsigned int glb_rst_st;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+	unsigned int glb_rst_con;
+	unsigned int reserved3[7];
+	unsigned int hwffc_con0;
+	unsigned int reserved4;
+	unsigned int hwffc_th;
+	unsigned int hwffc_intst;
+	unsigned int apll_con0_s;
+	unsigned int apll_con1_s;
+	unsigned int clksel_con0_s;
+	unsigned int reserved5;
+	unsigned int clksel_con[73];
+	unsigned int reserved6[3];
+	unsigned int clkgate_con[20];
+	unsigned int ssgtbl[32];
+	unsigned int softrst_con[16];
+	unsigned int reserved7[(0x380 - 0x33c) / 4 - 1];
+	unsigned int sdmmc_con[2];
+	unsigned int sdio_con[2];
+	unsigned int emmc_con[2];
+	unsigned int reserved8[(0x400 - 0x394) / 4 - 1];
+	unsigned int autocs_con[10];
+	unsigned int reserved9[(0x4000 - 0x424) / 4 - 1];
+	struct rk1808_pll pmu_pll;
+	unsigned int pmu_mode;
+	unsigned int reserved10[(0x4040 - 0x4020) / 4 - 1];
+	unsigned int pmu_clksel_con[8];
+	unsigned int reserved11[(0x4080 - 0x405c) / 4 - 1];
+	unsigned int pmu_clkgate_con[2];
+	unsigned int reserved12[(0x40c0 - 0x4084) / 4 - 1];
+	unsigned int pmu_autocs_con[2];
+};
+
+check_member(rk1808_cru, pmu_autocs_con[0], 0x40c0);
+
+#define RK1808_PLL_CON(x)		((x) * 0x4)
+#define RK1808_MODE_CON			0xa0
+#define RK1808_PMU_PLL_CON(x)		((x) * 0x4 + 0x4000)
+#define RK1808_PMU_MODE_CON		0x4020
+
+enum {
+	/* CRU_CLK_SEL0_CON */
+	CORE_ACLK_DIV_SHIFT		= 12,
+	CORE_ACLK_DIV_MASK		= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT		= 8,
+	CORE_DBG_DIV_MASK		= 0x03 << CORE_DBG_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT		= 7,
+	CORE_CLK_PLL_SEL_MASK		= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL		= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_DIV_CON_SHIFT		= 0,
+	CORE_DIV_CON_MASK		= 0x0f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL4_CON */
+	ACLK_VOP_PLL_SEL_GPLL		= 0,
+	ACLK_VOP_PLL_SEL_CPLL		= 1,
+	ACLK_VOP_PLL_SEL_SHIFT		= 7,
+	ACLK_VOP_PLL_SEL_MASK		= 1 << ACLK_VOP_PLL_SEL_SHIFT,
+	ACLK_VOP_DIV_CON_SHIFT		= 0,
+	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
+	HCLK_VOP_DIV_CON_SHIFT		= 8,
+	HCLK_VOP_DIV_CON_MASK		= 0x1f << HCLK_VOP_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL5_CON */
+	DCLK_VOPRAW_SEL_VOPRAW		= 1,
+	DCLK_VOPRAW_SEL_VOPRAW_FRAC	= 2,
+	DCLK_VOPRAW_SEL_XIN24M		= 3,
+	DCLK_VOPRAW_SEL_SHIFT		= 14,
+	DCLK_VOPRAW_SEL_MASK		= 3 << DCLK_VOPRAW_SEL_SHIFT,
+	DCLK_VOPRAW_PLL_SEL_CPLL	= 0,
+	DCLK_VOPRAW_PLL_SEL_GPLL	= 1,
+	DCLK_VOPRAW_PLL_SEL_NPLL	= 2,
+	DCLK_VOPRAW_PLL_SEL_SHIFT	= 10,
+	DCLK_VOPRAW_PLL_SEL_MASK	= 3 << DCLK_VOPRAW_PLL_SEL_SHIFT,
+	DCLK_VOPRAW_DIV_CON_SHIFT	= 0,
+	DCLK_VOPRAW_DIV_CON_MASK	= 0xf << DCLK_VOPRAW_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL7_CON */
+	DCLK_VOPLITE_SEL_VOPRAW		= 1,
+	DCLK_VOPLITE_SEL_VOPRAW_FRAC	= 2,
+	DCLK_VOPLITE_SEL_XIN24M		= 3,
+	DCLK_VOPLITE_SEL_SHIFT		= 14,
+	DCLK_VOPLITE_SEL_MASK		= 3 << DCLK_VOPLITE_SEL_SHIFT,
+	DCLK_VOPLITE_PLL_SEL_CPLL	= 0,
+	DCLK_VOPLITE_PLL_SEL_GPLL	= 1,
+	DCLK_VOPLITE_PLL_SEL_NPLL	= 2,
+	DCLK_VOPLITE_PLL_SEL_SHIFT	= 10,
+	DCLK_VOPLITE_PLL_SEL_MASK	= 3 << DCLK_VOPLITE_PLL_SEL_SHIFT,
+	DCLK_VOPLITE_DIV_CON_SHIFT	= 0,
+	DCLK_VOPLITE_DIV_CON_MASK	= 0xf << DCLK_VOPLITE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL19_CON */
+	CLK_PERI_PLL_SEL_GPLL		= 0,
+	CLK_PERI_PLL_SEL_CPLL		= 1,
+	CLK_PERI_PLL_SEL_SHIFT		= 15,
+	CLK_PERI_PLL_SEL_MASK		= 1 << CLK_PERI_PLL_SEL_SHIFT,
+	LSCLK_PERI_DIV_CON_SHIFT	= 8,
+	LSCLK_PERI_DIV_CON_MASK		= 0x1f << LSCLK_PERI_DIV_CON_SHIFT,
+	MSCLK_PERI_DIV_CON_SHIFT	= 0,
+	MSCLK_PERI_DIV_CON_MASK		= 0x1f << MSCLK_PERI_DIV_CON_SHIFT,
+
+	/* CRU_CLKSEL24_CON */
+	EMMC_PLL_SHIFT			= 14,
+	EMMC_PLL_MASK			= 3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_GPLL			= 0,
+	EMMC_SEL_CPLL,
+	EMMC_SEL_NPLL,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT			= 0,
+	EMMC_DIV_MASK			= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLKSEL25_CON */
+	EMMC_CLK_SEL_SHIFT		= 15,
+	EMMC_CLK_SEL_MASK		= 1 << EMMC_CLK_SEL_SHIFT,
+	EMMC_CLK_SEL_EMMC		= 0,
+	EMMC_CLK_SEL_EMMC_DIV50,
+	EMMC_DIV50_SHIFT		= 0,
+	EMMC_DIV50_MASK			= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL27_CON */
+	CLK_BUS_PLL_SEL_GPLL		= 0,
+	CLK_BUS_PLL_SEL_CPLL		= 1,
+	CLK_BUS_PLL_SEL_SHIFT		= 15,
+	CLK_BUS_PLL_SEL_MASK		= 1 << CLK_BUS_PLL_SEL_SHIFT,
+	HSCLK_BUS_DIV_CON_SHIFT		= 8,
+	HSCLK_BUS_DIV_CON_MASK		= 0x1f << HSCLK_BUS_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL28_CON */
+	MSCLK_BUS_DIV_CON_SHIFT		= 8,
+	MSCLK_BUS_DIV_CON_MASK		= 0x1f << MSCLK_BUS_DIV_CON_SHIFT,
+	LSCLK_BUS_DIV_CON_SHIFT		= 0,
+	LSCLK_BUS_DIV_CON_MASK		= 0x1f << LSCLK_BUS_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL59_CON */
+	CLK_I2C_PLL_SEL_GPLL		= 0,
+	CLK_I2C_PLL_SEL_24M,
+	CLK_I2C2_PLL_SEL_SHIFT		= 15,
+	CLK_I2C2_DIV_CON_SHIFT		= 8,
+	CLK_I2C2_DIV_CON_MASK		= 0x7f << CLK_I2C2_DIV_CON_SHIFT,
+	CLK_I2C2_PLL_SEL_MASK		= 1 << CLK_I2C2_PLL_SEL_SHIFT,
+	CLK_I2C1_PLL_SEL_SHIFT		= 7,
+	CLK_I2C1_DIV_CON_SHIFT		= 0,
+	CLK_I2C1_DIV_CON_MASK		= 0x7f,
+	CLK_I2C1_PLL_SEL_MASK		= 1 << CLK_I2C1_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL60_CON */
+	CLK_SPI_PLL_SEL_GPLL		= 0,
+	CLK_SPI_PLL_SEL_24M,
+	CLK_SPI0_PLL_SEL_SHIFT		= 15,
+	CLK_SPI0_DIV_CON_SHIFT		= 8,
+	CLK_SPI0_DIV_CON_MASK		= 0x7f << CLK_SPI0_DIV_CON_SHIFT,
+	CLK_SPI0_PLL_SEL_MASK		= 1 << CLK_SPI0_PLL_SEL_SHIFT,
+	CLK_I2C3_PLL_SEL_SHIFT		= 7,
+	CLK_I2C3_DIV_CON_SHIFT		= 0,
+	CLK_I2C3_DIV_CON_MASK		= 0x7f,
+	CLK_I2C3_PLL_SEL_MASK		= 1 << CLK_I2C3_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL61_CON */
+	CLK_SPI2_PLL_SEL_SHIFT		= 15,
+	CLK_SPI2_DIV_CON_SHIFT		= 8,
+	CLK_SPI2_DIV_CON_MASK		= 0x7f << CLK_SPI2_DIV_CON_SHIFT,
+	CLK_SPI2_PLL_SEL_MASK		= 1 << CLK_SPI2_PLL_SEL_SHIFT,
+	CLK_SPI1_PLL_SEL_SHIFT		= 7,
+	CLK_SPI1_DIV_CON_SHIFT		= 0,
+	CLK_SPI1_DIV_CON_MASK		= 0x7f,
+	CLK_SPI1_PLL_SEL_MASK		= 1 << CLK_SPI1_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL62_CON */
+	CLK_TSADC_DIV_CON_SHIFT		= 0,
+	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
+
+	/* CRU_CLK_SEL63_CON */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= 0x3ff,
+
+	/* CRU_CLK_SEL69_CON */
+	CLK_PWM_PLL_SEL_GPLL		= 0,
+	CLK_PWM_PLL_SEL_24M,
+	CLK_PWM1_PLL_SEL_SHIFT		= 15,
+	CLK_PWM1_DIV_CON_SHIFT		= 8,
+	CLK_PWM1_DIV_CON_MASK		= 0x7f << CLK_PWM1_DIV_CON_SHIFT,
+	CLK_PWM1_PLL_SEL_MASK		= 1 << CLK_PWM1_PLL_SEL_SHIFT,
+	CLK_PWM0_PLL_SEL_SHIFT		= 7,
+	CLK_PWM0_DIV_CON_SHIFT		= 0,
+	CLK_PWM0_DIV_CON_MASK		= 0x7f,
+	CLK_PWM0_PLL_SEL_MASK		= 1 << CLK_PWM0_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL70_CON */
+	CLK_PWM2_PLL_SEL_SHIFT		= 7,
+	CLK_PWM2_DIV_CON_SHIFT		= 0,
+	CLK_PWM2_DIV_CON_MASK		= 0x7f,
+	CLK_PWM2_PLL_SEL_MASK		= 1 << CLK_PWM2_PLL_SEL_SHIFT,
+
+	/* CRU_CLK_SEL71_CON */
+	CLK_I2C5_PLL_SEL_SHIFT		= 15,
+	CLK_I2C5_DIV_CON_SHIFT		= 8,
+	CLK_I2C5_DIV_CON_MASK		= 0x7f << CLK_I2C5_DIV_CON_SHIFT,
+	CLK_I2C5_PLL_SEL_MASK		= 1 << CLK_I2C5_PLL_SEL_SHIFT,
+	CLK_I2C4_PLL_SEL_SHIFT		= 7,
+	CLK_I2C4_DIV_CON_SHIFT		= 0,
+	CLK_I2C4_DIV_CON_MASK		= 0x7f,
+	CLK_I2C4_PLL_SEL_MASK		= 1 << CLK_I2C4_PLL_SEL_SHIFT,
+
+	/* CRU_PMU_CLK_SEL7_CON */
+	CLK_I2C0_PLL_SEL_PPLL		= 0,
+	CLK_I2C0_PLL_SEL_SHIFT		= 15,
+	CLK_I2C0_DIV_CON_SHIFT		= 8,
+	CLK_I2C0_PLL_SEL_MASK		= 1 << CLK_I2C0_PLL_SEL_SHIFT,
+	CLK_I2C0_DIV_CON_MASK		= 0x3f << CLK_I2C0_DIV_CON_SHIFT,
+};
+#endif
diff --git a/arch/arm/mach-rockchip/rk1808/Makefile b/arch/arm/mach-rockchip/rk1808/Makefile
index c09dc5f497..eef7daf3f3 100644
--- a/arch/arm/mach-rockchip/rk1808/Makefile
+++ b/arch/arm/mach-rockchip/rk1808/Makefile
@@ -4,5 +4,6 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y += syscon_rk1808.o
 obj-y += rk1808.o
+obj-y += syscon_rk1808.o
+obj-y += clk_rk1808.o
diff --git a/arch/arm/mach-rockchip/rk1808/clk_rk1808.c b/arch/arm/mach-rockchip/rk1808/clk_rk1808.c
new file mode 100644
index 0000000000..b284283cf1
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/clk_rk1808.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk1808.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk1808_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk1808_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index f91a365523..80b5058c45 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -6,7 +6,7 @@
 
 obj-y += clk_pll.o
 obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
-#obj-y += clk_rk1808.o
+obj-$(CONFIG_ROCKCHIP_RK1808) += clk_rk1808.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
diff --git a/drivers/clk/rockchip/clk_rk1808.c b/drivers/clk/rockchip/clk_rk1808.c
new file mode 100644
index 0000000000..77013ee8c6
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk1808.c
@@ -0,0 +1,1153 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <clk.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk1808.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk1808-cru.h>
+#include <div64.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RK1808_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+static struct rockchip_pll_rate_table rk1808_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
+	RK3036_PLL_RATE(200000000, 1, 200, 6, 4, 1, 0),
+	{ /* sentinel */ },
+};
+
+#ifndef CONFIG_SPL_BUILD
+#define RK1808_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk1808_clk_info clks_dump[] = {
+	RK1808_CLK_DUMP(PLL_APLL, "apll", true),
+	RK1808_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK1808_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK1808_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK1808_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK1808_CLK_DUMP(PLL_PPLL, "ppll", true),
+	RK1808_CLK_DUMP(HSCLK_BUS_PRE, "hsclk_bus", true),
+	RK1808_CLK_DUMP(MSCLK_BUS_PRE, "msclk_bus", true),
+	RK1808_CLK_DUMP(LSCLK_BUS_PRE, "lsclk_bus", true),
+	RK1808_CLK_DUMP(MSCLK_PERI, "msclk_peri", true),
+	RK1808_CLK_DUMP(LSCLK_PERI, "lsclk_peri", true),
+};
+#endif
+
+static struct rockchip_cpu_rate_table rk1808_cpu_rates[] = {
+	RK1808_CPUCLK_RATE(1200000000, 1, 5),
+	RK1808_CPUCLK_RATE(1008000000, 1, 5),
+	RK1808_CPUCLK_RATE(816000000, 1, 3),
+	RK1808_CPUCLK_RATE(600000000, 1, 3),
+};
+
+static struct rockchip_pll_clock rk1808_pll_clks[] = {
+	[APLL] = PLL(pll_rk3036, PLL_APLL, RK1808_PLL_CON(0),
+		     RK1808_MODE_CON, 0, 10, 0, rk1808_pll_rates),
+	[DPLL] = PLL(pll_rk3036, PLL_DPLL, RK1808_PLL_CON(8),
+		     RK1808_MODE_CON, 2, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3036, PLL_CPLL, RK1808_PLL_CON(16),
+		    RK1808_MODE_CON, 4, 10, 0, rk1808_pll_rates),
+	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK1808_PLL_CON(24),
+		     RK1808_MODE_CON, 6, 10, 0, rk1808_pll_rates),
+	[NPLL] = PLL(pll_rk3036, PLL_NPLL, RK1808_PLL_CON(24),
+		     RK1808_MODE_CON, 8, 10, 0, rk1808_pll_rates),
+	[PPLL] = PLL(pll_rk3036, PLL_PPLL, RK1808_PMU_PLL_CON(0),
+		     RK1808_PMU_MODE_CON, 0, 10, 0, rk1808_pll_rates),
+};
+
+#ifndef CONFIG_SPL_BUILD
+static ulong rk1808_i2c_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_PMU_I2C0:
+		con = readl(&cru->pmu_clksel_con[7]);
+		div = (con & CLK_I2C0_DIV_CON_MASK) >> CLK_I2C0_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C1:
+		con = readl(&cru->clksel_con[59]);
+		div = (con & CLK_I2C1_DIV_CON_MASK)  >> CLK_I2C1_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C2:
+		con = readl(&cru->clksel_con[59]);
+		div = (con & CLK_I2C2_DIV_CON_MASK) >> CLK_I2C2_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C3:
+		con = readl(&cru->clksel_con[60]);
+		div = (con & CLK_I2C3_DIV_CON_MASK) >> CLK_I2C3_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C4:
+		con = readl(&cru->clksel_con[71]);
+		div = (con & CLK_I2C4_DIV_CON_MASK) >> CLK_I2C4_DIV_CON_SHIFT;
+		break;
+	case SCLK_I2C5:
+		con = readl(&cru->clksel_con[71]);
+		div = (con & CLK_I2C5_DIV_CON_MASK) >> CLK_I2C5_DIV_CON_SHIFT;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rk1808_i2c_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_PMU_I2C0:
+		rk_clrsetreg(&cru->pmu_clksel_con[7],
+			     CLK_I2C0_DIV_CON_MASK | CLK_I2C0_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C0_DIV_CON_SHIFT |
+			     CLK_I2C0_PLL_SEL_PPLL << CLK_I2C0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_I2C1_DIV_CON_MASK | CLK_I2C1_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C1_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C2:
+		rk_clrsetreg(&cru->clksel_con[59],
+			     CLK_I2C2_DIV_CON_MASK | CLK_I2C2_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C2_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C2_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[60],
+			     CLK_I2C3_DIV_CON_MASK | CLK_I2C3_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C3_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C4:
+		rk_clrsetreg(&cru->clksel_con[71],
+			     CLK_I2C4_DIV_CON_MASK | CLK_I2C4_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C4_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C4_PLL_SEL_SHIFT);
+		break;
+	case SCLK_I2C5:
+		rk_clrsetreg(&cru->clksel_con[71],
+			     CLK_I2C5_DIV_CON_MASK | CLK_I2C5_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_I2C5_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C5_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return rk1808_i2c_get_clk(priv, clk_id);
+}
+#endif
+
+static ulong rk1808_mmc_get_clk(struct rk1808_clk_priv *priv, uint clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 20;
+		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		con_id = 22;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con_id = 24;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+
+	if ((con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT
+	    == EMMC_SEL_24M)
+		return DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		return DIV_TO_RATE(priv->gpll_hz, div) / 2;
+}
+
+static ulong rk1808_mmc_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, ulong set_rate)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+	u32 con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 20;
+		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		con_id = 22;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 24;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* Select clk_sdmmc/emmc source from GPLL by default */
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
+
+	if (src_clk_div > 127) {
+		/* use 24MHz source for 400KHz clock */
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_24M << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_GPLL << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	}
+	rk_clrsetreg(&cru->clksel_con[con_id + 1], EMMC_CLK_SEL_MASK,
+		     EMMC_CLK_SEL_EMMC);
+
+	return rk1808_mmc_get_clk(priv, clk_id);
+}
+
+#ifndef CONFIG_SPL_BUILD
+static ulong rk1808_pwm_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		con = readl(&cru->clksel_con[69]);
+		div = (con & CLK_PWM0_DIV_CON_MASK) >> CLK_PWM0_DIV_CON_SHIFT;
+		break;
+	case SCLK_PWM1:
+		con = readl(&cru->clksel_con[69]);
+		div = (con & CLK_PWM1_DIV_CON_MASK) >> CLK_PWM1_DIV_CON_SHIFT;
+		break;
+	case SCLK_PWM2:
+		con = readl(&cru->clksel_con[70]);
+		div = (con & CLK_PWM2_DIV_CON_MASK) >> CLK_PWM2_DIV_CON_SHIFT;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rk1808_pwm_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		rk_clrsetreg(&cru->clksel_con[69],
+			     CLK_PWM0_DIV_CON_MASK | CLK_PWM0_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_PWM0_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_PWM1:
+		rk_clrsetreg(&cru->clksel_con[69],
+			     CLK_PWM1_DIV_CON_MASK | CLK_PWM1_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_PWM1_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM1_PLL_SEL_SHIFT);
+		break;
+	case SCLK_PWM2:
+		rk_clrsetreg(&cru->clksel_con[70],
+			     CLK_PWM2_DIV_CON_MASK | CLK_PWM2_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_PWM2_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM2_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return rk1808_pwm_get_clk(priv, clk_id);
+}
+
+static ulong rk1808_saradc_get_clk(struct rk1808_clk_priv *priv)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[63]);
+	div = con & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk1808_saradc_set_clk(struct rk1808_clk_priv *priv, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
+	assert(src_clk_div - 1 < 2047);
+
+	rk_clrsetreg(&cru->clksel_con[63],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk1808_saradc_get_clk(priv);
+}
+
+static ulong rk1808_spi_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		con = readl(&cru->clksel_con[60]);
+		div = (con & CLK_SPI0_DIV_CON_MASK) >> CLK_SPI0_DIV_CON_SHIFT;
+		break;
+	case SCLK_SPI1:
+		con = readl(&cru->clksel_con[61]);
+		div = (con & CLK_SPI1_DIV_CON_MASK) >> CLK_SPI1_DIV_CON_SHIFT;
+		break;
+	case SCLK_SPI2:
+		con = readl(&cru->clksel_con[61]);
+		div = (con & CLK_SPI2_DIV_CON_MASK) >> CLK_SPI2_DIV_CON_SHIFT;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong rk1808_spi_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		rk_clrsetreg(&cru->clksel_con[60],
+			     CLK_SPI0_DIV_CON_MASK | CLK_SPI0_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_SPI0_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_SPI1:
+		rk_clrsetreg(&cru->clksel_con[61],
+			     CLK_SPI1_DIV_CON_MASK | CLK_SPI1_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_SPI1_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI1_PLL_SEL_SHIFT);
+		break;
+	case SCLK_SPI2:
+		rk_clrsetreg(&cru->clksel_con[61],
+			     CLK_SPI2_DIV_CON_MASK | CLK_SPI2_PLL_SEL_MASK,
+			     (src_clk_div - 1) << CLK_SPI2_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI2_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return rk1808_spi_get_clk(priv, clk_id);
+}
+
+#define RK1808_VOP_PLL_LIMIT_FREQ		600 * 1000000
+static ulong rk1808_vop_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VOPRAW:
+	case ACLK_VOPLITE:
+		con = readl(&cru->clksel_con[4]);
+		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case HCLK_VOPRAW:
+	case HCLK_VOPLITE:
+		parent = rk1808_vop_get_clk(priv, ACLK_VOPRAW);
+		con = readl(&cru->clksel_con[4]);
+		div = (con & HCLK_VOP_DIV_CON_MASK) >> HCLK_VOP_DIV_CON_SHIFT;
+		break;
+	case DCLK_VOPRAW:
+		con = readl(&cru->clksel_con[5]);
+		div = con & DCLK_VOPRAW_DIV_CON_MASK;
+		parent = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+					       priv->cru, NPLL);
+		break;
+	case DCLK_VOPLITE:
+		con = readl(&cru->clksel_con[7]);
+		div = con & DCLK_VOPLITE_DIV_CON_MASK;
+		parent = (con & DCLK_VOPLITE_PLL_SEL_MASK) >>
+			 DCLK_VOPLITE_PLL_SEL_SHIFT;
+		if (parent == DCLK_VOPLITE_PLL_SEL_NPLL)
+			parent = rockchip_pll_get_rate(&rk1808_pll_clks[NPLL],
+						       priv->cru, NPLL);
+		else if (parent == DCLK_VOPLITE_PLL_SEL_CPLL)
+			parent = priv->cpll_hz;
+		else
+			parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk1808_vop_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div, parent;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VOPRAW:
+	case ACLK_VOPLITE:
+		rk_clrsetreg(&cru->clksel_con[4],
+			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+			     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
+		break;
+	case HCLK_VOPRAW:
+	case HCLK_VOPLITE:
+		src_clk_div =
+			DIV_ROUND_UP(rk1808_vop_get_clk(priv, ACLK_VOPRAW), hz);
+		assert(src_clk_div - 1 < 15);
+		rk_clrsetreg(&cru->clksel_con[4],
+			     HCLK_VOP_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_VOP_DIV_CON_SHIFT);
+		break;
+	case DCLK_VOPRAW:
+		/*
+		 * vopb dclk source from npll, and equals to
+		 */
+		src_clk_div = DIV_ROUND_UP(RK1808_VOP_PLL_LIMIT_FREQ, hz);
+		rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+				      priv->cru, NPLL, src_clk_div * hz);
+		rk_clrsetreg(&cru->clksel_con[5],
+			     DCLK_VOPRAW_SEL_MASK |
+			     DCLK_VOPRAW_PLL_SEL_MASK |
+			     DCLK_VOPRAW_DIV_CON_MASK,
+			     DCLK_VOPRAW_SEL_VOPRAW <<
+			     DCLK_VOPRAW_SEL_SHIFT |
+			     DCLK_VOPRAW_PLL_SEL_NPLL <<
+			     DCLK_VOPRAW_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << DCLK_VOPRAW_DIV_CON_SHIFT);
+		break;
+	case DCLK_VOPLITE:
+		/*
+		 * vopl dclk source from cpll, and equals to
+		 */
+		if (!(priv->npll_hz % hz)) {
+			parent = DCLK_VOPLITE_PLL_SEL_NPLL;
+			src_clk_div = do_div(priv->npll_hz, hz);
+		} else if (!(priv->cpll_hz % hz)) {
+			parent = DCLK_VOPLITE_PLL_SEL_CPLL;
+			src_clk_div = do_div(priv->cpll_hz, hz);
+		} else {
+			parent = DCLK_VOPLITE_PLL_SEL_GPLL;
+			src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		}
+		rk_clrsetreg(&cru->clksel_con[7],
+			     DCLK_VOPLITE_SEL_MASK | DCLK_VOPLITE_PLL_SEL_MASK |
+			     DCLK_VOPLITE_DIV_CON_MASK,
+			     DCLK_VOPLITE_SEL_VOPRAW << DCLK_VOPLITE_SEL_SHIFT |
+			     parent << DCLK_VOPLITE_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << DCLK_VOPLITE_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return rk1808_vop_get_clk(priv, clk_id);
+}
+#endif
+
+static ulong rk1808_bus_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case HSCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[27]);
+		div = (con & HSCLK_BUS_DIV_CON_MASK) >> HSCLK_BUS_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case MSCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[28]);
+		div = (con & MSCLK_BUS_DIV_CON_MASK) >> MSCLK_BUS_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case LSCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[28]);
+		div = (con & LSCLK_BUS_DIV_CON_MASK) >> LSCLK_BUS_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk1808_bus_set_clk(struct rk1808_clk_priv *priv,
+				ulong clk_id, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case HSCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[27],
+			     CLK_BUS_PLL_SEL_MASK | HSCLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << HSCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case MSCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[28],
+			     CLK_BUS_PLL_SEL_MASK | MSCLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << MSCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case LSCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[28],
+			     CLK_BUS_PLL_SEL_MASK | LSCLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << LSCLK_BUS_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk1808_bus_get_clk(priv, clk_id);
+}
+
+static ulong rk1808_peri_get_clk(struct rk1808_clk_priv *priv, ulong clk_id)
+{
+	struct rk1808_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case MSCLK_PERI:
+		con = readl(&cru->clksel_con[19]);
+		div = (con & MSCLK_PERI_DIV_CON_MASK) >>
+		      MSCLK_PERI_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case LSCLK_PERI:
+		con = readl(&cru->clksel_con[19]);
+		div = (con & LSCLK_PERI_DIV_CON_MASK) >>
+		      LSCLK_PERI_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk1808_peri_set_clk(struct rk1808_clk_priv *priv,
+				 ulong clk_id, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case MSCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_PERI_PLL_SEL_MASK | MSCLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_GPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << MSCLK_PERI_DIV_CON_SHIFT);
+		break;
+	case LSCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_PERI_PLL_SEL_MASK | LSCLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_GPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << LSCLK_PERI_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk1808_peri_get_clk(priv, clk_id);
+}
+
+static ulong rk1808_armclk_set_clk(struct rk1808_clk_priv *priv, ulong hz)
+{
+	struct rk1808_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rk1808_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	old_rate = rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+	}
+
+	return rockchip_pll_get_rate(&rk1808_pll_clks[APLL], priv->cru, APLL);
+}
+
+static ulong rk1808_clk_get_rate(struct clk *clk)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+	case PLL_PPLL:
+		rate = rockchip_pll_get_rate(&rk1808_pll_clks[clk->id - 1],
+					     priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+					     priv->cru, APLL);
+		break;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case HCLK_SDIO:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDIO:
+		rate = rk1808_mmc_get_clk(priv, clk->id);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_PMU_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+	case SCLK_I2C4:
+	case SCLK_I2C5:
+		rate = rk1808_i2c_get_clk(priv, clk->id);
+		break;
+	case SCLK_PWM0:
+	case SCLK_PWM1:
+	case SCLK_PWM2:
+		rate = rk1808_pwm_get_clk(priv, clk->id);
+		break;
+	case SCLK_SARADC:
+		rate = rk1808_saradc_get_clk(priv);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+	case SCLK_SPI2:
+		rate = rk1808_spi_get_clk(priv, clk->id);
+		break;
+	case ACLK_VOPRAW:
+	case DCLK_VOPRAW:
+	case ACLK_VOPLITE:
+	case DCLK_VOPLITE:
+		rate = rk1808_vop_get_clk(priv, clk->id);
+		break;
+#endif
+	case HSCLK_BUS_PRE:
+	case MSCLK_BUS_PRE:
+	case LSCLK_BUS_PRE:
+		rate = rk1808_bus_get_clk(priv, clk->id);
+		break;
+	case MSCLK_PERI:
+	case LSCLK_PERI:
+		rate = rk1808_peri_get_clk(priv, clk->id);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk1808_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_PPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[CPLL],
+					    priv->cru, CPLL, rate);
+		if (ret == 0)
+			priv->cpll_hz = rate;
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		if (ret == 0)
+			priv->gpll_hz = rate;
+		break;
+	case PLL_NPLL:
+		ret = rockchip_pll_set_rate(&rk1808_pll_clks[NPLL],
+					    priv->cru, NPLL, rate);
+		if (ret == 0)
+			priv->npll_hz = rate;
+		break;
+	case ARMCLK:
+		if (priv->armclk_hz)
+			rk1808_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case HCLK_SDIO:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+	case SCLK_SDIO:
+		ret = rk1808_mmc_set_clk(priv, clk->id, rate);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case SCLK_PMU_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+	case SCLK_I2C4:
+	case SCLK_I2C5:
+		ret = rk1808_i2c_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_PWM0:
+	case SCLK_PWM1:
+	case SCLK_PWM2:
+		ret = rk1808_pwm_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_SARADC:
+		ret = rk1808_saradc_set_clk(priv, rate);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+	case SCLK_SPI2:
+		ret = rk1808_spi_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_VOPRAW:
+	case DCLK_VOPRAW:
+	case ACLK_VOPLITE:
+	case DCLK_VOPLITE:
+		ret = rk1808_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
+	case HSCLK_BUS_PRE:
+	case MSCLK_BUS_PRE:
+	case LSCLK_BUS_PRE:
+		ret = rk1808_bus_set_clk(priv, clk->id, rate);
+		break;
+	case MSCLK_PERI:
+	case LSCLK_PERI:
+		ret = rk1808_peri_set_clk(priv, clk->id, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk1808_mmc_get_phase(struct clk *clk)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk1808_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk1808_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk1808_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk1808_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk1808_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk1808_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk1808_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk1808_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk1808_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops rk1808_clk_ops = {
+	.get_rate = rk1808_clk_get_rate,
+	.set_rate = rk1808_clk_set_rate,
+	.get_phase	= rk1808_clk_get_phase,
+	.set_phase	= rk1808_clk_set_phase,
+};
+
+static int rk1808_clk_probe(struct udevice *dev)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	if (rockchip_pll_get_rate(&rk1808_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ) {
+		ret = rk1808_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
+
+	priv->cpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[CPLL],
+					      priv->cru, CPLL);
+	priv->gpll_hz = rockchip_pll_get_rate(&rk1808_pll_clks[GPLL],
+					      priv->cru, GPLL);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
+	return 0;
+}
+
+static int rk1808_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk1808_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk1808_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk1808_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct rk1808_cru,
+						    glb_srst_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk1808_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 16;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk1808_clk_ids[] = {
+	{ .compatible = "rockchip,rk1808-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk1808_cru) = {
+	.name		= "rockchip_rk1808_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= rk1808_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk1808_clk_priv),
+	.ofdata_to_platdata = rk1808_clk_ofdata_to_platdata,
+	.ops		= &rk1808_clk_ops,
+	.bind		= rk1808_clk_bind,
+	.probe		= rk1808_clk_probe,
+};
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk1808_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk1808_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			} else {
+				if (rate < 0)
+					printf("%s %s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif

commit 3204d7c4a3748fd2c5d08ad4d55ec4d181c36eb6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Aug 6 10:22:13 2018 +0800

    rockchip: clk: rk1808: Add binding header for rk1808
    
    files origin from kernel.
    
    Change-Id: Ie19bf329f00bf1c502db5d91978f89de3771eff2
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk1808-cru.h b/include/dt-bindings/clock/rk1808-cru.h
new file mode 100644
index 0000000000..f42e43b43c
--- /dev/null
+++ b/include/dt-bindings/clock/rk1808-cru.h
@@ -0,0 +1,466 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK1808_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK1808_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_CPLL		3
+#define PLL_GPLL		4
+#define PLL_NPLL		5
+#define PLL_PPLL		6
+#define ARMCLK			7
+
+#define DCLK_VOPRAW		10
+#define DCLK_VOPLITE		11
+#define DCLK_CIF		12
+#define XIN24M_DIV		13
+
+/* sclk (special clocks) */
+#define USB480M			20
+#define SCLK_PVTM_CORE		21
+#define SCLK_NPU		22
+#define SCLK_PVTM_NPU		23
+#define SCLK_DDRCLK		24
+#define SCLK_I2S0_8CH_TX_MUX	25
+#define SCLK_I2S0_8CH_RX_MUX	26
+#define SCLK_RTC32K_PMU		27
+#define SCLK_TXESC		28
+#define SCLK_RGA		29
+#define SCLK_ISP		30
+#define SCLK_CIF_OUT		31
+#define SCLK_PCIE_AUX		32
+#define SCLK_USB3_OTG0_REF	33
+#define SCLK_USB3_OTG0_SUSPEND	34
+#define SCLK_SDIO_DIV		35
+#define SCLK_SDIO_DIV50		36
+#define SCLK_SDIO		37
+#define SCLK_SDIO_DRV		38
+#define SCLK_SDIO_SAMPLE	39
+#define SCLK_EMMC_DIV		40
+#define SCLK_EMMC_DIV50		41
+#define SCLK_EMMC		42
+#define SCLK_EMMC_DRV		43
+#define SCLK_EMMC_SAMPLE	44
+#define SCLK_SDMMC_DIV		45
+#define SCLK_SDMMC_DIV50	46
+#define SCLK_SDMMC		47
+#define SCLK_SDMMC_DRV		48
+#define SCLK_SDMMC_SAMPLE	49
+#define SCLK_SFC		50
+#define SCLK_GMAC_OUT		51
+#define SCLK_GMAC_SRC		52
+#define SCLK_GMAC		53
+#define SCLK_GMAC_REF		54
+#define SCLK_GMAC_REFOUT	55
+#define SCLK_GMAC_RGMI_SPEED	56
+#define SCLK_GMAC_RMII_SPEED	57
+#define SCLK_GMAC_RX_TX		58
+#define SCLK_CRYPTO		59
+#define SCLK_CRYPTO_APK		60
+#define SCLK_UART1		61
+#define SCLK_UART2		62
+#define SCLK_UART3		63
+#define SCLK_UART4		64
+#define SCLK_UART5		65
+#define SCLK_UART6		66
+#define SCLK_UART7		67
+#define SCLK_I2C1		68
+#define SCLK_I2C2		69
+#define SCLK_I2C3		70
+#define SCLK_I2C4		71
+#define SCLK_I2C5		72
+#define SCLK_SPI0		73
+#define SCLK_SPI1		74
+#define SCLK_SPI2		75
+#define SCLK_TSADC		76
+#define SCLK_SARADC		77
+#define SCLK_EFUSE_S		78
+#define SCLK_EFUSE_NS		79
+#define SCLK_GPIO1		80
+#define SCLK_GPIO2		81
+#define SCLK_GPIO3		82
+#define SCLK_GPIO4		83
+#define SCLK_PWM0		84
+#define SCLK_PWM1		85
+#define SCLK_PWM2		86
+#define SCLK_TIMER0		87
+#define SCLK_TIMER1		88
+#define SCLK_TIMER2		89
+#define SCLK_TIMER3		90
+#define SCLK_TIMER4		91
+#define SCLK_TIMER5		92
+#define SCLK_PDM		93
+#define SCLK_I2S0_8CH_TX_SRC	94
+#define SCLK_I2S0_8CH_TX	95
+#define SCLK_I2S0_8CH_TX_OUT	96
+#define SCLK_I2S0_8CH_RX_SRC	97
+#define SCLK_I2S0_8CH_RX	98
+#define SCLK_I2S0_8CH_RX_OUT	99
+#define SCLK_I2S1_2CH_SRC	100
+#define SCLK_I2S1_2CH		101
+#define SCLK_I2S1_2CH_OUT	102
+#define SCLK_WIFI_PMU		103
+#define SCLK_UART0_PMU		104
+#define SCLK_PVTM_PMU		105
+#define SCLK_PMU_I2C0		106
+#define SCLK_PMU_GPIO0		107
+#define SCLK_REF24M_PMU		108
+#define SCLK_USBPHY_REF		109
+#define SCLK_MIPIDSIPHY_REF	110
+#define SCLK_PCIEPHY_REF	111
+
+/* aclk gates */
+#define ACLK_GIC_PRE		145
+#define ACLK_GIC		146
+#define ACLK_VPU		147
+#define ACLK_NPU		148
+#define ACLK_IMEM_PRE		153
+#define ACLK_IMEM0		154
+#define ACLK_IMEM1		155
+#define ACLK_IMEM2		156
+#define ACLK_IMEM3		157
+#define HSCLK_VIO		158
+#define ACLK_VOPRAW		159
+#define ACLK_VOPLITE		160
+#define ACLK_RGA		161
+#define ACLK_ISP		162
+#define ACLK_CIF		163
+#define HSCLK_PCIE		164
+#define ACLK_USB3OTG		165
+#define ACLK_PCIE		166
+#define ACLK_PCIE_MST		167
+#define ACLK_PCIE_SLV		168
+#define MSCLK_PERI		169
+#define ACLK_GMAC		170
+#define HSCLK_BUS_PRE		171
+#define ACLK_CRYPTO		172
+#define ACLK_DCF		173
+
+/* hclk gates */
+#define HCLK_VPU		200
+#define LSCLK_VIO		201
+#define HCLK_VOPRAW		202
+#define HCLK_VOPLITE		203
+#define HCLK_RGA		204
+#define HCLK_ISP		205
+#define HCLK_CIF		205
+#define LSCLK_PCIE		206
+#define HCLK_HOST		207
+#define LSCLK_PERI		208
+#define HCLK_SDIO		209
+#define HCLK_EMMC		210
+#define HCLK_SDMMC		211
+#define HCLK_SFC		212
+#define MSCLK_BUS_PRE		213
+#define HCLK_ROM		214
+#define HCLK_CRYPTO		215
+#define HCLK_VAD		216
+#define HCLK_PDM		217
+#define HCLK_I2S0_8CH		218
+#define HCLK_I2S1_8CH		219
+#define MSCLK_CORE_NIU		220
+#define HSCLK_IMEM		221
+
+/* pclk gates */
+#define PCLK_DDR		250
+#define PCLK_DSI_TX		251
+#define PCLK_CSI_TX		252
+#define PCLK_CSI2HOST		253
+#define PCLK_PCIE		254
+#define PCLK_GMAC		255
+#define LSCLK_BUS_PRE		256
+#define PCLK_DCF		257
+#define PCLK_UART1		258
+#define PCLK_UART2		259
+#define PCLK_UART3		260
+#define PCLK_UART4		261
+#define PCLK_UART5		262
+#define PCLK_UART6		263
+#define PCLK_UART7		264
+#define PCLK_I2C1		265
+#define PCLK_I2C2		266
+#define PCLK_I2C3		267
+#define PCLK_I2C4		268
+#define PCLK_I2C5		269
+#define PCLK_SPI0		270
+#define PCLK_SPI1		271
+#define PCLK_SPI2		272
+#define PCLK_TSADC		273
+#define PCLK_SARADC		274
+#define PCLK_EFUSE		275
+#define PCLK_GPIO1		276
+#define PCLK_GPIO2		277
+#define PCLK_GPIO3		278
+#define PCLK_GPIO4		279
+#define PCLK_PWM0		280
+#define PCLK_PWM1		281
+#define PCLK_PWM2		282
+#define PCLK_TIMER		283
+#define PCLK_WDT		284
+#define PCLK_MIPIDSIPHY		285
+#define PCLK_MIPICSIPHY		286
+#define PCLK_DDRMON		287
+#define PCLK_DDRC		289
+#define PCLK_MSCH		290
+#define PCLK_STDBY		291
+#define PCLK_GPIO0_PMU		292
+#define PCLK_UART0_PMU		293
+#define PCLK_I2C0_PMU		294
+#define PCLK_PMU_PRE		295
+
+#define CLK_NR_CLKS		(PCLK_PMU_PRE + 1)
+
+/* soft-reset indices */
+
+/* cru_softrst_con0 */
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE0		2
+#define SRST_CORE1		3
+#define SRST_CORE0_DBG		4
+#define SRST_CORE1_DBG		5
+#define SRST_TOPDBG		6
+#define SRST_CORE_NOC		7
+#define SRST_STRC_A		8
+#define SRST_L2C		9
+#define SRST_DAP                10
+#define SRST_CORE_MSNIU		11
+#define SRST_GIC2CORE		12
+#define SRST_CORE2GIC		13
+#define SRST_CORE_PRF_A		14
+#define SRST_CORE_GRF_P		15
+
+/* cru_softrst_con1 */
+#define SRST_DDRPHY		16
+#define SRST_DDRPHY_P		18
+#define SRST_UPCTL2		20
+#define SRST_UPCTL2_A		21
+#define SRST_UPCTL2_P		22
+#define SRST_MSCH		23
+#define SRST_MSCH_P		24
+#define SRST_DDRMON_P		25
+#define SRST_DDRSTDBY_P		26
+#define SRST_DDRSTDBY		27
+#define SRST_DDRGRF_P		28
+#define SRST_AXI_SPLIT_A	29
+#define SRST_DDRDFI_CTL		30
+#define SRST_DDRDFI_CTL_P	31
+
+/* cru_softrst_con2 */
+#define SRST_GIC500_NIU_A	32
+#define SRST_GIC500_A		33
+#define SRST_GIC_CORE2GIC	34
+#define SRST_GIC_GIC2CORE	35
+#define SRST_NPU_CORE		36
+#define SRST_NPU_A		37
+#define SRST_NPU_H		38
+#define SRST_NPU_NIU_A		39
+#define SRST_NPU_NIU_H		40
+#define SRST_NPU2MEM_A		41
+#define SRST_NPU_PVTM		42
+#define SRST_CORE_PVTM		43
+#define SRST_GIC_SPINLOCK_A	47
+
+/* cru_softrst_con3 */
+#define SRST_PCIE_NIU_H		48
+#define SRST_PCIE_NIU_L		49
+#define SRST_PCIEGRF_P		50
+#define SRST_PCIECTL_P		51
+#define SRST_PCIECTL_POWERUP	52
+#define SRST_PCIECTL_MST_A	53
+#define SRST_PCIECTL_SLV_A	54
+#define SRST_PCIECTL_DBI_A	55
+#define SRST_PCIECTL_BUTTON	56
+#define SRST_PCIECTL_PE		57
+#define SRST_PCIECTL_CORE	58
+#define SRST_PCIECTL_NSTICKY	59
+#define SRST_PCIECTL_STICKY	60
+#define SRST_PCIECTL_PWR	61
+#define SRST_PCIE_NIU_A		62
+#define SRST_PCIE_NIU_P		63
+
+/* cru_softrst_con4 */
+#define SRST_PCIEPHY_POR	64
+#define SRST_PCIEPHY_P		65
+#define SRST_PCIEPHY_PIPE	66
+#define SRST_USBPHY_POR		67
+#define SRST_USBPHY_OTG_PORT	68
+#define SRST_USBPHY_HOST_PORT	69
+#define SRST_USB3PHY_GRF_P	70
+#define SRST_USB2PHY_GRF_P	71
+#define SRST_USB3_OTG_A		72
+#define SRST_USB2HOST_H		73
+#define SRST_USB2HOST_ARB_H	74
+#define SRSTUSB2HOST_UTMI	75
+
+/* cru_softrst_con5 */
+#define SRST_IMEM0_A		80
+#define SRST_IMEM1_A		81
+#define SRST_IMEM2_A		82
+#define SRST_IMEM3_A		83
+#define SRST_IMEM0_NIU_A	84
+#define SRST_IMEM1_NIU_A	85
+#define SRST_IMEM2_NIU_A	86
+#define SRST_IMEM3_NIU_A	87
+#define SRST_IMEM_NIU_H		88
+#define SRST_VPU_NIU_A		92
+#define SRST_VPU_NIU_H		93
+#define SRST_VPU_A		94
+#define SRST_VPU_H		95
+
+/* cru_softrst_con6 */
+#define SRST_VIO_NIU_H		96
+#define SRST_VIO_NIU_L		97
+#define SRST_VOPRAW_A		98
+#define SRST_VOPRAW_H		99
+#define SRST_VOPRAW_D		100
+#define SRST_VOPLITE_A		101
+#define SRST_VOPLITE_H		102
+#define SRST_VOPLITE_D		103
+#define SRST_MIPIDSI_HOST_P	104
+#define SRST_CSITX_P		105
+#define SRST_CSITX_TXBYTEHS	106
+#define SRST_CSITX_TXESC	107
+#define SRST_CSITX_CAM		108
+#define SRST_CSITX_I		109
+
+/* cru_softrst_con7 */
+#define SRST_RGA_A		112
+#define SRST_RGA_H		113
+#define SRST_RGA		114
+#define SRST_CSI2HOST_P		115
+#define SRST_CIF_A		116
+#define SRST_CIF_H		117
+#define SRST_CIF_I		118
+#define SRST_CIF_PCLKIN		119
+#define SRST_CIF_D		120
+#define SRST_ISP_H		121
+#define SRST_ISP		122
+#define SRST_MIPICSIPHY_P	124
+#define SRST_MIPIDSIPHY_P	125
+
+/* cru_softrst_con8 */
+#define SRST_PERI_NIU_H		128
+#define SRST_PERI_NIU_L		129
+#define SRST_PDMMC_NIU_H	132
+#define SRST_SDMMC_H		133
+#define SRST_SDIO_H		134
+#define SRST_EMMC_H		135
+#define SRST_SFC_H		136
+#define SRST_SFC		137
+#define SRST_GMAC_NIU_A		140
+#define SRST_GMAC_NIU_P		141
+#define SRST_GAMC_A		142
+
+/* cru_softrst_con9 */
+#define SRST_PMU_NIU_P		144
+#define SRST_PMU_SGRF_P		145
+#define SRST_PMU_GRF_P		146
+#define SRST_PMU_PMU		147
+#define SRST_PMU_MEM_P		148
+#define SRST_PMU_GPIO0_P	149
+#define SRST_PMU_UART0_P	150
+#define SRST_PMU_CRU		151
+#define SRST_PMU_PVTM		152
+#define SRST_PMU_UART0		153
+#define SRST_PMU_NIU_H		154
+#define SRST_PMU_DDR_FAIL_SAVE	155
+#define SRST_PMU_I2C0_P		156
+#define SRST_PMU_I2C0		157
+#define SRST_PMU_GPIO0_DB	158
+
+/* cru_softrst_con10 */
+#define SRST_AUDIO_NIU_H	160
+#define SRST_VAD_H		161
+#define SRST_PDM_H		162
+#define SRST_PDM		163
+#define SRST_I2S0_H		164
+#define SRST_I2S0_TX		165
+#define SRST_I2S1_H		166
+#define SRST_I2S1		167
+#define SRST_I2S0_RX		168
+
+/* cru_softrst_con11 */
+#define SRST_BUS_NIU_M		176
+#define SRST_BUS_NIU_L		177
+#define SRST_TOP_NIU_P		178
+#define SRST_ROM_H		179
+#define SRST_CRYPTO_A		180
+#define SRST_CRYPTO_H		181
+#define SRST_CRYPTO_CORE	182
+#define SRST_CRYPTO_APK		183
+#define SRST_DCF_A		184
+#define SRST_DCF_P		185
+#define SRST_UART1_P		186
+#define SRST_UART1		187
+#define SRST_UART2_P		188
+#define SRST_UART2		189
+#define SRST_UART3_P		190
+#define SRST_UART3		191
+
+/* cru_softrst_con12 */
+#define SRST_UART4_P		192
+#define SRST_UART4		193
+#define SRST_UART5_P		194
+#define SRST_UART5		195
+#define SRST_UART6_P		196
+#define SRST_UART6		197
+#define SRST_UART7_P		198
+#define SRST_UART7		199
+#define SRST_I2C1_P		200
+#define SRST_I2C1		201
+#define SRST_I2C2_P		202
+#define SRST_I2C2		203
+#define SRST_I2C3_P		204
+#define SRST_I2C3		205
+#define SRST_PWM0_P		206
+#define SRST_PWM0		207
+
+/* cru_softrst_con13 */
+#define SRST_PWM1_P		208
+#define SRST_PWM1		209
+#define SRST_PWM2_P		210
+#define SRST_PWM2		211
+#define SRST_SPI0_P		212
+#define SRST_SPI0		213
+#define SRST_SPI1_P		214
+#define SRST_SPI1		215
+#define SRST_SPI2_P		216
+#define SRST_SPI2		217
+#define SRST_BUS_SGRF_P		218
+#define SRST_BUS_GRF_P		219
+#define SRST_TIMER_P		220
+#define SRST_TIMER0		221
+#define SRST_TIMER1		222
+#define SRST_TIMER2		223
+
+/* cru_softrst_con14 */
+#define SRST_TIMER3		224
+#define SRST_TIMER4		225
+#define SRST_TIMER5		226
+#define SRST_WDT_NS_P		227
+#define SRST_EFUSE_NS_P		228
+#define SRST_EFUSE_NS		229
+#define SRST_GPIO1_P		230
+#define SRST_GPIO1_DB		231
+#define SRST_GPIO2_P		232
+#define SRST_GPIO2_DB		233
+#define SRST_GPIO3_P		234
+#define SRST_GPIO3_DB		235
+#define SRST_GPIO4_P		236
+#define SRST_GPIO4_DB		237
+#define SRST_BUS_SUB_NIU_M	238
+
+/* cru_softrst_con15 */
+#define SRST_I2C4_P		240
+#define SRST_I2C4		241
+#define SRST_I2C5_P		242
+#define SRST_I2C5		243
+#define SRST_SARADC		252
+#define SRST_SARADC_P		253
+#define SRST_TSADC_P		254
+#define SRST_TSADC		255
+
+#endif

commit b8fa3d2a17dce6006a8a5f46cbc978a19a3fdf82
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 09:19:08 2018 +0800

    rockchip: rk1808: add soc basic support
    
    RK3308 is a Soc from Rockchip, which embedded with dual
    ARM Cortex-A35.
    
    Change-Id: Ieda5705a058ef6a7be1966ccfff62eea66ca45db
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk1808.h b/arch/arm/include/asm/arch-rockchip/grf_rk1808.h
new file mode 100644
index 0000000000..7ef6487cbc
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk1808.h
@@ -0,0 +1,203 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ */
+#ifndef _ASM_ARCH_GRF_rk1808_H
+#define _ASM_ARCH_GRF_rk1808_H
+
+#include <common.h>
+
+struct rk1808_grf {
+	unsigned int gpio1a_iomux_l;			/* 0x0000 */
+	unsigned int gpio1a_iomux_h;			/* 0x0004 */
+	unsigned int gpio1b_iomux_l;			/* 0x0008 */
+	unsigned int gpio1b_iomux_h;			/* 0x000c */
+	unsigned int reserved0[(0x20 - 0x0c) / 4 - 1];
+	unsigned int gpio2a_iomux_l;			/* 0x0020 */
+	unsigned int gpio2a_iomux_h;			/* 0x0024 */
+	unsigned int gpio2b_iomux_l;			/* 0x0028 */
+	unsigned int gpio2b_iomux_h;			/* 0x002c */
+	unsigned int gpio2c_iomux_l;			/* 0x0030 */
+	unsigned int gpio2c_iomux_h;			/* 0x0034 */
+	unsigned int gpio2d_iomux_l;			/* 0x0038 */
+	unsigned int reserved1;
+	unsigned int gpio3a_iomux_l;			/* 0x0040 */
+	unsigned int gpio3a_iomux_h;			/* 0x0044 */
+	unsigned int gpio3b_iomux_l;			/* 0x0048 */
+	unsigned int gpio3b_iomux_h;			/* 0x004c */
+	unsigned int gpio3c_iomux_l;			/* 0x0050 */
+	unsigned int gpio3c_iomux_h;			/* 0x0054 */
+	unsigned int gpio3d_iomux_l;			/* 0x0058 */
+	unsigned int reserved2;
+	unsigned int gpio4a_iomux_l;			/* 0x0060 */
+	unsigned int gpio4a_iomux_h;			/* 0x0064 */
+	unsigned int gpio4b_iomux_l;			/* 0x0068 */
+	unsigned int gpio4b_iomux_h;			/* 0x006c */
+	unsigned int gpio4c_iomux_l;			/* 0x0070 */
+	unsigned int gpio4c_iomux_h;			/* 0x0074 */
+	unsigned int reserved3[(0x0080 - 0x0074) / 4 - 1];
+	unsigned int gpio1a_p;				/* 0x0080 */
+	unsigned int gpio1b_p;				/* 0x0084 */
+	unsigned int gpio1c_p;				/* 0x0088 */
+	unsigned int gpio1d_p;				/* 0x008c */
+	unsigned int gpio2a_p;				/* 0x0090 */
+	unsigned int gpio2b_p;				/* 0x0094 */
+	unsigned int gpio2c_p;				/* 0x0098 */
+	unsigned int gpio2d_p;				/* 0x009c */
+	unsigned int gpio3a_p;				/* 0x00a0 */
+	unsigned int gpio3b_p;				/* 0x00a4 */
+	unsigned int gpio3c_p;				/* 0x00a8 */
+	unsigned int gpio3d_p;				/* 0x00ac */
+	unsigned int gpio4a_p;				/* 0x00b0 */
+	unsigned int gpio4b_p;				/* 0x00b4 */
+	unsigned int gpio4c_p;				/* 0x00b8 */
+	unsigned int gpio4d_p;				/* 0x00bc */
+	unsigned int gpio1a_sr;				/* 0x00c0 */
+	unsigned int gpio1b_sr;				/* 0x00c4 */
+	unsigned int gpio1c_sr;				/* 0x00c8 */
+	unsigned int gpio1d_sr;				/* 0x00cc */
+	unsigned int gpio2a_sr;				/* 0x00d0 */
+	unsigned int gpio2b_sr;				/* 0x00d4 */
+	unsigned int gpio2c_sr;				/* 0x00d8 */
+	unsigned int gpio2d_sr;				/* 0x00dc */
+	unsigned int gpio3a_sr;				/* 0x00e0 */
+	unsigned int gpio3b_sr;				/* 0x00e4 */
+	unsigned int gpio3c_sr;				/* 0x00e8 */
+	unsigned int gpio3d_sr;				/* 0x00ec */
+	unsigned int gpio4a_sr;				/* 0x00f0 */
+	unsigned int gpio4b_sr;				/* 0x00f4 */
+	unsigned int gpio4c_sr;				/* 0x00f8 */
+	unsigned int gpio4d_sr;				/* 0x00fc */
+	unsigned int gpio1a_smt;			/* 0x0100 */
+	unsigned int gpio1b_smt;			/* 0x0104 */
+	unsigned int gpio1c_smt;			/* 0x0108 */
+	unsigned int gpio1d_smt;			/* 0x010c */
+	unsigned int gpio2a_smt;			/* 0x0110 */
+	unsigned int gpio2b_smt;			/* 0x0114 */
+	unsigned int gpio2c_smt;			/* 0x0118 */
+	unsigned int gpio2d_smt;			/* 0x011c */
+	unsigned int gpio3a_smt;			/* 0x0120 */
+	unsigned int gpio3b_smt;			/* 0x0124 */
+	unsigned int gpio3c_smt;			/* 0x0128 */
+	unsigned int gpio3d_smt;			/* 0x012c */
+	unsigned int gpio4a_smt;			/* 0x0130 */
+	unsigned int gpio4b_smt;			/* 0x0134 */
+	unsigned int gpio4c_smt;			/* 0x0138 */
+	unsigned int gpio4d_smt;			/* 0x013c */
+	unsigned int gpio1a_e;				/* 0x0140 */
+	unsigned int gpio1b_e;				/* 0x0144 */
+	unsigned int gpio1c_e;				/* 0x0148 */
+	unsigned int gpio1d_e;				/* 0x014c */
+	unsigned int gpio2a_e;				/* 0x0150 */
+	unsigned int gpio2b_e;				/* 0x0154 */
+	unsigned int gpio2c_e;				/* 0x0158 */
+	unsigned int gpio2d_e;				/* 0x015c */
+	unsigned int gpio3a_e;				/* 0x0160 */
+	unsigned int gpio3b_e;				/* 0x0164 */
+	unsigned int gpio3c_e;				/* 0x0168 */
+	unsigned int gpio3d_e;				/* 0x016c */
+	unsigned int gpio4a_e;				/* 0x0170 */
+	unsigned int gpio4b_e;				/* 0x0174 */
+	unsigned int gpio4c_e;				/* 0x0178 */
+	unsigned int gpio4d_e;				/* 0x017c */
+	unsigned int reserved4[(0x0190 - 0x017c) / 4 - 1];
+	unsigned int iofunc_con0;			/* 0x0190 */
+	unsigned int reserved5[(0x0400 - 0x0190) / 4 - 1];
+	unsigned int soc_con0;				/* 0x0400 */
+	unsigned int soc_con1;				/* 0x0404 */
+	unsigned int soc_con2;				/* 0x0408 */
+	unsigned int soc_con3;				/* 0x040c */
+	unsigned int soc_con4;				/* 0x0410 */
+	unsigned int soc_con5;				/* 0x0414 */
+	unsigned int reserved6[(0x0430 - 0x0414) / 4 - 1];
+	unsigned int pd_vi_con0;			/* 0x0430 */
+	unsigned int pd_vi_con1;			/* 0x0434 */
+	unsigned int pd_vi_status;			/* 0x0438 */
+	unsigned int reserved7;
+	unsigned int pd_vo_con0;			/* 0x0440 */
+	unsigned int pd_vo_con1;			/* 0x0444 */
+	unsigned int reserved8[(0x0480 - 0x0444) / 4 - 1];
+	unsigned int soc_status0;			/* 0x0480 */
+	unsigned int reserved9[(0x0500 - 0x0480) / 4 - 1];
+	unsigned int cpu_con0;				/* 0x0500 */
+	unsigned int cpu_con1;				/* 0x0504 */
+	unsigned int cpu_con2;				/* 0x0508 */
+	unsigned int reserved10[(0x0520 - 0x0508) / 4 - 1];
+	unsigned int cpu_status0;			/* 0x0520 */
+	unsigned int cpu_status1;			/* 0x0524 */
+	unsigned int reserved11[(0x0530 - 0x0524) / 4 - 1];
+	unsigned int soc_noc_con0;			/* 0x0530 */
+	unsigned int soc_noc_con1;			/* 0x0534 */
+	unsigned int soc_noc_con2;			/* 0x0538 */
+	unsigned int reserved12[(0x0600 - 0x0538) / 4 - 1];
+	unsigned int ram_con0;				/* 0x0600 */
+	unsigned int ram_con1;				/* 0x0604 */
+	unsigned int ram_con2;				/* 0x0608 */
+	unsigned int ram_con3;				/* 0x060c */
+	unsigned int ram_con4;				/* 0x0610 */
+	unsigned int reserved13[(0x0780 - 0x0610) / 4 - 1];
+	unsigned int npupvtm_con0;			/* 0x0780 */
+	unsigned int npupvtm_con1;			/* 0x0784 */
+	unsigned int npupvtm_status0;			/* 0x0788 */
+	unsigned int npupvtm_status1;			/* 0x078c */
+	unsigned int reserved14[(0x0800 - 0x078c) / 4 - 1];
+	unsigned int chip_id;				/* 0x0800 */
+	unsigned int reserved15[(0x0900 - 0x0800) / 4 - 1];
+	unsigned int mac_con0;				/* 0x0900 */
+	unsigned int mac_con1;				/* 0x0904 */
+
+};
+
+check_member(rk1808_grf, gpio1a_iomux_l, 0x0000);
+check_member(rk1808_grf, mac_con1, 0x0904);
+
+struct rk1808_pmugrf {
+	unsigned int gpio0al_iomux;
+	unsigned int gpio0bl_iomux;
+	unsigned int gpio0cl_iomux;
+	unsigned int gpio0dl_iomux;
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p;
+	unsigned int gpio0d_p;
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int gpio0d_e;
+	unsigned int gpio0a_sr;
+	unsigned int gpio0b_sr;
+	unsigned int gpio0c_sr;
+	unsigned int gpio0d_sr;
+	unsigned int gpio0a_smt;
+	unsigned int gpio0b_smt;
+	unsigned int gpio0c_smt;
+	unsigned int gpio0d_smt;
+	unsigned int reserved1[(0x100 - 0x4c) / 4 - 1];
+	unsigned int soc_con[5];
+	unsigned int reserved2[(0x120 - 0x110) / 4 - 1];
+	unsigned int soc_status;
+	unsigned int reserved3[(0x140 - 0x120) / 4 - 1];
+	unsigned int io_vsel0;
+	unsigned int io_vsel1;
+	unsigned int io_vsel_status;
+	unsigned int reserved4[(0x180 - 0x148) / 4 - 1];
+	unsigned int pvtm_con[2];
+	unsigned int reserved5[2];
+	unsigned int pvtm_status[2];
+	unsigned int reserved6[(0x200 - 0x194) / 4 - 1];
+	unsigned int os_reg[12];
+	unsigned int reset_function_status;
+	unsigned int reset_function_clr;
+	unsigned int reserved7[(0x380 - 0x234) / 4 - 1];
+	unsigned int sig_detect_con;
+	unsigned int reserved8[(0x390 - 0x380) / 4 - 1];
+	unsigned int sig_detect_status;
+	unsigned int reserved9[(0x3a0 - 0x390) / 4 - 1];
+	unsigned int sig_detect_status_clear;
+	unsigned int reserved10[(0x3b0 - 0x3a0) / 4 - 1];
+	unsigned int sdmmc_det_counter;
+};
+
+check_member(rk1808_pmugrf, sdmmc_det_counter, 0x3b0);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index dcce0cbd70..ebb94e284a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -279,6 +279,15 @@ config ROCKCHIP_RK3399
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK1808
+	bool "Support Rockchip RK1808"
+	select ARM64
+	select ARM_SMCCC
+	select DEBUG_UART_BOARD_INIT
+	help
+	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
+	  Cortex-A35.
+
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
@@ -328,6 +337,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0xff1005c8 if ROCKCHIP_RK3328
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
+	default 0xfe020200 if ROCKCHIP_RK1808
 	default 0x10300580 if ROCKCHIP_RV1108
 	default 0
 	help
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 6d0fd25d51..17d860daa7 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_ROCKCHIP_RK3308) += rk3308/
 obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
 obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
+obj-$(CONFIG_ROCKCHIP_RK1808) += rk1808/
 obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
 
 # Clear out SPL objects, in case this is a TPL build
diff --git a/arch/arm/mach-rockchip/rk1808/Makefile b/arch/arm/mach-rockchip/rk1808/Makefile
new file mode 100644
index 0000000000..c09dc5f497
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += syscon_rk1808.o
+obj-y += rk1808.o
diff --git a/arch/arm/mach-rockchip/rk1808/rk1808.c b/arch/arm/mach-rockchip/rk1808/rk1808.c
new file mode 100644
index 0000000000..16525447ec
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/rk1808.c
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (c) 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk1808.h>
+#include <asm/arch/hardware.h>
+#include <asm/gpio.h>
+#include <debug_uart.h>
+
+#include <asm/armv8/mmu.h>
+static struct mm_region rk1808_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xff000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xf8000000UL,
+		.phys = 0xf8000000UL,
+		.size = 0x08000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = rk1808_mem_map;
+
+#define GRF_BASE	0xfe000000
+
+enum {
+	GPIO4A3_SHIFT           = 12,
+	GPIO4A3_MASK            = GENMASK(15, 12),
+	GPIO4A3_GPIO            = 0,
+	GPIO4A3_SDMMC0_D1,
+	GPIO4A3_UART2_RX_M0,
+
+	GPIO4A2_SHIFT           = 8,
+	GPIO4A2_MASK            = GENMASK(11, 8),
+	GPIO4A2_GPIO            = 0,
+	GPIO4A2_SDMMC0_D0,
+	GPIO4A2_UART2_TX_M0,
+
+	UART2_IO_SEL_SHIFT	= 14,
+	UART2_IO_SEL_MASK	= GENMASK(15, 14),
+	UART2_IO_SEL_M0		= 0,
+	UART2_IO_SEL_M1,
+	UART2_IO_SEL_M2,
+	UART2_IO_SEL_USB,
+};
+
+/*
+ * Default use UART2_TX/RX_M0(TX: GPIO4_A2, RX: GPIO4_A3)
+ */
+void board_debug_uart_init(void)
+{
+	static struct rk1808_grf * const grf = (void *)GRF_BASE;
+
+	/* Enable early UART2 channel m0 on the rk1808 */
+	rk_clrsetreg(&grf->iofunc_con0, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M0 << UART2_IO_SEL_SHIFT);
+
+	/* Switch iomux */
+	rk_clrsetreg(&grf->gpio4a_iomux_l,
+		     GPIO4A3_MASK | GPIO4A2_MASK,
+		     GPIO4A2_UART2_TX_M0 << GPIO4A2_SHIFT |
+		     GPIO4A3_UART2_RX_M0 << GPIO4A3_SHIFT);
+}
diff --git a/arch/arm/mach-rockchip/rk1808/syscon_rk1808.c b/arch/arm/mach-rockchip/rk1808/syscon_rk1808.c
new file mode 100644
index 0000000000..5ad3562db2
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk1808/syscon_rk1808.c
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk1808_syscon_ids[] = {
+	{ .compatible = "rockchip,rk1808-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rk1808-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk1808) = {
+	.name = "rk1808_syscon",
+	.id = UCLASS_SYSCON,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
+	.of_match = rk1808_syscon_ids,
+};
diff --git a/include/configs/rk1808_common.h b/include/configs/rk1808_common.h
new file mode 100644
index 0000000000..70945ccf27
--- /dev/null
+++ b/include/configs/rk1808_common.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef __CONFIG_RK1808_COMMON_H
+#define __CONFIG_RK1808_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xff100000
+#define GICR_BASE			0xff140000
+#define GICC_BASE			0xff300000
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_BANK_SIZE			(2UL << 30)
+#define CONFIG_PREBOOT
+
+#ifndef CONFIG_SPL_BUILD
+/* usb mass storage */
+/* #define CONFIG_USB_FUNCTION_MASS_STORAGE */
+/* #define CONFIG_ROCKUSB_G_DNL_PID        0x330d */
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
+	BOOTENV
+#endif
+
+#endif /* __CONFIG_RK1808_COMMON_H */

commit 41c0dd9b259fccd0a0d9a12c09ce53c3a1285de6
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Aug 27 17:31:29 2018 +0800

    clk: rockchip: rk3399: Improve the aclk_perilp0 frequency
    
    Set aclk_perilp0 to 300M,
    To improve the performance of dual USB transmission.
    
    Change-Id: I3842742e87ed1d483215ec7bccb75b1c0ed503bf
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 97faba7324..15144d71e8 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -86,7 +86,7 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define PERIHP_HCLK_HZ	(75 * MHz)
 #define PERIHP_PCLK_HZ	(37500 * KHz)
 
-#define PERILP0_ACLK_HZ	(100 * MHz)
+#define PERILP0_ACLK_HZ	(300 * MHz)
 #define PERILP0_HCLK_HZ	(100 * MHz)
 #define PERILP0_PCLK_HZ	(50 * MHz)
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index b8b5a3a074..e6ba48fae3 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1189,7 +1189,6 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perilp0 aclk, hclk, pclk */
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP0_ACLK_HZ) - 1;
-	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==

commit 567735c8d99a45a4943b8f2cfc1aaf1e4415c24c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 28 11:22:04 2018 +0800

    rockchip: enable icache/dcache anyway
    
    actually, icache is only enabled when not define CONFIG_SKIP_LOWLEVEL_INIT,
    icache/dcache had better not depend on other configures macros, so enable
    them anyway.
    
    Change-Id: Iba843ffd481a24c3b0235323253a5b423160c867
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 8da7c6dfac..b56edebf13 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -259,13 +259,11 @@ int board_fdt_fixup(void *blob)
 	return ret;
 }
 
-#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
 void enable_caches(void)
 {
-	/* Enable D-cache. I-cache is already enabled in start.S */
+	icache_enable();
 	dcache_enable();
 }
-#endif
 
 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
 #include <fdt_support.h>

commit 3302ecb798b00cd213213e6faff40141a8766832
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 24 15:20:01 2018 +0800

    Revert "board_f: run reserve_board() earlier"
    
    This reverts commit a80c59f488ddce0fbc35cb92196f2f2d0890528e.
    
    armv7 get new gd after relocation depends on gd->bd position, this
    patch breaks the reserved memory layout.
    
    Change-Id: Ic23fe79d8c6edf048774808f3a06be5e17ccf686
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index 741c748cbc..f76f7da756 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -421,11 +421,11 @@ static int reserve_malloc(void)
 static int reserve_board(void)
 {
 	if (!gd->bd) {
-		gd->relocaddr -= sizeof(bd_t);
-		gd->bd = (bd_t *)map_sysmem(gd->relocaddr, sizeof(bd_t));
+		gd->start_addr_sp -= sizeof(bd_t);
+		gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 		memset(gd->bd, '\0', sizeof(bd_t));
 		debug("Reserving %zu Bytes for Board Info at: %08lx\n",
-		      sizeof(bd_t), gd->relocaddr);
+		      sizeof(bd_t), gd->start_addr_sp);
 	}
 	return 0;
 }
@@ -839,11 +839,11 @@ static const init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_ARM
 	reserve_mmu,
 #endif
-	reserve_board,
 	reserve_video,
 	reserve_trace,
 	reserve_uboot,
 	reserve_malloc,
+	reserve_board,
 	setup_machine,
 	reserve_global_data,
 	reserve_fdt,

commit 74b417924bb3e34396fd361ff8672813e98704cb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 22 11:37:21 2018 +0800

    configs: evb-rk3229: support setting bootdelay time
    
    Change-Id: Ic645aa6916022b9f11c07e897a7e37aa00fe80f4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index f83bc88bfc..32502c215f 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -17,6 +17,7 @@ CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
+CONFIG_BOOTDELAY=0
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y

commit 56581d0ea3d03bc5e5fe22416074aa30a5d23a60
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 18:00:27 2018 +0800

    rockchip: rk3399-firefly: boot sd before emmc for spl
    
    Make the SD have higher proirity then emmc when the SPL sacan the
    bootable U-Boot image.
    
    Change-Id: Ib80c3a190a9c7637dae1a9d8d303e296ee15464b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index 85c5208ee1..5e25387c9b 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -17,7 +17,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-		u-boot,spl-boot-order = &sdhci, &sdmmc;
+		u-boot,spl-boot-order = &sdmmc, &sdhci;
 	};
 
 	backlight: backlight {

commit 2391e06651def2ab89a1a91cbc0d9dea9e55b323
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 17:59:38 2018 +0800

    rockchip: rk3399: do not print in stimer init
    
    The Stimer init is at very early stage and the print is not available.
    
    Change-Id: I1e38ab8998abdeff3c95b7aaf88d2848a5a2b5d6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 377b639309..c131713d65 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -65,7 +65,6 @@ void rockchip_stimer_init(void)
 	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
 	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
 	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
-	printf("%s\n", __func__);
 }
 #endif
 

commit 47b085748c7ae7dedc893b73fa7f3a073999f6e3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 22 17:58:30 2018 +0800

    rockchip: clk: rk3399: fix assert error
    
    We can not meet the assert condition after we update the code,
    fix it so that we can enable the DEBUG option.
    
    Change-Id: I4b3e6b30aae4480ed208f30610493a7d297e90ee
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f7b1760054..b8b5a3a074 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -53,7 +53,7 @@ struct pll_div {
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 6, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
 static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1);
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
@@ -1170,7 +1170,6 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERIHP_ACLK_HZ) - 1;
-	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
@@ -1433,7 +1432,6 @@ static void pmuclk_init(struct rk3399_pmucru *pmucru)
 
 	/*  configure pmu pclk */
 	pclk_div = PPLL_HZ / PMU_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PMU_PCLK_HZ == PPLL_HZ && pclk_div <= 0x1f);
 	rk_clrsetreg(&pmucru->pmucru_clksel[0],
 		     PMU_PCLK_DIV_CON_MASK,
 		     pclk_div << PMU_PCLK_DIV_CON_SHIFT);

commit 7c709eb56ba3ea4f5d086a48e6dc62fd3d4379a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:28:52 2018 +0800

    rockchiop: dts: rk3126: clean up evb and bnd-d708
    
    - remove unused file: rk3126-bnd-d708.dts;
    - remove unused nodes in rk3126-evb.dts;
    - add nandc and uart2 to rk3128-u-boot.dtsi;
    
    Change-Id: Ic5fda6daa371b67887b3521aaa0676b0bd3c0b9a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 087b721eea..594614a2c6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -31,7 +31,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
 	rk3066a-mk808.dtb \
 	rk3126-evb.dtb \
-	rk3126-bnd-d708.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
deleted file mode 100644
index c940b8d219..0000000000
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-/dts-v1/;
-
-#include "rk3128.dtsi"
-#include "rk3128-u-boot.dtsi"
-#include <dt-bindings/input/input.h>
-
-/ {
-	model = "Rockchip RK3126 bnd-d708 board";
-	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
-
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	vcc5v0_host: vcc5v0-host-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_host";
-		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	vcc_backlight: vcc-backlight {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_backlight";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		brightness-levels = <
-			255 169 168 168 167 166 166 165
-			164 164 163 162 162 161 160 160
-			159 158 158 157 156 156 155 154
-			154 153 152 152 151 150 150 149
-			148 148 147 146 146 145 144 144
-			143 142 142 141 140 140 139 138
-			138 137 136 136 135 134 134 133
-			132 132 131 130 130 129 128 128
-			127 126 126 125 124 124 123 122
-			122 121 120 120 119 118 118 117
-			116 116 115 114 114 113 112 112
-			111 110 110 109 108 108 107 106
-			106 105 104 104 103 102 102 101
-			100 100  99  98  98  97  96  96
-			 95  94  94  93  92  92  91  90
-			 90  89  88  88  87  86  86  85
-			 84  84  83  82  82  81  80  80
-			 79  78  78  77  76  76  75  74
-			 74  73  72  72  71  70  70  69
-			 68  68  67  66  66  65  64  64
-			 63  62  62  61  60  60  59  58
-			 58  57  56  56  55  54  54  53
-			 52  52  51  50  50  49  48  48
-			 47  46  46  45  44  44  43  42
-			 42  41  40  40  39  38  38  37
-			 36  36  35  34  34  33  32  32
-			 31  30  30  29  28  28  27  26
-			 26  25  24  24  23  22  22  21
-			 20  20  19  18  18  17  16  16
-			 15  14  14  13  12  12  11  10
-			 10   9   8   8   7   6   6   5
-			  4   4   3   2   1   1   1   0>;
-		default-brightness-level = <128>;
-		pwms = <&pwm0 0 25000 0>;
-		enable-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
-		power-supply = <&vcc_backlight>;
-		status = "okay";
-	};
-
-	adc-keys {
-		compatible = "adc-keys";
-		io-channels = <&saradc 2>;
-		io-channel-names = "buttons";
-		poll-interval = <100>;
-		keyup-threshold-microvolt = <3300000>;
-
-		button-up {
-			label = "Volume Up";
-			linux,code = <KEY_VOLUMEUP>;
-			press-threshold-microvolt = <0>;
-		};
-
-		button-down {
-			label = "Volume Down";
-			linux,code = <KEY_VOLUMEDOWN>;
-			press-threshold-microvolt = <1650000>;
-		};
-	};
-
-	charge-animation {
-		compatible = "charge-animation";
-		screen-on-voltage-threshold = <3350>;
-		power-on-voltage-threshold = <3450>;
-		power-on-soc-threshold = <0>;
-		status = "okay";
-	};
-};
-
-&mipi_dphy {
-	status = "okay";
-};
-
-&dsi {
-	status = "okay";
-
-	panel@0 {
-		compatible = "simple-panel-dsi";
-		reg = <0>;
-		backlight = <&backlight>;
-		power-supply = <&ldo6>;
-		power-invert = <1>;
-		enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
-		prepare-delay-ms = <20>;
-		reset-delay-ms = <20>;
-		init-delay-ms = <20>;
-		enable-delay-ms = <120>;
-		disable-delay-ms = <20>;
-		unprepare-delay-ms = <20>;
-
-		width-mm = <153>;
-		height-mm = <85>;
-
-		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
-		dsi,format = <MIPI_DSI_FMT_RGB888>;
-		dsi,lanes = <4>;
-		status = "okay";
-
-		panel-init-sequence = [
-			05 1e 01 01
-			15 00 02 80 47
-			15 00 02 81 40
-			15 00 02 82 04
-			15 00 02 83 77
-			15 00 02 84 0f
-			15 00 02 85 70
-			15 78 02 86 70
-		];
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing0 {
-				clock-frequency = <49500000>;
-				hactive = <1024>;
-				hfront-porch = <120>;
-				hsync-len = <40>;
-				hback-porch = <120>;
-				vactive = <600>;
-				vfront-porch = <14>;
-				vsync-len = <4>;
-				vback-porch = <14>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-	};
-};
-
-&i2c0 {
-	status = "okay";
-	clock-frequency = <400000>;
-
-	rk816: pmic@1a {
-		compatible = "rockchip,rk816";
-		reg = <0x1a>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-		gpio-controller;
-		#gpio-cells = <2>;
-		#clock-cells = <1>;
-		clock-output-names = "xin32k", "rk816-clkout2";
-
-		gpio {
-			status = "okay";
-		};
-
-		pwrkey {
-			status = "okay";
-		};
-
-		rtc {
-			status = "okay";
-		};
-
-		battery {
-			compatible = "rk816-battery";
-			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
-						  3825 3843 3858 3870 3886 3916 3955
-						  3988 4010 4023 4032 4049 4080 4151 >;
-			design_capacity = <2000>;
-			design_qmax = <2200>;
-			bat_res = <120>;
-			max_input_current = <2000>;
-			max_chrg_current = <1000>;
-			max_chrg_voltage = <4200>;
-			sleep_enter_current = <300>;
-			sleep_exit_current = <300>;
-			sleep_filter_current = <100>;
-			power_off_thresd = <3500>;
-			zero_algorithm_vol = <3800>;
-			max_soc_offset = <60>;
-			monitor_sec = <5>;
-			virtual_power = <0>;
-			power_dc2otg = <0>;
-			dc_det_adc = <0>;
-		};
-
-		regulators {
-
-			vdd_arm: DCDC_REG1{
-				regulator-name= "vdd_arm";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_log: DCDC_REG2 {
-				regulator-name= "vdd_logic";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			vcc_io: DCDC_REG4 {
-				regulator-name = "vcc_io";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcc28_cif: LDO_REG1 {
-				regulator-name = "vcc28_cif";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc18_cif: LDO_REG2 {
-				regulator-name = "vcc18_cif";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_11: LDO_REG3 {
-				regulator-name = "vdd_11";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1100000>;
-				};
-			};
-
-			ldo4: LDO_REG4 {
-				regulator-name= "ldo4";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo5: LDO_REG5 {
-				regulator-name= "ldo5";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo6: LDO_REG6 {
-				regulator-name= "ldo6";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-		};
-	};
-};
-
-&nandc {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&pwm0 {
-	status = "okay";
-};
-
-&u2phy {
-	status = "okay";
-};
-
-&u2phy_otg {
-	status = "okay";
-};
-
-&u2phy_host {
-	status = "okay";
-};
-
-&uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&usb_host_ehci {
-	status = "okay";
-};
-
-&usb_host_ohci {
-	status = "okay";
-};
-
-&usb_otg {
-	status = "okay";
-};
-
-&pinctrl {
-	usb_otg {
-		otg_vbus_drv: otg-vbus-drv {
-			rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb_host {
-		host_vbus_drv: host-vbus-drv {
-			rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic_int_l: pmic-int-l {
-			rockchip,pins =
-				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-	};
-};
-
-&route_dsi {
-	status = "okay";
-};
-
-&vop {
-	status = "okay";
-};
-
-&saradc {
-	status = "okay";
-};
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index b2cd3b73ea..26fe2500d6 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -12,7 +12,7 @@
 
 / {
 	model = "Rockchip RK3126 Evaluation board";
-	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+	compatible = "rockchip,rk3126-evb", "rockchip,rk3126";
 
 	chosen {
 		stdout-path = &uart2;
@@ -28,108 +28,6 @@
 		regulator-max-microvolt = <5000000>;
 	};
 
-	vcc5v0_host: vcc5v0-host-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_host";
-		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	vcc_backlight: vcc-backlight {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_backlight";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	backlight: backlight {
-		compatible = "pwm-backlight";
-		brightness-levels = <
-			0   1   2   3   4   5   6   7
-			8   9  10  11  12  13  14  15
-			16  17  18  19  20  21  22  23
-			24  25  26  27  28  29  30  31
-			32  33  34  35  36  37  38  39
-			40  41  42  43  44  45  46  47
-			48  49  50  51  52  53  54  55
-			56  57  58  59  60  61  62  63
-			64  65  66  67  68  69  70  71
-			72  73  74  75  76  77  78  79
-			80  81  82  83  84  85  86  87
-			88  89  90  91  92  93  94  95
-			96  97  98  99 100 101 102 103
-			104 105 106 107 108 109 110 111
-			112 113 114 115 116 117 118 119
-			120 121 122 123 124 125 126 127
-			128 129 130 131 132 133 134 135
-			136 137 138 139 140 141 142 143
-			144 145 146 147 148 149 150 151
-			152 153 154 155 156 157 158 159
-			160 161 162 163 164 165 166 167
-			168 169 170 171 172 173 174 175
-			176 177 178 179 180 181 182 183
-			184 185 186 187 188 189 190 191
-			192 193 194 195 196 197 198 199
-			200 201 202 203 204 205 206 207
-			208 209 210 211 212 213 214 215
-			216 217 218 219 220 221 222 223
-			224 225 226 227 228 229 230 231
-			232 233 234 235 236 237 238 239
-			240 241 242 243 244 245 246 247
-			248 249 250 251 252 253 254 255>;
-		default-brightness-level = <128>;
-		pwms = <&pwm0 0 1000000 1>;
-		enable-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
-		power-supply = <&vcc_backlight>;
-		status = "okay";
-	};
-
-	lvds_panel: lvds-panel {
-		u-boot,dm-pre-reloc;
-		compatible ="simple-panel";
-		backlight = <&backlight>;
-		bus-format = <0x1009>;
-		/* enable-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
-		 * delay,disable = <10>;
-		 * power-supply = <&vcc_lcd>;
-		 */
-		power-supply = <&ldo6>;
-		power-invert = <1>;
-		rockchip,data-mapping = "jeida";
-		rockchip,data-width = <18>;
-		rockchip,output = "rgb";
-
-		display-timings {
-			native-mode = <&timing0>;
-			timing0: timing0 {
-				clock-frequency = <60000000>;
-				hactive = <1024>;
-				vactive = <600>;
-				hback-porch = <100>;
-				hfront-porch = <120>;
-				vback-porch = <10>;
-				vfront-porch = <15>;
-				hsync-len = <100>;
-				vsync-len = <10>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-
-		ports {
-			panel_in_lvds: endpoint {
-				remote-endpoint = <&lvds_out_panel>;
-			};
-		};
-	};
-
 	adc-keys {
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
@@ -149,193 +47,6 @@
 			press-threshold-microvolt = <1650000>;
 		};
 	};
-
-	charge-animation {
-		compatible = "rockchip,uboot-charge";
-		rockchip,uboot-charge-on = <0>;
-		rockchip,android-charge-on = <1>;
-		status = "okay";
-	};
-};
-
-&i2c1 {
-	status = "okay";
-
-        hym8563: hym8563@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		#clock-cells = <0>;
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-	};
-};
-
-&i2c2 {
-	clock-frequency = <100000>;
-	status = "okay";
-
-	rk816: pmic@1a {
-		compatible = "rockchip,rk816";
-		reg = <0x1a>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-		gpio-controller;
-		#gpio-cells = <2>;
-		#clock-cells = <1>;
-		clock-output-names = "xin32k", "rk816-clkout2";
-
-		gpio {
-			status = "okay";
-		};
-
-		pwrkey {
-			status = "okay";
-		};
-
-		rtc {
-			status = "okay";
-		};
-
-		battery {
-			compatible = "rk816-battery";
-			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
-						  3825 3843 3858 3870 3886 3916 3955
-						  3988 4010 4023 4032 4049 4080 4151 >;
-			design_capacity = <2000>;
-			design_qmax = <2200>;
-			bat_res = <120>;
-			max_input_current = <2000>;
-			max_chrg_current = <1000>;
-			max_chrg_voltage = <4200>;
-			sleep_enter_current = <300>;
-			sleep_exit_current = <300>;
-			sleep_filter_current = <100>;
-			power_off_thresd = <3500>;
-			zero_algorithm_vol = <3800>;
-			max_soc_offset = <60>;
-			monitor_sec = <5>;
-			virtual_power = <0>;
-			power_dc2otg = <0>;
-			dc_det_adc = <0>;
-		};
-
-		regulators {
-
-			vdd_arm: DCDC_REG1{
-				regulator-name= "vdd_arm";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <900000>;
-				};
-			};
-
-			vdd_log: DCDC_REG2 {
-				regulator-name= "vdd_logic";
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-ramp-delay = <6001>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-			};
-
-			vcc_io: DCDC_REG4 {
-				regulator-name = "vcc_io";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcc28_cif: LDO_REG1 {
-				regulator-name = "vcc28_cif";
-				regulator-min-microvolt = <2800000>;
-				regulator-max-microvolt = <2800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc18_cif: LDO_REG2 {
-				regulator-name = "vcc18_cif";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_11: LDO_REG3 {
-				regulator-name = "vdd_11";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1100000>;
-				};
-			};
-
-			ldo4: LDO_REG4 {
-				regulator-name= "ldo4";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo5: LDO_REG5 {
-				regulator-name= "ldo5";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			ldo6: LDO_REG6 {
-				regulator-name= "ldo6";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
-				};
-			};
-		};
-	};
 };
 
 &u2phy {
@@ -374,22 +85,6 @@
 	status = "okay";
 };
 
-&lvds {
-	status = "okay";
-	ports {
-		lvds_out: endpoint@0 {
-			reg = <0>;
-			lvds_out_panel: endpoint {
-				remote-endpoint = <&panel_in_lvds>;
-			};
-		};
-	};
-};
-
-&vop {
-	status = "okay";
-};
-
 &pinctrl {
 	usb_otg {
 		otg_vbus_drv: otg-vbus-drv {
@@ -402,13 +97,4 @@
 			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
-
-	pmic_int_l: pmic-int-l {
-			rockchip,pins =
-				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
-	};
-};
-
-&saradc {
-	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 3b225ad16f..3561fe1530 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -9,8 +9,14 @@
 	u-boot,dm-pre-reloc;
 };
 
+&nandc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
+	status = "okay";
 };
 
 &grf {
@@ -20,3 +26,8 @@
 &cru {
 	u-boot,dm-pre-reloc;
 };
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	clock-frequency = <24000000>;
+};

commit 565dccc55a0a4c4f24195fc61bbb53b2ba6c0ae8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:27:46 2018 +0800

    configs: rk3126: remove unused defconfig
    
    we can use rk3126_defconfig by default.
    
    Change-Id: I40d0796e899be49c5819c2b4ef82fef7060d6187
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
deleted file mode 100644
index 49534e1ccf..0000000000
--- a/configs/bnd-d708-rk3126_defconfig
+++ /dev/null
@@ -1,87 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RK3128=y
-CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_RKPARM_PARTITION=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
-CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SYS_MALLOC_F_LEN=0x38000
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_NAND_BOOT=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_BMP=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_CHARGE_DISPLAY=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_MMC_DW=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_CHECKS=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_FUEL_GAUGE=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_DM_CHARGE_DISPLAY=y
-CONFIG_CHARGE_ANIMATION=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
-CONFIG_DEBUG_UART_BASE=0x20068000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_LCD=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
-CONFIG_TEST_ROCKCHIP=y
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
deleted file mode 100644
index 9f55b4c675..0000000000
--- a/configs/evb-rk3126_defconfig
+++ /dev/null
@@ -1,85 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RK3128=y
-CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_RKPARM_PARTITION=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
-CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SYS_MALLOC_F_LEN=0x38000
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_BMP=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_CHARGE_DISPLAY=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_MMC_DW=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_CHECKS=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_DM_FUEL_GAUGE=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_DM_CHARGE_DISPLAY=y
-CONFIG_CHARGE_ANIMATION=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM=y
-CONFIG_DM_RESET=y
-CONFIG_DEBUG_UART_BASE=0x20068000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
-CONFIG_LCD=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
-CONFIG_TEST_ROCKCHIP=y
-CONFIG_ADC_KEY=y
-CONFIG_RK8XX_PWRKEY=y

commit 839446eac3b3512840193ce984b522ddbc442e7f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:32:39 2018 +0800

    rockchip: rk3128: enable RKIMG_BOOTCOMMAND when SPL is disabled
    
    Change-Id: I32042f76161e5912d1b30d1165b36c999c3e6179
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index 56ea754554..1038ffc8b0 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -20,7 +20,9 @@
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"
 
+#ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif

commit b6b0fe1fea8a604a139c64fdda5fa19fb22a9774
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:27:04 2018 +0800

    configs: add rk3126_defconfig
    
    Change-Id: I5bb76336b9f48a6f6b3d671f26f2f555d19d0945
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3126_defconfig b/configs/rk3126_defconfig
new file mode 100644
index 0000000000..2481be321d
--- /dev/null
+++ b/configs/rk3126_defconfig
@@ -0,0 +1,87 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x38000
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_RK3126=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_NAND_BOOT=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_CHARGE_DISPLAY=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit a80c59f488ddce0fbc35cb92196f2f2d0890528e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 15 15:58:17 2018 +0800

    board_f: run reserve_board() earlier
    
    it promises reserve_board() not to overlay trust os memory.
    
    Change-Id: I149de3b7956a63a80ab91c38c12c16b8709b9756
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index f76f7da756..741c748cbc 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -421,11 +421,11 @@ static int reserve_malloc(void)
 static int reserve_board(void)
 {
 	if (!gd->bd) {
-		gd->start_addr_sp -= sizeof(bd_t);
-		gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
+		gd->relocaddr -= sizeof(bd_t);
+		gd->bd = (bd_t *)map_sysmem(gd->relocaddr, sizeof(bd_t));
 		memset(gd->bd, '\0', sizeof(bd_t));
 		debug("Reserving %zu Bytes for Board Info at: %08lx\n",
-		      sizeof(bd_t), gd->start_addr_sp);
+		      sizeof(bd_t), gd->relocaddr);
 	}
 	return 0;
 }
@@ -839,11 +839,11 @@ static const init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_ARM
 	reserve_mmu,
 #endif
+	reserve_board,
 	reserve_video,
 	reserve_trace,
 	reserve_uboot,
 	reserve_malloc,
-	reserve_board,
 	setup_machine,
 	reserve_global_data,
 	reserve_fdt,

commit 54fc9addaa2071bbc927b1831d06ad4701a3c3b7
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Aug 17 11:02:23 2018 +0800

    drm/rockchip: add a safety mothed to restore logo file
    
    we found the name value from the following function will
    be null at rockchip_display_fixup(), so we instore this
    value at display_state local parameter.
        ofnode_read_string_index(node, "logo,kernel", 0, &name))
    
    Change-Id: I18c6b2a699cf8063d4b9e43b7627c388746dcff0
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 66220f2038..53ce8cc070 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1351,8 +1351,12 @@ static int rockchip_display_probe(struct udevice *dev)
 		memset(s, 0, sizeof(*s));
 
 		INIT_LIST_HEAD(&s->head);
-		ret = ofnode_read_string_index(node, "logo,uboot", 0, &s->ulogo_name);
-		ret = ofnode_read_string_index(node, "logo,kernel", 0, &s->klogo_name);
+		ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
+		if (!ret)
+			memcpy(s->ulogo_name, name, strlen(name));
+		ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
+		if (!ret)
+			memcpy(s->klogo_name, name, strlen(name));
 		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
 		if (!strcmp(name, "fullscreen"))
 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index f198b4208d..ce8f45169c 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -154,8 +154,8 @@ struct display_state {
 	struct connector_state conn_state;
 	struct panel_state panel_state;
 
-	const char *ulogo_name;
-	const char *klogo_name;
+	char ulogo_name[30];
+	char klogo_name[30];
 
 	struct logo_info logo;
 	int logo_mode;

commit 747dfc263cb6df28a4ff5cdd171659cc40df7290
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Aug 17 14:25:27 2018 +0800

    video/drm: display: add rockchip_of_find_connector function
    
    The connector node may not be a child of root node, make it more generic.
    
    Change-Id: I1a8a2176710579417f53953e6c1a813bf715f7a1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 9d84120f44..66220f2038 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1229,6 +1229,48 @@ void rockchip_show_logo(void)
 	}
 }
 
+static struct udevice *rockchip_of_find_connector(struct udevice *dev)
+{
+	ofnode conn_node, port, ep;
+	struct udevice *conn_dev;
+	int ret;
+
+	port = dev_read_subnode(dev, "port");
+	if (!ofnode_valid(port))
+		return NULL;
+
+	ofnode_for_each_subnode(ep, port) {
+		ofnode _ep, _port, _ports;
+		uint phandle;
+
+		if (ofnode_read_u32(ep, "remote-endpoint", &phandle))
+			continue;
+
+		_ep = ofnode_get_by_phandle(phandle);
+		if (!ofnode_valid(_ep) || !ofnode_is_available(_ep))
+			continue;
+
+		_port = ofnode_get_parent(_ep);
+		if (!ofnode_valid(_port))
+			continue;
+
+		_ports = ofnode_get_parent(_port);
+		if (!ofnode_valid(_ports))
+			continue;
+
+		conn_node = ofnode_get_parent(_ports);
+		if (!ofnode_valid(conn_node) || !ofnode_is_available(conn_node))
+			continue;
+
+		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn_node,
+						  &conn_dev);
+		if (!ret)
+			return conn_dev;
+	}
+
+	return NULL;
+}
+
 static int rockchip_display_probe(struct udevice *dev)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -1243,7 +1285,6 @@ static int rockchip_display_probe(struct udevice *dev)
 	int ret;
 	ofnode node, route_node;
 	struct device_node *port_node, *vop_node, *ep_node;
-	struct device_node *cnt_node, *p;
 	struct public_phy_data *data;
 
 	/* Before relocation we don't need to do anything */
@@ -1295,28 +1336,12 @@ static int rockchip_display_probe(struct udevice *dev)
 		}
 		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
-		phandle = ofnode_read_u32_default(np_to_ofnode(ep_node),
-						  "remote-endpoint", -1);
-		cnt_node = of_find_node_by_phandle(phandle);
-		if (phandle < 0) {
-			printf("Warn: can't find remote-endpoint's handle\n");
-			continue;
-		}
-		while (cnt_node->parent){
-			p = of_get_parent(cnt_node);
-			if (!strcmp(p->full_name, "/"))
-				break;
-			cnt_node = p;
-		}
-		if (!of_device_is_available(cnt_node))
-			continue;
-		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY,
-						  np_to_ofnode(cnt_node),
-						  &conn_dev);
-		if (ret) {
+		conn_dev = rockchip_of_find_connector(crtc_dev);
+		if (!conn_dev) {
 			printf("Warn: can't find connect driver\n");
 			continue;
 		}
+
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
 
 		s = malloc(sizeof(*s));
@@ -1340,7 +1365,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
 
 		s->blob = blob;
-		s->conn_state.node = np_to_ofnode(cnt_node);
+		s->conn_state.node = conn_dev->node;
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
 		s->conn_state.overscan.left_margin = 100;

commit e7ca7e39ee39e18448065e7f00e708262ecd3bdf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Feb 23 17:38:49 2018 +0100

    UPSTREAM: core: ofnode: add ofnode_get_parent function
    
    The Rockchip video drivers need to walk the ofnode-parrents to find
    an enclosing device that has a UCLASS_DISPLAY driver bound.  This
    adds a ofnode_get_parent()-function that returns the parent-node.
    
    Change-Id: I312236c966348aaa36ffc30e3f7dbc83d706fb36
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
    (cherry picked from commit e2d5997ffdf5cbf4f7d53584dab2ffc673f50987)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 59c8ff3014..44eb2bbb5f 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -165,6 +165,20 @@ ofnode ofnode_next_subnode(ofnode node)
 		fdt_next_subnode(gd->fdt_blob, ofnode_to_offset(node)));
 }
 
+ofnode ofnode_get_parent(ofnode node)
+{
+	ofnode parent;
+
+	assert(ofnode_valid(node));
+	if (ofnode_is_np(node))
+		parent = np_to_ofnode(of_get_parent(ofnode_to_np(node)));
+	else
+		parent.of_offset = fdt_parent_offset(gd->fdt_blob,
+						     ofnode_to_offset(node));
+
+	return parent;
+}
+
 const char *ofnode_get_name(ofnode node)
 {
 	if(!ofnode_valid(node)){
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index b1681e256e..742d6028c5 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -301,6 +301,14 @@ ofnode ofnode_first_subnode(ofnode node);
  */
 ofnode ofnode_next_subnode(ofnode node);
 
+/**
+ * ofnode_get_parent() - get the ofnode's parent (enclosing ofnode)
+ *
+ * @node: valid node to look up
+ * @return ofnode reference of the parent node
+ */
+ofnode ofnode_get_parent(ofnode node);
+
 /**
  * ofnode_get_name() - get the name of a node
  *

commit 280f977d918bdcb425f6cb5946fc318c85f547af
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Aug 22 16:35:20 2018 +0800

    rockchip: rk3128: scan sub-nodes of the syscon node
    
    Change-Id: Id677e5615625abd25c987c899bf4906ee3aed05b
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
index 0b636390ac..6795ee2a21 100644
--- a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
@@ -17,5 +17,8 @@ static const struct udevice_id rk3128_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk3128) = {
 	.name = "rk3128_syscon",
 	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 	.of_match = rk3128_syscon_ids,
 };

commit 123c920622cc462fd3a11abea7b9647b03f48497
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:45:36 2018 +0800

    board_r: skip mmc init when CONFIG_USING_KERNEL_DTB is enabled
    
    When CONFIG_USING_KERNEL_DTB is enabled, mmc has been initialized earlier.
    
    Change-Id: If3d7374cbbd4e403d9627c44133bf5fd1aeb9af8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 1e5847dda3..cd79e97bae 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -424,8 +424,13 @@ static int initr_onenand(void)
 #ifdef CONFIG_MMC
 static int initr_mmc(void)
 {
+/*
+ * When CONFIG_USING_KERNEL_DTB is enabled, mmc has been initialized earlier.
+ */
+#ifndef CONFIG_USING_KERNEL_DTB
 	puts("MMC:   ");
 	mmc_initialize(gd->bd);
+#endif
 	return 0;
 }
 #endif

commit dd3941ee08b0186c68b6f6fbf098380282a36a95
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:39:40 2018 +0800

    sdram: rk3128: use debug() for probe message
    
    Change-Id: Ifa8ff92d6741aaf83fbd48e96fbbb78cc744439d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
index 04ad2bbb8c..68b0830884 100644
--- a/drivers/ram/rockchip/sdram_rk3128.c
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -23,7 +23,7 @@ static int rk3128_dmc_probe(struct udevice *dev)
 	struct dram_info *priv = dev_get_priv(dev);
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	printf("%s: grf=%p\n", __func__, priv->grf);
+	debug("%s: grf=%p\n", __func__, priv->grf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[1]);

commit 062d7a0a07509bfd06288989b9bc66f9ee9f3970
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 17:24:06 2018 +0800

    rockchip: rk3128: invoke board_debug_uart_init()
    
    we use uart2 by default.
    
    Change-Id: Ie7e53a57cc08a035184040657eb7a6010bc1c83f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 3e5f6f6a47..56c36af60c 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -5,6 +5,8 @@
  */
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/grf_rk3128.h>
 
 #define GRF_GPIO1C_IOMUX		0x200080c0
 #define SDMMC_INTMASK			0x10214024
@@ -40,4 +42,26 @@ int arch_cpu_init(void)
 
 void board_debug_uart_init(void)
 {
+	struct rk3128_grf * const grf __maybe_unused =
+		(struct rk3128_grf * const)0x20008000;
+
+	enum {
+		/* UART2 */
+		GPIO1C2_SHIFT		= 4,
+		GPIO1C2_MASK		= GENMASK(5, 4),
+		GPIO1C2_GPIO		= 0,
+		GPIO1C2_MMC0_D0		= 1,
+		GPIO1C2_UART2_TX	= 2,
+
+		GPIO1C3_SHIFT		= 6,
+		GPIO1C3_MASK		= GENMASK(7, 6),
+		GPIO1C3_GPIO		= 0,
+		GPIO1C2_MMC0_D1		= 1,
+		GPIO1C2_UART2_RX	= 2,
+	};
+
+	rk_clrsetreg(&grf->gpio1c_iomux,
+		     GPIO1C2_MASK, GPIO1C2_UART2_TX << GPIO1C2_SHIFT);
+	rk_clrsetreg(&grf->gpio1c_iomux,
+		     GPIO1C3_MASK, GPIO1C2_UART2_RX << GPIO1C3_SHIFT);
 }

commit 2d39b25158d48e71e93993c2a044039702cc3c69
Author: William Wu <william.wu@rock-chips.com>
Date:   Tue Aug 21 17:32:34 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk3368
    
    This patch adds usb 2.0 phy otg-port and host-port
    configurations for rk3368.
    
    Change-Id: I1b5f6945a23449122f123cbf5aac22de2d803728
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index d42a889398..de1a74271a 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -728,6 +728,46 @@ static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk3368_phy_cfgs[] = {
+	{
+		.reg = 0x700,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0724, 15, 15, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0700, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
+				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
+				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
+				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
+				.utmi_bvalid	= { 0x04bc, 23, 23, 0, 1 },
+				.utmi_ls	= { 0x04bc, 25, 24, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0728, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
+				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0700, 3, 0, 5, 1 },
+			.cp_det		= { 0x04b8, 30, 30, 0, 1 },
+			.dcp_det	= { 0x04b8, 29, 29, 0, 1 },
+			.dp_det		= { 0x04b8, 31, 31, 0, 1 },
+			.idm_sink_en	= { 0x0718, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0718, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0718, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0718, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0718, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0718, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -775,6 +815,7 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk322x-usb2phy", .data = (ulong)&rk322x_phy_cfgs },
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
+	{ .compatible = "rockchip,rk3368-usb2phy", .data = (ulong)&rk3368_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }
 };

commit 6f0347c8c395a251ecf0aa94cf0d0971bacb5119
Author: tony.xu <tony.xu@rock-chips.com>
Date:   Wed Aug 15 15:07:23 2018 +0800

    usb: gadget: rockusb: write keybox to RPMB
    
    invoke function:
    write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len).
    it only work when the chip support OPTEE_V1
    
    Change-Id: If010b7cab6bab87485d9542af8c04544d27162cc
    Signed-off-by: tony.xu <tony.xu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index cbf2f743f3..29a81bd45b 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
 #include <asm/arch/vendor.h>
@@ -352,6 +353,13 @@ static int rkusb_do_vs_write(struct fsg_common *common)
 					return -EIO;
 			} else {
 				/* RPMB */
+#ifdef CONFIG_OPTEE_V1
+				rc =
+				write_keybox_to_secure_storage((u8 *)data,
+							       vhead->size);
+				if (!rc)
+					return -EIO;
+#endif
 			}
 
 			common->residue -= common->data_size;

commit 1c2bd90493d62c7802b621802ddbcf5126c72208
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 20 09:13:29 2018 +0800

    rockchip: resource: fix read dtb by gpio hw id failed
    
    - every bank is 8 pins, i.e. A0~A7, B0~B7, ...;
    - add more quote for "cached_v[]";
    
    Change-Id: I0e6a3ec5e66b95074894c893acd767ce83d34fec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 39987927bc..e871649178 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -420,7 +420,13 @@ static int rockchip_read_dtb_by_adc(const char *file_name)
 			return -EINVAL;
 		}
 
-		/* Read raw adc value */
+		/*
+		 * Read raw adc value
+		 *
+		 * It doesn't need to read adc value every loop, reading once
+		 * is enough. We use cached_v[] to save what we have read, zero
+		 * means not read before.
+		 */
 		if (cached_v[channel] == 0) {
 			ret = adc_channel_single_shot(dev_name,
 						      channel, &raw_adc);
@@ -542,12 +548,17 @@ static int rockchip_read_dtb_by_gpio(const char *file_name)
 		pin  = *(p + 2) - '0';
 		lvl  = *(p + 4) - '0';
 
+		/*
+		 * It doesn't need to read gpio value every loop, reading once
+		 * is enough. We use cached_v[] to save what we have read, zero
+		 * means not read before.
+		 */
 		if (cached_v[port] == 0)
 			cached_v[port] =
 				readl(gpio_base_addr[port] + GPIO_EXT_PORT);
 
 		/* Verify result */
-		bit = bank * 32 + pin;
+		bit = bank * 8 + pin;
 		val = cached_v[port] & (1 << bit) ? 1 : 0;
 
 		if (val == !!lvl) {

commit b5359c85d58b789e0cde080d9c06685bae3b82f4
Author: tony.xu <tony.xu@rock-chips.com>
Date:   Fri Aug 17 10:33:50 2018 +0800

    include: optee_include: add declarations for write_keybox_to_secure_storage
    
    Change-Id: I78349eaf54ee32e06e34b89f333e4b89db1008fd
    Signed-off-by: tony.xu <tony.xu@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 93470d3004..fb859d6924 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -40,6 +40,7 @@ TEEC_Result read_from_keymaster
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
+int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);

commit 90d27e7fed2179754609c54e4a41618a7a980a9f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 22:26:43 2018 +0800

    fastboot: split cb_getvar into dedicate functions
    
    The old implementation of cb_getvar is programed in one functions, this
    make the cb_getvar huge. So separate cb_getvar in several functions.
    
    Functions:
    fb_getvar_all: Get all parameters by cmd fastboot
                   getvar all.
    fb_getvar_single: Get one parameter by cmd fastboot
                      getvar xxx.
    fb_read_var: Parse parameters
    
    Change-Id: I1e795228f8129af82702f8f315cbad349ceec451
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
old mode 100755
new mode 100644
index 99d62a650f..9ec9d2bbd3
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -52,6 +52,9 @@
 
 #define EP_BUFFER_SIZE			4096
 #define SLEEP_COUNT 20000
+#define MAX_PART_NUM_STR_SIZE 4
+#define PARTITION_TYPE_STRINGS "partition-type"
+
 /*
  * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
  * (64 or 512 or 1024), else we break on certain controllers like DWC3
@@ -199,6 +202,22 @@ static void busy_indicator(void)
 		state = 0;
 }
 
+static int fb_get_fstype(const char *ifname, const int part_num,
+			 const char **fs_type)
+{
+	char part_num_str[MAX_PART_NUM_STR_SIZE] = {0};
+
+	snprintf(part_num_str, ARRAY_SIZE(part_num_str), ":%x", part_num);
+
+	if (fs_set_blk_dev(ifname, part_num_str, FS_TYPE_ANY))
+		return -1;
+
+	if (fs_get_fstype(fs_type))
+		return -1;
+
+	return 0;
+}
+
 static int sleep_thread(void)
 {
 	int rc = 0;
@@ -474,116 +493,282 @@ static int strcmp_l1(const char *s1, const char *s2)
 	return strncmp(s1, s2, strlen(s1));
 }
 
-static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
+struct name_string {
+	const char *str;
+	int expects_args;
+	char delim;
+};
+
+#define NAME_NO_ARGS(s)	{.str = s, .expects_args = 0}
+#define NAME_ARGS(s, d)	{.str = s, .expects_args = 1, .delim = d}
+
+static size_t name_check_match(const char *str, size_t len,
+			       const struct name_string *name)
 {
-	char *cmd = req->buf;
-	char response[FASTBOOT_RESPONSE_LEN];
-	const char *s;
-	size_t chars_left;
+	size_t str_len = strlen(name->str);
 
-	strcpy(response, "OKAY");
-	chars_left = sizeof(response) - strlen(response) - 1;
+	/* If name len is greater than input, return 0. */
+	if (str_len > len)
+		return 0;
 
-	strsep(&cmd, ":");
-	if (!cmd) {
-		pr_err("missing variable");
-		fastboot_tx_write_str("FAILmissing var");
-		return;
+	/* If name str does not match input string, return 0. */
+	if (memcmp(name->str, str, str_len))
+		return 0;
+
+	if (name->expects_args) {
+		/* string should have space for delim */
+		if (len == str_len)
+			return 0;
+
+		/* Check delim match */
+		if (name->delim != str[str_len])
+			return 0;
+	} else {
+		/* Name str len should match input len */
+		if (str_len != len)
+			return 0;
 	}
 
-	if (!strcmp_l1("version", cmd)) {
-		strncat(response, FASTBOOT_VERSION, chars_left);
-	} else if (!strcmp_l1("bootloader-version", cmd)) {
-		strncat(response, U_BOOT_VERSION, chars_left);
-	} else if (!strcmp_l1("product", cmd)) {
-		strncat(response, CONFIG_SYS_BOARD, chars_left);
-	} else if (!strcmp_l1("variant", cmd)) {
-		strncat(response, "userdebug", chars_left);
-	} else if (!strcmp_l1("secure", cmd)) {
-		strncat(response, "no", chars_left);
-	} else if (!strcmp_l1("unlocked", cmd)) {
-		strncat(response, "yes", chars_left);
-	} else if (!strcmp_l1("off-mode-charge", cmd)) {
-		strncat(response, "0", chars_left);
-	} else if (!strcmp_l1("battery-voltage", cmd)) {
-		strncat(response, "7.4", chars_left);
-	} else if (!strcmp_l1("battery-soc-ok", cmd)) {
-		strncat(response, "yes", chars_left);
-	} else if (!strcmp_l1("downloadsize", cmd) ||
-		!strcmp_l1("max-download-size", cmd)) {
-		char str_num[12];
-
-		sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
-		strncat(response, str_num, chars_left);
-	} else if (!strcmp_l1("serialno", cmd)) {
+	return str_len + name->expects_args;
+}
+
+static void fb_add_string(char *dst, size_t chars_left,
+			  const char *str, const char *args)
+{
+	if (!str)
+		return;
+
+	int ret = snprintf(dst, chars_left, str, args);
+
+	if (ret < 0)
+		pr_err("snprintf is error!");
+}
+
+static void fb_add_number(char *dst, size_t chars_left,
+			  const char *format, size_t num)
+{
+	if (!format)
+		return;
+
+	int ret = snprintf(dst, chars_left, format, num);
+
+	if (ret > chars_left)
+		pr_err("snprintf is error!");
+}
+
+static int fb_read_var(char *cmd, char *response,
+		       fb_getvar_t var, size_t chars_left)
+{
+	const char *s;
+	int ret = 0;
+
+	switch (var) {
+	case FB_VERSION:
+		fb_add_string(response, chars_left, FASTBOOT_VERSION, NULL);
+		break;
+	case FB_BOOTLOADER_VERSION:
+		fb_add_string(response, chars_left, U_BOOT_VERSION, NULL);
+		break;
+	case FB_BASEBAND_VERSION:
+		fb_add_string(response, chars_left, "N/A", NULL);
+		break;
+	case FB_PRODUCT:
+		fb_add_string(response, chars_left, CONFIG_SYS_BOARD, NULL);
+		break;
+	case FB_SERIAL_NO:
 		s = env_get("serial#");
 		if (s)
-			strncat(response, s, chars_left);
-		else
-			strcpy(response, "FAILValue not set");
-	} else if (strncmp("at-attest-dh", cmd, 12) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
-		char dhbuf[8];
-		uint32_t dh_len = 8;
-		uint32_t res = trusty_attest_dh((uint8_t *)dhbuf, &dh_len);
-		if (res)
-			strcpy(response, "FAILdh not set");
+			fb_add_string(response, chars_left, s, NULL);
 		else
-			strncat(response, dhbuf, chars_left);
+			ret = -1;
+		break;
+	case FB_SECURE:
+		fb_add_string(response, chars_left, "yes", NULL);
+		break;
+	case FB_VARIANT:
+		fb_add_string(response, chars_left, "userdebug", NULL);
+		break;
+	case FB_DWNLD_SIZE:
+		fb_add_number(response, chars_left, "0x%08x",
+			      CONFIG_FASTBOOT_BUF_SIZE);
+		break;
+	case FB_PART_SIZE:
+	case FB_PART_TYPE: {
+		char *part_name = cmd;
+
+		cmd = strsep(&part_name, ":");
+		if (!cmd || !part_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+		disk_partition_t part_info;
+		struct blk_desc *dev_desc;
+		int part_num = -1;
+		const char *fs_type = NULL;
+
+#ifdef CONFIG_RKIMG_BOOTLOADER
+		dev_desc = rockchip_get_bootdev();
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		dev_desc = NULL;
 #endif
-	} else if (strncmp("at-attest-uuid", cmd, 14) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
-		char uuid[32] = {0};
-		uint32_t uuid_len = 32;
-		uint32_t res = trusty_attest_uuid((uint8_t *)uuid, &uuid_len);
-		if (res)
-			strcpy(response, "FAILuuid not set");
-		else
-			strncat(response, uuid, chars_left);
+		if (!dev_desc) {
+			fb_add_string(response, chars_left,
+				      "block device not found", NULL);
+			ret = -1;
+			break;
+		}
+
+		part_num = part_get_info_by_name(dev_desc, part_name,
+						 &part_info);
+		if (part_num < 0) {
+			fb_add_string(response, chars_left,
+				      "partition not found", NULL);
+			ret = -1;
+		} else if (!strncmp(PARTITION_TYPE_STRINGS, cmd,
+					strlen(PARTITION_TYPE_STRINGS))) {
+			if (fb_get_fstype("mmc", part_num, &fs_type)) {
+				fb_add_string(response, chars_left,
+					      (char *)part_info.type, NULL);
+			} else {
+				fb_add_string(response, chars_left,
+					      fs_type, NULL);
+			}
+		} else if (!strncmp("partition-size", cmd, 14)) {
+			u64 part_size;
+
+			part_size = (uint64_t)part_info.size;
+			snprintf(response, chars_left, "0x%llx",
+				 part_size * dev_desc->blksz);
+		}
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
 #endif
-	} else if (strncmp("at-vboot-state", cmd, 14) == 0) {
-		char uuid[32] = {0};
+		break;
+	}
+	case FB_BLK_SIZE: {
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+		struct blk_desc *dev_desc;
 
-		strncat(response, uuid, chars_left);
-	} else if (!strcmp_l1("slot-count", cmd)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char slot_count[2];
-		char temp;
+#ifdef CONFIG_RKIMG_BOOTLOADER
+		dev_desc = rockchip_get_bootdev();
+#else
+		dev_desc = NULL;
+#endif
+		if (!dev_desc) {
+			fb_add_string(response, chars_left,
+				      "block device not found", NULL);
+			ret = -1;
+		} else {
+			fb_add_number(response, chars_left,
+				      "0x%lx", dev_desc->blksz);
+		}
+#else
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
+#endif
+		break;
+	}
+	case FB_ERASE_SIZE: {
+#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
+		lbaint_t erase_grp_size;
 
-		slot_count[1] = '\0';
-		rk_avb_read_slot_count(&temp);
-		slot_count[0] = temp + 0x30;
-		strncat(response, slot_count, chars_left);
+		erase_grp_size = fb_mmc_get_erase_grp_size();
+		if (erase_grp_size < 0) {
+			fb_add_string(response, chars_left,
+				      "block device not found", NULL);
+			ret = -1;
+		} else {
+			fb_add_number(response, chars_left, "0x"LBAF"",
+				      erase_grp_size);
+		}
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
 #endif
-	} else if (!strcmp_l1("current-slot", cmd)) {
+		break;
+	}
+	case FB_UNLOCKED: {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char slot_surrent[8] = {0};
+		uint8_t flash_lock_state = 0;
 
-		if (!rk_avb_get_current_slot(slot_surrent))
-			strncat(response, slot_surrent+1, chars_left);
+		if (rk_avb_read_flash_lock_state(&flash_lock_state))
+			fb_add_string(response, chars_left, "yes", NULL);
 		else
-			strcpy(response, "FAILgeterror");
+			fb_add_string(response, chars_left, "no", NULL);
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		ret = -1;
 #endif
-	} else if (!strcmp_l1("slot-suffixes", cmd)) {
+		break;
+	}
+	case  FB_OFF_MODE_CHARGE: {
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		break;
+	}
+	case FB_BATT_VOLTAGE: {
+		fb_add_string(response, chars_left, "not implemented", NULL);
+		break;
+	}
+	case FB_BATT_SOC_OK: {
+		fb_add_string(response, chars_left, "no", NULL);
+		break;
+	}
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char slot_suffixes_temp[4];
-		char slot_suffixes[9];
+	case FB_HAS_COUNT: {
+		char slot_count[2];
+		char temp;
+
+		slot_count[1] = '\0';
+		if (rk_avb_read_slot_count(&temp) < 0) {
+			fb_add_number(response, chars_left, "%d", 0);
+			ret = -1;
+			break;
+		}
+		slot_count[0] = temp + 0x30;
+		fb_add_string(response, chars_left, slot_count, NULL);
+		break;
+	}
+	case FB_HAS_SLOT: {
+		char *part_name = cmd;
+		int has_slot = -1;
+
+		cmd = strsep(&part_name, ":");
+		if (!cmd || !part_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		has_slot = rk_avb_get_part_has_slot_info(part_name);
+		if (has_slot < 0)
+			fb_add_string(response, chars_left, "no", NULL);
+		else
+			fb_add_string(response, chars_left, "yes", NULL);
+		break;
+	}
+	case FB_CURR_SLOT: {
+		char slot_surrent[8] = {0};
+
+		if (!rk_avb_get_current_slot(slot_surrent)) {
+			fb_add_string(response, chars_left,
+				      slot_surrent + 1, NULL);
+		} else {
+			fb_add_string(response, chars_left, "get error", NULL);
+			ret = -1;
+		}
+		break;
+	}
+	case FB_SLOT_SUFFIXES: {
+		char slot_suffixes_temp[4] = {0};
+		char slot_suffixes[9] = {0};
 		int slot_cnt = 0;
 
-		memset(slot_suffixes_temp, 0, 4);
-		memset(slot_suffixes, 0, 9);
 		rk_avb_read_slot_suffixes(slot_suffixes_temp);
 		while (slot_suffixes_temp[slot_cnt] != '\0') {
 			slot_suffixes[slot_cnt * 2]
@@ -591,150 +776,568 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			slot_suffixes[slot_cnt * 2 + 1] = ',';
 			slot_cnt++;
 		}
-		strncat(response, slot_suffixes, chars_left);
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("has-slot", cmd, 8)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-		char *part_name = cmd;
 
-		cmd = strsep(&part_name, ":");
-		if (!strcmp(part_name, "boot") ||
-		    !strcmp(part_name, "system") ||
-		    !strcmp(part_name, "vendor") ||
-		    !strcmp(part_name, "vbmeta") ||
-		    !strcmp(part_name, "oem")) {
-			strncat(response, "yes", chars_left);
-		} else {
-			strcpy(response, "FAILno");
-		}
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("slot-unbootable", cmd, 15)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		slot_suffixes[(slot_cnt - 1) * 2 + 1] = '\0';
+		fb_add_string(response, chars_left, slot_suffixes, NULL);
+		break;
+	}
+	case FB_SLOT_SUCCESSFUL:{
 		char *slot_name = cmd;
+		AvbABData ab_info;
 
 		cmd = strsep(&slot_name, ":");
-		if (!strcmp(slot_name, "a") ||
-		    !strcmp(slot_name, "b")) {
-			strncat(response, "no", chars_left);
+		if (!cmd || !slot_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (rk_avb_get_ab_info(&ab_info) < 0) {
+			fb_add_string(response, chars_left,
+				      "get ab info failed!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (!strcmp(slot_name, "a")) {
+			if (ab_info.slots[0].successful_boot)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left,
+					      "no", NULL);
+		} else if (!strcmp(slot_name, "b")) {
+			if (ab_info.slots[1].successful_boot)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left,
+					      "no", NULL);
 		} else {
-			strcpy(response, "FAILno");
+			fb_add_string(response, chars_left, "no", NULL);
 		}
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("slot-successful", cmd, 15)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		break;
+	}
+	case FB_SLOT_UNBOOTABLE: {
 		char *slot_name = cmd;
+		AvbABData ab_info;
 
 		cmd = strsep(&slot_name, ":");
-		if (!strcmp(slot_name, "a") ||
-		    !strcmp(slot_name, "b")) {
-			strncat(response, "no", chars_left);
+
+		if (!cmd || !slot_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (rk_avb_get_ab_info(&ab_info) < 0) {
+			fb_add_string(response, chars_left,
+				      "get ab info failed!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (!strcmp(slot_name, "a")) {
+			if (!ab_info.slots[0].successful_boot &&
+			    !ab_info.slots[0].tries_remaining &&
+			    !ab_info.slots[0].priority)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left, "no", NULL);
+		} else if (!strcmp(slot_name, "b")) {
+			if (!ab_info.slots[1].successful_boot &&
+			    !ab_info.slots[1].tries_remaining &&
+			    !ab_info.slots[1].priority)
+				fb_add_string(response, chars_left,
+					      "yes", NULL);
+			else
+				fb_add_string(response, chars_left, "no", NULL);
 		} else {
-			strcpy(response, "FAILno");
+			fb_add_string(response, chars_left, "no", NULL);
 		}
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
-#endif
-	} else if (!strncmp("slot-retry-count", cmd, 16)) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		break;
+	}
+	case FB_SLOT_RETRY_COUNT: {
 		char *slot_name = cmd;
-		char count[10] = {0};
-		static int cnt[2] = {0};
+		AvbABData ab_info;
 
 		cmd = strsep(&slot_name, ":");
+		if (!cmd || !slot_name) {
+			fb_add_string(response, chars_left,
+				      "argument Invalid!", NULL);
+			ret = -1;
+			break;
+		}
+
+		if (rk_avb_get_ab_info(&ab_info) < 0) {
+			fb_add_string(response, chars_left,
+				      "get ab info failed!", NULL);
+			ret = -1;
+			break;
+		}
+
 		if (!strcmp(slot_name, "a")) {
-			sprintf(count, "%c", 0x30+cnt[0]);
-			strncat(response, count, chars_left);
-			if (cnt[0] > 0)
-				cnt[0]--;
+			fb_add_number(response, chars_left,
+				      "%d", ab_info.slots[0].tries_remaining);
 		} else if (!strcmp(slot_name, "b")) {
-			sprintf(count, "%c", 0x30+cnt[1]);
-			strncat(response, count, chars_left);
-			if (cnt[1] > 0)
-				cnt[1]--;
+			fb_add_number(response, chars_left, "%d",
+				      ab_info.slots[1].tries_remaining);
+
 		} else {
 			strcpy(response, "FAILno");
 		}
+		break;
+	}
+	case FB_AT_VBST: {
+		char vbst[VBOOT_STATE_SIZE] = {0};
+		char *p_vbst;
+
+		strcpy(response, "INFO");
+		rk_avb_get_at_vboot_state(vbst);
+		p_vbst = vbst;
+		do {
+			cmd = strsep(&p_vbst, "\n");
+			if (strlen(cmd) > 0) {
+				memcpy(&response[4], cmd, chars_left);
+				fastboot_tx_write_str(response);
+			}
+		} while (strlen(cmd));
+		break;
+	}
+#endif
+#ifdef CONFIG_OPTEE_CLIENT
+	case FB_AT_DH: {
+		char dhbuf[ATTEST_DH_SIZE];
+		uint32_t dh_len = ATTEST_DH_SIZE;
+		uint32_t res = trusty_attest_dh((uint8_t *)dhbuf, &dh_len);
+
+		if (res) {
+			fb_add_string(response, chars_left, "dh not set", NULL);
+			ret = -1;
+		} else {
+			fb_add_string(response, chars_left, dhbuf, NULL);
+		}
+		break;
+	}
+	case FB_AT_UUID: {
+		char uuid[ATTEST_UUID_SIZE] = {0};
+		uint32_t uuid_len = ATTEST_UUID_SIZE;
+		uint32_t res = trusty_attest_uuid((uint8_t *)uuid, &uuid_len);
+
+		uuid[ATTEST_UUID_SIZE - 1] = 0;
+		if (res) {
+			fb_add_string(response, chars_left, "dh not set", NULL);
+			ret = -1;
+		} else {
+			fb_add_string(response, chars_left, uuid, NULL);
+		}
+		break;
+	}
+#endif
+	default: {
+			char *envstr;
+
+			envstr = malloc(strlen("fastboot.") + strlen(cmd) + 1);
+			if (!envstr) {
+				fb_add_string(response, chars_left,
+					      "malloc error", NULL);
+				ret = -1;
+				break;
+			}
+
+			sprintf(envstr, "fastboot.%s", cmd);
+			s = env_get(envstr);
+			if (s) {
+				strncat(response, s, chars_left);
+			} else {
+				printf("WARNING: unknown variable: %s\n", cmd);
+				fb_add_string(response, chars_left,
+					      "not implemented", NULL);
+			}
+
+			free(envstr);
+			break;
+		}
+	}
+
+	return ret;
+}
+
+static const struct {
+	/*
+	 *any changes to this array require an update to the corresponding
+	 *enum in fastboot.h
+	 */
+	struct name_string name;
+	fb_getvar_t var;
+} getvar_table[] = {
+	{ NAME_NO_ARGS("version"), FB_VERSION},
+	{ NAME_NO_ARGS("version-bootloader"), FB_BOOTLOADER_VERSION},
+	{ NAME_NO_ARGS("version-baseband"), FB_BASEBAND_VERSION},
+	{ NAME_NO_ARGS("product"), FB_PRODUCT},
+	{ NAME_NO_ARGS("serialno"), FB_SERIAL_NO},
+	{ NAME_NO_ARGS("secure"), FB_SECURE},
+	{ NAME_NO_ARGS("max-download-size"), FB_DWNLD_SIZE},
+	{ NAME_NO_ARGS("logical-block-size"), FB_BLK_SIZE},
+	{ NAME_NO_ARGS("erase-block-size"), FB_ERASE_SIZE},
+	{ NAME_ARGS("partition-type", ':'), FB_PART_TYPE},
+	{ NAME_ARGS("partition-size", ':'), FB_PART_SIZE},
+	{ NAME_NO_ARGS("unlocked"), FB_UNLOCKED},
+	{ NAME_NO_ARGS("off-mode-charge"), FB_OFF_MODE_CHARGE},
+	{ NAME_NO_ARGS("battery-voltage"), FB_BATT_VOLTAGE},
+	{ NAME_NO_ARGS("variant"), FB_VARIANT},
+	{ NAME_NO_ARGS("battery-soc-ok"), FB_BATT_SOC_OK},
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	/* Slots related */
+	{ NAME_NO_ARGS("slot-count"), FB_HAS_COUNT},
+	{ NAME_ARGS("has-slot", ':'), FB_HAS_SLOT},
+	{ NAME_NO_ARGS("current-slot"), FB_CURR_SLOT},
+	{ NAME_NO_ARGS("slot-suffixes"), FB_SLOT_SUFFIXES},
+	{ NAME_ARGS("slot-successful", ':'), FB_SLOT_SUCCESSFUL},
+	{ NAME_ARGS("slot-unbootable", ':'), FB_SLOT_UNBOOTABLE},
+	{ NAME_ARGS("slot-retry-count", ':'), FB_SLOT_RETRY_COUNT},
+	{ NAME_NO_ARGS("at-vboot-state"), FB_AT_VBST},
+#endif
+	/*
+	 * OEM specific :
+	 * Spec says names starting with lowercase letter are reserved.
+	 */
+#ifdef CONFIG_OPTEE_CLIENT
+	{ NAME_NO_ARGS("at-attest-dh"), FB_AT_DH},
+	{ NAME_NO_ARGS("at-attest-uuid"), FB_AT_UUID},
+#endif
+};
+
+static int fb_getvar_single(char *cmd, char *response, size_t chars_left)
+{
+	int i;
+	size_t match_len = 0;
+	size_t len = strlen(cmd);
+
+	for (i = 0; i < ARRAY_SIZE(getvar_table); i++) {
+		match_len = name_check_match(cmd, len, &getvar_table[i].name);
+		if (match_len)
+			break;
+	}
+
+	if (match_len == 0) {
+		fb_add_string(response, chars_left, "unknown variable", NULL);
+		return -1;
+	}
+
+	if (fb_read_var(cmd, response, getvar_table[i].var, chars_left) < 0)
+		return -1;
+
+	return 0;
+}
+
+static void fb_getvar_all(void)
+{
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
+	char resp_tmp[FASTBOOT_RESPONSE_LEN] = {0};
+	char *actual_resp;
+	size_t chars_left;
+	int i, p;
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc;
+
+	strcpy(response, "INFO");
+	chars_left = sizeof(response) - strlen(response) - 1;
+	actual_resp = response + strlen(response);
+
+	for (i = 0; i < ARRAY_SIZE(getvar_table); i++) {
+		fb_getvar_t var = getvar_table[i].var;
+
+		switch (var) {
+		case FB_PART_TYPE:
+		case FB_PART_SIZE: {
+			const char *fs_type = NULL;
+#ifdef CONFIG_RKIMG_BOOTLOADER
+			dev_desc = rockchip_get_bootdev();
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+			dev_desc = NULL;
 #endif
-	} else if (!strncmp("partition-type", cmd, 14) ||
-		   !strncmp("partition-size", cmd, 14)) {
-		disk_partition_t part_info;
-		struct blk_desc *dev_desc;
-		char *part_name = cmd;
-		char part_size_str[20];
+			if (!dev_desc) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:block device not found",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
 
-		cmd = strsep(&part_name, ":");
-		dev_desc = blk_get_dev("mmc", 0);
-		if (!dev_desc) {
-			strcpy(response, "FAILblock device not found");
-		} else if (part_get_info_by_name(dev_desc, part_name, &part_info) < 0) {
-			strcpy(response, "FAILpartition not found");
-		} else if (!strncmp("partition-type", cmd, 14)) {
-			strncat(response, (char *)part_info.type, chars_left);
-		} else if (!strncmp("partition-size", cmd, 14)) {
-			sprintf(part_size_str, "0x%016x", (int)part_info.size);
-			strncat(response, part_size_str, chars_left);
+			for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
+				if (part_get_info(dev_desc, p,
+						  &part_info) < 0) {
+					break;
+				}
+
+				if (var == FB_PART_TYPE) {
+					fs_type = NULL;
+					if (fb_get_fstype("mmc", p,
+							  &fs_type)) {
+						fb_add_string(
+							resp_tmp,
+							FASTBOOT_RESPONSE_LEN,
+							(char *)part_info.type,
+							NULL);
+					} else {
+						fb_add_string(
+							resp_tmp,
+							FASTBOOT_RESPONSE_LEN,
+							fs_type,
+							NULL);
+					}
+
+					snprintf(actual_resp,
+						 chars_left,
+						 "%s:%s:%s",
+						 getvar_table[i].name.str,
+						 part_info.name,
+						 resp_tmp);
+				} else {
+					uint64_t part_size;
+
+					part_size = (uint64_t)part_info.size;
+					snprintf(actual_resp,
+						 chars_left,
+						 "%s:%s:0x%llx",
+						 getvar_table[i].name.str,
+						 part_info.name,
+						 part_size * dev_desc->blksz);
+				}
+				fastboot_tx_write_str(response);
+			}
+			break;
 		}
-	} else if (!strncmp("oem-unlock", cmd, 10)) {
-#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+		case FB_HAS_SLOT: {
+			uchar *ptr_name_tmp;
+			char c = '_';
+			int has_slot = -1;
+
+#ifdef CONFIG_RKIMG_BOOTLOADER
+			dev_desc = rockchip_get_bootdev();
 #else
+			dev_desc = NULL;
+#endif
+			if (!dev_desc) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:block device not found",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
 
-		char msg[50] = {0};
-		uint8_t unlock = 0;
-		TEEC_Result result;
+			for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) {
+				if (part_get_info(dev_desc, p,
+						  &part_info) < 0) {
+					break;
+				} else {
+					ptr_name_tmp = (uchar *)strrchr(
+						(char *)part_info.name, c);
+					if (ptr_name_tmp &&
+					    part_info.name[ptr_name_tmp -
+						part_info.name + 2] == '\0')
+						fb_add_string(
+							resp_tmp,
+							ptr_name_tmp -
+							part_info.name + 1,
+							(char *)part_info.name,
+							NULL);
+					else
+						strcpy(resp_tmp,
+						       (char *)part_info.name);
+
+					has_slot = rk_avb_get_part_has_slot_info(
+						resp_tmp);
+					if (has_slot < 0) {
+						snprintf(actual_resp,
+							 chars_left,
+							 "%s:%s:no",
+							 getvar_table[i].name.str,
+							 resp_tmp);
+					} else {
+						snprintf(actual_resp,
+							 chars_left,
+							 "%s:%s:yes",
+							 getvar_table[i].name.str,
+							 resp_tmp);
+						p++;
+					}
+
+					fastboot_tx_write_str(response);
+				}
+			}
+			break;
+		}
 
-		result = trusty_read_oem_unlock(&unlock);
-		if (result) {
-			printf("read oem unlock status with error : 0x%x\n", result);
-			fastboot_tx_write_str("FAILRead oem unlock status failed");
-			return;
+		case FB_SLOT_SUCCESSFUL: {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+			AvbABData ab_info;
+
+			if (rk_avb_get_ab_info(&ab_info) < 0) {
+				fb_add_string(actual_resp,
+					      chars_left,
+					      "%s:get ab info failed!",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
+
+			if (ab_info.slots[0].successful_boot)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:no",
+					      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+
+			if (ab_info.slots[1].successful_boot)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:no",
+					      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+#else
+			fb_add_string(actual_resp, chars_left,
+				      "%s:not find ab info!",
+				      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+#endif
+			break;
 		}
-		sprintf(msg, "Device is %s, Status Code: %d\n",
-			unlock == 0 ? "LOCKED" : "UNLOCKED", unlock);
 
-		printf(msg);
-		strncat(response, msg, chars_left);
+		case FB_SLOT_UNBOOTABLE: {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+			AvbABData ab_info;
+
+			if (rk_avb_get_ab_info(&ab_info) < 0) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:not find ab info!",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
+
+			if (!ab_info.slots[0].successful_boot &&
+			    !ab_info.slots[0].tries_remaining &&
+			    !ab_info.slots[0].priority)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:a:no",
+					      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+
+			if (!ab_info.slots[1].successful_boot &&
+			    !ab_info.slots[1].tries_remaining &&
+			    !ab_info.slots[1].priority)
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:yes",
+					      getvar_table[i].name.str);
+			else
+				fb_add_string(actual_resp, chars_left,
+					      "%s:b:no",
+					      getvar_table[i].name.str);
+
+			fastboot_tx_write_str(response);
+#else
+			fb_add_string(actual_resp, chars_left,
+				      "%s:not find ab info!",
+				      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
 #endif
+			break;
+		}
+
+		case FB_SLOT_RETRY_COUNT: {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+			AvbABData ab_info;
+
+			if (rk_avb_get_ab_info(&ab_info) < 0) {
+				fb_add_string(actual_resp, chars_left,
+					      "%s:not find ab info!",
+					      getvar_table[i].name.str);
+				fastboot_tx_write_str(response);
+				break;
+			}
+
+			snprintf(actual_resp, chars_left, "%s:a:%d",
+				 getvar_table[i].name.str,
+				 ab_info.slots[1].tries_remaining);
+			fastboot_tx_write_str(response);
+			snprintf(actual_resp, chars_left, "%s:b:%d",
+				 getvar_table[i].name.str,
+				 ab_info.slots[1].tries_remaining);
+			fastboot_tx_write_str(response);
 #else
-		fastboot_tx_write_str("FAILnot implemented");
-		return;
+			fb_add_string(actual_resp, chars_left,
+				      "%s:not find ab info!",
+				      getvar_table[i].name.str);
+			fastboot_tx_write_str(response);
+#endif
+			break;
+		}
 #endif
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		case FB_AT_VBST:
+			break;
+#endif
+		default:
+			fb_getvar_single((char *)getvar_table[i].name.str,
+					 resp_tmp, FASTBOOT_RESPONSE_LEN);
+			snprintf(actual_resp, chars_left, "%s:%s",
+				 getvar_table[i].name.str, resp_tmp);
+			fastboot_tx_write_str(response);
+		}
+	}
+}
+
+static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
+{
+	char *cmd = req->buf;
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
+	const char *str_read_all = "all";
+	size_t len = 0;
+	size_t chars_left;
+
+	strsep(&cmd, ":");
+	if (!cmd) {
+		pr_err("missing variable");
+		fastboot_tx_write_str("FAILmissing var");
+		return;
+	}
+
+	len = strlen(cmd);
+	if (len == strlen(str_read_all) &&
+	    (strncmp(cmd, str_read_all, len) == 0)) {
+		fb_getvar_all();
+		fastboot_tx_write_str("OKAYDone!");
 	} else {
-		char *envstr;
+		strcpy(response, "OKAY");
+		chars_left = sizeof(response) - strlen(response) - 1;
 
-		envstr = malloc(strlen("fastboot.") + strlen(cmd) + 1);
-		if (!envstr) {
-			fastboot_tx_write_str("FAILmalloc error");
+		if (fb_getvar_single(cmd, &response[strlen(response)],
+				     chars_left) < 0) {
+			strcpy(cmd, "FAILunknown variable");
+			strncat(cmd, &response[strlen(response)], chars_left);
+			fastboot_tx_write_str(cmd);
 			return;
 		}
-
-		sprintf(envstr, "fastboot.%s", cmd);
-		s = env_get(envstr);
-		if (s) {
-			strncat(response, s, chars_left);
-		} else {
-			printf("WARNING: unknown variable: %s\n", cmd);
-			strcpy(response, "FAILVariable not implemented");
-		}
-
-		free(envstr);
+		fastboot_tx_write_str(response);
 	}
-	fastboot_tx_write_str(response);
+
+	return;
 }
 
 static unsigned int rx_bytes_expected(struct usb_ep *ep)
diff --git a/include/fastboot.h b/include/fastboot.h
index bc7ff2bb14..452ff1d801 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -16,6 +16,40 @@
 /* The 64 defined bytes plus \0 */
 #define FASTBOOT_RESPONSE_LEN (64 + 1)
 
+/* Fastboot getvar variables */
+typedef enum {
+	FB_VERSION,
+	FB_BOOTLOADER_VERSION,
+	FB_BASEBAND_VERSION,
+	FB_PRODUCT,
+	FB_SERIAL_NO,
+	FB_SECURE,
+	FB_DWNLD_SIZE,
+	FB_BLK_SIZE,
+	FB_ERASE_SIZE,
+	FB_PART_TYPE,
+	FB_PART_SIZE,
+	FB_UNLOCKED,
+	FB_VARIANT,
+	FB_OFF_MODE_CHARGE,
+	FB_BATT_VOLTAGE,
+	FB_BATT_SOC_OK,
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	FB_HAS_COUNT,
+	FB_HAS_SLOT,
+	FB_CURR_SLOT,
+	FB_SLOT_SUFFIXES,
+	FB_SLOT_SUCCESSFUL,
+	FB_SLOT_UNBOOTABLE,
+	FB_SLOT_RETRY_COUNT,
+	FB_AT_VBST,
+#endif
+#ifdef CONFIG_OPTEE_CLIENT
+	FB_AT_DH,
+	FB_AT_UUID,
+#endif
+} fb_getvar_t;
+
 void fastboot_fail(const char *reason, char *response);
 void fastboot_okay(const char *reason, char *response);
 

commit 42784e282f3e35d1ed4bc55401c3675256c00931
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 14 15:26:06 2018 +0800

    rockchip; fix DRAM info address
    
    Change-Id: I01cbb873cb5861ffd00e9b7d374c22ec42639f6b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index f410fec514..faeb0dffa5 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -253,8 +253,8 @@ ulong board_get_usable_ram_top(ulong total_size)
 
 int rockchip_setup_ddr_param(struct ram_info *info)
 {
-	struct ddr_param *dinfo = (struct ddr_param *)CONFIG_SYS_SDRAM_BASE +
-					PARAM_DRAM_INFO_OFFSET;
+	struct ddr_param *dinfo = (struct ddr_param *)(CONFIG_SYS_SDRAM_BASE +
+					PARAM_DRAM_INFO_OFFSET);
 
 	dinfo->count = 1;
 	dinfo->bank_addr = info->base;

commit 7c1937d6d1c7daf8e59b4760f8adc7ee42bd7bea
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 8 21:14:18 2018 +0800

    lib: avb: change judgement value when read from rpmb
    
    If the item is not existent, trust will return TEE_ERROR_GENERIC
    TEE_ERROR_NO_DATA and TEE_ERROR_ITEM_NOT_FOUND. We initialize
    the item when return these value.
    
    TEST: fastboot getvar at-vboot-state
    
    ERROR: avb-perm-attr-set=0
    avb-locked=
    avb-unlock-disabled=
    
    Change-Id: Ie1b4e1ce7d1dc419a0af11e5701b0130f2f7f553
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 9dd8a8b570..0838880ef9 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -1,418 +1,444 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <common.h>
-#include <image.h>
-#include <android_image.h>
-#include <malloc.h>
-#include <mapmem.h>
-#include <errno.h>
-#include <command.h>
-#include <mmc.h>
-#include <blk.h>
-#include <part.h>
-#include <android_avb/avb_ops_user.h>
-#include <android_avb/libavb_ab.h>
-#include <android_avb/avb_atx_validate.h>
-#include <android_avb/avb_atx_types.h>
-#include <optee_include/OpteeClientInterface.h>
-#include <optee_include/tee_api_defines.h>
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_atx_validate.h>
-#include <boot_rkimg.h>
-
-static void byte_to_block(int64_t *offset,
-			  size_t *num_bytes,
-			  lbaint_t *offset_blk,
-			  lbaint_t *blkcnt)
-{
-	*offset_blk = (lbaint_t)(*offset / 512);
-	if (*num_bytes % 512 == 0) {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512);
-		} else {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		}
-	} else {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		} else {
-			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
-			    (*offset % 512) + (*num_bytes % 512) == 512) {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-			} else {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
-			}
-		}
-	}
-}
-
-static AvbIOResult read_from_partition(AvbOps* ops,
-                                       const char* partition,
-                                       int64_t offset,
-                                       size_t num_bytes,
-                                       void* buffer,
-                                       size_t* out_num_read)
-{
-	struct blk_desc *dev_desc;
-	lbaint_t offset_blk, blkcnt;
-	disk_partition_t part_info;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-		*out_num_read = blkcnt * 512;
-	} else {
-		char *buffer_temp;
-		buffer_temp = malloc(512 * blkcnt);
-		if (buffer_temp == NULL) {
-			printf("malloc error!\n");
-			return AVB_IO_RESULT_ERROR_OOM;
-		}
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
-		*out_num_read = num_bytes;
-		free(buffer_temp);
-	}
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_to_partition(AvbOps* ops,
-                                      const char* partition,
-                                      int64_t offset,
-                                      size_t num_bytes,
-                                      const void* buffer)
-{
-	struct blk_desc *dev_desc;
-	char *buffer_temp;
-	disk_partition_t part_info;
-	lbaint_t offset_blk, blkcnt;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	buffer_temp = malloc(512 * blkcnt);
-	if (buffer_temp == NULL) {
-		printf("malloc error!\n");
-		return AVB_IO_RESULT_ERROR_OOM;
-	}
-	memset(buffer_temp, 0, 512 * blkcnt);
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-	}
-
-	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
-	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-	free(buffer_temp);
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult validate_vbmeta_public_key(
-	AvbOps *ops,
-	const uint8_t *public_key_data,
-	size_t public_key_length,
-	const uint8_t *public_key_metadata,
-	size_t public_key_metadata_length,
-	bool *out_is_trusted)
-{
-#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
-	if (out_is_trusted != NULL) {
-		avb_atx_validate_vbmeta_public_key(ops,
-						   public_key_data,
-						   public_key_length,
-						   public_key_metadata,
-						   public_key_metadata_length,
-						   out_is_trusted);
-	}
-#else
-	if (out_is_trusted != NULL) {
-		*out_is_trusted = true;
-	}
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult read_rollback_index(AvbOps *ops,
-                                       size_t rollback_index_location,
-                                       uint64_t *out_rollback_index)
-{
-	if (out_rollback_index != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		int ret;
-		ret = trusty_read_rollback_index(rollback_index_location,
-						 out_rollback_index);
-		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
-			*out_rollback_index = 0;
-			ret = trusty_write_rollback_index(rollback_index_location,
-							  *out_rollback_index);
-			if (ret != 0) {
-				printf("%s: init rollback index error\n", __FILE__);
-				return AVB_IO_RESULT_ERROR_IO;
-			}
-			ret = trusty_read_rollback_index(rollback_index_location,
-							 out_rollback_index);
-			if (ret == 0)
-				return AVB_IO_RESULT_OK;
-		} else if (ret == 0) {
-			return AVB_IO_RESULT_OK;
-		} else {
-			printf("trusty_read_rollback_index ret = %x\n", ret);
-			return AVB_IO_RESULT_ERROR_IO;
-		}
-#endif
-	}
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult write_rollback_index(AvbOps *ops,
-                                        size_t rollback_index_location,
-                                        uint64_t rollback_index)
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_write_rollback_index(rollback_index_location, rollback_index)) {
-		printf("%s: Fail to write rollback index\n", __FILE__);
-		return AVB_IO_RESULT_ERROR_IO;
-	}
-	return AVB_IO_RESULT_OK;
-#endif
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		int ret;
-
-		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
-		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
-			*out_is_unlocked = 1;
-			if (trusty_write_lock_state(*out_is_unlocked)) {
-				printf("%s: init lock state error\n", __FILE__);
-				return AVB_IO_RESULT_ERROR_IO;
-			}
-
-			ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
-			if(ret == 0)
-				return 0;
-		} else if (ret == 0) {
-			return AVB_IO_RESULT_OK;
-		} else {
-			printf("read_is_device_unlocked ret = %x\n", ret);
-			return AVB_IO_RESULT_ERROR_IO;
-		}
-#endif
-	}
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		if (trusty_write_lock_state(*out_is_unlocked)) {
-			printf("%s: Fail to write lock state\n", __FILE__);
-			return AVB_IO_RESULT_ERROR_IO;
-		}
-		return AVB_IO_RESULT_OK;
-#endif
-	}
-	return AVB_IO_RESULT_ERROR_IO;
-}
-
-static AvbIOResult get_size_of_partition(AvbOps *ops,
-                                         const char *partition,
-                                         uint64_t *out_size_in_bytes)
-{
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-	*out_size_in_bytes = (part_info.size) * 512;
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
-                                                 const char *partition,
-                                                 char *guid_buf,
-                                                 size_t guid_buf_size)
-{
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	dev_desc = rockchip_get_bootdev();
-	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
-	}
-	if (guid_buf != NULL && guid_buf_size > 0) {
-		memcpy(guid_buf, part_info.uuid, guid_buf_size);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-/* read permanent attributes from rpmb */
-AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
-			       AvbAtxPermanentAttributes* attributes)
-{
-	if (attributes != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_permanent_attributes((uint8_t *)attributes,
-						 sizeof(struct AvbAtxPermanentAttributes));
-		return AVB_IO_RESULT_OK;
-#endif
-	}
-
-	return -1;
-}
-
-/*read permanent attributes hash from efuse */
-AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
-				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
-		return -1;
-#else
-	avb_error("Please open the macro!\n");
-	return -1;
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-static void avb_set_key_version(AvbAtxOps* atx_ops,
-                        size_t rollback_index_location,
-                        uint64_t key_version)
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_write_rollback_index(rollback_index_location, key_version)) {
-		printf("%s: Fail to write rollback index\n", __FILE__);
-	}
-#endif
-}
-
-AvbIOResult rk_get_random(AvbAtxOps* atx_ops,
-                          size_t num_bytes,
-                          uint8_t* output)
-{
-        int i;
-        unsigned int seed;
-
-        seed = (unsigned int)get_timer(0);
-        for (i = 0; i < num_bytes; i++) {
-		srand(seed);
-                output[i] = (uint8_t)(rand());
-                seed = (unsigned int)(output[i]);
-        }
-
-        return 0;
-}
-
-AvbOps* avb_ops_user_new(void) {
-  AvbOps* ops;
-
-  ops = calloc(1, sizeof(AvbOps));
-  if (ops == NULL) {
-    avb_error("Error allocating memory for AvbOps.\n");
-    goto out;
-  }
-
-  ops->ab_ops = calloc(1, sizeof(AvbABOps));
-  if (ops->ab_ops == NULL) {
-    avb_error("Error allocating memory for AvbABOps.\n");
-    free(ops);
-    goto out;
-  }
-
-  ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
-  if (ops->atx_ops == NULL) {
-    avb_error("Error allocating memory for AvbAtxOps.\n");
-    free(ops->ab_ops);
-    free(ops);
-    goto out;
-  }
-  ops->ab_ops->ops = ops;
-  ops->atx_ops->ops = ops;
-
-  ops->read_from_partition = read_from_partition;
-  ops->write_to_partition = write_to_partition;
-  ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
-  ops->read_rollback_index = read_rollback_index;
-  ops->write_rollback_index = write_rollback_index;
-  ops->read_is_device_unlocked = read_is_device_unlocked;
-  ops->write_is_device_unlocked = write_is_device_unlocked;
-  ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
-  ops->get_size_of_partition = get_size_of_partition;
-  ops->ab_ops->read_ab_metadata = avb_ab_data_read;
-  ops->ab_ops->write_ab_metadata = avb_ab_data_write;
-  ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
-  ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
-  ops->atx_ops->set_key_version = avb_set_key_version;
-  ops->atx_ops->get_random = rk_get_random;
-
-out:
-  return ops;
-}
-
-
-void avb_ops_user_free(AvbOps* ops) {
-  free(ops->ab_ops);
-  free(ops->atx_ops);
-  free(ops);
-}
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/avb_atx_types.h>
+#include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_atx_validate.h>
+#include <boot_rkimg.h>
+
+static void byte_to_block(int64_t *offset,
+			  size_t *num_bytes,
+			  lbaint_t *offset_blk,
+			  lbaint_t *blkcnt)
+{
+	*offset_blk = (lbaint_t)(*offset / 512);
+	if (*num_bytes % 512 == 0) {
+		if (*offset % 512 == 0)
+			*blkcnt = (lbaint_t)(*num_bytes / 512);
+		else
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+	} else {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		} else {
+			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
+			    (*offset % 512) + (*num_bytes % 512) == 512) {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+			} else {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
+			}
+		}
+	}
+}
+
+static AvbIOResult read_from_partition(AvbOps *ops,
+				       const char *partition,
+				       int64_t offset,
+				       size_t num_bytes,
+				       void *buffer,
+				       size_t *out_num_read)
+{
+	struct blk_desc *dev_desc;
+	lbaint_t offset_blk, blkcnt;
+	disk_partition_t part_info;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if ((offset % 512 == 0) && (num_bytes % 512 == 0)) {
+		blk_dread(dev_desc, part_info.start + offset_blk,
+			  blkcnt, buffer);
+		*out_num_read = blkcnt * 512;
+	} else {
+		char *buffer_temp;
+
+		buffer_temp = malloc(512 * blkcnt);
+		if (!buffer_temp) {
+			printf("malloc error!\n");
+			return AVB_IO_RESULT_ERROR_OOM;
+		}
+		blk_dread(dev_desc, part_info.start + offset_blk,
+			  blkcnt, buffer_temp);
+		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
+		*out_num_read = num_bytes;
+		free(buffer_temp);
+	}
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_to_partition(AvbOps *ops,
+				      const char *partition,
+				      int64_t offset,
+				      size_t num_bytes,
+				      const void *buffer)
+{
+	struct blk_desc *dev_desc;
+	char *buffer_temp;
+	disk_partition_t part_info;
+	lbaint_t offset_blk, blkcnt;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	if (!buffer_temp) {
+		printf("malloc error!\n");
+		return AVB_IO_RESULT_ERROR_OOM;
+	}
+	memset(buffer_temp, 0, 512 * blkcnt);
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if ((offset % 512 != 0) && (num_bytes % 512) != 0)
+		blk_dread(dev_desc, part_info.start + offset_blk,
+			  blkcnt, buffer_temp);
+
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult
+validate_vbmeta_public_key(AvbOps *ops,
+			   const uint8_t *public_key_data,
+			   size_t public_key_length,
+			   const uint8_t *public_key_metadata,
+			   size_t public_key_metadata_length,
+			   bool *out_is_trusted)
+{
+#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+	if (out_is_trusted) {
+		avb_atx_validate_vbmeta_public_key(ops,
+						   public_key_data,
+						   public_key_length,
+						   public_key_metadata,
+						   public_key_metadata_length,
+						   out_is_trusted);
+	}
+#else
+	if (out_is_trusted)
+		*out_is_trusted = true;
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult read_rollback_index(AvbOps *ops,
+				       size_t rollback_index_location,
+				       uint64_t *out_rollback_index)
+{
+	if (out_rollback_index) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+
+		ret = trusty_read_rollback_index(rollback_index_location,
+						 out_rollback_index);
+		switch (ret) {
+		case TEE_SUCCESS:
+			ret = AVB_IO_RESULT_OK;
+			break;
+		case TEE_ERROR_GENERIC:
+		case TEE_ERROR_NO_DATA:
+		case TEE_ERROR_ITEM_NOT_FOUND:
+			*out_rollback_index = 0;
+			ret = trusty_write_rollback_index(rollback_index_location,
+							  *out_rollback_index);
+			if (ret) {
+				printf("%s: init rollback index error\n",
+				       __FILE__);
+				ret = AVB_IO_RESULT_ERROR_IO;
+			} else {
+				ret =
+				trusty_read_rollback_index(rollback_index_location,
+							   out_rollback_index);
+				if (ret)
+					ret = AVB_IO_RESULT_ERROR_IO;
+				else
+					ret = AVB_IO_RESULT_OK;
+			}
+			break;
+		default:
+			ret = AVB_IO_RESULT_ERROR_IO;
+			printf("%s: trusty_read_rollback_index failed",
+			       __FILE__);
+		}
+
+		return ret;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_rollback_index(AvbOps *ops,
+					size_t rollback_index_location,
+					uint64_t rollback_index)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location,
+					rollback_index)) {
+		printf("%s: Fail to write rollback index\n", __FILE__);
+		return AVB_IO_RESULT_ERROR_IO;
+	}
+	return AVB_IO_RESULT_OK;
+#endif
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+
+		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
+		switch (ret) {
+		case TEE_SUCCESS:
+			ret = AVB_IO_RESULT_OK;
+			break;
+		case TEE_ERROR_GENERIC:
+		case TEE_ERROR_NO_DATA:
+		case TEE_ERROR_ITEM_NOT_FOUND:
+			*out_is_unlocked = 1;
+			if (trusty_write_lock_state(*out_is_unlocked)) {
+				printf("%s: init lock state error\n", __FILE__);
+				ret = AVB_IO_RESULT_ERROR_IO;
+			} else {
+				ret =
+				trusty_read_lock_state((uint8_t *)out_is_unlocked);
+				if (ret == 0)
+					ret = AVB_IO_RESULT_OK;
+				else
+					ret = AVB_IO_RESULT_ERROR_IO;
+			}
+			break;
+		default:
+			ret = AVB_IO_RESULT_ERROR_IO;
+			printf("%s: trusty_read_lock_state failed\n", __FILE__);
+		}
+		return ret;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked) {
+#ifdef CONFIG_OPTEE_CLIENT
+		if (trusty_write_lock_state(*out_is_unlocked)) {
+			printf("%s: Fail to write lock state\n", __FILE__);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult get_size_of_partition(AvbOps *ops,
+					 const char *partition,
+					 uint64_t *out_size_in_bytes)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	*out_size_in_bytes = (part_info.size) * 512;
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
+						 const char *partition,
+						 char *guid_buf,
+						 size_t guid_buf_size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	if (guid_buf && guid_buf_size > 0)
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+
+	return AVB_IO_RESULT_OK;
+}
+
+/* read permanent attributes from rpmb */
+AvbIOResult avb_read_perm_attr(AvbAtxOps *atx_ops,
+			       AvbAtxPermanentAttributes *attributes)
+{
+	if (attributes) {
+#ifdef CONFIG_OPTEE_CLIENT
+		trusty_read_permanent_attributes((uint8_t *)attributes,
+						 sizeof(struct AvbAtxPermanentAttributes));
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+
+	return -1;
+}
+
+/*read permanent attributes hash from efuse */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps *atx_ops,
+				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)hash,
+				       AVB_SHA256_DIGEST_SIZE / 4))
+		return -1;
+#else
+	avb_error("Please open the macro!\n");
+	return -1;
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+static void avb_set_key_version(AvbAtxOps *atx_ops,
+				size_t rollback_index_location,
+				uint64_t key_version)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location, key_version))
+		printf("%s: Fail to write rollback index\n", __FILE__);
+#endif
+}
+
+AvbIOResult rk_get_random(AvbAtxOps *atx_ops,
+			  size_t num_bytes,
+			  uint8_t *output)
+{
+	int i;
+	unsigned int seed;
+
+	seed = (unsigned int)get_timer(0);
+	for (i = 0; i < num_bytes; i++) {
+		srand(seed);
+		output[i] = (uint8_t)(rand());
+		seed = (unsigned int)(output[i]);
+	}
+
+	return 0;
+}
+
+AvbOps *avb_ops_user_new(void)
+{
+	AvbOps *ops;
+
+	ops = calloc(1, sizeof(AvbOps));
+	if (!ops) {
+		avb_error("Error allocating memory for AvbOps.\n");
+		goto out;
+	}
+	ops->ab_ops = calloc(1, sizeof(AvbABOps));
+	if (!ops->ab_ops) {
+		avb_error("Error allocating memory for AvbABOps.\n");
+		free(ops);
+		goto out;
+	}
+
+	ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
+	if (!ops->atx_ops) {
+		avb_error("Error allocating memory for AvbAtxOps.\n");
+		free(ops->ab_ops);
+		free(ops);
+		goto out;
+	}
+	ops->ab_ops->ops = ops;
+	ops->atx_ops->ops = ops;
+
+	ops->read_from_partition = read_from_partition;
+	ops->write_to_partition = write_to_partition;
+	ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
+	ops->read_rollback_index = read_rollback_index;
+	ops->write_rollback_index = write_rollback_index;
+	ops->read_is_device_unlocked = read_is_device_unlocked;
+	ops->write_is_device_unlocked = write_is_device_unlocked;
+	ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
+	ops->get_size_of_partition = get_size_of_partition;
+	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
+	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
+	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
+	ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
+	ops->atx_ops->set_key_version = avb_set_key_version;
+	ops->atx_ops->get_random = rk_get_random;
+
+out:
+	return ops;
+}
+
+void avb_ops_user_free(AvbOps *ops)
+{
+	free(ops->ab_ops);
+	free(ops->atx_ops);
+	free(ops);
+}
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index ba2cba1b27..b58a81fe95 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -159,22 +159,25 @@ int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
 	int ret;
 
 	ret = trusty_read_flash_lock_state(flash_lock_state);
-	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+	switch (ret) {
+	case TEE_SUCCESS:
+		break;
+	case TEE_ERROR_GENERIC:
+	case TEE_ERROR_NO_DATA:
+	case TEE_ERROR_ITEM_NOT_FOUND:
 		*flash_lock_state = 1;
 		if (trusty_write_flash_lock_state(*flash_lock_state)) {
-			printf("trusty_write_flash_lock_state error!\n");
-			return -1;
+			avb_error("trusty_write_flash_lock_state error!");
+			ret = -1;
+		} else {
+			ret = trusty_read_flash_lock_state(flash_lock_state);
 		}
-
-		ret = trusty_read_flash_lock_state(flash_lock_state);
-
-		return ret;
-	} else if (ret == 0) {
-		return 0;
-	} else {
-		printf("avb_read_flash_lock_state ret = %x\n", ret);
-		return -1;
+		break;
+	default:
+		printf("%s: trusty_read_flash_lock_state failed\n", __FILE__);
 	}
+
+	return ret;
 #else
 	return -1;
 #endif
@@ -214,22 +217,25 @@ int rk_avb_read_lock_state(uint8_t *lock_state)
 	int ret;
 
 	ret = trusty_read_lock_state(lock_state);
-	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+	switch (ret) {
+	case TEE_SUCCESS:
+		break;
+	case TEE_ERROR_GENERIC:
+	case TEE_ERROR_NO_DATA:
+	case TEE_ERROR_ITEM_NOT_FOUND:
 		*lock_state = 1;
 		if (rk_avb_write_lock_state(*lock_state)) {
-			printf("avb_write_lock_state error!\n");
-			return -1;
+			avb_error("avb_write_lock_state error!");
+			ret = -1;
+		} else {
+			ret = trusty_read_lock_state(lock_state);
 		}
-
-		ret = trusty_read_lock_state(lock_state);
-
-		return ret;
-	} else if (ret == 0) {
-		return 0;
-	} else {
-		printf("avb_read_lock_state ret = %x\n", ret);
-		return -1;
+		break;
+	default:
+		printf("%s: trusty_read_lock_state failed\n", __FILE__);
 	}
+
+	return ret;
 #else
 	return -1;
 #endif
@@ -255,22 +261,26 @@ int rk_avb_read_perm_attr_flag(uint8_t *flag)
 	int ret;
 
 	ret = trusty_read_permanent_attributes_flag(flag);
-	if (ret != TEE_SUCCESS) {
+	switch (ret) {
+	case TEE_SUCCESS:
+		break;
+	case TEE_ERROR_GENERIC:
+	case TEE_ERROR_NO_DATA:
+	case TEE_ERROR_ITEM_NOT_FOUND:
 		*flag = 0;
 		if (rk_avb_write_perm_attr_flag(*flag)) {
-			printf("avb_write_perm_attr_flag error!\n");
-			return -1;
+			avb_error("avb_write_perm_attr_flag error!");
+			ret = -1;
+		} else {
+			ret = trusty_read_permanent_attributes_flag(flag);
 		}
-
-		ret = trusty_read_permanent_attributes_flag(flag);
-
-		return ret;
-	} else if (ret == 0) {
-		return 0;
-	} else {
-		printf("avb_read_perm_attr_flag ret = %x\n", ret);
-		return -1;
+		break;
+	default:
+		printf("%s: trusty_read_permanent_attributes_flag failed",
+		       __FILE__);
 	}
+
+	return ret;
 #else
 	return -1;
 #endif

commit 615e0cde57865e2025a3cb2340bfde96a6f58d1f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Aug 8 21:23:51 2018 +0800

    lib: avb: fix bug HANG in fastboot getvar at-vboot-state
    
    Bug: Run 'fastboot getvar at-vboot-state', then HANG
    in the fastboot without any message.
    
    Cause: The fastboot can not decide the vboot size when
    the return information size of vboot state is larger
    than the VBOOT_STATE_SIZE. This makes the device will not
    response to console.
    
    Solution: 1. Enlarge VBOOT_STATE_SIZE. The max size of
    vboot state may be 862, so define VBOOT_STATE_SIZE
    to 1000.
    2. Use snprintf to get the info.
    
    Change-Id: I2d0fda76ca9034c596993ab27a02cbf2fa550977
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
old mode 100755
new mode 100644
index 76a4de6349..0a70e7096b
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -23,7 +23,7 @@ extern "C" {
 #define ROLLBACK_MAX_SIZE 20
 #define LOCK_MASK 0x1
 #define UNLOCK_DISABLE_MASK 0x2
-#define VBOOT_STATE_SIZE    300
+#define VBOOT_STATE_SIZE    1000
 #define PERM_ATTR_SUCCESS_FLAG 1
 /* soc-v use the rsa2048 */
 #define VBOOT_KEY_SIZE   256
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
old mode 100755
new mode 100644
index 92e50c38dd..ba2cba1b27
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -512,62 +512,73 @@ int rk_avb_get_bootloader_min_version(char *buffer)
 
 void rk_avb_get_at_vboot_state(char *buf)
 {
-	char temp_buffer[200] = {0};
 	char temp_flag = 0;
-	char crlf[2] = {'\n', 0};
 	char *lock_val = NULL;
-	char *unlocK_dis_val = NULL;
+	char *unlock_dis_val = NULL;
 	char *perm_attr_flag = NULL;
 	char *bootloader_locked_flag = NULL;
-	char *lock_state = "bootloader-locked=";
-	char *btld_min_ver = "bootloader-min-versions=";
-	char *avb_perm_attr_set = "avb-perm-attr-set=";
-	char *avb_lock = "avb-locked=";
-	char *avb_unlock_dis = "avb-unlock-disabled=";
-	char *avb_min_ver = "avb-min-versions=";
+	char *rollback_indices;
+	char min_versions[ROLLBACK_MAX_SIZE + 1] = {0};
+	int n;
 
 	if (rk_avb_read_perm_attr_flag((uint8_t *)&temp_flag)) {
-		printf("Can not read perm_attr_flag!\n");
+		avb_error("Can not read perm_attr_flag!");
 		perm_attr_flag = "";
 	} else {
 		perm_attr_flag = temp_flag ? "1" : "0";
 	}
-	sprintf(buf, "%s%s%s%s", buf, avb_perm_attr_set, perm_attr_flag, crlf);
 
 	temp_flag = 0;
 	if (rk_avb_read_lock_state((uint8_t *)&temp_flag)) {
-		printf("Can not read lock state!\n");
+		avb_error("Can not read lock state!");
 		lock_val = "";
-		unlocK_dis_val = "";
+		unlock_dis_val = "";
 	} else {
 		lock_val = (temp_flag & LOCK_MASK) ? "0" : "1";
-		unlocK_dis_val = (temp_flag & UNLOCK_DISABLE_MASK) ? "1" : "0";
+		unlock_dis_val = (temp_flag & UNLOCK_DISABLE_MASK) ? "1" : "0";
 	}
-	sprintf(buf, "%s%s%s%s%s%s%s", buf, avb_lock, lock_val, crlf,
-		avb_unlock_dis, unlocK_dis_val, crlf);
 
 	temp_flag = 0;
 	if (rk_avb_read_bootloader_locked_flag((uint8_t *)&temp_flag)) {
-		printf("Can not read bootloader locked flag!\n");
+		avb_error("Can not read bootloader locked flag!");
 		bootloader_locked_flag = "";
 	} else {
 		bootloader_locked_flag = temp_flag ? "1" : "0";
 	}
-	sprintf(buf, "%s%s%s%s", buf, lock_state, bootloader_locked_flag, crlf);
 
-	if (rk_avb_read_all_rollback_index(temp_buffer))
-		printf("Can not avb_min_ver!\n");
-	sprintf(buf, "%s%s%s%s", buf, avb_min_ver, temp_buffer, crlf);
+	rollback_indices = malloc(VBOOT_STATE_SIZE);
+	if (!rollback_indices) {
+		avb_error("No buff to malloc!");
+		return;
+	}
+
+	memset(rollback_indices, 0, VBOOT_STATE_SIZE);
+	if (rk_avb_read_all_rollback_index(rollback_indices))
+		avb_error("Can not read avb_min_ver!");
 
 	/* bootloader-min-versions */
-	memset(temp_buffer, 0, 200);
-#ifdef CONFIG_SUPPORT_EMMC_RPMB
-	if (rk_avb_get_bootloader_min_version(temp_buffer))
+	if (rk_avb_get_bootloader_min_version(min_versions))
 		avb_error("Call rk_avb_get_bootloader_min_version error!");
-#else
-	memcpy(temp_buffer, "-1", strlen("-1"));
-#endif
-	sprintf(buf, "%s%s%s%s", buf, btld_min_ver, temp_buffer, crlf);
+
+	n = snprintf(buf, VBOOT_STATE_SIZE - 1,
+		     "avb-perm-attr-set=%s\n"
+		     "avb-locked=%s\n"
+		     "avb-unlock-disabled=%s\n"
+		     "bootloader-locked=%s\n"
+		     "avb-min-versions=%s\n"
+		     "bootloader-min-versions=%s\n",
+		     perm_attr_flag,
+		     lock_val,
+		     unlock_dis_val,
+		     bootloader_locked_flag,
+		     rollback_indices,
+		     min_versions);
+	if (n >= VBOOT_STATE_SIZE) {
+		avb_error("The VBOOT_STATE buf is truncated\n");
+		buf[VBOOT_STATE_SIZE - 1] = 0;
+	}
+	debug("The vboot state buf is %s\n", buf);
+	free(rollback_indices);
 }
 
 int rk_avb_get_ab_info(AvbABData* ab_data)

commit fc7985c1ac4247019a29125054b49540bacf18fa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 27 21:46:55 2018 +0800

    android: add 'root=PARTUUID=xxx-xxx'
    
    Set 'root=PARTUUID=' to bootargs When use the CONFIG_ANDROID_AB.
    
    Change-Id: I9760f1a9ad67ba1f2cb334a0af50db464d87816b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index db614a1575..bf4aa75172 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -39,6 +39,33 @@
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 #endif
 #define OEM_UNLOCK_ARG_SIZE 30
+#define UUID_SIZE 37
+
+#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+static int get_partition_unique_uuid(char *partition,
+				     char *guid_buf,
+				     size_t guid_buf_size)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+
+	if (guid_buf && guid_buf_size > 0)
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+
+	return 0;
+}
+#endif
 
 char *android_str_append(char *base_name, char *slot_suffix)
 {
@@ -767,12 +794,35 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 #endif
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
+#ifdef CONFIG_ANDROID_AB
+	/*TODO: get from pre-loader or misc partition*/
+	if (rk_avb_get_current_slot(slot_suffix))
+		return -1;
+
+	if (slot_suffix[0] != '_') {
+		printf("There is no bootable slot!\n");
+		return -1;
+	}
+#endif
+
 	switch (mode) {
 	case ANDROID_BOOT_MODE_NORMAL:
 		/* In normal mode, we load the kernel from "boot" but append
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
+#if defined(CONFIG_ANDROID_AB) && !defined(CONFIG_ANDROID_AVB)
+		char root_partition[20] = {0};
+		char guid_buf[UUID_SIZE] = {0};
+		char root_partuuid[70] = "root=PARTUUID=";
+
+		strcat(root_partition, ANDROID_PARTITION_SYSTEM);
+		strcat(root_partition, slot_suffix);
+		get_partition_unique_uuid(root_partition, guid_buf, UUID_SIZE);
+		strcat(root_partuuid, guid_buf);
+		env_update("bootargs", root_partuuid);
+#endif
+
 #ifdef CONFIG_ANDROID_AB
 		mode_cmdline = "skip_initramfs";
 #endif
@@ -793,17 +843,6 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-#ifdef CONFIG_ANDROID_AB
-	/*TODO: get from pre-loader or misc partition*/
-	if (rk_avb_get_current_slot(slot_suffix))
-		return -1;
-
-	if (slot_suffix[0] != '_') {
-		printf("There is no bootable slot!\n");
-		return -1;
-	}
-#endif
-
 #ifdef CONFIG_ANDROID_AVB
 	if (android_slot_verify(boot_partname, load_address, slot_suffix))
 		return -1;

commit a737bf22c090c083294129ac36cde15d1c1ffbef
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Aug 16 16:52:11 2018 +0800

    rockchip: clk: pll: Fix pll rate overflow calculation on 32-bit
    
    Change-Id: Ide0a10a19218443fa016ee91b5a18cfbf3e0948d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 706b645623..6ace3db348 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -252,7 +252,7 @@ static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
 {
 	u32 refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
 	u32 con = 0, shift, mask;
-	ulong rate = OSC_HZ;
+	ulong rate;
 
 	con = readl(base + pll->mode_offset);
 	shift = pll->mode_shift;
@@ -278,19 +278,16 @@ static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
 		con = readl(base + pll->con_offset + 0x8);
 		frac = (con & RK3036_PLLCON2_FRAC_MASK) >>
 			RK3036_PLLCON2_FRAC_SHIFT;
-		rate *= fbdiv;
-		rate = rate / refdiv;
+		rate = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
 		if (dsmpd == 0) {
-			ulong frac_rate = OSC_HZ;
+			u64 frac_rate = OSC_HZ * (u64)frac;
 
-			frac_rate = frac_rate  >> 12;
-			frac_rate = frac_rate * frac;
-			frac_rate = frac_rate  >> 12;
-			frac_rate = frac_rate / refdiv;
+			do_div(frac_rate, refdiv);
+			frac_rate >>= 24;
+			do_div(frac_rate, postdiv1);
+			do_div(frac_rate, postdiv1);
 			rate += frac_rate;
 		}
-		rate = rate / (postdiv1 * postdiv2);
-
 		return rate;
 	case RKCLK_PLL_MODE_DEEP:
 	default:

commit 9a7ebf31057d48c90fe59d4679dbf2cfdb0f005b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:32:57 2018 +0800

    rockchip: rk3368: add evb rk3368 support
    
    Change-Id: Icd49c20a25e19eb66d797e17df5e128d7572fe73
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig
index 7c9b722b00..5bdddfa7cc 100644
--- a/arch/arm/mach-rockchip/rk3368/Kconfig
+++ b/arch/arm/mach-rockchip/rk3368/Kconfig
@@ -40,6 +40,11 @@ config TARGET_EVB_PX5
          HDMI video input/output interface, audio codec ES8396,
          WIFI/BT (on RTL8723BS), Gsensor BMA250E and light&proximity
          sensor STK3410.
+
+config TARGET_EVB_RK3368
+	bool "RK3368 evaluation board"
+	select BOARD_LATE_INIT
+
 endchoice
 
 config SYS_SOC
@@ -49,6 +54,7 @@ source "board/theobroma-systems/lion_rk3368/Kconfig"
 source "board/rockchip/sheep_rk3368/Kconfig"
 source "board/geekbuying/geekbox/Kconfig"
 source "board/rockchip/evb_px5/Kconfig"
+source "board/rockchip/evb_rk3368/Kconfig"
 
 config SPL_LDSCRIPT
 	default "arch/arm/cpu/armv8/u-boot-spl.lds"
diff --git a/board/rockchip/evb_rk3368/Kconfig b/board/rockchip/evb_rk3368/Kconfig
new file mode 100644
index 0000000000..02722bd852
--- /dev/null
+++ b/board/rockchip/evb_rk3368/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3368
+
+config SYS_BOARD
+	default "evb_rk3368"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3368"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3368/Makefile b/board/rockchip/evb_rk3368/Makefile
new file mode 100644
index 0000000000..63ce0c52bf
--- /dev/null
+++ b/board/rockchip/evb_rk3368/Makefile
@@ -0,0 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+# Copyright (c) 2018 Rockchip Electronics Co., Ltd
+#
+
+obj-y	+= evb_rk3368.o
diff --git a/board/rockchip/evb_rk3368/evb_rk3368.c b/board/rockchip/evb_rk3368/evb_rk3368.c
new file mode 100644
index 0000000000..9382e88c30
--- /dev/null
+++ b/board/rockchip/evb_rk3368/evb_rk3368.c
@@ -0,0 +1,10 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
diff --git a/configs/rk3368_defconfig b/configs/rk3368_defconfig
new file mode 100644
index 0000000000..796476dcd2
--- /dev/null
+++ b/configs/rk3368_defconfig
@@ -0,0 +1,87 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_TARGET_EVB_RK3368=y
+CONFIG_ROCKCHIP_RK3368=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3368-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
+CONFIG_TEST_ROCKCHIP=y
diff --git a/include/configs/evb_rk3368.h b/include/configs/evb_rk3368.h
new file mode 100644
index 0000000000..0a1cad92ce
--- /dev/null
+++ b/include/configs/evb_rk3368.h
@@ -0,0 +1,27 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Copyright (c) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __CONFIGS_RK3368_EVB_H
+#define __CONFIGS_RK3368_EVB_H
+
+#include <configs/rk3368_common.h>
+
+#ifndef CONFIG_SPL_BUILD
+
+#undef ROCKCHIP_DEVICE_SETTINGS
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
+#endif
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index eead7b22ce..0013e3cc4e 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -24,6 +24,7 @@
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00280000
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE            0x00000000
@@ -37,6 +38,10 @@
 #define CONFIG_ROCKUSB_G_DNL_PID	0x330A
 
 #define CONFIG_BOUNCE_BUFFER
+#define COUNTER_FREQUENCY              24000000
+#define CONFIG_PREBOOT
+
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 
@@ -46,14 +51,21 @@
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
-	"fdt_addr_r=0x5600000\0" \
-	"kernel_addr_r=0x280000\0" \
-	"ramdisk_addr_r=0x5bf0000\0"
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 
+#ifndef ROCKCHIP_DEVICE_SETTINGS
+#define ROCKCHIP_DEVICE_SETTINGS
+#endif
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS	\
+	"partitions=" PARTS_DEFAULT \
+	RKIMG_DET_BOOTDEV \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit e0b87408200cb831103ab95ad5f0bc93fc2bb8ec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:33:26 2018 +0800

    rockchip: board: rk3368 usb suppots find node by compatible
    
    Change-Id: I02873c9a111023b79711fc895a87973c58690687
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 29c3409005..8da7c6dfac 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -306,10 +306,18 @@ int board_usb_init(int index, enum usb_init_type init)
 		/*
 		 * With kernel dtb support, rk3288 dwc2 otg node
 		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
-		 * with the compatible "rockchip,rk3288_usb20_otg".
+		 * with the compatible "rockchip,rk3288_usb20_otg",
+		 * and rk3368 also use the "dwc_otg_310" driver with
+		 * the compatible "rockchip,rk3368-usb".
 		 */
+#if defined(CONFIG_ROCKCHIP_RK3288)
 		node = fdt_node_offset_by_compatible(blob, -1,
 				"rockchip,rk3288_usb20_otg");
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+		node = fdt_node_offset_by_compatible(blob, -1,
+				"rockchip,rk3368-usb");
+#endif
+
 		if (node > 0) {
 			matched = true;
 		} else {

commit 9e228ce33860a82a572651bbb333ae1583054c87
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 16 15:28:43 2018 +0800

    android: dtbo: fix "androidboot.dtbo_" => "androidboot.dtbo_idx="
    
    Change-Id: Iefc050e4c503d5e79843c840a8d0b3a002dd9833
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 5f23df7169..db614a1575 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -716,7 +716,7 @@ int android_fdt_overlay_apply(void *fdt_addr)
 		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
 		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
 		if (!ret) {
-			snprintf(buf, 32, "%s%d", "androidboot.dtbo_", index);
+			snprintf(buf, 32, "%s%d", "androidboot.dtbo_idx=", index);
 			env_update("bootargs", buf);
 			printf("ANDROID: fdt overlay OK\n");
 		} else {

commit 45484bdc51522056c9474a6ce666e2186a2d5e42
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 15 10:23:18 2018 +0800

    rockchip: clk: px30: Add support to initialize npll rate
    
    Change-Id: If98ed54ad785a40efae7da78c5f0122158a3de61
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index f94def58ca..ca4655b40d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -14,6 +14,7 @@
 
 #define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(1200 * MHz)
+#define NPLL_HZ		(1188 * MHz)
 #define ACLK_BUS_HZ	(200 * MHz)
 #define HCLK_BUS_HZ	(150 * MHz)
 #define PCLK_BUS_HZ	(100 * MHz)
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 888dbd3697..adbf431a68 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1412,6 +1412,7 @@ static void px30_clk_init(struct px30_pmuclk_priv *priv)
 {
 	struct udevice *cru_dev;
 	struct px30_clk_priv *cru_priv;
+	ulong npll_hz;
 	int ret;
 
 	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
@@ -1431,6 +1432,13 @@ static void px30_clk_init(struct px30_pmuclk_priv *priv)
 	cru_priv = dev_get_priv(cru_dev);
 	cru_priv->gpll_hz = priv->gpll_hz;
 
+	npll_hz = px30_clk_get_pll_rate(cru_priv, NPLL);
+	if (npll_hz != NPLL_HZ) {
+		ret = px30_clk_set_pll_rate(cru_priv, NPLL, NPLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set npll rate\n", __func__);
+	}
+
 	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, ACLK_BUS_HZ);
 	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, HCLK_BUS_HZ);
 	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, PCLK_BUS_HZ);

commit bd0eec95300f1e8052d3d0237e4913df2d7194c5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 10 12:01:01 2018 +0800

    configs: rockchip: rk3308: enable rockchip vendor partition config
    
    Change-Id: Ib884f96b997c8931063cf3d766fabb64f4eeb131
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 48ac5837a6..29a7ad44e9 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -66,3 +66,4 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y

commit 40bd3f862c2b01e6741c2e24eaecf8665662d8f8
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 10 11:58:11 2018 +0800

    drivers: rkflash: register vendor ops interface
    
    Change-Id: I518c31db29d785d311d7f5695d8017ea679888dd
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
index a52d2a9f02..26c82a780f 100644
--- a/drivers/rkflash/rkflash_api.c
+++ b/drivers/rkflash/rkflash_api.c
@@ -168,6 +168,35 @@ u32 rksfc_nand_get_density(struct udevice *udev)
 {
 	return sftl_get_density();
 }
+
+int rksfc_nand_vendor_read(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_read(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
+int rksfc_nand_vendor_write(struct blk_desc *dev_desc,
+			    u32 sec,
+			    u32 n_sec,
+			    void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_write(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
 #endif
 
 #ifdef CONFIG_RKNANDC_NAND
@@ -205,4 +234,33 @@ u32 rknand_flash_get_density(struct udevice *udev)
 {
 	return sftl_get_density();
 }
+
+int rknand_flash_vendor_read(struct blk_desc *dev_desc,
+			     u32 sec,
+			     u32 n_sec,
+			     void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_read(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
+int rknand_flash_vendor_write(struct blk_desc *dev_desc,
+			      u32 sec,
+			      u32 n_sec,
+			      void *p_data)
+{
+	int ret;
+
+	ret = sftl_vendor_write(sec, n_sec, (u8 *)p_data);
+	if (!ret)
+		return n_sec;
+	else
+		return -EIO;
+}
+
 #endif
diff --git a/drivers/rkflash/rkflash_api.h b/drivers/rkflash/rkflash_api.h
index f1f9bfee39..9c4563f7f0 100644
--- a/drivers/rkflash/rkflash_api.h
+++ b/drivers/rkflash/rkflash_api.h
@@ -43,6 +43,14 @@ int rksfc_nand_write(struct udevice *udev,
 		     u32 index,
 		     u32 count,
 		     const void *buf);
+int rksfc_nand_vendor_read(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data);
+int rksfc_nand_vendor_write(struct blk_desc *dev_desc,
+			    u32 sec,
+			    u32 n_sec,
+			    void *p_data);
 #endif
 
 #ifdef CONFIG_RKNANDC_NAND
@@ -55,5 +63,14 @@ int rknand_flash_write(struct udevice *udev,
 		       u32 index,
 		       u32 count,
 		       const void *buf);
+int rknand_flash_vendor_read(struct blk_desc *dev_desc,
+			     u32 sec,
+			     u32 n_sec,
+			     void *p_data);
+int rknand_flash_vendor_write(struct blk_desc *dev_desc,
+			      u32 sec,
+			      u32 n_sec,
+			      void *p_data);
+
 #endif
 #endif
diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
index 9b9de4a63d..30e0c680a9 100644
--- a/drivers/rkflash/rknandc_base.c
+++ b/drivers/rkflash/rknandc_base.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/vendor.h>
 
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
@@ -21,8 +22,8 @@ static struct flash_operation nandc_flash_op = {
 	rknand_flash_read,
 	rknand_flash_write,
 	NULL,
-	NULL,
-	NULL,
+	rknand_flash_vendor_read,
+	rknand_flash_vendor_write,
 #else
 	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
@@ -92,6 +93,10 @@ static int rockchip_nand_probe(struct udevice *udev)
 		priv->read = nandc_flash_op.flash_read;
 		priv->write = nandc_flash_op.flash_write;
 		priv->erase = nandc_flash_op.flash_erase;
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+		flash_vendor_dev_ops_register(nandc_flash_op.vendor_read,
+					      nandc_flash_op.vendor_write);
+#endif
 		debug("%s probe success\n", __func__);
 	}
 
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index 299197250e..d9075a3e74 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -10,6 +10,7 @@
 #include <dm/device-internal.h>
 #include <asm/arch/clock.h>
 #include <rksfc.h>
+#include <asm/arch/vendor.h>
 
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
@@ -37,8 +38,8 @@ static struct flash_operation sfc_nand_op = {
 	rksfc_nand_read,
 	rksfc_nand_write,
 	NULL,
-	NULL,
-	NULL,
+	rksfc_nand_vendor_read,
+	rksfc_nand_vendor_write,
 #else
 	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
@@ -120,6 +121,10 @@ static int rockchip_rksfc_probe(struct udevice *udev)
 				spi_flash_op[i]->flash_get_capacity(udev);
 			priv->read = spi_flash_op[i]->flash_read;
 			priv->write = spi_flash_op[i]->flash_write;
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+			flash_vendor_dev_ops_register(spi_flash_op[i]->vendor_read,
+						      spi_flash_op[i]->vendor_write);
+#endif
 			debug("%s probe success\n", __func__);
 			break;
 		}

commit 38ba45ea839f8da970de2176e5564225b4719dcd
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Aug 15 09:18:57 2018 +0800

    configs: rockchip: Enable drm tve for some platform
    
    include platform: rk3229, rk3128h, rk3328.
    
    Change-Id: I9de8e83884e60cb30426ccb1b81e04b9b73fe00c
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 2c669fb4b4..665f8a226d 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -106,6 +106,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index cbe1cfdb54..bd8b4daf4f 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -101,6 +101,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 348a08fd9e..82324f27f7 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -110,6 +110,7 @@ CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
+CONFIG_ROCKCHIP_DRM_TVE=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y

commit 87d9371f0078a75649b8c1db691a170e43eb202c
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Aug 15 09:15:36 2018 +0800

    configs: rockchip: Enable drm hdmi for some platform
    
    include platform: rk3229, rk3128h, rk3328, rk3399.
    
    Change-Id: I3f1cbc3a6c68a2349b76a4e13c6103d53b2c41ae
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index baa869aa2a..2c669fb4b4 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -104,6 +104,8 @@ CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
index 40380018f0..cbe1cfdb54 100644
--- a/configs/rk322x_defconfig
+++ b/configs/rk322x_defconfig
@@ -99,6 +99,8 @@ CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index 843879ba5e..348a08fd9e 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -108,6 +108,8 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
+CONFIG_ROCKCHIP_INNO_HDMI_PHY=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 0b64fb61e0..cff3149344 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -109,6 +109,7 @@ CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_HDMI=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y

commit a7df48681ab2521f4431d27f5bd1b30cb49f3b91
Author: tony.xu <tony.xu@rock-chips.com>
Date:   Sat Aug 11 17:02:29 2018 +0800

    load keybox to secure storage thtough u-boot: u-boot->ca->ta
    
    Change-Id: Ifdf237ec235c791565d2da1b5881df2f1499d422
    Signed-off-by: tony.xu <tony.xu@rock-chips.com>

diff --git a/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h b/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
new file mode 100644
index 0000000000..4b2aeff231
--- /dev/null
+++ b/include/optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _WIDEVINE_TA_H_
+#define _WIDEVINE_TA_H_
+
+extern const uint8_t widevine_keybox_data[];
+extern const uint32_t widevine_keybox_size;
+
+#endif /* _WIDEVINE_TA_H_ */
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 989dfc2b72..552135f4da 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -16,6 +16,11 @@ obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
 	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+
+obj-y += c11fe8ac-b997-48cf-a28de2a55e5240ef.o
+lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.o: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c
+lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.c: lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
+	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix widevine_keybox --TA $< --out $@
 endif
 
 ifdef CONFIG_OPTEE_V2
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 8c7c3dc1b7..166c00446f 100755
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -10,6 +10,190 @@
 #include <optee_include/tee_client_api.h>
 #include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
+#include <stdlib.h>
+
+#define	BOOT_FROM_EMMC	(1 << 1)
+
+uint32_t rk_send_keybox_to_ta(uint8_t *filename, uint32_t filename_size,
+			      TEEC_UUID uuid,
+			      uint8_t *key, uint32_t key_size,
+			      uint8_t *data, uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID *TeecUuid = &uuid;
+	TEEC_Operation TeecOperation = {0};
+
+	struct blk_desc *dev_desc;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
+
+	OpteeClientApiLibInitialize();
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	/* 0 nand or emmc "security" partition , 1 rpmb */
+	TeecOperation.params[0].value.a =
+		(dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      &TeecOperation,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = key_size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, key, SharedMem1.size);
+
+	TEEC_SharedMemory SharedMem2 = {0};
+
+	SharedMem2.size = data_size;
+	SharedMem2.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem2);
+
+	memcpy(SharedMem2.buffer, data, SharedMem2.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.params[2].tmpref.buffer = SharedMem2.buffer;
+	TeecOperation.params[2].tmpref.size = SharedMem2.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INPUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE);
+
+	printf("check: does keybox exised in secure storage...\n");
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					122,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult != TEEC_SUCCESS) {
+		printf("no keybox in secure storage, write keybox to secure storage\n");
+		TeecResult = TEEC_InvokeCommand(&TeecSession,
+						121,
+						&TeecOperation,
+						&ErrorOrigin);
+		if (TeecResult != TEEC_SUCCESS) {
+			printf("send data to TA failed with code 0x%x\n", TeecResult);
+		} else {
+			printf("send data to TA success with code 0x%x\n", TeecResult);
+		}
+	}
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_ReleaseSharedMemory(&SharedMem2);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+int write_keybox_to_secure_storage(uint8_t *uboot_data, uint32_t len)
+{
+	typedef struct VENDOR_DATA {
+		uint8_t tag[4];
+		uint32_t key_size;
+		uint32_t data_size;
+		uint8_t *all_data;
+	} VENDOR_DATA;
+
+	uint8_t *key = NULL;
+	uint8_t *data = NULL;
+	VENDOR_DATA tmp_data;
+
+	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
+	memcpy(tmp_data.tag, uboot_data, 4);
+	tmp_data.key_size = *(uboot_data + 4);
+	tmp_data.data_size = *(uboot_data + 8);
+	tmp_data.all_data = malloc(tmp_data.key_size + tmp_data.data_size);
+	memcpy(tmp_data.all_data, uboot_data + 12,
+	       tmp_data.key_size + tmp_data.data_size);
+
+	uint8_t widevine_tag[] = {'K', 'B', 'O', 'X'};
+	uint8_t tag[] = {0};
+
+	uint32_t object_id = 101;
+
+	TEEC_UUID tmp_uuid;
+
+	if (memcmp(uboot_data, widevine_tag, 4) == 0) {
+		TEEC_UUID widevine_uuid = { 0xc11fe8ac, 0xb997, 0x48cf,
+			{ 0xa2, 0x8d, 0xe2, 0xa5, 0x5e, 0x52, 0x40, 0xef} };
+		tmp_uuid = widevine_uuid;
+		memcpy(tag, uboot_data, 4);
+		printf("check tag success! %s\n", tag);
+	} else {
+		memcpy(tag, uboot_data, 4);
+		printf("check tag failed! %s\n", tag);
+	}
+
+	key = malloc(tmp_data.key_size);
+	if (!key) {
+		printf("Malloc key failed!!\n");
+		goto reboot;
+	}
+
+	data = malloc(tmp_data.data_size);
+	if (!data) {
+		printf("Malloc data failed!!\n");
+		goto reboot;
+	}
+
+	memcpy(key, tmp_data.all_data, tmp_data.key_size);
+	memcpy(data, tmp_data.all_data + tmp_data.key_size,
+	       tmp_data.data_size);
+
+	rk_send_keybox_to_ta((uint8_t *)&object_id, sizeof(uint32_t),
+			     tmp_uuid,
+			     key, tmp_data.key_size,
+			     data, tmp_data.data_size);
+reboot:
+	if (key)
+		free(key);
+	if (data)
+		free(data);
+	if (tmp_data.all_data)
+	free(tmp_data.all_data);
+
+	memset(&tmp_data, 0, sizeof(VENDOR_DATA));
+	return 0;
+}
 
 void test_optee(void)
 {
@@ -17,7 +201,7 @@ void test_optee(void)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142, \
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
@@ -1828,4 +2012,4 @@ TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
 	}
 
 	return ret;
-}
\ No newline at end of file
+}
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 810665f3af..9de072765e 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -16,6 +16,7 @@
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
 #include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+#include <optee_include/c11fe8ac-b997-48cf-a28de2a55e5240ef.h>
 #ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
 #endif
@@ -55,6 +56,25 @@ TEEC_Result OpteeRpcFree(uint32_t Address)
 	return TEEC_SUCCESS;
 }
 
+int is_uuid_equal(TEE_UUID uuid1, TEEC_UUID uuid2)
+{
+	bool a, b, c;
+
+	a = (uuid1.timeLow == uuid2.timeLow);
+	b = (uuid1.timeMid == uuid2.timeMid);
+	c = (uuid1.timeHiAndVersion == uuid2.timeHiAndVersion);
+	if ((a & b & c) == 0) {
+		return 0;
+	} else {
+		if (memcmp(uuid1.clockSeqAndNode,
+			   uuid2.clockSeqAndNode, 8) == 0) {
+			return 1;
+		} else {
+			return 0;
+		}
+	}
+}
+
 /*
  * Load a TA from storage into memory and provide it back to OpTEE.
  * Param[0] = IN: struct tee_rpc_load_ta_cmd
@@ -72,6 +92,8 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 		goto Exit;
 	}
 
+	TEEC_UUID TA_RK_KEYMASTER_UUID = {0x258be795, 0xf9ca, 0x40e6,
+			{0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d} };
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
 	TeeLoadTaCmd = (struct tee_rpc_load_ta_cmd *)
 					(size_t)TeeSmc32Param[0].u.memref.buf_ptr;
@@ -88,8 +110,13 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 	uint32_t ImageSize = 0;
 	size_t AllocAddress = 0;
 
-	ImageData = (void *)keymaster_data;
-	ImageSize = keymaster_size;
+	if (is_uuid_equal(TeeLoadTaCmd->uuid, TA_RK_KEYMASTER_UUID)) {
+		ImageData = (void *)keymaster_data;
+		ImageSize = keymaster_size;
+	} else {
+		ImageData = (void *)widevine_keybox_data;
+		ImageSize = widevine_keybox_size;
+	}
 
 	if (Status != 0) {
 		TeecResult = TEEC_ERROR_ITEM_NOT_FOUND;
diff --git a/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta b/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta
new file mode 100644
index 0000000000..2d466e3223
Binary files /dev/null and b/lib/optee_clientApi/c11fe8ac-b997-48cf-a28de2a55e5240ef.ta differ

commit c3b76d4826959a1bb13b12d8acc87c35c78fe1b9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:44:49 2018 +0800

    rockchip: rk3368: init uart2 early debug console iomux
    
    Change-Id: Ia5e1a0daf50ab509919f81f68a6ac590d93d4d2e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 0978b66b7f..e82b631138 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -220,16 +220,16 @@ static void sgrf_init(void)
 
 void board_debug_uart_init(void)
 {
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/*
 	 * N.B.: This is called before the device-model has been
 	 *       initialised. For this reason, we can not access
 	 *       the GRF address range using the syscon API.
 	 */
-	struct rk3368_grf * const grf =
+	struct rk3368_grf * const grf __maybe_unused =
 		(struct rk3368_grf * const)0xff770000;
 
 	enum {
+		/* UART0 */
 		GPIO2D1_MASK            = GENMASK(3, 2),
 		GPIO2D1_GPIO            = 0,
 		GPIO2D1_UART0_SOUT      = (1 << 2),
@@ -237,13 +237,29 @@ void board_debug_uart_init(void)
 		GPIO2D0_MASK            = GENMASK(1, 0),
 		GPIO2D0_GPIO            = 0,
 		GPIO2D0_UART0_SIN       = (1 << 0),
+
+		/* UART2 */
+		GPIO2A6_MASK		= GENMASK(13, 12),
+		GPIO2A6_GPIO		= 0,
+		GPIO2A6_UART0_SIN      = (1 << 13),
+
+		GPIO2A5_MASK		= GENMASK(11, 10),
+		GPIO2A5_GPIO		= 0,
+		GPIO2A5_UART0_SOUT	 = (1 << 11),
 	};
 
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/* Enable early UART0 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff690000)
+	/* Enable early UART2 on the RK3368 */
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A6_MASK, GPIO2A6_UART0_SIN);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A5_MASK, GPIO2A5_UART0_SOUT);
 #endif
 }
 

commit f2b393098883049206f30567da2f280194d286e2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:30:31 2018 +0800

    rockchip: rk3368: scan sub-nodes of the syscon node
    
    Change-Id: I209a149b8de280580a7f219cede7bf2ebc69f416
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
index 99d51f0edc..17b411f0be 100644
--- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
@@ -26,6 +26,9 @@ static const struct udevice_id rk3368_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk3368) = {
 	.name = "rk3368_syscon",
 	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 	.of_match = rk3368_syscon_ids,
 };
 

commit 2ddecca3501a6f2086bf3dce915d4845db43bac6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:30:07 2018 +0800

    rockchip: dts: rk3368: add rk3368-evb.dts
    
    Change-Id: I7cc415f6a100b26c619d7f199f4d9e781407379a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368-evb.dts b/arch/arm/dts/rk3368-evb.dts
new file mode 100644
index 0000000000..6461d8a3b2
--- /dev/null
+++ b/arch/arm/dts/rk3368-evb.dts
@@ -0,0 +1,56 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3368.dtsi"
+#include "rk3368-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3399 Evaluation Board";
+	compatible = "rockchip,rk3368-evb", "rockchip,rk3368";
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
+};
+
+&emmc {
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+
+	u2phy_host: host-port {
+		status = "okay";
+	};
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
new file mode 100644
index 0000000000..cd53b84579
--- /dev/null
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&service_msch {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file

commit 57702281391371e32d88091dc970c274ddc4137f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Aug 13 15:28:50 2018 +0800

    rockchip: dts: rk3368: add usb host/phy nodes
    
    Change-Id: I8f7e33d204c63f5455dd33e5b254998e6f20d0da
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 70f432ced1..8bc18d8627 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -544,6 +544,19 @@
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_HOST0>;
 		clock-names = "usbhost";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ff520000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xff520000 0x0 0x20000>;
+		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>, <&u2phy>;
+		clock-names = "usbhost", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -559,6 +572,8 @@
 		g-rx-fifo-size = <275>;
 		g-tx-fifo-size = <256 128 128 64 64 32>;
 		g-use-dma;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -677,6 +692,37 @@
 	grf: syscon@ff770000 {
 		compatible = "rockchip,rk3368-grf", "syscon";
 		reg = <0x0 0xff770000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@700 {
+			compatible = "rockchip,rk3368-usb2phy";
+			reg = <0x700 0x2c>;
+			clocks = <&cru SCLK_OTGPHY0>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			clock-output-names = "usbotg_out";
+			assigned-clocks = <&cru SCLK_USBPHY480M>;
+			assigned-clock-parents = <&u2phy>;
+			status = "disabled";
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
 	};
 
 	wdt: watchdog@ff800000 {

commit 2a48727aba86ee6f1776d21ade6ab82edfcc0856
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Wed Aug 15 09:06:22 2018 +0800

    drm: Transplant tve code from rkdevelop
    
    Support tve in rk322x and rk322xh.
    
    Tested in rk3328, rk3229, rk3128h.
    
    Change-Id: I96a5034bced08e89bc9767ce7479ad4cf00ee4a5
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index e1c71cbe0a..0c60d9d73d 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -69,3 +69,11 @@ config DRM_ROCKCHIP_RGB
 	help
 	  Choose this option to enable support for Rockchip RGB driver.
 	  say Y to enable its driver.
+
+config ROCKCHIP_DRM_TVE
+	bool "Rockchip TVE Support"
+	depends on DRM_ROCKCHIP
+	help
+	  Choose this option to enable support for Rockchip TVE.
+	  Rockchip rk322x and rk322xh SoC has TVE can be used, and
+	  say Y to enable TVE driver.
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 195b6ca7e6..2f77efe22d 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
+obj-$(CONFIG_ROCKCHIP_DRM_TVE) += rockchip_drm_tve.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 27bd7a6c03..6681446c7e 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -10,6 +10,7 @@
 struct rockchip_crtc {
 	const struct rockchip_crtc_funcs *funcs;
 	const void *data;
+	bool hdmi_hpd;
 };
 
 struct rockchip_crtc_funcs {
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 46ce448812..9d84120f44 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -50,6 +50,93 @@ static LIST_HEAD(logo_cache_list);
 static unsigned long memory_start;
 static unsigned long memory_end;
 
+/*
+ * the phy types are used by different connectors in public.
+ * The current version only has inno hdmi phy for hdmi and tve.
+ */
+enum public_use_phy {
+	NONE,
+	INNO_HDMI_PHY
+};
+
+/* save public phy data */
+struct public_phy_data {
+	void *private_date;
+	const struct rockchip_phy *phy_drv;
+	int phy_node;
+	int public_phy_type;
+	bool phy_init;
+};
+
+/* check which kind of public phy does connector use */
+static int check_public_use_phy(struct display_state *state)
+{
+	int ret = NONE;
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+	struct connector_state *conn_state = &state->conn_state;
+
+	if (!strncmp(dev_read_name(conn_state->dev), "tve", 3) ||
+	    !strncmp(dev_read_name(conn_state->dev), "hdmi", 4))
+		ret = INNO_HDMI_PHY;
+#endif
+
+	return ret;
+}
+
+/*
+ * get public phy driver and initialize it.
+ * The current version only has inno hdmi phy for hdmi and tve.
+ */
+static int get_public_phy(struct display_state *state,
+			  struct public_phy_data *data)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy;
+	struct udevice *dev;
+	int ret = 0;
+
+	switch (data->public_phy_type) {
+	case INNO_HDMI_PHY:
+#if defined(CONFIG_ROCKCHIP_RK3328)
+		ret = uclass_find_device_by_name(UCLASS_PHY,
+						 "hdmiphy@ff430000", &dev);
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+		ret = uclass_find_device_by_name(UCLASS_PHY,
+						 "hdmi-phy@12030000", &dev);
+#else
+		ret = -EINVAL;
+#endif
+		if (ret) {
+			printf("Warn: can't find phy driver\n");
+			return 0;
+		}
+
+		phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
+		if (!phy) {
+			printf("failed to get phy driver\n");
+			return 0;
+		}
+
+		conn_state->phy_dev = dev;
+		conn_state->phy_node = dev->node;
+		if (!phy->funcs || !phy->funcs->init ||
+		    phy->funcs->init(state)) {
+			printf("failed to init phy driver\n");
+			return -EINVAL;
+		}
+		conn_state->phy = phy;
+
+		printf("inno hdmi phy init success, save it\n");
+		data->phy_node = ofnode_to_offset(conn_state->phy_node);
+		data->private_date = conn_state->phy_private;
+		data->phy_drv = conn_state->phy;
+		data->phy_init = true;
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
 static void init_display_buffer(ulong base)
 {
 	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
@@ -141,13 +228,40 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 	return NULL;
 }
 
-static int connector_phy_init(struct display_state *state)
+static int connector_phy_init(struct display_state *state,
+			      struct public_phy_data *data)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_phy *phy;
 	struct udevice *dev;
-	int ret;
+	int ret, type;
+
+	/* does this connector use public phy with others */
+	type = check_public_use_phy(state);
+	if (type == INNO_HDMI_PHY) {
+		/* there is no public phy was initialized */
+		if (!data->phy_init) {
+			printf("start get public phy\n");
+			data->public_phy_type = type;
+			if (get_public_phy(state, data)) {
+				printf("can't find correct public phy type\n");
+				free(data);
+				return -EINVAL;
+			}
+			return 0;
+		}
+
+		/* if this phy has been initialized, get it directly */
+		conn_state->phy_node = offset_to_ofnode(data->phy_node);
+		conn_state->phy_private = data->private_date;
+		conn_state->phy = data->phy_drv;
+		return 0;
+	}
 
+	/*
+	 * if this connector don't use the same phy with others,
+	 * just get phy as original method.
+	 */
 	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
 					   &dev);
 	if (ret) {
@@ -533,7 +647,7 @@ static int display_init(struct display_state *state)
 	const struct rockchip_connector *conn = conn_state->connector;
 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct crtc_state *crtc_state = &state->crtc_state;
-	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
@@ -560,8 +674,23 @@ static int display_init(struct display_state *state)
 	/*
 	 * support hotplug, but not connect;
 	 */
+#ifdef CONFIG_ROCKCHIP_DRM_TVE
+	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
+		printf("hdmi plugin ,skip tve\n");
+		goto deinit;
+	}
+#elif defined(CONFIG_ROCKCHIP_DRM_RK1000)
+	if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
+		printf("hdmi plugin ,skip tve\n");
+		goto deinit;
+	}
+#endif
 	if (conn_funcs->detect) {
 		ret = conn_funcs->detect(state);
+#if defined(CONFIG_ROCKCHIP_DRM_TVE) || defined(CONFIG_ROCKCHIP_DRM_RK1000)
+		if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
+			crtc->hdmi_hpd = ret;
+#endif
 		if (!ret)
 			goto deinit;
 	}
@@ -1107,7 +1236,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	const void *blob = gd->fdt_blob;
 	int phandle;
 	struct udevice *crtc_dev, *conn_dev;
-	const struct rockchip_crtc *crtc;
+	struct rockchip_crtc *crtc;
 	const struct rockchip_connector *conn;
 	struct display_state *s;
 	const char *name;
@@ -1115,10 +1244,19 @@ static int rockchip_display_probe(struct udevice *dev)
 	ofnode node, route_node;
 	struct device_node *port_node, *vop_node, *ep_node;
 	struct device_node *cnt_node, *p;
+	struct public_phy_data *data;
 
 	/* Before relocation we don't need to do anything */
 	if (!(gd->flags & GD_FLG_RELOC))
 		return 0;
+
+	data = malloc(sizeof(struct public_phy_data));
+	if (!data) {
+		printf("failed to alloc phy data\n");
+		return -ENOMEM;
+	}
+	data->phy_init = false;
+
 	init_display_buffer(plat->base);
 
 	route_node = dev_read_subnode(dev, "route");
@@ -1155,7 +1293,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			printf("Warn: can't find crtc driver %d\n", ret);
 			continue;
 		}
-		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
+		crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
 		phandle = ofnode_read_u32_default(np_to_ofnode(ep_node),
 						  "remote-endpoint", -1);
@@ -1222,7 +1360,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			continue;
 		}
 
-		if (connector_phy_init(s)) {
+		if (connector_phy_init(s, data)) {
 			printf("Warn: Failed to init phy drivers\n");
 			free(s);
 			continue;
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d38e113fe4..f198b4208d 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -64,7 +64,7 @@ struct rockchip_mcu_timing {
 
 struct crtc_state {
 	struct udevice *dev;
-	const struct rockchip_crtc *crtc;
+	struct rockchip_crtc *crtc;
 	void *private;
 	ofnode node;
 	int crtc_id;
diff --git a/drivers/video/drm/rockchip_drm_tve.c b/drivers/video/drm/rockchip_drm_tve.c
new file mode 100644
index 0000000000..79fd98fa11
--- /dev/null
+++ b/drivers/video/drm/rockchip_drm_tve.c
@@ -0,0 +1,579 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/io.h>
+#include <linux/media-bus-format.h>
+#include <asm/arch-rockchip/clock.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <dm/uclass-internal.h>
+#include <linux/fb.h>
+#include <edid.h>
+#include <syscon.h>
+#include <boot_rkimg.h>
+#include <mapmem.h>
+#include <misc.h>
+#include "rockchip_drm_tve.h"
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct drm_tve tve_s;
+
+#define tve_writel(offset, v)	writel(v, tve_s.reg_phy_base  + offset)
+#define tve_readl(offset)	readl(tve_s.reg_phy_base + offset)
+
+#define tve_dac_writel(offset, v)   writel(v, tve_s.vdacbase + offset)
+#define tve_dac_readl(offset)	readl(tve_s.vdacbase + offset)
+
+#define RK322X_VDAC_STANDARD 0x15
+
+#define TVE_REG_NUM 0x28
+
+static const struct drm_display_mode tve_modes[] = {
+	/* 0 - 720x576i@50Hz */
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
+		   816, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, },
+	/* 1 - 720x480i@60Hz */
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
+		   815, 858, 480, 480, 486, 525, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, },
+};
+
+static void dac_enable(int enable)
+{
+	u32 mask, val = 0;
+	u32 grfreg = 0;
+
+#if defined(CONFIG_ROCKCHIP_RK322X) || defined(CONFIG_ROCKCHIP_RK3328)
+	tve_dac_writel(VDAC_VDAC2, v_CUR_CTR(tve_s.daclevel));
+	tve_dac_writel(VDAC_VDAC3, v_CAB_EN(0));
+#endif
+	if (enable) {
+		mask = m_VBG_EN | m_DAC_EN | m_DAC_GAIN;
+#if defined(CONFIG_ROCKCHIP_RK3128)
+			val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve_s.daclevel);
+			grfreg = GRF_TVE_CON0;
+#elif defined(CONFIG_ROCKCHIP_RK3036)
+			val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve_s.daclevel);
+			grfreg = GRF_SOC_CON3;
+#endif
+		val |= mask << 16;
+
+#if defined(CONFIG_ROCKCHIP_RK322X) || defined(CONFIG_ROCKCHIP_RK3328)
+			val = v_CUR_REG(tve_s.dac1level) |
+				v_DR_PWR_DOWN(0) | v_BG_PWR_DOWN(0);
+#endif
+	} else {
+		mask = m_VBG_EN | m_DAC_EN;
+		val = 0;
+#if defined(CONFIG_ROCKCHIP_RK3128)
+			grfreg = GRF_TVE_CON0;
+#elif defined(CONFIG_ROCKCHIP_RK3036)
+			grfreg = GRF_SOC_CON3;
+#endif
+		val |= mask << 16;
+
+#if defined(CONFIG_ROCKCHIP_RK322X) || defined(CONFIG_ROCKCHIP_RK3328)
+			val = v_CUR_REG(tve_s.dac1level) |
+				m_DR_PWR_DOWN | m_BG_PWR_DOWN;
+		#endif
+	}
+
+	if (grfreg)
+		writel(val, tve_s.grf + grfreg);
+	else if (tve_s.vdacbase)
+		tve_dac_writel(VDAC_VDAC1, val);
+}
+
+static void tve_set_mode(int mode)
+{
+	if (tve_s.soctype != SOC_RK322X &&
+	    tve_s.soctype != SOC_RK322XH) {
+		tve_writel(TV_RESET, v_RESET(1));
+		udelay(100);
+		tve_writel(TV_RESET, v_RESET(0));
+	}
+
+	if (tve_s.soctype == SOC_RK3036)
+		tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
+			   v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
+			   v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(0));
+	else
+		tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
+			   v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
+			   v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(3));
+
+	tve_writel(TV_LUMA_FILTER0, tve_s.lumafilter0);
+	tve_writel(TV_LUMA_FILTER1, tve_s.lumafilter1);
+	tve_writel(TV_LUMA_FILTER2, tve_s.lumafilter2);
+
+	if (mode == TVOUT_CVBS_NTSC) {
+		tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(1) |
+			v_Y_AGC_PULSE_ON(1) | v_Y_VIDEO_ON(1) |
+			v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
+		tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_NTSC) |
+			   v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
+		tve_writel(TV_SATURATION, 0x0052543C);
+		if (tve_s.test_mode)
+			tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00008300);
+		else
+			tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00007900);
+
+		tve_writel(TV_FREQ_SC,	0x21F07BD7);
+		tve_writel(TV_SYNC_TIMING, 0x00C07a81);
+		tve_writel(TV_ADJ_TIMING, 0x96B40000);
+		tve_writel(TV_ACT_ST,	0x001500D6);
+		tve_writel(TV_ACT_TIMING, 0x169800FC | (1 << 12) | (1 << 28));
+
+	} else if (mode == TVOUT_CVBS_PAL) {
+		tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(0) |
+			v_Y_AGC_PULSE_ON(0) | v_Y_VIDEO_ON(1) |
+			v_YPP_MODE(1) | v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
+		tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_PAL) |
+			v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
+
+		tve_writel(TV_SATURATION, tve_s.saturation);
+		tve_writel(TV_BRIGHTNESS_CONTRAST, tve_s.brightcontrast);
+
+		tve_writel(TV_FREQ_SC,	0x2A098ACB);
+		tve_writel(TV_SYNC_TIMING, 0x00C28381);
+		tve_writel(TV_ADJ_TIMING, (0xc << 28) | 0x06c00800 | 0x80);
+		tve_writel(TV_ACT_ST,	0x001500F6);
+		tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
+
+		tve_writel(TV_ADJ_TIMING, tve_s.adjtiming);
+		tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
+	}
+}
+
+static u8 rk_get_vdac_value(void)
+{
+	u8 value = 0;
+#ifdef CONFIG_ROCKCHIP_EFUSE
+#if defined(CONFIG_ROCKCHIP_RK322X)
+	struct udevice *dev;
+	u32 regs[2] = {0};
+	u8 fuses[1];
+	ofnode node;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_efuse), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return -EINVAL;
+	}
+
+	node = dev_read_subnode(dev, "tve_dac");
+	if (!ofnode_valid(node))
+		return -EINVAL;
+
+	ret = ofnode_read_u32_array(node, "reg", regs, 2);
+	if (ret) {
+		printf("Cannot get efuse reg\n");
+		return -EINVAL;
+	}
+
+	ret = misc_read(dev, regs[0], &fuses, regs[1]);
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	value = fuses[0];
+	value = (value >> 3) & 0x1f;
+#endif
+#endif /* CONFIG_RK_EFUSE */
+	if (value > 0)
+		value += 5;
+	TVEDBG("%s value = 0x%x\n", __func__, value);
+
+	return value;
+}
+
+static int rockchip_drm_tve_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	int node = 0;
+	int dac_value, getvdac;
+	fdt_addr_t addr;
+
+	conn_state->type = DRM_MODE_CONNECTOR_TV;
+	tve_s.grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (tve_s.grf <= 0) {
+		printf("%s:Get syscon grf failed (ret=%p)\n",
+		       __func__, tve_s.grf);
+		return -ENXIO;
+	}
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK3036;
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk3036-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk3036-tve\n");
+		goto err;
+	}
+#elif defined(CONFIG_ROCKCHIP_RK3128)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK312X;
+	tve_s.saturation = 0;
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk312x-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk312x-tve\n");
+		goto err;
+	}
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK322X;
+	tve_s.saturation = 0;
+
+	addr = dev_read_addr_index(conn_state->dev, 1);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	tve_s.vdacbase = (void *)addr;
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk3328-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk322x-tve\n");
+		goto err;
+	}
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	addr = dev_read_addr_index(conn_state->dev, 0);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	tve_s.reg_phy_base = (void *)addr;
+	tve_s.soctype = SOC_RK322XH;
+
+	addr = dev_read_addr_index(conn_state->dev, 1);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+	tve_s.vdacbase = (void *)addr;
+
+	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
+					     "rockchip,rk3328-tve");
+	if (node < 0) {
+		printf("can't find dts node for rk322xh-tve\n");
+		goto err;
+	}
+#endif
+
+	if (!fdt_device_is_available(gd->fdt_blob, node)) {
+		printf("tve is disabled\n");
+		goto err;
+	}
+
+	if (tve_s.soctype == SOC_RK312X)
+		tve_s.test_mode = fdtdec_get_int(gd->fdt_blob, node,
+						 "test_mode", 0);
+
+	tve_s.preferred_mode = fdtdec_get_int(gd->fdt_blob, node,
+					      "rockchip,tvemode", -1);
+	if (tve_s.preferred_mode < 0) {
+		tve_s.preferred_mode = 0;
+	} else if (tve_s.preferred_mode > 1) {
+		printf("tve mode value invalid\n");
+		goto err;
+	}
+
+	tve_s.saturation = fdtdec_get_int(gd->fdt_blob, node,
+					  "rockchip,saturation", 0);
+	if (tve_s.saturation == 0) {
+		printf("tve saturation err\n");
+		goto err;
+	}
+
+	tve_s.brightcontrast = fdtdec_get_int(gd->fdt_blob, node,
+					      "rockchip,brightcontrast", 0);
+	if (tve_s.brightcontrast == 0) {
+		printf("tve brightcontrast err\n");
+		goto err;
+	}
+
+	tve_s.adjtiming = fdtdec_get_int(gd->fdt_blob, node,
+					 "rockchip,adjtiming", 0);
+	if (tve_s.adjtiming == 0) {
+		printf("tve adjtiming err\n");
+		goto err;
+	}
+
+	tve_s.lumafilter0 = fdtdec_get_int(gd->fdt_blob, node,
+					   "rockchip,lumafilter0", 0);
+	if (tve_s.lumafilter0 == 0) {
+		printf("tve lumafilter0 err\n");
+		goto err;
+	}
+
+	tve_s.lumafilter1 = fdtdec_get_int(gd->fdt_blob, node,
+					   "rockchip,lumafilter1", 0);
+	if (tve_s.lumafilter1 == 0) {
+		printf("tve lumafilter1 err\n");
+		goto err;
+	}
+
+	tve_s.lumafilter2 = fdtdec_get_int(gd->fdt_blob, node,
+					   "rockchip,lumafilter2", 0);
+	if (tve_s.lumafilter2 == 0) {
+		printf("tve lumafilter2 err\n");
+		goto err;
+	}
+
+	dac_value = fdtdec_get_int(gd->fdt_blob, node, "rockchip,daclevel", 0);
+	if (dac_value == 0) {
+		printf("tve dac_value err\n");
+		goto err;
+	}
+
+	tve_s.daclevel = dac_value;
+	if (tve_s.soctype == SOC_RK322X) {
+		getvdac = rk_get_vdac_value();
+		if (getvdac > 0) {
+			tve_s.daclevel =
+				dac_value + getvdac - RK322X_VDAC_STANDARD;
+			if (tve_s.daclevel > 0x3f ||
+			    tve_s.daclevel < 0) {
+				printf("rk322x daclevel error!\n");
+				tve_s.daclevel = dac_value;
+			}
+		} else if (getvdac < 0) {
+			printf("get rk322x daclevel error\n");
+			goto err;
+		}
+	}
+
+	if (tve_s.soctype == SOC_RK322X ||
+	    tve_s.soctype == SOC_RK322XH) {
+		tve_s.dac1level = fdtdec_get_int(gd->fdt_blob, node,
+						 "rockchip,dac1level", 0);
+		if (tve_s.dac1level == 0) {
+			printf("rk322x dac1level error!\n");
+			goto err;
+		}
+	}
+	TVEDBG("tve_s.test_mode = 0x%x\n", tve_s.test_mode);
+	TVEDBG("tve_s.saturation = 0x%x\n", tve_s.saturation);
+	TVEDBG("tve_s.brightcontrast = 0x%x\n", tve_s.brightcontrast);
+	TVEDBG("tve_s.adjtiming = 0x%x\n", tve_s.adjtiming);
+	TVEDBG("tve_s.lumafilter0 = 0x%x\n", tve_s.lumafilter0);
+	TVEDBG("tve_s.lumafilter1 = 0x%x\n", tve_s.lumafilter1);
+	TVEDBG("tve_s.lumafilter2 = 0x%x\n", tve_s.lumafilter2);
+	TVEDBG("tve_s.daclevel = 0x%x\n", tve_s.daclevel);
+
+	return 0;
+
+err:
+	dac_enable(0);
+	return -ENODEV;
+}
+
+static int rockchip_drm_tve_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	int tve_type;
+
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+	/* set inno hdmi phy clk. */
+	rockchip_phy_set_pll(state, 27000000);
+#endif
+	if (mode->vdisplay == 576)
+		tve_type = TVOUT_CVBS_PAL;
+	else
+		tve_type = TVOUT_CVBS_NTSC;
+	dac_enable(0);
+	tve_set_mode(tve_type);
+	dac_enable(1);
+
+	return 0;
+}
+
+static void rockchip_drm_tve_deinit(struct display_state *state)
+{
+	dac_enable(0);
+}
+
+static int rockchip_drm_tve_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int rockchip_drm_tve_disable(struct display_state *state)
+{
+	dac_enable(0);
+	return 0;
+}
+
+static int rockchip_drm_tve_detect(struct display_state *state)
+{
+	return 1;
+}
+
+static void drm_tve_selete_output(struct overscan *overscan,
+				  struct drm_display_mode *mode)
+{
+	int ret, i, screen_size;
+	struct base_screen_info *screen_info = NULL;
+	struct base_disp_info base_parameter;
+	struct drm_display_mode modes[2];
+	const struct base_overscan *scan;
+	char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	int max_scan = 100;
+	int min_scan = 50;
+
+	overscan->left_margin = max_scan;
+	overscan->right_margin = max_scan;
+	overscan->top_margin = max_scan;
+	overscan->bottom_margin = max_scan;
+
+	for (i = 0; i < 2; i++) {
+		modes[i] = tve_modes[i];
+		if (i == tve_s.preferred_mode)
+			modes[i].type |= DRM_MODE_TYPE_PREFERRED;
+	}
+	*mode = modes[tve_s.preferred_mode];
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return;
+	}
+
+	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
+		printf("Could not find baseparameter partition\n");
+		return;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, 1,
+			(void *)baseparameter_buf);
+	if (ret < 0) {
+		printf("read baseparameter failed\n");
+		return;
+	}
+
+	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
+	scan = &base_parameter.scan;
+
+	screen_size = sizeof(base_parameter.screen_list) /
+		sizeof(base_parameter.screen_list[0]);
+
+	for (i = 0; i < screen_size; i++) {
+		if (base_parameter.screen_list[i].type ==
+		    DRM_MODE_CONNECTOR_TV) {
+			screen_info = &base_parameter.screen_list[i];
+			break;
+		}
+	}
+
+	if (scan->leftscale < min_scan && scan->leftscale > 0)
+		overscan->left_margin = min_scan;
+	else if (scan->leftscale < max_scan)
+		overscan->left_margin = scan->leftscale;
+
+	if (scan->rightscale < min_scan && scan->rightscale > 0)
+		overscan->right_margin = min_scan;
+	else if (scan->rightscale < max_scan)
+		overscan->right_margin = scan->rightscale;
+
+	if (scan->topscale < min_scan && scan->topscale > 0)
+		overscan->top_margin = min_scan;
+	else if (scan->topscale < max_scan)
+		overscan->top_margin = scan->topscale;
+
+	if (scan->bottomscale < min_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = min_scan;
+	else if (scan->bottomscale < max_scan)
+		overscan->bottom_margin = scan->bottomscale;
+
+	if (screen_info &&
+	    (screen_info->mode.hdisplay == 720 &&
+	    screen_info->mode.vdisplay == 576 &&
+	    screen_info->mode.hsync_start == 753 &&
+	    screen_info->mode.hsync_end == 816))
+		*mode = modes[0];
+	else if (screen_info &&
+		 screen_info->mode.vdisplay == 480 &&
+		 screen_info->mode.vsync_start == 480 &&
+		 screen_info->mode.vsync_end == 486)
+		*mode = modes[1];
+
+	if (screen_info)
+		printf("base_parameter.mode:%dx%d\n",
+		       screen_info->mode.hdisplay,
+		       screen_info->mode.vdisplay);
+}
+
+static int rockchip_drm_tve_get_timing(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+	drm_tve_selete_output(&conn_state->overscan, mode);
+
+	return 0;
+}
+
+static int rockchip_drm_tve_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_drm_tve_funcs = {
+	.init = rockchip_drm_tve_init,
+	.deinit = rockchip_drm_tve_deinit,
+	.prepare = rockchip_drm_tve_prepare,
+	.enable = rockchip_drm_tve_enable,
+	.disable = rockchip_drm_tve_disable,
+	.get_timing = rockchip_drm_tve_get_timing,
+	.detect = rockchip_drm_tve_detect,
+};
+
+static const struct rockchip_connector rk3328_drm_tve_data = {
+	.funcs = &rockchip_drm_tve_funcs,
+};
+
+static const struct udevice_id rockchip_drm_tve_ids[] = {
+	{
+	 .compatible = "rockchip,rk3328-tve",
+	 .data = (ulong)&rk3328_drm_tve_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_drm_tve) = {
+	.name = "rockchip_drm_tve",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_drm_tve_ids,
+	.probe	= rockchip_drm_tve_probe,
+};
diff --git a/drivers/video/drm/rockchip_drm_tve.h b/drivers/video/drm/rockchip_drm_tve.h
new file mode 100644
index 0000000000..2d504a6e8c
--- /dev/null
+++ b/drivers/video/drm/rockchip_drm_tve.h
@@ -0,0 +1,153 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#ifndef __ROCKCHIP_DRM_TVE_H__
+#define __ROCKCHIP_DRM_TVE_H__
+
+#include <lcd.h>
+
+#define TV_CTRL			(0x00)
+	#define m_CVBS_MODE			BIT(24)
+	#define m_CLK_UPSTREAM_EN		(3 << 18)
+	#define m_TIMING_EN			(3 << 16)
+	#define m_LUMA_FILTER_GAIN		(3 << 9)
+	#define m_LUMA_FILTER_BW		BIT(8)
+	#define m_CSC_PATH			(3 << 1)
+
+	#define v_CVBS_MODE(x)			((x & 1) << 24)
+	#define v_CLK_UPSTREAM_EN(x)		((x & 3) << 18)
+	#define v_TIMING_EN(x)			((x & 3) << 16)
+	#define v_LUMA_FILTER_GAIN(x)		((x & 3) << 9)
+	#define v_LUMA_FILTER_UPSAMPLE(x)	((x & 1) << 8)
+	#define v_CSC_PATH(x)			((x & 3) << 1)
+
+#define TV_SYNC_TIMING		(0x04)
+#define TV_ACT_TIMING		(0x08)
+#define TV_ADJ_TIMING		(0x0c)
+#define TV_FREQ_SC		(0x10)
+#define TV_LUMA_FILTER0		(0x14)
+#define TV_LUMA_FILTER1		(0x18)
+#define TV_LUMA_FILTER2		(0x1C)
+#define TV_ACT_ST		(0x34)
+#define TV_ROUTING		(0x38)
+	#define m_DAC_SENSE_EN		BIT(27)
+	#define m_Y_IRE_7_5		BIT(19)
+	#define m_Y_AGC_PULSE_ON	BIT(15)
+	#define m_Y_VIDEO_ON		BIT(11)
+	#define m_Y_SYNC_ON		BIT(7)
+	#define m_YPP_MODE		BIT(3)
+	#define m_MONO_EN		BIT(2)
+	#define m_PIC_MODE		BIT(1)
+
+	#define v_DAC_SENSE_EN(x)	((x & 1) << 27)
+	#define v_Y_IRE_7_5(x)		((x & 1) << 19)
+	#define v_Y_AGC_PULSE_ON(x)	((x & 1) << 15)
+	#define v_Y_VIDEO_ON(x)		((x & 1) << 11)
+	#define v_Y_SYNC_ON(x)		((x & 1) << 7)
+	#define v_YPP_MODE(x)		((x & 1) << 3)
+	#define v_MONO_EN(x)		((x & 1) << 2)
+	#define v_PIC_MODE(x)		((x & 1) << 1)
+
+#define TV_SYNC_ADJUST		(0x50)
+#define TV_STATUS		(0x54)
+#define TV_RESET		(0x68)
+	#define m_RESET			BIT(1)
+	#define v_RESET(x)		((x & 1) << 1)
+#define TV_SATURATION		(0x78)
+#define TV_BW_CTRL		(0x8C)
+	#define m_CHROMA_BW	(3 << 4)
+	#define m_COLOR_DIFF_BW	(0xf)
+
+	enum {
+		BP_FILTER_PASS = 0,
+		BP_FILTER_NTSC,
+		BP_FILTER_PAL,
+	};
+	enum {
+		COLOR_DIFF_FILTER_OFF = 0,
+		COLOR_DIFF_FILTER_BW_0_6,
+		COLOR_DIFF_FILTER_BW_1_3,
+		COLOR_DIFF_FILTER_BW_2_0
+	};
+
+	#define v_CHROMA_BW(x)		((3 & x) << 4)
+	#define v_COLOR_DIFF_BW(x)	(0xF & x)
+
+#define TV_BRIGHTNESS_CONTRAST	(0x90)
+
+#define m_EXTREF_EN		BIT(0)
+#define m_VBG_EN		BIT(1)
+#define m_DAC_EN		BIT(2)
+#define m_SENSE_EN		BIT(3)
+#define m_BIAS_EN		(7 << 4)
+#define m_DAC_GAIN		(0x3f << 7)
+#define v_DAC_GAIN(x)		((x & 0x3f) << 7)
+
+#define VDAC_VDAC0             (0x00)
+       #define m_RST_ANA               BIT(7)
+       #define m_RST_DIG               BIT(6)
+
+       #define v_RST_ANA(x)            ((x & 1) << 7)
+       #define v_RST_DIG(x)            ((x & 1) << 6)
+#define VDAC_VDAC1             (0x280)
+       #define m_CUR_REG               (0xf << 4)
+       #define m_DR_PWR_DOWN           BIT(1)
+       #define m_BG_PWR_DOWN           BIT(0)
+
+       #define v_CUR_REG(x)            ((x & 0xf) << 4)
+       #define v_DR_PWR_DOWN(x)        ((x & 1) << 1)
+       #define v_BG_PWR_DOWN(x)        ((x & 1) << 0)
+#define VDAC_VDAC2             (0x284)
+       #define m_CUR_CTR               (0X3f)
+
+       #define v_CUR_CTR(x)            ((x & 0X3f))
+#define VDAC_VDAC3             (0x288)
+       #define m_CAB_EN                BIT(5)
+       #define m_CAB_REF               BIT(4)
+       #define m_CAB_FLAG              BIT(0)
+
+       #define v_CAB_EN(x)             ((x & 1) << 5)
+       #define v_CAB_REF(x)            ((x & 1) << 4)
+       #define v_CAB_FLAG(x)           ((x & 1) << 0)
+
+enum {
+	TVOUT_CVBS_NTSC = 0,
+	TVOUT_CVBS_PAL,
+};
+
+enum {
+	SOC_RK3036 = 0,
+	SOC_RK312X,
+	SOC_RK322X,
+	SOC_RK322XH
+};
+
+struct drm_tve {
+	void    *reg_phy_base;
+	int	soctype;
+	int	test_mode;
+	int	saturation;
+	void    *vdacbase;
+	int	brightcontrast;
+	int	adjtiming;
+	int	lumafilter0;
+	int	lumafilter1;
+	int	lumafilter2;
+	int	daclevel;
+	int	dac1level;
+	int	preferred_mode;
+	void    *grf;
+};
+
+#define RK30_TVE_REGBASE 0x10118000 + 0x200
+#define MAX_TVE_COUNT  2
+
+#ifdef TVEDEBUG
+#define TVEDBG(format, ...) \
+		printf("TVE: " format, ## __VA_ARGS__)
+#else
+#define TVEDBG(format, ...)
+#endif
+
+#endif /* __ROCKCHIP_DRM_TVE_H__*/

commit 8e2bab3fc592f2c222a220d894a033e964c97a7a
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Fri Jul 13 09:09:39 2018 +0800

    drm: Transplant dw-hdmi code from rkdevelop
    
    1.Updating edid parse method.
    2.New hdmi i2c control method.
    3.Adding mode filter.
    4.Adding color select method.
    5.Support hdmi 2.0.
    6.Adding baseparameter reading.
    7.Support HDCP 1.4.
    
    Tested in rk3399/rk3229/rk3128h/rk3328.
    
    Change-Id: I2b3b1fb0079e97ba4b737781356e920548d6ad75
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 517ac0b252..02b42c1941 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -73,6 +73,7 @@
 struct detailed_mode_closure {
 	struct edid *edid;
 	struct hdmi_edid_data *data;
+	bool preferred;
 	u32 quirks;
 	int modes;
 };
@@ -155,562 +156,562 @@ static const struct drm_display_mode edid_cea_modes[] = {
 	/* 0 - dummy, VICs start at 1 */
 	{ },
 	/* 1 - 640x480@60Hz */
-	{ DRM_MODE(25175, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 		   752, 800, 480, 490, 492, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 2 - 720x480@60Hz */
-	{ DRM_MODE(27000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 3 - 720x480@60Hz */
-	{ DRM_MODE(27000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 4 - 1280x720@60Hz */
-	{ DRM_MODE(74250, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 5 - 1920x1080i@60Hz */
-	{ DRM_MODE(74250, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 6 - 720(1440)x480i@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 7 - 720(1440)x480i@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 8 - 720(1440)x240@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 9 - 720(1440)x240@60Hz */
-	{ DRM_MODE(13500, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 10 - 2880x480i@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 11 - 2880x480i@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 12 - 2880x240@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 13 - 2880x240@60Hz */
-	{ DRM_MODE(54000, 2880, 2956,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 		   3204, 3432, 240, 244, 247, 262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 14 - 1440x480@60Hz */
-	{ DRM_MODE(54000, 1440, 1472,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
 		   1596, 1716, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 15 - 1440x480@60Hz */
-	{ DRM_MODE(54000, 1440, 1472,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
 		   1596, 1716, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 16 - 1920x1080@60Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 17 - 720x576@50Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 18 - 720x576@50Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 19 - 1280x720@50Hz */
-	{ DRM_MODE(74250, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 20 - 1920x1080i@50Hz */
-	{ DRM_MODE(74250, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 21 - 720(1440)x576i@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 22 - 720(1440)x576i@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 23 - 720(1440)x288@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 24 - 720(1440)x288@50Hz */
-	{ DRM_MODE(13500, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 25 - 2880x576i@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 26 - 2880x576i@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 27 - 2880x288@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 28 - 2880x288@50Hz */
-	{ DRM_MODE(54000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 		   3180, 3456, 288, 290, 293, 312, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 29 - 1440x576@50Hz */
-	{ DRM_MODE(54000, 1440, 1464,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
 		   1592, 1728, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 30 - 1440x576@50Hz */
-	{ DRM_MODE(54000, 1440, 1464,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
 		   1592, 1728, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 31 - 1920x1080@50Hz */
-	{ DRM_MODE(148500, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 32 - 1920x1080@24Hz */
-	{ DRM_MODE(74250, 1920, 2558,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
 		   2602, 2750, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 33 - 1920x1080@25Hz */
-	{ DRM_MODE(74250, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 34 - 1920x1080@30Hz */
-	{ DRM_MODE(74250, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 35 - 2880x480@60Hz */
-	{ DRM_MODE(108000, 2880, 2944,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
 		   3192, 3432, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 36 - 2880x480@60Hz */
-	{ DRM_MODE(108000, 2880, 2944,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
 		   3192, 3432, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 37 - 2880x576@50Hz */
-	{ DRM_MODE(108000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
 		   3184, 3456, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 38 - 2880x576@50Hz */
-	{ DRM_MODE(108000, 2880, 2928,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
 		   3184, 3456, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 39 - 1920x1080i@50Hz */
-	{ DRM_MODE(72000, 1920, 1952,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
 		   2120, 2304, 1080, 1126, 1136, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 40 - 1920x1080i@100Hz */
-	{ DRM_MODE(148500, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 41 - 1280x720@100Hz */
-	{ DRM_MODE(148500, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 42 - 720x576@100Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 43 - 720x576@100Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 44 - 720(1440)x576i@100Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 45 - 720(1440)x576i@100Hz */
-	{ DRM_MODE(27000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 46 - 1920x1080i@120Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1094, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 			DRM_MODE_FLAG_INTERLACE),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 47 - 1280x720@120Hz */
-	{ DRM_MODE(148500, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 48 - 720x480@120Hz */
-	{ DRM_MODE(54000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 49 - 720x480@120Hz */
-	{ DRM_MODE(54000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 50 - 720(1440)x480i@120Hz */
-	{ DRM_MODE(27000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 51 - 720(1440)x480i@120Hz */
-	{ DRM_MODE(27000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 52 - 720x576@200Hz */
-	{ DRM_MODE(108000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 53 - 720x576@200Hz */
-	{ DRM_MODE(108000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
 		   796, 864, 576, 581, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 54 - 720(1440)x576i@200Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 55 - 720(1440)x576i@200Hz */
-	{ DRM_MODE(54000, 720, 732,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 		   795, 864, 576, 580, 586, 625, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 56 - 720x480@240Hz */
-	{ DRM_MODE(108000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 57 - 720x480@240Hz */
-	{ DRM_MODE(108000, 720, 736,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
 		   798, 858, 480, 489, 495, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 58 - 720(1440)x480i@240 */
-	{ DRM_MODE(54000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 	/* 59 - 720(1440)x480i@240 */
-	{ DRM_MODE(54000, 720, 739,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
 		   801, 858, 480, 488, 494, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 60 - 1280x720@24Hz */
-	{ DRM_MODE(59400, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 61 - 1280x720@25Hz */
-	{ DRM_MODE(74250, 1280, 3700,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
 		   3740, 3960, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 62 - 1280x720@30Hz */
-	{ DRM_MODE(74250, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 63 - 1920x1080@120Hz */
-	{ DRM_MODE(297000, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 64 - 1920x1080@100Hz */
-	{ DRM_MODE(297000, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 65 - 1280x720@24Hz */
-	{ DRM_MODE(59400, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 66 - 1280x720@25Hz */
-	{ DRM_MODE(74250, 1280, 3700,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
 		   3740, 3960, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 67 - 1280x720@30Hz */
-	{ DRM_MODE(74250, 1280, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
 		   3080, 3300, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 68 - 1280x720@50Hz */
-	{ DRM_MODE(74250, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 69 - 1280x720@60Hz */
-	{ DRM_MODE(74250, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 70 - 1280x720@100Hz */
-	{ DRM_MODE(148500, 1280, 1720,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
 		   1760, 1980, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 71 - 1280x720@120Hz */
-	{ DRM_MODE(148500, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 72 - 1920x1080@24Hz */
-	{ DRM_MODE(74250, 1920, 2558,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
 		   2602, 2750, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 73 - 1920x1080@25Hz */
-	{ DRM_MODE(74250, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 74 - 1920x1080@30Hz */
-	{ DRM_MODE(74250, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 75 - 1920x1080@50Hz */
-	{ DRM_MODE(148500, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 76 - 1920x1080@60Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 77 - 1920x1080@100Hz */
-	{ DRM_MODE(297000, 1920, 2448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
 		   2492, 2640, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 78 - 1920x1080@120Hz */
-	{ DRM_MODE(297000, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 79 - 1680x720@24Hz */
-	{ DRM_MODE(59400, 1680, 3040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040,
 		3080, 3300, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 80 - 1680x720@25Hz */
-	{ DRM_MODE(59400, 1680, 2908,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908,
 		2948, 3168, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 81 - 1680x720@30Hz */
-	{ DRM_MODE(59400, 1680, 2380,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380,
 		2420, 2640, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 82 - 1680x720@50Hz */
-	{ DRM_MODE(82500, 1680, 1940,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940,
 		1980, 2200, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 83 - 1680x720@60Hz */
-	{ DRM_MODE(99000, 1680, 1940,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940,
 		1980, 2200, 720, 725, 730, 750, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 84 - 1680x720@100Hz */
-	{ DRM_MODE(165000, 1680, 1740,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740,
 		1780, 2000, 720, 725, 730, 825, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 85 - 1680x720@120Hz */
-	{ DRM_MODE(198000, 1680, 1740,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740,
 		1780, 2000, 720, 725, 730, 825, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 86 - 2560x1080@24Hz */
-	{ DRM_MODE(99000, 2560, 3558,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558,
 		3602, 3750, 1080, 1084, 1089, 1100, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 87 - 2560x1080@25Hz */
-	{ DRM_MODE(90000, 2560, 3008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008,
 		3052, 3200, 1080, 1084, 1089, 1125, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 88 - 2560x1080@30Hz */
-	{ DRM_MODE(118800, 2560, 3328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328,
 		3372, 3520, 1080, 1084, 1089, 1125, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 89 - 2560x1080@50Hz */
-	{ DRM_MODE(185625, 2560, 3108,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108,
 		3152, 3300, 1080, 1084, 1089, 1125, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 90 - 2560x1080@60Hz */
-	{ DRM_MODE(198000, 2560, 2808,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808,
 		2852, 3000, 1080, 1084, 1089, 1100, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 91 - 2560x1080@100Hz */
-	{ DRM_MODE(371250, 2560, 2778,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778,
 		2822, 2970, 1080, 1084, 1089, 1250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 92 - 2560x1080@120Hz */
-	{ DRM_MODE(495000, 2560, 3108,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108,
 		3152, 3300, 1080, 1084, 1089, 1250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 93 - 3840x2160p@24Hz 16:9 */
-	{ DRM_MODE(297000, 3840, 5116,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
 		5204, 5500, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 94 - 3840x2160p@25Hz 16:9 */
-	{ DRM_MODE(297000, 3840, 4896,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
 		4984, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 95 - 3840x2160p@30Hz 16:9 */
-	{ DRM_MODE(297000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 96 - 3840x2160p@50Hz 16:9 */
-	{ DRM_MODE(594000, 3840, 4896,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
 		4984, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 97 - 3840x2160p@60Hz 16:9 */
-	{ DRM_MODE(594000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 	/* 98 - 4096x2160p@24Hz 256:135 */
-	{ DRM_MODE(297000, 4096, 5116,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
 		5204, 5500, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 99 - 4096x2160p@25Hz 256:135 */
-	{ DRM_MODE(297000, 4096, 5064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
 		5152, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 100 - 4096x2160p@30Hz 256:135 */
-	{ DRM_MODE(297000, 4096, 4184,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
 		4272, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 101 - 4096x2160p@50Hz 256:135 */
-	{ DRM_MODE(594000, 4096, 5064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
 		5152, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 102 - 4096x2160p@60Hz 256:135 */
-	{ DRM_MODE(594000, 4096, 4184,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
 		4272, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
 	/* 103 - 3840x2160p@24Hz 64:27 */
-	{ DRM_MODE(297000, 3840, 5116,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
 		5204, 5500, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 104 - 3840x2160p@25Hz 64:27 */
-	{ DRM_MODE(297000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 105 - 3840x2160p@30Hz 64:27 */
-	{ DRM_MODE(297000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 106 - 3840x2160p@50Hz 64:27 */
-	{ DRM_MODE(594000, 3840, 4896,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
 		4984, 5280, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
 	/* 107 - 3840x2160p@60Hz 64:27 */
-	{ DRM_MODE(594000, 3840, 4016,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
 		4104, 4400, 2160, 2168, 2178, 2250, 0,
 		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
@@ -723,25 +724,25 @@ static const struct drm_display_mode edid_4k_modes[] = {
 	/* 0 - dummy, VICs start at 1 */
 	{ },
 	/* 1 - 3840x2160@30Hz */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   3840, 4016, 4104, 4400,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 30, },
 	/* 2 - 3840x2160@25Hz */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   3840, 4896, 4984, 5280,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 25, },
 	/* 3 - 3840x2160@24Hz */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   3840, 5116, 5204, 5500,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 	  .vrefresh = 24, },
 	/* 4 - 4096x2160@24Hz (SMPTE) */
-	{ DRM_MODE(297000,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000,
 		   4096, 5116, 5204, 5500,
 		   2160, 2168, 2178, 2250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
@@ -754,356 +755,356 @@ static const struct drm_display_mode edid_4k_modes[] = {
  */
 static const struct drm_display_mode drm_dmt_modes[] = {
 	/* 0x01 - 640x350@85Hz */
-	{ DRM_MODE(31500, 640, 672,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
 		   736, 832, 350, 382, 385, 445, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x02 - 640x400@85Hz */
-	{ DRM_MODE(31500, 640, 672,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
 		   736, 832, 400, 401, 404, 445, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x03 - 720x400@85Hz */
-	{ DRM_MODE(35500, 720, 756,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
 		   828, 936, 400, 401, 404, 446, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x04 - 640x480@60Hz */
-	{ DRM_MODE(25175, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 		   752, 800, 480, 490, 492, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x05 - 640x480@72Hz */
-	{ DRM_MODE(31500, 640, 664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
 		   704, 832, 480, 489, 492, 520, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x06 - 640x480@75Hz */
-	{ DRM_MODE(31500, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
 		   720, 840, 480, 481, 484, 500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x07 - 640x480@85Hz */
-	{ DRM_MODE(36000, 640, 696,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
 		   752, 832, 480, 481, 484, 509, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x08 - 800x600@56Hz */
-	{ DRM_MODE(36000, 800, 824,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
 		   896, 1024, 600, 601, 603, 625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x09 - 800x600@60Hz */
-	{ DRM_MODE(40000, 800, 840,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
 		   968, 1056, 600, 601, 605, 628, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0a - 800x600@72Hz */
-	{ DRM_MODE(50000, 800, 856,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
 		   976, 1040, 600, 637, 643, 666, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0b - 800x600@75Hz */
-	{ DRM_MODE(49500, 800, 816,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
 		   896, 1056, 600, 601, 604, 625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0c - 800x600@85Hz */
-	{ DRM_MODE(56250, 800, 832,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
 		   896, 1048, 600, 601, 604, 631, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0d - 800x600@120Hz RB */
-	{ DRM_MODE(73250, 800, 848,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
 		   880, 960, 600, 603, 607, 636, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x0e - 848x480@60Hz */
-	{ DRM_MODE(33750, 848, 864,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
 		   976, 1088, 480, 486, 494, 517, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x0f - 1024x768@43Hz, interlace */
-	{ DRM_MODE(44900, 1024, 1032,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
 		   1208, 1264, 768, 768, 772, 817, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 		   DRM_MODE_FLAG_INTERLACE) },
 	/* 0x10 - 1024x768@60Hz */
-	{ DRM_MODE(65000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
 		   1184, 1344, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x11 - 1024x768@70Hz */
-	{ DRM_MODE(75000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
 		   1184, 1328, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x12 - 1024x768@75Hz */
-	{ DRM_MODE(78750, 1024, 1040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
 		   1136, 1312, 768, 769, 772, 800, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x13 - 1024x768@85Hz */
-	{ DRM_MODE(94500, 1024, 1072,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
 		   1168, 1376, 768, 769, 772, 808, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x14 - 1024x768@120Hz RB */
-	{ DRM_MODE(115500, 1024, 1072,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
 		   1104, 1184, 768, 771, 775, 813, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x15 - 1152x864@75Hz */
-	{ DRM_MODE(108000, 1152, 1216,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
 		   1344, 1600, 864, 865, 868, 900, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x55 - 1280x720@60Hz */
-	{ DRM_MODE(74250, 1280, 1390,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 		   1430, 1650, 720, 725, 730, 750, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x16 - 1280x768@60Hz RB */
-	{ DRM_MODE(68250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
 		   1360, 1440, 768, 771, 778, 790, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x17 - 1280x768@60Hz */
-	{ DRM_MODE(79500, 1280, 1344,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
 		   1472, 1664, 768, 771, 778, 798, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x18 - 1280x768@75Hz */
-	{ DRM_MODE(102250, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
 		   1488, 1696, 768, 771, 778, 805, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x19 - 1280x768@85Hz */
-	{ DRM_MODE(117500, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
 		   1496, 1712, 768, 771, 778, 809, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1a - 1280x768@120Hz RB */
-	{ DRM_MODE(140250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
 		   1360, 1440, 768, 771, 778, 813, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x1b - 1280x800@60Hz RB */
-	{ DRM_MODE(71000, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
 		   1360, 1440, 800, 803, 809, 823, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x1c - 1280x800@60Hz */
-	{ DRM_MODE(83500, 1280, 1352,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
 		   1480, 1680, 800, 803, 809, 831, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1d - 1280x800@75Hz */
-	{ DRM_MODE(106500, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
 		   1488, 1696, 800, 803, 809, 838, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1e - 1280x800@85Hz */
-	{ DRM_MODE(122500, 1280, 1360,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
 		   1496, 1712, 800, 803, 809, 843, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x1f - 1280x800@120Hz RB */
-	{ DRM_MODE(146250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
 		   1360, 1440, 800, 803, 809, 847, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x20 - 1280x960@60Hz */
-	{ DRM_MODE(108000, 1280, 1376,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
 		   1488, 1800, 960, 961, 964, 1000, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x21 - 1280x960@85Hz */
-	{ DRM_MODE(148500, 1280, 1344,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
 		   1504, 1728, 960, 961, 964, 1011, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x22 - 1280x960@120Hz RB */
-	{ DRM_MODE(175500, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
 		   1360, 1440, 960, 963, 967, 1017, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x23 - 1280x1024@60Hz */
-	{ DRM_MODE(108000, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
 		   1440, 1688, 1024, 1025, 1028, 1066, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x24 - 1280x1024@75Hz */
-	{ DRM_MODE(135000, 1280, 1296,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
 		   1440, 1688, 1024, 1025, 1028, 1066, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x25 - 1280x1024@85Hz */
-	{ DRM_MODE(157500, 1280, 1344,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
 		   1504, 1728, 1024, 1025, 1028, 1072, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x26 - 1280x1024@120Hz RB */
-	{ DRM_MODE(187250, 1280, 1328,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
 		   1360, 1440, 1024, 1027, 1034, 1084, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x27 - 1360x768@60Hz */
-	{ DRM_MODE(85500, 1360, 1424,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
 		   1536, 1792, 768, 771, 777, 795, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x28 - 1360x768@120Hz RB */
-	{ DRM_MODE(148250, 1360, 1408,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
 		   1440, 1520, 768, 771, 776, 813, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x51 - 1366x768@60Hz */
-	{ DRM_MODE(85500, 1366, 1436,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
 		   1579, 1792, 768, 771, 774, 798, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x56 - 1366x768@60Hz */
-	{ DRM_MODE(72000, 1366, 1380,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
 		   1436, 1500, 768, 769, 772, 800, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x29 - 1400x1050@60Hz RB */
-	{ DRM_MODE(101000, 1400, 1448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
 		   1480, 1560, 1050, 1053, 1057, 1080, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x2a - 1400x1050@60Hz */
-	{ DRM_MODE(121750, 1400, 1488,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
 		   1632, 1864, 1050, 1053, 1057, 1089, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x2b - 1400x1050@75Hz */
-	{ DRM_MODE(156000, 1400, 1504,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
 		   1648, 1896, 1050, 1053, 1057, 1099, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x2c - 1400x1050@85Hz */
-	{ DRM_MODE(179500, 1400, 1504,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
 		   1656, 1912, 1050, 1053, 1057, 1105, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x2d - 1400x1050@120Hz RB */
-	{ DRM_MODE(208000, 1400, 1448,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
 		   1480, 1560, 1050, 1053, 1057, 1112, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x2e - 1440x900@60Hz RB */
-	{ DRM_MODE(88750, 1440, 1488,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
 		   1520, 1600, 900, 903, 909, 926, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x2f - 1440x900@60Hz */
-	{ DRM_MODE(106500, 1440, 1520,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
 		   1672, 1904, 900, 903, 909, 934, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x30 - 1440x900@75Hz */
-	{ DRM_MODE(136750, 1440, 1536,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
 		   1688, 1936, 900, 903, 909, 942, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x31 - 1440x900@85Hz */
-	{ DRM_MODE(157000, 1440, 1544,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
 		   1696, 1952, 900, 903, 909, 948, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x32 - 1440x900@120Hz RB */
-	{ DRM_MODE(182750, 1440, 1488,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
 		   1520, 1600, 900, 903, 909, 953, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x53 - 1600x900@60Hz */
-	{ DRM_MODE(108000, 1600, 1624,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
 		   1704, 1800, 900, 901, 904, 1000, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x33 - 1600x1200@60Hz */
-	{ DRM_MODE(162000, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x34 - 1600x1200@65Hz */
-	{ DRM_MODE(175500, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x35 - 1600x1200@70Hz */
-	{ DRM_MODE(189000, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x36 - 1600x1200@75Hz */
-	{ DRM_MODE(202500, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x37 - 1600x1200@85Hz */
-	{ DRM_MODE(229500, 1600, 1664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
 		   1856, 2160, 1200, 1201, 1204, 1250, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x38 - 1600x1200@120Hz RB */
-	{ DRM_MODE(268250, 1600, 1648,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
 		   1680, 1760, 1200, 1203, 1207, 1271, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x39 - 1680x1050@60Hz RB */
-	{ DRM_MODE(119000, 1680, 1728,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
 		   1760, 1840, 1050, 1053, 1059, 1080, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x3a - 1680x1050@60Hz */
-	{ DRM_MODE(146250, 1680, 1784,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
 		   1960, 2240, 1050, 1053, 1059, 1089, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3b - 1680x1050@75Hz */
-	{ DRM_MODE(187000, 1680, 1800,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
 		   1976, 2272, 1050, 1053, 1059, 1099, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3c - 1680x1050@85Hz */
-	{ DRM_MODE(214750, 1680, 1808,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
 		   1984, 2288, 1050, 1053, 1059, 1105, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3d - 1680x1050@120Hz RB */
-	{ DRM_MODE(245500, 1680, 1728,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
 		   1760, 1840, 1050, 1053, 1059, 1112, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x3e - 1792x1344@60Hz */
-	{ DRM_MODE(204750, 1792, 1920,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
 		   2120, 2448, 1344, 1345, 1348, 1394, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x3f - 1792x1344@75Hz */
-	{ DRM_MODE(261000, 1792, 1888,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
 		   2104, 2456, 1344, 1345, 1348, 1417, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x40 - 1792x1344@120Hz RB */
-	{ DRM_MODE(333250, 1792, 1840,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
 		   1872, 1952, 1344, 1347, 1351, 1423, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x41 - 1856x1392@60Hz */
-	{ DRM_MODE(218250, 1856, 1952,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
 		   2176, 2528, 1392, 1393, 1396, 1439, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x42 - 1856x1392@75Hz */
-	{ DRM_MODE(288000, 1856, 1984,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
 		   2208, 2560, 1392, 1393, 1396, 1500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x43 - 1856x1392@120Hz RB */
-	{ DRM_MODE(356500, 1856, 1904,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
 		   1936, 2016, 1392, 1395, 1399, 1474, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x52 - 1920x1080@60Hz */
-	{ DRM_MODE(148500, 1920, 2008,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 		   2052, 2200, 1080, 1084, 1089, 1125, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x44 - 1920x1200@60Hz RB */
-	{ DRM_MODE(154000, 1920, 1968,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
 		   2000, 2080, 1200, 1203, 1209, 1235, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x45 - 1920x1200@60Hz */
-	{ DRM_MODE(193250, 1920, 2056,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
 		   2256, 2592, 1200, 1203, 1209, 1245, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x46 - 1920x1200@75Hz */
-	{ DRM_MODE(245250, 1920, 2056,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
 		   2264, 2608, 1200, 1203, 1209, 1255, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x47 - 1920x1200@85Hz */
-	{ DRM_MODE(281250, 1920, 2064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
 		   2272, 2624, 1200, 1203, 1209, 1262, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x48 - 1920x1200@120Hz RB */
-	{ DRM_MODE(317000, 1920, 1968,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
 		   2000, 2080, 1200, 1203, 1209, 1271, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x49 - 1920x1440@60Hz */
-	{ DRM_MODE(234000, 1920, 2048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
 		   2256, 2600, 1440, 1441, 1444, 1500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4a - 1920x1440@75Hz */
-	{ DRM_MODE(297000, 1920, 2064,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
 		   2288, 2640, 1440, 1441, 1444, 1500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4b - 1920x1440@120Hz RB */
-	{ DRM_MODE(380500, 1920, 1968,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
 		   2000, 2080, 1440, 1443, 1447, 1525, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x54 - 2048x1152@60Hz */
-	{ DRM_MODE(162000, 2048, 2074,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
 		   2154, 2250, 1152, 1153, 1156, 1200, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4c - 2560x1600@60Hz RB */
-	{ DRM_MODE(268500, 2560, 2608,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
 		   2640, 2720, 1600, 1603, 1609, 1646, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x4d - 2560x1600@60Hz */
-	{ DRM_MODE(348500, 2560, 2752,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
 		   3032, 3504, 1600, 1603, 1609, 1658, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4e - 2560x1600@75Hz */
-	{ DRM_MODE(443250, 2560, 2768,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
 		   3048, 3536, 1600, 1603, 1609, 1672, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x4f - 2560x1600@85Hz */
-	{ DRM_MODE(505250, 2560, 2768,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
 		   3048, 3536, 1600, 1603, 1609, 1682, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 0x50 - 2560x1600@120Hz RB */
-	{ DRM_MODE(552750, 2560, 2608,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
 		   2640, 2720, 1600, 1603, 1609, 1694, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x57 - 4096x2160@60Hz RB */
-	{ DRM_MODE(556744, 4096, 4104,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
 		   4136, 4176, 2160, 2208, 2216, 2222, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 0x58 - 4096x2160@59.94Hz RB */
-	{ DRM_MODE(556188, 4096, 4104,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
 		   4136, 4176, 2160, 2208, 2216, 2222, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 };
@@ -1119,72 +1120,72 @@ static const struct drm_display_mode drm_dmt_modes[] = {
  */
 static const struct drm_display_mode edid_est_modes[] = {
 	/* 800x600@60Hz */
-	{ DRM_MODE(40000, 800, 840,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
 		   968, 1056, 600, 601, 605, 628, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 800x600@56Hz */
-	{ DRM_MODE(36000, 800, 824,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
 		   896, 1024, 600, 601, 603,  625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 640x480@75Hz */
-	{ DRM_MODE(31500, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
 		   720, 840, 480, 481, 484, 500, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 640x480@72Hz */
-	{ DRM_MODE(31500, 640, 664,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
 		   704,  832, 480, 489, 492, 520, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 640x480@67Hz */
-	{ DRM_MODE(30240, 640, 704,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
 		   768,  864, 480, 483, 486, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 640x480@60Hz */
-	{ DRM_MODE(25175, 640, 656,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 		   752, 800, 480, 490, 492, 525, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 720x400@88Hz */
-	{ DRM_MODE(35500, 720, 738,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
 		   846, 900, 400, 421, 423,  449, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 720x400@70Hz */
-	{ DRM_MODE(28320, 720, 738,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
 		   846,  900, 400, 412, 414, 449, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1280x1024@75Hz */
-	{ DRM_MODE(135000, 1280, 1296,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
 		   1440, 1688, 1024, 1025, 1028, 1066, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1024x768@75Hz */
-	{ DRM_MODE(78750, 1024, 1040,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
 		   1136, 1312,  768, 769, 772, 800, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1024x768@70Hz */
-	{ DRM_MODE(75000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
 		   1184, 1328, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 1024x768@60Hz */
-	{ DRM_MODE(65000, 1024, 1048,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
 		   1184, 1344, 768, 771, 777, 806, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 1024x768@43Hz */
-	{ DRM_MODE(44900, 1024, 1032,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
 		   1208, 1264, 768, 768, 776, 817, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 		   DRM_MODE_FLAG_INTERLACE) },
 	/* 832x624@75Hz */
-	{ DRM_MODE(57284, 832, 864,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
 		   928, 1152, 624, 625, 628, 667, 0,
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 	/* 800x600@75Hz */
-	{ DRM_MODE(49500, 800, 816,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
 		   896, 1056, 600, 601, 604,  625, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 800x600@72Hz */
-	{ DRM_MODE(50000, 800, 856,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
 		   976, 1040, 600, 637, 643, 666, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 	/* 1152x864@75Hz */
-	{ DRM_MODE(108000, 1152, 1216,
+	{ DRM_MODE(DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
 		   1344, 1600, 864, 865, 868, 900, 0,
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
@@ -2233,6 +2234,8 @@ static void drm_add_hdmi_modes(struct hdmi_edid_data *data,
 {
 	struct drm_display_mode *mode_buf = data->mode_buf;
 
+	if (data->modes >= MODE_LEN)
+		return;
 	mode_buf[(data->modes)++] = *mode;
 }
 
@@ -2306,11 +2309,10 @@ drm_add_cmdb_modes(u8 svd, struct drm_hdmi_info *hdmi)
 	bitmap_set(hdmi->y420_cmdb_modes, vic, 1);
 }
 
-static int
-do_cea_modes(const u8 *db, u8 len, struct drm_hdmi_info *hdmi,
-	     struct hdmi_edid_data *data)
+int do_cea_modes(struct hdmi_edid_data *data, const u8 *db, u8 len)
 {
 	int i, modes = 0;
+	struct drm_hdmi_info *hdmi = &data->display_info.hdmi;
 
 	for (i = 0; i < len; i++) {
 		struct drm_display_mode *mode;
@@ -2348,11 +2350,11 @@ do_cea_modes(const u8 *db, u8 len, struct drm_hdmi_info *hdmi,
  * which contains modes which can be supported in YCBCR 420
  * output format only.
  */
-static
-int do_y420vdb_modes(const u8 *svds, u8 svds_len, struct drm_hdmi_info *hdmi,
-		     struct hdmi_edid_data *data)
+static int
+do_y420vdb_modes(struct hdmi_edid_data *data, const u8 *svds, u8 svds_len)
 {
 	int modes = 0, i;
+	struct drm_hdmi_info *hdmi = &data->display_info.hdmi;
 
 	for (i = 0; i < svds_len; i++) {
 		u8 vic = svd_to_vic(svds[i]);
@@ -3060,8 +3062,7 @@ int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 			if (cea_db_tag(db) == EDID_CEA861_DB_VIDEO) {
 				video = db + 1;
 				video_len = dbl;
-				modes += do_cea_modes(video, dbl,
-						      &data->hdmi_info, data);
+				modes += do_cea_modes(data, video, dbl);
 			} else if (cea_db_is_hdmi_vsdb(db)) {
 				hdmi = db;
 				hdmi_len = dbl;
@@ -3069,9 +3070,8 @@ int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 				const u8 *vdb420 = &db[2];
 
 				/* Add 4:2:0(only) modes present in EDID */
-				modes += do_y420vdb_modes(vdb420, dbl - 1,
-							  &data->hdmi_info,
-							  data);
+				modes += do_y420vdb_modes(data, vdb420,
+							  dbl - 1);
 			}
 		}
 	}
@@ -3089,8 +3089,8 @@ int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 
 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
 
-static
-void cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+static void
+cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 {
 	int i, n = 0;
 	u8 d = ext[0x02];
@@ -3101,8 +3101,8 @@ void cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
-static
-void vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+static void
+vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 {
 	unsigned int i, n = min((int)ext[0x02], 6);
 	u8 *det_base = ext + 5;
@@ -3114,8 +3114,8 @@ void vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 }
 
-static
-void drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+static void
+drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 {
 	int i;
 	struct edid *edid = (struct edid *)raw_edid;
@@ -3230,8 +3230,8 @@ struct drm_display_mode *drm_mode_detailed(struct edid *edid,
 
 	/* it is incorrect if hsync/vsync width is zero */
 	if (!hsync_pulse_width || !vsync_pulse_width) {
-		debug("Incorrect Detailed timing. "
-		      "Wrong Hsync/Vsync pulse width\n");
+		debug("Incorrect Detailed timing. ");
+		debug("Wrong Hsync/Vsync pulse width\n");
 		return NULL;
 	}
 
@@ -3281,6 +3281,7 @@ struct drm_display_mode *drm_mode_detailed(struct edid *edid,
 
 set_refresh:
 
+	mode->type = DRM_MODE_TYPE_DRIVER;
 	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
@@ -3487,6 +3488,9 @@ do_detailed_mode(struct detailed_timing *timing, void *c)
 		if (!newmode)
 			return;
 
+		if (closure->preferred)
+			newmode->type |= DRM_MODE_TYPE_PREFERRED;
+
 		/*
 		 * Detailed modes are limited to 10kHz pixel clock resolution,
 		 * so fix up anything that looks like CEA/HDMI mode,
@@ -3496,6 +3500,7 @@ do_detailed_mode(struct detailed_timing *timing, void *c)
 		drm_add_hdmi_modes(closure->data, newmode);
 		drm_mode_destroy(newmode);
 		closure->modes++;
+		closure->preferred = 0;
 	}
 }
 
@@ -3512,9 +3517,14 @@ add_detailed_modes(struct hdmi_edid_data *data, struct edid *edid,
 	struct detailed_mode_closure closure = {
 		.data = data,
 		.edid = edid,
+		.preferred = 1,
 		.quirks = quirks,
 	};
 
+	if (closure.preferred && !version_greater(edid, 1, 3))
+		closure.preferred =
+			(edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
+
 	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
 
 	return closure.modes;
@@ -4044,7 +4054,7 @@ drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
 	 */
 	for (i = 0; i < num; i++)
 		if (data->mode_buf[i].hdisplay == hsize &&
-		    data->mode_buf[i].hdisplay &&
+		    data->mode_buf[i].vdisplay == vsize &&
 		    drm_get_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
 			return NULL;
 
@@ -4411,8 +4421,10 @@ drm_display_mode *drm_displayid_detailed(struct displayid_detailed_timings_1
 		hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
 	mode->flags |=
 		vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+	mode->type = DRM_MODE_TYPE_DRIVER;
 
 	if (timings->flags & 0x80)
+		mode->type |= DRM_MODE_TYPE_PREFERRED;
 	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
@@ -4753,6 +4765,7 @@ static void edid_fixup_preferred(struct hdmi_edid_data *data,
 
 	for (i = 0; i < num; i++) {
 		cur_mode = &data->mode_buf[i];
+		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
 
 		if (cur_mode == preferred_mode)
 			continue;
@@ -4772,6 +4785,7 @@ static void edid_fixup_preferred(struct hdmi_edid_data *data,
 			preferred_mode = cur_mode;
 		}
 	}
+	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
 	data->preferred_mode = preferred_mode;
 }
 
@@ -5286,3 +5300,203 @@ ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
 
 	return length;
 }
+
+/**
+ * drm_do_probe_ddc_edid() - get EDID information via I2C
+ * @adap: ddc adapter
+ * @buf: EDID data buffer to be filled
+ * @block: 128 byte EDID block to start fetching from
+ * @len: EDID data buffer length to fetch
+ *
+ * Try to fetch EDID information by calling I2C driver functions.
+ *
+ * Return: 0 on success or -1 on failure.
+ */
+static int
+drm_do_probe_ddc_edid(struct ddc_adapter *adap, u8 *buf, unsigned int block,
+		      size_t len)
+{
+	unsigned char start = block * HDMI_EDID_BLOCK_SIZE;
+	unsigned char segment = block >> 1;
+	unsigned char xfers = segment ? 3 : 2;
+	int ret, retries = 5;
+
+	do {
+		struct i2c_msg msgs[] = {
+			{
+				.addr	= DDC_SEGMENT_ADDR,
+				.flags	= 0,
+				.len	= 1,
+				.buf	= &segment,
+			}, {
+				.addr	= DDC_ADDR,
+				.flags	= 0,
+				.len	= 1,
+				.buf	= &start,
+			}, {
+				.addr	= DDC_ADDR,
+				.flags	= I2C_M_RD,
+				.len	= len,
+				.buf	= buf,
+			}
+		};
+
+		ret = adap->ddc_xfer(adap, &msgs[3 - xfers], xfers);
+
+	} while (ret != xfers && --retries);
+
+	/* All msg transfer successfully. */
+	return ret == xfers ? 0 : -1;
+}
+
+int drm_do_get_edid(struct ddc_adapter *adap, u8 *edid)
+{
+	int i, j, block_num, block = 0;
+	bool edid_corrupt;
+#ifdef DEBUG
+	u8 *buff;
+#endif
+
+	/* base block fetch */
+	for (i = 0; i < 4; i++) {
+		if (drm_do_probe_ddc_edid(adap, edid, 0, HDMI_EDID_BLOCK_SIZE))
+			goto err;
+		if (drm_edid_block_valid(edid, 0, true,
+					 &edid_corrupt))
+			break;
+		if (i == 0 && drm_edid_is_zero(edid, HDMI_EDID_BLOCK_SIZE)) {
+			printf("edid base block is 0, get edid failed\n");
+			goto err;
+		}
+	}
+
+	if (i == 4)
+		goto err;
+
+	block++;
+	/* get the number of extensions */
+	block_num = edid[0x7e];
+
+	for (j = 1; j <= block_num; j++) {
+		for (i = 0; i < 4; i++) {
+			if (drm_do_probe_ddc_edid(adap, &edid[0x80 * j], j,
+						  HDMI_EDID_BLOCK_SIZE))
+				goto err;
+			if (drm_edid_block_valid(&edid[0x80 * j], j,
+						 true, NULL))
+				break;
+		}
+
+		if (i == 4)
+			goto err;
+		block++;
+	}
+
+#ifdef DEBUG
+	printf("RAW EDID:\n");
+	for (i = 0; i < block_num + 1; i++) {
+		buff = &edid[0x80 * i];
+		for (j = 0; j < HDMI_EDID_BLOCK_SIZE; j++) {
+			if (j % 16 == 0)
+				printf("\n");
+			printf("0x%02x, ", buff[j]);
+		}
+		printf("\n");
+	}
+#endif
+
+	return 0;
+
+err:
+	printf("can't get edid block:%d\n", block);
+	/* clear all read edid block, include invalid block */
+	memset(edid, 0, HDMI_EDID_BLOCK_SIZE * (block + 1));
+	return -EFAULT;
+}
+
+static ssize_t hdmi_ddc_read(struct ddc_adapter *adap, u16 addr, u8 offset,
+			     void *buffer, size_t size)
+{
+	struct i2c_msg msgs[2] = {
+		{
+			.addr = addr,
+			.flags = 0,
+			.len = 1,
+			.buf = &offset,
+		}, {
+			.addr = addr,
+			.flags = I2C_M_RD,
+			.len = size,
+			.buf = buffer,
+		}
+	};
+
+	return adap->ddc_xfer(adap, msgs, ARRAY_SIZE(msgs));
+}
+
+static ssize_t hdmi_ddc_write(struct ddc_adapter *adap, u16 addr, u8 offset,
+			      const void *buffer, size_t size)
+{
+	struct i2c_msg msg = {
+		.addr = addr,
+		.flags = 0,
+		.len = 1 + size,
+		.buf = NULL,
+	};
+	void *data;
+	int err;
+
+	data = malloc(1 + size);
+	if (!data)
+		return -ENOMEM;
+
+	msg.buf = data;
+
+	memcpy(data, &offset, sizeof(offset));
+	memcpy(data + 1, buffer, size);
+
+	err = adap->ddc_xfer(adap, &msg, 1);
+
+	free(data);
+
+	return err;
+}
+
+/**
+ * drm_scdc_readb - read a single byte from SCDC
+ * @adap: ddc adapter
+ * @offset: offset of register to read
+ * @value: return location for the register value
+ *
+ * Reads a single byte from SCDC. This is a convenience wrapper around the
+ * drm_scdc_read() function.
+ *
+ * Returns:
+ * 0 on success or a negative error code on failure.
+ */
+u8 drm_scdc_readb(struct ddc_adapter *adap, u8 offset,
+		  u8 *value)
+{
+	return hdmi_ddc_read(adap, SCDC_I2C_SLAVE_ADDRESS, offset, value,
+			     sizeof(*value));
+}
+
+/**
+ * drm_scdc_writeb - write a single byte to SCDC
+ * @adap: ddc adapter
+ * @offset: offset of register to read
+ * @value: return location for the register value
+ *
+ * Writes a single byte to SCDC. This is a convenience wrapper around the
+ * drm_scdc_write() function.
+ *
+ * Returns:
+ * 0 on success or a negative error code on failure.
+ */
+u8 drm_scdc_writeb(struct ddc_adapter *adap, u8 offset,
+		   u8 value)
+{
+	return hdmi_ddc_write(adap, SCDC_I2C_SLAVE_ADDRESS, offset, &value,
+			      sizeof(value));
+}
+
diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index a83278dc3c..e1c71cbe0a 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -21,6 +21,14 @@ config DRM_ROCKCHIP_DW_HDMI
 	 for the Synopsys DesignWare HDMI driver. If you want to
 	 enable HDMI on, you should selet this option.
 
+config ROCKCHIP_INNO_HDMI_PHY
+	bool "Rockchip specific extensions for INNO HDMI PHY"
+	depends on DRM_ROCKCHIP
+	help
+	 This selects support for INNO HDMI PHY. If you want to
+	 use HDMI or TVE in RK322XH or RK322X, you should selet
+	 this option.
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index f6b39fa882..195b6ca7e6 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
+obj-$(CONFIG_ROCKCHIP_INNO_HDMI_PHY) += rockchip-inno-hdmi-phy.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 5edfc2238e..152f0377b2 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -8,9 +8,10 @@
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
+#include <asm/arch/vendor.h>
 #include <edid.h>
 #include <dm/device.h>
-#include <dm/of_node.h>
+#include <dm/ofnode.h>
 #include <dm/read.h>
 #include <linux/hdmi.h>
 #include <linux/media-bus-format.h>
@@ -20,7 +21,11 @@
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 #include "dw_hdmi.h"
+#include "rockchip_phy.h"
 
+#define HDCP_PRIVATE_KEY_SIZE   280
+#define HDCP_KEY_SHA_SIZE       20
+#define HDMI_HDCP1X_ID		5
 /*
  * Unless otherwise noted, entries in this table are 100% optimization.
  * Values can be obtained from hdmi_compute_n() but that function is
@@ -112,6 +117,7 @@ struct hdmi_vmode {
 	unsigned int mpixelclock;
 	unsigned int mpixelrepetitioninput;
 	unsigned int mpixelrepetitionoutput;
+	unsigned int mtmdsclock;
 };
 
 struct hdmi_data_info {
@@ -133,12 +139,29 @@ struct dw_hdmi_phy_data {
 			 unsigned long mpixelclock);
 };
 
+struct hdcp_keys {
+	u8 KSV[8];
+	u8 devicekey[HDCP_PRIVATE_KEY_SIZE];
+	u8 sha1[HDCP_KEY_SHA_SIZE];
+	u8 seeds[2];
+};
+
+struct dw_hdmi_i2c {
+	u8			slave_reg;
+	bool			is_regaddr;
+	bool			is_segment;
+
+	unsigned int		scl_high_ns;
+	unsigned int		scl_low_ns;
+};
+
 struct dw_hdmi {
 	enum dw_hdmi_devtype dev_type;
 	unsigned int version;
 	struct hdmi_data_info hdmi_data;
 	struct hdmi_edid_data edid_data;
 	const struct dw_hdmi_plat_data *plat_data;
+	struct ddc_adapter adap;
 
 	int vic;
 	int io_width;
@@ -149,6 +172,7 @@ struct dw_hdmi {
 	bool sink_has_audio;
 	void *regs;
 	void *grf;
+	struct dw_hdmi_i2c *i2c;
 
 	struct {
 		const struct dw_hdmi_phy_ops *ops;
@@ -163,9 +187,12 @@ struct dw_hdmi {
 	unsigned int audio_cts;
 	unsigned int audio_n;
 	bool audio_enable;
+	bool scramble_low_rates;
 
 	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
 	u8 (*read)(struct dw_hdmi *hdmi, int offset);
+
+	bool hdcp1x_enable;
 };
 
 static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset)
@@ -349,6 +376,166 @@ static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi,
 	hdmi_writeb(hdmi, bit, HDMI_PHY_TST2);
 }
 
+static int dw_hdmi_i2c_read(struct dw_hdmi *hdmi,
+			    unsigned char *buf, unsigned int length)
+{
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	int interrupt = 0, i = 20;
+
+	if (!i2c->is_regaddr) {
+		printf("set read register address to 0\n");
+		i2c->slave_reg = 0x00;
+		i2c->is_regaddr = true;
+	}
+
+	while (length--) {
+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
+		if (i2c->is_segment)
+			hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ_EXT,
+				    HDMI_I2CM_OPERATION);
+		else
+			hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ,
+				    HDMI_I2CM_OPERATION);
+
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi, interrupt,
+					    HDMI_IH_I2CM_STAT0);
+			if (interrupt & (m_SCDC_READREQ | m_I2CM_DONE |
+					 m_I2CM_ERROR))
+				break;
+		}
+
+		if (!interrupt) {
+			printf("[%s] i2c read reg[0x%02x] no interrupt\n",
+			       __func__, i2c->slave_reg);
+			return -EAGAIN;
+		}
+
+		/* Check for error condition on the bus */
+		if (interrupt & HDMI_IH_I2CM_STAT0_ERROR) {
+			printf("[%s] read reg[0x%02x] data error:0x%02x\n",
+			       __func__, i2c->slave_reg, interrupt);
+			return -EIO;
+		}
+
+		i = 20;
+		*buf++ = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
+	}
+	i2c->is_segment = false;
+
+	return 0;
+}
+
+static int dw_hdmi_i2c_write(struct dw_hdmi *hdmi,
+			     unsigned char *buf, unsigned int length)
+{
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	int i = 20;
+	u8 interrupt = 0;
+
+	if (!i2c->is_regaddr) {
+		/* Use the first write byte as register address */
+		i2c->slave_reg = buf[0];
+		length--;
+		buf++;
+		i2c->is_regaddr = true;
+	}
+
+	while (length--) {
+		hdmi_writeb(hdmi, *buf++, HDMI_I2CM_DATAO);
+		hdmi_writeb(hdmi, i2c->slave_reg++, HDMI_I2CM_ADDRESS);
+		hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE,
+			    HDMI_I2CM_OPERATION);
+
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi,
+					    interrupt, HDMI_IH_I2CM_STAT0);
+
+			if (interrupt & (m_SCDC_READREQ |
+					 m_I2CM_DONE | m_I2CM_ERROR))
+				break;
+		}
+
+		if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+			printf("[%s] write data error\n", __func__);
+			return -EIO;
+		} else if (interrupt & m_I2CM_DONE) {
+			printf("[%s] write offset %02x success\n",
+			       __func__, i2c->slave_reg);
+			return -EAGAIN;
+		}
+
+		i = 20;
+	}
+
+	return 0;
+}
+
+static int dw_hdmi_i2c_xfer(struct ddc_adapter *adap,
+			    struct i2c_msg *msgs, int num)
+{
+	struct dw_hdmi *hdmi = container_of(adap, struct dw_hdmi, adap);
+	struct dw_hdmi_i2c *i2c = hdmi->i2c;
+	u8 addr = msgs[0].addr;
+	int i, ret = 0;
+
+	printf("xfer: num: %d, addr: %#x\n", num, addr);
+	for (i = 0; i < num; i++) {
+		if (msgs[i].len == 0) {
+			printf("unsupported transfer %d/%d, no data\n",
+			       i + 1, num);
+			return -EOPNOTSUPP;
+		}
+	}
+
+	hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
+
+	/* Set slave device address taken from the first I2C message */
+	if (addr == DDC_SEGMENT_ADDR && msgs[0].len == 1)
+		addr = DDC_ADDR;
+	hdmi_writeb(hdmi, addr, HDMI_I2CM_SLAVE);
+
+	/* Set slave device register address on transfer */
+	i2c->is_regaddr = false;
+
+	/* Set segment pointer for I2C extended read mode operation */
+	i2c->is_segment = false;
+
+	for (i = 0; i < num; i++) {
+		debug("xfer: num: %d/%d, len: %d, flags: %#x\n",
+		      i + 1, num, msgs[i].len, msgs[i].flags);
+		if (msgs[i].addr == DDC_SEGMENT_ADDR && msgs[i].len == 1) {
+			i2c->is_segment = true;
+			hdmi_writeb(hdmi, DDC_SEGMENT_ADDR, HDMI_I2CM_SEGADDR);
+			hdmi_writeb(hdmi, *msgs[i].buf, HDMI_I2CM_SEGPTR);
+		} else {
+			if (msgs[i].flags & I2C_M_RD)
+				ret = dw_hdmi_i2c_read(hdmi, msgs[i].buf,
+						       msgs[i].len);
+			else
+				ret = dw_hdmi_i2c_write(hdmi, msgs[i].buf,
+							msgs[i].len);
+		}
+		if (ret < 0)
+			break;
+	}
+
+	if (!ret)
+		ret = num;
+
+	/* Mute DONE and ERROR interrupts */
+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+		    HDMI_IH_MUTE_I2CM_STAT0);
+
+	return ret;
+}
+
 static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
 {
 	u32 val;
@@ -491,8 +678,8 @@ static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
 		printf("PHY PLL failed to lock\n");
 		return -ETIMEDOUT;
 	}
-
 	printf("PHY PLL locked %u iterations\n", i);
+
 	return 0;
 }
 
@@ -509,6 +696,13 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
 	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
 	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
 	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
+	unsigned int tmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
+	unsigned int depth =
+		hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) &&
+	    pdata->mpll_cfg_420)
+		mpll_config = pdata->mpll_cfg_420;
 
 	/* PLL/MPLL Cfg - always match on final entry */
 	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
@@ -516,11 +710,11 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
 			break;
 
 	for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
-		if (mpixelclock <= curr_ctrl->mpixelclock)
+		if (tmdsclock <= curr_ctrl->mpixelclock)
 			break;
 
 	for (; phy_config->mpixelclock != ~0UL; phy_config++)
-		if (mpixelclock <= phy_config->mpixelclock)
+		if (tmdsclock <= phy_config->mpixelclock)
 			break;
 
 	if (mpll_config->mpixelclock == ~0UL ||
@@ -528,31 +722,29 @@ int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
 	    phy_config->mpixelclock == ~0UL)
 		return -EINVAL;
 
-	/*
-	 * RK3399 mpll clock source is vpll, also is vop clock source.
-	 * vpll rate is twice of mpixelclock in YCBCR420 mode, we need
-	 * to enable mpll pre-divider.
-	 */
-	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) &&
-	    (hdmi->dev_type == RK3399_HDMI || hdmi->dev_type == RK3368_HDMI))
-		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce | 4,
-				      HDMI_3D_TX_PHY_CPCE_CTRL);
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		depth = fls(depth - 8);
 	else
-		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
-				      HDMI_3D_TX_PHY_CPCE_CTRL);
-	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
+		depth = 0;
+	if (depth)
+		depth--;
+
+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].cpce,
+			      HDMI_3D_TX_PHY_CPCE_CTRL);
+
+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[depth].gmp,
 			      HDMI_3D_TX_PHY_GMPCTRL);
-	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
+	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[depth],
 			      HDMI_3D_TX_PHY_CURRCTRL);
 
 	dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
 	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
 			      HDMI_3D_TX_PHY_MSM_CTRL);
 
-	dw_hdmi_phy_i2c_write(hdmi, 0x0004, HDMI_3D_TX_PHY_TXTERM);
-	dw_hdmi_phy_i2c_write(hdmi, 0x8009,
+	dw_hdmi_phy_i2c_write(hdmi, phy_config->term, HDMI_3D_TX_PHY_TXTERM);
+	dw_hdmi_phy_i2c_write(hdmi, phy_config->sym_ctr,
 			      HDMI_3D_TX_PHY_CKSYMTXCTRL);
-	dw_hdmi_phy_i2c_write(hdmi, 0x0272,
+	dw_hdmi_phy_i2c_write(hdmi, phy_config->vlev_ctr,
 			      HDMI_3D_TX_PHY_VLEVCTRL);
 
 	/* Override and disable clock termination. */
@@ -600,168 +792,13 @@ static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
 	}
 };
 
-/* ddc i2c master reset */
-static void rockchip_dw_hdmi_i2cm_reset(struct dw_hdmi *hdmi)
-{
-	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
-	udelay(100);
-}
-
-static void rockchip_dw_hdmi_i2cm_mask_int(struct dw_hdmi *hdmi, int mask)
-{
-	if (!mask) {
-		hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
-		hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL |
-			    HDMI_I2CM_CTLINT_ARB_POL, HDMI_I2CM_CTLINT);
-		hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
-	} else {
-		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
-		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
-	}
-}
-
-static u16 i2c_count(u16 sfrclock, u16 sclmintime)
-{
-	unsigned long tmp_scl_period = 0;
-
-	if (((sfrclock * sclmintime) % I2C_DIV_FACTOR) != 0)
-		tmp_scl_period = (unsigned long)((sfrclock * sclmintime) +
-				(I2C_DIV_FACTOR - ((sfrclock * sclmintime) %
-				I2C_DIV_FACTOR))) / I2C_DIV_FACTOR;
-	else
-		tmp_scl_period = (unsigned long)(sfrclock * sclmintime) /
-				I2C_DIV_FACTOR;
-
-	return (u16)(tmp_scl_period);
-}
-
-static void rockchip_dw_hdmi_i2cm_clk_init(struct dw_hdmi *hdmi)
-{
-	int value;
-
-	/* Set DDC I2C CLK which divided from DDC_CLK. */
-	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_HIGH_TIME);
-	hdmi_writeb(hdmi, value & 0xff,
-		    HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
-	hdmi_writeb(hdmi, (value >> 8) & 0xff,
-		    HDMI_I2CM_SS_SCL_HCNT_1_ADDR);
-	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_LOW_TIME);
-	hdmi_writeb(hdmi, value & 0xff,
-		    HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
-	hdmi_writeb(hdmi, (value >> 8) & 0xff,
-		    HDMI_I2CM_SS_SCL_LCNT_1_ADDR);
-	hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
-		  HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
-}
-
-/*set read/write offset,set read/write mode*/
-static void rockchip_dw_hdmi_i2cm_write_request(struct dw_hdmi *hdmi,
-						u8 offset, u8 data)
-{
-	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
-	hdmi_writeb(hdmi, data, HDMI_I2CM_DATAO);
-	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE, HDMI_I2CM_OPERATION_READ);
-}
-
-static void rockchip_dw_hdmi_i2cm_read_request(struct dw_hdmi *hdmi,
-					       u8 offset)
-{
-	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
-	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ, HDMI_I2CM_OPERATION);
-}
-
-static void rockchip_dw_hdmi_i2cm_write_data(struct dw_hdmi *hdmi,
-					     u8 data, u8 offset)
-{
-	u8 interrupt = 0;
-	int trytime = 2;
-	int i = 20;
-
-	while (trytime-- > 0) {
-		rockchip_dw_hdmi_i2cm_write_request(hdmi, offset, data);
-		while (i--) {
-			udelay(1000);
-			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
-			if (interrupt)
-				hdmi_writeb(hdmi,
-					    interrupt, HDMI_IH_I2CM_STAT0);
-
-			if (interrupt & (m_SCDC_READREQ |
-					 m_I2CM_DONE | m_I2CM_ERROR))
-				break;
-		}
-
-		if (interrupt & m_I2CM_DONE) {
-			printf("[%s] write offset %02x data %02x success\n",
-			       __func__, offset, data);
-			trytime = 0;
-		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
-			printf("[%s] write data error\n", __func__);
-			rockchip_dw_hdmi_i2cm_reset(hdmi);
-		}
-	}
-}
-
-static int rockchip_dw_hdmi_i2cm_read_data(struct dw_hdmi *hdmi, u8 offset)
-{
-	u8 interrupt = 0, val = 0;
-	int trytime = 2;
-	int i = 20;
-
-	while (trytime-- > 0) {
-		rockchip_dw_hdmi_i2cm_read_request(hdmi, offset);
-		while (i--) {
-			udelay(1000);
-			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
-			if (interrupt)
-				hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0,
-					    interrupt);
-
-			if (interrupt & (m_SCDC_READREQ |
-				m_I2CM_DONE | m_I2CM_ERROR))
-				break;
-		}
-
-		if (interrupt & m_I2CM_DONE) {
-			val = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
-			trytime = 0;
-		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
-			printf("[%s] read data error\n", __func__);
-			rockchip_dw_hdmi_i2cm_reset(hdmi);
-		}
-	}
-	return val;
-}
-
-static int rockchip_dw_hdmi_scdc_get_sink_version(struct dw_hdmi *hdmi)
-{
-	return rockchip_dw_hdmi_i2cm_read_data(hdmi, SCDC_SINK_VERSION);
-}
-
-static void rockchip_dw_hdmi_scdc_set_source_version(struct dw_hdmi *hdmi,
-						     u8 version)
-{
-	rockchip_dw_hdmi_i2cm_write_data(hdmi, version, SCDC_SOURCE_VERSION);
-}
-
-static void rockchip_dw_hdmi_scdc_init(struct dw_hdmi *hdmi)
-{
-	rockchip_dw_hdmi_i2cm_reset(hdmi);
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
-	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
-	/* set scdc i2c addr */
-	hdmi_writeb(hdmi, DDC_I2C_SCDC_ADDR, HDMI_I2CM_SLAVE);
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);/*enable interrupt*/
-}
-
 static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 					      int enable)
 {
-	int stat;
+	u8 stat;
+
+	drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat);
 
-	rockchip_dw_hdmi_scdc_init(hdmi);
-	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
-					       SCDC_TMDS_CONFIG);
 	if (stat < 0) {
 		debug("Failed to read tmds config\n");
 		return false;
@@ -770,7 +807,7 @@ static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 	if (enable == 1) {
 		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
 		stat |= SCDC_SCRAMBLING_ENABLE;
-		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+		drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat);
 		/* TMDS software reset request */
 		hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
 			    HDMI_MC_SWRSTZ);
@@ -784,7 +821,7 @@ static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 			    HDMI_MC_SWRSTZ);
 		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
 		stat &= ~SCDC_SCRAMBLING_ENABLE;
-		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+		drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat);
 	}
 
 	return 0;
@@ -792,17 +829,14 @@ static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
 
 static void rockchip_dw_hdmi_scdc_set_tmds_rate(struct dw_hdmi *hdmi)
 {
-	int stat;
+	u8 stat;
 
-	rockchip_dw_hdmi_scdc_init(hdmi);
-	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
-					       SCDC_TMDS_CONFIG);
-	if (hdmi->hdmi_data.video_mode.mpixelclock > 340000000)
+	drm_scdc_readb(&hdmi->adap, SCDC_TMDS_CONFIG, &stat);
+	if (hdmi->hdmi_data.video_mode.mtmdsclock > 340000000)
 		stat |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
 	else
 		stat &= ~SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
-	rockchip_dw_hdmi_i2cm_write_data(hdmi, stat,
-					 SCDC_TMDS_CONFIG);
+	drm_scdc_writeb(&hdmi->adap, SCDC_TMDS_CONFIG, stat);
 }
 
 static int hdmi_phy_configure(struct dw_hdmi *hdmi)
@@ -810,7 +844,8 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
 	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
 	unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
-	int ret, sink_version;
+	unsigned long mtmdsclock = hdmi->hdmi_data.video_mode.mtmdsclock;
+	int ret;
 
 	dw_hdmi_phy_power_off(hdmi);
 
@@ -845,14 +880,14 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi)
 	}
 
 	/* Wait for resuming transmission of TMDS clock and data */
-	if (mpixelclock > 340000000)
+	if (mtmdsclock > 340000000)
 		mdelay(100);
 
 	return dw_hdmi_phy_power_on(hdmi);
 }
 
-static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
-			    struct drm_display_mode *mode)
+static int dw_hdmi_phy_init(struct dw_hdmi *hdmi,
+			    void *data)
 {
 	int i, ret;
 
@@ -868,13 +903,14 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
 	return 0;
 }
 
-static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
+static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,
+				void *data)
 {
 	dw_hdmi_phy_power_off(hdmi);
 }
 
-static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
-						      void *data)
+static enum drm_connector_status
+dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data)
 {
 	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
 		connector_status_connected : connector_status_disconnected;
@@ -935,29 +971,58 @@ static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
 	return -ENODEV;
 }
 
+static unsigned int
+hdmi_get_tmdsclock(struct dw_hdmi *hdmi, unsigned long mpixelclock)
+{
+	unsigned int tmdsclock = mpixelclock;
+	unsigned int depth =
+		hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
+
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (depth) {
+		case 16:
+			tmdsclock = mpixelclock * 2;
+			break;
+		case 12:
+			tmdsclock = mpixelclock * 3 / 2;
+			break;
+		case 10:
+			tmdsclock = mpixelclock * 5 / 4;
+			break;
+		default:
+			break;
+		}
+	}
+
+	return tmdsclock;
+}
+
 static void hdmi_av_composer(struct dw_hdmi *hdmi,
 			     const struct drm_display_mode *mode)
 {
-	u8 inv_val = 0;
+	u8 bytes = 0, inv_val = 0;
 	struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
 	struct drm_hdmi_info *hdmi_info = &hdmi->edid_data.display_info.hdmi;
-	int bytes, hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
+	int hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
 	unsigned int hdisplay, vdisplay;
 
-	vmode->mpixelclock = mode->clock * 1000;
-	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
-		vmode->mpixelclock /= 2;
+	vmode->mpixelclock = mode->crtc_clock * 1000;
 	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
 		DRM_MODE_FLAG_3D_FRAME_PACKING)
 		vmode->mpixelclock *= 2;
-	printf("final pixclk = %d\n", vmode->mpixelclock);
+	vmode->mtmdsclock = hdmi_get_tmdsclock(hdmi, vmode->mpixelclock);
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		vmode->mtmdsclock /= 2;
+	printf("final pixclk = %d tmdsclk = %d\n",
+	       vmode->mpixelclock, vmode->mtmdsclock);
 
 	/* Set up HDMI_FC_INVIDCONF
 	 * fc_invidconf.HDCP_keepout must be set (1'b1)
 	 * when activate the scrambler feature.
 	 */
-	inv_val = (vmode->mpixelclock > 340000000 ||
-		   hdmi_info->scdc.scrambling.low_rates ?
+	inv_val = (vmode->mtmdsclock > 340000000 ||
+		   (hdmi_info->scdc.scrambling.low_rates &&
+		   hdmi->scramble_low_rates) ?
 		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE :
 		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE);
 
@@ -995,10 +1060,6 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 	h_de_hs = mode->hsync_start - mode->hdisplay;
 	hsync_len = mode->hsync_end - mode->hsync_start;
 
-	/*
-	 * When we're setting a YCbCr420 mode, we need
-	 * to adjust the horizontal timing to suit.
-	 */
 	/*
 	 * When we're setting a YCbCr420 mode, we need
 	 * to adjust the horizontal timing to suit.
@@ -1031,10 +1092,12 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 
 	/* Scrambling Control */
 	if (hdmi_info->scdc.supported) {
-		if (vmode->mpixelclock > 340000000 ||
-		    hdmi_info->scdc.scrambling.low_rates) {
-			bytes = rockchip_dw_hdmi_scdc_get_sink_version(hdmi);
-			rockchip_dw_hdmi_scdc_set_source_version(hdmi, bytes);
+		if (vmode->mtmdsclock > 340000000 ||
+		    (hdmi_info->scdc.scrambling.low_rates &&
+		     hdmi->scramble_low_rates)) {
+			drm_scdc_readb(&hdmi->adap, SCDC_SINK_VERSION, &bytes);
+			drm_scdc_writeb(&hdmi->adap, SCDC_SOURCE_VERSION,
+					bytes);
 			rockchip_dw_hdmi_scrambling_enable(hdmi, 1);
 		} else {
 			rockchip_dw_hdmi_scrambling_enable(hdmi, 0);
@@ -1229,6 +1292,9 @@ static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
 		count = 4;
 		break;
 	case 0x131a:
+	case 0x200a:
+	case 0x201a:
+	case 0x211a:
 		count = 1;
 		break;
 	default:
@@ -1301,11 +1367,8 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
 	}
 
 	/* set the packetizer registers */
-	val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
-		HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
-		((hdmi_data->pix_repet_factor <<
-		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
-		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
+	val = (color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
+	      HDMI_VP_PR_CD_COLOR_DEPTH_MASK;
 	hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
 
 	hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
@@ -1324,8 +1387,13 @@ static void hdmi_video_packetize(struct dw_hdmi *hdmi)
 		  HDMI_VP_CONF_PR_EN_MASK |
 		  HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
 
-	hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
-		  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
+	if ((color_depth == 5 && hdmi->previous_mode.htotal % 4) ||
+	    (color_depth == 6 && hdmi->previous_mode.htotal % 2))
+		hdmi_modb(hdmi, 0, HDMI_VP_STUFF_IDEFAULT_PHASE_MASK,
+			  HDMI_VP_STUFF);
+	else
+		hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
+			  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
 
 	hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
 
@@ -1432,10 +1500,10 @@ static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
 	hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
 }
 
-static void dw_hdmi_disable(struct dw_hdmi *hdmi)
+static void dw_hdmi_disable(struct dw_hdmi *hdmi, struct display_state *state)
 {
 	if (hdmi->phy.enabled) {
-		hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
+		hdmi->phy.ops->disable(hdmi, state);
 		hdmi->phy.enabled = false;
 	}
 }
@@ -1769,7 +1837,7 @@ void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, unsigned long pixel_clk,
 
 static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
 {
-	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
 				 hdmi->sample_rate);
 }
 
@@ -1781,18 +1849,158 @@ static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
 {
 	hdmi->sample_rate = rate;
-	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mtmdsclock,
 				 hdmi->sample_rate);
 }
 
+static int dw_hdmi_hdcp_load_key(struct dw_hdmi *hdmi)
+{
+	int i, j, ret, val;
+	struct hdcp_keys *hdcp_keys;
+
+	val = sizeof(*hdcp_keys);
+	hdcp_keys = malloc(val);
+	if (!hdcp_keys)
+		return -ENOMEM;
+
+	memset(hdcp_keys, 0, val);
+
+	ret = vendor_storage_read(HDMI_HDCP1X_ID, hdcp_keys, val);
+	if (ret < val) {
+		printf("HDCP: read size %d\n", ret);
+		free(hdcp_keys);
+		return -EINVAL;
+	}
+
+	if (hdcp_keys->KSV[0] == 0x00 &&
+	    hdcp_keys->KSV[1] == 0x00 &&
+	    hdcp_keys->KSV[2] == 0x00 &&
+	    hdcp_keys->KSV[3] == 0x00 &&
+	    hdcp_keys->KSV[4] == 0x00) {
+		printf("HDCP: Invalid hdcp key\n");
+		free(hdcp_keys);
+		return -EINVAL;
+	}
+
+	/* Disable decryption logic */
+	hdmi_writeb(hdmi, 0, HDMI_HDCPREG_RMCTL);
+	/* Poll untile DPK write is allowed */
+	do {
+		val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS);
+	} while ((val & DPK_WR_OK_STS) == 0);
+
+	hdmi_writeb(hdmi, 0, HDMI_HDCPREG_DPK6);
+	hdmi_writeb(hdmi, 0, HDMI_HDCPREG_DPK5);
+
+	/* The useful data in ksv should be 5 byte */
+	for (i = 4; i >= 0; i--)
+		hdmi_writeb(hdmi, hdcp_keys->KSV[i], HDMI_HDCPREG_DPK0 + i);
+	/* Poll untile DPK write is allowed */
+	do {
+		val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS);
+	} while ((val & DPK_WR_OK_STS) == 0);
+
+	/* Enable decryption logic */
+	hdmi_writeb(hdmi, 1, HDMI_HDCPREG_RMCTL);
+	hdmi_writeb(hdmi, hdcp_keys->seeds[0], HDMI_HDCPREG_SEED1);
+	hdmi_writeb(hdmi, hdcp_keys->seeds[1], HDMI_HDCPREG_SEED0);
+
+	/* Write encrypt device private key */
+	for (i = 0; i < DW_HDMI_HDCP_DPK_LEN - 6; i += 7) {
+		for (j = 6; j >= 0; j--)
+			hdmi_writeb(hdmi, hdcp_keys->devicekey[i + j],
+				    HDMI_HDCPREG_DPK0 + j);
+		do {
+			val = hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS);
+		} while ((val & DPK_WR_OK_STS) == 0);
+	}
+
+	free(hdcp_keys);
+	return 0;
+}
+
+static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi,
+				const struct drm_display_mode *mode)
+{
+	u8 vsync_pol, hsync_pol, data_pol, hdmi_dvi;
+
+	if (!hdmi->hdcp1x_enable)
+		return;
+
+	/* Configure the video polarity */
+	vsync_pol = mode->flags & DRM_MODE_FLAG_PVSYNC ?
+		    HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH :
+		    HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW;
+	hsync_pol = mode->flags & DRM_MODE_FLAG_PHSYNC ?
+		    HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH :
+		    HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW;
+	data_pol = HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH;
+	hdmi_modb(hdmi, vsync_pol | hsync_pol | data_pol,
+		  HDMI_A_VIDPOLCFG_VSYNCPOL_MASK |
+		  HDMI_A_VIDPOLCFG_HSYNCPOL_MASK |
+		  HDMI_A_VIDPOLCFG_DATAENPOL_MASK,
+		  HDMI_A_VIDPOLCFG);
+
+	/* Config the display mode */
+	hdmi_dvi = hdmi->sink_is_hdmi ? HDMI_A_HDCPCFG0_HDMIDVI_HDMI :
+		   HDMI_A_HDCPCFG0_HDMIDVI_DVI;
+	hdmi_modb(hdmi, hdmi_dvi, HDMI_A_HDCPCFG0_HDMIDVI_MASK,
+		  HDMI_A_HDCPCFG0);
+
+	if (!(hdmi_readb(hdmi, HDMI_HDCPREG_RMSTS) & 0x3f))
+		dw_hdmi_hdcp_load_key(hdmi);
+
+	hdmi_modb(hdmi, HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE,
+		  HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK,
+		  HDMI_FC_INVIDCONF);
+
+	if (hdmi_readb(hdmi, HDMI_CONFIG1_ID) & HDMI_A_HDCP22_MASK) {
+		hdmi_modb(hdmi, HDMI_HDCP2_OVR_ENABLE |
+			  HDMI_HDCP2_FORCE_DISABLE,
+			  HDMI_HDCP2_OVR_EN_MASK |
+			  HDMI_HDCP2_FORCE_MASK,
+			  HDMI_HDCP2REG_CTRL);
+		hdmi_writeb(hdmi, 0xff, HDMI_HDCP2REG_MASK);
+		hdmi_writeb(hdmi, 0xff, HDMI_HDCP2REG_MUTE);
+	}
+
+	hdmi_writeb(hdmi, 0x40, HDMI_A_OESSWCFG);
+		    hdmi_modb(hdmi, HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE |
+		    HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE |
+		    HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE,
+		    HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK |
+		    HDMI_A_HDCPCFG0_EN11FEATURE_MASK |
+		    HDMI_A_HDCPCFG0_SYNCRICHECK_MASK, HDMI_A_HDCPCFG0);
+
+	hdmi_modb(hdmi, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE |
+		  HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE,
+		  HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK |
+		  HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK, HDMI_A_HDCPCFG1);
+
+	/* Reset HDCP Engine */
+	if (hdmi_readb(hdmi, HDMI_MC_CLKDIS) & HDMI_MC_CLKDIS_HDCPCLK_MASK) {
+		hdmi_modb(hdmi, HDMI_A_HDCPCFG1_SWRESET_ASSERT,
+			  HDMI_A_HDCPCFG1_SWRESET_MASK, HDMI_A_HDCPCFG1);
+	}
+
+	hdmi_writeb(hdmi, 0x00, HDMI_A_APIINTMSK);
+	hdmi_modb(hdmi, HDMI_A_HDCPCFG0_RXDETECT_ENABLE,
+		  HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
+
+	hdmi_modb(hdmi, HDMI_MC_CLKDIS_HDCPCLK_ENABLE,
+		  HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
+
+	printf("%s success\n", __func__);
+}
+
 static int dw_hdmi_setup(struct dw_hdmi *hdmi,
-			 struct drm_display_mode *mode)
+			 struct drm_display_mode *mode,
+			 struct display_state *state)
 {
 	int ret;
 	void *data = hdmi->plat_data->phy_data;
 
 	hdmi_disable_overflow_interrupts(hdmi);
-
 	if (!hdmi->vic)
 		printf("Non-CEA mode used in HDMI\n");
 	else
@@ -1817,25 +2025,6 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
 	}
 
-	/* TOFIX: Get input format from plat data or fallback to RGB888 */
-	if (hdmi->plat_data->get_input_bus_format)
-		hdmi->hdmi_data.enc_in_bus_format =
-			hdmi->plat_data->get_input_bus_format(data);
-	else if (hdmi->plat_data->input_bus_format)
-		hdmi->hdmi_data.enc_in_bus_format =
-			hdmi->plat_data->input_bus_format;
-	else
-		hdmi->hdmi_data.enc_in_bus_format =
-			MEDIA_BUS_FMT_RGB888_1X24;
-
-	/* TOFIX: Default to RGB888 output format */
-	if (hdmi->plat_data->get_output_bus_format)
-		hdmi->hdmi_data.enc_out_bus_format =
-			hdmi->plat_data->get_output_bus_format(data);
-	else
-		hdmi->hdmi_data.enc_out_bus_format =
-			MEDIA_BUS_FMT_RGB888_1X24;
-
 	/* TOFIX: Get input encoding from plat data or fallback to none */
 	if (hdmi->plat_data->get_enc_in_encoding)
 		hdmi->hdmi_data.enc_in_encoding =
@@ -1859,7 +2048,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	hdmi_av_composer(hdmi, mode);
 
 	/* HDMI Initialization Step B.2 */
-	ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode);
+	ret = hdmi->phy.ops->init(hdmi, state);
 	if (ret)
 		return ret;
 	hdmi->phy.enabled = true;
@@ -1876,8 +2065,6 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 
 	/* not for DVI mode */
 	if (hdmi->sink_is_hdmi) {
-		printf("%s HDMI mode\n", __func__);
-
 		/* HDMI Initialization Step F - Configure AVI InfoFrame */
 		hdmi_config_AVI(hdmi, mode);
 		hdmi_config_vendor_specific_infoframe(hdmi, mode);
@@ -1888,6 +2075,7 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	hdmi_video_packetize(hdmi);
 	hdmi_video_csc(hdmi);
 	hdmi_video_sample(hdmi);
+	hdmi_tx_hdcp_config(hdmi, mode);
 	dw_hdmi_clear_overflow(hdmi);
 	if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
 		hdmi_enable_overflow_interrupts(hdmi);
@@ -1895,9 +2083,10 @@ static int dw_hdmi_setup(struct dw_hdmi *hdmi,
 	return 0;
 }
 
-int dw_hdmi_detect_hotplug(struct dw_hdmi *hdmi)
+int dw_hdmi_detect_hotplug(struct dw_hdmi *hdmi,
+			   struct display_state *state)
 {
-	return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
+	return hdmi->phy.ops->read_hpd(hdmi, state);
 }
 
 static int dw_hdmi_set_reg_wr(struct dw_hdmi *hdmi)
@@ -1945,127 +2134,74 @@ static void dw_hdmi_dev_init(struct dw_hdmi *hdmi)
 	hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
 		      | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
 
-	dw_hdmi_phy_power_off(hdmi);
 	initialize_hdmi_mutes(hdmi);
 }
 
-static int dw_hdmi_read_edid(struct dw_hdmi *hdmi,
-			     int block, unsigned char *buff)
+static void dw_hdmi_i2c_set_divs(struct dw_hdmi *hdmi)
 {
-	int i = 0, n = 0, index = 0, ret = -1, trytime = 2;
-	int offset = (block % 2) * 0x80;
-	int interrupt = 0;
+	unsigned long low_ns, high_ns;
+	unsigned long div_low, div_high;
 
-	rockchip_dw_hdmi_i2cm_reset(hdmi);
+	/* Standard-mode */
+	if (hdmi->i2c->scl_high_ns < 4000)
+		high_ns = 4708;
+	else
+		high_ns = hdmi->i2c->scl_high_ns;
 
-	/* Set DDC I2C CLK which divided from DDC_CLK to 100KHz. */
-	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
+	if (hdmi->i2c->scl_low_ns < 4700)
+		low_ns = 4916;
+	else
+		low_ns = hdmi->i2c->scl_low_ns;
 
-	/* Enable I2C interrupt for reading edid */
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);
+	div_low = (24000 * low_ns) / 1000000;
+	if ((24000 * low_ns) % 1000000)
+		div_low++;
 
-	hdmi_writeb(hdmi, DDC_I2C_EDID_ADDR, HDMI_I2CM_SLAVE);
-	hdmi_writeb(hdmi, DDC_I2C_SEG_ADDR, HDMI_I2CM_SEGADDR);
-	hdmi_writeb(hdmi, block / 2, HDMI_I2CM_SEGPTR);
+	div_high = (24000 * high_ns) / 1000000;
+	if ((24000 * high_ns) % 1000000)
+		div_high++;
 
-	while (trytime--) {
-		for (n = 0; n < HDMI_EDID_BLOCK_SIZE / 8; n++) {
-			hdmi_writeb(hdmi, offset + 8 * n, HDMI_I2CM_ADDRESS);
-			/*enable extend sequential read operation*/
-			if (block == 0)
-				hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ8,
-					    HDMI_I2CM_OPERATION);
-			else
-				hdmi_writeb(hdmi,
-					    HDMI_I2CM_OPERATION_READ8_EXT,
-					    HDMI_I2CM_OPERATION);
-
-			i = 20;
-			while (i--) {
-				mdelay(1);
-				interrupt = hdmi_readb(hdmi,
-						       HDMI_IH_I2CM_STAT0);
-				if (interrupt) {
-					hdmi_writeb(hdmi,
-						    interrupt,
-						    HDMI_IH_I2CM_STAT0);
-				}
-
-				if (interrupt &
-				    (m_SCDC_READREQ |
-				     m_I2CM_DONE |
-				     m_I2CM_ERROR))
-					break;
-				mdelay(4);
-			}
+	/* Maximum divider supported by hw is 0xffff */
+	if (div_low > 0xffff)
+		div_low = 0xffff;
 
-			if (interrupt & m_I2CM_DONE) {
-				for (index = 0; index < 8; index++)
-					buff[8 * n + index] =
-					hdmi_readb(hdmi, HDMI_I2CM_READ_BUFF0
-						   + index);
-
-				if (n == HDMI_EDID_BLOCK_SIZE / 8 - 1) {
-					ret = 0;
-					printf("[%s] edid read success\n",
-					       __func__);
-					goto exit;
-				}
-				continue;
-			} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
-				printf("[%s] edid read error\n", __func__);
-				rockchip_dw_hdmi_i2cm_reset(hdmi);
-				break;
-			}
-		}
+	if (div_high > 0xffff)
+		div_high = 0xffff;
 
-		printf("[%s] edid try times %d\n", __func__, trytime);
-		mdelay(100);
-	}
-
-exit:
-	/* Disable I2C interrupt */
-	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
-	return ret;
+	hdmi_writeb(hdmi, div_high & 0xff, HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
+	hdmi_writeb(hdmi, (div_high >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_HCNT_1_ADDR);
+	hdmi_writeb(hdmi, div_low & 0xff, HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
+	hdmi_writeb(hdmi, (div_low >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_LCNT_1_ADDR);
 }
 
-static int drm_do_get_edid(struct dw_hdmi *hdmi, u8 *edid)
+static void dw_hdmi_i2c_init(struct dw_hdmi *hdmi)
 {
-	int i, j, block_num, ret;
-
-	/* base block fetch */
-	for (i = 0; i < 3; i++) {
-		ret = dw_hdmi_read_edid(hdmi, 0, edid);
-		if (!ret)
-			break;
-	}
+	/* Software reset */
+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
 
-	if (ret) {
-		printf("get base block failed\n");
-		goto err;
-	}
+	/* Set Standard Mode speed */
+	hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
+		  HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
 
-	/* get the number of extensions */
-	block_num = edid[0x7e];
+	/* Set done, not acknowledged and arbitration interrupt polarities */
+	hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
+	hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL | HDMI_I2CM_CTLINT_ARB_POL,
+		    HDMI_I2CM_CTLINT);
 
-	for (j = 1; j <= block_num; j++) {
-		for (i = 0; i < 3; i++) {
-			ret = dw_hdmi_read_edid(hdmi, j, &edid[0x80 * j]);
-			if (!ret)
-				break;
-		}
-	}
+	/* Clear DONE and ERROR interrupts */
+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+		    HDMI_IH_I2CM_STAT0);
 
-	if (ret) {
-		printf("get extensions failed\n");
-		goto err;
-	}
+	/* Mute DONE and ERROR interrupts */
+	hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0_ERROR | HDMI_IH_I2CM_STAT0_DONE,
+		    HDMI_IH_MUTE_I2CM_STAT0);
 
-	return 0;
+	/* set SDA high level holding time */
+	hdmi_writeb(hdmi, 0x48, HDMI_I2CM_SDA_HOLD);
 
-err:
-	memset(edid, 0, HDMI_EDID_BLOCK_SIZE);
-	return -EFAULT;
+	dw_hdmi_i2c_set_divs(hdmi);
 }
 
 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
@@ -2096,14 +2232,23 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 		return -ENOMEM;
 
 	memset(hdmi, 0, sizeof(struct dw_hdmi));
-
 	mode_buf = malloc(MODE_LEN * sizeof(struct drm_display_mode));
 	if (!mode_buf)
 		return -ENOMEM;
+
 	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
 
 	hdmi->regs = dev_read_addr_ptr(conn_state->dev);
 	hdmi->io_width = ofnode_read_s32_default(hdmi_node, "reg-io-width", -1);
+
+	if (ofnode_read_bool(hdmi_node, "scramble-low-rates"))
+		hdmi->scramble_low_rates = true;
+
+	if (ofnode_read_bool(hdmi_node, "hdcp1x-enable"))
+		hdmi->hdcp1x_enable = true;
+	else
+		hdmi->hdcp1x_enable = false;
+
 	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (hdmi->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -2113,14 +2258,38 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 
 	dw_hdmi_set_reg_wr(hdmi);
 
-	if (crtc_state->crtc_id)
-		val = ((1 << pdata->vop_sel_bit) |
-		       (1 << (16 + pdata->vop_sel_bit)));
-	else
-		val = ((0 << pdata->vop_sel_bit) |
-		       (1 << (16 + pdata->vop_sel_bit)));
-	writel(val, hdmi->grf + pdata->grf_vop_sel_reg);
+	if (pdata->grf_vop_sel_reg) {
+		if (crtc_state->crtc_id)
+			val = ((1 << pdata->vop_sel_bit) |
+			       (1 << (16 + pdata->vop_sel_bit)));
+		else
+			val = ((0 << pdata->vop_sel_bit) |
+			       (1 << (16 + pdata->vop_sel_bit)));
+		writel(val, hdmi->grf + pdata->grf_vop_sel_reg);
+	}
+
+	hdmi->i2c = malloc(sizeof(struct dw_hdmi_i2c));
+	if (!hdmi->i2c)
+		return -ENOMEM;
+	hdmi->adap.ddc_xfer = dw_hdmi_i2c_xfer;
 
+	/*
+	 * Read high and low time from device tree. If not available use
+	 * the default timing scl clock rate is about 99.6KHz.
+	 */
+	hdmi->i2c->scl_high_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-high-time-ns", -1);
+	if (hdmi->i2c->scl_high_ns < 0)
+		hdmi->i2c->scl_high_ns = 4708;
+
+	hdmi->i2c->scl_low_ns =
+		ofnode_read_s32_default(hdmi_node,
+					"ddc-i2c-scl-low-time-ns", -1);
+	if (hdmi->i2c->scl_low_ns < 0)
+		hdmi->i2c->scl_low_ns = 4916;
+
+	dw_hdmi_i2c_init(hdmi);
 	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
 
@@ -2130,6 +2299,7 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	hdmi->sample_rate = 48000;
 
 	conn_state->private = hdmi;
+	dw_hdmi_set_iomux(hdmi->grf, hdmi->dev_type);
 	dw_hdmi_detect_phy(hdmi);
 	dw_hdmi_dev_init(hdmi);
 
@@ -2141,6 +2311,8 @@ void rockchip_dw_hdmi_deinit(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_hdmi *hdmi = conn_state->private;
 
+	if (hdmi->i2c)
+		free(hdmi->i2c);
 	if (hdmi->edid_data.mode_buf)
 		free(hdmi->edid_data.mode_buf);
 	if (hdmi)
@@ -2161,7 +2333,10 @@ int rockchip_dw_hdmi_enable(struct display_state *state)
 	if (!hdmi)
 		return -EFAULT;
 
-	dw_hdmi_setup(hdmi, mode);
+	/* Store the display mode for plugin/DKMS poweron events */
+	memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode));
+
+	dw_hdmi_setup(hdmi, mode, state);
 
 	return 0;
 }
@@ -2171,49 +2346,79 @@ int rockchip_dw_hdmi_disable(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_hdmi *hdmi = conn_state->private;
 
-	dw_hdmi_disable(hdmi);
+	dw_hdmi_disable(hdmi, state);
 	return 0;
 }
 
 int rockchip_dw_hdmi_get_timing(struct display_state *state)
 {
-	int ret;
+	int ret, i;
 	struct connector_state *conn_state = &state->conn_state;
 	struct drm_display_mode *mode = &conn_state->mode;
 	struct dw_hdmi *hdmi = conn_state->private;
+	struct edid *edid = (struct edid *)conn_state->edid;
+	unsigned int bus_format;
+	struct overscan *overscan = &conn_state->overscan;
+	const u8 def_modes_vic[6] = {4, 16, 2, 17, 31, 19};
 
 	if (!hdmi)
 		return -EFAULT;
-	ret = drm_do_get_edid(hdmi, conn_state->edid);
+
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
 	if (!ret) {
+		hdmi->sink_is_hdmi =
+			drm_detect_hdmi_monitor(edid);
+		hdmi->sink_has_audio = drm_detect_monitor_audio(edid);
 		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
+	}
+	if (ret <= 0) {
+		hdmi->sink_is_hdmi = true;
+		hdmi->sink_has_audio = true;
+		do_cea_modes(&hdmi->edid_data, def_modes_vic,
+			     sizeof(def_modes_vic));
+		hdmi->edid_data.preferred_mode = &hdmi->edid_data.mode_buf[0];
+		printf("failed to get edid\n");
+	}
+	drm_rk_filter_whitelist(&hdmi->edid_data);
+	if (hdmi->phy.ops->mode_valid)
+		hdmi->phy.ops->mode_valid(hdmi, state);
+	if (!drm_mode_prune_invalid(&hdmi->edid_data)) {
+		printf("can't find valid hdmi mode\n");
+		return -EINVAL;
+	}
 
-		if (ret > 0) {
-			hdmi->sink_is_hdmi =
-				drm_detect_hdmi_monitor(conn_state->edid);
-			hdmi->sink_has_audio = false;
-			*mode = *hdmi->edid_data.preferred_mode;
-			hdmi->vic = drm_match_cea_mode(mode);
+	for (i = 0; i < hdmi->edid_data.modes; i++)
+		hdmi->edid_data.mode_buf[i].vrefresh =
+			drm_mode_vrefresh(&hdmi->edid_data.mode_buf[i]);
 
-			return 0;
-		}
-	}
+	drm_mode_sort(&hdmi->edid_data);
+	drm_rk_selete_output(&hdmi->edid_data, &bus_format,
+			     overscan, hdmi->dev_type);
 
-	/* if can't get edid timing, use default resolution. */
-	printf("can't get edid timing\n");
-	hdmi->vic = HDMI_VIDEO_DEFAULT_MODE;
-	hdmi->sink_is_hdmi = true;
-	hdmi->sink_has_audio = false;
-	mode->hdisplay = 1280;
-	mode->hsync_start = 1390;
-	mode->hsync_end = 1430;
-	mode->htotal = 1650;
-	mode->vdisplay = 720;
-	mode->vsync_start = 725;
-	mode->vsync_end = 730;
-	mode->vtotal = 750;
-	mode->clock = 74250;
-	mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+	*mode = *hdmi->edid_data.preferred_mode;
+	hdmi->vic = drm_match_cea_mode(mode);
+
+	printf("mode:%dx%d\n", mode->hdisplay, mode->vdisplay);
+	conn_state->bus_format = bus_format;
+	hdmi->hdmi_data.enc_in_bus_format = bus_format;
+	hdmi->hdmi_data.enc_out_bus_format = bus_format;
+
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+		conn_state->bus_format = MEDIA_BUS_FMT_YUV10_1X30;
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_YUV10_1X30;
+		break;
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+		conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_YUV8_1X24;
+		break;
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_YUV420;
+		break;
+	}
 
 	return 0;
 }
@@ -2227,7 +2432,7 @@ int rockchip_dw_hdmi_detect(struct display_state *state)
 	if (!hdmi)
 		return -EFAULT;
 
-	ret = dw_hdmi_detect_hotplug(hdmi);
+	ret = dw_hdmi_detect_hotplug(hdmi, state);
 
 	return ret;
 }
@@ -2238,8 +2443,77 @@ int rockchip_dw_hdmi_get_edid(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_hdmi *hdmi = conn_state->private;
 
-	ret = drm_do_get_edid(hdmi, conn_state->edid);
+	ret = drm_do_get_edid(&hdmi->adap, conn_state->edid);
 
 	return ret;
 }
 
+int inno_dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data)
+{
+	struct display_state *state = (struct display_state *)data;
+	struct connector_state *conn_state = &state->conn_state;
+	u32 color_depth, bus_width;
+
+	color_depth =
+		hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format);
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		bus_width = color_depth / 2;
+	else if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		bus_width = color_depth;
+	else
+		bus_width = 8;
+	rockchip_phy_set_bus_width(state, bus_width);
+	rockchip_phy_set_pll(state, conn_state->mode.crtc_clock * 1000);
+	if (hdmi->edid_data.display_info.hdmi.scdc.supported)
+		rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi);
+	rockchip_phy_power_on(state);
+
+	return 0;
+}
+
+void inno_dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
+{
+}
+
+enum drm_connector_status
+inno_dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi, void *data)
+{
+	enum drm_connector_status status;
+	struct display_state *state = (struct display_state *)data;
+
+	status = dw_hdmi_phy_read_hpd(hdmi, state);
+
+	if (hdmi->dev_type == RK3328_HDMI) {
+		if (status == connector_status_connected)
+			inno_dw_hdmi_set_domain(hdmi->grf, 1);
+		else
+			inno_dw_hdmi_set_domain(hdmi->grf, 0);
+	}
+
+	return status;
+}
+
+void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data)
+{
+	struct display_state *state = (struct display_state *)data;
+	struct hdmi_edid_data *edid_data = &hdmi->edid_data;
+	unsigned long rate;
+	int i, ret;
+	struct drm_display_mode *mode_buf = edid_data->mode_buf;
+
+	for (i = 0; i < edid_data->modes; i++) {
+		if (edid_data->mode_buf[i].invalid)
+			continue;
+		if (edid_data->mode_buf[i].flags & DRM_MODE_FLAG_DBLCLK)
+			rate = mode_buf[i].clock * 1000 * 2;
+		else
+			rate = mode_buf[i].clock * 1000;
+
+		/* Check whether mode is out of phy cfg range. */
+		ret = rockchip_phy_round_rate(state, rate);
+
+		if (ret < 0)
+			edid_data->mode_buf[i].invalid = true;
+	}
+}
diff --git a/drivers/video/drm/dw_hdmi.h b/drivers/video/drm/dw_hdmi.h
index 5f9c48befa..f3df9f6054 100644
--- a/drivers/video/drm/dw_hdmi.h
+++ b/drivers/video/drm/dw_hdmi.h
@@ -487,6 +487,22 @@
 #define HDMI_A_PRESETUP                         0x501A
 #define HDMI_A_SRM_BASE                         0x5020
 
+/* HDCP Registers */
+#define HDMI_HDCPREG_RMCTL                      0x780e
+#define HDMI_HDCPREG_RMSTS                      0x780f
+#define HDMI_HDCPREG_SEED0                      0x7810
+#define HDMI_HDCPREG_SEED1                      0x7811
+#define HDMI_HDCPREG_DPK0                       0x7812
+#define HDMI_HDCPREG_DPK1                       0x7813
+#define HDMI_HDCPREG_DPK2                       0x7814
+#define HDMI_HDCPREG_DPK3                       0x7815
+#define HDMI_HDCPREG_DPK4                       0x7816
+#define HDMI_HDCPREG_DPK5                       0x7817
+#define HDMI_HDCPREG_DPK6                       0x7818
+#define HDMI_HDCP2REG_CTRL                      0x7904
+#define HDMI_HDCP2REG_MASK                      0x790c
+#define HDMI_HDCP2REG_MUTE                      0x790e
+
 /* CEC Engine Registers */
 #define HDMI_CEC_CTRL                           0x7D00
 #define HDMI_CEC_STAT                           0x7D01
@@ -1203,6 +1219,55 @@ enum {
 	HDMI_MC_SWRSTZ_I2S_RESET_MSK = BIT(3),
 };
 
+enum {
+	HDMI_MC_CLKDIS_HDCPCLK_MASK = 0x40,
+	HDMI_MC_CLKDIS_HDCPCLK_ENABLE = 0x00,
+
+	HDMI_A_SRMCTRL_SHA1_FAIL_MASK = 0X08,
+	HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE = 0X08,
+
+	HDMI_A_SRMCTRL_KSV_UPDATE_MASK = 0X04,
+	HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE = 0X04,
+
+	HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK = 0X01,
+	HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE = 0X01,
+
+	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK = 0X02,
+	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_DISABLE = 0X00,
+	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_ENABLE = 0X02,
+
+	HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED = 0x80,
+	HDMI_A_SRM_BASE_DEVICE_COUNT = 0x7f,
+
+	HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED = 0x08,
+
+	HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT = 0x02,
+
+	/* HDCPREG_RMSTS field values */
+	DPK_WR_OK_STS = 0x40,
+
+	HDMI_A_HDCP22_MASK = 0x40,
+
+	HDMI_HDCP2_OVR_EN_MASK = 0x02,
+	HDMI_HDCP2_OVR_ENABLE = 0x02,
+	HDMI_HDCP2_OVR_DISABLE = 0x00,
+
+	HDMI_HDCP2_FORCE_MASK = 0x04,
+	HDMI_HDCP2_FORCE_ENABLE = 0x04,
+	HDMI_HDCP2_FORCE_DISABLE = 0x00,
+};
+
+enum {
+	DW_HDMI_HDCP_KSV_LEN = 8,
+	DW_HDMI_HDCP_SHA_LEN = 20,
+	DW_HDMI_HDCP_DPK_LEN = 280,
+	DW_HDMI_HDCP_KEY_LEN = 308,
+	DW_HDMI_HDCP_SEED_LEN = 2,
+};
+
 /*
  * HDMI 3D TX PHY registers
  */
@@ -1339,4 +1404,14 @@ enum {
 	FAST_MODE
 };
 
+void drm_mode_sort(struct hdmi_edid_data *edid_data);
+int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data);
+void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data);
+void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
+			  unsigned int *bus_format,
+			  struct overscan *overscan,
+			  enum dw_hdmi_devtype dev_type);
+void inno_dw_hdmi_set_domain(void *grf, int status);
+void dw_hdmi_set_iomux(void *grf, int dev_type);
+
 #endif /* _ROCKCHIP_HDMI_H_ */
diff --git a/drivers/video/drm/rockchip-inno-hdmi-phy.c b/drivers/video/drm/rockchip-inno-hdmi-phy.c
new file mode 100644
index 0000000000..99d1c922ab
--- /dev/null
+++ b/drivers/video/drm/rockchip-inno-hdmi-phy.c
@@ -0,0 +1,1087 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <misc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <div64.h>
+#include <linux/media-bus-format.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+
+#define INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT	1000
+/*#define UPDATE(x, h, l)	(((x) << (l)) & GENMASK((h), (l)))*/
+
+/* REG: 0x00 */
+#define PRE_PLL_REFCLK_SEL_MASK			BIT(0)
+#define PRE_PLL_REFCLK_SEL_PCLK			BIT(0)
+#define PRE_PLL_REFCLK_SEL_OSCCLK		0
+/* REG: 0x01 */
+#define BYPASS_RXSENSE_EN_MASK			BIT(2)
+#define BYPASS_RXSENSE_EN			BIT(2)
+#define BYPASS_PWRON_EN_MASK			BIT(1)
+#define BYPASS_PWRON_EN				BIT(1)
+#define BYPASS_PLLPD_EN_MASK			BIT(0)
+#define BYPASS_PLLPD_EN				BIT(0)
+/* REG: 0x02 */
+#define BYPASS_PDATA_EN_MASK			BIT(4)
+#define BYPASS_PDATA_EN				BIT(4)
+#define PDATAEN_MASK				BIT(0)
+#define PDATAEN_DISABLE				BIT(0)
+#define PDATAEN_ENABLE				0
+/* REG: 0x03 */
+#define BYPASS_AUTO_TERM_RES_CAL		BIT(7)
+#define AUDO_TERM_RES_CAL_SPEED_14_8(x)		UPDATE(x, 6, 0)
+/* REG: 0x04 */
+#define AUDO_TERM_RES_CAL_SPEED_7_0(x)		UPDATE(x, 7, 0)
+/* REG: 0xaa */
+#define POST_PLL_CTRL_MASK			BIT(0)
+#define POST_PLL_CTRL_MANUAL			BIT(0)
+/* REG: 0xe0 */
+#define POST_PLL_POWER_MASK			BIT(5)
+#define POST_PLL_POWER_DOWN			BIT(5)
+#define POST_PLL_POWER_UP			0
+#define PRE_PLL_POWER_MASK			BIT(4)
+#define PRE_PLL_POWER_DOWN			BIT(4)
+#define PRE_PLL_POWER_UP			0
+#define RXSENSE_CLK_CH_MASK			BIT(3)
+#define RXSENSE_CLK_CH_ENABLE			BIT(3)
+#define RXSENSE_DATA_CH2_MASK			BIT(2)
+#define RXSENSE_DATA_CH2_ENABLE			BIT(2)
+#define RXSENSE_DATA_CH1_MASK			BIT(1)
+#define RXSENSE_DATA_CH1_ENABLE			BIT(1)
+#define RXSENSE_DATA_CH0_MASK			BIT(0)
+#define RXSENSE_DATA_CH0_ENABLE			BIT(0)
+/* REG: 0xe1 */
+#define BANDGAP_MASK				BIT(4)
+#define BANDGAP_ENABLE				BIT(4)
+#define BANDGAP_DISABLE				0
+#define TMDS_DRIVER_MASK			GENMASK(3, 0)
+#define TMDS_DRIVER_ENABLE			UPDATE(0xf, 3, 0)
+#define TMDS_DRIVER_DISABLE			0
+/* REG: 0xe2 */
+#define PRE_PLL_FB_DIV_8_MASK			BIT(7)
+#define PRE_PLL_FB_DIV_8_SHIFT			7
+#define PRE_PLL_FB_DIV_8(x)			UPDATE(x, 7, 7)
+#define PCLK_VCO_DIV_5_MASK			BIT(5)
+#define PCLK_VCO_DIV_5_SHIFT			5
+#define PCLK_VCO_DIV_5(x)			UPDATE(x, 5, 5)
+#define PRE_PLL_PRE_DIV_MASK			GENMASK(4, 0)
+#define PRE_PLL_PRE_DIV(x)			UPDATE(x, 4, 0)
+/* REG: 0xe3 */
+#define PRE_PLL_FB_DIV_7_0(x)			UPDATE(x, 7, 0)
+/* REG: 0xe4 */
+#define PRE_PLL_PCLK_DIV_B_MASK			GENMASK(6, 5)
+#define PRE_PLL_PCLK_DIV_B_SHIFT		5
+#define PRE_PLL_PCLK_DIV_B(x)			UPDATE(x, 6, 5)
+#define PRE_PLL_PCLK_DIV_A_MASK			GENMASK(4, 0)
+#define PRE_PLL_PCLK_DIV_A_SHIFT		0
+#define PRE_PLL_PCLK_DIV_A(x)			UPDATE(x, 4, 0)
+/* REG: 0xe5 */
+#define PRE_PLL_PCLK_DIV_C_MASK			GENMASK(6, 5)
+#define PRE_PLL_PCLK_DIV_C_SHIFT		5
+#define PRE_PLL_PCLK_DIV_C(x)			UPDATE(x, 6, 5)
+#define PRE_PLL_PCLK_DIV_D_MASK			GENMASK(4, 0)
+#define PRE_PLL_PCLK_DIV_D_SHIFT		0
+#define PRE_PLL_PCLK_DIV_D(x)			UPDATE(x, 4, 0)
+/* REG: 0xe6 */
+#define PRE_PLL_TMDSCLK_DIV_C_MASK		GENMASK(5, 4)
+#define PRE_PLL_TMDSCLK_DIV_C(x)		UPDATE(x, 5, 4)
+#define PRE_PLL_TMDSCLK_DIV_A_MASK		GENMASK(3, 2)
+#define PRE_PLL_TMDSCLK_DIV_A(x)		UPDATE(x, 3, 2)
+#define PRE_PLL_TMDSCLK_DIV_B_MASK		GENMASK(1, 0)
+#define PRE_PLL_TMDSCLK_DIV_B(x)		UPDATE(x, 1, 0)
+/* REG: 0xe8 */
+#define PRE_PLL_LOCK_STATUS			BIT(0)
+/* REG: 0xe9 */
+#define POST_PLL_POST_DIV_EN_MASK		GENMASK(7, 6)
+#define POST_PLL_POST_DIV_ENABLE		UPDATE(3, 7, 6)
+#define POST_PLL_POST_DIV_DISABLE		0
+#define POST_PLL_PRE_DIV_MASK			GENMASK(4, 0)
+#define POST_PLL_PRE_DIV(x)			UPDATE(x, 4, 0)
+/* REG: 0xea */
+#define POST_PLL_FB_DIV_7_0(x)			UPDATE(x, 7, 0)
+/* REG: 0xeb */
+#define POST_PLL_FB_DIV_8_MASK			BIT(7)
+#define POST_PLL_FB_DIV_8(x)			UPDATE(x, 7, 7)
+#define POST_PLL_POST_DIV_MASK			GENMASK(5, 4)
+#define POST_PLL_POST_DIV(x)			UPDATE(x, 5, 4)
+#define POST_PLL_LOCK_STATUS			BIT(0)
+/* REG: 0xee */
+#define TMDS_CH_TA_MASK				GENMASK(7, 4)
+#define TMDS_CH_TA_ENABLE			UPDATE(0xf, 7, 4)
+#define TMDS_CH_TA_DISABLE			0
+/* REG: 0xef */
+#define TMDS_CLK_CH_TA(x)			UPDATE(x, 7, 6)
+#define TMDS_DATA_CH2_TA(x)			UPDATE(x, 5, 4)
+#define TMDS_DATA_CH1_TA(x)			UPDATE(x, 3, 2)
+#define TMDS_DATA_CH0_TA(x)			UPDATE(x, 1, 0)
+/* REG: 0xf0 */
+#define TMDS_DATA_CH2_PRE_EMPHASIS_MASK		GENMASK(5, 4)
+#define TMDS_DATA_CH2_PRE_EMPHASIS(x)		UPDATE(x, 5, 4)
+#define TMDS_DATA_CH1_PRE_EMPHASIS_MASK		GENMASK(3, 2)
+#define TMDS_DATA_CH1_PRE_EMPHASIS(x)		UPDATE(x, 3, 2)
+#define TMDS_DATA_CH0_PRE_EMPHASIS_MASK		GENMASK(1, 0)
+#define TMDS_DATA_CH0_PRE_EMPHASIS(x)		UPDATE(x, 1, 0)
+/* REG: 0xf1 */
+#define TMDS_CLK_CH_OUTPUT_SWING(x)		UPDATE(x, 7, 4)
+#define TMDS_DATA_CH2_OUTPUT_SWING(x)		UPDATE(x, 3, 0)
+/* REG: 0xf2 */
+#define TMDS_DATA_CH1_OUTPUT_SWING(x)		UPDATE(x, 7, 4)
+#define TMDS_DATA_CH0_OUTPUT_SWING(x)		UPDATE(x, 3, 0)
+
+enum inno_hdmi_phy_type {
+	INNO_HDMI_PHY_RK3228,
+	INNO_HDMI_PHY_RK3328
+};
+
+struct inno_hdmi_phy_drv_data;
+
+struct phy_config {
+	unsigned long	tmdsclock;
+	u8		regs[14];
+};
+
+struct inno_hdmi_phy {
+	const void *blob;
+	ofnode node;
+	void *regs;
+
+	/* platform data */
+	const struct inno_hdmi_phy_drv_data *plat_data;
+	unsigned long pixclock;
+	u32 bus_width;
+	struct phy_config *phy_cfg;
+};
+
+struct pre_pll_config {
+	unsigned long pixclock;
+	unsigned long tmdsclock;
+	u8 prediv;
+	u16 fbdiv;
+	u8 tmds_div_a;
+	u8 tmds_div_b;
+	u8 tmds_div_c;
+	u8 pclk_div_a;
+	u8 pclk_div_b;
+	u8 pclk_div_c;
+	u8 pclk_div_d;
+	u8 vco_div_5_en;
+	u32 fracdiv;
+};
+
+struct post_pll_config {
+	unsigned long tmdsclock;
+	u8 prediv;
+	u16 fbdiv;
+	u8 postdiv;
+	u8 version;
+};
+
+struct inno_hdmi_phy_ops {
+	void (*init)(struct inno_hdmi_phy *inno);
+	int (*power_on)(struct inno_hdmi_phy *inno,
+			const struct post_pll_config *cfg,
+			const struct phy_config *phy_cfg);
+	void (*power_off)(struct inno_hdmi_phy *inno);
+	int (*pre_pll_update)(struct inno_hdmi_phy *inno,
+			      const struct pre_pll_config *cfg);
+	unsigned long (*recalc_rate)(struct inno_hdmi_phy *inno,
+				     unsigned long parent_rate);
+};
+
+struct inno_hdmi_phy_drv_data {
+	enum inno_hdmi_phy_type		dev_type;
+	const struct inno_hdmi_phy_ops	*ops;
+	const struct phy_config		*phy_cfg_table;
+};
+
+struct rockchip_inno_data {
+	char compatible[30];
+	const void *data;
+};
+
+static const struct pre_pll_config pre_pll_cfg_table[] = {
+	{ 27000000,  27000000, 1,  90, 3, 2, 2, 10, 3, 3, 4, 0, 0},
+	{ 27000000,  33750000, 1,  90, 1, 3, 3, 10, 3, 3, 4, 0, 0},
+	{ 40000000,  40000000, 1,  80, 2, 2, 2, 12, 2, 2, 2, 0, 0},
+	{ 59341000,  59341000, 1,  98, 3, 1, 2,  1, 3, 3, 4, 0, 0xE6AE6B},
+	{ 59400000,  59400000, 1,  99, 3, 1, 1,  1, 3, 3, 4, 0, 0},
+	{ 59341000,  74176250, 1,  98, 0, 3, 3,  1, 3, 3, 4, 0, 0xE6AE6B},
+	{ 59400000,  74250000, 1,  99, 1, 2, 2,  1, 3, 3, 4, 0, 0},
+	{ 74176000,  74176000, 1,  98, 1, 2, 2,  1, 2, 3, 4, 0, 0xE6AE6B},
+	{ 74250000,  74250000, 1,  99, 1, 2, 2,  1, 2, 3, 4, 0, 0},
+	{ 74176000,  92720000, 4, 494, 1, 2, 2,  1, 3, 3, 4, 0, 0x816817},
+	{ 74250000,  92812500, 4, 495, 1, 2, 2,  1, 3, 3, 4, 0, 0},
+	{148352000, 148352000, 1,  98, 1, 1, 1,  1, 2, 2, 2, 0, 0xE6AE6B},
+	{148500000, 148500000, 1,  99, 1, 1, 1,  1, 2, 2, 2, 0, 0},
+	{148352000, 185440000, 4, 494, 0, 2, 2,  1, 3, 2, 2, 0, 0x816817},
+	{148500000, 185625000, 4, 495, 0, 2, 2,  1, 3, 2, 2, 0, 0},
+	{296703000, 296703000, 1,  98, 0, 1, 1,  1, 0, 2, 2, 0, 0xE6AE6B},
+	{297000000, 297000000, 1,  99, 0, 1, 1,  1, 0, 2, 2, 0, 0},
+	{296703000, 370878750, 4, 494, 1, 2, 0,  1, 3, 1, 1, 0, 0x816817},
+	{297000000, 371250000, 4, 495, 1, 2, 0,  1, 3, 1, 1, 0, 0},
+	{593407000, 296703500, 1,  98, 0, 1, 1,  1, 0, 2, 1, 0, 0xE6AE6B},
+	{594000000, 297000000, 1,  99, 0, 1, 1,  1, 0, 2, 1, 0, 0},
+	{593407000, 370879375, 4, 494, 1, 2, 0,  1, 3, 1, 1, 1, 0x816817},
+	{594000000, 371250000, 4, 495, 1, 2, 0,  1, 3, 1, 1, 1, 0},
+	{593407000, 593407000, 1,  98, 0, 2, 0,  1, 0, 1, 1, 0, 0xE6AE6B},
+	{594000000, 594000000, 1,  99, 0, 2, 0,  1, 0, 1, 1, 0, 0},
+	{     ~0UL,	    0, 0,   0, 0, 0, 0,  0, 0, 0, 0, 0, 0}
+};
+
+static const struct post_pll_config post_pll_cfg_table[] = {
+	{33750000,  1, 40, 8, 1},
+	{33750000,  1, 80, 8, 2},
+	{33750000,  1, 10, 2, 4},
+	{74250000,  1, 40, 8, 1},
+	{74250000, 18, 80, 8, 2},
+	{148500000, 2, 40, 4, 3},
+	{297000000, 4, 40, 2, 3},
+	{594000000, 8, 40, 1, 3},
+	{     ~0UL, 0,  0, 0, 0}
+};
+
+static const struct phy_config rk3228_phy_cfg[] = {
+	{	165000000, {
+			0xaa, 0x00, 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}, {
+		340000000, {
+			0xaa, 0x15, 0x6a, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}, {
+		594000000, {
+			0xaa, 0x15, 0x7a, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}, {
+		~0UL, {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}
+};
+
+static const struct phy_config rk3328_phy_cfg[] = {
+	{	165000000, {
+			0x07, 0x08, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x08,
+			0x00, 0xac, 0xcc, 0xcc, 0xcc,
+		},
+	}, {
+		340000000, {
+			0x0b, 0x0d, 0x0d, 0x0d, 0x07, 0x15, 0x08, 0x08, 0x08,
+			0x3f, 0xac, 0xcc, 0xcd, 0xdd,
+		},
+	}, {
+		594000000, {
+			0x10, 0x1a, 0x1a, 0x1a, 0x07, 0x15, 0x08, 0x08, 0x08,
+			0x00, 0xac, 0xcc, 0xcc, 0xcc,
+		},
+	}, {
+		~0UL, {
+			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+			0x00, 0x00, 0x00, 0x00, 0x00,
+		},
+	}
+};
+
+static inline void inno_write(struct inno_hdmi_phy *inno, u32 reg, u8 val)
+{
+	writel(val, inno->regs + (reg * 4));
+}
+
+static inline u8 inno_read(struct inno_hdmi_phy *inno, u32 reg)
+{
+	u32 val;
+
+	val = readl(inno->regs + (reg * 4));
+
+	return val;
+}
+
+static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg,
+				    u8 mask, u8 val)
+{
+	u32 tmp, orig;
+
+	orig = inno_read(inno, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	inno_write(inno, reg, tmp);
+}
+
+static u32 inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno,
+				     unsigned long rate)
+{
+	u32 tmdsclk;
+
+	switch (inno->bus_width) {
+	case 4:
+		tmdsclk = (u32)rate / 2;
+		break;
+	case 5:
+		tmdsclk = (u32)rate * 5 / 8;
+		break;
+	case 6:
+		tmdsclk = (u32)rate * 3 / 4;
+		break;
+	case 10:
+		tmdsclk = (u32)rate * 5 / 4;
+		break;
+	case 12:
+		tmdsclk = (u32)rate * 3 / 2;
+		break;
+	case 16:
+		tmdsclk = (u32)rate * 2;
+		break;
+	default:
+		tmdsclk = rate;
+	}
+
+	return tmdsclk;
+}
+
+static u8 rk_get_cpu_version(void)
+{
+	u8 val = 0;
+#ifdef CONFIG_ROCKCHIP_EFUSE
+	struct udevice *dev;
+	u32 regs[2] = {0};
+	u8 fuses[1];
+	ofnode node;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_efuse), &dev);
+	if (ret) {
+		printf("%s: no misc-device found\n", __func__);
+		return -EINVAL;
+	}
+
+	node = dev_read_subnode(dev, "cpu-version");
+	if (!ofnode_valid(node))
+		return -EINVAL;
+
+	ret = ofnode_read_u32_array(node, "reg", regs, 2);
+	if (ret) {
+		printf("Cannot get efuse reg\n");
+		return -EINVAL;
+	}
+
+	ret = misc_read(dev, regs[0], &fuses, regs[1]);
+	if (ret) {
+		printf("%s: misc_read failed\n", __func__);
+		return 0;
+	}
+
+	val = fuses[0];
+	val = (val >> 3) & 0x1;
+#endif
+	return val;
+}
+
+static int inno_hdmi_phy_power_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	const struct post_pll_config *cfg = post_pll_cfg_table;
+	const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table;
+	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno->pixclock);
+	u32 chipversion = 1;
+
+	printf("start Inno HDMI PHY Power On\n");
+
+	if (inno->phy_cfg)
+		phy_cfg = inno->phy_cfg;
+
+	if (!tmdsclock) {
+		printf("TMDS clock is zero!\n");
+		return -EINVAL;
+	}
+
+	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3328 &&
+	    rk_get_cpu_version())
+		chipversion = 2;
+	else if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228 &&
+		 tmdsclock <= 33750000)
+		chipversion = 4;
+
+	printf("tmdsclock = %d; chipversion = %d\n", tmdsclock, chipversion);
+
+	for (; cfg->tmdsclock != ~0UL; cfg++)
+		if (tmdsclock <= cfg->tmdsclock &&
+		    cfg->version & chipversion)
+			break;
+
+	for (; phy_cfg->tmdsclock != ~0UL; phy_cfg++)
+		if (tmdsclock <= phy_cfg->tmdsclock)
+			break;
+
+	if (cfg->tmdsclock == ~0UL || phy_cfg->tmdsclock == ~0UL)
+		return -EINVAL;
+
+	printf("Inno HDMI PHY Power On\n");
+	if (inno->plat_data->ops->power_on)
+		return inno->plat_data->ops->power_on(inno, cfg, phy_cfg);
+	else
+		return -EINVAL;
+}
+
+static int inno_hdmi_phy_power_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+
+	if (inno->plat_data->ops->power_off)
+		inno->plat_data->ops->power_off(inno);
+	printf("Inno HDMI PHY Power Off\n");
+
+	return 0;
+}
+
+static int inno_hdmi_phy_clk_is_prepared(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	u8 status;
+
+	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
+		status = inno_read(inno, 0xe0) & PRE_PLL_POWER_MASK;
+	else
+		status = inno_read(inno, 0xa0) & 1;
+
+	return status ? 0 : 1;
+}
+
+static int inno_hdmi_phy_clk_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+
+	if (inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228)
+		inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK,
+				 PRE_PLL_POWER_UP);
+	else
+		inno_update_bits(inno, 0xa0, 1, 0);
+
+	return 0;
+}
+
+static int inno_hdmi_phy_clk_set_rate(struct display_state *state,
+				      unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	const struct pre_pll_config *cfg = pre_pll_cfg_table;
+	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
+
+	for (; cfg->pixclock != ~0UL; cfg++)
+		if (cfg->pixclock == rate && cfg->tmdsclock == tmdsclock)
+			break;
+
+	if (cfg->pixclock == ~0UL) {
+		printf("unsupported rate %lu\n", rate);
+		return -EINVAL;
+	}
+
+	if (inno->plat_data->ops->pre_pll_update)
+		inno->plat_data->ops->pre_pll_update(inno, cfg);
+
+	inno->pixclock = rate;
+
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3228_init(struct inno_hdmi_phy *inno)
+{
+	u32 m, v;
+
+	/*
+	 * Use phy internal register control
+	 * rxsense/poweron/pllpd/pdataen signal.
+	 */
+	m = BYPASS_RXSENSE_EN_MASK | BYPASS_PWRON_EN_MASK |
+	    BYPASS_PLLPD_EN_MASK;
+	v = BYPASS_RXSENSE_EN | BYPASS_PWRON_EN | BYPASS_PLLPD_EN;
+	inno_update_bits(inno, 0x01, m, v);
+	inno_update_bits(inno, 0x02, BYPASS_PDATA_EN_MASK, BYPASS_PDATA_EN);
+
+	/* manual power down post-PLL */
+	inno_update_bits(inno, 0xaa, POST_PLL_CTRL_MASK, POST_PLL_CTRL_MANUAL);
+}
+
+static int
+inno_hdmi_phy_rk3228_power_on(struct inno_hdmi_phy *inno,
+			      const struct post_pll_config *cfg,
+			      const struct phy_config *phy_cfg)
+{
+	int pll_tries;
+	u32 m, v;
+
+	/* pdata_en disable */
+	inno_update_bits(inno, 0x02, PDATAEN_MASK, PDATAEN_DISABLE);
+
+	/* Power down Post-PLL */
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_DOWN);
+	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_DOWN);
+
+	/* Post-PLL update */
+	m = POST_PLL_PRE_DIV_MASK;
+	v = POST_PLL_PRE_DIV(cfg->prediv);
+	inno_update_bits(inno, 0xe9, m, v);
+
+	m = POST_PLL_FB_DIV_8_MASK;
+	v = POST_PLL_FB_DIV_8(cfg->fbdiv >> 8);
+	inno_update_bits(inno, 0xeb, m, v);
+	inno_write(inno, 0xea, POST_PLL_FB_DIV_7_0(cfg->fbdiv));
+
+	if (cfg->postdiv == 1) {
+		/* Disable Post-PLL post divider */
+		m = POST_PLL_POST_DIV_EN_MASK;
+		v = POST_PLL_POST_DIV_DISABLE;
+		inno_update_bits(inno, 0xe9, m, v);
+	} else {
+		/* Enable Post-PLL post divider */
+		m = POST_PLL_POST_DIV_EN_MASK;
+		v = POST_PLL_POST_DIV_ENABLE;
+		inno_update_bits(inno, 0xe9, m, v);
+
+		m = POST_PLL_POST_DIV_MASK;
+		v = POST_PLL_POST_DIV(cfg->postdiv / 2 - 1);
+		inno_update_bits(inno, 0xeb, m, v);
+	}
+
+	for (v = 0; v < 4; v++)
+		inno_write(inno, 0xef + v, phy_cfg->regs[v]);
+
+	/* Power up Post-PLL */
+	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_UP);
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_UP);
+
+	/* BandGap enable */
+	inno_update_bits(inno, 0xe1, BANDGAP_MASK, BANDGAP_ENABLE);
+
+	/* TMDS driver enable */
+	inno_update_bits(inno, 0xe1, TMDS_DRIVER_MASK, TMDS_DRIVER_ENABLE);
+
+	/* Wait for post PLL lock */
+	pll_tries = 0;
+	while (!(inno_read(inno, 0xeb) & POST_PLL_LOCK_STATUS)) {
+		if (pll_tries == INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT) {
+			printf("Post-PLL unlock\n");
+			return -ETIMEDOUT;
+		}
+
+		pll_tries++;
+		udelay(100);
+	}
+
+	if (cfg->tmdsclock > 340000000)
+		mdelay(100);
+
+	/* pdata_en enable */
+	inno_update_bits(inno, 0x02, PDATAEN_MASK, PDATAEN_ENABLE);
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3228_power_off(struct inno_hdmi_phy *inno)
+{
+	/* TMDS driver Disable */
+	inno_update_bits(inno, 0xe1, TMDS_DRIVER_MASK, TMDS_DRIVER_DISABLE);
+
+	/* BandGap Disable */
+	inno_update_bits(inno, 0xe1, BANDGAP_MASK, BANDGAP_DISABLE);
+
+	/* Post-PLL power down */
+	inno_update_bits(inno, 0xe0, POST_PLL_POWER_MASK, POST_PLL_POWER_DOWN);
+}
+
+static int
+inno_hdmi_phy_rk3228_pre_pll_update(struct inno_hdmi_phy *inno,
+				    const struct pre_pll_config *cfg)
+{
+	int pll_tries;
+	u32 m, v;
+
+	/* Power down PRE-PLL */
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_DOWN);
+
+	m = PRE_PLL_FB_DIV_8_MASK | PCLK_VCO_DIV_5_MASK | PRE_PLL_PRE_DIV_MASK;
+	v = PRE_PLL_FB_DIV_8(cfg->fbdiv >> 8) |
+	    PCLK_VCO_DIV_5(cfg->vco_div_5_en) | PRE_PLL_PRE_DIV(cfg->prediv);
+	inno_update_bits(inno, 0xe2, m, v);
+
+	inno_write(inno, 0xe3, PRE_PLL_FB_DIV_7_0(cfg->fbdiv));
+
+	m = PRE_PLL_PCLK_DIV_B_MASK | PRE_PLL_PCLK_DIV_A_MASK;
+	v = PRE_PLL_PCLK_DIV_B(cfg->pclk_div_b) |
+	    PRE_PLL_PCLK_DIV_A(cfg->pclk_div_a);
+	inno_update_bits(inno, 0xe4, m, v);
+
+	m = PRE_PLL_PCLK_DIV_C_MASK | PRE_PLL_PCLK_DIV_D_MASK;
+	v = PRE_PLL_PCLK_DIV_C(cfg->pclk_div_c) |
+	    PRE_PLL_PCLK_DIV_D(cfg->pclk_div_d);
+	inno_update_bits(inno, 0xe5, m, v);
+
+	m = PRE_PLL_TMDSCLK_DIV_C_MASK | PRE_PLL_TMDSCLK_DIV_A_MASK |
+	    PRE_PLL_TMDSCLK_DIV_B_MASK;
+	v = PRE_PLL_TMDSCLK_DIV_C(cfg->tmds_div_c) |
+	    PRE_PLL_TMDSCLK_DIV_A(cfg->tmds_div_a) |
+	    PRE_PLL_TMDSCLK_DIV_B(cfg->tmds_div_b);
+	inno_update_bits(inno, 0xe6, m, v);
+
+	/* Power up PRE-PLL */
+	inno_update_bits(inno, 0xe0, PRE_PLL_POWER_MASK, PRE_PLL_POWER_UP);
+
+	/* Wait for Pre-PLL lock */
+	pll_tries = 0;
+	while (!(inno_read(inno, 0xe8) & PRE_PLL_LOCK_STATUS)) {
+		if (pll_tries == INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT) {
+			printf("Pre-PLL unlock\n");
+			return -ETIMEDOUT;
+		}
+
+		pll_tries++;
+		udelay(100);
+	}
+
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3328_init(struct inno_hdmi_phy *inno)
+{
+	/*
+	 * Use phy internal register control
+	 * rxsense/poweron/pllpd/pdataen signal.
+	 */
+	inno_write(inno, 0x01, 0x07);
+	inno_write(inno, 0x02, 0x91);
+}
+
+static int
+inno_hdmi_phy_rk3328_power_on(struct inno_hdmi_phy *inno,
+			      const struct post_pll_config *cfg,
+			      const struct phy_config *phy_cfg)
+{
+	u32 val;
+
+	/* set pdata_en to 0 */
+	inno_update_bits(inno, 0x02, 1, 0);
+	/* Power off post PLL */
+	inno_update_bits(inno, 0xaa, 1, 1);
+
+	val = cfg->fbdiv & 0xff;
+	inno_write(inno, 0xac, val);
+	if (cfg->postdiv == 1) {
+		inno_write(inno, 0xaa, 2);
+		val = (cfg->fbdiv >> 8) | cfg->prediv;
+		inno_write(inno, 0xab, val);
+	} else {
+		val = (cfg->postdiv / 2) - 1;
+		inno_write(inno, 0xad, val);
+		val = (cfg->fbdiv >> 8) | cfg->prediv;
+		inno_write(inno, 0xab, val);
+		inno_write(inno, 0xaa, 0x0e);
+	}
+
+	for (val = 0; val < 14; val++)
+		inno_write(inno, 0xb5 + val, phy_cfg->regs[val]);
+
+	/* bit[7:6] of reg c8/c9/ca/c8 is ESD detect threshold:
+	 * 00 - 340mV
+	 * 01 - 280mV
+	 * 10 - 260mV
+	 * 11 - 240mV
+	 * default is 240mV, now we set it to 340mV
+	 */
+	inno_write(inno, 0xc8, 0);
+	inno_write(inno, 0xc9, 0);
+	inno_write(inno, 0xca, 0);
+	inno_write(inno, 0xcb, 0);
+
+	if (phy_cfg->tmdsclock > 340000000) {
+		/* Set termination resistor to 100ohm */
+		val = 75000000 / 100000;
+		inno_write(inno, 0xc5, ((val >> 8) & 0xff) | 0x80);
+		inno_write(inno, 0xc6, val & 0xff);
+		inno_write(inno, 0xc7, 3 << 1);
+		inno_write(inno, 0xc5, ((val >> 8) & 0xff));
+	} else if (phy_cfg->tmdsclock > 165000000) {
+		inno_write(inno, 0xc5, 0x81);
+		/* clk termination resistor is 50ohm
+		 * data termination resistor is 150ohm
+		 */
+		inno_write(inno, 0xc8, 0x30);
+		inno_write(inno, 0xc9, 0x10);
+		inno_write(inno, 0xca, 0x10);
+		inno_write(inno, 0xcb, 0x10);
+	} else {
+		inno_write(inno, 0xc5, 0x81);
+	}
+
+	/* set TMDS sync detection counter length */
+	val = 47520000000UL / phy_cfg->tmdsclock;
+	inno_write(inno, 0xd8, (val >> 8) & 0xff);
+	inno_write(inno, 0xd9, val & 0xff);
+
+	/* Power up post PLL */
+	inno_update_bits(inno, 0xaa, 1, 0);
+	/* Power up tmds driver */
+	inno_update_bits(inno, 0xb0, 4, 4);
+	inno_write(inno, 0xb2, 0x0f);
+
+	/* Wait for post PLL lock */
+	for (val = 0; val < 5; val++) {
+		if (inno_read(inno, 0xaf) & 1)
+			break;
+		udelay(1000);
+	}
+	if (!(inno_read(inno, 0xaf) & 1)) {
+		printf("HDMI PHY Post PLL unlock\n");
+		return -ETIMEDOUT;
+	}
+	if (phy_cfg->tmdsclock > 340000000)
+		mdelay(100);
+	/* set pdata_en to 1 */
+	inno_update_bits(inno, 0x02, 1, 1);
+
+	return 0;
+}
+
+static void inno_hdmi_phy_rk3328_power_off(struct inno_hdmi_phy *inno)
+{
+	/* Power off driver */
+	inno_write(inno, 0xb2, 0);
+	/* Power off band gap */
+	inno_update_bits(inno, 0xb0, 4, 0);
+	/* Power off post pll */
+	inno_update_bits(inno, 0xaa, 1, 1);
+}
+
+static int
+inno_hdmi_phy_rk3328_pre_pll_update(struct inno_hdmi_phy *inno,
+				    const struct pre_pll_config *cfg)
+{
+	u32 val;
+
+	/* Power off PLL */
+	inno_update_bits(inno, 0xa0, 1, 1);
+	/* Configure pre-pll */
+	inno_update_bits(inno, 0xa0, 2, (cfg->vco_div_5_en & 1) << 1);
+	inno_write(inno, 0xa1, cfg->prediv);
+	if (cfg->fracdiv)
+		val = ((cfg->fbdiv >> 8) & 0x0f) | 0xc0;
+	else
+		val = ((cfg->fbdiv >> 8) & 0x0f) | 0xf0;
+	inno_write(inno, 0xa2, val);
+	inno_write(inno, 0xa3, cfg->fbdiv & 0xff);
+	val = (cfg->pclk_div_a & 0x1f) |
+	      ((cfg->pclk_div_b & 3) << 5);
+	inno_write(inno, 0xa5, val);
+	val = (cfg->pclk_div_d & 0x1f) |
+	      ((cfg->pclk_div_c & 3) << 5);
+	inno_write(inno, 0xa6, val);
+	val = ((cfg->tmds_div_a & 3) << 4) |
+	      ((cfg->tmds_div_b & 3) << 2) |
+	      (cfg->tmds_div_c & 3);
+	inno_write(inno, 0xa4, val);
+
+	if (cfg->fracdiv) {
+		val = cfg->fracdiv & 0xff;
+		inno_write(inno, 0xd3, val);
+		val = (cfg->fracdiv >> 8) & 0xff;
+		inno_write(inno, 0xd2, val);
+		val = (cfg->fracdiv >> 16) & 0xff;
+		inno_write(inno, 0xd1, val);
+	} else {
+		inno_write(inno, 0xd3, 0);
+		inno_write(inno, 0xd2, 0);
+		inno_write(inno, 0xd1, 0);
+	}
+
+	/* Power up PLL */
+	inno_update_bits(inno, 0xa0, 1, 0);
+
+	/* Wait for PLL lock */
+	for (val = 0; val < 5; val++) {
+		if (inno_read(inno, 0xa9) & 1)
+			break;
+		udelay(1000);
+	}
+	if (val == 5) {
+		printf("Pre-PLL unlock\n");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
+static unsigned long
+inno_hdmi_3328_phy_pll_recalc_rate(struct inno_hdmi_phy *inno,
+				   unsigned long parent_rate)
+{
+	unsigned long rate, vco, frac;
+	u8 nd, no_a, no_b, no_d;
+	__maybe_unused u8 no_c;
+	u16 nf;
+
+	nd = inno_read(inno, 0xa1) & 0x3f;
+	nf = ((inno_read(inno, 0xa2) & 0x0f) << 8) | inno_read(inno, 0xa3);
+	vco = parent_rate * nf;
+	if ((inno_read(inno, 0xa2) & 0x30) == 0) {
+		frac = inno_read(inno, 0xd3) |
+		       (inno_read(inno, 0xd2) << 8) |
+		       (inno_read(inno, 0xd1) << 16);
+		vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24));
+	}
+	if (inno_read(inno, 0xa0) & 2) {
+		rate = vco / (nd * 5);
+	} else {
+		no_a = inno_read(inno, 0xa5) & 0x1f;
+		no_b = ((inno_read(inno, 0xa5) >> 5) & 7) + 2;
+		no_c = (1 << ((inno_read(inno, 0xa6) >> 5) & 7));
+		no_d = inno_read(inno, 0xa6) & 0x1f;
+		if (no_a == 1)
+			rate = vco / (nd * no_b * no_d * 2);
+		else
+			rate = vco / (nd * no_a * no_d * 2);
+	}
+	inno->pixclock = rate;
+
+	return rate;
+}
+
+#define PHY_TAB_LEN 60
+
+static
+int inno_hdmi_update_phy_table(struct inno_hdmi_phy *inno, u32 *config,
+			       struct phy_config *phy_cfg,
+			       int phy_table_size)
+{
+	int i, j;
+
+	for (i = 0; i < phy_table_size; i++) {
+		phy_cfg[i].tmdsclock =
+			(unsigned long)config[i * 15];
+
+		debug("%ld ", phy_cfg[i].tmdsclock);
+		for (j = 0; j < 14; j++) {
+			phy_cfg[i].regs[j] = (u8)config[i * 15 + 1 + j];
+			debug("0x%02x ", phy_cfg[i].regs[j]);
+		}
+		debug("\n");
+	}
+
+	/*
+	 * The last set of phy cfg is used to indicate whether
+	 * there is no more phy cfg data.
+	 */
+	phy_cfg[i].tmdsclock = ~0UL;
+	for (j = 0; j < 14; j++)
+		phy_cfg[i].regs[j] = 0;
+
+	return 0;
+}
+
+static const struct inno_hdmi_phy_ops rk3228_hdmi_phy_ops = {
+	.init = inno_hdmi_phy_rk3228_init,
+	.power_on = inno_hdmi_phy_rk3228_power_on,
+	.power_off = inno_hdmi_phy_rk3228_power_off,
+	.pre_pll_update = inno_hdmi_phy_rk3228_pre_pll_update,
+};
+
+static const struct inno_hdmi_phy_ops rk3328_hdmi_phy_ops = {
+	.init = inno_hdmi_phy_rk3328_init,
+	.power_on = inno_hdmi_phy_rk3328_power_on,
+	.power_off = inno_hdmi_phy_rk3328_power_off,
+	.pre_pll_update = inno_hdmi_phy_rk3328_pre_pll_update,
+	.recalc_rate = inno_hdmi_3328_phy_pll_recalc_rate,
+};
+
+static const struct inno_hdmi_phy_drv_data rk3228_hdmi_phy_drv_data = {
+	.dev_type = INNO_HDMI_PHY_RK3228,
+	.ops = &rk3228_hdmi_phy_ops,
+	.phy_cfg_table = rk3228_phy_cfg,
+};
+
+static const struct inno_hdmi_phy_drv_data rk3328_hdmi_phy_drv_data = {
+	.dev_type = INNO_HDMI_PHY_RK3328,
+	.ops = &rk3328_hdmi_phy_ops,
+	.phy_cfg_table = rk3328_phy_cfg,
+};
+
+static const struct rockchip_inno_data inno_hdmi_phy_of_match[] = {
+	{ .compatible = "rockchip,rk3228-hdmi-phy",
+	  .data = &rk3228_hdmi_phy_drv_data
+	},
+	{ .compatible = "rockchip,rk3328-hdmi-phy",
+	  .data = &rk3328_hdmi_phy_drv_data
+	},
+	{}
+};
+
+static int inno_hdmi_phy_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct udevice *dev = conn_state->phy_dev;
+	ofnode phy_node = conn_state->phy_node;
+	struct inno_hdmi_phy *inno;
+	int i, val, phy_table_size, ret;
+	const char *name;
+	u32 *phy_config;
+
+	inno = malloc(sizeof(*inno));
+	if (!inno)
+		return -ENOMEM;
+
+	inno->blob = blob;
+	inno->node = phy_node;
+
+	inno->regs = dev_read_addr_ptr(dev);
+	if (!inno->regs) {
+		printf("%s: failed to get phy address\n", __func__);
+		return -ENOMEM;
+	}
+	conn_state->phy_private = inno;
+
+	name = dev_read_string(dev, "compatible");
+	for (i = 0; i < ARRAY_SIZE(inno_hdmi_phy_of_match); i++) {
+		if (!strcmp(name, inno_hdmi_phy_of_match[i].compatible)) {
+			inno->plat_data = inno_hdmi_phy_of_match[i].data;
+			break;
+		}
+	}
+
+	dev_read_prop(dev, "rockchip,phy-table", &val);
+
+	if (val >= 0) {
+		if (val % PHY_TAB_LEN || !val) {
+			printf("Invalid phy cfg table format!\n");
+			return -EINVAL;
+		}
+
+		phy_config = malloc(val);
+		if (!phy_config) {
+			printf("kmalloc phy table failed\n");
+			return -ENOMEM;
+		}
+
+		phy_table_size = val / PHY_TAB_LEN;
+		/* Effective phy cfg data and the end of phy cfg table */
+		inno->phy_cfg = malloc(val + PHY_TAB_LEN);
+		if (!inno->phy_cfg) {
+			free(phy_config);
+			return -ENOMEM;
+		}
+
+		dev_read_u32_array(dev, "rockchip,phy-table",
+				   phy_config, val / sizeof(u32));
+		ret = inno_hdmi_update_phy_table(inno, phy_config,
+						 inno->phy_cfg,
+						 phy_table_size);
+		if (ret) {
+			free(phy_config);
+			return ret;
+		}
+		free(phy_config);
+	} else {
+		printf("use default hdmi phy table\n");
+	}
+
+	if (i >= ARRAY_SIZE(inno_hdmi_phy_of_match))
+		return 0;
+
+	if (!inno->plat_data || !inno->plat_data->ops)
+		return -EINVAL;
+
+	if (inno->plat_data->ops->init)
+		inno->plat_data->ops->init(inno);
+
+	return 0;
+}
+
+static unsigned long inno_hdmi_phy_set_pll(struct display_state *state,
+					   unsigned long rate)
+{
+	inno_hdmi_phy_clk_prepare(state);
+	inno_hdmi_phy_clk_is_prepared(state);
+	inno_hdmi_phy_clk_set_rate(state, rate);
+	return 0;
+}
+
+static void
+inno_hdmi_phy_set_bus_width(struct display_state *state, u32 bus_width)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+
+	inno->bus_width = bus_width;
+}
+
+static long
+inno_hdmi_phy_clk_round_rate(struct display_state *state, unsigned long rate)
+{
+	int i;
+	const struct pre_pll_config *cfg = pre_pll_cfg_table;
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_hdmi_phy *inno = conn_state->phy_private;
+	u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
+
+	for (; cfg->pixclock != ~0UL; cfg++)
+		if (cfg->pixclock == rate)
+			break;
+
+	/*
+	 * XXX: Limit pixel clock under 600MHz
+	 * rk3228 does not support non-zero fracdiv
+	 */
+	if ((inno->plat_data->dev_type == INNO_HDMI_PHY_RK3228 &&
+	     cfg->fracdiv) || cfg->pixclock > 600000000)
+		return -EINVAL;
+
+	/*
+	 * If there is no dts phy cfg table, use default phy cfg table.
+	 * The tmds clock maximum is 594MHz. So there is no need to check
+	 * whether tmds clock is out of range.
+	 */
+	if (!inno->phy_cfg)
+		return cfg->pixclock;
+
+	/* Check if tmds clock is out of dts phy config's range. */
+	for (i = 0; inno->phy_cfg[i].tmdsclock != ~0UL; i++) {
+		if (inno->phy_cfg[i].tmdsclock >= tmdsclock)
+			break;
+	}
+
+	if (inno->phy_cfg[i].tmdsclock == ~0UL)
+		return -EINVAL;
+
+	return cfg->pixclock;
+}
+
+const struct rockchip_phy_funcs inno_hdmi_phy_funcs = {
+	.init = inno_hdmi_phy_init,
+	.power_on = inno_hdmi_phy_power_on,
+	.power_off = inno_hdmi_phy_power_off,
+	.set_pll = inno_hdmi_phy_set_pll,
+	.set_bus_width = inno_hdmi_phy_set_bus_width,
+	.round_rate = inno_hdmi_phy_clk_round_rate,
+};
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index fdf1131605..46ce448812 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -11,6 +11,7 @@
 #include <libfdt.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <linux/hdmi.h>
 #include <linux/list.h>
 #include <linux/compat.h>
 #include <linux/media-bus-format.h>
@@ -150,7 +151,7 @@ static int connector_phy_init(struct display_state *state)
 	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
 					   &dev);
 	if (ret) {
-		debug("Warn: can't find phy driver\n");
+		printf("Warn: can't find phy driver\n");
 		return 0;
 	}
 
@@ -168,7 +169,6 @@ static int connector_phy_init(struct display_state *state)
 		printf("failed to init phy driver\n");
 		return -EINVAL;
 	}
-
 	conn_state->phy = phy;
 	return 0;
 }
@@ -405,6 +405,62 @@ void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
 }
 
+/**
+ * drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
+ * output format
+ *
+ * @connector: drm connector under action.
+ * @mode: video mode to be tested.
+ *
+ * Returns:
+ * true if the mode can be supported in YCBCR420 format
+ * false if not.
+ */
+bool drm_mode_is_420_only(const struct drm_display_info *display,
+			  struct drm_display_mode *mode)
+{
+	u8 vic = drm_match_cea_mode(mode);
+
+	return test_bit(vic, display->hdmi.y420_vdb_modes);
+}
+
+/**
+ * drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
+ * output format also (along with RGB/YCBCR444/422)
+ *
+ * @display: display under action.
+ * @mode: video mode to be tested.
+ *
+ * Returns:
+ * true if the mode can be support YCBCR420 format
+ * false if not.
+ */
+bool drm_mode_is_420_also(const struct drm_display_info *display,
+			  struct drm_display_mode *mode)
+{
+	u8 vic = drm_match_cea_mode(mode);
+
+	return test_bit(vic, display->hdmi.y420_cmdb_modes);
+}
+
+/**
+ * drm_mode_is_420 - if a given videomode can be supported in YCBCR420
+ * output format
+ *
+ * @display: display under action.
+ * @mode: video mode to be tested.
+ *
+ * Returns:
+ * true if the mode can be supported in YCBCR420 format
+ * false if not.
+ */
+bool drm_mode_is_420(const struct drm_display_info *display,
+		     struct drm_display_mode *mode)
+{
+	return drm_mode_is_420_only(display, mode) ||
+		drm_mode_is_420_also(display, mode);
+}
+
 static int display_get_timing(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -526,7 +582,6 @@ static int display_init(struct display_state *state)
 		if (ret)
 			goto deinit;
 	}
-
 	state->is_init = 1;
 
 	return 0;
@@ -1173,7 +1228,6 @@ static int rockchip_display_probe(struct udevice *dev)
 			continue;
 		}
 		list_add_tail(&s->head, &rockchip_display_list);
-
 	}
 
 	if (list_empty(&rockchip_display_list)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 9d613abeaf..d38e113fe4 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -170,5 +170,7 @@ struct display_state {
 
 int drm_mode_vrefresh(const struct drm_display_mode *mode);
 int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
+bool drm_mode_is_420(const struct drm_display_info *display,
+		     struct drm_display_mode *mode);
 
 #endif
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
index d951d146ab..52d16231db 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.c
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -5,8 +5,12 @@
  */
 
 #include <common.h>
+#include <boot_rkimg.h>
+#include <asm/io.h>
 #include <dm/device.h>
 #include <linux/dw_hdmi.h>
+#include <linux/hdmi.h>
+#include <linux/media-bus-format.h>
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
@@ -19,6 +23,25 @@
 #define RK3399_GRF_SOC_CON20		0x6250
 #define RK3399_HDMI_LCDC_SEL		BIT(6)
 
+#define RK3228_IO_3V_DOMAIN              ((7 << 4) | (7 << (4 + 16)))
+#define RK3328_IO_3V_DOMAIN              (7 << (9 + 16))
+#define RK3328_IO_5V_DOMAIN              ((7 << 9) | (3 << (9 + 16)))
+#define RK3328_IO_CTRL_BY_HDMI           ((1 << 13) | (1 << (13 + 16)))
+#define RK3328_IO_DDC_IN_MSK             ((3 << 10) | (3 << (10 + 16)))
+#define RK3228_IO_DDC_IN_MSK             ((3 << 13) | (3 << (13 + 16)))
+#define RK3228_GRF_SOC_CON2              0x0408
+#define RK3228_GRF_SOC_CON6              0x0418
+#define RK3328_GRF_SOC_CON2              0x0408
+#define RK3328_GRF_SOC_CON3              0x040c
+#define RK3328_GRF_SOC_CON4              0x0410
+
+#define DRM_BASE_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
+	.clock = (c), \
+	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
+	.htotal = (ht), .vdisplay = (vd), \
+	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
+	.vscan = (vs), .flags = (f)
+
 static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
 	{
 		30666000, {
@@ -107,6 +130,46 @@ static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
 	}
 };
 
+static const struct dw_hdmi_mpll_config rockchip_mpll_cfg_420[] = {
+	{
+		30666000, {
+			{ 0x00b7, 0x0000 },
+			{ 0x2157, 0x0000 },
+			{ 0x40f7, 0x0000 },
+		},
+	},  {
+		92000000, {
+			{ 0x00b7, 0x0000 },
+			{ 0x2143, 0x0001 },
+			{ 0x40a3, 0x0001 },
+		},
+	},  {
+		184000000, {
+			{ 0x0073, 0x0001 },
+			{ 0x2146, 0x0002 },
+			{ 0x4062, 0x0002 },
+		},
+	},  {
+		340000000, {
+			{ 0x0052, 0x0003 },
+			{ 0x214d, 0x0003 },
+			{ 0x4065, 0x0003 },
+		},
+	},  {
+		600000000, {
+			{ 0x0041, 0x0003 },
+			{ 0x3b4d, 0x0003 },
+			{ 0x5a65, 0x0003 },
+		},
+	},  {
+		~0UL, {
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+		},
+	}
+};
+
 static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
 	/*      pixelclk    bpp8    bpp10   bpp12 */
 	{
@@ -125,6 +188,571 @@ static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
 	{ ~0UL,	     0x0000, 0x0000, 0x0000}
 };
 
+static const struct base_drm_display_mode resolution_white[] = {
+	/* 0. vic:2 - 720x480@60Hz */
+	{ DRM_BASE_MODE(27000, 720, 736,
+			798, 858, 480, 489, 495, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 1. vic:3 - 720x480@60Hz */
+	{ DRM_BASE_MODE(27000, 720, 736,
+			798, 858, 480, 489, 495, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 2. vic:4 - 1280x720@60Hz */
+	{ DRM_BASE_MODE(74250, 1280, 1390,
+			1430, 1650, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 3. vic:5 - 1920x1080i@60Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2008,
+			2052, 2200, 1080, 1084, 1094, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 4. vic:6 - 720(1440)x480i@60Hz */
+	{ DRM_BASE_MODE(13500, 720, 739,
+			801, 858, 480, 488, 494, 525, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 5. vic:16 - 1920x1080@60Hz */
+	{ DRM_BASE_MODE(148500, 1920, 2008,
+			2052, 2200, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 6. vic:17 - 720x576@50Hz */
+	{ DRM_BASE_MODE(27000, 720, 732,
+			796, 864, 576, 581, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 7. vic:18 - 720x576@50Hz */
+	{ DRM_BASE_MODE(27000, 720, 732,
+			796, 864, 576, 581, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 8. vic:19 - 1280x720@50Hz */
+	{ DRM_BASE_MODE(74250, 1280, 1720,
+			1760, 1980, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 9. vic:20 - 1920x1080i@50Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2448,
+			2492, 2640, 1080, 1084, 1094, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 10. vic:21 - 720(1440)x576i@50Hz */
+	{ DRM_BASE_MODE(13500, 720, 732,
+			795, 864, 576, 580, 586, 625, 0,
+			DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 11. vic:31 - 1920x1080@50Hz */
+	{ DRM_BASE_MODE(148500, 1920, 2448,
+			2492, 2640, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 12. vic:32 - 1920x1080@24Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2558,
+			2602, 2750, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 13. vic:33 - 1920x1080@25Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2448,
+			2492, 2640, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 14. vic:34 - 1920x1080@30Hz */
+	{ DRM_BASE_MODE(74250, 1920, 2008,
+			2052, 2200, 1080, 1084, 1089, 1125, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 15. vic:39 - 1920x1080i@50Hz */
+	{ DRM_BASE_MODE(72000, 1920, 1952,
+			2120, 2304, 1080, 1126, 1136, 1250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 16. vic:60 - 1280x720@24Hz */
+	{ DRM_BASE_MODE(59400, 1280, 3040,
+			3080, 3300, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 17. vic:61 - 1280x720@25Hz */
+	{ DRM_BASE_MODE(74250, 1280, 3700,
+			3740, 3960, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 18. vic:62 - 1280x720@30Hz */
+	{ DRM_BASE_MODE(74250, 1280, 3040,
+			3080, 3300, 720, 725, 730, 750, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 19. vic:93 - 3840x2160p@24Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 5116,
+			5204, 5500, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 20. vic:94 - 3840x2160p@25Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 4896,
+			4984, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 21. vic:95 - 3840x2160p@30Hz 16:9 */
+	{ DRM_BASE_MODE(297000, 3840, 4016,
+			4104, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 22. vic:96 - 3840x2160p@50Hz 16:9 */
+	{ DRM_BASE_MODE(594000, 3840, 4896,
+			4984, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 23. vic:97 - 3840x2160p@60Hz 16:9 */
+	{ DRM_BASE_MODE(594000, 3840, 4016,
+			4104, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 24. vic:98 - 4096x2160p@24Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 5116,
+			5204, 5500, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 25. vic:99 - 4096x2160p@25Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 5064,
+			5152, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 26. vic:100 - 4096x2160p@30Hz 256:135 */
+	{ DRM_BASE_MODE(297000, 4096, 4184,
+			4272, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 27. vic:101 - 4096x2160p@50Hz 256:135 */
+	{ DRM_BASE_MODE(594000, 4096, 5064,
+			5152, 5280, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 28. vic:102 - 4096x2160p@60Hz 256:135 */
+	{ DRM_BASE_MODE(594000, 4096, 4184,
+			4272, 4400, 2160, 2168, 2178, 2250, 0,
+			DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+};
+
+static bool drm_mode_equal(const struct base_drm_display_mode *mode1,
+			   const struct drm_display_mode *mode2)
+{
+	unsigned int flags_mask =
+		DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_PHSYNC |
+		DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC |
+		DRM_MODE_FLAG_NVSYNC;
+
+	if (mode1->clock == mode2->clock &&
+	    mode1->hdisplay == mode2->hdisplay &&
+	    mode1->hsync_start == mode2->hsync_start &&
+	    mode1->hsync_end == mode2->hsync_end &&
+	    mode1->htotal == mode2->htotal &&
+	    mode1->vdisplay == mode2->vdisplay &&
+	    mode1->vsync_start == mode2->vsync_start &&
+	    mode1->vsync_end == mode2->vsync_end &&
+	    mode1->vtotal == mode2->vtotal &&
+	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) {
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * drm_mode_sort - sort mode list
+ * @edid_data: modes structures to sort
+ *
+ * Sort @edid_data by favorability, moving good modes to the head of the list.
+ */
+void drm_mode_sort(struct hdmi_edid_data *edid_data)
+{
+	struct drm_display_mode *a, *b;
+	struct drm_display_mode c;
+	int diff, i, j;
+
+	for (i = 0; i < (edid_data->modes - 1); i++) {
+		a = &edid_data->mode_buf[i];
+		for (j = i + 1; j < edid_data->modes; j++) {
+			b = &edid_data->mode_buf[j];
+			diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
+				((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->hdisplay * b->vdisplay
+				- a->hdisplay * a->vdisplay;
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->vrefresh - a->vrefresh;
+			if (diff) {
+				if (diff > 0) {
+					c = *a;
+					*a = *b;
+					*b = c;
+				}
+				continue;
+			}
+
+			diff = b->clock - a->clock;
+			if (diff > 0) {
+				c = *a;
+				*a = *b;
+				*b = c;
+			}
+		}
+	}
+	edid_data->preferred_mode = &edid_data->mode_buf[0];
+}
+
+/**
+ * drm_mode_prune_invalid - remove invalid modes from mode list
+ * @edid_data: structure store mode list
+ * Returns:
+ * Number of valid modes.
+ */
+int drm_mode_prune_invalid(struct hdmi_edid_data *edid_data)
+{
+	int i, j;
+	int num = edid_data->modes;
+	int len = sizeof(struct drm_display_mode);
+	struct drm_display_mode *mode_buf = edid_data->mode_buf;
+
+	for (i = 0; i < num; i++) {
+		if (mode_buf[i].invalid) {
+			/* If mode is invalid, delete it. */
+			for (j = i; j < num - 1; j++)
+				memcpy(&mode_buf[j], &mode_buf[j + 1], len);
+
+			num--;
+			i--;
+		}
+	}
+	/* Clear redundant modes of mode_buf. */
+	memset(&mode_buf[num], 0, len * (edid_data->modes - num));
+
+	edid_data->modes = num;
+	return num;
+}
+
+/**
+ * drm_rk_filter_whitelist - mark modes out of white list from mode list
+ * @edid_data: structure store mode list
+ */
+void drm_rk_filter_whitelist(struct hdmi_edid_data *edid_data)
+{
+	int i, j, white_len;
+
+	if (sizeof(resolution_white)) {
+		white_len = sizeof(resolution_white) /
+			sizeof(resolution_white[0]);
+		for (i = 0; i < edid_data->modes; i++) {
+			for (j = 0; j < white_len; j++) {
+				if (drm_mode_equal(&resolution_white[j],
+						   &edid_data->mode_buf[i]))
+					break;
+			}
+
+			if (j == white_len)
+				edid_data->mode_buf[i].invalid = true;
+		}
+	}
+}
+
+void drm_rk_select_mode(struct hdmi_edid_data *edid_data,
+			struct base_screen_info *screen_info)
+{
+	int i;
+	const struct base_drm_display_mode *base_mode;
+
+	if (!screen_info) {
+		/* define init resolution here */
+	} else {
+		base_mode = &screen_info->mode;
+		for (i = 0; i < edid_data->modes; i++) {
+			if (drm_mode_equal(base_mode,
+					   &edid_data->mode_buf[i])) {
+				edid_data->preferred_mode =
+					&edid_data->mode_buf[i];
+				break;
+			}
+		}
+	}
+}
+
+static unsigned int drm_rk_select_color(struct hdmi_edid_data *edid_data,
+					struct base_screen_info *screen_info,
+					enum dw_hdmi_devtype dev_type)
+{
+	struct drm_display_info *info = &edid_data->display_info;
+	struct drm_display_mode *mode = edid_data->preferred_mode;
+	int max_tmds_clock = info->max_tmds_clock;
+	bool support_dc = false;
+	bool mode_420 = drm_mode_is_420(info, mode);
+	unsigned int color_depth = 8;
+	unsigned int base_color = DRM_HDMI_OUTPUT_YCBCR444;
+	unsigned int color_format = DRM_HDMI_OUTPUT_DEFAULT_RGB;
+	unsigned long tmdsclock, pixclock = mode->clock;
+
+	if (screen_info)
+		base_color = screen_info->format;
+
+	switch (base_color) {
+	case DRM_HDMI_OUTPUT_YCBCR_HQ:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		else if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR_LQ:
+		if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		else if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR420:
+		if (mode_420)
+			color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR422:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+			color_format = DRM_HDMI_OUTPUT_YCBCR422;
+		break;
+	case DRM_HDMI_OUTPUT_YCBCR444:
+		if (info->color_formats & DRM_COLOR_FORMAT_YCRCB444)
+			color_format = DRM_HDMI_OUTPUT_YCBCR444;
+		break;
+	case DRM_HDMI_OUTPUT_DEFAULT_RGB:
+	default:
+		break;
+	}
+
+	if (color_format == DRM_HDMI_OUTPUT_DEFAULT_RGB &&
+	    info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30)
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR444 &&
+	    (info->edid_hdmi_dc_modes &
+	     (DRM_EDID_HDMI_DC_Y444 | DRM_EDID_HDMI_DC_30)))
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR422)
+		support_dc = true;
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR420 &&
+	    info->hdmi.y420_dc_modes & DRM_EDID_YCBCR420_DC_30)
+		support_dc = true;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+		pixclock *= 2;
+
+	if (screen_info && screen_info->depth == 10)
+		color_depth = screen_info->depth;
+
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR422 || color_depth == 8)
+		tmdsclock = pixclock;
+	else
+		tmdsclock = pixclock * color_depth / 8;
+
+	if (color_format == DRM_HDMI_OUTPUT_YCBCR420)
+		tmdsclock /= 2;
+
+	if (!max_tmds_clock)
+		max_tmds_clock = 340000;
+
+	switch (dev_type) {
+	case RK3368_HDMI:
+		max_tmds_clock = min(max_tmds_clock, 340000);
+		break;
+	case RK3328_HDMI:
+	case RK3228_HDMI:
+		max_tmds_clock = min(max_tmds_clock, 371250);
+		break;
+	default:
+		max_tmds_clock = min(max_tmds_clock, 594000);
+		break;
+	}
+
+	if (tmdsclock > max_tmds_clock) {
+		if (max_tmds_clock >= 594000) {
+			color_depth = 8;
+		} else if (max_tmds_clock > 340000) {
+			if (drm_mode_is_420(info, mode))
+				color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		} else {
+			color_depth = 8;
+			if (drm_mode_is_420(info, mode))
+				color_format = DRM_HDMI_OUTPUT_YCBCR420;
+		}
+	}
+
+	if (color_depth > 8 && support_dc) {
+		if (dev_type == RK3288_HDMI)
+			return MEDIA_BUS_FMT_RGB101010_1X30;
+		switch (color_format) {
+		case DRM_HDMI_OUTPUT_YCBCR444:
+			return MEDIA_BUS_FMT_YUV10_1X30;
+		case DRM_HDMI_OUTPUT_YCBCR422:
+			return MEDIA_BUS_FMT_UYVY10_1X20;
+		case DRM_HDMI_OUTPUT_YCBCR420:
+			return MEDIA_BUS_FMT_UYYVYY10_0_5X30;
+		default:
+			return MEDIA_BUS_FMT_RGB101010_1X30;
+		}
+	} else {
+		if (dev_type == RK3288_HDMI)
+			return MEDIA_BUS_FMT_RGB888_1X24;
+		switch (color_format) {
+		case DRM_HDMI_OUTPUT_YCBCR444:
+			return MEDIA_BUS_FMT_YUV8_1X24;
+		case DRM_HDMI_OUTPUT_YCBCR422:
+			return MEDIA_BUS_FMT_UYVY8_1X16;
+		case DRM_HDMI_OUTPUT_YCBCR420:
+			return MEDIA_BUS_FMT_UYYVYY8_0_5X24;
+		default:
+			return MEDIA_BUS_FMT_RGB888_1X24;
+		}
+	}
+}
+
+void drm_rk_selete_output(struct hdmi_edid_data *edid_data,
+			  unsigned int *bus_format,
+			  struct overscan *overscan,
+			  enum dw_hdmi_devtype dev_type)
+{
+	int ret, i, screen_size;
+	struct base_disp_info base_parameter;
+	const struct base_overscan *scan;
+	struct base_screen_info *screen_info = NULL;
+	int max_scan = 100;
+	int min_scan = 51;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
+
+	overscan->left_margin = max_scan;
+	overscan->right_margin = max_scan;
+	overscan->top_margin = max_scan;
+	overscan->bottom_margin = max_scan;
+
+	if (dev_type == RK3288_HDMI)
+		*bus_format = MEDIA_BUS_FMT_RGB888_1X24;
+	else
+		*bus_format = MEDIA_BUS_FMT_YUV8_1X24;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return;
+	}
+
+	if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
+		printf("Could not find baseparameter partition\n");
+		return;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, 1,
+			(void *)baseparameter_buf);
+	if (ret < 0) {
+		printf("read baseparameter failed\n");
+		return;
+	}
+
+	memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
+	scan = &base_parameter.scan;
+
+	if (scan->leftscale < min_scan && scan->leftscale > 0)
+		overscan->left_margin = min_scan;
+	else if (scan->leftscale < max_scan && scan->leftscale > 0)
+		overscan->left_margin = scan->leftscale;
+
+	if (scan->rightscale < min_scan && scan->rightscale > 0)
+		overscan->right_margin = min_scan;
+	else if (scan->rightscale < max_scan && scan->rightscale > 0)
+		overscan->right_margin = scan->rightscale;
+
+	if (scan->topscale < min_scan && scan->topscale > 0)
+		overscan->top_margin = min_scan;
+	else if (scan->topscale < max_scan && scan->topscale > 0)
+		overscan->top_margin = scan->topscale;
+
+	if (scan->bottomscale < min_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = min_scan;
+	else if (scan->bottomscale < max_scan && scan->bottomscale > 0)
+		overscan->bottom_margin = scan->bottomscale;
+
+	screen_size = sizeof(base_parameter.screen_list) /
+		sizeof(base_parameter.screen_list[0]);
+
+	for (i = 0; i < screen_size; i++) {
+		if (base_parameter.screen_list[i].type ==
+		    DRM_MODE_CONNECTOR_HDMIA) {
+			screen_info = &base_parameter.screen_list[i];
+			break;
+		}
+	}
+
+	if (screen_info)
+		printf("base_parameter.mode:%dx%d\n",
+		       screen_info->mode.hdisplay,
+		       screen_info->mode.vdisplay);
+	drm_rk_select_mode(edid_data, screen_info);
+
+	*bus_format = drm_rk_select_color(edid_data, screen_info,
+					  dev_type);
+}
+
+void inno_dw_hdmi_set_domain(void *grf, int status)
+{
+	if (status)
+		writel(RK3328_IO_5V_DOMAIN, grf + RK3328_GRF_SOC_CON4);
+	else
+		writel(RK3328_IO_3V_DOMAIN, grf + RK3328_GRF_SOC_CON4);
+}
+
+void dw_hdmi_set_iomux(void *grf, int dev_type)
+{
+	switch (dev_type) {
+	case RK3328_HDMI:
+		writel(RK3328_IO_DDC_IN_MSK, grf + RK3328_GRF_SOC_CON2);
+		writel(RK3328_IO_CTRL_BY_HDMI, grf + RK3328_GRF_SOC_CON3);
+		break;
+	case RK3228_HDMI:
+		writel(RK3228_IO_3V_DOMAIN, grf + RK3228_GRF_SOC_CON6);
+		writel(RK3228_IO_DDC_IN_MSK, grf + RK3228_GRF_SOC_CON2);
+		break;
+	default:
+		break;
+	}
+}
+
+static const struct dw_hdmi_phy_ops inno_dw_hdmi_phy_ops = {
+	.init = inno_dw_hdmi_phy_init,
+	.disable = inno_dw_hdmi_phy_disable,
+	.read_hpd = inno_dw_hdmi_phy_read_hpd,
+	.mode_valid = inno_dw_hdmi_mode_valid,
+};
+
 static const struct rockchip_connector_funcs rockchip_dw_hdmi_funcs = {
 	.init = rockchip_dw_hdmi_init,
 	.deinit = rockchip_dw_hdmi_deinit,
@@ -136,21 +764,46 @@ static const struct rockchip_connector_funcs rockchip_dw_hdmi_funcs = {
 	.get_edid = rockchip_dw_hdmi_get_edid,
 };
 
-static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
+const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
 	.vop_sel_bit = 4,
 	.grf_vop_sel_reg = RK3288_GRF_SOC_CON6,
+	.mpll_cfg   = rockchip_mpll_cfg,
+	.cur_ctr    = rockchip_cur_ctr,
+	.phy_config = rockchip_phy_config,
 	.dev_type   = RK3288_HDMI,
 };
 
-static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
+const struct dw_hdmi_plat_data rk3328_hdmi_drv_data = {
+	.vop_sel_bit = 0,
+	.grf_vop_sel_reg = 0,
+	.phy_ops    = &inno_dw_hdmi_phy_ops,
+	.phy_name   = "inno_dw_hdmi_phy2",
+	.dev_type   = RK3328_HDMI,
+};
+
+const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
+	.vop_sel_bit = 0,
+	.grf_vop_sel_reg = 0,
+	.phy_ops    = &inno_dw_hdmi_phy_ops,
+	.phy_name   = "inno_dw_hdmi_phy",
+	.dev_type   = RK3228_HDMI,
+};
+
+const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
 	.vop_sel_bit = 6,
 	.grf_vop_sel_reg = RK3399_GRF_SOC_CON20,
 	.mpll_cfg   = rockchip_mpll_cfg,
 	.cur_ctr    = rockchip_cur_ctr,
 	.phy_config = rockchip_phy_config,
+	.mpll_cfg_420 = rockchip_mpll_cfg_420,
 	.dev_type   = RK3399_HDMI,
 };
 
+static int rockchip_dw_hdmi_probe(struct udevice *dev)
+{
+	return 0;
+}
+
 static const struct rockchip_connector rk3399_dw_hdmi_data = {
 	.funcs = &rockchip_dw_hdmi_funcs,
 	.data = &rk3399_hdmi_drv_data,
@@ -161,10 +814,15 @@ static const struct rockchip_connector rk3288_dw_hdmi_data = {
 	.data = &rk3288_hdmi_drv_data,
 };
 
-static int rockchip_dw_hdmi_probe(struct udevice *dev)
-{
-	return 0;
-}
+static const struct rockchip_connector rk3328_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3328_hdmi_drv_data,
+};
+
+static const struct rockchip_connector rk3228_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3228_hdmi_drv_data,
+};
 
 static const struct udevice_id rockchip_dw_hdmi_ids[] = {
 	{
@@ -173,6 +831,15 @@ static const struct udevice_id rockchip_dw_hdmi_ids[] = {
 	}, {
 	 .compatible = "rockchip,rk3288-dw-hdmi",
 	 .data = (ulong)&rk3288_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3328-dw-hdmi",
+	 .data = (ulong)&rk3328_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3128-inno-hdmi",
+	 .data = (ulong)&rk3228_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3228-dw-hdmi",
+	 .data = (ulong)&rk3228_dw_hdmi_data,
 	}, {}
 };
 
diff --git a/drivers/video/drm/rockchip_dw_hdmi.h b/drivers/video/drm/rockchip_dw_hdmi.h
index bf09bbaa18..fb1ecc1b9a 100644
--- a/drivers/video/drm/rockchip_dw_hdmi.h
+++ b/drivers/video/drm/rockchip_dw_hdmi.h
@@ -19,4 +19,13 @@ int rockchip_dw_hdmi_get_timing(struct display_state *state);
 int rockchip_dw_hdmi_detect(struct display_state *state);
 int rockchip_dw_hdmi_get_edid(struct display_state *state);
 
+enum drm_connector_status
+inno_dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
+			  void *data);
+void inno_dw_hdmi_phy_disable(struct dw_hdmi *dw_hdmi,
+			      void *data);
+int inno_dw_hdmi_phy_init(struct dw_hdmi *dw_hdmi,
+			  void *data);
+void inno_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data);
+
 #endif /* _ROCKCHIP_DW_HDMI_REG_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index c7f147f826..960d561c70 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -22,6 +22,12 @@ static const struct rockchip_phy rockchip_inno_mipi_dphy_data = {
 };
 #endif
 
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+static const struct rockchip_phy rockchip_inno_hdmi_phy_data = {
+	 .funcs = &inno_hdmi_phy_funcs,
+};
+#endif
+
 static const struct udevice_id rockchip_phy_ids[] = {
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 	{
@@ -44,6 +50,17 @@ static const struct udevice_id rockchip_phy_ids[] = {
 		.compatible = "rockchip,rv1108-mipi-dphy",
 		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
+#endif
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+	{
+	 .compatible = "rockchip,rk3328-hdmi-phy",
+	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
+	},
+	{
+	 .compatible = "rockchip,rk3228-hdmi-phy",
+	 .data = (ulong)&rockchip_inno_hdmi_phy_data,
+	},
+
 #endif
 	{}
 };
@@ -105,3 +122,31 @@ unsigned long rockchip_phy_set_pll(struct display_state *state,
 
 	return phy->funcs->set_pll(state, rate);
 }
+
+void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy =
+		(struct rockchip_phy *)conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->set_bus_width) {
+		debug("%s: failed to find phy set_bus_width funcs\n", __func__);
+		return;
+	}
+
+	return phy->funcs->set_bus_width(state, bus_width);
+}
+
+long rockchip_phy_round_rate(struct display_state *state, unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy =
+		(struct rockchip_phy *)conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->round_rate) {
+		debug("%s: failed to find phy round_rate funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->round_rate(state, rate);
+}
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index 70e9c820b7..4fed5a0cc9 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -13,6 +13,8 @@ struct rockchip_phy_funcs {
 	int (*power_off)(struct display_state *state);
 	unsigned long (*set_pll)(struct display_state *state,
 				 unsigned long rate);
+	void (*set_bus_width)(struct display_state *state, u32 bus_width);
+	long (*round_rate)(struct display_state *state, unsigned long rate);
 };
 
 struct rockchip_phy {
@@ -26,8 +28,13 @@ int rockchip_phy_power_off(struct display_state *state);
 int rockchip_phy_power_on(struct display_state *state);
 unsigned long rockchip_phy_set_pll(struct display_state *state,
 				   unsigned long rate);
+void rockchip_phy_set_bus_width(struct display_state *state, u32 bus_width);
+long rockchip_phy_round_rate(struct display_state *state, unsigned long rate);
 
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
 #endif
+#ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
+extern const struct rockchip_phy_funcs inno_hdmi_phy_funcs;
+#endif
 #endif
diff --git a/include/drm_modes.h b/include/drm_modes.h
index d71f562ddb..36d5641dbb 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -36,7 +36,7 @@
 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
-#define DRM_MODE_FLAG_PPIXDATA			(1 << 31)
+#define DRM_MODE_FLAG_PPIXDATA                  BIT(31)
 
 #define DRM_MODE_CONNECTOR_Unknown	0
 #define DRM_MODE_CONNECTOR_VGA		1
@@ -124,7 +124,8 @@ enum v4l2_colorspace {
 #define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
 #define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
 #define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
-#define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | CRTC_NO_VSCAN)
+#define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | \
+				 CRTC_NO_VSCAN)
 
 #define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
 
@@ -160,6 +161,7 @@ struct drm_display_mode {
 	int crtc_vsync_start;
 	int crtc_vsync_end;
 	int crtc_vtotal;
+	bool invalid;
 };
 
 #endif
diff --git a/include/edid.h b/include/edid.h
index 06698db9c3..1ac641c963 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -16,11 +16,13 @@
 
 #include <div64.h>
 #include <linux/types.h>
+#include <drm_modes.h>
+#include <i2c.h>
 
 /* Size of the EDID data */
 #define EDID_SIZE	128
 #define EDID_EXT_SIZE	256
-#define MODE_LEN	120
+#define MODE_LEN	240
 
 #define CEA_EXT	    0x02
 #define VTB_EXT	    0x10
@@ -44,16 +46,16 @@
 #define  DRM_MODE_FLAG_420			BIT(23)
 #define  DRM_MODE_FLAG_420_ONLY			BIT(24)
 
-#define DRM_MODE_FLAG_3D_MASK			(0x1f << 14)
-#define  DRM_MODE_FLAG_3D_NONE			(0 << 14)
-#define  DRM_MODE_FLAG_3D_FRAME_PACKING		BIT(14)
-#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2 << 14)
-#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3 << 14)
-#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4 << 14)
-#define  DRM_MODE_FLAG_3D_L_DEPTH		(5 << 14)
-#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6 << 14)
-#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7 << 14)
-#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8 << 14)
+#define DRM_MODE_FLAG_3D_MASK                  (0x1f << 14)
+#define  DRM_MODE_FLAG_3D_NONE                 (0 << 14)
+#define  DRM_MODE_FLAG_3D_FRAME_PACKING                BIT(14)
+#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE    (2 << 14)
+#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE     (3 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL    (4 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH              (5 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH        (6 << 14)
+#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM       (7 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF    (8 << 14)
 
 #define BITS_PER_BYTE         8
 #define BITS_TO_LONGS(nr)     DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
@@ -61,13 +63,18 @@
 	(((_x) >> (_pos)) & 1)
 #define GET_BITS(_x, _pos_msb, _pos_lsb) \
 	(((_x) >> (_pos_lsb)) & ((1 << ((_pos_msb) - (_pos_lsb) + 1)) - 1))
-#define DRM_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
-	.clock = (c), \
+#define DRM_MODE(t, c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
+	.clock = (c), .type = (t),\
 	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
 	.htotal = (ht), .vdisplay = (vd), \
 	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
 	.vscan = (vs), .flags = (f)
 
+#define DDC_SEGMENT_ADDR 0x30
+#define DDC_ADDR 0x50
+#define HDMI_EDID_BLOCK_SIZE 128
+#define SCDC_I2C_SLAVE_ADDRESS 0x54
+
 /* Aspect ratios used in EDID info. */
 enum edid_aspect {
 	ASPECT_625 = 0,
@@ -317,13 +324,15 @@ struct edid_monitor_descriptor {
 #define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
 #define DRM_EDID_FEATURE_STANDARD_COLOR   (1 << 2)
 /* If analog */
-#define DRM_EDID_FEATURE_DISPLAY_TYPE     (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
+/* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
+#define DRM_EDID_FEATURE_DISPLAY_TYPE     (3 << 3)
 /* If digital */
 #define DRM_EDID_FEATURE_COLOR_MASK	  (3 << 3)
 #define DRM_EDID_FEATURE_RGB		  (0 << 3)
 #define DRM_EDID_FEATURE_RGB_YCRCB444	  (1 << 3)
 #define DRM_EDID_FEATURE_RGB_YCRCB422	  (2 << 3)
-#define DRM_EDID_FEATURE_RGB_YCRCB	  (3 << 3) /* both 4:4:4 and 4:2:2 */
+/* both 4:4:4 and 4:2:2 */
+#define DRM_EDID_FEATURE_RGB_YCRCB	  (3 << 3)
 
 #define DRM_EDID_FEATURE_PM_ACTIVE_OFF    (1 << 5)
 #define DRM_EDID_FEATURE_PM_SUSPEND       (1 << 6)
@@ -710,6 +719,61 @@ struct edid {
 	u8 checksum;
 } __packed;
 
+enum base_output_format {
+	DRM_HDMI_OUTPUT_DEFAULT_RGB, /* default RGB */
+	DRM_HDMI_OUTPUT_YCBCR444, /* YCBCR 444 */
+	DRM_HDMI_OUTPUT_YCBCR422, /* YCBCR 422 */
+	DRM_HDMI_OUTPUT_YCBCR420, /* YCBCR 420 */
+	/* (YCbCr444 > YCbCr422 > YCbCr420 > RGB) */
+	DRM_HDMI_OUTPUT_YCBCR_HQ,
+	/* (YCbCr420 > YCbCr422 > YCbCr444 > RGB) */
+	DRM_HDMI_OUTPUT_YCBCR_LQ,
+	DRM_HDMI_OUTPUT_INVALID, /* Guess what ? */
+};
+
+enum  base_output_depth {
+	AUTOMATIC = 0,
+	DEPTH_24BIT = 8,
+	DEPTH_30BIT = 10,
+};
+
+struct base_overscan {
+	unsigned int maxvalue;
+	unsigned short leftscale;
+	unsigned short rightscale;
+	unsigned short topscale;
+	unsigned short bottomscale;
+};
+
+struct base_drm_display_mode {
+	int clock;		/* in kHz */
+	int hdisplay;
+	int hsync_start;
+	int hsync_end;
+	int htotal;
+	int vdisplay;
+	int vsync_start;
+	int vsync_end;
+	int vtotal;
+	int vrefresh;
+	int vscan;
+	unsigned int flags;
+	int picture_aspect_ratio;
+};
+
+struct base_screen_info {
+	int type;
+	struct base_drm_display_mode mode;	/* 52 bytes */
+	enum base_output_format  format;	/* 4 bytes */
+	enum base_output_depth depth;		/* 4 bytes */
+	unsigned int feature;			/* 4 bytes */
+};
+
+struct base_disp_info {
+	struct base_screen_info screen_list[5];
+	struct base_overscan scan;		/* 12 bytes */
+};
+
 /**
  * Print the EDID info.
  *
@@ -754,11 +818,15 @@ struct display_timing;
 struct hdmi_edid_data {
 	struct drm_display_mode *preferred_mode;
 	int modes;
-	struct drm_hdmi_info hdmi_info;
 	struct drm_display_mode *mode_buf;
 	struct drm_display_info display_info;
 };
 
+struct ddc_adapter {
+	int (*ddc_xfer)(struct ddc_adapter *adap, struct i2c_msg *msgs,
+			int num);
+};
+
 /**
  * edid_get_timing() - Get basic digital display parameters
  *
@@ -777,5 +845,11 @@ int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
 int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *edid);
 bool drm_detect_hdmi_monitor(struct edid *edid);
 bool drm_detect_monitor_audio(struct edid *edid);
+int do_cea_modes(struct hdmi_edid_data *data, const u8 *db, u8 len);
+int drm_do_get_edid(struct ddc_adapter *adap, u8 *edid);
+u8 drm_scdc_readb(struct ddc_adapter *adap, u8 offset,
+		  u8 *value);
+u8 drm_scdc_writeb(struct ddc_adapter *adap, u8 offset,
+		   u8 value);
 
 #endif /* __EDID_H_ */
diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
index 83b65e9b92..8b0b8fa6e2 100644
--- a/include/linux/dw_hdmi.h
+++ b/include/linux/dw_hdmi.h
@@ -10,6 +10,11 @@
 #ifndef __DW_HDMI__
 #define __DW_HDMI__
 
+struct dw_hdmi;
+struct drm_display_mode;
+struct ddc_adapter;
+struct i2c_msg;
+
 /**
  * DOC: Supported input formats and encodings
  *
@@ -127,10 +132,11 @@ struct dw_hdmi_phy_config {
 };
 
 struct dw_hdmi_phy_ops {
-	int (*init)(struct dw_hdmi *hdmi, void *data,
-		    struct drm_display_mode *mode);
+	int (*init)(struct dw_hdmi *hdmi, void *data);
 	void (*disable)(struct dw_hdmi *hdmi, void *data);
-	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
+	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi,
+					      void *data);
+	void (*mode_valid)(struct dw_hdmi *hdmi, void *data);
 };
 
 struct dw_hdmi_plat_data {
@@ -147,6 +153,7 @@ struct dw_hdmi_plat_data {
 
 	/* Synopsys PHY support */
 	const struct dw_hdmi_mpll_config *mpll_cfg;
+	const struct dw_hdmi_mpll_config *mpll_cfg_420;
 	const struct dw_hdmi_curr_ctrl *cur_ctr;
 	const struct dw_hdmi_phy_config *phy_config;
 	int (*configure_phy)(struct dw_hdmi *hdmi,
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index 041034ff00..70a8e36755 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -26,6 +26,7 @@
 #define __LINUX_HDMI_H_
 
 #include <linux/types.h>
+#include <drm_modes.h>
 
 enum hdmi_infoframe_type {
 	HDMI_INFOFRAME_TYPE_VENDOR = 0x81,

commit 3628f4d04ec78f6b200d297c12f9f3d334563ec0
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 10 11:33:38 2018 +0800

    rockchip: vendor: Completing the vendor part planning for flash
    
    1.Nand flash and SPI Nand large capacity case;
      |64KB vendor part 1| p2 | storage ....|
    2.Spi nor small capacity case;
      |8KB offset|4KB vendor part 1| p2 | p3 | p4| storage ...|
    3.Support vendor ops register.
    
    Change-Id: Ifbf5f3499b0976202e9df63936a06d8fcdd68aa4
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index 83c487d92e..671669f5d8 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -21,5 +21,12 @@ struct vendor_item {
 int vendor_storage_test(void);
 int vendor_storage_read(u16 id, void *pbuf, u16 size);
 int vendor_storage_write(u16 id, void *pbuf, u16 size);
-
+int flash_vendor_dev_ops_register(int (*read)(struct blk_desc *dev_desc,
+					      u32 sec,
+					      u32 n_sec,
+					      void *p_data),
+				  int (*write)(struct blk_desc *dev_desc,
+					       u32 sec,
+					       u32 n_sec,
+					       void *p_data));
 #endif /* _ROCKCHIP_VENDOR_ */
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index db17a61375..d305bdcd7d 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -12,6 +12,7 @@
 /* tag for vendor check */
 #define VENDOR_TAG		0x524B5644
 /* The Vendor partition contains the number of Vendor blocks */
+#define NAND_VENDOR_PART_NUM	2
 #define VENDOR_PART_NUM		4
 /* align to 64 bytes */
 #define VENDOR_BTYE_ALIGN	0x3F
@@ -28,7 +29,18 @@
 /* The maximum number of items in each Vendor block */
 #define EMMC_VENDOR_ITEM_NUM		126
 
-/* --- Spi/Spi Nand/SLC/MLC define --- */
+/* --- Spi Nand/SLC/MLC large capacity case define --- */
+/* The Vendor partition contains the number of Vendor blocks */
+#define NAND_VENDOR_PART_OFFSET		0
+/*
+ * The number of memory blocks used by each
+ * Vendor structure(8 * 512B = 4KB)
+ */
+#define NAND_VENDOR_PART_BLKS		128
+/* The maximum number of items in each Vendor block */
+#define NAND_VENDOR_ITEM_NUM		126
+
+/* --- Spi/Spi Nand/SLC/MLC small capacity case define --- */
 /* The Vendor partition contains the number of Vendor blocks */
 #define	FLASH_VENDOR_PART_OFFSET	8
 /*
@@ -69,6 +81,7 @@ struct vendor_info {
 	u32 *hash;
 	u32 *version2;
 };
+
 /*
  * Calculate the offset of each field for emmc.
  * Emmc vendor info size: 64KB
@@ -77,12 +90,22 @@ struct vendor_info {
 #define EMMC_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + EMMC_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
 #define EMMC_VENDOR_HASH_OFFSET (EMMC_VENDOR_INFO_SIZE - 8)
 #define EMMC_VENDOR_VERSION2_OFFSET (EMMC_VENDOR_INFO_SIZE - 4)
+
+/*
+ * Calculate the offset of each field for spi nand/slc/mlc large capacity case.
+ * Flash vendor info size: 4KB
+ */
+#define NAND_VENDOR_INFO_SIZE	(NAND_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
+#define NAND_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + NAND_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define NAND_VENDOR_HASH_OFFSET (NAND_VENDOR_INFO_SIZE - 8)
+#define NAND_VENDOR_VERSION2_OFFSET (NAND_VENDOR_INFO_SIZE - 4)
+
 /*
- * Calculate the offset of each field for spi nor/spi nand/slc/mlc.
+ * Calculate the offset of each field for spi nor/spi nand/slc/mlc large small capacity case.
  * Flash vendor info size: 4KB
  */
 #define FLASH_VENDOR_INFO_SIZE	(FLASH_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
-#define FLASH_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + FLASH_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define FLASH_VENDOR_DATA_OFFSET (sizeof(struct vendor_hdr) + FLASH_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
 #define FLASH_VENDOR_HASH_OFFSET (FLASH_VENDOR_INFO_SIZE - 8)
 #define FLASH_VENDOR_VERSION2_OFFSET (FLASH_VENDOR_INFO_SIZE - 4)
 
@@ -91,6 +114,34 @@ static struct vendor_info vendor_info;
 /* The storage type of the device */
 static int bootdev_type;
 
+/* vendor private read write ops*/
+static	int (*_flash_read)(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *buffer);
+static	int (*_flash_write)(struct blk_desc *dev_desc,
+			    u32 sec,
+			    u32 n_sec,
+			    void *buffer);
+
+int flash_vendor_dev_ops_register(int (*read)(struct blk_desc *dev_desc,
+					      u32 sec,
+					      u32 n_sec,
+					      void *p_data),
+				  int (*write)(struct blk_desc *dev_desc,
+					       u32 sec,
+					       u32 n_sec,
+					       void *p_data))
+{
+	if (!_flash_read) {
+		_flash_read = read;
+		_flash_write = write;
+		return 0;
+	}
+
+	return -EPERM;
+}
+
 /**********************************************************/
 /*              vendor API implementation                 */
 /**********************************************************/
@@ -111,7 +162,7 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
-		 * partition is 3.5MB(EMMC_VENDOR_PART_OFFSET*BLOCK_SIZE(512)),
+		 * partition offset is 3.5MB(EMMC_VENDOR_PART_OFFSET*BLOCK_SIZE(512)),
 		 * and the partition size is 256KB.
 		 * ----------------------------------------------------
 		 * |   3.5MB    |  VendorStorage  |                   |
@@ -121,12 +172,24 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
-		 * partition is 4KB (FLASH_VENDOR_PART_OFFSET * BLOCK_SIZE),
+		 * partition offset is 0KB in FTL vendor block,
+		 * and the partition size is 128KB.
+		 * ----------------------------------------------------
+		 * |  VendorStorage  |                     |
+		 * ----------------------------------------------------
+		 */
+		lba = NAND_VENDOR_PART_OFFSET;
+		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
+		break;
+	case IF_TYPE_SPINOR:
+		/*
+		 * The location of VendorStorage in Flash is shown in the
+		 * following figure. The starting address of the VendorStorage
+		 * partition offset is 4KB (FLASH_VENDOR_PART_OFFSET * BLOCK_SIZE),
 		 * and the partition size is 16KB.
 		 * ----------------------------------------------------
 		 * |   4KB    |  VendorStorage  |                     |
@@ -139,10 +202,18 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		printf("[Vendor ERROR]:Boot device type is invalid!\n");
 		return -ENODEV;
 	}
-	if (write)
-		ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
-	else
-		ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
+	if (write) {
+		if (_flash_write)
+			ret = _flash_write(dev_desc, lba + addr, n_sec, buffer);
+		else
+			ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
+	} else {
+		if (_flash_read)
+			ret = _flash_read(dev_desc, lba + addr, n_sec, buffer);
+		else
+			ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
+	}
+
 	debug("[Vendor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
 	return ret;
@@ -171,7 +242,7 @@ int vendor_storage_init(void)
 	u32 size, i;
 	u32 max_ver = 0;
 	u32 max_index = 0;
-	u16 data_offset, hash_offset;
+	u16 data_offset, hash_offset, part_num;
 	u16 version2_offset, part_size;
 	struct blk_desc *dev_desc;
 
@@ -189,15 +260,24 @@ int vendor_storage_init(void)
 		data_offset = EMMC_VENDOR_DATA_OFFSET;
 		hash_offset = EMMC_VENDOR_HASH_OFFSET;
 		version2_offset = EMMC_VENDOR_VERSION2_OFFSET;
+		part_num = VENDOR_PART_NUM;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		size = NAND_VENDOR_INFO_SIZE;
+		part_size = NAND_VENDOR_PART_BLKS;
+		data_offset = NAND_VENDOR_DATA_OFFSET;
+		hash_offset = NAND_VENDOR_HASH_OFFSET;
+		version2_offset = NAND_VENDOR_VERSION2_OFFSET;
+		part_num = NAND_VENDOR_PART_NUM;
+		break;
+	case IF_TYPE_SPINOR:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
 		data_offset = FLASH_VENDOR_DATA_OFFSET;
 		hash_offset = FLASH_VENDOR_HASH_OFFSET;
 		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
+		part_num = VENDOR_PART_NUM;
 		break;
 	default:
 		debug("[Vendor ERROR]:Boot device type is invalid!\n");
@@ -225,7 +305,7 @@ int vendor_storage_init(void)
 	vendor_info.version2 = (u32 *)(buffer + version2_offset);
 
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
-	for (i = 0; i < VENDOR_PART_NUM; i++) {
+	for (i = 0; i < part_num; i++) {
 		ret_size = vendor_ops((u8 *)vendor_info.hdr,
 				      part_size * i, part_size, 0);
 		if (ret_size != part_size) {
@@ -248,7 +328,7 @@ int vendor_storage_init(void)
 		 * Keep vendor_info the same as the largest
 		 * version of vendor
 		 */
-		if (max_index != (VENDOR_PART_NUM - 1)) {
+		if (max_index != (part_num - 1)) {
 			ret_size = vendor_ops((u8 *)vendor_info.hdr,
 					       part_size * max_index, part_size, 0);
 			if (ret_size != part_size) {
@@ -331,7 +411,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	int cnt, ret = 0;
 	u32 i, next_index, align_size;
 	struct vendor_item *item;
-	u16 part_size, max_item_num, offset;
+	u16 part_size, max_item_num, offset, part_num;
 
 	/* init vendor storage */
 	if (!bootdev_type) {
@@ -344,12 +424,18 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	case IF_TYPE_MMC:
 		part_size = EMMC_VENDOR_PART_BLKS;
 		max_item_num = EMMC_VENDOR_ITEM_NUM;
+		part_num = VENDOR_PART_NUM;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		part_size = NAND_VENDOR_PART_BLKS;
+		max_item_num = NAND_VENDOR_ITEM_NUM;
+		part_num = NAND_VENDOR_PART_NUM;
+		break;
+	case IF_TYPE_SPINOR:
 		part_size = FLASH_VENDOR_PART_BLKS;
 		max_item_num = FLASH_VENDOR_ITEM_NUM;
+		part_num = VENDOR_PART_NUM;
 		break;
 	default:
 		ret = -ENODEV;
@@ -376,7 +462,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 			vendor_info.hdr->version++;
 			*(vendor_info.version2) = vendor_info.hdr->version;
 			vendor_info.hdr->next_index++;
-			if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+			if (vendor_info.hdr->next_index >= part_num)
 				vendor_info.hdr->next_index = 0;
 			cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
 			return (cnt == part_size) ? size : -EIO;
@@ -401,7 +487,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		vendor_info.hdr->version++;
 		vendor_info.hdr->next_index++;
 		*(vendor_info.version2) = vendor_info.hdr->version;
-		if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+		if (vendor_info.hdr->next_index >= part_num)
 			vendor_info.hdr->next_index = 0;
 
 		cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
@@ -418,19 +504,25 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 /* Reset the vendor storage space to the initial state */
 static void vendor_test_reset(void)
 {
-	u16 i, part_size;
+	u16 i, part_size, part_num;
 	u32 size;
 
 	switch (bootdev_type) {
 	case IF_TYPE_MMC:
 		size = EMMC_VENDOR_INFO_SIZE;
 		part_size = EMMC_VENDOR_PART_BLKS;
+		part_num = VENDOR_PART_NUM;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		size = NAND_VENDOR_INFO_SIZE;
+		part_size = NAND_VENDOR_PART_BLKS;
+		part_num = NAND_VENDOR_PART_NUM;
+		break;
+	case IF_TYPE_SPINOR:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
+		part_num = VENDOR_PART_NUM;
 		break;
 	default:
 		size = 0;
@@ -449,7 +541,7 @@ static void vendor_test_reset(void)
 				     (unsigned long)vendor_info.data;
 	*(vendor_info.version2) = vendor_info.hdr->version;
 	/* write to flash. */
-	for (i = 0; i < VENDOR_PART_NUM; i++)
+	for (i = 0; i < part_num; i++)
 		vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 1);
 }
 
@@ -488,8 +580,13 @@ int vendor_storage_test(void)
 		size = total_size/item_num;
 		break;
 	case IF_TYPE_RKNAND:
-	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
+		item_num = NAND_VENDOR_ITEM_NUM;
+		total_size = (unsigned long)vendor_info.hash -
+			     (unsigned long)vendor_info.data;
+		size = total_size/item_num;
+		break;
+	case IF_TYPE_SPINOR:
 		item_num = FLASH_VENDOR_ITEM_NUM;
 		total_size = (unsigned long)vendor_info.hash -
 			     (unsigned long)vendor_info.data;
@@ -618,7 +715,7 @@ int vendor_storage_test(void)
 	printf("[Vendor Test]:item_num=%d, size=%d.\n", item_num, size);
 
 	vendor_test_reset();
-	for (id = 0; id <= item_num; id++) {
+	for (id = 0; id < item_num; id++) {
 		memset(buffer, id, size);
 		ret = vendor_storage_write(id, buffer, size);
 		if (ret < 0) {

commit bb2992fad02314a8eb3264ff49f4fbdc37bf96e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:37:46 2018 +0800

    rockchip: board: lower the charge animation failed info
    
    Change-Id: Ibb09da0fbf5e13fcaadf0a54ce7932958600fd2f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 233f0b6f9a..29c3409005 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -115,7 +115,7 @@ static int charge_display(void)
 	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
 	if (ret) {
 		if (ret != -ENODEV) {
-			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			debug("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
 			return ret;
 		} else {
 			debug("Can't find charge display driver\n");

commit 14a3ce4514eebf8f1ad4b9f430193b0937573796
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:36:30 2018 +0800

    fuel gauge: rk816: print charge type
    
    Change-Id: Ieafcd6dfefce1419e4df7e52882c8a882b53adcc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 84e1ee46f8..aa601ee39d 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -183,6 +183,14 @@ enum dc_type {
 	DC_TYPE_OF_ADC,
 };
 
+static const char *charger_type_to_name[] = {
+	"NONE",
+	"USB",
+	"AC",
+	"DC",
+	"UNKN",
+};
+
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
 };
@@ -990,7 +998,9 @@ static int rk816_fg_init(struct battery_priv *di)
 	di->pwr_vol = di->voltage_avg;
 	rk816_bat_charger_setting(di, di->chrg_type);
 
-	printf("Battery: soc=%d%%, voltage=%dmv\n", di->dsoc, di->voltage_avg);
+	printf("Battery: soc=%d%%, voltage=%dmv, Charger: %s%s\n",
+	       di->dsoc, di->voltage_avg, charger_type_to_name[di->chrg_type],
+	       di->virtual_power ? "(virtual)" : "");
 
 	return 0;
 }

commit 31ab5b3ba0b944fab357d8ce95757675e78390fe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 14 20:35:45 2018 +0800

    power: charge animation: lower the print info
    
    Change-Id: If6f597f3cf1d6da67f14f8a598f5a50e14fb798f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index fef2bd6584..bd89383405 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -661,24 +661,23 @@ static int charge_animation_probe(struct udevice *dev)
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {
 		if (ret == -ENODEV)
-			printf("Can't find FG\n");
+			debug("Can't find FG\n");
 		else
-			printf("Get UCLASS FG failed: %d\n", ret);
+			debug("Get UCLASS FG failed: %d\n", ret);
 		return ret;
 	}
 	priv->fg = fg;
 
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
-	ret = key_read(KEY_POWER);
-	if (ret == KEY_NOT_EXIST) {
-		printf("Can't find power key\n");
+	if (key_read(KEY_POWER) == KEY_NOT_EXIST) {
+		debug("Can't find power key\n");
 		return -EINVAL;
 	}
 
 	/* Initialize charge current */
 	soc = fuel_gauge_get_soc(fg);
 	if (soc < 0 || soc > 100) {
-		printf("get soc failed: %d\n", soc);
+		debug("get soc failed: %d\n", soc);
 		return -EINVAL;
 	}
 

commit ac5a8f08e811581376e731c898c21e4f79177ec2
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Aug 13 17:21:47 2018 +0800

    rockchip: rk3128h: Fix AVB2.0 boot failure for Android P GSI
    
    Generic System Image (GSI) for Android P use the vbmeta without
    the "Authentication data" and "Auxiliary data" block, in this case
    just load the entire partition. This led to a malloc fail in libavb.
    This increase malloc pool len.
    
    GSI vbmeta image info:
    avbtool info_image --image vbmeta.img
    Minimum libavb version:   1.0
    Header Block:             256 bytes
    Authentication Block:     0 bytes
    Auxiliary Block:          0 bytes
    Algorithm:                NONE
    Rollback Index:           0
    Flags:                    2
    Release String:           'avbtool 1.1.0'
    Descriptors:
        (none)
    
    This fixes boot failure seen on rk3128h target: avb_util.c:199:
    ERROR: Failed to allocate memory.
    
    Change-Id: I148f60774916eca4c5e326385c733535633a6c75
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 3d98be4e32..1230d4331a 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -10,7 +10,7 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(128 << 20)
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 

commit 9c6baab84ba292afd372cbc281025695639deedd
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Aug 13 17:05:34 2018 +0800

    configs: rk3128x_defconfig: enable AVB2.0
    
    Change-Id: Ic0bb820807384c9c04a27bb9051562e4f0ae2171
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 11c6dd9406..baa869aa2a 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -24,6 +24,7 @@ CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -112,6 +113,11 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit f03c827ad6f1e04e56faa4e798199d575d7c6fe2
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Mon Aug 13 15:43:12 2018 +0800

    configs: rk3128x_defconfig: enable CONFIG_OPTEE_(CLIENT|V1)
    
    Change-Id: I8fd157a50f9cd395d840af6ffee5ebd19d4dbb64
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 0eb3ab4916..11c6dd9406 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -112,4 +112,6 @@ CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_TEST_ROCKCHIP=y

commit c798cdd16945c6d02aa9922b6df96646bd1c6281
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Aug 1 18:15:35 2018 +0800

    drivers: rknand: support bootloader upgraged
    
    The boot loader image write to lba 0x40, the nand driver
    will copy to the the reserved blocks for bootrom.
    
    Change-Id: I7517818b39032bc8ff16cbb4a9e9342f95306181
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 0c63064f76..ebf23e322e 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-08
+ * date: 2018-08-10
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -18,9 +18,6 @@
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
 	.file	"rk_ftl_arm_v7.c"
-	.text
-.Ltext0:
-	.cfi_sections	.debug_frame
 	.section	.text.ftl_set_blk_mode.part.10,"ax",%progbits
 	.align	1
 	.syntax unified
@@ -29,19 +26,12 @@
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.10, %function
 ftl_set_blk_mode.part.10:
-.LFB507:
-	.file 1 "drivers/rknand/rkftl/FtlSysBlk.c"
-	.loc 1 1501 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL0:
-	.loc 1 1504 0
 	ldr	r3, .L2
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
-.LVL1:
 	ldr	r2, [r3]
 	movs	r3, #1
 	lsl	r0, r3, r0
@@ -53,8 +43,6 @@ ftl_set_blk_mode.part.10:
 	.align	2
 .L2:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE507:
 	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
@@ -65,61 +53,35 @@ ftl_set_blk_mode.part.10:
 	.fpu softvfp
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
-.LFB203:
-	.file 2 "drivers/rknand/rkftl/flash.c"
-	.loc 2 205 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2:
-	.loc 2 208 0
 	ldr	r3, .L12
-	.loc 2 205 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 208 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L7
-	.loc 2 209 0
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
 	beq	.L11
 	movs	r3, #0
 .L7:
-.LVL3:
-	.loc 2 212 0 discriminator 1
 	cmp	r3, r2
 	bne	.L9
-.LVL4:
 .L11:
-	.loc 2 210 0
 	movs	r0, #0
-.LVL5:
-	.loc 2 217 0
 	pop	{r4, r5, pc}
-.LVL6:
 .L9:
-	.loc 2 213 0
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
-.LVL7:
 	cmp	r5, r4
 	beq	.L7
-	.loc 2 214 0
 	mov	r0, r3
-.LVL8:
 	pop	{r4, r5, pc}
 .L13:
 	.align	2
 .L12:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE203:
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
@@ -130,14 +92,9 @@ FlashMemCmp8:
 	.fpu softvfp
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
-.LFB204:
-	.loc 2 239 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL9:
-	.loc 2 240 0
 	ldr	r3, .L17
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, .L17+4
@@ -145,25 +102,18 @@ FlashRsvdBlkChk:
 	muls	r3, r2, r3
 	cmp	r3, r1
 	bls	.L16
-	.loc 2 240 0 is_stmt 0 discriminator 1
 	adds	r0, r0, #0
-.LVL10:
 	it	ne
 	movne	r0, #1
 	bx	lr
-.LVL11:
 .L16:
 	movs	r0, #1
-.LVL12:
-	.loc 2 244 0 is_stmt 1
 	bx	lr
 .L18:
 	.align	2
 .L17:
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE204:
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
@@ -174,46 +124,26 @@ FlashRsvdBlkChk:
 	.fpu softvfp
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
-.LFB205:
-	.loc 2 247 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL13:
-	.loc 2 250 0
 	ldr	r3, .L27
 	and	r2, r1, #127
-	.loc 2 247 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 250 0
 	ldrh	r4, [r3, r2, lsl #1]
-.LVL14:
-	.loc 2 251 0
 	ldr	r3, .L27+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L19
-	.loc 2 251 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
-.LVL15:
 	cbz	r0, .L19
-	.loc 2 252 0 is_stmt 1
 	orr	r4, r4, #-1073741824
-.LVL16:
 .L19:
-	.loc 2 254 0
 	mov	r0, r4
 	pop	{r4, pc}
-.LVL17:
 .L28:
 	.align	2
 .L27:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
-	.cfi_endproc
-.LFE205:
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
@@ -224,60 +154,30 @@ FlashGetRandomizer:
 	.fpu softvfp
 	.type	FlashSetRandomizer, %function
 FlashSetRandomizer:
-.LFB206:
-	.loc 2 257 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL18:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 260 0
 	and	r2, r1, #127
 	ldr	r3, .L37
-	.loc 2 257 0
 	mov	r5, r0
-	.loc 2 260 0
 	ldrh	r4, [r3, r2, lsl #1]
-.LVL19:
-	.loc 2 261 0
 	ldr	r3, .L37+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L30
-	.loc 2 261 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
-.LVL20:
 	cbz	r0, .L30
-	.loc 2 262 0 is_stmt 1
 	orr	r4, r4, #-1073741824
-.LVL21:
 .L30:
-.LBB134:
-.LBB135:
-	.file 3 "drivers/rknand/rkftl/nandc.c"
-	.loc 3 343 0
 	ldr	r3, .L37+8
 	ldr	r3, [r3, r5, lsl #3]
-.LVL22:
-	.loc 3 344 0
 	str	r4, [r3, #336]
-.LVL23:
 	pop	{r3, r4, r5, pc}
-.LVL24:
 .L38:
 	.align	2
 .L37:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
 	.word	.LANCHOR6
-.LBE135:
-.LBE134:
-	.cfi_endproc
-.LFE206:
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
@@ -288,64 +188,33 @@ FlashSetRandomizer:
 	.fpu softvfp
 	.type	FlashReadCmd, %function
 FlashReadCmd:
-.LFB211:
-	.loc 2 322 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL25:
 	push	{r4, r5}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 5, -4
-	.loc 2 330 0
 	lsrs	r2, r1, #16
-.LBB136:
-.LBB137:
-	.loc 3 123 0
 	ldr	r4, .L40
 	ldr	r3, [r4, r0, lsl #3]
-.LVL26:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
-.LVL27:
-.LBE137:
-.LBE136:
-	.loc 2 325 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #0
 	str	r4, [r3, #2056]
-	.loc 2 326 0
 	str	r4, [r3, #2052]
-	.loc 2 327 0
 	str	r4, [r3, #2052]
-	.loc 2 328 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
-	.loc 2 329 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
-	.loc 2 330 0
 	str	r2, [r3, #2052]
-	.loc 2 331 0
 	movs	r2, #48
 	str	r2, [r3, #2056]
-	.loc 2 333 0
 	pop	{r4, r5}
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 332 0
 	b	FlashSetRandomizer
-.LVL28:
 .L41:
 	.align	2
 .L40:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE211:
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
@@ -356,98 +225,47 @@ FlashReadCmd:
 	.fpu softvfp
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
-.LFB212:
-	.loc 2 336 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL29:
-.LBB138:
-.LBB139:
-	.loc 3 123 0
 	ldr	r2, .L46
-.LBE139:
-.LBE138:
-	.loc 2 336 0
 	push	{r4, r5, r6}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 6, -4
 	uxtb	r6, r1
-	.loc 2 340 0
 	ldr	r4, .L46+4
 	lsrs	r5, r1, #8
-.LBB141:
-.LBB140:
-	.loc 3 123 0
 	ldr	r3, [r2, r0, lsl #3]
-.LVL30:
-	.loc 3 124 0
 	add	r2, r2, r0, lsl #3
-.LBE140:
-.LBE141:
-	.loc 2 340 0
 	ldrb	r4, [r4, #16]	@ zero_extendqisi2
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
-.LVL31:
 	cmp	r4, #1
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
-	.loc 2 341 0
 	add	r3, r3, r2
-	.loc 2 340 0
 	bne	.L43
-	.loc 2 341 0
 	movs	r2, #6
 	str	r2, [r3, #2056]
-	.loc 2 342 0
 	movs	r2, #0
 	str	r2, [r3, #2052]
-	.loc 2 343 0
 	str	r2, [r3, #2052]
-	.loc 2 344 0
 	str	r6, [r3, #2052]
-	.loc 2 345 0
 	str	r5, [r3, #2052]
-	.loc 2 346 0
 	str	r4, [r3, #2052]
 .L45:
-	.loc 2 358 0
 	movs	r2, #224
 	str	r2, [r3, #2056]
-	.loc 2 361 0
 	pop	{r4, r5, r6}
-	.cfi_remember_state
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 360 0
 	b	FlashSetRandomizer
-.LVL32:
 .L43:
-	.cfi_restore_state
-	.loc 2 349 0
 	movs	r2, #0
 	str	r2, [r3, #2056]
-	.loc 2 350 0
 	str	r2, [r3, #2052]
-	.loc 2 351 0
 	str	r2, [r3, #2052]
-	.loc 2 352 0
 	str	r6, [r3, #2052]
-	.loc 2 353 0
 	str	r5, [r3, #2052]
-	.loc 2 354 0
 	str	r4, [r3, #2052]
-	.loc 2 355 0
 	movs	r4, #5
 	str	r4, [r3, #2056]
-	.loc 2 356 0
 	str	r2, [r3, #2052]
-	.loc 2 357 0
 	str	r2, [r3, #2052]
 	b	.L45
 .L47:
@@ -455,8 +273,6 @@ FlashReadDpDataOutCmd:
 .L46:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE212:
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -467,38 +283,19 @@ FlashReadDpDataOutCmd:
 	.fpu softvfp
 	.type	flash_enter_slc_mode, %function
 flash_enter_slc_mode:
-.LFB214:
-	.loc 2 399 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL33:
-	.loc 2 401 0
 	ldr	r3, .L53
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L48
-.LVL34:
-.LBB146:
-.LBB147:
-.LBB148:
-.LBB149:
-	.loc 3 123 0
 	ldr	r3, .L53+4
 	ldr	r2, [r3, r0, lsl #3]
-.LVL35:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL36:
-.LBE149:
-.LBE148:
-	.loc 2 403 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #218
 	str	r2, [r3, #2056]
-.LVL37:
 .L48:
 	bx	lr
 .L54:
@@ -506,10 +303,6 @@ flash_enter_slc_mode:
 .L53:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-.LBE147:
-.LBE146:
-	.cfi_endproc
-.LFE214:
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -520,38 +313,19 @@ flash_enter_slc_mode:
 	.fpu softvfp
 	.type	flash_exit_slc_mode, %function
 flash_exit_slc_mode:
-.LFB215:
-	.loc 2 408 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL38:
-	.loc 2 410 0
 	ldr	r3, .L60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L55
-.LVL39:
-.LBB154:
-.LBB155:
-.LBB156:
-.LBB157:
-	.loc 3 123 0
 	ldr	r3, .L60+4
 	ldr	r2, [r3, r0, lsl #3]
-.LVL40:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL41:
-.LBE157:
-.LBE156:
-	.loc 2 412 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #223
 	str	r2, [r3, #2056]
-.LVL42:
 .L55:
 	bx	lr
 .L61:
@@ -559,10 +333,6 @@ flash_exit_slc_mode:
 .L60:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-.LBE155:
-.LBE154:
-	.cfi_endproc
-.LFE215:
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
@@ -573,62 +343,32 @@ flash_exit_slc_mode:
 	.fpu softvfp
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
-.LFB216:
-	.loc 2 417 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL43:
 	push	{r4, r5}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 5, -4
-	.loc 2 426 0
 	lsrs	r2, r1, #16
-.LBB158:
-.LBB159:
-	.loc 3 123 0
 	ldr	r4, .L63
 	ldr	r3, [r4, r0, lsl #3]
-.LVL44:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
-.LVL45:
-.LBE159:
-.LBE158:
-	.loc 2 421 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #128
 	str	r4, [r3, #2056]
-	.loc 2 422 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
-	.loc 2 423 0
 	str	r4, [r3, #2052]
-	.loc 2 424 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
-	.loc 2 425 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
-	.loc 2 426 0
 	str	r2, [r3, #2052]
-	.loc 2 428 0
 	pop	{r4, r5}
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 427 0
 	b	FlashSetRandomizer
-.LVL46:
 .L64:
 	.align	2
 .L63:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE216:
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
@@ -639,70 +379,38 @@ FlashProgFirstCmd:
 	.fpu softvfp
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
-.LFB217:
-	.loc 2 431 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL47:
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-.LBB160:
-.LBB161:
-	.loc 3 123 0
 	ldr	r4, .L70
 	ldr	r3, [r4, r0, lsl #3]
-.LVL48:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
-.LVL49:
 	lsls	r0, r0, #8
-.LBE161:
-.LBE160:
-	.loc 2 435 0
 	cbz	r2, .L66
-	.loc 2 436 0
 	adds	r2, r3, r0
-.LVL50:
 	movs	r4, #96
 	str	r4, [r2, #2056]
-	.loc 2 437 0
 	uxtb	r4, r1
 	str	r4, [r2, #2052]
-	.loc 2 438 0
 	lsrs	r4, r1, #8
 	str	r4, [r2, #2052]
-	.loc 2 439 0
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
-	.loc 2 440 0
 	ldr	r2, .L70+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
-.LVL51:
 .L66:
-	.loc 2 442 0
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
-	.loc 2 443 0
 	uxtb	r2, r1
 	str	r2, [r3, #2052]
-	.loc 2 444 0
 	lsrs	r2, r1, #8
-	.loc 2 445 0
 	lsrs	r1, r1, #16
-.LVL52:
-	.loc 2 444 0
 	str	r2, [r3, #2052]
-	.loc 2 446 0
 	movs	r2, #208
-	.loc 2 445 0
 	str	r1, [r3, #2052]
-	.loc 2 446 0
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
 .L71:
@@ -710,8 +418,6 @@ FlashEraseCmd:
 .L70:
 	.word	.LANCHOR6
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE217:
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
@@ -722,64 +428,34 @@ FlashEraseCmd:
 	.fpu softvfp
 	.type	FlashProgDpSecondCmd, %function
 FlashProgDpSecondCmd:
-.LFB218:
-	.loc 2 450 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL53:
 	push	{r4, r5}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 5, -4
-	.loc 2 459 0
 	lsrs	r2, r1, #16
-.LBB162:
-.LBB163:
-	.loc 3 123 0
 	ldr	r4, .L73
 	ldr	r3, [r4, r0, lsl #3]
-.LVL54:
-	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
-.LVL55:
-.LBE163:
-.LBE162:
-	.loc 2 454 0
 	ldr	r4, .L73+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
-	.loc 2 455 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
-	.loc 2 456 0
 	str	r4, [r3, #2052]
-	.loc 2 457 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
-	.loc 2 458 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
-	.loc 2 459 0
 	str	r2, [r3, #2052]
-	.loc 2 461 0
 	pop	{r4, r5}
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 460 0
 	b	FlashSetRandomizer
-.LVL56:
 .L74:
 	.align	2
 .L73:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE218:
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
 	.align	1
@@ -790,27 +466,13 @@ FlashProgDpSecondCmd:
 	.fpu softvfp
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
-.LFB219:
-	.loc 2 464 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL57:
-.LBB164:
-.LBB165:
-	.loc 3 123 0
 	ldr	r3, .L76
 	ldr	r2, [r3, r0, lsl #3]
-.LVL58:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL59:
-.LBE165:
-.LBE164:
-	.loc 2 468 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #16
 	str	r2, [r3, #2056]
@@ -819,8 +481,6 @@ FlashProgSecondCmd:
 	.align	2
 .L76:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE219:
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
@@ -831,41 +491,15 @@ FlashProgSecondCmd:
 	.fpu softvfp
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
-.LFB220:
-	.loc 2 472 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL60:
-.LBB166:
-.LBB167:
-	.loc 3 123 0
 	ldr	r3, .L79
-.LBE167:
-.LBE166:
-	.loc 2 476 0
 	ldr	r1, .L79+4
-.LVL61:
-.LBB170:
-.LBB168:
-	.loc 3 123 0
 	ldr	r2, [r3, r0, lsl #3]
-.LVL62:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-.LBE168:
-.LBE170:
-	.loc 2 476 0
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
-.LBB171:
-.LBB169:
-	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL63:
-.LBE169:
-.LBE171:
-	.loc 2 476 0
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
@@ -874,8 +508,6 @@ FlashProgDpFirstCmd:
 .L79:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE220:
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
 	.align	1
@@ -886,69 +518,26 @@ FlashProgDpFirstCmd:
 	.fpu softvfp
 	.type	FlashReadStatus, %function
 FlashReadStatus:
-.LFB221:
-	.loc 2 480 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL64:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 484 0
 	movs	r2, #112
-.LBB172:
-.LBB173:
-	.loc 3 123 0
 	ldr	r3, .L82
 	ldr	r5, [r3, r0, lsl #3]
-.LVL65:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-.LBE173:
-.LBE172:
-.LBB175:
-.LBB176:
-	.loc 3 306 0
 	movs	r0, #80
-.LVL66:
-.LBE176:
-.LBE175:
-.LBB178:
-.LBB174:
-	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-.LVL67:
-.LBE174:
-.LBE178:
-	.loc 2 484 0
 	add	r3, r5, r4, lsl #8
-	.loc 2 487 0
 	adds	r4, r4, #8
 	lsls	r4, r4, #8
-	.loc 2 484 0
 	str	r2, [r3, #2056]
-.LVL68:
-.LBB179:
-.LBB177:
-	.loc 3 306 0
 	bl	udelay
-.LVL69:
-.LBE177:
-.LBE179:
-	.loc 2 487 0
 	ldr	r0, [r5, r4]
-	.loc 2 488 0
 	pop	{r3, r4, r5, pc}
 .L83:
 	.align	2
 .L82:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE221:
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.JSHash,"ax",%progbits
 	.align	1
@@ -959,47 +548,27 @@ FlashReadStatus:
 	.fpu softvfp
 	.type	JSHash, %function
 JSHash:
-.LFB229:
-	.loc 2 800 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL70:
-	.loc 2 801 0
 	ldr	r3, .L87
 	add	r1, r1, r0
-.LVL71:
-	.loc 2 800 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-.LVL72:
 .L85:
-	.loc 2 804 0 discriminator 1
 	cmp	r0, r1
 	bne	.L86
-	.loc 2 807 0
 	mov	r0, r3
-.LVL73:
 	pop	{r4, pc}
-.LVL74:
 .L86:
-	.loc 2 805 0 discriminator 3
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
-.LVL75:
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
-.LVL76:
 	b	.L85
 .L88:
 	.align	2
 .L87:
 	.word	1204201446
-	.cfi_endproc
-.LFE229:
 	.size	JSHash, .-JSHash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
@@ -1010,17 +579,11 @@ JSHash:
 	.fpu softvfp
 	.type	FlashLoadIdbInfo, %function
 FlashLoadIdbInfo:
-.LFB232:
-	.loc 2 925 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 927 0
 	movs	r0, #0
 	bx	lr
-	.cfi_endproc
-.LFE232:
 	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
 	.section	.text.FlashPrintInfo,"ax",%progbits
 	.align	1
@@ -1031,14 +594,10 @@ FlashLoadIdbInfo:
 	.fpu softvfp
 	.type	FlashPrintInfo, %function
 FlashPrintInfo:
-.LFB538:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE538:
 	.size	FlashPrintInfo, .-FlashPrintInfo
 	.section	.text.ToshibaSetRRPara,"ax",%progbits
 	.align	1
@@ -1049,93 +608,47 @@ FlashPrintInfo:
 	.fpu softvfp
 	.type	ToshibaSetRRPara, %function
 ToshibaSetRRPara:
-.LFB239:
-	.loc 2 1723 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL77:
-	.loc 2 1723 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
 	add	r7, r1, r1, lsl #2
-	.loc 2 1726 0
 	ldr	r10, .L99+12
-	.loc 2 1723 0
 	mov	r5, r0
 	mov	r6, r1
-	.loc 2 1726 0
 	movs	r4, #0
-	.loc 2 1728 0
 	ldr	r8, .L99+16
-.LVL78:
 .L92:
-	.loc 2 1726 0 discriminator 1
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L96
-	.loc 2 1738 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL79:
 .L96:
-	.loc 2 1727 0
 	movs	r3, #85
-.LBB180:
-.LBB181:
-	.loc 3 306 0
 	movs	r0, #200
-.LBE181:
-.LBE180:
-	.loc 2 1727 0
 	str	r3, [r5, #8]
-	.loc 2 1728 0
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
-.LVL80:
-.LBB183:
-.LBB182:
-	.loc 3 306 0
 	bl	udelay
-.LVL81:
-.LBE182:
-.LBE183:
-	.loc 2 1730 0
 	ldr	r3, .L99
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
 	bne	.L93
-	.loc 2 1731 0
 	adds	r3, r4, r7
 	add	r3, r3, r8
 .L98:
-	.loc 2 1733 0
 	ldrsb	r3, [r3, #5]
 .L97:
-	.loc 2 1735 0
 	str	r3, [r5]
-	.loc 2 1726 0
 	adds	r4, r4, #1
-.LVL82:
 	b	.L92
 .L93:
-	.loc 2 1732 0
 	cmp	r3, #35
 	bne	.L95
-	.loc 2 1733 0
 	ldr	r3, .L99+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
 	b	.L98
 .L95:
-	.loc 2 1735 0
 	ldr	r3, .L99+8
 	ldrsb	r3, [r3, r6]
 	b	.L97
@@ -1147,8 +660,6 @@ ToshibaSetRRPara:
 	.word	.LANCHOR12
 	.word	.LANCHOR13
 	.word	.LANCHOR9
-	.cfi_endproc
-.LFE239:
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
@@ -1159,82 +670,38 @@ ToshibaSetRRPara:
 	.fpu softvfp
 	.type	SamsungSetRRPara, %function
 SamsungSetRRPara:
-.LFB241:
-	.loc 2 1807 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL83:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 1807 0
 	mov	r6, r0
 	ldr	r7, .L104
-	.loc 2 1810 0
 	movs	r4, #0
-	.loc 2 1811 0
 	mov	r10, #161
-	.loc 2 1810 0
 	ldr	r8, .L104+4
 	add	r1, r7, r1, lsl #2
-.LVL84:
 	adds	r5, r1, #3
-.LVL85:
 .L102:
-	.loc 2 1810 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L103
-	.loc 2 1817 0 is_stmt 1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL86:
 .L103:
-	.loc 2 1812 0 discriminator 3
 	movs	r3, #0
-	.loc 2 1811 0 discriminator 3
 	str	r10, [r6, #8]
-	.loc 2 1812 0 discriminator 3
 	str	r3, [r6]
-.LBB184:
-.LBB185:
-	.loc 3 306 0 discriminator 3
 	mov	r0, #300
-.LBE185:
-.LBE184:
-	.loc 2 1813 0 discriminator 3
 	ldrsb	r3, [r7, r4]
-	.loc 2 1810 0 discriminator 3
 	adds	r4, r4, #1
-.LVL87:
-	.loc 2 1813 0 discriminator 3
 	str	r3, [r6]
-	.loc 2 1814 0 discriminator 3
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
-.LVL88:
-.LBB187:
-.LBB186:
-	.loc 3 306 0 discriminator 3
 	bl	udelay
-.LVL89:
 	b	.L102
 .L105:
 	.align	2
 .L104:
 	.word	.LANCHOR14
 	.word	.LANCHOR13
-.LBE186:
-.LBE187:
-	.cfi_endproc
-.LFE241:
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.global	__aeabi_uidiv
 	.global	__aeabi_uidivmod
@@ -1247,114 +714,59 @@ SamsungSetRRPara:
 	.fpu softvfp
 	.type	LogAddr2PhyAddr, %function
 LogAddr2PhyAddr:
-.LFB254:
-	.loc 2 2669 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL90:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2669 0
 	mov	r6, r3
-	.loc 2 2671 0
 	ldr	r3, .L111
-.LVL91:
-	.loc 2 2669 0
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
-	.loc 2 2671 0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
-	.loc 2 2675 0
 	ldr	r3, .L111+4
 	ldrh	fp, [r3]
-	.loc 2 2671 0
 	uxth	r4, r4
-.LVL92:
-	.loc 2 2677 0
 	ldr	r3, .L111+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	.loc 2 2680 0
 	ldr	r3, [r0, #4]
-	.loc 2 2678 0
 	it	eq
 	lsleq	r1, fp, #1
-.LVL93:
-	.loc 2 2681 0
 	ubfx	r2, r3, #10, #16
-.LVL94:
-	.loc 2 2678 0
 	it	eq
 	uxtheq	fp, r1
-.LVL95:
-	.loc 2 2682 0
 	mov	r0, r2
-.LVL96:
-	.loc 2 2681 0
 	str	r3, [sp, #4]
-.LVL97:
-	.loc 2 2682 0
 	mov	r1, r4
 	str	r2, [sp]
 	bl	__aeabi_uidiv
-.LVL98:
 	ldr	r2, [sp]
 	uxth	r10, r0
-.LVL99:
 	mov	r1, r4
 	mov	r0, r2
 	bl	__aeabi_uidivmod
-.LVL100:
-	.loc 2 2684 0
 	ldr	r3, [sp, #4]
-	.loc 2 2685 0
 	cmp	r8, #1
 	uxth	r1, r1
-.LVL101:
-	.loc 2 2684 0
 	ubfx	r3, r3, #0, #10
-.LVL102:
-	.loc 2 2685 0
 	bne	.L108
-	.loc 2 2685 0 is_stmt 0 discriminator 1
 	ldr	r2, .L111+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cbnz	r2, .L108
-	.loc 2 2686 0 is_stmt 1
 	ldr	r2, .L111+16
 	ldrh	r3, [r2, r3, lsl #1]
-.LVL103:
 .L108:
-	.loc 2 2687 0
 	ldr	r2, .L111+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
-.LVL104:
 	add	r1, r1, r3
-	.loc 2 2691 0
 	ldrb	r3, [sp, #40]	@ zero_extendqisi2
-.LVL105:
-	.loc 2 2687 0
 	str	r1, [r7]
-	.loc 2 2688 0
 	str	r10, [r6]
-.LVL106:
-	.loc 2 2691 0
 	cmp	r3, #1
 	bls	.L110
-	.loc 2 2692 0
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
@@ -1362,17 +774,10 @@ LogAddr2PhyAddr:
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 .L109:
-.LVL107:
-	.loc 2 2696 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL108:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL109:
 .L110:
-	.cfi_restore_state
 	movs	r0, #0
 	b	.L109
 .L112:
@@ -1384,8 +789,6 @@ LogAddr2PhyAddr:
 	.word	.LANCHOR8
 	.word	.LANCHOR16
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE254:
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
 	.section	.text.FlashReadStatusEN,"ax",%progbits
 	.align	1
@@ -1396,38 +799,13 @@ LogAddr2PhyAddr:
 	.fpu softvfp
 	.type	FlashReadStatusEN, %function
 FlashReadStatusEN:
-.LFB255:
-	.loc 2 2699 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL110:
-.LBB188:
-.LBB189:
-	.loc 3 123 0
 	ldr	r3, .L125
-.LBE189:
-.LBE188:
-	.loc 2 2699 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-.LBB191:
-.LBB190:
-	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
-.LVL111:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-.LVL112:
-.LBE190:
-.LBE191:
-	.loc 2 2703 0
 	ldr	r3, .L125+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
@@ -1436,74 +814,38 @@ FlashReadStatusEN:
 	add	r4, r4, #8
 	bne	.L114
 	ldr	r0, .L125+8
-.LVL113:
-	.loc 2 2704 0
 	cbnz	r2, .L115
-	.loc 2 2705 0
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-.LVL114:
 .L124:
-	.loc 2 2707 0
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
-	.loc 2 2709 0
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
 	cbz	r0, .L119
-.LBB192:
-	.loc 2 2712 0 discriminator 1
 	add	r6, r5, r4, lsl #8
-.LBE192:
 	movs	r2, #0
 .L118:
-.LVL115:
-.LBB193:
-	.loc 2 2711 0 discriminator 1
 	cmp	r2, r0
 	bcc	.L120
-.LVL116:
 .L119:
-.LBE193:
-	.loc 2 2719 0
 	lsls	r4, r4, #8
-.LBB194:
-.LBB195:
-	.loc 3 306 0
 	movs	r0, #80
 	bl	udelay
-.LVL117:
-.LBE195:
-.LBE194:
-	.loc 2 2719 0
 	ldr	r0, [r5, r4]
-	.loc 2 2720 0
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.LVL118:
 .L115:
-	.loc 2 2707 0
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-.LVL119:
 	b	.L124
-.LVL120:
 .L120:
-.LBB196:
-	.loc 2 2712 0 discriminator 3
 	lsls	r3, r2, #3
-	.loc 2 2711 0 discriminator 3
 	adds	r2, r2, #1
-.LVL121:
-	.loc 2 2712 0 discriminator 3
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
 	b	.L118
-.LVL122:
 .L114:
-.LBE196:
-	.loc 2 2716 0
 	add	r3, r3, r5
 	movs	r2, #112
-.LVL123:
 	str	r2, [r3, #2056]
 	b	.L119
 .L126:
@@ -1512,8 +854,6 @@ FlashReadStatusEN:
 	.word	.LANCHOR6
 	.word	.LANCHOR18
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE255:
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",%progbits
 	.align	1
@@ -1524,43 +864,23 @@ FlashReadStatusEN:
 	.fpu softvfp
 	.type	FlashWaitReadyEN, %function
 FlashWaitReadyEN:
-.LFB256:
-	.loc 2 2723 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL124:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-.LVL125:
 .L131:
-	.loc 2 2727 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
-.LVL126:
-	.loc 2 2728 0
 	cmp	r0, #255
-	.loc 2 2727 0
 	mov	r3, r0
-.LVL127:
-	.loc 2 2728 0
 	beq	.L131
-	.loc 2 2730 0
 	lsls	r3, r3, #25
 	bpl	.L131
-	.loc 2 2734 0
 	pop	{r4, r5, r6, pc}
-	.cfi_endproc
-.LFE256:
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
 	.align	1
@@ -1571,16 +891,10 @@ FlashWaitReadyEN:
 	.fpu softvfp
 	.type	NandcReadDontCaseBusyEn, %function
 NandcReadDontCaseBusyEn:
-.LFB268:
-	.loc 3 111 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL128:
 	bx	lr
-	.cfi_endproc
-.LFE268:
 	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
 	.section	.text.NandcGetChipIf,"ax",%progbits
 	.align	1
@@ -1591,31 +905,20 @@ NandcReadDontCaseBusyEn:
 	.fpu softvfp
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
-.LFB269:
-	.loc 3 120 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL129:
-	.loc 3 123 0
 	ldr	r2, .L136
-	.loc 3 124 0
 	add	r3, r2, r0, lsl #3
-	.loc 3 126 0
 	ldr	r0, [r2, r0, lsl #3]
-.LVL130:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
-	.loc 3 128 0
 	add	r0, r0, r3, lsl #8
 	bx	lr
 .L137:
 	.align	2
 .L136:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE269:
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
@@ -1626,19 +929,13 @@ NandcGetChipIf:
 	.fpu softvfp
 	.type	NandcSetDdrPara, %function
 NandcSetDdrPara:
-.LFB270:
-	.loc 3 131 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL131:
-	.loc 3 133 0
 	ldr	r3, .L139
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
-.LVL132:
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
@@ -1646,8 +943,6 @@ NandcSetDdrPara:
 	.align	2
 .L139:
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE270:
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
 	.align	1
@@ -1658,17 +953,11 @@ NandcSetDdrPara:
 	.fpu softvfp
 	.type	NandcSetDdrDiv, %function
 NandcSetDdrDiv:
-.LFB271:
-	.loc 3 143 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL133:
-	.loc 3 144 0
 	ldr	r3, .L142
 	orr	r0, r0, #16640
-.LVL134:
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
@@ -1676,8 +965,6 @@ NandcSetDdrDiv:
 	.align	2
 .L142:
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE271:
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
 	.align	1
@@ -1688,37 +975,24 @@ NandcSetDdrDiv:
 	.fpu softvfp
 	.type	NandcSetDdrMode, %function
 NandcSetDdrMode:
-.LFB272:
-	.loc 3 148 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL135:
-	.loc 3 150 0
 	ldr	r3, .L147
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-.LVL136:
-	.loc 3 152 0
 	cbnz	r0, .L145
-	.loc 3 151 0
 	bfi	r3, r0, #13, #1
 .L146:
-	.loc 3 160 0
 	str	r3, [r2]
 	bx	lr
 .L145:
-	.loc 3 158 0
 	orr	r3, r3, #253952
-.LVL137:
 	b	.L146
 .L148:
 	.align	2
 .L147:
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE272:
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
 	.align	1
@@ -1729,62 +1003,33 @@ NandcSetDdrMode:
 	.fpu softvfp
 	.type	NandcSetMode, %function
 NandcSetMode:
-.LFB273:
-	.loc 3 170 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL138:
-	.loc 3 174 0
 	ldr	r3, .L156
-	.loc 3 175 0
 	ands	r1, r0, #6
-	.loc 3 174 0
 	ldr	r2, [r3]
 	ldr	r3, [r2]
-.LVL139:
-	.loc 3 175 0
 	beq	.L150
-	.loc 3 182 0
 	lsls	r1, r0, #29
-	.loc 3 228 0
 	movw	r1, #16641
 	str	r1, [r2, #344]
-	.loc 3 178 0
 	orr	r3, r3, #24576
-.LVL140:
-	.loc 3 229 0
 	ldr	r1, .L156+4
-	.loc 3 179 0
 	bfc	r3, #15, #1
-.LVL141:
-	.loc 3 181 0
 	orr	r3, r3, #196608
-.LVL142:
-	.loc 3 184 0
 	it	mi
 	orrmi	r3, r3, #32768
-.LVL143:
-	.loc 3 229 0
 	str	r1, [r2, #304]
-	.loc 3 231 0
 	movs	r1, #38
 	str	r1, [r2, #308]
-	.loc 3 232 0
 	movs	r1, #39
 	str	r1, [r2, #308]
-.LVL144:
 .L152:
-	.loc 3 264 0
 	str	r3, [r2]
-	.loc 3 272 0
 	movs	r0, #0
-.LVL145:
 	bx	lr
-.LVL146:
 .L150:
-	.loc 3 262 0
 	bfi	r3, r1, #13, #1
 	b	.L152
 .L157:
@@ -1792,8 +1037,6 @@ NandcSetMode:
 .L156:
 	.word	.LANCHOR19
 	.word	1710595
-	.cfi_endproc
-.LFE273:
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",%progbits
 	.align	1
@@ -1804,41 +1047,23 @@ NandcSetMode:
 	.fpu softvfp
 	.type	NandcFlashCs, %function
 NandcFlashCs:
-.LFB274:
-	.loc 3 275 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL147:
-	.loc 3 278 0
 	ldr	r3, .L159
-	.loc 3 283 0
 	movs	r2, #1
-	.loc 3 278 0
 	ldr	r1, [r3, r0, lsl #3]
-.LVL148:
-	.loc 3 279 0
 	add	r0, r3, r0, lsl #3
-.LVL149:
-	.loc 3 283 0
 	ldrb	r0, [r0, #4]	@ zero_extendqisi2
-.LVL150:
-	.loc 3 282 0
 	ldr	r3, [r1]
-	.loc 3 283 0
 	lsls	r2, r2, r0
 	bfi	r3, r2, #0, #8
-.LVL151:
-	.loc 3 286 0
 	str	r3, [r1]
 	bx	lr
 .L160:
 	.align	2
 .L159:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE274:
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
@@ -1849,34 +1074,20 @@ NandcFlashCs:
 	.fpu softvfp
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
-.LFB275:
-	.loc 3 290 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL152:
-	.loc 3 293 0
 	ldr	r3, .L162
 	ldr	r2, [r3, r0, lsl #3]
-.LVL153:
-	.loc 3 296 0
 	ldr	r3, [r2]
-	.loc 3 297 0
 	bfc	r3, #0, #8
-.LVL154:
-	.loc 3 298 0
 	bfc	r3, #17, #1
-	.loc 3 301 0
 	str	r3, [r2]
-.LVL155:
 	bx	lr
 .L163:
 	.align	2
 .L162:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE275:
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
@@ -1887,154 +1098,76 @@ NandcFlashDeCs:
 	.fpu softvfp
 	.type	HynixSetRRPara, %function
 HynixSetRRPara:
-.LFB244:
-	.loc 2 1901 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL156:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1901 0
 	mov	r7, r3
-	.loc 2 1906 0
 	ldr	r3, .L171
-.LVL157:
-	.loc 2 1901 0
 	mov	r5, r0
 	mov	r6, r1
 	mov	r10, r2
 	ldr	r4, .L171+4
-	.loc 2 1906 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
 	bne	.L165
-	.loc 2 1908 0
 	movs	r3, #20
 	add	r3, r3, r0, lsl #6
 	add	r3, r3, r7, lsl #2
-.LVL158:
 .L170:
-	.loc 2 1911 0
 	add	r4, r4, r3
-.LVL159:
 .L166:
-.LBB197:
-.LBB198:
-	.loc 3 123 0
 	ldr	r3, .L171+8
-.LBE198:
-.LBE197:
-	.loc 2 1916 0
 	mov	r0, r5
-.LVL160:
 	subs	r6, r6, #1
 	subs	r4, r4, #1
-.LVL161:
 	add	r6, r6, r10
-.LBB200:
-.LBB199:
-	.loc 3 123 0
 	ldr	r8, [r3, r5, lsl #3]
-.LVL162:
-	.loc 3 124 0
 	add	r3, r3, r5, lsl #3
 	ldrb	fp, [r3, #4]	@ zero_extendqisi2
-.LVL163:
-.LBE199:
-.LBE200:
-	.loc 2 1916 0
 	bl	NandcFlashCs
-.LVL164:
-	.loc 2 1917 0
 	movs	r3, #54
 	lsl	fp, fp, #8
 	add	r0, r8, fp
 	str	r3, [r0, #2056]
-.LVL165:
 	add	r3, r10, #-1
 	mov	r10, r0
-.LVL166:
 .L168:
-	.loc 2 1918 0 discriminator 1
 	cmp	r3, r6
 	bne	.L169
-	.loc 2 1923 0
 	movs	r3, #22
-.LVL167:
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
-	.loc 2 1924 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-.LVL168:
-	.loc 2 1925 0
 	ldr	r3, .L171+12
 	strb	r7, [r3, r5]
-	.loc 2 1926 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL169:
 .L165:
-	.cfi_restore_state
-	.loc 2 1909 0
 	cmp	r3, #7
 	bne	.L167
-	.loc 2 1911 0
 	movs	r3, #160
 	movs	r2, #28
-.LVL170:
 	smlabb	r2, r3, r0, r2
 	movs	r3, #10
 	smlabb	r3, r3, r7, r2
 	b	.L170
-.LVL171:
 .L167:
-	.loc 2 1913 0
 	adds	r3, r7, #2
 	add	r3, r3, r0, lsl #3
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
-.LVL172:
 	b	.L166
-.LVL173:
 .L169:
-	.loc 2 1919 0 discriminator 3
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
-.LVL174:
-.LBB201:
-.LBB202:
-	.loc 3 306 0 discriminator 3
 	movs	r0, #200
-.LBE202:
-.LBE201:
-	.loc 2 1919 0 discriminator 3
 	str	r2, [r10, #2052]
-.LVL175:
 	str	r3, [sp, #4]
-.LBB204:
-.LBB203:
-	.loc 3 306 0 discriminator 3
 	bl	udelay
-.LVL176:
-.LBE203:
-.LBE204:
-	.loc 2 1921 0 discriminator 3
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
-.LVL177:
 	str	r2, [r10, #2048]
 	b	.L168
 .L172:
@@ -2044,8 +1177,6 @@ HynixSetRRPara:
 	.word	.LANCHOR20
 	.word	.LANCHOR6
 	.word	.LANCHOR21
-	.cfi_endproc
-.LFE244:
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -2056,57 +1187,30 @@ HynixSetRRPara:
 	.fpu softvfp
 	.type	FlashSetReadRetryDefault, %function
 FlashSetReadRetryDefault:
-.LFB246:
-	.loc 2 1970 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL178:
-	.loc 2 1972 0
 	ldr	r3, .L179
-	.loc 2 1970 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 1972 0
 	ldr	r3, [r3]
-	.loc 2 1974 0
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L173
-.LBB207:
-.LBB208:
-	.loc 2 1977 0
 	ldr	r5, .L179+4
-.LBE208:
-.LBE207:
 	movs	r4, #0
-.LBB210:
-.LBB209:
 	adds	r6, r5, #4
-.LVL179:
 .L176:
-	.loc 2 1976 0
 	ldr	r3, .L179+8
 	uxtb	r0, r4
-.LVL180:
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
 	bne	.L175
-	.loc 2 1977 0
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.LVL181:
 .L175:
 	adds	r4, r4, #1
-.LVL182:
-	.loc 2 1975 0
 	cmp	r4, #4
 	bne	.L176
 .L173:
@@ -2117,10 +1221,6 @@ FlashSetReadRetryDefault:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
-.LBE209:
-.LBE210:
-	.cfi_endproc
-.LFE246:
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",%progbits
 	.align	1
@@ -2131,36 +1231,18 @@ FlashSetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashWaitCmdDone, %function
 FlashWaitCmdDone:
-.LFB257:
-	.loc 2 2737 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL183:
-	.loc 2 2742 0
 	ldr	r2, .L188
 	lsls	r3, r0, #4
-	.loc 2 2737 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2737 0
 	mov	r6, r0
-	.loc 2 2742 0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
 	cbz	r1, .L183
-	.loc 2 2739 0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	.loc 2 2743 0
 	mov	r0, r5
-.LVL184:
 	bl	NandcFlashCs
-.LVL185:
-	.loc 2 2744 0
 	ldr	r3, .L188+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
@@ -2169,46 +1251,26 @@ FlashWaitCmdDone:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-.LVL186:
 	mov	r1, r0
-.LVL187:
-	.loc 2 2745 0
 	mov	r0, r5
-.LVL188:
 	bl	NandcFlashDeCs
-.LVL189:
-	.loc 2 2749 0
 	ldr	r3, [r4, #8]
-	.loc 2 2747 0
 	sbfx	r1, r1, #0, #1
-.LVL190:
-	.loc 2 2749 0
+	ldr	r2, [r4, #12]
 	str	r1, [r3]
-	.loc 2 2750 0
 	movs	r3, #0
-	.loc 2 2751 0
-	ldr	r2, [r4, #12]
-	.loc 2 2750 0
 	str	r3, [r4, #8]
-	.loc 2 2751 0
 	cbz	r2, .L183
-	.loc 2 2752 0
 	str	r1, [r2]
-	.loc 2 2753 0
 	str	r3, [r4, #12]
-.LVL191:
 .L183:
-	.loc 2 2757 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL192:
 .L189:
 	.align	2
 .L188:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE257:
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
 	.section	.text.NandcDelayns,"ax",%progbits
 	.align	1
@@ -2219,24 +1281,12 @@ FlashWaitCmdDone:
 	.fpu softvfp
 	.type	NandcDelayns, %function
 NandcDelayns:
-.LFB276:
-	.loc 3 305 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL193:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 306 0
 	bl	udelay
-.LVL194:
-	.loc 3 308 0
 	movs	r0, #0
 	pop	{r3, pc}
-	.cfi_endproc
-.LFE276:
 	.size	NandcDelayns, .-NandcDelayns
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
@@ -2247,69 +1297,35 @@ NandcDelayns:
 	.fpu softvfp
 	.type	NandcWaitFlashReady, %function
 NandcWaitFlashReady:
-.LFB277:
-	.loc 3 311 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL195:
-	.loc 3 316 0
 	ldr	r3, .L196
-	.loc 3 311 0
 	push	{r0, r1, r2, r4, r5, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 316 0
 	ldr	r4, .L196+4
 	ldr	r5, [r3, r0, lsl #3]
-.LVL196:
 .L193:
-.LBB211:
-.LBB212:
-	.loc 3 306 0
 	movs	r0, #100
 	bl	udelay
-.LVL197:
-.LBE212:
-.LBE211:
-	.loc 3 322 0
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
-	.loc 3 323 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
 	bmi	.L194
-.LVL198:
-	.loc 3 319 0 discriminator 2
 	subs	r4, r4, #1
-.LVL199:
 	bne	.L193
-	.loc 3 333 0
 	mov	r0, #-1
-.LVL200:
 .L191:
-	.loc 3 336 0
 	add	sp, sp, #12
-	.cfi_remember_state
-	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL201:
 .L194:
-	.cfi_restore_state
-	.loc 3 318 0
 	movs	r0, #0
-	.loc 3 335 0
 	b	.L191
 .L197:
 	.align	2
 .L196:
 	.word	.LANCHOR6
 	.word	100000
-	.cfi_endproc
-.LFE277:
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",%progbits
 	.align	1
@@ -2320,70 +1336,27 @@ NandcWaitFlashReady:
 	.fpu softvfp
 	.type	FlashReset, %function
 FlashReset:
-.LFB207:
-	.loc 2 267 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL202:
-.LBB213:
-.LBB214:
-	.loc 3 123 0
 	ldr	r3, .L199
-.LBE214:
-.LBE213:
-	.loc 2 267 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 267 0
 	mov	r4, r0
-.LBB216:
-.LBB215:
-	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
-.LVL203:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
-	.loc 3 126 0
 	ldrb	r6, [r3, #4]	@ zero_extendqisi2
-.LVL204:
-.LBE215:
-.LBE216:
-	.loc 2 271 0
 	bl	NandcFlashCs
-.LVL205:
-	.loc 2 272 0
 	movs	r3, #255
-	.loc 2 273 0
 	mov	r0, r4
-	.loc 2 272 0
 	add	r5, r5, r6, lsl #8
 	str	r3, [r5, #2056]
-	.loc 2 273 0
 	bl	NandcWaitFlashReady
-.LVL206:
-	.loc 2 274 0
 	mov	r0, r4
-	.loc 2 275 0
 	pop	{r4, r5, r6, lr}
-	.cfi_restore 14
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 2 274 0
 	b	NandcFlashDeCs
-.LVL207:
 .L200:
 	.align	2
 .L199:
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE207:
 	.size	FlashReset, .-FlashReset
 	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
@@ -2394,57 +1367,29 @@ FlashReset:
 	.fpu softvfp
 	.type	FlashEraseBlock, %function
 FlashEraseBlock:
-.LFB225:
-	.loc 2 589 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL208:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 589 0
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
-	.loc 2 593 0
 	bl	NandcWaitFlashReady
-.LVL209:
-	.loc 2 594 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL210:
-	.loc 2 595 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashEraseCmd
-.LVL211:
-	.loc 2 596 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL212:
-	.loc 2 597 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL213:
 	mov	r1, r0
-.LVL214:
-	.loc 2 598 0
 	mov	r0, r4
-.LVL215:
 	bl	NandcFlashDeCs
-.LVL216:
-	.loc 2 603 0
 	and	r0, r1, #1
-.LVL217:
 	pop	{r4, r5, r6, pc}
-	.cfi_endproc
-.LFE225:
 	.size	FlashEraseBlock, .-FlashEraseBlock
 	.section	.text.FlashSetInterfaceMode,"ax",%progbits
 	.align	1
@@ -2455,175 +1400,94 @@ FlashEraseBlock:
 	.fpu softvfp
 	.type	FlashSetInterfaceMode, %function
 FlashSetInterfaceMode:
-.LFB226:
-	.loc 2 606 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL218:
-	.loc 2 636 0
 	ldr	r3, .L230
-	.loc 2 645 0
 	mov	ip, #128
-	.loc 2 606 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 636 0
 	movs	r5, #0
-	.loc 2 637 0
 	movs	r7, #239
-	.loc 2 642 0
 	mov	lr, #1
-	.loc 2 643 0
 	mov	r8, #35
-	.loc 2 640 0
 	mov	r10, #32
-	.loc 2 636 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	and	r2, r3, #4
 	and	r3, r3, #1
 	str	r2, [sp]
-	.loc 2 648 0
 	mov	r2, r5
 	str	r3, [sp, #4]
-.LVL219:
 .L212:
-	.loc 2 613 0
 	ldr	r3, .L230+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
-.LVL220:
-	.loc 2 614 0
 	cmp	r4, #152
 	beq	.L203
-	.loc 2 614 0 is_stmt 0 discriminator 1
 	cmp	r4, #69
 	beq	.L203
-	.loc 2 614 0 discriminator 2
 	cmp	r4, #173
 	beq	.L203
-	.loc 2 614 0 discriminator 3
 	cmp	r4, #44
 	bne	.L204
 .L203:
-.LBB217:
-.LBB218:
-	.loc 3 123 0 is_stmt 1
 	ldr	r3, .L230+8
-.LBE218:
-.LBE217:
-	.loc 2 615 0
 	cmp	r0, #1
-.LBB220:
-.LBB219:
-	.loc 3 123 0
 	ldr	r1, [r5, r3]
-	.loc 3 124 0
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LBE219:
-.LBE220:
-	.loc 2 615 0
 	bne	.L205
-	.loc 2 616 0
 	ldr	r6, [sp, #4]
 	cbz	r6, .L204
-	.loc 2 620 0
 	lsls	r3, r3, #8
-	.loc 2 621 0
 	cmp	r4, #173
-	.loc 2 620 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	.loc 2 621 0
 	bne	.L206
-	.loc 2 622 0
 	str	r0, [fp, #2052]
 .L229:
-	.loc 2 646 0
 	str	r2, [fp, #2048]
 	b	.L210
 .L206:
-	.loc 2 624 0
 	cmp	r4, #44
-	.loc 2 626 0
 	ittet	eq
 	moveq	r4, #5
-.LVL221:
-	.loc 2 625 0
 	streq	r0, [fp, #2052]
-	.loc 2 628 0
 	strne	ip, [fp, #2052]
-	.loc 2 626 0
 	streq	r4, [fp, #2048]
-	.loc 2 629 0
 	it	ne
 	strne	r0, [fp, #2048]
-.LVL222:
 .L210:
 	add	r3, r3, r1
-	.loc 2 648 0
 	str	r2, [r3, #2048]
-	.loc 2 649 0
 	str	r2, [r3, #2048]
-	.loc 2 650 0
 	str	r2, [r3, #2048]
 .L204:
 	adds	r5, r5, #8
-	.loc 2 611 0 discriminator 2
 	cmp	r5, #32
 	bne	.L212
-	.loc 2 680 0
 	movs	r0, #0
-.LVL223:
 	bl	NandcWaitFlashReady
-.LVL224:
-	.loc 2 682 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL225:
 .L205:
-	.cfi_restore_state
-	.loc 2 636 0
 	ldr	r6, [sp]
 	cmp	r6, #0
 	beq	.L204
-	.loc 2 637 0
 	lsls	r3, r3, #8
-	.loc 2 638 0
 	cmp	r4, #173
-	.loc 2 637 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
-	.loc 2 638 0
 	bne	.L209
-	.loc 2 639 0
 	str	lr, [fp, #2052]
-	.loc 2 640 0
 	str	r10, [fp, #2048]
 	b	.L210
 .L209:
-	.loc 2 641 0
 	cmp	r4, #44
 	bne	.L211
-	.loc 2 642 0
 	str	lr, [fp, #2052]
-	.loc 2 643 0
 	str	r8, [fp, #2048]
 	b	.L210
 .L211:
-	.loc 2 645 0
 	str	ip, [fp, #2052]
 	b	.L229
 .L231:
@@ -2632,8 +1496,6 @@ FlashSetInterfaceMode:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE226:
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
@@ -2644,100 +1506,86 @@ FlashSetInterfaceMode:
 	.fpu softvfp
 	.type	SandiskSetRRPara, %function
 SandiskSetRRPara:
-.LFB238:
-	.loc 2 1706 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL226:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 1709 0
 	movs	r3, #239
 	str	r3, [r0, #8]
-	.loc 2 1710 0
 	movs	r3, #17
-	.loc 2 1706 0
 	mov	r5, r0
 	mov	r4, r1
-	.loc 2 1710 0
 	str	r3, [r0, #4]
-.LVL227:
-.LBB221:
-.LBB222:
-	.loc 3 306 0
 	movs	r0, #200
-.LVL228:
 	bl	udelay
-.LVL229:
-.LBE222:
-.LBE221:
-	.loc 2 1716 0
-	ldr	r6, .L238
+	ldr	r3, .L238
 	add	r4, r4, r4, lsl #2
-	.loc 2 1712 0
-	ldr	r1, .L238+4
+	ldr	r6, .L238+4
 	movs	r2, #0
-	.loc 2 1713 0
-	ldr	r0, .L238+8
-	.loc 2 1714 0
-	ldr	r7, .L238+12
-.LVL230:
+	ldr	r7, .L238+8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, .L238+12
+	ldrb	r0, [r3]	@ zero_extendqisi2
 .L233:
-	.loc 2 1712 0 discriminator 1
-	ldrb	r3, [r1]	@ zero_extendqisi2
-	cmp	r2, r3
+	cmp	r2, r1
 	bcc	.L236
-	.loc 2 1718 0
 	movs	r0, #0
-	.loc 2 1720 0
 	pop	{r3, r4, r5, r6, r7, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LVL231:
-	.loc 2 1718 0
 	b	NandcWaitFlashReady
-.LVL232:
 .L236:
-	.cfi_restore_state
-	.loc 2 1713 0
-	ldrb	r3, [r0]	@ zero_extendqisi2
-	cmp	r3, #67
-	add	r3, r2, r4
-	.loc 2 1714 0
+	adds	r3, r2, r4
+	cmp	r0, #67
 	ite	eq
 	addeq	r3, r3, r7
-	.loc 2 1716 0
 	addne	r3, r3, r6
 	ldrsb	r3, [r3, #5]
-	.loc 2 1712 0
 	adds	r2, r2, #1
-.LVL233:
-	.loc 2 1716 0
 	str	r3, [r5]
 	b	.L233
 .L239:
 	.align	2
 .L238:
-	.word	.LANCHOR11
 	.word	.LANCHOR13
-	.word	.LANCHOR10
+	.word	.LANCHOR11
 	.word	.LANCHOR9
-	.cfi_endproc
-.LFE238:
+	.word	.LANCHOR10
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.micron_auto_read_calibration_config,"ax",%progbits
+	.align	1
+	.global	micron_auto_read_calibration_config
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	micron_auto_read_calibration_config, %function
+micron_auto_read_calibration_config:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	mov	r6, r1
+	bl	NandcWaitFlashReady
+	ldr	r0, .L241
+	ldr	r4, [r0, r5, lsl #3]
+	add	r0, r0, r5, lsl #3
+	ldrb	r3, [r0, #4]	@ zero_extendqisi2
+	movs	r0, #200
+	add	r4, r4, r3, lsl #8
+	movs	r3, #239
+	str	r3, [r4, #2056]
+	movs	r3, #150
+	str	r3, [r4, #2052]
+	bl	udelay
+	movs	r3, #0
+	str	r6, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	str	r3, [r4, #2048]
+	pop	{r4, r5, r6, pc}
+.L242:
+	.align	2
+.L241:
+	.word	.LANCHOR6
+	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
 	.global	FlashEraseSLc2KBlocks
@@ -2747,48 +1595,23 @@ SandiskSetRRPara:
 	.fpu softvfp
 	.type	FlashEraseSLc2KBlocks, %function
 FlashEraseSLc2KBlocks:
-.LFB260:
-	.loc 2 2901 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL234:
 	push	{r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 28
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
 	mov	r7, r1
-	.loc 2 2911 0
-	ldr	r8, .L250+12
-	.loc 2 2901 0
+	ldr	r8, .L253+12
 	sub	sp, sp, #20
-	.cfi_def_cfa_offset 48
 	mov	r5, r0
-	.loc 2 2909 0
 	movs	r6, #0
-	.loc 2 2915 0
-	ldr	r10, .L250+16
-.LVL235:
-.L241:
-	.loc 2 2909 0 discriminator 1
+	ldr	r10, .L253+16
+.L244:
 	cmp	r6, r7
-	bne	.L246
-	.loc 2 2938 0
+	bne	.L249
 	movs	r0, #0
 	add	sp, sp, #20
-	.cfi_remember_state
-	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL236:
-.L246:
-	.cfi_restore_state
-	.loc 2 2910 0
+.L249:
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -2797,110 +1620,70 @@ FlashEraseSLc2KBlocks:
 	str	r3, [sp]
 	add	r3, sp, #12
 	bl	LogAddr2PhyAddr
-.LVL237:
-	.loc 2 2911 0
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
-	bhi	.L242
-	.loc 2 2912 0
+	bhi	.L245
 	mov	r3, #-1
 	str	r3, [r5]
-.L243:
-	.loc 2 2909 0 discriminator 2
+.L246:
 	adds	r6, r6, #1
-.LVL238:
 	adds	r5, r5, #36
-	b	.L241
-.L242:
-	.loc 2 2915 0
+	b	.L244
+.L245:
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
-.LVL239:
-	.loc 2 2916 0
 	lsls	r3, r3, #4
-	ldr	r2, .L250
-	.loc 2 2917 0
+	ldr	r2, .L253
 	mov	r0, r4
-	.loc 2 2916 0
 	strb	r4, [r2, r3]
-	.loc 2 2917 0
 	bl	NandcWaitFlashReady
-.LVL240:
-	.loc 2 2918 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL241:
-	.loc 2 2919 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashEraseCmd
-.LVL242:
-	.loc 2 2920 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL243:
-	.loc 2 2921 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL244:
-	.loc 2 2927 0
-	ldr	r3, .L250+4
-	.loc 2 2923 0
+	ldr	r3, .L253+4
 	sbfx	r0, r0, #0, #1
-.LVL245:
-	.loc 2 2925 0
 	str	r0, [r5]
-	.loc 2 2927 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashEraseCmd
-.LVL246:
-	.loc 2 2928 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL247:
-	.loc 2 2929 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL248:
-	.loc 2 2931 0
 	lsls	r3, r0, #31
-	.loc 2 2932 0
 	itt	mi
 	movmi	r3, #-1
 	strmi	r3, [r5]
-	.loc 2 2933 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L245
-	.loc 2 2934 0
+	bne	.L248
 	ldr	r1, [sp, #8]
-	ldr	r0, .L250+8
-.LVL249:
+	ldr	r0, .L253+8
 	bl	printf
-.LVL250:
-.L245:
-	.loc 2 2935 0
+.L248:
 	mov	r0, r4
 	bl	NandcFlashDeCs
-.LVL251:
-	b	.L243
-.L251:
+	b	.L246
+.L254:
 	.align	2
-.L250:
+.L253:
 	.word	.LANCHOR23
 	.word	.LANCHOR3
 	.word	.LC1
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.cfi_endproc
-.LFE260:
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -2911,82 +1694,43 @@ FlashEraseSLc2KBlocks:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB263:
-	.loc 2 3223 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL252:
-	.loc 2 3233 0
-	ldr	r3, .L283
-	.loc 2 3223 0
+	ldr	r3, .L286
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r8, r0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 3223 0
 	mov	fp, r1
 	mov	r7, r2
-	.loc 2 3233 0
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	cbnz	r4, .L253
-	.loc 2 3244 0 discriminator 1
-	ldr	r10, .L283+8
-.LVL253:
-.L254:
-	.loc 2 3236 0 discriminator 1
+	cbnz	r4, .L256
+	ldr	r10, .L286+8
+.L257:
 	cmp	r4, r7
-	bcc	.L263
-	.loc 2 3273 0 discriminator 1
-	ldr	r5, .L283+4
+	bcc	.L266
+	ldr	r5, .L286+4
 	movs	r4, #0
-.LVL254:
-	.loc 2 3274 0 discriminator 1
-	ldr	r6, .L283+8
-.L264:
-.LVL255:
-	.loc 2 3271 0 discriminator 1
-	ldr	r3, .L283+12
+	ldr	r6, .L286+8
+.L267:
+	ldr	r3, .L286+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L266
-	.loc 2 3278 0
-	ldr	r3, .L283+16
+	bcc	.L269
+	ldr	r3, .L286+16
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L267
-.LVL256:
-.L268:
-	.loc 2 3283 0
+	bne	.L270
+.L271:
 	movs	r0, #0
-	b	.L252
-.LVL257:
-.L253:
-	.loc 2 3234 0
+	b	.L255
+.L256:
 	mov	r1, r2
-.LVL258:
 	bl	FlashEraseSLc2KBlocks
-.LVL259:
-.L252:
-	.loc 2 3284 0
+.L255:
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL260:
-.L263:
-	.cfi_restore_state
-	.loc 2 3237 0
+.L266:
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -2999,169 +1743,107 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-.LVL261:
-	.loc 2 3238 0
-	ldr	r3, .L283+12
-	.loc 2 3237 0
+	ldr	r3, .L286+12
 	mov	r6, r0
-.LVL262:
-	.loc 2 3238 0
 	ldr	r0, [sp, #20]
-.LVL263:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	bhi	.L256
-	.loc 2 3239 0
+	bhi	.L259
 	mov	r3, #-1
 	str	r3, [r8, r5]
-.L257:
-	.loc 2 3236 0 discriminator 2
+.L260:
 	adds	r4, r4, #1
-.LVL264:
-	b	.L254
-.L256:
-	.loc 2 3242 0
-	ldr	r3, .L283+20
+	b	.L257
+.L259:
+	ldr	r3, .L286+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 3243 0
 	cmp	r3, #0
-	.loc 2 3244 0
 	add	r3, r10, r0, lsl #4
-	.loc 2 3243 0
 	it	eq
 	moveq	r6, #0
-.LVL265:
-	.loc 2 3244 0
 	ldr	r3, [r3, #8]
-	cbz	r3, .L259
-	.loc 2 3245 0
+	cbz	r3, .L262
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.LVL266:
-.L259:
-	.loc 2 3246 0
+.L262:
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
 	add	r3, r10, r2
 	str	r0, [r3, #8]
-	.loc 2 3247 0
 	movs	r0, #0
 	str	r0, [r3, #12]
-	.loc 2 3248 0
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
-	.loc 2 3249 0
-	cbz	r6, .L260
-	.loc 2 3250 0
+	cbz	r6, .L263
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
-.L260:
-	.loc 2 3252 0
-	ldr	r3, .L283+24
+.L263:
+	ldr	r3, .L286+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
-.LVL267:
-	.loc 2 3254 0
 	mov	r0, r5
-	.loc 2 3253 0
 	strb	r5, [r10, r2]
-	.loc 2 3254 0
 	bl	NandcFlashCs
-.LVL268:
-	.loc 2 3255 0
 	cmp	fp, #1
-	.loc 2 3256 0
 	mov	r0, r5
-	.loc 2 3255 0
-	bne	.L261
-	.loc 2 3255 0 is_stmt 0 discriminator 1
-	ldr	r3, .L283+4
+	bne	.L264
+	ldr	r3, .L286+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L261
-	.loc 2 3256 0 is_stmt 1
+	cbz	r3, .L264
 	bl	flash_enter_slc_mode
-.LVL269:
-.L262:
-	.loc 2 3260 0
-	ldr	r3, .L283+28
+.L265:
+	ldr	r3, .L286+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
-	.loc 2 3263 0
 	add	r4, r4, r6
-.LVL270:
-	.loc 2 3260 0
 	ldr	r1, [sp, #16]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-.LVL271:
-	.loc 2 3261 0
 	mov	r2, r6
 	ldr	r1, [sp, #16]
 	mov	r0, r5
 	bl	FlashEraseCmd
-.LVL272:
-	.loc 2 3262 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
-.LVL273:
-	b	.L257
-.L261:
-	.loc 2 3258 0
+	b	.L260
+.L264:
 	bl	flash_exit_slc_mode
-.LVL274:
-	b	.L262
-.LVL275:
-.L266:
-	.loc 2 3272 0
+	b	.L265
+.L269:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
-.LVL276:
-	.loc 2 3273 0
 	cmp	fp, #1
-	bne	.L265
-	.loc 2 3273 0 is_stmt 0 discriminator 1
+	bne	.L268
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	cbz	r3, .L265
-	.loc 2 3274 0 is_stmt 1
+	cbz	r3, .L268
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.LVL277:
-.L265:
-	.loc 2 3271 0 discriminator 2
+.L268:
 	adds	r4, r4, #1
-.LVL278:
-	b	.L264
-.L267:
-	.loc 2 3278 0 discriminator 1
-	ldr	r3, .L283+32
+	b	.L267
+.L270:
+	ldr	r3, .L286+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #69
-	bne	.L268
+	bne	.L271
 	movs	r3, #0
-	.loc 2 3280 0 discriminator 1
 	movs	r2, #36
 	mov	r1, r3
-.LVL279:
-.L269:
-	.loc 2 3279 0 discriminator 1
+.L272:
 	cmp	r3, r7
-	beq	.L268
-	.loc 2 3280 0 discriminator 3
+	beq	.L271
 	mul	r0, r2, r3
-	.loc 2 3279 0 discriminator 3
 	adds	r3, r3, #1
-.LVL280:
-	.loc 2 3280 0 discriminator 3
 	str	r1, [r8, r0]
-	b	.L269
-.L284:
+	b	.L272
+.L287:
 	.align	2
-.L283:
+.L286:
 	.word	.LANCHOR1
 	.word	.LANCHOR8
 	.word	.LANCHOR23
@@ -3171,8 +1853,6 @@ FlashEraseBlocks:
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR22
-	.cfi_endproc
-.LFE263:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",%progbits
 	.align	1
@@ -3183,140 +1863,63 @@ FlashEraseBlocks:
 	.fpu softvfp
 	.type	FlashReadDpCmd, %function
 FlashReadDpCmd:
-.LFB213:
-	.loc 2 364 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL281:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 364 0
 	mov	r5, r2
-.LBB223:
-.LBB224:
-	.loc 3 123 0
-	ldr	r3, .L289
-.LBE224:
-.LBE223:
-	.loc 2 364 0
+	ldr	r3, .L292
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
 	lsrs	r1, r1, #8
-.LVL282:
 	uxtb	r8, r5
-.LBB226:
-.LBB225:
-	.loc 3 123 0
 	ldr	r10, [r3, r0, lsl #3]
-.LVL283:
-	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-.LVL284:
-.LBE225:
-.LBE226:
-	.loc 2 368 0
-	ldr	r3, .L289+4
+	ldr	r3, .L292+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
-.LVL285:
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
-	.loc 2 369 0
 	add	r4, r4, r10
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	.loc 2 368 0
 	cmp	r2, #1
 	lsr	r2, r6, #16
-	.loc 2 369 0
 	str	ip, [r4, #2056]
-	.loc 2 368 0
-	bne	.L286
-	.loc 2 370 0
+	bne	.L289
 	mov	r10, #0
 	str	r10, [r4, #2052]
-	.loc 2 371 0
 	str	r10, [r4, #2052]
-	.loc 2 372 0
 	str	lr, [r4, #2052]
-	.loc 2 373 0
 	str	r1, [r4, #2052]
-	.loc 2 374 0
 	str	r2, [r4, #2052]
-	.loc 2 375 0
 	str	r3, [r4, #2056]
-	.loc 2 376 0
 	bl	NandcWaitFlashReady
-.LVL286:
-	.loc 2 377 0
 	str	r10, [r4, #2056]
-	.loc 2 378 0
 	str	r10, [r4, #2052]
-	.loc 2 379 0
 	str	r10, [r4, #2052]
-.L288:
-	.loc 2 391 0
+.L291:
 	lsrs	r3, r5, #8
-	.loc 2 392 0
 	lsrs	r5, r5, #16
-.LVL287:
-	.loc 2 390 0
 	str	r8, [r4, #2052]
-	.loc 2 391 0
 	str	r3, [r4, #2052]
-	.loc 2 393 0
 	movs	r3, #48
-	.loc 2 392 0
 	str	r5, [r4, #2052]
-	.loc 2 395 0
 	mov	r1, r6
-	.loc 2 393 0
 	str	r3, [r4, #2056]
-	.loc 2 395 0
 	mov	r0, r7
-	.loc 2 396 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LVL288:
-	.loc 2 395 0
 	b	FlashSetRandomizer
-.LVL289:
-.L286:
-	.cfi_restore_state
-	.loc 2 386 0
+.L289:
 	str	lr, [r4, #2052]
-	.loc 2 387 0
 	str	r1, [r4, #2052]
-	.loc 2 388 0
 	str	r2, [r4, #2052]
-	.loc 2 389 0
 	str	r3, [r4, #2056]
-	b	.L288
-.L290:
+	b	.L291
+.L293:
 	.align	2
-.L289:
+.L292:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE213:
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
 	.align	1
@@ -3327,70 +1930,47 @@ FlashReadDpCmd:
 	.fpu softvfp
 	.type	FlashDeInit, %function
 FlashDeInit:
-.LFB253:
-	.loc 2 2656 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 2657 0
 	movs	r0, #0
-	.loc 2 2659 0
-	ldr	r4, .L299
-	.loc 2 2657 0
 	bl	NandcWaitFlashReady
-.LVL290:
-	.loc 2 2658 0
 	bl	FlashSetReadRetryDefault
-.LVL291:
-	.loc 2 2659 0
+	ldr	r3, .L303
+	ldr	r2, [r3]
+	ldr	r3, .L303+4
+	cmp	r2, r3
+	bne	.L295
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L295:
+	ldr	r4, .L303+8
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L292
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	ldr	r3, .L299+4
+	cbz	r3, .L296
+	ldr	r3, .L303+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L292
-	.loc 2 2660 0 is_stmt 1
+	bpl	.L296
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
-.LVL292:
-	.loc 2 2661 0
 	movs	r0, #1
 	bl	NandcSetMode
-.LVL293:
-	.loc 2 2662 0
 	movs	r3, #0
 	strb	r3, [r4]
-.L292:
-.LVL294:
-.LBB227:
-.LBB228:
-	.loc 3 343 0
-	ldr	r3, .L299+8
-	.loc 3 344 0
+.L296:
+	ldr	r3, .L303+16
 	movs	r0, #0
-	.loc 3 343 0
 	ldr	r3, [r3]
-.LVL295:
-	.loc 3 344 0
 	str	r0, [r3, #336]
-.LVL296:
-.LBE228:
-.LBE227:
-	.loc 2 2666 0
 	pop	{r4, pc}
-.L300:
+.L304:
 	.align	2
-.L299:
+.L303:
 	.word	.LANCHOR29
+	.word	1446522928
+	.word	.LANCHOR30
 	.word	.LANCHOR24
 	.word	.LANCHOR6
-	.cfi_endproc
-.LFE253:
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
@@ -3401,28 +1981,17 @@ FlashDeInit:
 	.fpu softvfp
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
-.LFB278:
-	.loc 3 339 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL297:
-.LBB229:
-	.loc 3 343 0
-	ldr	r3, .L302
+	ldr	r3, .L306
 	ldr	r3, [r3, r0, lsl #3]
-.LVL298:
-	.loc 3 344 0
 	str	r1, [r3, #336]
 	bx	lr
-.L303:
+.L307:
 	.align	2
-.L302:
+.L306:
 	.word	.LANCHOR6
-.LBE229:
-	.cfi_endproc
-.LFE278:
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
@@ -3433,46 +2002,27 @@ NandcRandmzSel:
 	.fpu softvfp
 	.type	NandcTimeCfg, %function
 NandcTimeCfg:
-.LFB279:
-	.loc 3 349 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL299:
-	ldr	r3, .L309
-	.loc 3 369 0
+	ldr	r3, .L313
 	cmp	r0, #35
-	.loc 3 371 0
 	ldr	r3, [r3]
-	.loc 3 369 0
-	bhi	.L305
-	.loc 3 371 0
+	bhi	.L309
 	movw	r2, #4193
-.L308:
-.LBB232:
-.LBB233:
-	.loc 3 379 0
+.L312:
 	str	r2, [r3, #4]
 	bx	lr
-.L305:
-.LVL300:
-	.loc 3 373 0
+.L309:
 	cmp	r0, #99
-	.loc 3 375 0
 	ite	hi
 	movwhi	r2, #8322
-	.loc 3 379 0
 	movwls	r2, #4225
-	b	.L308
-.L310:
+	b	.L312
+.L314:
 	.align	2
-.L309:
+.L313:
 	.word	.LANCHOR19
-.LBE233:
-.LBE232:
-	.cfi_endproc
-.LFE279:
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
 	.align	1
@@ -3483,25 +2033,16 @@ NandcTimeCfg:
 	.fpu softvfp
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
-.LFB210:
-	.loc 2 308 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL301:
-	.loc 2 318 0
-	ldr	r3, .L312
+	ldr	r3, .L316
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
-.LVL302:
 	b	NandcTimeCfg
-.LVL303:
-.L313:
+.L317:
 	.align	2
-.L312:
-	.word	.LANCHOR30
-	.cfi_endproc
-.LFE210:
+.L316:
+	.word	.LANCHOR31
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
 	.align	1
@@ -3512,83 +2053,44 @@ FlashTimingCfg:
 	.fpu softvfp
 	.type	NandcBchSel, %function
 NandcBchSel:
-.LFB280:
-	.loc 3 400 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL304:
-	.loc 3 405 0
-	ldr	r3, .L322
-	.loc 3 404 0
+	ldr	r3, .L326
 	movs	r1, #0
-.LVL305:
-	.loc 3 400 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 3 408 0
 	movs	r4, #16
-	.loc 3 411 0
 	cmp	r0, r4
-	.loc 3 405 0
 	ldr	r2, [r3]
 	mov	r3, #1
-.LVL306:
 	str	r3, [r2, #8]
-	.loc 3 406 0
-	ldr	r3, .L322+4
-.LVL307:
+	ldr	r3, .L326+4
 	str	r0, [r3]
-.LVL308:
-	.loc 3 407 0
 	mov	r3, r1
-.LVL309:
-	.loc 3 408 0
 	bfi	r3, r4, #8, #8
-.LVL310:
-	.loc 3 410 0
 	bfi	r3, r1, #18, #1
-	.loc 3 411 0
-	bne	.L315
-.L318:
-	.loc 3 412 0
+	bne	.L319
+.L322:
 	bfc	r3, #4, #1
-.L316:
-	.loc 3 422 0
+.L320:
 	orr	r3, r3, #1
-.LVL311:
-	.loc 3 424 0
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L315:
-	.loc 3 413 0
+.L319:
 	cmp	r0, #24
-	bne	.L317
-	.loc 3 414 0
+	bne	.L321
 	orr	r3, r3, #16
-.LVL312:
-	b	.L316
-.LVL313:
-.L317:
-	.loc 3 419 0
+	b	.L320
+.L321:
 	cmp	r0, #40
-	.loc 3 418 0
 	orr	r3, r3, #262144
-.LVL314:
 	orr	r3, r3, #16
-.LVL315:
-	.loc 3 419 0
-	bne	.L316
-	b	.L318
-.L323:
+	bne	.L320
+	b	.L322
+.L327:
 	.align	2
-.L322:
+.L326:
 	.word	.LANCHOR19
-	.word	.LANCHOR31
-	.cfi_endproc
-.LFE280:
+	.word	.LANCHOR32
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",%progbits
 	.align	1
@@ -3599,25 +2101,16 @@ NandcBchSel:
 	.fpu softvfp
 	.type	FlashBchSel, %function
 FlashBchSel:
-.LFB209:
-	.loc 2 302 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL316:
-	.loc 2 303 0
-	ldr	r3, .L325
+	ldr	r3, .L329
 	strb	r0, [r3]
-	.loc 2 304 0
 	b	NandcBchSel
-.LVL317:
-.L326:
+.L330:
 	.align	2
-.L325:
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE209:
+.L329:
+	.word	.LANCHOR33
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
 	.align	1
@@ -3628,14 +2121,10 @@ FlashBchSel:
 	.fpu softvfp
 	.type	NandCIrqEnable, %function
 NandCIrqEnable:
-.LFB546:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE546:
 	.size	NandCIrqEnable, .-NandCIrqEnable
 	.section	.text.NandCIrqDisable,"ax",%progbits
 	.align	1
@@ -3646,16 +2135,10 @@ NandCIrqEnable:
 	.fpu softvfp
 	.type	NandCIrqDisable, %function
 NandCIrqDisable:
-.LFB282:
-	.loc 3 444 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL318:
 	bx	lr
-	.cfi_endproc
-.LFE282:
 	.size	NandCIrqDisable, .-NandCIrqDisable
 	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
 	.align	1
@@ -3666,20 +2149,11 @@ NandCIrqDisable:
 	.fpu softvfp
 	.type	rk_nandc_get_irq_status, %function
 rk_nandc_get_irq_status:
-.LFB283:
-	.loc 3 452 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL319:
-	.loc 3 454 0
 	ldr	r0, [r0, #372]
-.LVL320:
-	.loc 3 455 0
 	bx	lr
-	.cfi_endproc
-.LFE283:
 	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
@@ -3690,14 +2164,10 @@ rk_nandc_get_irq_status:
 	.fpu softvfp
 	.type	rk_nandc_flash_ready, %function
 rk_nandc_flash_ready:
-.LFB542:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE542:
 	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
 	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
 	.align	1
@@ -3708,14 +2178,10 @@ rk_nandc_flash_ready:
 	.fpu softvfp
 	.type	NandcIqrWaitFlashReady, %function
 NandcIqrWaitFlashReady:
-.LFB540:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE540:
 	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
@@ -3726,16 +2192,10 @@ NandcIqrWaitFlashReady:
 	.fpu softvfp
 	.type	rk_nandc_flash_xfer_completed, %function
 rk_nandc_flash_xfer_completed:
-.LFB286:
-	.loc 3 482 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL321:
 	bx	lr
-	.cfi_endproc
-.LFE286:
 	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
 	.section	.text.NandcSendDumpDataStart,"ax",%progbits
 	.align	1
@@ -3746,51 +2206,28 @@ rk_nandc_flash_xfer_completed:
 	.fpu softvfp
 	.type	NandcSendDumpDataStart, %function
 NandcSendDumpDataStart:
-.LFB287:
-	.loc 3 490 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL322:
-	.loc 3 503 0
 	ldr	r2, [r0, #16]
-	.loc 3 490 0
 	sub	sp, sp, #8
-	.cfi_def_cfa_offset 8
-	.loc 3 501 0
-	ldr	r3, .L334
-.LVL323:
-	.loc 3 503 0
+	ldr	r3, .L338
 	str	r2, [sp, #4]
-	.loc 3 504 0
 	ldr	r2, [sp, #4]
-.LVL324:
 	bfc	r2, #2, #1
 	str	r2, [sp, #4]
-	.loc 3 505 0
 	ldr	r2, [sp, #4]
-.LVL325:
 	str	r2, [r0, #16]
-.LVL326:
-	.loc 3 507 0
 	str	r3, [r0, #8]
-	.loc 3 508 0
 	orr	r3, r3, #4
-.LVL327:
-	.loc 3 509 0
 	str	r3, [r0, #8]
-	.loc 3 510 0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
-.L335:
+.L339:
 	.align	2
-.L334:
+.L338:
 	.word	538969130
-	.cfi_endproc
-.LFE287:
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
 	.align	1
@@ -3801,30 +2238,19 @@ NandcSendDumpDataStart:
 	.fpu softvfp
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
-.LFB288:
-	.loc 3 513 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL328:
 	sub	sp, sp, #8
-	.cfi_def_cfa_offset 8
-.L337:
-	.loc 3 517 0 discriminator 1
+.L341:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
-	.loc 3 518 0 discriminator 1
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L337
-	.loc 3 519 0
+	bpl	.L341
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
-	.cfi_endproc
-.LFE288:
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
 	.section	.text.NandcXferStart,"ax",%progbits
 	.align	1
@@ -3835,304 +2261,172 @@ NandcSendDumpDataDone:
 	.fpu softvfp
 	.type	NandcXferStart, %function
 NandcXferStart:
-.LFB289:
-	.loc 3 521 0
-	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL329:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 3 521 0
-	mov	r6, r1
-	.loc 3 524 0
+	mov	r7, r1
 	ldr	r1, [sp, #60]
-.LVL330:
-	.loc 3 521 0
 	str	r2, [sp, #4]
-	ldr	r8, [sp, #56]
-	.loc 3 524 0
+	ldr	fp, [sp, #56]
 	cmp	r1, #0
-	bne	.L354
-	.loc 3 524 0 is_stmt 0 discriminator 2
-	adds	ip, r8, #0
+	bne	.L358
+	adds	r5, fp, #0
 	it	ne
-	movne	ip, #1
-.L341:
-.LVL331:
-	.loc 3 528 0 is_stmt 1 discriminator 6
-	ldr	r1, .L359
-	.loc 3 531 0 discriminator 6
+	movne	r5, #1
+.L345:
+	ldr	r1, .L363
 	movs	r4, #0
-.LVL332:
-	.loc 3 528 0 discriminator 6
-	ldr	r5, [r1, r0, lsl #3]
-.LVL333:
-	.loc 3 529 0 discriminator 6
+	ldr	r6, [r1, r0, lsl #3]
 	add	r1, r1, r0, lsl #3
-	.loc 3 534 0 discriminator 6
 	movs	r0, #16
-.LVL334:
-	.loc 3 532 0 discriminator 6
-	ldr	r7, [r5, #12]
-.LVL335:
-	.loc 3 529 0 discriminator 6
+	ldr	r8, [r6, #12]
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-.LVL336:
-	.loc 3 534 0 discriminator 6
-	bfi	r7, r0, #8, #8
-.LVL337:
-	.loc 3 536 0 discriminator 6
-	bfi	r7, r4, #3, #1
-	.loc 3 541 0 discriminator 6
-	bfi	r4, r6, #1, #1
-	.loc 3 538 0 discriminator 6
-	bfi	r7, r1, #5, #3
-	.loc 3 543 0 discriminator 6
+	bfi	r8, r0, #8, #8
+	bfi	r8, r4, #3, #1
+	bfi	r4, r7, #1, #1
+	bfi	r8, r1, #5, #3
 	orr	r4, r4, #8
-.LVL338:
-	.loc 3 544 0 discriminator 6
 	movs	r1, #1
-.LVL339:
 	bfi	r4, r1, #5, #2
-.LVL340:
-	.loc 3 547 0 discriminator 6
 	lsrs	r3, r3, r1
-.LVL341:
-	.loc 3 546 0 discriminator 6
 	orr	r4, r4, #536870912
-.LVL342:
 	orr	r4, r4, #1024
-.LVL343:
-	.loc 3 547 0 discriminator 6
 	bfi	r4, r3, #4, #1
-.LVL344:
-	.loc 3 549 0 discriminator 6
-	ldr	r3, .L359+4
+	ldr	r3, .L363+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L342
-.LVL345:
-.LBB234:
-	.loc 3 555 0
-	ldr	r3, [r5, #16]
+	bls	.L346
+	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
-	.loc 3 556 0
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
-	.loc 3 558 0
-	cmp	ip, #0
-	beq	.L343
-	.loc 3 560 0
-	cmp	r6, #0
-	bne	.L344
-.LVL346:
-.L352:
-	.loc 3 583 0
+	cmp	r5, #0
+	beq	.L347
+	ldr	r5, .L363+8
+	cmp	r7, #0
+	bne	.L348
+.L356:
 	ldr	r2, [sp, #4]
-	ldr	r10, .L359+12
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
-	.loc 3 584 0
-	cmp	r8, #0
-	beq	.L345
-	mov	r0, r8
-.L346:
-	.loc 3 585 0 discriminator 4
-	ldr	r3, [r10, #4]
-	.loc 3 608 0 discriminator 4
+	cmp	fp, #0
+	beq	.L349
+	mov	r0, fp
+.L350:
+	ldr	r3, [r5, #4]
 	add	r1, r0, #63
-	ubfx	fp, r4, #22, #5
+	ubfx	r10, r4, #22, #5
 	bic	r1, r1, #63
-	.loc 3 584 0 discriminator 4
-	str	r0, [r10, #8]
-	.loc 3 608 0 discriminator 4
-	add	r1, r1, fp, lsl #10
-	.loc 3 604 0 discriminator 4
-	str	r0, [r10, #16]
-	.loc 3 608 0 discriminator 4
+	str	r0, [r5, #8]
+	add	r1, r1, r10, lsl #10
+	str	r0, [r5, #16]
 	bic	r0, r0, #63
-	.loc 3 585 0 discriminator 4
-	str	r3, [r10, #12]
-	.loc 3 623 0 discriminator 4
-	clz	r6, r6
-	.loc 3 605 0 discriminator 4
-	str	r3, [r10, #20]
-	.loc 3 623 0 discriminator 4
-	lsrs	r6, r6, #5
-	.loc 3 608 0 discriminator 4
+	str	r3, [r5, #12]
+	clz	r7, r7
+	str	r3, [r5, #20]
+	lsrs	r7, r7, #5
 	bl	flush_dcache_range
-.LVL347:
-	.loc 3 609 0 discriminator 4
-	ldr	r0, [r10, #20]
-.LVL348:
-	.loc 3 610 0 discriminator 4
+	ldr	r0, [r5, #20]
 	add	r1, r0, #63
 	bic	r0, r0, #63
-.LVL349:
 	bic	r1, r1, #63
-	add	r1, r1, fp, lsl #7
+	add	r1, r1, r10, lsl #7
 	bl	flush_dcache_range
-.LVL350:
-	.loc 3 614 0 discriminator 4
 	movs	r3, #1
-	.loc 3 618 0 discriminator 4
 	movs	r2, #16
-	.loc 3 614 0 discriminator 4
-	str	r3, [r10, #24]
-	.loc 3 620 0 discriminator 4
-	tst	r8, #3
-	.loc 3 615 0 discriminator 4
-	ldr	r3, [r10, #16]
-	str	r3, [r5, #20]
-	.loc 3 616 0 discriminator 4
-	ldr	r3, [r10, #20]
 	str	r3, [r5, #24]
-	.loc 3 617 0 discriminator 4
+	tst	fp, #3
+	ldr	r3, [r5, #16]
+	str	r3, [r6, #20]
+	ldr	r3, [r5, #20]
+	str	r3, [r6, #24]
 	mov	r3, #0
 	str	r3, [sp, #20]
-	.loc 3 618 0 discriminator 4
 	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
-	.loc 3 621 0 discriminator 4
 	it	eq
 	moveq	r2, #2
-	.loc 3 618 0 discriminator 4
 	str	r3, [sp, #20]
-	.loc 3 619 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
 	str	r3, [sp, #20]
-	.loc 3 621 0 discriminator 4
 	ittt	eq
 	ldreq	r3, [sp, #20]
 	bfieq	r3, r2, #3, #3
 	streq	r3, [sp, #20]
-	.loc 3 622 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #4
 	str	r3, [sp, #20]
-	.loc 3 623 0 discriminator 4
 	ldr	r3, [sp, #20]
-	bfi	r3, r6, #1, #1
+	bfi	r3, r7, #1, #1
 	str	r3, [sp, #20]
-	.loc 3 624 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L343:
-	.loc 3 627 0
+.L347:
 	ldr	r3, [sp, #20]
-	str	r3, [r5, #16]
-.L342:
-.LBE234:
-	.loc 3 629 0
-	str	r7, [r5, #12]
-	.loc 3 630 0
-	str	r4, [r5, #8]
-	.loc 3 631 0
+	str	r3, [r6, #16]
+.L346:
+	str	r8, [r6, #12]
+	str	r4, [r6, #8]
 	orr	r4, r4, #4
-.LVL351:
-	.loc 3 632 0
-	str	r4, [r5, #8]
-	.loc 3 633 0
+	str	r4, [r6, #8]
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL352:
-.L354:
-	.cfi_restore_state
-	mov	ip, #1
-	b	.L341
-.LVL353:
-.L344:
-.LBB236:
-.LBB235:
-	.loc 3 562 0
-	ldr	r3, .L359+8
-	.loc 3 563 0
-	ldr	r0, [sp, #60]
-	ldr	r10, .L359+12
-	.loc 3 562 0
+.L358:
+	movs	r5, #1
+	b	.L345
+.L348:
+	ldr	r3, .L363+12
+	movs	r1, #0
+	ldr	lr, [r5, #4]
+	mov	r0, r1
 	ldr	r3, [r3]
 	cmp	r3, #25
 	ite	cc
 	movcc	r3, #64
 	movcs	r3, #128
 	str	r3, [sp, #8]
-.LVL354:
-	.loc 3 563 0
 	ldr	r3, [sp, #4]
-.LVL355:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
-	movs	r3, #0
-	mov	ip, r3
-.LVL356:
-.L348:
-	.loc 3 563 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #60]
+.L352:
 	ldr	r2, [sp, #12]
-	cmp	ip, r2
-	bcs	.L352
-	.loc 3 565 0 is_stmt 1
-	ldr	r1, [sp, #60]
-	cbz	r1, .L349
-	.loc 3 567 0
-	ldrh	fp, [r0]
-	.loc 3 568 0
-	adds	r0, r0, #4
-.LVL357:
-	.loc 3 567 0
-	ldrh	r1, [r0, #-2]
-.LVL358:
-	bic	lr, r3, #3
-	ldr	r2, [r10, #4]
-	orr	r1, fp, r1, lsl #16
-	str	r1, [r2, lr]
-.L350:
+	cmp	r0, r2
+	bcs	.L356
+	ldr	r2, [sp, #60]
+	bic	r10, r1, #3
+	cbz	r2, .L353
+	ldrh	ip, [r3]
+	adds	r3, r3, #4
+	ldrh	r2, [r3, #-2]
+	orr	ip, ip, r2, lsl #16
+	str	ip, [lr, r10]
+.L354:
 	ldr	r2, [sp, #8]
-	.loc 3 563 0 discriminator 2
-	add	ip, ip, #1
-.LVL359:
-	add	r3, r3, r2
-	b	.L348
-.L349:
-	.loc 3 571 0
-	ldr	r1, [r10, #4]
-	bic	lr, r3, #3
+	adds	r0, r0, #1
+	add	r1, r1, r2
+	b	.L352
+.L353:
 	mov	r2, #-1
-	str	r2, [r1, lr]
+	str	r2, [lr, r10]
+	b	.L354
+.L349:
+	ldr	r3, .L363+8
+	ldr	r0, [r3]
 	b	.L350
-.LVL360:
-.L345:
-.LBE235:
-	.loc 3 584 0 discriminator 1
-	ldr	r0, [r10]
-	b	.L346
-.L360:
+.L364:
 	.align	2
-.L359:
+.L363:
 	.word	.LANCHOR6
-	.word	.LANCHOR33
-	.word	.LANCHOR31
 	.word	.LANCHOR34
-.LBE236:
-	.cfi_endproc
-.LFE289:
+	.word	.LANCHOR35
+	.word	.LANCHOR32
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",%progbits
 	.align	1
@@ -4143,130 +2437,81 @@ NandcXferStart:
 	.fpu softvfp
 	.type	NandcXferComp, %function
 NandcXferComp:
-.LFB290:
-	.loc 3 636 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL361:
-	.loc 3 645 0
-	ldr	r3, .L389
-	.loc 3 636 0
+	ldr	r3, .L393
 	push	{r0, r1, r4, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 3 645 0
 	ldr	r1, [r3, r0, lsl #3]
-.LVL362:
-	.loc 3 648 0
-	ldr	r3, .L389+4
+	ldr	r3, .L393+4
 	ldr	r0, [r3]
-.LVL363:
 	cmp	r0, #3
-	bls	.L382
-	.loc 3 648 0 is_stmt 0 discriminator 1
+	bls	.L386
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L382
-.LVL364:
-.LBB237:
-	.loc 3 655 0 is_stmt 1
+	bpl	.L386
 	ldr	r3, [r1, #16]
 	tst	r3, #2
-	.loc 3 657 0
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	.loc 3 655 0
-	beq	.L369
-.L365:
-	.loc 3 658 0
+	beq	.L373
+.L369:
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L366
-	.loc 3 660 0
+	bge	.L370
 	cmp	r0, #5
-	bls	.L365
-.LBB238:
-	.loc 3 663 0
+	bls	.L369
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
-	.loc 3 664 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L365
-	.loc 3 664 0 is_stmt 0 discriminator 1
+	bpl	.L369
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L365
-.L366:
-.LBE238:
-	.loc 3 735 0 is_stmt 1
-	ldr	r3, .L389+8
+	bpl	.L369
+.L370:
+	ldr	r3, .L393+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.LVL365:
-.L361:
-.LBE237:
-	.loc 3 745 0
+.L365:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 8
 	@ sp needed
 	pop	{r4, pc}
-.LVL366:
-.L370:
-	.cfi_restore_state
-.LBB239:
-	.loc 3 705 0
+.L374:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L369:
-	.loc 3 703 0
+.L373:
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L370
-	.loc 3 715 0
-	ldr	r4, .L389+12
+	bpl	.L374
+	ldr	r4, .L393+12
 	ldr	r2, [r4]
-	cbz	r2, .L371
-	.loc 3 716 0
+	cbz	r2, .L375
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.LVL367:
-.L371:
-	.loc 3 732 0
+.L375:
 	ldr	r3, [r4]
 	cmp	r3, #0
-	beq	.L366
-	.loc 3 733 0
+	beq	.L370
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
-.LVL368:
-	b	.L366
-.LVL369:
-.L382:
-.LBE239:
-	.loc 3 742 0 discriminator 1
+	b	.L370
+.L386:
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	.loc 3 743 0 discriminator 1
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L382
-	b	.L361
-.L390:
+	bpl	.L386
+	b	.L365
+.L394:
 	.align	2
-.L389:
+.L393:
 	.word	.LANCHOR6
-	.word	.LANCHOR33
 	.word	.LANCHOR34
 	.word	.LANCHOR35
-	.cfi_endproc
-.LFE290:
+	.word	.LANCHOR36
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -4277,41 +2522,22 @@ NandcXferComp:
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB293:
-	.file 4 "drivers/rknand/rkftl/FtlPlat.c"
-	.loc 4 144 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL370:
-	.loc 4 148 0
 	movs	r1, #0
-	.loc 4 146 0
 	movs	r2, #1
-.LVL371:
-.L392:
-	.loc 4 148 0 discriminator 1
+.L396:
 	cmp	r2, r0
 	uxth	r3, r1
-.LVL372:
 	add	r1, r1, #1
-	bls	.L393
-.LVL373:
-	.loc 4 150 0
+	bls	.L397
 	subs	r0, r3, #1
-.LVL374:
-	.loc 4 152 0
 	uxth	r0, r0
 	bx	lr
-.LVL375:
-.L393:
-	.loc 4 149 0 discriminator 3
+.L397:
 	lsls	r2, r2, #1
-.LVL376:
-	b	.L392
-	.cfi_endproc
-.LFE293:
+	b	.L396
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -4322,16 +2548,10 @@ Ftl_log2:
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB294:
-	.loc 4 176 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL377:
 	bx	lr
-	.cfi_endproc
-.LFE294:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
@@ -4342,57 +2562,41 @@ FtlPrintInfo:
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB295:
-	.loc 4 182 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL378:
-	.loc 4 185 0
-	ldr	r3, .L396
+	ldr	r3, .L400
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-.LVL379:
-	.loc 4 186 0
-	ldr	r2, .L396+4
-	.loc 4 185 0
+	ldr	r2, .L400+4
 	str	r0, [r3]
-	.loc 4 186 0
-	ldr	r3, .L396+8
+	ldr	r3, .L400+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	.loc 4 187 0
-	ldr	r2, .L396+12
+	ldr	r2, .L400+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-.LVL380:
-	ldr	r2, .L396+16
+	ldr	r2, .L400+16
 	strh	r0, [r2]	@ movhi
-	.loc 4 191 0
 	movs	r0, #0
-	.loc 4 188 0
-	ldr	r2, .L396+20
+	ldr	r2, .L400+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L396+24
+	ldr	r2, .L400+24
 	str	r3, [r2]
-	.loc 4 191 0
 	bx	lr
-.L397:
+.L401:
 	.align	2
-.L396:
-	.word	.LANCHOR36
-	.word	.LANCHOR38
+.L400:
 	.word	.LANCHOR37
-	.word	.LANCHOR40
 	.word	.LANCHOR39
-	.word	.LANCHOR42
+	.word	.LANCHOR38
 	.word	.LANCHOR41
-	.cfi_endproc
-.LFE295:
+	.word	.LANCHOR40
+	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
@@ -4404,73 +2608,36 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB296:
-	.loc 4 200 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL381:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r10, r0
-	.loc 4 204 0
 	ldrh	r7, [r0, #8]
-	.loc 4 200 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 4 204 0
-	ldr	r3, .L425
-	.loc 4 207 0
-	ldr	r1, .L425+4
+	ldr	r3, .L429
+	ldr	r1, .L429+4
 	ldrh	r6, [r10, #14]
-	.loc 4 206 0
-	ldr	r2, .L425+8
-	.loc 4 204 0
+	ldr	r2, .L429+8
 	strh	r7, [r3]	@ movhi
-	.loc 4 205 0
 	ldrh	r3, [r0, #10]
-	.loc 4 206 0
 	ldrh	r0, [r0, #12]
-.LVL382:
-	.loc 4 207 0
 	strh	r6, [r1]	@ movhi
-.LVL383:
 	str	r1, [sp, #20]
-	.loc 4 210 0
-	ldr	r1, .L425+12
-	.loc 4 205 0
-	ldr	r4, .L425+16
-	.loc 4 206 0
+	ldr	r1, .L429+12
+	ldr	r4, .L429+16
 	strh	r0, [r2]	@ movhi
-	.loc 4 209 0
 	movs	r2, #0
-	.loc 4 205 0
 	strh	r3, [r4]	@ movhi
 	str	r4, [sp, #8]
-.LVL384:
-.L399:
-	.loc 4 210 0 discriminator 3
+.L403:
 	strb	r2, [r2, r1]
-	.loc 4 209 0 discriminator 3
 	adds	r2, r2, #1
-.LVL385:
 	cmp	r2, #32
-	bne	.L399
-	.loc 4 211 0
+	bne	.L403
 	ldrh	r1, [r10, #14]
 	ldrh	r2, [r10, #20]
-.LVL386:
 	cmp	r2, r1, lsr #8
-	bcs	.L400
-	.loc 4 215 0
+	bcs	.L404
 	uxtb	r8, r0
 	lsl	r2, r8, #1
 	uxtb	r2, r2
@@ -4478,288 +2645,181 @@ FtlConstantsInit:
 	subs	r2, r3, #1
 	muls	r2, r0, r2
 	str	r2, [sp, #12]
-	.loc 4 213 0
 	movs	r2, #0
-.L401:
-.LVL387:
-	.loc 4 213 0 is_stmt 0 discriminator 1
+.L405:
 	cmp	r2, r0
-	bcs	.L403
+	bcs	.L407
 	ldr	r4, [sp, #12]
-	.loc 4 215 0 is_stmt 1
 	sub	fp, r2, r0
 	uxtb	r1, r2
 	adds	r5, r2, r4
-	ldr	r4, .L425+12
+	ldr	r4, .L429+12
 	add	r4, r4, r5
-	.loc 4 213 0
 	movs	r5, #0
 	mov	lr, r4
-	.loc 4 215 0
-	ldr	r4, .L425+12
-	.loc 4 213 0
+	ldr	r4, .L429+12
 	mov	ip, r5
-	.loc 4 215 0
 	add	fp, fp, r4
-	b	.L404
-.LVL388:
-.L402:
-	.loc 4 216 0 discriminator 3
+	b	.L408
+.L406:
 	add	r4, r8, r1
-	.loc 4 215 0 discriminator 3
 	strb	r1, [fp, r5]
-	.loc 4 216 0 discriminator 3
 	str	r4, [sp, #16]
-	.loc 4 214 0 discriminator 3
 	add	ip, ip, #1
-.LVL389:
-	.loc 4 216 0 discriminator 3
 	ldrb	r4, [sp, #16]	@ zero_extendqisi2
 	strb	r4, [lr, r5]
 	ldr	r4, [sp, #4]
 	add	r1, r1, r4
 	uxtb	r1, r1
-.LVL390:
-.L404:
-	.loc 4 214 0 discriminator 1
+.L408:
 	cmp	ip, r3
 	add	r5, r5, r0
-	bcc	.L402
-	.loc 4 213 0 discriminator 2
+	bcc	.L406
 	adds	r2, r2, #1
-.LVL391:
-	b	.L401
-.LVL392:
-.L403:
-	.loc 4 219 0
+	b	.L405
+.L407:
 	ldr	r2, [sp, #8]
-.LVL393:
 	lsls	r3, r3, #1
-	.loc 4 220 0
 	lsrs	r6, r6, #1
-	.loc 4 219 0
 	strh	r3, [r2]	@ movhi
-	.loc 4 220 0
-	ldr	r3, .L425+4
+	ldr	r3, .L429+4
 	strh	r6, [r3]	@ movhi
-.L400:
-	.loc 4 225 0
-	ldr	r3, .L425+20
+.L404:
+	ldr	r3, .L429+20
 	movs	r2, #5
-	.loc 4 227 0
 	cmp	r7, #1
-	.loc 4 226 0
 	mov	r1, #0
-	.loc 4 225 0
 	strh	r2, [r3]	@ movhi
-	.loc 4 226 0
-	ldr	r2, .L425+24
-	.loc 4 228 0
+	ldr	r2, .L429+24
 	it	eq
 	strheq	r7, [r3]	@ movhi
-	.loc 4 229 0
-	ldr	r3, .L425+28
-	.loc 4 226 0
+	ldr	r3, .L429+28
 	strh	r1, [r2]	@ movhi
-	.loc 4 229 0
 	mov	r1, #4352
 	strh	r1, [r3]	@ movhi
-	.loc 4 230 0
-	ldr	r1, .L425+32
+	ldr	r1, .L429+32
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r1, [sp, #4]
-	cbz	r1, .L406
-	.loc 4 231 0
+	cbz	r1, .L410
 	mov	r1, #384
 	strh	r1, [r3]	@ movhi
-.L406:
-	.loc 4 233 0
+.L410:
 	ldr	r3, [sp, #8]
 	str	r2, [sp, #16]
-	.loc 4 236 0
-	ldr	fp, .L425+120
-	.loc 4 233 0
+	ldr	fp, .L429+120
 	ldrh	r5, [r3]
-	ldr	r3, .L425+36
-	.loc 4 239 0
-	ldr	r8, .L425+124
-	.loc 4 233 0
+	ldr	r3, .L429+36
+	ldr	r8, .L429+124
 	smulbb	r5, r5, r0
 	uxth	r5, r5
 	strh	r5, [r3]	@ movhi
-	.loc 4 234 0
 	ldr	r3, [sp, #20]
 	ldrh	r4, [r3]
-	ldr	r3, .L425+40
+	ldr	r3, .L429+40
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r3]	@ movhi
-	.loc 4 235 0
 	bl	Ftl_log2
-.LVL394:
-	ldr	r3, .L425+44
-	.loc 4 236 0
+	ldr	r3, .L429+44
 	ldrh	r6, [r10, #16]
-	.loc 4 237 0
 	ldrh	r1, [r10, #18]
-	.loc 4 235 0
 	strh	r0, [r3]	@ movhi
-	.loc 4 237 0
-	ldr	r3, .L425+48
-	.loc 4 238 0
+	ldr	r3, .L429+48
 	smulbb	r0, r5, r6
-	.loc 4 236 0
 	strh	r6, [fp]	@ movhi
-	.loc 4 237 0
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	.loc 4 238 0
-	ldr	r3, .L425+52
+	ldr	r3, .L429+52
 	strh	r0, [r3]	@ movhi
-	.loc 4 239 0
 	ldrh	r3, [r10, #20]
-	.loc 4 240 0
 	mov	r0, r3
-	.loc 4 239 0
 	strh	r3, [r8]	@ movhi
-	.loc 4 240 0
 	str	r3, [sp, #8]
 	bl	Ftl_log2
-.LVL395:
-	.loc 4 245 0
 	ldr	r3, [sp, #8]
-	.loc 4 240 0
 	mov	r7, r0
-	ldr	ip, .L425+128
-	.loc 4 257 0
+	ldr	ip, .L429+128
 	cmp	r4, #1024
-	.loc 4 245 0
-	ldr	lr, .L425+132
-	.loc 4 257 0
+	ldr	lr, .L429+132
 	ldr	r2, [sp, #16]
-	.loc 4 240 0
 	strh	r0, [ip]	@ movhi
-	.loc 4 245 0
 	lsl	r0, r3, #9
-	.loc 4 257 0
 	ldr	r1, [sp, #12]
-	.loc 4 245 0
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
-	.loc 4 246 0
 	lsr	r0, r0, #8
-	ldr	lr, .L425+136
-	.loc 4 267 0
+	ldr	lr, .L429+136
 	mul	r1, r3, r1
-	.loc 4 246 0
 	strh	r0, [lr]	@ movhi
-	.loc 4 247 0
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-.LVL396:
-	ldr	r0, .L425+56
+	ldr	r0, .L429+56
 	strh	lr, [r0]	@ movhi
-	.loc 4 249 0
 	mul	lr, r4, r5
-	ldr	r0, .L425+60
+	ldr	r0, .L429+60
 	str	lr, [r0]
-	.loc 4 258 0
 	itt	hi
 	uxtbhi	r0, r4
 	strhhi	r0, [r2]	@ movhi
-	.loc 4 265 0
 	ldrh	r2, [r2]
 	subs	r2, r4, r2
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L425+64
+	ldr	r2, .L429+64
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	.loc 4 267 0
-	ldr	r6, .L425+28
+	ldr	r6, .L429+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
-.LVL397:
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L425+68
-	.loc 4 268 0
+	ldr	r6, .L429+68
 	cmp	r0, #4
-	.loc 4 269 0
 	itt	ls
 	movls	r2, #4
 	strhls	r2, [r6]	@ movhi
-	.loc 4 271 0
 	ldr	r2, [sp, #4]
-	.loc 4 267 0
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	.loc 4 271 0
-	cbz	r2, .L410
-	.loc 4 272 0
+	cbz	r2, .L414
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L410:
-	.loc 4 273 0
+.L414:
 	ldrh	r3, [r3]
-	.loc 4 275 0
 	lsls	r4, r4, #6
-	.loc 4 273 0
-	ldr	r2, .L425+72
-	.loc 4 281 0
+	ldr	r2, .L429+72
 	mov	r1, r5
 	ldrh	r0, [r6]
-	.loc 4 273 0
 	asrs	r3, r3, r7
-	.loc 4 275 0
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	.loc 4 279 0
-	ldr	r7, .L425+76
-	.loc 4 273 0
+	ldr	r7, .L429+76
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	.loc 4 275 0
-	ldr	r3, .L425+80
+	ldr	r3, .L429+80
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
-	.loc 4 279 0
 	mul	r3, r4, r5
-	.loc 4 281 0
 	adds	r4, r4, #8
-	.loc 4 279 0
 	str	r3, [r7]
-	.loc 4 281 0
 	bl	__aeabi_uidiv
-.LVL398:
 	uxtah	r0, r4, r0
-	ldr	r4, .L425+84
-	.loc 4 282 0
+	ldr	r4, .L429+84
 	cmp	r5, #1
-	.loc 4 300 0
-	ldr	r5, .L425+88
-	.loc 4 283 0
+	ldr	r5, .L429+88
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
-	.loc 4 286 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
-.LVL399:
-	.loc 4 287 0
 	ldr	r2, [r4]
-	.loc 4 294 0
 	movs	r0, #24
-	.loc 4 287 0
-	ldr	r3, .L425+92
-	.loc 4 300 0
+	ldr	r3, .L429+92
 	ldrb	r5, [r5]	@ zero_extendqisi2
-	.loc 4 287 0
 	str	r2, [r3]
-	.loc 4 289 0
-	ldr	r3, .L425+96
+	ldr	r3, .L429+96
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -4767,117 +2827,89 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L425+100
+	ldr	r2, .L429+100
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 4 294 0
-	ldr	r2, .L425+104
+	ldr	r2, .L429+104
 	strh	r0, [r2]	@ movhi
-	.loc 4 296 0
 	movs	r0, #0
-	ldr	r2, .L425+108
+	ldr	r2, .L429+108
 	str	r0, [r2]
-	.loc 4 298 0
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
 	strh	r2, [r6]	@ movhi
-	.loc 4 299 0
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	.loc 4 300 0
-	cbz	r5, .L413
-	.loc 4 302 0
+	cbz	r5, .L417
 	adds	r2, r2, #5
-	.loc 4 301 0
 	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
-.L424:
-	.loc 4 304 0
+.L428:
 	str	r2, [r7]
-.L414:
-	.loc 4 307 0
-	ldr	r1, .L425+112
+.L418:
+	ldr	r1, .L429+112
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	.loc 4 308 0
-	ldr	r2, .L425+116
+	ldr	r2, .L429+116
 	ldrh	r0, [r2]
-.LVL400:
-	.loc 4 309 0
 	lsrs	r2, r0, #3
-	.loc 4 308 0
 	add	r2, r2, r0, lsl #1
-	.loc 4 339 0
 	movs	r0, #0
-.LVL401:
-	.loc 4 308 0
 	adds	r2, r2, #52
 	add	r3, r2, r3, lsl #2
-.LVL402:
-	.loc 4 310 0
 	ldrh	r2, [r8]
 	cmp	r3, r2, lsl #9
-	.loc 4 311 0
 	itt	cc
 	movcc	r3, #1
 	strhcc	r3, [r1]	@ movhi
-	.loc 4 339 0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL403:
-.L413:
-	.cfi_restore_state
-	.loc 4 303 0
+.L417:
 	cmp	r4, #7
-	bhi	.L414
-	.loc 4 304 0
+	bhi	.L418
 	movs	r2, #8
-	b	.L424
-.L426:
+	b	.L428
+.L430:
 	.align	2
-.L425:
-	.word	.LANCHOR43
-	.word	.LANCHOR40
-	.word	.LANCHOR45
-	.word	.LANCHOR46
+.L429:
 	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR46
 	.word	.LANCHOR47
+	.word	.LANCHOR45
 	.word	.LANCHOR48
 	.word	.LANCHOR49
-	.word	.LANCHOR1
-	.word	.LANCHOR37
 	.word	.LANCHOR50
+	.word	.LANCHOR1
+	.word	.LANCHOR38
 	.word	.LANCHOR51
-	.word	.LANCHOR53
+	.word	.LANCHOR52
 	.word	.LANCHOR54
-	.word	.LANCHOR59
-	.word	.LANCHOR42
+	.word	.LANCHOR55
 	.word	.LANCHOR60
+	.word	.LANCHOR43
 	.word	.LANCHOR61
 	.word	.LANCHOR62
-	.word	.LANCHOR64
 	.word	.LANCHOR63
-	.word	.LANCHOR36
-	.word	.LANCHOR8
 	.word	.LANCHOR65
-	.word	.LANCHOR41
+	.word	.LANCHOR64
+	.word	.LANCHOR37
+	.word	.LANCHOR8
 	.word	.LANCHOR66
+	.word	.LANCHOR42
 	.word	.LANCHOR67
 	.word	.LANCHOR68
 	.word	.LANCHOR69
-	.word	.LANCHOR39
-	.word	.LANCHOR52
-	.word	.LANCHOR55
+	.word	.LANCHOR70
+	.word	.LANCHOR40
+	.word	.LANCHOR53
 	.word	.LANCHOR56
 	.word	.LANCHOR57
 	.word	.LANCHOR58
-	.cfi_endproc
-.LFE296:
+	.word	.LANCHOR59
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -4888,61 +2920,35 @@ FtlConstantsInit:
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB299:
-	.loc 4 640 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL404:
-	.loc 4 643 0
-	ldr	r3, .L434
+	ldr	r3, .L438
 	ldrh	r3, [r3]
-	cbz	r3, .L433
-.LBB242:
-.LBB243:
-	.loc 4 645 0
-	ldr	r3, .L434+4
-	.loc 4 644 0
-	ldr	r2, .L434+8
-	.loc 4 645 0
+	cbz	r3, .L437
+	ldr	r3, .L438+4
+	ldr	r2, .L438+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L429:
-	.loc 4 644 0
-	cmp	r3, r2
-	bne	.L430
 .L433:
-.LBE243:
-.LBE242:
-	.loc 4 650 0
+	cmp	r3, r2
+	bne	.L434
+.L437:
 	movs	r0, #0
-.LVL405:
 	bx	lr
-.LVL406:
-.L430:
-.LBB245:
-.LBB244:
-	.loc 4 645 0
+.L434:
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L429
-	.loc 4 646 0
+	bne	.L433
 	movs	r0, #1
-.LVL407:
-.LBE244:
-.LBE245:
-	.loc 4 651 0
 	bx	lr
-.L435:
+.L439:
 	.align	2
-.L434:
-	.word	.LANCHOR70
+.L438:
 	.word	.LANCHOR71
-	.word	.LANCHOR61
-	.cfi_endproc
-.LFE299:
+	.word	.LANCHOR72
+	.word	.LANCHOR62
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -4953,20 +2959,16 @@ IsBlkInVendorPart:
 	.fpu softvfp
 	.type	FtlGetCap, %function
 FtlGetCap:
-.LFB534:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L437
+	ldr	r3, .L441
 	ldr	r0, [r3]
 	bx	lr
-.L438:
+.L442:
 	.align	2
-.L437:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE534:
+.L441:
+	.word	.LANCHOR69
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
@@ -4977,20 +2979,16 @@ FtlGetCap:
 	.fpu softvfp
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-.LFB532:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L440
+	ldr	r3, .L444
 	ldr	r0, [r3]
 	bx	lr
-.L441:
+.L445:
 	.align	2
-.L440:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE532:
+.L444:
+	.word	.LANCHOR69
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
@@ -5001,24 +2999,16 @@ FtlGetCapacity:
 	.fpu softvfp
 	.type	ftl_get_density, %function
 ftl_get_density:
-.LFB312:
-	.loc 4 1835 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL408:
-	.loc 4 1837 0
-	ldr	r3, .L443
+	ldr	r3, .L447
 	ldr	r0, [r3]
-.LVL409:
 	bx	lr
-.L444:
+.L448:
 	.align	2
-.L443:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE312:
+.L447:
+	.word	.LANCHOR69
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
@@ -5029,22 +3019,16 @@ ftl_get_density:
 	.fpu softvfp
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-.LFB313:
-	.loc 4 1840 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 1842 0
-	ldr	r3, .L446
+	ldr	r3, .L450
 	ldr	r0, [r3]
 	bx	lr
-.L447:
+.L451:
 	.align	2
-.L446:
-	.word	.LANCHOR72
-	.cfi_endproc
-.LFE313:
+.L450:
+	.word	.LANCHOR73
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -5055,27 +3039,20 @@ FtlGetLpn:
 	.fpu softvfp
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-.LFB314:
-	.loc 4 1845 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 1846 0
-	ldr	r2, .L449
-	ldr	r3, .L449+4
+	ldr	r2, .L453
+	ldr	r3, .L453+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
-	.loc 4 1847 0
 	muls	r0, r3, r0
 	bx	lr
-.L450:
+.L454:
 	.align	2
-.L449:
-	.word	.LANCHOR73
-	.word	.LANCHOR37
-	.cfi_endproc
-.LFE314:
+.L453:
+	.word	.LANCHOR74
+	.word	.LANCHOR38
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
@@ -5086,27 +3063,20 @@ FtlGetCurEraseBlock:
 	.fpu softvfp
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-.LFB315:
-	.loc 4 1850 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 1851 0
-	ldr	r2, .L452
-	ldr	r3, .L452+4
+	ldr	r2, .L456
+	ldr	r3, .L456+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
-	.loc 4 1852 0
 	muls	r0, r3, r0
 	bx	lr
-.L453:
+.L457:
 	.align	2
-.L452:
-	.word	.LANCHOR37
-	.word	.LANCHOR40
-	.cfi_endproc
-.LFE315:
+.L456:
+	.word	.LANCHOR38
+	.word	.LANCHOR41
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
 	.align	1
@@ -5117,44 +3087,21 @@ FtlGetAllBlockNum:
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB316:
-	.file 5 "drivers/rknand/rkftl/FtlBbm.c"
-	.loc 5 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL410:
-	.loc 5 12 0
-	ldr	r3, .L455
-	.loc 5 5 0
+	ldr	r3, .L459
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 5 5 0
 	mov	r5, r0
-	.loc 5 12 0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL411:
 	mov	r1, r4
-	.loc 5 15 0
-	ldr	r4, .L455+4
-	.loc 5 12 0
+	ldr	r4, .L459+4
 	uxth	r6, r0
-.LVL412:
 	mov	r0, r5
 	bl	__aeabi_uidivmod
-.LVL413:
-	.loc 5 15 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
-.LVL414:
-	.loc 5 17 0
 	ldr	r2, [r2, #28]
 	lsrs	r1, r3, #5
 	and	r7, r3, #31
@@ -5163,35 +3110,24 @@ FtlBbmMapBadBlock:
 	ldr	r7, [r2, r1, lsl #2]
 	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
-.LVL415:
-	.loc 5 18 0
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L455+8
+	ldr	r0, .L459+8
 	bl	printf
-.LVL416:
-	.loc 5 19 0
 	ldrh	r3, [r4, #6]
-	.loc 5 21 0
 	movs	r0, #0
-	.loc 5 19 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 5 21 0
 	add	sp, sp, #12
-	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL417:
-.L456:
+.L460:
 	.align	2
-.L455:
-	.word	.LANCHOR50
-	.word	.LANCHOR74
+.L459:
+	.word	.LANCHOR51
+	.word	.LANCHOR75
 	.word	.LC2
-	.cfi_endproc
-.LFE316:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
@@ -5202,64 +3138,33 @@ FtlBbmMapBadBlock:
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB317:
-	.loc 5 26 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL418:
-	.loc 5 34 0
-	ldr	r3, .L458
-	.loc 5 26 0
+	ldr	r3, .L462
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 5 26 0
 	mov	r6, r0
-	.loc 5 34 0
 	ldrh	r5, [r3]
-.LVL419:
-	.loc 5 35 0
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL420:
-	.loc 5 34 0
 	mov	r0, r6
-	.loc 5 35 0
 	uxth	r4, r1
-.LVL421:
-	.loc 5 34 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL422:
-	.loc 5 37 0
-	ldr	r3, .L458+4
-	.loc 5 34 0
+	ldr	r3, .L462+4
 	uxth	r0, r0
-	.loc 5 38 0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
-.LVL423:
-	.loc 5 37 0
 	add	r0, r3, r0, lsl #2
-	.loc 5 38 0
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
 	lsrs	r0, r0, r4
-	.loc 5 42 0
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.LVL424:
-.L459:
+.L463:
 	.align	2
-.L458:
-	.word	.LANCHOR50
-	.word	.LANCHOR74
-	.cfi_endproc
-.LFE317:
+.L462:
+	.word	.LANCHOR51
+	.word	.LANCHOR75
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -5270,14 +3175,10 @@ FtlBbmIsBadBlock:
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB536:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE536:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -5288,54 +3189,31 @@ FtlBbtInfoPrint:
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
-.LFB325:
-	.loc 1 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL425:
-	.loc 1 5 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 5 0
 	mov	r5, r1
-	.loc 1 8 0
-	ldr	r3, .L462
-	.loc 1 5 0
+	ldr	r3, .L466
 	mov	r7, r0
-	.loc 1 8 0
 	ldrh	r6, [r3]
-.LVL426:
 	mov	r1, r6
-.LVL427:
 	bl	__aeabi_uidiv
-.LVL428:
-	ldr	r3, .L462+4
+	ldr	r3, .L466+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
-.LVL429:
 	adds	r0, r5, r1
 	add	r0, r0, r4
-	.loc 1 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L463:
+.L467:
 	.align	2
-.L462:
-	.word	.LANCHOR45
-	.word	.LANCHOR50
-	.cfi_endproc
-.LFE325:
+.L466:
+	.word	.LANCHOR46
+	.word	.LANCHOR51
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
@@ -5346,46 +3224,27 @@ V2P_block:
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB326:
-	.loc 1 13 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL430:
-	.loc 1 16 0
-	ldr	r3, .L465
-	.loc 1 13 0
+	ldr	r3, .L469
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 13 0
 	mov	r6, r0
-	.loc 1 16 0
 	ldrh	r5, [r3]
-.LVL431:
-	ldr	r3, .L465+4
+	ldr	r3, .L469+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL432:
 	smulbb	r4, r0, r5
 	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-.LVL433:
 	add	r1, r1, r4
-	.loc 1 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L466:
+.L470:
 	.align	2
-.L465:
-	.word	.LANCHOR45
-	.word	.LANCHOR50
-	.cfi_endproc
-.LFE326:
+.L469:
+	.word	.LANCHOR46
+	.word	.LANCHOR51
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
@@ -5396,40 +3255,23 @@ P2V_plane:
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB327:
-	.loc 1 21 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL434:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 24 0
-	ldr	r3, .L468
+	ldr	r3, .L472
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-.LVL435:
-	.loc 1 25 0
-	ldr	r3, .L468+4
-	.loc 1 24 0
+	ldr	r3, .L472+4
 	uxth	r0, r1
-.LVL436:
-	.loc 1 25 0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL437:
-	.loc 1 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
-.L469:
+.L473:
 	.align	2
-.L468:
-	.word	.LANCHOR50
-	.word	.LANCHOR45
-	.cfi_endproc
-.LFE327:
+.L472:
+	.word	.LANCHOR51
+	.word	.LANCHOR46
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
@@ -5440,38 +3282,24 @@ P2V_block_in_plane:
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB328:
-	.loc 1 31 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL438:
-	.loc 1 34 0
 	cmp	r0, r1
-	bls	.L471
-	.loc 1 36 0
+	bls	.L475
 	subs	r0, r0, r1
-.LVL439:
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.LVL440:
-.L471:
-	.loc 1 40 0
+.L475:
 	subs	r0, r1, r0
-.LVL441:
 	cmp	r0, #-2147483648
 	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
-.LVL442:
-	.loc 1 44 0
 	bx	lr
-	.cfi_endproc
-.LFE328:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -5482,25 +3310,18 @@ ftl_cmp_data_ver:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB331:
-	.loc 1 88 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 1 89 0
-	ldr	r3, .L474
+	ldr	r3, .L478
 	ldrh	r0, [r3, #6]
-	.loc 1 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L475:
+.L479:
 	.align	2
-.L474:
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE331:
+.L478:
+	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -5511,26 +3332,19 @@ FtlFreeSysBlkQueueEmpty:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB332:
-	.loc 1 93 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 1 94 0
-	ldr	r3, .L477
+	ldr	r3, .L481
 	ldrh	r0, [r3, #6]
-	.loc 1 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L478:
+.L482:
 	.align	2
-.L477:
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE332:
+.L481:
+	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -5541,99 +3355,61 @@ FtlFreeSysBlkQueueFull:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB333:
-	.loc 1 98 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL443:
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 98 0
 	mov	r5, r0
-.LBB246:
-.LBB247:
-	.loc 1 94 0
-	ldr	r4, .L488
-.LBE247:
-.LBE246:
-	.loc 1 101 0
+	cmp	r3, r2
+	bhi	.L483
+	ldr	r4, .L492
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L479
-.LVL444:
-.LBB248:
-	.loc 1 103 0
-	cbz	r1, .L481
-	.loc 1 103 0 is_stmt 0 discriminator 1
-	ldr	r3, .L488+4
+	beq	.L483
+	cbz	r1, .L485
+	ldr	r3, .L492+4
 	ldr	r3, [r3]
-	cbnz	r3, .L481
-.LBB249:
-	.loc 1 104 0 is_stmt 1
+	cbnz	r3, .L485
 	bl	P2V_block_in_plane
-.LVL445:
-	.loc 1 105 0
-	ldr	r3, .L488+8
-	.loc 1 104 0
+	ldr	r3, .L492+8
 	mov	r6, r0
-.LVL446:
-	.loc 1 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 1 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
-	.loc 1 106 0
 	bl	FlashEraseBlocks
-.LVL447:
-	.loc 1 107 0
-	ldr	r3, .L488+12
+	ldr	r3, .L492+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 1 108 0
-	ldr	r2, .L488+16
+	ldr	r2, .L492+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL448:
-.L481:
-.LBE249:
-	.loc 1 110 0
+.L485:
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 1 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
-	.loc 1 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 1 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
-	.loc 1 112 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL449:
-.L479:
+.L483:
 	pop	{r4, r5, r6, pc}
-.L489:
+.L493:
 	.align	2
-.L488:
-	.word	.LANCHOR75
+.L492:
 	.word	.LANCHOR76
 	.word	.LANCHOR77
 	.word	.LANCHOR78
 	.word	.LANCHOR79
-.LBE248:
-	.cfi_endproc
-.LFE333:
+	.word	.LANCHOR80
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -5644,178 +3420,46 @@ FtlFreeSysBlkQueueIn:
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB334:
-	.loc 1 118 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 1 119 0
-	ldr	r3, .L497
-	.loc 1 123 0
-	movs	r0, #0
-	.loc 1 118 0
+	ldr	r3, .L503
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 123 0
-	mov	r6, r0
-	.loc 1 119 0
-	ldrh	r5, [r3, #28]
-	ldr	r3, .L497+4
-	and	r5, r5, #31
-.LVL450:
+	ldrh	r2, [r3, #6]
+	cbz	r2, .L494
+	ldr	r2, .L503+4
+	movs	r6, #0
 	ldrh	r1, [r3, #2]
+	mov	r5, r6
+	ldrh	r4, [r2, #28]
 	ldrh	r2, [r3, #4]
-.LVL451:
-.L491:
-	.loc 1 123 0 discriminator 1
-	uxth	r4, r0
-	adds	r0, r0, #1
-.LVL452:
-	cmp	r5, r4
-	bgt	.L492
-	cbz	r6, .L490
+	and	r4, r4, #31
+.L496:
+	uxth	r0, r6
+	adds	r6, r6, #1
+	cmp	r4, r0
+	bgt	.L497
+	cbz	r5, .L494
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.L490:
+.L494:
 	pop	{r4, r5, r6, pc}
-.LVL453:
-.L492:
-	.loc 1 124 0 discriminator 3
-	adds	r4, r1, #4
-.LVL454:
-	.loc 1 125 0 discriminator 3
+.L497:
+	adds	r0, r1, #4
 	adds	r1, r1, #1
-	.loc 1 124 0 discriminator 3
-	ldrh	r6, [r3, r4, lsl #1]
-.LVL455:
-	.loc 1 126 0 discriminator 3
-	adds	r4, r2, #4
-	.loc 1 125 0 discriminator 3
+	ldrh	r5, [r3, r0, lsl #1]
+	adds	r0, r2, #4
 	ubfx	r1, r1, #0, #10
-	.loc 1 126 0 discriminator 3
-	strh	r6, [r3, r4, lsl #1]	@ movhi
-.LVL456:
-	movs	r6, #1
-.LVL457:
-	.loc 1 127 0 discriminator 3
-	add	r2, r2, r6
+	strh	r5, [r3, r0, lsl #1]	@ movhi
+	movs	r5, #1
+	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
-	b	.L491
-.L498:
+	b	.L496
+.L504:
 	.align	2
-.L497:
-	.word	.LANCHOR80
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE334:
-	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
-	.align	1
-	.global	remove_from_free_sys_Queue
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	remove_from_free_sys_Queue, %function
-remove_from_free_sys_Queue:
-.LFB335:
-	.loc 1 161 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL458:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 161 0
-	mov	r1, r0
-.LBB250:
-.LBB251:
-	.loc 1 89 0
-	ldr	r5, .L506
-	ldrh	r3, [r5, #6]
-.LBE251:
-.LBE250:
-	.loc 1 166 0
-	cbz	r3, .L505
-	.loc 1 168 0
-	ldrh	r0, [r5, #2]
-.LVL459:
-	movs	r4, #0
-.L501:
-.LVL460:
-	.loc 1 167 0 discriminator 1
-	cmp	r4, r3
-	bcc	.L503
-.LVL461:
-.L505:
-	.loc 1 162 0
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.LVL462:
 .L503:
-	.loc 1 168 0
-	adds	r2, r4, r0
-	ubfx	r2, r2, #0, #10
-	adds	r2, r2, #4
-	ldrh	r2, [r5, r2, lsl #1]
-	cmp	r2, r1
-	bne	.L502
-.LVL463:
-	.loc 1 170 0
-	ldr	r0, .L506+4
-	bl	printf
-.LVL464:
-	.loc 1 171 0
-	ldrh	r3, [r5, #2]
-	.loc 1 169 0
-	movs	r0, #1
-	.loc 1 171 0
-	adds	r2, r3, #4
-	add	r4, r4, r3
-.LVL465:
-	.loc 1 172 0
-	adds	r3, r3, #1
-	.loc 1 171 0
-	ldrh	r2, [r5, r2, lsl #1]
-	.loc 1 172 0
-	ubfx	r3, r3, #0, #10
-	.loc 1 171 0
-	ubfx	r4, r4, #0, #10
-	.loc 1 172 0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 171 0
-	adds	r4, r4, #4
-	.loc 1 173 0
-	ldrh	r3, [r5, #6]
-	.loc 1 171 0
-	strh	r2, [r5, r4, lsl #1]	@ movhi
-	.loc 1 173 0
-	subs	r3, r3, #1
-	strh	r3, [r5, #6]	@ movhi
-	.loc 1 174 0
-	pop	{r3, r4, r5, pc}
-.LVL466:
-.L502:
-	.loc 1 167 0 discriminator 2
-	adds	r4, r4, #1
-.LVL467:
-	b	.L501
-.L507:
-	.align	2
-.L506:
-	.word	.LANCHOR75
-	.word	.LC3
-	.cfi_endproc
-.LFE335:
-	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
+	.word	.LANCHOR76
+	.word	.LANCHOR81
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueOut
@@ -5825,136 +3469,127 @@ remove_from_free_sys_Queue:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB336:
-	.loc 1 182 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL468:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-.LBB252:
-.LBB253:
-	.loc 1 89 0
-	ldr	r4, .L518
+	ldr	r4, .L515
 	mov	r6, r4
-.LVL469:
-.L509:
+.L506:
 	ldrh	r1, [r4, #6]
-.LBE253:
-.LBE252:
-	.loc 1 187 0
 	cmp	r1, #0
-	beq	.L510
-	.loc 1 188 0
+	beq	.L507
 	ldrh	r3, [r4, #2]
-	.loc 1 189 0
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
-	.loc 1 188 0
 	adds	r2, r3, #4
-	.loc 1 190 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 1 188 0
 	ldrh	r5, [r4, r2, lsl #1]
-.LVL470:
-	.loc 1 190 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 1 191 0
-	ldr	r3, .L518+4
+	ldr	r3, .L515+4
 	ldr	r10, [r3]
 	cmp	r10, #0
-	bne	.L511
-.LBB254:
-	.loc 1 193 0
-	ldr	r8, .L518+28
-	.loc 1 192 0
+	bne	.L508
+	ldr	r8, .L515+28
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL471:
 	mov	r7, r0
-.LVL472:
-	.loc 1 193 0
 	lsls	r3, r5, #10
 	ldr	r0, [r8]
 	str	r3, [r0, #4]
-	.loc 1 194 0
-	ldr	r3, .L518+8
+	ldr	r3, .L515+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L512
-	.loc 1 195 0
+	cbz	r3, .L509
 	movs	r2, #1
 	mov	r1, r10
 	bl	FlashEraseBlocks
-.LVL473:
-.L512:
-	.loc 1 196 0
+.L509:
 	movs	r2, #1
 	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL474:
-	.loc 1 197 0
-	ldr	r3, .L518+12
+	ldr	r3, .L515+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	.loc 1 198 0
-	ldr	r2, .L518+16
+	ldr	r2, .L515+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL475:
-.L511:
-.LBE254:
-	.loc 1 205 0
-	cbnz	r5, .L514
-	.loc 1 206 0
+.L508:
+	subs	r3, r5, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L511
 	ldrh	r2, [r6, #6]
 	mov	r1, r5
-	ldr	r0, .L518+20
+	ldr	r0, .L515+20
 	bl	printf
-.LVL476:
-	.loc 1 208 0
-	b	.L509
-.LVL477:
-.L510:
-	.loc 1 202 0
-	ldr	r0, .L518+24
+	b	.L506
+.L507:
+	ldr	r0, .L515+24
 	bl	printf
-.LVL478:
-.L513:
-	b	.L513
-.LVL479:
-.L514:
-	.loc 1 211 0
+.L510:
+	b	.L510
+.L511:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL480:
-.L519:
+.L516:
 	.align	2
-.L518:
-	.word	.LANCHOR75
+.L515:
 	.word	.LANCHOR76
+	.word	.LANCHOR77
 	.word	.LANCHOR8
-	.word	.LANCHOR78
 	.word	.LANCHOR79
-	.word	.LC5
+	.word	.LANCHOR80
 	.word	.LC4
-	.word	.LANCHOR77
-	.cfi_endproc
-.LFE336:
+	.word	.LC3
+	.word	.LANCHOR78
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.test_node_in_list,"ax",%progbits
+	.align	1
+	.global	test_node_in_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	test_node_in_list, %function
+test_node_in_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L522
+	push	{r4, r5, lr}
+	movw	r5, #65535
+	ldr	r2, [r0]
+	ldr	r4, [r3]
+	subs	r3, r2, r4
+	asrs	r0, r3, #1
+	ldr	r3, .L522+4
+	muls	r3, r0, r3
+	movs	r0, #6
+	uxth	r3, r3
+.L519:
+	cmp	r3, r1
+	beq	.L520
+	ldrh	r3, [r2]
+	cmp	r3, r5
+	beq	.L521
+	mla	r2, r0, r3, r4
+	b	.L519
+.L520:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L521:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L523:
+	.align	2
+.L522:
+	.word	.LANCHOR82
+	.word	-1431655765
+	.size	test_node_in_list, .-test_node_in_list
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
 	.global	insert_data_list
@@ -5964,243 +3599,126 @@ FtlFreeSysBlkQueueOut:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB339:
-	.loc 1 256 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL481:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 267 0
-	ldr	r5, .L537
-	ldrh	r3, [r5]
-	cmp	r3, r0
-	bls	.L522
-.LVL482:
-.LBB257:
-.LBB258:
-	.loc 1 272 0
-	ldr	r6, .L537+4
-	movs	r4, #6
-	muls	r4, r0, r4
-	.loc 1 275 0
-	ldr	r2, .L537+8
-	.loc 1 273 0
+	ldr	r3, .L540
+	ldrh	lr, [r3]
+	cmp	lr, r0
+	bls	.L526
+	ldr	r3, .L540+4
+	movs	r5, #6
+	ldr	r4, [r3]
+	mul	r3, r5, r0
+	str	r3, [sp, #4]
+	adds	r1, r4, r3
+	ldr	r2, [sp, #4]
 	movw	r3, #65535
-	.loc 1 272 0
-	ldr	ip, [r6]
-	mov	r8, r6
-	add	r1, ip, r4
-.LVL483:
-	.loc 1 273 0
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [ip, r4]	@ movhi
-	.loc 1 275 0
-	ldr	r3, [r2]
-	cbnz	r3, .L523
-.L536:
-	.loc 1 324 0
-	str	r1, [r2]
-	b	.L522
-.L523:
-	.loc 1 280 0
-	ldr	r2, .L537+12
-	lsls	r7, r0, #1
-	.loc 1 281 0
-	ldrh	r6, [r1, #4]
-	.loc 1 280 0
-	ldr	lr, [r2]
-	ldrh	r2, [lr, r0, lsl #1]
-.LVL484:
-	.loc 1 282 0
-	cmp	r6, #0
-	beq	.L533
-	.loc 1 281 0
-	muls	r2, r6, r2
-.LVL485:
-.L535:
-	.loc 1 286 0
-	ldr	fp, [r8]
-	.loc 1 289 0
-	ldrh	r5, [r5]
-	.loc 1 283 0
-	str	r2, [sp, #4]
-.LVL486:
-	.loc 1 286 0
-	sub	r2, r3, fp
-.LVL487:
-	asr	r8, r2, #1
-	ldr	r2, .L537+16
-	.loc 1 289 0
-	str	r5, [sp, #8]
-	.loc 1 301 0
-	ldr	r5, .L537+20
-	.loc 1 286 0
-	mul	r2, r2, r8
-	.loc 1 301 0
-	ldr	r8, [r5]
-	.loc 1 286 0
-	uxth	r2, r2
-.LVL488:
-	.loc 1 301 0
-	add	r5, r8, r7
-	str	r5, [sp, #12]
-	.loc 1 263 0
-	movs	r5, #0
-.LVL489:
-.L531:
-	.loc 1 288 0
-	adds	r5, r5, #1
-.LVL490:
-	.loc 1 289 0
-	ldr	r7, [sp, #8]
-	.loc 1 288 0
-	uxth	r5, r5
-.LVL491:
-	.loc 1 289 0
-	cmp	r5, r7
-	bhi	.L522
-	.loc 1 292 0
-	cmp	r0, r2
-	beq	.L522
-	.loc 1 295 0
-	ldrh	r7, [lr, r2, lsl #1]
-	lsl	r10, r2, #1
-	mov	r6, r7
-.LVL492:
-	.loc 1 296 0
-	ldrh	r7, [r3, #4]
-.LVL493:
-	.loc 1 297 0
-	cbz	r7, .L534
-	.loc 1 296 0
-	muls	r7, r6, r7
-.LVL494:
-.L526:
-	.loc 1 300 0
-	ldr	r6, [sp, #4]
-.LVL495:
-	cmp	r6, r7
+	strh	r3, [r4, r2]	@ movhi
+	ldr	r3, .L540+8
+	ldr	ip, [r3]
+	cmp	ip, #0
 	bne	.L527
-	.loc 1 301 0
-	ldr	r6, [sp, #12]
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r6]
-.LVL496:
-	cmp	r10, r7
-	bcc	.L529
-.L528:
-	.loc 1 319 0
-	strh	r2, [ip, r4]	@ movhi
-.LVL497:
-	.loc 1 320 0
-	ldrh	r2, [r3, #2]
-.LVL498:
-	strh	r2, [r1, #2]	@ movhi
-.LVL499:
-	.loc 1 322 0
-	ldr	r2, .L537+8
-	ldr	r4, [r2]
-	cmp	r3, r4
-	bne	.L532
-	.loc 1 323 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L536
-.LVL500:
-.L533:
-	.loc 1 283 0
-	mov	r2, #-1
-.LVL501:
-	b	.L535
-.LVL502:
-.L534:
-	.loc 1 298 0
-	mov	r7, #-1
-.LVL503:
-	b	.L526
-.LVL504:
-.L527:
-	.loc 1 305 0
-	bcc	.L528
-.LVL505:
-.L529:
-	.loc 1 308 0
-	ldrh	r7, [r3]
-	movw	r6, #65535
-	cmp	r7, r6
-	bne	.L530
-	.loc 1 309 0
-	strh	r2, [r1, #2]	@ movhi
-.LVL506:
-	.loc 1 310 0
-	strh	r0, [r3]	@ movhi
-	.loc 1 311 0
-	ldr	r3, .L537+24
-.LVL507:
+.L539:
 	str	r1, [r3]
-.LVL508:
-.L522:
-.LBE258:
-.LBE257:
-	.loc 1 330 0
+.L526:
 	movs	r0, #0
-.LVL509:
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL510:
+.L527:
+	ldr	r3, .L540+12
+	lsls	r2, r0, #1
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldrh	r6, [r3, r0, lsl #1]
+	ldrh	r3, [r1, #4]
+	cbz	r3, .L537
+	mul	fp, r3, r6
+.L528:
+	sub	r3, ip, r4
+	asrs	r6, r3, #1
+	ldr	r3, .L540+16
+	muls	r3, r6, r3
+	ldr	r6, .L540+20
+	ldr	r8, [r6]
+	movs	r6, #0
+	uxth	r3, r3
+	add	r2, r8, r2
+	str	r2, [sp, #12]
+	mov	r2, ip
+.L535:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	cmp	lr, r6
+	bcc	.L526
+	cmp	r3, r0
+	beq	.L526
+	ldr	r7, [sp, #8]
+	lsl	r10, r3, #1
+	ldrh	r7, [r7, r3, lsl #1]
+	mov	r5, r7
+	ldrh	r7, [r2, #4]
+	cbz	r7, .L538
+	muls	r7, r5, r7
 .L530:
-	.cfi_restore_state
-.LBB260:
-.LBB259:
-	.loc 1 316 0
-	movs	r3, #6
-.LVL511:
-	mov	r2, r7
-.LVL512:
-	mla	r3, r3, r7, fp
-.LVL513:
-	b	.L531
-.LVL514:
-.L532:
-	.loc 1 326 0
-	ldrh	r4, [r3, #2]
-	ldr	r2, .L537+4
-	ldr	r1, [r2]
-.LVL515:
-	movs	r2, #6
-.LVL516:
-	muls	r2, r4, r2
-.LVL517:
-	strh	r0, [r1, r2]	@ movhi
-	.loc 1 327 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L522
+	cmp	fp, r7
+	bne	.L531
+	ldr	r5, [sp, #12]
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r5]
+	cmp	r10, r7
+	bcc	.L533
+.L532:
+	ldr	r5, [sp, #4]
+	cmp	r2, ip
+	strh	r3, [r4, r5]	@ movhi
+	ldrh	r3, [r2, #2]
+	strh	r3, [r1, #2]	@ movhi
+	bne	.L536
+	strh	r0, [r2, #2]	@ movhi
+	ldr	r3, .L540+8
+	b	.L539
+.L537:
+	mov	fp, #-1
+	b	.L528
 .L538:
+	mov	r7, #-1
+	b	.L530
+.L531:
+	bcc	.L532
+.L533:
+	ldrh	r7, [r2]
+	movw	r5, #65535
+	cmp	r7, r5
+	bne	.L534
+	strh	r3, [r1, #2]	@ movhi
+	strh	r0, [r2]	@ movhi
+	ldr	r3, .L540+24
+	b	.L539
+.L534:
+	movs	r3, #6
+	mla	r2, r3, r7, r4
+	mov	r3, r7
+	b	.L535
+.L536:
+	ldrh	r1, [r2, #2]
+	movs	r3, #6
+	muls	r3, r1, r3
+	strh	r0, [r4, r3]	@ movhi
+	strh	r0, [r2, #2]	@ movhi
+	b	.L526
+.L541:
 	.align	2
-.L537:
-	.word	.LANCHOR39
-	.word	.LANCHOR81
+.L540:
+	.word	.LANCHOR40
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	-1431655765
-	.word	.LANCHOR78
 	.word	.LANCHOR84
-.LBE259:
-.LBE260:
-	.cfi_endproc
-.LFE339:
+	.word	-1431655765
+	.word	.LANCHOR79
+	.word	.LANCHOR85
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -6211,69 +3729,38 @@ insert_data_list:
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB338:
-	.loc 1 225 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL518:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 226 0
 	bl	insert_data_list
-.LVL519:
-	.loc 1 227 0
-	ldr	r2, .L541
+	ldr	r2, .L544
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 1 228 0
-	ldr	r2, .L541+4
+	ldr	r2, .L544+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L539
-.LVL520:
-.LBB263:
-.LBB264:
-	ldr	r1, .L541+8
-	movs	r2, #228
-	ldr	r0, .L541+12
+	bcs	.L542
+	ldr	r1, .L544+8
+	movs	r2, #210
+	ldr	r0, .L544+12
 	bl	printf
-.LVL521:
-	ldr	r1, .L541+16
-	ldr	r0, .L541+20
-.LBE264:
-.LBE263:
-	.loc 1 229 0
+	ldr	r1, .L544+16
+	ldr	r0, .L544+20
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB266:
-.LBB265:
-	.loc 1 228 0
 	b	printf
-.LVL522:
-.L539:
-	.cfi_restore_state
-	pop	{r3, pc}
 .L542:
+	pop	{r3, pc}
+.L545:
 	.align	2
-.L541:
-	.word	.LANCHOR85
-	.word	.LANCHOR39
+.L544:
 	.word	.LANCHOR86
+	.word	.LANCHOR40
+	.word	.LANCHOR87
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-.LBE265:
-.LBE266:
-	.cfi_endproc
-.LFE338:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
@@ -6284,146 +3771,75 @@ INSERT_DATA_LIST:
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB340:
-	.loc 1 333 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL523:
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 339 0
 	movw	r1, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L544
-	.loc 1 342 0
-	ldr	r4, .L550
+	beq	.L547
+	ldr	r3, .L553
 	mov	r10, #6
-	mul	r6, r10, r0
-	.loc 1 345 0
-	ldr	r2, .L550+4
-	.loc 1 342 0
-	ldr	r7, [r4]
-	str	r4, [sp]
-	mov	ip, r2
-	adds	r5, r7, r6
-.LVL524:
-	.loc 1 343 0
+	mul	r7, r10, r0
+	ldr	r4, [r3]
+	ldr	r3, .L553+4
+	adds	r5, r4, r7
+	ldr	r6, [r3]
+	mov	lr, r3
 	strh	r1, [r5, #2]	@ movhi
-	strh	r1, [r7, r6]	@ movhi
-	.loc 1 345 0
-	ldr	r3, [r2]
-	cbnz	r3, .L545
-	.loc 1 346 0
-	str	r5, [r2]
-.LVL525:
-.L544:
-	.loc 1 379 0
+	strh	r1, [r4, r7]	@ movhi
+	cbnz	r6, .L548
+	str	r5, [r3]
+.L547:
 	movs	r0, #0
-.LVL526:
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL527:
-.L545:
-	.cfi_restore_state
-	.loc 1 350 0
-	ldr	r2, .L550+8
-	ldr	r8, [r2]
-	ldrh	r2, [r8, r0, lsl #1]
-	str	r2, [sp, #4]
-.LVL528:
-	.loc 1 352 0
-	ldr	r2, [sp]
-	ldr	lr, [r2]
-	ldr	r2, .L550+12
-	sub	fp, r3, lr
-	asr	fp, fp, #1
-	mul	r2, r2, fp
-	.loc 1 359 0
+.L548:
+	ldr	r3, .L553+8
+	subs	r2, r6, r4
 	mov	fp, r1
-	.loc 1 352 0
+	ldr	ip, [r3]
+	asrs	r3, r2, #1
+	ldr	r2, .L553+12
+	ldrh	r8, [ip, r0, lsl #1]
+	muls	r2, r3, r2
+	mov	r3, r6
 	uxth	r2, r2
-.LVL529:
-.L548:
-	.loc 1 356 0
-	ldrh	r1, [r8, r2, lsl #1]
-	mov	r4, r1
-	ldr	r1, [sp, #4]
-	cmp	r4, r1
-	bcs	.L546
-	.loc 1 359 0
+.L551:
+	ldrh	r1, [ip, r2, lsl #1]
+	cmp	r1, r8
+	bcs	.L549
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L547
-	.loc 1 360 0
+	bne	.L550
 	strh	r2, [r5, #2]	@ movhi
-.LVL530:
-	.loc 1 361 0
 	strh	r0, [r3]	@ movhi
-	.loc 1 362 0
-	b	.L544
-.LVL531:
-.L547:
-	.loc 1 365 0
-	mla	r3, r10, r1, lr
-.LVL532:
-	.loc 1 355 0
+	b	.L547
+.L550:
+	mla	r3, r10, r1, r4
 	mov	r2, r1
-.LVL533:
-	b	.L548
-.LVL534:
-.L546:
-	.loc 1 368 0
+	b	.L551
+.L549:
 	ldrh	r1, [r3, #2]
+	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
-.LVL535:
-	.loc 1 369 0
-	strh	r2, [r7, r6]	@ movhi
-	.loc 1 371 0
-	ldr	r2, [ip]
-.LVL536:
-	cmp	r3, r2
-	bne	.L549
-	.loc 1 372 0
-	strh	r0, [r3, #2]	@ movhi
-.LVL537:
-	.loc 1 373 0
-	str	r5, [ip]
-	b	.L544
-.LVL538:
-.L549:
-	.loc 1 375 0
-	ldrh	r5, [r3, #2]
-.LVL539:
-	ldr	r2, [sp]
-	ldr	r1, [r2]
-	movs	r2, #6
-	muls	r2, r5, r2
-	strh	r0, [r1, r2]	@ movhi
-.LVL540:
-	.loc 1 376 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L544
-.L551:
+	it	ne
+	ldrhne	r1, [r3, #2]
+	strh	r2, [r4, r7]	@ movhi
+	iteet	ne
+	movne	r2, #6
+	strheq	r0, [r3, #2]	@ movhi
+	streq	r5, [lr]
+	mulne	r2, r2, r1
+	itt	ne
+	strhne	r0, [r4, r2]	@ movhi
+	strhne	r0, [r3, #2]	@ movhi
+	b	.L547
+.L554:
 	.align	2
-.L550:
-	.word	.LANCHOR81
-	.word	.LANCHOR87
-	.word	.LANCHOR78
+.L553:
+	.word	.LANCHOR82
+	.word	.LANCHOR88
+	.word	.LANCHOR79
 	.word	-1431655765
-	.cfi_endproc
-.LFE340:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
@@ -6434,69 +3850,38 @@ insert_free_list:
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB337:
-	.loc 1 214 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL541:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 215 0
 	bl	insert_free_list
-.LVL542:
-	.loc 1 216 0
-	ldr	r2, .L554
+	ldr	r2, .L557
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 1 221 0
-	ldr	r2, .L554+4
+	ldr	r2, .L557+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L552
-.LVL543:
-.LBB269:
-.LBB270:
-	ldr	r1, .L554+8
-	movs	r2, #221
-	ldr	r0, .L554+12
+	bcs	.L555
+	ldr	r1, .L557+8
+	movs	r2, #203
+	ldr	r0, .L557+12
 	bl	printf
-.LVL544:
-	ldr	r1, .L554+16
-	ldr	r0, .L554+20
-.LBE270:
-.LBE269:
-	.loc 1 222 0
+	ldr	r1, .L557+16
+	ldr	r0, .L557+20
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB272:
-.LBB271:
-	.loc 1 221 0
 	b	printf
-.LVL545:
-.L552:
-	.cfi_restore_state
-	pop	{r3, pc}
 .L555:
+	pop	{r3, pc}
+.L558:
 	.align	2
-.L554:
-	.word	.LANCHOR88
-	.word	.LANCHOR39
+.L557:
 	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR90
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-.LBE271:
-.LBE272:
-	.cfi_endproc
-.LFE337:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
@@ -6507,130 +3892,79 @@ INSERT_FREE_LIST:
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB341:
-	.loc 1 382 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL546:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 385 0
 	movs	r6, #6
-	ldr	r4, .L562
+	ldr	r5, .L565
 	muls	r6, r1, r6
-	.loc 1 386 0
 	movw	r3, #65535
-	.loc 1 382 0
 	mov	r8, r0
-	.loc 1 385 0
-	ldr	r7, [r4]
-	adds	r5, r7, r6
-.LVL547:
-	.loc 1 386 0
-	ldrh	r2, [r5, #2]
+	ldr	r7, [r5]
+	adds	r4, r7, r6
+	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L557
-	.loc 1 386 0 is_stmt 0 discriminator 1
+	bne	.L560
 	ldr	r3, [r0]
-	cmp	r5, r3
-	beq	.L557
-	.loc 1 386 0 discriminator 2
-	ldr	r1, .L562+4
-.LVL548:
+	cmp	r4, r3
+	beq	.L560
+	ldr	r1, .L565+4
 	mov	r2, #386
-	ldr	r0, .L562+8
-.LVL549:
+	ldr	r0, .L565+8
 	bl	printf
-.LVL550:
-	ldr	r1, .L562+12
-	ldr	r0, .L562+16
+	ldr	r1, .L565+12
+	ldr	r0, .L565+16
 	bl	printf
-.LVL551:
-.L557:
-	.loc 1 388 0 is_stmt 1
+.L560:
 	ldr	r3, [r8]
 	movw	r1, #65535
-	cmp	r5, r3
+	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L558
-	.loc 1 389 0
+	bne	.L561
 	cmp	r3, r1
-	.loc 1 392 0
 	ittee	ne
-	ldrne	r0, [r4]
+	ldrne	r0, [r5]
 	movne	r2, #6
-	.loc 1 390 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 1 392 0
 	ittt	ne
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
-	.loc 1 393 0
 	strhne	r1, [r3, #2]	@ movhi
-.L560:
-	.loc 1 406 0
+.L563:
 	movw	r3, #65535
-	.loc 1 408 0
 	movs	r0, #0
-	.loc 1 406 0
 	strh	r3, [r7, r6]	@ movhi
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 408 0
+	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL552:
-.L558:
-	.loc 1 395 0
+.L561:
 	cmp	r3, r1
-	ldrh	r1, [r5, #2]
-	bne	.L561
-	.loc 1 396 0
+	ldrh	r1, [r4, #2]
+	bne	.L564
 	cmp	r1, r3
-	beq	.L560
-.LVL553:
-	.loc 1 398 0
+	beq	.L563
 	movs	r2, #6
-	ldr	r0, [r4]
+	ldr	r0, [r5]
 	muls	r1, r2, r1
-.LVL554:
 	strh	r3, [r0, r1]	@ movhi
-.LVL555:
-	b	.L560
-.L561:
-.LVL556:
-	.loc 1 402 0
-	ldr	r0, [r4]
+	b	.L563
+.L564:
+	ldr	r0, [r5]
 	movs	r2, #6
-	mla	r3, r2, r3, r0
-.LVL557:
-	strh	r1, [r3, #2]	@ movhi
-.LVL558:
-	.loc 1 403 0
-	ldrh	r0, [r5, #2]
-	.loc 1 404 0
-	ldrh	r1, [r7, r6]
-	ldr	r3, [r4]
-	muls	r2, r0, r2
-	strh	r1, [r3, r2]	@ movhi
-.LVL559:
-	b	.L560
-.L563:
+	mla	r5, r2, r3, r0
+	strh	r1, [r5, #2]	@ movhi
+	ldrh	r1, [r4, #2]
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L563
+.L566:
 	.align	2
-.L562:
-	.word	.LANCHOR81
-	.word	.LANCHOR90
+.L565:
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE341:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
@@ -6641,79 +3975,42 @@ List_remove_node:
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB342:
-	.loc 1 411 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL560:
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 416 0
 	ldr	r3, [r0]
-	cbz	r3, .L570
-	.loc 1 431 0
-	ldr	r2, .L571
-.LVL561:
-	.loc 1 430 0
+	push	{r4, r5, r6, lr}
+	cbz	r3, .L573
+	ldr	r2, .L574
 	movw	r5, #65535
-	.loc 1 431 0
 	movs	r6, #6
 	ldr	r2, [r2]
-.LVL562:
-.L566:
-	.loc 1 430 0
-	cbnz	r1, .L567
 .L569:
-	.loc 1 446 0
-	ldr	r4, .L571+4
+	cbnz	r1, .L570
+.L572:
+	ldr	r4, .L574+4
 	subs	r3, r3, r2
-.LVL563:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-.LVL564:
-	.loc 1 447 0
 	uxth	r1, r4
-.LVL565:
 	bl	List_remove_node
-.LVL566:
 	uxth	r0, r4
-	.loc 1 453 0
 	pop	{r4, r5, r6, pc}
-.LVL567:
-.L567:
-	.loc 1 430 0 discriminator 1
+.L570:
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L569
-	.loc 1 432 0
+	beq	.L572
 	subs	r1, r1, #1
-.LVL568:
-	.loc 1 431 0
 	mla	r3, r6, r4, r2
-.LVL569:
-	.loc 1 432 0
 	uxth	r1, r1
-.LVL570:
-	b	.L566
-.LVL571:
-.L570:
-	.loc 1 417 0
+	b	.L569
+.L573:
 	movw	r0, #65535
-.LVL572:
-	.loc 1 454 0
 	pop	{r4, r5, r6, pc}
-.L572:
+.L575:
 	.align	2
-.L571:
-	.word	.LANCHOR81
+.L574:
+	.word	.LANCHOR82
 	.word	-1431655765
-	.cfi_endproc
-.LFE342:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
@@ -6724,73 +4021,42 @@ List_pop_index_node:
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB343:
-	.loc 1 462 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL573:
-	.loc 1 466 0
-	ldr	r3, .L579
-	.loc 1 462 0
+	ldr	r3, .L582
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 1 466 0
 	ldr	r3, [r3]
-	cbz	r3, .L578
-	.loc 1 471 0
-	ldr	r2, .L579+4
+	cbz	r3, .L581
+	ldr	r2, .L582+4
 	movs	r4, #6
 	ldr	r1, [r2]
-	.loc 1 470 0
 	movw	r2, #65535
-.L575:
-.LVL574:
-	cbz	r0, .L576
-	.loc 1 470 0 is_stmt 0 discriminator 1
+.L578:
+	cbz	r0, .L579
 	ldrh	r3, [r3]
-.LVL575:
 	cmp	r3, r2
-	bne	.L577
-.L578:
-	.loc 1 467 0 is_stmt 1
+	bne	.L580
+.L581:
 	movw	r0, #65535
-.LVL576:
 	pop	{r4, pc}
-.LVL577:
-.L577:
-	.loc 1 472 0
+.L580:
 	subs	r0, r0, #1
-.LVL578:
-	.loc 1 471 0
 	mla	r3, r4, r3, r1
-.LVL579:
-	.loc 1 472 0
 	uxth	r0, r0
-.LVL580:
-	b	.L575
-.L576:
-.LVL581:
-	.loc 1 476 0
-	ldr	r0, .L579+8
-.LVL582:
+	b	.L578
+.L579:
+	ldr	r0, .L582+8
 	subs	r3, r3, r1
-.LVL583:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 1 479 0
 	pop	{r4, pc}
-.L580:
+.L583:
 	.align	2
-.L579:
+.L582:
+	.word	.LANCHOR83
 	.word	.LANCHOR82
-	.word	.LANCHOR81
 	.word	-1431655765
-	.cfi_endproc
-.LFE343:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
@@ -6801,200 +4067,121 @@ List_get_gc_head_node:
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB344:
-	.loc 1 482 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL584:
-	.loc 1 491 0
-	ldr	r3, .L592
-	.loc 1 482 0
+	ldr	r3, .L595
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 482 0
 	mov	r4, r0
-	.loc 1 491 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L583
-	.loc 1 491 0 is_stmt 0 discriminator 1
-	ldr	r3, .L592+4
+	beq	.L586
+	ldr	r3, .L595+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L583
-	.loc 1 491 0 discriminator 2
-	ldr	r3, .L592+8
+	beq	.L586
+	ldr	r3, .L595+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L583
-.LVL585:
-.LBB275:
-.LBB276:
-	.loc 1 494 0 is_stmt 1
-	ldr	r7, .L592+12
+	beq	.L586
+	ldr	r7, .L595+12
 	movs	r6, #6
-	.loc 1 496 0
-	ldr	r3, .L592+16
-	.loc 1 494 0
+	ldr	r3, .L595+16
 	muls	r6, r0, r6
 	ldr	fp, [r7]
-	.loc 1 496 0
 	ldr	r3, [r3]
-	.loc 1 494 0
 	add	r10, fp, r6
-.LVL586:
-	.loc 1 496 0
 	cmp	r10, r3
-	beq	.L583
-	.loc 1 499 0
-	ldr	r3, .L592+20
-	.loc 1 500 0
+	beq	.L586
+	ldr	r3, .L595+20
 	ldrh	r5, [r10, #4]
-	.loc 1 499 0
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
-.LVL587:
-	.loc 1 501 0
 	cmp	r5, #0
-	beq	.L590
-	.loc 1 500 0
+	beq	.L593
 	muls	r5, r2, r5
-.LVL588:
-.L585:
-	.loc 1 504 0
+.L588:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
-.LVL589:
 	cmp	r3, r2
-	bne	.L586
+	bne	.L589
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L586
-	ldr	r1, .L592+24
+	bne	.L589
+	ldr	r1, .L595+24
 	mov	r2, #504
-	ldr	r0, .L592+28
-.LVL590:
+	ldr	r0, .L595+28
 	bl	printf
-.LVL591:
-	ldr	r1, .L592+32
-	ldr	r0, .L592+36
+	ldr	r1, .L595+32
+	ldr	r0, .L595+36
 	bl	printf
-.LVL592:
-.L586:
-	.loc 1 505 0
+.L589:
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L587
+	bne	.L590
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L583
-.L587:
-	.loc 1 507 0
+	beq	.L586
+.L590:
 	movs	r2, #6
 	muls	r2, r3, r2
-.LVL593:
-	.loc 1 508 0
-	ldr	r3, .L592+40
+	ldr	r3, .L595+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 1 509 0
 	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
-.LVL594:
-	.loc 1 510 0
 	ldr	r1, [r7]
 	add	r2, r2, r1
-.LVL595:
 	ldrh	r3, [r2, #4]
-.LVL596:
-	.loc 1 511 0
-	cbz	r3, .L591
-	.loc 1 510 0
+	cbz	r3, .L594
 	muls	r3, r0, r3
-.LVL597:
-.L588:
-	.loc 1 514 0
+.L591:
 	cmp	r5, r3
-	bcs	.L583
-	.loc 1 515 0
-	ldr	r5, .L592+44
-.LVL598:
+	bcs	.L586
+	ldr	r5, .L595+44
 	mov	r1, r4
-	ldr	r0, .L592+16
-.LVL599:
+	ldr	r0, .L595+16
 	bl	List_remove_node
-.LVL600:
 	ldrh	r3, [r5]
-	cbnz	r3, .L589
-	ldr	r1, .L592+24
+	cbnz	r3, .L592
+	ldr	r1, .L595+24
 	movw	r2, #515
-	ldr	r0, .L592+28
+	ldr	r0, .L595+28
 	bl	printf
-.LVL601:
-	ldr	r1, .L592+32
-	ldr	r0, .L592+36
+	ldr	r1, .L595+32
+	ldr	r0, .L595+36
 	bl	printf
-.LVL602:
-.L589:
+.L592:
 	ldrh	r3, [r5]
-	.loc 1 516 0
 	mov	r0, r4
-	.loc 1 515 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 1 516 0
 	bl	INSERT_DATA_LIST
-.LVL603:
-.L583:
-.LBE276:
-.LBE275:
-	.loc 1 519 0
+.L586:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL604:
-.L590:
-.LBB278:
-.LBB277:
-	.loc 1 502 0
+.L593:
 	mov	r5, #-1
-.LVL605:
-	b	.L585
-.LVL606:
-.L591:
-	.loc 1 512 0
-	mov	r3, #-1
-.LVL607:
 	b	.L588
-.L593:
+.L594:
+	mov	r3, #-1
+	b	.L591
+.L596:
 	.align	2
-.L592:
-	.word	.LANCHOR91
+.L595:
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR81
+	.word	.LANCHOR94
 	.word	.LANCHOR82
 	.word	.LANCHOR83
-	.word	.LANCHOR94
+	.word	.LANCHOR84
+	.word	.LANCHOR95
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
 	.word	-1431655765
-	.word	.LANCHOR85
-.LBE277:
-.LBE278:
-	.cfi_endproc
-.LFE344:
+	.word	.LANCHOR86
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -7005,110 +4192,69 @@ List_update_data_list:
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB347:
-	.loc 1 601 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL608:
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 601 0
 	mov	r4, r0
-	.loc 1 605 0
-	ldrh	r1, [r0, #10]
 	movs	r3, #0
-	ldr	r2, [r0, #12]
-.LVL609:
-.L595:
+.L598:
 	uxth	r5, r3
-.LVL610:
-	.loc 1 605 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bcs	.L598
-	.loc 1 606 0 is_stmt 1
+	bcs	.L601
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L595
-	.loc 1 607 0
+	bne	.L598
 	bl	FtlFreeSysBlkQueueOut
-.LVL611:
-	.loc 1 608 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 1 607 0
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	.loc 1 608 0
 	cmp	r3, r2
-	bls	.L596
-	.loc 1 609 0
-	ldr	r3, .L602
-	ldr	r0, .L602+4
+	bls	.L599
+	ldr	r3, .L605
+	ldr	r0, .L605+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.LVL612:
-.L597:
-	b	.L597
-.L596:
-	.loc 1 622 0
+.L600:
+	b	.L600
+.L599:
 	ldr	r3, [r4, #28]
-	.loc 1 620 0
 	strh	r6, [r4, #2]	@ movhi
-	.loc 1 621 0
 	strh	r5, [r4]	@ movhi
-	.loc 1 622 0
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	.loc 1 623 0
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L598:
-	.loc 1 627 0
+.L601:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L600
-.LVL613:
-.LBB281:
-.LBB282:
-	ldr	r1, .L602+8
-	movw	r2, #627
-	ldr	r0, .L602+12
+	bhi	.L603
+	ldr	r1, .L605+8
+	mov	r2, #628
+	ldr	r0, .L605+12
 	bl	printf
-.LVL614:
-	ldr	r1, .L602+16
-	ldr	r0, .L602+20
+	ldr	r1, .L605+16
+	ldr	r0, .L605+20
 	bl	printf
-.LVL615:
-.L600:
-.LBE282:
-.LBE281:
-	.loc 1 629 0
+.L603:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL616:
-.L603:
+.L606:
 	.align	2
-.L602:
-	.word	.LANCHOR75
-	.word	.LC9
-	.word	.LANCHOR95
+.L605:
+	.word	.LANCHOR76
+	.word	.LC8
+	.word	.LANCHOR96
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE347:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -7119,144 +4265,93 @@ ftl_map_blk_alloc_new_blk:
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB352:
-	.loc 1 824 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL617:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 829 0
 	movs	r1, #0
-	ldr	r3, .L614
-	.loc 1 830 0
+	ldr	r3, .L617
 	movs	r0, #12
 	movw	r5, #65535
-	.loc 1 829 0
 	ldrh	r2, [r3]
-	.loc 1 830 0
-	ldr	r3, .L614+4
+	ldr	r3, .L617+4
 	ldr	r3, [r3]
-.LVL618:
-.L605:
+.L608:
 	uxth	r4, r1
-.LVL619:
-	.loc 1 829 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L607
+	bcc	.L610
 	mov	r4, r2
-.LVL620:
 	movs	r1, #0
-.LVL621:
 	mov	r6, #-2147483648
-	.loc 1 840 0
 	movs	r7, #12
-.L608:
+.L611:
 	uxth	r5, r1
-.LVL622:
-	.loc 1 839 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L610
-	.loc 1 848 0
+	bcc	.L613
 	cmp	r4, r2
-	bcc	.L606
-	.loc 1 854 0
-	ldr	r1, .L614+8
+	bcc	.L609
+	ldr	r1, .L617+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.LVL623:
-.L611:
+.L614:
 	uxth	r5, r1
-.LVL624:
-	.loc 1 853 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L613
-	.loc 1 859 0
+	bcc	.L616
 	cmp	r4, r2
-	bcc	.L606
-	.loc 1 859 0 is_stmt 0 discriminator 1
-	movw	r2, #859
-	ldr	r1, .L614+12
-	ldr	r0, .L614+16
-.LVL625:
+	bcc	.L609
+	movw	r2, #863
+	ldr	r1, .L617+12
+	ldr	r0, .L617+16
 	bl	printf
-.LVL626:
-	ldr	r1, .L614+20
-	ldr	r0, .L614+24
+	ldr	r1, .L617+20
+	ldr	r0, .L617+24
 	bl	printf
-.LVL627:
-	b	.L606
-.LVL628:
-.L607:
+	b	.L609
+.L610:
 	adds	r1, r1, #1
-	.loc 1 830 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L605
-.LVL629:
-.L606:
-	.loc 1 861 0
+	bne	.L608
+.L609:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL630:
-.L610:
-	.loc 1 840 0
+.L613:
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L609
-	.loc 1 841 0
+	blt	.L612
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
-.LVL631:
 	movhi	r4, r5
-.L609:
-.LVL632:
+.L612:
 	adds	r1, r1, #1
-.LVL633:
-	b	.L608
-.LVL634:
-.L613:
-	.loc 1 854 0
+	b	.L611
+.L616:
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L612
-	.loc 1 854 0 is_stmt 0 discriminator 1
+	bls	.L615
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
-.LVL635:
 	movne	r4, r5
-.LVL636:
-.L612:
+.L615:
 	adds	r1, r1, #1
-.LVL637:
 	adds	r3, r3, #12
-	b	.L611
-.L615:
+	b	.L614
+.L618:
 	.align	2
-.L614:
-	.word	.LANCHOR67
-	.word	.LANCHOR96
+.L617:
+	.word	.LANCHOR68
 	.word	.LANCHOR97
 	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE352:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
@@ -7267,83 +4362,51 @@ select_l2p_ram_region:
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB358:
-	.loc 1 1010 0 is_stmt 1
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL638:
-	.loc 1 1013 0
-	ldr	r2, .L622
-	.loc 1 1010 0
-	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
+	ldr	r2, .L629
+	push	{r4, r5, r6, lr}
 	mov	r1, r2
-	.loc 1 1013 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L617
-	.loc 1 1013 0 is_stmt 0 discriminator 1
-	cbnz	r0, .L617
-	.loc 1 1013 0
+	bhi	.L620
+	cbnz	r0, .L620
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 1 1022 0 is_stmt 1
-	pop	{r4, r5, pc}
-.L617:
-	.loc 1 1015 0
-	ldr	r3, .L622+4
-	.loc 1 1014 0
-	movs	r2, #0
-	strh	r2, [r1]	@ movhi
-.LBB285:
-.LBB286:
-	.loc 1 1018 0
-	movw	r5, #65535
-	.loc 1 1016 0
-	ldr	r1, .L622+8
-.LBE286:
-.LBE285:
-	.loc 1 1015 0
-	str	r2, [r3]
-.LVL639:
-.LBB288:
-.LBB287:
-	.loc 1 1018 0
-	ldr	r2, .L622+12
-	ldrh	r1, [r1]
-	ldr	r2, [r2]
-	add	r1, r2, r1, lsl #1
-.LVL640:
-.L618:
-	.loc 1 1016 0
-	cmp	r2, r1
-	bne	.L620
-	pop	{r4, r5, pc}
+	pop	{r4, r5, r6, pc}
 .L620:
-	.loc 1 1018 0
-	ldrh	r4, [r2], #2
-	cmp	r4, r5
-	.loc 1 1019 0
-	ittt	ne
-	ldrne	r0, [r3]
-	addne	r0, r0, r4
-	strne	r0, [r3]
-	b	.L618
+	movs	r3, #0
+	ldr	r0, .L629+4
+	strh	r3, [r1]	@ movhi
+	movw	r6, #65535
+	ldr	r1, .L629+8
+	ldrh	r4, [r0]
+	mov	r0, r3
+	ldr	r2, .L629+12
+	ldr	r1, [r1]
+	str	r3, [r2]
+	add	r4, r1, r4, lsl #1
+.L621:
+	cmp	r1, r4
+	bne	.L623
+	cbz	r3, .L619
+	str	r0, [r2]
+.L619:
+	pop	{r4, r5, r6, pc}
 .L623:
+	ldrh	r5, [r1], #2
+	cmp	r5, r6
+	itt	ne
+	addne	r0, r0, r5
+	movne	r3, #1
+	b	.L621
+.L630:
 	.align	2
-.L622:
-	.word	.LANCHOR99
+.L629:
 	.word	.LANCHOR100
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-.LBE287:
-.LBE288:
-	.cfi_endproc
-.LFE358:
+	.word	.LANCHOR40
+	.word	.LANCHOR84
+	.word	.LANCHOR101
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -7354,39 +4417,27 @@ FtlUpdateVaildLpn:
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB363:
-	.loc 1 1502 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL641:
-	.loc 1 1502 0
 	mov	r3, r0
-	.loc 1 1503 0
-	cbz	r1, .L625
+	cbz	r1, .L632
 	b	ftl_set_blk_mode.part.10
-.LVL642:
-.L625:
-	.loc 1 1506 0
-	ldr	r2, .L626
+.L632:
+	ldr	r2, .L633
 	lsrs	r0, r0, #5
-.LVL643:
 	and	r3, r3, #31
 	ldr	r1, [r2]
-.LVL644:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L627:
+.L634:
 	.align	2
-.L626:
+.L633:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE363:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -7397,30 +4448,21 @@ ftl_set_blk_mode:
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB364:
-	.loc 1 1510 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL645:
-	.loc 1 1511 0
-	ldr	r3, .L629
+	ldr	r3, .L636
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL646:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 1 1512 0
 	and	r0, r0, #1
 	bx	lr
-.L630:
+.L637:
 	.align	2
-.L629:
+.L636:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE364:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -7431,93 +4473,56 @@ ftl_get_blk_mode:
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB370:
-	.loc 1 1831 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL647:
-	.loc 1 1833 0
 	movs	r3, #0
-	.loc 1 1831 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 1833 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL648:
-	.loc 1 1836 0
 	movw	r6, #65535
-	.loc 1 1834 0
-	ldr	r3, .L638
+	ldr	r3, .L645
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.LVL649:
-.L632:
-	.loc 1 1834 0 is_stmt 0 discriminator 1
+.L639:
 	cmp	r2, r4
-	bcc	.L634
-	.loc 1 1845 0 is_stmt 1
-	ldr	r3, .L638+4
+	bcc	.L641
+	ldr	r3, .L645+4
 	add	r5, r0, #16
-	.loc 1 1843 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
-.LVL650:
-	.loc 1 1845 0
 	movs	r3, #0
 	uxth	r1, r1
-.LVL651:
-.L635:
-	.loc 1 1841 0 discriminator 1
+.L642:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L637
-	.loc 1 1848 0
+	bhi	.L644
 	pop	{r4, r5, r6, pc}
-.LVL652:
-.L634:
-	.loc 1 1836 0
+.L641:
 	ldrh	r5, [r3, #2]!
-	.loc 1 1834 0
 	adds	r2, r2, #1
-.LVL653:
 	uxth	r2, r2
-.LVL654:
-	.loc 1 1836 0
 	cmp	r5, r6
-	.loc 1 1838 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L632
-.LVL655:
-.L637:
-	.loc 1 1843 0
+	b	.L639
+.L644:
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
-.LVL656:
 	cmp	r2, r6
-	.loc 1 1845 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L635
-.L639:
+	b	.L642
+.L646:
 	.align	2
-.L638:
-	.word	.LANCHOR37
-	.word	.LANCHOR52
-	.cfi_endproc
-.LFE370:
+.L645:
+	.word	.LANCHOR38
+	.word	.LANCHOR53
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
@@ -7528,144 +4533,92 @@ ftl_sb_update_avl_pages:
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
-.LFB375:
-	.loc 1 2332 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL657:
-	.loc 1 2335 0
-	ldr	r3, .L653
-	.loc 1 2332 0
+	ldr	r3, .L660
+	ldrh	r2, [r0]
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 2332 0
 	mov	r4, r0
-	.loc 1 2335 0
-	ldrh	r2, [r0]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L641
-	.loc 1 2335 0 is_stmt 0 discriminator 1
-	ldr	r1, .L653+4
-	movw	r2, #2335
-	ldr	r0, .L653+8
-.LVL658:
+	bcc	.L648
+	ldr	r1, .L660+4
+	movw	r2, #2613
+	ldr	r0, .L660+8
 	bl	printf
-.LVL659:
-	ldr	r1, .L653+12
-	ldr	r0, .L653+16
+	ldr	r1, .L660+12
+	ldr	r0, .L660+16
 	bl	printf
-.LVL660:
-.L641:
-	.loc 1 2338 0 is_stmt 1
-	ldr	r3, .L653+20
+.L648:
+	ldr	r3, .L660+20
 	add	r6, r4, #16
-	.loc 1 2339 0
-	ldr	r10, .L653+40
-	.loc 1 2340 0
+	ldr	r10, .L660+40
 	movw	r7, #65535
-	.loc 1 2336 0
 	movs	r5, #0
-	.loc 1 2338 0
 	ldrh	r8, [r3]
-	.loc 1 2336 0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 1 2337 0
 	strb	r5, [r4, #7]
-.LVL661:
-.L642:
-	.loc 1 2338 0 discriminator 1
+.L649:
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L644
-	.loc 1 2348 0
-	ldr	r2, .L653+24
+	bhi	.L651
+	ldr	r2, .L660+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2349 0
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	.loc 1 2350 0
-	ldr	r3, .L653+28
+	ldr	r3, .L660+28
 	ldr	r3, [r3]
-	cbz	r3, .L645
-	.loc 1 2350 0 is_stmt 0 discriminator 1
-	ldr	r3, .L653+32
+	cbz	r3, .L652
+	ldr	r3, .L660+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #59
-	.loc 1 2351 0 is_stmt 1 discriminator 1
+	cmp	r3, #79
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L645:
-	.loc 1 2354 0
-	ldr	r3, .L653+36
+.L652:
+	ldr	r3, .L660+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L646
-	.loc 1 2355 0
+	cbz	r3, .L653
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L646:
-	.loc 1 2357 0
+.L653:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL662:
-.L644:
-	.loc 1 2339 0
+.L651:
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL663:
-	.loc 1 2340 0
 	strh	r7, [r6]	@ movhi
-	.loc 1 2339 0
 	mov	fp, r0
-.LVL664:
-	.loc 1 2341 0
 	bl	FtlBbmIsBadBlock
-.LVL665:
-	cbnz	r0, .L643
-	.loc 1 2342 0
+	cbnz	r0, .L650
 	strh	fp, [r6]	@ movhi
-	.loc 1 2343 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L643:
-.LVL666:
+.L650:
 	adds	r5, r5, #1
-.LVL667:
 	adds	r6, r6, #2
-	b	.L642
-.L654:
+	b	.L649
+.L661:
 	.align	2
-.L653:
-	.word	.LANCHOR39
-	.word	.LANCHOR101
+.L660:
+	.word	.LANCHOR40
+	.word	.LANCHOR102
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR37
-	.word	.LANCHOR52
+	.word	.LANCHOR38
+	.word	.LANCHOR53
 	.word	.LANCHOR28
-	.word	.LANCHOR78
+	.word	.LANCHOR79
 	.word	.LANCHOR1
-	.word	.LANCHOR46
-	.cfi_endproc
-.LFE375:
+	.word	.LANCHOR47
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
@@ -7676,93 +4629,54 @@ make_superblock:
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB382:
-	.loc 1 2710 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL668:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 2714 0
 	movs	r5, #0
-	ldr	r3, .L661
-	.loc 1 2710 0
+	ldr	r3, .L668
 	mov	r6, r0
-	.loc 1 2712 0
 	mov	r4, r5
-	.loc 1 2715 0
-	ldr	r10, .L661+12
-	.loc 1 2714 0
+	ldr	r10, .L668+12
 	ldrh	r7, [r3]
-	.loc 1 2717 0
-	ldr	r3, .L661+4
+	ldr	r3, .L668+4
 	ldrh	r8, [r3]
-.LVL669:
-.L656:
-	.loc 1 2714 0 discriminator 1
+.L663:
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L658
-	.loc 1 2719 0
-	cbz	r4, .L660
-	.loc 1 2720 0
+	bhi	.L665
+	cbz	r4, .L667
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL670:
-.L659:
-	.loc 1 2721 0
-	ldr	r3, .L661+8
+.L666:
+	ldr	r3, .L668+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
-	.loc 1 2723 0
 	movs	r0, #0
-.LVL671:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL672:
-.L658:
-	.loc 1 2715 0
+.L665:
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL673:
-	.loc 1 2716 0
 	bl	FtlBbmIsBadBlock
-.LVL674:
-	cbnz	r0, .L657
-	.loc 1 2717 0
+	cbnz	r0, .L664
 	add	r4, r4, r8
-.LVL675:
 	uxth	r4, r4
-.LVL676:
-.L657:
+.L664:
 	adds	r5, r5, #1
-.LVL677:
-	b	.L656
-.LVL678:
-.L660:
+	b	.L663
+.L667:
 	mov	r0, r4
-	b	.L659
-.L662:
+	b	.L666
+.L669:
 	.align	2
-.L661:
-	.word	.LANCHOR37
-	.word	.LANCHOR52
-	.word	.LANCHOR81
-	.word	.LANCHOR46
-	.cfi_endproc
-.LFE382:
+.L668:
+	.word	.LANCHOR38
+	.word	.LANCHOR53
+	.word	.LANCHOR82
+	.word	.LANCHOR47
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
@@ -7773,41 +4687,31 @@ update_multiplier_value:
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB383:
-	.loc 1 2726 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL679:
-	.loc 1 2729 0
-	ldr	r3, .L666
+	ldr	r3, .L673
 	ldr	r0, [r3]
-	cbz	r0, .L664
-	.loc 1 2730 0
-	ldr	r3, .L666+4
+	cbz	r0, .L671
+	ldr	r3, .L673+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L666+8
+	ldr	r3, .L673+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L666+12
+	ldr	r3, .L673+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.LVL680:
-.L664:
-	.loc 1 2732 0
+.L671:
 	bx	lr
-.L667:
+.L674:
 	.align	2
-.L666:
-	.word	.LANCHOR87
-	.word	.LANCHOR81
+.L673:
+	.word	.LANCHOR88
+	.word	.LANCHOR82
 	.word	-1431655765
-	.word	.LANCHOR78
-	.cfi_endproc
-.LFE383:
+	.word	.LANCHOR79
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -7818,90 +4722,57 @@ GetFreeBlockMinEraseCount:
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB384:
-	.loc 1 2735 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL681:
-	.loc 1 2740 0
-	ldr	r3, .L676
-	.loc 1 2735 0
+	ldr	r3, .L683
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 2740 0
 	ldr	r3, [r3]
-	cbz	r3, .L674
-	.loc 1 2741 0
-	ldr	r2, .L676+4
-	.loc 1 2745 0
+	cbz	r3, .L681
+	ldr	r2, .L683+4
 	movs	r5, #6
 	movw	r6, #65535
-	.loc 1 2741 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 1 2742 0
 	it	gt
 	uxthgt	r0, r2
-.LVL682:
-	.loc 1 2743 0
-	ldr	r2, .L676+8
+	ldr	r2, .L683+8
 	ldr	r1, [r2]
-	ldr	r2, .L676+12
+	ldr	r2, .L683+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	.loc 1 2744 0
 	movs	r2, #0
-	.loc 1 2743 0
 	uxth	r3, r3
-.LVL683:
-.L671:
-	.loc 1 2744 0 discriminator 1
+.L678:
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L673
-	.loc 1 2745 0
+	bls	.L680
 	mul	r4, r5, r3
 	adds	r2, r2, #1
-.LVL684:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L675
-.L673:
-	.loc 1 2749 0
-	ldr	r2, .L676+16
+	bne	.L682
+.L680:
+	ldr	r2, .L683+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
-.LVL685:
 	pop	{r4, r5, r6, pc}
-.LVL686:
-.L675:
+.L682:
 	mov	r3, r4
-.LVL687:
-	b	.L671
-.L674:
-	.loc 1 2736 0
+	b	.L678
+.L681:
 	mov	r0, r3
-.LVL688:
-	.loc 1 2752 0
 	pop	{r4, r5, r6, pc}
-.L677:
+.L684:
 	.align	2
-.L676:
-	.word	.LANCHOR87
+.L683:
 	.word	.LANCHOR88
-	.word	.LANCHOR81
+	.word	.LANCHOR89
+	.word	.LANCHOR82
 	.word	-1431655765
-	.word	.LANCHOR78
-	.cfi_endproc
-.LFE384:
+	.word	.LANCHOR79
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -7912,45 +4783,24 @@ GetFreeBlockMaxEraseCount:
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB385:
-	.loc 1 2843 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL689:
-	.loc 1 2844 0
 	movw	r2, #65535
-	.loc 1 2843 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 2844 0
 	cmp	r0, r2
-	beq	.L679
-.LVL690:
-.LBB291:
-.LBB292:
-	.loc 1 2846 0
-	ldr	r2, .L680
+	beq	.L686
+	ldr	r2, .L687
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 1 2847 0
 	bl	INSERT_FREE_LIST
-.LVL691:
-.L679:
-.LBE292:
-.LBE291:
-	.loc 1 2849 0
+.L686:
 	movs	r0, #0
 	pop	{r3, pc}
-.L681:
+.L688:
 	.align	2
-.L680:
-	.word	.LANCHOR83
-	.cfi_endproc
-.LFE385:
+.L687:
+	.word	.LANCHOR84
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -7961,154 +4811,100 @@ free_data_superblock:
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB391:
-	.file 6 "drivers/rknand/rkftl/FtlGc.c"
-	.loc 6 21 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 26 0
-	movs	r5, #12
-	ldr	r0, .L687
-	.loc 6 24 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	.loc 6 27 0
-	ldr	r6, .L687+4
-	ldr	r7, .L687+8
-	.loc 6 28 0
-	ldr	ip, .L687+28
-	.loc 6 29 0
-	ldr	r8, .L687+32
-	.loc 6 24 0
-	ldr	r2, .L687+12
+	ldr	r1, .L694
+	mov	fp, #1
+	ldr	r2, .L694+4
+	ldr	r5, [r1]
+	ldr	r1, .L694+8
 	str	r3, [r2]
-.LVL692:
-.L683:
-	.loc 6 25 0 discriminator 1
-	ldr	r2, .L687+16
-	uxth	r1, r3
-	add	lr, r3, #1
+	ldr	r2, .L694+12
+	mov	r0, r5
+	ldr	r1, [r1]
 	ldrh	r2, [r2]
-	cmp	r1, r2
-	bcc	.L684
-	.loc 6 33 0 discriminator 1
-	ldr	r0, .L687+20
-	.loc 6 34 0 discriminator 1
-	movs	r4, #12
-	ldr	r1, .L687
-	movs	r5, #0
-	.loc 6 35 0 discriminator 1
-	ldr	r6, .L687+4
-	ldr	r7, .L687+8
-	.loc 6 36 0 discriminator 1
-	ldr	ip, .L687+28
-	ldr	lr, .L687+24
-.LVL693:
-.L685:
-	.loc 6 33 0 discriminator 1
-	ldr	r3, [r0]
-	cmp	r2, r3
-	bcc	.L686
-	.loc 6 38 0
+	str	r1, [sp, #4]
+	ldr	r1, .L694+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	ldr	r1, .L694+20
+	ldr	r10, [r1]
+	ldr	r1, .L694+24
+	ldrh	r7, [r1]
+	ldr	r1, .L694+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	mov	r1, r3
+.L690:
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #36
+	add	lr, r1, r6
+	bne	.L691
+	ldr	r3, .L694+32
+	mov	lr, #12
+	mov	r8, #0
+	ldr	r0, [r3]
+	ldr	r3, .L694+8
+	ldr	r4, [r3]
+	ldr	r3, .L694+20
+	ldr	ip, [r3]
+.L692:
+	cmp	r2, r0
+	bcc	.L693
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL694:
-.L684:
-	uxth	r3, r3
-	.loc 6 26 0 discriminator 3
-	ldr	r10, [r0]
-	movs	r4, #1
-	mul	r2, r5, r3
-	add	r1, r10, r2
-	str	r4, [r1, #8]
-	.loc 6 27 0 discriminator 3
-	ldrh	r4, [r7]
-	ldr	r1, [r6]
-	muls	r4, r3, r4
-	bic	r4, r4, #3
-	add	r1, r1, r4
-	str	r1, [r10, r2]
-	.loc 6 28 0 discriminator 3
-	ldr	r1, .L687+24
-	ldr	r10, [r0]
-	ldrh	fp, [r1]
-	ldr	r1, [ip]
-	add	r4, r10, r2
-	mul	fp, r3, fp
-	bic	fp, fp, #3
-	add	r1, r1, fp
-	.loc 6 29 0 discriminator 3
-	mov	fp, #36
-	.loc 6 28 0 discriminator 3
-	str	r1, [r4, #4]
-	.loc 6 29 0 discriminator 3
-	ldr	r1, [r8]
-	ldr	r2, [r10, r2]
-	mla	r3, fp, r3, r1
-.LVL695:
-	str	r2, [r3, #8]
-	.loc 6 30 0 discriminator 3
-	ldr	r2, [r4, #4]
-	str	r2, [r3, #12]
-.LVL696:
-	mov	r3, lr
-	b	.L683
-.LVL697:
-.L686:
-	.loc 6 35 0 discriminator 3
-	ldrh	r10, [r7]
-	.loc 6 34 0 discriminator 3
-	mul	r8, r4, r2
-	ldr	fp, [r1]
-	.loc 6 35 0 discriminator 3
-	mul	r10, r2, r10
-	.loc 6 34 0 discriminator 3
-	add	r3, fp, r8
-	str	r5, [r3, #8]
-	.loc 6 35 0 discriminator 3
-	ldr	r3, [r6]
-	bic	r10, r10, #3
+.L691:
+	bic	r1, r1, #3
+	bic	r3, r3, #3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
 	add	r3, r3, r10
-	str	r3, [fp, r8]
-	.loc 6 36 0 discriminator 3
-	ldrh	r10, [lr]
-	ldr	r3, [r1]
-	mul	r10, r2, r10
-	add	r8, r8, r3
-	ldr	r3, [ip]
-	.loc 6 33 0 discriminator 3
+	str	fp, [r0, #-4]
+	str	r3, [r0, #-8]
+	add	r6, r6, r1
+	mov	r1, lr
+	str	r6, [r0, #-12]
+	str	r3, [r4, #-32]
+	mov	r3, ip
+	str	r6, [r4, #-36]
+	b	.L690
+.L693:
+	ldr	r3, [sp]
+	mul	r10, lr, r2
+	muls	r3, r2, r3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	mul	r3, r2, r7
 	adds	r2, r2, #1
-.LVL698:
 	uxth	r2, r2
-.LVL699:
-	.loc 6 36 0 discriminator 3
-	bic	r10, r10, #3
-	add	r3, r3, r10
-	str	r3, [r8, #4]
-	b	.L685
-.L688:
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L692
+.L695:
 	.align	2
-.L687:
-	.word	.LANCHOR103
+.L694:
 	.word	.LANCHOR104
-	.word	.LANCHOR57
-	.word	.LANCHOR102
-	.word	.LANCHOR37
-	.word	.LANCHOR107
-	.word	.LANCHOR58
+	.word	.LANCHOR103
 	.word	.LANCHOR105
+	.word	.LANCHOR38
+	.word	.LANCHOR58
 	.word	.LANCHOR106
-	.cfi_endproc
-.LFE391:
+	.word	.LANCHOR59
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -8119,80 +4915,45 @@ FtlGcBufInit:
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB392:
-	.loc 6 41 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL700:
-	.loc 6 46 0
-	ldr	r3, .L696
-	.loc 6 47 0
+	ldr	r3, .L703
 	mov	ip, #12
-	.loc 6 41 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 45 0
 	movs	r4, #0
-	.loc 6 47 0
 	mov	fp, #36
-	.loc 6 48 0
 	mov	lr, r4
-	.loc 6 46 0
 	ldr	r7, [r3]
-	.loc 6 47 0
-	ldr	r3, .L696+4
+	ldr	r3, .L703+4
 	ldr	r5, [r3]
-.LVL701:
-.L690:
+.L697:
 	uxth	r3, r4
-	.loc 6 45 0 discriminator 1
 	cmp	r1, r3
-	bls	.L689
-	.loc 6 47 0
+	bls	.L696
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L691:
-.LVL702:
+.L698:
 	uxth	r3, r2
-	.loc 6 46 0 discriminator 1
 	cmp	r7, r3
-	bls	.L692
-	.loc 6 47 0
+	bls	.L699
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
-.LVL703:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L691
-	.loc 6 48 0
+	bne	.L698
 	str	lr, [r10, #8]
-.L692:
-.LVL704:
+.L699:
 	adds	r4, r4, #1
-.LVL705:
-	b	.L690
-.LVL706:
-.L689:
+	b	.L697
+.L696:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL707:
-.L697:
+.L704:
 	.align	2
-.L696:
-	.word	.LANCHOR107
-	.word	.LANCHOR103
-	.cfi_endproc
-.LFE392:
+.L703:
+	.word	.LANCHOR108
+	.word	.LANCHOR104
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -8203,82 +4964,47 @@ FtlGcBufFree:
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB393:
-	.loc 6 56 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL708:
-	.loc 6 61 0
-	ldr	r3, .L705
-	.loc 6 60 0
+	ldr	r3, .L712
 	movs	r2, #0
-	.loc 6 56 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 28
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 6 62 0
 	mov	ip, #12
-	.loc 6 63 0
 	movs	r7, #1
-	.loc 6 64 0
 	mov	lr, #36
-	.loc 6 61 0
 	ldr	r4, [r3]
-	.loc 6 62 0
-	ldr	r3, .L705+4
+	ldr	r3, .L712+4
 	ldr	r5, [r3]
-.LVL709:
-.L699:
+.L706:
 	uxth	r8, r2
-	.loc 6 60 0 discriminator 1
 	cmp	r1, r8
-	bhi	.L703
-	.loc 6 70 0
+	bhi	.L710
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L703:
+.L710:
 	mov	r10, #0
-.L700:
-.LVL710:
+.L707:
 	uxth	r3, r10
-	.loc 6 61 0 discriminator 1
 	cmp	r4, r3
-	bls	.L701
-	.loc 6 62 0
+	bls	.L708
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
-.LVL711:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L700
-	.loc 6 64 0
+	bne	.L707
 	mla	r8, lr, r8, r0
-	ldr	r6, [r3]
-	.loc 6 63 0
 	str	r7, [r3, #8]
-	.loc 6 64 0
-	str	r6, [r8, #8]
-	.loc 6 65 0
+	ldr	r6, [r3]
 	ldr	r3, [r3, #4]
+	str	r6, [r8, #8]
 	str	r3, [r8, #12]
-.L701:
-.LVL712:
+.L708:
 	adds	r2, r2, #1
-.LVL713:
-	b	.L699
-.L706:
+	b	.L706
+.L713:
 	.align	2
-.L705:
-	.word	.LANCHOR107
-	.word	.LANCHOR103
-	.cfi_endproc
-.LFE393:
+.L712:
+	.word	.LANCHOR108
+	.word	.LANCHOR104
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -8289,48 +5015,30 @@ FtlGcBufAlloc:
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB394:
-	.loc 6 73 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL714:
-	.loc 6 77 0
-	ldr	r3, .L712
-	.loc 6 76 0
-	ldr	r2, .L712+4
-	.loc 6 77 0
+	ldr	r3, .L719
+	ldr	r2, .L719+4
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.LVL715:
-.L708:
-	.loc 6 76 0 discriminator 1
+.L715:
 	cmp	r3, r2
-	bne	.L710
-	.loc 6 80 0
+	bne	.L717
 	movs	r0, #0
-.LVL716:
 	bx	lr
-.LVL717:
-.L710:
-	.loc 6 77 0
+.L717:
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L708
-	.loc 6 78 0
+	bne	.L715
 	movs	r0, #1
-.LVL718:
-	.loc 6 81 0
 	bx	lr
-.L713:
+.L720:
 	.align	2
-.L712:
-	.word	.LANCHOR108
+.L719:
 	.word	.LANCHOR109
-	.cfi_endproc
-.LFE394:
+	.word	.LANCHOR110
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -8341,95 +5049,56 @@ IsBlkInGcList:
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB395:
-	.loc 6 84 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL719:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 6 84 0
 	mov	r5, r0
-	.loc 6 90 0
-	ldr	r4, .L718
-	.loc 6 87 0
+	ldr	r4, .L725
 	ubfx	r0, r0, #10, #16
-.LVL720:
-	.loc 6 84 0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 6 87 0
 	bl	P2V_block_in_plane
-.LVL721:
-	.loc 6 91 0
-	ldr	r3, .L718+4
-	.loc 6 90 0
+	ldr	r3, .L725+4
 	ldrh	r1, [r4]
-	.loc 6 91 0
 	ldr	r2, [r3]
-	.loc 6 90 0
 	movs	r3, #0
-.LVL722:
-.L715:
+.L722:
 	uxth	ip, r3
-.LVL723:
-	.loc 6 90 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
-	bcc	.L717
-	.loc 6 95 0 is_stmt 1
-	bne	.L716
-	.loc 6 96 0
+	bcc	.L724
+	bne	.L723
 	strh	r0, [r2, ip, lsl #1]	@ movhi
-	.loc 6 97 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L716
-.L717:
+	b	.L723
+.L724:
 	adds	r3, r3, #1
-	.loc 6 91 0
 	add	ip, r2, r3, lsl #1
-.LVL724:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L715
-.L716:
-	.loc 6 100 0
-	ldr	r0, .L718+8
-.LVL725:
-	movs	r3, #12
-	ldrh	r2, [r0]
-	muls	r3, r2, r3
-	ldr	r2, .L718+12
-	ldr	r2, [r2]
-	adds	r1, r2, r3
-	str	r6, [r1, #4]
-	.loc 6 101 0
-	str	r7, [r1, #8]
-	.loc 6 102 0
-	str	r5, [r2, r3]
-	.loc 6 106 0
-	ldrh	r3, [r0]
-	adds	r3, r3, #1
-	strh	r3, [r0]	@ movhi
+	bne	.L722
+.L723:
+	ldr	r2, .L725+8
+	movs	r0, #12
+	ldr	r1, .L725+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
+	muls	r0, r3, r0
+	adds	r3, r3, #1
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	str	r7, [r4, #8]
+	str	r5, [r1, r0]
+	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL726:
-.L719:
+.L726:
 	.align	2
-.L718:
+.L725:
+	.word	.LANCHOR110
 	.word	.LANCHOR109
-	.word	.LANCHOR108
 	.word	.LANCHOR111
-	.word	.LANCHOR110
-	.cfi_endproc
-.LFE395:
+	.word	.LANCHOR112
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -8440,53 +5109,54 @@ FtlGcUpdatePage:
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB403:
-	.loc 6 380 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL727:
-	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 384 0
-	ldr	r4, .L723
+	ldr	ip, .L732+12
+	push	{r4, r5, r6, r7, lr}
+	ldrh	lr, [ip]
+	cmp	lr, r0
+	beq	.L728
+	ldr	r6, .L732
+	ldrh	r7, [r6]
+	cmp	r0, r7
+	beq	.L728
+	ldr	r4, .L732+4
 	ldrh	r5, [r4]
-	cmp	r5, r0
-	beq	.L721
-	.loc 6 384 0 is_stmt 0 discriminator 1
-	ldr	r3, .L723+4
-	ldrh	r1, [r3]
+	cmp	r0, r5
+	beq	.L728
+	ldr	r2, .L732+8
+	ldrh	r1, [r2]
 	cmp	r0, r1
-	beq	.L721
-	.loc 6 386 0 is_stmt 1
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L722
-	.loc 6 387 0
-	strh	r0, [r4]	@ movhi
-.L721:
-	.loc 6 400 0
+	beq	.L728
+	movw	r3, #65535
+	cmp	lr, r3
+	bne	.L729
+	strh	r0, [ip]	@ movhi
+.L728:
 	movs	r0, #0
-.LVL728:
-	pop	{r4, r5, pc}
-.LVL729:
-.L722:
-	.loc 6 388 0
-	cmp	r1, r2
-	.loc 6 389 0
+	pop	{r4, r5, r6, r7, pc}
+.L729:
+	cmp	r7, r3
+	bne	.L730
+	strh	r0, [r6]	@ movhi
+	b	.L728
+.L730:
+	cmp	r5, r3
+	bne	.L731
+	strh	r0, [r4]	@ movhi
+	b	.L728
+.L731:
+	cmp	r1, r3
 	it	eq
-	strheq	r0, [r3]	@ movhi
-	b	.L721
-.L724:
+	strheq	r0, [r2]	@ movhi
+	b	.L728
+.L733:
 	.align	2
-.L723:
-	.word	.LANCHOR112
+.L732:
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR116
 	.word	.LANCHOR113
-	.cfi_endproc
-.LFE403:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
@@ -8497,14 +5167,10 @@ FtlGcRefreshBlock:
 	.fpu softvfp
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
-.LFB544:
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	b	FtlGcRefreshBlock
-	.cfi_endproc
-.LFE544:
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -8515,91 +5181,55 @@ FtlGcRefreshOpenBlock:
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB404:
-	.loc 6 403 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL730:
-	.loc 6 403 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 403 0
 	mov	r4, r0
-	.loc 6 405 0
 	bl	P2V_block_in_plane
-.LVL731:
 	mov	r5, r0
-.LVL732:
-	.loc 6 410 0
 	bl	FtlGcRefreshBlock
-.LVL733:
-	.loc 6 411 0
-	ldr	r3, .L734
+	ldr	r3, .L743
 	ldr	r3, [r3]
-	cbz	r3, .L727
-	.loc 6 412 0
-	ldr	r3, .L734+4
+	cbz	r3, .L736
+	ldr	r3, .L743+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
-	cmp	r3, #29
-	.loc 6 413 0
+	cmp	r3, #39
 	itt	hi
-	subhi	r3, r3, #30
+	subhi	r3, r3, #40
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L727:
-.LVL734:
-	.loc 6 416 0
-	ldr	r2, .L734+8
+.L736:
+	ldr	r2, .L743+8
 	movs	r1, #0
-	.loc 6 417 0
-	ldr	r5, .L734+12
-.LVL735:
-	.loc 6 416 0
+	ldr	r5, .L743+12
 	ldrh	r3, [r2]
-.LVL736:
-.L728:
-	.loc 6 416 0 is_stmt 0 discriminator 1
+.L737:
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L730
-	.loc 6 420 0 is_stmt 1
+	bhi	.L739
 	cmp	r3, #15
-	.loc 6 421 0
 	itttt	ls
 	addls	r1, r3, #1
-.LVL737:
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L734+12
+	ldrls	r2, .L743+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L729
-.LVL738:
-.L730:
+	b	.L738
+.L739:
 	adds	r1, r1, #1
-.LVL739:
-	.loc 6 417 0
 	add	r0, r5, r1, lsl #1
-.LVL740:
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L728
-.L729:
-	.loc 6 423 0
+	bne	.L737
+.L738:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L735:
+.L744:
 	.align	2
-.L734:
+.L743:
 	.word	.LANCHOR28
-	.word	.LANCHOR78
-	.word	.LANCHOR114
-	.word	.LANCHOR115
-	.cfi_endproc
-.LFE404:
+	.word	.LANCHOR79
+	.word	.LANCHOR117
+	.word	.LANCHOR118
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -8610,65 +5240,127 @@ FtlGcMarkBadPhyBlk:
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB405:
-	.loc 6 427 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 6 428 0
-	ldr	r3, .L742
-	.loc 6 427 0
+	ldr	r3, .L751
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 6 428 0
 	ldrh	r3, [r3]
-	cbz	r3, .L737
-	.loc 6 428 0 is_stmt 0 discriminator 1
-	ldr	r2, .L742+4
+	cbz	r3, .L746
+	ldr	r2, .L751+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L737
-	.loc 6 429 0 is_stmt 1
-	ldr	r4, .L742+8
+	bne	.L746
+	ldr	r4, .L751+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	.loc 6 430 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB295:
-.LBB296:
-	.loc 6 431 0
-	ldr	r3, .L742+12
+	ldr	r3, .L751+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
-.LVL741:
 	bl	FtlGcRefreshBlock
-.LVL742:
-	.loc 6 432 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L737:
-.LBE296:
-.LBE295:
-	.loc 6 435 0
+.L746:
 	movs	r0, #0
 	pop	{r4, pc}
-.L743:
+.L752:
 	.align	2
-.L742:
-	.word	.LANCHOR114
-	.word	.LANCHOR112
-	.word	.LANCHOR116
-	.word	.LANCHOR115
-	.cfi_endproc
-.LFE405:
+.L751:
+	.word	.LANCHOR117
+	.word	.LANCHOR113
+	.word	.LANCHOR119
+	.word	.LANCHOR118
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.flash_boot_enter_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_boot_enter_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_boot_enter_slc_mode, %function
+flash_boot_enter_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L755
+	ldr	r2, [r3]
+	ldr	r3, .L755+4
+	cmp	r2, r3
+	bne	.L753
+	b	flash_enter_slc_mode
+.L753:
+	bx	lr
+.L756:
+	.align	2
+.L755:
+	.word	.LANCHOR29
+	.word	1446522928
+	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
+	.section	.text.flash_boot_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_boot_exit_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_boot_exit_slc_mode, %function
+flash_boot_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L759
+	ldr	r2, [r3]
+	ldr	r3, .L759+4
+	cmp	r2, r3
+	bne	.L757
+	b	flash_exit_slc_mode
+.L757:
+	bx	lr
+.L760:
+	.align	2
+.L759:
+	.word	.LANCHOR29
+	.word	1446522928
+	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
+	.section	.text.FW_FlashBlockErase.constprop.41,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FW_FlashBlockErase.constprop.41, %function
+FW_FlashBlockErase.constprop.41:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L762
+	push	{r4, lr}
+	mov	r4, r0
+	movs	r0, #0
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	bl	flash_boot_enter_slc_mode
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	movs	r2, #0
+	mov	r1, r0
+	mov	r0, r2
+	bl	FlashEraseBlock
+	mov	r1, r0
+	movs	r0, #0
+	bl	flash_boot_exit_slc_mode
+	uxtb	r0, r1
+	pop	{r4, pc}
+.L763:
+	.align	2
+.L762:
+	.word	.LANCHOR18
+	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
 	.global	ftl_memset
@@ -8678,19 +5370,10 @@ FtlGcReFreshBadBlk:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB480:
-	.file 7 "drivers/rknand/rkftl/FTL_OSDepend_3.10.c"
-	.loc 7 27 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL743:
-	.loc 7 28 0
 	b	memset
-.LVL744:
-	.cfi_endproc
-.LFE480:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
 	.align	1
@@ -8701,273 +5384,172 @@ ftl_memset:
 	.fpu softvfp
 	.type	BuildFlashLsbPageTable, %function
 BuildFlashLsbPageTable:
-.LFB233:
-	.loc 2 930 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL745:
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 930 0
 	mov	r4, r1
-	.loc 2 933 0
-	cbnz	r0, .L746
-	.loc 2 935 0 discriminator 3
-	ldr	r3, .L783
-.LVL746:
-.L747:
+	cbnz	r0, .L766
+	ldr	r3, .L803
+.L767:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
-.LVL747:
 	adds	r0, r0, #1
-.LVL748:
-	.loc 2 934 0 discriminator 3
 	cmp	r0, #256
-	bne	.L747
-.LVL749:
-.L753:
-	.loc 2 966 0
+	bne	.L767
+.L773:
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L783+4
-	.loc 2 967 0
+	ldr	r0, .L803+4
 	uxth	r4, r4
-.LVL750:
-	.loc 2 966 0
 	bl	ftl_memset
-.LVL751:
-	.loc 2 969 0
-	ldr	r1, .L783
-	.loc 2 968 0
+	ldr	r1, .L803
 	movs	r3, #0
-	.loc 2 969 0
-	ldr	r0, .L783+4
-.LVL752:
-.L748:
-	.loc 2 968 0 discriminator 1
+	ldr	r0, .L803+4
+.L768:
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L770
-	.loc 2 974 0
+	bhi	.L790
 	pop	{r4, pc}
-.LVL753:
-.L746:
-	.loc 2 936 0
+.L766:
 	cmp	r0, #1
-	bne	.L749
-	.loc 2 939 0
-	ldr	r1, .L783
-.LVL754:
+	bne	.L769
+	ldr	r1, .L803
 	movs	r3, #0
-.LVL755:
-.L752:
+.L772:
 	cmp	r3, #3
 	uxth	r2, r3
-.LVL756:
-	bls	.L750
-	.loc 2 939 0 is_stmt 0 discriminator 1
+	bls	.L770
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
-.LVL757:
 	uxth	r2, r2
-.L750:
-	.loc 2 939 0 discriminator 8
+.L770:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-.LVL758:
 	adds	r3, r3, #1
-.LVL759:
-	.loc 2 938 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L752
-	b	.L753
-.LVL760:
-.L749:
-	.loc 2 940 0
+	bne	.L772
+	b	.L773
+.L769:
 	cmp	r0, #2
-	bne	.L754
-	.loc 2 943 0
-	ldr	r1, .L783
-.LVL761:
+	bne	.L774
+	ldr	r1, .L803
 	movs	r2, #0
-.L756:
+.L776:
 	uxth	r3, r2
-.LVL762:
 	cmp	r2, #1
 	ittt	hi
 	lslhi	r3, r3, #1
-.LVL763:
 	addhi	r3, r3, #-1
 	uxthhi	r3, r3
 	strh	r3, [r1, r2, lsl #1]	@ movhi
-.LVL764:
 	adds	r2, r2, #1
-.LVL765:
-	.loc 2 942 0
 	cmp	r2, #256
-	bne	.L756
-	b	.L753
-.LVL766:
-.L754:
-	.loc 2 944 0
+	bne	.L776
+	b	.L773
+.L774:
 	cmp	r0, #3
-	bne	.L757
-	.loc 2 947 0
-	ldr	r1, .L783
-.LVL767:
+	bne	.L777
+	ldr	r1, .L803
 	movs	r3, #0
-.LVL768:
-.L760:
+.L780:
 	cmp	r3, #5
 	uxth	r2, r3
-.LVL769:
-	bls	.L758
-	.loc 2 947 0 is_stmt 0 discriminator 1
+	bls	.L778
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
-.LVL770:
 	uxth	r2, r2
-.L758:
-	.loc 2 947 0 discriminator 8
+.L778:
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-.LVL771:
 	adds	r3, r3, #1
-.LVL772:
-	.loc 2 946 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L760
-	b	.L753
-.LVL773:
-.L757:
-	.loc 2 948 0
+	bne	.L780
+	b	.L773
+.L777:
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L761
-.LVL774:
-	.loc 2 951 0 discriminator 2
-	ldr	r2, .L783
+	bne	.L781
+	ldr	r2, .L803
 	strh	r3, [r2]	@ movhi
-.LVL775:
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
-.LVL776:
 	movs	r3, #2
 	strh	r3, [r2, #4]	@ movhi
-.LVL777:
 	movs	r3, #3
 	strh	r3, [r2, #6]	@ movhi
-.LVL778:
 	movs	r3, #5
 	strh	r3, [r2, #10]	@ movhi
 	movs	r3, #7
 	strh	r3, [r2, #12]	@ movhi
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
-.LVL779:
 	strh	r3, [r2, #14]!	@ movhi
-.LVL780:
-.L763:
-	.loc 2 953 0
+.L783:
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
 	moveq	r1, #6
 	rsb	r1, r1, r3, lsl #1
-	.loc 2 952 0
 	adds	r3, r3, #1
-.LVL781:
 	uxth	r3, r3
-.LVL782:
-	.loc 2 953 0
 	strh	r1, [r2, #2]!	@ movhi
-	.loc 2 952 0
 	cmp	r3, #256
-	bne	.L763
-	b	.L753
-.LVL783:
-.L761:
-	.loc 2 954 0
+	bne	.L783
+	b	.L773
+.L781:
 	cmp	r0, #5
-	bne	.L764
-	.loc 2 957 0 discriminator 3
-	ldr	r2, .L783
-.L765:
-.LVL784:
+	bne	.L784
+	ldr	r2, .L803
+.L785:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
-.LVL785:
 	adds	r3, r3, #1
-.LVL786:
-	.loc 2 956 0 discriminator 3
 	cmp	r3, #16
-	bne	.L765
-	ldr	r2, .L783+8
-.LVL787:
-.L766:
-	.loc 2 959 0 discriminator 2
+	bne	.L785
+	ldr	r2, .L803+8
+.L786:
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
-	.loc 2 958 0 discriminator 2
 	cmp	r3, #496
-	bne	.L766
-	b	.L753
-.L764:
-	.loc 2 960 0
+	bne	.L786
+	b	.L773
+.L784:
 	cmp	r0, #6
-	bne	.L753
-	.loc 2 963 0
-	ldr	r0, .L783
-.LVL788:
+	bne	.L773
+	ldr	r0, .L803
 	mov	r1, r3
-.LVL789:
-.L769:
+.L789:
 	cmp	r1, #5
 	uxth	r2, r1
-.LVL790:
-	bls	.L767
-	.loc 2 963 0 is_stmt 0 discriminator 1
+	bls	.L787
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
-.LVL791:
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L767:
-	.loc 2 963 0 discriminator 8
+.L787:
 	strh	r2, [r0, r1, lsl #1]	@ movhi
-.LVL792:
 	adds	r1, r1, #1
-.LVL793:
-	.loc 2 962 0 is_stmt 1 discriminator 8
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L769
-	b	.L753
-.LVL794:
-.L770:
-	.loc 2 969 0 discriminator 3
+	bne	.L789
+	b	.L773
+.L790:
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
-.LVL795:
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L748
-.L784:
+	b	.L768
+.L804:
 	.align	2
-.L783:
+.L803:
 	.word	.LANCHOR16
-	.word	.LANCHOR117
+	.word	.LANCHOR120
 	.word	.LANCHOR16+30
-	.cfi_endproc
-.LFE233:
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",%progbits
 	.align	1
@@ -8978,191 +5560,129 @@ BuildFlashLsbPageTable:
 	.fpu softvfp
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
-.LFB248:
-	.loc 2 2048 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2051 0
 	movs	r3, #0
-	.loc 2 2052 0
-	ldr	r2, .L803
-	.loc 2 2051 0
-	ldr	r5, .L803+4
-	.loc 2 2052 0
+	ldr	r2, .L823
+	ldr	r4, .L823+4
 	strb	r3, [r2]
-	mov	fp, r2
-	ldr	r7, .L803+8
-	.loc 2 2051 0
-	strb	r3, [r5]
-	.loc 2 2053 0
-	ldr	r3, .L803+12
+	str	r2, [sp]
+	strb	r3, [r4]
+	ldr	r3, .L823+8
+	ldr	r7, .L823+12
 	ldrh	r3, [r3, #10]
-	.loc 2 2054 0
 	cmp	r3, #256
-	bls	.L786
-	.loc 2 2055 0
+	bls	.L806
 	mov	r3, #512
-.L802:
-	.loc 2 2059 0
+.L822:
 	movs	r2, #8
 	movs	r1, #0
-	ldr	r0, .L803+16
-	.loc 2 2066 0
+	ldr	r0, .L823+16
 	movs	r6, #0
-	.loc 2 2057 0
 	str	r3, [r7]
-	.loc 2 2059 0
 	bl	ftl_memset
-.LVL796:
-	.loc 2 2060 0
 	movs	r2, #32
 	movs	r1, #0
-	ldr	r0, .L803+20
+	ldr	r0, .L823+20
 	bl	ftl_memset
-.LVL797:
-	.loc 2 2061 0
 	movs	r2, #128
 	movs	r1, #0
-	ldr	r0, .L803+24
+	ldr	r0, .L823+24
 	bl	ftl_memset
-.LVL798:
-	.loc 2 2067 0
-	ldr	r3, .L803+28
-	ldr	r10, .L803+36
-	ldr	r4, [r3]
-	.loc 2 2069 0
-	ldr	r3, .L803+16
-	.loc 2 2067 0
-	add	r8, r4, #1
-.LVL799:
-.L790:
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	add	r1, r10, r6, lsl #3
+	ldr	r3, .L823+28
+	ldr	fp, .L823+36
+	ldr	r5, [r3]
+	ldr	r3, .L823+16
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	add	r8, r5, #1
+.L810:
+	mov	r2, r10
+	add	r1, fp, r6, lsl #3
 	mov	r0, r8
 	str	r3, [sp, #4]
-.LVL800:
 	bl	FlashMemCmp8
-.LVL801:
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L789
-	.loc 2 2068 0
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	ldr	r1, .L803+20
-	.loc 2 2069 0
+	cbnz	r0, .L809
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	ldr	r1, .L823+20
 	strb	r6, [r3, r2]
-	.loc 2 2068 0
 	str	r0, [r1, r2, lsl #2]
-	.loc 2 2069 0
 	adds	r1, r2, #1
-	strb	r1, [r5]
-.L789:
-	.loc 2 2066 0 discriminator 2
+	strb	r1, [r4]
+.L809:
 	adds	r6, r6, #1
-.LVL802:
 	cmp	r6, #4
-	bne	.L790
-	.loc 2 2076 0
-	ldrb	r3, [r5]	@ zero_extendqisi2
-	strb	r3, [fp]
-	.loc 2 2077 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	bne	.L810
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r2, [sp]
+	strb	r3, [r2]
+	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L791
-.L795:
-	.loc 2 2087 0
-	ldrh	r2, [r4, #14]
-	ldrb	r3, [r5]	@ zero_extendqisi2
+	beq	.L811
+.L815:
+	ldrh	r2, [r5, #14]
+	ldrb	r3, [r4]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L803+32
+	ldr	r2, .L823+32
 	strh	r3, [r2]	@ movhi
-	.loc 2 2088 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL803:
-.L786:
-	.cfi_restore_state
-	.loc 2 2056 0
+.L806:
 	cmp	r3, #128
-	.loc 2 2057 0
 	it	hi
 	movhi	r3, #256
-	b	.L802
-.LVL804:
-.L791:
-	.loc 2 2080 0
-	ldr	r10, [r7]
+	b	.L822
+.L811:
+	ldr	fp, [r7]
 	movs	r6, #0
-.LVL805:
-	ldr	r7, .L803+20
-	.loc 2 2083 0
-	ldr	fp, .L803+16
-.L794:
-.LVL806:
-	.loc 2 2079 0
-	ldr	r3, .L803+36
+	ldr	r7, .L823+20
+	ldr	r3, .L823+16
+.L814:
+	str	r3, [sp]
+	mov	r2, r10
+	ldr	r3, .L823+36
 	mov	r0, r8
-	ldrb	r2, [r4]	@ zero_extendqisi2
 	add	r1, r3, r6, lsl #3
 	bl	FlashMemCmp8
-.LVL807:
-	cbnz	r0, .L792
-	.loc 2 2080 0
-	ldrh	r3, [r4, #14]
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	and	r1, r3, #65280
-	ldrb	r3, [r4, #13]	@ zero_extendqisi2
-	mul	r3, r10, r3
-	muls	r3, r1, r3
-	str	r3, [r7, r2, lsl #2]
-	.loc 2 2081 0
-	ldrb	r1, [r4, #23]	@ zero_extendqisi2
-	cbz	r1, .L793
-	.loc 2 2082 0
-	lsls	r3, r3, #1
-	str	r3, [r7, r2, lsl #2]
-.L793:
-	.loc 2 2083 0
-	adds	r3, r2, #1
-	strb	r6, [fp, r2]
-	strb	r3, [r5]
-.L792:
-	.loc 2 2078 0 discriminator 2
+	ldr	r3, [sp]
+	cbnz	r0, .L812
+	ldrh	r2, [r5, #14]
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	and	r0, r2, #65280
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	mul	r2, fp, r2
+	muls	r2, r0, r2
+	str	r2, [r7, r1, lsl #2]
+	ldrb	r0, [r5, #23]	@ zero_extendqisi2
+	cbz	r0, .L813
+	lsls	r2, r2, #1
+	str	r2, [r7, r1, lsl #2]
+.L813:
+	adds	r2, r1, #1
+	strb	r6, [r3, r1]
+	strb	r2, [r4]
+.L812:
 	adds	r6, r6, #1
-.LVL808:
 	cmp	r6, #4
-	bne	.L794
-	b	.L795
-.L804:
+	bne	.L814
+	b	.L815
+.L824:
 	.align	2
-.L803:
-	.word	.LANCHOR118
+.L823:
+	.word	.LANCHOR121
 	.word	.LANCHOR25
+	.word	.LANCHOR31
 	.word	.LANCHOR3
-	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR23
 	.word	.LANCHOR18
-	.word	.LANCHOR119
+	.word	.LANCHOR122
 	.word	.LANCHOR22
-	.cfi_endproc
-.LFE248:
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
@@ -9173,111 +5693,69 @@ FlashDieInfoInit:
 	.fpu softvfp
 	.type	ReadFlashInfo, %function
 ReadFlashInfo:
-.LFB266:
-	.loc 2 3343 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL809:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 3346 0
 	movs	r2, #11
 	movs	r1, #0
-	.loc 2 3343 0
 	mov	r4, r0
-.LVL810:
-	.loc 2 3360 0
-	movs	r5, #1
-	.loc 2 3346 0
 	bl	ftl_memset
-.LVL811:
-	.loc 2 3348 0
-	ldr	r1, .L808
-	ldr	r2, .L808+4
-	ldr	r3, [r1]
-	ldr	r2, [r2]
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	smulbb	r3, r3, r2
+	ldr	r3, .L828
 	movs	r2, #0
+	ldr	r1, [r3]
+	ldr	r3, .L828+4
+	ldrb	r0, [r1, #9]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	smulbb	r3, r3, r0
 	uxth	r3, r3
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	.loc 2 3349 0
-	ldr	r3, .L808+8
+	ldr	r3, .L828+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-.LBB297:
-.LBB298:
-	.loc 4 1826 0
-	ldr	r3, .L808+12
-	ldr	r3, [r3]
-.LBE298:
-.LBE297:
-	.loc 2 3351 0
-	ubfx	r0, r3, #8, #8
-	strb	r3, [r4]
-	strb	r0, [r4, #1]
-	ubfx	r0, r3, #16, #8
-	lsrs	r3, r3, #24
-	strb	r0, [r4, #2]
-	.loc 2 3360 0
-	ldr	r0, .L808+16
-	.loc 2 3351 0
+	ldr	r3, .L828+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	strb	r5, [r4]
+	ldrb	r5, [r3, #1]	@ zero_extendqisi2
+	strb	r5, [r4, #1]
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	strb	r0, [r4, #6]
+	strb	r5, [r4, #2]
+	movs	r5, #1
 	strb	r3, [r4, #3]
-	.loc 2 3355 0
-	ldr	r3, [r1]
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
-	strb	r1, [r4, #6]
-	.loc 2 3356 0
-	movs	r1, #32
-	strb	r1, [r4, #8]
-	.loc 2 3357 0
-	ldrb	r3, [r3, #7]	@ zero_extendqisi2
-	.loc 2 3358 0
+	movs	r3, #32
+	strb	r3, [r4, #8]
+	ldrb	r3, [r1, #7]	@ zero_extendqisi2
+	ldr	r0, .L828+16
 	strb	r2, [r4, #10]
-.LVL812:
-	.loc 2 3357 0
 	strb	r3, [r4, #9]
-	.loc 2 3359 0
-	ldr	r3, .L808+20
+	ldr	r3, .L828+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.LVL813:
-.L806:
-	.loc 2 3359 0 is_stmt 0 discriminator 1
+.L826:
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L807
-	.loc 2 3361 0 is_stmt 1
+	bhi	.L827
 	pop	{r4, r5, r6, pc}
-.LVL814:
-.L807:
-	.loc 2 3360 0 discriminator 3
+.L827:
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
-.LVL815:
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L806
-.L809:
+	b	.L826
+.L829:
 	.align	2
-.L808:
+.L828:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
-	.word	.LANCHOR32
-	.word	.LANCHOR68
+	.word	.LANCHOR33
+	.word	.LANCHOR69
 	.word	.LANCHOR26
 	.word	.LANCHOR25
-	.cfi_endproc
-.LFE266:
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
@@ -9288,92 +5766,58 @@ ReadFlashInfo:
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB319:
-	.loc 5 72 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL816:
-	.loc 5 74 0
-	ldr	r3, .L816
-	.loc 5 72 0
+	ldr	r3, .L836
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 5 72 0
 	mov	r5, r0
-	.loc 5 79 0
-	ldr	r7, .L816+4
-	.loc 5 72 0
+	ldr	r7, .L836+4
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
-	.loc 5 74 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL817:
-	.loc 5 79 0
-	ldr	r8, .L816+20
-	.loc 5 74 0
+	ldr	r8, .L836+20
 	mov	r0, r6
-.LVL818:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL819:
-.L813:
-	.loc 5 77 0
+.L833:
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L810
-	.loc 5 79 0
+	beq	.L830
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L812
-	.loc 5 79 0 is_stmt 0 discriminator 1
+	bhi	.L832
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L816+8
+	ldr	r0, .L836+8
 	bl	printf
-.LVL820:
-	ldr	r1, .L816+12
-	ldr	r0, .L816+16
+	ldr	r1, .L836+12
+	ldr	r0, .L836+16
 	bl	printf
-.LVL821:
-.L812:
-	.loc 5 80 0 is_stmt 1 discriminator 2
+.L832:
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
-	.loc 5 75 0 discriminator 2
 	cmp	r5, r4
-	.loc 5 80 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	lsl	r3, r2, r3
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	.loc 5 75 0 discriminator 2
-	bne	.L813
-.L810:
+	bne	.L833
+.L830:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL822:
-.L817:
+.L837:
 	.align	2
-.L816:
-	.word	.LANCHOR120
-	.word	.LANCHOR50
+.L836:
+	.word	.LANCHOR123
+	.word	.LANCHOR51
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR121
-	.cfi_endproc
-.LFE319:
+	.word	.LANCHOR124
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -9384,33 +5828,22 @@ FtlBbt2Bitmap:
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB322:
-	.loc 5 225 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 226 0
-	ldr	r0, .L819
+	ldr	r0, .L839
 	movw	r3, #65535
-	.loc 5 228 0
 	movs	r2, #16
 	movs	r1, #255
-	.loc 5 226 0
 	strh	r3, [r0]	@ movhi
-	.loc 5 227 0
 	movs	r3, #0
 	strh	r3, [r0, #6]	@ movhi
-	.loc 5 228 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL823:
-.L820:
+.L840:
 	.align	2
-.L819:
-	.word	.LANCHOR74
-	.cfi_endproc
-.LFE322:
+.L839:
+	.word	.LANCHOR75
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -9421,47 +5854,25 @@ FtlBbtMemInit:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB330:
-	.loc 1 76 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL824:
-	.loc 1 79 0
-	ldr	r3, .L822
-	.loc 1 83 0
+	ldr	r3, .L842
 	mov	r2, #2048
-	.loc 1 76 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 1 79 0
 	movs	r4, #0
-	.loc 1 83 0
 	mov	r1, r4
-	.loc 1 79 0
 	strh	r4, [r3, #2]	@ movhi
-	.loc 1 80 0
 	strh	r4, [r3, #4]	@ movhi
-	.loc 1 81 0
 	strh	r4, [r3, #6]	@ movhi
-	.loc 1 82 0
 	strh	r0, [r3], #8	@ movhi
-	.loc 1 83 0
 	mov	r0, r3
-.LVL825:
 	bl	ftl_memset
-.LVL826:
-	.loc 1 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L823:
+.L843:
 	.align	2
-.L822:
-	.word	.LANCHOR75
-	.cfi_endproc
-.LFE330:
+.L842:
+	.word	.LANCHOR76
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -9472,166 +5883,96 @@ FtlFreeSysBlkQueueInit:
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB346:
-	.loc 1 561 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL827:
+	ldrh	r2, [r0, #10]
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 561 0
 	mov	r4, r0
-	.loc 1 570 0
-	ldrh	r2, [r0, #10]
-	movs	r1, #0
-	.loc 1 564 0
 	ldr	r5, [r0, #20]
-	.loc 1 562 0
+	movs	r1, #0
 	ldr	r10, [r0, #12]
-.LVL828:
-	.loc 1 563 0
-	ldr	r6, [r0, #24]
-.LVL829:
-	.loc 1 570 0
 	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
 	mov	r0, r5
-.LVL830:
 	bl	ftl_memset
-.LVL831:
-	.loc 1 571 0
 	movs	r3, #0
-.LVL832:
-.L825:
-	.loc 1 571 0 is_stmt 0 discriminator 1
+.L845:
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L829
-	.loc 1 579 0 is_stmt 1
+	bhi	.L849
 	ldrh	r3, [r5]
-.LVL833:
-	.loc 1 582 0
 	movs	r6, #0
-.LVL834:
-	.loc 1 583 0
-	ldr	r2, .L838
-.LVL835:
-	.loc 1 580 0
+	ldr	r2, .L858
 	mov	fp, r6
-.LVL836:
-.L830:
-	.loc 1 582 0 discriminator 1
+.L850:
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL837:
 	cmp	r0, r1
-	bhi	.L834
-	.loc 1 598 0
+	bhi	.L854
 	mov	r0, fp
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL838:
-.L829:
-	.cfi_restore_state
-	.loc 1 572 0
+.L849:
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 1 573 0
 	movs	r2, #0
-	.loc 1 572 0
 	ubfx	r1, r1, #10, #16
-.LVL839:
-.L826:
-	.loc 1 573 0 discriminator 1
+.L846:
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L828
-.LVL840:
+	bhi	.L848
 	adds	r3, r3, #1
-.LVL841:
-	b	.L825
-.LVL842:
-.L828:
-	.loc 1 574 0
+	b	.L845
+.L848:
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL843:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
-	.loc 1 575 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL844:
-	b	.L826
-.LVL845:
-.L834:
-	.loc 1 583 0
+	b	.L846
+.L854:
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L831
-	.loc 1 583 0 is_stmt 0 discriminator 1
+	bne	.L851
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
-	.loc 1 584 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L831:
-	.loc 1 585 0
+.L851:
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL846:
-	.loc 1 589 0
 	cmp	r8, #0
-	bne	.L833
-	.loc 1 589 0 is_stmt 0 discriminator 1
+	bne	.L853
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L833
-	.loc 1 591 0 is_stmt 1
+	cbz	r0, .L853
 	movs	r1, #1
-.LVL847:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL848:
-	.loc 1 592 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
-	.loc 1 593 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL849:
-.L833:
+.L853:
 	adds	r6, r6, #1
-.LVL850:
-	b	.L830
-.L839:
+	b	.L850
+.L859:
 	.align	2
-.L838:
-	.word	.LANCHOR53
-	.cfi_endproc
-.LFE346:
+.L858:
+	.word	.LANCHOR54
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -9642,152 +5983,90 @@ ftl_free_no_use_map_blk:
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB368:
-	.loc 1 1796 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1798 0
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	ldr	r8, .L843+40
-	.loc 1 1802 0
-	mov	r10, #12
-	.loc 1 1798 0
-	ldr	r7, .L843
-	ldr	r2, [r8]
-	.loc 1 1799 0
-	ldr	r5, .L843+4
-	ldr	r4, .L843+8
-	.loc 1 1798 0
-	ldr	r0, [r7]
+	ldr	r5, .L863
+	ldr	r4, .L863+4
+	ldr	r2, [r5]
+	ldr	r7, .L863+8
+	ldr	r6, .L863+12
+	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	.loc 1 1799 0
-	ldr	r6, .L843+12
-	.loc 1 1798 0
+	ldr	r8, .L863+44
 	bl	ftl_memset
-.LVL851:
-	.loc 1 1799 0
-	ldrh	r3, [r5]
+	ldrh	r3, [r7]
 	movs	r1, #255
-	ldrh	r2, [r4]
-	ldr	r0, [r6]
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL852:
-	.loc 1 1802 0
-	ldr	ip, .L843+44
-	.loc 1 1800 0
+	ldr	r3, .L863+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
 	movs	r3, #0
-	movw	r1, #65535
-	str	r7, [sp, #4]
-.LVL853:
-.L841:
-	.loc 1 1800 0 is_stmt 0 discriminator 1
-	ldrh	r7, [r4]
-	uxth	r2, r3
-	add	lr, r3, #1
-	cmp	r7, r2
-	bhi	.L842
-	.loc 1 1806 0 is_stmt 1
-	ldr	r3, .L843+16
-.LVL854:
-	.loc 1 1808 0
-	ldr	r2, [r8]
-.LVL855:
-	.loc 1 1806 0
-	strh	r1, [r3, #2]	@ movhi
-	.loc 1 1808 0
+	mov	lr, r3
+.L861:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L862
+	ldr	r3, .L863+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
-	.loc 1 1809 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	.loc 1 1810 0
-	ldr	r2, .L843+20
-	.loc 1 1807 0
-	strh	r1, [r3]	@ movhi
-	.loc 1 1816 0
-	strh	r1, [r3, #40]	@ movhi
-	.loc 1 1810 0
+	ldr	r2, .L863+24
+	strh	r0, [r3]	@ movhi
+	strh	r0, [r3, #40]	@ movhi
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	.loc 1 1811 0
-	ldr	r2, .L843+24
+	ldr	r2, .L863+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	.loc 1 1812 0
-	ldr	r2, .L843+28
+	ldr	r2, .L863+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	.loc 1 1813 0
-	ldr	r2, .L843+32
+	ldr	r2, .L863+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	.loc 1 1814 0
-	ldr	r2, [sp, #4]
-	ldr	r2, [r2]
+	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	.loc 1 1815 0
-	ldr	r2, .L843+36
+	ldr	r2, .L863+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
-	.loc 1 1817 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL856:
-.L842:
-	.cfi_restore_state
-	.loc 1 1802 0 discriminator 3
-	uxth	r3, r3
-	ldr	r7, [ip]
-	movs	r0, #0
-	mul	r2, r10, r3
-	add	fp, r7, r2
-	str	r0, [fp, #4]
-	.loc 1 1803 0 discriminator 3
-	strh	r1, [r7, r2]	@ movhi
-	.loc 1 1804 0 discriminator 3
-	ldr	r7, [ip]
-	add	r2, r2, r7
-	ldrh	r7, [r5]
-	muls	r3, r7, r3
-.LVL857:
-	ldr	r7, [r6]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L862:
 	bic	r3, r3, #3
-	add	r3, r3, r7
-	str	r3, [r2, #8]
-.LVL858:
-	mov	r3, lr
-	b	.L841
-.L844:
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L861
+.L864:
 	.align	2
-.L843:
-	.word	.LANCHOR122
-	.word	.LANCHOR57
-	.word	.LANCHOR67
-	.word	.LANCHOR123
-	.word	.LANCHOR124
+.L863:
+	.word	.LANCHOR65
 	.word	.LANCHOR125
-	.word	.LANCHOR66
-	.word	.LANCHOR126
+	.word	.LANCHOR58
+	.word	.LANCHOR68
+	.word	.LANCHOR97
 	.word	.LANCHOR127
 	.word	.LANCHOR128
-	.word	.LANCHOR64
-	.word	.LANCHOR96
-	.cfi_endproc
-.LFE368:
+	.word	.LANCHOR67
+	.word	.LANCHOR129
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR126
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -9798,112 +6077,75 @@ FtlL2PDataInit:
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB298:
-	.loc 4 614 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 4 617 0
 	movs	r4, #0
-	ldr	r3, .L846
-	.loc 4 618 0
+	ldr	r3, .L866
 	movw	r2, #65535
-	.loc 4 628 0
 	mov	r1, r4
-	.loc 4 629 0
-	ldr	r5, .L846+4
-	.loc 4 617 0
+	ldr	r5, .L866+4
 	str	r4, [r3]
-	.loc 4 618 0
-	ldr	r3, .L846+8
+	ldr	r3, .L866+8
 	strh	r2, [r3]	@ movhi
-	.loc 4 621 0
 	mov	r2, #-1
-	.loc 4 619 0
-	ldr	r3, .L846+12
+	ldr	r3, .L866+12
 	str	r4, [r3]
-	.loc 4 620 0
-	ldr	r3, .L846+16
+	ldr	r3, .L866+16
 	str	r4, [r3]
-	.loc 4 621 0
-	ldr	r3, .L846+20
+	ldr	r3, .L866+20
 	str	r2, [r3]
-	.loc 4 625 0
-	ldr	r3, .L846+24
+	ldr	r3, .L866+24
 	str	r4, [r3]
-	.loc 4 627 0
-	ldr	r3, .L846+28
+	ldr	r3, .L866+28
 	strh	r4, [r3]	@ movhi
-	.loc 4 628 0
-	ldr	r3, .L846+32
+	ldr	r3, .L866+32
 	ldrh	r2, [r3]
-	ldr	r3, .L846+36
+	ldr	r3, .L866+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL859:
-	.loc 4 629 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L846+40
+	ldr	r3, .L866+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL860:
-	.loc 4 630 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L846+44
+	ldr	r3, .L866+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL861:
-	.loc 4 631 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L846+48
+	ldr	r0, .L866+48
 	bl	ftl_memset
-.LVL862:
-	.loc 4 632 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L846+52
+	ldr	r0, .L866+52
 	bl	ftl_memset
-.LVL863:
-	.loc 4 633 0
 	bl	FtlGcBufInit
-.LVL864:
-	.loc 4 634 0
 	bl	FtlL2PDataInit
-.LVL865:
-	.loc 4 636 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L847:
+.L867:
 	.align	2
-.L846:
-	.word	.LANCHOR129
-	.word	.LANCHOR40
-	.word	.LANCHOR130
-	.word	.LANCHOR131
+.L866:
 	.word	.LANCHOR132
+	.word	.LANCHOR41
 	.word	.LANCHOR133
-	.word	.LANCHOR28
-	.word	.LANCHOR70
-	.word	.LANCHOR61
-	.word	.LANCHOR71
-	.word	.LANCHOR78
 	.word	.LANCHOR134
-	.word	.LANCHOR80
 	.word	.LANCHOR135
-	.cfi_endproc
-.LFE298:
+	.word	.LANCHOR136
+	.word	.LANCHOR28
+	.word	.LANCHOR71
+	.word	.LANCHOR62
+	.word	.LANCHOR72
+	.word	.LANCHOR79
+	.word	.LANCHOR137
+	.word	.LANCHOR81
+	.word	.LANCHOR138
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -9914,258 +6156,161 @@ FtlVariablesInit:
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB376:
-	.loc 1 2360 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 1 2364 0
-	ldr	r3, .L859
+	ldr	r3, .L879
 	movs	r2, #6
-	.loc 1 2360 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 2364 0
 	movs	r1, #0
-	ldr	r6, .L859+4
-	.loc 1 2360 0
+	ldr	r6, .L879+4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 1 2365 0
 	movs	r4, #0
-	.loc 1 2364 0
 	ldrh	r3, [r3]
-	.loc 1 2371 0
 	mov	r8, r4
-	.loc 1 2364 0
 	ldr	r0, [r6]
-	.loc 1 2371 0
 	mov	r5, r4
 	mov	r10, r6
-	.loc 1 2364 0
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL866:
-	.loc 1 2365 0
-	ldr	r3, .L859+8
-	.loc 1 2368 0
-	ldr	r2, .L859+12
-	.loc 1 2370 0
-	ldr	r1, .L859+16
-	.loc 1 2365 0
+	ldr	r3, .L879+8
+	ldr	r2, .L879+12
+	ldr	r1, .L879+16
 	str	r4, [r3]
-	.loc 1 2366 0
-	ldr	r3, .L859+20
-	.loc 1 2368 0
+	ldr	r3, .L879+20
 	strh	r4, [r2]	@ movhi
-	.loc 1 2370 0
 	strh	r4, [r1]	@ movhi
-.LVL867:
-	.loc 1 2366 0
 	str	r4, [r3]
-	.loc 1 2367 0
-	ldr	r3, .L859+24
+	ldr	r3, .L879+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	.loc 1 2369 0
-	ldr	r3, .L859+28
+	ldr	r3, .L879+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL868:
-.L849:
-	.loc 1 2373 0 discriminator 1
-	ldr	r3, .L859+32
+.L869:
+	ldr	r3, .L879+32
 	sxth	r7, r4
-.LVL869:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L856
-	.loc 1 2375 0
-	ldr	r3, .L859+36
-	.loc 1 2376 0
+	bge	.L876
+	ldr	r3, .L879+36
 	uxth	r1, r4
 	str	r1, [sp, #12]
-	.loc 1 2375 0
 	ldrh	r2, [r3]
-	.loc 1 2378 0
-	ldr	r3, .L859+40
+	ldr	r3, .L879+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L857
-.LVL870:
-.L851:
+	b	.L877
+.L871:
 	str	r3, [sp, #20]
-	.loc 1 2376 0
-	ldr	r3, .L859+44
-.LVL871:
+	ldr	r3, .L879+44
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
-.LVL872:
 	bl	V2P_block
-.LVL873:
-	.loc 1 2377 0
 	bl	FtlBbmIsBadBlock
-.LVL874:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L850
-	.loc 1 2378 0
+	cbnz	r0, .L870
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
-.LVL875:
 	sxth	r6, r6
-.LVL876:
-.L850:
+.L870:
 	adds	r3, r3, #1
-.LVL877:
-.L857:
-	.loc 1 2375 0 discriminator 1
+.L877:
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L851
+	blt	.L871
 	lsls	r3, r7, #1
-.LVL878:
-	.loc 1 2380 0
-	cbz	r6, .L852
-	.loc 1 2381 0
+	cbz	r6, .L872
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
-.LVL879:
 	bl	__aeabi_idiv
-.LVL880:
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.LVL881:
-.L853:
-	.loc 1 2385 0
+.L873:
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	.loc 1 2387 0
-	ldr	r3, .L859+48
-	.loc 1 2385 0
+	ldr	r3, .L879+48
 	strh	r6, [r2, #4]	@ movhi
-	.loc 1 2387 0
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L854
-	.loc 1 2388 0 discriminator 1
-	ldr	r3, .L859+52
+	beq	.L874
+	ldr	r3, .L879+52
 	ldrh	r3, [r3]
-	.loc 1 2387 0 discriminator 1
 	cmp	r7, r3
-	beq	.L854
-	.loc 1 2389 0
-	ldr	r3, .L859+56
+	beq	.L874
+	ldr	r3, .L879+56
 	ldrh	r3, [r3]
-	.loc 1 2388 0
 	cmp	r7, r3
-	beq	.L854
-	.loc 1 2391 0
-	ldr	r3, .L859+60
+	beq	.L874
+	ldr	r3, .L879+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L855
-	.loc 1 2392 0
+	cbnz	r3, .L875
 	add	r8, r8, #1
-.LVL882:
 	uxth	r8, r8
-.LVL883:
-	.loc 1 2393 0
 	bl	INSERT_FREE_LIST
-.LVL884:
-.L854:
+.L874:
 	adds	r4, r4, #1
-.LVL885:
-	b	.L849
-.LVL886:
-.L852:
-	.loc 1 2383 0
-	ldr	r2, .L859+60
+	b	.L869
+.L872:
+	ldr	r2, .L879+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L853
-.LVL887:
-.L855:
-	.loc 1 2395 0
+	b	.L873
+.L875:
 	adds	r5, r5, #1
-.LVL888:
 	uxth	r5, r5
-.LVL889:
-	.loc 1 2396 0
 	bl	INSERT_DATA_LIST
-.LVL890:
-	b	.L854
-.LVL891:
-.L856:
-	.loc 1 2400 0
+	b	.L874
+.L876:
 	ldr	r2, [sp, #8]
-	.loc 1 2401 0
 	strh	r8, [fp]	@ movhi
-	.loc 1 2400 0
 	strh	r5, [r2]	@ movhi
-	.loc 1 2405 0
 	add	r5, r5, r8
-.LVL892:
 	cmp	r3, r5
-	bge	.L858
-	.loc 1 2405 0 is_stmt 0 discriminator 1
-	ldr	r1, .L859+64
-	movw	r2, #2405
-	ldr	r0, .L859+68
+	bge	.L878
+	ldr	r1, .L879+64
+	movw	r2, #2683
+	ldr	r0, .L879+68
 	bl	printf
-.LVL893:
-	ldr	r1, .L859+72
-	ldr	r0, .L859+76
+	ldr	r1, .L879+72
+	ldr	r0, .L879+76
 	bl	printf
-.LVL894:
-.L858:
-	.loc 1 2407 0 is_stmt 1
+.L878:
 	movs	r0, #0
 	add	sp, sp, #24
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL895:
-.L860:
+.L880:
 	.align	2
-.L859:
-	.word	.LANCHOR40
-	.word	.LANCHOR81
-	.word	.LANCHOR87
-	.word	.LANCHOR85
-	.word	.LANCHOR136
+.L879:
+	.word	.LANCHOR41
 	.word	.LANCHOR82
-	.word	.LANCHOR84
 	.word	.LANCHOR88
-	.word	.LANCHOR39
-	.word	.LANCHOR37
-	.word	.LANCHOR52
-	.word	.LANCHOR46
-	.word	.LANCHOR91
+	.word	.LANCHOR86
+	.word	.LANCHOR139
+	.word	.LANCHOR83
+	.word	.LANCHOR85
+	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR38
+	.word	.LANCHOR53
+	.word	.LANCHOR47
 	.word	.LANCHOR92
 	.word	.LANCHOR93
-	.word	.LANCHOR83
-	.word	.LANCHOR137
+	.word	.LANCHOR94
+	.word	.LANCHOR84
+	.word	.LANCHOR140
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE376:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -10176,62 +6321,62 @@ SupperBlkListInit:
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB397:
-	.loc 6 218 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 6 219 0
-	ldr	r2, .L862
+	ldr	r2, .L882
 	movs	r3, #0
-	.loc 6 218 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 6 221 0
 	movs	r1, #255
-	ldr	r4, .L862+4
-	.loc 6 219 0
+	ldr	r4, .L882+4
 	strh	r3, [r2]	@ movhi
-	.loc 6 220 0
-	ldr	r2, .L862+8
+	ldr	r2, .L882+8
 	strh	r3, [r2]	@ movhi
-	.loc 6 221 0
 	ldrh	r2, [r4]
-	ldr	r3, .L862+12
+	ldr	r3, .L882+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL896:
-	.loc 6 222 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L862+16
+	ldr	r3, .L882+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL897:
-	.loc 6 224 0
 	pop	{r4, lr}
-	.cfi_restore 14
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 6 223 0
 	b	FtlGcBufInit
-.LVL898:
-.L863:
+.L883:
 	.align	2
-.L862:
-	.word	.LANCHOR109
-	.word	.LANCHOR54
-	.word	.LANCHOR111
-	.word	.LANCHOR108
+.L882:
 	.word	.LANCHOR110
-	.cfi_endproc
-.LFE397:
+	.word	.LANCHOR55
+	.word	.LANCHOR111
+	.word	.LANCHOR109
+	.word	.LANCHOR112
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.idb_init,"ax",%progbits
+	.align	1
+	.global	idb_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	idb_init, %function
+idb_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r2, #262144
+	movs	r1, #0
+	ldr	r0, .L885
+	bl	ftl_memset
+	movs	r0, #0
+	pop	{r3, pc}
+.L886:
+	.align	2
+.L885:
+	.word	idb_buf
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
 	.global	ftl_memcpy
@@ -10241,18 +6386,10 @@ FtlGcPageVarInit:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB481:
-	.loc 7 32 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL899:
-	.loc 7 33 0
 	b	memcpy
-.LVL900:
-	.cfi_endproc
-.LFE481:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FlashReadIdbData,"ax",%progbits
 	.align	1
@@ -10263,30 +6400,18 @@ ftl_memcpy:
 	.fpu softvfp
 	.type	FlashReadIdbData, %function
 FlashReadIdbData:
-.LFB250:
-	.loc 2 2139 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL901:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 2140 0
 	mov	r2, #2048
-	ldr	r1, .L866
+	ldr	r1, .L889
 	bl	ftl_memcpy
-.LVL902:
-	.loc 2 2142 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L867:
+.L890:
 	.align	2
-.L866:
-	.word	.LANCHOR138
-	.cfi_endproc
-.LFE250:
+.L889:
+	.word	.LANCHOR141
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
 	.align	1
@@ -10297,98 +6422,62 @@ FlashReadIdbData:
 	.fpu softvfp
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
-.LFB251:
-	.loc 2 2145 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL903:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 2149 0
 	movs	r6, #0
-	ldr	r7, .L876
-	.loc 2 2150 0
-	ldr	r5, .L876+4
-.LVL904:
-.L871:
+	ldr	r7, .L899
+	ldr	r5, .L899+4
+.L894:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
-.LVL905:
 	mov	r4, r0
-	cbnz	r0, .L869
-	.loc 2 2151 0
-	ldr	r5, .L876+8
-	.loc 2 2159 0
+	cbnz	r0, .L892
+	ldr	r5, .L899+8
 	mov	r3, r4
-	ldr	r2, .L876+12
-	.loc 2 2151 0
+	ldr	r2, .L899+12
 	add	r5, r5, r8
-.LVL906:
-	.loc 2 2159 0
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.LVL907:
-.L870:
+.L893:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L873
-	.loc 2 2158 0 discriminator 2
+	beq	.L896
 	adds	r3, r3, #1
-.LVL908:
 	cmp	r3, #4
-	bne	.L870
-.L873:
-	.loc 2 2162 0
+	bne	.L893
+.L896:
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L876+16
+	ldr	r0, .L899+16
 	bl	ftl_memcpy
-.LVL909:
-	.loc 2 2163 0
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L876+20
+	ldr	r0, .L899+20
 	bl	ftl_memcpy
-.LVL910:
-	.loc 2 2164 0
-	b	.L868
-.LVL911:
-.L869:
-	.loc 2 2149 0 discriminator 2
+	b	.L891
+.L892:
 	adds	r6, r6, #1
-.LVL912:
 	adds	r7, r7, #32
-	cmp	r6, #74
-	bne	.L871
-	.loc 2 2157 0
+	cmp	r6, #77
+	bne	.L894
 	mov	r4, #-1
-.LVL913:
-.L868:
-	.loc 2 2165 0
+.L891:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L877:
+.L900:
 	.align	2
-.L876:
-	.word	.LANCHOR139+1
+.L899:
+	.word	.LANCHOR142+1
 	.word	.LANCHOR22
-	.word	.LANCHOR139
-	.word	.LANCHOR140
+	.word	.LANCHOR142
+	.word	.LANCHOR143
 	.word	.LANCHOR7
-	.word	.LANCHOR30
-	.cfi_endproc
-.LFE251:
+	.word	.LANCHOR31
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -10399,36 +6488,19 @@ FlashLoadPhyInfoInRam:
 	.fpu softvfp
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
-.LFB482:
-	.loc 7 37 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL914:
-	.loc 7 40 0
 	movs	r3, #0
-	.loc 7 37 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-.LVL915:
-.L879:
-	.loc 7 40 0 discriminator 1
+.L902:
 	cmp	r3, r2
-	bne	.L880
-	.loc 7 43 0
+	bne	.L903
 	pop	{r4, pc}
-.L880:
-	.loc 7 41 0 discriminator 3
+.L903:
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
-	.loc 7 40 0 discriminator 3
 	adds	r3, r3, #1
-.LVL916:
-	b	.L879
-	.cfi_endproc
-.LFE482:
+	b	.L902
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -10439,134 +6511,70 @@ ftl_memcpy32:
 	.fpu softvfp
 	.type	NandcCopy1KB, %function
 NandcCopy1KB:
-.LFB291:
-	.loc 3 748 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL917:
-	.loc 3 759 0
 	cmp	r1, #1
-	.loc 3 748 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 3 748 0
 	mov	r4, r2
-.LVL918:
-	.loc 3 754 0
 	add	r2, r0, #4096
-.LVL919:
-	.loc 3 755 0
 	add	r6, r0, #512
-.LVL920:
-	.loc 3 757 0
 	add	r0, r2, r4, lsl #9
-.LVL921:
-	.loc 3 748 0
 	ldr	r5, [sp, #16]
-	.loc 3 759 0
-	bne	.L882
-	.loc 3 761 0
-	cbz	r3, .L883
-	.loc 3 762 0
+	bne	.L905
+	cbz	r3, .L906
 	lsls	r1, r3, #30
-.LVL922:
-	bne	.L884
-	.loc 3 763 0
+	bne	.L907
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.LVL923:
-.L883:
-	.loc 3 767 0
-	cbz	r5, .L881
-	.loc 3 769 0
+.L906:
+	cbz	r5, .L904
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	.loc 3 771 0
 	lsrs	r4, r4, #1
-.LVL924:
-	.loc 3 769 0
 	ldrb	r3, [r5]	@ zero_extendqisi2
-	.loc 3 771 0
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
-	.loc 3 769 0
 	orr	r3, r3, r2, lsl #8
 	ldrb	r2, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #16
 	ldrb	r2, [r5, #3]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #24
-.LVL925:
-	.loc 3 771 0
 	str	r3, [r6, r4]
-.LVL926:
 	pop	{r4, r5, r6, pc}
-.LVL927:
-.L884:
-	.loc 3 765 0
+.L907:
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-.LVL928:
-	b	.L883
-.LVL929:
-.L882:
-	.loc 3 776 0
-	cbz	r3, .L887
-	.loc 3 777 0
+	b	.L906
+.L905:
+	cbz	r3, .L910
 	lsls	r2, r3, #30
-	bne	.L888
-	.loc 3 778 0
+	bne	.L911
 	mov	r1, r0
-.LVL930:
 	mov	r2, #256
 	mov	r0, r3
-.LVL931:
 	bl	ftl_memcpy32
-.LVL932:
-.L887:
-	.loc 3 782 0
-	cbz	r5, .L881
-	.loc 3 784 0
+.L910:
+	cbz	r5, .L904
 	lsrs	r4, r4, #1
-.LVL933:
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
 	ldr	r3, [r6, r4]
-.LVL934:
-	.loc 3 785 0
 	strb	r3, [r5]
-	.loc 3 786 0
 	lsrs	r2, r3, #8
 	strb	r2, [r5, #1]
-	.loc 3 787 0
 	lsrs	r2, r3, #16
-	.loc 3 788 0
 	lsrs	r3, r3, #24
-.LVL935:
-	.loc 3 787 0
 	strb	r2, [r5, #2]
-	.loc 3 788 0
 	strb	r3, [r5, #3]
-.L881:
+.L904:
 	pop	{r4, r5, r6, pc}
-.LVL936:
-.L888:
-	.loc 3 780 0
+.L911:
 	mov	r1, r0
-.LVL937:
 	mov	r2, #1024
 	mov	r0, r3
-.LVL938:
 	bl	ftl_memcpy
-.LVL939:
-	b	.L887
-	.cfi_endproc
-.LFE291:
+	b	.L910
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -10577,60 +6585,26 @@ NandcCopy1KB:
 	.fpu softvfp
 	.type	NandcXferData, %function
 NandcXferData:
-.LFB292:
-	.loc 3 794 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL940:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r7, r3
-.LVL941:
-	.loc 3 801 0
-	ldr	r3, .L935
-.LVL942:
-	.loc 3 794 0
+	ldr	r3, .L958
 	sub	sp, sp, #96
-	.cfi_def_cfa_offset 128
-	.loc 3 794 0
 	mov	r6, r0
 	mov	r10, r2
 	str	r1, [sp, #12]
-	.loc 3 801 0
 	ldr	r5, [r3, r0, lsl #3]
-.LVL943:
-	.loc 3 804 0
 	lsls	r3, r7, #26
-	.loc 3 794 0
 	ldr	r4, [sp, #128]
-	.loc 3 804 0
-	bne	.L900
-	.loc 3 806 0
-	cbnz	r4, .L901
-.LVL944:
-	.loc 3 808 0
+	bne	.L923
+	cbnz	r4, .L924
 	add	r4, sp, #32
-.LVL945:
-	.loc 3 809 0
 	movs	r2, #64
-.LVL946:
 	movs	r1, #255
-.LVL947:
 	add	r0, sp, #32
-.LVL948:
 	bl	ftl_memset
-.LVL949:
-.L901:
-	.loc 3 811 0
+.L924:
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -10638,160 +6612,85 @@ NandcXferData:
 	str	r4, [sp, #4]
 	str	r7, [sp]
 	bl	NandcXferStart
-.LVL950:
-	.loc 3 812 0
 	mov	r0, r6
 	bl	NandcXferComp
-.LVL951:
-	.loc 3 813 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L925
-.LBB299:
-	.loc 3 817 0
-	ldr	r2, .L935+4
-	.loc 3 820 0
+	bne	.L948
+	ldr	r2, .L958+4
 	lsr	r0, r10, #1
-	.loc 3 822 0
-	ldr	ip, .L935+12
-	.loc 3 817 0
+	ldr	ip, .L958+12
 	ldr	r3, [r2]
 	cmp	r3, #25
-	.loc 3 820 0
 	ldr	r3, [sp, #12]
-	.loc 3 817 0
 	ite	cc
 	movcc	r7, #64
-.LVL952:
 	movcs	r7, #128
-.LVL953:
-	.loc 3 820 0
 	mov	r1, r3
-.LVL954:
-.L904:
-	.loc 3 820 0 is_stmt 0 discriminator 1
+.L927:
 	cmp	r1, r0
 	add	r4, r4, #4
-.LVL955:
 	add	r6, r7, r3
-	bcc	.L905
-.LBE299:
-.LBB300:
-	.loc 3 838 0 is_stmt 1
-	ldr	r3, .L935+8
-.LBE300:
-	.loc 3 829 0
+	bcc	.L928
+	ldr	r3, .L958+8
 	lsr	r4, r10, #2
-.LVL956:
 	ldr	r0, [r2]
-.LBB301:
-	.loc 3 838 0
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.LVL957:
-.L906:
-.LBE301:
-	.loc 3 829 0 discriminator 1
+.L929:
 	cmp	r2, r4
-	bcs	.L902
-	.loc 3 829 0 is_stmt 0 discriminator 3
-	cbnz	r0, .L912
-.LVL958:
-.L902:
-	.loc 3 851 0 is_stmt 1
+	bcs	.L925
+	cbnz	r0, .L935
+.L925:
 	movs	r3, #0
 	str	r3, [r5, #16]
-.LVL959:
-.L913:
-	.loc 3 901 0
-	ldr	r3, .L935+8
+.L936:
+	ldr	r3, .L958+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L899
-	.loc 3 901 0 is_stmt 0 discriminator 1
+	bls	.L922
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L899
-.LBB302:
-	.loc 3 904 0 is_stmt 1
+	cbnz	r3, .L922
 	ldr	r3, [r5]
-	.loc 3 905 0
 	and	r2, r3, #139264
 	cmp	r2, #139264
-.LVL960:
-	.loc 3 908 0
 	ittt	eq
 	moveq	r8, #-1
-	.loc 3 909 0
 	orreq	r3, r3, #131072
-.LVL961:
-	.loc 3 910 0
 	streq	r3, [r5]
-.LVL962:
-.L899:
-.LBE302:
-	.loc 3 923 0
+.L922:
 	mov	r0, r8
 	add	sp, sp, #96
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL963:
-.L905:
-	.cfi_restore_state
-.LBB303:
-	.loc 3 822 0 discriminator 3
+.L928:
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
-	.loc 3 820 0 discriminator 3
 	adds	r1, r1, #1
-.LVL964:
-	.loc 3 822 0 discriminator 3
 	ldr	r3, [r3, lr]
-.LVL965:
-	.loc 3 823 0 discriminator 3
 	strb	r3, [r4, #-4]
-.LVL966:
-	.loc 3 824 0 discriminator 3
 	lsr	lr, r3, #8
 	strb	lr, [r4, #-3]
-.LVL967:
-	.loc 3 825 0 discriminator 3
 	lsr	lr, r3, #16
-	.loc 3 826 0 discriminator 3
 	lsrs	r3, r3, #24
-.LVL968:
-	.loc 3 825 0 discriminator 3
 	strb	lr, [r4, #-2]
-.LVL969:
-	.loc 3 826 0 discriminator 3
 	strb	r3, [r4, #-1]
-	.loc 3 820 0 discriminator 3
 	mov	r3, r6
-	b	.L904
-.LVL970:
-.L912:
-.LBE303:
-	.loc 3 831 0
+	b	.L927
+.L935:
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
-	.loc 3 833 0
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L928
-	.loc 3 833 0 is_stmt 0 discriminator 1
+	bmi	.L951
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L928
-.LVL971:
-.LBB304:
-	.loc 3 838 0 is_stmt 1
+	bne	.L951
 	cmp	r1, #5
-	bls	.L908
-	.loc 3 840 0
+	bls	.L931
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -10812,29 +6711,18 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L934:
-	.loc 3 844 0 discriminator 2
+.L957:
 	orr	r3, r3, r6, lsl #5
-.L910:
-.LVL972:
-	.loc 3 846 0
+.L933:
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.LVL973:
-.L907:
-.LBE304:
-	.loc 3 829 0 discriminator 2
+.L930:
 	adds	r2, r2, #1
-.LVL974:
-	b	.L906
-.LVL975:
-.L908:
-.LBB305:
-	.loc 3 842 0
+	b	.L929
+.L931:
 	cmp	r1, #3
-	bls	.L910
-	.loc 3 844 0
+	bls	.L933
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -10855,55 +6743,38 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L934
-.LVL976:
-.L928:
-.LBE305:
-	.loc 3 834 0
+	b	.L957
+.L951:
 	mov	r8, #-1
-.LVL977:
-	b	.L907
-.LVL978:
-.L925:
-	.loc 3 795 0
+	b	.L930
+.L948:
 	mov	r8, #0
-	b	.L902
-.LVL979:
-.L900:
-	.loc 3 856 0
+	b	.L925
+.L923:
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L914
+	bne	.L937
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.LVL980:
-.L915:
-	.loc 3 858 0 discriminator 2
+.L938:
 	cmp	r8, r10
-	bcc	.L917
-	.loc 3 795 0
+	bcc	.L940
 	mov	r8, #0
-.LVL981:
-	b	.L913
-.LVL982:
-.L917:
-	.loc 3 860 0
+	b	.L936
+.L940:
 	and	fp, r8, #3
-	cbz	r7, .L930
+	cbz	r7, .L953
 	add	r3, r7, r8, lsl #9
-.L916:
-	.loc 3 860 0 is_stmt 0 discriminator 4
+.L939:
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
 	mov	r0, r5
 	bl	NandcCopy1KB
-.LVL983:
-	.loc 3 861 0 is_stmt 1 discriminator 4
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -10911,36 +6782,24 @@ NandcXferData:
 	str	r3, [sp]
 	mov	r0, r6
 	mov	r3, fp
-	.loc 3 858 0 discriminator 4
 	add	r8, r8, #2
-.LVL984:
-	.loc 3 861 0 discriminator 4
 	bl	NandcXferStart
-.LVL985:
-	.loc 3 862 0 discriminator 4
 	mov	r0, r6
 	bl	NandcXferComp
-.LVL986:
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L915
-.L930:
+	b	.L938
+.L953:
 	mov	r3, r7
-	b	.L916
-.LVL987:
-.L914:
-	.loc 3 867 0
+	b	.L939
+.L937:
 	mov	r8, #0
 	movs	r2, #2
-.LVL988:
 	mov	r3, r8
 	str	r8, [sp, #4]
 	str	r8, [sp]
 	mov	r1, r8
-.LVL989:
 	bl	NandcXferStart
-.LVL990:
-	.loc 3 868 0
 	mov	fp, r7
 	cmp	r4, r8
 	str	r4, [sp, #16]
@@ -10949,28 +6808,16 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.LVL991:
-.L918:
-	.loc 3 868 0 is_stmt 0 discriminator 2
+.L941:
 	cmp	r4, r10
-	bcs	.L913
-	.loc 3 871 0 is_stmt 1
+	bcs	.L936
 	mov	r0, r6
-	.loc 3 873 0
 	adds	r4, r4, #2
-.LVL992:
-	.loc 3 871 0
 	bl	NandcXferComp
-.LVL993:
-	.loc 3 872 0
 	ldr	r3, [r5, #32]
-	.loc 3 873 0
 	cmp	r10, r4
-	.loc 3 872 0
 	str	r3, [sp, #28]
-	.loc 3 873 0
-	bls	.L919
-	.loc 3 874 0
+	bls	.L942
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -10979,28 +6826,19 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.LVL994:
-.L919:
-	.loc 3 876 0
+.L942:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L931
-.LBB306:
-	.loc 3 885 0
+	bmi	.L954
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
 	ubfx	r2, r2, #27, #1
-.LVL995:
 	orr	r3, r3, r2, lsl #5
-	.loc 3 887 0
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.LVL996:
-.L920:
-.LBE306:
-	.loc 3 896 0
+.L943:
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -11013,27 +6851,21 @@ NandcXferData:
 	moveq	r3, #0
 	add	fp, fp, #1024
 	bl	NandcCopy1KB
-.LVL997:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L918
-.LVL998:
-.L931:
-	.loc 3 878 0
+	b	.L941
+.L954:
 	mov	r8, #-1
-.LVL999:
-	b	.L920
-.L936:
+	b	.L943
+.L959:
 	.align	2
-.L935:
+.L958:
 	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR33
+	.word	.LANCHOR32
 	.word	.LANCHOR34
-	.cfi_endproc
-.LFE292:
+	.word	.LANCHOR35
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
@@ -11044,96 +6876,53 @@ NandcXferData:
 	.fpu softvfp
 	.type	FlashReadRawPage, %function
 FlashReadRawPage:
-.LFB222:
-	.loc 2 491 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1000:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 491 0
 	mov	r8, r3
-	.loc 2 494 0
-	ldr	r3, .L939
-.LVL1001:
-	.loc 2 491 0
+	ldr	r3, .L962
 	mov	r6, r1
 	mov	r7, r2
-	.loc 2 497 0
 	mov	r4, r0
-	.loc 2 494 0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-.LVL1002:
-	.loc 2 497 0
-	cbnz	r0, .L938
-	.loc 2 497 0 is_stmt 0 discriminator 1
-	ldr	r3, .L939+4
-	ldr	r2, .L939+8
-.LVL1003:
+	cbnz	r0, .L961
+	ldr	r3, .L962+4
+	ldr	r2, .L962+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
-.LVL1004:
 	muls	r0, r3, r0
-	.loc 2 498 0 is_stmt 1 discriminator 1
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.LVL1005:
-.L938:
-	.loc 2 499 0
+.L961:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL1006:
-	.loc 2 500 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL1007:
-	.loc 2 501 0
 	mov	r1, r6
 	mov	r0, r4
 	bl	FlashReadCmd
-.LVL1008:
-	.loc 2 502 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL1009:
-	.loc 2 503 0
 	mov	r3, r7
 	mov	r2, r5
 	str	r8, [sp]
 	movs	r1, #0
 	mov	r0, r4
 	bl	NandcXferData
-.LVL1010:
 	mov	r1, r0
-.LVL1011:
-	.loc 2 513 0
 	mov	r0, r4
-.LVL1012:
 	bl	NandcFlashDeCs
-.LVL1013:
-	.loc 2 515 0
 	mov	r0, r1
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1014:
-.L940:
+.L963:
 	.align	2
-.L939:
-	.word	.LANCHOR30
+.L962:
+	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE222:
 	.size	FlashReadRawPage, .-FlashReadRawPage
 	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
@@ -11144,274 +6933,158 @@ FlashReadRawPage:
 	.fpu softvfp
 	.type	FlashDdrTunningRead, %function
 FlashDdrTunningRead:
-.LFB227:
-	.loc 2 685 0
-	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1015:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r7, r3
-	.loc 2 695 0
-	ldr	r3, .L966
-.LVL1016:
-	.loc 2 685 0
+	ldr	r3, .L989
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 685 0
 	str	r0, [sp, #8]
-	.loc 2 695 0
 	ldr	r3, [r3]
-	.loc 2 685 0
 	str	r1, [sp, #12]
 	str	r2, [sp, #4]
-	.loc 2 695 0
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-.LVL1017:
-	.loc 2 696 0
-	ldr	r3, .L966+4
-.LVL1018:
+	ldr	r3, .L989+4
 	ldr	r3, [r3]
-	.loc 2 697 0
 	cmp	r3, #8
-	.loc 2 698 0
 	ldr	r3, [sp, #56]
-	.loc 2 697 0
 	ite	cc
 	movcc	fp, #6
 	movcs	fp, #12
-.LVL1019:
-	.loc 2 698 0
 	cmp	r3, #0
-	beq	.L955
-	.loc 2 699 0
+	beq	.L978
 	movs	r0, #1
-.LVL1020:
-	.loc 2 703 0
-	ldr	r4, .L966+8
-	.loc 2 699 0
+	ldr	r4, .L989+8
 	bl	FlashSetInterfaceMode
-.LVL1021:
-	.loc 2 700 0
 	movs	r0, #1
 	bl	NandcSetMode
-.LVL1022:
-	.loc 2 701 0
 	ldr	r0, [sp, #8]
 	bl	FlashReset
-.LVL1023:
-	.loc 2 702 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
-.LVL1024:
 	mov	r6, r0
-.LVL1025:
-	.loc 2 703 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
-.LVL1026:
 	bl	FlashSetInterfaceMode
-.LVL1027:
-	.loc 2 704 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
-.LVL1028:
-	.loc 2 705 0
 	adds	r3, r6, #1
-	bne	.L944
-.LVL1029:
-.L953:
-	.loc 2 759 0
+	bne	.L967
+.L976:
 	mov	r6, #-1
-.L941:
-	.loc 2 778 0
+.L964:
 	mov	r0, r6
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1030:
-.L944:
-	.cfi_restore_state
-	.loc 2 708 0
+.L967:
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L966+12
+	ldr	r0, .L989+12
 	bl	printf
-.LVL1031:
-	.loc 2 722 0
-	ldr	r2, .L966+16
+	ldr	r2, .L989+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	.loc 2 723 0
 	cmp	r3, #2048
-	bcs	.L946
-	.loc 2 722 0
+	bcs	.L969
 	str	r3, [r2]
-	b	.L941
-.L946:
-	.loc 2 726 0
+	b	.L964
+.L969:
 	movs	r7, #0
 	str	r7, [r2]
-.LVL1032:
-	.loc 2 709 0
 	str	r7, [sp, #4]
-.LVL1033:
-.L943:
+.L966:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.LVL1034:
-.L951:
-	.loc 2 731 0
+.L974:
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
-.LVL1035:
-	.loc 2 732 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
-.LVL1036:
-	.loc 2 734 0
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L947
-.LVL1037:
-	.loc 2 740 0
+	bhi	.L970
 	cmp	r0, #2
-	bhi	.L957
-	.loc 2 741 0
+	bhi	.L980
 	adds	r4, r4, #1
-.LVL1038:
-	.loc 2 742 0
 	cmp	r4, #9
-	bls	.L957
-.LVL1039:
-	.loc 2 744 0
+	bls	.L980
 	mov	r3, r5
-	.loc 2 732 0
 	mov	r6, r0
-	.loc 2 743 0
 	sub	r5, fp, r4
-.LVL1040:
-	.loc 2 737 0
 	mov	r8, #0
-.LVL1041:
-.L949:
-	.loc 2 759 0
+.L972:
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.LVL1042:
-.L950:
-	.loc 2 762 0
-	cbz	r5, .L952
-	.loc 2 763 0
+.L973:
+	cbz	r5, .L975
 	mov	r1, r5
-	ldr	r0, .L966+20
-.LVL1043:
+	ldr	r0, .L989+20
 	bl	printf
-.LVL1044:
-	.loc 2 764 0
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.LVL1045:
-.L952:
-	.loc 2 767 0
+.L975:
 	cmp	r8, #0
-	beq	.L941
-	.loc 2 768 0
+	beq	.L964
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L966+24
+	ldr	r0, .L989+24
 	bl	printf
-.LVL1046:
-	.loc 2 769 0
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L953
-	.loc 2 771 0
+	beq	.L976
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-.LVL1047:
-	b	.L941
-.LVL1048:
-.L955:
-	.loc 2 688 0
+	b	.L964
+.L978:
 	mov	r6, #1024
-	b	.L943
-.LVL1049:
-.L947:
-	.loc 2 748 0
+	b	.L966
+.L970:
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L958
-.LVL1050:
-	.loc 2 751 0
+	bls	.L981
 	cmp	r4, #7
-	.loc 2 750 0
 	sub	r5, r10, r4
-.LVL1051:
-	.loc 2 751 0
-	bhi	.L950
+	bhi	.L973
 	str	r4, [sp, #16]
-.LVL1052:
-.L958:
-	.loc 2 754 0
+.L981:
 	movs	r4, #0
-.LVL1053:
-	b	.L948
-.LVL1054:
-.L957:
-	.loc 2 737 0
+	b	.L971
+.L980:
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
-	.loc 2 736 0
 	mov	r7, r8
-	.loc 2 735 0
 	str	r8, [sp, #4]
-.LVL1055:
-.L948:
-	.loc 2 730 0 discriminator 2
+.L971:
 	add	fp, fp, #2
-.LVL1056:
 	cmp	fp, #69
-	bls	.L951
+	bls	.L974
 	mov	r3, r5
 	mov	r5, r10
-	b	.L949
-.L967:
+	b	.L972
+.L990:
 	.align	2
-.L966:
+.L989:
 	.word	.LANCHOR19
-	.word	.LANCHOR33
+	.word	.LANCHOR34
 	.word	.LANCHOR24
+	.word	.LC9
+	.word	.LANCHOR144
 	.word	.LC10
-	.word	.LANCHOR141
 	.word	.LC11
-	.word	.LC12
-	.cfi_endproc
-.LFE227:
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
@@ -11422,189 +7095,107 @@ FlashDdrTunningRead:
 	.fpu softvfp
 	.type	FlashReadPage, %function
 FlashReadPage:
-.LFB223:
-	.loc 2 518 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1057:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 518 0
 	mov	r7, r2
 	mov	r5, r0
 	mov	r6, r1
 	mov	r8, r3
-	.loc 2 519 0
 	bl	FlashReadRawPage
-.LVL1058:
-	.loc 2 522 0
 	adds	r2, r0, #1
-	.loc 2 519 0
 	mov	r4, r0
-.LVL1059:
-	.loc 2 522 0
-	bne	.L969
-	.loc 2 522 0 is_stmt 0 discriminator 1
-	ldr	r10, .L987+20
+	bne	.L992
+	ldr	r10, .L1010+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L970
-.L972:
-.LVL1060:
-	.loc 2 529 0 is_stmt 1
-	ldr	r3, .L987
+	bne	.L993
+.L995:
+	ldr	r3, .L1010
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L969
-.LBB307:
-	.loc 2 530 0
-	ldr	r3, .L987+4
-	.loc 2 531 0
+	cbz	r3, .L992
+	ldr	r3, .L1010+4
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
-	.loc 2 530 0
 	ldr	r3, [r3]
 	ldr	r10, [r3, #304]
-.LVL1061:
-	.loc 2 531 0
 	movs	r3, #1
 	str	r3, [sp]
 	mov	r3, r8
 	bl	FlashDdrTunningRead
-.LVL1062:
-	.loc 2 532 0
 	adds	r1, r0, #1
-	.loc 2 531 0
 	mov	r4, r0
-.LVL1063:
-	.loc 2 532 0
-	beq	.L973
-	.loc 2 532 0 is_stmt 0 discriminator 1
-	ldr	r3, .L987+8
+	beq	.L996
+	ldr	r3, .L1010+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L969
-.L973:
-	.loc 2 533 0 is_stmt 1
+	bls	.L992
+.L996:
 	ubfx	r0, r10, #8, #8
-.LVL1064:
 	bl	NandcSetDdrPara
-.LVL1065:
-	b	.L969
-.LVL1066:
-.L970:
-.LBE307:
-.LBB308:
-	.loc 2 524 0
+	b	.L992
+.L993:
 	movs	r3, #0
-	.loc 2 525 0
 	mov	r2, r7
-	.loc 2 524 0
 	strb	r3, [r10]
-	.loc 2 525 0
 	mov	r1, r6
 	mov	r3, r8
 	mov	r0, r5
-.LVL1067:
 	bl	FlashReadRawPage
-.LVL1068:
-.LBE308:
-	.loc 2 529 0
 	adds	r3, r0, #1
-.LBB309:
-	.loc 2 526 0
 	strb	fp, [r10]
-.LBE309:
-	.loc 2 529 0
-	beq	.L972
-.LBB310:
+	beq	.L995
 	mov	r4, r0
-.LVL1069:
-.L969:
-.LBE310:
-	.loc 2 536 0
-	ldr	r10, .L987+24
+.L992:
+	ldr	r10, .L1010+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L968
-	.loc 2 536 0 is_stmt 0 discriminator 1
+	beq	.L991
 	adds	r2, r4, #1
-	bne	.L968
-	.loc 2 537 0 is_stmt 1
+	bne	.L991
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	fp
-.LVL1070:
-	.loc 2 538 0
 	mov	r3, r6
-	.loc 2 537 0
 	mov	r4, r0
-.LVL1071:
-	.loc 2 538 0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L987+12
-.LVL1072:
+	ldr	r0, .L1010+12
 	bl	printf
-.LVL1073:
-	.loc 2 539 0
 	adds	r3, r4, #1
-	bne	.L968
-	.loc 2 539 0 is_stmt 0 discriminator 1
-	ldr	r3, .L987+16
+	bne	.L991
+	ldr	r3, .L1010+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L968
-	.loc 2 540 0 is_stmt 1
+	cbz	r3, .L991
 	mov	r0, r5
 	bl	flash_enter_slc_mode
-.LVL1074:
-	.loc 2 541 0
 	ldr	r4, [r10]
-.LVL1075:
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	r4
-.LVL1076:
 	mov	r4, r0
-.LVL1077:
-	.loc 2 542 0
 	mov	r0, r5
-.LVL1078:
 	bl	flash_exit_slc_mode
-.LVL1079:
-.L968:
-	.loc 2 547 0
+.L991:
 	mov	r0, r4
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1080:
-.L988:
+.L1011:
 	.align	2
-.L987:
-	.word	.LANCHOR29
+.L1010:
+	.word	.LANCHOR30
 	.word	.LANCHOR19
-	.word	.LANCHOR32
-	.word	.LC13
+	.word	.LANCHOR33
+	.word	.LC12
 	.word	.LANCHOR8
 	.word	.LANCHOR5
-	.word	.LANCHOR142
-	.cfi_endproc
-.LFE223:
+	.word	.LANCHOR145
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
@@ -11615,110 +7206,57 @@ FlashReadPage:
 	.fpu softvfp
 	.type	FlashDdrParaScan, %function
 FlashDdrParaScan:
-.LFB228:
-	.loc 2 781 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1081:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 781 0
 	mov	r6, r0
-.LVL1082:
-	.loc 2 784 0
-	ldr	r4, .L1000
-	.loc 2 786 0
+	ldr	r4, .L1023
 	movs	r5, #0
-	.loc 2 781 0
 	mov	r7, r1
-	.loc 2 784 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
-.LVL1083:
 	bl	FlashSetInterfaceMode
-.LVL1084:
-	.loc 2 785 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
-.LVL1085:
-	.loc 2 786 0
 	mov	r3, r5
 	mov	r2, r5
 	str	r5, [sp]
 	mov	r1, r7
 	mov	r0, r6
 	bl	FlashDdrTunningRead
-.LVL1086:
-	.loc 2 787 0
 	mov	r3, r5
 	mov	r2, r5
-	.loc 2 786 0
 	mov	r8, r0
-.LVL1087:
-	.loc 2 787 0
 	mov	r1, r7
 	mov	r0, r6
-.LVL1088:
-	ldr	r5, .L1000+4
+	ldr	r5, .L1023+4
 	bl	FlashReadRawPage
-.LVL1089:
 	adds	r0, r0, #1
-	beq	.L990
-	.loc 2 789 0
+	beq	.L1013
 	cmp	r8, #-1
-	bne	.L991
-.L990:
-.LVL1090:
-	.loc 2 789 0 is_stmt 0 discriminator 1
+	bne	.L1014
+.L1013:
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L991
-.LVL1091:
-.LBB313:
-.LBB314:
-	.loc 2 790 0 is_stmt 1
+	bpl	.L1014
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
-.LVL1092:
-	.loc 2 791 0
 	movs	r0, #1
 	bl	NandcSetMode
-.LVL1093:
-	.loc 2 792 0
 	movs	r3, #0
-.LVL1094:
-.L999:
-.LBE314:
-.LBE313:
-	.loc 2 797 0
+.L1022:
 	movs	r0, #0
-	.loc 2 794 0
 	strb	r3, [r5]
-	.loc 2 797 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1095:
-.L991:
-	.cfi_restore_state
-	.loc 2 794 0
+.L1014:
 	movs	r3, #1
-	b	.L999
-.L1001:
+	b	.L1022
+.L1024:
 	.align	2
-.L1000:
+.L1023:
 	.word	.LANCHOR24
-	.word	.LANCHOR29
-	.cfi_endproc
-.LFE228:
+	.word	.LANCHOR30
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
@@ -11729,244 +7267,146 @@ FlashDdrParaScan:
 	.fpu softvfp
 	.type	FlashLoadPhyInfo, %function
 FlashLoadPhyInfo:
-.LFB230:
-	.loc 2 810 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1096:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 817 0
 	movs	r3, #60
-	.loc 2 810 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 824 0
-	ldr	fp, .L1017+8
-	.loc 2 827 0
+	ldr	fp, .L1040+8
 	movs	r4, #0
-	.loc 2 829 0
 	movs	r7, #4
-	.loc 2 817 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	.loc 2 826 0
-	ldr	r1, .L1017
-	.loc 2 829 0
+	ldr	r1, .L1040
 	mov	r0, r4
-	.loc 2 817 0
 	strb	r3, [sp, #23]
-	.loc 2 813 0
 	mov	r6, #-1
-	.loc 2 824 0
 	ldrh	r3, [fp, #10]
-	.loc 2 827 0
-	ldr	r8, .L1017+36
-	.loc 2 826 0
-	ldr	r5, .L1017+4
-	.loc 2 824 0
+	ldr	r8, .L1040+36
+	ldr	r5, .L1040+4
 	str	r3, [sp, #4]
-.LVL1097:
-	.loc 2 826 0
 	ldr	r3, [r1]
-.LVL1098:
-	.loc 2 827 0
 	str	r4, [r8]
-	.loc 2 826 0
 	str	r3, [r5]
-	.loc 2 829 0
 	bl	flash_enter_slc_mode
-.LVL1099:
-	.loc 2 833 0
 	mov	r10, r1
 	str	r8, [sp, #12]
-.LVL1100:
-.L1003:
-	.loc 2 810 0
+.L1026:
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.LVL1101:
-.L1005:
-	.loc 2 832 0
+.L1028:
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
-.LVL1102:
-	.loc 2 833 0
 	movs	r3, #0
 	ldr	r2, [r10]
 	mov	r1, r4
 	mov	r0, r3
 	bl	FlashReadRawPage
-.LVL1103:
-	.loc 2 834 0
 	adds	r0, r0, #1
-.LVL1104:
-	bne	.L1004
-	.loc 2 835 0
+	bne	.L1027
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
-.LVL1105:
 	bl	FlashReadRawPage
-.LVL1106:
-	.loc 2 836 0
 	adds	r0, r0, #1
-.LVL1107:
-	bne	.L1004
-	.loc 2 831 0
+	bne	.L1027
 	add	r8, r8, #1
-.LVL1108:
 	cmp	r8, #4
-	bne	.L1005
-.LVL1109:
-.L1006:
+	bne	.L1028
+.L1029:
 	ldr	r3, [sp, #4]
-	.loc 2 830 0 discriminator 2
 	subs	r7, r7, #1
-.LVL1110:
 	add	r4, r4, r3
-	bne	.L1003
-	.loc 2 865 0
+	bne	.L1026
 	mov	r0, r7
-	b	.L1016
-.L1007:
-	.loc 2 850 0
+	b	.L1039
+.L1030:
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	JSHash
-.LVL1111:
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1013
-	.loc 2 851 0
+	bne	.L1036
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1017+8
+	ldr	r0, .L1040+8
 	bl	ftl_memcpy
-.LVL1112:
-	.loc 2 852 0
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1017+12
+	ldr	r0, .L1040+12
 	adds	r1, r1, #192
 	bl	ftl_memcpy
-.LVL1113:
-	.loc 2 853 0
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1017+16
+	ldr	r0, .L1040+16
 	adds	r1, r1, #224
 	bl	ftl_memcpy
-.LVL1114:
-	.loc 2 854 0
 	ldr	r6, [r5]
-.LVL1115:
-	.loc 2 857 0
 	mov	r0, r4
-	.loc 2 854 0
-	ldr	r3, .L1017+20
-	.loc 2 857 0
+	ldr	r3, .L1040+20
 	ldrh	r1, [fp, #10]
-	.loc 2 854 0
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
-	.loc 2 856 0
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
-	.loc 2 857 0
 	bl	__aeabi_uidiv
-.LVL1116:
-	ldr	r3, .L1017+24
-	.loc 2 858 0
+	ldr	r3, .L1040+24
 	adds	r2, r0, #1
-	cbz	r0, .L1009
-.L1015:
-	.loc 2 859 0
+	cbz	r0, .L1032
+.L1038:
 	str	r2, [r3]
-	.loc 2 860 0
 	ldrh	r2, [r6, #14]
-	.loc 2 861 0
 	movs	r6, #0
-	.loc 2 860 0
-	ldr	r3, .L1017+28
+	ldr	r3, .L1040+28
 	strb	r2, [r3]
-.LVL1117:
-	b	.L1006
-.LVL1118:
-.L1009:
-	.loc 2 859 0
+	b	.L1029
+.L1032:
 	movs	r2, #2
-	b	.L1015
-.LVL1119:
-.L1013:
+	b	.L1038
+.L1036:
 	mov	r6, #-1
-.LVL1120:
-	b	.L1006
-.LVL1121:
-.L1004:
-	.loc 2 844 0
+	b	.L1029
+.L1027:
 	ldr	r8, [r5]
-.LVL1122:
-	ldr	r2, .L1017+32
+	ldr	r2, .L1040+32
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1006
-	.loc 2 845 0
+	bne	.L1029
 	cmp	r6, #0
-	bne	.L1007
-	.loc 2 846 0
+	bne	.L1030
 	ldrh	r1, [fp, #10]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-.LVL1123:
-	ldr	r3, .L1017+24
+	ldr	r3, .L1040+24
 	adds	r0, r0, #1
 	str	r0, [r3]
-	.loc 2 847 0
 	mov	r0, r6
-.LVL1124:
-.L1016:
-	.loc 2 865 0
+.L1039:
 	bl	flash_exit_slc_mode
-.LVL1125:
-	.loc 2 867 0
 	mov	r0, r6
 	add	sp, sp, #24
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1126:
-.L1018:
+.L1041:
 	.align	2
-.L1017:
-	.word	.LANCHOR144
-	.word	.LANCHOR143
-	.word	.LANCHOR30
+.L1040:
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR29
-	.word	.LANCHOR146
-	.word	.LANCHOR147
+	.word	.LANCHOR30
+	.word	.LANCHOR149
+	.word	.LANCHOR150
 	.word	1312902724
-	.word	.LANCHOR145
-	.cfi_endproc
-.LFE230:
+	.word	.LANCHOR148
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
 	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
@@ -11977,288 +7417,168 @@ FlashLoadPhyInfo:
 	.fpu softvfp
 	.type	ToshibaReadRetrial, %function
 ToshibaReadRetrial:
-.LFB240:
-	.loc 2 1741 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1127:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 1741 0
 	mov	r6, r0
 	str	r2, [sp, #12]
 	mov	fp, r3
 	str	r1, [sp, #20]
-	.loc 2 1748 0
 	bl	NandcWaitFlashReady
-.LVL1128:
-.LBB315:
-.LBB316:
-	.loc 3 123 0
-	ldr	r3, .L1046
-.LBE316:
-.LBE315:
-	.loc 2 1751 0
-	ldr	r2, .L1046+4
-.LBB320:
-.LBB317:
-	.loc 3 123 0
+	ldr	r3, .L1069
+	ldr	r2, .L1069+4
 	ldr	r4, [r3, r6, lsl #3]
-.LVL1129:
-	.loc 3 124 0
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
 	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-.LBE317:
-.LBE320:
-	.loc 2 1751 0
 	ldrb	r3, [r2]	@ zero_extendqisi2
-.LBB321:
-.LBB318:
-	.loc 3 126 0
 	add	r5, r7, #8
-.LBE318:
-.LBE321:
-	.loc 2 1751 0
 	subs	r3, r3, #67
-.LBB322:
-.LBB319:
-	.loc 3 126 0
 	add	r5, r4, r5, lsl #8
-.LVL1130:
-.LBE319:
-.LBE322:
-	.loc 2 1751 0
 	cmp	r3, #1
-	bls	.L1036
-	.loc 2 1753 0
-	ldr	r3, .L1046+8
+	bls	.L1059
+	ldr	r3, .L1069+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1037
-.LVL1131:
-	.loc 2 1755 0
+	cbz	r3, .L1060
 	movs	r0, #0
 	bl	NandcSetDdrMode
-.LVL1132:
-	.loc 2 1754 0
 	movs	r3, #1
-.LVL1133:
-.L1037:
-	.loc 2 1744 0
+.L1060:
 	str	r3, [sp, #8]
-.LVL1134:
-	.loc 2 1757 0
 	add	r3, r4, r7, lsl #8
-.LVL1135:
 	movs	r2, #92
 	str	r2, [r3, #2056]
-	.loc 2 1758 0
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.LVL1136:
-.L1020:
-	.loc 2 1760 0
+.L1043:
 	mov	r8, #1
-	.loc 2 1743 0
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.LVL1137:
-.L1022:
-	.loc 2 1760 0 discriminator 1
-	ldr	r3, .L1046+12
+.L1045:
+	ldr	r3, .L1069+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1031
+	bcc	.L1054
 	ldr	r10, [sp, #4]
-.LVL1138:
-.L1030:
-	.loc 2 1791 0
+.L1053:
 	ldr	r3, [sp, #16]
-	.loc 2 1792 0
 	movs	r1, #0
 	mov	r0, r5
-	.loc 2 1791 0
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1032
-	.loc 2 1792 0
+	bhi	.L1055
 	bl	SandiskSetRRPara
-.LVL1139:
-.L1033:
-	.loc 2 1795 0
+.L1056:
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	.loc 2 1798 0
-	ldr	r2, .L1046+16
+	ldr	r2, .L1069+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1034
-	.loc 2 1799 0 discriminator 1
+	bcc	.L1057
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.LVL1140:
-.L1034:
-	.loc 2 1800 0
+.L1057:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
-.LVL1141:
-	.loc 2 1801 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1019
-	.loc 2 1802 0
+	cbz	r3, .L1042
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.LVL1142:
-.L1019:
-	.loc 2 1804 0
+.L1042:
 	mov	r0, r10
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1143:
-.L1036:
-	.cfi_restore_state
-	.loc 2 1744 0
+.L1059:
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1020
-.LVL1144:
-.L1031:
-	.loc 2 1761 0
+	b	.L1043
+.L1054:
 	ldr	r3, [sp, #16]
-	.loc 2 1762 0
 	mov	r0, r5
 	uxtb	r1, r8
-	.loc 2 1761 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1023
-	.loc 2 1762 0
+	bhi	.L1046
 	bl	SandiskSetRRPara
-.LVL1145:
-.L1024:
-	.loc 2 1765 0
+.L1047:
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1025
-	.loc 2 1765 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1046+12
+	bne	.L1048
+	ldr	r3, .L1069+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
-	.loc 2 1766 0 is_stmt 1 discriminator 1
 	ittt	eq
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1025:
-	.loc 2 1768 0
+.L1048:
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
-	.loc 2 1769 0
 	movs	r2, #93
 	str	r2, [r3, #2056]
-	.loc 2 1771 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1026
-	.loc 2 1772 0
+	cbz	r3, .L1049
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.LVL1146:
-	.loc 2 1773 0
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
-.LVL1147:
 	mov	r10, r0
-.LVL1148:
-	.loc 2 1774 0
 	movs	r0, #0
-.LVL1149:
 	bl	NandcSetDdrMode
-.LVL1150:
-.L1027:
-	.loc 2 1780 0
+.L1050:
 	cmp	r10, #-1
-	beq	.L1028
-	.loc 2 1785 0
-	ldr	r2, .L1046+16
+	beq	.L1051
+	ldr	r2, .L1069+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
 	it	eq
 	moveq	r3, r10
 	str	r3, [sp, #4]
-.LVL1151:
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1030
-	.loc 2 1784 0
+	bcc	.L1053
 	mov	fp, #0
-	.loc 2 1783 0
 	str	fp, [sp, #12]
-.LVL1152:
-.L1028:
-	.loc 2 1760 0 discriminator 2
+.L1051:
 	add	r8, r8, #1
-.LVL1153:
-	b	.L1022
-.LVL1154:
-.L1023:
-	.loc 2 1764 0
+	b	.L1045
+.L1046:
 	bl	ToshibaSetRRPara
-.LVL1155:
-	b	.L1024
-.L1026:
-	.loc 2 1776 0
+	b	.L1047
+.L1049:
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
-.LVL1156:
 	mov	r10, r0
-.LVL1157:
-	b	.L1027
-.LVL1158:
-.L1032:
-	.loc 2 1794 0
+	b	.L1050
+.L1055:
 	bl	ToshibaSetRRPara
-.LVL1159:
-	b	.L1033
-.L1047:
+	b	.L1056
+.L1070:
 	.align	2
-.L1046:
+.L1069:
 	.word	.LANCHOR6
 	.word	.LANCHOR10
-	.word	.LANCHOR29
-	.word	.LANCHOR148
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE240:
+	.word	.LANCHOR30
+	.word	.LANCHOR151
+	.word	.LANCHOR33
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
@@ -12269,132 +7589,76 @@ ToshibaReadRetrial:
 	.fpu softvfp
 	.type	SamsungReadRetrial, %function
 SamsungReadRetrial:
-.LFB242:
-	.loc 2 1820 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1160:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1820 0
 	mov	r7, r0
 	mov	r10, r2
 	mov	r8, r3
 	mov	fp, r1
-	.loc 2 1828 0
 	movs	r6, #1
-	.loc 2 1826 0
 	bl	NandcWaitFlashReady
-.LVL1161:
-.LBB323:
-.LBB324:
-	.loc 3 123 0
-	ldr	r2, .L1061
-.LBE324:
-.LBE323:
-	.loc 2 1822 0
+	ldr	r2, .L1084
 	mov	r4, #-1
-.LBB326:
-.LBB325:
-	.loc 3 124 0
 	add	r3, r2, r7, lsl #3
-	.loc 3 126 0
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.LVL1162:
-.L1049:
-.LBE325:
-.LBE326:
-	.loc 2 1828 0 discriminator 1
-	ldr	r3, .L1061+4
+.L1072:
+	ldr	r3, .L1084+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1053
-.LVL1163:
-.L1052:
-	.loc 2 1843 0
+	bcc	.L1076
+.L1075:
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-.LVL1164:
-	.loc 2 1844 0
-	ldr	r3, .L1061+8
+	ldr	r3, .L1084+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1048
-	.loc 2 1845 0 discriminator 1
+	bcc	.L1071
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.LVL1165:
-.L1048:
-	.loc 2 1848 0
+.L1071:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1166:
-.L1053:
-	.loc 2 1829 0
+.L1076:
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
-.LVL1167:
-	.loc 2 1830 0
 	mov	r2, r10
 	mov	r3, r8
 	mov	r1, fp
 	mov	r0, r7
 	bl	FlashReadRawPage
-.LVL1168:
-	.loc 2 1832 0
 	adds	r2, r0, #1
-	beq	.L1050
-	.loc 2 1837 0
-	ldr	r3, .L1061+8
+	beq	.L1073
+	ldr	r3, .L1084+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
-.LVL1169:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1056
-	.loc 2 1836 0
+	bcc	.L1079
 	mov	r8, #0
-	.loc 2 1835 0
 	mov	r10, r8
-.LVL1170:
-.L1050:
-	.loc 2 1828 0 discriminator 2
+.L1073:
 	adds	r6, r6, #1
-.LVL1171:
-	b	.L1049
-.LVL1172:
-.L1056:
-	.loc 2 1830 0
+	b	.L1072
+.L1079:
 	mov	r4, r0
-.LVL1173:
-	b	.L1052
-.L1062:
+	b	.L1075
+.L1085:
 	.align	2
-.L1061:
+.L1084:
 	.word	.LANCHOR6
-	.word	.LANCHOR148
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE242:
+	.word	.LANCHOR151
+	.word	.LANCHOR33
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
@@ -12405,251 +7669,157 @@ SamsungReadRetrial:
 	.fpu softvfp
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
-.LFB243:
-	.loc 2 1851 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1174:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r10, r3
-	.loc 2 1856 0
-	ldr	r3, .L1078
-.LVL1175:
-	.loc 2 1851 0
-	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 2 1851 0
-	mov	r7, r0
-	mov	fp, r2
-	str	r1, [sp, #16]
-	.loc 2 1856 0
-	ldrb	r4, [r3]	@ zero_extendqisi2
-.LVL1176:
-	.loc 2 1858 0
-	ldr	r3, .L1078+4
+	mov	r7, r3
+	ldr	r3, .L1111
+	sub	sp, sp, #40
+	mov	r5, r0
+	str	r2, [sp, #16]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1111+4
+	str	r1, [sp, #28]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1064
-	.loc 2 1856 0
-	add	r4, r4, r4, lsl #1
-.LVL1177:
-	asrs	r4, r4, #2
-.LVL1178:
-.L1065:
-	.loc 2 1861 0
-	mov	r0, r7
-.LVL1179:
-	bl	NandcWaitFlashReady
-.LVL1180:
-.LBB327:
-.LBB328:
-	.loc 3 123 0
-	ldr	r3, .L1078+8
-.LBE328:
-.LBE327:
-	.loc 2 1863 0
-	movs	r6, #0
-	.loc 2 1853 0
-	mov	r5, #-1
-.LBB330:
-.LBB329:
-	.loc 3 123 0
-	ldr	r2, [r3, r7, lsl #3]
-	.loc 3 124 0
-	add	r3, r3, r7, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	.loc 3 123 0
-	str	r2, [sp, #8]
-.LVL1181:
+	bne	.L1087
+	add	r2, r2, r2, lsl #1
+	asrs	r3, r2, #2
+.L1110:
+.L1088:
+	mov	r8, #0
 	str	r3, [sp, #12]
-.LVL1182:
-.LBE329:
-.LBE330:
-	.loc 2 1864 0
-	lsls	r3, r3, #8
-	str	r3, [sp, #24]
-.LVL1183:
-.L1066:
-	.loc 2 1863 0 discriminator 1
-	ldr	r3, .L1078+12
+	mov	r6, r8
+.L1098:
+	mov	r0, r5
+	mov	r10, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1111+8
+	mov	r4, #-1
+	ldr	r2, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	fp, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #24]
+	lsl	r3, fp, #8
+	str	r3, [sp, #32]
+.L1089:
+	ldr	r3, .L1111+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r6, r3
-	bcc	.L1070
-.LVL1184:
-.L1069:
-	.loc 2 1884 0
-	ldr	r3, [sp, #8]
-.LBB331:
-.LBB332:
-	.loc 3 306 0
+	cmp	r10, r3
+	bcc	.L1093
+.L1092:
+	ldr	r3, [sp, #24]
 	movs	r0, #200
-.LBE332:
-.LBE331:
-	.loc 2 1884 0
-	ldr	r2, [sp, #12]
-	add	r7, r3, r2, lsl #8
+	add	fp, r3, fp, lsl #8
 	movs	r3, #239
-	str	r3, [r7, #2056]
-	.loc 2 1885 0
+	str	r3, [fp, #2056]
 	movs	r3, #137
-	str	r3, [r7, #2052]
-.LVL1185:
-.LBB334:
-.LBB333:
-	.loc 3 306 0
+	str	r3, [fp, #2052]
 	bl	udelay
-.LVL1186:
-.LBE333:
-.LBE334:
-	.loc 2 1891 0
-	cmp	r5, r4
-	.loc 2 1887 0
-	mov	r3, #0
-	str	r3, [r7, #2048]
-	.loc 2 1888 0
-	str	r3, [r7, #2048]
-	.loc 2 1889 0
-	str	r3, [r7, #2048]
-	.loc 2 1890 0
-	str	r3, [r7, #2048]
-	.loc 2 1891 0
-	bcc	.L1063
-	.loc 2 1892 0 discriminator 1
-	adds	r3, r5, #1
-	.loc 2 1895 0 discriminator 1
-	ldr	r2, [sp, #16]
-	.loc 2 1892 0 discriminator 1
+	ldr	r3, [sp, #12]
+	str	r6, [fp, #2048]
+	str	r6, [fp, #2048]
+	cmp	r4, r3
+	str	r6, [fp, #2048]
+	str	r6, [fp, #2048]
+	bcc	.L1094
+	adds	r1, r4, #1
+	mov	r3, r10
 	it	ne
-	movne	r5, #256
-.LVL1187:
-	.loc 2 1895 0 discriminator 1
-	mov	r3, r6
-.LVL1188:
-	str	r5, [sp]
-	mov	r1, r6
-	ldr	r0, .L1078+16
+	movne	r4, #256
+	ldr	r2, [sp, #28]
+	str	r4, [sp]
+	mov	r1, r10
+	ldr	r0, .L1111+16
 	bl	printf
-.LVL1189:
-.L1063:
-	.loc 2 1898 0
+	cmp	r8, #0
+	bne	.L1096
+	ldr	r3, .L1111+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1086
+	adds	r2, r4, #1
+	bne	.L1086
+	movs	r1, #3
 	mov	r0, r5
-	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1190:
-.L1064:
-	.cfi_restore_state
-	.loc 2 1859 0
-	ldr	r3, .L1078+20
-	smull	r4, r5, r4, r3
-.LVL1191:
-	mov	r4, r5
-.LVL1192:
-	b	.L1065
-.LVL1193:
-.L1070:
-	.loc 2 1864 0
-	ldr	r2, [sp, #24]
-.LBB335:
-.LBB336:
-	.loc 3 306 0
+	bl	micron_auto_read_calibration_config
+	mov	r8, #1
+	b	.L1098
+.L1087:
+	ldr	r3, .L1111+20
+	smull	r2, r3, r2, r3
+	b	.L1110
+.L1093:
+	ldr	r2, [sp, #32]
 	movs	r0, #200
-.LBE336:
-.LBE335:
-	.loc 2 1864 0
-	ldr	r3, [sp, #8]
-	.loc 2 1868 0
-	mov	r8, #0
-	.loc 2 1864 0
+	ldr	r3, [sp, #24]
 	add	r3, r3, r2
 	movs	r2, #239
 	str	r2, [r3, #2056]
-	.loc 2 1865 0
 	movs	r2, #137
 	str	r2, [r3, #2052]
-	str	r3, [sp, #28]
-.LVL1194:
-.LBB338:
-.LBB337:
-	.loc 3 306 0
+	str	r3, [sp, #36]
 	bl	udelay
-.LVL1195:
-.LBE337:
-.LBE338:
-	.loc 2 1867 0
-	adds	r3, r6, #1
-	.loc 2 1871 0
-	ldr	r1, [sp, #16]
-	.loc 2 1867 0
+	add	r3, r10, #1
+	ldr	r1, [sp, #28]
 	mov	r2, r3
 	str	r3, [sp, #20]
-	ldr	r3, [sp, #28]
-	.loc 2 1871 0
-	mov	r0, r7
-	.loc 2 1867 0
+	ldr	r3, [sp, #36]
+	mov	r0, r5
 	str	r2, [r3, #2048]
-	.loc 2 1871 0
-	mov	r2, fp
-	.loc 2 1868 0
-	str	r8, [r3, #2048]
-	.loc 2 1869 0
-	str	r8, [r3, #2048]
-	.loc 2 1870 0
-	str	r8, [r3, #2048]
-	.loc 2 1871 0
-	mov	r3, r10
+	str	r6, [r3, #2048]
+	ldr	r2, [sp, #16]
+	str	r6, [r3, #2048]
+	str	r6, [r3, #2048]
+	mov	r3, r7
 	bl	FlashReadRawPage
-.LVL1196:
-	.loc 2 1873 0
-	adds	r2, r0, #1
-	beq	.L1067
-	.loc 2 1874 0
-	cmp	r5, #-1
+	adds	r3, r0, #1
+	beq	.L1090
+	ldr	r3, [sp, #12]
+	cmp	r4, #-1
 	it	eq
-	moveq	r5, r0
-.LVL1197:
-	.loc 2 1878 0
-	cmp	r0, r4
-	bcc	.L1073
-	.loc 2 1877 0
-	mov	r10, r8
-	.loc 2 1876 0
-	mov	fp, r8
-.LVL1198:
-.L1067:
-	.loc 2 1876 0 is_stmt 0 discriminator 1
-	ldr	r6, [sp, #20]
-.LVL1199:
-	b	.L1066
-.LVL1200:
-.L1073:
-	.loc 2 1871 0 is_stmt 1
-	mov	r5, r0
-.LVL1201:
-	b	.L1069
-.L1079:
+	moveq	r4, r0
+	cmp	r0, r3
+	bcc	.L1100
+	movs	r7, #0
+	str	r7, [sp, #16]
+.L1090:
+	ldr	r10, [sp, #20]
+	b	.L1089
+.L1100:
+	movs	r7, #0
+	mov	r4, r0
+	str	r7, [sp, #16]
+	b	.L1092
+.L1096:
+	movs	r1, #0
+	mov	r0, r5
+	bl	micron_auto_read_calibration_config
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
+.L1086:
+	mov	r0, r4
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1094:
+	cmp	r8, #0
+	beq	.L1086
+	movs	r1, #0
+	mov	r0, r5
+	bl	micron_auto_read_calibration_config
+	mov	r4, #256
+	b	.L1086
+.L1112:
 	.align	2
-.L1078:
-	.word	.LANCHOR32
+.L1111:
+	.word	.LANCHOR33
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-	.word	.LANCHOR148
-	.word	.LC14
+	.word	.LANCHOR151
+	.word	.LC13
 	.word	1431655766
-	.cfi_endproc
-.LFE243:
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
@@ -12660,168 +7830,95 @@ MicronReadRetrial:
 	.fpu softvfp
 	.type	HynixReadRetrial, %function
 HynixReadRetrial:
-.LFB245:
-	.loc 2 1929 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1202:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1929 0
 	mov	fp, r2
-	.loc 2 1933 0
-	ldr	r4, .L1097
-	.loc 2 1940 0
+	ldr	r4, .L1130
 	mov	r8, #0
-	.loc 2 1931 0
 	mov	r6, #-1
-	.loc 2 1929 0
 	mov	r10, r3
 	mov	r7, r0
 	str	r1, [sp, #4]
-	.loc 2 1934 0
 	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-.LVL1203:
-	.loc 2 1933 0
 	adds	r3, r4, r0
-.LVL1204:
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-.LVL1205:
-	.loc 2 1934 0
 	str	r2, [sp]
-.LVL1206:
-	.loc 2 1936 0
-	ldr	r2, .L1097+4
+	ldr	r2, .L1130+4
 	ldr	r2, [r2]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
 	cmp	r2, #7
-	.loc 2 1937 0
 	it	eq
 	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
-.LVL1207:
-	.loc 2 1939 0
 	bl	NandcWaitFlashReady
-.LVL1208:
-.L1082:
-	.loc 2 1940 0 discriminator 1
+.L1115:
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1087
-.LVL1209:
-.L1086:
-	.loc 2 1958 0
-	ldr	r3, .L1097+4
-	.loc 2 1959 0
+	bcc	.L1120
+.L1119:
+	ldr	r3, .L1130+4
 	add	r4, r4, r7
-	.loc 2 1958 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	.loc 2 1962 0
-	ldr	r3, .L1097+8
-	.loc 2 1959 0
+	ldr	r3, .L1130+8
 	ite	eq
 	strbeq	r5, [r4, #20]
-	.loc 2 1961 0
 	strbne	r5, [r4, #12]
-	.loc 2 1962 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1080
-	.loc 2 1963 0 discriminator 1
+	bcc	.L1113
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.LVL1210:
-.L1080:
-	.loc 2 1967 0
+.L1113:
 	mov	r0, r6
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL1211:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1212:
-.L1087:
-	.cfi_restore_state
-	.loc 2 1943 0
+.L1120:
 	ldr	r3, [sp]
-	.loc 2 1941 0
 	adds	r5, r5, #1
-.LVL1213:
 	uxtb	r5, r5
-.LVL1214:
-	.loc 2 1944 0
-	ldr	r2, .L1097+12
+	ldr	r2, .L1130+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
-	.loc 2 1943 0
 	cmp	r3, r5
 	it	ls
 	movls	r5, #0
-.LVL1215:
-	.loc 2 1944 0
 	mov	r3, r5
 	bl	HynixSetRRPara
-.LVL1216:
-	.loc 2 1945 0
 	mov	r2, fp
 	mov	r3, r10
 	ldr	r1, [sp, #4]
 	mov	r0, r7
 	bl	FlashReadRawPage
-.LVL1217:
-	.loc 2 1947 0
 	adds	r2, r0, #1
-	beq	.L1084
-	.loc 2 1952 0
-	ldr	r3, .L1097+8
-	.loc 2 1948 0
+	beq	.L1117
+	ldr	r3, .L1130+8
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
-.LVL1218:
-	.loc 2 1952 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1091
-	.loc 2 1951 0
+	bcc	.L1124
 	mov	r10, #0
-	.loc 2 1950 0
 	mov	fp, r10
-.LVL1219:
-.L1084:
-	.loc 2 1940 0 discriminator 2
+.L1117:
 	add	r8, r8, #1
-.LVL1220:
-	b	.L1082
-.LVL1221:
-.L1091:
-	.loc 2 1945 0
+	b	.L1115
+.L1124:
 	mov	r6, r0
-.LVL1222:
-	b	.L1086
-.L1098:
+	b	.L1119
+.L1131:
 	.align	2
-.L1097:
+.L1130:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.word	.LANCHOR20+4
-	.cfi_endproc
-.LFE245:
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
@@ -12832,120 +7929,66 @@ HynixReadRetrial:
 	.fpu softvfp
 	.type	FlashProgPage, %function
 FlashProgPage:
-.LFB224:
-	.loc 2 562 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1223:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 562 0
 	mov	r8, r3
-	.loc 2 566 0
-	ldr	r3, .L1102
-.LVL1224:
-	.loc 2 562 0
+	ldr	r3, .L1135
 	mov	r5, r1
 	mov	r7, r2
-	.loc 2 568 0
 	mov	r4, r0
-	.loc 2 566 0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-.LVL1225:
-	.loc 2 568 0
-	cbnz	r0, .L1100
-	.loc 2 568 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1102+4
-	ldr	r2, .L1102+8
-.LVL1226:
+	cbnz	r0, .L1133
+	ldr	r3, .L1135+4
+	ldr	r2, .L1135+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
-.LVL1227:
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1100
-	.loc 2 569 0 is_stmt 1
-	ldr	r3, .L1102+12
+	bls	.L1133
+	ldr	r3, .L1135+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1101
-	.loc 2 572 0
+	cbnz	r3, .L1134
 	subs	r6, r6, #2
-.LVL1228:
-.L1100:
-	.loc 2 574 0
+.L1133:
 	mov	r0, r4
-.LVL1229:
 	bl	NandcWaitFlashReady
-.LVL1230:
-	.loc 2 575 0
 	mov	r0, r4
 	bl	NandcFlashCs
-.LVL1231:
-	.loc 2 576 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgFirstCmd
-.LVL1232:
-	.loc 2 577 0
 	mov	r3, r7
 	uxtb	r2, r6
 	str	r8, [sp]
 	movs	r1, #1
 	mov	r0, r4
 	bl	NandcXferData
-.LVL1233:
-	.loc 2 578 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgSecondCmd
-.LVL1234:
-	.loc 2 579 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-.LVL1235:
-	.loc 2 580 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
-.LVL1236:
 	mov	r1, r0
-.LVL1237:
-	.loc 2 581 0
 	mov	r0, r4
-.LVL1238:
 	bl	NandcFlashDeCs
-.LVL1239:
-	.loc 2 586 0
 	and	r0, r1, #1
-.LVL1240:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1241:
-.L1101:
-	.cfi_restore_state
-	.loc 2 570 0
+.L1134:
 	movs	r6, #4
-.LVL1242:
-	b	.L1100
-.L1103:
+	b	.L1133
+.L1136:
 	.align	2
-.L1102:
-	.word	.LANCHOR30
+.L1135:
+	.word	.LANCHOR31
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE224:
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
@@ -12956,149 +7999,89 @@ FlashProgPage:
 	.fpu softvfp
 	.type	FlashSavePhyInfo, %function
 FlashSavePhyInfo:
-.LFB231:
-	.loc 2 870 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1243:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 873 0
-	ldr	r7, .L1113
-	ldr	r4, .L1113+4
+	ldr	r7, .L1146
+	ldr	r4, .L1146+4
 	ldr	r3, [r7]
-	.loc 2 886 0
-	ldr	r10, .L1113+60
-	.loc 2 903 0
-	ldr	r8, .L1113+64
-	.loc 2 873 0
+	ldr	r10, .L1146+60
+	ldr	r8, .L1146+64
 	str	r3, [r4]
-	.loc 2 877 0
-	ldr	r3, .L1113+8
+	ldr	r3, .L1146+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
-.LVL1244:
-	.loc 2 885 0
 	mov	r2, #2048
 	movs	r1, #0
 	ldr	r0, [r7]
 	bl	ftl_memset
-.LVL1245:
-	.loc 2 886 0
-	ldr	r3, [r4]
-	.loc 2 891 0
-	movs	r2, #32
-	ldr	r1, .L1113+12
-	.loc 2 886 0
-	str	r10, [r3]
-	.loc 2 887 0
-	ldr	r3, .L1113+16
 	ldr	r0, [r4]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 891 0
+	movs	r2, #32
+	ldr	r3, .L1146+12
+	ldr	r1, .L1146+16
+	str	r10, [r0]
 	adds	r0, r0, #16
-	.loc 2 887 0
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-4]	@ movhi
-	.loc 2 888 0
-	ldr	r3, .L1113+20
+	ldr	r3, .L1146+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	.loc 2 889 0
-	ldr	r3, .L1113+24
+	ldr	r3, .L1146+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
-	.loc 2 891 0
 	bl	ftl_memcpy
-.LVL1246:
-	.loc 2 892 0
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1113+28
+	ldr	r1, .L1146+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
-.LVL1247:
-	.loc 2 893 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1113+32
+	ldr	r1, .L1146+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
-.LVL1248:
-	.loc 2 895 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1113+36
+	ldr	r1, .L1146+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
-.LVL1249:
-	.loc 2 896 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1113+40
+	ldr	r1, .L1146+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
-.LVL1250:
-	.loc 2 897 0
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1113+44
+	ldr	r1, .L1146+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
-.LVL1251:
-	.loc 2 898 0
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
 	bl	JSHash
-.LVL1252:
-	.loc 2 900 0
-	ldr	r1, .L1113+48
-	.loc 2 899 0
+	ldr	r1, .L1146+48
 	mov	r3, #1592
 	str	r3, [r5, #4]
-	.loc 2 898 0
 	str	r0, [r5, #8]
-	.loc 2 901 0
 	movs	r0, #0
-	.loc 2 900 0
 	ldr	r3, [r1]
-	.loc 2 872 0
 	movs	r5, #0
-	.loc 2 902 0
 	mov	r6, r5
-	.loc 2 900 0
 	str	r3, [r4]
-	.loc 2 901 0
 	bl	flash_enter_slc_mode
-.LVL1253:
 	mov	fp, r1
-.LVL1254:
-.L1107:
-	.loc 2 903 0
+.L1140:
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
 	muls	r1, r6, r1
 	bl	FlashEraseBlock
-.LVL1255:
-	.loc 2 904 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashProgPage
-.LVL1256:
-	.loc 2 905 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
@@ -13106,104 +8089,74 @@ FlashSavePhyInfo:
 	muls	r1, r6, r1
 	adds	r1, r1, #1
 	bl	FlashProgPage
-.LVL1257:
-	.loc 2 906 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [fp]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashReadRawPage
-.LVL1258:
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1105
-	.loc 2 907 0
+	beq	.L1138
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1105
-	.loc 2 908 0 discriminator 1
+	bne	.L1138
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	JSHash
-.LVL1259:
-	.loc 2 907 0 discriminator 1
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1105
-	.loc 2 909 0
-	ldr	r3, .L1113+52
-	.loc 2 914 0
+	bne	.L1138
+	ldr	r3, .L1146+52
 	cmp	r5, #1
-	.loc 2 909 0
 	str	r2, [r3]
-	.loc 2 910 0
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-.LVL1260:
-	ldr	r3, .L1113+56
+	ldr	r3, .L1146+56
 	str	r6, [r3]
-.LVL1261:
-	.loc 2 914 0
-	beq	.L1108
+	beq	.L1141
 	movs	r5, #1
-.LVL1262:
-.L1105:
-	.loc 2 902 0 discriminator 2
+.L1138:
 	cmp	r2, #4
 	mov	r6, r2
-.LVL1263:
-	bne	.L1107
-.LVL1264:
-.L1106:
-	.loc 2 917 0
+	bne	.L1140
+.L1139:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.LVL1265:
-	.loc 2 918 0
 	clz	r0, r5
 	lsrs	r0, r0, #5
-	.loc 2 922 0
 	negs	r0, r0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1266:
-.L1108:
-	.cfi_restore_state
-	.loc 2 911 0
+.L1141:
 	movs	r5, #2
-.LVL1267:
-	b	.L1106
-.L1114:
+	b	.L1139
+.L1147:
 	.align	2
-.L1113:
-	.word	.LANCHOR144
-	.word	.LANCHOR143
-	.word	.LANCHOR149
-	.word	.LANCHOR22
+.L1146:
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR152
 	.word	.LANCHOR25
+	.word	.LANCHOR22
 	.word	.LANCHOR2
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
-	.word	.LANCHOR30
+	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR150
-	.word	.LANCHOR146
-	.word	.LANCHOR145
+	.word	.LANCHOR153
+	.word	.LANCHOR149
+	.word	.LANCHOR148
 	.word	1312902724
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE231:
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
@@ -13214,32 +8167,13 @@ FlashSavePhyInfo:
 	.fpu softvfp
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
-.LFB249:
-	.loc 2 2091 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1268:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2095 0
 	movs	r3, #60
-	.loc 2 2091 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 2105 0
-	ldr	r2, .L1127
-	.loc 2 2091 0
+	ldr	r2, .L1160
 	mov	r10, r0
-	.loc 2 2095 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
@@ -13247,160 +8181,107 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #22]
 	movs	r3, #16
 	strb	r3, [sp, #23]
-.LVL1269:
-	.loc 2 2103 0
-	ldr	r3, .L1127+4
-	.loc 2 2105 0
+	ldr	r3, .L1160+4
 	ldr	r1, [r2]
 	str	r2, [sp, #8]
-	.loc 2 2103 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-.LVL1270:
-	.loc 2 2105 0
-	ldr	r3, .L1127+8
+	ldr	r3, .L1160+8
 	cmp	r1, r3
 	str	r3, [sp, #12]
-	bne	.L1116
-	.loc 2 2106 0
+	bne	.L1149
 	movs	r0, #0
-.LVL1271:
 	bl	flash_enter_slc_mode
-.LVL1272:
-.L1116:
-	.loc 2 2102 0
+.L1149:
 	mov	r7, #-1
-	.loc 2 2108 0
 	movs	r4, #2
-	.loc 2 2107 0
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.LVL1273:
-.L1117:
-	.loc 2 2108 0 discriminator 1
-	ldr	r3, .L1127+12
+.L1150:
+	ldr	r3, .L1160+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1122
-.L1121:
-.LVL1274:
-	.loc 2 2132 0
+	bcc	.L1155
+.L1154:
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
-.LVL1275:
-	.loc 2 2133 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1115
-	.loc 2 2134 0
+	bne	.L1148
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.LVL1276:
-.L1115:
-	.loc 2 2136 0
+.L1148:
 	mov	r0, r7
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1277:
-.L1122:
-	.cfi_restore_state
-	.loc 2 2111 0
-	ldr	r5, .L1127+16
+.L1155:
+	ldr	r5, .L1160+16
 	movs	r6, #0
-	ldr	fp, .L1127+32
-.L1119:
-.LVL1278:
-	.loc 2 2110 0
+	ldr	fp, .L1160+32
+.L1152:
 	add	r3, sp, #20
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
 	bl	FlashBchSel
-.LVL1279:
-	.loc 2 2111 0
 	ldr	r1, [fp]
 	movs	r3, #0
 	ldr	r2, [r5]
 	mov	r0, r3
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
-.LVL1280:
 	adds	r0, r0, #1
-	bne	.L1118
-	.loc 2 2109 0 discriminator 2
+	bne	.L1151
 	adds	r6, r6, #1
-.LVL1281:
 	cmp	r6, #4
-	bne	.L1119
-.L1120:
-	.loc 2 2108 0 discriminator 2
+	bne	.L1152
+.L1153:
 	adds	r4, r4, #1
-.LVL1282:
-	b	.L1117
-.LVL1283:
-.L1125:
-	.loc 2 2123 0
+	b	.L1150
+.L1158:
 	movs	r7, #0
-	b	.L1121
-.LVL1284:
-.L1118:
-	.loc 2 2117 0
+	b	.L1154
+.L1151:
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1127+20
+	ldr	r3, .L1160+20
 	cmp	r2, r3
-	bne	.L1120
-	.loc 2 2119 0
+	bne	.L1153
 	mov	r1, r8
-	ldr	r0, .L1127+24
+	ldr	r0, .L1160+24
 	bl	printf
-.LVL1285:
-	.loc 2 2121 0
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
-.LVL1286:
-	.loc 2 2122 0
 	ldr	r3, [r5]
-	ldr	r2, .L1127+12
+	ldr	r2, .L1160+12
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-.LVL1287:
-	.loc 2 2124 0
-	ldr	r3, .L1127+28
+	ldr	r3, .L1160+28
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1125
-	.loc 2 2125 0
+	bcs	.L1158
 	str	r4, [r3]
-	.loc 2 2123 0
 	movs	r7, #0
-	.loc 2 2126 0
 	bl	FlashSavePhyInfo
-.LVL1288:
-	.loc 2 2127 0
-	b	.L1120
-.L1128:
+	b	.L1153
+.L1161:
 	.align	2
-.L1127:
-	.word	.LANCHOR151
-	.word	.LANCHOR32
+.L1160:
+	.word	.LANCHOR29
+	.word	.LANCHOR33
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LANCHOR144
+	.word	.LANCHOR147
 	.word	-52655045
-	.word	.LC15
-	.word	.LANCHOR146
+	.word	.LC14
+	.word	.LANCHOR149
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE249:
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
@@ -13411,80802 +8292,18546 @@ FlashReadIdbDataRaw:
 	.fpu softvfp
 	.type	FlashPageProgMsbFFData, %function
 FlashPageProgMsbFFData:
-.LFB247:
-	.loc 2 1984 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1289:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 1984 0
 	mov	r4, r2
-	.loc 2 1985 0
-	ldr	r5, .L1139
-	.loc 2 1984 0
+	ldr	r5, .L1172
 	mov	r6, r0
 	mov	r7, r1
-	.loc 2 1985 0
 	ldr	r3, [r5]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-.LVL1290:
-	.loc 2 1987 0
-	ldr	r3, .L1139+4
+	ldr	r3, .L1172+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1130
-	.loc 2 1987 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1139+8
+	cbz	r3, .L1163
+	ldr	r3, .L1172+8
 	ldr	r1, [r3]
-.LVL1291:
-	ldr	r3, .L1139+12
+	ldr	r3, .L1172+12
 	cmp	r1, r3
-	beq	.L1129
-.L1130:
-	.loc 2 1989 0 is_stmt 1
+	beq	.L1162
+.L1163:
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1131
-	ldr	r2, .L1139+16
-.LVL1292:
+	bhi	.L1164
+	ldr	r2, .L1172+16
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1133
+	bmi	.L1166
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1293:
-.L1134:
-	.loc 2 1993 0
+.L1167:
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1129
-	.loc 2 1994 0
+	bne	.L1162
 	mov	r2, #32768
 	movs	r1, #255
 	ldr	r0, [r8]
 	bl	ftl_memset
-.LVL1294:
-	.loc 2 2038 0
 	adds	r1, r4, r7
-	.loc 2 1991 0
 	adds	r4, r4, #1
-.LVL1295:
 	uxth	r4, r4
-	.loc 2 2038 0
 	movs	r3, #0
 	ldr	r2, [r8]
 	mov	r0, r6
 	bl	FlashProgPage
-.LVL1296:
-.L1135:
-	.loc 2 1991 0 discriminator 1
+.L1168:
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1134
+	bhi	.L1167
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1297:
-.L1131:
-	.loc 2 1989 0
+.L1164:
 	cmp	r2, #68
-	bne	.L1129
-.LVL1298:
-.L1133:
-	.loc 2 1993 0 discriminator 1
-	ldr	r10, .L1139+20
-	.loc 2 1994 0 discriminator 1
-	ldr	r8, .L1139+24
-	b	.L1135
-.LVL1299:
-.L1129:
+	bne	.L1162
+.L1166:
+	ldr	r10, .L1172+20
+	ldr	r8, .L1172+24
+	b	.L1168
+.L1162:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1300:
-.L1140:
+.L1173:
 	.align	2
-.L1139:
+.L1172:
 	.word	.LANCHOR18
 	.word	.LANCHOR8
-	.word	.LANCHOR151
+	.word	.LANCHOR29
 	.word	1446522928
 	.word	1073758215
-	.word	.LANCHOR117
-	.word	.LANCHOR150
-	.cfi_endproc
-.LFE247:
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.ftl_memcmp,"ax",%progbits
-	.align	1
-	.global	ftl_memcmp
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-.LFB483:
-	.loc 7 47 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1301:
-	.loc 7 48 0
-	b	memcmp
-.LVL1302:
-	.cfi_endproc
-.LFE483:
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",%progbits
-	.align	1
-	.global	rknand_get_clk_rate
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-.LFB484:
-	.loc 7 52 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1303:
-	.loc 7 54 0
-	ldr	r0, .L1143
-.LVL1304:
-	bx	lr
-.L1144:
-	.align	2
-.L1143:
-	.word	148000000
-	.cfi_endproc
-.LFE484:
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",%progbits
-	.align	1
-	.global	ftl_malloc
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
-.LFB485:
-	.loc 7 57 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1305:
-	.loc 7 58 0
-	movs	r1, #0
-	b	kmalloc
-.LVL1306:
-	.cfi_endproc
-.LFE485:
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.NandcInit,"ax",%progbits
-	.align	1
-	.global	NandcInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	NandcInit, %function
-NandcInit:
-.LFB267:
-	.loc 3 16 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1307:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 41 0
-	movs	r2, #1
-	ldr	r3, .L1148
-	movs	r1, #0
-	.loc 3 62 0
-	ldr	r4, .L1148+4
-	.loc 3 41 0
-	str	r2, [r3, #12]
-	movs	r2, #2
-	str	r2, [r3, #20]
-	movs	r2, #3
-	str	r2, [r3, #28]
-	.loc 3 45 0
-	ldr	r2, .L1148+8
-	.loc 3 42 0
-	stm	r3, {r0, r1}
-.LVL1308:
-	str	r0, [r3, #8]
-.LVL1309:
-	.loc 3 45 0
-	str	r0, [r2]
-	.loc 3 42 0
-	str	r0, [r3, #16]
-.LVL1310:
-	str	r0, [r3, #24]
-.LVL1311:
-	.loc 3 53 0
-	ldr	r3, [r0]
-	and	r3, r3, #253952
-.LVL1312:
-	.loc 3 62 0
-	ubfx	r5, r3, #13, #1
-	.loc 3 63 0
-	bfi	r3, r1, #13, #1
-	.loc 3 66 0
-	ldr	r1, [r0, #352]
-	.loc 3 65 0
-	orr	r3, r3, #256
-.LVL1313:
-	.loc 3 62 0
-	str	r5, [r4]
-	.loc 3 66 0
-	ldr	r4, .L1148+12
-	ubfx	r1, r1, #16, #4
-	.loc 3 67 0
-	ldr	r5, .L1148+16
-	.loc 3 66 0
-	str	r1, [r4]
-	.loc 3 67 0
-	ldr	r1, [r0, #352]
-	str	r1, [r5]
-	.loc 3 68 0
-	movw	r5, #2049
-	cmp	r1, r5
-	.loc 3 69 0
-	itt	eq
-	moveq	r1, #8
-	streq	r1, [r4]
-	.loc 3 71 0
-	movs	r4, #0
-.LVL1314:
-	.loc 3 70 0
-	str	r3, [r0]
-	.loc 3 101 0
-	mov	r0, #36864
-.LVL1315:
-	.loc 3 71 0
-	ldr	r3, [r2]
-.LVL1316:
-.LBB343:
-.LBB344:
-.LBB345:
-.LBB346:
-	.loc 3 379 0
-	movw	r2, #4225
-.LBE346:
-.LBE345:
-.LBE344:
-.LBE343:
-	.loc 3 71 0
-	str	r4, [r3, #336]
-.LVL1317:
-.LBB350:
-.LBB349:
-.LBB348:
-.LBB347:
-	.loc 3 379 0
-	str	r2, [r3, #4]
-.LVL1318:
-.LBE347:
-.LBE348:
-.LBE349:
-.LBE350:
-	.loc 3 74 0
-	movw	r2, #8322
-	str	r2, [r3, #344]
-	.loc 3 83 0
-	ldr	r2, .L1148+20
-	str	r2, [r3, #304]
-	.loc 3 101 0
-	bl	ftl_malloc
-.LVL1319:
-	ldr	r3, .L1148+24
-	str	r0, [r3]
-	.loc 3 102 0
-	ldr	r3, .L1148+28
-	str	r0, [r3]
-	.loc 3 103 0
-	add	r0, r0, #32768
-	str	r0, [r3, #4]
-	.loc 3 104 0
-	str	r4, [r3, #24]
-	.loc 3 106 0
-	ldr	r3, .L1148+32
-	str	r4, [r3]
-	pop	{r3, r4, r5, pc}
-.L1149:
-	.align	2
-.L1148:
-	.word	.LANCHOR6
-	.word	.LANCHOR152
-	.word	.LANCHOR19
-	.word	.LANCHOR33
-	.word	.LANCHOR151
-	.word	1710593
+	.word	.LANCHOR120
 	.word	.LANCHOR153
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.cfi_endproc
-.LFE267:
-	.size	NandcInit, .-NandcInit
-	.section	.text.FtlMemInit,"ax",%progbits
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.idb_write_data,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	idb_write_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-.LFB297:
-	.loc 4 355 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	idb_write_data, %function
+idb_write_data:
+	@ args = 0, pretend = 0, frame = 96
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 4 359 0
-	ldr	r3, .L1155
-	.loc 4 355 0
+	mov	r0, r1
+	mov	r1, r2
+	adds	r2, r0, r3
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 359 0
-	movs	r4, #0
-	.loc 4 377 0
-	ldr	r2, .L1155+4
-	.loc 4 399 0
-	movs	r6, #12
-	.loc 4 359 0
-	strh	r4, [r3]	@ movhi
-	.loc 4 360 0
-	ldr	r3, .L1155+8
-	.loc 4 398 0
-	ldr	r5, .L1155+12
-	.loc 4 400 0
-	ldr	r10, .L1155+296
-	.loc 4 360 0
-	str	r4, [r3]
-	.loc 4 361 0
-	ldr	r3, .L1155+16
-	.loc 4 398 0
-	ldrh	r0, [r5]
-	.loc 4 411 0
-	ldr	r8, .L1155+300
-	.loc 4 361 0
-	str	r4, [r3]
-	.loc 4 362 0
-	ldr	r3, .L1155+20
-	.loc 4 398 0
-	lsls	r0, r0, #1
-	.loc 4 423 0
-	ldr	fp, .L1155+304
-	.loc 4 362 0
-	str	r4, [r3]
-	.loc 4 363 0
-	ldr	r3, .L1155+24
-	str	r4, [r3]
-	.loc 4 364 0
-	ldr	r3, .L1155+28
-	str	r4, [r3]
-	.loc 4 365 0
-	ldr	r3, .L1155+32
-	str	r4, [r3]
-	.loc 4 366 0
-	ldr	r3, .L1155+36
-	str	r4, [r3]
-	.loc 4 367 0
-	ldr	r3, .L1155+40
-	str	r4, [r3]
-	.loc 4 368 0
-	ldr	r3, .L1155+44
-	str	r4, [r3]
-	.loc 4 369 0
-	ldr	r3, .L1155+48
-	str	r4, [r3]
-	.loc 4 370 0
-	ldr	r3, .L1155+52
-	str	r4, [r3]
-	.loc 4 371 0
-	ldr	r3, .L1155+56
-	str	r4, [r3]
-	.loc 4 372 0
-	ldr	r3, .L1155+60
-	str	r4, [r3]
-	.loc 4 373 0
-	ldr	r3, .L1155+64
-	str	r4, [r3]
-	.loc 4 374 0
-	ldr	r3, .L1155+68
-	str	r4, [r3]
-	.loc 4 375 0
-	ldr	r3, .L1155+72
-	str	r4, [r3]
-	.loc 4 376 0
-	ldr	r3, .L1155+76
-	str	r4, [r3]
-	.loc 4 377 0
-	movw	r3, #65535
-	str	r3, [r2]
-	.loc 4 378 0
-	ldr	r2, .L1155+80
-	str	r4, [r2]
-	.loc 4 379 0
-	ldr	r2, .L1155+84
-	str	r4, [r2]
-	.loc 4 380 0
-	ldr	r2, .L1155+88
+	cmp	r2, #63
+	sub	sp, sp, #104
+	bls	.L1175
+	cmp	r0, #576
+	bcs	.L1176
+	ldr	r2, .L1227
+	cmp	r0, #64
+	mov	r4, #1
 	str	r4, [r2]
-	.loc 4 381 0
-	ldr	r2, .L1155+92
-	strh	r3, [r2]	@ movhi
-	.loc 4 382 0
-	ldr	r2, .L1155+96
-	strh	r3, [r2]	@ movhi
-	.loc 4 383 0
-	movs	r2, #32
-	ldr	r3, .L1155+100
-	strh	r2, [r3]	@ movhi
-	.loc 4 384 0
-	movs	r2, #128
-	ldr	r3, .L1155+104
-	strh	r2, [r3]	@ movhi
-	.loc 4 385 0
-	ldr	r3, .L1155+108
-	strh	r4, [r3]	@ movhi
-	.loc 4 386 0
-	ldr	r3, .L1155+112
-	strh	r4, [r3]	@ movhi
-	.loc 4 387 0
-	ldr	r3, .L1155+116
-	strh	r4, [r3]	@ movhi
-	.loc 4 388 0
-	ldr	r3, .L1155+120
-	strh	r4, [r3]	@ movhi
-	.loc 4 398 0
-	bl	ftl_malloc
-.LVL1320:
-	ldr	r3, .L1155+124
-	str	r0, [r3]
-	.loc 4 399 0
-	ldrh	r0, [r5]
-	.loc 4 400 0
-	movs	r5, #36
-	.loc 4 399 0
-	muls	r0, r6, r0
-	bl	ftl_malloc
-.LVL1321:
-	ldr	r3, .L1155+128
-	str	r0, [r3]
-	.loc 4 400 0
-	ldrh	r3, [r10]
-	muls	r5, r3, r5
-.LVL1322:
-	.loc 4 401 0
-	lsls	r7, r5, #2
-	mov	r0, r7
-	bl	ftl_malloc
-.LVL1323:
-	ldr	r3, .L1155+132
-	str	r0, [r3]
-	.loc 4 402 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1324:
-	ldr	r3, .L1155+136
-	str	r0, [r3]
-	.loc 4 403 0
-	mov	r0, r7
-	bl	ftl_malloc
-.LVL1325:
-	ldr	r3, .L1155+140
-	.loc 4 410 0
-	ldr	r7, .L1155+144
-	.loc 4 403 0
-	str	r0, [r3]
-	.loc 4 404 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1326:
-	ldr	r3, .L1155+148
-	str	r0, [r3]
-	.loc 4 405 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1327:
-	ldr	r3, .L1155+152
-	.loc 4 410 0
-	ldrh	r5, [r7]
-.LVL1328:
-	.loc 4 405 0
-	str	r0, [r3]
-	.loc 4 411 0
-	ldrh	r3, [r10]
-	.loc 4 412 0
-	mov	r0, r5
-	.loc 4 411 0
-	lsls	r3, r3, #1
-	adds	r3, r3, #1
-	str	r3, [r8]
-	.loc 4 412 0
-	bl	ftl_malloc
-.LVL1329:
-	ldr	r3, .L1155+156
-	str	r0, [r3]
-	.loc 4 413 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1330:
-	ldr	r3, .L1155+160
-	str	r0, [r3]
-	.loc 4 414 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1331:
-	ldr	r3, .L1155+164
-	str	r0, [r3]
-	.loc 4 415 0
-	ldr	r0, [r8]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-.LVL1332:
-	ldr	r3, .L1155+168
-	str	r0, [r3]
-	.loc 4 419 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1333:
-	ldr	r3, .L1155+172
-	str	r0, [r3]
-	.loc 4 420 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1334:
-	ldr	r3, .L1155+176
-	str	r0, [r3]
-	.loc 4 421 0
-	ldr	r0, [r8]
-	muls	r0, r6, r0
-	bl	ftl_malloc
-.LVL1335:
-	ldr	r3, .L1155+180
-	.loc 4 423 0
-	ldrh	r5, [r10]
-.LVL1336:
-	.loc 4 447 0
-	ldr	r10, .L1155+308
-	.loc 4 421 0
-	str	r0, [r3]
-	.loc 4 423 0
-	ldrh	r3, [fp]
-	muls	r5, r3, r5
-.LVL1337:
-	.loc 4 424 0
-	mov	r0, r5
-	bl	ftl_malloc
-.LVL1338:
-	ldr	r3, .L1155+184
-	str	r0, [r3]
-	.loc 4 425 0
-	lsls	r0, r5, #2
-	.loc 4 432 0
-	ldr	r5, .L1155+188
-.LVL1339:
-	.loc 4 425 0
-	bl	ftl_malloc
-.LVL1340:
-	ldr	r3, .L1155+192
-	str	r0, [r3]
-	.loc 4 426 0
-	ldrh	r3, [fp]
-	ldr	r0, [r8]
-	.loc 4 432 0
-	ldr	r8, .L1155+312
-	.loc 4 426 0
-	muls	r0, r3, r0
-	bl	ftl_malloc
-.LVL1341:
-	ldr	r3, .L1155+196
-	str	r0, [r3]
-	.loc 4 432 0
-	ldrh	r0, [r5]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r8]	@ movhi
-	.loc 4 433 0
-	bl	ftl_malloc
-.LVL1342:
-	ldr	r3, .L1155+200
-	str	r0, [r3]
-	.loc 4 434 0
-	ldrh	r3, [r8]
-	.loc 4 435 0
-	ldr	r0, .L1155+204
-	.loc 4 434 0
-	addw	r3, r3, #547
-	lsrs	r3, r3, #9
-	.loc 4 435 0
-	and	r0, r0, r3, lsl #9
-	.loc 4 434 0
-	strh	r3, [r8]	@ movhi
-	.loc 4 435 0
-	bl	ftl_malloc
-.LVL1343:
-	ldr	r3, .L1155+208
-	str	r0, [r3]
-	.loc 4 436 0
-	adds	r0, r0, #32
-	ldr	r3, .L1155+212
-	str	r0, [r3]
-.LVL1344:
-	.loc 4 442 0
-	ldrh	r0, [r5]
-	.loc 4 446 0
-	lsls	r0, r0, #1
-.LVL1345:
-	bl	ftl_malloc
-.LVL1346:
-	ldr	r3, .L1155+216
-	str	r0, [r3]
-.LVL1347:
-	.loc 4 447 0
-	ldr	r3, [r10]
-	lsl	r8, r3, #1
-.LVL1348:
-	.loc 4 448 0
-	mov	r0, r8
-	bl	ftl_malloc
-.LVL1349:
-	ldr	r3, .L1155+220
-	str	r0, [r3]
-	.loc 4 449 0
-	mov	r0, r8
-	bl	ftl_malloc
-.LVL1350:
-	ldr	r3, .L1155+224
-	.loc 4 451 0
-	ldr	r8, .L1155+316
-.LVL1351:
-	.loc 4 449 0
-	str	r0, [r3]
-	.loc 4 450 0
-	ldrh	r0, [r5]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-.LVL1352:
-	ldr	r3, .L1155+228
-	str	r0, [r3]
-	.loc 4 451 0
-	ldrh	r0, [r8]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-.LVL1353:
-	ldr	r3, .L1155+232
-	str	r0, [r3]
-	.loc 4 452 0
-	ldrh	r0, [r8]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-.LVL1354:
-	ldr	r3, .L1155+236
-	str	r0, [r3]
-	.loc 4 453 0
-	ldrh	r0, [r8]
-	.loc 4 454 0
-	ldr	r8, .L1155+320
-	.loc 4 453 0
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-.LVL1355:
-	ldr	r3, .L1155+240
-	str	r0, [r3]
-	.loc 4 454 0
-	ldrh	r0, [r8]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-.LVL1356:
-	.loc 4 455 0
-	ldrh	r2, [r8]
-	mov	r1, r4
-	.loc 4 454 0
-	ldr	r3, .L1155+244
-	.loc 4 455 0
-	lsls	r2, r2, #2
-	.loc 4 454 0
-	str	r0, [r3]
-	.loc 4 455 0
-	bl	ftl_memset
-.LVL1357:
-	.loc 4 457 0
-	ldr	r3, .L1155+248
-	ldrh	r4, [r3]
-	lsls	r4, r4, #2
-.LVL1358:
-	.loc 4 458 0
-	mov	r0, r4
-	bl	ftl_malloc
-.LVL1359:
-	ldr	r3, .L1155+252
-	str	r0, [r3]
-	.loc 4 459 0
-	mov	r0, r4
-	bl	ftl_malloc
-.LVL1360:
-	ldr	r3, .L1155+256
-	.loc 4 462 0
-	ldr	r4, .L1155+260
-.LVL1361:
-	.loc 4 459 0
-	str	r0, [r3]
-.LVL1362:
-	.loc 4 460 0
-	ldr	r0, [r10]
-	.loc 4 461 0
-	lsls	r0, r0, #2
-.LVL1363:
-	bl	ftl_malloc
-.LVL1364:
-	ldr	r3, .L1155+264
-	str	r0, [r3]
-.LVL1365:
-	.loc 4 462 0
-	ldrh	r0, [r4]
-	.loc 4 463 0
-	muls	r0, r6, r0
-.LVL1366:
-	.loc 4 469 0
-	ldr	r6, .L1155+268
-	.loc 4 463 0
-	bl	ftl_malloc
-.LVL1367:
-	ldr	r3, .L1155+272
-	str	r0, [r3]
-.LVL1368:
-	.loc 4 464 0
-	ldrh	r3, [r4]
-	ldrh	r0, [r7]
-	.loc 4 465 0
-	muls	r0, r3, r0
-.LVL1369:
-	bl	ftl_malloc
-.LVL1370:
-	ldr	r3, .L1155+276
-	str	r0, [r3]
-.LVL1371:
-	.loc 4 467 0
-	movs	r0, #6
-	.loc 4 466 0
-	ldrh	r3, [r5]
-	.loc 4 468 0
-	ldr	r5, .L1155+280
-	.loc 4 467 0
-	muls	r0, r3, r0
-.LVL1372:
-	bl	ftl_malloc
-.LVL1373:
-	ldr	r3, .L1155+284
-	str	r0, [r3]
-	.loc 4 468 0
-	ldr	r3, .L1155+288
-	ldrh	r0, [r3]
-	.loc 4 469 0
-	ldrh	r3, [r6]
-	.loc 4 468 0
-	adds	r0, r0, #31
-	asrs	r0, r0, #5
-	strh	r0, [r5]	@ movhi
-.LVL1374:
-	.loc 4 469 0
-	muls	r0, r3, r0
-.LVL1375:
-	.loc 4 470 0
-	lsls	r0, r0, #2
-.LVL1376:
-	bl	ftl_malloc
-.LVL1377:
-	.loc 4 473 0
-	ldrh	r1, [r5]
-	.loc 4 471 0
-	movs	r2, #1
-	.loc 4 470 0
-	ldr	r3, .L1155+292
-	.loc 4 471 0
-	ldrh	r6, [r6]
-	lsls	r1, r1, #2
-	.loc 4 470 0
-	mov	r4, r3
-	str	r0, [r4, #28]!
-.LVL1378:
-	.loc 4 471 0
+	bhi	.L1177
+	rsb	r0, r0, #64
+	subs	r2, r3, r0
+	add	r1, r1, r0, lsl #9
+	ldr	r0, .L1227+4
+	lsls	r2, r2, #9
+.L1226:
+	bl	ftl_memcpy
+.L1215:
+	movs	r0, #0
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1177:
+	rsb	r2, r0, #576
+	subs	r0, r0, #64
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	ldr	r3, .L1227+4
+	lsls	r2, r2, #9
+	add	r0, r3, r0, lsl #9
+	b	.L1226
+.L1175:
+	cmp	r0, #576
+	bcc	.L1215
+.L1176:
+	ldr	r3, .L1227
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L1215
+	ldr	r3, .L1227+8
+	ldr	r2, [r3]
+	ldrb	r3, [r2, #9]	@ zero_extendqisi2
+	ldrh	r2, [r2, #10]
+	smulbb	r3, r3, r2
+	uxth	r3, r3
+	mov	r1, r3
+	addw	r0, r3, #511
+	str	r3, [sp, #8]
+	bl	__aeabi_uidiv
+	ldr	r1, .L1227+4
+	movs	r3, #0
+	str	r0, [sp, #20]
+	movw	r2, #65535
 	mov	r0, r1
-	b	.L1156
-.L1157:
+.L1181:
+	ldr	r4, [r1, r2, lsl #2]
+	cbnz	r4, .L1179
+	ldr	r4, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	it	hi
+	movhi	r3, #0
+	str	r4, [r1, r2, lsl #2]
+	subs	r2, r2, #1
+	cmp	r2, #4096
+	bne	.L1181
+.L1179:
+	ldr	r1, [r0, r2, lsl #2]
+	mov	r3, #512
+	ldr	r0, .L1227+12
+	bl	printf
+	ldr	r3, .L1227+16
+	ldr	r2, [sp, #8]
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #20]
+	muls	r3, r2, r3
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #16]
+	mul	r4, r3, r2
+	movs	r3, #0
+	str	r3, [sp, #12]
+.L1182:
+	ldr	r3, [sp, #16]
+	cmp	r3, #15
+	bls	.L1199
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L1201
+	mov	r1, r3
+	ldr	r0, .L1227+20
+	bl	printf
+.L1201:
+	ldr	r3, .L1227
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L1215
+.L1228:
 	.align	2
-.L1155:
-	.word	.LANCHOR136
-	.word	.LANCHOR170
+.L1227:
 	.word	.LANCHOR154
-	.word	.LANCHOR54
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR79
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR169
-	.word	.LANCHOR171
-	.word	.LANCHOR172
-	.word	.LANCHOR73
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR173
-	.word	.LANCHOR174
-	.word	.LANCHOR175
-	.word	.LANCHOR114
-	.word	.LANCHOR176
-	.word	.LANCHOR116
-	.word	.LANCHOR108
-	.word	.LANCHOR110
-	.word	.LANCHOR177
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR57
-	.word	.LANCHOR77
-	.word	.LANCHOR106
-	.word	.LANCHOR180
-	.word	.LANCHOR181
-	.word	.LANCHOR182
-	.word	.LANCHOR104
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR103
-	.word	.LANCHOR185
-	.word	.LANCHOR40
-	.word	.LANCHOR186
-	.word	.LANCHOR105
-	.word	.LANCHOR134
-	.word	33553920
-	.word	.LANCHOR188
-	.word	.LANCHOR78
-	.word	.LANCHOR83
-	.word	.LANCHOR126
-	.word	.LANCHOR122
-	.word	.LANCHOR0
-	.word	.LANCHOR71
-	.word	.LANCHOR189
-	.word	.LANCHOR190
-	.word	.LANCHOR191
-	.word	.LANCHOR66
-	.word	.LANCHOR128
-	.word	.LANCHOR192
-	.word	.LANCHOR67
-	.word	.LANCHOR127
-	.word	.LANCHOR44
-	.word	.LANCHOR96
-	.word	.LANCHOR123
-	.word	.LANCHOR120
-	.word	.LANCHOR81
-	.word	.LANCHOR50
-	.word	.LANCHOR74
-	.word	.LANCHOR37
-	.word	.LANCHOR107
-	.word	.LANCHOR58
-	.word	.LANCHOR64
-	.word	.LANCHOR187
-	.word	.LANCHOR61
-	.word	.LANCHOR62
-.L1156:
-.LVL1379:
-.L1151:
-	.loc 4 471 0 is_stmt 0 discriminator 1
-	cmp	r2, r6
-	bcc	.L1152
-	add	r3, r3, r2, lsl #2
-	ldr	r2, .L1158
-.LVL1380:
-	.loc 4 478 0 is_stmt 1
+	.word	idb_buf
+	.word	.LANCHOR18
+	.word	.LC15
+	.word	.LANCHOR149
+	.word	.LC17
+.L1199:
+	mov	r2, #512
 	movs	r1, #0
-	adds	r3, r3, #24
-.L1153:
-	.loc 4 476 0 discriminator 1
-	cmp	r3, r2
-	bne	.L1154
-	.loc 4 605 0
+	ldr	r0, .L1229
+	bl	memset
+	ldr	r3, .L1229+4
+	mov	r0, r4
+	ldr	r3, [r3]
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	ldrh	r5, [r3, #10]
+	bl	FW_FlashBlockErase.constprop.41
+	smulbb	r5, r5, fp
+	uxth	r5, r5
+	cmp	r5, #512
+	bcs	.L1183
+	adds	r0, r5, r4
+	bl	FW_FlashBlockErase.constprop.41
+.L1183:
+	ldr	r7, .L1229+8
+	mov	r1, r5
+	ldr	r10, .L1229+36
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	mov	r6, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #24]
+.L1187:
+	lsrs	r2, r6, #2
+	beq	.L1184
+	ldr	r0, .L1229+12
+	adds	r1, r2, #1
+	ldr	r3, .L1229+16
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r0, .L1185
+	ldr	r0, [r10]
+	ldr	r5, .L1229+20
+	cmp	r0, r5
+	it	eq
+	moveq	r3, r1
+.L1185:
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	lsls	r3, r3, #2
+	str	r3, [sp, #40]
+.L1184:
+	movw	r3, #61424
+	str	r3, [sp, #44]
+	ldr	r3, .L1229+16
+	ldrh	r5, [r3, r2, lsl #1]
+	ldr	r3, .L1229+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1186
+	ldr	r3, [r10]
+	ldr	r1, .L1229+20
+	cmp	r3, r1
+	it	eq
+	moveq	r5, r2
+.L1186:
+	ldr	r3, [sp, #24]
+	adds	r6, r6, #4
+	ldr	r2, .L1229+24
+	ldr	r8, .L1229+4
+	mla	r3, r5, fp, r3
+	adds	r5, r5, #1
+	uxth	r5, r5
+	str	r3, [sp, #32]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	ldr	r2, .L1229+28
+	str	r3, [sp, #28]
+	ldrb	r0, [r2]	@ zero_extendqisi2
+	bl	FlashBchSel
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1381:
-.L1152:
-	.loc 4 473 0 discriminator 3
-	ldr	r5, [r3, #28]
-	.loc 4 471 0 discriminator 3
-	adds	r2, r2, #1
-.LVL1382:
-	.loc 4 473 0 discriminator 3
-	add	r5, r5, r0
-	add	r0, r0, r1
-	str	r5, [r4, #4]!
-	b	.L1151
-.LVL1383:
-.L1154:
-	.loc 4 478 0 discriminator 2
-	str	r1, [r3, #4]!
-	b	.L1153
-.L1159:
-	.align	2
-.L1158:
-	.word	.LANCHOR74+56
-	.cfi_endproc
-.LFE297:
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.ftl_free,"ax",%progbits
-	.align	1
-	.global	ftl_free
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
-.LFB486:
-	.loc 7 62 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1384:
-.LBB351:
-.LBB352:
-	.file 8 "include/linux/compat.h"
-	.loc 8 80 0
-	b	free
-.LVL1385:
-.LBE352:
-.LBE351:
-	.cfi_endproc
-.LFE486:
-	.size	ftl_free, .-ftl_free
-	.section	.text.StorageSysDataLoad,"ax",%progbits
-	.align	1
-	.global	StorageSysDataLoad
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-.LFB487:
-	.loc 7 67 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1386:
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 7 67 0
-	mov	r4, r1
+	bl	flash_boot_enter_slc_mode
+	ldr	r2, [r8]
+	ldr	r3, [sp, #32]
+	ldrb	r1, [r2, #9]	@ zero_extendqisi2
+	mov	r0, r3
+	bl	__aeabi_uidiv
+	add	r3, sp, #40
+	mov	r2, r7
+	mov	r1, r0
+	movs	r0, #0
+	bl	FlashProgPage
+	movs	r0, #0
+	add	r7, r7, #2048
+	bl	flash_boot_exit_slc_mode
+	ldr	r0, [sp, #28]
+	bl	FlashBchSel
+	mov	r1, fp
+	ldr	r0, [sp, #24]
+	bl	__aeabi_uidiv
+	mov	r2, r5
+	mov	r1, r0
+	movs	r0, #0
+	bl	FlashPageProgMsbFFData
+	ldr	r3, .L1229+32
+	cmp	r7, r3
+	bne	.L1187
+	ldr	r3, [r8]
+	mov	r0, r4
+	ldr	r7, .L1229
+	movs	r6, #0
+	ldrb	r8, [r3, #9]	@ zero_extendqisi2
+	ldrh	r1, [r3, #10]
+	smulbb	r1, r1, r8
+	uxth	r1, r1
+	bl	__aeabi_uidivmod
+	mul	r5, r8, r1
+	mov	r10, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #28]
+	ubfx	r5, r5, #2, #2
+.L1188:
+	cmp	r6, #512
+	bcs	.L1195
+	ldr	r1, .L1229+12
+	rsb	r3, r5, #4
+	uxth	r3, r3
+	ldr	r2, .L1229+16
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	str	r3, [sp, #24]
+	add	r3, r10, r6
+	lsrs	r3, r3, #2
+	ldrh	r2, [r2, r3, lsl #1]
+	cbz	r1, .L1189
+	ldr	r1, .L1229+36
+	ldr	r0, .L1229+20
+	ldr	r1, [r1]
+	cmp	r1, r0
+	it	eq
+	moveq	r2, r3
+.L1189:
+	ldr	r3, [sp, #28]
+	add	r5, r5, r3
+	ldr	r3, .L1229+24
+	mla	r5, r2, r8, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #32]
+	ldr	r3, .L1229+4
+	ldr	r3, [r3]
+	ldrb	fp, [r3, #9]	@ zero_extendqisi2
+	ldr	r3, .L1229+40
+	ldrh	r2, [r3, #26]
+	ldr	r3, .L1229+44
+	ldr	r3, [r3]
+	muls	r3, r2, r3
+	mul	r3, fp, r3
+	cmp	r5, r3
+	bcs	.L1190
+	ldr	r3, .L1229+28
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	FlashBchSel
+.L1190:
+	movs	r0, #0
+	bl	flash_boot_enter_slc_mode
+	mov	r1, fp
+	mov	r0, r5
+	bl	__aeabi_uidiv
+	add	r3, sp, #40
+	mov	r1, r0
+	mov	fp, r0
+	mov	r2, r7
+	movs	r0, #0
+	bl	FlashReadPage
+	adds	r3, r0, #1
+	mov	r5, r0
+	bne	.L1191
+	ldr	r3, .L1229+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #40
+	beq	.L1191
+	movs	r0, #40
+	bl	FlashBchSel
+	add	r3, sp, #40
+	mov	r2, r7
+	mov	r1, fp
+	movs	r0, #0
+	bl	FlashReadPage
 	mov	r5, r0
-	.loc 7 70 0
+.L1191:
+	movs	r0, #0
+	bl	flash_boot_exit_slc_mode
+	ldr	r0, [sp, #32]
+	bl	FlashBchSel
+	adds	r5, r5, #1
+	mov	r5, #-1
+	it	ne
+	movne	r5, #0
+	cbz	r5, .L1192
+.L1195:
+	ldr	r3, .L1229+8
+	movs	r5, #0
+	ldr	r6, .L1229
+.L1193:
+	mov	r7, r3
+	ldr	r1, [r6, r5, lsl #2]
+	ldr	r2, [r7]
+	adds	r3, r3, #4
+	cmp	r1, r2
+	beq	.L1196
 	mov	r2, #512
 	movs	r1, #0
-.LVL1387:
-	mov	r0, r4
-.LVL1388:
+	ldr	r0, .L1229
 	bl	memset
-.LVL1389:
-	.loc 7 71 0
-	mov	r3, r4
-	add	r1, r5, #256
-	movs	r2, #1
-	movs	r0, #16
-	.loc 7 73 0
-	pop	{r4, r5, r6, lr}
-	.cfi_restore 14
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL1390:
-	.loc 7 71 0
-	b	FtlRead
-.LVL1391:
-	.cfi_endproc
-.LFE487:
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.StorageSysDataStore,"ax",%progbits
+	str	r5, [sp]
+	mov	r1, r4
+	ldr	r3, [r7]
+	ldr	r2, [r6, r5, lsl #2]
+	ldr	r0, .L1229+48
+	bl	printf
+	mov	r0, r4
+	bl	FW_FlashBlockErase.constprop.41
+	ldr	r3, [sp, #20]
+	cmp	r3, #1
+	bls	.L1197
+	ldr	r3, [sp, #8]
+	adds	r0, r3, r4
+	bl	FW_FlashBlockErase.constprop.41
+.L1197:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	add	r3, r3, r2
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #36]
+	add	r4, r4, r3
+	b	.L1182
+.L1192:
+	ldr	r3, [sp, #24]
+	add	r6, r6, r3
+	add	r7, r7, r3, lsl #9
+	uxth	r6, r6
+	b	.L1188
+.L1196:
+	adds	r5, r5, #1
+	cmp	r5, #65536
+	bne	.L1193
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #12]
+	bls	.L1197
+	b	.L1201
+.L1230:
+	.align	2
+.L1229:
+	.word	gp_flash_check_buf
+	.word	.LANCHOR18
+	.word	idb_buf
+	.word	.LANCHOR8
+	.word	.LANCHOR16
+	.word	1446522928
+	.word	.LANCHOR33
+	.word	.LANCHOR152
+	.word	idb_buf+262144
+	.word	.LANCHOR29
+	.word	.LANCHOR15
+	.word	.LANCHOR3
+	.word	.LC16
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	StorageSysDataStore
+	.global	ftl_memcmp
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-.LFB488:
-	.loc 7 76 0
-	.cfi_startproc
+	.type	ftl_memcmp, %function
+ftl_memcmp:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1392:
-	.loc 7 79 0
-	mov	r3, r1
-	movs	r2, #1
-	add	r1, r0, #256
-.LVL1393:
-	movs	r0, #16
-.LVL1394:
-	b	FtlWrite
-.LVL1395:
-	.cfi_endproc
-.LFE488:
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.section	.text.FlashBootVendorRead,"ax",%progbits
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
 	.align	1
-	.global	FlashBootVendorRead
+	.global	rknand_get_clk_rate
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashBootVendorRead, %function
-FlashBootVendorRead:
-.LFB489:
-	.loc 7 84 0
-	.cfi_startproc
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1396:
-	.loc 7 87 0
-	mov	r3, r2
-	mov	r1, r0
-.LVL1397:
-	movs	r2, #1
-.LVL1398:
-	movs	r0, #16
-.LVL1399:
-	b	FtlRead
-.LVL1400:
-	.cfi_endproc
-.LFE489:
-	.size	FlashBootVendorRead, .-FlashBootVendorRead
-	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	ldr	r0, .L1233
+	bx	lr
+.L1234:
+	.align	2
+.L1233:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	FlashBootVendorWrite
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-.LFB490:
-	.loc 7 92 0
-	.cfi_startproc
+	.type	ftl_malloc, %function
+ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1401:
-	.loc 7 95 0
-	mov	r3, r2
-	mov	r1, r0
-.LVL1402:
-	movs	r2, #1
-.LVL1403:
-	movs	r0, #16
-.LVL1404:
-	b	FtlWrite
-.LVL1405:
-	.cfi_endproc
-.LFE490:
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
-	.section	.text.FlashCs123Init,"ax",%progbits
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",%progbits
 	.align	1
-	.global	FlashCs123Init
+	.global	NandcInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashCs123Init, %function
-FlashCs123Init:
-.LFB491:
-	.loc 7 101 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.cfi_endproc
-.LFE491:
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",%progbits
-	.align	1
-	.global	rk_nand_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
-.LFB493:
-	.loc 7 116 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	.loc 7 117 0
-	b	FlashDeInit
-.LVL1406:
-	.cfi_endproc
-.LFE493:
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",%progbits
-	.align	1
-	.global	rk_ftl_get_capacity
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
-.LFB495:
-	.loc 7 128 0
-	.cfi_startproc
+	.type	NandcInit, %function
+NandcInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	.loc 7 130 0
-	ldr	r3, .L1168
-	ldr	r0, [r3]
-	bx	lr
-.L1169:
+	push	{r3, r4, r5, lr}
+	movs	r2, #1
+	ldr	r3, .L1238
+	movs	r4, #0
+	ldr	r5, .L1238+4
+	str	r2, [r3, #12]
+	movs	r2, #2
+	str	r2, [r3, #20]
+	movs	r2, #3
+	stm	r3, {r0, r4}
+	str	r0, [r3, #8]
+	str	r0, [r3, #16]
+	str	r2, [r3, #28]
+	str	r0, [r3, #24]
+	ldr	r3, .L1238+8
+	ldr	r2, .L1238+12
+	str	r0, [r3]
+	ldr	r3, [r0]
+	and	r3, r3, #253952
+	ubfx	r1, r3, #13, #1
+	bfi	r3, r4, #13, #1
+	str	r1, [r2]
+	orr	r3, r3, #256
+	ldr	r2, [r0, #352]
+	ldr	r1, .L1238+16
+	ubfx	r2, r2, #16, #4
+	str	r2, [r1]
+	ldr	r2, [r0, #352]
+	str	r2, [r5]
+	movw	r5, #2049
+	cmp	r2, r5
+	itt	eq
+	moveq	r2, #8
+	streq	r2, [r1]
+	str	r3, [r0]
+	movw	r3, #4225
+	str	r4, [r0, #336]
+	str	r3, [r0, #4]
+	movw	r3, #8322
+	str	r3, [r0, #344]
+	ldr	r3, .L1238+20
+	str	r3, [r0, #304]
+	mov	r0, #36864
+	bl	ftl_malloc
+	ldr	r3, .L1238+24
+	str	r0, [r3]
+	ldr	r3, .L1238+28
+	str	r0, [r3]
+	add	r0, r0, #32768
+	str	r0, [r3, #4]
+	str	r4, [r3, #24]
+	ldr	r3, .L1238+32
+	str	r4, [r3]
+	pop	{r3, r4, r5, pc}
+.L1239:
 	.align	2
-.L1168:
-	.word	.LANCHOR68
-	.cfi_endproc
-.LFE495:
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",%progbits
+.L1238:
+	.word	.LANCHOR6
+	.word	.LANCHOR29
+	.word	.LANCHOR19
+	.word	.LANCHOR155
+	.word	.LANCHOR34
+	.word	1710593
+	.word	.LANCHOR156
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	rknand_print_hex
+	.global	FtlMemInit
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rknand_print_hex, %function
-rknand_print_hex:
-.LFB496:
-	.loc 7 133 0
-	.cfi_startproc
+	.type	FtlMemInit, %function
+FtlMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1407:
+	ldr	r3, .L1245
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 7 141 0
-	movs	r5, #0
-	.loc 7 154 0
-	ldr	r7, .L1179
-	.loc 7 133 0
-	mov	fp, r0
-	mov	r6, r1
-	mov	r8, r2
-	mov	r10, r3
-	.loc 7 142 0
-	mov	r4, r5
-.LVL1408:
-.L1171:
-	.loc 7 142 0 is_stmt 0 discriminator 1
-	cmp	r4, r10
-	bne	.L1177
-	.loc 7 162 0 is_stmt 1
-	ldr	r1, .L1179+4
-	ldr	r0, .L1179+8
-	.loc 7 164 0
-	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 11
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL1409:
-	.loc 7 162 0
-	b	printf
-.LVL1410:
-.L1177:
-	.cfi_restore_state
-	.loc 7 144 0
-	cbnz	r5, .L1172
-	.loc 7 146 0
-	mov	r2, r4
-	mov	r1, fp
-	ldr	r0, .L1179+12
-	bl	printf
-.LVL1411:
-.L1172:
-	.loc 7 149 0
-	cmp	r8, #4
-	bne	.L1173
-	.loc 7 150 0
-	ldr	r1, [r6, r4, lsl #2]
-.L1178:
-	.loc 7 154 0
+	movs	r4, #0
+	ldr	r2, .L1245+4
+	movs	r6, #12
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+8
+	ldr	r5, .L1245+12
+	ldr	r10, .L1245+304
+	str	r4, [r3]
+	ldr	r3, .L1245+16
+	ldr	r8, .L1245+308
+	ldr	fp, .L1245+312
+	str	r4, [r3]
+	ldr	r3, .L1245+20
+	str	r4, [r3]
+	ldr	r3, .L1245+24
+	str	r4, [r3]
+	ldr	r3, .L1245+28
+	str	r4, [r3]
+	ldr	r3, .L1245+32
+	str	r4, [r3]
+	ldr	r3, .L1245+36
+	str	r4, [r3]
+	ldr	r3, .L1245+40
+	str	r4, [r3]
+	ldr	r3, .L1245+44
+	str	r4, [r3]
+	ldr	r3, .L1245+48
+	str	r4, [r3]
+	ldr	r3, .L1245+52
+	str	r4, [r3]
+	ldr	r3, .L1245+56
+	str	r4, [r3]
+	ldr	r3, .L1245+60
+	str	r4, [r3]
+	ldr	r3, .L1245+64
+	str	r4, [r3]
+	ldr	r3, .L1245+68
+	str	r4, [r3]
+	ldr	r3, .L1245+72
+	str	r4, [r3]
+	ldr	r3, .L1245+76
+	str	r4, [r3]
+	movw	r3, #65535
+	str	r3, [r2]
+	ldr	r2, .L1245+80
+	str	r4, [r2]
+	ldr	r2, .L1245+84
+	str	r4, [r2]
+	ldr	r2, .L1245+88
+	str	r4, [r2]
+	ldr	r2, .L1245+92
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1245+96
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1245+100
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1245+104
+	strh	r3, [r2]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L1245+108
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L1245+112
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1245+116
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+120
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+124
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1245+128
+	strh	r4, [r3]	@ movhi
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+132
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	movs	r5, #36
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+136
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	muls	r5, r3, r5
+	lsls	r7, r5, #2
 	mov	r0, r7
-	.loc 7 156 0
-	adds	r5, r5, #1
-.LVL1412:
-	.loc 7 154 0
-	bl	printf
-.LVL1413:
-	.loc 7 156 0
-	cmp	r5, #15
-	bls	.L1176
-.LVL1414:
-	.loc 7 158 0
-	movs	r5, #0
-	.loc 7 159 0
-	ldr	r1, .L1179+4
-	ldr	r0, .L1179+8
-	bl	printf
-.LVL1415:
-.L1176:
-	.loc 7 142 0 discriminator 2
-	adds	r4, r4, #1
-.LVL1416:
-	b	.L1171
-.L1173:
-	.loc 7 151 0
-	cmp	r8, #2
-	.loc 7 152 0
-	ite	eq
-	ldrsheq	r1, [r6, r4, lsl #1]
-	.loc 7 154 0
-	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1178
-.L1180:
-	.align	2
-.L1179:
-	.word	.LC17
-	.word	.LC18
-	.word	.LC8
-	.word	.LC16
-	.cfi_endproc
-.LFE496:
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
-	.align	1
-	.global	HynixGetReadRetryDefault
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	HynixGetReadRetryDefault, %function
-HynixGetReadRetryDefault:
-.LFB236:
-	.loc 2 1362 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1417:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1377 0
-	movs	r3, #172
-	.loc 2 1375 0
-	ldr	r5, .L1278
-	.loc 2 1379 0
-	cmp	r0, #2
-	.loc 2 1377 0
-	mov	r1, #173
-	mov	r2, #174
-	.loc 2 1362 0
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 2 1362 0
-	mov	r4, r0
-	.loc 2 1377 0
-	strb	r3, [r5, #4]
-	mov	r3, #175
-	.loc 2 1375 0
-	strb	r0, [r5]
-.LVL1418:
-	.loc 2 1377 0
-	strb	r1, [r5, #5]
-.LVL1419:
-	strb	r2, [r5, #6]
-.LVL1420:
-	strb	r3, [r5, #7]
-.LVL1421:
-	.loc 2 1379 0
-	bne	.L1182
-	.loc 2 1380 0
-	movs	r3, #167
-	.loc 2 1381 0
-	movs	r2, #247
-	.loc 2 1380 0
-	strb	r3, [r5, #4]
-	.loc 2 1381 0
-	ldr	r3, .L1278+4
-	strb	r2, [r3, #17]
-.L1238:
-	.loc 2 1368 0
-	mov	r10, #7
-	b	.L1273
-.L1182:
-	.loc 2 1382 0
-	cmp	r0, #3
-	bne	.L1184
-.LVL1422:
-	.loc 2 1388 0 discriminator 1
-	movs	r3, #176
-	strb	r3, [r5, #4]
-.LVL1423:
-	movs	r3, #177
-	strb	r3, [r5, #5]
-.LVL1424:
-	movs	r3, #178
-	strb	r3, [r5, #6]
-.LVL1425:
-	movs	r3, #179
-	strb	r3, [r5, #7]
-.LVL1426:
-	movs	r3, #180
-	strb	r3, [r5, #8]
-.LVL1427:
-	movs	r3, #181
-	strb	r3, [r5, #9]
-.LVL1428:
-	movs	r3, #182
-	strb	r3, [r5, #10]
-.LVL1429:
-	movs	r3, #183
-.LVL1430:
-.L1274:
-	.loc 2 1392 0
-	mov	r10, #8
-	.loc 2 1400 0
-	strb	r3, [r5, #11]
-	.loc 2 1391 0
-	mov	fp, r10
-.L1183:
-.LVL1431:
-	.loc 2 1426 0
-	subs	r3, r4, #1
-	cmp	r3, #1
-	bhi	.L1188
-	mov	r8, #0
-.LVL1432:
-.L1189:
-	.loc 2 1427 0 discriminator 1
-	ldr	r3, .L1278+8
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	uxtb	r3, r8
-	cmp	r2, r3
-	bhi	.L1195
-.LVL1433:
-.L1196:
-	.loc 2 1600 0
-	ldr	r3, .L1278
-	strb	fp, [r3, #1]
-	.loc 2 1601 0
-	strb	r10, [r3, #2]
-	.loc 2 1602 0
-	add	sp, sp, #64
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1434:
-.L1184:
-	.cfi_restore_state
-	.loc 2 1389 0
-	cmp	r0, #4
-	bne	.L1185
-.LVL1435:
-	.loc 2 1393 0
-	movs	r0, #204
-.LVL1436:
-	.loc 2 1398 0
-	strb	r1, [r5, #9]
-	.loc 2 1393 0
-	strb	r0, [r5, #4]
-	.loc 2 1394 0
-	movs	r0, #191
-	strb	r0, [r5, #5]
-	.loc 2 1395 0
-	movs	r0, #170
-	strb	r0, [r5, #6]
-	.loc 2 1396 0
-	movs	r0, #171
-	strb	r0, [r5, #7]
-	.loc 2 1397 0
-	movs	r0, #205
-	strb	r0, [r5, #8]
-	.loc 2 1399 0
-	strb	r2, [r5, #10]
-	b	.L1274
-.LVL1437:
-.L1185:
-	.loc 2 1401 0
-	cmp	r0, #5
-	bne	.L1186
-.LVL1438:
-	.loc 2 1405 0
-	movs	r3, #56
-	.loc 2 1404 0
-	mov	r10, #8
-	.loc 2 1405 0
-	strb	r3, [r5, #4]
-	.loc 2 1406 0
-	movs	r3, #57
-	strb	r3, [r5, #5]
-	.loc 2 1407 0
-	movs	r3, #58
-	strb	r3, [r5, #6]
-	.loc 2 1408 0
-	movs	r3, #59
-	strb	r3, [r5, #7]
-.LVL1439:
-.L1273:
-	.loc 2 1367 0
-	mov	fp, #4
-	b	.L1183
-.LVL1440:
-.L1186:
-	.loc 2 1409 0
-	cmp	r0, #6
-	bne	.L1187
-.LVL1441:
-	.loc 2 1413 0
-	movs	r3, #14
-	.loc 2 1412 0
-	mov	r10, #12
-	.loc 2 1413 0
-	strb	r3, [r5, #4]
-	.loc 2 1414 0
-	movs	r3, #15
-	strb	r3, [r5, #5]
-	.loc 2 1415 0
-	movs	r3, #16
-	strb	r3, [r5, #6]
-	.loc 2 1416 0
-	movs	r3, #17
-	strb	r3, [r5, #7]
-	b	.L1273
-.LVL1442:
-.L1187:
-	.loc 2 1417 0
-	cmp	r0, #7
-	bne	.L1238
-.LVL1443:
-	.loc 2 1421 0 discriminator 1
-	movs	r3, #176
-	.loc 2 1419 0 discriminator 1
-	mov	r10, #12
-	.loc 2 1421 0 discriminator 1
-	strb	r3, [r5, #4]
-.LVL1444:
-	movs	r3, #177
-	strb	r3, [r5, #5]
-.LVL1445:
-	movs	r3, #178
-	strb	r3, [r5, #6]
-.LVL1446:
-	movs	r3, #179
-	strb	r3, [r5, #7]
-.LVL1447:
-	movs	r3, #180
-	strb	r3, [r5, #8]
-.LVL1448:
-	movs	r3, #181
-	strb	r3, [r5, #9]
-.LVL1449:
-	movs	r3, #182
-	strb	r3, [r5, #10]
-.LVL1450:
-	movs	r3, #183
-	strb	r3, [r5, #11]
-.LVL1451:
-	.loc 2 1422 0 discriminator 1
-	movs	r3, #212
-	strb	r3, [r5, #12]
-	.loc 2 1423 0 discriminator 1
-	movs	r3, #213
-	strb	r3, [r5, #13]
-	.loc 2 1418 0 discriminator 1
-	mov	fp, #10
-	b	.L1183
-.LVL1452:
-.L1195:
-.LBB353:
-	.loc 2 1429 0
-	ldr	r2, .L1278+12
-.LBB354:
-.LBB355:
-	.loc 3 126 0
-	movs	r6, #0
-.LBE355:
-.LBE354:
-	.loc 2 1429 0
-	ldrb	r2, [r2, r3]	@ zero_extendqisi2
-.LVL1453:
-.LBB359:
-.LBB356:
-	.loc 3 123 0
-	ldr	r3, .L1278+16
-	ldr	r7, [r3, r2, lsl #3]
-.LBE356:
-.LBE359:
-	.loc 2 1430 0
-	add	r4, r5, r2, lsl #6
-.LBB360:
-.LBB357:
-	.loc 3 124 0
-	add	r3, r3, r2, lsl #3
-.LBE357:
-.LBE360:
-	.loc 2 1434 0
-	movs	r2, #55
-.LVL1454:
-	.loc 2 1430 0
-	adds	r4, r4, #20
-.LVL1455:
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-.LVL1456:
-	.loc 2 1434 0
-	add	r7, r7, r3, lsl #8
-	addw	r3, r7, #2056
-.LVL1457:
-.L1190:
-	.loc 2 1435 0 discriminator 3
-	adds	r1, r5, r6
-	.loc 2 1434 0 discriminator 3
-	str	r2, [r3]
-	.loc 2 1435 0 discriminator 3
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-.LBB361:
-.LBB362:
-	.loc 3 306 0 discriminator 3
-	movs	r0, #80
-.LBE362:
-.LBE361:
-	.loc 2 1434 0 discriminator 3
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	.loc 2 1435 0 discriminator 3
-	str	r1, [r7, #2052]
-.LVL1458:
-.LBB364:
-.LBB363:
-	.loc 3 306 0 discriminator 3
-	bl	udelay
-.LVL1459:
-.LBE363:
-.LBE364:
-	.loc 2 1437 0 discriminator 3
-	ldr	r1, [r7, #2048]
-	.loc 2 1433 0 discriminator 3
-	ldr	r3, [sp]
-	ldr	r2, [sp, #4]
-	.loc 2 1437 0 discriminator 3
-	strb	r1, [r4, r6]
-.LVL1460:
-	adds	r6, r6, #1
-.LVL1461:
-	.loc 2 1433 0 discriminator 3
-	uxtb	r1, r6
-	cmp	fp, r1
-	bhi	.L1190
-	.loc 2 1442 0
-	ldr	r7, .L1278+4
-	mov	r1, r4
-	.loc 2 1433 0
-	movs	r2, #0
-.L1193:
-.LVL1462:
-.LBB365:
-.LBB358:
-	.loc 3 126 0
-	movs	r3, #1
-.LBE358:
-.LBE365:
-	.loc 2 1442 0
-	adds	r6, r7, r2
-.LVL1463:
-.L1192:
-	.loc 2 1442 0 is_stmt 0 discriminator 3
-	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
-	ldrb	ip, [r1]	@ zero_extendqisi2
-	add	r0, r0, ip
-	strb	r0, [r1, r3, lsl #3]
-	.loc 2 1441 0 is_stmt 1 discriminator 3
-	adds	r3, r3, #1
-.LVL1464:
-	cmp	r3, #7
-	bne	.L1192
-.LVL1465:
-	adds	r2, r2, #1
-.LVL1466:
-	adds	r1, r1, #1
-	.loc 2 1440 0 discriminator 2
-	cmp	r2, #4
-	bne	.L1193
-	.loc 2 1445 0 discriminator 2
-	movs	r3, #0
-.LVL1467:
-	add	r8, r8, #1
-.LVL1468:
-	strb	r3, [r4, #16]
-	.loc 2 1446 0 discriminator 2
-	strb	r3, [r4, #24]
-	.loc 2 1447 0 discriminator 2
-	strb	r3, [r4, #32]
-	.loc 2 1448 0 discriminator 2
-	strb	r3, [r4, #40]
-	.loc 2 1449 0 discriminator 2
-	strb	r3, [r4, #48]
-	.loc 2 1451 0 discriminator 2
-	strb	r3, [r4, #41]
-	.loc 2 1452 0 discriminator 2
-	strb	r3, [r4, #49]
-	b	.L1189
-.LVL1469:
-.L1188:
-.LBE353:
-	.loc 2 1454 0
-	subs	r3, r4, #3
-	cmp	r3, #4
-	bhi	.L1196
-.LBB366:
-.LBB367:
-	.loc 2 1534 0 discriminator 1
-	smulbb	r3, r10, fp
-	.loc 2 1506 0 discriminator 1
-	ldr	r8, .L1278+24
-	.loc 2 1534 0 discriminator 1
-	asrs	r2, r3, #2
-	.loc 2 1536 0 discriminator 1
-	lsls	r3, r3, #4
-	str	r3, [sp, #56]
-	lsls	r3, r2, #3
-	.loc 2 1534 0 discriminator 1
-	str	r2, [sp, #8]
-	str	r3, [sp, #48]
-	lsls	r3, r2, #2
-	str	r3, [sp, #24]
-	.loc 2 1536 0 discriminator 1
-	movs	r3, #0
-	str	r3, [sp, #20]
-.L1197:
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-.LVL1470:
-.LBE367:
-	.loc 2 1457 0 discriminator 1
-	ldr	r3, .L1278+8
-	ldr	r2, [sp, #12]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r2
-	bls	.L1196
-.LBB377:
-	.loc 2 1460 0
-	ldr	r2, [sp, #12]
-	ldr	r3, .L1278+12
-	ldrb	r7, [r3, r2]	@ zero_extendqisi2
-.LVL1471:
-.LBB368:
-.LBB369:
-	.loc 3 123 0
-	ldr	r3, .L1278+16
-.LBE369:
-.LBE368:
-	.loc 2 1464 0
-	mov	r0, r7
-.LBB371:
-.LBB370:
-	.loc 3 123 0
-	ldr	r2, [r3, r7, lsl #3]
-	.loc 3 124 0
-	add	r3, r3, r7, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	.loc 3 123 0
-	str	r2, [sp]
-.LVL1472:
-	str	r3, [sp, #4]
-.LVL1473:
-.LBE370:
-.LBE371:
-	.loc 2 1463 0
-	mov	r3, r2
-	ldr	r2, [sp, #4]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #255
-	str	r2, [r3, #2056]
-	.loc 2 1464 0
-	bl	NandcWaitFlashReady
-.LVL1474:
-	ldr	r1, .L1278
-	.loc 2 1465 0
-	cmp	r4, #7
-	.loc 2 1466 0
-	it	eq
-	moveq	r3, #160
-	.loc 2 1468 0
-	ldr	r2, [sp, #4]
-	.loc 2 1466 0
-	itete	eq
-	mlaeq	r1, r3, r7, r1
-	.loc 2 1461 0
-	addne	r1, r1, r7, lsl #6
-	.loc 2 1466 0
-	addeq	r3, r1, #28
-	.loc 2 1461 0
-	addne	r3, r1, #20
-	.loc 2 1466 0
-	str	r3, [sp, #28]
-.LVL1475:
-	.loc 2 1469 0
-	cmp	r4, #4
-	.loc 2 1468 0
-	ldr	r3, [sp]
-.LVL1476:
-	add	r3, r3, r2, lsl #8
-	mov	r2, #54
-	str	r2, [r3, #2056]
-	.loc 2 1469 0
-	bne	.L1200
-	.loc 2 1470 0
-	movs	r2, #255
-	str	r2, [r3, #2052]
-	.loc 2 1471 0
-	movs	r2, #64
-	str	r2, [r3, #2048]
-	.loc 2 1472 0
-	movs	r2, #204
-.L1276:
-	.loc 2 1480 0
-	str	r2, [r3, #2052]
-.LVL1477:
-	.loc 2 1481 0
-	movs	r2, #77
-	b	.L1277
-.LVL1478:
-.L1200:
-	.loc 2 1474 0
-	subs	r2, r4, #5
-	cmp	r2, #1
-	bhi	.L1202
-	.loc 2 1475 0
-	ldr	r2, .L1278
-	ldrb	r2, [r2, #4]	@ zero_extendqisi2
-	str	r2, [r3, #2052]
-	.loc 2 1476 0
-	movs	r2, #82
-.LVL1479:
-.L1277:
-	.loc 2 1481 0
-	str	r2, [r3, #2048]
-	.loc 2 1490 0
-	cmp	r4, #6
-	.loc 2 1483 0
-	ldr	r3, [sp]
-	.loc 2 1497 0
+	bl	ftl_malloc
+	ldr	r3, .L1245+140
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+144
+	str	r0, [r3]
 	mov	r0, r7
-	.loc 2 1483 0
-	ldr	r2, [sp, #4]
-	add	r5, r3, r2, lsl #8
-	mov	r3, #22
-	str	r3, [r5, #2056]
-	.loc 2 1484 0
-	mov	r3, #23
-	str	r3, [r5, #2056]
-	.loc 2 1485 0
-	mov	r3, #4
-	str	r3, [r5, #2056]
-	.loc 2 1486 0
-	mov	r3, #25
-	str	r3, [r5, #2056]
-	.loc 2 1487 0
-	mov	r3, #0
-	str	r3, [r5, #2056]
-	.loc 2 1488 0
-	str	r3, [r5, #2052]
-	.loc 2 1489 0
-	str	r3, [r5, #2052]
-	.loc 2 1491 0
-	it	eq
-	moveq	r3, #31
-	.loc 2 1493 0
-	str	r3, [r5, #2052]
-	.loc 2 1494 0
-	movs	r3, #2
-	str	r3, [r5, #2052]
-	.loc 2 1495 0
-	movs	r3, #0
-	str	r3, [r5, #2052]
-	.loc 2 1496 0
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	add	r3, r3, r2, lsl #8
-	movs	r2, #48
-	str	r2, [r3, #2056]
-	.loc 2 1497 0
-	bl	NandcWaitFlashReady
-.LVL1480:
-	.loc 2 1501 0
-	subs	r3, r4, #5
-	cmp	r3, #1
-	str	r3, [sp, #32]
-	bls	.L1239
-	.loc 2 1500 0
-	cmp	r4, #7
-	ite	eq
-	moveq	r2, #32
-	movne	r2, #2
-.L1205:
-.LVL1481:
-	.loc 2 1506 0
-	ldr	r3, [r8]
-.LVL1482:
-	subs	r2, r2, #1
-.LVL1483:
-	subs	r1, r3, #1
-	uxtab	r2, r3, r2
-	mov	r0, r1
-.LVL1484:
-.L1206:
-	.loc 2 1508 0 discriminator 3
-	ldr	r6, [r5, #2048]
-	strb	r6, [r0, #1]!
-.LVL1485:
-	.loc 2 1507 0 discriminator 3
-	cmp	r0, r2
-	bne	.L1206
-	.loc 2 1511 0
-	cmp	r4, #7
-	bne	.L1207
-	movs	r2, #0
-.LVL1486:
-.L1209:
-	.loc 2 1513 0
-	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
-	uxtb	r1, r2
-.LVL1487:
-	cmp	r0, #12
-	beq	.L1208
-	.loc 2 1515 0
-	add	r0, r3, r2, lsl #2
-	ldrb	r0, [r0, #1]	@ zero_extendqisi2
-	cmp	r0, #10
-	beq	.L1208
-.LVL1488:
-	adds	r2, r2, #1
-.LVL1489:
-	.loc 2 1512 0 discriminator 2
-	cmp	r2, #8
-	bne	.L1209
-.LVL1490:
-.L1210:
-	.loc 2 1519 0
-	movs	r1, #0
-	ldr	r0, .L1278+20
-	bl	printf
-.LVL1491:
-.L1212:
-	b	.L1212
-.LVL1492:
-.L1202:
-	.loc 2 1478 0
-	movs	r2, #174
-	str	r2, [r3, #2052]
-	.loc 2 1479 0
-	movs	r2, #0
-	str	r2, [r3, #2048]
-	.loc 2 1480 0
-	movs	r2, #176
-	b	.L1276
-.LVL1493:
-.L1239:
-	.loc 2 1502 0
-	movs	r2, #16
-	b	.L1205
-.L1279:
-	.align	2
-.L1278:
-	.word	.LANCHOR20
-	.word	.LANCHOR193
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR6
-	.word	.LC19
-	.word	.LANCHOR144
-.LVL1494:
-.L1208:
-	.loc 2 1518 0
-	cmp	r1, #6
-	bhi	.L1210
-.LVL1495:
-.L1211:
-	.loc 2 1535 0
-	ldr	lr, [r8]
-.LVL1496:
-	.loc 2 1536 0
-	mov	r3, lr
-.LVL1497:
-.L1216:
-	.loc 2 1536 0 is_stmt 0 discriminator 1
-	ldr	r1, [sp, #56]
-	sub	r2, r3, lr
-.LVL1498:
-	cmp	r2, r1
-	blt	.L1217
-.LVL1499:
-	ldr	r3, [r8]
-	ldr	r2, [sp, #24]
-	adds	r1, r3, r2
-	.loc 2 1539 0 is_stmt 1
-	movs	r3, #8
-.LVL1500:
-.L1219:
-	mov	r6, r1
-.LBB372:
-	.loc 2 1542 0
-	movs	r0, #0
-.LVL1501:
-.L1218:
-	.loc 2 1543 0 discriminator 3
-	ldr	r2, [r6]
-	.loc 2 1542 0 discriminator 3
-	adds	r0, r0, #1
-.LVL1502:
-	.loc 2 1543 0 discriminator 3
-	mvns	r2, r2
-	str	r2, [r6], #4
-	.loc 2 1542 0 discriminator 3
-	ldr	r2, [sp, #8]
-	cmp	r2, r0
-	bgt	.L1218
-.LVL1503:
-	ldr	r2, [sp, #48]
-.LBE372:
-	.loc 2 1540 0 discriminator 2
-	subs	r3, r3, #1
-.LVL1504:
-	add	r1, r1, r2
-	bne	.L1219
-.LVL1505:
-.L1225:
-	lsls	r2, r3, #2
-	lsls	r1, r3, #2
-	str	r2, [sp, #60]
-	ldr	r2, [r8]
-	str	r2, [sp, #44]
-	add	r2, r2, r1
-.LBB373:
-.LBB374:
-	.loc 2 1555 0
-	movs	r1, #0
-	str	r2, [sp, #52]
-	mov	r2, r1
-.LVL1506:
-.L1224:
-	.loc 2 1553 0
-	movs	r0, #1
-	ldr	ip, [sp, #52]
-	lsls	r0, r0, r2
-	str	r0, [sp, #36]
-.LVL1507:
-	movs	r0, #16
-.LVL1508:
-	str	r0, [sp, #40]
-	.loc 2 1552 0
-	movs	r0, #0
-	str	r0, [sp, #16]
-.LVL1509:
-.L1222:
-	.loc 2 1555 0
-	ldr	r6, [sp, #36]
-	mov	r0, r6
-	ldr	r6, [ip]
-	bics	r0, r0, r6
-	ldr	r6, [sp, #24]
-	.loc 2 1556 0
-	it	eq
-	ldreq	r0, [sp, #16]
-	add	ip, ip, r6
-	itt	eq
-	addeq	r0, r0, #1
-	streq	r0, [sp, #16]
-.LVL1510:
-	.loc 2 1554 0
-	ldr	r0, [sp, #40]
-	subs	r0, r0, #1
-	str	r0, [sp, #40]
-.LVL1511:
-	bne	.L1222
-	.loc 2 1558 0
-	ldr	r0, [sp, #16]
-.LVL1512:
-.LBE374:
-	.loc 2 1551 0
-	adds	r2, r2, #1
-.LVL1513:
-.LBB375:
-	.loc 2 1558 0
-	cmp	r0, #8
-	.loc 2 1559 0
-	itt	hi
-	ldrhi	r0, [sp, #36]
-	orrhi	r1, r1, r0
-.LVL1514:
-.LBE375:
-	.loc 2 1551 0
-	cmp	r2, #32
-	bne	.L1224
-	.loc 2 1561 0 discriminator 2
-	ldr	r2, [sp, #44]
-.LVL1515:
-.LBE373:
-	.loc 2 1546 0 discriminator 2
-	adds	r3, r3, #1
-.LVL1516:
-.LBB376:
-	.loc 2 1561 0 discriminator 2
-	ldr	r0, [sp, #60]
-	str	r1, [r2, r0]
-.LBE376:
-	.loc 2 1546 0 discriminator 2
-	ldr	r2, [sp, #8]
-	cmp	r2, r3
-	bgt	.L1225
-	.loc 2 1566 0
-	ldr	r1, [r8]
-.LVL1517:
-	movs	r3, #0
-.LVL1518:
-	subs	r2, r1, #4
-	add	r0, r1, #28
-.LVL1519:
-.L1228:
-	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1227
-	.loc 2 1567 0
-	adds	r3, r3, #1
-.LVL1520:
-.L1227:
-	.loc 2 1565 0 discriminator 2
-	cmp	r0, r2
-	bne	.L1228
-	.loc 2 1569 0
-	cmp	r3, #7
-	ble	.L1229
-	.loc 2 1570 0
-	ldr	r0, .L1280
-	mov	r3, #1024
-.LVL1521:
-	movs	r2, #1
-	bl	rknand_print_hex
-.LVL1522:
-	.loc 2 1571 0
-	movs	r1, #0
-	ldr	r0, .L1280+4
-	bl	printf
-.LVL1523:
-.L1230:
-	b	.L1230
-.LVL1524:
-.L1207:
-	.loc 2 1522 0
-	cmp	r4, #6
-	bne	.L1211
-	adds	r3, r3, #7
-.LVL1525:
-.L1213:
-	.loc 2 1524 0
-	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
-.LVL1526:
-	cmp	r2, #12
-	beq	.L1211
-	.loc 2 1526 0
-	ldrb	r2, [r1, #8]	@ zero_extendqisi2
-	cmp	r2, #4
-	beq	.L1211
-.LVL1527:
-	.loc 2 1523 0 discriminator 2
-	cmp	r1, r3
-	bne	.L1213
-	.loc 2 1530 0
-	movs	r1, #0
-.LVL1528:
-	ldr	r0, .L1280+4
-	bl	printf
-.LVL1529:
-.L1215:
-	b	.L1215
-.LVL1530:
-.L1217:
-	.loc 2 1537 0 discriminator 3
-	ldr	r2, [r5, #2048]
-	strb	r2, [r3], #1
-	b	.L1216
-.LVL1531:
-.L1229:
-	.loc 2 1576 0
-	cmp	r4, #6
-	beq	.L1241
-	.loc 2 1575 0
-	cmp	r4, #7
-	ite	eq
-	moveq	ip, #10
-	movne	ip, #8
-.L1231:
-.LVL1532:
-	add	r3, fp, #-1
-.LVL1533:
-	ldr	r1, [sp, #28]
-	uxtb	r3, r3
-	.loc 2 1580 0
-	movs	r0, #0
-	adds	r3, r3, #1
-	str	r3, [sp, #16]
-.LVL1534:
-.L1232:
-	.loc 2 1579 0
-	mov	r3, r1
-	mov	r2, lr
-.LVL1535:
-.L1233:
-	.loc 2 1582 0 discriminator 3
-	ldrb	r6, [r2], #1	@ zero_extendqisi2
-.LVL1536:
-	strb	r6, [r3], #1
-.LVL1537:
-	.loc 2 1581 0 discriminator 3
-	sub	r6, r2, lr
-	uxtb	r6, r6
-	cmp	fp, r6
-	bhi	.L1233
-	ldr	r3, [sp, #16]
-	.loc 2 1580 0 discriminator 2
-	adds	r0, r0, #1
-.LVL1538:
-	cmp	r10, r0
-	add	r1, r1, ip
-	add	lr, lr, r3
-.LVL1539:
-	bgt	.L1232
-	.loc 2 1586 0
-	ldr	r3, [sp]
-	.loc 2 1587 0
-	mov	r0, r7
-.LVL1540:
-	.loc 2 1586 0
-	ldr	r2, [sp, #4]
-	add	r6, r3, r2, lsl #8
-	movs	r3, #255
-	str	r3, [r6, #2056]
-	.loc 2 1587 0
-	bl	NandcWaitFlashReady
-.LVL1541:
-	.loc 2 1588 0
-	ldr	r3, [sp, #32]
-	cmp	r3, #1
-	bhi	.L1235
-	.loc 2 1589 0
-	movs	r3, #54
-	.loc 2 1593 0
-	mov	r1, #-1
-	.loc 2 1589 0
-	str	r3, [r6, #2056]
-	.loc 2 1590 0
-	ldr	r3, .L1280+8
-	.loc 2 1593 0
-	ldr	r0, [sp, #12]
-	.loc 2 1590 0
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r5, #2052]
-	.loc 2 1591 0
-	movs	r3, #0
-	str	r3, [r5, #2048]
-	.loc 2 1592 0
-	movs	r3, #22
-	str	r3, [r6, #2056]
-	.loc 2 1593 0
-	bl	FlashReadCmd
-.LVL1542:
-.L1236:
-	.loc 2 1597 0 discriminator 2
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-.LVL1543:
-	ldr	r3, [sp, #20]
+	bl	ftl_malloc
+	ldr	r3, .L1245+148
+	ldr	r7, .L1245+152
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+156
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+160
+	ldrh	r5, [r7]
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	mov	r0, r5
+	lsls	r3, r3, #1
 	adds	r3, r3, #1
-	str	r3, [sp, #20]
-.LVL1544:
-	b	.L1197
-.LVL1545:
-.L1241:
-	.loc 2 1577 0
-	mov	ip, #4
-	b	.L1231
-.LVL1546:
-.L1235:
-	.loc 2 1595 0
-	movs	r3, #56
-	str	r3, [r6, #2056]
-	b	.L1236
-.L1281:
-	.align	2
-.L1280:
-	.word	.LC20
-	.word	.LC19
-	.word	.LANCHOR20
-.LBE377:
-.LBE366:
-	.cfi_endproc
-.LFE236:
-	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
-	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
-	.align	1
-	.global	FlashGetReadRetryDefault
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashGetReadRetryDefault, %function
-FlashGetReadRetryDefault:
-.LFB237:
-	.loc 2 1674 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL1547:
-	.loc 2 1675 0
-	mov	r3, r0
-	cbz	r0, .L1282
-	.loc 2 1677 0
-	subs	r2, r0, #1
-	cmp	r2, #6
-	bhi	.L1284
-	.loc 2 1678 0
-	b	HynixGetReadRetryDefault
-.LVL1548:
-.L1284:
-	.loc 2 1679 0
-	cmp	r0, #49
-	bne	.L1285
-	.loc 2 1680 0
-	ldr	r0, .L1305
-.LVL1549:
-	.loc 2 1683 0
-	movs	r2, #64
-	ldr	r1, .L1305+4
-	.loc 2 1680 0
-	strb	r3, [r0]
-	.loc 2 1681 0
-	movs	r3, #4
-.LVL1550:
-	strb	r3, [r0, #1]
-	.loc 2 1682 0
-	movs	r3, #15
-	strb	r3, [r0, #2]
-.L1303:
-.LBB380:
-.LBB381:
-	.loc 2 1701 0
-	adds	r0, r0, #4
-	b	ftl_memcpy
-.LVL1551:
-.L1285:
-.LBE381:
-.LBE380:
-	.loc 2 1684 0
-	cmp	r0, #33
-	beq	.L1286
-	.loc 2 1684 0 is_stmt 0 discriminator 1
-	sub	r2, r0, #65
-	cmp	r2, #1
-	bhi	.L1287
-.L1286:
-	.loc 2 1686 0 is_stmt 1
-	ldr	r0, .L1305
-.LVL1552:
-	strb	r3, [r0]
-	.loc 2 1687 0
-	movs	r3, #4
-.LVL1553:
-.L1304:
-.LBB383:
-.LBB382:
-	.loc 2 1693 0
-	strb	r3, [r0, #1]
-	.loc 2 1694 0
-	movs	r3, #7
-	strb	r3, [r0, #2]
-	.loc 2 1695 0
-	movs	r2, #45
-	ldr	r1, .L1305+8
-	b	.L1303
-.LVL1554:
-.L1287:
-	.loc 2 1690 0
-	cmp	r0, #34
-	beq	.L1288
-	cmp	r0, #67
-	bne	.L1289
-.L1288:
-	.loc 2 1692 0
-	ldr	r0, .L1305
-.LVL1555:
-	strb	r3, [r0]
-	.loc 2 1693 0
-	movs	r3, #5
-.LVL1556:
-	b	.L1304
-.LVL1557:
-.L1289:
-	.loc 2 1696 0
-	cmp	r0, #35
-	beq	.L1290
-	cmp	r0, #68
-	bne	.L1282
-.L1290:
-	.loc 2 1698 0
-	ldr	r0, .L1305
-.LVL1558:
-	.loc 2 1701 0
-	movs	r2, #95
-	ldr	r1, .L1305+12
-	.loc 2 1698 0
-	strb	r3, [r0]
-	.loc 2 1699 0
-	movs	r3, #5
-.LVL1559:
-	strb	r3, [r0, #1]
-	.loc 2 1700 0
-	movs	r3, #17
-	strb	r3, [r0, #2]
-	b	.L1303
-.LVL1560:
-.L1282:
-	bx	lr
-.L1306:
-	.align	2
-.L1305:
-	.word	.LANCHOR20
-	.word	.LANCHOR14
-	.word	.LANCHOR9
-	.word	.LANCHOR11
-.LBE382:
-.LBE383:
-	.cfi_endproc
-.LFE237:
-	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
-	.section	.text.FlashInit,"ax",%progbits
-	.align	1
-	.global	FlashInit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashInit, %function
-FlashInit:
-.LFB252:
-	.loc 2 2193 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1561:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r4, r0
-	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 2 2199 0
-	mov	r0, #32768
-.LVL1562:
-	.loc 2 2207 0
-	movs	r5, #0
-	.loc 2 2199 0
+	str	r3, [r8]
 	bl	ftl_malloc
-.LVL1563:
-	ldr	r3, .L1399
-	.loc 2 2205 0
-	ldr	r10, .L1399+132
-	.loc 2 2211 0
-	ldr	r8, .L1399+136
-	.loc 2 2199 0
+	ldr	r3, .L1245+164
 	str	r0, [r3]
-	.loc 2 2200 0
-	mov	r0, #32768
+	mov	r0, r5
 	bl	ftl_malloc
-.LVL1564:
-	ldr	r3, .L1399+4
-	.loc 2 2213 0
-	ldr	r6, .L1399+8
-	.loc 2 2209 0
-	ldr	r7, .L1399+12
-	.loc 2 2200 0
+	ldr	r3, .L1245+168
 	str	r0, [r3]
-	.loc 2 2201 0
-	mov	r0, #4096
+	mov	r0, r5
 	bl	ftl_malloc
-.LVL1565:
-	ldr	r3, .L1399+16
+	ldr	r3, .L1245+172
 	str	r0, [r3]
-	.loc 2 2202 0
-	mov	r0, #32768
+	ldr	r0, [r8]
+	muls	r0, r5, r0
 	bl	ftl_malloc
-.LVL1566:
-	ldr	r3, .L1399+20
+	ldr	r3, .L1245+176
 	str	r0, [r3]
-	.loc 2 2203 0
-	mov	r0, #4096
+	mov	r0, r5
 	bl	ftl_malloc
-.LVL1567:
-	ldr	r3, .L1399+24
-	.loc 2 2206 0
-	ldr	r2, .L1399+28
-	.loc 2 2211 0
-	strb	r5, [r8]
-	.loc 2 2203 0
+	ldr	r3, .L1245+180
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+184
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+188
+	ldrh	r5, [r10]
+	ldr	r10, .L1245+316
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	muls	r5, r3, r5
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1245+192
+	str	r0, [r3]
+	lsls	r0, r5, #2
+	ldr	r5, .L1245+196
+	bl	ftl_malloc
+	ldr	r3, .L1245+200
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	ldr	r0, [r8]
+	ldr	r8, .L1245+320
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+204
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1245+208
+	str	r0, [r3]
+	ldrh	r3, [r8]
+	ldr	r0, .L1245+212
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	and	r0, r0, r3, lsl #9
+	strh	r3, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1245+216
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L1245+220
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+224
+	str	r0, [r3]
+	ldr	r3, [r10]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1245+228
+	str	r0, [r3]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1245+232
+	ldr	r8, .L1245+324
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L1245+236
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+240
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1245+244
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r8, .L1245+328
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1245+248
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r2, [r8]
+	mov	r1, r4
+	ldr	r3, .L1245+252
+	lsls	r2, r2, #2
 	str	r0, [r3]
-	.loc 2 2205 0
-	movs	r3, #50
-	strb	r3, [r10]
-	.loc 2 2215 0
-	mov	r0, r4
-	.loc 2 2206 0
-	strb	r3, [r2]
-	.loc 2 2208 0
-	movs	r2, #128
-	.loc 2 2207 0
-	ldr	r3, .L1399+32
-	ldr	r4, .L1399+36
-.LVL1568:
-	.loc 2 2209 0
-	strb	r5, [r7]
-	.loc 2 2207 0
-	str	r5, [r3]
-	.loc 2 2208 0
-	ldr	r3, .L1399+40
-	str	r2, [r3]
-	.loc 2 2210 0
-	ldr	r3, .L1399+44
-	str	r5, [r3]
-	.loc 2 2213 0
-	movs	r3, #60
-	strb	r3, [r6]
-	.loc 2 2215 0
-	bl	NandcInit
-.LVL1569:
-	str	r10, [sp, #20]
-.LBB392:
-.LBB393:
-.LBB394:
-.LBB395:
-	.loc 3 123 0
-	ldr	r10, .L1399+140
-	str	r8, [sp, #16]
-	mov	r8, r6
-	mov	r6, r4
-.LVL1570:
-.L1312:
-.LBE395:
-.LBE394:
-.LBE393:
-.LBE392:
-	.loc 2 2217 0
-	uxtb	fp, r5
-.LVL1571:
-.LBB405:
-.LBB404:
-	.loc 2 282 0
-	mov	r0, fp
-	bl	FlashReset
-.LVL1572:
-.LBB398:
-.LBB396:
-	.loc 3 124 0
-	add	r1, r10, r5, lsl #3
-	.loc 3 123 0
-	ldr	r3, [r10, r5, lsl #3]
-.LBE396:
-.LBE398:
-	.loc 2 284 0
-	mov	r0, fp
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-.LBB399:
-.LBB397:
-	.loc 3 123 0
-	str	r3, [sp, #28]
-.LVL1573:
-	str	r1, [sp, #24]
-.LVL1574:
-.LBE397:
-.LBE399:
-	.loc 2 284 0
-	bl	NandcFlashCs
-.LVL1575:
-	.loc 2 285 0
-	ldr	r1, [sp, #24]
-.LBB400:
-.LBB401:
-	.loc 3 306 0
-	movs	r0, #200
-.LBE401:
-.LBE400:
-	.loc 2 285 0
-	ldr	r3, [sp, #28]
-	add	r3, r3, r1, lsl #8
-	movs	r1, #144
-	str	r1, [r3, #2056]
-	.loc 2 286 0
-	movs	r1, #0
-	str	r1, [r3, #2052]
-	str	r3, [sp, #24]
-.LVL1576:
-.LBB403:
-.LBB402:
-	.loc 3 306 0
-	bl	udelay
-.LVL1577:
-.LBE402:
-.LBE403:
-	.loc 2 288 0
-	ldr	r3, [sp, #24]
-	.loc 2 296 0
-	mov	r0, fp
-	.loc 2 288 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4]
-	.loc 2 289 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #1]
-	.loc 2 290 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #2]
-	.loc 2 291 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #3]
-	.loc 2 292 0
-	ldr	r1, [r3, #2048]
-	strb	r1, [r4, #4]
-	.loc 2 293 0
-	ldr	r3, [r3, #2048]
-	strb	r3, [r4, #5]
-	.loc 2 296 0
-	bl	NandcFlashDeCs
-.LVL1578:
-	.loc 2 297 0
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	subs	r3, r2, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L1308
-	.loc 2 298 0
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L1399+48
-	str	r1, [sp, #12]
-	ldrb	r1, [r4, #4]	@ zero_extendqisi2
-	str	r1, [sp, #8]
-	ldrb	r1, [r4, #3]	@ zero_extendqisi2
-	str	r1, [sp, #4]
-	ldrb	r1, [r4, #2]	@ zero_extendqisi2
-	str	r1, [sp]
-	adds	r1, r5, #1
-	bl	printf
-.LVL1579:
-.L1308:
-.LBE404:
-.LBE405:
-	.loc 2 2218 0
-	cbnz	r5, .L1309
-	.loc 2 2219 0
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L1352
-	.loc 2 2219 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L1352
-.L1309:
-	.loc 2 2223 0 is_stmt 1
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	.loc 2 2216 0
-	adds	r5, r5, #1
-.LVL1580:
-	adds	r4, r4, #8
-.LVL1581:
-	.loc 2 2223 0
-	cmp	r3, #181
-	.loc 2 2224 0
-	itt	eq
-	moveq	r3, #44
-	strbeq	r3, [r4, #-8]
-	.loc 2 2216 0
-	cmp	r5, #4
-	bne	.L1312
-	.loc 2 2234 0
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #173
-	beq	.L1313
-	.loc 2 2235 0
-	ldr	r3, .L1399+52
-	ldr	r0, [r3]
-	bl	NandcSetDdrMode
-.LVL1582:
-.L1313:
-	.loc 2 2242 0
-	mov	r2, #852
-	movs	r1, #0
-	ldr	r0, .L1399+56
 	bl	ftl_memset
-.LVL1583:
-	.loc 2 2243 0
-	ldr	r4, .L1399+60
-.LVL1584:
-	ldr	r3, .L1399+64
-	.loc 2 2244 0
-	ldr	r5, .L1399+68
-.LVL1585:
-	.loc 2 2243 0
-	str	r3, [r4]
-	.loc 2 2244 0
-	movs	r3, #0
-	strb	r3, [r5]
-	.loc 2 2246 0
-	ldrb	r3, [r6, #1]	@ zero_extendqisi2
-	cmp	r3, #161
-	beq	.L1314
-	.loc 2 2246 0 is_stmt 0 discriminator 2
-	cmp	r3, #218
-	beq	.L1314
-	.loc 2 2246 0 discriminator 3
-	and	r2, r3, #223
-	cmp	r2, #209
-	beq	.L1314
-	.loc 2 2247 0 is_stmt 1
-	cmp	r3, #220
-	bne	.L1315
-	.loc 2 2247 0 is_stmt 0 discriminator 1
-	ldrb	r2, [r6, #3]	@ zero_extendqisi2
-	cmp	r2, #149
-	bne	.L1315
-.L1314:
-	.loc 2 2248 0 is_stmt 1
-	ldr	r1, [sp, #16]
+	ldr	r3, .L1245+256
+	ldrh	r4, [r3]
+	lsls	r4, r4, #2
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1245+260
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1245+264
+	ldr	r4, .L1245+268
+	str	r0, [r3]
+	ldr	r0, [r10]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1245+272
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	muls	r0, r6, r0
+	ldr	r6, .L1245+276
+	bl	ftl_malloc
+	ldr	r3, .L1245+280
+	str	r0, [r3]
+	ldrh	r3, [r4]
+	ldrh	r0, [r7]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+284
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r5]
+	ldr	r5, .L1245+288
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1245+292
+	str	r0, [r3]
+	ldr	r3, .L1245+296
+	ldrh	r0, [r3]
+	ldrh	r3, [r6]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r5]	@ movhi
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r1, [r5]
 	movs	r2, #1
-	strb	r2, [r1]
-	.loc 2 2249 0
-	movs	r2, #16
-	ldr	r1, [sp, #20]
-	.loc 2 2250 0
-	strb	r2, [r8]
-	.loc 2 2249 0
-	strb	r2, [r1]
-	.loc 2 2251 0
-	ldrb	r1, [r6]	@ zero_extendqisi2
-	ldr	r2, .L1399+72
-	.loc 2 2253 0
-	cmp	r1, #152
-	.loc 2 2251 0
-	strb	r1, [r2, #1]
-	.loc 2 2252 0
-	strb	r3, [r2, #2]
-	.loc 2 2253 0
-	bne	.L1316
-	.loc 2 2253 0 is_stmt 0 discriminator 1
-	ldrsb	r1, [r6, #4]
-	cmp	r1, #0
-	.loc 2 2254 0 is_stmt 1 discriminator 1
-	itt	ge
-	movge	r1, #24
-	strbge	r1, [r8]
-.L1316:
-	.loc 2 2255 0
-	ldr	r1, .L1399+76
-	ldr	r0, [r1]
-	ldr	r1, .L1399+80
-	cmp	r0, r1
-	.loc 2 2256 0
-	itt	eq
-	moveq	r1, #16
-	strbeq	r1, [r8]
-	.loc 2 2257 0
-	cmp	r3, #218
-	bne	.L1318
-	.loc 2 2258 0
-	mov	r1, #2048
-.L1395:
-	.loc 2 2261 0
-	strh	r1, [r2, #14]	@ movhi
-	.loc 2 2262 0
-	strb	r3, [r2, #2]
-.L1319:
-	.loc 2 2264 0
-	movs	r2, #32
-	ldr	r1, .L1399+84
-	ldr	r0, .L1399+88
-	bl	ftl_memcpy
-.LVL1586:
-	.loc 2 2265 0
-	movs	r2, #32
-	ldr	r1, .L1399+72
-	ldr	r0, .L1399+64
-	bl	ftl_memcpy
-.LVL1587:
-.L1315:
-	.loc 2 2268 0
-	ldr	r3, [sp, #16]
-	ldr	r8, .L1399+144
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1321
-	.loc 2 2269 0
-	bl	FlashLoadPhyInfoInRam
-.LVL1588:
-	cbnz	r0, .L1323
-	.loc 2 2270 0
-	ldr	r3, [r4]
-	ldr	r10, .L1399+100
-	ldrh	r3, [r3, #16]
-	lsrs	r3, r3, #8
-	.loc 2 2271 0
-	lsls	r1, r3, #31
-	.loc 2 2270 0
-	and	r0, r3, #7
-	strb	r0, [r10]
-	.loc 2 2271 0
-	bmi	.L1323
-	.loc 2 2272 0
-	movs	r3, #1
-	strb	r3, [r7]
-	.loc 2 2273 0
-	bl	FlashSetInterfaceMode
-.LVL1589:
-	.loc 2 2274 0
-	ldrb	r0, [r10]	@ zero_extendqisi2
-	bl	NandcSetMode
-.LVL1590:
-.L1323:
-	.loc 2 2277 0
-	ldr	r3, [r4]
-	ldrb	r3, [r3, #26]	@ zero_extendqisi2
-	strb	r3, [r8]
-	.loc 2 2282 0
-	bl	FlashLoadPhyInfo
-.LVL1591:
-	.loc 2 2299 0
-	cmp	r0, #0
-	beq	.L1321
-	.loc 2 2300 0
-	ldr	r3, [r4]
-	ldr	r0, .L1399+92
-.LVL1592:
-	ldrh	r1, [r3, #14]
-	bl	printf
-.LVL1593:
-	.loc 2 2301 0
-	bl	FlashLoadPhyInfoInRam
-.LVL1594:
-	adds	r2, r0, #1
-	beq	.L1307
-	.loc 2 2303 0
-	bl	FlashDieInfoInit
-.LVL1595:
-	.loc 2 2304 0
-	ldr	r3, [r4]
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	bl	FlashGetReadRetryDefault
-.LVL1596:
-	.loc 2 2306 0
-	ldr	r3, [r4]
-	ldr	r2, .L1399+96
-	ldrb	r1, [r3, #9]	@ zero_extendqisi2
-	ldrh	r2, [r2]
-	addw	r2, r2, #4095
-	cmp	r1, r2, asr #12
-	blt	.L1326
-	.loc 2 2307 0 discriminator 1
-	ldrh	r2, [r3, #14]
-	adds	r2, r2, #255
-	.loc 2 2306 0 discriminator 1
-	cmp	r1, r2, asr #8
-	bge	.L1327
-.L1326:
-	.loc 2 2309 0
-	ldrh	r2, [r3, #14]
-	bic	r2, r2, #255
-	strh	r2, [r3, #14]	@ movhi
-.L1327:
-	.loc 2 2316 0
-	ldr	r3, .L1399+100
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L1328
-	.loc 2 2321 0
-	bl	FlashSavePhyInfo
-.LVL1597:
-	.loc 2 2322 0
-	ldr	r3, .L1399+104
-	movs	r0, #0
-	ldr	r1, [r3]
-	bl	FlashDdrParaScan
-.LVL1598:
-.L1328:
-	.loc 2 2329 0
-	bl	FlashSavePhyInfo
-.LVL1599:
-.L1321:
-	.loc 2 2333 0
-	ldr	fp, [r4]
-	.loc 2 2337 0
-	ldr	r10, .L1399+100
-	.loc 2 2333 0
-	ldrb	r3, [fp, #26]	@ zero_extendqisi2
-	.loc 2 2349 0
-	ldrh	r0, [fp, #10]
-	.loc 2 2333 0
-	strb	r3, [r8]
-	.loc 2 2334 0
-	ldrh	r3, [fp, #16]
-	ubfx	r2, r3, #7, #1
-	.loc 2 2335 0
-	ubfx	r1, r3, #3, #1
-	.loc 2 2334 0
-	strb	r2, [r5]
-	.loc 2 2335 0
-	ldr	r2, .L1399+108
-	.loc 2 2338 0
-	ldr	r5, .L1399+112
-	.loc 2 2335 0
-	strb	r1, [r2]
-	.loc 2 2336 0
-	ubfx	r1, r3, #4, #1
-	ldr	r2, .L1399+116
-	.loc 2 2337 0
-	ubfx	r3, r3, #8, #3
-	strb	r3, [r10]
-	.loc 2 2338 0
-	movs	r3, #0
-	str	r3, [r5]
-	.loc 2 2336 0
-	strb	r1, [r2]
-	.loc 2 2349 0
-	ldrb	r1, [fp, #12]	@ zero_extendqisi2
-	bl	__aeabi_idiv
-.LVL1600:
-	mov	r1, r0
-	ldrb	r0, [fp, #18]	@ zero_extendqisi2
-	bl	BuildFlashLsbPageTable
-.LVL1601:
-	.loc 2 2350 0
-	bl	FlashDieInfoInit
-.LVL1602:
-	.loc 2 2351 0
-	ldr	r3, [r4]
-	mov	ip, r5
-	ldrh	r2, [r3, #16]
-	tst	r2, #64
-	beq	.L1330
-	.loc 2 2352 0
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1399+120
-	.loc 2 2353 0
-	ldr	r2, .L1399+124
-	.loc 2 2352 0
-	strb	r0, [r3]
-	.loc 2 2353 0
-	ldr	r3, .L1399+56
-	ldrb	r1, [r3, #1]	@ zero_extendqisi2
-	.loc 2 2354 0
-	ldrb	lr, [r3, #2]	@ zero_extendqisi2
-	.loc 2 2353 0
-	strb	r1, [r2]
-	.loc 2 2354 0
-	ldr	r1, .L1399+128
-	strb	lr, [r1]
-	.loc 2 2356 0
-	add	lr, r0, #-1
-	cmp	lr, #6
-	b	.L1400
-.L1401:
+	ldr	r3, .L1245+300
+	ldrh	r6, [r6]
+	lsls	r1, r1, #2
+	mov	r4, r3
+	str	r0, [r4, #28]!
+	b	.L1246
+.L1247:
 	.align	2
-.L1399:
-	.word	.LANCHOR144
-	.word	.LANCHOR150
-	.word	.LANCHOR149
-	.word	.LANCHOR29
+.L1245:
+	.word	.LANCHOR139
+	.word	.LANCHOR173
+	.word	.LANCHOR157
+	.word	.LANCHOR55
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR80
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR171
+	.word	.LANCHOR172
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR74
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR176
+	.word	.LANCHOR177
+	.word	.LANCHOR178
+	.word	.LANCHOR117
+	.word	.LANCHOR179
+	.word	.LANCHOR119
+	.word	.LANCHOR109
+	.word	.LANCHOR112
+	.word	.LANCHOR180
+	.word	.LANCHOR181
+	.word	.LANCHOR182
+	.word	.LANCHOR58
+	.word	.LANCHOR78
+	.word	.LANCHOR107
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	.LANCHOR105
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR104
+	.word	.LANCHOR188
+	.word	.LANCHOR41
+	.word	.LANCHOR189
+	.word	.LANCHOR106
+	.word	.LANCHOR137
+	.word	33553920
+	.word	.LANCHOR191
+	.word	.LANCHOR79
+	.word	.LANCHOR84
+	.word	.LANCHOR129
+	.word	.LANCHOR125
+	.word	.LANCHOR0
+	.word	.LANCHOR72
+	.word	.LANCHOR192
+	.word	.LANCHOR193
 	.word	.LANCHOR194
+	.word	.LANCHOR67
+	.word	.LANCHOR131
 	.word	.LANCHOR195
-	.word	.LANCHOR196
-	.word	.LANCHOR147
-	.word	.LANCHOR146
-	.word	.LANCHOR22
-	.word	.LANCHOR3
-	.word	.LANCHOR141
-	.word	.LC21
-	.word	.LANCHOR152
-	.word	.LANCHOR20
-	.word	.LANCHOR18
-	.word	.LANCHOR30
-	.word	.LANCHOR5
-	.word	.LANCHOR197
-	.word	.LANCHOR151
-	.word	1446522928
-	.word	.LANCHOR140+32
-	.word	.LANCHOR7
-	.word	.LC22
-	.word	.LANCHOR119
-	.word	.LANCHOR24
-	.word	.LANCHOR145
-	.word	.LANCHOR198
-	.word	.LANCHOR142
-	.word	.LANCHOR27
-	.word	.LANCHOR10
-	.word	.LANCHOR13
-	.word	.LANCHOR148
-	.word	.LANCHOR2
-	.word	.LANCHOR1
-	.word	.LANCHOR6
-	.word	.LANCHOR8
-.L1400:
-	mov	lr, r1
-	bhi	.L1331
-.LBB406:
-	.loc 2 2359 0
-	ldr	r2, .L1402
-	str	r2, [r5]
-	.loc 2 2360 0
-	subs	r2, r0, #5
-	cmp	r2, #1
-	bhi	.L1332
-	.loc 2 2361 0
-	ldr	r2, .L1402+4
-	.loc 2 2363 0
-	adds	r3, r3, #20
-	.loc 2 2361 0
-	movs	r1, #1
-	str	r1, [r2]
-.LVL1603:
-.L1333:
-	subs	r1, r3, #1
-	.loc 2 2366 0
-	movs	r2, #0
-	adds	r3, r3, #31
-.LVL1604:
-.L1335:
-	.loc 2 2368 0
-	ldrsb	r5, [r1, #1]!
-	cbnz	r5, .L1334
-	.loc 2 2369 0
-	adds	r2, r2, #1
-.LVL1605:
-.L1334:
-	.loc 2 2367 0 discriminator 2
-	cmp	r3, r1
-	bne	.L1335
-	.loc 2 2372 0
-	cmp	r2, #27
-	bls	.L1330
-	.loc 2 2373 0
-	bl	FlashGetReadRetryDefault
-.LVL1606:
-	.loc 2 2374 0
-	bl	FlashSavePhyInfo
-.LVL1607:
-.L1330:
-.LBE406:
-	.loc 2 2399 0
-	ldr	r3, .L1402+8
-	ldr	r2, [r3]
-	ldr	r3, .L1402+12
-	cmp	r2, r3
-	bne	.L1346
-	.loc 2 2399 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r8]	@ zero_extendqisi2
-	cbz	r3, .L1346
-	.loc 2 2400 0 is_stmt 1
-	ldr	r3, [r4]
-	movs	r2, #0
-	strb	r2, [r3, #18]
-.L1346:
-	.loc 2 2406 0
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r3, #44
-	bne	.L1347
-	.loc 2 2406 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1347
-	.loc 2 2409 0 is_stmt 1
-	movs	r3, #0
-	.loc 2 2410 0
-	movs	r0, #1
-	.loc 2 2409 0
-	strb	r3, [r7]
-	.loc 2 2410 0
-	bl	FlashSetInterfaceMode
-.LVL1608:
-	.loc 2 2411 0
-	movs	r0, #1
-	bl	NandcSetMode
-.LVL1609:
-.L1347:
-	.loc 2 2428 0
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-.LVL1610:
-	.loc 2 2429 0
-	ldrb	r3, [r10]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L1348
-	.loc 2 2430 0
-	ldrb	r2, [r7]	@ zero_extendqisi2
-	cbnz	r2, .L1349
-	.loc 2 2430 0 is_stmt 0 discriminator 1
-	lsls	r3, r3, #31
-	bmi	.L1348
-.L1349:
-	.loc 2 2431 0 is_stmt 1
-	ldr	r3, .L1402+16
-	movs	r0, #0
-	ldr	r1, [r3]
-	bl	FlashDdrParaScan
-.LVL1611:
-.L1348:
-	.loc 2 2438 0
-	movs	r0, #0
-	.loc 2 2544 0
-	movs	r7, #16
-	.loc 2 2438 0
-	bl	flash_exit_slc_mode
-.LVL1612:
-	.loc 2 2531 0
-	ldr	r3, [r4]
-	ldrb	r0, [r3, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-.LVL1613:
-	.loc 2 2532 0
-	ldr	r0, .L1402+20
-	bl	FlashReadIdbDataRaw
-.LVL1614:
-.LBB407:
-	.loc 2 2551 0
-	ldr	r5, [r4]
-.LBE407:
-	.loc 2 2544 0
-	ldr	r3, [sp, #20]
-.LBB408:
-	.loc 2 2551 0
-	ldr	r4, .L1402+24
-.LBE408:
-	.loc 2 2544 0
-	strb	r7, [r3]
-.LVL1615:
-.LBB409:
-	.loc 2 2551 0
-	ldrb	r3, [r5, #12]	@ zero_extendqisi2
-	strh	r3, [r4, #8]	@ movhi
-	.loc 2 2552 0
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	str	r3, [r4, #4]
-	.loc 2 2553 0
-	ldr	r3, [r6]
-	.loc 2 2556 0
-	ldrh	r6, [r5, #14]
-	.loc 2 2553 0
-	str	r3, [r4]
-	.loc 2 2554 0
-	ldr	r3, .L1402+28
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	strh	r3, [r4, #10]	@ movhi
-	.loc 2 2555 0
-	ldrb	r3, [r5, #13]	@ zero_extendqisi2
-	.loc 2 2556 0
-	strh	r6, [r4, #14]	@ movhi
-	.loc 2 2555 0
-	strh	r3, [r4, #12]	@ movhi
-	.loc 2 2557 0
-	ldrh	r3, [r5, #10]
-	strh	r3, [r4, #16]	@ movhi
-	.loc 2 2558 0
-	ldrb	r1, [r5, #12]	@ zero_extendqisi2
-	ldrh	r0, [r5, #10]
-	bl	__aeabi_idiv
-.LVL1616:
-	strh	r0, [r4, #18]	@ movhi
-	.loc 2 2559 0
-	ldrb	r2, [r5, #9]	@ zero_extendqisi2
-	strh	r2, [r4, #20]	@ movhi
-	.loc 2 2560 0
-	ldrh	r1, [r5, #10]
-	ldrb	r3, [r5, #9]	@ zero_extendqisi2
-	.loc 2 2562 0
-	strh	r7, [r4, #26]	@ movhi
-	.loc 2 2560 0
-	smulbb	r3, r3, r1
-	.loc 2 2561 0
-	mov	r1, #512
-	strh	r1, [r4, #24]	@ movhi
-	.loc 2 2563 0
-	ldr	r1, [sp, #16]
-	.loc 2 2560 0
-	uxth	r3, r3
-	.loc 2 2563 0
-	ldrb	r1, [r1]	@ zero_extendqisi2
-	.loc 2 2560 0
-	strh	r3, [r4, #22]	@ movhi
-	.loc 2 2563 0
-	cmp	r1, #1
-	bne	.L1350
-	.loc 2 2568 0
-	lsls	r3, r3, #1
-	.loc 2 2566 0
-	lsrs	r1, r6, #1
-	.loc 2 2567 0
-	lsls	r2, r2, #1
-	.loc 2 2568 0
-	strh	r3, [r4, #22]	@ movhi
-	.loc 2 2569 0
-	movs	r3, #8
-	.loc 2 2566 0
-	strh	r1, [r4, #14]	@ movhi
-	.loc 2 2567 0
-	strh	r2, [r4, #20]	@ movhi
-	.loc 2 2569 0
-	strh	r3, [r4, #26]	@ movhi
-.L1350:
-.LBE409:
-	.loc 2 2588 0
-	ldrb	r0, [r5, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-.LVL1617:
-	.loc 2 2592 0
+	.word	.LANCHOR68
+	.word	.LANCHOR130
+	.word	.LANCHOR45
+	.word	.LANCHOR97
+	.word	.LANCHOR126
+	.word	.LANCHOR123
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.word	.LANCHOR75
+	.word	.LANCHOR38
+	.word	.LANCHOR108
+	.word	.LANCHOR59
+	.word	.LANCHOR65
+	.word	.LANCHOR190
+	.word	.LANCHOR62
+	.word	.LANCHOR63
+.L1246:
+	mov	r0, r1
+.L1241:
+	cmp	r2, r6
+	bcc	.L1242
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L1248
+	movs	r1, #0
+	adds	r3, r3, #24
+.L1243:
+	cmp	r3, r2
+	bne	.L1244
 	movs	r0, #0
-.LVL1618:
-.L1307:
-	.loc 2 2593 0
-	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1318:
-	.cfi_restore_state
-	.loc 2 2260 0
-	cmp	r3, #220
-	bne	.L1319
-	.loc 2 2261 0
-	mov	r1, #4096
-	b	.L1395
-.L1332:
-.LVL1619:
-.LBB410:
-	.loc 2 2363 0
-	add	r2, r3, #28
-	adds	r3, r3, #20
-	cmp	r0, #7
-	it	eq
-	moveq	r3, r2
-	b	.L1333
-.LVL1620:
-.L1331:
-.LBE410:
-	.loc 2 2376 0
-	sub	r3, r0, #17
-	cmp	r3, #2
-	bhi	.L1337
-	.loc 2 2377 0
-	ldr	r3, .L1402+32
-	.loc 2 2379 0
-	cmp	r0, #19
-	.loc 2 2377 0
-	str	r3, [r5]
-	.loc 2 2378 0
-	ite	ne
-	movne	r3, #7
-	.loc 2 2380 0
-	moveq	r3, #15
-	strb	r3, [r1]
-	b	.L1330
-.L1337:
-	.loc 2 2381 0
-	cmp	r0, #33
-	beq	.L1339
-	.loc 2 2381 0 is_stmt 0 discriminator 1
-	sub	r3, r0, #65
-	cmp	r3, #1
-	bhi	.L1340
-.L1339:
-	.loc 2 2382 0 is_stmt 1
-	ldr	r3, .L1402+36
-	str	r3, [ip]
-	.loc 2 2383 0
-	movs	r3, #4
-	strb	r3, [r2]
-	.loc 2 2384 0
-	movs	r3, #7
-	strb	r3, [lr]
-	b	.L1330
-.L1340:
-	.loc 2 2385 0
-	sub	r3, r0, #67
-	uxtb	r3, r3
-	cmp	r3, #1
-	bls	.L1341
-	.loc 2 2385 0 is_stmt 0 discriminator 1
-	sub	r1, r0, #34
-	cmp	r1, #1
-	bhi	.L1342
-.L1341:
-	.loc 2 2386 0 is_stmt 1
-	ldr	r1, .L1402+36
-	.loc 2 2388 0
-	cmp	r0, #35
-	.loc 2 2386 0
-	str	r1, [ip]
-	ldr	r1, .L1402+40
-	.loc 2 2388 0
-	beq	.L1343
-	.loc 2 2388 0 is_stmt 0 discriminator 1
-	cmp	r0, #68
-	beq	.L1343
-	.loc 2 2387 0 is_stmt 1
-	movs	r0, #7
-.L1396:
-	.loc 2 2390 0
-	cmp	r3, #1
-	.loc 2 2389 0
-	strb	r0, [r1]
-	.loc 2 2391 0
-	ite	ls
-	movls	r3, #4
-	.loc 2 2393 0
-	movhi	r3, #5
-	strb	r3, [r2]
-	b	.L1330
-.L1343:
-	.loc 2 2389 0
-	movs	r0, #17
-	b	.L1396
-.L1342:
-	.loc 2 2394 0
-	cmp	r0, #49
-	.loc 2 2395 0
-	itt	eq
-	ldreq	r3, .L1402+44
-	streq	r3, [r5]
-	b	.L1330
-.LVL1621:
-.L1352:
-	.loc 2 2220 0
-	mvn	r0, #1
-	b	.L1307
-.L1403:
+.L1242:
+	ldr	r5, [r3, #28]
+	adds	r2, r2, #1
+	add	r5, r5, r0
+	add	r0, r0, r1
+	str	r5, [r4, #4]!
+	b	.L1241
+.L1244:
+	str	r1, [r3, #4]!
+	b	.L1243
+.L1249:
 	.align	2
-.L1402:
-	.word	HynixReadRetrial
-	.word	.LANCHOR35
-	.word	.LANCHOR151
-	.word	1446522928
-	.word	.LANCHOR145
-	.word	.LANCHOR138
-	.word	.LANCHOR15
-	.word	.LANCHOR25
-	.word	MicronReadRetrial
-	.word	ToshibaReadRetrial
-	.word	.LANCHOR148
-	.word	SamsungReadRetrial
-	.cfi_endproc
-.LFE252:
-	.size	FlashInit, .-FlashInit
-	.section	.text.FlashReadSlc2KPages,"ax",%progbits
+.L1248:
+	.word	.LANCHOR75+56
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	FlashReadSlc2KPages
+	.global	ftl_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadSlc2KPages, %function
-FlashReadSlc2KPages:
-.LFB258:
-	.loc 2 2761 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1622:
-	.loc 2 2767 0
-	ldr	r3, .L1433
-	.loc 2 2761 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r8, r1
-	.loc 2 2794 0
-	ldr	fp, .L1433+28
-	mov	r4, r0
-	.loc 2 2771 0
-	movs	r7, #0
-	.loc 2 2761 0
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 2767 0
-	ldrb	r10, [r3, #9]	@ zero_extendqisi2
-.LVL1623:
-	.loc 2 2761 0
-	str	r2, [sp, #12]
-.LVL1624:
-.L1405:
-	.loc 2 2771 0 discriminator 1
-	cmp	r7, r8
-	bne	.L1418
-	.loc 2 2815 0
-	movs	r0, #0
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1625:
-.L1418:
-	.cfi_restore_state
-	.loc 2 2772 0
-	sub	r3, r8, r7
-	add	r2, sp, #20
-	uxtb	r3, r3
-	ldr	r1, [sp, #12]
-	mov	r0, r4
-	str	r3, [sp]
-	add	r3, sp, #16
-	bl	LogAddr2PhyAddr
-.LVL1626:
-	.loc 2 2773 0
-	ldr	r2, .L1433+4
-	ldr	r3, [sp, #16]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1406
-	.loc 2 2774 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L1407:
-	.loc 2 2771 0 discriminator 2
-	adds	r7, r7, #1
-.LVL1627:
-	adds	r4, r4, #36
-	b	.L1405
-.L1406:
-	.loc 2 2777 0
-	ldr	r2, .L1433+8
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-.LVL1628:
-	.loc 2 2778 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1629:
-	.loc 2 2779 0
-	mov	r0, r5
-	bl	NandcFlashCs
-.LVL1630:
-	.loc 2 2780 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadCmd
-.LVL1631:
-	.loc 2 2781 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1632:
-	.loc 2 2782 0
-	ldr	r3, [r4, #12]
-	mov	r2, r10
-	movs	r1, #0
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r4, #8]
-	bl	NandcXferData
-.LVL1633:
-	.loc 2 2785 0
-	ldr	r3, .L1433+12
-	.loc 2 2782 0
-	mov	r6, r0
-.LVL1634:
-	.loc 2 2785 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-.LVL1635:
-	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashReadCmd
-.LVL1636:
-	.loc 2 2787 0
-	ldr	r3, [r4, #8]
-	.loc 2 2786 0
-	cbz	r3, .L1408
-	.loc 2 2786 0 is_stmt 0 discriminator 1
-	add	r3, r3, #2048
-.L1408:
-	.loc 2 2788 0 is_stmt 1 discriminator 4
-	ldr	r2, [r4, #12]
-	.loc 2 2786 0 discriminator 4
-	cbz	r2, .L1409
-	.loc 2 2786 0 is_stmt 0 discriminator 5
-	adds	r2, r2, #8
-.L1409:
-	.loc 2 2786 0 discriminator 8
-	str	r2, [sp]
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
 	movs	r1, #0
-	mov	r2, r10
-	mov	r0, r5
-	bl	NandcXferData
-.LVL1637:
+	mov	r0, r4
+	bl	memset
+	mov	r3, r4
+	add	r1, r5, #256
+	movs	r2, #1
+	movs	r0, #16
+	pop	{r4, r5, r6, lr}
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
 	mov	r1, r0
-.LVL1638:
-	.loc 2 2789 0 is_stmt 1 discriminator 8
-	mov	r0, r5
-.LVL1639:
-	bl	NandcFlashDeCs
-.LVL1640:
-	.loc 2 2794 0 discriminator 8
-	ldrb	r3, [fp]	@ zero_extendqisi2
-	cmp	r6, r1
-	it	cc
-	movcc	r6, r1
-.LVL1641:
-	add	r3, r3, r3, lsl #1
-	cmp	r6, r3, asr #2
-	bls	.L1410
-	.loc 2 2795 0 discriminator 1
-	adds	r0, r6, #1
-	it	ne
-	movne	r6, #256
-	.loc 2 2798 0 discriminator 1
-	str	r6, [r4]
-.L1413:
-	.loc 2 2801 0
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1414
-	.loc 2 2802 0
-	ldr	r2, [r3, #8]
-	adds	r1, r2, #1
-.LVL1642:
-	bne	.L1414
-	.loc 2 2802 0 is_stmt 0 discriminator 1
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	.loc 2 2803 0 is_stmt 1 discriminator 1
-	it	ne
-	strne	r2, [r4]
-.L1414:
-	.loc 2 2806 0
-	ldr	r3, [r4]
-	adds	r2, r3, #1
-	bne	.L1407
-	.loc 2 2807 0
-	ldr	r1, [r4, #4]
-	ldrb	r2, [fp]	@ zero_extendqisi2
-	ldr	r0, .L1433+16
-	bl	printf
-.LVL1643:
-	.loc 2 2808 0
-	ldr	r1, [r4, #8]
-	cbz	r1, .L1416
-	.loc 2 2809 0
-	movs	r3, #8
-	movs	r2, #4
-	ldr	r0, .L1433+20
-	bl	rknand_print_hex
-.LVL1644:
-.L1416:
-	.loc 2 2810 0
-	ldr	r1, [r4, #12]
-	cmp	r1, #0
-	beq	.L1407
-	.loc 2 2811 0
-	movs	r3, #4
-	ldr	r0, .L1433+24
-	mov	r2, r3
-	bl	rknand_print_hex
-.LVL1645:
-	b	.L1407
-.LVL1646:
-.L1410:
-	.loc 2 2800 0
-	movs	r3, #0
-	str	r3, [r4]
-	b	.L1413
-.L1434:
+	movs	r2, #1
+	movs	r0, #16
+	b	FtlRead
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1256
+	ldr	r0, [r3]
+	bx	lr
+.L1257:
 	.align	2
-.L1433:
-	.word	.LANCHOR30
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LANCHOR3
-	.word	.LC23
-	.word	.LC24
-	.word	.LC25
-	.word	.LANCHOR32
-	.cfi_endproc
-.LFE258:
-	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
-	.section	.text.FlashReadPages,"ax",%progbits
+.L1256:
+	.word	.LANCHOR69
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
-	.global	FlashReadPages
+	.global	rknand_print_hex
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadPages, %function
-FlashReadPages:
-.LFB261:
-	.loc 2 2941 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 32
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1647:
-	.loc 2 2956 0
-	ldr	r3, .L1526
-	.loc 2 2941 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 2 2941 0
-	mov	r10, r0
-	str	r1, [sp, #24]
-	.loc 2 2956 0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 2941 0
-	str	r2, [sp, #12]
-	.loc 2 2956 0
-	cbnz	r3, .L1436
-	.loc 2 2948 0
-	ldr	r2, .L1526+4
-.LVL1648:
-	.loc 2 2949 0
-	mov	r8, r3
-	str	r3, [sp, #8]
-	.loc 2 2948 0
-	ldrb	r2, [r2, #9]	@ zero_extendqisi2
-	str	r2, [sp, #20]
-	.loc 2 2949 0
-	ldr	r2, .L1526+8
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	str	r2, [sp, #28]
-.LVL1649:
-.L1437:
-	.loc 2 2962 0 discriminator 1
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #24]
-	cmp	r3, r2
-	bcc	.L1475
-	.loc 2 3081 0
-	movs	r0, #0
-	b	.L1435
-.LVL1650:
-.L1436:
-	.loc 2 2957 0
-	bl	FlashReadSlc2KPages
-.LVL1651:
-.L1435:
-	.loc 2 3082 0
-	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	movs	r5, #0
+	ldr	r7, .L1267
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r4, r5
+.L1259:
+	cmp	r4, r10
+	bne	.L1265
+	ldr	r1, .L1267+4
+	ldr	r0, .L1267+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1265:
+	cbnz	r5, .L1260
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1267+12
+	bl	printf
+.L1260:
+	cmp	r8, #4
+	bne	.L1261
+	ldr	r1, [r6, r4, lsl #2]
+.L1266:
+	mov	r0, r7
+	adds	r5, r5, #1
+	bl	printf
+	cmp	r5, #15
+	bls	.L1264
+	movs	r5, #0
+	ldr	r1, .L1267+4
+	ldr	r0, .L1267+8
+	bl	printf
+.L1264:
+	adds	r4, r4, #1
+	b	.L1259
+.L1261:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1266
+.L1268:
+	.align	2
+.L1267:
+	.word	.LC19
+	.word	.LC20
+	.word	.LC7
+	.word	.LC18
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	HynixGetReadRetryDefault
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #172
+	ldr	r5, .L1368
+	cmp	r0, #2
+	mov	r1, #173
+	mov	r2, #174
+	sub	sp, sp, #56
+	mov	r4, r0
+	strb	r3, [r5, #4]
+	mov	r3, #175
+	strb	r0, [r5]
+	strb	r1, [r5, #5]
+	strb	r2, [r5, #6]
+	strb	r3, [r5, #7]
+	bne	.L1270
+	movs	r3, #167
+	movs	r2, #247
+	strb	r3, [r5, #4]
+	ldr	r3, .L1368+4
+	strb	r2, [r3, #17]
+.L1326:
+	mov	r10, #7
+	b	.L1362
+.L1270:
+	cmp	r0, #3
+	bne	.L1272
+	movs	r3, #176
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+.L1363:
+	mov	r10, #8
+	strb	r3, [r5, #11]
+	mov	fp, r10
+.L1271:
+	subs	r3, r4, #1
+	cmp	r3, #1
+	bhi	.L1276
+	mov	r8, #0
+.L1277:
+	ldr	r3, .L1368+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r8
+	cmp	r2, r3
+	bhi	.L1283
+.L1284:
+	ldr	r3, .L1368
+	strb	fp, [r3, #1]
+	strb	r10, [r3, #2]
+	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1652:
-.L1475:
-	.cfi_restore_state
-	.loc 2 2963 0
+.L1272:
+	cmp	r0, #4
+	bne	.L1273
+	movs	r0, #204
+	strb	r1, [r5, #9]
+	strb	r0, [r5, #4]
+	movs	r0, #191
+	strb	r0, [r5, #5]
+	movs	r0, #170
+	strb	r0, [r5, #6]
+	movs	r0, #171
+	strb	r0, [r5, #7]
+	movs	r0, #205
+	strb	r0, [r5, #8]
+	strb	r2, [r5, #10]
+	b	.L1363
+.L1273:
+	cmp	r0, #5
+	bne	.L1274
+	movs	r3, #56
+	mov	r10, #8
+	strb	r3, [r5, #4]
+	movs	r3, #57
+	strb	r3, [r5, #5]
+	movs	r3, #58
+	strb	r3, [r5, #6]
+	movs	r3, #59
+	strb	r3, [r5, #7]
+.L1362:
+	mov	fp, #4
+	b	.L1271
+.L1274:
+	cmp	r0, #6
+	bne	.L1275
+	movs	r3, #14
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #15
+	strb	r3, [r5, #5]
+	movs	r3, #16
+	strb	r3, [r5, #6]
+	movs	r3, #17
+	strb	r3, [r5, #7]
+	b	.L1362
+.L1275:
+	cmp	r0, #7
+	bne	.L1326
+	movs	r3, #176
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+	strb	r3, [r5, #11]
+	movs	r3, #212
+	strb	r3, [r5, #12]
+	movs	r3, #213
+	strb	r3, [r5, #13]
+	mov	fp, #10
+	b	.L1271
+.L1283:
+	ldr	r2, .L1368+12
+	movs	r6, #0
+	ldrb	r2, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1368+16
+	ldr	r7, [r3, r2, lsl #3]
+	add	r4, r5, r2, lsl #6
+	add	r3, r3, r2, lsl #3
+	movs	r2, #55
+	adds	r4, r4, #20
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #8
+	addw	r3, r7, #2056
+.L1278:
+	adds	r1, r5, r6
+	str	r2, [r3]
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	movs	r0, #80
+	str	r2, [sp, #8]
+	str	r3, [sp, #4]
+	str	r1, [r7, #2052]
+	bl	udelay
+	ldr	r1, [r7, #2048]
+	ldr	r3, [sp, #4]
 	ldr	r2, [sp, #8]
-	movs	r3, #36
-.LVL1653:
-	.loc 2 2964 0
-	ldr	r1, [sp, #12]
-	.loc 2 2963 0
-	mul	fp, r3, r2
-	add	r7, r10, fp
-	ldr	r3, [r7, #4]
-	.loc 2 2964 0
-	mov	r0, r7
-	.loc 2 2963 0
-	str	r3, [sp, #16]
-.LVL1654:
-	.loc 2 2964 0
-	ldr	r3, [sp, #24]
-.LVL1655:
-	subs	r3, r3, r2
-	add	r2, sp, #36
-	uxtb	r3, r3
-	str	r3, [sp]
-.LVL1656:
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-.LVL1657:
-	.loc 2 2965 0
-	ldr	r2, .L1526+12
-	.loc 2 2964 0
-	mov	r5, r0
-.LVL1658:
-	.loc 2 2965 0
-	ldr	r3, [sp, #32]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1439
-	.loc 2 2966 0
-	mov	r3, #-1
-	str	r3, [r10, fp]
-.LVL1659:
-.L1440:
-	.loc 2 2962 0 discriminator 2
-	ldr	r3, [sp, #8]
+	strb	r1, [r4, r6]
+	adds	r6, r6, #1
+	uxtb	r1, r6
+	cmp	fp, r1
+	bhi	.L1278
+	ldr	r7, .L1368+4
+	mov	r1, r4
+	movs	r2, #0
+.L1281:
+	movs	r3, #1
+	adds	r6, r7, r2
+.L1280:
+	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	ip, [r1]	@ zero_extendqisi2
+	add	r0, r0, ip
+	strb	r0, [r1, r3, lsl #3]
 	adds	r3, r3, #1
-	str	r3, [sp, #8]
-.LVL1660:
-	b	.L1437
-.LVL1661:
-.L1439:
-	.loc 2 2969 0
-	ldr	r2, .L1526+16
-	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-.LVL1662:
-	.loc 2 2970 0
-	ldr	r3, .L1526+20
-	.loc 2 2973 0
-	mov	r0, r4
-.LVL1663:
-	.loc 2 2970 0
+	cmp	r3, #7
+	bne	.L1280
+	adds	r2, r2, #1
+	adds	r1, r1, #1
+	cmp	r2, #4
+	bne	.L1281
+	movs	r3, #0
+	add	r8, r8, #1
+	strb	r3, [r4, #16]
+	strb	r3, [r4, #24]
+	strb	r3, [r4, #32]
+	strb	r3, [r4, #40]
+	strb	r3, [r4, #48]
+	strb	r3, [r4, #41]
+	strb	r3, [r4, #49]
+	b	.L1277
+.L1276:
+	subs	r3, r4, #3
+	cmp	r3, #4
+	bhi	.L1284
+	smulbb	r3, r10, fp
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #52]
+	lsls	r3, r2, #3
+	str	r2, [sp, #12]
+	str	r3, [sp, #48]
+	lsls	r3, r2, #2
+	str	r3, [sp, #32]
+	movs	r3, #0
+.L1367:
+	str	r3, [sp, #28]
+	ldrb	r3, [sp, #28]	@ zero_extendqisi2
+	str	r3, [sp, #16]
+	ldr	r3, .L1368+8
+	ldr	r2, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 2971 0
-	cmp	r3, #0
-	it	eq
-	moveq	r5, #0
-.LVL1664:
-	.loc 2 2973 0
-	bl	NandcWaitFlashReady
-.LVL1665:
-	.loc 2 2974 0
-	ldr	r3, .L1526+24
-	ldr	r3, [r3]
-	ldrb	r1, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r1, #1
-	cmp	r3, #6
-	bhi	.L1442
-.LBB411:
-	.loc 2 2975 0
-	ldr	r3, .L1526+28
-	.loc 2 2976 0
-	cmp	r1, #7
-	.loc 2 2975 0
-	add	r2, r3, r4
-	ldrb	r3, [r2, #12]	@ zero_extendqisi2
-.LVL1666:
-	.loc 2 2977 0
+	cmp	r3, r2
+	bls	.L1284
+	ldr	r2, [sp, #16]
+	ldr	r3, .L1368+12
+	ldrb	r8, [r3, r2]	@ zero_extendqisi2
+	ldr	r3, .L1368+16
+	mov	r0, r8
+	ldr	r2, [r3, r8, lsl #3]
+	add	r3, r3, r8, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	str	r3, [sp, #8]
+	mov	r3, r2
+	ldr	r2, [sp, #8]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #255
+	str	r2, [r3, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r1, .L1368
+	cmp	r4, #7
 	it	eq
-	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
-.LVL1667:
-	.loc 2 2978 0
-	ldr	r2, .L1526+32
-	ldrb	r2, [r2, r4]	@ zero_extendqisi2
-	cmp	r2, r3
-	beq	.L1442
-	.loc 2 2979 0
-	ldr	r2, .L1526+36
-	mov	r0, r4
-	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.LVL1668:
-.L1442:
-.LBE411:
-	.loc 2 2982 0
-	mov	r0, r4
-	bl	NandcFlashCs
-.LVL1669:
-	.loc 2 2984 0
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	beq	.L1444
-	.loc 2 2984 0 is_stmt 0 discriminator 2
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1445
-.L1444:
-	.loc 2 2984 0 discriminator 3
-	ldr	r3, .L1526+40
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1445
-	.loc 2 2985 0 is_stmt 1
-	mov	r0, r4
-	bl	flash_enter_slc_mode
-.LVL1670:
-.L1452:
-	.loc 2 2989 0
-	ldr	r1, [sp, #36]
-	adds	r6, r1, #1
-	bne	.L1447
-	.loc 2 2989 0 is_stmt 0 discriminator 1
-	cmp	r4, #255
-	beq	.L1477
-.L1447:
-.LVL1671:
-	.loc 2 2991 0 is_stmt 1
-	cbz	r5, .L1449
-	.loc 2 2992 0
-	ldr	r3, .L1526+44
-	mov	r0, r4
-	ldr	r2, [r3]
-	add	r2, r2, r1
-	bl	FlashReadDpCmd
-.LVL1672:
-.L1450:
-	.loc 2 3001 0
-	mov	r0, r4
+	moveq	r3, #160
+	ldr	r2, [sp, #8]
+	itete	eq
+	mlaeq	r1, r3, r8, r1
+	addne	r1, r1, r8, lsl #6
+	addeq	r3, r1, #28
+	addne	r3, r1, #20
+	str	r3, [sp, #36]
+	cmp	r4, #4
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #54
+	str	r2, [r3, #2056]
+	bne	.L1288
+	movs	r2, #255
+	str	r2, [r3, #2052]
+	movs	r2, #64
+	str	r2, [r3, #2048]
+	movs	r2, #204
+.L1365:
+	str	r2, [r3, #2052]
+	movs	r2, #77
+	b	.L1366
+.L1288:
+	subs	r2, r4, #5
+	cmp	r2, #1
+	bhi	.L1290
+	ldr	r2, .L1368
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	str	r2, [r3, #2052]
+	movs	r2, #82
+.L1366:
+	str	r2, [r3, #2048]
+	cmp	r4, #6
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r5, r3, r2, lsl #8
+	mov	r3, #22
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #2056]
+	mov	r3, #23
+	str	r3, [r5, #2056]
+	mov	r3, #4
+	str	r3, [r5, #2056]
+	mov	r3, #25
+	str	r3, [r5, #2056]
+	mov	r3, #0
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r5, #2052]
+	movs	r3, #2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
 	bl	NandcWaitFlashReady
-.LVL1673:
-	.loc 2 3002 0
-	cbz	r5, .L1448
-.LVL1674:
-	.loc 2 3003 0
-	ldr	r1, [sp, #36]
-	mov	r0, r4
-	bl	FlashReadDpDataOutCmd
-.LVL1675:
-.L1448:
-	.loc 2 3004 0
-	ldr	r3, [r7, #12]
-	movs	r1, #0
-	ldr	r2, [sp, #20]
-	mov	r0, r4
-	str	r3, [sp]
-	ldr	r3, [r7, #8]
-	bl	NandcXferData
-.LVL1676:
-	.loc 2 3008 0
-	ldr	r3, .L1526+8
-	.loc 2 3004 0
-	mov	r6, r0
-.LVL1677:
-	.loc 2 3008 0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1451
-	.loc 2 3008 0 is_stmt 0 discriminator 1
-	adds	r0, r0, #1
-.LVL1678:
-	bne	.L1451
-	.loc 2 3009 0 is_stmt 1
-	ldr	r3, .L1526+8
-	movs	r5, #0
-	strb	r5, [r3]
-.LVL1679:
-	.loc 2 3011 0
-	b	.L1452
-.LVL1680:
-.L1445:
-	.loc 2 2987 0
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.LVL1681:
-	b	.L1452
-.LVL1682:
-.L1449:
-	.loc 2 2994 0
-	mov	r0, r4
-	bl	FlashReadCmd
-.LVL1683:
-	b	.L1450
-.LVL1684:
-.L1477:
-	.loc 2 2997 0
-	movs	r5, #0
-.LVL1685:
-	b	.L1448
-.LVL1686:
-.L1451:
-	.loc 2 3013 0
-	cbz	r5, .L1453
-	.loc 2 3014 0
-	ldr	r3, .L1526+44
-	mov	r0, r4
-	ldr	r1, [sp, #36]
+	subs	r3, r4, #5
+	cmp	r3, #1
+	str	r3, [sp, #40]
+	bls	.L1327
+	cmp	r4, #7
+	ite	eq
+	moveq	r2, #32
+	movne	r2, #2
+.L1293:
+	ldr	r3, .L1368+20
+	subs	r2, r2, #1
 	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashReadDpDataOutCmd
-.LVL1687:
-	.loc 2 3016 0
-	add	r3, fp, #36
-	.loc 2 3015 0
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1294:
+	ldr	r6, [r5, #2048]
+	strb	r6, [r0, #1]!
+	cmp	r2, r0
+	bne	.L1294
+	cmp	r4, #7
+	bne	.L1295
+	movs	r2, #0
+.L1297:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1296
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1296
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1297
+.L1298:
 	movs	r1, #0
-	.loc 2 3016 0
-	add	r3, r3, r10
-	.loc 2 3015 0
-	mov	r0, r4
-	ldr	r2, [r3, #12]
-	str	r2, [sp]
-	ldr	r2, [sp, #20]
-	ldr	r3, [r3, #8]
-	bl	NandcXferData
-.LVL1688:
-	.loc 2 3019 0
-	cmp	r0, #-1
-	.loc 2 3015 0
-	mov	r8, r0
-.LVL1689:
-	.loc 2 3019 0
-	it	eq
-	moveq	r5, #0
-.LVL1690:
-.L1453:
-	.loc 2 3021 0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-.LVL1691:
-	.loc 2 3022 0
-	ldr	r3, .L1526+8
-	.loc 2 3023 0
-	adds	r1, r6, #1
-	.loc 2 3022 0
-	ldrb	r2, [sp, #28]	@ zero_extendqisi2
-	strb	r2, [r3]
-	.loc 2 3023 0
-	bne	.L1454
-	.loc 2 3023 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1526+48
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1455
-.LVL1692:
-.L1459:
-	.loc 2 3032 0 is_stmt 1
-	ldr	r3, .L1526+52
-	ldr	r5, [r3]
-	cmp	r5, #0
-	bne	.L1456
-	.loc 2 3049 0
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	bl	FlashReadRawPage
-.LVL1693:
-	b	.L1525
-.LVL1694:
-.L1455:
-.LBB412:
-	.loc 2 3024 0
-	ldr	r3, .L1526+56
-	.loc 2 3026 0
-	mov	r0, r4
-	ldr	r1, [sp, #36]
-	.loc 2 3024 0
-	ldr	r3, [r3]
-	ldr	r5, [r3, #304]
-.LVL1695:
-	.loc 2 3026 0
-	movs	r3, #1
-	str	r3, [sp]
-	ldr	r2, [r7, #8]
-	ldr	r3, [r7, #12]
-	bl	FlashDdrTunningRead
-.LVL1696:
-	.loc 2 3027 0
-	adds	r2, r0, #1
-	.loc 2 3026 0
-	mov	r6, r0
-.LVL1697:
-	.loc 2 3027 0
-	beq	.L1458
-	.loc 2 3027 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1526+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r0, r3, lsr #1
-	bls	.L1478
-.L1458:
-	.loc 2 3028 0 is_stmt 1
-	ubfx	r0, r5, #8, #8
-.LVL1698:
-	bl	NandcSetDdrPara
-.LVL1699:
-.LBE412:
-	.loc 2 3030 0
-	adds	r3, r6, #1
-	beq	.L1459
-.L1478:
-.LBB413:
-	.loc 2 3025 0
-	movs	r5, #0
-.LVL1700:
-.L1454:
-.LBE413:
-	.loc 2 3051 0
-	ldr	r3, .L1526+60
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r6, r3, asr #2
-	bls	.L1467
-	.loc 2 3051 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1526+52
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L1467
-	.loc 2 3052 0 is_stmt 1
-	mov	r6, #256
-.LVL1701:
-	b	.L1462
-.L1527:
+	ldr	r0, .L1368+24
+	bl	printf
+.L1300:
+	b	.L1300
+.L1290:
+	movs	r2, #174
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2048]
+	movs	r2, #176
+	b	.L1365
+.L1327:
+	movs	r2, #16
+	b	.L1293
+.L1369:
 	.align	2
-.L1526:
-	.word	.LANCHOR1
-	.word	.LANCHOR30
-	.word	.LANCHOR5
+.L1368:
+	.word	.LANCHOR20
+	.word	.LANCHOR196
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LANCHOR198
-	.word	.LANCHOR18
-	.word	.LANCHOR20
-	.word	.LANCHOR21
-	.word	.LANCHOR20+4
-	.word	.LANCHOR8
-	.word	.LANCHOR3
-	.word	.LANCHOR29
-	.word	.LANCHOR142
-	.word	.LANCHOR19
-	.word	.LANCHOR32
-.LVL1702:
-.L1456:
-	.loc 2 3034 0
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	blx	r5
-.LVL1703:
-	.loc 2 3035 0
-	adds	r5, r0, #1
-	.loc 2 3034 0
-	mov	r6, r0
-.LVL1704:
-	.loc 2 3035 0
-	bne	.L1460
-	.loc 2 3036 0
-	ldr	r3, .L1528
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	.word	.LANCHOR6
+	.word	.LANCHOR147
+	.word	.LC21
+.L1296:
+	cmp	r1, #6
+	bhi	.L1298
+.L1299:
+	ldr	r3, .L1370
+	ldr	lr, [r3]
+	mov	r3, lr
+.L1304:
+	ldr	r1, [sp, #52]
+	sub	r2, r3, lr
+	cmp	r1, r2
+	bgt	.L1305
+	ldr	r3, .L1370
+	ldr	r1, [r3]
+	ldr	r3, [sp, #32]
+	adds	r0, r1, r3
+	movs	r3, #8
+.L1307:
+	mov	r7, r0
+	movs	r6, #0
+.L1306:
+	ldr	r2, [r7]
+	adds	r6, r6, #1
+	mvns	r2, r2
+	str	r2, [r7], #4
+	ldr	r2, [sp, #12]
+	cmp	r2, r6
+	bgt	.L1306
+	ldr	r2, [sp, #48]
 	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1461
-	.loc 2 3037 0
-	ldr	r2, .L1528+4
-	movs	r3, #0
-	mov	r0, r4
-.LVL1705:
-	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.LVL1706:
-.L1461:
-	.loc 2 3038 0
-	ldr	r3, [r7, #12]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	bl	FlashReadRawPage
-.LVL1707:
-	.loc 2 3039 0
-	ldr	r2, .L1528+8
-	.loc 2 3038 0
-	mov	r6, r0
-.LVL1708:
-	.loc 2 3039 0
-	mov	r3, r0
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1528+12
-.LVL1709:
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	bl	printf
-.LVL1710:
-	.loc 2 3040 0
-	adds	r0, r6, #1
-	bne	.L1460
-	.loc 2 3040 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1528+16
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1462
-	.loc 2 3041 0 is_stmt 1
-	ldr	r3, [sp, #12]
-	.loc 2 3042 0
-	mov	r0, r4
-	.loc 2 3041 0
-	cmp	r3, #1
-	beq	.L1463
-	.loc 2 3041 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1464
-.L1463:
-	.loc 2 3042 0 is_stmt 1
-	bl	flash_enter_slc_mode
-.LVL1711:
-.L1465:
-	.loc 2 3045 0
-	ldr	r3, .L1528+20
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r1, [sp, #36]
-	ldr	r5, [r3]
-	ldr	r3, [r7, #12]
-	blx	r5
-.LVL1712:
-.L1525:
-	.loc 2 3059 0
-	adds	r1, r0, #1
-	.loc 2 3049 0
-	mov	r6, r0
-.LVL1713:
-	mov	r5, #0
-	.loc 2 3059 0
-	bne	.L1467
-.LVL1714:
-.L1462:
-	.loc 2 3058 0
-	str	r6, [r10, fp]
-.L1468:
-	.loc 2 3062 0
-	ldr	r3, [r10, fp]
-	adds	r2, r3, #1
-	bne	.L1470
-	.loc 2 3063 0
-	ldr	r2, .L1528+8
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1528+24
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	bl	printf
-.LVL1715:
-	.loc 2 3066 0
-	ldr	r1, [r7, #12]
-	cbz	r1, .L1470
-	.loc 2 3067 0
-	movs	r3, #4
-	ldr	r0, .L1528+28
-	mov	r2, r3
-	bl	rknand_print_hex
-.LVL1716:
-.L1470:
-	.loc 2 3069 0
-	cbz	r5, .L1472
-	.loc 2 3070 0
-	ldr	r3, .L1528+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r8, r3, asr #2
-	bls	.L1473
-	.loc 2 3070 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1528+20
-	ldr	r3, [r3]
-	.loc 2 3071 0 is_stmt 1 discriminator 1
-	cmp	r3, #0
+	add	r0, r0, r2
+	bne	.L1307
+	str	r1, [sp, #20]
+	str	r3, [sp, #24]
+.L1313:
+	movs	r0, #0
+	mov	r2, r0
+.L1312:
+	movs	r3, #1
+	mov	ip, #0
+	lsl	r7, r3, r2
+	movs	r3, #16
+	str	r3, [sp, #44]
+	mov	r6, r7
+	ldr	r7, [sp, #20]
+.L1310:
+	ldr	r3, [r7]
+	bics	r3, r6, r3
+	ldr	r3, [sp, #32]
 	it	eq
-	moveq	r8, #256
-.LVL1717:
-.L1473:
-	.loc 2 3074 0
-	cmp	r8, #-1
-	.loc 2 3073 0
-	add	r3, fp, #36
-	str	r8, [r10, r3]
-	.loc 2 3074 0
-	beq	.L1472
-	.loc 2 3074 0 is_stmt 0 discriminator 1
-	cmp	r8, #256
-	.loc 2 3075 0 is_stmt 1 discriminator 1
-	itt	ne
-	movne	r2, #0
-	strne	r2, [r10, r3]
-.L1472:
-	.loc 2 3077 0
-	ldr	r3, [sp, #8]
-	add	r3, r3, r5
-	str	r3, [sp, #8]
-.LVL1718:
-	.loc 2 3078 0
+	addeq	ip, ip, #1
+	add	r7, r7, r3
+	ldr	r3, [sp, #44]
+	subs	r3, r3, #1
+	str	r3, [sp, #44]
+	bne	.L1310
+	cmp	ip, #8
+	add	r2, r2, #1
+	itt	hi
+	movhi	r3, r6
+	orrhi	r0, r0, r3
+	cmp	r2, #32
+	bne	.L1312
+	ldr	r3, [sp, #20]
+	str	r0, [r3], #4
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	str	r3, [sp, #24]
+	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #12]
-.LVL1719:
+	cmp	r3, r2
+	bgt	.L1313
+	subs	r2, r1, #4
+	add	r0, r1, #28
+	movs	r3, #0
+.L1316:
+	ldr	r6, [r2, #4]!
+	cbnz	r6, .L1315
+	adds	r3, r3, #1
+.L1315:
+	cmp	r0, r2
+	bne	.L1316
+	cmp	r3, #7
+	ble	.L1317
+	ldr	r0, .L1370+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1370+8
+	bl	printf
+.L1318:
+	b	.L1318
+.L1295:
+	cmp	r4, #6
+	bne	.L1299
+	adds	r3, r3, #7
+.L1301:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1299
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1299
+	cmp	r3, r1
+	bne	.L1301
+	movs	r1, #0
+	ldr	r0, .L1370+8
+	bl	printf
+.L1303:
+	b	.L1303
+.L1305:
+	ldr	r2, [r5, #2048]
+	strb	r2, [r3], #1
+	b	.L1304
+.L1317:
+	cmp	r4, #6
+	beq	.L1329
+	cmp	r4, #7
+	ite	eq
+	moveq	ip, #10
+	movne	ip, #8
+.L1319:
+	add	r3, fp, #-1
+	ldr	r1, [sp, #36]
+	uxtb	r3, r3
+	movs	r0, #0
+	adds	r3, r3, #1
+.L1320:
+	mov	r7, r1
+	mov	r2, lr
+.L1321:
+	ldrb	r6, [r2], #1	@ zero_extendqisi2
+	strb	r6, [r7], #1
+	sub	r6, r2, lr
+	uxtb	r6, r6
+	cmp	fp, r6
+	bhi	.L1321
+	adds	r0, r0, #1
+	add	lr, lr, r3
+	cmp	r10, r0
+	add	r1, r1, ip
+	bgt	.L1320
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r6, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #40]
 	cmp	r3, #1
-	beq	.L1474
-	.loc 2 3078 0 is_stmt 0 discriminator 2
-	ldr	r3, [sp, #16]
-	cmp	r3, #0
-	bge	.L1440
-.L1474:
-	.loc 2 3078 0 discriminator 3
-	ldr	r3, .L1528+16
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L1440
-	.loc 2 3079 0 is_stmt 1
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.LVL1720:
-	b	.L1440
-.LVL1721:
-.L1464:
-	.loc 2 3044 0
-	bl	flash_exit_slc_mode
-.LVL1722:
-	b	.L1465
-.L1460:
-	.loc 2 3031 0
-	movs	r5, #0
-.LVL1723:
-.L1467:
-	.loc 2 3059 0 discriminator 1
-	cmp	r6, #256
-	beq	.L1462
-	.loc 2 3060 0
+	bhi	.L1323
+	movs	r3, #54
+	mov	r1, #-1
+	str	r3, [r6, #2056]
+	ldr	r3, .L1370+12
+	ldr	r0, [sp, #16]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
 	movs	r3, #0
-	str	r3, [r10, fp]
-	b	.L1468
-.L1529:
+	str	r3, [r5, #2048]
+	movs	r3, #22
+	str	r3, [r6, #2056]
+	bl	FlashReadCmd
+.L1324:
+	mov	r0, r8
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	b	.L1367
+.L1329:
+	mov	ip, #4
+	b	.L1319
+.L1323:
+	movs	r3, #56
+	str	r3, [r6, #2056]
+	b	.L1324
+.L1371:
 	.align	2
-.L1528:
-	.word	.LANCHOR18
-	.word	.LANCHOR20+4
-	.word	.LANCHOR32
-	.word	.LC26
-	.word	.LANCHOR8
-	.word	.LANCHOR142
-	.word	.LC23
-	.word	.LC25
-	.cfi_endproc
-.LFE261:
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FlashProgSlc2KPages,"ax",%progbits
+.L1370:
+	.word	.LANCHOR147
+	.word	.LC22
+	.word	.LC21
+	.word	.LANCHOR20
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FlashProgSlc2KPages
+	.global	FlashGetReadRetryDefault
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashProgSlc2KPages, %function
-FlashProgSlc2KPages:
-.LFB259:
-	.loc 2 2818 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r0
+	cbz	r0, .L1372
+	subs	r2, r0, #1
+	cmp	r2, #6
+	bhi	.L1374
+	b	HynixGetReadRetryDefault
+.L1374:
+	cmp	r0, #49
+	bne	.L1375
+	ldr	r0, .L1395
+	movs	r2, #64
+	ldr	r1, .L1395+4
+	strb	r3, [r0]
+	movs	r3, #4
+	strb	r3, [r0, #1]
+	movs	r3, #15
+	strb	r3, [r0, #2]
+.L1393:
+	adds	r0, r0, #4
+	b	ftl_memcpy
+.L1375:
+	cmp	r0, #33
+	beq	.L1376
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1377
+.L1376:
+	ldr	r0, .L1395
+	strb	r3, [r0]
+	movs	r3, #4
+.L1394:
+	strb	r3, [r0, #1]
+	movs	r3, #7
+	strb	r3, [r0, #2]
+	movs	r2, #45
+	ldr	r1, .L1395+8
+	b	.L1393
+.L1377:
+	cmp	r0, #34
+	beq	.L1378
+	cmp	r0, #67
+	bne	.L1379
+.L1378:
+	ldr	r0, .L1395
+	strb	r3, [r0]
+	movs	r3, #5
+	b	.L1394
+.L1379:
+	cmp	r0, #35
+	beq	.L1380
+	cmp	r0, #68
+	bne	.L1372
+.L1380:
+	ldr	r0, .L1395
+	movs	r2, #95
+	ldr	r1, .L1395+12
+	strb	r3, [r0]
+	movs	r3, #5
+	strb	r3, [r0, #1]
+	movs	r3, #17
+	strb	r3, [r0, #2]
+	b	.L1393
+.L1372:
+	bx	lr
+.L1396:
+	.align	2
+.L1395:
+	.word	.LANCHOR20
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR11
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",%progbits
+	.align	1
+	.global	FlashInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashInit, %function
+FlashInit:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1724:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 2 2818 0
-	str	r3, [sp, #12]
-	mov	r10, r1
-	mov	r8, r2
 	mov	r4, r0
-	.loc 2 2825 0
-	ldr	r3, .L1559
-.LVL1725:
-	.loc 2 2827 0
-	mov	r6, r0
-	.loc 2 2852 0
-	ldr	fp, .L1559+28
-	.loc 2 2827 0
-	movs	r7, #0
-	.loc 2 2825 0
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [sp, #8]
-.LVL1726:
-.L1531:
-	.loc 2 2827 0 discriminator 1
-	cmp	r7, r10
-	bne	.L1537
-	.loc 2 2866 0
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L1548
-.LVL1727:
-.L1558:
-	.loc 2 2899 0
-	movs	r0, #0
-	add	sp, sp, #64
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1728:
-.L1537:
-	.cfi_restore_state
-	.loc 2 2832 0
-	sub	r3, r10, r7
-	add	r2, sp, #20
-	uxtb	r3, r3
-	mov	r1, r8
-	mov	r0, r6
-	str	r3, [sp]
-	add	r3, sp, #24
-	bl	LogAddr2PhyAddr
-.LVL1729:
-	.loc 2 2834 0
-	ldr	r2, .L1559+4
-	ldr	r3, [sp, #24]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r2, r3
-	bhi	.L1532
-	.loc 2 2835 0
-	mov	r3, #-1
-	str	r3, [r6]
-.L1533:
-	.loc 2 2827 0 discriminator 2
-	adds	r7, r7, #1
-.LVL1730:
-	adds	r6, r6, #36
-	b	.L1531
-.L1532:
-	.loc 2 2838 0
-	ldr	r2, .L1559+8
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-.LVL1731:
-	.loc 2 2839 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1732:
-	.loc 2 2840 0
-	mov	r0, r5
+	sub	sp, sp, #32
+	mov	r0, #32768
+	movs	r5, #0
+	bl	ftl_malloc
+	ldr	r3, .L1490
+	ldr	r10, .L1490+132
+	ldr	r8, .L1490+136
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1490+4
+	ldr	r6, .L1490+8
+	ldr	r7, .L1490+12
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1490+16
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1490+20
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1490+24
+	ldr	r2, .L1490+28
+	strb	r5, [r8]
+	str	r0, [r3]
+	movs	r3, #50
+	strb	r3, [r10]
+	mov	r0, r4
+	strb	r3, [r2]
+	movs	r2, #128
+	ldr	r3, .L1490+32
+	ldr	r4, .L1490+36
+	strb	r5, [r7]
+	str	r5, [r3]
+	ldr	r3, .L1490+40
+	str	r2, [r3]
+	ldr	r3, .L1490+44
+	str	r5, [r3]
+	movs	r3, #60
+	strb	r3, [r6]
+	bl	NandcInit
+	str	r10, [sp, #20]
+	ldr	r10, .L1490+140
+	str	r8, [sp, #16]
+	mov	r8, r6
+	mov	r6, r4
+.L1402:
+	uxtb	fp, r5
+	mov	r0, fp
+	bl	FlashReset
+	add	r1, r10, r5, lsl #3
+	ldr	r3, [r10, r5, lsl #3]
+	mov	r0, fp
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	str	r1, [sp, #24]
 	bl	NandcFlashCs
-.LVL1733:
-	.loc 2 2841 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashProgFirstCmd
-.LVL1734:
-	.loc 2 2842 0
-	ldr	r3, [r6, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #8]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-.LVL1735:
-	.loc 2 2843 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashProgSecondCmd
-.LVL1736:
-	.loc 2 2844 0
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1737:
-	.loc 2 2845 0
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadStatus
-.LVL1738:
-	.loc 2 2847 0
-	sbfx	r0, r0, #0, #1
-.LVL1739:
-	.loc 2 2852 0
-	ldr	r1, [sp, #20]
-	.loc 2 2850 0
-	str	r0, [r6]
-	.loc 2 2852 0
-	mov	r0, r5
-	ldr	r3, [fp]
-	add	r1, r1, r3
-	bl	FlashProgFirstCmd
-.LVL1740:
-	.loc 2 2854 0
-	ldr	r3, [r6, #8]
-	.loc 2 2853 0
-	cbz	r3, .L1534
-	.loc 2 2853 0 is_stmt 0 discriminator 1
-	add	r3, r3, #2048
-.L1534:
-	.loc 2 2855 0 is_stmt 1 discriminator 4
-	ldr	r2, [r6, #12]
-	.loc 2 2853 0 discriminator 4
-	cbz	r2, .L1535
-	.loc 2 2853 0 is_stmt 0 discriminator 5
-	adds	r2, r2, #8
-.L1535:
-	.loc 2 2853 0 discriminator 8
-	str	r2, [sp]
-	movs	r1, #1
-	ldr	r2, [sp, #8]
-	mov	r0, r5
-	bl	NandcXferData
-.LVL1741:
-	.loc 2 2856 0 is_stmt 1 discriminator 8
-	ldr	r3, [fp]
-	mov	r0, r5
-	ldr	r1, [sp, #20]
-	add	r1, r1, r3
-	bl	FlashProgSecondCmd
-.LVL1742:
-	.loc 2 2857 0 discriminator 8
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-.LVL1743:
-	.loc 2 2858 0 discriminator 8
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadStatus
-.LVL1744:
-	.loc 2 2860 0 discriminator 8
-	lsls	r2, r0, #31
-	.loc 2 2863 0 discriminator 8
-	mov	r0, r5
-.LVL1745:
-	.loc 2 2861 0 discriminator 8
-	itt	mi
-	movmi	r3, #-1
-	strmi	r3, [r6]
-	.loc 2 2863 0 discriminator 8
+	ldr	r1, [sp, #24]
+	movs	r0, #200
+	ldr	r3, [sp, #28]
+	add	r3, r3, r1, lsl #8
+	movs	r1, #144
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r3, #2052]
+	str	r3, [sp, #24]
+	bl	udelay
+	ldr	r3, [sp, #24]
+	mov	r0, fp
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #1]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #2]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #3]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #4]
+	ldr	r3, [r3, #2048]
+	strb	r3, [r4, #5]
 	bl	NandcFlashDeCs
-.LVL1746:
-	b	.L1533
-.LVL1747:
-.L1544:
-.LBB414:
-	.loc 2 2869 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1539
-	.loc 2 2870 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+12
-	bl	printf
-.LVL1748:
-.L1540:
-.LBE414:
-	.loc 2 2867 0 discriminator 2
-	adds	r6, r6, #1
-.LVL1749:
-	adds	r4, r4, #36
-.LVL1750:
-.L1538:
-	.loc 2 2867 0 is_stmt 0 discriminator 1
-	cmp	r7, r6
-	bne	.L1544
-	b	.L1558
-.L1539:
-.LBB415:
-	.loc 2 2873 0 is_stmt 1
-	subs	r3, r7, r6
-	add	r2, sp, #20
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	subs	r3, r2, #1
 	uxtb	r3, r3
-	mov	r1, r8
-	mov	r0, r4
-	.loc 2 2875 0
-	ldr	fp, .L1559+32
-	.loc 2 2873 0
-	str	r3, [sp]
-	add	r3, sp, #24
-	bl	LogAddr2PhyAddr
-.LVL1751:
-	.loc 2 2874 0
-	ldr	r2, [r10]
-	movs	r3, #0
-	.loc 2 2876 0
-	mov	ip, r4
-	add	r5, sp, #28
-	.loc 2 2874 0
-	str	r3, [r2]
-	.loc 2 2875 0
-	ldr	r2, [fp]
-	str	r3, [r2]
-	.loc 2 2876 0
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	.loc 2 2879 0
-	mov	r2, r8
-	.loc 2 2876 0
-	ldr	r3, [ip]
-	.loc 2 2879 0
-	movs	r1, #1
-	add	r0, sp, #28
-	.loc 2 2876 0
-	str	r3, [r5]
-	.loc 2 2877 0
-	ldr	r3, [r10]
-	str	r3, [sp, #36]
-	.loc 2 2878 0
-	ldr	r3, [fp]
-	str	r3, [sp, #40]
-	.loc 2 2879 0
-	bl	FlashReadPages
-.LVL1752:
-	.loc 2 2880 0
-	ldr	r5, [sp, #28]
-	adds	r3, r5, #1
-	bne	.L1541
-	.loc 2 2881 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+16
-	bl	printf
-.LVL1753:
-	.loc 2 2882 0
-	str	r5, [r4]
-.L1541:
-	.loc 2 2884 0
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1542
-	.loc 2 2885 0
-	ldr	r2, [r3]
-	ldr	r3, [fp]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1542
-	.loc 2 2886 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+20
-	bl	printf
-.LVL1754:
-	.loc 2 2887 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L1542:
-	.loc 2 2890 0
-	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L1540
-	.loc 2 2891 0
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1540
-	.loc 2 2892 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1559+24
+	cmp	r3, #253
+	bhi	.L1398
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L1490+48
+	str	r1, [sp, #12]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	str	r1, [sp]
+	adds	r1, r5, #1
 	bl	printf
-.LVL1755:
-	.loc 2 2893 0
-	mov	r3, #-1
+.L1398:
+	cbnz	r5, .L1399
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1443
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1443
+.L1399:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	adds	r4, r4, #8
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r4, #-8]
+	cmp	r5, #4
+	bne	.L1402
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #173
+	beq	.L1403
+	ldr	r3, .L1490+52
+	ldr	r0, [r3]
+	bl	NandcSetDdrMode
+.L1403:
+	mov	r2, #852
+	movs	r1, #0
+	ldr	r0, .L1490+56
+	bl	ftl_memset
+	ldr	r4, .L1490+60
+	ldr	r3, .L1490+64
+	ldr	r5, .L1490+68
 	str	r3, [r4]
-	b	.L1540
-.LVL1756:
-.L1548:
-.LBE415:
-	movs	r6, #0
-.LBB416:
-	.loc 2 2874 0
-	ldr	r10, .L1559+36
-.LVL1757:
-	b	.L1538
-.L1560:
-	.align	2
-.L1559:
-	.word	.LANCHOR30
-	.word	.LANCHOR25
-	.word	.LANCHOR26
-	.word	.LC27
-	.word	.LC28
-	.word	.LC29
-	.word	.LC30
-	.word	.LANCHOR3
-	.word	.LANCHOR196
-	.word	.LANCHOR195
-.LBE416:
-	.cfi_endproc
-.LFE259:
-	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
-	.section	.text.FlashProgPages,"ax",%progbits
-	.align	1
-	.global	FlashProgPages
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashProgPages, %function
-FlashProgPages:
-.LFB262:
-	.loc 2 3108 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1758:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #72
-	.cfi_def_cfa_offset 104
-	.loc 2 3115 0
-	ldr	r5, .L1613
-	.loc 2 3108 0
-	mov	r4, r0
-	mov	r8, r2
-	str	r1, [sp, #8]
-	.loc 2 3115 0
-	ldr	r5, [r5]
-	.loc 2 3108 0
-	str	r3, [sp, #20]
-	.loc 2 3115 0
-	ldrb	r5, [r5, #19]	@ zero_extendqisi2
-	str	r5, [sp, #16]
-.LVL1759:
-	.loc 2 3120 0
-	ldr	r5, .L1613+4
-.LVL1760:
-	ldrb	r7, [r5]	@ zero_extendqisi2
-	cbnz	r7, .L1562
-	.loc 2 3116 0
-	ldr	r3, .L1613+8
-.LVL1761:
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [sp, #12]
-.LVL1762:
-.L1563:
-	.loc 2 3123 0 discriminator 1
-	ldr	r3, [sp, #8]
-	cmp	r7, r3
-	bcc	.L1576
-	.loc 2 3180 0 discriminator 1
-	ldr	r6, .L1613+12
-	movs	r5, #0
-	.loc 2 3182 0 discriminator 1
-	ldr	r7, .L1613+16
-.LVL1763:
-.L1577:
-	.loc 2 3180 0 discriminator 1
-	ldrb	r3, [r6]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L1579
-	.loc 2 3186 0
-	ldr	r3, [sp, #20]
-	cmp	r3, #0
-	bne	.L1580
-.LVL1764:
-.L1588:
-	.loc 2 3218 0
-	movs	r0, #0
-	b	.L1561
-.LVL1765:
-.L1562:
-	.loc 2 3121 0
-	bl	FlashProgSlc2KPages
-.LVL1766:
-.L1561:
-	.loc 2 3219 0
-	add	sp, sp, #72
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1767:
-.L1576:
-	.cfi_restore_state
-	.loc 2 3124 0
-	ldr	r3, [sp, #8]
-	movs	r6, #36
-	muls	r6, r7, r6
-	add	r2, sp, #28
-	mov	r1, r8
-	subs	r3, r3, r7
-	uxtb	r3, r3
-	add	fp, r4, r6
-	str	r3, [sp]
-	mov	r0, fp
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-.LVL1768:
-	.loc 2 3125 0
-	ldr	r3, .L1613+12
-	.loc 2 3124 0
-	mov	r10, r0
-.LVL1769:
-	.loc 2 3125 0
-	ldr	r0, [sp, #32]
-.LVL1770:
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, r0
-	bhi	.L1565
-	.loc 2 3126 0
-	mov	r3, #-1
-	str	r3, [r4, r6]
-.L1566:
-	.loc 2 3123 0 discriminator 2
-	adds	r7, r7, #1
-.LVL1771:
-	b	.L1563
-.L1565:
-	.loc 2 3129 0
-	ldr	r3, .L1613+20
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	.loc 2 3130 0
-	cmp	r3, #0
-	.loc 2 3131 0
-	ldr	r3, .L1613+24
-	.loc 2 3130 0
-	it	eq
-	moveq	r10, #0
-.LVL1772:
-	.loc 2 3131 0
-	add	r3, r3, r0, lsl #4
-	ldr	r3, [r3, #8]
-	cbz	r3, .L1568
-	.loc 2 3134 0
-	uxtb	r0, r0
-	bl	FlashWaitCmdDone
-.LVL1773:
-.L1568:
-	.loc 2 3136 0
-	ldr	r3, [sp, #32]
-	.loc 2 3137 0
-	movs	r1, #0
-	.loc 2 3136 0
-	ldr	r2, .L1613+24
-	add	r2, r2, r3, lsl #4
-	.loc 2 3137 0
-	str	r1, [r2, #12]
-	.loc 2 3138 0
-	ldr	r1, [sp, #28]
-	.loc 2 3136 0
-	str	fp, [r2, #8]
-	.loc 2 3138 0
-	str	r1, [r2, #4]
-	.loc 2 3141 0
-	cmp	r10, #0
-	beq	.L1569
-	.loc 2 3142 0
-	add	r1, r6, #36
-	add	r1, r1, r4
-	str	r1, [r2, #12]
-.L1569:
-	.loc 2 3143 0
-	ldr	r2, .L1613+28
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-.LVL1774:
-	.loc 2 3144 0
-	lsls	r3, r3, #4
-	ldr	r2, .L1613+24
-	.loc 2 3146 0
-	mov	r0, r5
-	.loc 2 3144 0
-	strb	r5, [r2, r3]
-	.loc 2 3145 0
-	ldr	r3, .L1613+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1570
-	.loc 2 3146 0
-	bl	NandcWaitFlashReady
-.LVL1775:
-.L1571:
-	.loc 2 3152 0
-	ldr	r3, [sp, #16]
-	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1572
-	.loc 2 3153 0
-	ldr	r3, .L1613+32
-	ldrb	r3, [r3, r5]	@ zero_extendqisi2
-	cbz	r3, .L1572
-	.loc 2 3154 0
-	ldr	r1, .L1613+36
 	movs	r3, #0
-	mov	r0, r5
-	adds	r2, r1, #4
-	ldrb	r1, [r1, #1]	@ zero_extendqisi2
-	bl	HynixSetRRPara
-.LVL1776:
-.L1572:
-	.loc 2 3156 0
-	mov	r0, r5
-	bl	NandcFlashCs
-.LVL1777:
-	.loc 2 3157 0
-	cmp	r8, #1
-	.loc 2 3158 0
-	mov	r0, r5
-	.loc 2 3157 0
-	bne	.L1573
-	.loc 2 3157 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1613+16
+	strb	r3, [r5]
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L1404
+	cmp	r3, #218
+	beq	.L1404
+	and	r2, r3, #223
+	cmp	r2, #209
+	beq	.L1404
+	cmp	r3, #220
+	bne	.L1405
+	ldrb	r2, [r6, #3]	@ zero_extendqisi2
+	cmp	r2, #149
+	bne	.L1405
+.L1404:
+	ldr	r1, [sp, #16]
+	movs	r2, #1
+	strb	r2, [r1]
+	movs	r2, #16
+	ldr	r1, [sp, #20]
+	strb	r2, [r8]
+	strb	r2, [r1]
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	ldr	r2, .L1490+72
+	cmp	r1, #152
+	strb	r1, [r2, #1]
+	strb	r3, [r2, #2]
+	bne	.L1406
+	ldrsb	r1, [r6, #4]
+	cmp	r1, #0
+	itt	ge
+	movge	r1, #24
+	strbge	r1, [r8]
+.L1406:
+	ldr	r1, .L1490+76
+	ldr	r0, .L1490+80
+	ldr	r1, [r1]
+	cmp	r1, r0
+	beq	.L1407
+	movw	r0, #2049
+	cmp	r1, r0
+	bne	.L1408
+.L1407:
+	movs	r1, #16
+	strb	r1, [r8]
+.L1408:
+	cmp	r3, #218
+	bne	.L1409
+	mov	r1, #2048
+.L1486:
+	strh	r1, [r2, #14]	@ movhi
+	strb	r3, [r2, #2]
+.L1410:
+	movs	r2, #32
+	ldr	r1, .L1490+84
+	ldr	r0, .L1490+88
+	bl	ftl_memcpy
+	movs	r2, #32
+	ldr	r1, .L1490+72
+	ldr	r0, .L1490+64
+	bl	ftl_memcpy
+.L1405:
+	ldr	r3, [sp, #16]
+	ldr	r8, .L1490+144
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1573
-	.loc 2 3158 0 is_stmt 1
-	bl	flash_enter_slc_mode
-.LVL1778:
-.L1574:
-	.loc 2 3161 0
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgFirstCmd
-.LVL1779:
-	.loc 2 3162 0
-	ldr	r3, [fp, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [fp, #8]
-	bl	NandcXferData
-.LVL1780:
-	.loc 2 3163 0
-	cmp	r10, #0
-	beq	.L1575
-	.loc 2 3164 0
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgDpFirstCmd
-.LVL1781:
-	.loc 2 3165 0
-	ldr	r3, .L1613+40
-	mov	r0, r5
-	ldr	r2, [sp, #32]
-	.loc 2 3167 0
-	adds	r6, r6, #36
-	.loc 2 3165 0
-	ldr	r1, [sp, #28]
-	.loc 2 3167 0
-	add	r6, r6, r4
-	.loc 2 3165 0
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-.LVL1782:
-	.loc 2 3166 0
-	ldr	r3, .L1613+44
-	mov	r0, r5
-	ldr	r1, [sp, #28]
-	ldr	r3, [r3]
-	add	r1, r1, r3
-	bl	FlashProgDpSecondCmd
-.LVL1783:
-	.loc 2 3167 0
-	ldr	r3, [r6, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	mov	r0, r5
-	str	r3, [sp]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-.LVL1784:
-.L1575:
-	.loc 2 3169 0
-	ldr	r1, [sp, #28]
-	mov	r0, r5
-	bl	FlashProgSecondCmd
-.LVL1785:
-	.loc 2 3170 0
-	mov	r0, r5
-	.loc 2 3171 0
-	add	r7, r7, r10
-.LVL1786:
-	.loc 2 3170 0
-	bl	NandcFlashDeCs
-.LVL1787:
-	b	.L1566
-.L1570:
-	.loc 2 3148 0
-	bl	NandcFlashCs
-.LVL1788:
-	.loc 2 3149 0
-	ldr	r2, [sp, #32]
-	mov	r0, r5
-	ldr	r3, .L1613+40
-	ldr	r1, [sp, #28]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-.LVL1789:
-	.loc 2 3150 0
-	mov	r0, r5
-	bl	NandcFlashDeCs
-.LVL1790:
-	b	.L1571
-.L1573:
-	.loc 2 3160 0
-	bl	flash_exit_slc_mode
-.LVL1791:
-	b	.L1574
-.LVL1792:
-.L1579:
-	.loc 2 3181 0
-	uxtb	r0, r5
-	bl	FlashWaitCmdDone
-.LVL1793:
-	.loc 2 3182 0
-	cmp	r8, #1
-	bne	.L1578
-	.loc 2 3182 0 is_stmt 0 discriminator 1
-	ldrb	r3, [r7]	@ zero_extendqisi2
-	cbz	r3, .L1578
-	.loc 2 3183 0 is_stmt 1
-	ldr	r2, .L1613+24
-	lsls	r3, r5, #4
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	flash_exit_slc_mode
-.LVL1794:
-.L1578:
-	.loc 2 3180 0 discriminator 2
-	adds	r5, r5, #1
-.LVL1795:
-	b	.L1577
-.L1580:
-.LBB417:
-	.loc 2 3194 0
-	ldr	r7, .L1613+48
-.LBE417:
-	.loc 2 3186 0
-	movs	r6, #0
-.LVL1796:
-.L1581:
-	.loc 2 3187 0 discriminator 1
-	ldr	r3, [sp, #8]
-	cmp	r6, r3
-	beq	.L1588
-.LBB418:
-	.loc 2 3189 0
+	bne	.L1412
+	bl	FlashLoadPhyInfoInRam
+	cbnz	r0, .L1414
 	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1582
-	.loc 2 3190 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+52
+	ldr	r10, .L1490+100
+	ldrh	r3, [r3, #16]
+	lsrs	r3, r3, #8
+	lsls	r1, r3, #31
+	and	r0, r3, #7
+	strb	r0, [r10]
+	bmi	.L1414
+	movs	r3, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r10]	@ zero_extendqisi2
+	bl	NandcSetMode
+.L1414:
+	ldr	r3, [r4]
+	ldrb	r3, [r3, #26]	@ zero_extendqisi2
+	strb	r3, [r8]
+	bl	FlashLoadPhyInfo
+	cmp	r0, #0
+	beq	.L1412
+	ldr	r3, [r4]
+	ldr	r0, .L1490+92
+	ldrh	r1, [r3, #14]
 	bl	printf
-.LVL1797:
-.L1583:
-.LBE418:
-	.loc 2 3187 0 discriminator 2
-	adds	r6, r6, #1
-.LVL1798:
-	adds	r4, r4, #36
-	b	.L1581
-.L1582:
-.LBB419:
-	.loc 2 3193 0
-	ldr	r3, [sp, #8]
-	add	r2, sp, #28
-	mov	r1, r8
-	mov	r0, r4
-	.loc 2 3195 0
-	ldr	r10, .L1613+68
-	.loc 2 3196 0
-	add	r5, sp, #36
-	.loc 2 3193 0
-	subs	r3, r3, r6
-	uxtb	r3, r3
-	str	r3, [sp]
-	add	r3, sp, #32
-	bl	LogAddr2PhyAddr
-.LVL1799:
-	.loc 2 3194 0
-	ldr	r2, [r7]
-	movs	r3, #0
-	.loc 2 3196 0
-	mov	ip, r4
-	.loc 2 3194 0
-	str	r3, [r2]
-	.loc 2 3195 0
-	ldr	r2, [r10]
-	str	r3, [r2]
-	.loc 2 3196 0
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	ip!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	.loc 2 3199 0
-	mov	r2, r8
-	.loc 2 3196 0
-	ldr	r3, [ip]
-	.loc 2 3199 0
-	movs	r1, #1
-	add	r0, sp, #36
-	.loc 2 3196 0
-	str	r3, [r5]
-	.loc 2 3197 0
-	ldr	r3, [r7]
-	str	r3, [sp, #44]
-	.loc 2 3198 0
-	ldr	r3, [r10]
-	str	r3, [sp, #48]
-	.loc 2 3199 0
-	bl	FlashReadPages
-.LVL1800:
-	.loc 2 3200 0
-	ldr	r5, [sp, #36]
-	adds	r3, r5, #1
-	bne	.L1584
-	.loc 2 3201 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+56
-	bl	printf
-.LVL1801:
-	.loc 2 3202 0
-	str	r5, [r4]
-.L1584:
-	.loc 2 3204 0
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1585
-	.loc 2 3205 0
-	ldr	r2, [r3]
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	cmp	r2, r3
-	beq	.L1585
-	.loc 2 3206 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+60
-	bl	printf
-.LVL1802:
-	.loc 2 3207 0
-	mov	r3, #-1
-	str	r3, [r4]
-.L1585:
-	.loc 2 3210 0
-	ldr	r3, [r4, #8]
-	cmp	r3, #0
-	beq	.L1583
-	.loc 2 3211 0
+	bl	FlashLoadPhyInfoInRam
+	adds	r2, r0, #1
+	beq	.L1397
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	bl	FlashGetReadRetryDefault
+	ldr	r3, [r4]
+	ldr	r2, .L1490+96
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	addw	r2, r2, #4095
+	cmp	r1, r2, asr #12
+	blt	.L1417
+	ldrh	r2, [r3, #14]
+	adds	r2, r2, #255
+	cmp	r1, r2, asr #8
+	bge	.L1418
+.L1417:
+	ldrh	r2, [r3, #14]
+	bic	r2, r2, #255
+	strh	r2, [r3, #14]	@ movhi
+.L1418:
+	ldr	r3, .L1490+100
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1419
+	bl	FlashSavePhyInfo
+	ldr	r3, .L1490+104
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+.L1419:
+	bl	FlashSavePhyInfo
+.L1412:
+	ldr	fp, [r4]
+	ldr	r10, .L1490+100
+	ldrb	r3, [fp, #26]	@ zero_extendqisi2
+	ldrh	r0, [fp, #10]
+	strb	r3, [r8]
+	ldrh	r3, [fp, #16]
+	ubfx	r2, r3, #7, #1
+	ubfx	r1, r3, #3, #1
+	strb	r2, [r5]
+	ldr	r2, .L1490+108
+	ldr	r5, .L1490+112
+	strb	r1, [r2]
+	ubfx	r1, r3, #4, #1
+	ldr	r2, .L1490+116
+	ubfx	r3, r3, #8, #3
+	strb	r3, [r10]
+	movs	r3, #0
+	str	r3, [r5]
+	strb	r1, [r2]
+	ldrb	r1, [fp, #12]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	mov	r1, r0
+	ldrb	r0, [fp, #18]	@ zero_extendqisi2
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	mov	ip, r5
+	ldrh	r2, [r3, #16]
+	tst	r2, #64
+	beq	.L1421
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	ldr	r3, .L1490+120
+	ldr	r2, .L1490+124
+	strb	r0, [r3]
+	ldr	r3, .L1490+56
+	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	ldrb	lr, [r3, #2]	@ zero_extendqisi2
+	strb	r1, [r2]
+	ldr	r1, .L1490+128
+	strb	lr, [r1]
+	b	.L1491
+.L1492:
+	.align	2
+.L1490:
+	.word	.LANCHOR147
+	.word	.LANCHOR153
+	.word	.LANCHOR152
+	.word	.LANCHOR30
+	.word	.LANCHOR197
+	.word	.LANCHOR198
+	.word	.LANCHOR199
+	.word	.LANCHOR150
+	.word	.LANCHOR149
+	.word	.LANCHOR22
+	.word	.LANCHOR3
+	.word	.LANCHOR144
+	.word	.LC23
+	.word	.LANCHOR155
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR31
+	.word	.LANCHOR5
+	.word	.LANCHOR200
+	.word	.LANCHOR29
+	.word	1446522928
+	.word	.LANCHOR143+32
+	.word	.LANCHOR7
+	.word	.LC24
+	.word	.LANCHOR122
+	.word	.LANCHOR24
+	.word	.LANCHOR148
+	.word	.LANCHOR201
+	.word	.LANCHOR145
+	.word	.LANCHOR27
+	.word	.LANCHOR10
+	.word	.LANCHOR13
+	.word	.LANCHOR151
+	.word	.LANCHOR2
+	.word	.LANCHOR1
+	.word	.LANCHOR6
+	.word	.LANCHOR8
+.L1491:
+	add	lr, r0, #-1
+	cmp	lr, #6
+	mov	lr, r1
+	bhi	.L1422
+	ldr	r2, .L1493
+	str	r2, [r5]
+	subs	r2, r0, #5
+	cmp	r2, #1
+	bhi	.L1423
+	ldr	r2, .L1493+4
+	adds	r3, r3, #20
+	movs	r1, #1
+	str	r1, [r2]
+.L1424:
+	subs	r1, r3, #1
+	movs	r2, #0
+	adds	r3, r3, #31
+.L1426:
+	ldrsb	r5, [r1, #1]!
+	cbnz	r5, .L1425
+	adds	r2, r2, #1
+.L1425:
+	cmp	r3, r1
+	bne	.L1426
+	cmp	r2, #27
+	bls	.L1421
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+.L1421:
+	ldr	r3, .L1493+8
 	ldr	r2, [r3]
-	ldr	r3, [r7]
-	ldr	r3, [r3]
+	ldr	r3, .L1493+12
 	cmp	r2, r3
-	beq	.L1583
-	.loc 2 3212 0
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+64
-	bl	printf
-.LVL1803:
-	.loc 2 3213 0
-	mov	r3, #-1
+	bne	.L1437
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cbz	r3, .L1437
+	ldr	r3, [r4]
+	movs	r2, #0
+	strb	r2, [r3, #18]
+.L1437:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #44
+	bne	.L1438
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L1438
+	movs	r3, #0
+	movs	r0, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+.L1438:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1439
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	cbnz	r2, .L1440
+	lsls	r3, r3, #31
+	bmi	.L1439
+.L1440:
+	ldr	r3, .L1493+16
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+.L1439:
+	movs	r0, #0
+	movs	r7, #16
+	bl	flash_exit_slc_mode
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r0, .L1493+20
+	bl	FlashReadIdbDataRaw
+	ldr	r8, [r4]
+	ldr	r3, [sp, #20]
+	ldr	r4, .L1493+24
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	strb	r7, [r3]
+	ldrh	r5, [r8, #10]
+	strh	r1, [r4, #8]	@ movhi
+	ldrb	r3, [r8, #7]	@ zero_extendqisi2
+	mov	r0, r5
+	str	r3, [r4, #4]
+	ldr	r3, [r6]
+	ldrh	r6, [r8, #14]
 	str	r3, [r4]
-	b	.L1583
-.L1614:
+	ldr	r3, .L1493+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r4, #10]	@ movhi
+	ldrb	r3, [r8, #13]	@ zero_extendqisi2
+	strh	r5, [r4, #16]	@ movhi
+	strh	r6, [r4, #14]	@ movhi
+	strh	r3, [r4, #12]	@ movhi
+	bl	__aeabi_idiv
+	mov	r2, #512
+	strh	r0, [r4, #18]	@ movhi
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	strh	r2, [r4, #24]	@ movhi
+	ldr	r2, [sp, #16]
+	strh	r3, [r4, #20]	@ movhi
+	smulbb	r5, r5, r3
+	strh	r7, [r4, #26]	@ movhi
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	uxth	r5, r5
+	cmp	r2, #1
+	strh	r5, [r4, #22]	@ movhi
+	bne	.L1441
+	lsls	r3, r3, #1
+	lsrs	r2, r6, #1
+	lsls	r5, r5, #1
+	strh	r3, [r4, #20]	@ movhi
+	movs	r3, #8
+	strh	r2, [r4, #14]	@ movhi
+	strh	r5, [r4, #22]	@ movhi
+	strh	r3, [r4, #26]	@ movhi
+.L1441:
+	ldrb	r0, [r8, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+.L1397:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1409:
+	cmp	r3, #220
+	bne	.L1410
+	mov	r1, #4096
+	b	.L1486
+.L1423:
+	add	r2, r3, #28
+	adds	r3, r3, #20
+	cmp	r0, #7
+	it	eq
+	moveq	r3, r2
+	b	.L1424
+.L1422:
+	sub	r3, r0, #17
+	cmp	r3, #2
+	bhi	.L1428
+	ldr	r3, .L1493+32
+	cmp	r0, #19
+	str	r3, [r5]
+	ite	ne
+	movne	r3, #7
+	moveq	r3, #15
+	strb	r3, [r1]
+	b	.L1421
+.L1428:
+	cmp	r0, #33
+	beq	.L1430
+	sub	r3, r0, #65
+	cmp	r3, #1
+	bhi	.L1431
+.L1430:
+	ldr	r3, .L1493+36
+	str	r3, [ip]
+	movs	r3, #4
+	strb	r3, [r2]
+	movs	r3, #7
+	strb	r3, [lr]
+	b	.L1421
+.L1431:
+	sub	r3, r0, #67
+	uxtb	r3, r3
+	cmp	r3, #1
+	bls	.L1432
+	sub	r1, r0, #34
+	cmp	r1, #1
+	bhi	.L1433
+.L1432:
+	ldr	r1, .L1493+36
+	cmp	r0, #35
+	str	r1, [ip]
+	ldr	r1, .L1493+40
+	beq	.L1434
+	cmp	r0, #68
+	beq	.L1434
+	movs	r0, #7
+.L1487:
+	cmp	r3, #1
+	strb	r0, [r1]
+	ite	ls
+	movls	r3, #4
+	movhi	r3, #5
+	strb	r3, [r2]
+	b	.L1421
+.L1434:
+	movs	r0, #17
+	b	.L1487
+.L1433:
+	cmp	r0, #49
+	itt	eq
+	ldreq	r3, .L1493+44
+	streq	r3, [r5]
+	b	.L1421
+.L1443:
+	mvn	r0, #1
+	b	.L1397
+.L1494:
 	.align	2
-.L1613:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR30
+.L1493:
+	.word	HynixReadRetrial
+	.word	.LANCHOR36
+	.word	.LANCHOR29
+	.word	1446522928
+	.word	.LANCHOR148
+	.word	.LANCHOR141
+	.word	.LANCHOR15
 	.word	.LANCHOR25
-	.word	.LANCHOR8
-	.word	.LANCHOR27
-	.word	.LANCHOR23
-	.word	.LANCHOR26
-	.word	.LANCHOR21
-	.word	.LANCHOR20
-	.word	.LANCHOR17
-	.word	.LANCHOR3
-	.word	.LANCHOR195
-	.word	.LC27
-	.word	.LC28
-	.word	.LC29
-	.word	.LC30
-	.word	.LANCHOR196
-.LBE419:
-	.cfi_endproc
-.LFE262:
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FlashTestBlk,"ax",%progbits
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+	.word	.LANCHOR151
+	.word	SamsungReadRetrial
+	.size	FlashInit, .-FlashInit
+	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
-	.global	FlashTestBlk
+	.global	FlashReadSlc2KPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-.LFB235:
-	.loc 2 1053 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 104
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1804:
-	.loc 2 1058 0
-	ldr	r3, .L1618
-	.loc 2 1053 0
-	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	r3, .L1524
+	mov	fp, r2
 	mov	r4, r0
-	sub	sp, sp, #108
-	.cfi_def_cfa_offset 120
-	.loc 2 1058 0
+	movs	r7, #0
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1496:
+	cmp	r7, r8
+	bne	.L1509
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1509:
+	sub	r3, r8, r7
+	add	r2, sp, #12
+	uxtb	r3, r3
+	mov	r1, fp
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #8
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1524+4
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1497
+	mov	r3, #-1
+	str	r3, [r4]
+.L1498:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1496
+.L1497:
+	ldr	r2, .L1524+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #12]
+	mov	r0, r5
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r3, [r4, #12]
+	mov	r2, r10
+	movs	r1, #0
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r4, #8]
+	bl	NandcXferData
+	ldr	r3, .L1524+12
+	mov	r6, r0
+	ldr	r1, [sp, #12]
+	mov	r0, r5
 	ldr	r3, [r3]
-	cmp	r0, r3
-	bcc	.L1617
-.LVL1805:
-.LBB422:
-.LBB423:
-	.loc 2 1061 0
-	ldr	r5, .L1618+4
-	.loc 2 1062 0
-	add	r0, sp, #40
-.LVL1806:
-	.loc 2 1063 0
-	movs	r2, #32
-	movs	r1, #165
-	.loc 2 1062 0
-	str	r0, [sp, #16]
-	.loc 2 1065 0
-	lsls	r4, r4, #10
-.LVL1807:
-	.loc 2 1061 0
-	ldr	r3, [r5]
-	str	r3, [sp, #12]
-	.loc 2 1063 0
-	bl	ftl_memset
-.LVL1808:
-	.loc 2 1064 0
-	movs	r2, #8
-	movs	r1, #90
-	ldr	r0, [r5]
-	bl	ftl_memset
-.LVL1809:
-	.loc 2 1066 0
-	movs	r2, #1
-	add	r0, sp, #4
-	mov	r1, r2
-	.loc 2 1065 0
-	str	r4, [sp, #8]
-	.loc 2 1066 0
-	bl	FlashEraseBlocks
-.LVL1810:
-	.loc 2 1067 0
-	movs	r3, #1
-	add	r0, sp, #4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL1811:
-	.loc 2 1068 0
-	ldr	r4, [sp, #4]
-	.loc 2 1074 0
-	movs	r2, #1
+	add	r1, r1, r3
+	bl	FlashReadCmd
+	ldr	r3, [r4, #8]
+	cbz	r3, .L1499
+	add	r3, r3, #2048
+.L1499:
+	ldr	r2, [r4, #12]
+	cbz	r2, .L1500
+	adds	r2, r2, #8
+.L1500:
+	str	r2, [sp]
 	movs	r1, #0
-	add	r0, sp, #4
-	.loc 2 1068 0
-	adds	r4, r4, #0
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	mov	r1, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, .L1524+16
+	cmp	r6, r1
+	it	cc
+	movcc	r6, r1
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r3, r2, r2, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1501
+	adds	r5, r6, #1
 	it	ne
-	movne	r4, #1
-	negs	r4, r4
-.LDL1:
-.LVL1812:
-	.loc 2 1074 0
-	bl	FlashEraseBlocks
-.LVL1813:
-.L1615:
-.LBE423:
-.LBE422:
-	.loc 2 1076 0
-	mov	r0, r4
-	add	sp, sp, #108
-	.cfi_remember_state
-	.cfi_def_cfa_offset 12
-	@ sp needed
-	pop	{r4, r5, pc}
-.LVL1814:
-.L1617:
-	.cfi_restore_state
-	.loc 2 1059 0
-	movs	r4, #0
-	b	.L1615
-.L1619:
+	movne	r6, #256
+	str	r6, [r4]
+.L1504:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1505
+	ldr	r1, [r3, #12]
+	adds	r1, r1, #1
+	bne	.L1505
+	ldr	r1, [r3, #8]
+	adds	r0, r1, #1
+	bne	.L1505
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	it	ne
+	strne	r1, [r4]
+.L1505:
+	ldr	r3, [r4]
+	adds	r1, r3, #1
+	bne	.L1498
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1524+20
+	bl	printf
+	ldr	r1, [r4, #8]
+	cbz	r1, .L1507
+	movs	r3, #8
+	movs	r2, #4
+	ldr	r0, .L1524+24
+	bl	rknand_print_hex
+.L1507:
+	ldr	r1, [r4, #12]
+	cmp	r1, #0
+	beq	.L1498
+	movs	r3, #4
+	ldr	r0, .L1524+28
+	mov	r2, r3
+	bl	rknand_print_hex
+	b	.L1498
+.L1501:
+	movs	r3, #0
+	str	r3, [r4]
+	b	.L1504
+.L1525:
 	.align	2
-.L1618:
-	.word	.LANCHOR146
-	.word	.LANCHOR150
-	.cfi_endproc
-.LFE235:
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+.L1524:
+	.word	.LANCHOR31
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR3
+	.word	.LANCHOR33
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
-	.global	FtlLowFormatEraseBlock
+	.global	FlashReadPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-.LFB300:
-	.loc 4 654 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1815:
-	.loc 4 663 0
-	ldr	r3, .L1665
-	.loc 4 654 0
+	ldr	r3, .L1617
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 4 654 0
-	str	r0, [sp, #8]
-	.loc 4 663 0
-	ldr	r3, [r3]
-	.loc 4 654 0
-	str	r1, [sp, #4]
-	.loc 4 663 0
-	cmp	r3, #0
-	bne	.L1647
-	.loc 4 661 0
-	ldr	r1, .L1665+4
-.LVL1816:
-	.loc 4 672 0
-	mov	r10, r3
-	.loc 4 671 0
-	ldr	r4, [sp, #8]
-	.loc 4 666 0
-	mov	r5, r3
-	.loc 4 673 0
-	ldr	r7, .L1665+8
-	mov	r8, #36
-	.loc 4 661 0
-	ldrb	r2, [r1]	@ zero_extendqisi2
-	mov	fp, r1
+	sub	sp, sp, #40
+	mov	r10, r0
+	str	r1, [sp, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	cbnz	r3, .L1527
+	ldr	r2, .L1617+4
+	mov	r8, r3
+	str	r3, [sp, #8]
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
-.LVL1817:
-	.loc 4 668 0
-	ldr	r2, .L1665+12
-	ldrb	r0, [r2]	@ zero_extendqisi2
-.LVL1818:
-	str	r2, [sp, #16]
-	str	r0, [sp, #12]
-.LVL1819:
-	.loc 4 671 0
-	ldr	r0, .L1665+16
-	str	r4, [r0]
-.LVL1820:
-	.loc 4 667 0
-	mov	r4, r3
-.LVL1821:
-.L1622:
-	.loc 4 672 0 discriminator 1
-	ldr	r3, .L1665+20
-	uxth	r2, r10
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	bhi	.L1626
-	.loc 4 692 0
-	cmp	r5, #0
-	beq	.L1620
-	.loc 4 668 0
-	ldr	r3, [sp, #12]
-	.loc 4 696 0
-	movs	r7, #0
-	.loc 4 697 0
-	ldr	r8, .L1665+8
-	mov	r2, r5
-	.loc 4 696 0
-	strb	r7, [fp]
-	.loc 4 701 0
-	mov	r10, #36
-.LVL1822:
-	.loc 4 668 0
-	adds	r6, r3, #0
-	it	ne
-	movne	r6, #1
-	.loc 4 697 0
-	ldr	r0, [r8]
-	mov	r1, r6
-	bl	FlashEraseBlocks
-.LVL1823:
-	.loc 4 698 0
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	strb	r3, [fp]
-.LVL1824:
-.L1628:
-	.loc 4 700 0 discriminator 1
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1630
-	.loc 4 708 0
-	ldr	r3, [sp, #4]
-	cmp	r3, #0
-	bne	.L1631
-	.loc 4 660 0
-	uxth	r6, r6
-	.loc 4 659 0
-	movs	r3, #6
-	str	r3, [sp, #16]
-	.loc 4 657 0
-	movs	r3, #1
-	str	r3, [sp, #12]
-.LVL1825:
-.L1632:
-	.loc 4 720 0
-	ldr	r8, .L1665+8
-	mov	r10, #0
-.LVL1826:
-.L1641:
-	.loc 4 719 0
-	mov	fp, #0
-	.loc 4 718 0
-	mov	r5, fp
-.LVL1827:
-.L1633:
-	.loc 4 719 0 discriminator 1
-	ldr	r3, .L1665+20
-	uxth	r2, fp
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	bhi	.L1636
-	.loc 4 734 0
-	cbz	r5, .L1620
-	.loc 4 737 0
-	ldr	fp, .L1665+4
-.LVL1828:
-	.loc 4 738 0
-	movs	r3, #1
-	.loc 4 737 0
-	movs	r7, #0
-	.loc 4 738 0
-	mov	r2, r6
-.LVL1829:
-	mov	r1, r5
-	ldr	r0, [r8]
-	.loc 4 737 0
-	strb	r7, [fp]
-	.loc 4 738 0
-	bl	FlashProgPages
-.LVL1830:
-	.loc 4 739 0
-	ldrb	r3, [sp, #20]	@ zero_extendqisi2
-	strb	r3, [fp]
-.LVL1831:
-	.loc 4 742 0
-	mov	fp, #36
-.LVL1832:
-.L1638:
-	.loc 4 741 0 discriminator 1
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1640
-	.loc 4 748 0
-	ldr	r3, [sp, #16]
-	add	r10, r10, r3
-.LVL1833:
-	.loc 4 749 0
-	ldr	r3, [sp, #12]
-	.loc 4 748 0
-	uxth	r10, r10
-.LVL1834:
-	.loc 4 749 0
-	cmp	r3, r10
-	bhi	.L1641
-	movs	r7, #0
-.LVL1835:
-	.loc 4 755 0 discriminator 1
-	mov	r10, #36
-.LVL1836:
-.L1642:
-	.loc 4 754 0 discriminator 1
-	uxth	r3, r7
-	cmp	r5, r3
-	bhi	.L1644
-	.loc 4 759 0
+	ldr	r2, .L1617+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #28]
+.L1528:
 	ldr	r3, [sp, #8]
-	cmp	r3, #63
-	bls	.L1645
-	.loc 4 759 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1620
-.L1645:
-	.loc 4 760 0 is_stmt 1
-	mov	r2, r5
-	mov	r1, r6
-	ldr	r0, [r8]
-	bl	FlashEraseBlocks
-.LVL1837:
-.L1620:
-	.loc 4 763 0
-	mov	r0, r4
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	ldr	r2, [sp, #24]
+	cmp	r3, r2
+	bcc	.L1566
+	movs	r0, #0
+	b	.L1526
+.L1527:
+	bl	FlashReadSlc2KPages
+.L1526:
+	add	sp, sp, #40
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1838:
-.L1626:
-	.cfi_restore_state
-	.loc 4 673 0
-	uxth	r2, r10
-	ldr	r0, [r7]
-	movs	r3, #0
-	mul	r1, r8, r2
-	str	r3, [r0, r1]
-	.loc 4 674 0
-	ldr	r3, .L1665+24
-	ldr	r1, [sp, #8]
-	ldrb	r0, [r3, r2]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL1839:
-	.loc 4 676 0
-	ldr	r3, [sp, #4]
-	.loc 4 674 0
-	mov	r6, r0
-.LVL1840:
-	.loc 4 676 0
-	cbz	r3, .L1623
-	.loc 4 677 0
-	bl	IsBlkInVendorPart
-.LVL1841:
-	cbnz	r0, .L1624
-.L1623:
-	.loc 4 681 0
-	mov	r0, r6
-	bl	FtlBbmIsBadBlock
-.LVL1842:
-	cbnz	r0, .L1625
-	.loc 4 684 0
-	ldr	r3, .L1665+28
-	.loc 4 682 0
-	lsls	r6, r6, #10
-	ldr	r2, [r7]
-	.loc 4 684 0
-	ldrh	r1, [r3]
-	ldr	r3, .L1665+32
-	.loc 4 682 0
-	mla	r2, r8, r5, r2
-	.loc 4 684 0
-	muls	r1, r5, r1
-	.loc 4 685 0
-	adds	r5, r5, #1
-.LVL1843:
-	uxth	r5, r5
-.LVL1844:
-	.loc 4 683 0
-	str	r0, [r2, #8]
-	.loc 4 684 0
-	ldr	r0, [r3]
-	bic	r1, r1, #3
-	.loc 4 682 0
-	str	r6, [r2, #4]
-	.loc 4 684 0
-	add	r1, r1, r0
-	str	r1, [r2, #12]
-.L1624:
-.LVL1845:
-	add	r10, r10, #1
-.LVL1846:
-	b	.L1622
-.LVL1847:
-.L1625:
-	.loc 4 687 0
-	adds	r4, r4, #1
-.LVL1848:
-	uxth	r4, r4
-.LVL1849:
-	b	.L1624
-.LVL1850:
-.L1630:
-	.loc 4 701 0
-	mul	r3, r10, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	adds	r3, r3, #1
-	bne	.L1629
-	.loc 4 703 0
-	ldr	r0, [r1, #4]
-	.loc 4 702 0
-	adds	r4, r4, #1
-.LVL1851:
-	uxth	r4, r4
-.LVL1852:
-	.loc 4 703 0
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL1853:
-.L1629:
-	adds	r7, r7, #1
-.LVL1854:
-	b	.L1628
-.LVL1855:
-.L1631:
-	.loc 4 710 0
-	ldr	r3, .L1665+36
-	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-.LVL1856:
-	.loc 4 712 0
-	ldr	r3, [sp, #16]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1648
-	.loc 4 711 0
-	ldr	r3, [sp, #12]
-	.loc 4 709 0
-	movs	r6, #1
-	.loc 4 711 0
-	lsrs	r3, r3, #2
-	str	r3, [sp, #16]
-	b	.L1632
-.L1648:
-	.loc 4 709 0
-	movs	r6, #1
-	.loc 4 713 0
-	str	r6, [sp, #16]
-	b	.L1632
-.LVL1857:
-.L1636:
-	.loc 4 720 0
-	uxth	r2, fp
+.L1566:
+	ldr	r2, [sp, #8]
 	movs	r3, #36
-	ldr	r0, [r8]
-	movs	r7, #0
-	mul	r1, r3, r2
-	.loc 4 721 0
-	ldr	r3, .L1665+24
-	.loc 4 720 0
-	str	r7, [r0, r1]
-	.loc 4 721 0
-	ldr	r1, [sp, #8]
-	ldrb	r0, [r3, r2]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL1858:
-	.loc 4 722 0
-	ldr	r3, [sp, #4]
-	.loc 4 721 0
-	mov	r7, r0
-.LVL1859:
-	.loc 4 722 0
-	cbz	r3, .L1634
-	.loc 4 723 0
-	bl	IsBlkInVendorPart
-.LVL1860:
-	cbnz	r0, .L1635
-.L1634:
-	.loc 4 726 0
+	ldr	r1, [sp, #12]
+	mul	fp, r3, r2
+	add	r7, r10, fp
+	ldr	r3, [r7, #4]
 	mov	r0, r7
-	bl	FtlBbmIsBadBlock
-.LVL1861:
-	cbnz	r0, .L1635
-	.loc 4 727 0
-	ldr	r2, [r8]
-	movs	r3, #36
-	add	r7, r10, r7, lsl #10
-	mla	r2, r3, r5, r2
-	.loc 4 728 0
-	ldr	r3, .L1665+40
-	ldr	r1, [r3]
-	.loc 4 729 0
-	ldr	r3, .L1665+28
-	.loc 4 727 0
-	str	r7, [r2, #4]
-	.loc 4 728 0
-	str	r1, [r2, #8]
-	.loc 4 729 0
-	ldrh	r1, [r3]
-	ldr	r3, .L1665+44
-	muls	r1, r5, r1
-	ldr	r0, [r3]
-	.loc 4 730 0
-	adds	r5, r5, #1
-.LVL1862:
-	uxth	r5, r5
-.LVL1863:
-	.loc 4 729 0
-	bic	r1, r1, #3
-	add	r1, r1, r0
-	str	r1, [r2, #12]
-.L1635:
-.LVL1864:
-	add	fp, fp, #1
-.LVL1865:
-	b	.L1633
-.LVL1866:
-.L1640:
-	.loc 4 742 0
-	mul	r3, fp, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbz	r3, .L1639
-	.loc 4 744 0
-	ldr	r0, [r1, #4]
-	.loc 4 743 0
-	adds	r4, r4, #1
-.LVL1867:
-	uxth	r4, r4
-.LVL1868:
-	.loc 4 744 0
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL1869:
-.L1639:
-	adds	r7, r7, #1
-.LVL1870:
-	b	.L1638
-.LVL1871:
-.L1644:
-	.loc 4 755 0
-	ldr	r3, [sp, #4]
-	cbz	r3, .L1643
-	.loc 4 755 0 is_stmt 0 discriminator 1
-	mul	r3, r10, r7
-	ldr	r2, [r8]
-	adds	r1, r2, r3
-	ldr	r3, [r2, r3]
-	cbnz	r3, .L1643
-	.loc 4 756 0 is_stmt 1
-	ldr	r0, [r1, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
-.LVL1872:
-.L1643:
-	adds	r7, r7, #1
-.LVL1873:
-	b	.L1642
-.LVL1874:
-.L1647:
-	.loc 4 664 0
-	movs	r4, #0
-	b	.L1620
-.L1666:
-	.align	2
-.L1665:
-	.word	.LANCHOR76
-	.word	.LANCHOR27
-	.word	.LANCHOR77
-	.word	.LANCHOR8
-	.word	.LANCHOR73
-	.word	.LANCHOR37
-	.word	.LANCHOR46
-	.word	.LANCHOR58
-	.word	.LANCHOR186
-	.word	.LANCHOR53
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.cfi_endproc
-.LFE300:
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlBbmTblFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-.LFB320:
-	.loc 5 104 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1875:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 111 0
-	ldr	r3, .L1678
-	ldr	r4, [r3]
-	str	r3, [sp, #12]
-	cmp	r4, #0
-	bne	.L1669
-.LBB426:
-.LBB427:
-	.loc 5 114 0
-	ldr	r3, .L1678+4
-	.loc 5 115 0
-	mov	r1, r4
-	.loc 5 113 0
-	ldr	r7, .L1678+8
-	ldr	r5, .L1678+12
-	.loc 5 114 0
-	ldr	r3, [r3]
-	.loc 5 113 0
-	ldr	r0, [r7]
-	mov	r8, r7
-	ldr	r6, .L1678+16
-	.loc 5 114 0
-	str	r3, [r5, #12]
-	.loc 5 117 0
-	ldr	r7, .L1678+20
-	.loc 5 115 0
-	ldr	r3, .L1678+24
-	.loc 5 118 0
-	ldr	r10, .L1678+56
-	.loc 5 113 0
-	str	r0, [r5, #8]
-	.loc 5 115 0
-	ldrh	r2, [r3]
-	bl	ftl_memset
-.LVL1876:
-.L1670:
-	.loc 5 117 0
-	ldrh	r3, [r7]
-	cmp	r4, r3
-	blt	.L1671
-	.loc 5 120 0
-	ldr	r6, [r5, #12]
-.LVL1877:
-	.loc 5 121 0
-	movs	r2, #16
-	.loc 5 124 0
-	ldr	r4, .L1678+28
-.LVL1878:
-	.loc 5 121 0
-	movs	r1, #255
-	.loc 5 108 0
-	movs	r7, #0
-	.loc 5 121 0
-	mov	r0, r6
-	bl	ftl_memset
-.LVL1879:
-	.loc 5 123 0
-	movw	r3, #61649
-	mov	r10, r4
-	strh	r3, [r6]	@ movhi
-	.loc 5 124 0
-	ldr	r3, [r4, #8]
-	.loc 5 106 0
-	str	r7, [sp, #8]
-	.loc 5 124 0
-	str	r3, [r6, #4]
-	.loc 5 125 0
-	ldrh	r3, [r4]
-	strh	r3, [r6, #2]	@ movhi
-	.loc 5 126 0
-	ldrh	r3, [r4, #4]
-	strh	r3, [r6, #8]	@ movhi
-	.loc 5 127 0
-	ldrh	r3, [r4, #6]
-	strh	r3, [r6, #10]	@ movhi
-	.loc 5 128 0
-	ldr	r3, .L1678+32
-	ldr	r3, [r3]
-	strh	r3, [r6, #12]	@ movhi
-.L1672:
-.LVL1880:
-	.loc 5 130 0
-	ldr	r3, [r8]
-	.loc 5 132 0
-	mov	fp, #0
-	.loc 5 133 0
-	ldrh	r1, [r4]
-	ldrh	r2, [r4, #2]
-	.loc 5 130 0
-	str	r3, [r5, #8]
-	.loc 5 131 0
-	ldr	r3, .L1678+4
-	.loc 5 132 0
-	str	fp, [r5]
-	.loc 5 131 0
-	ldr	r3, [r3]
-	str	r3, [r5, #12]
-	.loc 5 133 0
-	orr	r3, r2, r1, lsl #10
-	.loc 5 134 0
-	ldrh	r0, [r6, #10]
-	.loc 5 133 0
-	str	r3, [r5, #4]
-	.loc 5 134 0
-	ldrh	r3, [r4, #4]
-	str	r0, [sp]
-	ldr	r0, .L1678+36
-	bl	printf
-.LVL1881:
-	.loc 5 135 0
-	movs	r3, #1
-	ldr	r0, .L1678+12
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL1882:
-	.loc 5 136 0
-	ldr	r3, .L1678+40
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #24]
+	subs	r3, r3, r2
+	add	r2, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1617+12
+	mov	r5, r0
+	ldr	r3, [sp, #32]
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	blt	.L1673
-	.loc 5 139 0
-	ldr	r3, [r4, #8]
-	.loc 5 141 0
-	ldrh	r2, [r4]
-	.loc 5 143 0
-	strh	fp, [r4, #2]	@ movhi
-	.loc 5 139 0
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	.loc 5 140 0
-	str	r3, [r6, #4]
-	.loc 5 141 0
-	strh	r2, [r6, #8]	@ movhi
-	.loc 5 142 0
-	ldrh	r3, [r4, #4]
-	.loc 5 144 0
-	strh	r2, [r4, #4]	@ movhi
-	.loc 5 147 0
-	ldr	r2, .L1678+44
-	.loc 5 142 0
-	strh	r3, [r4]	@ movhi
-	.loc 5 145 0
-	lsls	r3, r3, #10
-	.loc 5 147 0
-	ldr	r0, [r2]
-	.loc 5 148 0
-	movs	r2, #1
-	.loc 5 145 0
-	str	r3, [r5, #4]
-	.loc 5 148 0
-	mov	r1, r2
-	.loc 5 147 0
-	str	r3, [r0, #4]
-	.loc 5 148 0
-	bl	FlashEraseBlocks
-.LVL1883:
-	.loc 5 149 0
-	movs	r3, #1
-	ldr	r0, .L1678+12
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL1884:
-.L1673:
-	.loc 5 157 0
-	ldrh	r3, [r10, #2]
-	adds	r3, r3, #1
-	strh	r3, [r10, #2]	@ movhi
-	.loc 5 158 0
-	ldr	r3, [r5]
+	bhi	.L1530
+	mov	r3, #-1
+	str	r3, [r10, fp]
+.L1531:
+	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	bne	.L1674
-	.loc 5 161 0
-	adds	r7, r7, #1
-.LVL1885:
-	.loc 5 160 0
-	ldr	r1, [r5, #4]
-	.loc 5 161 0
-	uxth	r7, r7
-	.loc 5 160 0
-	ldr	r0, .L1678+48
-	bl	printf
-.LVL1886:
-	.loc 5 162 0
-	cmp	r7, #3
-	bls	.L1672
-	.loc 5 163 0
-	mov	r2, r7
-	ldr	r1, [r5, #4]
-	ldr	r0, .L1678+52
-	bl	printf
-.LVL1887:
-	.loc 5 165 0
-	ldr	r2, [sp, #12]
-	movs	r3, #1
-	str	r3, [r2]
-.LVL1888:
-.L1669:
-.LBE427:
-.LBE426:
-	.loc 5 179 0
-	movs	r0, #0
-	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1889:
-.L1671:
-	.cfi_restore_state
-.LBB429:
-.LBB428:
-	.loc 5 118 0
-	ldrh	r2, [r10]
-	ldr	r3, [r5, #8]
-	ldr	r1, [r6, #4]!
-	mul	r0, r4, r2
-	lsls	r2, r2, #2
-	.loc 5 117 0
-	adds	r4, r4, #1
-.LVL1890:
-	.loc 5 118 0
-	add	r0, r3, r0, lsl #2
-	bl	ftl_memcpy
-.LVL1891:
-	b	.L1670
-.LVL1892:
-.L1674:
-	.loc 5 172 0
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	bne	.L1669
-	movs	r3, #1
 	str	r3, [sp, #8]
-.LVL1893:
-	b	.L1672
-.L1679:
-	.align	2
-.L1678:
-	.word	.LANCHOR76
-	.word	.LANCHOR185
-	.word	.LANCHOR180
-	.word	.LANCHOR199
-	.word	.LANCHOR74+24
-	.word	.LANCHOR44
-	.word	.LANCHOR57
-	.word	.LANCHOR74
-	.word	.LANCHOR36
-	.word	.LC31
-	.word	.LANCHOR53
-	.word	.LANCHOR77
-	.word	.LC32
-	.word	.LC33
-	.word	.LANCHOR120
-.LBE428:
-.LBE429:
-	.cfi_endproc
-.LFE320:
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.allocate_data_superblock,"ax",%progbits
-	.align	1
-	.global	allocate_data_superblock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-.LFB386:
-	.loc 1 2852 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1894:
-	.loc 1 2858 0
-	ldr	r3, .L1743
-	.loc 1 2852 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 2852 0
-	mov	r4, r0
-	.loc 1 2858 0
-	ldr	r3, [r3]
+	b	.L1528
+.L1530:
+	ldr	r2, .L1617+16
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1617+20
+	mov	r0, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1682
-	ldr	r7, .L1743+4
-.LVL1895:
-.L1681:
-.LBB434:
-.LBB435:
-	.loc 1 2861 0
-	ldr	r3, .L1743+4
-	ldr	r6, .L1743+8
-	ldrh	r3, [r3]
-	ldrh	r2, [r6]
-	add	r3, r3, r2
-	ldr	r2, .L1743+12
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1683
-	ldr	r1, .L1743+16
-	movw	r2, #2861
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1896:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1897:
-.L1683:
-	.loc 1 2863 0
-	ldr	r3, .L1743+32
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	cmp	r4, r3
-	bne	.L1684
-	.loc 1 2864 0
-	ldr	r3, .L1743+36
-	ldrh	r5, [r7]
+	it	eq
+	moveq	r5, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1617+24
 	ldr	r3, [r3]
-	lsrs	r0, r5, #1
-	mul	ip, r3, r5
-	adds	r1, r0, #1
-	add	r1, r1, ip, lsr #2
-	.loc 1 2865 0
-	ldr	ip, .L1743+48
-	.loc 1 2864 0
-	uxth	r1, r1
-.LVL1898:
-	.loc 1 2865 0
-	ldr	ip, [ip]
-	cmp	ip, #0
-	beq	.L1685
-	ldr	ip, .L1743+52
-	ldr	ip, [ip]
-	cmp	ip, #29
-	bhi	.L1685
-	.loc 1 2866 0
-	cmp	ip, #2
-	bls	.L1718
-	lsls	r5, r5, #31
-	bpl	.L1714
-	cmp	r3, #0
-	beq	.L1718
-.L1714:
-	.loc 1 2869 0
-	mov	r1, r0
-.LVL1899:
-	b	.L1685
-.LVL1900:
-.L1684:
-	.loc 1 2873 0
-	cmp	r2, #1
-	bne	.L1718
-	ldr	r3, .L1743+40
-	ldrh	r3, [r3]
+	ldrb	r1, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r1, #1
+	cmp	r3, #6
+	bhi	.L1533
+	ldr	r3, .L1617+28
+	cmp	r1, #7
+	add	r2, r3, r4
+	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+	it	eq
+	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
+	ldr	r2, .L1617+32
+	ldrb	r2, [r2, r4]	@ zero_extendqisi2
+	cmp	r2, r3
+	beq	.L1533
+	ldr	r2, .L1617+36
+	mov	r0, r4
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1533:
+	mov	r0, r4
+	bl	NandcFlashCs
+	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	beq	.L1718
-	ldr	r3, .L1743+44
-	ldrb	r3, [r3]	@ zero_extendqisi2
+	beq	.L1535
+	ldr	r3, [sp, #16]
 	cmp	r3, #0
-	bne	.L1718
-	.loc 1 2875 0
-	ldr	r0, .L1743+48
-	.loc 1 2874 0
-	ldrh	r3, [r7]
-	.loc 1 2875 0
-	ldr	r0, [r0]
-	.loc 1 2874 0
-	lsrs	r1, r3, #3
-.LVL1901:
-	.loc 1 2875 0
-	cbz	r0, .L1685
-	ldr	r0, .L1743+52
-	ldr	r0, [r0]
-	cmp	r0, #1
-	bhi	.L1685
-	.loc 1 2876 0
-	rsb	r3, r3, r3, lsl #3
-	ubfx	r1, r3, #3, #16
-.LVL1902:
-.L1685:
-	.loc 1 2879 0
-	cbz	r1, .L1686
-	.loc 1 2880 0
-	subs	r1, r1, #1
-.LVL1903:
-	uxth	r1, r1
-.LVL1904:
-.L1686:
-	.loc 1 2881 0
-	ldr	r0, .L1743+56
-	bl	List_pop_index_node
-.LVL1905:
-	ldrh	r3, [r7]
-	mov	r5, r0
-	uxth	r8, r0
-.LVL1906:
-	cbnz	r3, .L1687
-	ldr	r1, .L1743+16
-	movw	r2, #2881
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1907:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1908:
-.L1687:
-	ldrh	r3, [r7]
-	.loc 1 2886 0
+	bge	.L1536
+.L1535:
+	ldr	r3, .L1617+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1536
 	mov	r0, r4
-	.loc 1 2881 0
-	subs	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	.loc 1 2885 0
-	strh	r8, [r4]	@ movhi
-	.loc 1 2886 0
-	bl	make_superblock
-.LVL1909:
-	.loc 1 2887 0
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1688
-	.loc 1 2891 0
-	ldr	r3, .L1743+60
-	uxth	r5, r5
-	movw	r2, #65535
-	ldr	r3, [r3]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 1 2893 0
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
-	add	r3, r3, r2
-	ldr	r2, .L1743+12
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1681
-	movw	r2, #2893
-	ldr	r1, .L1743+16
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1910:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1911:
-	b	.L1681
-.LVL1912:
-.L1718:
-	.loc 1 2873 0
+	bl	flash_enter_slc_mode
+.L1543:
+	ldr	r1, [sp, #36]
+	adds	r6, r1, #1
+	bne	.L1538
+	cmp	r4, #255
+	beq	.L1568
+.L1538:
+	cbz	r5, .L1540
+	ldr	r3, .L1617+44
+	mov	r0, r4
+	ldr	r2, [r3]
+	add	r2, r2, r1
+	bl	FlashReadDpCmd
+.L1541:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	cbz	r5, .L1539
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FlashReadDpDataOutCmd
+.L1539:
+	ldr	r3, [r7, #12]
 	movs	r1, #0
-	b	.L1686
-.LVL1913:
-.L1688:
-	.loc 1 2896 0
-	ldrh	r2, [r6]
-	ldrh	r3, [r7]
-	add	r3, r3, r2
-	ldr	r2, .L1743+12
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1690
-	ldr	r1, .L1743+16
-	mov	r2, #2896
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1914:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1915:
-.L1690:
-	.loc 1 2899 0
-	ldr	r2, .L1743+64
-	.loc 1 2900 0
-	movs	r6, #0
-	ldr	r10, .L1743+104
-	add	ip, r4, #16
-	mov	lr, r6
-	ldrh	r1, [r2]
-	movs	r2, #36
-	ldr	r0, [r10]
-	mov	r3, r0
-	mla	r1, r2, r1, r0
-	str	r1, [sp]
-.L1691:
-.LVL1916:
-	.loc 1 2899 0
-	ldr	r1, [sp]
-	cmp	r1, r3
-	bne	.L1693
-	.loc 1 2908 0
-	cbnz	r6, .L1694
-	ldr	r1, .L1743+16
-	movw	r2, #2908
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1917:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1918:
-.L1694:
-	.loc 1 2910 0
-	ldr	r3, .L1743+48
-	uxth	r5, r5
-	ldr	fp, .L1743+108
+	ldr	r2, [sp, #20]
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r3, [r7, #8]
+	bl	NandcXferData
+	ldr	r3, .L1617+8
+	mov	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1542
+	adds	r0, r0, #1
+	bne	.L1542
+	ldr	r3, .L1617+8
+	movs	r5, #0
+	strb	r5, [r3]
+	b	.L1543
+.L1536:
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+	b	.L1543
+.L1540:
+	mov	r0, r4
+	bl	FlashReadCmd
+	b	.L1541
+.L1568:
+	movs	r5, #0
+	b	.L1539
+.L1542:
+	cbz	r5, .L1544
+	ldr	r3, .L1617+44
+	mov	r0, r4
+	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
-	cbz	r3, .L1695
-	ldr	r3, .L1743+68
-	cmp	r4, r3
-	bne	.L1695
-	.loc 1 2911 0
-	ldr	r3, [fp]
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, #30
-	.loc 1 2912 0
-	itt	hi
-	movhi	r3, #0
-	strbhi	r3, [r4, #8]
-.L1695:
-	.loc 1 2915 0
-	ldr	r3, .L1743+72
-	ldrh	r3, [r3]
-	cmp	r3, r8
-	bne	.L1696
-	ldr	r1, .L1743+16
-	movw	r2, #2915
-	ldr	r0, .L1743+20
-	bl	printf
-.LVL1919:
-	ldr	r1, .L1743+24
-	ldr	r0, .L1743+28
-	bl	printf
-.LVL1920:
-.L1696:
-	.loc 1 2916 0
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	ldr	r2, .L1743+76
-	ldr	r3, .L1743+80
-	cmp	r1, #0
-	bne	.L1697
-	.loc 1 2917 0
-	ldr	r0, [fp]
-	ldrh	lr, [r0, r5, lsl #1]
-	cmp	lr, #0
-	beq	.L1698
-	.loc 1 2918 0
-	ldr	r1, .L1743+84
-	ldrh	ip, [r1]
-	add	r1, lr, ip
-.L1741:
-	.loc 1 2920 0
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-	.loc 1 2922 0
-	mov	r0, r8
-	.loc 1 2921 0
-	ldr	r1, [r2]
-	str	r3, [sp, #4]
-	str	r2, [sp]
-	adds	r1, r1, #1
-	str	r1, [r2]
-	.loc 1 2922 0
+	add	r1, r1, r3
+	bl	FlashReadDpDataOutCmd
+	add	r3, fp, #36
 	movs	r1, #0
-	bl	ftl_set_blk_mode
-.LVL1921:
-	ldm	sp, {r2, r3}
-.L1700:
-	.loc 1 2929 0
-	ldr	r1, [fp]
-	.loc 1 2932 0
+	add	r3, r3, r10
+	mov	r0, r4
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	ldr	r2, [sp, #20]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+	cmp	r0, #-1
+	mov	r8, r0
+	it	eq
+	moveq	r5, #0
+.L1544:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	ldr	r3, .L1617+8
+	adds	r1, r6, #1
+	ldrb	r2, [sp, #28]	@ zero_extendqisi2
+	strb	r2, [r3]
+	bne	.L1545
+	ldr	r3, .L1617+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1546
+.L1550:
+	ldr	r3, .L1617+52
+	ldr	r5, [r3]
+	cmp	r5, #0
+	bne	.L1547
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	b	.L1616
+.L1546:
+	ldr	r3, .L1617+56
+	mov	r0, r4
+	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
-	ldr	r2, [r2]
-	.loc 1 2929 0
-	ldrh	ip, [r1, r5, lsl #1]
-	ldr	r1, .L1743+88
-	ldr	r0, [r1]
-	cmp	ip, r0
-	.loc 1 2930 0
-	it	hi
-	strhi	ip, [r1]
-	.loc 1 2932 0
-	ldr	r1, .L1743+84
-	ldrh	r0, [r1]
-	ldr	r1, .L1743+12
-	mla	r0, r2, r0, r3
-	ldrh	r1, [r1]
-	bl	__aeabi_uidiv
-.LVL1922:
-	ldr	r3, .L1743+92
-	str	r0, [r3]
-	.loc 1 2933 0
-	ldr	r3, .L1743+96
-	.loc 1 2936 0
-	ldr	r0, .L1743+100
-	.loc 1 2933 0
-	ldr	r2, [r3]
-	ldr	r3, [r2, #16]
-	adds	r3, r3, #1
-	str	r3, [r2, #16]
-.LVL1923:
-	movs	r3, #36
-	.loc 1 2936 0
-	ldr	r2, [r10]
-	adds	r1, r2, #4
-	mla	r3, r3, r6, r2
-	adds	r3, r3, #40
-.LVL1924:
-.L1702:
-	adds	r1, r1, #36
-	.loc 1 2935 0
-	cmp	r3, r1
-	bne	.L1703
-	.loc 1 2937 0
-	ldr	r3, .L1743+44
+	ldr	r5, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp]
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashDdrTunningRead
+	adds	r2, r0, #1
+	mov	r6, r0
+	beq	.L1549
+	ldr	r3, .L1617+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1704
-	.loc 1 2938 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	.loc 1 2939 0
-	mov	r2, r6
-	.loc 1 2941 0
-	ldr	r0, [r10]
-	.loc 1 2938 0
-	cmp	r3, #1
-	.loc 1 2939 0
-	ite	eq
-	moveq	r1, #0
-	.loc 1 2941 0
-	movne	r1, #1
-	bl	FlashEraseBlocks
-.LVL1925:
-.L1704:
-	.loc 1 2943 0
-	mov	r2, r6
-	ldr	r0, [r10]
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r10, #0
-	bl	FlashEraseBlocks
-.LVL1926:
-	.loc 1 2944 0
-	mov	fp, r10
-	.loc 1 2946 0
-	movs	r2, #36
-.LVL1927:
-.L1706:
-	.loc 1 2945 0
-	uxth	r3, r10
-	cmp	r6, r3
-	bhi	.L1708
-	.loc 1 2956 0
-	cmp	fp, #0
-	beq	.L1709
-	.loc 1 2957 0
-	mov	r0, r8
-	bl	update_multiplier_value
-.LVL1928:
-	.loc 1 2958 0
-	bl	FtlBbmTblFlush
-.LVL1929:
-.L1709:
-	.loc 1 2961 0
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1743+60
-	cmp	r2, #0
-	bne	.L1710
-	.loc 1 2963 0
-	ldr	r3, [r1]
-	movw	r2, #65535
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1681
-.L1744:
+	cmp	r0, r3, lsr #1
+	bls	.L1569
+.L1549:
+	ubfx	r0, r5, #8, #8
+	bl	NandcSetDdrPara
+	adds	r3, r6, #1
+	beq	.L1550
+.L1569:
+	movs	r5, #0
+.L1545:
+	ldr	r3, .L1617+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1558
+	ldr	r3, .L1617+52
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1558
+	mov	r6, #256
+	b	.L1553
+.L1618:
 	.align	2
-.L1743:
-	.word	.LANCHOR76
-	.word	.LANCHOR88
-	.word	.LANCHOR85
-	.word	.LANCHOR39
-	.word	.LANCHOR200
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR93
-	.word	.LANCHOR169
-	.word	.LANCHOR43
-	.word	.LANCHOR8
-	.word	.LANCHOR28
-	.word	.LANCHOR167
-	.word	.LANCHOR87
-	.word	.LANCHOR83
-	.word	.LANCHOR37
-	.word	.LANCHOR91
+.L1617:
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR5
+	.word	.LANCHOR25
+	.word	.LANCHOR26
 	.word	.LANCHOR201
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR47
-	.word	.LANCHOR166
-	.word	.LANCHOR202
-	.word	.LANCHOR188
-	.word	-1024
-	.word	.LANCHOR77
-	.word	.LANCHOR78
-.LVL1930:
-.L1693:
-	.loc 1 2900 0
-	str	lr, [r3, #8]
-	.loc 1 2903 0
-	movw	fp, #65535
-	.loc 1 2901 0
-	str	lr, [r3, #12]
-	.loc 1 2903 0
-	ldrh	r1, [ip], #2
-	cmp	r1, fp
-	beq	.L1692
-	.loc 1 2904 0
-	mla	fp, r2, r6, r0
-	.loc 1 2905 0
-	adds	r6, r6, #1
-.LVL1931:
-	.loc 1 2904 0
-	lsls	r1, r1, #10
-	.loc 1 2905 0
-	uxth	r6, r6
-.LVL1932:
-	.loc 1 2904 0
-	str	r1, [fp, #4]
-.L1692:
-	adds	r3, r3, #36
-	b	.L1691
-.L1698:
-	.loc 1 2920 0
-	movs	r1, #2
-	b	.L1741
-.L1697:
-	.loc 1 2924 0
-	ldr	r0, [fp]
-	str	r2, [sp, #4]
-	.loc 1 2925 0
-	str	r3, [sp]
-.LVL1933:
-	.loc 1 2924 0
-	ldrh	r1, [r0, r5, lsl #1]
-	adds	r1, r1, #1
-	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB436:
-.LBB437:
-	mov	r0, r8
-.LBE437:
-.LBE436:
-	.loc 1 2925 0
-	ldr	r1, [r3]
-	adds	r1, r1, #1
-	str	r1, [r3]
-.LBB439:
-.LBB438:
-	bl	ftl_set_blk_mode.part.10
-.LVL1934:
-	ldr	r2, [sp, #4]
-	ldr	r3, [sp]
-	b	.L1700
-.LVL1935:
-.L1703:
-.LBE438:
-.LBE439:
-	.loc 1 2936 0
-	ldr	r2, [r1, #-36]
-	ands	r2, r2, r0
-	str	r2, [r1, #-36]
-	b	.L1702
-.LVL1936:
-.L1708:
-	.loc 1 2946 0
-	ldr	r1, .L1745
-	mul	r3, r2, r10
-	ldr	r1, [r1]
-	adds	r0, r1, r3
-	ldr	r3, [r1, r3]
-	adds	r1, r3, #1
-	bne	.L1707
-	.loc 1 2948 0
-	ldr	r0, [r0, #4]
-	.loc 1 2947 0
-	add	fp, fp, #1
-.LVL1937:
-	str	r2, [sp, #4]
-	str	r3, [sp]
-	.loc 1 2949 0
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL1938:
-	.loc 1 2950 0
-	ldr	r3, [sp]
-	add	r1, r4, r10, lsl #1
-	.loc 1 2951 0
-	ldr	r2, [sp, #4]
-	.loc 1 2950 0
-	strh	r3, [r1, #16]	@ movhi
-	.loc 1 2951 0
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	.word	.LANCHOR18
+	.word	.LANCHOR20
+	.word	.LANCHOR21
+	.word	.LANCHOR20+4
+	.word	.LANCHOR8
+	.word	.LANCHOR3
+	.word	.LANCHOR30
+	.word	.LANCHOR145
+	.word	.LANCHOR19
+	.word	.LANCHOR33
+.L1547:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	blx	r5
+	adds	r5, r0, #1
+	mov	r6, r0
+	bne	.L1551
+	ldr	r3, .L1619
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	strb	r3, [r4, #7]
-.L1707:
-.LVL1939:
-	add	r10, r10, #1
-.LVL1940:
-	b	.L1706
-.LVL1941:
-.L1710:
-	.loc 1 2968 0
-	ldr	r3, .L1745+4
-	.loc 1 2972 0
-	ldr	r0, .L1745+8
-	.loc 1 2968 0
-	ldrh	r3, [r3]
-	.loc 1 2969 0
-	strh	r8, [r4]	@ movhi
-	.loc 1 2968 0
-	smulbb	r3, r3, r2
-	.loc 1 2970 0
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	.loc 1 2971 0
-	strb	r2, [r4, #6]
-	.loc 1 2972 0
-	ldr	r2, [r0]
-	.loc 1 2968 0
-	uxth	r3, r3
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2972 0
-	str	r2, [r4, #12]
-	adds	r2, r2, #1
-	str	r2, [r0]
-	.loc 1 2973 0
-	ldr	r2, [r1]
-	ldrh	r0, [r4]
-	strh	r3, [r2, r0, lsl #1]	@ movhi
-	.loc 1 2974 0
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1711
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1682
-.L1711:
-	ldr	r1, .L1745+12
-	movw	r2, #2974
-	ldr	r0, .L1745+16
+	cmp	r3, #6
+	bhi	.L1552
+	ldr	r2, .L1619+4
+	movs	r3, #0
+	mov	r0, r4
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1552:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	ldr	r2, .L1619+8
+	mov	r6, r0
+	mov	r3, r0
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1619+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-.LVL1942:
-	ldr	r1, .L1745+20
-	ldr	r0, .L1745+24
+	adds	r0, r6, #1
+	bne	.L1551
+	ldr	r3, .L1619+16
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1553
+	ldr	r3, [sp, #12]
+	mov	r0, r4
+	cmp	r3, #1
+	beq	.L1554
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1555
+.L1554:
+	bl	flash_enter_slc_mode
+.L1556:
+	ldr	r3, .L1619+20
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	ldr	r5, [r3]
+	ldr	r3, [r7, #12]
+	blx	r5
+.L1616:
+	adds	r1, r0, #1
+	mov	r6, r0
+	mov	r5, #0
+	bne	.L1558
+.L1553:
+	str	r6, [r10, fp]
+.L1559:
+	ldr	r3, [r10, fp]
+	adds	r2, r3, #1
+	bne	.L1561
+	ldr	r2, .L1619+8
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1619+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-.LVL1943:
-.L1682:
-.LBE435:
-.LBE434:
-	.loc 1 2976 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1944:
-.L1746:
-	.align	2
-.L1745:
-	.word	.LANCHOR77
-	.word	.LANCHOR52
-	.word	.LANCHOR156
-	.word	.LANCHOR200
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.cfi_endproc
-.LFE386:
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcFreeBadSuperBlk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-.LFB406:
-	.loc 6 438 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1945:
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 438 0
-	mov	r10, r0
-	.loc 6 443 0
-	ldr	r4, .L1759
-	ldrh	r3, [r4]
-	cbz	r3, .L1748
-.LBB442:
-.LBB443:
-	.loc 6 447 0
-	ldr	r8, .L1759+12
-.LBE443:
-.LBE442:
-	movs	r7, #0
-.LVL1946:
-.L1749:
-.LBB446:
-.LBB444:
-	.loc 6 444 0
-	ldr	r3, .L1759+4
-	ldrh	r2, [r3]
-	uxth	r3, r7
-	cmp	r2, r3
-	bhi	.L1755
-	.loc 6 460 0
-	bl	FtlGcReFreshBadBlk
-.LVL1947:
-.L1748:
-.LBE444:
-.LBE446:
-	.loc 6 477 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1948:
-.L1755:
-	.cfi_restore_state
-.LBB447:
-.LBB445:
-	.loc 6 445 0
-	ldr	r2, .L1759+8
-	uxth	r3, r7
-	mov	r1, r10
-	mov	fp, #0
-	ldrb	r0, [r2, r3]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL1949:
-	mov	r1, r0
-.LVL1950:
-.L1750:
-	.loc 6 446 0
-	ldrh	r3, [r4]
-	uxth	r5, fp
-.LVL1951:
-	cmp	r3, r5
-	bhi	.L1754
-.LVL1952:
-	adds	r7, r7, #1
-.LVL1953:
-	b	.L1749
-.LVL1954:
-.L1754:
-	.loc 6 447 0
-	uxth	r6, fp
-	ldrh	r3, [r8, r6, lsl #1]
-	cmp	r3, r1
-	bne	.L1751
-	.loc 6 451 0
-	mov	r0, r1
-	str	r1, [sp, #4]
-	bl	FtlBbmMapBadBlock
-.LVL1955:
-	.loc 6 452 0
-	bl	FtlBbmTblFlush
-.LVL1956:
-	.loc 6 453 0
-	ldrh	r2, [r4]
-	add	r3, r8, r6, lsl #1
-	ldr	r1, [sp, #4]
-.LVL1957:
-.L1752:
-	cmp	r5, r2
-	bcc	.L1753
-	.loc 6 455 0
-	subs	r2, r2, #1
-	strh	r2, [r4]	@ movhi
-.LVL1958:
-.L1751:
-	add	fp, fp, #1
-.LVL1959:
-	b	.L1750
-.LVL1960:
-.L1753:
-	.loc 6 454 0
-	ldrh	r0, [r3, #2]!
-	.loc 6 453 0
-	adds	r5, r5, #1
-.LVL1961:
-	uxth	r5, r5
-.LVL1962:
-	.loc 6 454 0
-	strh	r0, [r3, #-2]	@ movhi
-	b	.L1752
-.L1760:
-	.align	2
-.L1759:
-	.word	.LANCHOR114
-	.word	.LANCHOR37
-	.word	.LANCHOR46
-	.word	.LANCHOR115
-.LBE445:
-.LBE447:
-	.cfi_endproc
-.LFE406:
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
-	.align	1
-	.global	update_vpc_list
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	update_vpc_list, %function
-update_vpc_list:
-.LFB389:
-	.loc 1 3076 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1963:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 3076 0
-	mov	r4, r0
-	.loc 1 3077 0
-	ldr	r3, .L1771
+	ldr	r1, [r7, #12]
+	cbz	r1, .L1561
+	movs	r3, #4
+	ldr	r0, .L1619+28
+	mov	r2, r3
+	bl	rknand_print_hex
+.L1561:
+	cbz	r5, .L1563
+	ldr	r3, .L1619+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r8, r3, asr #2
+	bls	.L1564
+	ldr	r3, .L1619+20
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1762
-	.loc 1 3078 0
-	ldr	r2, .L1771+4
-	ldrh	r1, [r2]
-	cmp	r1, r0
-	bne	.L1763
-	.loc 1 3080 0
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.L1764:
-.LVL1964:
-.LBB450:
-.LBB451:
-	.loc 1 3085 0
-	ldr	r5, .L1771+8
-	mov	r1, r4
-	ldr	r0, .L1771+12
-.LVL1965:
-	bl	List_remove_node
-.LVL1966:
-	ldrh	r3, [r5]
-	cbnz	r3, .L1766
-	ldr	r1, .L1771+16
-	movw	r2, #3085
-	ldr	r0, .L1771+20
-	bl	printf
-.LVL1967:
-	ldr	r1, .L1771+24
-	ldr	r0, .L1771+28
-	bl	printf
-.LVL1968:
-.L1766:
-	ldrh	r3, [r5]
-	.loc 1 3086 0
-	mov	r0, r4
-	.loc 1 3085 0
-	subs	r3, r3, #1
-	strh	r3, [r5]	@ movhi
-	.loc 1 3086 0
-	bl	free_data_superblock
-.LVL1969:
-	.loc 1 3087 0
+	it	eq
+	moveq	r8, #256
+.L1564:
+	cmp	r8, #-1
+	add	r3, fp, #36
+	str	r8, [r10, r3]
+	beq	.L1563
+	cmp	r8, #256
+	itt	ne
+	movne	r2, #0
+	strne	r2, [r10, r3]
+.L1563:
+	ldr	r3, [sp, #8]
+	add	r3, r3, r5
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1565
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1531
+.L1565:
+	ldr	r3, .L1619+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1531
 	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-.LVL1970:
-	.loc 1 3088 0
-	ldr	r3, .L1771+32
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	add	r3, r3, r2
-	ldr	r2, .L1771+36
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	ble	.L1770
-	ldr	r1, .L1771+16
-	mov	r2, #3088
-	ldr	r0, .L1771+20
-	bl	printf
-.LVL1971:
-	ldr	r1, .L1771+24
-	ldr	r0, .L1771+28
-	bl	printf
-.LVL1972:
-.L1770:
-	movs	r3, #1
-	b	.L1761
-.LVL1973:
-.L1763:
-.LBE451:
-.LBE450:
-	.loc 1 3081 0
-	ldr	r2, .L1771+40
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1761
-	.loc 1 3081 0 is_stmt 0 discriminator 1
-	ldr	r2, .L1771+44
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	beq	.L1761
-	.loc 1 3081 0 discriminator 2
-	ldr	r2, .L1771+48
-	ldrh	r2, [r2]
-	cmp	r2, r0
-	bne	.L1764
-.LVL1974:
-.L1761:
-	.loc 1 3094 0 is_stmt 1
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.LVL1975:
-.L1762:
-	.loc 1 3091 0
-	bl	List_update_data_list
-.LVL1976:
-	.loc 1 3093 0
-	movs	r3, #0
-	b	.L1761
-.L1772:
-	.align	2
-.L1771:
-	.word	.LANCHOR83
-	.word	.LANCHOR201
-	.word	.LANCHOR85
-	.word	.LANCHOR82
-	.word	.LANCHOR203
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR88
-	.word	.LANCHOR39
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.cfi_endproc
-.LFE389:
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
-	.align	1
-	.global	decrement_vpc_count
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-.LFB390:
-	.loc 1 3097 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1977:
-	.loc 1 3100 0
-	movw	r3, #65535
-	.loc 1 3097 0
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 3100 0
-	cmp	r0, r3
-	.loc 1 3097 0
-	mov	r4, r0
-	.loc 1 3100 0
-	beq	.L1774
-	.loc 1 3101 0
-	ldr	r5, .L1782
-	ldr	r3, [r5]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1775
-	.loc 1 3102 0
-	mov	r1, r0
-	ldr	r0, .L1782+4
-.LVL1978:
-	bl	printf
-.LVL1979:
-	.loc 1 3103 0
-	ldr	r3, [r5]
-	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1776
-.L1780:
-	.loc 1 3118 0
+	bl	flash_exit_slc_mode
+	b	.L1531
+.L1555:
+	bl	flash_exit_slc_mode
+	b	.L1556
+.L1551:
 	movs	r5, #0
-.LVL1980:
-.L1773:
-	.loc 1 3128 0
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.LVL1981:
-.L1776:
-	.loc 1 3103 0 discriminator 1
-	movw	r2, #3103
-.LVL1982:
-.L1781:
-	.loc 1 3125 0 discriminator 2
-	ldr	r1, .L1782+8
-	ldr	r0, .L1782+12
-	bl	printf
-.LVL1983:
-	ldr	r1, .L1782+16
-	ldr	r0, .L1782+20
-	bl	printf
-.LVL1984:
-	b	.L1773
-.LVL1985:
-.L1775:
-	.loc 1 3112 0
-	subs	r2, r2, #1
-	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1774:
-	.loc 1 3116 0
-	ldr	r6, .L1782+24
-	movw	r3, #65535
-	ldrh	r0, [r6]
-.LVL1986:
-	cmp	r0, r3
-	bne	.L1778
-	.loc 1 3117 0
-	strh	r4, [r6]	@ movhi
-	b	.L1780
-.L1778:
-	.loc 1 3119 0
-	cmp	r4, r0
-	beq	.L1780
-	.loc 1 3122 0
-	bl	update_vpc_list
-.LVL1987:
-	.loc 1 3125 0
-	ldr	r3, .L1782+28
-	.loc 1 3122 0
-	adds	r5, r0, #0
-	.loc 1 3125 0
-	ldr	r2, .L1782+32
-	.loc 1 3122 0
-	it	ne
-	movne	r5, #1
-.LVL1988:
-	.loc 1 3124 0
-	strh	r4, [r6]	@ movhi
-	.loc 1 3125 0
-	ldr	r3, [r3]
-	ldr	r2, [r2]
-	subs	r3, r3, r2
-	asrs	r2, r3, #1
-	ldr	r3, .L1782+36
-	muls	r3, r2, r3
-	ldr	r2, .L1782
-	ldr	r2, [r2]
-	uxth	r1, r3
-	ldrh	r2, [r2, r1, lsl #1]
-	cmp	r2, #0
-	bne	.L1773
-	.loc 1 3125 0 is_stmt 0 discriminator 1
-	cmp	r4, r1
-	beq	.L1773
-	.loc 1 3125 0 discriminator 2
-	movw	r2, #3125
-	b	.L1781
-.L1783:
+.L1558:
+	cmp	r6, #256
+	beq	.L1553
+	movs	r3, #0
+	str	r3, [r10, fp]
+	b	.L1559
+.L1620:
 	.align	2
-.L1782:
-	.word	.LANCHOR83
-	.word	.LC34
-	.word	.LANCHOR204
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR130
-	.word	.LANCHOR82
-	.word	.LANCHOR81
-	.word	-1431655765
-	.cfi_endproc
-.LFE390:
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
+.L1619:
+	.word	.LANCHOR18
+	.word	.LANCHOR20+4
+	.word	.LANCHOR33
+	.word	.LC28
+	.word	.LANCHOR8
+	.word	.LANCHOR145
+	.word	.LC25
+	.word	.LC27
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
-	.global	FtlSlcSuperblockCheck
+	.global	FlashProgSlc2KPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSlcSuperblockCheck, %function
-FtlSlcSuperblockCheck:
-.LFB373:
-	.loc 1 2278 0 is_stmt 1
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1989:
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 2278 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #64
+	str	r3, [sp, #12]
+	mov	r8, r1
 	mov	r4, r0
-	.loc 1 2281 0
-	ldrh	r3, [r0, #4]
+	mov	r6, r0
+	ldr	r3, .L1650
+	movs	r7, #0
+	ldr	fp, .L1650+28
+	str	r2, [sp, #8]
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1622:
+	cmp	r7, r8
+	bne	.L1628
+	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1784
-	.loc 1 2283 0
-	ldrh	r2, [r0]
-	movw	r3, #65535
+	bne	.L1639
+.L1649:
+	movs	r0, #0
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1628:
+	sub	r3, r8, r7
+	add	r2, sp, #20
+	uxtb	r3, r3
+	ldr	r1, [sp, #8]
+	mov	r0, r6
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1650+4
+	ldr	r3, [sp, #24]
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	beq	.L1784
-.LVL1990:
-.LBB454:
-.LBB455:
-	.loc 1 2285 0
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r5, .L1795
-	.loc 1 2297 0
-	ldr	r6, .L1795+4
-	.loc 1 2285 0
-	adds	r3, r3, #8
-	ldrh	r3, [r0, r3, lsl #1]
-.LVL1991:
-.L1788:
-	.loc 1 2286 0
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L1790
-	.loc 1 2296 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-.LVL1992:
-	cmp	r3, #1
-	bne	.L1791
-	ldrb	r1, [r5]	@ zero_extendqisi2
-	cbnz	r1, .L1791
-	.loc 1 2297 0
-	ldrh	r1, [r4, #2]
-	.loc 1 2296 0
-	ldrh	r1, [r6, r1, lsl #1]
-	cmp	r1, r2
-	bne	.L1791
-	.loc 1 2298 0
-	ldrh	r3, [r4, #4]
-	.loc 1 2299 0
-	ldrh	r0, [r4]
-	.loc 1 2298 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2299 0
-	bl	decrement_vpc_count
-.LVL1993:
-	.loc 1 2300 0
-	ldrh	r2, [r4, #4]
-	cbnz	r2, .L1790
-	.loc 1 2301 0
-	ldrh	r3, [r4, #2]
-	.loc 1 2302 0
-	strb	r2, [r4, #6]
-	.loc 1 2301 0
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	pop	{r4, r5, r6, pc}
-.LVL1994:
-.L1790:
-.LDL2:
-	.loc 1 2288 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 2289 0
-	ldr	r2, .L1795+8
-	.loc 1 2288 0
+	bhi	.L1623
+	mov	r3, #-1
+	str	r3, [r6]
+.L1624:
+	adds	r7, r7, #1
+	adds	r6, r6, #36
+	b	.L1622
+.L1623:
+	ldr	r2, .L1650+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #12]
+	mov	r2, r10
+	movs	r1, #1
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	sbfx	r0, r0, #0, #1
+	ldr	r1, [sp, #20]
+	str	r0, [r6]
+	mov	r0, r5
+	ldr	r3, [fp]
+	add	r1, r1, r3
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #8]
+	cbz	r3, .L1625
+	add	r3, r3, #2048
+.L1625:
+	ldr	r2, [r6, #12]
+	cbz	r2, .L1626
+	adds	r2, r2, #8
+.L1626:
+	str	r2, [sp]
+	movs	r1, #1
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	ldr	r3, [fp]
+	mov	r0, r5
+	ldr	r1, [sp, #20]
+	add	r1, r1, r3
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	lsls	r2, r0, #31
+	mov	r0, r5
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r6]
+	bl	NandcFlashDeCs
+	b	.L1624
+.L1635:
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	.loc 1 2289 0
-	ldrh	r2, [r2]
-	.loc 1 2288 0
+	bne	.L1630
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+12
+	bl	printf
+.L1631:
+	add	r8, r8, #1
+	adds	r4, r4, #36
+.L1629:
+	cmp	r7, r8
+	bne	.L1635
+	b	.L1649
+.L1630:
+	sub	r3, r7, r8
+	ldr	fp, .L1650+32
 	uxtb	r3, r3
-	strb	r3, [r4, #6]
-	.loc 1 2289 0
-	cmp	r2, r3
-	bne	.L1789
-	.loc 1 2290 0
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 2291 0
+	add	r2, sp, #20
+	ldr	r1, [sp, #8]
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
 	movs	r3, #0
-	strb	r3, [r4, #6]
-.L1789:
-	.loc 1 2293 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r3, [r4, r3, lsl #1]
-.LVL1995:
-	b	.L1788
-.LVL1996:
-.L1791:
-	.loc 1 2308 0
-	ldrb	r2, [r5]	@ zero_extendqisi2
-	cbz	r2, .L1784
-	cmp	r3, #1
-	bne	.L1784
-	.loc 1 2309 0
-	ldr	r3, .L1795+12
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+	ldr	ip, [fp]
+	mov	r6, r4
+	add	r5, sp, #28
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #36]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #40]
+	stmia	r5!, {r0, r1, r2, r3}
+	movs	r1, #1
+	ldr	r3, [r6]
+	add	r0, sp, #28
+	ldr	r2, [sp, #8]
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #28]
+	adds	r3, r5, #1
+	bne	.L1632
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+16
+	bl	printf
+	str	r5, [r4]
+.L1632:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1633
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1784
-	.loc 1 2310 0
-	ldr	r3, .L1795+16
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
+	beq	.L1633
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+20
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L1633:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1631
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 1 2311 0
-	movs	r3, #0
-	.loc 1 2312 0
-	ldr	r2, .L1795+20
-	.loc 1 2311 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2313 0
-	strb	r3, [r4, #6]
-	.loc 1 2312 0
-	ldrh	r2, [r2]
-	strh	r2, [r4, #2]	@ movhi
-.LVL1997:
-.L1784:
-	pop	{r4, r5, r6, pc}
-.LVL1998:
-.L1796:
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1631
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1650+24
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1631
+.L1639:
+	mov	r8, #0
+	ldr	r10, .L1650+36
+	b	.L1629
+.L1651:
 	.align	2
-.L1795:
-	.word	.LANCHOR8
-	.word	.LANCHOR117
-	.word	.LANCHOR37
-	.word	.LANCHOR53
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-.LBE455:
-.LBE454:
-	.cfi_endproc
-.LFE373:
-	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
-	.section	.text.get_new_active_ppa,"ax",%progbits
+.L1650:
+	.word	.LANCHOR31
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LC29
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LANCHOR3
+	.word	.LANCHOR199
+	.word	.LANCHOR198
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	get_new_active_ppa
+	.global	FlashProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	get_new_active_ppa, %function
-get_new_active_ppa:
-.LFB388:
-	.loc 1 3021 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1999:
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 3025 0
-	movw	r3, #65535
-	ldrh	r2, [r0]
-	.loc 1 3021 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldr	r5, .L1704
 	mov	r4, r0
-	.loc 1 3025 0
-	cmp	r2, r3
-	bne	.L1798
-	.loc 1 3025 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1819
-	movw	r2, #3025
-	ldr	r0, .L1819+4
-.LVL2000:
-	bl	printf
-.LVL2001:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
-	bl	printf
-.LVL2002:
-.L1798:
-	.loc 1 3026 0 is_stmt 1
-	ldr	r5, .L1819+16
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
-	cmp	r2, r3
-	bne	.L1799
-	.loc 1 3026 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1819
-	movw	r2, #3026
-	ldr	r0, .L1819+4
-	bl	printf
-.LVL2003:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
-	bl	printf
-.LVL2004:
-.L1799:
-	.loc 1 3027 0 is_stmt 1
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1800
-	.loc 1 3027 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1819
-	movw	r2, #3027
-	ldr	r0, .L1819+4
-	bl	printf
-.LVL2005:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
-	bl	printf
-.LVL2006:
-.L1800:
-	.loc 1 3028 0 is_stmt 1
-	movs	r3, #0
-	ldr	r7, .L1819+20
-	strb	r3, [r4, #10]
-	.loc 1 3029 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 3039 0
-	ldr	r6, .L1819+24
-	.loc 1 3029 0
-	adds	r3, r3, #8
-	ldrh	r2, [r4, r3, lsl #1]
-.LVL2007:
-.L1801:
-	.loc 1 3030 0
-	movw	r0, #65535
-	cmp	r2, r0
-	beq	.L1802
-	.loc 1 3039 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	ldrh	r1, [r4, #2]
-	cmp	r3, #1
-	ldrh	r3, [r4, #4]
-	bne	.L1804
-	.loc 1 3039 0 is_stmt 0 discriminator 1
-	ldrb	ip, [r6]	@ zero_extendqisi2
-	cmp	ip, #0
-	bne	.L1804
-	.loc 1 3039 0 discriminator 2
-	ldr	ip, .L1819+28
-	ldrh	ip, [ip, r1, lsl #1]
-	cmp	ip, r0
-	bne	.L1804
-	.loc 1 3040 0 is_stmt 1
-	subs	r3, r3, #1
-	.loc 1 3041 0
-	ldrh	r0, [r4]
-	.loc 1 3040 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 3041 0
-	bl	decrement_vpc_count
-.LVL2008:
-.L1802:
-	.loc 1 3032 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 3033 0
-	ldrh	r2, [r7]
-	.loc 1 3032 0
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	.loc 1 3033 0
-	cmp	r2, r3
-	.loc 1 3032 0
-	strb	r3, [r4, #6]
-	.loc 1 3033 0
-	bne	.L1803
-	.loc 1 3034 0
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 3035 0
-	movs	r3, #0
-	strb	r3, [r4, #6]
-.L1803:
-	.loc 1 3037 0
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r2, [r4, r3, lsl #1]
-.LVL2009:
-	b	.L1801
-.L1804:
-	.loc 1 3055 0
-	ldr	r8, .L1819+24
-	.loc 1 3044 0
-	orr	r6, r1, r2, lsl #10
-.LVL2010:
-	.loc 1 3045 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-.LVL2011:
-.L1805:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	.loc 1 3053 0
-	movw	r2, #65535
-	.loc 1 3049 0
-	ldrh	r0, [r7]
-.L1807:
-	.loc 1 3048 0
-	adds	r3, r3, #1
+	mov	r8, r2
+	str	r1, [sp, #8]
+	ldr	r5, [r5]
+	str	r3, [sp, #20]
+	ldrb	r5, [r5, #19]	@ zero_extendqisi2
+	str	r5, [sp, #16]
+	ldr	r5, .L1704+4
+	ldrb	r7, [r5]	@ zero_extendqisi2
+	cbnz	r7, .L1653
+	ldr	r3, .L1704+8
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+.L1654:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bcc	.L1667
+	ldr	r6, .L1704+12
+	movs	r5, #0
+	ldr	r7, .L1704+16
+.L1668:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1670
+	ldr	r3, [sp, #20]
+	cmp	r3, #0
+	bne	.L1671
+.L1679:
+	movs	r0, #0
+	b	.L1652
+.L1653:
+	bl	FlashProgSlc2KPages
+.L1652:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1667:
+	ldr	r3, [sp, #8]
+	movs	r6, #36
+	muls	r6, r7, r6
+	add	r2, sp, #28
+	mov	r1, r8
+	subs	r3, r3, r7
 	uxtb	r3, r3
-	.loc 1 3049 0
+	add	fp, r4, r6
+	str	r3, [sp]
+	mov	r0, fp
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L1704+12
+	mov	r10, r0
+	ldr	r0, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
-	.loc 1 3050 0
-	itttt	eq
-	ldrheq	r3, [r4, #2]
-	addeq	r3, r3, #1
-	strheq	r3, [r4, #2]	@ movhi
-	.loc 1 3051 0
-	moveq	r3, #0
-	.loc 1 3053 0
-	add	r1, r3, #8
-	ldrh	r1, [r4, r1, lsl #1]
-	cmp	r1, r2
-	beq	.L1807
-	strb	r3, [r4, #6]
-	.loc 1 3055 0
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	bhi	.L1656
+	mov	r3, #-1
+	str	r3, [r4, r6]
+.L1657:
+	adds	r7, r7, #1
+	b	.L1654
+.L1656:
+	ldr	r3, .L1704+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	ldr	r3, .L1704+24
+	it	eq
+	moveq	r10, #0
+	add	r3, r3, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L1659
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L1659:
+	ldr	r3, [sp, #32]
+	movs	r1, #0
+	ldr	r2, .L1704+24
+	add	r2, r2, r3, lsl #4
+	str	r1, [r2, #12]
+	ldr	r1, [sp, #28]
+	str	fp, [r2, #8]
+	str	r1, [r2, #4]
+	cmp	r10, #0
+	beq	.L1660
+	add	r1, r6, #36
+	add	r1, r1, r4
+	str	r1, [r2, #12]
+.L1660:
+	ldr	r2, .L1704+28
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	ldr	r2, .L1704+24
+	mov	r0, r5
+	strb	r5, [r2, r3]
+	ldr	r3, .L1704+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1808
-	.loc 1 3055 0 is_stmt 0 discriminator 1
-	ldrb	r1, [r8]	@ zero_extendqisi2
-	ldrh	r3, [r4, #2]
-	cbnz	r1, .L1809
-	.loc 1 3055 0 discriminator 2
-	ldr	r1, .L1819+28
-	ldrh	r3, [r1, r3, lsl #1]
-	cmp	r3, r2
-	bne	.L1808
-	.loc 1 3055 0 discriminator 3
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1808
-	.loc 1 3057 0 is_stmt 1
+	bne	.L1661
+	bl	NandcWaitFlashReady
+.L1662:
+	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
-	.loc 1 3058 0
-	ldrh	r0, [r4]
-	.loc 1 3057 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 3058 0
-	bl	decrement_vpc_count
-.LVL2012:
-	.loc 1 3059 0
-	b	.L1805
-.L1809:
-	.loc 1 3063 0
-	ldr	r2, .L1819+32
-	ldrh	r2, [r2]
-	cmp	r3, r2
-	bcc	.L1808
-	.loc 1 3064 0
-	ldr	r3, .L1819+36
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 1 3065 0
+	cmp	r3, #6
+	bhi	.L1663
+	ldr	r3, .L1704+32
+	ldrb	r3, [r3, r5]	@ zero_extendqisi2
+	cbz	r3, .L1663
+	ldr	r1, .L1704+36
 	movs	r3, #0
-	.loc 1 3066 0
-	ldrh	r2, [r5]
-	.loc 1 3065 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 3067 0
-	strb	r3, [r4, #6]
-	.loc 1 3066 0
-	strh	r2, [r4, #2]	@ movhi
-.L1808:
-	.loc 1 3071 0
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r5]
+	mov	r0, r5
+	adds	r2, r1, #4
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1663:
+	mov	r0, r5
+	bl	NandcFlashCs
+	cmp	r8, #1
+	mov	r0, r5
+	bne	.L1664
+	ldr	r3, .L1704+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1664
+	bl	flash_enter_slc_mode
+.L1665:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [fp, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [fp, #8]
+	bl	NandcXferData
+	cmp	r10, #0
+	beq	.L1666
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgDpFirstCmd
+	ldr	r3, .L1704+40
+	mov	r0, r5
+	ldr	r2, [sp, #32]
+	adds	r6, r6, #36
+	ldr	r1, [sp, #28]
+	add	r6, r6, r4
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	ldr	r3, .L1704+44
+	mov	r0, r5
+	ldr	r1, [sp, #28]
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashProgDpSecondCmd
+	ldr	r3, [r6, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+.L1666:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	add	r7, r7, r10
+	bl	NandcFlashDeCs
+	b	.L1657
+.L1661:
+	bl	NandcFlashCs
+	ldr	r2, [sp, #32]
+	mov	r0, r5
+	ldr	r3, .L1704+40
+	ldr	r1, [sp, #28]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	b	.L1662
+.L1664:
+	bl	flash_exit_slc_mode
+	b	.L1665
+.L1670:
+	uxtb	r0, r5
+	bl	FlashWaitCmdDone
+	cmp	r8, #1
+	bne	.L1669
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L1669
+	ldr	r2, .L1704+24
+	lsls	r3, r5, #4
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L1669:
+	adds	r5, r5, #1
+	b	.L1668
+.L1671:
+	ldr	r10, .L1704+64
+	movs	r7, #0
+.L1672:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	beq	.L1679
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1673
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+48
+	bl	printf
+.L1674:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1672
+.L1673:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #28
+	ldr	fp, .L1704+68
+	mov	r1, r8
+	mov	r0, r4
+	mov	r6, r4
+	subs	r3, r3, r7
+	add	r5, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
+	movs	r3, #0
+	ldr	ip, [fp]
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #44]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #48]
+	stmia	r5!, {r0, r1, r2, r3}
+	mov	r2, r8
+	ldr	r3, [r6]
+	movs	r1, #1
+	add	r0, sp, #36
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #36]
+	adds	r3, r5, #1
+	bne	.L1675
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+52
+	bl	printf
+	str	r5, [r4]
+.L1675:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1676
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bne	.L1797
-	.loc 1 3071 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1797
-	.loc 1 3071 0 discriminator 2
-	ldr	r1, .L1819
-	movw	r2, #3071
-	ldr	r0, .L1819+4
+	beq	.L1676
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+56
 	bl	printf
-.LVL2013:
-	ldr	r1, .L1819+8
-	ldr	r0, .L1819+12
+	mov	r3, #-1
+	str	r3, [r4]
+.L1676:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1674
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1674
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1704+60
 	bl	printf
-.LVL2014:
-.L1797:
-	.loc 1 3073 0 is_stmt 1
-	mov	r0, r6
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2015:
-.L1820:
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1674
+.L1705:
 	.align	2
-.L1819:
-	.word	.LANCHOR205
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR52
-	.word	.LANCHOR37
+.L1704:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR25
 	.word	.LANCHOR8
-	.word	.LANCHOR117
-	.word	.LANCHOR53
-	.word	.LANCHOR83
-	.cfi_endproc
-.LFE388:
-	.size	get_new_active_ppa, .-get_new_active_ppa
-	.section	.text.FtlVpcTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlVpcTblFlush
+	.word	.LANCHOR27
+	.word	.LANCHOR23
+	.word	.LANCHOR26
+	.word	.LANCHOR21
+	.word	.LANCHOR20
+	.word	.LANCHOR17
+	.word	.LANCHOR3
+	.word	.LC29
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LANCHOR198
+	.word	.LANCHOR199
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashTestBlk,"ax",%progbits
+	.align	1
+	.global	FlashTestBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVpcTblFlush, %function
-FtlVpcTblFlush:
-.LFB360:
-	.loc 1 1135 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2016:
-	.loc 1 1140 0
-	ldr	r3, .L1841
-	.loc 1 1135 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1140 0
-	ldr	r2, [r3]
-	str	r3, [sp]
-	cmp	r2, #0
-	bne	.L1823
-.LBB459:
-.LBB460:
-	.loc 1 1143 0
-	ldr	r8, .L1841+108
-	ldr	r4, .L1841+4
-	.loc 1 1144 0
-	ldr	r7, .L1841+8
-	.loc 1 1143 0
-	ldr	r3, [r8]
-	.loc 1 1152 0
-	ldr	r5, .L1841+12
-	.loc 1 1144 0
-	ldr	r6, [r7]
-	.loc 1 1143 0
-	str	r3, [r4, #8]
-	.loc 1 1146 0
-	ldr	r3, .L1841+16
-	.loc 1 1144 0
-	str	r6, [r4, #12]
-.LVL2017:
-	.loc 1 1153 0
-	ldr	r0, .L1841+20
-	.loc 1 1146 0
-	ldrh	r1, [r3]
-	.loc 1 1150 0
-	str	r2, [r6, #12]
-	.loc 1 1146 0
-	strh	r1, [r6, #2]	@ movhi
-	.loc 1 1147 0
-	movw	r1, #61604
-	strh	r1, [r6]	@ movhi
-	.loc 1 1148 0
-	ldr	r1, [r3, #8]
-	.loc 1 1149 0
-	str	r2, [r6, #8]
-	.loc 1 1153 0
-	ldr	r2, .L1841+24
-	.loc 1 1148 0
-	str	r1, [r6, #4]
-	.loc 1 1154 0
-	ldrh	r3, [r3, #6]
-	.loc 1 1153 0
-	stm	r5, {r0, r2}
-	.loc 1 1154 0
-	strh	r3, [r5, #8]	@ movhi
-	.loc 1 1155 0
-	ldr	r3, .L1841+28
-	ldrh	r3, [r3]
-	strb	r3, [r5, #10]
-	.loc 1 1157 0
-	ldr	r3, .L1841+32
-	ldrh	r2, [r3]
-	.loc 1 1158 0
-	ldrh	r1, [r3, #2]
-	.loc 1 1157 0
-	strh	r2, [r5, #14]	@ movhi
-	.loc 1 1158 0
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	.loc 1 1159 0
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #11]
-	.loc 1 1158 0
-	orr	r2, r2, r1, lsl #6
-	.loc 1 1161 0
-	ldr	r3, .L1841+36
-	.loc 1 1158 0
-	strh	r2, [r5, #16]	@ movhi
-	.loc 1 1161 0
-	ldrh	r2, [r3]
-	.loc 1 1162 0
-	ldrh	r1, [r3, #2]
-	.loc 1 1161 0
-	strh	r2, [r5, #18]	@ movhi
-	.loc 1 1162 0
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	.loc 1 1163 0
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	strb	r3, [r5, #12]
-	.loc 1 1162 0
-	orr	r2, r2, r1, lsl #6
-	.loc 1 1165 0
-	ldr	r3, .L1841+40
-	.loc 1 1162 0
-	strh	r2, [r5, #20]	@ movhi
-	.loc 1 1165 0
-	ldrh	r2, [r3]
-	strh	r2, [r5, #22]	@ movhi
-	.loc 1 1166 0
-	ldrh	r1, [r3, #2]
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	.loc 1 1167 0
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	.loc 1 1180 0
-	ldr	r0, [r4, #8]
-	.loc 1 1167 0
-	strb	r3, [r5, #13]
-	.loc 1 1166 0
-	orr	r2, r2, r1, lsl #6
-	.loc 1 1169 0
-	ldr	r3, .L1841+44
-	.loc 1 1180 0
-	movs	r1, #255
-	.loc 1 1166 0
-	strh	r2, [r5, #24]	@ movhi
-	.loc 1 1169 0
-	ldr	r3, [r3]
-	str	r3, [r5, #32]
-	.loc 1 1174 0
-	ldr	r3, .L1841+48
-	ldr	r3, [r3]
-	str	r3, [r5, #40]
-	.loc 1 1175 0
-	ldr	r3, .L1841+52
+	ldr	r3, .L1709
+	push	{r4, r5, lr}
+	mov	r4, r0
+	sub	sp, sp, #108
 	ldr	r3, [r3]
-	str	r3, [r5, #36]
-	.loc 1 1180 0
-	ldr	r3, .L1841+56
-	ldrh	r2, [r3]
+	cmp	r0, r3
+	bcc	.L1708
+	ldr	r5, .L1709+4
+	add	r0, sp, #40
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r4, r4, #10
+	ldr	r3, [r5]
+	str	r3, [sp, #12]
 	bl	ftl_memset
-.LVL2018:
-	.loc 1 1181 0
-	mov	r1, r5
-	.loc 1 1182 0
-	ldr	r5, .L1841+60
-	.loc 1 1181 0
-	movs	r2, #48
-	ldr	r0, [r4, #8]
-	bl	ftl_memcpy
-.LVL2019:
-	.loc 1 1182 0
-	ldrh	r2, [r5]
-	ldr	r3, .L1841+64
-	ldr	r0, [r4, #8]
-	ldr	r1, [r3]
-	lsls	r2, r2, #1
-	adds	r0, r0, #48
-	bl	ftl_memcpy
-.LVL2020:
-	.loc 1 1183 0
-	ldrh	r0, [r5]
-	ldr	r3, [r4, #8]
-	ldr	r1, .L1841+68
-	lsrs	r2, r0, #3
-	adds	r0, r0, #24
-	lsls	r0, r0, #1
-	ldr	r1, [r1]
-	adds	r2, r2, #4
-	bic	r0, r0, #3
-	add	r0, r0, r3
-	bl	ftl_memcpy
-.LVL2021:
-	.loc 1 1184 0
-	ldr	r3, .L1841+72
-	str	r7, [sp, #4]
-	ldrh	r3, [r3]
-	cbz	r3, .L1824
-.LBB461:
-	.loc 1 1185 0
-	ldrh	r0, [r5]
-.LVL2022:
-	.loc 1 1186 0
-	ldr	r3, .L1841+76
-	ldr	r1, .L1841+80
-	ldrh	r2, [r3]
-	.loc 1 1185 0
-	lsrs	r3, r0, #3
-	.loc 1 1186 0
-	ldr	r1, [r1]
-	.loc 1 1185 0
-	add	r3, r3, r0, lsl #1
-	.loc 1 1186 0
-	ldr	r0, [r4, #8]
-.LVL2023:
-	.loc 1 1185 0
-	adds	r3, r3, #52
-	.loc 1 1186 0
-	lsls	r2, r2, #2
-	ubfx	r3, r3, #2, #14
-	add	r0, r0, r3, lsl #2
-	bl	ftl_memcpy
-.LVL2024:
-.L1824:
-.LBE461:
-	.loc 1 1193 0
-	ldr	r5, .L1841+16
-	.loc 1 1138 0
-	movs	r7, #0
-	.loc 1 1136 0
-	movw	fp, #65535
-	.loc 1 1189 0
-	movs	r0, #0
-	bl	FtlUpdateVaildLpn
-.LVL2025:
-	mov	r10, r5
-.L1825:
-.LVL2026:
-	.loc 1 1191 0
-	ldr	r3, [r8]
-	.loc 1 1193 0
-	ldrh	r2, [r5]
-	.loc 1 1194 0
-	ldr	r0, .L1841+4
-	.loc 1 1191 0
-	str	r3, [r4, #8]
-	.loc 1 1192 0
-	ldr	r3, [sp, #4]
-	ldr	r3, [r3]
-	str	r3, [r4, #12]
-	.loc 1 1193 0
-	ldrh	r3, [r5, #2]
-	orr	r3, r3, r2, lsl #10
-	str	r3, [r4, #4]
-	.loc 1 1194 0
-	movs	r3, #1
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL2027:
-	.loc 1 1195 0
-	ldr	r3, .L1841+84
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r3]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1826
-	.loc 1 1197 0
-	ldrh	r3, [r5]
-	.loc 1 1196 0
-	ldrh	fp, [r5, #4]
-.LVL2028:
-	.loc 1 1197 0
-	strh	r3, [r5, #4]	@ movhi
-	.loc 1 1198 0
-	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 1199 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL2029:
-	.loc 1 1204 0
-	ldr	r2, .L1841+48
-	.loc 1 1199 0
-	strh	r0, [r5]	@ movhi
-	.loc 1 1204 0
-	ldr	r3, [r2]
-	adds	r1, r3, #1
-	str	r3, [r5, #8]
-	str	r1, [r2]
-	.loc 1 1205 0
-	lsls	r2, r0, #10
-	str	r2, [r4, #4]
-	.loc 1 1206 0
-	str	r3, [r6, #4]
-	.loc 1 1208 0
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r4, [sp, #8]
+	bl	FlashEraseBlocks
 	movs	r3, #1
-	.loc 1 1207 0
-	strh	r0, [r6, #2]	@ movhi
-	.loc 1 1208 0
+	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1841+4
 	bl	FlashProgPages
-.LVL2030:
-.L1826:
-	.loc 1 1210 0
-	ldrh	r3, [r10, #2]
-	.loc 1 1211 0
-	ldr	r2, [r4]
-	.loc 1 1210 0
-	adds	r3, r3, #1
-	uxth	r3, r3
-	.loc 1 1211 0
-	adds	r1, r2, #1
-	.loc 1 1210 0
-	strh	r3, [r10, #2]	@ movhi
-	.loc 1 1211 0
-	bne	.L1827
-	.loc 1 1213 0
-	cmp	r3, #1
-	bne	.L1828
-	ldr	r1, .L1841+88
-	movw	r2, #1213
-	ldr	r0, .L1841+92
-	bl	printf
-.LVL2031:
-	ldr	r1, .L1841+96
-	ldr	r0, .L1841+100
-	bl	printf
-.LVL2032:
-.L1828:
-	.loc 1 1214 0
-	ldrh	r3, [r10, #2]
-	.loc 1 1216 0
-	adds	r7, r7, #1
-.LVL2033:
-	uxth	r7, r7
-.LVL2034:
-	.loc 1 1214 0
-	cmp	r3, #1
-	.loc 1 1215 0
-	itttt	eq
-	ldreq	r3, .L1841+84
-	ldrheq	r3, [r3]
-	addeq	r3, r3, #-1
-	strheq	r3, [r10, #2]	@ movhi
-	.loc 1 1217 0
-	cmp	r7, #3
-	bls	.L1825
-	.loc 1 1218 0
-	mov	r2, r7
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1841+104
-	bl	printf
-.LVL2035:
-	.loc 1 1220 0
-	ldr	r2, [sp]
-	movs	r3, #1
-	str	r3, [r2]
-.LVL2036:
-.L1823:
-.LBE460:
-.LBE459:
-	.loc 1 1232 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	ldr	r4, [sp, #4]
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+	bl	FlashEraseBlocks
+.L1706:
+	mov	r0, r4
+	add	sp, sp, #108
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2037:
-.L1827:
-	.cfi_restore_state
-.LBB463:
-.LBB462:
-	.loc 1 1226 0
-	cmp	r3, #1
-	beq	.L1825
-	cmp	r2, #256
-	beq	.L1825
-	.loc 1 1229 0
-	movw	r3, #65535
-	cmp	fp, r3
-	beq	.L1823
-	.loc 1 1230 0
-	movs	r1, #1
-	mov	r0, fp
-	bl	FtlFreeSysBlkQueueIn
-.LVL2038:
-	b	.L1823
-.L1842:
+	pop	{r4, r5, pc}
+.L1708:
+	movs	r4, #0
+	b	.L1706
+.L1710:
 	.align	2
-.L1841:
-	.word	.LANCHOR76
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LANCHOR80
-	.word	.LANCHOR206
-	.word	1179929683
-	.word	1342177352
-	.word	.LANCHOR44
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR164
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR57
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-	.word	.LANCHOR0
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR128
-	.word	.LANCHOR53
-	.word	.LANCHOR207
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC35
-	.word	.LANCHOR180
-.LBE462:
-.LBE463:
-	.cfi_endproc
-.LFE360:
-	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+.L1709:
+	.word	.LANCHOR149
+	.word	.LANCHOR153
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	FtlLowFormatEraseBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-.LFB380:
-	.loc 1 2531 0
-	.cfi_startproc
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2039:
-	.loc 1 2537 0
-	ldr	r3, .L1858
-	.loc 1 2531 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	mov	r4, r0
+	ldr	r3, .L1756
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	.cfi_def_cfa_offset 64
-	.loc 1 2537 0
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	cbz	r5, .L1857
-	.loc 1 2537 0 is_stmt 0 discriminator 1
-	ldrb	r5, [r0, #8]	@ zero_extendqisi2
-	cmp	r5, #1
-	bne	.L1852
-.LVL2040:
-	.loc 1 2540 0 is_stmt 1
-	ldrh	r6, [r0, #4]
-.LVL2041:
-.L1844:
-	.loc 1 2550 0
-	ldr	r7, .L1858+4
-	.loc 1 2551 0
-	ldr	r8, .L1858+20
-.LVL2042:
-.L1845:
-	.loc 1 2543 0
-	adds	r6, r6, #-1
-.LVL2043:
-	bcc	.L1847
-.LVL2044:
-	.loc 1 2544 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1846
-.LVL2045:
-.L1847:
-	.loc 1 2564 0
-	ldr	r3, .L1858+8
-	ldrh	r1, [r4]
-	ldrh	r0, [r4, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 1 2565 0
-	ldr	r3, .L1858+12
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	str	r1, [sp, #4]
+	cmp	r3, #0
+	bne	.L1738
+	ldr	r2, .L1756+4
+	mov	r10, r3
+	mov	r5, r3
+	mov	r4, r3
+	mov	r8, #36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	ldr	r2, .L1756+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	ldr	r2, .L1756+12
+	str	r0, [r2]
+	ldr	r2, .L1756+16
+	ldrh	fp, [r2]
+	ldr	r2, .L1756+20
+	ldr	r7, [r2]
+	ldr	r2, .L1756+24
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, .L1756+28
+	ldrh	r2, [r2]
+	str	r2, [sp, #24]
+.L1713:
+	uxth	r2, r10
+	cmp	fp, r2
+	bhi	.L1717
+	cmp	r5, #0
+	beq	.L1711
+	ldr	r3, [sp, #12]
+	mov	r0, r7
+	ldr	r10, .L1756+4
+	mov	r8, #0
+	mov	r2, r5
+	ldr	r7, .L1756+20
+	adds	r6, r3, #0
+	it	ne
+	movne	r6, #1
+	strb	r8, [r10]
+	mov	r1, r6
+	bl	FlashEraseBlocks
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	strb	r3, [r10]
+	mov	r10, #36
+.L1719:
+	uxth	r3, r8
+	cmp	r5, r3
+	bhi	.L1721
+	ldr	r3, [sp, #4]
+	cmp	r3, #0
+	bne	.L1722
+	uxth	r6, r6
+	movs	r3, #6
+	str	r3, [sp, #16]
+	movs	r3, #1
+	str	r3, [sp, #12]
+.L1723:
+	mov	r8, #0
+.L1732:
+	ldr	r3, .L1756+16
+	mov	fp, #0
+	mov	r5, fp
 	ldrh	r3, [r3]
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 2566 0
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	.loc 1 2567 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 1 2569 0
+	str	r3, [sp, #24]
+	ldr	r3, .L1756+20
+	ldr	r10, [r3]
+	ldr	r3, .L1756+32
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L1756+36
+	ldr	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L1756+28
+	ldrh	r3, [r3]
+	str	r3, [sp, #36]
+.L1724:
+	ldr	r3, [sp, #24]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L1727
+	cbz	r5, .L1711
+	ldr	fp, .L1756+4
+	movs	r3, #1
+	mov	r0, r10
+	movs	r7, #0
+	mov	r2, r6
+	mov	r1, r5
+	strb	r7, [fp]
+	bl	FlashProgPages
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	ldr	r10, .L1756+20
+	strb	r3, [fp]
+	mov	fp, #36
+.L1729:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1731
+	ldr	r3, [sp, #16]
+	add	r8, r8, r3
+	ldr	r3, [sp, #12]
+	uxth	r8, r8
+	cmp	r3, r8
+	bhi	.L1732
+	ldr	r8, .L1756+20
+	movs	r7, #0
+	mov	r10, #36
+.L1733:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1735
+	ldr	r3, [sp, #8]
+	cmp	r3, #63
+	bls	.L1736
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1711
+.L1736:
+	ldr	r3, .L1756+20
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L1711:
+	mov	r0, r4
 	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2046:
-.L1852:
-	.cfi_restore_state
-	.loc 1 2535 0
-	movs	r5, #0
-.L1857:
-	.loc 1 2534 0
-	movs	r6, #12
-	b	.L1844
-.LVL2047:
-.L1846:
-	.loc 1 2546 0
-	mov	r0, r4
-	bl	get_new_active_ppa
-.LVL2048:
-	str	r0, [sp, #8]
-	.loc 1 2547 0
-	adds	r0, r0, #1
-	beq	.L1847
-	.loc 1 2551 0
-	ldr	r1, [r8]
-	.loc 1 2549 0
-	mov	r3, #-1
-	.loc 1 2550 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1717:
+	mul	r2, r8, r10
+	movs	r3, #0
+	ldr	r1, [sp, #8]
+	str	r3, [r7, r2]
+	ldr	r3, .L1756+40
+	ldrb	r0, [r3, r10]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp, #4]
+	mov	r6, r0
+	cbz	r3, .L1714
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1715
+.L1714:
+	mov	r0, r6
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1716
+	ldr	r3, [sp, #24]
+	mla	r1, r8, r5, r7
+	lsls	r6, r6, #10
+	mul	r2, r3, r5
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	str	r6, [r1, #4]
+	uxth	r5, r5
+	str	r0, [r1, #8]
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1715:
+	add	r10, r10, #1
+	b	.L1713
+.L1716:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1715
+.L1721:
+	mul	r3, r10, r8
 	ldr	r2, [r7]
-	.loc 1 2549 0
-	str	r3, [sp, #20]
-	.loc 1 2551 0
-	str	r1, [sp, #16]
-.LVL2049:
-	.loc 1 2550 0
-	str	r2, [sp, #12]
-	.loc 1 2555 0
-	str	r3, [r1, #12]
-	.loc 1 2554 0
-	str	r3, [r1, #8]
-	.loc 1 2556 0
-	ldrh	r3, [r4]
-	.loc 1 2559 0
-	ldr	r0, .L1858+16
-	.loc 1 2556 0
-	strh	r3, [r1, #2]	@ movhi
-	.loc 1 2557 0
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L1720
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1720:
+	add	r8, r8, #1
+	b	.L1719
+.L1722:
+	ldr	r3, .L1756+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1756+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1739
+	ldr	r3, [sp, #12]
+	movs	r6, #1
+	lsrs	r3, r3, #2
+	str	r3, [sp, #16]
+	b	.L1723
+.L1739:
+	movs	r6, #1
+	str	r6, [sp, #16]
+	b	.L1723
+.L1727:
+	movs	r3, #36
+	ldr	r1, [sp, #8]
+	mul	r2, r3, fp
 	movs	r3, #0
-	strh	r3, [r1]	@ movhi
-	.loc 1 2559 0
-	ldr	r2, [r0]
-	str	r2, [r1, #4]
-	adds	r2, r2, #1
-	adds	r1, r2, #1
-.LVL2050:
-	.loc 1 2560 0
-	mov	r1, #1
-	.loc 1 2559 0
-	it	eq
-	moveq	r2, r3
-	str	r2, [r0]
-	.loc 1 2560 0
-	mov	r2, r5
-	add	r0, sp, #4
-	bl	FlashProgPages
-.LVL2051:
-	.loc 1 2561 0
-	ldrh	r0, [r4]
-	bl	decrement_vpc_count
-.LVL2052:
-	b	.L1845
-.L1859:
+	str	r3, [r10, r2]
+	ldr	r3, .L1756+40
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp, #4]
+	mov	r7, r0
+	cbz	r3, .L1725
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1726
+.L1725:
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1726
+	movs	r3, #36
+	add	r7, r8, r7, lsl #10
+	mla	r1, r3, r5, r10
+	ldr	r3, [sp, #28]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #36]
+	str	r7, [r1, #4]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #32]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1726:
+	add	fp, fp, #1
+	b	.L1724
+.L1731:
+	mul	r3, fp, r7
+	ldr	r2, [r10]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbz	r3, .L1730
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1730:
+	adds	r7, r7, #1
+	b	.L1729
+.L1735:
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1734
+	mul	r3, r10, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L1734
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L1734:
+	adds	r7, r7, #1
+	b	.L1733
+.L1738:
+	movs	r4, #0
+	b	.L1711
+.L1757:
 	.align	2
-.L1858:
+.L1756:
+	.word	.LANCHOR77
+	.word	.LANCHOR27
 	.word	.LANCHOR8
-	.word	.LANCHOR180
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.word	.LANCHOR157
-	.word	.LANCHOR185
-	.cfi_endproc
-.LFE380:
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.word	.LANCHOR74
+	.word	.LANCHOR38
+	.word	.LANCHOR78
+	.word	.LANCHOR189
+	.word	.LANCHOR59
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR47
+	.word	.LANCHOR54
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	FtlBbmTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-.LFB321:
-	.loc 5 182 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 188 0
-	ldr	r3, .L1870
-	.loc 5 182 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 191 0
-	movs	r6, #0
-	.loc 5 188 0
-	ldr	r5, .L1870+4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1769
+	ldr	r4, [r3]
+	str	r3, [sp, #12]
+	cmp	r4, #0
+	bne	.L1760
+	ldr	r3, .L1769+4
+	mov	r1, r4
+	ldr	r7, .L1769+8
+	ldr	r5, .L1769+12
 	ldr	r3, [r3]
-	ldr	r7, .L1870+8
-	.loc 5 195 0
-	ldr	r10, .L1870+20
-	.loc 5 188 0
-	str	r3, [r5, #8]
-	.loc 5 189 0
-	ldr	r3, .L1870+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-.LVL2053:
-.L1861:
-	.loc 5 191 0 discriminator 1
-	ldr	r3, .L1870+16
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L1866
-	.loc 5 222 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2054:
-.L1866:
-	.loc 5 195 0
-	ldrh	r4, [r10]
-	.loc 5 194 0
-	movw	r3, #65535
-	.loc 5 199 0
-	ldr	fp, .L1870+4
-	.loc 5 194 0
-	strh	r3, [r7, #2]!	@ movhi
-	.loc 5 195 0
-	subs	r4, r4, #1
-	uxth	r4, r4
-.LVL2055:
-.L1862:
-	.loc 5 195 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r10]
-	sub	r2, r3, #15
-	cmp	r2, r4
-	bgt	.L1864
-.LVL2056:
-	.loc 5 197 0 is_stmt 1
-	mla	r3, r6, r3, r4
-.LVL2057:
-	.loc 5 199 0
-	movs	r2, #1
-.LVL2058:
-	mov	r1, r2
-	mov	r0, fp
-	.loc 5 197 0
-	lsls	r3, r3, #10
-	.loc 5 198 0
+	ldr	r0, [r7]
+	mov	r8, r7
+	ldr	r6, .L1769+16
+	str	r3, [r5, #12]
+	ldr	r7, .L1769+20
+	ldr	r3, .L1769+24
+	ldr	r10, .L1769+56
+	str	r0, [r5, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L1761:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1762
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L1769+28
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #8]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L1769+32
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L1763:
+	ldr	r3, [r8]
+	mov	fp, #0
+	ldrh	r1, [r4]
+	ldrh	r2, [r4, #2]
+	str	r3, [r5, #8]
+	ldr	r3, .L1769+4
+	ldrh	r0, [r6, #10]
+	str	fp, [r5]
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
+	orr	r3, r2, r1, lsl #10
 	str	r3, [r5, #4]
-	.loc 5 199 0
-	bl	FlashReadPages
-.LVL2059:
-	.loc 5 200 0
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L1863
-	.loc 5 208 0
-	ldrh	r2, [r8]
-	movw	r3, #61664
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1769+36
+	bl	printf
+	movs	r3, #1
+	ldr	r0, .L1769+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1769+40
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
 	cmp	r2, r3
-	bne	.L1863
-	.loc 5 210 0
-	strh	r4, [r7]	@ movhi
-.L1864:
-	.loc 5 191 0 discriminator 2
-	adds	r6, r6, #1
-.LVL2060:
-	b	.L1861
-.L1863:
-	.loc 5 195 0 discriminator 2
-	subs	r4, r4, #1
-.LVL2061:
-	uxth	r4, r4
-.LVL2062:
-	b	.L1862
-.L1871:
-	.align	2
-.L1870:
-	.word	.LANCHOR180
-	.word	.LANCHOR199
-	.word	.LANCHOR74+10
-	.word	.LANCHOR185
-	.word	.LANCHOR44
-	.word	.LANCHOR50
-	.cfi_endproc
-.LFE321:
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
-	.align	1
-	.global	FtlGetLastWrittenPage
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-.LFB329:
-	.loc 1 47 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2063:
-	.loc 1 51 0
-	cmp	r1, #1
-	.loc 1 47 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 51 0
-	it	eq
-	ldreq	r3, .L1884
-	.loc 1 47 0
-	sub	sp, sp, #104
-	.cfi_def_cfa_offset 128
-	.loc 1 57 0
-	lsl	r7, r0, #10
-	.loc 1 58 0
-	mov	r2, r1
-	.loc 1 51 0
-	it	ne
-	ldrne	r3, .L1884+4
-	.loc 1 47 0
-	mov	r8, r1
-	.loc 1 53 0
-	movs	r6, #0
-	.loc 1 58 0
-	movs	r1, #1
-.LVL2064:
-	add	r0, sp, #4
-.LVL2065:
-	.loc 1 51 0
-	ldrh	r5, [r3]
-.LVL2066:
-	.loc 1 54 0
-	add	r3, sp, #40
-	str	r3, [sp, #16]
-.LVL2067:
-	.loc 1 53 0
-	str	r6, [sp, #12]
-	.loc 1 56 0
-	subs	r5, r5, #1
-.LVL2068:
-	sxth	r5, r5
-.LVL2069:
-	.loc 1 57 0
-	orr	r3, r5, r7
-	str	r3, [sp, #8]
-	.loc 1 58 0
-	bl	FlashReadPages
-.LVL2070:
-	.loc 1 59 0
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	bne	.L1875
-.LVL2071:
-.L1876:
-	.loc 1 60 0
-	cmp	r6, r5
-	ble	.L1879
-.LVL2072:
-.L1875:
-	.loc 1 73 0
-	mov	r0, r5
-	add	sp, sp, #104
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2073:
-.L1879:
-	.cfi_restore_state
-	.loc 1 61 0
-	adds	r3, r6, r5
-	.loc 1 63 0
-	mov	r2, r8
-	.loc 1 61 0
-	add	r3, r3, r3, lsr #31
-	.loc 1 63 0
-	movs	r1, #1
-	add	r0, sp, #4
-	.loc 1 61 0
-	asrs	r4, r3, #1
-.LVL2074:
-	.loc 1 62 0
-	sxth	r3, r4
-	orrs	r3, r3, r7
-	str	r3, [sp, #8]
-	.loc 1 63 0
-	bl	FlashReadPages
-.LVL2075:
-	.loc 1 65 0
-	ldr	r3, [sp, #40]
+	blt	.L1764
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4]
+	strh	fp, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	bne	.L1877
-	.loc 1 65 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #44]
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1769+44
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
+	movs	r2, #1
+	str	r3, [r5, #4]
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1769+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.L1764:
+	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
-	bne	.L1877
-	.loc 1 65 0 discriminator 2
-	ldr	r3, [sp, #4]
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1877
-	.loc 1 66 0 is_stmt 1
-	subs	r4, r4, #1
-.LVL2076:
-	sxth	r5, r4
-.LVL2077:
-	b	.L1876
-.LVL2078:
-.L1877:
-	.loc 1 68 0
+	bne	.L1765
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L1769+48
+	bl	printf
+	cmp	r7, #3
+	bls	.L1763
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1769+52
+	bl	printf
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	str	r3, [r2]
+.L1760:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1762:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r4, r2
+	lsls	r2, r2, #2
 	adds	r4, r4, #1
-.LVL2079:
-	sxth	r6, r4
-.LVL2080:
-	b	.L1876
-.L1885:
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L1761
+.L1765:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1760
+	movs	r3, #1
+	str	r3, [sp, #8]
+	b	.L1763
+.L1770:
 	.align	2
-.L1884:
-	.word	.LANCHOR53
-	.word	.LANCHOR52
-	.cfi_endproc
-.LFE329:
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlLoadBbt,"ax",%progbits
+.L1769:
+	.word	.LANCHOR77
+	.word	.LANCHOR188
+	.word	.LANCHOR183
+	.word	.LANCHOR202
+	.word	.LANCHOR75+24
+	.word	.LANCHOR45
+	.word	.LANCHOR58
+	.word	.LANCHOR75
+	.word	.LANCHOR37
+	.word	.LC33
+	.word	.LANCHOR54
+	.word	.LANCHOR78
+	.word	.LC34
+	.word	.LC35
+	.word	.LANCHOR123
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	allocate_data_superblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-.LFB323:
-	.loc 5 249 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 5 257 0
-	ldr	r8, .L1915+48
-	ldr	r4, .L1915
-	ldr	r3, [r8]
-	.loc 5 261 0
-	ldr	r7, .L1915+4
-	.loc 5 264 0
-	mov	r10, r4
-	.loc 5 257 0
-	str	r3, [r4, #8]
-	.loc 5 258 0
-	ldr	r3, .L1915+8
-	ldr	r6, [r3]
-	str	r6, [r4, #12]
-.LVL2081:
-	.loc 5 260 0
-	bl	FtlBbtMemInit
-.LVL2082:
-	.loc 5 261 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r3, .L1834
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1773
+	ldr	r7, .L1834+4
+.L1772:
+	ldr	r3, .L1834+4
+	ldr	r6, .L1834+8
+	ldrh	r3, [r3]
+	ldrh	r2, [r6]
+	add	r3, r3, r2
+	ldr	r2, .L1834+12
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1774
+	ldr	r1, .L1834+16
+	mov	r2, #3168
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1774:
+	ldr	r3, .L1834+32
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L1775
+	ldr	r3, .L1834+36
 	ldrh	r5, [r7]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.LVL2083:
-.L1887:
-	.loc 5 261 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r7]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L1890
-	.loc 5 263 0 is_stmt 1
-	lsls	r3, r5, #10
-	.loc 5 264 0
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	.loc 5 263 0
-	str	r3, [r4, #4]
-	.loc 5 264 0
-	bl	FlashReadPages
-.LVL2084:
-	.loc 5 265 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	bne	.L1888
-	.loc 5 267 0
-	ldr	r3, [r4, #4]
-	.loc 5 268 0
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	.loc 5 267 0
-	adds	r3, r3, #1
-	str	r3, [r4, #4]
-	.loc 5 268 0
-	bl	FlashReadPages
-.LVL2085:
-.L1888:
-	.loc 5 270 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L1889
-	.loc 5 278 0
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1889
-	.loc 5 280 0
-	ldr	r3, .L1915+12
-	.loc 5 281 0
-	ldr	r2, [r6, #4]
-	.loc 5 280 0
-	strh	r5, [r3]	@ movhi
-	.loc 5 281 0
-	str	r2, [r3, #8]
-	.loc 5 282 0
-	ldrh	r2, [r6, #8]
-	strh	r2, [r3, #4]	@ movhi
-.L1890:
-	.loc 5 298 0
-	ldr	r5, .L1915+12
-.LVL2086:
+	ldr	r3, [r3]
+	lsrs	r0, r5, #1
+	mul	ip, r3, r5
+	adds	r1, r0, #1
+	add	r1, r1, ip, lsr #2
+	ldr	ip, .L1834+48
+	uxth	r1, r1
+	ldr	ip, [ip]
+	cmp	ip, #0
+	beq	.L1776
+	ldr	ip, .L1834+52
+	ldr	ip, [ip]
+	cmp	ip, #39
+	bhi	.L1776
+	cmp	ip, #2
+	bls	.L1809
+	lsls	r5, r5, #31
+	bpl	.L1805
+	cmp	r3, #0
+	beq	.L1809
+.L1805:
+	mov	r1, r0
+	b	.L1776
+.L1775:
+	cmp	r2, #1
+	bne	.L1809
+	ldr	r3, .L1834+40
+	ldrh	r3, [r3]
+	cmp	r3, #1
+	beq	.L1809
+	ldr	r3, .L1834+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1809
+	ldr	r0, .L1834+48
+	ldrh	r3, [r7]
+	ldr	r0, [r0]
+	lsrs	r1, r3, #3
+	cbz	r0, .L1776
+	ldr	r0, .L1834+52
+	ldr	r0, [r0]
+	cmp	r0, #1
+	bhi	.L1776
+	rsb	r3, r3, r3, lsl #3
+	ubfx	r1, r3, #3, #16
+.L1776:
+	cbz	r1, .L1777
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L1777:
+	ldr	r0, .L1834+56
+	bl	List_pop_index_node
+	ldrh	r3, [r7]
+	mov	r5, r0
+	uxth	r8, r0
+	cbnz	r3, .L1778
+	ldr	r1, .L1834+16
+	movw	r2, #3188
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1778:
+	ldrh	r3, [r7]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	strh	r8, [r4]	@ movhi
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1779
+	ldr	r3, .L1834+60
+	uxth	r5, r5
 	movw	r2, #65535
-	ldrh	r3, [r5]
-	cmp	r3, r2
-	beq	.L1904
-	.loc 5 304 0
-	ldrh	r3, [r5, #4]
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrh	r2, [r6]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1834+12
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	beq	.L1894
-	.loc 5 306 0
-	lsls	r3, r3, #10
-	.loc 5 307 0
-	movs	r2, #1
-	mov	r1, r2
-	ldr	r0, .L1915
-	.loc 5 306 0
-	str	r3, [r4, #4]
-	.loc 5 307 0
-	bl	FlashReadPages
-.LVL2087:
-	.loc 5 308 0
-	ldr	r3, [r4]
-	adds	r3, r3, #1
-	beq	.L1894
-	.loc 5 311 0
+	ble	.L1772
+	mov	r2, #3200
+	ldr	r1, .L1834+16
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+	b	.L1772
+.L1809:
+	movs	r1, #0
+	b	.L1777
+.L1779:
 	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1894
-	.loc 5 311 0 is_stmt 0 discriminator 1
-	ldr	r3, [r6, #4]
-	ldr	r2, [r5, #8]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1834+12
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bls	.L1894
-	.loc 5 313 0 is_stmt 1
-	ldrh	r2, [r5, #4]
-	.loc 5 314 0
-	str	r3, [r5, #8]
-	.loc 5 315 0
-	ldrh	r3, [r6, #8]
-	.loc 5 313 0
-	strh	r2, [r5]	@ movhi
-	.loc 5 315 0
-	strh	r3, [r5, #4]	@ movhi
-.L1894:
-	.loc 5 327 0
-	ldr	r10, .L1915
-	.loc 5 320 0
-	movs	r1, #1
-	ldrh	r0, [r5]
-	bl	FtlGetLastWrittenPage
-.LVL2088:
-	sxth	r7, r0
-.LVL2089:
-	.loc 5 321 0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L1896:
-	.loc 5 323 0
-	cmp	r7, #0
-	bge	.L1899
-	.loc 5 336 0
-	ldr	r1, .L1915+16
-	mov	r2, #336
-	ldr	r0, .L1915+20
+	ble	.L1781
+	ldr	r1, .L1834+16
+	movw	r2, #3203
+	ldr	r0, .L1834+20
 	bl	printf
-.LVL2090:
-	ldr	r1, .L1915+24
-	ldr	r0, .L1915+28
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
 	bl	printf
-.LVL2091:
-.L1898:
-	.loc 5 337 0
-	ldrh	r3, [r6, #10]
-	.loc 5 339 0
-	ldrh	r0, [r6, #12]
-	.loc 5 337 0
-	strh	r3, [r5, #6]	@ movhi
-	.loc 5 339 0
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1901
-	.loc 5 341 0
-	ldr	r3, .L1915+32
-	ldr	r2, [r3]
-	cmp	r0, r2
-	beq	.L1901
-	.loc 5 341 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1915+36
-	ldrh	r3, [r3]
-	lsrs	r3, r3, #2
+.L1781:
+	ldr	r2, .L1834+64
+	movs	r6, #0
+	ldr	fp, .L1834+100
+	add	ip, r4, #16
+	mov	lr, r6
+	movw	r10, #65535
+	ldrh	r1, [r2]
+	movs	r2, #36
+	ldr	r0, [fp]
+	str	r2, [sp, #4]
+	mov	r3, r0
+	mla	r1, r2, r1, r0
+	str	r1, [sp]
+.L1782:
+	ldr	r2, [sp]
 	cmp	r2, r3
-	bcs	.L1901
-	.loc 5 343 0 is_stmt 1
-	cmp	r0, r3
-	bcs	.L1901
-	.loc 5 345 0
-	bl	FtlSysBlkNumInit
-.LVL2092:
-.L1901:
-	ldr	r6, .L1915+40
-.LVL2093:
-	.loc 5 249 0 discriminator 1
-	movs	r5, #0
-	.loc 5 350 0 discriminator 1
-	ldr	r7, .L1915+44
-.LVL2094:
-	.loc 5 351 0 discriminator 1
-	ldr	r8, .L1915+52
-.L1902:
-.LVL2095:
-	.loc 5 350 0 discriminator 1
-	ldrh	r3, [r7]
-	cmp	r5, r3
-	bcc	.L1903
-	.loc 5 357 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL2096:
-.L1889:
-	.loc 5 261 0 discriminator 2
-	subs	r5, r5, #1
-.LVL2097:
+	bne	.L1784
+	cbnz	r6, .L1785
+	ldr	r1, .L1834+16
+	movw	r2, #3215
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1785:
+	ldr	r3, .L1834+48
 	uxth	r5, r5
-.LVL2098:
-	b	.L1887
-.LVL2099:
-.L1899:
-	.loc 5 325 0
-	ldrh	r3, [r5]
-	.loc 5 327 0
-	movs	r2, #1
-	mov	r1, r2
-	mov	r0, r10
-	.loc 5 325 0
-	orr	r3, r7, r3, lsl #10
-	str	r3, [r4, #4]
-	.loc 5 326 0
-	ldr	r3, [r8]
-	str	r3, [r4, #8]
-	.loc 5 327 0
-	bl	FlashReadPages
-.LVL2100:
-	.loc 5 329 0
-	ldr	r3, [r4]
+	ldr	r10, .L1834+104
+	ldr	r3, [r3]
+	cbz	r3, .L1786
+	ldr	r3, .L1834+68
+	cmp	r4, r3
+	bne	.L1786
+	ldr	r3, [r10]
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, #40
+	itt	hi
+	movhi	r3, #0
+	strbhi	r3, [r4, #8]
+.L1786:
+	ldr	r3, .L1834+72
+	ldrh	r3, [r3]
+	cmp	r3, r8
+	bne	.L1787
+	ldr	r1, .L1834+16
+	movw	r2, #3222
+	ldr	r0, .L1834+20
+	bl	printf
+	ldr	r1, .L1834+24
+	ldr	r0, .L1834+28
+	bl	printf
+.L1787:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldr	r2, .L1834+76
+	ldr	r3, .L1834+80
+	cmp	r1, #0
+	bne	.L1788
+	ldr	r0, [r10]
+	ldrh	lr, [r0, r5, lsl #1]
+	cmp	lr, #0
+	beq	.L1789
+	ldr	r1, .L1834+84
+	ldrh	ip, [r1]
+	add	r1, lr, ip
+.L1832:
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r2]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
+	movs	r1, #0
+	bl	ftl_set_blk_mode
+	ldm	sp, {r2, r3}
+.L1791:
+	lsls	r1, r5, #1
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	str	r1, [sp]
+	ldr	r1, [r10]
+	ldrh	ip, [r1, r5, lsl #1]
+	ldr	r1, .L1834+88
+	ldr	r0, [r1]
+	cmp	ip, r0
+	it	hi
+	strhi	ip, [r1]
+	ldr	r1, .L1834+84
+	ldrh	r0, [r1]
+	ldr	r1, .L1834+12
+	mla	r0, r2, r0, r3
+	ldrh	r1, [r1]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1834+92
+	ldr	ip, .L1834+108
+	str	r0, [r3]
+	ldr	r3, .L1834+96
+	ldr	r0, [fp]
+	ldr	r2, [r3]
+	adds	r1, r0, #4
+	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
-	beq	.L1897
-	.loc 5 329 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
-	movw	r3, #61649
-	cmp	r2, r3
-	beq	.L1898
-.L1897:
-	subs	r7, r7, #1
-.LVL2101:
-	sxth	r7, r7
-.LVL2102:
-	b	.L1896
-.LVL2103:
-.L1903:
-	.loc 5 351 0 is_stmt 1 discriminator 3
-	ldrh	r2, [r8]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r6, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r5, r2, r1
-	.loc 5 350 0 discriminator 3
-	adds	r5, r5, #1
-.LVL2104:
-	.loc 5 351 0 discriminator 3
-	bl	ftl_memcpy
-.LVL2105:
-	b	.L1902
-.LVL2106:
-.L1904:
-	.loc 5 300 0
-	mov	r0, #-1
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL2107:
-.L1916:
+	str	r3, [r2, #16]
+	movs	r3, #36
+	mla	r3, r3, r6, r0
+	adds	r3, r3, #40
+.L1793:
+	adds	r1, r1, #36
+	cmp	r3, r1
+	bne	.L1794
+	ldr	r3, .L1834+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1795
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	cmp	r3, #1
+	ite	eq
+	moveq	r1, #0
+	movne	r1, #1
+	bl	FlashEraseBlocks
+.L1795:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	ldr	r0, [fp]
+	mov	r10, #0
+	bl	FlashEraseBlocks
+	mov	r3, r10
+	movs	r1, #36
+.L1797:
+	uxth	r2, r10
+	cmp	r6, r2
+	bhi	.L1799
+	cbz	r3, .L1800
+	mov	r0, r8
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1800:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r1, .L1834+60
+	cmp	r2, #0
+	bne	.L1801
+	ldr	r3, [r1]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1772
+.L1835:
 	.align	2
-.L1915:
-	.word	.LANCHOR199
-	.word	.LANCHOR50
-	.word	.LANCHOR185
-	.word	.LANCHOR74
-	.word	.LANCHOR208
+.L1834:
+	.word	.LANCHOR77
+	.word	.LANCHOR89
+	.word	.LANCHOR86
+	.word	.LANCHOR40
+	.word	.LANCHOR203
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR36
-	.word	.LANCHOR40
-	.word	.LANCHOR74+24
+	.word	.LANCHOR94
+	.word	.LANCHOR172
 	.word	.LANCHOR44
-	.word	.LANCHOR180
-	.word	.LANCHOR120
-	.cfi_endproc
-.LFE323:
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.word	.LANCHOR8
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.word	.LANCHOR88
+	.word	.LANCHOR84
+	.word	.LANCHOR38
+	.word	.LANCHOR92
+	.word	.LANCHOR204
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR48
+	.word	.LANCHOR169
+	.word	.LANCHOR205
+	.word	.LANCHOR191
+	.word	.LANCHOR78
+	.word	.LANCHOR79
+	.word	-1024
+.L1784:
+	ldrh	r1, [ip], #2
+	str	lr, [r3, #8]
+	str	lr, [r3, #12]
+	cmp	r1, r10
+	beq	.L1783
+	ldr	r2, [sp, #4]
+	lsls	r1, r1, #10
+	mla	r2, r2, r6, r0
+	adds	r6, r6, #1
+	uxth	r6, r6
+	str	r1, [r2, #4]
+.L1783:
+	adds	r3, r3, #36
+	b	.L1782
+.L1789:
+	movs	r1, #2
+	b	.L1832
+.L1788:
+	ldr	r0, [r10]
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	ldrh	r1, [r0, r5, lsl #1]
+	adds	r1, r1, #1
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r3]
+	adds	r1, r1, #1
+	str	r1, [r3]
+	bl	ftl_set_blk_mode.part.10
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
+	b	.L1791
+.L1794:
+	ldr	r2, [r1, #-36]
+	and	r2, r2, ip
+	str	r2, [r1, #-36]
+	b	.L1793
+.L1799:
+	ldr	r0, .L1836
+	mul	r2, r1, r10
+	ldr	r0, [r0]
+	add	ip, r0, r2
+	ldr	r2, [r0, r2]
+	adds	r0, r2, #1
+	bne	.L1798
+	ldr	r0, [ip, #4]
+	adds	r3, r3, #1
+	str	r1, [sp, #12]
+	str	r2, [sp, #8]
+	ubfx	r0, r0, #10, #16
+	str	r3, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	ldr	r2, [sp, #8]
+	add	r0, r4, r10, lsl #1
+	ldr	r1, [sp, #12]
+	ldr	r3, [sp, #4]
+	strh	r2, [r0, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L1798:
+	add	r10, r10, #1
+	b	.L1797
+.L1801:
+	ldr	r3, .L1836+4
+	ldr	r0, .L1836+8
+	ldrh	r3, [r3]
+	strh	r8, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r0]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r0]
+	ldr	r2, [r1]
+	ldr	r1, [sp]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1802
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1773
+.L1802:
+	ldr	r1, .L1836+12
+	movw	r2, #3281
+	ldr	r0, .L1836+16
+	bl	printf
+	ldr	r1, .L1836+20
+	ldr	r0, .L1836+24
+	bl	printf
+.L1773:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1837:
+	.align	2
+.L1836:
+	.word	.LANCHOR78
+	.word	.LANCHOR53
+	.word	.LANCHOR159
+	.word	.LANCHOR203
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_gc
+	.global	FtlGcFreeBadSuperBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-.LFB348:
-	.loc 1 632 0
-	.cfi_startproc
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2108:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 632 0
-	mov	r4, r0
-	.loc 1 637 0
-	ldr	r5, [r0, #12]
-.LVL2109:
-	.loc 1 638 0
-	ldr	fp, [r0, #24]
-.LVL2110:
-	.loc 1 641 0
-	bl	ftl_free_no_use_map_blk
-.LVL2111:
-	.loc 1 643 0
-	ldrh	ip, [r4, #10]
-	ldrh	r2, [r4, #8]
-	ldrh	r1, [r4, #40]
-	sub	r3, ip, #4
-	ldr	r6, .L1937
-	cmp	r2, r3
-	bge	.L1918
-	.loc 1 644 0
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L1920
-	.loc 1 644 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
-	cmp	r2, r3
-	bcc	.L1921
-.L1918:
-	.loc 1 645 0 is_stmt 1
-	movw	r3, #65535
-	.loc 1 641 0
-	uxth	r0, r0
-	.loc 1 645 0
-	cmp	r1, r3
-	beq	.L1922
-	.loc 1 645 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #2]
-	ldrh	r2, [r6]
-	cmp	r2, r3
-	bls	.L1923
-.LVL2112:
-.L1922:
-	.loc 1 655 0 is_stmt 1
-	ldrh	r10, [r5, r0, lsl #1]
-.LVL2113:
-	lsls	r2, r0, #1
-	.loc 1 656 0
-	cmp	r10, #0
-	beq	.L1920
-	.loc 1 656 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #32]
-	cbnz	r3, .L1920
-	.loc 1 657 0 is_stmt 1
-	movs	r1, #1
-	str	r1, [r4, #32]
-	.loc 1 658 0
-	strh	r3, [r5, r2]	@ movhi
-	.loc 1 659 0
-	ldrh	r3, [r4, #8]
-	.loc 1 660 0
-	ldrh	r2, [r4, #2]
-	.loc 1 659 0
-	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	.loc 1 660 0
-	ldrh	r3, [r6]
-	cmp	r2, r3
-	bcc	.L1928
-	.loc 1 661 0
-	mov	r0, r4
-.LVL2114:
-	bl	ftl_map_blk_alloc_new_blk
-.LVL2115:
-.L1928:
-	.loc 1 665 0 discriminator 1
-	ldr	r5, .L1937+4
-.LVL2116:
-	.loc 1 653 0 discriminator 1
+	mov	r10, r0
+	ldr	r4, .L1850
+	ldrh	r3, [r4]
+	cbz	r3, .L1839
+	ldr	r8, .L1850+12
 	movs	r7, #0
-.L1929:
-	.loc 1 663 0 discriminator 1
-	ldrh	r2, [r4, #6]
+.L1840:
+	ldr	r3, .L1850+4
+	ldrh	r2, [r3]
 	uxth	r3, r7
-.LVL2117:
-	cmp	r2, r3
-	bhi	.L1933
-	.loc 1 681 0
-	movs	r1, #1
-	mov	r0, r10
-	bl	FtlFreeSysBlkQueueIn
-.LVL2118:
-	.loc 1 682 0
-	movs	r3, #0
-	str	r3, [r4, #32]
-.LVL2119:
-.L1920:
-	.loc 1 686 0
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r6]
 	cmp	r2, r3
-	bcc	.L1921
-	.loc 1 687 0
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.LVL2120:
-.L1921:
-	.loc 1 689 0
+	bhi	.L1846
+	bl	FtlGcReFreshBadBlk
+.L1839:
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2121:
-.L1926:
-	.cfi_restore_state
-	.loc 1 647 0
-	ldrh	r8, [r5, r2, lsl #1]
-	add	lr, r2, #1
-	cmp	r8, r1
-	beq	.L1924
-	mov	r2, lr
-.LVL2122:
-.L1925:
-	uxth	r7, r2
-.LVL2123:
-	.loc 1 646 0 discriminator 1
-	cmp	r7, ip
-	bcc	.L1926
-	.loc 1 641 0
-	mov	r7, r0
-.LVL2124:
-.L1924:
-	.loc 1 652 0
-	uxth	r2, r2
-	ldr	r0, .L1937+8
-	ldrh	r2, [r5, r2, lsl #1]
-.LVL2125:
-	bl	printf
-.LVL2126:
-	.loc 1 653 0
-	movw	r3, #65535
-	mov	r0, r7
-	strh	r3, [r4, #40]	@ movhi
-	b	.L1922
-.LVL2127:
-.L1923:
-	movs	r2, #0
-	b	.L1925
-.LVL2128:
-.L1933:
-	uxth	r8, r7
-	.loc 1 664 0
-	ldr	r2, [fp, r8, lsl #2]
-	cmp	r10, r2, lsr #10
-	bne	.L1930
-	str	r3, [sp, #4]
-	.loc 1 665 0
-	ldr	r3, .L1937+12
-.LVL2129:
-	.loc 1 669 0
-	ldr	r0, .L1937+4
-	.loc 1 665 0
-	ldr	r2, [r3]
-	str	r2, [r5, #8]
-	.loc 1 666 0
-	ldr	r2, .L1937+16
-	ldr	r3, [r2]
-	str	r3, [r5, #12]
-	.loc 1 667 0
-	ldr	r2, [fp, r8, lsl #2]
-	.loc 1 666 0
-	str	r3, [sp]
-	.loc 1 667 0
-	str	r2, [r5, #4]
-.LVL2130:
-	.loc 1 669 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL2131:
-	.loc 1 671 0
-	ldr	r3, [sp]
-	ldrh	r2, [r3, #8]
-	ldr	r3, [sp, #4]
-	cmp	r2, r3
-	beq	.L1931
-	.loc 1 671 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1937+20
-	movw	r2, #671
-	ldr	r0, .L1937+24
-	bl	printf
-.LVL2132:
-	ldr	r1, .L1937+28
-	ldr	r0, .L1937+32
-	bl	printf
-.LVL2133:
-.L1931:
-	.loc 1 672 0 is_stmt 1
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	bne	.L1932
-	.loc 1 673 0
-	movs	r3, #0
-	.loc 1 674 0
-	ldr	r0, .L1937+36
-	.loc 1 673 0
-	str	r3, [fp, r8, lsl #2]
-	.loc 1 674 0
-	ldr	r3, [sp]
-	ldr	r1, [r5, #4]
-	ldrh	r2, [r3, #8]
-	bl	printf
-.LVL2134:
-	.loc 1 675 0
-	ldr	r3, .L1937+40
-	movs	r2, #1
-	str	r2, [r3]
-.LVL2135:
-.L1930:
+.L1846:
+	ldr	r2, .L1850+8
+	uxth	r3, r7
+	mov	r1, r10
+	mov	fp, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r1, r0
+.L1841:
+	ldrh	r3, [r4]
+	uxth	r5, fp
+	cmp	r3, r5
+	bhi	.L1845
 	adds	r7, r7, #1
-.LVL2136:
-	b	.L1929
-.LVL2137:
-.L1932:
-	.loc 1 677 0
-	ldr	r2, [r5, #8]
-	mov	r1, r8
-	mov	r0, r4
-	bl	FtlMapWritePage
-.LVL2138:
-	b	.L1930
-.L1938:
+	b	.L1840
+.L1845:
+	uxth	r6, fp
+	ldrh	r3, [r8, r6, lsl #1]
+	cmp	r3, r1
+	bne	.L1842
+	mov	r0, r1
+	str	r1, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r4]
+	add	r3, r8, r6, lsl #1
+	ldr	r1, [sp, #4]
+.L1843:
+	cmp	r5, r2
+	bcc	.L1844
+	subs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+.L1842:
+	add	fp, fp, #1
+	b	.L1841
+.L1844:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1843
+.L1851:
 	.align	2
-.L1937:
-	.word	.LANCHOR53
-	.word	.LANCHOR199
-	.word	.LC36
-	.word	.LANCHOR181
-	.word	.LANCHOR185
-	.word	.LANCHOR209
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC37
-	.word	.LANCHOR76
-	.cfi_endproc
-.LFE348:
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+.L1850:
+	.word	.LANCHOR117
+	.word	.LANCHOR38
+	.word	.LANCHOR47
+	.word	.LANCHOR118
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	update_vpc_list
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-.LFB349:
-	.loc 1 692 0
-	.cfi_startproc
+	.type	update_vpc_list, %function
+update_vpc_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2139:
-	.loc 1 700 0
-	ldr	r3, .L1949
-	.loc 1 692 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 692 0
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	.loc 1 700 0
-	ldr	r5, [r3]
-	cbnz	r5, .L1940
-	.loc 1 702 0
-	ldrh	r3, [r0]
-	movw	r2, #65535
-	.loc 1 695 0
-	ldr	r6, [r0, #12]
-	.loc 1 702 0
+	ldr	r3, .L1862
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1853
+	ldr	r2, .L1862+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L1854
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L1855:
+	ldr	r5, .L1862+8
+	mov	r1, r4
+	ldr	r0, .L1862+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L1857
+	ldr	r1, .L1862+16
+	mov	r2, #3392
+	ldr	r0, .L1862+20
+	bl	printf
+	ldr	r1, .L1862+24
+	ldr	r0, .L1862+28
+	bl	printf
+.L1857:
+	ldrh	r3, [r5]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1862+32
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1862+36
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bne	.L1941
-	.loc 1 703 0
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L1942
-	.loc 1 703 0 is_stmt 0 discriminator 1
-	ldr	r1, .L1949+4
-	movw	r2, #703
-	ldr	r0, .L1949+8
-.LVL2140:
+	ble	.L1861
+	ldr	r1, .L1862+16
+	movw	r2, #3395
+	ldr	r0, .L1862+20
 	bl	printf
-.LVL2141:
-	ldr	r1, .L1949+12
-	ldr	r0, .L1949+16
+	ldr	r1, .L1862+24
+	ldr	r0, .L1862+28
 	bl	printf
-.LVL2142:
-.L1942:
-	.loc 1 704 0 is_stmt 1
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	.loc 1 705 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL2143:
-	.loc 1 706 0
-	movs	r3, #0
-	.loc 1 705 0
-	strh	r0, [r6]	@ movhi
-	.loc 1 706 0
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 707 0
-	strh	r3, [r4]	@ movhi
-	.loc 1 708 0
-	ldr	r3, [r4, #28]
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-.L1940:
-	.loc 1 739 0
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2144:
-.L1941:
-	.loc 1 712 0
-	ldrh	r7, [r6, r3, lsl #1]
-	.loc 1 723 0
-	movs	r1, #255
-	.loc 1 713 0
-	ldrh	r3, [r0, #2]
-	ldr	r2, .L1949+20
-	.loc 1 714 0
-	ldr	r6, .L1949+24
-	.loc 1 696 0
-	ldr	r8, [r0, #24]
-	.loc 1 713 0
-	orr	r3, r3, r7, lsl #10
-	str	r3, [r2, #4]
-	.loc 1 714 0
-	ldr	r3, [r6]
-	str	r3, [r2, #8]
-	.loc 1 715 0
-	ldr	r3, .L1949+28
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-.LVL2145:
-	.loc 1 718 0
-	ldr	r2, [r0, #28]
-	str	r2, [r3, #4]
-.LVL2146:
-	.loc 1 719 0
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	.loc 1 720 0
-	ldrh	r2, [r0, #4]
-	.loc 1 721 0
-	strh	r7, [r3, #2]	@ movhi
-	.loc 1 720 0
-	strh	r2, [r3]	@ movhi
-	.loc 1 723 0
-	ldr	r3, .L1949+32
-.LVL2147:
-	ldr	r0, [r6]
-.LVL2148:
-	ldrh	r2, [r3]
-	lsls	r2, r2, #3
-	bl	ftl_memset
-.LVL2149:
-	.loc 1 725 0
-	mov	r2, r5
-	.loc 1 724 0
-	mov	r3, r5
-.LVL2150:
-.L1943:
-	.loc 1 725 0 discriminator 1
-	ldrh	r0, [r4, #6]
-	uxth	r1, r2
-	cmp	r0, r1
-	bhi	.L1945
-	.loc 1 732 0
-	movs	r2, #1
-.LVL2151:
+.L1861:
+	movs	r3, #1
+	b	.L1852
+.L1854:
+	ldr	r2, .L1862+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1852
+	ldr	r2, .L1862+44
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1852
+	ldr	r2, .L1862+48
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1855
+.L1852:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1853:
+	bl	List_update_data_list
 	movs	r3, #0
-.LVL2152:
-	mov	r1, r2
-.LVL2153:
-	ldr	r0, .L1949+20
-	bl	FlashProgPages
-.LVL2154:
-	.loc 1 733 0
-	ldrh	r3, [r4, #2]
-	.loc 1 737 0
-	mov	r0, r4
-	.loc 1 733 0
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	.loc 1 737 0
-	bl	ftl_map_blk_gc
-.LVL2155:
-	.loc 1 738 0
-	b	.L1940
-.LVL2156:
-.L1945:
-	uxth	r1, r2
-	.loc 1 726 0
-	ldr	r0, [r8, r1, lsl #2]
-	cmp	r7, r0, lsr #10
-	bne	.L1944
-	.loc 1 728 0
-	ldr	r0, [r6]
-	.loc 1 727 0
-	adds	r3, r3, #1
-.LVL2157:
-	uxth	r3, r3
-.LVL2158:
-	.loc 1 728 0
-	str	r1, [r0, r3, lsl #3]
-	.loc 1 729 0
-	ldr	r0, [r8, r1, lsl #2]
-	ldr	r1, [r6]
-	add	r1, r1, r3, lsl #3
-	str	r0, [r1, #4]
-.L1944:
-.LVL2159:
-	adds	r2, r2, #1
-.LVL2160:
-	b	.L1943
-.L1950:
+	b	.L1852
+.L1863:
 	.align	2
-.L1949:
-	.word	.LANCHOR76
-	.word	.LANCHOR210
+.L1862:
+	.word	.LANCHOR84
+	.word	.LANCHOR204
+	.word	.LANCHOR86
+	.word	.LANCHOR83
+	.word	.LANCHOR206
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR199
-	.word	.LANCHOR180
-	.word	.LANCHOR185
-	.word	.LANCHOR53
-	.cfi_endproc
-.LFE349:
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
+	.word	.LANCHOR89
+	.word	.LANCHOR40
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	FtlMapWritePage
+	.global	decrement_vpc_count
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-.LFB350:
-	.loc 1 742 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2161:
-	.loc 1 747 0
-	ldr	r3, .L1974
-	.loc 1 742 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 742 0
-	mov	r4, r0
-	mov	r8, r1
-	str	r2, [sp]
-	.loc 1 747 0
-	ldr	r5, [r3]
-	str	r3, [sp, #4]
-	cmp	r5, #0
-	bne	.L1969
-.LBB466:
-.LBB467:
-	.loc 1 752 0
-	ldr	r10, .L1974+36
-.LVL2162:
-.L1953:
-	.loc 1 751 0
-	ldr	r2, .L1974+4
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	.loc 1 752 0
-	ldrh	r3, [r10]
-	ldrh	r2, [r4, #2]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	bge	.L1954
-	ldrh	r2, [r4]
 	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1955
-.L1954:
-	.loc 1 753 0
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.LVL2163:
-.L1955:
-	.loc 1 764 0
-	ldrh	r2, [r4]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1956
-	ldr	r1, .L1974+8
-	mov	r2, #764
-	ldr	r0, .L1974+12
+	push	{r4, r5, r6, lr}
+	cmp	r0, r3
+	mov	r4, r0
+	beq	.L1865
+	ldr	r5, .L1876
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cmp	r2, #0
+	bne	.L1866
+	mov	r1, r0
+	ldr	r0, .L1876+4
 	bl	printf
-.LVL2164:
-	ldr	r1, .L1974+16
-	ldr	r0, .L1974+20
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L1867
+	ldr	r1, .L1876+8
+	movw	r2, #3410
+	ldr	r0, .L1876+12
 	bl	printf
-.LVL2165:
-.L1956:
-	.loc 1 765 0
-	ldrh	r2, [r4]
-	ldrh	r3, [r4, #10]
-	cmp	r2, r3
-	bcc	.L1957
-	ldr	r1, .L1974+8
-	movw	r2, #765
-	ldr	r0, .L1974+12
+	ldr	r1, .L1876+16
+	ldr	r0, .L1876+20
 	bl	printf
-.LVL2166:
-	ldr	r1, .L1974+16
-	ldr	r0, .L1974+20
+.L1867:
+	ldr	r3, [r5]
+	movs	r2, #32
+	mov	r1, r4
+	ldr	r0, .L1876+24
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	test_node_in_list
+	cbz	r0, .L1868
+	ldr	r6, .L1876+28
+	mov	r1, r4
+	ldr	r0, .L1876+24
+	bl	List_remove_node
+	ldrh	r3, [r6]
+	cbnz	r3, .L1869
+	ldr	r1, .L1876+8
+	movw	r2, #3414
+	ldr	r0, .L1876+12
 	bl	printf
-.LVL2167:
-.L1957:
-	.loc 1 766 0
-	ldrh	r2, [r4]
-	.loc 1 772 0
-	movs	r1, #0
-	.loc 1 766 0
-	ldr	r3, [r4, #12]
-	.loc 1 768 0
-	ldr	r6, .L1974+24
-	.loc 1 766 0
-	ldrh	r7, [r3, r2, lsl #1]
-.LVL2168:
-	.loc 1 772 0
-	movs	r2, #16
-	.loc 1 768 0
-	ldrh	r3, [r4, #2]
-	mov	fp, r6
-	orr	r3, r3, r7, lsl #10
-	str	r3, [r6, #4]
-	.loc 1 769 0
-	ldr	r3, [sp]
-	str	r3, [r6, #8]
-	.loc 1 770 0
-	ldr	r3, .L1974+28
-	ldr	r0, [r3]
-	str	r0, [r6, #12]
-	.loc 1 772 0
-	bl	ftl_memset
-.LVL2169:
-	.loc 1 773 0
-	ldr	r3, [r6, #12]
-.LVL2170:
-	.loc 1 778 0
-	mov	r0, r6
-	.loc 1 774 0
-	ldr	r2, [r4, #28]
-	.loc 1 775 0
-	strh	r8, [r3, #8]	@ movhi
-	.loc 1 774 0
-	str	r2, [r3, #4]
-	.loc 1 776 0
-	ldrh	r2, [r4, #4]
-	.loc 1 777 0
-	strh	r7, [r3, #2]	@ movhi
-	.loc 1 776 0
-	strh	r2, [r3]	@ movhi
-	.loc 1 778 0
-	movs	r3, #1
-.LVL2171:
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL2172:
-	.loc 1 779 0
-	ldrh	r2, [r4, #2]
-	adds	r2, r2, #1
-	uxth	r2, r2
-	strh	r2, [r4, #2]	@ movhi
-	.loc 1 781 0
-	ldr	r1, [r6]
-	adds	r3, r1, #1
-	bne	.L1958
-	.loc 1 782 0
-	ldr	r1, [r6, #4]
-	.loc 1 783 0
-	adds	r5, r5, #1
-.LVL2173:
-	.loc 1 782 0
-	ldr	r0, .L1974+32
-	.loc 1 783 0
-	uxth	r5, r5
-	.loc 1 782 0
+	ldr	r1, .L1876+16
+	ldr	r0, .L1876+20
 	bl	printf
-.LVL2174:
-	.loc 1 784 0
-	ldrh	r2, [r4, #2]
-	cmp	r2, #2
-	.loc 1 785 0
-	itttt	ls
-	ldrls	r3, .L1974+36
-	ldrhls	r2, [r3]
-	addls	r2, r2, #-1
-	strhls	r2, [r4, #2]	@ movhi
-	.loc 1 787 0
-	cmp	r5, #3
-	bls	.L1953
-	.loc 1 788 0
-	mov	r2, r5
-	ldr	r1, [r6, #4]
-	ldr	r0, .L1974+40
+.L1869:
+	ldrh	r3, [r6]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r6]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, [r5]
+	mov	r1, r4
+	ldr	r0, .L1876+32
+	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
-.LVL2175:
-	.loc 1 790 0
-	ldr	r2, [sp, #4]
-	movs	r3, #1
-	str	r3, [r2]
-.LVL2176:
-.L1969:
-.LBE467:
-.LBE466:
-	.loc 1 811 0
-	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL2177:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2178:
-.L1958:
-	.cfi_restore_state
-.LBB469:
-.LBB468:
-	.loc 1 803 0
-	cbz	r1, .L1961
-	.loc 1 806 0
-	cmp	r2, #1
-	.loc 1 804 0
-	strh	r7, [r4, #40]	@ movhi
-	.loc 1 806 0
-	beq	.L1953
-	cmp	r1, #256
-.L1973:
-	beq	.L1953
-	.loc 1 809 0
-	ldr	r2, [fp, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r8, lsl #2]
-	b	.L1969
-.L1961:
-	.loc 1 806 0
-	cmp	r2, #1
-	b	.L1973
-.L1975:
+.L1868:
+	mov	r0, r4
+	bl	FtlGcRefreshBlock
+.L1872:
+	movs	r5, #0
+	b	.L1864
+.L1866:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1865:
+	ldr	r6, .L1876+36
+	movw	r3, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L1871
+	strh	r4, [r6]	@ movhi
+	b	.L1872
+.L1871:
+	cmp	r4, r0
+	beq	.L1872
+	bl	update_vpc_list
+	ldr	r3, .L1876+40
+	adds	r5, r0, #0
+	ldr	r2, .L1876+44
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1876+48
+	muls	r3, r2, r3
+	ldr	r2, .L1876
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cbnz	r2, .L1864
+	cmp	r4, r1
+	beq	.L1864
+	ldr	r1, .L1876+8
+	movw	r2, #3435
+	ldr	r0, .L1876+12
+	bl	printf
+	ldr	r1, .L1876+16
+	ldr	r0, .L1876+20
+	bl	printf
+.L1864:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1877:
 	.align	2
-.L1974:
-	.word	.LANCHOR76
-	.word	.LANCHOR162
-	.word	.LANCHOR211
+.L1876:
+	.word	.LANCHOR84
+	.word	.LC36
+	.word	.LANCHOR207
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LC38
-	.word	.LANCHOR53
-	.word	.LC39
-.LBE468:
-.LBE469:
-	.cfi_endproc
-.LFE350:
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.flush_l2p_region,"ax",%progbits
-	.align	1
-	.global	flush_l2p_region
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-.LFB351:
-	.loc 1 814 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2179:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 817 0
-	movs	r4, #12
-	ldr	r5, .L1977
-	muls	r4, r0, r4
-	.loc 1 818 0
-	ldr	r0, .L1977+4
-.LVL2180:
-	.loc 1 817 0
-	ldr	r3, [r5]
-	adds	r2, r3, r4
-.LVL2181:
-	.loc 1 818 0
-	ldrh	r1, [r3, r4]
-.LVL2182:
-	ldr	r2, [r2, #8]
-	bl	FtlMapWritePage
-.LVL2183:
-	.loc 1 819 0
-	ldr	r3, [r5]
-	.loc 1 821 0
-	movs	r0, #0
-	.loc 1 819 0
-	add	r4, r4, r3
-	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-	.loc 1 821 0
-	pop	{r3, r4, r5, pc}
-.L1978:
-	.align	2
-.L1977:
-	.word	.LANCHOR96
-	.word	.LANCHOR124
-	.cfi_endproc
-.LFE351:
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.l2p_flush,"ax",%progbits
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LC37
+	.word	.LANCHOR133
+	.word	.LANCHOR83
+	.word	.LANCHOR82
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
-	.global	l2p_flush
+	.global	FtlSlcSuperblockCheck
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	l2p_flush, %function
-l2p_flush:
-.LFB353:
-	.loc 1 864 0
-	.cfi_startproc
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2184:
+	ldrh	r3, [r0, #4]
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 871 0
-	movs	r4, #0
-	ldr	r5, .L1983
-	.loc 1 872 0
-	ldr	r6, .L1983+4
-.LVL2185:
-.L1980:
-	.loc 1 871 0 discriminator 1
-	ldrh	r3, [r5]
-	uxth	r0, r4
-.LVL2186:
-	cmp	r3, r0
-	bhi	.L1982
-	.loc 1 875 0
-	movs	r0, #0
-.LVL2187:
-	pop	{r4, r5, r6, pc}
-.LVL2188:
-.L1982:
-	.loc 1 872 0
-	ldr	r2, [r6]
-	uxth	r3, r4
-	movs	r1, #12
-	mla	r3, r1, r3, r2
-	ldr	r3, [r3, #4]
+	mov	r4, r0
 	cmp	r3, #0
-	bge	.L1981
-	.loc 1 873 0
-	bl	flush_l2p_region
-.LVL2189:
-.L1981:
-	adds	r4, r4, #1
-.LVL2190:
-	b	.L1980
-.L1984:
+	beq	.L1878
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1878
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r5, .L1889
+	ldr	r6, .L1889+4
+	adds	r3, r3, #8
+	ldrh	r3, [r0, r3, lsl #1]
+.L1882:
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L1884
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1885
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	cbnz	r1, .L1885
+	ldrh	r1, [r4, #2]
+	ldrh	r1, [r6, r1, lsl #1]
+	cmp	r1, r2
+	bne	.L1885
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	ldrh	r2, [r4, #4]
+	cbnz	r2, .L1884
+	ldrh	r3, [r4, #2]
+	strb	r2, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1884:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r2, .L1889+8
+	adds	r3, r3, #1
+	ldrh	r2, [r2]
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1883
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1883:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1882
+.L1885:
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cbz	r2, .L1878
+	cmp	r3, #1
+	bne	.L1878
+	ldr	r3, .L1889+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1878
+	ldr	r3, .L1889+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldr	r2, .L1889+20
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r2, [r2]
+	strh	r2, [r4, #2]	@ movhi
+.L1878:
+	pop	{r4, r5, r6, pc}
+.L1890:
 	.align	2
-.L1983:
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.cfi_endproc
-.LFE353:
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.log2phys,"ax",%progbits
+.L1889:
+	.word	.LANCHOR8
+	.word	.LANCHOR120
+	.word	.LANCHOR38
+	.word	.LANCHOR54
+	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	get_new_active_ppa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-.LFB354:
-	.loc 1 878 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2191:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 881 0
-	ldr	r3, .L2003
-	.loc 1 878 0
-	str	r1, [sp, #4]
-	.loc 1 881 0
-	ldrh	r6, [r3]
-	.loc 1 878 0
-	str	r2, [sp, #12]
-	.loc 1 881 0
-	adds	r3, r6, #7
-	.loc 1 882 0
-	movs	r6, #1
-	.loc 1 881 0
-	lsr	fp, r0, r3
-	.loc 1 882 0
-	lsls	r6, r6, r3
-	.loc 1 884 0
-	ldr	r3, .L2003+4
-	.loc 1 882 0
-	subs	r6, r6, #1
-	.loc 1 881 0
-	uxth	r8, fp
-.LVL2192:
-	.loc 1 882 0
-	ands	r6, r6, r0
-	.loc 1 884 0
-	ldr	r3, [r3]
-	.loc 1 882 0
-	uxth	r6, r6
-.LVL2193:
-	.loc 1 884 0
-	cmp	r0, r3
-	bcc	.L1986
-	.loc 1 884 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2003+8
-.LVL2194:
-	mov	r2, #884
-.LVL2195:
-	ldr	r0, .L2003+12
-.LVL2196:
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	cmp	r2, r3
+	bne	.L1892
+	ldr	r1, .L1913
+	movw	r2, #3332
+	ldr	r0, .L1913+4
 	bl	printf
-.LVL2197:
-	ldr	r1, .L2003+16
-	ldr	r0, .L2003+20
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
 	bl	printf
-.LVL2198:
-.L1986:
-	.loc 1 887 0 is_stmt 1
-	ldr	r5, .L2003+24
-	movs	r4, #12
-	.loc 1 886 0
-	ldr	r3, .L2003+28
-	.loc 1 887 0
-	ldr	r1, [r5]
-	.loc 1 886 0
-	ldrh	r2, [r3]
-	movs	r3, #0
-.LVL2199:
-.L1987:
-	uxth	r10, r3
-.LVL2200:
-	.loc 1 886 0 is_stmt 0 discriminator 1
-	cmp	r10, r2
-	bcc	.L1992
-	.loc 1 901 0 is_stmt 1
-	bl	select_l2p_ram_region
-.LVL2201:
-	.loc 1 902 0
-	muls	r4, r0, r4
-	ldr	r3, [r5]
-	.loc 1 901 0
-	mov	r10, r0
-.LVL2202:
-	.loc 1 902 0
-	ldrh	r1, [r3, r4]
-	adds	r2, r3, r4
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L1993
-	.loc 1 902 0 is_stmt 0 discriminator 1
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L1993
-	.loc 1 903 0 is_stmt 1
-	bl	flush_l2p_region
-.LVL2203:
-.L1993:
-.LBB472:
-.LBB473:
-	.loc 1 526 0
-	ldr	r3, .L2003+32
-	ldrh	r3, [r3]
-	cmp	r3, r8
-	bcs	.L1994
-	ldr	r1, .L2003+36
-	movw	r2, #526
-	ldr	r0, .L2003+12
+.L1892:
+	ldr	r5, .L1913+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1893
+	ldr	r1, .L1913
+	movw	r2, #3333
+	ldr	r0, .L1913+4
 	bl	printf
-.LVL2204:
-	ldr	r1, .L2003+16
-	ldr	r0, .L2003+20
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
 	bl	printf
-.LVL2205:
-.L1994:
-	.loc 1 527 0
-	ldr	r3, .L2003+40
-	uxth	fp, fp
-	ldr	r3, [r3]
-	ldr	r7, [r3, fp, lsl #2]
-.LVL2206:
-	.loc 1 529 0
-	cmp	r7, #0
-	bne	.L1995
-	.loc 1 530 0
-	ldr	r3, [r5]
-	movs	r1, #255
-	ldr	r2, .L2003+44
-	add	r3, r3, r4
-	ldr	r0, [r3, #8]
-	ldrh	r2, [r2]
-	bl	ftl_memset
-.LVL2207:
-	.loc 1 531 0
-	ldr	r3, [r5]
-	strh	r8, [r3, r4]	@ movhi
-	.loc 1 532 0
-	ldr	r3, [r5]
-	add	r4, r4, r3
-	str	r7, [r4, #4]
-	b	.L1988
-.LVL2208:
-.L1992:
-	adds	r3, r3, #1
-.LBE473:
-.LBE472:
-	.loc 1 887 0
-	mla	r0, r4, r3, r1
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r8
-	bne	.L1987
-.LVL2209:
-.L1988:
-	.loc 1 889 0
-	ldr	r2, [sp, #12]
-	movs	r3, #12
-	ldr	r1, .L2003+24
-	cbnz	r2, .L1989
-	.loc 1 890 0
-	ldr	r2, [r1]
-	mla	r3, r3, r10, r2
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r6, lsl #2]
-	str	r3, [r2]
-.L1990:
-	.loc 1 896 0
-	ldr	r2, [r1]
-	movs	r3, #12
-	mla	r10, r3, r10, r2
-.LVL2210:
-	ldr	r3, [r10, #4]
-	adds	r2, r3, #1
-	beq	.L2000
-	.loc 1 897 0
-	adds	r3, r3, #1
-	str	r3, [r10, #4]
-.L2000:
-	.loc 1 908 0
-	movs	r0, #0
-	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2211:
-.L1989:
-	.cfi_restore_state
-	.loc 1 892 0
-	ldr	r2, [sp, #4]
-	mul	r3, r3, r10
-	ldr	r0, [r2]
-	ldr	r2, [r5]
-	add	r2, r2, r3
-	ldr	r2, [r2, #8]
-	str	r0, [r2, r6, lsl #2]
-	.loc 1 893 0
-	ldr	r2, [r5]
-	add	r3, r3, r2
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	.loc 1 894 0
-	ldr	r3, .L2003+48
-	strh	r8, [r3]	@ movhi
-	b	.L1990
-.LVL2212:
-.L1995:
-.LBB475:
-.LBB474:
-	.loc 1 536 0
-	ldr	r2, [r5]
-	.loc 1 535 0
-	ldr	r3, .L2003+52
-	.loc 1 536 0
-	add	r2, r2, r4
-	ldr	r2, [r2, #8]
-	.loc 1 538 0
-	mov	r0, r3
-	.loc 1 535 0
-	str	r7, [r3, #4]
-	.loc 1 538 0
-	str	r3, [sp, #8]
-	.loc 1 536 0
-	str	r2, [r3, #8]
-	.loc 1 537 0
-	ldr	r2, .L2003+56
-	ldr	r2, [r2]
-	str	r2, [r3, #12]
-	.loc 1 538 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL2213:
-	.loc 1 539 0
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3, #12]
-	.loc 1 540 0
-	ldr	r3, [r3]
-	.loc 1 539 0
-	str	r2, [sp, #8]
-.LVL2214:
-	.loc 1 540 0
-	cmp	r3, #256
-	bne	.L1996
-	.loc 1 541 0
-	mov	r2, r7
-.LVL2215:
-	mov	r1, fp
-	ldr	r0, .L2003+60
-	.loc 1 542 0
-	lsrs	r7, r7, #10
-.LVL2216:
-	.loc 1 541 0
-	bl	printf
-.LVL2217:
-	.loc 1 543 0
-	ldr	r3, [r5]
-	mov	r1, fp
-	.loc 1 542 0
-	ldr	r0, .L2003+64
-	.loc 1 543 0
-	add	r3, r3, r4
-	.loc 1 542 0
-	strh	r7, [r0, #40]	@ movhi
-	.loc 1 543 0
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-.LVL2218:
-.L1996:
-	.loc 1 552 0
-	ldr	r3, [sp, #8]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r8
-	beq	.L1997
-	ldr	r1, .L2003+36
-	mov	r2, #552
-	ldr	r0, .L2003+12
-	bl	printf
-.LVL2219:
-	ldr	r1, .L2003+16
-	ldr	r0, .L2003+20
-	bl	printf
-.LVL2220:
-.L1997:
-	.loc 1 555 0
-	ldr	r3, .L2003+24
-	movs	r1, #0
-	ldr	r3, [r3]
-	adds	r2, r3, r4
-	str	r1, [r2, #4]
-	.loc 1 556 0
-	strh	r8, [r3, r4]	@ movhi
-	b	.L1988
-.L2004:
-	.align	2
-.L2003:
-	.word	.LANCHOR56
-	.word	.LANCHOR72
-	.word	.LANCHOR212
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR96
-	.word	.LANCHOR67
-	.word	.LANCHOR66
-	.word	.LANCHOR213
-	.word	.LANCHOR128
-	.word	.LANCHOR57
-	.word	.LANCHOR97
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LC40
-	.word	.LANCHOR124
-.LBE474:
-.LBE475:
-	.cfi_endproc
-.LFE354:
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
-	.align	1
-	.global	FtlReUsePrevPpa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-.LFB371:
-	.loc 1 1851 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2221:
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 1 1851 0
-	mov	r6, r0
-	.loc 1 1854 0
-	ldr	r5, .L2015
-	.loc 1 1852 0
-	ubfx	r0, r1, #10, #16
-.LVL2222:
-	.loc 1 1851 0
-	str	r1, [sp, #4]
-	.loc 1 1852 0
-	bl	P2V_block_in_plane
-.LVL2223:
-	.loc 1 1854 0
-	ldr	r2, [r5]
-	.loc 1 1852 0
-	mov	r7, r0
-.LVL2224:
-	.loc 1 1854 0
-	ldrh	r3, [r2, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L2006
-	.loc 1 1855 0
-	ldr	r2, .L2015+4
-	ldr	r4, [r2]
-	cmp	r4, #0
-	beq	.L2007
-.LBB476:
-	.loc 1 1859 0
-	ldr	r2, .L2015+8
-	.loc 1 1867 0
-	movw	lr, #65535
-	.loc 1 1859 0
-	ldr	ip, .L2015+32
-	.loc 1 1858 0
-	ldr	r0, .L2015+12
-.LVL2225:
-	.loc 1 1859 0
-	ldr	r2, [r2]
-	.loc 1 1858 0
-	ldrh	r1, [r0]
-.LVL2226:
-	mov	r8, r0
-	.loc 1 1859 0
-	subs	r4, r4, r2
-	asrs	r4, r4, #1
-	mul	r4, ip, r4
-	.loc 1 1867 0
-	mov	ip, #6
-	.loc 1 1859 0
-	uxth	r4, r4
-.LVL2227:
-.L2008:
-	.loc 1 1860 0 discriminator 1
-	uxth	r0, r3
-	cmp	r1, r0
-	bls	.L2007
-	.loc 1 1861 0
-	cmp	r4, r7
-	bne	.L2009
-	.loc 1 1862 0
-	mov	r1, r4
-.LVL2228:
-	ldr	r0, .L2015+4
-	bl	List_remove_node
-.LVL2229:
-	ldrh	r3, [r8]
-	cbnz	r3, .L2010
-	.loc 1 1862 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2015+16
-	movw	r2, #1862
-	ldr	r0, .L2015+20
+.L1893:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1894
+	ldr	r1, .L1913
+	movw	r2, #3334
+	ldr	r0, .L1913+4
 	bl	printf
-.LVL2230:
-	ldr	r1, .L2015+24
-	ldr	r0, .L2015+28
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
 	bl	printf
-.LVL2231:
-.L2010:
-	.loc 1 1862 0 discriminator 3
-	ldrh	r3, [r8]
-	.loc 1 1863 0 is_stmt 1 discriminator 3
-	mov	r0, r4
-	.loc 1 1862 0 discriminator 3
+.L1894:
+	movs	r3, #0
+	ldr	r7, .L1913+20
+	strb	r3, [r4, #10]
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r6, .L1913+24
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+.L1895:
+	movw	r0, #65535
+	cmp	r2, r0
+	beq	.L1896
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldrh	r1, [r4, #2]
+	cmp	r3, #1
+	ldrh	r3, [r4, #4]
+	bne	.L1898
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L1898
+	ldr	ip, .L1913+28
+	ldrh	ip, [ip, r1, lsl #1]
+	cmp	ip, r0
+	bne	.L1898
 	subs	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	.loc 1 1863 0 discriminator 3
-	bl	INSERT_DATA_LIST
-.LVL2232:
-	.loc 1 1864 0 discriminator 3
-	ldr	r2, [r5]
-	ldrh	r3, [r2, r7, lsl #1]
-.LVL2233:
-.L2006:
-.LBE476:
-	.loc 1 1873 0
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+.L1896:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r7]
 	adds	r3, r3, #1
-	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2007
-.LVL2234:
-.L2009:
-.LBB477:
-	.loc 1 1867 0
-	mul	r4, ip, r4
-.LVL2235:
+	uxtb	r3, r3
+	cmp	r2, r3
+	strb	r3, [r4, #6]
+	bne	.L1897
+	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
-.LVL2236:
-	ldrh	r4, [r2, r4]
-	cmp	r4, lr
-	bne	.L2008
-.LVL2237:
-.L2007:
-.LBE477:
-	.loc 1 1875 0
-	movs	r2, #1
-	add	r1, sp, #4
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1897:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+	b	.L1895
+.L1898:
+	ldr	r8, .L1913+24
+	orr	r6, r1, r2, lsl #10
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+.L1899:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movw	r2, #65535
+	ldrh	r0, [r7]
+.L1901:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	add	r1, r3, #8
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r2
+	beq	.L1901
+	strb	r3, [r4, #6]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1902
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	ldrh	r3, [r4, #2]
+	cbnz	r1, .L1903
+	ldr	r1, .L1913+28
+	ldrh	r3, [r1, r3, lsl #1]
+	cmp	r3, r2
+	bne	.L1902
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1902
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1899
+.L1903:
+	ldr	r2, .L1913+32
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bcc	.L1902
+	ldr	r3, .L1913+36
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldrh	r2, [r5]
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	strh	r2, [r4, #2]	@ movhi
+.L1902:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1891
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1891
+	ldr	r1, .L1913
+	movw	r2, #3378
+	ldr	r0, .L1913+4
+	bl	printf
+	ldr	r1, .L1913+8
+	ldr	r0, .L1913+12
+	bl	printf
+.L1891:
 	mov	r0, r6
-	bl	log2phys
-.LVL2238:
-	.loc 1 1876 0
-	add	sp, sp, #8
-	.cfi_def_cfa_offset 24
-	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2239:
-.L2016:
+.L1914:
 	.align	2
-.L2015:
-	.word	.LANCHOR83
-	.word	.LANCHOR87
-	.word	.LANCHOR81
-	.word	.LANCHOR88
-	.word	.LANCHOR214
+.L1913:
+	.word	.LANCHOR208
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	-1431655765
-	.cfi_endproc
-.LFE371:
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.word	.LANCHOR53
+	.word	.LANCHOR38
+	.word	.LANCHOR8
+	.word	.LANCHOR120
+	.word	.LANCHOR54
+	.word	.LANCHOR84
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartWrite
+	.global	FtlVpcTblFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
-.LFB355:
-	.loc 1 911 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2240:
-	.loc 1 918 0
-	ldr	r3, .L2029
-	.loc 1 911 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 911 0
-	str	r2, [sp]
-	.loc 1 918 0
-	adds	r2, r0, r1
-.LVL2241:
-	.loc 1 911 0
-	mov	r7, r0
-	mov	r5, r1
-	.loc 1 918 0
+	ldr	r3, .L1935
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r1, [r3]
+	str	r3, [sp]
+	cmp	r1, #0
+	bne	.L1917
+	ldr	r3, .L1935+4
+	ldr	r7, .L1935+8
+	ldr	r8, .L1935+112
+	ldr	r4, .L1935+12
+	ldr	r6, [r7]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	str	r6, [r4, #12]
+	str	r0, [r4, #8]
+	strh	r2, [r6, #2]	@ movhi
+	movw	r2, #61604
+	ldr	r5, .L1935+16
+	strh	r2, [r6]	@ movhi
+	ldr	r2, [r3, #8]
+	ldrh	r3, [r3, #6]
+	str	r1, [r6, #8]
+	str	r2, [r6, #4]
+	strh	r3, [r5, #8]	@ movhi
+	ldr	r3, .L1935+20
+	ldr	ip, .L1935+116
+	ldr	r2, .L1935+24
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bhi	.L2025
-	.loc 1 916 0
-	ldr	r3, .L2029+4
-	mov	r8, #0
-	ldrh	r6, [r3]
-	lsr	r6, r0, r6
-	lsl	fp, r6, #2
-.LVL2242:
-.L2019:
-	.loc 1 921 0
-	cbnz	r5, .L2024
-.LVL2243:
-.L2017:
-	.loc 1 944 0
-	mov	r0, r8
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL2244:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2245:
-.L2024:
-	.cfi_restore_state
-	.loc 1 922 0
-	ldr	r3, .L2029+8
-	.loc 1 923 0
-	mov	r0, r7
-	ldr	r10, .L2029+24
-	.loc 1 922 0
+	str	r1, [r6, #12]
+	stm	r5, {r2, ip}
+	strb	r3, [r5, #10]
+	ldr	r3, .L1935+28
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #14]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #11]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1935+32
+	strh	r2, [r5, #16]	@ movhi
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #18]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #12]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1935+36
+	strh	r2, [r5, #20]	@ movhi
+	ldrh	r2, [r3]
+	strh	r2, [r5, #22]	@ movhi
+	ldrh	r1, [r3, #2]
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #13]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1935+40
+	movs	r1, #255
+	strh	r2, [r5, #24]	@ movhi
 	ldr	r3, [r3]
-	ldr	r2, [r3, fp]
-	.loc 1 923 0
-	ldr	r3, .L2029+12
-	.loc 1 922 0
-	str	r2, [sp, #12]
-.LVL2246:
-	.loc 1 923 0
+	str	r3, [r5, #32]
+	ldr	r3, .L1935+44
+	ldr	r3, [r3]
+	str	r3, [r5, #40]
+	ldr	r3, .L1935+48
+	ldr	r3, [r3]
+	str	r3, [r5, #36]
+	ldr	r3, .L1935+52
 	ldrh	r3, [r3]
-	mov	r1, r3
-	str	r3, [sp, #8]
-	bl	__aeabi_uidivmod
-.LVL2247:
-	.loc 1 924 0
-	ldr	r3, [sp, #8]
-	.loc 1 925 0
-	ldr	r2, [sp, #12]
-	.loc 1 923 0
-	str	r1, [sp, #4]
-.LVL2248:
-	.loc 1 924 0
-	subs	r4, r3, r1
-	uxth	r4, r4
-.LVL2249:
-	.loc 1 925 0
-	cmp	r5, r4
-	.loc 1 926 0
-	it	cc
-	uxthcc	r4, r5
-.LVL2250:
-	.loc 1 927 0
-	cbz	r2, .L2021
-	.loc 1 927 0 is_stmt 0 discriminator 1
-	cmp	r4, r3
-	beq	.L2021
-	.loc 1 929 0 is_stmt 1
-	ldr	r3, [r10]
-	.loc 1 931 0
-	add	r0, sp, #20
-	.loc 1 928 0
-	str	r2, [sp, #24]
-	.loc 1 931 0
-	movs	r2, #1
-	mov	r1, r2
-	.loc 1 929 0
-	str	r3, [sp, #28]
-	.loc 1 930 0
-	movs	r3, #0
-	str	r3, [sp, #32]
-	.loc 1 931 0
-	bl	FlashReadPages
-.LVL2251:
-.L2022:
-	.loc 1 935 0
-	lsls	r3, r4, #9
-	ldr	r0, [r10]
-	.loc 1 939 0
-	subs	r5, r5, r4
-.LVL2252:
-	.loc 1 935 0
-	mov	r2, r3
-	str	r3, [sp, #8]
-	ldm	sp, {r1, r3}
-	.loc 1 940 0
-	add	r7, r7, r4
-.LVL2253:
-	add	fp, fp, #4
-	.loc 1 935 0
-	add	r0, r0, r3, lsl #9
-	bl	ftl_memcpy
-.LVL2254:
-	.loc 1 936 0
-	ldr	r2, [r10]
-	mov	r1, r6
-	ldr	r0, .L2029+16
-	.loc 1 938 0
-	adds	r6, r6, #1
-.LVL2255:
-	.loc 1 936 0
-	bl	FtlMapWritePage
-.LVL2256:
-	.loc 1 941 0
-	ldr	r3, [sp]
-	.loc 1 937 0
-	adds	r0, r0, #1
-	it	eq
-	moveq	r8, #-1
-.LVL2257:
-	.loc 1 941 0
-	mov	r2, r3
-	ldr	r3, [sp, #8]
-	add	r2, r2, r3
-	str	r2, [sp]
-.LVL2258:
-	b	.L2019
-.LVL2259:
-.L2021:
-	.loc 1 933 0
-	ldr	r3, .L2029+20
-	movs	r1, #0
-	ldr	r0, [r10]
+	strh	r3, [r5, #44]	@ movhi
+	ldr	r3, .L1935+56
+	ldrh	r3, [r3]
+	strh	r3, [r5, #46]	@ movhi
+	ldr	r3, .L1935+60
 	ldrh	r2, [r3]
-.LVL2260:
 	bl	ftl_memset
-.LVL2261:
-	b	.L2022
-.LVL2262:
-.L2025:
-	.loc 1 919 0
-	mov	r8, #-1
-	b	.L2017
-.L2030:
-	.align	2
-.L2029:
-	.word	.LANCHOR49
-	.word	.LANCHOR56
-	.word	.LANCHOR191
-	.word	.LANCHOR55
-	.word	.LANCHOR215
-	.word	.LANCHOR57
-	.word	.LANCHOR182
-	.cfi_endproc
-.LFE355:
-	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
-	.section	.text.Ftl_save_ext_data,"ax",%progbits
-	.align	1
-	.global	Ftl_save_ext_data
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_save_ext_data, %function
-Ftl_save_ext_data:
-.LFB377:
-	.loc 1 2410 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	.loc 1 2411 0
-	ldr	r2, .L2033
-	ldr	r3, .L2033+4
-	ldr	r1, [r2]
-	cmp	r1, r3
-	bne	.L2031
-.LBB480:
-.LBB481:
-	.loc 1 2412 0
-	ldr	r3, .L2033+8
-	.loc 1 2427 0
-	movs	r1, #1
+	mov	r1, r5
+	ldr	r5, .L1935+64
+	movs	r2, #48
+	ldr	r0, [r4, #8]
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r3, .L1935+68
+	ldr	r0, [r4, #8]
+	ldr	r1, [r3]
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	bl	ftl_memcpy
+	ldrh	r0, [r5]
+	ldr	r3, [r4, #8]
+	ldr	r1, .L1935+72
+	lsrs	r2, r0, #3
+	adds	r0, r0, #24
+	lsls	r0, r0, #1
+	ldr	r1, [r1]
+	adds	r2, r2, #4
+	bic	r0, r0, #3
+	add	r0, r0, r3
+	bl	ftl_memcpy
+	ldr	r3, .L1935+76
+	str	r7, [sp, #4]
+	ldrh	r3, [r3]
+	cbz	r3, .L1918
+	ldrh	r0, [r5]
+	ldr	r3, .L1935+80
+	ldr	r1, .L1935+84
+	ldrh	r2, [r3]
+	lsrs	r3, r0, #3
+	ldr	r1, [r1]
+	add	r3, r3, r0, lsl #1
+	ldr	r0, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memcpy
+.L1918:
+	ldr	r5, .L1935+4
+	movs	r7, #0
+	movw	fp, #65535
 	movs	r0, #0
-	.loc 1 2412 0
-	str	r3, [r2, #4]
-	.loc 1 2413 0
-	ldr	r3, .L2033+12
-	ldr	r3, [r3]
-	str	r3, [r2, #88]
-	.loc 1 2414 0
-	ldr	r3, .L2033+16
-	ldr	r3, [r3]
-	str	r3, [r2, #92]
-	.loc 1 2415 0
-	ldr	r3, .L2033+20
-	ldr	r3, [r3]
-	str	r3, [r2, #8]
-	.loc 1 2416 0
-	ldr	r3, .L2033+24
-	ldr	r3, [r3]
-	str	r3, [r2, #12]
-	.loc 1 2417 0
-	ldr	r3, .L2033+28
-	ldr	r3, [r3]
-	str	r3, [r2, #16]
-	.loc 1 2418 0
-	ldr	r3, .L2033+32
-	ldr	r3, [r3]
-	str	r3, [r2, #20]
-	.loc 1 2419 0
-	ldr	r3, .L2033+36
-	ldr	r3, [r3]
-	str	r3, [r2, #28]
-	.loc 1 2420 0
-	ldr	r3, .L2033+40
-	ldr	r3, [r3]
-	str	r3, [r2, #32]
-	.loc 1 2421 0
-	ldr	r3, .L2033+44
-	ldr	r3, [r3]
-	str	r3, [r2, #36]
-	.loc 1 2422 0
-	ldr	r3, .L2033+48
-	ldr	r3, [r3]
-	str	r3, [r2, #40]
-	.loc 1 2423 0
-	ldr	r3, .L2033+52
-	ldr	r3, [r3]
-	str	r3, [r2, #44]
-	.loc 1 2424 0
-	ldr	r3, .L2033+56
-	ldr	r3, [r3]
-	str	r3, [r2, #48]
-	.loc 1 2425 0
-	ldr	r3, .L2033+60
-	ldr	r3, [r3]
-	str	r3, [r2, #60]
-	.loc 1 2426 0
-	ldr	r3, .L2033+64
-	ldr	r3, [r3]
-	str	r3, [r2, #64]
-	.loc 1 2427 0
-	b	FtlVendorPartWrite
-.LVL2263:
-.L2031:
-	bx	lr
-.L2034:
-	.align	2
-.L2033:
-	.word	.LANCHOR135
-	.word	1179929683
-	.word	1342177352
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR165
-	.word	.LANCHOR79
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-.LBE481:
-.LBE480:
-	.cfi_endproc
-.LFE377:
-	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
-	.section	.text.FtlEctTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlEctTblFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlEctTblFlush, %function
-FtlEctTblFlush:
-.LFB357:
-	.loc 1 988 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2264:
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 990 0
-	ldr	r3, .L2042
-	ldr	r3, [r3]
-	cmp	r3, #0
-	beq	.L2040
-	.loc 1 990 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2042+4
+	bl	FtlUpdateVaildLpn
+	mov	r10, r5
+.L1919:
+	ldr	r3, [r8]
+	ldrh	r2, [r5]
+	ldr	r0, .L1935+12
+	str	r3, [r4, #8]
+	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
-	cmp	r3, #29
-	.loc 1 991 0 is_stmt 1 discriminator 1
-	ite	hi
-	movhi	r3, #32
-	movls	r3, #4
-.L2036:
-.LVL2265:
-	.loc 1 992 0
-	ldr	r1, .L2042+8
-	ldrh	r2, [r1]
-	cmp	r2, #31
-	.loc 1 993 0
-	ittt	ls
-	addls	r2, r2, #1
-	.loc 1 994 0
-	movls	r3, #1
-.LVL2266:
-	.loc 1 993 0
-	strhls	r2, [r1]	@ movhi
-.LVL2267:
-	ldr	r2, .L2042+12
-	.loc 1 996 0
-	cbnz	r0, .L2038
-	.loc 1 996 0 is_stmt 0 discriminator 1
-	ldr	r1, [r2]
-	ldr	r0, [r1, #20]
-.LVL2268:
-	ldr	r1, [r1, #16]
-	add	r3, r3, r0
-.LVL2269:
-	cmp	r1, r3
-	bcc	.L2039
-.L2038:
-	.loc 1 998 0 is_stmt 1
+	str	r3, [r4, #12]
+	ldrh	r3, [r5, #2]
+	orr	r3, r3, r2, lsl #10
+	str	r3, [r4, #4]
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1935+88
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1920
+	ldrh	r3, [r5]
+	ldrh	fp, [r5, #4]
+	strh	r3, [r5, #4]	@ movhi
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r2, .L1935+44
+	strh	r0, [r5]	@ movhi
 	ldr	r3, [r2]
-	.loc 1 1003 0
-	movs	r0, #64
-	.loc 1 998 0
-	ldr	r1, [r3, #16]
-	str	r1, [r3, #20]
-	.loc 1 999 0
-	ldr	r1, .L2042+16
-	str	r1, [r3]
-	.loc 1 1000 0
-	ldr	r3, .L2042+20
-	ldr	r2, [r2]
-	ldrh	r1, [r3]
-	lsls	r3, r1, #9
-	str	r3, [r2, #12]
-	.loc 1 1001 0
-	ldr	r3, [r2, #8]
+	adds	r1, r3, #1
+	str	r3, [r5, #8]
+	str	r1, [r2]
+	lsls	r2, r0, #10
+	str	r2, [r4, #4]
+	str	r3, [r6, #4]
+	movs	r3, #1
+	strh	r0, [r6, #2]	@ movhi
+	mov	r2, r3
+	mov	r1, r3
+	ldr	r0, .L1935+12
+	bl	FlashProgPages
+.L1920:
+	ldrh	r3, [r10, #2]
+	ldr	r2, [r4]
 	adds	r3, r3, #1
-	str	r3, [r2, #8]
-	.loc 1 1002 0
-	movs	r3, #0
-	str	r3, [r2, #4]
-	.loc 1 1003 0
-	bl	FtlVendorPartWrite
-.LVL2270:
-	.loc 1 1004 0
-	bl	Ftl_save_ext_data
-.LVL2271:
-.L2039:
-	.loc 1 1006 0
+	uxth	r3, r3
+	adds	r1, r2, #1
+	strh	r3, [r10, #2]	@ movhi
+	bne	.L1921
+	cmp	r3, #1
+	bne	.L1922
+	ldr	r1, .L1935+92
+	movw	r2, #1219
+	ldr	r0, .L1935+96
+	bl	printf
+	ldr	r1, .L1935+100
+	ldr	r0, .L1935+104
+	bl	printf
+.L1922:
+	ldrh	r3, [r10, #2]
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r3, #1
+	itttt	eq
+	ldreq	r3, .L1935+88
+	ldrheq	r3, [r3]
+	addeq	r3, r3, #-1
+	strheq	r3, [r10, #2]	@ movhi
+	cmp	r7, #3
+	bls	.L1919
+	mov	r2, r7
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1935+108
+	bl	printf
+	ldr	r2, [sp]
+	movs	r3, #1
+	str	r3, [r2]
+.L1917:
 	movs	r0, #0
-	pop	{r3, pc}
-.LVL2272:
-.L2040:
-	.loc 1 989 0
-	movs	r3, #32
-	b	.L2036
-.L2043:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1921:
+	cmp	r3, #1
+	beq	.L1919
+	cmp	r2, #256
+	beq	.L1919
+	movw	r3, #65535
+	cmp	fp, r3
+	beq	.L1917
+	movs	r1, #1
+	mov	r0, fp
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1917
+.L1936:
 	.align	2
-.L2042:
-	.word	.LANCHOR28
-	.word	.LANCHOR167
-	.word	.LANCHOR218
+.L1935:
+	.word	.LANCHOR77
+	.word	.LANCHOR209
 	.word	.LANCHOR188
-	.word	1112818501
-	.word	.LANCHOR187
-	.cfi_endproc
-.LFE357:
-	.size	FtlEctTblFlush, .-FtlEctTblFlush
-	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.word	.LANCHOR202
+	.word	.LANCHOR81
+	.word	.LANCHOR45
+	.word	1179929683
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR167
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LANCHOR58
+	.word	.LANCHOR40
+	.word	.LANCHOR84
+	.word	.LANCHOR0
+	.word	.LANCHOR70
+	.word	.LANCHOR67
+	.word	.LANCHOR131
+	.word	.LANCHOR54
+	.word	.LANCHOR210
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC38
+	.word	.LANCHOR183
+	.word	1342177353
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
-	.global	allocate_new_data_superblock
+	.global	FtlSuperblockPowerLostFix
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	allocate_new_data_superblock, %function
-allocate_new_data_superblock:
-.LFB387:
-	.loc 1 2979 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2273:
-	.loc 1 2982 0
-	ldr	r3, .L2071
-	.loc 1 2979 0
-	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 1 2979 0
+	ldr	r3, .L1952
+	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	r4, r0
-	.loc 1 2980 0
-	ldrh	r5, [r0]
-.LVL2274:
-	.loc 1 2982 0
-	ldrh	r3, [r3]
-	cmp	r3, r5
-	bcs	.L2045
-	.loc 1 2982 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2071+4
-	movw	r2, #2982
-	ldr	r0, .L2071+8
-.LVL2275:
-	bl	printf
-.LVL2276:
-	ldr	r1, .L2071+12
-	ldr	r0, .L2071+16
-	bl	printf
-.LVL2277:
-.L2045:
-	.loc 1 2983 0 is_stmt 1
-	ldr	r3, .L2071+20
-	ldr	r3, [r3]
+	sub	sp, sp, #44
+	ldr	r8, [r3]
+	cmp	r8, #0
+	bne	.L1937
+	ldr	r3, .L1952+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2046
-	.loc 1 2985 0
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L2047
-	.loc 1 2986 0
-	ldr	r3, .L2071+24
-	.loc 1 2987 0
-	mov	r0, r5
-	.loc 1 2986 0
+	beq	.L1948
+	ldrb	r3, [r0, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1948
+	ldrh	r6, [r0, #4]
+	mov	r8, r3
+.L1939:
+	mov	r3, #-1
+	ldr	r2, .L1952+8
+	str	r3, [sp, #20]
+	movs	r7, #0
+	ldr	r3, .L1952+12
+	ldr	r5, [r2]
+	mvn	r2, #2
+	ldr	r10, .L1952+24
 	ldr	r3, [r3]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2048
-	.loc 1 2987 0
-	bl	INSERT_DATA_LIST
-.LVL2278:
-.L2047:
-	.loc 1 2991 0
+	str	r5, [sp, #16]
+	str	r3, [sp, #12]
+	str	r2, [r5, #8]
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	ldrh	r2, [r4]
+	strh	r7, [r5]	@ movhi
+	strh	r2, [r5, #2]	@ movhi
+	movw	r2, #61589
+	str	r2, [r3]
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+.L1940:
+	adds	r6, r6, #-1
+	bcc	.L1943
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1941
+.L1943:
+	ldr	r3, .L1952+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L1952+20
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
-	strb	r3, [r4, #8]
-	.loc 1 2993 0
-	ldr	r3, .L2071+28
-	cmp	r4, r3
-	beq	.L2049
-	.loc 1 2993 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2071+32
-	ldrh	r2, [r3]
-	cmp	r2, #1
-	beq	.L2049
-	.loc 1 2993 0 discriminator 2
-	ldr	r3, .L2071+36
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2050
-.L2049:
-	.loc 1 2994 0 is_stmt 1
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L2051:
-	.loc 1 3005 0
-	ldr	r6, .L2071+40
-	movw	r2, #65535
-	ldrh	r0, [r6]
-	cmp	r0, r2
-	beq	.L2056
-	.loc 1 3009 0
-	cmp	r5, r0
-	bne	.L2057
-	.loc 1 3009 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2071+24
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2058
-.L2057:
-	.loc 1 3010 0 is_stmt 1
-	bl	update_vpc_list
-.LVL2279:
-.L2058:
-	.loc 1 3011 0
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L2056:
-	.loc 1 3013 0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L1937:
+	add	sp, sp, #44
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1948:
+	movs	r6, #12
+	b	.L1939
+.L1941:
 	mov	r0, r4
-	bl	allocate_data_superblock
-.LVL2280:
-	.loc 1 3014 0
-	bl	l2p_flush
-.LVL2281:
-	.loc 1 3015 0
-	movs	r0, #0
-	bl	FtlEctTblFlush
-.LVL2282:
-	.loc 1 3016 0
-	bl	FtlVpcTblFlush
-.LVL2283:
-.L2046:
-	.loc 1 3018 0
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.LVL2284:
-.L2048:
-	.loc 1 2989 0
-	bl	INSERT_FREE_LIST
-.LVL2285:
-	b	.L2047
-.L2050:
-	.loc 1 2995 0
-	ldr	r3, .L2071+44
-	cmp	r4, r3
-	bne	.L2051
-	.loc 1 2996 0
-	cmp	r2, #3
-	beq	.L2053
-	.loc 1 2996 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2071+48
-	ldr	r2, [r2]
-	cmp	r2, #1
-	bne	.L2054
-.L2053:
-	.loc 1 2997 0 is_stmt 1
-	movs	r2, #1
-	strb	r2, [r3, #8]
-.L2054:
-	.loc 1 2998 0
-	ldr	r2, .L2071+52
-	ldr	r2, [r2]
-	cmp	r2, #0
-	beq	.L2051
-	.loc 1 2998 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2071+56
-	ldr	r2, [r2]
-	cmp	r2, #29
-	.loc 1 2999 0 is_stmt 1 discriminator 1
-	itt	ls
-	movls	r2, #1
-	strbls	r2, [r3, #8]
-	b	.L2051
-.L2072:
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1943
+	ldr	r3, [r10]
+	movs	r1, #1
+	add	r0, sp, #4
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	mov	r2, r8
+	it	eq
+	moveq	r3, r7
+	str	r3, [r10]
+	movs	r3, #0
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	b	.L1940
+.L1953:
 	.align	2
-.L2071:
-	.word	.LANCHOR39
-	.word	.LANCHOR219
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR76
-	.word	.LANCHOR83
-	.word	.LANCHOR92
-	.word	.LANCHOR43
+.L1952:
+	.word	.LANCHOR77
 	.word	.LANCHOR8
-	.word	.LANCHOR130
-	.word	.LANCHOR91
-	.word	.LANCHOR155
-	.word	.LANCHOR28
-	.word	.LANCHOR167
-	.cfi_endproc
-.LFE387:
-	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlProgPages,"ax",%progbits
+	.word	.LANCHOR188
+	.word	.LANCHOR183
+	.word	.LANCHOR84
+	.word	.LANCHOR53
+	.word	.LANCHOR160
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlProgPages
+	.global	FtlLoadFactoryBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlProgPages, %function
-FtlProgPages:
-.LFB306:
-	.loc 4 1531 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2286:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 1531 0
-	mov	r4, r3
-	.loc 4 1539 0
-	ldr	r3, .L2092
-.LVL2287:
-	.loc 4 1531 0
-	mov	r5, r0
-	mov	r8, r1
-	.loc 4 1539 0
-	ldrb	r6, [r3]	@ zero_extendqisi2
-	cbz	r6, .L2074
-	.loc 4 1539 0 is_stmt 0 discriminator 1
-	ldrb	r6, [r4, #8]	@ zero_extendqisi2
-	subs	r3, r6, #1
-	rsbs	r6, r3, #0
-	adcs	r6, r6, r3
-.L2074:
-.LVL2288:
-	.loc 4 1548 0 is_stmt 1 discriminator 6
-	ldr	r10, .L2092+32
-	.loc 4 1544 0 discriminator 6
-	movs	r7, #0
-	.loc 4 1542 0 discriminator 6
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r2, r6
-.LVL2289:
-	mov	r1, r8
-.LVL2290:
-	mov	r0, r5
-.LVL2291:
-	bl	FlashProgPages
-.LVL2292:
-.L2075:
-	.loc 4 1544 0 discriminator 1
-	cmp	r7, r8
-	beq	.L2084
-	.loc 4 1549 0
-	ldr	fp, .L2092+36
-	b	.L2085
-.L2078:
-	.loc 4 1546 0
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL2293:
-	.loc 4 1547 0
-	ldrh	r3, [r4]
-	cmp	r3, r0
-	bne	.L2076
-	.loc 4 1548 0
-	ldr	r1, [r10]
-	ldrh	r0, [r4, #4]
-.LVL2294:
-	ldrh	r2, [r1, r3, lsl #1]
-	subs	r2, r2, r0
-	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 4 1549 0
-	ldrh	r3, [fp]
-	strh	r3, [r4, #2]	@ movhi
-	.loc 4 1550 0
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	.loc 4 1551 0
-	strh	r3, [r4, #4]	@ movhi
-.L2076:
-	.loc 4 1553 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2077
-	.loc 4 1554 0
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.LVL2295:
-.L2077:
-	.loc 4 1557 0
-	ldr	r2, .L2092+4
-	ldr	r3, [r2, #96]
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	.loc 4 1558 0
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlGcMarkBadPhyBlk
-.LVL2296:
-	.loc 4 1559 0
-	mov	r0, r4
-	bl	get_new_active_ppa
-.LVL2297:
-	.loc 4 1561 0
-	mov	r2, r6
-	.loc 4 1560 0
-	str	r0, [r5, #4]
-	.loc 4 1559 0
-	str	r0, [sp, #12]
-	.loc 4 1561 0
-	movs	r1, #1
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	mov	r0, r5
-	bl	FlashProgPages
-.LVL2298:
-.L2085:
-	.loc 4 1545 0
-	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L2078
-	.loc 4 1564 0
-	ldr	r3, .L2092+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r3, .L1964
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r5, .L1964+4
+	ldr	r3, [r3]
+	ldr	r7, .L1964+8
+	ldr	r10, .L1964+20
+	str	r3, [r5, #8]
+	ldr	r3, .L1964+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L1955:
+	ldr	r3, .L1964+16
 	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2079
-	.loc 4 1564 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2092+12
-	movw	r2, #1564
-	ldr	r0, .L2092+16
-	bl	printf
-.LVL2299:
-	ldr	r1, .L2092+20
-	ldr	r0, .L2092+24
-	bl	printf
-.LVL2300:
-.L2079:
-	.loc 4 1565 0 is_stmt 1
-	ldr	r3, [r5, #4]
-	.loc 4 1566 0
-	cbnz	r6, .L2080
-.L2091:
-	.loc 4 1568 0
+	cmp	r6, r3
+	bcc	.L1960
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1960:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L1964+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1956:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L1958
+	mla	r3, r6, r3, r4
 	movs	r2, #1
-	add	r1, sp, #12
-	ldr	r0, [r5, #16]
-	.loc 4 1567 0
-	str	r3, [sp, #12]
-	.loc 4 1568 0
-	bl	log2phys
-.LVL2301:
-	.loc 4 1570 0
-	ldr	r3, [r5, #12]
-	ldr	r3, [r3, #12]
-.LVL2302:
-	.loc 4 1572 0
-	ubfx	r0, r3, #10, #16
-	str	r3, [sp, #4]
-	bl	P2V_block_in_plane
-.LVL2303:
-	.loc 4 1573 0
-	ldr	r3, [sp, #4]
-	.loc 4 1572 0
-	mov	fp, r0
-.LVL2304:
-	.loc 4 1573 0
-	adds	r3, r3, #1
-	beq	.L2082
-	.loc 4 1575 0
-	ldr	r3, [r10]
-	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L2083
-	.loc 4 1576 0
-	mov	r1, r0
-	ldr	r0, .L2092+28
-.LVL2305:
-	bl	printf
-.LVL2306:
-.L2083:
-	.loc 4 1577 0
+	mov	r1, r2
 	mov	r0, fp
-	bl	decrement_vpc_count
-.LVL2307:
-.L2082:
-	.loc 4 1544 0 discriminator 2
-	adds	r7, r7, #1
-.LVL2308:
-	adds	r5, r5, #36
-	b	.L2075
-.LVL2309:
-.L2080:
-	.loc 4 1567 0
-	orr	r3, r3, #-2147483648
-	b	.L2091
-.L2084:
-	.loc 4 1581 0
-	ldr	r3, .L2092+8
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1957
+	ldrh	r2, [r8]
+	movw	r3, #61664
 	cmp	r2, r3
-	bcc	.L2073
-	.loc 4 1581 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2092+12
-	movw	r2, #1581
-	ldr	r0, .L2092+16
-	bl	printf
-.LVL2310:
-	ldr	r1, .L2092+20
-	ldr	r0, .L2092+24
-	bl	printf
-.LVL2311:
-.L2073:
-	.loc 4 1582 0 is_stmt 1
-	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2312:
-.L2093:
+	bne	.L1957
+	strh	r4, [r7]	@ movhi
+.L1958:
+	adds	r6, r6, #1
+	b	.L1955
+.L1957:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1956
+.L1965:
 	.align	2
-.L2092:
-	.word	.LANCHOR8
-	.word	.LANCHOR135
-	.word	.LANCHOR37
-	.word	.LANCHOR220
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC41
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.cfi_endproc
-.LFE306:
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+.L1964:
+	.word	.LANCHOR183
+	.word	.LANCHOR202
+	.word	.LANCHOR75+10
+	.word	.LANCHOR188
+	.word	.LANCHOR45
+	.word	.LANCHOR51
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlGetLastWrittenPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-.LFB307:
-	.loc 4 1585 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 4 1586 0
-	ldr	r4, .L2099
-	ldr	r0, [r4]
-	cbz	r0, .L2095
-	.loc 4 1587 0
-	ldr	r3, .L2099+4
-	movs	r2, #0
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L1978
+	sub	sp, sp, #104
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L1978+4
+	mov	r8, r1
+	movs	r6, #0
 	movs	r1, #1
-	ldr	r3, [r3]
-	bl	FtlProgPages
-.LVL2313:
-	.loc 4 1588 0
-	movs	r3, #0
-	str	r3, [r4]
-.L2095:
-	.loc 4 1591 0
-	movs	r0, #0
-	pop	{r4, pc}
-.L2100:
+	add	r0, sp, #4
+	ldrh	r5, [r3]
+	add	r3, sp, #40
+	str	r3, [sp, #16]
+	str	r6, [sp, #12]
+	subs	r5, r5, #1
+	sxth	r5, r5
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1969
+.L1970:
+	cmp	r6, r5
+	ble	.L1973
+.L1969:
+	mov	r0, r5
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1973:
+	adds	r3, r6, r5
+	mov	r2, r8
+	add	r3, r3, r3, lsr #31
+	movs	r1, #1
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1971
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L1971
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L1971
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L1970
+.L1971:
+	adds	r4, r4, #1
+	sxth	r6, r4
+	b	.L1970
+.L1979:
 	.align	2
-.L2099:
-	.word	.LANCHOR129
-	.word	.LANCHOR221
-	.cfi_endproc
-.LFE307:
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.ftl_discard,"ax",%progbits
+.L1978:
+	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	ftl_discard
+	.global	FtlLoadBbt
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_discard, %function
-ftl_discard:
-.LFB309:
-	.loc 4 1779 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2314:
-	.loc 4 1786 0
-	ldr	r3, .L2116
-	.loc 4 1779 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 4 1779 0
-	mov	r5, r2
-	.loc 4 1786 0
-	adds	r2, r1, r2
-.LVL2315:
-	.loc 4 1779 0
-	mov	r6, r1
-	.loc 4 1786 0
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bhi	.L2109
-	.loc 4 1789 0
-	cmp	r5, #31
-	bhi	.L2103
-.LVL2316:
-.L2108:
-	.loc 4 1790 0
-	movs	r0, #0
-.L2101:
-	.loc 4 1823 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL2317:
-.L2103:
-	.cfi_restore_state
-	.loc 4 1794 0
-	ldr	r8, .L2116+12
-	.loc 4 1792 0
-	bl	FtlCacheWriteBack
-.LVL2318:
-	.loc 4 1794 0
-	mov	r0, r6
-	ldrh	r4, [r8]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-.LVL2319:
-	.loc 4 1795 0
-	smulbb	r3, r0, r4
-	.loc 4 1794 0
-	mov	r7, r0
-.LVL2320:
-	.loc 4 1795 0
-	subs	r6, r6, r3
-.LVL2321:
-	uxth	r6, r6
-.LVL2322:
-	.loc 4 1796 0
-	cbz	r6, .L2104
-.LVL2323:
-	.loc 4 1797 0
-	subs	r4, r4, r6
-.LVL2324:
-	.loc 4 1798 0
-	adds	r7, r7, #1
-.LVL2325:
-	.loc 4 1797 0
-	cmp	r4, r5
-	it	cs
-	movcs	r4, r5
-	uxth	r4, r4
-	.loc 4 1799 0
-	subs	r5, r5, r4
-.LVL2326:
-.L2104:
-	.loc 4 1806 0
-	ldr	r4, .L2116+4
-	.loc 4 1802 0
-	mov	r3, #-1
-	.loc 4 1807 0
-	ldr	r6, .L2116+8
-.LVL2327:
-	.loc 4 1802 0
-	str	r3, [sp, #4]
-.L2105:
-	.loc 4 1803 0
-	ldrh	r3, [r8]
-	cmp	r5, r3
-	bcs	.L2107
-	.loc 4 1816 0
-	ldr	r3, .L2116+4
-	ldr	r2, [r3]
-	cmp	r2, #32
-	bls	.L2108
-	.loc 4 1818 0
-	movs	r4, #0
-	str	r4, [r3]
-	.loc 4 1819 0
-	bl	l2p_flush
-.LVL2328:
-	.loc 4 1820 0
-	bl	FtlVpcTblFlush
-.LVL2329:
-	b	.L2108
-.L2107:
-	.loc 4 1804 0
-	movs	r2, #0
-	mov	r1, sp
-	mov	r0, r7
-	bl	log2phys
-.LVL2330:
-	.loc 4 1805 0
-	ldr	r3, [sp]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r8, .L2009+48
+	ldr	r4, .L2009
+	ldr	r3, [r8]
+	ldr	r7, .L2009+4
+	mov	r10, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L2009+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1981:
+	ldrh	r3, [r7]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1984
+	lsls	r3, r5, #10
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L2106
-	.loc 4 1806 0
+	bne	.L1982
+	ldr	r3, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+.L1982:
 	ldr	r3, [r4]
-	.loc 4 1808 0
+	adds	r3, r3, #1
+	beq	.L1983
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1983
+	ldr	r3, .L2009+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L1984:
+	ldr	r5, .L2009+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L1998
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L1988
+	lsls	r3, r3, #10
 	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r7
-	.loc 4 1806 0
+	mov	r1, r2
+	ldr	r0, .L2009
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [r4]
-	.loc 4 1807 0
-	ldr	r3, [r6]
+	beq	.L1988
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1988
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1988
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1988:
+	ldr	r10, .L2009
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L1990:
+	cmp	r7, #0
+	bge	.L1993
+	ldr	r1, .L2009+16
+	mov	r2, #336
+	ldr	r0, .L2009+20
+	bl	printf
+	ldr	r1, .L2009+24
+	ldr	r0, .L2009+28
+	bl	printf
+.L1992:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1995
+	ldr	r3, .L2009+32
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L1995
+	ldr	r3, .L2009+36
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1995
+	cmp	r0, r3
+	bcs	.L1995
+	bl	FtlSysBlkNumInit
+.L1995:
+	ldr	r6, .L2009+40
+	movs	r5, #0
+	ldr	r7, .L2009+44
+	ldr	r8, .L2009+52
+.L1996:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1997
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1983:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1981
+.L1993:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [r6]
-	.loc 4 1808 0
-	bl	log2phys
-.LVL2331:
-	.loc 4 1809 0
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL2332:
-	.loc 4 1810 0
-	bl	decrement_vpc_count
-.LVL2333:
-.L2106:
-	.loc 4 1813 0
-	ldrh	r3, [r8]
-	.loc 4 1812 0
-	adds	r7, r7, #1
-.LVL2334:
-	.loc 4 1813 0
-	subs	r5, r5, r3
-.LVL2335:
-	b	.L2105
-.LVL2336:
-.L2109:
-	.loc 4 1787 0
+	beq	.L1991
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L1992
+.L1991:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L1990
+.L1997:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L1996
+.L1998:
 	mov	r0, #-1
-.LVL2337:
-	b	.L2101
-.L2117:
-	.align	2
-.L2116:
-	.word	.LANCHOR68
-	.word	.LANCHOR222
-	.word	.LANCHOR160
-	.word	.LANCHOR55
-	.cfi_endproc
-.LFE309:
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-.LFB303:
-	.loc 4 1003 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 4 1004 0
-	ldr	r3, .L2120
-	ldr	r3, [r3]
-	cbnz	r3, .L2119
-.LBB484:
-.LBB485:
-	.loc 4 1007 0
-	bl	FtlCacheWriteBack
-.LVL2338:
-	.loc 4 1008 0
-	bl	l2p_flush
-.LVL2339:
-	.loc 4 1009 0
-	movs	r0, #1
-	bl	FtlEctTblFlush
-.LVL2340:
-	.loc 4 1010 0
-	bl	FtlVpcTblFlush
-.LVL2341:
-.L2119:
-.LBE485:
-.LBE484:
-	.loc 4 1012 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L2121:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2010:
 	.align	2
-.L2120:
-	.word	.LANCHOR76
-	.cfi_endproc
-.LFE303:
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",%progbits
+.L2009:
+	.word	.LANCHOR202
+	.word	.LANCHOR51
+	.word	.LANCHOR188
+	.word	.LANCHOR75
+	.word	.LANCHOR211
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR37
+	.word	.LANCHOR41
+	.word	.LANCHOR75+24
+	.word	.LANCHOR45
+	.word	.LANCHOR183
+	.word	.LANCHOR123
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
-	.global	FtlDeInit
+	.global	ftl_map_blk_gc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlDeInit, %function
-FtlDeInit:
-.LFB304:
-	.loc 4 1015 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 4 1016 0
-	ldr	r3, .L2124
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L2123
-	.loc 4 1017 0
-	bl	FtlSysFlush
-.LVL2342:
-.L2123:
-	.loc 4 1019 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L2125:
-	.align	2
-.L2124:
-	.word	.LANCHOR223
-	.cfi_endproc
-.LFE304:
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-.LFB494:
-	.loc 7 121 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-.LBB486:
-.LBB487:
-	.loc 7 117 0
-	bl	FlashDeInit
-.LVL2343:
-.LBE487:
-.LBE486:
-	.loc 7 123 0
-	bl	FtlDeInit
-.LVL2344:
-	.loc 7 125 0
-	pop	{r3, lr}
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB488:
-.LBB489:
-	.loc 7 117 0
-	b	FlashDeInit
-.LVL2345:
-.LBE489:
-.LBE488:
-	.cfi_endproc
-.LFE494:
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.FtlVendorPartRead,"ax",%progbits
-	.align	1
-	.global	FtlVendorPartRead
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlVendorPartRead, %function
-FtlVendorPartRead:
-.LFB356:
-	.loc 1 947 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2346:
-	.loc 1 955 0
-	ldr	r3, .L2137
-	.loc 1 947 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	r10, r2
-	.loc 1 955 0
-	adds	r2, r0, r1
-.LVL2347:
-	.loc 1 947 0
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 947 0
-	mov	r7, r0
-	mov	r6, r1
-	.loc 1 955 0
-	ldrh	r3, [r3]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #24]
+	ldr	r5, [r0, #12]
+	str	r3, [sp, #8]
+	bl	ftl_free_no_use_map_blk
+	ldrh	ip, [r4, #10]
+	ldrh	r2, [r4, #8]
+	ldrh	r1, [r4, #40]
+	sub	r3, ip, #4
+	ldr	r6, .L2032
 	cmp	r2, r3
-	bhi	.L2136
-	.loc 1 952 0
-	ldr	r3, .L2137+4
-	mov	r8, #0
-	.loc 1 965 0
-	ldr	fp, .L2137+28
-	.loc 1 952 0
-	ldrh	r5, [r3]
-	lsr	r5, r0, r5
-	lsls	r3, r5, #2
-	str	r3, [sp]
-.LVL2348:
-.L2129:
-	.loc 1 957 0
-	cbnz	r6, .L2135
-.LVL2349:
-.L2127:
-	.loc 1 984 0
-	mov	r0, r8
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2350:
-.L2135:
-	.cfi_restore_state
-	.loc 1 958 0
-	ldr	r3, .L2137+8
-	.loc 1 959 0
+	bge	.L2012
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L2014
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2015
+.L2012:
+	movw	r3, #65535
+	uxth	r0, r0
+	cmp	r1, r3
+	beq	.L2016
+	ldrh	r3, [r4, #2]
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bls	.L2017
+.L2016:
+	ldrh	r3, [r5, r0, lsl #1]
+	lsls	r2, r0, #1
+	str	r3, [sp, #4]
+	cbz	r3, .L2014
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L2014
+	movs	r1, #1
+	str	r1, [r4, #32]
+	strh	r3, [r5, r2]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2022
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L2022:
+	ldr	r5, .L2032+4
+	movs	r7, #0
+.L2023:
+	ldrh	r3, [r4, #6]
+	uxth	fp, r7
+	cmp	r3, fp
+	bhi	.L2028
+	movs	r1, #1
+	ldr	r0, [sp, #4]
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L2014:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2015
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+	b	.L2015
+.L2020:
+	ldrh	r8, [r5, r2, lsl #1]
+	add	lr, r2, #1
+	cmp	r8, r1
+	beq	.L2018
+	mov	r2, lr
+.L2019:
+	uxth	r7, r2
+	cmp	r7, ip
+	bcc	.L2020
+	mov	r7, r0
+.L2018:
+	uxth	r2, r2
+	ldr	r0, .L2032+8
+	ldrh	r2, [r5, r2, lsl #1]
+	bl	printf
+	movw	r3, #65535
 	mov	r0, r7
-	.loc 1 958 0
-	ldr	r2, [sp]
-	ldr	r3, [r3]
-	ldr	r3, [r3, r2]
-	.loc 1 959 0
-	ldr	r2, .L2137+12
-	.loc 1 958 0
-	str	r3, [sp, #8]
-.LVL2351:
-	.loc 1 959 0
-	ldrh	r4, [r2]
-	mov	r1, r4
-	bl	__aeabi_uidivmod
-.LVL2352:
-	.loc 1 960 0
-	subs	r4, r4, r1
-	.loc 1 961 0
+	strh	r3, [r4, #40]	@ movhi
+	b	.L2016
+.L2017:
+	movs	r2, #0
+	b	.L2019
+.L2028:
 	ldr	r3, [sp, #8]
-	.loc 1 960 0
-	uxth	r4, r4
-	.loc 1 959 0
-	str	r1, [sp, #4]
-.LVL2353:
-	.loc 1 961 0
-	cmp	r6, r4
-	.loc 1 962 0
-	it	cc
-	uxthcc	r4, r6
-.LVL2354:
-	lsls	r2, r4, #9
-	str	r2, [sp, #8]
-.LVL2355:
-	.loc 1 963 0
-	cmp	r3, #0
-	beq	.L2131
-	.loc 1 965 0
-	ldr	r2, [fp]
-	.loc 1 967 0
-	add	r0, sp, #20
-	.loc 1 964 0
-	str	r3, [sp, #24]
+	uxth	r10, r7
+	add	r3, r3, r10, lsl #2
 	str	r3, [sp, #12]
-	.loc 1 965 0
-	str	r2, [sp, #28]
-	.loc 1 966 0
-	movs	r2, #0
-	str	r2, [sp, #32]
-	.loc 1 967 0
+	ldr	r3, [sp, #8]
+	ldr	r2, [r3, r10, lsl #2]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2, lsr #10
+	bne	.L2024
+	ldr	r3, .L2032+12
+	str	r2, [r5, #4]
 	movs	r2, #1
+	ldr	r0, .L2032+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L2032+16
+	ldr	r8, [r1]
 	mov	r1, r2
+	str	r8, [r5, #12]
 	bl	FlashReadPages
-.LVL2356:
-	.loc 1 968 0
-	ldr	r2, [sp, #20]
-	.loc 1 970 0
-	ldr	r3, [sp, #12]
-	.loc 1 969 0
+	ldrh	r2, [r8, #8]
+	cmp	r2, fp
+	beq	.L2025
+	ldr	r1, .L2032+20
+	mov	r2, #672
+	ldr	r0, .L2032+24
+	bl	printf
+	ldr	r1, .L2032+28
+	ldr	r0, .L2032+32
+	bl	printf
+.L2025:
+	ldr	r2, [r5]
 	adds	r2, r2, #1
-	.loc 1 970 0
-	ldr	r2, .L2137+16
-	.loc 1 969 0
-	it	eq
-	moveq	r8, #-1
-.LVL2357:
-	.loc 1 970 0
-	ldr	r2, [r2]
-	cmp	r2, #256
-	bne	.L2133
-	.loc 1 971 0
-	mov	r2, r3
-	mov	r1, r5
-	ldr	r0, .L2137+20
+	ldrh	r2, [r8, #8]
+	bne	.L2026
+.L2027:
+	ldr	r1, [sp, #12]
+	movs	r3, #0
+	ldr	r0, .L2032+36
+	str	r3, [r1]
+	ldr	r1, [r5, #4]
 	bl	printf
-.LVL2358:
-	.loc 1 972 0
-	ldr	r2, [fp]
-	mov	r1, r5
-	ldr	r0, .L2137+24
+	ldr	r3, .L2032+40
+	movs	r2, #1
+	str	r2, [r3]
+.L2015:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2026:
+	cmp	r2, fp
+	bne	.L2027
+	ldrh	r0, [r8]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	bne	.L2027
+	ldr	r2, [r5, #8]
+	mov	r1, r10
+	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL2359:
-.L2133:
-	.loc 1 974 0
-	ldr	r1, [fp]
-	lsls	r2, r4, #9
-	ldr	r3, [sp, #4]
-	mov	r0, r10
-	add	r1, r1, r3, lsl #9
-	bl	ftl_memcpy
-.LVL2360:
-.L2134:
-	.loc 1 981 0
-	ldr	r3, [sp, #8]
-	.loc 1 978 0
-	adds	r5, r5, #1
-.LVL2361:
-	.loc 1 979 0
-	subs	r6, r6, r4
-.LVL2362:
-	.loc 1 980 0
-	add	r7, r7, r4
-.LVL2363:
-	.loc 1 981 0
-	add	r10, r10, r3
-.LVL2364:
-	ldr	r3, [sp]
-	adds	r3, r3, #4
-	str	r3, [sp]
-	b	.L2129
-.LVL2365:
-.L2131:
-	.loc 1 976 0
-	lsls	r2, r4, #9
-	mov	r1, r3
-	mov	r0, r10
-	bl	ftl_memset
-.LVL2366:
-	b	.L2134
-.LVL2367:
-.L2136:
-	.loc 1 956 0
-	mov	r8, #-1
-	b	.L2127
-.L2138:
+.L2024:
+	adds	r7, r7, #1
+	b	.L2023
+.L2033:
 	.align	2
-.L2137:
-	.word	.LANCHOR49
-	.word	.LANCHOR56
-	.word	.LANCHOR191
-	.word	.LANCHOR55
-	.word	.LANCHOR199
-	.word	.LC42
-	.word	.LANCHOR215
-	.word	.LANCHOR182
-	.cfi_endproc
-.LFE356:
-	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.section	.text.FtlLoadEctTbl,"ax",%progbits
+.L2032:
+	.word	.LANCHOR54
+	.word	.LANCHOR202
+	.word	.LC39
+	.word	.LANCHOR184
+	.word	.LANCHOR188
+	.word	.LANCHOR212
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC40
+	.word	.LANCHOR77
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlLoadEctTbl
+	.global	Ftl_write_map_blk_to_last_page
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadEctTbl, %function
-FtlLoadEctTbl:
-.LFB362:
-	.loc 1 1489 0
-	.cfi_startproc
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 1490 0
-	movs	r0, #64
-	ldr	r4, .L2141
-	ldr	r5, .L2141+4
-	ldr	r2, [r4]
-	ldrh	r1, [r5]
-	bl	FtlVendorPartRead
-.LVL2368:
-	.loc 1 1491 0
-	ldr	r3, [r4]
-	ldr	r2, [r3]
-	ldr	r3, .L2141+8
-	cmp	r2, r3
-	beq	.L2140
-.LBB492:
-.LBB493:
-	.loc 1 1493 0
-	ldr	r1, .L2141+12
-	ldr	r0, .L2141+16
+	ldr	r3, .L2044
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r5, [r3]
+	cbnz	r5, .L2035
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	ldr	r6, [r0, #12]
+	cmp	r3, r2
+	bne	.L2036
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L2037
+	ldr	r1, .L2044+4
+	mov	r2, #708
+	ldr	r0, .L2044+8
 	bl	printf
-.LVL2369:
-	.loc 1 1494 0
-	ldrh	r2, [r5]
-	movs	r1, #0
-	ldr	r0, [r4]
-	lsls	r2, r2, #9
-	bl	ftl_memset
-.LVL2370:
-.L2140:
-.LBE493:
-.LBE492:
-	.loc 1 1499 0
+	ldr	r1, .L2044+12
+	ldr	r0, .L2044+16
+	bl	printf
+.L2037:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	movs	r3, #0
+	strh	r0, [r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L2035:
 	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L2142:
-	.align	2
-.L2141:
-	.word	.LANCHOR188
-	.word	.LANCHOR187
-	.word	1112818501
-	.word	.LC43
-	.word	.LC8
-	.cfi_endproc
-.LFE362:
-	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2036:
+	ldrh	r6, [r6, r3, lsl #1]
+	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L2044+20
+	ldr	r8, .L2044+32
+	ldr	r7, [r0, #24]
+	orr	r3, r3, r6, lsl #10
+	ldr	r0, [r8]
+	str	r3, [r2, #4]
+	ldr	r3, .L2044+24
+	str	r0, [r2, #8]
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r6, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L2044+28
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+	ldrh	ip, [r4, #6]
+	mov	r3, r5
+	ldr	r1, [r8]
+	mov	r2, r5
+.L2038:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L2040
+	movs	r2, #1
+	movs	r3, #0
+	mov	r1, r2
+	ldr	r0, .L2044+20
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L2035
+.L2040:
+	ldr	r0, [r7, r3, lsl #2]
+	cmp	r6, r0, lsr #10
+	bne	.L2039
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	r5, r1, r2, lsl #3
+	ldr	r0, [r7, r3, lsl #2]
+	str	r0, [r5, #4]
+.L2039:
+	adds	r3, r3, #1
+	b	.L2038
+.L2045:
+	.align	2
+.L2044:
+	.word	.LANCHOR77
+	.word	.LANCHOR213
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LANCHOR54
+	.word	.LANCHOR183
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
-	.global	Ftl_load_ext_data
+	.global	FtlMapWritePage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_load_ext_data, %function
-Ftl_load_ext_data:
-.LFB378:
-	.loc 1 2432 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 2433 0
-	movs	r1, #1
-	ldr	r4, .L2147
-	movs	r0, #0
-	.loc 1 2434 0
-	ldr	r5, .L2147+4
-	.loc 1 2433 0
-	mov	r2, r4
-	bl	FtlVendorPartRead
-.LVL2371:
-	.loc 1 2434 0
-	ldr	r3, [r4]
-	cmp	r3, r5
-	beq	.L2144
-	.loc 1 2435 0
-	mov	r2, #512
-	movs	r1, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r10, .L2069+36
+	mov	r8, r1
+	movs	r6, #0
+	str	r2, [sp]
+.L2047:
+	ldr	r2, .L2069
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	ldrh	r3, [r10]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L2048
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2049
+.L2048:
 	mov	r0, r4
-	bl	ftl_memset
-.LVL2372:
-	.loc 1 2436 0
-	str	r5, [r4]
-.L2144:
-	.loc 1 2439 0
-	ldr	r3, [r4]
-	cmp	r3, r5
-	ldr	r5, .L2147+8
-	bne	.L2145
-	.loc 1 2440 0
-	ldr	r2, [r4, #88]
-	ldr	r3, .L2147+12
-	str	r2, [r3]
-	.loc 1 2441 0
-	ldr	r2, [r4, #92]
-	ldr	r3, .L2147+16
-	str	r2, [r3]
-	.loc 1 2442 0
-	ldr	r2, [r4, #8]
-	ldr	r3, .L2147+20
-	str	r2, [r3]
-	.loc 1 2443 0
-	ldr	r2, [r4, #12]
-	ldr	r3, .L2147+24
-	str	r2, [r3]
-	.loc 1 2444 0
-	ldr	r2, [r4, #16]
-	ldr	r3, .L2147+28
-	str	r2, [r3]
-	.loc 1 2445 0
-	ldr	r2, [r4, #20]
-	ldr	r3, .L2147+32
-	str	r2, [r3]
-	.loc 1 2446 0
-	ldr	r3, [r4, #28]
-	.loc 1 2447 0
-	ldr	r2, [r4, #32]
-	.loc 1 2446 0
-	str	r3, [r5]
-	.loc 1 2447 0
-	ldr	r3, .L2147+36
-	str	r2, [r3]
-	.loc 1 2448 0
-	ldr	r2, [r4, #36]
-	ldr	r3, .L2147+40
-	str	r2, [r3]
-	.loc 1 2449 0
-	ldr	r2, [r4, #40]
-	ldr	r3, .L2147+44
-	str	r2, [r3]
-	.loc 1 2450 0
-	ldr	r2, [r4, #44]
-	ldr	r3, .L2147+48
-	str	r2, [r3]
-	.loc 1 2451 0
-	ldr	r2, [r4, #48]
-	ldr	r3, .L2147+52
-	str	r2, [r3]
-	.loc 1 2452 0
-	ldr	r2, [r4, #60]
-	ldr	r3, .L2147+56
-	str	r2, [r3]
-.L2145:
-	.loc 1 2462 0
-	ldr	r3, .L2147+60
-	movs	r2, #0
-	str	r2, [r3]
-	.loc 1 2472 0
-	ldr	r2, [r4, #68]
-	ldr	r3, .L2147+64
+	bl	Ftl_write_map_blk_to_last_page
+.L2049:
+	ldr	r3, .L2069+4
+	ldr	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, #0
+	bne	.L2064
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L2051
+	ldr	r1, .L2069+8
+	mov	r2, #768
+	ldr	r0, .L2069+12
+	bl	printf
+	ldr	r1, .L2069+16
+	ldr	r0, .L2069+20
+	bl	printf
+.L2051:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bne	.L2146
-	.loc 1 2473 0
-	ldr	r3, .L2147+68
-	movs	r2, #1
-	.loc 1 2474 0
-	ldr	r1, .L2147+72
-	ldr	r0, .L2147+76
-	.loc 1 2473 0
-	str	r2, [r3]
-	.loc 1 2474 0
+	bcc	.L2052
+	ldr	r1, .L2069+8
+	movw	r2, #769
+	ldr	r0, .L2069+12
 	bl	printf
-.LVL2373:
-.L2146:
-	.loc 1 2479 0
-	ldr	r3, .L2147+80
-	ldr	r1, .L2147+84
-	ldrh	r2, [r3]
-	ldr	r3, .L2147+88
-	ldrh	r1, [r1]
+	ldr	r1, .L2069+16
+	ldr	r0, .L2069+20
+	bl	printf
+.L2052:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r5, .L2069+24
+	ldrh	r7, [r3, r2, lsl #1]
+	movs	r2, #16
+	ldrh	r3, [r4, #2]
+	mov	fp, r5
+	orr	r3, r3, r7, lsl #10
+	str	r3, [r5, #4]
+	ldr	r3, [sp]
+	str	r3, [r5, #8]
+	ldr	r3, .L2069+28
 	ldr	r0, [r3]
-	ldr	r3, [r5]
-	mla	r0, r0, r2, r3
-	bl	__aeabi_uidiv
-.LVL2374:
-	ldr	r3, .L2147+92
-	str	r0, [r3]
-	pop	{r3, r4, r5, pc}
-.L2148:
+	str	r0, [r5, #12]
+	bl	ftl_memset
+	ldr	r3, [r5, #12]
+	mov	r0, r5
+	ldr	r2, [r4, #28]
+	strh	r8, [r3, #8]	@ movhi
+	str	r2, [r3, #4]
+	ldrh	r2, [r4, #4]
+	strh	r7, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r5]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L2053
+	ldr	r1, [r5, #4]
+	adds	r6, r6, #1
+	ldr	r0, .L2069+32
+	uxth	r6, r6
+	bl	printf
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	itttt	ls
+	ldrls	r3, .L2069+36
+	ldrhls	r2, [r3]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r6, #3
+	bls	.L2047
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L2069+40
+	bl	printf
+	ldr	r2, [sp, #4]
+	movs	r3, #1
+	str	r3, [r2]
+.L2064:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2053:
+	cbz	r1, .L2056
+	cmp	r2, #1
+	strh	r7, [r4, #40]	@ movhi
+	beq	.L2047
+	cmp	r1, #256
+.L2068:
+	beq	.L2047
+	ldr	r2, [fp, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r8, lsl #2]
+	b	.L2064
+.L2056:
+	cmp	r2, #1
+	b	.L2068
+.L2070:
 	.align	2
-.L2147:
-	.word	.LANCHOR135
-	.word	1179929683
+.L2069:
 	.word	.LANCHOR165
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR79
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-	.word	305432421
-	.word	.LANCHOR28
-	.word	.LC44
-	.word	.LC8
-	.word	.LANCHOR47
-	.word	.LANCHOR39
-	.word	.LANCHOR164
+	.word	.LANCHOR77
+	.word	.LANCHOR214
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
 	.word	.LANCHOR202
-	.cfi_endproc
-.LFE378:
-	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.word	.LANCHOR188
+	.word	.LC41
+	.word	.LANCHOR54
+	.word	.LC42
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlMapBlkWriteDumpData
+	.global	flush_l2p_region
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapBlkWriteDumpData, %function
-FtlMapBlkWriteDumpData:
-.LFB359:
-	.loc 1 1025 0
-	.cfi_startproc
+	.type	flush_l2p_region, %function
+flush_l2p_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2375:
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 1025 0
-	mov	r4, r0
-	.loc 1 1031 0
-	ldr	r3, [r0, #36]
-	cmp	r3, #0
-	beq	.L2149
-	.loc 1 1033 0
-	movs	r3, #0
-	.loc 1 1027 0
-	ldrh	r6, [r0, #6]
-	.loc 1 1033 0
-	str	r3, [r0, #36]
-	.loc 1 1034 0
-	ldr	r3, .L2163
-	.loc 1 1028 0
-	ldr	r10, [r0, #24]
-	.loc 1 1034 0
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L2149
-	.loc 1 1036 0
-	ldr	r3, .L2163+4
-	ldr	r5, .L2163+8
-	ldr	r3, [r3]
-	mov	r7, r5
-	str	r3, [r5, #8]
-.LVL2376:
-	.loc 1 1037 0
-	ldr	r3, .L2163+12
-	ldr	r8, [r3]
-	str	r8, [r5, #12]
-	.loc 1 1040 0
-	ldrh	r3, [r0, #2]
-	cbz	r3, .L2153
-	.loc 1 1040 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2163+16
-	ldrh	r2, [r2]
-	subs	r2, r2, #1
-	cmp	r3, r2
-	bge	.L2153
-	.loc 1 1040 0 discriminator 2
-	ldrh	r2, [r0]
-	movw	r1, #65535
-	cmp	r2, r1
-	beq	.L2153
-.LVL2377:
-.LBB494:
-	.loc 1 1044 0 is_stmt 1
-	ldr	r1, [r0, #12]
-	.loc 1 1046 0
-	subs	r3, r3, #1
-	.loc 1 1048 0
-	mov	r0, r5
-.LVL2378:
-	.loc 1 1044 0
-	ldrh	r2, [r1, r2, lsl #1]
-.LVL2379:
-	.loc 1 1046 0
-	orr	r3, r3, r2, lsl #10
-	.loc 1 1048 0
-	movs	r2, #1
-	mov	r1, r2
-	.loc 1 1046 0
-	str	r3, [r5, #4]
-.LVL2380:
-	.loc 1 1048 0
-	bl	FlashReadPages
-.LVL2381:
-	.loc 1 1050 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #12
+	ldr	r5, .L2072
+	muls	r4, r0, r4
+	ldr	r0, .L2072+4
 	ldr	r3, [r5]
-	adds	r3, r3, #1
-	beq	.L2153
-	.loc 1 1050 0 is_stmt 0 discriminator 1
-	ldr	r3, [r4, #24]
-	ldrh	r1, [r8, #8]
-	ldr	r2, [r3, r1, lsl #2]
-	ldr	r3, [r5, #4]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
+	movs	r0, #0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	pop	{r3, r4, r5, pc}
+.L2073:
+	.align	2
+.L2072:
+	.word	.LANCHOR97
+	.word	.LANCHOR127
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r4, #0
+	ldr	r5, .L2078
+	ldr	r6, .L2078+4
+.L2075:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L2077
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2077:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L2076
+	bl	flush_l2p_region
+.L2076:
+	adds	r4, r4, #1
+	b	.L2075
+.L2079:
+	.align	2
+.L2078:
+	.word	.LANCHOR68
+	.word	.LANCHOR97
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2092
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	str	r2, [sp]
+	adds	r2, r0, r1
+	mov	r7, r0
+	mov	r5, r1
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2153
-	.loc 1 1053 0 is_stmt 1
-	ldr	r2, [r5, #8]
-.LVL2382:
-.L2162:
-.LBE494:
-	.loc 1 1070 0
-	mov	r0, r4
-	.loc 1 1072 0
-	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LVL2383:
-	.loc 1 1070 0
-	b	FtlMapWritePage
-.LVL2384:
-.L2153:
-	.cfi_restore_state
-	.loc 1 1027 0
-	subs	r6, r6, #1
-	.loc 1 1059 0
-	uxth	r6, r6
-	ldr	r3, [r10, r6, lsl #2]
-.LVL2385:
-	.loc 1 1060 0
-	str	r3, [r7, #4]
-	.loc 1 1061 0
-	cbz	r3, .L2154
-	.loc 1 1063 0
+	bhi	.L2088
+	ldr	r3, .L2092+4
+	mov	r8, #0
+	ldrh	r6, [r3]
+	lsr	r6, r0, r6
+	lsl	fp, r6, #2
+.L2082:
+	cbnz	r5, .L2087
+.L2080:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2087:
+	ldr	r3, .L2092+8
+	mov	r0, r7
+	ldr	r10, .L2092+24
+	ldr	r3, [r3]
+	ldr	r2, [r3, fp]
+	ldr	r3, .L2092+12
+	str	r2, [sp, #12]
+	ldrh	r3, [r3]
+	mov	r1, r3
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	str	r1, [sp, #4]
+	subs	r4, r3, r1
+	uxth	r4, r4
+	cmp	r5, r4
+	it	cc
+	uxthcc	r4, r5
+	cbz	r2, .L2084
+	cmp	r4, r3
+	beq	.L2084
+	ldr	r3, [r10]
+	add	r0, sp, #20
+	str	r2, [sp, #24]
 	movs	r2, #1
-	ldr	r0, .L2163+8
 	mov	r1, r2
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
 	bl	FlashReadPages
-.LVL2386:
-.L2155:
-	.loc 1 1070 0
-	ldr	r2, [r7, #8]
+.L2085:
+	lsls	r3, r4, #9
+	ldr	r0, [r10]
+	subs	r5, r5, r4
+	mov	r2, r3
+	str	r3, [sp, #8]
+	ldm	sp, {r1, r3}
+	add	r7, r7, r4
+	add	fp, fp, #4
+	add	r0, r0, r3, lsl #9
+	bl	ftl_memcpy
+	ldr	r2, [r10]
 	mov	r1, r6
-	b	.L2162
-.LVL2387:
-.L2154:
-	.loc 1 1067 0
-	ldr	r3, .L2163+20
-.LVL2388:
-	movs	r1, #255
-	ldr	r0, [r7, #8]
+	ldr	r0, .L2092+16
+	adds	r6, r6, #1
+	bl	FtlMapWritePage
+	ldr	r3, [sp]
+	adds	r0, r0, #1
+	it	eq
+	moveq	r8, #-1
+	mov	r2, r3
+	ldr	r3, [sp, #8]
+	add	r2, r2, r3
+	str	r2, [sp]
+	b	.L2082
+.L2084:
+	ldr	r3, .L2092+20
+	movs	r1, #0
+	ldr	r0, [r10]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL2389:
-	b	.L2155
-.LVL2390:
-.L2149:
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2164:
+	b	.L2085
+.L2088:
+	mov	r8, #-1
+	b	.L2080
+.L2093:
 	.align	2
-.L2163:
-	.word	.LANCHOR76
-	.word	.LANCHOR181
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LANCHOR53
+.L2092:
+	.word	.LANCHOR50
 	.word	.LANCHOR57
-	.cfi_endproc
-.LFE359:
-	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.word	.LANCHOR194
+	.word	.LANCHOR56
+	.word	.LANCHOR215
+	.word	.LANCHOR58
+	.word	.LANCHOR185
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	Ftl_save_ext_data
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-.LFB361:
-	.loc 1 1235 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1241 0
-	movs	r4, #0
-	.loc 1 1243 0
-	ldr	r5, .L2248
-	.loc 1 1235 0
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 1 1243 0
-	mov	r1, r4
-	ldr	r3, .L2248+4
-	ldr	r2, [r5]
-	.loc 1 1242 0
-	ldr	r7, .L2248+8
-	.loc 1 1241 0
-	ldr	r6, .L2248+12
-	.loc 1 1243 0
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	.loc 1 1242 0
-	strh	r4, [r7]	@ movhi
-	.loc 1 1241 0
-	strh	r4, [r6]	@ movhi
-	.loc 1 1243 0
-	bl	ftl_memset
-.LVL2391:
-	.loc 1 1244 0
-	ldr	r2, [r5]
-	mov	r1, r4
-	ldr	r5, .L2248+16
-	.loc 1 1245 0
-	ldr	r8, .L2248+88
-	.loc 1 1244 0
-	lsls	r2, r2, #1
-	ldr	r0, [r5]
-	bl	ftl_memset
-.LVL2392:
-	.loc 1 1245 0
-	ldrh	r2, [r8]
-	mov	r1, r4
-	ldr	r3, .L2248+20
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL2393:
-	.loc 1 1246 0
-	ldrh	r2, [r8]
-	mov	r1, r4
-	ldr	r3, .L2248+24
-	lsls	r2, r2, #1
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL2394:
-	.loc 1 1247 0
-	movs	r2, #12
-	movs	r1, #255
-	ldr	r0, .L2248+28
-	bl	ftl_memset
-.LVL2395:
-	.loc 1 1249 0
-	ldr	r3, .L2248+32
-	str	r7, [sp, #12]
-	str	r5, [sp, #8]
-	ldrh	r3, [r3]
-	str	r3, [sp]
-.LVL2396:
-.L2166:
-	.loc 1 1249 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2248+36
-	ldr	r2, [sp]
-	ldrh	r3, [r3]
-	cmp	r3, r2
-	bls	.L2208
-	.loc 1 1253 0 is_stmt 1 discriminator 1
-	ldr	r3, .L2248+40
-	.loc 1 1260 0 discriminator 1
-	movs	r4, #0
-	ldr	r1, .L2248+44
-	mov	r7, r4
-	.loc 1 1258 0 discriminator 1
-	mov	r8, #36
-	.loc 1 1253 0 discriminator 1
-	ldrh	fp, [r3]
-	.loc 1 1258 0 discriminator 1
-	ldr	r3, .L2248+48
-	.loc 1 1260 0 discriminator 1
-	ldr	r2, [r1]
-	ldr	r1, .L2248+52
-	.loc 1 1258 0 discriminator 1
-	ldr	r5, [r3]
-	.loc 1 1259 0 discriminator 1
-	ldr	r3, .L2248+56
-	.loc 1 1260 0 discriminator 1
-	ldrh	r10, [r1]
-	.loc 1 1259 0 discriminator 1
+	@ link register save eliminated.
+	ldr	r2, .L2096
+	ldr	r3, .L2096+4
+	ldr	r1, [r2]
+	cmp	r1, r3
+	bne	.L2094
+	ldr	r3, .L2096+8
+	movs	r1, #1
+	movs	r0, #0
+	str	r3, [r2, #4]
+	ldr	r3, .L2096+12
 	ldr	r3, [r3]
-	b	.L2209
-.LVL2397:
-.L2168:
-	str	r3, [sp, #16]
-	.loc 1 1255 0
-	ldr	r3, .L2248+60
-	ldr	r1, [sp]
-	str	r2, [sp, #20]
-	ldrb	r0, [r3, r4]	@ zero_extendqisi2
-	bl	V2P_block
-.LVL2398:
-	str	r0, [sp, #4]
-.LVL2399:
-	.loc 1 1256 0
-	bl	FtlBbmIsBadBlock
-.LVL2400:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
-	cbnz	r0, .L2167
-	.loc 1 1258 0
-	ldr	r1, [sp, #4]
-	mla	r0, r8, r7, r5
-	lsls	r1, r1, #10
-	.loc 1 1259 0
-	str	r3, [r0, #8]
-	.loc 1 1258 0
-	str	r1, [r0, #4]
-	.loc 1 1260 0
-	mul	r1, r10, r7
-	.loc 1 1261 0
-	adds	r7, r7, #1
-.LVL2401:
-	uxth	r7, r7
-.LVL2402:
-	.loc 1 1260 0
-	bic	r1, r1, #3
-	add	r1, r1, r2
-	str	r1, [r0, #12]
-.L2167:
-.LVL2403:
-	adds	r4, r4, #1
-.LVL2404:
-.L2209:
-	.loc 1 1253 0 discriminator 1
-	uxth	r1, r4
-	cmp	fp, r1
-	bhi	.L2168
-	.loc 1 1264 0
-	cbnz	r7, .L2169
-.LVL2405:
-.L2207:
-	.loc 1 1249 0
-	ldr	r3, [sp]
+	str	r3, [r2, #88]
+	ldr	r3, .L2096+16
+	ldr	r3, [r3]
+	str	r3, [r2, #92]
+	ldr	r3, .L2096+20
+	ldr	r3, [r3]
+	str	r3, [r2, #8]
+	ldr	r3, .L2096+24
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r3, .L2096+28
+	ldr	r3, [r3]
+	str	r3, [r2, #16]
+	ldr	r3, .L2096+32
+	ldr	r3, [r3]
+	str	r3, [r2, #20]
+	ldr	r3, .L2096+36
+	ldr	r3, [r3]
+	str	r3, [r2, #28]
+	ldr	r3, .L2096+40
+	ldr	r3, [r3]
+	str	r3, [r2, #32]
+	ldr	r3, .L2096+44
+	ldr	r3, [r3]
+	str	r3, [r2, #36]
+	ldr	r3, .L2096+48
+	ldr	r3, [r3]
+	str	r3, [r2, #40]
+	ldr	r3, .L2096+52
+	ldr	r3, [r3]
+	str	r3, [r2, #44]
+	ldr	r3, .L2096+56
+	ldr	r3, [r3]
+	str	r3, [r2, #48]
+	ldr	r3, .L2096+60
+	ldr	r3, [r3]
+	str	r3, [r2, #60]
+	ldr	r3, .L2096+64
+	ldr	r3, [r3]
+	str	r3, [r2, #64]
+	b	FtlVendorPartWrite
+.L2094:
+	bx	lr
+.L2097:
+	.align	2
+.L2096:
+	.word	.LANCHOR138
+	.word	1179929683
+	.word	1342177353
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR166
+	.word	.LANCHOR165
+	.word	.LANCHOR168
+	.word	.LANCHOR80
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2105
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2103
+	ldr	r3, .L2105+4
+	ldr	r3, [r3]
+	cmp	r3, #39
+	ite	hi
+	movhi	r3, #32
+	movls	r3, #4
+.L2099:
+	ldr	r1, .L2105+8
+	ldrh	r2, [r1]
+	cmp	r2, #31
+	ittt	ls
+	addls	r2, r2, #1
+	movls	r3, #1
+	strhls	r2, [r1]	@ movhi
+	ldr	r2, .L2105+12
+	cbnz	r0, .L2101
+	ldr	r1, [r2]
+	ldr	r0, [r1, #20]
+	ldr	r1, [r1, #16]
+	add	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L2102
+.L2101:
+	ldr	r2, [r2]
+	movs	r0, #64
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	ldr	r3, .L2105+16
+	str	r3, [r2]
+	ldr	r3, .L2105+20
+	ldrh	r1, [r3]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp]
-.LVL2406:
-	b	.L2166
-.LVL2407:
-.L2169:
-	.loc 1 1267 0
-	movs	r2, #1
-	mov	r1, r7
-	mov	r0, r5
-	bl	FlashReadPages
-.LVL2408:
-	.loc 1 1268 0
+	str	r3, [r2, #8]
 	movs	r3, #0
-.LVL2409:
-.L2246:
-	str	r3, [sp, #4]
-.LVL2410:
-	.loc 1 1268 0 is_stmt 0 discriminator 2
-	ldrh	r3, [sp, #4]
-	cmp	r7, r3
-	bls	.L2207
-	ldr	r3, [sp, #4]
-	mov	r8, #36
-	.loc 1 1269 0 is_stmt 1
-	ldr	fp, .L2248+48
-	mul	r8, r8, r3
-	ldr	r3, [fp]
-	add	r2, r3, r8
-	.loc 1 1272 0
-	ldr	r3, [r3, r8]
-	.loc 1 1269 0
-	ldr	r4, [r2, #4]
-	.loc 1 1270 0
-	ldr	r5, [r2, #12]
-	.loc 1 1272 0
-	adds	r3, r3, #1
-	.loc 1 1269 0
-	ubfx	r4, r4, #10, #16
-.LVL2411:
-	.loc 1 1272 0
-	bne	.L2173
-	mov	r10, #16
-	.loc 1 1274 0
-	mov	r3, fp
-.L2175:
-.LVL2412:
-	ldr	r0, [r3]
-	str	r3, [sp, #16]
-	add	r0, r0, r8
-	ldr	r2, [r0, #4]
-	adds	r2, r2, #1
-	str	r2, [r0, #4]
-	.loc 1 1275 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL2413:
-	.loc 1 1276 0
-	ldrh	r1, [r5]
-	movw	r2, #65535
-	ldr	r3, [sp, #16]
-	cmp	r1, r2
-	bne	.L2172
-	.loc 1 1277 0
-	ldr	r3, [fp]
-	mov	r2, #-1
-	str	r2, [r3, r8]
-	.loc 1 1285 0
-	ldr	r3, [fp]
-	ldr	r3, [r3, r8]
-	cmp	r3, r2
-	beq	.L2174
-.LVL2414:
-.L2173:
-	.loc 1 1287 0
-	ldr	r3, .L2248+64
-	ldr	r2, [r3]
-	ldr	r3, [r5, #4]
-	adds	r1, r2, #1
-	beq	.L2176
-	.loc 1 1287 0 is_stmt 0 discriminator 1
-	cmp	r2, r3
-	bhi	.L2177
-.L2176:
-	.loc 1 1289 0 is_stmt 1
-	adds	r2, r3, #1
-	.loc 1 1292 0
-	ittt	ne
-	ldrne	r1, .L2248+64
-	addne	r2, r3, #1
-	strne	r2, [r1]
-.L2177:
-	.loc 1 1297 0
-	ldrh	r2, [r5]
-	movw	r1, #61604
-	cmp	r2, r1
-	beq	.L2179
-	bhi	.L2180
-	movw	r3, #61574
-	cmp	r2, r3
-	beq	.L2181
-.LVL2415:
-.L2178:
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	b	.L2246
-.LVL2416:
-.L2172:
-	.loc 1 1279 0
-	ldr	r2, [r3]
-	ldr	r2, [r2, r8]
-	adds	r2, r2, #1
-	bne	.L2173
-.LVL2417:
-	add	r10, r10, #-1
-.LVL2418:
-	uxth	r10, r10
-	.loc 1 1273 0 discriminator 2
-	cmp	r10, #0
-	bne	.L2175
-.L2174:
-	.loc 1 1439 0
-	ldr	r3, .L2248+68
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2247
-.L2205:
-	.loc 1 1442 0
-	mov	r0, r4
-	bl	FtlFreeSysBlkQueueIn
-.LVL2419:
-	b	.L2178
-.L2180:
-	.loc 1 1297 0
-	movw	r3, #61634
-	cmp	r2, r3
-	beq	.L2182
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2178
-.L2247:
-	.loc 1 1440 0
-	movs	r1, #0
-	b	.L2205
-.L2182:
-	.loc 1 1302 0
-	ldr	r8, .L2248
-	ldrh	r2, [r6]
-	ldr	r3, [r8]
-	cmp	r2, r3
-	bls	.L2184
-	.loc 1 1302 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2248+72
-	movw	r2, #1302
-	ldr	r0, .L2248+76
+	str	r3, [r2, #4]
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+.L2102:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2103:
+	movs	r3, #32
+	b	.L2099
+.L2106:
+	.align	2
+.L2105:
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.word	.LANCHOR218
+	.word	.LANCHOR191
+	.word	1112818501
+	.word	.LANCHOR190
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_new_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2134
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldrh	r5, [r0]
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bcs	.L2108
+	ldr	r1, .L2134+4
+	movw	r2, #3289
+	ldr	r0, .L2134+8
 	bl	printf
-.LVL2420:
-	ldr	r1, .L2248+80
-	ldr	r0, .L2248+84
+	ldr	r1, .L2134+12
+	ldr	r0, .L2134+16
 	bl	printf
-.LVL2421:
-.L2184:
-	.loc 1 1303 0 is_stmt 1
-	ldr	r1, [r8]
-	ldrh	r0, [r6]
-	.loc 1 1305 0
-	ldr	r2, .L2248+4
-	.loc 1 1303 0
-	uxth	ip, r1
-	.loc 1 1305 0
-	ldr	r10, [r2]
-	.loc 1 1303 0
-	add	r3, ip, #-1
-	sub	ip, ip, r0
-	add	ip, ip, #-1
-	sxth	r3, r3
-.LVL2422:
-	sxth	ip, ip
-.L2185:
-	.loc 1 1303 0 is_stmt 0 discriminator 1
-	cmp	r3, ip
-	bgt	.L2191
-	.loc 1 1329 0 is_stmt 1
-	cmp	r3, #0
-	bge	.L2224
-	b	.L2178
-.L2191:
-	.loc 1 1305 0
-	ldr	r2, [r5, #4]
-	lsl	r8, r3, #2
-	mov	lr, r2
-	ldr	r2, [r10, r3, lsl #2]
-	cmp	lr, r2
-	bls	.L2186
-	.loc 1 1307 0
-	ldr	r2, [r10]
-	cbnz	r2, .L2187
-	.loc 1 1307 0 is_stmt 0 discriminator 1
-	cmp	r1, r0
-	.loc 1 1315 0 is_stmt 1 discriminator 1
-	itt	ne
-	addne	r0, r0, #1
-	strhne	r0, [r6]	@ movhi
-.L2187:
-	ldr	ip, .L2248+4
-	.loc 1 1318 0 discriminator 1
-	uxth	r10, r3
-	ldr	r0, .L2248+16
-	movs	r2, #0
-.L2188:
-	uxth	lr, r2
-	sxth	r1, r2
-.LVL2423:
-	cmp	r10, lr
-	bhi	.L2189
-	.loc 1 1323 0
-	ldr	r2, [r5, #4]
-	.loc 1 1329 0
+.L2108:
+	ldr	r3, .L2134+20
+	ldr	r3, [r3]
 	cmp	r3, #0
-	.loc 1 1323 0
-	ldr	r1, [ip]
-.LVL2424:
-	str	r2, [r1, r8]
-	.loc 1 1324 0
-	ldr	r2, [r0]
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-	.loc 1 1329 0
-	blt	.L2178
-	.loc 1 1339 0
-	ldr	r2, .L2248
-	ldrh	r0, [r6]
-	ldr	r2, [r2]
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L2178
-.LVL2425:
-.L2224:
-	.loc 1 1342 0
-	ldr	r2, .L2248+4
-	.loc 1 1341 0
-	adds	r0, r0, #1
-	.loc 1 1342 0
-	ldr	r1, [r5, #4]
-	.loc 1 1341 0
-	strh	r0, [r6]	@ movhi
-	.loc 1 1342 0
-	ldr	r2, [r2]
-	str	r1, [r2, r3, lsl #2]
-	.loc 1 1343 0
-	ldr	r2, .L2248+16
-.L2244:
-	.loc 1 1393 0
-	ldr	r2, [r2]
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-.LVL2426:
-	b	.L2178
-.LVL2427:
-.L2189:
-	.loc 1 1320 0 discriminator 3
-	ldr	lr, [ip]
-	adds	r2, r2, #1
-	add	fp, lr, r1, lsl #2
-	ldr	fp, [fp, #4]
-	str	fp, [lr, r1, lsl #2]
-	.loc 1 1321 0 discriminator 3
-	ldr	lr, [r0]
-	add	fp, lr, r1, lsl #1
-	ldrh	fp, [fp, #2]
-	strh	fp, [lr, r1, lsl #1]	@ movhi
-.LVL2428:
-	b	.L2188
-.L2186:
-	subs	r3, r3, #1
-.LVL2429:
-	sxth	r3, r3
-.LVL2430:
-	b	.L2185
-.L2249:
-	.align	2
-.L2248:
-	.word	.LANCHOR64
-	.word	.LANCHOR127
-	.word	.LANCHOR70
-	.word	.LANCHOR125
-	.word	.LANCHOR126
-	.word	.LANCHOR190
-	.word	.LANCHOR71
-	.word	.LANCHOR206
-	.word	.LANCHOR39
-	.word	.LANCHOR40
-	.word	.LANCHOR37
-	.word	.LANCHOR105
-	.word	.LANCHOR177
-	.word	.LANCHOR58
-	.word	.LANCHOR104
-	.word	.LANCHOR46
-	.word	.LANCHOR156
-	.word	.LANCHOR8
-	.word	.LANCHOR224
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR61
-.LVL2431:
-.L2181:
-	.loc 1 1349 0
-	ldr	r3, [sp, #12]
-	ldr	r8, .L2250+28
+	bne	.L2109
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L2110
+	ldr	r3, .L2134+24
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2111
+	bl	INSERT_DATA_LIST
+.L2110:
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L2134+28
+	cmp	r4, r3
+	beq	.L2112
+	ldr	r3, .L2134+32
 	ldrh	r2, [r3]
-	ldrh	r3, [r8]
-	cmp	r2, r3
-	bls	.L2194
-	.loc 1 1349 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2250
-	movw	r2, #1349
-	ldr	r0, .L2250+4
-	bl	printf
-.LVL2432:
-	ldr	r1, .L2250+8
-	ldr	r0, .L2250+12
-	bl	printf
-.LVL2433:
-.L2194:
-	.loc 1 1350 0 is_stmt 1
-	ldr	r2, .L2250+16
-	ldrh	lr, [r8]
-	ldrh	r0, [r2]
-	.loc 1 1352 0
-	ldr	r2, .L2250+20
-	.loc 1 1350 0
-	add	ip, lr, #-1
-	sxth	r3, ip
-.LVL2434:
-	sub	ip, ip, r0
-	.loc 1 1352 0
-	ldr	r10, [r2]
-.L2195:
-	.loc 1 1350 0 discriminator 1
-	cmp	r3, ip
-	ble	.L2200
-	.loc 1 1352 0
-	ldr	r2, [r5, #4]
-	lsl	r8, r3, #2
-	ldr	r1, [r10, r3, lsl #2]
-	cmp	r2, r1
-	bls	.L2196
-	.loc 1 1354 0
-	ldr	r2, [r10]
-	cbnz	r2, .L2197
-	.loc 1 1354 0 is_stmt 0 discriminator 1
-	cmp	lr, r0
-	.loc 1 1365 0 is_stmt 1 discriminator 1
-	ittt	ne
-	ldrne	r2, .L2250+16
-	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L2197:
-	ldr	ip, .L2250+20
-	.loc 1 1367 0 discriminator 1
-	uxth	r10, r3
-	ldr	r0, .L2250+24
-	movs	r2, #0
-.L2198:
-	uxth	lr, r2
-	sxth	r1, r2
-.LVL2435:
-	cmp	r10, lr
-	bhi	.L2199
-	.loc 1 1372 0
-	ldr	r2, [r5, #4]
-	ldr	r1, [ip]
-.LVL2436:
-	str	r2, [r1, r8]
-	.loc 1 1373 0
-	ldr	r2, [r0]
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-.LVL2437:
-.L2200:
-	.loc 1 1378 0
-	cmp	r3, #0
-	blt	.L2178
-	.loc 1 1389 0
-	ldr	r2, .L2250+28
-	ldr	r0, .L2250+16
-	ldrh	r2, [r2]
-	ldrh	r1, [r0]
-	subs	r2, r2, #1
-	subs	r2, r2, r1
-	sxth	r2, r2
-	cmp	r3, r2
-	bgt	.L2178
-	.loc 1 1392 0
-	ldr	r2, .L2250+20
-	.loc 1 1391 0
-	adds	r1, r1, #1
-	strh	r1, [r0]	@ movhi
-	.loc 1 1392 0
-	ldr	r1, [r5, #4]
-	ldr	r2, [r2]
-	str	r1, [r2, r3, lsl #2]
-	.loc 1 1393 0
-	ldr	r2, .L2250+24
-	b	.L2244
-.LVL2438:
-.L2199:
-	.loc 1 1369 0 discriminator 3
-	ldr	lr, [ip]
-	adds	r2, r2, #1
-	add	fp, lr, r1, lsl #2
-	ldr	fp, [fp, #4]
-	str	fp, [lr, r1, lsl #2]
-	.loc 1 1370 0 discriminator 3
-	ldr	lr, [r0]
-	add	fp, lr, r1, lsl #1
-	ldrh	fp, [fp, #2]
-	strh	fp, [lr, r1, lsl #1]	@ movhi
-.LVL2439:
-	b	.L2198
-.L2196:
-	subs	r3, r3, #1
-.LVL2440:
-	sxth	r3, r3
-.LVL2441:
-	b	.L2195
-.LVL2442:
-.L2179:
-	.loc 1 1400 0
-	ldr	r8, .L2250+44
+	cmp	r2, #1
+	beq	.L2112
+	ldr	r3, .L2134+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2113
+.L2112:
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2114:
+	ldr	r6, .L2134+40
 	movw	r2, #65535
-	ldrh	r1, [r8]
-	cmp	r1, r2
-	bne	.L2202
-	.loc 1 1402 0
-	strh	r4, [r8]	@ movhi
-.L2245:
-	.loc 1 1413 0
-	str	r3, [r8, #8]
-	b	.L2178
-.L2202:
-	.loc 1 1407 0
-	ldrh	r0, [r8, #4]
+	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2203
-	.loc 1 1408 0
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.LVL2443:
-.L2203:
-	.loc 1 1409 0
-	ldr	r2, [r8, #8]
-	ldr	r3, [r5, #4]
-	cmp	r2, r3
-	bcs	.L2204
-	.loc 1 1411 0
-	ldrh	r3, [r8]
-	.loc 1 1412 0
-	strh	r4, [r8]	@ movhi
-	.loc 1 1411 0
-	strh	r3, [r8, #4]	@ movhi
-	.loc 1 1413 0
-	ldr	r3, [r5, #4]
-	b	.L2245
-.L2204:
-	.loc 1 1417 0
-	strh	r4, [r8, #4]	@ movhi
-	b	.L2178
-.LVL2444:
-.L2208:
-	.loc 1 1447 0
-	ldr	r3, .L2250+32
-	ldr	r2, [r3]
-	ldrh	r3, [r2]
-	cbz	r3, .L2210
-.L2213:
-	.loc 1 1465 0
-	ldr	r1, .L2250+24
-	ldr	r0, [r1]
-	ldrh	r2, [r0]
-	cmp	r2, #0
-	beq	.L2211
-.L2212:
-	.loc 1 1483 0
-	ldr	r3, .L2250+36
-	ldrh	r2, [r6]
+	beq	.L2119
+	cmp	r5, r0
+	bne	.L2120
+	ldr	r3, .L2134+24
 	ldr	r3, [r3]
-	cmp	r2, r3
-	bls	.L2243
-	.loc 1 1483 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2250
-	movw	r2, #1483
-	ldr	r0, .L2250+4
-	bl	printf
-.LVL2445:
-	ldr	r1, .L2250+8
-	ldr	r0, .L2250+12
-	bl	printf
-.LVL2446:
-.L2243:
-	.loc 1 1485 0 is_stmt 1
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L2121
+.L2120:
+	bl	update_vpc_list
+.L2121:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L2119:
+	mov	r0, r4
+	bl	allocate_data_superblock
+	bl	l2p_flush
 	movs	r0, #0
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL2447:
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2448:
-.L2210:
-	.cfi_restore_state
-	.loc 1 1447 0 discriminator 1
-	ldrh	r1, [r6]
-	cmp	r1, #0
-	beq	.L2213
-	.loc 1 1449 0 discriminator 1
-	ldr	r5, .L2250+36
-	ldr	r0, [r5]
-.L2214:
-	sxth	r4, r3
-.LVL2449:
-	cmp	r4, r0
-	bcs	.L2213
-	.loc 1 1451 0
-	ldrh	r1, [r2, r4, lsl #1]
-	adds	r3, r3, #1
-	cmp	r1, #0
-	beq	.L2214
-	.loc 1 1456 0 discriminator 1
-	ldr	r7, .L2250+40
-	mov	r3, r4
-	.loc 1 1457 0 discriminator 1
-	mov	ip, #0
-.L2215:
-.LVL2450:
-	.loc 1 1453 0 discriminator 1
-	ldr	r2, [r5]
-	cmp	r3, r2
-	bcs	.L2213
-	.loc 1 1455 0 discriminator 3
-	ldr	r2, [sp, #8]
-	subs	r1, r3, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2109:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2111:
+	bl	INSERT_FREE_LIST
+	b	.L2110
+.L2113:
+	ldr	r3, .L2134+44
+	cmp	r4, r3
+	bne	.L2114
+	cmp	r2, #3
+	beq	.L2116
+	ldr	r2, .L2134+48
 	ldr	r2, [r2]
-	ldrh	r0, [r2, r3, lsl #1]
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	.loc 1 1456 0 discriminator 3
-	ldr	r2, [r7]
-	ldr	r0, [r2, r3, lsl #2]
-	str	r0, [r2, r1, lsl #2]
-	.loc 1 1457 0 discriminator 3
-	ldr	r2, [sp, #8]
+	cmp	r2, #1
+	bne	.L2117
+.L2116:
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L2117:
+	ldr	r2, .L2134+52
 	ldr	r2, [r2]
-	strh	ip, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-.LVL2451:
-	sxth	r3, r3
-.LVL2452:
-	b	.L2215
-.LVL2453:
-.L2211:
-	.loc 1 1465 0 discriminator 1
-	ldr	r3, .L2250+16
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L2212
-	.loc 1 1467 0 discriminator 1
-	ldr	r4, .L2250+28
-	ldrh	r5, [r4]
-.L2220:
-	sxth	r3, r2
-.LVL2454:
-	cmp	r3, r5
-	mov	r7, r3
-	bge	.L2212
-	.loc 1 1469 0
-	ldrh	ip, [r0, r3, lsl #1]
-	adds	r2, r2, #1
-	cmp	ip, #0
-	beq	.L2220
-	.loc 1 1474 0 discriminator 1
-	ldr	ip, .L2250+20
-	.loc 1 1475 0 discriminator 1
-	mov	lr, #0
-.LVL2455:
-.L2221:
-	.loc 1 1471 0 discriminator 1
-	ldrh	r2, [r4]
-	cmp	r3, r2
-	bge	.L2212
-	.loc 1 1473 0 discriminator 3
-	ldr	r2, [r1]
-	subs	r0, r3, r7
-	ldrh	r5, [r2, r3, lsl #1]
-	strh	r5, [r2, r0, lsl #1]	@ movhi
-	.loc 1 1474 0 discriminator 3
-	ldr	r2, [ip]
-	ldr	r5, [r2, r3, lsl #2]
-	str	r5, [r2, r0, lsl #2]
-	.loc 1 1475 0 discriminator 3
-	ldr	r2, [r1]
-	strh	lr, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-.LVL2456:
-	sxth	r3, r3
-.LVL2457:
-	b	.L2221
-.L2251:
+	cmp	r2, #0
+	beq	.L2114
+	ldr	r2, .L2134+56
+	ldr	r2, [r2]
+	cmp	r2, #39
+	itt	ls
+	movls	r2, #1
+	strbls	r2, [r3, #8]
+	b	.L2114
+.L2135:
 	.align	2
-.L2250:
-	.word	.LANCHOR224
+.L2134:
+	.word	.LANCHOR40
+	.word	.LANCHOR219
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR70
-	.word	.LANCHOR190
-	.word	.LANCHOR71
-	.word	.LANCHOR61
-	.word	.LANCHOR126
-	.word	.LANCHOR64
-	.word	.LANCHOR127
-	.word	.LANCHOR206
-	.cfi_endproc
-.LFE361:
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.word	.LANCHOR77
+	.word	.LANCHOR84
+	.word	.LANCHOR93
+	.word	.LANCHOR44
+	.word	.LANCHOR8
+	.word	.LANCHOR133
+	.word	.LANCHOR92
+	.word	.LANCHOR158
+	.word	.LANCHOR28
+	.word	.LANCHOR170
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
-	.global	FtlLoadSysInfo
+	.global	FtlVendorPartRead
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-.LFB365:
-	.loc 1 1515 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1520 0
-	movs	r1, #0
-	.loc 1 1523 0
-	ldr	r6, .L2277
-	.loc 1 1521 0
-	ldr	r10, .L2277+156
-	.loc 1 1523 0
-	ldrh	r2, [r6]
-	ldr	r7, .L2277+4
-	.loc 1 1521 0
-	ldr	r3, [r10]
-	.loc 1 1520 0
-	ldr	r4, .L2277+8
-	.loc 1 1524 0
-	ldr	r5, .L2277+12
-	.loc 1 1523 0
-	lsls	r2, r2, #1
-	ldr	r0, [r7]
-	mov	r8, r7
-	.loc 1 1521 0
-	str	r3, [r4, #12]
-	.loc 1 1520 0
-	str	r1, [r4, #8]
-	.loc 1 1523 0
-	bl	ftl_memset
-.LVL2458:
-	.loc 1 1524 0
-	ldrh	r0, [r5]
-	movw	r3, #65535
-	cmp	r0, r3
-	bne	.L2253
-.L2262:
-	.loc 1 1525 0
-	mov	r0, #-1
-.L2252:
-	.loc 1 1623 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2253:
-	.cfi_restore_state
-	.loc 1 1527 0
-	movs	r1, #1
-	.loc 1 1532 0
-	ldr	fp, .L2277+160
-	.loc 1 1527 0
-	bl	FtlGetLastWrittenPage
-.LVL2459:
-	.loc 1 1536 0
-	ldr	r3, .L2277+16
-	.loc 1 1527 0
-	sxth	r7, r0
-.LVL2460:
-	.loc 1 1528 0
-	adds	r0, r0, #1
-	strh	r0, [r5, #2]	@ movhi
-.L2255:
-	.loc 1 1530 0
-	cmp	r7, #0
-	bge	.L2258
-	.loc 1 1543 0
-	ldr	r1, .L2277+20
-	movw	r2, #1543
-	ldr	r0, .L2277+24
-	bl	printf
-.LVL2461:
-	ldr	r1, .L2277+28
-	ldr	r0, .L2277+32
-	bl	printf
-.LVL2462:
-.L2257:
-	.loc 1 1545 0
-	ldr	r2, .L2277+36
-	ldrh	r3, [r6]
-	ldrh	r2, [r2]
-	adds	r3, r3, #24
-	cmp	r2, r3, lsl #1
-	bcs	.L2260
-	.loc 1 1545 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2277+20
-	movw	r2, #1545
-	ldr	r0, .L2277+24
-	bl	printf
-.LVL2463:
-	ldr	r1, .L2277+28
-	ldr	r0, .L2277+32
-	bl	printf
-.LVL2464:
-.L2260:
-	.loc 1 1547 0 is_stmt 1
-	movs	r2, #48
-	ldr	r1, [r4, #8]
-	ldr	r0, .L2277+40
-	bl	ftl_memcpy
-.LVL2465:
-	.loc 1 1548 0
-	ldrh	r2, [r6]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r8]
-	lsls	r2, r2, #1
-	adds	r1, r1, #48
-	bl	ftl_memcpy
-.LVL2466:
-	.loc 1 1549 0
-	ldrh	r1, [r6]
-	ldr	r3, [r4, #8]
-	lsrs	r2, r1, #3
-	adds	r1, r1, #24
-	lsls	r1, r1, #1
-	adds	r2, r2, #4
-	bic	r1, r1, #3
-	add	r1, r1, r3
-	ldr	r3, .L2277+44
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-.LVL2467:
-	.loc 1 1550 0
-	ldr	r3, .L2277+48
-	ldrh	r3, [r3]
-	cbz	r3, .L2261
-.LBB495:
-	.loc 1 1551 0
-	ldrh	r1, [r6]
-.LVL2468:
-	.loc 1 1552 0
-	ldr	r3, .L2277+52
-	ldrh	r2, [r3]
-	.loc 1 1551 0
-	lsrs	r3, r1, #3
-	add	r3, r3, r1, lsl #1
-	.loc 1 1552 0
-	ldr	r1, [r4, #8]
-.LVL2469:
-	.loc 1 1551 0
-	adds	r3, r3, #52
-	.loc 1 1552 0
-	lsls	r2, r2, #2
-	ubfx	r3, r3, #2, #14
-	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2277+56
-	ldr	r0, [r3]
-	bl	ftl_memcpy
-.LVL2470:
-.L2261:
-.LBE495:
-	.loc 1 1556 0
-	ldr	r4, .L2277+40
-	ldr	r3, .L2277+16
-	ldr	r2, [r4]
-	cmp	r2, r3
-	bne	.L2262
-	.loc 1 1560 0
-	ldr	r3, .L2277+60
-	ldrb	r2, [r4, #10]	@ zero_extendqisi2
-	.loc 1 1559 0
-	ldrh	r6, [r4, #8]
-	.loc 1 1560 0
-	ldrh	r3, [r3]
-	.loc 1 1559 0
-	strh	r6, [r5, #6]	@ movhi
-	.loc 1 1560 0
-	cmp	r2, r3
-	bne	.L2262
-	.loc 1 1563 0
-	ldr	r3, .L2277+64
-	.loc 1 1564 0
-	ldr	r2, .L2277+68
-	.loc 1 1563 0
-	str	r6, [r3]
-	.loc 1 1564 0
-	ldr	r3, .L2277+72
-	ldrh	r3, [r3]
-	muls	r3, r6, r3
-	str	r3, [r2]
-	.loc 1 1565 0
-	ldr	r2, .L2277+76
-	ldrh	r2, [r2]
-	muls	r3, r2, r3
-	ldr	r2, .L2277+80
-	str	r3, [r2]
-	.loc 1 1566 0
-	ldr	r3, .L2277+84
-	ldr	r5, [r3]
-	ldr	r3, .L2277+88
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L2277+92
-	subs	r0, r5, r0
-	ldrh	r1, [r3]
-	subs	r0, r0, r6
-	bl	__aeabi_uidiv
-.LVL2471:
-	ldr	r3, .L2277+96
-	.loc 1 1572 0
-	cmp	r6, r5
-	.loc 1 1566 0
-	strh	r0, [r3]	@ movhi
-	.loc 1 1572 0
-	bls	.L2263
-	.loc 1 1572 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2277+20
-	movw	r2, #1572
-	ldr	r0, .L2277+24
-	bl	printf
-.LVL2472:
-	ldr	r1, .L2277+28
-	ldr	r0, .L2277+32
-	bl	printf
-.LVL2473:
-.L2263:
-	.loc 1 1575 0 is_stmt 1
-	ldrh	r2, [r4, #16]
-	.loc 1 1574 0
-	ldr	r3, .L2277+100
-	ldrh	ip, [r4, #14]
-	.loc 1 1579 0
-	ldr	r7, .L2277+104
-.LVL2474:
-	.loc 1 1575 0
-	lsrs	r1, r2, #6
-	.loc 1 1576 0
-	and	r2, r2, #63
-	strb	r2, [r3, #6]
-	.loc 1 1577 0
-	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	.loc 1 1575 0
-	strh	r1, [r3, #2]	@ movhi
-	.loc 1 1584 0
-	ldr	r1, .L2277+108
-	.loc 1 1577 0
-	strb	r2, [r3, #8]
-	.loc 1 1584 0
-	ldrh	r2, [r4, #18]
-	.loc 1 1574 0
-	strh	ip, [r3]	@ movhi
-	.loc 1 1579 0
-	movw	r3, #65535
-	strh	r3, [r7]	@ movhi
-	.loc 1 1580 0
-	movs	r3, #0
-	.loc 1 1584 0
-	strh	r2, [r1]	@ movhi
-	.loc 1 1585 0
-	ldrh	r2, [r4, #20]
-	.loc 1 1580 0
-	strh	r3, [r7, #2]	@ movhi
-	.loc 1 1581 0
-	strb	r3, [r7, #6]
-	.loc 1 1582 0
-	strb	r3, [r7, #8]
-	.loc 1 1585 0
-	lsrs	r5, r2, #6
-	.loc 1 1586 0
-	and	r2, r2, #63
-	strb	r2, [r1, #6]
-	.loc 1 1587 0
-	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	.loc 1 1585 0
-	strh	r5, [r1, #2]	@ movhi
-	.loc 1 1589 0
-	ldrh	r5, [r4, #22]
-	.loc 1 1587 0
-	strb	r2, [r1, #8]
-	.loc 1 1589 0
-	ldr	r2, .L2277+112
-	strh	r5, [r2]	@ movhi
-	.loc 1 1590 0
-	ldrh	r5, [r4, #24]
-	lsrs	r6, r5, #6
-	.loc 1 1591 0
-	and	r5, r5, #63
-	strb	r5, [r2, #6]
-	.loc 1 1592 0
-	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	.loc 1 1590 0
-	strh	r6, [r2, #2]	@ movhi
-	.loc 1 1599 0
-	ldr	r6, [r4, #32]
-	.loc 1 1592 0
-	strb	r5, [r2, #8]
-	.loc 1 1594 0
-	ldr	r5, .L2277+116
-	str	r3, [r5]
-	.loc 1 1595 0
-	ldr	r5, .L2277+120
-	str	r3, [r5]
-	.loc 1 1596 0
-	ldr	r5, .L2277+124
-	str	r3, [r5]
-	.loc 1 1597 0
-	ldr	r5, .L2277+128
-	str	r3, [r5]
-	.loc 1 1599 0
-	ldr	r5, .L2277+132
-	str	r6, [r5]
+	ldr	r3, .L2146
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	adds	r2, r0, r1
+	sub	sp, sp, #56
+	mov	r7, r0
 	mov	r6, r1
-	.loc 1 1600 0
-	ldr	r5, .L2277+136
-	str	r3, [r5]
-	.loc 1 1601 0
-	ldr	r5, .L2277+140
-	str	r3, [r5]
-	.loc 1 1602 0
-	ldr	r5, .L2277+144
-	.loc 1 1604 0
-	ldr	lr, [r4, #40]
-	.loc 1 1602 0
-	str	r3, [r5]
-	.loc 1 1604 0
-	ldr	r3, .L2277+148
-	ldr	r5, [r3]
-	cmp	lr, r5
-	mov	r5, r2
-	.loc 1 1605 0
-	it	hi
-	strhi	lr, [r3]
-	.loc 1 1607 0
-	ldr	r3, .L2277+152
-	ldr	r2, [r4, #36]
-	ldr	r1, [r3]
-	cmp	r2, r1
-	.loc 1 1608 0
-	it	hi
-	strhi	r2, [r3]
-	.loc 1 1610 0
-	movw	r3, #65535
-	cmp	ip, r3
-	beq	.L2266
-	.loc 1 1611 0
-	ldr	r0, .L2277+100
-	bl	make_superblock
-.LVL2475:
-.L2266:
-	.loc 1 1613 0
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2267
-	.loc 1 1614 0
-	ldr	r0, .L2277+108
-	bl	make_superblock
-.LVL2476:
-.L2267:
-	.loc 1 1616 0
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2268
-	.loc 1 1617 0
-	ldr	r0, .L2277+112
-	bl	make_superblock
-.LVL2477:
-.L2268:
-	.loc 1 1619 0
-	ldrh	r2, [r7]
-	movw	r3, #65535
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	beq	.L2269
-	.loc 1 1620 0
-	ldr	r0, .L2277+104
-	bl	make_superblock
-.LVL2478:
-.L2269:
-	.loc 1 1622 0
-	movs	r0, #0
-	b	.L2252
-.LVL2479:
-.L2258:
-	.loc 1 1531 0
-	ldrh	r2, [r5]
-	.loc 1 1533 0
-	ldr	r0, .L2277+8
-	str	r3, [sp, #4]
-	.loc 1 1531 0
-	orr	r2, r7, r2, lsl #10
-	str	r2, [r4, #4]
-	.loc 1 1532 0
+	bhi	.L2145
+	ldr	r3, .L2146+4
+	mov	r8, #0
+	ldr	fp, .L2146+28
+	ldrh	r5, [r3]
+	lsr	r5, r0, r5
+	lsls	r3, r5, #2
+	str	r3, [sp]
+.L2138:
+	cbnz	r6, .L2144
+.L2136:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2144:
+	ldr	r3, .L2146+8
+	mov	r0, r7
+	ldr	r2, [sp]
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L2146+12
+	str	r3, [sp, #8]
+	ldrh	r4, [r2]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+	subs	r4, r4, r1
+	ldr	r3, [sp, #8]
+	uxth	r4, r4
+	str	r1, [sp, #4]
+	cmp	r6, r4
+	it	cc
+	uxthcc	r4, r6
+	lsls	r2, r4, #9
+	str	r2, [sp, #8]
+	cmp	r3, #0
+	beq	.L2140
 	ldr	r2, [fp]
-	str	r2, [r4, #8]
-	.loc 1 1533 0
+	add	r0, sp, #20
+	str	r3, [sp, #24]
+	str	r3, [sp, #12]
+	str	r2, [sp, #28]
+	movs	r2, #0
+	str	r2, [sp, #32]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL2480:
-	.loc 1 1536 0
-	ldr	r2, [r4]
-	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #12]
 	adds	r2, r2, #1
-	beq	.L2256
-	.loc 1 1537 0 discriminator 1
-	ldr	r2, [fp]
-	.loc 1 1536 0 discriminator 1
+	ldr	r2, .L2146+16
+	it	eq
+	moveq	r8, #-1
 	ldr	r2, [r2]
-	cmp	r2, r3
-	bne	.L2256
-	.loc 1 1538 0
-	ldr	r2, [r10]
-	ldrh	r1, [r2]
-	.loc 1 1537 0
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L2257
-.L2256:
-	subs	r7, r7, #1
-.LVL2481:
-	sxth	r7, r7
-.LVL2482:
-	b	.L2255
-.L2278:
+	cmp	r2, #256
+	bne	.L2142
+	mov	r2, r3
+	mov	r1, r5
+	ldr	r0, .L2146+20
+	bl	printf
+	ldr	r2, [fp]
+	mov	r1, r5
+	ldr	r0, .L2146+24
+	bl	FtlMapWritePage
+.L2142:
+	ldr	r1, [fp]
+	lsls	r2, r4, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
+	add	r1, r1, r3, lsl #9
+	bl	ftl_memcpy
+.L2143:
+	ldr	r3, [sp, #8]
+	adds	r5, r5, #1
+	subs	r6, r6, r4
+	add	r7, r7, r4
+	add	r10, r10, r3
+	ldr	r3, [sp]
+	adds	r3, r3, #4
+	str	r3, [sp]
+	b	.L2138
+.L2140:
+	lsls	r2, r4, #9
+	mov	r1, r3
+	mov	r0, r10
+	bl	ftl_memset
+	b	.L2143
+.L2145:
+	mov	r8, #-1
+	b	.L2136
+.L2147:
 	.align	2
-.L2277:
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-	.word	.LANCHOR199
-	.word	.LANCHOR206
-	.word	1179929683
-	.word	.LANCHOR225
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
+.L2146:
+	.word	.LANCHOR50
 	.word	.LANCHOR57
-	.word	.LANCHOR80
-	.word	.LANCHOR0
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR192
-	.word	.LANCHOR44
-	.word	.LANCHOR226
-	.word	.LANCHOR72
-	.word	.LANCHOR52
-	.word	.LANCHOR55
-	.word	.LANCHOR68
-	.word	.LANCHOR41
-	.word	.LANCHOR74
-	.word	.LANCHOR37
-	.word	.LANCHOR227
-	.word	.LANCHOR91
-	.word	.LANCHOR201
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR166
-	.word	.LANCHOR161
-	.word	.LANCHOR156
-	.word	.LANCHOR157
+	.word	.LANCHOR194
+	.word	.LANCHOR56
+	.word	.LANCHOR202
+	.word	.LC43
+	.word	.LANCHOR215
 	.word	.LANCHOR185
-	.word	.LANCHOR180
-	.cfi_endproc
-.LFE365:
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
-	.global	FtlMapTblRecovery
+	.global	FtlLoadEctTbl
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-.LFB366:
-	.loc 1 1626 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 32
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2483:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 1 1630 0
-	ldr	r3, [r0, #24]
-	.loc 1 1626 0
-	mov	r4, r0
-	.loc 1 1637 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L2150
+	ldr	r5, .L2150+4
+	ldr	r2, [r4]
+	ldrh	r1, [r5]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	ldr	r3, .L2150+8
+	cmp	r2, r3
+	beq	.L2149
+	ldr	r1, .L2150+12
+	ldr	r0, .L2150+16
+	bl	printf
+	ldrh	r2, [r5]
 	movs	r1, #0
-	.loc 1 1643 0
-	movs	r5, #0
-	.loc 1 1633 0
-	ldrh	fp, [r0, #6]
-	.loc 1 1630 0
-	str	r3, [sp, #20]
-.LVL2484:
-	.loc 1 1631 0
-	ldr	r3, [r0, #12]
-.LVL2485:
-	.loc 1 1637 0
-	lsl	r2, fp, #2
-	.loc 1 1631 0
-	str	r3, [sp, #12]
-.LVL2486:
-	.loc 1 1632 0
-	ldr	r3, [r0, #16]
-.LVL2487:
-	str	r3, [sp, #28]
-.LVL2488:
-	.loc 1 1634 0
-	ldrh	r3, [r0, #8]
-.LVL2489:
-	.loc 1 1637 0
-	ldr	r0, [sp, #20]
-.LVL2490:
-	.loc 1 1634 0
-	str	r3, [sp, #24]
-.LVL2491:
-	.loc 1 1637 0
+	ldr	r0, [r4]
+	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL2492:
-	.loc 1 1638 0
-	ldr	r2, .L2321
-	ldr	r3, .L2321+4
-	.loc 1 1643 0
-	str	r5, [r4, #32]
-	.loc 1 1638 0
-	ldr	r1, [r2]
-	.loc 1 1644 0
-	str	r5, [r4, #28]
-	str	r3, [sp, #16]
-	.loc 1 1638 0
-	str	r1, [r3, #8]
-	.loc 1 1639 0
-	ldr	r1, .L2321+8
-	str	r2, [sp, #36]
-	ldr	r6, [r1]
-	.loc 1 1641 0
-	movw	r1, #65535
-	.loc 1 1639 0
-	str	r6, [r3, #12]
-.LVL2493:
-	.loc 1 1641 0
-	strh	r1, [r4]	@ movhi
-	.loc 1 1642 0
-	strh	r1, [r4, #2]	@ movhi
-	.loc 1 1645 0
-	movs	r1, #1
-	str	r1, [r4, #36]
-.LVL2494:
-.L2280:
-	.loc 1 1646 0 discriminator 1
-	ldr	r3, [sp, #24]
-	sxth	r10, r5
-.LVL2495:
-	cmp	r10, r3
-	bge	.L2298
-	.loc 1 1648 0
-	ldr	r3, [sp, #24]
-	lsl	r7, r10, #1
-	subs	r3, r3, #1
-	cmp	r10, r3
-	bne	.L2281
-	.loc 1 1650 0
-	ldr	r3, [sp, #12]
+.L2149:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2151:
+	.align	2
+.L2150:
+	.word	.LANCHOR191
+	.word	.LANCHOR190
+	.word	1112818501
+	.word	.LC44
+	.word	.LC7
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
 	movs	r1, #1
-	ldrh	r0, [r3, r10, lsl #1]
-	add	r7, r7, r3
-	bl	FtlGetLastWrittenPage
-.LVL2496:
-	.loc 1 1653 0
-	ldr	r3, [sp, #28]
-	.loc 1 1650 0
-	sxth	r8, r0
-.LVL2497:
-	.loc 1 1651 0
-	adds	r0, r0, #1
-	.loc 1 1652 0
-	strh	r5, [r4]	@ movhi
-	.loc 1 1651 0
-	strh	r0, [r4, #2]	@ movhi
-	.loc 1 1655 0
-	movs	r5, #0
-	.loc 1 1653 0
-	ldr	r3, [r3, r10, lsl #2]
-	.loc 1 1657 0
-	ldr	r10, .L2321+4
-.LVL2498:
-	.loc 1 1653 0
-	str	r3, [r4, #28]
-.LVL2499:
-.L2282:
-	sxth	r3, r5
-.LVL2500:
-	.loc 1 1655 0 discriminator 1
-	cmp	r3, r8
-	ble	.L2285
-.LVL2501:
-.L2298:
-	.loc 1 1712 0
-	ldr	r7, .L2321+12
-	cmp	r4, r7
-	bne	.L2287
-	.loc 1 1712 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2321+16
-	ldrh	r3, [r3]
-	cbz	r3, .L2287
-.LBB496:
-.LBB497:
-	.loc 1 1746 0 is_stmt 1 discriminator 1
-	ldr	r8, .L2321+40
-.LBE497:
-.LBE496:
-	movs	r6, #0
-.LVL2502:
-.L2301:
-.LBB500:
-	.loc 1 1717 0 discriminator 1
-	ldr	r3, .L2321+20
-	ldrh	r3, [r3]
-	cmp	r6, r3
-	bcc	.L2309
-.LVL2503:
-.L2287:
-.LBE500:
-	.loc 1 1766 0
+	ldr	r4, .L2156
+	movs	r0, #0
+	ldr	r5, .L2156+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	cmp	r3, r5
+	beq	.L2153
+	mov	r2, #512
+	movs	r1, #0
 	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-.LVL2504:
-	.loc 1 1767 0
-	ldr	r3, .L2321+24
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3]
+	bl	ftl_memset
+	str	r5, [r4]
+.L2153:
+	ldr	r3, [r4]
+	cmp	r3, r5
+	ldr	r5, .L2156+8
+	bne	.L2154
+	ldr	r2, [r4, #88]
+	ldr	r3, .L2156+12
+	str	r2, [r3]
+	ldr	r2, [r4, #92]
+	ldr	r3, .L2156+16
+	str	r2, [r3]
+	ldr	r2, [r4, #8]
+	ldr	r3, .L2156+20
+	str	r2, [r3]
+	ldr	r2, [r4, #12]
+	ldr	r3, .L2156+24
+	str	r2, [r3]
+	ldr	r2, [r4, #16]
+	ldr	r3, .L2156+28
+	str	r2, [r3]
+	ldr	r2, [r4, #20]
+	ldr	r3, .L2156+32
+	str	r2, [r3]
+	ldr	r3, [r4, #28]
+	ldr	r2, [r4, #32]
+	str	r3, [r5]
+	ldr	r3, .L2156+36
+	str	r2, [r3]
+	ldr	r2, [r4, #36]
+	ldr	r3, .L2156+40
+	str	r2, [r3]
+	ldr	r2, [r4, #40]
+	ldr	r3, .L2156+44
+	str	r2, [r3]
+	ldr	r2, [r4, #44]
+	ldr	r3, .L2156+48
+	str	r2, [r3]
+	ldr	r2, [r4, #48]
+	ldr	r3, .L2156+52
+	str	r2, [r3]
+	ldr	r2, [r4, #60]
+	ldr	r3, .L2156+56
+	str	r2, [r3]
+.L2154:
+	ldr	r3, .L2156+60
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r2, [r4, #68]
+	ldr	r3, .L2156+64
 	cmp	r2, r3
-	bne	.L2300
-	.loc 1 1769 0
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.LVL2505:
-.L2300:
-	.loc 1 1772 0
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-.LVL2506:
-	.loc 1 1774 0
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-.LVL2507:
-	.loc 1 1776 0
-	movs	r0, #0
-	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2508:
-.L2285:
-	.cfi_restore_state
-	.loc 1 1657 0
-	ldrh	r2, [r7]
-	.loc 1 1658 0
-	ldr	r0, .L2321+4
-	.loc 1 1657 0
-	orr	r3, r3, r2, lsl #10
-.LVL2509:
-	.loc 1 1658 0
+	bne	.L2155
+	ldr	r3, .L2156+68
 	movs	r2, #1
-	mov	r1, r2
-	.loc 1 1657 0
-	str	r3, [r10, #4]
-	.loc 1 1658 0
-	bl	FlashReadPages
-.LVL2510:
-	.loc 1 1661 0
-	ldr	r3, [r10]
-	adds	r3, r3, #1
-	beq	.L2283
-	.loc 1 1663 0
-	ldrh	r3, [r6, #8]
-	cmp	fp, r3
-	bls	.L2284
-	.loc 1 1663 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r6]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	bne	.L2284
-	.loc 1 1665 0 is_stmt 1
-	ldr	r2, [r10, #4]
-	ldr	r1, [sp, #20]
-	str	r2, [r1, r3, lsl #2]
-.L2284:
-.LVL2511:
-	adds	r5, r5, #1
-.LVL2512:
-	b	.L2282
-.LVL2513:
-.L2283:
-	.loc 1 1668 0
-	ldrh	r3, [r7]
-	strh	r3, [r4, #40]	@ movhi
-	b	.L2284
-.LVL2514:
-.L2281:
-	.loc 1 1674 0
-	ldr	r3, .L2321
-	ldr	r8, .L2321+4
+	ldr	r1, .L2156+72
+	ldr	r0, .L2156+76
+	str	r2, [r3]
+	bl	printf
+.L2155:
+	ldr	r3, .L2156+80
+	ldr	r1, .L2156+84
+	ldrh	r2, [r3]
+	ldr	r3, .L2156+88
+	ldrh	r1, [r1]
+	ldr	r0, [r3]
+	ldr	r3, [r5]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2156+92
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L2157:
+	.align	2
+.L2156:
+	.word	.LANCHOR138
+	.word	1179929683
+	.word	.LANCHOR168
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR166
+	.word	.LANCHOR165
+	.word	.LANCHOR80
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.word	305432421
+	.word	.LANCHOR28
+	.word	.LC45
+	.word	.LC7
+	.word	.LANCHOR48
+	.word	.LANCHOR40
+	.word	.LANCHOR167
+	.word	.LANCHOR205
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDumpData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #36]
+	cmp	r3, #0
+	beq	.L2158
+	movs	r3, #0
+	ldrh	r6, [r0, #6]
+	str	r3, [r0, #36]
+	ldr	r3, .L2172
+	ldr	r10, [r0, #24]
 	ldr	r3, [r3]
-	.loc 1 1676 0
-	mov	r0, r8
-	.loc 1 1674 0
-	str	r3, [r8, #8]
-	.loc 1 1675 0
-	ldr	r3, [sp, #12]
-	add	r3, r3, r7
-	ldr	r7, .L2321+24
-	str	r3, [sp, #32]
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r3, r10, lsl #1]
-	ldrh	r3, [r7]
+	cmp	r3, #0
+	bne	.L2158
+	ldr	r3, .L2172+4
+	ldr	r5, .L2172+8
+	ldr	r3, [r3]
+	mov	r7, r5
+	str	r3, [r5, #8]
+	ldr	r3, .L2172+12
+	ldr	r8, [r3]
+	ldrh	r3, [r0, #2]
+	str	r8, [r5, #12]
+	cbz	r3, .L2162
+	ldr	r2, .L2172+16
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L2162
+	ldrh	r2, [r0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L2162
+	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
 	orr	r3, r3, r2, lsl #10
-	.loc 1 1676 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 1 1675 0
-	str	r3, [r8, #4]
-	.loc 1 1676 0
+	str	r3, [r5, #4]
 	bl	FlashReadPages
-.LVL2515:
-	.loc 1 1679 0
-	ldr	r3, [r8]
+	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2311
-	.loc 1 1679 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
-	ldrh	r3, [r4, #4]
-	cmp	r2, r3
-	bne	.L2311
-	.loc 1 1679 0 discriminator 2
-	ldrh	r2, [r6, #8]
-	movw	r3, #64245
+	beq	.L2162
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r8, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	beq	.L2289
-.L2311:
-	.loc 1 1695 0 is_stmt 1
-	ldr	r10, .L2321+24
-.LVL2516:
-	movs	r7, #0
-	.loc 1 1697 0
-	ldr	r8, .L2321+4
-.L2290:
-.LVL2517:
-	.loc 1 1695 0 discriminator 1
-	ldrh	r2, [r10]
-	sxth	r3, r7
-	cmp	r3, r2
-	bge	.L2296
-	.loc 1 1697 0
-	ldr	r2, [sp, #32]
-	.loc 1 1698 0
-	ldr	r0, .L2321+4
-	.loc 1 1697 0
-	ldrh	r2, [r2]
-	orr	r3, r3, r2, lsl #10
-	.loc 1 1698 0
+	bne	.L2162
+	ldr	r2, [r5, #8]
+.L2171:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	FtlMapWritePage
+.L2162:
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ldr	r3, [r10, r6, lsl #2]
+	str	r3, [r7, #4]
+	cbz	r3, .L2163
 	movs	r2, #1
+	ldr	r0, .L2172+8
 	mov	r1, r2
-	.loc 1 1697 0
-	str	r3, [r8, #4]
-	.loc 1 1698 0
 	bl	FlashReadPages
-.LVL2518:
-	.loc 1 1701 0
-	ldr	r3, [r8]
-	adds	r3, r3, #1
-	beq	.L2294
-	.loc 1 1703 0
-	ldrh	r3, [r6, #8]
-	cmp	fp, r3
-	bls	.L2294
-	.loc 1 1703 0 is_stmt 0 discriminator 1
-	ldrh	r1, [r6]
-	ldrh	r2, [r4, #4]
-	cmp	r1, r2
-	.loc 1 1705 0 is_stmt 1 discriminator 1
-	ittt	eq
-	ldreq	r2, [r8, #4]
-	ldreq	r1, [sp, #20]
-	streq	r2, [r1, r3, lsl #2]
-.L2294:
-.LVL2519:
-	adds	r7, r7, #1
-.LVL2520:
-	b	.L2290
-.LVL2521:
-.L2289:
-	movs	r1, #0
-.L2291:
-	.loc 1 1682 0 discriminator 1
+.L2164:
+	ldr	r2, [r7, #8]
+	mov	r1, r6
+	b	.L2171
+.L2163:
+	ldr	r3, .L2172+20
+	movs	r1, #255
+	ldr	r0, [r7, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L2164
+.L2158:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2173:
+	.align	2
+.L2172:
+	.word	.LANCHOR77
+	.word	.LANCHOR184
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LANCHOR54
+	.word	.LANCHOR58
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L2256
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L2256+4
+	ldr	r2, [r5]
+	ldr	r6, .L2256+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L2256+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L2256+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2256+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
 	ldrh	r2, [r7]
-	sxth	r3, r1
-.LVL2522:
-	subs	r2, r2, #1
+	mov	r1, r4
+	ldr	r3, .L2256+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2256+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L2256+32
+	bl	ftl_memset
+	ldr	r3, .L2256+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L2175:
+	ldr	r3, .L2256+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
 	cmp	r3, r2
-	blt	.L2293
-.LVL2523:
-.L2296:
+	bls	.L2217
+	ldr	r3, .L2256+44
+	movs	r5, #0
+	ldr	r1, .L2256+48
+	mov	fp, r5
+	movs	r7, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2256+52
+	ldr	r2, [r1]
+	ldr	r1, .L2256+56
+	ldr	r6, [r3]
+	ldr	r3, .L2256+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L2256+64
+	b	.L2218
+.L2177:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L2176
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L2176:
 	adds	r5, r5, #1
-.LVL2524:
-	b	.L2280
-.LVL2525:
-.L2293:
-	.loc 1 1684 0
-	ldr	r2, .L2321
-	lsls	r0, r3, #3
-	ldr	r2, [r2]
-	ldr	r3, [r2, r3, lsl #3]
-.LVL2526:
-	.loc 1 1685 0
-	uxth	ip, r3
-	cmp	fp, ip
-	bls	.L2292
-	.loc 1 1687 0
-	add	r2, r2, r0
-	ldr	r0, [sp, #20]
-	ldr	r2, [r2, #4]
-	str	r2, [r0, ip, lsl #2]
-.L2292:
-.LVL2527:
-	adds	r1, r1, #1
-.LVL2528:
-	b	.L2291
-.LVL2529:
-.L2309:
-.LBB501:
-	.loc 1 1718 0
-	ldr	r3, .L2321+28
-	lsls	r5, r6, #2
+.L2218:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L2177
+	cmp	fp, #0
+	bne	.L2178
+.L2216:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L2175
+.L2178:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L2179:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L2216
+	ldr	r3, .L2256+52
+	mov	r8, #36
+	mul	r8, r8, r7
 	ldr	r3, [r3]
-	ldr	r2, [r3, r6, lsl #2]
-	subs	r1, r2, #1
-	adds	r1, r1, #3
-	bhi	.L2303
-	.loc 1 1719 0 discriminator 1
-	ldr	fp, .L2321+44
-	ldr	r1, [fp]
-	.loc 1 1718 0 discriminator 1
-	ldr	r1, [r1, r6, lsl #2]
-	cmp	r2, r1
-	beq	.L2303
-	.loc 1 1721 0
-	ldr	r2, [sp, #36]
-	ldr	r1, [sp, #16]
-	.loc 1 1725 0
-	ldr	r0, .L2321+4
-	.loc 1 1721 0
-	ldr	r2, [r2]
-	str	r2, [r1, #8]
-	.loc 1 1722 0
-	ldr	r2, .L2321+8
-	ldr	r10, [r2]
-	.loc 1 1725 0
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
+	adds	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L2182
+	mov	r10, #16
+.L2184:
+	ldr	r3, .L2256+52
 	movs	r2, #1
-	.loc 1 1722 0
-	str	r10, [r1, #12]
-.LVL2530:
-	.loc 1 1724 0
-	ldr	r3, [r3, r5]
-	str	r3, [r1, #4]
-	.loc 1 1725 0
 	mov	r1, r2
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
 	bl	FlashReadPages
-.LVL2531:
-	.loc 1 1727 0
-	ldr	r3, [sp, #16]
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	ldr	r3, .L2256+52
+	ldr	r3, [r3]
+	bne	.L2181
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L2256+52
 	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	beq	.L2183
+.L2182:
+	ldr	r3, .L2256+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L2185
+	cmp	r2, r3
+	bhi	.L2186
+.L2185:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L2256+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L2186:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L2188
+	bhi	.L2189
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L2190
+.L2187:
+	adds	r7, r7, #1
+	b	.L2179
+.L2181:
+	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	beq	.L2303
-	.loc 1 1727 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r10]
-	ldrh	r3, [r7, #4]
+	bne	.L2182
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L2184
+.L2183:
+	ldr	r3, .L2256+72
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbnz	r1, .L2255
+.L2214:
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+	b	.L2187
+.L2189:
+	movw	r3, #61634
 	cmp	r2, r3
-	bne	.L2303
-	.loc 1 1733 0 is_stmt 1
-	ldr	r2, [fp]
-	ldr	r0, [sp, #16]
-	.loc 1 1728 0
-	ldr	r3, [r10, #4]
-.LVL2532:
-	.loc 1 1733 0
-	ldr	r1, [r2, r5]
-	str	r1, [r0, #4]
-	.loc 1 1734 0
-	ldr	r2, [r2, r5]
-	cbnz	r2, .L2305
-	.loc 1 1735 0
-	str	r2, [r10, #4]
-.LVL2533:
-.L2306:
-	.loc 1 1740 0
-	ldr	r2, [r10, #4]
-	cmp	r3, r2
-	bls	.L2303
-.LBB498:
-	.loc 1 1742 0
-	ldr	r10, .L2321+28
-.LVL2534:
-	ldr	fp, .L2321+44
-	ldr	r1, [r10]
-	ldr	r0, [fp]
-	str	r2, [sp]
-	ldr	r1, [r1, r5]
-	ldr	r2, [r0, r5]
-	ldr	r0, .L2321+32
+	beq	.L2191
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2187
+.L2255:
+	movs	r1, #0
+	b	.L2214
+.L2191:
+	ldr	r3, .L2256+8
+	ldrh	r2, [r3]
+	ldr	r3, .L2256
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L2193
+	ldr	r1, .L2256+76
+	movw	r2, #1308
+	ldr	r0, .L2256+80
 	bl	printf
-.LVL2535:
-	.loc 1 1744 0
-	ldr	r3, [r10]
-	ldr	r2, [r3, r5]
-	ldr	r3, [fp]
-	str	r2, [r3, r5]
-	.loc 1 1746 0
-	movs	r2, #0
-	.loc 1 1745 0
-	ldr	r3, [r10]
-	ldr	r0, [r3, r5]
-	.loc 1 1746 0
-	ldrh	r3, [r8]
-	.loc 1 1745 0
-	ubfx	r0, r0, #10, #16
-.LVL2536:
-.L2307:
-	sxth	r1, r2
-.LVL2537:
-	.loc 1 1746 0 discriminator 1
-	cmp	r1, r3
-	blt	.L2308
-	.loc 1 1751 0 discriminator 1
-	ldr	r2, .L2321+36
-	ldr	r2, [r2]
-	cmp	r3, r2
-	bcs	.L2303
-	.loc 1 1752 0
+	ldr	r1, .L2256+84
+	ldr	r0, .L2256+88
+	bl	printf
+.L2193:
+	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
-	strh	r0, [r2, r3, lsl #1]	@ movhi
-	.loc 1 1753 0
-	ldrh	r3, [r8]
-	adds	r3, r3, #1
-	strh	r3, [r8]	@ movhi
-	.loc 1 1755 0
-	bl	remove_from_free_sys_Queue
-.LVL2538:
-	b	.L2303
-.LVL2539:
-.L2305:
-.LBE498:
-	.loc 1 1737 0
-	movs	r2, #1
-	ldr	r0, .L2321+4
-	mov	r1, r2
-	str	r3, [sp, #20]
-	bl	FlashReadPages
-.LVL2540:
-	ldr	r3, [sp, #20]
-	b	.L2306
-.LVL2541:
-.L2308:
-.LBB499:
-	.loc 1 1747 0
-	ldr	r5, [sp, #12]
-	adds	r2, r2, #1
-	ldrh	r1, [r5, r1, lsl #1]
-.LVL2542:
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L2256+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L2194:
+	cmp	r3, r10
+	bgt	.L2200
+	cmp	r3, #0
+	bge	.L2233
+	b	.L2187
+.L2200:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L2195
+	ldr	r2, [ip]
+	cbnz	r2, .L2196
 	cmp	r1, r0
-	bne	.L2307
-.LVL2543:
-.L2303:
-.LBE499:
-	.loc 1 1717 0 discriminator 2
-	adds	r6, r6, #1
-.LVL2544:
-	b	.L2301
-.L2322:
+	ittt	ne
+	ldrne	r2, .L2256+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L2196:
+	ldr	r2, .L2256+20
+	uxth	r10, r3
+	ldr	r0, [r2]
+	movs	r2, #0
+.L2197:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2198
+	ldr	r2, [r6, #4]
+	cmp	r3, #0
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L2187
+	ldr	r2, .L2256+8
+	ldrh	r0, [r2]
+	ldr	r2, .L2256
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2187
+.L2233:
+	ldr	r2, .L2256+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L2256+20
+.L2253:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L2187
+.L2198:
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L2197
+.L2195:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2194
+.L2257:
 	.align	2
-.L2321:
-	.word	.LANCHOR180
-	.word	.LANCHOR199
-	.word	.LANCHOR185
-	.word	.LANCHOR124
-	.word	.LANCHOR69
-	.word	.LANCHOR66
-	.word	.LANCHOR53
-	.word	.LANCHOR192
-	.word	.LC45
-	.word	.LANCHOR64
-	.word	.LANCHOR125
+.L2256:
+	.word	.LANCHOR65
+	.word	.LANCHOR71
 	.word	.LANCHOR128
-.LBE501:
-	.cfi_endproc
-.LFE366:
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadVonderInfo
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-.LFB367:
-	.loc 1 1779 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 1780 0
-	ldr	r3, .L2324
-	ldr	r0, .L2324+4
-	ldrh	r3, [r3]
-	strh	r3, [r0, #10]	@ movhi
-	.loc 1 1781 0
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	.loc 1 1782 0
-	ldr	r3, .L2324+8
-	ldrh	r3, [r3]
-	strh	r3, [r0, #8]	@ movhi
-	.loc 1 1783 0
-	ldr	r3, .L2324+12
-	ldrh	r3, [r3]
-	strh	r3, [r0, #6]	@ movhi
-	.loc 1 1784 0
-	ldr	r3, .L2324+16
-	ldr	r3, [r3]
-	str	r3, [r0, #12]
-	.loc 1 1785 0
-	ldr	r3, .L2324+20
-	ldr	r3, [r3]
-	str	r3, [r0, #16]
-	.loc 1 1786 0
-	ldr	r3, .L2324+24
-	ldr	r3, [r3]
-	str	r3, [r0, #20]
-	.loc 1 1787 0
-	ldr	r3, .L2324+28
+	.word	.LANCHOR130
+	.word	.LANCHOR62
+	.word	.LANCHOR129
+	.word	.LANCHOR193
+	.word	.LANCHOR72
+	.word	.LANCHOR209
+	.word	.LANCHOR40
+	.word	.LANCHOR41
+	.word	.LANCHOR38
+	.word	.LANCHOR106
+	.word	.LANCHOR180
+	.word	.LANCHOR59
+	.word	.LANCHOR105
+	.word	.LANCHOR47
+	.word	.LANCHOR159
+	.word	.LANCHOR8
+	.word	.LANCHOR220
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+.L2190:
+	ldr	r8, .L2258+20
+	ldr	r10, .L2258+28
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L2203
+	ldr	r1, .L2258
+	movw	r2, #1355
+	ldr	r0, .L2258+4
+	bl	printf
+	ldr	r1, .L2258+8
+	ldr	r0, .L2258+12
+	bl	printf
+.L2203:
+	ldr	r2, .L2258+16
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L2204:
+	cmp	r3, r10
+	ble	.L2209
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L2205
+	ldr	r2, [r0]
+	cbnz	r2, .L2206
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L2258+20
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L2206:
+	ldr	r2, .L2258+24
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L2207:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2208
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L2209:
+	cmp	r3, #0
+	blt	.L2187
+	ldr	r2, .L2258+28
+	ldr	ip, .L2258+20
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2187
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L2258+24
+	b	.L2253
+.L2208:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L2207
+.L2205:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2204
+.L2188:
+	ldr	r8, .L2258+48
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L2211
+.L2254:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L2187
+.L2211:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L2212
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L2212:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L2213
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L2254
+.L2213:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L2187
+.L2217:
+	ldr	r3, .L2258+32
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L2219
+.L2222:
+	ldr	r3, .L2258+24
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L2220
+.L2221:
+	ldr	r3, .L2258+36
+	ldrh	r2, [r3]
+	ldr	r3, .L2258+40
 	ldr	r3, [r3]
-	str	r3, [r0, #24]
-	.loc 1 1788 0
-	movw	r3, #65535
-	strh	r3, [r0, #40]	@ movhi
-	.loc 1 1790 0
-	bl	FtlMapTblRecovery
-.LVL2545:
-	.loc 1 1793 0
+	cmp	r2, r3
+	bls	.L2252
+	ldr	r1, .L2258
+	movw	r2, #1489
+	ldr	r0, .L2258+4
+	bl	printf
+	ldr	r1, .L2258+8
+	ldr	r0, .L2258+12
+	bl	printf
+.L2252:
 	movs	r0, #0
-	pop	{r3, pc}
-.L2325:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2219:
+	ldr	r1, .L2258+36
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L2222
+	ldr	r5, .L2258+40
+	ldr	r0, [r5]
+.L2223:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L2222
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L2223
+	ldr	r3, .L2258+44
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L2224:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L2222
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L2224
+.L2220:
+	ldr	r3, .L2258+20
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2221
+	ldr	r5, .L2258+28
+	ldrh	r1, [r5]
+.L2229:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L2221
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L2229
+	ldr	r2, .L2258+16
+	movs	r0, #0
+	ldr	r2, [r2]
+.L2230:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L2221
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L2230
+.L2259:
 	.align	2
-.L2324:
-	.word	.LANCHOR61
-	.word	.LANCHOR215
-	.word	.LANCHOR70
-	.word	.LANCHOR62
+.L2258:
+	.word	.LANCHOR220
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR193
 	.word	.LANCHOR71
-	.word	.LANCHOR190
-	.word	.LANCHOR189
-	.word	.LANCHOR191
-	.cfi_endproc
-.LFE367:
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.word	.LANCHOR72
+	.word	.LANCHOR62
+	.word	.LANCHOR129
+	.word	.LANCHOR128
+	.word	.LANCHOR65
+	.word	.LANCHOR130
+	.word	.LANCHOR209
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
-	.global	FtlLoadMapInfo
+	.global	FtlLoadSysInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-.LFB369:
-	.loc 1 1820 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 1 1821 0
-	bl	FtlL2PDataInit
-.LVL2546:
-	.loc 1 1823 0
-	ldr	r0, .L2327
-	bl	FtlMapTblRecovery
-.LVL2547:
-	.loc 1 1828 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L2328:
-	.align	2
-.L2327:
-	.word	.LANCHOR124
-	.cfi_endproc
-.LFE369:
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlRecoverySuperblock,"ax",%progbits
-	.align	1
-	.global	FtlRecoverySuperblock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-.LFB372:
-	.loc 1 1879 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2548:
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 1893 0
-	movw	r2, #65535
-	ldrh	r3, [r0]
-	.loc 1 1879 0
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 1879 0
-	mov	r8, r0
-	.loc 1 1893 0
-	cmp	r3, r2
-	beq	.L2484
-	.loc 1 1898 0
-	ldrh	r3, [r0, #2]
-	str	r3, [sp, #8]
-.LVL2549:
-	.loc 1 1899 0
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	.loc 1 1904 0
-	ldr	r1, [sp, #8]
-	.loc 1 1899 0
-	str	r3, [sp, #24]
-.LVL2550:
-	.loc 1 1904 0
-	ldr	r3, .L2493
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	mov	r3, #0
-	bne	.L2332
-	.loc 1 1905 0
-	strh	r3, [r0, #4]	@ movhi
-.LVL2551:
-.L2491:
-	.loc 1 2254 0
-	strb	r3, [r8, #6]
-.LVL2552:
-.L2484:
-	.loc 1 2275 0
-	movs	r0, #0
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r8, .L2285+156
+	ldr	r5, .L2285
+	ldr	r3, [r8]
+	ldr	r4, .L2285+4
+	ldr	r10, .L2285+160
+	ldrh	r2, [r5]
+	ldr	r7, .L2285+8
+	str	r3, [r4, #8]
+	ldr	r6, .L2285+12
+	ldr	r3, [r10]
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	str	r3, [r4, #12]
+	bl	ftl_memset
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r7, [sp]
+	cmp	r0, r3
+	bne	.L2261
+.L2270:
+	mov	r0, #-1
+.L2260:
+	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2553:
-.L2332:
-	.cfi_restore_state
-	.loc 1 1912 0
-	ldrh	r0, [r0, #16]
-.LVL2554:
-.L2333:
-	.loc 1 1913 0
-	cmp	r0, r2
-	uxth	r5, r3
-.LVL2555:
-	add	r3, r3, #1
-	beq	.L2334
-	.loc 1 1919 0
-	ldrb	r1, [r8, #8]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L2335
-	.loc 1 1920 0
-	bl	FtlGetLastWrittenPage
-.LVL2556:
-	.loc 1 1922 0
-	adds	r6, r0, #1
-	.loc 1 1920 0
-	mov	r4, r0
-.LVL2557:
-	.loc 1 1922 0
-	beq	.L2336
-	.loc 1 1922 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2493+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2413
-	.loc 1 1923 0 is_stmt 1
-	ldr	r3, .L2493+8
-	ldrh	r5, [r3, r0, lsl #1]
-.LVL2558:
-.L2337:
-	.loc 1 1944 0 discriminator 1
-	ldr	r3, .L2493+12
-	.loc 1 1946 0 discriminator 1
-	movw	fp, #65535
-	.loc 1 1947 0 discriminator 1
-	mov	r10, #36
-	.loc 1 1944 0 discriminator 1
-	ldrh	ip, [r3]
-	.loc 1 1947 0 discriminator 1
-	ldr	r3, .L2493+16
-	ldr	r0, [r3]
-	.loc 1 1949 0 discriminator 1
-	ldr	r3, .L2493+20
-	ldr	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L2493+24
-	ldrh	lr, [r3]
-	add	r3, r8, #16
-	str	r3, [sp, #20]
-	str	r3, [sp]
-	movs	r3, #0
-	mov	r6, r3
-.L2338:
-.LVL2559:
-	.loc 1 1944 0 discriminator 1
-	uxth	r2, r3
-	cmp	ip, r2
-	bhi	.L2342
-	.loc 1 1953 0
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-.LVL2560:
-	cmp	r3, #1
-	bne	.L2414
-	.loc 1 1953 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2493+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #0
-	it	ne
-	movne	r3, #1
-.L2485:
-	str	r3, [sp, #32]
-.LVL2561:
-	.loc 1 1956 0 is_stmt 1
-	mov	r1, r6
-	ldr	r2, [sp, #32]
-.LVL2562:
-	.loc 1 1958 0
-	movs	r7, #0
-	.loc 1 1956 0
-	bl	FlashReadPages
-.LVL2563:
-	.loc 1 1957 0
-	ldr	r3, .L2493+28
-	.loc 1 1889 0
-	movw	r10, #65535
-	ldr	fp, .L2493+16
-	.loc 1 1957 0
-	ldr	r3, [r3]
-	subs	r3, r3, #1
-	str	r3, [sp]
-.LVL2564:
-.L2344:
-	uxth	r3, r7
-.LVL2565:
-	.loc 1 1958 0 discriminator 1
-	cmp	r6, r3
-	bhi	.L2349
-	.loc 1 1975 0
-	bne	.L2347
-	.loc 1 1977 0
-	adds	r4, r4, #1
-.LVL2566:
-	uxth	r3, r4
-.LVL2567:
-	str	r3, [sp, #4]
-.LVL2568:
-	.loc 1 1979 0
-	ldr	r3, [fp]
-	ldr	r0, [r3, #4]
-.LVL2569:
-.L2486:
-	.loc 1 1983 0
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
-.LVL2570:
-	.loc 1 1986 0
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	.loc 1 1983 0
-	str	r0, [sp, #12]
-.LVL2571:
-	.loc 1 1986 0
-	cmp	r3, #1
-	bne	.L2351
-	.loc 1 1986 0 is_stmt 0 discriminator 1
-	ldr	r2, .L2493+4
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2351
-	.loc 1 1987 0 is_stmt 1
-	ldr	r1, [sp, #4]
-	ldr	r2, .L2493+8
-	ldrh	r2, [r2, r1, lsl #1]
-	str	r2, [sp, #4]
-.LVL2572:
-.L2351:
-	.loc 1 1990 0
-	ldr	r2, .L2493
-	ldr	r1, [sp, #4]
-	ldrh	r2, [r2]
-	cmp	r2, r1
-	bne	.L2352
-	.loc 1 1991 0
-	ldrh	r2, [sp, #4]
-	strh	r2, [r8, #2]	@ movhi
-	.loc 1 1992 0
-	movs	r2, #0
-	strb	r2, [r8, #6]
-	.loc 1 1993 0
-	strh	r2, [r8, #4]	@ movhi
-.L2352:
-	.loc 1 1996 0
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #8]
-	cmp	r2, r1
-	bne	.L2353
-	.loc 1 1996 0 is_stmt 0 discriminator 1
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #24]
-	cmp	r2, r1
-	bne	.L2353
-.LVL2573:
-.L2492:
-	.loc 1 2269 0 is_stmt 1
-	ldr	r1, [sp, #4]
-	mov	r0, r8
-	bl	ftl_sb_update_avl_pages
-.LVL2574:
-	b	.L2484
-.LVL2575:
-.L2334:
-	.loc 1 1915 0
-	uxth	r1, r3
-	adds	r1, r1, #8
-	ldrh	r0, [r8, r1, lsl #1]
-.LVL2576:
-	b	.L2333
-.LVL2577:
-.L2335:
-	.loc 1 1927 0
-	movs	r1, #0
+.L2261:
+	movs	r1, #1
+	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-.LVL2578:
-	mov	r4, r0
-.LVL2579:
-	.loc 1 1932 0
+	ldr	r3, .L2285+16
+	sxth	r7, r0
 	adds	r0, r0, #1
-.LVL2580:
-	beq	.L2336
-.L2413:
-	mov	r5, r4
-.LVL2581:
-	b	.L2337
-.LVL2582:
-.L2336:
-	.loc 1 1933 0
-	ldr	r3, [sp, #8]
-	cbz	r3, .L2339
-	.loc 1 1933 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2493+32
-	movw	r2, #1933
-	ldr	r0, .L2493+36
-	bl	printf
-.LVL2583:
-	ldr	r1, .L2493+40
-	ldr	r0, .L2493+44
+	strh	r0, [r6, #2]	@ movhi
+.L2263:
+	cmp	r7, #0
+	bge	.L2266
+	ldr	r1, .L2285+20
+	movw	r2, #1549
+	ldr	r0, .L2285+24
 	bl	printf
-.LVL2584:
-.L2339:
-	.loc 1 1934 0 is_stmt 1
-	ldr	r3, [sp, #24]
-	cbz	r3, .L2340
-	.loc 1 1934 0 is_stmt 0 discriminator 1
-	cmp	r5, r3
-	beq	.L2340
-	.loc 1 1934 0 discriminator 2
-	ldr	r1, .L2493+32
-	movw	r2, #1934
-	ldr	r0, .L2493+36
+	ldr	r1, .L2285+28
+	ldr	r0, .L2285+32
 	bl	printf
-.LVL2585:
-	ldr	r1, .L2493+40
-	ldr	r0, .L2493+44
+.L2265:
+	ldr	r2, .L2285+36
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L2268
+	ldr	r1, .L2285+20
+	movw	r2, #1551
+	ldr	r0, .L2285+24
 	bl	printf
-.LVL2586:
-.L2340:
-	.loc 1 1935 0 is_stmt 1
-	movs	r3, #0
-	strh	r3, [r8, #2]	@ movhi
-	b	.L2491
-.LVL2587:
-.L2342:
-	.loc 1 1945 0
-	ldr	r1, [sp]
-	ldrh	r2, [r1], #2
-	.loc 1 1946 0
-	cmp	r2, fp
-	.loc 1 1945 0
-	str	r1, [sp]
-.LVL2588:
-	.loc 1 1946 0
-	beq	.L2341
-	.loc 1 1947 0
-	mla	r1, r10, r6, r0
-	orr	r2, r5, r2, lsl #10
-.LVL2589:
-	str	r2, [r1, #4]
-.LVL2590:
-	.loc 1 1948 0
-	movs	r2, #0
-	str	r2, [r1, #8]
-	.loc 1 1949 0
-	mul	r2, lr, r6
-	.loc 1 1950 0
-	adds	r6, r6, #1
-.LVL2591:
-	uxth	r6, r6
-.LVL2592:
-	.loc 1 1949 0
-	bic	r2, r2, #3
-	mov	r7, r2
-	ldr	r2, [sp, #4]
-	add	r7, r7, r2
-	str	r7, [r1, #12]
-.L2341:
-.LVL2593:
-	adds	r3, r3, #1
-.LVL2594:
-	b	.L2338
-.LVL2595:
-.L2414:
-	movs	r3, #0
-	b	.L2485
-.LVL2596:
-.L2349:
-	.loc 1 1959 0
-	movs	r3, #36
-.LVL2597:
-	ldr	r1, [fp]
-	muls	r3, r7, r3
-	adds	r2, r1, r3
-	ldr	r3, [r1, r3]
-	cbnz	r3, .L2345
-	.loc 1 1960 0
-	ldr	r2, [r2, #12]
-.LVL2598:
-	.loc 1 1961 0
-	ldr	r3, [r2, #4]
-	adds	r1, r3, #1
-	beq	.L2346
-	.loc 1 1962 0
-	ldr	r1, .L2493+28
-	mov	r0, r3
-	ldr	r1, [r1]
-	bl	ftl_cmp_data_ver
-.LVL2599:
-	cbz	r0, .L2346
-	.loc 1 1964 0
-	ldr	r1, .L2493+28
-	adds	r3, r3, #1
-	str	r3, [r1]
-.L2346:
-	.loc 1 1967 0
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	bne	.L2348
-.LVL2600:
-.L2347:
-	.loc 1 1982 0
-	uxth	r3, r4
-	.loc 1 1983 0
-	uxth	r7, r7
-	.loc 1 1982 0
-	str	r3, [sp, #4]
-.LVL2601:
-	.loc 1 1983 0
-	movs	r2, #36
-	ldr	r3, [fp]
-	mla	r7, r2, r7, r3
-.LVL2602:
-	ldr	r0, [r7, #4]
-	b	.L2486
-.LVL2603:
-.L2345:
-	.loc 1 1970 0
-	ldr	r1, [r2, #4]
-	.loc 1 1971 0
-	uxth	r10, r5
-	.loc 1 1970 0
-	ldr	r0, .L2493+48
+	ldr	r1, .L2285+28
+	ldr	r0, .L2285+32
 	bl	printf
-.LVL2604:
-	.loc 1 1972 0
-	ldrh	r2, [r8]
-	ldr	r3, .L2493+52
-	strh	r2, [r3]	@ movhi
-.LVL2605:
-.L2348:
-	adds	r7, r7, #1
-.LVL2606:
-	b	.L2344
-.LVL2607:
-.L2353:
-	.loc 1 2002 0
-	movw	r2, #65535
-	cmp	r10, r2
-	bne	.L2354
-	.loc 1 2002 0 is_stmt 0 discriminator 1
-	cmp	r3, #0
-	bne	.L2355
-.L2354:
-.LVL2608:
-.LBB502:
-	.loc 1 2008 0 is_stmt 1
-	ldr	r3, .L2493+56
-	.loc 1 2007 0
-	uxth	r10, r5
-.LVL2609:
-	.loc 1 2012 0
-	uxth	r5, r5
-.LVL2610:
-	.loc 1 2030 0
-	ldr	fp, .L2493+56
-	.loc 1 2034 0
-	mov	r7, #-1
-	.loc 1 2008 0
-	ldr	r2, [r3]
-	.loc 1 2034 0
-	mov	r6, r7
-.LVL2611:
-	.loc 1 2008 0
-	adds	r2, r2, #1
-	.loc 1 2009 0
-	itt	eq
-	ldreq	r2, [sp]
-	streq	r2, [r3]
-	.loc 1 2010 0
-	ldr	r3, [r3]
-	str	r3, [sp, #28]
-.LVL2612:
-	.loc 1 2012 0
-	ldr	r3, [sp, #8]
-.LVL2613:
-	adds	r3, r3, #7
-	cmp	r5, r3
-	.loc 1 2013 0
-	itet	gt
-	subgt	r4, r10, #7
-	ldrle	r4, [sp, #8]
-	uxthgt	r4, r4
-.LVL2614:
-.L2358:
-	.loc 1 2014 0 discriminator 1
-	cmp	r4, r10
-	bhi	.L2371
-	.loc 1 2016 0
-	ldr	r3, .L2493+12
-	.loc 1 2018 0
-	movw	lr, #65535
-	.loc 1 2019 0
-	mov	ip, #36
-	.loc 1 2016 0
+.L2268:
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	ldr	r0, .L2285+40
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	adds	r1, r1, #48
+	bl	ftl_memcpy
+	ldrh	r1, [r5]
+	ldr	r3, [r4, #8]
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L2285+44
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r3, .L2285+48
 	ldrh	r3, [r3]
-	str	r3, [sp, #36]
-	.loc 1 2019 0
-	ldr	r3, .L2493+16
+	cbz	r3, .L2269
+	ldrh	r1, [r5]
+	ldr	r3, .L2285+52
+	ldrh	r2, [r3]
+	lsrs	r3, r1, #3
+	add	r3, r3, r1, lsl #1
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r1, r1, r3, lsl #2
+	ldr	r3, .L2285+56
 	ldr	r0, [r3]
-	ldr	r3, [sp, #20]
-	str	r3, [sp, #16]
+	bl	ftl_memcpy
+.L2269:
+	ldr	r4, .L2285+40
+	ldr	r3, .L2285+16
+	ldr	r2, [r4]
+	cmp	r2, r3
+	bne	.L2270
+	ldr	r3, .L2285+60
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	ldrh	r5, [r4, #8]
+	ldrh	r3, [r3]
+	strh	r5, [r6, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L2270
+	ldr	r3, .L2285+64
+	ldr	r2, .L2285+68
+	str	r5, [r3]
+	ldr	r3, .L2285+72
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	ldr	r2, .L2285+76
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L2285+80
+	str	r3, [r2]
+	ldr	r3, .L2285+84
+	ldr	r6, [r3]
+	ldr	r3, .L2285+88
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L2285+92
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L2285+96
+	cmp	r5, r6
+	strh	r0, [r3]	@ movhi
+	bls	.L2271
+	ldr	r1, .L2285+20
+	movw	r2, #1578
+	ldr	r0, .L2285+24
+	bl	printf
+	ldr	r1, .L2285+28
+	ldr	r0, .L2285+32
+	bl	printf
+.L2271:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L2285+100
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L2285+104
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L2285+108
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
 	movs	r3, #0
-	mov	r5, r3
-	b	.L2372
-.LVL2615:
-.L2360:
-	.loc 1 2017 0
-	ldr	r1, [sp, #16]
-	ldrh	r2, [r1], #2
-	.loc 1 2018 0
-	cmp	r2, lr
-	.loc 1 2017 0
-	str	r1, [sp, #16]
-.LVL2616:
-	.loc 1 2018 0
-	beq	.L2359
-	.loc 1 2019 0
-	mla	r1, ip, r5, r0
-	.loc 1 2020 0
-	adds	r5, r5, #1
-.LVL2617:
-	.loc 1 2019 0
-	orr	r2, r4, r2, lsl #10
-.LVL2618:
-	.loc 1 2020 0
-	uxth	r5, r5
-.LVL2619:
-	.loc 1 2019 0
-	str	r2, [r1, #4]
-.LVL2620:
-.L2359:
-	adds	r3, r3, #1
-.LVL2621:
-.L2372:
-	.loc 1 2016 0 discriminator 1
-	ldr	r1, [sp, #36]
-	uxth	r2, r3
-	cmp	r2, r1
-	bcc	.L2360
-	.loc 1 2023 0
-	mov	r1, r5
-	ldr	r2, [sp, #32]
-	bl	FlashReadPages
-.LVL2622:
-	.loc 1 2033 0
-	ldr	r3, .L2493+4
-	movs	r2, #36
-	ldr	ip, .L2493+60
-	.loc 1 2027 0
-	movw	r1, #65535
-	.loc 1 2033 0
-	ldrb	r0, [r3]	@ zero_extendqisi2
-	ldr	r3, .L2493+16
-	ldr	r3, [r3]
-	mla	r5, r2, r5, r3
-.LVL2623:
-.L2361:
-	.loc 1 2024 0 discriminator 1
-	cmp	r5, r3
-	bne	.L2370
-	.loc 1 2014 0
-	adds	r4, r4, #1
-.LVL2624:
-	uxth	r4, r4
-.LVL2625:
-	b	.L2358
-.L2494:
-	.align	2
-.L2493:
-	.word	.LANCHOR52
-	.word	.LANCHOR8
-	.word	.LANCHOR16
-	.word	.LANCHOR37
-	.word	.LANCHOR177
-	.word	.LANCHOR105
-	.word	.LANCHOR58
-	.word	.LANCHOR157
-	.word	.LANCHOR228
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LC46
-	.word	.LANCHOR229
-	.word	.LANCHOR133
-	.word	.LANCHOR117
-.L2370:
-	.loc 1 2025 0
-	ldr	r2, [r3]
-	cbnz	r2, .L2362
-	.loc 1 2026 0
-	ldr	r2, [r3, #12]
-.LVL2626:
-	.loc 1 2027 0
-	ldrh	lr, [r2]
-	cmp	lr, r1
-	beq	.L2363
-	.loc 1 2029 0
-	ldr	r2, [r2, #4]
-.LVL2627:
-	cmp	r2, #-1
-	beq	.L2363
-	.loc 1 2030 0
-	ldr	r6, [fp]
-.LVL2628:
-	.loc 1 2031 0
-	str	r2, [fp]
-.LVL2629:
-	.loc 1 2032 0
-	adds	r2, r7, #1
-	bne	.L2363
-	.loc 1 2032 0 is_stmt 0 discriminator 1
-	ldrh	r2, [ip, r4, lsl #1]
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L2285+112
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L2285+116
+	str	r3, [r5]
+	ldr	r5, .L2285+120
+	str	r3, [r5]
+	ldr	r5, .L2285+124
+	str	r3, [r5]
+	ldr	r5, .L2285+128
+	str	r3, [r5]
+	ldr	r5, .L2285+132
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L2285+136
+	str	r3, [r5]
+	ldr	r5, .L2285+140
+	str	r3, [r5]
+	ldr	r5, .L2285+144
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L2285+148
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L2285+152
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
 	cmp	r2, r1
-	bne	.L2364
-	.loc 1 2033 0 is_stmt 1
-	cbz	r0, .L2363
-.L2364:
-	.loc 1 2034 0
-	ldr	r2, [sp]
-	cmp	r2, r6
-	it	ne
-	movne	r7, r6
-.LVL2630:
-.L2363:
-	adds	r3, r3, #36
-	b	.L2361
-.L2362:
-	.loc 1 2040 0
-	ldr	r3, .L2495
-	ldrh	r2, [r8]
-	strh	r2, [r3]	@ movhi
-	.loc 1 2041 0
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2355
-	.loc 1 2043 0
-	ldr	r3, .L2495+4
-	ldrh	r2, [r3, r4, lsl #1]
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L2274
+	ldr	r0, .L2285+100
+	bl	make_superblock
+.L2274:
+	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2366
-	.loc 1 2045 0
-	adds	r2, r7, #1
-	ldr	r3, .L2495+8
-	beq	.L2367
-	.loc 1 2046 0
-	str	r7, [r3]
-.LVL2631:
-.L2355:
-.LBE502:
-	.loc 1 2069 0
-	ldr	r3, .L2495+12
+	beq	.L2275
+	ldr	r0, .L2285+108
+	bl	make_superblock
+.L2275:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2276
+	ldr	r0, .L2285+112
+	bl	make_superblock
+.L2276:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2277
+	ldr	r0, .L2285+104
+	bl	make_superblock
+.L2277:
+	movs	r0, #0
+	b	.L2260
+.L2266:
+	ldrh	r2, [r6]
+	mov	r0, fp
+	str	r3, [sp, #4]
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
 	movs	r2, #1
-	.loc 1 2070 0
-	ldr	r0, .L2495+16
-	.loc 1 2079 0
-	ldr	r10, .L2495+64
-	.loc 1 2069 0
-	strh	r2, [r3]	@ movhi
-	.loc 1 2070 0
-	bl	FtlMapBlkWriteDumpData
-.LVL2632:
-	ldr	fp, [sp, #8]
-.LVL2633:
-.L2373:
-	.loc 1 2076 0
-	ldr	r3, .L2495+20
-	.loc 1 2078 0
-	movw	r7, #65535
-	.loc 1 2079 0
-	ldr	r0, [r10]
-	mov	ip, #36
-	.loc 1 2076 0
-	ldr	r1, [sp, #20]
-	movs	r2, #0
-	ldrh	r5, [r3]
-	.loc 1 2080 0
-	ldr	r3, .L2495+24
-	.loc 1 2075 0
-	str	r2, [sp, #16]
-	.loc 1 2080 0
-	ldrb	r6, [r3]	@ zero_extendqisi2
-.LVL2634:
-.L2374:
-	.loc 1 2076 0 discriminator 1
-	uxth	r3, r2
-	cmp	r5, r3
-	bhi	.L2377
-	.loc 1 2085 0
-	ldr	r2, [sp, #32]
-.LVL2635:
-	ldr	r1, [sp, #16]
+	mov	r1, r2
 	bl	FlashReadPages
-.LVL2636:
-	.loc 1 2086 0
-	movs	r3, #0
-.LVL2637:
-.L2490:
-	str	r3, [sp, #28]
-.LVL2638:
-	.loc 1 2086 0 is_stmt 0 discriminator 2
-	ldr	r2, [sp, #16]
-	ldrh	r3, [sp, #28]
-	cmp	r2, r3
-	bhi	.L2407
-	.loc 1 2243 0 is_stmt 1
-	ldrb	r3, [r8, #8]	@ zero_extendqisi2
-	.loc 1 2242 0
-	add	fp, fp, #1
-.LVL2639:
-	uxth	fp, fp
-.LVL2640:
-	.loc 1 2243 0
-	cmp	r3, #1
-	bne	.L2408
-	.loc 1 2243 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2495+24
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2408
-	.loc 1 2244 0 is_stmt 1
-	ldr	r3, .L2495+28
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2408
-	.loc 1 2244 0 is_stmt 0 discriminator 1
+	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
-	cmp	r3, fp
-	beq	.L2382
-.L2408:
-	.loc 1 2248 0 is_stmt 1
-	ldr	r3, .L2495+32
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2373
-	.loc 1 2251 0
-	ldr	r2, .L2495+20
-	.loc 1 2253 0
-	movw	r0, #65535
-	.loc 1 2250 0
-	movs	r3, #0
-	.loc 1 2249 0
-	strh	fp, [r8, #2]	@ movhi
-	.loc 1 2250 0
-	strh	r3, [r8, #4]	@ movhi
-.LVL2641:
-	.loc 1 2251 0
-	ldrh	r2, [r2]
-.LVL2642:
-.L2409:
-	.loc 1 2251 0 is_stmt 0 discriminator 1
-	uxth	r1, r3
-	cmp	r1, r2
-	bcs	.L2484
-	.loc 1 2252 0 is_stmt 1
-	ldr	r1, [sp, #20]
-	ldrh	r4, [r1], #2
-	.loc 1 2253 0
-	cmp	r4, r0
-	.loc 1 2252 0
-	str	r1, [sp, #20]
-.LVL2643:
-	add	r1, r3, #1
-	.loc 1 2253 0
-	bne	.L2491
-	mov	r3, r1
-.LVL2644:
-	b	.L2409
-.LVL2645:
-.L2367:
-.LBB503:
-	.loc 1 2047 0
-	ldr	r2, [sp]
-	ldr	r1, [sp, #28]
-	cmp	r2, r1
-	.loc 1 2050 0
-	itet	eq
-	ldreq	r2, [r3]
-	.loc 1 2048 0
-	movne	r2, r1
-	.loc 1 2050 0
-	addeq	r2, r2, #-1
-.L2487:
-	.loc 1 2064 0
-	str	r2, [r3]
-	b	.L2355
-.L2366:
-	.loc 1 2052 0
-	ldr	r3, [sp]
-	cmp	r6, r3
-	beq	.L2369
-	.loc 1 2053 0
-	adds	r3, r6, #1
-	beq	.L2355
-	.loc 1 2054 0
-	ldr	r3, .L2495+8
-	str	r6, [r3]
-	b	.L2355
-.L2369:
-	.loc 1 2055 0
-	ldr	r2, .L2495+8
-	ldr	r1, [sp]
-	ldr	r3, [r2]
-	cmp	r1, r3
-	beq	.L2355
-	.loc 1 2056 0
-	subs	r3, r3, #1
-	str	r3, [r2]
-	b	.L2355
-.L2371:
-	.loc 1 2064 0
-	mov	r2, #-1
-	ldr	r3, .L2495+8
-	b	.L2487
-.LVL2646:
-.L2377:
-.LBE503:
-	.loc 1 2077 0
-	ldrh	r3, [r1], #2
-.LVL2647:
-	.loc 1 2078 0
-	cmp	r3, r7
-	beq	.L2375
-	.loc 1 2079 0
-	ldr	r4, [sp, #16]
-	orr	r3, fp, r3, lsl #10
-.LVL2648:
-	mla	r4, ip, r4, r0
-	str	r3, [r4, #4]
-.LVL2649:
-	.loc 1 2080 0
-	ldrb	lr, [r8, #8]	@ zero_extendqisi2
-	cmp	lr, #1
-	bne	.L2376
-	.loc 1 2080 0 is_stmt 0 discriminator 1
-	cbz	r6, .L2376
-	.loc 1 2081 0 is_stmt 1
-	orr	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-.L2376:
-	.loc 1 2082 0
-	ldr	r3, [sp, #16]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r3, [sp, #16]
-.LVL2650:
-.L2375:
 	adds	r2, r2, #1
-.LVL2651:
-	b	.L2374
-.LVL2652:
-.L2407:
-	ldr	r3, [sp, #28]
-	movs	r5, #36
-	.loc 1 2087 0
-	ldr	r7, [r10]
-	muls	r5, r3, r5
-	adds	r6, r7, r5
-	ldr	r4, [r6, #4]
-	.loc 1 2088 0
-	ubfx	r0, r4, #10, #16
-	.loc 1 2087 0
-	str	r4, [sp, #52]
-	.loc 1 2088 0
-	bl	P2V_plane
-.LVL2653:
-	.loc 1 2090 0
-	ldr	r3, [sp, #8]
-	cmp	fp, r3
-	bcc	.L2379
-	.loc 1 2090 0 is_stmt 0 discriminator 1
-	bne	.L2380
-	.loc 1 2091 0 is_stmt 1
-	ldr	r3, [sp, #24]
-	cmp	r3, r0
-	bhi	.L2379
-.L2380:
-	.loc 1 2094 0
-	ldr	r3, [sp, #4]
-	cmp	fp, r3
-	bne	.L2381
-	.loc 1 2094 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #12]
-	cmp	r3, r0
-	beq	.L2382
-.L2381:
-.LVL2654:
-	.loc 1 2098 0 is_stmt 1
-	ldr	r3, [r7, r5]
-	adds	r3, r3, #1
-	beq	.L2383
-	.loc 1 2101 0
-	ldr	r6, [r6, #12]
-.LVL2655:
-	.loc 1 2102 0
-	movw	r3, #61589
-	ldrh	r2, [r6]
+	beq	.L2264
+	ldr	r2, [r8]
+	ldr	r2, [r2]
 	cmp	r2, r3
-	beq	.L2384
-.LVL2656:
-.L2391:
-.LBB504:
-	.loc 1 2135 0
-	ldrh	r0, [r8]
-.LVL2657:
-.L2489:
-.LBE504:
-	.loc 1 2219 0
-	bl	decrement_vpc_count
-.LVL2658:
-.L2379:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	b	.L2490
-.LVL2659:
-.L2384:
-	.loc 1 2108 0
-	ldr	r3, [r6, #4]
-	str	r3, [sp]
-.LVL2660:
-	.loc 1 2109 0
-	adds	r3, r3, #1
-.LVL2661:
-	beq	.L2385
-	.loc 1 2110 0 discriminator 1
-	ldr	r3, .L2495+36
-	ldr	r0, [sp]
-.LVL2662:
-	ldr	r1, [r3]
-	bl	ftl_cmp_data_ver
-.LVL2663:
-	.loc 1 2109 0 discriminator 1
-	cbz	r0, .L2385
-	.loc 1 2112 0
-	ldr	r2, [sp]
-	adds	r2, r2, #1
-	str	r2, [r3]
-.L2385:
-	.loc 1 2115 0
-	ldrh	r2, [r6]
-	movw	r3, #61589
-	cmp	r2, r3
-	beq	.L2386
-	.loc 1 2115 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2495+40
-	movw	r2, #2115
-	ldr	r0, .L2495+44
-	bl	printf
-.LVL2664:
-	ldr	r1, .L2495+48
-	ldr	r0, .L2495+52
-	bl	printf
-.LVL2665:
-.L2386:
-	.loc 1 2116 0 is_stmt 1
-	ldr	r4, [r6, #8]
-.LVL2666:
-	.loc 1 2118 0
-	add	r1, sp, #48
-	.loc 1 2117 0
-	ldr	r3, [r6, #12]
-	.loc 1 2118 0
-	movs	r2, #0
-	mov	r0, r4
-	.loc 1 2117 0
-	str	r3, [sp, #44]
-	.loc 1 2118 0
-	bl	log2phys
-.LVL2667:
-	.loc 1 2119 0
-	ldr	r3, .L2495+8
-	ldr	r1, [r3]
-	adds	r7, r1, #1
-	beq	.L2387
-	.loc 1 2120 0 discriminator 1
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-.LVL2668:
-	.loc 1 2119 0 discriminator 1
-	cmp	r0, #0
-	beq	.L2387
-.LBB505:
-	.loc 1 2124 0
-	ldr	r3, [sp, #44]
-	adds	r6, r3, #1
-.LVL2669:
-	beq	.L2388
-	.loc 1 2125 0
-	ldr	r0, [r10]
-	.loc 1 2127 0
-	movs	r2, #0
-	movs	r1, #1
-	.loc 1 2125 0
-	add	r0, r0, r5
-	.loc 1 2126 0
-	str	r3, [r0, #4]
-	.loc 1 2125 0
-	ldr	r6, [r0, #12]
-.LVL2670:
-	.loc 1 2127 0
-	bl	FlashReadPages
-.LVL2671:
-	.loc 1 2140 0
+	bne	.L2264
 	ldr	r2, [r10]
-	ldr	r1, [r2, r5]
-	adds	r3, r2, r5
-	adds	r1, r1, #1
-	bne	.L2389
-.LVL2672:
-.L2390:
-	.loc 1 2172 0
-	mov	r3, #-1
-	.loc 1 2173 0
-	ldrh	r0, [r8]
-	.loc 1 2172 0
-	str	r3, [sp, #44]
-	.loc 1 2173 0
-	bl	decrement_vpc_count
-.LVL2673:
-.L2398:
-.LBE505:
-	.loc 1 2213 0
-	ldr	r6, [sp, #44]
-	adds	r0, r6, #1
-	beq	.L2379
-.L2412:
-	.loc 1 2215 0
-	ubfx	r0, r6, #10, #16
-	bl	P2V_block_in_plane
-.LVL2674:
-	.loc 1 2216 0
-	ldr	r3, .L2495+56
-	.loc 1 2215 0
-	mov	r4, r0
-.LVL2675:
-	.loc 1 2216 0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bhi	.L2403
-	.loc 1 2216 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2495+40
-	movw	r2, #2216
-	ldr	r0, .L2495+44
-.LVL2676:
-	bl	printf
-.LVL2677:
-	ldr	r1, .L2495+48
-	ldr	r0, .L2495+52
-	bl	printf
-.LVL2678:
-.L2403:
-	.loc 1 2217 0 is_stmt 1
-	ldr	r3, .L2495+60
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r4, lsl #1]
-	cmp	r3, #0
-	beq	.L2404
-	.loc 1 2219 0
-	mov	r0, r4
-	b	.L2489
-.LVL2679:
-.L2388:
-.LBB506:
-	.loc 1 2131 0
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	bne	.L2391
-	.loc 1 2132 0
-	movs	r2, #1
-	add	r1, sp, #44
-	mov	r0, r4
-	bl	log2phys
-.LVL2680:
-	b	.L2391
-.LVL2681:
-.L2389:
-	.loc 1 2140 0 discriminator 1
-	ldr	r1, [r6, #8]
-	cmp	r4, r1
-	bne	.L2390
-	.loc 1 2128 0 discriminator 2
-	ldr	r7, [r6, #4]
-	.loc 1 2141 0 discriminator 2
-	ldr	r0, .L2495+8
-	mov	r1, r7
-	ldr	r0, [r0]
-	bl	ftl_cmp_data_ver
-.LVL2682:
-	.loc 1 2140 0 discriminator 2
-	cmp	r0, #0
-	beq	.L2390
-	.loc 1 2142 0
-	ldr	r1, [sp, #48]
-	ldr	r0, [sp, #52]
-	cmp	r1, r0
-	bne	.L2393
-.L2396:
-	.loc 1 2168 0
-	ldr	r1, [sp, #44]
-	mov	r0, r4
-	bl	FtlReUsePrevPpa
-.LVL2683:
-	b	.L2390
-.L2496:
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L2265
+.L2264:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L2263
+.L2286:
 	.align	2
-.L2495:
-	.word	.LANCHOR229
-	.word	.LANCHOR117
-	.word	.LANCHOR133
-	.word	.LANCHOR230
-	.word	.LANCHOR124
-	.word	.LANCHOR37
-	.word	.LANCHOR8
-	.word	.LANCHOR53
-	.word	.LANCHOR52
-	.word	.LANCHOR157
-	.word	.LANCHOR228
+.L2285:
+	.word	.LANCHOR40
+	.word	.LANCHOR202
+	.word	.LANCHOR84
+	.word	.LANCHOR209
+	.word	1179929683
+	.word	.LANCHOR221
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR39
-	.word	.LANCHOR83
-	.word	.LANCHOR177
-.L2393:
-	.loc 1 2145 0
-	ldr	r0, [sp, #44]
-	cmp	r1, r0
-	beq	.L2390
-	.loc 1 2146 0
-	adds	r0, r1, #1
-	beq	.L2394
-	.loc 1 2148 0
-	str	r1, [r3, #4]
-	.loc 1 2149 0
-	movs	r2, #0
-	movs	r1, #1
-	mov	r0, r3
-	.loc 1 2147 0
-	ldr	r6, [r3, #12]
-.LVL2684:
-	.loc 1 2149 0
-	bl	FlashReadPages
-.LVL2685:
-.L2395:
-	.loc 1 2154 0
-	ldr	r3, [r10]
-	ldr	r3, [r3, r5]
-	adds	r3, r3, #1
-	beq	.L2396
-	.loc 1 2155 0
-	ldr	r3, [r6, #4]
-.LVL2686:
-	.loc 1 2156 0
-	ldr	r2, .L2497
-	mov	r1, r3
-	ldr	r0, [r2]
-	bl	ftl_cmp_data_ver
-.LVL2687:
-	cmp	r0, #0
-	beq	.L2396
-	.loc 1 2157 0
-	mov	r1, r3
-	mov	r0, r7
-	bl	ftl_cmp_data_ver
-.LVL2688:
-	cmp	r0, #0
-	beq	.L2390
-.LVL2689:
-	b	.L2396
-.LVL2690:
-.L2394:
-	.loc 1 2151 0
-	str	r1, [r2, r5]
-	b	.L2395
-.L2387:
-.LBE506:
-	.loc 1 2174 0
-	ldr	r3, [sp, #52]
-	ldr	r2, [sp, #48]
-	cmp	r2, r3
-	beq	.L2398
-	.loc 1 2176 0
-	movs	r2, #1
-	add	r1, sp, #52
-	mov	r0, r4
-	bl	log2phys
-.LVL2691:
-	.loc 1 2177 0
-	ldr	r6, [sp, #48]
-.LVL2692:
-	adds	r5, r6, #1
-	beq	.L2398
-	.loc 1 2177 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #44]
-	cmp	r6, r3
-	beq	.L2412
-	.loc 1 2178 0 is_stmt 1
-	ubfx	r0, r6, #10, #16
-	bl	P2V_block_in_plane
-.LVL2693:
-	.loc 1 2180 0
-	ldr	r3, .L2497+4
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L2402
-	.loc 1 2181 0 discriminator 1
-	ldr	r3, .L2497+8
-	.loc 1 2180 0 discriminator 1
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	beq	.L2402
-	.loc 1 2182 0
-	ldr	r3, .L2497+12
-	.loc 1 2181 0
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L2398
-.L2402:
-.LVL2694:
-.LBB507:
-	.loc 1 2186 0
-	ldr	r0, [r10]
-.LVL2695:
-	.loc 1 2189 0
-	movs	r2, #0
-	movs	r1, #1
-	.loc 1 2188 0
-	str	r6, [r0, #4]
-	.loc 1 2186 0
-	ldr	r5, [r0, #12]
-.LVL2696:
-	.loc 1 2189 0
-	bl	FlashReadPages
-.LVL2697:
-	.loc 1 2192 0
-	ldr	r3, [r10]
-	ldr	r3, [r3]
-	adds	r3, r3, #1
-	beq	.L2398
-	.loc 1 2193 0
-	ldr	r1, [r5, #4]
-	ldr	r0, [sp]
-	bl	ftl_cmp_data_ver
-.LVL2698:
-	cmp	r0, #0
-	bne	.L2398
-	.loc 1 2200 0
-	movs	r2, #1
-	add	r1, sp, #48
-.LVL2699:
-	mov	r0, r4
-	bl	log2phys
-.LVL2700:
-	b	.L2398
-.LVL2701:
-.L2404:
-.LBE507:
-	.loc 1 2221 0
-	mov	r1, r4
-	ldr	r0, .L2497+16
-	bl	printf
-.LVL2702:
-	b	.L2379
-.LVL2703:
-.L2383:
-	.loc 1 2227 0
-	ldrh	r3, [r8]
-	.loc 1 2228 0
-	mov	r1, r4
-	.loc 1 2227 0
-	ldr	r2, .L2497+20
-	.loc 1 2228 0
-	ldr	r0, .L2497+24
-.LVL2704:
-	.loc 1 2227 0
-	strh	r3, [r2]	@ movhi
-	.loc 1 2228 0
-	ldr	r2, [sp]
-	bl	printf
-.LVL2705:
-	.loc 1 2229 0
-	ldr	r2, .L2497+28
-	ldr	r3, [r2]
-	cmp	r3, #31
-	bhi	.L2405
-	.loc 1 2230 0
-	ldr	r0, [sp, #52]
-	ldr	r1, .L2497+32
-	str	r0, [r1, r3, lsl #2]
-	.loc 1 2231 0
-	adds	r3, r3, #1
-	str	r3, [r2]
-.L2405:
-	.loc 1 2233 0
-	ldrh	r0, [r8]
-	bl	decrement_vpc_count
-.LVL2706:
-	.loc 1 2235 0
-	ldr	r3, .L2497
-	ldr	r2, [r3]
-	adds	r1, r2, #1
-	bne	.L2406
-	.loc 1 2236 0
-	ldr	r2, [sp]
-.L2488:
-	.loc 1 2238 0
-	str	r2, [r3]
-	b	.L2379
-.L2406:
-	.loc 1 2237 0
-	ldr	r1, [sp]
-	cmp	r1, r2
-	bcs	.L2379
-	.loc 1 2238 0
-	mov	r2, r1
-	b	.L2488
-.LVL2707:
-.L2382:
-.LDL3:
-	.loc 1 2267 0
-	ldrb	r3, [sp, #12]	@ zero_extendqisi2
-	.loc 1 2269 0
-	ldr	r2, [sp, #12]
-	.loc 1 2267 0
-	strb	r3, [r8, #6]
-	.loc 1 2268 0
-	ldrh	r3, [sp, #4]
-	strh	r3, [r8, #2]	@ movhi
-	b	.L2492
-.L2498:
-	.align	2
-.L2497:
-	.word	.LANCHOR133
-	.word	.LANCHOR91
+	.word	.LANCHOR58
+	.word	.LANCHOR81
+	.word	.LANCHOR0
+	.word	.LANCHOR70
+	.word	.LANCHOR67
+	.word	.LANCHOR195
+	.word	.LANCHOR45
+	.word	.LANCHOR222
+	.word	.LANCHOR73
+	.word	.LANCHOR53
+	.word	.LANCHOR56
+	.word	.LANCHOR69
+	.word	.LANCHOR42
+	.word	.LANCHOR75
+	.word	.LANCHOR38
+	.word	.LANCHOR223
 	.word	.LANCHOR92
+	.word	.LANCHOR204
 	.word	.LANCHOR93
-	.word	.LC47
-	.word	.LANCHOR229
-	.word	.LC48
-	.word	.LANCHOR231
-	.word	.LANCHOR232
-	.cfi_endproc
-.LFE372:
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.word	.LANCHOR94
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR166
+	.word	.LANCHOR165
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR164
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR183
+	.word	.LANCHOR188
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlDumpBlockInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	FtlDumpBlockInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-.LFB398:
-	.loc 6 227 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlDumpBlockInfo, %function
+FtlDumpBlockInfo:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2708:
-	.loc 6 236 0
-	ldr	r3, .L2526
-	.loc 6 237 0
-	movw	r2, #65535
-	.loc 6 227 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 6 227 0
-	mov	r5, r0
-	.loc 6 236 0
-	ldrh	r4, [r3]
-.LVL2709:
-	str	r3, [sp, #16]
-	.loc 6 237 0
-	cmp	r4, r2
-	beq	.L2517
-	.loc 6 239 0
-	cbnz	r4, .L2500
-.L2501:
-	.loc 6 240 0
-	bl	FtlGcPageVarInit
-.LVL2710:
-	b	.L2502
-.LVL2711:
-.L2517:
-	.loc 6 238 0
-	movs	r4, #0
-.LVL2712:
-.L2500:
-	.loc 6 239 0 discriminator 1
-	ldr	r3, .L2526+4
-	ldrh	r3, [r3]
-	cmp	r3, r1
-	beq	.L2501
-.LVL2713:
-.L2502:
-	.loc 6 250 0
-	ldr	fp, .L2526+44
-	.loc 6 238 0
-	mov	r3, #-1
-	str	r3, [sp, #8]
-.LVL2714:
-.L2514:
-	.loc 6 244 0
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	.loc 6 242 0
-	movs	r0, #0
-	strb	r0, [r5, #8]
-.LVL2715:
-	.loc 6 244 0
-	cmp	r2, r3
-	beq	.L2503
-.L2516:
-.LVL2716:
-	.loc 6 247 0
-	ldr	r3, .L2526+8
-	.loc 6 249 0
-	movw	ip, #65535
-	.loc 6 250 0
-	ldr	r0, [fp]
-	mov	lr, #36
-	.loc 6 247 0
-	ldrh	r8, [r3]
-	.loc 6 252 0
-	ldr	r3, .L2526+12
-	ldr	r3, [r3]
-	str	r3, [sp, #12]
-	ldr	r3, .L2526+16
-	ldrh	r10, [r3]
-	add	r3, r5, #16
-	str	r3, [sp, #4]
-	.loc 6 247 0
-	movs	r3, #0
-	.loc 6 246 0
-	mov	r6, r3
-.LVL2717:
-.L2504:
-	.loc 6 247 0 discriminator 1
-	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L2506
-	.loc 6 257 0
-	movs	r7, #0
-	mov	r10, #36
-	.loc 6 256 0
-	movs	r2, #0
+	ubfx	r0, r0, #10, #16
+	ldr	r4, .L2299
+	sub	sp, sp, #88
+	mov	r8, r1
+	ldrh	r3, [r4]
+	str	r3, [sp, #24]
+	bl	P2V_block_in_plane
+	ldr	r1, .L2299+4
+	mov	r6, r0
+	ldr	r0, .L2299+8
+	bl	printf
+	ldr	r3, .L2299+12
 	mov	r1, r6
-	bl	FlashReadPages
-.LVL2718:
-.L2507:
-	.loc 6 257 0 discriminator 1
-	uxth	r3, r7
-	cmp	r6, r3
-	bhi	.L2515
-	.loc 6 292 0
-	ldr	r3, .L2526+4
-	.loc 6 282 0
-	adds	r4, r4, #1
-.LVL2719:
-	uxth	r4, r4
-.LVL2720:
-	.loc 6 292 0
+	ldr	r0, .L2299+16
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r6, lsl #1]
+	bl	printf
+	add	r0, sp, #88
+	strh	r6, [r0, #-48]!	@ movhi
+	bl	make_superblock
+	ldr	r3, .L2299+20
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L2288
+	cmp	r8, #0
+	bne	.L2297
+	mov	r0, r6
+	bl	ftl_get_blk_mode
+	cmp	r0, #1
+	mov	r5, r0
+	bne	.L2288
+	ldr	r3, .L2299+24
 	ldrh	r3, [r3]
-	cmp	r3, r4
-	bhi	.L2516
-	.loc 6 283 0
-	movs	r0, #0
-	b	.L2503
-.LVL2721:
-.L2506:
-	.loc 6 248 0
-	ldr	r1, [sp, #4]
-	ldrh	r2, [r1], #2
-	.loc 6 249 0
-	cmp	r2, ip
-	.loc 6 248 0
-	str	r1, [sp, #4]
-.LVL2722:
-	.loc 6 249 0
-	beq	.L2505
-	.loc 6 250 0
-	mla	r1, lr, r6, r0
-	orr	r2, r4, r2, lsl #10
-.LVL2723:
-	str	r2, [r1, #4]
-.LVL2724:
-	.loc 6 251 0
+	str	r3, [sp, #24]
+.L2288:
+	movs	r6, #0
+	ldrh	r3, [r4]
+	ldr	r2, [sp, #24]
+	mov	r1, r5
+	ldr	r0, .L2299+28
+	bl	printf
+.L2289:
+	ldr	r3, .L2299+32
 	movs	r2, #0
-	str	r2, [r1, #8]
-	.loc 6 252 0
-	mul	r2, r10, r6
-	.loc 6 253 0
+	add	ip, sp, #54
+	mov	r4, r2
+	movw	r10, #65535
+	mov	fp, #36
+	ldrh	lr, [r3]
+	ldr	r3, .L2299+36
+	ldr	r0, [r3]
+	ldr	r3, .L2299+40
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L2299+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L2299+48
+	ldr	r3, [r3]
+	str	r3, [sp, #36]
+	ldr	r3, .L2299+52
+	ldrh	r8, [r3]
+.L2290:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2292
+	ldr	fp, .L2299+56
+	mov	r8, #0
+	mov	r10, #36
+	mov	r2, r5
+	mov	r1, r4
+	bl	FlashReadPages
+.L2293:
+	uxth	r3, r8
+	cmp	r4, r3
+	bhi	.L2294
 	adds	r6, r6, #1
-.LVL2725:
+	ldr	r3, [sp, #24]
 	uxth	r6, r6
-.LVL2726:
-	.loc 6 252 0
-	bic	r2, r2, #3
-	mov	r7, r2
-	ldr	r2, [sp, #12]
-	add	r7, r7, r2
-	str	r7, [r1, #12]
-.L2505:
-.LVL2727:
-	adds	r3, r3, #1
-.LVL2728:
-	b	.L2504
-.LVL2729:
-.L2515:
-	mul	r8, r10, r7
-	.loc 6 258 0
-	ldr	r2, [fp]
-	str	r2, [sp, #20]
-	add	r3, r2, r8
-	ldr	r1, [r3, #4]
-	str	r3, [sp, #12]
-.LVL2730:
-	.loc 6 259 0
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_plane
-.LVL2731:
-	.loc 6 261 0
-	ldr	r2, [sp, #20]
-	ldr	r1, [sp, #4]
-	ldr	r2, [r2, r8]
-	cbnz	r2, .L2508
-	.loc 6 263 0
-	ldr	r3, [sp, #12]
-	.loc 6 264 0
-	movw	ip, #65535
-	adds	r7, r7, #1
-.LVL2732:
-	.loc 6 263 0
-	ldr	r3, [r3, #12]
-.LVL2733:
-	.loc 6 264 0
-	ldrh	r2, [r3]
-	cmp	r2, ip
-	bne	.L2509
-	.loc 6 265 0
-	ldr	r3, .L2526+20
-.LVL2734:
-	movs	r2, #1
-	str	r2, [r3]
-.LVL2735:
-.L2503:
-	.loc 6 299 0
-	ldr	r2, [sp, #16]
-	movw	r3, #65535
-	.loc 6 301 0
-	strb	r0, [r5, #6]
-	.loc 6 302 0
-	mov	r1, r4
-	.loc 6 300 0
-	strh	r4, [r5, #2]	@ movhi
-	.loc 6 299 0
-	strh	r3, [r2]	@ movhi
-	.loc 6 302 0
-	mov	r2, r0
-	mov	r0, r5
-.LVL2736:
-	bl	ftl_sb_update_avl_pages
-.LVL2737:
-	.loc 6 304 0
-	ldr	r0, [sp, #8]
-	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	cmp	r3, r6
+	bne	.L2289
+.L2295:
+	movs	r0, #0
+	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2738:
-.L2509:
-	.cfi_restore_state
-	.loc 6 268 0
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-.LVL2739:
-	bl	FtlGcUpdatePage
-.LVL2740:
-	b	.L2507
-.LVL2741:
-.L2508:
-	.loc 6 271 0
-	mov	r2, r1
-	ldr	r0, .L2526+24
-.LVL2742:
-	ldrh	r1, [r5]
-.LVL2743:
-	bl	printf
-.LVL2744:
-	.loc 6 272 0
-	ldr	r3, .L2526+28
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	cbnz	r3, .L2510
-	.loc 6 272 0 is_stmt 0 discriminator 2
-	ldr	r3, .L2526+32
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2511
-.L2510:
-	.loc 6 272 0 discriminator 3
-	ldr	r3, .L2526+36
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #119
-	bls	.L2512
-.L2511:
-	.loc 6 272 0 discriminator 5
-	ldr	r3, [fp]
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L2513
-.L2512:
-	.loc 6 273 0 is_stmt 1
-	ldr	r3, [fp]
-	add	r3, r3, r8
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #8]
-.LVL2745:
-.L2513:
-	.loc 6 274 0
-	ldr	r3, .L2526+40
-	movs	r4, #0
-.LVL2746:
+.L2297:
+	movs	r5, #0
+	b	.L2288
+.L2292:
+	ldrh	r3, [ip, #2]!
+	cmp	r3, r10
+	beq	.L2291
+	mla	r1, fp, r4, r0
+	ldr	r7, [sp, #28]
+	orr	r3, r6, r3, lsl #10
+	str	r3, [r1, #4]
+	ldr	r3, [sp, #32]
+	muls	r3, r4, r3
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	ldr	r7, [sp, #36]
+	str	r3, [r1, #8]
+	mul	r3, r8, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	r3, r3, #3
+	add	r3, r3, r7
+	str	r3, [r1, #12]
+.L2291:
+	adds	r2, r2, #1
+	b	.L2290
+.L2294:
+	ldr	r3, .L2299+36
+	mul	r0, r10, r8
+	ldrh	r1, [sp, #40]
+	add	r8, r8, #1
+	ldr	ip, [r3]
+	add	r2, ip, r0
+	ldr	lr, [r2, #8]
+	ldr	r3, [r2, #12]
+	ldr	r7, [lr, #4]
+	str	r7, [sp, #20]
+	ldr	r7, [lr]
+	str	r7, [sp, #16]
+	ldr	r7, [r3, #12]
+	str	r7, [sp, #12]
+	ldr	r7, [r3, #8]
+	str	r7, [sp, #8]
+	ldr	r7, [r3, #4]
+	str	r7, [sp, #4]
 	ldr	r3, [r3]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 6 275 0
-	ldrh	r0, [r5]
-	bl	INSERT_FREE_LIST
-.LVL2747:
-	.loc 6 276 0
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.LVL2748:
-	.loc 6 278 0
-	bl	FtlGcPageVarInit
-.LVL2749:
-	.loc 6 279 0
-	b	.L2514
-.L2527:
+	str	r3, [sp]
+	ldr	r3, [r2, #4]
+	ldr	r2, [ip, r0]
+	mov	r0, fp
+	bl	printf
+	b	.L2293
+.L2300:
 	.align	2
-.L2526:
-	.word	.LANCHOR233
-	.word	.LANCHOR52
-	.word	.LANCHOR37
+.L2299:
+	.word	.LANCHOR53
+	.word	.LANCHOR224
+	.word	.LC46
+	.word	.LANCHOR84
+	.word	.LC47
+	.word	.LANCHOR8
+	.word	.LANCHOR54
+	.word	.LC48
+	.word	.LANCHOR38
+	.word	.LANCHOR180
 	.word	.LANCHOR105
 	.word	.LANCHOR58
-	.word	.LANCHOR132
+	.word	.LANCHOR106
+	.word	.LANCHOR59
 	.word	.LC49
-	.word	.LANCHOR28
-	.word	.LANCHOR8
-	.word	.LANCHOR78
-	.word	.LANCHOR83
-	.word	.LANCHOR177
-	.cfi_endproc
-.LFE398:
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
+	.section	.text.FtlScanAllBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeTempBlock
+	.global	FtlScanAllBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-.LFB396:
-	.loc 6 111 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	.type	FtlScanAllBlock, %function
+FtlScanAllBlock:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2750:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 6 118 0
-	ldr	r3, .L2551
-	ldr	r3, [r3]
-	cbz	r3, .L2529
-.LVL2751:
-.L2534:
-	.loc 6 119 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #88
+	ldr	r6, .L2311
+	ldr	r1, .L2311+4
+	ldr	r0, .L2311+8
+	bl	printf
+	movs	r3, #0
+	str	r3, [sp, #28]
+.L2302:
+	ldr	r3, .L2311+12
+	ldrh	r0, [sp, #28]
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2310
 	movs	r0, #0
-.L2528:
-	.loc 6 215 0
-	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	add	sp, sp, #88
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2752:
-.L2529:
-	.cfi_restore_state
-	.loc 6 120 0
-	ldr	r0, .L2551+4
-.LVL2753:
-	movw	r3, #65535
-	ldr	r5, .L2551+8
-	ldrh	r6, [r0]
-	mov	r4, r0
-	cmp	r6, r3
-	beq	.L2531
-.LVL2754:
-	.loc 6 132 0
-	ldr	r3, .L2551+12
-	ldrh	r1, [r3]
-	bl	FtlGcScanTempBlk
-.LVL2755:
-	str	r0, [sp, #12]
-	.loc 6 133 0
-	adds	r0, r0, #1
-	beq	.L2531
-	.loc 6 136 0
-	ldr	r3, .L2551+16
+.L2310:
+	add	r4, sp, #88
+	add	r7, sp, #54
+	strh	r0, [r4, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	ftl_get_blk_mode
+	ldr	r3, .L2311+16
+	mov	fp, #36
+	ldrh	r1, [sp, #28]
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
-	cmp	r3, #4
-	bls	.L2532
-	.loc 6 137 0
-	subs	r3, r3, #5
-	.loc 6 138 0
-	movs	r0, #1
-	.loc 6 137 0
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 6 138 0
-	bl	FtlEctTblFlush
-.LVL2756:
-.L2532:
-	.loc 6 140 0
-	ldr	r3, [r5]
-	cbnz	r3, .L2533
-	.loc 6 141 0
-	ldr	r2, .L2551+20
-	.loc 6 142 0
-	ldr	r0, [sp, #12]
-	.loc 6 141 0
-	ldr	r3, [r2, #96]
-	.loc 6 142 0
-	ubfx	r0, r0, #10, #16
-	.loc 6 141 0
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
-	.loc 6 142 0
-	bl	FtlBbmMapBadBlock
-.LVL2757:
-	.loc 6 143 0
-	bl	FtlBbmTblFlush
-.LVL2758:
-.L2533:
-	.loc 6 145 0
-	movs	r3, #0
-	.loc 6 146 0
-	movs	r0, #1
-	.loc 6 145 0
-	str	r3, [r5]
-	.loc 6 146 0
-	b	.L2528
-.LVL2759:
-.L2531:
-	.loc 6 154 0
-	ldrh	r2, [r4]
-	.loc 6 153 0
-	movs	r3, #0
-	str	r3, [r5]
-	.loc 6 154 0
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2534
-.LVL2760:
-	.loc 6 163 0
-	ldr	r6, .L2551+12
-	.loc 6 161 0
-	bl	FtlCacheWriteBack
-.LVL2761:
-	.loc 6 163 0
-	ldrb	r0, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r6]
-	ldr	r5, .L2551+24
-	muls	r2, r0, r2
-	ldrh	r1, [r5]
-	cmp	r1, r2
-	beq	.L2535
-	.loc 6 163 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2551+28
-	movs	r2, #163
-	ldr	r0, .L2551+32
-	bl	printf
-.LVL2762:
-	ldr	r1, .L2551+36
-	ldr	r0, .L2551+40
-	bl	printf
-.LVL2763:
-.L2535:
-	.loc 6 164 0 is_stmt 1
-	ldrh	r6, [r6]
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2551+44
-	ldrh	r0, [r4]
-	.loc 6 168 0
-	ldr	fp, .L2551+84
-	.loc 6 164 0
-	smulbb	r3, r3, r6
-	ldr	r1, [r2]
-	.loc 6 166 0
-	movs	r6, #0
-	str	r2, [sp, #4]
-	.loc 6 164 0
-	strh	r3, [r1, r0, lsl #1]	@ movhi
-	.loc 6 165 0
-	ldr	r1, .L2551+48
-	ldrh	r3, [r5]
-	ldr	r0, [r1]
-	add	r3, r3, r0
-	str	r3, [r1]
-.LVL2764:
-.L2536:
-	.loc 6 166 0 discriminator 1
-	ldrh	r2, [r5]
-	uxth	r3, r6
-	cmp	r2, r3
-	bhi	.L2540
-	.loc 6 181 0
-	movw	r0, #65535
-	bl	decrement_vpc_count
-.LVL2765:
-	.loc 6 182 0
-	ldr	r3, .L2551+52
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2541
-	.loc 6 183 0
-	ldrh	r1, [r4]
-	ldr	r0, .L2551+56
+	mov	r3, r0
+	ldr	r0, .L2311+20
+	ldrh	r2, [r2, r1, lsl #1]
 	bl	printf
-.LVL2766:
-.L2541:
-	.loc 6 184 0
-	ldr	r3, [sp, #4]
-	ldrh	r0, [r4]
-	ldr	r3, [r3]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	beq	.L2542
-	.loc 6 185 0
-	bl	INSERT_DATA_LIST
-.LVL2767:
-.L2543:
-	.loc 6 190 0
-	ldr	r3, .L2551+60
-	.loc 6 188 0
-	movw	r6, #65535
-.LVL2768:
-	strh	r6, [r4]	@ movhi
-	.loc 6 189 0
-	movs	r4, #0
-	strh	r4, [r5]	@ movhi
-	.loc 6 190 0
-	strh	r4, [r3]	@ movhi
-	.loc 6 191 0
-	bl	l2p_flush
-.LVL2769:
-	.loc 6 192 0
-	bl	FtlVpcTblFlush
-.LVL2770:
-	.loc 6 206 0
-	ldr	r3, .L2551+64
-	ldrh	r2, [r3]
-	ldr	r3, .L2551+68
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	cmp	r2, r3, asr #2
-	ble	.L2534
-	.loc 6 207 0
-	ldr	r3, .L2551+72
-	.loc 6 208 0
-	movs	r2, #20
-	.loc 6 214 0
 	mov	r0, r4
-	.loc 6 207 0
-	strh	r6, [r3]	@ movhi
-	.loc 6 208 0
-	ldr	r3, .L2551+76
-	strh	r2, [r3]	@ movhi
-	b	.L2528
-.LVL2771:
-.L2540:
-	.loc 6 167 0
-	uxth	r3, r6
-	movs	r7, #12
-	.loc 6 168 0
-	ldr	r2, [fp]
-	.loc 6 167 0
-	muls	r7, r3, r7
-	ldr	r3, .L2551+80
-	ldr	r8, [r3]
-	add	r10, r8, r7
-.LVL2772:
-	.loc 6 168 0
-	ldr	r1, [r10, #8]
-	cmp	r1, r2
-	bcc	.L2537
-	.loc 6 168 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2551+28
-	movs	r2, #168
-	ldr	r0, .L2551+32
-	bl	printf
-.LVL2773:
-	ldr	r1, .L2551+36
-	ldr	r0, .L2551+40
-	bl	printf
-.LVL2774:
-.L2537:
-	.loc 6 169 0 is_stmt 1
+	bl	make_superblock
+	ldr	r3, .L2311+24
 	movs	r2, #0
-	add	r1, sp, #12
-	ldr	r0, [r10, #8]
-	bl	log2phys
-.LVL2775:
-	.loc 6 170 0
-	ldr	r2, [sp, #12]
-	ldr	r0, [r8, r7]
-	cmp	r0, r2
-	bne	.L2538
-	.loc 6 171 0
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL2776:
-	.loc 6 172 0
+	ldr	r0, [r6]
+	mov	r4, r2
+	ldrh	lr, [r3]
+	ldr	r3, .L2311+28
+	ldr	r3, [r3]
+	str	r3, [sp, #32]
+	ldr	r3, .L2311+32
+	ldrh	ip, [r3]
+	ldr	r3, .L2311+36
+	ldr	r3, [r3]
+	str	r3, [sp, #36]
+	ldr	r3, .L2311+40
+	ldrh	r8, [r3]
+.L2303:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2305
+	ldr	r10, .L2311+44
+	movs	r7, #0
+	mov	r8, #36
+	movs	r2, #0
+	mov	r1, r4
+	bl	FlashReadPages
+.L2306:
+	uxth	r3, r7
+	cmp	r4, r3
+	bhi	.L2307
+	ldr	r10, .L2311+48
+	movs	r7, #0
+	mov	r8, #36
 	movs	r2, #1
-	.loc 6 171 0
-	mov	r7, r0
-.LVL2777:
-	.loc 6 172 0
-	add	r1, r10, #4
-	ldr	r0, [r10, #8]
-	bl	log2phys
-.LVL2778:
-	.loc 6 173 0
-	mov	r0, r7
-.LVL2779:
-.L2550:
-	.loc 6 177 0
-	bl	decrement_vpc_count
-.LVL2780:
-.L2539:
-	adds	r6, r6, #1
-.LVL2781:
-	b	.L2536
-.LVL2782:
-.L2538:
-	.loc 6 175 0
-	ldr	r3, [r10, #4]
-	cmp	r2, r3
-	beq	.L2539
-	.loc 6 177 0
-	ldrh	r0, [r4]
-	b	.L2550
-.LVL2783:
-.L2542:
-	.loc 6 187 0
-	bl	INSERT_FREE_LIST
-.LVL2784:
-	b	.L2543
-.L2552:
+	mov	r1, r4
+	ldr	r0, [r6]
+	bl	FlashReadPages
+.L2308:
+	uxth	r3, r7
+	cmp	r4, r3
+	bhi	.L2309
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	str	r3, [sp, #28]
+	b	.L2302
+.L2305:
+	ldrh	r3, [r7, #2]!
+	cmp	r3, r10
+	beq	.L2304
+	mla	r1, fp, r4, r0
+	ldr	r5, [sp, #32]
+	lsls	r3, r3, #10
+	str	r3, [r1, #4]
+	mul	r3, ip, r4
+	bic	r3, r3, #3
+	add	r3, r3, r5
+	ldr	r5, [sp, #36]
+	str	r3, [r1, #8]
+	mul	r3, r8, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	r3, r3, #3
+	add	r3, r3, r5
+	str	r3, [r1, #12]
+.L2304:
+	adds	r2, r2, #1
+	b	.L2303
+.L2307:
+	mul	r2, r8, r7
+	ldr	r0, [r6]
+	ldrh	r1, [sp, #40]
+	adds	r7, r7, #1
+	add	lr, r0, r2
+	ldr	fp, [lr, #8]
+	ldr	r3, [lr, #12]
+	ldr	r5, [fp, #4]
+	str	r5, [sp, #20]
+	ldr	r5, [fp]
+	str	r5, [sp, #16]
+	ldr	r5, [r3, #12]
+	str	r5, [sp, #12]
+	ldr	r5, [r3, #8]
+	str	r5, [sp, #8]
+	ldr	r5, [r3, #4]
+	str	r5, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r2, [r0, r2]
+	mov	r0, r10
+	ldr	r3, [lr, #4]
+	bl	printf
+	b	.L2306
+.L2309:
+	mul	r2, r8, r7
+	ldr	r0, [r6]
+	ldrh	r1, [sp, #40]
+	adds	r7, r7, #1
+	add	lr, r0, r2
+	ldr	fp, [lr, #8]
+	ldr	r3, [lr, #12]
+	ldr	r5, [fp, #4]
+	str	r5, [sp, #20]
+	ldr	r5, [fp]
+	str	r5, [sp, #16]
+	ldr	r5, [r3, #12]
+	str	r5, [sp, #12]
+	ldr	r5, [r3, #8]
+	str	r5, [sp, #8]
+	ldr	r5, [r3, #4]
+	str	r5, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r2, [r0, r2]
+	mov	r0, r10
+	ldr	r3, [lr, #4]
+	bl	printf
+	b	.L2308
+.L2312:
 	.align	2
-.L2551:
-	.word	.LANCHOR76
-	.word	.LANCHOR93
-	.word	.LANCHOR132
-	.word	.LANCHOR52
-	.word	.LANCHOR78
-	.word	.LANCHOR135
-	.word	.LANCHOR111
-	.word	.LANCHOR234
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR83
-	.word	.LANCHOR158
-	.word	.LANCHOR8
+.L2311:
+	.word	.LANCHOR180
+	.word	.LANCHOR225
+	.word	.LC46
+	.word	.LANCHOR41
+	.word	.LANCHOR84
 	.word	.LC50
-	.word	.LANCHOR109
-	.word	.LANCHOR88
-	.word	.LANCHOR227
-	.word	.LANCHOR201
-	.word	.LANCHOR173
-	.word	.LANCHOR110
-	.word	.LANCHOR72
-	.cfi_endproc
-.LFE396:
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
-	.align	1
-	.global	Ftl_get_new_temp_ppa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-.LFB400:
-	.loc 6 318 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 319 0
-	movw	r3, #65535
-	ldr	r4, .L2556
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	beq	.L2554
-	.loc 6 319 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2555
-.L2554:
-	.loc 6 320 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL2785:
-	.loc 6 321 0
-	movs	r0, #0
-	.loc 6 322 0
-	movs	r5, #0
-	.loc 6 321 0
-	bl	FtlGcFreeTempBlock
-.LVL2786:
-	.loc 6 323 0
-	ldr	r0, .L2556
-	.loc 6 322 0
-	strb	r5, [r4, #8]
-	.loc 6 323 0
-	bl	allocate_data_superblock
-.LVL2787:
-	.loc 6 324 0
-	ldr	r3, .L2556+4
-	strh	r5, [r3]	@ movhi
-	.loc 6 325 0
-	ldr	r3, .L2556+8
-	strh	r5, [r3]	@ movhi
-	.loc 6 326 0
-	bl	l2p_flush
-.LVL2788:
-	.loc 6 327 0
-	mov	r0, r5
-	bl	FtlEctTblFlush
-.LVL2789:
-	.loc 6 328 0
-	bl	FtlVpcTblFlush
-.LVL2790:
-.L2555:
-	.loc 6 330 0
-	ldr	r0, .L2556
-	.loc 6 331 0
-	pop	{r3, r4, r5, lr}
-	.cfi_restore 14
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-	.loc 6 330 0
-	b	get_new_active_ppa
-.LVL2791:
-.L2557:
-	.align	2
-.L2556:
-	.word	.LANCHOR93
-	.word	.LANCHOR109
-	.word	.LANCHOR111
-	.cfi_endproc
-.LFE400:
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.word	.LANCHOR38
+	.word	.LANCHOR105
+	.word	.LANCHOR58
+	.word	.LANCHOR106
+	.word	.LANCHOR59
+	.word	.LC51
+	.word	.LC52
+	.size	FtlScanAllBlock, .-FtlScanAllBlock
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
-	.global	Ftl_gc_temp_data_write_back
+	.global	FtlMapTblRecovery
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-.LFB401:
-	.loc 6 334 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 6 338 0
-	ldr	r3, .L2575
-	ldr	r5, .L2575+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2559
-	.loc 6 338 0 is_stmt 0 discriminator 1
-	ldr	r3, [r5]
-	lsls	r1, r3, #31
-	bpl	.L2559
-	.loc 6 338 0 discriminator 2
-	ldr	r3, .L2575+8
-	ldrh	r3, [r3, #4]
-	cbz	r3, .L2559
-.L2564:
-	.loc 6 339 0 is_stmt 1
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2559:
-	.loc 6 341 0
-	ldr	r4, .L2575+12
-	movs	r3, #0
+	ldr	r3, [r0, #16]
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldrh	fp, [r0, #6]
+	mov	r4, r0
 	movs	r6, #0
-.LBB510:
-.LBB511:
-	.loc 6 343 0
-	movs	r7, #36
-.LBE511:
-.LBE510:
-	.loc 6 341 0
+	ldr	r8, [r0, #24]
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #8]
+	lsl	r2, fp, #2
+	ldr	r10, [r0, #12]
+	mov	r0, r8
+	ldr	r5, .L2338
+	str	r3, [sp, #4]
+	bl	ftl_memset
+	ldr	r3, .L2338+4
+	str	r6, [r4, #32]
+	str	r6, [r4, #28]
+	ldr	r2, [r3]
+	str	r3, [sp, #8]
+	str	r2, [r5, #8]
+	ldr	r2, .L2338+8
+	ldr	r7, [r2]
+	movw	r2, #65535
+	str	r7, [r5, #12]
+	strh	r2, [r4]	@ movhi
+	strh	r2, [r4, #2]	@ movhi
+	movs	r2, #1
+	str	r2, [r4, #36]
+.L2314:
+	ldr	r2, [sp, #4]
+	sxth	r3, r6
+	cmp	r3, r2
+	bge	.L2332
+	ldr	r2, [sp, #4]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	lsl	r2, r3, #1
+	bne	.L2315
+	ldrh	r0, [r10, r3, lsl #1]
+	movs	r1, #1
+	add	r5, r10, r2
+	str	r3, [sp, #4]
+	bl	FtlGetLastWrittenPage
+	ldr	r3, [sp, #12]
+	sxth	r10, r0
+	strh	r6, [r4]	@ movhi
+	movs	r6, #0
+	adds	r0, r0, #1
 	mov	r2, r3
-	ldr	r1, [r5]
-	ldr	r0, [r4]
-	bl	FlashProgPages
-.LVL2792:
-.L2561:
-.LBB514:
-.LBB512:
-	.loc 6 342 0
-	ldr	r1, [r5]
-	uxth	r3, r6
-	cmp	r3, r1
-	bcc	.L2563
-	.loc 6 356 0
-	ldr	r0, [r4]
-	bl	FtlGcBufFree
-.LVL2793:
-	.loc 6 357 0
-	movs	r3, #0
-	str	r3, [r5]
-	.loc 6 358 0
-	ldr	r3, .L2575+8
-	ldrh	r3, [r3, #4]
-	cmp	r3, #0
-	bne	.L2564
-	.loc 6 359 0
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-.LVL2794:
-	b	.L2574
-.L2563:
-	.loc 6 343 0
-	muls	r3, r7, r3
-	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	strh	r0, [r4, #2]	@ movhi
+	ldr	r3, [r2, r3, lsl #2]
+	str	r3, [r4, #28]
+	ldr	r3, .L2338
+.L2316:
+	sxth	r2, r6
+	cmp	r2, r10
+	ble	.L2319
+.L2332:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L2338+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2321
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L2321:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2319:
+	ldrh	r1, [r5]
+	ldr	r0, .L2338
+	str	r3, [sp, #4]
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r3, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	beq	.L2317
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L2318
+	ldrh	r0, [r7]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	bne	.L2318
+	ldr	r1, [r3, #4]
+	str	r1, [r8, r2, lsl #2]
+.L2318:
 	adds	r6, r6, #1
-.LVL2795:
-	ldr	r0, [r2, r3]
-	adds	r1, r2, r3
-	adds	r2, r0, #1
-	bne	.L2562
-	.loc 6 344 0
-	ldr	r2, .L2575+8
-	movs	r6, #0
-	ldr	r1, .L2575+16
-	ldrh	r5, [r2]
+	b	.L2316
+.L2317:
+	ldrh	r2, [r5]
+	strh	r2, [r4, #40]	@ movhi
+	b	.L2318
+.L2315:
+	ldr	r1, [sp, #8]
+	add	r2, r10, r2
+	str	r2, [sp, #16]
+	ldr	r0, .L2338
 	ldr	r1, [r1]
-	strh	r6, [r1, r5, lsl #1]	@ movhi
-	.loc 6 346 0
-	ldr	r1, .L2575+20
-	.loc 6 345 0
-	strh	r0, [r2]	@ movhi
-	.loc 6 346 0
-	ldr	r2, [r1, #96]
+	str	r1, [r5, #8]
+	ldrh	r1, [r10, r3, lsl #1]
+	ldr	r3, .L2338+12
+	ldrh	r2, [r3]
+	str	r3, [sp, #20]
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r5]
 	adds	r2, r2, #1
-	str	r2, [r1, #96]
-	.loc 6 347 0
-	ldr	r2, [r4]
-	add	r3, r3, r2
-	ldr	r0, [r3, #4]
-	ubfx	r0, r0, #10, #16
-	bl	FtlBbmMapBadBlock
-.LVL2796:
-	.loc 6 348 0
-	bl	FtlBbmTblFlush
-.LVL2797:
-	.loc 6 349 0
-	bl	FtlGcPageVarInit
-.LVL2798:
-.L2574:
-	.loc 6 360 0
-	movs	r0, #1
-.LBE512:
-.LBE514:
-	.loc 6 363 0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2562:
-.LBB515:
-.LBB513:
-	.loc 6 352 0
-	ldr	r3, [r1, #12]
-.LVL2799:
-	.loc 6 353 0
-	ldr	r1, [r1, #4]
-	ldr	r2, [r3, #8]
-	ldr	r0, [r3, #12]
-	bl	FtlGcUpdatePage
-.LVL2800:
-	b	.L2561
-.L2576:
+	beq	.L2334
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	ldr	r3, [sp, #20]
+	cmp	r1, r2
+	bne	.L2334
+	ldrh	r1, [r7, #8]
+	movw	r2, #64245
+	cmp	r1, r2
+	beq	.L2323
+.L2334:
+	movs	r3, #0
+.L2324:
+	ldr	r1, .L2338+12
+	sxth	r2, r3
+	ldrh	r1, [r1]
+	cmp	r2, r1
+	bge	.L2330
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #16]
+	ldr	r0, .L2338
+	ldrh	r1, [r3]
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r5]
+	ldr	r3, [sp, #20]
+	adds	r2, r2, #1
+	beq	.L2328
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L2328
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
+	cmp	r0, r1
+	itt	eq
+	ldreq	r1, [r5, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L2328:
+	adds	r3, r3, #1
+	b	.L2324
+.L2323:
+	ldrh	r2, [r3]
+	movs	r1, #0
+	ldr	r3, [sp, #8]
+	subs	r2, r2, #1
+	ldr	ip, [r3]
+.L2325:
+	sxth	r3, r1
+	cmp	r3, r2
+	blt	.L2327
+.L2330:
+	adds	r6, r6, #1
+	b	.L2314
+.L2327:
+	lsls	r0, r3, #3
+	ldr	r3, [ip, r3, lsl #3]
+	adds	r1, r1, #1
+	uxth	lr, r3
+	cmp	fp, lr
+	itttt	hi
+	addhi	r0, r0, ip
+	movhi	r3, lr
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r8, r3, lsl #2]
+	b	.L2325
+.L2339:
 	.align	2
-.L2575:
-	.word	.LANCHOR8
-	.word	.LANCHOR102
-	.word	.LANCHOR93
-	.word	.LANCHOR178
-	.word	.LANCHOR83
-	.word	.LANCHOR135
-.LBE513:
-.LBE515:
-	.cfi_endproc
-.LFE401:
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.FtlGcPageRecovery,"ax",%progbits
+.L2338:
+	.word	.LANCHOR202
+	.word	.LANCHOR183
+	.word	.LANCHOR188
+	.word	.LANCHOR54
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcPageRecovery
+	.global	FtlLoadVonderInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-.LFB399:
-	.loc 6 307 0
-	.cfi_startproc
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 6 308 0
-	ldr	r4, .L2579
-	ldr	r5, .L2579+4
-	ldrh	r1, [r4]
-	mov	r0, r5
-	bl	FtlGcScanTempBlk
-.LVL2801:
-	.loc 6 309 0
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4]
-	cmp	r2, r3
-	bcc	.L2577
-.LBB518:
-.LBB519:
-	.loc 6 311 0
-	ldr	r0, .L2579+8
-	bl	FtlMapBlkWriteDumpData
-.LVL2802:
-	.loc 6 312 0
+	push	{r3, lr}
+	ldr	r3, .L2341
+	ldr	r0, .L2341+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L2341+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L2341+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L2341+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	ldr	r3, .L2341+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L2341+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L2341+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	movw	r3, #65535
+	strh	r3, [r0, #40]	@ movhi
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-.LVL2803:
-	.loc 6 313 0
-	ldr	r3, .L2579+12
-	movs	r2, #0
-	str	r2, [r3]
-.L2577:
-	pop	{r3, r4, r5, pc}
-.L2580:
+	pop	{r3, pc}
+.L2342:
 	.align	2
-.L2579:
-	.word	.LANCHOR52
-	.word	.LANCHOR93
-	.word	.LANCHOR124
-	.word	.LANCHOR132
-.LBE519:
-.LBE518:
-	.cfi_endproc
-.LFE399:
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+.L2341:
+	.word	.LANCHOR62
+	.word	.LANCHOR215
+	.word	.LANCHOR71
+	.word	.LANCHOR63
+	.word	.LANCHOR72
+	.word	.LANCHOR193
+	.word	.LANCHOR192
+	.word	.LANCHOR194
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
-	.global	FtlPowerLostRecovery
+	.global	FtlLoadMapInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlPowerLostRecovery, %function
-FtlPowerLostRecovery:
-.LFB374:
-	.loc 1 2319 0
-	.cfi_startproc
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 2320 0
-	movs	r4, #0
-	.loc 1 2322 0
-	ldr	r5, .L2582
-	.loc 1 2320 0
-	ldr	r3, .L2582+4
-	.loc 1 2322 0
-	mov	r0, r5
-	.loc 1 2320 0
-	str	r4, [r3]
-	.loc 1 2322 0
-	bl	FtlRecoverySuperblock
-.LVL2804:
-	.loc 1 2323 0
-	mov	r0, r5
-	.loc 1 2324 0
-	ldr	r5, .L2582+8
-	.loc 1 2323 0
-	bl	FtlSlcSuperblockCheck
-.LVL2805:
-	.loc 1 2324 0
-	mov	r0, r5
-	bl	FtlRecoverySuperblock
-.LVL2806:
-	.loc 1 2325 0
-	mov	r0, r5
-	bl	FtlSlcSuperblockCheck
-.LVL2807:
-	.loc 1 2326 0
-	bl	FtlGcPageRecovery
-.LVL2808:
-	.loc 1 2327 0
-	movw	r0, #65535
-	bl	decrement_vpc_count
-.LVL2809:
-	.loc 1 2329 0
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L2583:
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L2344
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2345:
 	.align	2
-.L2582:
-	.word	.LANCHOR91
-	.word	.LANCHOR231
-	.word	.LANCHOR92
-	.cfi_endproc
-.LFE374:
-	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.section	.text.FtlSysBlkInit,"ax",%progbits
+.L2344:
+	.word	.LANCHOR127
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
-	.global	FtlSysBlkInit
+	.global	FtlGcScanTempBlk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-.LFB381:
-	.loc 1 2603 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 1 2607 0
+	ldr	r3, .L2373
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r5, r0
+	ldrh	r4, [r3]
+	str	r3, [sp, #16]
+	cmp	r4, r2
+	beq	.L2364
+	cbnz	r4, .L2347
+.L2348:
+	bl	FtlGcPageVarInit
+	b	.L2349
+.L2364:
+	movs	r4, #0
+.L2347:
+	ldr	r3, .L2373+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L2348
+.L2349:
+	ldr	fp, .L2373+44
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L2361:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	movs	r0, #0
+	strb	r0, [r5, #8]
+	cmp	r2, r3
+	beq	.L2350
+.L2363:
+	ldr	r3, .L2373+8
+	movw	ip, #65535
+	ldr	r0, [fp]
+	mov	lr, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2373+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2373+16
+	ldrh	r10, [r3]
+	add	r3, r5, #16
+	str	r3, [sp, #4]
 	movs	r3, #0
-	ldr	r4, .L2594
-	.loc 1 2608 0
-	movw	r5, #65535
-	.loc 1 2607 0
-	strh	r3, [r4]	@ movhi
-	.loc 1 2608 0
-	ldr	r3, .L2594+4
-	strh	r5, [r3]	@ movhi
-	.loc 1 2610 0
-	ldr	r3, .L2594+8
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-.LVL2810:
-	.loc 1 2611 0
-	bl	FtlScanSysBlk
-.LVL2811:
-	.loc 1 2612 0
-	ldr	r3, .L2594+12
+	mov	r6, r3
+.L2351:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2353
+	movs	r7, #0
+	mov	r10, #36
+	movs	r2, #0
+	mov	r1, r6
+	bl	FlashReadPages
+.L2354:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L2362
+	ldr	r3, .L2373+4
+	adds	r4, r4, #1
+	uxth	r4, r4
 	ldrh	r3, [r3]
-	cmp	r3, r5
-	bne	.L2585
-.L2587:
-	.loc 1 2613 0
-	mov	r6, #-1
-.L2584:
-	.loc 1 2707 0
-	mov	r0, r6
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2585:
-	.loc 1 2615 0
-	bl	FtlLoadSysInfo
-.LVL2812:
-	mov	r6, r0
-	cmp	r0, #0
-	bne	.L2587
-	.loc 1 2618 0
-	bl	FtlLoadMapInfo
-.LVL2813:
-	.loc 1 2619 0
-	bl	FtlLoadVonderInfo
-.LVL2814:
-	.loc 1 2620 0
-	bl	Ftl_load_ext_data
-.LVL2815:
-	.loc 1 2622 0
-	bl	FtlLoadEctTbl
-.LVL2816:
-	.loc 1 2623 0
-	bl	FtlFreeSysBLkSort
-.LVL2817:
-	.loc 1 2625 0
-	bl	SupperBlkListInit
-.LVL2818:
-	.loc 1 2626 0
-	bl	FtlPowerLostRecovery
-.LVL2819:
-	.loc 1 2628 0
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-.LVL2820:
-.LBB523:
-.LBB524:
-	.loc 1 2630 0
-	ldr	r3, .L2594+16
-	.loc 1 2631 0
-	movs	r0, #12
-	.loc 1 2630 0
+	cmp	r3, r4
+	bhi	.L2363
+	movs	r0, #0
+	b	.L2350
+.L2353:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, ip
+	str	r1, [sp, #4]
+	beq	.L2352
+	mla	r1, lr, r6, r0
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, r10, r6
+	adds	r6, r6, #1
+	uxth	r6, r6
+	bic	r2, r2, #3
+	mov	r7, r2
+	ldr	r2, [sp, #12]
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2352:
+	adds	r3, r3, #1
+	b	.L2351
+.L2362:
+	mul	r8, r10, r7
+	ldr	r2, [fp]
+	str	r2, [sp, #20]
+	add	r3, r2, r8
+	ldr	r1, [r3, #4]
+	str	r3, [sp, #12]
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_plane
+	ldr	r2, [sp, #20]
+	ldr	r1, [sp, #4]
+	ldr	r2, [r2, r8]
+	cbnz	r2, .L2355
+	ldr	r3, [sp, #12]
+	movw	ip, #65535
+	adds	r7, r7, #1
+	ldr	r3, [r3, #12]
 	ldrh	r2, [r3]
-	.loc 1 2631 0
-	ldr	r3, .L2594+20
-	ldr	r1, [r3]
-	.loc 1 2630 0
-	mov	r3, r6
-.L2588:
-.LVL2821:
-	cmp	r3, r2
-	blt	.L2590
-	.loc 1 2636 0
-	ldrh	r3, [r4]
-.LVL2822:
-	cmp	r3, #0
-	beq	.L2584
-.L2589:
-	.loc 1 2637 0
-	ldr	r5, .L2594+24
-	.loc 1 2638 0
-	ldr	r4, .L2594+28
-	.loc 1 2637 0
+	cmp	r2, ip
+	bne	.L2356
+	ldr	r3, .L2373+20
+	movs	r2, #1
+	str	r2, [r3]
+.L2350:
+	ldr	r2, [sp, #16]
+	movw	r3, #65535
+	strb	r0, [r5, #6]
+	mov	r1, r4
+	strh	r4, [r5, #2]	@ movhi
+	strh	r3, [r2]	@ movhi
+	mov	r2, r0
 	mov	r0, r5
-	bl	FtlSuperblockPowerLostFix
-.LVL2823:
-	.loc 1 2638 0
-	mov	r0, r4
-	bl	FtlSuperblockPowerLostFix
-.LVL2824:
-.LBB525:
-	.loc 1 2643 0
-	ldr	r2, .L2594+32
-	ldrh	r0, [r5]
-	ldrh	r7, [r5, #4]
-	ldr	r1, [r2]
-	ldrh	r3, [r1, r0, lsl #1]
-	subs	r3, r3, r7
-	strh	r3, [r1, r0, lsl #1]	@ movhi
-	.loc 1 2644 0
-	ldr	r1, .L2594+36
-	.loc 1 2649 0
-	ldr	r0, [r2]
-	ldrh	r7, [r4, #4]
-	.loc 1 2644 0
-	ldrh	r3, [r1]
-	strh	r3, [r5, #2]	@ movhi
-	.loc 1 2645 0
-	movs	r3, #0
-	strb	r3, [r5, #6]
-	.loc 1 2646 0
-	strh	r3, [r5, #4]	@ movhi
-.LVL2825:
-	.loc 1 2649 0
-	ldrh	r5, [r4]
-	ldrh	r2, [r0, r5, lsl #1]
-	subs	r2, r2, r7
-	strh	r2, [r0, r5, lsl #1]	@ movhi
-	.loc 1 2650 0
-	ldrh	r2, [r1]
-.LBE525:
-	.loc 1 2662 0
-	ldr	r0, .L2594+40
-.LBB526:
-	.loc 1 2651 0
-	strb	r3, [r4, #6]
-	.loc 1 2650 0
-	strh	r2, [r4, #2]	@ movhi
-	.loc 1 2652 0
-	strh	r3, [r4, #4]	@ movhi
-.LBE526:
-	.loc 1 2662 0
-	bl	FtlMapBlkWriteDumpData
-.LVL2826:
-	.loc 1 2663 0
-	ldr	r0, .L2594+44
-	bl	FtlMapBlkWriteDumpData
-.LVL2827:
-	.loc 1 2675 0
-	ldr	r2, .L2594+48
-	ldrh	r3, [r2, #30]
-	adds	r3, r3, #1
-	strh	r3, [r2, #30]	@ movhi
-	.loc 1 2676 0
-	bl	l2p_flush
-.LVL2828:
-	.loc 1 2677 0
-	bl	FtlVpcTblFlush
-.LVL2829:
-	.loc 1 2678 0
-	bl	FtlVpcTblFlush
-.LVL2830:
-	b	.L2584
-.LVL2831:
-.L2590:
-	.loc 1 2631 0
-	mla	r5, r0, r3, r1
-	ldr	r5, [r5, #4]
-	cmp	r5, #0
-	blt	.L2589
-	.loc 1 2630 0
+	bl	ftl_sb_update_avl_pages
+	ldr	r0, [sp, #8]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2356:
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2354
+.L2355:
+	mov	r2, r1
+	ldr	r0, .L2373+24
+	ldrh	r1, [r5]
+	bl	printf
+	ldr	r3, .L2373+28
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	cbnz	r3, .L2357
+	ldr	r3, .L2373+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2358
+.L2357:
+	ldr	r3, .L2373+36
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #159
+	bls	.L2359
+.L2358:
+	ldr	r3, [fp]
+	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-.LVL2832:
-	b	.L2588
-.L2595:
+	bne	.L2360
+.L2359:
+	ldr	r3, [fp]
+	add	r3, r3, r8
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #8]
+.L2360:
+	ldr	r3, .L2373+40
+	movs	r4, #0
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L2361
+.L2374:
 	.align	2
-.L2594:
-	.word	.LANCHOR230
-	.word	.LANCHOR229
+.L2373:
+	.word	.LANCHOR226
+	.word	.LANCHOR53
 	.word	.LANCHOR38
-	.word	.LANCHOR206
-	.word	.LANCHOR67
-	.word	.LANCHOR96
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR83
-	.word	.LANCHOR52
-	.word	.LANCHOR124
-	.word	.LANCHOR215
-	.word	.LANCHOR80
-.LBE524:
-.LBE523:
-	.cfi_endproc
-.LFE381:
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.word	.LANCHOR106
+	.word	.LANCHOR59
+	.word	.LANCHOR135
+	.word	.LC53
+	.word	.LANCHOR28
+	.word	.LANCHOR8
+	.word	.LANCHOR79
+	.word	.LANCHOR84
+	.word	.LANCHOR180
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
-	.global	rk_ftl_garbage_collect
+	.global	FlashReadFacBbtData
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-.LFB407:
-	.loc 6 533 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 40
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2833:
-	.loc 6 541 0
-	ldr	r3, .L2686
-	.loc 6 533 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 6 541 0
-	ldr	r2, [r3]
-	cmp	r2, #0
-	bne	.L2648
-	.loc 6 544 0
-	ldr	r3, .L2686+4
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L2648
-	.loc 6 547 0
-	ldr	r2, .L2686+8
-	ldrh	r2, [r2]
-	cmp	r2, #47
-	bls	.L2650
-.LVL2834:
-.LBB529:
-.LBB530:
-	.loc 6 555 0
-	ldr	r3, .L2686+12
-	movw	r5, #65535
-	ldrh	r4, [r3]
-	cmp	r4, r5
-	beq	.L2598
-	ldr	r1, .L2686+16
-.LVL2835:
-	ldrh	r2, [r1]
-	cmp	r2, r5
-	.loc 6 556 0
-	itt	eq
-	strheq	r4, [r1]	@ movhi
-	.loc 6 557 0
-	strheq	r2, [r3]	@ movhi
-.L2598:
-	.loc 6 676 0
-	cmp	r0, #0
-	bne	.L2651
-	.loc 6 677 0
-	ldr	r3, .L2686+20
-	ldrh	r3, [r3]
-	cmp	r3, #24
-	bhi	.L2652
-	ldr	r2, .L2686+24
-	.loc 6 679 0
-	cmp	r3, #16
-	.loc 6 680 0
-	ldrh	r4, [r2]
-	.loc 6 679 0
-	bls	.L2601
-	.loc 6 680 0
-	lsrs	r4, r4, #5
-.LVL2836:
-.L2600:
-	.loc 6 688 0
-	ldr	r2, .L2686+28
-	ldrh	r1, [r2]
-	cmp	r1, r3
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r2, .L2388
+	sub	sp, sp, #48
+	mov	r6, r1
+	mov	r4, r0
+	ldr	r7, .L2388+4
+	ldrh	r3, [r2, #14]
+	ldrh	r2, [r2, #12]
+	smulbb	r3, r3, r2
+	ldr	r2, [r7]
+	uxth	r3, r3
+	str	r2, [sp, #20]
+	ldr	r2, .L2388+8
+	subs	r5, r3, #1
+	mul	r10, r6, r3
+	uxth	r5, r5
+	subs	r3, r3, #15
+	ldr	r1, [r2]
+	mov	r8, r2
+	str	r1, [sp, #24]
+.L2376:
+	cmp	r3, r5
+	ble	.L2383
+	mov	r0, #-1
+	b	.L2375
+.L2383:
+	add	r2, r5, r10
+	add	r0, sp, #12
+	lsls	r2, r2, #10
+	str	r3, [sp, #4]
+	str	r2, [sp, #16]
+	movs	r2, #1
 	mov	r1, r2
-	bcs	.L2604
-	.loc 6 689 0
-	ldr	r3, .L2686+32
-	movw	r0, #65535
-.LVL2837:
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bne	.L2605
-	ldr	r0, .L2686+16
-	ldrh	r0, [r0]
-	cmp	r0, r3
-	bne	.L2605
-	.loc 6 691 0
-	ldr	r3, .L2686+36
-	ldrh	r0, [r3]
-	cbnz	r0, .L2606
-	ldr	r3, .L2686+40
-	ldr	r4, .L2686+44
-.LVL2838:
-	ldr	r3, [r3]
-	ldr	r4, [r4]
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, lsr #2
-	bcs	.L2607
-.L2606:
-	.loc 6 692 0
-	ldr	r3, .L2686+48
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L2608:
-	.loc 6 695 0
-	ldr	r3, .L2686+52
-	movs	r2, #0
-	str	r2, [r3]
-.LVL2839:
-.L2596:
-.LBE530:
-.LBE529:
-	.loc 6 934 0
-	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2377
+	ldr	r2, [r8]
+	ldrh	r1, [r2]
+	movw	r2, #61664
+	cmp	r1, r2
+	bne	.L2377
+	cbz	r4, .L2384
+	cbz	r6, .L2379
+.L2382:
+	mov	r2, fp
+	ldr	r1, [r7]
+	mov	r0, r4
+	bl	ftl_memcpy
+	movs	r3, #4
+	ldr	r0, .L2388+12
+	mov	r2, r3
+	mov	r1, r4
+	bl	rknand_print_hex
+	movs	r0, #0
+.L2375:
+	add	sp, sp, #48
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2840:
-.L2601:
-	.cfi_restore_state
-.LBB532:
-.LBB531:
-	.loc 6 681 0
-	cmp	r3, #12
-	bls	.L2602
-	.loc 6 682 0
-	lsrs	r4, r4, #4
-.LVL2841:
-	b	.L2600
-.LVL2842:
-.L2602:
-	.loc 6 683 0
-	cmp	r3, #8
-	bls	.L2600
-	.loc 6 684 0
-	lsrs	r4, r4, #2
-.LVL2843:
-	b	.L2600
-.LVL2844:
-.L2652:
-	.loc 6 678 0
-	movs	r4, #1
-	b	.L2600
-.LVL2845:
-.L2607:
-	.loc 6 694 0
-	movs	r3, #18
-	strh	r3, [r2]	@ movhi
-	b	.L2608
-.LVL2846:
-.L2605:
-	.loc 6 698 0
-	ldr	r3, .L2686+48
-	ldrh	r3, [r3]
-	add	r3, r3, r3, lsl #1
-	asrs	r3, r3, #2
-	strh	r3, [r1]	@ movhi
-.L2604:
-	.loc 6 704 0
-	ldr	r3, .L2686+56
-	ldrh	r3, [r3]
-	cbz	r3, .L2599
-	.loc 6 705 0
-	adds	r4, r4, #32
-.LVL2847:
+.L2379:
+	ldr	r1, [r7]
+	mov	ip, #1
+	ldr	r5, .L2388+16
+.L2380:
+	ldr	r0, [r5]
+	uxth	r3, r6
+	adds	r6, r6, #1
+	cmp	r3, r0
+	bcs	.L2382
+	lsrs	r0, r3, #5
+	and	r3, r3, #31
+	lsl	r3, ip, r3
+	ldr	r2, [r1, r0, lsl #2]
+	orrs	r3, r3, r2
+	str	r3, [r1, r0, lsl #2]
+	b	.L2380
+.L2377:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2376
+.L2384:
+	mov	r0, r4
+	b	.L2375
+.L2389:
+	.align	2
+.L2388:
+	.word	.LANCHOR15
+	.word	.LANCHOR147
+	.word	.LANCHOR197
+	.word	.LC54
+	.word	.LANCHOR149
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L2400
+	ldr	r6, .L2400+4
+	ldr	r3, [r3]
+	ldr	r0, [r6]
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
 	uxth	r4, r4
-.LVL2848:
-.L2599:
-	.loc 6 753 0
-	ldr	r5, .L2686+60
-	movw	r3, #65535
-	ldrh	r2, [r5]
-	cmp	r2, r3
-	bne	.L2611
-	.loc 6 756 0
-	ldr	r3, .L2686+16
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	beq	.L2612
-	.loc 6 760 0
-	ldr	r0, .L2686+64
-	ldr	r0, [r0]
-	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2613
-	.loc 6 761 0
-	strh	r2, [r3]	@ movhi
-.L2613:
-	.loc 6 762 0
-	ldrh	r2, [r3]
-	strh	r2, [r5]	@ movhi
-	.loc 6 763 0
-	movw	r2, #65535
-	strh	r2, [r3]	@ movhi
-.L2612:
-	.loc 6 767 0
-	ldrh	r0, [r5]
-	movw	r6, #65535
-	.loc 6 766 0
-	movs	r3, #0
-	strb	r3, [r5, #8]
-	.loc 6 767 0
-	cmp	r0, r6
-	beq	.L2611
-	.loc 6 768 0
-	bl	IsBlkInGcList
-.LVL2849:
-	cbz	r0, .L2615
-	.loc 6 769 0
-	strh	r6, [r5]	@ movhi
-.L2615:
-	.loc 6 771 0
-	ldr	r3, .L2686+68
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2616
-	.loc 6 772 0
-	ldrh	r0, [r5]
-	bl	ftl_get_blk_mode
-.LVL2850:
-	strb	r0, [r5, #8]
-.L2616:
-	.loc 6 775 0
-	ldrh	r2, [r5]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L2611
-	.loc 6 776 0
-	ldr	r0, .L2686+60
-	bl	make_superblock
-.LVL2851:
-	.loc 6 779 0
-	ldr	r2, .L2686+72
-	.loc 6 777 0
+	adds	r2, r4, #7
+	asrs	r2, r2, #3
+	bl	FlashReadFacBbtData
+	adds	r0, r0, #1
+	bne	.L2391
+.L2395:
 	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 6 778 0
-	strb	r3, [r5, #6]
-	.loc 6 779 0
-	strh	r3, [r2]	@ movhi
-	.loc 6 780 0
-	ldr	r3, .L2686+64
-	ldrh	r2, [r5]
-	ldr	r3, [r3]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2686+76
-	strh	r2, [r3]	@ movhi
-.L2611:
-	.loc 6 785 0
-	ldr	r2, .L2686+80
-	ldrh	r3, [r5]
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L2617
-	ldr	r2, .L2686+84
-	ldrh	r2, [r2]
-	cmp	r2, r3
-	beq	.L2617
-	.loc 6 791 0
-	ldr	r6, .L2686+60
-	mov	r5, r6
-.L2618:
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L2619
-	.loc 6 795 0
-	ldr	r10, .L2686+92
-	.loc 6 792 0
+.L2392:
+	movw	r2, #65535
+	movs	r0, #0
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2391:
+	ldr	r7, [r6]
 	movs	r2, #0
-	ldr	r3, .L2686+52
-	mov	r7, r10
-	str	r2, [r3]
-.L2620:
-	.loc 6 795 0
-	ldrh	r8, [r10]
-	mov	r0, r8
-	bl	List_get_gc_head_node
-.LVL2852:
-	uxth	fp, r0
-	.loc 6 796 0
-	movw	r3, #65535
-	cmp	fp, r3
-	.loc 6 795 0
-	strh	fp, [r5]	@ movhi
-	.loc 6 796 0
-	bne	.L2621
-	.loc 6 797 0
-	movs	r3, #0
-	.loc 6 798 0
-	movs	r0, #8
-	.loc 6 797 0
-	strh	r3, [r10]	@ movhi
-	b	.L2596
-.LVL2853:
-.L2651:
-	.loc 6 534 0
-	movs	r4, #1
-	b	.L2599
-.LVL2854:
-.L2617:
-	.loc 6 786 0
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-.LVL2855:
-.L2684:
-	.loc 6 822 0
-	ldr	r3, .L2686+36
-	ldrh	r0, [r3]
-	b	.L2596
-.LVL2856:
-.L2621:
-	str	r0, [sp, #4]
-	.loc 6 800 0
-	mov	r0, fp
-	bl	IsBlkInGcList
-.LVL2857:
-	add	r3, r8, #1
-	ldr	r2, [sp, #4]
-	cbz	r0, .L2622
-	.loc 6 801 0
-	strh	r3, [r10]	@ movhi
-	b	.L2620
-.L2622:
-	.loc 6 814 0
-	ldr	r1, .L2686+24
-	.loc 6 804 0
-	uxth	r3, r3
-	.loc 6 814 0
-	ldr	lr, .L2686+96
-	uxth	r2, r2
-	ldr	r8, .L2686+64
-	ldrh	r1, [r1]
-	ldrh	lr, [lr]
-	ldr	r0, [r8]
-	.loc 6 804 0
-	strh	r3, [r10]	@ movhi
-	.loc 6 814 0
-	mul	r1, lr, r1
-	ldrh	ip, [r0, r2, lsl #1]
-	cmp	ip, r1, asr #1
-	bgt	.L2624
-	.loc 6 815 0
-	cmp	r3, #48
-	bls	.L2625
-	cmp	ip, #8
-	bls	.L2625
-	ldr	r3, .L2686+88
-	ldrh	r3, [r3]
-	cmp	r3, #35
-	bhi	.L2625
-.L2624:
-	.loc 6 816 0
-	movs	r3, #0
-	strh	r3, [r7]	@ movhi
-.L2625:
-	.loc 6 819 0
-	ldrh	r3, [r0, r2, lsl #1]
-	cmp	r1, r3
-	bgt	.L2626
-	.loc 6 820 0
-	movw	r3, #65535
-	strh	r3, [r5]	@ movhi
-	.loc 6 821 0
-	movs	r3, #0
-	strh	r3, [r7]	@ movhi
-	b	.L2684
-.L2626:
-	.loc 6 825 0
-	cbnz	r3, .L2627
-	.loc 6 826 0
-	movw	r0, #65535
-	bl	decrement_vpc_count
-.LVL2858:
-	.loc 6 827 0
-	ldrh	r3, [r7]
-	adds	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	b	.L2620
-.L2687:
+	lsr	ip, r4, #4
+	mov	r3, r2
+	subs	r4, r4, #1
+	mov	lr, #1
+.L2393:
+	uxth	r1, r2
+	cmp	r1, r4
+	bge	.L2392
+	lsrs	r6, r1, #5
+	and	r0, r1, #31
+	lsl	r0, lr, r0
+	adds	r2, r2, #1
+	ldr	r6, [r7, r6, lsl #2]
+	tst	r0, r6
+	ittt	ne
+	addne	r0, r3, #1
+	strhne	r1, [r5, r3, lsl #1]	@ movhi
+	uxthne	r3, r0
+	cmp	r3, ip
+	bcc	.L2393
+	b	.L2395
+.L2401:
 	.align	2
-.L2686:
-	.word	.LANCHOR76
-	.word	.LANCHOR168
-	.word	.LANCHOR85
-	.word	.LANCHOR113
-	.word	.LANCHOR112
-	.word	.LANCHOR88
-	.word	.LANCHOR52
-	.word	.LANCHOR173
-	.word	.LANCHOR93
-	.word	.LANCHOR235
-	.word	.LANCHOR72
-	.word	.LANCHOR100
-	.word	.LANCHOR227
-	.word	.LANCHOR169
-	.word	.LANCHOR114
-	.word	.LANCHOR201
-	.word	.LANCHOR83
-	.word	.LANCHOR8
-	.word	.LANCHOR236
-	.word	.LANCHOR237
-	.word	.LANCHOR91
-	.word	.LANCHOR92
-	.word	.LANCHOR109
-	.word	.LANCHOR175
-	.word	.LANCHOR37
-.L2627:
-	.loc 6 830 0
-	movs	r3, #0
-	strb	r3, [r5, #8]
-	.loc 6 831 0
-	ldr	r3, .L2688
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2628
-	.loc 6 832 0
-	mov	r0, fp
-	bl	ftl_get_blk_mode
-.LVL2859:
-	strb	r0, [r5, #8]
-.L2628:
-	.loc 6 835 0
-	ldr	r3, .L2688+4
-	ldrh	r3, [r3]
-	cmp	r3, fp
-	bne	.L2629
-	ldr	r1, .L2688+8
-	movw	r2, #835
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2860:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2861:
-.L2629:
-	.loc 6 836 0
-	ldr	r3, .L2688+24
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L2630
-	ldr	r1, .L2688+8
-	mov	r2, #836
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2862:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2863:
-.L2630:
-	.loc 6 837 0
-	ldr	r3, .L2688+28
-	ldrh	r2, [r5]
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bne	.L2631
-	ldr	r1, .L2688+8
-	movw	r2, #837
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2864:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2865:
-.L2631:
-	.loc 6 838 0
-	mov	r0, r6
-	bl	make_superblock
-.LVL2866:
-	.loc 6 839 0
-	ldr	r2, .L2688+32
-	movs	r3, #0
-	.loc 6 840 0
-	ldrh	r1, [r5]
-	.loc 6 839 0
-	strh	r3, [r2]	@ movhi
-	.loc 6 840 0
-	ldr	r2, [r8]
-	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2688+36
-	.loc 6 841 0
-	strh	r3, [r5, #2]	@ movhi
-	.loc 6 842 0
-	strb	r3, [r5, #6]
-	.loc 6 840 0
-	strh	r1, [r2]	@ movhi
-.L2619:
-	.loc 6 852 0
-	ldr	r3, .L2688+40
-	movs	r2, #1
-	str	r2, [r3]
-	.loc 6 853 0
-	ldr	r3, .L2688+44
+.L2400:
+	.word	.LANCHOR18
+	.word	.LANCHOR153
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2422
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, [r3]
+	cmp	r7, #0
+	bne	.L2403
+	ldr	r8, .L2422+40
+	ldr	r4, .L2422+4
+	bl	FtlBbtMemInit
+	sub	r10, r8, #18
+	bl	FtlLoadFactoryBbt
+.L2404:
+	ldr	r3, .L2422+8
 	ldrh	r3, [r3]
-	str	r3, [sp, #12]
-.LVL2867:
-	.loc 6 854 0
-	ldr	r3, .L2688
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2632
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
-	cmp	r3, r2
-	.loc 6 855 0
-	ittt	eq
-	ldreq	r3, .L2688+48
-	ldrheq	r3, [r3]
-	streq	r3, [sp, #12]
-.LVL2868:
-.L2632:
-	.loc 6 856 0
-	ldrh	r3, [r5, #2]
-	ldr	r1, [sp, #12]
-	.loc 6 864 0
-	ldr	fp, .L2688+80
-	.loc 6 856 0
-	adds	r2, r3, r4
+	cmp	r7, r3
+	bcc	.L2410
+	ldr	r5, .L2422+12
+	movs	r4, #0
+.L2411:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L2412
+	ldr	r4, .L2422+16
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2413:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L2417
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2414
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L2415
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L2414:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2413
+.L2410:
+	ldr	r3, .L2422+20
+	movw	r1, #65535
+	ldrh	r2, [r10, #2]!
+	ldr	r0, [r3]
+	ldr	r3, .L2422+24
 	cmp	r2, r1
-	.loc 6 857 0
-	itt	gt
-	movgt	r2, r1
-	subgt	r4, r2, r3
-.LVL2869:
-	.loc 6 869 0
-	mov	r3, #0
-	.loc 6 857 0
-	it	gt
-	uxthgt	r4, r4
-.LVL2870:
-	.loc 6 869 0
-	str	r3, [sp, #8]
-.LVL2871:
-.L2634:
-	.loc 6 859 0
-	ldrh	r3, [sp, #8]
-	cmp	r4, r3
-	bls	.L2642
-	.loc 6 861 0
-	ldr	r3, .L2688+52
-	.loc 6 863 0
-	movw	r8, #65535
-	.loc 6 864 0
-	ldrh	lr, [r6, #2]
-	mov	r10, #36
-	ldr	r0, [fp]
-	.loc 6 861 0
-	ldrh	r7, [r3]
-	.loc 6 864 0
-	ldr	r3, [sp, #8]
-	add	lr, lr, r3
-	ldr	r3, .L2688+56
-	str	r3, [sp, #16]
-	movs	r3, #0
+	str	r0, [r4, #8]
+	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	b	.L2643
-.LVL2872:
-.L2636:
-	.loc 6 862 0
-	ldr	r1, [sp, #16]
-	ldrh	r2, [r1, #2]!
-	.loc 6 863 0
-	cmp	r2, r8
-	.loc 6 862 0
-	str	r1, [sp, #16]
-.LVL2873:
-	.loc 6 863 0
-	beq	.L2635
-	.loc 6 864 0
-	ldr	r1, [sp, #4]
-	orr	r2, lr, r2, lsl #10
-.LVL2874:
-	mla	ip, r10, r1, r0
-	str	r2, [ip, #4]
-.LVL2875:
-	.loc 6 865 0
-	mov	r2, r1
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r2, [sp, #4]
-.LVL2876:
-.L2635:
-	adds	r3, r3, #1
-.LVL2877:
-.L2643:
-	.loc 6 861 0
-	uxth	r2, r3
-	cmp	r7, r2
-	bhi	.L2636
-	.loc 6 869 0
-	ldrb	r2, [r6, #8]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
+	ldr	r3, .L2422+28
+	str	fp, [r4, #12]
+	beq	.L2405
+	ldrh	r6, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r6, r7, r6, r2
+	lsls	r2, r6, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
 	bl	FlashReadPages
-.LVL2878:
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L2406:
+	uxth	r0, r6
+	adds	r7, r7, #1
+	add	r8, r8, #4
+	bl	FtlBbmMapBadBlock
+	b	.L2404
+.L2405:
+	mov	r1, r7
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	ldrh	r5, [r3]
+.L2408:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2407:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r7, r5
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2408
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r5, [r10]	@ movhi
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [fp]	@ movhi
 	movs	r3, #0
-.LVL2879:
-.L2683:
-	str	r3, [sp, #16]
-.LVL2880:
-	.loc 6 871 0
-	ldr	r2, [sp, #4]
-	ldrh	r3, [sp, #16]
-	cmp	r2, r3
-	bhi	.L2641
-.LVL2881:
-	ldr	r3, [sp, #8]
+	str	r3, [fp, #4]
+	ldrh	r6, [r2]
+	ldrh	r3, [r10]
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	strh	r3, [fp, #2]	@ movhi
+	mla	r6, r7, r6, r3
+	lsls	r3, r6, #10
+	str	r3, [r4, #4]
+	ldr	r3, .L2422+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	mov	r0, r4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	str	r3, [sp, #8]
-.LVL2882:
-	b	.L2634
-.LVL2883:
-.L2641:
-	ldr	r3, [sp, #16]
-	movs	r7, #36
-	muls	r7, r3, r7
-	.loc 6 872 0
-	ldr	r3, [fp]
-	adds	r2, r3, r7
-.LVL2884:
-	.loc 6 873 0
-	ldr	r3, [r3, r7]
-	adds	r3, r3, #1
-	beq	.L2638
-	.loc 6 872 0
-	ldr	r10, [r2, #12]
-	.loc 6 873 0
-	movw	r3, #61589
-	ldrh	r2, [r10]
-.LVL2885:
-	cmp	r2, r3
-	bne	.L2638
-	.loc 6 875 0
-	ldr	r8, [r10, #8]
-.LVL2886:
-	.loc 6 876 0
-	cmp	r8, #-1
-	bne	.L2639
-	ldr	r1, .L2688+8
-	mov	r2, #876
-	ldr	r0, .L2688+12
-	bl	printf
-.LVL2887:
-	ldr	r1, .L2688+16
-	ldr	r0, .L2688+20
-	bl	printf
-.LVL2888:
-.L2639:
-	.loc 6 877 0
-	movs	r2, #0
-	add	r1, sp, #36
-	mov	r0, r8
-	bl	log2phys
-.LVL2889:
-	.loc 6 878 0
-	ldr	r0, [fp]
-	ldr	r3, [sp, #36]
-	add	r0, r0, r7
-	ldr	r2, [r0, #4]
-	bic	r3, r3, #-2147483648
-	cmp	r3, r2
-	bne	.L2638
-	.loc 6 880 0
-	ldr	r2, .L2688+32
-	.loc 6 881 0
-	ldr	r8, .L2688+68
-.LVL2890:
-	ldr	r1, .L2688+60
-	.loc 6 880 0
-	ldrh	r3, [r2]
-	.loc 6 881 0
-	ldr	r0, [r0, #16]
-	str	r1, [sp, #28]
-	.loc 6 880 0
-	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
-	.loc 6 881 0
-	movs	r2, #36
-	ldr	r3, [r8]
-	str	r2, [sp, #24]
-	str	r3, [sp, #20]
-	ldr	r3, [r1]
-	ldr	r1, [sp, #20]
-	mla	r3, r2, r1, r3
-	str	r0, [r3, #16]
-	str	r3, [sp, #20]
-	.loc 6 882 0
-	bl	Ftl_get_new_temp_ppa
-.LVL2891:
-	ldr	r3, [sp, #20]
-	.loc 6 883 0
-	ldr	r1, [sp, #28]
-	ldr	r2, [sp, #24]
-	.loc 6 882 0
-	str	r0, [r3, #4]
-	.loc 6 883 0
-	ldr	r1, [r1]
-	ldr	r3, [r8]
-	mla	r1, r2, r3, r1
-	ldr	r3, [fp]
-	add	r3, r3, r7
-	ldr	r2, [r3, #8]
-	str	r2, [r1, #8]
-	.loc 6 884 0
-	ldr	r3, [r3, #12]
-	str	r3, [r1, #12]
-	.loc 6 892 0
+	bne	.L2406
+	uxth	r0, r6
+	bl	FtlBbmMapBadBlock
+	b	.L2407
+.L2412:
+	bl	FtlBbmMapBadBlock
+	b	.L2411
+.L2415:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L2416
+	strh	r5, [r4]	@ movhi
+	b	.L2414
+.L2416:
+	strh	r5, [r4, #4]	@ movhi
+.L2417:
+	ldr	r3, .L2422+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r2, #2
 	movs	r1, #1
-	.loc 6 885 0
-	ldr	r3, [sp, #36]
-	str	r3, [r10, #12]
-	.loc 6 886 0
-	ldr	r3, .L2688+28
-	ldrh	r2, [r3]
-	str	r3, [sp, #20]
-	strh	r2, [r10, #2]	@ movhi
-	.loc 6 889 0
-	ldr	r2, .L2688+64
-	.loc 6 892 0
-	ldr	r0, [fp]
-	.loc 6 889 0
-	ldr	r2, [r2]
-	.loc 6 892 0
-	add	r0, r0, r7
-	.loc 6 889 0
-	str	r2, [r10, #4]
-	.loc 6 891 0
-	ldr	r2, [r8]
-	adds	r2, r2, #1
-	str	r2, [r8]
-	.loc 6 892 0
-	bl	FtlGcBufAlloc
-.LVL2892:
-	.loc 6 893 0
-	ldr	r2, .L2688
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2640
-	ldr	r3, [sp, #20]
-	ldr	r2, [r8]
-	ldrb	r1, [r3, #7]	@ zero_extendqisi2
-	cmp	r1, r2
-	beq	.L2640
-	ldrh	r3, [r3, #4]
-	cbnz	r3, .L2638
-.L2640:
-	.loc 6 894 0
-	bl	Ftl_gc_temp_data_write_back
-.LVL2893:
-	cbz	r0, .L2638
-.LVL2894:
-.L2685:
-	.loc 6 909 0
-	ldr	r3, .L2688+40
-	movs	r2, #0
-	str	r2, [r3]
-	b	.L2684
-.LVL2895:
-.L2638:
-	ldr	r3, [sp, #16]
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
 	adds	r3, r3, #1
-	b	.L2683
-.LVL2896:
-.L2642:
-	.loc 6 903 0
-	ldrh	r3, [r6, #2]
-	add	r4, r4, r3
-.LVL2897:
-	.loc 6 905 0
-	ldr	r3, [sp, #12]
-	.loc 6 903 0
-	uxth	r4, r4
-	.loc 6 905 0
-	cmp	r3, r4
-	.loc 6 903 0
-	strh	r4, [r6, #2]	@ movhi
-	.loc 6 905 0
-	bhi	.L2644
-	.loc 6 907 0
-	ldr	r3, .L2688+68
-	ldr	r3, [r3]
-	cbz	r3, .L2645
-	.loc 6 908 0
-	bl	Ftl_gc_temp_data_write_back
-.LVL2898:
-	cmp	r0, #0
-	bne	.L2685
-.L2645:
-	.loc 6 913 0
-	ldr	r3, .L2688+32
-	ldrh	r1, [r3]
-	cbnz	r1, .L2646
-	ldr	r3, .L2688+72
-	ldrh	r2, [r6]
-	ldr	r3, [r3]
-	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L2646
-	.loc 6 915 0
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 6 916 0
-	ldrh	r0, [r6]
-	bl	update_vpc_list
-.LVL2899:
-	.loc 6 917 0
-	bl	FtlCacheWriteBack
-.LVL2900:
-	.loc 6 918 0
-	bl	l2p_flush
-.LVL2901:
-	.loc 6 919 0
-	bl	FtlVpcTblFlush
-.LVL2902:
-.L2646:
-	.loc 6 921 0
-	movw	r3, #65535
-	strh	r3, [r6]	@ movhi
-.L2644:
-	.loc 6 923 0
-	ldr	r3, .L2688+76
-	ldrh	r0, [r3]
-	cmp	r0, #2
-	bhi	.L2647
-	.loc 6 925 0
-	ldr	r3, .L2688+44
-	ldrh	r4, [r3]
-.LVL2903:
-	b	.L2618
-.LVL2904:
-.L2647:
-	.loc 6 928 0
-	ldr	r3, .L2688+40
-	movs	r2, #0
-	.loc 6 933 0
-	adds	r0, r0, #1
-.LVL2905:
-	.loc 6 928 0
-	str	r2, [r3]
-	b	.L2596
-.LVL2906:
-.L2648:
-.LBE531:
-.LBE532:
-	.loc 6 542 0
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+.L2403:
 	movs	r0, #0
-.LVL2907:
-	b	.L2596
-.L2689:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2423:
 	.align	2
-.L2688:
-	.word	.LANCHOR8
-	.word	.LANCHOR91
-	.word	.LANCHOR238
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR92
-	.word	.LANCHOR93
-	.word	.LANCHOR236
-	.word	.LANCHOR237
-	.word	.LANCHOR168
-	.word	.LANCHOR52
-	.word	.LANCHOR53
-	.word	.LANCHOR37
-	.word	.LANCHOR201+14
-	.word	.LANCHOR178
-	.word	.LANCHOR157
-	.word	.LANCHOR102
-	.word	.LANCHOR83
-	.word	.LANCHOR88
-	.word	.LANCHOR106
-.LVL2908:
-.L2650:
-	mov	r0, r3
-.LVL2909:
-	b	.L2596
-	.cfi_endproc
-.LFE407:
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.FtlInit,"ax",%progbits
+.L2422:
+	.word	.LANCHOR77
+	.word	.LANCHOR202
+	.word	.LANCHOR45
+	.word	.LANCHOR60
+	.word	.LANCHOR75
+	.word	.LANCHOR183
+	.word	.LANCHOR188
+	.word	.LANCHOR51
+	.word	.LANCHOR123
+	.word	.LANCHOR78
+	.word	.LANCHOR75+28
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	FtlInit
+	.global	log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlInit, %function
-FtlInit:
-.LFB302:
-	.loc 4 915 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2910:
-	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 4 916 0
-	mov	r3, #-1
-	ldr	r4, .L2699
-	.loc 4 915 0
-	mov	r5, r0
-	.loc 4 917 0
-	ldr	r2, .L2699+4
-	.loc 4 916 0
-	str	r3, [r4]
-	.loc 4 917 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2443
+	str	r1, [sp, #4]
+	ldrh	r5, [r3]
+	str	r2, [sp, #8]
+	adds	r3, r5, #7
+	movs	r5, #1
+	lsr	r8, r0, r3
+	lsls	r5, r5, r3
+	ldr	r3, .L2443+4
+	subs	r5, r5, #1
+	uxth	r7, r8
+	ands	r5, r5, r0
+	ldr	r3, [r3]
+	uxth	r5, r5
+	cmp	r0, r3
+	bcc	.L2425
+	ldr	r1, .L2443+8
+	mov	r2, #888
+	ldr	r0, .L2443+12
+	bl	printf
+	ldr	r1, .L2443+16
+	ldr	r0, .L2443+20
+	bl	printf
+.L2425:
+	ldr	r6, .L2443+24
+	movs	r4, #12
+	ldr	r3, .L2443+28
+	ldr	r1, [r6]
+	ldrh	r2, [r3]
 	movs	r3, #0
-	.loc 4 928 0
-	ldr	r1, .L2699+8
-	.loc 4 917 0
-	str	r3, [r2]
-	.loc 4 918 0
-	ldr	r2, .L2699+12
-	.loc 4 928 0
-	ldr	r0, .L2699+16
-.LVL2911:
-	.loc 4 918 0
-	str	r3, [r2]
-	.loc 4 928 0
+.L2426:
+	uxth	r10, r3
+	cmp	r10, r2
+	bcc	.L2431
+	bl	select_l2p_ram_region
+	muls	r4, r0, r4
+	ldr	r3, [r6]
+	mov	r10, r0
+	ldrh	r1, [r3, r4]
+	adds	r2, r3, r4
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L2432
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L2432
+	bl	flush_l2p_region
+.L2432:
+	ldr	r3, .L2443+32
+	ldrh	r2, [r3]
+	str	r3, [sp, #12]
+	cmp	r2, r7
+	bcs	.L2433
+	ldr	r1, .L2443+36
+	movw	r2, #526
+	ldr	r0, .L2443+12
 	bl	printf
-.LVL2912:
-	.loc 4 930 0
-	mov	r0, r5
-	bl	FtlConstantsInit
-.LVL2913:
-	.loc 4 931 0
-	bl	FtlMemInit
-.LVL2914:
-	.loc 4 932 0
-	bl	FtlVariablesInit
-.LVL2915:
-	.loc 4 933 0
-	ldr	r3, .L2699+20
-	ldrh	r0, [r3]
-	bl	FtlFreeSysBlkQueueInit
-.LVL2916:
-	.loc 4 948 0
-	bl	FtlLoadBbt
-.LVL2917:
-	cbz	r0, .L2691
-	.loc 4 949 0
-	ldr	r1, .L2699+24
-	ldr	r0, .L2699+28
-.L2698:
-	.loc 4 956 0
+	ldr	r1, .L2443+16
+	ldr	r0, .L2443+20
 	bl	printf
-.LVL2918:
-.L2692:
-	.loc 4 1000 0
+.L2433:
+	ldr	r3, .L2443+40
+	uxth	r8, r8
+	ldr	r3, [r3]
+	ldr	fp, [r3, r8, lsl #2]
+	cmp	fp, #0
+	bne	.L2434
+	ldr	r3, [r6]
+	movs	r1, #255
+	ldr	r2, .L2443+44
+	add	r3, r3, r4
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	ldr	r3, [r6]
+	adds	r2, r3, r4
+	strh	r7, [r3, r4]	@ movhi
+	str	fp, [r2, #4]
+	b	.L2427
+.L2431:
+	adds	r3, r3, #1
+	mla	r0, r4, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r7
+	bne	.L2426
+.L2427:
+	ldr	r2, [sp, #8]
+	movs	r3, #12
+	ldr	r1, .L2443+24
+	cbnz	r2, .L2428
+	ldr	r2, [r1]
+	mla	r3, r3, r10, r2
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r2]
+.L2429:
+	ldr	r2, [r1]
+	movs	r3, #12
+	mla	r10, r3, r10, r2
+	ldr	r3, [r10, #4]
+	adds	r2, r3, #1
+	beq	.L2440
+	adds	r3, r3, #1
+	str	r3, [r10, #4]
+.L2440:
 	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.LVL2919:
-.L2691:
-	.loc 4 954 0
-	bl	FtlSysBlkInit
-.LVL2920:
-	cbz	r0, .L2693
-	.loc 4 956 0
-	ldr	r1, .L2699+24
-	ldr	r0, .L2699+32
-	b	.L2698
-.L2693:
-	.loc 4 961 0
-	movs	r1, #1
-	str	r1, [r4]
-	.loc 4 965 0
-	bl	rk_ftl_garbage_collect
-.LVL2921:
-	.loc 4 967 0
-	ldr	r3, .L2699+36
-	ldrh	r3, [r3]
-	cmp	r3, #15
-	bhi	.L2692
-	mov	r4, #1024
-.L2695:
-.LVL2922:
-.LBB537:
-.LBB538:
-.LBB539:
-	.loc 4 987 0
-	movs	r1, #1
-	mov	r0, r1
-	bl	rk_ftl_garbage_collect
-.LVL2923:
-	.loc 4 986 0
-	subs	r4, r4, #1
-.LVL2924:
-	bne	.L2695
-	b	.L2692
-.L2700:
-	.align	2
-.L2699:
-	.word	.LANCHOR223
-	.word	.LANCHOR239
-	.word	.LC51
-	.word	.LANCHOR76
-	.word	.LC8
-	.word	.LANCHOR38
-	.word	.LANCHOR240
-	.word	.LC52
-	.word	.LC53
-	.word	.LANCHOR88
-.LBE539:
-.LBE538:
-.LBE537:
-	.cfi_endproc
-.LFE302:
-	.size	FtlInit, .-FtlInit
-	.section	.text.rk_ftl_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_init
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	rk_ftl_init, %function
-rk_ftl_init:
-.LFB492:
-	.loc 7 105 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2925:
-	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 7 108 0
-	bl	FlashInit
-.LVL2926:
-	.loc 7 109 0
-	mov	r4, r0
-	cbnz	r0, .L2702
-	.loc 7 110 0
-	ldr	r0, .L2703
-.LVL2927:
-	bl	FtlInit
-.LVL2928:
-.L2702:
-	.loc 7 111 0
-	mov	r1, r4
-	ldr	r0, .L2703+4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2428:
+	ldr	r2, [r6]
+	mla	r3, r3, r10, r2
+	ldr	r2, [sp, #4]
+	ldr	r0, [r2]
+	ldr	r2, [r3, #8]
+	str	r0, [r2, r5, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L2443+48
+	strh	r7, [r3]	@ movhi
+	b	.L2429
+.L2434:
+	ldr	r2, [r6]
+	ldr	r3, .L2443+52
+	add	r2, r2, r4
+	ldr	r2, [r2, #8]
+	mov	r0, r3
+	str	fp, [r3, #4]
+	str	r3, [sp]
+	str	r2, [r3, #8]
+	ldr	r2, .L2443+56
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3]
+	str	r2, [sp]
+	cmp	r3, #256
+	bne	.L2435
+	mov	r2, fp
+	mov	r1, r8
+	ldr	r0, .L2443+60
 	bl	printf
-.LVL2929:
-	.loc 7 113 0
-	mov	r0, r4
-	pop	{r4, pc}
-.LVL2930:
-.L2704:
+	ldr	r0, .L2443+64
+	lsr	r3, fp, #10
+	mov	r1, r8
+	strh	r3, [r0, #40]	@ movhi
+	ldr	r3, [r6]
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+.L2435:
+	ldr	r3, [sp]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r7
+	beq	.L2436
+	mov	r2, fp
+	mov	r1, r8
+	ldr	r0, .L2443+68
+	bl	printf
+	ldr	r1, .L2443+52
+	movs	r3, #4
+	mov	r2, r3
+	ldr	r0, .L2443+72
+	ldr	r1, [r1, #12]
+	bl	rknand_print_hex
+	ldr	r3, [sp, #12]
+	movs	r2, #4
+	ldr	r1, .L2443+40
+	ldr	r0, .L2443+76
+	ldrh	r3, [r3]
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r3, .L2443+80
+	movs	r2, #1
+	str	r2, [r3]
+.L2436:
+	ldr	r3, [sp]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r7
+	beq	.L2437
+	ldr	r1, .L2443+36
+	movw	r2, #553
+	ldr	r0, .L2443+12
+	bl	printf
+	ldr	r1, .L2443+16
+	ldr	r0, .L2443+20
+	bl	printf
+.L2437:
+	ldr	r3, .L2443+24
+	movs	r1, #0
+	ldr	r3, [r3]
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r7, [r3, r4]	@ movhi
+	b	.L2427
+.L2444:
 	.align	2
-.L2703:
-	.word	.LANCHOR15
-	.word	.LC54
-	.cfi_endproc
-.LFE492:
-	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+.L2443:
+	.word	.LANCHOR57
+	.word	.LANCHOR73
+	.word	.LANCHOR227
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR97
+	.word	.LANCHOR68
+	.word	.LANCHOR67
+	.word	.LANCHOR228
+	.word	.LANCHOR131
+	.word	.LANCHOR58
+	.word	.LANCHOR98
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LC55
+	.word	.LANCHOR127
+	.word	.LC56
+	.word	.LC27
+	.word	.LC57
+	.word	.LANCHOR77
+	.size	log2phys, .-log2phys
+	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
-	.global	ftl_fix_nand_power_lost_error
+	.global	FtlProgPages
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
-.LFB379:
-	.loc 1 2483 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 56
+	.type	FtlProgPages, %function
+FtlProgPages:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 1 2484 0
-	ldr	r3, .L2719
-	.loc 1 2483 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 1 2484 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r3
+	ldr	r3, .L2465
+	mov	r5, r0
+	mov	r10, r1
+	ldr	r7, [r3]
+	mov	r8, r3
+	cbnz	r7, .L2445
+	ldr	r3, .L2465+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	beq	.L2705
-.LVL2931:
-.LBB540:
-	.loc 1 2486 0
-	ldr	r7, .L2719+4
-	.loc 1 2488 0
-	ldr	r6, .L2719+8
-	.loc 1 2491 0
-	ldr	r10, .L2719+32
-	.loc 1 2486 0
-	ldrh	r5, [r7]
-.LVL2932:
-	.loc 1 2488 0
-	ldr	r3, [r6]
-	.loc 1 2492 0
-	ldr	r4, .L2719+12
-	.loc 1 2488 0
-	mov	r1, r5
-	ldr	r0, .L2719+16
-	ldrh	r2, [r3, r5, lsl #1]
-	lsl	r8, r5, #1
+	cbz	r3, .L2460
+	ldrb	r6, [r4, #8]	@ zero_extendqisi2
+	subs	r3, r6, #1
+	rsbs	r6, r3, #0
+	adcs	r6, r6, r3
+.L2447:
+	ldr	fp, .L2465+40
+	mov	r2, r6
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r1, r10
+	mov	r0, r5
+	bl	FlashProgPages
+.L2448:
+	cmp	r7, r10
+	bne	.L2458
+	ldr	r3, .L2465+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2445
+	ldr	r1, .L2465+12
+	mov	r2, #1600
+	ldr	r0, .L2465+16
 	bl	printf
-.LVL2933:
-	.loc 1 2491 0
-	ldrh	r0, [r10]
-	bl	FtlGcRefreshBlock
-.LVL2934:
-	.loc 1 2492 0
-	ldrh	r0, [r4]
-	bl	FtlGcRefreshBlock
-.LVL2935:
-	.loc 1 2493 0
-	mov	r0, r10
-	bl	allocate_new_data_superblock
-.LVL2936:
-	.loc 1 2494 0
+	ldr	r1, .L2465+20
+	ldr	r0, .L2465+24
+	bl	printf
+.L2445:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2460:
+	mov	r6, r7
+	b	.L2447
+.L2451:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4]
+	cmp	r3, r0
+	bne	.L2449
+	ldr	r1, [fp]
+	ldrh	r0, [r4, #4]
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	ldr	r3, .L2465+28
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L2449:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2450
 	mov	r0, r4
-	.loc 1 2496 0
-	movw	r4, #4097
-	.loc 1 2494 0
 	bl	allocate_new_data_superblock
-.LVL2937:
-	str	r7, [sp, #4]
-.LVL2938:
-.L2707:
-	.loc 1 2496 0
-	subs	r4, r4, #1
-.LVL2939:
-	beq	.L2711
-.LVL2940:
-	.loc 1 2497 0
+.L2450:
+	ldr	r2, .L2465+32
+	ldr	r3, [r2, #96]
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
+	mov	r2, r6
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
 	movs	r1, #1
-	mov	r0, r1
-	bl	rk_ftl_garbage_collect
-.LVL2941:
-	.loc 1 2498 0
-	ldr	r3, [r6]
-	ldrh	r3, [r3, r8]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	FlashProgPages
+	ldr	r3, [r8]
 	cmp	r3, #0
-	bne	.L2707
-.LVL2942:
-.L2711:
-	.loc 1 2501 0
-	ldr	r3, [r6]
-	mov	r1, r5
-	ldr	r0, .L2719+16
-	ldrh	r2, [r3, r5, lsl #1]
+	bne	.L2445
+.L2458:
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2451
+	ldr	r3, .L2465+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2452
+	ldr	r1, .L2465+12
+	movw	r2, #1583
+	ldr	r0, .L2465+16
 	bl	printf
-.LVL2943:
-	.loc 1 2502 0
-	ldr	r3, [r6]
-	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2709
-.LVL2944:
-.LBB541:
-	.loc 1 2509 0
-	add	r0, sp, #56
-	.loc 1 2516 0
-	ldr	r7, .L2719+20
-	.loc 1 2509 0
-	strh	r5, [r0, #-48]!	@ movhi
-	.loc 1 2515 0
-	movw	r10, #65535
-	.loc 1 2510 0
-	bl	make_superblock
-.LVL2945:
-	.loc 1 2513 0
-	ldr	r3, .L2719+24
-	add	r0, sp, #22
-	.loc 1 2516 0
-	ldr	r8, [r7]
-	.loc 1 2513 0
-	mov	r2, r4
-	.loc 1 2516 0
-	mov	fp, #36
-	.loc 1 2517 0
-	mov	ip, r4
-	.loc 1 2513 0
-	ldrh	lr, [r3]
-.LVL2946:
-.L2712:
-	.loc 1 2513 0 is_stmt 0 discriminator 1
-	uxth	r3, r2
-	cmp	lr, r3
-	bhi	.L2714
-	.loc 1 2522 0 is_stmt 1
-	ldr	r3, [r6]
-	mov	r1, r5
-	ldr	r0, .L2719+28
-	ldrh	r2, [r3, r5, lsl #1]
-.LVL2947:
+	ldr	r1, .L2465+20
+	ldr	r0, .L2465+24
 	bl	printf
-.LVL2948:
-	.loc 1 2523 0
-	mov	r2, r4
-	movs	r1, #0
-	ldr	r0, [r7]
-	bl	FlashEraseBlocks
-.LVL2949:
-	.loc 1 2524 0
-	mov	r2, r4
-	movs	r1, #1
-	ldr	r0, [r7]
-	bl	FlashEraseBlocks
-.LVL2950:
-.L2709:
-.LBE541:
-	.loc 1 2526 0
-	ldr	r2, [sp, #4]
-	movw	r3, #65535
-	strh	r3, [r2]	@ movhi
-.LVL2951:
-.L2705:
-.LBE540:
-	.loc 1 2528 0
-	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2952:
-.L2714:
-	.cfi_restore_state
-.LBB543:
-.LBB542:
-	.loc 1 2514 0
-	ldrh	r3, [r0, #2]!
-.LVL2953:
-	.loc 1 2515 0
-	cmp	r3, r10
-	beq	.L2713
-	.loc 1 2516 0
-	mla	r1, fp, r4, r8
-	.loc 1 2519 0
-	adds	r4, r4, #1
-.LVL2954:
-	.loc 1 2516 0
-	lsls	r3, r3, #10
-.LVL2955:
-	.loc 1 2519 0
-	uxth	r4, r4
-.LVL2956:
-	.loc 1 2516 0
-	str	r3, [r1, #4]
-.LVL2957:
-	.loc 1 2517 0
-	str	ip, [r1, #8]
-	.loc 1 2518 0
-	str	ip, [r1, #12]
-.L2713:
-.LVL2958:
+.L2452:
+	ldr	r3, [r5, #4]
+	cbnz	r6, .L2453
+.L2464:
+	movs	r2, #1
+	add	r1, sp, #12
+	ldr	r0, [r5, #16]
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3, #12]
+	ubfx	r0, r2, #10, #16
+	str	r2, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [sp, #4]
+	mov	r3, r0
 	adds	r2, r2, #1
-.LVL2959:
-	b	.L2712
-.L2720:
+	beq	.L2455
+	ldr	r2, [fp]
+	ldrh	r2, [r2, r0, lsl #1]
+	cbnz	r2, .L2456
+	mov	r1, r0
+	str	r0, [sp, #4]
+	ldr	r0, .L2465+36
+	bl	printf
+	ldr	r3, [sp, #4]
+.L2456:
+	mov	r0, r3
+	bl	decrement_vpc_count
+.L2455:
+	adds	r7, r7, #1
+	adds	r5, r5, #36
+	b	.L2448
+.L2453:
+	orr	r3, r3, #-2147483648
+	b	.L2464
+.L2466:
 	.align	2
-.L2719:
+.L2465:
+	.word	.LANCHOR77
 	.word	.LANCHOR8
+	.word	.LANCHOR38
 	.word	.LANCHOR229
-	.word	.LANCHOR83
-	.word	.LANCHOR92
-	.word	.LC55
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR53
+	.word	.LANCHOR138
+	.word	.LC58
+	.word	.LANCHOR84
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r3, .L2472
+	ldr	r4, [r3]
+	cbnz	r4, .L2468
+	ldr	r5, .L2472+4
+	ldr	r0, [r5]
+	cbz	r0, .L2468
+	ldr	r3, .L2472+8
+	mov	r2, r4
+	movs	r1, #1
+	ldr	r3, [r3]
+	bl	FtlProgPages
+	str	r4, [r5]
+.L2468:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2473:
+	.align	2
+.L2472:
 	.word	.LANCHOR77
-	.word	.LANCHOR37
-	.word	.LC56
-	.word	.LANCHOR91
-.LBE542:
-.LBE543:
-	.cfi_endproc
-.LFE379:
-	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
-	.section	.text.ftl_read,"ax",%progbits
+	.word	.LANCHOR132
+	.word	.LANCHOR230
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
-	.global	ftl_read
+	.global	FtlSysFlush
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_read, %function
-ftl_read:
-.LFB305:
-	.loc 4 1430 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2960:
-	.loc 4 1440 0
-	cmp	r0, #16
-	.loc 4 1430 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 4 1430 0
+	push	{r3, lr}
+	ldr	r3, .L2476
+	ldr	r3, [r3]
+	cbnz	r3, .L2475
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2475:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2477:
+	.align	2
+.L2476:
+	.word	.LANCHOR77
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
+	.align	1
+	.global	FtlDeInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2480
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L2479
+	bl	FtlSysFlush
+.L2479:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2481:
+	.align	2
+.L2480:
+	.word	.LANCHOR231
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FlashDeInit
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2498
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r2
+	adds	r2, r1, r2
 	mov	r6, r1
-	mov	r7, r3
-	str	r2, [sp, #28]
-	.loc 4 1440 0
-	bne	.L2722
-	.loc 4 1441 0
-	mov	r2, r3
-.LVL2961:
-	ldr	r1, [sp, #28]
-.LVL2962:
-	add	r0, r6, #256
-.LVL2963:
-	bl	FtlVendorPartRead
-.LVL2964:
-	str	r0, [sp, #8]
-.LVL2965:
-.L2721:
-	.loc 4 1529 0
-	ldr	r0, [sp, #8]
-	add	sp, sp, #64
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL2966:
-.L2722:
-	.cfi_restore_state
-	.loc 4 1446 0
-	ldr	r3, [sp, #28]
-.LVL2967:
-	adds	r3, r1, r3
-	str	r3, [sp, #12]
-	ldr	r3, .L2759
-	ldr	r2, [sp, #12]
-.LVL2968:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2744
-	.loc 4 1446 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2759+4
+	bhi	.L2491
+	cmp	r5, #31
+	bhi	.L2485
+.L2486:
+	movs	r0, #0
+.L2483:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2485:
+	ldr	r3, .L2498+4
 	ldr	r3, [r3]
-	adds	r0, r3, #1
-.LVL2969:
-	beq	.L2745
-	.loc 4 1449 0 is_stmt 1
+	cmp	r3, #0
+	bne	.L2486
+	ldr	r8, .L2498+16
 	bl	FtlCacheWriteBack
-.LVL2970:
-	.loc 4 1451 0
-	ldr	r3, .L2759+8
 	mov	r0, r6
-	ldrh	r4, [r3]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-.LVL2971:
-	.loc 4 1452 0
-	ldr	r3, [sp, #12]
+	ldrh	r4, [r8]
 	mov	r1, r4
-	.loc 4 1451 0
-	str	r0, [sp, #16]
-.LVL2972:
-	.loc 4 1452 0
-	subs	r0, r3, #1
-.LVL2973:
 	bl	__aeabi_uidiv
-.LVL2974:
-	.loc 4 1453 0
-	ldr	r3, [sp, #16]
-	.loc 4 1457 0
-	ldr	r2, .L2759+12
-	.loc 4 1451 0
-	ldr	r4, [sp, #16]
-	.loc 4 1453 0
-	rsb	r3, r3, #1
-	.loc 4 1452 0
-	str	r0, [sp, #20]
-.LVL2975:
-	.loc 4 1453 0
-	add	r3, r3, r0
+	smulbb	r3, r0, r4
+	mov	r7, r0
+	subs	r6, r6, r3
+	uxth	r6, r6
+	cbz	r6, .L2487
+	subs	r4, r4, r6
+	adds	r7, r7, #1
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
+	uxth	r4, r4
+	subs	r5, r5, r4
+.L2487:
+	ldr	r4, .L2498+8
+	mov	r3, #-1
+	ldr	r6, .L2498+12
 	str	r3, [sp, #4]
-.LVL2976:
-	.loc 4 1457 0
-	ldr	r1, [sp, #4]
-	ldr	r3, [r2]
-.LVL2977:
-	add	r3, r3, r1
-	str	r3, [r2]
-	.loc 4 1444 0
-	movs	r3, #0
-	.loc 4 1456 0
-	mov	r5, r3
-	.loc 4 1444 0
-	str	r3, [sp]
-	str	r3, [sp, #24]
-	.loc 4 1431 0
-	str	r3, [sp, #8]
-.LVL2978:
-.L2724:
-	.loc 4 1458 0
-	ldr	r3, [sp, #4]
-	cbnz	r3, .L2743
-	.loc 4 1526 0
-	ldr	r3, .L2759+16
-	ldrh	r3, [r3]
-	cmp	r3, #0
-	beq	.L2721
-	.loc 4 1527 0
-	movs	r1, #1
-	ldr	r0, [sp, #4]
-	bl	rk_ftl_garbage_collect
-.LVL2979:
-	b	.L2721
-.LVL2980:
-.L2743:
-	.loc 4 1459 0
-	add	r1, sp, #60
+.L2488:
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L2490
+	ldr	r3, .L2498+8
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L2486
+	movs	r4, #0
+	str	r4, [r3]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2486
+.L2490:
 	movs	r2, #0
-	mov	r0, r4
+	mov	r1, sp
+	mov	r0, r7
 	bl	log2phys
-.LVL2981:
-	.loc 4 1460 0
-	ldr	r3, [sp, #60]
-	adds	r1, r3, #1
-	bne	.L2725
-	.loc 4 1461 0 discriminator 1
-	ldr	r10, .L2759+8
-	mov	r8, #0
-.L2726:
-.LVL2982:
-	ldrh	r0, [r10]
-	cmp	r8, r0
-	bcc	.L2728
-.LVL2983:
-.L2729:
-	.loc 4 1490 0
-	ldr	r3, [sp, #4]
-	.loc 4 1488 0
-	adds	r4, r4, #1
-.LVL2984:
-	.loc 4 1490 0
-	subs	r3, r3, #1
-.LVL2985:
-	str	r3, [sp, #4]
-	beq	.L2733
-	.loc 4 1490 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2759+20
-.LVL2986:
-	ldrh	r3, [r3]
-	cmp	r5, r3, lsl #2
-	bne	.L2724
-.L2733:
-	.loc 4 1491 0 is_stmt 1
-	cmp	r5, #0
-	beq	.L2724
-	.loc 4 1492 0
-	ldr	r3, .L2759+24
-	movs	r2, #0
-	mov	r1, r5
-	.loc 4 1498 0
-	ldr	r10, .L2759+48
-	.loc 4 1493 0
-	mov	r8, #0
-	.loc 4 1492 0
-	ldr	r0, [r3]
-	bl	FlashReadPages
-.LVL2987:
-	.loc 4 1499 0
 	ldr	r3, [sp]
-	lsls	r3, r3, #9
-	str	r3, [sp, #44]
-	.loc 4 1496 0
-	ldr	r3, [sp, #32]
-	lsls	r3, r3, #9
-	str	r3, [sp, #36]
-	ldr	r3, [sp, #24]
-	lsls	r3, r3, #9
-	str	r3, [sp, #40]
-.LVL2988:
-.L2742:
-	.loc 4 1494 0
-	ldr	r3, .L2759+24
-	mov	fp, #36
-	mul	fp, fp, r8
-	ldr	r1, [sp, #16]
-	ldr	r3, [r3]
-	add	r3, r3, fp
-	ldr	r2, [r3, #16]
-	cmp	r1, r2
-	bne	.L2735
-	.loc 4 1495 0
-	ldr	r1, [r3, #8]
-	ldr	r3, .L2759+28
-	ldr	r3, [r3]
-	cmp	r1, r3
-	bne	.L2736
-	.loc 4 1496 0
-	ldr	r3, [sp, #36]
+	adds	r3, r3, #1
+	beq	.L2489
+	ldr	r3, [r4]
+	movs	r2, #1
+	add	r1, sp, #4
 	mov	r0, r7
-	ldr	r2, [sp, #40]
-	add	r1, r1, r3
-.L2758:
-	.loc 4 1499 0
-	bl	ftl_memcpy
-.LVL2989:
-.L2736:
-	.loc 4 1501 0
-	ldr	r3, .L2759+24
-	ldr	r3, [r3]
-	ldr	r1, [r3, fp]
-	add	ip, r3, fp
-	adds	r2, r1, #1
-	bne	.L2737
-	.loc 4 1502 0
-	ldr	r0, .L2759+32
-	.loc 4 1503 0
-	str	r1, [sp, #8]
-	.loc 4 1502 0
-	ldr	r2, [r0, #72]
-	adds	r2, r2, #1
-	str	r2, [r0, #72]
-.LVL2990:
-.L2737:
-	.loc 4 1505 0
-	ldr	r3, [r3, fp]
-	cmp	r3, #256
-	bne	.L2738
-.LBB544:
-	.loc 4 1507 0
-	ldr	r0, [ip, #4]
+	adds	r3, r3, #1
+	str	r3, [r4]
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	str	r3, [r6]
+	bl	log2phys
+	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL2991:
-	mov	fp, r0
-.LVL2992:
-	.loc 4 1508 0
-	bl	FtlGcRefreshBlock
-.LVL2993:
-	.loc 4 1517 0
-	ldr	r2, .L2759+36
-	.loc 4 1508 0
-	movw	r3, #2049
-.LVL2994:
-.L2740:
-	.loc 4 1514 0
-	subs	r3, r3, #1
-.LVL2995:
-	bne	.L2739
-.LVL2996:
-.L2741:
-	.loc 4 1518 0
-	bl	FtlSysFlush
-.LVL2997:
-.L2738:
-.LBE544:
-	.loc 4 1493 0 discriminator 2
-	add	r8, r8, #1
-.LVL2998:
-	cmp	r5, r8
-	bne	.L2742
-	.loc 4 1522 0
+	bl	decrement_vpc_count
+.L2489:
+	ldrh	r3, [r8]
+	adds	r7, r7, #1
+	subs	r5, r5, r3
+	b	.L2488
+.L2491:
+	mov	r0, #-1
+	b	.L2483
+.L2499:
+	.align	2
+.L2498:
+	.word	.LANCHOR69
+	.word	.LANCHOR77
+	.word	.LANCHOR232
+	.word	.LANCHOR163
+	.word	.LANCHOR56
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.Ftlscanalldata,"ax",%progbits
+	.align	1
+	.global	Ftlscanalldata
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftlscanalldata, %function
+Ftlscanalldata:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #0
-.LVL2999:
-	b	.L2724
-.LVL3000:
-.L2728:
-	.loc 4 1462 0
-	mla	r0, r0, r4, r8
-.LVL3001:
-	.loc 4 1463 0
-	cmp	r6, r0
-	bhi	.L2727
-	.loc 4 1463 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #12]
-	cmp	r3, r0
-	bls	.L2727
-	.loc 4 1464 0 is_stmt 1
-	subs	r0, r0, r6
-.LVL3002:
-	mov	r2, #512
+	ldr	r7, .L2514
+	sub	sp, sp, #32
 	movs	r1, #0
-	add	r0, r7, r0, lsl #9
-	bl	ftl_memset
-.LVL3003:
-.L2727:
-	.loc 4 1461 0 discriminator 2
-	add	r8, r8, #1
-.LVL3004:
-	b	.L2726
-.LVL3005:
-.L2725:
-	.loc 4 1467 0
-	ldr	r2, .L2759+24
-	mov	r8, #36
-	ldr	r2, [r2]
-	mla	r8, r8, r5, r2
-	str	r3, [r8, #4]
-	.loc 4 1468 0
-	ldr	r3, [sp, #16]
-	cmp	r4, r3
-	ldr	r3, .L2759+8
-	bne	.L2730
-	.loc 4 1469 0
-	ldr	r2, .L2759+28
-	.loc 4 1470 0
-	mov	r0, r6
-	ldrh	r10, [r3]
-	.loc 4 1469 0
-	ldr	r2, [r2]
-	.loc 4 1470 0
-	mov	r1, r10
-	.loc 4 1469 0
-	str	r2, [r8, #8]
-	.loc 4 1470 0
-	bl	__aeabi_uidivmod
-.LVL3006:
+	ldr	r8, .L2514+24
+	ldr	r0, .L2514+4
+	bl	printf
+.L2501:
+	ldr	r3, [r7]
+	cmp	r5, r3
+	bcc	.L2507
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2507:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L2502
 	ldr	r2, [sp, #28]
-	.loc 4 1471 0
-	sub	r3, r10, r1
-	.loc 4 1470 0
-	str	r1, [sp, #32]
-.LVL3007:
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-.LVL3008:
-	.loc 4 1473 0
-	cmp	r3, r10
-	str	r3, [sp, #24]
-.LVL3009:
-	bne	.L2731
-	.loc 4 1474 0
-	str	r7, [r8, #8]
-.LVL3010:
-.L2731:
-	.loc 4 1483 0
-	ldr	r3, .L2759+40
-	ldr	r2, .L2759+44
-	.loc 4 1484 0
-	str	r4, [r8, #16]
-	.loc 4 1483 0
-	ldrh	r3, [r3]
+	mov	r1, r5
+	mov	r0, r8
+	bl	printf
+.L2502:
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L2504
+	ldr	r4, .L2514+8
+	movs	r2, #0
+	movs	r1, #1
+	str	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r3, .L2514+12
+	str	r5, [r4, #16]
+	str	r2, [r4]
+	ldr	r3, [r3]
+	str	r3, [r4, #8]
+	ldr	r3, .L2514+16
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L2505
+	adds	r3, r3, #1
+	beq	.L2505
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L2504
+.L2505:
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2514+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
 	ldr	r2, [r2]
-	muls	r3, r5, r3
-	.loc 4 1485 0
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
+	bl	printf
+.L2504:
 	adds	r5, r5, #1
-.LVL3011:
-	.loc 4 1483 0
-	bic	r3, r3, #3
-	add	r3, r3, r2
-	str	r3, [r8, #12]
-	b	.L2729
-.L2730:
-	.loc 4 1475 0
-	ldr	r2, [sp, #20]
-	cmp	r4, r2
-	bne	.L2732
-	.loc 4 1476 0
-	ldr	r2, .L2759+48
-	.loc 4 1477 0
-	ldr	r1, [sp, #12]
-	.loc 4 1476 0
-	ldr	r2, [r2]
-	str	r2, [r8, #8]
-	.loc 4 1477 0
-	ldrh	r2, [r3]
-	mul	r3, r2, r4
-	subs	r1, r1, r3
-	.loc 4 1478 0
-	cmp	r2, r1
-	.loc 4 1477 0
-	str	r1, [sp]
-.LVL3012:
-	.loc 4 1478 0
-	bne	.L2731
-.LVL3013:
-.L2757:
-	.loc 4 1481 0
-	subs	r3, r3, r6
-	add	r3, r7, r3, lsl #9
-	str	r3, [r8, #8]
-	b	.L2731
-.L2732:
-	ldrh	r3, [r3]
-	muls	r3, r4, r3
-	b	.L2757
-.LVL3014:
-.L2735:
-	.loc 4 1497 0
-	ldr	r1, [sp, #20]
-	cmp	r1, r2
-	bne	.L2736
-	.loc 4 1498 0
-	ldr	r1, [r3, #8]
-	ldr	r3, [r10]
-	cmp	r1, r3
-	bne	.L2736
-	.loc 4 1499 0
-	ldr	r3, .L2759+8
-	ldr	r2, [sp, #44]
-	ldrh	r0, [r3]
-	ldr	r3, [sp, #20]
-	muls	r0, r3, r0
-	subs	r0, r0, r6
-	add	r0, r7, r0, lsl #9
-	b	.L2758
-.LVL3015:
-.L2739:
-.LBB545:
-	.loc 4 1516 0
-	movs	r1, #1
-	str	r2, [sp, #52]
-	mov	r0, r1
-	str	r3, [sp, #48]
-.LVL3016:
-	bl	rk_ftl_garbage_collect
-.LVL3017:
-	.loc 4 1517 0
-	ldr	r2, [sp, #52]
-	ldr	r3, [sp, #48]
-	ldrh	r1, [r2]
-	cmp	r1, fp
-	beq	.L2740
-	b	.L2741
-.LVL3018:
-.L2744:
-.LBE545:
-	.loc 4 1447 0
-	mov	r3, #-1
-.LVL3019:
-.L2745:
-	str	r3, [sp, #8]
-	b	.L2721
-.L2760:
+	b	.L2501
+.L2515:
 	.align	2
-.L2759:
-	.word	.LANCHOR68
-	.word	.LANCHOR223
-	.word	.LANCHOR55
-	.word	.LANCHOR163
-	.word	.LANCHOR114
-	.word	.LANCHOR37
-	.word	.LANCHOR177
+.L2514:
+	.word	.LANCHOR73
+	.word	.LC59
+	.word	.LANCHOR202
 	.word	.LANCHOR183
-	.word	.LANCHOR135
-	.word	.LANCHOR201
-	.word	.LANCHOR58
-	.word	.LANCHOR186
-	.word	.LANCHOR184
-	.cfi_endproc
-.LFE305:
-	.size	ftl_read, .-ftl_read
-	.section	.text.ftl_write,"ax",%progbits
+	.word	.LANCHOR188
+	.word	.LC61
+	.word	.LC60
+	.size	Ftlscanalldata, .-Ftlscanalldata
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	ftl_write
+	.global	FtlReUsePrevPpa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_write, %function
-ftl_write:
-.LFB308:
-	.loc 4 1594 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 80
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL3020:
-	.loc 4 1602 0
-	cmp	r0, #16
-	.loc 4 1594 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	sub	sp, sp, #80
-	.cfi_def_cfa_offset 112
-	.loc 4 1594 0
-	mov	r7, r1
-	str	r2, [sp, #12]
-	str	r3, [sp, #4]
-	.loc 4 1602 0
-	bne	.L2762
-	.loc 4 1603 0
-	mov	r2, r3
-.LVL3021:
-	ldr	r1, [sp, #12]
-.LVL3022:
-	add	r0, r7, #256
-.LVL3023:
-	bl	FtlVendorPartWrite
-.LVL3024:
-.L2761:
-	.loc 4 1775 0
-	add	sp, sp, #80
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL3025:
-.L2762:
-	.cfi_restore_state
-	.loc 4 1606 0
-	ldr	r3, [sp, #12]
-.LVL3026:
-	adds	r5, r1, r3
-	ldr	r3, .L2816
-	ldr	r3, [r3]
-	cmp	r5, r3
-	bhi	.L2796
-	.loc 4 1606 0 is_stmt 0 discriminator 1
-	ldr	r3, .L2816+4
-	ldr	r0, [r3]
-.LVL3027:
-	adds	r4, r0, #1
-	beq	.L2761
-	.loc 4 1609 0 is_stmt 1
-	ldr	r3, .L2816+8
-	mov	r2, #2048
-.LVL3028:
-	.loc 4 1610 0
-	mov	r0, r7
-	.loc 4 1609 0
-	str	r2, [r3]
-	.loc 4 1610 0
-	ldr	r3, .L2816+12
-	ldrh	r4, [r3]
-	mov	r1, r4
-.LVL3029:
-	bl	__aeabi_uidiv
-.LVL3030:
-	.loc 4 1611 0
-	mov	r1, r4
-	.loc 4 1610 0
-	mov	r10, r0
-.LVL3031:
-	.loc 4 1611 0
-	subs	r0, r5, #1
-.LVL3032:
-	bl	__aeabi_uidiv
-.LVL3033:
-	.loc 4 1614 0
-	ldr	r2, .L2816+16
-	.loc 4 1612 0
-	sub	r5, r0, r10
-	adds	r3, r5, #1
-	.loc 4 1614 0
-	adds	r1, r5, #1
-	.loc 4 1612 0
-	str	r3, [sp, #8]
-	.loc 4 1614 0
-	ldr	r3, [r2]
-	.loc 4 1611 0
-	str	r0, [sp, #20]
-.LVL3034:
-	.loc 4 1614 0
-	add	r3, r3, r1
-	str	r3, [r2]
-	.loc 4 1615 0
-	ldr	r3, .L2816+20
-	ldr	r8, [r3]
-	cmp	r8, #0
-	beq	.L2764
-	.loc 4 1616 0
-	ldr	r3, [r8, #16]
-	cmp	r10, r3
-	beq	.L2765
-	.loc 4 1617 0
-	bl	FtlCacheWriteBack
-.LVL3035:
-.L2764:
-	.loc 4 1644 0
-	ldr	r5, .L2816+24
-	.loc 4 1643 0
-	mov	r4, r10
-.LVL3036:
-.L2766:
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L2795
-	.loc 4 1644 0
-	ldr	r6, .L2816+28
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r6]
-	cmp	r2, r3
-	bcc	.L2767
-	.loc 4 1644 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2816+32
-	movw	r2, #1644
-	ldr	r0, .L2816+36
-	bl	printf
-.LVL3037:
-	ldr	r1, .L2816+40
-	ldr	r0, .L2816+44
-	bl	printf
-.LVL3038:
-.L2767:
-	.loc 4 1645 0 is_stmt 1
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L2768
-	.loc 4 1646 0
-	bl	FtlCacheWriteBack
-.LVL3039:
-	.loc 4 1668 0
-	mov	r0, r5
-	bl	allocate_new_data_superblock
-.LVL3040:
-.L2768:
-	.loc 4 1673 0
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	.loc 4 1675 0
-	ldrh	r2, [r5, #4]
-	.loc 4 1673 0
-	lsls	r3, r3, #2
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-	ldr	r2, [sp, #8]
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-	.loc 4 1677 0
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	str	r3, [sp, #36]
-.LVL3041:
-	ldrh	r3, [r6]
-.LVL3042:
-	cmp	r2, r3
-	bcc	.L2769
-	.loc 4 1677 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2816+32
-	movw	r2, #1677
-	ldr	r0, .L2816+36
-	bl	printf
-.LVL3043:
-	ldr	r1, .L2816+40
-	ldr	r0, .L2816+44
-	bl	printf
-.LVL3044:
-.L2769:
-	.loc 4 1700 0 is_stmt 1 discriminator 1
-	mov	r8, #0
-.LVL3045:
-.L2770:
-	.loc 4 1678 0 discriminator 1
-	ldr	r3, [sp, #36]
-	cmp	r8, r3
-	bne	.L2791
-.L2771:
-.LVL3046:
-	.loc 4 1759 0
-	ldr	r3, .L2816+20
-	ldr	r3, [r3]
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L2526
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2792
-.LVL3047:
-	.loc 4 1761 0
-	ldr	r3, [sp, #8]
-	.loc 4 1762 0
-	subs	r8, r8, #1
-.LVL3048:
-	.loc 4 1761 0
-	add	r3, r3, #-1
-	str	r3, [sp, #8]
-.LVL3049:
-	.loc 4 1762 0
-	bne	.L2792
-.LVL3050:
-.L2795:
-	.loc 4 1769 0
-	ldr	r3, [sp, #20]
-.LVL3051:
-	movs	r0, #0
-	sub	r1, r3, r10
-	bl	rk_ftl_garbage_collect
-.LVL3052:
-	.loc 4 1774 0
-	movs	r0, #0
-	b	.L2761
-.LVL3053:
-.L2765:
-	.loc 4 1619 0
-	ldr	r2, .L2816+48
-	.loc 4 1620 0
+	bne	.L2517
+	ldr	r2, .L2526+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L2518
+	ldr	r2, .L2526+8
+	movw	lr, #65535
+	ldr	ip, .L2526+32
+	ldr	r0, .L2526+12
+	ldr	r2, [r2]
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
+.L2519:
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L2518
+	cmp	r4, r7
+	bne	.L2520
 	mov	r1, r4
-.LVL3054:
-	mov	r0, r7
-.LVL3055:
-	.loc 4 1619 0
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	.loc 4 1620 0
-	bl	__aeabi_uidivmod
-.LVL3056:
-	ldr	r2, [sp, #12]
-	.loc 4 1621 0
-	subs	r4, r4, r1
-	.loc 4 1624 0
-	ldr	r0, [r8, #8]
-	.loc 4 1620 0
-	mov	r3, r1
-.LVL3057:
-	.loc 4 1624 0
-	ldr	r1, [sp, #4]
-.LVL3058:
-	cmp	r4, r2
-	it	cs
-	movcs	r4, r2
-.LVL3059:
-	lsls	r6, r4, #9
-	add	r0, r0, r3, lsl #9
-	mov	r2, r6
-	bl	ftl_memcpy
-.LVL3060:
-	.loc 4 1626 0
-	cmp	r5, #0
-	beq	.L2798
-	.loc 4 1628 0
-	ldr	r3, [sp, #12]
-	.loc 4 1629 0
-	add	r7, r7, r4
-.LVL3061:
-	.loc 4 1631 0
-	add	r10, r10, #1
-.LVL3062:
-	.loc 4 1628 0
-	subs	r3, r3, r4
-	str	r3, [sp, #12]
-.LVL3063:
-	.loc 4 1630 0
-	ldr	r3, [sp, #4]
-.LVL3064:
-	add	r3, r3, r6
-	str	r3, [sp, #4]
-.LVL3065:
-	.loc 4 1632 0
-	bl	FtlCacheWriteBack
-.LVL3066:
-	str	r5, [sp, #8]
-	b	.L2764
-.LVL3067:
-.L2791:
-	.loc 4 1679 0
-	ldrh	r3, [r5, #4]
-	cmp	r3, #0
-	beq	.L2771
-	.loc 4 1683 0
-	movs	r2, #0
-	add	r1, sp, #40
-	mov	r0, r4
-	movs	r6, #36
-	bl	log2phys
-.LVL3068:
-	.loc 4 1684 0
-	mov	r0, r5
-	mul	r6, r6, r8
-	bl	get_new_active_ppa
-.LVL3069:
-	.loc 4 1686 0
-	ldr	r3, .L2816+52
-	.loc 4 1687 0
-	ldr	r2, .L2816+56
-	.loc 4 1686 0
-	ldr	r1, [r3]
-	.loc 4 1687 0
-	ldrh	r2, [r2]
-	.loc 4 1686 0
-	str	r3, [sp, #16]
-	add	r1, r1, r6
-	str	r0, [r1, #4]
-	.loc 4 1687 0
-	mul	r0, r2, r8
-.LVL3070:
-	.loc 4 1688 0
-	str	r4, [r1, #16]
-	.loc 4 1687 0
-	bic	r3, r0, #3
-	ldr	r0, .L2816+60
-	str	r3, [sp, #28]
-	ldr	r3, [r0]
-	ldr	r0, [sp, #28]
-	str	r3, [sp, #32]
-	add	fp, r3, r0
-.LVL3071:
-	str	fp, [r1, #12]
-	.loc 4 1691 0
-	mov	r0, fp
-	movs	r1, #0
-.LVL3072:
-	bl	ftl_memset
-.LVL3073:
-	.loc 4 1693 0
-	cmp	r4, r10
-	ldr	r1, .L2816+12
-	beq	.L2772
-	.loc 4 1693 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #20]
-	cmp	r4, r3
-	ldr	r3, [sp, #16]
-	bne	.L2811
-.LVL3074:
-	.loc 4 1701 0 is_stmt 1
-	ldr	r3, [sp, #12]
-	adds	r2, r7, r3
-	ldrh	r3, [r1]
-	smulbb	r3, r3, r4
-	subs	r2, r2, r3
-	uxth	r3, r2
-	str	r3, [sp, #16]
-.LVL3075:
-	.loc 4 1700 0
-	movs	r3, #0
-.LVL3076:
-	str	r3, [sp, #24]
-	b	.L2775
-.LVL3077:
-.L2772:
-	.loc 4 1695 0
-	ldrh	r2, [r1]
-	mov	r0, r7
-	mov	r1, r2
-	str	r2, [sp, #16]
-	bl	__aeabi_uidivmod
-.LVL3078:
-	.loc 4 1696 0
-	ldr	r2, [sp, #16]
-	.loc 4 1695 0
-	str	r1, [sp, #24]
-.LVL3079:
-	.loc 4 1696 0
-	subs	r2, r2, r1
-.LVL3080:
-	ldr	r1, [sp, #12]
-.LVL3081:
-	mov	r3, r2
-	cmp	r2, r1
-	it	cs
-	movcs	r3, r1
-	str	r3, [sp, #16]
-.LVL3082:
-.L2775:
-	.loc 4 1704 0
-	ldr	r3, .L2816+12
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	ldr	r3, .L2816+52
-	.loc 4 1706 0
-	ldr	r3, [r3]
-	.loc 4 1704 0
-	bne	.L2776
-	.loc 4 1705 0
-	cmp	r4, r10
-	.loc 4 1706 0
-	add	r6, r6, r3
-	.loc 4 1705 0
-	bne	.L2777
-	.loc 4 1706 0
-	ldr	r3, [sp, #4]
-.LVL3083:
-.L2814:
-	.loc 4 1749 0
-	str	r3, [r6, #8]
-	b	.L2778
-.LVL3084:
-.L2777:
-	.loc 4 1708 0
-	ldr	r2, [sp, #16]
-.LVL3085:
-	ldr	r3, [sp, #4]
-	muls	r2, r4, r2
-	subs	r2, r2, r7
-	add	r2, r3, r2, lsl #9
-	str	r2, [r6, #8]
-.LVL3086:
-.L2778:
-	.loc 4 1751 0
-	ldr	r3, .L2816+28
-	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L2788
-	.loc 4 1751 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2816+32
-	movw	r2, #1751
-	ldr	r0, .L2816+36
+	ldr	r0, .L2526+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L2521
+	ldr	r1, .L2526+16
+	movw	r2, #2140
+	ldr	r0, .L2526+20
 	bl	printf
-.LVL3087:
-	ldr	r1, .L2816+40
-	ldr	r0, .L2816+44
+	ldr	r1, .L2526+24
+	ldr	r0, .L2526+28
 	bl	printf
-.LVL3088:
-.L2788:
-	.loc 4 1752 0 is_stmt 1
-	ldr	r2, [sp, #32]
-	movw	r3, #61589
-	ldr	r1, [sp, #28]
-	.loc 4 1678 0
-	add	r8, r8, #1
-.LVL3089:
-	.loc 4 1752 0
-	strh	r3, [r2, r1]	@ movhi
-	.loc 4 1753 0
-	ldr	r2, .L2816+64
-	.loc 4 1754 0
-	str	r4, [fp, #8]
-	.loc 4 1757 0
-	adds	r4, r4, #1
-.LVL3090:
-	.loc 4 1753 0
-	ldr	r3, [r2]
-	str	r3, [fp, #4]
+.L2521:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L2517:
 	adds	r3, r3, #1
-	adds	r1, r3, #1
-	it	eq
-	moveq	r3, #0
-	str	r3, [r2]
-	.loc 4 1755 0
-	ldr	r3, [sp, #40]
-	str	r3, [fp, #12]
-	.loc 4 1756 0
-	ldrh	r3, [r5]
-	strh	r3, [fp, #2]	@ movhi
-	b	.L2770
-.L2817:
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L2518
+.L2520:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L2519
+.L2518:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2527:
 	.align	2
-.L2816:
-	.word	.LANCHOR68
-	.word	.LANCHOR223
-	.word	.LANCHOR241
-	.word	.LANCHOR55
-	.word	.LANCHOR159
-	.word	.LANCHOR129
-	.word	.LANCHOR91
-	.word	.LANCHOR37
-	.word	.LANCHOR242
+.L2526:
+	.word	.LANCHOR84
+	.word	.LANCHOR88
+	.word	.LANCHOR82
+	.word	.LANCHOR89
+	.word	.LANCHOR233
+	.word	.LC5
 	.word	.LC6
 	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR161
-	.word	.LANCHOR179
-	.word	.LANCHOR58
-	.word	.LANCHOR186
-	.word	.LANCHOR157
-.LVL3091:
-.L2776:
-	.loc 4 1711 0
-	cmp	r4, r10
-	.loc 4 1712 0
-	add	r3, r3, r6
-	ite	eq
-	ldreq	r2, .L2818
-.LVL3092:
-	.loc 4 1714 0
-	ldrne	r2, .L2818+4
-	ldr	r2, [r2]
-	str	r2, [r3, #8]
-.LVL3093:
-	.loc 4 1716 0
-	ldr	r2, [sp, #40]
-	ldr	r3, .L2818+8
-	adds	r0, r2, #1
-	beq	.L2781
-.LBB546:
-	.loc 4 1720 0
-	ldr	r3, [r3]
-	.loc 4 1722 0
-	movs	r1, #1
-	.loc 4 1719 0
-	str	r4, [sp, #60]
-	.loc 4 1722 0
-	add	r0, sp, #44
-	.loc 4 1718 0
-	str	r2, [sp, #48]
-	.loc 4 1720 0
-	add	r3, r3, r6
-	ldr	r2, [r3, #8]
-	.loc 4 1721 0
-	ldr	r3, [r3, #12]
-	.loc 4 1720 0
-	str	r2, [sp, #52]
-	.loc 4 1722 0
-	movs	r2, #0
-	.loc 4 1721 0
-	str	r3, [sp, #56]
-	.loc 4 1722 0
-	bl	FlashReadPages
-.LVL3094:
-	.loc 4 1723 0
-	ldr	r3, [sp, #44]
-	adds	r3, r3, #1
-	bne	.L2782
-	.loc 4 1724 0
-	ldr	r2, .L2818+12
-	ldr	r3, [r2, #72]
-	adds	r3, r3, #1
-	str	r3, [r2, #72]
-.L2785:
-	ldr	r2, [sp, #16]
-.LBE546:
-	.loc 4 1736 0
-	cmp	r4, r10
-	ldr	r3, .L2818+8
-	lsl	r2, r2, #9
-	bne	.L2786
-	.loc 4 1737 0
-	ldr	r1, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, [sp, #24]
-	add	r1, r1, r6
-	ldr	r0, [r1, #8]
-	ldr	r1, [sp, #4]
-	add	r0, r0, r3, lsl #9
-.L2813:
-	.loc 4 1739 0
-	bl	ftl_memcpy
-.LVL3095:
-	.loc 4 1741 0
-	ldr	r2, [sp, #20]
-	.loc 4 1739 0
-	ldr	r3, [sp, #16]
-	.loc 4 1741 0
-	cmp	r4, r2
-	bne	.L2778
-	.loc 4 1742 0
-	ldrh	r2, [r5, #4]
-	cmp	r2, #0
-	beq	.L2778
-	.loc 4 1743 0
-	ldr	r3, [r3]
-	add	r6, r6, r3
-	ldr	r3, .L2818+16
-	str	r6, [r3]
-	.loc 4 1744 0
-	ldr	r3, .L2818+20
-	str	r5, [r3]
-	b	.L2778
-.L2782:
-.LBB547:
-	.loc 4 1726 0
-	ldr	r3, [fp, #8]
-	cmp	r4, r3
-	beq	.L2784
-	.loc 4 1727 0
-	ldr	r2, .L2818+12
-	.loc 4 1728 0
-	ldr	r0, .L2818+24
-	.loc 4 1727 0
-	ldr	r3, [r2, #72]
-	adds	r3, r3, #1
-	str	r3, [r2, #72]
-	.loc 4 1728 0
-	mov	r2, r4
-	ldr	r1, [fp, #8]
-	bl	printf
-.LVL3096:
-.L2784:
-	.loc 4 1730 0
-	ldr	r3, [fp, #8]
-	cmp	r4, r3
-	beq	.L2785
-	.loc 4 1730 0 is_stmt 0 discriminator 1
-	movw	r2, #1730
-	ldr	r1, .L2818+28
-	ldr	r0, .L2818+32
-	bl	printf
-.LVL3097:
-	ldr	r1, .L2818+36
-	ldr	r0, .L2818+40
-	bl	printf
-.LVL3098:
-	b	.L2785
-.L2781:
-.LBE547:
-	.loc 4 1733 0 is_stmt 1
-	ldr	r3, [r3]
-	movs	r1, #0
-	ldr	r2, .L2818+44
-	add	r3, r3, r6
-	ldrh	r2, [r2]
-	ldr	r0, [r3, #8]
-	bl	ftl_memset
-.LVL3099:
-	b	.L2785
-.L2786:
-	.loc 4 1739 0
-	ldr	r1, .L2818+48
-	ldr	r0, [r3]
-	str	r3, [sp, #16]
-	ldrh	r1, [r1]
-	ldr	r3, [sp, #4]
-	add	r0, r0, r6
-	ldr	r0, [r0, #8]
-	muls	r1, r4, r1
-	subs	r1, r1, r7
-	add	r1, r3, r1, lsl #9
-	b	.L2813
-.L2811:
-	.loc 4 1749 0
-	ldr	r3, [r3]
-	ldr	r2, [sp, #4]
-	add	r6, r6, r3
-	ldrh	r3, [r1]
-	muls	r3, r4, r3
-	subs	r3, r3, r7
-	add	r3, r2, r3, lsl #9
-	b	.L2814
-.LVL3100:
-.L2792:
-	.loc 4 1765 0
-	ldr	r0, .L2818+8
-	mov	r3, r5
-	movs	r2, #0
-	mov	r1, r8
-	ldr	r0, [r0]
-	bl	FtlProgPages
-.LVL3101:
-	.loc 4 1766 0
-	ldr	r3, [sp, #8]
-	cmp	r3, r8
-	bcs	.L2793
-	.loc 4 1766 0 is_stmt 0 discriminator 1
-	ldr	r1, .L2818+28
-	movw	r2, #1766
-	ldr	r0, .L2818+32
-	bl	printf
-.LVL3102:
-	ldr	r1, .L2818+36
-	ldr	r0, .L2818+40
-	bl	printf
-.LVL3103:
-.L2793:
-	.loc 4 1767 0 is_stmt 1
-	ldr	r3, [sp, #8]
-	sub	r3, r3, r8
-	str	r3, [sp, #8]
-.LVL3104:
-	b	.L2766
-.LVL3105:
-.L2796:
-	.loc 4 1607 0
-	mov	r0, #-1
-.LVL3106:
-	b	.L2761
-.LVL3107:
-.L2798:
-	.loc 4 1627 0
-	mov	r0, r5
-	b	.L2761
-.L2819:
-	.align	2
-.L2818:
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR179
-	.word	.LANCHOR135
-	.word	.LANCHOR129
-	.word	.LANCHOR221
-	.word	.LC57
-	.word	.LANCHOR242
-	.word	.LC6
-	.word	.LC7
-	.word	.LC8
-	.word	.LANCHOR57
-	.word	.LANCHOR55
-	.cfi_endproc
-.LFE308:
-	.size	ftl_write, .-ftl_write
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.word	-1431655765
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
-	.global	FlashReadFacBbtData
+	.global	FtlRecoverySuperblock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-.LFB264:
-	.loc 2 3288 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 48
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL3108:
+	ldrh	r3, [r0]
+	movw	r2, #65535
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	mov	fp, r2
-	.loc 2 3293 0
-	ldr	r2, .L2832
-.LVL3109:
-	.loc 2 3288 0
-	sub	sp, sp, #48
-	.cfi_def_cfa_offset 80
-	.loc 2 3288 0
-	mov	r6, r1
-	mov	r4, r0
-	.loc 2 3295 0
-	ldr	r7, .L2832+4
-	.loc 2 3293 0
-	ldrh	r3, [r2, #14]
-	ldrh	r2, [r2, #12]
-	smulbb	r3, r3, r2
-	.loc 2 3295 0
-	ldr	r2, [r7]
-	.loc 2 3293 0
-	uxth	r3, r3
-.LVL3110:
-	.loc 2 3295 0
-	str	r2, [sp, #20]
-	.loc 2 3296 0
-	ldr	r2, .L2832+8
-	.loc 2 3297 0
-	subs	r5, r3, #1
-	.loc 2 3298 0
-	mul	r10, r6, r3
-	.loc 2 3297 0
-	uxth	r5, r5
-.LVL3111:
-	subs	r3, r3, #15
-.LVL3112:
-	.loc 2 3296 0
-	ldr	r1, [r2]
-.LVL3113:
-	mov	r8, r2
-	str	r1, [sp, #24]
-.LVL3114:
-.L2821:
-	.loc 2 3297 0 discriminator 1
-	cmp	r3, r5
-	ble	.L2827
-	.loc 2 3289 0
-	mov	r0, #-1
-	b	.L2820
-.L2827:
-	.loc 2 3298 0
-	add	r2, r5, r10
-	.loc 2 3300 0
-	add	r0, sp, #12
-	.loc 2 3298 0
-	lsls	r2, r2, #10
-	str	r3, [sp, #4]
-.LVL3115:
-	.loc 2 3299 0
-	str	r2, [sp, #16]
-	.loc 2 3300 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL3116:
-	.loc 2 3301 0
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2822
-	.loc 2 3302 0
-	ldr	r2, [r8]
-	ldrh	r1, [r2]
-	movw	r2, #61664
-	cmp	r1, r2
-	bne	.L2822
-.LVL3117:
-	.loc 2 3304 0
-	cbz	r4, .L2828
-.LVL3118:
-.LBB550:
-.LBB551:
-	.loc 2 3305 0
-	cbnz	r6, .L2824
-	.loc 2 3306 0
-	ldr	r0, .L2832+12
-	.loc 2 3307 0
-	movs	r5, #1
-.LVL3119:
-.L2825:
-	.loc 2 3306 0
-	ldr	r1, [r0]
-	uxth	r3, r6
-.LVL3120:
-	adds	r6, r6, #1
+	mov	r10, r0
+	sub	sp, sp, #56
+	cmp	r3, r2
+	beq	.L2689
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #12]
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	str	r3, [sp, #28]
+	ldr	r3, .L2698
+	ldrh	r3, [r3]
 	cmp	r3, r1
-	bcc	.L2826
-.LVL3121:
-.L2824:
-	.loc 2 3309 0
-	mov	r2, fp
-	ldr	r1, [r7]
-	mov	r0, r4
-	bl	ftl_memcpy
-.LVL3122:
-	.loc 2 3310 0
-	movs	r3, #4
-	ldr	r0, .L2832+16
-	mov	r2, r3
-	mov	r1, r4
-	bl	rknand_print_hex
-.LVL3123:
+	mov	r3, #0
+	bne	.L2531
+	strh	r3, [r0, #4]	@ movhi
+.L2696:
+	strb	r3, [r10, #6]
+.L2689:
 	movs	r0, #0
-.LVL3124:
-.L2820:
-.LBE551:
-.LBE550:
-	.loc 2 3317 0
-	add	sp, sp, #48
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
+	add	sp, sp, #56
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL3125:
-.L2826:
-	.cfi_restore_state
-.LBB553:
-.LBB552:
-	.loc 2 3307 0
-	ldr	r1, [r7]
-	lsr	ip, r3, #5
-	and	r3, r3, #31
-.LVL3126:
-	lsl	r3, r5, r3
-	ldr	r2, [r1, ip, lsl #2]
-	orrs	r3, r3, r2
-	str	r3, [r1, ip, lsl #2]
-.LVL3127:
-	b	.L2825
-.LVL3128:
-.L2822:
-.LBE552:
-.LBE553:
-	.loc 2 3297 0 discriminator 2
-	subs	r5, r5, #1
-.LVL3129:
-	uxth	r5, r5
-.LVL3130:
-	b	.L2821
-.LVL3131:
-.L2828:
-	.loc 2 3303 0
-	mov	r0, r4
-.LVL3132:
-	.loc 2 3316 0
-	b	.L2820
-.L2833:
-	.align	2
-.L2832:
-	.word	.LANCHOR15
-	.word	.LANCHOR144
-	.word	.LANCHOR194
-	.word	.LANCHOR146
-	.word	.LC58
-	.cfi_endproc
-.LFE264:
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
-	.align	1
-	.global	FlashGetBadBlockList
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
-.LFB265:
-	.loc 2 3320 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL3133:
-	.loc 2 3323 0
-	ldr	r3, .L2844
-	.loc 2 3320 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 3320 0
-	mov	r5, r0
-	.loc 2 3326 0
-	ldr	r6, .L2844+4
-	.loc 2 3323 0
+.L2531:
+	ldrh	r0, [r0, #16]
+.L2532:
+	cmp	r0, r2
+	uxth	r5, r3
+	add	r3, r3, #1
+	beq	.L2533
+	ldrb	r1, [r10, #8]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L2534
+	bl	FtlGetLastWrittenPage
+	adds	r6, r0, #1
+	mov	r4, r0
+	beq	.L2535
+	ldr	r3, .L2698+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2613
+	ldr	r3, .L2698+8
+	ldrh	r6, [r3, r0, lsl #1]
+.L2536:
+	ldr	r3, .L2698+12
+	movw	lr, #65535
+	mov	r8, #36
+	ldrh	fp, [r3]
+	ldr	r3, .L2698+16
+	ldr	r0, [r3]
+	ldr	r3, .L2698+20
 	ldr	r3, [r3]
-	.loc 2 3326 0
-	ldr	r0, [r6]
-.LVL3134:
-	.loc 2 3323 0
-	ldrb	r4, [r3, #13]	@ zero_extendqisi2
-	ldrh	r3, [r3, #14]
-	smulbb	r4, r4, r3
-	uxth	r4, r4
-	.loc 2 3326 0
-	adds	r2, r4, #7
-	asrs	r2, r2, #3
-	bl	FlashReadFacBbtData
-.LVL3135:
-	.loc 2 3327 0
-	adds	r0, r0, #1
-.LVL3136:
-	mov	ip, r6
-	bne	.L2835
-.LVL3137:
-.L2839:
-	.loc 2 3321 0
+	str	r3, [sp, #8]
+	ldr	r3, .L2698+24
+	ldrh	ip, [r3]
+	add	r3, r10, #16
+	str	r3, [sp, #20]
+	str	r3, [sp, #4]
 	movs	r3, #0
-.L2836:
-.LVL3138:
-	.loc 2 3338 0
-	movw	r2, #65535
-	.loc 2 3340 0
-	movs	r0, #0
-	.loc 2 3338 0
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	.loc 2 3340 0
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL3139:
-.L2835:
-	.loc 2 3332 0
-	movs	r2, #0
-	lsr	lr, r4, #4
-	mov	r3, r2
-	.loc 2 3328 0
-	subs	r4, r4, #1
-	.loc 2 3329 0
-	mov	r8, #1
-.LVL3140:
-.L2837:
-	uxth	r1, r2
-.LVL3141:
-	.loc 2 3328 0 discriminator 1
-	cmp	r1, r4
-	bge	.L2836
-	.loc 2 3329 0
-	ldr	r6, [ip]
-	lsrs	r7, r1, #5
-	and	r0, r1, #31
-	lsl	r0, r8, r0
-	adds	r2, r2, #1
-	ldr	r6, [r6, r7, lsl #2]
-	tst	r0, r6
-	.loc 2 3330 0
-	ittt	ne
-	addne	r0, r3, #1
-.LVL3142:
-	strhne	r1, [r5, r3, lsl #1]	@ movhi
-	uxthne	r3, r0
-.LVL3143:
-	.loc 2 3332 0
-	cmp	r3, lr
-	bcc	.L2837
-	b	.L2839
-.L2845:
-	.align	2
-.L2844:
-	.word	.LANCHOR18
-	.word	.LANCHOR150
-	.cfi_endproc
-.LFE265:
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.FtlMakeBbt,"ax",%progbits
-	.align	1
-	.global	FtlMakeBbt
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
-.LFB324:
-	.loc 5 361 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 369 0
-	ldr	r3, .L2866
-	.loc 5 361 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 369 0
-	ldr	r7, [r3]
-	cmp	r7, #0
-	bne	.L2847
-	ldr	r8, .L2866+40
-.LBB556:
-.LBB557:
-	.loc 5 375 0
-	ldr	r4, .L2866+4
-	.loc 5 371 0
-	bl	FtlBbtMemInit
-.LVL3144:
-	sub	r10, r8, #18
-	.loc 5 372 0
-	bl	FtlLoadFactoryBbt
-.LVL3145:
-.L2848:
-	.loc 5 373 0
-	ldr	r3, .L2866+8
-	ldrh	r3, [r3]
+	mov	r7, r3
+.L2537:
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L2541
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L2614
+	ldr	r3, .L2698+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #0
+	it	ne
+	movne	r3, #1
+.L2690:
+	str	r3, [sp, #36]
+	mov	r1, r7
+	ldr	r2, [sp, #36]
+	movs	r5, #0
+	bl	FlashReadPages
+	ldr	r3, .L2698+28
+	movw	fp, #65535
+	ldr	r8, .L2698+16
+	ldr	r3, [r3]
+	subs	r3, r3, #1
+	str	r3, [sp, #4]
+.L2543:
+	uxth	r3, r5
 	cmp	r7, r3
-	bcc	.L2854
-	.loc 5 427 0
-	ldr	r5, .L2866+12
-	.loc 5 373 0
-	movs	r4, #0
-.L2855:
-	.loc 5 427 0
-	ldrh	r3, [r5]
-	uxth	r0, r4
-.LVL3146:
+	bhi	.L2548
+	bne	.L2546
 	adds	r4, r4, #1
-	cmp	r3, r0
-	bhi	.L2856
-	.loc 5 433 0
-	ldr	r4, .L2866+16
-	.loc 5 442 0
-	movw	r6, #65535
-	.loc 5 433 0
-	ldrh	r5, [r4, #12]
-	subs	r5, r5, #1
-	uxth	r5, r5
-.LVL3147:
-.L2857:
-	ldrh	r3, [r4, #12]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	bgt	.L2861
-	.loc 5 435 0
-	mov	r0, r5
-	bl	FtlBbmIsBadBlock
-.LVL3148:
-	cmp	r0, #1
-	beq	.L2858
-	.loc 5 437 0
-	mov	r0, r5
-	bl	FlashTestBlk
-.LVL3149:
-	cmp	r0, #0
-	beq	.L2859
-	.loc 5 439 0
-	mov	r0, r5
-	bl	FtlBbmMapBadBlock
-.LVL3150:
-.L2858:
-	.loc 5 433 0
-	subs	r5, r5, #1
-.LVL3151:
-	uxth	r5, r5
-.LVL3152:
-	b	.L2857
-.LVL3153:
-.L2854:
-	.loc 5 375 0
-	ldr	r3, .L2866+20
-	.loc 5 378 0
-	movw	r1, #65535
-	ldrh	r2, [r10, #2]!
-	.loc 5 375 0
-	ldr	r0, [r3]
-	.loc 5 376 0
-	ldr	r3, .L2866+24
-	.loc 5 378 0
+	uxth	r3, r4
+	str	r3, [sp, #8]
+	ldr	r3, [r8]
+	ldr	r0, [r3, #4]
+.L2691:
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	cmp	r3, #1
+	bne	.L2550
+	ldr	r2, .L2698+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2550
+	ldr	r1, [sp, #8]
+	ldr	r2, .L2698+8
+	ldrh	r2, [r2, r1, lsl #1]
+	str	r2, [sp, #8]
+.L2550:
+	ldr	r2, .L2698
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r2]
 	cmp	r2, r1
-	.loc 5 375 0
-	str	r0, [r4, #8]
-	.loc 5 376 0
-	ldr	fp, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L2866+28
-	str	fp, [r4, #12]
-.LVL3154:
-	.loc 5 378 0
-	beq	.L2849
-	.loc 5 380 0
-	ldrh	r6, [r3]
-	.loc 5 382 0
-	mov	r0, r4
-	.loc 5 380 0
-	str	r3, [sp]
-	mla	r6, r7, r6, r2
-.LVL3155:
-	.loc 5 381 0
-	lsls	r2, r6, #10
-	str	r2, [r4, #4]
-	.loc 5 382 0
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-.LVL3156:
-	.loc 5 383 0
-	ldr	r3, [sp]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
-	adds	r2, r2, #7
-	asrs	r2, r2, #3
-	bl	ftl_memcpy
-.LVL3157:
-.L2850:
-	.loc 5 422 0
-	uxth	r0, r6
-	.loc 5 373 0
-	adds	r7, r7, #1
-.LVL3158:
-	add	r8, r8, #4
-	.loc 5 422 0
-	bl	FtlBbmMapBadBlock
-.LVL3159:
-	b	.L2848
-.LVL3160:
-.L2849:
-	.loc 5 387 0
-	mov	r1, r7
-	str	r3, [sp]
-	bl	FlashGetBadBlockList
-.LVL3161:
-	.loc 5 388 0
-	ldr	r1, [r8]
-	ldr	r0, [r4, #8]
-	bl	FtlBbt2Bitmap
-.LVL3162:
-	.loc 5 390 0
-	ldr	r3, [sp]
-	ldrh	r5, [r3]
-.L2852:
-	.loc 5 394 0
-	subs	r5, r5, #1
-	uxth	r5, r5
-.LVL3163:
-.L2851:
-	.loc 5 392 0
-	ldr	r3, [sp]
-	ldrh	r0, [r3]
-	smlabb	r0, r0, r7, r5
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-.LVL3164:
-	cmp	r0, #1
-	beq	.L2852
-	.loc 5 397 0
-	ldr	r3, [sp, #4]
-	movs	r2, #16
+	bne	.L2551
+	ldrh	r2, [sp, #8]
+	strh	r2, [r10, #2]	@ movhi
+	movs	r2, #0
+	strb	r2, [r10, #6]
+	strh	r2, [r10, #4]	@ movhi
+.L2551:
+	ldr	r2, [sp, #8]
+	ldr	r1, [sp, #12]
+	cmp	r2, r1
+	bne	.L2552
+	ldr	r2, [sp, #16]
+	ldr	r1, [sp, #28]
+	cmp	r2, r1
+	bne	.L2552
+.L2697:
+	ldr	r1, [sp, #8]
+	mov	r0, r10
+	bl	ftl_sb_update_avl_pages
+	b	.L2689
+.L2533:
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r10, r1, lsl #1]
+	b	.L2532
+.L2534:
 	movs	r1, #0
-	.loc 5 396 0
-	strh	r5, [r10]	@ movhi
-	.loc 5 397 0
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL3165:
-	.loc 5 398 0
-	movw	r3, #61664
-	strh	r3, [fp]	@ movhi
-	.loc 5 399 0
+	bl	FtlGetLastWrittenPage
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L2535
+.L2613:
+	mov	r6, r4
+	b	.L2536
+.L2535:
+	ldr	r3, [sp, #12]
+	cbz	r3, .L2538
+	ldr	r1, .L2698+32
+	movw	r2, #2211
+	ldr	r0, .L2698+36
+	bl	printf
+	ldr	r1, .L2698+40
+	ldr	r0, .L2698+44
+	bl	printf
+.L2538:
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2539
+	cmp	r5, r3
+	beq	.L2539
+	ldr	r1, .L2698+32
+	movw	r2, #2212
+	ldr	r0, .L2698+36
+	bl	printf
+	ldr	r1, .L2698+40
+	ldr	r0, .L2698+44
+	bl	printf
+.L2539:
 	movs	r3, #0
-	str	r3, [fp, #4]
-	.loc 5 400 0
-	ldrh	r3, [r10]
-	strh	r3, [fp, #2]	@ movhi
-	.loc 5 401 0
-	ldr	r3, [sp]
-	.loc 5 403 0
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2696
+.L2541:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #4]
+	beq	.L2540
+	mla	r1, r8, r7, r0
+	orr	r2, r6, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, ip, r7
+	adds	r7, r7, #1
+	uxth	r7, r7
+	bic	r2, r2, #3
+	mov	r5, r2
+	ldr	r2, [sp, #8]
+	add	r5, r5, r2
+	str	r5, [r1, #12]
+.L2540:
+	adds	r3, r3, #1
+	b	.L2537
+.L2614:
+	movs	r3, #0
+	b	.L2690
+.L2548:
+	movs	r3, #36
 	ldr	r1, [r8]
-	ldr	r0, [r4, #8]
-	.loc 5 401 0
-	ldrh	r6, [r3]
-	ldrh	r3, [r10]
-	mla	r6, r7, r6, r3
-.LVL3166:
-	.loc 5 402 0
-	lsls	r3, r6, #10
-	str	r3, [r4, #4]
-	.loc 5 403 0
-	ldr	r3, .L2866+32
-	ldrh	r2, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memcpy
-.LVL3167:
-	.loc 5 404 0
-	movs	r2, #1
-	mov	r0, r4
-	mov	r1, r2
-	bl	FlashEraseBlocks
-.LVL3168:
-	.loc 5 405 0
-	movs	r3, #1
-	mov	r0, r4
-	mov	r2, r3
-	mov	r1, r3
-	bl	FlashProgPages
-.LVL3169:
-	.loc 5 406 0
-	ldr	r3, [r4]
+	muls	r3, r5, r3
+	adds	r2, r1, r3
+	ldr	r3, [r1, r3]
+	cbnz	r3, .L2544
+	ldr	r2, [r2, #12]
+	ldr	r3, [r2, #4]
+	adds	r1, r3, #1
+	beq	.L2545
+	ldr	r1, .L2698+28
+	mov	r0, r3
+	ldr	r1, [r1]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2545
+	ldr	r1, .L2698+28
 	adds	r3, r3, #1
-	bne	.L2850
-	.loc 5 408 0
-	uxth	r0, r6
-	bl	FtlBbmMapBadBlock
-.LVL3170:
-	b	.L2851
-.LVL3171:
-.L2856:
-	.loc 5 429 0
-	bl	FtlBbmMapBadBlock
-.LVL3172:
-	b	.L2855
-.LVL3173:
-.L2859:
-	.loc 5 442 0
-	ldrh	r3, [r4]
-	cmp	r3, r6
-	bne	.L2860
-	.loc 5 444 0
-	strh	r5, [r4]	@ movhi
-	b	.L2858
-.L2860:
-	.loc 5 448 0
-	strh	r5, [r4, #4]	@ movhi
-.L2861:
-	.loc 5 460 0
-	ldr	r3, .L2866+36
-	.loc 5 457 0
-	movs	r5, #0
-.LVL3174:
-	.loc 5 459 0
-	str	r5, [r4, #8]
-	.loc 5 462 0
-	movs	r2, #2
-	movs	r1, #1
-	.loc 5 457 0
-	strh	r5, [r4, #2]	@ movhi
-	.loc 5 460 0
-	ldr	r0, [r3]
-	ldrh	r3, [r4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	.loc 5 461 0
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #40]
-	.loc 5 462 0
-	bl	FlashEraseBlocks
-.LVL3175:
-	.loc 5 464 0
-	ldrh	r0, [r4]
-	bl	FtlBbmMapBadBlock
-.LVL3176:
-	.loc 5 465 0
-	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-.LVL3177:
-	.loc 5 467 0
-	bl	FtlBbmTblFlush
-.LVL3178:
-	.loc 5 468 0
-	ldr	r3, [r4, #8]
-	.loc 5 471 0
-	ldrh	r2, [r4, #4]
-	.loc 5 472 0
-	strh	r5, [r4, #2]	@ movhi
-	.loc 5 468 0
+	str	r3, [r1]
+.L2545:
+	ldr	r3, [r2]
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	.loc 5 470 0
-	ldrh	r3, [r4]
-.LVL3179:
-	.loc 5 471 0
-	strh	r2, [r4]	@ movhi
-	.loc 5 473 0
-	strh	r3, [r4, #4]	@ movhi
-	.loc 5 475 0
-	bl	FtlBbmTblFlush
-.LVL3180:
-.L2847:
-.LBE557:
-.LBE556:
-	.loc 5 478 0
+	bne	.L2547
+.L2546:
+	uxth	r3, r4
+	uxth	r5, r5
+	str	r3, [sp, #8]
+	movs	r2, #36
+	ldr	r3, [r8]
+	mla	r5, r2, r5, r3
+	ldr	r0, [r5, #4]
+	b	.L2691
+.L2544:
+	ldr	r1, [r2, #4]
+	uxth	fp, r6
+	ldr	r0, .L2698+48
+	bl	printf
+	ldrh	r2, [r10]
+	ldr	r3, .L2698+52
+	strh	r2, [r3]	@ movhi
+.L2547:
+	adds	r5, r5, #1
+	b	.L2543
+.L2552:
+	movw	r2, #65535
+	cmp	fp, r2
+	bne	.L2553
+	cmp	r3, #0
+	bne	.L2554
+.L2553:
+	ldr	r3, .L2698+56
+	uxth	fp, r6
+	uxth	r6, r6
+	mov	r7, #-1
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	itt	eq
+	ldreq	r2, [sp, #4]
+	streq	r2, [r3]
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #7
+	cmp	r6, r3
+	mov	r6, r7
+	itet	gt
+	subgt	r4, fp, #7
+	ldrle	r4, [sp, #12]
+	uxthgt	r4, r4
+.L2557:
+	cmp	r4, fp
+	bhi	.L2572
+	ldr	r3, .L2698+12
+	movw	lr, #65535
+	mov	ip, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2698+16
+	ldr	r0, [r3]
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #32]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L2573
+.L2559:
+	ldr	r1, [sp, #32]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #32]
+	beq	.L2558
+	mla	r1, ip, r5, r0
+	adds	r5, r5, #1
+	orr	r2, r4, r2, lsl #10
+	uxth	r5, r5
+	str	r2, [r1, #4]
+.L2558:
+	adds	r3, r3, #1
+.L2573:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2559
+	mov	r1, r5
+	ldr	r2, [sp, #36]
+	bl	FlashReadPages
+	ldr	r2, .L2698+4
+	movs	r1, #36
+	ldr	r3, .L2698+56
 	movs	r0, #0
-	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2867:
+	movw	ip, #65535
+	ldrb	lr, [r2]	@ zero_extendqisi2
+	ldr	r2, .L2698+16
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	mla	r5, r1, r5, r2
+.L2560:
+	cmp	r2, r5
+	bne	.L2570
+	cbz	r0, .L2571
+	ldr	r2, .L2698+56
+	str	r3, [r2]
+.L2571:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2557
+.L2699:
 	.align	2
-.L2866:
-	.word	.LANCHOR76
-	.word	.LANCHOR199
-	.word	.LANCHOR44
-	.word	.LANCHOR59
-	.word	.LANCHOR74
+.L2698:
+	.word	.LANCHOR53
+	.word	.LANCHOR8
+	.word	.LANCHOR16
+	.word	.LANCHOR38
 	.word	.LANCHOR180
-	.word	.LANCHOR185
-	.word	.LANCHOR50
-	.word	.LANCHOR120
-	.word	.LANCHOR77
-	.word	.LANCHOR74+28
-	.cfi_endproc
-.LFE324:
-	.size	FtlMakeBbt, .-FtlMakeBbt
-	.section	.text.FtlLowFormat,"ax",%progbits
-	.align	1
-	.global	FtlLowFormat
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlLowFormat, %function
-FtlLowFormat:
-.LFB301:
-	.loc 4 767 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 774 0
-	ldr	r3, .L2899
-	ldr	r4, [r3]
-	cmp	r4, #0
-	bne	.L2870
-	.loc 4 776 0
-	ldr	r5, .L2899+4
-	mov	r1, r4
-	ldr	r3, .L2899+8
-	.loc 4 780 0
-	ldr	r6, .L2899+12
-	.loc 4 776 0
-	ldrh	r2, [r5]
-	ldr	r0, [r3]
-	lsls	r2, r2, #2
-	bl	ftl_memset
-.LVL3181:
-	.loc 4 777 0
-	ldrh	r2, [r5]
-	mov	r1, r4
-	ldr	r3, .L2899+16
-	.loc 4 778 0
-	ldr	r5, .L2899+20
-	.loc 4 777 0
-	lsls	r2, r2, #2
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL3182:
-	.loc 4 779 0
-	ldr	r3, .L2899+24
-	.loc 4 780 0
-	ldrh	r0, [r6]
-	.loc 4 778 0
-	str	r4, [r5]
-	.loc 4 779 0
-	str	r4, [r3]
-	.loc 4 780 0
-	bl	FtlFreeSysBlkQueueInit
-.LVL3183:
-	.loc 4 781 0
-	bl	FtlLoadBbt
-.LVL3184:
-	cbz	r0, .L2871
-	.loc 4 782 0
-	bl	FtlMakeBbt
-.LVL3185:
-.L2871:
-	.loc 4 784 0 discriminator 1
-	ldr	ip, .L2899+80
-	.loc 4 767 0 discriminator 1
+	.word	.LANCHOR106
+	.word	.LANCHOR59
+	.word	.LANCHOR160
+	.word	.LANCHOR234
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC62
+	.word	.LANCHOR235
+	.word	.LANCHOR136
+.L2570:
+	ldr	r1, [r2]
+	cbnz	r1, .L2561
+	ldr	r1, [r2, #12]
+	ldrh	r8, [r1]
+	cmp	r8, ip
+	beq	.L2617
+	ldr	r1, [r1, #4]
+	cmp	r1, #-1
+	beq	.L2617
+	adds	r0, r7, #1
+	bne	.L2619
+	ldr	r0, .L2700
+	ldrh	r0, [r0, r4, lsl #1]
+	cmp	r0, ip
+	bne	.L2563
+	cmp	lr, #0
+	beq	.L2619
+.L2563:
+	ldr	r0, [sp, #4]
+	cmp	r0, r3
+	it	ne
+	movne	r7, r3
+.L2619:
+	movs	r0, #1
+	b	.L2562
+.L2561:
+	cbz	r0, .L2564
+	ldr	r2, .L2700+4
+	str	r3, [r2]
+.L2564:
+	ldr	r3, .L2700+8
+	ldrh	r2, [r10]
+	strh	r2, [r3]	@ movhi
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cbnz	r3, .L2554
+	ldr	r3, .L2700
+	ldrh	r2, [r3, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2566
+	adds	r1, r7, #1
+	ldr	r3, .L2700+4
+	beq	.L2567
+	str	r7, [r3]
+.L2554:
+	ldr	r3, .L2700+12
+	movs	r2, #1
+	ldr	r0, .L2700+16
+	ldr	r6, .L2700+20
+	strh	r2, [r3]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	fp, [sp, #12]
+.L2574:
+	ldr	r3, .L2700+24
+	movw	ip, #65535
+	ldr	r0, [r6]
+	mov	lr, #36
+	ldr	r1, [sp, #20]
 	movs	r2, #0
-	.loc 4 785 0 discriminator 1
-	ldr	r7, .L2899+28
-	.loc 4 786 0 discriminator 1
-	ldr	r4, .L2899+32
-	ldr	lr, .L2899+112
-.L2872:
-.LVL3186:
-	.loc 4 784 0 discriminator 1
-	ldrh	r1, [ip]
+	ldrh	r5, [r3]
+	ldr	r3, .L2700+28
+	str	r2, [sp, #24]
+	ldrb	r7, [r3]	@ zero_extendqisi2
+.L2575:
 	uxth	r3, r2
-	adds	r2, r2, #1
-.LVL3187:
-	cmp	r3, r1, lsl #7
-	blt	.L2873
-.LVL3188:
-	.loc 4 791 0
-	ldr	r3, .L2899+36
-.LVL3189:
-	.loc 4 790 0
-	movs	r7, #0
-	.loc 4 791 0
-	ldr	fp, .L2899+116
-	ldrh	r4, [r3]
-.LVL3190:
-	mov	r8, r3
-	mov	r10, fp
-.LVL3191:
-.L2874:
-	.loc 4 791 0 is_stmt 0 discriminator 1
-	ldrh	r3, [fp]
-	cmp	r3, r4
-	bhi	.L2875
-	.loc 4 794 0 is_stmt 1
-	ldr	r4, .L2899+40
-.LVL3192:
-	subs	r3, r7, #2
-	ldrh	r1, [r4]
-	cmp	r3, r1, lsl #1
-	bgt	.L2876
-.LVL3193:
-.L2880:
-	.loc 4 790 0
-	movs	r7, #0
-	mov	r6, r7
-.L2877:
-	.loc 4 805 0 discriminator 1
-	ldrh	r3, [r8]
-	uxth	r0, r7
-.LVL3194:
-	adds	r7, r7, #1
-	cmp	r3, r0
-	bhi	.L2881
-	.loc 4 807 0
-	ldrh	r2, [r10]
-	ldr	r3, .L2899+44
-	.loc 4 810 0
-	ldrh	r4, [r4]
-	ldr	r7, .L2899+48
-	.loc 4 807 0
-	str	r2, [r3]
-	.loc 4 810 0
-	ldr	r3, .L2899+52
-	mov	r1, r4
-	ldr	r3, [r3]
-	mov	r0, r3
-.LVL3195:
-	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-.LVL3196:
-	.loc 4 811 0
-	ldr	r1, .L2899+56
-	ubfx	r3, r0, #5, #16
-	add	r2, r3, #36
-	.loc 4 810 0
-	mov	fp, r0
-	str	r0, [r7]
-	.loc 4 811 0
-	strh	r2, [r1]	@ movhi
-	.loc 4 812 0
-	movs	r2, #24
-	muls	r2, r4, r2
-	.loc 4 811 0
-	str	r3, [sp]
-	str	r1, [sp, #4]
-	.loc 4 812 0
-	cmp	r6, r2
-	ble	.L2882
-	.loc 4 813 0
-	ldr	r3, [sp, #8]
-	mov	r1, r4
-	subs	r0, r3, r6
-	bl	__aeabi_uidiv
-.LVL3197:
-	.loc 4 814 0
-	ldr	r3, [sp, #4]
-	.loc 4 813 0
-	str	r0, [r7]
-	.loc 4 814 0
-	lsrs	r0, r0, #5
-	adds	r0, r0, #24
-	strh	r0, [r3]	@ movhi
-.L2882:
-	.loc 4 817 0
-	ldr	r3, .L2899+60
-	ldr	r3, [r3]
+	cmp	r3, r5
+	bcc	.L2578
+	ldr	r2, [sp, #36]
+	ldr	r1, [sp, #24]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2695:
+	str	r3, [sp, #32]
+	ldr	r2, [sp, #24]
+	ldrh	r3, [sp, #32]
+	cmp	r2, r3
+	bhi	.L2607
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	add	fp, fp, #1
+	uxth	fp, fp
 	cmp	r3, #1
-	bne	.L2883
-	.loc 4 818 0
-	ldr	r2, .L2899+56
-	mov	r1, r4
-	mov	r0, r6
-	ldrh	r3, [r2]
-	str	r2, [sp, #12]
-	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-.LVL3198:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	uxtah	r0, r3, r0
-	add	r3, r3, r0, asr #2
-	strh	r3, [r2]	@ movhi
-.L2883:
-	.loc 4 820 0
-	ldr	r3, .L2899+64
+	bne	.L2608
+	ldr	r3, .L2700+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2884
-	.loc 4 821 0
-	ldr	r2, .L2899+56
-	mov	r1, r4
-	mov	r0, r6
-	ldrh	r3, [r2]
-	str	r2, [sp, #12]
-	str	r3, [sp, #8]
-	bl	__aeabi_uidiv
-.LVL3199:
-	ldr	r3, [sp, #8]
-	ldr	r2, [sp, #12]
-	uxtah	r0, r3, r0
-	add	r3, r3, r0, asr #2
-	strh	r3, [r2]	@ movhi
-.L2884:
-	.loc 4 823 0
-	ldr	r3, .L2899+68
-	ldrh	r3, [r3]
-	cbz	r3, .L2886
-	.loc 4 824 0
-	ldr	r2, .L2899+56
-	ldrh	r1, [r2]
-	add	r1, r1, r3, lsr #1
-	strh	r1, [r2]	@ movhi
-	.loc 4 825 0
-	mul	r1, r4, r3
-	cmp	r6, r1
-	bge	.L2886
-	.loc 4 827 0
-	ldr	r1, [sp]
-	adds	r3, r3, #32
-	.loc 4 826 0
-	str	fp, [r7]
-	.loc 4 827 0
-	add	r1, r1, r3
-	strh	r1, [r2]	@ movhi
-.L2886:
-	.loc 4 836 0
-	ldr	r3, [sp, #4]
-	ldr	r6, .L2899+72
-.LVL3200:
-	ldrh	r2, [r3]
-	ldr	r3, [r7]
-	subs	r3, r3, r2
-	muls	r4, r3, r4
-	.loc 4 837 0
-	ldr	r3, .L2899+76
+	cbz	r3, .L2608
+	ldr	r3, .L2700+32
 	ldrh	r3, [r3]
-	.loc 4 836 0
-	str	r4, [r6]
-	.loc 4 837 0
-	muls	r4, r3, r4
-	.loc 4 838 0
-	ldr	r3, .L2899+80
+	cmp	r3, fp
+	bne	.L2608
+	ldr	r3, [sp, #8]
+	cmp	r3, fp
+	beq	.L2583
+.L2608:
+	ldr	r3, .L2700+36
 	ldrh	r3, [r3]
-	.loc 4 837 0
-	str	r4, [r7]
-	.loc 4 857 0
-	ldr	r7, .L2899+84
-	.loc 4 838 0
-	muls	r4, r3, r4
-	ldr	r3, .L2899+88
-	str	r4, [r3]
-	.loc 4 852 0
-	movw	r4, #65535
-	.loc 4 843 0
-	bl	FtlBbmTblFlush
-.LVL3201:
-	.loc 4 850 0
-	ldrh	r2, [r10]
-	movs	r1, #0
-	ldr	r10, .L2899+120
-	lsls	r2, r2, #1
-	ldr	r0, [r10]
-	bl	ftl_memset
-.LVL3202:
-	.loc 4 851 0
-	ldr	r2, .L2899+92
+	cmp	r3, fp
+	bne	.L2574
+	ldr	r2, .L2700+24
+	movw	r0, #65535
 	movs	r3, #0
-	.loc 4 857 0
-	strh	r3, [r7, #2]	@ movhi
-	.loc 4 861 0
-	movs	r1, #255
-	.loc 4 858 0
-	strb	r3, [r7, #6]
-	.loc 4 851 0
+	strh	fp, [r10, #2]	@ movhi
+	strh	r3, [r10, #4]	@ movhi
+	ldrh	r2, [r2]
+.L2609:
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L2689
+	ldr	r1, [sp, #20]
+	ldrh	r4, [r1], #2
+	cmp	r4, r0
+	str	r1, [sp, #20]
+	add	r1, r3, #1
+	bne	.L2696
+	mov	r3, r1
+	b	.L2609
+.L2567:
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #24]
+	cmp	r2, r1
+	itet	eq
+	ldreq	r2, [r3]
+	movne	r2, r1
+	addeq	r2, r2, #-1
+.L2692:
+	str	r2, [r3]
+	b	.L2554
+.L2566:
+	ldr	r3, [sp, #4]
+	cmp	r6, r3
+	beq	.L2569
+	adds	r2, r6, #1
+	beq	.L2554
+	ldr	r3, .L2700+4
+	str	r6, [r3]
+	b	.L2554
+.L2569:
+	ldr	r2, .L2700+4
+	ldr	r1, [sp, #4]
+	ldr	r3, [r2]
+	cmp	r1, r3
+	beq	.L2554
+	subs	r3, r3, #1
 	str	r3, [r2]
-	.loc 4 852 0
-	ldr	r2, .L2899+96
-	.loc 4 859 0
-	strh	r3, [r7]	@ movhi
-	.loc 4 853 0
-	strh	r3, [r2, #2]	@ movhi
-	.loc 4 854 0
-	strb	r3, [r2, #6]
-	.loc 4 855 0
-	strb	r3, [r2, #8]
-	.loc 4 860 0
-	movs	r3, #1
-	.loc 4 852 0
-	strh	r4, [r2]	@ movhi
-	.loc 4 861 0
-	ldrh	r2, [r8]
-	mov	r8, r10
-	.loc 4 860 0
-	strb	r3, [r7, #8]
-	.loc 4 870 0
-	mov	r10, r7
-	.loc 4 861 0
-	ldr	r3, .L2899+100
-	lsrs	r2, r2, #3
-	ldr	r0, [r3]
-	bl	ftl_memset
-.LVL3203:
-.L2888:
-	.loc 4 870 0
-	mov	r0, r10
-	bl	make_superblock
-.LVL3204:
-	.loc 4 871 0
-	ldrb	r3, [r7, #7]	@ zero_extendqisi2
-	ldrh	r2, [r7]
-	cmp	r3, #0
-	bne	.L2889
-	.loc 4 874 0
-	ldr	r3, [r8]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 4 875 0
-	ldrh	r3, [r7]
+	b	.L2554
+.L2617:
+	mov	r1, r3
+	mov	r3, r6
+.L2562:
+	mov	r6, r3
+	adds	r2, r2, #36
+	mov	r3, r1
+	b	.L2560
+.L2572:
+	mov	r2, #-1
+	ldr	r3, .L2700+4
+	b	.L2692
+.L2578:
+	ldrh	r3, [r1], #2
+	cmp	r3, ip
+	beq	.L2576
+	ldr	r4, [sp, #24]
+	orr	r3, fp, r3, lsl #10
+	mla	r4, lr, r4, r0
+	str	r3, [r4, #4]
+	ldrb	r8, [r10, #8]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L2577
+	cbz	r7, .L2577
+	orr	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+.L2577:
+	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	strh	r3, [r7]	@ movhi
-	.loc 4 876 0
-	b	.L2888
-.LVL3205:
-.L2873:
-	.loc 4 785 0 discriminator 3
-	ldr	r0, [r7]
-	mvns	r1, r3
-	orr	r1, r3, r1, lsl #16
-	str	r1, [r0, r3, lsl #2]
-	.loc 4 786 0 discriminator 3
-	ldr	r1, [r4]
-	str	lr, [r1, r3, lsl #2]
-.LVL3206:
-	b	.L2872
-.LVL3207:
-.L2875:
-	.loc 4 792 0 discriminator 3
+	uxth	r3, r3
+	str	r3, [sp, #24]
+.L2576:
+	adds	r2, r2, #1
+	b	.L2575
+.L2607:
+	ldr	r3, [sp, #32]
+	movs	r5, #36
+	ldr	r8, [r6]
+	muls	r5, r3, r5
+	add	r7, r8, r5
+	ldr	r4, [r7, #4]
+	ubfx	r0, r4, #10, #16
+	str	r4, [sp, #52]
+	bl	P2V_plane
+	ldr	r3, [sp, #12]
+	cmp	fp, r3
+	bcc	.L2580
+	bne	.L2581
+	ldr	r3, [sp, #28]
+	cmp	r3, r0
+	bhi	.L2580
+.L2581:
+	ldr	r3, [sp, #8]
+	cmp	fp, r3
+	bne	.L2582
+	ldr	r3, [sp, #16]
+	cmp	r3, r0
+	beq	.L2583
+.L2582:
+	ldr	r3, [r8, r5]
+	adds	r3, r3, #1
+	beq	.L2584
+	ldr	r3, [r7, #12]
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2585
+.L2591:
+	ldrh	r0, [r10]
+.L2694:
+	bl	decrement_vpc_count
+.L2580:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	b	.L2695
+.L2585:
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2586
+	ldr	r2, .L2700+40
+	ldr	r0, [sp, #4]
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2586
+	ldr	r1, [sp, #4]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L2586:
+	ldr	r4, [r3, #8]
+	add	r1, sp, #48
+	ldr	r3, [r3, #12]
+	movs	r2, #0
 	mov	r0, r4
+	str	r3, [sp, #44]
+	bl	log2phys
+	ldr	r3, .L2700+4
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L2587
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2587
+	ldr	r3, [sp, #44]
+	adds	r7, r3, #1
+	beq	.L2588
+	ldr	r0, [r6]
+	movs	r2, #0
 	movs	r1, #1
-	bl	FtlLowFormatEraseBlock
-.LVL3208:
-	.loc 4 791 0 discriminator 3
-	adds	r4, r4, #1
-.LVL3209:
-	.loc 4 792 0 discriminator 3
-	add	r7, r7, r0
-.LVL3210:
-	uxth	r7, r7
-.LVL3211:
-	.loc 4 791 0 discriminator 3
-	uxth	r4, r4
-.LVL3212:
-	b	.L2874
-.LVL3213:
-.L2876:
-	.loc 4 796 0
-	mov	r0, r7
-	bl	__aeabi_uidiv
-.LVL3214:
-	ldr	r3, .L2899+104
+	add	r0, r0, r5
+	str	r3, [r0, #4]
+	ldr	r7, [r0, #12]
+	bl	FlashReadPages
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L2589
+.L2590:
+	mov	r3, #-1
+	ldrh	r0, [r10]
+	str	r3, [sp, #44]
+	bl	decrement_vpc_count
+.L2598:
+	ldr	r7, [sp, #44]
+	adds	r0, r7, #1
+	beq	.L2580
+.L2612:
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2700+44
+	mov	r4, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2603
+	ldr	r1, .L2700+48
+	movw	r2, #2494
+	ldr	r0, .L2700+52
+	bl	printf
+	ldr	r1, .L2700+56
+	ldr	r0, .L2700+60
+	bl	printf
+.L2603:
+	ldr	r3, .L2700+64
 	ldr	r3, [r3]
-	add	r0, r0, r3
-	uxth	r0, r0
-	bl	FtlSysBlkNumInit
-.LVL3215:
-	.loc 4 797 0
-	ldrh	r0, [r6]
-	bl	FtlFreeSysBlkQueueInit
-.LVL3216:
-	.loc 4 799 0
-	ldrh	r6, [r8]
-.LVL3217:
-.L2878:
-	.loc 4 799 0 is_stmt 0 discriminator 1
-	ldrh	r3, [r10]
-	cmp	r3, r6
-	bls	.L2880
-	.loc 4 800 0 is_stmt 1 discriminator 3
-	mov	r0, r6
-	movs	r1, #1
-	.loc 4 799 0 discriminator 3
-	adds	r6, r6, #1
-.LVL3218:
-	.loc 4 800 0 discriminator 3
-	bl	FtlLowFormatEraseBlock
-.LVL3219:
-	.loc 4 799 0 discriminator 3
-	uxth	r6, r6
-.LVL3220:
-	b	.L2878
-.LVL3221:
-.L2881:
-	.loc 4 806 0 discriminator 3
-	movs	r1, #0
-	bl	FtlLowFormatEraseBlock
-.LVL3222:
-	add	r6, r6, r0
-.LVL3223:
-	uxth	r6, r6
-.LVL3224:
-	b	.L2877
-.LVL3225:
-.L2889:
-	.loc 4 878 0
-	ldr	r3, [r5]
-	.loc 4 879 0
-	ldrh	r1, [r7, #4]
-	.loc 4 881 0
-	ldr	r4, .L2899+108
-	.loc 4 878 0
-	str	r3, [r7, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	.loc 4 879 0
-	ldr	r3, [r8]
-	.loc 4 886 0
-	mov	r10, r4
-	.loc 4 879 0
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 4 881 0
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	.loc 4 882 0
-	strb	r3, [r4, #6]
-	.loc 4 883 0
-	ldrh	r3, [r7]
-	.loc 4 890 0
-	movw	r7, #65535
-	.loc 4 883 0
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	.loc 4 884 0
-	movs	r3, #1
-	strb	r3, [r4, #8]
-.L2890:
-	.loc 4 886 0
-	mov	r0, r10
-	bl	make_superblock
-.LVL3226:
-	.loc 4 887 0
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r4]
+	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	bne	.L2891
-	.loc 4 890 0
-	ldr	r3, [r8]
-	strh	r7, [r3, r2, lsl #1]	@ movhi
-	.loc 4 891 0
-	ldrh	r3, [r4]
-	adds	r3, r3, #1
-	strh	r3, [r4]	@ movhi
-	.loc 4 892 0
-	b	.L2890
-.L2900:
+	beq	.L2604
+	mov	r0, r4
+	b	.L2694
+.L2588:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2591
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	b	.L2591
+.L2701:
 	.align	2
-.L2899:
-	.word	.LANCHOR76
-	.word	.LANCHOR66
-	.word	.LANCHOR192
+.L2700:
+	.word	.LANCHOR120
+	.word	.LANCHOR136
+	.word	.LANCHOR235
+	.word	.LANCHOR236
+	.word	.LANCHOR127
+	.word	.LANCHOR180
 	.word	.LANCHOR38
-	.word	.LANCHOR128
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR39
-	.word	.LANCHOR37
-	.word	.LANCHOR73
-	.word	.LANCHOR72
-	.word	.LANCHOR41
-	.word	.LANCHOR227
-	.word	.LANCHOR28
 	.word	.LANCHOR8
-	.word	.LANCHOR48
-	.word	.LANCHOR226
-	.word	.LANCHOR52
-	.word	.LANCHOR55
-	.word	.LANCHOR91
-	.word	.LANCHOR68
-	.word	.LANCHOR100
-	.word	.LANCHOR201
-	.word	.LANCHOR0
-	.word	.LANCHOR65
-	.word	.LANCHOR92
-	.word	168778952
+	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR160
 	.word	.LANCHOR40
-	.word	.LANCHOR83
-.L2891:
-	.loc 4 894 0
-	ldr	r3, [r5]
-	.loc 4 895 0
-	ldrh	r1, [r4, #4]
-	.loc 4 894 0
-	str	r3, [r4, #12]
-	adds	r3, r3, #1
-	str	r3, [r5]
-	.loc 4 896 0
-	movw	r4, #65535
-	.loc 4 895 0
-	ldr	r3, [r8]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 4 896 0
-	ldr	r3, .L2901
-	strh	r4, [r3]	@ movhi
-	.loc 4 899 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL3227:
-	ldr	r3, .L2901+4
-	.loc 4 900 0
+	.word	.LANCHOR234
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR84
+.L2589:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L2590
+	ldr	r8, [r7, #4]
+	ldr	r0, .L2702
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2590
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bne	.L2593
+.L2596:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L2590
+.L2593:
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	beq	.L2590
+	adds	r0, r1, #1
+	beq	.L2594
+	str	r1, [r3, #4]
 	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	.loc 4 902 0
-	ldr	r2, [r6]
-	.loc 4 899 0
-	strh	r0, [r3]	@ movhi
-	.loc 4 901 0
-	strh	r4, [r3, #4]	@ movhi
-	.loc 4 902 0
-	strh	r2, [r3, #6]	@ movhi
-	.loc 4 903 0
-	ldr	r2, [r5]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r5]
-	.loc 4 904 0
-	bl	FtlVpcTblFlush
-.LVL3228:
-	.loc 4 905 0
-	bl	FtlSysBlkInit
-.LVL3229:
-	cbnz	r0, .L2870
-	.loc 4 906 0
-	ldr	r3, .L2901+8
+	movs	r1, #1
+	mov	r0, r3
+	ldr	r7, [r3, #12]
+	bl	FlashReadPages
+.L2595:
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L2596
+	ldr	r3, [r7, #4]
+	ldr	r2, .L2702
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2596
+	mov	r1, r3
+	mov	r0, r8
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2590
+	b	.L2596
+.L2594:
+	str	r1, [r2, r5]
+	b	.L2595
+.L2587:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	beq	.L2598
+	movs	r2, #1
+	add	r1, sp, #52
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #48]
+	adds	r5, r7, #1
+	beq	.L2598
+	ldr	r3, [sp, #44]
+	cmp	r7, r3
+	beq	.L2612
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2702+4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2602
+	ldr	r3, .L2702+8
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2602
+	ldr	r3, .L2702+12
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2598
+.L2602:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	str	r7, [r0, #4]
+	ldr	r5, [r0, #12]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2598
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	bne	.L2598
 	movs	r2, #1
+	add	r1, sp, #48
+	mov	r0, r4
+	bl	log2phys
+	b	.L2598
+.L2604:
+	mov	r1, r4
+	ldr	r0, .L2702+16
+	bl	printf
+	b	.L2580
+.L2584:
+	ldrh	r3, [r10]
+	mov	r1, r4
+	ldr	r2, .L2702+20
+	ldr	r0, .L2702+24
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [sp, #4]
+	bl	printf
+	ldr	r2, .L2702+28
+	ldr	r3, [r2]
+	cmp	r3, #31
+	bhi	.L2605
+	ldr	r0, [sp, #52]
+	ldr	r1, .L2702+32
+	str	r0, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L2605:
+	ldrh	r0, [r10]
+	bl	decrement_vpc_count
+	ldr	r3, .L2702
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L2606
+	ldr	r2, [sp, #4]
+.L2693:
 	str	r2, [r3]
-.L2870:
-	.loc 4 908 0
+	b	.L2580
+.L2606:
+	ldr	r1, [sp, #4]
+	cmp	r1, r2
+	bcs	.L2580
+	mov	r2, r1
+	b	.L2693
+.L2583:
+	ldrb	r3, [sp, #16]	@ zero_extendqisi2
+	ldr	r2, [sp, #16]
+	strb	r3, [r10, #6]
+	ldrh	r3, [sp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2697
+.L2703:
+	.align	2
+.L2702:
+	.word	.LANCHOR136
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LC63
+	.word	.LANCHOR235
+	.word	.LC64
+	.word	.LANCHOR237
+	.word	.LANCHOR238
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2727
+	ldr	r3, [r3]
+	cbz	r3, .L2705
+.L2710:
 	movs	r0, #0
+.L2704:
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2902:
-	.align	2
-.L2901:
-	.word	.LANCHOR93
-	.word	.LANCHOR206
-	.word	.LANCHOR223
-	.cfi_endproc
-.LFE301:
-	.size	FtlLowFormat, .-FtlLowFormat
-	.global	FtlMallocOffset
-	.global	FtlMallocBuffer
-	.global	gc_ink_free_return_value
-	.global	FtlUpdateVaildLpnCount
-	.global	g_ect_tbl_power_up_flush
-	.global	power_up_flag
-	.global	g_LowFormat
-	.global	gFtlInitStatus
-	.global	DeviceCapacity
-	.global	ToshibaRefValue
-	.global	Toshiba15RefValue
-	.global	ToshibaA19RefValue
-	.global	SamsungRefValue
-	.global	refValueDefault
-	.global	random_seed
-	.global	gSlcNandParaInfo
-	.global	gNandParaInfo
-	.global	g_page_map_check_enable
-	.global	g_power_lost_ecc_error_blk
-	.global	g_power_lost_recovery_flag
-	.global	c_mlc_erase_count_value
-	.global	g_recovery_ppa_tbl
-	.global	g_recovery_page_min_ver
-	.global	g_recovery_page_num
-	.global	g_cur_erase_blk
-	.global	g_gc_skip_write_count
-	.global	g_gc_head_data_block_count
-	.global	g_gc_head_data_block
-	.global	g_ftl_nand_free_count
-	.global	g_in_swl_replace
-	.global	g_in_gc_progress
-	.global	g_all_blk_used_slc_mode
-	.global	g_max_erase_count
-	.global	g_totle_sys_slc_erase_count
-	.global	g_totle_slc_erase_count
-	.global	g_min_erase_count
-	.global	g_totle_avg_erase_count
-	.global	g_totle_mlc_erase_count
-	.global	g_totle_l2p_write_count
-	.global	g_totle_cache_write_count
-	.global	g_tmp_data_superblock_id
-	.global	g_totle_read_page_count
-	.global	g_totle_discard_page_count
-	.global	g_totle_read_sector
-	.global	g_totle_write_sector
-	.global	g_totle_write_page_count
-	.global	g_totle_gc_page_count
-	.global	g_gc_blk_index
-	.global	g_gc_merge_free_blk_threshold
-	.global	g_gc_free_blk_threshold
-	.global	g_gc_refresh_block_temp_tbl
-	.global	g_free_slc_blk_num
-	.global	g_gc_refresh_block_temp_num
-	.global	g_gc_bad_block_temp_tbl
-	.global	g_gc_bad_block_gc_index
-	.global	g_gc_bad_block_temp_num
-	.global	g_gc_next_blk_1
-	.global	g_gc_next_blk
-	.global	g_gc_cur_blk_max_valid_pages
-	.global	g_gc_cur_blk_valid_pages
-	.global	g_gc_page_offset
-	.global	g_gc_blk_num
-	.global	p_gc_blk_tbl
-	.global	p_gc_page_info
-	.global	g_sys_ext_data
-	.global	g_sys_save_data
-	.global	gp_last_act_superblock
-	.global	g_gc_superblock
-	.global	g_gc_temp_superblock
-	.global	g_buffer_superblock
-	.global	g_active_superblock
-	.global	g_num_data_superblocks
-	.global	g_num_free_superblocks
-	.global	p_data_block_list_tail
-	.global	p_data_block_list_head
-	.global	p_free_data_block_list_head
-	.global	p_data_block_list_table
-	.global	g_l2p_last_update_region_id
-	.global	p_l2p_map_buf
-	.global	p_l2p_ram_map
-	.global	g_totle_vendor_block
-	.global	p_vendor_region_ppn_table
-	.global	p_vendor_block_ver_table
-	.global	p_vendor_block_valid_page_count
-	.global	p_vendor_block_table
-	.global	g_totle_map_block
-	.global	p_map_region_ppn_check_table
-	.global	p_map_region_ppn_table
-	.global	p_map_block_ver_table
-	.global	p_map_block_valid_page_count
-	.global	p_map_block_table
-	.global	p_blk_mode_table
-	.global	p_valid_page_count_check_table
-	.global	p_valid_page_count_table
-	.global	g_totle_swl_count
-	.global	p_swl_mul_table
-	.global	p_erase_count_table
-	.global	g_ect_tbl_info_size
-	.global	gp_ect_tbl_info
-	.global	g_gc_num_req
-	.global	c_gc_page_buf_num
-	.global	gp_gc_page_buf_info
-	.global	p_gc_data_buf
-	.global	p_gc_spare_buf
-	.global	p_io_spare_buf
-	.global	p_io_data_buf_1
-	.global	p_io_data_buf_0
-	.global	p_sys_spare_buf
-	.global	p_vendor_data_buf
-	.global	p_sys_data_buf_1
-	.global	p_sys_data_buf
-	.global	p_plane_order_table
-	.global	g_req_cache
-	.global	req_gc_dst
-	.global	req_gc
-	.global	req_erase
-	.global	req_prgm
-	.global	req_read
-	.global	req_sys
-	.global	gVendorBlkInfo
-	.global	gL2pMapInfo
-	.global	gSysFreeQueue
-	.global	gSysInfo
-	.global	gBbtInfo
-	.global	g_flash_read_only_en
-	.global	g_inkDie_check_enable
-	.global	g_SlcPartLbaEndSector
-	.global	g_MaxLbn
-	.global	g_VaildLpn
-	.global	g_MaxLpn
-	.global	g_MaxLbaSector
-	.global	g_GlobalDataVersion
-	.global	g_GlobalSysVersion
-	.global	ftl_gc_temp_power_lost_recovery_flag
-	.global	c_ftl_nand_max_data_blks
-	.global	c_ftl_nand_data_op_blks_per_plane
-	.global	c_ftl_nand_data_blks_per_plane
-	.global	c_ftl_nand_max_sys_blks
-	.global	c_ftl_nand_init_sys_blks_per_plane
-	.global	c_ftl_nand_sys_blks_per_plane
-	.global	c_ftl_vendor_part_size
-	.global	c_ftl_nand_max_vendor_blks
-	.global	c_ftl_nand_max_map_blks
-	.global	c_ftl_nand_map_blks_per_plane
-	.global	c_ftl_nand_vendor_region_num
-	.global	c_ftl_nand_l2pmap_ram_region_num
-	.global	c_ftl_nand_map_region_num
-	.global	c_ftl_nand_totle_phy_blks
-	.global	c_ftl_nand_reserved_blks
-	.global	c_ftl_nand_byte_pre_oob
-	.global	c_ftl_nand_byte_pre_page
-	.global	c_ftl_nand_sec_pre_page_shift
-	.global	c_ftl_nand_sec_pre_page
-	.global	c_ftl_nand_page_pre_super_blk
-	.global	c_ftl_nand_page_pre_slc_blk
-	.global	c_ftl_nand_page_pre_blk
-	.global	c_ftl_nand_bbm_buf_size
-	.global	c_ftl_nand_ext_blk_pre_plane
-	.global	c_ftl_nand_blk_pre_plane
-	.global	c_ftl_nand_planes_num
-	.global	c_ftl_nand_blks_per_die_shift
-	.global	c_ftl_nand_blks_per_die
-	.global	c_ftl_nand_planes_per_die
-	.global	c_ftl_nand_die_num
-	.global	c_ftl_nand_type
-	.global	gMasterTempBuf
-	.global	gMasterInfo
-	.global	gNandcDumpWriteEn
-	.global	gToggleModeClkDiv
-	.global	gBootDdrMode
-	.global	gNandcEccBits
-	.global	gpNandc1
-	.global	gpNandc
-	.global	g_nandc_version_data
-	.global	gNandcVer
-	.global	gNandChipMap
-	.global	gNandIDataBuf
-	.global	FlashDdrTunningReadCount
-	.global	FlashWaitBusyScheduleEn
-	.global	gNandPhyInfo
-	.global	gFlashProgCheckSpareBuffer
-	.global	gFlashProgCheckBuffer
-	.global	gFlashSpareBuffer
-	.global	gFlashPageBuffer1
-	.global	gFlashPageBuffer0
-	.global	gpFlashSaveInfo
-	.global	gReadRetryInfo
-	.global	gpNandParaInfo
-	.global	gNandOptPara
-	.global	g_slc2KBNand
-	.global	g_maxRetryCount
-	.global	g_maxRegNum
-	.global	g_retryMode
-	.global	gNandIDBResBlkNumSaveInFlash
-	.global	gNandIDBResBlkNum
-	.global	gNandFlashResEndPageAddr
-	.global	gNandFlashInfoBlockAddr
-	.global	gNandFlashIdbBlockAddr
-	.global	gNandFlashInfoBlockEcc
-	.global	gNandFlashIDBEccBits
-	.global	gNandFlashEccBits
-	.global	gNandRandomizer
-	.global	gBlockPageAlignSize
-	.global	gTotleBlock
-	.global	gNandMaxChip
-	.global	gNandMaxDie
-	.global	gFlashInterfaceMode
-	.global	gFlashSlcMode
-	.global	gFlashOnfiModeEn
-	.global	gFlashToggleModeEn
-	.global	gFlashSdrModeEn
-	.global	gMultiPageProgEn
-	.global	gMultiPageReadEn
-	.global	gpReadRetrial
-	.global	mlcPageToSlcPageTbl
-	.global	slcPageToMlcPageTbl
-	.global	DieAddrs
-	.global	gDieOp
-	.global	DieCsIndex
-	.global	IDByte
-	.global	read_retry_cur_offset
-	.section	.bss.DeviceCapacity,"aw",%nobits
-	.align	2
-	.set	.LANCHOR60,. + 0
-	.type	DeviceCapacity, %object
-	.size	DeviceCapacity, 4
-DeviceCapacity:
-	.space	4
-	.section	.bss.DieAddrs,"aw",%nobits
+.L2705:
+	ldr	r0, .L2727+4
+	movw	r3, #65535
+	ldr	r5, .L2727+8
+	ldrh	r6, [r0]
+	mov	r4, r0
+	cmp	r6, r3
+	beq	.L2707
+	ldr	r3, .L2727+12
+	ldrh	r1, [r3]
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	beq	.L2707
+	ldr	r3, .L2727+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	cmp	r3, #4
+	bls	.L2708
+	subs	r3, r3, #5
+	movs	r0, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L2708:
+	ldr	r3, [r5]
+	cbnz	r3, .L2709
+	ldr	r2, .L2727+20
+	ldr	r0, [sp, #12]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2709:
+	movs	r3, #0
+	movs	r0, #1
+	str	r3, [r5]
+	b	.L2704
+.L2707:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	str	r3, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2710
+	ldr	r6, .L2727+12
+	bl	FtlCacheWriteBack
+	ldrb	r0, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	ldr	r5, .L2727+24
+	muls	r2, r0, r2
+	ldrh	r1, [r5]
+	cmp	r1, r2
+	beq	.L2711
+	ldr	r1, .L2727+28
+	movs	r2, #163
+	ldr	r0, .L2727+32
+	bl	printf
+	ldr	r1, .L2727+36
+	ldr	r0, .L2727+40
+	bl	printf
+.L2711:
+	ldrh	r6, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldr	r2, .L2727+44
+	ldrh	r0, [r4]
+	ldr	fp, .L2727+84
+	smulbb	r3, r3, r6
+	ldr	r1, [r2]
+	movs	r6, #0
+	str	r2, [sp, #4]
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	ldr	r1, .L2727+48
+	ldrh	r3, [r5]
+	ldr	r0, [r1]
+	add	r3, r3, r0
+	str	r3, [r1]
+.L2712:
+	ldrh	r2, [r5]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2716
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldr	r3, .L2727+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2717
+	ldrh	r1, [r4]
+	ldr	r0, .L2727+56
+	bl	printf
+.L2717:
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	beq	.L2718
+	bl	INSERT_DATA_LIST
+.L2719:
+	ldr	r3, .L2727+60
+	movw	r6, #65535
+	strh	r6, [r4]	@ movhi
+	movs	r4, #0
+	strh	r4, [r5]	@ movhi
+	strh	r4, [r3]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L2727+64
+	ldrh	r2, [r3]
+	ldr	r3, .L2727+68
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, asr #2
+	ble	.L2710
+	ldr	r3, .L2727+72
+	movs	r2, #20
+	mov	r0, r4
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L2727+76
+	strh	r2, [r3]	@ movhi
+	b	.L2704
+.L2716:
+	uxth	r3, r6
+	movs	r7, #12
+	ldr	r2, [fp]
+	muls	r7, r3, r7
+	ldr	r3, .L2727+80
+	ldr	r8, [r3]
+	add	r10, r8, r7
+	ldr	r1, [r10, #8]
+	cmp	r1, r2
+	bcc	.L2713
+	ldr	r1, .L2727+28
+	movs	r2, #168
+	ldr	r0, .L2727+32
+	bl	printf
+	ldr	r1, .L2727+36
+	ldr	r0, .L2727+40
+	bl	printf
+.L2713:
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	ldr	r2, [sp, #12]
+	ldr	r0, [r8, r7]
+	cmp	r0, r2
+	bne	.L2714
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	movs	r2, #1
+	mov	r7, r0
+	add	r1, r10, #4
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	mov	r0, r7
+.L2726:
+	bl	decrement_vpc_count
+.L2715:
+	adds	r6, r6, #1
+	b	.L2712
+.L2714:
+	ldr	r3, [r10, #4]
+	cmp	r2, r3
+	beq	.L2715
+	ldrh	r0, [r4]
+	b	.L2726
+.L2718:
+	bl	INSERT_FREE_LIST
+	b	.L2719
+.L2728:
 	.align	2
-	.set	.LANCHOR17,. + 0
-	.type	DieAddrs, %object
-	.size	DieAddrs, 32
-DieAddrs:
-	.space	32
-	.section	.bss.DieCsIndex,"aw",%nobits
-	.align	2
-	.set	.LANCHOR26,. + 0
-	.type	DieCsIndex, %object
-	.size	DieCsIndex, 8
-DieCsIndex:
-	.space	8
-	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
-	.align	2
-	.set	.LANCHOR141,. + 0
-	.type	FlashDdrTunningReadCount, %object
-	.size	FlashDdrTunningReadCount, 4
-FlashDdrTunningReadCount:
-	.space	4
-	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
-	.align	2
-	.type	FlashWaitBusyScheduleEn, %object
-	.size	FlashWaitBusyScheduleEn, 4
-FlashWaitBusyScheduleEn:
-	.space	4
-	.section	.bss.FtlMallocBuffer,"aw",%nobits
-	.align	6
-	.type	FtlMallocBuffer, %object
-	.size	FtlMallocBuffer, 1310720
-FtlMallocBuffer:
-	.space	1310720
-	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
-	.align	1
-	.set	.LANCHOR99,. + 0
-	.type	FtlUpdateVaildLpnCount, %object
-	.size	FtlUpdateVaildLpnCount, 2
-FtlUpdateVaildLpnCount:
-	.space	2
-	.section	.bss.IDByte,"aw",%nobits
-	.align	2
-	.set	.LANCHOR22,. + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.space	32
-	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
-	.align	1
-	.set	.LANCHOR120,. + 0
-	.type	c_ftl_nand_bbm_buf_size, %object
-	.size	c_ftl_nand_bbm_buf_size, 2
-c_ftl_nand_bbm_buf_size:
-	.space	2
-	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR40,. + 0
-	.type	c_ftl_nand_blk_pre_plane, %object
-	.size	c_ftl_nand_blk_pre_plane, 2
-c_ftl_nand_blk_pre_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
-	.align	1
-	.set	.LANCHOR50,. + 0
-	.type	c_ftl_nand_blks_per_die, %object
-	.size	c_ftl_nand_blks_per_die, 2
-c_ftl_nand_blks_per_die:
-	.space	2
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
-	.align	1
-	.set	.LANCHOR51,. + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
-	.space	2
-	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
-	.align	1
-	.set	.LANCHOR58,. + 0
-	.type	c_ftl_nand_byte_pre_oob, %object
-	.size	c_ftl_nand_byte_pre_oob, 2
-c_ftl_nand_byte_pre_oob:
-	.space	2
-	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
-	.align	1
-	.set	.LANCHOR57,. + 0
-	.type	c_ftl_nand_byte_pre_page, %object
-	.size	c_ftl_nand_byte_pre_page, 2
-c_ftl_nand_byte_pre_page:
-	.space	2
-	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR39,. + 0
-	.type	c_ftl_nand_data_blks_per_plane, %object
-	.size	c_ftl_nand_data_blks_per_plane, 2
-c_ftl_nand_data_blks_per_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR227,. + 0
-	.type	c_ftl_nand_data_op_blks_per_plane, %object
-	.size	c_ftl_nand_data_op_blks_per_plane, 2
-c_ftl_nand_data_op_blks_per_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR44,. + 0
-	.type	c_ftl_nand_die_num, %object
-	.size	c_ftl_nand_die_num, 2
-c_ftl_nand_die_num:
-	.space	2
-	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+.L2727:
+	.word	.LANCHOR77
+	.word	.LANCHOR94
+	.word	.LANCHOR135
+	.word	.LANCHOR53
+	.word	.LANCHOR79
+	.word	.LANCHOR138
+	.word	.LANCHOR111
+	.word	.LANCHOR239
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR84
+	.word	.LANCHOR161
+	.word	.LANCHOR8
+	.word	.LC65
+	.word	.LANCHOR110
+	.word	.LANCHOR89
+	.word	.LANCHOR223
+	.word	.LANCHOR204
+	.word	.LANCHOR176
+	.word	.LANCHOR112
+	.word	.LANCHOR73
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
-	.set	.LANCHOR48,. + 0
-	.type	c_ftl_nand_ext_blk_pre_plane, %object
-	.size	c_ftl_nand_ext_blk_pre_plane, 2
-c_ftl_nand_ext_blk_pre_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.global	FtlGcPageRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2731
+	ldr	r5, .L2731+4
+	ldrh	r1, [r4]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4]
+	cmp	r2, r3
+	bcc	.L2729
+	ldr	r0, .L2731+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L2731+12
+	movs	r2, #0
+	str	r2, [r3]
+.L2729:
+	pop	{r3, r4, r5, pc}
+.L2732:
 	.align	2
-	.set	.LANCHOR65,. + 0
-	.type	c_ftl_nand_init_sys_blks_per_plane, %object
-	.size	c_ftl_nand_init_sys_blks_per_plane, 4
-c_ftl_nand_init_sys_blks_per_plane:
-	.space	4
-	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR67,. + 0
-	.type	c_ftl_nand_l2pmap_ram_region_num, %object
-	.size	c_ftl_nand_l2pmap_ram_region_num, 2
-c_ftl_nand_l2pmap_ram_region_num:
-	.space	2
-	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
-	.align	1
-	.set	.LANCHOR63,. + 0
-	.type	c_ftl_nand_map_blks_per_plane, %object
-	.size	c_ftl_nand_map_blks_per_plane, 2
-c_ftl_nand_map_blks_per_plane:
-	.space	2
-	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+.L2731:
+	.word	.LANCHOR53
+	.word	.LANCHOR94
+	.word	.LANCHOR127
+	.word	.LANCHOR135
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
-	.set	.LANCHOR66,. + 0
-	.type	c_ftl_nand_map_region_num, %object
-	.size	c_ftl_nand_map_region_num, 2
-c_ftl_nand_map_region_num:
-	.space	2
-	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
-	.align	2
-	.set	.LANCHOR41,. + 0
-	.type	c_ftl_nand_max_data_blks, %object
-	.size	c_ftl_nand_max_data_blks, 4
-c_ftl_nand_max_data_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
-	.align	2
-	.set	.LANCHOR64,. + 0
-	.type	c_ftl_nand_max_map_blks, %object
-	.size	c_ftl_nand_max_map_blks, 4
-c_ftl_nand_max_map_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.global	FtlPowerLostRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L2734
+	ldr	r3, .L2734+4
+	mov	r0, r5
+	str	r4, [r3]
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	ldr	r5, .L2734+8
+	bl	FtlSlcSuperblockCheck
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L2735:
 	.align	2
-	.set	.LANCHOR38,. + 0
-	.type	c_ftl_nand_max_sys_blks, %object
-	.size	c_ftl_nand_max_sys_blks, 4
-c_ftl_nand_max_sys_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR61,. + 0
-	.type	c_ftl_nand_max_vendor_blks, %object
-	.size	c_ftl_nand_max_vendor_blks, 2
-c_ftl_nand_max_vendor_blks:
-	.space	2
-	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+.L2734:
+	.word	.LANCHOR92
+	.word	.LANCHOR237
+	.word	.LANCHOR93
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
-	.set	.LANCHOR52,. + 0
-	.type	c_ftl_nand_page_pre_blk, %object
-	.size	c_ftl_nand_page_pre_blk, 2
-c_ftl_nand_page_pre_blk:
-	.space	2
-	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR53,. + 0
-	.type	c_ftl_nand_page_pre_slc_blk, %object
-	.size	c_ftl_nand_page_pre_slc_blk, 2
-c_ftl_nand_page_pre_slc_blk:
-	.space	2
-	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR54,. + 0
-	.type	c_ftl_nand_page_pre_super_blk, %object
-	.size	c_ftl_nand_page_pre_super_blk, 2
-c_ftl_nand_page_pre_super_blk:
-	.space	2
-	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR37,. + 0
-	.type	c_ftl_nand_planes_num, %object
-	.size	c_ftl_nand_planes_num, 2
-c_ftl_nand_planes_num:
-	.space	2
-	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
-	.align	1
-	.set	.LANCHOR45,. + 0
-	.type	c_ftl_nand_planes_per_die, %object
-	.size	c_ftl_nand_planes_per_die, 2
-c_ftl_nand_planes_per_die:
-	.space	2
-	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR59,. + 0
-	.type	c_ftl_nand_reserved_blks, %object
-	.size	c_ftl_nand_reserved_blks, 2
-c_ftl_nand_reserved_blks:
-	.space	2
-	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
-	.align	1
-	.set	.LANCHOR55,. + 0
-	.type	c_ftl_nand_sec_pre_page, %object
-	.size	c_ftl_nand_sec_pre_page, 2
-c_ftl_nand_sec_pre_page:
-	.space	2
-	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
-	.align	1
-	.set	.LANCHOR56,. + 0
-	.type	c_ftl_nand_sec_pre_page_shift, %object
-	.size	c_ftl_nand_sec_pre_page_shift, 2
-c_ftl_nand_sec_pre_page_shift:
-	.space	2
-	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
-	.align	2
-	.set	.LANCHOR36,. + 0
-	.type	c_ftl_nand_sys_blks_per_plane, %object
-	.size	c_ftl_nand_sys_blks_per_plane, 4
-c_ftl_nand_sys_blks_per_plane:
-	.space	4
-	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
-	.align	2
-	.set	.LANCHOR42,. + 0
-	.type	c_ftl_nand_totle_phy_blks, %object
-	.size	c_ftl_nand_totle_phy_blks, 4
-c_ftl_nand_totle_phy_blks:
-	.space	4
-	.section	.bss.c_ftl_nand_type,"aw",%nobits
-	.align	1
-	.set	.LANCHOR43,. + 0
-	.type	c_ftl_nand_type, %object
-	.size	c_ftl_nand_type, 2
-c_ftl_nand_type:
-	.space	2
-	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR62,. + 0
-	.type	c_ftl_nand_vendor_region_num, %object
-	.size	c_ftl_nand_vendor_region_num, 2
-c_ftl_nand_vendor_region_num:
-	.space	2
-	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
-	.align	1
-	.set	.LANCHOR49,. + 0
-	.type	c_ftl_vendor_part_size, %object
-	.size	c_ftl_vendor_part_size, 2
-c_ftl_vendor_part_size:
-	.space	2
-	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r4, .L2746
+	movw	r5, #65535
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L2746+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2746+8
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L2746+12
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	mov	r5, r4
+	bne	.L2737
+.L2739:
+	mov	r4, #-1
+.L2736:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2737:
+	bl	FtlLoadSysInfo
+	mov	r4, r0
+	cmp	r0, #0
+	bne	.L2739
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L2746+16
+	movs	r0, #12
+	ldrh	r2, [r3]
+	ldr	r3, .L2746+20
+	ldr	r1, [r3]
+	mov	r3, r4
+.L2740:
+	cmp	r3, r2
+	blt	.L2742
+	ldrh	r3, [r5]
+	cmp	r3, #0
+	beq	.L2736
+.L2741:
+	ldr	r3, .L2746+24
+	ldr	r1, [r3]
+	ldr	r3, .L2746+28
+	ldrh	r0, [r3]
+	ldrh	r5, [r3, #4]
+	ldrh	r2, [r1, r0, lsl #1]
+	subs	r2, r2, r5
+	ldr	r5, .L2746+32
+	strh	r2, [r1, r0, lsl #1]	@ movhi
+	ldrh	r2, [r5]
+	strh	r2, [r3, #2]	@ movhi
+	movs	r2, #0
+	strh	r2, [r3, #4]	@ movhi
+	strb	r2, [r3, #6]
+	ldr	r3, .L2746+36
+	ldrh	r6, [r3]
+	ldrh	r7, [r3, #4]
+	ldrh	r0, [r1, r6, lsl #1]
+	subs	r0, r0, r7
+	strh	r0, [r1, r6, lsl #1]	@ movhi
+	ldrh	r1, [r5]
+	ldr	r0, .L2746+40
+	strb	r2, [r3, #6]
+	strh	r1, [r3, #2]	@ movhi
+	strh	r2, [r3, #4]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	r0, .L2746+44
+	bl	FtlMapBlkWriteDumpData
+	ldr	r2, .L2746+48
+	ldrh	r3, [r2, #30]
+	adds	r3, r3, #1
+	strh	r3, [r2, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2736
+.L2742:
+	mla	r6, r0, r3, r1
+	ldr	r6, [r6, #4]
+	cmp	r6, #0
+	blt	.L2741
+	adds	r3, r3, #1
+	b	.L2740
+.L2747:
 	.align	2
-	.set	.LANCHOR107,. + 0
-	.type	c_gc_page_buf_num, %object
-	.size	c_gc_page_buf_num, 4
-c_gc_page_buf_num:
-	.space	4
-	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+.L2746:
+	.word	.LANCHOR236
+	.word	.LANCHOR235
+	.word	.LANCHOR39
+	.word	.LANCHOR209
+	.word	.LANCHOR68
+	.word	.LANCHOR97
+	.word	.LANCHOR84
+	.word	.LANCHOR92
+	.word	.LANCHOR53
+	.word	.LANCHOR93
+	.word	.LANCHOR127
+	.word	.LANCHOR215
+	.word	.LANCHOR81
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
-	.set	.LANCHOR47,. + 0
-	.type	c_mlc_erase_count_value, %object
-	.size	c_mlc_erase_count_value, 2
-c_mlc_erase_count_value:
-	.space	2
-	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
-	.align	2
-	.set	.LANCHOR132,. + 0
-	.type	ftl_gc_temp_power_lost_recovery_flag, %object
-	.size	ftl_gc_temp_power_lost_recovery_flag, 4
-ftl_gc_temp_power_lost_recovery_flag:
-	.space	4
-	.section	.bss.gBbtInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR74,. + 0
-	.type	gBbtInfo, %object
-	.size	gBbtInfo, 60
-gBbtInfo:
-	.space	60
-	.section	.bss.gBlockPageAlignSize,"aw",%nobits
-	.align	2
-	.set	.LANCHOR3,. + 0
-	.type	gBlockPageAlignSize, %object
-	.size	gBlockPageAlignSize, 4
-gBlockPageAlignSize:
-	.space	4
-	.section	.bss.gBootDdrMode,"aw",%nobits
-	.align	2
-	.set	.LANCHOR152,. + 0
-	.type	gBootDdrMode, %object
-	.size	gBootDdrMode, 4
-gBootDdrMode:
-	.space	4
-	.section	.bss.gDieOp,"aw",%nobits
-	.align	2
-	.set	.LANCHOR23,. + 0
-	.type	gDieOp, %object
-	.size	gDieOp, 128
-gDieOp:
-	.space	128
-	.section	.bss.gFlashInterfaceMode,"aw",%nobits
-	.set	.LANCHOR24,. + 0
-	.type	gFlashInterfaceMode, %object
-	.size	gFlashInterfaceMode, 1
-gFlashInterfaceMode:
-	.space	1
-	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
-	.type	gFlashOnfiModeEn, %object
-	.size	gFlashOnfiModeEn, 1
-gFlashOnfiModeEn:
-	.space	1
-	.section	.bss.gFlashPageBuffer0,"aw",%nobits
-	.align	2
-	.set	.LANCHOR144,. + 0
-	.type	gFlashPageBuffer0, %object
-	.size	gFlashPageBuffer0, 4
-gFlashPageBuffer0:
-	.space	4
-	.section	.bss.gFlashPageBuffer1,"aw",%nobits
-	.align	2
-	.set	.LANCHOR150,. + 0
-	.type	gFlashPageBuffer1, %object
-	.size	gFlashPageBuffer1, 4
-gFlashPageBuffer1:
-	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR195,. + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
-	.space	4
-	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR196,. + 0
-	.type	gFlashProgCheckSpareBuffer, %object
-	.size	gFlashProgCheckSpareBuffer, 4
-gFlashProgCheckSpareBuffer:
-	.space	4
-	.section	.bss.gFlashSdrModeEn,"aw",%nobits
-	.type	gFlashSdrModeEn, %object
-	.size	gFlashSdrModeEn, 1
-gFlashSdrModeEn:
-	.space	1
-	.section	.bss.gFlashSlcMode,"aw",%nobits
-	.set	.LANCHOR8,. + 0
-	.type	gFlashSlcMode, %object
-	.size	gFlashSlcMode, 1
-gFlashSlcMode:
-	.space	1
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.global	FtlLowFormat
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2779
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r4, [r3]
+	cmp	r4, #0
+	bne	.L2750
+	ldr	r5, .L2779+4
+	mov	r1, r4
+	ldr	r3, .L2779+8
+	ldr	r6, .L2779+12
+	ldrh	r2, [r5]
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2779+16
+	ldr	r5, .L2779+20
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2779+24
+	ldrh	r0, [r6]
+	str	r4, [r5]
+	str	r4, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2751
+	bl	FtlMakeBbt
+.L2751:
+	ldr	r3, .L2779+28
+	ldr	r2, .L2779+32
+	ldr	ip, .L2779+112
+	ldrh	r1, [r3]
+	ldr	r4, [r2]
+	ldr	r2, .L2779+36
+	str	r3, [sp, #12]
+	lsls	r1, r1, #7
+	ldr	r7, [r2]
+	movs	r2, #0
+.L2752:
+	uxth	r3, r2
+	adds	r2, r2, #1
+	cmp	r3, r1
+	blt	.L2753
+	ldr	r3, .L2779+40
+	movs	r7, #0
+	ldr	fp, .L2779+116
+	ldrh	r4, [r3]
+	mov	r8, r3
+	mov	r10, fp
+.L2754:
+	ldrh	r3, [fp]
+	cmp	r3, r4
+	bhi	.L2755
+	ldr	r4, .L2779+44
+	subs	r3, r7, #2
+	ldrh	r1, [r4]
+	cmp	r3, r1, lsl #1
+	bgt	.L2756
+.L2760:
+	movs	r7, #0
+	mov	r6, r7
+.L2757:
+	ldrh	r3, [r8]
+	uxth	r0, r7
+	adds	r7, r7, #1
+	cmp	r3, r0
+	bhi	.L2761
+	ldrh	r2, [r10]
+	ldr	r3, .L2779+48
+	ldrh	r4, [r4]
+	ldr	r7, .L2779+52
+	str	r2, [r3]
+	ldr	r3, .L2779+56
+	mov	r1, r4
+	ldr	r3, [r3]
+	mov	r0, r3
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r1, .L2779+60
+	ubfx	r3, r0, #5, #16
+	add	r2, r3, #36
+	mov	fp, r0
+	str	r0, [r7]
+	strh	r2, [r1]	@ movhi
+	movs	r2, #24
+	muls	r2, r4, r2
+	str	r3, [sp, #4]
+	str	r1, [sp, #8]
+	cmp	r6, r2
+	ble	.L2762
+	ldr	r3, [sp, #16]
+	mov	r1, r4
+	subs	r0, r3, r6
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #8]
+	str	r0, [r7]
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r3]	@ movhi
+.L2762:
+	ldr	r3, .L2779+64
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L2763
+	ldr	r2, .L2779+60
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2763:
+	ldr	r3, .L2779+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2764
+	ldr	r2, .L2779+60
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2764:
+	ldr	r3, .L2779+72
+	ldrh	r3, [r3]
+	cbz	r3, .L2766
+	ldr	r2, .L2779+60
+	ldrh	r1, [r2]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r2]	@ movhi
+	mul	r1, r4, r3
+	cmp	r6, r1
+	bge	.L2766
+	ldr	r1, [sp, #4]
+	adds	r3, r3, #32
+	str	fp, [r7]
+	add	r1, r1, r3
+	strh	r1, [r2]	@ movhi
+.L2766:
+	ldr	r3, [sp, #8]
+	ldr	r6, .L2779+76
+	ldrh	r2, [r3]
+	ldr	r3, [r7]
+	subs	r3, r3, r2
+	muls	r4, r3, r4
+	ldr	r3, .L2779+80
+	ldrh	r3, [r3]
+	str	r4, [r6]
+	muls	r4, r3, r4
+	ldr	r3, [sp, #12]
+	ldrh	r3, [r3]
+	str	r4, [r7]
+	ldr	r7, .L2779+84
+	muls	r4, r3, r4
+	ldr	r3, .L2779+88
+	str	r4, [r3]
+	movw	r4, #65535
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r10]
+	movs	r1, #0
+	ldr	r10, .L2779+120
+	lsls	r2, r2, #1
+	ldr	r0, [r10]
+	bl	ftl_memset
+	ldr	r2, .L2779+92
+	movs	r3, #0
+	strh	r3, [r7, #2]	@ movhi
+	movs	r1, #255
+	strb	r3, [r7, #6]
+	str	r3, [r2]
+	ldr	r2, .L2779+96
+	strh	r3, [r7]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	strb	r3, [r2, #6]
+	strb	r3, [r2, #8]
+	movs	r3, #1
+	strh	r4, [r2]	@ movhi
+	ldrh	r2, [r8]
+	mov	r8, r10
+	strb	r3, [r7, #8]
+	mov	r10, r7
+	ldr	r3, .L2779+100
+	lsrs	r2, r2, #3
+	ldr	r0, [r3]
+	bl	ftl_memset
+.L2768:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7]
+	cmp	r3, #0
+	bne	.L2769
+	ldr	r3, [r8]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2768
+.L2753:
+	mvns	r0, r3
+	orr	r0, r3, r0, lsl #16
+	str	r0, [r4, r3, lsl #2]
+	str	ip, [r7, r3, lsl #2]
+	b	.L2752
+.L2755:
+	mov	r0, r4
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r4, r4, #1
+	add	r7, r7, r0
+	uxth	r7, r7
+	uxth	r4, r4
+	b	.L2754
+.L2756:
+	mov	r0, r7
+	bl	__aeabi_uidiv
+	ldr	r3, .L2779+104
+	ldr	r3, [r3]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldrh	r0, [r6]
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	r6, [r8]
+.L2758:
+	ldrh	r3, [r10]
+	cmp	r3, r6
+	bls	.L2760
+	mov	r0, r6
+	movs	r1, #1
+	adds	r6, r6, #1
+	bl	FtlLowFormatEraseBlock
+	uxth	r6, r6
+	b	.L2758
+.L2761:
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r6, r6, r0
+	uxth	r6, r6
+	b	.L2757
+.L2769:
+	ldr	r3, [r5]
+	ldrh	r1, [r7, #4]
+	ldr	r4, .L2779+108
+	str	r3, [r7, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	ldr	r3, [r8]
+	mov	r10, r4
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r3, [r7]
+	movw	r7, #65535
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2770:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cmp	r3, #0
+	bne	.L2771
+	ldr	r3, [r8]
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L2770
+.L2780:
 	.align	2
-	.set	.LANCHOR194,. + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
-	.space	4
-	.section	.bss.gFlashToggleModeEn,"aw",%nobits
-	.set	.LANCHOR29,. + 0
-	.type	gFlashToggleModeEn, %object
-	.size	gFlashToggleModeEn, 1
-gFlashToggleModeEn:
-	.space	1
-	.section	.bss.gL2pMapInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR124,. + 0
-	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 44
-gL2pMapInfo:
-	.space	44
-	.section	.bss.gMasterInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR34,. + 0
-	.type	gMasterInfo, %object
-	.size	gMasterInfo, 32
-gMasterInfo:
-	.space	32
-	.section	.bss.gMasterTempBuf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR153,. + 0
-	.type	gMasterTempBuf, %object
-	.size	gMasterTempBuf, 4
-gMasterTempBuf:
-	.space	4
-	.section	.bss.gMultiPageProgEn,"aw",%nobits
-	.set	.LANCHOR27,. + 0
-	.type	gMultiPageProgEn, %object
-	.size	gMultiPageProgEn, 1
-gMultiPageProgEn:
-	.space	1
-	.section	.bss.gMultiPageReadEn,"aw",%nobits
-	.set	.LANCHOR198,. + 0
-	.type	gMultiPageReadEn, %object
-	.size	gMultiPageReadEn, 1
-gMultiPageReadEn:
-	.space	1
-	.section	.bss.gNandChipMap,"aw",%nobits
-	.align	2
-	.set	.LANCHOR6,. + 0
-	.type	gNandChipMap, %object
-	.size	gNandChipMap, 32
-gNandChipMap:
-	.space	32
-	.section	.bss.gNandFlashEccBits,"aw",%nobits
-	.set	.LANCHOR32,. + 0
-	.type	gNandFlashEccBits, %object
-	.size	gNandFlashEccBits, 1
-gNandFlashEccBits:
-	.space	1
-	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-	.set	.LANCHOR149,. + 0
-	.type	gNandFlashIDBEccBits, %object
-	.size	gNandFlashIDBEccBits, 1
-gNandFlashIDBEccBits:
-	.space	1
-	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+.L2779:
+	.word	.LANCHOR77
+	.word	.LANCHOR67
+	.word	.LANCHOR195
+	.word	.LANCHOR39
+	.word	.LANCHOR131
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR56
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR40
+	.word	.LANCHOR38
+	.word	.LANCHOR74
+	.word	.LANCHOR73
+	.word	.LANCHOR42
+	.word	.LANCHOR223
+	.word	.LANCHOR28
+	.word	.LANCHOR8
+	.word	.LANCHOR49
+	.word	.LANCHOR222
+	.word	.LANCHOR53
+	.word	.LANCHOR92
+	.word	.LANCHOR69
+	.word	.LANCHOR101
+	.word	.LANCHOR204
+	.word	.LANCHOR0
+	.word	.LANCHOR66
+	.word	.LANCHOR93
+	.word	168778952
+	.word	.LANCHOR41
+	.word	.LANCHOR84
+.L2771:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2781
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2781+4
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r6]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2750
+	ldr	r3, .L2781+8
+	movs	r2, #1
+	str	r2, [r3]
+.L2750:
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2782:
 	.align	2
-	.set	.LANCHOR146,. + 0
-	.type	gNandFlashIdbBlockAddr, %object
-	.size	gNandFlashIdbBlockAddr, 4
-gNandFlashIdbBlockAddr:
-	.space	4
-	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+.L2781:
+	.word	.LANCHOR94
+	.word	.LANCHOR209
+	.word	.LANCHOR231
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r4, .L2786
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L2784
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2785
+.L2784:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	movs	r5, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L2786
+	strb	r5, [r4, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L2786+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2786+8
+	strh	r5, [r3]	@ movhi
+	bl	l2p_flush
+	mov	r0, r5
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2785:
+	ldr	r0, .L2786
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L2787:
 	.align	2
-	.set	.LANCHOR145,. + 0
-	.type	gNandFlashInfoBlockAddr, %object
-	.size	gNandFlashInfoBlockAddr, 4
-gNandFlashInfoBlockAddr:
-	.space	4
-	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
-	.type	gNandFlashInfoBlockEcc, %object
-	.size	gNandFlashInfoBlockEcc, 1
-gNandFlashInfoBlockEcc:
-	.space	1
-	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
+.L2786:
+	.word	.LANCHOR94
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L2803
+	ldr	r3, [r3]
+	cbz	r3, .L2789
+.L2792:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2789:
+	ldr	r3, .L2803+4
+	ldr	r5, .L2803+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2791
+	ldr	r3, [r5]
+	lsls	r2, r3, #31
+	bpl	.L2791
+	ldr	r3, .L2803+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2792
+.L2791:
+	ldr	r4, .L2803+16
+	movs	r3, #0
+	movs	r6, #0
+	movs	r7, #36
+	mov	r2, r3
+	ldr	r1, [r5]
+	ldr	r0, [r4]
+	bl	FlashProgPages
+.L2793:
+	ldr	r1, [r5]
+	uxth	r3, r6
+	cmp	r3, r1
+	bcc	.L2795
+	ldr	r0, [r4]
+	bl	FtlGcBufFree
+	movs	r3, #0
+	str	r3, [r5]
+	ldr	r3, .L2803+12
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2792
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+	b	.L2802
+.L2795:
+	muls	r3, r7, r3
+	ldr	r2, [r4]
+	adds	r6, r6, #1
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L2794
+	ldr	r3, .L2803+12
+	movs	r5, #0
+	ldr	r0, .L2803+20
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2803+24
+	ldr	r0, [r1, #4]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2802:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2794:
+	ldr	r3, [r1, #12]
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2793
+.L2804:
 	.align	2
-	.type	gNandFlashResEndPageAddr, %object
-	.size	gNandFlashResEndPageAddr, 4
-gNandFlashResEndPageAddr:
-	.space	4
-	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
-	.set	.LANCHOR2,. + 0
-	.type	gNandIDBResBlkNum, %object
-	.size	gNandIDBResBlkNum, 1
-gNandIDBResBlkNum:
-	.space	1
-	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-	.set	.LANCHOR147,. + 0
-	.type	gNandIDBResBlkNumSaveInFlash, %object
-	.size	gNandIDBResBlkNumSaveInFlash, 1
-gNandIDBResBlkNumSaveInFlash:
-	.space	1
-	.section	.bss.gNandIDataBuf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR138,. + 0
-	.type	gNandIDataBuf, %object
-	.size	gNandIDataBuf, 2048
-gNandIDataBuf:
-	.space	2048
-	.section	.bss.gNandMaxChip,"aw",%nobits
-	.set	.LANCHOR118,. + 0
-	.type	gNandMaxChip, %object
-	.size	gNandMaxChip, 1
-gNandMaxChip:
-	.space	1
-	.section	.bss.gNandMaxDie,"aw",%nobits
-	.set	.LANCHOR25,. + 0
-	.type	gNandMaxDie, %object
-	.size	gNandMaxDie, 1
-gNandMaxDie:
-	.space	1
-	.section	.bss.gNandOptPara,"aw",%nobits
-	.set	.LANCHOR7,. + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.space	32
-	.section	.bss.gNandPhyInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR15,. + 0
-	.type	gNandPhyInfo, %object
-	.size	gNandPhyInfo, 28
-gNandPhyInfo:
-	.space	28
-	.section	.bss.gNandRandomizer,"aw",%nobits
-	.set	.LANCHOR5,. + 0
-	.type	gNandRandomizer, %object
-	.size	gNandRandomizer, 1
-gNandRandomizer:
-	.space	1
-	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR35,. + 0
-	.type	gNandcDumpWriteEn, %object
-	.size	gNandcDumpWriteEn, 4
-gNandcDumpWriteEn:
-	.space	4
-	.section	.bss.gNandcEccBits,"aw",%nobits
-	.align	2
-	.set	.LANCHOR31,. + 0
-	.type	gNandcEccBits, %object
-	.size	gNandcEccBits, 4
-gNandcEccBits:
-	.space	4
-	.section	.bss.gNandcVer,"aw",%nobits
-	.align	2
-	.set	.LANCHOR33,. + 0
-	.type	gNandcVer, %object
-	.size	gNandcVer, 4
-gNandcVer:
-	.space	4
-	.section	.bss.gReadRetryInfo,"aw",%nobits
-	.set	.LANCHOR20,. + 0
-	.type	gReadRetryInfo, %object
-	.size	gReadRetryInfo, 852
-gReadRetryInfo:
-	.space	852
-	.section	.bss.gSysFreeQueue,"aw",%nobits
-	.align	1
-	.set	.LANCHOR75,. + 0
-	.type	gSysFreeQueue, %object
-	.size	gSysFreeQueue, 2056
-gSysFreeQueue:
-	.space	2056
-	.section	.bss.gSysInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR206,. + 0
-	.type	gSysInfo, %object
-	.size	gSysInfo, 12
-gSysInfo:
-	.space	12
-	.section	.bss.gToggleModeClkDiv,"aw",%nobits
-	.align	2
-	.type	gToggleModeClkDiv, %object
-	.size	gToggleModeClkDiv, 4
-gToggleModeClkDiv:
-	.space	4
-	.section	.bss.gTotleBlock,"aw",%nobits
-	.align	1
-	.set	.LANCHOR119,. + 0
-	.type	gTotleBlock, %object
-	.size	gTotleBlock, 2
-gTotleBlock:
-	.space	2
-	.section	.bss.gVendorBlkInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR215,. + 0
-	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 44
-gVendorBlkInfo:
-	.space	44
-	.section	.bss.g_GlobalDataVersion,"aw",%nobits
-	.align	2
-	.set	.LANCHOR157,. + 0
-	.type	g_GlobalDataVersion, %object
-	.size	g_GlobalDataVersion, 4
-g_GlobalDataVersion:
-	.space	4
-	.section	.bss.g_GlobalSysVersion,"aw",%nobits
-	.align	2
-	.set	.LANCHOR156,. + 0
-	.type	g_GlobalSysVersion, %object
-	.size	g_GlobalSysVersion, 4
-g_GlobalSysVersion:
-	.space	4
-	.section	.bss.g_LowFormat,"aw",%nobits
-	.align	2
-	.set	.LANCHOR239,. + 0
-	.type	g_LowFormat, %object
-	.size	g_LowFormat, 4
-g_LowFormat:
-	.space	4
-	.section	.bss.g_MaxLbaSector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR68,. + 0
-	.type	g_MaxLbaSector, %object
-	.size	g_MaxLbaSector, 4
-g_MaxLbaSector:
-	.space	4
-	.section	.bss.g_MaxLbn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR226,. + 0
-	.type	g_MaxLbn, %object
-	.size	g_MaxLbn, 4
-g_MaxLbn:
-	.space	4
-	.section	.bss.g_MaxLpn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR72,. + 0
-	.type	g_MaxLpn, %object
-	.size	g_MaxLpn, 4
-g_MaxLpn:
-	.space	4
-	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR154,. + 0
-	.type	g_SlcPartLbaEndSector, %object
-	.size	g_SlcPartLbaEndSector, 4
-g_SlcPartLbaEndSector:
-	.space	4
-	.section	.bss.g_VaildLpn,"aw",%nobits
-	.align	2
-	.set	.LANCHOR100,. + 0
-	.type	g_VaildLpn, %object
-	.size	g_VaildLpn, 4
-g_VaildLpn:
-	.space	4
-	.section	.bss.g_active_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR91,. + 0
-	.type	g_active_superblock, %object
-	.size	g_active_superblock, 48
-g_active_superblock:
-	.space	48
-	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
-	.align	2
-	.set	.LANCHOR155,. + 0
-	.type	g_all_blk_used_slc_mode, %object
-	.size	g_all_blk_used_slc_mode, 4
-g_all_blk_used_slc_mode:
-	.space	4
-	.section	.bss.g_buffer_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR92,. + 0
-	.type	g_buffer_superblock, %object
-	.size	g_buffer_superblock, 48
-g_buffer_superblock:
-	.space	48
-	.section	.bss.g_cur_erase_blk,"aw",%nobits
-	.align	2
-	.set	.LANCHOR73,. + 0
-	.type	g_cur_erase_blk, %object
-	.size	g_cur_erase_blk, 4
-g_cur_erase_blk:
-	.space	4
-	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
-	.align	1
-	.set	.LANCHOR187,. + 0
-	.type	g_ect_tbl_info_size, %object
-	.size	g_ect_tbl_info_size, 2
-g_ect_tbl_info_size:
-	.space	2
-	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
-	.align	1
-	.set	.LANCHOR218,. + 0
-	.type	g_ect_tbl_power_up_flush, %object
-	.size	g_ect_tbl_power_up_flush, 2
-g_ect_tbl_power_up_flush:
-	.space	2
-	.section	.bss.g_flash_read_only_en,"aw",%nobits
-	.align	2
-	.set	.LANCHOR76,. + 0
-	.type	g_flash_read_only_en, %object
-	.size	g_flash_read_only_en, 4
-g_flash_read_only_en:
-	.space	4
-	.section	.bss.g_free_slc_blk_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR136,. + 0
-	.type	g_free_slc_blk_num, %object
-	.size	g_free_slc_blk_num, 2
-g_free_slc_blk_num:
-	.space	2
-	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR241,. + 0
-	.type	g_ftl_nand_free_count, %object
-	.size	g_ftl_nand_free_count, 4
-g_ftl_nand_free_count:
-	.space	4
-	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
-	.align	1
-	.set	.LANCHOR116,. + 0
-	.type	g_gc_bad_block_gc_index, %object
-	.size	g_gc_bad_block_gc_index, 2
-g_gc_bad_block_gc_index:
-	.space	2
-	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR114,. + 0
-	.type	g_gc_bad_block_temp_num, %object
-	.size	g_gc_bad_block_temp_num, 2
-g_gc_bad_block_temp_num:
-	.space	2
-	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
-	.align	1
-	.set	.LANCHOR115,. + 0
-	.type	g_gc_bad_block_temp_tbl, %object
-	.size	g_gc_bad_block_temp_tbl, 34
-g_gc_bad_block_temp_tbl:
-	.space	34
-	.section	.bss.g_gc_blk_index,"aw",%nobits
+.L2803:
+	.word	.LANCHOR77
+	.word	.LANCHOR8
+	.word	.LANCHOR103
+	.word	.LANCHOR94
+	.word	.LANCHOR181
+	.word	.LANCHOR84
+	.word	.LANCHOR138
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
-	.set	.LANCHOR175,. + 0
-	.type	g_gc_blk_index, %object
-	.size	g_gc_blk_index, 2
-g_gc_blk_index:
-	.space	2
-	.section	.bss.g_gc_blk_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR109,. + 0
-	.type	g_gc_blk_num, %object
-	.size	g_gc_blk_num, 2
-g_gc_blk_num:
-	.space	2
-	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
-	.align	1
-	.set	.LANCHOR237,. + 0
-	.type	g_gc_cur_blk_max_valid_pages, %object
-	.size	g_gc_cur_blk_max_valid_pages, 2
-g_gc_cur_blk_max_valid_pages:
-	.space	2
-	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
-	.align	1
-	.set	.LANCHOR236,. + 0
-	.type	g_gc_cur_blk_valid_pages, %object
-	.size	g_gc_cur_blk_valid_pages, 2
-g_gc_cur_blk_valid_pages:
-	.space	2
-	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
-	.align	1
-	.set	.LANCHOR173,. + 0
-	.type	g_gc_free_blk_threshold, %object
-	.size	g_gc_free_blk_threshold, 2
-g_gc_free_blk_threshold:
-	.space	2
-	.section	.bss.g_gc_head_data_block,"aw",%nobits
-	.align	2
-	.set	.LANCHOR170,. + 0
-	.type	g_gc_head_data_block, %object
-	.size	g_gc_head_data_block, 4
-g_gc_head_data_block:
-	.space	4
-	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR171,. + 0
-	.type	g_gc_head_data_block_count, %object
-	.size	g_gc_head_data_block_count, 4
-g_gc_head_data_block_count:
-	.space	4
-	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
-	.align	1
-	.set	.LANCHOR174,. + 0
-	.type	g_gc_merge_free_blk_threshold, %object
-	.size	g_gc_merge_free_blk_threshold, 2
-g_gc_merge_free_blk_threshold:
-	.space	2
-	.section	.bss.g_gc_next_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR112,. + 0
-	.type	g_gc_next_blk, %object
-	.size	g_gc_next_blk, 2
-g_gc_next_blk:
-	.space	2
-	.section	.bss.g_gc_next_blk_1,"aw",%nobits
-	.align	1
-	.set	.LANCHOR113,. + 0
-	.type	g_gc_next_blk_1, %object
-	.size	g_gc_next_blk_1, 2
-g_gc_next_blk_1:
-	.space	2
-	.section	.bss.g_gc_num_req,"aw",%nobits
+	.global	rk_ftl_garbage_collect
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2895
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	ldr	r2, [r3]
+	cmp	r2, #0
+	bne	.L2857
+	ldr	r3, .L2895+4
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2857
+	ldr	r2, .L2895+8
+	ldrh	r2, [r2]
+	cmp	r2, #47
+	bls	.L2859
+	ldr	r5, .L2895+12
+	movw	r2, #65535
+	ldrh	ip, [r5]
+	cmp	ip, r2
+	beq	.L2807
+	ldr	r7, .L2895+16
+	ldrh	r3, [r7]
+	cmp	r3, r2
+	bne	.L2807
+	ldr	r1, .L2895+20
+	ldrh	r6, [r1]
+	cmp	r6, r3
+	beq	.L2807
+	ldr	r2, .L2895+24
+	ldrh	r4, [r2]
+	cmp	r4, r3
+	itttt	ne
+	strhne	ip, [r7]	@ movhi
+	strhne	r6, [r5]	@ movhi
+	strhne	r4, [r1]	@ movhi
+	strhne	r3, [r2]	@ movhi
+.L2807:
+	cmp	r0, #0
+	bne	.L2860
+	ldr	r3, .L2895+28
+	ldrh	r3, [r3]
+	cmp	r3, #24
+	bhi	.L2861
+	ldr	r2, .L2895+32
+	cmp	r3, #16
+	ldrh	r4, [r2]
+	bls	.L2810
+	lsrs	r4, r4, #5
+.L2809:
+	ldr	r2, .L2895+36
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L2813
+	ldr	r3, .L2895+40
+	movw	r0, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2814
+	ldr	r0, .L2895+16
+	ldrh	r0, [r0]
+	cmp	r0, r3
+	bne	.L2814
+	ldr	r3, .L2895+44
+	ldrh	r0, [r3]
+	cbnz	r0, .L2815
+	ldr	r3, .L2895+48
+	ldr	r4, .L2895+52
+	ldr	r3, [r3]
+	ldr	r4, [r4]
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcs	.L2816
+.L2815:
+	ldr	r3, .L2895+56
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2817:
+	ldr	r3, .L2895+60
+	movs	r2, #0
+	str	r2, [r3]
+.L2805:
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2810:
+	cmp	r3, #12
+	bls	.L2811
+	lsrs	r4, r4, #4
+	b	.L2809
+.L2811:
+	cmp	r3, #8
+	bls	.L2809
+	lsrs	r4, r4, #2
+	b	.L2809
+.L2861:
+	movs	r4, #1
+	b	.L2809
+.L2816:
+	movs	r3, #18
+	strh	r3, [r2]	@ movhi
+	b	.L2817
+.L2814:
+	ldr	r3, .L2895+56
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2813:
+	ldr	r3, .L2895+64
+	ldrh	r3, [r3]
+	cbz	r3, .L2808
+	adds	r4, r4, #32
+	uxth	r4, r4
+.L2808:
+	ldr	r5, .L2895+68
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L2820
+	ldr	r3, .L2895+16
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2821
+	ldr	r0, .L2895+72
+	ldr	r0, [r0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L2822
+	strh	r2, [r3]	@ movhi
+.L2822:
+	ldrh	r2, [r3]
+	strh	r2, [r5]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L2821:
+	ldrh	r0, [r5]
+	movw	r6, #65535
+	movs	r3, #0
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L2820
+	bl	IsBlkInGcList
+	cbz	r0, .L2824
+	strh	r6, [r5]	@ movhi
+.L2824:
+	ldr	r3, .L2895+76
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2825
+	ldrh	r0, [r5]
+	bl	ftl_get_blk_mode
+	strb	r0, [r5, #8]
+.L2825:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2820
+	ldr	r0, .L2895+68
+	bl	make_superblock
+	ldr	r2, .L2895+80
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L2895+72
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L2895+84
+	strh	r2, [r3]	@ movhi
+.L2820:
+	ldr	r2, .L2895+88
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2826
+	ldr	r2, .L2895+92
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2826
+	ldr	r5, .L2895+68
+	mov	r6, r5
+.L2827:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2828
+	ldr	r10, .L2895+100
+	movs	r2, #0
+	ldr	r3, .L2895+60
+	mov	r7, r10
+	str	r2, [r3]
+.L2829:
+	ldrh	r8, [r10]
+	mov	r0, r8
+	bl	List_get_gc_head_node
+	uxth	fp, r0
+	movw	r3, #65535
+	cmp	fp, r3
+	strh	fp, [r6]	@ movhi
+	bne	.L2830
+	movs	r3, #0
+	movs	r0, #8
+	strh	r3, [r10]	@ movhi
+	b	.L2805
+.L2860:
+	movs	r4, #1
+	b	.L2808
+.L2826:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L2893:
+	ldr	r3, .L2895+44
+	ldrh	r0, [r3]
+	b	.L2805
+.L2830:
+	str	r0, [sp, #8]
+	mov	r0, fp
+	bl	IsBlkInGcList
+	add	r3, r8, #1
+	ldr	r2, [sp, #8]
+	cbz	r0, .L2831
+	strh	r3, [r10]	@ movhi
+	b	.L2829
+.L2831:
+	ldr	r1, .L2895+32
+	uxth	r3, r3
+	ldr	lr, .L2895+104
+	uxth	r2, r2
+	ldr	r8, .L2895+72
+	ldrh	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r0, [r8]
+	strh	r3, [r10]	@ movhi
+	mul	r1, lr, r1
+	ldrh	ip, [r0, r2, lsl #1]
+	cmp	ip, r1, asr #1
+	bgt	.L2833
+	cmp	r3, #48
+	bls	.L2834
+	cmp	ip, #8
+	bls	.L2834
+	ldr	r3, .L2895+96
+	ldrh	r3, [r3]
+	cmp	r3, #35
+	bhi	.L2834
+.L2833:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L2834:
+	ldrh	r3, [r0, r2, lsl #1]
+	cmp	r1, r3
+	bgt	.L2835
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L2893
+.L2835:
+	cmp	r3, #0
+	bne	.L2836
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2829
+.L2896:
 	.align	2
-	.set	.LANCHOR102,. + 0
-	.type	g_gc_num_req, %object
-	.size	g_gc_num_req, 4
-g_gc_num_req:
-	.space	4
-	.section	.bss.g_gc_page_offset,"aw",%nobits
-	.align	1
-	.set	.LANCHOR111,. + 0
-	.type	g_gc_page_offset, %object
-	.size	g_gc_page_offset, 2
-g_gc_page_offset:
-	.space	2
-	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
-	.align	1
-	.set	.LANCHOR176,. + 0
-	.type	g_gc_refresh_block_temp_num, %object
-	.size	g_gc_refresh_block_temp_num, 2
-g_gc_refresh_block_temp_num:
-	.space	2
-	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
-	.align	1
-	.type	g_gc_refresh_block_temp_tbl, %object
-	.size	g_gc_refresh_block_temp_tbl, 34
-g_gc_refresh_block_temp_tbl:
-	.space	34
-	.section	.bss.g_gc_skip_write_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR172,. + 0
-	.type	g_gc_skip_write_count, %object
-	.size	g_gc_skip_write_count, 4
-g_gc_skip_write_count:
-	.space	4
-	.section	.bss.g_gc_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR201,. + 0
-	.type	g_gc_superblock, %object
-	.size	g_gc_superblock, 48
-g_gc_superblock:
-	.space	48
-	.section	.bss.g_gc_temp_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR93,. + 0
-	.type	g_gc_temp_superblock, %object
-	.size	g_gc_temp_superblock, 48
-g_gc_temp_superblock:
-	.space	48
-	.section	.bss.g_in_gc_progress,"aw",%nobits
+.L2895:
+	.word	.LANCHOR77
+	.word	.LANCHOR171
+	.word	.LANCHOR86
+	.word	.LANCHOR114
+	.word	.LANCHOR113
+	.word	.LANCHOR115
+	.word	.LANCHOR116
+	.word	.LANCHOR89
+	.word	.LANCHOR53
+	.word	.LANCHOR176
+	.word	.LANCHOR94
+	.word	.LANCHOR240
+	.word	.LANCHOR73
+	.word	.LANCHOR101
+	.word	.LANCHOR223
+	.word	.LANCHOR172
+	.word	.LANCHOR117
+	.word	.LANCHOR204
+	.word	.LANCHOR84
+	.word	.LANCHOR8
+	.word	.LANCHOR241
+	.word	.LANCHOR242
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR110
+	.word	.LANCHOR178
+	.word	.LANCHOR38
+.L2836:
+	movs	r3, #0
+	strb	r3, [r6, #8]
+	ldr	r3, .L2897
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2837
+	mov	r0, fp
+	bl	ftl_get_blk_mode
+	strb	r0, [r6, #8]
+.L2837:
+	ldr	r3, .L2897+4
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2838
+	ldr	r1, .L2897+8
+	movw	r2, #851
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2838:
+	ldr	r3, .L2897+24
+	ldrh	r2, [r6]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2839
+	ldr	r1, .L2897+8
+	mov	r2, #852
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2839:
+	ldr	r3, .L2897+28
+	ldrh	r2, [r6]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2840
+	ldr	r1, .L2897+8
+	movw	r2, #853
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2840:
+	mov	r0, r5
+	bl	make_superblock
+	ldr	r2, .L2897+32
+	movs	r3, #0
+	ldrh	r1, [r6]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r8]
+	ldrh	r1, [r2, r1, lsl #1]
+	ldr	r2, .L2897+36
+	strh	r3, [r6, #2]	@ movhi
+	strb	r3, [r6, #6]
+	strh	r1, [r2]	@ movhi
+.L2828:
+	ldr	r3, .L2897+40
+	movs	r2, #1
+	str	r2, [r3]
+	ldr	r3, .L2897+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2897
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2841
+	ldrb	r3, [r6, #8]	@ zero_extendqisi2
+	cmp	r3, r2
+	ittt	eq
+	ldreq	r3, .L2897+48
+	ldrheq	r3, [r3]
+	streq	r3, [sp, #12]
+.L2841:
+	ldrh	r3, [r6, #2]
+	ldr	r1, [sp, #12]
+	ldr	fp, .L2897+84
+	adds	r2, r3, r4
+	cmp	r2, r1
+	itt	gt
+	movgt	r2, r1
+	subgt	r4, r2, r3
+	mov	r3, #0
+	it	gt
+	uxthgt	r4, r4
+	str	r3, [sp, #20]
+.L2843:
+	ldrh	r3, [sp, #20]
+	cmp	r4, r3
+	bls	.L2851
+	ldr	r3, .L2897+52
+	movw	r8, #65535
+	ldrh	lr, [r5, #2]
+	mov	r10, #36
+	ldr	r0, [fp]
+	ldrh	r7, [r3]
+	ldr	r3, [sp, #20]
+	add	lr, lr, r3
+	ldr	r3, .L2897+56
+	str	r3, [sp, #16]
+	movs	r3, #0
+	str	r3, [sp, #8]
+	b	.L2852
+.L2845:
+	ldr	r1, [sp, #16]
+	ldrh	r2, [r1, #2]!
+	cmp	r2, r8
+	str	r1, [sp, #16]
+	beq	.L2844
+	ldr	r1, [sp, #8]
+	orr	r2, lr, r2, lsl #10
+	mla	ip, r10, r1, r0
+	str	r2, [ip, #4]
+	mov	r2, r1
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #8]
+.L2844:
+	adds	r3, r3, #1
+.L2852:
+	uxth	r2, r3
+	cmp	r2, r7
+	bcc	.L2845
+	ldrb	r2, [r5, #8]	@ zero_extendqisi2
+	ldr	r1, [sp, #8]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2892:
+	str	r3, [sp, #16]
+	ldr	r2, [sp, #8]
+	ldrh	r3, [sp, #16]
+	cmp	r2, r3
+	bhi	.L2850
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	str	r3, [sp, #20]
+	b	.L2843
+.L2850:
+	ldr	r3, [sp, #16]
+	movs	r7, #36
+	muls	r7, r3, r7
+	ldr	r3, [fp]
+	adds	r2, r3, r7
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	beq	.L2847
+	ldr	r8, [r2, #12]
+	movw	r3, #61589
+	ldrh	r2, [r8]
+	cmp	r2, r3
+	bne	.L2847
+	ldr	r10, [r8, #8]
+	cmp	r10, #-1
+	bne	.L2848
+	ldr	r1, .L2897+8
+	mov	r2, #892
+	ldr	r0, .L2897+12
+	bl	printf
+	ldr	r1, .L2897+16
+	ldr	r0, .L2897+20
+	bl	printf
+.L2848:
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r10
+	bl	log2phys
+	ldr	r0, [fp]
+	ldr	r3, [sp, #36]
+	add	r0, r0, r7
+	ldr	r2, [r0, #4]
+	bic	r3, r3, #-2147483648
+	cmp	r3, r2
+	bne	.L2847
+	ldr	r2, .L2897+32
+	ldr	r1, .L2897+60
+	ldr	r10, .L2897+68
+	ldrh	r3, [r2]
+	str	r1, [sp, #28]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r0, #16]
+	str	r2, [r3, #16]
+	str	r3, [sp, #24]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r3, [sp, #24]
+	ldr	r1, [sp, #28]
+	str	r0, [r3, #4]
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	ldr	r0, [fp]
+	mla	r2, r1, r3, r2
+	add	r0, r0, r7
+	ldr	r7, .L2897+28
+	ldr	r1, [r0, #8]
+	adds	r3, r3, #1
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #36]
+	str	r2, [r8, #12]
+	ldrh	r2, [r7]
+	strh	r2, [r8, #2]	@ movhi
+	ldr	r2, .L2897+64
+	str	r3, [r10]
+	ldr	r2, [r2]
+	str	r2, [r8, #4]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L2897
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2849
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	cmp	r2, r3
+	beq	.L2849
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L2847
+.L2849:
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L2847
+.L2894:
+	ldr	r3, .L2897+40
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L2893
+.L2847:
+	ldr	r3, [sp, #16]
+	adds	r3, r3, #1
+	b	.L2892
+.L2851:
+	ldrh	r3, [r5, #2]
+	add	r4, r4, r3
+	ldr	r3, [sp, #12]
+	uxth	r4, r4
+	cmp	r3, r4
+	strh	r4, [r5, #2]	@ movhi
+	bhi	.L2853
+	ldr	r3, .L2897+68
+	ldr	r3, [r3]
+	cbz	r3, .L2854
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	bne	.L2894
+.L2854:
+	ldr	r3, .L2897+32
+	ldrh	r4, [r3]
+	cbnz	r4, .L2855
+	ldr	r7, .L2897+72
+	ldrh	r1, [r5]
+	ldr	r3, [r7]
+	ldrh	r3, [r3, r1, lsl #1]
+	cbz	r3, .L2855
+	ldr	r0, .L2897+36
+	ldrh	r2, [r5, #2]
+	ldrh	r0, [r0]
+	str	r3, [sp]
+	mov	r3, r4
+	str	r0, [sp, #4]
+	ldr	r0, .L2897+76
+	bl	printf
+	ldrh	r2, [r5]
+	ldr	r3, [r7]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2855:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L2853:
+	ldr	r3, .L2897+80
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L2856
+	ldr	r3, .L2897+44
+	ldrh	r4, [r3]
+	b	.L2827
+.L2856:
+	ldr	r3, .L2897+40
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3]
+	b	.L2805
+.L2898:
 	.align	2
-	.set	.LANCHOR168,. + 0
-	.type	g_in_gc_progress, %object
-	.size	g_in_gc_progress, 4
-g_in_gc_progress:
-	.space	4
-	.section	.bss.g_in_swl_replace,"aw",%nobits
-	.align	2
-	.set	.LANCHOR169,. + 0
-	.type	g_in_swl_replace, %object
-	.size	g_in_swl_replace, 4
-g_in_swl_replace:
-	.space	4
-	.section	.bss.g_inkDie_check_enable,"aw",%nobits
-	.align	2
-	.set	.LANCHOR28,. + 0
-	.type	g_inkDie_check_enable, %object
-	.size	g_inkDie_check_enable, 4
-g_inkDie_check_enable:
-	.space	4
-	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+.L2897:
+	.word	.LANCHOR8
+	.word	.LANCHOR92
+	.word	.LANCHOR243
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR241
+	.word	.LANCHOR242
+	.word	.LANCHOR171
+	.word	.LANCHOR53
+	.word	.LANCHOR54
+	.word	.LANCHOR38
+	.word	.LANCHOR204+14
+	.word	.LANCHOR181
+	.word	.LANCHOR160
+	.word	.LANCHOR103
+	.word	.LANCHOR84
+	.word	.LC66
+	.word	.LANCHOR89
+	.word	.LANCHOR107
+.L2857:
+	movs	r0, #0
+	b	.L2805
+.L2859:
+	mov	r0, r3
+	b	.L2805
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.FtlInit,"ax",%progbits
 	.align	1
-	.set	.LANCHOR97,. + 0
-	.type	g_l2p_last_update_region_id, %object
-	.size	g_l2p_last_update_region_id, 2
-g_l2p_last_update_region_id:
-	.space	2
-	.section	.bss.g_maxRegNum,"aw",%nobits
-	.set	.LANCHOR13,. + 0
-	.type	g_maxRegNum, %object
-	.size	g_maxRegNum, 1
-g_maxRegNum:
-	.space	1
-	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR148,. + 0
-	.type	g_maxRetryCount, %object
-	.size	g_maxRetryCount, 1
-g_maxRetryCount:
-	.space	1
-	.section	.bss.g_max_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR166,. + 0
-	.type	g_max_erase_count, %object
-	.size	g_max_erase_count, 4
-g_max_erase_count:
-	.space	4
-	.section	.bss.g_min_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR167,. + 0
-	.type	g_min_erase_count, %object
-	.size	g_min_erase_count, 4
-g_min_erase_count:
-	.space	4
-	.section	.bss.g_nandc_version_data,"aw",%nobits
+	.global	FtlInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r3, #-1
+	ldr	r4, .L2908
+	mov	r5, r0
+	ldr	r2, .L2908+4
+	str	r3, [r4]
+	movs	r3, #0
+	ldr	r1, .L2908+8
+	str	r3, [r2]
+	ldr	r2, .L2908+12
+	ldr	r0, .L2908+16
+	str	r3, [r2]
+	bl	printf
+	mov	r0, r5
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L2908+20
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2900
+	ldr	r1, .L2908+24
+	ldr	r0, .L2908+28
+.L2907:
+	bl	printf
+.L2901:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2900:
+	bl	FtlSysBlkInit
+	cbz	r0, .L2902
+	ldr	r1, .L2908+24
+	ldr	r0, .L2908+32
+	b	.L2907
+.L2902:
+	movs	r1, #1
+	str	r1, [r4]
+	bl	rk_ftl_garbage_collect
+	ldr	r3, .L2908+36
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L2901
+	mov	r4, #1024
+.L2904:
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L2904
+	b	.L2901
+.L2909:
 	.align	2
-	.set	.LANCHOR151,. + 0
-	.type	g_nandc_version_data, %object
-	.size	g_nandc_version_data, 4
-g_nandc_version_data:
-	.space	4
-	.section	.bss.g_num_data_superblocks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR85,. + 0
-	.type	g_num_data_superblocks, %object
-	.size	g_num_data_superblocks, 2
-g_num_data_superblocks:
-	.space	2
-	.section	.bss.g_num_free_superblocks,"aw",%nobits
-	.align	1
-	.set	.LANCHOR88,. + 0
-	.type	g_num_free_superblocks, %object
-	.size	g_num_free_superblocks, 2
-g_num_free_superblocks:
-	.space	2
-	.section	.bss.g_page_map_check_enable,"aw",%nobits
-	.align	1
-	.set	.LANCHOR69,. + 0
-	.type	g_page_map_check_enable, %object
-	.size	g_page_map_check_enable, 2
-g_page_map_check_enable:
-	.space	2
-	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
-	.align	1
-	.set	.LANCHOR229,. + 0
-	.type	g_power_lost_ecc_error_blk, %object
-	.size	g_power_lost_ecc_error_blk, 2
-g_power_lost_ecc_error_blk:
-	.space	2
-	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+.L2908:
+	.word	.LANCHOR231
+	.word	.LANCHOR244
+	.word	.LC67
+	.word	.LANCHOR77
+	.word	.LC7
+	.word	.LANCHOR39
+	.word	.LANCHOR245
+	.word	.LC68
+	.word	.LC69
+	.word	.LANCHOR89
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
-	.set	.LANCHOR230,. + 0
-	.type	g_power_lost_recovery_flag, %object
-	.size	g_power_lost_recovery_flag, 2
-g_power_lost_recovery_flag:
-	.space	2
-	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
-	.align	2
-	.set	.LANCHOR133,. + 0
-	.type	g_recovery_page_min_ver, %object
-	.size	g_recovery_page_min_ver, 4
-g_recovery_page_min_ver:
-	.space	4
-	.section	.bss.g_recovery_page_num,"aw",%nobits
-	.align	2
-	.set	.LANCHOR231,. + 0
-	.type	g_recovery_page_num, %object
-	.size	g_recovery_page_num, 4
-g_recovery_page_num:
-	.space	4
-	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR232,. + 0
-	.type	g_recovery_ppa_tbl, %object
-	.size	g_recovery_ppa_tbl, 128
-g_recovery_ppa_tbl:
-	.space	128
-	.section	.bss.g_req_cache,"aw",%nobits
-	.align	2
-	.set	.LANCHOR129,. + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
-	.space	4
-	.section	.bss.g_retryMode,"aw",%nobits
-	.set	.LANCHOR10,. + 0
-	.type	g_retryMode, %object
-	.size	g_retryMode, 1
-g_retryMode:
-	.space	1
-	.section	.bss.g_slc2KBNand,"aw",%nobits
-	.set	.LANCHOR1,. + 0
-	.type	g_slc2KBNand, %object
-	.size	g_slc2KBNand, 1
-g_slc2KBNand:
-	.space	1
-	.section	.bss.g_sys_ext_data,"aw",%nobits
-	.align	2
-	.set	.LANCHOR135,. + 0
-	.type	g_sys_ext_data, %object
-	.size	g_sys_ext_data, 512
-g_sys_ext_data:
-	.space	512
-	.section	.bss.g_sys_save_data,"aw",%nobits
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	FlashInit
+	mov	r4, r0
+	cbnz	r0, .L2911
+	ldr	r0, .L2912
+	bl	FtlInit
+.L2911:
+	bl	idb_init
+	mov	r1, r4
+	ldr	r0, .L2912+4
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2913:
 	.align	2
-	.set	.LANCHOR80,. + 0
-	.type	g_sys_save_data, %object
-	.size	g_sys_save_data, 48
-g_sys_save_data:
-	.space	48
-	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+.L2912:
+	.word	.LANCHOR15
+	.word	.LC70
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
-	.set	.LANCHOR130,. + 0
-	.type	g_tmp_data_superblock_id, %object
-	.size	g_tmp_data_superblock_id, 2
-g_tmp_data_superblock_id:
-	.space	2
-	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR202,. + 0
-	.type	g_totle_avg_erase_count, %object
-	.size	g_totle_avg_erase_count, 4
-g_totle_avg_erase_count:
-	.space	4
-	.section	.bss.g_totle_cache_write_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR161,. + 0
-	.type	g_totle_cache_write_count, %object
-	.size	g_totle_cache_write_count, 4
-g_totle_cache_write_count:
-	.space	4
-	.section	.bss.g_totle_discard_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR160,. + 0
-	.type	g_totle_discard_page_count, %object
-	.size	g_totle_discard_page_count, 4
-g_totle_discard_page_count:
-	.space	4
-	.section	.bss.g_totle_gc_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR158,. + 0
-	.type	g_totle_gc_page_count, %object
-	.size	g_totle_gc_page_count, 4
-g_totle_gc_page_count:
-	.space	4
-	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR162,. + 0
-	.type	g_totle_l2p_write_count, %object
-	.size	g_totle_l2p_write_count, 4
-g_totle_l2p_write_count:
-	.space	4
-	.section	.bss.g_totle_map_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR125,. + 0
-	.type	g_totle_map_block, %object
-	.size	g_totle_map_block, 2
-g_totle_map_block:
-	.space	2
-	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR164,. + 0
-	.type	g_totle_mlc_erase_count, %object
-	.size	g_totle_mlc_erase_count, 4
-g_totle_mlc_erase_count:
-	.space	4
-	.section	.bss.g_totle_read_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR163,. + 0
-	.type	g_totle_read_page_count, %object
-	.size	g_totle_read_page_count, 4
-g_totle_read_page_count:
-	.space	4
-	.section	.bss.g_totle_read_sector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR217,. + 0
-	.type	g_totle_read_sector, %object
-	.size	g_totle_read_sector, 4
-g_totle_read_sector:
-	.space	4
-	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR165,. + 0
-	.type	g_totle_slc_erase_count, %object
-	.size	g_totle_slc_erase_count, 4
-g_totle_slc_erase_count:
-	.space	4
-	.section	.bss.g_totle_swl_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR131,. + 0
-	.type	g_totle_swl_count, %object
-	.size	g_totle_swl_count, 4
-g_totle_swl_count:
-	.space	4
-	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR79,. + 0
-	.type	g_totle_sys_slc_erase_count, %object
-	.size	g_totle_sys_slc_erase_count, 4
-g_totle_sys_slc_erase_count:
-	.space	4
-	.section	.bss.g_totle_vendor_block,"aw",%nobits
-	.align	1
-	.set	.LANCHOR70,. + 0
-	.type	g_totle_vendor_block, %object
-	.size	g_totle_vendor_block, 2
-g_totle_vendor_block:
-	.space	2
-	.section	.bss.g_totle_write_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR159,. + 0
-	.type	g_totle_write_page_count, %object
-	.size	g_totle_write_page_count, 4
-g_totle_write_page_count:
-	.space	4
-	.section	.bss.g_totle_write_sector,"aw",%nobits
-	.align	2
-	.set	.LANCHOR216,. + 0
-	.type	g_totle_write_sector, %object
-	.size	g_totle_write_sector, 4
-g_totle_write_sector:
-	.space	4
-	.section	.bss.gc_discard_updated,"aw",%nobits
+	.global	ftl_fix_nand_power_lost_error
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2928
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2914
+	ldr	r7, .L2928+4
+	ldr	r6, .L2928+8
+	ldr	r10, .L2928+32
+	ldrh	r5, [r7]
+	ldr	r3, [r6]
+	ldr	r4, .L2928+12
+	mov	r1, r5
+	ldr	r0, .L2928+16
+	ldrh	r2, [r3, r5, lsl #1]
+	lsl	r8, r5, #1
+	bl	printf
+	ldrh	r0, [r10]
+	bl	FtlGcRefreshBlock
+	ldrh	r0, [r4]
+	bl	FtlGcRefreshBlock
+	mov	r0, r10
+	bl	allocate_new_data_superblock
+	mov	r0, r4
+	movw	r4, #4097
+	bl	allocate_new_data_superblock
+	str	r7, [sp, #4]
+.L2916:
+	subs	r4, r4, #1
+	beq	.L2920
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r8]
+	cmp	r3, #0
+	bne	.L2916
+.L2920:
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2928+16
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	ldr	r3, [r6]
+	ldrh	r4, [r3, r5, lsl #1]
+	cbnz	r4, .L2918
+	add	r0, sp, #56
+	ldr	r7, .L2928+20
+	strh	r5, [r0, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	make_superblock
+	ldr	r3, .L2928+24
+	add	r0, sp, #22
+	ldr	r8, [r7]
+	mov	r2, r4
+	mov	fp, #36
+	mov	ip, r4
+	ldrh	lr, [r3]
+.L2921:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2923
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2928+28
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+	mov	r2, r4
+	movs	r1, #1
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+.L2918:
+	ldr	r2, [sp, #4]
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L2914:
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2923:
+	ldrh	r3, [r0, #2]!
+	cmp	r3, r10
+	beq	.L2922
+	mla	r1, fp, r4, r8
+	adds	r4, r4, #1
+	lsls	r3, r3, #10
+	uxth	r4, r4
+	str	r3, [r1, #4]
+	str	ip, [r1, #8]
+	str	ip, [r1, #12]
+.L2922:
+	adds	r2, r2, #1
+	b	.L2921
+.L2929:
 	.align	2
-	.set	.LANCHOR222,. + 0
-	.type	gc_discard_updated, %object
-	.size	gc_discard_updated, 4
-gc_discard_updated:
-	.space	4
-	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+.L2928:
+	.word	.LANCHOR8
+	.word	.LANCHOR235
+	.word	.LANCHOR84
+	.word	.LANCHOR93
+	.word	.LC71
+	.word	.LANCHOR78
+	.word	.LANCHOR38
+	.word	.LC72
+	.word	.LANCHOR92
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.ftl_read,"ax",%progbits
 	.align	1
-	.set	.LANCHOR235,. + 0
-	.type	gc_ink_free_return_value, %object
-	.size	gc_ink_free_return_value, 2
-gc_ink_free_return_value:
-	.space	2
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR143,. + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
-	.section	.bss.gpNandParaInfo,"aw",%nobits
-	.align	2
-	.set	.LANCHOR18,. + 0
-	.type	gpNandParaInfo, %object
-	.size	gpNandParaInfo, 4
-gpNandParaInfo:
-	.space	4
-	.section	.bss.gpNandc,"aw",%nobits
-	.align	2
-	.set	.LANCHOR19,. + 0
-	.type	gpNandc, %object
-	.size	gpNandc, 4
-gpNandc:
-	.space	4
-	.section	.bss.gpNandc1,"aw",%nobits
-	.align	2
-	.type	gpNandc1, %object
-	.size	gpNandc1, 4
-gpNandc1:
-	.space	4
-	.section	.bss.gpReadRetrial,"aw",%nobits
-	.align	2
-	.set	.LANCHOR142,. + 0
-	.type	gpReadRetrial, %object
-	.size	gpReadRetrial, 4
-gpReadRetrial:
-	.space	4
-	.section	.bss.gp_ect_tbl_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR188,. + 0
-	.type	gp_ect_tbl_info, %object
-	.size	gp_ect_tbl_info, 4
-gp_ect_tbl_info:
-	.space	4
-	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR103,. + 0
-	.type	gp_gc_page_buf_info, %object
-	.size	gp_gc_page_buf_info, 4
-gp_gc_page_buf_info:
-	.space	4
-	.section	.bss.gp_last_act_superblock,"aw",%nobits
-	.align	2
-	.set	.LANCHOR221,. + 0
-	.type	gp_last_act_superblock, %object
-	.size	gp_last_act_superblock, 4
-gp_last_act_superblock:
-	.space	4
-	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR117,. + 0
-	.type	mlcPageToSlcPageTbl, %object
-	.size	mlcPageToSlcPageTbl, 1024
-mlcPageToSlcPageTbl:
-	.space	1024
-	.section	.bss.p_blk_mode_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR0,. + 0
-	.type	p_blk_mode_table, %object
-	.size	p_blk_mode_table, 4
-p_blk_mode_table:
-	.space	4
-	.section	.bss.p_data_block_list_head,"aw",%nobits
-	.align	2
-	.set	.LANCHOR82,. + 0
-	.type	p_data_block_list_head, %object
-	.size	p_data_block_list_head, 4
-p_data_block_list_head:
-	.space	4
-	.section	.bss.p_data_block_list_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR81,. + 0
-	.type	p_data_block_list_table, %object
-	.size	p_data_block_list_table, 4
-p_data_block_list_table:
-	.space	4
-	.section	.bss.p_data_block_list_tail,"aw",%nobits
-	.align	2
-	.set	.LANCHOR84,. + 0
-	.type	p_data_block_list_tail, %object
-	.size	p_data_block_list_tail, 4
-p_data_block_list_tail:
-	.space	4
-	.section	.bss.p_erase_count_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR78,. + 0
-	.type	p_erase_count_table, %object
-	.size	p_erase_count_table, 4
-p_erase_count_table:
-	.space	4
-	.section	.bss.p_free_data_block_list_head,"aw",%nobits
-	.align	2
-	.set	.LANCHOR87,. + 0
-	.type	p_free_data_block_list_head, %object
-	.size	p_free_data_block_list_head, 4
-p_free_data_block_list_head:
-	.space	4
-	.section	.bss.p_gc_blk_tbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR108,. + 0
-	.type	p_gc_blk_tbl, %object
-	.size	p_gc_blk_tbl, 4
-p_gc_blk_tbl:
-	.space	4
-	.section	.bss.p_gc_data_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR104,. + 0
-	.type	p_gc_data_buf, %object
-	.size	p_gc_data_buf, 4
-p_gc_data_buf:
-	.space	4
-	.section	.bss.p_gc_page_info,"aw",%nobits
-	.align	2
-	.set	.LANCHOR110,. + 0
-	.type	p_gc_page_info, %object
-	.size	p_gc_page_info, 4
-p_gc_page_info:
-	.space	4
-	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #16
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #88
+	mov	r6, r1
+	mov	r7, r3
+	str	r2, [sp, #52]
+	bne	.L2931
+	mov	r2, r3
+	ldr	r1, [sp, #52]
+	add	r0, r6, #256
+	bl	FtlVendorPartRead
+	str	r0, [sp, #32]
+.L2930:
+	ldr	r0, [sp, #32]
+	add	sp, sp, #88
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2931:
+	ldr	r3, [sp, #52]
+	adds	r3, r1, r3
+	str	r3, [sp, #36]
+	ldr	r3, .L2969
+	ldr	r2, [sp, #36]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2954
+	ldr	r3, .L2969+4
+	ldr	r3, [r3]
+	adds	r4, r3, #1
+	beq	.L2955
+	bl	FtlCacheWriteBack
+	ldr	r3, .L2969+8
+	mov	r0, r6
+	ldr	r10, .L2969+52
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #36]
+	mov	r1, r4
+	str	r0, [sp, #40]
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #40]
+	ldr	r2, .L2969+12
+	ldr	r4, [sp, #40]
+	rsb	r3, r3, #1
+	str	r0, [sp, #44]
+	add	r3, r3, r0
+	str	r3, [sp, #28]
+	ldr	r1, [sp, #28]
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	str	r3, [r2]
+	movs	r3, #0
+	mov	r5, r3
+	str	r3, [sp, #24]
+	str	r3, [sp, #48]
+	str	r3, [sp, #32]
+.L2933:
+	ldr	r3, [sp, #28]
+	cbnz	r3, .L2953
+	ldr	r3, .L2969+16
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2930
+	movs	r1, #1
+	ldr	r0, [sp, #28]
+	bl	rk_ftl_garbage_collect
+	b	.L2930
+.L2953:
+	movs	r2, #0
+	add	r1, sp, #84
+	mov	r0, r4
+	bl	log2phys
+	ldr	r3, [sp, #84]
+	adds	r0, r3, #1
+	bne	.L2934
+	ldr	fp, .L2969+8
+	mov	r8, #0
+.L2935:
+	ldrh	r0, [fp]
+	cmp	r8, r0
+	bcc	.L2937
+.L2938:
+	ldr	r3, [sp, #28]
+	adds	r4, r4, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #28]
+	beq	.L2942
+	ldr	r3, .L2969+20
+	ldrh	r3, [r3]
+	cmp	r5, r3, lsl #2
+	bne	.L2933
+.L2942:
+	cmp	r5, #0
+	beq	.L2933
+	movs	r2, #0
+	mov	r1, r5
+	ldr	r0, [r10]
+	mov	fp, #0
+	bl	FlashReadPages
+	ldr	r3, [sp, #24]
+	lsls	r3, r3, #9
+	str	r3, [sp, #68]
+	ldr	r3, [sp, #56]
+	lsls	r3, r3, #9
+	str	r3, [sp, #60]
+	ldr	r3, [sp, #48]
+	lsls	r3, r3, #9
+	str	r3, [sp, #64]
+.L2952:
+	mov	r8, #36
+	ldr	r3, [r10]
+	mul	r8, r8, fp
+	ldr	r1, [sp, #40]
+	add	r3, r3, r8
+	ldr	r2, [r3, #16]
+	cmp	r1, r2
+	bne	.L2944
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2969+24
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2945
+	ldr	r3, [sp, #60]
+	mov	r0, r7
+	ldr	r2, [sp, #64]
+	add	r1, r1, r3
+.L2968:
+	bl	ftl_memcpy
+.L2945:
+	ldr	r2, [r10]
+	add	r2, r2, r8
+	ldr	r3, [r2, #12]
+	ldr	lr, [r2, #16]
+	ldr	r0, [r3, #8]
+	cmp	lr, r0
+	beq	.L2946
+	ldr	ip, .L2969+32
+	ldr	r0, [ip, #72]
+	adds	r0, r0, #1
+	str	r0, [ip, #72]
+	ldr	r0, [r2, #8]
+	ldr	r1, [r0, #4]
+	str	r1, [sp, #16]
+	mov	r1, lr
+	ldr	r0, [r0]
+	str	r0, [sp, #12]
+	ldr	r0, [r3, #12]
+	str	r0, [sp, #8]
+	ldr	r0, [r3, #8]
+	str	r0, [sp, #4]
+	ldr	r0, [r3, #4]
+	str	r0, [sp]
+	ldr	r0, .L2969+28
+	ldr	r3, [r3]
+	ldr	r2, [r2, #4]
+	bl	printf
+.L2946:
+	ldr	r3, [r10]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	adds	r1, r3, #1
+	bne	.L2947
+	ldr	r1, .L2969+32
+	str	r3, [sp, #32]
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L2948:
+	add	fp, fp, #1
+	cmp	r5, fp
+	bne	.L2952
+	movs	r5, #0
+	b	.L2933
+.L2937:
+	mla	r0, r0, r4, r8
+	cmp	r6, r0
+	bhi	.L2936
+	ldr	r3, [sp, #36]
+	cmp	r3, r0
+	bls	.L2936
+	subs	r0, r0, r6
+	mov	r2, #512
+	movs	r1, #0
+	add	r0, r7, r0, lsl #9
+	bl	ftl_memset
+.L2936:
+	add	r8, r8, #1
+	b	.L2935
+.L2934:
+	ldr	r2, [r10]
+	mov	r8, #36
+	mla	r8, r8, r5, r2
+	str	r3, [r8, #4]
+	ldr	r3, [sp, #40]
+	cmp	r4, r3
+	ldr	r3, .L2969+8
+	bne	.L2939
+	ldr	r2, .L2969+24
+	mov	r0, r6
+	ldrh	fp, [r3]
+	ldr	r2, [r2]
+	mov	r1, fp
+	str	r2, [r8, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #52]
+	sub	r3, fp, r1
+	str	r1, [sp, #56]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	cmp	fp, r3
+	str	r3, [sp, #48]
+	bne	.L2940
+	str	r7, [r8, #8]
+.L2940:
+	ldr	r3, .L2969+36
+	ldr	r2, .L2969+40
+	str	r4, [r8, #16]
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	muls	r3, r5, r3
+	adds	r5, r5, #1
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [r8, #12]
+	b	.L2938
+.L2939:
+	ldr	r2, [sp, #44]
+	cmp	r4, r2
+	bne	.L2941
+	ldr	r2, .L2969+44
+	ldr	r1, [sp, #36]
+	ldr	r2, [r2]
+	str	r2, [r8, #8]
+	ldrh	r2, [r3]
+	mul	r3, r2, r4
+	subs	r1, r1, r3
+	cmp	r2, r1
+	str	r1, [sp, #24]
+	bne	.L2940
+.L2967:
+	subs	r3, r3, r6
+	add	r3, r7, r3, lsl #9
+	str	r3, [r8, #8]
+	b	.L2940
+.L2941:
+	ldrh	r3, [r3]
+	muls	r3, r4, r3
+	b	.L2967
+.L2944:
+	ldr	r1, [sp, #44]
+	cmp	r1, r2
+	bne	.L2945
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2969+44
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2945
+	ldr	r3, .L2969+8
+	ldr	r2, [sp, #68]
+	ldrh	r0, [r3]
+	ldr	r3, [sp, #44]
+	muls	r0, r3, r0
+	subs	r0, r0, r6
+	add	r0, r7, r0, lsl #9
+	b	.L2968
+.L2947:
+	cmp	r3, #256
+	bne	.L2948
+	ldr	r0, [r2, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	mov	r8, r0
+	bl	FtlGcRefreshBlock
+	ldr	r2, .L2969+48
+	movw	r3, #2049
+.L2950:
+	subs	r3, r3, #1
+	bne	.L2949
+.L2951:
+	bl	FtlSysFlush
+	b	.L2948
+.L2949:
+	movs	r1, #1
+	str	r2, [sp, #76]
+	mov	r0, r1
+	str	r3, [sp, #72]
+	bl	rk_ftl_garbage_collect
+	ldr	r2, [sp, #76]
+	ldr	r3, [sp, #72]
+	ldrh	r1, [r2]
+	cmp	r1, r8
+	beq	.L2950
+	b	.L2951
+.L2954:
+	mov	r3, #-1
+.L2955:
+	str	r3, [sp, #32]
+	b	.L2930
+.L2970:
 	.align	2
-	.set	.LANCHOR105,. + 0
-	.type	p_gc_spare_buf, %object
-	.size	p_gc_spare_buf, 4
-p_gc_spare_buf:
-	.space	4
-	.section	.bss.p_io_data_buf_0,"aw",%nobits
-	.align	2
-	.set	.LANCHOR183,. + 0
-	.type	p_io_data_buf_0, %object
-	.size	p_io_data_buf_0, 4
-p_io_data_buf_0:
-	.space	4
-	.section	.bss.p_io_data_buf_1,"aw",%nobits
-	.align	2
-	.set	.LANCHOR184,. + 0
-	.type	p_io_data_buf_1, %object
-	.size	p_io_data_buf_1, 4
-p_io_data_buf_1:
-	.space	4
-	.section	.bss.p_io_spare_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR186,. + 0
-	.type	p_io_spare_buf, %object
-	.size	p_io_spare_buf, 4
-p_io_spare_buf:
-	.space	4
-	.section	.bss.p_l2p_map_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR123,. + 0
-	.type	p_l2p_map_buf, %object
-	.size	p_l2p_map_buf, 4
-p_l2p_map_buf:
-	.space	4
-	.section	.bss.p_l2p_ram_map,"aw",%nobits
-	.align	2
-	.set	.LANCHOR96,. + 0
-	.type	p_l2p_ram_map, %object
-	.size	p_l2p_ram_map, 4
-p_l2p_ram_map:
-	.space	4
-	.section	.bss.p_map_block_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR126,. + 0
-	.type	p_map_block_table, %object
-	.size	p_map_block_table, 4
-p_map_block_table:
-	.space	4
-	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR122,. + 0
-	.type	p_map_block_valid_page_count, %object
-	.size	p_map_block_valid_page_count, 4
-p_map_block_valid_page_count:
-	.space	4
-	.section	.bss.p_map_block_ver_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR127,. + 0
-	.type	p_map_block_ver_table, %object
-	.size	p_map_block_ver_table, 4
-p_map_block_ver_table:
-	.space	4
-	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR192,. + 0
-	.type	p_map_region_ppn_check_table, %object
-	.size	p_map_region_ppn_check_table, 4
-p_map_region_ppn_check_table:
-	.space	4
-	.section	.bss.p_map_region_ppn_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR128,. + 0
-	.type	p_map_region_ppn_table, %object
-	.size	p_map_region_ppn_table, 4
-p_map_region_ppn_table:
-	.space	4
-	.section	.bss.p_plane_order_table,"aw",%nobits
-	.set	.LANCHOR46,. + 0
-	.type	p_plane_order_table, %object
-	.size	p_plane_order_table, 32
-p_plane_order_table:
-	.space	32
-	.section	.bss.p_swl_mul_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR134,. + 0
-	.type	p_swl_mul_table, %object
-	.size	p_swl_mul_table, 4
-p_swl_mul_table:
-	.space	4
-	.section	.bss.p_sys_data_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR180,. + 0
-	.type	p_sys_data_buf, %object
-	.size	p_sys_data_buf, 4
-p_sys_data_buf:
-	.space	4
-	.section	.bss.p_sys_data_buf_1,"aw",%nobits
-	.align	2
-	.set	.LANCHOR181,. + 0
-	.type	p_sys_data_buf_1, %object
-	.size	p_sys_data_buf_1, 4
-p_sys_data_buf_1:
-	.space	4
-	.section	.bss.p_sys_spare_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR185,. + 0
-	.type	p_sys_spare_buf, %object
-	.size	p_sys_spare_buf, 4
-p_sys_spare_buf:
-	.space	4
-	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
-	.align	2
-	.type	p_valid_page_count_check_table, %object
-	.size	p_valid_page_count_check_table, 4
-p_valid_page_count_check_table:
-	.space	4
-	.section	.bss.p_valid_page_count_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR83,. + 0
-	.type	p_valid_page_count_table, %object
-	.size	p_valid_page_count_table, 4
-p_valid_page_count_table:
-	.space	4
-	.section	.bss.p_vendor_block_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR71,. + 0
-	.type	p_vendor_block_table, %object
-	.size	p_vendor_block_table, 4
-p_vendor_block_table:
-	.space	4
-	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
-	.align	2
-	.set	.LANCHOR189,. + 0
-	.type	p_vendor_block_valid_page_count, %object
-	.size	p_vendor_block_valid_page_count, 4
-p_vendor_block_valid_page_count:
-	.space	4
-	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR190,. + 0
-	.type	p_vendor_block_ver_table, %object
-	.size	p_vendor_block_ver_table, 4
-p_vendor_block_ver_table:
-	.space	4
-	.section	.bss.p_vendor_data_buf,"aw",%nobits
-	.align	2
-	.set	.LANCHOR182,. + 0
-	.type	p_vendor_data_buf, %object
-	.size	p_vendor_data_buf, 4
-p_vendor_data_buf:
-	.space	4
-	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
-	.align	2
-	.set	.LANCHOR191,. + 0
-	.type	p_vendor_region_ppn_table, %object
-	.size	p_vendor_region_ppn_table, 4
-p_vendor_region_ppn_table:
-	.space	4
-	.section	.bss.read_retry_cur_offset,"aw",%nobits
-	.set	.LANCHOR21,. + 0
-	.type	read_retry_cur_offset, %object
-	.size	read_retry_cur_offset, 4
-read_retry_cur_offset:
-	.space	4
-	.section	.bss.req_erase,"aw",%nobits
-	.align	2
-	.set	.LANCHOR77,. + 0
-	.type	req_erase, %object
-	.size	req_erase, 4
-req_erase:
-	.space	4
-	.section	.bss.req_gc,"aw",%nobits
-	.align	2
-	.set	.LANCHOR106,. + 0
-	.type	req_gc, %object
-	.size	req_gc, 4
-req_gc:
-	.space	4
-	.section	.bss.req_gc_dst,"aw",%nobits
-	.align	2
-	.set	.LANCHOR178,. + 0
-	.type	req_gc_dst, %object
-	.size	req_gc_dst, 4
-req_gc_dst:
-	.space	4
-	.section	.bss.req_prgm,"aw",%nobits
-	.align	2
-	.set	.LANCHOR179,. + 0
-	.type	req_prgm, %object
-	.size	req_prgm, 4
-req_prgm:
-	.space	4
-	.section	.bss.req_read,"aw",%nobits
-	.align	2
-	.set	.LANCHOR177,. + 0
-	.type	req_read, %object
-	.size	req_read, 4
-req_read:
-	.space	4
-	.section	.bss.req_sys,"aw",%nobits
-	.align	2
-	.set	.LANCHOR199,. + 0
-	.type	req_sys, %object
-	.size	req_sys, 36
-req_sys:
-	.space	36
-	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
-	.align	2
-	.set	.LANCHOR16,. + 0
-	.type	slcPageToMlcPageTbl, %object
-	.size	slcPageToMlcPageTbl, 512
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-	.set	.LANCHOR14,. + 0
-	.type	SamsungRefValue, %object
-	.size	SamsungRefValue, 64
-SamsungRefValue:
-	.byte	-89
-	.byte	-92
-	.byte	-91
-	.byte	-90
-	.byte	0
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-	.byte	-24
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-	.byte	-15
-	.byte	-5
-	.byte	-2
-	.byte	-16
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-	.byte	-62
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-	.byte	-5
-	.byte	-20
-	.byte	-24
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-	.byte	30
-	.byte	20
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-	.byte	-5
-	.byte	-1
-	.byte	-5
-	.byte	-8
-	.byte	7
-	.byte	12
-	.byte	2
-	.byte	0
-	.section	.data.Toshiba15RefValue,"aw",%progbits
-	.set	.LANCHOR11,. + 0
-	.type	Toshiba15RefValue, %object
-	.size	Toshiba15RefValue, 95
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-	.byte	4
-	.byte	5
-	.byte	6
-	.byte	7
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-	.byte	116
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-	.byte	114
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-	.byte	120
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-	.byte	2
-	.byte	0
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-	.byte	124
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-	.byte	2
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-	.byte	4
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-	.byte	126
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-	.byte	120
-	.byte	120
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-	.byte	124
-	.byte	118
-	.byte	116
-	.byte	114
-	.byte	0
-	.section	.data.ToshibaA19RefValue,"aw",%progbits
-	.set	.LANCHOR9,. + 0
-	.type	ToshibaA19RefValue, %object
-	.size	ToshibaA19RefValue, 45
-ToshibaA19RefValue:
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-	.byte	6
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-	.byte	116
-	.byte	114
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-	.byte	114
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-	.byte	2
-	.byte	0
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-	.byte	124
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-	.section	.data.ToshibaRefValue,"aw",%progbits
-	.set	.LANCHOR12,. + 0
-	.type	ToshibaRefValue, %object
-	.size	ToshibaRefValue, 8
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-	.byte	0
-	.byte	4
-	.byte	124
-	.byte	120
-	.byte	116
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-	.byte	112
-	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
-	.align	1
-	.set	.LANCHOR233,. + 0
-	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
-	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
-ftl_gc_temp_block_bops_scan_page_addr:
-	.short	-1
-	.section	.data.gFtlInitStatus,"aw",%progbits
-	.align	2
-	.set	.LANCHOR223,. + 0
-	.type	gFtlInitStatus, %object
-	.size	gFtlInitStatus, 4
-gFtlInitStatus:
-	.word	-1
-	.section	.data.gNandParaInfo,"aw",%progbits
-	.align	1
-	.set	.LANCHOR30,. + 0
-	.type	gNandParaInfo, %object
-	.size	gNandParaInfo, 32
-gNandParaInfo:
-	.byte	0
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-	.section	.data.gSlcNandParaInfo,"aw",%progbits
-	.align	1
-	.set	.LANCHOR197,. + 0
-	.type	gSlcNandParaInfo, %object
-	.size	gSlcNandParaInfo, 32
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-	.byte	2
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-	.short	1024
-	.short	256
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-	.section	.data.power_up_flag,"aw",%progbits
-	.align	2
-	.type	power_up_flag, %object
-	.size	power_up_flag, 4
-power_up_flag:
-	.word	1
-	.section	.data.random_seed,"aw",%progbits
-	.align	1
-	.set	.LANCHOR4,. + 0
-	.type	random_seed, %object
-	.size	random_seed, 256
-random_seed:
-	.short	22378
-	.short	1512
-	.short	25245
-	.short	17827
-	.short	25756
-	.short	19440
-	.short	9026
-	.short	10030
-	.short	29528
-	.short	20467
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-	.short	31328
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-	.short	13842
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-	.short	1108
-	.short	782
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-	.short	30365
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-	.short	1976
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-	.short	20204
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-	.short	23330
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-	.short	27600
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-	.short	31598
-	.short	30210
-	.short	19327
-	.short	13896
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-	.short	27545
-	.short	3107
-	.short	26575
-	.short	32270
-	.short	19852
-	.short	20601
-	.short	8349
-	.short	9290
-	.short	29819
-	.short	13579
-	.short	3661
-	.short	28676
-	.short	27331
-	.short	32574
-	.short	8693
-	.short	31253
-	.short	9081
-	.short	5399
-	.short	6842
-	.short	20087
-	.short	5537
-	.short	1274
-	.short	11617
-	.short	9530
-	.short	4866
-	.short	8035
-	.short	23219
-	.short	1178
-	.short	23272
-	.short	7383
-	.short	18944
-	.short	12488
-	.short	12871
-	.short	29340
-	.short	20532
-	.short	11022
-	.short	22514
-	.short	228
-	.short	22363
-	.short	24978
-	.short	14584
-	.short	12138
-	.short	3092
-	.short	17916
-	.short	16863
-	.short	14554
-	.short	31457
-	.short	29474
-	.short	25311
-	.short	24121
-	.short	3684
-	.short	28037
-	.short	22865
-	.short	22839
-	.short	25217
-	.short	13217
-	.short	27186
-	.short	14938
-	.short	11180
-	.short	29754
-	.short	24180
-	.short	15150
-	.short	32455
-	.short	20434
-	.short	23848
-	.short	29983
-	.short	16120
-	.short	14769
-	.short	20041
-	.short	29803
-	.short	28406
-	.short	17598
-	.short	28087
-	.section	.data.refValueDefault,"aw",%progbits
-	.set	.LANCHOR193,. + 0
-	.type	refValueDefault, %object
-	.size	refValueDefault, 28
-refValueDefault:
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	10
-	.byte	6
-	.byte	0
-	.byte	-3
-	.byte	-7
-	.byte	-8
-	.byte	0
-	.byte	-6
-	.byte	-13
-	.byte	-15
-	.byte	0
-	.byte	-11
-	.byte	-20
-	.byte	-23
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-	.byte	0
-	.byte	-26
-	.byte	-30
-	.byte	0
-	.byte	0
-	.byte	-32
-	.byte	-37
-	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
-.LC10:
-	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC11:
-	.ascii	"sync para %d\012\000"
-.LC12:
-	.ascii	"TOG mode Read error %x %x\012\000"
-	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
-.LC1:
-	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
-	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
-.LC21:
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
-.LC22:
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
-	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
-.LC27:
-	.ascii	"prog error: = %x\012\000"
-.LC28:
-	.ascii	"prog read error: = %x\012\000"
-.LC29:
-	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC30:
-	.ascii	"prog read d error: = %x %x %x\012\000"
-	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC58:
-	.ascii	"BBT:\000"
-	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
-.LC15:
-	.ascii	"ECC:%d\012\000"
-	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
-.LC13:
-	.ascii	"read retry status %x %x %x\012\000"
-	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
-.LC26:
-	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
-	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
-.LC23:
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
-.LC24:
-	.ascii	"data:\000"
-.LC25:
-	.ascii	"spare:\000"
-	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
-.LC2:
-	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
-	.ascii	"\000"
-	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC31:
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC32:
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC33:
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
-.LC4:
-	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
-.LC5:
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
-	.ascii	"\000"
-	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC50:
-	.ascii	"GC des block %x done\012\000"
-	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC49:
-	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
-	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC51:
-	.ascii	"FTL version: 5.0.48 20180408\000"
-.LC52:
-	.ascii	"...%s: no bad block mapping table, format device\012"
-	.ascii	"\000"
-.LC53:
-	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
-	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC43:
-	.ascii	"no ect\000"
-	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
-.LC45:
-	.ascii	"page map lost %x %x %x %x\012\000"
-	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC38:
-	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC39:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC41:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC46:
-	.ascii	"RSB refresh addr %x\012\000"
-.LC47:
-	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC48:
-	.ascii	"g_recovery_ppa %x ver %x\012 \000"
-	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC42:
-	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC35:
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
-.LC44:
-	.ascii	"slc mode\000"
-	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
-.LC19:
-	.ascii	"otp error! %d\000"
-.LC20:
-	.ascii	"rr\000"
-	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
-.LC6:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-.LC7:
-	.ascii	"!!!!! FTL sys Error !!!!!\000"
-.LC8:
-	.ascii	"%s\012\000"
-	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
-.LC14:
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10397,"a",%progbits
-	.set	.LANCHOR240,. + 0
-	.type	__func__.10397, %object
-	.size	__func__.10397, 8
-__func__.10397:
-	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10457,"a",%progbits
-	.set	.LANCHOR220,. + 0
-	.type	__func__.10457, %object
-	.size	__func__.10457, 13
-__func__.10457:
-	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10483,"a",%progbits
-	.set	.LANCHOR242,. + 0
-	.type	__func__.10483, %object
-	.size	__func__.10483, 10
-__func__.10483:
-	.ascii	"ftl_write\000"
-	.section	.rodata.__func__.10546,"a",%progbits
-	.set	.LANCHOR121,. + 0
-	.type	__func__.10546, %object
-	.size	__func__.10546, 14
-__func__.10546:
-	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10592,"a",%progbits
-	.set	.LANCHOR208,. + 0
-	.type	__func__.10592, %object
-	.size	__func__.10592, 11
-__func__.10592:
-	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10694,"a",%progbits
-	.set	.LANCHOR89,. + 0
-	.type	__func__.10694, %object
-	.size	__func__.10694, 17
-__func__.10694:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10698,"a",%progbits
-	.set	.LANCHOR86,. + 0
-	.type	__func__.10698, %object
-	.size	__func__.10698, 17
-__func__.10698:
-	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10728,"a",%progbits
-	.set	.LANCHOR90,. + 0
-	.type	__func__.10728, %object
-	.size	__func__.10728, 17
-__func__.10728:
-	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10758,"a",%progbits
-	.set	.LANCHOR94,. + 0
-	.type	__func__.10758, %object
-	.size	__func__.10758, 22
-__func__.10758:
-	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10765,"a",%progbits
-	.set	.LANCHOR213,. + 0
-	.type	__func__.10765, %object
-	.size	__func__.10765, 20
-__func__.10765:
-	.ascii	"ftl_load_l2p_region\000"
-	.section	.rodata.__func__.10796,"a",%progbits
-	.set	.LANCHOR95,. + 0
-	.type	__func__.10796, %object
-	.size	__func__.10796, 26
-__func__.10796:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10810,"a",%progbits
-	.set	.LANCHOR209,. + 0
-	.type	__func__.10810, %object
-	.size	__func__.10810, 15
-__func__.10810:
-	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10823,"a",%progbits
-	.set	.LANCHOR210,. + 0
-	.type	__func__.10823, %object
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-	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10836,"a",%progbits
-	.set	.LANCHOR211,. + 0
-	.type	__func__.10836, %object
-	.size	__func__.10836, 16
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-	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10856,"a",%progbits
-	.set	.LANCHOR98,. + 0
-	.type	__func__.10856, %object
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-__func__.10856:
-	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10872,"a",%progbits
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10872, %object
-	.size	__func__.10872, 9
-__func__.10872:
-	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10934,"a",%progbits
-	.set	.LANCHOR207,. + 0
-	.type	__func__.10934, %object
-	.size	__func__.10934, 15
-__func__.10934:
-	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10953,"a",%progbits
-	.set	.LANCHOR224,. + 0
-	.type	__func__.10953, %object
-	.size	__func__.10953, 14
-__func__.10953:
-	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11007,"a",%progbits
-	.set	.LANCHOR225,. + 0
-	.type	__func__.11007, %object
-	.size	__func__.11007, 15
-__func__.11007:
-	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11077,"a",%progbits
-	.set	.LANCHOR214,. + 0
-	.type	__func__.11077, %object
-	.size	__func__.11077, 16
-__func__.11077:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11110,"a",%progbits
-	.set	.LANCHOR228,. + 0
-	.type	__func__.11110, %object
-	.size	__func__.11110, 22
-__func__.11110:
-	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11164,"a",%progbits
-	.set	.LANCHOR101,. + 0
-	.type	__func__.11164, %object
-	.size	__func__.11164, 16
-__func__.11164:
-	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11184,"a",%progbits
-	.set	.LANCHOR137,. + 0
-	.type	__func__.11184, %object
-	.size	__func__.11184, 18
-__func__.11184:
-	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11261,"a",%progbits
-	.set	.LANCHOR200,. + 0
-	.type	__func__.11261, %object
-	.size	__func__.11261, 25
-__func__.11261:
-	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11275,"a",%progbits
-	.set	.LANCHOR219,. + 0
-	.type	__func__.11275, %object
-	.size	__func__.11275, 29
-__func__.11275:
-	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11281,"a",%progbits
-	.set	.LANCHOR205,. + 0
-	.type	__func__.11281, %object
-	.size	__func__.11281, 19
-__func__.11281:
-	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11292,"a",%progbits
-	.set	.LANCHOR203,. + 0
-	.type	__func__.11292, %object
-	.size	__func__.11292, 16
-__func__.11292:
-	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11297,"a",%progbits
-	.set	.LANCHOR204,. + 0
-	.type	__func__.11297, %object
-	.size	__func__.11297, 20
-__func__.11297:
-	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11365,"a",%progbits
-	.set	.LANCHOR234,. + 0
-	.type	__func__.11365, %object
-	.size	__func__.11365, 19
-__func__.11365:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11459,"a",%progbits
-	.set	.LANCHOR238,. + 0
-	.type	__func__.11459, %object
-	.size	__func__.11459, 23
-__func__.11459:
-	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC34:
-	.ascii	"decrement_vpc_count %x = %d\012\000"
-	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC55:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC56:
-	.ascii	"erase power lost blk = %x vpc=%x\012\000"
-	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
-.LC9:
-	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
-	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
-.LC36:
-	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC37:
-	.ascii	"page map lost: %x %x\012\000"
-	.section	.rodata.ftl_write.str1.1,"aMS",%progbits,1
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-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
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-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",%progbits,1
-.LC3:
-	.ascii	"remove_from_free_sys_Queue %x\012\000"
-	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
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-	.ascii	"FtlInit %x\012\000"
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-.LC16:
-	.ascii	"%s 0x%x:\000"
-.LC17:
-	.ascii	"%x \000"
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-	.ascii	"\000"
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-	.file 11 "drivers/rknand/rkftl/flash.h"
-	.file 12 "drivers/rknand/rkftl/nandc.h"
-	.file 13 "include/common.h"
-	.file 14 "include/errno.h"
-	.file 15 "./arch/arm/include/asm/types.h"
-	.file 16 "./arch/arm/include/asm/posix_types.h"
-	.file 17 "include/linux/types.h"
-	.file 18 "include/linux/string.h"
-	.file 19 "include/efi.h"
-	.file 20 "include/ide.h"
-	.file 21 "include/linux/list.h"
-	.file 22 "include/part.h"
-	.file 23 "include/flash.h"
-	.file 24 "include/lmb.h"
-	.file 25 "include/asm-generic/u-boot.h"
-	.file 26 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 27 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 28 "include/libfdt_env.h"
-	.file 29 "include/image.h"
-	.file 30 "include/dm/uclass-id.h"
-	.file 31 "include/net.h"
-	.file 32 "drivers/rknand/rkftl/FtlStruct.h"
-	.file 33 "drivers/rknand/rkftl/FtlGlobal.h"
-	.file 34 "drivers/rknand/rkftl/FtlInc.h"
-	.file 35 "include/malloc.h"
-	.file 36 "include/linux/rbtree.h"
-	.file 37 "include/mtd/mtd-abi.h"
-	.file 38 "include/linux/mtd/mtd.h"
-	.file 39 "include/../drivers/mtd/ubi/ubi-media.h"
-	.file 40 "include/../drivers/mtd/ubi/ubi.h"
-	.file 41 "include/ubi_uboot.h"
-	.file 42 "include/stdio.h"
-	.file 43 "include/linux/delay.h"
-	.file 44 "include/log.h"
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-	.4byte	0x2aa
-	.byte	0x5
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x3e9
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x4
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF74
-	.byte	0xb
-	.byte	0x9e
-	.4byte	0x2cc
-	.uleb128 0xe
-	.2byte	0x354
-	.byte	0xb
-	.byte	0xa2
-	.4byte	0x46c
-	.uleb128 0xa
-	.4byte	.LASF75
-	.byte	0xb
-	.byte	0xa4
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF76
-	.byte	0xb
-	.byte	0xa5
-	.4byte	0x3a
-	.byte	0x1
-	.uleb128 0xa
-	.4byte	.LASF77
-	.byte	0xb
-	.byte	0xa6
-	.4byte	0x3a
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF40
-	.byte	0xb
-	.byte	0xa7
-	.4byte	0x3a
-	.byte	0x3
-	.uleb128 0xa
-	.4byte	.LASF78
-	.byte	0xb
-	.byte	0xa9
-	.4byte	0x46c
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF79
-	.byte	0xb
-	.byte	0xaa
-	.4byte	0x46c
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF80
-	.byte	0xb
-	.byte	0xac
-	.4byte	0x47c
-	.byte	0x14
-	.uleb128 0xf
-	.4byte	.LASF81
-	.byte	0xb
-	.byte	0xad
-	.4byte	0x498
-	.2byte	0x214
-	.uleb128 0xf
-	.4byte	.LASF51
-	.byte	0xb
-	.byte	0xaf
-	.4byte	0x4ae
-	.2byte	0x254
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x47c
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x498
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x4ae
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x4be
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xff
-	.byte	0
-	.uleb128 0xe
-	.2byte	0x29c
-	.byte	0xb
-	.byte	0xb2
-	.4byte	0x51c
-	.uleb128 0xa
-	.4byte	.LASF75
-	.byte	0xb
-	.byte	0xb4
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF76
-	.byte	0xb
-	.byte	0xb5
-	.4byte	0x3a
-	.byte	0x1
-	.uleb128 0xa
-	.4byte	.LASF77
-	.byte	0xb
-	.byte	0xb6
-	.4byte	0x3a
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF40
-	.byte	0xb
-	.byte	0xb7
-	.4byte	0x3a
-	.byte	0x3
-	.uleb128 0xa
-	.4byte	.LASF78
-	.byte	0xb
-	.byte	0xb9
-	.4byte	0x51c
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF79
-	.byte	0xb
-	.byte	0xba
-	.4byte	0x46c
-	.byte	0x14
-	.uleb128 0xa
-	.4byte	.LASF80
-	.byte	0xb
-	.byte	0xbc
-	.4byte	0x52c
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x52c
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x542
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x10
-	.byte	0x84
-	.byte	0xb
-	.byte	0xbf
-	.4byte	0x587
-	.uleb128 0xa
-	.4byte	.LASF75
-	.byte	0xb
-	.byte	0xc1
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF76
-	.byte	0xb
-	.byte	0xc2
-	.4byte	0x3a
-	.byte	0x1
-	.uleb128 0xa
-	.4byte	.LASF77
-	.byte	0xb
-	.byte	0xc3
-	.4byte	0x3a
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF40
-	.byte	0xb
-	.byte	0xc4
-	.4byte	0x3a
-	.byte	0x3
-	.uleb128 0xa
-	.4byte	.LASF80
-	.byte	0xb
-	.byte	0xc6
-	.4byte	0x587
-	.byte	0x4
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x597
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x10
-	.byte	0x84
-	.byte	0xb
-	.byte	0xc9
-	.4byte	0x5dc
-	.uleb128 0xa
-	.4byte	.LASF75
-	.byte	0xb
-	.byte	0xcb
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF76
-	.byte	0xb
-	.byte	0xcc
-	.4byte	0x3a
-	.byte	0x1
-	.uleb128 0xa
-	.4byte	.LASF77
-	.byte	0xb
-	.byte	0xcd
-	.4byte	0x3a
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF40
-	.byte	0xb
-	.byte	0xce
-	.4byte	0x3a
-	.byte	0x3
-	.uleb128 0xa
-	.4byte	.LASF80
-	.byte	0xb
-	.byte	0xcf
-	.4byte	0x587
-	.byte	0x4
-	.byte	0
-	.uleb128 0x11
-	.4byte	.LASF173
-	.2byte	0x354
-	.byte	0xb
-	.byte	0xa0
-	.4byte	0x616
-	.uleb128 0x12
-	.4byte	.LASF82
-	.byte	0xb
-	.byte	0xb0
-	.4byte	0x3f4
-	.uleb128 0x12
-	.4byte	.LASF83
-	.byte	0xb
-	.byte	0xbd
-	.4byte	0x4be
-	.uleb128 0x12
-	.4byte	.LASF84
-	.byte	0xb
-	.byte	0xc7
-	.4byte	0x542
-	.uleb128 0x12
-	.4byte	.LASF85
-	.byte	0xb
-	.byte	0xd0
-	.4byte	0x597
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF86
-	.byte	0xb
-	.byte	0xd1
-	.4byte	0x5dc
-	.uleb128 0x9
-	.4byte	.LASF87
-	.byte	0x10
-	.byte	0xb
-	.byte	0xd3
-	.4byte	0x676
-	.uleb128 0xa
-	.4byte	.LASF88
-	.byte	0xb
-	.byte	0xd5
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF89
-	.byte	0xb
-	.byte	0xd6
-	.4byte	0x3a
-	.byte	0x1
-	.uleb128 0xa
-	.4byte	.LASF90
-	.byte	0xb
-	.byte	0xd7
-	.4byte	0x57
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF16
-	.byte	0xb
-	.byte	0xd8
-	.4byte	0x74
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF91
-	.byte	0xb
-	.byte	0xd9
-	.4byte	0x676
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF92
-	.byte	0xb
-	.byte	0xda
-	.4byte	0x676
-	.byte	0xc
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0xc5
-	.uleb128 0x13
-	.4byte	.LASF93
-	.2byte	0x638
-	.byte	0xb
-	.byte	0xdd
-	.4byte	0x728
-	.uleb128 0xb
-	.ascii	"tag\000"
-	.byte	0xb
-	.byte	0xdf
-	.4byte	0x74
-	.byte	0
-	.uleb128 0xb
-	.ascii	"len\000"
-	.byte	0xb
-	.byte	0xe0
-	.4byte	0x74
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF94
-	.byte	0xb
-	.byte	0xe1
-	.4byte	0x74
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF95
-	.byte	0xb
-	.byte	0xe2
-	.4byte	0x57
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF96
-	.byte	0xb
-	.byte	0xe3
-	.4byte	0x57
-	.byte	0xe
-	.uleb128 0xa
-	.4byte	.LASF97
-	.byte	0xb
-	.byte	0xe4
-	.4byte	0x728
-	.byte	0x10
-	.uleb128 0xa
-	.4byte	.LASF98
-	.byte	0xb
-	.byte	0xe5
-	.4byte	0x51c
-	.byte	0x50
-	.uleb128 0xa
-	.4byte	.LASF99
-	.byte	0xb
-	.byte	0xe6
-	.4byte	0x73e
-	.byte	0x60
-	.uleb128 0xa
-	.4byte	.LASF100
-	.byte	0xb
-	.byte	0xe8
-	.4byte	0x3e9
-	.byte	0xa0
-	.uleb128 0xa
-	.4byte	.LASF101
-	.byte	0xb
-	.byte	0xe9
-	.4byte	0x2c1
-	.byte	0xc0
-	.uleb128 0xa
-	.4byte	.LASF102
-	.byte	0xb
-	.byte	0xea
-	.4byte	0x616
-	.byte	0xe0
-	.uleb128 0xf
-	.4byte	.LASF103
-	.byte	0xb
-	.byte	0xec
-	.4byte	0x74
-	.2byte	0x434
-	.uleb128 0xf
-	.4byte	.LASF40
-	.byte	0xb
-	.byte	0xed
-	.4byte	0x74e
-	.2byte	0x438
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x73e
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x74e
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x75f
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF104
-	.byte	0xb
-	.byte	0xee
-	.4byte	0x67c
-	.uleb128 0x9
-	.4byte	.LASF105
-	.byte	0xb
-	.byte	0xb
-	.byte	0xf0
-	.4byte	0x7cb
-	.uleb128 0xa
-	.4byte	.LASF106
-	.byte	0xb
-	.byte	0xf2
-	.4byte	0x74
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF107
-	.byte	0xb
-	.byte	0xf3
-	.4byte	0x57
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF108
-	.byte	0xb
-	.byte	0xf4
-	.4byte	0x3a
-	.byte	0x6
-	.uleb128 0xa
-	.4byte	.LASF109
-	.byte	0xb
-	.byte	0xf5
-	.4byte	0x3a
-	.byte	0x7
-	.uleb128 0xa
-	.4byte	.LASF110
-	.byte	0xb
-	.byte	0xf6
-	.4byte	0x3a
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF111
-	.byte	0xb
-	.byte	0xf7
-	.4byte	0x3a
-	.byte	0x9
-	.uleb128 0xa
-	.4byte	.LASF112
-	.byte	0xb
-	.byte	0xf8
-	.4byte	0x3a
-	.byte	0xa
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF113
-	.byte	0xb
-	.byte	0xf9
-	.4byte	0x7d6
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x76a
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x7ec
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF114
-	.byte	0xb
-	.2byte	0x107
-	.4byte	0x7dc
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	read_retry_cur_offset
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x814
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF97
-	.byte	0xb
-	.2byte	0x108
-	.4byte	0x7fe
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	IDByte
-	.uleb128 0x15
-	.4byte	.LASF98
-	.byte	0xb
-	.2byte	0x109
-	.4byte	0x46c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DieCsIndex
-	.uleb128 0x6
-	.4byte	0x621
-	.4byte	0x848
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF115
-	.byte	0xb
-	.2byte	0x10a
-	.4byte	0x838
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gDieOp
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x86a
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF99
-	.byte	0xb
-	.2byte	0x10b
-	.4byte	0x85a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DieAddrs
-	.uleb128 0x16
-	.4byte	0xba
-	.byte	0xb
-	.2byte	0x10c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	slcPageToMlcPageTbl
-	.uleb128 0x16
-	.4byte	0xaf
-	.byte	0xb
-	.2byte	0x10d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	mlcPageToSlcPageTbl
-	.uleb128 0x17
-	.4byte	0x74
-	.4byte	0x8b6
-	.uleb128 0x18
-	.4byte	0x3a
-	.uleb128 0x18
-	.4byte	0x74
-	.uleb128 0x18
-	.4byte	0x8b6
-	.uleb128 0x18
-	.4byte	0x8b6
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3a
-	.uleb128 0x15
-	.4byte	.LASF116
-	.byte	0xb
-	.2byte	0x10e
-	.4byte	0x8ce
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpReadRetrial
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x898
-	.uleb128 0x15
-	.4byte	.LASF117
-	.byte	0xb
-	.2byte	0x10f
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMultiPageReadEn
-	.uleb128 0x15
-	.4byte	.LASF118
-	.byte	0xb
-	.2byte	0x110
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMultiPageProgEn
-	.uleb128 0x15
-	.4byte	.LASF119
-	.byte	0xb
-	.2byte	0x111
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashSdrModeEn
-	.uleb128 0x15
-	.4byte	.LASF120
-	.byte	0xb
-	.2byte	0x112
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashToggleModeEn
-	.uleb128 0x15
-	.4byte	.LASF121
-	.byte	0xb
-	.2byte	0x113
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashOnfiModeEn
-	.uleb128 0x15
-	.4byte	.LASF122
-	.byte	0xb
-	.2byte	0x115
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashSlcMode
-	.uleb128 0x15
-	.4byte	.LASF123
-	.byte	0xb
-	.2byte	0x116
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashInterfaceMode
-	.uleb128 0x15
-	.4byte	.LASF124
-	.byte	0xb
-	.2byte	0x117
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandMaxDie
-	.uleb128 0x15
-	.4byte	.LASF125
-	.byte	0xb
-	.2byte	0x118
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandMaxChip
-	.uleb128 0x15
-	.4byte	.LASF126
-	.byte	0xb
-	.2byte	0x119
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gTotleBlock
-	.uleb128 0x15
-	.4byte	.LASF127
-	.byte	0xb
-	.2byte	0x11a
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBlockPageAlignSize
-	.uleb128 0x15
-	.4byte	.LASF128
-	.byte	0xb
-	.2byte	0x11b
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandRandomizer
-	.uleb128 0x15
-	.4byte	.LASF129
-	.byte	0xb
-	.2byte	0x11c
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashEccBits
-	.uleb128 0x15
-	.4byte	.LASF130
-	.byte	0xb
-	.2byte	0x11d
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashIDBEccBits
-	.uleb128 0x15
-	.4byte	.LASF131
-	.byte	0xb
-	.2byte	0x11e
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashInfoBlockEcc
-	.uleb128 0x15
-	.4byte	.LASF132
-	.byte	0xb
-	.2byte	0x11f
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashIdbBlockAddr
-	.uleb128 0x15
-	.4byte	.LASF133
-	.byte	0xb
-	.2byte	0x120
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashInfoBlockAddr
-	.uleb128 0x15
-	.4byte	.LASF134
-	.byte	0xb
-	.2byte	0x121
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandFlashResEndPageAddr
-	.uleb128 0x15
-	.4byte	.LASF135
-	.byte	0xb
-	.2byte	0x122
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandIDBResBlkNum
-	.uleb128 0x15
-	.4byte	.LASF136
-	.byte	0xb
-	.2byte	0x123
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandIDBResBlkNumSaveInFlash
-	.uleb128 0x15
-	.4byte	.LASF137
-	.byte	0xb
-	.2byte	0x124
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_retryMode
-	.uleb128 0x15
-	.4byte	.LASF138
-	.byte	0xb
-	.2byte	0x125
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_maxRegNum
-	.uleb128 0x15
-	.4byte	.LASF139
-	.byte	0xb
-	.2byte	0x126
-	.4byte	0x3a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_maxRetryCount
-	.uleb128 0x16
-	.4byte	0x1e6
-	.byte	0xb
-	.2byte	0x127
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_slc2KBNand
-	.uleb128 0x19
-	.4byte	.LASF140
-	.byte	0xb
-	.2byte	0x128
-	.4byte	0x3e9
-	.uleb128 0x15
-	.4byte	.LASF141
-	.byte	0xb
-	.2byte	0x129
-	.4byte	0x2c1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandOptPara
-	.uleb128 0x15
-	.4byte	.LASF142
-	.byte	0xb
-	.2byte	0x12a
-	.4byte	0xab0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3e9
-	.uleb128 0x15
-	.4byte	.LASF143
-	.byte	0xb
-	.2byte	0x12c
-	.4byte	0x616
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gReadRetryInfo
-	.uleb128 0x15
-	.4byte	.LASF144
-	.byte	0xb
-	.2byte	0x12d
-	.4byte	0xada
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpFlashSaveInfo
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x75f
-	.uleb128 0x15
-	.4byte	.LASF145
-	.byte	0xb
-	.2byte	0x131
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashPageBuffer0
-	.uleb128 0x15
-	.4byte	.LASF146
-	.byte	0xb
-	.2byte	0x132
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashPageBuffer1
-	.uleb128 0x15
-	.4byte	.LASF147
-	.byte	0xb
-	.2byte	0x133
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashSpareBuffer
-	.uleb128 0x15
-	.4byte	.LASF148
-	.byte	0xb
-	.2byte	0x134
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashProgCheckBuffer
-	.uleb128 0x15
-	.4byte	.LASF149
-	.byte	0xb
-	.2byte	0x135
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFlashProgCheckSpareBuffer
-	.uleb128 0x15
-	.4byte	.LASF150
-	.byte	0xb
-	.2byte	0x137
-	.4byte	0x144
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandPhyInfo
-	.uleb128 0x15
-	.4byte	.LASF151
-	.byte	0xb
-	.2byte	0x138
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FlashWaitBusyScheduleEn
-	.uleb128 0x15
-	.4byte	.LASF152
-	.byte	0xb
-	.2byte	0x139
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FlashDdrTunningReadCount
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0xb81
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF153
-	.byte	0xb
-	.2byte	0x13b
-	.4byte	0xb70
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandIDataBuf
-	.uleb128 0x1a
-	.4byte	.LASF441
-	.byte	0x4
-	.4byte	0x2c
-	.byte	0xc
-	.byte	0x15
-	.4byte	0xbc2
-	.uleb128 0x1b
-	.4byte	.LASF154
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF155
-	.byte	0x1
-	.uleb128 0x1b
-	.4byte	.LASF156
-	.byte	0x2
-	.uleb128 0x1b
-	.4byte	.LASF157
-	.byte	0x3
-	.uleb128 0x1b
-	.4byte	.LASF158
-	.byte	0x4
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF159
-	.byte	0xc
-	.byte	0x1c
-	.4byte	0xb93
-	.uleb128 0x10
-	.byte	0x4
-	.byte	0xc
-	.byte	0x24
-	.4byte	0xc69
-	.uleb128 0x1c
-	.ascii	"cs\000"
-	.byte	0xc
-	.byte	0x26
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x8
-	.byte	0x18
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"wp\000"
-	.byte	0xc
-	.byte	0x27
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x17
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"rdy\000"
-	.byte	0xc
-	.byte	0x28
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x16
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF160
-	.byte	0xc
-	.byte	0x29
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x15
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF161
-	.byte	0xc
-	.byte	0x2a
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x14
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF162
-	.byte	0xc
-	.byte	0x2b
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x13
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"tm\000"
-	.byte	0xc
-	.byte	0x2c
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x12
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF163
-	.byte	0xc
-	.byte	0x2d
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x11
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF164
-	.byte	0xc
-	.byte	0x2e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x10
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF165
-	.byte	0xc
-	.byte	0x2f
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x10
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x10
-	.byte	0x4
-	.byte	0xc
-	.byte	0x31
-	.4byte	0xd41
-	.uleb128 0x1c
-	.ascii	"cs\000"
-	.byte	0xc
-	.byte	0x33
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x8
-	.byte	0x18
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"wp\000"
-	.byte	0xc
-	.byte	0x34
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x17
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"rdy\000"
-	.byte	0xc
-	.byte	0x35
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x16
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF166
-	.byte	0xc
-	.byte	0x36
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x15
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF167
-	.byte	0xc
-	.byte	0x37
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x14
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF162
-	.byte	0xc
-	.byte	0x38
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x13
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"tm\000"
-	.byte	0xc
-	.byte	0x39
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x12
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF163
-	.byte	0xc
-	.byte	0x3a
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x11
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF164
-	.byte	0xc
-	.byte	0x3b
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x10
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF168
-	.byte	0xc
-	.byte	0x3c
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0xf
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF169
-	.byte	0xc
-	.byte	0x3d
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0xe
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF170
-	.byte	0xc
-	.byte	0x3e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x6
-	.byte	0x8
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF171
-	.byte	0xc
-	.byte	0x3f
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x3
-	.byte	0x5
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF172
-	.byte	0xc
-	.byte	0x40
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x5
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x1e
-	.4byte	.LASF174
-	.byte	0x4
-	.byte	0xc
-	.byte	0x21
-	.4byte	0xd6d
-	.uleb128 0x1f
-	.ascii	"d32\000"
-	.byte	0xc
-	.byte	0x23
-	.4byte	0x74
-	.uleb128 0x1f
-	.ascii	"V4\000"
-	.byte	0xc
-	.byte	0x30
-	.4byte	0xbcd
-	.uleb128 0x1f
-	.ascii	"V6\000"
-	.byte	0xc
-	.byte	0x41
-	.4byte	0xc69
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF175
-	.byte	0xc
-	.byte	0x42
-	.4byte	0xd41
-	.uleb128 0x20
-	.4byte	0xd6d
-	.uleb128 0x10
-	.byte	0x4
-	.byte	0xc
-	.byte	0x57
-	.4byte	0xe85
-	.uleb128 0x1c
-	.ascii	"rst\000"
-	.byte	0xc
-	.byte	0x59
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"rdn\000"
-	.byte	0xc
-	.byte	0x5a
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF176
-	.byte	0xc
-	.byte	0x5b
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1d
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"dma\000"
-	.byte	0xc
-	.byte	0x5c
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF177
-	.byte	0xc
-	.byte	0x5d
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1b
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF178
-	.byte	0xc
-	.byte	0x5e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x2
-	.byte	0x19
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF179
-	.byte	0xc
-	.byte	0x5f
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x18
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF180
-	.byte	0xc
-	.byte	0x60
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x17
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF181
-	.byte	0xc
-	.byte	0x61
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x16
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF182
-	.byte	0xc
-	.byte	0x62
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x15
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF183
-	.byte	0xc
-	.byte	0x63
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x14
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF184
-	.byte	0xc
-	.byte	0x64
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x6
-	.byte	0xe
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF185
-	.byte	0xc
-	.byte	0x65
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x2
-	.byte	0xc
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF186
-	.byte	0xc
-	.byte	0x66
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0xb
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF187
-	.byte	0xc
-	.byte	0x67
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0xa
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF188
-	.byte	0xc
-	.byte	0x68
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x5
-	.byte	0x5
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF172
-	.byte	0xc
-	.byte	0x69
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x5
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x10
-	.byte	0x4
-	.byte	0xc
-	.byte	0x6b
-	.4byte	0xf9c
-	.uleb128 0x1c
-	.ascii	"rst\000"
-	.byte	0xc
-	.byte	0x6d
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"rdn\000"
-	.byte	0xc
-	.byte	0x6e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF176
-	.byte	0xc
-	.byte	0x6f
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1d
-	.byte	0
-	.uleb128 0x1c
-	.ascii	"dma\000"
-	.byte	0xc
-	.byte	0x70
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF177
-	.byte	0xc
-	.byte	0x71
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1b
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF178
-	.byte	0xc
-	.byte	0x72
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x2
-	.byte	0x19
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF179
-	.byte	0xc
-	.byte	0x73
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x18
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF189
-	.byte	0xc
-	.byte	0x76
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x2
-	.byte	0x16
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF182
-	.byte	0xc
-	.byte	0x77
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x15
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF183
-	.byte	0xc
-	.byte	0x78
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x14
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF184
-	.byte	0xc
-	.byte	0x79
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x7
-	.byte	0xd
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF190
-	.byte	0xc
-	.byte	0x7a
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0xc
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF186
-	.byte	0xc
-	.byte	0x7b
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0xb
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF187
-	.byte	0xc
-	.byte	0x7c
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0xa
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF188
-	.byte	0xc
-	.byte	0x7d
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x6
-	.byte	0x4
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF191
-	.byte	0xc
-	.byte	0x7e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x3
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF192
-	.byte	0xc
-	.byte	0x7f
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x2
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF193
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-	.4byte	0x74
-	.uleb128 0x1f
-	.ascii	"V4\000"
-	.byte	0xc
-	.byte	0xdf
-	.4byte	0x13a8
-	.uleb128 0x1f
-	.ascii	"V6\000"
-	.byte	0xc
-	.byte	0xeb
-	.4byte	0x1429
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x14b9
-	.uleb128 0x3
-	.4byte	.LASF236
-	.byte	0xc
-	.byte	0xec
-	.4byte	0x14e5
-	.uleb128 0x10
-	.byte	0x4
-	.byte	0xc
-	.byte	0xf1
-	.4byte	0x152b
-	.uleb128 0x1d
-	.4byte	.LASF237
-	.byte	0xc
-	.byte	0xf3
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x10
-	.byte	0x10
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF238
-	.byte	0xc
-	.byte	0xf4
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x5
-	.byte	0xb
-	.byte	0
-	.uleb128 0x1d
-	.4byte	.LASF239
-	.byte	0xc
-	.byte	0xf5
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0xb
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x1e
-	.4byte	.LASF240
-	.byte	0x4
-	.byte	0xc
-	.byte	0xee
-	.4byte	0x154d
-	.uleb128 0x1f
-	.ascii	"d32\000"
-	.byte	0xc
-	.byte	0xf0
-	.4byte	0x74
-	.uleb128 0x1f
-	.ascii	"V6\000"
-	.byte	0xc
-	.byte	0xf6
-	.4byte	0x14f5
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x152b
-	.uleb128 0x3
-	.4byte	.LASF241
-	.byte	0xc
-	.byte	0xf7
-	.4byte	0x154d
-	.uleb128 0x13
-	.4byte	.LASF242
-	.2byte	0x100
-	.byte	0xc
-	.byte	0xfa
-	.4byte	0x159b
-	.uleb128 0xa
-	.4byte	.LASF243
-	.byte	0xc
-	.byte	0xfc
-	.4byte	0x74
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF201
-	.byte	0xc
-	.byte	0xfd
-	.4byte	0x74
-	.byte	0x4
-	.uleb128 0xb
-	.ascii	"cmd\000"
-	.byte	0xc
-	.byte	0xfe
-	.4byte	0x74
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF244
-	.byte	0xc
-	.byte	0xff
-	.4byte	0x15a0
-	.byte	0xc
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x155d
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x15b0
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF245
-	.byte	0xc
-	.2byte	0x100
-	.4byte	0x159b
-	.uleb128 0x21
-	.4byte	.LASF246
-	.byte	0xc
-	.2byte	0x100
-	.4byte	0x15c8
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x159b
-	.uleb128 0x22
-	.2byte	0x1800
-	.byte	0xc
-	.2byte	0x105
-	.4byte	0x1781
-	.uleb128 0x23
-	.4byte	.LASF247
-	.byte	0xc
-	.2byte	0x107
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF248
-	.byte	0xc
-	.2byte	0x108
-	.4byte	0x74
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF249
-	.byte	0xc
-	.2byte	0x109
-	.4byte	0x74
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF250
-	.byte	0xc
-	.2byte	0x10a
-	.4byte	0x74
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF236
-	.byte	0xc
-	.2byte	0x10b
-	.4byte	0x74
-	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF251
-	.byte	0xc
-	.2byte	0x10c
-	.4byte	0x74
-	.byte	0x14
-	.uleb128 0x23
-	.4byte	.LASF252
-	.byte	0xc
-	.2byte	0x10d
-	.4byte	0x74
-	.byte	0x18
-	.uleb128 0x23
-	.4byte	.LASF241
-	.byte	0xc
-	.2byte	0x10e
-	.4byte	0x74
-	.byte	0x1c
-	.uleb128 0x23
-	.4byte	.LASF253
-	.byte	0xc
-	.2byte	0x110
-	.4byte	0x85a
-	.byte	0x20
-	.uleb128 0x23
-	.4byte	.LASF254
-	.byte	0xc
-	.2byte	0x111
-	.4byte	0x1786
-	.byte	0x40
-	.uleb128 0x24
-	.4byte	.LASF255
-	.byte	0xc
-	.2byte	0x112
-	.4byte	0x74
-	.2byte	0x130
-	.uleb128 0x24
-	.4byte	.LASF256
-	.byte	0xc
-	.2byte	0x113
-	.4byte	0x74
-	.2byte	0x134
-	.uleb128 0x24
-	.4byte	.LASF257
-	.byte	0xc
-	.2byte	0x114
-	.4byte	0x74
-	.2byte	0x138
-	.uleb128 0x24
-	.4byte	.LASF258
-	.byte	0xc
-	.2byte	0x115
-	.4byte	0x1796
-	.2byte	0x13c
-	.uleb128 0x24
-	.4byte	.LASF259
-	.byte	0xc
-	.2byte	0x117
-	.4byte	0x74
-	.2byte	0x150
-	.uleb128 0x24
-	.4byte	.LASF260
-	.byte	0xc
-	.2byte	0x118
-	.4byte	0x74
-	.2byte	0x154
-	.uleb128 0x24
-	.4byte	.LASF261
-	.byte	0xc
-	.2byte	0x119
-	.4byte	0x74
-	.2byte	0x158
-	.uleb128 0x24
-	.4byte	.LASF244
-	.byte	0xc
-	.2byte	0x11a
-	.4byte	0x74
-	.2byte	0x15c
-	.uleb128 0x24
-	.4byte	.LASF262
-	.byte	0xc
-	.2byte	0x11b
-	.4byte	0x74
-	.2byte	0x160
-	.uleb128 0x24
-	.4byte	.LASF263
-	.byte	0xc
-	.2byte	0x11d
-	.4byte	0x74
-	.2byte	0x164
-	.uleb128 0x24
-	.4byte	.LASF264
-	.byte	0xc
-	.2byte	0x11e
-	.4byte	0x74
-	.2byte	0x168
-	.uleb128 0x24
-	.4byte	.LASF265
-	.byte	0xc
-	.2byte	0x11f
-	.4byte	0x74
-	.2byte	0x16c
-	.uleb128 0x24
-	.4byte	.LASF266
-	.byte	0xc
-	.2byte	0x120
-	.4byte	0x74
-	.2byte	0x170
-	.uleb128 0x24
-	.4byte	.LASF267
-	.byte	0xc
-	.2byte	0x121
-	.4byte	0x74
-	.2byte	0x174
-	.uleb128 0x24
-	.4byte	.LASF268
-	.byte	0xc
-	.2byte	0x122
-	.4byte	0x17a6
-	.2byte	0x178
-	.uleb128 0x24
-	.4byte	.LASF269
-	.byte	0xc
-	.2byte	0x123
-	.4byte	0x73e
-	.2byte	0x180
-	.uleb128 0x24
-	.4byte	.LASF270
-	.byte	0xc
-	.2byte	0x124
-	.4byte	0x73e
-	.2byte	0x1c0
-	.uleb128 0x24
-	.4byte	.LASF271
-	.byte	0xc
-	.2byte	0x125
-	.4byte	0x17b6
-	.2byte	0x200
-	.uleb128 0x24
-	.4byte	.LASF272
-	.byte	0xc
-	.2byte	0x126
-	.4byte	0x17c6
-	.2byte	0x400
-	.uleb128 0x24
-	.4byte	.LASF273
-	.byte	0xc
-	.2byte	0x127
-	.4byte	0x17e6
-	.2byte	0x800
-	.uleb128 0x25
-	.ascii	"buf\000"
-	.byte	0xc
-	.2byte	0x128
-	.4byte	0xb70
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x15ce
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x1796
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3b
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17a6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x4
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17b6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17c6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x17d6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xff
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x15b0
-	.4byte	0x17e6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x17d6
-	.uleb128 0x26
-	.4byte	.LASF274
-	.2byte	0x1800
-	.byte	0xc
-	.2byte	0x103
-	.4byte	0x1805
-	.uleb128 0x27
-	.ascii	"V6\000"
-	.byte	0xc
-	.2byte	0x129
-	.4byte	0x1781
-	.byte	0
-	.uleb128 0x20
-	.4byte	0x17eb
-	.uleb128 0x21
-	.4byte	.LASF275
-	.byte	0xc
-	.2byte	0x12a
-	.4byte	0x1816
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1805
-	.uleb128 0x28
-	.4byte	.LASF276
-	.byte	0x20
-	.byte	0xc
-	.2byte	0x12c
-	.4byte	0x1892
-	.uleb128 0x23
-	.4byte	.LASF277
-	.byte	0xc
-	.2byte	0x12e
-	.4byte	0x13e
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF278
-	.byte	0xc
-	.2byte	0x12f
-	.4byte	0x13e
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF279
-	.byte	0xc
-	.2byte	0x130
-	.4byte	0x13e
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF280
-	.byte	0xc
-	.2byte	0x131
-	.4byte	0x13e
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF281
-	.byte	0xc
-	.2byte	0x132
-	.4byte	0x74
-	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF282
-	.byte	0xc
-	.2byte	0x133
-	.4byte	0x74
-	.byte	0x14
-	.uleb128 0x23
-	.4byte	.LASF283
-	.byte	0xc
-	.2byte	0x134
-	.4byte	0x74
-	.byte	0x18
-	.uleb128 0x29
-	.ascii	"cnt\000"
-	.byte	0xc
-	.2byte	0x135
-	.4byte	0x74
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF284
-	.byte	0xc
-	.2byte	0x136
-	.4byte	0x181c
-	.uleb128 0x28
-	.4byte	.LASF285
-	.byte	0x8
-	.byte	0xc
-	.2byte	0x138
-	.4byte	0x18c6
-	.uleb128 0x23
-	.4byte	.LASF286
-	.byte	0xc
-	.2byte	0x13a
-	.4byte	0x13e
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-	.uleb128 0x23
-	.4byte	.LASF287
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-	.2byte	0x13b
-	.4byte	0x74
-	.byte	0x4
-	.byte	0
-	.uleb128 0x21
-	.4byte	.LASF288
-	.byte	0xc
-	.2byte	0x13c
-	.4byte	0x189e
-	.uleb128 0x6
-	.4byte	0x18c6
-	.4byte	0x18e2
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF289
-	.byte	0xc
-	.2byte	0x14a
-	.4byte	0x18d2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandChipMap
-	.uleb128 0x15
-	.4byte	.LASF290
-	.byte	0xc
-	.2byte	0x14c
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandcVer
-	.uleb128 0x15
-	.4byte	.LASF291
-	.byte	0xc
-	.2byte	0x14d
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_nandc_version_data
-	.uleb128 0x15
-	.4byte	.LASF292
-	.byte	0xc
-	.2byte	0x14e
-	.4byte	0x180a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpNandc
-	.uleb128 0x15
-	.4byte	.LASF293
-	.byte	0xc
-	.2byte	0x14f
-	.4byte	0x180a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gpNandc1
-	.uleb128 0x15
-	.4byte	.LASF294
-	.byte	0xc
-	.2byte	0x150
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandcEccBits
-	.uleb128 0x15
-	.4byte	.LASF295
-	.byte	0xc
-	.2byte	0x151
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBootDdrMode
-	.uleb128 0x15
-	.4byte	.LASF296
-	.byte	0xc
-	.2byte	0x152
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gToggleModeClkDiv
-	.uleb128 0x15
-	.4byte	.LASF297
-	.byte	0xc
-	.2byte	0x153
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandcDumpWriteEn
-	.uleb128 0x15
-	.4byte	.LASF298
-	.byte	0xc
-	.2byte	0x155
-	.4byte	0x1892
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMasterInfo
-	.uleb128 0x15
-	.4byte	.LASF299
-	.byte	0xc
-	.2byte	0x156
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gMasterTempBuf
-	.uleb128 0x3
-	.4byte	.LASF300
-	.byte	0xd
-	.byte	0xd
-	.4byte	0x33
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF301
-	.uleb128 0x8
-	.4byte	.LASF302
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-	.byte	0xc
-	.4byte	0x8f
-	.uleb128 0x3
-	.4byte	.LASF303
-	.byte	0xf
-	.byte	0xc
-	.4byte	0x33
-	.uleb128 0x3
-	.4byte	.LASF304
-	.byte	0xf
-	.byte	0xf
-	.4byte	0x25
-	.uleb128 0x3
-	.4byte	.LASF305
-	.byte	0xf
-	.byte	0x12
-	.4byte	0x2c
-	.uleb128 0x3
-	.4byte	.LASF306
-	.byte	0xf
-	.byte	0x16
-	.4byte	0x96
-	.uleb128 0x2a
-	.ascii	"u8\000"
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-	.byte	0x1f
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-	.uleb128 0x4
-	.4byte	0x19f1
-	.uleb128 0x2a
-	.ascii	"u32\000"
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-	.byte	0x25
-	.4byte	0x2c
-	.uleb128 0x3
-	.4byte	.LASF307
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-	.byte	0x35
-	.4byte	0x19b3
-	.uleb128 0x3
-	.4byte	.LASF308
-	.byte	0xf
-	.byte	0x36
-	.4byte	0x19b3
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a2e
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF309
-	.uleb128 0x4
-	.4byte	0x1a27
-	.uleb128 0x3
-	.4byte	.LASF310
-	.byte	0x10
-	.byte	0x16
-	.4byte	0x25
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x5
-	.4byte	.LASF311
-	.uleb128 0x3
-	.4byte	.LASF312
-	.byte	0x10
-	.byte	0x25
-	.4byte	0x2c
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a27
-	.uleb128 0x3
-	.4byte	.LASF313
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-	.byte	0x38
-	.4byte	0x9d
-	.uleb128 0x3
-	.4byte	.LASF314
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-	.byte	0xb
-	.4byte	0x1a33
-	.uleb128 0x3
-	.4byte	.LASF315
-	.byte	0x11
-	.byte	0x2c
-	.4byte	0x1a56
-	.uleb128 0x3
-	.4byte	.LASF316
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-	.byte	0x35
-	.4byte	0x1a45
-	.uleb128 0x3
-	.4byte	.LASF317
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-	.4byte	0x33
-	.uleb128 0x4
-	.4byte	0x1a82
-	.uleb128 0x3
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-	.uleb128 0x3
-	.4byte	.LASF319
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-	.byte	0x59
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-	.uleb128 0x3
-	.4byte	.LASF320
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-	.byte	0x5b
-	.4byte	0x19b3
-	.uleb128 0x3
-	.4byte	.LASF321
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-	.byte	0x69
-	.4byte	0x19c5
-	.uleb128 0x3
-	.4byte	.LASF322
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-	.byte	0x6b
-	.4byte	0x19db
-	.uleb128 0x3
-	.4byte	.LASF323
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-	.byte	0x6f
-	.4byte	0x19e6
-	.uleb128 0x3
-	.4byte	.LASF324
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-	.byte	0x95
-	.4byte	0x19d0
-	.uleb128 0x3
-	.4byte	.LASF325
-	.byte	0x11
-	.byte	0x97
-	.4byte	0x19db
-	.uleb128 0x2b
-	.byte	0x4
-	.uleb128 0x8
-	.4byte	.LASF326
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-	.byte	0xb
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-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x2
-	.4byte	.LASF327
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-	.4byte	0x1a27
-	.4byte	0x1b09
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x19
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-	.4byte	0x1afe
-	.uleb128 0x19
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-	.4byte	0x1afe
-	.uleb128 0x19
-	.4byte	.LASF330
-	.byte	0x13
-	.2byte	0x143
-	.4byte	0x1afe
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-	.uleb128 0x7
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-	.4byte	.LASF333
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-	.uleb128 0xa
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-	.2byte	0x80c
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-	.uleb128 0x6
-	.4byte	0x1c68
-	.4byte	0x1c7e
-	.uleb128 0x7
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-	.uleb128 0x8
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-	.4byte	0x1c73
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4
-	.4byte	.LASF344
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-	.uleb128 0xa
-	.4byte	.LASF338
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-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF347
-	.byte	0x50
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-	.4byte	0x1ce6
-	.uleb128 0xb
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-	.4byte	0x19b3
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF338
-	.byte	0x18
-	.byte	0x17
-	.4byte	0x1a16
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF200
-	.byte	0x18
-	.byte	0x18
-	.4byte	0x1ce6
-	.byte	0x8
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1c90
-	.4byte	0x1cf6
-	.uleb128 0xd
-	.4byte	0x2aa
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-	.uleb128 0x2e
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-	.byte	0xa0
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-	.byte	0x1b
-	.4byte	0x1d1b
-	.uleb128 0xa
-	.4byte	.LASF348
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-	.uleb128 0xa
-	.4byte	.LASF196
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-	.4byte	0x1cb5
-	.byte	0x50
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-	.uleb128 0x2f
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-	.uleb128 0xa
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-	.uleb128 0xa
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-	.byte	0x64
-	.uleb128 0x23
-	.4byte	.LASF424
-	.byte	0x1d
-	.2byte	0x164
-	.4byte	0x1a21
-	.byte	0x68
-	.uleb128 0x23
-	.4byte	.LASF425
-	.byte	0x1d
-	.2byte	0x165
-	.4byte	0x8f
-	.byte	0x6c
-	.uleb128 0x23
-	.4byte	.LASF426
-	.byte	0x1d
-	.2byte	0x167
-	.4byte	0x1aea
-	.byte	0x70
-	.uleb128 0x23
-	.4byte	.LASF427
-	.byte	0x1d
-	.2byte	0x168
-	.4byte	0x1a21
-	.byte	0x74
-	.uleb128 0x23
-	.4byte	.LASF428
-	.byte	0x1d
-	.2byte	0x169
-	.4byte	0x8f
-	.byte	0x78
-	.uleb128 0x29
-	.ascii	"os\000"
-	.byte	0x1d
-	.2byte	0x16d
-	.4byte	0x2089
-	.byte	0x7c
-	.uleb128 0x29
-	.ascii	"ep\000"
-	.byte	0x1d
-	.2byte	0x16e
-	.4byte	0x1aa8
-	.byte	0x94
-	.uleb128 0x23
-	.4byte	.LASF429
-	.byte	0x1d
-	.2byte	0x170
-	.4byte	0x1aa8
-	.byte	0x98
-	.uleb128 0x23
-	.4byte	.LASF430
-	.byte	0x1d
-	.2byte	0x170
-	.4byte	0x1aa8
-	.byte	0x9c
-	.uleb128 0x23
-	.4byte	.LASF431
-	.byte	0x1d
-	.2byte	0x172
-	.4byte	0x1a50
-	.byte	0xa0
-	.uleb128 0x23
-	.4byte	.LASF432
-	.byte	0x1d
-	.2byte	0x173
-	.4byte	0x1aa8
-	.byte	0xa4
-	.uleb128 0x23
-	.4byte	.LASF433
-	.byte	0x1d
-	.2byte	0x175
-	.4byte	0x1aa8
-	.byte	0xa8
-	.uleb128 0x23
-	.4byte	.LASF434
-	.byte	0x1d
-	.2byte	0x176
-	.4byte	0x1aa8
-	.byte	0xac
-	.uleb128 0x23
-	.4byte	.LASF435
-	.byte	0x1d
-	.2byte	0x177
-	.4byte	0x1aa8
-	.byte	0xb0
-	.uleb128 0x23
-	.4byte	.LASF436
-	.byte	0x1d
-	.2byte	0x178
-	.4byte	0x1aa8
-	.byte	0xb4
-	.uleb128 0x29
-	.ascii	"kbd\000"
-	.byte	0x1d
-	.2byte	0x179
-	.4byte	0x222e
-	.byte	0xb8
-	.uleb128 0x23
-	.4byte	.LASF437
-	.byte	0x1d
-	.2byte	0x17c
-	.4byte	0x8f
-	.byte	0xbc
-	.uleb128 0x23
-	.4byte	.LASF438
-	.byte	0x1d
-	.2byte	0x189
-	.4byte	0x8f
-	.byte	0xc0
-	.uleb128 0x29
-	.ascii	"lmb\000"
-	.byte	0x1d
-	.2byte	0x18c
-	.4byte	0x1cf6
-	.byte	0xc4
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1ffb
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1e48
-	.uleb128 0x21
-	.4byte	.LASF439
-	.byte	0x1d
-	.2byte	0x18e
-	.4byte	0x2095
-	.uleb128 0x19
-	.4byte	.LASF440
-	.byte	0x1d
-	.2byte	0x190
-	.4byte	0x2234
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1ab3
-	.uleb128 0x1a
-	.4byte	.LASF442
-	.byte	0x4
-	.4byte	0x8f
-	.byte	0x1e
-	.byte	0xe
-	.4byte	0x244f
-	.uleb128 0x1b
-	.4byte	.LASF443
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF444
-	.byte	0x1
-	.uleb128 0x1b
-	.4byte	.LASF445
-	.byte	0x2
-	.uleb128 0x1b
-	.4byte	.LASF446
-	.byte	0x3
-	.uleb128 0x1b
-	.4byte	.LASF447
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF448
-	.byte	0x5
-	.uleb128 0x1b
-	.4byte	.LASF449
-	.byte	0x6
-	.uleb128 0x1b
-	.4byte	.LASF450
-	.byte	0x7
-	.uleb128 0x1b
-	.4byte	.LASF451
-	.byte	0x8
-	.uleb128 0x1b
-	.4byte	.LASF452
-	.byte	0x9
-	.uleb128 0x1b
-	.4byte	.LASF453
-	.byte	0xa
-	.uleb128 0x1b
-	.4byte	.LASF454
-	.byte	0xb
-	.uleb128 0x1b
-	.4byte	.LASF455
-	.byte	0xc
-	.uleb128 0x1b
-	.4byte	.LASF456
-	.byte	0xd
-	.uleb128 0x1b
-	.4byte	.LASF457
-	.byte	0xe
-	.uleb128 0x1b
-	.4byte	.LASF458
-	.byte	0xf
-	.uleb128 0x1b
-	.4byte	.LASF459
-	.byte	0x10
-	.uleb128 0x1b
-	.4byte	.LASF460
-	.byte	0x11
-	.uleb128 0x1b
-	.4byte	.LASF461
-	.byte	0x12
-	.uleb128 0x1b
-	.4byte	.LASF462
-	.byte	0x13
-	.uleb128 0x1b
-	.4byte	.LASF463
-	.byte	0x14
-	.uleb128 0x1b
-	.4byte	.LASF464
-	.byte	0x15
-	.uleb128 0x1b
-	.4byte	.LASF465
-	.byte	0x16
-	.uleb128 0x1b
-	.4byte	.LASF466
-	.byte	0x17
-	.uleb128 0x1b
-	.4byte	.LASF467
-	.byte	0x18
-	.uleb128 0x1b
-	.4byte	.LASF468
-	.byte	0x19
-	.uleb128 0x1b
-	.4byte	.LASF469
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-	.uleb128 0x1b
-	.4byte	.LASF470
-	.byte	0x1b
-	.uleb128 0x1b
-	.4byte	.LASF471
-	.byte	0x1c
-	.uleb128 0x1b
-	.4byte	.LASF472
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-	.uleb128 0x1b
-	.4byte	.LASF473
-	.byte	0x1e
-	.uleb128 0x1b
-	.4byte	.LASF474
-	.byte	0x1f
-	.uleb128 0x1b
-	.4byte	.LASF475
-	.byte	0x20
-	.uleb128 0x1b
-	.4byte	.LASF476
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-	.uleb128 0x1b
-	.4byte	.LASF477
-	.byte	0x22
-	.uleb128 0x1b
-	.4byte	.LASF478
-	.byte	0x23
-	.uleb128 0x1b
-	.4byte	.LASF479
-	.byte	0x24
-	.uleb128 0x1b
-	.4byte	.LASF480
-	.byte	0x25
-	.uleb128 0x1b
-	.4byte	.LASF481
-	.byte	0x26
-	.uleb128 0x1b
-	.4byte	.LASF482
-	.byte	0x27
-	.uleb128 0x1b
-	.4byte	.LASF483
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-	.uleb128 0x1b
-	.4byte	.LASF484
-	.byte	0x29
-	.uleb128 0x1b
-	.4byte	.LASF485
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-	.uleb128 0x1b
-	.4byte	.LASF486
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-	.uleb128 0x1b
-	.4byte	.LASF487
-	.byte	0x2c
-	.uleb128 0x1b
-	.4byte	.LASF488
-	.byte	0x2d
-	.uleb128 0x1b
-	.4byte	.LASF489
-	.byte	0x2e
-	.uleb128 0x1b
-	.4byte	.LASF490
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-	.uleb128 0x1b
-	.4byte	.LASF491
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-	.uleb128 0x1b
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-	.uleb128 0x1b
-	.4byte	.LASF493
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-	.uleb128 0x1b
-	.4byte	.LASF494
-	.byte	0x33
-	.uleb128 0x1b
-	.4byte	.LASF495
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-	.uleb128 0x1b
-	.4byte	.LASF496
-	.byte	0x35
-	.uleb128 0x1b
-	.4byte	.LASF497
-	.byte	0x36
-	.uleb128 0x1b
-	.4byte	.LASF498
-	.byte	0x37
-	.uleb128 0x1b
-	.4byte	.LASF499
-	.byte	0x38
-	.uleb128 0x1b
-	.4byte	.LASF500
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-	.uleb128 0x1b
-	.4byte	.LASF501
-	.byte	0x3a
-	.uleb128 0x1b
-	.4byte	.LASF502
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-	.uleb128 0x1b
-	.4byte	.LASF503
-	.byte	0x3c
-	.uleb128 0x1b
-	.4byte	.LASF504
-	.byte	0x3d
-	.uleb128 0x1b
-	.4byte	.LASF505
-	.byte	0x3e
-	.uleb128 0x1b
-	.4byte	.LASF506
-	.byte	0x3f
-	.uleb128 0x1b
-	.4byte	.LASF507
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-	.uleb128 0x1b
-	.4byte	.LASF508
-	.byte	0x41
-	.uleb128 0x1b
-	.4byte	.LASF509
-	.byte	0x42
-	.uleb128 0x1b
-	.4byte	.LASF510
-	.byte	0x43
-	.uleb128 0x1b
-	.4byte	.LASF511
-	.byte	0x44
-	.uleb128 0x1b
-	.4byte	.LASF512
-	.byte	0x45
-	.uleb128 0x1b
-	.4byte	.LASF513
-	.byte	0x46
-	.uleb128 0x1b
-	.4byte	.LASF514
-	.byte	0x47
-	.uleb128 0x1b
-	.4byte	.LASF515
-	.byte	0x48
-	.uleb128 0x1b
-	.4byte	.LASF516
-	.byte	0x49
-	.uleb128 0x1b
-	.4byte	.LASF517
-	.byte	0x4a
-	.uleb128 0x1b
-	.4byte	.LASF518
-	.byte	0x4b
-	.uleb128 0x1b
-	.4byte	.LASF519
-	.byte	0x4c
-	.uleb128 0x1b
-	.4byte	.LASF520
-	.byte	0x4d
-	.uleb128 0x1b
-	.4byte	.LASF521
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-	.uleb128 0x1b
-	.4byte	.LASF522
-	.byte	0x4f
-	.uleb128 0x1b
-	.4byte	.LASF523
-	.byte	0x50
-	.uleb128 0x31
-	.4byte	.LASF524
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-	.byte	0xe0
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-	.uleb128 0x1b
-	.4byte	.LASF525
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-	.uleb128 0x6
-	.4byte	0x1a27
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-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
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-	.uleb128 0x8
-	.4byte	.LASF526
-	.byte	0xd
-	.byte	0xa6
-	.4byte	0x1aa8
-	.uleb128 0x6
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-	.uleb128 0x7
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-	.uleb128 0x8
-	.4byte	.LASF527
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-	.byte	0xa8
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-	.uleb128 0x8
-	.4byte	.LASF528
-	.byte	0xd
-	.byte	0xa9
-	.4byte	0x247d
-	.uleb128 0x8
-	.4byte	.LASF529
-	.byte	0xd
-	.byte	0xf7
-	.4byte	0x1aa8
-	.uleb128 0x8
-	.4byte	.LASF530
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-	.byte	0xf8
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-	.uleb128 0x8
-	.4byte	.LASF531
-	.byte	0xd
-	.byte	0xf9
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-	.uleb128 0x9
-	.4byte	.LASF532
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-	.byte	0x1f
-	.byte	0x2e
-	.4byte	0x24d8
-	.uleb128 0xa
-	.4byte	.LASF533
-	.byte	0x1f
-	.byte	0x2f
-	.4byte	0x1adf
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-	.uleb128 0xc
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-	.uleb128 0x9
-	.4byte	.LASF534
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-	.byte	0x1f
-	.byte	0xa6
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-	.uleb128 0xa
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-	.byte	0xa9
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-	.4byte	.LASF537
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-	.4byte	.LASF538
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-	.4byte	.LASF539
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-	.4byte	.LASF541
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-	.uleb128 0xa
-	.4byte	.LASF542
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-	.byte	0xdb
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-	.byte	0x54
-	.uleb128 0xa
-	.4byte	.LASF647
-	.byte	0x20
-	.byte	0xdd
-	.4byte	0x74
-	.byte	0x58
-	.uleb128 0xa
-	.4byte	.LASF648
-	.byte	0x20
-	.byte	0xde
-	.4byte	0x74
-	.byte	0x5c
-	.uleb128 0xa
-	.4byte	.LASF649
-	.byte	0x20
-	.byte	0xdf
-	.4byte	0x74
-	.byte	0x60
-	.uleb128 0xa
-	.4byte	.LASF600
-	.byte	0x20
-	.byte	0xe1
-	.4byte	0x2d75
-	.byte	0x64
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x2d85
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x66
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF650
-	.byte	0x6
-	.byte	0x20
-	.byte	0xe5
-	.4byte	0x2db6
-	.uleb128 0xa
-	.4byte	.LASF333
-	.byte	0x20
-	.byte	0xe7
-	.4byte	0x57
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF334
-	.byte	0x20
-	.byte	0xe8
-	.4byte	0x57
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF651
-	.byte	0x20
-	.byte	0xe9
-	.4byte	0x57
-	.byte	0x4
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF652
-	.2byte	0x808
-	.byte	0x20
-	.byte	0xec
-	.4byte	0x2e00
-	.uleb128 0xb
-	.ascii	"max\000"
-	.byte	0x20
-	.byte	0xee
-	.4byte	0x57
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF653
-	.byte	0x20
-	.byte	0xef
-	.4byte	0x57
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF654
-	.byte	0x20
-	.byte	0xf0
-	.4byte	0x57
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF602
-	.byte	0x20
-	.byte	0xf1
-	.4byte	0x57
-	.byte	0x6
-	.uleb128 0xb
-	.ascii	"arr\000"
-	.byte	0x20
-	.byte	0xf2
-	.4byte	0x2e00
-	.byte	0x8
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x57
-	.4byte	0x2e11
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF655
-	.byte	0x30
-	.byte	0x20
-	.byte	0xf6
-	.4byte	0x2ea4
-	.uleb128 0xb
-	.ascii	"id\000"
-	.byte	0x20
-	.byte	0xf8
-	.4byte	0x57
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF656
-	.byte	0x20
-	.byte	0xf9
-	.4byte	0x57
-	.byte	0x2
-	.uleb128 0xa
-	.4byte	.LASF657
-	.byte	0x20
-	.byte	0xfa
-	.4byte	0x57
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF658
-	.byte	0x20
-	.byte	0xfb
-	.4byte	0x3a
-	.byte	0x6
-	.uleb128 0xa
-	.4byte	.LASF659
-	.byte	0x20
-	.byte	0xfc
-	.4byte	0x3a
-	.byte	0x7
-	.uleb128 0xa
-	.4byte	.LASF660
-	.byte	0x20
-	.byte	0xfd
-	.4byte	0x3a
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF661
-	.byte	0x20
-	.byte	0xfe
-	.4byte	0x3a
-	.byte	0x9
-	.uleb128 0xa
-	.4byte	.LASF662
-	.byte	0x20
-	.byte	0xff
-	.4byte	0x3a
-	.byte	0xa
-	.uleb128 0x23
-	.4byte	.LASF663
-	.byte	0x20
-	.2byte	0x100
-	.4byte	0x3a
-	.byte	0xb
-	.uleb128 0x23
-	.4byte	.LASF383
-	.byte	0x20
-	.2byte	0x101
-	.4byte	0x74
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF664
-	.byte	0x20
-	.2byte	0x102
-	.4byte	0x2ea4
-	.byte	0x10
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x57
-	.4byte	0x2eb4
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF665
-	.byte	0xc
-	.byte	0x20
-	.2byte	0x106
-	.4byte	0x2ee9
-	.uleb128 0x23
-	.4byte	.LASF666
-	.byte	0x20
-	.2byte	0x108
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF667
-	.byte	0x20
-	.2byte	0x109
-	.4byte	0x74
-	.byte	0x4
-	.uleb128 0x29
-	.ascii	"lpa\000"
-	.byte	0x20
-	.2byte	0x10a
-	.4byte	0x74
-	.byte	0x8
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF668
-	.byte	0xc
-	.byte	0x20
-	.2byte	0x10d
-	.4byte	0x2f1e
-	.uleb128 0x23
-	.4byte	.LASF17
-	.byte	0x20
-	.2byte	0x10f
-	.4byte	0x13e
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF18
-	.byte	0x20
-	.2byte	0x110
-	.4byte	0x13e
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF669
-	.byte	0x20
-	.2byte	0x111
-	.4byte	0x74
-	.byte	0x8
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF670
-	.byte	0x21
-	.byte	0x12
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_type
-	.uleb128 0x35
-	.4byte	.LASF671
-	.byte	0x21
-	.byte	0x13
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.uleb128 0x35
-	.4byte	.LASF672
-	.byte	0x21
-	.byte	0x14
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.uleb128 0x35
-	.4byte	.LASF673
-	.byte	0x21
-	.byte	0x15
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.uleb128 0x35
-	.4byte	.LASF674
-	.byte	0x21
-	.byte	0x16
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x35
-	.4byte	.LASF675
-	.byte	0x21
-	.byte	0x17
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_num
-	.uleb128 0x35
-	.4byte	.LASF676
-	.byte	0x21
-	.byte	0x18
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x35
-	.4byte	.LASF677
-	.byte	0x21
-	.byte	0x19
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_ext_blk_pre_plane
-	.uleb128 0x35
-	.4byte	.LASF678
-	.byte	0x21
-	.byte	0x1a
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x35
-	.4byte	.LASF679
-	.byte	0x21
-	.byte	0x1c
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x35
-	.4byte	.LASF680
-	.byte	0x21
-	.byte	0x1d
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x35
-	.4byte	.LASF681
-	.byte	0x21
-	.byte	0x1e
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x35
-	.4byte	.LASF682
-	.byte	0x21
-	.byte	0x1f
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x35
-	.4byte	.LASF683
-	.byte	0x21
-	.byte	0x20
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x35
-	.4byte	.LASF684
-	.byte	0x21
-	.byte	0x26
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x35
-	.4byte	.LASF685
-	.byte	0x21
-	.byte	0x27
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x35
-	.4byte	.LASF686
-	.byte	0x21
-	.byte	0x28
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_reserved_blks
-	.uleb128 0x35
-	.4byte	.LASF687
-	.byte	0x21
-	.byte	0x29
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x35
-	.4byte	.LASF688
-	.byte	0x21
-	.byte	0x2b
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x35
-	.4byte	.LASF689
-	.byte	0x21
-	.byte	0x2c
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x35
-	.4byte	.LASF690
-	.byte	0x21
-	.byte	0x2e
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x35
-	.4byte	.LASF691
-	.byte	0x21
-	.byte	0x30
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF692
-	.byte	0x21
-	.byte	0x31
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.uleb128 0x35
-	.4byte	.LASF693
-	.byte	0x21
-	.byte	0x32
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x35
-	.4byte	.LASF694
-	.byte	0x21
-	.byte	0x33
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_vendor_part_size
-	.uleb128 0x35
-	.4byte	.LASF695
-	.byte	0x21
-	.byte	0x34
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF696
-	.byte	0x21
-	.byte	0x35
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF697
-	.byte	0x21
-	.byte	0x36
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x35
-	.4byte	.LASF698
-	.byte	0x21
-	.byte	0x37
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF699
-	.byte	0x21
-	.byte	0x38
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x35
-	.4byte	.LASF700
-	.byte	0x21
-	.byte	0x39
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_data_blks
-	.uleb128 0x35
-	.4byte	.LASF701
-	.byte	0x21
-	.byte	0x3a
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x35
-	.4byte	.LASF702
-	.byte	0x21
-	.byte	0x3c
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalSysVersion
-	.uleb128 0x35
-	.4byte	.LASF703
-	.byte	0x21
-	.byte	0x3d
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalDataVersion
-	.uleb128 0x35
-	.4byte	.LASF704
-	.byte	0x21
-	.byte	0x3e
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbaSector
-	.uleb128 0x35
-	.4byte	.LASF705
-	.byte	0x21
-	.byte	0x3f
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLpn
-	.uleb128 0x35
-	.4byte	.LASF706
-	.byte	0x21
-	.byte	0x40
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_VaildLpn
-	.uleb128 0x35
-	.4byte	.LASF707
-	.byte	0x21
-	.byte	0x41
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbn
-	.uleb128 0x35
-	.4byte	.LASF708
-	.byte	0x21
-	.byte	0x42
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_SlcPartLbaEndSector
-	.uleb128 0x35
-	.4byte	.LASF709
-	.byte	0x21
-	.byte	0x43
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_inkDie_check_enable
-	.uleb128 0x35
-	.4byte	.LASF710
-	.byte	0x21
-	.byte	0x44
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_flash_read_only_en
-	.uleb128 0x35
-	.4byte	.LASF711
-	.byte	0x21
-	.byte	0x46
-	.4byte	0x27bd
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBbtInfo
-	.uleb128 0x35
-	.4byte	.LASF712
-	.byte	0x21
-	.byte	0x47
-	.4byte	0x283d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysInfo
-	.uleb128 0x35
-	.4byte	.LASF713
-	.byte	0x21
-	.byte	0x48
-	.4byte	0x2db6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.uleb128 0x35
-	.4byte	.LASF714
-	.byte	0x21
-	.byte	0x49
-	.4byte	0x2885
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gL2pMapInfo
-	.uleb128 0x35
-	.4byte	.LASF715
-	.byte	0x21
-	.byte	0x4a
-	.4byte	0x2885
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gVendorBlkInfo
-	.uleb128 0x35
-	.4byte	.LASF716
-	.byte	0x21
-	.byte	0x4b
-	.4byte	0xc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_sys
-	.uleb128 0x35
-	.4byte	.LASF717
-	.byte	0x21
-	.byte	0x4c
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_read
-	.uleb128 0x35
-	.4byte	.LASF718
-	.byte	0x21
-	.byte	0x4d
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_prgm
-	.uleb128 0x35
-	.4byte	.LASF719
-	.byte	0x21
-	.byte	0x4e
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_erase
-	.uleb128 0x35
-	.4byte	.LASF720
-	.byte	0x21
-	.byte	0x4f
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc
-	.uleb128 0x35
-	.4byte	.LASF721
-	.byte	0x21
-	.byte	0x50
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc_dst
-	.uleb128 0x35
-	.4byte	.LASF722
-	.byte	0x21
-	.byte	0x52
-	.4byte	0x676
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_req_cache
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x32b3
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF723
-	.byte	0x21
-	.byte	0x54
-	.4byte	0x32a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_plane_order_table
-	.uleb128 0x35
-	.4byte	.LASF724
-	.byte	0x21
-	.byte	0x5e
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf
-	.uleb128 0x35
-	.4byte	.LASF725
-	.byte	0x21
-	.byte	0x5f
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf_1
-	.uleb128 0x35
-	.4byte	.LASF726
-	.byte	0x21
-	.byte	0x60
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_data_buf
-	.uleb128 0x35
-	.4byte	.LASF727
-	.byte	0x21
-	.byte	0x61
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.uleb128 0x35
-	.4byte	.LASF728
-	.byte	0x21
-	.byte	0x62
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_0
-	.uleb128 0x35
-	.4byte	.LASF729
-	.byte	0x21
-	.byte	0x63
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_1
-	.uleb128 0x35
-	.4byte	.LASF730
-	.byte	0x21
-	.byte	0x64
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_spare_buf
-	.uleb128 0x35
-	.4byte	.LASF731
-	.byte	0x21
-	.byte	0x65
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_spare_buf
-	.uleb128 0x35
-	.4byte	.LASF732
-	.byte	0x21
-	.byte	0x66
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_data_buf
-	.uleb128 0x35
-	.4byte	.LASF733
-	.byte	0x21
-	.byte	0x67
-	.4byte	0x336e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_gc_page_buf_info
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2ee9
-	.uleb128 0x35
-	.4byte	.LASF734
-	.byte	0x21
-	.byte	0x68
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_gc_page_buf_num
-	.uleb128 0x35
-	.4byte	.LASF735
-	.byte	0x21
-	.byte	0x69
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_num_req
-	.uleb128 0x35
-	.4byte	.LASF736
-	.byte	0x21
-	.byte	0x6b
-	.4byte	0x33a7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_ect_tbl_info
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x297d
-	.uleb128 0x35
-	.4byte	.LASF737
-	.byte	0x21
-	.byte	0x6c
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_info_size
-	.uleb128 0x35
-	.4byte	.LASF738
-	.byte	0x21
-	.byte	0x70
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_erase_count_table
-	.uleb128 0x35
-	.4byte	.LASF739
-	.byte	0x21
-	.byte	0x72
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_swl_mul_table
-	.uleb128 0x35
-	.4byte	.LASF740
-	.byte	0x21
-	.byte	0x73
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_swl_count
-	.uleb128 0x35
-	.4byte	.LASF741
-	.byte	0x21
-	.byte	0x74
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.uleb128 0x35
-	.4byte	.LASF742
-	.byte	0x21
-	.byte	0x75
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_check_table
-	.uleb128 0x35
-	.4byte	.LASF743
-	.byte	0x21
-	.byte	0x76
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_blk_mode_table
-	.uleb128 0x35
-	.4byte	.LASF744
-	.byte	0x21
-	.byte	0x78
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_table
-	.uleb128 0x35
-	.4byte	.LASF745
-	.byte	0x21
-	.byte	0x79
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_valid_page_count
-	.uleb128 0x35
-	.4byte	.LASF746
-	.byte	0x21
-	.byte	0x7a
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_ver_table
-	.uleb128 0x35
-	.4byte	.LASF747
-	.byte	0x21
-	.byte	0x7b
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_table
-	.uleb128 0x35
-	.4byte	.LASF748
-	.byte	0x21
-	.byte	0x7c
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_check_table
-	.uleb128 0x35
-	.4byte	.LASF749
-	.byte	0x21
-	.byte	0x7d
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_map_block
-	.uleb128 0x35
-	.4byte	.LASF750
-	.byte	0x21
-	.byte	0x7f
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_table
-	.uleb128 0x35
-	.4byte	.LASF751
-	.byte	0x21
-	.byte	0x80
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_valid_page_count
-	.uleb128 0x35
-	.4byte	.LASF752
-	.byte	0x21
-	.byte	0x81
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_ver_table
-	.uleb128 0x35
-	.4byte	.LASF753
-	.byte	0x21
-	.byte	0x82
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_region_ppn_table
-	.uleb128 0x35
-	.4byte	.LASF754
-	.byte	0x21
-	.byte	0x83
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_vendor_block
-	.uleb128 0x35
-	.4byte	.LASF755
-	.byte	0x21
-	.byte	0x85
-	.4byte	0x34f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_ram_map
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2940
-	.uleb128 0x35
-	.4byte	.LASF756
-	.byte	0x21
-	.byte	0x86
-	.4byte	0x13e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_map_buf
-	.uleb128 0x35
-	.4byte	.LASF757
-	.byte	0x21
-	.byte	0x87
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_l2p_last_update_region_id
-	.uleb128 0x35
-	.4byte	.LASF758
-	.byte	0x21
-	.byte	0x8e
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2d85
-	.uleb128 0x35
-	.4byte	.LASF759
-	.byte	0x21
-	.byte	0x8f
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_free_data_block_list_head
-	.uleb128 0x35
-	.4byte	.LASF760
-	.byte	0x21
-	.byte	0x91
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_head
-	.uleb128 0x35
-	.4byte	.LASF761
-	.byte	0x21
-	.byte	0x92
-	.4byte	0x3529
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_tail
-	.uleb128 0x35
-	.4byte	.LASF762
-	.byte	0x21
-	.byte	0x93
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.uleb128 0x35
-	.4byte	.LASF763
-	.byte	0x21
-	.byte	0x94
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.uleb128 0x35
-	.4byte	.LASF764
-	.byte	0x21
-	.byte	0x95
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_active_superblock
-	.uleb128 0x35
-	.4byte	.LASF765
-	.byte	0x21
-	.byte	0x96
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.uleb128 0x35
-	.4byte	.LASF766
-	.byte	0x21
-	.byte	0x97
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.uleb128 0x35
-	.4byte	.LASF767
-	.byte	0x21
-	.byte	0x98
-	.4byte	0x2e11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_superblock
-	.uleb128 0x35
-	.4byte	.LASF768
-	.byte	0x21
-	.byte	0x99
-	.4byte	0x35d9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_last_act_superblock
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2e11
-	.uleb128 0x35
-	.4byte	.LASF769
-	.byte	0x21
-	.byte	0x9a
-	.4byte	0x2b32
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_save_data
-	.uleb128 0x35
-	.4byte	.LASF770
-	.byte	0x21
-	.byte	0x9b
-	.4byte	0x2c2f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_ext_data
-	.uleb128 0x35
-	.4byte	.LASF771
-	.byte	0x21
-	.byte	0x9d
-	.4byte	0x3612
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_page_info
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2eb4
-	.uleb128 0x35
-	.4byte	.LASF772
-	.byte	0x21
-	.byte	0x9e
-	.4byte	0x293a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_blk_tbl
-	.uleb128 0x35
-	.4byte	.LASF773
-	.byte	0x21
-	.byte	0x9f
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_num
-	.uleb128 0x35
-	.4byte	.LASF774
-	.byte	0x21
-	.byte	0xa0
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_page_offset
-	.uleb128 0x35
-	.4byte	.LASF775
-	.byte	0x21
-	.byte	0xa1
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x35
-	.4byte	.LASF776
-	.byte	0x21
-	.byte	0xa2
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x35
-	.4byte	.LASF777
-	.byte	0x21
-	.byte	0xa3
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk
-	.uleb128 0x35
-	.4byte	.LASF778
-	.byte	0x21
-	.byte	0xa4
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk_1
-	.uleb128 0x35
-	.4byte	.LASF779
-	.byte	0x21
-	.byte	0xa5
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_num
-	.uleb128 0x35
-	.4byte	.LASF780
-	.byte	0x21
-	.byte	0xa6
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_gc_index
-	.uleb128 0x6
-	.4byte	0x57
-	.4byte	0x36c1
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x10
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF781
-	.byte	0x21
-	.byte	0xa7
-	.4byte	0x36b1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x35
-	.4byte	.LASF782
-	.byte	0x21
-	.byte	0xa8
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_refresh_block_temp_num
-	.uleb128 0x35
-	.4byte	.LASF783
-	.byte	0x21
-	.byte	0xa9
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_free_slc_blk_num
-	.uleb128 0x35
-	.4byte	.LASF784
-	.byte	0x21
-	.byte	0xaa
-	.4byte	0x36b1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_refresh_block_temp_tbl
-	.uleb128 0x35
-	.4byte	.LASF785
-	.byte	0x21
-	.byte	0xac
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_free_blk_threshold
-	.uleb128 0x35
-	.4byte	.LASF786
-	.byte	0x21
-	.byte	0xad
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x35
-	.4byte	.LASF787
-	.byte	0x21
-	.byte	0xae
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_index
-	.uleb128 0x35
-	.4byte	.LASF788
-	.byte	0x21
-	.byte	0xb0
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_gc_page_count
-	.uleb128 0x35
-	.4byte	.LASF789
-	.byte	0x21
-	.byte	0xb1
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_page_count
-	.uleb128 0x35
-	.4byte	.LASF790
-	.byte	0x21
-	.byte	0xb2
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_sector
-	.uleb128 0x35
-	.4byte	.LASF791
-	.byte	0x21
-	.byte	0xb3
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_sector
-	.uleb128 0x35
-	.4byte	.LASF792
-	.byte	0x21
-	.byte	0xb5
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_discard_page_count
-	.uleb128 0x35
-	.4byte	.LASF793
-	.byte	0x21
-	.byte	0xb6
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_page_count
-	.uleb128 0x35
-	.4byte	.LASF794
-	.byte	0x21
-	.byte	0xb7
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_tmp_data_superblock_id
-	.uleb128 0x35
-	.4byte	.LASF795
-	.byte	0x21
-	.byte	0xb8
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_cache_write_count
-	.uleb128 0x35
-	.4byte	.LASF796
-	.byte	0x21
-	.byte	0xb9
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_l2p_write_count
-	.uleb128 0x35
-	.4byte	.LASF797
-	.byte	0x21
-	.byte	0xbb
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_mlc_erase_count
-	.uleb128 0x35
-	.4byte	.LASF798
-	.byte	0x21
-	.byte	0xbc
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_avg_erase_count
-	.uleb128 0x35
-	.4byte	.LASF799
-	.byte	0x21
-	.byte	0xbd
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_min_erase_count
-	.uleb128 0x35
-	.4byte	.LASF800
-	.byte	0x21
-	.byte	0xbe
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_slc_erase_count
-	.uleb128 0x35
-	.4byte	.LASF801
-	.byte	0x21
-	.byte	0xbf
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_sys_slc_erase_count
-	.uleb128 0x35
-	.4byte	.LASF802
-	.byte	0x21
-	.byte	0xc0
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_max_erase_count
-	.uleb128 0x35
-	.4byte	.LASF803
-	.byte	0x21
-	.byte	0xc1
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_all_blk_used_slc_mode
-	.uleb128 0x35
-	.4byte	.LASF804
-	.byte	0x21
-	.byte	0xc3
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_gc_progress
-	.uleb128 0x35
-	.4byte	.LASF805
-	.byte	0x21
-	.byte	0xc4
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_swl_replace
-	.uleb128 0x35
-	.4byte	.LASF806
-	.byte	0x21
-	.byte	0xc5
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ftl_nand_free_count
-	.uleb128 0x35
-	.4byte	.LASF807
-	.byte	0x21
-	.byte	0xc6
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block
-	.uleb128 0x35
-	.4byte	.LASF808
-	.byte	0x21
-	.byte	0xc7
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block_count
-	.uleb128 0x35
-	.4byte	.LASF809
-	.byte	0x21
-	.byte	0xc8
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_skip_write_count
-	.uleb128 0x35
-	.4byte	.LASF810
-	.byte	0x21
-	.byte	0xc9
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_cur_erase_blk
-	.uleb128 0x35
-	.4byte	.LASF811
-	.byte	0x21
-	.byte	0xcb
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_num
-	.uleb128 0x35
-	.4byte	.LASF812
-	.byte	0x21
-	.byte	0xcc
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.uleb128 0x6
-	.4byte	0x74
-	.4byte	0x38f1
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF813
-	.byte	0x21
-	.byte	0xcd
-	.4byte	0x38e1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_ppa_tbl
-	.uleb128 0x35
-	.4byte	.LASF814
-	.byte	0x21
-	.byte	0xce
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_mlc_erase_count_value
-	.uleb128 0x35
-	.4byte	.LASF815
-	.byte	0x21
-	.byte	0xcf
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_recovery_flag
-	.uleb128 0x35
-	.4byte	.LASF816
-	.byte	0x21
-	.byte	0xd0
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_ecc_error_blk
-	.uleb128 0x35
-	.4byte	.LASF817
-	.byte	0x21
-	.byte	0xd1
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_page_map_check_enable
-	.uleb128 0x8
-	.4byte	.LASF818
-	.byte	0x22
-	.byte	0xe
-	.4byte	0x74
-	.uleb128 0x6
-	.4byte	0x2c1
-	.4byte	0x3961
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x36
-	.4byte	.LASF101
-	.byte	0x2
-	.byte	0x10
-	.4byte	0x3951
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	NandOptPara
-	.uleb128 0x6
-	.4byte	0x3e9
-	.4byte	0x3982
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x49
-	.byte	0
-	.uleb128 0x36
-	.4byte	.LASF819
-	.byte	0x2
-	.byte	0x5f
-	.4byte	0x3972
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	NandFlashParaTbl
-	.uleb128 0x37
-	.4byte	0xa80
-	.byte	0x2
-	.byte	0xca
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gNandParaInfo
-	.uleb128 0x35
-	.4byte	.LASF820
-	.byte	0x2
-	.byte	0xcb
-	.4byte	0x3e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSlcNandParaInfo
-	.uleb128 0x6
-	.4byte	0x57
-	.4byte	0x39c1
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF821
-	.byte	0x2
-	.byte	0xdb
-	.4byte	0x39b1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	random_seed
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x39e8
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x6
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF822
-	.byte	0x2
-	.2byte	0x547
-	.4byte	0x39d2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	refValueDefault
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a10
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x3
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF823
-	.byte	0x2
-	.2byte	0x644
-	.4byte	0x39fa
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	SamsungRefValue
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a38
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x8
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x4
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF824
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0x3a22
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ToshibaA19RefValue
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a60
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x12
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x4
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF825
-	.byte	0x2
-	.2byte	0x670
-	.4byte	0x3a4a
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	Toshiba15RefValue
-	.uleb128 0x6
-	.4byte	0x45
-	.4byte	0x3a82
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x15
-	.4byte	.LASF826
-	.byte	0x2
-	.2byte	0x688
-	.4byte	0x3a72
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ToshibaRefValue
-	.uleb128 0x35
-	.4byte	.LASF827
-	.byte	0x4
-	.byte	0x6
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DeviceCapacity
-	.uleb128 0x35
-	.4byte	.LASF828
-	.byte	0x4
-	.byte	0x7
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFtlInitStatus
-	.uleb128 0x16
-	.4byte	0x3946
-	.byte	0x4
-	.2byte	0x38f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_LowFormat
-	.uleb128 0x15
-	.4byte	.LASF829
-	.byte	0x4
-	.2byte	0x638
-	.4byte	0x8f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	power_up_flag
-	.uleb128 0x38
-	.4byte	.LASF830
-	.byte	0x4
-	.2byte	0x6f1
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_discard_updated
-	.uleb128 0x15
-	.4byte	.LASF831
-	.byte	0x1
-	.2byte	0x3da
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_power_up_flush
-	.uleb128 0x15
-	.4byte	.LASF832
-	.byte	0x1
-	.2byte	0x3f0
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlUpdateVaildLpnCount
-	.uleb128 0x36
-	.4byte	.LASF833
-	.byte	0x6
-	.byte	0x6c
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_block_bops_scan_page_addr
-	.uleb128 0x15
-	.4byte	.LASF834
-	.byte	0x6
-	.2byte	0x213
-	.4byte	0x57
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_ink_free_return_value
-	.uleb128 0x19
-	.4byte	.LASF835
-	.byte	0x23
-	.2byte	0x3ba
-	.4byte	0x1aa8
-	.uleb128 0x19
-	.4byte	.LASF836
-	.byte	0x23
-	.2byte	0x3bb
-	.4byte	0x1aa8
-	.uleb128 0x19
-	.4byte	.LASF837
-	.byte	0x23
-	.2byte	0x3bc
-	.4byte	0x1aa8
-	.uleb128 0x39
-	.4byte	.LASF1582
-	.byte	0
-	.byte	0x8
-	.byte	0x9
-	.uleb128 0x3
-	.4byte	.LASF838
-	.byte	0x8
-	.byte	0xa
-	.4byte	0x3b53
-	.uleb128 0x9
-	.4byte	.LASF839
-	.byte	0x4
-	.byte	0x8
-	.byte	0xc
-	.4byte	0x3b7f
-	.uleb128 0xb
-	.ascii	"pid\000"
-	.byte	0x8
-	.byte	0xd
-	.4byte	0x8f
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF840
-	.byte	0x8
-	.byte	0x10
-	.4byte	0x3b8a
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3b66
-	.uleb128 0x9
-	.4byte	.LASF841
-	.byte	0x4
-	.byte	0x8
-	.byte	0x57
-	.4byte	0x3ba8
-	.uleb128 0xb
-	.ascii	"sz\000"
-	.byte	0x8
-	.byte	0x57
-	.4byte	0x8f
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF842
-	.byte	0x8
-	.byte	0xd8
-	.4byte	0x3b5b
-	.uleb128 0x9
-	.4byte	.LASF843
-	.byte	0x4
-	.byte	0x8
-	.byte	0xfa
-	.4byte	0x3bca
-	.uleb128 0xb
-	.ascii	"i\000"
-	.byte	0x8
-	.byte	0xfa
-	.4byte	0x8f
-	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF844
-	.byte	0x18
-	.byte	0x8
-	.byte	0xff
-	.4byte	0x3c25
-	.uleb128 0x23
-	.4byte	.LASF845
-	.byte	0x8
-	.2byte	0x100
-	.4byte	0x3c25
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF846
-	.byte	0x8
-	.2byte	0x101
-	.4byte	0x3c30
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF847
-	.byte	0x8
-	.2byte	0x102
-	.4byte	0x1a61
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF848
-	.byte	0x8
-	.2byte	0x103
-	.4byte	0x3c41
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF849
-	.byte	0x8
-	.2byte	0x105
-	.4byte	0x1aea
-	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF850
-	.byte	0x8
-	.2byte	0x106
-	.4byte	0x1aea
-	.byte	0x14
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3bca
-	.uleb128 0x2c
-	.4byte	.LASF846
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3c2b
-	.uleb128 0x33
-	.4byte	0x3c41
-	.uleb128 0x18
-	.4byte	0x3c25
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3c36
-	.uleb128 0x28
-	.4byte	.LASF852
-	.byte	0x4
-	.byte	0x8
-	.2byte	0x108
-	.4byte	0x3c60
-	.uleb128 0x29
-	.ascii	"i\000"
-	.byte	0x8
-	.2byte	0x108
-	.4byte	0x8f
-	.byte	0
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF853
-	.byte	0x8
-	.byte	0x8
-	.2byte	0x10b
-	.4byte	0x3c88
-	.uleb128 0x23
-	.4byte	.LASF854
-	.byte	0x8
-	.2byte	0x10c
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x29
-	.ascii	"dev\000"
-	.byte	0x8
-	.2byte	0x10d
-	.4byte	0x1a61
-	.byte	0x4
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF855
-	.byte	0xc
-	.byte	0x24
-	.byte	0x19
-	.4byte	0x3cb9
-	.uleb128 0xa
-	.4byte	.LASF856
-	.byte	0x24
-	.byte	0x1a
-	.4byte	0x19b3
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF857
-	.byte	0x24
-	.byte	0x1b
-	.4byte	0x3cb9
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF858
-	.byte	0x24
-	.byte	0x1c
-	.4byte	0x3cb9
-	.byte	0x8
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3c88
-	.uleb128 0x9
-	.4byte	.LASF859
-	.byte	0x4
-	.byte	0x24
-	.byte	0x20
-	.4byte	0x3cd8
-	.uleb128 0xa
-	.4byte	.LASF855
-	.byte	0x24
-	.byte	0x21
-	.4byte	0x3cb9
-	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF860
-	.byte	0xc
-	.byte	0x25
-	.byte	0x87
-	.4byte	0x3d09
-	.uleb128 0xa
-	.4byte	.LASF176
-	.byte	0x25
-	.byte	0x88
-	.4byte	0x19db
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF861
-	.byte	0x25
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-	.uleb128 0xa
-	.4byte	.LASF862
-	.byte	0x25
-	.byte	0x8a
-	.4byte	0x19db
-	.byte	0x8
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF863
-	.byte	0x8
-	.byte	0x25
-	.byte	0xd1
-	.4byte	0x3d2e
-	.uleb128 0xa
-	.4byte	.LASF864
-	.byte	0x25
-	.byte	0xd2
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-	.uleb128 0xa
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-	.byte	0xd3
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-	.uleb128 0x9
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-	.byte	0x10
-	.byte	0x25
-	.byte	0xef
-	.4byte	0x3d6b
-	.uleb128 0xa
-	.4byte	.LASF866
-	.byte	0x25
-	.byte	0xf0
-	.4byte	0x19db
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-	.uleb128 0xa
-	.4byte	.LASF867
-	.byte	0x25
-	.byte	0xf1
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-	.uleb128 0xa
-	.4byte	.LASF868
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-	.byte	0xf2
-	.4byte	0x19db
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF869
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-	.byte	0xf3
-	.4byte	0x19db
-	.byte	0xc
-	.byte	0
-	.uleb128 0x9
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-	.byte	0x26
-	.byte	0x2a
-	.4byte	0x3e14
-	.uleb128 0xb
-	.ascii	"mtd\000"
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-	.byte	0x2b
-	.4byte	0x4067
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF201
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-	.byte	0x2c
-	.4byte	0x1ac9
-	.byte	0x8
-	.uleb128 0xb
-	.ascii	"len\000"
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-	.byte	0x2d
-	.4byte	0x1ac9
-	.byte	0x10
-	.uleb128 0xa
-	.4byte	.LASF871
-	.byte	0x26
-	.byte	0x2e
-	.4byte	0x1ac9
-	.byte	0x18
-	.uleb128 0xa
-	.4byte	.LASF872
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-	.byte	0x2f
-	.4byte	0x1a92
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-	.uleb128 0xa
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-	.byte	0x30
-	.4byte	0x1a92
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-	.uleb128 0xb
-	.ascii	"dev\000"
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-	.uleb128 0xa
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-	.byte	0x32
-	.4byte	0x2c
-	.byte	0x2c
-	.uleb128 0xa
-	.4byte	.LASF875
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-	.4byte	0x407e
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-	.uleb128 0xa
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-	.4byte	0x1a82
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-	.byte	0x36
-	.4byte	0x4078
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-	.uleb128 0xa
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-	.uleb128 0xa
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-	.uleb128 0xa
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-	.uleb128 0xa
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-	.4byte	.LASF892
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-	.byte	0xc2
-	.4byte	0x8f
-	.byte	0x4c
-	.uleb128 0xa
-	.4byte	.LASF893
-	.byte	0x26
-	.byte	0xc3
-	.4byte	0x419b
-	.byte	0x50
-	.uleb128 0xa
-	.4byte	.LASF894
-	.byte	0x26
-	.byte	0xc9
-	.4byte	0x41b5
-	.byte	0x54
-	.uleb128 0xa
-	.4byte	.LASF895
-	.byte	0x26
-	.byte	0xcf
-	.4byte	0x41d9
-	.byte	0x58
-	.uleb128 0xa
-	.4byte	.LASF896
-	.byte	0x26
-	.byte	0xd3
-	.4byte	0x420e
-	.byte	0x5c
-	.uleb128 0xa
-	.4byte	.LASF897
-	.byte	0x26
-	.byte	0xd5
-	.4byte	0x423d
-	.byte	0x60
-	.uleb128 0xa
-	.4byte	.LASF898
-	.byte	0x26
-	.byte	0xd7
-	.4byte	0x423d
-	.byte	0x64
-	.uleb128 0xa
-	.4byte	.LASF899
-	.byte	0x26
-	.byte	0xd9
-	.4byte	0x4262
-	.byte	0x68
-	.uleb128 0xa
-	.4byte	.LASF900
-	.byte	0x26
-	.byte	0xdb
-	.4byte	0x4262
-	.byte	0x6c
-	.uleb128 0xa
-	.4byte	.LASF901
-	.byte	0x26
-	.byte	0xdd
-	.4byte	0x428c
-	.byte	0x70
-	.uleb128 0xa
-	.4byte	.LASF902
-	.byte	0x26
-	.byte	0xdf
-	.4byte	0x420e
-	.byte	0x74
-	.uleb128 0xa
-	.4byte	.LASF903
-	.byte	0x26
-	.byte	0xe1
-	.4byte	0x428c
-	.byte	0x78
-	.uleb128 0xa
-	.4byte	.LASF904
-	.byte	0x26
-	.byte	0xe3
-	.4byte	0x420e
-	.byte	0x7c
-	.uleb128 0xa
-	.4byte	.LASF905
-	.byte	0x26
-	.byte	0xe5
-	.4byte	0x420e
-	.byte	0x80
-	.uleb128 0xa
-	.4byte	.LASF906
-	.byte	0x26
-	.byte	0xe7
-	.4byte	0x42ab
-	.byte	0x84
-	.uleb128 0xa
-	.4byte	.LASF907
-	.byte	0x26
-	.byte	0xed
-	.4byte	0x42bc
-	.byte	0x88
-	.uleb128 0xa
-	.4byte	.LASF908
-	.byte	0x26
-	.byte	0xee
-	.4byte	0x42db
-	.byte	0x8c
-	.uleb128 0xa
-	.4byte	.LASF909
-	.byte	0x26
-	.byte	0xef
-	.4byte	0x42db
-	.byte	0x90
-	.uleb128 0xa
-	.4byte	.LASF910
-	.byte	0x26
-	.byte	0xf0
-	.4byte	0x42db
-	.byte	0x94
-	.uleb128 0xa
-	.4byte	.LASF911
-	.byte	0x26
-	.byte	0xf1
-	.4byte	0x42f5
-	.byte	0x98
-	.uleb128 0xa
-	.4byte	.LASF912
-	.byte	0x26
-	.byte	0xf2
-	.4byte	0x42f5
-	.byte	0x9c
-	.uleb128 0xa
-	.4byte	.LASF913
-	.byte	0x26
-	.byte	0xf3
-	.4byte	0x42f5
-	.byte	0xa0
-	.uleb128 0xa
-	.4byte	.LASF914
-	.byte	0x26
-	.byte	0xfd
-	.4byte	0x430a
-	.byte	0xa4
-	.uleb128 0xa
-	.4byte	.LASF915
-	.byte	0x26
-	.byte	0xfe
-	.4byte	0x42bc
-	.byte	0xa8
-	.uleb128 0x23
-	.4byte	.LASF916
-	.byte	0x26
-	.2byte	0x10a
-	.4byte	0x3d2e
-	.byte	0xac
-	.uleb128 0x23
-	.4byte	.LASF917
-	.byte	0x26
-	.2byte	0x10c
-	.4byte	0x8f
-	.byte	0xbc
-	.uleb128 0x23
-	.4byte	.LASF543
-	.byte	0x26
-	.2byte	0x10e
-	.4byte	0x1aea
-	.byte	0xc0
-	.uleb128 0x23
-	.4byte	.LASF854
-	.byte	0x26
-	.2byte	0x110
-	.4byte	0x4315
-	.byte	0xc4
-	.uleb128 0x29
-	.ascii	"dev\000"
-	.byte	0x26
-	.2byte	0x114
-	.4byte	0x1b42
-	.byte	0xc8
-	.uleb128 0x23
-	.4byte	.LASF918
-	.byte	0x26
-	.2byte	0x116
-	.4byte	0x8f
-	.byte	0xcc
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3e14
-	.uleb128 0x33
-	.4byte	0x4078
-	.uleb128 0x18
-	.4byte	0x4078
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3d6b
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x406d
-	.uleb128 0x9
-	.4byte	.LASF919
-	.byte	0x18
-	.byte	0x26
-	.byte	0x3a
-	.4byte	0x40c1
-	.uleb128 0xa
-	.4byte	.LASF864
-	.byte	0x26
-	.byte	0x3b
-	.4byte	0x1ac9
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF879
-	.byte	0x26
-	.byte	0x3c
-	.4byte	0x1abe
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF920
-	.byte	0x26
-	.byte	0x3d
-	.4byte	0x1abe
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF921
-	.byte	0x26
-	.byte	0x3e
-	.4byte	0x40c1
-	.byte	0x10
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x19b3
-	.uleb128 0x9
-	.4byte	.LASF922
-	.byte	0x20
-	.byte	0x26
-	.byte	0x54
-	.4byte	0x4134
-	.uleb128 0xa
-	.4byte	.LASF923
-	.byte	0x26
-	.byte	0x55
-	.4byte	0x2c
-	.byte	0
-	.uleb128 0xb
-	.ascii	"len\000"
-	.byte	0x26
-	.byte	0x56
-	.4byte	0x1a77
-	.byte	0x4
-	.uleb128 0xa
-	.4byte	.LASF924
-	.byte	0x26
-	.byte	0x57
-	.4byte	0x1a77
-	.byte	0x8
-	.uleb128 0xa
-	.4byte	.LASF925
-	.byte	0x26
-	.byte	0x58
-	.4byte	0x1a77
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF926
-	.byte	0x26
-	.byte	0x59
-	.4byte	0x1a77
-	.byte	0x10
-	.uleb128 0xa
-	.4byte	.LASF927
-	.byte	0x26
-	.byte	0x5a
-	.4byte	0x1abe
-	.byte	0x14
-	.uleb128 0xa
-	.4byte	.LASF928
-	.byte	0x26
-	.byte	0x5b
-	.4byte	0x224c
-	.byte	0x18
-	.uleb128 0xa
-	.4byte	.LASF929
-	.byte	0x26
-	.byte	0x5c
-	.4byte	0x224c
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x13
-	.4byte	.LASF930
-	.2byte	0xba8
-	.byte	0x26
-	.byte	0x71
-	.4byte	0x4174
-	.uleb128 0xa
-	.4byte	.LASF931
-	.byte	0x26
-	.byte	0x72
-	.4byte	0x19db
-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF932
-	.byte	0x26
-	.byte	0x73
-	.4byte	0x4174
-	.byte	0x4
-	.uleb128 0xf
-	.4byte	.LASF883
-	.byte	0x26
-	.byte	0x74
-	.4byte	0x19db
-	.2byte	0xaa4
-	.uleb128 0xf
-	.4byte	.LASF933
-	.byte	0x26
-	.byte	0x75
-	.4byte	0x4185
-	.2byte	0xaa8
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x19db
-	.4byte	0x4185
-	.uleb128 0x14
-	.4byte	0x2aa
-	.2byte	0x2a7
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x3d09
-	.4byte	0x4195
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1f
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4134
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4084
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x41b5
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x4078
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
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-	.uleb128 0x17
-	.4byte	0x19b3
-	.4byte	0x41d9
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x19b3
-	.uleb128 0x18
-	.4byte	0x19b3
-	.uleb128 0x18
-	.4byte	0x19b3
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x41bb
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1a77
-	.uleb128 0x18
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4208
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a77
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a82
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x41df
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x4237
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1a77
-	.uleb128 0x18
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4237
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1a8d
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4214
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x425c
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x425c
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x40c7
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4243
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x4286
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a77
-	.uleb128 0x18
-	.4byte	0x4202
-	.uleb128 0x18
-	.4byte	0x4286
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3cd8
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4268
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x42ab
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1a77
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4292
-	.uleb128 0x33
-	.4byte	0x42bc
-	.uleb128 0x18
-	.4byte	0x4067
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
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-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x42db
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.uleb128 0x18
-	.4byte	0x1ac9
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x42c2
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x42f5
-	.uleb128 0x18
-	.4byte	0x4067
-	.uleb128 0x18
-	.4byte	0x1a6c
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x42e1
-	.uleb128 0x17
-	.4byte	0x8f
-	.4byte	0x430a
-	.uleb128 0x18
-	.4byte	0x4067
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x42fb
-	.uleb128 0x2c
-	.4byte	.LASF934
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4310
-	.uleb128 0x28
-	.4byte	.LASF935
-	.byte	0xac
-	.byte	0x27
-	.2byte	0x161
-	.4byte	0x43ab
-	.uleb128 0x23
-	.4byte	.LASF936
-	.byte	0x27
-	.2byte	0x162
-	.4byte	0x1adf
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF937
-	.byte	0x27
-	.2byte	0x163
-	.4byte	0x1adf
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF938
-	.byte	0x27
-	.2byte	0x164
-	.4byte	0x1adf
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF939
-	.byte	0x27
-	.2byte	0x165
-	.4byte	0x19c5
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF940
-	.byte	0x27
-	.2byte	0x166
-	.4byte	0x19c5
-	.byte	0xd
-	.uleb128 0x23
-	.4byte	.LASF941
-	.byte	0x27
-	.2byte	0x167
-	.4byte	0x1ad4
-	.byte	0xe
-	.uleb128 0x23
-	.4byte	.LASF336
-	.byte	0x27
-	.2byte	0x16b
-	.4byte	0x43ab
-	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF878
-	.byte	0x27
-	.2byte	0x16d
-	.4byte	0x19c5
-	.byte	0x90
-	.uleb128 0x23
-	.4byte	.LASF600
-	.byte	0x27
-	.2byte	0x16e
-	.4byte	0x43bb
-	.byte	0x91
-	.uleb128 0x29
-	.ascii	"crc\000"
-	.byte	0x27
-	.2byte	0x16f
-	.4byte	0x1adf
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a27
-	.4byte	0x43bb
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x19c5
-	.4byte	0x43cb
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x16
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-	.uleb128 0x3a
-	.byte	0xc
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-	.byte	0xae
-	.4byte	0x43e9
-	.uleb128 0x1f
-	.ascii	"rb\000"
-	.byte	0x28
-	.byte	0xaf
-	.4byte	0x3c88
-	.uleb128 0x12
-	.4byte	.LASF942
-	.byte	0x28
-	.byte	0xb0
-	.4byte	0x1b75
-	.byte	0
-	.uleb128 0x9
-	.4byte	.LASF943
-	.byte	0x14
-	.byte	0x28
-	.byte	0xad
-	.4byte	0x4417
-	.uleb128 0xb
-	.ascii	"u\000"
-	.byte	0x28
-	.byte	0xb1
-	.4byte	0x43cb
-	.byte	0
-	.uleb128 0xb
-	.ascii	"ec\000"
-	.byte	0x28
-	.byte	0xb2
-	.4byte	0x8f
-	.byte	0xc
-	.uleb128 0xa
-	.4byte	.LASF944
-	.byte	0x28
-	.byte	0xb3
-	.4byte	0x8f
-	.byte	0x10
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-	.uleb128 0x13
-	.4byte	.LASF945
-	.2byte	0x10c
-	.byte	0x28
-	.byte	0xeb
-	.4byte	0x4462
-	.uleb128 0xb
-	.ascii	"e\000"
-	.byte	0x28
-	.byte	0xec
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-	.byte	0
-	.uleb128 0xa
-	.4byte	.LASF946
-	.byte	0x28
-	.byte	0xed
-	.4byte	0x4478
-	.byte	0x80
-	.uleb128 0xf
-	.4byte	.LASF947
-	.byte	0x28
-	.byte	0xee
-	.4byte	0x8f
-	.2byte	0x100
-	.uleb128 0xf
-	.4byte	.LASF948
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-	.uleb128 0xd
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-	.uleb128 0xc
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-	.uleb128 0x6
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-	.uleb128 0xd
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-	.uleb128 0x23
-	.4byte	.LASF956
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-	.4byte	0x8f
-	.byte	0x28
-	.uleb128 0x23
-	.4byte	.LASF957
-	.byte	0x28
-	.2byte	0x13e
-	.4byte	0x8f
-	.byte	0x2c
-	.uleb128 0x23
-	.4byte	.LASF958
-	.byte	0x28
-	.2byte	0x13f
-	.4byte	0x8f
-	.byte	0x30
-	.uleb128 0x23
-	.4byte	.LASF959
-	.byte	0x28
-	.2byte	0x140
-	.4byte	0x8f
-	.byte	0x34
-	.uleb128 0x23
-	.4byte	.LASF960
-	.byte	0x28
-	.2byte	0x141
-	.4byte	0x8f
-	.byte	0x38
-	.uleb128 0x23
-	.4byte	.LASF936
-	.byte	0x28
-	.2byte	0x143
-	.4byte	0x8f
-	.byte	0x3c
-	.uleb128 0x23
-	.4byte	.LASF939
-	.byte	0x28
-	.2byte	0x144
-	.4byte	0x8f
-	.byte	0x40
-	.uleb128 0x23
-	.4byte	.LASF961
-	.byte	0x28
-	.2byte	0x145
-	.4byte	0x8f
-	.byte	0x44
-	.uleb128 0x23
-	.4byte	.LASF962
-	.byte	0x28
-	.2byte	0x146
-	.4byte	0x8f
-	.byte	0x48
-	.uleb128 0x23
-	.4byte	.LASF963
-	.byte	0x28
-	.2byte	0x14a
-	.4byte	0x1a00
-	.byte	0x4c
-	.uleb128 0x23
-	.4byte	.LASF964
-	.byte	0x28
-	.2byte	0x14c
-	.4byte	0x9d
-	.byte	0x50
-	.uleb128 0x23
-	.4byte	.LASF937
-	.byte	0x28
-	.2byte	0x14d
-	.4byte	0x8f
-	.byte	0x58
-	.uleb128 0x23
-	.4byte	.LASF938
-	.byte	0x28
-	.2byte	0x14e
-	.4byte	0x8f
-	.byte	0x5c
-	.uleb128 0x23
-	.4byte	.LASF941
-	.byte	0x28
-	.2byte	0x14f
-	.4byte	0x8f
-	.byte	0x60
-	.uleb128 0x23
-	.4byte	.LASF336
-	.byte	0x28
-	.2byte	0x150
-	.4byte	0x43ab
-	.byte	0x64
-	.uleb128 0x23
-	.4byte	.LASF965
-	.byte	0x28
-	.2byte	0x152
-	.4byte	0x8f
-	.byte	0xe4
-	.uleb128 0x23
-	.4byte	.LASF966
-	.byte	0x28
-	.2byte	0x153
-	.4byte	0x8f
-	.byte	0xe8
-	.uleb128 0x23
-	.4byte	.LASF967
-	.byte	0x28
-	.2byte	0x154
-	.4byte	0x9d
-	.byte	0xf0
-	.uleb128 0x23
-	.4byte	.LASF968
-	.byte	0x28
-	.2byte	0x155
-	.4byte	0x9d
-	.byte	0xf8
-	.uleb128 0x24
-	.4byte	.LASF969
-	.byte	0x28
-	.2byte	0x156
-	.4byte	0x1aea
-	.2byte	0x100
-	.uleb128 0x24
-	.4byte	.LASF970
-	.byte	0x28
-	.2byte	0x158
-	.4byte	0x4b0c
-	.2byte	0x104
-	.uleb128 0x3b
-	.4byte	.LASF971
-	.byte	0x28
-	.2byte	0x159
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1f
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF972
-	.byte	0x28
-	.2byte	0x15a
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1e
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF940
-	.byte	0x28
-	.2byte	0x15b
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1d
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF973
-	.byte	0x28
-	.2byte	0x15c
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1c
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF974
-	.byte	0x28
-	.2byte	0x15d
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1b
-	.2byte	0x108
-	.uleb128 0x3b
-	.4byte	.LASF975
-	.byte	0x28
-	.2byte	0x15e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1a
-	.2byte	0x108
-	.byte	0
-	.uleb128 0x30
-	.4byte	.LASF976
-	.2byte	0xc08
-	.byte	0x28
-	.2byte	0x212
-	.4byte	0x4b06
-	.uleb128 0x23
-	.4byte	.LASF853
-	.byte	0x28
-	.2byte	0x213
-	.4byte	0x3c60
-	.byte	0
-	.uleb128 0x29
-	.ascii	"dev\000"
-	.byte	0x28
-	.2byte	0x214
-	.4byte	0x3bca
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF977
-	.byte	0x28
-	.2byte	0x215
-	.4byte	0x8f
-	.byte	0x20
-	.uleb128 0x23
-	.4byte	.LASF978
-	.byte	0x28
-	.2byte	0x216
-	.4byte	0x1b2d
-	.byte	0x24
-	.uleb128 0x23
-	.4byte	.LASF979
-	.byte	0x28
-	.2byte	0x217
-	.4byte	0x8f
-	.byte	0x30
-	.uleb128 0x23
-	.4byte	.LASF980
-	.byte	0x28
-	.2byte	0x218
-	.4byte	0x4c67
-	.byte	0x34
-	.uleb128 0x24
-	.4byte	.LASF981
-	.byte	0x28
-	.2byte	0x219
-	.4byte	0x3ba8
-	.2byte	0x238
-	.uleb128 0x24
-	.4byte	.LASF956
-	.byte	0x28
-	.2byte	0x21a
-	.4byte	0x8f
-	.2byte	0x238
-	.uleb128 0x24
-	.4byte	.LASF982
-	.byte	0x28
-	.2byte	0x21b
-	.4byte	0x8f
-	.2byte	0x23c
-	.uleb128 0x24
-	.4byte	.LASF983
-	.byte	0x28
-	.2byte	0x21d
-	.4byte	0x8f
-	.2byte	0x240
-	.uleb128 0x24
-	.4byte	.LASF984
-	.byte	0x28
-	.2byte	0x21e
-	.4byte	0x8f
-	.2byte	0x244
-	.uleb128 0x24
-	.4byte	.LASF985
-	.byte	0x28
-	.2byte	0x21f
-	.4byte	0x8f
-	.2byte	0x248
-	.uleb128 0x24
-	.4byte	.LASF986
-	.byte	0x28
-	.2byte	0x220
-	.4byte	0x8f
-	.2byte	0x24c
-	.uleb128 0x24
-	.4byte	.LASF987
-	.byte	0x28
-	.2byte	0x221
-	.4byte	0x8f
-	.2byte	0x250
-	.uleb128 0x24
-	.4byte	.LASF988
-	.byte	0x28
-	.2byte	0x223
-	.4byte	0x8f
-	.2byte	0x254
-	.uleb128 0x24
-	.4byte	.LASF989
-	.byte	0x28
-	.2byte	0x224
-	.4byte	0x8f
-	.2byte	0x258
-	.uleb128 0x24
-	.4byte	.LASF990
-	.byte	0x28
-	.2byte	0x225
-	.4byte	0x8f
-	.2byte	0x25c
-	.uleb128 0x24
-	.4byte	.LASF991
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-	.2byte	0x226
-	.4byte	0x4c77
-	.2byte	0x260
-	.uleb128 0x24
-	.4byte	.LASF992
-	.byte	0x28
-	.2byte	0x227
-	.4byte	0x3c47
-	.2byte	0x264
-	.uleb128 0x24
-	.4byte	.LASF993
-	.byte	0x28
-	.2byte	0x229
-	.4byte	0x8f
-	.2byte	0x268
-	.uleb128 0x24
-	.4byte	.LASF994
-	.byte	0x28
-	.2byte	0x22b
-	.4byte	0x8f
-	.2byte	0x26c
-	.uleb128 0x24
-	.4byte	.LASF995
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-	.2byte	0x270
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-	.4byte	.LASF996
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-	.2byte	0x22f
-	.4byte	0x3ba8
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-	.uleb128 0x24
-	.4byte	.LASF997
-	.byte	0x28
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-	.4byte	0x3cbf
-	.2byte	0x278
-	.uleb128 0x24
-	.4byte	.LASF998
-	.byte	0x28
-	.2byte	0x231
-	.4byte	0x3c47
-	.2byte	0x27c
-	.uleb128 0x24
-	.4byte	.LASF999
-	.byte	0x28
-	.2byte	0x234
-	.4byte	0x8f
-	.2byte	0x280
-	.uleb128 0x25
-	.ascii	"fm\000"
-	.byte	0x28
-	.2byte	0x235
-	.4byte	0x4c7d
-	.2byte	0x284
-	.uleb128 0x24
-	.4byte	.LASF1000
-	.byte	0x28
-	.2byte	0x236
-	.4byte	0x4488
-	.2byte	0x288
-	.uleb128 0x24
-	.4byte	.LASF1001
-	.byte	0x28
-	.2byte	0x237
-	.4byte	0x4488
-	.2byte	0x694
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-	.4byte	.LASF1002
-	.byte	0x28
-	.2byte	0x238
-	.4byte	0x3bb3
-	.2byte	0xaa0
-	.uleb128 0x24
-	.4byte	.LASF1003
-	.byte	0x28
-	.2byte	0x239
-	.4byte	0x3bb3
-	.2byte	0xaa4
-	.uleb128 0x24
-	.4byte	.LASF1004
-	.byte	0x28
-	.2byte	0x23a
-	.4byte	0x1aea
-	.2byte	0xaa8
-	.uleb128 0x24
-	.4byte	.LASF1005
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-	.4byte	.LASF1007
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-	.4byte	.LASF1009
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-	.2byte	0xac4
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-	.ascii	"pq\000"
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-	.2byte	0xb1c
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-	.4byte	.LASF1014
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-	.4byte	.LASF1016
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-	.2byte	0x24e
-	.4byte	0x4472
-	.2byte	0xb2c
-	.uleb128 0x24
-	.4byte	.LASF1017
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-	.2byte	0xb30
-	.uleb128 0x24
-	.4byte	.LASF1018
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-	.4byte	0x1b75
-	.2byte	0xb38
-	.uleb128 0x24
-	.4byte	.LASF1020
-	.byte	0x28
-	.2byte	0x252
-	.4byte	0x8f
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-	.4byte	.LASF1021
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-	.2byte	0x253
-	.4byte	0x4c9e
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-	.4byte	.LASF1022
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-	.4byte	.LASF1023
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-	.2byte	0x18c
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x1
-	.byte	0x1b
-	.byte	0
-	.uleb128 0x3c
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-	.byte	0x1
-	.byte	0x1a
-	.byte	0
-	.uleb128 0x3c
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-	.2byte	0x18e
-	.4byte	0x2c
-	.byte	0x4
-	.byte	0x2
-	.byte	0x18
-	.byte	0
-	.uleb128 0x23
-	.4byte	.LASF1056
-	.byte	0x28
-	.2byte	0x18f
-	.4byte	0x2c
-	.byte	0x4
-	.uleb128 0x23
-	.4byte	.LASF1057
-	.byte	0x28
-	.2byte	0x190
-	.4byte	0x2c
-	.byte	0x8
-	.uleb128 0x23
-	.4byte	.LASF1058
-	.byte	0x28
-	.2byte	0x191
-	.4byte	0x2c
-	.byte	0xc
-	.uleb128 0x23
-	.4byte	.LASF1059
-	.byte	0x28
-	.2byte	0x192
-	.4byte	0x4c4c
-	.byte	0x10
-	.uleb128 0x23
-	.4byte	.LASF1060
-	.byte	0x28
-	.2byte	0x193
-	.4byte	0x4c61
-	.byte	0x18
-	.uleb128 0x23
-	.4byte	.LASF1061
-	.byte	0x28
-	.2byte	0x194
-	.4byte	0x4c61
-	.byte	0x1c
-	.uleb128 0x23
-	.4byte	.LASF1062
-	.byte	0x28
-	.2byte	0x195
-	.4byte	0x4c61
-	.byte	0x20
-	.uleb128 0x23
-	.4byte	.LASF1063
-	.byte	0x28
-	.2byte	0x196
-	.4byte	0x4c61
-	.byte	0x24
-	.uleb128 0x23
-	.4byte	.LASF1064
-	.byte	0x28
-	.2byte	0x197
-	.4byte	0x4c61
-	.byte	0x28
-	.uleb128 0x23
-	.4byte	.LASF1065
-	.byte	0x28
-	.2byte	0x198
-	.4byte	0x4c61
-	.byte	0x2c
-	.uleb128 0x23
-	.4byte	.LASF1066
-	.byte	0x28
-	.2byte	0x199
-	.4byte	0x4c61
-	.byte	0x30
-	.uleb128 0x23
-	.4byte	.LASF1067
-	.byte	0x28
-	.2byte	0x19a
-	.4byte	0x4c61
-	.byte	0x34
-	.uleb128 0x23
-	.4byte	.LASF1068
-	.byte	0x28
-	.2byte	0x19b
-	.4byte	0x4c61
-	.byte	0x38
-	.uleb128 0x23
-	.4byte	.LASF1069
-	.byte	0x28
-	.2byte	0x19c
-	.4byte	0x4c61
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a27
-	.4byte	0x4c5c
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x6
-	.byte	0
-	.uleb128 0x2c
-	.4byte	.LASF1070
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4c5c
-	.uleb128 0x6
-	.4byte	0x4b12
-	.4byte	0x4c77
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x80
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x431b
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4417
-	.uleb128 0x6
-	.4byte	0x1b75
-	.4byte	0x4c93
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x9
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4472
-	.uleb128 0x2c
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-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x4c99
-	.uleb128 0x6
-	.4byte	0x1a27
-	.4byte	0x4cb4
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xc
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3b90
-	.uleb128 0x19
-	.4byte	.LASF1072
-	.byte	0x28
-	.2byte	0x309
-	.4byte	0x4cb4
-	.uleb128 0x2c
-	.4byte	.LASF1073
-	.uleb128 0x4
-	.4byte	0x4cc6
-	.uleb128 0x19
-	.4byte	.LASF1074
-	.byte	0x28
-	.2byte	0x30a
-	.4byte	0x4ccb
-	.uleb128 0x19
-	.4byte	.LASF1075
-	.byte	0x28
-	.2byte	0x30b
-	.4byte	0x4ccb
-	.uleb128 0x19
-	.4byte	.LASF1076
-	.byte	0x28
-	.2byte	0x30c
-	.4byte	0x4ccb
-	.uleb128 0x19
-	.4byte	.LASF1077
-	.byte	0x28
-	.2byte	0x30d
-	.4byte	0x3c2b
-	.uleb128 0x19
-	.4byte	.LASF1078
-	.byte	0x28
-	.2byte	0x30e
-	.4byte	0x3c47
-	.uleb128 0x2c
-	.4byte	.LASF1079
-	.uleb128 0x19
-	.4byte	.LASF1080
-	.byte	0x28
-	.2byte	0x30f
-	.4byte	0x4d0c
-	.uleb128 0x6
-	.4byte	0x4b06
-	.4byte	0x4d28
-	.uleb128 0x7
-	.byte	0
-	.uleb128 0x8
-	.4byte	.LASF1081
-	.byte	0x29
-	.byte	0x4d
-	.4byte	0x4d1d
-	.uleb128 0x6
-	.4byte	0x3a
-	.4byte	0x4d46
-	.uleb128 0x3d
-	.4byte	0x2aa
-	.4byte	0x13ffff
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF1082
-	.byte	0x7
-	.byte	0x17
-	.4byte	0x4d33
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlMallocBuffer
-	.uleb128 0x35
-	.4byte	.LASF1083
-	.byte	0x7
-	.byte	0x18
-	.4byte	0x74
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlMallocOffset
-	.uleb128 0x3e
-	.4byte	.LASF1085
-	.byte	0x7
-	.byte	0x84
-	.4byte	.LFB496
-	.4byte	.LFE496-.LFB496
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4e71
-	.uleb128 0x3f
-	.ascii	"s\000"
-	.byte	0x7
-	.byte	0x84
-	.4byte	0x1a50
-	.4byte	.LLST443
-	.uleb128 0x3f
-	.ascii	"buf\000"
-	.byte	0x7
-	.byte	0x84
-	.4byte	0x1aea
-	.4byte	.LLST444
-	.uleb128 0x40
-	.4byte	.LASF1084
-	.byte	0x7
-	.byte	0x84
-	.4byte	0x74
-	.4byte	.LLST445
-	.uleb128 0x3f
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-	.byte	0x7
-	.byte	0x84
-	.4byte	0x74
-	.4byte	.LLST446
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x7
-	.byte	0x89
-	.4byte	0x74
-	.4byte	.LLST447
-	.uleb128 0x41
-	.ascii	"j\000"
-	.byte	0x7
-	.byte	0x89
-	.4byte	0x74
-	.4byte	.LLST448
-	.uleb128 0x41
-	.ascii	"p8\000"
-	.byte	0x7
-	.byte	0x8a
-	.4byte	0x1a50
-	.4byte	.LLST449
-	.uleb128 0x41
-	.ascii	"p16\000"
-	.byte	0x7
-	.byte	0x8b
-	.4byte	0x4e71
-	.4byte	.LLST450
-	.uleb128 0x41
-	.ascii	"p32\000"
-	.byte	0x7
-	.byte	0x8c
-	.4byte	0x13e
-	.4byte	.LLST451
-	.uleb128 0x42
-	.4byte	.LVL1410
-	.4byte	0x103ff
-	.4byte	0x4e1d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC18
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1411
-	.4byte	0x103ff
-	.4byte	0x4e40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC16
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1413
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-	.4byte	0x4e54
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1415
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-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC18
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x6d
-	.uleb128 0x46
-	.4byte	.LASF1124
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-	.byte	0x7f
-	.4byte	0x2c
-	.byte	0x1
-	.uleb128 0x3e
-	.4byte	.LASF1086
-	.byte	0x7
-	.byte	0x78
-	.4byte	.LFB494
-	.4byte	.LFE494-.LFB494
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4edc
-	.uleb128 0x47
-	.4byte	0x4edc
-	.4byte	.LBB486
-	.4byte	.LBE486-.LBB486
-	.byte	0x7
-	.byte	0x7a
-	.4byte	0x4eb5
-	.uleb128 0x48
-	.4byte	.LVL2343
-	.4byte	0xbed1
-	.byte	0
-	.uleb128 0x47
-	.4byte	0x4edc
-	.4byte	.LBB488
-	.4byte	.LBE488-.LBB488
-	.byte	0x7
-	.byte	0x7c
-	.4byte	0x4ed2
-	.uleb128 0x49
-	.4byte	.LVL2345
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-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2344
-	.4byte	0x9884
-	.byte	0
-	.uleb128 0x4a
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-	.byte	0x73
-	.byte	0x1
-	.uleb128 0x4b
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-	.byte	0x68
-	.4byte	0x84
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-	.byte	0x9c
-	.4byte	0x4f61
-	.uleb128 0x40
-	.4byte	.LASF1087
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-	.byte	0x68
-	.4byte	0x13e
-	.4byte	.LLST738
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-	.byte	0x6a
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-	.4byte	.LVL2926
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-	.uleb128 0x43
-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x5
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-	.4byte	.LANCHOR15
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-	.uleb128 0x45
-	.4byte	.LVL2929
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-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC54
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
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-	.byte	0x64
-	.byte	0x1
-	.uleb128 0x4b
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-	.byte	0x7
-	.byte	0x5b
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-	.byte	0x9c
-	.4byte	0x4fde
-	.uleb128 0x40
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-	.byte	0x5b
-	.4byte	0x74
-	.4byte	.LLST440
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-	.4byte	.LASF1092
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-	.byte	0x5b
-	.4byte	0x74
-	.4byte	.LLST441
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-	.ascii	"buf\000"
-	.byte	0x7
-	.byte	0x5b
-	.4byte	0x1aea
-	.4byte	.LLST442
-	.uleb128 0x4c
-	.ascii	"ret\000"
-	.byte	0x7
-	.byte	0x5d
-	.4byte	0x74
-	.sleb128 -1
-	.uleb128 0x4d
-	.4byte	.LVL1405
-	.4byte	0x1040b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
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-	.byte	0x53
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-	.byte	0x9c
-	.4byte	0x5053
-	.uleb128 0x40
-	.4byte	.LASF542
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-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST437
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-	.byte	0x53
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-	.byte	0x53
-	.4byte	0x1aea
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-	.4byte	0x74
-	.sleb128 -1
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-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x40
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x43
-	.uleb128 0x1
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-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x4b
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-	.byte	0x4b
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-	.uleb128 0x40
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-	.byte	0x4b
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-	.byte	0x4b
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x6
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x23
-	.uleb128 0x100
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1097
-	.byte	0x7
-	.byte	0x3d
-	.4byte	.LFB486
-	.4byte	.LFE486-.LFB486
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5194
-	.uleb128 0x3f
-	.ascii	"buf\000"
-	.byte	0x7
-	.byte	0x3d
-	.4byte	0x1aea
-	.4byte	.LLST431
-	.uleb128 0x4e
-	.4byte	0x536b
-	.4byte	.LBB351
-	.4byte	.LBE351-.LBB351
-	.byte	0x7
-	.byte	0x3f
-	.uleb128 0x4f
-	.4byte	0x5377
-	.4byte	.LLST432
-	.uleb128 0x4d
-	.4byte	.LVL1385
-	.4byte	0x10430
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1098
-	.byte	0x7
-	.byte	0x38
-	.4byte	0x1aea
-	.4byte	.LFB485
-	.4byte	.LFE485-.LFB485
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x51d3
-	.uleb128 0x40
-	.4byte	.LASF338
-	.byte	0x7
-	.byte	0x38
-	.4byte	0x8f
-	.4byte	.LLST423
-	.uleb128 0x4d
-	.4byte	.LVL1306
-	.4byte	0x1043d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1109
-	.byte	0x7
-	.byte	0x33
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x51ef
-	.uleb128 0x51
-	.4byte	.LASF1107
-	.byte	0x7
-	.byte	0x33
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1099
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x8f
-	.4byte	.LFB483
-	.4byte	.LFE483-.LFB483
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5255
-	.uleb128 0x40
-	.4byte	.LASF1100
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x1aea
-	.4byte	.LLST419
-	.uleb128 0x40
-	.4byte	.LASF1101
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x1aea
-	.4byte	.LLST420
-	.uleb128 0x40
-	.4byte	.LASF602
-	.byte	0x7
-	.byte	0x2e
-	.4byte	0x2c
-	.4byte	.LLST421
-	.uleb128 0x4d
-	.4byte	.LVL1302
-	.4byte	0x10449
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1102
-	.byte	0x7
-	.byte	0x24
-	.4byte	.LFB482
-	.4byte	.LFE482-.LFB482
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x529f
-	.uleb128 0x52
-	.4byte	.LASF1103
-	.byte	0x7
-	.byte	0x24
-	.4byte	0x13e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF1104
-	.byte	0x7
-	.byte	0x24
-	.4byte	0x529f
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x52
-	.4byte	.LASF338
-	.byte	0x7
-	.byte	0x24
-	.4byte	0x2c
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x7
-	.byte	0x26
-	.4byte	0x74
-	.4byte	.LLST310
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x7f
-	.uleb128 0x4b
-	.4byte	.LASF1105
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x1aea
-	.4byte	.LFB481
-	.4byte	.LFE481-.LFB481
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x530b
-	.uleb128 0x40
-	.4byte	.LASF1103
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x1aea
-	.4byte	.LLST304
-	.uleb128 0x40
-	.4byte	.LASF1104
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x1b48
-	.4byte	.LLST305
-	.uleb128 0x40
-	.4byte	.LASF338
-	.byte	0x7
-	.byte	0x1f
-	.4byte	0x2c
-	.4byte	.LLST306
-	.uleb128 0x4d
-	.4byte	.LVL900
-	.4byte	0x10455
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1106
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x1aea
-	.4byte	.LFB480
-	.4byte	.LFE480-.LFB480
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x536b
-	.uleb128 0x3f
-	.ascii	"s\000"
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x1aea
-	.4byte	.LLST276
-	.uleb128 0x3f
-	.ascii	"c\000"
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x8f
-	.4byte	.LLST277
-	.uleb128 0x3f
-	.ascii	"n\000"
-	.byte	0x7
-	.byte	0x1a
-	.4byte	0x2c
-	.4byte	.LLST278
-	.uleb128 0x4d
-	.4byte	.LVL744
-	.4byte	0x10423
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF1562
-	.byte	0x8
-	.byte	0x4e
-	.byte	0x3
-	.4byte	0x5383
-	.uleb128 0x51
-	.4byte	.LASF1108
-	.byte	0x8
-	.byte	0x4e
-	.4byte	0x1b48
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1110
-	.byte	0x6
-	.2byte	0x214
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5442
-	.uleb128 0x55
-	.4byte	.LASF923
-	.byte	0x6
-	.2byte	0x214
-	.4byte	0x74
-	.uleb128 0x55
-	.4byte	.LASF1111
-	.byte	0x6
-	.2byte	0x214
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1112
-	.byte	0x6
-	.2byte	0x216
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"lpa\000"
-	.byte	0x6
-	.2byte	0x217
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"ppa\000"
-	.byte	0x6
-	.2byte	0x217
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1113
-	.byte	0x6
-	.2byte	0x218
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF576
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1114
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1115
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1116
-	.byte	0x6
-	.2byte	0x219
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1117
-	.byte	0x6
-	.2byte	0x21a
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1118
-	.byte	0x6
-	.2byte	0x21b
-	.4byte	0x5442
-	.uleb128 0x58
-	.4byte	.LASF1119
-	.byte	0x6
-	.2byte	0x316
-	.uleb128 0x58
-	.4byte	.LASF1120
-	.byte	0x6
-	.2byte	0x319
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5458
-	.4byte	.LASF1110
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2a5a
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5458
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x16
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5448
-	.uleb128 0x54
-	.4byte	.LASF1122
-	.byte	0x6
-	.2byte	0x1b5
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x54a7
-	.uleb128 0x55
-	.4byte	.LASF1123
-	.byte	0x6
-	.2byte	0x1b5
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1114
-	.byte	0x6
-	.2byte	0x1b7
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x6
-	.2byte	0x1b8
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"j\000"
-	.byte	0x6
-	.2byte	0x1b8
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF664
-	.byte	0x6
-	.2byte	0x1b9
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1125
-	.byte	0x6
-	.2byte	0x1aa
-	.4byte	0x8f
-	.byte	0x1
-	.uleb128 0x5b
-	.4byte	.LASF1126
-	.byte	0x6
-	.2byte	0x192
-	.4byte	0x8f
-	.4byte	.LFB404
-	.4byte	.LFE404-.LFB404
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5521
-	.uleb128 0x5c
-	.4byte	.LASF664
-	.byte	0x6
-	.2byte	0x192
-	.4byte	0x57
-	.4byte	.LLST273
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x6
-	.2byte	0x194
-	.4byte	0x57
-	.4byte	.LLST274
-	.uleb128 0x5e
-	.4byte	.LASF1127
-	.byte	0x6
-	.2byte	0x195
-	.4byte	0x57
-	.4byte	.LLST275
-	.uleb128 0x44
-	.4byte	.LVL731
-	.4byte	0x8958
-	.4byte	0x5510
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL733
-	.4byte	0x5521
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1128
-	.byte	0x6
-	.2byte	0x17b
-	.4byte	0x8f
-	.4byte	.LFB403
-	.4byte	.LFE403-.LFB403
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x554c
-	.uleb128 0x5c
-	.4byte	.LASF1108
-	.byte	0x6
-	.2byte	0x17b
-	.4byte	0x57
-	.4byte	.LLST272
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF1193
-	.byte	0x6
-	.2byte	0x16d
-	.4byte	0x8f
-	.4byte	0x5569
-	.uleb128 0x55
-	.4byte	.LASF1108
-	.byte	0x6
-	.2byte	0x16d
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1129
-	.byte	0x6
-	.2byte	0x14d
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0x5591
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x6
-	.2byte	0x14f
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1118
-	.byte	0x6
-	.2byte	0x150
-	.4byte	0x5442
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1130
-	.byte	0x6
-	.2byte	0x13d
-	.4byte	0x74
-	.4byte	.LFB400
-	.4byte	.LFE400-.LFB400
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5616
-	.uleb128 0x48
-	.4byte	.LVL2785
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL2786
-	.4byte	0x57df
-	.4byte	0x55c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2787
-	.4byte	0x5ef1
-	.4byte	0x55dc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2788
-	.4byte	0x7c46
-	.uleb128 0x44
-	.4byte	.LVL2789
-	.4byte	0x7759
-	.4byte	0x55f9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2790
-	.4byte	0x75f4
-	.uleb128 0x4d
-	.4byte	.LVL2791
-	.4byte	0x5c52
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR93
-	.byte	0
-	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF1131
-	.byte	0x6
-	.2byte	0x132
-	.byte	0x1
-	.uleb128 0x4b
-	.4byte	.LASF1132
-	.byte	0x6
-	.byte	0xe2
-	.4byte	0x74
-	.4byte	.LFB398
-	.4byte	.LFE398-.LFB398
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5798
-	.uleb128 0x40
-	.4byte	.LASF1133
-	.byte	0x6
-	.byte	0xe2
-	.4byte	0x35d9
-	.4byte	.LLST706
-	.uleb128 0x40
-	.4byte	.LASF1134
-	.byte	0x6
-	.byte	0xe2
-	.4byte	0x74
-	.4byte	.LLST707
-	.uleb128 0x61
-	.4byte	.LASF1116
-	.byte	0x6
-	.byte	0xe4
-	.4byte	0x57
-	.4byte	.LLST708
-	.uleb128 0x61
-	.4byte	.LASF1135
-	.byte	0x6
-	.byte	0xe5
-	.4byte	0x57
-	.4byte	.LLST709
-	.uleb128 0x41
-	.ascii	"req\000"
-	.byte	0x6
-	.byte	0xe5
-	.4byte	0x57
-	.4byte	.LLST710
-	.uleb128 0x61
-	.4byte	.LASF1114
-	.byte	0x6
-	.byte	0xe6
-	.4byte	0x57
-	.4byte	.LLST711
-	.uleb128 0x61
-	.4byte	.LASF658
-	.byte	0x6
-	.byte	0xe6
-	.4byte	0x57
-	.4byte	.LLST712
-	.uleb128 0x61
-	.4byte	.LASF656
-	.byte	0x6
-	.byte	0xe6
-	.4byte	0x57
-	.4byte	.LLST713
-	.uleb128 0x61
-	.4byte	.LASF1136
-	.byte	0x6
-	.byte	0xe7
-	.4byte	0x74
-	.4byte	.LLST714
-	.uleb128 0x61
-	.4byte	.LASF1137
-	.byte	0x6
-	.byte	0xe8
-	.4byte	0x74
-	.4byte	.LLST715
-	.uleb128 0x61
-	.4byte	.LASF1138
-	.byte	0x6
-	.byte	0xe9
-	.4byte	0x74
-	.4byte	.LLST716
-	.uleb128 0x61
-	.4byte	.LASF1118
-	.byte	0x6
-	.byte	0xea
-	.4byte	0x5442
-	.4byte	.LLST717
-	.uleb128 0x62
-	.4byte	.LASF1139
-	.byte	0x6
-	.byte	0xf1
-	.uleb128 0x62
-	.4byte	.LASF1140
-	.byte	0x6
-	.byte	0xf5
-	.uleb128 0x63
-	.4byte	.LASF1162
-	.byte	0x6
-	.2byte	0x129
-	.4byte	.L2503
-	.uleb128 0x48
-	.4byte	.LVL2710
-	.4byte	0x5798
-	.uleb128 0x44
-	.4byte	.LVL2718
-	.4byte	0xb17b
-	.4byte	0x5729
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2731
-	.4byte	0x8990
-	.4byte	0x5744
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2737
-	.4byte	0x6dbf
-	.4byte	0x575e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2740
-	.4byte	0x59e7
-	.uleb128 0x44
-	.4byte	.LVL2744
-	.4byte	0x103ff
-	.4byte	0x5785
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2747
-	.4byte	0x8565
-	.uleb128 0x48
-	.4byte	.LVL2749
-	.4byte	0x5798
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1141
-	.byte	0x6
-	.byte	0xd9
-	.4byte	.LFB397
-	.4byte	.LFE397-.LFB397
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x57df
-	.uleb128 0x44
-	.4byte	.LVL896
-	.4byte	0x530b
-	.4byte	0x57c1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL897
-	.4byte	0x530b
-	.4byte	0x57d5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LVL898
-	.4byte	0x5b2a
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1142
-	.byte	0x6
-	.byte	0x6e
-	.4byte	0x8f
-	.4byte	.LFB396
-	.4byte	.LFE396-.LFB396
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x59d2
-	.uleb128 0x40
-	.4byte	.LASF1143
-	.byte	0x6
-	.byte	0x6e
-	.4byte	0x8f
-	.4byte	.LLST718
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x70
-	.4byte	0x57
-	.4byte	.LLST719
-	.uleb128 0x61
-	.4byte	.LASF1144
-	.byte	0x6
-	.byte	0x70
-	.4byte	0x57
-	.4byte	.LLST720
-	.uleb128 0x36
-	.4byte	.LASF1145
-	.byte	0x6
-	.byte	0x71
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x61
-	.4byte	.LASF1146
-	.byte	0x6
-	.byte	0x72
-	.4byte	0x74
-	.4byte	.LLST721
-	.uleb128 0x36
-	.4byte	.LASF1133
-	.byte	0x6
-	.byte	0x73
-	.4byte	0x35d9
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.byte	0x9f
-	.uleb128 0x61
-	.4byte	.LASF1147
-	.byte	0x6
-	.byte	0x74
-	.4byte	0x3612
-	.4byte	.LLST722
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x59e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11365
-	.uleb128 0x44
-	.4byte	.LVL2755
-	.4byte	0x561f
-	.4byte	0x5884
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2756
-	.4byte	0x7759
-	.4byte	0x5897
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2757
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL2758
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL2761
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL2762
-	.4byte	0x103ff
-	.4byte	0x58d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR234
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa3
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2763
-	.4byte	0x103ff
-	.4byte	0x58f8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2765
-	.4byte	0x5b4d
-	.4byte	0x590c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2766
-	.4byte	0x103ff
-	.4byte	0x5923
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC50
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2767
-	.4byte	0x8540
-	.uleb128 0x48
-	.4byte	.LVL2769
-	.4byte	0x7c46
-	.uleb128 0x48
-	.4byte	.LVL2770
-	.4byte	0x75f4
-	.uleb128 0x44
-	.4byte	.LVL2773
-	.4byte	0x103ff
-	.4byte	0x5964
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR234
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2774
-	.4byte	0x103ff
-	.4byte	0x5984
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2775
-	.4byte	0x7a04
-	.4byte	0x599d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2776
-	.4byte	0x8958
-	.uleb128 0x44
-	.4byte	.LVL2778
-	.4byte	0x7a04
-	.4byte	0x59bf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2780
-	.4byte	0x5b4d
-	.uleb128 0x48
-	.4byte	.LVL2784
-	.4byte	0x8565
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x59e2
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x12
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x59d2
-	.uleb128 0x3e
-	.4byte	.LASF1148
-	.byte	0x6
-	.byte	0x53
-	.4byte	.LFB395
-	.4byte	.LFE395-.LFB395
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5a5c
-	.uleb128 0x40
-	.4byte	.LASF1149
-	.byte	0x6
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST267
-	.uleb128 0x40
-	.4byte	.LASF667
-	.byte	0x6
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST268
-	.uleb128 0x3f
-	.ascii	"lpa\000"
-	.byte	0x6
-	.byte	0x53
-	.4byte	0x74
-	.4byte	.LLST269
-	.uleb128 0x61
-	.4byte	.LASF1150
-	.byte	0x6
-	.byte	0x55
-	.4byte	0x57
-	.4byte	.LLST270
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x56
-	.4byte	0x57
-	.4byte	.LLST271
-	.uleb128 0x45
-	.4byte	.LVL721
-	.4byte	0x8958
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1151
-	.byte	0x6
-	.byte	0x48
-	.4byte	0x74
-	.4byte	.LFB394
-	.4byte	.LFE394-.LFB394
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5a92
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x6
-	.byte	0x48
-	.4byte	0x57
-	.4byte	.LLST265
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x4a
-	.4byte	0x57
-	.4byte	.LLST266
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1152
-	.byte	0x6
-	.byte	0x37
-	.4byte	.LFB393
-	.4byte	.LFE393-.LFB393
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5ade
-	.uleb128 0x65
-	.ascii	"req\000"
-	.byte	0x6
-	.byte	0x37
-	.4byte	0x676
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF1153
-	.byte	0x6
-	.byte	0x37
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x39
-	.4byte	0x57
-	.4byte	.LLST263
-	.uleb128 0x61
-	.4byte	.LASF1154
-	.byte	0x6
-	.byte	0x3a
-	.4byte	0x57
-	.4byte	.LLST264
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1155
-	.byte	0x6
-	.byte	0x28
-	.4byte	.LFB392
-	.4byte	.LFE392-.LFB392
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b2a
-	.uleb128 0x65
-	.ascii	"req\000"
-	.byte	0x6
-	.byte	0x28
-	.4byte	0x676
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF1153
-	.byte	0x6
-	.byte	0x28
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x2a
-	.4byte	0x57
-	.4byte	.LLST261
-	.uleb128 0x61
-	.4byte	.LASF1154
-	.byte	0x6
-	.byte	0x2b
-	.4byte	0x57
-	.4byte	.LLST262
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1156
-	.byte	0x6
-	.byte	0x14
-	.4byte	.LFB391
-	.4byte	.LFE391-.LFB391
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b4d
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x6
-	.byte	0x16
-	.4byte	0x57
-	.4byte	.LLST260
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1157
-	.byte	0x1
-	.2byte	0xc18
-	.4byte	0x8f
-	.4byte	.LFB390
-	.4byte	.LFE390-.LFB390
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5bfd
-	.uleb128 0x5c
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xc18
-	.4byte	0x57
-	.4byte	.LLST554
-	.uleb128 0x5d
-	.ascii	"ret\000"
-	.byte	0x1
-	.2byte	0xc1a
-	.4byte	0x8f
-	.4byte	.LLST555
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5c0d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11297
-	.uleb128 0x44
-	.4byte	.LVL1979
-	.4byte	0x103ff
-	.4byte	0x5bb3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1983
-	.4byte	0x103ff
-	.4byte	0x5bd3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR204
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1984
-	.4byte	0x103ff
-	.4byte	0x5bf3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1987
-	.4byte	0x5c12
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5c0d
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x13
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5bfd
-	.uleb128 0x54
-	.4byte	.LASF1158
-	.byte	0x1
-	.2byte	0xc03
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5c3d
-	.uleb128 0x55
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xc03
-	.4byte	0x57
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.4byte	.LASF1158
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5c4d
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xf
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5c3d
-	.uleb128 0x5b
-	.4byte	.LASF1159
-	.byte	0x1
-	.2byte	0xbcc
-	.4byte	0x74
-	.4byte	.LFB388
-	.4byte	.LFE388-.LFB388
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5dee
-	.uleb128 0x5c
-	.4byte	.LASF1160
-	.byte	0x1
-	.2byte	0xbcc
-	.4byte	0x35d9
-	.4byte	.LLST559
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0xbce
-	.4byte	0x57
-	.4byte	.LLST560
-	.uleb128 0x5e
-	.4byte	.LASF1161
-	.byte	0x1
-	.2byte	0xbcf
-	.4byte	0x74
-	.4byte	.LLST561
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x59e2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11281
-	.uleb128 0x63
-	.4byte	.LASF1163
-	.byte	0x1
-	.2byte	0xbd7
-	.4byte	.L1802
-	.uleb128 0x63
-	.4byte	.LASF1164
-	.byte	0x1
-	.2byte	0xbe6
-	.4byte	.L1805
-	.uleb128 0x44
-	.4byte	.LVL2001
-	.4byte	0x103ff
-	.4byte	0x5cea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbd1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2002
-	.4byte	0x103ff
-	.4byte	0x5d0a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2003
-	.4byte	0x103ff
-	.4byte	0x5d31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbd2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2004
-	.4byte	0x103ff
-	.4byte	0x5d51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2005
-	.4byte	0x103ff
-	.4byte	0x5d78
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbd3
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2006
-	.4byte	0x103ff
-	.4byte	0x5d98
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2008
-	.4byte	0x5b4d
-	.uleb128 0x48
-	.4byte	.LVL2012
-	.4byte	0x5b4d
-	.uleb128 0x44
-	.4byte	.LVL2013
-	.4byte	0x103ff
-	.4byte	0x5dd1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xbff
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2014
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1165
-	.byte	0x1
-	.2byte	0xba2
-	.4byte	0x8f
-	.4byte	.LFB387
-	.4byte	.LFE387-.LFB387
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5edc
-	.uleb128 0x5c
-	.4byte	.LASF1160
-	.byte	0x1
-	.2byte	0xba2
-	.4byte	0x35d9
-	.4byte	.LLST624
-	.uleb128 0x38
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xba4
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5eec
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11275
-	.uleb128 0x44
-	.4byte	.LVL2276
-	.4byte	0x103ff
-	.4byte	0x5e5c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR219
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xba6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2277
-	.4byte	0x103ff
-	.4byte	0x5e7c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2278
-	.4byte	0x8540
-	.4byte	0x5e90
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2279
-	.4byte	0x5c12
-	.uleb128 0x44
-	.4byte	.LVL2280
-	.4byte	0x5ef1
-	.4byte	0x5ead
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2281
-	.4byte	0x7c46
-	.uleb128 0x44
-	.4byte	.LVL2282
-	.4byte	0x7759
-	.4byte	0x5ec9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2283
-	.4byte	0x75f4
-	.uleb128 0x48
-	.4byte	.LVL2285
-	.4byte	0x8565
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5eec
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5edc
-	.uleb128 0x54
-	.4byte	.LASF1166
-	.byte	0x1
-	.2byte	0xb23
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5f74
-	.uleb128 0x66
-	.ascii	"p\000"
-	.byte	0x1
-	.2byte	0xb23
-	.4byte	0x35d9
-	.uleb128 0x56
-	.4byte	.LASF1167
-	.byte	0x1
-	.2byte	0xb25
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"n\000"
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0xb26
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1168
-	.byte	0x1
-	.2byte	0xb27
-	.4byte	0x8f
-	.uleb128 0x56
-	.4byte	.LASF1169
-	.byte	0x1
-	.2byte	0xb28
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1170
-	.byte	0x1
-	.2byte	0xb2c
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5f84
-	.4byte	.LASF1166
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x5f84
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x18
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x5f74
-	.uleb128 0x54
-	.4byte	.LASF1171
-	.byte	0x1
-	.2byte	0xb1a
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x5fa7
-	.uleb128 0x55
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xb1a
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1172
-	.byte	0x1
-	.2byte	0xaae
-	.4byte	0x57
-	.4byte	.LFB384
-	.4byte	.LFE384-.LFB384
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6000
-	.uleb128 0x5c
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0xaae
-	.4byte	0x57
-	.4byte	.LLST254
-	.uleb128 0x5e
-	.4byte	.LASF993
-	.byte	0x1
-	.2byte	0xab0
-	.4byte	0x57
-	.4byte	.LLST255
-	.uleb128 0x5e
-	.4byte	.LASF1108
-	.byte	0x1
-	.2byte	0xab1
-	.4byte	0x57
-	.4byte	.LLST256
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0xab2
-	.4byte	0x57
-	.4byte	.LLST257
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1173
-	.byte	0x1
-	.2byte	0xaa5
-	.4byte	0x57
-	.4byte	.LFB383
-	.4byte	.LFE383-.LFB383
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x602b
-	.uleb128 0x5e
-	.4byte	.LASF1174
-	.byte	0x1
-	.2byte	0xaa7
-	.4byte	0x57
-	.4byte	.LLST253
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1175
-	.byte	0x1
-	.2byte	0xa95
-	.4byte	0x8f
-	.4byte	.LFB382
-	.4byte	.LFE382-.LFB382
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x60a3
-	.uleb128 0x5c
-	.4byte	.LASF1144
-	.byte	0x1
-	.2byte	0xa95
-	.4byte	0x57
-	.4byte	.LLST249
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0xa97
-	.4byte	0x57
-	.4byte	.LLST250
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0xa97
-	.4byte	0x57
-	.4byte	.LLST251
-	.uleb128 0x5e
-	.4byte	.LASF651
-	.byte	0x1
-	.2byte	0xa98
-	.4byte	0x57
-	.4byte	.LLST252
-	.uleb128 0x44
-	.4byte	.LVL673
-	.4byte	0x89c8
-	.4byte	0x6099
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL674
-	.4byte	0x8d5f
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1176
-	.byte	0x1
-	.2byte	0xa2a
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x60cd
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0xa2c
-	.4byte	0x8f
-	.uleb128 0x68
-	.uleb128 0x56
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0xa51
-	.4byte	0x35d9
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1177
-	.byte	0x1
-	.2byte	0x9e2
-	.4byte	.LFB380
-	.4byte	.LFE380-.LFB380
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6174
-	.uleb128 0x5c
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0x9e2
-	.4byte	0x35d9
-	.4byte	.LLST564
-	.uleb128 0x38
-	.4byte	.LASF1178
-	.byte	0x1
-	.2byte	0x9e4
-	.4byte	0xc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x1
-	.2byte	0x9e5
-	.4byte	0x5442
-	.4byte	.LLST565
-	.uleb128 0x5e
-	.4byte	.LASF1179
-	.byte	0x1
-	.2byte	0x9e6
-	.4byte	0x8f
-	.4byte	.LLST566
-	.uleb128 0x5e
-	.4byte	.LASF660
-	.byte	0x1
-	.2byte	0x9e7
-	.4byte	0x74
-	.4byte	.LLST567
-	.uleb128 0x44
-	.4byte	.LVL2048
-	.4byte	0x5c52
-	.4byte	0x6146
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2051
-	.4byte	0xae0d
-	.4byte	0x616a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2052
-	.4byte	0x5b4d
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1180
-	.byte	0x1
-	.2byte	0x9b2
-	.4byte	.LFB379
-	.4byte	.LFE379-.LFB379
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x62f6
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x640
-	.uleb128 0x5e
-	.4byte	.LASF1181
-	.byte	0x1
-	.2byte	0x9b5
-	.4byte	0x74
-	.4byte	.LLST740
-	.uleb128 0x5e
-	.4byte	.LASF1182
-	.byte	0x1
-	.2byte	0x9b6
-	.4byte	0x57
-	.4byte	.LLST741
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x658
-	.4byte	0x6269
-	.uleb128 0x38
-	.4byte	.LASF1183
-	.byte	0x1
-	.2byte	0x9c7
-	.4byte	0x2e11
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x5e
-	.4byte	.LASF1184
-	.byte	0x1
-	.2byte	0x9c8
-	.4byte	0x35d9
-	.4byte	.LLST742
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x9c9
-	.4byte	0x57
-	.4byte	.LLST743
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x9ca
-	.4byte	0x57
-	.4byte	.LLST744
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0x9cb
-	.4byte	0x57
-	.4byte	.LLST745
-	.uleb128 0x44
-	.4byte	.LVL2945
-	.4byte	0x64a2
-	.4byte	0x621d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2948
-	.4byte	0x103ff
-	.4byte	0x623a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC56
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2949
-	.4byte	0xac82
-	.4byte	0x6253
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2950
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2933
-	.4byte	0x103ff
-	.4byte	0x6286
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2934
-	.4byte	0x5521
-	.uleb128 0x48
-	.4byte	.LVL2935
-	.4byte	0x5521
-	.uleb128 0x44
-	.4byte	.LVL2936
-	.4byte	0x5dee
-	.4byte	0x62ac
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2937
-	.4byte	0x5dee
-	.4byte	0x62c3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR92
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2941
-	.4byte	0x5383
-	.4byte	0x62db
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2943
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF1185
-	.byte	0x1
-	.2byte	0x97f
-	.4byte	.LFB378
-	.4byte	.LFE378-.LFB378
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6367
-	.uleb128 0x44
-	.4byte	.LVL2371
-	.4byte	0x77b1
-	.4byte	0x632a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2372
-	.4byte	0x530b
-	.4byte	0x634a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2373
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC44
-	.byte	0
-	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF1186
-	.byte	0x1
-	.2byte	0x969
-	.byte	0x1
-	.uleb128 0x67
-	.4byte	.LASF1187
-	.byte	0x1
-	.2byte	0x937
-	.4byte	0x8f
-	.4byte	.LFB376
-	.4byte	.LFE376-.LFB376
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x648d
-	.uleb128 0x5e
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST298
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST299
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST300
-	.uleb128 0x5e
-	.4byte	.LASF651
-	.byte	0x1
-	.2byte	0x939
-	.4byte	0x62
-	.4byte	.LLST301
-	.uleb128 0x5e
-	.4byte	.LASF1189
-	.byte	0x1
-	.2byte	0x93a
-	.4byte	0x57
-	.4byte	.LLST302
-	.uleb128 0x5e
-	.4byte	.LASF1190
-	.byte	0x1
-	.2byte	0x93a
-	.4byte	0x57
-	.4byte	.LLST303
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x649d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11184
-	.uleb128 0x44
-	.4byte	.LVL866
-	.4byte	0x530b
-	.4byte	0x640d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL873
-	.4byte	0x89c8
-	.4byte	0x6423
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL874
-	.4byte	0x8d5f
-	.uleb128 0x44
-	.4byte	.LVL884
-	.4byte	0x8565
-	.4byte	0x6440
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL890
-	.4byte	0x8540
-	.uleb128 0x44
-	.4byte	.LVL893
-	.4byte	0x103ff
-	.4byte	0x6470
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR137
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x965
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL894
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x649d
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x11
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x648d
-	.uleb128 0x5b
-	.4byte	.LASF1191
-	.byte	0x1
-	.2byte	0x91b
-	.4byte	0x8f
-	.4byte	.LFB375
-	.4byte	.LFE375-.LFB375
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6558
-	.uleb128 0x6d
-	.ascii	"p\000"
-	.byte	0x1
-	.2byte	0x91b
-	.4byte	0x35d9
-	.4byte	.LLST247
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x91d
-	.4byte	0x57
-	.4byte	.LLST248
-	.uleb128 0x38
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x91d
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11164
-	.uleb128 0x44
-	.4byte	.LVL659
-	.4byte	0x103ff
-	.4byte	0x651e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR101
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x91f
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL660
-	.4byte	0x103ff
-	.4byte	0x653e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL663
-	.4byte	0x89c8
-	.uleb128 0x45
-	.4byte	.LVL665
-	.4byte	0x8d5f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1192
-	.byte	0x1
-	.2byte	0x90e
-	.4byte	0x8f
-	.4byte	.LFB374
-	.4byte	.LFE374-.LFB374
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x65df
-	.uleb128 0x44
-	.4byte	.LVL2804
-	.4byte	0x660d
-	.4byte	0x6586
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2805
-	.4byte	0x65df
-	.4byte	0x659d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR91
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2806
-	.4byte	0x660d
-	.4byte	0x65b1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2807
-	.4byte	0x65df
-	.4byte	0x65c5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2808
-	.4byte	0x5616
-	.uleb128 0x45
-	.4byte	.LVL2809
-	.4byte	0x5b4d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1194
-	.byte	0x1
-	.2byte	0x8e5
-	.byte	0x1
-	.4byte	0x660d
-	.uleb128 0x55
-	.4byte	.LASF1160
-	.byte	0x1
-	.2byte	0x8e5
-	.4byte	0x35d9
-	.uleb128 0x56
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x8e7
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1163
-	.byte	0x1
-	.2byte	0x8ef
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1195
-	.byte	0x1
-	.2byte	0x756
-	.4byte	0x8f
-	.4byte	.LFB372
-	.4byte	.LFE372-.LFB372
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6c72
-	.uleb128 0x5c
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0x756
-	.4byte	0x35d9
-	.4byte	.LLST678
-	.uleb128 0x5e
-	.4byte	.LASF1196
-	.byte	0x1
-	.2byte	0x758
-	.4byte	0x57
-	.4byte	.LLST679
-	.uleb128 0x5e
-	.4byte	.LASF1197
-	.byte	0x1
-	.2byte	0x758
-	.4byte	0x57
-	.4byte	.LLST680
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x759
-	.4byte	0x57
-	.4byte	.LLST681
-	.uleb128 0x5e
-	.4byte	.LASF658
-	.byte	0x1
-	.2byte	0x759
-	.4byte	0x57
-	.4byte	.LLST682
-	.uleb128 0x5e
-	.4byte	.LASF656
-	.byte	0x1
-	.2byte	0x759
-	.4byte	0x57
-	.4byte	.LLST683
-	.uleb128 0x5e
-	.4byte	.LASF1198
-	.byte	0x1
-	.2byte	0x75a
-	.4byte	0x57
-	.4byte	.LLST684
-	.uleb128 0x5e
-	.4byte	.LASF1199
-	.byte	0x1
-	.2byte	0x75a
-	.4byte	0x57
-	.4byte	.LLST685
-	.uleb128 0x5e
-	.4byte	.LASF1116
-	.byte	0x1
-	.2byte	0x75b
-	.4byte	0x57
-	.4byte	.LLST686
-	.uleb128 0x5e
-	.4byte	.LASF1200
-	.byte	0x1
-	.2byte	0x75c
-	.4byte	0x8f
-	.4byte	.LLST687
-	.uleb128 0x5e
-	.4byte	.LASF1201
-	.byte	0x1
-	.2byte	0x75c
-	.4byte	0x8f
-	.4byte	.LLST688
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0x75d
-	.4byte	0x57
-	.4byte	.LLST689
-	.uleb128 0x5d
-	.ascii	"n\000"
-	.byte	0x1
-	.2byte	0x75d
-	.4byte	0x57
-	.4byte	.LLST690
-	.uleb128 0x5d
-	.ascii	"req\000"
-	.byte	0x1
-	.2byte	0x75d
-	.4byte	0x57
-	.4byte	.LLST691
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.4byte	.LLST692
-	.uleb128 0x38
-	.4byte	.LASF1202
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x38
-	.4byte	.LASF1145
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x38
-	.4byte	.LASF1136
-	.byte	0x1
-	.2byte	0x75e
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1150
-	.byte	0x1
-	.2byte	0x75f
-	.4byte	0x57
-	.4byte	.LLST693
-	.uleb128 0x5e
-	.4byte	.LASF1203
-	.byte	0x1
-	.2byte	0x75f
-	.4byte	0x57
-	.4byte	.LLST694
-	.uleb128 0x5e
-	.4byte	.LASF1204
-	.byte	0x1
-	.2byte	0x760
-	.4byte	0x74
-	.4byte	.LLST695
-	.uleb128 0x5e
-	.4byte	.LASF1205
-	.byte	0x1
-	.2byte	0x761
-	.4byte	0x57
-	.4byte	.LLST696
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x1
-	.2byte	0x762
-	.4byte	0x5442
-	.4byte	.LLST697
-	.uleb128 0x5e
-	.4byte	.LASF1206
-	.byte	0x1
-	.2byte	0x763
-	.4byte	0x74
-	.4byte	.LLST698
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x6c82
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11110
-	.uleb128 0x63
-	.4byte	.LASF1207
-	.byte	0x1
-	.2byte	0x812
-	.4byte	.L2355
-	.uleb128 0x63
-	.4byte	.LASF1140
-	.byte	0x1
-	.2byte	0x81a
-	.4byte	.L2373
-	.uleb128 0x63
-	.4byte	.LASF1208
-	.byte	0x1
-	.2byte	0x8d7
-	.4byte	.LDL3
-	.uleb128 0x58
-	.4byte	.LASF1209
-	.byte	0x1
-	.2byte	0x8e1
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x5b8
-	.4byte	0x682e
-	.uleb128 0x5e
-	.4byte	.LASF1210
-	.byte	0x1
-	.2byte	0x7d3
-	.4byte	0x74
-	.4byte	.LLST699
-	.uleb128 0x5e
-	.4byte	.LASF1211
-	.byte	0x1
-	.2byte	0x7d4
-	.4byte	0x74
-	.4byte	.LLST700
-	.uleb128 0x5e
-	.4byte	.LASF1212
-	.byte	0x1
-	.2byte	0x7d5
-	.4byte	0x74
-	.4byte	.LLST701
-	.uleb128 0x45
-	.4byte	.LVL2622
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x5d0
-	.4byte	0x6902
-	.uleb128 0x5e
-	.4byte	.LASF1213
-	.byte	0x1
-	.2byte	0x849
-	.4byte	0x74
-	.4byte	.LLST702
-	.uleb128 0x5e
-	.4byte	.LASF1214
-	.byte	0x1
-	.2byte	0x84a
-	.4byte	0x74
-	.4byte	.LLST703
-	.uleb128 0x44
-	.4byte	.LVL2671
-	.4byte	0xb17b
-	.4byte	0x686f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2673
-	.4byte	0x5b4d
-	.uleb128 0x44
-	.4byte	.LVL2680
-	.4byte	0x7a04
-	.4byte	0x6897
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2682
-	.4byte	0x8913
-	.4byte	0x68ab
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2683
-	.4byte	0x6c87
-	.4byte	0x68bf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2685
-	.4byte	0xb17b
-	.4byte	0x68d7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2687
-	.4byte	0x8913
-	.4byte	0x68eb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2688
-	.4byte	0x8913
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB507
-	.4byte	.LBE507-.LBB507
-	.4byte	0x697e
-	.uleb128 0x5e
-	.4byte	.LASF1215
-	.byte	0x1
-	.2byte	0x888
-	.4byte	0x74
-	.4byte	.LLST704
-	.uleb128 0x5e
-	.4byte	.LASF1214
-	.byte	0x1
-	.2byte	0x889
-	.4byte	0x74
-	.4byte	.LLST705
-	.uleb128 0x44
-	.4byte	.LVL2697
-	.4byte	0xb17b
-	.4byte	0x6947
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2698
-	.4byte	0x8913
-	.4byte	0x6962
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2700
-	.4byte	0x7a04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2556
-	.4byte	0x8847
-	.uleb128 0x44
-	.4byte	.LVL2563
-	.4byte	0xb17b
-	.4byte	0x69a2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2570
-	.4byte	0x8990
-	.uleb128 0x44
-	.4byte	.LVL2574
-	.4byte	0x6dbf
-	.4byte	0x69c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -84
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2578
-	.4byte	0x8847
-	.4byte	0x69db
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2583
-	.4byte	0x103ff
-	.4byte	0x6a02
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x78d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2584
-	.4byte	0x103ff
-	.4byte	0x6a22
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2585
-	.4byte	0x103ff
-	.4byte	0x6a49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x78e
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2586
-	.4byte	0x103ff
-	.4byte	0x6a69
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2599
-	.4byte	0x8913
-	.4byte	0x6a83
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2604
-	.4byte	0x103ff
-	.4byte	0x6a9a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC46
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2632
-	.4byte	0x7653
-	.4byte	0x6ab1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2636
-	.4byte	0xb17b
-	.4byte	0x6ace
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -72
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2653
-	.4byte	0x8990
-	.4byte	0x6ae8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x74
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2658
-	.4byte	0x5b4d
-	.uleb128 0x44
-	.4byte	.LVL2663
-	.4byte	0x8913
-	.4byte	0x6b0c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2664
-	.4byte	0x103ff
-	.4byte	0x6b33
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x843
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2665
-	.4byte	0x103ff
-	.4byte	0x6b53
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2667
-	.4byte	0x7a04
-	.4byte	0x6b72
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2668
-	.4byte	0x8913
-	.4byte	0x6b8d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2674
-	.4byte	0x8958
-	.4byte	0x6ba7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x76
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2677
-	.4byte	0x103ff
-	.4byte	0x6bce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8a8
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2678
-	.4byte	0x103ff
-	.4byte	0x6bee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2691
-	.4byte	0x7a04
-	.4byte	0x6c0d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2693
-	.4byte	0x8958
-	.4byte	0x6c27
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x76
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2702
-	.4byte	0x103ff
-	.4byte	0x6c44
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC47
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2705
-	.4byte	0x103ff
-	.4byte	0x6c68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC48
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2706
-	.4byte	0x5b4d
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x6c82
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x15
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x6c72
-	.uleb128 0x69
-	.4byte	.LASF1216
-	.byte	0x1
-	.2byte	0x73a
-	.4byte	.LFB371
-	.4byte	.LFE371-.LFB371
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6dbf
-	.uleb128 0x6d
-	.ascii	"lpa\000"
-	.byte	0x1
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LLST608
-	.uleb128 0x5c
-	.4byte	.LASF1202
-	.byte	0x1
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LLST609
-	.uleb128 0x5e
-	.4byte	.LASF1150
-	.byte	0x1
-	.2byte	0x73c
-	.4byte	0x57
-	.4byte	.LLST610
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11077
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x560
-	.4byte	0x6d88
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x740
-	.4byte	0x57
-	.4byte	.LLST611
-	.uleb128 0x5e
-	.4byte	.LASF1108
-	.byte	0x1
-	.2byte	0x741
-	.4byte	0x57
-	.4byte	.LLST612
-	.uleb128 0x5e
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0x742
-	.4byte	0x57
-	.4byte	.LLST613
-	.uleb128 0x44
-	.4byte	.LVL2229
-	.4byte	0x838c
-	.4byte	0x6d30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR87
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2230
-	.4byte	0x103ff
-	.4byte	0x6d57
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR214
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x746
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2231
-	.4byte	0x103ff
-	.4byte	0x6d77
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2232
-	.4byte	0x8540
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2223
-	.4byte	0x8958
-	.4byte	0x6da3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2238
-	.4byte	0x7a04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1217
-	.byte	0x1
-	.2byte	0x726
-	.4byte	.LFB370
-	.4byte	.LFE370-.LFB370
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e14
-	.uleb128 0x70
-	.4byte	.LASF1133
-	.byte	0x1
-	.2byte	0x726
-	.4byte	0x35d9
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF656
-	.byte	0x1
-	.2byte	0x726
-	.4byte	0x57
-	.4byte	.LLST244
-	.uleb128 0x5c
-	.4byte	.LASF658
-	.byte	0x1
-	.2byte	0x726
-	.4byte	0x57
-	.4byte	.LLST245
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x728
-	.4byte	0x57
-	.4byte	.LLST246
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1218
-	.byte	0x1
-	.2byte	0x71b
-	.4byte	0x8f
-	.4byte	.LFB369
-	.4byte	.LFE369-.LFB369
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e4b
-	.uleb128 0x48
-	.4byte	.LVL2546
-	.4byte	0x6e4b
-	.uleb128 0x45
-	.4byte	.LVL2547
-	.4byte	0x6ec3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1219
-	.byte	0x1
-	.2byte	0x703
-	.4byte	.LFB368
-	.4byte	.LFE368-.LFB368
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e95
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x705
-	.4byte	0x57
-	.4byte	.LLST297
-	.uleb128 0x44
-	.4byte	.LVL851
-	.4byte	0x530b
-	.4byte	0x6e84
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL852
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1220
-	.byte	0x1
-	.2byte	0x6f2
-	.4byte	0x8f
-	.4byte	.LFB367
-	.4byte	.LFE367-.LFB367
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6ec3
-	.uleb128 0x45
-	.4byte	.LVL2545
-	.4byte	0x6ec3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1221
-	.byte	0x1
-	.2byte	0x659
-	.4byte	0x8f
-	.4byte	.LFB366
-	.4byte	.LFE366-.LFB366
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7105
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x659
-	.4byte	0x7105
-	.4byte	.LLST665
-	.uleb128 0x5e
-	.4byte	.LASF1223
-	.byte	0x1
-	.2byte	0x65b
-	.4byte	0x62
-	.4byte	.LLST666
-	.uleb128 0x5e
-	.4byte	.LASF576
-	.byte	0x1
-	.2byte	0x65b
-	.4byte	0x62
-	.4byte	.LLST667
-	.uleb128 0x5e
-	.4byte	.LASF1224
-	.byte	0x1
-	.2byte	0x65c
-	.4byte	0x62
-	.4byte	.LLST668
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x65d
-	.4byte	0x57
-	.4byte	.LLST669
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x65e
-	.4byte	0x13e
-	.4byte	.LLST670
-	.uleb128 0x5e
-	.4byte	.LASF587
-	.byte	0x1
-	.2byte	0x65f
-	.4byte	0x293a
-	.4byte	.LLST671
-	.uleb128 0x5e
-	.4byte	.LASF588
-	.byte	0x1
-	.2byte	0x660
-	.4byte	0x13e
-	.4byte	.LLST672
-	.uleb128 0x5e
-	.4byte	.LASF584
-	.byte	0x1
-	.2byte	0x661
-	.4byte	0x57
-	.4byte	.LLST673
-	.uleb128 0x38
-	.4byte	.LASF1226
-	.byte	0x1
-	.2byte	0x662
-	.4byte	0x57
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -48
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x663
-	.4byte	0x710b
-	.4byte	.LLST674
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x578
-	.4byte	0x7028
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x6b1
-	.4byte	0x74
-	.4byte	.LLST675
-	.uleb128 0x5e
-	.4byte	.LASF383
-	.byte	0x1
-	.2byte	0x6b1
-	.4byte	0x74
-	.4byte	.LLST676
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x598
-	.4byte	0x6fed
-	.uleb128 0x5e
-	.4byte	.LASF1228
-	.byte	0x1
-	.2byte	0x6cd
-	.4byte	0x57
-	.4byte	.LLST677
-	.uleb128 0x44
-	.4byte	.LVL2535
-	.4byte	0x103ff
-	.4byte	0x6fe3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC45
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2538
-	.4byte	0x8671
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2531
-	.4byte	0xb17b
-	.4byte	0x700c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2540
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2492
-	.4byte	0x530b
-	.4byte	0x704b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2496
-	.4byte	0x8847
-	.4byte	0x705e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2504
-	.4byte	0x8113
-	.4byte	0x7072
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2505
-	.4byte	0x80bb
-	.4byte	0x7086
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2506
-	.4byte	0x7f15
-	.4byte	0x709a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2507
-	.4byte	0x7f15
-	.4byte	0x70ae
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2510
-	.4byte	0xb17b
-	.4byte	0x70cc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2515
-	.4byte	0xb17b
-	.4byte	0x70ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2518
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2885
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2aa2
-	.uleb128 0x67
-	.4byte	.LASF1229
-	.byte	0x1
-	.2byte	0x5ea
-	.4byte	0x8f
-	.4byte	.LFB365
-	.4byte	.LFE365-.LFB365
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7309
-	.uleb128 0x5e
-	.4byte	.LASF1224
-	.byte	0x1
-	.2byte	0x5ec
-	.4byte	0x62
-	.4byte	.LLST663
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.11007
-	.uleb128 0x6f
-	.4byte	.LBB495
-	.4byte	.LBE495-.LBB495
-	.4byte	0x7171
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x60f
-	.4byte	0x57
-	.4byte	.LLST664
-	.uleb128 0x48
-	.4byte	.LVL2470
-	.4byte	0x52a5
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2458
-	.4byte	0x530b
-	.4byte	0x7184
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2459
-	.4byte	0x8847
-	.4byte	0x7197
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2461
-	.4byte	0x103ff
-	.4byte	0x71be
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x607
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2462
-	.4byte	0x103ff
-	.4byte	0x71de
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2463
-	.4byte	0x103ff
-	.4byte	0x7205
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x609
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2464
-	.4byte	0x103ff
-	.4byte	0x7225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2465
-	.4byte	0x52a5
-	.4byte	0x7242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2466
-	.4byte	0x52a5
-	.uleb128 0x48
-	.4byte	.LVL2467
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL2472
-	.4byte	0x103ff
-	.4byte	0x727b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR225
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x624
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2473
-	.4byte	0x103ff
-	.4byte	0x729b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2475
-	.4byte	0x64a2
-	.4byte	0x72b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR91
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2476
-	.4byte	0x64a2
-	.4byte	0x72c6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2477
-	.4byte	0x64a2
-	.4byte	0x72da
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2478
-	.4byte	0x64a2
-	.4byte	0x72ee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2480
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x7319
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xe
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x7309
-	.uleb128 0x5b
-	.4byte	.LASF1230
-	.byte	0x1
-	.2byte	0x5e5
-	.4byte	0x8f
-	.4byte	.LFB364
-	.4byte	.LFE364-.LFB364
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7349
-	.uleb128 0x5c
-	.4byte	.LASF1231
-	.byte	0x1
-	.2byte	0x5e5
-	.4byte	0x57
-	.4byte	.LLST243
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1232
-	.byte	0x1
-	.2byte	0x5dd
-	.byte	0x1
-	.4byte	0x736f
-	.uleb128 0x55
-	.4byte	.LASF1231
-	.byte	0x1
-	.2byte	0x5dd
-	.4byte	0x57
-	.uleb128 0x55
-	.4byte	.LASF923
-	.byte	0x1
-	.2byte	0x5dd
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1233
-	.byte	0x1
-	.2byte	0x5d0
-	.4byte	0x8f
-	.byte	0x1
-	.uleb128 0x5b
-	.4byte	.LASF1234
-	.byte	0x1
-	.2byte	0x4d2
-	.4byte	0x8f
-	.4byte	.LFB361
-	.4byte	.LFE361-.LFB361
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x75df
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x1
-	.2byte	0x4d4
-	.4byte	0x57
-	.4byte	.LLST656
-	.uleb128 0x5e
-	.4byte	.LASF1235
-	.byte	0x1
-	.2byte	0x4d4
-	.4byte	0x57
-	.4byte	.LLST657
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x4d5
-	.4byte	0x57
-	.4byte	.LLST658
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x1
-	.2byte	0x4d5
-	.4byte	0x57
-	.4byte	.LLST659
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x4d6
-	.4byte	0x62
-	.4byte	.LLST660
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x1
-	.2byte	0x4d6
-	.4byte	0x62
-	.4byte	.LLST661
-	.uleb128 0x5e
-	.4byte	.LASF1236
-	.byte	0x1
-	.2byte	0x4d7
-	.4byte	0x710b
-	.4byte	.LLST662
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x75ef
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10953
-	.uleb128 0x44
-	.4byte	.LVL2391
-	.4byte	0x530b
-	.4byte	0x7425
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2392
-	.4byte	0x530b
-	.4byte	0x7439
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2393
-	.4byte	0x530b
-	.4byte	0x744d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2394
-	.4byte	0x530b
-	.4byte	0x7461
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2395
-	.4byte	0x530b
-	.4byte	0x7483
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR206
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2398
-	.4byte	0x89c8
-	.4byte	0x7499
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2400
-	.4byte	0x8d5f
-	.4byte	0x74af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2408
-	.4byte	0xb17b
-	.4byte	0x74ce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2413
-	.4byte	0xb17b
-	.4byte	0x74e6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2419
-	.4byte	0x8737
-	.4byte	0x74fa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2420
-	.4byte	0x103ff
-	.4byte	0x7521
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR224
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x516
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2421
-	.4byte	0x103ff
-	.4byte	0x7541
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2432
-	.4byte	0x103ff
-	.4byte	0x7568
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR224
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x545
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2433
-	.4byte	0x103ff
-	.4byte	0x7588
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2443
-	.4byte	0x8737
-	.4byte	0x759b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2445
-	.4byte	0x103ff
-	.4byte	0x75c2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR224
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x5cb
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2446
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x75ef
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xd
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x75df
-	.uleb128 0x54
-	.4byte	.LASF1237
-	.byte	0x1
-	.2byte	0x46e
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x764d
-	.uleb128 0x56
-	.4byte	.LASF577
-	.byte	0x1
-	.2byte	0x470
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1238
-	.byte	0x1
-	.2byte	0x471
-	.4byte	0x764d
-	.uleb128 0x56
-	.4byte	.LASF1239
-	.byte	0x1
-	.2byte	0x472
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1240
-	.byte	0x1
-	.2byte	0x4a6
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.4byte	.LASF1237
-	.uleb128 0x68
-	.uleb128 0x56
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x4a1
-	.4byte	0x57
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2aea
-	.uleb128 0x69
-	.4byte	.LASF1241
-	.byte	0x1
-	.2byte	0x400
-	.4byte	.LFB359
-	.4byte	.LFE359-.LFB359
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7735
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x400
-	.4byte	0x7105
-	.4byte	.LLST650
-	.uleb128 0x5d
-	.ascii	"ppa\000"
-	.byte	0x1
-	.2byte	0x402
-	.4byte	0x74
-	.4byte	.LLST651
-	.uleb128 0x5e
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x403
-	.4byte	0x57
-	.4byte	.LLST652
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x404
-	.4byte	0x13e
-	.4byte	.LLST653
-	.uleb128 0x6f
-	.4byte	.LBB494
-	.4byte	.LBE494-.LBB494
-	.4byte	0x76f1
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x412
-	.4byte	0x74
-	.4byte	.LLST654
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x413
-	.4byte	0x710b
-	.4byte	.LLST655
-	.uleb128 0x45
-	.4byte	.LVL2381
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LVL2384
-	.4byte	0x7d61
-	.4byte	0x7706
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2386
-	.4byte	0xb17b
-	.4byte	0x7724
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2389
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1242
-	.byte	0x1
-	.2byte	0x3f1
-	.byte	0x1
-	.4byte	0x7759
-	.uleb128 0x55
-	.4byte	.LASF669
-	.byte	0x1
-	.2byte	0x3f1
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x3f3
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1243
-	.byte	0x1
-	.2byte	0x3db
-	.4byte	0x8f
-	.4byte	.LFB357
-	.4byte	.LFE357-.LFB357
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x77b1
-	.uleb128 0x5c
-	.4byte	.LASF1244
-	.byte	0x1
-	.2byte	0x3db
-	.4byte	0x74
-	.4byte	.LLST622
-	.uleb128 0x5e
-	.4byte	.LASF1245
-	.byte	0x1
-	.2byte	0x3dd
-	.4byte	0x74
-	.4byte	.LLST623
-	.uleb128 0x44
-	.4byte	.LVL2270
-	.4byte	0x78f1
-	.4byte	0x77a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2271
-	.4byte	0x6367
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1246
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x74
-	.4byte	.LFB356
-	.4byte	.LFE356-.LFB356
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x78f1
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x74
-	.4byte	.LLST642
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x74
-	.4byte	.LLST643
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x1
-	.2byte	0x3b2
-	.4byte	0x8b6
-	.4byte	.LLST644
-	.uleb128 0x5d
-	.ascii	"len\000"
-	.byte	0x1
-	.2byte	0x3b4
-	.4byte	0x57
-	.4byte	.LLST645
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x3b4
-	.4byte	0x57
-	.4byte	.LLST646
-	.uleb128 0x5d
-	.ascii	"ppn\000"
-	.byte	0x1
-	.2byte	0x3b5
-	.4byte	0x74
-	.4byte	.LLST647
-	.uleb128 0x5e
-	.4byte	.LASF1249
-	.byte	0x1
-	.2byte	0x3b6
-	.4byte	0x74
-	.4byte	.LLST648
-	.uleb128 0x71
-	.ascii	"req\000"
-	.byte	0x1
-	.2byte	0x3b7
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x5e
-	.4byte	.LASF1250
-	.byte	0x1
-	.2byte	0x3b8
-	.4byte	0x74
-	.4byte	.LLST649
-	.uleb128 0x44
-	.4byte	.LVL2356
-	.4byte	0xb17b
-	.4byte	0x787a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2358
-	.4byte	0x103ff
-	.4byte	0x789f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC42
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -76
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2359
-	.4byte	0x7d61
-	.4byte	0x78bc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2360
-	.4byte	0x52a5
-	.4byte	0x78d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2366
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1251
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x74
-	.4byte	.LFB355
-	.4byte	.LFE355-.LFB355
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7a04
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x74
-	.4byte	.LLST614
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x74
-	.4byte	.LLST615
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x1
-	.2byte	0x38e
-	.4byte	0x8b6
-	.4byte	.LLST616
-	.uleb128 0x5d
-	.ascii	"len\000"
-	.byte	0x1
-	.2byte	0x390
-	.4byte	0x57
-	.4byte	.LLST617
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x1
-	.2byte	0x390
-	.4byte	0x57
-	.4byte	.LLST618
-	.uleb128 0x5d
-	.ascii	"ppn\000"
-	.byte	0x1
-	.2byte	0x391
-	.4byte	0x74
-	.4byte	.LLST619
-	.uleb128 0x5e
-	.4byte	.LASF1249
-	.byte	0x1
-	.2byte	0x392
-	.4byte	0x74
-	.4byte	.LLST620
-	.uleb128 0x71
-	.ascii	"req\000"
-	.byte	0x1
-	.2byte	0x393
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x5e
-	.4byte	.LASF1250
-	.byte	0x1
-	.2byte	0x394
-	.4byte	0x74
-	.4byte	.LLST621
-	.uleb128 0x44
-	.4byte	.LVL2251
-	.4byte	0xb17b
-	.4byte	0x79ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2254
-	.4byte	0x52a5
-	.4byte	0x79d7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -80
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2256
-	.4byte	0x7d61
-	.4byte	0x79f4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2261
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1252
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x8f
-	.4byte	.LFB354
-	.4byte	.LFE354-.LFB354
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7c31
-	.uleb128 0x6d
-	.ascii	"lpn\000"
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x74
-	.4byte	.LLST600
-	.uleb128 0x6d
-	.ascii	"ppn\000"
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x13e
-	.4byte	.LLST601
-	.uleb128 0x5c
-	.4byte	.LASF1253
-	.byte	0x1
-	.2byte	0x36d
-	.4byte	0x8f
-	.4byte	.LLST602
-	.uleb128 0x5e
-	.4byte	.LASF1254
-	.byte	0x1
-	.2byte	0x36f
-	.4byte	0x57
-	.4byte	.LLST603
-	.uleb128 0x38
-	.4byte	.LASF1255
-	.byte	0x1
-	.2byte	0x36f
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x38
-	.4byte	.LASF1256
-	.byte	0x1
-	.2byte	0x36f
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7c41
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10872
-	.uleb128 0x63
-	.4byte	.LASF1257
-	.byte	0x1
-	.2byte	0x378
-	.4byte	.L1988
-	.uleb128 0x72
-	.4byte	0x81e2
-	.4byte	.LBB472
-	.4byte	.Ldebug_ranges0+0x548
-	.byte	0x1
-	.2byte	0x38a
-	.4byte	0x7bd0
-	.uleb128 0x4f
-	.4byte	0x81ff
-	.4byte	.LLST604
-	.uleb128 0x4f
-	.4byte	0x81f3
-	.4byte	.LLST605
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x548
-	.uleb128 0x73
-	.4byte	0x820b
-	.4byte	.LLST606
-	.uleb128 0x73
-	.4byte	0x8217
-	.4byte	.LLST607
-	.uleb128 0x74
-	.4byte	0x8223
-	.uleb128 0x44
-	.4byte	.LVL2204
-	.4byte	0x103ff
-	.4byte	0x7afe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR213
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x20e
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2205
-	.4byte	0x103ff
-	.4byte	0x7b1e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2207
-	.4byte	0x530b
-	.4byte	0x7b32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2213
-	.4byte	0xb17b
-	.4byte	0x7b51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2217
-	.4byte	0x103ff
-	.4byte	0x7b6e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2218
-	.4byte	0x7d61
-	.4byte	0x7b8b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2219
-	.4byte	0x103ff
-	.4byte	0x7bb2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR213
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x228
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2220
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2197
-	.4byte	0x103ff
-	.4byte	0x7bf7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR212
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x374
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2198
-	.4byte	0x103ff
-	.4byte	0x7c17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2201
-	.4byte	0x7c78
-	.uleb128 0x45
-	.4byte	.LVL2203
-	.4byte	0x7d13
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x7c41
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x8
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x7c31
-	.uleb128 0x5b
-	.4byte	.LASF1258
-	.byte	0x1
-	.2byte	0x35f
-	.4byte	0x8f
-	.4byte	.LFB353
-	.4byte	.LFE353-.LFB353
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7c78
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x361
-	.4byte	0x57
-	.4byte	.LLST599
-	.uleb128 0x48
-	.4byte	.LVL2189
-	.4byte	0x7d13
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1259
-	.byte	0x1
-	.2byte	0x337
-	.4byte	0x57
-	.4byte	.LFB352
-	.4byte	.LFE352-.LFB352
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7d13
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x1
-	.2byte	0x339
-	.4byte	0x57
-	.4byte	.LLST236
-	.uleb128 0x5e
-	.4byte	.LASF1260
-	.byte	0x1
-	.2byte	0x33a
-	.4byte	0x57
-	.4byte	.LLST237
-	.uleb128 0x5e
-	.4byte	.LASF1261
-	.byte	0x1
-	.2byte	0x33b
-	.4byte	0x74
-	.4byte	.LLST238
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x6c82
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10856
-	.uleb128 0x44
-	.4byte	.LVL626
-	.4byte	0x103ff
-	.4byte	0x7cf6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR98
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x35b
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL627
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1262
-	.byte	0x1
-	.2byte	0x32d
-	.4byte	0x8f
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7d61
-	.uleb128 0x5c
-	.4byte	.LASF1254
-	.byte	0x1
-	.2byte	0x32d
-	.4byte	0x57
-	.4byte	.LLST597
-	.uleb128 0x5e
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x32f
-	.4byte	0x74
-	.4byte	.LLST598
-	.uleb128 0x45
-	.4byte	.LVL2183
-	.4byte	0x7d61
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1263
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x7dd0
-	.uleb128 0x55
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x7105
-	.uleb128 0x55
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x74
-	.uleb128 0x55
-	.4byte	.LASF1248
-	.byte	0x1
-	.2byte	0x2e5
-	.4byte	0x13e
-	.uleb128 0x56
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x2e7
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x2e8
-	.4byte	0x710b
-	.uleb128 0x56
-	.4byte	.LASF1239
-	.byte	0x1
-	.2byte	0x2e9
-	.4byte	0x57
-	.uleb128 0x58
-	.4byte	.LASF1264
-	.byte	0x1
-	.2byte	0x2ee
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5c4d
-	.4byte	.LASF1263
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1265
-	.byte	0x1
-	.2byte	0x2b3
-	.4byte	0x8f
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7f00
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x2b3
-	.4byte	0x7105
-	.4byte	.LLST586
-	.uleb128 0x56
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x2b5
-	.4byte	0x57
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x2b5
-	.4byte	0x57
-	.4byte	.LLST587
-	.uleb128 0x5e
-	.4byte	.LASF1266
-	.byte	0x1
-	.2byte	0x2b6
-	.4byte	0x57
-	.4byte	.LLST588
-	.uleb128 0x5e
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x2b7
-	.4byte	0x293a
-	.4byte	.LLST589
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x2b8
-	.4byte	0x13e
-	.4byte	.LLST590
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x2b9
-	.4byte	0x710b
-	.4byte	.LLST591
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7f10
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10823
-	.uleb128 0x44
-	.4byte	.LVL2141
-	.4byte	0x103ff
-	.4byte	0x7e8c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR210
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bf
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2142
-	.4byte	0x103ff
-	.4byte	0x7eac
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2143
-	.4byte	0x858a
-	.uleb128 0x44
-	.4byte	.LVL2149
-	.4byte	0x530b
-	.4byte	0x7ec9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2154
-	.4byte	0xae0d
-	.4byte	0x7eef
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR199
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2155
-	.4byte	0x7f15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x7f10
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x7f00
-	.uleb128 0x5b
-	.4byte	.LASF1268
-	.byte	0x1
-	.2byte	0x277
-	.4byte	0x8f
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x80bb
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x277
-	.4byte	0x7105
-	.4byte	.LLST579
-	.uleb128 0x5e
-	.4byte	.LASF1269
-	.byte	0x1
-	.2byte	0x279
-	.4byte	0x57
-	.4byte	.LLST580
-	.uleb128 0x5e
-	.4byte	.LASF1270
-	.byte	0x1
-	.2byte	0x27a
-	.4byte	0x57
-	.4byte	.LLST581
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x27b
-	.4byte	0x57
-	.4byte	.LLST582
-	.uleb128 0x5e
-	.4byte	.LASF1271
-	.byte	0x1
-	.2byte	0x27c
-	.4byte	0x57
-	.4byte	.LLST583
-	.uleb128 0x5e
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x27d
-	.4byte	0x293a
-	.4byte	.LLST584
-	.uleb128 0x38
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x27e
-	.4byte	0x13e
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x5e
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x27f
-	.4byte	0x710b
-	.4byte	.LLST585
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10810
-	.uleb128 0x44
-	.4byte	.LVL2111
-	.4byte	0x8113
-	.4byte	0x7fd0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2115
-	.4byte	0x80bb
-	.4byte	0x7fe4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2118
-	.4byte	0x8737
-	.4byte	0x7ffd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2120
-	.4byte	0x80bb
-	.4byte	0x8011
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2126
-	.4byte	0x103ff
-	.4byte	0x8028
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC36
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2131
-	.4byte	0xb17b
-	.4byte	0x8046
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2132
-	.4byte	0x103ff
-	.4byte	0x806d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR209
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x29f
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2133
-	.4byte	0x103ff
-	.4byte	0x808d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2134
-	.4byte	0x103ff
-	.4byte	0x80a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC37
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2138
-	.4byte	0x7d61
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1272
-	.byte	0x1
-	.2byte	0x258
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x80fe
-	.uleb128 0x55
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x258
-	.4byte	0x7105
-	.uleb128 0x56
-	.4byte	.LASF1271
-	.byte	0x1
-	.2byte	0x25a
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x25b
-	.4byte	0x293a
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x810e
-	.4byte	.LASF1272
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x810e
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x19
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x80fe
-	.uleb128 0x5b
-	.4byte	.LASF1273
-	.byte	0x1
-	.2byte	0x230
-	.4byte	0x8f
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x81e2
-	.uleb128 0x5c
-	.4byte	.LASF1222
-	.byte	0x1
-	.2byte	0x230
-	.4byte	0x7105
-	.4byte	.LLST290
-	.uleb128 0x38
-	.4byte	.LASF1267
-	.byte	0x1
-	.2byte	0x232
-	.4byte	0x293a
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x5e
-	.4byte	.LASF1225
-	.byte	0x1
-	.2byte	0x233
-	.4byte	0x13e
-	.4byte	.LLST291
-	.uleb128 0x38
-	.4byte	.LASF1274
-	.byte	0x1
-	.2byte	0x234
-	.4byte	0x293a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x1
-	.2byte	0x235
-	.4byte	0x57
-	.4byte	.LLST292
-	.uleb128 0x5e
-	.4byte	.LASF607
-	.byte	0x1
-	.2byte	0x235
-	.4byte	0x57
-	.4byte	.LLST293
-	.uleb128 0x5e
-	.4byte	.LASF1271
-	.byte	0x1
-	.2byte	0x236
-	.4byte	0x57
-	.4byte	.LLST294
-	.uleb128 0x5e
-	.4byte	.LASF1275
-	.byte	0x1
-	.2byte	0x237
-	.4byte	0x57
-	.4byte	.LLST295
-	.uleb128 0x5e
-	.4byte	.LASF1270
-	.byte	0x1
-	.2byte	0x238
-	.4byte	0x57
-	.4byte	.LLST296
-	.uleb128 0x44
-	.4byte	.LVL831
-	.4byte	0x530b
-	.4byte	0x81d2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL848
-	.4byte	0x8737
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x75
-	.4byte	.LASF1276
-	.byte	0x1
-	.2byte	0x209
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x8231
-	.uleb128 0x55
-	.4byte	.LASF595
-	.byte	0x1
-	.2byte	0x209
-	.4byte	0x57
-	.uleb128 0x55
-	.4byte	.LASF1254
-	.byte	0x1
-	.2byte	0x209
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1227
-	.byte	0x1
-	.2byte	0x20b
-	.4byte	0x710b
-	.uleb128 0x56
-	.4byte	.LASF21
-	.byte	0x1
-	.2byte	0x20c
-	.4byte	0x74
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x5c0d
-	.4byte	.LASF1276
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1277
-	.byte	0x1
-	.2byte	0x1e1
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x82b0
-	.uleb128 0x55
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x1e1
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1278
-	.byte	0x1
-	.2byte	0x1e3
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1279
-	.byte	0x1
-	.2byte	0x1e4
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1280
-	.byte	0x1
-	.2byte	0x1e5
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1281
-	.byte	0x1
-	.2byte	0x1e7
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1282
-	.byte	0x1
-	.2byte	0x1e8
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x1e9
-	.4byte	0x3529
-	.uleb128 0x56
-	.4byte	.LASF1284
-	.byte	0x1
-	.2byte	0x1e9
-	.4byte	0x3529
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x6c82
-	.4byte	.LASF1277
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1285
-	.byte	0x1
-	.2byte	0x1cd
-	.4byte	0x8f
-	.4byte	.LFB343
-	.4byte	.LFE343-.LFB343
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x82fb
-	.uleb128 0x5c
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0x1cd
-	.4byte	0x57
-	.4byte	.LLST220
-	.uleb128 0x5e
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x1cf
-	.4byte	0x57
-	.4byte	.LLST221
-	.uleb128 0x5e
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x1d0
-	.4byte	0x3529
-	.4byte	.LLST222
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1286
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x8f
-	.4byte	.LFB342
-	.4byte	.LFE342-.LFB342
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8386
-	.uleb128 0x5c
-	.4byte	.LASF1287
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x8386
-	.4byte	.LLST214
-	.uleb128 0x5c
-	.4byte	.LASF542
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x57
-	.4byte	.LLST215
-	.uleb128 0x5c
-	.4byte	.LASF660
-	.byte	0x1
-	.2byte	0x19a
-	.4byte	0x57
-	.4byte	.LLST216
-	.uleb128 0x5e
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x19c
-	.4byte	0x57
-	.4byte	.LLST217
-	.uleb128 0x5e
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x19d
-	.4byte	0x3529
-	.4byte	.LLST218
-	.uleb128 0x5e
-	.4byte	.LASF1288
-	.byte	0x1
-	.2byte	0x19e
-	.4byte	0x74
-	.4byte	.LLST219
-	.uleb128 0x45
-	.4byte	.LVL566
-	.4byte	0x838c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x3529
-	.uleb128 0x5b
-	.4byte	.LASF1289
-	.byte	0x1
-	.2byte	0x17d
-	.4byte	0x8f
-	.4byte	.LFB341
-	.4byte	.LFE341-.LFB341
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8437
-	.uleb128 0x5c
-	.4byte	.LASF1287
-	.byte	0x1
-	.2byte	0x17d
-	.4byte	0x8386
-	.4byte	.LLST211
-	.uleb128 0x5c
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x17d
-	.4byte	0x57
-	.4byte	.LLST212
-	.uleb128 0x38
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x17f
-	.4byte	0x3529
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x5e
-	.4byte	.LASF1290
-	.byte	0x1
-	.2byte	0x17f
-	.4byte	0x3529
-	.4byte	.LLST213
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x8447
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10728
-	.uleb128 0x44
-	.4byte	.LVL550
-	.4byte	0x103ff
-	.4byte	0x841a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR90
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x182
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL551
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x8447
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x10
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x8437
-	.uleb128 0x5b
-	.4byte	.LASF1291
-	.byte	0x1
-	.2byte	0x14c
-	.4byte	0x8f
-	.4byte	.LFB340
-	.4byte	.LFE340-.LFB340
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x84c4
-	.uleb128 0x5c
-	.4byte	.LASF1188
-	.byte	0x1
-	.2byte	0x14c
-	.4byte	0x57
-	.4byte	.LLST206
-	.uleb128 0x5e
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x14e
-	.4byte	0x3529
-	.4byte	.LLST207
-	.uleb128 0x38
-	.4byte	.LASF1290
-	.byte	0x1
-	.2byte	0x14e
-	.4byte	0x3529
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x38
-	.4byte	.LASF1292
-	.byte	0x1
-	.2byte	0x14f
-	.4byte	0x57
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1293
-	.byte	0x1
-	.2byte	0x150
-	.4byte	0x57
-	.4byte	.LLST208
-	.uleb128 0x5e
-	.4byte	.LASF1294
-	.byte	0x1
-	.2byte	0x151
-	.4byte	0x57
-	.4byte	.LLST209
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1295
-	.byte	0x1
-	.byte	0xff
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x8540
-	.uleb128 0x51
-	.4byte	.LASF1188
-	.byte	0x1
-	.byte	0xff
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1283
-	.byte	0x1
-	.2byte	0x101
-	.4byte	0x3529
-	.uleb128 0x56
-	.4byte	.LASF1290
-	.byte	0x1
-	.2byte	0x101
-	.4byte	0x3529
-	.uleb128 0x56
-	.4byte	.LASF1296
-	.byte	0x1
-	.2byte	0x102
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1297
-	.byte	0x1
-	.2byte	0x103
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1280
-	.byte	0x1
-	.2byte	0x104
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1298
-	.byte	0x1
-	.2byte	0x105
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1294
-	.byte	0x1
-	.2byte	0x106
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF602
-	.byte	0x1
-	.2byte	0x107
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x76
-	.4byte	.LASF1299
-	.byte	0x1
-	.byte	0xe0
-	.byte	0x1
-	.4byte	0x8565
-	.uleb128 0x51
-	.4byte	.LASF1188
-	.byte	0x1
-	.byte	0xe0
-	.4byte	0x57
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x8447
-	.4byte	.LASF1299
-	.byte	0
-	.uleb128 0x76
-	.4byte	.LASF1300
-	.byte	0x1
-	.byte	0xd5
-	.byte	0x1
-	.4byte	0x858a
-	.uleb128 0x51
-	.4byte	.LASF1188
-	.byte	0x1
-	.byte	0xd5
-	.4byte	0x57
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x8447
-	.4byte	.LASF1300
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1301
-	.byte	0x1
-	.byte	0xb5
-	.4byte	0x57
-	.4byte	.LFB336
-	.4byte	.LFE336-.LFB336
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x866b
-	.uleb128 0x41
-	.ascii	"tmp\000"
-	.byte	0x1
-	.byte	0xb7
-	.4byte	0x57
-	.4byte	.LLST194
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0xb8
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x78
-	.4byte	.LASF1302
-	.byte	0x1
-	.byte	0xba
-	.4byte	.L509
-	.uleb128 0x6f
-	.4byte	.LBB254
-	.4byte	.LBE254-.LBB254
-	.4byte	0x862b
-	.uleb128 0x61
-	.4byte	.LASF1303
-	.byte	0x1
-	.byte	0xc0
-	.4byte	0x57
-	.4byte	.LLST195
-	.uleb128 0x44
-	.4byte	.LVL471
-	.4byte	0x8958
-	.4byte	0x85fd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL473
-	.4byte	0xac82
-	.4byte	0x8616
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL474
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x79
-	.4byte	0x87e2
-	.4byte	.LBB252
-	.4byte	.LBE252-.LBB252
-	.byte	0x1
-	.byte	0xbb
-	.uleb128 0x44
-	.4byte	.LVL476
-	.4byte	0x103ff
-	.4byte	0x8657
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL478
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC4
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x2db6
-	.uleb128 0x4b
-	.4byte	.LASF1304
-	.byte	0x1
-	.byte	0xa0
-	.4byte	0x8f
-	.4byte	.LFB335
-	.4byte	.LFE335-.LFB335
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x86e8
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x1
-	.byte	0xa0
-	.4byte	0x57
-	.4byte	.LLST191
-	.uleb128 0x41
-	.ascii	"ret\000"
-	.byte	0x1
-	.byte	0xa2
-	.4byte	0x8f
-	.4byte	.LLST192
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xa3
-	.4byte	0x74
-	.4byte	.LLST193
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0xa4
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x79
-	.4byte	0x87e2
-	.4byte	.LBB250
-	.4byte	.LBE250-.LBB250
-	.byte	0x1
-	.byte	0xa6
-	.uleb128 0x45
-	.4byte	.LVL464
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC3
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1305
-	.byte	0x1
-	.byte	0x75
-	.4byte	.LFB334
-	.4byte	.LFE334-.LFB334
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8737
-	.uleb128 0x36
-	.4byte	.LASF602
-	.byte	0x1
-	.byte	0x77
-	.4byte	0x84
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x78
-	.4byte	0x57
-	.4byte	.LLST189
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x1
-	.byte	0x78
-	.4byte	0x57
-	.4byte	.LLST190
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0x79
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1306
-	.byte	0x1
-	.byte	0x61
-	.4byte	.LFB333
-	.4byte	.LFE333-.LFB333
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x87d6
-	.uleb128 0x3f
-	.ascii	"blk\000"
-	.byte	0x1
-	.byte	0x61
-	.4byte	0x57
-	.4byte	.LLST185
-	.uleb128 0x40
-	.4byte	.LASF1307
-	.byte	0x1
-	.byte	0x61
-	.4byte	0x57
-	.4byte	.LLST186
-	.uleb128 0x6f
-	.4byte	.LBB248
-	.4byte	.LBE248-.LBB248
-	.4byte	0x87c6
-	.uleb128 0x41
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0x66
-	.4byte	0x866b
-	.4byte	.LLST187
-	.uleb128 0x7a
-	.4byte	.LBB249
-	.4byte	.LBE249-.LBB249
-	.uleb128 0x61
-	.4byte	.LASF1303
-	.byte	0x1
-	.byte	0x68
-	.4byte	0x57
-	.4byte	.LLST188
-	.uleb128 0x44
-	.4byte	.LVL445
-	.4byte	0x8958
-	.4byte	0x87b0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL447
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x79
-	.4byte	0x87d6
-	.4byte	.LBB246
-	.4byte	.LBE246-.LBB246
-	.byte	0x1
-	.byte	0x65
-	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF1308
-	.byte	0x1
-	.byte	0x5c
-	.4byte	0x57
-	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF1309
-	.byte	0x1
-	.byte	0x57
-	.4byte	0x57
-	.byte	0x1
-	.uleb128 0x4b
-	.4byte	.LASF1310
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x57
-	.4byte	.LFB330
-	.4byte	.LFE330-.LFB330
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8847
-	.uleb128 0x3f
-	.ascii	"max\000"
-	.byte	0x1
-	.byte	0x4b
-	.4byte	0x57
-	.4byte	.LLST289
-	.uleb128 0x77
-	.ascii	"Q\000"
-	.byte	0x1
-	.byte	0x4d
-	.4byte	0x866b
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x45
-	.4byte	.LVL826
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR75+8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1311
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x8f
-	.4byte	.LFB329
-	.4byte	.LFE329-.LFB329
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8913
-	.uleb128 0x40
-	.4byte	.LASF664
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x74
-	.4byte	.LLST570
-	.uleb128 0x40
-	.4byte	.LASF1312
-	.byte	0x1
-	.byte	0x2e
-	.4byte	0x8f
-	.4byte	.LLST571
-	.uleb128 0x77
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x30
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x41
-	.ascii	"low\000"
-	.byte	0x1
-	.byte	0x31
-	.4byte	0x62
-	.4byte	.LLST572
-	.uleb128 0x36
-	.4byte	.LASF1313
-	.byte	0x1
-	.byte	0x31
-	.4byte	0x62
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x41
-	.ascii	"mid\000"
-	.byte	0x1
-	.byte	0x31
-	.4byte	0x62
-	.4byte	.LLST573
-	.uleb128 0x36
-	.4byte	.LASF278
-	.byte	0x1
-	.byte	0x32
-	.4byte	0x73e
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -88
-	.uleb128 0x61
-	.4byte	.LASF1314
-	.byte	0x1
-	.byte	0x33
-	.4byte	0x57
-	.4byte	.LLST574
-	.uleb128 0x44
-	.4byte	.LVL2070
-	.4byte	0xb17b
-	.4byte	0x88f6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2075
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -124
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1315
-	.byte	0x1
-	.byte	0x1e
-	.4byte	0x74
-	.4byte	.LFB328
-	.4byte	.LFE328-.LFB328
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8958
-	.uleb128 0x40
-	.4byte	.LASF1316
-	.byte	0x1
-	.byte	0x1e
-	.4byte	0x74
-	.4byte	.LLST183
-	.uleb128 0x52
-	.4byte	.LASF1317
-	.byte	0x1
-	.byte	0x1e
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x41
-	.ascii	"ret\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x74
-	.4byte	.LLST184
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1318
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x57
-	.4byte	.LFB327
-	.4byte	.LFE327-.LFB327
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8990
-	.uleb128 0x40
-	.4byte	.LASF1116
-	.byte	0x1
-	.byte	0x14
-	.4byte	0x57
-	.4byte	.LLST181
-	.uleb128 0x61
-	.4byte	.LASF1235
-	.byte	0x1
-	.byte	0x16
-	.4byte	0x57
-	.4byte	.LLST182
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1319
-	.byte	0x1
-	.byte	0xc
-	.4byte	0x57
-	.4byte	.LFB326
-	.4byte	.LFE326-.LFB326
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x89c8
-	.uleb128 0x40
-	.4byte	.LASF1116
-	.byte	0x1
-	.byte	0xc
-	.4byte	0x57
-	.4byte	.LLST179
-	.uleb128 0x61
-	.4byte	.LASF1114
-	.byte	0x1
-	.byte	0xe
-	.4byte	0x57
-	.4byte	.LLST180
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1320
-	.byte	0x1
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LFB325
-	.4byte	.LFE325-.LFB325
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8a0f
-	.uleb128 0x40
-	.4byte	.LASF1114
-	.byte	0x1
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LLST176
-	.uleb128 0x40
-	.4byte	.LASF1235
-	.byte	0x1
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LLST177
-	.uleb128 0x61
-	.4byte	.LASF1108
-	.byte	0x1
-	.byte	0x6
-	.4byte	0x57
-	.4byte	.LLST178
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1321
-	.byte	0x5
-	.2byte	0x168
-	.4byte	0x84
-	.byte	0x1
-	.4byte	0x8a59
-	.uleb128 0x57
-	.ascii	"die\000"
-	.byte	0x5
-	.2byte	0x16a
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"blk\000"
-	.byte	0x5
-	.2byte	0x16b
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1322
-	.byte	0x5
-	.2byte	0x16c
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1323
-	.byte	0x5
-	.2byte	0x16e
-	.4byte	0x8a59
-	.uleb128 0x58
-	.4byte	.LASF1324
-	.byte	0x5
-	.2byte	0x187
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x29fa
-	.uleb128 0x4b
-	.4byte	.LASF1325
-	.byte	0x5
-	.byte	0xf8
-	.4byte	0x8f
-	.4byte	.LFB323
-	.4byte	.LFE323-.LFB323
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8baf
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0xfa
-	.4byte	0x74
-	.4byte	.LLST575
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0xfb
-	.4byte	0x57
-	.4byte	.LLST576
-	.uleb128 0x61
-	.4byte	.LASF1224
-	.byte	0x5
-	.byte	0xfd
-	.4byte	0x62
-	.4byte	.LLST577
-	.uleb128 0x61
-	.4byte	.LASF1323
-	.byte	0x5
-	.byte	0xfe
-	.4byte	0x8a59
-	.4byte	.LLST578
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x8bbf
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10592
-	.uleb128 0x48
-	.4byte	.LVL2082
-	.4byte	0x8bc4
-	.uleb128 0x44
-	.4byte	.LVL2084
-	.4byte	0xb17b
-	.4byte	0x8ae8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2085
-	.4byte	0xb17b
-	.4byte	0x8b06
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2087
-	.4byte	0xb17b
-	.4byte	0x8b24
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2088
-	.4byte	0x8847
-	.4byte	0x8b37
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2090
-	.4byte	0x103ff
-	.4byte	0x8b5e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR208
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x150
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2091
-	.4byte	0x103ff
-	.4byte	0x8b7e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2092
-	.4byte	0x9fb4
-	.uleb128 0x44
-	.4byte	.LVL2100
-	.4byte	0xb17b
-	.4byte	0x8ba5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2105
-	.4byte	0x52a5
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x8bbf
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xa
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x8baf
-	.uleb128 0x3e
-	.4byte	.LASF1326
-	.byte	0x5
-	.byte	0xe0
-	.4byte	.LFB322
-	.4byte	.LFE322-.LFB322
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8bf8
-	.uleb128 0x4d
-	.4byte	.LVL823
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR74+12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1327
-	.byte	0x5
-	.byte	0xb5
-	.4byte	0x8f
-	.4byte	.LFB321
-	.4byte	.LFE321-.LFB321
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8c64
-	.uleb128 0x77
-	.ascii	"die\000"
-	.byte	0x5
-	.byte	0xb7
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0xb8
-	.4byte	0x57
-	.4byte	.LLST568
-	.uleb128 0x61
-	.4byte	.LASF1328
-	.byte	0x5
-	.byte	0xb9
-	.4byte	0x74
-	.4byte	.LLST569
-	.uleb128 0x36
-	.4byte	.LASF1323
-	.byte	0x5
-	.byte	0xba
-	.4byte	0x8a59
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x45
-	.4byte	.LVL2059
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1329
-	.byte	0x5
-	.byte	0x67
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x8cb3
-	.uleb128 0x7c
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x69
-	.4byte	0x8f
-	.uleb128 0x7d
-	.4byte	.LASF1330
-	.byte	0x5
-	.byte	0x6a
-	.4byte	0x8f
-	.uleb128 0x7d
-	.4byte	.LASF1323
-	.byte	0x5
-	.byte	0x6b
-	.4byte	0x8a59
-	.uleb128 0x7d
-	.4byte	.LASF1239
-	.byte	0x5
-	.byte	0x6c
-	.4byte	0x57
-	.uleb128 0x62
-	.4byte	.LASF1331
-	.byte	0x5
-	.byte	0x81
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x7319
-	.4byte	.LASF1329
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1332
-	.byte	0x5
-	.byte	0x47
-	.4byte	.LFB319
-	.4byte	.LFE319-.LFB319
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8d57
-	.uleb128 0x40
-	.4byte	.LASF1267
-	.byte	0x5
-	.byte	0x47
-	.4byte	0x293a
-	.4byte	.LLST287
-	.uleb128 0x40
-	.4byte	.LASF1333
-	.byte	0x5
-	.byte	0x47
-	.4byte	0x13e
-	.4byte	.LLST288
-	.uleb128 0x7c
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0x74
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x75ef
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10546
-	.uleb128 0x44
-	.4byte	.LVL819
-	.4byte	0x530b
-	.4byte	0x8d17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL820
-	.4byte	0x103ff
-	.4byte	0x8d3a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4f
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL821
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF1334
-	.byte	0x5
-	.byte	0x2c
-	.byte	0x1
-	.uleb128 0x7b
-	.4byte	.LASF1335
-	.byte	0x5
-	.byte	0x19
-	.4byte	0x8f
-	.4byte	.LFB317
-	.4byte	.LFE317-.LFB317
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8dc2
-	.uleb128 0x40
-	.4byte	.LASF664
-	.byte	0x5
-	.byte	0x19
-	.4byte	0x57
-	.4byte	.LLST171
-	.uleb128 0x41
-	.ascii	"die\000"
-	.byte	0x5
-	.byte	0x1b
-	.4byte	0x74
-	.4byte	.LLST172
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x1c
-	.4byte	0x74
-	.4byte	.LLST173
-	.uleb128 0x61
-	.4byte	.LASF1333
-	.byte	0x5
-	.byte	0x1d
-	.4byte	0x13e
-	.4byte	.LLST174
-	.uleb128 0x61
-	.4byte	.LASF1336
-	.byte	0x5
-	.byte	0x1e
-	.4byte	0x57
-	.4byte	.LLST175
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1337
-	.byte	0x5
-	.byte	0x4
-	.4byte	0x8f
-	.4byte	.LFB316
-	.4byte	.LFE316-.LFB316
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8e37
-	.uleb128 0x40
-	.4byte	.LASF664
-	.byte	0x5
-	.byte	0x4
-	.4byte	0x57
-	.4byte	.LLST167
-	.uleb128 0x41
-	.ascii	"die\000"
-	.byte	0x5
-	.byte	0x6
-	.4byte	0x74
-	.4byte	.LLST168
-	.uleb128 0x61
-	.4byte	.LASF1333
-	.byte	0x5
-	.byte	0x7
-	.4byte	0x13e
-	.4byte	.LLST169
-	.uleb128 0x61
-	.4byte	.LASF1336
-	.byte	0x5
-	.byte	0x8
-	.4byte	0x57
-	.4byte	.LLST170
-	.uleb128 0x45
-	.4byte	.LVL416
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x7e
-	.4byte	.LASF1338
-	.byte	0x4
-	.2byte	0x739
-	.4byte	0x74
-	.4byte	.LFB315
-	.4byte	.LFE315-.LFB315
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x7e
-	.4byte	.LASF1339
-	.byte	0x4
-	.2byte	0x734
-	.4byte	0x74
-	.4byte	.LFB314
-	.4byte	.LFE314-.LFB314
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x7e
-	.4byte	.LASF1340
-	.byte	0x4
-	.2byte	0x72f
-	.4byte	0x74
-	.4byte	.LFB313
-	.4byte	.LFE313-.LFB313
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x54
-	.4byte	.LASF1341
-	.byte	0x4
-	.2byte	0x72a
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0x8e97
-	.uleb128 0x66
-	.ascii	"lun\000"
-	.byte	0x4
-	.2byte	0x72a
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1342
-	.byte	0x4
-	.2byte	0x725
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0x8eb5
-	.uleb128 0x66
-	.ascii	"LUN\000"
-	.byte	0x4
-	.2byte	0x725
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1343
-	.byte	0x4
-	.2byte	0x720
-	.4byte	0x74
-	.byte	0x1
-	.uleb128 0x67
-	.4byte	.LASF1344
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x8f
-	.4byte	.LFB309
-	.4byte	.LFE309-.LFB309
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8fd6
-	.uleb128 0x6d
-	.ascii	"lun\000"
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x19f1
-	.4byte	.LLST635
-	.uleb128 0x5c
-	.4byte	.LASF176
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x1a00
-	.4byte	.LLST636
-	.uleb128 0x5c
-	.4byte	.LASF1345
-	.byte	0x4
-	.2byte	0x6f2
-	.4byte	0x1a00
-	.4byte	.LLST637
-	.uleb128 0x5e
-	.4byte	.LASF864
-	.byte	0x4
-	.2byte	0x6f4
-	.4byte	0x57
-	.4byte	.LLST638
-	.uleb128 0x5d
-	.ascii	"tmp\000"
-	.byte	0x4
-	.2byte	0x6f5
-	.4byte	0x57
-	.4byte	.LLST639
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x4
-	.2byte	0x6f6
-	.4byte	0x74
-	.4byte	.LLST640
-	.uleb128 0x38
-	.4byte	.LASF1202
-	.byte	0x4
-	.2byte	0x6f7
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x38
-	.4byte	.LASF1161
-	.byte	0x4
-	.2byte	0x6f7
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x5e
-	.4byte	.LASF1150
-	.byte	0x4
-	.2byte	0x6f8
-	.4byte	0x57
-	.4byte	.LLST641
-	.uleb128 0x48
-	.4byte	.LVL2318
-	.4byte	0x93da
-	.uleb128 0x48
-	.4byte	.LVL2328
-	.4byte	0x7c46
-	.uleb128 0x48
-	.4byte	.LVL2329
-	.4byte	0x75f4
-	.uleb128 0x44
-	.4byte	.LVL2330
-	.4byte	0x7a04
-	.4byte	0x8fa4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2331
-	.4byte	0x7a04
-	.4byte	0x8fc3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2332
-	.4byte	0x8958
-	.uleb128 0x48
-	.4byte	.LVL2333
-	.4byte	0x5b4d
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1346
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x8f
-	.4byte	.LFB308
-	.4byte	.LFE308-.LFB308
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x93c5
-	.uleb128 0x6d
-	.ascii	"LUN\000"
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x3a
-	.4byte	.LLST764
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x74
-	.4byte	.LLST765
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x74
-	.4byte	.LLST766
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x4
-	.2byte	0x639
-	.4byte	0x8b6
-	.4byte	.LLST767
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x4
-	.2byte	0x63b
-	.4byte	0x5442
-	.4byte	.LLST768
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x4
-	.2byte	0x63c
-	.4byte	0x74
-	.4byte	.LLST769
-	.uleb128 0x5e
-	.4byte	.LASF1347
-	.byte	0x4
-	.2byte	0x63c
-	.4byte	0x74
-	.4byte	.LLST770
-	.uleb128 0x5e
-	.4byte	.LASF1348
-	.byte	0x4
-	.2byte	0x63c
-	.4byte	0x74
-	.4byte	.LLST771
-	.uleb128 0x38
-	.4byte	.LASF1202
-	.byte	0x4
-	.2byte	0x63d
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x5d
-	.ascii	"ppa\000"
-	.byte	0x4
-	.2byte	0x63d
-	.4byte	0x74
-	.4byte	.LLST772
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x63e
-	.4byte	0x74
-	.4byte	.LLST773
-	.uleb128 0x5e
-	.4byte	.LASF1349
-	.byte	0x4
-	.2byte	0x63e
-	.4byte	0x74
-	.4byte	.LLST774
-	.uleb128 0x5e
-	.4byte	.LASF1115
-	.byte	0x4
-	.2byte	0x63e
-	.4byte	0x74
-	.4byte	.LLST775
-	.uleb128 0x5e
-	.4byte	.LASF1350
-	.byte	0x4
-	.2byte	0x63f
-	.4byte	0x74
-	.4byte	.LLST776
-	.uleb128 0x5e
-	.4byte	.LASF1351
-	.byte	0x4
-	.2byte	0x63f
-	.4byte	0x74
-	.4byte	.LLST777
-	.uleb128 0x5e
-	.4byte	.LASF1160
-	.byte	0x4
-	.2byte	0x640
-	.4byte	0x35d9
-	.4byte	.LLST778
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x93d5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10483
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x688
-	.4byte	0x9196
-	.uleb128 0x38
-	.4byte	.LASF1352
-	.byte	0x4
-	.2byte	0x6b5
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x44
-	.4byte	.LVL3094
-	.4byte	0xb17b
-	.4byte	0x9135
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3096
-	.4byte	0x103ff
-	.4byte	0x9152
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC57
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3097
-	.4byte	0x103ff
-	.4byte	0x9179
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6c2
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3098
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3024
-	.4byte	0x78f1
-	.4byte	0x91bb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x77
-	.sleb128 256
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -100
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -108
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3035
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL3037
-	.4byte	0x103ff
-	.4byte	0x91eb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x66c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3038
-	.4byte	0x103ff
-	.4byte	0x920b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3039
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL3040
-	.4byte	0x5dee
-	.4byte	0x9228
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3043
-	.4byte	0x103ff
-	.4byte	0x924f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x68d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3044
-	.4byte	0x103ff
-	.4byte	0x926f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3052
-	.4byte	0x5383
-	.4byte	0x928d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3060
-	.4byte	0x52a5
-	.4byte	0x92a9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -108
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3066
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL3068
-	.4byte	0x7a04
-	.4byte	0x92d2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3069
-	.4byte	0x5c52
-	.4byte	0x92e6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3073
-	.4byte	0x530b
-	.4byte	0x92ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3087
-	.4byte	0x103ff
-	.4byte	0x9326
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6d7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3088
-	.4byte	0x103ff
-	.4byte	0x9346
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3095
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL3099
-	.4byte	0x530b
-	.4byte	0x9362
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3101
-	.4byte	0x9409
-	.4byte	0x9381
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3102
-	.4byte	0x103ff
-	.4byte	0x93a8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR242
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6e6
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3103
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x93d5
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x9
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x93c5
-	.uleb128 0x5b
-	.4byte	.LASF1353
-	.byte	0x4
-	.2byte	0x630
-	.4byte	0x8f
-	.4byte	.LFB307
-	.4byte	.LFE307-.LFB307
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9409
-	.uleb128 0x45
-	.4byte	.LVL2313
-	.4byte	0x9409
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1354
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	.LFB306
-	.4byte	.LFE306-.LFB306
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9644
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x676
-	.4byte	.LLST625
-	.uleb128 0x5c
-	.4byte	.LASF1115
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x74
-	.4byte	.LLST626
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x74
-	.4byte	.LLST627
-	.uleb128 0x5c
-	.4byte	.LASF1160
-	.byte	0x4
-	.2byte	0x5fa
-	.4byte	0x35d9
-	.4byte	.LLST628
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x5fc
-	.4byte	0x74
-	.4byte	.LLST629
-	.uleb128 0x71
-	.ascii	"ppa\000"
-	.byte	0x4
-	.2byte	0x5fd
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1202
-	.byte	0x4
-	.2byte	0x5fd
-	.4byte	0x74
-	.4byte	.LLST630
-	.uleb128 0x5e
-	.4byte	.LASF1144
-	.byte	0x4
-	.2byte	0x5fe
-	.4byte	0x57
-	.4byte	.LLST631
-	.uleb128 0x5e
-	.4byte	.LASF72
-	.byte	0x4
-	.2byte	0x5ff
-	.4byte	0x57
-	.4byte	.LLST632
-	.uleb128 0x5e
-	.4byte	.LASF1118
-	.byte	0x4
-	.2byte	0x600
-	.4byte	0x5442
-	.4byte	.LLST633
-	.uleb128 0x5e
-	.4byte	.LASF1206
-	.byte	0x4
-	.2byte	0x601
-	.4byte	0x74
-	.4byte	.LLST634
-	.uleb128 0x64
-	.4byte	.LASF1121
-	.4byte	0x9654
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10457
-	.uleb128 0x44
-	.4byte	.LVL2292
-	.4byte	0xae0d
-	.4byte	0x94fb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2293
-	.4byte	0x8958
-	.uleb128 0x44
-	.4byte	.LVL2295
-	.4byte	0x5dee
-	.4byte	0x9518
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2296
-	.4byte	0x54b4
-	.uleb128 0x44
-	.4byte	.LVL2297
-	.4byte	0x5c52
-	.4byte	0x9535
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2298
-	.4byte	0xae0d
-	.4byte	0x9554
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2299
-	.4byte	0x103ff
-	.4byte	0x957b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR220
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x61c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2300
-	.4byte	0x103ff
-	.4byte	0x959b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2301
-	.4byte	0x7a04
-	.4byte	0x95b4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2303
-	.4byte	0x8958
-	.4byte	0x95cf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2306
-	.4byte	0x103ff
-	.4byte	0x95ec
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC41
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2307
-	.4byte	0x5b4d
-	.4byte	0x9600
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2310
-	.4byte	0x103ff
-	.4byte	0x9627
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR220
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x62d
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2311
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x9654
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0xc
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x9644
-	.uleb128 0x67
-	.4byte	.LASF1356
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x8f
-	.4byte	.LFB305
-	.4byte	.LFE305-.LFB305
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9884
-	.uleb128 0x6d
-	.ascii	"LUN\000"
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x3a
-	.4byte	.LLST746
-	.uleb128 0x5c
-	.4byte	.LASF1095
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x74
-	.4byte	.LLST747
-	.uleb128 0x5c
-	.4byte	.LASF1247
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x74
-	.4byte	.LLST748
-	.uleb128 0x5c
-	.4byte	.LASF1248
-	.byte	0x4
-	.2byte	0x595
-	.4byte	0x8b6
-	.4byte	.LLST749
-	.uleb128 0x5d
-	.ascii	"ret\000"
-	.byte	0x4
-	.2byte	0x597
-	.4byte	0x8f
-	.4byte	.LLST750
-	.uleb128 0x5e
-	.4byte	.LASF1347
-	.byte	0x4
-	.2byte	0x598
-	.4byte	0x74
-	.4byte	.LLST751
-	.uleb128 0x5e
-	.4byte	.LASF1348
-	.byte	0x4
-	.2byte	0x598
-	.4byte	0x74
-	.4byte	.LLST752
-	.uleb128 0x5e
-	.4byte	.LASF1357
-	.byte	0x4
-	.2byte	0x598
-	.4byte	0x74
-	.4byte	.LLST753
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x4
-	.2byte	0x599
-	.4byte	0x74
-	.4byte	.LLST754
-	.uleb128 0x71
-	.ascii	"ppa\000"
-	.byte	0x4
-	.2byte	0x599
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5d
-	.ascii	"n\000"
-	.byte	0x4
-	.2byte	0x59b
-	.4byte	0x74
-	.4byte	.LLST755
-	.uleb128 0x5e
-	.4byte	.LASF1115
-	.byte	0x4
-	.2byte	0x59b
-	.4byte	0x74
-	.4byte	.LLST756
-	.uleb128 0x5e
-	.4byte	.LASF1349
-	.byte	0x4
-	.2byte	0x59b
-	.4byte	0x74
-	.4byte	.LLST757
-	.uleb128 0x5e
-	.4byte	.LASF1358
-	.byte	0x4
-	.2byte	0x59c
-	.4byte	0x74
-	.4byte	.LLST758
-	.uleb128 0x5e
-	.4byte	.LASF1359
-	.byte	0x4
-	.2byte	0x59c
-	.4byte	0x74
-	.4byte	.LLST759
-	.uleb128 0x5e
-	.4byte	.LASF1360
-	.byte	0x4
-	.2byte	0x59d
-	.4byte	0x74
-	.4byte	.LLST760
-	.uleb128 0x5e
-	.4byte	.LASF1361
-	.byte	0x4
-	.2byte	0x59e
-	.4byte	0x74
-	.4byte	.LLST761
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x670
-	.4byte	0x97e4
-	.uleb128 0x5e
-	.4byte	.LASF1181
-	.byte	0x4
-	.2byte	0x5e2
-	.4byte	0x74
-	.4byte	.LLST762
-	.uleb128 0x5e
-	.4byte	.LASF1108
-	.byte	0x4
-	.2byte	0x5e3
-	.4byte	0x57
-	.4byte	.LLST763
-	.uleb128 0x48
-	.4byte	.LVL2991
-	.4byte	0x8958
-	.uleb128 0x44
-	.4byte	.LVL2993
-	.4byte	0x5521
-	.4byte	0x97c6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2997
-	.4byte	0x98a8
-	.uleb128 0x45
-	.4byte	.LVL3017
-	.4byte	0x5383
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2964
-	.4byte	0x77b1
-	.4byte	0x9807
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x76
-	.sleb128 256
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2970
-	.4byte	0x93da
-	.uleb128 0x44
-	.4byte	.LVL2979
-	.4byte	0x5383
-	.4byte	0x982b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2981
-	.4byte	0x7a04
-	.4byte	0x984a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2987
-	.4byte	0xb17b
-	.4byte	0x9864
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2989
-	.4byte	0x52a5
-	.uleb128 0x45
-	.4byte	.LVL3003
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1362
-	.byte	0x4
-	.2byte	0x3f6
-	.4byte	0x8f
-	.4byte	.LFB304
-	.4byte	.LFE304-.LFB304
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x98a8
-	.uleb128 0x48
-	.4byte	.LVL2342
-	.4byte	0x98a8
-	.byte	0
-	.uleb128 0x5a
-	.4byte	.LASF1363
-	.byte	0x4
-	.2byte	0x3ea
-	.4byte	0x8f
-	.byte	0x1
-	.uleb128 0x54
-	.4byte	.LASF1364
-	.byte	0x4
-	.2byte	0x392
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x98ec
-	.uleb128 0x55
-	.4byte	.LASF1365
-	.byte	0x4
-	.2byte	0x392
-	.4byte	0x98ec
-	.uleb128 0x59
-	.4byte	.LASF1121
-	.4byte	0x9902
-	.4byte	.LASF1364
-	.uleb128 0x68
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x3c8
-	.4byte	0x74
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1e1
-	.uleb128 0x6
-	.4byte	0x1a2e
-	.4byte	0x9902
-	.uleb128 0xd
-	.4byte	0x2aa
-	.byte	0x7
-	.byte	0
-	.uleb128 0x4
-	.4byte	0x98f2
-	.uleb128 0x67
-	.4byte	.LASF1366
-	.byte	0x4
-	.2byte	0x2fe
-	.4byte	0x8f
-	.4byte	.LFB301
-	.4byte	.LFE301-.LFB301
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9a85
-	.uleb128 0x5e
-	.4byte	.LASF1235
-	.byte	0x4
-	.2byte	0x300
-	.4byte	0x57
-	.4byte	.LLST798
-	.uleb128 0x5e
-	.4byte	.LASF1367
-	.byte	0x4
-	.2byte	0x300
-	.4byte	0x57
-	.4byte	.LLST799
-	.uleb128 0x5e
-	.4byte	.LASF1368
-	.byte	0x4
-	.2byte	0x301
-	.4byte	0x57
-	.4byte	.LLST800
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x302
-	.4byte	0x57
-	.4byte	.LLST801
-	.uleb128 0x63
-	.4byte	.LASF1369
-	.byte	0x4
-	.2byte	0x365
-	.4byte	.L2888
-	.uleb128 0x63
-	.4byte	.LASF1370
-	.byte	0x4
-	.2byte	0x375
-	.4byte	.L2890
-	.uleb128 0x44
-	.4byte	.LVL3181
-	.4byte	0x530b
-	.4byte	0x998b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3182
-	.4byte	0x530b
-	.4byte	0x999f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3183
-	.4byte	0x87ee
-	.uleb128 0x48
-	.4byte	.LVL3184
-	.4byte	0x8a5f
-	.uleb128 0x48
-	.4byte	.LVL3185
-	.4byte	0x8a0f
-	.uleb128 0x48
-	.4byte	.LVL3201
-	.4byte	0x8c64
-	.uleb128 0x44
-	.4byte	.LVL3202
-	.4byte	0x530b
-	.4byte	0x99d6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3203
-	.4byte	0x530b
-	.4byte	0x99ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3204
-	.4byte	0x64a2
-	.4byte	0x99fe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3208
-	.4byte	0x9a85
-	.4byte	0x9a17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3215
-	.4byte	0x9fb4
-	.uleb128 0x48
-	.4byte	.LVL3216
-	.4byte	0x87ee
-	.uleb128 0x44
-	.4byte	.LVL3219
-	.4byte	0x9a85
-	.4byte	0x9a42
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3222
-	.4byte	0x9a85
-	.4byte	0x9a55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3226
-	.4byte	0x64a2
-	.4byte	0x9a69
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3227
-	.4byte	0x858a
-	.uleb128 0x48
-	.4byte	.LVL3228
-	.4byte	0x75f4
-	.uleb128 0x48
-	.4byte	.LVL3229
-	.4byte	0x60a3
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1371
-	.byte	0x4
-	.2byte	0x28d
-	.4byte	0x8f
-	.4byte	.LFB300
-	.4byte	.LFE300-.LFB300
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9c4c
-	.uleb128 0x5c
-	.4byte	.LASF1235
-	.byte	0x4
-	.2byte	0x28d
-	.4byte	0x57
-	.4byte	.LLST528
-	.uleb128 0x5c
-	.4byte	.LASF1372
-	.byte	0x4
-	.2byte	0x28d
-	.4byte	0x3a
-	.4byte	.LLST529
-	.uleb128 0x5e
-	.4byte	.LASF1367
-	.byte	0x4
-	.2byte	0x28f
-	.4byte	0x57
-	.4byte	.LLST530
-	.uleb128 0x5e
-	.4byte	.LASF1135
-	.byte	0x4
-	.2byte	0x28f
-	.4byte	0x57
-	.4byte	.LLST531
-	.uleb128 0x5e
-	.4byte	.LASF1114
-	.byte	0x4
-	.2byte	0x290
-	.4byte	0x57
-	.4byte	.LLST532
-	.uleb128 0x5e
-	.4byte	.LASF664
-	.byte	0x4
-	.2byte	0x290
-	.4byte	0x57
-	.4byte	.LLST533
-	.uleb128 0x5e
-	.4byte	.LASF1373
-	.byte	0x4
-	.2byte	0x291
-	.4byte	0x57
-	.4byte	.LLST534
-	.uleb128 0x5e
-	.4byte	.LASF1374
-	.byte	0x4
-	.2byte	0x292
-	.4byte	0x57
-	.4byte	.LLST535
-	.uleb128 0x5e
-	.4byte	.LASF1375
-	.byte	0x4
-	.2byte	0x293
-	.4byte	0x57
-	.4byte	.LLST536
-	.uleb128 0x5e
-	.4byte	.LASF1376
-	.byte	0x4
-	.2byte	0x294
-	.4byte	0x57
-	.4byte	.LLST537
-	.uleb128 0x5e
-	.4byte	.LASF1377
-	.byte	0x4
-	.2byte	0x295
-	.4byte	0x3a
-	.4byte	.LLST538
-	.uleb128 0x63
-	.4byte	.LASF1378
-	.byte	0x4
-	.2byte	0x2cd
-	.4byte	.L1632
-	.uleb128 0x44
-	.4byte	.LVL1823
-	.4byte	0xac82
-	.4byte	0x9b75
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1830
-	.4byte	0xae0d
-	.4byte	0x9b94
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1837
-	.4byte	0xac82
-	.4byte	0x9bae
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1839
-	.4byte	0x89c8
-	.4byte	0x9bc4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1841
-	.4byte	0x9c4c
-	.4byte	0x9bd8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1842
-	.4byte	0x8d5f
-	.4byte	0x9bec
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1853
-	.4byte	0x8dc2
-	.uleb128 0x44
-	.4byte	.LVL1858
-	.4byte	0x89c8
-	.4byte	0x9c0b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1860
-	.4byte	0x9c4c
-	.4byte	0x9c1f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1861
-	.4byte	0x8d5f
-	.4byte	0x9c33
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1869
-	.4byte	0x8dc2
-	.uleb128 0x45
-	.4byte	.LVL1872
-	.4byte	0x8737
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1379
-	.byte	0x4
-	.2byte	0x27f
-	.4byte	0x8f
-	.byte	0x1
-	.4byte	0x9c76
-	.uleb128 0x55
-	.4byte	.LASF664
-	.byte	0x4
-	.2byte	0x27f
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1380
-	.byte	0x4
-	.2byte	0x281
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1381
-	.byte	0x4
-	.2byte	0x265
-	.4byte	0x8f
-	.4byte	.LFB298
-	.4byte	.LFE298-.LFB298
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9d26
-	.uleb128 0x44
-	.4byte	.LVL859
-	.4byte	0x530b
-	.4byte	0x9ca4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL860
-	.4byte	0x530b
-	.4byte	0x9cb8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL861
-	.4byte	0x530b
-	.4byte	0x9ccc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL862
-	.4byte	0x530b
-	.4byte	0x9cef
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL863
-	.4byte	0x530b
-	.4byte	0x9d13
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR135
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL864
-	.4byte	0x5b2a
-	.uleb128 0x48
-	.4byte	.LVL865
-	.4byte	0x6e4b
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1382
-	.byte	0x4
-	.2byte	0x162
-	.4byte	0x8f
-	.4byte	.LFB297
-	.4byte	.LFE297-.LFB297
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9f4a
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x4
-	.2byte	0x164
-	.4byte	0x74
-	.4byte	.LLST429
-	.uleb128 0x5e
-	.4byte	.LASF1383
-	.byte	0x4
-	.2byte	0x165
-	.4byte	0x74
-	.4byte	.LLST430
-	.uleb128 0x48
-	.4byte	.LVL1320
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1321
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1323
-	.4byte	0x5194
-	.4byte	0x9d84
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1324
-	.4byte	0x5194
-	.4byte	0x9d98
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1325
-	.4byte	0x5194
-	.4byte	0x9dac
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1326
-	.4byte	0x5194
-	.4byte	0x9dc0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1327
-	.4byte	0x5194
-	.4byte	0x9dd4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1329
-	.4byte	0x5194
-	.4byte	0x9de8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1330
-	.4byte	0x5194
-	.4byte	0x9dfc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1331
-	.4byte	0x5194
-	.4byte	0x9e10
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1332
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1333
-	.4byte	0x5194
-	.4byte	0x9e2d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1334
-	.4byte	0x5194
-	.4byte	0x9e41
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1335
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1338
-	.4byte	0x5194
-	.4byte	0x9e5e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1340
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1341
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1342
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1343
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1346
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1349
-	.4byte	0x5194
-	.4byte	0x9e9f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1350
-	.4byte	0x5194
-	.4byte	0x9eb3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1352
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1353
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1354
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1355
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1356
-	.4byte	0x5194
-	.uleb128 0x44
-	.4byte	.LVL1357
-	.4byte	0x530b
-	.4byte	0x9ef4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1359
-	.4byte	0x5194
-	.4byte	0x9f08
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1360
-	.4byte	0x5194
-	.4byte	0x9f1c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1364
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1367
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1370
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1373
-	.4byte	0x5194
-	.uleb128 0x48
-	.4byte	.LVL1377
-	.4byte	0x5194
-	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF1384
-	.byte	0x4
-	.byte	0xc7
-	.4byte	0x8f
-	.4byte	.LFB296
-	.4byte	.LFE296-.LFB296
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9fb4
-	.uleb128 0x40
-	.4byte	.LASF1365
-	.byte	0x4
-	.byte	0xc7
-	.4byte	0x98ec
-	.4byte	.LLST162
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0xc9
-	.4byte	0x74
-	.4byte	.LLST163
-	.uleb128 0x41
-	.ascii	"j\000"
-	.byte	0x4
-	.byte	0xc9
-	.4byte	0x74
-	.4byte	.LLST164
-	.uleb128 0x48
-	.4byte	.LVL394
-	.4byte	0xa000
-	.uleb128 0x44
-	.4byte	.LVL395
-	.4byte	0xa000
-	.4byte	0x9faa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL399
-	.4byte	0x9fb4
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1385
-	.byte	0x4
-	.byte	0xb5
-	.4byte	0x8f
-	.4byte	.LFB295
-	.4byte	.LFE295-.LFB295
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9fdd
-	.uleb128 0x40
-	.4byte	.LASF1386
-	.byte	0x4
-	.byte	0xb5
-	.4byte	0x57
-	.4byte	.LLST161
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1387
-	.byte	0x4
-	.byte	0xaf
-	.4byte	.LFB294
-	.4byte	.LFE294-.LFB294
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa000
-	.uleb128 0x52
-	.4byte	.LASF1388
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1389
-	.byte	0x4
-	.byte	0x8f
-	.4byte	0x57
-	.4byte	.LFB293
-	.4byte	.LFE293-.LFB293
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa045
-	.uleb128 0x3f
-	.ascii	"num\000"
-	.byte	0x4
-	.byte	0x8f
-	.4byte	0x74
-	.4byte	.LLST158
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x91
-	.4byte	0x57
-	.4byte	.LLST159
-	.uleb128 0x61
-	.4byte	.LASF1390
-	.byte	0x4
-	.byte	0x92
-	.4byte	0x74
-	.4byte	.LLST160
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1391
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x74
-	.4byte	.LFB292
-	.4byte	.LFE292-.LFB292
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa335
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x3a
-	.4byte	.LLST319
-	.uleb128 0x6d
-	.ascii	"dir\000"
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x3a
-	.4byte	.LLST320
-	.uleb128 0x5c
-	.4byte	.LASF1393
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x3a
-	.4byte	.LLST321
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x8b6
-	.4byte	.LLST322
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x3
-	.2byte	0x319
-	.4byte	0x8b6
-	.4byte	.LLST323
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x3
-	.2byte	0x31b
-	.4byte	0x74
-	.4byte	.LLST324
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x74
-	.4byte	.LLST325
-	.uleb128 0x38
-	.4byte	.LASF271
-	.byte	0x3
-	.2byte	0x31d
-	.4byte	0x73e
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x38
-	.4byte	.LASF1394
-	.byte	0x3
-	.2byte	0x31e
-	.4byte	0x139d
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -100
-	.uleb128 0x5e
-	.4byte	.LASF1395
-	.byte	0x3
-	.2byte	0x31f
-	.4byte	0x74
-	.4byte	.LLST326
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x320
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x220
-	.4byte	0xa145
-	.uleb128 0x5e
-	.4byte	.LASF1396
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0x74
-	.4byte	.LLST327
-	.uleb128 0x5e
-	.4byte	.LASF1397
-	.byte	0x3
-	.2byte	0x332
-	.4byte	0x74
-	.4byte	.LLST328
-	.uleb128 0x5e
-	.4byte	.LASF1398
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0x8b6
-	.4byte	.LLST329
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x238
-	.4byte	0xa15f
-	.uleb128 0x5d
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x345
-	.4byte	0x74
-	.4byte	.LLST330
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB306
-	.4byte	.LBE306-.LBB306
-	.4byte	0xa179
-	.uleb128 0x57
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x372
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB302
-	.4byte	.LBE302-.LBB302
-	.4byte	0xa197
-	.uleb128 0x5e
-	.4byte	.LASF1399
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xd6d
-	.4byte	.LLST331
-	.byte	0
-	.uleb128 0x7f
-	.4byte	0xa1a9
-	.uleb128 0x56
-	.4byte	.LASF1400
-	.byte	0x3
-	.2byte	0x395
-	.4byte	0x116f
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL949
-	.4byte	0x530b
-	.4byte	0xa1c9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL950
-	.4byte	0xa514
-	.4byte	0xa1ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -116
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL951
-	.4byte	0xa45d
-	.4byte	0xa213
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL983
-	.4byte	0xa335
-	.4byte	0xa239
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL985
-	.4byte	0xa514
-	.4byte	0xa269
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL986
-	.4byte	0xa45d
-	.4byte	0xa27d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL990
-	.4byte	0xa514
-	.4byte	0xa2aa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL993
-	.4byte	0xa45d
-	.4byte	0xa2be
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL994
-	.4byte	0xa514
-	.4byte	0xa2f0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
-	.byte	0x33
-	.byte	0x1a
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL997
-	.4byte	0xa335
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x33
-	.byte	0x1a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1a
-	.byte	0x30
-	.byte	0x7b
-	.sleb128 -1024
-	.byte	0x91
-	.sleb128 -112
-	.byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x77
-	.sleb128 0
-	.byte	0x30
-	.byte	0x29
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -112
-	.byte	0x6
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1401
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	.LFB291
-	.4byte	.LFE291-.LFB291
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa45d
-	.uleb128 0x5c
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x180a
-	.4byte	.LLST311
-	.uleb128 0x6d
-	.ascii	"dir\000"
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x3a
-	.4byte	.LLST312
-	.uleb128 0x5c
-	.4byte	.LASF1402
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x3a
-	.4byte	.LLST313
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x8b6
-	.4byte	.LLST314
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x3
-	.2byte	0x2eb
-	.4byte	0x8b6
-	.4byte	.LLST315
-	.uleb128 0x5e
-	.4byte	.LASF1403
-	.byte	0x3
-	.2byte	0x2ed
-	.4byte	0x13e
-	.4byte	.LLST316
-	.uleb128 0x38
-	.4byte	.LASF1404
-	.byte	0x3
-	.2byte	0x2ee
-	.4byte	0x13e
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x5d
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x2ef
-	.4byte	0x74
-	.4byte	.LLST317
-	.uleb128 0x5e
-	.4byte	.LASF1290
-	.byte	0x3
-	.2byte	0x2f0
-	.4byte	0x8b6
-	.4byte	.LLST318
-	.uleb128 0x44
-	.4byte	.LVL923
-	.4byte	0x5255
-	.4byte	0xa3f9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL928
-	.4byte	0x52a5
-	.4byte	0xa415
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL932
-	.4byte	0x5255
-	.4byte	0xa435
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL939
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1405
-	.byte	0x3
-	.2byte	0x27b
-	.4byte	.LFB290
-	.4byte	.LFE290-.LFB290
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa508
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x27b
-	.4byte	0x3a
-	.4byte	.LLST156
-	.uleb128 0x38
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x27d
-	.4byte	0xfd3
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -16
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x27e
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x38
-	.4byte	.LASF1407
-	.byte	0x3
-	.2byte	0x280
-	.4byte	0xa508
-	.uleb128 0x3
-	.byte	0x71
-	.sleb128 16
-	.byte	0x9f
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x178
-	.uleb128 0x5e
-	.4byte	.LASF1408
-	.byte	0x3
-	.2byte	0x28a
-	.4byte	0xa50e
-	.4byte	.LLST157
-	.uleb128 0x6f
-	.4byte	.LBB238
-	.4byte	.LBE238-.LBB238
-	.4byte	0xa4e2
-	.uleb128 0x38
-	.4byte	.LASF1399
-	.byte	0x3
-	.2byte	0x296
-	.4byte	0xd78
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -12
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL367
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-	.4byte	0xa4f6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL368
-	.4byte	0xa63e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x14ea
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x1552
-	.uleb128 0x69
-	.4byte	.LASF1409
-	.byte	0x3
-	.2byte	0x208
-	.4byte	.LFB289
-	.4byte	.LFE289-.LFB289
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa63e
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST142
-	.uleb128 0x6d
-	.ascii	"dir\000"
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST143
-	.uleb128 0x5c
-	.4byte	.LASF1393
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST144
-	.uleb128 0x5c
-	.4byte	.LASF1402
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x3a
-	.4byte	.LLST145
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x8b6
-	.4byte	.LLST146
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x3
-	.2byte	0x208
-	.4byte	0x8b6
-	.4byte	.LLST147
-	.uleb128 0x5e
-	.4byte	.LASF1400
-	.byte	0x3
-	.2byte	0x20a
-	.4byte	0x116f
-	.4byte	.LLST148
-	.uleb128 0x5e
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x20b
-	.4byte	0xfc8
-	.4byte	.LLST149
-	.uleb128 0x5e
-	.4byte	.LASF1410
-	.byte	0x3
-	.2byte	0x20c
-	.4byte	0x3a
-	.4byte	.LLST150
-	.uleb128 0x5e
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x20d
-	.4byte	0x180a
-	.4byte	.LLST151
-	.uleb128 0x5e
-	.4byte	.LASF1411
-	.byte	0x3
-	.2byte	0x20e
-	.4byte	0x19b3
-	.4byte	.LLST152
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x160
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x227
-	.4byte	0x74
-	.4byte	.LLST153
-	.uleb128 0x38
-	.4byte	.LASF1407
-	.byte	0x3
-	.2byte	0x228
-	.4byte	0x14ea
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1412
-	.byte	0x3
-	.2byte	0x229
-	.4byte	0x293a
-	.4byte	.LLST154
-	.uleb128 0x6f
-	.4byte	.LBB235
-	.4byte	.LBE235-.LBB235
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-	.uleb128 0x5e
-	.4byte	.LASF1396
-	.byte	0x3
-	.2byte	0x232
-	.4byte	0x74
-	.4byte	.LLST155
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL347
-	.4byte	0x10462
-	.uleb128 0x48
-	.4byte	.LVL350
-	.4byte	0x10462
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1413
-	.byte	0x3
-	.2byte	0x200
-	.4byte	.LFB288
-	.4byte	.LFE288-.LFB288
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa672
-	.uleb128 0x70
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x200
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x38
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x202
-	.4byte	0xfd3
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1414
-	.byte	0x3
-	.2byte	0x1e9
-	.4byte	.LFB287
-	.4byte	.LFE287-.LFB287
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa6b6
-	.uleb128 0x70
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1e9
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5e
-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x1eb
-	.4byte	0xfc8
-	.4byte	.LLST141
-	.uleb128 0x38
-	.4byte	.LASF1407
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-	.2byte	0x1ec
-	.4byte	0x14ea
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.byte	0
-	.uleb128 0x6e
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-	.2byte	0x1e1
-	.byte	0x1
-	.4byte	0xa6d0
-	.uleb128 0x55
-	.4byte	.LASF1416
-	.byte	0x3
-	.2byte	0x1e1
-	.4byte	0x1aea
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1417
-	.byte	0x3
-	.2byte	0x1cf
-	.byte	0x1
-	.4byte	0xa6ea
-	.uleb128 0x55
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1cf
-	.4byte	0x180a
-	.byte	0
-	.uleb128 0x80
-	.4byte	.LASF1421
-	.byte	0x3
-	.2byte	0x1c9
-	.4byte	0xa710
-	.uleb128 0x55
-	.4byte	.LASF1416
-	.byte	0x3
-	.2byte	0x1c9
-	.4byte	0x1aea
-	.uleb128 0x56
-	.4byte	.LASF20
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-	.2byte	0x1cb
-	.4byte	0x180a
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1418
-	.byte	0x3
-	.2byte	0x1c3
-	.4byte	0x74
-	.4byte	.LFB283
-	.4byte	.LFE283-.LFB283
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa74b
-	.uleb128 0x5c
-	.4byte	.LASF1416
-	.byte	0x3
-	.2byte	0x1c3
-	.4byte	0x1aea
-	.4byte	.LLST139
-	.uleb128 0x5e
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1c5
-	.4byte	0x180a
-	.4byte	.LLST140
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1419
-	.byte	0x3
-	.2byte	0x1bb
-	.byte	0x1
-	.4byte	0xa771
-	.uleb128 0x55
-	.4byte	.LASF20
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-	.2byte	0x1bb
-	.4byte	0x180a
-	.uleb128 0x55
-	.4byte	.LASF1420
-	.byte	0x3
-	.2byte	0x1bb
-	.4byte	0xbc2
-	.byte	0
-	.uleb128 0x80
-	.4byte	.LASF1422
-	.byte	0x3
-	.2byte	0x1b3
-	.4byte	0xa797
-	.uleb128 0x55
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x1b3
-	.4byte	0x180a
-	.uleb128 0x55
-	.4byte	.LASF1420
-	.byte	0x3
-	.2byte	0x1b3
-	.4byte	0xbc2
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1423
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-	.2byte	0x18f
-	.4byte	.LFB280
-	.4byte	.LFE280-.LFB280
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa7dc
-	.uleb128 0x70
-	.4byte	.LASF1424
-	.byte	0x3
-	.2byte	0x18f
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5d
-	.ascii	"tmp\000"
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-	.4byte	0x116f
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-	.4byte	.LASF1406
-	.byte	0x3
-	.2byte	0x192
-	.4byte	0xfc8
-	.4byte	.LLST138
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-	.uleb128 0x6e
-	.4byte	.LASF1425
-	.byte	0x3
-	.2byte	0x15c
-	.byte	0x1
-	.4byte	0xa801
-	.uleb128 0x66
-	.ascii	"ns\000"
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-	.2byte	0x15c
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF1426
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-	.2byte	0x15e
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1427
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-	.2byte	0x152
-	.byte	0x1
-	.4byte	0xa835
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-	.4byte	.LASF1392
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-	.2byte	0x152
-	.4byte	0x3a
-	.uleb128 0x55
-	.4byte	.LASF1428
-	.byte	0x3
-	.2byte	0x152
-	.4byte	0x74
-	.uleb128 0x68
-	.uleb128 0x56
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x156
-	.4byte	0x180a
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1429
-	.byte	0x3
-	.2byte	0x136
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-	.4byte	.LFB277
-	.4byte	.LFE277-.LFB277
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-	.byte	0x9c
-	.4byte	0xa8c4
-	.uleb128 0x5c
-	.4byte	.LASF1392
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-	.2byte	0x136
-	.4byte	0x3a
-	.4byte	.LLST101
-	.uleb128 0x71
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x138
-	.4byte	0xd78
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -20
-	.uleb128 0x81
-	.4byte	.LASF15
-	.byte	0x3
-	.2byte	0x139
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x13a
-	.4byte	0x74
-	.4byte	.LLST102
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x13b
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x82
-	.4byte	0xa8c4
-	.4byte	.LBB211
-	.4byte	.LBE211-.LBB211
-	.byte	0x3
-	.2byte	0x141
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST103
-	.uleb128 0x45
-	.4byte	.LVL197
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x64
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1430
-	.byte	0x3
-	.2byte	0x130
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0xa8e2
-	.uleb128 0x55
-	.4byte	.LASF602
-	.byte	0x3
-	.2byte	0x130
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1431
-	.byte	0x3
-	.2byte	0x121
-	.4byte	.LFB275
-	.4byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa925
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x121
-	.4byte	0x3a
-	.4byte	.LLST85
-	.uleb128 0x71
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x123
-	.4byte	0xd6d
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x124
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1432
-	.byte	0x3
-	.2byte	0x112
-	.4byte	.LFB274
-	.4byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa968
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x3
-	.2byte	0x112
-	.4byte	0x3a
-	.4byte	.LLST84
-	.uleb128 0x71
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x114
-	.4byte	0xd6d
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x38
-	.4byte	.LASF20
-	.byte	0x3
-	.2byte	0x115
-	.4byte	0x180a
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1433
-	.byte	0x3
-	.byte	0xa9
-	.4byte	0x8f
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa9ad
-	.uleb128 0x40
-	.4byte	.LASF923
-	.byte	0x3
-	.byte	0xa9
-	.4byte	0x3a
-	.4byte	.LLST82
-	.uleb128 0x83
-	.4byte	.LASF1434
-	.byte	0x3
-	.byte	0xac
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x41
-	.ascii	"tmp\000"
-	.byte	0x3
-	.byte	0xad
-	.4byte	0xd6d
-	.4byte	.LLST83
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1435
-	.byte	0x3
-	.byte	0x93
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa9df
-	.uleb128 0x52
-	.4byte	.LASF1436
-	.byte	0x3
-	.byte	0x93
-	.4byte	0x8f
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x41
-	.ascii	"tmp\000"
-	.byte	0x3
-	.byte	0x95
-	.4byte	0xd6d
-	.4byte	.LLST81
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1437
-	.byte	0x3
-	.byte	0x8e
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xaa04
-	.uleb128 0x3f
-	.ascii	"div\000"
-	.byte	0x3
-	.byte	0x8e
-	.4byte	0x3a
-	.4byte	.LLST80
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1438
-	.byte	0x3
-	.byte	0x82
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xaa29
-	.uleb128 0x40
-	.4byte	.LASF1439
-	.byte	0x3
-	.byte	0x82
-	.4byte	0x3a
-	.4byte	.LLST79
-	.byte	0
-	.uleb128 0x50
-	.4byte	.LASF1440
-	.byte	0x3
-	.byte	0x77
-	.4byte	0x15bc
-	.byte	0x1
-	.4byte	0xaa5b
-	.uleb128 0x51
-	.4byte	.LASF1392
-	.byte	0x3
-	.byte	0x77
-	.4byte	0x3a
-	.uleb128 0x7c
-	.ascii	"tmp\000"
-	.byte	0x3
-	.byte	0x79
-	.4byte	0x15bc
-	.uleb128 0x7d
-	.4byte	.LASF20
-	.byte	0x3
-	.byte	0x7a
-	.4byte	0x180a
-	.byte	0
-	.uleb128 0x76
-	.4byte	.LASF1441
-	.byte	0x3
-	.byte	0x6e
-	.byte	0x1
-	.4byte	0xaa73
-	.uleb128 0x84
-	.ascii	"en\000"
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.LASF1442
-	.byte	0x3
-	.byte	0xf
-	.4byte	.LFB267
-	.4byte	.LFE267-.LFB267
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xab08
-	.uleb128 0x40
-	.4byte	.LASF1443
-	.byte	0x3
-	.byte	0xf
-	.4byte	0x13e
-	.4byte	.LLST424
-	.uleb128 0x41
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0x11
-	.4byte	0x74
-	.4byte	.LLST425
-	.uleb128 0x61
-	.4byte	.LASF1444
-	.byte	0x3
-	.byte	0x12
-	.4byte	0xd6d
-	.4byte	.LLST426
-	.uleb128 0x85
-	.4byte	0xa7dc
-	.4byte	.LBB343
-	.4byte	.Ldebug_ranges0+0x318
-	.byte	0x3
-	.byte	0x48
-	.4byte	0xaaf6
-	.uleb128 0x4f
-	.4byte	0xa7e9
-	.4byte	.LLST427
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x318
-	.uleb128 0x74
-	.4byte	0xe852
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x318
-	.uleb128 0x4f
-	.4byte	0xa7e9
-	.4byte	.LLST427
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x318
-	.uleb128 0x74
-	.4byte	0xe852
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1319
-	.4byte	0x5194
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x9000
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1445
-	.byte	0x2
-	.2byte	0xd0e
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xab78
-	.uleb128 0x6d
-	.ascii	"buf\000"
-	.byte	0x2
-	.2byte	0xd0e
-	.4byte	0x1aea
-	.4byte	.LLST284
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xd10
-	.4byte	0x3a
-	.4byte	.LLST285
-	.uleb128 0x5e
-	.4byte	.LASF1446
-	.byte	0x2
-	.2byte	0xd11
-	.4byte	0x7cb
-	.4byte	.LLST286
-	.uleb128 0x86
-	.4byte	0x8eb5
-	.4byte	.LBB297
-	.4byte	.LBE297-.LBB297
-	.byte	0x2
-	.2byte	0xd17
-	.uleb128 0x45
-	.4byte	.LVL811
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3b
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1447
-	.byte	0x2
-	.2byte	0xcf7
-	.4byte	0x84
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xac06
-	.uleb128 0x5c
-	.4byte	.LASF1448
-	.byte	0x2
-	.2byte	0xcf7
-	.4byte	0x293a
-	.4byte	.LLST790
-	.uleb128 0x6d
-	.ascii	"die\000"
-	.byte	0x2
-	.2byte	0xcf7
-	.4byte	0x74
-	.4byte	.LLST791
-	.uleb128 0x5e
-	.4byte	.LASF1449
-	.byte	0x2
-	.2byte	0xcf9
-	.4byte	0x57
-	.4byte	.LLST792
-	.uleb128 0x71
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0xcfa
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF1450
-	.byte	0x2
-	.2byte	0xcfb
-	.4byte	0x57
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xcfc
-	.4byte	0x84
-	.4byte	.LLST793
-	.uleb128 0x45
-	.4byte	.LVL3135
-	.4byte	0xac06
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 7
-	.byte	0x33
-	.byte	0x26
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1451
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x84
-	.byte	0x1
-	.4byte	0xac82
-	.uleb128 0x55
-	.4byte	.LASF1452
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x8b6
-	.uleb128 0x66
-	.ascii	"die\000"
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x74
-	.uleb128 0x66
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0xcd7
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xcd9
-	.4byte	0x84
-	.uleb128 0x56
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xcda
-	.4byte	0x74
-	.uleb128 0x57
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0xcdb
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xcdb
-	.4byte	0x57
-	.uleb128 0x56
-	.4byte	.LASF1178
-	.byte	0x2
-	.2byte	0xcdc
-	.4byte	0xc5
-	.uleb128 0x56
-	.4byte	.LASF1450
-	.byte	0x2
-	.2byte	0xcdd
-	.4byte	0x57
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1453
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x84
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xae0d
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x1aea
-	.4byte	.LLST122
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x74
-	.4byte	.LLST123
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xc96
-	.4byte	0x74
-	.4byte	.LLST124
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xc98
-	.4byte	0x74
-	.4byte	.LLST125
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xc99
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xc9a
-	.4byte	0x676
-	.4byte	.LLST122
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xc9b
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xc9c
-	.4byte	0x74
-	.4byte	.LLST127
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xc9d
-	.4byte	0x3a
-	.4byte	.LLST128
-	.uleb128 0x44
-	.4byte	.LVL259
-	.4byte	0xb575
-	.4byte	0xad3c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL261
-	.4byte	0xbdec
-	.4byte	0xad6c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL266
-	.4byte	0xbc12
-	.uleb128 0x44
-	.4byte	.LVL268
-	.4byte	0xa925
-	.4byte	0xad89
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL269
-	.4byte	0xe19b
-	.4byte	0xad9d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL271
-	.4byte	0xbcab
-	.4byte	0xadb1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL272
-	.4byte	0xe067
-	.4byte	0xadcb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL273
-	.4byte	0xa8e2
-	.4byte	0xaddf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL274
-	.4byte	0xe175
-	.uleb128 0x44
-	.4byte	.LVL276
-	.4byte	0xbc12
-	.4byte	0xadfc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL277
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1456
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x84
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xb17b
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x1aea
-	.4byte	.LLST516
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x74
-	.4byte	.LLST517
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x74
-	.4byte	.LLST518
-	.uleb128 0x5c
-	.4byte	.LASF1457
-	.byte	0x2
-	.2byte	0xc23
-	.4byte	0x74
-	.4byte	.LLST519
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xc25
-	.4byte	0x74
-	.4byte	.LLST520
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xc26
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xc27
-	.4byte	0x676
-	.4byte	.LLST521
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xc28
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xc29
-	.4byte	0x74
-	.4byte	.LLST522
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xc2a
-	.4byte	0x3a
-	.4byte	.LLST523
-	.uleb128 0x5e
-	.4byte	.LASF65
-	.byte	0x2
-	.2byte	0xc2b
-	.4byte	0x74
-	.4byte	.LLST524
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xc2c
-	.4byte	0x74
-	.4byte	.LLST525
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x4a8
-	.4byte	0xafaa
-	.uleb128 0x38
-	.4byte	.LASF1458
-	.byte	0x2
-	.2byte	0xc74
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x44
-	.4byte	.LVL1797
-	.4byte	0x103ff
-	.4byte	0xaf15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC27
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1799
-	.4byte	0xbdec
-	.4byte	0xaf49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1800
-	.4byte	0xb17b
-	.4byte	0xaf68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 -32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1801
-	.4byte	0x103ff
-	.4byte	0xaf7f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC28
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1802
-	.4byte	0x103ff
-	.4byte	0xaf96
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC29
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1803
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC30
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1766
-	.4byte	0xb70a
-	.uleb128 0x44
-	.4byte	.LVL1768
-	.4byte	0xbdec
-	.4byte	0xafe7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1773
-	.4byte	0xbc12
-	.uleb128 0x44
-	.4byte	.LVL1775
-	.4byte	0xa835
-	.4byte	0xb004
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1776
-	.4byte	0xc7c8
-	.4byte	0xb026
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1777
-	.4byte	0xa925
-	.4byte	0xb03a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1778
-	.4byte	0xe19b
-	.4byte	0xb04e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1779
-	.4byte	0xe0ed
-	.4byte	0xb068
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1780
-	.4byte	0xa045
-	.4byte	0xb08a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1781
-	.4byte	0xdefd
-	.4byte	0xb09e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1782
-	.4byte	0xbcab
-	.4byte	0xb0b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1783
-	.4byte	0xdfdf
-	.4byte	0xb0cc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1784
-	.4byte	0xa045
-	.4byte	0xb0ee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1785
-	.4byte	0xdf6d
-	.4byte	0xb108
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1787
-	.4byte	0xa8e2
-	.4byte	0xb11c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1788
-	.4byte	0xa925
-	.uleb128 0x44
-	.4byte	.LVL1789
-	.4byte	0xbcab
-	.4byte	0xb139
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1790
-	.4byte	0xa8e2
-	.4byte	0xb14d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1791
-	.4byte	0xe175
-	.uleb128 0x44
-	.4byte	.LVL1793
-	.4byte	0xbc12
-	.4byte	0xb16a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1794
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1459
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x84
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xb575
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x1aea
-	.4byte	.LLST493
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x74
-	.4byte	.LLST494
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xb7c
-	.4byte	0x74
-	.4byte	.LLST495
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xb7e
-	.4byte	0x74
-	.4byte	.LLST496
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xb7f
-	.4byte	0x676
-	.4byte	.LLST493
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xb80
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xb81
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x56
-	.4byte	.LASF1460
-	.byte	0x2
-	.2byte	0xb81
-	.4byte	0x74
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xb82
-	.4byte	0x74
-	.4byte	.LLST498
-	.uleb128 0x81
-	.4byte	.LASF1461
-	.byte	0x2
-	.2byte	0xb82
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x38
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xb83
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x5e
-	.4byte	.LASF1462
-	.byte	0x2
-	.2byte	0xb83
-	.4byte	0x3a
-	.4byte	.LLST499
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xb84
-	.4byte	0x74
-	.4byte	.LLST500
-	.uleb128 0x5e
-	.4byte	.LASF1463
-	.byte	0x2
-	.2byte	0xb85
-	.4byte	0x3a
-	.4byte	.LLST501
-	.uleb128 0x5e
-	.4byte	.LASF1464
-	.byte	0x2
-	.2byte	0xb86
-	.4byte	0x74
-	.4byte	.LLST502
-	.uleb128 0x5e
-	.4byte	.LASF1465
-	.byte	0x2
-	.2byte	0xb87
-	.4byte	0x74
-	.4byte	.LLST503
-	.uleb128 0x5e
-	.4byte	.LASF1466
-	.byte	0x2
-	.2byte	0xb88
-	.4byte	0x74
-	.4byte	.LLST504
-	.uleb128 0x5e
-	.4byte	.LASF72
-	.byte	0x2
-	.2byte	0xb89
-	.4byte	0x74
-	.4byte	.LLST505
-	.uleb128 0x58
-	.4byte	.LASF1467
-	.byte	0x2
-	.2byte	0xbac
-	.uleb128 0x6f
-	.4byte	.LBB411
-	.4byte	.LBE411-.LBB411
-	.4byte	0xb2e8
-	.uleb128 0x5e
-	.4byte	.LASF79
-	.byte	0x2
-	.2byte	0xb9f
-	.4byte	0x3a
-	.4byte	.LLST506
-	.uleb128 0x45
-	.4byte	.LVL1668
-	.4byte	0xc7c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x470
-	.4byte	0xb332
-	.uleb128 0x5e
-	.4byte	.LASF1468
-	.byte	0x2
-	.2byte	0xbd0
-	.4byte	0x74
-	.4byte	.LLST507
-	.uleb128 0x44
-	.4byte	.LVL1696
-	.4byte	0xd687
-	.4byte	0xb31b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1699
-	.4byte	0xaa04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x24
-	.byte	0x9
-	.byte	0xfc
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1651
-	.4byte	0xba02
-	.uleb128 0x44
-	.4byte	.LVL1657
-	.4byte	0xbdec
-	.4byte	0xb36e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -64
-	.byte	0x6
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1665
-	.4byte	0xa835
-	.4byte	0xb382
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1669
-	.4byte	0xa925
-	.4byte	0xb396
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1670
-	.4byte	0xe19b
-	.4byte	0xb3aa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1672
-	.4byte	0xe1c1
-	.4byte	0xb3c4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1673
-	.4byte	0xa835
-	.4byte	0xb3d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1675
-	.4byte	0xe266
-	.4byte	0xb3f2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1676
-	.4byte	0xa045
-	.4byte	0xb413
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1681
-	.4byte	0xe175
-	.4byte	0xb427
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1683
-	.4byte	0xe2e2
-	.4byte	0xb43b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1687
-	.4byte	0xe266
-	.4byte	0xb455
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1688
-	.4byte	0xa045
-	.4byte	0xb476
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1691
-	.4byte	0xa8e2
-	.4byte	0xb48a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1693
-	.4byte	0xdd4c
-	.4byte	0xb49e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x87
-	.4byte	.LVL1703
-	.4byte	0xb4af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1706
-	.4byte	0xc7c8
-	.4byte	0xb4d1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1707
-	.4byte	0xdd4c
-	.4byte	0xb4e5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1710
-	.4byte	0x103ff
-	.4byte	0xb502
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1711
-	.4byte	0xe19b
-	.uleb128 0x88
-	.4byte	.LVL1712
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.4byte	0xb51f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1715
-	.4byte	0x103ff
-	.4byte	0xb536
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC23
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1716
-	.4byte	0x4d68
-	.4byte	0xb557
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1720
-	.4byte	0xe175
-	.4byte	0xb56b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1722
-	.4byte	0xe175
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1469
-	.byte	0x2
-	.2byte	0xb54
-	.4byte	0x84
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xb70a
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xb54
-	.4byte	0x1aea
-	.4byte	.LLST117
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xb54
-	.4byte	0x74
-	.4byte	.LLST118
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xb56
-	.4byte	0x74
-	.4byte	.LLST119
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xb57
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xb58
-	.4byte	0x676
-	.4byte	.LLST120
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xb59
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x38
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xb5a
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xb5b
-	.4byte	0x74
-	.4byte	.LLST121
-	.uleb128 0x44
-	.4byte	.LVL237
-	.4byte	0xbdec
-	.4byte	0xb638
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL240
-	.4byte	0xa835
-	.4byte	0xb64c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL241
-	.4byte	0xa925
-	.4byte	0xb660
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL242
-	.4byte	0xe067
-	.4byte	0xb679
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL243
-	.4byte	0xa835
-	.4byte	0xb68d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL244
-	.4byte	0xde59
-	.4byte	0xb6a1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL246
-	.4byte	0xe067
-	.4byte	0xb6ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL247
-	.4byte	0xa835
-	.4byte	0xb6ce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL248
-	.4byte	0xde59
-	.4byte	0xb6e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL250
-	.4byte	0x103ff
-	.4byte	0xb6f9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL251
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1470
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x84
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xba02
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x1aea
-	.4byte	.LLST508
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x74
-	.4byte	.LLST509
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x74
-	.4byte	.LLST510
-	.uleb128 0x5c
-	.4byte	.LASF1457
-	.byte	0x2
-	.2byte	0xb01
-	.4byte	0x74
-	.4byte	.LLST511
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xb03
-	.4byte	0x74
-	.4byte	.LLST512
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xb04
-	.4byte	0x74
-	.4byte	.LLST513
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xb05
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xb06
-	.4byte	0x676
-	.4byte	.LLST514
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xb07
-	.4byte	0x74
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xb08
-	.4byte	0x3a
-	.4byte	.LLST515
-	.uleb128 0x38
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xb09
-	.4byte	0x74
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x488
-	.4byte	0xb89b
-	.uleb128 0x38
-	.4byte	.LASF1458
-	.byte	0x2
-	.2byte	0xb34
-	.4byte	0xc5
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x44
-	.4byte	.LVL1748
-	.4byte	0x103ff
-	.4byte	0xb808
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC27
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1751
-	.4byte	0xbdec
-	.4byte	0xb83a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1752
-	.4byte	0xb17b
-	.4byte	0xb859
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 -32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1753
-	.4byte	0x103ff
-	.4byte	0xb870
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC28
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1754
-	.4byte	0x103ff
-	.4byte	0xb887
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC29
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1755
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC30
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1729
-	.4byte	0xbdec
-	.4byte	0xb8cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -76
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -72
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1732
-	.4byte	0xa835
-	.4byte	0xb8e1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1733
-	.4byte	0xa925
-	.4byte	0xb8f5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1734
-	.4byte	0xe0ed
-	.4byte	0xb90f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1735
-	.4byte	0xa045
-	.4byte	0xb931
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1736
-	.4byte	0xdf6d
-	.4byte	0xb94b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1737
-	.4byte	0xa835
-	.4byte	0xb95f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1738
-	.4byte	0xde59
-	.4byte	0xb973
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1740
-	.4byte	0xe0ed
-	.4byte	0xb98d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1741
-	.4byte	0xa045
-	.4byte	0xb9af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1742
-	.4byte	0xdf6d
-	.4byte	0xb9c9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1743
-	.4byte	0xa835
-	.4byte	0xb9dd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1744
-	.4byte	0xde59
-	.4byte	0xb9f1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1746
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1471
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x84
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbc12
-	.uleb128 0x6d
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x1aea
-	.4byte	.LLST486
-	.uleb128 0x5c
-	.4byte	.LASF1153
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x74
-	.4byte	.LLST487
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x74
-	.4byte	.LLST488
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xaca
-	.4byte	0x74
-	.4byte	.LLST489
-	.uleb128 0x5e
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xacb
-	.4byte	0x676
-	.4byte	.LLST490
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xacc
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x38
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xacd
-	.4byte	0x74
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x38
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xace
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x38
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0xacf
-	.4byte	0x74
-	.uleb128 0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.uleb128 0x5e
-	.4byte	.LASF1465
-	.byte	0x2
-	.2byte	0xad0
-	.4byte	0x74
-	.4byte	.LLST491
-	.uleb128 0x5e
-	.4byte	.LASF1466
-	.byte	0x2
-	.2byte	0xad1
-	.4byte	0x74
-	.4byte	.LLST492
-	.uleb128 0x44
-	.4byte	.LVL1626
-	.4byte	0xbdec
-	.4byte	0xbafa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x5
-	.byte	0x78
-	.sleb128 0
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1629
-	.4byte	0xa835
-	.4byte	0xbb0e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1630
-	.4byte	0xa925
-	.4byte	0xbb22
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1631
-	.4byte	0xe2e2
-	.4byte	0xbb3c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1632
-	.4byte	0xa835
-	.4byte	0xbb50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1633
-	.4byte	0xa045
-	.4byte	0xbb6f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1636
-	.4byte	0xe2e2
-	.4byte	0xbb89
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1637
-	.4byte	0xa045
-	.4byte	0xbba8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1640
-	.4byte	0xa8e2
-	.4byte	0xbbbc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1643
-	.4byte	0x103ff
-	.4byte	0xbbd3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC23
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1644
-	.4byte	0x4d68
-	.4byte	0xbbf4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC24
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1645
-	.4byte	0x4d68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC25
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1472
-	.byte	0x2
-	.2byte	0xab0
-	.4byte	0x74
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbca5
-	.uleb128 0x5c
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xab0
-	.4byte	0x3a
-	.4byte	.LLST96
-	.uleb128 0x5e
-	.4byte	.LASF1473
-	.byte	0x2
-	.2byte	0xab2
-	.4byte	0xbca5
-	.4byte	.LLST97
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xab3
-	.4byte	0x3a
-	.4byte	.LLST98
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xab4
-	.4byte	0x74
-	.4byte	.LLST99
-	.uleb128 0x44
-	.4byte	.LVL185
-	.4byte	0xa925
-	.4byte	0xbc80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL186
-	.4byte	0xbcab
-	.4byte	0xbc94
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL189
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x621
-	.uleb128 0x5b
-	.4byte	.LASF1474
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x74
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbd20
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x3a
-	.4byte	.LLST73
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x74
-	.4byte	.LLST74
-	.uleb128 0x5c
-	.4byte	.LASF1475
-	.byte	0x2
-	.2byte	0xaa2
-	.4byte	0x3a
-	.4byte	.LLST75
-	.uleb128 0x38
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0xaa4
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x45
-	.4byte	.LVL126
-	.4byte	0xbd20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1476
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x74
-	.4byte	.LFB255
-	.4byte	.LFE255-.LFB255
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbdec
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x3a
-	.4byte	.LLST66
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x74
-	.4byte	.LLST67
-	.uleb128 0x5c
-	.4byte	.LASF1475
-	.byte	0x2
-	.2byte	0xa8a
-	.4byte	0x3a
-	.4byte	.LLST68
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0xa8c
-	.4byte	0x15bc
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0xb0
-	.4byte	0xbd8e
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0xa96
-	.4byte	0x74
-	.4byte	.LLST71
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB188
-	.4byte	.Ldebug_ranges0+0x98
-	.byte	0x2
-	.2byte	0xa8d
-	.4byte	0xbdc0
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST69
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x98
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST70
-	.byte	0
-	.byte	0
-	.uleb128 0x82
-	.4byte	0xa8c4
-	.4byte	.LBB194
-	.4byte	.LBE194-.LBB194
-	.byte	0x2
-	.2byte	0xa9e
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST72
-	.uleb128 0x45
-	.4byte	.LVL117
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1477
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x74
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbed1
-	.uleb128 0x5c
-	.4byte	.LASF1454
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x676
-	.4byte	.LLST56
-	.uleb128 0x5c
-	.4byte	.LASF1355
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x74
-	.4byte	.LLST57
-	.uleb128 0x5c
-	.4byte	.LASF1478
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x13e
-	.4byte	.LLST58
-	.uleb128 0x5c
-	.4byte	.LASF1479
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x13e
-	.4byte	.LLST59
-	.uleb128 0x5c
-	.4byte	.LASF1135
-	.byte	0x2
-	.2byte	0xa6c
-	.4byte	0x3a
-	.4byte	.LLST60
-	.uleb128 0x5e
-	.4byte	.LASF1480
-	.byte	0x2
-	.2byte	0xa6e
-	.4byte	0x57
-	.4byte	.LLST61
-	.uleb128 0x5e
-	.4byte	.LASF1481
-	.byte	0x2
-	.2byte	0xa6e
-	.4byte	0x57
-	.4byte	.LLST62
-	.uleb128 0x5e
-	.4byte	.LASF1482
-	.byte	0x2
-	.2byte	0xa6e
-	.4byte	0x57
-	.4byte	.LLST63
-	.uleb128 0x38
-	.4byte	.LASF1483
-	.byte	0x2
-	.2byte	0xa6f
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x38
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0xa70
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0xa71
-	.4byte	0x74
-	.4byte	.LLST64
-	.uleb128 0x5e
-	.4byte	.LASF1484
-	.byte	0x2
-	.2byte	0xa72
-	.4byte	0x74
-	.4byte	.LLST65
-	.uleb128 0x38
-	.4byte	.LASF1314
-	.byte	0x2
-	.2byte	0xa73
-	.4byte	0x57
-	.uleb128 0x1
-	.byte	0x5b
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1485
-	.byte	0x2
-	.2byte	0xa5f
-	.4byte	0x74
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xbf65
-	.uleb128 0x89
-	.4byte	0xa801
-	.4byte	.LBB227
-	.4byte	.LBE227-.LBB227
-	.byte	0x2
-	.2byte	0xa68
-	.4byte	0xbf26
-	.uleb128 0x4f
-	.4byte	0xa81a
-	.4byte	.LLST133
-	.uleb128 0x4f
-	.4byte	0xa80e
-	.4byte	.LLST133
-	.uleb128 0x7a
-	.4byte	.LBB228
-	.4byte	.LBE228-.LBB228
-	.uleb128 0x73
-	.4byte	0xa827
-	.4byte	.LLST135
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL290
-	.4byte	0xa835
-	.4byte	0xbf39
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL291
-	.4byte	0xc6a1
-	.uleb128 0x44
-	.4byte	.LVL292
-	.4byte	0xd8d7
-	.4byte	0xbf55
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL293
-	.4byte	0xa968
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1486
-	.byte	0x2
-	.2byte	0x890
-	.4byte	0x74
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc328
-	.uleb128 0x5c
-	.4byte	.LASF286
-	.byte	0x2
-	.2byte	0x890
-	.4byte	0x13e
-	.4byte	.LLST474
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x892
-	.4byte	0x74
-	.4byte	.LLST475
-	.uleb128 0x5d
-	.ascii	"ret\000"
-	.byte	0x2
-	.2byte	0x893
-	.4byte	0x74
-	.4byte	.LLST476
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x438
-	.4byte	0xbff7
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x74
-	.4byte	.LLST482
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x74
-	.4byte	.LLST483
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x936
-	.4byte	0xc328
-	.4byte	.LLST484
-	.uleb128 0x48
-	.4byte	.LVL1606
-	.4byte	0xced6
-	.uleb128 0x48
-	.4byte	.LVL1607
-	.4byte	0xd2cb
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x450
-	.4byte	0xc011
-	.uleb128 0x5e
-	.4byte	.LASF1487
-	.byte	0x2
-	.2byte	0x9f6
-	.4byte	0xc32e
-	.4byte	.LLST485
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xe3cf
-	.4byte	.LBB392
-	.4byte	.Ldebug_ranges0+0x3e8
-	.byte	0x2
-	.2byte	0x8a9
-	.4byte	0xc0fd
-	.uleb128 0x4f
-	.4byte	0xe3e9
-	.4byte	.LLST477
-	.uleb128 0x4f
-	.4byte	0xe3dd
-	.4byte	.LLST478
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x3e8
-	.uleb128 0x73
-	.4byte	0xe3f5
-	.4byte	.LLST479
-	.uleb128 0x74
-	.4byte	0xe401
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB394
-	.4byte	.Ldebug_ranges0+0x400
-	.byte	0x2
-	.2byte	0x11b
-	.4byte	0xc078
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST480
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x400
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB400
-	.4byte	.Ldebug_ranges0+0x420
-	.byte	0x2
-	.2byte	0x11f
-	.4byte	0xc0a6
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST481
-	.uleb128 0x45
-	.4byte	.LVL1577
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1572
-	.4byte	0xe40e
-	.4byte	0xc0ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1575
-	.4byte	0xa925
-	.4byte	0xc0ce
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1578
-	.4byte	0xa8e2
-	.4byte	0xc0e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1579
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC21
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 1
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1563
-	.4byte	0x5194
-	.4byte	0xc112
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1564
-	.4byte	0x5194
-	.4byte	0xc127
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1565
-	.4byte	0x5194
-	.4byte	0xc13c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1566
-	.4byte	0x5194
-	.4byte	0xc151
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1567
-	.4byte	0x5194
-	.4byte	0xc166
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1569
-	.4byte	0xaa73
-	.4byte	0xc17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1582
-	.4byte	0xa9ad
-	.4byte	0xc18f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1583
-	.4byte	0x530b
-	.4byte	0xc1b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x354
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1586
-	.4byte	0x52a5
-	.4byte	0xc1d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR140+32
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1587
-	.4byte	0x52a5
-	.4byte	0xc1fe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR197
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1588
-	.4byte	0xc334
-	.uleb128 0x48
-	.4byte	.LVL1589
-	.4byte	0xd8d7
-	.uleb128 0x48
-	.4byte	.LVL1590
-	.4byte	0xa968
-	.uleb128 0x48
-	.4byte	.LVL1591
-	.4byte	0xd49d
-	.uleb128 0x44
-	.4byte	.LVL1593
-	.4byte	0x103ff
-	.4byte	0xc239
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC22
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1594
-	.4byte	0xc334
-	.uleb128 0x48
-	.4byte	.LVL1595
-	.4byte	0xc54f
-	.uleb128 0x48
-	.4byte	.LVL1596
-	.4byte	0xced6
-	.uleb128 0x48
-	.4byte	.LVL1597
-	.4byte	0xd2cb
-	.uleb128 0x44
-	.4byte	.LVL1598
-	.4byte	0xd651
-	.4byte	0xc270
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1599
-	.4byte	0xd2cb
-	.uleb128 0x48
-	.4byte	.LVL1601
-	.4byte	0xd242
-	.uleb128 0x48
-	.4byte	.LVL1602
-	.4byte	0xc54f
-	.uleb128 0x44
-	.4byte	.LVL1608
-	.4byte	0xd8d7
-	.4byte	0xc29e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1609
-	.4byte	0xa968
-	.4byte	0xc2b1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1610
-	.4byte	0xe19b
-	.4byte	0xc2c5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1611
-	.4byte	0xd651
-	.4byte	0xc2d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1612
-	.4byte	0xe175
-	.4byte	0xc2ec
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1613
-	.4byte	0xe3a1
-	.4byte	0xc300
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1614
-	.4byte	0xc415
-	.4byte	0xc317
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR138
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1617
-	.4byte	0xe3a1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x45
-	.uleb128 0xc
-	.byte	0x4
-	.4byte	0x144
-	.uleb128 0x5b
-	.4byte	.LASF1488
-	.byte	0x2
-	.2byte	0x860
-	.4byte	0x74
-	.4byte	.LFB251
-	.4byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc3c9
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x862
-	.4byte	0x74
-	.4byte	.LLST308
-	.uleb128 0x5e
-	.4byte	.LASF1489
-	.byte	0x2
-	.2byte	0x863
-	.4byte	0xab0
-	.4byte	.LLST309
-	.uleb128 0x44
-	.4byte	.LVL905
-	.4byte	0xe5c8
-	.4byte	0xc38c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL909
-	.4byte	0x52a5
-	.4byte	0xc3a9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL910
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1490
-	.byte	0x2
-	.2byte	0x85a
-	.4byte	0x74
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc415
-	.uleb128 0x5c
-	.4byte	.LASF1491
-	.byte	0x2
-	.2byte	0x85a
-	.4byte	0x8b6
-	.4byte	.LLST307
-	.uleb128 0x45
-	.4byte	.LVL902
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR138
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1492
-	.byte	0x2
-	.2byte	0x82a
-	.4byte	0x74
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc54f
-	.uleb128 0x5c
-	.4byte	.LASF1491
-	.byte	0x2
-	.2byte	0x82a
-	.4byte	0x8b6
-	.4byte	.LLST413
-	.uleb128 0x71
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x82c
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x71
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x82c
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x38
-	.4byte	.LASF1493
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0x7dc
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1249
-	.byte	0x2
-	.2byte	0x836
-	.4byte	0x74
-	.4byte	.LLST414
-	.uleb128 0x38
-	.4byte	.LASF1494
-	.byte	0x2
-	.2byte	0x837
-	.4byte	0x3a
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x44
-	.4byte	.LVL1272
-	.4byte	0xe19b
-	.4byte	0xc499
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1273
-	.4byte	0x530b
-	.4byte	0xc4b9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1275
-	.4byte	0xe3a1
-	.4byte	0xc4cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1276
-	.4byte	0xe175
-	.4byte	0xc4e1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1279
-	.4byte	0xe3a1
-	.4byte	0xc4f5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1280
-	.4byte	0xdd4c
-	.4byte	0xc50d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1285
-	.4byte	0x103ff
-	.4byte	0xc52a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1286
-	.4byte	0x52a5
-	.4byte	0xc545
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1288
-	.4byte	0xd2cb
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1495
-	.byte	0x2
-	.2byte	0x7ff
-	.4byte	.LFB248
-	.4byte	.LFE248-.LFB248
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc61a
-	.uleb128 0x5e
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x801
-	.4byte	0x74
-	.4byte	.LLST283
-	.uleb128 0x44
-	.4byte	.LVL796
-	.4byte	0x530b
-	.4byte	0xc597
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL797
-	.4byte	0x530b
-	.4byte	0xc5ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL798
-	.4byte	0x530b
-	.4byte	0xc5dd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR23
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x80
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL801
-	.4byte	0xe5c8
-	.4byte	0xc5fd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL807
-	.4byte	0xe5c8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x72
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1496
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	.LFB247
-	.4byte	.LFE247-.LFB247
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc6a1
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	0x3a
-	.4byte	.LLST415
-	.uleb128 0x5c
-	.4byte	.LASF1497
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	0x74
-	.4byte	.LLST416
-	.uleb128 0x5c
-	.4byte	.LASF1498
-	.byte	0x2
-	.2byte	0x7bf
-	.4byte	0x57
-	.4byte	.LLST417
-	.uleb128 0x5e
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x7c1
-	.4byte	0x3a
-	.4byte	.LLST418
-	.uleb128 0x44
-	.4byte	.LVL1294
-	.4byte	0x530b
-	.4byte	0xc68b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x8000
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1296
-	.4byte	0xda49
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1499
-	.byte	0x2
-	.2byte	0x7b1
-	.byte	0x1
-	.4byte	0xc6c7
-	.uleb128 0x56
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x7b3
-	.4byte	0x3a
-	.uleb128 0x56
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x7b4
-	.4byte	0x3a
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1500
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x74
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc7c8
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x3a
-	.4byte	.LLST397
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x74
-	.4byte	.LLST398
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x8b6
-	.4byte	.LLST399
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x788
-	.4byte	0x8b6
-	.4byte	.LLST400
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x78a
-	.4byte	0x74
-	.4byte	.LLST401
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x78b
-	.4byte	0x74
-	.4byte	.LLST402
-	.uleb128 0x71
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x78c
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x5e
-	.4byte	.LASF79
-	.byte	0x2
-	.2byte	0x78d
-	.4byte	0x3a
-	.4byte	.LLST403
-	.uleb128 0x5e
-	.4byte	.LASF77
-	.byte	0x2
-	.2byte	0x78e
-	.4byte	0x3a
-	.4byte	.LLST404
-	.uleb128 0x44
-	.4byte	.LVL1208
-	.4byte	0xa835
-	.4byte	0xc781
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1216
-	.4byte	0xc7c8
-	.4byte	0xc7a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1217
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1502
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xc8cb
-	.uleb128 0x5c
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x3a
-	.4byte	.LLST86
-	.uleb128 0x5c
-	.4byte	.LASF76
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x3a
-	.4byte	.LLST87
-	.uleb128 0x5c
-	.4byte	.LASF78
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x8b6
-	.4byte	.LLST88
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x76c
-	.4byte	0x3a
-	.4byte	.LLST89
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x76e
-	.4byte	0x15bc
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x76f
-	.4byte	0x3a
-	.4byte	.LLST90
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x770
-	.4byte	0xc328
-	.4byte	.LLST91
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB197
-	.4byte	.Ldebug_ranges0+0xd0
-	.byte	0x2
-	.2byte	0x77b
-	.4byte	0xc878
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST92
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0xd0
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB201
-	.4byte	.Ldebug_ranges0+0xe8
-	.byte	0x2
-	.2byte	0x780
-	.4byte	0xc8a6
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST93
-	.uleb128 0x45
-	.4byte	.LVL176
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL164
-	.4byte	0xa925
-	.4byte	0xc8ba
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL168
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1503
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xca62
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x3a
-	.4byte	.LLST386
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x74
-	.4byte	.LLST387
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x8b6
-	.4byte	.LLST388
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x73a
-	.4byte	0x8b6
-	.4byte	.LLST389
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x73c
-	.4byte	0x74
-	.4byte	.LLST390
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x73d
-	.4byte	0x74
-	.4byte	.LLST391
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x73e
-	.4byte	0x74
-	.4byte	.LLST392
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x73f
-	.4byte	0x15bc
-	.uleb128 0x5e
-	.4byte	.LASF1504
-	.byte	0x2
-	.2byte	0x740
-	.4byte	0x3a
-	.4byte	.LLST393
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB327
-	.4byte	.Ldebug_ranges0+0x2d0
-	.byte	0x2
-	.2byte	0x746
-	.4byte	0xc99d
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST394
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x2d0
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB331
-	.4byte	.Ldebug_ranges0+0x2e8
-	.byte	0x2
-	.2byte	0x75e
-	.4byte	0xc9cb
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST395
-	.uleb128 0x45
-	.4byte	.LVL1186
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xa8c4
-	.4byte	.LBB335
-	.4byte	.Ldebug_ranges0+0x300
-	.byte	0x2
-	.2byte	0x74a
-	.4byte	0xc9f9
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST396
-	.uleb128 0x45
-	.4byte	.LVL1195
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1180
-	.4byte	0xa835
-	.4byte	0xca0d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1189
-	.4byte	0x103ff
-	.4byte	0xca3e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC14
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1196
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1505
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x74
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xcb8c
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x3a
-	.4byte	.LLST379
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x74
-	.4byte	.LLST380
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x8b6
-	.4byte	.LLST381
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x71b
-	.4byte	0x8b6
-	.4byte	.LLST382
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0x74
-	.4byte	.LLST383
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x71e
-	.4byte	0x74
-	.4byte	.LLST384
-	.uleb128 0x71
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x71f
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x720
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB323
-	.4byte	.Ldebug_ranges0+0x2b8
-	.byte	0x2
-	.2byte	0x723
-	.4byte	0xcb22
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST385
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x2b8
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1161
-	.4byte	0xa835
-	.4byte	0xcb36
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1164
-	.4byte	0xcb8c
-	.4byte	0xcb4f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1167
-	.4byte	0xcb8c
-	.4byte	0xcb69
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1168
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1506
-	.byte	0x2
-	.2byte	0x70e
-	.4byte	.LFB241
-	.4byte	.LFE241-.LFB241
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xcbff
-	.uleb128 0x5c
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x70e
-	.4byte	0x15bc
-	.4byte	.LLST52
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x70e
-	.4byte	0x3a
-	.4byte	.LLST53
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x710
-	.4byte	0x74
-	.4byte	.LLST54
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB184
-	.4byte	.Ldebug_ranges0+0x80
-	.byte	0x2
-	.2byte	0x717
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST55
-	.uleb128 0x45
-	.4byte	.LVL89
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x12c
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1507
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x74
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xcddf
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x3a
-	.4byte	.LLST370
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x74
-	.4byte	.LLST371
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x8b6
-	.4byte	.LLST372
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x6cc
-	.4byte	0x8b6
-	.4byte	.LLST373
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x6ce
-	.4byte	0x74
-	.4byte	.LLST374
-	.uleb128 0x5e
-	.4byte	.LASF1501
-	.byte	0x2
-	.2byte	0x6cf
-	.4byte	0x74
-	.4byte	.LLST375
-	.uleb128 0x5e
-	.4byte	.LASF1508
-	.byte	0x2
-	.2byte	0x6d0
-	.4byte	0x74
-	.4byte	.LLST376
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x6d1
-	.4byte	0x74
-	.4byte	.LLST377
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x6d2
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB315
-	.4byte	.Ldebug_ranges0+0x290
-	.byte	0x2
-	.2byte	0x6d5
-	.4byte	0xccd1
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST378
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x290
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1128
-	.4byte	0xa835
-	.4byte	0xcce5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1132
-	.4byte	0xa9ad
-	.4byte	0xccf9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1139
-	.4byte	0xce51
-	.4byte	0xcd12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1141
-	.4byte	0xa835
-	.4byte	0xcd26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1142
-	.4byte	0xa9ad
-	.4byte	0xcd3a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1145
-	.4byte	0xce51
-	.4byte	0xcd54
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1146
-	.4byte	0xa9ad
-	.4byte	0xcd68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1147
-	.4byte	0xdd4c
-	.4byte	0xcd90
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1150
-	.4byte	0xa9ad
-	.4byte	0xcda4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1155
-	.4byte	0xcddf
-	.uleb128 0x44
-	.4byte	.LVL1156
-	.4byte	0xdd4c
-	.4byte	0xcdd5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1159
-	.4byte	0xcddf
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1509
-	.byte	0x2
-	.2byte	0x6ba
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xce51
-	.uleb128 0x5c
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x6ba
-	.4byte	0x15bc
-	.4byte	.LLST48
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x6ba
-	.4byte	0x3a
-	.4byte	.LLST49
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x6bc
-	.4byte	0x74
-	.4byte	.LLST50
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB180
-	.4byte	.Ldebug_ranges0+0x68
-	.byte	0x2
-	.2byte	0x6c1
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST51
-	.uleb128 0x45
-	.4byte	.LVL81
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1510
-	.byte	0x2
-	.2byte	0x6a9
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xced6
-	.uleb128 0x5c
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x6a9
-	.4byte	0x15bc
-	.4byte	.LLST113
-	.uleb128 0x5c
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x6a9
-	.4byte	0x3a
-	.4byte	.LLST114
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0x74
-	.4byte	.LLST115
-	.uleb128 0x89
-	.4byte	0xa8c4
-	.4byte	.LBB221
-	.4byte	.LBE221-.LBB221
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xcec6
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST116
-	.uleb128 0x45
-	.4byte	.LVL229
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xc8
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL232
-	.4byte	0xa835
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1511
-	.byte	0x2
-	.2byte	0x689
-	.byte	0x1
-	.4byte	0xcef0
-	.uleb128 0x55
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x689
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1512
-	.byte	0x2
-	.2byte	0x551
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd1ee
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x551
-	.4byte	0x8f
-	.4byte	.LLST452
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x553
-	.4byte	0x84
-	.4byte	.LLST453
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x553
-	.4byte	0x84
-	.4byte	.LLST454
-	.uleb128 0x5d
-	.ascii	"reg\000"
-	.byte	0x2
-	.2byte	0x554
-	.4byte	0x3a
-	.4byte	.LLST455
-	.uleb128 0x5e
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x555
-	.4byte	0x3a
-	.4byte	.LLST456
-	.uleb128 0x5e
-	.4byte	.LASF1455
-	.byte	0x2
-	.2byte	0x556
-	.4byte	0x3a
-	.4byte	.LLST457
-	.uleb128 0x5e
-	.4byte	.LASF76
-	.byte	0x2
-	.2byte	0x557
-	.4byte	0x3a
-	.4byte	.LLST458
-	.uleb128 0x5e
-	.4byte	.LASF77
-	.byte	0x2
-	.2byte	0x558
-	.4byte	0x3a
-	.4byte	.LLST459
-	.uleb128 0x38
-	.4byte	.LASF78
-	.byte	0x2
-	.2byte	0x559
-	.4byte	0x8b6
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gReadRetryInfo+4
-	.byte	0x9f
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x55a
-	.4byte	0x15bc
-	.uleb128 0x5e
-	.4byte	.LASF1513
-	.byte	0x2
-	.2byte	0x55b
-	.4byte	0x8b6
-	.4byte	.LLST460
-	.uleb128 0x5e
-	.4byte	.LASF1514
-	.byte	0x2
-	.2byte	0x55c
-	.4byte	0x13e
-	.4byte	.LLST461
-	.uleb128 0x5e
-	.4byte	.LASF1515
-	.byte	0x2
-	.2byte	0x55d
-	.4byte	0x8f
-	.4byte	.LLST462
-	.uleb128 0x6f
-	.4byte	.LBB353
-	.4byte	.LBE353-.LBB353
-	.4byte	0xd045
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x594
-	.4byte	0xc328
-	.4byte	.LLST463
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB354
-	.4byte	.Ldebug_ranges0+0x330
-	.byte	0x2
-	.2byte	0x597
-	.4byte	0xd019
-	.uleb128 0x8b
-	.4byte	0xaa39
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x330
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB361
-	.4byte	.Ldebug_ranges0+0x358
-	.byte	0x2
-	.2byte	0x59c
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST464
-	.uleb128 0x45
-	.4byte	.LVL1459
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x7a
-	.4byte	.LBB366
-	.4byte	.LBE366-.LBB366
-	.uleb128 0x5e
-	.4byte	.LASF1516
-	.byte	0x2
-	.2byte	0x5af
-	.4byte	0x3a
-	.4byte	.LLST465
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x370
-	.uleb128 0x5e
-	.4byte	.LASF80
-	.byte	0x2
-	.2byte	0x5b2
-	.4byte	0xc328
-	.4byte	.LLST466
-	.uleb128 0x6f
-	.4byte	.LBB372
-	.4byte	.LBE372-.LBB372
-	.4byte	0xd08d
-	.uleb128 0x56
-	.4byte	.LASF864
-	.byte	0x2
-	.2byte	0x605
-	.4byte	0x8f
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x3a0
-	.4byte	0xd0dd
-	.uleb128 0x5e
-	.4byte	.LASF1517
-	.byte	0x2
-	.2byte	0x60b
-	.4byte	0x8f
-	.4byte	.LLST468
-	.uleb128 0x5d
-	.ascii	"mod\000"
-	.byte	0x2
-	.2byte	0x60c
-	.4byte	0x74
-	.4byte	.LLST469
-	.uleb128 0x5e
-	.4byte	.LASF243
-	.byte	0x2
-	.2byte	0x60d
-	.4byte	0x74
-	.4byte	.LLST470
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x3b8
-	.uleb128 0x5e
-	.4byte	.LASF1518
-	.byte	0x2
-	.2byte	0x610
-	.4byte	0x74
-	.4byte	.LLST471
-	.byte	0
-	.byte	0
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB368
-	.4byte	.Ldebug_ranges0+0x388
-	.byte	0x2
-	.2byte	0x5b6
-	.4byte	0xd10b
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST467
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x388
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1474
-	.4byte	0xa835
-	.4byte	0xd11f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1480
-	.4byte	0xa835
-	.4byte	0xd133
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1491
-	.4byte	0x103ff
-	.4byte	0xd14f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1522
-	.4byte	0x4d68
-	.4byte	0xd172
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1523
-	.4byte	0x103ff
-	.4byte	0xd18e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1529
-	.4byte	0x103ff
-	.4byte	0xd1aa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1541
-	.4byte	0xa835
-	.4byte	0xd1be
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1542
-	.4byte	0xe2e2
-	.4byte	0xd1db
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -84
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1543
-	.4byte	0xa835
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1519
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x84
-	.byte	0x1
-	.4byte	0xd239
-	.uleb128 0x55
-	.4byte	.LASF1322
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x57
-	.uleb128 0x57
-	.ascii	"sts\000"
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0x84
-	.uleb128 0x56
-	.4byte	.LASF271
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x73e
-	.uleb128 0x57
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0xc5
-	.uleb128 0x8c
-	.ascii	"out\000"
-	.byte	0x2
-	.2byte	0x431
-	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF1520
-	.byte	0x2
-	.2byte	0x3d0
-	.byte	0x1
-	.uleb128 0x69
-	.4byte	.LASF1521
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd2b5
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0x74
-	.4byte	.LLST279
-	.uleb128 0x5c
-	.4byte	.LASF1522
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0x74
-	.4byte	.LLST280
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x3a3
-	.4byte	0x57
-	.4byte	.LLST281
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x3a3
-	.4byte	0x57
-	.4byte	.LLST282
-	.uleb128 0x45
-	.4byte	.LVL751
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR117
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x400
-	.byte	0
-	.byte	0
-	.uleb128 0x7e
-	.4byte	.LASF1523
-	.byte	0x2
-	.2byte	0x39c
-	.4byte	0x74
-	.4byte	.LFB232
-	.4byte	.LFE232-.LFB232
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x5b
-	.4byte	.LASF1524
-	.byte	0x2
-	.2byte	0x365
-	.4byte	0x74
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd49d
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x74
-	.4byte	.LLST411
-	.uleb128 0x5e
-	.4byte	.LASF1525
-	.byte	0x2
-	.2byte	0x368
-	.4byte	0x74
-	.4byte	.LLST412
-	.uleb128 0x44
-	.4byte	.LVL1244
-	.4byte	0xe3a1
-	.4byte	0xd317
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1245
-	.4byte	0x530b
-	.4byte	0xd331
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1246
-	.4byte	0x52a5
-	.4byte	0xd34e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR22
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1247
-	.4byte	0x52a5
-	.4byte	0xd36a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR26
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1248
-	.4byte	0x52a5
-	.4byte	0xd387
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1249
-	.4byte	0x52a5
-	.4byte	0xd3a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1250
-	.4byte	0x52a5
-	.4byte	0xd3c1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1251
-	.4byte	0x52a5
-	.4byte	0xd3df
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x354
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1252
-	.4byte	0xd5f8
-	.4byte	0xd3fa
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7f4
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1253
-	.4byte	0xe19b
-	.4byte	0xd40e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1255
-	.4byte	0xd968
-	.4byte	0xd426
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1256
-	.4byte	0xda49
-	.4byte	0xd43e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1257
-	.4byte	0xda49
-	.4byte	0xd456
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1258
-	.4byte	0xdd4c
-	.4byte	0xd46e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1259
-	.4byte	0xd5f8
-	.4byte	0xd48c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0xc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7f4
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1265
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF1526
-	.byte	0x2
-	.2byte	0x329
-	.4byte	0x74
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd5f8
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x32b
-	.4byte	0x74
-	.4byte	.LLST365
-	.uleb128 0x5d
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x32c
-	.4byte	0x74
-	.4byte	.LLST366
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x32d
-	.4byte	0x74
-	.4byte	.LLST367
-	.uleb128 0x5e
-	.4byte	.LASF1527
-	.byte	0x2
-	.2byte	0x32e
-	.4byte	0x74
-	.4byte	.LLST368
-	.uleb128 0x38
-	.4byte	.LASF1493
-	.byte	0x2
-	.2byte	0x331
-	.4byte	0x7dc
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x5e
-	.4byte	.LASF1528
-	.byte	0x2
-	.2byte	0x338
-	.4byte	0x74
-	.4byte	.LLST369
-	.uleb128 0x44
-	.4byte	.LVL1099
-	.4byte	0xe19b
-	.4byte	0xd526
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1102
-	.4byte	0xe3a1
-	.4byte	0xd53a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1103
-	.4byte	0xdd4c
-	.4byte	0xd558
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1106
-	.4byte	0xdd4c
-	.4byte	0xd577
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1111
-	.4byte	0xd5f8
-	.4byte	0xd592
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7f4
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1112
-	.4byte	0x52a5
-	.4byte	0xd5b3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x78
-	.sleb128 160
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1113
-	.4byte	0x52a5
-	.4byte	0xd5d0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1114
-	.4byte	0x52a5
-	.4byte	0xd5ee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x354
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1125
-	.4byte	0xe175
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1529
-	.byte	0x2
-	.2byte	0x31f
-	.4byte	0x74
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd651
-	.uleb128 0x6d
-	.ascii	"buf\000"
-	.byte	0x2
-	.2byte	0x31f
-	.4byte	0x8b6
-	.4byte	.LLST44
-	.uleb128 0x6d
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x31f
-	.4byte	0x74
-	.4byte	.LLST45
-	.uleb128 0x5e
-	.4byte	.LASF94
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x74
-	.4byte	.LLST46
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x322
-	.4byte	0x74
-	.4byte	.LLST47
-	.byte	0
-	.uleb128 0x54
-	.4byte	.LASF1530
-	.byte	0x2
-	.2byte	0x30c
-	.4byte	0x74
-	.byte	0x1
-	.4byte	0xd687
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x30c
-	.4byte	0x3a
-	.uleb128 0x55
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x30c
-	.4byte	0x74
-	.uleb128 0x56
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x30e
-	.4byte	0x74
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1531
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x74
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd8d7
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x3a
-	.4byte	.LLST338
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x74
-	.4byte	.LLST339
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x8b6
-	.4byte	.LLST340
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x8b6
-	.4byte	.LLST341
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x2ac
-	.4byte	0x74
-	.4byte	.LLST342
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x2ae
-	.4byte	0x74
-	.4byte	.LLST343
-	.uleb128 0x5d
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x2af
-	.4byte	0x74
-	.4byte	.LLST344
-	.uleb128 0x5e
-	.4byte	.LASF1532
-	.byte	0x2
-	.2byte	0x2b0
-	.4byte	0x74
-	.4byte	.LLST345
-	.uleb128 0x5e
-	.4byte	.LASF1533
-	.byte	0x2
-	.2byte	0x2b1
-	.4byte	0x74
-	.4byte	.LLST346
-	.uleb128 0x5e
-	.4byte	.LASF1534
-	.byte	0x2
-	.2byte	0x2b2
-	.4byte	0x74
-	.4byte	.LLST347
-	.uleb128 0x5e
-	.4byte	.LASF1535
-	.byte	0x2
-	.2byte	0x2b3
-	.4byte	0x74
-	.4byte	.LLST348
-	.uleb128 0x5e
-	.4byte	.LASF1536
-	.byte	0x2
-	.2byte	0x2b4
-	.4byte	0x74
-	.4byte	.LLST349
-	.uleb128 0x5e
-	.4byte	.LASF1537
-	.byte	0x2
-	.2byte	0x2b5
-	.4byte	0x74
-	.4byte	.LLST350
-	.uleb128 0x5e
-	.4byte	.LASF1538
-	.byte	0x2
-	.2byte	0x2b6
-	.4byte	0x74
-	.4byte	.LLST351
-	.uleb128 0x5e
-	.4byte	.LASF1468
-	.byte	0x2
-	.2byte	0x2b7
-	.4byte	0x74
-	.4byte	.LLST352
-	.uleb128 0x44
-	.4byte	.LVL1021
-	.4byte	0xd8d7
-	.4byte	0xd7a2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1022
-	.4byte	0xa968
-	.4byte	0xd7b5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1023
-	.4byte	0xe40e
-	.4byte	0xd7cb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x1
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1024
-	.4byte	0xdd4c
-	.4byte	0xd7f5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1027
-	.4byte	0xd8d7
-	.uleb128 0x48
-	.4byte	.LVL1028
-	.4byte	0xa968
-	.uleb128 0x44
-	.4byte	.LVL1031
-	.4byte	0x103ff
-	.4byte	0xd82b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC10
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1035
-	.4byte	0xaa04
-	.4byte	0xd83f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1036
-	.4byte	0xdd4c
-	.4byte	0xd869
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x94
-	.byte	0x1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1044
-	.4byte	0x103ff
-	.4byte	0xd886
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC11
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1045
-	.4byte	0xaa04
-	.4byte	0xd89a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1046
-	.4byte	0x103ff
-	.4byte	0xd8bf
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC12
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1047
-	.4byte	0xaa04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x24
-	.byte	0x9
-	.byte	0xfc
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1539
-	.byte	0x2
-	.2byte	0x25d
-	.4byte	0x74
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xd968
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x25d
-	.4byte	0x74
-	.4byte	.LLST110
-	.uleb128 0x5e
-	.4byte	.LASF22
-	.byte	0x2
-	.2byte	0x25f
-	.4byte	0x3a
-	.4byte	.LLST111
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x260
-	.4byte	0x15bc
-	.uleb128 0x5e
-	.4byte	.LASF1540
-	.byte	0x2
-	.2byte	0x261
-	.4byte	0x3a
-	.4byte	.LLST112
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB217
-	.4byte	.Ldebug_ranges0+0x130
-	.byte	0x2
-	.2byte	0x264
-	.4byte	0xd958
-	.uleb128 0x8b
-	.4byte	0xaa39
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x130
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL224
-	.4byte	0xa835
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1541
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x74
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xda49
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x3a
-	.4byte	.LLST106
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x74
-	.4byte	.LLST107
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x74
-	.4byte	.LLST108
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x74
-	.4byte	.LLST109
-	.uleb128 0x44
-	.4byte	.LVL209
-	.4byte	0xa835
-	.4byte	0xd9d6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL210
-	.4byte	0xa925
-	.4byte	0xd9ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL211
-	.4byte	0xe067
-	.4byte	0xda0a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL212
-	.4byte	0xa835
-	.4byte	0xda1e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL213
-	.4byte	0xde59
-	.4byte	0xda38
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL216
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1542
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x74
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdb8a
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x3a
-	.4byte	.LLST405
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x74
-	.4byte	.LLST406
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x8b6
-	.4byte	.LLST407
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x8b6
-	.4byte	.LLST408
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x235
-	.4byte	0x74
-	.4byte	.LLST409
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0x236
-	.4byte	0x74
-	.4byte	.LLST410
-	.uleb128 0x44
-	.4byte	.LVL1230
-	.4byte	0xa835
-	.4byte	0xdad7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1231
-	.4byte	0xa925
-	.4byte	0xdaeb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1232
-	.4byte	0xe0ed
-	.4byte	0xdb05
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1233
-	.4byte	0xa045
-	.4byte	0xdb31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1234
-	.4byte	0xdf6d
-	.4byte	0xdb4b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1235
-	.4byte	0xa835
-	.4byte	0xdb5f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1236
-	.4byte	0xde59
-	.4byte	0xdb79
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1239
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1543
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x74
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdd4c
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x3a
-	.4byte	.LLST353
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x74
-	.4byte	.LLST354
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x8b6
-	.4byte	.LLST355
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x205
-	.4byte	0x8b6
-	.4byte	.LLST356
-	.uleb128 0x5e
-	.4byte	.LASF15
-	.byte	0x2
-	.2byte	0x207
-	.4byte	0x74
-	.4byte	.LLST357
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x278
-	.4byte	0xdc30
-	.uleb128 0x5e
-	.4byte	.LASF1463
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x3a
-	.4byte	.LLST359
-	.uleb128 0x45
-	.4byte	.LVL1068
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x260
-	.4byte	0xdc8c
-	.uleb128 0x5e
-	.4byte	.LASF1468
-	.byte	0x2
-	.2byte	0x212
-	.4byte	0x74
-	.4byte	.LLST358
-	.uleb128 0x44
-	.4byte	.LVL1062
-	.4byte	0xd687
-	.4byte	0xdc75
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1065
-	.4byte	0xaa04
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x24
-	.byte	0x9
-	.byte	0xfc
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1058
-	.4byte	0xdd4c
-	.4byte	0xdcb2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x88
-	.4byte	.LVL1070
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.4byte	0xdcd8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1073
-	.4byte	0x103ff
-	.4byte	0xdd01
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC13
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1074
-	.4byte	0xe19b
-	.4byte	0xdd15
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x88
-	.4byte	.LVL1076
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.4byte	0xdd3b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1079
-	.4byte	0xe175
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1544
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x74
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xde59
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x3a
-	.4byte	.LLST332
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x74
-	.4byte	.LLST333
-	.uleb128 0x5c
-	.4byte	.LASF17
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x8b6
-	.4byte	.LLST334
-	.uleb128 0x5c
-	.4byte	.LASF18
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0x8b6
-	.4byte	.LLST335
-	.uleb128 0x5e
-	.4byte	.LASF1545
-	.byte	0x2
-	.2byte	0x1ed
-	.4byte	0x74
-	.4byte	.LLST336
-	.uleb128 0x5e
-	.4byte	.LASF58
-	.byte	0x2
-	.2byte	0x1ee
-	.4byte	0x74
-	.4byte	.LLST337
-	.uleb128 0x44
-	.4byte	.LVL1006
-	.4byte	0xa835
-	.4byte	0xddda
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1007
-	.4byte	0xa925
-	.4byte	0xddee
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1008
-	.4byte	0xe2e2
-	.4byte	0xde08
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1009
-	.4byte	0xa835
-	.4byte	0xde1c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1010
-	.4byte	0xa045
-	.4byte	0xde48
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1013
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5b
-	.4byte	.LASF1546
-	.byte	0x2
-	.2byte	0x1df
-	.4byte	0x74
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdefd
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1df
-	.4byte	0x3a
-	.4byte	.LLST39
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1df
-	.4byte	0x74
-	.4byte	.LLST40
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1e1
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB172
-	.4byte	.Ldebug_ranges0+0x38
-	.byte	0x2
-	.2byte	0x1e3
-	.4byte	0xded1
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST41
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x38
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST42
-	.byte	0
-	.byte	0
-	.uleb128 0x8a
-	.4byte	0xa8c4
-	.4byte	.LBB175
-	.4byte	.Ldebug_ranges0+0x50
-	.byte	0x2
-	.2byte	0x1e5
-	.uleb128 0x4f
-	.4byte	0xa8d5
-	.4byte	.LLST43
-	.uleb128 0x45
-	.4byte	.LVL69
-	.4byte	0x1046f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1547
-	.byte	0x2
-	.2byte	0x1d7
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdf6d
-	.uleb128 0x70
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1d7
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1d7
-	.4byte	0x74
-	.4byte	.LLST36
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1d9
-	.4byte	0x15bc
-	.uleb128 0x8a
-	.4byte	0xaa29
-	.4byte	.LBB166
-	.4byte	.Ldebug_ranges0+0x18
-	.byte	0x2
-	.2byte	0x1db
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST37
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x18
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST38
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1548
-	.byte	0x2
-	.2byte	0x1cf
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xdfdf
-	.uleb128 0x70
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1cf
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1cf
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1d1
-	.4byte	0x15bc
-	.uleb128 0x82
-	.4byte	0xaa29
-	.4byte	.LBB164
-	.4byte	.LBE164-.LBB164
-	.byte	0x2
-	.2byte	0x1d3
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST34
-	.uleb128 0x7a
-	.4byte	.LBB165
-	.4byte	.LBE165-.LBB165
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST35
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1549
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe067
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0x3a
-	.4byte	.LLST31
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0x15bc
-	.uleb128 0x89
-	.4byte	0xaa29
-	.4byte	.LBB162
-	.4byte	.LBE162-.LBB162
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0xe056
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST32
-	.uleb128 0x7a
-	.4byte	.LBB163
-	.4byte	.LBE163-.LBB163
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST33
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL56
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1550
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe0ed
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x3a
-	.4byte	.LLST26
-	.uleb128 0x5c
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x74
-	.4byte	.LLST27
-	.uleb128 0x5c
-	.4byte	.LASF923
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x74
-	.4byte	.LLST28
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1b0
-	.4byte	0x15bc
-	.uleb128 0x82
-	.4byte	0xaa29
-	.4byte	.LBB160
-	.4byte	.LBE160-.LBB160
-	.byte	0x2
-	.2byte	0x1b2
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST29
-	.uleb128 0x7a
-	.4byte	.LBB161
-	.4byte	.LBE161-.LBB161
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST30
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1551
-	.byte	0x2
-	.2byte	0x1a0
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe175
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x1a0
-	.4byte	0x3a
-	.4byte	.LLST23
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x1a0
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x1a2
-	.4byte	0x15bc
-	.uleb128 0x89
-	.4byte	0xaa29
-	.4byte	.LBB158
-	.4byte	.LBE158-.LBB158
-	.byte	0x2
-	.2byte	0x1a4
-	.4byte	0xe164
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST24
-	.uleb128 0x7a
-	.4byte	.LBB159
-	.4byte	.LBE159-.LBB159
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST25
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL46
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1552
-	.byte	0x2
-	.2byte	0x197
-	.byte	0x1
-	.4byte	0xe19b
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x197
-	.4byte	0x3a
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x199
-	.4byte	0x15bc
-	.byte	0
-	.uleb128 0x6e
-	.4byte	.LASF1553
-	.byte	0x2
-	.2byte	0x18e
-	.byte	0x1
-	.4byte	0xe1c1
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x18e
-	.4byte	0x3a
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x190
-	.4byte	0x15bc
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1554
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe266
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	0x3a
-	.4byte	.LLST129
-	.uleb128 0x5c
-	.4byte	.LASF1555
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	0x74
-	.4byte	.LLST130
-	.uleb128 0x5c
-	.4byte	.LASF1556
-	.byte	0x2
-	.2byte	0x16b
-	.4byte	0x74
-	.4byte	.LLST131
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x16d
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB223
-	.4byte	.Ldebug_ranges0+0x148
-	.byte	0x2
-	.2byte	0x16e
-	.4byte	0xe241
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST132
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x148
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL286
-	.4byte	0xa835
-	.4byte	0xe255
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL289
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1557
-	.byte	0x2
-	.2byte	0x14f
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe2e2
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x14f
-	.4byte	0x3a
-	.4byte	.LLST14
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x14f
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x151
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB138
-	.4byte	.Ldebug_ranges0+0
-	.byte	0x2
-	.2byte	0x153
-	.4byte	0xe2d8
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST15
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST16
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LVL32
-	.4byte	0xe4a7
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1558
-	.byte	0x2
-	.2byte	0x141
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe36a
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x141
-	.4byte	0x3a
-	.4byte	.LLST11
-	.uleb128 0x70
-	.4byte	.LASF16
-	.byte	0x2
-	.2byte	0x141
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x143
-	.4byte	0x15bc
-	.uleb128 0x89
-	.4byte	0xaa29
-	.4byte	.LBB136
-	.4byte	.LBE136-.LBB136
-	.byte	0x2
-	.2byte	0x144
-	.4byte	0xe359
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST12
-	.uleb128 0x7a
-	.4byte	.LBB137
-	.4byte	.LBE137-.LBB137
-	.uleb128 0x74
-	.4byte	0xaa44
-	.uleb128 0x73
-	.4byte	0xaa4f
-	.4byte	.LLST13
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL28
-	.4byte	0xe4a7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1559
-	.byte	0x2
-	.2byte	0x133
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe3a1
-	.uleb128 0x5c
-	.4byte	.LASF1560
-	.byte	0x2
-	.2byte	0x133
-	.4byte	0x74
-	.4byte	.LLST136
-	.uleb128 0x4d
-	.4byte	.LVL303
-	.4byte	0xa7dc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1561
-	.byte	0x2
-	.2byte	0x12d
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe3cf
-	.uleb128 0x70
-	.4byte	.LASF1424
-	.byte	0x2
-	.2byte	0x12d
-	.4byte	0x3a
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x49
-	.4byte	.LVL317
-	.4byte	0xa797
-	.byte	0
-	.uleb128 0x8d
-	.4byte	.LASF1563
-	.byte	0x2
-	.2byte	0x115
-	.byte	0x1
-	.4byte	0xe40e
-	.uleb128 0x55
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x115
-	.4byte	0x3a
-	.uleb128 0x66
-	.ascii	"buf\000"
-	.byte	0x2
-	.2byte	0x115
-	.4byte	0x8b6
-	.uleb128 0x57
-	.ascii	"ptr\000"
-	.byte	0x2
-	.2byte	0x117
-	.4byte	0x8b6
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x118
-	.4byte	0x15bc
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1564
-	.byte	0x2
-	.2byte	0x10a
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe4a7
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x10a
-	.4byte	0x3a
-	.4byte	.LLST104
-	.uleb128 0x56
-	.4byte	.LASF273
-	.byte	0x2
-	.2byte	0x10c
-	.4byte	0x15bc
-	.uleb128 0x72
-	.4byte	0xaa29
-	.4byte	.LBB213
-	.4byte	.Ldebug_ranges0+0x118
-	.byte	0x2
-	.2byte	0x10e
-	.4byte	0xe46e
-	.uleb128 0x4f
-	.4byte	0xaa39
-	.4byte	.LLST105
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x118
-	.uleb128 0x74
-	.4byte	0xe76b
-	.uleb128 0x74
-	.4byte	0xe774
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL205
-	.4byte	0xa925
-	.4byte	0xe482
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL206
-	.4byte	0xa835
-	.4byte	0xe496
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL207
-	.4byte	0xa8e2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF1565
-	.byte	0x2
-	.2byte	0x100
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe53d
-	.uleb128 0x5c
-	.4byte	.LASF1392
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0x3a
-	.4byte	.LLST6
-	.uleb128 0x70
-	.4byte	.LASF1566
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5e
-	.4byte	.LASF1428
-	.byte	0x2
-	.2byte	0x102
-	.4byte	0x74
-	.4byte	.LLST7
-	.uleb128 0x89
-	.4byte	0xa801
-	.4byte	.LBB134
-	.4byte	.LBE134-.LBB134
-	.byte	0x2
-	.2byte	0x107
-	.4byte	0xe526
-	.uleb128 0x4f
-	.4byte	0xa81a
-	.4byte	.LLST8
-	.uleb128 0x4f
-	.4byte	0xa80e
-	.4byte	.LLST9
-	.uleb128 0x7a
-	.4byte	.LBB135
-	.4byte	.LBE135-.LBB135
-	.uleb128 0x73
-	.4byte	0xa827
-	.4byte	.LLST10
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL20
-	.4byte	0xe592
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1567
-	.byte	0x2
-	.byte	0xf6
-	.4byte	0x74
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe592
-	.uleb128 0x40
-	.4byte	.LASF1392
-	.byte	0x2
-	.byte	0xf6
-	.4byte	0x3a
-	.4byte	.LLST4
-	.uleb128 0x52
-	.4byte	.LASF1566
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-	.byte	0xf6
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x61
-	.4byte	.LASF1428
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-	.byte	0xf8
-	.4byte	0x74
-	.4byte	.LLST5
-	.uleb128 0x45
-	.4byte	.LVL15
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-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4b
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-	.byte	0x2
-	.byte	0xee
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-	.4byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe5c8
-	.uleb128 0x40
-	.4byte	.LASF1392
-	.byte	0x2
-	.byte	0xee
-	.4byte	0x3a
-	.4byte	.LLST3
-	.uleb128 0x52
-	.4byte	.LASF1566
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-	.byte	0xee
-	.4byte	0x74
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0
-	.uleb128 0x4b
-	.4byte	.LASF1569
-	.byte	0x2
-	.byte	0xcc
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-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe618
-	.uleb128 0x40
-	.4byte	.LASF1100
-	.byte	0x2
-	.byte	0xcc
-	.4byte	0x8b6
-	.4byte	.LLST1
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-	.4byte	.LASF1101
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-	.byte	0xcc
-	.4byte	0x8b6
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x65
-	.ascii	"len\000"
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-	.byte	0xcc
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x41
-	.ascii	"i\000"
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-	.byte	0xce
-	.4byte	0x74
-	.4byte	.LLST2
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x7349
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-	.4byte	.LFE507-.LFB507
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe643
-	.uleb128 0x4f
-	.4byte	0x7356
-	.4byte	.LLST0
-	.uleb128 0x8f
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-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x7362
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0xe19b
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-	.4byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xe6ba
-	.uleb128 0x8f
-	.4byte	0xe1a8
-	.uleb128 0x1
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-	.uleb128 0x74
-	.4byte	0xe1b4
-	.uleb128 0x7a
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-	.4byte	.LBE146-.LBB146
-	.uleb128 0x4f
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-	.4byte	.LLST17
-	.uleb128 0x7a
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-	.4byte	.LBE147-.LBB147
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-	.uleb128 0x82
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-	.4byte	.LBE148-.LBB148
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-	.uleb128 0x4f
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-	.uleb128 0x7a
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-	.uleb128 0x73
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-	.byte	0
-	.byte	0
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-	.uleb128 0x8e
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-	.4byte	.LFE215-.LFB215
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-	.uleb128 0x8f
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-	.uleb128 0x1
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-	.uleb128 0x74
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-	.uleb128 0x7a
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-	.uleb128 0x4f
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-	.uleb128 0x7a
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-	.uleb128 0x82
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-	.uleb128 0x4f
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-	.uleb128 0x73
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-	.4byte	.LFE268-.LFB268
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-	.uleb128 0x8f
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-	.uleb128 0x1
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-	.4byte	0xedba
-	.uleb128 0x4f
-	.4byte	0x5f9a
-	.4byte	.LLST258
-	.uleb128 0x7a
-	.4byte	.LBB291
-	.4byte	.LBE291-.LBB291
-	.uleb128 0x4f
-	.4byte	0x5f9a
-	.4byte	.LLST259
-	.uleb128 0x48
-	.4byte	.LVL691
-	.4byte	0x8565
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x54a7
-	.4byte	.LFB405
-	.4byte	.LFE405-.LFB405
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xede1
-	.uleb128 0x48
-	.4byte	.LVL741
-	.4byte	0x8958
-	.uleb128 0x48
-	.4byte	.LVL742
-	.4byte	0x5521
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0xd651
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xeec1
-	.uleb128 0x4f
-	.4byte	0xd662
-	.4byte	.LLST360
-	.uleb128 0x4f
-	.4byte	0xd66e
-	.4byte	.LLST361
-	.uleb128 0x73
-	.4byte	0xd67a
-	.4byte	.LLST362
-	.uleb128 0x6f
-	.4byte	.LBB313
-	.4byte	.LBE313-.LBB313
-	.4byte	0xee61
-	.uleb128 0x4f
-	.4byte	0xd662
-	.4byte	.LLST363
-	.uleb128 0x4f
-	.4byte	0xd66e
-	.4byte	.LLST364
-	.uleb128 0x7a
-	.4byte	.LBB314
-	.4byte	.LBE314-.LBB314
-	.uleb128 0x74
-	.4byte	0xee07
-	.uleb128 0x44
-	.4byte	.LVL1092
-	.4byte	0xd8d7
-	.4byte	0xee50
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1093
-	.4byte	0xa968
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1084
-	.4byte	0xd8d7
-	.uleb128 0x48
-	.4byte	.LVL1085
-	.4byte	0xa968
-	.uleb128 0x44
-	.4byte	.LVL1086
-	.4byte	0xd687
-	.4byte	0xeea0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1089
-	.4byte	0xdd4c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x51d3
-	.4byte	.LFB484
-	.4byte	.LFE484-.LFB484
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xeedf
-	.uleb128 0x4f
-	.4byte	0x51e3
-	.4byte	.LLST422
-	.byte	0
-	.uleb128 0x92
-	.4byte	0x4f61
-	.4byte	.LFB491
-	.4byte	.LFE491-.LFB491
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x8e
-	.4byte	0x4edc
-	.4byte	.LFB493
-	.4byte	.LFE493-.LFB493
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xef0d
-	.uleb128 0x49
-	.4byte	.LVL1406
-	.4byte	0xbed1
-	.byte	0
-	.uleb128 0x92
-	.4byte	0x4e77
-	.4byte	.LFB495
-	.4byte	.LFE495-.LFB495
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x8e
-	.4byte	0xced6
-	.4byte	.LFB237
-	.4byte	.LFE237-.LFB237
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xef72
-	.uleb128 0x4f
-	.4byte	0xcee3
-	.4byte	.LLST472
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x3d0
-	.4byte	0xef60
-	.uleb128 0x4f
-	.4byte	0xcee3
-	.4byte	.LLST473
-	.uleb128 0x4d
-	.4byte	.LVL1551
-	.4byte	0x52a5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR20+4
-	.byte	0
-	.byte	0
-	.uleb128 0x4d
-	.4byte	.LVL1548
-	.4byte	0xcef0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0xd1ee
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf079
-	.uleb128 0x4f
-	.4byte	0xd1ff
-	.4byte	.LLST526
-	.uleb128 0x91
-	.4byte	0xd20b
-	.byte	0
-	.uleb128 0x74
-	.4byte	0xd217
-	.uleb128 0x74
-	.4byte	0xd223
-	.uleb128 0x7a
-	.4byte	.LBB422
-	.4byte	.LBE422-.LBB422
-	.uleb128 0x4f
-	.4byte	0xd1ff
-	.4byte	.LLST527
-	.uleb128 0x7a
-	.4byte	.LBB423
-	.4byte	.LBE423-.LBB423
-	.uleb128 0x74
-	.4byte	0xef8f
-	.uleb128 0x90
-	.4byte	0xef96
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x90
-	.4byte	0xef9b
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x94
-	.4byte	0xd22f
-	.4byte	.LDL1
-	.uleb128 0x44
-	.4byte	.LVL1808
-	.4byte	0x530b
-	.4byte	0xefff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa5
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1809
-	.4byte	0x530b
-	.4byte	0xf018
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x5a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1810
-	.4byte	0xac82
-	.4byte	0xf037
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1811
-	.4byte	0xae0d
-	.4byte	0xf05b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1813
-	.4byte	0xac82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x8c64
-	.4byte	.LFB320
-	.4byte	.LFE320-.LFB320
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf1bd
-	.uleb128 0x74
-	.4byte	0x8c74
-	.uleb128 0x91
-	.4byte	0x8c7d
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x8c88
-	.uleb128 0x91
-	.4byte	0x8c93
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x8ca5
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x4c8
-	.uleb128 0x73
-	.4byte	0xf08d
-	.4byte	.LLST539
-	.uleb128 0x74
-	.4byte	0xf092
-	.uleb128 0x73
-	.4byte	0xf099
-	.4byte	.LLST540
-	.uleb128 0x74
-	.4byte	0xf09e
-	.uleb128 0x95
-	.4byte	0x8c9e
-	.uleb128 0x74
-	.4byte	0xf0a5
-	.uleb128 0x44
-	.4byte	.LVL1876
-	.4byte	0x530b
-	.4byte	0xf0ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1879
-	.4byte	0x530b
-	.4byte	0xf109
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1881
-	.4byte	0x103ff
-	.4byte	0xf120
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1882
-	.4byte	0xae0d
-	.4byte	0xf143
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1883
-	.4byte	0xac82
-	.4byte	0xf15b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1884
-	.4byte	0xae0d
-	.4byte	0xf17e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1886
-	.4byte	0x103ff
-	.4byte	0xf195
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC32
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1887
-	.4byte	0x103ff
-	.4byte	0xf1b2
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC33
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1891
-	.4byte	0x52a5
-	.byte	0
-	.byte	0
-	.uleb128 0x96
-	.4byte	0x5ef1
-	.4byte	.LFB386
-	.4byte	.LFE386-.LFB386
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf51b
-	.uleb128 0x4f
-	.4byte	0x5f02
-	.4byte	.LLST541
-	.uleb128 0x74
-	.4byte	0x5f0c
-	.uleb128 0x74
-	.4byte	0x5f18
-	.uleb128 0x74
-	.4byte	0x5f24
-	.uleb128 0x74
-	.4byte	0x5f30
-	.uleb128 0x74
-	.4byte	0x5f3a
-	.uleb128 0x74
-	.4byte	0x5f46
-	.uleb128 0x91
-	.4byte	0x5f52
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x5f66
-	.uleb128 0x7a
-	.4byte	.LBB434
-	.4byte	.LBE434-.LBB434
-	.uleb128 0x8b
-	.4byte	0x5f02
-	.uleb128 0x7a
-	.4byte	.LBB435
-	.4byte	.LBE435-.LBB435
-	.uleb128 0x73
-	.4byte	0xf1da
-	.4byte	.LLST542
-	.uleb128 0x74
-	.4byte	0xf1df
-	.uleb128 0x73
-	.4byte	0xf1e4
-	.4byte	.LLST543
-	.uleb128 0x73
-	.4byte	0xf1e9
-	.4byte	.LLST544
-	.uleb128 0x74
-	.4byte	0xf1ee
-	.uleb128 0x73
-	.4byte	0xf1f3
-	.4byte	.LLST545
-	.uleb128 0x74
-	.4byte	0xf1f8
-	.uleb128 0x95
-	.4byte	0x5f5e
-	.uleb128 0x74
-	.4byte	0xf1ff
-	.uleb128 0x72
-	.4byte	0x7349
-	.4byte	.LBB436
-	.4byte	.Ldebug_ranges0+0x4e0
-	.byte	0x1
-	.2byte	0xb6e
-	.4byte	0xf299
-	.uleb128 0x4f
-	.4byte	0x7362
-	.4byte	.LLST546
-	.uleb128 0x4f
-	.4byte	0x7356
-	.4byte	.LLST547
-	.uleb128 0x45
-	.4byte	.LVL1934
-	.4byte	0xe618
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x93
-	.4byte	0x7362
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1896
-	.4byte	0x103ff
-	.4byte	0xf2c0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb2d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1897
-	.4byte	0x103ff
-	.4byte	0xf2e0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1905
-	.4byte	0x82fb
-	.4byte	0xf2f7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR87
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1907
-	.4byte	0x103ff
-	.4byte	0xf31e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb41
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1908
-	.4byte	0x103ff
-	.4byte	0xf33e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1909
-	.4byte	0x64a2
-	.4byte	0xf352
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1910
-	.4byte	0x103ff
-	.4byte	0xf379
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb4d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1911
-	.4byte	0x103ff
-	.4byte	0xf399
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1914
-	.4byte	0x103ff
-	.4byte	0xf3c0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb50
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1915
-	.4byte	0x103ff
-	.4byte	0xf3e0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1917
-	.4byte	0x103ff
-	.4byte	0xf407
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb5c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1918
-	.4byte	0x103ff
-	.4byte	0xf427
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1919
-	.4byte	0x103ff
-	.4byte	0xf44e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb63
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1920
-	.4byte	0x103ff
-	.4byte	0xf46e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1921
-	.4byte	0x7349
-	.4byte	0xf487
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1925
-	.4byte	0xac82
-	.4byte	0xf49b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1926
-	.4byte	0xac82
-	.4byte	0xf4af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1928
-	.4byte	0x602b
-	.4byte	0xf4c3
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1929
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL1938
-	.4byte	0x8dc2
-	.uleb128 0x44
-	.4byte	.LVL1942
-	.4byte	0x103ff
-	.4byte	0xf4fc
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR200
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xb9e
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1943
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x545d
-	.4byte	.LFB406
-	.4byte	.LFE406-.LFB406
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf5bb
-	.uleb128 0x4f
-	.4byte	0x546e
-	.4byte	.LLST548
-	.uleb128 0x74
-	.4byte	0x547a
-	.uleb128 0x74
-	.4byte	0x5486
-	.uleb128 0x74
-	.4byte	0x5490
-	.uleb128 0x74
-	.4byte	0x549a
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x4f8
-	.uleb128 0x8b
-	.4byte	0x546e
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x4f8
-	.uleb128 0x73
-	.4byte	0xf538
-	.4byte	.LLST549
-	.uleb128 0x73
-	.4byte	0xf53d
-	.4byte	.LLST550
-	.uleb128 0x73
-	.4byte	0xf542
-	.4byte	.LLST551
-	.uleb128 0x74
-	.4byte	0xf547
-	.uleb128 0x48
-	.4byte	.LVL1947
-	.4byte	0x54a7
-	.uleb128 0x44
-	.4byte	.LVL1949
-	.4byte	0x89c8
-	.4byte	0xf599
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1955
-	.4byte	0x8dc2
-	.4byte	0xf5af
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1956
-	.4byte	0x8c64
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5c12
-	.4byte	.LFB389
-	.4byte	.LFE389-.LFB389
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf6dc
-	.uleb128 0x4f
-	.4byte	0x5c23
-	.4byte	.LLST552
-	.uleb128 0x74
-	.4byte	0x5c2f
-	.uleb128 0x6f
-	.4byte	.LBB450
-	.4byte	.LBE450-.LBB450
-	.4byte	0xf6d2
-	.uleb128 0x4f
-	.4byte	0x5c23
-	.4byte	.LLST553
-	.uleb128 0x7a
-	.4byte	.LBB451
-	.4byte	.LBE451-.LBB451
-	.uleb128 0x74
-	.4byte	0xf5d8
-	.uleb128 0x44
-	.4byte	.LVL1966
-	.4byte	0x838c
-	.4byte	0xf61e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR82
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1967
-	.4byte	0x103ff
-	.4byte	0xf645
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR203
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xc0d
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1968
-	.4byte	0x103ff
-	.4byte	0xf665
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1969
-	.4byte	0x5f89
-	.4byte	0xf679
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1970
-	.4byte	0x545d
-	.4byte	0xf68d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1971
-	.4byte	0x103ff
-	.4byte	0xf6b4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR203
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xc10
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL1972
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL1976
-	.4byte	0x8231
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x65df
-	.4byte	.LFB373
-	.4byte	.LFE373-.LFB373
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf738
-	.uleb128 0x4f
-	.4byte	0x65ec
-	.4byte	.LLST556
-	.uleb128 0x74
-	.4byte	0x65f8
-	.uleb128 0x7a
-	.4byte	.LBB454
-	.4byte	.LBE454-.LBB454
-	.uleb128 0x4f
-	.4byte	0x65ec
-	.4byte	.LLST557
-	.uleb128 0x7a
-	.4byte	.LBB455
-	.4byte	.LBE455-.LBB455
-	.uleb128 0x73
-	.4byte	0xf6f9
-	.4byte	.LLST558
-	.uleb128 0x94
-	.4byte	0x6604
-	.4byte	.LDL2
-	.uleb128 0x48
-	.4byte	.LVL1993
-	.4byte	0x5b4d
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x75f4
-	.4byte	.LFB360
-	.4byte	.LFE360-.LFB360
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xf8c8
-	.uleb128 0x97
-	.4byte	0x7605
-	.sleb128 -1
-	.uleb128 0x74
-	.4byte	0x7611
-	.uleb128 0x91
-	.4byte	0x761d
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x7631
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x518
-	.uleb128 0x74
-	.4byte	0xf74c
-	.uleb128 0x73
-	.4byte	0xf753
-	.4byte	.LLST562
-	.uleb128 0x74
-	.4byte	0xf758
-	.uleb128 0x95
-	.4byte	0x7629
-	.uleb128 0x74
-	.4byte	0xf75f
-	.uleb128 0x6f
-	.4byte	.LBB461
-	.4byte	.LBE461-.LBB461
-	.4byte	0xf7a7
-	.uleb128 0x73
-	.4byte	0x763f
-	.4byte	.LLST563
-	.uleb128 0x48
-	.4byte	.LVL2024
-	.4byte	0x52a5
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2018
-	.4byte	0x530b
-	.4byte	0xf7bb
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2019
-	.4byte	0x52a5
-	.4byte	0xf7d8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR80
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2020
-	.4byte	0x52a5
-	.uleb128 0x48
-	.4byte	.LVL2021
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL2025
-	.4byte	0x7735
-	.4byte	0xf7fe
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2027
-	.4byte	0xae0d
-	.4byte	0xf821
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2029
-	.4byte	0x858a
-	.uleb128 0x44
-	.4byte	.LVL2030
-	.4byte	0xae0d
-	.4byte	0xf84d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2031
-	.4byte	0x103ff
-	.4byte	0xf874
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR207
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4bd
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2032
-	.4byte	0x103ff
-	.4byte	0xf894
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2035
-	.4byte	0x103ff
-	.4byte	0xf8b1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC35
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2038
-	.4byte	0x8737
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x7d61
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfa5b
-	.uleb128 0x4f
-	.4byte	0x7d72
-	.4byte	.LLST592
-	.uleb128 0x4f
-	.4byte	0x7d7e
-	.4byte	.LLST593
-	.uleb128 0x4f
-	.4byte	0x7d8a
-	.4byte	.LLST594
-	.uleb128 0x74
-	.4byte	0x7d96
-	.uleb128 0x74
-	.4byte	0x7da2
-	.uleb128 0x91
-	.4byte	0x7dae
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x7dc2
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x530
-	.uleb128 0x8b
-	.4byte	0x7d8a
-	.uleb128 0x8b
-	.4byte	0x7d7e
-	.uleb128 0x8b
-	.4byte	0x7d72
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x530
-	.uleb128 0x73
-	.4byte	0xf8f7
-	.4byte	.LLST595
-	.uleb128 0x73
-	.4byte	0xf8fc
-	.4byte	.LLST596
-	.uleb128 0x74
-	.4byte	0xf901
-	.uleb128 0x95
-	.4byte	0x7dba
-	.uleb128 0x74
-	.4byte	0xf908
-	.uleb128 0x44
-	.4byte	.LVL2163
-	.4byte	0x7dd0
-	.4byte	0xf95f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2164
-	.4byte	0x103ff
-	.4byte	0xf986
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR211
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2fc
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2165
-	.4byte	0x103ff
-	.4byte	0xf9a6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2166
-	.4byte	0x103ff
-	.4byte	0xf9cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR211
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2fd
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2167
-	.4byte	0x103ff
-	.4byte	0xf9ed
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2169
-	.4byte	0x530b
-	.4byte	0xfa05
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2172
-	.4byte	0xae0d
-	.4byte	0xfa28
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2174
-	.4byte	0x103ff
-	.4byte	0xfa3f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC38
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2175
-	.4byte	0x103ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC39
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x6367
-	.4byte	.LFB377
-	.4byte	.LFE377-.LFB377
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfa8d
-	.uleb128 0x4d
-	.4byte	.LVL2263
-	.4byte	0x78f1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR135
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x98a8
-	.4byte	.LFB303
-	.4byte	.LFE303-.LFB303
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfad0
-	.uleb128 0x48
-	.4byte	.LVL2338
-	.4byte	0x93da
-	.uleb128 0x48
-	.4byte	.LVL2339
-	.4byte	0x7c46
-	.uleb128 0x44
-	.4byte	.LVL2340
-	.4byte	0x7759
-	.4byte	0xfac6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2341
-	.4byte	0x75f4
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x736f
-	.4byte	.LFB362
-	.4byte	.LFE362-.LFB362
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfb28
-	.uleb128 0x44
-	.4byte	.LVL2368
-	.4byte	0x77b1
-	.4byte	0xfaf8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2369
-	.4byte	0x103ff
-	.4byte	0xfb18
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC43
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2370
-	.4byte	0x530b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5569
-	.4byte	.LFB401
-	.4byte	.LFE401-.LFB401
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfbc8
-	.uleb128 0x91
-	.4byte	0x557a
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x5584
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x5f0
-	.4byte	0xfbb1
-	.uleb128 0x74
-	.4byte	0xfb3c
-	.uleb128 0x73
-	.4byte	0xfb43
-	.4byte	.LLST723
-	.uleb128 0x44
-	.4byte	.LVL2793
-	.4byte	0x5ade
-	.4byte	0xfb79
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2794
-	.4byte	0x57df
-	.4byte	0xfb8c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2796
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL2797
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL2798
-	.4byte	0x5798
-	.uleb128 0x48
-	.4byte	.LVL2800
-	.4byte	0x59e7
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2792
-	.4byte	0xae0d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5616
-	.4byte	.LFB399
-	.4byte	.LFE399-.LFB399
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfc17
-	.uleb128 0x44
-	.4byte	.LVL2801
-	.4byte	0x561f
-	.4byte	0xfbf0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2802
-	.4byte	0x7653
-	.4byte	0xfc07
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL2803
-	.4byte	0x57df
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x60a3
-	.4byte	.LFB381
-	.4byte	.LFE381-.LFB381
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xfd33
-	.uleb128 0x91
-	.4byte	0x60b4
-	.byte	0
-	.uleb128 0x6f
-	.4byte	.LBB524
-	.4byte	.LBE524-.LBB524
-	.4byte	0xfcc9
-	.uleb128 0x74
-	.4byte	0xfc2b
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x610
-	.4byte	0xfc57
-	.uleb128 0x73
-	.4byte	0x60bf
-	.4byte	.LLST724
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2823
-	.4byte	0x60cd
-	.4byte	0xfc6b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2824
-	.4byte	0x60cd
-	.4byte	0xfc7f
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2826
-	.4byte	0x7653
-	.4byte	0xfc96
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR124
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2827
-	.4byte	0x7653
-	.4byte	0xfcad
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR215
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2828
-	.4byte	0x7c46
-	.uleb128 0x48
-	.4byte	.LVL2829
-	.4byte	0x75f4
-	.uleb128 0x48
-	.4byte	.LVL2830
-	.4byte	0x75f4
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2810
-	.4byte	0x87ee
-	.uleb128 0x48
-	.4byte	.LVL2811
-	.4byte	0x737c
-	.uleb128 0x48
-	.4byte	.LVL2812
-	.4byte	0x7111
-	.uleb128 0x48
-	.4byte	.LVL2813
-	.4byte	0x6e14
-	.uleb128 0x48
-	.4byte	.LVL2814
-	.4byte	0x6e95
-	.uleb128 0x48
-	.4byte	.LVL2815
-	.4byte	0x62f6
-	.uleb128 0x48
-	.4byte	.LVL2816
-	.4byte	0x736f
-	.uleb128 0x48
-	.4byte	.LVL2817
-	.4byte	0x86e8
-	.uleb128 0x48
-	.4byte	.LVL2818
-	.4byte	0x6370
-	.uleb128 0x48
-	.4byte	.LVL2819
-	.4byte	0x6558
-	.uleb128 0x45
-	.4byte	.LVL2820
-	.4byte	0x7735
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8e
-	.4byte	0x5383
-	.4byte	.LFB407
-	.4byte	.LFE407-.LFB407
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x1004a
-	.uleb128 0x4f
-	.4byte	0x5394
-	.4byte	.LLST725
-	.uleb128 0x4f
-	.4byte	0x53a0
-	.4byte	.LLST726
-	.uleb128 0x91
-	.4byte	0x53ac
-	.byte	0x1
-	.uleb128 0x74
-	.4byte	0x53b8
-	.uleb128 0x74
-	.4byte	0x53c4
-	.uleb128 0x97
-	.4byte	0x53d0
-	.sleb128 -1
-	.uleb128 0x74
-	.4byte	0x53dc
-	.uleb128 0x74
-	.4byte	0x53e8
-	.uleb128 0x74
-	.4byte	0x53f4
-	.uleb128 0x74
-	.4byte	0x5400
-	.uleb128 0x74
-	.4byte	0x540c
-	.uleb128 0x74
-	.4byte	0x5418
-	.uleb128 0x74
-	.4byte	0x5434
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x628
-	.uleb128 0x4f
-	.4byte	0x53a0
-	.4byte	.LLST727
-	.uleb128 0x4f
-	.4byte	0x5394
-	.4byte	.LLST728
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x628
-	.uleb128 0x74
-	.4byte	0xfd59
-	.uleb128 0x73
-	.4byte	0xfd60
-	.4byte	.LLST729
-	.uleb128 0x90
-	.4byte	0xfd65
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x74
-	.4byte	0xfd6a
-	.uleb128 0x73
-	.4byte	0xfd71
-	.4byte	.LLST730
-	.uleb128 0x73
-	.4byte	0xfd76
-	.4byte	.LLST731
-	.uleb128 0x73
-	.4byte	0xfd7b
-	.4byte	.LLST732
-	.uleb128 0x73
-	.4byte	0xfd80
-	.4byte	.LLST733
-	.uleb128 0x73
-	.4byte	0xfd85
-	.4byte	.LLST734
-	.uleb128 0x73
-	.4byte	0xfd8a
-	.4byte	.LLST735
-	.uleb128 0x95
-	.4byte	0x5424
-	.uleb128 0x95
-	.4byte	0x542c
-	.uleb128 0x74
-	.4byte	0xfd8f
-	.uleb128 0x48
-	.4byte	.LVL2849
-	.4byte	0x5a5c
-	.uleb128 0x48
-	.4byte	.LVL2850
-	.4byte	0x731e
-	.uleb128 0x44
-	.4byte	.LVL2851
-	.4byte	0x64a2
-	.4byte	0xfe39
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2852
-	.4byte	0x82b0
-	.4byte	0xfe4d
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2857
-	.4byte	0x5a5c
-	.4byte	0xfe61
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2858
-	.4byte	0x5b4d
-	.4byte	0xfe75
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2859
-	.4byte	0x731e
-	.4byte	0xfe89
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2860
-	.4byte	0x103ff
-	.4byte	0xfeb0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR238
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x343
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2861
-	.4byte	0x103ff
-	.4byte	0xfed0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2862
-	.4byte	0x103ff
-	.4byte	0xfef7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR238
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x344
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2863
-	.4byte	0x103ff
-	.4byte	0xff17
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2864
-	.4byte	0x103ff
-	.4byte	0xff3e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR238
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x345
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2865
-	.4byte	0x103ff
-	.4byte	0xff5e
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2866
-	.4byte	0x64a2
-	.4byte	0xff72
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.global	FtlWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWrite, %function
+FtlWrite:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r3
+	ldr	r3, .L3019
+	sub	sp, sp, #80
+	mov	r6, r1
+	str	r2, [sp, #12]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L3004
+	cmp	r0, #16
+	bne	.L2973
+	mov	r2, r10
+	ldr	r1, [sp, #12]
+	add	r0, r6, #256
+	bl	FtlVendorPartWrite
+.L2971:
+	add	sp, sp, #80
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2973:
+	ldr	r3, [sp, #12]
+	adds	r5, r1, r3
+	ldr	r3, .L3019+4
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bhi	.L3005
+	ldr	r3, .L3019+8
+	ldr	r0, [r3]
+	adds	r4, r0, #1
+	beq	.L2971
+	ldr	r3, .L3019+12
+	mov	r2, #2048
+	mov	r0, r6
+	str	r2, [r3]
+	ldr	r3, .L3019+16
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mov	r8, r0
+	subs	r0, r5, #1
+	bl	__aeabi_uidiv
+	ldr	r2, .L3019+20
+	sub	r5, r0, r8
+	adds	r3, r5, #1
+	adds	r1, r5, #1
+	str	r3, [sp, #4]
+	ldr	r3, [r2]
+	str	r0, [sp, #16]
+	add	r3, r3, r1
+	str	r3, [r2]
+	ldr	r3, .L3019+24
+	ldr	fp, [r3]
+	cmp	fp, #0
+	beq	.L2975
+	ldr	r3, [fp, #16]
+	cmp	r8, r3
+	beq	.L2976
+	bl	FtlCacheWriteBack
+.L2975:
+	ldr	r7, .L3019+28
+	mov	r4, r8
+.L2977:
+	ldr	r3, [sp, #4]
+	cbnz	r3, .L3003
+	ldr	r3, [sp, #16]
+	ldr	r0, [sp, #4]
+	sub	r1, r3, r8
+	bl	rk_ftl_garbage_collect
+.L3004:
+	movs	r0, #0
+	b	.L2971
+.L2976:
+	ldr	r2, .L3019+32
+	mov	r1, r4
+	mov	r0, r6
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	subs	r4, r4, r1
+	ldr	r0, [fp, #8]
+	mov	r3, r1
+	mov	r1, r10
+	cmp	r4, r2
+	it	cs
+	movcs	r4, r2
+	lsls	r7, r4, #9
+	add	r0, r0, r3, lsl #9
+	mov	r2, r7
+	bl	ftl_memcpy
+	cmp	r5, #0
+	beq	.L3004
+	ldr	r3, [sp, #12]
+	add	r6, r6, r4
+	add	r10, r10, r7
+	add	r8, r8, #1
+	subs	r3, r3, r4
+	str	r3, [sp, #12]
+	bl	FtlCacheWriteBack
+	str	r5, [sp, #4]
+	b	.L2975
+.L3003:
+	ldr	r5, .L3019+36
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bcc	.L2978
+	ldr	r1, .L3019+40
+	movw	r2, #1668
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L2978:
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L2979
+	bl	FtlCacheWriteBack
+	mov	r0, r7
+	bl	allocate_new_data_superblock
+.L2979:
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7, #4]
+	lsls	r3, r3, #2
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldr	r2, [sp, #4]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	str	r3, [sp, #36]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bcc	.L2980
+	ldr	r1, .L3019+40
+	movw	r2, #1701
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L2980:
+	movs	r3, #0
+.L3018:
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #36]
+	cmp	r3, r2
+	bne	.L3001
+.L2982:
+	ldr	r0, .L3019+56
+	mov	r3, r7
+	movs	r2, #0
+	ldr	r1, [sp, #8]
+	ldr	r0, [r0]
+	bl	FtlProgPages
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
+	bcs	.L3002
+	ldr	r1, .L3019+40
+	movw	r2, #1790
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L3002:
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	subs	r3, r3, r2
+	str	r3, [sp, #4]
+	b	.L2977
+.L3001:
+	ldrh	r3, [r7, #4]
+	cmp	r3, #0
+	beq	.L2982
+	movs	r2, #0
+	add	r1, sp, #40
+	mov	r0, r4
+	movs	r5, #36
+	bl	log2phys
+	mov	r0, r7
+	bl	get_new_active_ppa
+	ldr	r3, [sp, #8]
+	ldr	r2, .L3019+60
+	muls	r5, r3, r5
+	ldr	r3, .L3019+56
+	ldrh	r2, [r2]
+	ldr	r1, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #8]
+	add	r1, r1, r5
+	str	r0, [r1, #4]
+	str	r4, [r1, #16]
+	mul	r0, r2, r3
+	bic	r3, r0, #3
+	ldr	r0, .L3019+64
+	str	r3, [sp, #28]
+	ldr	r3, [r0]
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #32]
+	add	fp, r3, r0
+	str	fp, [r1, #12]
+	mov	r0, fp
+	movs	r1, #0
+	bl	ftl_memset
+	cmp	r4, r8
+	ldr	r1, .L3019+16
+	beq	.L2983
+	ldr	r3, [sp, #16]
+	cmp	r3, r4
+	ldr	r3, [sp, #20]
+	bne	.L3014
+	ldr	r3, [sp, #12]
+	adds	r2, r6, r3
+	ldrh	r3, [r1]
+	ldrh	r1, [sp, #16]
+	smulbb	r3, r3, r1
+	subs	r2, r2, r3
+	uxth	r3, r2
+	str	r3, [sp, #20]
+	movs	r3, #0
+	str	r3, [sp, #24]
+	b	.L2986
+.L2983:
+	ldrh	r2, [r1]
+	mov	r0, r6
+	mov	r1, r2
+	str	r2, [sp, #20]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #20]
+	str	r1, [sp, #24]
+	subs	r2, r2, r1
+	ldr	r1, [sp, #12]
+	mov	r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r3, r1
+	str	r3, [sp, #20]
+.L2986:
+	ldr	r3, .L3019+16
+	ldr	r2, [sp, #20]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	ldr	r3, .L3019+56
+	ldr	r3, [r3]
+	bne	.L2987
+	cmp	r4, r8
+	add	r5, r5, r3
+	itett	ne
+	ldrne	r2, [sp, #20]
+	streq	r10, [r5, #8]
+	mulne	r2, r2, r4
+	subne	r2, r2, r6
+	itt	ne
+	addne	r2, r10, r2, lsl #9
+	strne	r2, [r5, #8]
+.L2989:
+	ldr	r3, .L3019+36
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2998
+	ldr	r1, .L3019+40
+	movw	r2, #1775
+	ldr	r0, .L3019+44
+	bl	printf
+	ldr	r1, .L3019+48
+	ldr	r0, .L3019+52
+	bl	printf
+.L2998:
+	ldr	r2, [sp, #32]
+	movw	r3, #61589
+	ldr	r1, [sp, #28]
+	strh	r3, [r2, r1]	@ movhi
+	ldr	r2, .L3019+68
+	str	r4, [fp, #8]
+	adds	r4, r4, #1
+	ldr	r3, [r2]
+	str	r3, [fp, #4]
+	adds	r3, r3, #1
+	adds	r1, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r2]
+	ldr	r3, [sp, #40]
+	str	r3, [fp, #12]
+	ldrh	r3, [r7]
+	strh	r3, [fp, #2]	@ movhi
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	b	.L3018
+.L3020:
+	.align	2
+.L3019:
+	.word	.LANCHOR77
+	.word	.LANCHOR69
+	.word	.LANCHOR231
+	.word	.LANCHOR246
+	.word	.LANCHOR56
+	.word	.LANCHOR162
+	.word	.LANCHOR132
+	.word	.LANCHOR92
+	.word	.LANCHOR164
+	.word	.LANCHOR38
+	.word	.LANCHOR247
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR182
+	.word	.LANCHOR59
+	.word	.LANCHOR189
+	.word	.LANCHOR160
+.L2987:
+	cmp	r4, r8
+	add	r3, r3, r5
+	ite	eq
+	ldreq	r2, .L3021
+	ldrne	r2, .L3021+4
+	ldr	r2, [r2]
+	str	r2, [r3, #8]
+	ldr	r2, [sp, #40]
+	ldr	r3, .L3021+8
+	adds	r0, r2, #1
+	beq	.L2992
+	ldr	r3, [r3]
+	movs	r1, #1
+	str	r2, [sp, #48]
+	add	r0, sp, #44
+	str	r4, [sp, #60]
+	add	r3, r3, r5
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #52]
+	movs	r2, #0
+	str	r3, [sp, #56]
+	bl	FlashReadPages
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L2993
+	ldr	r2, .L3021+12
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+.L2996:
+	ldr	r2, [sp, #20]
+	cmp	r4, r8
+	ldr	r3, .L3021+8
+	lsl	r2, r2, #9
+	bne	.L2997
+	ldr	r3, [r3]
+	mov	r1, r10
+	add	r5, r5, r3
+	ldr	r3, [sp, #24]
+	ldr	r0, [r5, #8]
+	add	r0, r0, r3, lsl #9
+.L3016:
+	bl	ftl_memcpy
+	b	.L2989
+.L2993:
+	ldr	r1, [fp, #8]
+	cmp	r4, r1
+	beq	.L2995
+	ldr	r2, .L3021+12
+	ldr	r0, .L3021+16
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+	mov	r2, r4
+	bl	printf
+.L2995:
+	ldr	r3, [fp, #8]
+	cmp	r4, r3
+	beq	.L2996
+	movw	r2, #1754
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+	ldr	r1, .L3021+28
+	ldr	r0, .L3021+32
+	bl	printf
+	b	.L2996
+.L2992:
+	ldr	r3, [r3]
+	movs	r1, #0
+	ldr	r2, .L3021+36
+	add	r3, r3, r5
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	b	.L2996
+.L2997:
+	ldr	r1, .L3021+40
+	ldr	r3, [r3]
+	ldrh	r1, [r1]
+	add	r5, r5, r3
+	ldr	r0, [r5, #8]
+	muls	r1, r4, r1
+	subs	r1, r1, r6
+	add	r1, r10, r1, lsl #9
+	b	.L3016
+.L3014:
+	ldr	r3, [r3]
+	add	r5, r5, r3
+	ldrh	r3, [r1]
+	muls	r3, r4, r3
+	subs	r3, r3, r6
+	add	r3, r10, r3, lsl #9
+	str	r3, [r5, #8]
+	b	.L2989
+.L3005:
+	mov	r0, #-1
+	b	.L2971
+.L3022:
+	.align	2
+.L3021:
+	.word	.LANCHOR186
+	.word	.LANCHOR187
+	.word	.LANCHOR182
+	.word	.LANCHOR138
+	.word	.LC73
+	.word	.LANCHOR247
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LANCHOR58
+	.word	.LANCHOR56
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r2
+	mov	r1, r0
+	movs	r2, #1
+	movs	r0, #16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r1
+	mov	r4, r2
+	mov	r5, r3
+	mov	r6, r0
+	cbnz	r0, .L3026
+	mov	r3, r2
+	mov	r2, r5
+	bl	idb_write_data
+.L3026:
+	mov	r3, r5
+	mov	r2, r4
+	mov	r1, r7
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlCheckVpc,"ax",%progbits
+	.align	1
+	.global	FtlCheckVpc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L3051
+	ldr	r5, .L3051+4
+	ldr	r1, .L3051+8
+	ldr	r0, .L3051+12
+	bl	printf
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L3051+4
+	bl	memset
+.L3028:
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L3030
+	ldr	r7, .L3051+16
+	movs	r4, #0
+	ldr	r5, .L3051+20
+	movs	r2, #2
+	ldr	r10, .L3051+4
+	mov	r6, r4
+	ldr	fp, .L3051+60
+	mov	r8, r7
+	ldrh	r3, [r7]
+	ldr	r1, [r5]
+	ldr	r0, .L3051+24
+	bl	rknand_print_hex
+	ldrh	r3, [r7]
+	movs	r2, #2
+	ldr	r1, .L3051+4
+	ldr	r0, .L3051+28
+	bl	rknand_print_hex
+.L3031:
+	ldrh	r2, [r8]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L3033
+	ldr	r3, .L3051+32
+	ldr	r4, [r3]
+	cbz	r4, .L3034
+	ldr	r3, .L3051+36
+	mov	r8, #0
+	ldr	r7, .L3051+40
+	ldr	fp, .L3051+64
+	ldrh	r10, [r3]
+	ldr	r3, [r7]
+	subs	r4, r4, r3
+	ldr	r3, .L3051+44
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.L3035:
+	uxth	r3, r8
+	cmp	r10, r3
+	bls	.L3034
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L3036
+	ldr	r3, .L3051+4
+	movs	r6, #1
+	mov	r1, r4
+	mov	r0, fp
+	ldrh	r3, [r3, r4, lsl #1]
+	bl	printf
+.L3036:
+	movs	r3, #6
+	ldr	r2, [r7]
+	muls	r4, r3, r4
+	movw	r3, #65535
+	add	r8, r8, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L3035
+.L3034:
+	cbz	r6, .L3027
+	ldr	r1, .L3051+8
+	mov	r2, #1680
+	ldr	r0, .L3051+48
+	bl	printf
+	ldr	r1, .L3051+52
+	ldr	r0, .L3051+56
+	bl	printf
+.L3027:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3030:
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L3029
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.L3029:
+	adds	r4, r4, #1
+	b	.L3028
+.L3033:
+	ldr	r3, [r5]
+	uxth	r7, r4
+	ldrh	r2, [r3, r7, lsl #1]
+	ldrh	r3, [r10, r7, lsl #1]
+	cmp	r2, r3
+	beq	.L3032
+	mov	r1, r7
+	mov	r0, fp
+	bl	printf
+	ldr	r3, [r5]
+	movw	r2, #65535
+	ldrh	r3, [r3, r7, lsl #1]
+	cmp	r3, r2
+	beq	.L3032
+	ldrh	r2, [r10, r7, lsl #1]
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.L3032:
+	adds	r4, r4, #1
+	b	.L3031
+.L3052:
+	.align	2
+.L3051:
+	.word	.LANCHOR73
+	.word	check_valid_page_count_table
+	.word	.LANCHOR248
+	.word	.LC46
+	.word	.LANCHOR40
+	.word	.LANCHOR84
+	.word	.LC74
+	.word	.LC75
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR82
+	.word	-1431655765
+	.word	.LC5
+	.word	.LC6
+	.word	.LC7
+	.word	.LC76
+	.word	.LC77
+	.size	FtlCheckVpc, .-FtlCheckVpc
+	.section	.text.FtlDumpSysBlock,"ax",%progbits
+	.align	1
+	.global	FtlDumpSysBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDumpSysBlock, %function
+FtlDumpSysBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	lsl	r10, r0, #10
+	ldr	r5, .L3060
+	sub	sp, sp, #24
+	mov	r7, r0
+	movs	r6, #0
+	ldr	r4, .L3060+4
+	ldr	r3, [r5]
+	ldr	r8, .L3060+20
+	mov	fp, r4
+	str	r3, [r4, #8]
+	ldr	r3, .L3060+8
+	ldr	r3, [r3]
+	str	r3, [r4, #12]
+.L3054:
+	ldrh	r2, [r8]
+	sxth	r3, r6
+	cmp	r3, r2
+	blt	.L3056
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3056:
+	movs	r2, #1
+	orr	r3, r3, r10
+	mov	r1, r2
+	mov	r0, fp
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r2, [r4, #8]
+	mov	r1, r7
+	ldr	r3, [r4, #12]
+	ldr	r0, .L3060+12
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldm	r4, {r2, r3}
+	bl	printf
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L3055
+	mov	r3, #768
+	movs	r2, #4
+	ldr	r1, [r5]
+	ldr	r0, .L3060+16
+	bl	rknand_print_hex
+.L3055:
+	adds	r6, r6, #1
+	b	.L3054
+.L3061:
+	.align	2
+.L3060:
+	.word	.LANCHOR183
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LC78
+	.word	.LC79
+	.word	.LANCHOR54
+	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
+	.section	.text.dump_map_info,"ax",%progbits
+	.align	1
+	.global	dump_map_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_map_info, %function
+dump_map_info:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L3076
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #40
+	ldr	r8, .L3076+72
+	ldrh	r5, [r3]
+.L3063:
+	ldr	r3, .L3076+4
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bhi	.L3070
+	ldr	r4, .L3076+8
+	movs	r7, #0
+.L3071:
+	ldr	r3, .L3076+12
+	sxth	r5, r7
+	ldrh	r3, [r3]
+	cmp	r5, r3
+	bge	.L3074
+	lsls	r5, r5, #1
+	movs	r6, #0
+	ldr	r8, .L3076+76
+	b	.L3075
+.L3065:
+	str	r3, [sp, #36]
+	mov	r1, r5
+	ldr	r3, .L3076+16
+	str	r2, [sp, #32]
+	ldrb	r0, [r3, r6]	@ zero_extendqisi2
+	bl	V2P_block
+	str	r0, [sp, #28]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #36]
+	cbnz	r0, .L3064
+	ldr	r1, [sp, #28]
+	mla	r0, fp, r4, r7
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	bic	ip, r1, #3
+	ldr	r1, [sp, #24]
+	add	r1, r1, ip
+	str	r1, [r0, #12]
+.L3064:
+	adds	r6, r6, #1
+.L3072:
+	uxth	r1, r6
+	cmp	r2, r1
+	bhi	.L3065
+	cbnz	r4, .L3066
+.L3069:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L3063
+.L3066:
+	ldr	r10, .L3076+80
+	mov	r0, r7
+	movs	r6, #0
+	movs	r7, #36
+	movs	r2, #1
+	mov	r1, r4
+	bl	FlashReadPages
+.L3067:
+	uxth	r3, r6
+	cmp	r4, r3
+	bls	.L3069
+	ldr	r3, [r8]
+	mla	r3, r7, r6, r3
+	adds	r6, r6, #1
+	ldr	r1, [r3, #12]
+	ldr	r2, [r3, #4]
+	ldr	r3, [r3, #8]
+	ldr	r0, [r3, #4]
+	str	r0, [sp, #16]
+	mov	r0, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, [r1, #12]
+	str	r3, [sp, #8]
+	ldr	r3, [r1, #8]
+	str	r3, [sp, #4]
+	ldr	r3, [r1, #4]
+	str	r3, [sp]
+	ldr	r3, [r1]
+	ubfx	r1, r2, #10, #16
+	bl	printf
+	b	.L3067
+.L3070:
+	ldr	r1, .L3076+20
+	movs	r6, #0
+	ldr	r3, .L3076+24
+	mov	r4, r6
+	ldr	r7, [r8]
+	mov	fp, #36
+	ldr	r1, [r1]
+	ldrh	r2, [r3]
+	ldr	r3, .L3076+28
+	str	r1, [sp, #24]
+	ldr	r1, .L3076+32
+	ldr	r3, [r3]
+	ldrh	r10, [r1]
+	b	.L3072
+.L3073:
+	ldr	r10, .L3076+44
+	mov	r0, r4
+	ldr	r2, [r10]
+	ldrh	r2, [r2, r5]
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r2, [r4, #8]
+	ldr	r1, [r10]
+	ldr	r3, [r4, #12]
+	ldr	r0, [r2, #4]
+	ldrh	r1, [r1, r5]
+	str	r0, [sp, #20]
+	ldr	r2, [r2]
+	ldr	r0, .L3076+36
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldm	r4, {r2, r3}
+	bl	printf
+.L3075:
+	ldrh	r2, [r8]
+	sxth	r3, r6
+	adds	r6, r6, #1
+	cmp	r3, r2
+	blt	.L3073
+	adds	r7, r7, #1
+	b	.L3071
+.L3074:
+	ldr	r3, .L3076+40
+	movs	r2, #2
+	ldr	r1, .L3076+44
+	ldr	r0, .L3076+48
+	ldr	r3, [r3]
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r4, .L3076+52
+	movs	r2, #4
+	ldr	r1, .L3076+56
+	ldr	r0, .L3076+60
+	ldrh	r3, [r4]
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, .L3076+64
+	movs	r2, #4
+	ldrh	r3, [r4]
+	ldr	r0, .L3076+68
+	ldr	r1, [r1]
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	rknand_print_hex
+.L3077:
+	.align	2
+.L3076:
+	.word	.LANCHOR40
+	.word	.LANCHOR41
+	.word	.LANCHOR202
+	.word	.LANCHOR128
+	.word	.LANCHOR47
+	.word	.LANCHOR106
+	.word	.LANCHOR38
+	.word	.LANCHOR105
+	.word	.LANCHOR59
+	.word	.LC49
+	.word	.LANCHOR65
+	.word	.LANCHOR129
+	.word	.LC81
+	.word	.LANCHOR67
+	.word	.LANCHOR131
+	.word	.LC82
+	.word	.LANCHOR195
+	.word	.LC83
+	.word	.LANCHOR180
+	.word	.LANCHOR54
+	.word	.LC80
+	.size	dump_map_info, .-dump_map_info
+	.global	FtlMallocOffset
+	.global	FtlMallocBuffer
+	.global	LastWritenPbaAddr
+	.global	gc_ink_free_return_value
+	.global	check_valid_page_count_table
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	g_LowFormat
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	ToshibaRefValue
+	.global	Toshiba15RefValue
+	.global	ToshibaA19RefValue
+	.global	SamsungRefValue
+	.global	refValueDefault
+	.global	random_seed
+	.global	gSlcNandParaInfo
+	.global	gNandParaInfo
+	.global	g_page_map_check_enable
+	.global	g_power_lost_ecc_error_blk
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_all_blk_used_slc_mode
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_refresh_block_temp_tbl
+	.global	g_free_slc_blk_num
+	.global	g_gc_refresh_block_temp_num
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_3
+	.global	g_gc_next_blk_2
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_check_table
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_flash_read_only_en
+	.global	g_inkDie_check_enable
+	.global	g_SlcPartLbaEndSector
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.global	gMasterTempBuf
+	.global	gMasterInfo
+	.global	gNandcDumpWriteEn
+	.global	gToggleModeClkDiv
+	.global	gBootDdrMode
+	.global	gNandcEccBits
+	.global	gpNandc1
+	.global	gpNandc
+	.global	g_nandc_version_data
+	.global	gNandcVer
+	.global	gNandChipMap
+	.global	gNandIDataBuf
+	.global	FlashDdrTunningReadCount
+	.global	FlashWaitBusyScheduleEn
+	.global	gNandPhyInfo
+	.global	gFlashProgCheckSpareBuffer
+	.global	gFlashProgCheckBuffer
+	.global	gFlashSpareBuffer
+	.global	gFlashPageBuffer1
+	.global	gFlashPageBuffer0
+	.global	gpFlashSaveInfo
+	.global	gReadRetryInfo
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_slc2KBNand
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	gNandIDBResBlkNumSaveInFlash
+	.global	gNandIDBResBlkNum
+	.global	gNandFlashResEndPageAddr
+	.global	gNandFlashInfoBlockAddr
+	.global	gNandFlashIdbBlockAddr
+	.global	gNandFlashInfoBlockEcc
+	.global	gNandFlashIDBEccBits
+	.global	gNandFlashEccBits
+	.global	gNandRandomizer
+	.global	gBlockPageAlignSize
+	.global	gTotleBlock
+	.global	gNandMaxChip
+	.global	gNandMaxDie
+	.global	gFlashInterfaceMode
+	.global	gFlashSlcMode
+	.global	gFlashOnfiModeEn
+	.global	gFlashToggleModeEn
+	.global	gFlashSdrModeEn
+	.global	gMultiPageProgEn
+	.global	gMultiPageReadEn
+	.global	gpReadRetrial
+	.global	mlcPageToSlcPageTbl
+	.global	slcPageToMlcPageTbl
+	.global	DieAddrs
+	.global	gDieOp
+	.global	DieCsIndex
+	.global	IDByte
+	.global	read_retry_cur_offset
+	.section	.bss.DeviceCapacity,"aw",%nobits
+	.align	2
+	.set	.LANCHOR61,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.space	4
+	.section	.bss.DieAddrs,"aw",%nobits
+	.align	2
+	.set	.LANCHOR17,. + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.space	32
+	.section	.bss.DieCsIndex,"aw",%nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.space	8
+	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.align	2
+	.set	.LANCHOR144,. + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.space	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.space	4
+	.section	.bss.FtlMallocBuffer,"aw",%nobits
+	.align	6
+	.type	FtlMallocBuffer, %object
+	.size	FtlMallocBuffer, 1310720
+FtlMallocBuffer:
+	.space	1310720
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
+	.align	1
+	.set	.LANCHOR100,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.space	2
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+	.set	.LANCHOR22,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR123,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR41,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR51,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR52,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+	.set	.LANCHOR59,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR40,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR223,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR45,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.space	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR49,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR66,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR64,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR67,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR42,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR39,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR62,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR55,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR46,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR56,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR37,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR43,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+	.set	.LANCHOR44,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR63,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR50,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR108,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.check_valid_page_count_table,"aw",%nobits
+	.align	1
+	.type	check_valid_page_count_table, %object
+	.size	check_valid_page_count_table, 8192
+check_valid_page_count_table:
+	.space	8192
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.space	4
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.space	4
+	.section	.bss.gBootDdrMode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR155,. + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
+	.space	4
+	.section	.bss.gDieOp,"aw",%nobits
+	.align	2
+	.set	.LANCHOR23,. + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 128
+gDieOp:
+	.space	128
+	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+	.set	.LANCHOR24,. + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.space	1
+	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.space	1
+	.section	.bss.gFlashPageBuffer0,"aw",%nobits
+	.align	2
+	.set	.LANCHOR147,. + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 4
+gFlashPageBuffer0:
+	.space	4
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
+	.space	4
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR198,. + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR199,. + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
+	.space	4
+	.section	.bss.gFlashSdrModeEn,"aw",%nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.space	1
+	.section	.bss.gFlashSlcMode,"aw",%nobits
+	.set	.LANCHOR8,. + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.space	1
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR197,. + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.gFlashToggleModeEn,"aw",%nobits
+	.set	.LANCHOR30,. + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.space	1
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR127,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 44
+gL2pMapInfo:
+	.space	44
+	.section	.bss.gMasterInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR35,. + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 32
+gMasterInfo:
+	.space	32
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
+	.space	4
+	.section	.bss.gMultiPageProgEn,"aw",%nobits
+	.set	.LANCHOR27,. + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.space	1
+	.section	.bss.gMultiPageReadEn,"aw",%nobits
+	.set	.LANCHOR201,. + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.space	1
+	.section	.bss.gNandChipMap,"aw",%nobits
+	.align	2
+	.set	.LANCHOR6,. + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 32
+gNandChipMap:
+	.space	32
+	.section	.bss.gNandFlashEccBits,"aw",%nobits
+	.set	.LANCHOR33,. + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.space	1
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+	.set	.LANCHOR152,. + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR149,. + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR148,. + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.space	1
+	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
+	.align	2
+	.type	gNandFlashResEndPageAddr, %object
+	.size	gNandFlashResEndPageAddr, 4
+gNandFlashResEndPageAddr:
+	.space	4
+	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
+	.set	.LANCHOR2,. + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.space	1
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
+	.set	.LANCHOR150,. + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.space	1
+	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR141,. + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.space	2048
+	.section	.bss.gNandMaxChip,"aw",%nobits
+	.set	.LANCHOR121,. + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.space	1
+	.section	.bss.gNandMaxDie,"aw",%nobits
+	.set	.LANCHOR25,. + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.space	1
+	.section	.bss.gNandOptPara,"aw",%nobits
+	.set	.LANCHOR7,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR15,. + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.space	28
+	.section	.bss.gNandRandomizer,"aw",%nobits
+	.set	.LANCHOR5,. + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.space	1
+	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR36,. + 0
+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
+	.space	4
+	.section	.bss.gNandcEccBits,"aw",%nobits
+	.align	2
+	.set	.LANCHOR32,. + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
+	.space	4
+	.section	.bss.gNandcVer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
+	.space	4
+	.section	.bss.gReadRetryInfo,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.space	852
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+	.set	.LANCHOR76,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.gSysInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR209,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gToggleModeClkDiv,"aw",%nobits
+	.align	2
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
+	.space	4
+	.section	.bss.gTotleBlock,"aw",%nobits
+	.align	1
+	.set	.LANCHOR122,. + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
+	.space	2
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR215,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 44
+gVendorBlkInfo:
+	.space	44
+	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.space	4
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR159,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.space	4
+	.section	.bss.g_LowFormat,"aw",%nobits
+	.align	2
+	.set	.LANCHOR244,. + 0
+	.type	g_LowFormat, %object
+	.size	g_LowFormat, 4
+g_LowFormat:
+	.space	4
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR69,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.space	4
+	.section	.bss.g_MaxLbn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR222,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.space	4
+	.section	.bss.g_MaxLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.space	4
+	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR157,. + 0
+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
+g_SlcPartLbaEndSector:
+	.space	4
+	.section	.bss.g_VaildLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR101,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR92,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
+	.space	4
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR93,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR190,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+	.set	.LANCHOR218,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR77,. + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.space	4
+	.section	.bss.g_free_slc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR139,. + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR246,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR119,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR117,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
+	.align	1
+	.set	.LANCHOR118,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_blk_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR178,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.space	2
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR110,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR242,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR241,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.align	2
+	.set	.LANCHOR173,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.space	4
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR174,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.space	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR177,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+	.set	.LANCHOR114,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.bss.g_gc_next_blk_2,"aw",%nobits
+	.align	1
+	.set	.LANCHOR115,. + 0
+	.type	g_gc_next_blk_2, %object
+	.size	g_gc_next_blk_2, 2
+g_gc_next_blk_2:
+	.space	2
+	.section	.bss.g_gc_next_blk_3,"aw",%nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	g_gc_next_blk_3, %object
+	.size	g_gc_next_blk_3, 2
+g_gc_next_blk_3:
+	.space	2
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+	.set	.LANCHOR103,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR111,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
+	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR179,. + 0
+	.type	g_gc_refresh_block_temp_num, %object
+	.size	g_gc_refresh_block_temp_num, 2
+g_gc_refresh_block_temp_num:
+	.space	2
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
+	.align	1
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.space	4
+	.section	.bss.g_gc_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR204,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR94,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.align	2
+	.set	.LANCHOR171,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.space	4
+	.section	.bss.g_in_swl_replace,"aw",%nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.space	4
+	.section	.bss.g_inkDie_check_enable,"aw",%nobits
+	.align	2
+	.set	.LANCHOR28,. + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
+	.space	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR98,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.space	2
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR13,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR151,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_max_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR169,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.space	4
+	.section	.bss.g_min_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR170,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.space	4
+	.section	.bss.g_nandc_version_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR29,. + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
+	.space	4
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR89,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.align	1
+	.set	.LANCHOR70,. + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.space	2
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR235,. + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+	.set	.LANCHOR236,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
+	.align	2
+	.set	.LANCHOR136,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.space	4
+	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR237,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.space	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR238,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.g_req_cache,"aw",%nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR10,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc2KBNand,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.space	1
+	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR138,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR81,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR133,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR205,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.space	4
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.space	4
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.space	4
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.space	4
+	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR165,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.space	4
+	.section	.bss.g_totle_map_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR128,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.space	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR167,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR166,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.space	4
+	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR134,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR80,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.space	2
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR216,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.space	4
+	.section	.bss.gc_discard_updated,"aw",%nobits
+	.align	2
+	.set	.LANCHOR232,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.space	4
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR240,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.space	2
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR146,. + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
+	.space	4
+	.section	.bss.gpNandParaInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR18,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 4
+gpNandParaInfo:
+	.space	4
+	.section	.bss.gpNandc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR19,. + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 4
+gpNandc:
+	.space	4
+	.section	.bss.gpNandc1,"aw",%nobits
+	.align	2
+	.type	gpNandc1, %object
+	.size	gpNandc1, 4
+gpNandc1:
+	.space	4
+	.section	.bss.gpReadRetrial,"aw",%nobits
+	.align	2
+	.set	.LANCHOR145,. + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 4
+gpReadRetrial:
+	.space	4
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR191,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.bss.gp_flash_check_buf,"aw",%nobits
+	.align	2
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.space	262144
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR104,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
+	.space	4
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR230,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
+	.section	.bss.idb_buf,"aw",%nobits
+	.align	2
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.space	262144
+	.section	.bss.idb_need_write_back,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.space	4
+	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.space	1024
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR0,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
+	.space	4
+	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR83,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
+	.space	4
+	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR82,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
+	.space	4
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
+	.align	2
+	.set	.LANCHOR85,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
+	.space	4
+	.section	.bss.p_erase_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR79,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
+	.space	4
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR88,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
+	.space	4
+	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR105,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
+	.space	4
+	.section	.bss.p_gc_page_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR112,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
+	.space	4
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR106,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
+	.space	4
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.align	2
+	.set	.LANCHOR186,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
+	.space	4
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR187,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR189,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR126,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.align	2
+	.set	.LANCHOR97,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
+	.space	4
+	.section	.bss.p_map_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR129,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
+	.space	4
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR125,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR130,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR195,. + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 4
+p_map_region_ppn_check_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
+	.space	4
+	.section	.bss.p_plane_order_table,"aw",%nobits
+	.set	.LANCHOR47,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR137,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR183,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR184,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
+	.space	4
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR188,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
+	.space	4
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.align	2
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
+	.space	4
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR84,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
+	.space	4
+	.section	.bss.p_vendor_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 4
+p_vendor_block_table:
+	.space	4
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR192,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
+	.space	4
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR193,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
+	.space	4
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR185,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
+	.space	4
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR194,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
+	.space	4
+	.section	.bss.read_retry_cur_offset,"aw",%nobits
+	.set	.LANCHOR21,. + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
+read_retry_cur_offset:
+	.space	4
+	.section	.bss.req_erase,"aw",%nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
+	.space	4
+	.section	.bss.req_gc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
+	.space	4
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+	.set	.LANCHOR181,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
+	.section	.bss.req_prgm,"aw",%nobits
+	.align	2
+	.set	.LANCHOR182,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
+	.space	4
+	.section	.bss.req_read,"aw",%nobits
+	.align	2
+	.set	.LANCHOR180,. + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
+	.space	4
+	.section	.bss.req_sys,"aw",%nobits
+	.align	2
+	.set	.LANCHOR202,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 36
+req_sys:
+	.space	36
+	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR16,. + 0
+	.type	slcPageToMlcPageTbl, %object
+	.size	slcPageToMlcPageTbl, 512
+slcPageToMlcPageTbl:
+	.space	512
+	.section	.data.FtlMallocOffset,"aw",%progbits
+	.align	2
+	.type	FtlMallocOffset, %object
+	.size	FtlMallocOffset, 4
+FtlMallocOffset:
+	.word	64
+	.section	.data.LastWritenPbaAddr,"aw",%progbits
+	.align	2
+	.type	LastWritenPbaAddr, %object
+	.size	LastWritenPbaAddr, 4
+LastWritenPbaAddr:
+	.word	-1
+	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.align	1
+	.set	.LANCHOR142,. + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 2464
+NandFlashParaTbl:
+	.byte	6
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	75
+	.byte	-87
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+	.byte	2
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+	.space	4
+	.byte	6
+	.byte	44
+	.byte	68
+	.byte	68
+	.byte	75
+	.byte	-87
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2893
-	.4byte	0x5569
-	.uleb128 0x48
-	.4byte	.LVL2898
-	.4byte	0x5569
-	.uleb128 0x48
-	.4byte	.LVL2899
-	.4byte	0x5c12
-	.uleb128 0x48
-	.4byte	.LVL2900
-	.4byte	0x93da
-	.uleb128 0x48
-	.4byte	.LVL2901
-	.4byte	0x7c46
-	.uleb128 0x48
-	.4byte	.LVL2902
-	.4byte	0x75f4
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1064
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
 	.byte	0
+	.byte	1
 	.byte	0
 	.byte	0
-	.uleb128 0x8e
-	.4byte	0x98b5
-	.4byte	.LFB302
-	.4byte	.LFE302-.LFB302
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x10130
-	.uleb128 0x4f
-	.4byte	0x98c6
-	.4byte	.LLST736
-	.uleb128 0x74
-	.4byte	0x98d2
-	.uleb128 0x6f
-	.4byte	.LBB537
-	.4byte	.LBE537-.LBB537
-	.4byte	0x100b6
-	.uleb128 0x8b
-	.4byte	0x98c6
-	.uleb128 0x7a
-	.4byte	.LBB538
-	.4byte	.LBE538-.LBB538
-	.uleb128 0x74
-	.4byte	0x10067
-	.uleb128 0x7a
-	.4byte	.LBB539
-	.4byte	.LBE539-.LBB539
-	.uleb128 0x73
-	.4byte	0x98e0
-	.4byte	.LLST737
-	.uleb128 0x45
-	.4byte	.LVL2923
-	.4byte	0x5383
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	74
+	.byte	-87
 	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2912
-	.4byte	0x103ff
-	.4byte	0x100d6
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC51
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2913
-	.4byte	0x9f4a
-	.4byte	0x100ea
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL2914
-	.4byte	0x9d26
-	.uleb128 0x48
-	.4byte	.LVL2915
-	.4byte	0x9c76
-	.uleb128 0x48
-	.4byte	.LVL2916
-	.4byte	0x87ee
-	.uleb128 0x48
-	.4byte	.LVL2917
-	.4byte	0x8a5f
-	.uleb128 0x48
-	.4byte	.LVL2918
-	.4byte	0x103ff
-	.uleb128 0x48
-	.4byte	.LVL2920
-	.4byte	0x60a3
-	.uleb128 0x45
-	.4byte	.LVL2921
-	.4byte	0x5383
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-120
+	.byte	4
+	.byte	75
+	.byte	-87
 	.byte	0
-	.uleb128 0x8e
-	.4byte	0xac06
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x10238
-	.uleb128 0x4f
-	.4byte	0xac17
-	.4byte	.LLST779
-	.uleb128 0x4f
-	.4byte	0xac23
-	.4byte	.LLST780
-	.uleb128 0x4f
-	.4byte	0xac2f
-	.4byte	.LLST781
-	.uleb128 0x73
-	.4byte	0xac3b
-	.4byte	.LLST782
-	.uleb128 0x73
-	.4byte	0xac47
-	.4byte	.LLST783
-	.uleb128 0x73
-	.4byte	0xac53
-	.4byte	.LLST784
-	.uleb128 0x74
-	.4byte	0xac5f
-	.uleb128 0x90
-	.4byte	0xac69
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x73
-	.4byte	0xac75
-	.4byte	.LLST785
-	.uleb128 0x6b
-	.4byte	.Ldebug_ranges0+0x6a0
-	.4byte	0x1021c
-	.uleb128 0x4f
-	.4byte	0xac2f
-	.4byte	.LLST786
-	.uleb128 0x4f
-	.4byte	0xac23
-	.4byte	.LLST787
-	.uleb128 0x4f
-	.4byte	0xac17
-	.4byte	.LLST788
-	.uleb128 0x6a
-	.4byte	.Ldebug_ranges0+0x6a0
-	.uleb128 0x74
-	.4byte	0x1015f
-	.uleb128 0x74
-	.4byte	0x10168
-	.uleb128 0x74
-	.4byte	0x10171
-	.uleb128 0x73
-	.4byte	0x1017a
-	.4byte	.LLST789
-	.uleb128 0x74
-	.4byte	0x1017f
-	.uleb128 0x74
-	.4byte	0x10189
-	.uleb128 0x44
-	.4byte	.LVL3122
-	.4byte	0x52a5
-	.4byte	0x101f7
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3123
-	.4byte	0x4d68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC58
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
+	.byte	1
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LVL3116
-	.4byte	0xb17b
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -68
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-88
+	.byte	5
+	.byte	-53
+	.byte	-87
 	.byte	0
-	.uleb128 0x8e
-	.4byte	0x8a0f
-	.4byte	.LFB324
-	.4byte	.LFE324-.LFB324
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x103ff
-	.uleb128 0x74
-	.4byte	0x8a20
-	.uleb128 0x74
-	.4byte	0x8a2c
-	.uleb128 0x74
-	.4byte	0x8a38
-	.uleb128 0x74
-	.4byte	0x8a44
-	.uleb128 0x7a
-	.4byte	.LBB557
-	.4byte	.LBE557-.LBB557
-	.uleb128 0x73
-	.4byte	0x1024c
-	.4byte	.LLST794
-	.uleb128 0x73
-	.4byte	0x10251
-	.4byte	.LLST795
-	.uleb128 0x73
-	.4byte	0x10256
-	.4byte	.LLST796
-	.uleb128 0x73
-	.4byte	0x1025b
-	.4byte	.LLST797
-	.uleb128 0x95
-	.4byte	0x8a50
-	.uleb128 0x48
-	.4byte	.LVL3144
-	.4byte	0x8bc4
-	.uleb128 0x48
-	.4byte	.LVL3145
-	.4byte	0x8bf8
-	.uleb128 0x44
-	.4byte	.LVL3148
-	.4byte	0x8d5f
-	.4byte	0x102b9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.byte	4
+	.byte	2
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3149
-	.4byte	0xd1ee
-	.4byte	0x102cd
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3150
-	.4byte	0x8dc2
-	.4byte	0x102e1
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3156
-	.4byte	0xb17b
-	.4byte	0x102ff
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3157
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL3159
-	.4byte	0x8dc2
-	.4byte	0x1031c
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3161
-	.4byte	0xab78
-	.4byte	0x10330
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	70
+	.byte	-119
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3162
-	.4byte	0x8cb3
-	.uleb128 0x48
-	.4byte	.LVL3164
-	.4byte	0x8d5f
-	.uleb128 0x44
-	.4byte	.LVL3165
-	.4byte	0x530b
-	.4byte	0x1035a
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3167
-	.4byte	0x52a5
-	.uleb128 0x44
-	.4byte	.LVL3168
-	.4byte	0xac82
-	.4byte	0x10381
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3169
-	.4byte	0xae0d
-	.4byte	0x103a4
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
+	.byte	1
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL3170
-	.4byte	0x8dc2
-	.4byte	0x103b8
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3172
-	.4byte	0x8dc2
-	.uleb128 0x44
-	.4byte	.LVL3175
-	.4byte	0xac82
-	.4byte	0x103d9
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x43
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LVL3176
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL3177
-	.4byte	0x8dc2
-	.uleb128 0x48
-	.4byte	.LVL3178
-	.4byte	0x8c64
-	.uleb128 0x48
-	.4byte	.LVL3180
-	.4byte	0x8c64
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	72
+	.byte	4
+	.byte	74
+	.byte	-91
 	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	287
+	.byte	1
 	.byte	0
-	.uleb128 0x98
-	.4byte	.LASF1570
-	.4byte	.LASF1570
-	.byte	0x2a
-	.byte	0x12
-	.uleb128 0x98
-	.4byte	.LASF1571
-	.4byte	.LASF1571
-	.byte	0x21
-	.byte	0xfe
-	.uleb128 0x98
-	.4byte	.LASF1572
-	.4byte	.LASF1572
-	.byte	0x21
-	.byte	0xff
-	.uleb128 0x99
-	.4byte	.LASF1573
-	.4byte	.LASF1573
-	.byte	0x23
-	.2byte	0x16c
-	.uleb128 0x99
-	.4byte	.LASF1008
-	.4byte	.LASF1008
-	.byte	0x23
-	.2byte	0x399
-	.uleb128 0x98
-	.4byte	.LASF1574
-	.4byte	.LASF1574
-	.byte	0x8
-	.byte	0x35
-	.uleb128 0x98
-	.4byte	.LASF1575
-	.4byte	.LASF1575
-	.byte	0x12
-	.byte	0x72
-	.uleb128 0x99
-	.4byte	.LASF1576
-	.4byte	.LASF1576
-	.byte	0x23
-	.2byte	0x16d
-	.uleb128 0x99
-	.4byte	.LASF1577
-	.4byte	.LASF1577
-	.byte	0xd
-	.2byte	0x244
-	.uleb128 0x98
-	.4byte	.LASF1578
-	.4byte	.LASF1578
-	.byte	0x2b
-	.byte	0xb
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
-	.section	.debug_abbrev,"",%progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x10
-	.uleb128 0x17
+	.byte	1
 	.byte	0
 	.byte	0
-	.uleb128 0x2
-	.uleb128 0x24
 	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
 	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0x16
+	.byte	1
 	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4
-	.uleb128 0x26
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	84
+	.byte	-87
 	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
 	.byte	0
+	.byte	1
 	.byte	0
-	.uleb128 0x5
-	.uleb128 0x24
 	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
 	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-41
+	.byte	-108
+	.byte	62
+	.byte	-124
 	.byte	0
-	.uleb128 0x6
-	.uleb128 0x1
-	.byte	0x1
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
+	.byte	4
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+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
 	.byte	0
+	.section	.data.ToshibaA19RefValue,"aw",%progbits
+	.set	.LANCHOR9,. + 0
+	.type	ToshibaA19RefValue, %object
+	.size	ToshibaA19RefValue, 45
+ToshibaA19RefValue:
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-	.uleb128 0x13
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+	.byte	126
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-	.uleb128 0x8
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-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
+	.byte	124
+	.byte	120
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-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
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-	.uleb128 0x2e
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-	.uleb128 0x2117
-	.uleb128 0x19
-	.uleb128 0x1
-	.uleb128 0x13
 	.byte	0
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+	.byte	118
+	.byte	116
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-	.uleb128 0x5
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-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
+	.byte	2
 	.byte	0
+	.byte	126
+	.byte	124
 	.byte	0
-	.uleb128 0x90
-	.uleb128 0x34
+	.section	.data.ToshibaRefValue,"aw",%progbits
+	.set	.LANCHOR12,. + 0
+	.type	ToshibaRefValue, %object
+	.size	ToshibaRefValue, 8
+ToshibaRefValue:
 	.byte	0
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-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x18
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
+	.align	1
+	.set	.LANCHOR226,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.short	-1
+	.section	.data.gFtlInitStatus,"aw",%progbits
+	.align	2
+	.set	.LANCHOR231,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.gNandParaInfo,"aw",%progbits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	gNandParaInfo, %object
+	.size	gNandParaInfo, 32
+gNandParaInfo:
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-	.uleb128 0x34
+	.space	5
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-	.uleb128 0x1c
-	.uleb128 0xb
+	.byte	1
+	.byte	8
+	.short	128
+	.byte	2
+	.byte	1
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+	.byte	32
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-	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x93
-	.uleb128 0x410a
+	.space	4
+	.section	.data.gSlcNandParaInfo,"aw",%progbits
+	.align	1
+	.set	.LANCHOR200,. + 0
+	.type	gSlcNandParaInfo, %object
+	.size	gSlcNandParaInfo, 32
+gSlcNandParaInfo:
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+	.byte	-104
+	.byte	-15
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-	.uleb128 0x11
-	.uleb128 0x1
+	.byte	1
+	.byte	1
+	.byte	4
+	.short	64
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+	.byte	1
+	.short	1024
+	.short	256
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-	.uleb128 0x1
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 	.byte	0
+	.space	4
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.data.random_seed,"aw",%progbits
+	.align	1
+	.set	.LANCHOR4,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
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+	.short	28087
+	.section	.data.refValueDefault,"aw",%progbits
+	.set	.LANCHOR196,. + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
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-	.byte	0x9f
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-	.4byte	0
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-	.4byte	.LVL1401
-	.4byte	.LVL1402
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1402
-	.4byte	.LFE490
-	.2byte	0x4
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-	.4byte	0
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-	.4byte	.LVL1401
-	.4byte	.LVL1403
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1403
-	.4byte	.LVL1405-1
-	.2byte	0x1
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-	.4byte	.LVL1405-1
-	.4byte	.LFE490
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
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-	.4byte	0
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-	.4byte	.LVL1396
-	.4byte	.LVL1399
-	.2byte	0x1
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-	.4byte	.LVL1399
-	.4byte	.LVL1400-1
-	.2byte	0x1
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-	.4byte	.LVL1400-1
-	.4byte	.LFE489
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL1396
-	.4byte	.LVL1397
-	.2byte	0x1
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-	.4byte	.LVL1397
-	.4byte	.LFE489
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-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.4byte	0
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-	.4byte	.LVL1396
-	.4byte	.LVL1398
-	.2byte	0x1
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-	.4byte	.LVL1398
-	.4byte	.LVL1400-1
-	.2byte	0x1
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-	.4byte	.LFE489
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
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-	.4byte	0
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-	.4byte	.LVL1392
-	.4byte	.LVL1394
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1394
-	.4byte	.LVL1395-1
-	.2byte	0x4
-	.byte	0x71
-	.sleb128 -256
-	.byte	0x9f
-	.4byte	.LVL1395-1
-	.4byte	.LFE488
-	.2byte	0x4
-	.byte	0xf3
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-	.4byte	.LVL1392
-	.4byte	.LVL1393
-	.2byte	0x1
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-	.4byte	.LVL1395-1
-	.2byte	0x1
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-	.4byte	.LFE488
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.4byte	.LVL1386
-	.4byte	.LVL1388
-	.2byte	0x1
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-	.4byte	.LVL1390
-	.2byte	0x1
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-	.4byte	.LVL1390
-	.4byte	.LVL1391-1
-	.2byte	0x4
-	.byte	0x71
-	.sleb128 -256
-	.byte	0x9f
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-	.4byte	.LFE487
-	.2byte	0x4
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-	.uleb128 0x1
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-	.4byte	.LVL1386
-	.4byte	.LVL1387
-	.2byte	0x1
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-	.4byte	.LVL1387
-	.4byte	.LVL1390
-	.2byte	0x1
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-	.4byte	.LVL1390
-	.4byte	.LVL1391-1
-	.2byte	0x1
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-	.4byte	.LVL1391-1
-	.4byte	.LFE487
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.4byte	0
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-	.4byte	.LVL1384
-	.4byte	.LVL1385-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1385-1
-	.4byte	.LFE486
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.4byte	.LVL1384
-	.4byte	.LVL1385-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1385-1
-	.4byte	.LFE486
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.4byte	0
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-	.4byte	.LVL1305
-	.4byte	.LVL1306-1
-	.2byte	0x1
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-	.4byte	.LVL1306-1
-	.4byte	.LFE485
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.4byte	0
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-	.4byte	.LVL1301
-	.4byte	.LVL1302-1
-	.2byte	0x1
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-	.4byte	.LFE483
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-	.uleb128 0x1
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-	.4byte	.LVL1301
-	.4byte	.LVL1302-1
-	.2byte	0x1
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-	.4byte	.LVL1301
-	.4byte	.LVL1302-1
-	.2byte	0x1
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-	.4byte	.LVL914
-	.4byte	.LVL915
-	.2byte	0x2
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-	.4byte	.LFE482
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-	.4byte	.LVL899
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-	.2byte	0x1
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-	.4byte	.LFE481
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-	.4byte	.LVL899
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-	.2byte	0x1
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-	.4byte	.LVL899
-	.4byte	.LVL900-1
-	.2byte	0x1
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-	.4byte	.LVL743
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-	.2byte	0x1
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-	.4byte	.LVL743
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-	.4byte	.LVL743
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-	.2byte	0x1
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-	.4byte	.LVL730
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-	.4byte	.LVL734
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-	.2byte	0x2
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-	.2byte	0x1
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-	.4byte	.LVL738
-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL732
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-	.2byte	0x1
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-	.4byte	.LVL727
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-	.2byte	0x1
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-	.4byte	.LVL2708
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-	.4byte	.LVL2708
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-	.4byte	.LVL2722
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-	.4byte	.LVL2716
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-	.4byte	.LFE398
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-	.4byte	.LVL2718
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-	.4byte	.LFE398
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-	.4byte	.LVL2716
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-	.4byte	.LVL2715
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL2709
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-	.4byte	.LVL2730
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-	.2byte	0x2
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-	.sleb128 -52
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-	.4byte	.LVL2708
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-	.2byte	0x2
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-	.4byte	.LVL2708
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-	.2byte	0x3
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-	.4byte	.LVL2733
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-	.2byte	0x1
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-	.sleb128 -44
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-	.4byte	.LVL2750
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LFE396
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-	.uleb128 0x1
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-	.4byte	.LVL2760
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-	.2byte	0x2
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-	.4byte	.LVL2768
-	.2byte	0x1
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-	.4byte	.LVL2780
-	.2byte	0x1
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-	.4byte	.LVL2781
-	.2byte	0x3
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-	.sleb128 1
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-	.4byte	.LFE396
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-	.4byte	.LVL2754
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL2750
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-	.4byte	c_ftl_nand_page_pre_blk
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-	.4byte	c_ftl_nand_page_pre_blk
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-	.4byte	.LVL2772
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-	.4byte	.LVL719
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-	.4byte	.LFE395
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-	.4byte	.LVL719
-	.4byte	.LVL721-1
-	.2byte	0x1
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-	.4byte	.LVL721-1
-	.4byte	.LVL726
-	.2byte	0x1
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-	.4byte	.LVL726
-	.4byte	.LFE395
-	.2byte	0x2
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-	.sleb128 4
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL719
-	.4byte	.LVL721-1
-	.2byte	0x1
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-	.4byte	.LVL721-1
-	.4byte	.LVL726
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-	.4byte	.LFE395
-	.2byte	0x2
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-	.sleb128 8
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL721
-	.4byte	.LVL725
-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL721
-	.4byte	.LVL722
-	.2byte	0x2
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-	.4byte	.LVL723
-	.4byte	.LVL724
-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL714
-	.4byte	.LVL716
-	.2byte	0x1
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-	.4byte	.LVL716
-	.4byte	.LVL717
-	.2byte	0x4
-	.byte	0xf3
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-	.4byte	.LVL717
-	.4byte	.LVL718
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-	.4byte	.LVL718
-	.4byte	.LFE394
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-	.4byte	.LVL714
-	.4byte	.LVL715
-	.2byte	0x2
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-	.4byte	.LVL710
-	.4byte	.LVL711
-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL708
-	.4byte	.LVL709
-	.2byte	0x2
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-	.4byte	.LVL712
-	.2byte	0x1
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-	.4byte	.LVL713
-	.2byte	0x3
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-	.4byte	.LVL702
-	.4byte	.LVL703
-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL700
-	.4byte	.LVL701
-	.2byte	0x2
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-	.4byte	.LVL704
-	.2byte	0x1
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-	.4byte	.LVL704
-	.4byte	.LVL705
-	.2byte	0x3
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-	.4byte	.LVL707
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-	.4byte	.LFE392
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-	.4byte	.LVL692
-	.4byte	.LVL693
-	.2byte	0x1
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-	.4byte	.LVL694
-	.2byte	0x1
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-	.4byte	.LVL694
-	.4byte	.LVL695
-	.2byte	0x1
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-	.4byte	.LVL697
-	.2byte	0x1
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-	.4byte	.LVL697
-	.4byte	.LVL698
-	.2byte	0x1
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-	.4byte	.LVL699
-	.4byte	.LFE391
-	.2byte	0x1
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-	.4byte	.LVL1977
-	.4byte	.LVL1978
-	.2byte	0x1
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-	.4byte	.LVL1978
-	.4byte	.LVL1985
-	.2byte	0x4
-	.byte	0xf3
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-	.4byte	.LVL1985
-	.4byte	.LVL1986
-	.2byte	0x1
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-	.4byte	.LVL1986
-	.4byte	.LFE390
-	.2byte	0x4
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-	.uleb128 0x1
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-	.4byte	.LVL1977
-	.4byte	.LVL1980
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1981
-	.4byte	.LVL1982
-	.2byte	0x2
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-	.4byte	.LVL1985
-	.4byte	.LVL1988
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1988
-	.4byte	.LFE390
-	.2byte	0x1
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-	.4byte	.LVL1999
-	.4byte	.LVL2000
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2000
-	.4byte	.LVL2015
-	.2byte	0x1
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-	.4byte	.LVL2015
-	.4byte	.LFE388
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.4byte	.LVL2007
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-	.2byte	0x1
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-	.4byte	.LVL2011
-	.2byte	0x1
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-	.4byte	.LVL1999
-	.4byte	.LVL2010
-	.2byte	0x3
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-	.4byte	.LVL2010
-	.4byte	.LVL2015
-	.2byte	0x1
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-	.4byte	.LFE388
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-	.4byte	.LVL2273
-	.4byte	.LVL2275
-	.2byte	0x1
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-	.4byte	.LVL2275
-	.4byte	.LFE387
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-	.4byte	.LVL681
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-	.2byte	0x1
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-	.4byte	.LVL685
-	.2byte	0x1
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-	.4byte	.LFE384
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-	.4byte	.LVL681
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-	.2byte	0x2
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-	.4byte	.LVL686
-	.2byte	0x1
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-	.4byte	.LFE384
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-	.4byte	.LVL683
-	.4byte	.LVL687
-	.2byte	0x1
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-	.4byte	.LVL683
-	.4byte	.LVL684
-	.2byte	0x1
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-	.4byte	.LVL679
-	.4byte	.LVL680
-	.2byte	0x2
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-	.4byte	.LVL680
-	.4byte	.LFE383
-	.2byte	0x1
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-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x1
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-	.4byte	.LVL669
-	.4byte	.LFE382
-	.2byte	0x4
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-	.uleb128 0x1
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-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x2
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-	.4byte	.LVL669
-	.4byte	.LVL676
-	.2byte	0x1
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-	.4byte	.LVL676
-	.4byte	.LVL677
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL678
-	.4byte	.LFE382
-	.2byte	0x1
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-	.4byte	.LVL673
-	.4byte	.LVL674-1
-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x2
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-	.4byte	.LVL670
-	.2byte	0x1
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-	.4byte	.LVL671
-	.2byte	0x1
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-	.4byte	.LVL671
-	.4byte	.LVL672
-	.2byte	0x2
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-	.sleb128 4
-	.4byte	.LVL672
-	.4byte	.LVL675
-	.2byte	0x1
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-	.4byte	.LFE382
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-	.4byte	.LVL2039
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL2047
-	.2byte	0x1
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-	.4byte	.LFE380
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-	.4byte	.LVL2049
-	.4byte	.LVL2050
-	.2byte	0x1
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-	.4byte	.LVL2039
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-	.2byte	0x2
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-	.4byte	.LVL2043
-	.2byte	0x1
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-	.4byte	.LVL2044
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
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-	.4byte	.LVL2045
-	.2byte	0x1
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-	.2byte	0x2
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-	.4byte	.LFE380
-	.2byte	0x1
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-	.4byte	.LVL2039
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-	.2byte	0x2
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-	.4byte	.LVL2041
-	.2byte	0x2
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-	.2byte	0x2
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-.LLST740:
-	.4byte	.LVL2931
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-	.2byte	0x4
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-	.2byte	0x1000
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-	.4byte	.LVL2938
-	.4byte	.LVL2939
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL2939
-	.4byte	.LVL2940
-	.2byte	0x3
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-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2940
-	.4byte	.LVL2942
-	.2byte	0x3
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-	.sleb128 -2
-	.byte	0x9f
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-	.4byte	0
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-	.4byte	.LVL2932
-	.4byte	.LVL2951
-	.2byte	0x1
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-	.4byte	.LFE379
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-	.4byte	.LVL2944
-	.4byte	.LVL2950
-	.2byte	0x4
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-	.sleb128 -80
-	.byte	0x9f
-	.4byte	.LVL2952
-	.4byte	.LFE379
-	.2byte	0x4
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-	.sleb128 -80
-	.byte	0x9f
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-	.4byte	.LVL2945
-	.4byte	.LVL2946
-	.2byte	0x2
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-	.2byte	0x1
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-	.4byte	.LVL2958
-	.2byte	0x1
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-	.2byte	0x3
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-	.sleb128 1
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-	.4byte	.LVL2953
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-	.2byte	0x1
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-	.2byte	0x2
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-	.sleb128 0
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-	.4byte	0
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-	.4byte	.LVL2945
-	.4byte	.LVL2946
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-	.4byte	.LVL2950
-	.2byte	0x1
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-	.4byte	.LVL2954
-	.2byte	0x1
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-	.4byte	.LVL867
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-	.2byte	0x2
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-	.4byte	.LVL884
-	.2byte	0x1
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-	.4byte	.LVL885
-	.2byte	0x3
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-	.sleb128 1
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-	.2byte	0x7
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-	.sleb128 -44
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-	.2byte	0x1
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-	.4byte	.LVL870
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-	.2byte	0x1
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-	.4byte	.LVL872
-	.2byte	0x1
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-	.2byte	0x3
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-	.sleb128 1
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-	.4byte	.LVL879
-	.2byte	0x1
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-	.4byte	.LVL873
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-	.4byte	.LVL870
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL867
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-	.2byte	0x2
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-	.4byte	.LVL888
-	.2byte	0x1
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-	.4byte	.LVL889
-	.4byte	.LVL892
-	.2byte	0x1
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-	.4byte	.LVL867
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-	.2byte	0x2
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-	.4byte	.LVL882
-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL657
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-	.2byte	0x1
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-.LLST248:
-	.4byte	.LVL661
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-	.4byte	.LVL2548
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-	.2byte	0x1
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-	.4byte	.LVL2551
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-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2553
-	.4byte	.LVL2554
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2554
-	.4byte	.LFE372
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST679:
-	.4byte	.LVL2549
-	.4byte	.LVL2552
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2553
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST680:
-	.4byte	.LVL2550
-	.4byte	.LVL2552
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL2553
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST681:
-	.4byte	.LVL2553
-	.4byte	.LVL2554
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2555
-	.4byte	.LVL2558
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2559
-	.4byte	.LVL2560
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2560
-	.4byte	.LVL2562
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2575
-	.4byte	.LVL2577
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2577
-	.4byte	.LVL2581
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2582
-	.4byte	.LVL2587
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2587
-	.4byte	.LVL2593
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2593
-	.4byte	.LVL2594
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2595
-	.4byte	.LVL2596
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2615
-	.4byte	.LVL2620
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2620
-	.4byte	.LVL2621
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2621
-	.4byte	.LVL2622-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2633
-	.4byte	.LVL2634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2634
-	.4byte	.LVL2635
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2635
-	.4byte	.LVL2636-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2641
-	.4byte	.LVL2642
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2642
-	.4byte	.LVL2644
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2646
-	.4byte	.LVL2650
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2650
-	.4byte	.LVL2651
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST682:
-	.4byte	.LVL2632
-	.4byte	.LVL2633
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL2653
-	.4byte	.LVL2656
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2659
-	.4byte	.LVL2662
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2703
-	.4byte	.LVL2704
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST683:
-	.4byte	.LVL2612
-	.4byte	.LVL2614
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2614
-	.4byte	.LVL2624
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2625
-	.4byte	.LVL2631
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2632
-	.4byte	.LVL2633
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2633
-	.4byte	.LVL2639
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL2640
-	.4byte	.LVL2645
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2646
-	.4byte	.LFE372
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST684:
-	.4byte	.LVL2571
-	.4byte	.LVL2575
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL2607
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST685:
-	.4byte	.LVL2568
-	.4byte	.LVL2575
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL2601
-	.4byte	.LVL2603
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL2607
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST686:
-	.4byte	.LVL2554
-	.4byte	.LVL2556-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2575
-	.4byte	.LVL2578-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2588
-	.4byte	.LVL2589
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2589
-	.4byte	.LVL2590
-	.2byte	0x5
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL2616
-	.4byte	.LVL2618
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2618
-	.4byte	.LVL2620
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -72
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL2643
-	.4byte	.LVL2645
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2647
-	.4byte	.LVL2648
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2648
-	.4byte	.LVL2649
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 -2
-	.4byte	0
-	.4byte	0
-.LLST687:
-	.4byte	.LVL2557
-	.4byte	.LVL2558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2558
-	.4byte	.LVL2566
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2566
-	.4byte	.LVL2569
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2579
-	.4byte	.LVL2580
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2580
-	.4byte	.LVL2582
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2587
-	.4byte	.LVL2607
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST688:
-	.4byte	.LVL2557
-	.4byte	.LVL2558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2558
-	.4byte	.LVL2573
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2579
-	.4byte	.LVL2580
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2580
-	.4byte	.LVL2582
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2587
-	.4byte	.LVL2610
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST689:
-	.4byte	.LVL2559
-	.4byte	.LVL2573
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2587
-	.4byte	.LVL2591
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2592
-	.4byte	.LVL2611
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2615
-	.4byte	.LVL2617
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2619
-	.4byte	.LVL2623
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2633
-	.4byte	.LVL2634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2634
-	.4byte	.LVL2645
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL2646
-	.4byte	.LFE372
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	0
-	.4byte	0
-.LLST690:
-	.4byte	.LVL2565
-	.4byte	.LVL2567
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2567
-	.4byte	.LVL2569
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2596
-	.4byte	.LVL2597
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2597
-	.4byte	.LVL2602
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2603
-	.4byte	.LVL2605
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2605
-	.4byte	.LVL2606
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST691:
-	.4byte	.LVL2622
-	.4byte	.LVL2623
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2636
-	.4byte	.LVL2637
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2638
-	.4byte	.LVL2645
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL2652
-	.4byte	.LVL2658
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL2658
-	.4byte	.LVL2659
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL2659
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST692:
-	.4byte	.LVL2666
-	.4byte	.LVL2675
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2679
-	.4byte	.LVL2701
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST693:
-	.4byte	.LVL2654
-	.4byte	.LVL2657
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2659
-	.4byte	.LVL2675
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2675
-	.4byte	.LVL2676
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2679
-	.4byte	.LVL2701
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2703
-	.4byte	.LVL2707
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST694:
-	.4byte	.LVL2654
-	.4byte	.LVL2657
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2659
-	.4byte	.LVL2673
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2679
-	.4byte	.LVL2693
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2693
-	.4byte	.LVL2695
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2703
-	.4byte	.LVL2707
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST695:
-	.4byte	.LVL2564
-	.4byte	.LVL2575
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2596
-	.4byte	.LVL2660
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2660
-	.4byte	.LVL2661
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2661
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST696:
-	.4byte	.LVL2548
-	.4byte	.LVL2551
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2553
-	.4byte	.LVL2564
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2575
-	.4byte	.LVL2596
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2604
-	.4byte	.LVL2605
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2609
-	.4byte	.LVL2631
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST697:
-	.4byte	.LVL2598
-	.4byte	.LVL2600
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2626
-	.4byte	.LVL2627
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2627
-	.4byte	.LVL2629
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 12
-	.4byte	.LVL2655
-	.4byte	.LVL2656
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2659
-	.4byte	.LVL2669
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2670
-	.4byte	.LVL2673
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2681
-	.4byte	.LVL2692
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2696
-	.4byte	.LVL2701
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST698:
-	.4byte	.LVL2548
-	.4byte	.LVL2551
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2553
-	.4byte	.LVL2561
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2561
-	.4byte	.LVL2563-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2563-1
-	.4byte	.LVL2575
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL2575
-	.4byte	.LVL2596
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2596
-	.4byte	.LFE372
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	0
-	.4byte	0
-.LLST699:
-	.4byte	.LVL2608
-	.4byte	.LVL2614
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2628
-	.4byte	.LVL2630
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST700:
-	.4byte	.LVL2608
-	.4byte	.LVL2614
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL2614
-	.4byte	.LVL2631
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST701:
-	.4byte	.LVL2612
-	.4byte	.LVL2613
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2613
-	.4byte	.LVL2614
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.4byte	.LVL2614
-	.4byte	.LVL2631
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL2645
-	.4byte	.LVL2646
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST702:
-	.4byte	.LVL2671
-	.4byte	.LVL2672
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 4
-	.4byte	.LVL2681
-	.4byte	.LVL2682-1
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST703:
-	.4byte	.LVL2686
-	.4byte	.LVL2689
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2689
-	.4byte	.LVL2690
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST704:
-	.4byte	.LVL2694
-	.4byte	.LVL2701
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST705:
-	.4byte	.LVL2697
-	.4byte	.LVL2698-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 4
-	.4byte	.LVL2698-1
-	.4byte	.LVL2699
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST608:
-	.4byte	.LVL2221
-	.4byte	.LVL2222
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2222
-	.4byte	.LVL2239
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2239
-	.4byte	.LFE371
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST609:
-	.4byte	.LVL2221
-	.4byte	.LVL2223-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST610:
-	.4byte	.LVL2224
-	.4byte	.LVL2225
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST611:
-	.4byte	.LVL2227
-	.4byte	.LVL2229-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2234
-	.4byte	.LVL2236
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2236
-	.4byte	.LVL2237
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST612:
-	.4byte	.LVL2227
-	.4byte	.LVL2233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2234
-	.4byte	.LVL2235
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST613:
-	.4byte	.LVL2226
-	.4byte	.LVL2228
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2228
-	.4byte	.LVL2229-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.4byte	.LVL2234
-	.4byte	.LVL2237
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST244:
-	.4byte	.LVL647
-	.4byte	.LVL650
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL650
-	.4byte	.LVL652
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL652
-	.4byte	.LVL655
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL655
-	.4byte	.LFE370
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST245:
-	.4byte	.LVL647
-	.4byte	.LVL649
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL649
-	.4byte	.LFE370
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST246:
-	.4byte	.LVL648
-	.4byte	.LVL651
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL651
-	.4byte	.LVL652
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL652
-	.4byte	.LVL653
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL654
-	.4byte	.LVL655
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL655
-	.4byte	.LVL656
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST297:
-	.4byte	.LVL852
-	.4byte	.LVL853
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL853
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL854
-	.4byte	.LVL855
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL856
-	.4byte	.LVL857
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL858
-	.4byte	.LFE368
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	0
-	.4byte	0
-.LLST665:
-	.4byte	.LVL2483
-	.4byte	.LVL2490
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2490
-	.4byte	.LFE366
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST666:
-	.4byte	.LVL2495
-	.4byte	.LVL2498
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2498
-	.4byte	.LVL2499
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 0
-	.4byte	.LVL2514
-	.4byte	.LVL2516
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2516
-	.4byte	.LVL2521
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2521
-	.4byte	.LVL2523
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2523
-	.4byte	.LVL2524
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2525
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2537
-	.4byte	.LVL2538-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2541
-	.4byte	.LVL2542
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST667:
-	.4byte	.LVL2500
-	.4byte	.LVL2501
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2508
-	.4byte	.LVL2509
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2509
-	.4byte	.LVL2511
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2511
-	.4byte	.LVL2512
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2513
-	.4byte	.LVL2514
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2517
-	.4byte	.LVL2519
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2519
-	.4byte	.LVL2520
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2522
-	.4byte	.LVL2523
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2525
-	.4byte	.LVL2526
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2526
-	.4byte	.LVL2527
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2527
-	.4byte	.LVL2528
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST668:
-	.4byte	.LVL2497
-	.4byte	.LVL2501
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2508
-	.4byte	.LVL2514
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST669:
-	.4byte	.LVL2526
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST670:
-	.4byte	.LVL2484
-	.4byte	.LVL2485
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2485
-	.4byte	.LVL2490
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL2490
-	.4byte	.LVL2492-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2492-1
-	.4byte	.LVL2502
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2508
-	.4byte	.LVL2529
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST671:
-	.4byte	.LVL2486
-	.4byte	.LVL2487
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2487
-	.4byte	.LVL2490
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL2490
-	.4byte	.LVL2492-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 12
-	.4byte	.LVL2492-1
-	.4byte	.LFE366
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST672:
-	.4byte	.LVL2488
-	.4byte	.LVL2489
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2489
-	.4byte	.LVL2490
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 16
-	.4byte	.LVL2490
-	.4byte	.LVL2492-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 16
-	.4byte	.LVL2492-1
-	.4byte	.LFE366
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST673:
-	.4byte	.LVL2488
-	.4byte	.LVL2502
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL2508
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST674:
-	.4byte	.LVL2493
-	.4byte	.LVL2502
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2508
-	.4byte	.LVL2529
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2530
-	.4byte	.LVL2534
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2539
-	.4byte	.LVL2541
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST675:
-	.4byte	.LVL2502
-	.4byte	.LVL2503
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2529
-	.4byte	.LFE366
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST676:
-	.4byte	.LVL2531
-	.4byte	.LVL2532
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2532
-	.4byte	.LVL2533
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2539
-	.4byte	.LVL2540-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2540-1
-	.4byte	.LVL2541
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST677:
-	.4byte	.LVL2536
-	.4byte	.LVL2538-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2541
-	.4byte	.LVL2543
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST663:
-	.4byte	.LVL2460
-	.4byte	.LVL2474
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2479
-	.4byte	.LVL2481
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2482
-	.4byte	.LFE365
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST664:
-	.4byte	.LVL2468
-	.4byte	.LVL2469
-	.2byte	0x12
-	.byte	0x71
-	.sleb128 0
-	.byte	0x33
-	.byte	0x25
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL2469
-	.4byte	.LVL2470-1
-	.2byte	0x1c
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST243:
-	.4byte	.LVL645
-	.4byte	.LVL646
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL646
-	.4byte	.LFE364
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST656:
-	.4byte	.LVL2397
-	.4byte	.LVL2403
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2403
-	.4byte	.LVL2404
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2404
-	.4byte	.LVL2405
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2407
-	.4byte	.LVL2408
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2408
-	.4byte	.LVL2409
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2410
-	.4byte	.LVL2415
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2415
-	.4byte	.LVL2416
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL2416
-	.4byte	.LVL2426
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2427
-	.4byte	.LVL2444
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST657:
-	.4byte	.LVL2396
-	.4byte	.LVL2405
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2406
-	.4byte	.LVL2409
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2444
-	.4byte	.LVL2447
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2447
-	.4byte	.LVL2448
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL2448
-	.4byte	.LFE361
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST658:
-	.4byte	.LVL2399
-	.4byte	.LVL2404
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL2411
-	.4byte	.LVL2444
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST659:
-	.4byte	.LVL2397
-	.4byte	.LVL2401
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2402
-	.4byte	.LVL2444
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST660:
-	.4byte	.LVL2423
-	.4byte	.LVL2424
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2424
-	.4byte	.LVL2425
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL2427
-	.4byte	.LVL2428
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2435
-	.4byte	.LVL2436
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2436
-	.4byte	.LVL2437
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL2438
-	.4byte	.LVL2439
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2449
-	.4byte	.LVL2453
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2454
-	.4byte	.LVL2455
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2455
-	.4byte	.LFE361
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST661:
-	.4byte	.LVL2412
-	.4byte	.LVL2414
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2416
-	.4byte	.LVL2417
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2417
-	.4byte	.LVL2418
-	.2byte	0x5
-	.byte	0x41
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2422
-	.4byte	.LVL2429
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2430
-	.4byte	.LVL2431
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2434
-	.4byte	.LVL2440
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2441
-	.4byte	.LVL2442
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2450
-	.4byte	.LVL2451
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2452
-	.4byte	.LVL2453
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2455
-	.4byte	.LVL2456
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2457
-	.4byte	.LFE361
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST662:
-	.4byte	.LVL2411
-	.4byte	.LVL2444
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST650:
-	.4byte	.LVL2375
-	.4byte	.LVL2378
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2378
-	.4byte	.LVL2383
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2383
-	.4byte	.LVL2384-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2384-1
-	.4byte	.LVL2384
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2384
-	.4byte	.LVL2390
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2390
-	.4byte	.LFE359
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST651:
-	.4byte	.LVL2385
-	.4byte	.LVL2386-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2387
-	.4byte	.LVL2388
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2388
-	.4byte	.LVL2389-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+4
-	.4byte	0
-	.4byte	0
-.LLST652:
-	.4byte	.LVL2375
-	.4byte	.LVL2376
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2390
-	.4byte	.LFE359
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST653:
-	.4byte	.LVL2375
-	.4byte	.LVL2378
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL2378
-	.4byte	.LVL2381-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	.LVL2390
-	.4byte	.LFE359
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST654:
-	.4byte	.LVL2377
-	.4byte	.LVL2378
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x70
-	.sleb128 12
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2378
-	.4byte	.LVL2379
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x74
-	.sleb128 12
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2379
-	.4byte	.LVL2380
-	.2byte	0x15
-	.byte	0x74
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x74
-	.sleb128 12
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST655:
-	.4byte	.LVL2380
-	.4byte	.LVL2382
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST622:
-	.4byte	.LVL2264
-	.4byte	.LVL2268
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2268
-	.4byte	.LVL2272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2272
-	.4byte	.LFE357
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST623:
-	.4byte	.LVL2264
-	.4byte	.LVL2265
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.4byte	.LVL2265
-	.4byte	.LVL2266
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2267
-	.4byte	.LVL2269
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2272
-	.4byte	.LFE357
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST642:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2348
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST643:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2348
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST644:
-	.4byte	.LVL2346
-	.4byte	.LVL2347
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2347
-	.4byte	.LFE356
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST645:
-	.4byte	.LVL2353
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST646:
-	.4byte	.LVL2353
-	.4byte	.LVL2367
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST647:
-	.4byte	.LVL2351
-	.4byte	.LVL2352-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2352-1
-	.4byte	.LVL2355
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2355
-	.4byte	.LVL2356-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2356-1
-	.4byte	.LVL2360
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL2365
-	.4byte	.LVL2366-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST648:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2348
-	.4byte	.LVL2349
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2350
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST649:
-	.4byte	.LVL2346
-	.4byte	.LVL2348
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL2348
-	.4byte	.LVL2349
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2350
-	.4byte	.LVL2367
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2367
-	.4byte	.LFE356
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST614:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2242
-	.4byte	.LVL2253
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2257
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST615:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2242
-	.4byte	.LVL2252
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2257
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST616:
-	.4byte	.LVL2240
-	.4byte	.LVL2241
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2241
-	.4byte	.LVL2244
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2244
-	.4byte	.LVL2245
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL2245
-	.4byte	.LVL2258
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2258
-	.4byte	.LVL2259
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2259
-	.4byte	.LFE355
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST617:
-	.4byte	.LVL2249
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST618:
-	.4byte	.LVL2248
-	.4byte	.LVL2262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST619:
-	.4byte	.LVL2246
-	.4byte	.LVL2247-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2247-1
-	.4byte	.LVL2259
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL2259
-	.4byte	.LVL2260
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2260
-	.4byte	.LVL2262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST620:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2242
-	.4byte	.LVL2243
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2245
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST621:
-	.4byte	.LVL2240
-	.4byte	.LVL2242
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL2242
-	.4byte	.LVL2243
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2245
-	.4byte	.LVL2255
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2255
-	.4byte	.LVL2256-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2256-1
-	.4byte	.LVL2257
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2257
-	.4byte	.LVL2262
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2262
-	.4byte	.LFE355
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST600:
-	.4byte	.LVL2191
-	.4byte	.LVL2196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2196
-	.4byte	.LFE354
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST601:
-	.4byte	.LVL2191
-	.4byte	.LVL2194
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2194
-	.4byte	.LFE354
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST602:
-	.4byte	.LVL2191
-	.4byte	.LVL2195
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2195
-	.4byte	.LFE354
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST603:
-	.4byte	.LVL2198
-	.4byte	.LVL2199
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2200
-	.4byte	.LVL2202
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2202
-	.4byte	.LVL2203-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2208
-	.4byte	.LVL2210
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2211
-	.4byte	.LVL2212
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST604:
-	.4byte	.LVL2203
-	.4byte	.LVL2208
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2212
-	.4byte	.LFE354
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST605:
-	.4byte	.LVL2203
-	.4byte	.LVL2208
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2212
-	.4byte	.LFE354
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST606:
-	.4byte	.LVL2214
-	.4byte	.LVL2215
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2215
-	.4byte	.LFE354
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	0
-	.4byte	0
-.LLST607:
-	.4byte	.LVL2206
-	.4byte	.LVL2208
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2212
-	.4byte	.LVL2216
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2216
-	.4byte	.LVL2217-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST599:
-	.4byte	.LVL2184
-	.4byte	.LVL2185
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2186
-	.4byte	.LVL2187
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2187
-	.4byte	.LVL2188
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2188
-	.4byte	.LVL2189-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2189-1
-	.4byte	.LVL2189
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2189
-	.4byte	.LVL2190
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST236:
-	.4byte	.LVL617
-	.4byte	.LVL618
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL619
-	.4byte	.LVL620
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL620
-	.4byte	.LVL621
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL622
-	.4byte	.LVL623
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL624
-	.4byte	.LVL628
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL628
-	.4byte	.LVL629
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL630
-	.4byte	.LVL632
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL632
-	.4byte	.LVL633
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL633
-	.4byte	.LVL634
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL636
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL636
-	.4byte	.LVL637
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL637
-	.4byte	.LFE352
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST237:
-	.4byte	.LVL624
-	.4byte	.LVL628
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL634
-	.4byte	.LFE352
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST238:
-	.4byte	.LVL622
-	.4byte	.LVL623
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL624
-	.4byte	.LVL625
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL630
-	.4byte	.LVL631
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL634
-	.4byte	.LVL635
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL636
-	.4byte	.LFE352
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST597:
-	.4byte	.LVL2179
-	.4byte	.LVL2180
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2180
-	.4byte	.LFE351
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST598:
-	.4byte	.LVL2181
-	.4byte	.LVL2182
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2182
-	.4byte	.LVL2183-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST586:
-	.4byte	.LVL2139
-	.4byte	.LVL2140
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2140
-	.4byte	.LVL2144
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2144
-	.4byte	.LVL2148
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2148
-	.4byte	.LFE349
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST587:
-	.4byte	.LVL2149
-	.4byte	.LVL2150
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2150
-	.4byte	.LVL2151
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2151
-	.4byte	.LVL2153
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2156
-	.4byte	.LVL2159
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2159
-	.4byte	.LVL2160
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST588:
-	.4byte	.LVL2149
-	.4byte	.LVL2150
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2150
-	.4byte	.LVL2152
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2156
-	.4byte	.LVL2157
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2158
-	.4byte	.LFE349
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST589:
-	.4byte	.LVL2139
-	.4byte	.LVL2140
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL2140
-	.4byte	.LVL2141-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 12
-	.4byte	.LVL2144
-	.4byte	.LVL2145
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST590:
-	.4byte	.LVL2139
-	.4byte	.LVL2140
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL2140
-	.4byte	.LVL2141-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	.LVL2144
-	.4byte	.LVL2146
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST591:
-	.4byte	.LVL2145
-	.4byte	.LVL2147
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST579:
-	.4byte	.LVL2108
-	.4byte	.LVL2111-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2111-1
-	.4byte	.LFE348
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST580:
-	.4byte	.LVL2113
-	.4byte	.LVL2119
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL2128
-	.4byte	.LFE348
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST581:
-	.4byte	.LVL2111
-	.4byte	.LVL2114
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2121
-	.4byte	.LVL2124
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2124
-	.4byte	.LVL2127
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2127
-	.4byte	.LVL2128
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST582:
-	.4byte	.LVL2117
-	.4byte	.LVL2118-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2118-1
-	.4byte	.LVL2119
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2128
-	.4byte	.LVL2129
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2129
-	.4byte	.LVL2135
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL2135
-	.4byte	.LVL2136
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2136
-	.4byte	.LVL2137
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2137
-	.4byte	.LFE348
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST583:
-	.4byte	.LVL2121
-	.4byte	.LVL2122
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2123
-	.4byte	.LVL2124
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2124
-	.4byte	.LVL2125
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST584:
-	.4byte	.LVL2109
-	.4byte	.LVL2116
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2121
-	.4byte	.LVL2128
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST585:
-	.4byte	.LVL2130
-	.4byte	.LVL2131-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2131-1
-	.4byte	.LVL2135
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2137
-	.4byte	.LFE348
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST290:
-	.4byte	.LVL827
-	.4byte	.LVL830
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL830
-	.4byte	.LFE346
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST291:
-	.4byte	.LVL829
-	.4byte	.LVL834
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL838
-	.4byte	.LVL845
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST292:
-	.4byte	.LVL839
-	.4byte	.LVL845
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST293:
-	.4byte	.LVL831
-	.4byte	.LVL832
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL832
-	.4byte	.LVL833
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL833
-	.4byte	.LVL835
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL838
-	.4byte	.LVL840
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL840
-	.4byte	.LVL841
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL842
-	.4byte	.LVL845
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST294:
-	.4byte	.LVL833
-	.4byte	.LVL836
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL837
-	.4byte	.LVL838
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL839
-	.4byte	.LVL843
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL843
-	.4byte	.LVL844
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL845
-	.4byte	.LVL847
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL847
-	.4byte	.LVL849
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL849
-	.4byte	.LVL850
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL850
-	.4byte	.LFE346
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST295:
-	.4byte	.LVL833
-	.4byte	.LVL836
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL837
-	.4byte	.LVL838
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL845
-	.4byte	.LVL848-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL848-1
-	.4byte	.LVL849
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST296:
-	.4byte	.LVL833
-	.4byte	.LVL836
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST220:
-	.4byte	.LVL573
-	.4byte	.LVL576
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL577
-	.4byte	.LVL578
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL580
-	.4byte	.LVL582
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST221:
-	.4byte	.LVL573
-	.4byte	.LVL581
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL581
-	.4byte	.LVL583
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST222:
-	.4byte	.LVL574
-	.4byte	.LVL575
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL579
-	.4byte	.LVL583
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST214:
-	.4byte	.LVL560
-	.4byte	.LVL566-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL566-1
-	.4byte	.LVL567
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL567
-	.4byte	.LVL572
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL572
-	.4byte	.LFE342
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST215:
-	.4byte	.LVL560
-	.4byte	.LVL565
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL567
-	.4byte	.LVL568
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL570
-	.4byte	.LFE342
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST216:
-	.4byte	.LVL560
-	.4byte	.LVL561
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL561
-	.4byte	.LVL571
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL571
-	.4byte	.LFE342
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST217:
-	.4byte	.LVL560
-	.4byte	.LVL564
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL564
-	.4byte	.LVL567
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL567
-	.4byte	.LFE342
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST218:
-	.4byte	.LVL562
-	.4byte	.LVL563
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL567
-	.4byte	.LVL571
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST219:
-	.4byte	.LVL560
-	.4byte	.LVL562
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL571
-	.4byte	.LFE342
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST211:
-	.4byte	.LVL546
-	.4byte	.LVL549
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL549
-	.4byte	.LFE341
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST212:
-	.4byte	.LVL546
-	.4byte	.LVL548
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL548
-	.4byte	.LFE341
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST213:
-	.4byte	.LVL553
-	.4byte	.LVL554
-	.2byte	0x10
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL554
-	.4byte	.LVL555
-	.2byte	0x12
-	.byte	0x75
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL556
-	.4byte	.LVL557
-	.2byte	0x10
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL558
-	.4byte	.LVL559
-	.2byte	0x12
-	.byte	0x75
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST206:
-	.4byte	.LVL523
-	.4byte	.LVL526
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL526
-	.4byte	.LVL527
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL527
-	.4byte	.LFE340
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST207:
-	.4byte	.LVL524
-	.4byte	.LVL525
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL527
-	.4byte	.LVL539
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL539
-	.4byte	.LFE340
-	.2byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST208:
-	.4byte	.LVL529
-	.4byte	.LVL530
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL531
-	.4byte	.LVL533
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL534
-	.4byte	.LVL535
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST209:
-	.4byte	.LVL529
-	.4byte	.LVL531
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL531
-	.4byte	.LVL534
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL534
-	.4byte	.LVL536
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL536
-	.4byte	.LVL537
-	.2byte	0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL538
-	.4byte	.LVL540
-	.2byte	0x5
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST194:
-	.4byte	.LVL468
-	.4byte	.LVL469
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL470
-	.4byte	.LVL477
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL479
-	.4byte	.LVL480
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL480
-	.4byte	.LFE336
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST195:
-	.4byte	.LVL472
-	.4byte	.LVL475
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST191:
-	.4byte	.LVL458
-	.4byte	.LVL459
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL459
-	.4byte	.LFE335
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST192:
-	.4byte	.LVL458
-	.4byte	.LVL463
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL466
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL466
-	.4byte	.LFE335
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST193:
-	.4byte	.LVL460
-	.4byte	.LVL461
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL462
-	.4byte	.LVL465
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL466
-	.4byte	.LFE335
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST189:
-	.4byte	.LVL450
-	.4byte	.LVL451
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL452
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL452
-	.4byte	.LVL454
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL456
-	.4byte	.LFE334
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST190:
-	.4byte	.LVL455
-	.4byte	.LVL457
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL457
-	.4byte	.LFE334
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST185:
-	.4byte	.LVL443
-	.4byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL445-1
-	.4byte	.LFE333
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST186:
-	.4byte	.LVL443
-	.4byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL445-1
-	.4byte	.LFE333
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST187:
-	.4byte	.LVL444
-	.4byte	.LVL449
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST188:
-	.4byte	.LVL446
-	.4byte	.LVL448
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST289:
-	.4byte	.LVL824
-	.4byte	.LVL825
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL825
-	.4byte	.LVL826-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.4byte	.LVL826-1
-	.4byte	.LFE330
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST570:
-	.4byte	.LVL2063
-	.4byte	.LVL2065
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2065
-	.4byte	.LFE329
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST571:
-	.4byte	.LVL2063
-	.4byte	.LVL2064
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2064
-	.4byte	.LVL2070-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2070-1
-	.4byte	.LFE329
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST572:
-	.4byte	.LVL2067
-	.4byte	.LVL2071
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2071
-	.4byte	.LVL2072
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2073
-	.4byte	.LFE329
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST573:
-	.4byte	.LVL2074
-	.4byte	.LVL2076
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2076
-	.4byte	.LVL2078
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2078
-	.4byte	.LVL2079
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2079
-	.4byte	.LFE329
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST574:
-	.4byte	.LVL2066
-	.4byte	.LVL2068
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2068
-	.4byte	.LVL2069
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST183:
-	.4byte	.LVL438
-	.4byte	.LVL439
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL439
-	.4byte	.LVL440
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL440
-	.4byte	.LVL441
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL441
-	.4byte	.LFE328
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST184:
-	.4byte	.LVL438
-	.4byte	.LVL440
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL440
-	.4byte	.LVL442
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL442
-	.4byte	.LFE328
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST181:
-	.4byte	.LVL434
-	.4byte	.LVL435-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL435-1
-	.4byte	.LFE327
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST182:
-	.4byte	.LVL436
-	.4byte	.LVL437-1
-	.2byte	0x11
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST179:
-	.4byte	.LVL430
-	.4byte	.LVL432-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL432-1
-	.4byte	.LFE326
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST180:
-	.4byte	.LVL431
-	.4byte	.LVL432-1
-	.2byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST176:
-	.4byte	.LVL425
-	.4byte	.LVL428-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL428-1
-	.4byte	.LFE325
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST177:
-	.4byte	.LVL425
-	.4byte	.LVL427
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL427
-	.4byte	.LFE325
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST178:
-	.4byte	.LVL426
-	.4byte	.LVL428-1
-	.2byte	0x20
-	.byte	0x77
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST575:
-	.4byte	.LVL2095
-	.4byte	.LVL2096
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2103
-	.4byte	.LVL2104
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2104
-	.4byte	.LVL2105
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2105
-	.4byte	.LVL2106
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST576:
-	.4byte	.LVL2083
-	.4byte	.LVL2086
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2096
-	.4byte	.LVL2097
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2098
-	.4byte	.LVL2099
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST577:
-	.4byte	.LVL2089
-	.4byte	.LVL2094
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2099
-	.4byte	.LVL2101
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2102
-	.4byte	.LVL2103
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST578:
-	.4byte	.LVL2081
-	.4byte	.LVL2093
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2096
-	.4byte	.LVL2103
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2106
-	.4byte	.LVL2107
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST568:
-	.4byte	.LVL2055
-	.4byte	.LVL2061
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2062
-	.4byte	.LFE321
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST569:
-	.4byte	.LVL2056
-	.4byte	.LVL2057
-	.2byte	0x13
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL2057
-	.4byte	.LVL2058
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 15
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL2058
-	.4byte	.LVL2059-1
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST287:
-	.4byte	.LVL816
-	.4byte	.LVL818
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL818
-	.4byte	.LVL822
-	.2byte	0x4
-	.byte	0x75
-	.sleb128 -1022
-	.byte	0x9f
-	.4byte	.LVL822
-	.4byte	.LFE319
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST288:
-	.4byte	.LVL816
-	.4byte	.LVL817
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL817
-	.4byte	.LVL822
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL822
-	.4byte	.LFE319
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST171:
-	.4byte	.LVL418
-	.4byte	.LVL420-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL420-1
-	.4byte	.LFE317
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST172:
-	.4byte	.LVL419
-	.4byte	.LVL424
-	.2byte	0x10
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST173:
-	.4byte	.LVL421
-	.4byte	.LVL422-1
-	.2byte	0x32
-	.byte	0x74
-	.sleb128 0
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST174:
-	.4byte	.LVL421
-	.4byte	.LVL422-1
-	.2byte	0x19
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST175:
-	.4byte	.LVL421
-	.4byte	.LVL423
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST167:
-	.4byte	.LVL410
-	.4byte	.LVL411-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL411-1
-	.4byte	.LFE316
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST168:
-	.4byte	.LVL412
-	.4byte	.LVL417
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST169:
-	.4byte	.LVL414
-	.4byte	.LVL415
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST170:
-	.4byte	.LVL414
-	.4byte	.LVL416-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST635:
-	.4byte	.LVL2314
-	.4byte	.LVL2316
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2316
-	.4byte	.LVL2317
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2317
-	.4byte	.LVL2318-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2318-1
-	.4byte	.LVL2336
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2336
-	.4byte	.LVL2337
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2337
-	.4byte	.LFE309
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST636:
-	.4byte	.LVL2314
-	.4byte	.LVL2316
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2316
-	.4byte	.LVL2317
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2317
-	.4byte	.LVL2318-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2318-1
-	.4byte	.LVL2321
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2321
-	.4byte	.LVL2336
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2336
-	.4byte	.LFE309
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST637:
-	.4byte	.LVL2314
-	.4byte	.LVL2315
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2315
-	.4byte	.LFE309
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST638:
-	.4byte	.LVL2322
-	.4byte	.LVL2327
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST639:
-	.4byte	.LVL2323
-	.4byte	.LVL2324
-	.2byte	0x21
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x75
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST640:
-	.4byte	.LVL2320
-	.4byte	.LVL2325
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2325
-	.4byte	.LVL2336
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST641:
-	.4byte	.LVL2332
-	.4byte	.LVL2333-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST764:
-	.4byte	.LVL3020
-	.4byte	.LVL3023
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3023
-	.4byte	.LVL3025
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL3025
-	.4byte	.LVL3027
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3027
-	.4byte	.LVL3105
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL3105
-	.4byte	.LVL3106
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3106
-	.4byte	.LFE308
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST765:
-	.4byte	.LVL3020
-	.4byte	.LVL3022
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3022
-	.4byte	.LVL3025
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3025
-	.4byte	.LVL3029
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3029
-	.4byte	.LVL3061
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3061
-	.4byte	.LVL3063
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL3063
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3105
-	.4byte	.LVL3107
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST766:
-	.4byte	.LVL3020
-	.4byte	.LVL3021
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3021
-	.4byte	.LVL3024
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3025
-	.4byte	.LVL3028
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3028
-	.4byte	.LVL3036
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3053
-	.4byte	.LVL3063
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3063
-	.4byte	.LVL3064
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3064
-	.4byte	.LVL3067
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL3105
-	.4byte	.LVL3107
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	0
-	.4byte	0
-.LLST767:
-	.4byte	.LVL3020
-	.4byte	.LVL3024-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3024-1
-	.4byte	.LVL3024
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3025
-	.4byte	.LVL3026
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3026
-	.4byte	.LVL3036
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3053
-	.4byte	.LVL3065
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3065
-	.4byte	.LVL3066-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3066-1
-	.4byte	.LVL3067
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	.LVL3105
-	.4byte	.LFE308
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -108
-	.4byte	0
-	.4byte	0
-.LLST768:
-	.4byte	.LVL3071
-	.4byte	.LVL3100
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST769:
-	.4byte	.LVL3035
-	.4byte	.LVL3036
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL3036
-	.4byte	.LVL3053
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3067
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST770:
-	.4byte	.LVL3031
-	.4byte	.LVL3032
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3032
-	.4byte	.LVL3062
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL3062
-	.4byte	.LVL3065
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3065
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST771:
-	.4byte	.LVL3034
-	.4byte	.LVL3035-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3035-1
-	.4byte	.LVL3036
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL3053
-	.4byte	.LVL3055
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3055
-	.4byte	.LVL3067
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	0
-	.4byte	0
-.LLST772:
-	.4byte	.LVL3069
-	.4byte	.LVL3070
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3070
-	.4byte	.LVL3072
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 4
-	.4byte	.LVL3072
-	.4byte	.LVL3073-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	req_prgm
-	.byte	0x6
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST773:
-	.4byte	.LVL3045
-	.4byte	.LVL3048
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3048
-	.4byte	.LVL3050
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL3067
-	.4byte	.LVL3089
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3089
-	.4byte	.LVL3090
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3090
-	.4byte	.LVL3100
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST774:
-	.4byte	.LVL3034
-	.4byte	.LVL3035-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3035-1
-	.4byte	.LVL3045
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3049
-	.4byte	.LVL3051
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3051
-	.4byte	.LVL3053
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3053
-	.4byte	.LVL3054
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3054
-	.4byte	.LVL3060
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3060
-	.4byte	.LVL3067
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL3100
-	.4byte	.LVL3104
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -104
-	.4byte	.LVL3104
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST775:
-	.4byte	.LVL3040
-	.4byte	.LVL3041
-	.2byte	0x22
-	.byte	0x3
-	.4byte	g_active_superblock+7
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x91
-	.sleb128 -104
-	.byte	0x6
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	.LVL3041
-	.4byte	.LVL3042
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3042
-	.4byte	.LVL3045
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL3046
-	.4byte	.LVL3047
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3047
-	.4byte	.LVL3048
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3048
-	.4byte	.LVL3050
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3100
-	.4byte	.LVL3105
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST776:
-	.4byte	.LVL3035
-	.4byte	.LVL3036
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3057
-	.4byte	.LVL3058
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3058
-	.4byte	.LVL3060-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3074
-	.4byte	.LVL3077
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3079
-	.4byte	.LVL3081
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3081
-	.4byte	.LVL3083
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL3084
-	.4byte	.LVL3086
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL3091
-	.4byte	.LVL3093
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	0
-	.4byte	0
-.LLST777:
-	.4byte	.LVL3035
-	.4byte	.LVL3036
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3057
-	.4byte	.LVL3067
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3075
-	.4byte	.LVL3076
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3076
-	.4byte	.LVL3077
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3079
-	.4byte	.LVL3080
-	.2byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3080
-	.4byte	.LVL3082
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3082
-	.4byte	.LVL3083
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3084
-	.4byte	.LVL3085
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3085
-	.4byte	.LVL3086
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3091
-	.4byte	.LVL3092
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3092
-	.4byte	.LVL3093
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL3107
-	.4byte	.LFE308
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST778:
-	.4byte	.LVL3035
-	.4byte	.LVL3053
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	.LVL3067
-	.4byte	.LVL3105
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST625:
-	.4byte	.LVL2286
-	.4byte	.LVL2291
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2291
-	.4byte	.LVL2292
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL2292
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST626:
-	.4byte	.LVL2286
-	.4byte	.LVL2290
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2290
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL2312
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST627:
-	.4byte	.LVL2286
-	.4byte	.LVL2289
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2289
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST628:
-	.4byte	.LVL2286
-	.4byte	.LVL2287
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2287
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2312
-	.4byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST629:
-	.4byte	.LVL2292
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST630:
-	.4byte	.LVL2302
-	.4byte	.LVL2303-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2303-1
-	.4byte	.LVL2309
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST631:
-	.4byte	.LVL2293
-	.4byte	.LVL2294
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2304
-	.4byte	.LVL2305
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST632:
-	.4byte	.LVL2288
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST633:
-	.4byte	.LVL2301
-	.4byte	.LVL2303-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST634:
-	.4byte	.LVL2286
-	.4byte	.LVL2288
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2288
-	.4byte	.LVL2312
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST746:
-	.4byte	.LVL2960
-	.4byte	.LVL2963
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2963
-	.4byte	.LVL2966
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2966
-	.4byte	.LVL2969
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2969
-	.4byte	.LVL3018
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL3018
-	.4byte	.LVL3019
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3019
-	.4byte	.LFE305
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST747:
-	.4byte	.LVL2960
-	.4byte	.LVL2962
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2962
-	.4byte	.LVL2966
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2966
-	.4byte	.LVL2970-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2970-1
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST748:
-	.4byte	.LVL2960
-	.4byte	.LVL2961
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2961
-	.4byte	.LVL2966
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL2966
-	.4byte	.LVL2968
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2968
-	.4byte	.LFE305
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST749:
-	.4byte	.LVL2960
-	.4byte	.LVL2964-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2964-1
-	.4byte	.LVL2966
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2966
-	.4byte	.LVL2967
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2967
-	.4byte	.LFE305
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST750:
-	.4byte	.LVL2960
-	.4byte	.LVL2965
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2966
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST751:
-	.4byte	.LVL2972
-	.4byte	.LVL2973
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2973
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST752:
-	.4byte	.LVL2975
-	.4byte	.LVL2978
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2978
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST753:
-	.4byte	.LVL3001
-	.4byte	.LVL3002
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3002
-	.4byte	.LVL3003-1
-	.2byte	0x12
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST754:
-	.4byte	.LVL2976
-	.4byte	.LVL2978
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL2978
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST755:
-	.4byte	.LVL2987
-	.4byte	.LVL2988
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2988
-	.4byte	.LVL3000
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3014
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST756:
-	.4byte	.LVL2976
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2978
-	.4byte	.LVL2999
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL3000
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST757:
-	.4byte	.LVL2976
-	.4byte	.LVL2977
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2977
-	.4byte	.LVL2978
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2978
-	.4byte	.LVL2980
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL2980
-	.4byte	.LVL2981-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2981-1
-	.4byte	.LVL2984
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL2984
-	.4byte	.LVL2985
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL2985
-	.4byte	.LVL2986
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2986
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	0
-	.4byte	0
-.LLST758:
-	.4byte	.LVL2978
-	.4byte	.LVL3007
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL3007
-	.4byte	.LVL3010
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3010
-	.4byte	.LVL3018
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST759:
-	.4byte	.LVL2966
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2978
-	.4byte	.LVL3007
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL3007
-	.4byte	.LVL3008
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3008
-	.4byte	.LVL3009
-	.2byte	0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3009
-	.4byte	.LVL3010
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3010
-	.4byte	.LVL3018
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST760:
-	.4byte	.LVL2966
-	.4byte	.LVL2978
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2978
-	.4byte	.LVL3012
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL3012
-	.4byte	.LVL3013
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3013
-	.4byte	.LVL3018
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL3018
-	.4byte	.LFE305
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST761:
-	.4byte	.LVL2982
-	.4byte	.LVL2983
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL3000
-	.4byte	.LVL3005
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST762:
-	.4byte	.LVL2993
-	.4byte	.LVL2994
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2994
-	.4byte	.LVL2995
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x802
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2995
-	.4byte	.LVL2996
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x801
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3015
-	.4byte	.LVL3016
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x801
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL3016
-	.4byte	.LVL3018
-	.2byte	0x8
-	.byte	0xa
-	.2byte	0x802
-	.byte	0x91
-	.sleb128 -48
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST763:
-	.4byte	.LVL2992
-	.4byte	.LVL2997
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL3015
-	.4byte	.LVL3018
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST798:
-	.4byte	.LVL3190
-	.4byte	.LVL3192
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3194
-	.4byte	.LVL3195
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3207
-	.4byte	.LVL3209
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3212
-	.4byte	.LVL3213
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL3217
-	.4byte	.LVL3218
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3220
-	.4byte	.LVL3221
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3221
-	.4byte	.LVL3222-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3224
-	.4byte	.LVL3225
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST799:
-	.4byte	.LVL3194
-	.4byte	.LVL3200
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3221
-	.4byte	.LVL3223
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL3224
-	.4byte	.LVL3225
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST800:
-	.4byte	.LVL3188
-	.4byte	.LVL3191
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3191
-	.4byte	.LVL3193
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3207
-	.4byte	.LVL3210
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3211
-	.4byte	.LVL3216
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL3216
-	.4byte	.LVL3217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST801:
-	.4byte	.LVL3186
-	.4byte	.LVL3187
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL3187
-	.4byte	.LVL3189
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3205
-	.4byte	.LVL3206
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3206
-	.4byte	.LVL3207
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST528:
-	.4byte	.LVL1815
-	.4byte	.LVL1818
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1818
-	.4byte	.LVL1874
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST529:
-	.4byte	.LVL1815
-	.4byte	.LVL1816
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1816
-	.4byte	.LVL1874
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST530:
-	.4byte	.LVL1817
-	.4byte	.LVL1821
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1837
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1838
-	.4byte	.LVL1848
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1849
-	.4byte	.LVL1851
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1852
-	.4byte	.LVL1867
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1868
-	.4byte	.LVL1874
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST531:
-	.4byte	.LVL1817
-	.4byte	.LVL1821
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1826
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1826
-	.4byte	.LVL1827
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1827
-	.4byte	.LVL1837
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1838
-	.4byte	.LVL1843
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1844
-	.4byte	.LVL1862
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1863
-	.4byte	.LVL1874
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST532:
-	.4byte	.LVL1820
-	.4byte	.LVL1821
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1822
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1824
-	.4byte	.LVL1826
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1826
-	.4byte	.LVL1827
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1827
-	.4byte	.LVL1828
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1828
-	.4byte	.LVL1829
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1831
-	.4byte	.LVL1832
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1832
-	.4byte	.LVL1835
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1836
-	.4byte	.LVL1837
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1838
-	.4byte	.LVL1845
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1845
-	.4byte	.LVL1846
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1847
-	.4byte	.LVL1850
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1850
-	.4byte	.LVL1853
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1853
-	.4byte	.LVL1854
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1855
-	.4byte	.LVL1857
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1857
-	.4byte	.LVL1864
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1864
-	.4byte	.LVL1865
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1866
-	.4byte	.LVL1869
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1869
-	.4byte	.LVL1870
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1871
-	.4byte	.LVL1872
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1872
-	.4byte	.LVL1873
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST533:
-	.4byte	.LVL1840
-	.4byte	.LVL1841-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1859
-	.4byte	.LVL1860-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST534:
-	.4byte	.LVL1815
-	.4byte	.LVL1825
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1856
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1856
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST535:
-	.4byte	.LVL1815
-	.4byte	.LVL1826
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1826
-	.4byte	.LVL1833
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1834
-	.4byte	.LVL1836
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1838
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1857
-	.4byte	.LVL1871
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST536:
-	.4byte	.LVL1815
-	.4byte	.LVL1825
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1856
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1856
-	.4byte	.LVL1857
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x2
-	.byte	0x32
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST537:
-	.4byte	.LVL1815
-	.4byte	.LVL1819
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1825
-	.2byte	0xa
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x1
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1855
-	.2byte	0xa
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x1
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1855
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST538:
-	.4byte	.LVL1815
-	.4byte	.LVL1821
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gMultiPageProgEn
-	.4byte	.LVL1821
-	.4byte	.LVL1837
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL1838
-	.4byte	.LVL1874
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL1874
-	.4byte	.LFE300
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gMultiPageProgEn
-	.4byte	0
-	.4byte	0
-.LLST429:
-	.4byte	.LVL1378
-	.4byte	.LVL1379
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1379
-	.4byte	.LVL1380
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1381
-	.4byte	.LVL1383
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST430:
-	.4byte	.LVL1322
-	.4byte	.LVL1328
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1328
-	.4byte	.LVL1336
-	.2byte	0x7
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1337
-	.4byte	.LVL1339
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1344
-	.4byte	.LVL1345
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1345
-	.4byte	.LVL1346-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1347
-	.4byte	.LVL1348
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1348
-	.4byte	.LVL1351
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1357
-	.4byte	.LVL1358
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1358
-	.4byte	.LVL1361
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1362
-	.4byte	.LVL1363
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1363
-	.4byte	.LVL1364-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1365
-	.4byte	.LVL1366
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3c
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL1366
-	.4byte	.LVL1367-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1368
-	.4byte	.LVL1369
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL1369
-	.4byte	.LVL1370-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1371
-	.4byte	.LVL1372
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL1372
-	.4byte	.LVL1373-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1374
-	.4byte	.LVL1375
-	.2byte	0x11
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1375
-	.4byte	.LVL1376
-	.2byte	0x1e
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x1f
-	.byte	0x35
-	.byte	0x26
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1376
-	.4byte	.LVL1377-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST162:
-	.4byte	.LVL381
-	.4byte	.LVL382
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL382
-	.4byte	.LVL396
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL396
-	.4byte	.LFE296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST163:
-	.4byte	.LVL383
-	.4byte	.LVL384
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL384
-	.4byte	.LVL386
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL387
-	.4byte	.LVL393
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL400
-	.4byte	.LVL401
-	.2byte	0x1f
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL401
-	.4byte	.LVL402
-	.2byte	0x29
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL402
-	.4byte	.LVL403
-	.2byte	0x2e
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x22
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST164:
-	.4byte	.LVL388
-	.4byte	.LVL392
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST161:
-	.4byte	.LVL378
-	.4byte	.LVL379
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL379
-	.4byte	.LVL380
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL380
-	.4byte	.LFE295
-	.2byte	0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.4byte	0
-	.4byte	0
-.LLST158:
-	.4byte	.LVL370
-	.4byte	.LVL374
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL374
-	.4byte	.LVL375
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL375
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST159:
-	.4byte	.LVL370
-	.4byte	.LVL371
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL372
-	.4byte	.LVL373
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL373
-	.4byte	.LVL375
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL375
-	.4byte	.LVL376
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL376
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST160:
-	.4byte	.LVL370
-	.4byte	.LVL371
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL372
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST319:
-	.4byte	.LVL940
-	.4byte	.LVL948
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL948
-	.4byte	.LVL979
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL980
-	.4byte	.LVL987
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL987
-	.4byte	.LVL990-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL990-1
-	.4byte	.LFE292
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST320:
-	.4byte	.LVL940
-	.4byte	.LVL947
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL947
-	.4byte	.LVL979
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL980
-	.4byte	.LVL987
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL987
-	.4byte	.LVL989
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL989
-	.4byte	.LFE292
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST321:
-	.4byte	.LVL940
-	.4byte	.LVL946
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL946
-	.4byte	.LVL979
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL980
-	.4byte	.LVL987
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL987
-	.4byte	.LVL988
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL988
-	.4byte	.LFE292
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST322:
-	.4byte	.LVL940
-	.4byte	.LVL942
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL942
-	.4byte	.LVL952
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL952
-	.4byte	.LVL978
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL978
-	.4byte	.LFE292
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST323:
-	.4byte	.LVL940
-	.4byte	.LVL944
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL944
-	.4byte	.LVL945
-	.2byte	0x4
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x9f
-	.4byte	.LVL945
-	.4byte	.LVL954
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL978
-	.4byte	.LVL979
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL979
-	.4byte	.LFE292
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST324:
-	.4byte	.LVL940
-	.4byte	.LVL957
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL957
-	.4byte	.LVL960
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL960
-	.4byte	.LVL962
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL963
-	.4byte	.LVL970
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL970
-	.4byte	.LVL977
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL978
-	.4byte	.LVL991
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL991
-	.4byte	.LVL999
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST325:
-	.4byte	.LVL953
-	.4byte	.LVL954
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL954
-	.4byte	.LVL957
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL957
-	.4byte	.LVL958
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL963
-	.4byte	.LVL964
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL964
-	.4byte	.LVL969
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL969
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL970
-	.4byte	.LVL978
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL980
-	.4byte	.LVL981
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL982
-	.4byte	.LVL984
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL984
-	.4byte	.LVL986
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL986
-	.4byte	.LVL987
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL990
-	.4byte	.LVL991
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL991
-	.4byte	.LVL992
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL992
-	.4byte	.LVL997
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL997
-	.4byte	.LVL998
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL998
-	.4byte	.LFE292
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST326:
-	.4byte	.LVL941
-	.4byte	.LVL942
-	.2byte	0xb
-	.byte	0x73
-	.sleb128 0
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL942
-	.4byte	.LVL952
-	.2byte	0xb
-	.byte	0x77
-	.sleb128 0
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL952
-	.4byte	.LVL978
-	.2byte	0xc
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL978
-	.4byte	.LFE292
-	.2byte	0xb
-	.byte	0x77
-	.sleb128 0
-	.byte	0x8
-	.byte	0x3f
-	.byte	0x1a
-	.byte	0x30
-	.byte	0x29
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST327:
-	.4byte	.LVL953
-	.4byte	.LVL957
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL963
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST328:
-	.4byte	.LVL965
-	.4byte	.LVL968
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST329:
-	.4byte	.LVL953
-	.4byte	.LVL955
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL955
-	.4byte	.LVL956
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -4
-	.byte	0x9f
-	.4byte	.LVL963
-	.4byte	.LVL965
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -4
-	.byte	0x9f
-	.4byte	.LVL965
-	.4byte	.LVL966
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -3
-	.byte	0x9f
-	.4byte	.LVL966
-	.4byte	.LVL967
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL967
-	.4byte	.LVL969
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL969
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST330:
-	.4byte	.LVL971
-	.4byte	.LVL972
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL972
-	.4byte	.LVL973
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL975
-	.4byte	.LVL976
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST331:
-	.4byte	.LVL961
-	.4byte	.LVL963
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST311:
-	.4byte	.LVL917
-	.4byte	.LVL921
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL921
-	.4byte	.LVL927
-	.2byte	0x4
-	.byte	0x76
-	.sleb128 -512
-	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST312:
-	.4byte	.LVL917
-	.4byte	.LVL922
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL922
-	.4byte	.LVL929
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL930
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL930
-	.4byte	.LVL936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL936
-	.4byte	.LVL937
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL937
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST313:
-	.4byte	.LVL917
-	.4byte	.LVL919
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL919
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST314:
-	.4byte	.LVL917
-	.4byte	.LVL923-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL923-1
-	.4byte	.LVL923
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL923
-	.4byte	.LVL927
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LVL928-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL928-1
-	.4byte	.LVL929
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL932-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL932-1
-	.4byte	.LVL932
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL932
-	.4byte	.LVL936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL936
-	.4byte	.LVL939-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL939-1
-	.4byte	.LFE291
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST315:
-	.4byte	.LVL917
-	.4byte	.LVL927
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL927
-	.4byte	.LFE291
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST316:
-	.4byte	.LVL919
-	.4byte	.LVL921
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL921
-	.4byte	.LVL923
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL923
-	.4byte	.LVL924
-	.2byte	0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0xe00
-	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LVL928-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL928-1
-	.4byte	.LVL929
-	.2byte	0xc
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL931
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL931
-	.4byte	.LVL932
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL932
-	.4byte	.LVL933
-	.2byte	0xc
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.byte	0x9f
-	.4byte	.LVL936
-	.4byte	.LVL938
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL938
-	.4byte	.LVL939-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL939-1
-	.4byte	.LFE291
-	.2byte	0xc
-	.byte	0x74
-	.sleb128 0
-	.byte	0x39
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x1000
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST317:
-	.4byte	.LVL925
-	.4byte	.LVL926
-	.2byte	0x30
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x2
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x40
-	.byte	0x24
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x38
-	.byte	0x24
-	.byte	0x21
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x3
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x48
-	.byte	0x24
-	.byte	0x21
-	.byte	0x91
-	.sleb128 0
-	.byte	0x6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x21
-	.byte	0x9f
-	.4byte	.LVL934
-	.4byte	.LVL935
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST318:
-	.4byte	.LVL918
-	.4byte	.LVL927
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL927
-	.4byte	.LFE291
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST156:
-	.4byte	.LVL361
-	.4byte	.LVL363
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL363
-	.4byte	.LFE290
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST157:
-	.4byte	.LVL364
-	.4byte	.LVL365
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 28
-	.byte	0x9f
-	.4byte	.LVL366
-	.4byte	.LVL369
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 28
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST142:
-	.4byte	.LVL329
-	.4byte	.LVL334
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL334
-	.4byte	.LVL336
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL336
-	.4byte	.LVL339
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL352
-	.4byte	.LVL353
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST143:
-	.4byte	.LVL329
-	.4byte	.LVL330
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL330
-	.4byte	.LFE289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST144:
-	.4byte	.LVL329
-	.4byte	.LVL346
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL346
-	.4byte	.LVL352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL352
-	.4byte	.LVL356
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL356
-	.4byte	.LFE289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST145:
-	.4byte	.LVL329
-	.4byte	.LVL341
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL341
-	.4byte	.LVL352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	.LVL352
-	.4byte	.LVL353
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST146:
-	.4byte	.LVL329
-	.4byte	.LVL352
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL352
-	.4byte	.LFE289
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST147:
-	.4byte	.LVL329
-	.4byte	.LVL352
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	.LVL352
-	.4byte	.LFE289
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST148:
-	.4byte	.LVL335
-	.4byte	.LVL352
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST149:
-	.4byte	.LVL337
-	.4byte	.LVL338
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL340
-	.4byte	.LVL343
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL344
-	.4byte	.LVL352
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST150:
-	.4byte	.LVL331
-	.4byte	.LVL346
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL353
-	.4byte	.LVL356
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST151:
-	.4byte	.LVL333
-	.4byte	.LVL352
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL353
-	.4byte	.LFE289
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST152:
-	.4byte	.LVL348
-	.4byte	.LVL349
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL349
-	.4byte	.LVL350-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gMasterInfo+20
-	.4byte	0
-	.4byte	0
-.LLST153:
-	.4byte	.LVL354
-	.4byte	.LVL356
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL356
-	.4byte	.LVL360
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST154:
-	.4byte	.LVL345
-	.4byte	.LVL346
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	.LVL353
-	.4byte	.LVL356
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 4
-	.4byte	.LVL356
-	.4byte	.LVL357
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL357
-	.4byte	.LVL358
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -4
-	.byte	0x9f
-	.4byte	.LVL358
-	.4byte	.LVL360
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST155:
-	.4byte	.LVL354
-	.4byte	.LVL355
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL355
-	.4byte	.LVL360
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST141:
-	.4byte	.LVL324
-	.4byte	.LVL325
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL326
-	.4byte	.LFE287
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST139:
-	.4byte	.LVL319
-	.4byte	.LVL320
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL320
-	.4byte	.LFE283
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST140:
-	.4byte	.LVL319
-	.4byte	.LVL320
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL320
-	.4byte	.LFE283
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST137:
-	.4byte	.LVL310
-	.4byte	.LVL312
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL313
-	.4byte	.LVL315
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST138:
-	.4byte	.LVL306
-	.4byte	.LVL307
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL308
-	.4byte	.LFE280
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST101:
-	.4byte	.LVL195
-	.4byte	.LVL196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL196
-	.4byte	.LFE277
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST102:
-	.4byte	.LVL196
-	.4byte	.LVL198
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL198
-	.4byte	.LVL199
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a1
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL199
-	.4byte	.LVL200
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL201
-	.4byte	.LFE277
-	.2byte	0x9
-	.byte	0xc
-	.4byte	0x186a0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST103:
-	.4byte	.LVL196
-	.4byte	.LVL197
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x64
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST85:
-	.4byte	.LVL152
-	.4byte	.LVL153
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL153
-	.4byte	.LVL155
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST84:
-	.4byte	.LVL147
-	.4byte	.LVL149
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL149
-	.4byte	.LVL150
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 4
-	.4byte	.LVL150
-	.4byte	.LFE274
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST82:
-	.4byte	.LVL138
-	.4byte	.LVL145
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL145
-	.4byte	.LVL146
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL146
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST83:
-	.4byte	.LVL139
-	.4byte	.LVL140
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL141
-	.4byte	.LVL143
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL144
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST81:
-	.4byte	.LVL136
-	.4byte	.LVL137
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST80:
-	.4byte	.LVL133
-	.4byte	.LVL134
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL134
-	.4byte	.LFE271
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST79:
-	.4byte	.LVL131
-	.4byte	.LVL132
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL132
-	.4byte	.LFE270
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST424:
-	.4byte	.LVL1307
-	.4byte	.LVL1315
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1315
-	.4byte	.LFE267
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST425:
-	.4byte	.LVL1307
-	.4byte	.LVL1308
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1308
-	.4byte	.LVL1309
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1309
-	.4byte	.LVL1310
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1310
-	.4byte	.LVL1311
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1311
-	.4byte	.LFE267
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST426:
-	.4byte	.LVL1312
-	.4byte	.LVL1313
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1314
-	.4byte	.LVL1316
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST427:
-	.4byte	.LVL1317
-	.4byte	.LVL1318
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x28
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST284:
-	.4byte	.LVL809
-	.4byte	.LVL811-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL811-1
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST285:
-	.4byte	.LVL812
-	.4byte	.LVL813
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL813
-	.4byte	.LVL815
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST286:
-	.4byte	.LVL810
-	.4byte	.LVL811-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL811-1
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST790:
-	.4byte	.LVL3133
-	.4byte	.LVL3134
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3134
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST791:
-	.4byte	.LVL3133
-	.4byte	.LVL3135-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL3135-1
-	.4byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST792:
-	.4byte	.LVL3133
-	.4byte	.LVL3137
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3138
-	.4byte	.LVL3139
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3139
-	.4byte	.LVL3140
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL3141
-	.4byte	.LVL3142
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL3142
-	.4byte	.LVL3143
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3143
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST793:
-	.4byte	.LVL3135
-	.4byte	.LVL3136
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL3136
-	.4byte	.LVL3137
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL3139
-	.4byte	.LVL3140
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST122:
-	.4byte	.LVL252
-	.4byte	.LVL253
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL253
-	.4byte	.LVL257
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL257
-	.4byte	.LVL259-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL259-1
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST123:
-	.4byte	.LVL252
-	.4byte	.LVL253
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL253
-	.4byte	.LVL257
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL257
-	.4byte	.LVL258
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL258
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST124:
-	.4byte	.LVL252
-	.4byte	.LVL253
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL253
-	.4byte	.LVL257
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL257
-	.4byte	.LVL259-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL259-1
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST125:
-	.4byte	.LVL253
-	.4byte	.LVL254
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL255
-	.4byte	.LVL256
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL260
-	.4byte	.LVL270
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL273
-	.4byte	.LVL279
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL279
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST127:
-	.4byte	.LVL262
-	.4byte	.LVL263
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL263
-	.4byte	.LVL275
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST128:
-	.4byte	.LVL267
-	.4byte	.LVL275
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST516:
-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1762
-	.4byte	.LVL1764
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1764
-	.4byte	.LVL1765
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x50
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-	.4byte	.LVL1766
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1766
-	.4byte	.LVL1767
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1767
-	.4byte	.LVL1796
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1796
-	.4byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1762
-	.4byte	.LVL1765
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1766-1
-	.4byte	.LFE262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1762
-	.4byte	.LVL1765
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1766-1
-	.4byte	.LFE262
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST519:
-	.4byte	.LVL1758
-	.4byte	.LVL1761
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1761
-	.4byte	.LVL1765
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1766-1
-	.4byte	.LFE262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST520:
-	.4byte	.LVL1762
-	.4byte	.LVL1763
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1763
-	.4byte	.LVL1764
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1767
-	.4byte	.LVL1786
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1787
-	.4byte	.LVL1792
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1792
-	.4byte	.LVL1796
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1796
-	.4byte	.LFE262
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL1758
-	.4byte	.LVL1762
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1762
-	.4byte	.LVL1764
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1764
-	.4byte	.LVL1765
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1766-1
-	.4byte	.LVL1766
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1766
-	.4byte	.LVL1767
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1767
-	.4byte	.LVL1796
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1796
-	.4byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST522:
-	.4byte	.LVL1769
-	.4byte	.LVL1770
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1770
-	.4byte	.LVL1792
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST523:
-	.4byte	.LVL1774
-	.4byte	.LVL1792
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST524:
-	.4byte	.LVL1759
-	.4byte	.LVL1760
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1760
-	.4byte	.LFE262
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	0
-	.4byte	0
-.LLST525:
-	.4byte	.LVL1759
-	.4byte	.LVL1762
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
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-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1762
-	.4byte	.LVL1765
-	.2byte	0x9
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1765
-	.4byte	.LVL1766-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1767
-	.4byte	.LFE262
-	.2byte	0x9
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST493:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1651-1
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST494:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1651-1
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST495:
-	.4byte	.LVL1647
-	.4byte	.LVL1648
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1648
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1651-1
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST496:
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1652
-	.4byte	.LVL1653
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1653
-	.4byte	.LVL1660
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1660
-	.4byte	.LVL1661
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1661
-	.4byte	.LVL1718
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1718
-	.4byte	.LVL1719
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1719
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST498:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1650
-	.4byte	.LVL1651
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1658
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1661
-	.4byte	.LVL1663
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1663
-	.4byte	.LVL1674
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1679
-	.4byte	.LVL1680
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1680
-	.4byte	.LVL1685
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1690
-	.4byte	.LVL1692
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1692
-	.4byte	.LVL1694
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1694
-	.4byte	.LVL1695
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1695
-	.4byte	.LVL1700
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1700
-	.4byte	.LVL1702
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1702
-	.4byte	.LVL1714
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1721
-	.4byte	.LVL1723
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1723
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST499:
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1652
-	.4byte	.LFE261
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST500:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x8
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1652
-	.4byte	.LFE261
-	.2byte	0x8
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST501:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gNandRandomizer
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1650
-	.4byte	.LVL1651-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gNandRandomizer
-	.4byte	.LVL1652
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST502:
-	.4byte	.LVL1671
-	.4byte	.LVL1675
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1682
-	.4byte	.LVL1684
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST503:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1650
-	.4byte	.LVL1651
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1677
-	.4byte	.LVL1678
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1678
-	.4byte	.LVL1680
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1686
-	.4byte	.LVL1692
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1694
-	.4byte	.LVL1697
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1697
-	.4byte	.LVL1698
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1698
-	.4byte	.LVL1701
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1704
-	.4byte	.LVL1705
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1705
-	.4byte	.LVL1708
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1708
-	.4byte	.LVL1709
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1709
-	.4byte	.LVL1710-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1710-1
-	.4byte	.LVL1712
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1713
-	.4byte	.LVL1714
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1721
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST504:
-	.4byte	.LVL1647
-	.4byte	.LVL1649
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1649
-	.4byte	.LVL1650
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1650
-	.4byte	.LVL1651
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1652
-	.4byte	.LVL1689
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1689
-	.4byte	.LVL1690
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1690
-	.4byte	.LFE261
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST505:
-	.4byte	.LVL1654
-	.4byte	.LVL1655
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x1f
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1655
-	.4byte	.LVL1656
-	.2byte	0x9
-	.byte	0x70
-	.sleb128 4
-	.byte	0x6
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x1f
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1656
-	.4byte	.LFE261
-	.2byte	0x9
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x1f
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST506:
-	.4byte	.LVL1666
-	.4byte	.LVL1668-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST507:
-	.4byte	.LVL1695
-	.4byte	.LVL1700
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST117:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST118:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST119:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST120:
-	.4byte	.LVL234
-	.4byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL235
-	.4byte	.LFE260
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST121:
-	.4byte	.LVL244
-	.4byte	.LVL245
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x1f
-	.byte	0x9f
-	.4byte	.LVL248
-	.4byte	.LVL249
-	.2byte	0x5
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST508:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1727
-	.4byte	.LVL1728
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1756
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST509:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1727
-	.4byte	.LVL1728
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1756
-	.4byte	.LVL1757
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1757
-	.4byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST510:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1726
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST511:
-	.4byte	.LVL1724
-	.4byte	.LVL1725
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1725
-	.4byte	.LFE259
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST512:
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1756
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST513:
-	.4byte	.LVL1738
-	.4byte	.LVL1739
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x1f
-	.byte	0x9f
-	.4byte	.LVL1744
-	.4byte	.LVL1745
-	.2byte	0x5
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST514:
-	.4byte	.LVL1724
-	.4byte	.LVL1726
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1726
-	.4byte	.LVL1727
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1727
-	.4byte	.LVL1728
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1728
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1747
-	.4byte	.LVL1756
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1756
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST515:
-	.4byte	.LVL1731
-	.4byte	.LVL1747
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST486:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST487:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST488:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST489:
-	.4byte	.LVL1623
-	.4byte	.LVL1624
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST490:
-	.4byte	.LVL1622
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1624
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST491:
-	.4byte	.LVL1623
-	.4byte	.LVL1624
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1634
-	.4byte	.LVL1635
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1635
-	.4byte	.LVL1641
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST492:
-	.4byte	.LVL1623
-	.4byte	.LVL1624
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1638
-	.4byte	.LVL1639
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1639
-	.4byte	.LVL1642
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1646
-	.4byte	.LFE258
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST96:
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL184
-	.4byte	.LFE257
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST97:
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL184
-	.4byte	.LVL192
-	.2byte	0xb
-	.byte	0x76
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST98:
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.4byte	.LVL184
-	.4byte	.LVL185-1
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 0
-	.byte	0x34
-	.byte	0x24
-	.byte	0x3
-	.4byte	gDieOp
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST99:
-	.4byte	.LVL187
-	.4byte	.LVL188
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL188
-	.4byte	.LVL189
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL189
-	.4byte	.LVL190
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL190
-	.4byte	.LVL191
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST73:
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL125
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST74:
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL125
-	.4byte	.LFE256
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST75:
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL125
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST66:
-	.4byte	.LVL110
-	.4byte	.LVL113
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL113
-	.4byte	.LVL122
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL122
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST67:
-	.4byte	.LVL110
-	.4byte	.LVL117-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL117-1
-	.4byte	.LVL118
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL118
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST68:
-	.4byte	.LVL110
-	.4byte	.LVL114
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL114
-	.4byte	.LVL118
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL119
-	.4byte	.LVL122
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL122
-	.4byte	.LVL123
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL123
-	.4byte	.LFE255
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST71:
-	.4byte	.LVL115
-	.4byte	.LVL116
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL120
-	.4byte	.LVL122
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST69:
-	.4byte	.LVL110
-	.4byte	.LVL111
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL111
-	.4byte	.LVL112
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST70:
-	.4byte	.LVL111
-	.4byte	.LVL112
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST72:
-	.4byte	.LVL116
-	.4byte	.LVL117
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST56:
-	.4byte	.LVL90
-	.4byte	.LVL96
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL96
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST57:
-	.4byte	.LVL90
-	.4byte	.LVL93
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL93
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST58:
-	.4byte	.LVL90
-	.4byte	.LVL94
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL94
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST59:
-	.4byte	.LVL90
-	.4byte	.LVL91
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL91
-	.4byte	.LFE254
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST60:
-	.4byte	.LVL90
-	.4byte	.LVL109
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL109
-	.4byte	.LFE254
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST61:
-	.4byte	.LVL97
-	.4byte	.LVL98-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL98-1
-	.4byte	.LVL108
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL108
-	.4byte	.LVL109
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL109
-	.4byte	.LFE254
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST62:
-	.4byte	.LVL102
-	.4byte	.LVL105
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST63:
-	.4byte	.LVL101
-	.4byte	.LVL104
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST64:
-	.4byte	.LVL106
-	.4byte	.LVL107
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL107
-	.4byte	.LVL109
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL109
-	.4byte	.LFE254
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST65:
-	.4byte	.LVL95
-	.4byte	.LVL98-1
-	.2byte	0x9
-	.byte	0x73
-	.sleb128 0
-	.byte	0xc
-	.4byte	0x7fffffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL98-1
-	.4byte	.LFE254
-	.2byte	0xa
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0xc
-	.4byte	0x7fffffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST133:
-	.4byte	.LVL294
-	.4byte	.LVL296
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST135:
-	.4byte	.LVL295
-	.4byte	.LVL296
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST474:
-	.4byte	.LVL1561
-	.4byte	.LVL1562
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1562
-	.4byte	.LVL1568
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1568
-	.4byte	.LVL1569-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1569-1
-	.4byte	.LFE252
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST475:
-	.4byte	.LVL1569
-	.4byte	.LVL1570
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1570
-	.4byte	.LVL1585
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1621
-	.4byte	.LFE252
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST476:
-	.4byte	.LVL1591
-	.4byte	.LVL1592
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST482:
-	.4byte	.LVL1603
-	.4byte	.LVL1604
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST483:
-	.4byte	.LVL1603
-	.4byte	.LVL1604
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1604
-	.4byte	.LVL1606-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST484:
-	.4byte	.LVL1619
-	.4byte	.LVL1620
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gReadRetryInfo+20
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST485:
-	.4byte	.LVL1615
-	.4byte	.LVL1618
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gNandPhyInfo
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST477:
-	.4byte	.LVL1571
-	.4byte	.LVL1579
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST478:
-	.4byte	.LVL1571
-	.4byte	.LVL1579
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST479:
-	.4byte	.LVL1571
-	.4byte	.LVL1581
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1581
-	.4byte	.LVL1584
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -8
-	.byte	0x9f
-	.4byte	.LVL1621
-	.4byte	.LFE252
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST480:
-	.4byte	.LVL1572
-	.4byte	.LVL1573
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1573
-	.4byte	.LVL1574
-	.2byte	0xa
-	.byte	0x75
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST481:
-	.4byte	.LVL1576
-	.4byte	.LVL1577
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST308:
-	.4byte	.LVL903
-	.4byte	.LVL904
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL904
-	.4byte	.LVL906
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL906
-	.4byte	.LVL907
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL907
-	.4byte	.LVL909-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL911
-	.4byte	.LVL913
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST309:
-	.4byte	.LVL903
-	.4byte	.LVL906
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL906
-	.4byte	.LVL911
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL911
-	.4byte	.LVL913
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST307:
-	.4byte	.LVL901
-	.4byte	.LVL902-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL902-1
-	.4byte	.LFE250
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST413:
-	.4byte	.LVL1268
-	.4byte	.LVL1271
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1271
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST414:
-	.4byte	.LVL1269
-	.4byte	.LVL1273
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1274
-	.4byte	.LVL1277
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1283
-	.4byte	.LVL1284
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1287
-	.4byte	.LFE249
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST283:
-	.4byte	.LVL798
-	.4byte	.LVL799
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL804
-	.4byte	.LVL805
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL806
-	.4byte	.LFE248
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST415:
-	.4byte	.LVL1289
-	.4byte	.LVL1293
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1293
-	.4byte	.LVL1297
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1297
-	.4byte	.LVL1299
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1299
-	.4byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST416:
-	.4byte	.LVL1289
-	.4byte	.LVL1291
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1291
-	.4byte	.LVL1300
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1300
-	.4byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST417:
-	.4byte	.LVL1289
-	.4byte	.LVL1290
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1290
-	.4byte	.LVL1293
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL1293
-	.4byte	.LVL1295
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1296
-	.4byte	.LVL1297
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1297
-	.4byte	.LVL1299
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST418:
-	.4byte	.LVL1290
-	.4byte	.LVL1292
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1292
-	.4byte	.LVL1293
-	.2byte	0x8
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x13
-	.4byte	.LVL1297
-	.4byte	.LVL1298
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1298
-	.4byte	.LVL1299
-	.2byte	0x8
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x13
-	.4byte	0
-	.4byte	0
-.LLST397:
-	.4byte	.LVL1202
-	.4byte	.LVL1208-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1208-1
-	.4byte	.LFE245
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST398:
-	.4byte	.LVL1202
-	.4byte	.LVL1208-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1208-1
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST399:
-	.4byte	.LVL1202
-	.4byte	.LVL1203
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1203
-	.4byte	.LVL1209
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1212
-	.4byte	.LVL1218
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1218
-	.4byte	.LVL1219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1219
-	.4byte	.LVL1221
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1221
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST400:
-	.4byte	.LVL1202
-	.4byte	.LVL1204
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1204
-	.4byte	.LVL1209
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1212
-	.4byte	.LVL1218
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1218
-	.4byte	.LVL1219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1219
-	.4byte	.LVL1221
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1221
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST401:
-	.4byte	.LVL1202
-	.4byte	.LVL1208
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1217
-	.4byte	.LFE245
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST402:
-	.4byte	.LVL1202
-	.4byte	.LVL1208
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1208
-	.4byte	.LVL1210
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1212
-	.4byte	.LVL1222
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST403:
-	.4byte	.LVL1205
-	.4byte	.LVL1213
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1214
-	.4byte	.LFE245
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST404:
-	.4byte	.LVL1206
-	.4byte	.LVL1211
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1211
-	.4byte	.LVL1212
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL1212
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST86:
-	.4byte	.LVL156
-	.4byte	.LVL160
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL160
-	.4byte	.LVL169
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL169
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL173
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST87:
-	.4byte	.LVL156
-	.4byte	.LVL164-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL164-1
-	.4byte	.LVL169
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL169
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL173
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST88:
-	.4byte	.LVL156
-	.4byte	.LVL158
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL158
-	.4byte	.LVL166
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL166
-	.4byte	.LVL169
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL169
-	.4byte	.LVL170
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL170
-	.4byte	.LVL171
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL171
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL173
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST89:
-	.4byte	.LVL156
-	.4byte	.LVL157
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL157
-	.4byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST90:
-	.4byte	.LVL165
-	.4byte	.LVL166
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL166
-	.4byte	.LVL167
-	.2byte	0x9
-	.byte	0x73
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL173
-	.4byte	.LVL174
-	.2byte	0x9
-	.byte	0x73
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL177
-	.4byte	.LFE244
-	.2byte	0xb
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x94
-	.byte	0x1
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST91:
-	.4byte	.LVL159
-	.4byte	.LVL161
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL161
-	.4byte	.LVL166
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL172
-	.4byte	.LVL173
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST92:
-	.4byte	.LVL159
-	.4byte	.LVL162
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL162
-	.4byte	.LVL163
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST93:
-	.4byte	.LVL175
-	.4byte	.LVL176
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST386:
-	.4byte	.LVL1174
-	.4byte	.LVL1179
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1179
-	.4byte	.LVL1190
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1193
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST387:
-	.4byte	.LVL1174
-	.4byte	.LVL1180-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1180-1
-	.4byte	.LVL1190
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1193
-	.4byte	.LFE243
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST388:
-	.4byte	.LVL1174
-	.4byte	.LVL1180-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1180-1
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1193
-	.4byte	.LVL1197
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1197
-	.4byte	.LVL1198
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1200
-	.4byte	.LFE243
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST389:
-	.4byte	.LVL1174
-	.4byte	.LVL1175
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1175
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1190
-	.4byte	.LVL1197
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1197
-	.4byte	.LVL1198
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1200
-	.4byte	.LFE243
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST390:
-	.4byte	.LVL1174
-	.4byte	.LVL1183
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1196
-	.4byte	.LFE243
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST391:
-	.4byte	.LVL1174
-	.4byte	.LVL1183
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1183
-	.4byte	.LVL1187
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1187
-	.4byte	.LVL1188
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1193
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1193
-	.4byte	.LVL1201
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST392:
-	.4byte	.LVL1182
-	.4byte	.LVL1183
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1183
-	.4byte	.LVL1190
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1193
-	.4byte	.LVL1199
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1199
-	.4byte	.LVL1200
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1200
-	.4byte	.LFE243
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST393:
-	.4byte	.LVL1176
-	.4byte	.LVL1177
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1177
-	.4byte	.LVL1178
-	.2byte	0xf
-	.byte	0x3
-	.4byte	gNandFlashEccBits
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1178
-	.4byte	.LVL1190
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1190
-	.4byte	.LVL1191
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1191
-	.4byte	.LVL1192
-	.2byte	0xf
-	.byte	0x3
-	.4byte	gNandFlashEccBits
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x33
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1192
-	.4byte	.LFE243
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST394:
-	.4byte	.LVL1180
-	.4byte	.LVL1181
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1181
-	.4byte	.LVL1182
-	.2byte	0xa
-	.byte	0x77
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST395:
-	.4byte	.LVL1185
-	.4byte	.LVL1186
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST396:
-	.4byte	.LVL1194
-	.4byte	.LVL1195
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST379:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1161-1
-	.4byte	.LFE242
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST380:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1161-1
-	.4byte	.LFE242
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST381:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1161-1
-	.4byte	.LVL1163
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1166
-	.4byte	.LVL1169
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1169
-	.4byte	.LVL1170
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1170
-	.4byte	.LVL1172
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1172
-	.4byte	.LFE242
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST382:
-	.4byte	.LVL1160
-	.4byte	.LVL1161-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1161-1
-	.4byte	.LVL1163
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1166
-	.4byte	.LVL1169
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1169
-	.4byte	.LVL1170
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1170
-	.4byte	.LVL1172
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1172
-	.4byte	.LFE242
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST383:
-	.4byte	.LVL1160
-	.4byte	.LVL1162
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1168
-	.4byte	.LFE242
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST384:
-	.4byte	.LVL1160
-	.4byte	.LVL1162
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1162
-	.4byte	.LVL1165
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1166
-	.4byte	.LVL1173
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST385:
-	.4byte	.LVL1161
-	.4byte	.LVL1162
-	.2byte	0xa
-	.byte	0x77
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST52:
-	.4byte	.LVL83
-	.4byte	.LVL85
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL85
-	.4byte	.LFE241
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST53:
-	.4byte	.LVL83
-	.4byte	.LVL84
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL84
-	.4byte	.LFE241
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST54:
-	.4byte	.LVL83
-	.4byte	.LVL85
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL85
-	.4byte	.LVL87
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL87
-	.4byte	.LVL89
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL89
-	.4byte	.LFE241
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST55:
-	.4byte	.LVL88
-	.4byte	.LVL89
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x12c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST370:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1128-1
-	.4byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST371:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1128-1
-	.4byte	.LFE240
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST372:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1128-1
-	.4byte	.LVL1138
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1143
-	.4byte	.LVL1151
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1151
-	.4byte	.LVL1152
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1152
-	.4byte	.LVL1158
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST373:
-	.4byte	.LVL1127
-	.4byte	.LVL1128-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1128-1
-	.4byte	.LVL1138
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1143
-	.4byte	.LVL1151
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1151
-	.4byte	.LVL1152
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1152
-	.4byte	.LVL1158
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST374:
-	.4byte	.LVL1127
-	.4byte	.LVL1137
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1143
-	.4byte	.LVL1144
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1148
-	.4byte	.LVL1149
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1149
-	.4byte	.LVL1154
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1157
-	.4byte	.LVL1158
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST375:
-	.4byte	.LVL1127
-	.4byte	.LVL1137
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1137
-	.4byte	.LVL1138
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1138
-	.4byte	.LVL1143
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1143
-	.4byte	.LVL1144
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1144
-	.4byte	.LVL1151
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1151
-	.4byte	.LVL1152
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1152
-	.4byte	.LVL1158
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1158
-	.4byte	.LFE240
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST376:
-	.4byte	.LVL1127
-	.4byte	.LVL1131
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1131
-	.4byte	.LVL1133
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1134
-	.4byte	.LVL1135
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1135
-	.4byte	.LVL1143
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	.LVL1143
-	.4byte	.LVL1144
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1144
-	.4byte	.LFE240
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -48
-	.4byte	0
-	.4byte	0
-.LLST377:
-	.4byte	.LVL1136
-	.4byte	.LVL1137
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1137
-	.4byte	.LVL1143
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1144
-	.4byte	.LFE240
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST378:
-	.4byte	.LVL1128
-	.4byte	.LVL1129
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1129
-	.4byte	.LVL1130
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST48:
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL78
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST49:
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL78
-	.4byte	.LFE239
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST50:
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST51:
-	.4byte	.LVL80
-	.4byte	.LVL81
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST113:
-	.4byte	.LVL226
-	.4byte	.LVL228
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL228
-	.4byte	.LVL231
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL231
-	.4byte	.LVL232
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL232
-	.4byte	.LFE238
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST114:
-	.4byte	.LVL226
-	.4byte	.LVL229-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL229-1
-	.4byte	.LFE238
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST115:
-	.4byte	.LVL229
-	.4byte	.LVL230
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL230
-	.4byte	.LVL232-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL232
-	.4byte	.LFE238
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST116:
-	.4byte	.LVL227
-	.4byte	.LVL229
-	.2byte	0x3
-	.byte	0x8
-	.byte	0xc8
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST452:
-	.4byte	.LVL1417
-	.4byte	.LVL1430
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1430
-	.4byte	.LVL1432
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1432
-	.4byte	.LVL1434
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1434
-	.4byte	.LVL1436
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1436
-	.4byte	.LVL1437
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1437
-	.4byte	.LVL1452
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1452
-	.4byte	.LVL1469
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1469
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST453:
-	.4byte	.LVL1418
-	.4byte	.LVL1419
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1419
-	.4byte	.LVL1420
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1420
-	.4byte	.LVL1421
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1421
-	.4byte	.LVL1422
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1422
-	.4byte	.LVL1423
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1423
-	.4byte	.LVL1424
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1424
-	.4byte	.LVL1425
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1425
-	.4byte	.LVL1426
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1426
-	.4byte	.LVL1427
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1427
-	.4byte	.LVL1428
-	.2byte	0x2
-	.byte	0x35
-	.byte	0x9f
-	.4byte	.LVL1428
-	.4byte	.LVL1429
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1429
-	.4byte	.LVL1430
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1434
-	.4byte	.LVL1443
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1443
-	.4byte	.LVL1444
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1444
-	.4byte	.LVL1445
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1445
-	.4byte	.LVL1446
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1446
-	.4byte	.LVL1447
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL1447
-	.4byte	.LVL1448
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1448
-	.4byte	.LVL1449
-	.2byte	0x2
-	.byte	0x35
-	.byte	0x9f
-	.4byte	.LVL1449
-	.4byte	.LVL1450
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1450
-	.4byte	.LVL1451
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1451
-	.4byte	.LVL1452
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1462
-	.4byte	.LVL1463
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1463
-	.4byte	.LVL1467
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1496
-	.4byte	.LVL1497
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1497
-	.4byte	.LVL1498
-	.2byte	0x6
-	.byte	0x73
-	.sleb128 0
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1498
-	.4byte	.LVL1499
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1499
-	.4byte	.LVL1500
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1500
-	.4byte	.LVL1503
-	.2byte	0x5
-	.byte	0x38
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1503
-	.4byte	.LVL1504
-	.2byte	0x5
-	.byte	0x39
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1504
-	.4byte	.LVL1505
-	.2byte	0x5
-	.byte	0x38
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1505
-	.4byte	.LVL1518
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1532
-	.4byte	.LVL1534
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1534
-	.4byte	.LVL1538
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1538
-	.4byte	.LVL1539
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1539
-	.4byte	.LVL1540
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST454:
-	.4byte	.LVL1500
-	.4byte	.LVL1501
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1501
-	.4byte	.LVL1505
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1507
-	.4byte	.LVL1509
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1509
-	.4byte	.LVL1510
-	.2byte	0x6
-	.byte	0x40
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1510
-	.4byte	.LVL1511
-	.2byte	0x6
-	.byte	0x41
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1511
-	.4byte	.LVL1512
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1512
-	.4byte	.LVL1519
-	.2byte	0x6
-	.byte	0x40
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1519
-	.4byte	.LVL1521
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1531
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST455:
-	.4byte	.LVL1456
-	.4byte	.LVL1457
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1457
-	.4byte	.LVL1460
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1460
-	.4byte	.LVL1461
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1462
-	.4byte	.LVL1465
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1465
-	.4byte	.LVL1466
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1482
-	.4byte	.LVL1484
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1484
-	.4byte	.LVL1486
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1487
-	.4byte	.LVL1488
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1488
-	.4byte	.LVL1489
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1489
-	.4byte	.LVL1490
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1494
-	.4byte	.LVL1495
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1524
-	.4byte	.LVL1525
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1525
-	.4byte	.LVL1526
-	.2byte	0x6
-	.byte	0x71
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -8
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1527
-	.4byte	.LVL1528
-	.2byte	0x6
-	.byte	0x71
-	.sleb128 0
-	.byte	0x73
-	.sleb128 -8
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1534
-	.4byte	.LVL1535
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1535
-	.4byte	.LVL1536
-	.2byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1539
-	.2byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST456:
-	.4byte	.LVL1453
-	.4byte	.LVL1454
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1454
-	.4byte	.LVL1457
-	.2byte	0xb
-	.byte	0x78
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x3
-	.4byte	.LANCHOR26
-	.byte	0x22
-	.4byte	.LVL1471
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST457:
-	.4byte	.LVL1432
-	.4byte	.LVL1433
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1452
-	.4byte	.LVL1468
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1470
-	.4byte	.LVL1477
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1478
-	.4byte	.LVL1479
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1492
-	.4byte	.LVL1493
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1543
-	.4byte	.LVL1544
-	.2byte	0x8
-	.byte	0x91
-	.sleb128 -76
-	.byte	0x94
-	.byte	0x1
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST458:
-	.4byte	.LVL1417
-	.4byte	.LVL1430
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1431
-	.4byte	.LVL1434
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1434
-	.4byte	.LVL1435
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1435
-	.4byte	.LVL1437
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1437
-	.4byte	.LVL1452
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL1452
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST459:
-	.4byte	.LVL1417
-	.4byte	.LVL1430
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1431
-	.4byte	.LVL1434
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1434
-	.4byte	.LVL1435
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1435
-	.4byte	.LVL1437
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1437
-	.4byte	.LVL1438
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1438
-	.4byte	.LVL1439
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1440
-	.4byte	.LVL1441
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1441
-	.4byte	.LVL1442
-	.2byte	0x2
-	.byte	0x3c
-	.byte	0x9f
-	.4byte	.LVL1442
-	.4byte	.LVL1452
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL1452
-	.4byte	.LFE236
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST460:
-	.4byte	.LVL1482
-	.4byte	.LVL1491-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1494
-	.4byte	.LVL1495
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1496
-	.4byte	.LVL1522-1
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL1524
-	.4byte	.LVL1525
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1525
-	.4byte	.LVL1529-1
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -7
-	.byte	0x9f
-	.4byte	.LVL1530
-	.4byte	.LVL1535
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL1535
-	.4byte	.LVL1536
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1536
-	.4byte	.LVL1537
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1539
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1539
-	.4byte	.LVL1541-1
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	0
-	.4byte	0
-.LLST461:
-	.4byte	.LVL1499
-	.4byte	.LVL1500
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gFlashPageBuffer0
-	.4byte	0
-	.4byte	0
-.LLST462:
-	.4byte	.LVL1495
-	.4byte	.LVL1524
-	.2byte	0x10
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1530
-	.4byte	.LVL1531
-	.2byte	0x10
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x40
-	.byte	0x24
-	.byte	0x40
-	.byte	0x26
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x26
-	.byte	0x9f
-	.4byte	.LVL1531
-	.4byte	.LVL1532
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	.LVL1532
-	.4byte	.LVL1541-1
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x2
-	.byte	0x38
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST463:
-	.4byte	.LVL1455
-	.4byte	.LVL1469
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST464:
-	.4byte	.LVL1458
-	.4byte	.LVL1459
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST465:
-	.4byte	.LVL1480
-	.4byte	.LVL1481
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1481
-	.4byte	.LVL1483
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1493
-	.4byte	.LVL1494
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST466:
-	.4byte	.LVL1471
-	.4byte	.LVL1475
-	.2byte	0xe
-	.byte	0x77
-	.sleb128 0
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x24
-	.byte	0x3
-	.4byte	gReadRetryInfo+20
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL1475
-	.4byte	.LVL1476
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1476
-	.4byte	.LVL1477
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL1478
-	.4byte	.LVL1479
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL1492
-	.4byte	.LVL1493
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST468:
-	.4byte	.LVL1505
-	.4byte	.LVL1506
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1513
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1513
-	.4byte	.LVL1514
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1514
-	.4byte	.LVL1515
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST469:
-	.4byte	.LVL1507
-	.4byte	.LVL1508
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1508
-	.4byte	.LVL1524
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1531
-	.4byte	.LFE236
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST470:
-	.4byte	.LVL1505
-	.4byte	.LVL1506
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1517
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1517
-	.4byte	.LVL1519
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL1519
-	.4byte	.LVL1522-1
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL1531
-	.4byte	.LVL1534
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST471:
-	.4byte	.LVL1506
-	.4byte	.LVL1509
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1509
-	.4byte	.LVL1524
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1531
-	.4byte	.LVL1534
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1545
-	.4byte	.LVL1546
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST467:
-	.4byte	.LVL1471
-	.4byte	.LVL1472
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1472
-	.4byte	.LVL1473
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST279:
-	.4byte	.LVL745
-	.4byte	.LVL746
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL746
-	.4byte	.LVL753
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL753
-	.4byte	.LVL755
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL755
-	.4byte	.LVL760
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL760
-	.4byte	.LVL768
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL768
-	.4byte	.LVL773
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL773
-	.4byte	.LVL788
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL788
-	.4byte	.LFE233
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST280:
-	.4byte	.LVL745
-	.4byte	.LVL749
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL749
-	.4byte	.LVL750
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL750
-	.4byte	.LVL753
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL753
-	.4byte	.LVL754
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL754
-	.4byte	.LVL760
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL760
-	.4byte	.LVL761
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL761
-	.4byte	.LVL766
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL766
-	.4byte	.LVL767
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL767
-	.4byte	.LVL773
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL773
-	.4byte	.LVL780
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL780
-	.4byte	.LVL783
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL783
-	.4byte	.LVL789
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL789
-	.4byte	.LVL794
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL794
-	.4byte	.LFE233
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST281:
-	.4byte	.LVL746
-	.4byte	.LVL747
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL747
-	.4byte	.LVL748
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL748
-	.4byte	.LVL749
-	.2byte	0xc
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL751
-	.4byte	.LVL752
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL752
-	.4byte	.LVL753
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL756
-	.4byte	.LVL757
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL757
-	.4byte	.LVL758
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL758
-	.4byte	.LVL759
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL762
-	.4byte	.LVL763
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL763
-	.4byte	.LVL764
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL764
-	.4byte	.LVL765
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL769
-	.4byte	.LVL770
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL770
-	.4byte	.LVL771
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL771
-	.4byte	.LVL772
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL774
-	.4byte	.LVL775
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL775
-	.4byte	.LVL776
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL776
-	.4byte	.LVL777
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL777
-	.4byte	.LVL778
-	.2byte	0x2
-	.byte	0x33
-	.byte	0x9f
-	.4byte	.LVL778
-	.4byte	.LVL779
-	.2byte	0x2
-	.byte	0x34
-	.byte	0x9f
-	.4byte	.LVL779
-	.4byte	.LVL780
-	.2byte	0x2
-	.byte	0x37
-	.byte	0x9f
-	.4byte	.LVL780
-	.4byte	.LVL781
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL782
-	.4byte	.LVL783
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL784
-	.4byte	.LVL785
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL785
-	.4byte	.LVL786
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL786
-	.4byte	.LVL787
-	.2byte	0xc
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x31
-	.byte	0x24
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL790
-	.4byte	.LVL791
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL791
-	.4byte	.LVL792
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL792
-	.4byte	.LVL793
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL794
-	.4byte	.LVL795
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST282:
-	.4byte	.LVL751
-	.4byte	.LVL753
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL794
-	.4byte	.LFE233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST411:
-	.4byte	.LVL1253
-	.4byte	.LVL1254
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1254
-	.4byte	.LVL1260
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1260
-	.4byte	.LVL1263
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1263
-	.4byte	.LVL1264
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1266
-	.4byte	.LFE231
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST412:
-	.4byte	.LVL1243
-	.4byte	.LVL1254
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1254
-	.4byte	.LVL1261
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1261
-	.4byte	.LVL1262
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1262
-	.4byte	.LVL1266
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1266
-	.4byte	.LVL1267
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST365:
-	.4byte	.LVL1099
-	.4byte	.LVL1100
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1100
-	.4byte	.LVL1109
-	.2byte	0x5
-	.byte	0x34
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1109
-	.4byte	.LVL1110
-	.2byte	0x5
-	.byte	0x35
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1110
-	.4byte	.LVL1124
-	.2byte	0x5
-	.byte	0x34
-	.byte	0x77
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST366:
-	.4byte	.LVL1100
-	.4byte	.LVL1101
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1101
-	.4byte	.LVL1109
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1121
-	.4byte	.LVL1122
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST367:
-	.4byte	.LVL1096
-	.4byte	.LVL1100
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1100
-	.4byte	.LVL1115
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1117
-	.4byte	.LVL1118
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1119
-	.4byte	.LVL1120
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1121
-	.4byte	.LVL1126
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1126
-	.4byte	.LFE230
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST368:
-	.4byte	.LVL1096
-	.4byte	.LVL1100
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1103
-	.4byte	.LVL1104
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1104
-	.4byte	.LVL1105
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1106
-	.4byte	.LVL1107
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1107
-	.4byte	.LVL1109
-	.2byte	0x3
-	.byte	0x70
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST369:
-	.4byte	.LVL1097
-	.4byte	.LVL1098
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1098
-	.4byte	.LVL1126
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1126
-	.4byte	.LFE230
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST44:
-	.4byte	.LVL70
-	.4byte	.LVL72
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL72
-	.4byte	.LFE229
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST45:
-	.4byte	.LVL70
-	.4byte	.LVL71
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL71
-	.4byte	.LFE229
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST46:
-	.4byte	.LVL70
-	.4byte	.LVL72
-	.2byte	0x6
-	.byte	0xc
-	.4byte	0x47c6a7e6
-	.byte	0x9f
-	.4byte	.LVL72
-	.4byte	.LFE229
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST47:
-	.4byte	.LVL70
-	.4byte	.LVL72
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL72
-	.4byte	.LVL73
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL74
-	.4byte	.LVL75
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL75
-	.4byte	.LVL76
-	.2byte	0x8
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x20
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL76
-	.4byte	.LFE229
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST338:
-	.4byte	.LVL1015
-	.4byte	.LVL1020
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1020
-	.4byte	.LVL1048
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST339:
-	.4byte	.LVL1015
-	.4byte	.LVL1021-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1021-1
-	.4byte	.LVL1048
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST340:
-	.4byte	.LVL1015
-	.4byte	.LVL1021-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1021-1
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1030
-	.4byte	.LVL1031
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1031
-	.4byte	.LVL1033
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1049
-	.4byte	.LVL1054
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST341:
-	.4byte	.LVL1015
-	.4byte	.LVL1016
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1016
-	.4byte	.LVL1029
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1030
-	.4byte	.LVL1031
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1031
-	.4byte	.LVL1033
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1048
-	.4byte	.LVL1054
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST342:
-	.4byte	.LVL1015
-	.4byte	.LVL1030
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	.LVL1030
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST343:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1041
-	.4byte	.LVL1042
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1047
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST344:
-	.4byte	.LVL1034
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST345:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1032
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x9f
-	.4byte	.LVL1032
-	.4byte	.LVL1033
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1037
-	.4byte	.LVL1041
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1041
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x4
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1054
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST346:
-	.4byte	.LVL1025
-	.4byte	.LVL1026
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1026
-	.4byte	.LVL1029
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1030
-	.4byte	.LVL1033
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1036
-	.4byte	.LVL1043
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1049
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST347:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1053
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1054
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST348:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1042
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1050
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL1050
-	.4byte	.LVL1052
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1052
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	0
-	.4byte	0
-.LLST349:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1041
-	.4byte	.LVL1042
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1051
-	.4byte	.LVL1052
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST350:
-	.4byte	.LVL1015
-	.4byte	.LVL1029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1034
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1037
-	.4byte	.LVL1039
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1039
-	.4byte	.LVL1040
-	.2byte	0x6
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1040
-	.4byte	.LVL1048
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1049
-	.4byte	.LVL1054
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1054
-	.4byte	.LVL1055
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1055
-	.4byte	.LFE227
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST351:
-	.4byte	.LVL1015
-	.4byte	.LVL1019
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1019
-	.4byte	.LVL1029
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1030
-	.4byte	.LVL1034
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1048
-	.4byte	.LVL1049
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST352:
-	.4byte	.LVL1017
-	.4byte	.LVL1018
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1018
-	.4byte	.LFE227
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST110:
-	.4byte	.LVL218
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL223
-	.4byte	.LVL225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL225
-	.4byte	.LFE226
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST111:
-	.4byte	.LVL218
-	.4byte	.LVL219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST112:
-	.4byte	.LVL220
-	.4byte	.LVL221
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL221
-	.4byte	.LVL222
-	.2byte	0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x3
-	.4byte	.LANCHOR22
-	.byte	0x22
-	.4byte	.LVL225
-	.4byte	.LFE226
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST106:
-	.4byte	.LVL208
-	.4byte	.LVL209-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL209-1
-	.4byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST107:
-	.4byte	.LVL208
-	.4byte	.LVL209-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL209-1
-	.4byte	.LFE225
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST108:
-	.4byte	.LVL208
-	.4byte	.LVL209-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL209-1
-	.4byte	.LFE225
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST109:
-	.4byte	.LVL214
-	.4byte	.LVL215
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL215
-	.4byte	.LVL216
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL216
-	.4byte	.LVL217
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL217
-	.4byte	.LFE225
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST405:
-	.4byte	.LVL1223
-	.4byte	.LVL1229
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1229
-	.4byte	.LVL1241
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1241
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST406:
-	.4byte	.LVL1223
-	.4byte	.LVL1227
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1227
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST407:
-	.4byte	.LVL1223
-	.4byte	.LVL1226
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1226
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST408:
-	.4byte	.LVL1223
-	.4byte	.LVL1224
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1224
-	.4byte	.LFE224
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST409:
-	.4byte	.LVL1237
-	.4byte	.LVL1238
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1238
-	.4byte	.LVL1239
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1239
-	.4byte	.LVL1240
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL1240
-	.4byte	.LVL1241
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST410:
-	.4byte	.LVL1225
-	.4byte	.LVL1242
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1242
-	.4byte	.LFE224
-	.2byte	0xb
-	.byte	0x3
-	.4byte	gNandParaInfo+9
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST353:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1058-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST354:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1058-1
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST355:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1058-1
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST356:
-	.4byte	.LVL1057
-	.4byte	.LVL1058-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1058-1
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST357:
-	.4byte	.LVL1059
-	.4byte	.LVL1060
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1063
-	.4byte	.LVL1064
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1064
-	.4byte	.LVL1066
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1066
-	.4byte	.LVL1067
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1067
-	.4byte	.LVL1068
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1068
-	.4byte	.LVL1069
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1069
-	.4byte	.LVL1071
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1071
-	.4byte	.LVL1072
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1072
-	.4byte	.LVL1073-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1073-1
-	.4byte	.LVL1075
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1077
-	.4byte	.LVL1078
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1078
-	.4byte	.LVL1080
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1080
-	.4byte	.LFE223
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST359:
-	.4byte	.LVL1066
-	.4byte	.LVL1069
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST358:
-	.4byte	.LVL1061
-	.4byte	.LVL1066
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST332:
-	.4byte	.LVL1000
-	.4byte	.LVL1004
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1004
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST333:
-	.4byte	.LVL1000
-	.4byte	.LVL1006-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1006-1
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1014
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST334:
-	.4byte	.LVL1000
-	.4byte	.LVL1003
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1003
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1014
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST335:
-	.4byte	.LVL1000
-	.4byte	.LVL1001
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1001
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1014
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST336:
-	.4byte	.LVL1011
-	.4byte	.LVL1012
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1012
-	.4byte	.LFE222
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST337:
-	.4byte	.LVL1002
-	.4byte	.LVL1014
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST39:
-	.4byte	.LVL64
-	.4byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL66
-	.4byte	.LFE221
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST40:
-	.4byte	.LVL64
-	.4byte	.LVL69-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL69-1
-	.4byte	.LFE221
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST41:
-	.4byte	.LVL64
-	.4byte	.LVL65
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL65
-	.4byte	.LVL66
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST42:
-	.4byte	.LVL65
-	.4byte	.LVL67
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST43:
-	.4byte	.LVL68
-	.4byte	.LVL69
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST36:
-	.4byte	.LVL60
-	.4byte	.LVL61
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL61
-	.4byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST37:
-	.4byte	.LVL60
-	.4byte	.LVL62
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL62
-	.4byte	.LVL63
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST38:
-	.4byte	.LVL62
-	.4byte	.LVL63
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST34:
-	.4byte	.LVL57
-	.4byte	.LVL58
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL58
-	.4byte	.LVL59
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST35:
-	.4byte	.LVL58
-	.4byte	.LVL59
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST31:
-	.4byte	.LVL53
-	.4byte	.LVL56-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL56-1
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST32:
-	.4byte	.LVL53
-	.4byte	.LVL54
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST33:
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST26:
-	.4byte	.LVL47
-	.4byte	.LVL49
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL49
-	.4byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST27:
-	.4byte	.LVL47
-	.4byte	.LVL51
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL51
-	.4byte	.LVL52
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST28:
-	.4byte	.LVL47
-	.4byte	.LVL50
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL50
-	.4byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST29:
-	.4byte	.LVL47
-	.4byte	.LVL48
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL48
-	.4byte	.LVL49
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST30:
-	.4byte	.LVL48
-	.4byte	.LVL49
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST23:
-	.4byte	.LVL43
-	.4byte	.LVL46-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL46-1
-	.4byte	.LFE216
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST24:
-	.4byte	.LVL43
-	.4byte	.LVL44
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL44
-	.4byte	.LVL45
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST25:
-	.4byte	.LVL44
-	.4byte	.LVL45
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST129:
-	.4byte	.LVL281
-	.4byte	.LVL286-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL286-1
-	.4byte	.LVL289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL289
-	.4byte	.LFE213
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST130:
-	.4byte	.LVL281
-	.4byte	.LVL282
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL282
-	.4byte	.LVL288
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL288
-	.4byte	.LVL289
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL289
-	.4byte	.LFE213
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST131:
-	.4byte	.LVL281
-	.4byte	.LVL285
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL285
-	.4byte	.LVL287
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL287
-	.4byte	.LVL289
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	.LVL289
-	.4byte	.LFE213
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST132:
-	.4byte	.LVL281
-	.4byte	.LVL283
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL283
-	.4byte	.LVL284
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST14:
-	.4byte	.LVL29
-	.4byte	.LVL32-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL32-1
-	.4byte	.LVL32
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL32
-	.4byte	.LFE212
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST15:
-	.4byte	.LVL29
-	.4byte	.LVL30
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL30
-	.4byte	.LVL31
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST16:
-	.4byte	.LVL30
-	.4byte	.LVL31
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST11:
-	.4byte	.LVL25
-	.4byte	.LVL28-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL28-1
-	.4byte	.LFE211
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST12:
-	.4byte	.LVL25
-	.4byte	.LVL26
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL26
-	.4byte	.LVL27
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST13:
-	.4byte	.LVL26
-	.4byte	.LVL27
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST136:
-	.4byte	.LVL301
-	.4byte	.LVL302
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL302
-	.4byte	.LFE210
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST104:
-	.4byte	.LVL202
-	.4byte	.LVL205-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL205-1
-	.4byte	.LFE207
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST105:
-	.4byte	.LVL202
-	.4byte	.LVL203
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL203
-	.4byte	.LVL204
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST6:
-	.4byte	.LVL18
-	.4byte	.LVL20-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL20-1
-	.4byte	.LFE206
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST7:
-	.4byte	.LVL19
-	.4byte	.LVL24
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST8:
-	.4byte	.LVL21
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST9:
-	.4byte	.LVL21
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST10:
-	.4byte	.LVL22
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST4:
-	.4byte	.LVL13
-	.4byte	.LVL15-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL15-1
-	.4byte	.LFE205
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST5:
-	.4byte	.LVL14
-	.4byte	.LVL17
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL17
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST3:
-	.4byte	.LVL9
-	.4byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL10
-	.4byte	.LVL11
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL11
-	.4byte	.LVL12
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL12
-	.4byte	.LFE204
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST1:
-	.4byte	.LVL2
-	.4byte	.LVL5
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL5
-	.4byte	.LVL6
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL6
-	.4byte	.LVL8
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL8
-	.4byte	.LFE203
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST2:
-	.4byte	.LVL3
-	.4byte	.LVL4
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL6
-	.4byte	.LVL7
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL7
-	.4byte	.LFE203
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST0:
-	.4byte	.LVL0
-	.4byte	.LVL1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1
-	.4byte	.LFE507
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST17:
-	.4byte	.LVL34
-	.4byte	.LVL37
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST18:
-	.4byte	.LVL34
-	.4byte	.LVL35
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL35
-	.4byte	.LVL36
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST19:
-	.4byte	.LVL35
-	.4byte	.LVL36
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST20:
-	.4byte	.LVL39
-	.4byte	.LVL42
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST21:
-	.4byte	.LVL39
-	.4byte	.LVL40
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL40
-	.4byte	.LVL41
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST22:
-	.4byte	.LVL40
-	.4byte	.LVL41
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST76:
-	.4byte	.LVL129
-	.4byte	.LVL129
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL129
-	.4byte	.LVL130
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST77:
-	.4byte	.LVL129
-	.4byte	.LVL130
-	.2byte	0x1f
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap+4
-	.byte	0x22
-	.byte	0x6
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x8
-	.byte	0x38
-	.byte	0x24
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST78:
-	.4byte	.LVL129
-	.4byte	.LVL130
-	.2byte	0xa
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.4byte	gNandChipMap
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST94:
-	.4byte	.LVL178
-	.4byte	.LVL179
-	.2byte	0x8
-	.byte	0x3
-	.4byte	gpNandParaInfo
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x13
-	.4byte	0
-	.4byte	0
-.LLST95:
-	.4byte	.LVL180
-	.4byte	.LVL181-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL181-1
-	.4byte	.LVL181
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL181
-	.4byte	.LVL182
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST100:
-	.4byte	.LVL193
-	.4byte	.LVL194-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL194-1
-	.4byte	.LFE276
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST165:
-	.4byte	.LVL404
-	.4byte	.LVL405
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL405
-	.4byte	.LVL406
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL406
-	.4byte	.LVL407
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL407
-	.4byte	.LFE299
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST166:
-	.4byte	.LVL408
-	.4byte	.LVL409
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL409
-	.4byte	.LFE312
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST196:
-	.4byte	.LVL481
-	.4byte	.LVL509
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL509
-	.4byte	.LVL510
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL510
-	.4byte	.LFE339
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST197:
-	.4byte	.LVL482
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL510
-	.4byte	.LFE339
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST198:
-	.4byte	.LVL483
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL510
-	.4byte	.LVL515
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL515
-	.4byte	.LVL516
-	.2byte	0x8
-	.byte	0x70
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL516
-	.4byte	.LVL517
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL517
-	.4byte	.LFE339
-	.2byte	0x8
-	.byte	0x70
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST199:
-	.4byte	.LVL486
-	.4byte	.LVL500
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL502
-	.4byte	.LVL507
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL510
-	.4byte	.LVL511
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL513
-	.4byte	.LFE339
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST200:
-	.4byte	.LVL484
-	.4byte	.LVL485
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL485
-	.4byte	.LVL497
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL500
-	.4byte	.LVL501
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL501
-	.4byte	.LVL506
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL510
-	.4byte	.LVL514
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST201:
-	.4byte	.LVL492
-	.4byte	.LVL495
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL495
-	.4byte	.LVL497
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL502
-	.4byte	.LVL504
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL504
-	.4byte	.LVL506
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL510
-	.4byte	.LVL512
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST202:
-	.4byte	.LVL484
-	.4byte	.LVL485
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL485
-	.4byte	.LVL486
-	.2byte	0x15
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL486
-	.4byte	.LVL487
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL487
-	.4byte	.LVL500
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL500
-	.4byte	.LVL501
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL501
-	.4byte	.LVL502
-	.2byte	0x15
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL502
-	.4byte	.LVL508
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL510
-	.4byte	.LFE339
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST203:
-	.4byte	.LVL493
-	.4byte	.LVL494
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL494
-	.4byte	.LVL496
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL502
-	.4byte	.LVL503
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL503
-	.4byte	.LVL504
-	.2byte	0x10
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL504
-	.4byte	.LVL505
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST204:
-	.4byte	.LVL488
-	.4byte	.LVL498
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL498
-	.4byte	.LVL499
-	.2byte	0x5
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x74
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL502
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL510
-	.4byte	.LVL514
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST205:
-	.4byte	.LVL518
-	.4byte	.LVL519-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL519-1
-	.4byte	.LFE338
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST210:
-	.4byte	.LVL541
-	.4byte	.LVL542-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL542-1
-	.4byte	.LFE337
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST223:
-	.4byte	.LVL584
-	.4byte	.LVL590
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL590
-	.4byte	.LVL604
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL604
-	.4byte	.LVL606
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST224:
-	.4byte	.LVL585
-	.4byte	.LVL590
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL590
-	.4byte	.LVL603
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL604
-	.4byte	.LVL606
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST225:
-	.4byte	.LVL593
-	.4byte	.LVL595
-	.2byte	0x5
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL595
-	.4byte	.LVL600-1
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST226:
-	.4byte	.LVL587
-	.4byte	.LVL589
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL589
-	.4byte	.LVL590
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL590
-	.4byte	.LVL591-1
-	.2byte	0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL604
-	.4byte	.LVL606
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST227:
-	.4byte	.LVL587
-	.4byte	.LVL588
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL588
-	.4byte	.LVL598
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL604
-	.4byte	.LVL605
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL605
-	.4byte	.LVL606
-	.2byte	0x10
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x7a
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST228:
-	.4byte	.LVL594
-	.4byte	.LVL599
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL599
-	.4byte	.LVL600-1
-	.2byte	0x1c
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x26
-	.byte	0x11
-	.sleb128 -1431655765
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST229:
-	.4byte	.LVL596
-	.4byte	.LVL597
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL597
-	.4byte	.LVL600-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL606
-	.4byte	.LVL607
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL607
-	.4byte	.LFE344
-	.2byte	0x10
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST230:
-	.4byte	.LVL586
-	.4byte	.LVL603
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL604
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST231:
-	.4byte	.LVL593
-	.4byte	.LVL595
-	.2byte	0xa
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL595
-	.4byte	.LVL600-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL606
-	.4byte	.LFE344
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST232:
-	.4byte	.LVL608
-	.4byte	.LVL611-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL611-1
-	.4byte	.LVL616
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL616
-	.4byte	.LFE347
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST233:
-	.4byte	.LVL608
-	.4byte	.LVL609
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL616
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST234:
-	.4byte	.LVL608
-	.4byte	.LVL611-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST235:
-	.4byte	.LVL613
-	.4byte	.LVL615
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST239:
-	.4byte	.LVL638
-	.4byte	.LVL640
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL640
-	.4byte	.LFE358
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST240:
-	.4byte	.LVL639
-	.4byte	.LVL640
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL640
-	.4byte	.LFE358
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST241:
-	.4byte	.LVL641
-	.4byte	.LVL642-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL642-1
-	.4byte	.LVL642
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL643
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL643
-	.4byte	.LFE363
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST242:
-	.4byte	.LVL641
-	.4byte	.LVL642-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL642-1
-	.4byte	.LVL642
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL644
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL644
-	.4byte	.LFE363
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST258:
-	.4byte	.LVL689
-	.4byte	.LVL691-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL691-1
-	.4byte	.LFE385
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST259:
-	.4byte	.LVL690
-	.4byte	.LVL691-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL691-1
-	.4byte	.LVL691
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST360:
-	.4byte	.LVL1081
-	.4byte	.LVL1083
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1083
-	.4byte	.LFE228
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST361:
-	.4byte	.LVL1081
-	.4byte	.LVL1084-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1084-1
-	.4byte	.LFE228
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST362:
-	.4byte	.LVL1082
-	.4byte	.LVL1087
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1087
-	.4byte	.LVL1088
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1088
-	.4byte	.LVL1090
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST363:
-	.4byte	.LVL1091
-	.4byte	.LVL1094
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST364:
-	.4byte	.LVL1091
-	.4byte	.LVL1094
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST422:
-	.4byte	.LVL1303
-	.4byte	.LVL1304
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1304
-	.4byte	.LFE484
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST472:
-	.4byte	.LVL1547
-	.4byte	.LVL1548-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1548-1
-	.4byte	.LVL1548
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1548
-	.4byte	.LVL1549
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1549
-	.4byte	.LVL1550
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1550
-	.4byte	.LVL1551
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1551
-	.4byte	.LVL1552
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1552
-	.4byte	.LVL1553
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1553
-	.4byte	.LVL1554
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1554
-	.4byte	.LVL1555
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1555
-	.4byte	.LVL1556
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1556
-	.4byte	.LVL1557
-	.2byte	0x4
-	.byte	0x72
-	.sleb128 65
-	.byte	0x9f
-	.4byte	.LVL1557
-	.4byte	.LVL1558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1558
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1559
-	.4byte	.LVL1560
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1560
-	.4byte	.LFE237
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST473:
-	.4byte	.LVL1554
-	.4byte	.LVL1555
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1555
-	.4byte	.LVL1556
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1556
-	.4byte	.LVL1557
-	.2byte	0x4
-	.byte	0x72
-	.sleb128 65
-	.byte	0x9f
-	.4byte	.LVL1557
-	.4byte	.LVL1558
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1558
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1559
-	.4byte	.LVL1560
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST526:
-	.4byte	.LVL1804
-	.4byte	.LVL1806
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1806
-	.4byte	.LVL1814
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1814
-	.4byte	.LFE235
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST527:
-	.4byte	.LVL1805
-	.4byte	.LVL1807
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST539:
-	.4byte	.LVL1876
-	.4byte	.LVL1878
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1889
-	.4byte	.LVL1890
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1890
-	.4byte	.LVL1891
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST540:
-	.4byte	.LVL1877
-	.4byte	.LVL1888
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1892
-	.4byte	.LFE320
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST541:
-	.4byte	.LVL1894
-	.4byte	.LVL1895
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1895
-	.4byte	.LVL1944
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1944
-	.4byte	.LFE386
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST542:
-	.4byte	.LVL1906
-	.4byte	.LVL1912
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1913
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST543:
-	.4byte	.LVL1916
-	.4byte	.LVL1931
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1932
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST544:
-	.4byte	.LVL1923
-	.4byte	.LVL1924
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1926
-	.4byte	.LVL1927
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1927
-	.4byte	.LVL1930
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1936
-	.4byte	.LVL1939
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1939
-	.4byte	.LVL1940
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1941
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST545:
-	.4byte	.LVL1926
-	.4byte	.LVL1927
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1927
-	.4byte	.LVL1930
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1936
-	.4byte	.LVL1943
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST546:
-	.4byte	.LVL1933
-	.4byte	.LVL1935
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST547:
-	.4byte	.LVL1933
-	.4byte	.LVL1935
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST548:
-	.4byte	.LVL1945
-	.4byte	.LVL1946
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1946
-	.4byte	.LFE406
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST549:
-	.4byte	.LVL1946
-	.4byte	.LVL1947
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1948
-	.4byte	.LVL1952
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1952
-	.4byte	.LVL1953
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1954
-	.4byte	.LFE406
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST550:
-	.4byte	.LVL1951
-	.4byte	.LVL1957
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1957
-	.4byte	.LVL1958
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1958
-	.4byte	.LVL1959
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1959
-	.4byte	.LVL1960
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1960
-	.4byte	.LFE406
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST551:
-	.4byte	.LVL1956
-	.4byte	.LVL1958
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1960
-	.4byte	.LVL1961
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1962
-	.4byte	.LFE406
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST552:
-	.4byte	.LVL1963
-	.4byte	.LVL1965
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1965
-	.4byte	.LVL1973
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1973
-	.4byte	.LVL1974
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1974
-	.4byte	.LVL1975
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1975
-	.4byte	.LVL1976-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1976-1
-	.4byte	.LFE389
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST553:
-	.4byte	.LVL1964
-	.4byte	.LVL1973
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST556:
-	.4byte	.LVL1989
-	.4byte	.LVL1991
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1991
-	.4byte	.LVL1998
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1998
-	.4byte	.LFE373
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST557:
-	.4byte	.LVL1990
-	.4byte	.LVL1991
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1991
-	.4byte	.LVL1997
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST558:
-	.4byte	.LVL1991
-	.4byte	.LVL1992
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1995
-	.4byte	.LVL1996
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST562:
-	.4byte	.LVL2017
-	.4byte	.LVL2036
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2037
-	.4byte	.LFE360
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST563:
-	.4byte	.LVL2022
-	.4byte	.LVL2023
-	.2byte	0x12
-	.byte	0x70
-	.sleb128 0
-	.byte	0x33
-	.byte	0x25
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	.LVL2023
-	.4byte	.LVL2024-1
-	.2byte	0x1c
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0x33
-	.byte	0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x18
-	.byte	0x31
-	.byte	0x24
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST592:
-	.4byte	.LVL2161
-	.4byte	.LVL2162
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2162
-	.4byte	.LFE350
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST593:
-	.4byte	.LVL2161
-	.4byte	.LVL2162
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2162
-	.4byte	.LFE350
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST594:
-	.4byte	.LVL2161
-	.4byte	.LVL2162
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2162
-	.4byte	.LVL2177
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL2177
-	.4byte	.LVL2178
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL2178
-	.4byte	.LFE350
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST595:
-	.4byte	.LVL2168
-	.4byte	.LVL2176
-	.2byte	0x7
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL2178
-	.4byte	.LFE350
-	.2byte	0x7
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST596:
-	.4byte	.LVL2170
-	.4byte	.LVL2171
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST723:
-	.4byte	.LVL2799
-	.4byte	.LVL2800-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST724:
-	.4byte	.LVL2824
-	.4byte	.LVL2825
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	.LVL2825
-	.4byte	.LVL2831
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST725:
-	.4byte	.LVL2833
-	.4byte	.LVL2837
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2837
-	.4byte	.LVL2840
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2840
-	.4byte	.LVL2845
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2845
-	.4byte	.LVL2853
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2853
-	.4byte	.LVL2854
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2854
-	.4byte	.LVL2906
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2906
-	.4byte	.LVL2907
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2907
-	.4byte	.LVL2908
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2908
-	.4byte	.LVL2909
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2909
-	.4byte	.LFE407
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST726:
-	.4byte	.LVL2833
-	.4byte	.LVL2835
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2835
-	.4byte	.LVL2906
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2906
-	.4byte	.LFE407
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST727:
-	.4byte	.LVL2834
-	.4byte	.LVL2835
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL2835
-	.4byte	.LVL2839
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL2840
-	.4byte	.LVL2905
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST728:
-	.4byte	.LVL2834
-	.4byte	.LVL2837
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2837
-	.4byte	.LVL2839
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2840
-	.4byte	.LVL2845
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2845
-	.4byte	.LVL2853
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL2853
-	.4byte	.LVL2854
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2854
-	.4byte	.LVL2905
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST729:
-	.4byte	.LVL2886
-	.4byte	.LVL2890
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST730:
-	.4byte	.LVL2870
-	.4byte	.LVL2871
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2871
-	.4byte	.LVL2881
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL2881
-	.4byte	.LVL2882
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -64
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL2883
-	.4byte	.LVL2905
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	0
-	.4byte	0
-.LLST731:
-	.4byte	.LVL2872
-	.4byte	.LVL2876
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2876
-	.4byte	.LVL2877
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL2877
-	.4byte	.LVL2878-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2878
-	.4byte	.LVL2879
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2880
-	.4byte	.LVL2894
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL2895
-	.4byte	.LVL2896
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST732:
-	.4byte	.LVL2872
-	.4byte	.LVL2894
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL2895
-	.4byte	.LVL2896
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST733:
-	.4byte	.LVL2873
-	.4byte	.LVL2874
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2874
-	.4byte	.LVL2875
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.4byte	0
-	.4byte	0
-.LLST734:
-	.4byte	.LVL2867
-	.4byte	.LVL2905
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST735:
-	.4byte	.LVL2884
-	.4byte	.LVL2885
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 12
-	.4byte	.LVL2885
-	.4byte	.LVL2894
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST736:
-	.4byte	.LVL2910
-	.4byte	.LVL2911
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2911
-	.4byte	.LFE302
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST737:
-	.4byte	.LVL2922
-	.4byte	.LVL2923
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x400
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
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-	.ascii	"UCLASS_VIDEO_CONSOLE\000"
-.LASF644:
-	.ascii	"last_refresh_read_count\000"
-.LASF290:
-	.ascii	"gNandcVer\000"
-.LASF1485:
-	.ascii	"FlashDeInit\000"
-.LASF1136:
-	.ascii	"current_ppa\000"
-.LASF1013:
-	.ascii	"work_sem\000"
-.LASF1342:
-	.ascii	"FtlGetCapacity\000"
-.LASF590:
-	.ascii	"pMapPpnTbl\000"
-.LASF950:
-	.ascii	"ubi_fm_pool\000"
-.LASF574:
-	.ascii	"net_state\000"
-.LASF60:
-	.ascii	"Cell\000"
-.LASF701:
-	.ascii	"ftl_gc_temp_power_lost_recovery_flag\000"
-.LASF1134:
-	.ascii	"totle_num\000"
-.LASF1095:
-	.ascii	"Index\000"
-.LASF1199:
-	.ascii	"next_free_active_page\000"
-.LASF1021:
-	.ascii	"bgt_thread\000"
-.LASF1123:
-	.ascii	"spperBlk\000"
-.LASF205:
-	.ascii	"reserved18_31\000"
-.LASF437:
-	.ascii	"verify\000"
-.LASF1232:
-	.ascii	"ftl_set_blk_mode\000"
-.LASF1399:
-	.ascii	"fmctl\000"
-.LASF915:
-	.ascii	"_put_device\000"
-.LASF571:
-	.ascii	"NETLOOP_RESTART\000"
-.LASF3:
-	.ascii	"uint8\000"
-.LASF1129:
-	.ascii	"Ftl_gc_temp_data_write_back\000"
-.LASF953:
-	.ascii	"max_size\000"
-.LASF956:
-	.ascii	"ref_count\000"
-.LASF947:
-	.ascii	"used_blocks\000"
-.LASF1240:
-	.ascii	"re_save_vpndata\000"
-.LASF742:
-	.ascii	"p_valid_page_count_check_table\000"
-.LASF263:
-	.ascii	"LLP_CTL\000"
-.LASF785:
-	.ascii	"g_gc_free_blk_threshold\000"
-.LASF931:
-	.ascii	"eccbytes\000"
-.LASF762:
-	.ascii	"g_num_free_superblocks\000"
-.LASF533:
-	.ascii	"s_addr\000"
-.LASF1103:
-	.ascii	"pvTo\000"
-.LASF1331:
-	.ascii	"re_save_bbmdata\000"
-.LASF16:
-	.ascii	"pageAddr\000"
-.LASF507:
-	.ascii	"UCLASS_SYSRESET\000"
-.LASF941:
-	.ascii	"name_len\000"
-.LASF881:
-	.ascii	"writebufsize\000"
-.LASF1024:
-	.ascii	"flash_size\000"
-.LASF1212:
-	.ascii	"last_save_page_version\000"
-.LASF239:
-	.ascii	"reserved21_31\000"
-.LASF443:
-	.ascii	"UCLASS_ROOT\000"
-.LASF1471:
-	.ascii	"FlashReadSlc2KPages\000"
-.LASF617:
-	.ascii	"activePageOffset\000"
-.LASF459:
-	.ascii	"UCLASS_CROS_EC\000"
-.LASF683:
-	.ascii	"c_ftl_nand_sec_pre_page_shift\000"
-.LASF542:
-	.ascii	"index\000"
-.LASF1369:
-	.ascii	"create_first_active_superblock\000"
-.LASF796:
-	.ascii	"g_totle_l2p_write_count\000"
-.LASF932:
-	.ascii	"eccpos\000"
-.LASF82:
-	.ascii	"Hynix\000"
-.LASF207:
-	.ascii	"tagBCH_CTL\000"
-.LASF232:
-	.ascii	"fl_pwd\000"
-.LASF921:
-	.ascii	"lockmap\000"
-.LASF147:
-	.ascii	"gFlashSpareBuffer\000"
-.LASF18:
-	.ascii	"pSpare\000"
-.LASF1550:
-	.ascii	"FlashEraseCmd\000"
-.LASF1526:
-	.ascii	"FlashLoadPhyInfo\000"
-.LASF1579:
-	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
-	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
-	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
-	.ascii	"-a9 -mfpu=vfpv3-d16 -mtls-dialect=gnu -g -Os -fno-b"
-	.ascii	"uiltin -ffreestanding -fshort-wchar -fno-strict-ali"
-	.ascii	"asing -fno-stack-protector -fno-delete-null-pointer"
-	.ascii	"-checks -fstack-usage -fno-pic -ffunction-sections "
-	.ascii	"-fdata-sections -fno-common -ffixed-r9\000"
-.LASF812:
-	.ascii	"g_recovery_page_min_ver\000"
-.LASF148:
-	.ascii	"gFlashProgCheckBuffer\000"
-.LASF1345:
-	.ascii	"blkcnt\000"
-.LASF160:
-	.ascii	"rdyIntEn\000"
-.LASF38:
-	.ascii	"NAND_OPT_PAR_T\000"
-.LASF395:
-	.ascii	"ih_load\000"
-.LASF1354:
+	.byte	-32
+	.byte	-37
+	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
+.LC9:
+	.ascii	"sdr read ok %x ecc=%d\012\000"
+.LC10:
+	.ascii	"sync para %d\012\000"
+.LC11:
+	.ascii	"TOG mode Read error %x %x\012\000"
+	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
+	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
+.LC23:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC24:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
+.LC29:
+	.ascii	"prog error: = %x\012\000"
+.LC30:
+	.ascii	"prog read error: = %x\012\000"
+.LC31:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC32:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
+.LC54:
+	.ascii	"BBT:\000"
+	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
+.LC14:
+	.ascii	"ECC:%d\012\000"
+	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
+.LC12:
+	.ascii	"read retry status %x %x %x\012\000"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
+.LC28:
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
+.LC25:
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+.LC26:
+	.ascii	"data:\000"
+.LC27:
+	.ascii	"spare:\000"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
+.LC2:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
+.LC33:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC34:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC35:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlCheckVpc.str1.1,"aMS",%progbits,1
+.LC74:
+	.ascii	"vpc1\000"
+.LC75:
+	.ascii	"vpc2\000"
+.LC76:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC77:
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",%progbits,1
+.LC46:
+	.ascii	"...%s enter...\012\000"
+.LC47:
+	.ascii	"superBlkID = %x vpc=%x\012\000"
+.LC48:
+	.ascii	"flashmode = %x pagenum = %x %x\012\000"
+.LC49:
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",%progbits,1
+.LC78:
+	.ascii	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\012"
+	.ascii	"\000"
+.LC79:
+	.ascii	":\000"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
+.LC3:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC4:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
+	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
+.LC65:
+	.ascii	"GC des block %x done\012\000"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
+.LC53:
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
+	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
+.LC67:
+	.ascii	"FTL version: 5.0.49 20180810\000"
+.LC68:
+	.ascii	"...%s: no bad block mapping table, format device\012"
+	.ascii	"\000"
+.LC69:
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
+.LC44:
+	.ascii	"no ect\000"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"FtlMapWritePage error = %x\012\000"
+.LC42:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
+.LC58:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
+.LC62:
+	.ascii	"RSB refresh addr %x\012\000"
+.LC63:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC64:
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
+	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",%progbits,1
+.LC50:
+	.ascii	"blk = %x vpc=%x mode = %x\012\000"
+.LC51:
+	.ascii	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
+	.ascii	"%x\012\000"
+.LC52:
+	.ascii	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x "
+	.ascii	"%x\012\000"
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
+.LC43:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
+.LC38:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
+.LC73:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
+.LC45:
+	.ascii	"slc mode\000"
+	.section	.rodata.Ftlscanalldata.str1.1,"aMS",%progbits,1
+.LC59:
+	.ascii	"Ftlscanalldata = %x\012\000"
+.LC60:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC61:
+	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
+.LC21:
+	.ascii	"otp error! %d\000"
+.LC22:
+	.ascii	"rr\000"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
+.LC5:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+.LC6:
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
+.LC7:
+	.ascii	"%s\012\000"
+	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
+.LC13:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.__func__.10473,"a",%progbits
+	.set	.LANCHOR245,. + 0
+	.type	__func__.10473, %object
+	.size	__func__.10473, 8
+__func__.10473:
+	.ascii	"FtlInit\000"
+	.section	.rodata.__func__.10533,"a",%progbits
+	.set	.LANCHOR229,. + 0
+	.type	__func__.10533, %object
+	.size	__func__.10533, 13
+__func__.10533:
 	.ascii	"FtlProgPages\000"
-.LASF198:
-	.ascii	"powerDown\000"
-.LASF679:
-	.ascii	"c_ftl_nand_page_pre_blk\000"
-.LASF1303:
-	.ascii	"blk_Id\000"
-.LASF520:
-	.ascii	"UCLASS_KEY\000"
-.LASF1576:
-	.ascii	"memcpy\000"
-.LASF1467:
-	.ascii	"Randomizer_disable_reread\000"
-.LASF372:
-	.ascii	"_datarel_start_ofs\000"
-.LASF650:
-	.ascii	"List_Node\000"
-.LASF1148:
-	.ascii	"FtlGcUpdatePage\000"
-.LASF1006:
-	.ascii	"fm_work_scheduled\000"
-.LASF181:
-	.ascii	"intEn\000"
-.LASF772:
-	.ascii	"p_gc_blk_tbl\000"
-.LASF591:
-	.ascii	"in_gc_mode\000"
-.LASF241:
-	.ascii	"MTRANS_STAT\000"
-.LASF454:
-	.ascii	"UCLASS_ADC\000"
-.LASF185:
-	.ascii	"reserved18_19\000"
-.LASF221:
-	.ascii	"errBits1_5\000"
-.LASF615:
-	.ascii	"gcTempFlashMode\000"
-.LASF1296:
-	.ascii	"node_data_count\000"
-.LASF1528:
-	.ascii	"checkBlkSize\000"
-.LASF209:
-	.ascii	"errf0\000"
-.LASF214:
-	.ascii	"errf1\000"
-.LASF399:
-	.ascii	"ih_arch\000"
-.LASF1041:
-	.ascii	"vid_hdr_shift\000"
-.LASF264:
-	.ascii	"LLP_STAT\000"
-.LASF470:
-	.ascii	"UCLASS_IRQ\000"
-.LASF1534:
-	.ascii	"error_ecc0_count\000"
-.LASF154:
-	.ascii	"NC_IRQ_DMA\000"
-.LASF253:
-	.ascii	"BCHST\000"
-.LASF303:
-	.ascii	"__u8\000"
-.LASF1529:
-	.ascii	"JSHash\000"
-.LASF774:
-	.ascii	"g_gc_page_offset\000"
-.LASF1401:
-	.ascii	"NandcCopy1KB\000"
-.LASF546:
-	.ascii	"net_gateway\000"
-.LASF825:
-	.ascii	"Toshiba15RefValue\000"
-.LASF257:
-	.ascii	"DLL_OBS_REG0\000"
-.LASF1315:
-	.ascii	"ftl_cmp_data_ver\000"
-.LASF706:
-	.ascii	"g_VaildLpn\000"
-.LASF1512:
-	.ascii	"HynixGetReadRetryDefault\000"
-.LASF751:
-	.ascii	"p_vendor_block_valid_page_count\000"
-.LASF1554:
-	.ascii	"FlashReadDpCmd\000"
-.LASF1019:
-	.ascii	"works\000"
-.LASF1533:
-	.ascii	"cur_ecc\000"
-.LASF170:
-	.ascii	"reserved18_23\000"
-.LASF568:
-	.ascii	"net_ping_ip\000"
-.LASF112:
-	.ascii	"FlashMask\000"
-.LASF409:
-	.ascii	"type\000"
-.LASF347:
-	.ascii	"lmb_region\000"
-.LASF1153:
-	.ascii	"numREQ\000"
-.LASF108:
-	.ascii	"PageSize\000"
-.LASF341:
-	.ascii	"protect\000"
-.LASF1061:
-	.ascii	"dfs_chk_gen\000"
-.LASF1223:
-	.ascii	"blk_id\000"
-.LASF626:
-	.ascii	"GlobalDataVersion\000"
-.LASF1307:
-	.ascii	"erase_flag\000"
-.LASF1567:
-	.ascii	"FlashGetRandomizer\000"
-.LASF32:
-	.ascii	"pagePerSlcBlk\000"
-.LASF639:
-	.ascii	"last_refresh_data_times\000"
-.LASF192:
-	.ascii	"async_tog_mix\000"
-.LASF1226:
-	.ascii	"totleBlkNum\000"
-.LASF853:
-	.ascii	"cdev\000"
-.LASF1196:
-	.ascii	"saved_active_page\000"
-.LASF1546:
-	.ascii	"FlashReadStatus\000"
-.LASF1290:
-	.ascii	"pTmp\000"
-.LASF235:
-	.ascii	"tagMTRANS_CFG\000"
-.LASF186:
-	.ascii	"trRdy\000"
-.LASF957:
-	.ascii	"readers\000"
-.LASF485:
-	.ascii	"UCLASS_PCI\000"
-.LASF833:
-	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
-.LASF1416:
-	.ascii	"nandc_reg\000"
-.LASF847:
-	.ascii	"devt\000"
-.LASF1091:
-	.ascii	"FlashBootVendorWrite\000"
-.LASF1206:
-	.ascii	"recovery_flash_mode\000"
-.LASF445:
-	.ascii	"UCLASS_TEST\000"
-.LASF945:
-	.ascii	"ubi_fastmap_layout\000"
-.LASF765:
-	.ascii	"g_buffer_superblock\000"
-.LASF1188:
-	.ascii	"node_id\000"
-.LASF423:
-	.ascii	"fit_hdr_fdt\000"
-.LASF567:
-	.ascii	"net_boot_file_expected_size_in_blocks\000"
-.LASF328:
-	.ascii	"image_base\000"
-.LASF415:
-	.ascii	"legacy_hdr_valid\000"
-.LASF1462:
-	.ascii	"nextChipSel\000"
-.LASF510:
-	.ascii	"UCLASS_TPM\000"
-.LASF1062:
-	.ascii	"dfs_chk_io\000"
-.LASF1488:
-	.ascii	"FlashLoadPhyInfoInRam\000"
-.LASF1142:
-	.ascii	"FtlGcFreeTempBlock\000"
-.LASF711:
-	.ascii	"gBbtInfo\000"
-.LASF236:
-	.ascii	"MTRANS_CFG\000"
-.LASF476:
-	.ascii	"UCLASS_MISC\000"
-.LASF339:
-	.ascii	"sector_count\000"
-.LASF682:
-	.ascii	"c_ftl_nand_sec_pre_page\000"
-.LASF923:
-	.ascii	"mode\000"
-.LASF1047:
-	.ascii	"ckvol_mutex\000"
-.LASF1490:
-	.ascii	"FlashReadIdbData\000"
-.LASF1325:
-	.ascii	"FtlLoadBbt\000"
-.LASF313:
-	.ascii	"__kernel_loff_t\000"
-.LASF1104:
-	.ascii	"pvForm\000"
-.LASF600:
-	.ascii	"padding\000"
-.LASF129:
-	.ascii	"gNandFlashEccBits\000"
-.LASF1149:
-	.ascii	"src_ppa\000"
-.LASF1200:
-	.ascii	"detected_active_page\000"
-.LASF1524:
-	.ascii	"FlashSavePhyInfo\000"
-.LASF665:
-	.ascii	"ftl_gc_page_item\000"
-.LASF999:
-	.ascii	"fm_disabled\000"
-.LASF835:
-	.ascii	"mem_malloc_start\000"
-.LASF517:
-	.ascii	"UCLASS_VIDEO_CRTC\000"
-.LASF70:
-	.ascii	"badBlockMode\000"
-.LASF1202:
-	.ascii	"prev_ppa\000"
-.LASF403:
-	.ascii	"image_header_t\000"
-.LASF251:
-	.ascii	"MTRANS_SADDR0\000"
-.LASF252:
-	.ascii	"MTRANS_SADDR1\000"
-.LASF754:
-	.ascii	"g_totle_vendor_block\000"
-.LASF1144:
-	.ascii	"superblock_id\000"
-.LASF959:
-	.ascii	"exclusive\000"
-.LASF1114:
-	.ascii	"plane\000"
-.LASF307:
-	.ascii	"phys_addr_t\000"
-.LASF1012:
-	.ascii	"move_mutex\000"
-.LASF1486:
-	.ascii	"FlashInit\000"
-.LASF151:
-	.ascii	"FlashWaitBusyScheduleEn\000"
-.LASF400:
-	.ascii	"ih_type\000"
-.LASF2:
-	.ascii	"unsigned char\000"
-.LASF822:
-	.ascii	"refValueDefault\000"
-.LASF114:
-	.ascii	"read_retry_cur_offset\000"
-.LASF514:
-	.ascii	"UCLASS_VIDEO\000"
-.LASF1346:
-	.ascii	"ftl_write\000"
-.LASF1132:
-	.ascii	"FtlGcScanTempBlk\000"
-.LASF105:
-	.ascii	"_FLASH_INFO\000"
-.LASF414:
-	.ascii	"legacy_hdr_os_copy\000"
-.LASF1274:
-	.ascii	"vpcTbl\000"
-.LASF310:
-	.ascii	"__kernel_dev_t\000"
-.LASF1074:
-	.ascii	"ubi_ctrl_cdev_operations\000"
-.LASF483:
-	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
-.LASF165:
-	.ascii	"reserved16_31\000"
-.LASF616:
-	.ascii	"activeSuperblockId\000"
-.LASF1400:
-	.ascii	"bchReg\000"
-.LASF1316:
-	.ascii	"ver1\000"
-.LASF24:
-	.ascii	"nand_phy_info\000"
-.LASF846:
-	.ascii	"class\000"
-.LASF1053:
-	.ascii	"emulate_bitflips\000"
-.LASF1493:
-	.ascii	"bchTbl\000"
-.LASF1124:
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-.LASF523:
-	.ascii	"UCLASS_COUNT\000"
-.LASF481:
-	.ascii	"UCLASS_NVME\000"
-.LASF1031:
-	.ascii	"max_erroneous\000"
-.LASF1167:
-	.ascii	"new_id\000"
-.LASF622:
-	.ascii	"cache_write_count\000"
-.LASF1161:
-	.ascii	"new_ppa\000"
-.LASF564:
-	.ascii	"net_restart_wrap\000"
-.LASF648:
-	.ascii	"totle_read_sector\000"
-.LASF618:
-	.ascii	"bufferSuperblockId\000"
-.LASF26:
-	.ascii	"vendor\000"
-.LASF1341:
-	.ascii	"ftl_get_density\000"
-.LASF10:
-	.ascii	"int32\000"
-.LASF646:
-	.ascii	"refresh_start_lpa\000"
-.LASF385:
-	.ascii	"boot_cpuid_phys\000"
-.LASF581:
-	.ascii	"maxLogicBlk\000"
-.LASF312:
-	.ascii	"__kernel_size_t\000"
-.LASF1458:
-	.ascii	"readReq1\000"
-.LASF780:
-	.ascii	"g_gc_bad_block_gc_index\000"
-.LASF890:
-	.ascii	"ecc_step_size\000"
-.LASF345:
-	.ascii	"lmb_property\000"
-.LASF1578:
-	.ascii	"udelay\000"
-.LASF737:
-	.ascii	"g_ect_tbl_info_size\000"
-.LASF56:
-	.ascii	"NandID\000"
-.LASF707:
-	.ascii	"g_MaxLbn\000"
-.LASF1461:
-	.ascii	"nextMode\000"
-.LASF1284:
-	.ascii	"pPrev\000"
-.LASF1484:
-	.ascii	"page_addr\000"
-.LASF266:
-	.ascii	"INTCLR\000"
-.LASF31:
-	.ascii	"pagePerBlk\000"
-.LASF598:
-	.ascii	"totleEc\000"
-.LASF1098:
-	.ascii	"ftl_malloc\000"
-.LASF469:
-	.ascii	"UCLASS_IDE\000"
-.LASF78:
-	.ascii	"regAddr\000"
-.LASF1057:
-	.ascii	"power_cut_min\000"
-.LASF1343:
-	.ascii	"FtlGetCap\000"
-.LASF1565:
-	.ascii	"FlashSetRandomizer\000"
-.LASF1359:
-	.ascii	"first_lpa_nscts\000"
-.LASF490:
-	.ascii	"UCLASS_PMIC\000"
-.LASF314:
-	.ascii	"dev_t\000"
-.LASF1178:
-	.ascii	"req_temp\000"
-.LASF596:
-	.ascii	"L2PMap\000"
-.LASF1278:
-	.ascii	"prev_node_id\000"
-.LASF733:
-	.ascii	"gp_gc_page_buf_info\000"
-.LASF709:
-	.ascii	"g_inkDie_check_enable\000"
-.LASF792:
-	.ascii	"g_totle_discard_page_count\000"
-.LASF974:
-	.ascii	"changing_leb\000"
-.LASF993:
-	.ascii	"max_ec\000"
-.LASF220:
-	.ascii	"errBitsLow0_5\000"
-.LASF828:
-	.ascii	"gFtlInitStatus\000"
-.LASF12:
-	.ascii	"long long int\000"
-.LASF738:
-	.ascii	"p_erase_count_table\000"
-.LASF1426:
-	.ascii	"nandc_clk\000"
-.LASF1508:
-	.ascii	"Toshiba_sdr_readtry\000"
-.LASF224:
-	.ascii	"tagBCH_ST\000"
-.LASF710:
-	.ascii	"g_flash_read_only_en\000"
-.LASF315:
-	.ascii	"loff_t\000"
-.LASF1337:
-	.ascii	"FtlBbmMapBadBlock\000"
-.LASF1052:
-	.ascii	"disable_bgt\000"
-.LASF937:
-	.ascii	"alignment\000"
-.LASF703:
-	.ascii	"g_GlobalDataVersion\000"
-.LASF1235:
-	.ascii	"block_in_plane\000"
-.LASF227:
-	.ascii	"ahb_wr\000"
-.LASF1536:
-	.ascii	"last_mini_ecc_ddrPara\000"
-.LASF433:
-	.ascii	"initrd_start\000"
-.LASF704:
-	.ascii	"g_MaxLbaSector\000"
-.LASF658:
-	.ascii	"current_plane\000"
-.LASF1008:
-	.ascii	"free\000"
-.LASF659:
-	.ascii	"num_planes\000"
-.LASF1040:
-	.ascii	"vid_hdr_aloffset\000"
-.LASF278:
-	.ascii	"spareBuf\000"
-.LASF901:
-	.ascii	"_get_fact_prot_info\000"
-.LASF504:
-	.ascii	"UCLASS_SPI_FLASH\000"
-.LASF952:
-	.ascii	"used\000"
-.LASF230:
-	.ascii	"burst\000"
-.LASF1311:
-	.ascii	"FtlGetLastWrittenPage\000"
-.LASF1118:
-	.ascii	"pDataHeader\000"
-.LASF829:
-	.ascii	"power_up_flag\000"
-.LASF973:
-	.ascii	"updating\000"
-.LASF1056:
-	.ascii	"power_cut_counter\000"
-.LASF642:
-	.ascii	"inkDie_write_and_check_en\000"
-.LASF689:
-	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF870:
-	.ascii	"erase_info\000"
-.LASF918:
-	.ascii	"usecount\000"
-.LASF1065:
-	.ascii	"dfs_emulate_bitflips\000"
-.LASF120:
-	.ascii	"gFlashToggleModeEn\000"
-.LASF702:
-	.ascii	"g_GlobalSysVersion\000"
-.LASF1264:
-	.ascii	"update_map_block\000"
-.LASF584:
-	.ascii	"maxRegion\000"
-.LASF1198:
-	.ascii	"next_free_active_plane\000"
-.LASF36:
-	.ascii	"reservedBlk\000"
-.LASF771:
-	.ascii	"p_gc_page_info\000"
-.LASF1391:
-	.ascii	"NandcXferData\000"
-.LASF107:
-	.ascii	"BlockSize\000"
-.LASF851:
-	.ascii	"udevice\000"
-.LASF562:
-	.ascii	"net_our_vlan\000"
-.LASF638:
-	.ascii	"totle_power_on_run_times\000"
-.LASF1007:
-	.ascii	"erroneous\000"
-.LASF783:
-	.ascii	"g_free_slc_blk_num\000"
-.LASF113:
-	.ascii	"pFLASH_INFO\000"
-.LASF87:
-	.ascii	"die_op_info\000"
-.LASF398:
-	.ascii	"ih_os\000"
-.LASF1010:
-	.ascii	"pq_head\000"
-.LASF810:
-	.ascii	"g_cur_erase_blk\000"
-.LASF245:
-	.ascii	"CHIP_IF\000"
-.LASF1005:
-	.ascii	"fm_size\000"
-.LASF491:
-	.ascii	"UCLASS_PWM\000"
-.LASF1466:
-	.ascii	"req_status_1\000"
-.LASF1155:
-	.ascii	"FtlGcBufFree\000"
-.LASF1286:
-	.ascii	"List_pop_index_node\000"
-.LASF1344:
-	.ascii	"ftl_discard\000"
-.LASF1038:
-	.ascii	"vid_hdr_alsize\000"
-.LASF61:
-	.ascii	"PlanePerDie\000"
-.LASF158:
-	.ascii	"NC_IRQ_LLP\000"
-.LASF27:
-	.ascii	"nandType\000"
-.LASF1208:
-	.ascii	"scan_completed\000"
-.LASF1158:
-	.ascii	"update_vpc_list\000"
-.LASF477:
-	.ascii	"UCLASS_MMC\000"
-.LASF744:
-	.ascii	"p_map_block_table\000"
-.LASF832:
-	.ascii	"FtlUpdateVaildLpnCount\000"
-.LASF609:
-	.ascii	"res32_0\000"
-.LASF610:
-	.ascii	"res32_1\000"
-.LASF1242:
-	.ascii	"FtlUpdateVaildLpn\000"
-.LASF666:
-	.ascii	"scr_ppa\000"
-.LASF281:
-	.ascii	"pageBufPhyAddr\000"
-.LASF895:
-	.ascii	"_get_unmapped_area\000"
-.LASF531:
-	.ascii	"save_size\000"
-.LASF1441:
-	.ascii	"NandcReadDontCaseBusyEn\000"
-.LASF383:
-	.ascii	"version\000"
-.LASF1283:
-	.ascii	"pNode\000"
-.LASF1159:
+	.section	.rodata.__func__.11432,"a",%progbits
+	.set	.LANCHOR203,. + 0
+	.type	__func__.11432, %object
+	.size	__func__.11432, 25
+__func__.11432:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.11446,"a",%progbits
+	.set	.LANCHOR219,. + 0
+	.type	__func__.11446, %object
+	.size	__func__.11446, 29
+__func__.11446:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.rodata.__func__.11452,"a",%progbits
+	.set	.LANCHOR208,. + 0
+	.type	__func__.11452, %object
+	.size	__func__.11452, 19
+__func__.11452:
 	.ascii	"get_new_active_ppa\000"
-.LASF169:
-	.ascii	"flash_abort_clear\000"
-.LASF1574:
-	.ascii	"kmalloc\000"
-.LASF441:
-	.ascii	"_NANDC_IRQ_NUM\000"
-.LASF103:
-	.ascii	"toggle_enable\000"
-.LASF191:
-	.ascii	"low_power\000"
-.LASF1377:
-	.ascii	"multi_plane_en\000"
-.LASF1117:
-	.ascii	"max_gc_page_num\000"
-.LASF748:
-	.ascii	"p_map_region_ppn_check_table\000"
-.LASF824:
-	.ascii	"ToshibaA19RefValue\000"
-.LASF1:
-	.ascii	"unsigned int\000"
-.LASF987:
-	.ascii	"bad_peb_limit\000"
-.LASF1194:
-	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF798:
-	.ascii	"g_totle_avg_erase_count\000"
-.LASF1355:
-	.ascii	"flashType\000"
-.LASF1305:
-	.ascii	"FtlFreeSysBLkSort\000"
-.LASF871:
-	.ascii	"fail_addr\000"
-.LASF269:
-	.ascii	"LLP_LLI\000"
-.LASF1373:
-	.ascii	"max_test_page_num\000"
-.LASF240:
-	.ascii	"tagMTRANS_STAT\000"
-.LASF388:
-	.ascii	"working_fdt\000"
-.LASF1381:
-	.ascii	"FtlVariablesInit\000"
-.LASF668:
-	.ascii	"ftl_gc_page_buffer\000"
-.LASF545:
-	.ascii	"push_packet\000"
-.LASF1227:
-	.ascii	"pMapBlkHeader\000"
-.LASF387:
-	.ascii	"size_dt_struct\000"
-.LASF1549:
-	.ascii	"FlashProgDpSecondCmd\000"
-.LASF753:
-	.ascii	"p_vendor_region_ppn_table\000"
-.LASF1535:
-	.ascii	"last_error_ecc0_count\000"
-.LASF226:
-	.ascii	"ahb_wr_st\000"
-.LASF1191:
-	.ascii	"make_superblock\000"
-.LASF402:
-	.ascii	"ih_name\000"
-.LASF493:
-	.ascii	"UCLASS_PWRSEQ\000"
-.LASF89:
-	.ascii	"cur_op\000"
-.LASF972:
-	.ascii	"corrupted\000"
-.LASF8:
-	.ascii	"short int\000"
-.LASF1079:
-	.ascii	"blocking_notifier_head\000"
-.LASF1184:
-	.ascii	"p_super_blk\000"
-.LASF379:
-	.ascii	"totalsize\000"
-.LASF1181:
-	.ascii	"time_out\000"
-.LASF1272:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-.LASF106:
-	.ascii	"FlashSize\000"
-.LASF968:
-	.ascii	"upd_received\000"
-.LASF661:
-	.ascii	"check_en\000"
-.LASF721:
-	.ascii	"req_gc_dst\000"
-.LASF334:
-	.ascii	"prev\000"
-.LASF193:
-	.ascii	"reserved30_31\000"
-.LASF699:
-	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF1077:
-	.ascii	"ubi_class\000"
-.LASF821:
-	.ascii	"random_seed\000"
-.LASF782:
-	.ascii	"g_gc_refresh_block_temp_num\000"
-.LASF664:
-	.ascii	"phyBlk\000"
-.LASF566:
-	.ascii	"net_boot_file_size\000"
-.LASF688:
-	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF432:
-	.ascii	"ft_len\000"
-.LASF1243:
-	.ascii	"FtlEctTblFlush\000"
-.LASF1434:
-	.ascii	"dll_mode\000"
-.LASF277:
-	.ascii	"pageBuf\000"
-.LASF100:
-	.ascii	"NandParaInfo\000"
-.LASF495:
-	.ascii	"UCLASS_REGULATOR\000"
-.LASF588:
-	.ascii	"pBlkVerTbl\000"
-.LASF769:
-	.ascii	"g_sys_save_data\000"
-.LASF1075:
-	.ascii	"ubi_cdev_operations\000"
-.LASF77:
-	.ascii	"maxRetryCount\000"
-.LASF1281:
-	.ascii	"prev_valid_page_count\000"
-.LASF878:
-	.ascii	"flags\000"
-.LASF429:
-	.ascii	"rd_start\000"
-.LASF982:
-	.ascii	"image_seq\000"
-.LASF1580:
-	.ascii	"drivers/rknand/rkftl/rk_ftl_arm_v7.c\000"
-.LASF288:
-	.ascii	"CHIP_MAP_INFO\000"
-.LASF912:
-	.ascii	"_block_isbad\000"
+	.section	.rodata.__func__.11463,"a",%progbits
+	.set	.LANCHOR206,. + 0
+	.type	__func__.11463, %object
+	.size	__func__.11463, 16
+__func__.11463:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.11468,"a",%progbits
+	.set	.LANCHOR207,. + 0
+	.type	__func__.11468, %object
+	.size	__func__.11468, 20
+__func__.11468:
+	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.11536,"a",%progbits
+	.set	.LANCHOR239,. + 0
+	.type	__func__.11536, %object
+	.size	__func__.11536, 19
+__func__.11536:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.11630,"a",%progbits
+	.set	.LANCHOR243,. + 0
+	.type	__func__.11630, %object
+	.size	__func__.11630, 23
+__func__.11630:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
+.LC36:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+.LC37:
+	.ascii	"decrement_vpc_count %x = %d in free list\012\000"
+	.section	.rodata.dump_map_info.str1.1,"aMS",%progbits,1
+.LC80:
+	.ascii	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+.LC81:
+	.ascii	"Mblk:\000"
+.LC82:
+	.ascii	"L2P:\000"
+.LC83:
+	.ascii	"L2PC:\000"
+	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
+.LC71:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC72:
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC8:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
+	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
+.LC40:
+	.ascii	"page map lost: %x %x\012\000"
+	.section	.rodata.idb_write_data.str1.1,"aMS",%progbits,1
+.LC15:
+	.ascii	"1 write_idblock fix data %x %x %x\012\000"
+.LC16:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
+.LC17:
+	.ascii	"write_idblock fail! %x\012\000"
+	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
+.LC56:
+	.ascii	"region_id = %x phyAddr = %x\012\000"
+.LC57:
+	.ascii	"map_ppn:\000"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
+.LC66:
+	.ascii	"g_gc_superblock_free %x %x %x %x %x\012\000"
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
+.LC70:
+	.ascii	"FtlInit %x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC18:
+	.ascii	"%s 0x%x:\000"
+.LC19:
+	.ascii	"%x \000"
+.LC20:
+	.ascii	"\000"
 	.hidden	free
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index 51dcc9aa25..6afa53b285 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,14 +5,14 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-08
+ * date: 2018-08-10
  */
 	.arch armv8-a
-	.file	"rk_ftl_arm_v8.S"
-	.section	.text.ftl_set_blk_mode.part.9,"ax",@progbits
+	.file	"rk_ftl_arm_v8.c"
+	.section	.text.ftl_set_blk_mode.part.10,"ax",@progbits
 	.align	2
-	.type	ftl_set_blk_mode.part.9, %function
-ftl_set_blk_mode.part.9:
+	.type	ftl_set_blk_mode.part.10, %function
+ftl_set_blk_mode.part.10:
 	and	w0, w0, 65535
 	adrp	x2, .LANCHOR0
 	ubfx	x1, x0, 5, 11
@@ -25,7 +25,7 @@ ftl_set_blk_mode.part.9:
 	orr	w0, w0, w2
 	str	w0, [x3, x1]
 	ret
-	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
+	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",@progbits
 	.align	2
 	.global	FlashMemCmp8
@@ -1243,6 +1243,39 @@ SandiskSetRRPara:
 	ldrsb	w5, [x2, x0]
 	b	.L186
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.micron_auto_read_calibration_config,"ax",@progbits
+	.align	2
+	.global	micron_auto_read_calibration_config
+	.type	micron_auto_read_calibration_config, %function
+micron_auto_read_calibration_config:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	mov	w20, w1
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	sbfiz	x0, x19, 4, 32
+	adrp	x2, .LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR6
+	add	x1, x2, x0
+	ldr	x0, [x2, x0]
+	ldrb	w19, [x1, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 239
+	str	w0, [x19, 2056]
+	mov	w0, 150
+	str	w0, [x19, 2052]
+	mov	x0, 200
+	bl	udelay
+	str	w20, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	micron_auto_read_calibration_config, .-micron_auto_read_calibration_config
 	.section	.text.FlashEraseSLc2KBlocks,"ax",@progbits
 	.align	2
 	.global	FlashEraseSLc2KBlocks
@@ -1260,16 +1293,16 @@ FlashEraseSLc2KBlocks:
 	mov	x20, x0
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x24, .LANCHOR26
-.L188:
+.L190:
 	cmp	x20, x22
-	bne	.L193
+	bne	.L195
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L193:
+.L195:
 	mov	w1, 0
 	mov	w4, w21
 	add	x3, x29, 76
@@ -1279,15 +1312,15 @@ FlashEraseSLc2KBlocks:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 76]
 	cmp	w1, w0
-	bhi	.L189
+	bhi	.L191
 	mov	w0, -1
 	str	w0, [x20]
-.L190:
+.L192:
 	sub	w21, w21, #1
 	add	x20, x20, 56
 	and	w21, w21, 255
-	b	.L188
-.L189:
+	b	.L190
+.L191:
 	uxtw	x0, w0
 	add	x1, x24, :lo12:.LANCHOR26
 	ldrb	w19, [x1, x0]
@@ -1323,21 +1356,21 @@ FlashEraseSLc2KBlocks:
 	ldr	w1, [x29, 72]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L191
+	tbz	x0, 0, .L193
 	mov	w0, -1
 	str	w0, [x20]
-.L191:
+.L193:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L192
+	bne	.L194
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC1
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L192:
+.L194:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L190
+	b	.L192
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
@@ -1354,42 +1387,42 @@ FlashEraseBlocks:
 	mov	w22, w2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	stp	x25, x26, [sp, 64]
-	cbnz	w1, .L199
+	cbnz	w1, .L201
 	adrp	x25, .LANCHOR23
 	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
 	mov	w20, 0
-.L200:
+.L202:
 	cmp	w20, w22
 	adrp	x13, .LANCHOR25
-	bcc	.L209
+	bcc	.L211
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x13, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L210:
+.L212:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L212
+	bhi	.L214
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L213
-.L214:
+	cbnz	w0, .L215
+.L216:
 	mov	w0, 0
-	b	.L198
-.L199:
+	b	.L200
+.L201:
 	mov	w1, w2
 	bl	FlashEraseSLc2KBlocks
-.L198:
+.L200:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L209:
+.L211:
 	mov	w12, 56
 	mov	w1, 0
 	sub	w4, w22, w20
@@ -1403,13 +1436,13 @@ FlashEraseBlocks:
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
-	bhi	.L202
+	bhi	.L204
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L203:
+.L205:
 	add	w20, w20, 1
-	b	.L200
-.L202:
+	b	.L202
+.L204:
 	adrp	x1, .LANCHOR27
 	add	x2, x25, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -1419,20 +1452,20 @@ FlashEraseBlocks:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L205
+	cbz	x1, .L207
 	bl	FlashWaitCmdDone
-.L205:
+.L207:
 	ldp	w2, w1, [x29, 88]
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
 	stp	x21, xzr, [x0, 8]
-	cbz	w23, .L206
+	cbz	w23, .L208
 	add	w2, w20, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L206:
+.L208:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, x1]
@@ -1442,13 +1475,13 @@ FlashEraseBlocks:
 	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
-	bne	.L207
+	bne	.L209
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L207
+	cbz	w0, .L209
 	mov	w0, w21
 	bl	flash_enter_slc_mode
-.L208:
+.L210:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
@@ -1465,37 +1498,37 @@ FlashEraseBlocks:
 	bl	FlashEraseCmd
 	mov	w0, w21
 	bl	NandcFlashDeCs
-	b	.L203
-.L207:
+	b	.L205
+.L209:
 	mov	w0, w21
 	bl	flash_exit_slc_mode
-	b	.L208
-.L212:
+	b	.L210
+.L214:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
-	bne	.L211
+	bne	.L213
 	ldrb	w0, [x21]
-	cbz	w0, .L211
+	cbz	w0, .L213
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L211:
-	add	x20, x20, 1
-	b	.L210
 .L213:
+	add	x20, x20, 1
+	b	.L212
+.L215:
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 69
-	bne	.L214
+	bne	.L216
 	mov	w0, 56
 	umaddl	x22, w22, w0, x19
-.L215:
+.L217:
 	cmp	x22, x19
-	beq	.L214
+	beq	.L216
 	str	wzr, [x19], 56
-	b	.L215
+	b	.L217
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1529,7 +1562,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L231
+	bne	.L233
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1541,7 +1574,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L234:
+.L236:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1554,12 +1587,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L231:
+.L233:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L234
+	b	.L236
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1571,19 +1604,28 @@ FlashDeInit:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	NandcWaitFlashReady
-	adrp	x19, .LANCHOR29
 	bl	FlashSetReadRetryDefault
-	ldrb	w0, [x19, #:lo12:.LANCHOR29]
-	cbz	w0, .L236
+	adrp	x0, .LANCHOR29
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L238
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L238:
+	adrp	x19, .LANCHOR30
+	ldrb	w0, [x19, #:lo12:.LANCHOR30]
+	cbz	w0, .L239
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L236
+	tbz	x0, 0, .L239
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x19, #:lo12:.LANCHOR29]
-.L236:
+	strb	wzr, [x19, #:lo12:.LANCHOR30]
+.L239:
 	adrp	x0, .LANCHOR6
 	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	str	wzr, [x0, 336]
@@ -1611,29 +1653,29 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L246
+	bhi	.L249
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L249:
+.L252:
 	str	w1, [x0, 4]
 	ret
-.L246:
+.L249:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L248
+	bls	.L251
 	mov	w1, 8322
-	b	.L249
-.L248:
+	b	.L252
+.L251:
 	mov	w1, 4225
-	b	.L249
+	b	.L252
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
 	.global	FlashTimingCfg
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
-	adrp	x0, .LANCHOR30+21
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+21]
+	adrp	x0, .LANCHOR31+21
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+21]
 	b	NandcTimeCfg
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",@progbits
@@ -1647,36 +1689,36 @@ NandcBchSel:
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 1
 	str	w1, [x2, 8]
-	adrp	x1, .LANCHOR31
-	str	w0, [x1, #:lo12:.LANCHOR31]
+	adrp	x1, .LANCHOR32
+	str	w0, [x1, #:lo12:.LANCHOR32]
 	mov	w1, 4096
-	bne	.L252
-.L255:
+	bne	.L255
+.L258:
 	and	w1, w1, -17
-.L253:
+.L256:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L252:
+.L255:
 	cmp	w0, 24
-	bne	.L254
+	bne	.L257
 	orr	w1, w1, 16
-	b	.L253
-.L254:
+	b	.L256
+.L257:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L253
-	b	.L255
+	bne	.L256
+	b	.L258
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
 	.global	FlashBchSel
 	.type	FlashBchSel, %function
 FlashBchSel:
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR33
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR32]
+	strb	w0, [x1, #:lo12:.LANCHOR33]
 	b	NandcBchSel
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",@progbits
@@ -1749,11 +1791,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L269:
+.L272:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L269
+	tbz	x1, 20, .L272
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1785,13 +1827,13 @@ NandcXferStart:
 	bfi	w22, w0, 5, 3
 	mov	w0, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR33
+	adrp	x0, .LANCHOR34
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldr	w0, [x0, #:lo12:.LANCHOR33]
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L274
+	bls	.L277
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1799,17 +1841,17 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L275
+	beq	.L278
 	and	w2, w2, 255
-	adrp	x20, .LANCHOR34
-	cbnz	w24, .L276
-.L284:
-	ldr	x0, [x20, #:lo12:.LANCHOR34]
+	adrp	x20, .LANCHOR35
+	cbnz	w24, .L279
+.L287:
+	ldr	x0, [x20, #:lo12:.LANCHOR35]
 	add	w2, w2, 1
 	cmp	x4, 0
 	asr	w2, w2, 1
 	csel	x0, x4, x0, ne
-	add	x20, x20, :lo12:.LANCHOR34
+	add	x20, x20, :lo12:.LANCHOR35
 	bfi	w19, w2, 22, 6
 	and	x2, x0, 4294967295
 	add	x2, x2, 63
@@ -1845,12 +1887,12 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L285
+	bne	.L288
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L285:
+.L288:
 	ldr	w0, [x29, 88]
 	cmp	w24, 0
 	cset	w1, eq
@@ -1862,10 +1904,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L275:
+.L278:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L274:
+.L277:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -1876,38 +1918,38 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L276:
-	adrp	x0, .LANCHOR31
+.L279:
+	adrp	x0, .LANCHOR32
 	mov	w6, 64
 	lsr	w11, w2, 1
 	mov	x1, x5
-	ldr	w0, [x0, #:lo12:.LANCHOR31]
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
 	mov	w7, 0
 	mov	w3, 0
 	mov	w12, -1
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w6, w6, w0, cc
-	add	x0, x20, :lo12:.LANCHOR34
+	add	x0, x20, :lo12:.LANCHOR35
 	ldr	x10, [x0, 8]
-.L280:
+.L283:
 	cmp	w3, w11
-	bcs	.L284
+	bcs	.L287
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L281
+	cbz	x5, .L284
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L282:
+.L285:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L280
-.L281:
+	b	.L283
+.L284:
 	str	w12, [x10, x0]
-	b	.L282
+	b	.L285
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -1920,60 +1962,60 @@ NandcXferComp:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	x3, [x1, x0]
-	adrp	x0, .LANCHOR33
-	ldr	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR34
+	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, 3
-	bls	.L313
+	bls	.L316
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L313
+	tbz	x0, 2, .L316
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L301
+	tbz	x0, 1, .L304
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
-.L296:
+.L299:
 	ldr	w1, [x3, 28]
 	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L297
+	bge	.L300
 	cmp	w2, 5
-	bls	.L296
+	bls	.L299
 	ldr	w0, [x3]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbz	x0, 13, .L296
+	tbz	x0, 13, .L299
 	ldr	w0, [x29, 24]
-	tbz	x0, 17, .L296
-.L297:
-	adrp	x0, .LANCHOR34+40
-	str	wzr, [x0, #:lo12:.LANCHOR34+40]
-.L292:
+	tbz	x0, 17, .L299
+.L300:
+	adrp	x0, .LANCHOR35+40
+	str	wzr, [x0, #:lo12:.LANCHOR35+40]
+.L295:
 	ldp	x29, x30, [sp], 32
 	ret
-.L301:
+.L304:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L301
-	adrp	x0, .LANCHOR35
+	tbz	x0, 20, .L304
+	adrp	x0, .LANCHOR36
 	mov	x4, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR35]
-	cbz	w1, .L302
+	ldr	w1, [x0, #:lo12:.LANCHOR36]
+	cbz	w1, .L305
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L302:
-	ldr	w0, [x4, #:lo12:.LANCHOR35]
-	cbz	w0, .L297
+.L305:
+	ldr	w0, [x4, #:lo12:.LANCHOR36]
+	cbz	w0, .L300
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
-	b	.L297
-.L313:
+	b	.L300
+.L316:
 	ldr	w0, [x3, 8]
 	str	w0, [x29, 16]
 	ldr	w0, [x29, 16]
-	tbz	x0, 20, .L313
-	b	.L292
+	tbz	x0, 20, .L316
+	b	.L295
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -1982,16 +2024,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L322:
+.L325:
 	cmp	w2, w0
-	bls	.L323
+	bls	.L326
 	sub	w0, w1, #1
 	ret
-.L323:
+.L326:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L322
+	b	.L325
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2008,25 +2050,25 @@ FtlSysBlkNumInit:
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	adrp	x2, .LANCHOR38
+	adrp	x2, .LANCHOR39
 	csel	w0, w0, w1, cs
-	adrp	x1, .LANCHOR36
-	and	w0, w0, 65535
-	str	w0, [x1, #:lo12:.LANCHOR36]
 	adrp	x1, .LANCHOR37
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
+	and	w0, w0, 65535
+	str	w0, [x1, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	mul	w1, w1, w0
-	str	w1, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR40
-	ldrh	w2, [x2, #:lo12:.LANCHOR40]
+	str	w1, [x2, #:lo12:.LANCHOR39]
+	adrp	x2, .LANCHOR41
+	ldrh	w2, [x2, #:lo12:.LANCHOR41]
 	sub	w0, w2, w0
-	adrp	x2, .LANCHOR39
-	strh	w0, [x2, #:lo12:.LANCHOR39]
-	adrp	x0, .LANCHOR42
-	ldr	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x2, .LANCHOR40
+	strh	w0, [x2, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR43
+	ldr	w0, [x0, #:lo12:.LANCHOR43]
 	sub	w1, w0, w1
-	adrp	x0, .LANCHOR41
-	str	w1, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR42
+	str	w1, [x0, #:lo12:.LANCHOR42]
 	mov	w0, 0
 	ret
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
@@ -2037,45 +2079,45 @@ FtlSysBlkNumInit:
 FtlConstantsInit:
 	stp	x29, x30, [sp, -32]!
 	mov	x5, x0
-	adrp	x1, .LANCHOR45
-	adrp	x4, .LANCHOR44
+	adrp	x1, .LANCHOR46
+	adrp	x4, .LANCHOR45
 	add	x29, sp, 0
 	ldrh	w11, [x0, 8]
-	adrp	x0, .LANCHOR43
-	adrp	x6, .LANCHOR40
+	adrp	x0, .LANCHOR44
+	adrp	x6, .LANCHOR41
 	ldrh	w2, [x5, 10]
-	strh	w11, [x0, #:lo12:.LANCHOR43]
+	strh	w11, [x0, #:lo12:.LANCHOR44]
 	mov	x3, 0
 	ldrh	w0, [x5, 12]
 	ldrh	w8, [x5, 14]
-	strh	w0, [x1, #:lo12:.LANCHOR45]
-	adrp	x1, .LANCHOR46
-	add	x7, x1, :lo12:.LANCHOR46
-	strh	w2, [x4, #:lo12:.LANCHOR44]
-	strh	w8, [x6, #:lo12:.LANCHOR40]
+	strh	w0, [x1, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR47
+	add	x7, x1, :lo12:.LANCHOR47
+	strh	w2, [x4, #:lo12:.LANCHOR45]
+	strh	w8, [x6, #:lo12:.LANCHOR41]
 	str	x19, [sp, 16]
-.L327:
+.L330:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L327
+	bne	.L330
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L328
+	bcs	.L331
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR47
 	mov	w7, 0
-.L329:
+.L332:
 	cmp	w7, w0
-	bcs	.L331
+	bcs	.L334
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L332
-.L330:
+	b	.L335
+.L333:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2084,223 +2126,223 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L332:
+.L335:
 	cmp	w12, w2
-	bcc	.L330
+	bcc	.L333
 	add	w7, w7, 1
-	b	.L329
-.L331:
+	b	.L332
+.L334:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
-	strh	w2, [x4, #:lo12:.LANCHOR44]
-	strh	w8, [x6, #:lo12:.LANCHOR40]
-.L328:
-	adrp	x1, .LANCHOR47
-	adrp	x13, .LANCHOR48
+	strh	w2, [x4, #:lo12:.LANCHOR45]
+	strh	w8, [x6, #:lo12:.LANCHOR41]
+.L331:
+	adrp	x1, .LANCHOR48
+	adrp	x13, .LANCHOR49
 	mov	w2, 5
 	cmp	w11, 1
-	strh	w2, [x1, #:lo12:.LANCHOR47]
-	strh	wzr, [x13, #:lo12:.LANCHOR48]
-	bne	.L333
-	strh	w11, [x1, #:lo12:.LANCHOR47]
-.L333:
-	adrp	x8, .LANCHOR49
+	strh	w2, [x1, #:lo12:.LANCHOR48]
+	strh	wzr, [x13, #:lo12:.LANCHOR49]
+	bne	.L336
+	strh	w11, [x1, #:lo12:.LANCHOR48]
+.L336:
+	adrp	x8, .LANCHOR50
 	mov	w1, 4352
-	strh	w1, [x8, #:lo12:.LANCHOR49]
+	strh	w1, [x8, #:lo12:.LANCHOR50]
 	adrp	x1, .LANCHOR1
 	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L334
+	cbz	w11, .L337
 	mov	w1, 384
-	strh	w1, [x8, #:lo12:.LANCHOR49]
-.L334:
-	ldrh	w4, [x4, #:lo12:.LANCHOR44]
-	adrp	x1, .LANCHOR37
-	ldrh	w3, [x6, #:lo12:.LANCHOR40]
+	strh	w1, [x8, #:lo12:.LANCHOR50]
+.L337:
+	ldrh	w4, [x4, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR38
+	ldrh	w3, [x6, #:lo12:.LANCHOR41]
 	mul	w4, w0, w4
 	mul	w0, w0, w3
 	and	w4, w4, 65535
-	strh	w4, [x1, #:lo12:.LANCHOR37]
-	adrp	x1, .LANCHOR50
+	strh	w4, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR50]
+	strh	w0, [x1, #:lo12:.LANCHOR51]
 	bl	Ftl_log2
 	ldrh	w19, [x5, 16]
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	ldrh	w10, [x5, 20]
-	adrp	x7, .LANCHOR52
-	strh	w0, [x1, #:lo12:.LANCHOR51]
-	adrp	x0, .LANCHOR53
+	adrp	x7, .LANCHOR53
+	strh	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR54
 	ldrh	w14, [x5, 18]
-	adrp	x15, .LANCHOR55
+	adrp	x15, .LANCHOR56
 	mul	w1, w4, w19
-	strh	w14, [x0, #:lo12:.LANCHOR53]
-	adrp	x0, .LANCHOR54
-	strh	w19, [x7, #:lo12:.LANCHOR52]
-	strh	w10, [x15, #:lo12:.LANCHOR55]
-	strh	w1, [x0, #:lo12:.LANCHOR54]
+	strh	w14, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR55
+	strh	w19, [x7, #:lo12:.LANCHOR53]
+	strh	w10, [x15, #:lo12:.LANCHOR56]
+	strh	w1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, w10
 	bl	Ftl_log2
 	and	w12, w0, 65535
-	adrp	x6, .LANCHOR56
+	adrp	x6, .LANCHOR57
 	ubfiz	w2, w10, 9, 7
 	ldrh	w1, [x5, 26]
 	cmp	w3, 1024
-	strh	w0, [x6, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR57
-	strh	w2, [x0, #:lo12:.LANCHOR57]
+	strh	w0, [x6, #:lo12:.LANCHOR57]
 	adrp	x0, .LANCHOR58
-	ubfx	w2, w2, 8, 8
 	strh	w2, [x0, #:lo12:.LANCHOR58]
 	adrp	x0, .LANCHOR59
-	strh	w1, [x0, #:lo12:.LANCHOR59]
-	adrp	x0, .LANCHOR42
+	ubfx	w2, w2, 8, 8
+	strh	w2, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR60
+	strh	w1, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR43
 	mul	w1, w4, w3
-	str	w1, [x0, #:lo12:.LANCHOR42]
-	bls	.L335
+	str	w1, [x0, #:lo12:.LANCHOR43]
+	bls	.L338
 	and	w0, w3, 255
-	strh	w0, [x13, #:lo12:.LANCHOR48]
-.L335:
-	ldrh	w0, [x13, #:lo12:.LANCHOR48]
-	adrp	x1, .LANCHOR60
+	strh	w0, [x13, #:lo12:.LANCHOR49]
+.L338:
+	ldrh	w0, [x13, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR61
 	sub	w0, w3, w0
 	mul	w0, w0, w4
 	mul	w0, w0, w10
 	mul	w0, w0, w19
 	asr	w0, w0, 11
-	str	w0, [x1, #:lo12:.LANCHOR60]
-	ldrh	w0, [x8, #:lo12:.LANCHOR49]
+	str	w0, [x1, #:lo12:.LANCHOR61]
+	ldrh	w0, [x8, #:lo12:.LANCHOR50]
 	mul	w1, w14, w10
-	adrp	x10, .LANCHOR61
+	adrp	x10, .LANCHOR62
 	lsl	w0, w0, 3
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L336
-.L352:
-	strh	w0, [x10, #:lo12:.LANCHOR61]
-	cbz	w11, .L338
+	bls	.L339
+.L355:
+	strh	w0, [x10, #:lo12:.LANCHOR62]
+	cbz	w11, .L341
 	mov	w0, 640
-	strh	w0, [x8, #:lo12:.LANCHOR49]
-.L338:
-	ldrh	w0, [x8, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR62
+	strh	w0, [x8, #:lo12:.LANCHOR50]
+.L341:
+	ldrh	w0, [x8, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR63
 	lsl	w3, w3, 6
 	cmp	w4, 1
-	adrp	x8, .LANCHOR36
+	adrp	x8, .LANCHOR37
 	asr	w0, w0, w12
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR62]
+	strh	w0, [x1, #:lo12:.LANCHOR63]
 	add	w0, w12, 9
-	adrp	x1, .LANCHOR64
+	adrp	x1, .LANCHOR65
 	asr	w3, w3, w0
-	adrp	x0, .LANCHOR63
-	strh	w3, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR64
+	strh	w3, [x0, #:lo12:.LANCHOR64]
 	and	w3, w3, 65535
 	mul	w0, w4, w3
 	add	w3, w3, 8
-	str	w0, [x1, #:lo12:.LANCHOR64]
-	ldrh	w0, [x10, #:lo12:.LANCHOR61]
+	str	w0, [x1, #:lo12:.LANCHOR65]
+	ldrh	w0, [x10, #:lo12:.LANCHOR62]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L339
-.L353:
-	str	w3, [x8, #:lo12:.LANCHOR36]
-	ldrh	w0, [x8, #:lo12:.LANCHOR36]
+	beq	.L342
+.L356:
+	str	w3, [x8, #:lo12:.LANCHOR37]
+	ldrh	w0, [x8, #:lo12:.LANCHOR37]
 	bl	FtlSysBlkNumInit
-	ldr	w1, [x8, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR65
+	ldr	w1, [x8, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR66
 	mov	w2, 24
-	str	w1, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR41
-	ldrh	w1, [x7, #:lo12:.LANCHOR52]
-	ldr	w0, [x0, #:lo12:.LANCHOR41]
+	str	w1, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x7, #:lo12:.LANCHOR53]
+	ldr	w0, [x0, #:lo12:.LANCHOR42]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x6, #:lo12:.LANCHOR56]
+	ldrh	w1, [x6, #:lo12:.LANCHOR57]
 	adrp	x6, .LANCHOR8
 	add	w1, w1, 9
 	ldrb	w6, [x6, #:lo12:.LANCHOR8]
 	lsr	w0, w0, w1
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR67
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR66]
-	adrp	x1, .LANCHOR67
-	strh	w2, [x1, #:lo12:.LANCHOR67]
+	strh	w0, [x1, #:lo12:.LANCHOR67]
 	adrp	x1, .LANCHOR68
-	ldrh	w2, [x10, #:lo12:.LANCHOR61]
-	str	wzr, [x1, #:lo12:.LANCHOR68]
+	strh	w2, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR69
+	ldrh	w2, [x10, #:lo12:.LANCHOR62]
+	str	wzr, [x1, #:lo12:.LANCHOR69]
 	add	w1, w2, 3
-	strh	w1, [x10, #:lo12:.LANCHOR61]
-	ldr	w1, [x4, #:lo12:.LANCHOR64]
+	strh	w1, [x10, #:lo12:.LANCHOR62]
+	ldr	w1, [x4, #:lo12:.LANCHOR65]
 	add	w3, w1, 3
-	str	w3, [x4, #:lo12:.LANCHOR64]
-	cbz	w6, .L341
+	str	w3, [x4, #:lo12:.LANCHOR65]
+	cbz	w6, .L344
 	add	w1, w1, 5
 	add	w2, w2, 4
-	strh	w2, [x10, #:lo12:.LANCHOR61]
-.L354:
-	str	w1, [x4, #:lo12:.LANCHOR64]
-.L342:
-	adrp	x1, .LANCHOR39
-	adrp	x3, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
-	strh	wzr, [x3, #:lo12:.LANCHOR69]
+	strh	w2, [x10, #:lo12:.LANCHOR62]
+.L357:
+	str	w1, [x4, #:lo12:.LANCHOR65]
+.L345:
+	adrp	x1, .LANCHOR40
+	adrp	x3, .LANCHOR70
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
+	strh	wzr, [x3, #:lo12:.LANCHOR70]
 	lsl	w2, w1, 1
 	lsr	w1, w1, 3
 	add	w2, w2, 48
 	add	w1, w1, 4
 	add	w0, w2, w0, lsl 2
 	add	w0, w0, w1
-	ldrh	w1, [x15, #:lo12:.LANCHOR55]
+	ldrh	w1, [x15, #:lo12:.LANCHOR56]
 	cmp	w0, w1, lsl 9
-	bcs	.L343
+	bcs	.L346
 	mov	w0, 1
-	strh	w0, [x3, #:lo12:.LANCHOR69]
-.L343:
+	strh	w0, [x3, #:lo12:.LANCHOR70]
+.L346:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L336:
-	mov	w0, 4
-	b	.L352
 .L339:
+	mov	w0, 4
+	b	.L355
+.L342:
 	add	w3, w3, 4
-	b	.L353
-.L341:
+	b	.L356
+.L344:
 	cmp	w3, 7
-	bhi	.L342
+	bhi	.L345
 	mov	w1, 8
-	b	.L354
+	b	.L357
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	adrp	x1, .LANCHOR70
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR70]
-	cbz	w1, .L359
-	adrp	x1, .LANCHOR61
-	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	adrp	x1, .LANCHOR71
-	ldr	x3, [x1, #:lo12:.LANCHOR71]
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	cbz	w1, .L362
+	adrp	x1, .LANCHOR62
+	ldrh	w2, [x1, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR72
+	ldr	x3, [x1, #:lo12:.LANCHOR72]
 	mov	x1, 0
-.L357:
+.L360:
 	cmp	w2, w1, uxth
-	bhi	.L358
-.L359:
+	bhi	.L361
+.L362:
 	mov	w0, 0
 	ret
-.L358:
+.L361:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L357
+	bne	.L360
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2309,8 +2351,8 @@ IsBlkInVendorPart:
 	.global	FtlGetCap
 	.type	FtlGetCap, %function
 FtlGetCap:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",@progbits
@@ -2318,8 +2360,8 @@ FtlGetCap:
 	.global	FtlGetCapacity
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",@progbits
@@ -2327,8 +2369,8 @@ FtlGetCapacity:
 	.global	ftl_get_density
 	.type	ftl_get_density, %function
 ftl_get_density:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",@progbits
@@ -2336,8 +2378,8 @@ ftl_get_density:
 	.global	FtlGetLpn
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-	adrp	x0, .LANCHOR72
-	ldr	w0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	ret
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
@@ -2345,10 +2387,10 @@ FtlGetLpn:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR37
-	ldrh	w1, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR73
-	ldr	w0, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR38
+	ldrh	w1, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR74
+	ldr	w0, [x0, #:lo12:.LANCHOR74]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -2357,10 +2399,10 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR40
-	ldrh	w1, [x0, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR41
+	ldrh	w1, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -2371,13 +2413,13 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	stp	x29, x30, [sp, -32]!
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR50
+	adrp	x0, .LANCHOR51
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR50]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR74
-	add	x19, x19, :lo12:.LANCHOR74
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -2407,13 +2449,13 @@ FtlBbmMapBadBlock:
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR50]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR74
-	add	x1, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR75
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -2436,12 +2478,12 @@ FtlBbtInfoPrint:
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-	adrp	x2, .LANCHOR45
+	adrp	x2, .LANCHOR46
 	and	w0, w0, 65535
-	adrp	x4, .LANCHOR50
+	adrp	x4, .LANCHOR51
 	and	w1, w1, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR45]
-	ldrh	w4, [x4, #:lo12:.LANCHOR50]
+	ldrh	w2, [x2, #:lo12:.LANCHOR46]
+	ldrh	w4, [x4, #:lo12:.LANCHOR51]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
 	madd	w2, w2, w1, w0
@@ -2454,10 +2496,10 @@ V2P_block:
 	.type	P2V_plane, %function
 P2V_plane:
 	and	w3, w0, 65535
-	adrp	x0, .LANCHOR45
-	ldrh	w1, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR50
-	ldrh	w2, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR46
+	ldrh	w1, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR51
+	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
@@ -2470,12 +2512,12 @@ P2V_plane:
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR50
-	ldrh	w1, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR51
+	ldrh	w1, [x0, #:lo12:.LANCHOR51]
 	udiv	w0, w2, w1
 	msub	w0, w0, w1, w2
-	adrp	x1, .LANCHOR45
-	ldrh	w1, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	ldrh	w1, [x1, #:lo12:.LANCHOR46]
 	and	w0, w0, 65535
 	udiv	w0, w0, w1
 	ret
@@ -2487,12 +2529,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L375
+	bls	.L378
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L375:
+.L378:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2503,8 +2545,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR76+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -2514,8 +2556,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR75+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LANCHOR76+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR76+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -2527,42 +2569,46 @@ FtlFreeSysBlkQueueFull:
 FtlFreeSysBlkQueueIn:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	str	x21, [sp, 32]
-	and	w21, w0, 65535
-	adrp	x0, .LANCHOR75
-	add	x2, x0, :lo12:.LANCHOR75
 	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
+	str	x21, [sp, 32]
+	sub	w2, w20, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcc	.L382
+	adrp	x0, .LANCHOR76
+	add	x2, x0, :lo12:.LANCHOR76
+	mov	x19, x0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L379
+	beq	.L382
 	and	w1, w1, 65535
-	mov	x19, x0
-	cbz	w1, .L381
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L381
-	mov	w0, w21
-	bl	P2V_block_in_plane
-	and	w20, w0, 65535
+	cbz	w1, .L384
 	adrp	x0, .LANCHOR77
-	lsl	w1, w21, 10
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L384
+	mov	w0, w20
+	bl	P2V_block_in_plane
+	and	w21, w0, 65535
+	adrp	x0, .LANCHOR78
+	lsl	w1, w20, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR78
-	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ubfiz	x0, x21, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR79
-	ldr	w0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR79]
-.L381:
-	add	x0, x19, :lo12:.LANCHOR75
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L384:
+	add	x0, x19, :lo12:.LANCHOR76
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2571,8 +2617,8 @@ FtlFreeSysBlkQueueIn:
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	strh	w21, [x2, 8]
-.L379:
+	strh	w20, [x2, 8]
+.L382:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2583,109 +2629,58 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	adrp	x0, .LANCHOR80+28
+	adrp	x0, .LANCHOR76
+	add	x1, x0, :lo12:.LANCHOR76
+	ldrh	w2, [x1, 6]
+	cbz	w2, .L392
+	adrp	x2, .LANCHOR81+28
+	ldrh	w3, [x1, 2]
 	mov	w6, 0
 	mov	w4, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR80+28]
-	adrp	x0, .LANCHOR75
-	add	x3, x0, :lo12:.LANCHOR75
+	ldrh	w5, [x2, #:lo12:.LANCHOR81+28]
+	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
-	ldrh	w2, [x3, 2]
-	ldrh	w1, [x3, 4]
-.L390:
+.L394:
 	cmp	w5, w4
-	bgt	.L391
-	cbz	w6, .L389
-	add	x0, x0, :lo12:.LANCHOR75
-	strh	w2, [x0, 2]
-	strh	w1, [x0, 4]
-.L389:
+	bgt	.L395
+	cbz	w6, .L392
+	add	x0, x0, :lo12:.LANCHOR76
+	strh	w3, [x0, 2]
+	strh	w2, [x0, 4]
+.L392:
 	ret
-.L391:
-	add	x6, x3, x2, sxtw 1
+.L395:
+	add	x6, x1, x3, sxtw 1
 	add	w4, w4, 1
-	add	w2, w2, 1
+	add	w3, w3, 1
 	and	w4, w4, 65535
-	and	w2, w2, 1023
+	and	w3, w3, 1023
 	ldrh	w7, [x6, 8]
-	add	x6, x3, x1, sxtw 1
+	add	x6, x1, x2, sxtw 1
 	strh	w7, [x6, 8]
 	mov	w6, 1
-	add	w1, w1, w6
-	and	w1, w1, 1023
-	b	.L390
+	add	w2, w2, w6
+	and	w2, w2, 1023
+	b	.L394
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.remove_from_free_sys_Queue,"ax",@progbits
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
-	.global	remove_from_free_sys_Queue
-	.type	remove_from_free_sys_Queue, %function
-remove_from_free_sys_Queue:
-	stp	x29, x30, [sp, -32]!
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR75
-	add	x19, x19, :lo12:.LANCHOR75
-	ldrh	w3, [x19, 6]
-	cbz	w3, .L401
-	and	w1, w0, 65535
-	ldrh	w0, [x19, 2]
-	mov	w20, 0
-.L398:
-	cmp	w20, w3
-	bcc	.L400
-.L401:
-	mov	w0, 0
-	b	.L396
-.L400:
-	add	w2, w20, w0
-	ubfiz	x2, x2, 1, 10
-	add	x2, x19, x2
-	ldrh	w2, [x2, 8]
-	cmp	w2, w1
-	bne	.L399
-	adrp	x0, .LC3
-	add	x0, x0, :lo12:.LC3
-	bl	printf
-	ldrh	w0, [x19, 2]
-	add	w20, w0, w20
-	add	x1, x19, x0, sxtw 1
-	add	w0, w0, 1
-	and	w0, w0, 1023
-	ubfiz	x20, x20, 1, 10
-	add	x20, x19, x20
-	strh	w0, [x19, 2]
-	ldrh	w0, [x19, 6]
-	ldrh	w1, [x1, 8]
-	sub	w0, w0, #1
-	strh	w1, [x20, 8]
-	strh	w0, [x19, 6]
-	mov	w0, 1
-.L396:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L399:
-	add	w20, w20, 1
-	b	.L398
-	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-	stp	x29, x30, [sp, -64]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR75
-	add	x19, x19, :lo12:.LANCHOR75
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR76
-	mov	x23, x19
-	add	x22, x22, :lo12:.LANCHOR76
-.L404:
-	ldrh	w1, [x19, 6]
-	cbz	w1, .L405
+	adrp	x19, .LANCHOR76
+	add	x19, x19, :lo12:.LANCHOR76
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR77
+	mov	x23, x19
+	add	x22, x22, :lo12:.LANCHOR77
+.L402:
+	ldrh	w1, [x19, 6]
+	cbz	w1, .L403
 	ldrh	w0, [x19, 2]
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
@@ -2695,52 +2690,55 @@ FtlFreeSysBlkQueueOut:
 	strh	w0, [x19, 2]
 	ldr	w0, [x22]
 	ldrh	w20, [x2, 8]
-	cbnz	w0, .L406
+	cbnz	w0, .L404
 	mov	w0, w20
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR78
 	and	w21, w0, 65535
 	lsl	w2, w20, 10
 	mov	x24, x1
-	ldr	x0, [x1, #:lo12:.LANCHOR77]
+	ldr	x0, [x1, #:lo12:.LANCHOR78]
 	str	w2, [x0, 4]
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L407
+	cbz	w2, .L405
 	mov	w2, 1
 	mov	w1, 0
 	bl	FlashEraseBlocks
-.L407:
-	ldr	x0, [x24, #:lo12:.LANCHOR77]
+.L405:
+	ldr	x0, [x24, #:lo12:.LANCHOR78]
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR79
 	ubfiz	x0, x21, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR79
-	ldr	w0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR80
+	ldr	w0, [x1, #:lo12:.LANCHOR80]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR79]
-.L406:
-	cbnz	w20, .L409
+	str	w0, [x1, #:lo12:.LANCHOR80]
+.L404:
+	sub	w0, w20, #1
+	mov	w1, 65533
+	cmp	w1, w0, uxth
+	bcs	.L407
 	ldrh	w2, [x23, 6]
-	mov	w1, 0
-	adrp	x0, .LC5
-	add	x0, x0, :lo12:.LC5
-	bl	printf
-	b	.L404
-.L405:
+	mov	w1, w20
 	adrp	x0, .LC4
-	mov	w1, 0
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L408:
-	b	.L408
-.L409:
+	b	.L402
+.L403:
+	adrp	x0, .LC3
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.L406:
+	b	.L406
+.L407:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -2748,39 +2746,71 @@ FtlFreeSysBlkQueueOut:
 	ldp	x29, x30, [sp], 64
 	ret
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.test_node_in_list,"ax",@progbits
+	.align	2
+	.global	test_node_in_list
+	.type	test_node_in_list, %function
+test_node_in_list:
+	ldr	x2, [x0]
+	adrp	x0, .LANCHOR82
+	mov	x4, -6148914691236517206
+	and	w1, w1, 65535
+	ldr	x3, [x0, #:lo12:.LANCHOR82]
+	movk	x4, 0xaaab, lsl 0
+	mov	w5, 65535
+	sub	x0, x2, x3
+	asr	x0, x0, 1
+	mul	x0, x0, x4
+	mov	w4, 6
+	and	w0, w0, 65535
+.L414:
+	cmp	w0, w1
+	beq	.L415
+	ldrh	w0, [x2]
+	cmp	w0, w5
+	beq	.L416
+	umaddl	x2, w0, w4, x3
+	b	.L414
+.L415:
+	mov	w0, 1
+	ret
+.L416:
+	mov	w0, 0
+	ret
+	.size	test_node_in_list, .-test_node_in_list
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-	adrp	x1, .LANCHOR39
+	adrp	x1, .LANCHOR40
 	and	w0, w0, 65535
-	ldrh	w14, [x1, #:lo12:.LANCHOR39]
+	ldrh	w14, [x1, #:lo12:.LANCHOR40]
 	cmp	w14, w0
-	bls	.L430
-	adrp	x1, .LANCHOR81
+	bls	.L433
+	adrp	x1, .LANCHOR82
 	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR81]
+	ldr	x6, [x1, #:lo12:.LANCHOR82]
 	umull	x13, w0, w3
 	mov	w1, -1
 	add	x5, x6, x13
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR82]
-	cbnz	x12, .L417
-	str	x5, [x1, #:lo12:.LANCHOR82]
-.L430:
+	ldr	x12, [x1, #:lo12:.LANCHOR83]
+	cbnz	x12, .L420
+	str	x5, [x1, #:lo12:.LANCHOR83]
+.L433:
 	mov	w0, 0
 	ret
-.L417:
+.L420:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ubfiz	x2, x0, 1, 16
 	mov	x4, -6148914691236517206
 	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR83]
+	ldr	x16, [x1, #:lo12:.LANCHOR84]
 	movk	x4, 0xaaab, lsl 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
@@ -2795,19 +2825,19 @@ insert_data_list:
 	csel	w7, w7, w8, ne
 	mov	w8, w3
 	mul	x1, x1, x4
-	adrp	x4, .LANCHOR78
-	ldr	x17, [x4, #:lo12:.LANCHOR78]
+	adrp	x4, .LANCHOR79
+	ldr	x17, [x4, #:lo12:.LANCHOR79]
 	and	w1, w1, 65535
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L425:
+.L428:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L416
+	bcc	.L419
 	cmp	w1, w0
-	beq	.L416
+	beq	.L419
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2815,46 +2845,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L421
+	bne	.L424
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L423
-.L422:
+	bcc	.L426
+.L425:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L426
+	bne	.L429
 	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR82]
-	b	.L416
-.L421:
-	bcc	.L422
-.L423:
+	str	x5, [x15, #:lo12:.LANCHOR83]
+	b	.L419
+.L424:
+	bcc	.L425
+.L426:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L424
+	bne	.L427
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
-	adrp	x0, .LANCHOR84
-	str	x5, [x0, #:lo12:.LANCHOR84]
-.L416:
+	adrp	x0, .LANCHOR85
+	str	x5, [x0, #:lo12:.LANCHOR85]
+.L419:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L424:
+.L427:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L425
-.L426:
+	b	.L428
+.L429:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L416
+	b	.L419
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -2864,28 +2894,28 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR85
-	ldrh	w0, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR86
+	ldrh	w0, [x1, #:lo12:.LANCHOR86]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR85]
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	strh	w0, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L432
-	mov	w2, 228
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LC6
+	bcs	.L435
+	mov	w2, 210
+	adrp	x1, .LANCHOR87
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	b	printf
-.L432:
+.L435:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -2897,28 +2927,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L436
-	adrp	x1, .LANCHOR81
+	beq	.L439
+	adrp	x1, .LANCHOR82
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR81]
+	ldr	x3, [x1, #:lo12:.LANCHOR82]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR88
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR87]
-	cbnz	x5, .L437
-	str	x4, [x1, #:lo12:.LANCHOR87]
-.L436:
+	ldr	x5, [x1, #:lo12:.LANCHOR88]
+	cbnz	x5, .L440
+	str	x4, [x1, #:lo12:.LANCHOR88]
+.L439:
 	mov	w0, 0
 	ret
-.L437:
-	adrp	x1, .LANCHOR78
+.L440:
+	adrp	x1, .LANCHOR79
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR78]
+	ldr	x11, [x1, #:lo12:.LANCHOR79]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -2926,37 +2956,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L440:
+.L443:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L438
+	bcs	.L441
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L439
+	bne	.L442
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L436
-.L439:
+	b	.L439
+.L442:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L440
-.L438:
+	b	.L443
+.L441:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L441
+	bne	.L444
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR87]
-	b	.L436
-.L441:
+	str	x4, [x12, #:lo12:.LANCHOR88]
+	b	.L439
+.L444:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L436
+	b	.L439
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -2966,28 +2996,28 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR88
-	ldrh	w0, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR89
+	ldrh	w0, [x1, #:lo12:.LANCHOR89]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	strh	w0, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcs	.L442
-	mov	w2, 221
-	adrp	x1, .LANCHOR89
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LC6
+	bcs	.L445
+	mov	w2, 203
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC5
 	bl	printf
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	b	printf
-.L442:
+.L445:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3000,42 +3030,42 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR81
+	adrp	x20, .LANCHOR82
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR81]
+	ldr	x23, [x20, #:lo12:.LANCHOR82]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L446
+	bne	.L449
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L446
+	beq	.L449
 	mov	w2, 386
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR91
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L446:
+.L449:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L447
+	bne	.L450
 	cmp	w0, w1
-	bne	.L448
+	bne	.L451
 	str	xzr, [x22]
-.L449:
+.L452:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3045,35 +3075,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L448:
-	ldr	x1, [x20, #:lo12:.LANCHOR81]
+.L451:
+	ldr	x1, [x20, #:lo12:.LANCHOR82]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L449
-.L447:
+	b	.L452
+.L450:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L450
+	bne	.L453
 	cmp	w1, w0
-	beq	.L449
+	beq	.L452
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR81]
+	ldr	x0, [x20, #:lo12:.LANCHOR82]
 	strh	w2, [x0, x1]
-	b	.L449
-.L450:
-	ldr	x2, [x20, #:lo12:.LANCHOR81]
+	b	.L452
+.L453:
+	ldr	x2, [x20, #:lo12:.LANCHOR82]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L449
+	b	.L452
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3081,18 +3111,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L458
+	cbz	x2, .L461
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR81
+	adrp	x3, .LANCHOR82
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR81]
-.L454:
-	cbnz	w1, .L455
+	ldr	x19, [x3, #:lo12:.LANCHOR82]
 .L457:
+	cbnz	w1, .L458
+.L460:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3105,15 +3135,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L455:
+.L458:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L457
+	beq	.L460
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L454
-.L458:
+	b	.L457
+.L461:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3123,28 +3153,28 @@ List_pop_index_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
+	adrp	x0, .LANCHOR83
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	cbz	x1, .L471
 	adrp	x0, .LANCHOR82
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	cbz	x1, .L468
-	adrp	x0, .LANCHOR81
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR81]
+	ldr	x3, [x0, #:lo12:.LANCHOR82]
 	mov	w0, 65535
-.L465:
-	cbz	w2, .L466
+.L468:
+	cbz	w2, .L469
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L467
+	bne	.L470
 	ret
-.L467:
+.L470:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L465
-.L468:
+	b	.L468
+.L471:
 	mov	w0, 65535
 	ret
-.L466:
+.L469:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3162,35 +3192,35 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR91
+	adrp	x0, .LANCHOR92
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	stp	x25, x26, [sp, 64]
-	cmp	w0, w19
-	beq	.L471
-	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L471
+	beq	.L474
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	beq	.L471
-	adrp	x0, .LANCHOR81
+	beq	.L474
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w0, w19
+	beq	.L474
+	adrp	x0, .LANCHOR82
 	mov	w21, 6
-	adrp	x24, .LANCHOR82
+	adrp	x24, .LANCHOR83
 	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x0, #:lo12:.LANCHOR81]
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ldr	x23, [x0, #:lo12:.LANCHOR82]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	add	x22, x23, x21
 	cmp	x22, x1
-	beq	.L471
-	adrp	x1, .LANCHOR83
+	beq	.L474
+	adrp	x1, .LANCHOR84
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
@@ -3199,70 +3229,70 @@ List_update_data_list:
 	ldrh	w0, [x22, 2]
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L474
+	bne	.L477
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L474
+	bne	.L477
 	mov	w2, 504
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L474:
+.L477:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L475
+	bne	.L478
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L471
-.L475:
+	beq	.L474
+.L478:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	umull	x0, w0, w1
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	ldr	x2, [x25, #:lo12:.LANCHOR83]
+	ldr	x2, [x25, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR81]
+	ldr	x2, [x26, #:lo12:.LANCHOR82]
 	add	x0, x2, x0
 	ldrh	w2, [x0, 4]
 	cmp	w2, 0
 	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L471
-	adrp	x20, .LANCHOR85
+	bcs	.L474
+	adrp	x20, .LANCHOR86
 	mov	w1, w19
-	add	x0, x24, :lo12:.LANCHOR82
+	add	x0, x24, :lo12:.LANCHOR83
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L477
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	cbnz	w0, .L480
 	mov	w2, 515
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L477:
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+.L480:
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR85]
+	strh	w0, [x20, #:lo12:.LANCHOR86]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L471:
+.L474:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3284,27 +3314,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L482:
+.L485:
 	cmp	w20, w1
-	beq	.L486
+	beq	.L489
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L483
+	cbnz	w2, .L486
 	bl	FtlFreeSysBlkQueueOut
 	and	w1, w0, 65535
 	strh	w0, [x21]
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
-	bcs	.L484
-	adrp	x0, .LANCHOR75+6
-	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
-	adrp	x0, .LC9
-	add	x0, x0, :lo12:.LC9
+	bcs	.L487
+	adrp	x0, .LANCHOR76+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR76+6]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L485:
-	b	.L485
-.L484:
+.L488:
+	b	.L488
+.L487:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3313,31 +3343,31 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L486:
+.L489:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L488
-	mov	w2, 627
-	adrp	x1, .LANCHOR95
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LC6
+	bhi	.L491
+	mov	w2, 628
+	adrp	x1, .LANCHOR96
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR96
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L488:
+.L491:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L483:
+.L486:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L482
+	b	.L485
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3345,128 +3375,128 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR68
 	mov	x1, 0
 	mov	w3, 65535
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR96
+	ldrh	w2, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR97
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
-.L491:
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
+.L494:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L493
+	bcc	.L496
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L494:
+.L497:
 	cmp	w1, w2
-	bne	.L496
+	bne	.L499
 	cmp	w19, w2
-	bcc	.L492
-	adrp	x1, .LANCHOR97
+	bcc	.L495
+	adrp	x1, .LANCHOR98
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR97]
+	ldrh	w4, [x1, #:lo12:.LANCHOR98]
 	mov	w1, 0
-.L497:
+.L500:
 	cmp	w1, w2
-	bne	.L499
+	bne	.L502
 	cmp	w19, w1
-	bcc	.L492
-	mov	w2, 859
-	adrp	x1, .LANCHOR98
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR98
-	add	x0, x0, :lo12:.LC6
+	bcc	.L495
+	mov	w2, 863
+	adrp	x1, .LANCHOR99
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L492
-.L493:
+	b	.L495
+.L496:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L491
-.L492:
+	bne	.L494
+.L495:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L496:
+.L499:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L495
+	tbnz	w4, #31, .L498
 	cmp	w5, w4
-	bls	.L495
+	bls	.L498
 	mov	w5, w4
 	mov	w19, w1
-.L495:
+.L498:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L494
-.L499:
+	b	.L497
+.L502:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L498
+	bls	.L501
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L498:
+.L501:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L497
+	b	.L500
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR99
+	adrp	x2, .LANCHOR100
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR99]
+	ldrh	w1, [x2, #:lo12:.LANCHOR100]
 	cmp	w1, 4
-	bhi	.L502
-	cbnz	w0, .L502
+	bhi	.L505
+	cbnz	w0, .L505
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR99]
+	strh	w1, [x2, #:lo12:.LANCHOR100]
 	ret
-.L502:
-	adrp	x1, .LANCHOR39
-	adrp	x0, .LANCHOR100
-	strh	wzr, [x3, #:lo12:.LANCHOR99]
+.L505:
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR101
+	strh	wzr, [x3, #:lo12:.LANCHOR100]
 	mov	w2, 0
-	ldrh	w5, [x1, #:lo12:.LANCHOR39]
-	adrp	x1, .LANCHOR83
-	str	wzr, [x0, #:lo12:.LANCHOR100]
+	ldrh	w5, [x1, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR84
+	str	wzr, [x0, #:lo12:.LANCHOR101]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR83]
+	ldr	x6, [x1, #:lo12:.LANCHOR84]
 	mov	w7, 65535
 	mov	x1, 0
-.L503:
+.L506:
 	cmp	w5, w1, uxth
-	bhi	.L505
-	cbz	w3, .L501
-	str	w2, [x0, #:lo12:.LANCHOR100]
-.L501:
+	bhi	.L508
+	cbz	w3, .L504
+	str	w2, [x0, #:lo12:.LANCHOR101]
+.L504:
 	ret
-.L505:
+.L508:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L504
+	beq	.L507
 	add	w2, w2, w4
 	mov	w3, 1
-.L504:
+.L507:
 	add	x1, x1, 1
-	b	.L503
+	b	.L506
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3474,9 +3504,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L512
-	b	ftl_set_blk_mode.part.9
-.L512:
+	cbz	w1, .L515
+	b	ftl_set_blk_mode.part.10
+.L515:
 	adrp	x1, .LANCHOR0
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -3512,51 +3542,51 @@ ftl_sb_update_avl_pages:
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	add	x4, x4, 16
 	strh	wzr, [x0, 4]
 	add	x4, x0, x4
-	ldrh	w3, [x1, #:lo12:.LANCHOR37]
+	ldrh	w3, [x1, #:lo12:.LANCHOR38]
 	mov	w1, 65535
-.L515:
+.L518:
 	cmp	w2, w3
-	bcc	.L517
-	adrp	x1, .LANCHOR52
+	bcc	.L520
+	adrp	x1, .LANCHOR53
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	add	x3, x0, x3
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L518:
+.L521:
 	cmp	x2, x3
-	bne	.L520
+	bne	.L523
 	ret
-.L517:
+.L520:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L516
+	beq	.L519
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L516:
+.L519:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L515
-.L520:
+	b	.L518
+.L523:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L519
+	beq	.L522
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L519:
+.L522:
 	add	x2, x2, 2
-	b	.L518
+	b	.L521
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3568,78 +3598,78 @@ make_superblock:
 	ldrh	w1, [x0]
 	str	x19, [sp, 16]
 	mov	x19, x0
-	adrp	x0, .LANCHOR39
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR40
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w1, w0
-	bcc	.L522
-	mov	w2, 2335
-	adrp	x1, .LANCHOR101
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR101
-	add	x0, x0, :lo12:.LC6
+	bcc	.L525
+	mov	w2, 2613
+	adrp	x1, .LANCHOR102
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR102
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L522:
-	adrp	x0, .LANCHOR37
-	adrp	x7, .LANCHOR46
+.L525:
+	adrp	x0, .LANCHOR38
+	adrp	x7, .LANCHOR47
 	add	x6, x19, 16
-	add	x7, x7, :lo12:.LANCHOR46
-	ldrh	w8, [x0, #:lo12:.LANCHOR37]
+	add	x7, x7, :lo12:.LANCHOR47
+	ldrh	w8, [x0, #:lo12:.LANCHOR38]
 	mov	x5, 0
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L523:
+.L526:
 	cmp	w8, w5, uxth
-	bhi	.L525
-	adrp	x1, .LANCHOR52
+	bhi	.L528
+	adrp	x1, .LANCHOR53
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L526
-	adrp	x0, .LANCHOR78
+	cbz	w0, .L529
+	adrp	x0, .LANCHOR79
 	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, x1, lsl 1]
-	cmp	w0, 59
-	bhi	.L526
+	cmp	w0, 79
+	bhi	.L529
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L526:
+.L529:
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L527
+	cbz	w0, .L530
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L527:
+.L530:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L525:
+.L528:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L524
+	cbnz	w0, .L527
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L524:
+.L527:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L523
+	b	.L526
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3647,55 +3677,55 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 	and	w6, w0, 65535
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR38
 	mov	x7, 0
-	adrp	x8, .LANCHOR46
-	ldrh	w10, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR52
+	adrp	x8, .LANCHOR47
+	ldrh	w10, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR53
 	mov	w5, 0
-	add	x8, x8, :lo12:.LANCHOR46
-	ldrh	w11, [x0, #:lo12:.LANCHOR52]
+	add	x8, x8, :lo12:.LANCHOR47
+	ldrh	w11, [x0, #:lo12:.LANCHOR53]
 	cmp	w10, w7, uxth
-	bhi	.L547
-	cbz	w5, .L545
+	bhi	.L550
+	cbz	w5, .L548
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L546:
-	adrp	x0, .LANCHOR81
+.L549:
+	adrp	x0, .LANCHOR82
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L540:
+.L543:
 	mov	w5, 0
-	b	.L539
-.L545:
+	b	.L542
+.L548:
 	mov	w5, 0
-	b	.L546
-.L547:
+	b	.L549
+.L550:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L538:
+.L541:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L537
+	cbnz	w0, .L540
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L537:
+.L540:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L538
-	cbz	w5, .L540
+	bhi	.L541
+	cbz	w5, .L543
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L539:
-	adrp	x0, .LANCHOR81
+.L542:
+	adrp	x0, .LANCHOR82
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -3707,22 +3737,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR87
-	ldr	x0, [x0, #:lo12:.LANCHOR87]
-	cbz	x0, .L550
-	adrp	x1, .LANCHOR81
-	ldr	x1, [x1, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR88
+	ldr	x0, [x0, #:lo12:.LANCHOR88]
+	cbz	x0, .L553
+	adrp	x1, .LANCHOR82
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR78
-	ldr	x1, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ldr	x1, [x1, #:lo12:.LANCHOR79]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L550:
+.L553:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3731,21 +3761,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR87
+	adrp	x1, .LANCHOR88
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR87]
-	cbz	x1, .L558
-	adrp	x2, .LANCHOR88
+	ldr	x1, [x1, #:lo12:.LANCHOR88]
+	cbz	x1, .L561
+	adrp	x2, .LANCHOR89
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR88]
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR81
-	ldr	x3, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR82
+	ldr	x3, [x2, #:lo12:.LANCHOR82]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -3753,25 +3783,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L554:
+.L557:
 	cmp	w0, w2
-	beq	.L557
+	beq	.L560
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L555
-.L557:
-	adrp	x0, .LANCHOR78
+	bne	.L558
+.L560:
+	adrp	x0, .LANCHOR79
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, x1]
 	ret
-.L555:
+.L558:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L554
-.L558:
+	b	.L557
+.L561:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3783,18 +3813,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L562
+	beq	.L565
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR83
+	adrp	x2, .LANCHOR84
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L562:
+.L565:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3803,45 +3833,45 @@ free_data_superblock:
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	adrp	x1, .LANCHOR103
-	adrp	x0, .LANCHOR102
-	adrp	x7, .LANCHOR104
-	adrp	x6, .LANCHOR105
-	ldr	x5, [x1, #:lo12:.LANCHOR103]
-	adrp	x1, .LANCHOR57
-	str	wzr, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR37
-	ldrh	w10, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR104
+	adrp	x0, .LANCHOR103
+	adrp	x7, .LANCHOR105
+	adrp	x6, .LANCHOR106
+	ldr	x5, [x1, #:lo12:.LANCHOR104]
 	adrp	x1, .LANCHOR58
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	str	wzr, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR38
+	ldrh	w10, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR59
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	mov	w8, 24
-	ldrh	w11, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR106
-	ldr	x14, [x7, #:lo12:.LANCHOR104]
+	ldrh	w11, [x1, #:lo12:.LANCHOR59]
+	adrp	x1, .LANCHOR107
+	ldr	x14, [x7, #:lo12:.LANCHOR105]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR106]
+	ldr	x4, [x1, #:lo12:.LANCHOR107]
 	mov	w2, 0
-	ldr	x15, [x6, #:lo12:.LANCHOR105]
+	ldr	x15, [x6, #:lo12:.LANCHOR106]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L566:
+.L569:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L567
-	adrp	x1, .LANCHOR107
-	ldr	x7, [x7, #:lo12:.LANCHOR104]
-	ldr	x6, [x6, #:lo12:.LANCHOR105]
+	bne	.L570
+	adrp	x1, .LANCHOR108
+	ldr	x7, [x7, #:lo12:.LANCHOR105]
+	ldr	x6, [x6, #:lo12:.LANCHOR106]
 	mov	w8, 24
-	ldr	w4, [x1, #:lo12:.LANCHOR107]
-.L568:
+	ldr	w4, [x1, #:lo12:.LANCHOR108]
+.L571:
 	cmp	w0, w4
-	bcc	.L569
+	bcc	.L572
 	ret
-.L567:
+.L570:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3853,8 +3883,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L566
-.L569:
+	b	.L569
+.L572:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -3868,44 +3898,44 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L568
+	b	.L571
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR108
 	mov	w3, 0
 	mov	w7, 56
 	mov	w10, 24
-	ldr	w8, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR103
-	ldr	x4, [x2, #:lo12:.LANCHOR103]
-.L571:
+	ldr	w8, [x2, #:lo12:.LANCHOR108]
+	adrp	x2, .LANCHOR104
+	ldr	x4, [x2, #:lo12:.LANCHOR104]
+.L574:
 	cmp	w3, w1
-	bcs	.L570
+	bcs	.L573
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L576
-.L572:
+	b	.L579
+.L575:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L576:
+.L579:
 	cmp	w2, w8
-	bcs	.L573
+	bcs	.L576
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L572
+	bne	.L575
 	str	wzr, [x11, 16]
-.L573:
+.L576:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L571
-.L570:
+	b	.L574
+.L573:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -3913,38 +3943,38 @@ FtlGcBufFree:
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-	adrp	x2, .LANCHOR107
+	adrp	x2, .LANCHOR108
 	mov	w3, 0
 	mov	w7, 24
 	mov	w8, 1
-	ldr	w5, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR103
+	ldr	w5, [x2, #:lo12:.LANCHOR108]
+	adrp	x2, .LANCHOR104
 	mov	w10, 56
-	ldr	x6, [x2, #:lo12:.LANCHOR103]
-.L578:
+	ldr	x6, [x2, #:lo12:.LANCHOR104]
+.L581:
 	cmp	w3, w1
-	bcs	.L577
+	bcs	.L580
 	mov	w2, 0
-	b	.L583
-.L579:
+	b	.L586
+.L582:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L583:
+.L586:
 	cmp	w2, w5
-	bcs	.L580
+	bcs	.L583
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L579
+	cbnz	w11, .L582
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L580:
+.L583:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L578
-.L577:
+	b	.L581
+.L580:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -3952,23 +3982,23 @@ FtlGcBufAlloc:
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-	adrp	x1, .LANCHOR108
-	and	w0, w0, 65535
-	ldrh	w2, [x1, #:lo12:.LANCHOR108]
 	adrp	x1, .LANCHOR109
-	ldr	x3, [x1, #:lo12:.LANCHOR109]
+	and	w0, w0, 65535
+	ldrh	w2, [x1, #:lo12:.LANCHOR109]
+	adrp	x1, .LANCHOR110
+	ldr	x3, [x1, #:lo12:.LANCHOR110]
 	mov	x1, 0
-.L585:
+.L588:
 	cmp	w2, w1, uxth
-	bhi	.L587
+	bhi	.L590
 	mov	w0, 0
 	ret
-.L587:
+.L590:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L585
+	bne	.L588
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3985,40 +4015,40 @@ FtlGcUpdatePage:
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
 	and	w7, w0, 65535
-	adrp	x4, .LANCHOR108
-	adrp	x2, .LANCHOR109
+	adrp	x4, .LANCHOR109
+	adrp	x2, .LANCHOR110
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR108]
-	ldr	x5, [x2, #:lo12:.LANCHOR109]
-.L590:
+	ldrh	w1, [x4, #:lo12:.LANCHOR109]
+	ldr	x5, [x2, #:lo12:.LANCHOR110]
+.L593:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L592
-	bne	.L591
+	bcc	.L595
+	bne	.L594
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	ldrh	w0, [x4, #:lo12:.LANCHOR108]
+	ldrh	w0, [x4, #:lo12:.LANCHOR109]
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR108]
-	b	.L591
-.L592:
+	strh	w0, [x4, #:lo12:.LANCHOR109]
+	b	.L594
+.L595:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L590
-.L591:
-	adrp	x4, .LANCHOR110
-	adrp	x1, .LANCHOR111
+	bne	.L593
+.L594:
+	adrp	x4, .LANCHOR111
+	adrp	x1, .LANCHOR112
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR110]
-	ldr	x5, [x1, #:lo12:.LANCHOR111]
+	ldrh	w0, [x4, #:lo12:.LANCHOR111]
+	ldr	x5, [x1, #:lo12:.LANCHOR112]
 	umull	x3, w0, w3
 	add	w0, w0, 1
 	add	x7, x5, x3
 	stp	w10, w8, [x7, 4]
 	str	w6, [x5, x3]
-	strh	w0, [x4, #:lo12:.LANCHOR110]
+	strh	w0, [x4, #:lo12:.LANCHOR111]
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -4027,27 +4057,45 @@ FtlGcUpdatePage:
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-	adrp	x4, .LANCHOR112
+	adrp	x8, .LANCHOR113
 	and	w0, w0, 65535
-	ldrh	w5, [x4, #:lo12:.LANCHOR112]
-	cmp	w5, w0
-	beq	.L595
-	adrp	x1, .LANCHOR113
-	ldrh	w3, [x1, #:lo12:.LANCHOR113]
+	ldrh	w10, [x8, #:lo12:.LANCHOR113]
+	cmp	w10, w0
+	beq	.L598
+	adrp	x6, .LANCHOR114
+	ldrh	w7, [x6, #:lo12:.LANCHOR114]
+	cmp	w0, w7
+	beq	.L598
+	adrp	x4, .LANCHOR115
+	ldrh	w5, [x4, #:lo12:.LANCHOR115]
+	cmp	w0, w5
+	beq	.L598
+	adrp	x2, .LANCHOR116
+	ldrh	w3, [x2, #:lo12:.LANCHOR116]
 	cmp	w0, w3
-	beq	.L595
-	mov	w2, 65535
-	cmp	w5, w2
-	bne	.L596
-	strh	w0, [x4, #:lo12:.LANCHOR112]
-.L595:
+	beq	.L598
+	mov	w1, 65535
+	cmp	w10, w1
+	bne	.L599
+	strh	w0, [x8, #:lo12:.LANCHOR113]
+.L598:
 	mov	w0, 0
 	ret
-.L596:
-	cmp	w3, w2
-	bne	.L595
-	strh	w0, [x1, #:lo12:.LANCHOR113]
-	b	.L595
+.L599:
+	cmp	w7, w1
+	bne	.L600
+	strh	w0, [x6, #:lo12:.LANCHOR114]
+	b	.L598
+.L600:
+	cmp	w5, w1
+	bne	.L601
+	strh	w0, [x4, #:lo12:.LANCHOR115]
+	b	.L598
+.L601:
+	cmp	w3, w1
+	bne	.L598
+	strh	w0, [x2, #:lo12:.LANCHOR116]
+	b	.L598
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
 	.align	2
@@ -4061,48 +4109,48 @@ FtlGcRefreshOpenBlock:
 	.global	FtlGcMarkBadPhyBlk
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-	and	w7, w0, 65535
+	and	w12, w0, 65535
 	stp	x29, x30, [sp, -16]!
-	mov	w0, w7
+	mov	w0, w12
 	add	x29, sp, 0
 	bl	P2V_block_in_plane
-	and	w6, w0, 65535
+	and	w11, w0, 65535
 	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR28
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L599
-	adrp	x1, .LANCHOR78
-	ubfiz	x0, x6, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR78]
+	cbz	w0, .L604
+	adrp	x1, .LANCHOR79
+	ubfiz	x0, x11, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR79]
 	ldrh	w1, [x2, x0]
-	cmp	w1, 29
-	bls	.L599
-	sub	w1, w1, #30
+	cmp	w1, 39
+	bls	.L604
+	sub	w1, w1, #40
 	strh	w1, [x2, x0]
-.L599:
-	adrp	x1, .LANCHOR114
-	adrp	x3, .LANCHOR115
-	add	x3, x3, :lo12:.LANCHOR115
+.L604:
+	adrp	x1, .LANCHOR117
+	adrp	x3, .LANCHOR118
+	add	x3, x3, :lo12:.LANCHOR118
 	mov	x2, 0
-	ldrh	w0, [x1, #:lo12:.LANCHOR114]
-.L600:
+	ldrh	w0, [x1, #:lo12:.LANCHOR117]
+.L605:
 	cmp	w0, w2, uxth
-	bhi	.L602
+	bhi	.L607
 	cmp	w0, 15
-	bhi	.L601
+	bhi	.L606
 	add	w2, w0, 1
-	strh	w2, [x1, #:lo12:.LANCHOR114]
-	adrp	x1, .LANCHOR115
-	add	x1, x1, :lo12:.LANCHOR115
-	strh	w7, [x1, w0, sxtw 1]
-	b	.L601
-.L602:
+	strh	w2, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR118
+	add	x1, x1, :lo12:.LANCHOR118
+	strh	w12, [x1, w0, sxtw 1]
+	b	.L606
+.L607:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
-	cmp	w4, w7
-	bne	.L600
-.L601:
+	cmp	w4, w12
+	bne	.L605
+.L606:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4112,38 +4160,93 @@ FtlGcMarkBadPhyBlk:
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-	adrp	x0, .LANCHOR114
-	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L614
-	adrp	x1, .LANCHOR112
-	ldrh	w2, [x1, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
+	cbz	w0, .L619
+	adrp	x1, .LANCHOR113
+	ldrh	w2, [x1, #:lo12:.LANCHOR113]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L614
+	bne	.L619
 	stp	x29, x30, [sp, -16]!
-	adrp	x6, .LANCHOR116
+	adrp	x11, .LANCHOR119
 	add	x29, sp, 0
-	ldrh	w1, [x6, #:lo12:.LANCHOR116]
+	ldrh	w1, [x11, #:lo12:.LANCHOR119]
 	cmp	w1, w0
-	bcc	.L609
-	strh	wzr, [x6, #:lo12:.LANCHOR116]
-.L609:
-	ldrh	w1, [x6, #:lo12:.LANCHOR116]
-	adrp	x0, .LANCHOR115
-	add	x0, x0, :lo12:.LANCHOR115
+	bcc	.L614
+	strh	wzr, [x11, #:lo12:.LANCHOR119]
+.L614:
+	ldrh	w1, [x11, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR118
+	add	x0, x0, :lo12:.LANCHOR118
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	w0, [x6, #:lo12:.LANCHOR116]
+	ldrh	w0, [x11, #:lo12:.LANCHOR119]
 	ldp	x29, x30, [sp], 16
 	add	w0, w0, 1
-	strh	w0, [x6, #:lo12:.LANCHOR116]
+	strh	w0, [x11, #:lo12:.LANCHOR119]
 	mov	w0, 0
 	ret
-.L614:
+.L619:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.flash_boot_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_boot_enter_slc_mode
+	.type	flash_boot_enter_slc_mode, %function
+flash_boot_enter_slc_mode:
+	adrp	x1, .LANCHOR29
+	and	w0, w0, 255
+	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	cmp	w2, w1
+	bne	.L622
+	b	flash_enter_slc_mode
+.L622:
+	ret
+	.size	flash_boot_enter_slc_mode, .-flash_boot_enter_slc_mode
+	.section	.text.flash_boot_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_boot_exit_slc_mode
+	.type	flash_boot_exit_slc_mode, %function
+flash_boot_exit_slc_mode:
+	adrp	x1, .LANCHOR29
+	and	w0, w0, 255
+	ldr	w2, [x1, #:lo12:.LANCHOR29]
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	cmp	w2, w1
+	bne	.L624
+	b	flash_exit_slc_mode
+.L624:
+	ret
+	.size	flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
+	.section	.text.FW_FlashBlockErase.constprop.41,"ax",@progbits
+	.align	2
+	.type	FW_FlashBlockErase.constprop.41, %function
+FW_FlashBlockErase.constprop.41:
+	stp	x29, x30, [sp, -16]!
+	mov	w4, w0
+	adrp	x0, .LANCHOR18
+	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w3, [x0, 9]
+	mov	w0, 0
+	bl	flash_boot_enter_slc_mode
+	udiv	w1, w4, w3
+	mov	w2, 0
+	mov	w0, 0
+	bl	FlashEraseBlock
+	mov	w3, w0
+	mov	w0, 0
+	bl	flash_boot_exit_slc_mode
+	and	w0, w3, 255
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FW_FlashBlockErase.constprop.41, .-FW_FlashBlockErase.constprop.41
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
@@ -4161,18 +4264,18 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L619
+	cbnz	w0, .L630
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L620:
+.L631:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L620
-.L626:
-	adrp	x19, .LANCHOR117
-	add	x19, x19, :lo12:.LANCHOR117
+	bne	.L631
+.L637:
+	adrp	x19, .LANCHOR120
+	add	x19, x19, :lo12:.LANCHOR120
 	mov	w1, 255
 	mov	w2, 1024
 	mov	x0, x19
@@ -4181,41 +4284,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L621:
+.L632:
 	cmp	w20, w0, uxth
-	bhi	.L643
+	bhi	.L654
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L619:
+.L630:
 	cmp	w0, 1
-	bne	.L622
+	bne	.L633
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L625:
+.L636:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L623
+	bls	.L634
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L623:
+.L634:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L625
-	b	.L626
-.L622:
+	bne	.L636
+	b	.L637
+.L633:
 	cmp	w0, 2
-	bne	.L627
+	bne	.L638
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L629:
+.L640:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4224,32 +4327,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L629
-	b	.L626
-.L627:
+	bne	.L640
+	b	.L637
+.L638:
 	cmp	w0, 3
-	bne	.L630
+	bne	.L641
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L633:
+.L644:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L631
+	bls	.L642
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L631:
+.L642:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L633
-	b	.L626
-.L630:
+	bne	.L644
+	b	.L637
+.L641:
 	cmp	w0, 4
-	bne	.L634
+	bne	.L645
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4268,7 +4371,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L636:
+.L647:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4277,57 +4380,57 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L636
-	b	.L626
-.L634:
+	bne	.L647
+	b	.L637
+.L645:
 	cmp	w0, 5
-	bne	.L637
+	bne	.L648
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L638:
+.L649:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L638
+	bne	.L649
 	add	x1, x1, 32
-.L639:
+.L650:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L639
-	b	.L626
-.L637:
+	bne	.L650
+	b	.L637
+.L648:
 	cmp	w0, 6
-	bne	.L626
+	bne	.L637
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L642:
+.L653:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L640
+	bls	.L651
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L640:
+.L651:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L642
-	b	.L626
-.L643:
+	bne	.L653
+	b	.L637
+.L654:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L621
+	b	.L632
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4335,22 +4438,22 @@ BuildFlashLsbPageTable:
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR30+10
+	adrp	x0, .LANCHOR31+10
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR25
-	adrp	x20, .LANCHOR118
+	adrp	x20, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR30+10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR31+10]
 	adrp	x23, .LANCHOR3
 	stp	x21, x22, [sp, 32]
 	strb	wzr, [x19, #:lo12:.LANCHOR25]
 	cmp	w0, 256
-	strb	wzr, [x20, #:lo12:.LANCHOR118]
+	strb	wzr, [x20, #:lo12:.LANCHOR121]
 	str	x25, [sp, 64]
-	bls	.L659
+	bls	.L670
 	mov	w0, 512
-.L676:
+.L687:
 	adrp	x25, .LANCHOR26
 	add	x22, x25, :lo12:.LANCHOR26
 	str	w0, [x23, #:lo12:.LANCHOR3]
@@ -4377,27 +4480,27 @@ FlashDieInfoInit:
 	mov	x8, 0
 	add	x10, x7, 1
 	ldrb	w11, [x7]
-.L663:
+.L674:
 	mov	w2, w11
 	add	x1, x15, x8, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L662
+	cbnz	w0, .L673
 	ldrb	w1, [x14]
 	add	w0, w1, 1
 	strb	w0, [x14]
 	str	wzr, [x21, x1, lsl 2]
 	strb	w8, [x22, x1]
-.L662:
+.L673:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L663
+	bne	.L674
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
-	strb	w0, [x20, #:lo12:.LANCHOR118]
+	strb	w0, [x20, #:lo12:.LANCHOR121]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L664
-.L668:
+	beq	.L675
+.L679:
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4407,28 +4510,28 @@ FlashDieInfoInit:
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR119
+	adrp	x1, .LANCHOR122
 	ldp	x29, x30, [sp], 80
-	strh	w0, [x1, #:lo12:.LANCHOR119]
+	strh	w0, [x1, #:lo12:.LANCHOR122]
 	ret
-.L659:
+.L670:
 	cmp	w0, 128
-	bls	.L676
+	bls	.L687
 	mov	w0, 256
-	b	.L676
-.L664:
+	b	.L687
+.L675:
 	ldr	w20, [x23, #:lo12:.LANCHOR3]
 	add	x12, x12, :lo12:.LANCHOR22
 	add	x14, x19, :lo12:.LANCHOR25
 	add	x24, x24, :lo12:.LANCHOR17
 	add	x13, x25, :lo12:.LANCHOR26
 	mov	x15, 0
-.L667:
+.L678:
 	mov	w2, w11
 	add	x1, x12, x15, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L665
+	cbnz	w0, .L676
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x14]
@@ -4438,18 +4541,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x24, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L666
+	cbz	w3, .L677
 	lsl	w0, w0, 1
 	str	w0, [x24, x2, lsl 2]
-.L666:
+.L677:
 	add	w1, w1, 1
 	strb	w15, [x13, x2]
 	strb	w1, [x14]
-.L665:
+.L676:
 	add	x15, x15, 1
 	cmp	x15, 4
-	bne	.L667
-	b	.L668
+	bne	.L678
+	b	.L679
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4464,7 +4567,7 @@ ReadFlashInfo:
 	mov	x19, x0
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x3, .LANCHOR68
+	adrp	x3, .LANCHOR69
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR3
@@ -4474,11 +4577,11 @@ ReadFlashInfo:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR68
-	ldrb	w3, [x3, #:lo12:.LANCHOR68]
+	add	x0, x3, :lo12:.LANCHOR69
+	ldrb	w3, [x3, #:lo12:.LANCHOR69]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -4497,20 +4600,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L678:
+.L689:
 	cmp	w3, w1, uxtb
-	bhi	.L679
+	bhi	.L690
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L679:
+.L690:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L678
+	b	.L689
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4521,13 +4624,13 @@ FtlBbt2Bitmap:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x21, x0
-	adrp	x0, .LANCHOR120
+	adrp	x0, .LANCHOR123
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR50
-	adrp	x23, .LANCHOR121
-	ldrh	w2, [x0, #:lo12:.LANCHOR120]
-	add	x22, x22, :lo12:.LANCHOR50
-	add	x23, x23, :lo12:.LANCHOR121
+	adrp	x22, .LANCHOR51
+	adrp	x23, .LANCHOR124
+	ldrh	w2, [x0, #:lo12:.LANCHOR123]
+	add	x22, x22, :lo12:.LANCHOR51
+	add	x23, x23, :lo12:.LANCHOR124
 	stp	x19, x20, [sp, 16]
 	mov	w24, 65535
 	mov	x19, 0
@@ -4536,24 +4639,24 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L684:
+.L695:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L681
+	beq	.L692
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L683
+	bhi	.L694
 	mov	w2, 79
 	mov	x1, x23
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L683:
+.L694:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4565,8 +4668,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L684
-.L681:
+	bne	.L695
+.L692:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4578,11 +4681,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR74
-	add	x0, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR75
+	add	x0, x1, :lo12:.LANCHOR75
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR74]
+	strh	w2, [x1, #:lo12:.LANCHOR75]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -4594,11 +4697,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR75
-	add	x3, x1, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR76
+	add	x3, x1, :lo12:.LANCHOR76
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR75]
+	strh	w0, [x1, #:lo12:.LANCHOR76]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -4629,19 +4732,19 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L692:
+.L703:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L696
+	bhi	.L707
 	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR53
-	add	x24, x24, :lo12:.LANCHOR53
+	adrp	x24, .LANCHOR54
+	add	x24, x24, :lo12:.LANCHOR54
 	mov	w25, 0
 	mov	w20, 0
-.L697:
+.L708:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L701
+	bhi	.L712
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4649,61 +4752,61 @@ ftl_free_no_use_map_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L696:
+.L707:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L693:
+.L704:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L695
+	bhi	.L706
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L692
-.L695:
+	b	.L703
+.L706:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L694
+	bne	.L705
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L694:
+.L705:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L693
-.L701:
+	b	.L704
+.L712:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L698
+	bne	.L709
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L698
+	bcs	.L709
 	strh	w0, [x21, x22, lsl 1]
-.L698:
+.L709:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L699
+	bls	.L710
 	mov	w25, w20
 	mov	w26, w0
-.L699:
-	cbnz	w0, .L700
+.L710:
+	cbnz	w0, .L711
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L700
+	cbz	w0, .L711
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x23, x22]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L700:
+.L711:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L697
+	b	.L708
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4714,67 +4817,67 @@ FtlL2PDataInit:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR122
-	adrp	x20, .LANCHOR64
+	adrp	x19, .LANCHOR125
+	adrp	x20, .LANCHOR65
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR122]
-	adrp	x22, .LANCHOR57
-	ldr	w2, [x20, #:lo12:.LANCHOR64]
-	adrp	x21, .LANCHOR67
+	ldr	x0, [x19, #:lo12:.LANCHOR125]
+	adrp	x22, .LANCHOR58
+	ldr	w2, [x20, #:lo12:.LANCHOR65]
+	adrp	x21, .LANCHOR68
 	str	x23, [sp, 48]
-	adrp	x23, .LANCHOR123
+	adrp	x23, .LANCHOR126
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR67]
+	ldrh	w0, [x21, #:lo12:.LANCHOR68]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR57]
+	ldrh	w2, [x22, #:lo12:.LANCHOR58]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR123]
+	ldr	x0, [x23, #:lo12:.LANCHOR126]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR96
-	ldrh	w3, [x21, #:lo12:.LANCHOR67]
-	ldr	x6, [x23, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR97
+	ldrh	w3, [x21, #:lo12:.LANCHOR68]
+	ldr	x6, [x23, #:lo12:.LANCHOR126]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR57]
+	ldrh	w5, [x22, #:lo12:.LANCHOR58]
 	add	x3, x0, x3, lsl 4
-.L707:
+.L718:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L708
-	adrp	x1, .LANCHOR124
-	add	x0, x1, :lo12:.LANCHOR124
+	bne	.L719
+	adrp	x1, .LANCHOR127
+	add	x0, x1, :lo12:.LANCHOR127
 	ldp	x21, x22, [sp, 32]
-	strh	w2, [x1, #:lo12:.LANCHOR124]
-	ldr	w1, [x20, #:lo12:.LANCHOR64]
+	strh	w2, [x1, #:lo12:.LANCHOR127]
+	ldr	w1, [x20, #:lo12:.LANCHOR65]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR125
+	adrp	x1, .LANCHOR128
 	ldr	x23, [sp, 48]
 	strh	w2, [x0, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR125]
+	ldrh	w1, [x1, #:lo12:.LANCHOR128]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR67
 	strh	w2, [x0, 60]
-	ldrh	w1, [x1, #:lo12:.LANCHOR66]
+	ldrh	w1, [x1, #:lo12:.LANCHOR67]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR126
-	ldr	x1, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR129
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR127
-	ldr	x1, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR130
+	ldr	x1, [x1, #:lo12:.LANCHOR130]
 	str	x1, [x0, 24]
-	ldr	x1, [x19, #:lo12:.LANCHOR122]
+	ldr	x1, [x19, #:lo12:.LANCHOR125]
 	ldp	x19, x20, [sp, 16]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR128
-	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	adrp	x1, .LANCHOR131
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L708:
+.L719:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4782,7 +4885,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L707
+	b	.L718
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4790,53 +4893,53 @@ FtlL2PDataInit:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR129
+	adrp	x0, .LANCHOR132
 	mov	w1, -1
 	add	x29, sp, 0
-	str	xzr, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LANCHOR130
+	str	xzr, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR133
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR40
-	strh	w1, [x0, #:lo12:.LANCHOR130]
-	adrp	x0, .LANCHOR131
+	adrp	x19, .LANCHOR41
+	strh	w1, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR134
 	mov	w1, -1
-	str	wzr, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LANCHOR132
-	str	wzr, [x0, #:lo12:.LANCHOR132]
-	adrp	x0, .LANCHOR133
-	str	w1, [x0, #:lo12:.LANCHOR133]
+	str	wzr, [x0, #:lo12:.LANCHOR134]
+	adrp	x0, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	str	w1, [x0, #:lo12:.LANCHOR136]
 	adrp	x0, .LANCHOR28
 	mov	w1, 0
 	str	wzr, [x0, #:lo12:.LANCHOR28]
-	adrp	x0, .LANCHOR70
-	strh	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR61
-	ldrh	w2, [x0, #:lo12:.LANCHOR61]
 	adrp	x0, .LANCHOR71
-	ldr	x0, [x0, #:lo12:.LANCHOR71]
+	strh	wzr, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR62
+	ldrh	w2, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR78
-	ldrh	w2, [x19, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR79
+	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR134
-	ldrh	w2, [x19, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR137
+	ldrh	w2, [x19, #:lo12:.LANCHOR41]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR134]
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -4851,127 +4954,127 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR41
 	mov	w1, 0
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR40]
+	ldrh	w2, [x0, #:lo12:.LANCHOR41]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR81
+	adrp	x24, .LANCHOR82
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR85
+	adrp	x23, .LANCHOR86
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR88
+	adrp	x22, .LANCHOR89
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR81]
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR39
+	adrp	x25, .LANCHOR40
 	str	x27, [sp, 80]
-	adrp	x26, .LANCHOR46
-	add	x25, x25, :lo12:.LANCHOR39
-	add	x26, x26, :lo12:.LANCHOR46
+	adrp	x26, .LANCHOR47
+	add	x25, x25, :lo12:.LANCHOR40
+	add	x26, x26, :lo12:.LANCHOR47
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR87
+	adrp	x0, .LANCHOR88
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR85]
-	str	xzr, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LANCHOR82
-	strh	wzr, [x22, #:lo12:.LANCHOR88]
-	adrp	x27, .LANCHOR37
-	str	xzr, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LANCHOR84
-	str	xzr, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR136
-	strh	wzr, [x0, #:lo12:.LANCHOR136]
-.L713:
+	strh	wzr, [x23, #:lo12:.LANCHOR86]
+	str	xzr, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR83
+	strh	wzr, [x22, #:lo12:.LANCHOR89]
+	adrp	x27, .LANCHOR38
+	str	xzr, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR85
+	str	xzr, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR139
+	strh	wzr, [x0, #:lo12:.LANCHOR139]
+.L724:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L720
-	adrp	x0, .LANCHOR52
-	ldrh	w8, [x27, #:lo12:.LANCHOR37]
+	bge	.L731
+	adrp	x0, .LANCHOR53
+	ldrh	w8, [x27, #:lo12:.LANCHOR38]
 	mov	w5, 0
 	mov	w6, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR52]
-	b	.L721
-.L715:
+	ldrh	w7, [x0, #:lo12:.LANCHOR53]
+	b	.L732
+.L726:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L714
+	cbnz	w0, .L725
 	add	w5, w7, w5
 	sxth	w5, w5
-.L714:
+.L725:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L721:
+.L732:
 	cmp	w6, w8
-	blt	.L715
-	cbz	w5, .L716
+	blt	.L726
+	cbz	w5, .L727
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L717:
-	ldr	x1, [x24, #:lo12:.LANCHOR81]
+.L728:
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w19, w0
-	beq	.L718
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L718
+	beq	.L729
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w19, w0
-	beq	.L718
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	beq	.L729
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w19, w0
+	beq	.L729
+	adrp	x0, .LANCHOR84
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L719
+	cbnz	w0, .L730
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L718:
+.L729:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L713
-.L716:
-	adrp	x0, .LANCHOR83
+	b	.L724
+.L727:
+	adrp	x0, .LANCHOR84
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L717
-.L719:
+	b	.L728
+.L730:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L718
-.L720:
-	strh	w20, [x23, #:lo12:.LANCHOR85]
+	b	.L729
+.L731:
+	strh	w20, [x23, #:lo12:.LANCHOR86]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR88]
+	strh	w21, [x22, #:lo12:.LANCHOR89]
 	cmp	w0, w20
-	bge	.L722
-	mov	w2, 2405
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC6
+	bge	.L733
+	mov	w2, 2683
+	adrp	x1, .LANCHOR140
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L722:
+.L733:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4987,30 +5090,46 @@ SupperBlkListInit:
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR109
 	mov	w1, 255
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR111
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR54
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR109
-	ldrh	w2, [x19, #:lo12:.LANCHOR54]
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	adrp	x19, .LANCHOR55
+	strh	wzr, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR110
+	ldrh	w2, [x19, #:lo12:.LANCHOR55]
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR54]
+	ldrh	w2, [x19, #:lo12:.LANCHOR55]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR111
-	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
 	bl	ftl_memset
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	FtlGcBufInit
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.idb_init,"ax",@progbits
+	.align	2
+	.global	idb_init
+	.type	idb_init, %function
+idb_init:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 262144
+	mov	w1, 0
+	adrp	x0, idb_buf
+	add	x29, sp, 0
+	add	x0, x0, :lo12:idb_buf
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
@@ -5026,8 +5145,8 @@ ftl_memcpy:
 FlashReadIdbData:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 2048
-	adrp	x1, .LANCHOR138
-	add	x1, x1, :lo12:.LANCHOR138
+	adrp	x1, .LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR141
 	add	x29, sp, 0
 	bl	ftl_memcpy
 	mov	w0, 0
@@ -5040,8 +5159,8 @@ FlashReadIdbData:
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR139
-	add	x8, x0, :lo12:.LANCHOR139
+	adrp	x0, .LANCHOR142
+	add	x8, x0, :lo12:.LANCHOR142
 	adrp	x11, .LANCHOR22
 	add	x29, sp, 0
 	add	x8, x8, 1
@@ -5049,7 +5168,7 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L732:
+.L745:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x20, x10, 5
@@ -5057,28 +5176,28 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w19, w0
-	cbnz	w0, .L730
-	add	x0, x7, :lo12:.LANCHOR139
+	cbnz	w0, .L743
+	add	x0, x7, :lo12:.LANCHOR142
 	ubfiz	x12, x12, 5, 32
 	add	x20, x0, x20
 	add	x0, x0, x12
-	adrp	x1, .LANCHOR140
-	add	x4, x1, :lo12:.LANCHOR140
+	adrp	x1, .LANCHOR143
+	add	x4, x1, :lo12:.LANCHOR143
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L731:
+.L744:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L734
+	beq	.L747
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L731
+	bne	.L744
 	mov	w2, w0
-.L734:
+.L747:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR143
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR7
@@ -5086,17 +5205,17 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	mov	w2, 32
 	mov	x1, x20
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR31
+	add	x0, x0, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-	b	.L729
-.L730:
+	b	.L742
+.L743:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 74
-	bne	.L732
+	cmp	x10, 77
+	bne	.L745
 	mov	w19, -1
-.L729:
+.L742:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5108,15 +5227,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L739:
+.L752:
 	cmp	w2, w3
-	bhi	.L740
+	bhi	.L753
 	ret
-.L740:
+.L753:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L739
+	b	.L752
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5135,15 +5254,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L742
-	cbz	x3, .L743
+	bne	.L755
+	cbz	x3, .L756
 	tst	x3, 3
-	bne	.L744
+	bne	.L757
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L743:
-	cbz	x20, .L741
+.L756:
+	cbz	x20, .L754
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5155,26 +5274,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L741:
+.L754:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L744:
+.L757:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L743
-.L742:
-	cbz	x3, .L747
+	b	.L756
+.L755:
+	cbz	x3, .L760
 	tst	x3, 3
-	bne	.L748
+	bne	.L761
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L747:
-	cbz	x20, .L741
+.L760:
+	cbz	x20, .L754
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5186,13 +5305,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L741
-.L748:
+	b	.L754
+.L761:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L747
+	b	.L760
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5216,14 +5335,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L761
-	cbnz	x4, .L762
+	bne	.L774
+	cbnz	x4, .L775
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L762:
+.L775:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5233,12 +5352,12 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L786
-	adrp	x0, .LANCHOR31
-	adrp	x4, .LANCHOR34
+	cbnz	w20, .L799
+	adrp	x0, .LANCHOR32
+	adrp	x4, .LANCHOR35
 	mov	x1, x0
-	add	x4, x4, :lo12:.LANCHOR34
-	ldr	w2, [x0, #:lo12:.LANCHOR31]
+	add	x4, x4, :lo12:.LANCHOR35
+	ldr	w2, [x0, #:lo12:.LANCHOR32]
 	mov	w0, 128
 	mov	w3, 64
 	cmp	w2, 25
@@ -5246,38 +5365,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L765:
+.L778:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L766
-	adrp	x0, .LANCHOR33
-	ldr	w4, [x1, #:lo12:.LANCHOR31]
+	bne	.L779
+	adrp	x0, .LANCHOR34
+	ldr	w4, [x1, #:lo12:.LANCHOR32]
 	lsr	w24, w24, 2
 	mov	w2, 0
-	ldr	w3, [x0, #:lo12:.LANCHOR33]
+	ldr	w3, [x0, #:lo12:.LANCHOR34]
 	mov	w22, 0
-.L767:
+.L780:
 	cmp	w2, w24
-	bcs	.L763
-	cbnz	w4, .L773
-.L763:
+	bcs	.L776
+	cbnz	w4, .L786
+.L776:
 	str	wzr, [x19, 16]
-.L774:
-	adrp	x0, .LANCHOR33
-	ldr	w0, [x0, #:lo12:.LANCHOR33]
+.L787:
+	adrp	x0, .LANCHOR34
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 5
-	bls	.L760
-	cbnz	w20, .L760
+	bls	.L773
+	cbnz	w20, .L773
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L760
+	bne	.L773
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L760:
+.L773:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5286,7 +5405,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L766:
+.L779:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5299,18 +5418,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L765
-.L773:
+	b	.L778
+.L786:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L789
+	tbnz	x0, 2, .L802
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L789
+	tbnz	x0, 15, .L802
 	cmp	w3, 5
-	bls	.L769
+	bls	.L782
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5323,26 +5442,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L770
+	bls	.L783
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L795:
+.L808:
 	orr	w0, w1, w0, lsl 5
-.L771:
+.L784:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L768:
+.L781:
 	add	w2, w2, 1
-	b	.L767
-.L770:
+	b	.L780
+.L783:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L795
-.L769:
+	b	.L808
+.L782:
 	cmp	w3, 3
-	bls	.L790
+	bls	.L803
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5355,45 +5474,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L772
+	bls	.L785
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L795
-.L772:
+	b	.L808
+.L785:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L795
-.L790:
+	b	.L808
+.L803:
 	mov	w0, 0
-	b	.L771
-.L789:
+	b	.L784
+.L802:
 	mov	w22, -1
-	b	.L768
-.L786:
+	b	.L781
+.L799:
 	mov	w22, 0
-	b	.L763
-.L761:
+	b	.L776
+.L774:
 	cmp	w20, 1
-	bne	.L775
+	bne	.L788
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L776:
+.L789:
 	cmp	w22, w24
-	bcc	.L778
+	bcc	.L791
 	mov	w22, 0
-	b	.L774
-.L778:
+	b	.L787
+.L791:
 	and	w28, w22, 3
-	cbz	x26, .L791
+	cbz	x26, .L804
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L777:
+.L790:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5410,11 +5529,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L776
-.L791:
+	b	.L789
+.L804:
 	mov	x3, 0
-	b	.L777
-.L775:
+	b	.L790
+.L788:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5430,16 +5549,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L779:
+.L792:
 	cmp	w24, w23
-	bls	.L774
+	bls	.L787
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L780
+	bls	.L793
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5447,9 +5566,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L780:
+.L793:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L792
+	tbnz	x0, 2, .L805
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5457,12 +5576,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L781:
+.L794:
 	and	w2, w23, 3
-	cbz	x26, .L793
+	cbz	x26, .L806
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L782:
+.L795:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5470,13 +5589,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L779
-.L792:
+	b	.L792
+.L805:
 	mov	w22, -1
-	b	.L781
-.L793:
+	b	.L794
+.L806:
 	mov	x3, 0
-	b	.L782
+	b	.L795
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5490,11 +5609,11 @@ FlashReadRawPage:
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
 	str	x23, [sp, 48]
-	adrp	x1, .LANCHOR30+9
+	adrp	x1, .LANCHOR31+9
 	mov	x22, x2
 	mov	x23, x3
-	ldrb	w20, [x1, #:lo12:.LANCHOR30+9]
-	bne	.L797
+	ldrb	w20, [x1, #:lo12:.LANCHOR31+9]
+	bne	.L810
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5503,7 +5622,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L797:
+.L810:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5551,12 +5670,12 @@ FlashDdrTunningRead:
 	mov	w26, w4
 	ldr	w0, [x0, 304]
 	str	w0, [x29, 108]
-	adrp	x0, .LANCHOR33
-	ldr	w0, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR34
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L813
+	cbz	w4, .L826
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5575,10 +5694,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L802
-.L811:
+	bne	.L815
+.L824:
 	mov	w21, -1
-.L799:
+.L812:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5587,30 +5706,30 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L802:
+.L815:
 	mov	w1, w25
 	mov	w2, w21
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
 	bl	printf
-	adrp	x1, .LANCHOR141
-	ldr	w0, [x1, #:lo12:.LANCHOR141]
+	adrp	x1, .LANCHOR144
+	ldr	w0, [x1, #:lo12:.LANCHOR144]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L804
-	str	w0, [x1, #:lo12:.LANCHOR141]
-	b	.L799
-.L804:
-	str	wzr, [x1, #:lo12:.LANCHOR141]
+	bhi	.L817
+	str	w0, [x1, #:lo12:.LANCHOR144]
+	b	.L812
+.L817:
+	str	wzr, [x1, #:lo12:.LANCHOR144]
 	mov	x28, 0
 	mov	x23, 0
-.L801:
+.L814:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L809:
+.L822:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5622,65 +5741,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L805
+	bhi	.L818
 	cmp	w0, 2
-	bhi	.L815
+	bhi	.L828
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L815
+	bls	.L828
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L807:
+.L820:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L808:
-	cbz	w20, .L810
+.L821:
+	cbz	w20, .L823
 	mov	w1, w20
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L810:
-	cbz	w27, .L799
-	adrp	x0, .LC12
+.L823:
+	cbz	w27, .L812
+	adrp	x0, .LC11
 	mov	w2, w25
 	mov	w1, w24
-	add	x0, x0, :lo12:.LC12
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-	cbz	w26, .L811
+	cbz	w26, .L824
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L799
-.L813:
+	b	.L812
+.L826:
 	mov	w21, 1024
-	b	.L801
-.L805:
+	b	.L814
+.L818:
 	cmp	w19, w6
-	bls	.L816
+	bls	.L829
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L808
+	bhi	.L821
 	mov	w6, w19
-.L816:
+.L829:
 	mov	w19, 0
-	b	.L806
-.L815:
+	b	.L819
+.L828:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L806:
+.L819:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L809
+	bls	.L822
 	mov	w1, w20
 	mov	w20, w5
-	b	.L807
+	b	.L820
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5701,14 +5820,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L826
+	bne	.L839
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L827
-.L829:
-	adrp	x0, .LANCHOR29
-	ldrb	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L826
+	cbnz	w25, .L840
+.L842:
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L839
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5720,16 +5839,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L830
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	beq	.L843
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w19, w0, lsr 1
-	bls	.L826
-.L830:
+	bls	.L839
+.L843:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L826
-.L827:
+	b	.L839
+.L840:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5738,14 +5857,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L829
+	beq	.L842
 	mov	w19, w0
-.L826:
-	adrp	x24, .LANCHOR142
-	ldr	x4, [x24, #:lo12:.LANCHOR142]
-	cbz	x4, .L825
+.L839:
+	adrp	x24, .LANCHOR145
+	ldr	x4, [x24, #:lo12:.LANCHOR145]
+	cbz	x4, .L838
 	cmn	w19, #1
-	bne	.L825
+	bne	.L838
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5755,17 +5874,17 @@ FlashReadPage:
 	mov	w1, w0
 	mov	w3, w21
 	mov	w2, w20
-	adrp	x0, .LC13
-	add	x0, x0, :lo12:.LC13
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
 	bl	printf
 	cmn	w19, #1
-	bne	.L825
+	bne	.L838
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L825
+	cbz	w0, .L838
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-	ldr	x4, [x24, #:lo12:.LANCHOR142]
+	ldr	x4, [x24, #:lo12:.LANCHOR145]
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5774,7 +5893,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L825:
+.L838:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5810,30 +5929,30 @@ FlashDdrParaScan:
 	mov	x2, 0
 	mov	w0, w20
 	mov	w1, w21
-	adrp	x20, .LANCHOR29
+	adrp	x20, .LANCHOR30
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L846
+	beq	.L859
 	cmn	w22, #1
-	bne	.L847
-.L846:
+	bne	.L860
+.L859:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L847
+	tbz	x0, 0, .L860
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x20, #:lo12:.LANCHOR29]
-.L848:
+	strb	wzr, [x20, #:lo12:.LANCHOR30]
+.L861:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L847:
+.L860:
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR29]
-	b	.L848
+	strb	w0, [x20, #:lo12:.LANCHOR30]
+	b	.L861
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -5844,9 +5963,9 @@ FlashLoadPhyInfo:
 	mov	w0, 60
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR30
+	adrp	x20, .LANCHOR31
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR144
+	adrp	x22, .LANCHOR147
 	strb	w0, [x29, 120]
 	mov	w0, 40
 	strb	w0, [x29, 121]
@@ -5854,116 +5973,116 @@ FlashLoadPhyInfo:
 	strb	w0, [x29, 122]
 	mov	w0, 16
 	strb	w0, [x29, 123]
-	add	x0, x20, :lo12:.LANCHOR30
+	add	x0, x20, :lo12:.LANCHOR31
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR143
-	adrp	x24, .LANCHOR145
+	adrp	x21, .LANCHOR146
+	adrp	x24, .LANCHOR148
 	stp	x25, x26, [sp, 64]
 	ldrh	w0, [x0, 10]
 	adrp	x26, .LANCHOR7
 	str	w0, [x29, 108]
 	mov	w19, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR144]
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
 	mov	w25, 4
-	str	x0, [x21, #:lo12:.LANCHOR143]
+	str	x0, [x21, #:lo12:.LANCHOR146]
 	mov	w23, -1
 	stp	x27, x28, [sp, 80]
 	add	x26, x26, :lo12:.LANCHOR7
-	str	wzr, [x24, #:lo12:.LANCHOR145]
+	str	wzr, [x24, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L857:
+.L870:
 	add	w28, w19, 1
 	mov	x27, 0
-.L859:
+.L872:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w19
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L858
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	bne	.L871
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L858
+	bne	.L871
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L859
-.L860:
+	bne	.L872
+.L873:
 	ldr	w0, [x29, 108]
 	subs	w25, w25, #1
 	add	w19, w19, w0
-	bne	.L857
-	b	.L865
-.L861:
+	bne	.L870
+	b	.L878
+.L874:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L867
-	add	x23, x20, :lo12:.LANCHOR30
+	bne	.L880
+	add	x23, x20, :lo12:.LANCHOR31
 	add	x1, x6, 160
 	mov	w2, 32
 	mov	x0, x23
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR143]
+	ldr	x1, [x21, #:lo12:.LANCHOR146]
 	mov	w2, 32
 	mov	x0, x26
 	add	x1, x1, 192
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR143]
+	ldr	x1, [x21, #:lo12:.LANCHOR146]
 	mov	w2, 852
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x1, x1, 224
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR29
-	str	w19, [x24, #:lo12:.LANCHOR145]
+	ldr	x1, [x21, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR30
+	str	w19, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, 1076]
-	strb	w2, [x0, #:lo12:.LANCHOR29]
+	strb	w2, [x0, #:lo12:.LANCHOR30]
 	ldrh	w0, [x23, 10]
-	adrp	x2, .LANCHOR146
+	adrp	x2, .LANCHOR149
 	udiv	w0, w19, w0
 	add	w3, w0, 1
-	cbz	w0, .L863
-	str	w3, [x2, #:lo12:.LANCHOR146]
-.L864:
-	adrp	x0, .LANCHOR147
+	cbz	w0, .L876
+	str	w3, [x2, #:lo12:.LANCHOR149]
+.L877:
+	adrp	x0, .LANCHOR150
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
-	strb	w1, [x0, #:lo12:.LANCHOR147]
-	b	.L860
-.L863:
+	strb	w1, [x0, #:lo12:.LANCHOR150]
+	b	.L873
+.L876:
 	mov	w0, 2
-	str	w0, [x2, #:lo12:.LANCHOR146]
-	b	.L864
-.L867:
+	str	w0, [x2, #:lo12:.LANCHOR149]
+	b	.L877
+.L880:
 	mov	w23, -1
-	b	.L860
-.L858:
-	ldr	x6, [x21, #:lo12:.LANCHOR143]
+	b	.L873
+.L871:
+	ldr	x6, [x21, #:lo12:.LANCHOR146]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L860
-	cbnz	w23, .L861
-	add	x20, x20, :lo12:.LANCHOR30
+	bne	.L873
+	cbnz	w23, .L874
+	add	x20, x20, :lo12:.LANCHOR31
 	ldrh	w0, [x20, 10]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR146
+	adrp	x0, .LANCHOR149
 	add	w19, w19, 1
-	str	w19, [x0, #:lo12:.LANCHOR146]
-.L865:
+	str	w19, [x0, #:lo12:.LANCHOR149]
+.L878:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6008,34 +6127,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L887
-	adrp	x0, .LANCHOR29
-	ldrb	w0, [x0, #:lo12:.LANCHOR29]
-	cbz	w0, .L888
+	bls	.L900
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbz	w0, .L901
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L872:
+.L885:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L871:
+.L884:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L873:
-	adrp	x0, .LANCHOR148
-	ldrb	w0, [x0, #:lo12:.LANCHOR148]
+.L886:
+	adrp	x0, .LANCHOR151
+	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L882
+	bcc	.L895
 	mov	w28, w24
-.L881:
+.L894:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6043,29 +6162,29 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L883
+	bhi	.L896
 	bl	SandiskSetRRPara
-.L884:
+.L897:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
 	mov	w0, 255
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L885
+	bcc	.L898
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L885:
+.L898:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L870
+	cbz	w23, .L883
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L870:
+.L883:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6074,13 +6193,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L888:
+.L901:
 	mov	w23, 0
-	b	.L872
-.L887:
+	b	.L885
+.L900:
 	mov	w23, 0
-	b	.L871
-.L882:
+	b	.L884
+.L895:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6088,28 +6207,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L874
+	bhi	.L887
 	bl	SandiskSetRRPara
-.L875:
+.L888:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w0, 34
-	bne	.L876
-	adrp	x0, .LANCHOR148
-	ldrb	w0, [x0, #:lo12:.LANCHOR148]
+	bne	.L889
+	adrp	x0, .LANCHOR151
+	ldrb	w0, [x0, #:lo12:.LANCHOR151]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L876
+	bne	.L889
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L876:
+.L889:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L877
+	cbz	w23, .L890
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6120,35 +6239,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L878:
+.L891:
 	cmn	w28, #1
-	beq	.L879
-	adrp	x0, .LANCHOR32
+	beq	.L892
+	adrp	x0, .LANCHOR33
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L881
+	bcc	.L894
 	mov	x26, 0
 	mov	x25, 0
-.L879:
+.L892:
 	add	w20, w20, 1
-	b	.L873
-.L874:
+	b	.L886
+.L887:
 	bl	ToshibaSetRRPara
-	b	.L875
-.L877:
+	b	.L888
+.L890:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L878
-.L883:
+	b	.L891
+.L896:
 	bl	ToshibaSetRRPara
-	b	.L884
+	b	.L897
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6168,38 +6287,38 @@ SamsungReadRetrial:
 	str	x27, [sp, 80]
 	mov	x25, x3
 	bl	NandcWaitFlashReady
-	adrp	x26, .LANCHOR148
+	adrp	x26, .LANCHOR151
 	sbfiz	x1, x22, 4, 32
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x27, .LANCHOR32
+	adrp	x27, .LANCHOR33
 	add	x2, x0, x1
-	add	x26, x26, :lo12:.LANCHOR148
-	add	x27, x27, :lo12:.LANCHOR32
+	add	x26, x26, :lo12:.LANCHOR151
+	add	x27, x27, :lo12:.LANCHOR33
 	mov	w21, 1
 	ldr	x0, [x0, x1]
 	mov	w19, -1
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L899:
+.L912:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L903
-.L902:
+	bcc	.L916
+.L915:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L898
+	bcc	.L911
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L898:
+.L911:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6208,7 +6327,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L903:
+.L916:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6218,141 +6337,171 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L900
+	beq	.L913
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L905
+	bcc	.L918
 	mov	x25, 0
 	mov	x24, 0
-.L900:
+.L913:
 	add	w21, w21, 1
-	b	.L899
-.L905:
+	b	.L912
+.L918:
 	mov	w19, w0
-	b	.L902
+	b	.L915
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
 	.global	MicronReadRetrial
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
-	stp	x29, x30, [sp, -128]!
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w23, w0, 255
-	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	mov	w24, w1
-	ldrb	w20, [x0, #:lo12:.LANCHOR32]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR33
+	stp	x23, x24, [sp, 48]
+	str	w1, [x29, 140]
+	mov	x24, x2
+	ldrb	w19, [x0, #:lo12:.LANCHOR33]
 	adrp	x0, .LANCHOR8
+	stp	x25, x26, [sp, 64]
+	mov	x25, x3
+	ldrb	w1, [x0, #:lo12:.LANCHOR8]
 	stp	x21, x22, [sp, 32]
-	mov	x25, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	mov	x26, x3
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L913
-	add	w20, w20, w20, lsl 1
-	asr	w20, w20, 2
-.L914:
-	mov	w0, w23
-	bl	NandcWaitFlashReady
-	sbfiz	x1, x23, 4, 32
-	adrp	x0, .LANCHOR6
-	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x28, .LANCHOR148
-	add	x2, x0, x1
-	add	x28, x28, :lo12:.LANCHOR148
-	mov	w27, 0
-	mov	w19, -1
-	ldr	x4, [x0, x1]
-	mov	w6, 239
-	ldrb	w21, [x2, 8]
-	mov	w7, 137
-	add	x22, x4, x21, lsl 8
-.L915:
-	ldrb	w0, [x28]
-	cmp	w27, w0
-	bcc	.L919
-.L918:
-	add	x21, x4, x21, lsl 8
+	str	x0, [x29, 128]
+	cbnz	w1, .L926
+	add	w19, w19, w19, lsl 1
+	asr	w19, w19, 2
+.L927:
+	adrp	x21, .LANCHOR6
+	add	x21, x21, :lo12:.LANCHOR6
+	add	x21, x21, x20, sxtw 4
+	mov	w23, 0
+	mov	w28, 137
+.L937:
+	mov	w0, w20
+	bl	NandcWaitFlashReady
+	ldrb	w4, [x21, 8]
+	adrp	x7, .LANCHOR151
+	ldr	x8, [x21]
+	add	x7, x7, :lo12:.LANCHOR151
+	mov	w22, 0
+	mov	w26, -1
+	add	x27, x8, x4, lsl 8
+.L928:
+	ldrb	w0, [x7]
+	cmp	w22, w0
+	bcc	.L932
+.L931:
+	add	x4, x8, x4, lsl 8
 	mov	w0, 239
-	str	w0, [x21, 2056]
-	mov	w0, 137
-	str	w0, [x21, 2052]
+	str	x4, [x29, 120]
+	str	w0, [x4, 2056]
 	mov	x0, 200
+	str	w28, [x4, 2052]
 	bl	udelay
-	str	wzr, [x21, 2048]
-	str	wzr, [x21, 2048]
-	cmp	w19, w20
-	str	wzr, [x21, 2048]
-	str	wzr, [x21, 2048]
-	bcc	.L920
-	cmn	w19, #1
+	ldr	x4, [x29, 120]
+	cmp	w26, w19
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	str	wzr, [x4, 2048]
+	bcc	.L933
+	cmn	w26, #1
 	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L920:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L912
-	adrp	x0, .LC14
-	mov	w4, w19
-	mov	w3, w27
-	mov	w2, w24
-	mov	w1, w27
-	add	x0, x0, :lo12:.LC14
+	csel	w26, w26, w0, eq
+.L933:
+	cmp	w26, 256
+	ccmn	w26, #1, 4, ne
+	bne	.L934
+	ldr	w2, [x29, 140]
+	adrp	x0, .LC13
+	mov	w4, w26
+	mov	w3, w22
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L912:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L913:
+	cbnz	w23, .L935
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L925
+	cmn	w26, #1
+	bne	.L925
+	mov	w1, 3
+	mov	w0, w20
+	mov	w23, 1
+	bl	micron_auto_read_calibration_config
+	b	.L937
+.L926:
 	mov	w0, 3
-	sdiv	w20, w20, w0
-	b	.L914
-.L919:
-	str	w6, [x22, 2056]
+	sdiv	w19, w19, w0
+	b	.L927
+.L932:
+	mov	w0, 239
+	str	w0, [x27, 2056]
+	str	w28, [x27, 2052]
 	mov	x0, 200
-	str	w7, [x22, 2052]
-	str	x4, [x29, 104]
-	stp	w6, w7, [x29, 116]
+	stp	x4, x7, [x29, 96]
+	str	x8, [x29, 112]
 	bl	udelay
-	add	w5, w27, 1
-	str	w5, [x22, 2048]
-	str	wzr, [x22, 2048]
-	mov	x3, x26
-	str	wzr, [x22, 2048]
-	mov	x2, x25
-	str	wzr, [x22, 2048]
-	mov	w1, w24
-	str	w5, [x29, 124]
-	mov	w0, w23
+	add	w10, w22, 1
+	str	w10, [x27, 2048]
+	str	wzr, [x27, 2048]
+	mov	x3, x25
+	ldr	w1, [x29, 140]
+	mov	x2, x24
+	str	wzr, [x27, 2048]
+	mov	w0, w20
+	str	wzr, [x27, 2048]
+	str	w10, [x29, 120]
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	ldp	w6, w7, [x29, 116]
-	ldr	w5, [x29, 124]
-	ldr	x4, [x29, 104]
-	beq	.L916
-	cmn	w19, #1
-	csel	w19, w19, w0, ne
-	cmp	w0, w20
-	bcc	.L922
-	mov	x26, 0
+	ldr	w10, [x29, 120]
+	ldp	x4, x7, [x29, 96]
+	ldr	x8, [x29, 112]
+	beq	.L929
+	cmn	w26, #1
+	csel	w26, w26, w0, ne
+	cmp	w0, w19
+	bcc	.L939
 	mov	x25, 0
-.L916:
-	mov	w27, w5
-	b	.L915
-.L922:
-	mov	w19, w0
-	b	.L918
+	mov	x24, 0
+.L929:
+	mov	w22, w10
+	b	.L928
+.L939:
+	mov	w26, w0
+	mov	x25, 0
+	mov	x24, 0
+	b	.L931
+.L935:
+	mov	w0, w20
+	mov	w1, 0
+	bl	micron_auto_read_calibration_config
+	cmn	w26, #1
+	mov	w0, 256
+	csel	w26, w26, w0, eq
+.L925:
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L934:
+	cbz	w23, .L925
+	mov	w1, 0
+	mov	w0, w20
+	mov	w26, 256
+	bl	micron_auto_read_calibration_config
+	b	.L925
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6380,38 +6529,38 @@ HynixReadRetrial:
 	ldrb	w20, [x0, 12]
 	ldrb	w1, [x1, 19]
 	cmp	w1, 7
-	bne	.L933
+	bne	.L951
 	ldrb	w20, [x0, 20]
-.L933:
+.L951:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
-	adrp	x5, .LANCHOR32
+	adrp	x5, .LANCHOR33
 	add	x7, x6, 4
-	add	x5, x5, :lo12:.LANCHOR32
+	add	x5, x5, :lo12:.LANCHOR33
 	mov	w4, 0
 	mov	w21, -1
-.L934:
+.L952:
 	cmp	w4, w24
-	bcc	.L939
-.L938:
+	bcc	.L957
+.L956:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
 	cmp	w0, 7
-	bne	.L940
+	bne	.L958
 	strb	w20, [x19, 20]
-.L941:
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+.L959:
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w21, w0, lsr 2
-	bcc	.L932
+	bcc	.L950
 	cmn	w21, #1
 	mov	w0, 256
 	csel	w21, w21, w0, eq
-.L932:
+.L950:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6420,7 +6569,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L939:
+.L957:
 	add	w20, w20, 1
 	ldrb	w1, [x6, 1]
 	and	w20, w20, 255
@@ -6442,24 +6591,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L936
+	beq	.L954
 	ldrb	w1, [x5]
 	cmn	w21, #1
 	csel	w21, w21, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L943
+	bcc	.L961
 	mov	x27, 0
 	mov	x26, 0
-.L936:
+.L954:
 	add	w4, w4, 1
-	b	.L934
-.L943:
+	b	.L952
+.L961:
 	mov	w21, w0
-	b	.L938
-.L940:
+	b	.L956
+.L958:
 	strb	w20, [x19, 12]
-	b	.L941
+	b	.L959
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6471,25 +6620,25 @@ FlashProgPage:
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x1, .LANCHOR30+9
+	adrp	x1, .LANCHOR31+9
 	str	x23, [sp, 48]
 	mov	x22, x2
-	ldrb	w21, [x1, #:lo12:.LANCHOR30+9]
+	ldrb	w21, [x1, #:lo12:.LANCHOR31+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L951
+	bne	.L969
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L951
+	bls	.L969
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L952
+	cbnz	w0, .L970
 	sub	w21, w21, #2
-.L951:
+.L969:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6520,9 +6669,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L952:
+.L970:
 	mov	w21, 4
-	b	.L951
+	b	.L969
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6532,30 +6681,30 @@ FlashSavePhyInfo:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR144
+	adrp	x22, .LANCHOR147
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR143
-	ldr	x0, [x22, #:lo12:.LANCHOR144]
+	adrp	x19, .LANCHOR146
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
 	adrp	x21, .LANCHOR3
-	str	x0, [x19, #:lo12:.LANCHOR143]
+	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w20, 0
-	adrp	x0, .LANCHOR149
+	adrp	x0, .LANCHOR152
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	mov	w25, 20036
-	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
 	movk	w25, 0x4e41, lsl 16
-	adrp	x24, .LANCHOR150
-	adrp	x26, .LANCHOR146
+	adrp	x24, .LANCHOR153
+	adrp	x26, .LANCHOR149
 	mov	w23, 0
 	add	x21, x21, :lo12:.LANCHOR3
-	add	x26, x26, :lo12:.LANCHOR146
+	add	x26, x26, :lo12:.LANCHOR149
 	bl	FlashBchSel
-	ldr	x0, [x22, #:lo12:.LANCHOR144]
+	ldr	x0, [x22, #:lo12:.LANCHOR147]
 	mov	w2, 2048
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	adrp	x1, .LANCHOR25
 	mov	w2, 32
 	add	x0, x0, 16
@@ -6565,54 +6714,54 @@ FlashSavePhyInfo:
 	adrp	x1, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR2]
 	strh	w1, [x0, -2]
-	adrp	x1, .LANCHOR29
-	ldrb	w1, [x1, #:lo12:.LANCHOR29]
+	adrp	x1, .LANCHOR30
+	ldrb	w1, [x1, #:lo12:.LANCHOR30]
 	str	w1, [x0, 1060]
 	adrp	x1, .LANCHOR22
 	add	x1, x1, :lo12:.LANCHOR22
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 8
 	adrp	x1, .LANCHOR26
 	add	x1, x1, :lo12:.LANCHOR26
 	add	x0, x0, 80
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 32
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
 	add	x0, x0, 96
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 32
-	adrp	x1, .LANCHOR30
-	add	x1, x1, :lo12:.LANCHOR30
+	adrp	x1, .LANCHOR31
+	add	x1, x1, :lo12:.LANCHOR31
 	add	x0, x0, 160
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 32
 	adrp	x1, .LANCHOR7
 	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x0, 192
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w2, 852
 	adrp	x1, .LANCHOR20
 	add	x1, x1, :lo12:.LANCHOR20
 	add	x0, x0, 224
 	bl	ftl_memcpy
-	ldr	x6, [x19, #:lo12:.LANCHOR143]
+	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	str	w0, [x6, 8]
 	mov	w0, 1592
 	str	w0, [x6, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR150]
-	str	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	x0, [x24, #:lo12:.LANCHOR153]
+	str	x0, [x19, #:lo12:.LANCHOR146]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L957:
+.L975:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6620,49 +6769,49 @@ FlashSavePhyInfo:
 	bl	FlashEraseBlock
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR144]
+	ldr	x2, [x22, #:lo12:.LANCHOR147]
 	mov	w0, 0
 	mul	w1, w20, w1
 	add	w1, w1, 1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x24, #:lo12:.LANCHOR150]
+	ldr	x2, [x24, #:lo12:.LANCHOR153]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L955
-	ldr	x6, [x19, #:lo12:.LANCHOR143]
+	beq	.L973
+	ldr	x6, [x19, #:lo12:.LANCHOR146]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L955
+	bne	.L973
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L955
+	bne	.L973
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
-	adrp	x0, .LANCHOR145
-	str	w20, [x0, #:lo12:.LANCHOR145]
-	beq	.L958
+	adrp	x0, .LANCHOR148
+	str	w20, [x0, #:lo12:.LANCHOR148]
+	beq	.L976
 	mov	w23, 1
-.L955:
+.L973:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L957
-.L956:
+	bne	.L975
+.L974:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6673,9 +6822,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L958:
+.L976:
 	mov	w23, 2
-	b	.L956
+	b	.L974
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6697,19 +6846,19 @@ FlashReadIdbDataRaw:
 	strb	w0, [x29, 138]
 	mov	w0, 16
 	strb	w0, [x29, 139]
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR33
 	stp	x19, x20, [sp, 16]
-	ldrb	w26, [x0, #:lo12:.LANCHOR32]
-	adrp	x0, .LANCHOR151
+	ldrb	w26, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR29
 	stp	x21, x22, [sp, 32]
-	ldr	w2, [x0, #:lo12:.LANCHOR151]
+	ldr	w2, [x0, #:lo12:.LANCHOR29]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
 	cmp	w2, w1
-	bne	.L965
+	bne	.L983
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L965:
+.L983:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6721,22 +6870,22 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L966:
+.L984:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L971
-.L970:
+	bcc	.L989
+.L988:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
-	ldr	w1, [x0, #:lo12:.LANCHOR151]
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L964
+	bne	.L982
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L964:
+.L982:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6745,45 +6894,45 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L971:
+.L989:
 	mov	x4, 0
-	adrp	x25, .LANCHOR144
-.L968:
+	adrp	x25, .LANCHOR147
+.L986:
 	ldrb	w5, [x4, x27]
-	add	x21, x25, :lo12:.LANCHOR144
+	add	x21, x25, :lo12:.LANCHOR147
 	str	w5, [x29, 116]
 	mov	w0, w5
 	str	x4, [x29, 104]
 	bl	FlashBchSel
 	ldr	w1, [x22]
 	mov	x3, 0
-	ldr	x2, [x25, #:lo12:.LANCHOR144]
+	ldr	x2, [x25, #:lo12:.LANCHOR147]
 	mov	w0, 0
 	mul	w1, w19, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L967
+	bne	.L985
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L968
-.L969:
+	bne	.L986
+.L987:
 	add	w19, w19, 1
-	b	.L966
-.L974:
+	b	.L984
+.L992:
 	mov	w20, 0
-	b	.L970
-.L967:
+	b	.L988
+.L985:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L969
+	bne	.L987
 	mov	w1, w5
-	adrp	x0, .LC15
-	add	x0, x0, :lo12:.LC15
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
 	bl	printf
 	ldr	x1, [x21]
 	mov	w2, 2048
@@ -6792,14 +6941,14 @@ FlashReadIdbDataRaw:
 	ldr	x0, [x21]
 	ldr	w0, [x0, 512]
 	strb	w0, [x28]
-	adrp	x0, .LANCHOR146
-	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR149
+	ldr	w1, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w1
-	bcs	.L974
-	str	w19, [x0, #:lo12:.LANCHOR146]
+	bcs	.L992
+	str	w19, [x0, #:lo12:.LANCHOR149]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L969
+	b	.L987
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -6820,179 +6969,528 @@ FlashPageProgMsbFFData:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x0, 19]
-	cbz	w3, .L978
-	adrp	x2, .LANCHOR151
-	ldr	w3, [x2, #:lo12:.LANCHOR151]
+	cbz	w3, .L996
+	adrp	x2, .LANCHOR29
+	ldr	w3, [x2, #:lo12:.LANCHOR29]
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	cmp	w3, w2
-	beq	.L977
-.L978:
+	beq	.L995
+.L996:
 	sub	w0, w0, #5
 	and	w0, w0, 255
 	cmp	w0, 63
-	bhi	.L977
+	bhi	.L995
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x0
-	tbz	x0, 0, .L977
-	adrp	x20, .LANCHOR117
+	tbz	x0, 0, .L995
+	adrp	x20, .LANCHOR120
 	mov	w24, w1
-	add	x20, x20, :lo12:.LANCHOR117
+	add	x20, x20, :lo12:.LANCHOR120
 	mov	w23, 65535
-	adrp	x25, .LANCHOR150
-.L980:
+	adrp	x25, .LANCHOR153
+.L998:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L981
-.L977:
+	bhi	.L999
+.L995:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L981:
+.L999:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w23
-	bne	.L977
-	ldr	x0, [x25, #:lo12:.LANCHOR150]
+	bne	.L995
+	ldr	x0, [x25, #:lo12:.LANCHOR153]
 	mov	w2, 32768
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x2, [x25, #:lo12:.LANCHOR150]
+	ldr	x2, [x25, #:lo12:.LANCHOR153]
 	add	w1, w19, w24
 	add	w19, w19, 1
 	mov	x3, 0
 	mov	w0, w21
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L980
+	b	.L998
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.ftl_memcmp,"ax",@progbits
-	.align	2
-	.global	ftl_memcmp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	uxtw	x2, w2
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",@progbits
-	.align	2
-	.global	rknand_get_clk_rate
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	mov	w0, 19712
-	movk	w0, 0x8d2, lsl 16
-	ret
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",@progbits
-	.align	2
-	.global	ftl_malloc
-	.type	ftl_malloc, %function
-ftl_malloc:
-	mov	w1, 0
-	sxtw	x0, w0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.NandcInit,"ax",@progbits
+	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
-	.global	NandcInit
-	.type	NandcInit, %function
-NandcInit:
-	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR6
-	add	x1, x2, :lo12:.LANCHOR6
-	adrp	x4, .LANCHOR151
+	.global	idb_write_data
+	.type	idb_write_data, %function
+idb_write_data:
+	stp	x29, x30, [sp, -240]!
+	add	w0, w1, w3
+	mov	w4, w1
+	cmp	w0, 63
 	add	x29, sp, 0
-	str	x0, [x2, #:lo12:.LANCHOR6]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bls	.L1005
+	cmp	w1, 575
+	bhi	.L1006
+	adrp	x0, .LANCHOR154
+	mov	x1, x2
 	mov	w2, 1
-	str	w2, [x1, 24]
-	mov	w2, 2
-	str	wzr, [x1, 8]
-	str	w2, [x1, 40]
-	mov	w2, 3
-	str	x0, [x1, 16]
-	str	w2, [x1, 56]
-	adrp	x2, .LANCHOR152
-	str	x0, [x1, 32]
-	str	x0, [x1, 48]
-	adrp	x1, .LANCHOR19
-	str	x0, [x1, #:lo12:.LANCHOR19]
-	ldr	w1, [x0]
-	ubfx	x3, x1, 13, 1
-	str	w3, [x2, #:lo12:.LANCHOR152]
-	ldr	w2, [x0, 352]
-	adrp	x3, .LANCHOR33
-	and	w1, w1, 245760
-	orr	w1, w1, 256
-	ubfx	x2, x2, 16, 4
-	str	w2, [x3, #:lo12:.LANCHOR33]
-	ldr	w2, [x0, 352]
-	str	w2, [x4, #:lo12:.LANCHOR151]
-	cmp	w2, 2049
-	bne	.L990
-	mov	w2, 8
-	str	w2, [x3, #:lo12:.LANCHOR33]
-.L990:
-	str	w1, [x0]
-	mov	w1, 4225
-	str	wzr, [x0, 336]
-	str	w1, [x0, 4]
-	mov	w1, 8322
-	str	w1, [x0, 344]
-	mov	w1, 6657
-	movk	w1, 0x1a, lsl 16
-	str	w1, [x0, 304]
-	mov	w0, 36864
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR153
-	adrp	x2, .LANCHOR34
-	str	x0, [x1, #:lo12:.LANCHOR153]
-	add	x1, x2, :lo12:.LANCHOR34
-	str	x0, [x2, #:lo12:.LANCHOR34]
-	add	x0, x0, 32768
-	str	wzr, [x1, 40]
-	str	x0, [x1, 8]
-	adrp	x0, .LANCHOR35
-	ldp	x29, x30, [sp], 16
-	str	wzr, [x0, #:lo12:.LANCHOR35]
+	cmp	w4, 64
+	str	w2, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, idb_buf
+	bhi	.L1007
+	mov	w2, 64
+	sub	w4, w2, w4
+	sub	w2, w3, w4
+	ubfiz	x4, x4, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x1, x4
+	add	x0, x0, :lo12:idb_buf
+.L1057:
+	bl	ftl_memcpy
+.L1040:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
 	ret
-	.size	NandcInit, .-NandcInit
-	.section	.text.FtlMemInit,"ax",@progbits
-	.align	2
-	.global	FtlMemInit
-	.type	FtlMemInit, %function
-FtlMemInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR136
-	mov	w1, 65535
-	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR136]
+.L1007:
+	mov	w2, 576
+	sub	w2, w2, w4
+	cmp	w3, w2
+	sub	w4, w4, #64
+	csel	w2, w3, w2, ls
+	ubfiz	x4, x4, 9, 25
+	add	x0, x0, :lo12:idb_buf
+	lsl	w2, w2, 9
+	add	x0, x0, x4
+	b	.L1057
+.L1005:
+	cmp	w1, 575
+	bls	.L1040
+.L1006:
 	adrp	x0, .LANCHOR154
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR54
-	str	wzr, [x0, #:lo12:.LANCHOR154]
-	adrp	x0, .LANCHOR155
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR37
-	str	wzr, [x0, #:lo12:.LANCHOR155]
-	adrp	x0, .LANCHOR156
-	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR57
-	str	wzr, [x0, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR157
-	adrp	x23, .LANCHOR58
-	str	wzr, [x0, #:lo12:.LANCHOR157]
-	adrp	x0, .LANCHOR158
-	str	wzr, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR159
-	str	wzr, [x0, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR160
-	str	wzr, [x0, #:lo12:.LANCHOR160]
-	adrp	x0, .LANCHOR161
+	str	x0, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR154]
+	cbz	w1, .L1040
+	adrp	x21, .LANCHOR18
+	adrp	x1, idb_buf+262140
+	adrp	x25, idb_buf
+	add	x1, x1, :lo12:idb_buf+262140
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	add	x5, x25, :lo12:idb_buf
+	mov	w2, 65535
+	mov	w3, 4097
+	ldrb	w20, [x0, 9]
+	ldrh	w0, [x0, 10]
+	mul	w20, w20, w0
+	and	w20, w20, 65535
+	add	w0, w20, 511
+	udiv	w0, w0, w20
+	str	w0, [x29, 172]
+	mov	w0, 0
+.L1011:
+	ldr	w4, [x1]
+	cbnz	w4, .L1009
+	ldr	w4, [x5, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w4, [x1], -4
+	cmp	w0, w3
+	sub	w2, w2, #1
+	csel	w0, w0, wzr, cc
+	cmp	w2, 4096
+	bne	.L1011
+.L1009:
+	add	x0, x25, :lo12:idb_buf
+	mov	w3, 512
+	mov	w23, 0
+	ldr	w1, [x0, w2, uxtw 2]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+	adrp	x0, .LANCHOR149
+	ldr	w24, [x0, #:lo12:.LANCHOR149]
+	ldr	w0, [x29, 172]
+	mul	w19, w20, w24
+	mul	w0, w20, w0
+	str	w0, [x29, 120]
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	str	x0, [x29, 160]
+.L1012:
+	cmp	w24, 15
+	bls	.L1030
+	cbnz	w23, .L1032
+	adrp	x0, .LC17
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.L1032:
+	ldr	x0, [x29, 112]
+	str	wzr, [x0, #:lo12:.LANCHOR154]
+	b	.L1040
+.L1030:
+	adrp	x27, gp_flash_check_buf
+	mov	x2, 512
+	mov	w1, 0
+	add	x0, x27, :lo12:gp_flash_check_buf
+	bl	memset
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldrb	w22, [x0, 9]
+	ldrh	w26, [x0, 10]
+	mov	w0, w19
+	bl	FW_FlashBlockErase.constprop.41
+	str	x27, [x29, 136]
+	mul	w26, w22, w26
+	and	w26, w26, 65535
+	cmp	w26, 511
+	bhi	.L1013
+	add	w0, w26, w19
+	bl	FW_FlashBlockErase.constprop.41
+.L1013:
+	udiv	w4, w19, w26
+	adrp	x5, .LANCHOR8
+	add	x5, x5, :lo12:.LANCHOR8
+	mov	x28, 0
+	msub	w4, w4, w26, w19
+	sub	w26, w19, w4
+.L1014:
+	add	x6, x25, :lo12:idb_buf
+	cmp	x28, 128
+	add	x6, x6, x28, lsl 11
+	bne	.L1018
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	mov	w26, 0
+	ldr	x1, [x29, 136]
+	add	x27, x1, :lo12:gp_flash_check_buf
+	adrp	x1, .LANCHOR8
+	ldrb	w28, [x0, 9]
+	add	x1, x1, :lo12:.LANCHOR8
+	ldrh	w22, [x0, 10]
+	str	x1, [x29, 104]
+	mul	w22, w28, w22
+	and	w0, w22, 65535
+	udiv	w22, w19, w0
+	msub	w22, w22, w0, w19
+	sub	w0, w19, w22
+	str	w0, [x29, 128]
+	mul	w0, w22, w28
+	ubfx	x0, x0, 2, 2
+.L1019:
+	cmp	w26, 511
+	bhi	.L1026
+	ldr	x3, [x29, 104]
+	mov	w1, 4
+	sub	w1, w1, w0
+	add	w2, w22, w26
+	and	w1, w1, 65535
+	str	w1, [x29, 144]
+	ldr	x1, [x29, 160]
+	lsr	w2, w2, 2
+	ldrb	w3, [x3]
+	ldrh	w1, [x1, w2, sxtw 1]
+	cbz	w3, .L1020
+	adrp	x3, .LANCHOR29
+	mov	w4, 12336
+	movk	w4, 0x5638, lsl 16
+	ldr	w3, [x3, #:lo12:.LANCHOR29]
+	cmp	w3, w4
+	csel	w1, w1, w2, ne
+.L1020:
+	ldr	w2, [x29, 128]
+	add	w0, w0, w2
+	madd	w3, w28, w1, w0
+	adrp	x0, .LANCHOR33
+	adrp	x1, .LANCHOR3
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
+	str	w0, [x29, 124]
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	ldrb	w4, [x0, 9]
+	adrp	x0, .LANCHOR15+26
+	ldrh	w0, [x0, #:lo12:.LANCHOR15+26]
+	mul	w0, w0, w1
+	mul	w0, w0, w4
+	cmp	w3, w0
+	bcs	.L1021
+	adrp	x0, .LANCHOR152
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	bl	FlashBchSel
+.L1021:
+	mov	w0, 0
+	bl	flash_boot_enter_slc_mode
+	udiv	w1, w3, w4
+	add	x3, x29, 176
+	mov	x2, x27
+	mov	w0, 0
+	str	w1, [x29, 168]
+	bl	FlashReadPage
+	mov	w3, w0
+	cmn	w0, #1
+	bne	.L1022
+	adrp	x0, .LANCHOR152
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	cmp	w0, 40
+	beq	.L1022
+	mov	w0, 40
+	bl	FlashBchSel
+	ldr	w1, [x29, 168]
+	add	x3, x29, 176
+	mov	x2, x27
+	mov	w0, 0
+	bl	FlashReadPage
+	mov	w3, w0
+.L1022:
+	mov	w0, 0
+	bl	flash_boot_exit_slc_mode
+	ldrb	w0, [x29, 124]
+	bl	FlashBchSel
+	cmn	w3, #1
+	bne	.L1023
+.L1026:
+	ldr	x0, [x29, 136]
+	add	x1, x25, :lo12:idb_buf
+	mov	x22, 0
+	add	x26, x0, :lo12:gp_flash_check_buf
+.L1024:
+	lsl	x0, x22, 2
+	mov	w27, w22
+	add	x28, x0, x1
+	ldr	w2, [x0, x26]
+	ldr	w0, [x0, x1]
+	cmp	w2, w0
+	beq	.L1027
+	mov	x2, 512
+	mov	w1, 0
+	mov	x0, x26
+	bl	memset
+	ldr	w2, [x26, w27, uxtw 2]
+	mov	w4, w22
+	ldr	w3, [x28]
+	mov	w1, w19
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+	mov	w0, w19
+	bl	FW_FlashBlockErase.constprop.41
+	ldr	w0, [x29, 172]
+	cmp	w0, 1
+	bls	.L1028
+	add	w0, w20, w19
+	bl	FW_FlashBlockErase.constprop.41
+.L1028:
+	ldr	w0, [x29, 172]
+	add	w24, w24, w0
+	ldr	w0, [x29, 120]
+	add	w19, w19, w0
+	b	.L1012
+.L1018:
+	add	w1, w4, w28, lsl 2
+	lsr	w1, w1, 2
+	cbz	w1, .L1015
+	ldr	x0, [x29, 160]
+	add	w2, w1, 1
+	ldrb	w3, [x5]
+	ldrh	w0, [x0, w2, sxtw 1]
+	cbz	w3, .L1016
+	adrp	x3, .LANCHOR29
+	mov	w7, 12336
+	movk	w7, 0x5638, lsl 16
+	ldr	w3, [x3, #:lo12:.LANCHOR29]
+	cmp	w3, w7
+	csel	w0, w0, w2, ne
+.L1016:
+	lsl	w0, w0, 2
+	sub	w0, w0, #4
+	str	w0, [x29, 176]
+.L1015:
+	mov	w0, 61424
+	str	w0, [x29, 180]
+	ldr	x0, [x29, 160]
+	ldrh	w27, [x0, w1, sxtw 1]
+	ldrb	w0, [x5]
+	cbz	w0, .L1017
+	adrp	x0, .LANCHOR29
+	mov	w2, 12336
+	movk	w2, 0x5638, lsl 16
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cmp	w0, w2
+	csel	w27, w27, w1, ne
+.L1017:
+	adrp	x0, .LANCHOR33
+	madd	w8, w22, w27, w26
+	str	x5, [x29, 128]
+	add	x28, x28, 1
+	ldrb	w7, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LANCHOR152
+	str	w4, [x29, 168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR152]
+	str	w7, [x29, 144]
+	bl	FlashBchSel
+	mov	w0, 0
+	bl	flash_boot_enter_slc_mode
+	ldr	x0, [x21, #:lo12:.LANCHOR18]
+	mov	x2, x6
+	add	x3, x29, 176
+	ldrb	w1, [x0, 9]
+	mov	w0, 0
+	udiv	w1, w8, w1
+	bl	FlashProgPage
+	mov	w0, 0
+	bl	flash_boot_exit_slc_mode
+	ldr	w7, [x29, 144]
+	mov	w0, w7
+	bl	FlashBchSel
+	udiv	w1, w26, w22
+	add	w2, w27, 1
+	mov	w0, 0
+	bl	FlashPageProgMsbFFData
+	ldr	w4, [x29, 168]
+	ldr	x5, [x29, 128]
+	b	.L1014
+.L1023:
+	ldr	x0, [x29, 144]
+	ubfiz	x0, x0, 9, 16
+	add	x27, x27, x0
+	ldr	w0, [x29, 144]
+	add	w26, w0, w26
+	mov	w0, 0
+	and	w26, w26, 65535
+	b	.L1019
+.L1027:
+	add	x22, x22, 1
+	cmp	x22, 65536
+	bne	.L1024
+	add	w23, w23, 1
+	cmp	w23, 5
+	bls	.L1028
+	b	.L1032
+	.size	idb_write_data, .-idb_write_data
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",@progbits
+	.align	2
+	.global	NandcInit
+	.type	NandcInit, %function
+NandcInit:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR6
+	add	x1, x2, :lo12:.LANCHOR6
+	adrp	x4, .LANCHOR29
+	add	x29, sp, 0
+	str	x0, [x2, #:lo12:.LANCHOR6]
+	mov	w2, 1
+	str	w2, [x1, 24]
+	mov	w2, 2
+	str	wzr, [x1, 8]
+	str	w2, [x1, 40]
+	mov	w2, 3
+	str	x0, [x1, 16]
+	str	w2, [x1, 56]
+	adrp	x2, .LANCHOR155
+	str	x0, [x1, 32]
+	str	x0, [x1, 48]
+	adrp	x1, .LANCHOR19
+	str	x0, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x0]
+	ubfx	x3, x1, 13, 1
+	str	w3, [x2, #:lo12:.LANCHOR155]
+	ldr	w2, [x0, 352]
+	adrp	x3, .LANCHOR34
+	and	w1, w1, 245760
+	orr	w1, w1, 256
+	ubfx	x2, x2, 16, 4
+	str	w2, [x3, #:lo12:.LANCHOR34]
+	ldr	w2, [x0, 352]
+	str	w2, [x4, #:lo12:.LANCHOR29]
+	cmp	w2, 2049
+	bne	.L1062
+	mov	w2, 8
+	str	w2, [x3, #:lo12:.LANCHOR34]
+.L1062:
+	str	w1, [x0]
+	mov	w1, 4225
+	str	wzr, [x0, 336]
+	str	w1, [x0, 4]
+	mov	w1, 8322
+	str	w1, [x0, 344]
+	mov	w1, 6657
+	movk	w1, 0x1a, lsl 16
+	str	w1, [x0, 304]
+	mov	w0, 36864
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR156
+	adrp	x2, .LANCHOR35
+	str	x0, [x1, #:lo12:.LANCHOR156]
+	add	x1, x2, :lo12:.LANCHOR35
+	str	x0, [x2, #:lo12:.LANCHOR35]
+	add	x0, x0, 32768
+	str	wzr, [x1, 40]
+	str	x0, [x1, 8]
+	adrp	x0, .LANCHOR36
+	ldp	x29, x30, [sp], 16
+	str	wzr, [x0, #:lo12:.LANCHOR36]
+	ret
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",@progbits
+	.align	2
+	.global	FtlMemInit
+	.type	FtlMemInit, %function
+FtlMemInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR139
+	mov	w1, 65535
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR157
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR55
+	str	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR158
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR38
+	str	wzr, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR159
+	str	x23, [sp, 48]
+	adrp	x21, .LANCHOR58
+	str	wzr, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	adrp	x23, .LANCHOR59
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR161
 	str	wzr, [x0, #:lo12:.LANCHOR161]
 	adrp	x0, .LANCHOR162
 	str	wzr, [x0, #:lo12:.LANCHOR162]
@@ -7002,283 +7500,293 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR164]
 	adrp	x0, .LANCHOR165
 	str	wzr, [x0, #:lo12:.LANCHOR165]
-	adrp	x0, .LANCHOR79
-	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR166
 	str	wzr, [x0, #:lo12:.LANCHOR166]
 	adrp	x0, .LANCHOR167
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR168
 	str	wzr, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR80
+	str	wzr, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR169
 	str	wzr, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR170
-	str	w1, [x0, #:lo12:.LANCHOR170]
+	str	wzr, [x0, #:lo12:.LANCHOR170]
 	adrp	x0, .LANCHOR171
-	adrp	x1, .LANCHOR112
 	str	wzr, [x0, #:lo12:.LANCHOR171]
 	adrp	x0, .LANCHOR172
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-	adrp	x0, .LANCHOR73
-	str	wzr, [x0, #:lo12:.LANCHOR73]
-	mov	w0, -1
-	strh	w0, [x1, #:lo12:.LANCHOR112]
-	adrp	x1, .LANCHOR113
-	strh	w0, [x1, #:lo12:.LANCHOR113]
 	adrp	x0, .LANCHOR173
-	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR173]
+	str	w1, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR174
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR174]
+	adrp	x1, .LANCHOR113
+	str	wzr, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR175
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR114
-	strh	wzr, [x0, #:lo12:.LANCHOR114]
+	str	wzr, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LANCHOR74
+	str	wzr, [x0, #:lo12:.LANCHOR74]
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR113]
+	adrp	x1, .LANCHOR114
+	strh	w0, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR115
+	strh	w0, [x1, #:lo12:.LANCHOR115]
+	adrp	x1, .LANCHOR116
+	strh	w0, [x1, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR176
-	strh	wzr, [x0, #:lo12:.LANCHOR176]
-	adrp	x0, .LANCHOR116
-	strh	wzr, [x0, #:lo12:.LANCHOR116]
-	ldrh	w0, [x19, #:lo12:.LANCHOR54]
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR177
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR178
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR117
+	strh	wzr, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR179
+	strh	wzr, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR119
+	strh	wzr, [x0, #:lo12:.LANCHOR119]
+	ldrh	w0, [x19, #:lo12:.LANCHOR55]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR109
-	str	x0, [x1, #:lo12:.LANCHOR109]
+	adrp	x1, .LANCHOR110
+	str	x0, [x1, #:lo12:.LANCHOR110]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR54]
+	ldrh	w1, [x19, #:lo12:.LANCHOR55]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x22, #:lo12:.LANCHOR37]
-	adrp	x1, .LANCHOR111
-	str	x0, [x1, #:lo12:.LANCHOR111]
+	ldrh	w19, [x22, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR112
+	str	x0, [x1, #:lo12:.LANCHOR112]
 	mov	w0, 56
 	mul	w19, w19, w0
 	lsl	w20, w19, 2
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR177
-	str	x0, [x1, #:lo12:.LANCHOR177]
+	adrp	x1, .LANCHOR180
+	str	x0, [x1, #:lo12:.LANCHOR180]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR178
-	str	x0, [x1, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR181
+	str	x0, [x1, #:lo12:.LANCHOR181]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR107
-	adrp	x1, .LANCHOR179
-	str	x0, [x1, #:lo12:.LANCHOR179]
+	adrp	x20, .LANCHOR108
+	adrp	x1, .LANCHOR182
+	str	x0, [x1, #:lo12:.LANCHOR182]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR77
-	str	x0, [x1, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR78
+	str	x0, [x1, #:lo12:.LANCHOR78]
 	mov	w0, w19
 	bl	ftl_malloc
-	ldrh	w19, [x21, #:lo12:.LANCHOR57]
-	adrp	x1, .LANCHOR106
-	str	x0, [x1, #:lo12:.LANCHOR106]
-	ldrh	w0, [x22, #:lo12:.LANCHOR37]
+	ldrh	w19, [x21, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR107
+	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldrh	w0, [x22, #:lo12:.LANCHOR38]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR107]
+	str	w0, [x20, #:lo12:.LANCHOR108]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR180
-	str	x0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR183
+	str	x0, [x1, #:lo12:.LANCHOR183]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR181
-	str	x0, [x1, #:lo12:.LANCHOR181]
+	adrp	x1, .LANCHOR184
+	str	x0, [x1, #:lo12:.LANCHOR184]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR182
-	str	x0, [x1, #:lo12:.LANCHOR182]
-	ldr	w0, [x20, #:lo12:.LANCHOR107]
+	adrp	x1, .LANCHOR185
+	str	x0, [x1, #:lo12:.LANCHOR185]
+	ldr	w0, [x20, #:lo12:.LANCHOR108]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR104
-	str	x0, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR183
-	str	x0, [x1, #:lo12:.LANCHOR183]
+	adrp	x1, .LANCHOR186
+	str	x0, [x1, #:lo12:.LANCHOR186]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR184
-	str	x0, [x1, #:lo12:.LANCHOR184]
+	adrp	x1, .LANCHOR187
+	str	x0, [x1, #:lo12:.LANCHOR187]
 	mov	w0, 24
-	ldr	w1, [x20, #:lo12:.LANCHOR107]
+	ldr	w1, [x20, #:lo12:.LANCHOR108]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x23, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR103
-	str	x0, [x1, #:lo12:.LANCHOR103]
-	ldrh	w0, [x22, #:lo12:.LANCHOR37]
-	adrp	x22, .LANCHOR64
+	ldrh	w19, [x23, #:lo12:.LANCHOR59]
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
+	ldrh	w0, [x22, #:lo12:.LANCHOR38]
+	adrp	x22, .LANCHOR65
 	mul	w19, w19, w0
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR185
-	str	x0, [x1, #:lo12:.LANCHOR185]
+	adrp	x1, .LANCHOR188
+	str	x0, [x1, #:lo12:.LANCHOR188]
 	lsl	w0, w19, 2
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR40
-	adrp	x1, .LANCHOR186
-	str	x0, [x1, #:lo12:.LANCHOR186]
-	ldrh	w1, [x23, #:lo12:.LANCHOR58]
-	ldr	w0, [x20, #:lo12:.LANCHOR107]
-	adrp	x20, .LANCHOR187
+	adrp	x19, .LANCHOR41
+	adrp	x1, .LANCHOR189
+	str	x0, [x1, #:lo12:.LANCHOR189]
+	ldrh	w1, [x23, #:lo12:.LANCHOR59]
+	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	adrp	x20, .LANCHOR190
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR105
-	str	x0, [x1, #:lo12:.LANCHOR105]
-	ldrh	w0, [x19, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
+	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	ubfiz	w0, w0, 1, 15
-	strh	w0, [x20, #:lo12:.LANCHOR187]
+	strh	w0, [x20, #:lo12:.LANCHOR190]
 	and	w0, w0, 65534
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR134
-	str	x0, [x1, #:lo12:.LANCHOR134]
-	ldrh	w0, [x20, #:lo12:.LANCHOR187]
+	adrp	x1, .LANCHOR137
+	str	x0, [x1, #:lo12:.LANCHOR137]
+	ldrh	w0, [x20, #:lo12:.LANCHOR190]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
-	strh	w0, [x20, #:lo12:.LANCHOR187]
+	strh	w0, [x20, #:lo12:.LANCHOR190]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR188
-	str	x0, [x1, #:lo12:.LANCHOR188]
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR191
+	str	x0, [x1, #:lo12:.LANCHOR191]
+	adrp	x1, .LANCHOR79
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR78]
-	ldrh	w0, [x19, #:lo12:.LANCHOR40]
+	str	x0, [x1, #:lo12:.LANCHOR79]
+	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR64]
-	adrp	x1, .LANCHOR83
-	str	x0, [x1, #:lo12:.LANCHOR83]
+	ldr	w20, [x22, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR84
+	str	x0, [x1, #:lo12:.LANCHOR84]
 	lsl	w20, w20, 1
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR126
-	str	x0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR129
+	str	x0, [x1, #:lo12:.LANCHOR129]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR61
-	adrp	x1, .LANCHOR122
-	str	x0, [x1, #:lo12:.LANCHOR122]
-	ldrh	w0, [x19, #:lo12:.LANCHOR40]
+	adrp	x20, .LANCHOR62
+	adrp	x1, .LANCHOR125
+	str	x0, [x1, #:lo12:.LANCHOR125]
+	ldrh	w0, [x19, #:lo12:.LANCHOR41]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR71
-	str	x0, [x1, #:lo12:.LANCHOR71]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR72
+	str	x0, [x1, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR189
-	str	x0, [x1, #:lo12:.LANCHOR189]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
-	adrp	x20, .LANCHOR62
+	adrp	x1, .LANCHOR192
+	str	x0, [x1, #:lo12:.LANCHOR192]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x20, .LANCHOR63
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
-	str	x0, [x1, #:lo12:.LANCHOR190]
-	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR193
+	str	x0, [x1, #:lo12:.LANCHOR193]
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR62]
-	adrp	x1, .LANCHOR191
-	str	x0, [x1, #:lo12:.LANCHOR191]
+	ldrh	w2, [x20, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR66
-	ldrh	w20, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR67
+	ldrh	w20, [x0, #:lo12:.LANCHOR67]
 	lsl	w20, w20, 2
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR128
-	str	x0, [x1, #:lo12:.LANCHOR128]
+	adrp	x1, .LANCHOR131
+	str	x0, [x1, #:lo12:.LANCHOR131]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR67
-	adrp	x1, .LANCHOR192
-	str	x0, [x1, #:lo12:.LANCHOR192]
-	ldr	w0, [x22, #:lo12:.LANCHOR64]
+	adrp	x20, .LANCHOR68
+	adrp	x1, .LANCHOR195
+	str	x0, [x1, #:lo12:.LANCHOR195]
+	ldr	w0, [x22, #:lo12:.LANCHOR65]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR127
-	str	x0, [x1, #:lo12:.LANCHOR127]
-	ldrh	w0, [x20, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR130
+	str	x0, [x1, #:lo12:.LANCHOR130]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR96
-	str	x0, [x1, #:lo12:.LANCHOR96]
-	ldrh	w1, [x20, #:lo12:.LANCHOR67]
-	adrp	x20, .LANCHOR44
-	ldrh	w0, [x21, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR97
+	str	x0, [x1, #:lo12:.LANCHOR97]
+	ldrh	w1, [x20, #:lo12:.LANCHOR68]
+	adrp	x20, .LANCHOR45
+	ldrh	w0, [x21, #:lo12:.LANCHOR58]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR123
-	str	x0, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
 	mov	w0, 6
-	ldrh	w1, [x19, #:lo12:.LANCHOR40]
-	adrp	x19, .LANCHOR120
+	ldrh	w1, [x19, #:lo12:.LANCHOR41]
+	adrp	x19, .LANCHOR123
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR81
-	str	x0, [x1, #:lo12:.LANCHOR81]
-	adrp	x0, .LANCHOR50
-	ldrh	w1, [x20, #:lo12:.LANCHOR44]
-	ldrh	w0, [x0, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR82
+	str	x0, [x1, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR51
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	add	w0, w0, 31
 	asr	w0, w0, 5
-	strh	w0, [x19, #:lo12:.LANCHOR120]
+	strh	w0, [x19, #:lo12:.LANCHOR123]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR74
-	ldrh	w5, [x19, #:lo12:.LANCHOR120]
-	add	x2, x1, :lo12:.LANCHOR74
-	ldrh	w7, [x20, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR75
+	ldrh	w5, [x19, #:lo12:.LANCHOR123]
+	add	x2, x1, :lo12:.LANCHOR75
+	ldrh	w7, [x20, #:lo12:.LANCHOR45]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L993:
+.L1065:
 	cmp	w0, w7
-	bcc	.L994
+	bcc	.L1066
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR75
 	mov	x3, 0
-.L995:
+.L1067:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L996
+	bne	.L1068
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L994:
+.L1066:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L993
-.L996:
+	b	.L1065
+.L1068:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L995
+	b	.L1067
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7309,17 +7817,6 @@ StorageSysDataLoad:
 	mov	w0, 16
 	b	FtlRead
 	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.StorageSysDataStore,"ax",@progbits
-	.align	2
-	.global	StorageSysDataStore
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-	mov	x3, x1
-	mov	w2, 1
-	add	w1, w0, 256
-	mov	w0, 16
-	b	FtlWrite
-	.size	StorageSysDataStore, .-StorageSysDataStore
 	.section	.text.FlashBootVendorRead,"ax",@progbits
 	.align	2
 	.global	FlashBootVendorRead
@@ -7331,17 +7828,6 @@ FlashBootVendorRead:
 	mov	w0, 16
 	b	FtlRead
 	.size	FlashBootVendorRead, .-FlashBootVendorRead
-	.section	.text.FlashBootVendorWrite,"ax",@progbits
-	.align	2
-	.global	FlashBootVendorWrite
-	.type	FlashBootVendorWrite, %function
-FlashBootVendorWrite:
-	mov	x3, x2
-	mov	w1, w0
-	mov	w2, 1
-	mov	w0, 16
-	b	FtlWrite
-	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
 	.section	.text.FlashCs123Init,"ax",@progbits
 	.align	2
 	.global	FlashCs123Init
@@ -7361,8 +7847,8 @@ rk_nand_de_init:
 	.global	rk_ftl_get_capacity
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	ret
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7373,67 +7859,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC17
+	adrp	x21, .LC19
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC16
+	adrp	x23, .LC18
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC16
-	add	x21, x21, :lo12:.LC17
+	add	x23, x23, :lo12:.LC18
+	add	x21, x21, :lo12:.LC19
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC18
-.L1008:
+	adrp	x27, .LC20
+.L1078:
 	cmp	x25, x19
-	bne	.L1014
+	bne	.L1084
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC18
+	adrp	x1, .LC20
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC18
+	add	x1, x1, :lo12:.LC20
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC8
+	adrp	x0, .LC7
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC8
+	add	x0, x0, :lo12:.LC7
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1014:
-	cbnz	w20, .L1009
+.L1084:
+	cbnz	w20, .L1079
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1009:
+.L1079:
 	cmp	w24, 4
-	bne	.L1010
+	bne	.L1080
 	ldr	w1, [x22, x19, lsl 2]
-.L1016:
+.L1086:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1013
+	bls	.L1083
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC18
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	add	x1, x27, :lo12:.LC20
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1013:
+.L1083:
 	add	x19, x19, 1
-	b	.L1008
-.L1010:
+	b	.L1078
+.L1080:
 	cmp	w24, 2
-	bne	.L1012
+	bne	.L1082
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1016
-.L1012:
+	b	.L1086
+.L1082:
 	ldrb	w1, [x22, x19]
-	b	.L1016
+	b	.L1086
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7460,18 +7946,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1018
+	bne	.L1088
 	mov	w1, -89
 	strb	w1, [x0, 4]
-	adrp	x0, .LANCHOR193+17
+	adrp	x0, .LANCHOR196+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR193+17]
-.L1074:
+	strb	w1, [x0, #:lo12:.LANCHOR196+17]
+.L1144:
 	mov	w27, 7
-	b	.L1109
-.L1018:
+	b	.L1179
+.L1088:
 	cmp	w26, 3
-	bne	.L1020
+	bne	.L1090
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7487,14 +7973,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1110:
+.L1180:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1019:
+.L1089:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1024
+	bhi	.L1094
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -7502,11 +7988,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1025:
+.L1095:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1031
-.L1032:
+	bhi	.L1101
+.L1102:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -7517,9 +8003,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1020:
+.L1090:
 	cmp	w26, 4
-	bne	.L1021
+	bne	.L1091
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -7532,10 +8018,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1110
-.L1021:
+	b	.L1180
+.L1091:
 	cmp	w26, 5
-	bne	.L1022
+	bne	.L1092
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -7545,12 +8031,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1109:
+.L1179:
 	mov	w28, 4
-	b	.L1019
-.L1022:
+	b	.L1089
+.L1092:
 	cmp	w26, 6
-	bne	.L1023
+	bne	.L1093
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -7560,10 +8046,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1109
-.L1023:
+	b	.L1179
+.L1093:
 	cmp	w26, 7
-	bne	.L1074
+	bne	.L1144
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7586,8 +8072,8 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1019
-.L1031:
+	b	.L1089
+.L1101:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -7601,7 +8087,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1026:
+.L1096:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -7616,15 +8102,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1026
-	adrp	x2, .LANCHOR193
-	add	x2, x2, :lo12:.LANCHOR193
+	bhi	.L1096
+	adrp	x2, .LANCHOR196
+	add	x2, x2, :lo12:.LANCHOR196
 	mov	x0, 0
-.L1029:
+.L1099:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1028:
+.L1098:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -7633,10 +8119,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1028
+	bne	.L1098
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1029
+	bne	.L1099
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -7646,11 +8132,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1025
-.L1024:
+	b	.L1095
+.L1094:
 	sub	w0, w26, #3
 	cmp	w0, 4
-	bhi	.L1032
+	bhi	.L1102
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -7667,11 +8153,11 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1033:
+.L1103:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1032
+	bls	.L1102
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -7688,37 +8174,37 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1034
+	beq	.L1104
 	ubfiz	x0, x22, 6, 8
 	add	x0, x0, 20
-.L1111:
+.L1181:
 	add	x3, x1, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1036
+	bne	.L1106
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1112:
+.L1182:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1113
-.L1034:
+	b	.L1183
+.L1104:
 	mov	x3, 28
 	mov	w0, 160
 	umaddl	x0, w0, w22, x3
-	b	.L1111
-.L1036:
+	b	.L1181
+.L1106:
 	cmp	w25, 1
-	bhi	.L1038
+	bhi	.L1108
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1113:
+.L1183:
 	str	w0, [x19, 2048]
 	mov	w0, 22
 	str	w0, [x19, 2056]
@@ -7732,10 +8218,10 @@ HynixGetReadRetryDefault:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1039
+	bne	.L1109
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1040:
+.L1110:
 	mov	w7, 2
 	str	w7, [x19, 2052]
 	str	wzr, [x19, 2052]
@@ -7747,187 +8233,187 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1075
+	bls	.L1145
 	ldr	w7, [x29, 136]
 	cmp	w26, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L1041:
-	adrp	x8, .LANCHOR144
+.L1111:
+	adrp	x8, .LANCHOR147
 	mov	x7, 0
-	ldr	x0, [x8, #:lo12:.LANCHOR144]
-.L1042:
+	ldr	x0, [x8, #:lo12:.LANCHOR147]
+.L1112:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1042
+	bhi	.L1112
 	cmp	w26, 7
-	bne	.L1043
+	bne	.L1113
 	mov	w1, 0
-.L1045:
+.L1115:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1044
+	beq	.L1114
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1044
+	beq	.L1114
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1045
-.L1046:
-	adrp	x0, .LC19
+	bne	.L1115
+.L1116:
+	adrp	x0, .LC21
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1048:
-	b	.L1048
-.L1038:
+.L1118:
+	b	.L1118
+.L1108:
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1112
-.L1039:
+	b	.L1182
+.L1109:
 	str	wzr, [x19, 2052]
-	b	.L1040
-.L1075:
+	b	.L1110
+.L1145:
 	mov	w1, 16
-	b	.L1041
-.L1044:
+	b	.L1111
+.L1114:
 	cmp	w1, 6
-	bhi	.L1046
-.L1047:
-	ldr	x7, [x8, #:lo12:.LANCHOR144]
+	bhi	.L1116
+.L1117:
+	ldr	x7, [x8, #:lo12:.LANCHOR147]
 	mov	x0, 0
-.L1052:
+.L1122:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1053
-	ldr	x1, [x8, #:lo12:.LANCHOR144]
+	bgt	.L1123
+	ldr	x1, [x8, #:lo12:.LANCHOR147]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1055:
+.L1125:
 	mov	x0, 0
-.L1054:
+.L1124:
 	ldr	w11, [x8, x0, lsl 2]
 	mvn	w11, w11
 	str	w11, [x8, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1054
+	bgt	.L1124
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 2
-	bne	.L1055
+	bne	.L1125
 	mov	x11, x1
 	mov	w12, 0
 	mov	w16, 1
-.L1061:
+.L1131:
 	mov	w8, 0
 	mov	w0, 0
-.L1060:
+.L1130:
 	mov	x15, x11
 	lsl	w10, w16, w0
 	mov	w14, 16
 	mov	w13, 0
-.L1058:
+.L1128:
 	ldr	w17, [x15]
 	add	x15, x15, x24
 	bics	wzr, w10, w17
 	cinc	w13, w13, eq
 	subs	w14, w14, #1
-	bne	.L1058
+	bne	.L1128
 	cmp	w13, 9
 	orr	w10, w8, w10
 	add	w0, w0, 1
 	csel	w8, w10, w8, cs
 	cmp	w0, 32
-	bne	.L1060
+	bne	.L1130
 	str	w8, [x11], 4
 	add	w12, w12, 1
 	cmp	w23, w12
-	bgt	.L1061
+	bgt	.L1131
 	mov	x0, 0
 	mov	w8, 0
-.L1064:
+.L1134:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1064
+	bne	.L1134
 	cmp	w8, 7
-	ble	.L1065
+	ble	.L1135
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
 	bl	rknand_print_hex
-	adrp	x0, .LC19
+	adrp	x0, .LC21
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1066:
-	b	.L1066
-.L1043:
+.L1136:
+	b	.L1136
+.L1113:
 	cmp	w26, 6
-	bne	.L1047
+	bne	.L1117
 	mov	x1, 0
-.L1049:
+.L1119:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1047
+	beq	.L1117
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1047
+	beq	.L1117
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1049
-	adrp	x0, .LC19
+	bne	.L1119
+	adrp	x0, .LC21
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC21
 	bl	printf
-.L1051:
-	b	.L1051
-.L1053:
+.L1121:
+	b	.L1121
+.L1123:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1052
-.L1065:
+	b	.L1122
+.L1135:
 	cmp	w26, 6
-	beq	.L1077
+	beq	.L1147
 	cmp	w26, 7
 	mov	x1, 8
 	mov	x0, 10
 	csel	x0, x0, x1, eq
-.L1067:
+.L1137:
 	mov	x1, x3
 	mov	w8, 0
-.L1068:
+.L1138:
 	mov	x3, 0
-.L1069:
+.L1139:
 	ldrb	w10, [x7, x3]
 	strb	w10, [x1, x3]
 	add	x3, x3, 1
 	cmp	w28, w3, uxtb
-	bhi	.L1069
+	bhi	.L1139
 	ldr	x2, [x29, 112]
 	add	w8, w8, 1
 	add	x1, x1, x0
 	cmp	w27, w8
 	add	x7, x7, x2
-	bgt	.L1068
+	bgt	.L1138
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1071
+	bhi	.L1141
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -7939,19 +8425,19 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1072:
+.L1142:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1033
-.L1077:
+	b	.L1103
+.L1147:
 	mov	x0, 4
-	b	.L1067
-.L1071:
+	b	.L1137
+.L1141:
 	mov	w0, 56
 	str	w0, [x19, 2056]
-	b	.L1072
+	b	.L1142
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7959,14 +8445,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1114
+	cbz	w0, .L1184
 	sub	w2, w0, #1
 	cmp	w2, 6
-	bhi	.L1116
+	bhi	.L1186
 	b	HynixGetReadRetryDefault
-.L1116:
+.L1186:
 	cmp	w0, 49
-	bne	.L1117
+	bne	.L1187
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -7977,41 +8463,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR14
 	add	x1, x1, :lo12:.LANCHOR14
 	mov	w2, 64
-.L1126:
+.L1196:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1117:
+.L1187:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1118
+	bhi	.L1188
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1127:
+.L1197:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR10
 	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1126
-.L1118:
+	b	.L1196
+.L1188:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1119
+	bne	.L1189
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1127
-.L1119:
+	b	.L1197
+.L1189:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1114
+	bne	.L1184
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8022,8 +8508,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1126
-.L1114:
+	b	.L1196
+.L1184:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8040,56 +8526,56 @@ FlashInit:
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR149
+	adrp	x24, .LANCHOR152
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR144
-	adrp	x21, .LANCHOR29
+	adrp	x1, .LANCHOR147
+	adrp	x21, .LANCHOR30
 	adrp	x22, .LANCHOR1
 	adrp	x20, .LANCHOR22
-	str	x0, [x1, #:lo12:.LANCHOR144]
+	str	x0, [x1, #:lo12:.LANCHOR147]
 	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x25, .LANCHOR6
-	adrp	x1, .LANCHOR150
+	adrp	x1, .LANCHOR153
 	add	x25, x25, :lo12:.LANCHOR6
-	adrp	x26, .LC21
+	adrp	x26, .LC23
 	mov	w28, 0
-	str	x0, [x1, #:lo12:.LANCHOR150]
+	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 4096
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR194
-	str	x0, [x1, #:lo12:.LANCHOR194]
+	adrp	x1, .LANCHOR197
+	str	x0, [x1, #:lo12:.LANCHOR197]
 	mov	w0, 32768
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR195
-	str	x0, [x1, #:lo12:.LANCHOR195]
+	adrp	x1, .LANCHOR198
+	str	x0, [x1, #:lo12:.LANCHOR198]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x21, #:lo12:.LANCHOR29]
-	adrp	x1, .LANCHOR196
+	strb	wzr, [x21, #:lo12:.LANCHOR30]
+	adrp	x1, .LANCHOR199
 	strb	wzr, [x22, #:lo12:.LANCHOR1]
-	str	x0, [x1, #:lo12:.LANCHOR196]
-	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR199]
+	adrp	x1, .LANCHOR150
 	mov	w0, 50
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x1, #:lo12:.LANCHOR147]
-	adrp	x0, .LANCHOR146
+	strb	w0, [x1, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR149
 	mov	w1, 128
-	str	wzr, [x0, #:lo12:.LANCHOR146]
+	str	wzr, [x0, #:lo12:.LANCHOR149]
 	adrp	x0, .LANCHOR3
 	str	w1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR141
-	str	wzr, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR144
+	str	wzr, [x0, #:lo12:.LANCHOR144]
 	mov	w0, 60
-	strb	w0, [x24, #:lo12:.LANCHOR149]
+	strb	w0, [x24, #:lo12:.LANCHOR152]
 	mov	x0, x19
 	add	x19, x20, :lo12:.LANCHOR22
 	bl	NandcInit
 	mov	x27, x19
-	add	x0, x26, :lo12:.LC21
+	add	x0, x26, :lo12:.LC23
 	str	x0, [x29, 104]
-.L1133:
+.L1203:
 	and	w26, w28, 255
 	mov	w0, w26
 	bl	FlashReset
@@ -8124,7 +8610,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1129
+	bhi	.L1199
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8133,171 +8619,172 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 104]
 	bl	printf
-.L1129:
-	cbnz	w28, .L1130
+.L1199:
+	cbnz	w28, .L1200
 	ldrb	w0, [x27]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1171
+	bhi	.L1241
 	ldrb	w0, [x27, 1]
 	cmp	w0, 255
-	beq	.L1171
-.L1130:
+	beq	.L1241
+.L1200:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1132
+	bne	.L1202
 	mov	w0, 44
 	strb	w0, [x19]
-.L1132:
+.L1202:
 	add	w28, w28, 1
 	add	x25, x25, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1133
+	bne	.L1203
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1134
-	adrp	x0, .LANCHOR152
-	ldr	w0, [x0, #:lo12:.LANCHOR152]
+	beq	.L1204
+	adrp	x0, .LANCHOR155
+	ldr	w0, [x0, #:lo12:.LANCHOR155]
 	bl	NandcSetDdrMode
-.L1134:
+.L1204:
 	mov	w2, 852
 	adrp	x26, .LANCHOR20
 	mov	w1, 0
 	add	x0, x26, :lo12:.LANCHOR20
 	adrp	x19, .LANCHOR18
 	bl	ftl_memset
-	adrp	x28, .LANCHOR30
-	add	x0, x28, :lo12:.LANCHOR30
+	adrp	x28, .LANCHOR31
+	add	x0, x28, :lo12:.LANCHOR31
 	str	x0, [x19, #:lo12:.LANCHOR18]
 	add	x0, x20, :lo12:.LANCHOR22
 	adrp	x27, .LANCHOR5
 	ldrb	w2, [x0, 1]
 	strb	wzr, [x27, #:lo12:.LANCHOR5]
 	cmp	w2, 161
-	beq	.L1135
+	beq	.L1205
 	cmp	w2, 218
-	beq	.L1135
+	beq	.L1205
 	and	w1, w2, -33
 	cmp	w1, 209
-	beq	.L1135
+	beq	.L1205
 	cmp	w2, 220
-	bne	.L1136
+	bne	.L1206
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1136
-.L1135:
+	bne	.L1206
+.L1205:
 	mov	w0, 1
-	adrp	x25, .LANCHOR197
-	add	x1, x25, :lo12:.LANCHOR197
+	adrp	x25, .LANCHOR200
+	add	x1, x25, :lo12:.LANCHOR200
 	strb	w0, [x22, #:lo12:.LANCHOR1]
 	mov	w0, 16
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x24, #:lo12:.LANCHOR149]
+	strb	w0, [x24, #:lo12:.LANCHOR152]
 	add	x3, x20, :lo12:.LANCHOR22
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	strb	w0, [x1, 1]
 	strb	w2, [x1, 2]
 	cmp	w0, 152
-	bne	.L1137
+	bne	.L1207
 	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1137
+	tbnz	w0, #31, .L1207
 	mov	w0, 24
-	strb	w0, [x24, #:lo12:.LANCHOR149]
-.L1137:
-	adrp	x0, .LANCHOR151
-	ldr	w1, [x0, #:lo12:.LANCHOR151]
-	mov	w0, 12336
-	movk	w0, 0x5638, lsl 16
-	cmp	w1, w0
-	bne	.L1138
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1207:
+	adrp	x0, .LANCHOR29
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	cmp	w0, 2049
+	ccmp	w0, w1, 4, ne
+	bne	.L1208
 	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR149]
-.L1138:
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1208:
 	cmp	w2, 218
-	bne	.L1139
-	add	x0, x25, :lo12:.LANCHOR197
+	bne	.L1209
+	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1206:
+.L1279:
 	strb	w1, [x0, 2]
-.L1140:
-	adrp	x1, .LANCHOR140
-	add	x1, x1, :lo12:.LANCHOR140
+.L1210:
+	adrp	x1, .LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR143
 	mov	w2, 32
 	add	x1, x1, 32
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	bl	ftl_memcpy
 	mov	w2, 32
-	add	x1, x25, :lo12:.LANCHOR197
-	add	x0, x28, :lo12:.LANCHOR30
+	add	x1, x25, :lo12:.LANCHOR200
+	add	x0, x28, :lo12:.LANCHOR31
 	bl	ftl_memcpy
-.L1136:
+.L1206:
 	ldrb	w0, [x22, #:lo12:.LANCHOR1]
 	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1142
+	cbnz	w0, .L1212
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1144
+	cbnz	w0, .L1214
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
 	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1144
+	tbnz	x1, 0, .L1214
 	mov	w1, 1
-	strb	w1, [x21, #:lo12:.LANCHOR29]
+	strb	w1, [x21, #:lo12:.LANCHOR30]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1144:
+.L1214:
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
 	strb	w0, [x25, #:lo12:.LANCHOR8]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1142
+	cbz	w0, .L1212
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1128
+	beq	.L1198
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	bl	FlashGetReadRetryDefault
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
-	adrp	x1, .LANCHOR119
-	ldrh	w1, [x1, #:lo12:.LANCHOR119]
+	adrp	x1, .LANCHOR122
+	ldrh	w1, [x1, #:lo12:.LANCHOR122]
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1147
+	blt	.L1217
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1148
-.L1147:
+	bge	.L1218
+.L1217:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1148:
+.L1218:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1149
+	beq	.L1219
 	bl	FlashSavePhyInfo
-	adrp	x0, .LANCHOR145
-	ldr	w1, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR148
+	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1149:
+.L1219:
 	bl	FlashSavePhyInfo
-.L1142:
+.L1212:
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w0, [x2, 26]
@@ -8305,10 +8792,10 @@ FlashInit:
 	ldrh	w0, [x2, 16]
 	ubfx	x1, x0, 7, 1
 	strb	w1, [x27, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR198
+	adrp	x1, .LANCHOR201
 	ubfx	x3, x0, 3, 1
-	adrp	x27, .LANCHOR142
-	strb	w3, [x1, #:lo12:.LANCHOR198]
+	adrp	x27, .LANCHOR145
+	strb	w3, [x1, #:lo12:.LANCHOR201]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
 	ubfx	x0, x0, 8, 3
@@ -8316,14 +8803,14 @@ FlashInit:
 	strb	w0, [x24, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
-	str	xzr, [x27, #:lo12:.LANCHOR142]
+	str	xzr, [x27, #:lo12:.LANCHOR145]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1151
+	tbz	x1, 6, .L1221
 	adrp	x1, .LANCHOR11
 	ldrb	w0, [x0, 19]
 	adrp	x3, .LANCHOR13
@@ -8331,83 +8818,83 @@ FlashInit:
 	add	x1, x26, :lo12:.LANCHOR20
 	ldrb	w2, [x1, 1]
 	strb	w2, [x3, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR148
+	adrp	x2, .LANCHOR151
 	ldrb	w4, [x1, 2]
-	strb	w4, [x2, #:lo12:.LANCHOR148]
+	strb	w4, [x2, #:lo12:.LANCHOR151]
 	sub	w4, w0, #1
 	and	w4, w4, 255
 	cmp	w4, 6
 	mov	x4, x3
-	bhi	.L1152
+	bhi	.L1222
 	adrp	x2, HynixReadRetrial
 	add	x2, x2, :lo12:HynixReadRetrial
-	str	x2, [x27, #:lo12:.LANCHOR142]
+	str	x2, [x27, #:lo12:.LANCHOR145]
 	sub	w2, w0, #5
 	and	w2, w2, 255
 	cmp	w2, 1
-	bhi	.L1153
-	adrp	x2, .LANCHOR35
+	bhi	.L1223
+	adrp	x2, .LANCHOR36
 	add	x1, x1, 20
 	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR35]
-.L1154:
+	str	w3, [x2, #:lo12:.LANCHOR36]
+.L1224:
 	mov	x2, 0
 	mov	w3, 0
-.L1156:
+.L1226:
 	ldrsb	w4, [x1, x2]
 	add	x2, x2, 1
 	cmp	w4, 0
 	cinc	w3, w3, eq
 	cmp	x2, 32
-	bne	.L1156
+	bne	.L1226
 	cmp	w3, 27
-	bls	.L1151
+	bls	.L1221
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1151:
-	adrp	x0, .LANCHOR151
-	ldr	w1, [x0, #:lo12:.LANCHOR151]
+.L1221:
+	adrp	x0, .LANCHOR29
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1165
+	bne	.L1235
 	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1165
+	cbz	w0, .L1235
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1165:
+.L1235:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1166
-	ldrb	w0, [x21, #:lo12:.LANCHOR29]
-	cbz	w0, .L1166
-	strb	wzr, [x21, #:lo12:.LANCHOR29]
+	bne	.L1236
+	ldrb	w0, [x21, #:lo12:.LANCHOR30]
+	cbz	w0, .L1236
+	strb	wzr, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1166:
+.L1236:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1167
-	ldrb	w1, [x21, #:lo12:.LANCHOR29]
-	cbnz	w1, .L1168
-	tbnz	x0, 0, .L1167
-.L1168:
-	adrp	x0, .LANCHOR145
-	ldr	w1, [x0, #:lo12:.LANCHOR145]
+	beq	.L1237
+	ldrb	w1, [x21, #:lo12:.LANCHOR30]
+	cbnz	w1, .L1238
+	tbnz	x0, 0, .L1237
+.L1238:
+	adrp	x0, .LANCHOR148
+	ldr	w1, [x0, #:lo12:.LANCHOR148]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1167:
+.L1237:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
-	adrp	x0, .LANCHOR138
-	add	x0, x0, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR141
+	add	x0, x0, :lo12:.LANCHOR141
 	bl	FlashReadIdbDataRaw
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	mov	w0, 16
@@ -8443,7 +8930,7 @@ FlashInit:
 	strh	w1, [x0, 22]
 	ldrb	w5, [x22, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1169
+	bne	.L1239
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8452,11 +8939,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1169:
+.L1239:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1128:
+.L1198:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8464,90 +8951,90 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1139:
+.L1209:
 	cmp	w2, 220
-	bne	.L1140
-	add	x0, x25, :lo12:.LANCHOR197
+	bne	.L1210
+	add	x0, x25, :lo12:.LANCHOR200
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1206
-.L1153:
+	b	.L1279
+.L1223:
 	add	x2, x1, 20
 	cmp	w0, 7
 	add	x1, x1, 28
 	csel	x1, x1, x2, eq
-	b	.L1154
-.L1152:
+	b	.L1224
+.L1222:
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L1158
+	bhi	.L1228
 	adrp	x1, MicronReadRetrial
 	add	x1, x1, :lo12:MicronReadRetrial
-	str	x1, [x27, #:lo12:.LANCHOR142]
+	str	x1, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	beq	.L1159
-.L1210:
+	beq	.L1229
+.L1283:
 	mov	w0, 7
-	b	.L1208
-.L1159:
+	b	.L1281
+.L1229:
 	mov	w0, 15
-.L1208:
-	strb	w0, [x2, #:lo12:.LANCHOR148]
-	b	.L1151
-.L1158:
+.L1281:
+	strb	w0, [x2, #:lo12:.LANCHOR151]
+	b	.L1221
+.L1228:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L1160
+	bhi	.L1230
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR142]
+	str	x0, [x27, #:lo12:.LANCHOR145]
 	mov	w0, 4
 	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1210
-.L1160:
+	b	.L1283
+.L1230:
 	sub	w3, w0, #34
 	sub	w1, w0, #67
 	and	w3, w3, 255
 	and	w1, w1, 255
 	cmp	w3, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L1161
+	bhi	.L1231
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
-	str	x3, [x27, #:lo12:.LANCHOR142]
+	str	x3, [x27, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1162
+	beq	.L1232
 	mov	w0, 7
-.L1207:
-	strb	w0, [x2, #:lo12:.LANCHOR148]
+.L1280:
+	strb	w0, [x2, #:lo12:.LANCHOR151]
 	cmp	w1, 1
-	bhi	.L1164
+	bhi	.L1234
 	mov	w0, 4
-.L1209:
+.L1282:
 	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1151
-.L1162:
+	b	.L1221
+.L1232:
 	mov	w0, 17
-	b	.L1207
-.L1164:
+	b	.L1280
+.L1234:
 	mov	w0, 5
-	b	.L1209
-.L1161:
+	b	.L1282
+.L1231:
 	cmp	w0, 49
-	bne	.L1151
+	bne	.L1221
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR142]
-	b	.L1151
-.L1171:
+	str	x0, [x27, #:lo12:.LANCHOR145]
+	b	.L1221
+.L1241:
 	mov	w0, -2
-	b	.L1128
+	b	.L1198
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -8560,21 +9047,21 @@ FlashReadSlc2KPages:
 	mov	w22, 56
 	stp	x25, x26, [sp, 64]
 	mov	w25, w2
-	adrp	x2, .LANCHOR30+9
+	adrp	x2, .LANCHOR31+9
 	stp	x23, x24, [sp, 48]
 	nop // between mem op and mult-accumulate
 	umaddl	x22, w1, w22, x0
 	stp	x19, x20, [sp, 16]
-	ldrb	w24, [x2, #:lo12:.LANCHOR30+9]
+	ldrb	w24, [x2, #:lo12:.LANCHOR31+9]
 	adrp	x23, .LANCHOR25
 	mov	x19, x0
 	and	w21, w1, 255
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1212:
+.L1285:
 	cmp	x22, x19
-	bne	.L1224
+	bne	.L1297
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8583,7 +9070,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1224:
+.L1297:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -8593,15 +9080,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1213
+	bhi	.L1286
 	mov	w0, -1
 	str	w0, [x19]
-.L1214:
+.L1287:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1212
-.L1213:
+	b	.L1285
+.L1286:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -8641,53 +9128,56 @@ FlashReadSlc2KPages:
 	mov	w0, w27
 	bl	NandcFlashDeCs
 	cmp	w20, w2
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR33
 	csel	w0, w20, w2, cs
-	ldrb	w2, [x1, #:lo12:.LANCHOR32]
+	ldrb	w2, [x1, #:lo12:.LANCHOR33]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1217
+	bls	.L1290
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1217:
+.L1290:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1220
+	cbz	x0, .L1293
+	ldr	w1, [x0, 12]
+	cmn	w1, #1
+	bne	.L1293
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1220
+	bne	.L1293
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1220
+	beq	.L1293
 	str	w1, [x19]
-.L1220:
+.L1293:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1214
+	bne	.L1287
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1222
-	adrp	x0, .LC24
+	cbz	x1, .L1295
+	adrp	x0, .LC26
 	mov	w3, 8
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC24
+	add	x0, x0, :lo12:.LC26
 	bl	rknand_print_hex
-.L1222:
+.L1295:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1214
+	cbz	x1, .L1287
 	mov	w3, 4
-	adrp	x0, .LC25
+	adrp	x0, .LC27
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC25
+	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-	b	.L1214
+	b	.L1287
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -8704,12 +9194,12 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1243
+	cbnz	w3, .L1316
 	mov	x25, x0
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR20
 	mov	w23, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
 	mov	w22, 0
 	str	w0, [x29, 156]
 	adrp	x0, .LANCHOR5
@@ -8720,15 +9210,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1244:
+.L1317:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1278
+	bcc	.L1351
 	mov	w0, 0
-	b	.L1242
-.L1243:
+	b	.L1315
+.L1316:
 	bl	FlashReadSlc2KPages
-.L1242:
+.L1315:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8736,7 +9226,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1278:
+.L1351:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -8752,18 +9242,18 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1246
+	bhi	.L1319
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1247:
+.L1320:
 	add	w22, w22, 1
-	b	.L1244
-.L1246:
+	b	.L1317
+.L1319:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
-	adrp	x0, .LANCHOR198
-	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	adrp	x0, .LANCHOR201
+	ldrb	w0, [x0, #:lo12:.LANCHOR201]
 	cmp	w0, 0
 	mov	w0, w19
 	csel	w20, w20, wzr, ne
@@ -8775,65 +9265,65 @@ FlashReadPages:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1249
+	bhi	.L1322
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x1, w19
 	add	x0, x0, x1
 	cmp	w2, 7
 	ldrb	w3, [x0, 12]
-	bne	.L1250
+	bne	.L1323
 	ldrb	w3, [x0, 20]
-.L1250:
+.L1323:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x1]
 	cmp	w0, w3
-	beq	.L1249
+	beq	.L1322
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1249:
+.L1322:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1251
+	cbz	w24, .L1324
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1251
+	cbz	w0, .L1324
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1252:
+.L1325:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1258:
+.L1331:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1253
+	bne	.L1326
 	cmp	w19, 255
-	beq	.L1280
-.L1253:
-	cbz	w20, .L1255
+	beq	.L1353
+.L1326:
+	cbz	w20, .L1328
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1256:
+.L1329:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1254
+	cbz	w20, .L1327
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1254:
+.L1327:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -8842,26 +9332,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1257
+	cbz	w0, .L1330
 	cmn	w28, #1
-	bne	.L1257
+	bne	.L1330
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1258
-.L1251:
+	b	.L1331
+.L1324:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1252
-.L1255:
+	b	.L1325
+.L1328:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1256
-.L1280:
+	b	.L1329
+.L1353:
 	mov	w20, 0
-	b	.L1254
-.L1257:
-	cbz	w20, .L1259
+	b	.L1327
+.L1330:
+	cbz	w20, .L1332
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -8880,27 +9370,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1259:
+.L1332:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1260
-	adrp	x0, .LANCHOR29
-	ldrb	w0, [x0, #:lo12:.LANCHOR29]
-	cbnz	w0, .L1261
-.L1265:
-	adrp	x20, .LANCHOR142
-	ldr	x4, [x20, #:lo12:.LANCHOR142]
-	cbnz	x4, .L1262
+	bne	.L1333
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbnz	w0, .L1334
+.L1338:
+	adrp	x20, .LANCHOR145
+	ldr	x4, [x20, #:lo12:.LANCHOR145]
+	cbnz	x4, .L1335
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1317
-.L1261:
+	b	.L1390
+.L1334:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -8911,62 +9401,62 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1264
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	beq	.L1337
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w28, w0, lsr 1
-	bls	.L1281
-.L1264:
+	bls	.L1354
+.L1337:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1265
-.L1281:
+	beq	.L1338
+.L1354:
 	mov	w20, 0
-.L1260:
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+.L1333:
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1266
-	adrp	x0, .LANCHOR142
-	ldr	x0, [x0, #:lo12:.LANCHOR142]
+	bls	.L1339
+	adrp	x0, .LANCHOR145
+	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1266:
+.L1339:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1273
-	adrp	x0, .LANCHOR32
+	bne	.L1346
+	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	ldrb	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1273
+	cbz	x1, .L1346
 	mov	w3, 4
-	adrp	x0, .LC25
+	adrp	x0, .LC27
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC25
+	add	x0, x0, :lo12:.LC27
 	bl	rknand_print_hex
-.L1273:
-	cbz	w20, .L1275
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+.L1346:
+	cbz	w20, .L1348
+	adrp	x0, .LANCHOR33
+	ldrb	w0, [x0, #:lo12:.LANCHOR33]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1276
-	adrp	x0, .LANCHOR142
-	ldr	x0, [x0, #:lo12:.LANCHOR142]
+	bls	.L1349
+	adrp	x0, .LANCHOR145
+	ldr	x0, [x0, #:lo12:.LANCHOR145]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1276:
+.L1349:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -8974,71 +9464,71 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1275:
+.L1348:
 	add	w22, w22, w20
-	cbz	w24, .L1247
+	cbz	w24, .L1320
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1247
+	cbz	w0, .L1320
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1247
-.L1262:
+	b	.L1320
+.L1335:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1284
+	bne	.L1357
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1267
+	bhi	.L1340
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1267:
+.L1340:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	bl	FlashReadRawPage
 	mov	w28, w0
 	mov	w3, w0
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR33
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR32]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	ldrb	w2, [x0, #:lo12:.LANCHOR33]
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 	cmn	w28, #1
-	bne	.L1284
+	bne	.L1357
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1284
+	cbz	w0, .L1357
 	mov	w0, w19
-	cbz	w24, .L1268
+	cbz	w24, .L1341
 	bl	flash_enter_slc_mode
-.L1269:
-	ldr	x4, [x20, #:lo12:.LANCHOR142]
+.L1342:
+	ldr	x4, [x20, #:lo12:.LANCHOR145]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1317:
+.L1390:
 	mov	w28, w0
-.L1284:
+.L1357:
 	mov	w20, 0
-	b	.L1266
-.L1268:
+	b	.L1339
+.L1341:
 	bl	flash_exit_slc_mode
-	b	.L1269
+	b	.L1342
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9050,13 +9540,13 @@ FlashProgSlc2KPages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	mov	w23, 56
-	adrp	x2, .LANCHOR30+9
+	adrp	x2, .LANCHOR31+9
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 255
 	stp	x25, x26, [sp, 64]
 	nop // between mem op and mult-accumulate
 	umaddl	x23, w1, w23, x0
-	ldrb	w25, [x2, #:lo12:.LANCHOR30+9]
+	ldrb	w25, [x2, #:lo12:.LANCHOR31+9]
 	adrp	x26, .LANCHOR3
 	stp	x27, x28, [sp, 80]
 	mov	w22, w21
@@ -9065,12 +9555,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1319:
+.L1392:
 	cmp	x20, x23
-	bne	.L1325
+	bne	.L1398
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1326
-.L1345:
+	cbnz	w0, .L1399
+.L1418:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9079,7 +9569,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1325:
+.L1398:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9090,15 +9580,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1320
+	bhi	.L1393
 	mov	w0, -1
 	str	w0, [x20]
-.L1321:
+.L1394:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1319
-.L1320:
+	b	.L1392
+.L1393:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9151,39 +9641,39 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1324
+	tbz	x0, 0, .L1397
 	mov	w0, -1
 	str	w0, [x20]
-.L1324:
+.L1397:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1321
-.L1332:
+	b	.L1394
+.L1405:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1327
+	bne	.L1400
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1328:
+.L1401:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1346:
+.L1419:
 	cmp	x27, x20
-	bne	.L1332
-	b	.L1345
-.L1327:
-	adrp	x19, .LANCHOR196
+	bne	.L1405
+	b	.L1418
+.L1400:
+	adrp	x19, .LANCHOR199
 	mov	w4, w21
 	add	x3, x29, 116
 	add	x2, x29, 112
 	mov	w1, w24
 	mov	x0, x27
 	bl	LogAddr2PhyAddr
-	ldr	x26, [x22, #:lo12:.LANCHOR195]
-	ldr	x25, [x19, #:lo12:.LANCHOR196]
+	ldr	x26, [x22, #:lo12:.LANCHOR198]
+	ldr	x25, [x19, #:lo12:.LANCHOR199]
 	mov	x2, 56
 	mov	x1, x27
 	add	x0, x29, 120
@@ -9197,45 +9687,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1329
+	bne	.L1402
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC28
-	add	x0, x0, :lo12:.LC28
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w25, [x27]
-.L1329:
+.L1402:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1330
+	cbz	x0, .L1403
 	ldr	w2, [x0]
-	ldr	x0, [x19, #:lo12:.LANCHOR196]
+	ldr	x0, [x19, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1330
+	beq	.L1403
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1330:
+.L1403:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1328
+	cbz	x0, .L1401
 	ldr	w2, [x0]
-	ldr	x0, [x23, #:lo12:.LANCHOR195]
+	ldr	x0, [x23, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1328
+	beq	.L1401
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1328
-.L1326:
-	adrp	x22, .LANCHOR195
+	b	.L1401
+.L1399:
+	adrp	x22, .LANCHOR198
 	mov	x23, x22
-	b	.L1346
+	b	.L1419
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9255,38 +9745,38 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1349
+	cbnz	w4, .L1422
 	mov	x19, x0
-	adrp	x0, .LANCHOR30+9
+	adrp	x0, .LANCHOR31+9
 	adrp	x27, .LANCHOR23
 	mov	w24, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR31+9]
 	mov	w22, w2
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1350:
+.L1423:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1363
+	bcc	.L1436
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1364:
+.L1437:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1366
+	bhi	.L1439
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1367
-.L1375:
+	cbnz	w0, .L1440
+.L1448:
 	mov	w0, 0
-	b	.L1348
-.L1349:
+	b	.L1421
+.L1422:
 	bl	FlashProgSlc2KPages
-.L1348:
+.L1421:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9294,7 +9784,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1363:
+.L1436:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9308,13 +9798,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1352
+	bhi	.L1425
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1353:
+.L1426:
 	add	w21, w21, 1
-	b	.L1350
-.L1352:
+	b	.L1423
+.L1425:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9324,20 +9814,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1355
+	cbz	x1, .L1428
 	bl	FlashWaitCmdDone
-.L1355:
+.L1428:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1356
+	cbz	w23, .L1429
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1356:
+.L1429:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9347,17 +9837,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1357
+	bne	.L1430
 	bl	NandcWaitFlashReady
-.L1358:
+.L1431:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 6
-	bhi	.L1359
+	bhi	.L1432
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1359
+	cbz	w0, .L1432
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9365,17 +9855,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1359:
+.L1432:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1360
+	bne	.L1433
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1360
+	cbz	w0, .L1433
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1361:
+.L1434:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9384,7 +9874,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1362
+	cbz	w23, .L1435
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9412,15 +9902,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1362:
+.L1435:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1353
-.L1357:
+	b	.L1426
+.L1430:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9433,56 +9923,56 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1358
-.L1360:
+	b	.L1431
+.L1433:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1361
-.L1366:
+	b	.L1434
+.L1439:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1365
+	bne	.L1438
 	ldrb	w0, [x21]
-	cbz	w0, .L1365
+	cbz	w0, .L1438
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1365:
+.L1438:
 	add	x20, x20, 1
-	b	.L1364
-.L1367:
+	b	.L1437
+.L1440:
 	mov	w0, 56
 	and	w20, w24, 255
-	adrp	x23, .LANCHOR195
+	adrp	x23, .LANCHOR198
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1368:
+.L1441:
 	cmp	x24, x19
-	beq	.L1375
+	beq	.L1448
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1369
+	bne	.L1442
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L1370:
+.L1443:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1368
-.L1369:
-	adrp	x21, .LANCHOR196
+	b	.L1441
+.L1442:
+	adrp	x21, .LANCHOR199
 	mov	w4, w20
 	add	x3, x29, 116
 	add	x2, x29, 112
 	mov	w1, w22
 	mov	x0, x19
 	bl	LogAddr2PhyAddr
-	ldr	x27, [x23, #:lo12:.LANCHOR195]
-	ldr	x26, [x21, #:lo12:.LANCHOR196]
+	ldr	x27, [x23, #:lo12:.LANCHOR198]
+	ldr	x26, [x21, #:lo12:.LANCHOR199]
 	mov	x2, 56
 	mov	x1, x19
 	add	x0, x29, 120
@@ -9496,41 +9986,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1371
+	bne	.L1444
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC28
-	add	x0, x0, :lo12:.LC28
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	str	w26, [x19]
-.L1371:
+.L1444:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1372
+	cbz	x0, .L1445
 	ldr	w2, [x0]
-	ldr	x0, [x21, #:lo12:.LANCHOR196]
+	ldr	x0, [x21, #:lo12:.LANCHOR199]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1372
+	beq	.L1445
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1372:
+.L1445:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1370
+	cbz	x0, .L1443
 	ldr	w2, [x0]
-	ldr	x0, [x25, #:lo12:.LANCHOR195]
+	ldr	x0, [x25, #:lo12:.LANCHOR198]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1370
+	beq	.L1443
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1370
+	b	.L1443
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -9541,20 +10031,20 @@ FlashTestBlk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR146
-	ldr	w0, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR149
+	ldr	w0, [x0, #:lo12:.LANCHOR149]
 	cmp	w19, w0
-	bcc	.L1403
-	adrp	x20, .LANCHOR150
+	bcc	.L1476
+	adrp	x20, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
 	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR150]
+	ldr	x0, [x20, #:lo12:.LANCHOR153]
 	str	x0, [x29, 48]
 	add	x0, x29, 96
 	str	x0, [x29, 56]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR150]
+	ldr	x0, [x20, #:lo12:.LANCHOR153]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -9575,14 +10065,14 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1401:
+.L1474:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1403:
+.L1476:
 	mov	w19, 0
-	b	.L1401
+	b	.L1474
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
@@ -9593,42 +10083,42 @@ FtlLowFormatEraseBlock:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1428
+	cbnz	w0, .L1501
 	adrp	x23, .LANCHOR27
 	and	w25, w1, 255
 	adrp	x20, .LANCHOR8
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	ldrb	w0, [x23, #:lo12:.LANCHOR27]
-	adrp	x21, .LANCHOR77
+	adrp	x21, .LANCHOR78
 	str	w0, [x29, 136]
 	mov	x8, 56
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR74
 	ldrb	w10, [x20, #:lo12:.LANCHOR8]
-	ldrh	w11, [x1, #:lo12:.LANCHOR37]
-	adrp	x7, .LANCHOR46
-	str	w26, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR186
-	ldr	x6, [x21, #:lo12:.LANCHOR77]
-	add	x7, x7, :lo12:.LANCHOR46
-	ldr	x12, [x0, #:lo12:.LANCHOR186]
-	adrp	x0, .LANCHOR58
+	ldrh	w11, [x1, #:lo12:.LANCHOR38]
+	adrp	x7, .LANCHOR47
+	str	w26, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR189
+	ldr	x6, [x21, #:lo12:.LANCHOR78]
+	add	x7, x7, :lo12:.LANCHOR47
+	ldr	x12, [x0, #:lo12:.LANCHOR189]
+	adrp	x0, .LANCHOR59
 	mov	w14, w8
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR58]
+	ldrh	w13, [x0, #:lo12:.LANCHOR59]
 	mov	w24, 0
 	mov	w19, 0
 	str	x1, [x29, 128]
 	str	x0, [x29, 120]
-.L1407:
+.L1480:
 	cmp	w11, w5, uxth
-	bhi	.L1411
-	cbz	w24, .L1405
+	bhi	.L1484
+	cbz	w24, .L1478
 	cmp	w10, 0
 	mov	w2, w24
 	cset	w22, ne
@@ -9641,47 +10131,47 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
 	umull	x24, w24, w0
-.L1414:
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1487:
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x27
 	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1413
+	bne	.L1486
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1413:
+.L1486:
 	add	x27, x27, 56
 	cmp	x27, x24
-	bne	.L1414
-	cbnz	w25, .L1415
+	bne	.L1487
+	cbnz	w25, .L1488
 	and	w22, w22, 65535
 	mov	w28, 6
 	mov	w27, 1
-.L1416:
-	adrp	x0, .LANCHOR46
+.L1489:
+	adrp	x0, .LANCHOR47
 	mov	w24, 0
-	add	x0, x0, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR47
 	str	x0, [x29, 112]
-.L1424:
+.L1497:
 	ldr	x0, [x29, 128]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR77]
+	ldr	x6, [x21, #:lo12:.LANCHOR78]
 	mov	w20, 0
 	mov	w12, 56
-	ldrh	w7, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR183
-	ldr	x8, [x0, #:lo12:.LANCHOR183]
-	adrp	x0, .LANCHOR184
-	ldr	x10, [x0, #:lo12:.LANCHOR184]
+	ldrh	w7, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR186
+	ldr	x8, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR187
+	ldr	x10, [x0, #:lo12:.LANCHOR187]
 	ldr	x0, [x29, 120]
-	ldrh	w11, [x0, #:lo12:.LANCHOR58]
-.L1417:
+	ldrh	w11, [x0, #:lo12:.LANCHOR59]
+.L1490:
 	cmp	w7, w5, uxth
-	bhi	.L1420
-	cbz	w20, .L1405
+	bhi	.L1493
+	cbz	w20, .L1478
 	mov	w2, w22
 	mov	w1, w20
 	strb	wzr, [x23, #:lo12:.LANCHOR27]
@@ -9693,11 +10183,11 @@ FtlLowFormatEraseBlock:
 	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	x2, 0
 	umull	x1, w20, w1
-.L1423:
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1496:
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x3, x0, x2
 	ldr	w0, [x0, x2]
-	cbz	w0, .L1422
+	cbz	w0, .L1495
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
 	stp	x2, x1, [x29, 96]
@@ -9705,39 +10195,39 @@ FtlLowFormatEraseBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	ldp	x2, x1, [x29, 96]
-.L1422:
+.L1495:
 	add	x2, x2, 56
 	cmp	x1, x2
-	bne	.L1423
+	bne	.L1496
 	add	w24, w24, w28
 	and	w24, w24, 65535
 	cmp	w27, w24
-	bhi	.L1424
+	bhi	.L1497
 	mov	x23, 0
-.L1426:
-	cbz	w25, .L1425
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+.L1499:
+	cbz	w25, .L1498
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1425
+	cbnz	w0, .L1498
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
 	ldr	x2, [x29, 136]
-.L1425:
+.L1498:
 	add	x23, x23, 56
 	cmp	x23, x2
-	bne	.L1426
+	bne	.L1499
 	cmp	w26, 63
 	ccmp	w25, 0, 0, hi
-	beq	.L1405
-	ldr	x0, [x21, #:lo12:.LANCHOR77]
+	beq	.L1478
+	ldr	x0, [x21, #:lo12:.LANCHOR78]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1405:
+.L1478:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9746,7 +10236,7 @@ FtlLowFormatEraseBlock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1411:
+.L1484:
 	mul	x0, x5, x8
 	mov	w1, w26
 	str	wzr, [x6, x0]
@@ -9754,13 +10244,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w25, .L1408
+	cbz	w25, .L1481
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1409
-.L1408:
+	cbnz	w0, .L1482
+.L1481:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1410
+	cbnz	w0, .L1483
 	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
 	mul	w0, w24, w13
@@ -9770,26 +10260,26 @@ FtlLowFormatEraseBlock:
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1409:
+.L1482:
 	add	x5, x5, 1
-	b	.L1407
-.L1410:
+	b	.L1480
+.L1483:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1409
-.L1415:
-	adrp	x0, .LANCHOR53
-	ldrh	w27, [x0, #:lo12:.LANCHOR53]
+	b	.L1482
+.L1488:
+	adrp	x0, .LANCHOR54
+	ldrh	w27, [x0, #:lo12:.LANCHOR54]
 	ldrb	w0, [x20, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1429
+	cbnz	w0, .L1502
 	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1416
-.L1429:
+	b	.L1489
+.L1502:
 	mov	w22, 1
 	mov	w28, w22
-	b	.L1416
-.L1420:
+	b	.L1489
+.L1493:
 	mov	x0, 56
 	mov	w1, w26
 	mul	x0, x5, x0
@@ -9799,13 +10289,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w25, .L1418
+	cbz	w25, .L1491
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1419
-.L1418:
+	cbnz	w0, .L1492
+.L1491:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1419
+	cbnz	w0, .L1492
 	umaddl	x1, w20, w12, x6
 	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
@@ -9815,12 +10305,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1419:
+.L1492:
 	add	x5, x5, 1
-	b	.L1417
-.L1428:
+	b	.L1490
+.L1501:
 	mov	w19, 0
-	b	.L1405
+	b	.L1478
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -9830,45 +10320,45 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR76
+	adrp	x22, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x22, #:lo12:.LANCHOR76]
+	ldr	w0, [x22, #:lo12:.LANCHOR77]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1452
-	adrp	x24, .LANCHOR185
-	adrp	x23, .LANCHOR180
-	adrp	x19, .LANCHOR199
-	add	x20, x19, :lo12:.LANCHOR199
-	ldr	x1, [x24, #:lo12:.LANCHOR185]
-	adrp	x21, .LANCHOR74
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
-	add	x26, x21, :lo12:.LANCHOR74
+	cbnz	w0, .L1525
+	adrp	x24, .LANCHOR188
+	adrp	x23, .LANCHOR183
+	adrp	x19, .LANCHOR202
+	add	x20, x19, :lo12:.LANCHOR202
+	ldr	x1, [x24, #:lo12:.LANCHOR188]
+	adrp	x21, .LANCHOR75
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
+	add	x26, x21, :lo12:.LANCHOR75
 	stp	x0, x1, [x20, 8]
-	adrp	x1, .LANCHOR57
-	adrp	x27, .LANCHOR44
-	adrp	x28, .LANCHOR120
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
+	adrp	x27, .LANCHOR45
+	adrp	x28, .LANCHOR123
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	add	x26, x26, 32
 	mov	w25, 0
-	add	x27, x27, :lo12:.LANCHOR44
-	add	x28, x28, :lo12:.LANCHOR120
+	add	x27, x27, :lo12:.LANCHOR45
+	add	x28, x28, :lo12:.LANCHOR123
 	mov	w1, 0
 	bl	ftl_memset
-.L1453:
+.L1526:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1454
-	add	x19, x19, :lo12:.LANCHOR199
-	add	x20, x21, :lo12:.LANCHOR74
+	blt	.L1527
+	add	x19, x19, :lo12:.LANCHOR202
+	add	x20, x21, :lo12:.LANCHOR75
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x25, .LC31
-	adrp	x27, .LANCHOR53
+	adrp	x25, .LC33
+	adrp	x27, .LANCHOR54
 	ldr	x28, [x19, 16]
-	add	x25, x25, :lo12:.LC31
-	add	x27, x27, :lo12:.LANCHOR53
+	add	x25, x25, :lo12:.LC33
+	add	x27, x27, :lo12:.LANCHOR54
 	mov	w26, 0
 	mov	x0, x28
 	bl	ftl_memset
@@ -9876,24 +10366,24 @@ FtlBbmTblFlush:
 	strh	w0, [x28]
 	ldr	w0, [x20, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR74]
+	ldrh	w0, [x21, #:lo12:.LANCHOR75]
 	mov	w21, 0
 	strh	w0, [x28, 2]
 	ldrh	w0, [x20, 4]
 	strh	w0, [x28, 8]
 	ldrh	w0, [x20, 6]
 	strh	w0, [x28, 10]
-	adrp	x0, .LANCHOR36
-	ldr	w0, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR37
+	ldr	w0, [x0, #:lo12:.LANCHOR37]
 	strh	w0, [x28, 12]
-.L1455:
+.L1528:
 	ldrh	w4, [x28, 10]
 	ldrh	w1, [x20]
 	ldrh	w2, [x20, 2]
 	ldrh	w3, [x20, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x0, [x19, 8]
-	ldr	x0, [x24, #:lo12:.LANCHOR185]
+	ldr	x0, [x24, #:lo12:.LANCHOR188]
 	str	x0, [x19, 16]
 	orr	w0, w2, w1, lsl 10
 	str	wzr, [x19]
@@ -9909,7 +10399,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1456
+	blt	.L1529
 	ldr	w0, [x20, 8]
 	mov	w2, 1
 	ldrh	w1, [x20, 4]
@@ -9919,10 +10409,10 @@ FtlBbmTblFlush:
 	ldrh	w0, [x20]
 	strh	w0, [x28, 8]
 	strh	w0, [x20, 4]
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR78
 	strh	w1, [x20]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	str	w1, [x19, 4]
 	strh	wzr, [x20, 2]
 	str	w1, [x0, 4]
@@ -9933,29 +10423,29 @@ FtlBbmTblFlush:
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L1456:
+.L1529:
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
 	strh	w0, [x20, 2]
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1457
+	bne	.L1530
 	ldr	w1, [x19, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC32
+	adrp	x0, .LC34
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC32
+	add	x0, x0, :lo12:.LC34
 	bl	printf
 	cmp	w21, 3
-	bls	.L1455
+	bls	.L1528
 	ldr	w1, [x19, 4]
 	mov	w2, w21
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
 	bl	printf
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR76]
-.L1452:
+	str	w0, [x22, #:lo12:.LANCHOR77]
+.L1525:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9964,7 +10454,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1454:
+.L1527:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x20, 8]
@@ -9973,62 +10463,62 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1453
-.L1457:
-	cbnz	w26, .L1452
+	b	.L1526
+.L1530:
+	cbnz	w26, .L1525
 	mov	w26, 1
-	b	.L1455
+	b	.L1528
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1525
+	adrp	x1, .LANCHOR77
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cbnz	w1, .L1598
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR85
-	add	x0, x27, :lo12:.LANCHOR85
+	adrp	x27, .LANCHOR86
+	add	x0, x27, :lo12:.LANCHOR86
 	stp	x23, x24, [sp, 48]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR88
-	add	x23, x0, :lo12:.LANCHOR88
+	adrp	x0, .LANCHOR89
+	add	x23, x0, :lo12:.LANCHOR89
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1516:
+.L1589:
 	ldr	x1, [x29, 120]
-	adrp	x0, .LANCHOR88
-	adrp	x25, .LANCHOR39
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	adrp	x25, .LANCHOR40
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1465
-	mov	w2, 2861
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	ble	.L1538
+	mov	w2, 3168
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1465:
-	adrp	x0, .LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR93
+.L1538:
+	adrp	x0, .LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR94
 	cmp	x19, x0
-	bne	.L1466
-	adrp	x1, .LANCHOR169
+	bne	.L1539
+	adrp	x1, .LANCHOR172
 	ldrh	w2, [x23]
-	ldr	w3, [x1, #:lo12:.LANCHOR169]
+	ldr	w3, [x1, #:lo12:.LANCHOR172]
 	lsr	w0, w2, 1
 	add	w4, w0, 1
 	mul	w1, w2, w3
@@ -10036,65 +10526,65 @@ allocate_data_superblock:
 	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
 	ldr	w4, [x4, #:lo12:.LANCHOR28]
-	cbz	w4, .L1467
-	adrp	x4, .LANCHOR167
-	ldr	w4, [x4, #:lo12:.LANCHOR167]
-	cmp	w4, 29
-	bhi	.L1467
+	cbz	w4, .L1540
+	adrp	x4, .LANCHOR170
+	ldr	w4, [x4, #:lo12:.LANCHOR170]
+	cmp	w4, 39
+	bhi	.L1540
 	cmp	w4, 2
-	bls	.L1500
-	tbz	x2, 0, .L1496
-	cbz	w3, .L1500
-.L1496:
+	bls	.L1573
+	tbz	x2, 0, .L1569
+	cbz	w3, .L1573
+.L1569:
 	mov	w1, w0
-	b	.L1467
-.L1466:
+	b	.L1540
+.L1539:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1500
-	adrp	x0, .LANCHOR43
-	ldrh	w0, [x0, #:lo12:.LANCHOR43]
+	bne	.L1573
+	adrp	x0, .LANCHOR44
+	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w0, 1
-	beq	.L1500
+	beq	.L1573
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1500
+	cbnz	w0, .L1573
 	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
 	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1467
-	adrp	x2, .LANCHOR167
-	ldr	w2, [x2, #:lo12:.LANCHOR167]
+	cbz	w2, .L1540
+	adrp	x2, .LANCHOR170
+	ldr	w2, [x2, #:lo12:.LANCHOR170]
 	cmp	w2, 1
-	bhi	.L1467
+	bhi	.L1540
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1467:
-	cbz	w1, .L1468
+.L1540:
+	cbz	w1, .L1541
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1468:
+.L1541:
 	ldrb	w2, [x19, 8]
-	adrp	x0, .LANCHOR87
-	add	x0, x0, :lo12:.LANCHOR87
+	adrp	x0, .LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR88
 	bl	List_pop_index_node
 	and	w21, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1469
-	mov	w2, 2881
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1542
+	mov	w2, 3188
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1469:
+.L1542:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
@@ -10102,241 +10592,241 @@ allocate_data_superblock:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1470
-	adrp	x0, .LANCHOR83
+	cbnz	w0, .L1543
+	adrp	x0, .LANCHOR84
 	ubfiz	x21, x21, 1, 16
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	strh	w1, [x0, x21]
-	ldrh	w1, [x27, #:lo12:.LANCHOR85]
+	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1516
-	mov	w2, 2893
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	ble	.L1589
+	mov	w2, 3200
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1516
-.L1500:
+	b	.L1589
+.L1573:
 	mov	w1, 0
-	b	.L1468
-.L1470:
-	ldrh	w1, [x27, #:lo12:.LANCHOR85]
+	b	.L1541
+.L1543:
+	ldrh	w1, [x27, #:lo12:.LANCHOR86]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1472
-	mov	w2, 2896
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	ble	.L1545
+	mov	w2, 3203
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1472:
-	adrp	x1, .LANCHOR37
-	adrp	x24, .LANCHOR77
+.L1545:
+	adrp	x1, .LANCHOR38
+	adrp	x24, .LANCHOR78
 	mov	w2, 56
 	mov	x3, 8
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	add	x26, x19, 16
-	ldr	x4, [x24, #:lo12:.LANCHOR77]
+	ldr	x4, [x24, #:lo12:.LANCHOR78]
 	mov	x5, x26
 	mov	w20, 0
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1473:
+.L1546:
 	cmp	x1, x0
-	bne	.L1475
-	cbnz	w20, .L1476
-	mov	w2, 2908
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	bne	.L1548
+	cbnz	w20, .L1549
+	mov	w2, 3215
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1476:
+.L1549:
 	adrp	x0, .LANCHOR28
 	uxtw	x22, w21
-	adrp	x28, .LANCHOR78
+	adrp	x28, .LANCHOR79
 	ldr	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L1477
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
+	cbz	w0, .L1550
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	bne	.L1477
-	ldr	x0, [x28, #:lo12:.LANCHOR78]
+	bne	.L1550
+	ldr	x0, [x28, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, x22, lsl 1]
-	cmp	w0, 30
-	bls	.L1477
+	cmp	w0, 40
+	bls	.L1550
 	strb	wzr, [x19, 8]
-.L1477:
-	adrp	x0, .LANCHOR201
-	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+.L1550:
+	adrp	x0, .LANCHOR204
+	ldrh	w0, [x0, #:lo12:.LANCHOR204]
 	cmp	w0, w21
-	bne	.L1478
-	mov	w2, 2915
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	bne	.L1551
+	mov	w2, 3222
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1478:
+.L1551:
 	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR47
-	adrp	x5, .LANCHOR164
-	adrp	x4, .LANCHOR165
-	cbnz	w0, .L1479
-	ldr	x2, [x28, #:lo12:.LANCHOR78]
+	adrp	x6, .LANCHOR48
+	adrp	x5, .LANCHOR167
+	adrp	x4, .LANCHOR168
+	cbnz	w0, .L1552
+	ldr	x2, [x28, #:lo12:.LANCHOR79]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L1480
-	ldrh	w7, [x6, #:lo12:.LANCHOR47]
+	cbz	w0, .L1553
+	ldrh	w7, [x6, #:lo12:.LANCHOR48]
 	add	w0, w0, w7
-.L1528:
+.L1601:
 	strh	w0, [x2, x1]
 	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR164]
+	ldr	w0, [x5, #:lo12:.LANCHOR167]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR164]
+	str	w0, [x5, #:lo12:.LANCHOR167]
 	mov	w0, w21
 	bl	ftl_set_blk_mode
-.L1482:
-	ldr	x0, [x28, #:lo12:.LANCHOR78]
+.L1555:
+	ldr	x0, [x28, #:lo12:.LANCHOR79]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR166
-	ldr	w2, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR169
+	ldr	w2, [x0, #:lo12:.LANCHOR169]
 	cmp	w1, w2
-	bls	.L1483
-	str	w1, [x0, #:lo12:.LANCHOR166]
-.L1483:
-	ldr	w2, [x5, #:lo12:.LANCHOR164]
+	bls	.L1556
+	str	w1, [x0, #:lo12:.LANCHOR169]
+.L1556:
+	ldr	w2, [x5, #:lo12:.LANCHOR167]
 	mov	x3, 4
-	ldr	w1, [x4, #:lo12:.LANCHOR165]
-	ldrh	w0, [x6, #:lo12:.LANCHOR47]
+	ldr	w1, [x4, #:lo12:.LANCHOR168]
+	ldrh	w0, [x6, #:lo12:.LANCHOR48]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR39]
+	ldrh	w1, [x25, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR202
-	str	w0, [x1, #:lo12:.LANCHOR202]
-	adrp	x0, .LANCHOR188
-	ldr	x1, [x0, #:lo12:.LANCHOR188]
+	adrp	x1, .LANCHOR205
+	str	w0, [x1, #:lo12:.LANCHOR205]
+	adrp	x0, .LANCHOR191
+	ldr	x1, [x0, #:lo12:.LANCHOR191]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x24, #:lo12:.LANCHOR77]
+	ldr	x0, [x24, #:lo12:.LANCHOR78]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1484:
+.L1557:
 	cmp	x1, x2
-	bne	.L1485
+	bne	.L1558
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1486
+	cbz	w1, .L1559
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1487
+	bne	.L1560
 	mov	w1, 0
-.L1529:
+.L1602:
 	bl	FlashEraseBlocks
-.L1486:
+.L1559:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x24, #:lo12:.LANCHOR77]
+	ldr	x0, [x24, #:lo12:.LANCHOR78]
 	mov	x25, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1488:
+.L1561:
 	cmp	w20, w25, uxth
-	bhi	.L1490
-	cbz	w1, .L1491
+	bhi	.L1563
+	cbz	w1, .L1564
 	mov	w0, w21
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1491:
+.L1564:
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR83
-	cbnz	w0, .L1492
-	ldr	x0, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR84
+	cbnz	w0, .L1565
+	ldr	x0, [x2, #:lo12:.LANCHOR84]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	b	.L1516
-.L1475:
+	b	.L1589
+.L1548:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1474
+	beq	.L1547
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1474:
+.L1547:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1473
-.L1480:
+	b	.L1546
+.L1553:
 	mov	w0, 2
-	b	.L1528
-.L1479:
-	ldr	x2, [x28, #:lo12:.LANCHOR78]
+	b	.L1601
+.L1552:
+	ldr	x2, [x28, #:lo12:.LANCHOR79]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	ldr	w0, [x4, #:lo12:.LANCHOR165]
+	ldr	w0, [x4, #:lo12:.LANCHOR168]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR165]
+	str	w0, [x4, #:lo12:.LANCHOR168]
 	mov	w0, w21
-	bl	ftl_set_blk_mode.part.9
-	b	.L1482
-.L1485:
+	bl	ftl_set_blk_mode.part.10
+	b	.L1555
+.L1558:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1484
-.L1487:
+	b	.L1557
+.L1560:
 	mov	w1, 1
-	b	.L1529
-.L1490:
+	b	.L1602
+.L1563:
 	mul	x0, x25, x3
-	ldr	x2, [x24, #:lo12:.LANCHOR77]
+	ldr	x2, [x24, #:lo12:.LANCHOR78]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1489
+	bne	.L1562
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10349,43 +10839,43 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1489:
+.L1562:
 	add	x25, x25, 1
 	add	x26, x26, 2
-	b	.L1488
-.L1492:
-	adrp	x1, .LANCHOR52
-	adrp	x3, .LANCHOR156
+	b	.L1561
+.L1565:
+	adrp	x1, .LANCHOR53
+	adrp	x3, .LANCHOR159
 	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	strh	wzr, [x19, 2]
 	strh	w21, [x19]
 	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR156]
+	ldr	w1, [x3, #:lo12:.LANCHOR159]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR156]
-	ldr	x1, [x2, #:lo12:.LANCHOR83]
+	str	w1, [x3, #:lo12:.LANCHOR159]
+	ldr	x1, [x2, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
 	strh	w0, [x1, x22]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1493
+	cbz	w0, .L1566
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1464
-.L1493:
-	mov	w2, 2974
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1537
+.L1566:
+	mov	w2, 3281
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1464:
+.L1537:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10394,7 +10884,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1525:
+.L1598:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10406,24 +10896,24 @@ FtlGcFreeBadSuperBlk:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR114
+	adrp	x21, .LANCHOR117
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR114]
+	ldrh	w0, [x21, #:lo12:.LANCHOR117]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1531
-	adrp	x23, .LANCHOR115
-	add	x24, x23, :lo12:.LANCHOR115
+	cbz	w0, .L1604
+	adrp	x23, .LANCHOR118
+	add	x24, x23, :lo12:.LANCHOR118
 	mov	w19, 0
-.L1532:
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+.L1605:
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w0, w19
-	bhi	.L1538
+	bhi	.L1611
 	bl	FtlGcReFreshBadBlk
-.L1531:
+.L1604:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10432,28 +10922,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1538:
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+.L1611:
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
 	mov	w1, w25
-	add	x22, x21, :lo12:.LANCHOR114
+	add	x22, x21, :lo12:.LANCHOR117
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1533:
+.L1606:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1537
+	bhi	.L1610
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1532
-.L1537:
-	add	x0, x23, :lo12:.LANCHOR115
+	b	.L1605
+.L1610:
+	add	x0, x23, :lo12:.LANCHOR118
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1534
+	bne	.L1607
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10461,22 +10951,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1535:
+.L1608:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1536
+	bhi	.L1609
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1534:
+.L1607:
 	and	w20, w27, 65535
-	b	.L1533
-.L1536:
+	b	.L1606
+.L1609:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1535
+	b	.L1608
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -10484,92 +10974,92 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1544
-	adrp	x0, .LANCHOR201
-	ldrh	w1, [x0, #:lo12:.LANCHOR201]
+	cbnz	w0, .L1617
+	adrp	x0, .LANCHOR204
+	ldrh	w1, [x0, #:lo12:.LANCHOR204]
 	cmp	w1, w19
-	bne	.L1545
+	bne	.L1618
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR201]
-.L1546:
-	adrp	x20, .LANCHOR85
+	strh	w1, [x0, #:lo12:.LANCHOR204]
+.L1619:
+	adrp	x20, .LANCHOR86
 	mov	w1, w19
-	adrp	x0, .LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR82
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
-	cbnz	w0, .L1548
-	mov	w2, 3085
-	adrp	x1, .LANCHOR203
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC6
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
+	cbnz	w0, .L1621
+	mov	w2, 3392
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1548:
-	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+.L1621:
+	ldrh	w0, [x20, #:lo12:.LANCHOR86]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR85]
+	strh	w0, [x20, #:lo12:.LANCHOR86]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x20, #:lo12:.LANCHOR85]
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x20, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	cmp	w0, w1
-	ble	.L1552
-	mov	w2, 3088
-	adrp	x1, .LANCHOR203
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC6
+	ble	.L1625
+	mov	w2, 3395
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1552:
+.L1625:
 	mov	w0, 1
-	b	.L1543
-.L1545:
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w0, w19
-	beq	.L1551
+	b	.L1616
+.L1618:
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L1551
+	beq	.L1624
 	adrp	x0, .LANCHOR93
 	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w19
-	bne	.L1546
-.L1551:
+	beq	.L1624
+	adrp	x0, .LANCHOR94
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
+	cmp	w0, w19
+	bne	.L1619
+.L1624:
 	mov	w0, 0
-.L1543:
+.L1616:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1544:
+.L1617:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1551
+	b	.L1624
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -10580,90 +11070,130 @@ decrement_vpc_count:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	str	x21, [sp, 32]
+	stp	x21, x22, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1555
-	adrp	x21, .LANCHOR83
-	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR83]
-	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1556
+	beq	.L1628
+	adrp	x20, .LANCHOR84
+	ubfiz	x21, x19, 1, 16
+	ldr	x1, [x20, #:lo12:.LANCHOR84]
+	ldrh	w0, [x1, x21]
+	cbnz	w0, .L1629
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
-	ldrh	w0, [x0, x20]
-	cbz	w0, .L1557
-.L1562:
-	mov	w20, 0
-.L1554:
-	mov	w0, w20
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L1557:
-	mov	w2, 3103
-	adrp	x1, .LANCHOR204
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC6
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, x21]
+	cbnz	w0, .L1630
+	mov	w2, 3410
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1562
-.L1556:
+.L1630:
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	adrp	x6, .LANCHOR88
+	add	x6, x6, :lo12:.LANCHOR88
+	mov	w1, 32
+	strh	w1, [x0, x21]
+	mov	w1, w19
+	mov	x0, x6
+	bl	test_node_in_list
+	cbz	w0, .L1631
+	adrp	x22, .LANCHOR89
+	mov	w1, w19
+	mov	x0, x6
+	bl	List_remove_node
+	ldrh	w0, [x22, #:lo12:.LANCHOR89]
+	cbnz	w0, .L1632
+	mov	w2, 3414
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L1632:
+	ldrh	w0, [x22, #:lo12:.LANCHOR89]
 	sub	w0, w0, #1
-	strh	w0, [x1, x20]
-.L1555:
-	adrp	x21, .LANCHOR130
+	strh	w0, [x22, #:lo12:.LANCHOR89]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	mov	w1, w19
+	ldrh	w2, [x0, x21]
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	bl	printf
+.L1631:
+	mov	w0, w19
+	bl	FtlGcRefreshBlock
+.L1635:
+	mov	w20, 0
+	b	.L1627
+.L1629:
+	sub	w0, w0, #1
+	strh	w0, [x1, x21]
+.L1628:
+	adrp	x21, .LANCHOR133
 	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR130]
+	ldrh	w0, [x21, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bne	.L1559
-	strh	w19, [x21, #:lo12:.LANCHOR130]
-	b	.L1562
-.L1559:
+	bne	.L1634
+	strh	w19, [x21, #:lo12:.LANCHOR133]
+	b	.L1635
+.L1634:
 	cmp	w19, w0
-	beq	.L1562
+	beq	.L1635
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR81
-	adrp	x0, .LANCHOR82
-	strh	w19, [x21, #:lo12:.LANCHOR130]
+	adrp	x1, .LANCHOR82
+	adrp	x0, .LANCHOR83
+	strh	w19, [x21, #:lo12:.LANCHOR133]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR81]
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR83
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR84
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1554
+	cbnz	w1, .L1627
 	cmp	w19, w0, uxth
-	beq	.L1554
-	mov	w2, 3125
-	adrp	x1, .LANCHOR204
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC6
+	beq	.L1627
+	mov	w2, 3435
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L1554
+.L1627:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -10671,7 +11201,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1575
+	cbz	w1, .L1652
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10680,86 +11210,86 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1563
+	beq	.L1640
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR8
-	adrp	x21, .LANCHOR117
+	adrp	x21, .LANCHOR120
 	add	x0, x0, 8
 	add	x23, x22, :lo12:.LANCHOR8
-	add	x21, x21, :lo12:.LANCHOR117
+	add	x21, x21, :lo12:.LANCHOR120
 	ldrh	w0, [x19, x0, lsl 1]
-.L1567:
+.L1644:
 	cmp	w0, w20
-	beq	.L1569
+	beq	.L1646
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1570
+	bne	.L1647
 	ldrb	w1, [x23]
-	cbnz	w1, .L1570
+	cbnz	w1, .L1647
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1570
+	bne	.L1647
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1569
+	cbnz	w0, .L1646
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1578:
+.L1655:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1563:
+.L1640:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1569:
+.L1646:
 	ldrb	w0, [x19, 6]
-	adrp	x1, .LANCHOR37
+	adrp	x1, .LANCHOR38
 	add	w0, w0, 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1568
+	bne	.L1645
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1568:
+.L1645:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1567
-.L1570:
+	b	.L1644
+.L1647:
 	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1563
+	cbz	w1, .L1640
 	cmp	w0, 1
-	bne	.L1563
-	adrp	x0, .LANCHOR53
+	bne	.L1640
+	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1563
+	bcc	.L1640
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR53
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	b	.L1578
-.L1575:
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	b	.L1655
+.L1652:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -10777,174 +11307,174 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1580
-	mov	w2, 3025
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	bne	.L1657
+	mov	w2, 3332
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1580:
-	adrp	x20, .LANCHOR52
+.L1657:
+	adrp	x20, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1581
-	mov	w2, 3026
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	bne	.L1658
+	mov	w2, 3333
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1581:
+.L1658:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1582
-	mov	w2, 3027
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1659
+	mov	w2, 3334
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1582:
+.L1659:
 	ldrb	w0, [x19, 6]
-	adrp	x21, .LANCHOR37
+	adrp	x21, .LANCHOR38
 	strb	wzr, [x19, 10]
 	adrp	x23, .LANCHOR8
 	add	x0, x0, 8
-	adrp	x24, .LANCHOR117
+	adrp	x24, .LANCHOR120
 	add	x23, x23, :lo12:.LANCHOR8
-	add	x24, x24, :lo12:.LANCHOR117
-	add	x25, x21, :lo12:.LANCHOR37
+	add	x24, x24, :lo12:.LANCHOR120
+	add	x25, x21, :lo12:.LANCHOR38
 	ldrh	w22, [x19, x0, lsl 1]
-.L1583:
+.L1660:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1584
+	beq	.L1661
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1586
+	bne	.L1663
 	ldrb	w3, [x23]
-	cbnz	w3, .L1586
+	cbnz	w3, .L1663
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1586
+	bne	.L1663
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1584:
+.L1661:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1585
+	bne	.L1662
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1585:
+.L1662:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1583
-.L1586:
+	b	.L1660
+.L1663:
 	adrp	x23, .LANCHOR8
-	adrp	x24, .LANCHOR117
+	adrp	x24, .LANCHOR120
 	orr	w22, w0, w22, lsl 10
 	add	x23, x23, :lo12:.LANCHOR8
-	add	x24, x24, :lo12:.LANCHOR117
+	add	x24, x24, :lo12:.LANCHOR120
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1587:
+.L1664:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
-	ldrh	w3, [x21, #:lo12:.LANCHOR37]
-.L1589:
+	ldrh	w3, [x21, #:lo12:.LANCHOR38]
+.L1666:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1588
+	bne	.L1665
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1588:
+.L1665:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1589
+	beq	.L1666
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1590
+	bne	.L1667
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1591
+	cbnz	w2, .L1668
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1590
+	bne	.L1667
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1590
+	cbz	w0, .L1667
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1587
-.L1591:
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	b	.L1664
+.L1668:
+	adrp	x1, .LANCHOR54
+	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	cmp	w0, w1
-	bcc	.L1590
+	bcc	.L1667
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1590:
+.L1667:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1579
+	bne	.L1656
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1579
-	mov	w2, 3071
-	adrp	x1, .LANCHOR205
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC6
+	cbz	w0, .L1656
+	mov	w2, 3378
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1579:
+.L1656:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10961,48 +11491,48 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR76
+	adrp	x23, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR76]
+	ldr	w0, [x23, #:lo12:.LANCHOR77]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x23, [x29, 104]
-	cbnz	w0, .L1604
-	adrp	x25, .LANCHOR185
-	adrp	x28, .LANCHOR199
-	adrp	x27, .LANCHOR206
-	add	x21, x28, :lo12:.LANCHOR199
-	ldr	x20, [x25, #:lo12:.LANCHOR185]
-	adrp	x24, .LANCHOR180
-	ldrh	w2, [x27, #:lo12:.LANCHOR206]
-	add	x1, x27, :lo12:.LANCHOR206
-	ldr	x0, [x24, #:lo12:.LANCHOR180]
+	cbnz	w0, .L1681
+	adrp	x25, .LANCHOR188
+	adrp	x28, .LANCHOR202
+	adrp	x27, .LANCHOR209
+	add	x21, x28, :lo12:.LANCHOR202
+	ldr	x20, [x25, #:lo12:.LANCHOR188]
+	adrp	x24, .LANCHOR183
+	ldrh	w2, [x27, #:lo12:.LANCHOR209]
+	add	x1, x27, :lo12:.LANCHOR209
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	mov	w3, 19539
 	stp	x0, x20, [x21, 8]
 	movk	w3, 0x4654, lsl 16
 	strh	w2, [x20, 2]
 	mov	w2, -3932
 	strh	w2, [x20]
-	adrp	x22, .LANCHOR156
+	adrp	x22, .LANCHOR159
 	ldr	w2, [x1, 8]
-	adrp	x26, .LANCHOR39
+	adrp	x26, .LANCHOR40
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
-	adrp	x2, .LANCHOR80
-	add	x19, x2, :lo12:.LANCHOR80
+	adrp	x2, .LANCHOR81
+	add	x19, x2, :lo12:.LANCHOR81
 	str	wzr, [x20, 12]
-	str	w3, [x2, #:lo12:.LANCHOR80]
-	mov	w2, 72
+	str	w3, [x2, #:lo12:.LANCHOR81]
+	mov	w2, 73
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
-	adrp	x1, .LANCHOR44
+	adrp	x1, .LANCHOR45
 	str	w2, [x19, 4]
-	adrp	x2, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR44]
+	adrp	x2, .LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	strb	w1, [x19, 10]
-	add	x1, x2, :lo12:.LANCHOR91
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	strh	w2, [x19, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -11010,9 +11540,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 16]
-	adrp	x2, .LANCHOR92
-	add	x1, x2, :lo12:.LANCHOR92
-	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	adrp	x2, .LANCHOR93
+	add	x1, x2, :lo12:.LANCHOR93
+	ldrh	w2, [x2, #:lo12:.LANCHOR93]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
@@ -11020,26 +11550,32 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 20]
-	adrp	x2, .LANCHOR93
-	add	x1, x2, :lo12:.LANCHOR93
-	ldrh	w2, [x2, #:lo12:.LANCHOR93]
+	adrp	x2, .LANCHOR94
+	add	x1, x2, :lo12:.LANCHOR94
+	ldrh	w2, [x2, #:lo12:.LANCHOR94]
 	strh	w2, [x19, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x19, 13]
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR167
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR164]
+	ldr	w1, [x1, #:lo12:.LANCHOR167]
 	str	w1, [x19, 32]
-	ldr	w1, [x22, #:lo12:.LANCHOR156]
+	ldr	w1, [x22, #:lo12:.LANCHOR159]
 	str	w1, [x19, 40]
-	adrp	x1, .LANCHOR157
-	ldr	w1, [x1, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR160
+	ldr	w1, [x1, #:lo12:.LANCHOR160]
 	str	w1, [x19, 36]
-	adrp	x1, .LANCHOR57
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR113
+	ldrh	w1, [x1, #:lo12:.LANCHOR113]
+	strh	w1, [x19, 44]
+	adrp	x1, .LANCHOR114
+	ldrh	w1, [x1, #:lo12:.LANCHOR114]
+	strh	w1, [x19, 46]
+	adrp	x1, .LANCHOR58
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x21, 8]
@@ -11047,14 +11583,14 @@ FtlVpcTblFlush:
 	mov	w2, 48
 	mov	x19, x28
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR83
-	ldrh	w2, [x26, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR84
+	ldrh	w2, [x26, #:lo12:.LANCHOR40]
 	ldr	x0, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x26, #:lo12:.LANCHOR39]
+	ldrh	w0, [x26, #:lo12:.LANCHOR40]
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR0]
@@ -11065,38 +11601,38 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L1605
-	ldrh	w0, [x26, #:lo12:.LANCHOR39]
-	adrp	x1, .LANCHOR66
+	adrp	x0, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L1682
+	ldrh	w0, [x26, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR67
 	ldr	x3, [x21, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR66]
+	ldrh	w2, [x1, #:lo12:.LANCHOR67]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
-	adrp	x1, .LANCHOR128
+	adrp	x1, .LANCHOR131
 	add	w0, w0, 52
 	lsl	w2, w2, 2
-	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1605:
+.L1682:
 	mov	w0, 0
-	add	x28, x19, :lo12:.LANCHOR199
+	add	x28, x19, :lo12:.LANCHOR202
 	bl	FtlUpdateVaildLpn
-	add	x23, x27, :lo12:.LANCHOR206
+	add	x23, x27, :lo12:.LANCHOR209
 	mov	w21, 0
-	adrp	x27, .LANCHOR53
+	adrp	x27, .LANCHOR54
 	mov	w26, 65535
-	add	x0, x27, :lo12:.LANCHOR53
+	add	x0, x27, :lo12:.LANCHOR54
 	str	x0, [x29, 96]
-.L1606:
-	ldr	x0, [x24, #:lo12:.LANCHOR180]
+.L1683:
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	mov	w3, 1
 	str	x0, [x28, 8]
 	mov	w2, w3
-	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	ldr	x0, [x25, #:lo12:.LANCHOR188]
 	ldrh	w1, [x23, 2]
 	str	x0, [x28, 16]
 	ldrh	w0, [x23]
@@ -11105,22 +11641,22 @@ FtlVpcTblFlush:
 	str	w0, [x28, 4]
 	mov	x0, x28
 	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR53]
+	ldrh	w0, [x27, #:lo12:.LANCHOR54]
 	ldrh	w1, [x23, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1607
+	blt	.L1684
 	ldrh	w0, [x23]
 	ldrh	w26, [x23, 4]
 	strh	wzr, [x23, 2]
 	strh	w0, [x23, 4]
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x23]
-	ldr	w1, [x22, #:lo12:.LANCHOR156]
+	ldr	w1, [x22, #:lo12:.LANCHOR159]
 	mov	w3, 1
 	str	w1, [x23, 8]
 	add	w2, w1, 1
-	str	w2, [x22, #:lo12:.LANCHOR156]
+	str	w2, [x22, #:lo12:.LANCHOR159]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
 	strh	w0, [x20, 2]
@@ -11129,50 +11665,50 @@ FtlVpcTblFlush:
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.L1607:
+.L1684:
 	ldrh	w0, [x23, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x23, 2]
 	cmn	w1, #1
-	bne	.L1608
+	bne	.L1685
 	cmp	w0, 1
-	bne	.L1609
-	mov	w2, 1213
-	adrp	x1, .LANCHOR207
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR207
-	add	x0, x0, :lo12:.LC6
+	bne	.L1686
+	mov	w2, 1219
+	adrp	x1, .LANCHOR210
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR210
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1609:
+.L1686:
 	ldrh	w0, [x23, 2]
 	cmp	w0, 1
-	bne	.L1610
+	bne	.L1687
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x23, 2]
-.L1610:
+.L1687:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1606
-	add	x19, x19, :lo12:.LANCHOR199
+	bls	.L1683
+	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, w21
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	ldr	w1, [x19, 4]
 	bl	printf
 	ldr	x1, [x29, 104]
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR76]
-.L1604:
+	str	w0, [x1, #:lo12:.LANCHOR77]
+.L1681:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11181,18 +11717,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1608:
+.L1685:
 	cmp	w0, 1
-	beq	.L1606
+	beq	.L1683
 	cmp	w1, 256
-	beq	.L1606
+	beq	.L1683
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1604
+	beq	.L1681
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1604
+	b	.L1681
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11200,82 +11736,94 @@ FtlVpcTblFlush:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 	stp	x29, x30, [sp, -128]!
+	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
+	str	x23, [sp, 48]
+	ldr	w23, [x1, #:lo12:.LANCHOR77]
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x0, .LANCHOR8
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1632
-	ldrb	w20, [x19, 8]
-	cmp	w20, 1
-	bne	.L1632
-	ldrh	w21, [x19, 4]
-.L1624:
-	adrp	x22, .LANCHOR157
-	add	x22, x22, :lo12:.LANCHOR157
-	mov	w24, -1
-	adrp	x23, .LANCHOR180
-.L1625:
+	cbnz	w23, .L1700
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L1711
+	ldrb	w1, [x0, 8]
+	cmp	w1, 1
+	bne	.L1711
+	ldrh	w21, [x0, 4]
+	mov	w23, w1
+.L1702:
+	adrp	x1, .LANCHOR188
+	mov	x19, x0
+	mov	w0, -1
+	str	w0, [x29, 96]
+	ldr	x20, [x1, #:lo12:.LANCHOR188]
+	adrp	x0, .LANCHOR183
+	str	x20, [x29, 88]
+	mov	w1, -3
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	adrp	x22, .LANCHOR160
+	str	x0, [x29, 80]
+	add	x22, x22, :lo12:.LANCHOR160
+	str	w1, [x20, 8]
+	mov	w1, -2
+	str	w1, [x20, 12]
+	ldrh	w1, [x19]
+	strh	w1, [x20, 2]
+	strh	wzr, [x20]
+	mov	w1, 61589
+	str	w1, [x0]
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
+	str	w1, [x0, 4]
+.L1703:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1627
+	beq	.L1706
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1626
-.L1627:
+	cbnz	w0, .L1704
+.L1706:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR83
+	adrp	x1, .LANCHOR84
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR84]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR53
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	strh	w0, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+.L1700:
 	ldp	x19, x20, [sp, 16]
-	ldp	x23, x24, [sp, 48]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1632:
-	mov	w20, 0
+.L1711:
 	mov	w21, 12
-	b	.L1624
-.L1626:
+	b	.L1702
+.L1704:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1627
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
-	mov	w3, 0
-	str	x0, [x29, 80]
-	mov	w2, w20
-	adrp	x0, .LANCHOR185
-	str	w24, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR185]
-	str	x1, [x29, 88]
-	ldrh	w0, [x19]
-	strh	w0, [x1, 2]
+	beq	.L1706
 	ldr	w0, [x22]
-	stp	w0, w24, [x1, 4]
+	mov	w3, 0
+	str	w0, [x20, 4]
+	mov	w2, w23
 	add	w0, w0, 1
-	strh	wzr, [x1]
+	mov	w1, 1
 	cmn	w0, #1
-	str	w24, [x1, 12]
 	csel	w0, w0, wzr, ne
-	mov	w1, 1
 	str	w0, [x22]
 	add	x0, x29, 72
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1625
+	b	.L1703
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11283,34 +11831,34 @@ FtlSuperblockPowerLostFix:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR180
-	adrp	x0, .LANCHOR199
-	add	x1, x0, :lo12:.LANCHOR199
+	adrp	x2, .LANCHOR183
+	adrp	x0, .LANCHOR202
+	add	x1, x0, :lo12:.LANCHOR202
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR180]
+	ldr	x2, [x2, #:lo12:.LANCHOR183]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR50
+	adrp	x26, .LANCHOR51
 	stp	x27, x28, [sp, 80]
-	add	x28, x26, :lo12:.LANCHOR50
+	add	x28, x26, :lo12:.LANCHOR51
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR74
+	adrp	x20, .LANCHOR75
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR74
+	add	x20, x20, :lo12:.LANCHOR75
 	str	x2, [x1, 8]
-	adrp	x2, .LANCHOR185
-	adrp	x23, .LANCHOR44
+	adrp	x2, .LANCHOR188
+	adrp	x23, .LANCHOR45
 	add	x20, x20, 12
-	ldr	x25, [x2, #:lo12:.LANCHOR185]
-	add	x23, x23, :lo12:.LANCHOR44
+	ldr	x25, [x2, #:lo12:.LANCHOR188]
+	add	x23, x23, :lo12:.LANCHOR45
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1639:
+.L1717:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1644
+	bcc	.L1722
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11319,18 +11867,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1644:
-	ldrh	w19, [x26, #:lo12:.LANCHOR50]
-	add	x24, x22, :lo12:.LANCHOR199
+.L1722:
+	ldrh	w19, [x26, #:lo12:.LANCHOR51]
+	add	x24, x22, :lo12:.LANCHOR202
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1640:
+.L1718:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1642
+	bgt	.L1720
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11342,19 +11890,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1641
+	beq	.L1719
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1641
+	bne	.L1719
 	strh	w19, [x20]
-.L1642:
+.L1720:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1639
-.L1641:
+	b	.L1717
+.L1719:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1640
+	b	.L1718
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11368,10 +11916,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1650
-	adrp	x1, .LANCHOR53
-	ldrh	w19, [x1, #:lo12:.LANCHOR53]
-.L1651:
+	bne	.L1728
+	adrp	x1, .LANCHOR54
+	ldrh	w19, [x1, #:lo12:.LANCHOR54]
+.L1729:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11385,24 +11933,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1652
+	bne	.L1730
 	mov	w22, 0
 	mov	w24, 2
-.L1653:
+.L1731:
 	cmp	w22, w19
-	ble	.L1656
-.L1652:
+	ble	.L1734
+.L1730:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1650:
-	adrp	x1, .LANCHOR52
-	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-	b	.L1651
-.L1656:
+.L1728:
+	adrp	x1, .LANCHOR53
+	ldrh	w19, [x1, #:lo12:.LANCHOR53]
+	b	.L1729
+.L1734:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11414,20 +11962,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1654
+	bne	.L1732
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1654
+	bne	.L1732
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1654
+	beq	.L1732
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1653
-.L1654:
+	b	.L1731
+.L1732:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1653
+	b	.L1731
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -11437,29 +11985,29 @@ FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR180
+	adrp	x23, .LANCHOR183
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR50
+	adrp	x24, .LANCHOR51
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR199
-	add	x20, x22, :lo12:.LANCHOR199
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	adrp	x22, .LANCHOR202
+	add	x20, x22, :lo12:.LANCHOR202
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x25, [sp, 64]
 	mov	w25, 61649
 	str	x0, [x20, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR188
+	ldr	x21, [x0, #:lo12:.LANCHOR188]
 	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
-	ldrh	w19, [x24, #:lo12:.LANCHOR50]
-	add	x24, x24, :lo12:.LANCHOR50
+	ldrh	w19, [x24, #:lo12:.LANCHOR51]
+	add	x24, x24, :lo12:.LANCHOR51
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1662:
+.L1740:
 	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1665
+	bgt	.L1743
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -11468,7 +12016,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1663
+	bne	.L1741
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -11476,141 +12024,141 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1663:
+.L1741:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1664
+	beq	.L1742
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1664
-	adrp	x1, .LANCHOR74
-	add	x0, x1, :lo12:.LANCHOR74
-	strh	w19, [x1, #:lo12:.LANCHOR74]
+	bne	.L1742
+	adrp	x1, .LANCHOR75
+	add	x0, x1, :lo12:.LANCHOR75
+	strh	w19, [x1, #:lo12:.LANCHOR75]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1665:
-	adrp	x19, .LANCHOR74
+.L1743:
+	adrp	x19, .LANCHOR75
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR74
-	ldrh	w1, [x19, #:lo12:.LANCHOR74]
+	add	x20, x19, :lo12:.LANCHOR75
+	ldrh	w1, [x19, #:lo12:.LANCHOR75]
 	cmp	w1, w0
-	beq	.L1679
+	beq	.L1757
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1669
-	add	x0, x22, :lo12:.LANCHOR199
+	beq	.L1747
+	add	x0, x22, :lo12:.LANCHOR202
 	lsl	w1, w1, 10
 	mov	w2, 1
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashReadPages
-	ldr	w0, [x22, #:lo12:.LANCHOR199]
+	ldr	w0, [x22, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1669
+	beq	.L1747
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1669
+	bne	.L1747
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1669
+	bls	.L1747
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR74]
+	strh	w1, [x19, #:lo12:.LANCHOR75]
 	strh	w0, [x20, 4]
-.L1669:
-	ldrh	w0, [x19, #:lo12:.LANCHOR74]
-	add	x24, x19, :lo12:.LANCHOR74
+.L1747:
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	add	x24, x19, :lo12:.LANCHOR75
 	mov	w1, 1
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
 	sxth	w20, w0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	add	x24, x22, :lo12:.LANCHOR199
-.L1671:
-	tbz	w20, #31, .L1674
+	add	x24, x22, :lo12:.LANCHOR202
+.L1749:
+	tbz	w20, #31, .L1752
 	mov	w2, 336
-	adrp	x1, .LANCHOR208
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR208
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR211
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR211
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1673:
-	add	x0, x19, :lo12:.LANCHOR74
+.L1751:
+	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1676
-	adrp	x1, .LANCHOR36
-	ldr	w2, [x1, #:lo12:.LANCHOR36]
+	beq	.L1754
+	adrp	x1, .LANCHOR37
+	ldr	w2, [x1, #:lo12:.LANCHOR37]
 	cmp	w0, w2
-	beq	.L1676
-	adrp	x1, .LANCHOR40
-	ldrh	w1, [x1, #:lo12:.LANCHOR40]
+	beq	.L1754
+	adrp	x1, .LANCHOR41
+	ldrh	w1, [x1, #:lo12:.LANCHOR41]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1676
+	bcs	.L1754
 	cmp	w0, w1
-	bcs	.L1676
+	bcs	.L1754
 	bl	FtlSysBlkNumInit
-.L1676:
-	add	x19, x19, :lo12:.LANCHOR74
-	adrp	x21, .LANCHOR44
-	adrp	x23, .LANCHOR120
+.L1754:
+	add	x19, x19, :lo12:.LANCHOR75
+	adrp	x21, .LANCHOR45
+	adrp	x23, .LANCHOR123
 	add	x19, x19, 32
-	add	x21, x21, :lo12:.LANCHOR44
-	add	x23, x23, :lo12:.LANCHOR120
-	add	x22, x22, :lo12:.LANCHOR199
+	add	x21, x21, :lo12:.LANCHOR45
+	add	x23, x23, :lo12:.LANCHOR123
+	add	x22, x22, :lo12:.LANCHOR202
 	mov	w20, 0
-.L1677:
+.L1755:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1678
+	bcc	.L1756
 	mov	w0, 0
-.L1661:
+.L1739:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1664:
+.L1742:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1662
-.L1674:
-	ldrh	w0, [x19, #:lo12:.LANCHOR74]
+	b	.L1740
+.L1752:
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x0, [x24, 8]
 	mov	x0, x24
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1672
+	beq	.L1750
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1673
-.L1672:
+	beq	.L1751
+.L1750:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1671
-.L1678:
+	b	.L1749
+.L1756:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -11619,56 +12167,56 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1677
-.L1679:
+	b	.L1755
+.L1757:
 	mov	w0, -1
-	b	.L1661
+	b	.L1739
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
 	.global	ftl_map_blk_gc
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR53
+	adrp	x21, .LANCHOR54
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	x20, [x0, 16]
-	ldr	x22, [x0, 40]
+	ldr	x23, [x0, 40]
 	bl	ftl_free_no_use_map_blk
 	ldrh	w4, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w4, #4
 	cmp	w2, w1
 	ldrh	w1, [x19, 60]
-	bge	.L1692
+	bge	.L1770
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1694
+	beq	.L1772
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR53]
+	ldrh	w2, [x21, #:lo12:.LANCHOR54]
 	cmp	w3, w2
-	bcc	.L1695
-.L1692:
+	bcc	.L1773
+.L1770:
 	mov	w2, 65535
 	and	w0, w0, 65535
 	cmp	w1, w2
-	beq	.L1696
+	beq	.L1774
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR53]
+	ldrh	w2, [x21, #:lo12:.LANCHOR54]
 	cmp	w2, w3
-	bls	.L1697
-.L1696:
+	bls	.L1775
+.L1774:
 	ubfiz	x0, x0, 1, 32
-	ldrh	w23, [x20, x0]
-	cbz	w23, .L1694
+	ldrh	w22, [x20, x0]
+	cbz	w22, .L1772
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1694
+	cbnz	w1, .L1772
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -11676,126 +12224,138 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x21, #:lo12:.LANCHOR53]
+	ldrh	w0, [x21, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1702
+	bcc	.L1780
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1702:
-	adrp	x26, .LANCHOR199
-	adrp	x25, .LC37
-	add	x24, x26, :lo12:.LANCHOR199
-	add	x25, x25, :lo12:.LC37
+.L1780:
+	adrp	x24, .LANCHOR202
+	adrp	x26, .LANCHOR212
+	mov	x25, x24
+	add	x27, x24, :lo12:.LANCHOR202
+	add	x26, x26, :lo12:.LANCHOR212
 	mov	w20, 0
-.L1703:
+.L1781:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1707
+	bhi	.L1786
 	mov	w1, 1
-	mov	w0, w23
+	mov	w0, w22
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1694:
+.L1772:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR53]
+	ldrh	w0, [x21, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bcc	.L1695
+	bcc	.L1773
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1695:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1700:
+	b	.L1773
+.L1778:
 	ldrh	w6, [x20, x2, lsl 1]
 	add	x5, x2, 1
 	cmp	w6, w1
-	beq	.L1698
+	beq	.L1776
 	mov	x2, x5
-.L1699:
-	and	w23, w2, 65535
-	cmp	w23, w4
-	bcc	.L1700
-	mov	w23, w0
-.L1698:
+.L1777:
+	and	w22, w2, 65535
+	cmp	w22, w4
+	bcc	.L1778
+	mov	w22, w0
+.L1776:
 	and	x2, x2, 65535
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
 	ldrh	w2, [x20, x2, lsl 1]
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x19, 60]
-	mov	w0, w23
-	b	.L1696
-.L1697:
+	mov	w0, w22
+	b	.L1774
+.L1775:
 	mov	x2, 0
-	b	.L1699
-.L1707:
-	ubfiz	x27, x20, 2, 16
-	ldr	w1, [x22, x27]
-	cmp	w23, w1, lsr 10
-	bne	.L1704
-	adrp	x2, .LANCHOR181
-	add	x0, x26, :lo12:.LANCHOR199
-	ldr	x2, [x2, #:lo12:.LANCHOR181]
+	b	.L1777
+.L1786:
+	ubfiz	x0, x20, 2, 16
+	add	x1, x23, x0
+	str	x1, [x29, 104]
+	ldr	w1, [x23, x0]
+	cmp	w22, w1, lsr 10
+	bne	.L1782
+	adrp	x2, .LANCHOR184
+	add	x0, x24, :lo12:.LANCHOR202
+	ldr	x2, [x2, #:lo12:.LANCHOR184]
 	str	x2, [x0, 8]
-	adrp	x2, .LANCHOR185
+	adrp	x2, .LANCHOR188
 	str	w1, [x0, 4]
-	ldr	x28, [x2, #:lo12:.LANCHOR185]
+	ldr	x28, [x2, #:lo12:.LANCHOR188]
 	mov	w2, 1
 	str	x28, [x0, 16]
 	mov	w1, w2
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1705
-	mov	w2, 671
-	adrp	x1, .LANCHOR209
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR209
-	add	x0, x0, :lo12:.LC6
+	beq	.L1783
+	mov	w2, 672
+	mov	x1, x26
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1705:
-	ldr	w0, [x24]
-	cmn	w0, #1
-	bne	.L1706
-	str	wzr, [x22, x27]
-	mov	x0, x25
+.L1783:
+	ldr	w0, [x27]
 	ldrh	w2, [x28, 8]
-	ldr	w1, [x24, 4]
+	cmn	w0, #1
+	bne	.L1784
+.L1785:
+	ldr	x0, [x29, 104]
+	add	x25, x25, :lo12:.LANCHOR202
+	str	wzr, [x0]
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
+	ldr	w1, [x25, 4]
 	bl	printf
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR76]
-.L1704:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1703
-.L1706:
-	ldr	x2, [x24, 8]
+	str	w1, [x0, #:lo12:.LANCHOR77]
+.L1773:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1784:
+	cmp	w2, w20
+	bne	.L1785
+	ldrh	w1, [x28]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L1785
+	ldr	x2, [x27, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-	b	.L1704
+.L1782:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1781
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L1723
+	adrp	x1, .LANCHOR77
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cbnz	w1, .L1802
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -11806,21 +12366,21 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x19, 16]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L1714
+	bne	.L1793
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1715
-	mov	w2, 703
-	adrp	x1, .LANCHOR210
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR210
-	add	x0, x0, :lo12:.LC6
+	cbz	w0, .L1794
+	mov	w2, 708
+	adrp	x1, .LANCHOR213
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR213
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1715:
+.L1794:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -11831,26 +12391,26 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1713:
+.L1792:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1714:
+.L1793:
 	ubfiz	x0, x0, 1, 16
-	adrp	x1, .LANCHOR185
-	adrp	x23, .LANCHOR180
+	adrp	x1, .LANCHOR188
+	adrp	x23, .LANCHOR183
 	ldr	x22, [x19, 40]
-	ldr	x1, [x1, #:lo12:.LANCHOR185]
+	ldr	x1, [x1, #:lo12:.LANCHOR188]
 	ldrh	w21, [x20, x0]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR202
 	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR199
+	add	x2, x20, :lo12:.LANCHOR202
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	ldr	x0, [x23, #:lo12:.LANCHOR183]
 	str	x1, [x2, 16]
 	str	x0, [x2, 8]
 	ldr	w2, [x19, 48]
@@ -11860,33 +12420,33 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
 	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR53
-	ldrh	w2, [x1, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR54
+	ldrh	w2, [x1, #:lo12:.LANCHOR54]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR180]
+	ldr	x3, [x23, #:lo12:.LANCHOR183]
 	mov	w2, 0
-.L1716:
+.L1795:
 	cmp	w4, w1, uxth
-	bhi	.L1718
+	bhi	.L1797
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
-	add	x0, x20, :lo12:.LANCHOR199
+	add	x0, x20, :lo12:.LANCHOR202
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1713
-.L1718:
+	b	.L1792
+.L1797:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L1717
+	bne	.L1796
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -11894,10 +12454,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L1717:
+.L1796:
 	add	x1, x1, 1
-	b	.L1716
-.L1723:
+	b	.L1795
+.L1802:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -11908,85 +12468,86 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
-	stp	x19, x20, [sp, 16]
-	ldr	w3, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR165
+	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR165
 	stp	x25, x26, [sp, 64]
+	mov	w23, w1
 	stp	x27, x28, [sp, 80]
-	cbnz	w3, .L1741
-	adrp	x23, .LANCHOR162
-	adrp	x25, .LANCHOR211
-	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR162
-	add	x25, x25, :lo12:.LANCHOR211
+	adrp	x25, .LANCHOR77
+	add	x27, x25, :lo12:.LANCHOR77
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR54
 	mov	x19, x0
-	adrp	x27, .LANCHOR53
 	mov	w21, 0
-	add	x0, x27, :lo12:.LANCHOR53
-	stp	x2, x0, [x29, 96]
-.L1728:
-	ldr	w0, [x23]
+	add	x0, x24, :lo12:.LANCHOR54
+	stp	x0, x2, [x29, 96]
+.L1806:
+	ldr	w0, [x22]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
-	str	w0, [x23]
-	ldrh	w0, [x27, #:lo12:.LANCHOR53]
+	str	w0, [x22]
+	ldrh	w0, [x24, #:lo12:.LANCHOR54]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1729
+	bge	.L1807
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1730
-.L1729:
+	bne	.L1808
+.L1807:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L1730:
+.L1808:
+	ldr	w0, [x27]
+	cbnz	w0, .L1820
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1731
-	mov	w2, 764
-	mov	x1, x25
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	cbnz	w0, .L1810
+	mov	w2, 768
+	adrp	x1, .LANCHOR214
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR214
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1731:
+.L1810:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L1732
-	mov	w2, 765
-	mov	x1, x25
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	bcc	.L1811
+	mov	w2, 769
+	adrp	x1, .LANCHOR214
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR214
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1732:
+.L1811:
 	ldrh	w1, [x19]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR202
 	ldr	x0, [x19, 16]
-	add	x28, x20, :lo12:.LANCHOR199
+	add	x28, x20, :lo12:.LANCHOR202
 	mov	w2, 16
 	ldrh	w26, [x0, x1, lsl 1]
 	mov	w1, 0
 	ldrh	w0, [x19, 2]
 	orr	w0, w0, w26, lsl 10
 	str	w0, [x28, 4]
-	ldr	x0, [x29, 96]
+	ldr	x0, [x29, 104]
 	str	x0, [x28, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR188
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
 	str	x0, [x28, 16]
 	bl	ftl_memset
 	ldr	x0, [x28, 16]
@@ -11997,42 +12558,42 @@ FtlMapWritePage:
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
 	mov	w1, w3
-	strh	w22, [x0, 8]
+	strh	w23, [x0, 8]
 	strh	w26, [x0, 2]
 	mov	x0, x28
 	bl	FlashProgPages
 	ldrh	w0, [x19, 2]
-	ldr	w1, [x20, #:lo12:.LANCHOR199]
+	ldr	w1, [x20, #:lo12:.LANCHOR202]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1733
+	bne	.L1812
 	ldr	w1, [x28, 4]
-	adrp	x0, .LC38
-	add	x0, x0, :lo12:.LC38
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L1734
-	ldr	x0, [x29, 104]
+	bhi	.L1813
+	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1734:
+.L1813:
 	cmp	w21, 3
-	bls	.L1728
-	add	x20, x20, :lo12:.LANCHOR199
+	bls	.L1806
+	add	x20, x20, :lo12:.LANCHOR202
 	mov	w2, w21
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
-	str	w0, [x24, #:lo12:.LANCHOR76]
-.L1741:
+	str	w0, [x25, #:lo12:.LANCHOR77]
+.L1820:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12041,22 +12602,22 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1733:
-	cbz	w1, .L1736
+.L1812:
+	cbz	w1, .L1815
 	strh	w26, [x19, 60]
 	cmp	w0, 1
-	beq	.L1728
+	beq	.L1806
 	cmp	w1, 256
-.L1749:
-	beq	.L1728
-	add	x20, x20, :lo12:.LANCHOR199
+.L1828:
+	beq	.L1806
+	add	x20, x20, :lo12:.LANCHOR202
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
-	str	w1, [x0, w22, uxtw 2]
-	b	.L1741
-.L1736:
+	str	w1, [x0, w23, uxtw 2]
+	b	.L1820
+.L1815:
 	cmp	w0, 1
-	b	.L1749
+	b	.L1828
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12066,16 +12627,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR96
+	adrp	x20, .LANCHOR97
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR96]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR96]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -12093,346 +12654,64 @@ l2p_flush:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR67
-	add	x20, x20, :lo12:.LANCHOR67
+	adrp	x20, .LANCHOR68
+	add	x20, x20, :lo12:.LANCHOR68
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR96
-.L1753:
+	adrp	x21, .LANCHOR97
+.L1832:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1755
+	bhi	.L1834
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1755:
-	ldr	x1, [x21, #:lo12:.LANCHOR96]
+.L1834:
+	ldr	x1, [x21, #:lo12:.LANCHOR97]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1754
+	tbz	w0, #31, .L1833
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1754:
+.L1833:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1753
+	b	.L1832
 	.size	l2p_flush, .-l2p_flush
-	.section	.text.log2phys,"ax",@progbits
+	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	x25, x1
-	adrp	x1, .LANCHOR56
-	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	mov	w26, w2
-	ldrh	w20, [x1, #:lo12:.LANCHOR56]
-	stp	x21, x22, [sp, 32]
-	add	w1, w20, 7
-	mov	x20, 1
-	stp	x27, x28, [sp, 80]
-	lsr	w24, w0, w1
-	and	w23, w24, 65535
-	lsl	x20, x20, x1
-	adrp	x1, .LANCHOR72
-	sub	w20, w20, #1
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
-	and	w20, w20, w0
-	and	x20, x20, 65535
-	cmp	w0, w1
-	bcc	.L1758
-	mov	w2, 884
-	adrp	x1, .LANCHOR212
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR212
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1758:
-	adrp	x19, .LANCHOR96
-	adrp	x0, .LANCHOR67
-	ldr	x2, [x19, #:lo12:.LANCHOR96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR67]
-	mov	x0, 0
-.L1759:
-	and	x21, x0, 65535
-	cmp	w21, w1
-	bcc	.L1764
-	bl	select_l2p_ram_region
-	and	x21, x0, 65535
-	ldr	x1, [x19, #:lo12:.LANCHOR96]
-	ubfiz	x22, x21, 4, 16
-	add	x2, x1, x22
-	ldrh	w3, [x1, x22]
-	mov	w1, 65535
-	cmp	w3, w1
-	beq	.L1765
-	ldr	w1, [x2, 4]
-	tbz	w1, #31, .L1765
-	bl	flush_l2p_region
-.L1765:
-	adrp	x0, .LANCHOR66
-	ldrh	w0, [x0, #:lo12:.LANCHOR66]
-	cmp	w0, w23
-	bcs	.L1766
-	mov	w2, 526
-	adrp	x1, .LANCHOR213
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR213
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1766:
-	adrp	x1, .LANCHOR128
-	ubfiz	x0, x23, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR128]
-	ldr	w27, [x1, x0]
-	cbnz	w27, .L1767
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	adrp	x1, .LANCHOR57
-	add	x0, x0, x22
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
-	mov	w1, 255
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x1, x0, x22
-	strh	w23, [x0, x22]
-	str	wzr, [x1, 4]
-	b	.L1760
-.L1764:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w23
-	bne	.L1759
-.L1760:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x0, x0, x21, lsl 4
-	cbnz	w26, .L1761
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x25]
-.L1762:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x21, x0, x21, lsl 4
-	ldr	w0, [x21, 4]
-	cmn	w0, #1
-	beq	.L1771
-	add	w0, w0, 1
-	str	w0, [x21, 4]
-.L1771:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1761:
-	ldr	x1, [x0, 8]
-	ldr	w2, [x25]
-	str	w2, [x1, x20, lsl 2]
-	ldr	w1, [x0, 4]
-	orr	w1, w1, -2147483648
-	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR97
-	strh	w23, [x0, #:lo12:.LANCHOR97]
-	b	.L1762
-.L1767:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	adrp	x3, .LANCHOR199
-	add	x28, x3, :lo12:.LANCHOR199
-	mov	w2, 1
-	add	x0, x0, x22
-	str	x3, [x29, 104]
-	mov	w1, w2
-	str	w27, [x28, 4]
-	ldr	x0, [x0, 8]
-	str	x0, [x28, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	str	x0, [x28, 16]
-	mov	x0, x28
-	bl	FlashReadPages
-	ldr	x28, [x28, 16]
-	ldr	x3, [x29, 104]
-	ldr	w0, [x3, #:lo12:.LANCHOR199]
-	cmp	w0, 256
-	bne	.L1768
-	and	w24, w24, 65535
-	mov	w2, w27
-	mov	w1, w24
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR96]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
-	lsr	w27, w27, 10
-	add	x1, x1, x22
-	strh	w27, [x0, 60]
-	ldr	x2, [x1, 8]
-	mov	w1, w24
-	bl	FtlMapWritePage
-.L1768:
-	ldrh	w0, [x28, 8]
-	cmp	w0, w23
-	beq	.L1769
-	mov	w2, 552
-	adrp	x1, .LANCHOR213
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR213
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1769:
-	ldr	x0, [x19, #:lo12:.LANCHOR96]
-	add	x1, x0, x22
-	str	wzr, [x1, 4]
-	strh	w23, [x0, x22]
-	b	.L1760
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",@progbits
-	.align	2
-	.global	FtlReUsePrevPpa
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR83
-	stp	x19, x20, [sp, 16]
-	mov	w21, w0
-	str	w1, [x29, 76]
-	lsr	w0, w1, 10
-	str	x23, [sp, 48]
-	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR83]
-	and	w3, w0, 65535
-	ubfiz	x20, x3, 1, 16
-	ldrh	w1, [x2, x20]
-	cbnz	w1, .L1777
-	adrp	x0, .LANCHOR87
-	ldr	x19, [x0, #:lo12:.LANCHOR87]
-	cbz	x19, .L1778
-	adrp	x2, .LANCHOR81
-	mov	x5, -6148914691236517206
-	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR88
-	ldr	x2, [x2, #:lo12:.LANCHOR81]
-	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR88]
-	sub	x19, x19, x2
-	asr	x19, x19, 1
-	mul	x19, x19, x5
-	mov	w5, 6
-	and	w19, w19, 65535
-.L1779:
-	cmp	w1, w4
-	beq	.L1778
-	cmp	w19, w3
-	bne	.L1780
-	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR87
-	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	cbnz	w0, .L1781
-	mov	w2, 1862
-	adrp	x1, .LANCHOR214
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR214
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1781:
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR88]
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR83]
-	ldrh	w0, [x1, x20]
-	add	w0, w0, 1
-	strh	w0, [x1, x20]
-.L1778:
-	add	x1, x29, 76
-	mov	w2, 1
-	mov	w0, w21
-	bl	log2phys
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1780:
-	umull	x19, w19, w5
-	ldrh	w19, [x2, x19]
-	cmp	w19, w6
-	beq	.L1778
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L1779
-.L1777:
-	add	w1, w1, 1
-	strh	w1, [x2, x20]
-	b	.L1778
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.FtlVendorPartWrite,"ax",@progbits
-	.align	2
-	.global	FtlVendorPartWrite
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
-	stp	x29, x30, [sp, -176]!
+	.global	FtlVendorPartWrite
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
 	add	w1, w0, w1
 	mov	w22, w0
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1795
-	adrp	x0, .LANCHOR56
-	adrp	x26, .LANCHOR55
-	adrp	x27, .LANCHOR57
+	bhi	.L1844
+	adrp	x0, .LANCHOR57
+	adrp	x26, .LANCHOR56
+	adrp	x27, .LANCHOR58
 	mov	x25, x2
-	ldrh	w21, [x0, #:lo12:.LANCHOR56]
-	add	x26, x26, :lo12:.LANCHOR55
-	add	x27, x27, :lo12:.LANCHOR57
+	ldrh	w21, [x0, #:lo12:.LANCHOR57]
+	add	x26, x26, :lo12:.LANCHOR56
+	add	x27, x27, :lo12:.LANCHOR58
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1789:
-	cbnz	w20, .L1794
-.L1787:
+.L1838:
+	cbnz	w20, .L1843
+.L1836:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12441,11 +12720,11 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1794:
+.L1843:
 	ldrh	w1, [x26]
-	adrp	x0, .LANCHOR191
-	adrp	x28, .LANCHOR182
-	ldr	x0, [x0, #:lo12:.LANCHOR191]
+	adrp	x0, .LANCHOR194
+	adrp	x28, .LANCHOR185
+	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	udiv	w23, w22, w1
 	ldr	w2, [x0, w21, uxtw 2]
 	and	w0, w20, 65535
@@ -12454,26 +12733,26 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1791
+	cbz	w2, .L1840
 	cmp	w19, w1
-	beq	.L1791
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	beq	.L1840
+	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	str	w2, [x29, 124]
 	mov	w2, 1
 	stp	x0, xzr, [x29, 128]
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1792:
+.L1841:
 	lsl	w3, w19, 9
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w3
 	mov	x1, x25
 	str	w3, [x29, 108]
 	add	x0, x0, x23, sxtw 2
 	bl	ftl_memcpy
-	ldr	x2, [x28, #:lo12:.LANCHOR182]
+	ldr	x2, [x28, #:lo12:.LANCHOR185]
 	mov	w1, w21
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
@@ -12485,30 +12764,30 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1789
-.L1791:
+	b	.L1838
+.L1840:
 	ldrh	w2, [x27]
 	mov	w1, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	ldr	x0, [x28, #:lo12:.LANCHOR185]
 	bl	ftl_memset
-	b	.L1792
-.L1795:
+	b	.L1841
+.L1844:
 	mov	w24, -1
-	b	.L1787
+	b	.L1836
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR135
-	add	x2, x0, :lo12:.LANCHOR135
-	ldr	w1, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR138
+	add	x2, x0, :lo12:.LANCHOR138
+	ldr	w1, [x0, #:lo12:.LANCHOR138]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1800
-	mov	w0, 72
+	bne	.L1849
+	mov	w0, 73
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12518,45 +12797,45 @@ Ftl_save_ext_data:
 	adrp	x0, .LANCHOR217
 	ldr	w0, [x0, #:lo12:.LANCHOR217]
 	str	w0, [x2, 92]
-	adrp	x0, .LANCHOR158
-	ldr	w0, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR161
+	ldr	w0, [x0, #:lo12:.LANCHOR161]
 	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR159
-	ldr	w0, [x0, #:lo12:.LANCHOR159]
-	str	w0, [x2, 12]
-	adrp	x0, .LANCHOR163
-	ldr	w0, [x0, #:lo12:.LANCHOR163]
-	str	w0, [x2, 16]
 	adrp	x0, .LANCHOR162
 	ldr	w0, [x0, #:lo12:.LANCHOR162]
-	str	w0, [x2, 20]
+	str	w0, [x2, 12]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	str	w0, [x2, 16]
 	adrp	x0, .LANCHOR165
 	ldr	w0, [x0, #:lo12:.LANCHOR165]
+	str	w0, [x2, 20]
+	adrp	x0, .LANCHOR168
+	ldr	w0, [x0, #:lo12:.LANCHOR168]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR79
-	ldr	w0, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR80
+	ldr	w0, [x0, #:lo12:.LANCHOR80]
 	str	w0, [x2, 32]
-	adrp	x0, .LANCHOR160
-	ldr	w0, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR163
+	ldr	w0, [x0, #:lo12:.LANCHOR163]
 	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR161
-	ldr	w0, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR164
+	ldr	w0, [x0, #:lo12:.LANCHOR164]
 	str	w0, [x2, 40]
-	adrp	x0, .LANCHOR166
-	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR169
+	ldr	w0, [x0, #:lo12:.LANCHOR169]
 	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR167
-	ldr	w0, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR170
+	ldr	w0, [x0, #:lo12:.LANCHOR170]
 	str	w0, [x2, 48]
-	adrp	x0, .LANCHOR155
-	ldr	w0, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR158
+	ldr	w0, [x0, #:lo12:.LANCHOR158]
 	str	w0, [x2, 60]
-	adrp	x0, .LANCHOR154
-	ldr	w0, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR157
+	ldr	w0, [x0, #:lo12:.LANCHOR157]
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1800:
+.L1849:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12566,42 +12845,42 @@ Ftl_save_ext_data:
 FtlEctTblFlush:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1807
-	adrp	x1, .LANCHOR167
+	cbz	w1, .L1856
+	adrp	x1, .LANCHOR170
 	mov	w2, 4
-	ldr	w1, [x1, #:lo12:.LANCHOR167]
-	cmp	w1, 29
+	ldr	w1, [x1, #:lo12:.LANCHOR170]
+	cmp	w1, 39
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1803:
+.L1852:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1804
+	bhi	.L1853
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1804:
-	adrp	x2, .LANCHOR188
-	cbnz	w0, .L1805
-	ldr	x0, [x2, #:lo12:.LANCHOR188]
+.L1853:
+	adrp	x2, .LANCHOR191
+	cbnz	w0, .L1854
+	ldr	x0, [x2, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1810
-.L1805:
+	bcc	.L1859
+.L1854:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR188]
+	ldr	x2, [x2, #:lo12:.LANCHOR191]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
 	mov	w0, 17221
 	str	wzr, [x2, 4]
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	adrp	x0, .LANCHOR187
-	ldrh	w1, [x0, #:lo12:.LANCHOR187]
+	adrp	x0, .LANCHOR190
+	ldrh	w1, [x0, #:lo12:.LANCHOR190]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
 	ldr	w0, [x2, 8]
@@ -12613,10 +12892,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1807:
+.L1856:
 	mov	w1, 32
-	b	.L1803
-.L1810:
+	b	.L1852
+.L1859:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12630,440 +12909,116 @@ allocate_new_data_superblock:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	ldrh	w20, [x0]
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	str	x21, [sp, 32]
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w20
-	bcs	.L1813
-	mov	w2, 2982
+	bcs	.L1862
+	mov	w2, 3289
 	adrp	x1, .LANCHOR219
-	adrp	x0, .LC6
+	adrp	x0, .LC5
 	add	x1, x1, :lo12:.LANCHOR219
-	add	x0, x0, :lo12:.LC6
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1813:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1814
+.L1862:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L1863
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1815
-	adrp	x1, .LANCHOR83
+	beq	.L1864
+	adrp	x1, .LANCHOR84
 	ubfiz	x0, x20, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1816
+	cbz	w0, .L1865
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1815:
+.L1864:
 	strb	wzr, [x19, 8]
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	beq	.L1817
-	adrp	x0, .LANCHOR43
-	ldrh	w1, [x0, #:lo12:.LANCHOR43]
+	beq	.L1866
+	adrp	x0, .LANCHOR44
+	ldrh	w1, [x0, #:lo12:.LANCHOR44]
 	cmp	w1, 1
-	beq	.L1817
+	beq	.L1866
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1818
-.L1817:
+	cbz	w0, .L1867
+.L1866:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1819:
-	adrp	x1, .LANCHOR130
+.L1868:
+	adrp	x1, .LANCHOR133
 	mov	w2, 65535
 	mov	x21, x1
-	ldrh	w0, [x1, #:lo12:.LANCHOR130]
+	ldrh	w0, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w2
-	beq	.L1824
+	beq	.L1873
 	cmp	w20, w0
-	bne	.L1825
-	adrp	x2, .LANCHOR83
+	bne	.L1874
+	adrp	x2, .LANCHOR84
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1826
-.L1825:
+	cbz	w1, .L1875
+.L1874:
 	bl	update_vpc_list
-.L1826:
+.L1875:
 	mov	w0, -1
-	strh	w0, [x21, #:lo12:.LANCHOR130]
-.L1824:
+	strh	w0, [x21, #:lo12:.LANCHOR133]
+.L1873:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1814:
+.L1863:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1816:
+.L1865:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1815
-.L1818:
-	adrp	x0, .LANCHOR91
-	add	x2, x0, :lo12:.LANCHOR91
+	b	.L1864
+.L1867:
+	adrp	x0, .LANCHOR92
+	add	x2, x0, :lo12:.LANCHOR92
 	cmp	x19, x2
-	bne	.L1819
+	bne	.L1868
 	cmp	w1, 3
-	beq	.L1821
-	adrp	x1, .LANCHOR155
-	ldr	w1, [x1, #:lo12:.LANCHOR155]
+	beq	.L1870
+	adrp	x1, .LANCHOR158
+	ldr	w1, [x1, #:lo12:.LANCHOR158]
 	cmp	w1, 1
-	bne	.L1822
-.L1821:
-	add	x1, x0, :lo12:.LANCHOR91
+	bne	.L1871
+.L1870:
+	add	x1, x0, :lo12:.LANCHOR92
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1822:
+.L1871:
 	adrp	x1, .LANCHOR28
 	ldr	w1, [x1, #:lo12:.LANCHOR28]
-	cbz	w1, .L1819
-	adrp	x1, .LANCHOR167
-	ldr	w1, [x1, #:lo12:.LANCHOR167]
-	cmp	w1, 29
-	bhi	.L1819
-	add	x0, x0, :lo12:.LANCHOR91
-	mov	w1, 1
+	cbz	w1, .L1868
+	adrp	x1, .LANCHOR170
+	ldr	w1, [x1, #:lo12:.LANCHOR170]
+	cmp	w1, 39
+	bhi	.L1868
+	add	x0, x0, :lo12:.LANCHOR92
+	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1819
+	b	.L1868
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlProgPages,"ax",@progbits
-	.align	2
-	.global	FtlProgPages
-	.type	FtlProgPages, %function
-FtlProgPages:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x0, .LANCHOR8
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	mov	w21, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	mov	x20, x3
-	str	x25, [sp, 64]
-	cbz	w0, .L1854
-	ldrb	w0, [x3, 8]
-	cmp	w0, 1
-	cset	w22, eq
-.L1841:
-	ldrb	w3, [x20, 9]
-	mov	w1, w21
-	mov	w2, w22
-	mov	x0, x19
-	adrp	x24, .LANCHOR52
-	adrp	x23, .LANCHOR135
-	add	x24, x24, :lo12:.LANCHOR52
-	add	x23, x23, :lo12:.LANCHOR135
-	bl	FlashProgPages
-	mov	w0, 56
-	umaddl	x21, w21, w0, x19
-.L1842:
-	cmp	x21, x19
-	beq	.L1851
-	adrp	x25, .LANCHOR83
-	b	.L1852
-.L1854:
-	mov	w22, 0
-	b	.L1841
-.L1845:
-	ldr	w0, [x19, 4]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	ldrh	w2, [x20]
-	cmp	w2, w0, uxth
-	bne	.L1843
-	ldr	x1, [x25, #:lo12:.LANCHOR83]
-	ubfiz	x2, x2, 1, 16
-	ldrh	w3, [x20, 4]
-	ldrh	w0, [x1, x2]
-	sub	w0, w0, w3
-	strh	w0, [x1, x2]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x24]
-	strh	w0, [x20, 2]
-	strh	wzr, [x20, 4]
-.L1843:
-	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1844
-	mov	x0, x20
-	bl	allocate_new_data_superblock
-.L1844:
-	ldr	w0, [x23, 96]
-	add	w0, w0, 1
-	str	w0, [x23, 96]
-	ldr	w0, [x19, 4]
-	lsr	w0, w0, 10
-	bl	FtlGcMarkBadPhyBlk
-	mov	x0, x20
-	bl	get_new_active_ppa
-	str	w0, [x19, 4]
-	mov	w2, w22
-	str	w0, [x29, 92]
-	mov	w1, 1
-	ldrb	w3, [x20, 9]
-	mov	x0, x19
-	bl	FlashProgPages
-.L1852:
-	ldr	w0, [x19]
-	cmn	w0, #1
-	beq	.L1845
-	adrp	x0, .LANCHOR37
-	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
-	cmp	w1, w0
-	bcc	.L1846
-	mov	w2, 1564
-	adrp	x1, .LANCHOR220
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1846:
-	ldr	w0, [x19, 4]
-	cbnz	w22, .L1847
-.L1859:
-	str	w0, [x29, 92]
-	add	x1, x29, 92
-	ldr	w0, [x19, 24]
-	mov	w2, 1
-	bl	log2phys
-	ldr	x0, [x19, 16]
-	ldr	w3, [x0, 12]
-	lsr	w0, w3, 10
-	bl	P2V_block_in_plane
-	and	w1, w0, 65535
-	mov	w25, w1
-	cmn	w3, #1
-	beq	.L1849
-	adrp	x2, .LANCHOR83
-	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
-	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1850
-	adrp	x0, .LC41
-	mov	w2, 0
-	add	x0, x0, :lo12:.LC41
-	bl	printf
-.L1850:
-	mov	w0, w25
-	bl	decrement_vpc_count
-.L1849:
-	add	x19, x19, 56
-	b	.L1842
-.L1847:
-	orr	w0, w0, -2147483648
-	b	.L1859
-.L1851:
-	adrp	x0, .LANCHOR37
-	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
-	cmp	w1, w0
-	bcc	.L1840
-	mov	w2, 1581
-	adrp	x1, .LANCHOR220
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L1840:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",@progbits
-	.align	2
-	.global	FtlCacheWriteBack
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR129
-	ldr	x0, [x19, #:lo12:.LANCHOR129]
-	cbz	x0, .L1861
-	adrp	x1, .LANCHOR221
-	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR221]
-	mov	w1, 1
-	bl	FtlProgPages
-	str	xzr, [x19, #:lo12:.LANCHOR129]
-.L1861:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR68
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
-	add	w1, w1, w2
-	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	cmp	w1, w0
-	bhi	.L1874
-	mov	w19, w2
-	cmp	w2, 31
-	bhi	.L1868
-.L1882:
-	mov	w0, 0
-.L1866:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1868:
-	adrp	x22, .LANCHOR55
-	bl	FtlCacheWriteBack
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	udiv	w21, w20, w0
-	msub	w20, w0, w21, w20
-	ands	w20, w20, 65535
-	beq	.L1869
-	sub	w0, w0, w20
-	add	w21, w21, 1
-	cmp	w0, w19
-	csel	w0, w0, w19, ls
-	sub	w19, w19, w0, uxth
-.L1869:
-	adrp	x20, .LANCHOR222
-	adrp	x23, .LANCHOR160
-	add	x20, x20, :lo12:.LANCHOR222
-	add	x23, x23, :lo12:.LANCHOR160
-	mov	w0, -1
-	str	w0, [x29, 76]
-.L1870:
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	cmp	w19, w0
-	bcs	.L1872
-	adrp	x0, .LANCHOR222
-	ldr	w1, [x0, #:lo12:.LANCHOR222]
-	cmp	w1, 32
-	bls	.L1882
-	str	wzr, [x0, #:lo12:.LANCHOR222]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1882
-.L1872:
-	mov	w2, 0
-	add	x1, x29, 72
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 72]
-	cmn	w0, #1
-	beq	.L1871
-	ldr	w0, [x20]
-	mov	w2, 1
-	add	x1, x29, 76
-	add	w0, w0, 1
-	str	w0, [x20]
-	ldr	w0, [x23]
-	add	w0, w0, 1
-	str	w0, [x23]
-	mov	w0, w21
-	bl	log2phys
-	ldr	w0, [x29, 72]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L1871:
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	add	w21, w21, 1
-	sub	w19, w19, w0
-	b	.L1870
-.L1874:
-	mov	w0, -1
-	b	.L1866
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlSysFlush,"ax",@progbits
-	.align	2
-	.global	FtlSysFlush
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L1886
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	mov	w0, 1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L1886:
-	mov	w0, 0
-	ret
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",@progbits
-	.align	2
-	.global	FtlDeInit
-	.type	FtlDeInit, %function
-FtlDeInit:
-	adrp	x0, .LANCHOR223
-	ldr	w0, [x0, #:lo12:.LANCHOR223]
-	cmp	w0, 1
-	bne	.L1892
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FtlSysFlush
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-.L1892:
-	mov	w0, 0
-	ret
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_de_init
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FlashDeInit
-	bl	FtlDeInit
-	ldp	x29, x30, [sp], 16
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartRead
@@ -13075,27 +13030,27 @@ FtlVendorPartRead:
 	mov	w22, w0
 	mov	w21, w1
 	add	w1, w0, w1
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1906
-	adrp	x0, .LANCHOR56
-	adrp	x26, .LANCHOR182
+	bhi	.L1898
+	adrp	x0, .LANCHOR57
+	adrp	x26, .LANCHOR185
 	mov	x25, x2
 	mov	x28, x26
-	ldrh	w20, [x0, #:lo12:.LANCHOR56]
+	ldrh	w20, [x0, #:lo12:.LANCHOR57]
 	mov	w24, 0
-	adrp	x0, .LANCHOR55
-	add	x0, x0, :lo12:.LANCHOR55
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1899:
-	cbnz	w21, .L1905
-.L1897:
+.L1891:
+	cbnz	w21, .L1897
+.L1889:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13104,9 +13059,9 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1905:
-	adrp	x0, .LANCHOR191
-	ldr	x0, [x0, #:lo12:.LANCHOR191]
+.L1897:
+	adrp	x0, .LANCHOR194
+	ldr	x0, [x0, #:lo12:.LANCHOR194]
 	ldr	w3, [x0, w20, uxtw 2]
 	ldr	x0, [x29, 104]
 	ldrh	w19, [x0]
@@ -13118,8 +13073,8 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1901
-	ldr	x0, [x26, #:lo12:.LANCHOR182]
+	cbz	w3, .L1893
+	ldr	x0, [x26, #:lo12:.LANCHOR185]
 	mov	w2, 1
 	str	w3, [x29, 100]
 	mov	w1, w2
@@ -13130,43 +13085,43 @@ FtlVendorPartRead:
 	ldr	w0, [x29, 120]
 	ldr	w3, [x29, 100]
 	cmn	w0, #1
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR202
 	csinv	w24, w24, wzr, ne
-	ldr	w0, [x0, #:lo12:.LANCHOR199]
+	ldr	w0, [x0, #:lo12:.LANCHOR202]
 	cmp	w0, 256
-	bne	.L1903
+	bne	.L1895
 	mov	w2, w3
 	mov	w1, w20
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	ldr	x2, [x26, #:lo12:.LANCHOR182]
+	ldr	x2, [x26, #:lo12:.LANCHOR185]
 	adrp	x0, .LANCHOR215
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1903:
-	ldr	x1, [x28, #:lo12:.LANCHOR182]
+.L1895:
+	ldr	x1, [x28, #:lo12:.LANCHOR185]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1904:
+.L1896:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1899
-.L1901:
+	b	.L1891
+.L1893:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1904
-.L1906:
+	b	.L1896
+.L1898:
 	mov	w24, -1
-	b	.L1897
+	b	.L1889
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13177,28 +13132,28 @@ FtlLoadEctTbl:
 	mov	w0, 64
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR188
-	adrp	x20, .LANCHOR187
-	ldr	x2, [x19, #:lo12:.LANCHOR188]
-	ldrh	w1, [x20, #:lo12:.LANCHOR187]
+	adrp	x19, .LANCHOR191
+	adrp	x20, .LANCHOR190
+	ldr	x2, [x19, #:lo12:.LANCHOR191]
+	ldrh	w1, [x20, #:lo12:.LANCHOR190]
 	bl	FtlVendorPartRead
-	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	ldr	x0, [x19, #:lo12:.LANCHOR191]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1909
-	adrp	x1, .LC43
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC43
-	add	x0, x0, :lo12:.LC8
+	beq	.L1901
+	adrp	x1, .LC44
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC44
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	ldr	x0, [x19, #:lo12:.LANCHOR191]
 	mov	w1, 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR187]
+	ldrh	w2, [x20, #:lo12:.LANCHOR190]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1909:
+.L1901:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13214,96 +13169,96 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR135
+	adrp	x19, .LANCHOR138
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR135
+	add	x21, x19, :lo12:.LANCHOR138
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR135]
+	ldr	w0, [x19, #:lo12:.LANCHOR138]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1912
+	beq	.L1904
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR135]
-.L1912:
-	ldr	w1, [x19, #:lo12:.LANCHOR135]
-	add	x0, x19, :lo12:.LANCHOR135
+	str	w20, [x19, #:lo12:.LANCHOR138]
+.L1904:
+	ldr	w1, [x19, #:lo12:.LANCHOR138]
+	add	x0, x19, :lo12:.LANCHOR138
 	cmp	w1, w20
-	adrp	x20, .LANCHOR165
-	bne	.L1913
+	adrp	x20, .LANCHOR168
+	bne	.L1905
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
 	adrp	x1, .LANCHOR217
 	ldr	w2, [x0, 92]
 	str	w2, [x1, #:lo12:.LANCHOR217]
-	adrp	x1, .LANCHOR158
+	adrp	x1, .LANCHOR161
 	ldr	w2, [x0, 8]
-	str	w2, [x1, #:lo12:.LANCHOR158]
-	adrp	x1, .LANCHOR159
+	str	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR162
 	ldr	w2, [x0, 12]
-	str	w2, [x1, #:lo12:.LANCHOR159]
-	adrp	x1, .LANCHOR163
+	str	w2, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR166
 	ldr	w2, [x0, 16]
-	str	w2, [x1, #:lo12:.LANCHOR163]
-	adrp	x1, .LANCHOR162
+	str	w2, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR165
 	ldr	w2, [x0, 20]
-	str	w2, [x1, #:lo12:.LANCHOR162]
+	str	w2, [x1, #:lo12:.LANCHOR165]
 	ldp	w1, w2, [x0, 28]
-	str	w1, [x20, #:lo12:.LANCHOR165]
-	adrp	x1, .LANCHOR79
-	str	w2, [x1, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR160
+	str	w1, [x20, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR80
+	str	w2, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR163
 	ldr	w2, [x0, 36]
-	str	w2, [x1, #:lo12:.LANCHOR160]
-	adrp	x1, .LANCHOR161
+	str	w2, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR164
 	ldr	w2, [x0, 40]
-	str	w2, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR166
+	str	w2, [x1, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR169
 	ldr	w2, [x0, 44]
-	str	w2, [x1, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR167
+	str	w2, [x1, #:lo12:.LANCHOR169]
+	adrp	x1, .LANCHOR170
 	ldr	w2, [x0, 48]
-	str	w2, [x1, #:lo12:.LANCHOR167]
+	str	w2, [x1, #:lo12:.LANCHOR170]
 	ldr	w1, [x0, 60]
-	adrp	x0, .LANCHOR155
-	str	w1, [x0, #:lo12:.LANCHOR155]
-.L1913:
-	add	x19, x19, :lo12:.LANCHOR135
-	adrp	x0, .LANCHOR154
-	str	wzr, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR158
+	str	w1, [x0, #:lo12:.LANCHOR158]
+.L1905:
+	add	x19, x19, :lo12:.LANCHOR138
+	adrp	x0, .LANCHOR157
+	str	wzr, [x0, #:lo12:.LANCHOR157]
 	mov	w0, 34661
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1914
+	bne	.L1906
 	adrp	x0, .LANCHOR28
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR28]
-	adrp	x1, .LC44
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC44
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC45
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC45
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1914:
-	adrp	x1, .LANCHOR164
-	adrp	x0, .LANCHOR47
+.L1906:
+	adrp	x1, .LANCHOR167
+	adrp	x0, .LANCHOR48
 	ldr	x21, [sp, 32]
-	ldr	w2, [x1, #:lo12:.LANCHOR164]
-	ldrh	w0, [x0, #:lo12:.LANCHOR47]
-	ldr	w1, [x20, #:lo12:.LANCHOR165]
+	ldr	w2, [x1, #:lo12:.LANCHOR167]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	ldr	w1, [x20, #:lo12:.LANCHOR168]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	madd	w0, w0, w2, w1
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR202
-	str	w0, [x1, #:lo12:.LANCHOR202]
+	adrp	x1, .LANCHOR205
+	str	w0, [x1, #:lo12:.LANCHOR205]
 	ret
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.FtlMapBlkWriteDumpData,"ax",@progbits
@@ -13312,11 +13267,11 @@ Ftl_load_ext_data:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1930
+	cbz	w1, .L1922
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR76
+	adrp	x1, .LANCHOR77
 	add	x29, sp, 0
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -13324,28 +13279,28 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1916
+	cbnz	w1, .L1908
 	mov	x19, x0
-	adrp	x0, .LANCHOR181
-	adrp	x23, .LANCHOR199
-	add	x21, x23, :lo12:.LANCHOR199
-	ldr	x0, [x0, #:lo12:.LANCHOR181]
+	adrp	x0, .LANCHOR184
+	adrp	x23, .LANCHOR202
+	add	x21, x23, :lo12:.LANCHOR202
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	mov	x22, x23
 	str	x0, [x21, 8]
-	adrp	x0, .LANCHOR185
-	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	adrp	x0, .LANCHOR188
+	ldr	x24, [x0, #:lo12:.LANCHOR188]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1920
-	adrp	x1, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cbz	w0, .L1912
+	adrp	x1, .LANCHOR54
+	ldrh	w1, [x1, #:lo12:.LANCHOR54]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1920
+	bge	.L1912
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1920
+	beq	.L1912
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13356,18 +13311,18 @@ FtlMapBlkWriteDumpData:
 	str	w0, [x21, 4]
 	mov	x0, x21
 	bl	FlashReadPages
-	ldr	w0, [x23, #:lo12:.LANCHOR199]
+	ldr	w0, [x23, #:lo12:.LANCHOR202]
 	cmn	w0, #1
-	beq	.L1920
+	beq	.L1912
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1920
+	bne	.L1912
 	ldr	x2, [x21, 8]
-.L1933:
+.L1925:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13375,37 +13330,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1920:
+.L1912:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
-	add	x0, x22, :lo12:.LANCHOR199
+	add	x0, x22, :lo12:.LANCHOR202
 	str	w1, [x0, 4]
-	cbz	w1, .L1921
+	cbz	w1, .L1913
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1922:
-	add	x22, x22, :lo12:.LANCHOR199
+.L1914:
+	add	x22, x22, :lo12:.LANCHOR202
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1933
-.L1921:
-	adrp	x1, .LANCHOR57
+	b	.L1925
+.L1913:
+	adrp	x1, .LANCHOR58
 	ldr	x0, [x0, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1922
-.L1916:
+	b	.L1914
+.L1908:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1930:
+.L1922:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13417,84 +13372,84 @@ FtlScanSysBlk:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR127
+	adrp	x25, .LANCHOR130
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR64
-	ldr	x0, [x25, #:lo12:.LANCHOR127]
-	adrp	x22, .LANCHOR190
-	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	adrp	x21, .LANCHOR65
+	ldr	x0, [x25, #:lo12:.LANCHOR130]
+	adrp	x22, .LANCHOR193
+	ldr	w2, [x21, #:lo12:.LANCHOR65]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR125
+	adrp	x20, .LANCHOR128
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR70
+	adrp	x23, .LANCHOR71
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR126
+	adrp	x27, .LANCHOR129
 	lsl	w2, w2, 2
-	strh	wzr, [x20, #:lo12:.LANCHOR125]
-	strh	wzr, [x23, #:lo12:.LANCHOR70]
+	strh	wzr, [x20, #:lo12:.LANCHOR128]
+	strh	wzr, [x23, #:lo12:.LANCHOR71]
 	bl	ftl_memset
-	ldr	x0, [x27, #:lo12:.LANCHOR126]
+	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
-	ldr	w2, [x21, #:lo12:.LANCHOR64]
-	adrp	x19, .LANCHOR61
-	adrp	x28, .LANCHOR71
-	adrp	x24, .LANCHOR206
+	ldr	w2, [x21, #:lo12:.LANCHOR65]
+	adrp	x19, .LANCHOR62
+	adrp	x28, .LANCHOR72
+	adrp	x24, .LANCHOR209
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR190]
+	ldr	x0, [x22, #:lo12:.LANCHOR193]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x28, #:lo12:.LANCHOR71]
+	ldr	x0, [x28, #:lo12:.LANCHOR72]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 12
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR206
+	add	x0, x24, :lo12:.LANCHOR209
 	bl	ftl_memset
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	str	w0, [x29, 172]
-	adrp	x0, .LANCHOR40
-	add	x0, x0, :lo12:.LANCHOR40
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR156
-	add	x0, x0, :lo12:.LANCHOR156
+	adrp	x0, .LANCHOR159
+	add	x0, x0, :lo12:.LANCHOR159
 	str	x0, [x29, 112]
-.L1935:
+.L1927:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1976
-	adrp	x0, .LANCHOR37
-	adrp	x25, .LANCHOR177
-	adrp	x6, .LANCHOR46
+	bls	.L1968
+	adrp	x0, .LANCHOR38
+	adrp	x25, .LANCHOR180
+	adrp	x6, .LANCHOR47
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR104
-	ldr	x7, [x25, #:lo12:.LANCHOR177]
-	mov	w22, 0
-	ldr	x12, [x0, #:lo12:.LANCHOR104]
+	ldrh	w13, [x0, #:lo12:.LANCHOR38]
 	adrp	x0, .LANCHOR105
-	add	x6, x6, :lo12:.LANCHOR46
+	ldr	x7, [x25, #:lo12:.LANCHOR180]
+	mov	w22, 0
+	ldr	x12, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR106
+	add	x6, x6, :lo12:.LANCHOR47
 	mov	w8, 56
-	ldr	x11, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR58
-	ldrh	w10, [x0, #:lo12:.LANCHOR58]
-	b	.L1977
-.L1937:
+	ldr	x11, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR59
+	ldrh	w10, [x0, #:lo12:.LANCHOR59]
+	b	.L1969
+.L1929:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1936
+	cbnz	w0, .L1928
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13504,19 +13459,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1936:
+.L1928:
 	add	x5, x5, 1
-.L1977:
+.L1969:
 	cmp	w13, w5, uxth
-	bhi	.L1937
-	cbnz	w22, .L1938
-.L1975:
+	bhi	.L1929
+	cbnz	w22, .L1930
+.L1967:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1935
-.L1938:
+	b	.L1927
+.L1930:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13525,23 +13480,23 @@ FtlScanSysBlk:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR224
-	add	x0, x0, :lo12:.LANCHOR224
+	adrp	x0, .LANCHOR220
+	add	x0, x0, :lo12:.LANCHOR220
 	str	x0, [x29, 136]
-.L1974:
-	ldr	x0, [x25, #:lo12:.LANCHOR177]
+.L1966:
+	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1941
+	bne	.L1933
 	mov	w5, 16
 	mov	w7, 65535
-.L1943:
-	ldr	x0, [x25, #:lo12:.LANCHOR177]
-	add	x6, x25, :lo12:.LANCHOR177
+.L1935:
+	ldr	x0, [x25, #:lo12:.LANCHOR180]
+	add	x6, x25, :lo12:.LANCHOR180
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -13557,137 +13512,137 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1940
+	bne	.L1932
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2013
-.L1941:
-	adrp	x0, .LANCHOR156
-	ldr	w1, [x0, #:lo12:.LANCHOR156]
+	beq	.L2005
+.L1933:
+	adrp	x0, .LANCHOR159
+	ldr	w1, [x0, #:lo12:.LANCHOR159]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1944
+	beq	.L1936
 	cmp	w1, w0
-	bhi	.L1945
-.L1944:
+	bhi	.L1937
+.L1936:
 	cmn	w0, #1
-	beq	.L1945
+	beq	.L1937
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1945:
+.L1937:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1947
-	bhi	.L1948
+	beq	.L1939
+	bhi	.L1940
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1949
-.L1946:
+	beq	.L1941
+.L1938:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1974
-	b	.L1975
-.L1940:
-	ldr	x0, [x25, #:lo12:.LANCHOR177]
+	bne	.L1966
+	b	.L1967
+.L1932:
+	ldr	x0, [x25, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1941
+	bne	.L1933
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1943
-.L2013:
+	bne	.L1935
+.L2005:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1946
-.L1948:
+	b	.L1938
+.L1940:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1950
+	beq	.L1942
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2013
-	b	.L1946
-.L1950:
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR64]
+	beq	.L2005
+	b	.L1938
+.L1942:
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L1952
+	bls	.L1944
 	ldr	x1, [x29, 136]
-	mov	w2, 1302
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	mov	w2, 1308
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1952:
-	ldr	w6, [x21, #:lo12:.LANCHOR64]
+.L1944:
+	ldr	w6, [x21, #:lo12:.LANCHOR65]
 	ldr	x3, [x29, 152]
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
 	sub	w2, w2, #1
-	ldr	x5, [x3, #:lo12:.LANCHOR127]
+	ldr	x5, [x3, #:lo12:.LANCHOR130]
 	sxth	w2, w2
-.L1953:
+.L1945:
 	cmp	w0, w2
-	bgt	.L1959
-	tbz	w0, #31, .L1994
-	b	.L1946
-.L1959:
+	bgt	.L1951
+	tbz	w0, #31, .L1986
+	b	.L1938
+.L1951:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1954
+	bls	.L1946
 	ldr	w2, [x5]
-	cbnz	w2, .L1955
+	cbnz	w2, .L1947
 	cmp	w6, w1
-	beq	.L1955
+	beq	.L1947
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR125]
-.L1955:
+	strh	w1, [x20, #:lo12:.LANCHOR128]
+.L1947:
 	ldr	x1, [x29, 160]
-	ldr	x6, [x1, #:lo12:.LANCHOR126]
+	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L1956:
+.L1948:
 	cmp	w1, w0
-	bne	.L1957
+	bne	.L1949
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1946
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	tbnz	w0, #31, .L1938
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	ldr	w2, [x21, #:lo12:.LANCHOR65]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1946
-.L1994:
+	bgt	.L1938
+.L1986:
 	add	w1, w1, 1
-	strh	w1, [x20, #:lo12:.LANCHOR125]
+	strh	w1, [x20, #:lo12:.LANCHOR128]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
-	ldr	x1, [x1, #:lo12:.LANCHOR126]
-.L2012:
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+.L2004:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1946
-.L1957:
+	b	.L1938
+.L1949:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13699,74 +13654,74 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1956
-.L1954:
+	b	.L1948
+.L1946:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1953
-.L1949:
-	ldrh	w1, [x23, #:lo12:.LANCHOR70]
-	ldrh	w0, [x19, #:lo12:.LANCHOR61]
+	b	.L1945
+.L1941:
+	ldrh	w1, [x23, #:lo12:.LANCHOR71]
+	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bls	.L1962
+	bls	.L1954
 	ldr	x1, [x29, 136]
-	mov	w2, 1349
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	mov	w2, 1355
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L1962:
-	ldrh	w6, [x19, #:lo12:.LANCHOR61]
-	ldrh	w2, [x23, #:lo12:.LANCHOR70]
+.L1954:
+	ldrh	w6, [x19, #:lo12:.LANCHOR62]
+	ldrh	w2, [x23, #:lo12:.LANCHOR71]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR190]
-.L1963:
+	ldr	x1, [x1, #:lo12:.LANCHOR193]
+.L1955:
 	cmp	w0, w5
-	ble	.L1968
+	ble	.L1960
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1964
+	bls	.L1956
 	ldr	w5, [x1]
-	cbnz	w5, .L1965
+	cbnz	w5, .L1957
 	cmp	w6, w2
-	beq	.L1965
+	beq	.L1957
 	add	w2, w2, 1
-	strh	w2, [x23, #:lo12:.LANCHOR70]
-.L1965:
-	ldr	x6, [x28, #:lo12:.LANCHOR71]
+	strh	w2, [x23, #:lo12:.LANCHOR71]
+.L1957:
+	ldr	x6, [x28, #:lo12:.LANCHOR72]
 	mov	w2, 0
-.L1966:
+.L1958:
 	cmp	w2, w0
-	bne	.L1967
+	bne	.L1959
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1968:
-	tbnz	w0, #31, .L1946
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
-	ldrh	w5, [x23, #:lo12:.LANCHOR70]
+.L1960:
+	tbnz	w0, #31, .L1938
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldrh	w5, [x23, #:lo12:.LANCHOR71]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1946
+	bgt	.L1938
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
-	strh	w5, [x23, #:lo12:.LANCHOR70]
+	strh	w5, [x23, #:lo12:.LANCHOR71]
 	str	w2, [x1, x0, lsl 2]
-	ldr	x1, [x28, #:lo12:.LANCHOR71]
-	b	.L2012
-.L1967:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	b	.L2004
+.L1959:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13778,66 +13733,66 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1966
-.L1964:
+	b	.L1958
+.L1956:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1963
-.L1947:
-	ldrh	w5, [x24, #:lo12:.LANCHOR206]
+	b	.L1955
+.L1939:
+	ldrh	w5, [x24, #:lo12:.LANCHOR209]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR206
+	add	x2, x24, :lo12:.LANCHOR209
 	cmp	w5, w1
-	bne	.L1970
-	strh	w26, [x24, #:lo12:.LANCHOR206]
+	bne	.L1962
+	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w0, [x2, 8]
-	b	.L1946
-.L1970:
+	b	.L1938
+.L1962:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1971
+	beq	.L1963
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1971:
-	add	x0, x24, :lo12:.LANCHOR206
+.L1963:
+	add	x0, x24, :lo12:.LANCHOR209
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1972
-	ldrh	w2, [x24, #:lo12:.LANCHOR206]
+	bcs	.L1964
+	ldrh	w2, [x24, #:lo12:.LANCHOR209]
 	strh	w2, [x0, 4]
-	strh	w26, [x24, #:lo12:.LANCHOR206]
+	strh	w26, [x24, #:lo12:.LANCHOR209]
 	str	w1, [x0, 8]
-	b	.L1946
-.L1972:
+	b	.L1938
+.L1964:
 	strh	w26, [x0, 4]
-	b	.L1946
-.L1976:
+	b	.L1938
+.L1968:
 	ldr	x0, [x29, 160]
-	ldr	x2, [x0, #:lo12:.LANCHOR126]
+	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L1978
-.L1981:
-	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	cbz	w0, .L1970
+.L1973:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1]
-	cbz	w0, .L1979
-.L1980:
-	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR64]
+	cbz	w0, .L1971
+.L1972:
+	ldrh	w1, [x20, #:lo12:.LANCHOR128]
+	ldr	w0, [x21, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bls	.L2010
-	mov	w2, 1483
-	adrp	x1, .LANCHOR224
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR224
-	add	x0, x0, :lo12:.LC6
+	bls	.L2002
+	mov	w2, 1489
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2010:
+.L2002:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13846,24 +13801,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1978:
-	ldrh	w0, [x20, #:lo12:.LANCHOR125]
-	cbz	w0, .L1981
-	ldr	w1, [x21, #:lo12:.LANCHOR64]
+.L1970:
+	ldrh	w0, [x20, #:lo12:.LANCHOR128]
+	cbz	w0, .L1973
+	ldr	w1, [x21, #:lo12:.LANCHOR65]
 	mov	w0, 0
-.L1982:
+.L1974:
 	cmp	w0, w1
-	bcs	.L1981
+	bcs	.L1973
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1983
+	cbz	w3, .L1975
 	ldr	x1, [x29, 152]
-	add	x7, x21, :lo12:.LANCHOR64
-	ldr	x4, [x1, #:lo12:.LANCHOR127]
+	add	x7, x21, :lo12:.LANCHOR65
+	ldr	x4, [x1, #:lo12:.LANCHOR130]
 	mov	w1, w0
-.L1984:
+.L1976:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1981
+	bcs	.L1973
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13875,29 +13830,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1984
-.L1983:
+	b	.L1976
+.L1975:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1982
-.L1979:
-	ldrh	w0, [x23, #:lo12:.LANCHOR70]
-	cbz	w0, .L1980
-	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	b	.L1974
+.L1971:
+	ldrh	w0, [x23, #:lo12:.LANCHOR71]
+	cbz	w0, .L1972
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 0
-.L1989:
+.L1981:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1980
+	bge	.L1972
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1990
+	cbz	w3, .L1982
 	ldr	x2, [x29, 144]
-	add	x19, x19, :lo12:.LANCHOR61
-	ldr	x3, [x2, #:lo12:.LANCHOR190]
-.L1991:
+	add	x19, x19, :lo12:.LANCHOR62
+	ldr	x3, [x2, #:lo12:.LANCHOR193]
+.L1983:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1980
+	bge	.L1972
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13909,11 +13864,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1991
-.L1990:
+	b	.L1983
+.L1982:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1989
+	b	.L1981
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -13924,29 +13879,32 @@ FtlLoadSysInfo:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR206
+	adrp	x19, .LANCHOR202
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR199
+	add	x20, x19, :lo12:.LANCHOR202
+	adrp	x24, .LANCHOR183
 	stp	x25, x26, [sp, 64]
-	add	x19, x23, :lo12:.LANCHOR199
-	adrp	x25, .LANCHOR185
-	adrp	x24, .LANCHOR83
+	adrp	x26, .LANCHOR188
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR39
-	ldr	x0, [x25, #:lo12:.LANCHOR185]
 	stp	x27, x28, [sp, 80]
-	stp	xzr, x0, [x19, 8]
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x21, #:lo12:.LANCHOR39]
+	adrp	x25, .LANCHOR84
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	adrp	x22, .LANCHOR40
+	str	x0, [x20, 8]
+	adrp	x21, .LANCHOR209
+	ldr	x0, [x26, #:lo12:.LANCHOR188]
+	str	x0, [x20, 16]
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldrh	w2, [x22, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2015
-.L2024:
+	bne	.L2007
+.L2016:
 	mov	w0, -1
-.L2014:
+.L2006:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13954,63 +13912,62 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2015:
-	add	x26, x20, :lo12:.LANCHOR206
-	mov	w27, 19539
+.L2007:
+	add	x27, x21, :lo12:.LANCHOR209
 	mov	w1, 1
-	movk	w27, 0x4654, lsl 16
 	bl	FtlGetLastWrittenPage
-	mov	w28, 61604
-	sxth	w22, w0
+	sxth	w23, w0
 	add	w0, w0, 1
-	strh	w0, [x26, 2]
-	adrp	x26, .LANCHOR180
-.L2017:
-	tbz	w22, #31, .L2020
-	mov	w2, 1543
-	adrp	x1, .LANCHOR225
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC6
+	mov	w28, 61604
+	strh	w0, [x27, 2]
+	mov	w27, 19539
+	movk	w27, 0x4654, lsl 16
+.L2009:
+	tbz	w23, #31, .L2012
+	mov	w2, 1549
+	adrp	x1, .LANCHOR221
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR221
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2019:
-	adrp	x1, .LANCHOR57
-	ldrh	w0, [x21, #:lo12:.LANCHOR39]
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+.L2011:
+	adrp	x1, .LANCHOR58
+	ldrh	w0, [x22, #:lo12:.LANCHOR40]
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2022
-	mov	w2, 1545
-	adrp	x1, .LANCHOR225
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC6
+	bcs	.L2014
+	mov	w2, 1551
+	adrp	x1, .LANCHOR221
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR221
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2022:
-	add	x23, x23, :lo12:.LANCHOR199
+.L2014:
+	add	x19, x19, :lo12:.LANCHOR202
 	mov	w2, 48
-	adrp	x19, .LANCHOR80
-	add	x0, x19, :lo12:.LANCHOR80
-	ldr	x1, [x23, 8]
+	adrp	x20, .LANCHOR81
+	add	x0, x20, :lo12:.LANCHOR81
+	ldr	x1, [x19, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x21, #:lo12:.LANCHOR39]
-	ldr	x1, [x23, 8]
+	ldr	x0, [x25, #:lo12:.LANCHOR84]
+	ldrh	w2, [x22, #:lo12:.LANCHOR40]
+	ldr	x1, [x19, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-	ldrh	w1, [x21, #:lo12:.LANCHOR39]
-	ldr	x0, [x23, 8]
+	ldrh	w1, [x22, #:lo12:.LANCHOR40]
+	ldr	x0, [x19, 8]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
 	add	x1, x1, 48
@@ -14020,312 +13977,580 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2023
-	ldrh	w1, [x21, #:lo12:.LANCHOR39]
-	adrp	x0, .LANCHOR66
-	ldrh	w2, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR70
+	ldrh	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L2015
+	ldrh	w1, [x22, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR67
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
 	lsr	w0, w1, 3
 	add	w1, w0, w1, lsl 1
-	ldr	x0, [x23, 8]
+	ldr	x0, [x19, 8]
 	add	w1, w1, 52
 	lsl	w2, w2, 2
 	and	x1, x1, 65532
 	add	x1, x0, x1
-	adrp	x0, .LANCHOR192
-	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	adrp	x0, .LANCHOR195
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
 	bl	ftl_memcpy
-.L2023:
-	ldr	w2, [x19, #:lo12:.LANCHOR80]
+.L2015:
+	ldr	w2, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	add	x0, x19, :lo12:.LANCHOR80
+	add	x0, x20, :lo12:.LANCHOR81
 	cmp	w2, w1
-	bne	.L2024
-	add	x20, x20, :lo12:.LANCHOR206
+	bne	.L2016
+	add	x21, x21, :lo12:.LANCHOR209
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
-	adrp	x0, .LANCHOR44
-	strh	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR45
+	strh	w1, [x21, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR45]
 	cmp	w2, w0
-	bne	.L2024
-	adrp	x0, .LANCHOR226
-	adrp	x2, .LANCHOR72
-	adrp	x3, .LANCHOR37
-	str	w1, [x0, #:lo12:.LANCHOR226]
-	adrp	x0, .LANCHOR52
-	ldrh	w3, [x3, #:lo12:.LANCHOR37]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	bne	.L2016
+	adrp	x0, .LANCHOR222
+	adrp	x2, .LANCHOR73
+	adrp	x3, .LANCHOR38
+	str	w1, [x0, #:lo12:.LANCHOR222]
+	adrp	x0, .LANCHOR53
+	ldrh	w3, [x3, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR72]
-	adrp	x2, .LANCHOR55
-	ldrh	w2, [x2, #:lo12:.LANCHOR55]
+	str	w0, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR56
+	ldrh	w2, [x2, #:lo12:.LANCHOR56]
 	mul	w0, w2, w0
-	adrp	x2, .LANCHOR68
-	str	w0, [x2, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR41
-	ldr	w2, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR74+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	adrp	x2, .LANCHOR69
+	str	w0, [x2, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR42
+	ldr	w2, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR227
-	strh	w0, [x3, #:lo12:.LANCHOR227]
-	bls	.L2025
-	mov	w2, 1572
-	adrp	x1, .LANCHOR225
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC6
+	adrp	x3, .LANCHOR223
+	strh	w0, [x3, #:lo12:.LANCHOR223]
+	bls	.L2017
+	mov	w2, 1578
+	adrp	x1, .LANCHOR221
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR221
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2025:
-	add	x1, x19, :lo12:.LANCHOR80
-	adrp	x0, .LANCHOR91
-	add	x3, x0, :lo12:.LANCHOR91
-	adrp	x5, .LANCHOR201
-	mov	x22, x5
+.L2017:
+	add	x1, x20, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR92
+	add	x3, x0, :lo12:.LANCHOR92
+	adrp	x19, .LANCHOR204
 	ldrh	w2, [x1, 16]
-	ldrh	w7, [x1, 14]
-	strh	w7, [x0, #:lo12:.LANCHOR91]
+	ldrh	w6, [x1, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR92]
 	lsr	w4, w2, 6
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
 	ldrb	w2, [x1, 11]
 	strb	w2, [x3, 8]
-	add	x2, x5, :lo12:.LANCHOR201
+	add	x2, x19, :lo12:.LANCHOR204
 	strh	w4, [x3, 2]
 	mov	w3, -1
-	strh	w3, [x5, #:lo12:.LANCHOR201]
+	strh	w3, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x2, 2]
 	strb	wzr, [x2, 6]
 	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR92
+	adrp	x2, .LANCHOR93
 	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR92
-	strh	w3, [x2, #:lo12:.LANCHOR92]
-	mov	x20, x2
+	add	x4, x2, :lo12:.LANCHOR93
+	strh	w3, [x2, #:lo12:.LANCHOR93]
+	mov	x21, x2
 	ldrh	w3, [x1, 20]
-	lsr	w6, w3, 6
+	lsr	w5, w3, 6
 	and	w3, w3, 63
 	strb	w3, [x4, 6]
 	ldrb	w3, [x1, 12]
-	strh	w6, [x4, 2]
+	strh	w5, [x4, 2]
 	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR93
+	adrp	x4, .LANCHOR94
 	ldrh	w3, [x1, 22]
-	add	x6, x4, :lo12:.LANCHOR93
-	strh	w3, [x4, #:lo12:.LANCHOR93]
-	mov	x21, x4
+	add	x5, x4, :lo12:.LANCHOR94
+	strh	w3, [x4, #:lo12:.LANCHOR94]
+	mov	x22, x4
 	ldrh	w3, [x1, 24]
-	lsr	w8, w3, 6
+	lsr	w7, w3, 6
 	and	w3, w3, 63
-	strb	w3, [x6, 6]
+	strb	w3, [x5, 6]
 	ldrb	w3, [x1, 13]
-	strb	w3, [x6, 8]
-	adrp	x3, .LANCHOR158
-	strh	w8, [x6, 2]
-	ldr	w6, [x1, 32]
-	str	wzr, [x3, #:lo12:.LANCHOR158]
-	adrp	x3, .LANCHOR159
-	str	wzr, [x3, #:lo12:.LANCHOR159]
-	adrp	x3, .LANCHOR163
-	str	wzr, [x3, #:lo12:.LANCHOR163]
+	strb	w3, [x5, 8]
+	adrp	x3, .LANCHOR161
+	strh	w7, [x5, 2]
+	ldr	w5, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR161]
 	adrp	x3, .LANCHOR162
 	str	wzr, [x3, #:lo12:.LANCHOR162]
-	adrp	x3, .LANCHOR164
-	str	w6, [x3, #:lo12:.LANCHOR164]
-	adrp	x3, .LANCHOR165
-	str	wzr, [x3, #:lo12:.LANCHOR165]
 	adrp	x3, .LANCHOR166
 	str	wzr, [x3, #:lo12:.LANCHOR166]
-	adrp	x3, .LANCHOR161
-	str	wzr, [x3, #:lo12:.LANCHOR161]
+	adrp	x3, .LANCHOR165
+	str	wzr, [x3, #:lo12:.LANCHOR165]
+	adrp	x3, .LANCHOR167
+	str	w5, [x3, #:lo12:.LANCHOR167]
+	adrp	x3, .LANCHOR168
+	str	wzr, [x3, #:lo12:.LANCHOR168]
+	adrp	x3, .LANCHOR169
+	str	wzr, [x3, #:lo12:.LANCHOR169]
+	adrp	x3, .LANCHOR164
+	str	wzr, [x3, #:lo12:.LANCHOR164]
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR156
-	ldr	w6, [x1, #:lo12:.LANCHOR156]
-	cmp	w3, w6
-	bls	.L2026
-	str	w3, [x1, #:lo12:.LANCHOR156]
-.L2026:
-	add	x19, x19, :lo12:.LANCHOR80
-	adrp	x1, .LANCHOR157
-	ldr	w3, [x1, #:lo12:.LANCHOR157]
-	ldr	w2, [x19, 36]
+	adrp	x1, .LANCHOR159
+	ldr	w5, [x1, #:lo12:.LANCHOR159]
+	cmp	w3, w5
+	bls	.L2018
+	str	w3, [x1, #:lo12:.LANCHOR159]
+.L2018:
+	add	x20, x20, :lo12:.LANCHOR81
+	adrp	x1, .LANCHOR160
+	ldr	w3, [x1, #:lo12:.LANCHOR160]
+	ldr	w2, [x20, 36]
 	cmp	w2, w3
-	bls	.L2027
-	str	w2, [x1, #:lo12:.LANCHOR157]
-.L2027:
+	bls	.L2019
+	str	w2, [x1, #:lo12:.LANCHOR160]
+.L2019:
 	mov	w1, 65535
-	cmp	w7, w1
-	beq	.L2028
-	add	x0, x0, :lo12:.LANCHOR91
+	cmp	w6, w1
+	beq	.L2020
+	add	x0, x0, :lo12:.LANCHOR92
 	bl	make_superblock
-.L2028:
-	ldrh	w2, [x20, #:lo12:.LANCHOR92]
+.L2020:
+	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR92
+	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
-	beq	.L2029
+	beq	.L2021
 	bl	make_superblock
-.L2029:
-	ldrh	w2, [x21, #:lo12:.LANCHOR93]
+.L2021:
+	ldrh	w2, [x22, #:lo12:.LANCHOR94]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR93
+	add	x0, x22, :lo12:.LANCHOR94
 	cmp	w2, w1
-	beq	.L2030
+	beq	.L2022
 	bl	make_superblock
-.L2030:
-	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+.L2022:
+	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR201
+	add	x0, x19, :lo12:.LANCHOR204
 	cmp	w2, w1
-	beq	.L2031
+	beq	.L2023
 	bl	make_superblock
-.L2031:
+.L2023:
 	mov	w0, 0
-	b	.L2014
-.L2020:
-	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	b	.L2006
+.L2012:
+	ldrh	w0, [x21, #:lo12:.LANCHOR209]
 	mov	w2, 1
 	mov	w1, w2
-	orr	w0, w22, w0, lsl 10
-	str	w0, [x19, 4]
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
-	str	x0, [x19, 8]
-	mov	x0, x19
+	orr	w0, w23, w0, lsl 10
+	str	w0, [x20, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
+	str	x0, [x20, 8]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x19]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2018
-	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	beq	.L2010
+	ldr	x0, [x24, #:lo12:.LANCHOR183]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2018
-	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	bne	.L2010
+	ldr	x0, [x26, #:lo12:.LANCHOR188]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L2019
-.L2018:
-	sub	w22, w22, #1
-	sxth	w22, w22
-	b	.L2017
+	beq	.L2011
+.L2010:
+	sub	w23, w23, #1
+	sxth	w23, w23
+	b	.L2009
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlDumpBlockInfo,"ax",@progbits
+	.align	2
+	.global	FtlDumpBlockInfo
+	.type	FtlDumpBlockInfo, %function
+FtlDumpBlockInfo:
+	sub	sp, sp, #160
+	lsr	w0, w0, 10
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR53
+	stp	x21, x22, [sp, 48]
+	and	w22, w1, 255
+	stp	x23, x24, [sp, 64]
+	add	x23, x29, 144
+	stp	x25, x26, [sp, 80]
+	str	x27, [sp, 96]
+	bl	P2V_block_in_plane
+	ldrh	w25, [x19, #:lo12:.LANCHOR53]
+	and	w21, w0, 65535
+	adrp	x1, .LANCHOR224
+	adrp	x0, .LC46
+	add	x1, x1, :lo12:.LANCHOR224
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+	adrp	x1, .LANCHOR84
+	ubfiz	x0, x21, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	ldrh	w2, [x1, x0]
+	mov	w1, w21
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
+	bl	printf
+	strh	w21, [x23, -48]!
+	mov	x0, x23
+	bl	make_superblock
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2042
+	cbnz	w22, .L2042
+	mov	w0, w21
+	bl	ftl_get_blk_mode
+	mov	w21, w0
+	cmp	w0, 1
+	bne	.L2033
+	adrp	x0, .LANCHOR54
+	ldrh	w25, [x0, #:lo12:.LANCHOR54]
+.L2033:
+	ldrh	w3, [x19, #:lo12:.LANCHOR53]
+	adrp	x26, .LC49
+	add	x26, x26, :lo12:.LC49
+	mov	w20, 0
+	mov	w27, 56
+	mov	w2, w25
+	mov	w1, w21
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
+	bl	printf
+.L2034:
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LANCHOR38
+	adrp	x24, .LANCHOR180
+	add	x3, x23, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w5, [x0, #:lo12:.LANCHOR38]
+	mov	w19, 0
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR106
+	ldr	x0, [x24, #:lo12:.LANCHOR180]
+	mov	w11, 65535
+	ldr	x8, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR59
+	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	mov	w1, 0
+.L2035:
+	cmp	w1, w5
+	bne	.L2037
+	mov	w1, w19
+	umull	x19, w19, w27
+	mov	x22, 0
+	mov	w2, w21
+	bl	FlashReadPages
+.L2038:
+	cmp	x22, x19
+	bne	.L2039
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	cmp	w25, w20
+	bne	.L2034
+.L2040:
+	ldp	x19, x20, [sp, 32]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 160
+	ret
+.L2042:
+	mov	w21, 0
+	b	.L2033
+.L2037:
+	ldrh	w2, [x3]
+	cmp	w2, w11
+	beq	.L2036
+	umaddl	x4, w19, w27, x0
+	orr	w2, w20, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w19, w7
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x4, 8]
+	mul	w2, w19, w10
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	asr	w2, w2, 2
+	add	x2, x8, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2036:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	and	w1, w1, 65535
+	b	.L2035
+.L2039:
+	ldr	x8, [x24, #:lo12:.LANCHOR180]
+	ldrh	w1, [x29, 96]
+	add	x2, x8, x22
+	ldp	x3, x0, [x2, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp, 8]
+	ldr	w3, [x3]
+	str	w3, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x26
+	ldr	w3, [x2, 4]
+	ldr	w2, [x8, x22]
+	add	x22, x22, 56
+	bl	printf
+	b	.L2038
+	.size	FtlDumpBlockInfo, .-FtlDumpBlockInfo
+	.section	.text.FtlScanAllBlock,"ax",@progbits
+	.align	2
+	.global	FtlScanAllBlock
+	.type	FtlScanAllBlock, %function
+FtlScanAllBlock:
+	sub	sp, sp, #144
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC46
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC46
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR41
+	stp	x19, x20, [sp, 32]
+	adrp	x24, .LC51
+	stp	x21, x22, [sp, 48]
+	mov	w20, 0
+	add	x23, x23, :lo12:.LANCHOR41
+	add	x24, x24, :lo12:.LC51
+	str	x25, [sp, 80]
+	bl	printf
+.L2046:
+	ldrh	w0, [x23]
+	cmp	w0, w20
+	bhi	.L2054
+	ldp	x19, x20, [sp, 32]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x29, x30, [sp, 16]
+	ldr	x25, [sp, 80]
+	add	sp, sp, 144
+	ret
+.L2054:
+	strh	w20, [x29, 80]
+	mov	w0, w20
+	bl	ftl_get_blk_mode
+	mov	w3, w0
+	adrp	x2, .LANCHOR84
+	ubfiz	x1, x20, 1, 16
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	adrp	x22, .LANCHOR180
+	mov	w19, 0
+	ldrh	w2, [x2, x1]
+	mov	w1, w20
+	bl	printf
+	add	x0, x29, 80
+	bl	make_superblock
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LANCHOR38
+	add	x3, x29, 96
+	mov	w11, 65535
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR58
+	ldrh	w5, [x0, #:lo12:.LANCHOR38]
+	mov	w12, 56
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR106
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	ldr	x8, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR59
+	ldrh	w10, [x1, #:lo12:.LANCHOR59]
+	mov	w1, 0
+.L2047:
+	cmp	w1, w5
+	bne	.L2049
+	mov	w25, 56
+	mov	x21, 0
+	mov	w2, 0
+	mov	w1, w19
+	umull	x25, w19, w25
+	bl	FlashReadPages
+.L2050:
+	cmp	x21, x25
+	bne	.L2051
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	adrp	x25, .LC52
+	add	x25, x25, :lo12:.LC52
+	mov	w1, w19
+	mov	x19, 0
+	mov	w2, 1
+	bl	FlashReadPages
+.L2052:
+	cmp	x21, x19
+	bne	.L2053
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2046
+.L2049:
+	ldrh	w2, [x3]
+	cmp	w2, w11
+	beq	.L2048
+	umaddl	x4, w19, w12, x0
+	lsl	w2, w2, 10
+	str	w2, [x4, 4]
+	mul	w2, w19, w7
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x4, 8]
+	mul	w2, w19, w10
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	asr	w2, w2, 2
+	add	x2, x8, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2048:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	and	w1, w1, 65535
+	b	.L2047
+.L2051:
+	ldr	x8, [x22, #:lo12:.LANCHOR180]
+	ldrh	w1, [x29, 80]
+	add	x2, x8, x21
+	ldp	x3, x0, [x2, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp, 8]
+	ldr	w3, [x3]
+	str	w3, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x24
+	ldr	w3, [x2, 4]
+	ldr	w2, [x8, x21]
+	add	x21, x21, 56
+	bl	printf
+	b	.L2050
+.L2053:
+	ldr	x8, [x22, #:lo12:.LANCHOR180]
+	ldrh	w1, [x29, 80]
+	add	x2, x8, x19
+	ldp	x3, x0, [x2, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp, 8]
+	ldr	w3, [x3]
+	str	w3, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x25
+	ldr	w3, [x2, 4]
+	ldr	w2, [x8, x19]
+	add	x19, x19, 56
+	bl	printf
+	b	.L2052
+	.size	FtlScanAllBlock, .-FtlScanAllBlock
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
 	.global	FtlMapTblRecovery
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -144]!
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR180
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR202
 	ldrh	w23, [x0, 6]
-	ldr	x22, [x0, 40]
-	ldr	x0, [x0, 16]
-	str	x0, [x29, 152]
+	adrp	x24, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	ldr	x21, [x0, 40]
+	ldr	x22, [x0, 16]
 	lsl	w2, w23, 2
-	ldr	x0, [x19, 24]
-	str	x0, [x29, 136]
+	ldr	x0, [x0, 24]
+	str	x0, [x29, 128]
 	ldrh	w0, [x19, 8]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR53
 	stp	x27, x28, [sp, 80]
-	mov	w26, 0
-	str	w0, [x29, 144]
-	mov	x0, x22
+	mov	w27, 0
+	str	w0, [x29, 140]
+	mov	x0, x21
 	bl	ftl_memset
-	stp	wzr, wzr, [x19, 48]
-	add	x3, x20, :lo12:.LANCHOR199
-	ldr	x0, [x21, #:lo12:.LANCHOR180]
-	mov	w1, -1
-	mov	x24, x3
+	str	x20, [x29, 120]
+	adrp	x7, .LANCHOR183
+	add	x3, x20, :lo12:.LANCHOR202
+	mov	x26, x7
+	mov	x20, x3
+	ldr	x0, [x7, #:lo12:.LANCHOR183]
 	str	x0, [x3, 8]
-	adrp	x0, .LANCHOR185
-	str	x0, [x29, 128]
-	ldr	x27, [x0, #:lo12:.LANCHOR185]
-	ldr	w0, [x29, 144]
-	str	x27, [x3, 16]
+	adrp	x0, .LANCHOR188
+	stp	wzr, wzr, [x19, 48]
+	ldr	x25, [x0, #:lo12:.LANCHOR188]
+	mov	w0, -1
+	str	x25, [x3, 16]
+	strh	w0, [x19]
+	strh	w0, [x19, 2]
+	mov	w0, 1
+	str	w0, [x19, 56]
+	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
-	strh	w1, [x19]
-	strh	w1, [x19, 2]
-	mov	w1, 1
-	str	w0, [x29, 120]
-	add	x0, x25, :lo12:.LANCHOR53
-	str	w1, [x19, 56]
+	str	w0, [x29, 136]
+	add	x0, x24, :lo12:.LANCHOR54
 	str	x0, [x29, 112]
-.L2041:
-	ldr	w0, [x29, 144]
-	cmp	w26, w0
-	bge	.L2059
-	ldr	w0, [x29, 120]
-	sxtw	x28, w26
-	cmp	w26, w0
-	bne	.L2042
-	ldr	x2, [x29, 152]
+.L2057:
+	ldr	w0, [x29, 140]
+	cmp	w27, w0
+	bge	.L2075
+	ldr	w0, [x29, 136]
+	sxtw	x28, w27
+	cmp	w27, w0
+	bne	.L2058
 	lsl	x0, x28, 1
-	ldr	x1, [x29, 152]
-	mov	w25, 0
-	add	x24, x1, x0
 	mov	w1, 1
-	ldrh	w0, [x2, x0]
+	add	x24, x22, x0
+	ldrh	w0, [x22, x0]
+	mov	w22, 0
 	bl	FtlGetLastWrittenPage
-	sxth	w3, w0
+	sxth	w26, w0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	ldr	x0, [x29, 136]
-	strh	w26, [x19]
-	add	x26, x20, :lo12:.LANCHOR199
+	ldr	x0, [x29, 128]
+	strh	w27, [x19]
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.L2043:
-	cmp	w25, w3
-	ble	.L2046
+	ldr	x0, [x29, 120]
+	add	x20, x0, :lo12:.LANCHOR202
 .L2059:
-	adrp	x23, .LANCHOR124
-	str	x23, [x29, 136]
-	add	x0, x23, :lo12:.LANCHOR124
-	cmp	x19, x0
-	bne	.L2048
-	adrp	x0, .LANCHOR69
-	ldrh	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2048
-	adrp	x25, .LANCHOR125
-	add	x26, x25, :lo12:.LANCHOR125
-	adrp	x28, .LANCHOR66
-	mov	w22, 0
-	add	x0, x28, :lo12:.LANCHOR66
-	adrp	x24, .LANCHOR192
-	str	x0, [x29, 144]
-.L2062:
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0]
-	cmp	w22, w0
-	bcc	.L2070
-.L2048:
+	cmp	w22, w26
+	ble	.L2062
+.L2075:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR54
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w1, w0
-	bne	.L2061
+	bne	.L2064
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L2061:
+.L2064:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -14336,219 +14561,121 @@ FtlMapTblRecovery:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 144
 	ret
-.L2046:
+.L2062:
 	ldrh	w0, [x24]
 	mov	w2, 1
-	str	w3, [x29, 144]
 	mov	w1, w2
-	orr	w0, w25, w0, lsl 10
-	str	w0, [x26, 4]
-	mov	x0, x26
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x26]
-	ldr	w3, [x29, 144]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2044
-	ldrh	w0, [x27, 8]
+	beq	.L2060
+	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2045
-	ldrh	w2, [x27]
+	bls	.L2061
+	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2045
+	bne	.L2061
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x26, 4]
-	str	w1, [x22, x0]
-.L2045:
-	add	w25, w25, 1
-	sxth	w25, w25
-	b	.L2043
-.L2044:
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L2061:
+	add	w22, w22, 1
+	sxth	w22, w22
+	b	.L2059
+.L2060:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 60]
-	b	.L2045
-.L2042:
-	ldr	x1, [x29, 152]
+	b	.L2061
+.L2058:
+	ldr	x0, [x26, #:lo12:.LANCHOR183]
 	mov	w2, 1
-	ldr	x0, [x21, #:lo12:.LANCHOR180]
-	str	x0, [x24, 8]
+	str	x0, [x20, 8]
 	lsl	x0, x28, 1
-	add	x28, x1, x0
-	ldrh	w0, [x1, x0]
-	ldrh	w1, [x25, #:lo12:.LANCHOR53]
+	ldrh	w1, [x24, #:lo12:.LANCHOR54]
+	add	x28, x22, x0
+	ldrh	w0, [x22, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
-	str	w0, [x24, 4]
-	mov	x0, x24
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x24]
+	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L2072
-	ldrh	w1, [x27]
+	beq	.L2077
+	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L2072
-	ldrh	w1, [x27, 8]
+	bne	.L2077
+	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2050
-.L2072:
-	mov	w6, 0
-.L2051:
+	beq	.L2066
+.L2077:
+	mov	w5, 0
+.L2067:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
-	cmp	w6, w0
-	bge	.L2057
+	cmp	w5, w0
+	bge	.L2073
 	ldrh	w0, [x28]
 	mov	w2, 1
-	str	w6, [x29, 108]
+	str	w5, [x29, 108]
 	mov	w1, w2
-	orr	w0, w6, w0, lsl 10
-	str	w0, [x24, 4]
-	mov	x0, x24
+	orr	w0, w5, w0, lsl 10
+	str	w0, [x20, 4]
+	mov	x0, x20
 	bl	FlashReadPages
-	ldr	w0, [x24]
-	ldr	w6, [x29, 108]
+	ldr	w0, [x20]
+	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L2055
-	ldrh	w0, [x27, 8]
+	beq	.L2071
+	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L2055
-	ldrh	w2, [x27]
+	bls	.L2071
+	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2055
+	bne	.L2071
 	ubfiz	x0, x0, 2, 16
-	ldr	w1, [x24, 4]
-	str	w1, [x22, x0]
-.L2055:
-	add	w6, w6, 1
-	sxth	w6, w6
-	b	.L2051
-.L2050:
-	ldrh	w6, [x25, #:lo12:.LANCHOR53]
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L2071:
+	add	w5, w5, 1
+	sxth	w5, w5
+	b	.L2067
+.L2066:
+	ldrh	w5, [x24, #:lo12:.LANCHOR54]
 	mov	w0, 0
-	ldr	x10, [x21, #:lo12:.LANCHOR180]
-	sub	w6, w6, #1
-.L2052:
-	cmp	w0, w6
-	blt	.L2054
-.L2057:
-	add	w4, w26, 1
-	sxth	w26, w4
-	b	.L2041
-.L2054:
+	ldr	x10, [x26, #:lo12:.LANCHOR183]
+	sub	w5, w5, #1
+.L2068:
+	cmp	w0, w5
+	blt	.L2070
+.L2073:
+	add	w4, w27, 1
+	sxth	w27, w4
+	b	.L2057
+.L2070:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L2053
+	bls	.L2069
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
-	str	w2, [x22, x1]
-.L2053:
+	str	w2, [x21, x1]
+.L2069:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2052
-.L2070:
-	ldr	x0, [x24, #:lo12:.LANCHOR192]
-	ubfiz	x28, x22, 2, 32
-	ldr	w0, [x0, x28]
-	sub	w1, w0, #1
-	cmn	w1, #3
-	bhi	.L2064
-	adrp	x8, .LANCHOR128
-	str	x8, [x29, 112]
-	mov	x27, x8
-	ldr	x1, [x8, #:lo12:.LANCHOR128]
-	ldr	w1, [x1, x28]
-	cmp	w0, w1
-	beq	.L2064
-	add	x4, x20, :lo12:.LANCHOR199
-	ldr	x1, [x21, #:lo12:.LANCHOR180]
-	mov	w2, 1
-	str	x4, [x29, 120]
-	str	x1, [x4, 8]
-	ldr	x1, [x29, 128]
-	str	w0, [x4, 4]
-	mov	x0, x4
-	ldr	x23, [x1, #:lo12:.LANCHOR185]
-	mov	w1, w2
-	str	x23, [x4, 16]
-	bl	FlashReadPages
-	ldr	w0, [x20, #:lo12:.LANCHOR199]
-	cmn	w0, #1
-	beq	.L2064
-	ldr	x0, [x29, 136]
-	ldrh	w1, [x23]
-	add	x0, x0, :lo12:.LANCHOR124
-	ldp	x8, x4, [x29, 112]
-	ldrh	w0, [x0, 4]
-	cmp	w1, w0
-	bne	.L2064
-	ldr	x0, [x8, #:lo12:.LANCHOR128]
-	ldr	w3, [x23, 4]
-	ldr	w1, [x0, x28]
-	str	w1, [x4, 4]
-	ldr	w0, [x0, x28]
-	cbnz	w0, .L2066
-	str	wzr, [x23, 4]
-.L2067:
-	ldr	w4, [x23, 4]
-	cmp	w3, w4
-	bls	.L2064
-	ldr	x1, [x27, #:lo12:.LANCHOR128]
-	ldr	x0, [x24, #:lo12:.LANCHOR192]
-	ldr	w2, [x1, x28]
-	ldr	w1, [x0, x28]
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
-	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR192]
-	ldr	x1, [x27, #:lo12:.LANCHOR128]
-	ldr	w2, [x0, x28]
-	str	w2, [x1, x28]
-	mov	w1, 0
-	ldrh	w2, [x25, #:lo12:.LANCHOR125]
-	ldr	w0, [x0, x28]
-	ubfx	x0, x0, 10, 16
-.L2068:
-	cmp	w1, w2
-	blt	.L2069
-	adrp	x1, .LANCHOR64
-	ldr	w1, [x1, #:lo12:.LANCHOR64]
-	cmp	w2, w1
-	bcs	.L2064
-	ldr	x1, [x29, 152]
-	ubfiz	x2, x2, 1, 16
-	strh	w0, [x1, x2]
-	ldrh	w1, [x26]
-	add	w1, w1, 1
-	strh	w1, [x26]
-	bl	remove_from_free_sys_Queue
-.L2064:
-	add	w22, w22, 1
-	b	.L2062
-.L2066:
-	mov	w2, 1
-	str	w3, [x29, 120]
-	mov	w1, w2
-	mov	x0, x4
-	bl	FlashReadPages
-	ldr	w3, [x29, 120]
-	b	.L2067
-.L2069:
-	ldr	x3, [x29, 152]
-	ldrh	w3, [x3, w1, sxtw 1]
-	cmp	w3, w0
-	beq	.L2064
-	add	w1, w1, 1
-	sxth	w1, w1
 	b	.L2068
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
@@ -14557,31 +14684,31 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR62
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR61]
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	strh	w1, [x0, 10]
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR70
-	ldrh	w1, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR71
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR62
-	ldrh	w1, [x1, #:lo12:.LANCHOR62]
+	adrp	x1, .LANCHOR63
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR71
-	ldr	x1, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR72
+	ldr	x1, [x1, #:lo12:.LANCHOR72]
 	str	x1, [x0, 16]
-	adrp	x1, .LANCHOR190
-	ldr	x1, [x1, #:lo12:.LANCHOR190]
+	adrp	x1, .LANCHOR193
+	ldr	x1, [x1, #:lo12:.LANCHOR193]
 	str	x1, [x0, 24]
-	adrp	x1, .LANCHOR189
-	ldr	x1, [x1, #:lo12:.LANCHOR189]
+	adrp	x1, .LANCHOR192
+	ldr	x1, [x1, #:lo12:.LANCHOR192]
 	str	x1, [x0, 32]
-	adrp	x1, .LANCHOR191
-	ldr	x1, [x1, #:lo12:.LANCHOR191]
+	adrp	x1, .LANCHOR194
+	ldr	x1, [x1, #:lo12:.LANCHOR194]
 	str	x1, [x0, 40]
 	mov	w1, -1
 	strh	w1, [x0, 60]
@@ -14598,419 +14725,1688 @@ FtlLoadMapInfo:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlL2PDataInit
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapTblRecovery
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
-	.global	FtlRecoverySuperblock
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	stp	x29, x30, [sp, -208]!
-	mov	w1, 65535
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR226
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	mov	x20, x0
+	ldrh	w19, [x23, #:lo12:.LANCHOR226]
+	mov	w0, 65535
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x0]
-	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w0, w1
+	cmp	w19, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2246
-	ldrb	w0, [x19, 6]
-	str	w0, [x29, 180]
-	adrp	x0, .LANCHOR52
-	ldrh	w26, [x19, 2]
-	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR52]
-	cmp	w2, w26
-	bne	.L2090
-	strh	wzr, [x19, 4]
-.L2253:
-	strb	wzr, [x19, 6]
-.L2246:
+	beq	.L2104
+	cbnz	w19, .L2087
+.L2088:
+	bl	FtlGcPageVarInit
+	b	.L2089
+.L2104:
+	mov	w19, 0
+.L2087:
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w1
+	beq	.L2088
+.L2089:
+	adrp	x25, .LANCHOR59
+	add	x25, x25, :lo12:.LANCHOR59
+	mov	w26, -1
+	mov	w24, 65535
+.L2101:
+	ldrh	w0, [x20]
+	strb	wzr, [x20, 8]
+	cmp	w0, w24
+	beq	.L2105
+	mov	w27, 56
+.L2103:
+	adrp	x1, .LANCHOR106
+	adrp	x22, .LANCHOR180
+	ldrh	w6, [x25]
+	add	x3, x20, 16
+	ldr	x5, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR38
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w21, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	add	x1, x1, 8
+	add	x1, x20, x1, lsl 1
+.L2091:
+	cmp	x3, x1
+	bne	.L2093
+	mov	w1, w21
+	umull	x21, w21, w27
+	mov	x28, 0
+	mov	w2, 0
+	bl	FlashReadPages
+.L2094:
+	cmp	x28, x21
+	bne	.L2102
+	adrp	x0, .LANCHOR53
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bhi	.L2103
+.L2105:
+	mov	w2, 0
+	b	.L2090
+.L2093:
+	ldrh	w2, [x3]
+	cmp	w2, w24
+	beq	.L2092
+	umaddl	x4, w21, w27, x0
+	orr	w2, w19, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w21, w6
+	add	w21, w21, 1
+	str	xzr, [x4, 8]
+	and	w21, w21, 65535
+	asr	w2, w2, 2
+	add	x2, x5, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2092:
+	add	x3, x3, 2
+	b	.L2091
+.L2102:
+	ldr	x6, [x22, #:lo12:.LANCHOR180]
+	add	x5, x6, x28
+	ldr	w4, [x5, 4]
+	lsr	w0, w4, 10
+	bl	P2V_plane
+	and	w2, w0, 65535
+	ldr	w0, [x6, x28]
+	cbnz	w0, .L2095
+	ldr	x0, [x5, 16]
+	add	x28, x28, 56
+	ldrh	w1, [x0]
+	cmp	w1, w24
+	bne	.L2096
+	adrp	x0, .LANCHOR135
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR135]
+.L2090:
+	strb	w2, [x20, 6]
+	mov	w0, -1
+	strh	w19, [x20, 2]
+	mov	w1, w19
+	strh	w0, [x23, #:lo12:.LANCHOR226]
+	mov	x0, x20
+	bl	ftl_sb_update_avl_pages
+	mov	w0, w26
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 208
+	ldp	x29, x30, [sp], 96
 	ret
-.L2090:
-	ldrh	w0, [x19, 16]
-	mov	w21, 0
-.L2091:
-	cmp	w0, w1
-	beq	.L2092
-	ldrb	w1, [x19, 8]
-	cmp	w1, 1
-	bne	.L2093
-	bl	FtlGetLastWrittenPage
-	mov	w20, w0
-	cmn	w0, #1
-	beq	.L2094
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2171
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
-	ldrh	w23, [x0, w20, sxtw 1]
-.L2095:
-	adrp	x1, .LANCHOR105
-	adrp	x2, .LANCHOR37
-	adrp	x22, .LANCHOR177
-	add	x4, x19, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR58
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	mov	w27, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR58]
-	add	x1, x19, 16
-	str	x1, [x29, 184]
-	mov	w8, 65535
-	ldrh	w1, [x2, #:lo12:.LANCHOR37]
-	mov	w10, 56
-	str	x2, [x29, 160]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
 .L2096:
-	cmp	x1, x4
-	bne	.L2100
-	ldrb	w1, [x19, 8]
-	cmp	w1, 1
-	bne	.L2172
+	ldp	w2, w0, [x0, 8]
+	mov	w1, w4
+	bl	FtlGcUpdatePage
+	b	.L2094
+.L2095:
+	ldrh	w1, [x20]
+	mov	w2, w4
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	adrp	x0, .LANCHOR28
+	ldr	w1, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x20]
+	cbnz	w1, .L2097
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cmp	w1, 0
-	cset	w1, ne
-	str	w1, [x29, 176]
-.L2101:
-	ldr	w2, [x29, 176]
-	mov	w1, w27
-	adrp	x24, .LC46
-	adrp	x25, .LANCHOR229
-	add	x24, x24, :lo12:.LC46
-	add	x25, x25, :lo12:.LANCHOR229
-	mov	x28, 0
-	bl	FlashReadPages
-	adrp	x0, .LANCHOR157
-	mov	w5, 65535
-	str	x0, [x29, 168]
-	ldr	w21, [x0, #:lo12:.LANCHOR157]
-	sub	w21, w21, #1
-.L2102:
-	and	w0, w28, 65535
-	cmp	w27, w0
-	bhi	.L2107
-	bne	.L2105
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	ldr	w0, [x0, 4]
-.L2248:
-	lsr	w0, w0, 10
-	bl	P2V_plane
-	ldrb	w1, [x19, 8]
-	and	w27, w0, 65535
-	cmp	w1, 1
-	bne	.L2109
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2109
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
-	ldrh	w20, [x0, w20, sxtw 1]
-.L2109:
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w20
-	bne	.L2110
-	strh	w20, [x19, 2]
-	strb	wzr, [x19, 6]
-	strh	wzr, [x19, 4]
-.L2110:
-	ldr	w0, [x29, 180]
-	cmp	w20, w26
-	cset	w2, eq
-	cmp	w27, w0
-	cset	w0, eq
-	tst	w2, w0
-	beq	.L2111
-.L2254:
-	mov	w2, w27
-	mov	w1, w20
-	mov	x0, x19
-	bl	ftl_sb_update_avl_pages
-	b	.L2246
-.L2092:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	add	x0, x19, x21, sxtw 1
-	ldrh	w0, [x0, 16]
-	b	.L2091
-.L2093:
-	mov	w1, 0
-	bl	FtlGetLastWrittenPage
-	mov	w20, w0
-	cmn	w0, #1
-	beq	.L2094
-.L2171:
-	mov	w23, w20
-	b	.L2095
-.L2094:
-	cbz	w26, .L2097
-	mov	w2, 1933
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
+	cbz	w1, .L2098
 .L2097:
-	ldr	w0, [x29, 180]
-	cmp	w0, 0
-	ccmp	w21, w0, 4, ne
-	beq	.L2098
-	mov	w2, 1934
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
+	adrp	x2, .LANCHOR79
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR79]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 159
+	bls	.L2099
 .L2098:
-	strh	wzr, [x19, 2]
-	b	.L2253
-.L2100:
-	ldrh	w2, [x4]
-	cmp	w2, w8
-	beq	.L2099
-	umaddl	x5, w27, w10, x0
-	orr	w2, w23, w2, lsl 10
-	add	w3, w27, 1
-	str	w2, [x5, 4]
-	mul	w2, w27, w7
-	and	w27, w3, 65535
-	str	xzr, [x5, 8]
-	asr	w2, w2, 2
-	add	x2, x6, x2, sxtw 2
-	str	x2, [x5, 16]
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	ldr	w1, [x1, x28]
+	cmn	w1, #1
+	bne	.L2100
 .L2099:
-	add	x4, x4, 2
-	b	.L2096
-.L2172:
-	str	wzr, [x29, 176]
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	add	x28, x1, x28
+	ldr	w26, [x28, 4]
+.L2100:
+	adrp	x1, .LANCHOR84
+	ubfiz	x0, x0, 1, 16
+	mov	w19, 0
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
+	strh	wzr, [x1, x0]
+	ldrh	w0, [x20]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x20]
+	bl	FtlGcPageVarInit
 	b	.L2101
-.L2107:
-	mov	x0, 56
-	ldr	x2, [x22, #:lo12:.LANCHOR177]
-	mul	x0, x28, x0
-	add	x1, x2, x0
-	ldr	w0, [x2, x0]
-	cbnz	w0, .L2103
-	ldr	x6, [x1, 16]
-	ldr	w4, [x6, 4]
-	cmn	w4, #1
-	beq	.L2104
-	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR157]
-	mov	w0, w4
-	bl	ftl_cmp_data_ver
-	cbz	w0, .L2104
-	ldr	x0, [x29, 168]
-	add	w4, w4, 1
-	str	w4, [x0, #:lo12:.LANCHOR157]
-.L2104:
-	ldr	w0, [x6]
-	cmn	w0, #1
-	bne	.L2106
-.L2105:
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	and	x28, x28, 65535
-	mov	x1, 56
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR15
+	stp	x23, x24, [sp, 48]
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR147
+	ldrh	w0, [x1, 14]
+	mov	w24, w2
+	ldrh	w1, [x1, 12]
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	w27, 61664
+	mul	w0, w0, w1
+	ldr	x1, [x21, #:lo12:.LANCHOR147]
+	str	x1, [x29, 112]
+	and	w0, w0, 65535
+	adrp	x1, .LANCHOR197
+	sub	w20, w0, #1
+	sub	w19, w0, #15
+	ldr	x2, [x1, #:lo12:.LANCHOR197]
 	and	w20, w20, 65535
-	madd	x28, x28, x1, x0
-	ldr	w0, [x28, 4]
-	b	.L2248
-.L2103:
-	ldr	w1, [x1, 4]
-	mov	x0, x24
-	bl	printf
-	ldrh	w0, [x19]
-	and	w5, w23, 65535
-	strh	w0, [x25]
-.L2106:
-	add	x28, x28, 1
-	b	.L2102
-.L2111:
-	mov	w0, 65535
-	cmp	w5, w0
-	bne	.L2112
-	cbnz	w1, .L2113
-.L2112:
-	adrp	x24, .LANCHOR133
-	and	w6, w23, 65535
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
-	cmn	w0, #1
-	bne	.L2114
-	str	w21, [x24, #:lo12:.LANCHOR133]
-.L2114:
-	add	w0, w26, 7
-	ldr	w7, [x24, #:lo12:.LANCHOR133]
-	cmp	w0, w23, uxth
-	bge	.L2173
-	sub	w23, w6, #7
-	and	w23, w23, 65535
+	mul	w26, w0, w25
+	mov	x22, x1
+	str	x2, [x29, 120]
 .L2115:
-	mov	w3, -1
-	adrp	x5, .LANCHOR117
-	mov	w28, w3
-	add	x5, x5, :lo12:.LANCHOR117
-	mov	w4, 65535
-.L2116:
-	cmp	w23, w6
-	bhi	.L2131
-	ldr	x1, [x29, 160]
-	mov	w25, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	mov	w10, 56
-	ldr	x2, [x29, 184]
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
-	add	x1, x1, 8
-	add	x1, x19, x1, lsl 1
-	b	.L2132
-.L2173:
-	mov	w23, w26
-	b	.L2115
-.L2118:
-	ldrh	w8, [x2]
-	cmp	w8, w4
-	beq	.L2117
-	umaddl	x11, w25, w10, x0
-	add	w25, w25, 1
-	and	w25, w25, 65535
-	orr	w8, w23, w8, lsl 10
-	str	w8, [x11, 4]
-.L2117:
-	add	x2, x2, 2
-.L2132:
-	cmp	x2, x1
-	bne	.L2118
-	ldr	w2, [x29, 176]
-	mov	w1, w25
-	str	x5, [x29, 112]
-	str	w4, [x29, 120]
-	str	w7, [x29, 128]
-	str	w6, [x29, 136]
-	str	w3, [x29, 152]
-	bl	FlashReadPages
-	adrp	x1, .LANCHOR8
-	mov	w2, 56
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
-	sxtw	x12, w23
-	ldrb	w10, [x1, #:lo12:.LANCHOR8]
-	mov	w11, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR177]
-	ldr	w4, [x29, 120]
-	ldr	w7, [x29, 128]
-	ldr	w6, [x29, 136]
-	ldr	w3, [x29, 152]
-	nop // between mem op and mult-accumulate
-	umaddl	x25, w25, w2, x1
-	ldr	x5, [x29, 112]
-	mov	w2, 0
-.L2119:
-	cmp	x25, x1
-	bne	.L2129
-	cbz	w2, .L2130
-	str	w0, [x24, #:lo12:.LANCHOR133]
-.L2130:
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	b	.L2116
-.L2129:
-	ldr	w8, [x1]
-	cbnz	w8, .L2120
-	ldr	x8, [x1, 16]
-	ldrh	w13, [x8]
-	cmp	w13, w4
-	beq	.L2175
-	ldr	w8, [x8, 4]
-	cmn	w8, #1
-	beq	.L2175
-	cmn	w3, #1
-	bne	.L2177
-	ldrh	w2, [x5, x12, lsl 1]
-	cmp	w2, w4
-	bne	.L2122
-	cbz	w10, .L2177
+	cmp	w19, w20
+	ble	.L2122
+	mov	w0, -1
+.L2114:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
 .L2122:
-	cmp	w21, w0
-	mov	w2, w11
-	csel	w3, w3, w0, eq
+	add	w0, w20, w26
+	mov	w2, 1
+	lsl	w0, w0, 10
+	mov	w1, w2
+	str	w0, [x29, 108]
+	add	x0, x29, 104
+	bl	FlashReadPages
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2116
+	ldr	x0, [x22, #:lo12:.LANCHOR197]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bne	.L2116
+	cbz	x23, .L2123
+	cbz	w25, .L2118
 .L2121:
+	ldr	x1, [x21, #:lo12:.LANCHOR147]
+	mov	w2, w24
+	mov	x0, x23
+	bl	ftl_memcpy
+	mov	w3, 4
+	adrp	x0, .LC54
+	mov	w2, w3
+	mov	x1, x23
+	add	x0, x0, :lo12:.LC54
+	bl	rknand_print_hex
+.L2123:
+	mov	w0, 0
+	b	.L2114
+.L2118:
+	ldr	x5, [x21, #:lo12:.LANCHOR147]
+	adrp	x2, .LANCHOR149
+	add	x2, x2, :lo12:.LANCHOR149
+	mov	w0, 0
+	mov	w6, 1
+.L2119:
+	ldr	w1, [x2]
+	cmp	w0, w1
+	bcs	.L2121
+	ubfx	x1, x0, 5, 11
+	and	w3, w0, 31
+	lsl	x1, x1, 2
+	add	w0, w0, 1
+	lsl	w4, w6, w3
+	and	w0, w0, 65535
+	ldr	w3, [x5, x1]
+	orr	w3, w3, w4
+	str	w3, [x5, x1]
+	b	.L2119
+.L2116:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	b	.L2115
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrh	w19, [x0, 14]
+	str	x21, [sp, 32]
+	adrp	x21, .LANCHOR153
+	ldrb	w2, [x0, 13]
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	mul	w19, w19, w2
+	and	w19, w19, 65535
+	add	w2, w19, 7
+	lsr	w2, w2, 3
+	bl	FlashReadFacBbtData
+	cmn	w0, #1
+	bne	.L2129
+.L2133:
+	mov	w0, 0
+.L2130:
+	ubfiz	x0, x0, 1, 16
+	mov	w1, -1
+	ldr	x21, [sp, 32]
+	strh	w1, [x20, x0]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2129:
+	ldr	x4, [x21, #:lo12:.LANCHOR153]
+	lsr	w5, w19, 4
+	sub	w19, w19, #1
+	mov	w1, 0
+	mov	w0, 0
+	mov	w6, 1
+.L2131:
+	cmp	w1, w19
+	bge	.L2130
+	ubfx	x3, x1, 5, 11
+	and	w2, w1, 31
+	lsl	w2, w6, w2
+	ldr	w3, [x4, x3, lsl 2]
+	tst	w2, w3
+	beq	.L2132
+	add	w2, w0, 1
+	ubfiz	x0, x0, 1, 16
+	strh	w1, [x20, x0]
+	and	w0, w2, 65535
+.L2132:
+	cmp	w0, w5
+	bcs	.L2133
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L2131
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",@progbits
+	.align	2
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR77
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ldr	w21, [x0, #:lo12:.LANCHOR77]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w21, .L2140
+	bl	FtlBbtMemInit
+	adrp	x20, .LANCHOR75
+	add	x22, x20, :lo12:.LANCHOR75
+	bl	FtlLoadFactoryBbt
+	add	x24, x22, 32
+	adrp	x28, .LANCHOR202
+	add	x22, x22, 12
+	add	x25, x28, :lo12:.LANCHOR202
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	str	x0, [x29, 120]
+.L2141:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w21, w0
+	bcc	.L2147
+	adrp	x21, .LANCHOR60
+	add	x21, x21, :lo12:.LANCHOR60
+	mov	w19, 0
+.L2148:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L2149
+	add	x21, x20, :lo12:.LANCHOR75
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L2150:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L2154
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2151
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L2152
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L2151:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2150
+.L2147:
+	adrp	x2, .LANCHOR188
+	adrp	x0, .LANCHOR183
+	add	x19, x28, :lo12:.LANCHOR202
+	ldrh	w1, [x22]
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR188]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR51
+	str	x2, [x29, 112]
+	beq	.L2142
+	ldrh	w4, [x23, #:lo12:.LANCHOR51]
+	mov	w2, 1
+	madd	w27, w4, w21, w1
+	mov	w1, w2
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR51]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L2143:
+	mov	w0, w27
+	add	w21, w21, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x22, x22, 2
+	b	.L2141
+.L2142:
+	mov	w1, w21
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	adrp	x27, .LANCHOR123
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR51]
+	add	x23, x23, :lo12:.LANCHOR51
+	add	x0, x27, :lo12:.LANCHOR123
+	sub	w19, w19, #1
+	str	x0, [x29, 104]
+	and	w19, w19, 65535
+.L2144:
+	ldrh	w0, [x23]
+	madd	w0, w21, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2145
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x22]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x22]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w21, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
+	cmn	w0, #1
+	bne	.L2143
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L2144
+.L2145:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2144
+.L2149:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L2148
+.L2152:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L2153
+	strh	w19, [x21]
+	b	.L2151
+.L2153:
+	strh	w19, [x21, 4]
+.L2154:
+	adrp	x0, .LANCHOR78
+	add	x19, x20, :lo12:.LANCHOR75
+	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 60]
+	mov	w1, 1
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR75]
+	bl	FtlBbmTblFlush
+.L2140:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	x26, x1
+	adrp	x1, .LANCHOR57
+	stp	x21, x22, [sp, 32]
+	str	w2, [x29, 120]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	stp	x19, x20, [sp, 16]
+	add	w2, w1, 7
+	mov	x1, 1
+	stp	x23, x24, [sp, 48]
+	lsl	x1, x1, x2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	stp	x27, x28, [sp, 80]
+	and	w1, w1, 65535
+	str	w1, [x29, 124]
+	adrp	x1, .LANCHOR73
+	lsr	w25, w0, w2
+	and	w22, w25, 65535
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	cmp	w0, w1
+	bcc	.L2161
+	mov	w2, 888
+	adrp	x1, .LANCHOR227
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR227
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2161:
+	adrp	x19, .LANCHOR97
+	adrp	x0, .LANCHOR68
+	ldr	x2, [x19, #:lo12:.LANCHOR97]
+	ldrh	w1, [x0, #:lo12:.LANCHOR68]
+	mov	x0, 0
+.L2162:
+	and	x20, x0, 65535
+	cmp	w20, w1
+	bcc	.L2167
+	bl	select_l2p_ram_region
+	and	x20, x0, 65535
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ubfiz	x21, x20, 4, 16
+	add	x2, x1, x21
+	ldrh	w3, [x1, x21]
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L2168
+	ldr	w1, [x2, 4]
+	tbz	w1, #31, .L2168
+	bl	flush_l2p_region
+.L2168:
+	adrp	x24, .LANCHOR67
+	ldrh	w0, [x24, #:lo12:.LANCHOR67]
+	cmp	w0, w22
+	bcs	.L2169
+	mov	w2, 526
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2169:
+	adrp	x1, .LANCHOR131
+	ubfiz	x0, x22, 2, 16
+	str	x1, [x29, 112]
+	ldr	x2, [x1, #:lo12:.LANCHOR131]
+	ldr	w28, [x2, x0]
+	cbnz	w28, .L2170
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR58
+	add	x0, x0, x21
+	ldrh	w2, [x1, #:lo12:.LANCHOR58]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x1, x0, x21
+	strh	w22, [x0, x21]
+	str	wzr, [x1, 4]
+	b	.L2163
+.L2167:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L2162
+.L2163:
+	ldp	w0, w1, [x29, 120]
+	cbnz	w0, .L2164
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x0, x0, x20, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x1, lsl 2]
+	str	w0, [x26]
+.L2165:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x20, x0, x20, lsl 4
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L2175
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L2175:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2164:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	w3, [x26]
+	add	x0, x0, x20, lsl 4
+	ldr	x2, [x0, 8]
+	str	w3, [x2, x1, lsl 2]
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	adrp	x0, .LANCHOR98
+	strh	w22, [x0, #:lo12:.LANCHOR98]
+	b	.L2165
+.L2170:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x23, .LANCHOR202
+	add	x27, x23, :lo12:.LANCHOR202
+	mov	w2, 1
+	add	x0, x0, x21
+	mov	w1, w2
+	str	w28, [x27, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x27, 8]
+	adrp	x0, .LANCHOR188
+	ldr	x0, [x0, #:lo12:.LANCHOR188]
+	str	x0, [x27, 16]
+	mov	x0, x27
+	bl	FlashReadPages
+	ldr	x27, [x27, 16]
+	ldr	w0, [x23, #:lo12:.LANCHOR202]
+	cmp	w0, 256
+	bne	.L2171
+	and	w4, w25, 65535
+	mov	w2, w28
+	mov	w1, w4
+	str	w4, [x29, 108]
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
+	bl	printf
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	lsr	w1, w28, 10
+	ldr	w4, [x29, 108]
+	strh	w1, [x0, 60]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	add	x1, x1, x21
+	ldr	x2, [x1, 8]
+	mov	w1, w4
+	bl	FtlMapWritePage
+.L2171:
+	ldrh	w0, [x27, 8]
+	cmp	w0, w22
+	beq	.L2172
+	add	x23, x23, :lo12:.LANCHOR202
+	mov	w2, w28
+	and	w1, w25, 65535
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	bl	printf
+	ldr	x1, [x23, 16]
+	mov	w3, 4
+	adrp	x0, .LC27
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC27
+	bl	rknand_print_hex
+	ldr	x0, [x29, 112]
+	mov	w2, 4
+	ldrh	w3, [x24, #:lo12:.LANCHOR67]
+	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR77
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR77]
+.L2172:
+	ldrh	w0, [x27, 8]
+	cmp	w0, w22
+	beq	.L2173
+	mov	w2, 553
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2173:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	add	x1, x0, x21
+	str	wzr, [x1, 4]
+	strh	w22, [x0, x21]
+	b	.L2163
+	.size	log2phys, .-log2phys
+	.section	.text.FtlProgPages,"ax",@progbits
+	.align	2
+	.global	FtlProgPages
+	.type	FtlProgPages, %function
+FtlProgPages:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR77
+	stp	x19, x20, [sp, 16]
+	ldr	w2, [x23, #:lo12:.LANCHOR77]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	cbnz	w2, .L2180
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L2195
+	ldrb	w2, [x3, 8]
+	cmp	w2, 1
+	cset	w22, eq
+.L2182:
+	mov	x20, x3
+	ldrb	w3, [x3, 9]
+	mov	w21, w1
+	mov	x19, x0
+	mov	w2, w22
+	adrp	x25, .LANCHOR53
+	adrp	x24, .LANCHOR138
+	add	x25, x25, :lo12:.LANCHOR53
+	bl	FlashProgPages
+	add	x24, x24, :lo12:.LANCHOR138
+	mov	w1, 56
+	umaddl	x21, w21, w1, x19
+.L2183:
+	cmp	x19, x21
+	beq	.L2192
+	adrp	x26, .LANCHOR84
+	b	.L2193
+.L2195:
+	mov	w22, 0
+	b	.L2182
+.L2186:
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	ldrh	w1, [x20]
+	cmp	w1, w0, uxth
+	bne	.L2184
+	ldr	x2, [x26, #:lo12:.LANCHOR84]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w3, [x20, 4]
+	ldrh	w0, [x2, x1]
+	sub	w0, w0, w3
+	strh	w0, [x2, x1]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x25]
+	strh	w0, [x20, 2]
+	strh	wzr, [x20, 4]
+.L2184:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L2185
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+.L2185:
+	ldr	w0, [x24, 96]
+	add	w0, w0, 1
+	str	w0, [x24, 96]
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	FtlGcMarkBadPhyBlk
+	mov	x0, x20
+	bl	get_new_active_ppa
+	str	w0, [x19, 4]
+	mov	w2, w22
+	str	w0, [x29, 92]
+	mov	w1, 1
+	ldrb	w3, [x20, 9]
+	mov	x0, x19
+	bl	FlashProgPages
+	ldr	w0, [x23, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2180
+.L2193:
+	ldr	w0, [x19]
+	cmn	w0, #1
+	beq	.L2186
+	adrp	x0, .LANCHOR38
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcc	.L2187
+	mov	w2, 1583
+	adrp	x1, .LANCHOR229
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR229
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2187:
+	ldr	w0, [x19, 4]
+	cbnz	w22, .L2188
+.L2200:
+	str	w0, [x29, 92]
+	add	x1, x29, 92
+	ldr	w0, [x19, 24]
+	mov	w2, 1
+	bl	log2phys
+	ldr	x0, [x19, 16]
+	ldr	w3, [x0, 12]
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w1, w0, 65535
+	mov	w26, w1
+	cmn	w3, #1
+	beq	.L2190
+	adrp	x2, .LANCHOR84
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L2191
+	adrp	x0, .LC58
+	mov	w2, 0
+	add	x0, x0, :lo12:.LC58
+	bl	printf
+.L2191:
+	mov	w0, w26
+	bl	decrement_vpc_count
+.L2190:
+	add	x19, x19, 56
+	b	.L2183
+.L2188:
+	orr	w0, w0, -2147483648
+	b	.L2200
+.L2192:
+	adrp	x0, .LANCHOR38
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcc	.L2180
+	mov	w2, 1600
+	adrp	x1, .LANCHOR229
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR229
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2180:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2207
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR132
+	ldr	x0, [x19, #:lo12:.LANCHOR132]
+	cbz	x0, .L2202
+	adrp	x1, .LANCHOR230
+	mov	w2, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR230]
+	mov	w1, 1
+	bl	FtlProgPages
+	str	xzr, [x19, #:lo12:.LANCHOR132]
+.L2202:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2207:
+	mov	w0, 0
+	ret
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2213
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	mov	w0, 1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2213:
+	mov	w0, 0
+	ret
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",@progbits
+	.align	2
+	.global	FtlDeInit
+	.type	FtlDeInit, %function
+FtlDeInit:
+	adrp	x0, .LANCHOR231
+	ldr	w0, [x0, #:lo12:.LANCHOR231]
+	cmp	w0, 1
+	bne	.L2219
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlSysFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L2219:
+	mov	w0, 0
+	ret
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FlashDeInit
+	bl	FtlDeInit
+	ldp	x29, x30, [sp], 16
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR69
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	add	w1, w1, w2
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w1, w0
+	bhi	.L2232
+	mov	w19, w2
+	cmp	w2, 31
+	bhi	.L2226
+.L2240:
+	mov	w0, 0
+.L2224:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2226:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2240
+	adrp	x22, .LANCHOR56
+	bl	FtlCacheWriteBack
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	udiv	w21, w20, w0
+	msub	w20, w0, w21, w20
+	ands	w20, w20, 65535
+	beq	.L2228
+	sub	w0, w0, w20
+	add	w21, w21, 1
+	cmp	w0, w19
+	csel	w0, w0, w19, ls
+	sub	w19, w19, w0, uxth
+.L2228:
+	adrp	x20, .LANCHOR232
+	adrp	x23, .LANCHOR163
+	add	x20, x20, :lo12:.LANCHOR232
+	add	x23, x23, :lo12:.LANCHOR163
+	mov	w0, -1
+	str	w0, [x29, 76]
+.L2229:
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	cmp	w19, w0
+	bcs	.L2231
+	adrp	x0, .LANCHOR232
+	ldr	w1, [x0, #:lo12:.LANCHOR232]
+	cmp	w1, 32
+	bls	.L2240
+	str	wzr, [x0, #:lo12:.LANCHOR232]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2240
+.L2231:
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L2230
+	ldr	w0, [x20]
+	mov	w2, 1
+	add	x1, x29, 76
+	add	w0, w0, 1
+	str	w0, [x20]
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L2230:
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	add	w21, w21, 1
+	sub	w19, w19, w0
+	b	.L2229
+.L2232:
+	mov	w0, -1
+	b	.L2224
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.Ftlscanalldata,"ax",@progbits
+	.align	2
+	.global	Ftlscanalldata
+	.type	Ftlscanalldata, %function
+Ftlscanalldata:
+	sub	sp, sp, #96
+	adrp	x0, .LC59
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC59
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x20, .LANCHOR202
+	stp	x21, x22, [sp, 48]
+	mov	w19, 0
+	adrp	x21, .LANCHOR73
+	add	x22, x20, :lo12:.LANCHOR202
+	add	x21, x21, :lo12:.LANCHOR73
+	str	x23, [sp, 64]
+	bl	printf
+.L2242:
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L2248
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
+	ret
+.L2248:
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w19
+	bl	log2phys
+	tst	x19, 2047
+	bne	.L2243
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC60
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC60
+	bl	printf
+.L2243:
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L2245
+	add	x0, x20, :lo12:.LANCHOR202
+	str	wzr, [x20, #:lo12:.LANCHOR202]
+	mov	w2, 0
+	str	w1, [x0, 4]
+	adrp	x1, .LANCHOR183
+	str	w19, [x0, 24]
+	ldr	x1, [x1, #:lo12:.LANCHOR183]
+	str	x1, [x0, 8]
+	adrp	x1, .LANCHOR188
+	ldr	x23, [x1, #:lo12:.LANCHOR188]
+	mov	w1, 1
+	str	x23, [x0, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR202]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L2246
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L2245
+.L2246:
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC61
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC61
+	mov	w1, w19
+	bl	printf
+.L2245:
+	add	w19, w19, 1
+	b	.L2242
+	.size	Ftlscanalldata, .-Ftlscanalldata
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR84
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR84]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L2251
+	adrp	x0, .LANCHOR88
+	ldr	x19, [x0, #:lo12:.LANCHOR88]
+	cbz	x19, .L2252
+	adrp	x2, .LANCHOR82
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR89
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR89]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L2253:
+	cmp	w1, w4
+	beq	.L2252
+	cmp	w19, w3
+	bne	.L2254
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR88
+	bl	List_remove_node
+	ldrh	w0, [x23, #:lo12:.LANCHOR89]
+	cbnz	w0, .L2255
+	mov	w2, 2140
+	adrp	x1, .LANCHOR233
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR233
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2255:
+	ldrh	w0, [x23, #:lo12:.LANCHOR89]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR89]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR84]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L2252:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2254:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L2252
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L2253
+.L2251:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L2252
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	stp	x29, x30, [sp, -208]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L2420
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 180]
+	adrp	x0, .LANCHOR53
+	ldrh	w26, [x19, 2]
+	str	x0, [x29, 144]
+	ldrh	w2, [x0, #:lo12:.LANCHOR53]
+	cmp	w2, w26
+	bne	.L2264
+	strh	wzr, [x19, 4]
+.L2427:
+	strb	wzr, [x19, 6]
+.L2420:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	ret
+.L2264:
+	ldrh	w0, [x19, 16]
+	mov	w21, 0
+.L2265:
+	cmp	w0, w1
+	beq	.L2266
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2267
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2268
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2345
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w23, [x0, w20, sxtw 1]
+.L2269:
+	adrp	x1, .LANCHOR106
+	adrp	x2, .LANCHOR38
+	adrp	x22, .LANCHOR180
+	add	x4, x19, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR59
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w27, 0
+	ldrh	w7, [x1, #:lo12:.LANCHOR59]
+	add	x1, x19, 16
+	str	x1, [x29, 184]
+	mov	w8, 65535
+	ldrh	w1, [x2, #:lo12:.LANCHOR38]
+	mov	w10, 56
+	str	x2, [x29, 160]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L2270:
+	cmp	x1, x4
+	bne	.L2274
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2346
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, 0
+	cset	w1, ne
+	str	w1, [x29, 176]
+.L2275:
+	ldr	w2, [x29, 176]
+	mov	w1, w27
+	adrp	x24, .LC62
+	adrp	x25, .LANCHOR235
+	add	x24, x24, :lo12:.LC62
+	add	x25, x25, :lo12:.LANCHOR235
+	mov	x28, 0
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR160
+	mov	w5, 65535
+	str	x0, [x29, 168]
+	ldr	w21, [x0, #:lo12:.LANCHOR160]
+	sub	w21, w21, #1
+.L2276:
+	and	w0, w28, 65535
+	cmp	w27, w0
+	bhi	.L2281
+	bne	.L2279
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	ldr	w0, [x0, 4]
+.L2422:
+	lsr	w0, w0, 10
+	bl	P2V_plane
+	ldrb	w1, [x19, 8]
+	and	w27, w0, 65535
+	cmp	w1, 1
+	bne	.L2283
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2283
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w20, [x0, w20, sxtw 1]
+.L2283:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w20
+	bne	.L2284
+	strh	w20, [x19, 2]
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+.L2284:
+	ldr	w0, [x29, 180]
+	cmp	w20, w26
+	cset	w2, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w2, w0
+	beq	.L2285
+.L2428:
+	mov	w2, w27
+	mov	w1, w20
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L2420
+.L2266:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	add	x0, x19, x21, sxtw 1
+	ldrh	w0, [x0, 16]
+	b	.L2265
+.L2267:
+	mov	w1, 0
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2268
+.L2345:
+	mov	w23, w20
+	b	.L2269
+.L2268:
+	cbz	w26, .L2271
+	mov	w2, 2211
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2271:
+	ldr	w0, [x29, 180]
+	cmp	w0, 0
+	ccmp	w21, w0, 4, ne
+	beq	.L2272
+	mov	w2, 2212
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2272:
+	strh	wzr, [x19, 2]
+	b	.L2427
+.L2274:
+	ldrh	w2, [x4]
+	cmp	w2, w8
+	beq	.L2273
+	umaddl	x5, w27, w10, x0
+	orr	w2, w23, w2, lsl 10
+	add	w3, w27, 1
+	str	w2, [x5, 4]
+	mul	w2, w27, w7
+	and	w27, w3, 65535
+	str	xzr, [x5, 8]
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x5, 16]
+.L2273:
+	add	x4, x4, 2
+	b	.L2270
+.L2346:
+	str	wzr, [x29, 176]
+	b	.L2275
+.L2281:
+	mov	x0, 56
+	ldr	x2, [x22, #:lo12:.LANCHOR180]
+	mul	x0, x28, x0
+	add	x1, x2, x0
+	ldr	w0, [x2, x0]
+	cbnz	w0, .L2277
+	ldr	x6, [x1, 16]
+	ldr	w4, [x6, 4]
+	cmn	w4, #1
+	beq	.L2278
+	ldr	x0, [x29, 168]
+	ldr	w1, [x0, #:lo12:.LANCHOR160]
+	mov	w0, w4
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2278
+	ldr	x0, [x29, 168]
+	add	w4, w4, 1
+	str	w4, [x0, #:lo12:.LANCHOR160]
+.L2278:
+	ldr	w0, [x6]
+	cmn	w0, #1
+	bne	.L2280
+.L2279:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	and	x28, x28, 65535
+	mov	x1, 56
+	and	w20, w20, 65535
+	madd	x28, x28, x1, x0
+	ldr	w0, [x28, 4]
+	b	.L2422
+.L2277:
+	ldr	w1, [x1, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x19]
+	and	w5, w23, 65535
+	strh	w0, [x25]
+.L2280:
+	add	x28, x28, 1
+	b	.L2276
+.L2285:
+	mov	w0, 65535
+	cmp	w5, w0
+	bne	.L2286
+	cbnz	w1, .L2287
+.L2286:
+	adrp	x24, .LANCHOR136
+	and	w6, w23, 65535
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
+	cmn	w0, #1
+	bne	.L2288
+	str	w21, [x24, #:lo12:.LANCHOR136]
+.L2288:
+	add	w0, w26, 7
+	ldr	w7, [x24, #:lo12:.LANCHOR136]
+	cmp	w0, w23, uxth
+	bge	.L2347
+	sub	w23, w6, #7
+	and	w23, w23, 65535
+.L2289:
+	mov	w3, -1
+	adrp	x5, .LANCHOR120
+	mov	w28, w3
+	add	x5, x5, :lo12:.LANCHOR120
+	mov	w4, 65535
+.L2290:
+	cmp	w23, w6
+	bhi	.L2305
+	ldr	x1, [x29, 160]
+	mov	w25, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
+	mov	w10, 56
+	ldr	x2, [x29, 184]
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+	b	.L2306
+.L2347:
+	mov	w23, w26
+	b	.L2289
+.L2292:
+	ldrh	w8, [x2]
+	cmp	w8, w4
+	beq	.L2291
+	umaddl	x11, w25, w10, x0
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	orr	w8, w23, w8, lsl 10
+	str	w8, [x11, 4]
+.L2291:
+	add	x2, x2, 2
+.L2306:
+	cmp	x2, x1
+	bne	.L2292
+	ldr	w2, [x29, 176]
+	mov	w1, w25
+	str	x5, [x29, 112]
+	str	w4, [x29, 120]
+	str	w7, [x29, 128]
+	str	w6, [x29, 136]
+	str	w3, [x29, 152]
+	bl	FlashReadPages
+	adrp	x1, .LANCHOR8
+	mov	w2, 56
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
+	sxtw	x12, w23
+	ldrb	w10, [x1, #:lo12:.LANCHOR8]
+	mov	w11, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR180]
+	ldr	w4, [x29, 120]
+	ldr	w7, [x29, 128]
+	ldr	w6, [x29, 136]
+	ldr	w3, [x29, 152]
+	nop // between mem op and mult-accumulate
+	umaddl	x25, w25, w2, x1
+	ldr	x5, [x29, 112]
+	mov	w2, 0
+.L2293:
+	cmp	x25, x1
+	bne	.L2303
+	cbz	w2, .L2304
+	str	w0, [x24, #:lo12:.LANCHOR136]
+.L2304:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L2290
+.L2303:
+	ldr	w8, [x1]
+	cbnz	w8, .L2294
+	ldr	x8, [x1, 16]
+	ldrh	w13, [x8]
+	cmp	w13, w4
+	beq	.L2349
+	ldr	w8, [x8, 4]
+	cmn	w8, #1
+	beq	.L2349
+	cmn	w3, #1
+	bne	.L2351
+	ldrh	w2, [x5, x12, lsl 1]
+	cmp	w2, w4
+	bne	.L2296
+	cbz	w10, .L2351
+.L2296:
+	cmp	w21, w0
+	mov	w2, w11
+	csel	w3, w3, w0, eq
+.L2295:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2119
-.L2120:
-	cbz	w2, .L2123
-	str	w0, [x24, #:lo12:.LANCHOR133]
-.L2123:
-	adrp	x0, .LANCHOR229
+	b	.L2293
+.L2294:
+	cbz	w2, .L2297
+	str	w0, [x24, #:lo12:.LANCHOR136]
+.L2297:
+	adrp	x0, .LANCHOR235
 	ldrh	w1, [x19]
-	strh	w1, [x0, #:lo12:.LANCHOR229]
+	strh	w1, [x0, #:lo12:.LANCHOR235]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2113
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	cbnz	w0, .L2287
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2125
+	bne	.L2299
 	cmn	w3, #1
-	beq	.L2126
-	str	w3, [x24, #:lo12:.LANCHOR133]
-.L2113:
+	beq	.L2300
+	str	w3, [x24, #:lo12:.LANCHOR136]
+.L2287:
 	mov	w1, 1
-	adrp	x0, .LANCHOR230
+	adrp	x0, .LANCHOR236
 	mov	w23, w26
-	adrp	x28, .LANCHOR133
-	strh	w1, [x0, #:lo12:.LANCHOR230]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
+	adrp	x28, .LANCHOR136
+	strh	w1, [x0, #:lo12:.LANCHOR236]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	FtlMapBlkWriteDumpData
-	add	x0, x28, :lo12:.LANCHOR133
+	add	x0, x28, :lo12:.LANCHOR136
 	str	x0, [x29, 112]
-.L2133:
+.L2307:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR8
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w24, 0
 	ldrb	w5, [x1, #:lo12:.LANCHOR8]
 	mov	w6, 65535
 	ldr	x3, [x29, 184]
-	ldrh	w2, [x2, #:lo12:.LANCHOR37]
+	ldrh	w2, [x2, #:lo12:.LANCHOR38]
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2134:
+.L2308:
 	cmp	x2, x3
-	bne	.L2137
+	bne	.L2311
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -15018,104 +16414,104 @@ FtlRecoverySuperblock:
 	mov	w0, 56
 	umull	x0, w24, w0
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR229
-	add	x0, x0, :lo12:.LANCHOR229
+	adrp	x0, .LANCHOR235
+	add	x0, x0, :lo12:.LANCHOR235
 	str	x0, [x29, 120]
-.L2138:
+.L2312:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2164
+	bne	.L2338
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2165
+	bne	.L2339
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2165
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cbz	w0, .L2339
+	adrp	x0, .LANCHOR54
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
 	cmp	w0, w23
-	bne	.L2165
+	bne	.L2339
 	cmp	w20, w23
-	beq	.L2140
-.L2165:
+	beq	.L2314
+.L2339:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2133
+	bne	.L2307
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
-	ldrh	w1, [x0, #:lo12:.LANCHOR37]
+	ldrh	w1, [x0, #:lo12:.LANCHOR38]
 	mov	w0, 0
-.L2166:
+.L2340:
 	cmp	w0, w1
-	beq	.L2246
+	beq	.L2420
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2167
+	beq	.L2341
 	strb	w0, [x19, 6]
-	b	.L2246
-.L2126:
+	b	.L2420
+.L2300:
 	cmp	w21, w7
-	beq	.L2127
-	str	w7, [x24, #:lo12:.LANCHOR133]
-	b	.L2113
-.L2127:
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
-.L2255:
+	beq	.L2301
+	str	w7, [x24, #:lo12:.LANCHOR136]
+	b	.L2287
+.L2301:
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
+.L2429:
 	sub	w0, w0, #1
-.L2249:
-	str	w0, [x24, #:lo12:.LANCHOR133]
-	b	.L2113
-.L2125:
+.L2423:
+	str	w0, [x24, #:lo12:.LANCHOR136]
+	b	.L2287
+.L2299:
 	cmp	w28, w21
-	beq	.L2128
+	beq	.L2302
 	cmn	w28, #1
-	beq	.L2113
-	str	w28, [x24, #:lo12:.LANCHOR133]
-	b	.L2113
-.L2128:
-	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	beq	.L2287
+	str	w28, [x24, #:lo12:.LANCHOR136]
+	b	.L2287
+.L2302:
+	ldr	w0, [x24, #:lo12:.LANCHOR136]
 	cmp	w21, w0
-	bne	.L2255
-	b	.L2113
-.L2175:
+	bne	.L2429
+	b	.L2287
+.L2349:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2121
-.L2177:
+	b	.L2295
+.L2351:
 	mov	w2, 1
-	b	.L2121
-.L2131:
+	b	.L2295
+.L2305:
 	mov	w0, -1
-	b	.L2249
-.L2137:
+	b	.L2423
+.L2311:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2135
+	beq	.L2309
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2136
-	cbz	w5, .L2136
+	bne	.L2310
+	cbz	w5, .L2310
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2136:
+.L2310:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2135:
+.L2309:
 	add	x3, x3, 2
-	b	.L2134
-.L2164:
-	ldr	x4, [x22, #:lo12:.LANCHOR177]
+	b	.L2308
+.L2338:
+	ldr	x4, [x22, #:lo12:.LANCHOR180]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 204]
@@ -15123,57 +16519,57 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2139
+	bcc	.L2313
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2139
+	bhi	.L2313
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2140
+	beq	.L2314
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2141
+	beq	.L2315
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2142
-.L2148:
+	beq	.L2316
+.L2322:
 	ldrh	w0, [x19]
-.L2252:
+.L2426:
 	bl	decrement_vpc_count
-.L2139:
+.L2313:
 	add	x25, x25, 56
-	b	.L2138
-.L2142:
+	b	.L2312
+.L2316:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2143
+	beq	.L2317
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR157]
+	ldr	w1, [x0, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2143
+	cbz	w0, .L2317
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR157]
-.L2143:
+	str	w0, [x1, #:lo12:.LANCHOR160]
+.L2317:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-	ldr	w1, [x28, #:lo12:.LANCHOR133]
+	ldr	w1, [x28, #:lo12:.LANCHOR136]
 	cmn	w1, #1
-	beq	.L2144
+	beq	.L2318
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2144
+	cbz	w0, .L2318
 	ldr	w1, [x29, 196]
 	cmn	w1, #1
-	beq	.L2145
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	beq	.L2319
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
@@ -15181,85 +16577,85 @@ FtlRecoverySuperblock:
 	mov	w1, 1
 	str	x3, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	x3, [x29, 152]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2146
-.L2147:
+	bne	.L2320
+.L2321:
 	mov	w0, -1
 	str	w0, [x29, 196]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.L2155:
+.L2329:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2139
-.L2170:
+	beq	.L2313
+.L2344:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	mov	w3, w24
-	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	ldrh	w0, [x0, #:lo12:.LANCHOR40]
 	cmp	w0, w24
-	bhi	.L2160
-	mov	w2, 2216
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC6
+	bhi	.L2334
+	mov	w2, 2494
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC5
 	str	w24, [x29, 152]
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2160:
-	adrp	x1, .LANCHOR83
+.L2334:
+	adrp	x1, .LANCHOR84
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
+	ldr	x1, [x1, #:lo12:.LANCHOR84]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2161
+	cbz	w0, .L2335
 	mov	w0, w3
-	b	.L2252
-.L2145:
+	b	.L2426
+.L2319:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2148
+	bne	.L2322
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-	b	.L2148
-.L2146:
+	b	.L2322
+.L2320:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L2147
+	bne	.L2321
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 152]
 	str	x3, [x29, 104]
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2147
+	cbz	w0, .L2321
 	ldp	w0, w1, [x29, 200]
 	ldr	x3, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2150
-.L2250:
+	bne	.L2324
+.L2424:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2147
-.L2150:
+	b	.L2321
+.L2324:
 	cmp	w0, w1
-	beq	.L2147
+	beq	.L2321
 	cmn	w0, #1
-	beq	.L2151
+	beq	.L2325
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -15268,535 +16664,837 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 104]
-.L2152:
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+.L2326:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2153
+	beq	.L2327
 	ldr	x0, [x29, 112]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2153
+	cbz	w0, .L2327
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2147
-.L2153:
+	cbz	w0, .L2321
+.L2327:
 	ldr	w1, [x29, 196]
-	b	.L2250
-.L2151:
+	b	.L2424
+.L2325:
 	str	w0, [x4]
-	b	.L2152
-.L2144:
+	b	.L2326
+.L2318:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2155
+	beq	.L2329
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2155
+	beq	.L2329
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2170
+	beq	.L2344
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR91
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
-	cmp	w1, w0
-	beq	.L2159
 	adrp	x1, .LANCHOR92
+	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	beq	.L2159
+	beq	.L2333
 	adrp	x1, .LANCHOR93
 	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2155
-.L2159:
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	beq	.L2333
+	adrp	x1, .LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
+	cmp	w1, w0
+	bne	.L2329
+.L2333:
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
+	ldr	x0, [x22, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2155
+	beq	.L2329
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2155
+	cbnz	w0, .L2329
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2155
-.L2161:
+	b	.L2329
+.L2335:
 	mov	w1, w24
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	bl	printf
-	b	.L2139
-.L2141:
+	b	.L2313
+.L2315:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	bl	printf
-	adrp	x2, .LANCHOR231
-	ldr	w0, [x2, #:lo12:.LANCHOR231]
+	adrp	x2, .LANCHOR237
+	ldr	w0, [x2, #:lo12:.LANCHOR237]
 	cmp	w0, 31
-	bhi	.L2162
-	adrp	x1, .LANCHOR232
-	add	x1, x1, :lo12:.LANCHOR232
+	bhi	.L2336
+	adrp	x1, .LANCHOR238
+	add	x1, x1, :lo12:.LANCHOR238
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
-	str	w0, [x2, #:lo12:.LANCHOR231]
-.L2162:
+	str	w0, [x2, #:lo12:.LANCHOR237]
+.L2336:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	ldr	w0, [x28, #:lo12:.LANCHOR136]
 	cmn	w0, #1
-	bne	.L2163
-.L2251:
-	str	w21, [x28, #:lo12:.LANCHOR133]
-	b	.L2139
-.L2163:
+	bne	.L2337
+.L2425:
+	str	w21, [x28, #:lo12:.LANCHOR136]
+	b	.L2313
+.L2337:
 	cmp	w21, w0
-	bcs	.L2139
-	b	.L2251
-.L2167:
+	bcs	.L2313
+	b	.L2425
+.L2341:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2166
-.L2140:
+	b	.L2340
+.L2314:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2254
+	b	.L2428
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
-	.global	FtlGcScanTempBlk
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	stp	x29, x30, [sp, -96]!
+	.global	FtlGcFreeTempBlock
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbz	w0, .L2431
+	mov	w0, 0
+	ret
+.L2431:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 65535
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR233
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	ldrh	w19, [x23, #:lo12:.LANCHOR233]
-	mov	w0, 65535
+	adrp	x19, .LANCHOR94
 	stp	x21, x22, [sp, 32]
+	add	x0, x19, :lo12:.LANCHOR94
+	ldrh	w20, [x19, #:lo12:.LANCHOR94]
+	adrp	x21, .LANCHOR135
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w19, w0
-	stp	x27, x28, [sp, 80]
-	beq	.L2274
-	cbnz	w19, .L2257
-.L2258:
-	bl	FtlGcPageVarInit
-	b	.L2259
-.L2274:
-	mov	w19, 0
-.L2257:
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w1
-	beq	.L2258
-.L2259:
-	adrp	x25, .LANCHOR58
-	add	x25, x25, :lo12:.LANCHOR58
-	mov	w26, -1
-	mov	w24, 65535
-.L2271:
-	ldrh	w0, [x20]
-	strb	wzr, [x20, 8]
-	cmp	w0, w24
-	beq	.L2275
-	mov	w27, 56
-.L2273:
-	adrp	x1, .LANCHOR105
-	adrp	x22, .LANCHOR177
-	ldrh	w6, [x25]
-	add	x3, x20, 16
-	ldr	x5, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR37
-	ldr	x0, [x22, #:lo12:.LANCHOR177]
-	mov	w21, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR37]
-	add	x1, x1, 8
-	add	x1, x20, x1, lsl 1
-.L2261:
-	cmp	x3, x1
-	bne	.L2263
-	mov	w1, w21
-	umull	x21, w21, w27
-	mov	x28, 0
-	mov	w2, 0
-	bl	FlashReadPages
-.L2264:
-	cmp	x28, x21
-	bne	.L2272
-	adrp	x0, .LANCHOR52
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
-	cmp	w0, w19
-	bhi	.L2273
-.L2275:
-	mov	w2, 0
-	b	.L2260
-.L2263:
-	ldrh	w2, [x3]
-	cmp	w2, w24
-	beq	.L2262
-	umaddl	x4, w21, w27, x0
-	orr	w2, w19, w2, lsl 10
-	str	w2, [x4, 4]
-	mul	w2, w21, w6
-	add	w21, w21, 1
-	str	xzr, [x4, 8]
-	and	w21, w21, 65535
-	asr	w2, w2, 2
-	add	x2, x5, x2, sxtw 2
-	str	x2, [x4, 16]
-.L2262:
-	add	x3, x3, 2
-	b	.L2261
-.L2272:
-	ldr	x6, [x22, #:lo12:.LANCHOR177]
-	add	x5, x6, x28
-	ldr	w4, [x5, 4]
-	lsr	w0, w4, 10
-	bl	P2V_plane
-	and	w2, w0, 65535
-	ldr	w0, [x6, x28]
-	cbnz	w0, .L2265
-	ldr	x0, [x5, 16]
-	add	x28, x28, 56
-	ldrh	w1, [x0]
-	cmp	w1, w24
-	bne	.L2266
-	adrp	x0, .LANCHOR132
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR132]
-.L2260:
-	strb	w2, [x20, 6]
-	mov	w0, -1
-	strh	w19, [x20, 2]
-	mov	w1, w19
-	strh	w0, [x23, #:lo12:.LANCHOR233]
-	mov	x0, x20
-	bl	ftl_sb_update_avl_pages
-	mov	w0, w26
+	cmp	w20, w1
+	str	x27, [sp, 80]
+	beq	.L2433
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	bl	FtlGcScanTempBlk
+	str	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L2433
+	adrp	x0, .LANCHOR79
+	ubfiz	x20, x20, 1, 16
+	ldr	x1, [x0, #:lo12:.LANCHOR79]
+	ldrh	w0, [x1, x20]
+	cmp	w0, 4
+	bls	.L2434
+	sub	w0, w0, #5
+	strh	w0, [x1, x20]
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.L2434:
+	ldr	w0, [x21, #:lo12:.LANCHOR135]
+	cbnz	w0, .L2435
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
+	ldr	w1, [x0, 96]
+	add	w1, w1, 1
+	str	w1, [x0, 96]
+	ldr	w0, [x29, 108]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2435:
+	str	wzr, [x21, #:lo12:.LANCHOR135]
+	mov	w0, 1
+.L2430:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L2266:
-	ldp	w2, w0, [x0, 8]
-	mov	w1, w4
-	bl	FtlGcUpdatePage
-	b	.L2264
-.L2265:
-	ldrh	w1, [x20]
-	mov	w2, w4
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+.L2433:
+	str	wzr, [x21, #:lo12:.LANCHOR135]
+	mov	w0, 65535
+	ldrh	w1, [x19, #:lo12:.LANCHOR94]
+	add	x21, x19, :lo12:.LANCHOR94
+	cmp	w1, w0
+	beq	.L2456
+	bl	FtlCacheWriteBack
+	adrp	x20, .LANCHOR111
+	adrp	x0, .LANCHOR53
+	ldrb	w1, [x21, 7]
+	ldrh	w2, [x20, #:lo12:.LANCHOR111]
+	mov	x21, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR53]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L2437
+	mov	w2, 163
+	adrp	x1, .LANCHOR239
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR239
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x0, .LANCHOR28
-	ldr	w1, [x0, #:lo12:.LANCHOR28]
-	ldrh	w0, [x20]
-	cbnz	w1, .L2267
-	adrp	x1, .LANCHOR8
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2268
-.L2267:
-	adrp	x2, .LANCHOR78
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2437:
+	add	x0, x19, :lo12:.LANCHOR94
+	adrp	x23, .LANCHOR84
+	ldrh	w3, [x21, #:lo12:.LANCHOR53]
+	adrp	x25, .LANCHOR73
+	ldrh	w2, [x19, #:lo12:.LANCHOR94]
+	adrp	x26, .LANCHOR239
+	ldrb	w0, [x0, 7]
+	add	x25, x25, :lo12:.LANCHOR73
+	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x26, x26, :lo12:.LANCHOR239
+	mov	w21, 0
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x1, .LANCHOR161
+	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+	ldr	w2, [x1, #:lo12:.LANCHOR161]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR161]
+.L2438:
+	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+	cmp	w0, w21
+	bhi	.L2442
+	mov	w0, -1
+	bl	decrement_vpc_count
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2443
+	ldrh	w1, [x19, #:lo12:.LANCHOR94]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
+	bl	printf
+.L2443:
+	ldrh	w0, [x19, #:lo12:.LANCHOR94]
+	ldr	x2, [x23, #:lo12:.LANCHOR84]
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x1]
-	cmp	w1, 119
-	bls	.L2269
-.L2268:
-	ldr	x1, [x22, #:lo12:.LANCHOR177]
-	ldr	w1, [x1, x28]
-	cmn	w1, #1
-	bne	.L2270
-.L2269:
-	ldr	x1, [x22, #:lo12:.LANCHOR177]
-	add	x28, x1, x28
-	ldr	w26, [x28, 4]
-.L2270:
-	adrp	x1, .LANCHOR83
-	ubfiz	x0, x0, 1, 16
-	mov	w19, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x20]
+	cbz	w1, .L2444
+	bl	INSERT_DATA_LIST
+.L2445:
+	adrp	x0, .LANCHOR109
+	mov	w21, -1
+	strh	wzr, [x20, #:lo12:.LANCHOR111]
+	strh	w21, [x19, #:lo12:.LANCHOR94]
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR223
+	ldrh	w0, [x0, #:lo12:.LANCHOR223]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	ble	.L2456
+	adrp	x0, .LANCHOR204
+	mov	w1, 20
+	strh	w21, [x0, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR176
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+.L2456:
+	mov	w0, 0
+	b	.L2430
+.L2442:
+	adrp	x0, .LANCHOR112
+	mov	w24, 12
+	ldr	x27, [x0, #:lo12:.LANCHOR112]
+	umull	x24, w21, w24
+	ldr	w0, [x25]
+	add	x22, x27, x24
+	ldr	w1, [x22, 8]
+	cmp	w1, w0
+	bcc	.L2439
+	mov	w2, 168
+	mov	x1, x26
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2439:
+	ldr	w0, [x22, 8]
+	add	x1, x29, 108
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x27, x24]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	bne	.L2440
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	mov	w24, w0
+	ldr	w0, [x22, 8]
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+	mov	w0, w24
+.L2455:
+	bl	decrement_vpc_count
+.L2441:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2438
+.L2440:
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L2441
+	ldrh	w0, [x19, #:lo12:.LANCHOR94]
+	b	.L2455
+.L2444:
 	bl	INSERT_FREE_LIST
-	mov	w0, -1
-	strh	w0, [x20]
-	bl	FtlGcPageVarInit
-	b	.L2271
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
+	b	.L2445
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
-	.global	FtlGcFreeTempBlock
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbz	w0, .L2285
+	.global	FtlGcPageRecovery
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR53
+	adrp	x19, .LANCHOR94
+	add	x19, x19, :lo12:.LANCHOR94
+	ldrh	w1, [x20, #:lo12:.LANCHOR53]
+	mov	x0, x19
+	bl	FtlGcScanTempBlk
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bcc	.L2457
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	FtlMapBlkWriteDumpData
 	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	adrp	x0, .LANCHOR135
+	str	wzr, [x0, #:lo12:.LANCHOR135]
+.L2457:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L2285:
-	stp	x29, x30, [sp, -112]!
-	mov	w1, 65535
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",@progbits
+	.align	2
+	.global	FtlPowerLostRecovery
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR237
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR92
+	add	x19, x19, :lo12:.LANCHOR92
+	str	wzr, [x0, #:lo12:.LANCHOR237]
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	adrp	x19, .LANCHOR93
+	bl	FtlSlcSuperblockCheck
+	add	x19, x19, :lo12:.LANCHOR93
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	mov	w0, -1
+	bl	decrement_vpc_count
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR235
+	mov	w1, -1
+	add	x29, sp, 0
+	strh	w1, [x0, #:lo12:.LANCHOR235]
+	adrp	x0, .LANCHOR39
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR236
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
+	strh	wzr, [x19, #:lo12:.LANCHOR236]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR209
+	ldrh	w1, [x0, #:lo12:.LANCHOR209]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2463
+.L2465:
+	mov	w20, -1
+.L2462:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2463:
+	bl	FtlLoadSysInfo
+	mov	w20, w0
+	cbnz	w0, .L2465
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x2, .LANCHOR68
+	adrp	x0, .LANCHOR97
+	mov	x3, 4
+	ldrh	w2, [x2, #:lo12:.LANCHOR68]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	add	x2, x3, x2, uxtw 4
+	add	x1, x0, 4
+	add	x0, x0, x2
+.L2466:
+	cmp	x1, x0
+	bne	.L2468
+	ldrh	w0, [x19, #:lo12:.LANCHOR236]
+	cbnz	w0, .L2467
+	b	.L2462
+.L2468:
+	ldr	w2, [x1], 16
+	tbz	w2, #31, .L2466
+.L2467:
+	adrp	x0, .LANCHOR84
+	adrp	x1, .LANCHOR92
+	ldr	x2, [x0, #:lo12:.LANCHOR84]
+	add	x0, x1, :lo12:.LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	ldrh	w4, [x0, 4]
+	lsl	x1, x1, 1
+	ldrh	w3, [x2, x1]
+	sub	w3, w3, w4
+	adrp	x4, .LANCHOR53
+	strh	w3, [x2, x1]
+	strh	wzr, [x0, 4]
+	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	strh	w1, [x0, 2]
+	adrp	x1, .LANCHOR93
+	strb	wzr, [x0, 6]
+	add	x0, x1, :lo12:.LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	ldrh	w5, [x0, 4]
+	lsl	x1, x1, 1
+	ldrh	w3, [x2, x1]
+	sub	w3, w3, w5
+	strh	w3, [x2, x1]
+	strb	wzr, [x0, 6]
+	ldrh	w1, [x4, #:lo12:.LANCHOR53]
+	strh	w1, [x0, 2]
+	strh	wzr, [x0, 4]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2462
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.FtlLowFormat,"ax",@progbits
+	.align	2
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbnz	w0, .L2505
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR195
+	mov	w1, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR93
+	adrp	x19, .LANCHOR67
+	ldr	x0, [x0, #:lo12:.LANCHOR195]
+	adrp	x20, .LANCHOR159
+	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR39
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR93
-	ldrh	w20, [x19, #:lo12:.LANCHOR93]
-	adrp	x21, .LANCHOR132
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w20, w1
-	str	x27, [sp, 80]
-	beq	.L2287
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
-	bl	FtlGcScanTempBlk
-	str	w0, [x29, 108]
-	cmn	w0, #1
-	beq	.L2287
-	adrp	x0, .LANCHOR78
-	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR78]
-	ldrh	w0, [x1, x20]
-	cmp	w0, 4
-	bls	.L2288
-	sub	w0, w0, #5
-	strh	w0, [x1, x20]
-	mov	w0, 1
-	bl	FtlEctTblFlush
-.L2288:
-	ldr	w0, [x21, #:lo12:.LANCHOR132]
-	cbnz	w0, .L2289
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
-	ldr	w1, [x0, 96]
-	add	w1, w1, 1
-	str	w1, [x0, 96]
-	ldr	w0, [x29, 108]
-	lsr	w0, w0, 10
-	bl	FtlBbmMapBadBlock
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR131
+	ldrh	w2, [x19, #:lo12:.LANCHOR67]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	str	wzr, [x20, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	ldrh	w0, [x25, #:lo12:.LANCHOR39]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	w0, .L2476
+	bl	FtlMakeBbt
+.L2476:
+	adrp	x22, .LANCHOR56
+	adrp	x0, .LANCHOR186
+	mov	w6, 23752
+	ldrh	w1, [x22, #:lo12:.LANCHOR56]
+	movk	w6, 0xa0f, lsl 16
+	ldr	x4, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR187
+	lsl	w1, w1, 7
+	ldr	x5, [x0, #:lo12:.LANCHOR187]
+	mov	w0, 0
+.L2477:
+	cmp	w0, w1
+	blt	.L2478
+	adrp	x21, .LANCHOR40
+	adrp	x19, .LANCHOR41
+	add	x26, x19, :lo12:.LANCHOR41
+	mov	w23, 0
+	ldrh	w24, [x21, #:lo12:.LANCHOR40]
+.L2479:
+	ldrh	w0, [x26]
+	cmp	w0, w24
+	bhi	.L2480
+	adrp	x24, .LANCHOR38
+	sub	w1, w23, #2
+	ldrh	w0, [x24, #:lo12:.LANCHOR38]
+	cmp	w1, w0, lsl 1
+	bgt	.L2481
+.L2485:
+	add	x26, x21, :lo12:.LANCHOR40
+	mov	w23, 0
+	mov	w25, 0
+.L2482:
+	ldrh	w0, [x26]
+	cmp	w0, w25
+	bhi	.L2486
+	adrp	x0, .LANCHOR74
+	ldrh	w1, [x19, #:lo12:.LANCHOR41]
+	ldrh	w3, [x24, #:lo12:.LANCHOR38]
+	str	w1, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR42
+	adrp	x1, .LANCHOR223
+	ldr	w2, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR73
+	udiv	w6, w2, w3
+	ubfx	x5, x6, 5, 16
+	str	w6, [x0, #:lo12:.LANCHOR73]
+	add	w4, w5, 36
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+	mov	w4, 24
+	mul	w4, w3, w4
+	cmp	w23, w4
+	ble	.L2487
+	sub	w2, w2, w23
+	udiv	w2, w2, w3
+	str	w2, [x0, #:lo12:.LANCHOR73]
+	lsr	w2, w2, 5
+	add	w2, w2, 24
+	strh	w2, [x1, #:lo12:.LANCHOR223]
+.L2487:
+	adrp	x2, .LANCHOR28
+	ldr	w2, [x2, #:lo12:.LANCHOR28]
+	cmp	w2, 1
+	bne	.L2488
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+.L2488:
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L2489
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+.L2489:
+	adrp	x2, .LANCHOR49
+	ldrh	w2, [x2, #:lo12:.LANCHOR49]
+	cbz	w2, .L2491
+	ldrh	w4, [x1, #:lo12:.LANCHOR223]
+	add	w4, w4, w2, lsr 1
+	strh	w4, [x1, #:lo12:.LANCHOR223]
+	mul	w4, w2, w3
+	cmp	w23, w4
+	bge	.L2491
+	add	w2, w2, 32
+	str	w6, [x0, #:lo12:.LANCHOR73]
+	add	w2, w5, w2
+	strh	w2, [x1, #:lo12:.LANCHOR223]
+.L2491:
+	ldrh	w2, [x1, #:lo12:.LANCHOR223]
+	adrp	x25, .LANCHOR222
+	ldr	w1, [x0, #:lo12:.LANCHOR73]
+	adrp	x24, .LANCHOR84
+	mov	w23, -1
+	sub	w1, w1, w2
+	mul	w3, w1, w3
+	adrp	x1, .LANCHOR53
+	str	w3, [x25, #:lo12:.LANCHOR222]
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	mul	w3, w1, w3
+	str	w3, [x0, #:lo12:.LANCHOR73]
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	mul	w3, w0, w3
+	adrp	x0, .LANCHOR69
+	str	w3, [x0, #:lo12:.LANCHOR69]
 	bl	FtlBbmTblFlush
-.L2289:
-	str	wzr, [x21, #:lo12:.LANCHOR132]
+	ldr	x0, [x24, #:lo12:.LANCHOR84]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR41]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR101
+	adrp	x1, .LANCHOR204
+	ldrh	w2, [x21, #:lo12:.LANCHOR40]
+	str	wzr, [x0, #:lo12:.LANCHOR101]
+	add	x0, x1, :lo12:.LANCHOR204
+	strh	w23, [x1, #:lo12:.LANCHOR204]
+	mov	w1, 255
+	lsr	w2, w2, 3
+	strh	wzr, [x0, 2]
+	strb	wzr, [x0, 6]
+	strb	wzr, [x0, 8]
+	adrp	x0, .LANCHOR92
+	add	x19, x0, :lo12:.LANCHOR92
+	strh	wzr, [x0, #:lo12:.LANCHOR92]
 	mov	w0, 1
-.L2284:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L2287:
-	str	wzr, [x21, #:lo12:.LANCHOR132]
-	mov	w0, 65535
-	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	add	x21, x19, :lo12:.LANCHOR93
-	cmp	w1, w0
-	beq	.L2310
-	bl	FtlCacheWriteBack
-	adrp	x20, .LANCHOR110
-	adrp	x0, .LANCHOR52
-	ldrb	w1, [x21, 7]
-	ldrh	w2, [x20, #:lo12:.LANCHOR110]
-	mov	x21, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR52]
-	mul	w1, w1, w3
-	cmp	w2, w1
-	beq	.L2291
-	mov	w2, 163
-	adrp	x1, .LANCHOR234
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR234
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L2291:
-	add	x0, x19, :lo12:.LANCHOR93
-	adrp	x23, .LANCHOR83
-	ldrh	w3, [x21, #:lo12:.LANCHOR52]
-	adrp	x25, .LANCHOR72
-	ldrh	w2, [x19, #:lo12:.LANCHOR93]
-	adrp	x26, .LANCHOR234
-	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR72
-	ldr	x1, [x23, #:lo12:.LANCHOR83]
-	add	x26, x26, :lo12:.LANCHOR234
-	mov	w21, 0
-	mul	w0, w0, w3
-	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR158
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
-	ldr	w2, [x1, #:lo12:.LANCHOR158]
-	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR158]
-.L2292:
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
-	cmp	w0, w21
-	bhi	.L2296
-	mov	w0, -1
-	bl	decrement_vpc_count
-	adrp	x0, .LANCHOR8
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2297
-	ldrh	w1, [x19, #:lo12:.LANCHOR93]
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
-	bl	printf
-.L2297:
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	ldr	x2, [x23, #:lo12:.LANCHOR83]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2298
-	bl	INSERT_DATA_LIST
-.L2299:
-	adrp	x0, .LANCHOR108
-	mov	w21, -1
-	strh	wzr, [x20, #:lo12:.LANCHOR110]
-	strh	w21, [x19, #:lo12:.LANCHOR93]
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	bl	l2p_flush
+	strb	w0, [x19, 8]
+	adrp	x0, .LANCHOR0
+	strh	wzr, [x19, 2]
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	strb	wzr, [x19, 6]
+	bl	ftl_memset
+.L2493:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2494
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2493
+.L2478:
+	ubfiz	x3, x0, 2, 16
+	mvn	w2, w0
+	orr	w2, w0, w2, lsl 16
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w2, [x4, x3]
+	str	w6, [x5, x3]
+	b	.L2477
+.L2480:
+	mov	w0, w24
+	mov	w1, 1
+	add	w24, w24, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w24, w24, 65535
+	and	w23, w23, 65535
+	b	.L2479
+.L2481:
+	udiv	w0, w23, w0
+	adrp	x1, .LANCHOR66
+	ldr	w23, [x1, #:lo12:.LANCHOR66]
+	add	w0, w0, w23
+	bl	FtlSysBlkNumInit
+	ldrh	w0, [x25, #:lo12:.LANCHOR39]
+	add	x25, x19, :lo12:.LANCHOR41
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	w23, [x21, #:lo12:.LANCHOR40]
+.L2483:
+	ldrh	w0, [x25]
+	cmp	w0, w23
+	bls	.L2485
+	mov	w0, w23
+	add	w23, w23, 1
+	mov	w1, 1
+	and	w23, w23, 65535
+	bl	FtlLowFormatEraseBlock
+	b	.L2483
+.L2486:
+	mov	w0, w25
+	mov	w1, 0
+	add	w25, w25, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w25, w25, 65535
+	and	w23, w23, 65535
+	b	.L2482
+.L2494:
+	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	mov	w23, -1
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR159]
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	adrp	x2, .LANCHOR93
+	add	x0, x2, :lo12:.LANCHOR93
+	ldrh	w1, [x19]
+	mov	x19, x0
+	add	w1, w1, 1
+	strh	wzr, [x0, 2]
+	strh	w1, [x2, #:lo12:.LANCHOR93]
+	mov	w1, 1
+	strb	wzr, [x0, 6]
+	strb	w1, [x0, 8]
+.L2495:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2496
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2495
+.L2496:
+	ldr	w1, [x20, #:lo12:.LANCHOR159]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR159]
+	ldr	x1, [x24, #:lo12:.LANCHOR84]
+	ldrh	w2, [x19, 4]
+	mov	w19, -1
+	strh	w2, [x1, x0]
+	adrp	x0, .LANCHOR94
+	strh	w19, [x0, #:lo12:.LANCHOR94]
+	bl	FtlFreeSysBlkQueueOut
+	adrp	x2, .LANCHOR209
+	add	x1, x2, :lo12:.LANCHOR209
+	strh	w0, [x2, #:lo12:.LANCHOR209]
+	ldr	w0, [x25, #:lo12:.LANCHOR222]
+	strh	w0, [x1, 6]
+	ldr	w0, [x20, #:lo12:.LANCHOR159]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	strh	wzr, [x1, 2]
+	strh	w19, [x1, 4]
+	str	w0, [x20, #:lo12:.LANCHOR159]
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR88
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR227
-	ldrh	w0, [x0, #:lo12:.LANCHOR227]
-	add	w0, w0, w0, lsl 1
-	cmp	w1, w0, lsr 2
-	ble	.L2310
-	adrp	x0, .LANCHOR201
-	mov	w1, 20
-	strh	w21, [x0, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR173
-	strh	w1, [x0, #:lo12:.LANCHOR173]
-.L2310:
+	bl	FtlSysBlkInit
+	cbnz	w0, .L2475
+	adrp	x0, .LANCHOR231
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR231]
+.L2475:
 	mov	w0, 0
-	b	.L2284
-.L2296:
-	adrp	x0, .LANCHOR111
-	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	umull	x24, w21, w24
-	ldr	w0, [x25]
-	add	x22, x27, x24
-	ldr	w1, [x22, 8]
-	cmp	w1, w0
-	bcc	.L2293
-	mov	w2, 168
-	mov	x1, x26
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L2293:
-	ldr	w0, [x22, 8]
-	add	x1, x29, 108
-	mov	w2, 0
-	bl	log2phys
-	ldr	w0, [x27, x24]
-	ldr	w1, [x29, 108]
-	cmp	w0, w1
-	bne	.L2294
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-	mov	w24, w0
-	ldr	w0, [x22, 8]
-	mov	w2, 1
-	add	x1, x22, 4
-	bl	log2phys
-	mov	w0, w24
-.L2309:
-	bl	decrement_vpc_count
-.L2295:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2292
-.L2294:
-	ldr	w0, [x22, 4]
-	cmp	w1, w0
-	beq	.L2295
-	ldrh	w0, [x19, #:lo12:.LANCHOR93]
-	b	.L2309
-.L2298:
-	bl	INSERT_FREE_LIST
-	b	.L2299
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2505:
+	mov	w0, 0
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
 	.global	Ftl_get_new_temp_ppa
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR93
+	adrp	x0, .LANCHOR94
 	mov	w2, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR93]
+	ldrh	w3, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w2
-	beq	.L2312
-	add	x1, x0, :lo12:.LANCHOR93
+	beq	.L2509
+	add	x1, x0, :lo12:.LANCHOR94
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2313
-.L2312:
+	cbnz	w0, .L2510
+.L2509:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR93
+	add	x0, x19, :lo12:.LANCHOR94
 	strb	wzr, [x0, 8]
 	bl	allocate_data_superblock
-	adrp	x0, .LANCHOR108
-	strh	wzr, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR110
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR111
+	strh	wzr, [x0, #:lo12:.LANCHOR111]
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2313:
-	add	x0, x19, :lo12:.LANCHOR93
+.L2510:
+	add	x0, x19, :lo12:.LANCHOR94
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
@@ -15806,62 +17504,68 @@ Ftl_get_new_temp_ppa:
 	.global	Ftl_gc_temp_data_write_back
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	cbz	w0, .L2513
+	mov	w0, 0
+	ret
+.L2516:
+	mov	w0, 0
+.L2512:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2513:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR8
 	add	x29, sp, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR102
-	cbz	w0, .L2316
-	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2316
-	adrp	x0, .LANCHOR93+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbz	w0, .L2316
-.L2321:
-	mov	w0, 0
-.L2315:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L2316:
-	adrp	x20, .LANCHOR178
-	ldr	w1, [x19, #:lo12:.LANCHOR102]
+	adrp	x19, .LANCHOR103
+	cbz	w0, .L2515
+	ldr	w0, [x19, #:lo12:.LANCHOR103]
+	tbz	x0, 0, .L2515
+	adrp	x0, .LANCHOR94+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
+	cbnz	w0, .L2516
+.L2515:
+	adrp	x20, .LANCHOR181
+	ldr	w1, [x19, #:lo12:.LANCHOR103]
 	mov	w3, 0
 	mov	w2, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR178]
-	add	x19, x19, :lo12:.LANCHOR102
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
+	add	x19, x19, :lo12:.LANCHOR103
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2318:
+.L2517:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2320
-	ldr	x0, [x20, #:lo12:.LANCHOR178]
+	bcc	.L2519
+	ldr	x0, [x20, #:lo12:.LANCHOR181]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
-	adrp	x0, .LANCHOR93+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
-	cbnz	w0, .L2321
+	adrp	x0, .LANCHOR94+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR94+4]
+	cbnz	w0, .L2516
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2332
-.L2320:
+	b	.L2529
+.L2519:
 	umull	x0, w11, w12
-	ldr	x2, [x20, #:lo12:.LANCHOR178]
+	ldr	x2, [x20, #:lo12:.LANCHOR181]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L2319
-	adrp	x0, .LANCHOR93
-	adrp	x3, .LANCHOR83
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	ldr	x3, [x3, #:lo12:.LANCHOR83]
+	bne	.L2518
+	adrp	x0, .LANCHOR94
+	adrp	x3, .LANCHOR84
+	ldrh	w4, [x0, #:lo12:.LANCHOR94]
+	ldr	x3, [x3, #:lo12:.LANCHOR84]
 	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	strh	w2, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -15870,269 +17574,108 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2332:
+.L2529:
 	mov	w0, 1
-	b	.L2315
-.L2319:
+	b	.L2512
+.L2518:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2318
+	b	.L2517
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.FtlGcPageRecovery,"ax",@progbits
-	.align	2
-	.global	FtlGcPageRecovery
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR52
-	adrp	x19, .LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR93
-	ldrh	w1, [x20, #:lo12:.LANCHOR52]
-	mov	x0, x19
-	bl	FtlGcScanTempBlk
-	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR52]
-	cmp	w1, w0
-	bcc	.L2333
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
-	bl	FtlMapBlkWriteDumpData
-	mov	w0, 0
-	bl	FtlGcFreeTempBlock
-	adrp	x0, .LANCHOR132
-	str	wzr, [x0, #:lo12:.LANCHOR132]
-.L2333:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.FtlPowerLostRecovery,"ax",@progbits
-	.align	2
-	.global	FtlPowerLostRecovery
-	.type	FtlPowerLostRecovery, %function
-FtlPowerLostRecovery:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR231
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR91
-	add	x19, x19, :lo12:.LANCHOR91
-	str	wzr, [x0, #:lo12:.LANCHOR231]
-	mov	x0, x19
-	bl	FtlRecoverySuperblock
-	mov	x0, x19
-	adrp	x19, .LANCHOR92
-	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR92
-	mov	x0, x19
-	bl	FtlRecoverySuperblock
-	mov	x0, x19
-	bl	FtlSlcSuperblockCheck
-	bl	FtlGcPageRecovery
-	mov	w0, -1
-	bl	decrement_vpc_count
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.section	.text.FtlSysBlkInit,"ax",@progbits
-	.align	2
-	.global	FtlSysBlkInit
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR229
-	mov	w1, -1
-	add	x29, sp, 0
-	strh	w1, [x0, #:lo12:.LANCHOR229]
-	adrp	x0, .LANCHOR38
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR230
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
-	stp	x21, x22, [sp, 32]
-	strh	wzr, [x19, #:lo12:.LANCHOR230]
-	str	x23, [sp, 48]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	adrp	x0, .LANCHOR206
-	ldrh	w1, [x0, #:lo12:.LANCHOR206]
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L2339
-.L2341:
-	mov	w23, -1
-.L2338:
-	mov	w0, w23
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L2339:
-	bl	FtlLoadSysInfo
-	mov	w23, w0
-	cbnz	w0, .L2341
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	mov	w0, 1
-	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR67
-	adrp	x0, .LANCHOR96
-	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR67]
-	ldr	x0, [x0, #:lo12:.LANCHOR96]
-	add	x2, x3, x2, uxtw 4
-	add	x1, x0, 4
-	add	x0, x0, x2
-.L2342:
-	cmp	x1, x0
-	bne	.L2344
-	ldrh	w0, [x19, #:lo12:.LANCHOR230]
-	cbnz	w0, .L2343
-	b	.L2338
-.L2344:
-	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2342
-.L2343:
-	adrp	x22, .LANCHOR91
-	add	x20, x22, :lo12:.LANCHOR91
-	mov	x0, x20
-	adrp	x21, .LANCHOR92
-	bl	FtlSuperblockPowerLostFix
-	add	x19, x21, :lo12:.LANCHOR92
-	mov	x0, x19
-	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR83
-	ldrh	w3, [x20, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
-	ldrh	w0, [x22, #:lo12:.LANCHOR91]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w3
-	adrp	x3, .LANCHOR52
-	strh	w2, [x1, x0]
-	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR52]
-	strh	w0, [x20, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR92]
-	strh	wzr, [x20, 4]
-	ldrh	w4, [x19, 4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	sub	w2, w2, w4
-	strh	w2, [x1, x0]
-	strb	wzr, [x19, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR52]
-	strh	w0, [x19, 2]
-	strh	wzr, [x19, 4]
-	adrp	x0, .LANCHOR124
-	add	x0, x0, :lo12:.LANCHOR124
-	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR215
-	add	x0, x0, :lo12:.LANCHOR215
-	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR80
-	add	x0, x0, :lo12:.LANCHOR80
-	ldrh	w1, [x0, 30]
-	add	w1, w1, 1
-	strh	w1, [x0, 30]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	b	.L2338
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	adrp	x1, .LANCHOR76
-	ldr	w1, [x1, #:lo12:.LANCHOR76]
-	cbnz	w1, .L2401
+	adrp	x1, .LANCHOR77
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cbnz	w1, .L2582
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR168
+	adrp	x21, .LANCHOR171
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x21, #:lo12:.LANCHOR168]
+	ldr	w1, [x21, #:lo12:.LANCHOR171]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2403
-	adrp	x1, .LANCHOR85
-	ldrh	w1, [x1, #:lo12:.LANCHOR85]
+	cbnz	w1, .L2584
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, 47
-	bls	.L2403
-	adrp	x1, .LANCHOR113
-	mov	w4, 65535
-	ldrh	w3, [x1, #:lo12:.LANCHOR113]
-	cmp	w3, w4
-	beq	.L2351
-	adrp	x2, .LANCHOR112
-	ldrh	w5, [x2, #:lo12:.LANCHOR112]
-	cmp	w5, w4
-	bne	.L2351
-	strh	w3, [x2, #:lo12:.LANCHOR112]
-	mov	w2, -1
-	strh	w2, [x1, #:lo12:.LANCHOR113]
-.L2351:
-	cbnz	w0, .L2404
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	bls	.L2584
+	adrp	x5, .LANCHOR114
+	mov	w2, 65535
+	ldrh	w8, [x5, #:lo12:.LANCHOR114]
+	cmp	w8, w2
+	beq	.L2532
+	adrp	x7, .LANCHOR113
+	ldrh	w1, [x7, #:lo12:.LANCHOR113]
+	cmp	w1, w2
+	bne	.L2532
+	adrp	x3, .LANCHOR115
+	ldrh	w6, [x3, #:lo12:.LANCHOR115]
+	cmp	w6, w1
+	beq	.L2532
+	adrp	x2, .LANCHOR116
+	ldrh	w4, [x2, #:lo12:.LANCHOR116]
+	cmp	w4, w1
+	beq	.L2532
+	mov	w1, -1
+	strh	w8, [x7, #:lo12:.LANCHOR113]
+	strh	w6, [x5, #:lo12:.LANCHOR114]
+	strh	w4, [x3, #:lo12:.LANCHOR115]
+	strh	w1, [x2, #:lo12:.LANCHOR116]
+.L2532:
+	cbnz	w0, .L2585
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 24
-	bhi	.L2405
-	adrp	x1, .LANCHOR52
+	bhi	.L2586
+	adrp	x1, .LANCHOR53
 	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR52]
-	bls	.L2354
+	ldrh	w20, [x1, #:lo12:.LANCHOR53]
+	bls	.L2535
 	lsr	w20, w20, 5
-.L2353:
-	adrp	x2, .LANCHOR173
+.L2534:
+	adrp	x2, .LANCHOR176
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR173]
+	ldrh	w1, [x2, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bcs	.L2357
-	adrp	x0, .LANCHOR93
+	bcs	.L2538
+	adrp	x0, .LANCHOR94
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bne	.L2358
-	adrp	x1, .LANCHOR112
-	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	bne	.L2539
+	adrp	x1, .LANCHOR113
+	ldrh	w1, [x1, #:lo12:.LANCHOR113]
 	cmp	w1, w0
-	bne	.L2358
-	adrp	x0, .LANCHOR235
-	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	cbnz	w0, .L2359
-	adrp	x1, .LANCHOR72
-	adrp	x4, .LANCHOR100
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
-	ldr	w4, [x4, #:lo12:.LANCHOR100]
+	bne	.L2539
+	adrp	x0, .LANCHOR240
+	ldrh	w0, [x0, #:lo12:.LANCHOR240]
+	cbnz	w0, .L2540
+	adrp	x1, .LANCHOR73
+	adrp	x4, .LANCHOR101
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	ldr	w4, [x4, #:lo12:.LANCHOR101]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2360
-.L2359:
-	adrp	x1, .LANCHOR227
-	ldrh	w1, [x1, #:lo12:.LANCHOR227]
+	bcs	.L2541
+.L2540:
+	adrp	x1, .LANCHOR223
+	ldrh	w1, [x1, #:lo12:.LANCHOR223]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR173]
-.L2361:
-	adrp	x1, .LANCHOR169
-	str	wzr, [x1, #:lo12:.LANCHOR169]
-.L2349:
+	strh	w1, [x3, #:lo12:.LANCHOR176]
+.L2542:
+	adrp	x1, .LANCHOR172
+	str	wzr, [x1, #:lo12:.LANCHOR172]
+.L2530:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16140,183 +17683,183 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2354:
+.L2535:
 	cmp	w0, 12
-	bls	.L2355
+	bls	.L2536
 	lsr	w20, w20, 4
-	b	.L2353
-.L2355:
+	b	.L2534
+.L2536:
 	cmp	w0, 8
-	bls	.L2353
+	bls	.L2534
 	lsr	w20, w20, 2
-	b	.L2353
-.L2405:
+	b	.L2534
+.L2586:
 	mov	w20, 1
-	b	.L2353
-.L2360:
+	b	.L2534
+.L2541:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR173]
-	b	.L2361
-.L2358:
-	adrp	x0, .LANCHOR227
-	ldrh	w0, [x0, #:lo12:.LANCHOR227]
+	strh	w1, [x2, #:lo12:.LANCHOR176]
+	b	.L2542
+.L2539:
+	adrp	x0, .LANCHOR223
+	ldrh	w0, [x0, #:lo12:.LANCHOR223]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR173]
-.L2357:
-	adrp	x0, .LANCHOR114
-	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2352
+	strh	w0, [x3, #:lo12:.LANCHOR176]
+.L2538:
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
+	cbz	w0, .L2533
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2352:
-	adrp	x19, .LANCHOR201
+.L2533:
+	adrp	x19, .LANCHOR204
 	mov	w0, 65535
-	ldrh	w2, [x19, #:lo12:.LANCHOR201]
+	ldrh	w2, [x19, #:lo12:.LANCHOR204]
 	cmp	w2, w0
-	bne	.L2364
-	adrp	x0, .LANCHOR112
-	ldrh	w1, [x0, #:lo12:.LANCHOR112]
+	bne	.L2545
+	adrp	x0, .LANCHOR113
+	ldrh	w1, [x0, #:lo12:.LANCHOR113]
 	cmp	w1, w2
-	beq	.L2365
-	adrp	x2, .LANCHOR83
+	beq	.L2546
+	adrp	x2, .LANCHOR84
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR83]
+	ldr	x2, [x2, #:lo12:.LANCHOR84]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2366
+	cbnz	w1, .L2547
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2366:
-	ldrh	w1, [x0, #:lo12:.LANCHOR112]
-	strh	w1, [x19, #:lo12:.LANCHOR201]
+	strh	w1, [x0, #:lo12:.LANCHOR113]
+.L2547:
+	ldrh	w1, [x0, #:lo12:.LANCHOR113]
+	strh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2365:
-	add	x0, x19, :lo12:.LANCHOR201
+	strh	w1, [x0, #:lo12:.LANCHOR113]
+.L2546:
+	add	x0, x19, :lo12:.LANCHOR204
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2364
+	beq	.L2545
 	bl	IsBlkInGcList
-	cbz	w0, .L2368
+	cbz	w0, .L2549
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2368:
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+.L2549:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2369
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
-	add	x3, x19, :lo12:.LANCHOR201
+	cbz	w0, .L2550
+	ldrh	w0, [x19, #:lo12:.LANCHOR204]
+	add	x3, x19, :lo12:.LANCHOR204
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2369:
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+.L2550:
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
-	add	x22, x19, :lo12:.LANCHOR201
+	add	x22, x19, :lo12:.LANCHOR204
 	cmp	w1, w0
-	beq	.L2364
+	beq	.L2545
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR236
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR241
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	strh	wzr, [x22, 2]
-	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	adrp	x0, .LANCHOR83
+	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	adrp	x0, .LANCHOR84
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x0, #:lo12:.LANCHOR84]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR237
-	strh	w1, [x0, #:lo12:.LANCHOR237]
-.L2364:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR242
+	strh	w1, [x0, #:lo12:.LANCHOR242]
+.L2545:
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2370
-	adrp	x0, .LANCHOR92
+	beq	.L2551
+	adrp	x0, .LANCHOR93
 	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	ldrh	w2, [x0, #:lo12:.LANCHOR93]
 	cmp	w2, w1
-	beq	.L2370
-	adrp	x23, .LANCHOR175
-	add	x0, x23, :lo12:.LANCHOR175
+	beq	.L2551
+	adrp	x23, .LANCHOR178
+	add	x0, x23, :lo12:.LANCHOR178
 	str	x0, [x29, 168]
-.L2371:
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+.L2552:
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2372
-	adrp	x0, .LANCHOR169
-	adrp	x22, .LANCHOR52
-	add	x22, x22, :lo12:.LANCHOR52
-	str	wzr, [x0, #:lo12:.LANCHOR169]
-.L2373:
-	ldrh	w5, [x23, #:lo12:.LANCHOR175]
-	add	x7, x23, :lo12:.LANCHOR175
+	bne	.L2553
+	adrp	x0, .LANCHOR172
+	adrp	x22, .LANCHOR53
+	add	x22, x22, :lo12:.LANCHOR53
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+.L2554:
+	ldrh	w5, [x23, #:lo12:.LANCHOR178]
+	add	x7, x23, :lo12:.LANCHOR178
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR201]
+	strh	w6, [x19, #:lo12:.LANCHOR204]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2374
+	bne	.L2555
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2349
-.L2404:
+	b	.L2530
+.L2585:
 	mov	w20, 1
-	b	.L2352
-.L2370:
+	b	.L2533
+.L2551:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2440:
-	adrp	x0, .LANCHOR235
-	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	b	.L2349
-.L2374:
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+.L2621:
+	adrp	x0, .LANCHOR240
+	ldrh	w0, [x0, #:lo12:.LANCHOR240]
+	b	.L2530
+.L2555:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2375
-	strh	w5, [x23, #:lo12:.LANCHOR175]
-	b	.L2373
-.L2375:
-	adrp	x24, .LANCHOR83
-	adrp	x4, .LANCHOR37
+	cbz	w0, .L2556
+	strh	w5, [x23, #:lo12:.LANCHOR178]
+	b	.L2554
+.L2556:
+	adrp	x24, .LANCHOR84
+	adrp	x4, .LANCHOR38
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x24, #:lo12:.LANCHOR83]
+	ldr	x2, [x24, #:lo12:.LANCHOR84]
 	and	w5, w5, 65535
-	ldrh	w4, [x4, #:lo12:.LANCHOR37]
-	strh	w5, [x23, #:lo12:.LANCHOR175]
+	ldrh	w4, [x4, #:lo12:.LANCHOR38]
+	strh	w5, [x23, #:lo12:.LANCHOR178]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2377
+	bgt	.L2558
 	cmp	w5, 48
-	bls	.L2378
+	bls	.L2559
 	cmp	w3, 8
-	bls	.L2378
-	adrp	x3, .LANCHOR108
-	ldrh	w3, [x3, #:lo12:.LANCHOR108]
+	bls	.L2559
+	adrp	x3, .LANCHOR109
+	ldrh	w3, [x3, #:lo12:.LANCHOR109]
 	cmp	w3, 35
-	bhi	.L2378
-.L2377:
+	bhi	.L2559
+.L2558:
 	ldr	x3, [x29, 168]
 	strh	wzr, [x3]
-.L2378:
+.L2559:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2379
+	bgt	.L2560
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR175
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	b	.L2440
-.L2379:
-	cbnz	w1, .L2380
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+	adrp	x0, .LANCHOR178
+	strh	wzr, [x0, #:lo12:.LANCHOR178]
+	b	.L2621
+.L2560:
+	cbnz	w1, .L2561
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldr	x0, [x29, 168]
@@ -16324,142 +17867,142 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L2373
-.L2380:
+	b	.L2554
+.L2561:
 	adrp	x0, .LANCHOR8
-	add	x3, x19, :lo12:.LANCHOR201
+	add	x3, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2381
+	cbz	w0, .L2562
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2381:
+.L2562:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w6
-	bne	.L2382
-	mov	w2, 835
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	bne	.L2563
+	mov	w2, 851
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2382:
+.L2563:
 	ldr	x0, [x29, 136]
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2383
-	mov	w2, 836
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	bne	.L2564
+	mov	w2, 852
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2383:
-	adrp	x0, .LANCHOR93
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+.L2564:
+	adrp	x0, .LANCHOR94
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldrh	w0, [x0, #:lo12:.LANCHOR94]
 	cmp	w1, w0
-	bne	.L2384
-	mov	w2, 837
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	bne	.L2565
+	mov	w2, 853
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2384:
-	add	x22, x19, :lo12:.LANCHOR201
+.L2565:
+	add	x22, x19, :lo12:.LANCHOR204
 	mov	x0, x22
 	bl	make_superblock
-	adrp	x0, .LANCHOR236
-	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR241
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	strh	wzr, [x0, #:lo12:.LANCHOR241]
+	ldr	x0, [x24, #:lo12:.LANCHOR84]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR237
+	adrp	x0, .LANCHOR242
 	strh	wzr, [x22, 2]
-	strh	w1, [x0, #:lo12:.LANCHOR237]
+	strh	w1, [x0, #:lo12:.LANCHOR242]
 	strb	wzr, [x22, 6]
-.L2372:
+.L2553:
 	mov	w0, 1
-	str	w0, [x21, #:lo12:.LANCHOR168]
+	str	w0, [x21, #:lo12:.LANCHOR171]
 	adrp	x0, .LANCHOR8
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR53
 	stp	x0, x1, [x29, 120]
 	ldrb	w2, [x0, #:lo12:.LANCHOR8]
-	ldrh	w26, [x1, #:lo12:.LANCHOR52]
-	cbz	w2, .L2385
-	add	x0, x19, :lo12:.LANCHOR201
+	ldrh	w26, [x1, #:lo12:.LANCHOR53]
+	cbz	w2, .L2566
+	add	x0, x19, :lo12:.LANCHOR204
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2385
-	adrp	x0, .LANCHOR53
-	ldrh	w26, [x0, #:lo12:.LANCHOR53]
-.L2385:
-	add	x0, x19, :lo12:.LANCHOR201
+	bne	.L2566
+	adrp	x0, .LANCHOR54
+	ldrh	w26, [x0, #:lo12:.LANCHOR54]
+.L2566:
+	add	x0, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w26
-	ble	.L2386
+	ble	.L2567
 	sub	w20, w26, w0
 	and	w20, w20, 65535
-.L2386:
-	adrp	x0, .LANCHOR236
+.L2567:
+	adrp	x0, .LANCHOR241
 	mov	w27, 0
-	add	x0, x0, :lo12:.LANCHOR236
+	add	x0, x0, :lo12:.LANCHOR241
 	str	x0, [x29, 160]
-.L2387:
+.L2568:
 	cmp	w20, w27, uxth
-	bls	.L2395
-	add	x1, x19, :lo12:.LANCHOR201
-	adrp	x0, .LANCHOR37
-	adrp	x24, .LANCHOR106
+	bls	.L2576
+	add	x1, x19, :lo12:.LANCHOR204
+	adrp	x0, .LANCHOR38
+	adrp	x24, .LANCHOR107
 	add	x1, x1, 16
-	ldrh	w7, [x0, #:lo12:.LANCHOR37]
+	ldrh	w7, [x0, #:lo12:.LANCHOR38]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	mov	w6, 65535
 	add	w4, w4, w27
 	mov	w5, 56
-	b	.L2396
-.L2389:
+	b	.L2577
+.L2570:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2388
+	beq	.L2569
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2388:
+.L2569:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2396:
+.L2577:
 	cmp	w2, w7
-	bne	.L2389
-	add	x1, x19, :lo12:.LANCHOR201
-	adrp	x25, .LANCHOR102
-	add	x25, x25, :lo12:.LANCHOR102
+	bne	.L2570
+	add	x1, x19, :lo12:.LANCHOR204
+	adrp	x25, .LANCHOR103
+	add	x25, x25, :lo12:.LANCHOR103
 	ldrb	w2, [x1, 8]
 	mov	w1, w22
 	bl	FlashReadPages
@@ -16467,55 +18010,55 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2390:
+.L2571:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2394
+	bne	.L2575
 	add	w27, w27, 1
-	b	.L2387
-.L2394:
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	b	.L2568
+.L2575:
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2391
+	beq	.L2572
 	ldr	x28, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x28]
 	cmp	w1, w0
-	bne	.L2391
+	bne	.L2572
 	ldr	w4, [x28, 8]
 	cmn	w4, #1
-	bne	.L2392
-	mov	w2, 876
+	bne	.L2573
+	mov	w2, 892
 	str	w4, [x29, 112]
-	adrp	x1, .LANCHOR238
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LANCHOR243
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR243
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
 	ldr	w4, [x29, 112]
-.L2392:
+.L2573:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x22
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2391
+	bne	.L2572
 	ldr	x1, [x29, 160]
-	adrp	x4, .LANCHOR178
+	adrp	x4, .LANCHOR181
 	ldr	x2, [x29, 160]
-	ldr	x5, [x4, #:lo12:.LANCHOR178]
+	ldr	x5, [x4, #:lo12:.LANCHOR181]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	str	x4, [x29, 96]
@@ -16533,10 +18076,10 @@ rk_ftl_garbage_collect:
 	ldr	x2, [x29, 112]
 	ldr	w1, [x29, 108]
 	str	w0, [x2, 4]
-	ldr	x0, [x4, #:lo12:.LANCHOR178]
+	ldr	x0, [x4, #:lo12:.LANCHOR181]
 	ldr	w2, [x25]
 	umaddl	x1, w2, w1, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
 	add	w2, w2, 1
 	add	x0, x0, x22
 	ldr	x4, [x0, 8]
@@ -16545,84 +18088,94 @@ rk_ftl_garbage_collect:
 	str	x4, [x1, 16]
 	ldr	w1, [x29, 188]
 	str	w1, [x28, 12]
-	adrp	x1, .LANCHOR93
-	add	x12, x1, :lo12:.LANCHOR93
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR94
+	add	x12, x1, :lo12:.LANCHOR94
+	ldrh	w1, [x1, #:lo12:.LANCHOR94]
 	strh	w1, [x28, 2]
-	adrp	x1, .LANCHOR157
+	adrp	x1, .LANCHOR160
 	str	w2, [x25]
-	ldr	w1, [x1, #:lo12:.LANCHOR157]
+	ldr	w1, [x1, #:lo12:.LANCHOR160]
 	str	w1, [x28, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2393
+	cbnz	w0, .L2574
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x25]
 	cmp	w1, w0
-	beq	.L2393
+	beq	.L2574
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2391
-.L2393:
+	cbnz	w0, .L2572
+.L2574:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2391
-.L2441:
-	str	wzr, [x21, #:lo12:.LANCHOR168]
-	b	.L2440
-.L2391:
+	cbz	w0, .L2572
+.L2622:
+	str	wzr, [x21, #:lo12:.LANCHOR171]
+	b	.L2621
+.L2572:
 	add	x22, x22, 56
-	b	.L2390
-.L2395:
-	add	x1, x19, :lo12:.LANCHOR201
+	b	.L2571
+.L2576:
+	add	x1, x19, :lo12:.LANCHOR204
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w26, w20
-	bhi	.L2397
-	adrp	x0, .LANCHOR102
-	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2398
+	bhi	.L2578
+	adrp	x0, .LANCHOR103
+	ldr	w0, [x0, #:lo12:.LANCHOR103]
+	cbz	w0, .L2579
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2441
-.L2398:
-	adrp	x0, .LANCHOR236
-	ldrh	w0, [x0, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2399
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x1, .LANCHOR83
-	ldr	x1, [x1, #:lo12:.LANCHOR83]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cbz	w2, .L2399
-	strh	wzr, [x1, x0]
-	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	cbnz	w0, .L2622
+.L2579:
+	adrp	x0, .LANCHOR241
+	ldrh	w0, [x0, #:lo12:.LANCHOR241]
+	cbnz	w0, .L2580
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	adrp	x20, .LANCHOR84
+	add	x0, x19, :lo12:.LANCHOR204
+	ldr	x3, [x20, #:lo12:.LANCHOR84]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w4, [x3, x2]
+	cbz	w4, .L2580
+	adrp	x2, .LANCHOR242
+	mov	w3, 0
+	ldrh	w5, [x2, #:lo12:.LANCHOR242]
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+	ldrh	w1, [x19, #:lo12:.LANCHOR204]
+	ldr	x0, [x20, #:lo12:.LANCHOR84]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19, #:lo12:.LANCHOR204]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2399:
+.L2580:
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2397:
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	strh	w0, [x19, #:lo12:.LANCHOR204]
+.L2578:
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 2
-	bhi	.L2400
+	bhi	.L2581
 	ldr	x0, [x29, 128]
-	ldrh	w20, [x0, #:lo12:.LANCHOR52]
-	b	.L2371
-.L2400:
-	str	wzr, [x21, #:lo12:.LANCHOR168]
+	ldrh	w20, [x0, #:lo12:.LANCHOR53]
+	b	.L2552
+.L2581:
+	str	wzr, [x21, #:lo12:.LANCHOR171]
 	add	w0, w0, 1
-	b	.L2349
-.L2401:
+	b	.L2530
+.L2582:
 	mov	w0, 0
 	ret
-.L2403:
+.L2584:
 	mov	w0, 0
-	b	.L2349
+	b	.L2530
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -16630,65 +18183,65 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC51
-	add	x1, x1, :lo12:.LC51
+	adrp	x1, .LC67
+	add	x1, x1, :lo12:.LC67
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR223
+	adrp	x19, .LANCHOR231
 	mov	x20, x0
 	mov	w0, -1
-	str	w0, [x19, #:lo12:.LANCHOR223]
-	adrp	x0, .LANCHOR239
-	str	wzr, [x0, #:lo12:.LANCHOR239]
-	adrp	x0, .LANCHOR76
-	str	wzr, [x0, #:lo12:.LANCHOR76]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	str	w0, [x19, #:lo12:.LANCHOR231]
+	adrp	x0, .LANCHOR244
+	str	wzr, [x0, #:lo12:.LANCHOR244]
+	adrp	x0, .LANCHOR77
+	str	wzr, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	bl	printf
 	mov	x0, x20
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR38
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR39
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2443
-	adrp	x1, .LANCHOR240
-	adrp	x0, .LC52
-	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC52
-.L2451:
+	cbz	w0, .L2624
+	adrp	x1, .LANCHOR245
+	adrp	x0, .LC68
+	add	x1, x1, :lo12:.LANCHOR245
+	add	x0, x0, :lo12:.LC68
+.L2632:
 	bl	printf
-.L2444:
+.L2625:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2443:
+.L2624:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2445
-	adrp	x1, .LANCHOR240
-	adrp	x0, .LC53
-	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC53
-	b	.L2451
-.L2445:
+	cbz	w0, .L2626
+	adrp	x1, .LANCHOR245
+	adrp	x0, .LC69
+	add	x1, x1, :lo12:.LANCHOR245
+	add	x0, x0, :lo12:.LC69
+	b	.L2632
+.L2626:
 	mov	w1, 1
-	str	w1, [x19, #:lo12:.LANCHOR223]
+	str	w1, [x19, #:lo12:.LANCHOR231]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR88
-	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
 	cmp	w0, 15
-	bhi	.L2444
+	bhi	.L2625
 	mov	w19, 1024
-.L2447:
+.L2628:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2447
-	b	.L2444
+	bne	.L2628
+	b	.L2625
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -16700,14 +18253,15 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2453
+	cbnz	w0, .L2634
 	adrp	x0, .LANCHOR15
 	add	x0, x0, :lo12:.LANCHOR15
 	bl	FtlInit
-.L2453:
+.L2634:
+	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -16721,108 +18275,108 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2470
+	cbz	w0, .L2651
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
-	adrp	x25, .LANCHOR229
+	adrp	x25, .LANCHOR235
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR83
-	ldrh	w23, [x25, #:lo12:.LANCHOR229]
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	adrp	x21, .LANCHOR84
+	ldrh	w23, [x25, #:lo12:.LANCHOR235]
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC55
+	adrp	x19, .LC71
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC55
+	add	x0, x19, :lo12:.LC71
 	bl	printf
-	adrp	x0, .LANCHOR91
-	add	x6, x0, :lo12:.LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR92
-	add	x20, x0, :lo12:.LANCHOR92
+	add	x11, x0, :lo12:.LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	bl	FtlGcRefreshBlock
-	mov	x0, x6
+	adrp	x0, .LANCHOR93
+	add	x20, x0, :lo12:.LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	bl	FtlGcRefreshBlock
+	mov	x0, x11
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2457:
+.L2638:
 	subs	w20, w20, #1
-	beq	.L2461
+	beq	.L2642
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2457
-.L2461:
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	cbnz	w0, .L2638
+.L2642:
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC55
+	add	x0, x19, :lo12:.LC71
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2459
+	cbnz	w19, .L2640
 	add	x20, x29, 128
-	adrp	x22, .LANCHOR77
+	adrp	x22, .LANCHOR78
 	strh	w23, [x20, -48]!
 	mov	x0, x20
 	bl	make_superblock
-	adrp	x0, .LANCHOR37
-	ldr	x4, [x22, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR38
+	ldr	x4, [x22, #:lo12:.LANCHOR78]
 	add	x20, x20, 16
 	mov	w5, 65535
-	ldrh	w3, [x0, #:lo12:.LANCHOR37]
+	ldrh	w3, [x0, #:lo12:.LANCHOR38]
 	mov	w6, 56
 	mov	w0, 0
-.L2462:
+.L2643:
 	cmp	w0, w3
-	bne	.L2464
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	bne	.L2645
+	ldr	x0, [x21, #:lo12:.LANCHOR84]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR77]
+	ldr	x0, [x22, #:lo12:.LANCHOR78]
 	mov	w2, w19
 	mov	w1, 0
 	bl	FlashEraseBlocks
-	ldr	x0, [x22, #:lo12:.LANCHOR77]
+	ldr	x0, [x22, #:lo12:.LANCHOR78]
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2459:
+.L2640:
 	mov	w0, -1
-	strh	w0, [x25, #:lo12:.LANCHOR229]
+	strh	w0, [x25, #:lo12:.LANCHOR235]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2464:
+.L2645:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2463
+	beq	.L2644
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2463:
+.L2644:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2462
-.L2470:
+	b	.L2643
+.L2651:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -16830,301 +18384,336 @@ ftl_fix_nand_power_lost_error:
 	.global	ftl_read
 	.type	ftl_read, %function
 ftl_read:
-	stp	x29, x30, [sp, -176]!
+	sub	sp, sp, #208
 	and	w0, w0, 255
 	cmp	w0, 16
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
 	mov	w19, w1
-	stp	x23, x24, [sp, 48]
+	stp	x23, x24, [sp, 64]
 	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	mov	w26, w2
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	bne	.L2474
+	stp	x27, x28, [sp, 96]
+	mov	w27, w2
+	stp	x21, x22, [sp, 48]
+	stp	x25, x26, [sp, 80]
+	bne	.L2655
 	mov	x2, x3
-	mov	w1, w26
+	mov	w1, w27
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2473:
+.L2654:
 	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 208
 	ret
-.L2474:
+.L2655:
 	add	w0, w1, w2
-	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR68
+	str	w0, [x29, 148]
+	adrp	x0, .LANCHOR69
 	add	w1, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w1, w0
-	bhi	.L2496
-	adrp	x0, .LANCHOR223
-	ldr	w21, [x0, #:lo12:.LANCHOR223]
+	bhi	.L2678
+	adrp	x0, .LANCHOR231
+	ldr	w21, [x0, #:lo12:.LANCHOR231]
 	cmn	w21, #1
-	beq	.L2473
-	adrp	x22, .LANCHOR55
+	beq	.L2654
+	adrp	x22, .LANCHOR56
 	bl	FtlCacheWriteBack
-	mov	w25, 0
+	adrp	x25, .LANCHOR138
+	add	x25, x25, :lo12:.LANCHOR138
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	mov	w24, 0
 	mov	w21, 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	adrp	x27, .LANCHOR177
-	stp	wzr, wzr, [x29, 144]
+	adrp	x26, .LANCHOR180
+	stp	wzr, wzr, [x29, 156]
 	udiv	w1, w19, w0
-	str	w1, [x29, 152]
-	add	w1, w19, w26
-	sub	w24, w1, #1
-	adrp	x1, .LANCHOR163
-	ldr	w20, [x29, 152]
-	udiv	w24, w24, w0
-	ldr	w0, [x29, 152]
-	sub	w0, w24, w0
+	str	w1, [x29, 168]
+	add	w1, w19, w27
+	sub	w1, w1, #1
+	ldr	w20, [x29, 168]
+	udiv	w0, w1, w0
+	ldr	w1, [x29, 168]
+	str	w0, [x29, 164]
+	sub	w0, w0, w1
 	add	w0, w0, 1
-	str	w0, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR163]
-	ldr	w2, [x29, 156]
+	adrp	x1, .LANCHOR166
+	str	w0, [x29, 172]
+	ldr	w0, [x1, #:lo12:.LANCHOR166]
+	ldr	w2, [x29, 172]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR163]
-.L2476:
-	ldr	w0, [x29, 156]
-	cbnz	w0, .L2495
-	adrp	x0, .LANCHOR114
-	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2473
+	str	w0, [x1, #:lo12:.LANCHOR166]
+.L2657:
+	ldr	w0, [x29, 172]
+	cbnz	w0, .L2677
+	adrp	x0, .LANCHOR117
+	ldrh	w0, [x0, #:lo12:.LANCHOR117]
+	cbz	w0, .L2654
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2473
-.L2495:
-	add	x1, x29, 172
+	b	.L2654
+.L2677:
+	add	x1, x29, 188
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-	ldr	w1, [x29, 172]
+	ldr	w1, [x29, 188]
 	cmn	w1, #1
-	bne	.L2477
-	add	x3, x22, :lo12:.LANCHOR55
+	bne	.L2658
+	add	x3, x22, :lo12:.LANCHOR56
 	mov	w28, 0
-.L2478:
+.L2659:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2480
-.L2481:
-	ldr	w0, [x29, 156]
+	bcc	.L2661
+.L2662:
+	ldr	w0, [x29, 172]
 	add	w20, w20, 1
 	subs	w0, w0, #1
-	str	w0, [x29, 156]
-	beq	.L2485
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
-	cmp	w25, w0, lsl 2
-	bne	.L2476
-.L2485:
-	cbz	w25, .L2476
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
-	mov	w1, w25
+	str	w0, [x29, 172]
+	beq	.L2666
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w24, w0, lsl 2
+	bne	.L2657
+.L2666:
+	cbz	w24, .L2657
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	mov	w1, w24
 	mov	w2, 0
+	adrp	x28, .LANCHOR187
 	bl	FlashReadPages
-	ldr	w0, [x29, 144]
+	ldr	w0, [x29, 156]
 	lsl	w0, w0, 9
-	str	w0, [x29, 120]
-	ldr	w0, [x29, 140]
+	str	w0, [x29, 132]
+	ldr	w0, [x29, 152]
 	lsl	w0, w0, 9
-	str	x0, [x29, 128]
-	ldr	w0, [x29, 148]
+	str	x0, [x29, 136]
+	ldr	w0, [x29, 160]
 	lsl	w0, w0, 9
-	str	w0, [x29, 124]
+	str	w0, [x29, 144]
 	mov	w0, 56
-	umull	x0, w25, w0
-	mov	x25, 0
-	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR135
-	add	x28, x0, :lo12:.LANCHOR135
-.L2494:
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
-	ldr	w2, [x29, 152]
-	add	x0, x0, x25
+	umull	x0, w24, w0
+	mov	x24, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
+	str	x0, [x29, 112]
+.L2676:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	ldr	w2, [x29, 168]
+	add	x0, x0, x24
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2487
+	bne	.L2668
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR183
-	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR186
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
 	cmp	x1, x0
-	bne	.L2488
-	ldr	x0, [x29, 128]
-	ldr	w2, [x29, 124]
+	bne	.L2669
+	ldr	x0, [x29, 136]
+	ldr	w2, [x29, 144]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2511:
+.L2693:
 	bl	ftl_memcpy
-.L2488:
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
-	add	x1, x0, x25
-	ldr	w0, [x0, x25]
+.L2669:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	add	x0, x0, x24
+	ldr	x2, [x0, 16]
+	ldr	w1, [x0, 24]
+	ldr	w3, [x2, 8]
+	cmp	w1, w3
+	beq	.L2670
+	ldr	w3, [x25, 72]
+	add	w3, w3, 1
+	str	w3, [x25, 72]
+	ldr	x3, [x0, 8]
+	ldr	w4, [x3, 4]
+	str	w4, [sp]
+	ldp	w4, w5, [x2, 4]
+	ldr	w6, [x2, 12]
+	ldr	w7, [x3]
+	ldr	w3, [x2]
+	ldr	w2, [x0, 4]
+	ldr	x0, [x29, 112]
+	bl	printf
+.L2670:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
+	add	x1, x0, x24
+	ldr	w0, [x0, x24]
 	cmn	w0, #1
-	bne	.L2489
-	ldr	w1, [x28, 72]
+	bne	.L2671
+	ldr	w1, [x25, 72]
 	mov	w21, w0
 	add	w1, w1, 1
-	str	w1, [x28, 72]
-.L2490:
-	ldr	x0, [x29, 104]
-	add	x25, x25, 56
-	cmp	x0, x25
-	bne	.L2494
-	mov	w25, 0
-	b	.L2476
-.L2480:
+	str	w1, [x25, 72]
+.L2672:
+	ldr	x0, [x29, 120]
+	add	x24, x24, 56
+	cmp	x0, x24
+	bne	.L2676
+	mov	w24, 0
+	b	.L2657
+.L2661:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2479
-	ldr	w1, [x29, 136]
+	bhi	.L2660
+	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bls	.L2479
+	bls	.L2660
 	sub	w0, w0, w19
-	str	x3, [x29, 128]
+	str	x3, [x29, 136]
 	lsl	w0, w0, 9
 	mov	w2, 512
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-	ldr	x3, [x29, 128]
-.L2479:
+	ldr	x3, [x29, 136]
+.L2660:
 	add	w28, w28, 1
-	b	.L2478
-.L2477:
-	ldr	x0, [x27, #:lo12:.LANCHOR177]
+	b	.L2659
+.L2658:
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	mov	w2, 56
-	umaddl	x0, w25, w2, x0
+	umaddl	x0, w24, w2, x0
 	str	w1, [x0, 4]
-	ldr	w1, [x29, 152]
+	ldr	w1, [x29, 168]
 	cmp	w20, w1
-	bne	.L2482
-	adrp	x1, .LANCHOR183
-	ldr	x1, [x1, #:lo12:.LANCHOR183]
+	bne	.L2663
+	adrp	x1, .LANCHOR186
+	ldr	x1, [x1, #:lo12:.LANCHOR186]
 	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	ldrh	w1, [x22, #:lo12:.LANCHOR56]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
-	str	w2, [x29, 140]
+	str	w2, [x29, 152]
 	sub	w2, w1, w2
-	cmp	w26, w2
-	csel	w2, w26, w2, ls
-	str	w2, [x29, 148]
+	cmp	w27, w2
+	csel	w2, w27, w2, ls
+	str	w2, [x29, 160]
 	cmp	w1, w2
-	bne	.L2483
+	bne	.L2664
 	str	x23, [x0, 8]
-.L2483:
-	adrp	x1, .LANCHOR58
-	adrp	x2, .LANCHOR186
+.L2664:
+	adrp	x1, .LANCHOR59
+	adrp	x2, .LANCHOR189
 	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
-	ldr	x2, [x2, #:lo12:.LANCHOR186]
-	mul	w1, w1, w25
-	add	w25, w25, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR59]
+	ldr	x2, [x2, #:lo12:.LANCHOR189]
+	mul	w1, w1, w24
+	add	w24, w24, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2481
-.L2482:
-	cmp	w20, w24
-	bne	.L2484
-	ldrh	w2, [x22, #:lo12:.LANCHOR55]
-	adrp	x1, .LANCHOR184
-	ldr	w3, [x29, 136]
-	ldr	x1, [x1, #:lo12:.LANCHOR184]
+	b	.L2662
+.L2663:
+	ldr	w1, [x29, 164]
+	cmp	w20, w1
+	bne	.L2665
+	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR187
+	ldr	w3, [x29, 148]
+	ldr	x1, [x1, #:lo12:.LANCHOR187]
 	str	x1, [x0, 8]
 	mul	w1, w20, w2
 	sub	w3, w3, w1
-	str	w3, [x29, 144]
+	str	w3, [x29, 156]
 	cmp	w2, w3
-	bne	.L2483
-.L2510:
+	bne	.L2664
+.L2692:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2483
-.L2484:
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	b	.L2664
+.L2665:
+	ldrh	w1, [x22, #:lo12:.LANCHOR56]
 	mul	w1, w1, w20
-	b	.L2510
-.L2487:
-	cmp	w24, w1
-	bne	.L2488
+	b	.L2692
+.L2668:
+	ldr	w2, [x29, 164]
+	cmp	w2, w1
+	bne	.L2669
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR184
-	ldr	x0, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x28, #:lo12:.LANCHOR187]
 	cmp	x1, x0
-	bne	.L2488
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	ldr	w2, [x29, 120]
-	mul	w0, w0, w24
+	bne	.L2669
+	ldrh	w0, [x22, #:lo12:.LANCHOR56]
+	mul	w0, w0, w2
+	ldr	w2, [x29, 132]
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2511
-.L2489:
+	b	.L2693
+.L2671:
 	cmp	w0, 256
-	bne	.L2490
+	bne	.L2672
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	and	w1, w0, 65535
-	str	w1, [x29, 116]
+	str	w1, [x29, 128]
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
-.L2492:
+	adrp	x3, .LANCHOR204
+.L2674:
 	subs	w2, w2, #1
-	bne	.L2491
-.L2493:
+	bne	.L2673
+.L2675:
 	bl	FtlSysFlush
-	b	.L2490
-.L2491:
+	b	.L2672
+.L2673:
 	mov	w1, 1
-	str	w2, [x29, 112]
+	str	x3, [x29, 96]
 	mov	w0, w1
+	str	w2, [x29, 108]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR201
-	ldp	w2, w1, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+	ldr	x3, [x29, 96]
+	ldr	w1, [x29, 128]
+	ldr	w2, [x29, 108]
+	ldrh	w0, [x3, #:lo12:.LANCHOR204]
 	cmp	w0, w1
-	beq	.L2492
-	b	.L2493
-.L2496:
+	beq	.L2674
+	b	.L2675
+.L2678:
 	mov	w21, -1
-	b	.L2473
+	b	.L2654
 	.size	ftl_read, .-ftl_read
-	.section	.text.ftl_write,"ax",@progbits
+	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
-	.global	ftl_write
-	.type	ftl_write, %function
-ftl_write:
+	.global	FtlWrite
+	.type	FtlWrite, %function
+FtlWrite:
 	stp	x29, x30, [sp, -240]!
-	and	w0, w0, 255
-	cmp	w0, 16
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w2
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
+	mov	w21, w1
+	adrp	x1, .LANCHOR77
 	stp	x19, x20, [sp, 16]
-	mov	w22, w1
 	stp	x23, x24, [sp, 48]
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bne	.L2513
+	cbnz	w1, .L2726
+	and	w0, w0, 255
+	mov	w23, w2
+	mov	x24, x3
+	cmp	w0, 16
+	bne	.L2696
 	mov	x2, x3
-	mov	w1, w25
-	add	w0, w22, 256
+	mov	w1, w23
+	add	w0, w21, 256
 	bl	FtlVendorPartWrite
-.L2512:
+.L2694:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17132,172 +18721,188 @@ ftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2513:
-	adrp	x0, .LANCHOR68
-	add	w2, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+.L2696:
+	adrp	x0, .LANCHOR69
+	add	w2, w21, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	cmp	w2, w0
-	bhi	.L2547
-	adrp	x0, .LANCHOR223
-	ldr	w0, [x0, #:lo12:.LANCHOR223]
+	bhi	.L2727
+	adrp	x0, .LANCHOR231
+	ldr	w0, [x0, #:lo12:.LANCHOR231]
 	cmn	w0, #1
-	beq	.L2512
-	adrp	x0, .LANCHOR241
-	adrp	x3, .LANCHOR55
+	beq	.L2694
+	adrp	x0, .LANCHOR246
+	adrp	x26, .LANCHOR56
 	mov	w1, 2048
 	sub	w2, w2, #1
-	str	w1, [x0, #:lo12:.LANCHOR241]
-	ldrh	w1, [x3, #:lo12:.LANCHOR55]
-	str	x3, [x29, 160]
+	str	w1, [x0, #:lo12:.LANCHOR246]
+	ldrh	w1, [x26, #:lo12:.LANCHOR56]
+	str	x26, [x29, 160]
 	udiv	w0, w2, w1
-	adrp	x2, .LANCHOR159
-	udiv	w21, w22, w1
+	adrp	x2, .LANCHOR162
+	udiv	w20, w21, w1
 	str	w0, [x29, 152]
-	sub	w23, w0, w21
-	ldr	w0, [x2, #:lo12:.LANCHOR159]
-	add	w24, w23, 1
-	add	w0, w0, w24
-	str	w0, [x2, #:lo12:.LANCHOR159]
-	adrp	x0, .LANCHOR129
-	str	x0, [x29, 120]
-	ldr	x2, [x0, #:lo12:.LANCHOR129]
-	cbz	x2, .L2515
+	sub	w27, w0, w20
+	ldr	w0, [x2, #:lo12:.LANCHOR162]
+	add	w25, w27, 1
+	add	w0, w0, w25
+	str	w0, [x2, #:lo12:.LANCHOR162]
+	adrp	x0, .LANCHOR132
+	ldr	x2, [x0, #:lo12:.LANCHOR132]
+	cbz	x2, .L2698
 	ldr	w0, [x2, 24]
-	cmp	w21, w0
-	beq	.L2516
+	cmp	w20, w0
+	beq	.L2699
 	bl	FtlCacheWriteBack
-.L2515:
-	adrp	x0, .LANCHOR91
-	mov	w19, w21
-	add	x23, x0, :lo12:.LANCHOR91
-.L2517:
-	cbz	w24, .L2546
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
-	adrp	x1, .LANCHOR37
-	str	x1, [x29, 112]
+.L2698:
+	adrp	x0, .LANCHOR92
+	mov	w19, w20
+	add	x22, x0, :lo12:.LANCHOR92
+.L2700:
+	cbnz	w25, .L2725
+	ldr	w0, [x29, 152]
+	sub	w1, w0, w20
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.L2726:
+	mov	w0, 0
+	b	.L2694
+.L2699:
+	adrp	x3, .LANCHOR164
+	ldr	w0, [x3, #:lo12:.LANCHOR164]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR164]
+	msub	w0, w20, w1, w21
+	ldr	x3, [x2, 8]
+	sub	w1, w1, w0
+	cmp	w23, w1
+	lsl	w0, w0, 9
+	csel	w19, w23, w1, ls
+	add	x0, x3, x0
+	lsl	w22, w19, 9
+	mov	x1, x24
+	mov	w2, w22
+	bl	ftl_memcpy
+	cbz	w27, .L2726
+	sub	w23, w23, w19
+	add	w21, w21, w19
+	add	x24, x24, x22
+	add	w20, w20, 1
+	bl	FtlCacheWriteBack
+	mov	w25, w27
+	b	.L2698
+.L2725:
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x1, .LANCHOR38
+	str	x1, [x29, 120]
 	ldrb	w2, [x0, 6]
-	ldrh	w0, [x1, #:lo12:.LANCHOR37]
+	ldrh	w0, [x1, #:lo12:.LANCHOR38]
 	cmp	w2, w0
-	bcc	.L2518
-	mov	w2, 1644
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	bcc	.L2701
+	mov	w2, 1668
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2518:
-	ldrh	w0, [x23, 4]
-	cbnz	w0, .L2519
+.L2701:
+	ldrh	w0, [x22, 4]
+	cbnz	w0, .L2702
 	bl	FtlCacheWriteBack
-	mov	x0, x23
+	mov	x0, x22
 	bl	allocate_new_data_superblock
-.L2519:
-	ldrb	w0, [x23, 7]
-	ldrh	w1, [x23, 4]
+.L2702:
+	ldrb	w0, [x22, 7]
+	ldrh	w1, [x22, 4]
 	lsl	w0, w0, 2
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
-	ldrb	w1, [x23, 6]
-	cmp	w0, w24
-	csel	w0, w0, w24, ls
+	ldrb	w1, [x22, 6]
+	cmp	w0, w25
+	csel	w0, w0, w25, ls
 	str	w0, [x29, 144]
-	ldr	x0, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2520
-	mov	w2, 1677
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	bcc	.L2703
+	mov	w2, 1701
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2520:
+.L2703:
+	adrp	x0, .LANCHOR59
+	add	x0, x0, :lo12:.LANCHOR59
+	str	xzr, [x29, 168]
+	str	x0, [x29, 112]
 	adrp	x0, .LANCHOR58
-	adrp	x28, .LANCHOR179
 	add	x0, x0, :lo12:.LANCHOR58
-	str	xzr, [x29, 168]
 	str	x0, [x29, 104]
-.L2521:
+.L2704:
 	ldr	w1, [x29, 144]
+	adrp	x28, .LANCHOR182
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2542
+	bcc	.L2723
 	mov	x27, x1
-.L2522:
-	ldr	x0, [x29, 120]
-	ldr	x0, [x0, #:lo12:.LANCHOR129]
-	cbz	x0, .L2543
-	sub	w24, w24, #1
-	subs	w27, w27, #1
-	bne	.L2543
-.L2546:
-	ldr	w0, [x29, 152]
-	sub	w1, w0, w21
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.L2549:
-	mov	w0, 0
-	b	.L2512
-.L2516:
-	adrp	x3, .LANCHOR161
-	ldr	w0, [x3, #:lo12:.LANCHOR161]
-	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR161]
-	msub	w0, w21, w1, w22
-	ldr	x3, [x2, 8]
-	sub	w1, w1, w0
-	cmp	w25, w1
-	lsl	w0, w0, 9
-	csel	w19, w25, w1, ls
-	add	x0, x3, x0
-	lsl	w20, w19, 9
-	mov	x1, x26
-	mov	w2, w20
-	bl	ftl_memcpy
-	cbz	w23, .L2549
-	sub	w25, w25, w19
-	add	w22, w22, w19
-	add	x26, x26, x20
-	add	w21, w21, 1
-	bl	FtlCacheWriteBack
-	mov	w24, w23
-	b	.L2515
-.L2542:
-	ldrh	w0, [x23, 4]
-	cbz	w0, .L2522
+.L2705:
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	mov	x3, x22
+	mov	w2, 0
+	mov	w1, w27
+	bl	FtlProgPages
+	cmp	w25, w27
+	bcs	.L2724
+	mov	w2, 1790
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2724:
+	sub	w25, w25, w27
+	b	.L2700
+.L2723:
+	ldrh	w0, [x22, 4]
+	cbz	w0, .L2705
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
 	bl	log2phys
-	mov	x0, x23
-	mov	x20, 56
+	mov	x0, x22
 	bl	get_new_active_ppa
 	ldr	x1, [x29, 168]
-	mul	x20, x1, x20
-	adrp	x1, .LANCHOR179
-	ldr	x1, [x1, #:lo12:.LANCHOR179]
-	add	x1, x1, x20
+	mov	x3, 56
+	mul	x26, x1, x3
+	ldr	x1, [x28, #:lo12:.LANCHOR182]
+	add	x1, x1, x26
 	str	w0, [x1, 4]
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	str	w19, [x1, 24]
 	ldrh	w2, [x0]
 	mul	w27, w27, w2
 	and	x0, x27, 4294967292
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR186
+	adrp	x0, .LANCHOR189
 	ldr	x3, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	ldr	x0, [x0, #:lo12:.LANCHOR189]
 	str	x0, [x29, 128]
 	add	x27, x0, x3
 	str	x27, [x1, 16]
@@ -17305,102 +18910,102 @@ ftl_write:
 	mov	w1, 0
 	bl	ftl_memset
 	ldr	w0, [x29, 152]
-	cmp	w19, w21
-	ccmp	w19, w0, 4, ne
-	bne	.L2523
-	cmp	w19, w21
-	bne	.L2524
+	cmp	w19, w20
+	ccmp	w0, w19, 4, ne
+	bne	.L2706
+	cmp	w19, w20
+	bne	.L2707
 	ldr	x0, [x29, 160]
-	ldrh	w2, [x0, #:lo12:.LANCHOR55]
-	udiv	w0, w22, w2
-	msub	w0, w0, w2, w22
+	ldrh	w2, [x0, #:lo12:.LANCHOR56]
+	udiv	w0, w21, w2
+	msub	w0, w0, w2, w21
 	str	w0, [x29, 148]
 	sub	w2, w2, w0
-	cmp	w2, w25
-	csel	w0, w2, w25, ls
+	cmp	w2, w23
+	csel	w0, w2, w23, ls
 	str	w0, [x29, 156]
-.L2525:
+.L2708:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
-	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	cmp	w1, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	bne	.L2526
-	add	x20, x0, x20
-	cmp	w19, w21
-	bne	.L2527
-	str	x26, [x20, 8]
-.L2528:
-	ldr	x0, [x29, 112]
-	ldrb	w1, [x23, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	cmp	w0, w1
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	bne	.L2709
+	add	x3, x0, x26
+	cmp	w19, w20
+	bne	.L2710
+	str	x24, [x3, 8]
+.L2711:
+	ldr	x0, [x29, 120]
+	ldrb	w1, [x22, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	cmp	w1, w0
-	bcc	.L2539
-	mov	w2, 1751
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	bcc	.L2720
+	mov	w2, 1775
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L2539:
+.L2720:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR157
-	ldr	w0, [x1, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR160
+	ldr	w0, [x1, #:lo12:.LANCHOR160]
 	stp	w0, w19, [x27, 4]
 	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR157]
+	str	w0, [x1, #:lo12:.LANCHOR160]
 	ldr	w0, [x29, 180]
 	str	w0, [x27, 12]
-	ldrh	w0, [x23]
+	ldrh	w0, [x22]
 	strh	w0, [x27, 2]
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2521
-.L2524:
+	b	.L2704
+.L2707:
 	ldr	x0, [x29, 160]
-	add	w2, w22, w25
+	add	w2, w21, w23
 	str	wzr, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR55]
+	ldrh	w0, [x0, #:lo12:.LANCHOR56]
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2525
-.L2527:
+	b	.L2708
+.L2710:
 	ldr	w0, [x29, 156]
-.L2564:
+.L2738:
 	mul	w0, w0, w19
-	sub	w0, w0, w22
+	sub	w0, w0, w21
 	lsl	w0, w0, 9
-	add	x0, x26, x0
-	str	x0, [x20, 8]
-	b	.L2528
-.L2526:
-	add	x0, x0, x20
-	cmp	w19, w21
-	bne	.L2529
-	adrp	x1, .LANCHOR183
-	ldr	x1, [x1, #:lo12:.LANCHOR183]
-.L2563:
+	add	x0, x24, x0
+	str	x0, [x3, 8]
+	b	.L2711
+.L2709:
+	add	x0, x0, x26
+	cmp	w19, w20
+	bne	.L2712
+	adrp	x1, .LANCHOR186
+	ldr	x1, [x1, #:lo12:.LANCHOR186]
+.L2737:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2531
+	beq	.L2714
 	str	w0, [x29, 188]
 	mov	w2, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	str	w19, [x29, 208]
-	add	x0, x0, x20
+	add	x0, x0, x26
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 192]
 	mov	w1, 1
@@ -17408,806 +19013,550 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2532
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	bne	.L2715
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2535:
+.L2718:
 	ldr	w0, [x29, 156]
-	cmp	w19, w21
+	cmp	w19, w20
 	lsl	w2, w0, 9
-	bne	.L2536
-	ldr	x1, [x28, #:lo12:.LANCHOR179]
+	bne	.L2719
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	mov	x1, x24
+	add	x3, x0, x26
 	ldr	w0, [x29, 148]
-	add	x1, x1, x20
+	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
-	ldr	x4, [x1, 8]
-	mov	x1, x26
-	add	x0, x4, x0
+	add	x0, x3, x0
+.L2739:
 	bl	ftl_memcpy
-	ldr	w0, [x29, 152]
-	cmp	w19, w0
-	bne	.L2528
-.L2537:
-	ldrh	w0, [x23, 4]
-	cbz	w0, .L2528
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	add	x20, x0, x20
-	ldr	x0, [x29, 120]
-	str	x20, [x0, #:lo12:.LANCHOR129]
-	adrp	x0, .LANCHOR221
-	str	x23, [x0, #:lo12:.LANCHOR221]
-	b	.L2528
-.L2529:
-	adrp	x1, .LANCHOR184
-	ldr	x1, [x1, #:lo12:.LANCHOR184]
-	b	.L2563
-.L2532:
+	b	.L2711
+.L2712:
+	adrp	x1, .LANCHOR187
+	ldr	x1, [x1, #:lo12:.LANCHOR187]
+	b	.L2737
+.L2715:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2534
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	beq	.L2717
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC57
+	adrp	x0, .LC73
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC57
+	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2534:
+.L2717:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2535
-	mov	w2, 1730
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
+	beq	.L2718
+	mov	w2, 1754
+	adrp	x1, .LANCHOR247
+	adrp	x0, .LC5
+	add	x1, x1, :lo12:.LANCHOR247
+	add	x0, x0, :lo12:.LC5
 	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
 	bl	printf
-	b	.L2535
-.L2531:
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	adrp	x1, .LANCHOR57
-	add	x0, x0, x20
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	b	.L2718
+.L2714:
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	ldr	x1, [x29, 104]
+	add	x0, x0, x26
+	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2535
-.L2536:
+	b	.L2718
+.L2719:
 	ldr	x0, [x29, 160]
-	ldrh	w1, [x0, #:lo12:.LANCHOR55]
-	ldr	x0, [x28, #:lo12:.LANCHOR179]
-	add	x0, x0, x20
+	ldrh	w1, [x0, #:lo12:.LANCHOR56]
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	add	x3, x0, x26
 	mul	w1, w1, w19
-	ldr	x0, [x0, 8]
-	sub	w1, w1, w22
+	sub	w1, w1, w21
+	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
-	add	x1, x26, x1
-	bl	ftl_memcpy
-	b	.L2537
-.L2523:
-	adrp	x0, .LANCHOR179
-	ldr	x0, [x0, #:lo12:.LANCHOR179]
-	add	x20, x0, x20
+	add	x1, x24, x1
+	b	.L2739
+.L2706:
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	add	x3, x0, x26
 	ldr	x0, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR55]
-	b	.L2564
-.L2543:
-	adrp	x0, .LANCHOR179
-	mov	x3, x23
-	mov	w2, 0
-	mov	w1, w27
-	ldr	x0, [x0, #:lo12:.LANCHOR179]
-	bl	FtlProgPages
-	cmp	w24, w27
-	bcs	.L2544
-	mov	w2, 1766
-	adrp	x1, .LANCHOR242
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	adrp	x1, .LC7
-	adrp	x0, .LC8
-	add	x1, x1, :lo12:.LC7
-	add	x0, x0, :lo12:.LC8
-	bl	printf
-.L2544:
-	sub	w24, w24, w27
-	b	.L2517
-.L2547:
+	ldrh	w0, [x0, #:lo12:.LANCHOR56]
+	b	.L2738
+.L2727:
 	mov	w0, -1
-	b	.L2512
-	.size	ftl_write, .-ftl_write
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	b	.L2694
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",@progbits
 	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	stp	x29, x30, [sp, -160]!
-	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	mov	w25, w1
-	adrp	x1, .LANCHOR15
-	add	x1, x1, :lo12:.LANCHOR15
-	stp	x23, x24, [sp, 48]
-	mov	x23, x0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR144
-	ldrh	w0, [x1, 14]
-	mov	w24, w2
-	ldrh	w1, [x1, 12]
-	stp	x19, x20, [sp, 16]
-	str	x27, [sp, 80]
-	mov	w27, 61664
-	mul	w0, w0, w1
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
-	str	x1, [x29, 112]
-	and	w0, w0, 65535
-	adrp	x1, .LANCHOR194
-	sub	w20, w0, #1
-	sub	w19, w0, #15
-	ldr	x2, [x1, #:lo12:.LANCHOR194]
-	and	w20, w20, 65535
-	mul	w26, w0, w25
-	mov	x22, x1
-	str	x2, [x29, 120]
-.L2566:
-	cmp	w19, w20
-	ble	.L2573
-	mov	w0, -1
-.L2565:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 160
-	ret
-.L2573:
-	add	w0, w20, w26
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
 	mov	w2, 1
-	lsl	w0, w0, 10
-	mov	w1, w2
-	str	w0, [x29, 108]
-	add	x0, x29, 104
-	bl	FlashReadPages
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2567
-	ldr	x0, [x22, #:lo12:.LANCHOR194]
-	ldrh	w0, [x0]
-	cmp	w0, w27
-	bne	.L2567
-	cbz	x23, .L2574
-	cbz	w25, .L2569
-.L2572:
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
-	mov	w2, w24
-	mov	x0, x23
-	bl	ftl_memcpy
-	mov	w3, 4
-	adrp	x0, .LC58
-	mov	w2, w3
-	mov	x1, x23
-	add	x0, x0, :lo12:.LC58
-	bl	rknand_print_hex
-.L2574:
-	mov	w0, 0
-	b	.L2565
-.L2569:
-	ldr	x5, [x21, #:lo12:.LANCHOR144]
-	adrp	x2, .LANCHOR146
-	add	x2, x2, :lo12:.LANCHOR146
-	mov	w0, 0
-	mov	w6, 1
-.L2570:
-	ldr	w1, [x2]
-	cmp	w0, w1
-	bcs	.L2572
-	ubfx	x1, x0, 5, 11
-	and	w3, w0, 31
-	lsl	x1, x1, 2
-	add	w0, w0, 1
-	lsl	w4, w6, w3
-	and	w0, w0, 65535
-	ldr	w3, [x5, x1]
-	orr	w3, w3, w4
-	str	w3, [x5, x1]
-	b	.L2570
-.L2567:
-	sub	w20, w20, #1
-	and	w20, w20, 65535
-	b	.L2566
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	add	w1, w0, 256
+	mov	w0, 16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
 	.align	2
-	.global	FlashGetBadBlockList
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w1, w0
+	mov	w2, 1
+	mov	w0, 16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x20, x0
-	adrp	x0, .LANCHOR18
-	ldr	x0, [x0, #:lo12:.LANCHOR18]
-	ldrh	w19, [x0, 14]
-	str	x21, [sp, 32]
-	adrp	x21, .LANCHOR150
-	ldrb	w2, [x0, 13]
-	ldr	x0, [x21, #:lo12:.LANCHOR150]
-	mul	w19, w19, w2
-	and	w19, w19, 65535
-	add	w2, w19, 7
-	lsr	w2, w2, 3
-	bl	FlashReadFacBbtData
-	cmn	w0, #1
-	bne	.L2580
-.L2584:
-	mov	w0, 0
-.L2581:
-	ubfiz	x0, x0, 1, 16
-	mov	w1, -1
-	ldr	x21, [sp, 32]
-	strh	w1, [x20, x0]
+	mov	w19, w2
+	stp	x21, x22, [sp, 32]
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L2743
+	mov	w3, w2
 	mov	w0, 0
+	mov	x2, x20
+	bl	idb_write_data
+.L2743:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
-	ret
-.L2580:
-	ldr	x4, [x21, #:lo12:.LANCHOR150]
-	lsr	w5, w19, 4
-	sub	w19, w19, #1
-	mov	w1, 0
-	mov	w0, 0
-	mov	w6, 1
-.L2582:
-	cmp	w1, w19
-	bge	.L2581
-	ubfx	x3, x1, 5, 11
-	and	w2, w1, 31
-	lsl	w2, w6, w2
-	ldr	w3, [x4, x3, lsl 2]
-	tst	w2, w3
-	beq	.L2583
-	add	w2, w0, 1
-	ubfiz	x0, x0, 1, 16
-	strh	w1, [x20, x0]
-	and	w0, w2, 65535
-.L2583:
-	cmp	w0, w5
-	bcs	.L2584
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	b	.L2582
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.FtlMakeBbt,"ax",@progbits
+	b	FtlWrite
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlCheckVpc,"ax",@progbits
 	.align	2
-	.global	FtlMakeBbt
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
+	.global	FtlCheckVpc
+	.type	FtlCheckVpc, %function
+FtlCheckVpc:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR73
+	add	x23, x23, :lo12:.LANCHOR73
 	stp	x21, x22, [sp, 32]
-	ldr	w21, [x0, #:lo12:.LANCHOR76]
+	mov	w21, 0
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR248
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2591
-	bl	FtlBbtMemInit
-	adrp	x20, .LANCHOR74
-	add	x22, x20, :lo12:.LANCHOR74
-	bl	FtlLoadFactoryBbt
-	add	x24, x22, 32
-	adrp	x28, .LANCHOR199
-	add	x22, x22, 12
-	add	x25, x28, :lo12:.LANCHOR199
-	adrp	x0, .LANCHOR44
-	add	x0, x0, :lo12:.LANCHOR44
-	str	x0, [x29, 120]
-.L2592:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w21, w0
-	bcc	.L2598
-	adrp	x21, .LANCHOR59
-	add	x21, x21, :lo12:.LANCHOR59
-	mov	w19, 0
-.L2599:
-	ldrh	w0, [x21]
-	cmp	w0, w19
-	bhi	.L2600
-	add	x21, x20, :lo12:.LANCHOR74
-	mov	w22, 65535
-	ldrh	w19, [x21, 12]
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-.L2601:
-	ldrh	w0, [x21, 12]
-	sub	w0, w0, #47
-	cmp	w0, w19
-	bgt	.L2605
-	mov	w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L2602
-	mov	w0, w19
-	bl	FlashTestBlk
-	cbz	w0, .L2603
-	mov	w0, w19
-	bl	FtlBbmMapBadBlock
-.L2602:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L2601
-.L2598:
-	adrp	x2, .LANCHOR185
-	adrp	x0, .LANCHOR180
-	add	x19, x28, :lo12:.LANCHOR199
-	ldrh	w1, [x22]
-	ldr	x0, [x0, #:lo12:.LANCHOR180]
-	mov	w3, 65535
-	ldr	x26, [x2, #:lo12:.LANCHOR185]
-	cmp	w1, w3
-	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR50
-	str	x2, [x29, 112]
-	beq	.L2593
-	ldrh	w4, [x23, #:lo12:.LANCHOR50]
-	mov	w2, 1
-	madd	w27, w4, w21, w1
-	mov	w1, w2
-	lsl	w0, w27, 10
-	str	w0, [x19, 4]
-	mov	x0, x19
-	bl	FlashReadPages
-	ldr	x1, [x19, 8]
-	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR50]
-	add	w2, w2, 7
-	lsr	w2, w2, 3
-	bl	ftl_memcpy
-.L2594:
-	mov	w0, w27
-	add	w21, w21, 1
-	bl	FtlBbmMapBadBlock
-	add	x24, x24, 8
-	add	x22, x22, 2
-	b	.L2592
-.L2593:
-	mov	w1, w21
-	bl	FlashGetBadBlockList
-	ldr	x0, [x19, 8]
-	adrp	x27, .LANCHOR120
-	ldr	x1, [x24]
-	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR50]
-	add	x23, x23, :lo12:.LANCHOR50
-	add	x0, x27, :lo12:.LANCHOR120
-	sub	w19, w19, #1
-	str	x0, [x29, 104]
-	and	w19, w19, 65535
-.L2595:
-	ldrh	w0, [x23]
-	madd	w0, w21, w0, w19
-	bl	FtlBbmIsBadBlock
-	cmp	w0, 1
-	beq	.L2596
-	ldr	x0, [x29, 112]
-	mov	w2, 16
-	strh	w19, [x22]
+	add	x1, x22, :lo12:.LANCHOR248
+	adrp	x20, check_valid_page_count_table
+	bl	printf
+	add	x19, x20, :lo12:check_valid_page_count_table
+	mov	x2, 8192
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	bl	ftl_memset
-	mov	w0, -3872
-	strh	w0, [x26]
-	ldrh	w4, [x23]
-	ldrh	w0, [x22]
-	strh	w0, [x26, 2]
-	ldr	x1, [x24]
-	str	wzr, [x26, 4]
-	madd	w27, w4, w21, w0
-	lsl	w0, w27, 10
-	str	w0, [x25, 4]
-	ldr	x0, [x29, 104]
-	ldrh	w2, [x0]
-	ldr	x0, [x25, 8]
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	mov	w2, 1
-	mov	x0, x25
-	mov	w1, w2
-	bl	FlashEraseBlocks
-	mov	w3, 1
-	mov	x0, x25
-	mov	w2, w3
-	mov	w1, w3
-	bl	FlashProgPages
-	ldr	w0, [x25]
-	cmn	w0, #1
-	bne	.L2594
-	mov	w0, w27
-	bl	FtlBbmMapBadBlock
-	b	.L2595
-.L2596:
-	sub	w19, w19, #1
-	and	w19, w19, 65535
-	b	.L2595
-.L2600:
-	mov	w0, w19
-	add	w19, w19, 1
-	bl	FtlBbmMapBadBlock
-	and	w19, w19, 65535
-	b	.L2599
-.L2603:
-	ldrh	w0, [x21]
-	cmp	w0, w22
-	bne	.L2604
-	strh	w19, [x21]
-	b	.L2602
-.L2604:
-	strh	w19, [x21, 4]
-.L2605:
-	adrp	x0, .LANCHOR77
-	add	x19, x20, :lo12:.LANCHOR74
-	ldrh	w1, [x20, #:lo12:.LANCHOR74]
-	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
-	str	wzr, [x19, 8]
-	lsl	w1, w1, 10
-	strh	wzr, [x19, 2]
-	str	w1, [x0, 4]
-	ldrh	w1, [x19, 4]
-	lsl	w1, w1, 10
-	str	w1, [x0, 60]
-	mov	w1, 1
-	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR74]
-	bl	FtlBbmMapBadBlock
-	ldrh	w0, [x19, 4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	strh	wzr, [x19, 2]
-	ldr	w0, [x19, 8]
-	ldrh	w1, [x19, 4]
-	add	w0, w0, 1
-	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR74]
-	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR74]
-	bl	FtlBbmTblFlush
-.L2591:
+	mov	x0, x19
+	bl	memset
+.L2746:
+	ldr	w0, [x23]
+	cmp	w21, w0
+	bcc	.L2748
+	adrp	x24, .LANCHOR40
+	adrp	x23, .LANCHOR84
+	mov	w2, 2
+	adrp	x0, .LC74
+	ldrh	w3, [x24, #:lo12:.LANCHOR40]
+	add	x0, x0, :lo12:.LC74
+	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	add	x21, x20, :lo12:check_valid_page_count_table
+	adrp	x26, .LC76
+	add	x26, x26, :lo12:.LC76
+	mov	w25, 0
+	mov	w19, 0
+	bl	rknand_print_hex
+	ldrh	w3, [x24, #:lo12:.LANCHOR40]
+	mov	w2, 2
+	mov	x1, x21
+	adrp	x0, .LC75
+	add	x24, x24, :lo12:.LANCHOR40
+	add	x0, x0, :lo12:.LC75
+	bl	rknand_print_hex
+	mov	w4, 65535
+.L2749:
+	ldrh	w0, [x24]
+	cmp	w0, w19
+	bhi	.L2751
+	adrp	x0, .LANCHOR88
+	ldr	x19, [x0, #:lo12:.LANCHOR88]
+	cbz	x19, .L2752
+	adrp	x0, .LANCHOR89
+	adrp	x26, .LC77
+	add	x20, x20, :lo12:check_valid_page_count_table
+	add	x26, x26, :lo12:.LC77
+	ldrh	w27, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR82
+	mov	x24, x0
+	mov	w21, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	mov	w28, 6
+	mov	w4, 65535
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.L2753:
+	cmp	w21, w27
+	bne	.L2755
+.L2752:
+	cbz	w25, .L2745
+	mov	w2, 1680
+	add	x1, x22, :lo12:.LANCHOR248
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	adrp	x1, .LC6
+	adrp	x0, .LC7
+	add	x1, x1, :lo12:.LC6
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L2745:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-	.size	FtlMakeBbt, .-FtlMakeBbt
-	.section	.text.FtlLowFormat,"ax",@progbits
-	.align	2
-	.global	FtlLowFormat
-	.type	FtlLowFormat, %function
-FtlLowFormat:
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
-	cbnz	w0, .L2643
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR192
-	mov	w1, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR66
-	ldr	x0, [x0, #:lo12:.LANCHOR192]
-	adrp	x20, .LANCHOR156
-	ldrh	w2, [x19, #:lo12:.LANCHOR66]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR38
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	adrp	x0, .LANCHOR128
-	ldrh	w2, [x19, #:lo12:.LANCHOR66]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR128]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	str	wzr, [x20, #:lo12:.LANCHOR156]
-	adrp	x0, .LANCHOR157
-	str	wzr, [x0, #:lo12:.LANCHOR157]
-	ldrh	w0, [x25, #:lo12:.LANCHOR38]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	w0, .L2614
-	bl	FtlMakeBbt
-.L2614:
-	adrp	x22, .LANCHOR55
+.L2748:
+	mov	w2, 0
+	add	x1, x29, 124
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 124]
+	cmn	w0, #1
+	beq	.L2747
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.L2747:
+	add	w21, w21, 1
+	b	.L2746
+.L2751:
+	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x21, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L2750
+	str	w4, [x29, 108]
+	mov	w1, w19
+	mov	x0, x26
+	bl	printf
+	ldr	x0, [x23, #:lo12:.LANCHOR84]
+	ldr	w4, [x29, 108]
+	ldrh	w0, [x0, x28]
+	cmp	w0, w4
+	beq	.L2750
+	ldrh	w1, [x21, x27, lsl 1]
+	cmp	w1, w0
+	csinc	w25, w25, wzr, ls
+.L2750:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2749
+.L2755:
+	ldr	x1, [x23, #:lo12:.LANCHOR84]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L2754
+	ldrh	w3, [x20, w19, sxtw 1]
+	mov	w1, w19
+	str	w4, [x29, 108]
+	mov	x0, x26
+	mov	w25, 1
+	bl	printf
+	ldr	w4, [x29, 108]
+.L2754:
+	umull	x19, w19, w28
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w19, [x0, x19]
+	cmp	w19, w4
+	beq	.L2752
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2753
+	.size	FtlCheckVpc, .-FtlCheckVpc
+	.section	.text.FtlDumpSysBlock,"ax",@progbits
+	.align	2
+	.global	FtlDumpSysBlock
+	.type	FtlDumpSysBlock, %function
+FtlDumpSysBlock:
+	sub	sp, sp, #112
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x25, x26, [sp, 80]
+	and	w25, w0, 65535
 	adrp	x0, .LANCHOR183
-	mov	w6, 23752
-	ldrh	w1, [x22, #:lo12:.LANCHOR55]
-	movk	w6, 0xa0f, lsl 16
-	ldr	x4, [x0, #:lo12:.LANCHOR183]
-	adrp	x0, .LANCHOR184
-	lsl	w1, w1, 7
-	ldr	x5, [x0, #:lo12:.LANCHOR184]
-	mov	w0, 0
-.L2615:
-	cmp	w0, w1
-	blt	.L2616
-	adrp	x21, .LANCHOR39
-	adrp	x19, .LANCHOR40
-	add	x26, x19, :lo12:.LANCHOR40
-	mov	w23, 0
-	ldrh	w24, [x21, #:lo12:.LANCHOR39]
-.L2617:
-	ldrh	w0, [x26]
-	cmp	w0, w24
-	bhi	.L2618
-	adrp	x24, .LANCHOR37
-	sub	w1, w23, #2
-	ldrh	w0, [x24, #:lo12:.LANCHOR37]
-	cmp	w1, w0, lsl 1
-	bgt	.L2619
-.L2623:
-	add	x26, x21, :lo12:.LANCHOR39
-	mov	w23, 0
-	mov	w25, 0
-.L2620:
-	ldrh	w0, [x26]
-	cmp	w0, w25
-	bhi	.L2624
-	adrp	x0, .LANCHOR73
-	ldrh	w1, [x19, #:lo12:.LANCHOR40]
-	ldrh	w3, [x24, #:lo12:.LANCHOR37]
-	str	w1, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR41
-	adrp	x1, .LANCHOR227
-	ldr	w2, [x0, #:lo12:.LANCHOR41]
-	adrp	x0, .LANCHOR72
-	udiv	w6, w2, w3
-	ubfx	x5, x6, 5, 16
-	str	w6, [x0, #:lo12:.LANCHOR72]
-	add	w4, w5, 36
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-	mov	w4, 24
-	mul	w4, w3, w4
-	cmp	w23, w4
-	ble	.L2625
-	sub	w2, w2, w23
-	udiv	w2, w2, w3
-	str	w2, [x0, #:lo12:.LANCHOR72]
-	lsr	w2, w2, 5
-	add	w2, w2, 24
-	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2625:
-	adrp	x2, .LANCHOR28
-	ldr	w2, [x2, #:lo12:.LANCHOR28]
-	cmp	w2, 1
-	bne	.L2626
-	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR227]
-	add	w4, w4, w2
-	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2626:
-	adrp	x2, .LANCHOR8
-	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2627
-	udiv	w4, w23, w3
-	ldrh	w2, [x1, #:lo12:.LANCHOR227]
-	add	w4, w4, w2
-	add	w4, w2, w4, asr 2
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2627:
-	adrp	x2, .LANCHOR48
-	ldrh	w2, [x2, #:lo12:.LANCHOR48]
-	cbz	w2, .L2629
-	ldrh	w4, [x1, #:lo12:.LANCHOR227]
-	add	w4, w4, w2, lsr 1
-	strh	w4, [x1, #:lo12:.LANCHOR227]
-	mul	w4, w2, w3
-	cmp	w23, w4
-	bge	.L2629
-	add	w2, w2, 32
-	str	w6, [x0, #:lo12:.LANCHOR72]
-	add	w2, w5, w2
-	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2629:
-	ldrh	w2, [x1, #:lo12:.LANCHOR227]
-	adrp	x25, .LANCHOR226
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
-	adrp	x24, .LANCHOR83
-	mov	w23, -1
-	sub	w1, w1, w2
-	mul	w3, w1, w3
-	adrp	x1, .LANCHOR52
-	str	w3, [x25, #:lo12:.LANCHOR226]
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
-	mul	w3, w1, w3
-	str	w3, [x0, #:lo12:.LANCHOR72]
-	ldrh	w0, [x22, #:lo12:.LANCHOR55]
-	mul	w3, w0, w3
-	adrp	x0, .LANCHOR68
-	str	w3, [x0, #:lo12:.LANCHOR68]
-	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR83]
-	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR40]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	adrp	x0, .LANCHOR100
-	adrp	x1, .LANCHOR201
-	ldrh	w2, [x21, #:lo12:.LANCHOR39]
-	str	wzr, [x0, #:lo12:.LANCHOR100]
-	add	x0, x1, :lo12:.LANCHOR201
-	strh	w23, [x1, #:lo12:.LANCHOR201]
-	mov	w1, 255
-	lsr	w2, w2, 3
-	strh	wzr, [x0, 2]
-	strb	wzr, [x0, 6]
-	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR91
-	add	x19, x0, :lo12:.LANCHOR91
-	strh	wzr, [x0, #:lo12:.LANCHOR91]
-	mov	w0, 1
-	strb	w0, [x19, 8]
-	adrp	x0, .LANCHOR0
-	strh	wzr, [x19, 2]
-	ldr	x0, [x0, #:lo12:.LANCHOR0]
-	strb	wzr, [x19, 6]
-	bl	ftl_memset
-.L2631:
-	mov	x0, x19
-	bl	make_superblock
-	ldrb	w1, [x19, 7]
-	ldrh	w0, [x19]
-	cbnz	w1, .L2632
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
-	ldrh	w0, [x19]
-	add	w0, w0, 1
-	strh	w0, [x19]
-	b	.L2631
-.L2616:
-	ubfiz	x3, x0, 2, 16
-	mvn	w2, w0
-	orr	w2, w0, w2, lsl 16
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	str	w2, [x4, x3]
-	str	w6, [x5, x3]
-	b	.L2615
-.L2618:
-	mov	w0, w24
-	mov	w1, 1
-	add	w24, w24, 1
-	bl	FtlLowFormatEraseBlock
-	add	w23, w23, w0
-	and	w24, w24, 65535
-	and	w23, w23, 65535
-	b	.L2617
-.L2619:
-	udiv	w0, w23, w0
-	adrp	x1, .LANCHOR65
-	ldr	w23, [x1, #:lo12:.LANCHOR65]
-	add	w0, w0, w23
-	bl	FtlSysBlkNumInit
-	ldrh	w0, [x25, #:lo12:.LANCHOR38]
-	add	x25, x19, :lo12:.LANCHOR40
-	bl	FtlFreeSysBlkQueueInit
-	ldrh	w23, [x21, #:lo12:.LANCHOR39]
-.L2621:
+	stp	x21, x22, [sp, 48]
+	adrp	x21, .LANCHOR202
+	add	x1, x21, :lo12:.LANCHOR202
+	ldr	x2, [x0, #:lo12:.LANCHOR183]
+	adrp	x22, .LANCHOR54
+	stp	x23, x24, [sp, 64]
+	lsl	w26, w25, 10
+	stp	x19, x20, [sp, 32]
+	adrp	x23, .LC78
+	str	x27, [sp, 96]
+	adrp	x24, .LC79
+	str	x2, [x1, 8]
+	adrp	x2, .LANCHOR188
+	add	x22, x22, :lo12:.LANCHOR54
+	add	x23, x23, :lo12:.LC78
+	ldr	x2, [x2, #:lo12:.LANCHOR188]
+	add	x24, x24, :lo12:.LC79
+	mov	x27, x0
+	mov	w19, 0
+	str	x2, [x1, 16]
+.L2771:
+	ldrh	w0, [x22]
+	cmp	w19, w0
+	blt	.L2773
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 112
+	ret
+.L2773:
+	add	x20, x21, :lo12:.LANCHOR202
+	orr	w0, w19, w26
+	mov	w2, 1
+	mov	w1, w2
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+	ldp	x1, x0, [x20, 8]
+	ldr	w2, [x21, #:lo12:.LANCHOR202]
+	ldr	w3, [x20, 4]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w25
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x23
+	bl	printf
+	ldr	x0, [x20, 16]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L2772
+	ldr	x1, [x27, #:lo12:.LANCHOR183]
+	mov	w3, 768
+	mov	w2, 4
+	mov	x0, x24
+	bl	rknand_print_hex
+.L2772:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L2771
+	.size	FtlDumpSysBlock, .-FtlDumpSysBlock
+	.section	.text.dump_map_info,"ax",@progbits
+	.align	2
+	.global	dump_map_info
+	.type	dump_map_info, %function
+dump_map_info:
+	sub	sp, sp, #96
+	adrp	x0, .LANCHOR40
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	ldrh	w20, [x0, #:lo12:.LANCHOR40]
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR47
+	stp	x21, x22, [sp, 48]
+	add	x23, x23, :lo12:.LANCHOR47
+	adrp	x22, .LANCHOR41
+	add	x22, x22, :lo12:.LANCHOR41
+	stp	x25, x26, [sp, 80]
+	adrp	x24, .LANCHOR38
+.L2779:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L2785
+	adrp	x25, .LANCHOR128
+	adrp	x19, .LANCHOR202
+	add	x25, x25, :lo12:.LANCHOR128
+	add	x19, x19, :lo12:.LANCHOR202
+	mov	w26, 0
+.L2786:
 	ldrh	w0, [x25]
-	cmp	w0, w23
-	bls	.L2623
-	mov	w0, w23
-	add	w23, w23, 1
-	mov	w1, 1
-	and	w23, w23, 65535
-	bl	FtlLowFormatEraseBlock
-	b	.L2621
-.L2624:
-	mov	w0, w25
-	mov	w1, 0
-	add	w25, w25, 1
-	bl	FtlLowFormatEraseBlock
-	add	w23, w23, w0
-	and	w25, w25, 65535
-	and	w23, w23, 65535
-	b	.L2620
-.L2632:
-	ldr	w1, [x20, #:lo12:.LANCHOR156]
-	ubfiz	x0, x0, 1, 16
-	str	w1, [x19, 12]
-	mov	w23, -1
-	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR156]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x19, 4]
-	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR92
-	add	x0, x2, :lo12:.LANCHOR92
-	ldrh	w1, [x19]
-	mov	x19, x0
-	add	w1, w1, 1
-	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR92]
-	mov	w1, 1
-	strb	wzr, [x0, 6]
-	strb	w1, [x0, 8]
-.L2633:
+	cmp	w26, w0
+	bge	.L2789
+	adrp	x21, .LANCHOR54
+	adrp	x0, .LC49
+	sbfiz	x23, x26, 1, 32
+	mov	w20, 0
+	add	x21, x21, :lo12:.LANCHOR54
+	add	x24, x0, :lo12:.LC49
+	b	.L2790
+.L2781:
+	ldrb	w0, [x23, x5]
+	mov	w1, w20
+	bl	V2P_block
+	and	w4, w0, 65535
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L2780
+	umaddl	x1, w19, w7, x6
+	lsl	w4, w4, 10
+	mul	w0, w19, w8
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	asr	w0, w0, 2
+	str	w4, [x1, 4]
+	add	x0, x10, x0, sxtw 2
+	stp	x11, x0, [x1, 8]
+.L2780:
+	add	x5, x5, 1
+.L2787:
+	cmp	w12, w5, uxth
+	bhi	.L2781
+	cbnz	w19, .L2782
+.L2784:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2779
+.L2782:
+	mov	w1, w19
+	mov	w2, 1
+	mov	x0, x6
+	bl	FlashReadPages
+	mov	w0, 56
+	adrp	x26, .LC80
+	add	x26, x26, :lo12:.LC80
+	mov	x25, 0
+	umull	x19, w19, w0
+.L2783:
+	ldr	x0, [x21, #:lo12:.LANCHOR180]
+	add	x0, x0, x25
+	add	x25, x25, 56
+	ldr	x1, [x0, 16]
+	ldr	w2, [x0, 4]
+	ldr	x0, [x0, 8]
+	ldr	w3, [x0, 4]
+	str	w3, [sp]
+	ldr	w7, [x0]
+	mov	x0, x26
+	ldp	w3, w4, [x1]
+	ldp	w5, w6, [x1, 8]
+	ubfx	x1, x2, 10, 16
+	bl	printf
+	cmp	x25, x19
+	bne	.L2783
+	b	.L2784
+.L2785:
+	adrp	x0, .LANCHOR105
+	adrp	x21, .LANCHOR180
+	ldrh	w12, [x24, #:lo12:.LANCHOR38]
+	mov	x5, 0
+	ldr	x11, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR106
+	ldr	x6, [x21, #:lo12:.LANCHOR180]
+	mov	w19, 0
+	ldr	x10, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR59
+	mov	w7, 56
+	ldrh	w8, [x0, #:lo12:.LANCHOR59]
+	b	.L2787
+.L2788:
+	adrp	x22, .LANCHOR129
+	mov	w2, 1
+	mov	w1, w2
+	ldr	x0, [x22, #:lo12:.LANCHOR129]
+	ldrh	w0, [x0, x23]
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x19, 4]
 	mov	x0, x19
-	bl	make_superblock
-	ldrb	w1, [x19, 7]
-	ldrh	w0, [x19]
-	cbnz	w1, .L2634
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ubfiz	x0, x0, 1, 16
-	strh	w23, [x1, x0]
-	ldrh	w0, [x19]
-	add	w0, w0, 1
-	strh	w0, [x19]
-	b	.L2633
-.L2634:
-	ldr	w1, [x20, #:lo12:.LANCHOR156]
-	ubfiz	x0, x0, 1, 16
-	str	w1, [x19, 12]
-	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR156]
-	ldr	x1, [x24, #:lo12:.LANCHOR83]
-	ldrh	w2, [x19, 4]
-	mov	w19, -1
-	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR93
-	strh	w19, [x0, #:lo12:.LANCHOR93]
-	bl	FtlFreeSysBlkQueueOut
-	adrp	x2, .LANCHOR206
-	add	x1, x2, :lo12:.LANCHOR206
-	strh	w0, [x2, #:lo12:.LANCHOR206]
-	ldr	w0, [x25, #:lo12:.LANCHOR226]
-	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR156]
-	str	w0, [x1, 8]
-	add	w0, w0, 1
-	strh	wzr, [x1, 2]
-	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR156]
-	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	w0, .L2613
-	adrp	x0, .LANCHOR223
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR223]
-.L2613:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2643:
-	mov	w0, 0
-	ret
-	.size	FtlLowFormat, .-FtlLowFormat
+	bl	FlashReadPages
+	ldp	x2, x0, [x19, 8]
+	add	w20, w20, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR129]
+	sxth	w20, w20
+	ldr	w3, [x2, 4]
+	ldrh	w1, [x1, x23]
+	str	w3, [sp, 8]
+	ldr	w2, [x2]
+	str	w2, [sp]
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x24
+	ldp	w2, w3, [x19]
+	bl	printf
+.L2790:
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	blt	.L2788
+	add	w0, w26, 1
+	sxth	w26, w0
+	b	.L2786
+.L2789:
+	adrp	x0, .LANCHOR65
+	mov	w2, 2
+	adrp	x19, .LANCHOR67
+	ldr	w3, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR129
+	ldr	x1, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR131
+	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR195
+	ldrh	w3, [x19, #:lo12:.LANCHOR67]
+	ldp	x21, x22, [sp, 48]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR195]
+	adrp	x0, .LC83
+	ldp	x19, x20, [sp, 32]
+	add	x0, x0, :lo12:.LC83
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 96
+	b	rknand_print_hex
+	.size	dump_map_info, .-dump_map_info
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
+	.global	LastWritenPbaAddr
 	.global	gc_ink_free_return_value
+	.global	check_valid_page_count_table
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
 	.global	power_up_flag
@@ -18261,6 +19610,8 @@ FtlLowFormat:
 	.global	g_gc_bad_block_temp_tbl
 	.global	g_gc_bad_block_gc_index
 	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_3
+	.global	g_gc_next_blk_2
 	.global	g_gc_next_blk_1
 	.global	g_gc_next_blk
 	.global	g_gc_cur_blk_max_valid_pages
@@ -18428,7 +19779,7 @@ FtlLowFormat:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",@nobits
 	.align	2
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -18449,7 +19800,7 @@ DieCsIndex:
 	.zero	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",@nobits
 	.align	2
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -18468,7 +19819,7 @@ FtlMallocBuffer:
 	.zero	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -18482,245 +19833,251 @@ IDByte:
 	.zero	32
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.zero	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR227,. + 0
+	.set	.LANCHOR223,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_type,"aw",@nobits
 	.align	1
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.zero	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.zero	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.zero	4
 	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.zero	2
+	.section	.bss.check_valid_page_count_table,"aw",@nobits
+	.align	3
+	.type	check_valid_page_count_table, %object
+	.size	check_valid_page_count_table, 8192
+check_valid_page_count_table:
+	.zero	8192
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
@@ -18734,7 +20091,7 @@ gBlockPageAlignSize:
 	.zero	4
 	.section	.bss.gBootDdrMode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -18759,28 +20116,28 @@ gFlashOnfiModeEn:
 	.zero	1
 	.section	.bss.gFlashPageBuffer0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 8
 gFlashPageBuffer0:
 	.zero	8
 	.section	.bss.gFlashPageBuffer1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 8
 gFlashPageBuffer1:
 	.zero	8
 	.section	.bss.gFlashProgCheckBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	gFlashProgCheckBuffer, %object
 	.size	gFlashProgCheckBuffer, 8
 gFlashProgCheckBuffer:
 	.zero	8
 	.section	.bss.gFlashProgCheckSpareBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	gFlashProgCheckSpareBuffer, %object
 	.size	gFlashProgCheckSpareBuffer, 8
 gFlashProgCheckSpareBuffer:
@@ -18798,34 +20155,34 @@ gFlashSlcMode:
 	.zero	1
 	.section	.bss.gFlashSpareBuffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	gFlashSpareBuffer, %object
 	.size	gFlashSpareBuffer, 8
 gFlashSpareBuffer:
 	.zero	8
 	.section	.bss.gFlashToggleModeEn,"aw",@nobits
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	gFlashToggleModeEn, %object
 	.size	gFlashToggleModeEn, 1
 gFlashToggleModeEn:
 	.zero	1
 	.section	.bss.gL2pMapInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 64
 gL2pMapInfo:
 	.zero	64
 	.section	.bss.gMasterInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 48
 gMasterInfo:
 	.zero	48
 	.section	.bss.gMasterTempBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 8
 gMasterTempBuf:
@@ -18837,7 +20194,7 @@ gMasterTempBuf:
 gMultiPageProgEn:
 	.zero	1
 	.section	.bss.gMultiPageReadEn,"aw",@nobits
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
@@ -18850,27 +20207,27 @@ gMultiPageReadEn:
 gNandChipMap:
 	.zero	64
 	.section	.bss.gNandFlashEccBits,"aw",@nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	gNandFlashEccBits, %object
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",@nobits
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.zero	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -18893,20 +20250,20 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.zero	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",@nobits
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.zero	1
 	.section	.bss.gNandIDataBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
 	.zero	2048
 	.section	.bss.gNandMaxChip,"aw",@nobits
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	gNandMaxChip, %object
 	.size	gNandMaxChip, 1
 gNandMaxChip:
@@ -18939,21 +20296,21 @@ gNandRandomizer:
 	.zero	1
 	.section	.bss.gNandcDumpWriteEn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	gNandcDumpWriteEn, %object
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.zero	4
 	.section	.bss.gNandcEccBits,"aw",@nobits
 	.align	2
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	gNandcEccBits, %object
 	.size	gNandcEccBits, 4
 gNandcEccBits:
 	.zero	4
 	.section	.bss.gNandcVer,"aw",@nobits
 	.align	2
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	gNandcVer, %object
 	.size	gNandcVer, 4
 gNandcVer:
@@ -18967,14 +20324,14 @@ gReadRetryInfo:
 	.zero	852
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR209,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
@@ -18987,7 +20344,7 @@ gToggleModeClkDiv:
 	.zero	4
 	.section	.bss.gTotleBlock,"aw",@nobits
 	.align	1
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	gTotleBlock, %object
 	.size	gTotleBlock, 2
 gTotleBlock:
@@ -19001,91 +20358,91 @@ gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.zero	4
 	.section	.bss.g_LowFormat,"aw",@nobits
 	.align	2
-	.set	.LANCHOR239,. + 0
+	.set	.LANCHOR244,. + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
 	.zero	4
 	.section	.bss.g_MaxLbaSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR226,. + 0
+	.set	.LANCHOR222,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.zero	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.zero	4
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.zero	4
 	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
@@ -19099,133 +20456,147 @@ g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_flash_read_only_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.zero	4
 	.section	.bss.g_free_slc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR241,. + 0
+	.set	.LANCHOR246,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR237,. + 0
+	.set	.LANCHOR242,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR236,. + 0
+	.set	.LANCHOR241,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
+	.zero	2
+	.section	.bss.g_gc_next_blk_2,"aw",@nobits
+	.align	1
+	.set	.LANCHOR115,. + 0
+	.type	g_gc_next_blk_2, %object
+	.size	g_gc_next_blk_2, 2
+g_gc_next_blk_2:
+	.zero	2
+	.section	.bss.g_gc_next_blk_3,"aw",@nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	g_gc_next_blk_3, %object
+	.size	g_gc_next_blk_3, 2
+g_gc_next_blk_3:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -19238,35 +20609,35 @@ g_gc_refresh_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -19280,7 +20651,7 @@ g_inkDie_check_enable:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
@@ -19292,91 +20663,91 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.zero	4
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_page_map_check_enable,"aw",@nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.zero	2
 	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR229,. + 0
+	.set	.LANCHOR235,. + 0
 	.type	g_power_lost_ecc_error_blk, %object
 	.size	g_power_lost_ecc_error_blk, 2
 g_power_lost_ecc_error_blk:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR230,. + 0
+	.set	.LANCHOR236,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR231,. + 0
+	.set	.LANCHOR237,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR232,. + 0
+	.set	.LANCHOR238,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
 	.section	.bss.g_req_cache,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 8
 g_req_cache:
@@ -19395,77 +20766,77 @@ g_slc2KBNand:
 	.zero	1
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.zero	4
 	.section	.bss.g_totle_map_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
@@ -19479,35 +20850,35 @@ g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_vendor_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
@@ -19521,21 +20892,21 @@ g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR222,. + 0
+	.set	.LANCHOR232,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR235,. + 0
+	.set	.LANCHOR240,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gpFlashSaveInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 8
 gpFlashSaveInfo:
@@ -19562,35 +20933,54 @@ gpNandc1:
 	.zero	8
 	.section	.bss.gpReadRetrial,"aw",@nobits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 8
 gpReadRetrial:
 	.zero	8
 	.section	.bss.gp_ect_tbl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
 	.zero	8
+	.section	.bss.gp_flash_check_buf,"aw",@nobits
+	.align	3
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.zero	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR221,. + 0
+	.set	.LANCHOR230,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
 	.zero	8
+	.section	.bss.idb_buf,"aw",@nobits
+	.align	3
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.zero	262144
+	.section	.bss.idb_need_write_back,"aw",@nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.zero	4
 	.section	.bss.mlcPageToSlcPageTbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	mlcPageToSlcPageTbl, %object
 	.size	mlcPageToSlcPageTbl, 1024
 mlcPageToSlcPageTbl:
@@ -19604,168 +20994,168 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
 	.zero	8
 	.section	.bss.p_l2p_map_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 8
 p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
 	.zero	8
 	.section	.bss.p_map_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 8
 p_map_block_table:
 	.zero	8
 	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 8
 p_map_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_map_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 8
 p_map_block_ver_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_check_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	p_map_region_ppn_check_table, %object
 	.size	p_map_region_ppn_check_table, 8
 p_map_region_ppn_check_table:
 	.zero	8
 	.section	.bss.p_map_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 8
 p_map_region_ppn_table:
 	.zero	8
 	.section	.bss.p_plane_order_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
 	.zero	32
 	.section	.bss.p_swl_mul_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 8
 p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
 	.zero	8
 	.section	.bss.p_sys_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 8
 p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -19778,42 +21168,42 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
 	.zero	8
 	.section	.bss.p_vendor_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 8
 p_vendor_block_table:
 	.zero	8
 	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
 	.align	3
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 8
 p_vendor_block_valid_page_count:
 	.zero	8
 	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 8
 p_vendor_block_ver_table:
 	.zero	8
 	.section	.bss.p_vendor_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 8
 p_vendor_data_buf:
 	.zero	8
 	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 8
 p_vendor_region_ppn_table:
@@ -19827,42 +21217,42 @@ read_retry_cur_offset:
 	.zero	4
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 56
 req_sys:
@@ -19880,11 +21270,17 @@ slcPageToMlcPageTbl:
 	.size	FtlMallocOffset, 4
 FtlMallocOffset:
 	.word	64
+	.section	.data.LastWritenPbaAddr,"aw",@progbits
+	.align	2
+	.type	LastWritenPbaAddr, %object
+	.size	LastWritenPbaAddr, 4
+LastWritenPbaAddr:
+	.word	-1
 	.section	.data.NandFlashParaTbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2368
+	.size	NandFlashParaTbl, 2464
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -20383,8 +21779,86 @@ NandFlashParaTbl:
 	.byte	5
 	.byte	44
 	.byte	-124
-	.byte	68
-	.byte	50
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	2184
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	50
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1048
+	.hword	1479
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1044
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	-60
+	.byte	52
 	.byte	-86
 	.byte	0
 	.byte	4
@@ -20392,9 +21866,9 @@ NandFlashParaTbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	1096
-	.hword	1503
+	.byte	1
+	.hword	2184
+	.hword	1479
 	.byte	5
 	.byte	19
 	.byte	60
@@ -20408,10 +21882,10 @@ NandFlashParaTbl:
 	.zero	4
 	.byte	5
 	.byte	44
-	.byte	100
+	.byte	-124
 	.byte	68
-	.byte	50
-	.byte	-91
+	.byte	52
+	.byte	-92
 	.byte	0
 	.byte	4
 	.byte	1
@@ -20419,8 +21893,8 @@ NandFlashParaTbl:
 	.hword	512
 	.byte	2
 	.byte	1
-	.hword	1048
-	.hword	1503
+	.hword	2184
+	.hword	1479
 	.byte	5
 	.byte	19
 	.byte	60
@@ -20432,32 +21906,6 @@ NandFlashParaTbl:
 	.byte	1
 	.byte	0
 	.zero	4
-	.byte	5
-	.byte	44
-	.byte	100
-	.byte	100
-	.byte	60
-	.byte	-91
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	32
-	.hword	512
-	.byte	2
-	.byte	1
-	.hword	1044
-	.hword	479
-	.byte	3
-	.byte	17
-	.byte	40
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
-	.zero	4
 	.byte	6
 	.byte	-83
 	.byte	-34
@@ -20978,6 +22426,32 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.zero	4
+	.byte	5
+	.byte	-119
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-95
+	.byte	0
+	.byte	7
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1024
+	.hword	455
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.zero	4
 	.byte	6
 	.byte	-104
 	.byte	-41
@@ -21812,7 +23286,7 @@ NandFlashParaTbl:
 	.zero	4
 	.section	.data.NandOptPara,"aw",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -22130,21 +23604,21 @@ ToshibaRefValue:
 	.byte	112
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR233,. + 0
+	.set	.LANCHOR226,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR223,. + 0
+	.set	.LANCHOR231,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.gNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	gNandParaInfo, %object
 	.size	gNandParaInfo, 32
 gNandParaInfo:
@@ -22172,7 +23646,7 @@ gNandParaInfo:
 	.zero	4
 	.section	.data.gSlcNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -22344,7 +23818,7 @@ random_seed:
 	.hword	28087
 	.section	.data.refValueDefault,"aw",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	refValueDefault, %object
 	.size	refValueDefault, 28
 refValueDefault:
@@ -22377,364 +23851,441 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",@progbits,1
-.LC10:
+.LC9:
 	.string	"sdr read ok %x ecc=%d\n"
-.LC11:
+.LC10:
 	.string	"sync para %d\n"
-.LC12:
+.LC11:
 	.string	"TOG mode Read error %x %x\n"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"FlashEraseBlocks pageAddr error %x\n"
 	.section	.rodata.FlashInit.str1.1,"aMS",@progbits,1
-.LC21:
+.LC23:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
-.LC22:
+.LC24:
 	.string	"FlashLoadPhyInfo fail %x!!\n"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",@progbits,1
-.LC27:
+.LC29:
 	.string	"prog error: = %x\n"
-.LC28:
+.LC30:
 	.string	"prog read error: = %x\n"
-.LC29:
+.LC31:
 	.string	"prog read s error: = %x %x %x\n"
-.LC30:
+.LC32:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC58:
+.LC54:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
-.LC15:
+.LC14:
 	.string	"ECC:%d\n"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",@progbits,1
-.LC13:
+.LC12:
 	.string	"read retry status %x %x %x\n"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
-.LC26:
+.LC28:
 	.string	"ReadRetry pageadd=%x ecc=%x err=%x\n"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",@progbits,1
-.LC23:
+.LC25:
 	.string	"Read pageadd=%x  ecc=%x err=%x\n"
-.LC24:
+.LC26:
 	.string	"data:"
-.LC25:
+.LC27:
 	.string	"spare:"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC2:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC31:
+.LC33:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC32:
+.LC34:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC33:
+.LC35:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlCheckVpc.str1.1,"aMS",@progbits,1
+.LC74:
+	.string	"vpc1"
+.LC75:
+	.string	"vpc2"
+.LC76:
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
+.LC77:
+	.string	"free blk vpc error %x = %x  %x\n"
+	.section	.rodata.FtlDumpBlockInfo.str1.1,"aMS",@progbits,1
+.LC46:
+	.string	"...%s enter...\n"
+.LC47:
+	.string	"superBlkID = %x vpc=%x\n"
+.LC48:
+	.string	"flashmode = %x pagenum = %x %x\n"
+.LC49:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.section	.rodata.FtlDumpSysBlock.str1.1,"aMS",@progbits,1
+.LC78:
+	.string	"id = %x,%x addr= %x,spare= %x %x %x %x data = %x\n"
+.LC79:
+	.string	":"
 	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
-.LC4:
+.LC3:
 	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
-.LC5:
+.LC4:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC50:
+.LC65:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC49:
+.LC53:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC51:
-	.string	"FTL version: 5.0.48 20180408"
-.LC52:
+.LC67:
+	.string	"FTL version: 5.0.49 20180810"
+.LC68:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC53:
+.LC69:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC43:
+.LC44:
 	.string	"no ect"
-	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
-.LC45:
-	.string	"page map lost %x %x %x %x\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC38:
+.LC41:
 	.string	"FtlMapWritePage error = %x\n"
-.LC39:
+.LC42:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC41:
+.LC58:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC46:
+.LC62:
 	.string	"RSB refresh addr %x\n"
-.LC47:
+.LC63:
 	.string	"spuer block %x vpn is 0\n "
-.LC48:
+.LC64:
 	.string	"g_recovery_ppa %x ver %x\n "
+	.section	.rodata.FtlScanAllBlock.str1.1,"aMS",@progbits,1
+.LC50:
+	.string	"blk = %x vpc=%x mode = %x\n"
+.LC51:
+	.string	"mlc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
+.LC52:
+	.string	"slc id = %x,%x addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC42:
+.LC43:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC35:
+.LC38:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
+.LC73:
+	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
-.LC44:
+.LC45:
 	.string	"slc mode"
+	.section	.rodata.Ftlscanalldata.str1.1,"aMS",@progbits,1
+.LC59:
+	.string	"Ftlscanalldata = %x\n"
+.LC60:
+	.string	"scan lpa = %x ppa= %x\n"
+.LC61:
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
-.LC19:
+.LC21:
 	.string	"otp error! %d"
-.LC20:
+.LC22:
 	.string	"rr"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
-.LC6:
+.LC5:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-.LC7:
+.LC6:
 	.string	"!!!!! FTL sys Error !!!!!"
-.LC8:
+.LC7:
 	.string	"%s\n"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
-.LC14:
+.LC13:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.__func__.10009,"a",@progbits
+	.align	3
+	.set	.LANCHOR248,. + 0
+	.type	__func__.10009, %object
+	.size	__func__.10009, 12
+__func__.10009:
+	.string	"FtlCheckVpc"
 	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
-	.set	.LANCHOR214,. + 0
+	.set	.LANCHOR224,. + 0
 	.type	__func__.10041, %object
-	.size	__func__.10041, 16
+	.size	__func__.10041, 17
 __func__.10041:
+	.string	"FtlDumpBlockInfo"
+	.section	.rodata.__func__.10060,"a",@progbits
+	.align	3
+	.set	.LANCHOR225,. + 0
+	.type	__func__.10060, %object
+	.size	__func__.10060, 16
+__func__.10060:
+	.string	"FtlScanAllBlock"
+	.section	.rodata.__func__.10165,"a",@progbits
+	.align	3
+	.set	.LANCHOR233,. + 0
+	.type	__func__.10165, %object
+	.size	__func__.10165, 16
+__func__.10165:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10074,"a",@progbits
+	.section	.rodata.__func__.10198,"a",@progbits
 	.align	3
-	.set	.LANCHOR228,. + 0
-	.type	__func__.10074, %object
-	.size	__func__.10074, 22
-__func__.10074:
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10198, %object
+	.size	__func__.10198, 22
+__func__.10198:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10128,"a",@progbits
+	.section	.rodata.__func__.10252,"a",@progbits
 	.align	3
-	.set	.LANCHOR101,. + 0
-	.type	__func__.10128, %object
-	.size	__func__.10128, 16
-__func__.10128:
+	.set	.LANCHOR102,. + 0
+	.type	__func__.10252, %object
+	.size	__func__.10252, 16
+__func__.10252:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10148,"a",@progbits
+	.section	.rodata.__func__.10272,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.10148, %object
-	.size	__func__.10148, 18
-__func__.10148:
+	.set	.LANCHOR140,. + 0
+	.type	__func__.10272, %object
+	.size	__func__.10272, 18
+__func__.10272:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10225,"a",@progbits
+	.section	.rodata.__func__.10349,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
-	.type	__func__.10225, %object
-	.size	__func__.10225, 25
-__func__.10225:
+	.set	.LANCHOR203,. + 0
+	.type	__func__.10349, %object
+	.size	__func__.10349, 25
+__func__.10349:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10239,"a",@progbits
+	.section	.rodata.__func__.10363,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10239, %object
-	.size	__func__.10239, 29
-__func__.10239:
+	.type	__func__.10363, %object
+	.size	__func__.10363, 29
+__func__.10363:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10245,"a",@progbits
+	.section	.rodata.__func__.10369,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
-	.type	__func__.10245, %object
-	.size	__func__.10245, 19
-__func__.10245:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10369, %object
+	.size	__func__.10369, 19
+__func__.10369:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10256,"a",@progbits
+	.section	.rodata.__func__.10380,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.10256, %object
-	.size	__func__.10256, 16
-__func__.10256:
+	.set	.LANCHOR206,. + 0
+	.type	__func__.10380, %object
+	.size	__func__.10380, 16
+__func__.10380:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10261,"a",@progbits
+	.section	.rodata.__func__.10385,"a",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
-	.type	__func__.10261, %object
-	.size	__func__.10261, 20
-__func__.10261:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.10385, %object
+	.size	__func__.10385, 20
+__func__.10385:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10329,"a",@progbits
+	.section	.rodata.__func__.10453,"a",@progbits
 	.align	3
-	.set	.LANCHOR234,. + 0
-	.type	__func__.10329, %object
-	.size	__func__.10329, 19
-__func__.10329:
+	.set	.LANCHOR239,. + 0
+	.type	__func__.10453, %object
+	.size	__func__.10453, 19
+__func__.10453:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10423,"a",@progbits
+	.section	.rodata.__func__.10547,"a",@progbits
 	.align	3
-	.set	.LANCHOR238,. + 0
-	.type	__func__.10423, %object
-	.size	__func__.10423, 23
-__func__.10423:
+	.set	.LANCHOR243,. + 0
+	.type	__func__.10547, %object
+	.size	__func__.10547, 23
+__func__.10547:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9361,"a",@progbits
+	.section	.rodata.__func__.9390,"a",@progbits
 	.align	3
-	.set	.LANCHOR240,. + 0
-	.type	__func__.9361, %object
-	.size	__func__.9361, 8
-__func__.9361:
+	.set	.LANCHOR245,. + 0
+	.type	__func__.9390, %object
+	.size	__func__.9390, 8
+__func__.9390:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9421,"a",@progbits
+	.section	.rodata.__func__.9450,"a",@progbits
 	.align	3
-	.set	.LANCHOR220,. + 0
-	.type	__func__.9421, %object
-	.size	__func__.9421, 13
-__func__.9421:
+	.set	.LANCHOR229,. + 0
+	.type	__func__.9450, %object
+	.size	__func__.9450, 13
+__func__.9450:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9447,"a",@progbits
+	.section	.rodata.__func__.9476,"a",@progbits
 	.align	3
-	.set	.LANCHOR242,. + 0
-	.type	__func__.9447, %object
-	.size	__func__.9447, 10
-__func__.9447:
-	.string	"ftl_write"
-	.section	.rodata.__func__.9510,"a",@progbits
+	.set	.LANCHOR247,. + 0
+	.type	__func__.9476, %object
+	.size	__func__.9476, 9
+__func__.9476:
+	.string	"FtlWrite"
+	.section	.rodata.__func__.9539,"a",@progbits
 	.align	3
-	.set	.LANCHOR121,. + 0
-	.type	__func__.9510, %object
-	.size	__func__.9510, 14
-__func__.9510:
+	.set	.LANCHOR124,. + 0
+	.type	__func__.9539, %object
+	.size	__func__.9539, 14
+__func__.9539:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9556,"a",@progbits
+	.section	.rodata.__func__.9585,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.9556, %object
-	.size	__func__.9556, 11
-__func__.9556:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9585, %object
+	.size	__func__.9585, 11
+__func__.9585:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9658,"a",@progbits
+	.section	.rodata.__func__.9678,"a",@progbits
 	.align	3
-	.set	.LANCHOR89,. + 0
-	.type	__func__.9658, %object
-	.size	__func__.9658, 17
-__func__.9658:
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9678, %object
+	.size	__func__.9678, 17
+__func__.9678:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9662,"a",@progbits
+	.section	.rodata.__func__.9682,"a",@progbits
 	.align	3
-	.set	.LANCHOR86,. + 0
-	.type	__func__.9662, %object
-	.size	__func__.9662, 17
-__func__.9662:
+	.set	.LANCHOR87,. + 0
+	.type	__func__.9682, %object
+	.size	__func__.9682, 17
+__func__.9682:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9692,"a",@progbits
+	.section	.rodata.__func__.9719,"a",@progbits
 	.align	3
-	.set	.LANCHOR90,. + 0
-	.type	__func__.9692, %object
-	.size	__func__.9692, 17
-__func__.9692:
+	.set	.LANCHOR91,. + 0
+	.type	__func__.9719, %object
+	.size	__func__.9719, 17
+__func__.9719:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9722,"a",@progbits
+	.section	.rodata.__func__.9749,"a",@progbits
 	.align	3
-	.set	.LANCHOR94,. + 0
-	.type	__func__.9722, %object
-	.size	__func__.9722, 22
-__func__.9722:
+	.set	.LANCHOR95,. + 0
+	.type	__func__.9749, %object
+	.size	__func__.9749, 22
+__func__.9749:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9729,"a",@progbits
+	.section	.rodata.__func__.9756,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9729, %object
-	.size	__func__.9729, 20
-__func__.9729:
+	.set	.LANCHOR228,. + 0
+	.type	__func__.9756, %object
+	.size	__func__.9756, 20
+__func__.9756:
 	.string	"ftl_load_l2p_region"
-	.section	.rodata.__func__.9760,"a",@progbits
+	.section	.rodata.__func__.9787,"a",@progbits
 	.align	3
-	.set	.LANCHOR95,. + 0
-	.type	__func__.9760, %object
-	.size	__func__.9760, 26
-__func__.9760:
+	.set	.LANCHOR96,. + 0
+	.type	__func__.9787, %object
+	.size	__func__.9787, 26
+__func__.9787:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9774,"a",@progbits
+	.section	.rodata.__func__.9801,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
-	.type	__func__.9774, %object
-	.size	__func__.9774, 15
-__func__.9774:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9801, %object
+	.size	__func__.9801, 15
+__func__.9801:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9814,"a",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 31
-__func__.9787:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9814, %object
+	.size	__func__.9814, 31
+__func__.9814:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9800,"a",@progbits
+	.section	.rodata.__func__.9827,"a",@progbits
 	.align	3
-	.set	.LANCHOR211,. + 0
-	.type	__func__.9800, %object
-	.size	__func__.9800, 16
-__func__.9800:
+	.set	.LANCHOR214,. + 0
+	.type	__func__.9827, %object
+	.size	__func__.9827, 16
+__func__.9827:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9820,"a",@progbits
+	.section	.rodata.__func__.9847,"a",@progbits
 	.align	3
-	.set	.LANCHOR98,. + 0
-	.type	__func__.9820, %object
-	.size	__func__.9820, 22
-__func__.9820:
+	.set	.LANCHOR99,. + 0
+	.type	__func__.9847, %object
+	.size	__func__.9847, 22
+__func__.9847:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9836,"a",@progbits
+	.section	.rodata.__func__.9863,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9836, %object
-	.size	__func__.9836, 9
-__func__.9836:
+	.set	.LANCHOR227,. + 0
+	.type	__func__.9863, %object
+	.size	__func__.9863, 9
+__func__.9863:
 	.string	"log2phys"
-	.section	.rodata.__func__.9898,"a",@progbits
+	.section	.rodata.__func__.9925,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
-	.type	__func__.9898, %object
-	.size	__func__.9898, 15
-__func__.9898:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9925, %object
+	.size	__func__.9925, 15
+__func__.9925:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9917,"a",@progbits
+	.section	.rodata.__func__.9944,"a",@progbits
 	.align	3
-	.set	.LANCHOR224,. + 0
-	.type	__func__.9917, %object
-	.size	__func__.9917, 14
-__func__.9917:
+	.set	.LANCHOR220,. + 0
+	.type	__func__.9944, %object
+	.size	__func__.9944, 14
+__func__.9944:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9971,"a",@progbits
+	.section	.rodata.__func__.9998,"a",@progbits
 	.align	3
-	.set	.LANCHOR225,. + 0
-	.type	__func__.9971, %object
-	.size	__func__.9971, 15
-__func__.9971:
+	.set	.LANCHOR221,. + 0
+	.type	__func__.9998, %object
+	.size	__func__.9998, 15
+__func__.9998:
 	.string	"FtlLoadSysInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC34:
+.LC36:
 	.string	"decrement_vpc_count %x = %d\n"
+.LC37:
+	.string	"decrement_vpc_count %x = %d in free list\n"
+	.section	.rodata.dump_map_info.str1.1,"aMS",@progbits,1
+.LC80:
+	.string	"phyBlk = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+.LC81:
+	.string	"Mblk:"
+.LC82:
+	.string	"L2P:"
+.LC83:
+	.string	"L2PC:"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC55:
+.LC71:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC56:
+.LC72:
 	.string	"erase power lost blk = %x vpc=%x\n"
 	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC9:
+.LC8:
 	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
-.LC36:
+.LC39:
 	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
-.LC37:
+.LC40:
 	.string	"page map lost: %x %x\n"
-	.section	.rodata.ftl_write.str1.1,"aMS",@progbits,1
-.LC57:
-	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
+.LC15:
+	.string	"1 write_idblock fix data %x %x %x\n"
+.LC16:
+	.string	"write_idblock fail! %x %x %x %x\n"
+.LC17:
+	.string	"write_idblock fail! %x\n"
 	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
-.LC40:
+.LC55:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
-	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",@progbits,1
-.LC3:
-	.string	"remove_from_free_sys_Queue %x\n"
+.LC56:
+	.string	"region_id = %x phyAddr = %x\n"
+.LC57:
+	.string	"map_ppn:"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
+.LC66:
+	.string	"g_gc_superblock_free %x %x %x %x %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC54:
+.LC70:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC16:
+.LC18:
 	.string	"%s 0x%x:"
-.LC17:
+.LC19:
 	.string	"%x "
-.LC18:
+.LC20:
 	.string	""
 	.hidden	free

commit 8b8d0fb0cb94a76abebe0b7999fad535e7be9423
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 13 16:49:46 2018 +0800

    rockchip: dts: rk3288: remove the vmmc-supply
    
    There is no need to initialize the vmmc since it is
    initialized by the pre-loader. And the power initialization
    framework is not ready when initialize the mmc device, this
    will make the mmc unusable.
    
    Change-Id: I97775f99b2c6154de3c50acc11587986712ac3dd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index e03cddbddb..00d3b1d490 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -191,7 +191,6 @@
 	num-slots = <1>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
-	vmmc-supply = <&vcc_io>;
 	vqmmc-supply = <&vcc_flash>;
 	status = "okay";
 };

commit dc3aa58f81cdda1f07bf4d95f447766029ac2c6e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Aug 7 11:20:10 2018 +0800

    android: add verify state to cmdline
    
    When we use avb, we will add the verify result to cmdline.
    The format is "androidboot.verifiedbootstate=green, yellow
    orange, or red".
    
    Change-Id: I0059fbd7e73225f580bb5bf0b5e4b04faeb22f45
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
old mode 100755
new mode 100644
index 4c9a694713..5f23df7169
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -30,6 +30,7 @@
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
 #define ANDROID_ARG_SERIALNO "androidboot.serialno="
+#define ANDROID_VERIFY_STATE "androidboot.verifiedbootstate="
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
@@ -407,6 +408,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 	AvbSlotVerifyResult verify_result;
 	AvbABData ab_data, ab_data_orig;
 	size_t slot_index_to_boot = 0;
+	char verify_state[38] = {0};
 
 	requested_partitions[0] = boot_partname;
 	ops = avb_ops_user_new();
@@ -445,22 +447,52 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
 			&slot_data[0]);
 
-	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK && !(unlocked & LOCK_MASK)) {
-		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
-		goto out;
+	strcat(verify_state, ANDROID_VERIFY_STATE);
+	switch (verify_result) {
+	case AVB_SLOT_VERIFY_RESULT_OK:
+		if (unlocked & LOCK_MASK)
+			strcat(verify_state, "orange");
+		else
+			strcat(verify_state, "green");
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+		if (unlocked & LOCK_MASK)
+			strcat(verify_state, "orange");
+		else
+			strcat(verify_state, "yellow");
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+	default:
+		if (unlocked & LOCK_MASK)
+			strcat(verify_state, "orange");
+		else
+			strcat(verify_state, "red");
+		break;
 	}
 
-	memcpy((uint8_t*)load_address,
-	       slot_data[0]->loaded_partitions->data,
-	       slot_data[0]->loaded_partitions->data_size);
-	env_set("bootargs", slot_data[0]->cmdline);
+	if (verify_result == AVB_SLOT_VERIFY_RESULT_OK ||
+	    verify_result == AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED ||
+	    (unlocked & LOCK_MASK)) {
+		memcpy((uint8_t *)load_address,
+		       slot_data[0]->loaded_partitions->data,
+		       slot_data[0]->loaded_partitions->data_size);
+		env_set("bootargs", slot_data[0]->cmdline);
 
-	/* ... and decrement tries remaining, if applicable. */
-	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+		/* ... and decrement tries remaining, if applicable. */
+		if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		    ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+			ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+		}
+	} else {
+		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 	}
-out:
+
+	env_update("bootargs", verify_state);
 	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
 		printf("Can not save metadata\n");
 		verify_result = AVB_SLOT_VERIFY_RESULT_ERROR_IO;

commit 0d0c32481d923c7b54cf109b518348a94f67d906
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Aug 9 14:37:48 2018 +0800

    usb: gadget: rockusb: add vendor storage r/w cmd support
    
    At present the vendor storage partition is small than 64K in the
    design, so vendor storage r/w commands do not take multi-packet
    into consideration, if it is needed, the codes should do a little
    change in future. Besides, the RPMB r/w support need to be added
    when its APIs get ready.
    
    Change-Id: I621604c99b44c69eb3aff3e01b28a18f35303040
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index ee31daa884..cbf2f743f3 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -8,6 +8,11 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/chip_info.h>
+
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+#include <asm/arch/vendor.h>
+#endif
+
 #include <rockusb.h>
 
 #define ROCKUSB_INTERFACE_CLASS	0xff
@@ -274,6 +279,157 @@ out:
 	return rc;
 }
 
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+static int rkusb_do_vs_write(struct fsg_common *common)
+{
+	struct fsg_lun		*curlun = &common->luns[common->lun];
+	u16			type = get_unaligned_be16(&common->cmnd[4]);
+	struct vendor_item	*vhead;
+	struct fsg_buffhd	*bh;
+	void			*data;
+	int			rc;
+
+	if (common->data_size >= (u32)65536) {
+		/* _MUST_ small than 64K */
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		return -EINVAL;
+	}
+
+	common->residue         = common->data_size;
+	common->usb_amount_left = common->data_size;
+
+	/* Carry out the file writes */
+	if (unlikely(common->data_size == 0))
+		return -EIO; /* No data to write */
+
+	for (;;) {
+		if (common->usb_amount_left > 0) {
+			/* Wait for the next buffer to become available */
+			bh = common->next_buffhd_to_fill;
+			if (bh->state != BUF_STATE_EMPTY)
+				goto wait;
+
+			/* Request the next buffer */
+			common->usb_amount_left      -= common->data_size;
+			bh->outreq->length	     = common->data_size;
+			bh->bulk_out_intended_length = common->data_size;
+			bh->outreq->short_not_ok     = 1;
+
+			START_TRANSFER_OR(common, bulk_out, bh->outreq,
+					  &bh->outreq_busy, &bh->state)
+				/*
+				 * Don't know what to do if
+				 * common->fsg is NULL
+				 */
+				return -EIO;
+			common->next_buffhd_to_fill = bh->next;
+		} else {
+			/* Then, wait for the data to become available */
+			bh = common->next_buffhd_to_drain;
+			if (bh->state != BUF_STATE_FULL)
+				goto wait;
+
+			common->next_buffhd_to_drain = bh->next;
+			bh->state = BUF_STATE_EMPTY;
+
+			/* Did something go wrong with the transfer? */
+			if (bh->outreq->status != 0) {
+				curlun->sense_data = SS_COMMUNICATION_FAILURE;
+				curlun->info_valid = 1;
+				break;
+			}
+
+			/* Perform the write */
+			vhead = (struct vendor_item *)bh->buf;
+			data  = bh->buf + sizeof(struct vendor_item);
+
+			if (!type) {
+				/* Vendor storage */
+				rc = vendor_storage_write(vhead->id,
+							  (char __user *)data,
+							  vhead->size);
+				if (rc < 0)
+					return -EIO;
+			} else {
+				/* RPMB */
+			}
+
+			common->residue -= common->data_size;
+
+			/* Did the host decide to stop early? */
+			if (bh->outreq->actual != bh->outreq->length)
+				common->short_packet_received = 1;
+			break; /* Command done */
+		}
+wait:
+		/* Wait for something to happen */
+		rc = sleep_thread(common);
+		if (rc)
+			return rc;
+	}
+
+	return -EIO; /* No default reply */
+}
+
+static int rkusb_do_vs_read(struct fsg_common *common)
+{
+	struct fsg_lun		*curlun = &common->luns[common->lun];
+	u16			type = get_unaligned_be16(&common->cmnd[4]);
+	struct vendor_item	*vhead;
+	struct fsg_buffhd	*bh;
+	void			*data;
+	int			rc;
+
+	if (common->data_size >= (u32)65536) {
+		/* _MUST_ small than 64K */
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		return -EINVAL;
+	}
+
+	common->residue         = common->data_size;
+	common->usb_amount_left = common->data_size;
+
+	/* Carry out the file reads */
+	if (unlikely(common->data_size == 0))
+		return -EIO; /* No default reply */
+
+	for (;;) {
+		/* Wait for the next buffer to become available */
+		bh = common->next_buffhd_to_fill;
+		while (bh->state != BUF_STATE_EMPTY) {
+			rc = sleep_thread(common);
+			if (rc)
+				return rc;
+		}
+
+		memset(bh->buf, 0, FSG_BUFLEN);
+		vhead = (struct vendor_item *)bh->buf;
+		data  = bh->buf + sizeof(struct vendor_item);
+		vhead->id = get_unaligned_be16(&common->cmnd[2]);
+
+		if (!type) {
+			/* Vendor storage */
+			rc = vendor_storage_read(vhead->id,
+						 (char __user *)data,
+						 common->data_size);
+			if (!rc)
+				return -EIO;
+			vhead->size = rc;
+		} else {
+			/* RPMB */
+		}
+
+		common->residue   -= common->data_size;
+		bh->inreq->length = common->data_size;
+		bh->state         = BUF_STATE_FULL;
+
+		break; /* No more left to read */
+	}
+
+	return -EIO; /* No default reply */
+}
+#endif
+
 static int rkusb_do_read_capacity(struct fsg_common *common,
 				    struct fsg_buffhd *bh)
 {
@@ -283,12 +439,17 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 
 	/*
 	 * bit[0]: Direct LBA, 0: Disabled;
-	 * bit[1]: Vendor Storage API, 0: default;
+	 * bit[1]: Vendor Storage API, 0: Disabed (default);
 	 * bit[2]: First 4M Access, 0: Disabled;
-	 * bit[3:63}: Reserved.
+	 * bit[3]: Read LBA On, 0: Disabed (default);
+	 * bit[4]: New Vendor Storage API, 0: Disabed;
+	 * bit[5:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
-	buf[0] = (type == IF_TYPE_MMC) ? (BIT(2) | BIT(0)) : BIT(0);
+	if (type == IF_TYPE_MMC)
+		buf[0] = BIT(0) | BIT(2) | BIT(4);
+	else
+		buf[0] = BIT(0) | BIT(4);
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
@@ -380,6 +541,18 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	case RKUSB_VS_WRITE:
+		*reply = rkusb_do_vs_write(common);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_VS_READ:
+		*reply = rkusb_do_vs_read(common);
+		rc = RKUSB_RC_FINISHED;
+		break;
+#endif
+
 	case RKUSB_READ_CAPACITY:
 		*reply = rkusb_do_read_capacity(common, bh);
 		rc = RKUSB_RC_FINISHED;
diff --git a/include/rockusb.h b/include/rockusb.h
index fefe24c98c..48eb9d6152 100644
--- a/include/rockusb.h
+++ b/include/rockusb.h
@@ -37,6 +37,8 @@ enum rkusb_cmd {
 	RKUSB_SPI_READ_10	= 0x21,
 	RKUSB_SPI_WRITE_10	= 0x22,
 	RKUSB_LBA_ERASE		= 0x25,
+	RKUSB_VS_WRITE		= 0x26,
+	RKUSB_VS_READ		= 0x27,
 	RKUSB_SESSION		= 0x30,
 	RKUSB_READ_CAPACITY	= 0xAA,
 	RKUSB_RESET		= 0xFF,

commit a6a1f5f85880c92c2c95b2ea76429e6aeff2379d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jul 23 21:50:06 2018 +0800

    mmc: add mmc_can_trim flag
    
    The emmc support several erase mode, we add mmc_can_trim
    flag hear to support trim.
    
    Change-Id: Iaee154eb0ef5edb95783aa3753421afd7c058263
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 2749c24d13..b9a1795f91 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1730,6 +1730,8 @@ static int mmc_startup(struct mmc *mmc)
 		if (part_completed &&
 		    (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
 			mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
+		if (ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT] & EXT_CSD_SEC_GB_CL_EN)
+			mmc->esr.mmc_can_trim = 1;
 
 		mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
 
diff --git a/include/mmc.h b/include/mmc.h
index 492b0434e7..9fb43b6a8c 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -196,6 +196,7 @@
 #define EXT_CSD_HC_WP_GRP_SIZE		221	/* RO */
 #define EXT_CSD_HC_ERASE_GRP_SIZE	224	/* RO */
 #define EXT_CSD_BOOT_MULT		226	/* RO */
+#define EXT_CSD_SEC_FEATURE_SUPPORT     231     /* RO */
 #define EXT_CSD_BKOPS_SUPPORT		502	/* RO */
 
 /*
@@ -273,6 +274,11 @@
 #define MMC_RSP_BUSY	(1 << 3)		/* card may send busy */
 #define MMC_RSP_OPCODE	(1 << 4)		/* response contains opcode */
 
+#define EXT_CSD_SEC_ER_EN      BIT(0)
+#define EXT_CSD_SEC_BD_BLK_EN  BIT(2)
+#define EXT_CSD_SEC_GB_CL_EN   BIT(4)
+#define EXT_CSD_SEC_SANITIZE   BIT(6)  /* v4.5 only */
+
 #define MMC_RSP_NONE	(0)
 #define MMC_RSP_R1	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
 #define MMC_RSP_R1b	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
@@ -351,6 +357,10 @@ struct mmc_uclass_priv {
 	struct mmc *mmc;
 };
 
+struct emmc_esr {
+	unsigned int mmc_can_trim;
+};
+
 /**
  * mmc_get_mmc_dev() - get the MMC struct pointer for a device
  *
@@ -557,6 +567,7 @@ struct mmc {
 	uint erase_grp_size;	/* in 512-byte sectors */
 	uint hc_wp_grp_size;	/* in 512-byte sectors */
 	struct sd_ssr	ssr;	/* SD status register */
+	struct emmc_esr esr;    /* emmc status register */
 	u64 capacity;
 	u64 capacity_user;
 	u64 capacity_boot;

commit c9d7fcc61d9d32506eed2385297ee1cbdedb93aa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 22:22:25 2018 +0800

    fastboot: get mmc erase group size for fastboot
    
    Change-Id: I2b3502bffc26c762ff10c55414b18037aed291cd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 4fdafabe53..e083daa0e4 100755
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -459,3 +459,19 @@ void fb_mmc_erase(const char *cmd, char *response)
 	       blks_size * info.blksz, cmd);
 	fastboot_okay("", response);
 }
+
+lbaint_t fb_mmc_get_erase_grp_size(void)
+{
+	lbaint_t grp_size;
+
+	struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV);
+
+	if (!mmc) {
+		pr_err("invalid mmc device");
+		return -1;
+	}
+
+	grp_size = mmc->erase_grp_size << 9;
+
+	return  grp_size;
+}
diff --git a/include/fb_mmc.h b/include/fb_mmc.h
index 402ba9b1b4..8df6593686 100644
--- a/include/fb_mmc.h
+++ b/include/fb_mmc.h
@@ -4,6 +4,12 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#ifndef _FB_MMC_H_
+#define _FB_MMC_H_
 void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 			unsigned int download_bytes, char *response);
 void fb_mmc_erase(const char *cmd, char *response);
+
+lbaint_t fb_mmc_get_erase_grp_size(void);
+
+#endif

commit 46a8a26905fc68e6683b93c97adae0dd9a4e37ba
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Aug 6 10:27:06 2018 +0800

    fastboot: add RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK config
    
    add RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK config so we can
    disable authenticated unlock function when we debug
    and unlock devices quickly.
    
    Change-Id: Id60be9ae6c17b59e107709a8041e8940743e5725
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 502d936088..99d62a650f 100755
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1362,7 +1362,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
-		char out_is_trusted;
+		bool out_is_trusted = true;
 
 		if (rk_avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAILlock sate read failure");
@@ -1370,12 +1370,14 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
+#ifdef CONFIG_RK_AVB_LIBAVB_ENABLE_ATH_UNLOCK
 			if (rk_auth_unlock((void *)CONFIG_FASTBOOT_BUF_ADDR,
 					   &out_is_trusted)) {
 				printf("rk_auth_unlock ops error!\n");
 				fastboot_tx_write_str("FAILrk_auth_unlock ops error!");
 				return;
 			}
+#endif
 			if (out_is_trusted == true) {
 				if (rk_avb_write_lock_state(lock_state))
 					fastboot_tx_write_str("FAILwrite lock state failed");

commit b268d7308c0b7937d9814c19b3f1f095d08ee453
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Sat Aug 11 18:40:05 2018 +0800

    configs: rockchip: rk3326: Fdt overlay enabled by default.
    
    Change-Id: I62c829fca08bc06db5584ddd28ccda70afa76a0f
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 7c00807384..0465f23cad 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -31,6 +31,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_OEM_UNLOCK=y
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -103,6 +104,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y

commit 6b7a2b7d6ae1d8342c483e742e51725062604cf6
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Fri Aug 10 14:37:11 2018 +0800

    configs: rockchip: rk3326: Update rk3326_defconfig and enable avb.
    
    Change-Id: I0dcbdb26f3cfdab6c7e009efe92672b92582e019
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index 956fb9f91d..7c00807384 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -7,10 +7,11 @@ CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_PX30=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
@@ -20,14 +21,16 @@ CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_AVB=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -40,7 +43,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -76,7 +79,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -93,17 +95,19 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
 CONFIG_OPTEE_V2=y
 CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y

commit d416f4c092ad8581301eb73e227aae81da9e2907
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Aug 10 10:04:56 2018 +0800

    rk3368: mcu: changing mcu sram start address to 8K offset
    
    Because of new atf code need 8k sram size(from 0-8KB).Sram space
    using by mcu change from 4KB-12KB to 8KB-16KB.
    
    Change-Id: Idae42349f25899216af9f641670c47dde06de95e
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 03c1b9b48f..0978b66b7f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -18,8 +18,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define IMEM_BASE                  0xFF8C0000
 
-/* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 4K) */
-#define MCU_SRAM_BASE			(IMEM_BASE + 1024 * 4)
+/* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 8K) */
+#define MCU_SRAM_BASE			(IMEM_BASE + 1024 * 8)
 #define MCU_SRAM_BASE_BIT31_BIT28	((MCU_SRAM_BASE & GENMASK(31, 28)) >> 28)
 #define MCU_SRAM_BASE_BIT27_BIT12	((MCU_SRAM_BASE & GENMASK(27, 12)) >> 12)
 /* exsram may using by mcu to accessing dram(0x0-0x20000000) */

commit 133266d48d3a04c9cca8b63f86a3bae25de1a3be
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Thu Aug 2 14:59:46 2018 +0800

    cmd: add memtester code
    
    Enable memtester by config CONFIG_CMD_MEMTESTER=y
    
    Change-Id: I02c873a8b3be5ee3c9a1cf347b7e3e75cb5336f0
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index cf6454c9b9..5aeedebee5 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1106,6 +1106,11 @@ config CMD_ETHSW
 
 endmenu
 
+config CMD_MEMTESTER
+	bool "Enable memtester for ddr"
+	help
+	  This enables memtester for ddr.
+
 menu "Misc commands"
 
 config CMD_BMP
diff --git a/cmd/Makefile b/cmd/Makefile
index 7ca3bbd09b..d4ceacf98e 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_CMD_LOG) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
+obj-$(CONFIG_CMD_MEMTESTER) += memtester/
 obj-$(CONFIG_CMD_IO) += io.o
 obj-$(CONFIG_CMD_MFSL) += mfsl.o
 obj-$(CONFIG_CMD_MII) += mii.o
diff --git a/cmd/memtester/Makefile b/cmd/memtester/Makefile
new file mode 100644
index 0000000000..4608e92fb0
--- /dev/null
+++ b/cmd/memtester/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_CMD_MEMTESTER) += tests.o
+obj-$(CONFIG_CMD_MEMTESTER) += memtester.o
\ No newline at end of file
diff --git a/cmd/memtester/memtester.c b/cmd/memtester/memtester.c
new file mode 100644
index 0000000000..996cb9ba33
--- /dev/null
+++ b/cmd/memtester/memtester.c
@@ -0,0 +1,234 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * memtester version 4
+ *
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ */
+
+#define __version__ "4.3.0"
+
+#include <common.h>
+#include <console.h>
+#include "sizes.h"
+#include "types.h"
+#include "tests.h"
+
+#define EXIT_FAIL_NONSTARTER    0x01
+#define EXIT_FAIL_ADDRESSLINES  0x02
+#define EXIT_FAIL_OTHERTEST     0x04
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* reserved sp size 1MB */
+#define RESERVED_SP_SIZE	0x100000
+
+struct test tests[] = {
+	{"Random Value", test_random_value},
+	{"Compare XOR", test_xor_comparison},
+	{"Compare SUB", test_sub_comparison},
+	{"Compare MUL", test_mul_comparison},
+	{"Compare DIV", test_div_comparison},
+	{"Compare OR", test_or_comparison},
+	{"Compare AND", test_and_comparison},
+	{"Sequential Increment", test_seqinc_comparison},
+	{"Solid Bits", test_solidbits_comparison},
+	{"Block Sequential", test_blockseq_comparison},
+	{"Checkerboard", test_checkerboard_comparison},
+	{"Bit Spread", test_bitspread_comparison},
+	{"Bit Flip", test_bitflip_comparison},
+	{"Walking Ones", test_walkbits1_comparison},
+	{"Walking Zeroes", test_walkbits0_comparison},
+#ifdef TEST_NARROW_WRITES
+	{"8-bit Writes", test_8bit_wide_random},
+	{"16-bit Writes", test_16bit_wide_random},
+#endif
+	{NULL, NULL}
+};
+
+int use_phys;
+off_t physaddrbase;
+
+static int do_memtester(cmd_tbl_t *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	ul loop, i, j;
+	ul buf_start;
+	ul start_adr[2], length[2];
+	ulv * bufa[2], *bufb[2];
+	ul count[2];
+	ul bufsize = 0;
+	ul loops = 0;
+	ul testenable = 0;
+	int exit_code = 0;
+	int abort = 0;
+
+	printf("memtester version " __version__ " (%d-bit)\n", UL_LEN);
+	printf("Copyright (C) 2001-2012 Charles Cazabon.\n");
+	printf("Licensed under the GNU General Public License version 2 (only).\n");
+	printf("\n");
+
+	start_adr[0] = (size_t)gd->bd->bi_dram[0].start;
+	if (gd->bd->bi_dram[1].start) {
+		length[0] = (size_t)gd->bd->bi_dram[0].size;
+		start_adr[1] = (size_t)gd->bd->bi_dram[1].start;
+		length[1] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[1];
+		length[1] &= ~0xfff;
+	} else {
+		length[0] = gd->start_addr_sp - RESERVED_SP_SIZE - start_adr[0];
+		length[0] &= ~0xfff;
+		start_adr[1] = 0;
+		length[1] = 0;
+	}
+
+	printf("available memory for test:\n");
+	printf("	start		 end	length\n");
+	printf("	0x%08lx - 0x%08lx 0x%08lx\n",
+	       start_adr[0], start_adr[0] + length[0], length[0]);
+	if (start_adr[1])
+		printf("	0x%08lx - 0x%08lx 0x%08lx\n",
+		       start_adr[1], start_adr[1] + length[1], length[1]);
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	if (strict_strtoul(argv[1], 0, &buf_start) < 0)
+		return CMD_RET_USAGE;
+
+	if (argc > 2)
+		if (strict_strtoul(argv[2], 0, &bufsize) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 3)
+		if (strict_strtoul(argv[3], 0, &testenable) < 0)
+			return CMD_RET_USAGE;
+
+	if (argc > 4)
+		if (strict_strtoul(argv[4], 0, &loops) < 0)
+			return CMD_RET_USAGE;
+
+	if (!bufsize) {
+		/* test all memory */
+		for (i = 0; i < 2; i++) {
+			bufa[i] = (ulv *)start_adr[i];
+			bufb[i] = (ulv *)(start_adr[i] + length[i] / 2);
+			count[i] = length[i] / 2 / sizeof(ul);
+		}
+	} else {
+		bufa[0] = (ulv *)buf_start;
+		bufb[0] = (ulv *)(buf_start + bufsize / 2);
+		count[0] = bufsize / 2 / sizeof(ul);
+		bufa[1] = 0;
+		if (start_adr[1]) {
+			if (buf_start < start_adr[0] ||
+			    (buf_start >= start_adr[0] + length[0] &&
+			     buf_start < start_adr[1]) ||
+			    ((buf_start + bufsize >
+			      start_adr[0] + length[0]) &&
+			     buf_start + bufsize < start_adr[1]) ||
+			    (buf_start + bufsize >
+			    start_adr[1] + length[1])) {
+				printf("unavailable memory space\n");
+				return CMD_RET_FAILURE;
+			}
+		} else {
+			if (buf_start < start_adr[0] ||
+			    (buf_start + bufsize >
+			    start_adr[0] + length[0])) {
+				printf("unavailable memory space\n");
+				return CMD_RET_FAILURE;
+			}
+		}
+	}
+
+	for (loop = 1; ((!loops) || loop <= loops); loop++) {
+		for (j = 0; j < 2; j++) {
+			if (!bufa[j])
+				continue;
+			printf("testing:0x%lx - 0x%lx\n", (ul)bufa[j],
+			       (ul)bufa[j] + count[j] * 2 * sizeof(ul));
+			printf("Loop %lu", loop);
+			if (loops)
+				printf("/%lu", loops);
+			printf(":\n");
+			printf("  %-20s: ", "Stuck Address");
+			if (!test_stuck_address(bufa[j], count[j] * 2))
+				printf("ok\n");
+			else
+				exit_code |= EXIT_FAIL_ADDRESSLINES;
+			for (i = 0;; i++) {
+				if (!tests[i].name)
+					break;
+				/* If using a custom testenable, only run this
+				 * test if the bit corresponding to this test
+				 * was set by the user.
+				 */
+				if (testenable && (!((1 << i) & testenable)))
+					continue;
+				printf("  %-20s: ", tests[i].name);
+				if (!tests[i].fp(bufa[j], bufb[j], count[j]))
+					printf("ok\n");
+				else
+					exit_code |= EXIT_FAIL_OTHERTEST;
+				if (ctrlc()) {
+					abort = 1;
+					break;
+				}
+			}
+			printf("\n");
+			if (abort)
+				break;
+		}
+		if (abort)
+			break;
+	}
+	if (exit_code & EXIT_FAIL_NONSTARTER)
+		printf("Fail: EXIT_FAIL_NONSTARTER\n");
+	if (exit_code & EXIT_FAIL_ADDRESSLINES)
+		printf("Fail: EXIT_FAIL_ADDRESSLINES\n");
+	if (exit_code & EXIT_FAIL_OTHERTEST)
+		printf("Fail: EXIT_FAIL_OTHERTEST\n");
+
+	printf("Done.\n");
+	return 0;
+}
+
+U_BOOT_CMD(memtester, 5, 1, do_memtester,
+	   "do memtester",
+	   "[start length [testenable [loop]]]\n"
+	   "start: start address, should be 4k align\n"
+	   "length: test length, should be 4k align, if 0 testing full space\n"
+	   "testenable[option]: enable pattern by set bit to 1, null or 0"
+	   " enable all pattern\n"
+	   "	bit0: Random Value\n"
+	   "	bit1: Compare XOR\n"
+	   "	bit2: Compare SUB\n"
+	   "	bit3: Compare MUL\n"
+	   "	bit4: Compare DIV\n"
+	   "	bit5: Compare OR\n"
+	   "	bit6: Compare AND\n"
+	   "	bit7: Sequential Increment\n"
+	   "	bit8: Solid Bits\n"
+	   "	bit9: Block Sequential\n"
+	   "	bit10: Checkerboard\n"
+	   "	bit11: Bit Spread\n"
+	   "	bit12: Bit Flip\n"
+	   "	bit13: Walking Ones\n"
+	   "	bit14: Walking Zeroes\n"
+	   "	bit15: 8-bit Writes\n"
+	   "	bit16: 16-bit Writes\n"
+	   "	example: testenable=0x1000,enable Bit Flip only\n"
+	   "loop[option]: testing loop, if 0 or null endless loop\n"
+	   "example:\n"
+	   "	memtester 0x200000 0x1000000: start address: 0x200000 length:"
+	   "0x1000000, enable all pattern, endless loop\n"
+	   "	memtester 0x200000 0x1000000 0x1000 100: start address:0x200000"
+	   " length:0x1000000, Bit Flip only, loop 100 times\n"
+	   "	memtester 0 0: testing full space\n");
diff --git a/cmd/memtester/memtester.h b/cmd/memtester/memtester.h
new file mode 100644
index 0000000000..d388b2567d
--- /dev/null
+++ b/cmd/memtester/memtester.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple (yet, for some reason, very effective) memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the declarations for external variables from the main file.
+ * See other comments in that file.
+ *
+ */
+
+#include <linux/types.h>
+
+/* extern declarations. */
+
+extern int use_phys;
+extern off_t physaddrbase;
diff --git a/cmd/memtester/sizes.h b/cmd/memtester/sizes.h
new file mode 100644
index 0000000000..79eba1b699
--- /dev/null
+++ b/cmd/memtester/sizes.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains some macro definitions for handling 32/64 bit platforms.
+ *
+ */
+#ifndef __MEMTESTER_SIZES_H
+#define __MEMTESTER_SIZES_H
+
+#include <common.h>
+
+#define rand32() ((unsigned int)rand() | ((unsigned int)rand() << 16))
+
+#ifndef CONFIG_ARM64
+#define rand_ul() rand32()
+#define UL_ONEBITS 0xffffffff
+#define UL_LEN 32
+#define CHECKERBOARD1 0x55555555
+#define CHECKERBOARD2 0xaaaaaaaa
+#define UL_BYTE(x) ((x | x << 8 | x << 16 | x << 24))
+#else
+#define rand64() (((ul)rand32()) << 32 | ((ul)rand32()))
+#define rand_ul() rand64()
+#define UL_ONEBITS 0xffffffffffffffffUL
+#define UL_LEN 64
+#define CHECKERBOARD1 0x5555555555555555
+#define CHECKERBOARD2 0xaaaaaaaaaaaaaaaa
+#define UL_BYTE(x) (((ul)x | (ul)x << 8 | (ul)x << 16 | (ul)x << 24 |	\
+		    (ul)x << 32 | (ul)x << 40 | (ul)x << 48 | (ul)x << 56))
+#endif
+
+#endif /* __MEMTESTER_SIZES_H */
diff --git a/cmd/memtester/tests.c b/cmd/memtester/tests.c
new file mode 100644
index 0000000000..327f983619
--- /dev/null
+++ b/cmd/memtester/tests.c
@@ -0,0 +1,541 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the functions for the actual tests, called from the
+ * main routine in memtester.c.  See other comments in that file.
+ *
+ */
+
+#include "memtester.h"
+#include "sizes.h"
+#include "types.h"
+
+union {
+	unsigned char bytes[UL_LEN / 8];
+	ul val;
+} mword8;
+
+union {
+	unsigned short u16s[UL_LEN / 16];
+	ul val;
+} mword16;
+
+char progress[] = "-\\|/";
+#define PROGRESSLEN 4
+#define PROGRESSOFTEN 2500
+#define ONE 0x00000001L
+
+#define fflush(n)
+
+/* Function definitions. */
+int compare_regions(ulv *bufa, ulv *bufb, size_t count)
+{
+	int r = 0;
+	size_t i;
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	off_t physaddr;
+
+	for (i = 0; i < count; i++, p1++, p2++) {
+		if (*p1 != *p2) {
+			if (use_phys) {
+				physaddr = physaddrbase + (i * sizeof(ul));
+				fprintf(stderr,
+					"FAILURE: 0x%08lx != 0x%08lx at physical address "
+					"0x%08lx.\n",
+					(ul)*p1, (ul)*p2, physaddr);
+			} else {
+				fprintf(stderr,
+					"FAILURE: 0x%08lx != 0x%08lx at offset 0x%08lx.\n",
+					(ul)*p1, (ul)*p2,
+					(ul)(i * sizeof(ul)));
+			}
+			/* printf("Skipping to next test..."); */
+			r = -1;
+		}
+	}
+	return r;
+}
+
+int test_stuck_address(ulv *bufa, size_t count)
+{
+	ulv *p1 = bufa;
+	unsigned int j;
+	size_t i;
+	off_t physaddr;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 16; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			*p1 = ((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1);
+			*p1++;
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		p1 = (ulv *)bufa;
+		for (i = 0; i < count; i++, p1++) {
+			if (*p1 !=
+				(((j + i) % 2) == 0 ? (ul)p1 : ~((ul)p1))) {
+				if (use_phys) {
+					physaddr =
+					    physaddrbase + (i * sizeof(ul));
+					fprintf(stderr,
+						"FAILURE: possible bad address line at physical "
+						"address 0x%08lx.\n", physaddr);
+				} else {
+					fprintf(stderr,
+						"FAILURE: possible bad address line at offset "
+						"0x%08lx.\n",
+						(ul)(i * sizeof(ul)));
+				}
+				printf("Skipping to next test...\n");
+				fflush(stdout);
+				return -1;
+			}
+		}
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_random_value(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	ul j = 0;
+	size_t i;
+
+	putc(' ');
+	fflush(stdout);
+	for (i = 0; i < count; i++) {
+		*p1++ = *p2++ = rand_ul();
+		if (!(i % PROGRESSOFTEN)) {
+			putc('\b');
+			putc(progress[++j % PROGRESSLEN]);
+			fflush(stdout);
+		}
+	}
+	printf("\b \b");
+	fflush(stdout);
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_xor_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ ^= q;
+		*p2++ ^= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_sub_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ -= q;
+		*p2++ -= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_mul_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ *= q;
+		*p2++ *= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_div_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		if (!q)
+			q++;
+		*p1++ /= q;
+		*p2++ /= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_or_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ |= q;
+		*p2++ |= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_and_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++) {
+		*p1++ &= q;
+		*p2++ &= q;
+	}
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_seqinc_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	size_t i;
+	ul q = rand_ul();
+
+	for (i = 0; i < count; i++)
+		*p1++ = *p2++ = (i + q);
+	return compare_regions(bufa, bufb, count);
+}
+
+int test_solidbits_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	ul q;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 64; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		q = (j % 2) == 0 ? UL_ONEBITS : 0;
+		printf("setting %3u", j);
+		fflush(stdout);
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		for (i = 0; i < count; i++)
+			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_checkerboard_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	ul q;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 64; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		q = (j % 2) == 0 ? CHECKERBOARD1 : CHECKERBOARD2;
+		printf("setting %3u", j);
+		fflush(stdout);
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		for (i = 0; i < count; i++)
+			*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_blockseq_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < 256; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++)
+			*p1++ = *p2++ = (ul)UL_BYTE(j);
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_walkbits0_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < UL_LEN * 2; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			if (j < UL_LEN) {	/* Walk it up. */
+				*p1++ = *p2++ = ONE << j;
+			} else {	/* Walk it back down. */
+				*p1++ = *p2++ = ONE << (UL_LEN * 2 - j - 1);
+			}
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_walkbits1_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < UL_LEN * 2; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			if (j < UL_LEN) {	/* Walk it up. */
+				*p1++ = *p2++ = UL_ONEBITS ^ (ONE << j);
+			} else {	/* Walk it back down. */
+				*p1++ = *p2++ =
+				    UL_ONEBITS ^ (ONE << (UL_LEN * 2 - j - 1));
+			}
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_bitspread_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (j = 0; j < UL_LEN * 2; j++) {
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		p1 = (ulv *)bufa;
+		p2 = (ulv *)bufb;
+		printf("setting %3u", j);
+		fflush(stdout);
+		for (i = 0; i < count; i++) {
+			if (j < UL_LEN) {	/* Walk it up. */
+				*p1++ = *p2++ = (i % 2 == 0)
+				    ? (ONE << j) | (ONE << (j + 2))
+				    : UL_ONEBITS ^ ((ONE << j)
+						    | (ONE << (j + 2)));
+			} else {	/* Walk it back down. */
+				*p1++ = *p2++ = (i % 2 == 0)
+				    ? (ONE << (UL_LEN * 2 - 1 - j)) | (ONE <<
+								       (UL_LEN *
+									2 + 1 -
+									j))
+				    : UL_ONEBITS ^ (ONE << (UL_LEN * 2 - 1 - j)
+						    | (ONE <<
+						       (UL_LEN * 2 + 1 - j)));
+			}
+		}
+		printf("\b\b\b\b\b\b\b\b\b\b\b");
+		printf("testing %3u", j);
+		fflush(stdout);
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_bitflip_comparison(ulv *bufa, ulv *bufb, size_t count)
+{
+	ulv *p1 = bufa;
+	ulv *p2 = bufb;
+	unsigned int j, k;
+	ul q;
+	size_t i;
+
+	printf("           ");
+	fflush(stdout);
+	for (k = 0; k < UL_LEN; k++) {
+		q = ONE << k;
+		for (j = 0; j < 8; j++) {
+			printf("\b\b\b\b\b\b\b\b\b\b\b");
+			q = ~q;
+			printf("setting %3u", k * 8 + j);
+			fflush(stdout);
+			p1 = (ulv *)bufa;
+			p2 = (ulv *)bufb;
+			for (i = 0; i < count; i++)
+				*p1++ = *p2++ = (i % 2) == 0 ? q : ~q;
+			printf("\b\b\b\b\b\b\b\b\b\b\b");
+			printf("testing %3u", k * 8 + j);
+			fflush(stdout);
+			if (compare_regions(bufa, bufb, count))
+				return -1;
+		}
+	}
+	printf("\b\b\b\b\b\b\b\b\b\b\b           \b\b\b\b\b\b\b\b\b\b\b");
+	fflush(stdout);
+	return 0;
+}
+
+#ifdef TEST_NARROW_WRITES
+int test_8bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+{
+	u8v *p1, *t;
+	ulv *p2;
+	int attempt;
+	unsigned int b, j = 0;
+	size_t i;
+
+	putc(' ');
+	fflush(stdout);
+	for (attempt = 0; attempt < 2; attempt++) {
+		if (attempt & 1) {
+			p1 = (u8v *)bufa;
+			p2 = bufb;
+		} else {
+			p1 = (u8v *)bufb;
+			p2 = bufa;
+		}
+		for (i = 0; i < count; i++) {
+			t = mword8.bytes;
+			*p2++ = mword8.val = rand_ul();
+			for (b = 0; b < UL_LEN / 8; b++)
+				*p1++ = *t++;
+			if (!(i % PROGRESSOFTEN)) {
+				putc('\b');
+				putc(progress[++j % PROGRESSLEN]);
+				fflush(stdout);
+			}
+		}
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b \b");
+	fflush(stdout);
+	return 0;
+}
+
+int test_16bit_wide_random(ulv *bufa, ulv *bufb, size_t count)
+{
+	u16v *p1, *t;
+	ulv *p2;
+	int attempt;
+	unsigned int b, j = 0;
+	size_t i;
+
+	putc(' ');
+	fflush(stdout);
+	for (attempt = 0; attempt < 2; attempt++) {
+		if (attempt & 1) {
+			p1 = (u16v *)bufa;
+			p2 = bufb;
+		} else {
+			p1 = (u16v *)bufb;
+			p2 = bufa;
+		}
+		for (i = 0; i < count; i++) {
+			t = mword16.u16s;
+			*p2++ = mword16.val = rand_ul();
+			for (b = 0; b < UL_LEN / 16; b++)
+				*p1++ = *t++;
+			if (!(i % PROGRESSOFTEN)) {
+				putc('\b');
+				putc(progress[++j % PROGRESSLEN]);
+				fflush(stdout);
+			}
+		}
+		if (compare_regions(bufa, bufb, count))
+			return -1;
+	}
+	printf("\b \b");
+	fflush(stdout);
+	return 0;
+}
+#endif
diff --git a/cmd/memtester/tests.h b/cmd/memtester/tests.h
new file mode 100644
index 0000000000..cf43f3f3b8
--- /dev/null
+++ b/cmd/memtester/tests.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple yet very effective memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2012 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains the declarations for the functions for the actual tests,
+ * called from the main routine in memtester.c.  See other comments in that
+ * file.
+ *
+ */
+
+/* Function declaration. */
+
+int test_stuck_address(ulv *bufa, size_t count);
+int test_random_value(ulv *bufa,
+		      ulv *bufb, size_t count);
+int test_xor_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_sub_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_mul_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_div_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_or_comparison(ulv *bufa,
+		       ulv *bufb, size_t count);
+int test_and_comparison(ulv *bufa,
+			ulv *bufb, size_t count);
+int test_seqinc_comparison(ulv *bufa,
+			   ulv *bufb, size_t count);
+int test_solidbits_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_checkerboard_comparison(ulv *bufa,
+				 ulv *bufb, size_t count);
+int test_blockseq_comparison(ulv *bufa,
+			     ulv *bufb, size_t count);
+int test_walkbits0_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_walkbits1_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_bitspread_comparison(ulv *bufa,
+			      ulv *bufb, size_t count);
+int test_bitflip_comparison(ulv *bufa,
+			    ulv *bufb, size_t count);
+#ifdef TEST_NARROW_WRITES
+int test_8bit_wide_random(ulv *bufa,
+			  ulv *bufb, size_t count);
+int test_16bit_wide_random(ulv *bufa,
+			   ulv *bufb, size_t count);
+#endif
diff --git a/cmd/memtester/types.h b/cmd/memtester/types.h
new file mode 100644
index 0000000000..e25864d26c
--- /dev/null
+++ b/cmd/memtester/types.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Very simple but very effective user-space memory tester.
+ * Originally by Simon Kirby <sim@stormix.com> <sim@neato.org>
+ * Version 2 by Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Version 3 not publicly released.
+ * Version 4 rewrite:
+ * Copyright (C) 2004-2010 Charles Cazabon <charlesc-memtester@pyropus.ca>
+ * Licensed under the terms of the GNU General Public License version 2 (only).
+ * See the file COPYING for details.
+ *
+ * This file contains typedefs, structure, and union definitions.
+ *
+ */
+#ifndef __MEMTESTER_TYPES_H
+#define __MEMTESTER_TYPES_H
+
+typedef unsigned long ul;
+typedef unsigned long long ull;
+typedef unsigned long volatile ulv;
+typedef unsigned char volatile u8v;
+typedef unsigned short volatile u16v;
+
+struct test {
+	char *name;
+	int (*fp)(ulv *bufa, ulv *bufb, size_t count);
+};
+
+#endif /* __MEMTESTER_TYPES_H */

commit 7b1b253904b591995ce23dd574481e2ea651b739
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Aug 10 14:11:03 2018 +0800

    rockchip: vendor: export vendor_item structure
    
    Export vendor_item structure into head file that other
    moudules may quote directly.
    
    Change-Id: If791f5da8ac45f46f872a8f872af9bf9e2365a37
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index ea82e0abd8..83c487d92e 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -11,6 +11,13 @@
 #define VENDOR_LAN_MAC_ID	3 /* lan mac */
 #define VENDOR_BLUETOOTH_ID	4 /* bluetooth mac */
 
+struct vendor_item {
+	u16  id;
+	u16  offset;
+	u16  size;
+	u16  flag;
+};
+
 int vendor_storage_test(void);
 int vendor_storage_read(u16 id, void *pbuf, u16 size);
 int vendor_storage_write(u16 id, void *pbuf, u16 size);
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
old mode 100755
new mode 100644
index d9a598de6a..db17a61375
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -42,13 +42,6 @@
 /* Vendor uinit test define */
 int vendor_storage_test(void);
 
-struct vendor_item {
-	u16  id;
-	u16  offset;
-	u16  size;
-	u16  flag;
-};
-
 struct vendor_hdr {
 	u32	tag;
 	u32	version;

commit 93925a65464e49bfe40be92257ff9469e7365d91
Author: Bian Jin chen <kenjc.bian@rock-chips.com>
Date:   Thu Aug 9 10:42:49 2018 +0800

    rockchip: px30: Increase the size of CONFIG_SYS_MALLOC_LEN to 192M.
    
    If vbmeta does not have signature information, avb will load all
    data in the vbmeta partition, which requires more malloc size.
    
    Change-Id: I605801f2d995a217d4dee2f6f5ff0a3680ea247e
    Signed-off-by: Bian Jin chen <kenjc.bian@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index a948c5df24..425659eac4 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(64 << 20) /* 64M */
+#define CONFIG_SYS_MALLOC_LEN		(192 << 20) /* 192M */
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 404256445eb51fc76a0107d1b954283851b5150d
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue Aug 7 22:44:34 2018 +0800

    drivers: rkflash: add new spi flash
    
    1.SPI nand including HYF, MXIC, XTX
    2.SPI nor including XMC, ESMT, MXIC
    
    Change-Id: Id64a567009696dfa6128370e1ce9567d32edba9f
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index f2d394929a..72eeebe705 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -23,6 +23,8 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
 	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	/* MX66L1G45G */
+	{0x90AF, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
 	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
@@ -37,10 +39,20 @@ static struct nand_info spi_nand_tbl[] = {
 	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
 	/* HYF2GQ4UAACAE */
 	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	/* HYF2GQ4UAACAE */
+	{0xC952, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF2GQ4UDACAE */
-	{0xC922, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC922, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	/* HYF2GQ4UHCCAE */
+	{0xC95A, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
 	/* HYF1GQ4UDACAE */
-	{0xC921, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	{0xC921, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
+	/* F50L1G41LB */
+	{0xC801, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0xFF, 20, 36, NULL},
+	/* XT26G02A */
+	{0x0be2, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
+	/* XT26G01A */
+	{0x0be1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp3},
 };
 
 static u8 id_byte[8];
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index c3872e6bf8..db78567d78 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -35,6 +35,12 @@ static struct flash_info spi_flash_tbl[] = {
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
 	/* MX25L25635E/F */
 	{0xc22019, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x30, 16, 6, 0},
+	/* XM25QH64A */
+	{0x207017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 0, 0},
+	/* XM25QH128A */
+	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
+	/* EN25QH128A */
+	{0x1c7018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 0, 0},
 };
 
 static const u8 sfnor_dev_code[] = {

commit 02104b86c5b3340de79d9b41ab60d129bf69f25e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Aug 9 09:23:54 2018 +0800

    clk: rockchip: rk3368: fixup the bus and peri parent
    
    make the bus and peri parent to GPLL.
    
    Change-Id: I3956752c1191a6417d16fa9a9765574f38c7ab7b
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index d82dfd2b15..9446c9f8b1 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -588,7 +588,7 @@ static ulong rk3368_bus_set_clk(struct rk3368_cru *cru,
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[8],
 			     CLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
-			     CLK_BUS_PLL_SEL_CPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     CLK_BUS_PLL_SEL_GPLL << CLK_BUS_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT);
 		break;
 	case HCLK_BUS:
@@ -662,7 +662,7 @@ static ulong rk3368_peri_set_clk(struct rk3368_cru *cru,
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[9],
 			     CLK_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
-			     CLK_PERI_PLL_SEL_CPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     CLK_PERI_PLL_SEL_GPLL << CLK_PERI_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT);
 		break;
 	case HCLK_PERI:

commit f0aa0521c2e80e8d66dfe8ec7ae8d39356dfa8e8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 3 20:09:35 2018 +0800

    make.sh: support rk3368h image pack
    
    Change-Id: Iaa7a3c117bd5cffd24febe06f0af2a8a7316f37e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index aeef535c48..319822127b 100755
--- a/make.sh
+++ b/make.sh
@@ -299,6 +299,8 @@ select_chip_info()
 
 	if [ $count -eq 1 ]; then
 		RKCHIP=${RKCHIP##*_}
+		grep '^CONFIG_ROCKCHIP_RK3368=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3368H
 	elif [ $count -gt 1 ]; then
 		# Grep the RK CHIP variant
 		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \

commit edac97f481a01100e3b84201a4da8d92561ece2d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 9 11:58:26 2018 +0800

    android: dtbo: enable depends on CONFIG_CMD_DTIMG
    
    Change-Id: I04ba7d39fed1b5c6950a3882f04de5420dfcff2e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 7fa5fa7587..39987927bc 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -598,7 +598,8 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	if (ret < 0)
 		return ret;
 
-#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_CMD_DTIMG) && \
+    defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index e4b373574d..4c9a694713 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -476,7 +476,7 @@ out:
 }
 #endif
 
-#ifdef CONFIG_OF_LIBFDT_OVERLAY
+#if defined(CONFIG_CMD_DTIMG) && defined(CONFIG_OF_LIBFDT_OVERLAY)
 
 /*
  * Default return index 0.
@@ -841,7 +841,8 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
  * dtb and apply overlay in init_kernel_dtb(), so that we don't need to apply
  * again, we would pass the current fdt to kernel.
  */
-#if defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
+#if defined(CONFIG_CMD_DTIMG) && \
+    defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
 	android_fdt_overlay_apply((void *)fdt_addr);
 #endif
 #endif

commit 93cbd3c1e3d8f0017b10d8261741956bfb889133
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Aug 6 19:16:45 2018 +0800

    rockchip: rk3308: don't pass device serial number to kernel
    
    We want to generate the devices serail number from
    linux kernel itself.
    
    Change-Id: Idfc8461a703e314a626013a3ecb622069d2fd3db
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index bfb681e62c..5a2b43d056 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -13,6 +13,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 9bddfec667..48ac5837a6 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -12,6 +12,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+# CONFIG_PASS_DEVICE_SERIAL_BY_FDT is not set
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit 5f08e86fd7afb2df9c4643676c4ae78997a919d1
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Aug 6 19:12:45 2018 +0800

    fdt: add config to enable/disable fdt_root function
    
    commit 10be5b5d3a8d ("fdt: Pass the device serial number through
    devicetree") introduce function fdt_root to pass a device serial
    number to kernel through devicetree. But sometimes we may want
    to generate the device serial number from kernel itself. So it's
    better to have a configuration to enable/disable this function.
    
    Change-Id: I9efd4fd63faca9ce5e44cade856993be251f4760
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 4ec8cfd83c..8856c7d520 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -178,6 +178,13 @@ config SPI_BOOT
 
 endmenu
 
+config PASS_DEVICE_SERIAL_BY_FDT
+	bool "Pass the device serial number to kernel through devicetree"
+	default y
+	help
+	  Enabling this will pass a device serial number to kernel by devicetree
+	  "serial-number" properties.
+
 config BOOTDELAY
 	int "delay in seconds before automatically booting"
 	default 2
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 9f87829f24..94e53d47b1 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -487,11 +487,12 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
 	ulong *initrd_end = &images->initrd_end;
 	int ret = -EPERM;
 	int fdt_ret;
-
+#if defined(CONFIG_PASS_DEVICE_SERIAL_BY_FDT)
 	if (fdt_root(blob) < 0) {
 		printf("ERROR: root node setup failed\n");
 		goto err;
 	}
+#endif
 	if (fdt_chosen(blob) < 0) {
 		printf("ERROR: /chosen node create failed\n");
 		goto err;

commit 94058cdffdad7ca2cbb860135dcd898b0eb9a6cb
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 19:54:38 2018 +0800

    rockchip: clk: rk3308: Add clk_set_defaults()
    
    As clk_set_defaults() is removed in device core, so add it in clock
    driver.
    
    Change-Id: If09a9ddca27a3d1fc0747d8cafbeaacd8ef97d36
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 1646d7c6ab..73b774dfed 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -82,13 +82,6 @@ static struct rockchip_pll_clock rk3308_pll_clks[] = {
 		      RK3308_MODE_CON, 6, 10, 0, NULL),
 };
 
-static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
-				ulong hz);
-static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
-				 ulong hz);
-static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
-				  ulong clk_id, ulong hz);
-
 static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)
 {
 	struct rk3308_cru *cru = priv->cru;
@@ -148,34 +141,6 @@ static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 						       priv->cru, VPLL1);
 }
 
-static void rkclk_init(struct udevice *dev)
-{
-	struct rk3308_clk_priv *priv = dev_get_priv(dev);
-	int ret;
-
-	if (rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
-				  priv->cru, APLL) != APLL_HZ) {
-		ret = rk3308_armclk_set_clk(priv, APLL_HZ);
-		if (ret < 0)
-			printf("%s failed to set armclk rate\n", __func__);
-	}
-
-#ifndef CONFIG_USING_KERNEL_DTB
-	rk3308_clk_get_pll_rate(priv);
-
-	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
-	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
-	rk3308_bus_set_clk(priv, PCLK_BUS, BUS_PCLK_HZ);
-
-	rk3308_peri_set_clk(priv, ACLK_PERI, PERI_ACLK_HZ);
-	rk3308_peri_set_clk(priv, HCLK_PERI, PERI_HCLK_HZ);
-	rk3308_peri_set_clk(priv, PCLK_PERI, PERI_PCLK_HZ);
-
-	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
-	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
-#endif
-}
-
 static ulong rk3308_i2c_get_clk(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -707,8 +672,6 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
-	rk3308_clk_get_pll_rate(priv);
-
 	debug("%s id:%ld\n", __func__, clk->id);
 
 	switch (clk->id) {
@@ -781,8 +744,6 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	rk3308_clk_get_pll_rate(priv);
-
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 
 	switch (clk->id) {
@@ -973,9 +934,42 @@ static struct clk_ops rk3308_clk_ops = {
 	.set_phase	= rk3308_clk_set_phase,
 };
 
+static void rk3308_clk_init(struct udevice *dev)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	if (rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ) {
+		ret = rk3308_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
+
+	rk3308_clk_get_pll_rate(priv);
+
+	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
+	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
+	rk3308_bus_set_clk(priv, PCLK_BUS, BUS_PCLK_HZ);
+
+	rk3308_peri_set_clk(priv, ACLK_PERI, PERI_ACLK_HZ);
+	rk3308_peri_set_clk(priv, HCLK_PERI, PERI_HCLK_HZ);
+	rk3308_peri_set_clk(priv, PCLK_PERI, PERI_PCLK_HZ);
+
+	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
+	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
+}
+
 static int rk3308_clk_probe(struct udevice *dev)
 {
-	rkclk_init(dev);
+	int ret;
+
+	rk3308_clk_init(dev);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 
 	return 0;
 }

commit 03a6c0298940781f1b9a2599a8e2c3e5aa2189dc
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 19:22:08 2018 +0800

    rockchip: clk: rk3308: Add support to set and get armclk rate
    
    Change-Id: I2f4bbed7d6c43f340892968ce8e2ed417f975e97
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 708d8bd4b2..ba331115b3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -47,7 +47,7 @@ struct rk3308_clk_info {
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
-	ulong apll_hz;
+	ulong armclk_hz;;
 	ulong dpll_hz;
 	ulong vpll0_hz;
 	ulong vpll1_hz;
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3421d786d5..1646d7c6ab 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -34,6 +34,13 @@ enum {
 	.name = _name,				\
 }
 
+#define RK3308_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
 static struct rockchip_pll_rate_table rk3308_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	RK3036_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
@@ -42,6 +49,13 @@ static struct rockchip_pll_rate_table rk3308_pll_rates[] = {
 	RK3036_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
 };
 
+static struct rockchip_cpu_rate_table rk3308_cpu_rates[] = {
+	RK3308_CPUCLK_RATE(1200000000, 1, 5),
+	RK3308_CPUCLK_RATE(1008000000, 1, 5),
+	RK3308_CPUCLK_RATE(816000000, 1, 3),
+	RK3308_CPUCLK_RATE(600000000, 1, 3),
+};
+
 static const struct rk3308_clk_info clks_dump[] = {
 	RK3308_CLK_DUMP(PLL_APLL, "apll"),
 	RK3308_CLK_DUMP(PLL_DPLL, "dpll"),
@@ -75,6 +89,52 @@ static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
 				  ulong clk_id, ulong hz);
 
+static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rk3308_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	old_rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+	}
+
+	return rockchip_pll_get_rate(&rk3308_pll_clks[APLL], priv->cru, APLL);
+}
+
 static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 {
 	if (!priv->dpll_hz)
@@ -91,30 +151,14 @@ static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 static void rkclk_init(struct udevice *dev)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
-	struct rk3308_cru *cru = priv->cru;
-	u32 aclk_div, pclk_div;
-
-	/* init pll */
-	if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL], priv->cru, APLL,
-				  APLL_HZ))
-		printf("%s set apll unsuccessfully\n", __func__);
+	int ret;
 
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PCLK and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	priv->apll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
-					      priv->cru, APLL);
-	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
-	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_DBG_DIV_SHIFT |
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
+	if (rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ) {
+		ret = rk3308_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
 
 #ifndef CONFIG_USING_KERNEL_DTB
 	rk3308_clk_get_pll_rate(priv);
@@ -669,6 +713,7 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 	switch (clk->id) {
 	case PLL_APLL:
+	case ARMCLK:
 		rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
 					     priv->cru, APLL);
 		break;
@@ -747,6 +792,11 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 		priv->dpll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
 						      priv->cru, DPLL);
 		break;
+	case ARMCLK:
+		if (priv->armclk_hz)
+			rk3308_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:

commit 27ee7641c93d0473a4fa1648bcd6106e65b6ba31
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 18:01:00 2018 +0800

    rockchip: clk: rk3308: Use common apis for setting and getting pll rate
    
    Change-Id: Id60ebe239148c7fa7bb8ca1abb411570596c6e28
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index ca74a833d7..708d8bd4b2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -27,6 +27,9 @@
 #define AUDIO_HCLK_HZ	100000000
 #define AUDIO_PCLK_HZ	100000000
 
+#define RK3308_PLL_CON(x)	((x) * 0x4)
+#define RK3308_MODE_CON		0xa0
+
 /* RK3308 pll id */
 enum rk3308_pll_id {
 	APLL,
@@ -41,16 +44,6 @@ struct rk3308_clk_info {
 	char *name;
 };
 
-struct pll_rate_table {
-	unsigned long rate;
-	unsigned int fbdiv;
-	unsigned int postdiv1;
-	unsigned int refdiv;
-	unsigned int postdiv2;
-	unsigned int dsmpd;
-	unsigned int frac;
-};
-
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 93e4e7d6fb..3421d786d5 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -34,34 +34,12 @@ enum {
 	.name = _name,				\
 }
 
-#define RK3308_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
-			_postdiv2, _dsmpd, _frac)		\
-{								\
-	.rate	= _rate##U,					\
-	.fbdiv = _fbdiv,					\
-	.postdiv1 = _postdiv1,					\
-	.refdiv = _refdiv,					\
-	.postdiv2 = _postdiv2,					\
-	.dsmpd = _dsmpd,					\
-	.frac = _frac,						\
-}
-
-static struct pll_rate_table rk3308_pll_rates[] = {
+static struct rockchip_pll_rate_table rk3308_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
-	RK3308_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
-	RK3308_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
-	RK3308_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
-	RK3308_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
-};
-
-static u8 pll_mode_shift[PLL_COUNT] = {
-	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, VPLL0_MODE_SHIFT,
-	VPLL1_MODE_SHIFT
-};
-
-static u32 pll_mode_mask[PLL_COUNT] = {
-	APLL_MODE_MASK, DPLL_MODE_MASK, VPLL0_MODE_MASK,
-	VPLL1_MODE_MASK
+	RK3036_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
 };
 
 static const struct rk3308_clk_info clks_dump[] = {
@@ -79,6 +57,17 @@ static const struct rk3308_clk_info clks_dump[] = {
 	RK3308_CLK_DUMP(PCLK_AUDIO, "pclk_audio"),
 };
 
+static struct rockchip_pll_clock rk3308_pll_clks[] = {
+	[APLL] = PLL(pll_rk3328, PLL_APLL, RK3308_PLL_CON(0),
+		     RK3308_MODE_CON, 0, 10, 0, rk3308_pll_rates),
+	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3308_PLL_CON(8),
+		     RK3308_MODE_CON, 2, 10, 0, NULL),
+	[VPLL0] = PLL(pll_rk3328, PLL_VPLL0, RK3308_PLL_CON(16),
+		      RK3308_MODE_CON, 4, 10, 0, NULL),
+	[VPLL1] = PLL(pll_rk3328, PLL_VPLL1, RK3308_PLL_CON(24),
+		      RK3308_MODE_CON, 6, 10, 0, NULL),
+};
+
 static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 				ulong hz);
 static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
@@ -86,152 +75,17 @@ static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
 				  ulong clk_id, ulong hz);
 
-static const struct pll_rate_table *get_pll_settings(unsigned long rate)
-{
-	unsigned int rate_count = ARRAY_SIZE(rk3308_pll_rates);
-	int i;
-
-	for (i = 0; i < rate_count; i++) {
-		if (rate == rk3308_pll_rates[i].rate)
-			return &rk3308_pll_rates[i];
-	}
-
-	return NULL;
-}
-
-/*
- * How to calculate the PLL:
- * Formulas also embedded within the Fractional PLL Verilog model:
- * If DSMPD = 1 (DSM is disabled, "integer mode")
- * FOUTVCO = FREF / REFDIV * FBDIV
- * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
- * Where:
- * FOUTVCO = Fractional PLL non-divided output frequency
- * FOUTPOSTDIV = Fractional PLL divided output frequency
- *               (output of second post divider)
- * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
- * REFDIV = Fractional PLL input reference clock divider
- * FBDIV = Integer value programmed into feedback divide
- *
- */
-
-static int rkclk_set_pll(struct rk3308_clk_priv *priv,
-			 enum rk3308_pll_id pll_id,
-			 unsigned long drate)
-{
-	struct rk3308_cru *cru = priv->cru;
-	struct rk3308_pll *pll;
-	unsigned int *mode;
-	const struct pll_rate_table *rate;
-	uint vco_hz, output_hz;
-
-	rate = get_pll_settings(drate);
-	if (!rate) {
-		printf("%s unsupport rate\n", __func__);
-		return -EINVAL;
-	}
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000;
-	output_hz = vco_hz / rate->postdiv1 / rate->postdiv2;
-
-	pll = &cru->pll[pll_id];
-	mode = &cru->mode;
-
-	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, rate->fbdiv, rate->refdiv, rate->postdiv1,
-	      rate->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/*
-	 * When power on or changing PLL setting,
-	 * we must force PLL into slow mode to ensure output stable clock.
-	 */
-	rk_clrsetreg(mode, pll_mode_mask[pll_id],
-		     PLLMUX_FROM_XIN24M << pll_mode_shift[pll_id]);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (rate->postdiv1 << PLL_POSTDIV1_SHIFT) | rate->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (rate->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     rate->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (!(readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT)))
-		udelay(1);
-
-	rk_clrsetreg(mode, pll_mode_mask[pll_id],
-		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
-
-	return 0;
-}
-
-static uint32_t rkclk_pll_get_rate(struct rk3308_clk_priv *priv,
-				   enum rk3308_pll_id pll_id)
-{
-	struct rk3308_cru *cru = priv->cru;
-	struct rk3308_pll *pll;
-	u32 con, refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
-	u32 rate = 0;
-	u64 frac_rate64 = 0;
-	uint shift;
-	uint mask;
-
-	pll = &cru->pll[pll_id];
-	con = readl(&cru->mode);
-
-	shift = pll_mode_shift[pll_id];
-	mask = pll_mode_mask[pll_id];
-
-	switch ((con & mask) >> shift) {
-	case PLLMUX_FROM_XIN24M:
-		return OSC_HZ;
-	case PLLMUX_FROM_PLL:
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		dsmpd = (con & PLL_DSMPD_MASK) >> PLL_DSMPD_SHIFT;
-		con = readl(&pll->con2);
-		frac = con & PLL_FRAC_DIV;
-		rate = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-		if (dsmpd == 0) {
-			/* fractional mode */
-			frac_rate64 = 24000000 * (u64)frac;
-			do_div(frac_rate64, refdiv);
-			frac_rate64 >>= 24;
-			do_div(frac_rate64, postdiv1);
-			do_div(frac_rate64, postdiv2);
-			rate += (uint32_t)frac_rate64;
-		}
-		return rate;
-	case PLLMUX_FROM_RTC32K:
-	default:
-		return 32768;
-	}
-}
-
 static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
 {
 	if (!priv->dpll_hz)
-		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
+		priv->dpll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+						      priv->cru, DPLL);
 	if (!priv->vpll0_hz)
-		priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
+		priv->vpll0_hz = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0],
+						       priv->cru, VPLL0);
 	if (!priv->vpll1_hz)
-		priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+		priv->vpll1_hz = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1],
+						       priv->cru, VPLL1);
 }
 
 static void rkclk_init(struct udevice *dev)
@@ -241,7 +95,8 @@ static void rkclk_init(struct udevice *dev)
 	u32 aclk_div, pclk_div;
 
 	/* init pll */
-	if (rkclk_set_pll(priv, APLL, APLL_HZ))
+	if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL], priv->cru, APLL,
+				  APLL_HZ))
 		printf("%s set apll unsuccessfully\n", __func__);
 
 	/*
@@ -249,7 +104,8 @@ static void rkclk_init(struct udevice *dev)
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	priv->apll_hz = rkclk_pll_get_rate(priv, APLL);
+	priv->apll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+					      priv->cru, APLL);
 	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
 	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
@@ -813,16 +669,20 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 	switch (clk->id) {
 	case PLL_APLL:
-		rate = rkclk_pll_get_rate(priv, APLL);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL],
+					     priv->cru, APLL);
 		break;
 	case PLL_DPLL:
-		rate = rkclk_pll_get_rate(priv, DPLL);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+					     priv->cru, DPLL);
 		break;
 	case PLL_VPLL0:
-		rate = rkclk_pll_get_rate(priv, VPLL0);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL0],
+					     priv->cru, VPLL0);
 		break;
 	case PLL_VPLL1:
-		rate = rkclk_pll_get_rate(priv, VPLL1);
+		rate = rockchip_pll_get_rate(&rk3308_pll_clks[VPLL1],
+					     priv->cru, VPLL1);
 		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
@@ -882,8 +742,10 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 
 	switch (clk->id) {
 	case PLL_DPLL:
-		ret = rkclk_set_pll(priv, DPLL, rate);
-		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
+		ret = rockchip_pll_set_rate(&rk3308_pll_clks[DPLL], priv->cru,
+					    DPLL, rate);
+		priv->dpll_hz = rockchip_pll_get_rate(&rk3308_pll_clks[DPLL],
+						      priv->cru, DPLL);
 		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:

commit c996ae8a4350d18091d4d3e23cf5a83a95be90e1
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 15:51:13 2018 +0800

    rockchip: clk: px30: Add support to get vopl aclk and dclk
    
    Change-Id: Id40cbddf780889e308839b7beb2cfb894d407914
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 1e58d9082b..f94def58ca 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -209,8 +209,8 @@ enum {
 	DCLK_VOPL_SEL_24M,
 	DCLK_VOPL_PLL_SEL_SHIFT	= 11,
 	DCLK_VOPL_PLL_SEL_MASK	= 0x1 << DCLK_VOPL_PLL_SEL_SHIFT,
-	DCLK_VOPL_PLL_SEL_CPLL	= 0,
-	DCLK_VOPL_PLL_SEL_NPLL,
+	DCLK_VOPL_PLL_SEL_NPLL	= 0,
+	DCLK_VOPL_PLL_SEL_CPLL,
 	DCLK_VOPL_DIV_SHIFT	= 0,
 	DCLK_VOPL_DIV_MASK	= 0xff,
 
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a2bb393b38..888dbd3697 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -611,6 +611,7 @@ static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 
 	switch (clk_id) {
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 		con = readl(&cru->clksel_con[3]);
 		div = con & ACLK_VO_DIV_MASK;
 		parent = priv->gpll_hz;
@@ -620,6 +621,11 @@ static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 		div = con & DCLK_VOPB_DIV_MASK;
 		parent = rkclk_pll_get_rate(&cru->pll[CPLL], &cru->mode, CPLL);
 		break;
+	case DCLK_VOPL:
+		con = readl(&cru->clksel_con[8]);
+		div = con & DCLK_VOPL_DIV_MASK;
+		parent = rkclk_pll_get_rate(&cru->pll[NPLL], &cru->mode, NPLL);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -670,7 +676,7 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			assert(src_clk_div - 1 <= 255);
 			rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, hz * src_clk_div);
 		}
-		rk_clrsetreg(&cru->clksel_con[5],
+		rk_clrsetreg(&cru->clksel_con[8],
 			     DCLK_VOPL_SEL_MASK | DCLK_VOPL_PLL_SEL_MASK |
 			     DCLK_VOPL_DIV_MASK,
 			     DCLK_VOPL_SEL_DIVOUT << DCLK_VOPL_SEL_SHIFT |

commit fe784db32b6550168a145425061e0406221c413b
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Aug 6 11:59:29 2018 +0800

    rockchip: clk: px30: Add px30_clk_init()
    
    Add support to initialize gpll, bus and peri clock rate.
    
    Change-Id: I84f496094606ac2231ea27ad9072b079c45f9f94
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 0120227587..1e58d9082b 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -13,6 +13,13 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(600 * MHz)
+#define GPLL_HZ		(1200 * MHz)
+#define ACLK_BUS_HZ	(200 * MHz)
+#define HCLK_BUS_HZ	(150 * MHz)
+#define PCLK_BUS_HZ	(100 * MHz)
+#define ACLK_PERI_HZ	(200 * MHz)
+#define HCLK_PERI_HZ	(150 * MHz)
+#define PCLK_PMU_HZ	(100 * MHz)
 
 /* PX30 pll id */
 enum px30_pll_id {
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 2c1e05921b..a2bb393b38 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1402,12 +1402,43 @@ static struct clk_ops px30_pmuclk_ops = {
 	.set_rate = px30_pmuclk_set_rate,
 };
 
+static void px30_clk_init(struct px30_pmuclk_priv *priv)
+{
+	struct udevice *cru_dev;
+	struct px30_clk_priv *cru_priv;
+	int ret;
+
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+	if (priv->gpll_hz != GPLL_HZ) {
+		ret = px30_gpll_set_pmuclk(priv, GPLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set gpll rate\n", __func__);
+	}
+
+	ret = uclass_get_device_by_name(UCLASS_CLK,
+					"clock-controller@ff2b0000",
+					 &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return;
+	}
+	cru_priv = dev_get_priv(cru_dev);
+	cru_priv->gpll_hz = priv->gpll_hz;
+
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, ACLK_BUS_HZ);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, HCLK_BUS_HZ);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, PCLK_BUS_HZ);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, ACLK_PERI_HZ);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, HCLK_PERI_HZ);
+	px30_pclk_pmu_set_pmuclk(priv, PCLK_PMU_HZ);
+}
+
 static int px30_pmuclk_probe(struct udevice *dev)
 {
 	struct px30_pmuclk_priv *priv = dev_get_priv(dev);
 	int ret;
 
-	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+	px30_clk_init(priv);
 
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);

commit eab74a9212f9b2880013473bf3a1bfcbfd60b3f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 16:45:29 2018 +0800

    rockchip: sdram: reserve OP-TEE region when CONFIG_ARM64_BOOT_AARCH32 enabled.
    
    Because OP-TEE runs on AArch64 mode and enables dcache, U-Boot should also
    map its region cacheable.
    
    Change-Id: I3d3f1f869ecfe3c39c8ba56c1165e1d2fdac035a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 16e5c4eb28..f410fec514 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -62,7 +62,7 @@ int dram_init_banksize(void)
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	struct tos_parameter_t *tos_parameter;
-	u32 checksum;
+	u32 checksum __maybe_unused;
 
 	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
 			TRUST_PARAMETER_OFFSET);
@@ -78,6 +78,40 @@ int dram_init_banksize(void)
 #endif
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 
+/*
+ * OP-TEE:
+ *	ARM64(AArch32) 64-bit: enable dcache; (U-boot: map region dcache cachable)
+ *	ARM 32-bit: disable dcache; (U-boot: map region dcache off)
+ */
+
+#if !defined(CONFIG_ARM64_BOOT_AARCH32)
+	if ((checksum == tos_parameter->checksum) &&
+	    (tos_parameter->tee_mem.flags == 1)) {
+		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
+					- gd->bd->bi_dram[0].start;
+		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
+					tos_parameter->tee_mem.size;
+		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
+	}
+#endif
+
+	return 0;
+}
+
+#if defined(CONFIG_ARM64_BOOT_AARCH32)
+int dram_initr_banksize(void)
+{
+	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
+			 gd->ram_top);
+	struct tos_parameter_t *tos_parameter;
+	u32 checksum;
+
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+
+	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				  sizeof(struct tos_parameter_t) - 8);
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
@@ -90,6 +124,7 @@ int dram_init_banksize(void)
 	return 0;
 }
 #endif
+#endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {

commit 94fe42653b1cc4e47c28248aa7f2270b79fae32b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 16:23:37 2018 +0800

    Revert "rockchip: sdram: implement dram_initr_banksize()"
    
    This reverts commit a678796b79736409196ef15a17e5d22cbbc0f4fd.
    
    Change-Id: Ideec712dbb37ce212f9667a3cee756887d60c9fe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 548db9820a..16e5c4eb28 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -58,26 +58,6 @@ static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
 }
 
 int dram_init_banksize(void)
-{
-	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
-			 gd->ram_top);
-
-#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
-#else
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-#endif
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
-
-/*
- * Resever firmware region after MMU set up, we need firmware region to be mapped
- * as cacheable to communication with firmware by share memory.
- */
-int dram_initr_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
@@ -90,6 +70,14 @@ int dram_initr_banksize(void)
 	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
 				  sizeof(struct tos_parameter_t) - 8);
 
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
+	/* Reserve 0x200000 for ATF bl31 */
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
+#else
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+#endif
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr

commit f81a9e78e75a6b015adee7a446743fd346b03fa6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 11:31:14 2018 +0800

    env: fix env_exist/append/update() words match issue
    
    solve some words match mistakes due to strstr().
    
    Change-Id: I79ca9bc9ed1e9aeb5472e158650890023afa3da3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 96a4fab1c7..528b808c2b 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -301,23 +301,23 @@ static int env_append(const char *varname, const char *varvalue)
 	int len = 0;
 	char *oldvalue, *newvalue;
 
+	debug("%s: varvalue = %s\n", __func__, varvalue);
+
 	/* before import into hashtable */
 	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
 		return 1;
 
+	if (env_exist(varname, varvalue))
+		return 0;
+
+	debug("%s: reall append: %s\n", __func__, varvalue);
+
 	if (varvalue)
 		len += strlen(varvalue);
 
 	oldvalue = env_get(varname);
-	if (oldvalue) {
+	if (oldvalue)
 		len += strlen(oldvalue);
-		/* Exist ! */
-		if (strstr(oldvalue, varvalue)) {
-			debug("%s: '%s' is already exist in '%s'\n",
-			      __func__, varvalue, varname);
-			return 0;
-		}
-	}
 
 	newvalue = malloc(len + 2);
 	if (!newvalue) {
@@ -335,6 +335,7 @@ static int env_append(const char *varname, const char *varvalue)
 	if (varvalue)
 		strcat(newvalue, varvalue);
 
+	debug("%s: newvalue: %s\n", __func__, newvalue);
 	env_set(varname, newvalue);
 	free(newvalue);
 
@@ -423,7 +424,7 @@ int env_update_filter(const char *varname, const char *varvalue,
 	if (!varargs) {
 		env_set(varname, varvalue);
 		if (ignore && strstr(varvalue, ignore))
-			env_delete(varname, ignore);
+			env_delete(varname, ignore, 0);
 		return 0;
 	}
 
@@ -457,18 +458,23 @@ int env_update_filter(const char *varname, const char *varvalue,
 	 */
 	v_item = strtok(v_string_tok, " ");
 	while (v_item && j < ARGS_ITEM_NUM) {
-		debug("%s: <v_item %d>: %s\n", __func__, j, v_item);
+		debug("%s: <v_item %d>: %s ", __func__, j, v_item);
 
 		/* filter ignore string */
 		if (ignore && strstr(v_item, ignore)) {
 			v_item = strtok(NULL, " ");
+			debug("...ignore\n");
 			continue;
 		}
 
-		if (strstr(v_item, "="))
+		if (strstr(v_item, "=")) {
+			debug("\n");
 			v_items[j++] = v_item;
-		else
+		} else {
+			debug("... do append\n");
 			env_append(varname, v_item);
+		}
+
 		v_item = strtok(NULL, " ");
 	}
 
@@ -532,23 +538,69 @@ int env_update(const char *varname, const char *varvalue)
 	return env_update_filter(varname, varvalue, NULL);
 }
 
-int env_exist(const char *varname, const char *varvalue)
+#define VARVALUE_BUF_SIZE	512
+
+char *env_exist(const char *varname, const char *varvalue)
 {
-	char *value;
-	int ret = 0;
+	int len;
+	char *oldvalue, *p;
+	char buf[VARVALUE_BUF_SIZE];
 
 	/* before import into hashtable */
 	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
-		return 1;
+		return NULL;
 
-	value = env_get(varname);
-	if (value)
-		ret = strstr(value, varvalue) ? 1 : 0;
+	oldvalue = env_get(varname);
+	if (oldvalue) {
+		if (strlen(varvalue) > VARVALUE_BUF_SIZE) {
+			printf("%s: '%s' is too long than 512\n",
+			       __func__, varvalue);
+			return NULL;
+		}
 
-	return ret;
+		/* Match middle one ? */
+		snprintf(buf, VARVALUE_BUF_SIZE, " %s ", varvalue);
+		p = strstr(oldvalue, buf);
+		if (p) {
+			debug("%s: '%s' is already exist in '%s'(middle)\n",
+			      __func__, varvalue, varname);
+			return (p + 1);
+		} else {
+			debug("%s: not find in middle one\n", __func__);
+		}
+
+		/* Match last one ? */
+		snprintf(buf, VARVALUE_BUF_SIZE, " %s", varvalue);
+		p = strstr(oldvalue, buf);
+		if (p) {
+			if (*(p + strlen(varvalue) + 1) == '\0') {
+				debug("%s: '%s' is already exist in '%s'(last)\n",
+				      __func__, varvalue, varname);
+				return (p + 1);
+			}
+		} else {
+			debug("%s: not find in last one\n", __func__);
+		}
+
+		/* Match first one ? */
+		snprintf(buf, VARVALUE_BUF_SIZE, "%s ", varvalue);
+		p = strstr(oldvalue, buf);
+		if (p) {
+			len = strstr(p, " ") - oldvalue;
+			if (len == strlen(varvalue)) {
+				debug("%s: '%s' is already exist in '%s'(first)\n",
+				      __func__, varvalue, varname);
+				return p;
+			}
+		} else  {
+			debug("%s: not find in first one\n", __func__);
+		}
+	}
+
+	return NULL;
 }
 
-int env_delete(const char *varname, const char *varvalue)
+int env_delete(const char *varname, const char *varvalue, int complete_match)
 {
 	const char *str;
 	char *value, *start;
@@ -558,22 +610,25 @@ int env_delete(const char *varname, const char *varvalue)
 		return 1;
 
 	value = env_get(varname);
-	if (value) {
-		start = strstr(value, varvalue);
-		if (start) {
-			/* varvalue is not the last property */
-			str = strstr(start, " ");
-			if (str) {
-				/* Terminate, so cmdline can be dest for strcat() */
-				*start = '\0';
-				/* +1 to skip white space */
-				strcat((char *)value, (str + 1));
-			/* varvalue is the last property */
-			} else {
-				/* skip white space */
-				*(start - 1) = '\0';
-			}
-		}
+	if (!value)
+		return 0;
+
+	start = complete_match ?
+		env_exist(varname, varvalue) : strstr(value, varvalue);
+	if (!start)
+		return 0;
+
+	/* varvalue is not the last property */
+	str = strstr(start, " ");
+	if (str) {
+		/* Terminate, so cmdline can be dest for strcat() */
+		*start = '\0';
+		/* +1 to skip white space */
+		strcat((char *)value, (str + 1));
+	/* varvalue is the last property */
+	} else {
+		/* skip white space */
+		*(start - 1) = '\0';
 	}
 
 	return 0;
diff --git a/include/common.h b/include/common.h
index 911a6786bf..7c42b6453d 100644
--- a/include/common.h
+++ b/include/common.h
@@ -358,18 +358,19 @@ int env_update(const char *varname, const char *varvalue);
  *
  * @varname: Variable to look up
  * @value: Value to check
- * @return 1 if exist, 0 on error
+ * @return posItion of varvalue if exist, otherwise NULL
  */
-int env_exist(const char *varname, const char *varvalue);
+char *env_exist(const char *varname, const char *varvalue);
 
 /**
  * env_delete() - delete sub value of an environment variable
  *
  * @varname: Variable to look up
  * @value: Item head of value to delete
+ * @complete_match: complete match whole words
  * @return 0 if ok, 1 on error
  */
-int env_delete(const char *varname, const char *varvalue);
+int env_delete(const char *varname, const char *varvalue, int complete_match);
 
 /**
  * env_set_ulong() - set an environment variable to an integer

commit 7cef4c7ca2dc67fea175ca2b8721fdc30be96393
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 8 11:35:19 2018 +0800

    fdt_support: add more debug info when merge bootargs
    
    Change-Id: Ib01c2b20bf2b71fe3079febcfb3b4e77e874026a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index df8e1a2b0d..fc588c3340 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -299,10 +299,12 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ARCH_ROCKCHIP
 		const char *bootargs;
 
+		debug("uboot bootargs: %s\n\n", str);
 		for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
 			bootargs = fdt_getprop(fdt, nodeoffset,
 					       arr_bootargs[i], NULL);
 			if (bootargs) {
+				debug("kernel %s: %s\n\n", arr_bootargs[i], bootargs);
 				/*
 				 * Append kernel bootargs
 				 * If use AB system, delete default "root=" which route
@@ -333,7 +335,7 @@ int fdt_chosen(void *fdt)
 		}
 	}
 
-	debug("bootargs = %s\n", env_get("bootargs"));
+	debug("merged bootargs: %s\n\n", env_get("bootargs"));
 
 	return fdt_fixup_stdout(fdt, nodeoffset);
 }

commit 4d5449372f42e3a60f56e04dbcfc47ea8dd56b93
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 14:54:15 2018 +0800

    rk322x: enable CONFIG_SYS_CBSIZE to 2048
    
    Change-Id: I679763135529857f337d5fd7ccd34e8023ab6355
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 5efc3aaf88..3d98be4e32 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -11,7 +11,7 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
-#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
 

commit 19f6a169245a0647f7a292b0d590bcc0a48e5203
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Aug 7 14:27:34 2018 +0800

    part: rkparm: add RKPARAM_ENTRY_NUMBERS definition
    
    rkparam shouldn't depends on GPT partition.
    
    Change-Id: Ifc235c4166facadfc2fe0eb6b08ce7fd8850738b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 8e2f37163f..b4a4359f4f 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -213,7 +213,7 @@ static int part_test_rkparm(struct blk_desc *dev_desc)
 U_BOOT_PART_TYPE(b_rkparm) = {
 	.name		= "RKPARM",
 	.part_type	= PART_TYPE_RKPARM,
-	.max_entries	= GPT_ENTRY_NUMBERS,
+	.max_entries	= RKPARM_ENTRY_NUMBERS,
 	.get_info	= part_get_info_ptr(part_get_info_rkparm),
 	.print		= part_print_ptr(part_print_rkparm),
 	.test		= part_test_rkparm,
diff --git a/include/part.h b/include/part.h
index f8b04b08b0..5a42526d00 100644
--- a/include/part.h
+++ b/include/part.h
@@ -36,6 +36,7 @@ struct block_drvr {
 #define ISO_ENTRY_NUMBERS	64
 #define MAC_ENTRY_NUMBERS	64
 #define AMIGA_ENTRY_NUMBERS	8
+#define RKPARM_ENTRY_NUMBERS	128
 /*
  * Type string for U-Boot bootable partitions
  */

commit d156c9ff6fddc6358d6746127b8dc4e9ca224857
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jul 20 17:56:28 2018 +0800

    lib: optee_client: v2 client support compile to 32 bits
    
    Change-Id: I25cbbe486016cbe6fb1a6eff440bb7efab46a4c6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 5f07f84d31..810665f3af 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -147,7 +147,7 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 		debug("return size of TA, keymaster_size = 0x%x", keymaster_size);
 		TeeSmc32Param[1].u.memref.size = keymaster_size;
 	} else {
-		memcpy((void *)TeeSmc32Param[1].u.memref.buf_ptr,
+		memcpy((void *)(size_t)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
 		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
 			TeeSmc32Param[1].u.memref.buf_ptr,
@@ -571,7 +571,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #endif
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
-			(t_teesmc32_arg *)((size_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
+			(t_teesmc32_arg *)(size_t)((uint64_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
 		debug("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index 53cb8f16cf..e5834d64db 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -724,7 +724,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
-	filename = (char *)params[1].u.memref.shm_id;
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
@@ -733,7 +733,7 @@ static uint32_t ree_fs_new_open(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_open open file: %s, len: %lu \n", filename, strlen(filename));
+	debug("ree_fs_new_open open file: %s, len: %zu \n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd < 0) {
 		debug("ree_fs_new_open : no such file. %s", filename);
@@ -756,7 +756,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
 	 * if file exists, we must remove it first.
 	 */
-	filename = (char *)params[1].u.memref.shm_id;
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!filename)
@@ -767,7 +767,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 		return TEEC_ERROR_BAD_PARAMETERS;
 	}
 
-	debug("ree_fs_new_create create file: %s, len: %lu \n", filename, strlen(filename));
+	debug("ree_fs_new_create create file: %s, len: %zu \n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
 	if (fd >= 0) {
 		debug("ree_fs_new_create : file exist, clear it. %s", filename);
@@ -832,7 +832,7 @@ static TEEC_Result ree_fs_new_read(size_t num_params,
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
 
-	data = (uint8_t *)params[1].u.memref.shm_id;
+	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
@@ -898,7 +898,7 @@ static TEEC_Result ree_fs_new_write(size_t num_params,
 	fd = params[0].u.value.b;
 	offs = params[0].u.value.c;
 
-	data = (uint8_t *)params[1].u.memref.shm_id;
+	data = (uint8_t *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!data)
@@ -1045,7 +1045,7 @@ static TEEC_Result ree_fs_new_remove(size_t num_params,
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
-	filename = (char *)params[1].u.memref.shm_id;
+	filename = (char *)(size_t)params[1].u.memref.shm_id;
 	if (!filename)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
@@ -1092,13 +1092,13 @@ static TEEC_Result ree_fs_new_rename(size_t num_params,
 	struct rkss_file_info p = {0};
 	int ret;
 
-	old_fname = (char *)params[1].u.memref.shm_id;
+	old_fname = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!old_fname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
-	new_fname = (char *)params[2].u.memref.shm_id;
+	new_fname = (char *)(size_t)params[2].u.memref.shm_id;
 	debug("params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
 		params[2].u.memref.shm_id, params[2].u.memref.shm_offs);
 	if (!new_fname)
@@ -1137,7 +1137,7 @@ static TEEC_Result ree_fs_new_opendir(size_t num_params,
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 
-	dirname = (char *)params[1].u.memref.shm_id;
+	dirname = (char *)(size_t)params[1].u.memref.shm_id;
 	if (!dirname)
 		return TEEC_ERROR_BAD_PARAMETERS;
 
@@ -1173,7 +1173,7 @@ static TEEC_Result ree_fs_new_readdir(size_t num_params,
 	size_t len;
 	size_t dirname_len;
 
-	dirname = (char *) params[1].u.memref.shm_id;
+	dirname = (char *)(size_t)params[1].u.memref.shm_id;
 	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
 		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
 	if (!dirname)
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index 8e2aaffb34..a3848c576a 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -115,7 +115,7 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 #endif
 
 #ifdef CONFIG_OPTEE_V2
-#ifdef CONFIG_ARM64
+#if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 	uint8_t * session_uuid = (uint8_t *)&TeeSmcMetaSession->uuid;
 	tee_uuid_to_octets(session_uuid, destination);
 	memcpy((void *)&TeeSmc32Param[0].u.value, &TeeSmcMetaSession->uuid, sizeof(TeeSmcMetaSession->uuid));
@@ -307,7 +307,7 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 #endif
 
 #ifdef CONFIG_OPTEE_V2
-#ifdef CONFIG_ARM64
+#if defined CONFIG_ARM64 || defined CONFIG_ARM64_BOOT_AARCH32
 			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
 			debug(" OPTEE_OS_V2 ARCH64 attr %x\n", attr);
 #else
@@ -376,7 +376,7 @@ TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
 
 	while (1) {
 		tee_smc_call(&ArmSmcArgs);
-		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x \n",
 			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
 			(void) OpteeRpcCallback(&ArmSmcArgs);

commit a678796b79736409196ef15a17e5d22cbbc0f4fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 3 11:41:01 2018 +0800

    rockchip: sdram: implement dram_initr_banksize()
    
    We reserve firmware region after MMU is enabled and translation
    table set up, so that the region can be mapped as cacheable to
    communicate with firmware by share memory.
    
    Change-Id: I9ba6fc1bc5e8b794dcf5e693fbc2a29a8f2187d3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 16e5c4eb28..548db9820a 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -61,14 +61,6 @@ int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
-	struct tos_parameter_t *tos_parameter;
-	u32 checksum;
-
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-
-	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
-				  sizeof(struct tos_parameter_t) - 8);
 
 #if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
 	/* Reserve 0x200000 for ATF bl31 */
@@ -78,6 +70,26 @@ int dram_init_banksize(void)
 #endif
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 
+	return 0;
+}
+
+/*
+ * Resever firmware region after MMU set up, we need firmware region to be mapped
+ * as cacheable to communication with firmware by share memory.
+ */
+int dram_initr_banksize(void)
+{
+	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
+			 gd->ram_top);
+	struct tos_parameter_t *tos_parameter;
+	u32 checksum;
+
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+
+	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				  sizeof(struct tos_parameter_t) - 8);
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr

commit f4d148502c88fff6c8ec8e0f911291ab658a47da
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Aug 3 11:40:08 2018 +0800

    board_r: add dram_initr_banksize()
    
    Some platform requires to reserve memory regions for some firmware
    to avoid kernel touches it, but U-Boot may have communication with
    firmware by share memory. So that we had better reserve firmware
    region after the initr_caches() which enables MMU and init
    translation table, we need firmware region to be mapped as cacheable
    like other regions, otherwise there would be dcache coherence issue
    between firmware and U-Boot.
    
    Change-Id: Icb986022b484c96dffcafc98972ae24362cb8e4b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index e8ca37294e..1e5847dda3 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -657,6 +657,11 @@ __weak int interrupt_debugger_init(void)
 	return 0;
 }
 
+__weak int dram_initr_banksize(void)
+{
+	return 0;
+}
+
 static int run_main_loop(void)
 {
 #ifdef CONFIG_SANDBOX
@@ -691,6 +696,18 @@ static init_fnc_t init_sequence_r[] = {
 	 */
 #endif
 	initr_reloc_global_data,
+
+	/*
+	 * Some platform requires to reserve memory regions for some firmware
+	 * to avoid kernel touches it, but U-Boot may have communication with
+	 * firmware by share memory. So that we had better reserve firmware
+	 * region after the initr_caches() which enables MMU and init
+	 * translation table, we need firmware region to be mapped as cacheable
+	 * like other regions, otherwise there would be dcache coherence issue
+	 * between firmware and U-Boot.
+	 */
+	dram_initr_banksize,
+
 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
 	initr_unlock_ram_in_cache,
 #endif

commit bb14c03be03fe8c37fbc0cddcb6ff570f927ae86
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 7 10:20:20 2018 +0800

    rockchip: rk3328: increase spl size
    
    Since we have TPL, the SPL is actually running in SDRAM and there
    should be no size limit by sram size.
    
    Change-Id: Ic466777c51e75c9ac83c1cc7be926a0f2c0cacaa
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 537bdea9c9..3e41d4d9b6 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -20,7 +20,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE             0x10000
+#define CONFIG_SPL_MAX_SIZE             0x100000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */

commit f7c0370c61e0bddb75b6c77373ebbacae1e904ab
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 26 11:30:17 2018 +0800

    mmc: dw_mmc: fix timeout error
    
    If data error, we will reset the controller and wait when it is
    ready. But the timeout data type is u32, it is never less than
    zero. So change judgement data to one.
    
    Change-Id: If049da06ecfe42fd31cca344bf87f69f7850dbe2
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 1603f15f07..5f894297ed 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -157,6 +157,7 @@ static void dwmci_prepare_data(struct dwmci_host *host,
 static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 {
 	int ret = 0;
+	int reset_timeout = 100;
 	u32 timeout = 240000;
 	u32 status, ctrl, mask, size, i, len = 0;
 	u32 *buf = NULL;
@@ -185,8 +186,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 
 			do {
 				status = dwmci_readl(host, DWMCI_CMD);
-				if (timeout-- < 0)
-					ret = -ETIMEDOUT;
+				if (reset_timeout-- < 0)
+					break;
+				udelay(100);
 			} while (status & DWMCI_CMD_START);
 
 			if (!host->fifo_mode) {

commit 8e2239d5ebe4ccd10f3de593a1236b21d7cc1a61
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Aug 3 09:49:25 2018 +0800

    clk: rockchip: rk3328: replenish some CLK settings
    
    Change-Id: I33e6ff57c2d616c933a458dade9a751460d0bc9a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 1df4312f7c..15711ba844 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -37,15 +37,15 @@ static struct rockchip_pll_rate_table rk3328_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
 #ifndef CONFIG_SPL_BUILD
-	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
 	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
 #endif
 	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
-	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 1, 200, 6, 1, 1, 0),
 	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
 #ifndef CONFIG_SPL_BUILD
-	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
-	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
 #endif
 	{ /* sentinel */ },
 };
@@ -123,7 +123,7 @@ static ulong rk3328_armclk_set_clk(struct rk3328_clk_priv *priv, ulong hz)
 
 	rate = rockchip_get_cpu_settings(rk3328_cpu_rates, hz);
 	if (!rate) {
-		printf("%s unsupport rate\n", __func__);
+		printf("%s unsupported rate\n", __func__);
 		return -EINVAL;
 	}
 
@@ -406,16 +406,19 @@ static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
 
 	switch (clk_id) {
 	case ACLK_VOP_PRE:
+	case ACLK_VOP:
 		con = readl(&cru->clksel_con[39]);
 		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
 		parent = priv->cpll_hz;
 		break;
 	case ACLK_VIO_PRE:
+	case ACLK_VIO:
 		con = readl(&cru->clksel_con[37]);
 		div = (con & ACLK_VIO_DIV_CON_MASK) >> ACLK_VIO_DIV_CON_SHIFT;
 		parent = priv->cpll_hz;
 		break;
 	case HCLK_VIO_PRE:
+	case HCLK_VIO:
 		parent = rk3328_vop_get_clk(priv, ACLK_VIO_PRE);
 		con = readl(&cru->clksel_con[37]);
 		div = (con & HCLK_VIO_DIV_CON_MASK) >> HCLK_VIO_DIV_CON_SHIFT;
@@ -439,18 +442,21 @@ static ulong rk3328_vop_set_clk(struct rk3328_clk_priv *priv,
 
 	switch (clk_id) {
 	case ACLK_VOP_PRE:
+	case ACLK_VOP:
 		rk_clrsetreg(&cru->clksel_con[39],
 			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
 			     ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
 		break;
 	case ACLK_VIO_PRE:
+	case ACLK_VIO:
 		rk_clrsetreg(&cru->clksel_con[37],
 			     ACLK_VIO_PLL_SEL_MASK | ACLK_VIO_DIV_CON_MASK,
 			     ACLK_VIO_PLL_SEL_CPLL << ACLK_VIO_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << ACLK_VIO_DIV_CON_SHIFT);
 		break;
 	case HCLK_VIO_PRE:
+	case HCLK_VIO:
 		src_clk_div = DIV_ROUND_UP(rk3328_vop_get_clk(priv,
 							      ACLK_VIO_PRE),
 					   hz);
@@ -693,6 +699,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
 	case HCLK_VIO_PRE:
+	case ACLK_VOP:
+	case ACLK_VIO:
+	case HCLK_VIO:
 		rate = rk3328_vop_get_clk(priv, clk->id);
 		break;
 #endif
@@ -764,6 +773,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case ACLK_VOP_PRE:
 	case ACLK_VIO_PRE:
 	case HCLK_VIO_PRE:
+	case ACLK_VOP:
+	case ACLK_VIO:
+	case HCLK_VIO:
 		rate = rk3328_vop_set_clk(priv, clk->id, rate);
 		break;
 #endif
@@ -932,6 +944,20 @@ static void rkclk_init(struct rk3328_clk_priv *priv)
 				  priv->cru, NPLL) != APLL_HZ)
 		rk3328_armclk_set_clk(priv, APLL_HZ);
 
+	priv->gpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[GPLL],
+					      priv->cru, GPLL);
+	priv->cpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[CPLL],
+					      priv->cru, CPLL);
+
+	/* before set pll set child div first */
+	rk_clrsetreg(&priv->cru->clksel_con[24], (0x3f << 8) | (0x3f << 0),
+		     (0x17 << 8) | (0x17 << 0));
+	rk_clrsetreg(&priv->cru->clksel_con[27], (0x1f << 8) | (0x1f << 0),
+		     (0x17 << 8) | (0x17 << 0));
+	rk_clrsetreg(&priv->cru->clksel_con[31], 0xff << 0, 0xb << 0);
+	rk_clrsetreg(&priv->cru->clksel_con[43], 0xff << 0, 0xb << 0);
+	rk_clrsetreg(&priv->cru->clksel_con[52], 0x1f << 8, 0x5 << 8);
+
 	rockchip_pll_set_rate(&rk3328_pll_clks[GPLL],
 			      priv->cru, GPLL, GPLL_HZ);
 	priv->gpll_hz = GPLL_HZ;

commit 5e347bef3ecba3479ac200d8f13b730b96ab2f06
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jul 10 15:38:28 2018 +0800

    regulator: rk816: support rk816 ES2 chip
    
    Change-Id: Idaba0e148b520e2d43d2185461acaab3ff9cb16d
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 498597c047..966243934e 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -275,6 +275,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
 	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
 	int mask = info->vsel_mask;
 	int val;
 
@@ -289,7 +290,12 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
 	      __func__, uvolt, buck+1, info->vsel_reg, mask, val);
 
-	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
+	if (priv->variant == RK816_ID) {
+		pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
+		return pmic_clrsetbits(pmic, RK816_REG_DCDC_EN2, 1 << 7, 1 << 7);
+	} else {
+		return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
+	}
 }
 
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)

commit 7150785e4468c4225757a3bc39c3a50fe0fdeec9
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Aug 3 17:40:53 2018 +0800

    rockchip: clk: rk3368: support more clks to set and get rate
    
    Make clock ids consistent with kernel.
    Support more clks to set and get rate.
    Add clk dump.
    
    Change-Id: I348c98ce81ce76af9c492a30480fcb495da7ed79
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 6a6fe4775d..fa4e472302 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -20,6 +20,12 @@ enum rk3368_pll_id {
 	PLL_COUNT,
 };
 
+struct rk3368_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 struct rk3368_cru {
 	struct rk3368_pll {
 		unsigned int con0;
@@ -79,6 +85,43 @@ enum {
 	PLL_RESET			= 1,
 	PLL_RESET_MASK			= GENMASK(5, 5),
 
+	/* CLKSEL1CON */
+	CORE_ACLK_DIV_SHIFT		= 0,
+	CORE_ACLK_DIV_MASK		= 0x1f << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT		= 8,
+	CORE_DBG_DIV_MASK		= 0x1f << CORE_DBG_DIV_SHIFT,
+
+	CORE_CLK_PLL_SEL_SHIFT		= 7,
+	CORE_CLK_PLL_SEL_MASK		= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL		= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_DIV_CON_SHIFT		= 0,
+	CORE_DIV_CON_MASK		= 0x1f << CORE_DIV_CON_SHIFT,
+
+	/* CLKSEL8CON */
+	PCLK_BUS_DIV_CON_SHIFT		= 12,
+	PCLK_BUS_DIV_CON_MASK		= 0x7 << PCLK_BUS_DIV_CON_SHIFT,
+	HCLK_BUS_DIV_CON_SHIFT		= 8,
+	HCLK_BUS_DIV_CON_MASK		= 0x3 << HCLK_BUS_DIV_CON_SHIFT,
+	CLK_BUS_PLL_SEL_CPLL		= 0,
+	CLK_BUS_PLL_SEL_GPLL		= 1,
+	CLK_BUS_PLL_SEL_SHIFT		= 7,
+	CLK_BUS_PLL_SEL_MASK		= 1 << CLK_BUS_PLL_SEL_SHIFT,
+	ACLK_BUS_DIV_CON_SHIFT		= 0,
+	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+
+	/* CLKSEL9CON */
+	PCLK_PERI_DIV_CON_SHIFT		= 12,
+	PCLK_PERI_DIV_CON_MASK		= 0x3 << PCLK_PERI_DIV_CON_SHIFT,
+	HCLK_PERI_DIV_CON_SHIFT		= 8,
+	HCLK_PERI_DIV_CON_MASK		= 3 << HCLK_PERI_DIV_CON_SHIFT,
+	CLK_PERI_PLL_SEL_CPLL		= 0,
+	CLK_PERI_PLL_SEL_GPLL,
+	CLK_PERI_PLL_SEL_SHIFT		= 7,
+	CLK_PERI_PLL_SEL_MASK		= 1 << CLK_PERI_PLL_SEL_SHIFT,
+	ACLK_PERI_DIV_CON_SHIFT		= 0,
+	ACLK_PERI_DIV_CON_MASK		= 0x1f,
+
 	/* CLKSEL12_CON */
 	MCU_STCLK_DIV_SHIFT		= 8,
 	MCU_STCLK_DIV_MASK		= GENMASK(10, 8),
@@ -89,6 +132,23 @@ enum {
 	MCU_CLK_DIV_SHIFT		= 0,
 	MCU_CLK_DIV_MASK		= GENMASK(4, 0),
 
+	/* CLKSEL19_CON */
+	ACLK_VOP_PLL_SEL_SHIFT		= 6,
+	ACLK_VOP_PLL_SEL_MASK		= GENMASK(7, 6),
+	ACLK_VOP_PLL_SEL_CPLL		= 0,
+	ACLK_VOP_PLL_SEL_GPLL		= 1,
+	ACLK_VOP_DIV_SHIFT		= 0,
+	ACLK_VOP_DIV_MASK		= GENMASK(4, 0),
+
+	/* CLKSEL20_CON */
+	DCLK_VOP_PLL_SEL_SHIFT		= 8,
+	DCLK_VOP_PLL_SEL_MASK		= GENMASK(9, 8),
+	DCLK_VOP_PLL_SEL_CPLL		= 0,
+	DCLK_VOP_PLL_SEL_GPLL		= 1,
+	DCLK_VOP_PLL_SEL_NPLL		= 2,
+	DCLK_VOP_DIV_SHIFT		= 0,
+	DCLK_VOP_DIV_MASK		= GENMASK(7, 0),
+
 	/* CLKSEL_CON25 */
 	CLK_SARADC_DIV_CON_SHIFT	= 8,
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 37b1a41ccd..d82dfd2b15 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -42,6 +42,48 @@ struct pll_div {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
+#if !defined(CONFIG_SPL_BUILD)
+#define RK3368_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
+static const struct rk3368_clk_info clks_dump[] = {
+	RK3368_CLK_DUMP(PLL_APLLB, "apllb", true),
+	RK3368_CLK_DUMP(PLL_APLLL, "aplll", true),
+	RK3368_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3368_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3368_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3368_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3368_CLK_DUMP(ARMCLKB, "armclkb", true),
+	RK3368_CLK_DUMP(ARMCLKL, "armclkl", true),
+	RK3368_CLK_DUMP(ACLK_BUS, "aclk_bus", true),
+	RK3368_CLK_DUMP(HCLK_BUS, "hclk_bus", true),
+	RK3368_CLK_DUMP(PCLK_BUS, "pclk_Bus", true),
+	RK3368_CLK_DUMP(ACLK_PERI, "aclk_peri", true),
+	RK3368_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK3368_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+#define RK3368_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
+static struct rockchip_cpu_rate_table rk3368_cpu_rates[] = {
+#if !defined(CONFIG_SPL_BUILD)
+	RK3368_CPUCLK_RATE(1200000000, 1, 5),
+	RK3368_CPUCLK_RATE(1008000000, 1, 5),
+#endif
+	RK3368_CPUCLK_RATE(816000000, 1, 3),
+	RK3368_CPUCLK_RATE(600000000, 1, 3),
+};
+
 #define PLL_DIVISORS(hz, _nr, _no) { \
 	.nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
 	_Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
@@ -59,6 +101,83 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6);
 
 static ulong rk3368_clk_get_rate(struct clk *clk);
 
+#define VCO_MAX_KHZ	2200000
+#define VCO_MIN_KHZ	440000
+#define FREF_MAX_KHZ	2200000
+#define FREF_MIN_KHZ	269
+#define PLL_LIMIT_FREQ	400000000
+
+static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
+{
+	uint ref_khz = OSC_HZ / 1000, nr, nf = 0;
+	uint fref_khz;
+	uint diff_khz, best_diff_khz;
+	const uint max_nr = 1 << 6, max_nf = 1 << 12, max_no = 1 << 4;
+	uint vco_khz;
+	uint no = 1;
+	uint freq_khz = freq_hz / 1000;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can not be 0 Hz\n", __func__);
+		return -EINVAL;
+	}
+
+	no = DIV_ROUND_UP(VCO_MIN_KHZ, freq_khz);
+	if (ext_div) {
+		*ext_div = DIV_ROUND_UP(PLL_LIMIT_FREQ, freq_hz);
+		no = DIV_ROUND_UP(no, *ext_div);
+	}
+
+	/* only even divisors (and 1) are supported */
+	if (no > 1)
+		no = DIV_ROUND_UP(no, 2) * 2;
+
+	vco_khz = freq_khz * no;
+	if (ext_div)
+		vco_khz *= *ext_div;
+
+	if (vco_khz < VCO_MIN_KHZ || vco_khz > VCO_MAX_KHZ || no > max_no) {
+		printf("%s: Cannot find out VCO for Frequency (%luHz).\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->no = no;
+
+	best_diff_khz = vco_khz;
+	for (nr = 1; nr < max_nr && best_diff_khz; nr++) {
+		fref_khz = ref_khz / nr;
+		if (fref_khz < FREF_MIN_KHZ)
+			break;
+		if (fref_khz > FREF_MAX_KHZ)
+			continue;
+
+		nf = vco_khz / fref_khz;
+		if (nf >= max_nf)
+			continue;
+		diff_khz = vco_khz - nf * fref_khz;
+		if (nf + 1 < max_nf && diff_khz > fref_khz / 2) {
+			nf++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->nr = nr;
+		div->nf = nf;
+	}
+
+	if (best_diff_khz > 4 * 1000) {
+		printf("%s:Fail to match output freq %lu,best_is %u Hz\n",
+		       __func__, freq_hz, best_diff_khz * 1000);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 /* Get pll rate by id */
 static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru,
 				   enum rk3368_pll_id pll_id)
@@ -86,7 +205,6 @@ static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru,
 	}
 }
 
-#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 			 const struct pll_div *div)
 {
@@ -116,6 +234,7 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 
 	/* return from reset */
 	rk_clrreg(&pll->con3, PLL_RESET_MASK);
+	rk_clrreg(&pll->con3, 0xf << 0);
 
 	/* waiting for pll lock */
 	while (!(readl(&pll->con1) & PLL_LOCK_STA))
@@ -126,34 +245,6 @@ static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,
 
 	return 0;
 }
-#endif
-
-#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
-static void rkclk_init(struct rk3368_cru *cru)
-{
-	u32 apllb, aplll, dpll, cpll, gpll;
-
-	rkclk_set_pll(cru, APLLB, &apll_b_init_cfg);
-	rkclk_set_pll(cru, APLLL, &apll_l_init_cfg);
-#if !defined(CONFIG_TPL_BUILD)
-	/*
-	 * If we plan to return to the boot ROM, we can't increase the
-	 * GPLL rate from the SPL stage.
-	 */
-	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
-	rkclk_set_pll(cru, CPLL, &cpll_init_cfg);
-#endif
-
-	apllb = rkclk_pll_get_rate(cru, APLLB);
-	aplll = rkclk_pll_get_rate(cru, APLLL);
-	dpll = rkclk_pll_get_rate(cru, DPLL);
-	cpll = rkclk_pll_get_rate(cru, CPLL);
-	gpll = rkclk_pll_get_rate(cru, GPLL);
-
-	debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n",
-	       __func__, apllb, aplll, dpll, cpll, gpll);
-}
-#endif
 
 #if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
 static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id)
@@ -451,6 +542,301 @@ static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz)
 	return rk3368_saradc_get_clk(cru);
 }
 
+static ulong rk3368_bus_get_clk(struct rk3368_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_BUS:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & ACLK_BUS_DIV_CON_MASK) >> ACLK_BUS_DIV_CON_SHIFT;
+		parent = rkclk_pll_get_rate(cru, GPLL);
+		break;
+	case HCLK_BUS:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & HCLK_BUS_DIV_CON_MASK) >> HCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3368_bus_get_clk(cru, ACLK_BUS);
+		break;
+	case PCLK_BUS:
+	case PCLK_PWM0:
+	case PCLK_PWM1:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+		con = readl(&cru->clksel_con[8]);
+		div = (con & PCLK_BUS_DIV_CON_MASK) >> PCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3368_bus_get_clk(cru, ACLK_BUS);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3368_bus_set_clk(struct rk3368_cru *cru,
+				ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS:
+		src_clk_div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, GPLL), hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     CLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_CPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT);
+		break;
+	case HCLK_BUS:
+		src_clk_div = DIV_ROUND_UP(rk3368_bus_get_clk(cru,
+							      ACLK_BUS),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     HCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case PCLK_BUS:
+		src_clk_div = DIV_ROUND_UP(rk3368_bus_get_clk(cru,
+							      ACLK_BUS),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[8],
+			     PCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_BUS_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+	return rk3368_bus_get_clk(cru, clk_id);
+}
+
+static ulong rk3368_peri_get_clk(struct rk3368_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->clksel_con[9]);
+		div = (con & ACLK_PERI_DIV_CON_MASK) >> ACLK_PERI_DIV_CON_SHIFT;
+		parent = rkclk_pll_get_rate(cru, GPLL);
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->clksel_con[9]);
+		div = (con & HCLK_PERI_DIV_CON_MASK) >> HCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3368_peri_get_clk(cru, ACLK_PERI);
+		break;
+	case PCLK_PERI:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_I2C4:
+	case PCLK_I2C5:
+		con = readl(&cru->clksel_con[9]);
+		div = (con & PCLK_PERI_DIV_CON_MASK) >> PCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3368_peri_get_clk(cru, ACLK_PERI);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3368_peri_set_clk(struct rk3368_cru *cru,
+				 ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rkclk_pll_get_rate(cru, GPLL), hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[9],
+			     CLK_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_CPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3368_peri_get_clk(cru,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[9],
+			     HCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_PERI_DIV_CON_SHIFT);
+		break;
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3368_peri_get_clk(cru,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[9],
+			     PCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_PERI_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk3368_peri_get_clk(cru, clk_id);
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+static ulong rk3368_vop_get_clk(struct rk3368_cru *cru,  int clk_id)
+{
+	u32 div, con, parent, sel;
+
+	switch (clk_id) {
+	case DCLK_VOP:
+		con = readl(&cru->clksel_con[20]);
+		div = con & DCLK_VOP_DIV_MASK;
+		parent = rkclk_pll_get_rate(cru, NPLL);
+		break;
+	case ACLK_VOP:
+		con = readl(&cru->clksel_con[19]);
+		div = con & ACLK_VOP_DIV_MASK;
+		sel =  (con & (ACLK_VOP_PLL_SEL_MASK <<
+			ACLK_VOP_PLL_SEL_SHIFT)) >>
+			ACLK_VOP_PLL_SEL_SHIFT;
+		if (sel == ACLK_VOP_PLL_SEL_CPLL)
+			parent = rkclk_pll_get_rate(cru, CPLL);
+		else if (ACLK_VOP_PLL_SEL_GPLL)
+			parent = rkclk_pll_get_rate(cru, GPLL);
+		else
+			parent = 480000000;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3368_vop_set_clk(struct rk3368_cru *cru, int clk_id, uint hz)
+{
+	struct pll_div npll_config = {0};
+	u32 lcdc_div;
+	int ret;
+
+	switch (clk_id) {
+	case DCLK_VOP:
+		ret = pll_para_config(hz, &npll_config, &lcdc_div);
+		if (ret)
+			return ret;
+
+		rkclk_set_pll(cru, NPLL, &npll_config);
+
+		/* vop dclk source clk: npll,dclk_div: 1 */
+		rk_clrsetreg(&cru->clksel_con[20],
+			     (DCLK_VOP_PLL_SEL_MASK << DCLK_VOP_PLL_SEL_SHIFT) |
+			     (DCLK_VOP_DIV_MASK << DCLK_VOP_DIV_SHIFT),
+			     (DCLK_VOP_PLL_SEL_NPLL << DCLK_VOP_PLL_SEL_SHIFT) |
+			     (lcdc_div - 1) << DCLK_VOP_DIV_SHIFT);
+		break;
+	case ACLK_VOP:
+		if ((rkclk_pll_get_rate(cru, CPLL) % hz) == 0) {
+			lcdc_div = rkclk_pll_get_rate(cru, CPLL) / hz;
+			rk_clrsetreg(&cru->clksel_con[19],
+				     (ACLK_VOP_PLL_SEL_MASK <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (ACLK_VOP_DIV_MASK <<
+				     ACLK_VOP_DIV_SHIFT),
+				     (ACLK_VOP_PLL_SEL_CPLL <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (lcdc_div - 1) <<
+				     ACLK_VOP_DIV_SHIFT);
+		} else {
+			lcdc_div = rkclk_pll_get_rate(cru, GPLL) / hz;
+			rk_clrsetreg(&cru->clksel_con[19],
+				     (ACLK_VOP_PLL_SEL_MASK <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (ACLK_VOP_DIV_MASK <<
+				     ACLK_VOP_DIV_SHIFT),
+				     (ACLK_VOP_PLL_SEL_GPLL <<
+				     ACLK_VOP_PLL_SEL_SHIFT) |
+				     (lcdc_div - 1) <<
+				     ACLK_VOP_DIV_SHIFT);
+		}
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+#endif
+
+static ulong rk3368_armclk_set_clk(struct rk3368_clk_priv *priv,
+				   int clk_id, ulong hz)
+{
+	struct rk3368_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	struct pll_div pll_config = {0};
+	ulong old_rate;
+	u32 pll_div, pll_id, con_id;
+	int ret;
+
+	rate = rockchip_get_cpu_settings(rk3368_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+
+	ret = pll_para_config(hz, &pll_config, &pll_div);
+	if (ret)
+		return ret;
+
+	if (clk_id == ARMCLKB) {
+		old_rate = rkclk_pll_get_rate(priv->cru, APLLB);
+		pll_id = APLLB;
+		con_id = 0;
+	} else {
+		old_rate = rkclk_pll_get_rate(priv->cru, APLLL);
+		pll_id = APLLL;
+		con_id = 2;
+	}
+
+	if (old_rate > hz) {
+		ret = rkclk_set_pll(priv->cru, pll_id, &pll_config);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[con_id + 1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[con_id + 1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+		ret = rkclk_set_pll(priv->cru, pll_id, &pll_config);
+	}
+
+	return rkclk_pll_get_rate(priv->cru, pll_id);
+}
+
 static ulong rk3368_clk_get_rate(struct clk *clk)
 {
 	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
@@ -458,15 +844,41 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 
 	debug("%s: id %ld\n", __func__, clk->id);
 	switch (clk->id) {
+	case PLL_APLLB:
+	case PLL_APLLL:
+	case PLL_DPLL:
 	case PLL_CPLL:
-		rate = rkclk_pll_get_rate(priv->cru, CPLL);
-		break;
 	case PLL_GPLL:
-		rate = rkclk_pll_get_rate(priv->cru, GPLL);
+	case PLL_NPLL:
+		rate = rkclk_pll_get_rate(priv->cru, clk->id - 1);
+		break;
+	case ARMCLKB:
+		rate = rkclk_pll_get_rate(priv->cru, APLLB);
+		break;
+	case ARMCLKL:
+		rate = rkclk_pll_get_rate(priv->cru, APLLL);
 		break;
 	case SCLK_SPI0 ... SCLK_SPI2:
 		rate = rk3368_spi_get_clk(priv->cru, clk->id);
 		break;
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+	case PCLK_PWM0:
+	case PCLK_PWM1:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+		rate = rk3368_bus_get_clk(priv->cru, clk->id);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_I2C4:
+	case PCLK_I2C5:
+		rate = rk3368_peri_get_clk(priv->cru, clk->id);
+		break;
 #if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
@@ -476,28 +888,59 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 	case SCLK_SARADC:
 		rate = rk3368_saradc_get_clk(priv->cru);
 		break;
+#if !defined(CONFIG_SPL_BUILD)
+	case ACLK_VOP:
+	case DCLK_VOP:
+		rate =  rk3368_vop_get_clk(priv->cru, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
-
 	return rate;
 }
 
 static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 {
 	__maybe_unused struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct pll_div pll_config = {0};
+	u32 pll_div;
 	ulong ret = 0;
 
-	debug("%s id:%ld rate:%ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
+	case PLL_APLLB:
+	case PLL_APLLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+		ret = pll_para_config(rate, &pll_config, &pll_div);
+		if (ret)
+			return ret;
+
+		ret = rkclk_set_pll(priv->cru, clk->id - 1, &pll_config);
+		break;
+	case ARMCLKB:
+	case ARMCLKL:
+		ret = rk3368_armclk_set_clk(priv, clk->id, rate);
+		break;
 	case SCLK_SPI0 ... SCLK_SPI2:
 		ret = rk3368_spi_set_clk(priv->cru, clk->id, rate);
 		break;
 #if IS_ENABLED(CONFIG_TPL_BUILD)
-	case CLK_DDR:
+	case SCLK_DDRCLK:
 		ret = rk3368_ddr_set_clk(priv->cru, rate);
 		break;
 #endif
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+		rate = rk3368_bus_set_clk(priv->cru, clk->id, rate);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3368_peri_set_clk(priv->cru, clk->id, rate);
+		break;
 #if !IS_ENABLED(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(MMC_SUPPORT)
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
@@ -513,6 +956,15 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		ret =  rk3368_saradc_set_clk(priv->cru, rate);
 		break;
+#if !defined(CONFIG_SPL_BUILD)
+	case ACLK_VOP:
+	case DCLK_VOP:
+		ret =  rk3368_vop_set_clk(priv->cru, clk->id, rate);
+		break;
+	case ACLK_CCI_PRE:
+		ret =  0;
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -576,9 +1028,37 @@ static struct clk_ops rk3368_clk_ops = {
 #endif
 };
 
+#if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
+static void rkclk_init(struct rk3368_cru *cru)
+{
+	u32 apllb, aplll, dpll, cpll, gpll;
+
+	rkclk_set_pll(cru, APLLB, &apll_b_init_cfg);
+	rkclk_set_pll(cru, APLLL, &apll_l_init_cfg);
+#if !defined(CONFIG_TPL_BUILD)
+	/*
+	 * If we plan to return to the boot ROM, we can't increase the
+	 * GPLL rate from the SPL stage.
+	 */
+	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
+	rkclk_set_pll(cru, CPLL, &cpll_init_cfg);
+#endif
+rk_clrsetreg(&cru->clksel_con[37],  (1 << 8), 1 << 8);
+	apllb = rkclk_pll_get_rate(cru, APLLB);
+	aplll = rkclk_pll_get_rate(cru, APLLL);
+	dpll = rkclk_pll_get_rate(cru, DPLL);
+	cpll = rkclk_pll_get_rate(cru, CPLL);
+	gpll = rkclk_pll_get_rate(cru, GPLL);
+
+	debug("%s apllb(%d) apll(%d) dpll(%d) cpll(%d) gpll(%d)\n",
+	      __func__, apllb, aplll, dpll, cpll, gpll);
+}
+#endif
+
 static int rk3368_clk_probe(struct udevice *dev)
 {
 	struct rk3368_clk_priv __maybe_unused *priv = dev_get_priv(dev);
+	int ret;
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3368_clk_plat *plat = dev_get_platdata(dev);
 
@@ -587,7 +1067,10 @@ static int rk3368_clk_probe(struct udevice *dev)
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
 #endif
-
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 	return 0;
 }
 
@@ -656,3 +1139,61 @@ U_BOOT_DRIVER(rockchip_rk3368_cru) = {
 	.bind		= rk3368_clk_bind,
 	.probe		= rk3368_clk_probe,
 };
+
+#if !defined(CONFIG_SPL_BUILD)
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3368_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3368_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h
index 9c5dd9ba2f..5d35316867 100644
--- a/include/dt-bindings/clock/rk3368-cru.h
+++ b/include/dt-bindings/clock/rk3368-cru.h
@@ -44,13 +44,12 @@
 #define SCLK_I2S_8CH		82
 #define SCLK_SPDIF_8CH		83
 #define SCLK_I2S_2CH		84
-#define SCLK_TIMER0		85
-#define SCLK_TIMER1		86
-#define SCLK_TIMER2		87
-#define SCLK_TIMER3		88
-#define SCLK_TIMER4		89
-#define SCLK_TIMER5		90
-#define SCLK_TIMER6		91
+#define SCLK_TIMER00		85
+#define SCLK_TIMER01		86
+#define SCLK_TIMER02		87
+#define SCLK_TIMER03		88
+#define SCLK_TIMER04		89
+#define SCLK_TIMER05		90
 #define SCLK_OTGPHY0		93
 #define SCLK_OTG_ADP		96
 #define SCLK_HSICPHY480M	97
@@ -82,6 +81,19 @@
 #define SCLK_SFC		126
 #define SCLK_MAC		127
 #define SCLK_MACREF_OUT		128
+#define SCLK_MIPIDSI_24M	129
+#define SCLK_CRYPTO		130
+#define SCLK_VIP_SRC		131
+#define SCLK_VIP_OUT		132
+#define SCLK_TIMER10		133
+#define SCLK_TIMER11		134
+#define SCLK_TIMER12		135
+#define SCLK_TIMER13		136
+#define SCLK_TIMER14		137
+#define SCLK_TIMER15		138
+#define SCLK_DDRCLK		139
+#define SCLK_TSP		140
+#define SCLK_HSADC_TSP		141
 
 #define DCLK_VOP		190
 #define MCLK_CRYPTO		191
@@ -105,6 +117,7 @@
 #define ACLK_VIDEO		208
 #define ACLK_BUS		209
 #define ACLK_PERI		210
+#define ACLK_CCI_PRE		211
 
 /* pclk gates */
 #define PCLK_GPIO0		320
@@ -151,8 +164,13 @@
 #define PCLK_ISP		366
 #define PCLK_VIP		367
 #define PCLK_WDT		368
+#define PCLK_DPHYRX		369
+#define PCLK_DPHYTX0		370
+#define PCLK_EFUSE256		371
+#define PCLK_EFUSE1024		372
 
 /* hclk gates */
+#define HCLK_USB_PERI		447
 #define HCLK_SFC		448
 #define HCLK_OTG0		449
 #define HCLK_HOST0		450

commit 3ee2bc3c6632c34a4758594e252a365449f74ae5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 21:41:19 2018 +0800

    configs: rk3328: enable rockchip efuse
    
    Change-Id: Ie1a307f5a680f962f7dcc07bf9e63c97a6f4f734
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index e9af89c26b..843879ba5e 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -63,6 +63,8 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit 59a83996bc5a7e2dcbfe446ec23e17b5c26b01d7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 20:33:16 2018 +0800

    rockchip: efuse: support rk3328 non-secure efuse
    
    Change-Id: Ie74764ef946b79c2e9f73e9082c1cb8bbc288abb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index f2fb736275..d23e091940 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -37,6 +37,13 @@
 #define RK3288_STROBE           BIT(1)
 #define RK3288_CSB              BIT(0)
 
+#define RK3328_INT_STATUS	0x0018
+#define RK3328_DOUT		0x0020
+#define RK3328_AUTO_CTRL	0x0024
+#define RK3328_INT_FINISH	BIT(0)
+#define RK3328_AUTO_ENB		BIT(0)
+#define RK3328_AUTO_RD		BIT(1)
+
 typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
 
 struct rockchip_efuse_regs {
@@ -47,6 +54,10 @@ struct rockchip_efuse_regs {
 	u32 jtag_pass; /* 0x10  JTAG password */
 	u32 strobe_finish_ctrl;
 		       /* 0x14	efuse strobe finish control register */
+	u32 int_status;/* 0x18 */
+	u32 reserved;  /* 0x1c */
+	u32 dout2;     /* 0x20 */
+	u32 auto_ctrl; /* 0x24 */
 };
 
 struct rockchip_efuse_platdata {
@@ -182,6 +193,57 @@ static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
 	return 0;
 }
 
+static int rockchip_rk3328_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	unsigned int addr_start, addr_end, addr_offset, addr_len;
+	u32 out_value, status;
+	u8 *buffer;
+	int ret = 0, i = 0, j = 0;
+
+	/* Max non-secure Byte */
+	if (size > 32)
+		size = 32;
+
+	/* 128 Byte efuse, 96 Byte for secure, 32 Byte for non-secure */
+	offset += 96;
+	addr_start = rounddown(offset, RK3399_BYTES_PER_FUSE) /
+						RK3399_BYTES_PER_FUSE;
+	addr_end = roundup(offset + size, RK3399_BYTES_PER_FUSE) /
+						RK3399_BYTES_PER_FUSE;
+	addr_offset = offset % RK3399_BYTES_PER_FUSE;
+	addr_len = addr_end - addr_start;
+
+	buffer = calloc(1, sizeof(*buffer) * addr_len * RK3399_BYTES_PER_FUSE);
+	if (!buffer)
+		return -ENOMEM;
+
+	for (j = 0; j < addr_len; j++) {
+		writel(RK3328_AUTO_RD | RK3328_AUTO_ENB |
+		       ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+		         &efuse->auto_ctrl);
+		udelay(5);
+		status = readl(&efuse->int_status);
+		if (!(status & RK3328_INT_FINISH)) {
+			ret = -EIO;
+			goto err;
+		}
+		out_value = readl(&efuse->dout2);
+		writel(RK3328_INT_FINISH, &efuse->int_status);
+
+		memcpy(&buffer[i], &out_value, RK3399_BYTES_PER_FUSE);
+		i += RK3399_BYTES_PER_FUSE;
+	}
+	memcpy(buf, buffer + addr_offset, size);
+err:
+	free(buffer);
+
+	return ret;
+}
+
 static int rockchip_efuse_read(struct udevice *dev, int offset,
 			       void *buf, int size)
 {
@@ -223,6 +285,10 @@ static const struct udevice_id rockchip_efuse_ids[] = {
 		.compatible = "rockchip,rk322x-efuse",
 		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
+	{
+		.compatible = "rockchip,rk3328-efuse",
+		.data = (ulong)&rockchip_rk3328_efuse_read,
+	},
 	{
 		.compatible = "rockchip,rk3399-efuse",
 		.data = (ulong)&rockchip_rk3399_efuse_read,

commit a2df55e58d01052015da4edc8efc6943fdc03b0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 20:20:59 2018 +0800

    configs: rk3128x: enable rockchip efuse
    
    Change-Id: I2e77ee1c487762e6d6e27e9d75ec55d4217251a2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 22853ff301..0eb3ab4916 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -67,6 +67,8 @@ CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
 CONFIG_GPIO_KEY=y
 CONFIG_RK_KEY=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit b4a94719783446259d49e4fa173dda68360077b7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 19:10:11 2018 +0800

    rockchip: add fdt overlay after read kernel dtb
    
    Change-Id: If8d6f9d8efa735514e9152dd9d4cda43436f7d18
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index e4c58ece41..7fa5fa7587 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -570,6 +570,7 @@ int rockchip_read_dtb_file(void *fdt_addr)
 	struct resource_file *file;
 	struct list_head *node;
 	char *dtb_name = DTB_FILE;
+	int ret;
 
 	if (list_empty(&entrys_head))
 		init_resource_list(NULL);
@@ -593,5 +594,13 @@ int rockchip_read_dtb_file(void *fdt_addr)
 
 	printf("DTB: %s\n", dtb_name);
 
-	return rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+	ret = rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+	if (ret < 0)
+		return ret;
+
+#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+	android_fdt_overlay_apply((void *)fdt_addr);
+#endif
+
+	return ret;
 }

commit f8dbe861166f347342d5f52426dda0ae5da118c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 1 11:57:50 2018 +0800

    android: support dtb overlay
    
    - read dtbo from recovery or dtbo partition;
    - append "androidboot.dtbo_idx" to cmdline;
    - apply dtb overlay when first read kernel dtb;
    - pass dtb that first time read to kernel;
    
    Change-Id: Iba5c02c1307d3dad69ef96d3b3b0927fb507be8f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 090da46998..e4b373574d 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -9,14 +9,17 @@
 #include <android_avb/avb_slot_verify.h>
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
-
+#include <android_image.h>
 #include <cli.h>
 #include <common.h>
+#include <dt_table.h>
+#include <image-android-dt.h>
 #include <malloc.h>
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>
 #include <optee_include/OpteeClientInterface.h>
+#include <linux/libfdt_env.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -473,6 +476,229 @@ out:
 }
 #endif
 
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+
+/*
+ * Default return index 0.
+ */
+__weak int board_select_fdt_index(ulong dt_table_hdr)
+{
+/*
+ * User can use "dt_for_each_entry(entry, hdr, idx)" to iterate
+ * over all dt entry of DT image and pick up which they want.
+ *
+ * Example:
+ *	struct dt_table_entry *entry;
+ *	int index;
+ *
+ *	dt_for_each_entry(entry, dt_table_hdr, index) {
+ *
+ *		.... (use entry)
+ *	}
+ *
+ *	return index;
+ */
+	return 0;
+}
+
+static int android_get_dtbo(ulong *fdt_dtbo,
+			    const struct andr_img_hdr *hdr,
+			    int *index)
+{
+	struct dt_table_header *dt_hdr = NULL;
+	struct blk_desc *dev_desc;
+	const char *part_name;
+	disk_partition_t part_info;
+	u32 blk_offset, blk_cnt;
+	void *buf;
+	ulong e_addr;
+	u32 e_size;
+	int e_idx;
+	int ret;
+
+	/* Get partition according to boot mode */
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_DTBO;
+
+	/* Get partition info */
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
+	if (ret < 0) {
+		printf("%s: failed to get %s part info, ret=%d\n",
+		       __func__, part_name, ret);
+		return ret;
+	}
+
+	/* Check dt table header */
+	if (!strcmp(part_name, PART_RECOVERY))
+		blk_offset = part_info.start +
+			     (hdr->recovery_dtbo_offset / part_info.blksz);
+	else
+		blk_offset = part_info.start;
+
+	dt_hdr = memalign(ARCH_DMA_MINALIGN, part_info.blksz);
+	if (!dt_hdr) {
+		printf("%s: out of memory for dt header!\n", __func__);
+		return -ENOMEM;
+	}
+
+	ret = blk_dread(dev_desc, blk_offset, 1, dt_hdr);
+	if (ret != 1) {
+		printf("%s: failed to read dt table header\n",
+		       __func__);
+		goto out1;
+	}
+
+	if (!android_dt_check_header((ulong)dt_hdr)) {
+		printf("%s: Error: invalid dt table header: 0x%x\n",
+		       __func__, dt_hdr->magic);
+		ret = -EINVAL;
+		goto out1;
+	}
+
+#ifdef DEBUG
+	android_dt_print_contents((ulong)dt_hdr);
+#endif
+
+	blk_cnt = DIV_ROUND_UP(fdt32_to_cpu(dt_hdr->total_size),
+			       part_info.blksz);
+	/* Read all DT Image */
+	buf = memalign(ARCH_DMA_MINALIGN, part_info.blksz * blk_cnt);
+	if (!buf) {
+		printf("%s: out of memory for %s part!\n", __func__, part_name);
+		ret = -ENOMEM;
+		goto out1;
+	}
+
+	ret = blk_dread(dev_desc, blk_offset, blk_cnt, buf);
+	if (ret != blk_cnt) {
+		printf("%s: failed to read dtbo, blk_cnt=%d, ret=%d\n",
+		       __func__, blk_cnt, ret);
+		goto out2;
+	}
+
+	e_idx = board_select_fdt_index((ulong)buf);
+	if (e_idx < 0) {
+		printf("%s: failed to select board fdt index\n", __func__);
+		ret = -EINVAL;
+		goto out2;
+	}
+
+	ret = android_dt_get_fdt_by_index((ulong)buf, e_idx, &e_addr, &e_size);
+	if (!ret) {
+		printf("%s: failed to get fdt, index=%d\n", __func__, e_idx);
+		ret = -EINVAL;
+		goto out2;
+	}
+
+	if (fdt_dtbo)
+		*fdt_dtbo = e_addr;
+	if (index)
+		*index = e_idx;
+
+	free(dt_hdr);
+	debug("ANDROID: Loading dt entry to 0x%lx size 0x%x idx %d from \"%s\" part\n",
+	      e_addr, e_size, e_idx, part_name);
+
+	return 0;
+
+out2:
+	free(buf);
+out1:
+	free(dt_hdr);
+
+	return ret;
+}
+
+int android_fdt_overlay_apply(void *fdt_addr)
+{
+	struct andr_img_hdr *hdr;
+	struct blk_desc *dev_desc;
+	const char *part_name;
+	disk_partition_t part_info;
+	char buf[32] = {0};
+	u32 blk_cnt;
+	ulong fdt_dtbo = -1;
+	int index = -1;
+	int ret;
+
+	/* Get partition according to boot mode */
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+		part_name = PART_RECOVERY;
+	else
+		part_name = PART_BOOT;
+
+	/* Get partition info */
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
+
+	ret = part_get_info_by_name(dev_desc, part_name, &part_info);
+	if (ret < 0) {
+		printf("%s: failed to get %s part info, ret=%d\n",
+		       __func__, part_name, ret);
+		return ret;
+	}
+
+	blk_cnt = DIV_ROUND_UP(sizeof(*hdr), part_info.blksz);
+	hdr = memalign(ARCH_DMA_MINALIGN, part_info.blksz * blk_cnt);
+	if (!hdr) {
+		printf("%s: out of memory!\n", __func__);
+		return -ENOMEM;
+	}
+
+	ret = blk_dread(dev_desc, part_info.start, blk_cnt, hdr);
+	if (ret != blk_cnt) {
+		printf("%s: failed to read %s hdr!\n", __func__, part_name);
+		goto out;
+	}
+
+#ifdef DEBUG
+	android_print_contents(hdr);
+#endif
+
+	if (android_image_check_header(hdr)) {
+		printf("%s: Invalid Android header %s\n", __func__, hdr->magic);
+		return -EINVAL;
+	}
+
+	/* Check header version */
+	if (!hdr->header_version) {
+		printf("Android header version 0\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ret = android_get_dtbo(&fdt_dtbo, (void *)hdr, &index);
+	if (!ret) {
+		/* Must incease size before overlay */
+		fdt_increase_size(fdt_addr, fdt_totalsize((void *)fdt_dtbo));
+		ret = fdt_overlay_apply(fdt_addr, (void *)fdt_dtbo);
+		if (!ret) {
+			snprintf(buf, 32, "%s%d", "androidboot.dtbo_", index);
+			env_update("bootargs", buf);
+			printf("ANDROID: fdt overlay OK\n");
+		} else {
+			printf("ANDROID: fdt overlay failed, ret=%d\n", ret);
+		}
+	}
+
+out:
+	free(hdr);
+
+	return 0;
+}
+#endif
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
@@ -609,6 +835,15 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
 	if (!ret)
 		env_set_hex("fdt_addr", fdt_addr);
+
+/*
+ * Actually if CONFIG_USING_KERNEL_DTB is enbled, we have already read kernel
+ * dtb and apply overlay in init_kernel_dtb(), so that we don't need to apply
+ * again, we would pass the current fdt to kernel.
+ */
+#if defined(CONFIG_OF_LIBFDT_OVERLAY) && !defined(CONFIG_USING_KERNEL_DTB)
+	android_fdt_overlay_apply((void *)fdt_addr);
+#endif
 #endif
 	android_bootloader_boot_kernel(load_address);
 
diff --git a/common/image-android.c b/common/image-android.c
index 6a6475c8e1..c15efb23d3 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -14,6 +14,8 @@
 #include <asm/arch/resource_img.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 
@@ -191,7 +193,15 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 
 	printf("FDT load addr 0x%08x size %u KiB\n",
 	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
-
+/*
+ * Actually we have read kernel dtb in init_kernel_dtb() and do overlay
+ * when CONFIG_USING_KERNEL_DTB is enbled, and we also didn't update it at all.
+ * So that we pass current fdt blob to kernel, otherwise we have to do overlay
+ * again which wastes time.
+ */
+#if defined(CONFIG_OF_LIBFDT_OVERLAY) && defined(CONFIG_USING_KERNEL_DTB)
+	*rd_data = (ulong)gd->fdt_blob;
+#else
 	*rd_data = (unsigned long)hdr;
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
@@ -201,6 +211,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 		     ANDROID_ARG_FDT_FILENAME))
 			* 512;
 #endif
+#endif
+
 	return 0;
 }
 
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 19854c8bce..15498b7fe3 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -86,4 +86,12 @@ int android_boot_flow(unsigned long kernel_address);
  */
 char *android_str_append(char *base_name, char *slot_suffix);
 
+/** anrdroid_fdt_overlay_apply- apply fdt overlay.
+ *
+ * @fdt_addr: fdt blob.
+ *
+ * @return 0 on success, otherwise failed.
+ */
+int android_fdt_overlay_apply(void *fdt_addr);
+
 #endif  /* __ANDROID_BOOTLOADER_H */
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index 7a094be074..e88375159f 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -23,6 +23,7 @@ enum _boot_mode {
 #define PART_KERNEL			"kernel"
 #define PART_BOOT			"boot"
 #define PART_RECOVERY			"recovery"
+#define PART_DTBO			"dtbo"
 
 #define RK_BLK_SIZE 512
 

commit b11786b4f0e9ced2a8ad506c8ba9ccf14c36bb2a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 19:03:13 2018 +0800

    input: rk key: fix missing register key into dm input uclass
    
    Change-Id: I3237923ed14724e838a8b79a40db4ac45dde5f16
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index 8a58e1b0e1..44f2b5d4a7 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -71,6 +71,7 @@ static int rk_keys_ofdata_to_platdata(struct udevice *dev)
 				free(key);
 				continue;
 			}
+			key_add(key);
 		/* This is a GPIO key */
 		} else {
 			key->parent = dev;

commit c67b8746fb5c458adabef731dad3ca8ad95a56b6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Aug 2 10:37:38 2018 +0800

    image: android: use debug to print cmdline
    
    if cmdline is too long, it wastes time.
    
    Change-Id: Ie8658fca11c3706df50d1eaae2ee479af6e8de08
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index ab877016fc..6a6475c8e1 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -90,7 +90,7 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 
 	int len = 0;
 	if (*hdr->cmdline) {
-		printf("Kernel command line: %s\n", hdr->cmdline);
+		debug("Kernel command line: %s\n", hdr->cmdline);
 		len += strlen(hdr->cmdline);
 	}
 

commit bcd21a1f01d7dfe99bc763a28a796bb5cad0815c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 1 15:43:32 2018 +0800

    image: android-dt: add dt_for_each_entry() to iterate over all dt entry of DT image
    
    Change-Id: I4db1e1da0d55701798bb8c296dd58e26592ef3c8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android-dt.c b/common/image-android-dt.c
index ccef164e20..c3d424a7b6 100644
--- a/common/image-android-dt.c
+++ b/common/image-android-dt.c
@@ -155,3 +155,20 @@ void android_dt_print_contents(ulong hdr_addr)
 	}
 }
 #endif
+
+/**
+ * Get dt entry count of DT image structure.
+ *
+ * @param hdr_addr Start address of DT image
+ */
+int android_dt_get_count(ulong hdr_addr)
+{
+	const struct dt_table_header *hdr;
+	int count;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	count = fdt32_to_cpu(hdr->dt_entry_count);
+	unmap_sysmem(hdr);
+
+	return count;
+}
diff --git a/include/image-android-dt.h b/include/image-android-dt.h
index 08b810d461..fdf7945cda 100644
--- a/include/image-android-dt.h
+++ b/include/image-android-dt.h
@@ -13,9 +13,36 @@
 bool android_dt_check_header(ulong hdr_addr);
 bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
 				 u32 *size);
+int android_dt_get_count(ulong hdr_addr);
 
 #if !defined(CONFIG_SPL_BUILD)
 void android_dt_print_contents(ulong hdr_addr);
 #endif
 
+/**
+ * dt_for_each_entry() - iterate over all dt entry of DT image
+ *
+ * @entry:   struct dt_table_entry pointing to entry address
+ * @hdr:     struct dt_table_header pointing to hdr address
+ * @idx:     temporary index variant
+ *
+ * This is a wrapper around a for loop and is used like so:
+ *
+ *	struct dt_table_header *hdr;
+ *	struct dt_table_entry *entry;
+ *	int index;
+ *
+ *	......
+ *
+ *	dt_for_each_entry(entry, hdr, index) {
+ *		Use entry
+ *		...
+ *	}
+ *
+ */
+#define dt_for_each_entry(entry, hdr, idx) \
+	for (idx = 0, android_dt_get_fdt_by_index((ulong)hdr, idx, (ulong *)&entry, NULL); \
+	     idx < android_dt_get_count((ulong)hdr); \
+	     idx++, android_dt_get_fdt_by_index((ulong)hdr, idx, (ulong *)&entry, NULL))
+
 #endif /* IMAGE_ANDROID_DT_H */

commit c673757f56637a61c76a208b0ba55770c69e39a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Aug 1 11:29:42 2018 +0800

    common: fdt_support: support "bootargs_ext" merge into "bootargs"
    
    When DTBO is enabled, dtbo may provide "bootargs_ext" to append
    cmdline base on "bootargs".
    
    Change-Id: I4abf554591a3983c5f41494ecadf5614b8f6404b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 667b7e06fa..df8e1a2b0d 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -274,8 +274,13 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
 
 int fdt_chosen(void *fdt)
 {
+	/*
+	 * "bootargs_ext" is used when dtbo is applied.
+	 */
+	const char *arr_bootargs[] = { "bootargs", "bootargs_ext" };
 	int   nodeoffset;
 	int   err;
+	int   i;
 	char  *str;		/* used to set string properties */
 
 	err = fdt_check_header(fdt);
@@ -294,28 +299,31 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ARCH_ROCKCHIP
 		const char *bootargs;
 
-		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
-		if (bootargs) {
-			/*
-			 * Append kernel bootargs
-			 * If use AB system, delete default "root=" which route
-			 * to rootfs. Then the ab bootctl will choose the
-			 * high priority system to boot and add its UUID
-			 * to cmdline. The format is "roo=PARTUUID=xxxx...".
-			 */
+		for (i = 0; i < ARRAY_SIZE(arr_bootargs); i++) {
+			bootargs = fdt_getprop(fdt, nodeoffset,
+					       arr_bootargs[i], NULL);
+			if (bootargs) {
+				/*
+				 * Append kernel bootargs
+				 * If use AB system, delete default "root=" which route
+				 * to rootfs. Then the ab bootctl will choose the
+				 * high priority system to boot and add its UUID
+				 * to cmdline. The format is "roo=PARTUUID=xxxx...".
+				 */
 #ifdef CONFIG_ANDROID_AB
-			env_update_filter("bootargs", bootargs, "root=");
+				env_update_filter("bootargs", bootargs, "root=");
 #else
-			/*
-			 * Initrd fixup: remove unused "initrd=0x...,0x...",
-			 * this for compatible with legacy parameter.txt
-			 */
-			env_update_filter("bootargs", bootargs, "initrd=");
+				/*
+				 * Initrd fixup: remove unused "initrd=0x...,0x...",
+				 * this for compatible with legacy parameter.txt
+				 */
+				env_update_filter("bootargs", bootargs, "initrd=");
 #endif
-
-			str = env_get("bootargs");
-		}
+			}
 #endif
+		}
+
+		str = env_get("bootargs");
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {

commit 09f4e561ace5897aa7294ad9c23f5a48a94e3fdf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 25 16:22:38 2018 +0800

    android: update android image header to support new version
    
    mainly to support android P.
    
    Change-Id: I34a49e4eedcde06a9e40792c7c908737dc10b426
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index a61d37177e..ab877016fc 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -141,6 +141,9 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
 	end += ALIGN(hdr->ramdisk_size, hdr->page_size);
 	end += ALIGN(hdr->second_size, hdr->page_size);
 
+	if (hdr->header_version >= 1)
+		end += ALIGN(hdr->recovery_dtbo_size, hdr->page_size);
+
 	return end;
 }
 
@@ -300,6 +303,7 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	/* os_version = ver << 11 | lvl */
 	u32 os_ver = hdr->os_version >> 11;
 	u32 os_lvl = hdr->os_version & ((1U << 11) - 1);
+	u32 header_version = hdr->header_version;
 
 	printf("%skernel size:      %x\n", p, hdr->kernel_size);
 	printf("%skernel address:   %x\n", p, hdr->kernel_addr);
@@ -309,6 +313,7 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	printf("%ssecond address:   %x\n", p, hdr->second_addr);
 	printf("%stags address:     %x\n", p, hdr->tags_addr);
 	printf("%spage size:        %x\n", p, hdr->page_size);
+	printf("%sheader_version:   %x\n", p, header_version);
 	/* ver = A << 14 | B << 7 | C         (7 bits for each of A, B, C)
 	 * lvl = ((Y - 2000) & 127) << 4 | M  (7 bits for Y, 4 bits for M) */
 	printf("%sos_version:       %x (ver: %u.%u.%u, level: %u.%u)\n",
@@ -317,5 +322,11 @@ void android_print_contents(const struct andr_img_hdr *hdr)
 	       (os_lvl >> 4) + 2000, os_lvl & 0x0F);
 	printf("%sname:             %s\n", p, hdr->name);
 	printf("%scmdline:          %s\n", p, hdr->cmdline);
+
+	if (header_version >= 1) {
+		printf("%srecovery dtbo size:    %x\n", p, hdr->recovery_dtbo_size);
+		printf("%srecovery dtbo offset:  %llx\n", p, hdr->recovery_dtbo_offset);
+		printf("%sheader size:           %x\n", p, hdr->header_size);
+	}
 }
 #endif
diff --git a/include/android_image.h b/include/android_image.h
index dfd4d9d72c..3c3319765b 100644
--- a/include/android_image.h
+++ b/include/android_image.h
@@ -34,7 +34,8 @@ struct andr_img_hdr {
 
 	u32 tags_addr;		/* physical addr for kernel tags */
 	u32 page_size;		/* flash page size we assume */
-	u32 unused;		/* reserved for future expansion: MUST be 0 */
+
+	u32 header_version;
 
 	/* operating system version and security patch level; for
 	 * version "A.B.C" and patch level "Y-M-D":
@@ -52,6 +53,10 @@ struct andr_img_hdr {
 	/* Supplemental command line data; kept here to maintain
 	 * binary compatibility with older versions of mkbootimg */
 	char extra_cmdline[ANDR_BOOT_EXTRA_ARGS_SIZE];
+
+	uint32_t recovery_dtbo_size;	/* size of recovery dtbo image */
+	uint64_t recovery_dtbo_offset;	/* offset in boot image */
+	uint32_t header_size;		/* size of boot image header in bytes */
 } __attribute__((packed));
 
 /*

commit 9322063530546bd762ec823fb123303de3b74d96
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Jul 31 08:44:59 2018 +0800

    configs: rk3128x_defconfig: enable CONFIG_OF_LIBFDT_OVERLAY
    
    Change-Id: I4474350c7ab45412f05ff3ef79f3f6363e68712b
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 66fcd10c62..22853ff301 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -109,4 +109,5 @@ CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_TEST_ROCKCHIP=y

commit aa1c055a6ed4112dac1c167f35b57270e9f44cfa
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Jul 31 08:41:45 2018 +0800

    configs: rk3128x_defconfig: enable CONFIG_CMD_DTIMG
    
    Change-Id: Ia088c543b001219db6c85792620c1a57f233e491
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index eabbbc1307..66fcd10c62 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -34,6 +34,7 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_DTIMG=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y

commit df8be4b672e36d21dc069ea4e393cf5e773b9d23
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Tue Jul 31 08:35:24 2018 +0800

    rockchip: rk3128x: update with save defconfig
    
    Change-Id: I2f6a904c0462c25be0bd705bfa83dc4f3334ed8c
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
index 63fa63940e..eabbbc1307 100644
--- a/configs/rk3128x_defconfig
+++ b/configs/rk3128x_defconfig
@@ -3,11 +3,11 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
-CONFIG_ROCKCHIP_RK322X=y
-CONFIG_ROCKCHIP_RK3128X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_ROCKCHIP_RK3128X=y
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0

commit 2967d2f74db644dda815e738c9d9c068c50768c1
Author: Sam Protsenko <semen.protsenko@linaro.org>
Date:   Wed Jun 6 17:06:54 2018 +0300

    FROMLIST: cmd: Add dtimg command
    
    dtimg command allows user to work with Android DTB/DTBO image format.
    Such as, getting the address of desired DTB/DTBO file, printing the dump
    of the image in U-Boot shell, etc.
    
    This command is needed to provide Android boot with new Android DT image
    format further.
    
    Change-Id: I2a626f333f604b6f0424aa03feaddab4e8506a3f
    Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (am from http://patchwork.ozlabs.org/patch/925871/)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index bfd78ddd8c..cf6454c9b9 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -231,6 +231,14 @@ config CMD_BOOTMENU
 	help
 	  Add an ANSI terminal boot menu command.
 
+config CMD_DTIMG
+	bool "dtimg"
+	help
+	  Android DTB/DTBO image manipulation commands. Read dtb/dtbo files from
+	  image into RAM, dump image structure information, etc. Those dtb/dtbo
+	  files should be merged in one dtb further, which needs to be passed to
+	  the kernel, as part of a boot process.
+
 config CMD_ELF
 	bool "bootelf, bootvx"
 	default y
diff --git a/cmd/Makefile b/cmd/Makefile
index 4f12f6fdbe..7ca3bbd09b 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -46,6 +46,7 @@ ifdef CONFIG_POST
 obj-$(CONFIG_CMD_DIAG) += diag.o
 endif
 obj-$(CONFIG_CMD_DISPLAY) += display.o
+obj-$(CONFIG_CMD_DTIMG) += dtimg.o
 obj-$(CONFIG_CMD_ECHO) += echo.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
 obj-$(CONFIG_CMD_EEPROM) += eeprom.o
diff --git a/cmd/dtimg.c b/cmd/dtimg.c
new file mode 100644
index 0000000000..5295a341ad
--- /dev/null
+++ b/cmd/dtimg.c
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <image-android-dt.h>
+#include <common.h>
+
+enum cmd_dtimg_info {
+	CMD_DTIMG_START = 0,
+	CMD_DTIMG_SIZE,
+};
+
+static int do_dtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
+			 char * const argv[])
+{
+	char *endp;
+	ulong hdr_addr;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	hdr_addr = simple_strtoul(argv[1], &endp, 16);
+	if (*endp != '\0') {
+		printf("Error: Wrong image address\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (!android_dt_check_header(hdr_addr)) {
+		printf("Error: DT image header is incorrect\n");
+		return CMD_RET_FAILURE;
+	}
+
+	android_dt_print_contents(hdr_addr);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int dtimg_get_fdt(int argc, char * const argv[], enum cmd_dtimg_info cmd)
+{
+	ulong hdr_addr;
+	u32 index;
+	char *endp;
+	ulong fdt_addr;
+	u32 fdt_size;
+	char buf[65];
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	hdr_addr = simple_strtoul(argv[1], &endp, 16);
+	if (*endp != '\0') {
+		printf("Error: Wrong image address\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (!android_dt_check_header(hdr_addr)) {
+		printf("Error: DT image header is incorrect\n");
+		return CMD_RET_FAILURE;
+	}
+
+	index = simple_strtoul(argv[2], &endp, 0);
+	if (*endp != '\0') {
+		printf("Error: Wrong index\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (!android_dt_get_fdt_by_index(hdr_addr, index, &fdt_addr, &fdt_size))
+		return CMD_RET_FAILURE;
+
+	switch (cmd) {
+	case CMD_DTIMG_START:
+		snprintf(buf, sizeof(buf), "%lx", fdt_addr);
+		break;
+	case CMD_DTIMG_SIZE:
+		snprintf(buf, sizeof(buf), "%x", fdt_size);
+		break;
+	default:
+		printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd);
+		return CMD_RET_FAILURE;
+	}
+
+	env_set(argv[3], buf);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int do_dtimg_start(cmd_tbl_t *cmdtp, int flag, int argc,
+			  char * const argv[])
+{
+	return dtimg_get_fdt(argc, argv, CMD_DTIMG_START);
+}
+
+static int do_dtimg_size(cmd_tbl_t *cmdtp, int flag, int argc,
+			 char * const argv[])
+{
+	return dtimg_get_fdt(argc, argv, CMD_DTIMG_SIZE);
+}
+
+static cmd_tbl_t cmd_dtimg_sub[] = {
+	U_BOOT_CMD_MKENT(dump, 2, 0, do_dtimg_dump, "", ""),
+	U_BOOT_CMD_MKENT(start, 4, 0, do_dtimg_start, "", ""),
+	U_BOOT_CMD_MKENT(size, 4, 0, do_dtimg_size, "", ""),
+};
+
+static int do_dtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	cmd_tbl_t *cp;
+
+	cp = find_cmd_tbl(argv[1], cmd_dtimg_sub, ARRAY_SIZE(cmd_dtimg_sub));
+
+	/* Strip off leading 'dtimg' command argument */
+	argc--;
+	argv++;
+
+	if (!cp || argc > cp->maxargs)
+		return CMD_RET_USAGE;
+	if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+		return CMD_RET_SUCCESS;
+
+	return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(
+	dtimg, CONFIG_SYS_MAXARGS, 0, do_dtimg,
+	"manipulate dtb/dtbo Android image",
+	"dump <addr>\n"
+	"    - parse specified image and print its structure info\n"
+	"      <addr>: image address in RAM, in hex\n"
+	"dtimg start <addr> <index> <varname>\n"
+	"    - get address (hex) of FDT in the image, by index\n"
+	"      <addr>: image address in RAM, in hex\n"
+	"      <index>: index of desired FDT in the image\n"
+	"      <varname>: name of variable where to store address of FDT\n"
+	"dtimg size <addr> <index> <varname>\n"
+	"    - get size (hex, bytes) of FDT in the image, by index\n"
+	"      <addr>: image address in RAM, in hex\n"
+	"      <index>: index of desired FDT in the image\n"
+	"      <varname>: name of variable where to store size of FDT"
+);
diff --git a/common/Makefile b/common/Makefile
index 49b434923d..47e291daa1 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -110,6 +110,11 @@ obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-y += memsize.o
 obj-y += stdio.o
+
+ifdef CONFIG_CMD_DTIMG
+obj-y += image-android-dt.o
+endif
+
 obj-$(CONFIG_RKIMG_BOOTLOADER) += boot_rkimg.o
 # This option is not just y/n - it can have a numeric value
 ifdef CONFIG_FASTBOOT_FLASH

commit e91b3373a9bad04a313764685949e4e553445872
Author: Sam Protsenko <semen.protsenko@linaro.org>
Date:   Wed Jun 6 17:06:53 2018 +0300

    FROMLIST: common: Add support for Android DT image
    
    Android documentation recommends new image format for storing DTB/DTBO
    files: [1]. To support that format, this patch adds helper functions for
    Android DTB/DTBO format. In image-android-dt.* files you can find helper
    functions to work with Android DT image format, such us routines for:
        - printing the dump of image structure
        - getting the address and size of desired dtb/dtbo file
    
    This patch uses dt_table.h file, that was added in 643cefa4d848 ("Import
    Android's dt_table.h for DT image format") by Alex Deymo.
    
    [1] https://source.android.com/devices/architecture/dto/partitions
    
    Change-Id: I78f6750af6c4fecb80d331bc06bc5cbe98da5825
    Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (am from http://patchwork.ozlabs.org/patch/925870/)

diff --git a/common/image-android-dt.c b/common/image-android-dt.c
new file mode 100644
index 0000000000..ccef164e20
--- /dev/null
+++ b/common/image-android-dt.c
@@ -0,0 +1,157 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <image-android-dt.h>
+#include <dt_table.h>
+#include <common.h>
+#include <linux/libfdt.h>
+#include <mapmem.h>
+
+/**
+ * Check if image header is correct.
+ *
+ * @param hdr_addr Start address of DT image
+ * @return true if header is correct or false if header is incorrect
+ */
+bool android_dt_check_header(ulong hdr_addr)
+{
+	const struct dt_table_header *hdr;
+	u32 magic;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	magic = fdt32_to_cpu(hdr->magic);
+	unmap_sysmem(hdr);
+
+	return magic == DT_TABLE_MAGIC;
+}
+
+/**
+ * Get the address of FDT (dtb or dtbo) in memory by its index in image.
+ *
+ * @param hdr_addr Start address of DT image
+ * @param index Index of desired FDT in image (starting from 0)
+ * @param[out] addr If not NULL, will contain address to specified FDT
+ * @param[out] size If not NULL, will contain size of specified FDT
+ *
+ * @return true on success or false on error
+ */
+bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
+				 u32 *size)
+{
+	const struct dt_table_header *hdr;
+	const struct dt_table_entry *e;
+	u32 entry_count, entries_offset, entry_size;
+	ulong e_addr;
+	u32 dt_offset, dt_size;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+	entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+	entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+	unmap_sysmem(hdr);
+
+	if (index > entry_count) {
+		printf("Error: index > dt_entry_count (%u > %u)\n", index,
+		       entry_count);
+		return false;
+	}
+
+	e_addr = hdr_addr + entries_offset + index * entry_size;
+	e = map_sysmem(e_addr, sizeof(*e));
+	dt_offset = fdt32_to_cpu(e->dt_offset);
+	dt_size = fdt32_to_cpu(e->dt_size);
+	unmap_sysmem(e);
+
+	if (addr)
+		*addr = hdr_addr + dt_offset;
+	if (size)
+		*size = dt_size;
+
+	return true;
+}
+
+#if !defined(CONFIG_SPL_BUILD)
+static void android_dt_print_fdt_info(const struct fdt_header *fdt)
+{
+	u32 fdt_size;
+	int root_node_off;
+	const char *compatible = NULL;
+
+	fdt_size = fdt_totalsize(fdt);
+	root_node_off = fdt_path_offset(fdt, "/");
+	if (root_node_off < 0) {
+		printf("Error: Root node not found\n");
+	} else {
+		compatible = fdt_getprop(fdt, root_node_off, "compatible",
+					 NULL);
+	}
+
+	printf("           (FDT)size = %d\n", fdt_size);
+	printf("     (FDT)compatible = %s\n",
+	       compatible ? compatible : "(unknown)");
+}
+
+/**
+ * Print information about DT image structure.
+ *
+ * @param hdr_addr Start address of DT image
+ */
+void android_dt_print_contents(ulong hdr_addr)
+{
+	const struct dt_table_header *hdr;
+	u32 entry_count, entries_offset, entry_size;
+	u32 i;
+
+	hdr = map_sysmem(hdr_addr, sizeof(*hdr));
+	entry_count = fdt32_to_cpu(hdr->dt_entry_count);
+	entries_offset = fdt32_to_cpu(hdr->dt_entries_offset);
+	entry_size = fdt32_to_cpu(hdr->dt_entry_size);
+
+	/* Print image header info */
+	printf("dt_table_header:\n");
+	printf("               magic = %08x\n", fdt32_to_cpu(hdr->magic));
+	printf("          total_size = %d\n", fdt32_to_cpu(hdr->total_size));
+	printf("         header_size = %d\n", fdt32_to_cpu(hdr->header_size));
+	printf("       dt_entry_size = %d\n", entry_size);
+	printf("      dt_entry_count = %d\n", entry_count);
+	printf("   dt_entries_offset = %d\n", entries_offset);
+	printf("           page_size = %d\n", fdt32_to_cpu(hdr->page_size));
+	printf("             version = %08x\n", fdt32_to_cpu(hdr->version));
+
+	unmap_sysmem(hdr);
+
+	/* Print image entries info */
+	for (i = 0; i < entry_count; ++i) {
+		const ulong e_addr = hdr_addr + entries_offset + i * entry_size;
+		const struct dt_table_entry *e;
+		const struct fdt_header *fdt;
+		u32 dt_offset, dt_size;
+		u32 j;
+
+		e = map_sysmem(e_addr, sizeof(*e));
+		dt_offset = fdt32_to_cpu(e->dt_offset);
+		dt_size = fdt32_to_cpu(e->dt_size);
+
+		printf("dt_table_entry[%d]:\n", i);
+		printf("             dt_size = %d\n", dt_size);
+		printf("           dt_offset = %d\n", dt_offset);
+		printf("                  id = %08x\n", fdt32_to_cpu(e->id));
+		printf("                 rev = %08x\n", fdt32_to_cpu(e->rev));
+		for (j = 0; j < 4; ++j) {
+			printf("           custom[%d] = %08x\n", j,
+			       fdt32_to_cpu(e->custom[j]));
+		}
+
+		unmap_sysmem(e);
+
+		/* Print FDT info for this entry */
+		fdt = map_sysmem(hdr_addr + dt_offset, sizeof(*fdt));
+		android_dt_print_fdt_info(fdt);
+		unmap_sysmem(fdt);
+	}
+}
+#endif
diff --git a/include/image-android-dt.h b/include/image-android-dt.h
new file mode 100644
index 0000000000..08b810d461
--- /dev/null
+++ b/include/image-android-dt.h
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2018 Linaro Ltd.
+ * Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef IMAGE_ANDROID_DT_H
+#define IMAGE_ANDROID_DT_H
+
+#include <linux/types.h>
+
+bool android_dt_check_header(ulong hdr_addr);
+bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
+				 u32 *size);
+
+#if !defined(CONFIG_SPL_BUILD)
+void android_dt_print_contents(ulong hdr_addr);
+#endif
+
+#endif /* IMAGE_ANDROID_DT_H */

commit 7ec0ac2b36e8be69bf24bbcab547b519093ace05
Author: Alex Deymo <deymo@google.com>
Date:   Mon May 28 17:19:35 2018 +0200

    UPSTREAM: Import Android's dt_table.h for DT image format
    
    Android documentation defines the recommended image format for storing
    DTB/DTBO files in a single dtbo.img image. This patch includes the
    latest header file with the struct definitions for this format from
    AOSP.
    
    The header was adapted to U-Boot's coding style and the function
    declarations were removed.
    
    Change-Id: I4d3a452b600a6908f4b720b6e6c926c918be5630
    Signed-off-by: Alex Deymo <deymo@google.com>
    [trini: Change SDPX tag location]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
    (cherry picked from commit 643cefa4d848a9358951caab42b5f9cd15e4fb5f)

diff --git a/include/dt_table.h b/include/dt_table.h
new file mode 100644
index 0000000000..7fb16e900c
--- /dev/null
+++ b/include/dt_table.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * This is from the Android Project,
+ * Repository: https://android.googlesource.com/platform/system/libufdt
+ * File: utils/src/dt_table.h
+ * Commit: 2626d8b9e4d8e8c6cc67ceb1dc4e05a47779785c
+ * Copyright (C) 2017 The Android Open Source Project
+ */
+
+#ifndef DT_TABLE_H
+#define DT_TABLE_H
+
+#include <linux/types.h>
+
+#define DT_TABLE_MAGIC			0xd7b7ab1e
+#define DT_TABLE_DEFAULT_PAGE_SIZE	2048
+#define DT_TABLE_DEFAULT_VERSION	0
+
+struct dt_table_header {
+	u32 magic;		/* DT_TABLE_MAGIC */
+	u32 total_size;		/* includes dt_table_header + all dt_table_entry
+				 * and all dtb/dtbo
+				 */
+	u32 header_size;	/* sizeof(dt_table_header) */
+
+	u32 dt_entry_size;	/* sizeof(dt_table_entry) */
+	u32 dt_entry_count;	/* number of dt_table_entry */
+	u32 dt_entries_offset;	/* offset to the first dt_table_entry
+				 * from head of dt_table_header.
+				 * The value will be equal to header_size if
+				 * no padding is appended
+				 */
+	u32 page_size;		/* flash page size we assume */
+	u32 version;            /* DTBO image version, the current version is 0.
+				 * The version will be incremented when the
+				 * dt_table_header struct is updated.
+				 */
+};
+
+struct dt_table_entry {
+	u32 dt_size;
+	u32 dt_offset;		/* offset from head of dt_table_header */
+
+	u32 id;			/* optional, must be zero if unused */
+	u32 rev;		/* optional, must be zero if unused */
+	u32 custom[4];		/* optional, must be zero if unused */
+};
+
+#endif

commit d101530a8a47a7b6b0c000f115e50e626ee5ab21
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Aug 3 18:39:23 2018 +0800

    rockchip: clk: px30: Add support to set vopl aclk and dclk rate
    
    Change-Id: I31376ebb8d1d40d46ad4e2b6421b65ac7fae096d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 1cadbe4b54..0120227587 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -194,6 +194,19 @@ enum {
 	DCLK_VOPB_DIV_SHIFT	= 0,
 	DCLK_VOPB_DIV_MASK	= 0xff,
 
+	/* CRU_CLK_SEL8_CON */
+	DCLK_VOPL_SEL_SHIFT	= 14,
+	DCLK_VOPL_SEL_MASK	= 0x3 << DCLK_VOPL_SEL_SHIFT,
+	DCLK_VOPL_SEL_DIVOUT	= 0,
+	DCLK_VOPL_SEL_FRACOUT,
+	DCLK_VOPL_SEL_24M,
+	DCLK_VOPL_PLL_SEL_SHIFT	= 11,
+	DCLK_VOPL_PLL_SEL_MASK	= 0x1 << DCLK_VOPL_PLL_SEL_SHIFT,
+	DCLK_VOPL_PLL_SEL_CPLL	= 0,
+	DCLK_VOPL_PLL_SEL_NPLL,
+	DCLK_VOPL_DIV_SHIFT	= 0,
+	DCLK_VOPL_DIV_MASK	= 0xff,
+
 	/* CRU_CLK_SEL14_CON */
 	PERI_PLL_SEL_SHIFT	=15,
 	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index cfb000a6f8..2c1e05921b 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -99,6 +99,9 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 
 static struct pll_rate_table auto_table;
 
+static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
+				   enum px30_pll_id pll_id);
+
 static struct pll_rate_table *pll_clk_set_by_auto(u32 drate)
 {
 	struct pll_rate_table *rate = &auto_table;
@@ -627,10 +630,12 @@ static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
 	struct px30_cru *cru = priv->cru;
+	ulong npll_hz;
 	int src_clk_div;
 
 	switch (clk_id) {
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[3],
@@ -652,6 +657,26 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 			     DCLK_VOPB_PLL_SEL_CPLL << DCLK_VOPB_PLL_SEL_SHIFT |
 			     (src_clk_div - 1) << DCLK_VOPB_DIV_SHIFT);
 		break;
+	case DCLK_VOPL:
+		npll_hz = px30_clk_get_pll_rate(priv, NPLL);
+		if (npll_hz >= PX30_VOP_PLL_LIMIT && npll_hz >= hz && npll_hz % hz == 0) {
+			src_clk_div = npll_hz / hz;
+			assert(src_clk_div - 1 <= 255);
+		} else {
+			if (hz < PX30_VOP_PLL_LIMIT)
+				src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
+			else
+				src_clk_div = 1;
+			assert(src_clk_div - 1 <= 255);
+			rkclk_set_pll(&cru->pll[NPLL], &cru->mode, NPLL, hz * src_clk_div);
+		}
+		rk_clrsetreg(&cru->clksel_con[5],
+			     DCLK_VOPL_SEL_MASK | DCLK_VOPL_PLL_SEL_MASK |
+			     DCLK_VOPL_DIV_MASK,
+			     DCLK_VOPL_SEL_DIVOUT << DCLK_VOPL_SEL_SHIFT |
+			     DCLK_VOPL_PLL_SEL_NPLL << DCLK_VOPL_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << DCLK_VOPL_DIV_SHIFT);
+		break;
 	default:
 		printf("do not support this vop freq\n");
 		return -EINVAL;
@@ -920,7 +945,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 		rate = px30_spi_get_clk(priv, clk->id);
 		break;
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 	case DCLK_VOPB:
+	case DCLK_VOPL:
 		rate = px30_vop_get_clk(priv, clk->id);
 		break;
 	case ACLK_BUS_PRE:
@@ -983,7 +1010,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		ret = px30_spi_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_VOPB:
+	case ACLK_VOPL:
 	case DCLK_VOPB:
+	case DCLK_VOPL:
 		ret = px30_vop_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_BUS_PRE:

commit f909d4a8c942dccbf2cb7d34d2b1d8e4bca0bfa6
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Aug 3 17:43:46 2018 +0800

    rockchip: clk: px30: Add support to limit minimum rate for vop dclk
    
    Change-Id: Ieff359603b1b6dede4377b1a17daf3eb803e2552
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a4a5d4da25..cfb000a6f8 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -26,6 +26,8 @@ enum {
 	OUTPUT_MIN_HZ	= 24 * 1000000,
 };
 
+#define PX30_VOP_PLL_LIMIT			600000000
+
 #define PX30_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
 			_postdiv2, _dsmpd, _frac)		\
 {								\
@@ -627,29 +629,28 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 <= 31);
-
 	switch (clk_id) {
 	case ACLK_VOPB:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[3],
 			     ACLK_VO_PLL_MASK | ACLK_VO_DIV_MASK,
 			     ACLK_VO_SEL_GPLL << ACLK_VO_PLL_SHIFT |
 			     (src_clk_div - 1) << ACLK_VO_DIV_SHIFT);
 		break;
 	case DCLK_VOPB:
-		/*
-		 * vopb dclk source from cpll, and equals to
-		 * cpll(means div == 1)
-		 */
-		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz);
-
+		if (hz < PX30_VOP_PLL_LIMIT)
+			src_clk_div = DIV_ROUND_UP(PX30_VOP_PLL_LIMIT, hz);
+		else
+			src_clk_div = 1;
+		assert(src_clk_div - 1 <= 255);
+		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz * src_clk_div);
 		rk_clrsetreg(&cru->clksel_con[5],
 			     DCLK_VOPB_SEL_MASK | DCLK_VOPB_PLL_SEL_MASK |
 			     DCLK_VOPB_DIV_MASK,
 			     DCLK_VOPB_SEL_DIVOUT << DCLK_VOPB_SEL_SHIFT |
 			     DCLK_VOPB_PLL_SEL_CPLL << DCLK_VOPB_PLL_SEL_SHIFT |
-			     (1 - 1) << DCLK_VOPB_DIV_SHIFT);
+			     (src_clk_div - 1) << DCLK_VOPB_DIV_SHIFT);
 		break;
 	default:
 		printf("do not support this vop freq\n");

commit bf97d0d67a4cbb963e8ed23bc26c3296a9c0ae4c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 15:11:58 2018 +0800

    rockchip: clk: px30: Avoid setting gpll rate repeatedly
    
    Change-Id: I24a062bf17f2552b94c9421b52ee930890fefcb6
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index e49abeeee4..a4a5d4da25 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1271,6 +1271,10 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 		return ret;
 	}
 	cru_priv = dev_get_priv(cru_dev);
+
+	if (priv->gpll_hz == hz)
+		return priv->gpll_hz;
+
 	cru_priv->gpll_hz = priv->gpll_hz;
 	div = DIV_ROUND_UP(hz, priv->gpll_hz);
 

commit eb46e717871223129ed3a414912fa148c8c898db
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 11:48:51 2018 +0800

    rockchip: clk: px30: restore bus and peri rate when change gpll rate
    
    Change-Id: I208196e11e7c4fa5db26a02abdd41ecfa610d5bd
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 07c14e13de..e49abeeee4 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1093,6 +1093,7 @@ int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
 static int px30_clk_get_phase(struct clk *clk)
 {
 	int ret;
+
 	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case SCLK_EMMC_SAMPLE:
@@ -1258,10 +1259,10 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	struct px30_pmucru *pmucru = priv->pmucru;
 	u32 div;
 	ulong emmc_rate, sdmmc_rate, nandc_rate;
+	ulong aclk_bus_rate, hclk_bus_rate, pclk_bus_rate;
+	ulong aclk_peri_rate, hclk_peri_rate, pclk_pmu_rate;
 	int ret;
 
-	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
-
 	ret = uclass_get_device_by_name(UCLASS_CLK,
 					"clock-controller@ff2b0000",
 					 &cru_dev);
@@ -1271,44 +1272,50 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	}
 	cru_priv = dev_get_priv(cru_dev);
 	cru_priv->gpll_hz = priv->gpll_hz;
-
 	div = DIV_ROUND_UP(hz, priv->gpll_hz);
 
-	/*
-	 * avoid bus and peri clock rate too large, reduce rate first.
-	 * they will be assigned by clk_set_defaults.
-	 */
-	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE,
-			 px30_bus_get_clk(cru_priv, ACLK_BUS_PRE) / div);
-	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE,
-			 px30_bus_get_clk(cru_priv, HCLK_BUS_PRE) / div);
-	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE,
-			 px30_bus_get_clk(cru_priv, PCLK_BUS_PRE) / div);
-	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE,
-			  px30_bus_get_clk(cru_priv, ACLK_PERI_PRE) / div);
-	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE,
-			  px30_bus_get_clk(cru_priv, HCLK_PERI_PRE) / div);
-	px30_pclk_pmu_set_pmuclk(priv, px30_pclk_pmu_get_pmuclk(priv) / div);
-
-	/*
-	 * save emmc, sdmmc and nandc clock rate,
-	 * nandc clock rate should less than or equal to 150Mhz.
-	 */
+	/* save clock rate */
+	aclk_bus_rate = px30_bus_get_clk(cru_priv, ACLK_BUS_PRE);
+	hclk_bus_rate = px30_bus_get_clk(cru_priv, HCLK_BUS_PRE);
+	pclk_bus_rate = px30_bus_get_clk(cru_priv, PCLK_BUS_PRE);
+	aclk_peri_rate = px30_peri_get_clk(cru_priv, ACLK_PERI_PRE);
+	hclk_peri_rate = px30_peri_get_clk(cru_priv, HCLK_PERI_PRE);
+	pclk_pmu_rate = px30_pclk_pmu_get_pmuclk(priv);
+	debug("%s aclk_bus=%lu, hclk_bus=%lu, pclk_bus=%lu\n", __func__,
+	      aclk_bus_rate, hclk_bus_rate, pclk_bus_rate);
+	debug("%s aclk_peri=%lu, hclk_peri=%lu, pclk_pmu=%lu\n", __func__,
+	      aclk_peri_rate, hclk_peri_rate, pclk_pmu_rate);
 	emmc_rate = px30_mmc_get_clk(cru_priv, SCLK_EMMC);
 	sdmmc_rate = px30_mmc_get_clk(cru_priv, SCLK_SDMMC);
 	nandc_rate = px30_nandc_get_clk(cru_priv);
-	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__, emmc_rate,
-	      sdmmc_rate, nandc_rate);
+	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__,
+	      emmc_rate, sdmmc_rate, nandc_rate);
+
 	/* avoid rate too large, reduce rate first */
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate / div);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate / div);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, pclk_bus_rate / div);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, aclk_peri_rate / div);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, hclk_peri_rate / div);
+	px30_pclk_pmu_set_pmuclk(priv, pclk_pmu_rate / div);
+
 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate / div);
 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate / div);
 	px30_nandc_set_clk(cru_priv, nandc_rate / div);
 
+	/* change gpll rate */
 	rkclk_set_pll(&pmucru->pll, &pmucru->pmu_mode, GPLL, hz);
 	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
 	cru_priv->gpll_hz = priv->gpll_hz;
 
-	/* restore emmc, sdmmc and nandc clock rate */
+	/* restore clock rate */
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE, aclk_bus_rate);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE, hclk_bus_rate);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE, pclk_bus_rate);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE, aclk_peri_rate);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE, hclk_peri_rate);
+	px30_pclk_pmu_set_pmuclk(priv, pclk_pmu_rate);
+
 	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate);
 	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate);
 	px30_nandc_set_clk(cru_priv, nandc_rate);

commit a221d6e67e054c65d2bfc136c9930bcbd9135ef9
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 11:43:54 2018 +0800

    rockchip: clk: px30: Add support to set npll rate
    
    Change-Id: Ida62e70610bd28d4c7d327e0431f09b0e4de6b2e
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index f40756a753..07c14e13de 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -814,6 +814,16 @@ static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
 	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
 }
 
+static ulong px30_clk_set_pll_rate(struct px30_clk_priv *priv,
+				   enum px30_pll_id pll_id, ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+
+	if (rkclk_set_pll(&cru->pll[pll_id], &cru->mode, pll_id, hz))
+		return -EINVAL;
+	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
+}
+
 static ulong px30_armclk_set_clk(struct px30_clk_priv *priv, ulong hz)
 {
 	struct px30_cru *cru = priv->cru;
@@ -940,6 +950,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
+	case PLL_NPLL:
+		ret = px30_clk_set_pll_rate(priv, NPLL, rate);
+		break;
 	case ARMCLK:
 		if (priv->armclk_hz)
 			px30_armclk_set_clk(priv, rate);

commit c4d4e4dc26d16a5754169ba8a630b5ff337179ed
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Aug 1 11:18:11 2018 +0800

    rockchip: clk: px30: Add clk_set_defaults()
    
    As clk_set_defaults() is removed in device core, so add it in clock
    driver.
    
    Change-Id: Ib5b9a7f81c738c65f2cb3e0ca74a410cda2ca1e2
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a7e52b449b..f40756a753 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -791,7 +791,6 @@ static int px30_clk_get_gpll_rate(ulong *rate)
 {
 	struct udevice *pmucru_dev;
 	struct px30_pmuclk_priv *priv;
-	struct px30_pmucru *pmucru;
 	int ret;
 
 	ret = uclass_get_device_by_driver(UCLASS_CLK,
@@ -802,8 +801,7 @@ static int px30_clk_get_gpll_rate(ulong *rate)
 		return ret;
 	}
 	priv = dev_get_priv(pmucru_dev);
-	pmucru = priv->pmucru;
-	*rate =  rkclk_pll_get_rate(&pmucru->pll, &pmucru->pmu_mode, GPLL);
+	*rate =  priv->gpll_hz;
 
 	return 0;
 }
@@ -863,15 +861,10 @@ static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
-	int ret;
 
-	if (!priv->gpll_hz) {
-		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
-		if (ret) {
-			printf("%s failed to get gpll rate\n", __func__);
-			return ret;
-		}
-		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	if (!priv->gpll_hz && clk->id > ARMCLK) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
 	}
 
 	debug("%s %ld\n", __func__, clk->id);
@@ -940,13 +933,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	if (!priv->gpll_hz) {
-		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
-		if (ret) {
-			printf("%s failed to get gpll rate\n", __func__);
-			return ret;
-		}
-		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	if (!priv->gpll_hz && clk->id > ARMCLK) {
+		printf("%s gpll=%lu\n", __func__, priv->gpll_hz);
+		return -ENOENT;
 	}
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
@@ -1131,12 +1120,26 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
+	int ret;
 
-	if (px30_clk_get_pll_rate(priv, APLL) == APLL_HZ)
-		return 0;
+	if (px30_clk_get_pll_rate(priv, APLL) != APLL_HZ) {
+		ret = px30_armclk_set_clk(priv, APLL_HZ);
+		if (ret < 0)
+			printf("%s failed to set armclk rate\n", __func__);
+	}
 
-	if (px30_armclk_set_clk(priv, APLL_HZ))
-		return -EINVAL;
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
+	if (!priv->gpll_hz) {
+		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
+		if (ret) {
+			printf("%s failed to get gpll rate\n", __func__);
+			return ret;
+		}
+	}
 
 	return 0;
 }
@@ -1347,6 +1350,16 @@ static struct clk_ops px30_pmuclk_ops = {
 
 static int px30_pmuclk_probe(struct udevice *dev)
 {
+	struct px30_pmuclk_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
 	return 0;
 }
 

commit 56dd66cf7956d3334c2a080c901780b34c3ceded
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Jul 30 20:17:28 2018 +0800

    rockchip: clk: px30: Modify the print format of clk
    
    The new print format can reduce startup time.
    
    Change-Id: I7ea53e07b8245fe4b5ef1fa15dd1f6efb176db47
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 087664a419..a7e52b449b 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1405,7 +1405,7 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	printf("CLK:\n");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1421,18 +1421,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit e83e4aa5e71c510b3fd4f3de8efc844ae2e44dd1
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Aug 3 11:01:10 2018 +0800

    drivers: rkflash: add 25Q64JVSSIQ and 25Q64FWSSIG nor devices
    
    Change-Id: I642a3db7a69e3b44c72ee965f1595078837bfa8e
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 4d074d5789..c3872e6bf8 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -23,10 +23,14 @@ static struct flash_info spi_flash_tbl[] = {
 	{0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0},
 	/* GD25Q512MC */
 	{0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0},
+	/* 25Q64JVSSIQ */
+	{0xef4017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
 	/* 25Q128FV */
 	{0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
 	/* 25Q256FV */
 	{0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0},
+	/* 25Q64FWSSIG */
+	{0xef6017, 128, 8, 0x13, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 14, 9, 0},
 	/* XT25F128A */
 	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
 	/* MX25L25635E/F */

commit 18f2475d9f01caf2576d203396d154247d3e6dcd
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Aug 1 10:36:25 2018 +0800

    rockchip: px30: scan sub-nodes of the syscon node
    
    Change-Id: Iab8f77f9bc52e9268df2f0c4accb5b0903e92af1
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c
index 47a5b3ded3..680d681fec 100644
--- a/arch/arm/mach-rockchip/px30/syscon_px30.c
+++ b/arch/arm/mach-rockchip/px30/syscon_px30.c
@@ -20,4 +20,7 @@ U_BOOT_DRIVER(syscon_px30) = {
 	.name = "px30_syscon",
 	.id = UCLASS_SYSCON,
 	.of_match = px30_syscon_ids,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 };

commit e869504af3cb1e0f8d8dab351c956f7b597a09b2
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Fri Jul 13 11:18:46 2018 +0800

    rockchip: dts: rk3288-fennec: add edp display support
    
    Change-Id: Icda290e83f8356f3bc80ee1ffc5bd8faab4e7dea
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-fennec.dtsi b/arch/arm/dts/rk3288-fennec.dtsi
index 9c9ac163d6..3e52a5483c 100644
--- a/arch/arm/dts/rk3288-fennec.dtsi
+++ b/arch/arm/dts/rk3288-fennec.dtsi
@@ -74,12 +74,89 @@
 		regulator-always-on;
 		regulator-boot-on;
 	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		power-supply = <&vcc_sys>;
+		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <50>;
+		pwms = <&pwm0 0 25000 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		pwm-delay-us = <10000>;
+		status = "okay";
+	};
+
+	edp_panel: edp-panel {
+		compatible ="lg,lp079qx1-sp0v", "simple-panel";
+		backlight = <&backlight>;
+		power-supply = <&vcc_io>;
+		enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		enable-delay-ms = <20>;
+
+		ports {
+			panel_in: endpoint {
+				remote-endpoint = <&edp_out>;
+			};
+		};
+	};
 };
 
 &cpu0 {
 	cpu0-supply = <&vdd_cpu>;
 };
 
+&display_subsystem {
+	status = "okay";
+};
+
+&edp {
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+			edp_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
+
 &emmc {
 	bus-width = <8>;
 	cap-mmc-highspeed;
@@ -91,6 +168,14 @@
 	status = "okay";
 };
 
+&pwm0 {
+	status = "okay";
+};
+
+&route_edp {
+	status = "okay";
+};
+
 &saradc {
 	vref-supply = <&vcc_18>;
 	status = "okay";
@@ -418,22 +503,10 @@
 	status = "okay";
 };
 
-&vopb {
-	status = "okay";
-};
-
-&vopb_mmu {
-	status = "okay";
-};
-
 &vopl {
 	status = "okay";
 };
 
-&vopl_mmu {
-	status = "okay";
-};
-
 &vpu {
 	status = "okay";
 };

commit a60b58c4d9445f9f08bb77b3bca617d7b3833a69
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Wed Aug 1 09:31:54 2018 +0800

    video/drm: lvds: Reverse sample clock direction on px30
    
    Fix display corruption when vdd_log equals 0.95v.
    
    Change-Id: I808a40ec7fdc2866f6b34a97ad77a7b1f9c01fd4
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 4d221bdf5f..e02f8d3813 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -316,6 +316,9 @@ static void px30_output_lvds(struct display_state *state)
 
 	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
 
+	lvds_msk_reg(lvds, MIPIPHY_REG8,
+		     m_SAMPLE_CLK_DIR, v_SAMPLE_CLK_DIR_REVERSE);
+
 	/* set lvds mode and reset phy config */
 	lvds_msk_reg(lvds, MIPIPHY_REGE0,
 		     m_MSB_SEL | m_DIG_INTER_RST,
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index a77db720e7..813b8288da 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -187,6 +187,10 @@ enum {
 #define MIPIPHY_REG4		0x0010
 #define v_FBDIV_LSB(x)          BITS_MASK(x, 0xff, 0)
 
+#define MIPIPHY_REG8			0x0020
+#define m_SAMPLE_CLK_DIR		BIT(4)
+#define v_SAMPLE_CLK_DIR_REVERSE	BIT(4)
+
 #define MIPIPHY_REGE0		0x0380
 #define m_MSB_SEL               BITS(1, 0)
 #define m_DIG_INTER_RST         BITS(1, 2)

commit 09e1ca434067bdf1e23f6313b8d4d23dce86d151
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Aug 2 11:52:47 2018 +0800

    clk: rockchip: rk3399: fix up the pll setting
    
    If the gpll and npll freq is no change,don't set pll once again.
    
    Change-Id: Ib16a0a1ff56560997b6ed4b487fc2d56928c14ec
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 3ab48a0f17..f7b1760054 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1158,6 +1158,12 @@ static void rkclk_init(struct rk3399_cru *cru)
 	 * reset/default values described in TRM to avoid confusion in kernel.
 	 * Please consider these three lines as a fix of bootrom bug.
 	 */
+	if (rkclk_pll_get_rate(&cru->npll_con[0]) != NPLL_HZ)
+		rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
+
+	if (rkclk_pll_get_rate(&cru->gpll_con[0]) == GPLL_HZ)
+		return;
+
 	rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101);
 	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
 	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
@@ -1218,8 +1224,13 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
 		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
 
+	rk_clrsetreg(&cru->clksel_con[21],
+		     ACLK_EMMC_PLL_SEL_MASK | ACLK_EMMC_DIV_CON_MASK,
+		     ACLK_EMMC_PLL_SEL_GPLL << ACLK_EMMC_PLL_SEL_SHIFT |
+		     (4 - 1) << ACLK_EMMC_DIV_CON_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[22], 0x3f << 0, 7 << 0);
+
 	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
-	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
 }
 
 static int rk3399_clk_probe(struct udevice *dev)

commit efb944b698be1d109a471428576a7f8e83e59d3d
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Jul 26 15:58:27 2018 +0800

    rockchip: clk: rk3128: support more clks to set and get rate
    
    Make clock ids consistent with kernel.
    support more clks to set and get rate.
    add clk init.
    
    Change-Id: I1e6b5734887e0bd5d845f1286f10eb0e3e42bc08
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index a10937e044..e0b43c1b03 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -174,7 +174,7 @@
                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                         #dma-cells = <1>;
-                        clocks = <&cru ACLK_DMAC2>;
+			clocks = <&cru ACLK_DMAC>;
                         clock-names = "apb_pclk";
                 };
 	};
@@ -367,7 +367,7 @@
 		reg = <0x1010e000 0x100>, <0x1010ec00 0x400>;
 		reg-names = "regs", "gamma_lut";
 		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru ACLK_VIO0>, <&cru DCLK_LCDC>, <&cru HCLK_LCDC>;
+		clocks = <&cru ACLK_LCDC0>, <&cru DCLK_VOP>, <&cru HCLK_LCDC0>;
 		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
 		status = "disabled";
 
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 9bd6409a1e..b0d85824ef 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -14,22 +14,13 @@
 
 #define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(594 * MHz)
-
-#define CORE_PERI_HZ	150000000
-#define CORE_ACLK_HZ	300000000
-
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
-
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
+#define ACLK_BUS_HZ	(148500000)
+#define ACLK_PERI_HZ	(148500000)
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3128_clk_priv {
 	struct rk3128_cru *cru;
-	ulong rate;
+	ulong gpll_hz;
 };
 
 struct rk3128_cru {
@@ -62,62 +53,33 @@ struct rk3128_cru {
 };
 check_member(rk3128_cru, cru_pll_prg_en, 0x01f0);
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+enum rk3128_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	PLL_COUNT,
 };
 
-enum {
-	/* PLLCON0*/
-	PLL_POSTDIV1_SHIFT	= 12,
-	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
-	PLL_FBDIV_SHIFT		= 0,
-	PLL_FBDIV_MASK		= 0xfff,
-
-	/* PLLCON1 */
-	PLL_RST_SHIFT		= 14,
-	PLL_PD_SHIFT		= 13,
-	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
-	PLL_DSMPD_SHIFT		= 12,
-	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
-	PLL_LOCK_STATUS_SHIFT	= 10,
-	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
-	PLL_POSTDIV2_SHIFT	= 6,
-	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
-	PLL_REFDIV_SHIFT	= 0,
-	PLL_REFDIV_MASK		= 0x3f,
-
-	/* CRU_MODE */
-	GPLL_MODE_SHIFT		= 12,
-	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
-	GPLL_MODE_SLOW		= 0,
-	GPLL_MODE_NORM,
-	GPLL_MODE_DEEP,
-	CPLL_MODE_SHIFT		= 8,
-	CPLL_MODE_MASK		= 1 << CPLL_MODE_SHIFT,
-	CPLL_MODE_SLOW		= 0,
-	CPLL_MODE_NORM,
-	DPLL_MODE_SHIFT		= 4,
-	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
-	DPLL_MODE_SLOW		= 0,
-	DPLL_MODE_NORM,
-	APLL_MODE_SHIFT		= 0,
-	APLL_MODE_MASK		= 1 << APLL_MODE_SHIFT,
-	APLL_MODE_SLOW		= 0,
-	APLL_MODE_NORM,
+struct rk3128_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+#define RK2928_PLL_CON(x)	((x) * 0x4)
+#define RK2928_MODE_CON		0x40
 
+enum {
 	/* CRU_CLK_SEL0_CON */
-	BUS_ACLK_PLL_SEL_SHIFT	= 14,
-	BUS_ACLK_PLL_SEL_MASK	= 3 << BUS_ACLK_PLL_SEL_SHIFT,
-	BUS_ACLK_PLL_SEL_CPLL	= 0,
-	BUS_ACLK_PLL_SEL_GPLL,
-	BUS_ACLK_PLL_SEL_GPLL_DIV2,
-	BUS_ACLK_PLL_SEL_GPLL_DIV3,
-	BUS_ACLK_DIV_SHIFT	= 8,
-	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+	BUS_PLL_SEL_SHIFT	= 13,
+	BUS_PLL_SEL_MASK	= 3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_CPLL	= 0,
+	BUS_PLL_SEL_GPLL,
+	BUS_PLL_SEL_GPLL_DIV2,
+	BUS_PLL_SEL_GPLL_DIV3,
+	ACLK_BUS_DIV_SHIFT	= 8,
+	ACLK_BUS_DIV_MASK	= 0x1f << ACLK_BUS_DIV_SHIFT,
 	CORE_CLK_PLL_SEL_SHIFT	= 7,
 	CORE_CLK_PLL_SEL_MASK	= 1 << CORE_CLK_PLL_SEL_SHIFT,
 	CORE_CLK_PLL_SEL_APLL	= 0,
@@ -126,14 +88,14 @@ enum {
 	CORE_DIV_CON_MASK	= 0x1f << CORE_DIV_CON_SHIFT,
 
 	/* CRU_CLK_SEL1_CON */
-	BUS_PCLK_DIV_SHIFT	= 12,
-	BUS_PCLK_DIV_MASK	= 7 << BUS_PCLK_DIV_SHIFT,
-	BUS_HCLK_DIV_SHIFT	= 8,
-	BUS_HCLK_DIV_MASK	= 3 << BUS_HCLK_DIV_SHIFT,
+	PCLK_BUS_DIV_SHIFT	= 12,
+	PCLK_BUS_DIV_MASK	= 7 << PCLK_BUS_DIV_SHIFT,
+	HCLK_BUS_DIV_SHIFT	= 8,
+	HCLK_BUS_DIV_MASK	= 3 << HCLK_BUS_DIV_SHIFT,
 	CORE_ACLK_DIV_SHIFT	= 4,
-	CORE_ACLK_DIV_MASK	= 7 << CORE_ACLK_DIV_SHIFT,
-	CORE_PERI_DIV_SHIFT	= 0,
-	CORE_PERI_DIV_MASK	= 0xf << CORE_PERI_DIV_SHIFT,
+	CORE_ACLK_DIV_MASK	= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT	= 0,
+	CORE_DBG_DIV_MASK	= 0x0f << CORE_DBG_DIV_SHIFT,
 
 	/* CRU_CLK_SEL2_CON */
 	NANDC_PLL_SEL_SHIFT	= 14,
@@ -147,16 +109,17 @@ enum {
 
 	/* CRU_CLKSEL10_CON */
 	PERI_PLL_SEL_SHIFT	= 14,
-	PERI_PLL_SEL_MASK	= 1 << PERI_PLL_SEL_SHIFT,
-	PERI_PLL_APLL		= 0,
-	PERI_PLL_DPLL,
-	PERI_PLL_GPLL,
-	PERI_PCLK_DIV_SHIFT	= 12,
-	PERI_PCLK_DIV_MASK	= 3 << PERI_PCLK_DIV_SHIFT,
-	PERI_HCLK_DIV_SHIFT	= 8,
-	PERI_HCLK_DIV_MASK	= 3 << PERI_HCLK_DIV_SHIFT,
-	PERI_ACLK_DIV_SHIFT	= 0,
-	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_SEL_GPLL	= 0,
+	PERI_PLL_SEL_CPLL,
+	PERI_PLL_SEL_GPLL_DIV2,
+	PERI_PLL_SEL_GPLL_DIV3,
+	PCLK_PERI_DIV_SHIFT	= 12,
+	PCLK_PERI_DIV_MASK	= 3 << PCLK_PERI_DIV_SHIFT,
+	HCLK_PERI_DIV_SHIFT	= 8,
+	HCLK_PERI_DIV_MASK	= 3 << HCLK_PERI_DIV_SHIFT,
+	ACLK_PERI_DIV_SHIFT	= 0,
+	ACLK_PERI_DIV_MASK	= 0x1f << ACLK_PERI_DIV_SHIFT,
 
 	/* CRU_CLKSEL11_CON */
 	MMC0_PLL_SHIFT		= 6,
@@ -177,6 +140,14 @@ enum {
 	EMMC_SEL_24M,
 	EMMC_DIV_SHIFT		= 8,
 	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
+	SDIO_PLL_SHIFT		= 6,
+	SDIO_PLL_MASK		= 3 << SDIO_PLL_SHIFT,
+	SDIO_SEL_APLL		= 0,
+	SDIO_SEL_GPLL,
+	SDIO_SEL_GPLL_DIV2,
+	SDIO_SEL_24M,
+	SDIO_DIV_SHIFT		= 0,
+	SDIO_DIV_MASK		= 0x3f << SDIO_DIV_SHIFT,
 
 	/* CLKSEL_CON24 */
 	SARADC_DIV_CON_SHIFT	= 8,
@@ -184,11 +155,11 @@ enum {
 	SARADC_DIV_CON_WIDTH	= 8,
 
 	/* CRU_CLKSEL27_CON*/
-	DCLK_VOP_SEL_SHIFT         = 0,
-	DCLK_VOP_SEL_MASK          = 1 << DCLK_VOP_SEL_SHIFT,
-	DCLK_VOP_PLL_SEL_CPLL           = 0,
-	DCLK_VOP_DIV_CON_SHIFT          = 8,
-	DCLK_VOP_DIV_CON_MASK           = 0xff << DCLK_VOP_DIV_CON_SHIFT,
+	DCLK_VOP_SEL_SHIFT	= 0,
+	DCLK_VOP_SEL_MASK	= 1 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_CPLL	= 0,
+	DCLK_VOP_DIV_CON_SHIFT	= 8,
+	DCLK_VOP_DIV_CON_MASK	= 0xff << DCLK_VOP_DIV_CON_SHIFT,
 
 	/* CRU_CLKSEL31_CON */
 	VIO0_PLL_SHIFT		= 5,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 795b46bab5..312f9d26d2 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -20,268 +20,125 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-enum {
-	VCO_MAX_HZ	= 2400U * 1000000,
-	VCO_MIN_HZ	= 600 * 1000000,
-	OUTPUT_MAX_HZ	= 2400U * 1000000,
-	OUTPUT_MIN_HZ	= 24 * 1000000,
-};
-
 #define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-
-/* use integer mode*/
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
-
-static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
-			 const struct pll_div *div)
-{
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		udelay(1);
-
-	return 0;
+#ifndef CONFIG_SPL_BUILD
+#define RK3128_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
 }
+#endif
+
+static struct rockchip_pll_rate_table rk3128_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+#endif
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 1, 200, 6, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+	RK3036_PLL_RATE(594000000, 1, 99, 4, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	{ /* sentinel */ },
+};
 
-static int pll_para_config(u32 freq_hz, struct pll_div *div)
-{
-	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
-	u32 postdiv1, postdiv2 = 1;
-	u32 fref_khz;
-	u32 diff_khz, best_diff_khz;
-	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
-	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
-	u32 vco_khz;
-	u32 freq_khz = freq_hz / 1000;
-
-	if (!freq_hz) {
-		printf("%s: the frequency can't be 0 Hz\n", __func__);
-		return -1;
-	}
-
-	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
-	if (postdiv1 > max_postdiv1) {
-		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
-		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
-	}
-
-	vco_khz = freq_khz * postdiv1 * postdiv2;
-
-	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
-	    postdiv2 > max_postdiv2) {
-		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
-		       __func__, freq_hz);
-		return -1;
-	}
-
-	div->postdiv1 = postdiv1;
-	div->postdiv2 = postdiv2;
-
-	best_diff_khz = vco_khz;
-	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
-		fref_khz = ref_khz / refdiv;
-
-		fbdiv = vco_khz / fref_khz;
-		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
-			continue;
-		diff_khz = vco_khz - fbdiv * fref_khz;
-		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
-			fbdiv++;
-			diff_khz = fref_khz - diff_khz;
-		}
-
-		if (diff_khz >= best_diff_khz)
-			continue;
+#define RK3128_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
 
-		best_diff_khz = diff_khz;
-		div->refdiv = refdiv;
-		div->fbdiv = fbdiv;
-	}
+static struct rockchip_cpu_rate_table rk3128_cpu_rates[] = {
+	RK3128_CPUCLK_RATE(1200000000, 1, 5),
+	RK3128_CPUCLK_RATE(1008000000, 1, 5),
+	RK3128_CPUCLK_RATE(816000000, 1, 3),
+	RK3128_CPUCLK_RATE(600000000, 1, 3),
+};
 
-	if (best_diff_khz > 4 * (1000)) {
-		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
-		       __func__, freq_hz,
-		       best_diff_khz * 1000);
-		return -1;
-	}
-	return 0;
-}
+#ifndef CONFIG_SPL_BUILD
+static const struct rk3128_clk_info clks_dump[] = {
+	RK3128_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3128_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3128_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3128_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3128_CLK_DUMP(ARMCLK, "armclk", true),
+	RK3128_CLK_DUMP(ACLK_CPU, "aclk_cpu", true),
+	RK3128_CLK_DUMP(HCLK_CPU, "hclk_cpu", true),
+	RK3128_CLK_DUMP(PCLK_CPU, "pclk_cpu", true),
+	RK3128_CLK_DUMP(ACLK_PERI, "aclk_peri", true),
+	RK3128_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK3128_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+static struct rockchip_pll_clock rk3128_pll_clks[] = {
+	[APLL] = PLL(pll_rk3036, PLL_APLL, RK2928_PLL_CON(0),
+		     RK2928_MODE_CON, 0, 10, 0, rk3128_pll_rates),
+	[DPLL] = PLL(pll_rk3036, PLL_DPLL, RK2928_PLL_CON(4),
+		     RK2928_MODE_CON, 4, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3036, PLL_CPLL, RK2928_PLL_CON(8),
+		    RK2928_MODE_CON, 8, 10, 0, rk3128_pll_rates),
+	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK2928_PLL_CON(12),
+		     RK2928_MODE_CON, 12, 10, 0, rk3128_pll_rates),
+};
 
-static void rkclk_init(struct rk3128_cru *cru)
+static ulong rk3128_armclk_set_clk(struct rk3128_clk_priv *priv, ulong hz)
 {
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
-		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+	struct rk3128_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
 
-	/* init pll */
-	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+	rate = rockchip_get_cpu_settings(rk3128_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
 
 	/*
 	 * select apll as cpu/core clock pll source and
 	 * set up dependent divisors for PERI and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
-
-	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_PERI_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
-
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
-
-	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
-
-	rk_clrsetreg(&cru->cru_clksel_con[10],
-		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
-		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT |
-		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
-
-	/*fix NAND controller  working clock max to 150Mhz */
-	rk_clrsetreg(&cru->cru_clksel_con[2],
-		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
-		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
-		     3 << NANDC_CLK_DIV_SHIFT);
-}
-
-/* Get pll rate by id */
-static uint32_t rkclk_pll_get_rate(struct rk3128_cru *cru,
-				   enum rk_clk_id clk_id)
-{
-	uint32_t refdiv, fbdiv, postdiv1, postdiv2;
-	uint32_t con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		GPLL_MODE_SHIFT, 0xff
-	};
-	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		GPLL_MODE_MASK, 0xff
-	};
-	uint shift;
-	uint mask;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	mask = clk_mask[clk_id];
-
-	switch ((con & mask) >> shift) {
-	case GPLL_MODE_SLOW:
-		return OSC_HZ;
-	case GPLL_MODE_NORM:
-
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-	case GPLL_MODE_DEEP:
-	default:
-		return 32768;
+	old_rate = rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk3128_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk3128_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
 	}
+
+	return rockchip_pll_get_rate(&rk3128_pll_clks[APLL], priv->cru, APLL);
 }
 
-static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
+static ulong rockchip_mmc_get_clk(struct rk3128_clk_priv *priv,
 				  int periph)
 {
+	struct rk3128_cru *cru = priv->cru;
 	uint src_rate;
 	uint div, mux;
 	u32 con;
@@ -296,28 +153,35 @@ static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[11]);
 		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
 		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
 		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		con = readl(&cru->cru_clksel_con[12]);
+		mux = (con & SDIO_PLL_MASK) >> SDIO_PLL_SHIFT;
+		div = (con & SDIO_DIV_MASK) >> SDIO_DIV_SHIFT;
+		break;
 	default:
 		return -EINVAL;
 	}
 
-	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : priv->gpll_hz;
 	return DIV_TO_RATE(src_rate, div);
 }
 
-static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
+static ulong rockchip_mmc_set_clk(struct rk3128_clk_priv *priv,
 				  int periph, uint freq)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
 	int mux;
 
-	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
-
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, freq);
 
 	if (src_clk_div > 128) {
 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
@@ -328,6 +192,7 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 
 	switch (periph) {
 	case HCLK_EMMC:
+	case SCLK_EMMC:
 		rk_clrsetreg(&cru->cru_clksel_con[12],
 			     EMMC_PLL_MASK | EMMC_DIV_MASK,
 			     mux << EMMC_PLL_SHIFT |
@@ -340,60 +205,174 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 			     mux << MMC0_PLL_SHIFT |
 			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
 		break;
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     SDIO_PLL_MASK | SDIO_DIV_MASK,
+			     mux << SDIO_PLL_SHIFT |
+			     (src_clk_div - 1) << SDIO_DIV_SHIFT);
+		break;
 	default:
 		return -EINVAL;
 	}
 
-	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+	return rockchip_mmc_get_clk(priv, periph);
 }
 
-static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
+static ulong rk3128_peri_get_clk(struct rk3128_clk_priv *priv, ulong clk_id)
 {
-	u32 div, con;
+	struct rk3128_cru *cru = priv->cru;
+	u32 div, con, parent;
 
 	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & ACLK_PERI_DIV_MASK) >> ACLK_PERI_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case PCLK_PERI:
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
 		con = readl(&cru->cru_clksel_con[10]);
-		div = con >> 12 & 0x3;
+		div = (con & PCLK_PERI_DIV_MASK) >> PCLK_PERI_DIV_SHIFT;
+		parent = rk3128_peri_get_clk(priv, ACLK_PERI);
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & HCLK_PERI_DIV_MASK) >> HCLK_PERI_DIV_SHIFT;
+		parent = rk3128_peri_get_clk(priv, ACLK_PERI);
 		break;
 	default:
 		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(PERI_ACLK_HZ, div);
+	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+static ulong rk3128_peri_set_clk(struct rk3128_clk_priv *priv,
+				 ulong clk_id, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = PERI_ACLK_HZ / hz;
-	assert(src_clk_div - 1 < 4);
-
 	switch (clk_id) {
+	case ACLK_PERI:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 32);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_PLL_SEL_MASK | ACLK_PERI_DIV_MASK,
+			     PERI_PLL_SEL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PERI_DIV_SHIFT);
+		break;
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
-		rk_setreg(&cru->cru_clksel_con[10],
-			  ((src_clk_div - 1) << 12));
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3128_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PCLK_PERI_DIV_MASK,
+			     (src_clk_div - 1) << PCLK_PERI_DIV_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3128_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     HCLK_PERI_DIV_MASK,
+			     (src_clk_div - 1) << HCLK_PERI_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return rk3128_peri_get_clk(priv, clk_id);
+}
+
+static ulong rk3128_bus_get_clk(struct rk3128_clk_priv *priv, ulong clk_id)
+{
+	struct rk3128_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_CPU:
+		con = readl(&cru->cru_clksel_con[0]);
+		div = (con & ACLK_BUS_DIV_MASK) >> ACLK_BUS_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case PCLK_CPU:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & PCLK_BUS_DIV_MASK) >> PCLK_BUS_DIV_SHIFT;
+		parent = rk3128_bus_get_clk(priv, ACLK_CPU);
+		break;
+	case HCLK_CPU:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & HCLK_BUS_DIV_MASK) >> HCLK_BUS_DIV_SHIFT;
+		parent = rk3128_bus_get_clk(priv, ACLK_CPU);
 		break;
 	default:
 		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
+	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
+static ulong rk3128_bus_set_clk(struct rk3128_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
+	int src_clk_div;
+
+	switch (clk_id) {
+	case ACLK_CPU:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 32);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     BUS_PLL_SEL_MASK | ACLK_BUS_DIV_MASK,
+			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_BUS_DIV_SHIFT);
+		break;
+	case PCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk3128_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     PCLK_BUS_DIV_MASK,
+			     (src_clk_div - 1) << PCLK_BUS_DIV_SHIFT);
+		break;
+	case HCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk3128_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     HCLK_BUS_DIV_MASK,
+			     (src_clk_div - 1) << HCLK_BUS_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return rk3128_bus_get_clk(priv, clk_id);
+}
+
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3128_saradc_get_clk(struct rk3128_clk_priv *priv)
+{
+	struct rk3128_cru *cru = priv->cru;
 	u32 div, val;
 
 	val = readl(&cru->cru_clksel_con[24]);
@@ -403,8 +382,9 @@ static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
+static ulong rk3128_saradc_set_clk(struct rk3128_clk_priv *priv, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
@@ -414,18 +394,22 @@ static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
 		     SARADC_DIV_CON_MASK,
 		     src_clk_div << SARADC_DIV_CON_SHIFT);
 
-	return rk3128_saradc_get_clk(cru);
+	return rk3128_saradc_get_clk(priv);
 }
 
-static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+#define RK3128_LCDC_PLL_LIMIT			600000000
+
+static ulong rk3128_vop_set_clk(struct rk3128_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
+	struct rk3128_cru *cru = priv->cru;
 	int src_clk_div;
-	struct pll_div cpll_config = {0};
 
 	src_clk_div = GPLL_HZ / hz;
 	assert(src_clk_div - 1 < 31);
 
 	switch (clk_id) {
+	case ACLK_LCDC0:
 	case ACLK_VIO0:
 		rk_clrsetreg(&cru->cru_clksel_con[31],
 			     VIO0_PLL_MASK | VIO0_DIV_MASK,
@@ -438,15 +422,14 @@ static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
 			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
 		break;
-	case DCLK_LCDC:
-		if (pll_para_config(hz, &cpll_config))
-			return -1;
-		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
-
+	case DCLK_VOP:
+		src_clk_div = DIV_ROUND_UP(RK3128_LCDC_PLL_LIMIT, hz);
+		rockchip_pll_set_rate(&rk3128_pll_clks[CPLL],
+				      priv->cru, CPLL, src_clk_div * hz);
 		rk_clrsetreg(&cru->cru_clksel_con[27],
-			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
+			      DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
 			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
-			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+			     (src_clk_div - 1) << DCLK_VOP_DIV_CON_SHIFT);
 		break;
 	default:
 		printf("do not support this vop freq\n");
@@ -456,11 +439,13 @@ static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 	return hz;
 }
 
-static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
+static ulong rk3128_vop_get_rate(struct rk3128_clk_priv *priv, ulong clk_id)
 {
+	struct rk3128_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
+	case ACLK_LCDC0:
 	case ACLK_VIO0:
 		con = readl(&cru->cru_clksel_con[31]);
 		div = con  & 0x1f;
@@ -471,75 +456,136 @@ static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
 		div = (con >> 8) & 0x1f;
 		parent = GPLL_HZ;
 		break;
-	case DCLK_LCDC:
+	case DCLK_VOP:
 		con = readl(&cru->cru_clksel_con[27]);
-		div = (con >> 8) & 0xfff;
-		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
+		div = (con & DCLK_VOP_DIV_CON_MASK) >> DCLK_VOP_DIV_CON_SHIFT;
+		parent = rockchip_pll_get_rate(&rk3128_pll_clks[CPLL],
+					       priv->cru, CPLL);
 		break;
 	default:
 		return -ENOENT;
 	}
 	return DIV_TO_RATE(parent, div);
 }
+#endif
 
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
 
 	switch (clk->id) {
-	case 0 ... 63:
-		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+		rate =  rockchip_pll_get_rate(&rk3128_pll_clks[clk->id - 1],
+					      priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+					     priv->cru, APLL);
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+		rate = rockchip_mmc_get_clk(priv, clk->id);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
-		return rk3128_peri_get_pclk(priv->cru, clk->id);
+		rate = rk3128_peri_get_clk(priv, clk->id);
+		break;
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+		rate = rk3128_bus_get_clk(priv, clk->id);
+		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_SARADC:
-                return rk3128_saradc_get_clk(priv->cru);
-	case DCLK_LCDC:
+		rate = rk3128_saradc_get_clk(priv);
+		break;
+	case DCLK_VOP:
 	case ACLK_VIO0:
 	case ACLK_VIO1:
-		return rk3128_vop_get_rate(priv->cru, clk->id);
+	case ACLK_LCDC0:
+		rate = rk3128_vop_get_rate(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
+	return rate;
 }
 
 static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong new_rate, gclk_rate;
+	ulong ret;
 
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
 	switch (clk->id) {
-	case 0 ... 63:
-		return 0;
-	case DCLK_LCDC:
-	case ACLK_VIO0:
-	case ACLK_VIO1:
-		new_rate = rk3128_vop_set_clk(priv->cru,
-						clk->id, rate);
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk3128_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk3128_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		priv->gpll_hz = rate;
+		break;
+	case ARMCLK:
+		ret = rk3128_armclk_set_clk(priv, rate);
 		break;
 	case HCLK_EMMC:
-		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
-						clk->id, rate);
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
+	case HCLK_SDIO:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		ret = rockchip_mmc_set_clk(priv, clk->id, rate);
 		break;
+	case ACLK_PERI:
+	case PCLK_PERI:
+	case HCLK_PERI:
 	case PCLK_I2C0:
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 	case PCLK_PWM:
-		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
+		ret = rk3128_peri_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+		ret = rk3128_bus_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_SARADC:
-		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
+		ret = rk3128_saradc_set_clk(priv, rate);
 		break;
+	case DCLK_VOP:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+	case ACLK_LCDC0:
+		ret = rk3128_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
-
-	return new_rate;
+	return ret;
 }
 
 static struct clk_ops rk3128_clk_ops = {
@@ -556,11 +602,36 @@ static int rk3128_clk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static void rkclk_init(struct rk3128_clk_priv *priv)
+{
+	if (rockchip_pll_get_rate(&rk3128_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ)
+		rk3128_armclk_set_clk(priv, APLL_HZ);
+
+	priv->gpll_hz = rockchip_pll_get_rate(&rk3128_pll_clks[GPLL],
+					      priv->cru, GPLL);
+	rk3128_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ / 2);
+	rk3128_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ / 2);
+	rockchip_pll_set_rate(&rk3128_pll_clks[GPLL],
+			      priv->cru, GPLL, GPLL_HZ);
+	priv->gpll_hz = GPLL_HZ;
+	rk_clrsetreg(&priv->cru->cru_clksel_con[2],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     3 << NANDC_CLK_DIV_SHIFT);
+	rk3128_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ);
+	rk3128_bus_set_clk(priv, HCLK_CPU, ACLK_BUS_HZ / 2);
+	rk3128_bus_set_clk(priv, PCLK_CPU, ACLK_BUS_HZ / 2);
+	rk3128_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ);
+	rk3128_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
+	rk3128_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+}
+
 static int rk3128_clk_probe(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
-	rkclk_init(priv->cru);
+	rkclk_init(priv);
 
 	return 0;
 }
@@ -617,3 +688,62 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = {
 	.bind		= rk3128_clk_bind,
 	.probe		= rk3128_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3128_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3128_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 7ab50902c7..95efd48eb4 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -10,30 +10,31 @@
 /* core clocks */
 #define PLL_APLL		1
 #define PLL_DPLL		2
-#define PLL_GPLL		3
-#define ARMCLK			4
+#define PLL_CPLL		3
+#define PLL_GPLL		4
+#define ARMCLK			5
+#define PLL_GPLL_DIV2		6
+#define PLL_GPLL_DIV3		7
 
 /* sclk gates (special clocks) */
-#define SCLK_GPU		64
-#define SCLK_SPI		65
+#define SCLK_SPI0		65
+#define SCLK_NANDC		67
 #define SCLK_SDMMC		68
 #define SCLK_SDIO		69
 #define SCLK_EMMC		71
-#define SCLK_NANDC		76
 #define SCLK_UART0		77
 #define SCLK_UART1		78
 #define SCLK_UART2		79
-#define SCLK_I2S		82
+#define SCLK_I2S0		80
+#define SCLK_I2S1		81
 #define SCLK_SPDIF		83
 #define SCLK_TIMER0		85
 #define SCLK_TIMER1		86
 #define SCLK_TIMER2		87
 #define SCLK_TIMER3		88
+#define SCLK_TIMER4		89
+#define SCLK_TIMER5		90
 #define SCLK_SARADC		91
-#define SCLK_OTGPHY0		93
-#define SCLK_LCDC		100
-#define SCLK_HDMI		109
-#define SCLK_HEVC		111
 #define SCLK_I2S_OUT		113
 #define SCLK_SDMMC_DRV		114
 #define SCLK_SDIO_DRV		115
@@ -41,120 +42,175 @@
 #define SCLK_SDMMC_SAMPLE	118
 #define SCLK_SDIO_SAMPLE	119
 #define SCLK_EMMC_SAMPLE	121
-#define SCLK_PVTM_CORE          123
-#define SCLK_PVTM_GPU           124
-#define SCLK_PVTM_VIDEO         125
-#define SCLK_MIPI_24M           148
-#define SCLK_MAC		151
-#define SCLK_MACREF		152
-#define SCLK_SFC		160
+#define SCLK_VOP		122
+#define SCLK_MAC_SRC		124
+#define SCLK_MAC		126
+#define SCLK_MAC_REFOUT		127
+#define SCLK_MAC_REF		128
+#define SCLK_MAC_RX		129
+#define SCLK_MAC_TX		130
+#define SCLK_HEVC_CORE		134
+#define SCLK_RGA		135
+#define SCLK_CRYPTO		138
+#define SCLK_TSP		139
+#define SCLK_OTGPHY0		142
+#define SCLK_OTGPHY1		143
+#define SCLK_DDRC		144
+#define SCLK_PVTM_FUNC		145
+#define SCLK_PVTM_CORE		146
+#define SCLK_PVTM_GPU		147
+#define SCLK_MIPI_24M		148
+#define SCLK_PVTM		149
+#define SCLK_CIF_SRC		150
+#define SCLK_CIF_OUT_SRC	151
+#define SCLK_CIF_OUT		152
+#define SCLK_SFC		153
+#define SCLK_USB480M		154
+#define SCLK_HSADC_TSP		155
 
-#define DCLK_LCDC		190
+/* dclk gates */
+#define DCLK_VOP		190
+#define DCLK_EBC		191
 
 /* aclk gates */
-#define ACLK_DMAC2		194
-#define ACLK_VIO0		197
-#define ACLK_VIO1		203
-#define ACLK_VCODEC		208
-#define ACLK_CPU		209
+#define ACLK_VIO0		192
+#define ACLK_VIO1		193
+#define ACLK_DMAC		194
+#define ACLK_CPU		195
+#define ACLK_VEPU		196
+#define ACLK_VDPU		197
+#define ACLK_CIF		198
+#define ACLK_IEP		199
+#define ACLK_LCDC0		204
+#define ACLK_RGA		205
 #define ACLK_PERI		210
+#define ACLK_VOP		211
+#define ACLK_GMAC		212
+#define ACLK_GPU		213
 
 /* pclk gates */
 #define PCLK_SARADC		318
+#define PCLK_WDT		319
 #define PCLK_GPIO0		320
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
 #define PCLK_GPIO3		323
-#define PCLK_MIPI               325
+#define PCLK_VIO_H2P		324
+#define PCLK_MIPI		325
+#define PCLK_EFUSE		326
+#define PCLK_HDMI		327
+#define PCLK_ACODEC		328
 #define PCLK_GRF		329
 #define PCLK_I2C0		332
 #define PCLK_I2C1		333
 #define PCLK_I2C2		334
 #define PCLK_I2C3		335
-#define PCLK_SPI		338
+#define PCLK_SPI0		338
 #define PCLK_UART0		341
 #define PCLK_UART1		342
 #define PCLK_UART2		343
+#define PCLK_TSADC		344
 #define PCLK_PWM		350
 #define PCLK_TIMER		353
-#define PCLK_HDMI		360
-#define PCLK_CPU		362
+#define PCLK_CPU		354
 #define PCLK_PERI		363
-#define PCLK_DDRUPCTL		364
-#define PCLK_WDT		368
-#define PCLK_MIPIPHY            370
+#define PCLK_GMAC		367
+#define PCLK_PMU_PRE		368
+#define PCLK_SIM_CARD		369
+#define PCLK_MIPIPHY		370
 
 /* hclk gates */
-#define HCLK_OTG0		449
-#define HCLK_OTG1		450
+#define HCLK_SPDIF		440
+#define HCLK_GPS		441
+#define HCLK_USBHOST		442
+#define HCLK_I2S_8CH		443
+#define HCLK_I2S_2CH		444
+#define HCLK_VOP		452
 #define HCLK_NANDC		453
 #define HCLK_SDMMC		456
 #define HCLK_SDIO		457
 #define HCLK_EMMC		459
-#define HCLK_I2S		462
-#define HCLK_LCDC		465
-#define HCLK_ROM		467
-#define HCLK_VIO_H2P            469
-#define HCLK_VIO_BUS		472
-#define HCLK_VCODEC		476
-#define HCLK_CPU		477
+#define HCLK_CPU		460
+#define HCLK_VEPU		461
+#define HCLK_VDPU		462
+#define HCLK_LCDC0		463
+#define HCLK_EBC		465
+#define HCLK_VIO		466
+#define HCLK_RGA		467
+#define HCLK_IEP		468
+#define HCLK_VIO_H2P		469
+#define HCLK_CIF		470
+#define HCLK_HOST2		473
+#define HCLK_OTG		474
+#define HCLK_TSP		475
+#define HCLK_CRYPTO		476
 #define HCLK_PERI		478
 
 #define CLK_NR_CLKS		(HCLK_PERI + 1)
 
 /* soft-reset indices */
-#define SRST_CORE0		0
-#define SRST_CORE1		1
-#define SRST_CORE0_DBG		4
-#define SRST_CORE1_DBG		5
-#define SRST_CORE0_POR		8
-#define SRST_CORE1_POR		9
-#define SRST_L2C		12
-#define SRST_TOPDBG		13
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE2_PO		2
+#define SRST_CORE3_PO		3
+#define SRST_CORE0		4
+#define SRST_CORE1		5
+#define SRST_CORE2		6
+#define SRST_CORE3		7
+#define SRST_CORE0_DBG		8
+#define SRST_CORE1_DBG		9
+#define SRST_CORE2_DBG		10
+#define SRST_CORE3_DBG		11
+#define SRST_TOPDBG		12
+#define SRST_ACLK_CORE		13
 #define SRST_STRC_SYS_A		14
-#define SRST_PD_CORE_NIU	15
+#define SRST_L2C		15
 
-#define SRST_TIMER2		16
-#define SRST_CPUSYS_H		17
-#define SRST_AHB2APB_H		19
-#define SRST_TIMER3		20
+#define SRST_CPUSYS_H		18
+#define SRST_AHB2APBSYS_H	19
+#define SRST_SPDIF		20
 #define SRST_INTMEM		21
 #define SRST_ROM		22
 #define SRST_PERI_NIU		23
-#define SRST_I2S		24
-#define SRST_DDR_PLL		25
-#define SRST_GPU_DLL		26
-#define SRST_TIMER0		27
-#define SRST_TIMER1		28
-#define SRST_CORE_DLL		29
+#define SRST_I2S_2CH		24
+#define SRST_I2S_8CH		25
+#define SRST_GPU_PVTM		26
+#define SRST_FUNC_PVTM		27
+#define SRST_CORE_PVTM		29
 #define SRST_EFUSE_P		30
 #define SRST_ACODEC_P		31
 
 #define SRST_GPIO0		32
 #define SRST_GPIO1		33
 #define SRST_GPIO2		34
-#define SRST_MIPIPHY_P          36
+#define SRST_GPIO3		35
+#define SRST_MIPIPHY_P		36
 #define SRST_UART0		39
 #define SRST_UART1		40
 #define SRST_UART2		41
 #define SRST_I2C0		43
 #define SRST_I2C1		44
 #define SRST_I2C2		45
+#define SRST_I2C3		46
 #define SRST_SFC		47
 
-#define SRST_PWM0		48
+#define SRST_PWM		48
+#define SRST_DAP_PO		50
 #define SRST_DAP		51
 #define SRST_DAP_SYS		52
+#define SRST_CRYPTO		53
 #define SRST_GRF		55
-#define SRST_PERIPHSYS_A	57
-#define SRST_PERIPHSYS_H	58
-#define SRST_PERIPHSYS_P	59
+#define SRST_GMAC		56
+#define SRST_PERIPH_SYS_A	57
+#define SRST_PERIPH_SYS_H	58
+#define SRST_PERIPH_SYS_P       59
+#define SRST_SMART_CARD		60
 #define SRST_CPU_PERI		61
 #define SRST_EMEM_PERI		62
 #define SRST_USB_PERI		63
 
-#define SRST_DMA2		64
-#define SRST_MAC		66
+#define SRST_DMA		64
+#define SRST_GPS		67
 #define SRST_NANDC		68
 #define SRST_USBOTG0		69
 #define SRST_OTGC0		71
@@ -162,35 +218,58 @@
 #define SRST_OTGC1		74
 #define SRST_DDRMSCH		79
 
-#define SRST_MMC0		81
+#define SRST_SDMMC		81
 #define SRST_SDIO		82
 #define SRST_EMMC		83
-#define SRST_SPI0		84
+#define SRST_SPI		84
 #define SRST_WDT		86
 #define SRST_SARADC		87
 #define SRST_DDRPHY		88
 #define SRST_DDRPHY_P		89
 #define SRST_DDRCTRL		90
 #define SRST_DDRCTRL_P		91
+#define SRST_TSP		92
+#define SRST_TSP_CLKIN		93
+#define SRST_HOST0_ECHI		94
 
 #define SRST_HDMI_P		96
+#define SRST_VIO_ARBI_H		97
+#define SRST_VIO0_A		98
 #define SRST_VIO_BUS_H		99
+#define SRST_VOP_A		100
+#define SRST_VOP_H		101
+#define SRST_VOP_D		102
 #define SRST_UTMI0		103
 #define SRST_UTMI1		104
 #define SRST_USBPOR		105
+#define SRST_IEP_A		106
+#define SRST_IEP_H		107
+#define SRST_RGA_A		108
+#define SRST_RGA_H		109
+#define SRST_CIF0		110
+#define SRST_PMU		111
 
 #define SRST_VCODEC_A		112
 #define SRST_VCODEC_H		113
 #define SRST_VIO1_A		114
-#define SRST_HEVC		115
+#define SRST_HEVC_CORE		115
 #define SRST_VCODEC_NIU_A	116
-#define SRST_LCDC1_A		117
-#define SRST_LCDC1_H		118
-#define SRST_LCDC1_D		119
+#define SRST_PMU_NIU_P		117
+#define SRST_LCDC0_S		119
 #define SRST_GPU		120
 #define SRST_GPU_NIU_A		122
+#define SRST_EBC_A		123
+#define SRST_EBC_H		124
 
-#define SRST_DBG_P		131
-#define SRST_VIO_MIPI_DSI       137
+#define SRST_CORE_DBG		128
+#define SRST_DBG_P		129
+#define SRST_TIMER0		130
+#define SRST_TIMER1		131
+#define SRST_TIMER2		132
+#define SRST_TIMER3		133
+#define SRST_TIMER4		134
+#define SRST_TIMER5		135
+#define SRST_VIO_H2P		136
+#define SRST_VIO_MIPI_DSI	137
 
 #endif

commit 809e91fd3879f1c64709ce2d7402f43f11b68b44
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jul 25 16:13:22 2018 +0800

    rockchip: clk: rk322x: support more clks to set and get rate
    
    Change-Id: Ibed40f1826469263a8015d8af2dea4d3567a08e6
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index a7999ca5af..98bda7548f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -8,27 +8,19 @@
 
 #include <common.h>
 
-#define MHz		1000000
-#define OSC_HZ		(24 * MHz)
-
-#define APLL_HZ		(600 * MHz)
-#define GPLL_HZ		(594 * MHz)
-
-#define CORE_PERI_HZ	150000000
-#define CORE_ACLK_HZ	300000000
-
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
-
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
+#define MHz				1000 * 1000
+#define OSC_HZ				(24 * MHz)
+#define APLL_HZ				(600 * MHz)
+#define GPLL_HZ				(1200 * MHz)
+#define CPLL_HZ				(500 * MHz)
+#define ACLK_BUS_HZ			(150 * MHz)
+#define ACLK_PERI_HZ			(150 * MHz)
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk322x_clk_priv {
 	struct rk322x_cru *cru;
-	ulong rate;
+	ulong gpll_hz;
+	ulong cpll_hz;
 };
 
 struct rk322x_cru {
@@ -59,57 +51,29 @@ struct rk322x_cru {
 };
 check_member(rk322x_cru, cru_pll_mask_con, 0x01f8);
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+enum rk322x_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	PLL_COUNT,
 };
 
-enum {
-	/* PLLCON0*/
-	PLL_BP_SHIFT		= 15,
-	PLL_POSTDIV1_SHIFT	= 12,
-	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
-	PLL_FBDIV_SHIFT		= 0,
-	PLL_FBDIV_MASK		= 0xfff,
-
-	/* PLLCON1 */
-	PLL_RST_SHIFT		= 14,
-	PLL_PD_SHIFT		= 13,
-	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
-	PLL_DSMPD_SHIFT		= 12,
-	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
-	PLL_LOCK_STATUS_SHIFT	= 10,
-	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
-	PLL_POSTDIV2_SHIFT	= 6,
-	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
-	PLL_REFDIV_SHIFT	= 0,
-	PLL_REFDIV_MASK		= 0x3f,
-
-	/* CRU_MODE */
-	GPLL_MODE_SHIFT		= 12,
-	GPLL_MODE_MASK		= 1 << GPLL_MODE_SHIFT,
-	GPLL_MODE_SLOW		= 0,
-	GPLL_MODE_NORM,
-	CPLL_MODE_SHIFT		= 8,
-	CPLL_MODE_MASK		= 1 << CPLL_MODE_SHIFT,
-	CPLL_MODE_SLOW		= 0,
-	CPLL_MODE_NORM,
-	DPLL_MODE_SHIFT		= 4,
-	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
-	DPLL_MODE_SLOW		= 0,
-	DPLL_MODE_NORM,
-	APLL_MODE_SHIFT		= 0,
-	APLL_MODE_MASK		= 1 << APLL_MODE_SHIFT,
-	APLL_MODE_SLOW		= 0,
-	APLL_MODE_NORM,
+struct rk322x_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+#define RK2928_PLL_CON(x)		((x) * 0x4)
+#define RK2928_MODE_CON		0x40
 
+enum {
 	/* CRU_CLK_SEL0_CON */
 	BUS_ACLK_PLL_SEL_SHIFT	= 13,
 	BUS_ACLK_PLL_SEL_MASK	= 3 << BUS_ACLK_PLL_SEL_SHIFT,
-	BUS_ACLK_PLL_SEL_APLL	= 0,
+	BUS_ACLK_PLL_SEL_CPLL	= 0,
 	BUS_ACLK_PLL_SEL_GPLL,
 	BUS_ACLK_PLL_SEL_HDMIPLL,
 	BUS_ACLK_DIV_SHIFT	= 8,
@@ -194,15 +158,30 @@ enum {
 	DDR_DIV_SEL_MASK	= 3 << DDR_DIV_SEL_SHIFT,
 
 	/* CRU_CLKSEL27_CON */
-	VOP_DCLK_DIV_SHIFT	= 8,
-	VOP_DCLK_DIV_MASK	= 0xff << VOP_DCLK_DIV_SHIFT,
-	VOP_PLL_SEL_SHIFT	= 1,
-	VOP_PLL_SEL_MASK	= 1 << VOP_PLL_SEL_SHIFT,
+	DCLK_LCDC_PLL_SEL_GPLL		= 0,
+	DCLK_LCDC_PLL_SEL_CPLL		= 1,
+	DCLK_LCDC_PLL_SEL_SHIFT		= 0,
+	DCLK_LCDC_PLL_SEL_MASK		= 1 << DCLK_LCDC_PLL_SEL_SHIFT,
+	DCLK_LCDC_SEL_HDMIPHY		= 0,
+	DCLK_LCDC_SEL_PLL		= 1,
+	DCLK_LCDC_SEL_SHIFT		= 1,
+	DCLK_LCDC_SEL_MASK		= 1 << DCLK_LCDC_SEL_SHIFT,
+	DCLK_LCDC_DIV_CON_SHIFT		= 8,
+	DCLK_LCDC_DIV_CON_MASK		= 0xFf << DCLK_LCDC_DIV_CON_SHIFT,
 
 	/* CRU_CLKSEL29_CON */
 	GMAC_CLK_SRC_SHIFT	= 12,
 	GMAC_CLK_SRC_MASK	= 1 << GMAC_CLK_SRC_SHIFT,
 
+	/* CRU_CLKSEL33_CON */
+	ACLK_VOP_PLL_SEL_SHIFT		= 5,
+	ACLK_VOP_PLL_SEL_MASK		= 0x3 << ACLK_VOP_PLL_SEL_SHIFT,
+	ACLK_VOP_PLL_SEL_CPLL		= 0,
+	ACLK_VOP_PLL_SEL_GPLL		= 1,
+	ACLK_VOP_PLL_SEL_HDMIPHY		= 2,
+	ACLK_VOP_DIV_CON_SHIFT		= 0,
+	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 54b53c4d34..9716801b7a 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -19,198 +19,128 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-enum {
-	VCO_MAX_HZ	= 3200U * 1000000,
-	VCO_MIN_HZ	= 800 * 1000000,
-	OUTPUT_MAX_HZ	= 3200U * 1000000,
-	OUTPUT_MIN_HZ	= 24 * 1000000,
-};
-
 #define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ), \
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};\
-	_Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) * \
-			 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz, \
-			 #hz "Hz cannot be hit with PLL "\
-			 "divisors on line " __stringify(__LINE__));
-
-/* use integer mode*/
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
-
-static int rkclk_set_pll(struct rk322x_cru *cru, enum rk_clk_id clk_id,
-			 const struct pll_div *div)
-{
-	int pll_id = rk_pll_id(clk_id);
-	struct rk322x_pll *pll = &cru->pll[pll_id];
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		udelay(1);
+#ifndef CONFIG_SPL_BUILD
+#define RK322x_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+#endif
+
+static struct rockchip_pll_rate_table rk322x_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1188000000, 1, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+#endif
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 1, 100, 3, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
+	RK3036_PLL_RATE(400000000, 1, 50, 3, 1, 1, 0),
+#endif
+	{ /* sentinel */ },
+};
 
-	return 0;
+#define RK322x_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
 }
 
-static void rkclk_init(struct rk322x_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
+static struct rockchip_cpu_rate_table rk322x_cpu_rates[] = {
+	RK322x_CPUCLK_RATE(1200000000, 1, 5),
+	RK322x_CPUCLK_RATE(1008000000, 1, 5),
+	RK322x_CPUCLK_RATE(816000000, 1, 3),
+	RK322x_CPUCLK_RATE(600000000, 1, 3),
+};
 
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
-		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+#ifndef CONFIG_SPL_BUILD
+static const struct rk322x_clk_info clks_dump[] = {
+	RK322x_CLK_DUMP(PLL_APLL, "apll", true),
+	RK322x_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK322x_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK322x_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK322x_CLK_DUMP(ARMCLK, "armclk", true),
+	RK322x_CLK_DUMP(ACLK_CPU, "aclk_bus", true),
+	RK322x_CLK_DUMP(HCLK_CPU, "hclk_bus", true),
+	RK322x_CLK_DUMP(PCLK_CPU, "pclk_bus", true),
+	RK322x_CLK_DUMP(ACLK_PERI, "aclk_peri", true),
+	RK322x_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK322x_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+static struct rockchip_pll_clock rk322x_pll_clks[] = {
+	[APLL] = PLL(pll_rk3036, PLL_APLL, RK2928_PLL_CON(0),
+		     RK2928_MODE_CON, 0, 10, 0, rk322x_pll_rates),
+	[DPLL] = PLL(pll_rk3036, PLL_DPLL, RK2928_PLL_CON(3),
+		     RK2928_MODE_CON, 4, 10, 0, rk322x_pll_rates),
+	[CPLL] = PLL(pll_rk3036, PLL_CPLL, RK2928_PLL_CON(6),
+		    RK2928_MODE_CON, 8, 10, 0, rk322x_pll_rates),
+	[GPLL] = PLL(pll_rk3036, PLL_GPLL, RK2928_PLL_CON(9),
+		     RK2928_MODE_CON, 12, 10, 0, rk322x_pll_rates),
+};
 
-	/* init pll */
-	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+static ulong rk322x_armclk_set_clk(struct rk322x_clk_priv *priv, ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = rockchip_get_cpu_settings(rk322x_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupported rate\n", __func__);
+		return -EINVAL;
+	}
 
 	/*
 	 * select apll as cpu/core clock pll source and
 	 * set up dependent divisors for PERI and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
-
-	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_PERI_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
-
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-
-	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
-
-	rk_clrsetreg(&cru->cru_clksel_con[10],
-		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT);
-}
-
-/* Get pll rate by id */
-static uint32_t rkclk_pll_get_rate(struct rk322x_cru *cru,
-				   enum rk_clk_id clk_id)
-{
-	uint32_t refdiv, fbdiv, postdiv1, postdiv2;
-	uint32_t con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk322x_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, 0xff,
-		GPLL_MODE_SHIFT, 0xff
-	};
-	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xff,
-		GPLL_MODE_MASK, 0xff
-	};
-	uint shift;
-	uint mask;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	mask = clk_mask[clk_id];
-
-	switch ((con & mask) >> shift) {
-	case GPLL_MODE_SLOW:
-		return OSC_HZ;
-	case GPLL_MODE_NORM:
-
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-	default:
-		return 32768;
+	old_rate = rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+					 priv->cru, APLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_PERI_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_PERI_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL],
+					  priv->cru, APLL, hz))
+			return -EINVAL;
 	}
+
+	return rockchip_pll_get_rate(&rk322x_pll_clks[APLL], priv->cru, APLL);
 }
 
-static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
-				  int periph)
+static ulong rk322x_mmc_get_clk(struct rk322x_clk_priv *priv,
+				int periph)
 {
+	struct rk322x_cru *cru = priv->cru;
 	uint src_rate;
 	uint div, mux;
 	u32 con;
@@ -226,20 +156,30 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[11]);
 		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
 		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
 		break;
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		con = readl(&cru->cru_clksel_con[11]);
+		mux = (con & SDIO_PLL_MASK) >> SDIO_PLL_SHIFT;
+		con = readl(&cru->cru_clksel_con[12]);
+		div = (con & SDIO_DIV_MASK) >> SDIO_DIV_SHIFT;
+		break;
 	default:
 		return -EINVAL;
 	}
 
-	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : priv->gpll_hz;
 	return DIV_TO_RATE(src_rate, div) / 2;
 }
 
-static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk322x_mac_set_clk(struct rk322x_clk_priv *priv, uint freq)
 {
+	struct rk322x_cru *cru = priv->cru;
 	ulong ret;
 
 	/*
@@ -255,7 +195,7 @@ static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
 		u8 div;
 
 		if ((con >> MAC_PLL_SEL_SHIFT) & MAC_PLL_SEL_MASK)
-			pll_rate = GPLL_HZ;
+			pll_rate = priv->gpll_hz;
 		else
 			/* CPLL is not set */
 			return -EPERM;
@@ -272,17 +212,17 @@ static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
 
 	return ret;
 }
+#endif
 
-static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
-				  int periph, uint freq)
+static ulong rk322x_mmc_set_clk(struct rk322x_clk_priv *priv,
+				int periph, uint freq)
 {
+	struct rk322x_cru *cru = priv->cru;
 	int src_clk_div;
 	int mux;
 
-	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
-
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, freq);
 
 	if (src_clk_div > 128) {
 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
@@ -305,90 +245,310 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
 		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 		rk_clrsetreg(&cru->cru_clksel_con[11],
 			     MMC0_PLL_MASK | MMC0_DIV_MASK,
 			     mux << MMC0_PLL_SHIFT |
 			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
 		break;
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     SDIO_PLL_MASK,
+			     mux << SDIO_PLL_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     SDIO_DIV_MASK,
+			     (src_clk_div - 1) << SDIO_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rk322x_mmc_get_clk(priv, periph);
+}
+
+static ulong rk322x_bus_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
+{
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_CPU:
+		con = readl(&cru->cru_clksel_con[0]);
+		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case HCLK_CPU:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
+		parent = rk322x_bus_get_clk(priv, ACLK_CPU);
+		break;
+	case PCLK_CPU:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		con = readl(&cru->cru_clksel_con[1]);
+		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
+		parent = rk322x_bus_get_clk(priv, ACLK_CPU);
+		break;
 	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk322x_bus_set_clk(struct rk322x_clk_priv *priv,
+				ulong clk_id, ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_CPU:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->cru_clksel_con[0],
+			     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+			     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     BUS_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_CPU:
+		src_clk_div = DIV_ROUND_UP(rk322x_bus_get_clk(priv,
+							      ACLK_CPU),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[1],
+			     BUS_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
 		return -EINVAL;
 	}
 
-	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+	return rk322x_bus_get_clk(priv, clk_id);
 }
 
-static int rk322x_ddr_set_clk(struct rk322x_cru *cru, unsigned int set_rate)
+static ulong rk322x_peri_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
 {
-	struct pll_div dpll_cfg;
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, parent;
 
-	/*  clk_ddrc == DPLL = 24MHz / refdiv * fbdiv / postdiv1 / postdiv2 */
-	switch (set_rate) {
-	case 400*MHz:
-		dpll_cfg = (struct pll_div)
-		{.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1};
+	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
+		parent = priv->gpll_hz;
 		break;
-	case 600*MHz:
-		dpll_cfg = (struct pll_div)
-		{.refdiv = 1, .fbdiv = 75, .postdiv1 = 3, .postdiv2 = 1};
+	case HCLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
+		parent = rk322x_peri_get_clk(priv, ACLK_PERI);
 		break;
-	case 800*MHz:
-		dpll_cfg = (struct pll_div)
-		{.refdiv = 1, .fbdiv = 100, .postdiv1 = 3, .postdiv2 = 1};
+	case PCLK_PERI:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = (con & PERI_PCLK_DIV_MASK) >> PERI_PCLK_DIV_SHIFT;
+		parent = rk322x_peri_get_clk(priv, ACLK_PERI);
 		break;
+	default:
+		return -ENOENT;
 	}
 
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
-		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
-	rkclk_set_pll(cru, CLK_DDR, &dpll_cfg);
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
-		     DPLL_MODE_NORM << DPLL_MODE_SHIFT);
+	return DIV_TO_RATE(parent, div);
+}
 
-	return set_rate;
+static ulong rk322x_peri_set_clk(struct rk322x_clk_priv *priv,
+				 ulong clk_id, ulong hz)
+{
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI:
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk322x_peri_get_clk(priv,
+							       ACLK_PERI),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->cru_clksel_con[10],
+			     PERI_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk322x_peri_get_clk(priv, clk_id);
 }
 
-static ulong rk322x_get_bus_aclk(struct rk322x_cru *cru, ulong gclk_rate)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk322x_vop_get_clk(struct rk322x_clk_priv *priv, ulong clk_id)
 {
-	u32 con;
-	u32 aclk_div;
+	struct rk322x_cru *cru = priv->cru;
+	u32 div, con, sel, parent;
 
-	con = readl(&cru->cru_clksel_con[0]);
-	aclk_div = ((con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) + 1;
+	switch (clk_id) {
+	case ACLK_VOP:
+		con = readl(&cru->cru_clksel_con[33]);
+		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
+		parent = priv->gpll_hz;
+		break;
+	case DCLK_VOP:
+		con = readl(&cru->cru_clksel_con[27]);
+		con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT;
+		if (con) {
+			sel = readl(&cru->cru_clksel_con[27]);
+			sel = (sel & DCLK_LCDC_PLL_SEL_MASK) >>
+				 DCLK_LCDC_PLL_SEL_SHIFT;
+			if (sel)
+				parent = priv->cpll_hz;
+			else
+				parent = priv->gpll_hz;
+
+			con = readl(&cru->cru_clksel_con[27]);
+			div = (con & DCLK_LCDC_DIV_CON_MASK) >>
+			      DCLK_LCDC_DIV_CON_SHIFT;
+		} else {
+			parent = priv->cpll_hz;
+			div = 1;
+		}
+		break;
+	default:
+		return -ENOENT;
+	}
 
-	return gclk_rate / aclk_div;
+	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk322x_get_bus_pclk(struct rk322x_cru *cru, ulong gclk_rate)
+static ulong rk322x_vop_set_clk(struct rk322x_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
-	u32 con;
-	u32 pclk_div;
+	struct rk322x_cru *cru = priv->cru;
+	int src_clk_div;
+	u32 con, parent;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
 
-	con = readl(&cru->cru_clksel_con[1]);
-	pclk_div = ((con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT) + 1;
+	switch (clk_id) {
+	case ACLK_VOP:
+		rk_clrsetreg(&cru->cru_clksel_con[33],
+			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+			     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
+		break;
+	case DCLK_VOP:
+		con = readl(&cru->cru_clksel_con[27]);
+		con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT;
+		if (con) {
+			parent = readl(&cru->cru_clksel_con[27]);
+			parent = (parent & DCLK_LCDC_PLL_SEL_MASK) >>
+				 DCLK_LCDC_PLL_SEL_SHIFT;
+			if (parent)
+				src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+			else
+				src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+
+			rk_clrsetreg(&cru->cru_clksel_con[27],
+				     DCLK_LCDC_DIV_CON_MASK,
+				     (src_clk_div - 1) <<
+				     DCLK_LCDC_DIV_CON_SHIFT);
+		}
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
 
-	return rk322x_get_bus_aclk(cru, gclk_rate) / pclk_div;
+	return rk322x_vop_get_clk(priv, clk_id);
 }
+#endif
 
 static ulong rk322x_clk_get_rate(struct clk *clk)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong rate, gclk_rate;
+	ulong rate;
 
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
 	switch (clk->id) {
-	case 0 ... 63:
-		rate = rkclk_pll_get_rate(priv->cru, clk->id);
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+		rate = rockchip_pll_get_rate(&rk322x_pll_clks[clk->id - 1],
+					     priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+					     priv->cru, APLL);
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
-		rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id);
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		rate = rk322x_mmc_get_clk(priv, clk->id);
 		break;
-	case PCLK_GPIO0 ... PCLK_TIMER:
-		rate = rk322x_get_bus_pclk(priv->cru, gclk_rate);
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		rate = rk322x_bus_get_clk(priv, clk->id);
 		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk322x_peri_get_clk(priv, clk->id);
+		break;
+#ifndef CONFIG_SPL_BUILD
+	case DCLK_VOP:
+	case ACLK_VOP:
+		rate = rk322x_vop_get_clk(priv, clk->id);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -399,32 +559,68 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong new_rate, gclk_rate;
+	ulong ret;
 
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
 	switch (clk->id) {
+	case PLL_APLL:
+	case PLL_DPLL:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[CPLL],
+					    priv->cru, CPLL, rate);
+		priv->cpll_hz = rate;
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		priv->gpll_hz = rate;
+		break;
+	case ARMCLK:
+		ret = rk322x_armclk_set_clk(priv, rate);
+		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
-		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
-						clk->id, rate);
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk322x_mmc_set_clk(priv, clk->id, rate);
+		break;
+	case SCLK_DDRC:
+		ret = rockchip_pll_set_rate(&rk322x_pll_clks[DPLL],
+					    priv->cru, DPLL, rate);
+		break;
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+		ret = rk322x_bus_set_clk(priv, clk->id, rate);
 		break;
-	case CLK_DDR:
-		new_rate = rk322x_ddr_set_clk(priv->cru, rate);
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		ret = rk322x_peri_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC:
-		new_rate = rk322x_mac_set_clk(priv->cru, rate);
+		ret = rk322x_mac_set_clk(priv, rate);
 		break;
-	case PLL_GPLL:
-		return 0;
+	case DCLK_VOP:
+	case ACLK_VOP:
+		ret = rk322x_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	default:
 		return -ENOENT;
 	}
 
-	return new_rate;
+	return ret;
 }
 
+#ifndef CONFIG_SPL_BUILD
 static int rk322x_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
@@ -478,23 +674,183 @@ static int rk322x_gmac_extclk_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
+static int rk322x_lcdc_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+
+	if (parent->id == HDMIPHY)
+		rk_clrsetreg(&priv->cru->cru_clksel_con[27],
+			     DCLK_LCDC_SEL_MASK,
+			     DCLK_LCDC_SEL_HDMIPHY << DCLK_LCDC_SEL_SHIFT);
+	else if (parent->id == PLL_CPLL)
+		rk_clrsetreg(&priv->cru->cru_clksel_con[27],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_CPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+	else
+		rk_clrsetreg(&priv->cru->cru_clksel_con[27],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_GPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+
+	return 0;
+}
+#endif
+
 static int rk322x_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC:
 		return rk322x_gmac_set_parent(clk, parent);
 	case SCLK_MAC_EXTCLK:
 		return rk322x_gmac_extclk_set_parent(clk, parent);
+	case DCLK_VOP:
+		return rk322x_lcdc_set_parent(clk, parent);
+#endif
 	}
 
 	debug("%s: unsupported clk %ld\n", __func__, clk->id);
 	return -ENOENT;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rk322x_mmc_get_phase(struct clk *clk)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk322x_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk322x_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		raw_value = readl(&cru->cru_sdmmc_con[1]);
+	else
+		raw_value = readl(&cru->cru_sdio_con[1]);
+
+	raw_value >>= 1;
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rk322x_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk322x_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk322x_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	raw_value <<= 1;
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_emmc_con[1]);
+	else if (clk->id == SCLK_SDMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_sdmmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->cru_sdio_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rk322x_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk322x_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk322x_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk322x_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+	case SCLK_SDIO_SAMPLE:
+		ret = rk322x_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk322x_clk_ops = {
 	.get_rate	= rk322x_clk_get_rate,
 	.set_rate	= rk322x_clk_set_rate,
 	.set_parent	= rk322x_clk_set_parent,
+	.get_phase	= rk322x_clk_get_phase,
+	.set_phase	= rk322x_clk_set_phase,
 };
 
 static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
@@ -506,11 +862,71 @@ static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static void rkclk_init(struct rk322x_clk_priv *priv)
+{
+	struct rk322x_cru *cru = priv->cru;
+
+	if (rockchip_pll_get_rate(&rk322x_pll_clks[APLL],
+				  priv->cru, APLL) != APLL_HZ)
+		rk322x_armclk_set_clk(priv, APLL_HZ);
+
+	priv->gpll_hz = rockchip_pll_get_rate(&rk322x_pll_clks[GPLL],
+					      priv->cru, GPLL);
+	priv->cpll_hz = rockchip_pll_get_rate(&rk322x_pll_clks[CPLL],
+					      priv->cru, CPLL);
+
+	/* before set pll set child div first */
+	rk322x_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ / 4);
+	rk322x_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ / 4);
+	rk322x_mmc_set_clk(priv, SCLK_EMMC, 50000000);
+	rk322x_mmc_set_clk(priv, SCLK_SDMMC, 50000000);
+	rk322x_mmc_set_clk(priv, SCLK_SDIO, 50000000);
+	rk_clrsetreg(&cru->cru_clksel_con[2], (0x1 << 14) |
+		     (0x1f << 8), (1 << 14) | (0xb << 8));
+	rk_clrsetreg(&cru->cru_clksel_con[23], (0x1f << 0) | (0x1f << 8),
+		     (0x1f << 0) | (5 << 8));
+	rk_clrsetreg(&cru->cru_clksel_con[33],
+		     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+		     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
+		     3 << ACLK_VOP_DIV_CON_SHIFT);
+	rk_clrsetreg(&cru->cru_clksel_con[22], 0x1f << 0, 5 << 0);
+	rk_clrsetreg(&cru->cru_clksel_con[24], 0x1f << 0, 0xb << 0);
+	rk_clrsetreg(&cru->cru_clksel_con[28], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (5 << 0));
+	rk_clrsetreg(&cru->cru_clksel_con[31], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (5 << 0));
+	rk_clrsetreg(&cru->cru_clksel_con[32], 0x1f << 0, 5 << 0);
+	rk_clrsetreg(&cru->cru_clksel_con[33], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (5 << 0));
+	rk_clrsetreg(&cru->cru_clksel_con[34], (0x1f << 8) | (0x1f << 0),
+		     (5 << 8) | (3 << 0));
+
+	rockchip_pll_set_rate(&rk322x_pll_clks[GPLL],
+			      priv->cru, GPLL, GPLL_HZ);
+	priv->gpll_hz = GPLL_HZ;
+
+	rockchip_pll_set_rate(&rk322x_pll_clks[CPLL],
+			      priv->cru, CPLL, CPLL_HZ);
+	priv->cpll_hz = CPLL_HZ;
+
+	rk322x_bus_set_clk(priv, ACLK_CPU, ACLK_BUS_HZ);
+	rk322x_bus_set_clk(priv, HCLK_CPU, ACLK_BUS_HZ / 2);
+	rk322x_bus_set_clk(priv, PCLK_CPU, ACLK_BUS_HZ / 2);
+	rk322x_peri_set_clk(priv, ACLK_PERI, ACLK_PERI_HZ);
+	rk322x_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
+	rk322x_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+	/*rk322x_mmc_set_clk(priv, SCLK_EMMC, rate);*/
+
+	/* set usbphy and hdmiphy from phy */
+	rk_clrsetreg(&cru->cru_misc_con, (0x1 << 13) |
+		     (0x1 << 15), (0 << 15) | (0 << 13));
+}
+
 static int rk322x_clk_probe(struct udevice *dev)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
 
-	rkclk_init(priv->cru);
+	rkclk_init(priv);
 
 	return 0;
 }
@@ -566,3 +982,62 @@ U_BOOT_DRIVER(rockchip_rk322x_cru) = {
 	.bind		= rk322x_clk_bind,
 	.probe		= rk322x_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk322x_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk322x_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 1aa9e7c720..9e5e7273e5 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -40,6 +40,7 @@
 #define SCLK_EMMC_DRV		117
 #define SCLK_SDMMC_SAMPLE	118
 #define SCLK_SDIO_SAMPLE	119
+#define SCLK_SDIO_SRC		120
 #define SCLK_EMMC_SAMPLE	121
 #define SCLK_VOP		122
 #define SCLK_HDMI_HDCP		123
@@ -52,22 +53,52 @@
 #define SCLK_MAC_TX		130
 #define SCLK_MAC_PHY		131
 #define SCLK_MAC_OUT		132
+#define SCLK_VDEC_CABAC		133
+#define SCLK_VDEC_CORE		134
+#define SCLK_RGA		135
+#define SCLK_HDCP		136
+#define SCLK_HDMI_CEC		137
+#define SCLK_CRYPTO		138
+#define SCLK_TSP		139
+#define SCLK_HSADC		140
+#define SCLK_WIFI		141
+#define SCLK_OTGPHY0		142
+#define SCLK_OTGPHY1		143
+#define SCLK_DDRC		144
 
 /* dclk gates */
 #define DCLK_VOP		190
 #define DCLK_HDMI_PHY		191
+#define HDMIPHY			192
 
 /* aclk gates */
 #define ACLK_DMAC		194
+#define ACLK_CPU		195
+#define ACLK_VPU_PRE		196
+#define ACLK_RKVDEC_PRE		197
+#define ACLK_RGA_PRE		198
+#define ACLK_IEP_PRE		199
+#define ACLK_HDCP_PRE		200
+#define ACLK_VOP_PRE		201
+#define ACLK_VPU		202
+#define ACLK_RKVDEC		203
+#define ACLK_IEP		204
+#define ACLK_RGA		205
+#define ACLK_HDCP		206
 #define ACLK_PERI		210
 #define ACLK_VOP		211
 #define ACLK_GMAC		212
+#define ACLK_GPU		213
 
 /* pclk gates */
 #define PCLK_GPIO0		320
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
 #define PCLK_GPIO3		323
+#define PCLK_VIO_H2P		324
+#define PCLK_HDCP		325
+#define PCLK_EFUSE_1024		326
+#define PCLK_EFUSE_256		327
 #define PCLK_GRF		329
 #define PCLK_I2C0		332
 #define PCLK_I2C1		333
@@ -80,10 +111,12 @@
 #define PCLK_TSADC		344
 #define PCLK_PWM		350
 #define PCLK_TIMER		353
+#define PCLK_CPU		354
 #define PCLK_PERI		363
 #define PCLK_HDMI_CTRL		364
 #define PCLK_HDMI_PHY		365
 #define PCLK_GMAC		367
+#define PCLK_ACODECPHY		368
 
 /* hclk gates */
 #define HCLK_I2S0_8CH		442
@@ -95,12 +128,28 @@
 #define HCLK_SDMMC		456
 #define HCLK_SDIO		457
 #define HCLK_EMMC		459
+#define HCLK_CPU		460
+#define HCLK_VPU_PRE		461
+#define HCLK_RKVDEC_PRE		462
+#define HCLK_VIO_PRE		463
+#define HCLK_VPU		464
+#define HCLK_RKVDEC		465
+#define HCLK_VIO		466
+#define HCLK_RGA		467
+#define HCLK_IEP		468
+#define HCLK_VIO_H2P		469
+#define HCLK_HDCP_MMU		470
+#define HCLK_HOST0		471
+#define HCLK_HOST1		472
+#define HCLK_HOST2		473
+#define HCLK_OTG		474
+#define HCLK_TSP		475
+#define HCLK_M_CRYPTO		476
+#define HCLK_S_CRYPTO		477
 #define HCLK_PERI		478
 
 #define CLK_NR_CLKS		(HCLK_PERI + 1)
 
-#define PCLK_EFUSE_256		327
-
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

commit 0b7db90f1974a2549dfa101a2b5e6b41a411bb27
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Jul 20 15:13:56 2018 +0800

    rockchip: clk: rk3328: support more clks to set and get rate
    
    Change-Id: Ic231b7701c6eb23b0e9db21c1d28fb4d08c4debf
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 948706e9a3..2608bba3c5 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -12,6 +12,8 @@
 struct rk3328_clk_priv {
 	struct rk3328_cru *cru;
 	ulong rate;
+	ulong cpll_hz;
+	ulong gpll_hz;
 };
 
 struct rk3328_cru {
@@ -45,26 +47,179 @@ struct rk3328_cru {
 	u32 sdmmc_ext_con[2];
 };
 check_member(rk3328_cru, sdmmc_ext_con[1], 0x39c);
-#define MHz		1000000
-#define KHz		1000
-#define OSC_HZ		(24 * MHz)
-#define APLL_HZ		(600 * MHz)
-#define GPLL_HZ		(576 * MHz)
-#define CPLL_HZ		(594 * MHz)
-
-#define CLK_CORE_HZ	(600 * MHz)
-#define ACLKM_CORE_HZ	(300 * MHz)
-#define PCLK_DBG_HZ	(300 * MHz)
-
-#define PERIHP_ACLK_HZ	(144000 * KHz)
-#define PERIHP_HCLK_HZ	(72000 * KHz)
-#define PERIHP_PCLK_HZ	(72000 * KHz)
-
-#define PWM_CLOCK_HZ    (74 * MHz)
-
-enum apll_frequencies {
-	APLL_816_MHZ,
-	APLL_600_MHZ,
+
+/* PX30 pll id */
+enum rk3328_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	GPLL,
+	NPLL,
+	PLL_COUNT,
+};
+
+struct rk3328_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
+#define MHz				1000 * 1000
+#define OSC_HZ				(24 * MHz)
+#define APLL_HZ				(600 * MHz)
+#define GPLL_HZ				491520000
+#define CPLL_HZ				(1200 * MHz)
+#define ACLK_BUS_HZ			(150 * MHz)
+#define ACLK_PERI_HZ			(150 * MHz)
+#define PWM_CLOCK_HZ			(74 * MHz)
+
+#define RK3328_PLL_CON(x)		((x) * 0x4)
+#define RK3328_CLKSEL_CON(x)		((x) * 0x4 + 0x100)
+#define RK3328_CLKGATE_CON(x)		((x) * 0x4 + 0x200)
+#define RK3328_MODE_CON			0x80
+
+enum {
+	/* CLKSEL_CON0 */
+	CLK_BUS_PLL_SEL_CPLL		= 0,
+	CLK_BUS_PLL_SEL_GPLL		= 1,
+	CLK_BUS_PLL_SEL_SHIFT		= 13,
+	CLK_BUS_PLL_SEL_MASK		= 3 << CLK_BUS_PLL_SEL_SHIFT,
+	ACLK_BUS_DIV_CON_SHIFT		= 8,
+	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT		= 6,
+	CORE_CLK_PLL_SEL_MASK		= 3 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL		= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_CLK_PLL_SEL_NPLL		= 3,
+	CORE_DIV_CON_SHIFT		= 0,
+	CORE_DIV_CON_MASK		= 0x1f << CORE_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON1 */
+	PCLK_BUS_DIV_CON_SHIFT		= 12,
+	PCLK_BUS_DIV_CON_MASK		= 0x7 << PCLK_BUS_DIV_CON_SHIFT,
+	HCLK_BUS_DIV_CON_SHIFT		= 8,
+	HCLK_BUS_DIV_CON_MASK		= 0x3 << HCLK_BUS_DIV_CON_SHIFT,
+	CORE_ACLK_DIV_SHIFT		= 4,
+	CORE_ACLK_DIV_MASK		= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT		= 0,
+	CORE_DBG_DIV_MASK		= 0x0f << CORE_DBG_DIV_SHIFT,
+
+	/* CLKSEL_CON27 */
+	GMAC2IO_PLL_SEL_SHIFT		= 7,
+	GMAC2IO_PLL_SEL_MASK		= 1 << GMAC2IO_PLL_SEL_SHIFT,
+	GMAC2IO_PLL_SEL_CPLL		= 0,
+	GMAC2IO_PLL_SEL_GPLL		= 1,
+	GMAC2IO_CLK_DIV_MASK		= 0x1f,
+	GMAC2IO_CLK_DIV_SHIFT		= 0,
+
+	/* CLKSEL_CON28 */
+	CLK_PERI_PLL_SEL_CPLL		= 0,
+	CLK_PERI_PLL_SEL_GPLL,
+	CLK_PERI_PLL_SEL_HDMIPHY,
+	CLK_PERI_PLL_SEL_SHIFT		= 6,
+	CLK_PERI_PLL_SEL_MASK		= 3 << CLK_PERI_PLL_SEL_SHIFT,
+	ACLK_PERI_DIV_CON_SHIFT		= 0,
+	ACLK_PERI_DIV_CON_MASK		= 0x1f,
+
+	/* CLKSEL_CON29 */
+	PCLK_PERI_DIV_CON_SHIFT		= 4,
+	PCLK_PERI_DIV_CON_MASK		= 0x7 << PCLK_PERI_DIV_CON_SHIFT,
+	HCLK_PERI_DIV_CON_SHIFT		= 0,
+	HCLK_PERI_DIV_CON_MASK		= 3 << HCLK_PERI_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON22 */
+	CLK_TSADC_DIV_CON_SHIFT		= 0,
+	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
+
+	/* CLKSEL_CON23 */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH	= 10,
+
+	/* CLKSEL_CON24 */
+	CLK_PWM_PLL_SEL_CPLL		= 0,
+	CLK_PWM_PLL_SEL_GPLL,
+	CLK_PWM_PLL_SEL_SHIFT		= 15,
+	CLK_PWM_PLL_SEL_MASK		= 1 << CLK_PWM_PLL_SEL_SHIFT,
+	CLK_PWM_DIV_CON_SHIFT		= 8,
+	CLK_PWM_DIV_CON_MASK		= 0x7f << CLK_PWM_DIV_CON_SHIFT,
+
+	CLK_SPI_PLL_SEL_CPLL		= 0,
+	CLK_SPI_PLL_SEL_GPLL,
+	CLK_SPI_PLL_SEL_SHIFT		= 7,
+	CLK_SPI_PLL_SEL_MASK		= 1 << CLK_SPI_PLL_SEL_SHIFT,
+	CLK_SPI_DIV_CON_SHIFT		= 0,
+	CLK_SPI_DIV_CON_MASK		= 0x7f << CLK_SPI_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON30 */
+	CLK_SDMMC_PLL_SEL_CPLL		= 0,
+	CLK_SDMMC_PLL_SEL_GPLL,
+	CLK_SDMMC_PLL_SEL_24M,
+	CLK_SDMMC_PLL_SEL_USBPHY,
+	CLK_SDMMC_PLL_SHIFT		= 8,
+	CLK_SDMMC_PLL_MASK		= 0x3 << CLK_SDMMC_PLL_SHIFT,
+	CLK_SDMMC_DIV_CON_SHIFT          = 0,
+	CLK_SDMMC_DIV_CON_MASK           = 0xff << CLK_SDMMC_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON32 */
+	CLK_EMMC_PLL_SEL_CPLL		= 0,
+	CLK_EMMC_PLL_SEL_GPLL,
+	CLK_EMMC_PLL_SEL_24M,
+	CLK_EMMC_PLL_SEL_USBPHY,
+	CLK_EMMC_PLL_SHIFT		= 8,
+	CLK_EMMC_PLL_MASK		= 0x3 << CLK_EMMC_PLL_SHIFT,
+	CLK_EMMC_DIV_CON_SHIFT          = 0,
+	CLK_EMMC_DIV_CON_MASK           = 0xff << CLK_EMMC_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON34 */
+	CLK_I2C_PLL_SEL_CPLL		= 0,
+	CLK_I2C_PLL_SEL_GPLL,
+	CLK_I2C_DIV_CON_MASK		= 0x7f,
+	CLK_I2C_PLL_SEL_MASK		= 1,
+	CLK_I2C1_PLL_SEL_SHIFT		= 15,
+	CLK_I2C1_DIV_CON_SHIFT		= 8,
+	CLK_I2C0_PLL_SEL_SHIFT		= 7,
+	CLK_I2C0_DIV_CON_SHIFT		= 0,
+
+	/* CLKSEL_CON35 */
+	CLK_I2C3_PLL_SEL_SHIFT		= 15,
+	CLK_I2C3_DIV_CON_SHIFT		= 8,
+	CLK_I2C2_PLL_SEL_SHIFT		= 7,
+	CLK_I2C2_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL37_CON */
+	ACLK_VIO_PLL_SEL_CPLL		= 0,
+	ACLK_VIO_PLL_SEL_GPLL		= 1,
+	ACLK_VIO_PLL_SEL_HDMIPHY	= 2,
+	ACLK_VIO_PLL_SEL_USB480M	= 3,
+	ACLK_VIO_PLL_SEL_SHIFT		= 6,
+	ACLK_VIO_PLL_SEL_MASK		= 3 << ACLK_VIO_PLL_SEL_SHIFT,
+	ACLK_VIO_DIV_CON_SHIFT		= 0,
+	ACLK_VIO_DIV_CON_MASK		= 0x1f << ACLK_VIO_DIV_CON_SHIFT,
+	HCLK_VIO_DIV_CON_SHIFT		= 8,
+	HCLK_VIO_DIV_CON_MASK		= 0x1f << HCLK_VIO_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL39_CON */
+	ACLK_VOP_PLL_SEL_CPLL		= 0,
+	ACLK_VOP_PLL_SEL_GPLL		= 1,
+	ACLK_VOP_PLL_SEL_HDMIPHY	= 2,
+	ACLK_VOP_PLL_SEL_USB480M	= 3,
+	ACLK_VOP_PLL_SEL_SHIFT		= 6,
+	ACLK_VOP_PLL_SEL_MASK		= 3 << ACLK_VOP_PLL_SEL_SHIFT,
+	ACLK_VOP_DIV_CON_SHIFT		= 0,
+	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL40_CON */
+	DCLK_LCDC_PLL_SEL_GPLL		= 0,
+	DCLK_LCDC_PLL_SEL_CPLL		= 1,
+	DCLK_LCDC_PLL_SEL_SHIFT		= 0,
+	DCLK_LCDC_PLL_SEL_MASK		= 1 << DCLK_LCDC_PLL_SEL_SHIFT,
+	DCLK_LCDC_SEL_HDMIPHY		= 0,
+	DCLK_LCDC_SEL_PLL		= 1,
+	DCLK_LCDC_SEL_SHIFT		= 1,
+	DCLK_LCDC_SEL_MASK		= 1 << DCLK_LCDC_SEL_SHIFT,
+	DCLK_LCDC_DIV_CON_SHIFT		= 8,
+	DCLK_LCDC_DIV_CON_MASK		= 0xFf << DCLK_LCDC_DIV_CON_SHIFT,
 };
 
 #endif	/* __ASM_ARCH_CRU_RK3328_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index c0cfcf1f19..1df4312f7c 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -20,317 +20,153 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
-};
-
 #define RATE_TO_DIV(input_rate, output_rate) \
 	((input_rate) / (output_rate) - 1);
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+#ifndef CONFIG_SPL_BUILD
+#define RK3328_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+#endif
+
+static struct rockchip_pll_rate_table rk3328_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3036_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	RK3036_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
+#endif
+	RK3036_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3036_PLL_RATE(800000000, 6, 400, 2, 1, 1, 0),
+	RK3036_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(594000000, 2, 99, 2, 1, 1, 0),
+	RK3036_PLL_RATE(500000000, 6, 250, 2, 1, 1, 0),
+#endif
+	{ /* sentinel */ },
+};
 
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
-static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 2, 1);
+static struct rockchip_pll_rate_table rk3328_pll_frac_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(1016064000, 3, 127, 1, 1, 0, 134217),
+	/* vco = 1016064000 */
+	RK3036_PLL_RATE(983040000, 24, 983, 1, 1, 0, 671088),
+	/* vco = 983040000 */
+#endif
+	RK3036_PLL_RATE(491520000, 24, 983, 2, 1, 0, 671088),
+	/* vco = 983040000 */
+#ifndef CONFIG_SPL_BUILD
+	RK3036_PLL_RATE(61440000, 6, 215, 7, 2, 0, 671088),
+	/* vco = 860156000 */
+	RK3036_PLL_RATE(56448000, 12, 451, 4, 4, 0, 9797894),
+	/* vco = 903168000 */
+	RK3036_PLL_RATE(40960000, 12, 409, 4, 5, 0, 10066329),
+	/* vco = 819200000 */
+#endif
+	{ /* sentinel */ },
+};
 
-static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
-static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
+#define RK3328_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
 
-static const struct pll_div *apll_cfgs[] = {
-	[APLL_816_MHZ] = &apll_816_cfg,
-	[APLL_600_MHZ] = &apll_600_cfg,
+static struct rockchip_cpu_rate_table rk3328_cpu_rates[] = {
+	RK3328_CPUCLK_RATE(1200000000, 1, 5),
+	RK3328_CPUCLK_RATE(1008000000, 1, 5),
+	RK3328_CPUCLK_RATE(816000000, 1, 3),
+	RK3328_CPUCLK_RATE(600000000, 1, 3),
 };
 
-enum {
-	/* PLL_CON0 */
-	PLL_POSTDIV1_SHIFT		= 12,
-	PLL_POSTDIV1_MASK		= 0x7 << PLL_POSTDIV1_SHIFT,
-	PLL_FBDIV_SHIFT			= 0,
-	PLL_FBDIV_MASK			= 0xfff,
-
-	/* PLL_CON1 */
-	PLL_DSMPD_SHIFT			= 12,
-	PLL_DSMPD_MASK			= 1 << PLL_DSMPD_SHIFT,
-	PLL_INTEGER_MODE		= 1,
-	PLL_LOCK_STATUS_SHIFT		= 10,
-	PLL_LOCK_STATUS_MASK		= 1 << PLL_LOCK_STATUS_SHIFT,
-	PLL_POSTDIV2_SHIFT		= 6,
-	PLL_POSTDIV2_MASK		= 0x7 << PLL_POSTDIV2_SHIFT,
-	PLL_REFDIV_SHIFT		= 0,
-	PLL_REFDIV_MASK			= 0x3f,
-
-	/* PLL_CON2 */
-	PLL_FRACDIV_SHIFT		= 0,
-	PLL_FRACDIV_MASK		= 0xffffff,
-
-	/* MODE_CON */
-	APLL_MODE_SHIFT			= 0,
-	NPLL_MODE_SHIFT			= 1,
-	DPLL_MODE_SHIFT			= 4,
-	CPLL_MODE_SHIFT			= 8,
-	GPLL_MODE_SHIFT			= 12,
-	PLL_MODE_SLOW			= 0,
-	PLL_MODE_NORM,
-
-	/* CLKSEL_CON0 */
-	CLK_CORE_PLL_SEL_APLL		= 0,
-	CLK_CORE_PLL_SEL_GPLL,
-	CLK_CORE_PLL_SEL_DPLL,
-	CLK_CORE_PLL_SEL_NPLL,
-	CLK_CORE_PLL_SEL_SHIFT		= 6,
-	CLK_CORE_PLL_SEL_MASK		= 3 << CLK_CORE_PLL_SEL_SHIFT,
-	CLK_CORE_DIV_SHIFT		= 0,
-	CLK_CORE_DIV_MASK		= 0x1f,
-
-	/* CLKSEL_CON1 */
-	ACLKM_CORE_DIV_SHIFT		= 4,
-	ACLKM_CORE_DIV_MASK		= 0x7 << ACLKM_CORE_DIV_SHIFT,
-	PCLK_DBG_DIV_SHIFT		= 0,
-	PCLK_DBG_DIV_MASK		= 0xF << PCLK_DBG_DIV_SHIFT,
-
-	/* CLKSEL_CON27 */
-	GMAC2IO_PLL_SEL_SHIFT		= 7,
-	GMAC2IO_PLL_SEL_MASK		= 1 << GMAC2IO_PLL_SEL_SHIFT,
-	GMAC2IO_PLL_SEL_CPLL		= 0,
-	GMAC2IO_PLL_SEL_GPLL		= 1,
-	GMAC2IO_CLK_DIV_MASK		= 0x1f,
-	GMAC2IO_CLK_DIV_SHIFT		= 0,
-
-	/* CLKSEL_CON28 */
-	ACLK_PERIHP_PLL_SEL_CPLL	= 0,
-	ACLK_PERIHP_PLL_SEL_GPLL,
-	ACLK_PERIHP_PLL_SEL_HDMIPHY,
-	ACLK_PERIHP_PLL_SEL_SHIFT	= 6,
-	ACLK_PERIHP_PLL_SEL_MASK	= 3 << ACLK_PERIHP_PLL_SEL_SHIFT,
-	ACLK_PERIHP_DIV_CON_SHIFT	= 0,
-	ACLK_PERIHP_DIV_CON_MASK	= 0x1f,
-
-	/* CLKSEL_CON29 */
-	PCLK_PERIHP_DIV_CON_SHIFT	= 4,
-	PCLK_PERIHP_DIV_CON_MASK	= 0x7 << PCLK_PERIHP_DIV_CON_SHIFT,
-	HCLK_PERIHP_DIV_CON_SHIFT	= 0,
-	HCLK_PERIHP_DIV_CON_MASK	= 3 << HCLK_PERIHP_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON22 */
-	CLK_TSADC_DIV_CON_SHIFT		= 0,
-	CLK_TSADC_DIV_CON_MASK		= 0x3ff,
-
-	/* CLKSEL_CON23 */
-	CLK_SARADC_DIV_CON_SHIFT	= 0,
-	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
-	CLK_SARADC_DIV_CON_WIDTH	= 10,
-
-	/* CLKSEL_CON24 */
-	CLK_PWM_PLL_SEL_CPLL		= 0,
-	CLK_PWM_PLL_SEL_GPLL,
-	CLK_PWM_PLL_SEL_SHIFT		= 15,
-	CLK_PWM_PLL_SEL_MASK		= 1 << CLK_PWM_PLL_SEL_SHIFT,
-	CLK_PWM_DIV_CON_SHIFT		= 8,
-	CLK_PWM_DIV_CON_MASK		= 0x7f << CLK_PWM_DIV_CON_SHIFT,
-
-	CLK_SPI_PLL_SEL_CPLL		= 0,
-	CLK_SPI_PLL_SEL_GPLL,
-	CLK_SPI_PLL_SEL_SHIFT		= 7,
-	CLK_SPI_PLL_SEL_MASK		= 1 << CLK_SPI_PLL_SEL_SHIFT,
-	CLK_SPI_DIV_CON_SHIFT		= 0,
-	CLK_SPI_DIV_CON_MASK		= 0x7f << CLK_SPI_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON30 */
-	CLK_SDMMC_PLL_SEL_CPLL		= 0,
-	CLK_SDMMC_PLL_SEL_GPLL,
-	CLK_SDMMC_PLL_SEL_24M,
-	CLK_SDMMC_PLL_SEL_USBPHY,
-	CLK_SDMMC_PLL_SHIFT		= 8,
-	CLK_SDMMC_PLL_MASK		= 0x3 << CLK_SDMMC_PLL_SHIFT,
-	CLK_SDMMC_DIV_CON_SHIFT          = 0,
-	CLK_SDMMC_DIV_CON_MASK           = 0xff << CLK_SDMMC_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON32 */
-	CLK_EMMC_PLL_SEL_CPLL		= 0,
-	CLK_EMMC_PLL_SEL_GPLL,
-	CLK_EMMC_PLL_SEL_24M,
-	CLK_EMMC_PLL_SEL_USBPHY,
-	CLK_EMMC_PLL_SHIFT		= 8,
-	CLK_EMMC_PLL_MASK		= 0x3 << CLK_EMMC_PLL_SHIFT,
-	CLK_EMMC_DIV_CON_SHIFT          = 0,
-	CLK_EMMC_DIV_CON_MASK           = 0xff << CLK_EMMC_DIV_CON_SHIFT,
-
-	/* CLKSEL_CON34 */
-	CLK_I2C_PLL_SEL_CPLL		= 0,
-	CLK_I2C_PLL_SEL_GPLL,
-	CLK_I2C_DIV_CON_MASK		= 0x7f,
-	CLK_I2C_PLL_SEL_MASK		= 1,
-	CLK_I2C1_PLL_SEL_SHIFT		= 15,
-	CLK_I2C1_DIV_CON_SHIFT		= 8,
-	CLK_I2C0_PLL_SEL_SHIFT		= 7,
-	CLK_I2C0_DIV_CON_SHIFT		= 0,
-
-	/* CLKSEL_CON35 */
-	CLK_I2C3_PLL_SEL_SHIFT		= 15,
-	CLK_I2C3_DIV_CON_SHIFT		= 8,
-	CLK_I2C2_PLL_SEL_SHIFT		= 7,
-	CLK_I2C2_DIV_CON_SHIFT		= 0,
+#ifndef CONFIG_SPL_BUILD
+static const struct rk3328_clk_info clks_dump[] = {
+	RK3328_CLK_DUMP(PLL_APLL, "apll", true),
+	RK3328_CLK_DUMP(PLL_DPLL, "dpll", true),
+	RK3328_CLK_DUMP(PLL_CPLL, "cpll", true),
+	RK3328_CLK_DUMP(PLL_GPLL, "gpll", true),
+	RK3328_CLK_DUMP(PLL_NPLL, "npll", true),
+	RK3328_CLK_DUMP(ARMCLK, "armclk", true),
+	RK3328_CLK_DUMP(ACLK_BUS_PRE, "aclk_bus", true),
+	RK3328_CLK_DUMP(HCLK_BUS_PRE, "hclk_bus", true),
+	RK3328_CLK_DUMP(PCLK_BUS_PRE, "pclk_bus", true),
+	RK3328_CLK_DUMP(ACLK_PERI_PRE, "aclk_peri", true),
+	RK3328_CLK_DUMP(HCLK_PERI, "hclk_peri", true),
+	RK3328_CLK_DUMP(PCLK_PERI, "pclk_peri", true),
+};
+#endif
+
+static struct rockchip_pll_clock rk3328_pll_clks[] = {
+	[APLL] = PLL(pll_rk3328, PLL_APLL, RK3328_PLL_CON(0),
+		     RK3328_MODE_CON, 0, 10, 0, rk3328_pll_frac_rates),
+	[DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3328_PLL_CON(8),
+		     RK3328_MODE_CON, 4, 10, 0, NULL),
+	[CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3328_PLL_CON(16),
+		    RK3328_MODE_CON, 8, 10, 0, rk3328_pll_rates),
+	[GPLL] = PLL(pll_rk3328, PLL_GPLL, RK3328_PLL_CON(24),
+		     RK3328_MODE_CON, 12, 10, 0, rk3328_pll_frac_rates),
+	[NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3328_PLL_CON(40),
+		     RK3328_MODE_CON, 1, 10, 0, rk3328_pll_rates),
 };
 
-#define VCO_MAX_KHZ	(3200 * (MHz / KHz))
-#define VCO_MIN_KHZ	(800 * (MHz / KHz))
-#define OUTPUT_MAX_KHZ	(3200 * (MHz / KHz))
-#define OUTPUT_MIN_KHZ	(16 * (MHz / KHz))
-
-/*
- *  the div restructions of pll in integer mode, these are defined in
- *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
- */
-#define PLL_DIV_MIN	16
-#define PLL_DIV_MAX	3200
-
-/*
- * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
- * Formulas also embedded within the Fractional PLL Verilog model:
- * If DSMPD = 1 (DSM is disabled, "integer mode")
- * FOUTVCO = FREF / REFDIV * FBDIV
- * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
- * Where:
- * FOUTVCO = Fractional PLL non-divided output frequency
- * FOUTPOSTDIV = Fractional PLL divided output frequency
- *               (output of second post divider)
- * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
- * REFDIV = Fractional PLL input reference clock divider
- * FBDIV = Integer value programmed into feedback divide
- *
- */
-static void rkclk_set_pll(struct rk3328_cru *cru, enum rk_clk_id clk_id,
-			const struct pll_div *div)
+static ulong rk3328_armclk_set_clk(struct rk3328_clk_priv *priv, ulong hz)
 {
-	u32 *pll_con;
-	u32 mode_shift, mode_mask;
+	struct rk3328_cru *cru = priv->cru;
+	const struct rockchip_cpu_rate_table *rate;
+	ulong old_rate;
 
-	pll_con = NULL;
-	mode_shift = 0;
-	switch (clk_id) {
-	case CLK_ARM:
-		pll_con = cru->apll_con;
-		mode_shift = APLL_MODE_SHIFT;
-		break;
-	case CLK_DDR:
-		pll_con = cru->dpll_con;
-		mode_shift = DPLL_MODE_SHIFT;
-		break;
-	case CLK_CODEC:
-		pll_con = cru->cpll_con;
-		mode_shift = CPLL_MODE_SHIFT;
-		break;
-	case CLK_GENERAL:
-		pll_con = cru->gpll_con;
-		mode_shift = GPLL_MODE_SHIFT;
-		break;
-	case CLK_NEW:
-		pll_con = cru->npll_con;
-		mode_shift = NPLL_MODE_SHIFT;
-		break;
-	default:
-		break;
+	rate = rockchip_get_cpu_settings(rk3328_cpu_rates, hz);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
 	}
-	mode_mask = 1 << mode_shift;
-
-	/* All 8 PLLs have same VCO and output frequency range restrictions. */
-	u32 vco_khz = OSC_HZ / 1000 * div->fbdiv / div->refdiv;
-	u32 output_khz = vco_khz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p: fbdiv=%d, refdiv=%d, postdiv1=%d, \
-	      postdiv2=%d, vco=%u khz, output=%u khz\n",
-	      pll_con, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_khz, output_khz);
-	assert(vco_khz >= VCO_MIN_KHZ && vco_khz <= VCO_MAX_KHZ &&
-	       output_khz >= OUTPUT_MIN_KHZ && output_khz <= OUTPUT_MAX_KHZ &&
-	       div->fbdiv >= PLL_DIV_MIN && div->fbdiv <= PLL_DIV_MAX);
 
 	/*
-	 * When power on or changing PLL setting,
-	 * we must force PLL into slow mode to ensure output stable clock.
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
 	 */
-	rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_SLOW << mode_shift);
-
-	/* use integer mode */
-	rk_clrsetreg(&pll_con[1], PLL_DSMPD_MASK,
-		     PLL_INTEGER_MODE << PLL_DSMPD_SHIFT);
-
-	rk_clrsetreg(&pll_con[0],
-		     PLL_FBDIV_MASK | PLL_POSTDIV1_MASK,
-		     (div->fbdiv << PLL_FBDIV_SHIFT) |
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT));
-	rk_clrsetreg(&pll_con[1],
-		     PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT) |
-		     (div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* waiting for pll lock */
-	while (!(readl(&pll_con[1]) & (1 << PLL_LOCK_STATUS_SHIFT)))
-		udelay(1);
-
-	/* pll enter normal mode */
-	rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_NORM << mode_shift);
-}
-
-static void rkclk_init(struct rk3328_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	/* configure gpll cpll */
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
-	rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg);
-
-	/* configure perihp aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
-	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
-	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[28],
-		     ACLK_PERIHP_PLL_SEL_MASK | ACLK_PERIHP_DIV_CON_MASK,
-		     ACLK_PERIHP_PLL_SEL_GPLL << ACLK_PERIHP_PLL_SEL_SHIFT |
-		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
-	rk_clrsetreg(&cru->clksel_con[29],
-		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK,
-		     pclk_div << PCLK_PERIHP_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERIHP_DIV_CON_SHIFT);
-}
-
-void rk3328_configure_cpu(struct rk3328_cru *cru,
-			  enum apll_frequencies apll_freq)
-{
-	u32 clk_core_div;
-	u32 aclkm_div;
-	u32 pclk_dbg_div;
-
-	rkclk_set_pll(cru, CLK_ARM, apll_cfgs[apll_freq]);
-
-	clk_core_div = APLL_HZ / CLK_CORE_HZ - 1;
-	aclkm_div = APLL_HZ / ACLKM_CORE_HZ / (clk_core_div + 1) - 1;
-	pclk_dbg_div = APLL_HZ / PCLK_DBG_HZ / (clk_core_div + 1) - 1;
-
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CLK_CORE_PLL_SEL_MASK | CLK_CORE_DIV_MASK,
-		     CLK_CORE_PLL_SEL_APLL << CLK_CORE_PLL_SEL_SHIFT |
-		     clk_core_div << CLK_CORE_DIV_SHIFT);
+	old_rate = rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+					 priv->cru, NPLL);
+	if (old_rate > hz) {
+		if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL],
+					  priv->cru, NPLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_NPLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[1],
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT);
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+			     CORE_CLK_PLL_SEL_NPLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL],
+					  priv->cru, NPLL, hz))
+			return -EINVAL;
+	}
 
-	rk_clrsetreg(&cru->clksel_con[1],
-		     PCLK_DBG_DIV_MASK | ACLKM_CORE_DIV_MASK,
-		     pclk_dbg_div << PCLK_DBG_DIV_SHIFT |
-		     aclkm_div << ACLKM_CORE_DIV_SHIFT);
+	return rockchip_pll_get_rate(&rk3328_pll_clks[NPLL], priv->cru, NPLL);
 }
 
-
-static ulong rk3328_i2c_get_clk(struct rk3328_cru *cru, ulong clk_id)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3328_i2c_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -355,14 +191,16 @@ static ulong rk3328_i2c_get_clk(struct rk3328_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)
+static ulong rk3328_i2c_set_clk(struct rk3328_clk_priv *priv,
+				ulong clk_id, uint hz)
 {
+	struct rk3328_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = priv->gpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -399,11 +237,12 @@ static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return DIV_TO_RATE(priv->gpll_hz, src_clk_div);
 }
 
-static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
+static ulong rk3328_gmac2io_set_clk(struct rk3328_clk_priv *priv, ulong rate)
 {
+	struct rk3328_cru *cru = priv->cru;
 	struct rk3328_grf_regs *grf;
 	ulong ret;
 
@@ -423,9 +262,9 @@ static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
 		u8 div;
 
 		if ((con >> GMAC2IO_PLL_SEL_SHIFT) & GMAC2IO_PLL_SEL_GPLL)
-			pll_rate = GPLL_HZ;
+			pll_rate = priv->gpll_hz;
 		else
-			pll_rate = CPLL_HZ;
+			pll_rate = priv->cpll_hz;
 
 		div = DIV_ROUND_UP(pll_rate, rate) - 1;
 		if (div <= 0x1f)
@@ -439,9 +278,11 @@ static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
 
 	return ret;
 }
+#endif
 
-static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)
+static ulong rk3328_mmc_get_clk(struct rk3328_clk_priv *priv, uint clk_id)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
 	switch (clk_id) {
@@ -463,12 +304,13 @@ static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)
 	    == CLK_EMMC_PLL_SEL_24M)
 		return DIV_TO_RATE(OSC_HZ, div) / 2;
 	else
-		return DIV_TO_RATE(GPLL_HZ, div) / 2;
+		return DIV_TO_RATE(priv->gpll_hz, div) / 2;
 }
 
-static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
+static ulong rk3328_mmc_set_clk(struct rk3328_clk_priv *priv,
 				ulong clk_id, ulong set_rate)
 {
+	struct rk3328_cru *cru = priv->cru;
 	int src_clk_div;
 	u32 con_id;
 
@@ -486,7 +328,7 @@ static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
 	}
 	/* Select clk_sdmmc/emmc source from GPLL by default */
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
 
 	if (src_clk_div > 127) {
 		/* use 24MHz source for 400KHz clock */
@@ -502,33 +344,37 @@ static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,
 			     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
 	}
 
-	return rk3328_mmc_get_clk(cru, clk_id);
+	return rk3328_mmc_get_clk(priv, clk_id);
 }
 
-static ulong rk3328_pwm_get_clk(struct rk3328_cru *cru)
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3328_pwm_get_clk(struct rk3328_clk_priv *priv)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[24]);
 	div = (con & CLK_PWM_DIV_CON_MASK) >> CLK_PWM_DIV_CON_SHIFT;
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rk3328_pwm_set_clk(struct rk3328_cru *cru, uint hz)
+static ulong rk3328_pwm_set_clk(struct rk3328_clk_priv *priv, uint hz)
 {
-	u32 div = GPLL_HZ / hz;
+	struct rk3328_cru *cru = priv->cru;
+	u32 div = priv->gpll_hz / hz;
 
 	rk_clrsetreg(&cru->clksel_con[24],
 		     CLK_PWM_PLL_SEL_MASK | CLK_PWM_DIV_CON_MASK,
 		     CLK_PWM_PLL_SEL_GPLL << CLK_PWM_PLL_SEL_SHIFT |
 		     (div - 1) << CLK_PWM_DIV_CON_SHIFT);
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru)
+static ulong rk3328_saradc_get_clk(struct rk3328_clk_priv *priv)
 {
+	struct rk3328_cru *cru = priv->cru;
 	u32 div, val;
 
 	val = readl(&cru->clksel_con[23]);
@@ -538,8 +384,9 @@ static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)
+static ulong rk3328_saradc_set_clk(struct rk3328_clk_priv *priv, uint hz)
 {
+	struct rk3328_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
@@ -549,7 +396,238 @@ static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)
 		     CLK_SARADC_DIV_CON_MASK,
 		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
 
-	return rk3328_saradc_get_clk(cru);
+	return rk3328_saradc_get_clk(priv);
+}
+
+static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VOP_PRE:
+		con = readl(&cru->clksel_con[39]);
+		div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case ACLK_VIO_PRE:
+		con = readl(&cru->clksel_con[37]);
+		div = (con & ACLK_VIO_DIV_CON_MASK) >> ACLK_VIO_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case HCLK_VIO_PRE:
+		parent = rk3328_vop_get_clk(priv, ACLK_VIO_PRE);
+		con = readl(&cru->clksel_con[37]);
+		div = (con & HCLK_VIO_DIV_CON_MASK) >> HCLK_VIO_DIV_CON_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_vop_set_clk(struct rk3328_clk_priv *priv,
+				ulong clk_id, uint hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+	u32 con, parent;
+
+	src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VOP_PRE:
+		rk_clrsetreg(&cru->clksel_con[39],
+			     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+			     ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
+		break;
+	case ACLK_VIO_PRE:
+		rk_clrsetreg(&cru->clksel_con[37],
+			     ACLK_VIO_PLL_SEL_MASK | ACLK_VIO_DIV_CON_MASK,
+			     ACLK_VIO_PLL_SEL_CPLL << ACLK_VIO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VIO_DIV_CON_SHIFT);
+		break;
+	case HCLK_VIO_PRE:
+		src_clk_div = DIV_ROUND_UP(rk3328_vop_get_clk(priv,
+							      ACLK_VIO_PRE),
+					   hz);
+		rk_clrsetreg(&cru->clksel_con[37],
+			     HCLK_VIO_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_VIO_DIV_CON_SHIFT);
+		break;
+	case DCLK_LCDC:
+		con = readl(&cru->clksel_con[40]);
+		con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT;
+		if (con) {
+			parent = readl(&cru->clksel_con[40]);
+			parent = (parent & DCLK_LCDC_PLL_SEL_MASK) >>
+				 DCLK_LCDC_PLL_SEL_SHIFT;
+			if (parent)
+				src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+			else
+				src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+
+			rk_clrsetreg(&cru->clksel_con[40],
+				     DCLK_LCDC_DIV_CON_MASK,
+				     (src_clk_div - 1) <<
+				     DCLK_LCDC_DIV_CON_SHIFT);
+		}
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return rk3328_vop_get_clk(priv, clk_id);
+}
+#endif
+
+static ulong rk3328_bus_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		con = readl(&cru->clksel_con[0]);
+		div = (con & ACLK_BUS_DIV_CON_MASK) >> ACLK_BUS_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case HCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[1]);
+		div = (con & HCLK_BUS_DIV_CON_MASK) >> HCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3328_bus_get_clk(priv, ACLK_BUS_PRE);
+		break;
+	case PCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[1]);
+		div = (con & PCLK_BUS_DIV_CON_MASK) >> PCLK_BUS_DIV_CON_SHIFT;
+		parent = rk3328_bus_get_clk(priv, ACLK_BUS_PRE);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_bus_set_clk(struct rk3328_clk_priv *priv,
+				ulong clk_id, ulong hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CLK_BUS_PLL_SEL_MASK | ACLK_BUS_DIV_CON_MASK,
+			     CLK_BUS_PLL_SEL_CPLL << CLK_BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_BUS_DIV_CON_SHIFT);
+		break;
+	case HCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(rk3328_bus_get_clk(priv,
+							      ACLK_BUS_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[1],
+			     HCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_BUS_DIV_CON_SHIFT);
+		break;
+	case PCLK_BUS_PRE:
+		src_clk_div = DIV_ROUND_UP(rk3328_bus_get_clk(priv,
+							      ACLK_BUS_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->clksel_con[1],
+			     PCLK_BUS_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_BUS_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+	return rk3328_bus_get_clk(priv, clk_id);
+}
+
+static ulong rk3328_peri_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+	struct rk3328_cru *cru = priv->cru;
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		con = readl(&cru->clksel_con[28]);
+		div = (con & ACLK_PERI_DIV_CON_MASK) >> ACLK_PERI_DIV_CON_SHIFT;
+		parent = priv->cpll_hz;
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->clksel_con[29]);
+		div = (con & HCLK_PERI_DIV_CON_MASK) >> HCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3328_peri_get_clk(priv, ACLK_PERI_PRE);
+		break;
+	case PCLK_PERI:
+		con = readl(&cru->clksel_con[29]);
+		div = (con & PCLK_PERI_DIV_CON_MASK) >> PCLK_PERI_DIV_CON_SHIFT;
+		parent = rk3328_peri_get_clk(priv, ACLK_PERI_PRE);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_peri_set_clk(struct rk3328_clk_priv *priv,
+				 ulong clk_id, ulong hz)
+{
+	struct rk3328_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		src_clk_div = DIV_ROUND_UP(priv->cpll_hz, hz);
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[28],
+			     CLK_PERI_PLL_SEL_MASK | ACLK_PERI_DIV_CON_MASK,
+			     CLK_PERI_PLL_SEL_CPLL << CLK_PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << ACLK_PERI_DIV_CON_SHIFT);
+		break;
+	case HCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3328_peri_get_clk(priv,
+							       ACLK_PERI_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[29],
+			     HCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << HCLK_PERI_DIV_CON_SHIFT);
+		break;
+	case PCLK_PERI:
+		src_clk_div = DIV_ROUND_UP(rk3328_peri_get_clk(priv,
+							       ACLK_PERI_PRE),
+					   hz);
+		assert(src_clk_div - 1 < 7);
+		rk_clrsetreg(&cru->clksel_con[29],
+			     PCLK_PERI_DIV_CON_MASK,
+			     (src_clk_div - 1) << PCLK_PERI_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk3328_peri_get_clk(priv, clk_id);
 }
 
 static ulong rk3328_clk_get_rate(struct clk *clk)
@@ -557,27 +635,67 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
+#ifndef CONFIG_SPL_BUILD
+	if (!priv->gpll_hz) {
+		priv->gpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[GPLL],
+						      priv->cru, GPLL);
+		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	}
+	if (!priv->cpll_hz) {
+		priv->cpll_hz = rockchip_pll_get_rate(&rk3328_pll_clks[CPLL],
+						      priv->cru, CPLL);
+		debug("%s cpll=%lu\n", __func__, priv->cpll_hz);
+	}
+#endif
+
 	switch (clk->id) {
-	case 0 ... 29:
-		return 0;
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+		rate = rockchip_pll_get_rate(&rk3328_pll_clks[clk->id - 1],
+					     priv->cru, clk->id - 1);
+		break;
+	case ARMCLK:
+		rate = rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+					     priv->cru, NPLL);
+		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		rate = rk3328_bus_get_clk(priv, clk->id);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3328_peri_get_clk(priv, clk->id);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		rate = rk3328_mmc_get_clk(priv->cru, clk->id);
+		rate = rk3328_mmc_get_clk(priv, clk->id);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		rate = rk3328_i2c_get_clk(priv->cru, clk->id);
+		rate = rk3328_i2c_get_clk(priv, clk->id);
 		break;
 	case SCLK_PWM:
-		rate = rk3328_pwm_get_clk(priv->cru);
+		rate = rk3328_pwm_get_clk(priv);
 		break;
 	case SCLK_SARADC:
-		rate = rk3328_saradc_get_clk(priv->cru);
+		rate = rk3328_saradc_get_clk(priv);
+		break;
+	case ACLK_VOP_PRE:
+	case ACLK_VIO_PRE:
+	case HCLK_VIO_PRE:
+		rate = rk3328_vop_get_clk(priv, clk->id);
 		break;
+#endif
 	default:
 		return -ENOENT;
 	}
@@ -591,30 +709,64 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	ulong ret = 0;
 
 	switch (clk->id) {
-	case 0 ... 29:
-		return 0;
+	case PLL_APLL:
+	case PLL_DPLL:
+	case PLL_NPLL:
+		ret = rockchip_pll_set_rate(&rk3328_pll_clks[clk->id - 1],
+					    priv->cru, clk->id - 1, rate);
+		break;
+	case PLL_CPLL:
+		ret = rockchip_pll_set_rate(&rk3328_pll_clks[CPLL],
+					    priv->cru, CPLL, rate);
+		priv->cpll_hz = rate;
+		break;
+	case PLL_GPLL:
+		ret = rockchip_pll_set_rate(&rk3328_pll_clks[GPLL],
+					    priv->cru, GPLL, rate);
+		priv->gpll_hz = rate;
+		break;
+	case ARMCLK:
+		ret = rk3328_armclk_set_clk(priv, rate);
+		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		rate = rk3328_bus_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3328_peri_set_clk(priv, clk->id, rate);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		ret = rk3328_mmc_set_clk(priv->cru, clk->id, rate);
+		ret = rk3328_mmc_set_clk(priv, clk->id, rate);
 		break;
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		ret = rk3328_i2c_set_clk(priv->cru, clk->id, rate);
+		ret = rk3328_i2c_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_MAC2IO:
-		ret = rk3328_gmac2io_set_clk(priv->cru, rate);
+		ret = rk3328_gmac2io_set_clk(priv, rate);
 		break;
 	case SCLK_PWM:
-		ret = rk3328_pwm_set_clk(priv->cru, rate);
+		ret = rk3328_pwm_set_clk(priv, rate);
 		break;
 	case SCLK_SARADC:
-		ret = rk3328_saradc_set_clk(priv->cru, rate);
+		ret = rk3328_saradc_set_clk(priv, rate);
 		break;
 	case DCLK_LCDC:
+	case ACLK_VOP_PRE:
+	case ACLK_VIO_PRE:
+	case HCLK_VIO_PRE:
+		rate = rk3328_vop_set_clk(priv, clk->id, rate);
+		break;
+#endif
 	case SCLK_PDM:
 	case SCLK_RTC32K:
 	case SCLK_UART0:
@@ -623,17 +775,8 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SDIO:
 	case SCLK_TSP:
 	case SCLK_WIFI:
-	case ACLK_BUS_PRE:
-	case HCLK_BUS_PRE:
-	case PCLK_BUS_PRE:
-	case ACLK_PERI_PRE:
-	case HCLK_PERI:
-	case PCLK_PERI:
-	case ACLK_VIO_PRE:
-	case HCLK_VIO_PRE:
 	case ACLK_RGA_PRE:
 	case SCLK_RGA:
-	case ACLK_VOP_PRE:
 	case ACLK_RKVDEC_PRE:
 	case ACLK_RKVENC:
 	case ACLK_VPU_PRE:
@@ -654,6 +797,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+#ifndef CONFIG_SPL_BUILD
 static int rk3328_gmac2io_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3328_grf_regs *grf;
@@ -728,14 +872,42 @@ static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
+static int rk3328_lcdc_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
+
+	if (parent->id == HDMIPHY)
+		rk_clrsetreg(&priv->cru->clksel_con[40],
+			     DCLK_LCDC_SEL_MASK,
+			     DCLK_LCDC_SEL_HDMIPHY << DCLK_LCDC_SEL_SHIFT);
+	else if (parent->id == PLL_CPLL)
+		rk_clrsetreg(&priv->cru->clksel_con[40],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_CPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+	else
+		rk_clrsetreg(&priv->cru->clksel_con[40],
+			     DCLK_LCDC_SEL_MASK | DCLK_LCDC_PLL_SEL_MASK,
+			     (DCLK_LCDC_SEL_PLL << DCLK_LCDC_SEL_SHIFT) |
+			     (DCLK_LCDC_PLL_SEL_GPLL <<
+			     DCLK_LCDC_PLL_SEL_SHIFT));
+
+	return 0;
+}
+#endif
+
 static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
+#ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC2IO:
 		return rk3328_gmac2io_set_parent(clk, parent);
 	case SCLK_MAC2IO_EXT:
 		return rk3328_gmac2io_ext_set_parent(clk, parent);
 	case DCLK_LCDC:
+		return rk3328_lcdc_set_parent(clk, parent);
+#endif
 	case SCLK_PDM:
 	case SCLK_RTC32K:
 	case SCLK_UART0:
@@ -754,11 +926,38 @@ static struct clk_ops rk3328_clk_ops = {
 	.set_parent = rk3328_clk_set_parent,
 };
 
+static void rkclk_init(struct rk3328_clk_priv *priv)
+{
+	if (rockchip_pll_get_rate(&rk3328_pll_clks[NPLL],
+				  priv->cru, NPLL) != APLL_HZ)
+		rk3328_armclk_set_clk(priv, APLL_HZ);
+
+	rockchip_pll_set_rate(&rk3328_pll_clks[GPLL],
+			      priv->cru, GPLL, GPLL_HZ);
+	priv->gpll_hz = GPLL_HZ;
+
+	rockchip_pll_set_rate(&rk3328_pll_clks[CPLL],
+			      priv->cru, CPLL, CPLL_HZ);
+	priv->cpll_hz = CPLL_HZ;
+
+	rk3328_bus_set_clk(priv, ACLK_BUS_PRE, ACLK_BUS_HZ);
+	rk3328_bus_set_clk(priv, HCLK_BUS_PRE, ACLK_BUS_HZ / 2);
+	rk3328_bus_set_clk(priv, PCLK_BUS_PRE, ACLK_BUS_HZ / 2);
+	rk3328_peri_set_clk(priv, ACLK_PERI_PRE, ACLK_PERI_HZ);
+	rk3328_peri_set_clk(priv, HCLK_PERI, ACLK_PERI_HZ / 2);
+	rk3328_peri_set_clk(priv, PCLK_PERI, ACLK_PERI_HZ / 2);
+	/*rk3328_mmc_set_clk(priv, SCLK_EMMC, rate);*/
+
+	/* set usbphy and hdmiphy from phy */
+	rk_clrsetreg(&priv->cru->misc, (0x1 << 13) |
+		     (0x1 << 15), (0 << 15) | (0 << 13));
+}
+
 static int rk3328_clk_probe(struct udevice *dev)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
 
-	rkclk_init(priv->cru);
+	rkclk_init(priv);
 
 	return 0;
 }
@@ -823,3 +1022,61 @@ U_BOOT_DRIVER(rockchip_rk3328_cru) = {
 	.bind		= rk3328_clk_bind,
 	.probe		= rk3328_clk_probe,
 };
+
+#ifndef CONFIG_SPL_BUILD
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3328_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3328_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h
index cdc0b338aa..9d56d93e32 100644
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ b/include/dt-bindings/clock/rk3328-cru.h
@@ -91,119 +91,118 @@
 #define SCLK_MAC2IO_EXT		102
 
 /* dclk gates */
-#define DCLK_LCDC		180
-#define DCLK_HDMIPHY		181
-#define HDMIPHY			182
-#define USB480M			183
-#define DCLK_LCDC_SRC		184
+#define DCLK_LCDC		120
+#define DCLK_HDMIPHY		121
+#define HDMIPHY			122
+#define USB480M			123
+#define DCLK_LCDC_SRC		124
 
 /* aclk gates */
-#define ACLK_AXISRAM		190
-#define ACLK_VOP_PRE		191
-#define ACLK_USB3OTG		192
-#define ACLK_RGA_PRE		193
-#define ACLK_DMAC		194
-#define ACLK_GPU		195
-#define ACLK_BUS_PRE		196
-#define ACLK_PERI_PRE		197
-#define ACLK_RKVDEC_PRE		198
-#define ACLK_RKVDEC		199
-#define ACLK_RKVENC		200
-#define ACLK_VPU_PRE		201
-#define ACLK_VIO_PRE		202
-#define ACLK_VPU		203
-#define ACLK_VIO		204
-#define ACLK_VOP		205
-#define ACLK_GMAC		206
-#define ACLK_H265		207
-#define ACLK_H264		208
-#define ACLK_MAC2PHY		209
-#define ACLK_MAC2IO		210
-#define ACLK_DCF		211
-#define ACLK_TSP		212
-#define ACLK_PERI		213
-#define ACLK_RGA		214
-#define ACLK_IEP		215
-#define ACLK_CIF		216
-#define ACLK_HDCP		217
+#define ACLK_AXISRAM		130
+#define ACLK_VOP_PRE		131
+#define ACLK_USB3OTG		132
+#define ACLK_RGA_PRE		133
+#define ACLK_DMAC		134
+#define ACLK_GPU		135
+#define ACLK_BUS_PRE		136
+#define ACLK_PERI_PRE		137
+#define ACLK_RKVDEC_PRE		138
+#define ACLK_RKVDEC		139
+#define ACLK_RKVENC		140
+#define ACLK_VPU_PRE		141
+#define ACLK_VIO_PRE		142
+#define ACLK_VPU		143
+#define ACLK_VIO		144
+#define ACLK_VOP		145
+#define ACLK_GMAC		146
+#define ACLK_H265		147
+#define ACLK_H264		148
+#define ACLK_MAC2PHY		149
+#define ACLK_MAC2IO		150
+#define ACLK_DCF		151
+#define ACLK_TSP		152
+#define ACLK_PERI		153
+#define ACLK_RGA		154
+#define ACLK_IEP		155
+#define ACLK_CIF		156
+#define ACLK_HDCP		157
 
 /* pclk gates */
-#define PCLK_GPIO0		300
-#define PCLK_GPIO1		301
-#define PCLK_GPIO2		302
-#define PCLK_GPIO3		303
-#define PCLK_GRF		304
-#define PCLK_I2C0		305
-#define PCLK_I2C1		306
-#define PCLK_I2C2		307
-#define PCLK_I2C3		308
-#define PCLK_SPI		309
-#define PCLK_UART0		310
-#define PCLK_UART1		311
-#define PCLK_UART2		312
-#define PCLK_TSADC		313
-#define PCLK_PWM		314
-#define PCLK_TIMER		315
-#define PCLK_BUS_PRE		316
-#define PCLK_PERI_PRE		317
-#define PCLK_HDMI_CTRL		318
-#define PCLK_HDMI_PHY		319
-#define PCLK_GMAC		320
-#define PCLK_H265		321
-#define PCLK_MAC2PHY		322
-#define PCLK_MAC2IO		323
-#define PCLK_USB3PHY_OTG	324
-#define PCLK_USB3PHY_PIPE	325
-#define PCLK_USB3_GRF		326
-#define PCLK_USB2_GRF		327
-#define PCLK_HDMIPHY		328
-#define PCLK_DDR		329
-#define PCLK_PERI		330
-#define PCLK_HDMI		331
-#define PCLK_HDCP		332
-#define PCLK_DCF		333
-#define PCLK_SARADC		334
+#define PCLK_GPIO0		200
+#define PCLK_GPIO1		201
+#define PCLK_GPIO2		202
+#define PCLK_GPIO3		203
+#define PCLK_GRF		204
+#define PCLK_I2C0		205
+#define PCLK_I2C1		206
+#define PCLK_I2C2		207
+#define PCLK_I2C3		208
+#define PCLK_SPI		209
+#define PCLK_UART0		210
+#define PCLK_UART1		211
+#define PCLK_UART2		212
+#define PCLK_TSADC		213
+#define PCLK_PWM		214
+#define PCLK_TIMER		215
+#define PCLK_BUS_PRE		216
+#define PCLK_PERI_PRE		217
+#define PCLK_HDMI_CTRL		218
+#define PCLK_HDMI_PHY		219
+#define PCLK_GMAC		220
+#define PCLK_H265		221
+#define PCLK_MAC2PHY		222
+#define PCLK_MAC2IO		223
+#define PCLK_USB3PHY_OTG	224
+#define PCLK_USB3PHY_PIPE	225
+#define PCLK_USB3_GRF		226
+#define PCLK_USB2_GRF		227
+#define PCLK_HDMIPHY		228
+#define PCLK_DDR		229
+#define PCLK_PERI		230
+#define PCLK_HDMI		231
+#define PCLK_HDCP		232
+#define PCLK_DCF		233
+#define PCLK_SARADC		234
+#define PCLK_ACODEC		235
 
 /* hclk gates */
-#define HCLK_PERI		408
-#define HCLK_TSP		409
-#define HCLK_GMAC		410
-#define HCLK_I2S0_8CH		411
-#define HCLK_I2S1_8CH		413
-#define HCLK_I2S2_2CH		413
-#define HCLK_SPDIF_8CH		414
-#define HCLK_VOP		415
-#define HCLK_NANDC		416
-#define HCLK_SDMMC		417
-#define HCLK_SDIO		418
-#define HCLK_EMMC		419
-#define HCLK_SDMMC_EXT		420
-#define HCLK_RKVDEC_PRE		421
-#define HCLK_RKVDEC		422
-#define HCLK_RKVENC		423
-#define HCLK_VPU_PRE		424
-#define HCLK_VIO_PRE		425
-#define HCLK_VPU		426
-#define HCLK_VIO		427
-#define HCLK_BUS_PRE		428
-#define HCLK_PERI_PRE		429
-#define HCLK_H264		430
-#define HCLK_CIF		431
-#define HCLK_OTG_PMU		432
-#define HCLK_OTG		433
-#define HCLK_HOST0		434
-#define HCLK_HOST0_ARB		435
-#define HCLK_CRYPTO_MST		436
-#define HCLK_CRYPTO_SLV		437
-#define HCLK_PDM		438
-#define HCLK_IEP		439
-#define HCLK_RGA		440
-#define HCLK_HDCP		441
+#define HCLK_PERI		308
+#define HCLK_TSP		309
+#define HCLK_GMAC		310
+#define HCLK_I2S0_8CH		311
+#define HCLK_I2S1_8CH		312
+#define HCLK_I2S2_2CH		313
+#define HCLK_SPDIF_8CH		314
+#define HCLK_VOP		315
+#define HCLK_NANDC		316
+#define HCLK_SDMMC		317
+#define HCLK_SDIO		318
+#define HCLK_EMMC		319
+#define HCLK_SDMMC_EXT		320
+#define HCLK_RKVDEC_PRE		321
+#define HCLK_RKVDEC		322
+#define HCLK_RKVENC		323
+#define HCLK_VPU_PRE		324
+#define HCLK_VIO_PRE		325
+#define HCLK_VPU		326
+#define HCLK_VIO		327
+#define HCLK_BUS_PRE		328
+#define HCLK_PERI_PRE		329
+#define HCLK_H264		330
+#define HCLK_CIF		331
+#define HCLK_OTG_PMU		332
+#define HCLK_OTG		333
+#define HCLK_HOST0		334
+#define HCLK_HOST0_ARB		335
+#define HCLK_CRYPTO_MST		336
+#define HCLK_CRYPTO_SLV		337
+#define HCLK_PDM		338
+#define HCLK_IEP		339
+#define HCLK_RGA		340
+#define HCLK_HDCP		341
 
 #define CLK_NR_CLKS		(HCLK_HDCP + 1)
 
-#define CLKGRF_NR_CLKS		(SCLK_MAC2PHY + 1)
-
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

commit 2f0a72b1f21043d9f7ed7e506710073649872673
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Jul 20 15:11:01 2018 +0800

    rockchip: clk: pll: add common pll setting funcs
    
    Change-Id: I99887338a4f84aead905938eee066b460c4c1b9f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 783f6f29a1..8b002616ad 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -10,6 +10,7 @@
 /* define pll mode */
 #define RKCLK_PLL_MODE_SLOW		0
 #define RKCLK_PLL_MODE_NORMAL		1
+#define RKCLK_PLL_MODE_DEEP		2
 
 enum {
 	ROCKCHIP_SYSCON_NOC,
@@ -35,6 +36,81 @@ enum rk_clk_id {
 	CLK_COUNT,
 };
 
+#define PLL(_type, _id, _con, _mode, _mshift,			\
+		 _lshift, _pflags, _rtable)			\
+	{							\
+		.id		= _id,				\
+		.type		= _type,			\
+		.con_offset	= _con,				\
+		.mode_offset	= _mode,			\
+		.mode_shift	= _mshift,			\
+		.lock_shift	= _lshift,			\
+		.pll_flags	= _pflags,			\
+		.rate_table	= _rtable,			\
+	}
+
+#define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
+			_postdiv2, _dsmpd, _frac)		\
+{								\
+	.rate	= _rate##U,					\
+	.fbdiv = _fbdiv,					\
+	.postdiv1 = _postdiv1,					\
+	.refdiv = _refdiv,					\
+	.postdiv2 = _postdiv2,					\
+	.dsmpd = _dsmpd,					\
+	.frac = _frac,						\
+}
+
+struct rockchip_pll_rate_table {
+	unsigned long rate;
+	unsigned int nr;
+	unsigned int nf;
+	unsigned int no;
+	unsigned int nb;
+	/* for RK3036/RK3399 */
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
+};
+
+enum rockchip_pll_type {
+	pll_rk3036,
+	pll_rk3066,
+	pll_rk3328,
+	pll_rk3366,
+	pll_rk3399,
+};
+
+struct rockchip_pll_clock {
+	unsigned int			id;
+	unsigned int			con_offset;
+	unsigned int			mode_offset;
+	unsigned int			mode_shift;
+	unsigned int			lock_shift;
+	enum rockchip_pll_type		type;
+	unsigned int			pll_flags;
+	struct rockchip_pll_rate_table *rate_table;
+	unsigned int			mode_mask;
+};
+
+struct rockchip_cpu_rate_table {
+	unsigned long rate;
+	unsigned int aclk_div;
+	unsigned int pclk_div;
+};
+
+int rockchip_pll_set_rate(struct rockchip_pll_clock *pll,
+			  void __iomem *base, ulong clk_id,
+			  ulong drate);
+ulong rockchip_pll_get_rate(struct rockchip_pll_clock *pll,
+			    void __iomem *base, ulong clk_id);
+const struct rockchip_cpu_rate_table *
+rockchip_get_cpu_settings(struct rockchip_cpu_rate_table *cpu_table,
+			  ulong rate);
+
 static inline int rk_pll_id(enum rk_clk_id clk_id)
 {
 	return clk_id - 1;
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 4091abc09b..f91a365523 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -4,7 +4,9 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-y += clk_pll.o
 obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
+#obj-y += clk_rk1808.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
new file mode 100644
index 0000000000..706b645623
--- /dev/null
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -0,0 +1,364 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+ #include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <div64.h>
+
+static struct rockchip_pll_rate_table rockchip_auto_table;
+
+#define PLL_MODE_MASK				0x3
+#define PLL_RK3328_MODE_MASK			0x1
+
+#define RK3036_PLLCON0_FBDIV_MASK		0xfff
+#define RK3036_PLLCON0_FBDIV_SHIFT		0
+#define RK3036_PLLCON0_POSTDIV1_MASK		0x7 << 12
+#define RK3036_PLLCON0_POSTDIV1_SHIFT		12
+#define RK3036_PLLCON1_REFDIV_MASK		0x3f
+#define RK3036_PLLCON1_REFDIV_SHIFT		0
+#define RK3036_PLLCON1_POSTDIV2_MASK		0x7 << 6
+#define RK3036_PLLCON1_POSTDIV2_SHIFT		6
+#define RK3036_PLLCON1_DSMPD_MASK		0x1 << 12
+#define RK3036_PLLCON1_DSMPD_SHIFT		12
+#define RK3036_PLLCON2_FRAC_MASK		0xffffff
+#define RK3036_PLLCON2_FRAC_SHIFT		0
+#define RK3036_PLLCON1_PWRDOWN_SHIT		13
+
+#define MHZ		1000000
+#define KHZ		1000
+enum {
+	OSC_HZ			= 24 * 1000000,
+	VCO_MAX_HZ	= 3200U * 1000000,
+	VCO_MIN_HZ	= 800 * 1000000,
+	OUTPUT_MAX_HZ	= 3200U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define MIN_FOUTVCO_FREQ	(800 * MHZ)
+#define MAX_FOUTVCO_FREQ	(2000 * MHZ)
+
+int gcd(int m, int n)
+{
+	int t;
+
+	while (m > 0) {
+		if (n > m) {
+			t = m;
+			m = n;
+			n = t;
+		} /* swap */
+		m -= n;
+	}
+	return n;
+}
+
+/*
+ * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
+ * Formulas also embedded within the Fractional PLL Verilog model:
+ * If DSMPD = 1 (DSM is disabled, "integer mode")
+ * FOUTVCO = FREF / REFDIV * FBDIV
+ * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
+ * Where:
+ * FOUTVCO = Fractional PLL non-divided output frequency
+ * FOUTPOSTDIV = Fractional PLL divided output frequency
+ *               (output of second post divider)
+ * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
+ * REFDIV = Fractional PLL input reference clock divider
+ * FBDIV = Integer value programmed into feedback divide
+ *
+ */
+
+static int rockchip_pll_clk_set_postdiv(ulong fout_hz,
+					u32 *postdiv1,
+					u32 *postdiv2,
+					u32 *foutvco)
+{
+	ulong freq;
+
+	if (fout_hz < MIN_FOUTVCO_FREQ) {
+		for (*postdiv1 = 1; *postdiv1 <= 7; (*postdiv1)++) {
+			for (*postdiv2 = 1; *postdiv2 <= 7; (*postdiv2)++) {
+				freq = fout_hz * (*postdiv1) * (*postdiv2);
+				if (freq >= MIN_FOUTVCO_FREQ &&
+				    freq <= MAX_FOUTVCO_FREQ) {
+					*foutvco = freq;
+					return 0;
+				}
+			}
+		}
+		printf("Can't FIND postdiv1/2 to make fout=%lu in 800~2000M.\n",
+		       fout_hz);
+	} else {
+		*postdiv1 = 1;
+		*postdiv2 = 1;
+	}
+	return 0;
+}
+
+static struct rockchip_pll_rate_table *
+rockchip_pll_clk_set_by_auto(ulong fin_hz,
+			     ulong fout_hz)
+{
+	struct rockchip_pll_rate_table *rate_table = &rockchip_auto_table;
+	/* FIXME set postdiv1/2 always 1*/
+	u32 foutvco = fout_hz;
+	ulong fin_64, frac_64;
+	u32 f_frac, postdiv1, postdiv2;
+	ulong clk_gcd = 0;
+
+	if (fin_hz == 0 || fout_hz == 0 || fout_hz == fin_hz)
+		return NULL;
+
+	rockchip_pll_clk_set_postdiv(fout_hz, &postdiv1, &postdiv2, &foutvco);
+	rate_table->postdiv1 = postdiv1;
+	rate_table->postdiv2 = postdiv2;
+	rate_table->dsmpd = 1;
+
+	if (fin_hz / MHZ * MHZ == fin_hz && fout_hz / MHZ * MHZ == fout_hz) {
+		fin_hz /= MHZ;
+		foutvco /= MHZ;
+		clk_gcd = gcd(fin_hz, foutvco);
+		rate_table->refdiv = fin_hz / clk_gcd;
+		rate_table->fbdiv = foutvco / clk_gcd;
+
+		rate_table->frac = 0;
+
+		debug("fin = %ld, fout = %ld, clk_gcd = %ld,\n",
+		      fin_hz, fout_hz, clk_gcd);
+		debug("refdiv= %d,fbdiv= %d,postdiv1= %d,postdiv2= %d\n",
+		      rate_table->refdiv,
+		      rate_table->fbdiv, rate_table->postdiv1,
+		      rate_table->postdiv2);
+	} else {
+		debug("frac div,fin_hz = %ld,fout_hz = %ld\n",
+		      fin_hz, fout_hz);
+		debug("frac get postdiv1 = %d,  postdiv2 = %d, foutvco = %d\n",
+		      rate_table->postdiv1, rate_table->postdiv2, foutvco);
+		clk_gcd = gcd(fin_hz / MHZ, foutvco / MHZ);
+		rate_table->refdiv = fin_hz / MHZ / clk_gcd;
+		rate_table->fbdiv = foutvco / MHZ / clk_gcd;
+		debug("frac get refdiv = %d,  fbdiv = %d\n",
+		      rate_table->refdiv, rate_table->fbdiv);
+
+		rate_table->frac = 0;
+
+		f_frac = (foutvco % MHZ);
+		fin_64 = fin_hz;
+		fin_64 = fin_64 / rate_table->refdiv;
+		frac_64 = f_frac << 24;
+		frac_64 = frac_64 / fin_64;
+		rate_table->frac = frac_64;
+		if (rate_table->frac > 0)
+			rate_table->dsmpd = 0;
+		debug("frac = %x\n", rate_table->frac);
+	}
+	return rate_table;
+}
+
+static const struct rockchip_pll_rate_table *
+rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate)
+{
+	struct rockchip_pll_rate_table  *rate_table = pll->rate_table;
+
+	while (rate_table->rate) {
+		if (rate_table->rate == rate)
+			break;
+		rate_table++;
+	}
+	if (rate_table->rate != rate)
+		return rockchip_pll_clk_set_by_auto(24 * MHZ, rate);
+	else
+		return rate_table;
+}
+
+static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll,
+			       void __iomem *base, ulong pll_id,
+			       ulong drate)
+{
+	const struct rockchip_pll_rate_table *rate;
+
+	rate = rockchip_get_pll_settings(pll, drate);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	debug("%s: rate settings for %lu fbdiv: %d, postdiv1: %d, refdiv: %d\n",
+	      __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv);
+	debug("%s: rate settings for %lu postdiv2: %d, dsmpd: %d, frac: %d\n",
+	      __func__, rate->rate, rate->postdiv2, rate->dsmpd, rate->frac);
+
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(base + pll->mode_offset,
+		     pll->mode_mask << pll->mode_shift,
+		     RKCLK_PLL_MODE_SLOW << pll->mode_shift);
+
+	/* Power down */
+	rk_setreg(base + pll->con_offset + 0x4,
+		  1 << RK3036_PLLCON1_PWRDOWN_SHIT);
+
+	rk_clrsetreg(base + pll->con_offset,
+		     (RK3036_PLLCON0_POSTDIV1_MASK |
+		     RK3036_PLLCON0_FBDIV_MASK),
+		     (rate->postdiv1 << RK3036_PLLCON0_POSTDIV1_SHIFT) |
+		     rate->fbdiv);
+	rk_clrsetreg(base + pll->con_offset + 0x4,
+		     (RK3036_PLLCON1_POSTDIV2_MASK |
+		     RK3036_PLLCON1_REFDIV_MASK),
+		     (rate->postdiv2 << RK3036_PLLCON1_POSTDIV2_SHIFT |
+		     rate->refdiv << RK3036_PLLCON1_REFDIV_SHIFT));
+	if (!rate->dsmpd) {
+		rk_clrsetreg(base + pll->con_offset + 0x4,
+			     RK3036_PLLCON1_DSMPD_MASK,
+			     rate->dsmpd << RK3036_PLLCON1_DSMPD_SHIFT);
+		writel((readl(base + pll->con_offset + 0x8) &
+			(~RK3036_PLLCON2_FRAC_MASK)) |
+			    (rate->frac << RK3036_PLLCON2_FRAC_SHIFT),
+			    base + pll->con_offset + 0x8);
+	}
+
+	/* Power Up */
+	rk_clrreg(base + pll->con_offset + 0x4,
+		  1 << RK3036_PLLCON1_PWRDOWN_SHIT);
+
+	/* waiting for pll lock */
+	while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift)))
+		udelay(1);
+
+	rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift,
+		     RKCLK_PLL_MODE_NORMAL << pll->mode_shift);
+	debug("PLL at %p: con0=%x con1= %x con2= %x mode= %x\n",
+	      pll, readl(base + pll->con_offset),
+	      readl(base + pll->con_offset + 0x4),
+	      readl(base + pll->con_offset + 0x8),
+	      readl(base + pll->mode_offset));
+
+	return 0;
+}
+
+static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll,
+				 void __iomem *base, ulong pll_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
+	u32 con = 0, shift, mask;
+	ulong rate = OSC_HZ;
+
+	con = readl(base + pll->mode_offset);
+	shift = pll->mode_shift;
+	mask = pll->mode_mask << shift;
+
+	switch ((con & mask) >> shift) {
+	case RKCLK_PLL_MODE_SLOW:
+		return OSC_HZ;
+	case RKCLK_PLL_MODE_NORMAL:
+		/* normal mode */
+		con = readl(base + pll->con_offset);
+		postdiv1 = (con & RK3036_PLLCON0_POSTDIV1_MASK) >>
+			   RK3036_PLLCON0_POSTDIV1_SHIFT;
+		fbdiv = (con & RK3036_PLLCON0_FBDIV_MASK) >>
+			RK3036_PLLCON0_FBDIV_SHIFT;
+		con = readl(base + pll->con_offset + 0x4);
+		postdiv2 = (con & RK3036_PLLCON1_POSTDIV2_MASK) >>
+			   RK3036_PLLCON1_POSTDIV2_SHIFT;
+		refdiv = (con & RK3036_PLLCON1_REFDIV_MASK) >>
+			 RK3036_PLLCON1_REFDIV_SHIFT;
+		dsmpd = (con & RK3036_PLLCON1_DSMPD_MASK) >>
+			RK3036_PLLCON1_DSMPD_SHIFT;
+		con = readl(base + pll->con_offset + 0x8);
+		frac = (con & RK3036_PLLCON2_FRAC_MASK) >>
+			RK3036_PLLCON2_FRAC_SHIFT;
+		rate *= fbdiv;
+		rate = rate / refdiv;
+		if (dsmpd == 0) {
+			ulong frac_rate = OSC_HZ;
+
+			frac_rate = frac_rate  >> 12;
+			frac_rate = frac_rate * frac;
+			frac_rate = frac_rate  >> 12;
+			frac_rate = frac_rate / refdiv;
+			rate += frac_rate;
+		}
+		rate = rate / (postdiv1 * postdiv2);
+
+		return rate;
+	case RKCLK_PLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+ulong rockchip_pll_get_rate(struct rockchip_pll_clock *pll,
+			    void __iomem *base,
+			    ulong pll_id)
+{
+	ulong rate = 0;
+
+	switch (pll->type) {
+	case pll_rk3036:
+		pll->mode_mask = PLL_MODE_MASK;
+		rate = rk3036_pll_get_rate(pll, base, pll_id);
+		break;
+	case pll_rk3328:
+		pll->mode_mask = PLL_RK3328_MODE_MASK;
+		rate = rk3036_pll_get_rate(pll, base, pll_id);
+		break;
+	default:
+		printf("%s: Unknown pll type for pll clk %ld\n",
+		       __func__, pll_id);
+	}
+	return rate;
+}
+
+int rockchip_pll_set_rate(struct rockchip_pll_clock *pll,
+			  void __iomem *base, ulong pll_id,
+			  ulong drate)
+{
+	int ret = 0;
+
+	if (rockchip_pll_get_rate(pll, base, pll_id) == drate)
+		return 0;
+
+	switch (pll->type) {
+	case pll_rk3036:
+		pll->mode_mask = PLL_MODE_MASK;
+		ret = rk3036_pll_set_rate(pll, base, pll_id, drate);
+		break;
+	case pll_rk3328:
+		pll->mode_mask = PLL_RK3328_MODE_MASK;
+		ret = rk3036_pll_set_rate(pll, base, pll_id, drate);
+		break;
+	default:
+		printf("%s: Unknown pll type for pll clk %ld\n",
+		       __func__, pll_id);
+	}
+	return ret;
+}
+
+const struct rockchip_cpu_rate_table *
+rockchip_get_cpu_settings(struct rockchip_cpu_rate_table *cpu_table,
+			  ulong rate)
+{
+	struct rockchip_cpu_rate_table *ps = cpu_table;
+
+	while (ps->rate) {
+		if (ps->rate == rate)
+			break;
+		ps++;
+	}
+	if (ps->rate != rate)
+		return NULL;
+	else
+		return ps;
+}
+

commit dc71f496cd246668bd8a971e6e3ca304d479e71b
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jul 24 10:09:46 2018 +0800

    drm/rockchip: 3229 vop: fix mistake fild when in interlace mode
    
    set frame effect to fix mistake fild when in interlace mode.
    
    Change-Id: Ic4e7b7134bd54aa65d31264a3e4625eebdc229c5
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index eed6d5b8b2..8784138cbf 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -88,6 +88,7 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
 	.axi_outstanding_max_num = VOP_REG(RK3288_SYS_CTRL1, 0x1f, 13),
 	.axi_max_outstanding_en = VOP_REG(RK3288_SYS_CTRL1, 0x1, 12),
+	.reg_done_frm = VOP_REG_VER(RK3288_SYS_CTRL1, 0x1, 24, 3, 7, -1),
 	.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
 	.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),

commit b498696e7385e977f09b56735866258a58789dfc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 26 10:36:22 2018 +0800

    rockchip: resource: add more quote
    
    Change-Id: I4a9a25cacd032977f952956af83e4c1d91e239a9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 1d972941bf..e4c58ece41 100755
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -163,6 +163,12 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int resource_found = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
+
+/*
+ * Primary detect AOSP format image, try to get resource image from
+ * boot/recovery partition. If not, it's an RK format image and try
+ * to get from resource partition.
+ */
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	struct andr_img_hdr *andr_hdr;
 	char *boot_partname = PART_BOOT;
@@ -194,6 +200,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	/* Get boot mode from misc */
 	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
+
 	/* Read boot/recovery and chenc if this is an AOSP img */
 #ifdef CONFIG_ANDROID_AB
 	char slot_suffix[3] = {0};
@@ -204,13 +211,17 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (boot_partname == NULL)
 		goto out;
 #endif
-	ret = part_get_info_by_name(dev_desc, boot_partname,
-					 &part_info);
+	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
 		/* RKIMG can support part table without 'boot' */
 		goto next;
 	}
+
+	/*
+	 * Only read header and check magic, is a AOSP format image?
+	 * If so, get resource image from second part.
+	 */
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
 	if (ret != 1) {
@@ -232,10 +243,13 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 next:
 #endif
+	/*
+	 * If not found resource image in AOSP format images(boot/recovery part),
+	 * try to read RK format images(resource part).
+	 */
 	if (!resource_found) {
 		/* Read resource from Rockchip Resource partition */
-		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
-					 &part_info);
+		ret = part_get_info_by_name(dev_desc, PART_RESOURCE, &part_info);
 		if (ret < 0) {
 			printf("fail to get %s part\n", PART_RESOURCE);
 			goto out;
@@ -244,18 +258,23 @@ next:
 		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}
 
+	/* Only read header and check magic */
 	ret = blk_dread(dev_desc, offset, 1, hdr);
 	if (ret != 1)
 		goto out;
+
 	ret = resource_image_check_header(hdr);
 	if (ret < 0)
 		goto out;
+
 	content = memalign(ARCH_DMA_MINALIGN,
 			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
 	if (!content) {
 		printf("alloc memory for content failed\n");
 		goto out;
 	}
+
+	/* Real read whole resource image */
 	ret = blk_dread(dev_desc, offset + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
 	if (ret != (hdr->e_blks * hdr->e_nums))

commit 09509cd539aa1097808b28f8ce02cfdc337872a5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Aug 2 10:21:39 2018 +0800

    drivers: rkflash: support IDBlock updating in loader mode for nand devices
    
    SPI Nand and Nand flash devices are supported
    
    Change-Id: Ic4dbd5cf38bd46be474bb410224a9082bce1b5f2
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 8affd2d8dc..749f0077e0 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-21
+ * date: 2018-08-02
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -13059,6 +13059,7 @@ FtlWrite:
 	.word	.LANCHOR83
 	.word	.LANCHOR82
 	.size	FtlWrite, .-FtlWrite
+	.global	__aeabi_idivmod
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
 	.global	sftl_write
@@ -13068,14 +13069,297 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 112
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r2
-	mov	r2, r1
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	adds	r4, r0, r1
+	subs	r5, r4, #1
+	sub	sp, sp, #120
+	cmp	r5, #63
+	str	r0, [sp, #8]
+	str	r1, [sp, #16]
+	str	r2, [sp, #36]
+	ldr	r6, .L1762
+	bls	.L1731
+	cmp	r0, #576
+	bls	.L1732
+.L1731:
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L1733
+	ldr	r2, .L1762+4
+	mov	r0, #512
+	ldrh	r3, [r2, #14]
+	str	r3, [sp, #20]
+	ldrh	r3, [r2, #10]
+	ldrb	r1, [sp, #20]	@ zero_extendqisi2
+	smulbb	r3, r3, r1
+	uxth	r3, r3
+	mov	r1, r3
+	str	r3, [sp, #24]
+	bl	__aeabi_uidiv
+	ldr	r2, .L1762+8
+	movs	r3, #0
+	ldr	r1, .L1762+12
+	str	r0, [sp, #12]
+	sub	r4, r2, #262144
+.L1737:
+	ldr	r0, [r2, #-4]
+	cmp	r0, #0
+	beq	.L1734
+.L1738:
+	ldr	r3, [sp, #12]
+	movs	r4, #0
+	ldr	r2, [sp, #24]
+	ldr	r6, .L1762+16
+	str	r4, [sp, #28]
+	muls	r3, r2, r3
+	str	r3, [sp, #48]
+	ldr	r3, [sp, #12]
+	str	r3, [sp, #32]
+.L1735:
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, .L1762+20
+	bl	memset
+	ldr	r3, .L1762+4
+	mov	r0, r4
+	ldrh	r7, [r3, #14]
+	mov	r1, r7
+	uxtb	r8, r7
+	uxth	r3, r8
+	str	r3, [sp, #40]
+	ldr	r3, .L1762+4
+	ldrh	r5, [r3, #10]
+	ldrh	r3, [sp, #40]
+	smulbb	r5, r5, r3
+	bl	__aeabi_uidiv
+	uxth	r5, r5
+	mov	r1, r0
+	ldr	r3, [r6, #4]
+	movs	r0, #0
+	blx	r3
+	cmp	r5, #512
+	bcs	.L1739
+	mov	r1, r7
+	adds	r0, r5, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r6, #4]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+.L1739:
+	mov	r1, r5
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	movs	r5, #0
+	mov	r10, r1
+	subs	r3, r4, r1
+	str	r3, [sp, #44]
+.L1740:
+	cmp	r5, #512
+	bcc	.L1741
+	ldr	r3, .L1762+4
+	mov	r0, r4
+	movs	r5, #0
+	ldrb	r8, [r3, #14]	@ zero_extendqisi2
+	uxth	r3, r8
+	str	r3, [sp, #40]
+	ldr	r3, .L1762+4
+	ldrh	r1, [r3, #10]
+	ldrh	r3, [sp, #40]
+	smulbb	r1, r1, r3
+	uxth	r1, r1
+	bl	__aeabi_uidivmod
+	mov	fp, r1
+	subs	r3, r4, r1
+	uxth	r0, fp
+	mov	r1, r8
+	str	r3, [sp, #44]
+	bl	__aeabi_idivmod
+	uxth	r7, r1
+.L1742:
+	cmp	r5, #512
+	bcs	.L1746
+	ldr	r3, [sp, #40]
+	mov	r1, r8
+	add	r0, fp, r5
+	sub	r10, r3, r7
+	ldr	r3, .L1762+20
+	uxth	r10, r10
+	add	r2, r3, r5, lsl #9
+	str	r2, [sp, #52]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #44]
+	uxth	r0, r0
+	mov	r1, r8
+	add	r7, r7, r3
+	mla	r0, r8, r0, r7
+	bl	__aeabi_uidiv
+	ldr	r7, [r6, #12]
 	mov	r1, r0
+	add	r3, sp, #56
+	ldr	r2, [sp, #52]
+	movs	r0, #0
+	blx	r7
+	adds	r0, r0, #1
+	bne	.L1743
+.L1746:
+	ldr	r3, .L1762+24
+	movs	r5, #0
+.L1744:
+	ldr	r2, .L1762+20
+	mov	r7, r3
+	adds	r3, r3, #4
+	ldr	r1, [r2, r5, lsl #2]
+	ldr	r2, [r7]
+	cmp	r1, r2
+	beq	.L1747
+	mov	r2, #512
+	movs	r1, #0
+	ldr	r0, .L1762+20
+	bl	memset
+	ldr	r2, .L1762+20
+	mov	r1, r4
+	str	r5, [sp]
+	ldr	r3, [r7]
+	ldr	r2, [r2, r5, lsl #2]
+	ldr	r0, .L1762+28
+	bl	printf
+	ldr	r1, [sp, #20]
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r6, #4]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bls	.L1748
+	ldr	r3, [sp, #24]
+	ldr	r1, [sp, #20]
+	adds	r0, r3, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [r6, #4]
+	mov	r1, r0
+	movs	r0, #0
+	blx	r3
+.L1748:
+	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2
+	ldr	r2, [sp, #48]
+	add	r4, r4, r2
+	ldr	r2, [sp, #32]
+	cmp	r2, #15
+	bls	.L1754
+.L1753:
+	ldr	r3, .L1762
+	movs	r2, #0
+	str	r2, [r3]
+.L1733:
+	ldr	r3, [sp, #36]
+	movs	r0, #0
+	ldr	r2, [sp, #16]
+	ldr	r1, [sp, #8]
+	bl	FtlWrite
+	add	sp, sp, #120
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1734:
+	ldr	r0, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	cmp	r3, #4096
+	it	hi
+	movhi	r3, #0
+	str	r0, [r2, #-4]!
+	cmp	r1, r2
+	bne	.L1737
+	b	.L1738
+.L1754:
+	str	r3, [sp, #32]
+	b	.L1735
+.L1741:
+	mov	r1, r8
+	add	r0, r10, r5
+	bl	__aeabi_uidiv
+	uxth	fp, r0
+	mov	r1, r8
+	ldr	r0, [sp, #44]
+	mul	r3, r8, fp
+	str	r3, [sp, #56]
+	movw	r3, #61424
+	str	r3, [sp, #60]
+	ldr	r3, .L1762+24
+	add	r2, r3, r5, lsl #9
+	str	r2, [sp, #52]
+	bl	__aeabi_uidiv
+	add	r3, sp, #56
+	add	r1, r0, fp
+	ldr	r2, [sp, #52]
 	movs	r0, #0
-	b	FtlWrite
+	ldr	r7, [r6, #8]
+	blx	r7
+	ldr	r3, [sp, #40]
+	add	r5, r5, r3
+	uxth	r5, r5
+	b	.L1740
+.L1743:
+	add	r5, r5, r10
+	movs	r7, #0
+	uxth	r5, r5
+	b	.L1742
+.L1747:
+	adds	r5, r5, #1
+	cmp	r5, #65536
+	bne	.L1744
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	cmp	r3, #5
+	str	r3, [sp, #28]
+	bls	.L1748
+	b	.L1753
+.L1732:
+	ldr	r3, [sp, #8]
+	ldr	r0, .L1762+24
+	cmp	r3, #63
+	bhi	.L1750
+	rsb	r1, r3, #64
+	ldr	r3, [sp, #16]
+	subs	r2, r3, r1
+	ldr	r3, [sp, #36]
+	add	r1, r3, r1, lsl #9
+.L1751:
+	movs	r3, #1
+	cmp	r5, #576
+	str	r3, [r6]
+	ittt	hi
+	subhi	r2, r2, r4
+	mvnhi	r3, #446
+	addhi	r2, r2, r3
+	lsls	r2, r2, #9
+	bl	memcpy
+	b	.L1733
+.L1750:
+	ldr	r2, [sp, #8]
+	ldr	r3, .L1762+32
+	ldr	r1, [sp, #36]
+	add	r3, r3, r2
+	ldr	r2, [sp, #16]
+	add	r0, r0, r3, lsl #9
+	b	.L1751
+.L1763:
+	.align	2
+.L1762:
+	.word	.LANCHOR179
+	.word	.LANCHOR0
+	.word	idb_buf+262144
+	.word	idb_buf+16388
+	.word	.LANCHOR105
+	.word	gp_flash_check_buf
+	.word	idb_buf
+	.word	.LC109
+	.word	8388544
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -13090,15 +13374,15 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	ldr	r8, .L1752+136
-	ldr	r5, .L1752
+	ldr	r8, .L1785+136
+	ldr	r5, .L1785
 	ldr	r3, [r8]
-	ldr	r4, .L1752+4
-	ldr	r10, .L1752+140
+	ldr	r4, .L1785+4
+	ldr	r10, .L1785+140
 	ldrh	r2, [r5]
-	ldr	r7, .L1752+8
+	ldr	r7, .L1785+8
 	str	r3, [r4, #8]
-	ldr	r6, .L1752+12
+	ldr	r6, .L1785+12
 	ldr	r3, [r10]
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
@@ -13108,41 +13392,41 @@ FtlLoadSysInfo:
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1732
-.L1740:
+	bne	.L1765
+.L1773:
 	mov	r0, #-1
-.L1731:
+.L1764:
 	add	sp, sp, #8
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1732:
+.L1765:
 	movs	r1, #1
 	mov	fp, r4
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L1752+16
+	ldr	r3, .L1785+16
 	sxth	r7, r0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1734:
+.L1767:
 	cmp	r7, #0
-	bge	.L1737
+	bge	.L1770
 	movw	r2, #1437
-	ldr	r1, .L1752+20
-	ldr	r0, .L1752+24
+	ldr	r1, .L1785+20
+	ldr	r0, .L1785+24
 	bl	printf
-.L1736:
-	ldr	r2, .L1752+28
+.L1769:
+	ldr	r2, .L1785+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1739
+	bcs	.L1772
 	movw	r2, #1439
-	ldr	r1, .L1752+20
-	ldr	r0, .L1752+24
+	ldr	r1, .L1785+20
+	ldr	r0, .L1785+24
 	bl	printf
-.L1739:
-	ldr	r7, .L1752+32
+.L1772:
+	ldr	r7, .L1785+32
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
@@ -13163,60 +13447,60 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1752+36
+	ldr	r3, .L1785+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
 	ldr	r2, [r7]
-	ldr	r3, .L1752+16
+	ldr	r3, .L1785+16
 	cmp	r2, r3
-	bne	.L1740
-	ldr	r3, .L1752+40
+	bne	.L1773
+	ldr	r3, .L1785+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	ldrh	r5, [r7, #8]
 	ldrh	r3, [r3]
 	strh	r5, [r6, #6]	@ movhi
 	cmp	r2, r3
-	bne	.L1740
-	ldr	r3, .L1752+44
-	ldr	r2, .L1752+48
+	bne	.L1773
+	ldr	r3, .L1785+44
+	ldr	r2, .L1785+48
 	str	r5, [r3]
-	ldr	r3, .L1752+52
+	ldr	r3, .L1785+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	ldr	r2, .L1752+56
+	ldr	r2, .L1785+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1752+60
+	ldr	r2, .L1785+60
 	str	r3, [r2]
-	ldr	r3, .L1752+64
+	ldr	r3, .L1785+64
 	ldr	r6, [r3]
-	ldr	r3, .L1752+68
+	ldr	r3, .L1785+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1752+72
+	ldr	r3, .L1785+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L1752+76
+	ldr	r3, .L1785+76
 	cmp	r5, r6
 	strh	r0, [r3]	@ movhi
-	bls	.L1741
+	bls	.L1774
 	movw	r2, #1461
-	ldr	r1, .L1752+20
-	ldr	r0, .L1752+24
+	ldr	r1, .L1785+20
+	ldr	r0, .L1785+24
 	bl	printf
-.L1741:
+.L1774:
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L1752+80
+	ldr	r3, .L1785+80
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L1752+84
+	ldr	r7, .L1785+84
 	lsrs	r1, r2, #6
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L1752+88
+	ldr	r1, .L1785+88
 	strb	r2, [r3, #8]
 	ldrh	r2, [r4, #18]
 	strh	ip, [r3]	@ movhi
@@ -13235,7 +13519,7 @@ FtlLoadSysInfo:
 	strh	r5, [r1, #2]	@ movhi
 	ldrh	r5, [r4, #22]
 	strb	r2, [r1, #8]
-	ldr	r2, .L1752+92
+	ldr	r2, .L1785+92
 	strh	r5, [r2]	@ movhi
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
@@ -13245,31 +13529,31 @@ FtlLoadSysInfo:
 	strh	r6, [r2, #2]	@ movhi
 	ldr	r6, [r4, #32]
 	strb	r5, [r2, #8]
-	ldr	r5, .L1752+96
+	ldr	r5, .L1785+96
 	str	r3, [r5]
-	ldr	r5, .L1752+100
+	ldr	r5, .L1785+100
 	str	r3, [r5]
-	ldr	r5, .L1752+104
+	ldr	r5, .L1785+104
 	str	r3, [r5]
-	ldr	r5, .L1752+108
+	ldr	r5, .L1785+108
 	str	r3, [r5]
-	ldr	r5, .L1752+112
+	ldr	r5, .L1785+112
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L1752+116
+	ldr	r5, .L1785+116
 	str	r3, [r5]
-	ldr	r5, .L1752+120
+	ldr	r5, .L1785+120
 	str	r3, [r5]
-	ldr	r5, .L1752+124
+	ldr	r5, .L1785+124
 	ldr	lr, [r4, #40]
 	str	r3, [r5]
-	ldr	r3, .L1752+128
+	ldr	r3, .L1785+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L1752+132
+	ldr	r3, .L1785+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -13277,34 +13561,34 @@ FtlLoadSysInfo:
 	strhi	r2, [r3]
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1744
-	ldr	r0, .L1752+80
+	beq	.L1777
+	ldr	r0, .L1785+80
 	bl	make_superblock
-.L1744:
+.L1777:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1745
-	ldr	r0, .L1752+88
+	beq	.L1778
+	ldr	r0, .L1785+88
 	bl	make_superblock
-.L1745:
+.L1778:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1746
-	ldr	r0, .L1752+92
+	beq	.L1779
+	ldr	r0, .L1785+92
 	bl	make_superblock
-.L1746:
+.L1779:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1747
-	ldr	r0, .L1752+84
+	beq	.L1780
+	ldr	r0, .L1785+84
 	bl	make_superblock
-.L1747:
+.L1780:
 	movs	r0, #0
-	b	.L1731
-.L1737:
+	b	.L1764
+.L1770:
 	ldrh	r2, [r6]
 	mov	r0, fp
 	str	r3, [sp, #4]
@@ -13318,35 +13602,35 @@ FtlLoadSysInfo:
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1735
+	beq	.L1768
 	ldr	r2, [r8]
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1735
+	bne	.L1768
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1736
-.L1735:
+	beq	.L1769
+.L1768:
 	subs	r7, r7, #1
 	sxth	r7, r7
-	b	.L1734
-.L1753:
+	b	.L1767
+.L1786:
 	.align	2
-.L1752:
+.L1785:
 	.word	.LANCHOR5
 	.word	.LANCHOR106
 	.word	.LANCHOR42
 	.word	.LANCHOR79
 	.word	1179929683
-	.word	.LANCHOR179
+	.word	.LANCHOR180
 	.word	.LC1
 	.word	.LANCHOR23
 	.word	.LANCHOR39
 	.word	.LANCHOR1
 	.word	.LANCHOR10
-	.word	.LANCHOR180
+	.word	.LANCHOR181
 	.word	.LANCHOR61
 	.word	.LANCHOR19
 	.word	.LANCHOR12
@@ -13385,27 +13669,27 @@ FtlSysBlkInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #0
-	ldr	r6, .L1769
+	ldr	r6, .L1802
 	strh	r3, [r6]	@ movhi
-	ldr	r3, .L1769+4
+	ldr	r3, .L1802+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1769+8
+	ldr	r3, .L1802+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1755
-.L1757:
+	bne	.L1788
+.L1790:
 	mov	r7, #-1
-.L1754:
+.L1787:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1755:
+.L1788:
 	bl	FtlLoadSysInfo
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1757
+	bne	.L1790
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -13415,40 +13699,40 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1769+12
+	ldr	r3, .L1802+12
 	movs	r0, #12
 	ldrh	r1, [r3]
-	ldr	r3, .L1769+16
+	ldr	r3, .L1802+16
 	ldr	r2, [r3]
 	mov	r3, r7
-.L1758:
+.L1791:
 	cmp	r3, r1
-	bge	.L1763
+	bge	.L1796
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1759
-.L1763:
-	ldr	r4, .L1769+20
+	bge	.L1792
+.L1796:
+	ldr	r4, .L1802+20
 	cmp	r3, r1
-	ldr	r5, .L1769+24
+	ldr	r5, .L1802+24
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
-	bge	.L1767
-.L1760:
-	ldr	r6, .L1769+28
-	ldr	r0, .L1769+24
+	bge	.L1800
+.L1793:
+	ldr	r6, .L1802+28
+	ldr	r0, .L1802+24
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1769+32
+	ldr	r3, .L1802+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	ldr	r0, .L1769+36
+	ldr	r0, .L1802+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	ldrh	ip, [r6]
 	ldrh	r3, [r0]
@@ -13461,54 +13745,54 @@ FtlSysBlkInit:
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
 	ldrh	r2, [r0]
-	ldr	r0, .L1769+40
+	ldr	r0, .L1802+40
 	strb	r3, [r6, #6]
 	strh	r2, [r6, #2]	@ movhi
 	strh	r3, [r6, #4]	@ movhi
 	bl	FtlMapBlkWriteDump_data
-	ldr	r0, .L1769+44
+	ldr	r0, .L1802+44
 	bl	FtlMapBlkWriteDump_data
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1768:
+.L1801:
 	bl	FtlVpcTblFlush
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1766
+	beq	.L1799
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1766
-	ldr	r5, .L1769+28
+	cbnz	r3, .L1799
+	ldr	r5, .L1802+28
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1766
+	cbnz	r3, .L1799
 	bl	FtlGcRefreshBlock
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-	ldr	r0, .L1769+24
+	ldr	r0, .L1802+24
 	bl	allocate_new_data_superblock
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L1766:
+.L1799:
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1754
+	bne	.L1787
 	bl	FtlVpcCheckAndModify
-	b	.L1754
-.L1759:
+	b	.L1787
+.L1792:
 	adds	r3, r3, #1
-	b	.L1758
-.L1767:
+	b	.L1791
+.L1800:
 	ldrh	r3, [r6]
 	cmp	r3, #0
-	bne	.L1760
+	bne	.L1793
 	bl	l2p_flush
-	b	.L1768
-.L1770:
+	b	.L1801
+.L1803:
 	.align	2
-.L1769:
+.L1802:
 	.word	.LANCHOR161
 	.word	.LANCHOR4
 	.word	.LANCHOR79
@@ -13535,62 +13819,62 @@ ftl_low_format:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1795
-	ldr	r2, .L1795+4
-	ldr	r5, .L1795+8
+	ldr	r6, .L1828
+	ldr	r2, .L1828+4
+	ldr	r5, .L1828+8
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1772
+	cbz	r0, .L1805
 	bl	FtlMakeBbt
-.L1772:
-	ldr	r3, .L1795+12
-	ldr	r2, .L1795+16
-	ldr	ip, .L1795+100
+.L1805:
+	ldr	r3, .L1828+12
+	ldr	r2, .L1828+16
+	ldr	ip, .L1828+100
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L1795+20
+	ldr	r2, .L1828+20
 	str	r3, [sp, #4]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1773:
+.L1806:
 	uxth	r3, r2
 	adds	r2, r2, #1
 	cmp	r3, r1
-	blt	.L1774
-	ldr	r3, .L1795+24
+	blt	.L1807
+	ldr	r3, .L1828+24
 	movs	r7, #0
-	ldr	r10, .L1795+104
+	ldr	r10, .L1828+104
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	fp, r10
-.L1775:
+.L1808:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1776
-	ldr	r4, .L1795+28
+	bhi	.L1809
+	ldr	r4, .L1828+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1777
-.L1781:
+	bgt	.L1810
+.L1814:
 	movs	r6, #0
 	mov	r7, r6
-.L1778:
+.L1811:
 	ldrh	r3, [r8]
 	uxth	r0, r6
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1782
+	bhi	.L1815
 	ldrh	r2, [fp]
-	ldr	r3, .L1795+32
+	ldr	r3, .L1828+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1795+36
+	ldr	r6, .L1828+36
 	str	r2, [r3]
-	ldr	r3, .L1795+40
+	ldr	r3, .L1828+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
@@ -13600,13 +13884,13 @@ ftl_low_format:
 	mov	r3, r0
 	str	r0, [r6]
 	add	r1, r10, #36
-	ldr	r0, .L1795+44
+	ldr	r0, .L1828+44
 	strh	r1, [r0]	@ movhi
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1783
+	ble	.L1816
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
@@ -13618,11 +13902,11 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1783:
-	ldr	r2, .L1795+48
+.L1816:
+	ldr	r2, .L1828+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1785
-	ldr	r1, .L1795+44
+	cbz	r2, .L1818
+	ldr	r1, .L1828+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -13633,24 +13917,24 @@ ftl_low_format:
 	strlt	r3, [r6]
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1785:
+.L1818:
 	ldr	r3, [sp]
-	ldr	r7, .L1795+52
-	ldr	r10, .L1795+108
+	ldr	r7, .L1828+52
+	ldr	r10, .L1828+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L1795+56
+	ldr	r3, .L1828+56
 	ldrh	r3, [r3]
 	str	r4, [r7]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
 	str	r4, [r6]
-	ldr	r6, .L1795+60
+	ldr	r6, .L1828+60
 	muls	r4, r3, r4
-	ldr	r3, .L1795+64
+	ldr	r3, .L1828+64
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
@@ -13659,13 +13943,13 @@ ftl_low_format:
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-	ldr	r2, .L1795+68
+	ldr	r2, .L1828+68
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r6, #6]
 	str	r3, [r2]
-	ldr	r2, .L1795+72
+	ldr	r2, .L1828+72
 	strh	r3, [r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -13676,30 +13960,30 @@ ftl_low_format:
 	mov	r8, r10
 	strb	r3, [r6, #8]
 	mov	r10, r6
-	ldr	r3, .L1795+76
+	ldr	r3, .L1828+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L1787:
+.L1820:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1788
+	bne	.L1821
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	b	.L1787
-.L1774:
+	b	.L1820
+.L1807:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	str	ip, [r7, r3, lsl #2]
-	b	.L1773
-.L1776:
+	b	.L1806
+.L1809:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -13707,11 +13991,11 @@ ftl_low_format:
 	add	r7, r7, r0
 	uxth	r7, r7
 	uxth	r4, r4
-	b	.L1775
-.L1777:
+	b	.L1808
+.L1810:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L1795+80
+	ldr	r3, .L1828+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -13719,26 +14003,26 @@ ftl_low_format:
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	r6, [r8]
-.L1779:
+.L1812:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1781
+	bls	.L1814
 	mov	r0, r6
 	movs	r1, #1
 	adds	r6, r6, #1
 	bl	FtlLowFormatEraseBlock
 	uxth	r6, r6
-	b	.L1779
-.L1782:
+	b	.L1812
+.L1815:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
 	add	r7, r7, r0
 	uxth	r7, r7
-	b	.L1778
-.L1788:
+	b	.L1811
+.L1821:
 	ldr	r3, [r5]
 	ldrh	r1, [r6, #4]
-	ldr	r4, .L1795+84
+	ldr	r4, .L1828+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -13754,19 +14038,19 @@ ftl_low_format:
 	strh	r3, [r4]	@ movhi
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1789:
+.L1822:
 	mov	r0, r10
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1790
+	cbnz	r3, .L1823
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L1789
-.L1790:
+	b	.L1822
+.L1823:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
 	str	r3, [r4, #12]
@@ -13775,10 +14059,10 @@ ftl_low_format:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1795+88
+	ldr	r3, .L1828+88
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L1795+92
+	ldr	r3, .L1828+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r7]
@@ -13791,18 +14075,18 @@ ftl_low_format:
 	str	r2, [r5]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1791
-	ldr	r3, .L1795+96
+	cbnz	r0, .L1824
+	ldr	r3, .L1828+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1791:
+.L1824:
 	movs	r0, #0
 	add	sp, sp, #16
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1796:
+.L1829:
 	.align	2
-.L1795:
+.L1828:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -13816,7 +14100,7 @@ ftl_low_format:
 	.word	.LANCHOR7
 	.word	.LANCHOR78
 	.word	.LANCHOR15
-	.word	.LANCHOR180
+	.word	.LANCHOR181
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
@@ -13845,41 +14129,41 @@ sftl_init:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	mov	r3, #-1
-	ldr	r4, .L1803
-	ldr	r1, .L1803+4
-	ldr	r0, .L1803+8
+	ldr	r4, .L1836
+	ldr	r1, .L1836+4
+	ldr	r0, .L1836+8
 	str	r3, [r4]
 	bl	printf
-	ldr	r0, .L1803+12
+	ldr	r0, .L1836+12
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1803+16
+	ldr	r3, .L1836+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	r0, .L1801
+	cbnz	r0, .L1834
 	bl	FtlSysBlkInit
-	cbnz	r0, .L1801
+	cbnz	r0, .L1834
 	movs	r3, #1
 	str	r3, [r4]
-	ldr	r3, .L1803+20
+	ldr	r3, .L1836+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1801
+	bhi	.L1834
 	movw	r4, #8129
-.L1800:
+.L1833:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1800
-.L1801:
+	bne	.L1833
+.L1834:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1804:
+.L1837:
 	.align	2
-.L1803:
+.L1836:
 	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
@@ -14383,7 +14667,7 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -14808,6 +15092,12 @@ gc_ink_free_return_value:
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
 	.space	4
+	.section	.bss.gp_flash_check_buf,"aw",%nobits
+	.align	2
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.space	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
 	.set	.LANCHOR90,. + 0
@@ -14820,6 +15110,19 @@ gp_gc_page_buf_info:
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
+	.space	4
+	.section	.bss.idb_buf,"aw",%nobits
+	.align	2
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.space	262144
+	.section	.bss.idb_need_write_back,"aw",%nobits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
 	.space	4
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
@@ -15303,210 +15606,210 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10051,"a",%progbits
+	.section	.rodata.__func__.10016,"a",%progbits
+	.set	.LANCHOR171,. + 0
+	.type	__func__.10016, %object
+	.size	__func__.10016, 19
+__func__.10016:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.10122,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10051, %object
-	.size	__func__.10051, 23
-__func__.10051:
+	.type	__func__.10122, %object
+	.size	__func__.10122, 23
+__func__.10122:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10318,"a",%progbits
+	.section	.rodata.__func__.10389,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10318, %object
-	.size	__func__.10318, 15
-__func__.10318:
+	.type	__func__.10389, %object
+	.size	__func__.10389, 15
+__func__.10389:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10335,"a",%progbits
+	.section	.rodata.__func__.10406,"a",%progbits
 	.set	.LANCHOR109,. + 0
-	.type	__func__.10335, %object
-	.size	__func__.10335, 15
-__func__.10335:
+	.type	__func__.10406, %object
+	.size	__func__.10406, 15
+__func__.10406:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8797,"a",%progbits
+	.section	.rodata.__func__.8796,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8797, %object
-	.size	__func__.8797, 11
-__func__.8797:
+	.type	__func__.8796, %object
+	.size	__func__.8796, 11
+__func__.8796:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8921,"a",%progbits
+	.section	.rodata.__func__.8920,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.8921, %object
-	.size	__func__.8921, 13
-__func__.8921:
+	.type	__func__.8920, %object
+	.size	__func__.8920, 13
+__func__.8920:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8949,"a",%progbits
+	.section	.rodata.__func__.8948,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.8949, %object
-	.size	__func__.8949, 9
-__func__.8949:
+	.type	__func__.8948, %object
+	.size	__func__.8948, 9
+__func__.8948:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9023,"a",%progbits
+	.section	.rodata.__func__.9094,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9023, %object
-	.size	__func__.9023, 14
-__func__.9023:
+	.type	__func__.9094, %object
+	.size	__func__.9094, 14
+__func__.9094:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9066,"a",%progbits
+	.section	.rodata.__func__.9137,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9066, %object
-	.size	__func__.9066, 11
-__func__.9066:
+	.type	__func__.9137, %object
+	.size	__func__.9137, 11
+__func__.9137:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9183,"a",%progbits
+	.section	.rodata.__func__.9254,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9183, %object
-	.size	__func__.9183, 17
-__func__.9183:
+	.type	__func__.9254, %object
+	.size	__func__.9254, 17
+__func__.9254:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9188,"a",%progbits
+	.section	.rodata.__func__.9259,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9188, %object
-	.size	__func__.9188, 17
-__func__.9188:
+	.type	__func__.9259, %object
+	.size	__func__.9259, 17
+__func__.9259:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9219,"a",%progbits
+	.section	.rodata.__func__.9290,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9219, %object
-	.size	__func__.9219, 17
-__func__.9219:
+	.type	__func__.9290, %object
+	.size	__func__.9290, 17
+__func__.9290:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9251,"a",%progbits
+	.section	.rodata.__func__.9322,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9251, %object
-	.size	__func__.9251, 22
-__func__.9251:
+	.type	__func__.9322, %object
+	.size	__func__.9322, 22
+__func__.9322:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9260,"a",%progbits
+	.section	.rodata.__func__.9331,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9260, %object
-	.size	__func__.9260, 16
-__func__.9260:
+	.type	__func__.9331, %object
+	.size	__func__.9331, 16
+__func__.9331:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9293,"a",%progbits
+	.section	.rodata.__func__.9364,"a",%progbits
 	.set	.LANCHOR116,. + 0
-	.type	__func__.9293, %object
-	.size	__func__.9293, 26
-__func__.9293:
+	.type	__func__.9364, %object
+	.size	__func__.9364, 26
+__func__.9364:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9304,"a",%progbits
+	.section	.rodata.__func__.9375,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9304, %object
-	.size	__func__.9304, 15
-__func__.9304:
+	.type	__func__.9375, %object
+	.size	__func__.9375, 15
+__func__.9375:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9318,"a",%progbits
+	.section	.rodata.__func__.9389,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9318, %object
-	.size	__func__.9318, 31
-__func__.9318:
+	.type	__func__.9389, %object
+	.size	__func__.9389, 31
+__func__.9389:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9332,"a",%progbits
+	.section	.rodata.__func__.9403,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.9332, %object
-	.size	__func__.9332, 16
-__func__.9332:
+	.type	__func__.9403, %object
+	.size	__func__.9403, 16
+__func__.9403:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9357,"a",%progbits
+	.section	.rodata.__func__.9428,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9357, %object
-	.size	__func__.9357, 22
-__func__.9357:
+	.type	__func__.9428, %object
+	.size	__func__.9428, 22
+__func__.9428:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9374,"a",%progbits
+	.section	.rodata.__func__.9445,"a",%progbits
 	.set	.LANCHOR145,. + 0
-	.type	__func__.9374, %object
-	.size	__func__.9374, 9
-__func__.9374:
+	.type	__func__.9445, %object
+	.size	__func__.9445, 9
+__func__.9445:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9447,"a",%progbits
+	.section	.rodata.__func__.9518,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9447, %object
-	.size	__func__.9447, 15
-__func__.9447:
+	.type	__func__.9518, %object
+	.size	__func__.9518, 15
+__func__.9518:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9469,"a",%progbits
+	.section	.rodata.__func__.9540,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9469, %object
-	.size	__func__.9469, 14
-__func__.9469:
+	.type	__func__.9540, %object
+	.size	__func__.9540, 14
+__func__.9540:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9526,"a",%progbits
-	.set	.LANCHOR179,. + 0
-	.type	__func__.9526, %object
-	.size	__func__.9526, 15
-__func__.9526:
+	.section	.rodata.__func__.9597,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.9597, %object
+	.size	__func__.9597, 15
+__func__.9597:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9589,"a",%progbits
+	.section	.rodata.__func__.9660,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9589, %object
-	.size	__func__.9589, 16
-__func__.9589:
+	.type	__func__.9660, %object
+	.size	__func__.9660, 16
+__func__.9660:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9623,"a",%progbits
+	.section	.rodata.__func__.9694,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9623, %object
-	.size	__func__.9623, 22
-__func__.9623:
+	.type	__func__.9694, %object
+	.size	__func__.9694, 22
+__func__.9694:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9680,"a",%progbits
+	.section	.rodata.__func__.9751,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9680, %object
-	.size	__func__.9680, 16
-__func__.9680:
+	.type	__func__.9751, %object
+	.size	__func__.9751, 16
+__func__.9751:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9701,"a",%progbits
+	.section	.rodata.__func__.9772,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9701, %object
-	.size	__func__.9701, 18
-__func__.9701:
+	.type	__func__.9772, %object
+	.size	__func__.9772, 18
+__func__.9772:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9726,"a",%progbits
+	.section	.rodata.__func__.9797,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9726, %object
-	.size	__func__.9726, 21
-__func__.9726:
+	.type	__func__.9797, %object
+	.size	__func__.9797, 21
+__func__.9797:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9742,"a",%progbits
+	.section	.rodata.__func__.9813,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9742, %object
-	.size	__func__.9742, 14
-__func__.9742:
+	.type	__func__.9813, %object
+	.size	__func__.9813, 14
+__func__.9813:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9827,"a",%progbits
+	.section	.rodata.__func__.9898,"a",%progbits
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9827, %object
-	.size	__func__.9827, 25
-__func__.9827:
+	.type	__func__.9898, %object
+	.size	__func__.9898, 25
+__func__.9898:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9848,"a",%progbits
+	.section	.rodata.__func__.9919,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.9848, %object
-	.size	__func__.9848, 29
-__func__.9848:
+	.type	__func__.9919, %object
+	.size	__func__.9919, 29
+__func__.9919:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9855,"a",%progbits
+	.section	.rodata.__func__.9926,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9855, %object
-	.size	__func__.9855, 19
-__func__.9855:
+	.type	__func__.9926, %object
+	.size	__func__.9926, 19
+__func__.9926:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9868,"a",%progbits
+	.section	.rodata.__func__.9939,"a",%progbits
 	.set	.LANCHOR158,. + 0
-	.type	__func__.9868, %object
-	.size	__func__.9868, 16
-__func__.9868:
+	.type	__func__.9939, %object
+	.size	__func__.9939, 16
+__func__.9939:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9875,"a",%progbits
+	.section	.rodata.__func__.9946,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9875, %object
-	.size	__func__.9875, 20
-__func__.9875:
+	.type	__func__.9946, %object
+	.size	__func__.9946, 20
+__func__.9946:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9945,"a",%progbits
-	.set	.LANCHOR171,. + 0
-	.type	__func__.9945, %object
-	.size	__func__.9945, 19
-__func__.9945:
-	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC101:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
@@ -15552,4 +15855,7 @@ __func__.9945:
 	.ascii	"SFTL version: 5.0.44 20180713\000"
 .LC71:
 	.ascii	"%s\012\000"
+	.section	.rodata.sftl_write.str1.1,"aMS",%progbits,1
+.LC109:
+	.ascii	"write_idblock fail! %x %x %x %x\012\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 087e6f9c3a..4211de05f7 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-21
+ * date: 2018-08-02
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -11494,11 +11494,287 @@ FtlWrite:
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-	mov	x3, x2
-	mov	w2, w1
-	mov	w1, w0
+	stp	x29, x30, [sp, -240]!
+	add	w4, w0, w1
+	sub	w5, w4, #1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	cmp	w5, 63
+	stp	x21, x22, [sp, 32]
+	mov	w20, w0
+	stp	x23, x24, [sp, 48]
+	mov	w22, w1
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	stp	x27, x28, [sp, 80]
+	adrp	x25, .LANCHOR179
+	bls	.L1568
+	cmp	w0, 576
+	bls	.L1569
+.L1568:
+	ldr	w0, [x25, #:lo12:.LANCHOR179]
+	cbz	w0, .L1570
+	adrp	x2, .LANCHOR0
+	add	x1, x2, :lo12:.LANCHOR0
+	mov	w21, 512
+	adrp	x3, idb_buf
+	mov	x4, -49148
+	stp	x3, x2, [x29, 144]
+	ldrh	w0, [x1, 14]
+	add	x2, x3, :lo12:idb_buf
+	ldrh	w1, [x1, 10]
+	mov	x7, 262140
+	str	w0, [x29, 172]
+	and	w0, w0, 255
+	mov	w5, 4097
+	movk	x4, 0xfffc, lsl 16
+	mul	w0, w0, w1
+	mov	x1, 0
+	and	w0, w0, 65535
+	str	w0, [x29, 168]
+	udiv	w21, w21, w0
+	mov	w0, 0
+.L1574:
+	add	x3, x1, x7
+	ldr	w6, [x3, x2]
+	cbz	w6, .L1571
+.L1575:
+	ldr	w0, [x29, 168]
+	mov	w19, 0
+	mov	w26, 0
+	mul	w0, w0, w21
+	stp	w0, wzr, [x29, 160]
+	adrp	x0, .LANCHOR105
+	add	x23, x0, :lo12:.LANCHOR105
+.L1572:
+	adrp	x5, gp_flash_check_buf
+	mov	x2, 512
+	mov	w1, 0
+	add	x0, x5, :lo12:gp_flash_check_buf
+	str	x5, [x29, 136]
+	bl	memset
+	ldr	x0, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR0
+	ldrh	w3, [x0, 14]
+	ldrh	w2, [x0, 10]
+	adrp	x0, .LANCHOR105
+	and	w27, w3, 255
+	add	x4, x0, :lo12:.LANCHOR105
+	str	w3, [x29, 120]
+	mov	w0, 0
+	udiv	w1, w19, w3
+	str	x4, [x29, 112]
+	mul	w2, w27, w2
+	ldr	x6, [x4, 8]
+	str	w27, [x29, 128]
+	and	w28, w2, 65535
+	blr	x6
+	cmp	w28, 511
+	ldr	w3, [x29, 120]
+	ldr	x4, [x29, 112]
+	bhi	.L1576
+	add	w1, w28, w19
+	ldr	x4, [x4, 8]
+	mov	w0, 0
+	udiv	w1, w1, w3
+	blr	x4
+.L1576:
+	udiv	w5, w19, w28
+	ldr	x0, [x29, 144]
+	mov	w4, 0
+	mov	w7, 61424
+	add	x8, x0, :lo12:idb_buf
+	msub	w5, w5, w28, w19
+	sub	w6, w19, w5
+.L1577:
+	cmp	w4, 511
+	bls	.L1578
+	ldr	x0, [x29, 152]
+	mov	w27, 0
+	add	x0, x0, :lo12:.LANCHOR0
+	ldrh	w4, [x0, 14]
+	ldrh	w5, [x0, 10]
+	and	w28, w4, 255
+	mov	w4, w28
+	mul	w5, w28, w5
+	and	w0, w5, 65535
+	udiv	w5, w19, w0
+	msub	w5, w5, w0, w19
+	and	w1, w5, 65535
+	sub	w6, w19, w5
+	sdiv	w0, w1, w28
+	msub	w0, w0, w28, w1
+	ldr	x1, [x29, 136]
+	and	w0, w0, 65535
+	add	x8, x1, :lo12:gp_flash_check_buf
+.L1579:
+	cmp	w27, 511
+	bhi	.L1583
+	add	w1, w5, w27
+	sub	w7, w4, w0
+	add	w0, w0, w6
+	ldr	x10, [x23, 24]
+	and	w7, w7, 65535
+	ubfiz	x2, x27, 9, 16
+	udiv	w1, w1, w28
+	add	x2, x8, x2
+	stp	w4, w7, [x29, 104]
+	add	x3, x29, 176
+	str	w5, [x29, 112]
+	str	w6, [x29, 120]
+	and	w1, w1, 65535
+	str	x8, [x29, 128]
+	madd	w1, w1, w28, w0
+	mov	w0, 0
+	udiv	w1, w1, w28
+	blr	x10
+	cmn	w0, #1
+	ldp	w4, w7, [x29, 104]
+	ldr	w5, [x29, 112]
+	ldr	w6, [x29, 120]
+	ldr	x8, [x29, 128]
+	bne	.L1580
+.L1583:
+	ldr	x0, [x29, 144]
+	mov	x27, 0
+	add	x1, x0, :lo12:idb_buf
+	ldr	x0, [x29, 136]
+	add	x28, x0, :lo12:gp_flash_check_buf
+.L1581:
+	lsl	x0, x27, 2
+	add	x3, x0, x1
+	ldr	w2, [x0, x28]
+	ldr	w0, [x0, x1]
+	cmp	w2, w0
+	beq	.L1584
+	mov	x2, 512
+	mov	w1, 0
+	str	x3, [x29, 128]
+	mov	x0, x28
+	str	w27, [x29, 136]
+	bl	memset
+	ldr	w5, [x29, 136]
+	mov	w4, w27
+	ldr	x3, [x29, 128]
+	mov	w1, w19
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
+	ldr	w2, [x28, w5, uxtw 2]
+	ldr	w3, [x3]
+	bl	printf
+	ldr	w0, [x29, 172]
+	ldr	x2, [x23, 8]
+	udiv	w1, w19, w0
+	mov	w0, 0
+	blr	x2
+	cmp	w21, 1
+	bls	.L1585
+	ldr	w0, [x29, 168]
+	ldr	x2, [x23, 8]
+	add	w1, w0, w19
+	ldr	w0, [x29, 172]
+	udiv	w1, w1, w0
+	mov	w0, 0
+	blr	x2
+.L1585:
+	ldr	w0, [x29, 160]
+	add	w26, w26, w21
+	cmp	w26, 15
+	add	w19, w19, w0
+	bls	.L1572
+.L1590:
+	str	wzr, [x25, #:lo12:.LANCHOR179]
+.L1570:
+	mov	x3, x24
+	mov	w2, w22
+	mov	w1, w20
+	mov	w0, 0
+	bl	FtlWrite
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	ret
+.L1571:
+	ldr	w6, [x2, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w6, [x3, x2]
+	cmp	w0, w5
+	sub	x1, x1, #4
+	csel	w0, w0, wzr, cc
+	cmp	x1, x4
+	bne	.L1574
+	b	.L1575
+.L1578:
+	add	w0, w5, w4
+	ldr	x10, [x23, 16]
+	ubfiz	x2, x4, 9, 16
+	stp	w5, w7, [x29, 100]
+	add	x2, x8, x2
+	stp	w4, w6, [x29, 108]
+	udiv	w0, w0, w27
+	str	x8, [x29, 120]
+	add	x3, x29, 176
+	and	w0, w0, 65535
+	mul	w1, w0, w27
+	stp	w1, w7, [x29, 176]
+	udiv	w1, w6, w27
+	add	w1, w1, w0
 	mov	w0, 0
-	b	FtlWrite
+	blr	x10
+	ldp	w4, w6, [x29, 108]
+	ldr	w0, [x29, 128]
+	ldp	w5, w7, [x29, 100]
+	add	w4, w0, w4
+	and	w4, w4, 65535
+	ldr	x8, [x29, 120]
+	b	.L1577
+.L1580:
+	add	w27, w7, w27
+	mov	w0, 0
+	and	w27, w27, 65535
+	b	.L1579
+.L1584:
+	add	x27, x27, 1
+	cmp	x27, 65536
+	bne	.L1581
+	ldr	w0, [x29, 164]
+	add	w0, w0, 1
+	str	w0, [x29, 164]
+	cmp	w0, 5
+	bls	.L1585
+	b	.L1590
+.L1569:
+	cmp	w0, 63
+	adrp	x3, idb_buf
+	bhi	.L1587
+	mov	w1, 64
+	sub	w1, w1, w0
+	sub	w2, w22, w1
+	ubfiz	x1, x1, 9, 25
+	add	x1, x24, x1
+	add	x0, x3, :lo12:idb_buf
+.L1588:
+	mov	w3, 1
+	str	w3, [x25, #:lo12:.LANCHOR179]
+	cmp	w5, 576
+	bls	.L1589
+	sub	w2, w2, w4
+	sub	w2, w2, #447
+.L1589:
+	lsl	w2, w2, 9
+	bl	memcpy
+	b	.L1570
+.L1587:
+	lsl	w0, w0, 7
+	add	x3, x3, :lo12:idb_buf
+	sub	w0, w0, #8192
+	mov	x1, x2
+	add	x0, x3, x0, lsl 2
+	mov	w2, w22
+	b	.L1588
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -11531,10 +11807,10 @@ FtlLoadSysInfo:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1569
-.L1577:
+	bne	.L1601
+.L1609:
 	mov	w0, -1
-.L1568:
+.L1600:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11542,7 +11818,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1569:
+.L1601:
 	add	x27, x20, :lo12:.LANCHOR79
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
@@ -11552,28 +11828,28 @@ FtlLoadSysInfo:
 	strh	w0, [x27, 2]
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1571:
-	tbz	w22, #31, .L1574
-	adrp	x1, .LANCHOR179
+.L1603:
+	tbz	w22, #31, .L1606
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 1437
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1573:
+.L1605:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1576
-	adrp	x1, .LANCHOR179
+	bcs	.L1608
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 1439
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1576:
+.L1608:
 	add	x22, x19, :lo12:.LANCHOR106
 	adrp	x19, .LANCHOR39
 	add	x21, x19, :lo12:.LANCHOR39
@@ -11602,7 +11878,7 @@ FtlLoadSysInfo:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1577
+	bne	.L1609
 	add	x20, x20, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR10
 	ldrh	w1, [x21, 8]
@@ -11610,11 +11886,11 @@ FtlLoadSysInfo:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	strh	w1, [x20, 6]
 	cmp	w2, w0
-	bne	.L1577
-	adrp	x0, .LANCHOR180
+	bne	.L1609
+	adrp	x0, .LANCHOR181
 	adrp	x2, .LANCHOR61
 	adrp	x3, .LANCHOR3
-	str	w1, [x0, #:lo12:.LANCHOR180]
+	str	w1, [x0, #:lo12:.LANCHOR181]
 	adrp	x0, .LANCHOR19
 	ldrh	w3, [x3, #:lo12:.LANCHOR3]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
@@ -11635,14 +11911,14 @@ FtlLoadSysInfo:
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR78
 	strh	w0, [x3, #:lo12:.LANCHOR78]
-	bls	.L1578
-	adrp	x1, .LANCHOR179
+	bls	.L1610
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
 	mov	w2, 1461
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1578:
+.L1610:
 	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
@@ -11707,47 +11983,47 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR70
 	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L1579
+	bls	.L1611
 	str	w3, [x1, #:lo12:.LANCHOR70]
-.L1579:
+.L1611:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR71
 	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1580
+	bls	.L1612
 	str	w2, [x1, #:lo12:.LANCHOR71]
-.L1580:
+.L1612:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1581
+	beq	.L1613
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.L1581:
+.L1613:
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1582
+	beq	.L1614
 	bl	make_superblock
-.L1582:
+.L1614:
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1583
+	beq	.L1615
 	bl	make_superblock
-.L1583:
+.L1615:
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L1584
+	beq	.L1616
 	bl	make_superblock
-.L1584:
+.L1616:
 	mov	w0, 0
-	b	.L1568
-.L1574:
+	b	.L1600
+.L1606:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w2, 1
 	mov	w1, w2
@@ -11759,19 +12035,19 @@ FtlLoadSysInfo:
 	bl	FlashReadPages
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1572
+	beq	.L1604
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1572
+	bne	.L1604
 	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L1573
-.L1572:
+	beq	.L1605
+.L1604:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L1571
+	b	.L1603
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlSysBlkInit,"ax",@progbits
 	.align	2
@@ -11793,20 +12069,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1591
-.L1593:
+	bne	.L1623
+.L1625:
 	mov	w23, -1
-.L1590:
+.L1622:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1591:
+.L1623:
 	bl	FtlLoadSysInfo
 	mov	w23, w0
-	cbnz	w0, .L1593
+	cbnz	w0, .L1625
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -11822,12 +12098,12 @@ FtlSysBlkInit:
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
 	mov	w0, 0
 	add	x1, x1, 4
-.L1594:
+.L1626:
 	cmp	w0, w2
-	bge	.L1599
+	bge	.L1631
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1595
-.L1599:
+	tbz	w3, #31, .L1627
+.L1631:
 	adrp	x19, .LANCHOR39
 	add	x3, x19, :lo12:.LANCHOR39
 	cmp	w0, w2
@@ -11835,8 +12111,8 @@ FtlSysBlkInit:
 	ldrh	w1, [x3, 28]
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
-	bge	.L1603
-.L1596:
+	bge	.L1635
+.L1628:
 	add	x21, x22, :lo12:.LANCHOR51
 	adrp	x24, .LANCHOR52
 	mov	x0, x21
@@ -11879,19 +12155,19 @@ FtlSysBlkInit:
 	strh	w0, [x1, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1605:
+.L1637:
 	bl	FtlVpcTblFlush
 	add	x21, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L1602
+	beq	.L1634
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1602
+	cbnz	w1, .L1634
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1602
+	cbnz	w1, .L1634
 	bl	FtlGcRefreshBlock
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
@@ -11899,21 +12175,21 @@ FtlSysBlkInit:
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1602:
+.L1634:
 	add	x19, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1590
+	bne	.L1622
 	bl	FtlVpcCheckAndModify
-	b	.L1590
-.L1595:
+	b	.L1622
+.L1627:
 	add	w0, w0, 1
-	b	.L1594
-.L1603:
+	b	.L1626
+.L1635:
 	ldrh	w0, [x20, #:lo12:.LANCHOR161]
-	cbnz	w0, .L1596
+	cbnz	w0, .L1628
 	bl	l2p_flush
-	b	.L1605
+	b	.L1637
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -11934,9 +12210,9 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR70]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L1607
+	cbz	w0, .L1639
 	bl	FtlMakeBbt
-.L1607:
+.L1639:
 	adrp	x23, .LANCHOR12
 	adrp	x0, .LANCHOR115
 	mov	w6, 23752
@@ -11947,31 +12223,31 @@ ftl_low_format:
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR113]
 	mov	w0, 0
-.L1608:
+.L1640:
 	cmp	w0, w1
-	blt	.L1609
+	blt	.L1641
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
 	mov	w19, 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.L1610:
+.L1642:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1611
+	bhi	.L1643
 	adrp	x25, .LANCHOR3
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1612
-.L1616:
+	bgt	.L1644
+.L1648:
 	add	x26, x21, :lo12:.LANCHOR5
 	mov	w19, 0
 	mov	w24, 0
-.L1613:
+.L1645:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1617
+	bhi	.L1649
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
@@ -11988,37 +12264,37 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1618
+	ble	.L1650
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1618:
+.L1650:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1620
+	cbz	w1, .L1652
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1620
+	bge	.L1652
 	add	w1, w1, 32
 	str	w5, [x3, #:lo12:.LANCHOR61]
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1620:
+.L1652:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
-	adrp	x25, .LANCHOR180
+	adrp	x25, .LANCHOR181
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
 	adrp	x24, .LANCHOR42
 	sub	w0, w0, w1
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR180]
+	str	w0, [x25, #:lo12:.LANCHOR181]
 	mul	w0, w1, w0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	str	w0, [x3, #:lo12:.LANCHOR61]
@@ -12053,20 +12329,20 @@ ftl_low_format:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L1622:
+.L1654:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1623
+	cbnz	w1, .L1655
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1622
-.L1609:
+	b	.L1654
+.L1641:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -12074,8 +12350,8 @@ ftl_low_format:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L1608
-.L1611:
+	b	.L1640
+.L1643:
 	mov	w0, w25
 	mov	w1, 1
 	add	w25, w25, 1
@@ -12083,8 +12359,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w25, w25, 65535
 	and	w19, w19, 65535
-	b	.L1610
-.L1612:
+	b	.L1642
+.L1644:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
@@ -12094,17 +12370,17 @@ ftl_low_format:
 	add	x24, x22, :lo12:.LANCHOR6
 	bl	FtlFreeSysBlkQueueInit
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.L1614:
+.L1646:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1616
+	bls	.L1648
 	mov	w0, w19
 	add	w19, w19, 1
 	mov	w1, 1
 	and	w19, w19, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L1614
-.L1617:
+	b	.L1646
+.L1649:
 	mov	w0, w24
 	mov	w1, 0
 	add	w24, w24, 1
@@ -12112,8 +12388,8 @@ ftl_low_format:
 	add	w19, w19, w0
 	and	w24, w24, 65535
 	and	w19, w19, 65535
-	b	.L1613
-.L1623:
+	b	.L1645
+.L1655:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12133,20 +12409,20 @@ ftl_low_format:
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L1624:
+.L1656:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1625
+	cbnz	w1, .L1657
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L1624
-.L1625:
+	b	.L1656
+.L1657:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
@@ -12162,7 +12438,7 @@ ftl_low_format:
 	adrp	x2, .LANCHOR79
 	add	x1, x2, :lo12:.LANCHOR79
 	strh	w0, [x2, #:lo12:.LANCHOR79]
-	ldr	w0, [x25, #:lo12:.LANCHOR180]
+	ldr	w0, [x25, #:lo12:.LANCHOR181]
 	strh	w0, [x1, 6]
 	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
@@ -12172,11 +12448,11 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR70]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1626
+	cbnz	w0, .L1658
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1626:
+.L1658:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12210,23 +12486,23 @@ sftl_init:
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbnz	w0, .L1635
+	cbnz	w0, .L1667
 	bl	FtlSysBlkInit
-	cbnz	w0, .L1635
+	cbnz	w0, .L1667
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1635
+	bhi	.L1667
 	mov	w19, 8129
-.L1634:
+.L1666:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L1634
-.L1635:
+	bne	.L1666
+.L1667:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -12722,7 +12998,7 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -13147,6 +13423,12 @@ gc_ink_free_return_value:
 	.size	gp_ect_tbl_info, 8
 gp_ect_tbl_info:
 	.zero	8
+	.section	.bss.gp_flash_check_buf,"aw",@nobits
+	.align	3
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.zero	262144
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
 	.set	.LANCHOR90,. + 0
@@ -13160,6 +13442,19 @@ gp_gc_page_buf_info:
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
 	.zero	8
+	.section	.bss.idb_buf,"aw",@nobits
+	.align	3
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.zero	262144
+	.section	.bss.idb_need_write_back,"aw",@nobits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.zero	4
 	.section	.bss.p_blk_mode_table,"aw",@nobits
 	.align	3
 	.set	.LANCHOR1,. + 0
@@ -13640,243 +13935,243 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6058,"a",@progbits
+	.section	.rodata.__func__.6109,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6058, %object
-	.size	__func__.6058, 11
-__func__.6058:
+	.type	__func__.6109, %object
+	.size	__func__.6109, 11
+__func__.6109:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6182,"a",@progbits
+	.section	.rodata.__func__.6233,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6182, %object
-	.size	__func__.6182, 13
-__func__.6182:
+	.type	__func__.6233, %object
+	.size	__func__.6233, 13
+__func__.6233:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6210,"a",@progbits
+	.section	.rodata.__func__.6261,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6210, %object
-	.size	__func__.6210, 9
-__func__.6210:
+	.type	__func__.6261, %object
+	.size	__func__.6261, 9
+__func__.6261:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6284,"a",@progbits
+	.section	.rodata.__func__.6407,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6284, %object
-	.size	__func__.6284, 14
-__func__.6284:
+	.type	__func__.6407, %object
+	.size	__func__.6407, 14
+__func__.6407:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6327,"a",@progbits
+	.section	.rodata.__func__.6450,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.6327, %object
-	.size	__func__.6327, 11
-__func__.6327:
+	.type	__func__.6450, %object
+	.size	__func__.6450, 11
+__func__.6450:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6444,"a",@progbits
+	.section	.rodata.__func__.6567,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6444, %object
-	.size	__func__.6444, 17
-__func__.6444:
+	.type	__func__.6567, %object
+	.size	__func__.6567, 17
+__func__.6567:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6449,"a",@progbits
+	.section	.rodata.__func__.6572,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6449, %object
-	.size	__func__.6449, 17
-__func__.6449:
+	.type	__func__.6572, %object
+	.size	__func__.6572, 17
+__func__.6572:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6480,"a",@progbits
+	.section	.rodata.__func__.6603,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6480, %object
-	.size	__func__.6480, 17
-__func__.6480:
+	.type	__func__.6603, %object
+	.size	__func__.6603, 17
+__func__.6603:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6512,"a",@progbits
+	.section	.rodata.__func__.6635,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6512, %object
-	.size	__func__.6512, 22
-__func__.6512:
+	.type	__func__.6635, %object
+	.size	__func__.6635, 22
+__func__.6635:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6521,"a",@progbits
+	.section	.rodata.__func__.6644,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6521, %object
-	.size	__func__.6521, 16
-__func__.6521:
+	.type	__func__.6644, %object
+	.size	__func__.6644, 16
+__func__.6644:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6554,"a",@progbits
+	.section	.rodata.__func__.6677,"a",@progbits
 	.align	3
 	.set	.LANCHOR116,. + 0
-	.type	__func__.6554, %object
-	.size	__func__.6554, 26
-__func__.6554:
+	.type	__func__.6677, %object
+	.size	__func__.6677, 26
+__func__.6677:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6565,"a",@progbits
+	.section	.rodata.__func__.6688,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6565, %object
-	.size	__func__.6565, 15
-__func__.6565:
+	.type	__func__.6688, %object
+	.size	__func__.6688, 15
+__func__.6688:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6579,"a",@progbits
+	.section	.rodata.__func__.6702,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6579, %object
-	.size	__func__.6579, 31
-__func__.6579:
+	.type	__func__.6702, %object
+	.size	__func__.6702, 31
+__func__.6702:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6593,"a",@progbits
+	.section	.rodata.__func__.6716,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6593, %object
-	.size	__func__.6593, 16
-__func__.6593:
+	.type	__func__.6716, %object
+	.size	__func__.6716, 16
+__func__.6716:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6618,"a",@progbits
+	.section	.rodata.__func__.6741,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6618, %object
-	.size	__func__.6618, 22
-__func__.6618:
+	.type	__func__.6741, %object
+	.size	__func__.6741, 22
+__func__.6741:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6635,"a",@progbits
+	.section	.rodata.__func__.6758,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6635, %object
-	.size	__func__.6635, 9
-__func__.6635:
+	.type	__func__.6758, %object
+	.size	__func__.6758, 9
+__func__.6758:
 	.string	"log2phys"
-	.section	.rodata.__func__.6708,"a",@progbits
+	.section	.rodata.__func__.6831,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.6708, %object
-	.size	__func__.6708, 15
-__func__.6708:
+	.type	__func__.6831, %object
+	.size	__func__.6831, 15
+__func__.6831:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6730,"a",@progbits
+	.section	.rodata.__func__.6853,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6730, %object
-	.size	__func__.6730, 14
-__func__.6730:
+	.type	__func__.6853, %object
+	.size	__func__.6853, 14
+__func__.6853:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6787,"a",@progbits
+	.section	.rodata.__func__.6910,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.6787, %object
-	.size	__func__.6787, 15
-__func__.6787:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.6910, %object
+	.size	__func__.6910, 15
+__func__.6910:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6850,"a",@progbits
+	.section	.rodata.__func__.6973,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6850, %object
-	.size	__func__.6850, 16
-__func__.6850:
+	.type	__func__.6973, %object
+	.size	__func__.6973, 16
+__func__.6973:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6884,"a",@progbits
+	.section	.rodata.__func__.7007,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6884, %object
-	.size	__func__.6884, 22
-__func__.6884:
+	.type	__func__.7007, %object
+	.size	__func__.7007, 22
+__func__.7007:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6941,"a",@progbits
+	.section	.rodata.__func__.7064,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6941, %object
-	.size	__func__.6941, 16
-__func__.6941:
+	.type	__func__.7064, %object
+	.size	__func__.7064, 16
+__func__.7064:
 	.string	"make_superblock"
-	.section	.rodata.__func__.6962,"a",@progbits
+	.section	.rodata.__func__.7085,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.6962, %object
-	.size	__func__.6962, 18
-__func__.6962:
+	.type	__func__.7085, %object
+	.size	__func__.7085, 18
+__func__.7085:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.6987,"a",@progbits
+	.section	.rodata.__func__.7110,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.6987, %object
-	.size	__func__.6987, 21
-__func__.6987:
+	.type	__func__.7110, %object
+	.size	__func__.7110, 21
+__func__.7110:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7003,"a",@progbits
+	.section	.rodata.__func__.7126,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.7003, %object
-	.size	__func__.7003, 14
-__func__.7003:
+	.type	__func__.7126, %object
+	.size	__func__.7126, 14
+__func__.7126:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7088,"a",@progbits
+	.section	.rodata.__func__.7211,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.7088, %object
-	.size	__func__.7088, 25
-__func__.7088:
+	.type	__func__.7211, %object
+	.size	__func__.7211, 25
+__func__.7211:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7109,"a",@progbits
+	.section	.rodata.__func__.7232,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.7109, %object
-	.size	__func__.7109, 29
-__func__.7109:
+	.type	__func__.7232, %object
+	.size	__func__.7232, 29
+__func__.7232:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7116,"a",@progbits
+	.section	.rodata.__func__.7239,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7116, %object
-	.size	__func__.7116, 19
-__func__.7116:
+	.type	__func__.7239, %object
+	.size	__func__.7239, 19
+__func__.7239:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7129,"a",@progbits
+	.section	.rodata.__func__.7252,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7129, %object
-	.size	__func__.7129, 16
-__func__.7129:
+	.type	__func__.7252, %object
+	.size	__func__.7252, 16
+__func__.7252:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7136,"a",@progbits
+	.section	.rodata.__func__.7259,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7136, %object
-	.size	__func__.7136, 20
-__func__.7136:
+	.type	__func__.7259, %object
+	.size	__func__.7259, 20
+__func__.7259:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7206,"a",@progbits
+	.section	.rodata.__func__.7329,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.7206, %object
-	.size	__func__.7206, 19
-__func__.7206:
+	.type	__func__.7329, %object
+	.size	__func__.7329, 19
+__func__.7329:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7312,"a",@progbits
+	.section	.rodata.__func__.7435,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7312, %object
-	.size	__func__.7312, 23
-__func__.7312:
+	.type	__func__.7435, %object
+	.size	__func__.7435, 23
+__func__.7435:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7579,"a",@progbits
+	.section	.rodata.__func__.7702,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7579, %object
-	.size	__func__.7579, 15
-__func__.7579:
+	.type	__func__.7702, %object
+	.size	__func__.7702, 15
+__func__.7702:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7596,"a",@progbits
+	.section	.rodata.__func__.7719,"a",@progbits
 	.align	3
 	.set	.LANCHOR109,. + 0
-	.type	__func__.7596, %object
-	.size	__func__.7596, 15
-__func__.7596:
+	.type	__func__.7719, %object
+	.size	__func__.7719, 15
+__func__.7719:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC101:
@@ -13922,4 +14217,7 @@ __func__.7596:
 	.string	"SFTL version: 5.0.44 20180713"
 .LC71:
 	.string	"%s\n"
+	.section	.rodata.sftl_write.str1.1,"aMS",@progbits,1
+.LC109:
+	.string	"write_idblock fail! %x %x %x %x\n"
 	.hidden	free

commit b2a78faeb5940f1cb1d7351ca568a4b20a1cc6df
Author: chenfen <chenfen@rock-chips.com>
Date:   Tue Jul 31 17:59:43 2018 +0800

    rockchip: clock: rk3399: support 400KHZ output for emmc initialization.
    
    support 400KHz output for emmc initialization
    
    Change-Id: I4f2182981f587688c777f64c30d0eeb59f69b0ea
    Signed-off-by: chenfen <chenfen@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 4d76d66052..3ab48a0f17 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -758,7 +758,7 @@ static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id)
 		div = 2;
 		break;
 	case SCLK_EMMC:
-		con = readl(&cru->clksel_con[21]);
+		con = readl(&cru->clksel_con[22]);
 		div = 1;
 		break;
 	default:
@@ -813,12 +813,20 @@ static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru,
 
 		/* Select clk_emmc source from GPLL too */
 		src_clk_div = DIV_ROUND_UP(GPLL_HZ, set_rate);
-		assert(src_clk_div - 1 < 128);
-
-		rk_clrsetreg(&cru->clksel_con[22],
-			     CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
-			     CLK_EMMC_PLL_SEL_GPLL << CLK_EMMC_PLL_SHIFT |
-			     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
+		if (src_clk_div > 128) {
+			/* use 24MHz source for 400KHz clock */
+			src_clk_div = DIV_ROUND_UP(OSC_HZ, set_rate);
+			assert(src_clk_div - 1 < 128);
+			rk_clrsetreg(&cru->clksel_con[22],
+				     CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
+				     CLK_EMMC_PLL_SEL_24M << CLK_EMMC_PLL_SHIFT |
+				     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
+		} else {
+			rk_clrsetreg(&cru->clksel_con[22],
+				     CLK_EMMC_PLL_MASK | CLK_EMMC_DIV_CON_MASK,
+				     CLK_EMMC_PLL_SEL_GPLL << CLK_EMMC_PLL_SHIFT |
+				     (src_clk_div - 1) << CLK_EMMC_DIV_CON_SHIFT);
+		}
 		break;
 	default:
 		return -EINVAL;

commit 850fcf3e04de36b6347fb51bf9727f3f9ed0ccbd
Author: chenfen <chenfen@rock-chips.com>
Date:   Tue Jul 31 17:28:44 2018 +0800

    mmc: sdhci: config controller MMC_TIMING_MMC_HS
    
    If emmc driver config MMC_TIMING_MMC_HS, need config
    
    controller SDHCI_HOST_CONTROL2 register SDHCI_CTRL_UHS_SDR50.
    
    It will affect emmc phy work mode.
    
    Change-Id: Ib45f30eb6b70bde6f1beb4612ded17ee2b24b5fe
    Signed-off-by: chenfen <chenfen@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index f5ae3a6bdc..4d472b78b3 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -450,7 +450,8 @@ static void sdhci_set_uhs_signaling(struct sdhci_host *host)
 		ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
 	else if (timing == MMC_TIMING_UHS_SDR25)
 		ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
-	else if (timing == MMC_TIMING_UHS_SDR50)
+	else if ((timing == MMC_TIMING_UHS_SDR50) ||
+		(timing == MMC_TIMING_MMC_HS))
 		ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
 	else if ((timing == MMC_TIMING_UHS_DDR50) ||
 		 (timing == MMC_TIMING_MMC_DDR52))

commit cc0bf5ed98c1049466aae2214aeac8e9daedfcb4
Author: chenfen <chenfen@rock-chips.com>
Date:   Tue Jul 31 17:07:16 2018 +0800

    rockchip: emmc: rk3399: priority to use cru division.
    
    Priority to use cru division is better timing than use controller
    
    division.
    
    Change-Id: I8b7b9a9c99f09407f209fda8df6460136a3105e9
    Signed-off-by: chenfen <chenfen@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 8de9865ebd..63b5ddddfd 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -41,6 +41,7 @@ struct rockchip_sdhc {
 	struct sdhci_host host;
 	void *base;
 	struct rockchip_emmc_phy *phy;
+	struct clk emmc_clk;
 };
 
 #define PHYCTRL_CALDONE_MASK		0x1
@@ -66,7 +67,7 @@ static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
 
 	writel(RK_CLRSETBITS(7 << 4, 0), &phy->emmcphy_con[6]);
 	writel(RK_CLRSETBITS(1 << 11, 1 << 11), &phy->emmcphy_con[0]);
-	writel(RK_CLRSETBITS(0xf << 7, 4 << 7), &phy->emmcphy_con[0]);
+	writel(RK_CLRSETBITS(0xf << 7, 6 << 7), &phy->emmcphy_con[0]);
 
 	/*
 	 * According to the user manual, calpad calibration
@@ -122,6 +123,100 @@ static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)
 	writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]);
 }
 
+static int rk3399_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	unsigned int div, clk = 0, timeout;
+	unsigned int input_clk;
+	struct rockchip_sdhc *priv =
+			container_of(host, struct rockchip_sdhc, host);
+
+	/* Wait max 20 ms */
+	timeout = 200;
+	while (sdhci_readl(host, SDHCI_PRESENT_STATE) &
+			   (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
+		if (timeout == 0) {
+			printf("%s: Timeout to wait cmd & data inhibit\n",
+			       __func__);
+			return -EBUSY;
+		}
+
+		timeout--;
+		udelay(100);
+	}
+	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+	if (clock == 0)
+		return 0;
+
+	input_clk = clk_set_rate(&priv->emmc_clk, clock);
+	if (IS_ERR_VALUE(input_clk))
+		input_clk = host->max_clk;
+
+	if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
+		/*
+		 * Check if the Host Controller supports Programmable Clock
+		 * Mode.
+		 */
+		if (host->clk_mul) {
+			for (div = 1; div <= 1024; div++) {
+				if ((input_clk / div) <= clock)
+					break;
+			}
+
+			/*
+			 * Set Programmable Clock Mode in the Clock
+			 * Control register.
+			 */
+			clk = SDHCI_PROG_CLOCK_MODE;
+			div--;
+		} else {
+			/* Version 3.00 divisors must be a multiple of 2. */
+			if (input_clk <= clock) {
+				div = 1;
+			} else {
+				for (div = 2;
+				     div < SDHCI_MAX_DIV_SPEC_300;
+				     div += 2) {
+					if ((input_clk / div) <= clock)
+						break;
+				}
+			}
+			div >>= 1;
+		}
+	} else {
+		/* Version 2.00 divisors must be a power of 2. */
+		for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
+			if ((input_clk / div) <= clock)
+				break;
+		}
+		div >>= 1;
+	}
+
+	clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
+	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
+		<< SDHCI_DIVIDER_HI_SHIFT;
+	clk |= SDHCI_CLOCK_INT_EN;
+	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+	/* Wait max 20 ms */
+	timeout = 20;
+	while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
+		& SDHCI_CLOCK_INT_STABLE)) {
+		if (timeout == 0) {
+			printf("%s: Internal clock never stabilised.\n",
+			       __func__);
+			return -EBUSY;
+		}
+		timeout--;
+		udelay(1000);
+	}
+	clk |= SDHCI_CLOCK_CARD_EN;
+	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+	host->clock = clock;
+
+	return 0;
+}
+
 static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct rockchip_sdhc *priv =
@@ -132,7 +227,7 @@ static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (cycle_phy)
 		rk3399_emmc_phy_power_off(priv->phy);
 
-	sdhci_set_clock(host, clock);
+	rk3399_sdhci_set_clock(host, clock);
 
 	if (cycle_phy)
 		rk3399_emmc_phy_power_on(priv->phy, clock);
@@ -214,6 +309,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
 		printf("%s fail to get clk\n", __func__);
 	}
 
+	prv->emmc_clk = clk;
 	ret = arasan_get_phy(dev);
 	if (ret)
 		return ret;

commit cd67f373aa7dbe6b86cb2074d2522ce604ab55d7
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Sat Jul 21 21:18:18 2018 +0800

    drivers: rkflash: add vendor ops api for nand devices
    
    1.Add vendor ops api for nand devices;
    2.Remove unused headfile.
    3.Make rkflash block driver reachable by other devices
    
    Change-Id: I26129cb94382b0714b9c35f4dc6113ddb752251c
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index 6330c86e93..e8e3a8d16d 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -4,9 +4,10 @@
 # SPDX-License-Identifier:	GPL-2.0
 #
 
-obj-$(CONFIG_RKNANDC_NAND) += rksftl.o rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
-obj-$(CONFIG_RKSFC_NAND) += rksftl.o rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
-obj-$(CONFIG_RKSFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_api.o rkflash_debug.o sfc_nor.o sfc.o
+obj-y += rkflash_blk.o rkflash_debug.o
+obj-$(CONFIG_RKNANDC_NAND) += rksftl.o rknandc_base.o rkflash_api.o flash.o nandc.o
+obj-$(CONFIG_RKSFC_NAND) += rksftl.o rksfc_base.o  rkflash_api.o sfc_nand.o sfc.o
+obj-$(CONFIG_RKSFC_NOR) += rksfc_base.o rkflash_api.o sfc_nor.o sfc.o
 
 ifneq (, $(CONFIG_RKNANDC_NAND)$(CONFIG_RKSFC_NAND))
 
diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
index a3f9e89f3d..974ad80493 100644
--- a/drivers/rkflash/flash.c
+++ b/drivers/rkflash/flash.c
@@ -10,7 +10,6 @@
 #include "flash.h"
 #include "flash_com.h"
 #include "nandc.h"
-#include "typedef.h"
 #include "rkflash_debug.h"
 
 #define FLASH_STRESS_TEST_EN		0
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
index d7e44d7e9f..abc3fe14da 100644
--- a/drivers/rkflash/flash.h
+++ b/drivers/rkflash/flash.h
@@ -7,8 +7,6 @@
 #ifndef __FLASH_H
 #define __FLASH_H
 
-#include "typedef.h"
-
 #ifndef BIT
 #define BIT(nr)			(1 << (nr))
 #endif
diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
index 8f5c87c283..36452367ce 100644
--- a/drivers/rkflash/nandc.c
+++ b/drivers/rkflash/nandc.c
@@ -11,7 +11,7 @@
 #include "flash.h"
 #include "flash_com.h"
 #include "nandc.h"
-#include "typedef.h"
+#include "rk_sftl.h"
 
 #define     CPU_DELAY_NS(n)	ndelay(n)
 
diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
index e2d596b358..ad1502ef78 100644
--- a/drivers/rkflash/rk_sftl.h
+++ b/drivers/rkflash/rk_sftl.h
@@ -14,5 +14,13 @@ int sftl_read(u32 index, u32 count, u8 *buf);
 int sftl_write(u32 index, u32 count, u8 *buf);
 u32 sftl_get_density(void);
 s32 sftl_gc(void);
+int sftl_vendor_read(u32 index, u32 count, u8 *buf);
+int sftl_vendor_write(u32 index, u32 count, u8 *buf);
 
+void *ftl_malloc(int n_size);
+void ftl_free(void *p);
+void *ftl_memset(void *s, int c, unsigned int n);
+void *ftl_memcpy(void *pv_to,
+		 const void *pv_from,
+		 unsigned int size);
 #endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 722a608011..8affd2d8dc 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,7 +2,7 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-13
+ * date: 2018-07-21
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -15,9 +15,6 @@
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
 	.file	"rk_sftl.c"
-	.text
-.Ltext0:
-	.cfi_sections	.debug_frame
 	.global	__aeabi_uidiv
 	.section	.text.l2p_addr_tran.isra.0,"ax",%progbits
 	.align	1
@@ -27,85 +24,39 @@
 	.fpu softvfp
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB352:
-	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 58 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL0:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 74 0
 	lsrs	r7, r0, #10
-	.loc 1 66 0
 	ldr	r3, .L3
-	.loc 1 58 0
 	mov	r8, r1
 	mov	r6, r0
-	.loc 1 75 0
 	uxth	r0, r7
-	.loc 1 58 0
 	mov	r10, r2
-	.loc 1 76 0
 	uxth	r7, r7
-	.loc 1 66 0
 	ldrh	r4, [r3, #8]
-.LVL1:
-	.loc 1 78 0
 	ubfx	r6, r6, #0, #10
-	.loc 1 67 0
 	ldrh	r5, [r3, #10]
-.LVL2:
-	.loc 1 68 0
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	.loc 1 69 0
 	itt	eq
 	lsreq	r4, r4, #1
-.LVL3:
-	.loc 1 70 0
 	lsleq	r5, r5, #1
-.LVL4:
-	.loc 1 75 0
 	mov	r1, r4
-.LVL5:
-	.loc 1 70 0
 	it	eq
 	uxtheq	r5, r5
-.LVL6:
-	.loc 1 75 0
 	bl	__aeabi_uidiv
-.LVL7:
 	uxth	r0, r0
-.LVL8:
-	.loc 1 76 0
 	mls	r4, r0, r4, r7
-.LVL9:
-	.loc 1 78 0
 	mla	r4, r5, r4, r6
 	str	r4, [r8]
-	.loc 1 79 0
 	str	r0, [r10]
-	.loc 1 82 0
 	movs	r0, #0
-.LVL10:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL11:
 .L4:
 	.align	2
 .L3:
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE352:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.6,"ax",%progbits
 	.align	1
@@ -115,19 +66,12 @@ l2p_addr_tran.isra.0:
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
-.LFB358:
-	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1395 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL12:
-	.loc 2 1398 0
 	ldr	r3, .L6
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
-.LVL13:
 	ldr	r2, [r3]
 	movs	r3, #1
 	lsl	r0, r3, r0
@@ -139,8 +83,6 @@ ftl_set_blk_mode.part.6:
 	.align	2
 .L6:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE358:
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -151,41 +93,22 @@ ftl_set_blk_mode.part.6:
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB205:
-	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 128 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL14:
-	.loc 3 132 0
 	movs	r1, #0
-	.loc 3 130 0
 	movs	r2, #1
-.LVL15:
 .L9:
-	.loc 3 132 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
-.LVL16:
 	add	r1, r1, #1
 	bls	.L10
-.LVL17:
-	.loc 3 134 0
 	subs	r0, r3, #1
-.LVL18:
-	.loc 3 136 0
 	uxth	r0, r0
 	bx	lr
-.LVL19:
 .L10:
-	.loc 3 133 0 discriminator 3
 	lsls	r2, r2, #1
-.LVL20:
 	b	.L9
-	.cfi_endproc
-.LFE205:
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -196,16 +119,10 @@ Ftl_log2:
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB206:
-	.loc 3 160 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL21:
 	bx	lr
-	.cfi_endproc
-.LFE206:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
@@ -216,44 +133,30 @@ FtlPrintInfo:
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB207:
-	.loc 3 166 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL22:
-	.loc 3 169 0
 	ldr	r3, .L13
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-.LVL23:
-	.loc 3 170 0
 	ldr	r2, .L13+4
-	.loc 3 169 0
 	str	r0, [r3]
-	.loc 3 170 0
 	ldr	r3, .L13+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	.loc 3 171 0
 	ldr	r2, .L13+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-.LVL24:
 	ldr	r2, .L13+16
 	strh	r0, [r2]	@ movhi
-	.loc 3 175 0
 	movs	r0, #0
-	.loc 3 172 0
 	ldr	r2, .L13+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
 	ldr	r2, .L13+24
 	str	r3, [r2]
-	.loc 3 175 0
 	bx	lr
 .L14:
 	.align	2
@@ -265,8 +168,6 @@ FtlSysBlkNumInit:
 	.word	.LANCHOR5
 	.word	.LANCHOR8
 	.word	.LANCHOR7
-	.cfi_endproc
-.LFE207:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
@@ -278,239 +179,136 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB208:
-	.loc 3 184 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL25:
-	.loc 3 189 0
 	ldrh	r1, [r0]
 	ldr	r2, .L25
-	.loc 3 184 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 184 0
 	mov	r7, r0
-	.loc 3 190 0
 	ldrh	r5, [r0, #2]
-	.loc 3 189 0
 	strh	r1, [r2]	@ movhi
-	.loc 3 190 0
 	ldr	r2, .L25+4
-	.loc 3 191 0
 	ldrh	r0, [r0, #4]
-.LVL26:
-	.loc 3 190 0
 	strh	r5, [r2]	@ movhi
-	.loc 3 191 0
 	ldr	r2, .L25+8
 	strh	r0, [r2]	@ movhi
-	.loc 3 192 0
 	ldrh	r2, [r7, #14]
 	cmp	r2, #4
 	bne	.L16
-	.loc 3 193 0
 	ldrh	r2, [r7, #6]
 	ldr	r4, .L25+12
 	lsrs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-	.loc 3 194 0
 	movs	r4, #8
 	ldr	r2, .L25+16
 	strh	r4, [r2]	@ movhi
 .L16:
-	.loc 3 198 0 discriminator 3
 	ldr	r4, .L25+20
-	.loc 3 184 0 discriminator 3
 	movs	r2, #0
 .L17:
-.LVL27:
-	.loc 3 198 0 discriminator 3
 	strb	r2, [r2, r4]
-	.loc 3 197 0 discriminator 3
 	adds	r2, r2, #1
-.LVL28:
 	cmp	r2, #32
 	bne	.L17
-	.loc 3 199 0
 	ldr	r2, .L25+24
-.LVL29:
-	.loc 3 201 0
 	cmp	r1, #1
-	.loc 3 199 0
 	mov	r4, #5
-	.loc 3 205 0
 	smulbb	r5, r5, r0
-	.loc 3 200 0
 	mov	r6, #0
-	.loc 3 199 0
 	strh	r4, [r2]	@ movhi
-	.loc 3 202 0
 	it	eq
 	strheq	r1, [r2]	@ movhi
-	.loc 3 203 0
 	mov	r1, #640
 	ldr	r2, .L25+28
-	.loc 3 205 0
 	uxth	r5, r5
-	.loc 3 200 0
 	ldr	r4, .L25+32
-	.loc 3 203 0
 	strh	r1, [r2]	@ movhi
-	.loc 3 205 0
 	ldr	r2, .L25+36
-	.loc 3 200 0
 	strh	r6, [r4]	@ movhi
-	.loc 3 211 0
 	ldr	r6, .L25+40
-	.loc 3 205 0
 	strh	r5, [r2]	@ movhi
-	.loc 3 206 0
 	ldr	r2, .L25+12
 	ldrh	r4, [r2]
 	ldr	r2, .L25+44
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
-	.loc 3 207 0
 	bl	Ftl_log2
-.LVL30:
 	ldr	r2, .L25+48
-	.loc 3 208 0
 	ldrh	r8, [r7, #12]
 	ldr	r3, .L25+52
-	.loc 3 207 0
 	strh	r0, [r2]	@ movhi
-	.loc 3 209 0
 	ldr	r2, .L25+56
-	.loc 3 210 0
 	smulbb	r1, r5, r8
-	.loc 3 208 0
 	strh	r8, [r3]	@ movhi
-	.loc 3 209 0
 	strh	r8, [r2]	@ movhi
-	.loc 3 210 0
 	ldr	r2, .L25+60
 	strh	r1, [r2]	@ movhi
-	.loc 3 211 0
 	ldr	r2, .L25+16
 	ldrh	fp, [r2]
 	mov	r0, fp
 	bl	Ftl_log2
-.LVL31:
-	.loc 3 213 0
 	lsl	r2, fp, #9
 	ldr	r1, .L25+64
-	.loc 3 215 0
 	ldr	r3, .L25+68
-	.loc 3 211 0
 	mov	r10, r0
-	.loc 3 213 0
 	uxth	r2, r2
-	.loc 3 211 0
 	strh	r0, [r6]	@ movhi
-	.loc 3 219 0
 	mov	r0, #5120
-	.loc 3 213 0
 	strh	r2, [r1]	@ movhi
-	.loc 3 214 0
 	lsrs	r2, r2, #8
 	ldr	r1, .L25+72
 	strh	r2, [r1]	@ movhi
-	.loc 3 219 0
 	mul	r1, r8, fp
-	.loc 3 215 0
 	ldrh	r2, [r7, #20]
 	ldr	r7, .L25+52
-.LVL32:
 	strh	r2, [r3]	@ movhi
-	.loc 3 217 0
 	mul	r3, r4, r5
 	ldr	r2, .L25+76
-	.loc 3 224 0
 	lsls	r4, r4, #6
-	.loc 3 217 0
 	str	r3, [r2]
-	.loc 3 218 0
 	mul	r3, fp, r3
 	ldr	r2, .L25+80
 	mul	r3, r8, r3
 	ldr	r8, .L25+116
 	asrs	r3, r3, #11
 	str	r3, [r2]
-	.loc 3 219 0
 	bl	__aeabi_idiv
-.LVL33:
 	uxth	r0, r0
-	.loc 3 222 0
 	ldr	r2, .L25+84
-	.loc 3 227 0
 	mov	r1, r5
-	.loc 3 220 0
 	cmp	r0, #4
-	.loc 3 221 0
 	itet	ls
 	movls	r3, #4
-	.loc 3 219 0
 	strhhi	r0, [r8]	@ movhi
-	.loc 3 221 0
 	strhls	r3, [r8]	@ movhi
-	.loc 3 222 0
 	mov	r3, #640
 	asr	r3, r3, r10
-	.loc 3 224 0
 	add	r10, r10, #9
 	asr	r4, r4, r10
-	.loc 3 225 0
 	ldr	r10, .L25+120
-	.loc 3 222 0
 	adds	r3, r3, #2
-	.loc 3 227 0
 	ldrh	r0, [r8]
-	.loc 3 222 0
 	strh	r3, [r2]	@ movhi
-	.loc 3 224 0
 	ldr	r3, .L25+88
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
-	.loc 3 225 0
 	mul	r3, r5, r4
-	.loc 3 227 0
 	adds	r4, r4, #8
-	.loc 3 225 0
 	str	r3, [r10]
-	.loc 3 227 0
 	bl	__aeabi_uidiv
-.LVL34:
 	uxtah	r0, r4, r0
 	ldr	r4, .L25+92
-	.loc 3 228 0
 	cmp	r5, #1
-	.loc 3 229 0
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
-	.loc 3 232 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
-.LVL35:
-	.loc 3 233 0
 	ldr	r2, [r4]
-	.loc 3 237 0
 	movs	r0, #0
-	.loc 3 233 0
 	ldr	r3, .L25+96
 	str	r2, [r3]
-	.loc 3 235 0
 	ldr	r3, .L25+100
 	ldr	r2, [r3]
 	ldrh	r3, [r7]
@@ -522,22 +320,17 @@ FtlConstantsInit:
 	ldr	r2, .L25+104
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	.loc 3 236 0
 	movs	r2, #32
 	ldr	r3, .L25+108
 	strh	r2, [r3]	@ movhi
-	.loc 3 237 0
 	ldr	r3, .L25+112
 	str	r0, [r3]
-	.loc 3 238 0
 	ldrh	r3, [r8]
 	adds	r3, r3, #3
 	strh	r3, [r8]	@ movhi
-	.loc 3 239 0
 	ldr	r3, [r10]
 	adds	r3, r3, #3
 	str	r3, [r10]
-	.loc 3 264 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L26:
 	.align	2
@@ -573,8 +366,6 @@ FtlConstantsInit:
 	.word	.LANCHOR34
 	.word	.LANCHOR27
 	.word	.LANCHOR30
-	.cfi_endproc
-.LFE208:
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -585,52 +376,28 @@ FtlConstantsInit:
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB211:
-	.loc 3 514 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL36:
-	.loc 3 517 0
 	ldr	r3, .L34
 	ldrh	r3, [r3]
 	cbz	r3, .L33
-.LBB185:
-.LBB186:
-	.loc 3 519 0
 	ldr	r3, .L34+4
-	.loc 3 518 0
 	ldr	r2, .L34+8
-	.loc 3 519 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
 .L29:
-	.loc 3 518 0
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE186:
-.LBE185:
-	.loc 3 524 0
 	movs	r0, #0
-.LVL37:
 	bx	lr
-.LVL38:
 .L30:
-.LBB188:
-.LBB187:
-	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
 	bne	.L29
-	.loc 3 520 0
 	movs	r0, #1
-.LVL39:
-.LBE187:
-.LBE188:
-	.loc 3 525 0
 	bx	lr
 .L35:
 	.align	2
@@ -638,8 +405,6 @@ IsBlkInVendorPart:
 	.word	.LANCHOR35
 	.word	.LANCHOR36
 	.word	.LANCHOR27
-	.cfi_endproc
-.LFE211:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -650,17 +415,11 @@ IsBlkInVendorPart:
 	.fpu softvfp
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-.LFB219:
-	.loc 3 952 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 954 0
 	movs	r0, #0
 	bx	lr
-	.cfi_endproc
-.LFE219:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",%progbits
 	.align	1
@@ -671,13 +430,9 @@ FtlCacheWriteBack:
 	.fpu softvfp
 	.type	sftl_get_density, %function
 sftl_get_density:
-.LFB224:
-	.loc 3 1178 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 1180 0
 	ldr	r3, .L38
 	ldr	r0, [r3]
 	bx	lr
@@ -685,8 +440,6 @@ sftl_get_density:
 	.align	2
 .L38:
 	.word	.LANCHOR34
-	.cfi_endproc
-.LFE224:
 	.size	sftl_get_density, .-sftl_get_density
 	.global	__aeabi_uidivmod
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
@@ -698,44 +451,21 @@ sftl_get_density:
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB225:
-	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
-	.loc 4 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL40:
-	.loc 4 10 0
 	ldr	r3, .L41
-	.loc 4 5 0
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 4 5 0
 	mov	r5, r0
-	.loc 4 10 0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL41:
 	mov	r1, r4
-	.loc 4 13 0
 	ldr	r4, .L41+4
-	.loc 4 10 0
 	uxth	r6, r0
-.LVL42:
 	mov	r0, r5
 	bl	__aeabi_uidivmod
-.LVL43:
-	.loc 4 13 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
-.LVL44:
-	.loc 4 15 0
 	ldr	r2, [r2, #28]
 	lsrs	r1, r3, #5
 	and	r7, r3, #31
@@ -744,34 +474,24 @@ FtlBbmMapBadBlock:
 	ldr	r7, [r2, r1, lsl #2]
 	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
-	.loc 4 16 0
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
 	ldr	r0, .L41+8
 	bl	printf
-.LVL45:
-	.loc 4 17 0
 	ldrh	r3, [r4, #6]
-	.loc 4 19 0
 	movs	r0, #0
-	.loc 4 17 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 4 19 0
 	add	sp, sp, #12
-	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL46:
 .L42:
 	.align	2
 .L41:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LC0
-	.cfi_endproc
-.LFE225:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
@@ -782,64 +502,33 @@ FtlBbmMapBadBlock:
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB226:
-	.loc 4 24 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL47:
-	.loc 4 30 0
 	ldr	r3, .L44
-	.loc 4 24 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 4 24 0
 	mov	r6, r0
-	.loc 4 30 0
 	ldrh	r5, [r3]
-.LVL48:
-	.loc 4 31 0
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL49:
-	.loc 4 30 0
 	mov	r0, r6
-	.loc 4 31 0
 	uxth	r4, r1
-.LVL50:
-	.loc 4 30 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-.LVL51:
-	.loc 4 33 0
 	ldr	r3, .L44+4
-	.loc 4 30 0
 	uxth	r0, r0
-	.loc 4 34 0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
-.LVL52:
-	.loc 4 33 0
 	add	r0, r3, r0, lsl #2
-	.loc 4 34 0
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
 	lsrs	r0, r0, r4
-	.loc 4 36 0
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.LVL53:
 .L45:
 	.align	2
 .L44:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
-	.cfi_endproc
-.LFE226:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -850,15 +539,10 @@ FtlBbmIsBadBlock:
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB227:
-	.loc 4 39 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
-	.cfi_endproc
-.LFE227:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.FtlBbtCalcTotleCnt,"ax",%progbits
 	.align	1
@@ -869,63 +553,35 @@ FtlBbtInfoPrint:
 	.fpu softvfp
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
-.LFB231:
-	.loc 4 157 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL54:
-	.loc 4 160 0
 	ldr	r3, .L54
 	ldr	r2, .L54+4
-	.loc 4 157 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 4 160 0
 	movs	r5, #0
 	ldrh	r3, [r3]
-	.loc 4 159 0
 	mov	r4, r5
-	.loc 4 160 0
 	ldrh	r6, [r2]
 	muls	r6, r3, r6
-.LVL55:
 .L48:
 	uxth	r0, r5
-.LVL56:
-	.loc 4 160 0 is_stmt 0 discriminator 1
 	cmp	r0, r6
 	blt	.L50
-	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
-.LVL57:
 	pop	{r4, r5, r6, pc}
-.LVL58:
 .L50:
-	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
-.LVL59:
 	cbz	r0, .L49
-	.loc 4 164 0
 	adds	r4, r4, #1
-.LVL60:
 	uxth	r4, r4
-.LVL61:
 .L49:
 	adds	r5, r5, #1
-.LVL62:
 	b	.L48
 .L55:
 	.align	2
 .L54:
 	.word	.LANCHOR17
 	.word	.LANCHOR10
-	.cfi_endproc
-.LFE231:
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -936,33 +592,15 @@ FtlBbtCalcTotleCnt:
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
-.LFB235:
-	.loc 2 5 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL63:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 5 0
 	mov	r5, r1
-	.loc 2 8 0
 	ldr	r3, .L57
-	.loc 2 5 0
 	mov	r7, r0
-	.loc 2 8 0
 	ldrh	r6, [r3]
-.LVL64:
 	mov	r1, r6
-.LVL65:
 	bl	__aeabi_uidiv
-.LVL66:
 	ldr	r3, .L57+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
@@ -970,10 +608,8 @@ V2P_block:
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
-.LVL67:
 	adds	r0, r5, r1
 	add	r0, r0, r4
-	.loc 2 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
 .L58:
@@ -981,8 +617,6 @@ V2P_block:
 .L57:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE235:
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
@@ -993,37 +627,20 @@ V2P_block:
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB236:
-	.loc 2 13 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL68:
-	.loc 2 16 0
 	ldr	r3, .L60
-	.loc 2 13 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 13 0
 	mov	r6, r0
-	.loc 2 16 0
 	ldrh	r5, [r3]
-.LVL69:
 	ldr	r3, .L60+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL70:
 	smulbb	r4, r0, r5
 	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-.LVL71:
 	add	r1, r1, r4
-	.loc 2 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
 .L61:
@@ -1031,8 +648,6 @@ P2V_plane:
 .L60:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE236:
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
@@ -1043,31 +658,16 @@ P2V_plane:
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB237:
-	.loc 2 21 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL72:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 24 0
 	ldr	r3, .L63
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-.LVL73:
-	.loc 2 25 0
 	ldr	r3, .L63+4
-	.loc 2 24 0
 	uxth	r0, r1
-.LVL74:
-	.loc 2 25 0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL75:
-	.loc 2 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
 .L64:
@@ -1075,8 +675,6 @@ P2V_block_in_plane:
 .L63:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
-	.cfi_endproc
-.LFE237:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
@@ -1087,38 +685,24 @@ P2V_block_in_plane:
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB238:
-	.loc 2 31 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL76:
-	.loc 2 34 0
 	cmp	r0, r1
 	bls	.L66
-	.loc 2 36 0
 	subs	r0, r0, r1
-.LVL77:
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.LVL78:
 .L66:
-	.loc 2 40 0
 	subs	r0, r1, r0
-.LVL79:
 	cmp	r0, #-2147483648
 	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
-.LVL80:
-	.loc 2 44 0
 	bx	lr
-	.cfi_endproc
-.LFE238:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -1129,16 +713,11 @@ ftl_cmp_data_ver:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB241:
-	.loc 2 88 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 89 0
 	ldr	r3, .L69
 	ldrh	r0, [r3, #6]
-	.loc 2 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
@@ -1146,8 +725,6 @@ FtlFreeSysBlkQueueEmpty:
 	.align	2
 .L69:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE241:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -1158,16 +735,11 @@ FtlFreeSysBlkQueueEmpty:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB242:
-	.loc 2 93 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 94 0
 	ldr	r3, .L72
 	ldrh	r0, [r3, #6]
-	.loc 2 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
@@ -1176,8 +748,6 @@ FtlFreeSysBlkQueueFull:
 	.align	2
 .L72:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE242:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -1188,25 +758,12 @@ FtlFreeSysBlkQueueFull:
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB244:
-	.loc 2 118 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL81:
-	.loc 2 123 0
 	ldr	r3, .L83
-	.loc 2 118 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 123 0
 	ldrh	r2, [r3, #6]
 	cbz	r2, .L74
-	.loc 2 119 0
 	ldr	r2, .L83+4
 	movs	r6, #0
 	ldrh	r1, [r3, #2]
@@ -1215,39 +772,23 @@ FtlFreeSysBLkSort:
 	ldrh	r2, [r3, #4]
 	and	r4, r4, #31
 .L76:
-.LVL82:
-	.loc 2 124 0 discriminator 1
 	uxth	r0, r6
 	adds	r6, r6, #1
-.LVL83:
 	cmp	r4, r0
 	bgt	.L77
 	cbz	r5, .L74
 	strh	r1, [r3, #2]	@ movhi
 	strh	r2, [r3, #4]	@ movhi
-.LVL84:
 .L74:
 	pop	{r4, r5, r6, pc}
-.LVL85:
 .L77:
-	.loc 2 125 0 discriminator 3
 	adds	r0, r1, #4
-.LVL86:
-	.loc 2 126 0 discriminator 3
 	adds	r1, r1, #1
-	.loc 2 125 0 discriminator 3
 	ldrh	r5, [r3, r0, lsl #1]
-.LVL87:
-	.loc 2 127 0 discriminator 3
 	adds	r0, r2, #4
-	.loc 2 126 0 discriminator 3
 	ubfx	r1, r1, #0, #10
-	.loc 2 127 0 discriminator 3
 	strh	r5, [r3, r0, lsl #1]	@ movhi
-.LVL88:
 	movs	r5, #1
-.LVL89:
-	.loc 2 128 0 discriminator 3
 	add	r2, r2, r5
 	ubfx	r2, r2, #0, #10
 	b	.L76
@@ -1256,8 +797,6 @@ FtlFreeSysBLkSort:
 .L83:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
-	.cfi_endproc
-.LFE244:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",%progbits
 	.align	1
@@ -1268,72 +807,37 @@ FtlFreeSysBLkSort:
 	.fpu softvfp
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-.LFB245:
-	.loc 2 163 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL90:
-.LBB189:
-.LBB190:
-	.loc 2 94 0
 	ldr	r3, .L91
-.LBE190:
-.LBE189:
-	.loc 2 163 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-.LBB192:
-.LBB191:
-	.loc 2 94 0
 	ldrh	r4, [r3, #6]
-.LBE191:
-.LBE192:
-	.loc 2 168 0
 	cmp	r4, #1024
 	beq	.L89
-	.loc 2 171 0
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
 .L87:
-.LVL91:
-	.loc 2 170 0 discriminator 1
 	cmp	r1, r4
 	bcc	.L88
-.LVL92:
 .L89:
-	.loc 2 164 0
 	movs	r0, #0
-.LVL93:
 	pop	{r4, r5, pc}
-.LVL94:
 .L88:
-	.loc 2 171 0
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
 	beq	.L90
-	.loc 2 170 0 discriminator 2
 	adds	r1, r1, #1
-.LVL95:
 	b	.L87
 .L90:
-	.loc 2 172 0
 	movs	r0, #1
-.LVL96:
-	.loc 2 178 0
 	pop	{r4, r5, pc}
 .L92:
 	.align	2
 .L91:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE245:
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
@@ -1344,205 +848,114 @@ IsInFreeQueue:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB249:
-	.loc 2 249 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL97:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 260 0
 	ldr	r3, .L109
 	ldrh	lr, [r3]
 	cmp	lr, r0
 	bls	.L95
-	.loc 2 265 0
 	ldr	r3, .L109+4
 	movs	r5, #6
 	ldr	r4, [r3]
 	mul	r3, r5, r0
 	str	r3, [sp, #4]
 	adds	r1, r4, r3
-.LVL98:
-	.loc 2 266 0
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
 	strh	r3, [r4, r2]	@ movhi
-	.loc 2 268 0
 	ldr	r3, .L109+8
 	ldr	ip, [r3]
 	cmp	ip, #0
 	bne	.L96
-.LVL99:
 .L108:
-	.loc 2 317 0
 	str	r1, [r3]
-.LVL100:
 .L95:
-	.loc 2 323 0
 	movs	r0, #0
-.LVL101:
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL102:
 .L96:
-	.cfi_restore_state
-	.loc 2 273 0
 	ldr	r3, .L109+12
 	lsls	r2, r0, #1
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldrh	r6, [r3, r0, lsl #1]
-.LVL103:
-	.loc 2 274 0
 	ldrh	r3, [r1, #4]
-.LVL104:
-	.loc 2 275 0
 	cbz	r3, .L106
-	.loc 2 274 0
 	mul	fp, r3, r6
 .L97:
-.LVL105:
-	.loc 2 279 0
 	sub	r3, ip, r4
 	asrs	r6, r3, #1
-.LVL106:
 	ldr	r3, .L109+16
 	muls	r3, r6, r3
-	.loc 2 294 0
 	ldr	r6, .L109+20
 	ldr	r8, [r6]
-	.loc 2 256 0
 	movs	r6, #0
-	.loc 2 279 0
 	uxth	r3, r3
-.LVL107:
-	.loc 2 294 0
 	add	r2, r8, r2
 	str	r2, [sp, #12]
 	mov	r2, ip
-.LVL108:
 .L104:
-	.loc 2 281 0
 	adds	r6, r6, #1
-.LVL109:
 	uxth	r6, r6
-.LVL110:
-	.loc 2 282 0
 	cmp	lr, r6
 	bcc	.L95
-	.loc 2 285 0
 	cmp	r3, r0
 	beq	.L95
-	.loc 2 288 0
 	ldr	r7, [sp, #8]
 	lsl	r10, r3, #1
 	ldrh	r7, [r7, r3, lsl #1]
 	mov	r5, r7
-.LVL111:
-	.loc 2 289 0
 	ldrh	r7, [r2, #4]
-.LVL112:
-	.loc 2 290 0
 	cbz	r7, .L107
-	.loc 2 289 0
 	muls	r7, r5, r7
-.LVL113:
 .L99:
-	.loc 2 293 0
 	cmp	fp, r7
 	bne	.L100
-	.loc 2 294 0
 	ldr	r5, [sp, #12]
-.LVL114:
 	ldrh	r10, [r8, r10]
 	ldrh	r7, [r5]
-.LVL115:
 	cmp	r10, r7
 	bcc	.L102
 .L101:
-	.loc 2 312 0
 	ldr	r5, [sp, #4]
-	.loc 2 315 0
 	cmp	r2, ip
-	.loc 2 312 0
 	strh	r3, [r4, r5]	@ movhi
-.LVL116:
-	.loc 2 313 0
 	ldrh	r3, [r2, #2]
-.LVL117:
 	strh	r3, [r1, #2]	@ movhi
-	.loc 2 315 0
 	bne	.L105
-	.loc 2 316 0
 	strh	r0, [r2, #2]	@ movhi
-	.loc 2 317 0
 	ldr	r3, .L109+8
 	b	.L108
-.LVL118:
 .L106:
-	.loc 2 276 0
 	mov	fp, #-1
 	b	.L97
-.LVL119:
 .L107:
-	.loc 2 291 0
 	mov	r7, #-1
-.LVL120:
 	b	.L99
-.LVL121:
 .L100:
-	.loc 2 298 0
 	bcc	.L101
-.LVL122:
 .L102:
-	.loc 2 301 0
 	ldrh	r7, [r2]
 	movw	r5, #65535
 	cmp	r7, r5
 	bne	.L103
-	.loc 2 302 0
 	strh	r3, [r1, #2]	@ movhi
-.LVL123:
-	.loc 2 303 0
 	strh	r0, [r2]	@ movhi
-	.loc 2 304 0
 	ldr	r3, .L109+24
-.LVL124:
 	b	.L108
-.LVL125:
 .L103:
-	.loc 2 309 0
 	movs	r3, #6
-.LVL126:
 	mla	r2, r3, r7, r4
-.LVL127:
-	.loc 2 281 0
 	mov	r3, r7
 	b	.L104
-.LVL128:
 .L105:
-	.loc 2 319 0
 	ldrh	r1, [r2, #2]
-.LVL129:
 	movs	r3, #6
 	muls	r3, r1, r3
 	strh	r0, [r4, r3]	@ movhi
-.LVL130:
-	.loc 2 320 0
 	strh	r0, [r2, #2]	@ movhi
 	b	.L95
 .L110:
@@ -1555,8 +968,6 @@ insert_data_list:
 	.word	-1431655765
 	.word	.LANCHOR43
 	.word	.LANCHOR44
-	.cfi_endproc
-.LFE249:
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -1567,51 +978,25 @@ insert_data_list:
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB248:
-	.loc 2 218 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL131:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 219 0
 	bl	insert_data_list
-.LVL132:
-	.loc 2 220 0
 	ldr	r2, .L113
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 221 0
 	ldr	r2, .L113+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L111
-.LVL133:
-.LBB195:
-.LBB196:
 	movs	r2, #221
 	ldr	r1, .L113+8
 	ldr	r0, .L113+12
-.LBE196:
-.LBE195:
-	.loc 2 222 0
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB198:
-.LBB197:
-	.loc 2 221 0
 	b	printf
-.LVL134:
 .L111:
-	.cfi_restore_state
 	pop	{r3, pc}
 .L114:
 	.align	2
@@ -1620,10 +1005,6 @@ INSERT_DATA_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR46
 	.word	.LC1
-.LBE197:
-.LBE198:
-	.cfi_endproc
-.LFE248:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
@@ -1634,128 +1015,66 @@ INSERT_DATA_LIST:
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB250:
-	.loc 2 326 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL135:
-	.loc 2 332 0
 	movw	r1, #65535
-	.loc 2 326 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 332 0
 	cmp	r0, r1
 	beq	.L116
-	.loc 2 335 0
 	ldr	r3, .L122
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	.loc 2 338 0
 	ldr	r3, .L122+4
-	.loc 2 335 0
 	adds	r5, r4, r7
-.LVL136:
-	.loc 2 338 0
 	ldr	r6, [r3]
 	mov	lr, r3
-	.loc 2 336 0
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	.loc 2 338 0
 	cbnz	r6, .L117
-	.loc 2 339 0
 	str	r5, [r3]
-.LVL137:
 .L116:
-	.loc 2 372 0
 	movs	r0, #0
-.LVL138:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL139:
 .L117:
-	.loc 2 343 0
 	ldr	r3, .L122+8
-	.loc 2 345 0
 	subs	r2, r6, r4
-	.loc 2 352 0
 	mov	fp, r1
-	.loc 2 343 0
 	ldr	ip, [r3]
-	.loc 2 345 0
 	asrs	r3, r2, #1
 	ldr	r2, .L122+12
-	.loc 2 343 0
 	ldrh	r8, [ip, r0, lsl #1]
-.LVL140:
-	.loc 2 345 0
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.LVL141:
 .L120:
-	.loc 2 349 0
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
 	bcs	.L118
-	.loc 2 352 0
 	ldrh	r1, [r3]
 	cmp	r1, fp
 	bne	.L119
-	.loc 2 353 0
 	strh	r2, [r5, #2]	@ movhi
-.LVL142:
-	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 355 0
 	b	.L116
-.LVL143:
 .L119:
-	.loc 2 358 0
 	mla	r3, r10, r1, r4
-.LVL144:
-	.loc 2 348 0
 	mov	r2, r1
-.LVL145:
 	b	.L120
-.LVL146:
 .L118:
-	.loc 2 361 0
 	ldrh	r1, [r3, #2]
-	.loc 2 364 0
 	cmp	r3, r6
-	.loc 2 361 0
 	strh	r1, [r5, #2]	@ movhi
-.LVL147:
-	.loc 2 368 0
 	it	ne
 	ldrhne	r1, [r3, #2]
-	.loc 2 362 0
 	strh	r2, [r4, r7]	@ movhi
-	.loc 2 368 0
 	iteet	ne
 	movne	r2, #6
-.LVL148:
-	.loc 2 365 0
 	strheq	r0, [r3, #2]	@ movhi
-	.loc 2 366 0
 	streq	r5, [lr]
-	.loc 2 368 0
 	mulne	r2, r2, r1
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
-.LVL149:
-	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
 	b	.L116
 .L123:
@@ -1765,8 +1084,6 @@ insert_free_list:
 	.word	.LANCHOR47
 	.word	.LANCHOR43
 	.word	-1431655765
-	.cfi_endproc
-.LFE250:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
@@ -1777,51 +1094,25 @@ insert_free_list:
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB247:
-	.loc 2 211 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL150:
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 212 0
 	bl	insert_free_list
-.LVL151:
-	.loc 2 213 0
 	ldr	r2, .L126
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 214 0
 	ldr	r2, .L126+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
 	bcs	.L124
-.LVL152:
-.LBB201:
-.LBB202:
 	movs	r2, #214
 	ldr	r1, .L126+8
 	ldr	r0, .L126+12
-.LBE202:
-.LBE201:
-	.loc 2 215 0
 	pop	{r3, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-.LBB204:
-.LBB203:
-	.loc 2 214 0
 	b	printf
-.LVL153:
 .L124:
-	.cfi_restore_state
 	pop	{r3, pc}
 .L127:
 	.align	2
@@ -1830,10 +1121,6 @@ INSERT_FREE_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR49
 	.word	.LC1
-.LBE203:
-.LBE204:
-	.cfi_endproc
-.LFE247:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
@@ -1844,110 +1131,65 @@ INSERT_FREE_LIST:
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB251:
-	.loc 2 375 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL154:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 378 0
 	movs	r6, #6
 	ldr	r5, .L134
 	muls	r6, r1, r6
-	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 378 0
 	ldr	r7, [r5]
 	adds	r4, r7, r6
-.LVL155:
-	.loc 2 379 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
 	bne	.L129
-	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
 	cmp	r4, r3
 	beq	.L129
-	.loc 2 379 0 discriminator 2
 	movw	r2, #379
 	ldr	r1, .L134+4
-.LVL156:
 	ldr	r0, .L134+8
-.LVL157:
 	bl	printf
-.LVL158:
 .L129:
-	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
 	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
 	bne	.L130
-	.loc 2 382 0
 	cmp	r3, r1
-	.loc 2 385 0
 	ittee	ne
 	ldrne	r0, [r5]
 	movne	r2, #6
-	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 385 0
 	ittt	ne
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
-	.loc 2 386 0
 	strhne	r1, [r3, #2]	@ movhi
 .L132:
-	.loc 2 399 0
 	movw	r3, #65535
-	.loc 2 401 0
 	movs	r0, #0
-	.loc 2 399 0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 401 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL159:
 .L130:
-	.loc 2 388 0
 	cmp	r3, r1
 	ldrh	r1, [r4, #2]
 	bne	.L133
-	.loc 2 389 0
 	cmp	r1, r3
 	beq	.L132
-.LVL160:
-	.loc 2 391 0
 	movs	r2, #6
 	ldr	r0, [r5]
 	muls	r1, r2, r1
-.LVL161:
 	strh	r3, [r0, r1]	@ movhi
 	b	.L132
-.LVL162:
 .L133:
-	.loc 2 394 0
 	ldr	r0, [r5]
-.LVL163:
-	.loc 2 395 0
 	movs	r2, #6
 	mla	r5, r2, r3, r0
 	strh	r1, [r5, #2]	@ movhi
-.LVL164:
-	.loc 2 396 0
 	ldrh	r1, [r4, #2]
-	.loc 2 397 0
 	muls	r2, r1, r2
 	strh	r3, [r0, r2]	@ movhi
 	b	.L132
@@ -1957,8 +1199,6 @@ List_remove_node:
 	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
-	.cfi_endproc
-.LFE251:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
@@ -1969,80 +1209,42 @@ List_remove_node:
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB252:
-	.loc 2 404 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL165:
-	.loc 2 408 0
 	ldr	r3, [r0]
-	.loc 2 404 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 408 0
 	cbz	r3, .L142
-	.loc 2 413 0
 	ldr	r2, .L143
-	.loc 2 412 0
 	movw	r5, #65535
-	.loc 2 413 0
 	movs	r6, #6
 	ldr	r2, [r2]
 .L138:
-.LVL166:
-	.loc 2 412 0
 	cbnz	r1, .L139
 .L141:
-	.loc 2 416 0
 	ldr	r4, .L143+4
 	subs	r3, r3, r2
-.LVL167:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-.LVL168:
-	.loc 2 417 0
 	uxth	r1, r4
-.LVL169:
 	bl	List_remove_node
-.LVL170:
 	uxth	r0, r4
-	.loc 2 419 0
 	pop	{r4, r5, r6, pc}
-.LVL171:
 .L139:
-	.loc 2 412 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
 	beq	.L141
-	.loc 2 414 0
 	subs	r1, r1, #1
-.LVL172:
-	.loc 2 413 0
 	mla	r3, r6, r4, r2
-.LVL173:
-	.loc 2 414 0
 	uxth	r1, r1
-.LVL174:
 	b	.L138
-.LVL175:
 .L142:
-	.loc 2 409 0
 	movw	r0, #65535
-.LVL176:
-	.loc 2 420 0
 	pop	{r4, r5, r6, pc}
 .L144:
 	.align	2
 .L143:
 	.word	.LANCHOR40
 	.word	-1431655765
-	.cfi_endproc
-.LFE252:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_pop_head_node,"ax",%progbits
 	.align	1
@@ -2053,19 +1255,11 @@ List_pop_index_node:
 	.fpu softvfp
 	.type	List_pop_head_node, %function
 List_pop_head_node:
-.LFB253:
-	.loc 2 423 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL177:
-	.loc 2 424 0
 	movs	r1, #0
 	b	List_pop_index_node
-.LVL178:
-	.cfi_endproc
-.LFE253:
 	.size	List_pop_head_node, .-List_pop_head_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
@@ -2076,64 +1270,35 @@ List_pop_head_node:
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB254:
-	.loc 2 428 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL179:
-	.loc 2 432 0
 	ldr	r3, .L152
-	.loc 2 428 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 432 0
 	ldr	r3, [r3]
 	cbz	r3, .L151
-	.loc 2 437 0
 	ldr	r2, .L152+4
 	movs	r4, #6
 	ldr	r1, [r2]
-	.loc 2 436 0
 	movw	r2, #65535
 .L148:
-.LVL180:
 	cbz	r0, .L149
-	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
-.LVL181:
 	cmp	r3, r2
 	bne	.L150
 .L151:
-	.loc 2 433 0 is_stmt 1
 	movw	r0, #65535
-.LVL182:
 	pop	{r4, pc}
-.LVL183:
 .L150:
-	.loc 2 438 0
 	subs	r0, r0, #1
-.LVL184:
-	.loc 2 437 0
 	mla	r3, r4, r3, r1
-.LVL185:
-	.loc 2 438 0
 	uxth	r0, r0
-.LVL186:
 	b	.L148
 .L149:
-.LVL187:
-	.loc 2 442 0
 	ldr	r0, .L152+8
-.LVL188:
 	subs	r3, r3, r1
-.LVL189:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 2 445 0
 	pop	{r4, pc}
 .L153:
 	.align	2
@@ -2141,8 +1306,6 @@ List_get_gc_head_node:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
-	.cfi_endproc
-.LFE254:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
@@ -2153,80 +1316,42 @@ List_get_gc_head_node:
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB255:
-	.loc 2 448 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL190:
-	.loc 2 457 0
 	ldr	r3, .L165
-	.loc 2 448 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 448 0
 	mov	r4, r0
-	.loc 2 457 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L156
-	.loc 2 457 0 is_stmt 0 discriminator 1
 	ldr	r3, .L165+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L156
-	.loc 2 457 0 discriminator 2
 	ldr	r3, .L165+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L156
-.LVL191:
-.LBB207:
-.LBB208:
-	.loc 2 460 0 is_stmt 1
 	ldr	r7, .L165+12
 	movs	r6, #6
-	.loc 2 462 0
 	ldr	r3, .L165+16
-	.loc 2 460 0
 	muls	r6, r0, r6
 	ldr	fp, [r7]
-	.loc 2 462 0
 	ldr	r3, [r3]
-	.loc 2 460 0
 	add	r10, fp, r6
-.LVL192:
-	.loc 2 462 0
 	cmp	r10, r3
 	beq	.L156
-	.loc 2 465 0
 	ldr	r3, .L165+20
-	.loc 2 466 0
 	ldrh	r5, [r10, #4]
-	.loc 2 465 0
 	ldr	r2, [r3]
 	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
-.LVL193:
-	.loc 2 467 0
 	cmp	r5, #0
 	beq	.L163
-	.loc 2 466 0
 	muls	r5, r2, r5
-.LVL194:
 .L158:
-	.loc 2 470 0
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
-.LVL195:
 	cmp	r3, r2
 	bne	.L159
 	ldrh	r2, [fp, r6]
@@ -2235,11 +1360,8 @@ List_update_data_list:
 	mov	r2, #470
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
-.LVL196:
 	bl	printf
-.LVL197:
 .L159:
-	.loc 2 471 0
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
@@ -2248,77 +1370,45 @@ List_update_data_list:
 	cmp	r2, r3
 	beq	.L156
 .L160:
-	.loc 2 473 0
 	movs	r2, #6
 	muls	r2, r3, r2
-.LVL198:
-	.loc 2 474 0
 	ldr	r3, .L165+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 2 475 0
 	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
-.LVL199:
-	.loc 2 476 0
 	ldr	r1, [r7]
 	add	r2, r2, r1
-.LVL200:
 	ldrh	r3, [r2, #4]
-.LVL201:
-	.loc 2 477 0
 	cbz	r3, .L164
-	.loc 2 476 0
 	muls	r3, r0, r3
-.LVL202:
 .L161:
-	.loc 2 480 0
 	cmp	r5, r3
 	bcs	.L156
-	.loc 2 481 0
 	ldr	r5, .L165+36
-.LVL203:
 	mov	r1, r4
 	ldr	r0, .L165+16
-.LVL204:
 	bl	List_remove_node
-.LVL205:
 	ldrh	r3, [r5]
 	cbnz	r3, .L162
 	movw	r2, #481
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
-.LVL206:
 .L162:
 	ldrh	r3, [r5]
-	.loc 2 482 0
 	mov	r0, r4
-	.loc 2 481 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 482 0
 	bl	INSERT_DATA_LIST
-.LVL207:
 .L156:
-.LBE208:
-.LBE207:
-	.loc 2 485 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL208:
 .L163:
-.LBB210:
-.LBB209:
-	.loc 2 468 0
 	mov	r5, #-1
-.LVL209:
 	b	.L158
-.LVL210:
 .L164:
-	.loc 2 478 0
 	mov	r3, #-1
-.LVL211:
 	b	.L161
 .L166:
 	.align	2
@@ -2333,10 +1423,6 @@ List_update_data_list:
 	.word	.LC1
 	.word	-1431655765
 	.word	.LANCHOR45
-.LBE209:
-.LBE210:
-	.cfi_endproc
-.LFE255:
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -2347,126 +1433,78 @@ List_update_data_list:
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB263:
-	.loc 2 749 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL212:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 754 0
 	movs	r1, #0
 	ldr	r3, .L177
-	.loc 2 755 0
 	movs	r0, #12
 	movw	r5, #65535
-	.loc 2 754 0
 	ldrh	r2, [r3]
-	.loc 2 755 0
 	ldr	r3, .L177+4
 	ldr	r3, [r3]
-.LVL213:
 .L168:
 	uxth	r4, r1
-.LVL214:
-	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
 	bcc	.L170
 	mov	r4, r2
-.LVL215:
 	movs	r1, #0
-.LVL216:
 	mov	r6, #-2147483648
-	.loc 2 765 0
 	movs	r7, #12
 .L171:
 	uxth	r5, r1
-.LVL217:
-	.loc 2 764 0 discriminator 1
 	cmp	r5, r2
 	bcc	.L173
-	.loc 2 773 0
 	cmp	r4, r2
 	bcc	.L169
-	.loc 2 779 0
 	ldr	r1, .L177+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.LVL218:
 .L174:
 	uxth	r5, r1
-.LVL219:
-	.loc 2 778 0 discriminator 1
 	cmp	r5, r2
 	bcc	.L176
-	.loc 2 784 0
 	cmp	r4, r2
 	bcc	.L169
-	.loc 2 784 0 is_stmt 0 discriminator 1
 	mov	r2, #784
 	ldr	r1, .L177+12
 	ldr	r0, .L177+16
-.LVL220:
 	bl	printf
-.LVL221:
 	b	.L169
-.LVL222:
 .L170:
 	adds	r1, r1, #1
-	.loc 2 755 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
 	bne	.L168
-.LVL223:
 .L169:
-	.loc 2 786 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL224:
 .L173:
-	.loc 2 765 0
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
 	blt	.L172
-	.loc 2 766 0
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
-.LVL225:
 	movhi	r4, r5
 .L172:
-.LVL226:
 	adds	r1, r1, #1
-.LVL227:
 	b	.L171
-.LVL228:
 .L176:
-	.loc 2 779 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
 	bls	.L175
-	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
-.LVL229:
 	movne	r4, r5
-.LVL230:
 .L175:
 	adds	r1, r1, #1
-.LVL231:
 	adds	r3, r3, #12
 	b	.L174
 .L178:
@@ -2477,8 +1515,6 @@ select_l2p_ram_region:
 	.word	.LANCHOR56
 	.word	.LANCHOR57
 	.word	.LC1
-	.cfi_endproc
-.LFE263:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
@@ -2489,70 +1525,31 @@ select_l2p_ram_region:
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB269:
-	.loc 2 931 0 is_stmt 1
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL232:
-	.loc 2 934 0
 	ldr	r2, .L189
-	.loc 2 931 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
 	mov	r1, r2
-	.loc 2 934 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
 	bhi	.L180
-	.loc 2 934 0 is_stmt 0 discriminator 1
 	cbnz	r0, .L180
-	.loc 2 934 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 2 943 0 is_stmt 1
 	pop	{r4, r5, r6, pc}
 .L180:
-	.loc 2 935 0
 	movs	r3, #0
-.LBB213:
-.LBB214:
-	.loc 2 937 0
 	ldr	r0, .L189+4
-.LVL233:
-.LBE214:
-.LBE213:
-	.loc 2 935 0
 	strh	r3, [r1]	@ movhi
-.LBB218:
-.LBB215:
-	.loc 2 939 0
 	movw	r6, #65535
 	ldr	r1, .L189+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-.LBE215:
-.LBE218:
-	.loc 2 936 0
 	ldr	r2, .L189+12
-.LBB219:
-.LBB216:
-	.loc 2 939 0
 	ldr	r1, [r1]
-.LBE216:
-.LBE219:
-	.loc 2 936 0
 	str	r3, [r2]
-.LVL234:
 	add	r4, r1, r4, lsl #1
 .L181:
-.LBB220:
-.LBB217:
-	.loc 2 937 0
 	cmp	r1, r4
 	bne	.L183
 	cbz	r3, .L179
@@ -2560,10 +1557,8 @@ FtlUpdateVaildLpn:
 .L179:
 	pop	{r4, r5, r6, pc}
 .L183:
-	.loc 2 939 0
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
-	.loc 2 940 0
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
@@ -2575,10 +1570,6 @@ FtlUpdateVaildLpn:
 	.word	.LANCHOR5
 	.word	.LANCHOR42
 	.word	.LANCHOR59
-.LBE217:
-.LBE220:
-	.cfi_endproc
-.LFE269:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -2589,27 +1580,17 @@ FtlUpdateVaildLpn:
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB275:
-	.loc 2 1396 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL235:
-	.loc 2 1396 0
 	mov	r3, r0
-	.loc 2 1397 0
 	cbz	r1, .L192
 	b	ftl_set_blk_mode.part.6
-.LVL236:
 .L192:
-	.loc 2 1400 0
 	ldr	r2, .L193
 	lsrs	r0, r0, #5
-.LVL237:
 	and	r3, r3, #31
 	ldr	r1, [r2]
-.LVL238:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
@@ -2620,8 +1601,6 @@ ftl_set_blk_mode:
 	.align	2
 .L193:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE275:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -2632,30 +1611,21 @@ ftl_set_blk_mode:
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB276:
-	.loc 2 1404 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL239:
-	.loc 2 1405 0
 	ldr	r3, .L196
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL240:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1406 0
 	and	r0, r0, #1
 	bx	lr
 .L197:
 	.align	2
 .L196:
 	.word	.LANCHOR1
-	.cfi_endproc
-.LFE276:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -2666,81 +1636,46 @@ ftl_get_blk_mode:
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB282:
-	.loc 2 1657 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL241:
-	.loc 2 1659 0
 	movs	r3, #0
-	.loc 2 1657 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL242:
-	.loc 2 1662 0
 	movw	r6, #65535
-	.loc 2 1660 0
 	ldr	r3, .L205
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.LVL243:
 .L199:
-	.loc 2 1660 0 is_stmt 0 discriminator 1
 	cmp	r2, r4
 	bcc	.L201
-	.loc 2 1671 0 is_stmt 1
 	ldr	r3, .L205+4
 	add	r5, r0, #16
-	.loc 2 1669 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
-.LVL244:
-	.loc 2 1671 0
 	movs	r3, #0
 	uxth	r1, r1
-.LVL245:
 .L202:
-	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
 	bhi	.L204
-	.loc 2 1674 0
 	pop	{r4, r5, r6, pc}
-.LVL246:
 .L201:
-	.loc 2 1662 0
 	ldrh	r5, [r3, #2]!
-	.loc 2 1660 0
 	adds	r2, r2, #1
-.LVL247:
 	uxth	r2, r2
-.LVL248:
-	.loc 2 1662 0
 	cmp	r5, r6
-	.loc 2 1664 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
 	b	.L199
-.LVL249:
 .L204:
-	.loc 2 1669 0
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
-.LVL250:
 	cmp	r2, r6
-	.loc 2 1671 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
@@ -2751,8 +1686,6 @@ ftl_sb_update_avl_pages:
 .L205:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
-	.cfi_endproc
-.LFE282:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -2763,81 +1696,46 @@ ftl_sb_update_avl_pages:
 	.fpu softvfp
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
-.LFB285:
-	.loc 2 2062 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL251:
-	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	.loc 2 2062 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2065 0
 	cbz	r3, .L207
-	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L207
-.LVL252:
-.LBB223:
-.LBB224:
-	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2074 0
 	movs	r5, #0
-	.loc 2 2069 0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-.LVL253:
-	.loc 2 2072 0
 	ldr	r2, .L213
 	ldrh	r4, [r2]
-	.loc 2 2070 0
 	mov	r2, r3
 .L210:
 	cmp	r1, r2
 	beq	.L212
-.LVL254:
 .L207:
 	pop	{r4, r5, pc}
-.LVL255:
 .L212:
-	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2072 0
 	cmp	r3, r4
-	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2073 0
 	itttt	eq
 	ldrheq	r3, [r0, #2]
-	.loc 2 2074 0
 	strbeq	r5, [r0, #6]
-	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-.LVL256:
 	b	.L210
 .L214:
 	.align	2
 .L213:
 	.word	.LANCHOR3
-.LBE224:
-.LBE223:
-	.cfi_endproc
-.LFE285:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
@@ -2848,101 +1746,55 @@ FtlSlcSuperblockCheck:
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
-.LFB287:
-	.loc 2 2094 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL257:
-	.loc 2 2097 0
 	ldr	r3, .L220
 	ldrh	r2, [r0]
-	.loc 2 2094 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2097 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L216
-	.loc 2 2097 0 is_stmt 0 discriminator 1
 	movw	r2, #2097
 	ldr	r1, .L220+4
 	ldr	r0, .L220+8
-.LVL258:
 	bl	printf
-.LVL259:
 .L216:
-	.loc 2 2100 0 is_stmt 1
 	ldr	r3, .L220+12
 	add	r6, r4, #16
-	.loc 2 2101 0
 	ldr	r10, .L220+20
-	.loc 2 2102 0
 	movw	r7, #65535
-	.loc 2 2098 0
 	movs	r5, #0
-	.loc 2 2100 0
 	ldrh	r8, [r3]
-	.loc 2 2098 0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2099 0
 	strb	r5, [r4, #7]
-.LVL260:
 .L217:
-	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
 	bhi	.L219
-	.loc 2 2110 0
 	ldr	r2, .L220+16
-	.loc 2 2113 0
 	movs	r0, #0
-	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2111 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2113 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL261:
 .L219:
-	.loc 2 2101 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL262:
-	.loc 2 2102 0
 	strh	r7, [r6]	@ movhi
-	.loc 2 2101 0
 	mov	fp, r0
-.LVL263:
-	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL264:
 	cbnz	r0, .L218
-	.loc 2 2104 0
 	strh	fp, [r6]	@ movhi
-	.loc 2 2105 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
 .L218:
-.LVL265:
 	adds	r5, r5, #1
-.LVL266:
 	adds	r6, r6, #2
 	b	.L217
 .L221:
@@ -2954,8 +1806,6 @@ make_superblock:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.word	.LANCHOR13
-	.cfi_endproc
-.LFE287:
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
@@ -2966,81 +1816,44 @@ make_superblock:
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB296:
-	.loc 2 2454 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL267:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 2458 0
 	movs	r5, #0
 	ldr	r3, .L228
-	.loc 2 2454 0
 	mov	r6, r0
-	.loc 2 2456 0
 	mov	r4, r5
-	.loc 2 2459 0
 	ldr	r10, .L228+12
-	.loc 2 2458 0
 	ldrh	r7, [r3]
-	.loc 2 2461 0
 	ldr	r3, .L228+4
 	ldrh	r8, [r3]
-.LVL268:
 .L223:
-	.loc 2 2458 0 discriminator 1
 	uxth	r3, r5
 	cmp	r7, r3
 	bhi	.L225
-	.loc 2 2463 0
 	cbz	r4, .L227
-	.loc 2 2464 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL269:
 .L226:
-	.loc 2 2465 0
 	ldr	r3, .L228+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
-	.loc 2 2467 0
 	movs	r0, #0
-.LVL270:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL271:
 .L225:
-	.loc 2 2459 0
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL272:
-	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL273:
 	cbnz	r0, .L224
-	.loc 2 2461 0
 	add	r4, r4, r8
-.LVL274:
 	uxth	r4, r4
-.LVL275:
 .L224:
 	adds	r5, r5, #1
-.LVL276:
 	b	.L223
-.LVL277:
 .L227:
 	mov	r0, r4
 	b	.L226
@@ -3051,8 +1864,6 @@ update_multiplier_value:
 	.word	.LANCHOR19
 	.word	.LANCHOR40
 	.word	.LANCHOR13
-	.cfi_endproc
-.LFE296:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
@@ -3063,18 +1874,12 @@ update_multiplier_value:
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB297:
-	.loc 2 2470 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL278:
-	.loc 2 2473 0
 	ldr	r3, .L233
 	ldr	r0, [r3]
 	cbz	r0, .L231
-	.loc 2 2474 0
 	ldr	r3, .L233+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
@@ -3085,9 +1890,7 @@ GetFreeBlockMinEraseCount:
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.LVL279:
 .L231:
-	.loc 2 2476 0
 	bx	lr
 .L234:
 	.align	2
@@ -3096,8 +1899,6 @@ GetFreeBlockMinEraseCount:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.word	.LANCHOR43
-	.cfi_endproc
-.LFE297:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -3108,79 +1909,48 @@ GetFreeBlockMinEraseCount:
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB298:
-	.loc 2 2479 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL280:
-	.loc 2 2484 0
 	ldr	r3, .L243
-	.loc 2 2479 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2484 0
 	ldr	r3, [r3]
 	cbz	r3, .L241
-	.loc 2 2485 0
 	ldr	r2, .L243+4
-	.loc 2 2489 0
 	movs	r5, #6
 	movw	r6, #65535
-	.loc 2 2485 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 2 2486 0
 	it	gt
 	uxthgt	r0, r2
-.LVL281:
-	.loc 2 2487 0
 	ldr	r2, .L243+8
 	ldr	r1, [r2]
 	ldr	r2, .L243+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	.loc 2 2488 0
 	movs	r2, #0
-	.loc 2 2487 0
 	uxth	r3, r3
-.LVL282:
 .L238:
-	.loc 2 2488 0 discriminator 1
 	uxth	r4, r2
 	cmp	r0, r4
 	bls	.L240
-	.loc 2 2489 0
 	mul	r4, r5, r3
 	adds	r2, r2, #1
-.LVL283:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
 	bne	.L242
 .L240:
-	.loc 2 2493 0
 	ldr	r2, .L243+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
-.LVL284:
 	pop	{r4, r5, r6, pc}
-.LVL285:
 .L242:
 	mov	r3, r4
-.LVL286:
 	b	.L238
 .L241:
-	.loc 2 2480 0
 	mov	r0, r3
-.LVL287:
-	.loc 2 2496 0
 	pop	{r4, r5, r6, pc}
 .L244:
 	.align	2
@@ -3190,8 +1960,6 @@ GetFreeBlockMaxEraseCount:
 	.word	.LANCHOR40
 	.word	-1431655765
 	.word	.LANCHOR43
-	.cfi_endproc
-.LFE298:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.FtlPrintInfo2buf,"ax",%progbits
 	.align	1
@@ -3202,566 +1970,314 @@ GetFreeBlockMaxEraseCount:
 	.fpu softvfp
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
-.LFB203:
-	.loc 3 12 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL288:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 12 0
 	mov	r8, r0
-.LVL289:
-	.loc 3 16 0
 	ldr	r1, .L257
 	bl	sprintf
-.LVL290:
-	.loc 3 17 0
 	ldr	r3, .L257+4
-	.loc 3 16 0
 	add	r5, r8, r0
-.LVL291:
-	.loc 3 17 0
 	ldr	r1, .L257+8
 	mov	r0, r5
-	.loc 3 31 0
 	ldr	r4, .L257+12
-	.loc 3 17 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL292:
 	add	r5, r5, r0
-.LVL293:
-	.loc 3 18 0
 	ldr	r1, .L257+16
 	mov	r0, r5
-	.loc 3 32 0
 	ldr	r10, .L257+352
-	.loc 3 18 0
 	bl	sprintf
-.LVL294:
-	.loc 3 19 0
 	ldr	r3, .L257+20
-	.loc 3 18 0
 	add	r5, r5, r0
-.LVL295:
-	.loc 3 19 0
 	ldr	r1, .L257+24
 	mov	r0, r5
-	.loc 3 39 0
 	ldr	r6, .L257+28
-	.loc 3 19 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL296:
-	.loc 3 20 0
 	ldr	r3, .L257+32
-	.loc 3 19 0
 	add	r5, r5, r0
-.LVL297:
-	.loc 3 20 0
 	ldr	r1, .L257+36
 	mov	r0, r5
-	.loc 3 67 0
 	ldr	r7, .L257+40
-	.loc 3 20 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL298:
-	.loc 3 21 0
 	ldr	r3, .L257+44
-	.loc 3 20 0
 	add	r5, r5, r0
-.LVL299:
-	.loc 3 21 0
 	ldr	r1, .L257+48
 	mov	r0, r5
-	.loc 3 72 0
 	ldr	fp, .L257+356
-	.loc 3 21 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL300:
-	.loc 3 22 0
 	ldr	r3, .L257+52
-	.loc 3 21 0
 	add	r5, r5, r0
-.LVL301:
-	.loc 3 22 0
 	ldr	r1, .L257+56
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL302:
-	.loc 3 23 0
 	ldr	r3, .L257+60
-	.loc 3 22 0
 	add	r5, r5, r0
-.LVL303:
-	.loc 3 23 0
 	ldr	r1, .L257+64
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL304:
-	.loc 3 24 0
 	ldr	r3, .L257+68
-	.loc 3 23 0
 	add	r5, r5, r0
-.LVL305:
-	.loc 3 24 0
 	ldr	r1, .L257+72
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL306:
-	.loc 3 25 0
 	ldr	r3, .L257+76
-	.loc 3 24 0
 	add	r5, r5, r0
-.LVL307:
-	.loc 3 25 0
 	ldr	r1, .L257+80
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL308:
-	.loc 3 26 0
 	ldr	r3, .L257+84
-	.loc 3 25 0
 	add	r5, r5, r0
-.LVL309:
-	.loc 3 26 0
 	ldr	r1, .L257+88
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL310:
-	.loc 3 27 0
 	ldr	r3, .L257+92
-	.loc 3 26 0
 	add	r5, r5, r0
-.LVL311:
-	.loc 3 27 0
 	ldr	r1, .L257+96
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL312:
-	.loc 3 28 0
 	ldr	r3, .L257+100
-	.loc 3 27 0
 	add	r5, r5, r0
-.LVL313:
-	.loc 3 28 0
 	ldr	r1, .L257+104
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL314:
-	.loc 3 29 0
 	ldr	r3, .L257+108
-	.loc 3 28 0
 	add	r5, r5, r0
-.LVL315:
-	.loc 3 29 0
 	ldr	r1, .L257+112
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL316:
-	.loc 3 30 0
 	ldr	r3, .L257+116
-	.loc 3 29 0
 	add	r5, r5, r0
-.LVL317:
-	.loc 3 30 0
 	ldr	r1, .L257+120
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL318:
 	add	r5, r5, r0
-.LVL319:
-	.loc 3 31 0
 	ldrh	r2, [r4, #6]
 	ldr	r1, .L257+124
 	mov	r0, r5
 	bl	sprintf
-.LVL320:
 	add	r5, r5, r0
-.LVL321:
-	.loc 3 32 0
 	ldrh	r2, [r10]
 	ldr	r1, .L257+128
 	mov	r0, r5
 	bl	sprintf
-.LVL322:
-	.loc 3 33 0
 	ldr	r3, .L257+132
-	.loc 3 32 0
 	add	r5, r5, r0
-.LVL323:
-	.loc 3 33 0
 	ldr	r1, .L257+136
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL324:
-	.loc 3 34 0
 	ldr	r3, .L257+140
-	.loc 3 33 0
 	add	r5, r5, r0
-.LVL325:
-	.loc 3 34 0
 	ldr	r1, .L257+144
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL326:
-	.loc 3 35 0
 	ldr	r3, .L257+148
-	.loc 3 34 0
 	add	r5, r5, r0
-.LVL327:
-	.loc 3 35 0
 	ldr	r1, .L257+152
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL328:
-	.loc 3 36 0
 	ldr	r3, .L257+156
-	.loc 3 35 0
 	add	r5, r5, r0
-.LVL329:
-	.loc 3 36 0
 	ldr	r1, .L257+160
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL330:
-	.loc 3 37 0
 	ldr	r3, .L257+164
-	.loc 3 36 0
 	add	r5, r5, r0
-.LVL331:
-	.loc 3 37 0
 	ldr	r1, .L257+168
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL332:
-	.loc 3 38 0
 	ldr	r3, .L257+172
-	.loc 3 37 0
 	add	r5, r5, r0
-.LVL333:
-	.loc 3 38 0
 	ldr	r1, .L257+176
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL334:
 	add	r5, r5, r0
-.LVL335:
-	.loc 3 39 0
 	ldrh	r2, [r6, #30]
 	ldr	r1, .L257+180
 	mov	r0, r5
 	bl	sprintf
-.LVL336:
 	add	r5, r5, r0
-.LVL337:
-	.loc 3 40 0
 	ldrh	r2, [r6, #28]
 	ldr	r1, .L257+184
 	mov	r0, r5
 	bl	sprintf
-.LVL338:
-	.loc 3 41 0
 	ldr	r3, .L257+188
-	.loc 3 40 0
 	add	r5, r5, r0
-.LVL339:
-	.loc 3 41 0
 	ldr	r1, .L257+192
 	mov	r0, r5
-	.loc 3 55 0
 	ldr	r6, .L257+196
-	.loc 3 41 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL340:
-	.loc 3 42 0
 	ldr	r3, .L257+200
-	.loc 3 41 0
 	add	r5, r5, r0
-.LVL341:
-	.loc 3 42 0
 	ldr	r1, .L257+204
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL342:
-	.loc 3 43 0
 	ldr	r3, .L257+208
-	.loc 3 42 0
 	add	r5, r5, r0
-.LVL343:
-	.loc 3 43 0
 	ldr	r1, .L257+212
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL344:
-	.loc 3 44 0
 	ldr	r3, .L257+216
-	.loc 3 43 0
 	add	r5, r5, r0
-.LVL345:
-	.loc 3 44 0
 	ldr	r1, .L257+220
 	mov	r0, r5
 	ldrh	r2, [r3, #6]
 	bl	sprintf
-.LVL346:
-	.loc 3 45 0
 	ldr	r3, .L257+224
-	.loc 3 44 0
 	add	r5, r5, r0
-.LVL347:
-	.loc 3 45 0
 	ldr	r1, .L257+228
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL348:
-	.loc 3 46 0
 	ldr	r3, .L257+232
-	.loc 3 45 0
 	add	r5, r5, r0
-.LVL349:
-	.loc 3 46 0
 	ldr	r1, .L257+236
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL350:
-	.loc 3 47 0
 	ldr	r3, .L257+240
-	.loc 3 46 0
 	add	r5, r5, r0
-.LVL351:
-	.loc 3 47 0
 	ldr	r1, .L257+244
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL352:
-	.loc 3 48 0
 	ldr	r3, .L257+248
-	.loc 3 47 0
 	add	r5, r5, r0
-.LVL353:
-	.loc 3 48 0
 	ldr	r1, .L257+252
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL354:
-	.loc 3 49 0
 	ldrh	r2, [r4]
-	.loc 3 48 0
 	add	r5, r5, r0
-.LVL355:
-	.loc 3 50 0
 	ldr	r4, .L257+256
-	.loc 3 49 0
 	mov	r0, r5
 	ldr	r1, .L257+260
 	bl	sprintf
-.LVL356:
 	add	r5, r5, r0
-.LVL357:
-	.loc 3 50 0
 	ldrh	r2, [r4, #2]
 	ldr	r1, .L257+264
 	mov	r0, r5
 	bl	sprintf
-.LVL358:
 	add	r5, r5, r0
-.LVL359:
-	.loc 3 51 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+268
 	mov	r0, r5
 	bl	sprintf
-.LVL360:
 	add	r5, r5, r0
-.LVL361:
-	.loc 3 52 0
 	ldrh	r2, [r4]
 	ldr	r1, .L257+272
 	mov	r0, r5
 	bl	sprintf
-.LVL362:
 	add	r5, r5, r0
-.LVL363:
-	.loc 3 53 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r1, .L257+276
 	mov	r0, r5
 	bl	sprintf
-.LVL364:
 	add	r5, r5, r0
-.LVL365:
-	.loc 3 54 0
 	ldrh	r2, [r4, #4]
 	ldr	r1, .L257+280
 	mov	r0, r5
 	bl	sprintf
-.LVL366:
-	.loc 3 55 0
 	ldr	r3, [r6]
-	.loc 3 54 0
 	add	r5, r5, r0
-.LVL367:
-	.loc 3 55 0
 	ldrh	r2, [r4]
 	mov	r0, r5
-	.loc 3 56 0
 	ldr	r4, .L257+284
-	.loc 3 55 0
 	ldr	r1, .L257+288
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL368:
 	add	r5, r5, r0
-.LVL369:
-	.loc 3 56 0
 	ldrh	r2, [r4, #2]
 	ldr	r1, .L257+292
 	mov	r0, r5
 	bl	sprintf
-.LVL370:
 	add	r5, r5, r0
-.LVL371:
-	.loc 3 57 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+296
 	mov	r0, r5
 	bl	sprintf
-.LVL372:
 	add	r5, r5, r0
-.LVL373:
-	.loc 3 58 0
 	ldrh	r2, [r4]
 	ldr	r1, .L257+300
 	mov	r0, r5
 	bl	sprintf
-.LVL374:
 	add	r5, r5, r0
-.LVL375:
-	.loc 3 59 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r1, .L257+304
 	mov	r0, r5
 	bl	sprintf
-.LVL376:
 	add	r5, r5, r0
-.LVL377:
-	.loc 3 60 0
 	ldrh	r2, [r4, #4]
 	ldr	r1, .L257+308
 	mov	r0, r5
 	bl	sprintf
-.LVL378:
-	.loc 3 61 0
 	ldr	r3, [r6]
-	.loc 3 60 0
 	add	r5, r5, r0
-.LVL379:
-	.loc 3 61 0
 	ldrh	r2, [r4]
 	mov	r0, r5
-	.loc 3 62 0
 	ldr	r4, .L257+312
-	.loc 3 61 0
 	ldr	r1, .L257+316
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL380:
 	add	r5, r5, r0
-.LVL381:
-	.loc 3 62 0
 	ldrh	r2, [r4, #2]
 	ldr	r1, .L257+320
 	mov	r0, r5
 	bl	sprintf
-.LVL382:
 	add	r5, r5, r0
-.LVL383:
-	.loc 3 63 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+324
 	mov	r0, r5
 	bl	sprintf
-.LVL384:
 	add	r5, r5, r0
-.LVL385:
-	.loc 3 64 0
 	ldrh	r2, [r4]
 	ldr	r1, .L257+328
 	mov	r0, r5
 	bl	sprintf
-.LVL386:
 	add	r5, r5, r0
-.LVL387:
-	.loc 3 65 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r1, .L257+332
 	mov	r0, r5
 	bl	sprintf
-.LVL388:
 	add	r5, r5, r0
-.LVL389:
-	.loc 3 66 0
 	ldrh	r2, [r4, #4]
 	ldr	r1, .L257+336
 	mov	r0, r5
 	bl	sprintf
-.LVL390:
 	add	r5, r5, r0
-.LVL391:
-	.loc 3 67 0
 	ldrh	r2, [r7, #2]
 	ldr	r1, .L257+340
 	mov	r0, r5
 	bl	sprintf
-.LVL392:
 	add	r5, r5, r0
-.LVL393:
-	.loc 3 68 0
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
 	ldr	r1, .L257+344
 	mov	r0, r5
 	bl	sprintf
-.LVL394:
 	add	r5, r5, r0
-.LVL395:
-	.loc 3 69 0
 	ldrh	r2, [r7]
 	ldr	r1, .L257+348
 	mov	r0, r5
@@ -3861,172 +2377,103 @@ FtlPrintInfo2buf:
 	.word	.LANCHOR81
 .L258:
 	bl	sprintf
-.LVL396:
 	add	r5, r5, r0
-.LVL397:
-	.loc 3 70 0
 	ldrb	r2, [r7, #8]	@ zero_extendqisi2
 	ldr	r1, .L260
 	mov	r0, r5
 	bl	sprintf
-.LVL398:
 	add	r5, r5, r0
-.LVL399:
-	.loc 3 71 0
 	ldrh	r2, [r7, #4]
 	ldr	r1, .L260+4
 	mov	r0, r5
 	bl	sprintf
-.LVL400:
-	.loc 3 72 0
 	ldr	r3, [fp, #76]
-	.loc 3 71 0
 	add	r5, r5, r0
-.LVL401:
-	.loc 3 72 0
 	ldr	r1, .L260+8
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [fp, #84]
 	ldr	r2, [fp, #80]
 	bl	sprintf
-.LVL402:
 	adds	r4, r5, r0
-.LVL403:
-	.loc 3 73 0
 	ldr	r2, [fp, #72]
 	ldr	r1, .L260+12
 	mov	r0, r4
 	bl	sprintf
-.LVL404:
 	add	r4, r4, r0
-.LVL405:
-	.loc 3 74 0
 	ldr	r2, [fp, #96]
 	ldr	r1, .L260+16
 	mov	r0, r4
 	bl	sprintf
-.LVL406:
-	.loc 3 75 0
 	ldr	r3, .L260+20
-	.loc 3 74 0
 	add	r4, r4, r0
-.LVL407:
-	.loc 3 75 0
 	ldr	r1, .L260+24
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL408:
-	.loc 3 76 0
 	ldr	r3, .L260+28
-	.loc 3 75 0
 	add	r4, r4, r0
-.LVL409:
-	.loc 3 76 0
 	ldr	r1, .L260+32
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL410:
-	.loc 3 77 0
 	ldr	r3, .L260+36
-	.loc 3 76 0
 	add	r4, r4, r0
-.LVL411:
-	.loc 3 77 0
 	ldr	r1, .L260+40
 	mov	r0, r4
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL412:
-	.loc 3 78 0
 	ldr	r3, .L260+44
-	.loc 3 77 0
 	add	r4, r4, r0
-.LVL413:
-	.loc 3 78 0
 	ldr	r1, .L260+48
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL414:
 	add	r4, r4, r0
-.LVL415:
-	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL416:
 	ldr	r1, .L260+52
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL417:
 	add	r4, r4, r0
-.LVL418:
-	.loc 3 80 0
 	ldrh	r0, [r10]
 	bl	GetFreeBlockMaxEraseCount
-.LVL419:
 	ldr	r1, .L260+56
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL420:
-	.loc 3 81 0
 	ldr	r3, .L260+60
-	.loc 3 80 0
 	add	r4, r4, r0
-.LVL421:
-	.loc 3 81 0
 	ldr	r3, [r3]
 	cmp	r3, #1
 	beq	.L246
 .L251:
-	.loc 3 104 0
 	sub	r0, r4, r8
-	.loc 3 105 0
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL422:
 .L246:
-	.cfi_restore_state
-	.loc 3 84 0
 	ldrh	r3, [r7]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L248
-	.loc 3 85 0
 	ldr	r2, [r6]
 	mov	r0, r4
 	ldr	r1, .L260+64
 	ldrh	r2, [r2, r3, lsl #1]
 	bl	sprintf
-.LVL423:
 	add	r4, r4, r0
-.LVL424:
 .L248:
-.LBB225:
-	.loc 3 87 0
 	movs	r0, #0
 	ldr	r5, .L260+68
-	.loc 3 91 0
 	ldr	fp, .L260+84
-	.loc 3 88 0
 	movs	r7, #0
-	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL425:
 	uxth	r3, r0
-.LVL426:
 .L250:
-	.loc 3 89 0
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L249
-	.loc 3 91 0 discriminator 2
 	ldr	r2, [fp]
 	mov	r10, #6
 	mul	r10, r10, r3
@@ -4043,52 +2490,28 @@ FtlPrintInfo2buf:
 	str	r2, [sp]
 	mov	r2, r7
 	bl	sprintf
-.LVL427:
-	.loc 3 88 0 discriminator 2
 	adds	r7, r7, #1
-.LVL428:
-	.loc 3 92 0 discriminator 2
 	ldr	r3, [r5]
-	.loc 3 88 0 discriminator 2
 	cmp	r7, #16
-	.loc 3 91 0 discriminator 2
 	add	r4, r4, r0
-.LVL429:
-	.loc 3 92 0 discriminator 2
 	ldrh	r3, [r3, r10]
-.LVL430:
-	.loc 3 88 0 discriminator 2
 	bne	.L250
 .L249:
-.LBE225:
-.LBB226:
-	.loc 3 96 0
 	ldr	r3, .L260+76
-.LVL431:
-	.loc 3 97 0
 	movs	r7, #0
-.LVL432:
-	.loc 3 96 0
 	ldr	r2, [r5]
-	.loc 3 100 0
 	ldr	r10, .L260+84
-	.loc 3 96 0
 	ldr	r3, [r3]
-	.loc 3 100 0
 	ldr	fp, .L260+88
-	.loc 3 96 0
 	subs	r3, r3, r2
 	ldr	r2, .L260+80
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	uxth	r3, r3
-.LVL433:
 .L252:
-	.loc 3 98 0
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L251
-	.loc 3 100 0 discriminator 2
 	ldr	r2, [r10]
 	movs	r6, #6
 	muls	r6, r3, r6
@@ -4101,20 +2524,11 @@ FtlPrintInfo2buf:
 	ldrh	r2, [r2, #4]
 	str	r2, [sp]
 	mov	r2, r7
-	.loc 3 97 0 discriminator 2
 	adds	r7, r7, #1
-.LVL434:
-	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL435:
-	.loc 3 97 0 discriminator 2
 	cmp	r7, #4
-	.loc 3 100 0 discriminator 2
 	add	r4, r4, r0
-.LVL436:
-	.loc 3 97 0 discriminator 2
 	beq	.L251
-	.loc 3 101 0
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r6]
 	b	.L252
@@ -4144,9 +2558,6 @@ FtlPrintInfo2buf:
 	.word	-1431655765
 	.word	.LANCHOR43
 	.word	.LC69
-.LBE226:
-	.cfi_endproc
-.LFE203:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.section	.text.rknand_proc_ftlread,"ax",%progbits
 	.align	1
@@ -4157,46 +2568,24 @@ FtlPrintInfo2buf:
 	.fpu softvfp
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
-.LFB204:
-	.loc 3 114 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL437:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 114 0
 	mov	r5, r0
-.LVL438:
-	.loc 3 120 0
 	ldr	r2, .L263
 	ldr	r1, .L263+4
 	bl	sprintf
-.LVL439:
 	adds	r4, r5, r0
-.LVL440:
-	.loc 3 122 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL441:
 	add	r0, r0, r4
-.LVL442:
-	.loc 3 124 0
 	subs	r0, r0, r5
-.LVL443:
 	pop	{r3, r4, r5, pc}
-.LVL444:
 .L264:
 	.align	2
 .L263:
 	.word	.LC70
 	.word	.LC71
-	.cfi_endproc
-.LFE204:
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.section	.text.GetSwlReplaceBlock,"ax",%progbits
 	.align	1
@@ -4207,25 +2596,10 @@ rknand_proc_ftlread:
 	.fpu softvfp
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
-.LFB299:
-	.loc 2 2500 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL445:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 2510 0
 	ldr	r3, .L293
 	ldr	r6, .L293+4
 	ldr	r5, [r3]
@@ -4233,208 +2607,134 @@ GetSwlReplaceBlock:
 	ldr	r1, [r6]
 	cmp	r1, r5
 	bcs	.L266
-	.loc 2 2513 0
 	ldr	r2, .L293+8
-	.loc 2 2512 0
 	movs	r3, #0
 	ldr	r4, .L293+12
-	.loc 2 2513 0
 	mov	r0, r3
 	ldrh	r1, [r2]
-	.loc 2 2514 0
 	ldr	r2, .L293+16
-	.loc 2 2512 0
 	str	r3, [r4]
-.LVL446:
-	.loc 2 2514 0
 	ldr	r7, [r2]
-	.loc 2 2513 0
 	mov	r2, r3
-.LVL447:
 .L267:
-	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	r2, r1
 	bcc	.L268
 	cbz	r3, .L269
 	str	r0, [r4]
 .L269:
-	.loc 2 2515 0 is_stmt 1
 	ldr	r7, [r4]
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL448:
-	.loc 2 2516 0
 	ldr	r3, .L293+20
-	.loc 2 2515 0
 	str	r0, [r6]
-	.loc 2 2516 0
 	ldr	r0, [r3]
 	ldr	r3, .L293+24
 	subs	r0, r7, r0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL449:
 	str	r0, [r4]
 .L270:
-	.loc 2 2522 0
 	ldr	r6, [r6]
 	add	r3, r5, #256
 	cmp	r3, r6
 	bls	.L275
-	.loc 2 2522 0 is_stmt 0 discriminator 1
 	ldr	r2, .L293+28
 	add	r3, r5, #768
 	ldr	r2, [r2]
 	cmp	r3, r2
 	bls	.L275
-.LVL450:
 .L277:
-	.loc 2 2523 0 is_stmt 1
 	movw	r4, #65535
 .L276:
-	.loc 2 2569 0
 	mov	r0, r4
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL451:
 .L268:
-	.cfi_restore_state
-	.loc 2 2514 0 discriminator 3
 	ldrh	r3, [r7, r2, lsl #1]
-	.loc 2 2513 0 discriminator 3
 	adds	r2, r2, #1
-.LVL452:
-	.loc 2 2514 0 discriminator 3
 	add	r0, r0, r3
 	movs	r3, #1
 	b	.L267
-.LVL453:
 .L266:
-	.loc 2 2517 0
 	ldr	r2, .L293+28
 	ldr	r3, [r2]
 	cmp	r1, r3
 	bls	.L270
-	.loc 2 2518 0
 	adds	r3, r3, #1
-	.loc 2 2519 0
 	ldr	r0, .L293+8
-	.loc 2 2518 0
 	str	r3, [r2]
-.LVL454:
-	.loc 2 2519 0
 	movs	r2, #0
-	.loc 2 2520 0
 	ldr	r3, .L293+16
 	ldr	r3, [r3]
 	subs	r3, r3, #2
-.LVL455:
 .L272:
-	.loc 2 2519 0 discriminator 1
 	ldrh	r1, [r0]
 	cmp	r2, r1
 	bcs	.L270
-	.loc 2 2520 0 discriminator 3
 	ldrh	r1, [r3, #2]
-	.loc 2 2519 0 discriminator 3
 	adds	r2, r2, #1
-.LVL456:
-	.loc 2 2520 0 discriminator 3
 	adds	r1, r1, #1
 	strh	r1, [r3, #2]!	@ movhi
 	b	.L272
-.LVL457:
 .L275:
-	.loc 2 2525 0
 	ldr	r3, .L293+32
 	ldrh	r0, [r3]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
 	bl	GetFreeBlockMaxEraseCount
-.LVL458:
-	.loc 2 2526 0
 	add	r3, r5, #64
-	.loc 2 2525 0
 	mov	r2, r0
-.LVL459:
-	.loc 2 2526 0
 	cmp	r0, r3
 	bcc	.L277
-	.loc 2 2529 0
 	ldr	r3, .L293+36
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L277
-	.loc 2 2533 0
 	ldr	r1, .L293+8
-	.loc 2 2537 0
 	movs	r0, #0
-.LVL460:
-	.loc 2 2546 0
 	mov	fp, #6
-	.loc 2 2533 0
 	ldrh	r1, [r1]
 	str	r1, [sp, #20]
-	.loc 2 2536 0
 	ldr	r1, .L293+40
 	ldr	r8, [r1]
-	.loc 2 2537 0
 	ldr	r1, .L293+16
 	ldr	r7, [r1]
 	movw	r1, #65535
 	mov	ip, r1
-.LVL461:
 .L278:
-	.loc 2 2531 0
 	ldrh	lr, [r3]
 	movw	r4, #65535
 	cmp	lr, r4
 	bne	.L281
 	mov	r4, ip
-.LVL462:
 .L280:
-	.loc 2 2549 0
 	movw	r3, #65535
 	cmp	r4, r3
 	beq	.L277
-	.loc 2 2551 0
 	ldrh	r7, [r7, r4, lsl #1]
-.LVL463:
 	lsl	r8, r4, #1
-	.loc 2 2552 0
 	cmp	r5, r7
 	bcs	.L282
-	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL464:
 	cmp	r5, r0
-	.loc 2 2555 0
 	it	cc
 	strcc	r1, [r10]
 .L282:
-	.loc 2 2557 0
 	cmp	r6, r7
 	bls	.L277
-	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	r3, r7, #128
 	cmp	r2, r3
 	ble	.L277
-	.loc 2 2559 0 is_stmt 1
 	add	r3, r7, #256
 	ldr	r0, .L293+28
 	cmp	r6, r3
 	bhi	.L283
-	.loc 2 2559 0 is_stmt 0 discriminator 1
 	ldr	r1, [r0]
-.LVL465:
 	add	r3, r7, #768
 	cmp	r3, r1
 	bcs	.L277
 .L283:
-	.loc 2 2561 0 is_stmt 1
 	ldr	r3, .L293+44
 	mov	r1, r4
 	str	r2, [sp, #8]
@@ -4446,53 +2746,32 @@ GetSwlReplaceBlock:
 	ldr	r3, [r0]
 	ldr	r0, .L293+48
 	bl	printf
-.LVL466:
-	.loc 2 2562 0
 	ldr	r3, .L293+52
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 2 2563 0
 	b	.L276
-.LVL467:
 .L281:
-	.loc 2 2532 0
 	adds	r0, r0, #1
-.LVL468:
-	.loc 2 2533 0
 	ldr	r4, [sp, #20]
-	.loc 2 2532 0
 	uxth	r0, r0
-.LVL469:
-	.loc 2 2533 0
 	cmp	r0, r4
 	bhi	.L277
-	.loc 2 2535 0
 	ldrh	r4, [r3, #4]
 	cbz	r4, .L279
-	.loc 2 2536 0
 	ldr	r4, .L293+56
 	sub	r3, r3, r8
-.LVL470:
 	asrs	r3, r3, #1
 	muls	r3, r4, r3
 	uxth	r4, r3
-.LVL471:
-	.loc 2 2537 0
 	ldrh	r3, [r7, r4, lsl #1]
 	cmp	r5, r3
 	bcs	.L280
-	.loc 2 2541 0
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
-.LVL472:
-	.loc 2 2536 0
 	movhi	ip, r4
-.LVL473:
 .L279:
-	.loc 2 2546 0
 	mla	r3, fp, lr, r8
-.LVL474:
 	b	.L278
 .L294:
 	.align	2
@@ -4512,8 +2791,6 @@ GetSwlReplaceBlock:
 	.word	.LC72
 	.word	.LANCHOR87
 	.word	-1431655765
-	.cfi_endproc
-.LFE299:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -4524,45 +2801,24 @@ GetSwlReplaceBlock:
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB300:
-	.loc 2 2573 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL475:
-	.loc 2 2574 0
 	movw	r2, #65535
-	.loc 2 2573 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 2574 0
 	cmp	r0, r2
 	beq	.L296
-.LVL476:
-.LBB229:
-.LBB230:
-	.loc 2 2576 0
 	ldr	r2, .L297
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL477:
 .L296:
-.LBE230:
-.LBE229:
-	.loc 2 2579 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L298:
 	.align	2
 .L297:
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE300:
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
@@ -4573,155 +2829,95 @@ free_data_superblock:
 	.fpu softvfp
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
-.LFB303:
-	.loc 2 2706 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL478:
-	.loc 2 2710 0
 	ldrh	r2, [r0]
-	.loc 2 2706 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 2710 0
 	movw	r3, #65535
-	.loc 2 2706 0
 	mov	r4, r0
-	.loc 2 2710 0
 	cmp	r2, r3
 	bne	.L300
-	.loc 2 2710 0 is_stmt 0 discriminator 1
 	movw	r2, #2710
 	ldr	r1, .L313
 	ldr	r0, .L313+4
-.LVL479:
 	bl	printf
-.LVL480:
 .L300:
-	.loc 2 2711 0 is_stmt 1
 	ldr	r5, .L313+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
 	bne	.L301
-	.loc 2 2711 0 is_stmt 0 discriminator 1
 	movw	r2, #2711
 	ldr	r1, .L313
 	ldr	r0, .L313+4
 	bl	printf
-.LVL481:
 .L301:
-	.loc 2 2712 0 is_stmt 1
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L302
-	.loc 2 2712 0 is_stmt 0 discriminator 1
 	movw	r2, #2712
 	ldr	r1, .L313
 	ldr	r0, .L313+4
 	bl	printf
-.LVL482:
 .L302:
-	.loc 2 2714 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2713 0
 	movs	r3, #0
 	strb	r3, [r4, #10]
-	.loc 2 2715 0
 	movw	r6, #65535
-	.loc 2 2714 0
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.LVL483:
-	.loc 2 2717 0
 	ldr	r2, .L313+12
 	ldrh	r1, [r2]
-	.loc 2 2719 0
 	mov	r2, r3
 .L303:
-	.loc 2 2715 0
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	beq	.L305
-	.loc 2 2724 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2723 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2724 0
 	subs	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2723 0
 	orr	r6, r6, r0, lsl #10
-.LVL484:
-	.loc 2 2731 0
 	movw	r0, #65535
-.LVL485:
-	.loc 2 2724 0
 	strh	r2, [r4, #4]	@ movhi
 .L307:
-	.loc 2 2726 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2727 0
 	cmp	r1, r3
-	.loc 2 2728 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2729 0
 	moveq	r3, #0
-	.loc 2 2731 0
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
 	beq	.L307
 	strb	r3, [r4, #6]
-	.loc 2 2733 0
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r1, r3
 	bne	.L299
-	.loc 2 2733 0 is_stmt 0 discriminator 1
 	cbz	r2, .L299
-	.loc 2 2733 0 discriminator 2
 	movw	r2, #2733
 	ldr	r1, .L313
 	ldr	r0, .L313+4
 	bl	printf
-.LVL486:
 .L299:
-	.loc 2 2735 0 is_stmt 1
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL487:
 .L305:
-	.loc 2 2716 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2717 0
 	cmp	r3, r1
-	.loc 2 2716 0
 	strb	r3, [r4, #6]
-	.loc 2 2718 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
-	.loc 2 2719 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2718 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2721 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-.LVL488:
 	b	.L303
 .L314:
 	.align	2
@@ -4730,8 +2926,6 @@ get_new_active_ppa:
 	.word	.LC1
 	.word	.LANCHOR19
 	.word	.LANCHOR3
-	.cfi_endproc
-.LFE303:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -4742,147 +2936,84 @@ get_new_active_ppa:
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB306:
-	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
-	.loc 5 22 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 25 0
 	movs	r3, #0
-	.loc 5 27 0
 	ldr	r1, .L320
 	mov	fp, #1
-	.loc 5 25 0
 	ldr	r2, .L320+4
-	.loc 5 27 0
 	ldr	r5, [r1]
-	.loc 5 28 0
 	ldr	r1, .L320+8
-	.loc 5 25 0
 	str	r3, [r2]
-.LVL489:
-	.loc 5 26 0
 	ldr	r2, .L320+12
 	mov	r0, r5
-	.loc 5 28 0
 	ldr	r1, [r1]
-	.loc 5 26 0
 	ldrh	r2, [r2]
-	.loc 5 28 0
 	str	r1, [sp, #4]
 	ldr	r1, .L320+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
-	.loc 5 29 0
 	ldr	r1, .L320+20
 	ldr	r10, [r1]
 	ldr	r1, .L320+24
 	ldrh	r7, [r1]
-	.loc 5 30 0
 	ldr	r1, .L320+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
 	adds	r4, r4, #8
 	add	r8, r5, r1
-	.loc 5 26 0
 	mov	r1, r3
-.LVL490:
 .L316:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
-	.loc 5 26 0 is_stmt 0 discriminator 1
 	cmp	r0, r8
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
 	bne	.L317
-	.loc 5 34 0 is_stmt 1
 	ldr	r3, .L320+32
-	.loc 5 35 0
 	mov	lr, #12
 	mov	r8, #0
-	.loc 5 34 0
 	ldr	r0, [r3]
-	.loc 5 36 0
 	ldr	r3, .L320+8
 	ldr	r4, [r3]
-	.loc 5 37 0
 	ldr	r3, .L320+20
 	ldr	ip, [r3]
 .L318:
-.LVL491:
-	.loc 5 34 0 discriminator 1
 	cmp	r2, r0
 	bcc	.L319
-	.loc 5 39 0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL492:
 .L317:
-	.cfi_restore_state
-	.loc 5 28 0 discriminator 3
 	bic	r1, r1, #3
-	.loc 5 29 0 discriminator 3
 	bic	r3, r3, #3
-	.loc 5 28 0 discriminator 3
 	mov	r6, r1
 	ldr	r1, [sp, #4]
-	.loc 5 29 0 discriminator 3
 	add	r3, r3, r10
-	.loc 5 27 0 discriminator 3
 	str	fp, [r0, #-4]
-	.loc 5 29 0 discriminator 3
 	str	r3, [r0, #-8]
-	.loc 5 28 0 discriminator 3
 	add	r6, r6, r1
-	.loc 5 31 0 discriminator 3
 	mov	r1, lr
-	.loc 5 28 0 discriminator 3
 	str	r6, [r0, #-12]
-	.loc 5 31 0 discriminator 3
 	str	r3, [r4, #-16]
 	mov	r3, ip
-	.loc 5 30 0 discriminator 3
 	str	r6, [r4, #-20]
 	b	.L316
-.LVL493:
 .L319:
-	.loc 5 36 0 discriminator 3
 	ldr	r3, [sp]
-	.loc 5 35 0 discriminator 3
 	mul	r10, lr, r2
-	.loc 5 36 0 discriminator 3
 	muls	r3, r2, r3
-	.loc 5 35 0 discriminator 3
 	add	r1, r5, r10
 	str	r8, [r1, #8]
-	.loc 5 36 0 discriminator 3
 	bic	r3, r3, #3
 	add	r3, r3, r4
 	str	r3, [r5, r10]
-	.loc 5 37 0 discriminator 3
 	mul	r3, r2, r7
-	.loc 5 34 0 discriminator 3
 	adds	r2, r2, #1
-.LVL494:
 	uxth	r2, r2
-.LVL495:
-	.loc 5 37 0 discriminator 3
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
@@ -4899,8 +3030,6 @@ FtlGcBufInit:
 	.word	.LANCHOR24
 	.word	.LANCHOR93
 	.word	.LANCHOR94
-	.cfi_endproc
-.LFE306:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -4911,80 +3040,45 @@ FtlGcBufInit:
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB307:
-	.loc 5 42 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL496:
-	.loc 5 47 0
 	ldr	r3, .L329
-	.loc 5 48 0
 	mov	ip, #12
-	.loc 5 42 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 46 0
 	movs	r4, #0
-	.loc 5 48 0
 	mov	fp, #20
-	.loc 5 49 0
 	mov	lr, r4
-	.loc 5 47 0
 	ldr	r7, [r3]
-	.loc 5 48 0
 	ldr	r3, .L329+4
 	ldr	r5, [r3]
-.LVL497:
 .L323:
 	uxth	r3, r4
-	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
 	bls	.L322
-	.loc 5 48 0
 	mla	r8, fp, r3, r0
 	movs	r2, #0
 .L324:
-.LVL498:
 	uxth	r3, r2
-	.loc 5 47 0 discriminator 1
 	cmp	r7, r3
 	bls	.L325
-	.loc 5 48 0
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
-.LVL499:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
 	bne	.L324
-	.loc 5 49 0
 	str	lr, [r10, #8]
 .L325:
-.LVL500:
 	adds	r4, r4, #1
-.LVL501:
 	b	.L323
-.LVL502:
 .L322:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL503:
 .L330:
 	.align	2
 .L329:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
-	.cfi_endproc
-.LFE307:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -4995,84 +3089,47 @@ FtlGcBufFree:
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB308:
-	.loc 5 57 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL504:
-	.loc 5 62 0
 	ldr	r3, .L338
-	.loc 5 61 0
 	movs	r2, #0
-	.loc 5 57 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 28
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 5 63 0
 	mov	ip, #12
-	.loc 5 64 0
 	movs	r7, #1
-	.loc 5 65 0
 	mov	lr, #20
-	.loc 5 62 0
 	ldr	r4, [r3]
-	.loc 5 63 0
 	ldr	r3, .L338+4
 	ldr	r5, [r3]
-.LVL505:
 .L332:
 	uxth	r8, r2
-	.loc 5 61 0 discriminator 1
 	cmp	r1, r8
 	bhi	.L336
-	.loc 5 71 0
 	pop	{r4, r5, r6, r7, r8, r10, pc}
 .L336:
 	mov	r10, #0
 .L333:
-.LVL506:
 	uxth	r3, r10
-	.loc 5 62 0 discriminator 1
 	cmp	r4, r3
 	bls	.L334
-	.loc 5 63 0
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
-.LVL507:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
 	bne	.L333
-	.loc 5 65 0
 	mla	r8, lr, r8, r0
-	.loc 5 64 0
 	str	r7, [r3, #8]
-	.loc 5 65 0
 	ldr	r6, [r3]
-	.loc 5 66 0
 	ldr	r3, [r3, #4]
-	.loc 5 65 0
 	str	r6, [r8, #8]
-	.loc 5 66 0
 	str	r3, [r8, #12]
 .L334:
-.LVL508:
 	adds	r2, r2, #1
-.LVL509:
 	b	.L332
 .L339:
 	.align	2
 .L338:
 	.word	.LANCHOR94
 	.word	.LANCHOR90
-	.cfi_endproc
-.LFE308:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -5083,48 +3140,30 @@ FtlGcBufAlloc:
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB309:
-	.loc 5 74 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL510:
-	.loc 5 78 0
 	ldr	r3, .L345
-	.loc 5 77 0
 	ldr	r2, .L345+4
-	.loc 5 78 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.LVL511:
 .L341:
-	.loc 5 77 0 discriminator 1
 	cmp	r3, r2
 	bne	.L343
-	.loc 5 81 0
 	movs	r0, #0
-.LVL512:
 	bx	lr
-.LVL513:
 .L343:
-	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
 	bne	.L341
-	.loc 5 79 0
 	movs	r0, #1
-.LVL514:
-	.loc 5 82 0
 	bx	lr
 .L346:
 	.align	2
 .L345:
 	.word	.LANCHOR95
 	.word	.LANCHOR96
-	.cfi_endproc
-.LFE309:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -5135,87 +3174,49 @@ IsBlkInGcList:
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB310:
-	.loc 5 85 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL515:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 5 85 0
 	mov	r5, r0
-	.loc 5 91 0
 	ldr	r4, .L351
-	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL516:
-	.loc 5 85 0
 	mov	r6, r1
 	mov	r7, r2
-	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL517:
-	.loc 5 92 0
 	ldr	r3, .L351+4
-	.loc 5 91 0
 	ldrh	r1, [r4]
-	.loc 5 92 0
 	ldr	r2, [r3]
-	.loc 5 91 0
 	movs	r3, #0
-.LVL518:
 .L348:
 	uxth	ip, r3
-.LVL519:
-	.loc 5 91 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
 	bcc	.L350
-	.loc 5 96 0 is_stmt 1
 	bne	.L349
-	.loc 5 97 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
-	.loc 5 98 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	b	.L349
 .L350:
 	adds	r3, r3, #1
-	.loc 5 92 0
 	add	ip, r2, r3, lsl #1
-.LVL520:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
 	bne	.L348
 .L349:
-	.loc 5 101 0
 	ldr	r2, .L351+8
 	movs	r0, #12
-.LVL521:
 	ldr	r1, .L351+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
-	.loc 5 107 0
 	adds	r3, r3, #1
-	.loc 5 101 0
 	adds	r4, r1, r0
 	str	r6, [r4, #4]
-	.loc 5 102 0
 	str	r7, [r4, #8]
-	.loc 5 103 0
 	str	r5, [r1, r0]
-	.loc 5 107 0
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL522:
 .L352:
 	.align	2
 .L351:
@@ -5223,8 +3224,6 @@ FtlGcUpdatePage:
 	.word	.LANCHOR95
 	.word	.LANCHOR97
 	.word	.LANCHOR98
-	.cfi_endproc
-.LFE310:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -5235,51 +3234,30 @@ FtlGcUpdatePage:
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB317:
-	.loc 5 345 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL523:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 5 347 0
 	mov	r1, r0
-	.loc 5 345 0
 	mov	r4, r0
-	.loc 5 347 0
 	ldr	r0, .L356
-.LVL524:
 	bl	printf
-.LVL525:
-	.loc 5 349 0
 	ldr	r0, .L356+4
 	ldrh	r5, [r0]
 	cmp	r4, r5
 	beq	.L354
-	.loc 5 349 0 is_stmt 0 discriminator 1
 	ldr	r3, .L356+8
 	ldrh	r1, [r3]
 	cmp	r4, r1
 	beq	.L354
-	.loc 5 351 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r5, r2
 	bne	.L355
-	.loc 5 352 0
 	strh	r4, [r0]	@ movhi
 .L354:
-	.loc 5 356 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
 .L355:
-	.loc 5 353 0
 	cmp	r1, r2
-	.loc 5 354 0
 	it	eq
 	strheq	r4, [r3]	@ movhi
 	b	.L354
@@ -5289,8 +3267,6 @@ FtlGcRefreshBlock:
 	.word	.LC73
 	.word	.LANCHOR99
 	.word	.LANCHOR100
-	.cfi_endproc
-.LFE317:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -5301,83 +3277,48 @@ FtlGcRefreshBlock:
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB318:
-	.loc 5 359 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL526:
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 5 359 0
 	mov	r5, r0
-	.loc 5 364 0
 	ldr	r4, .L362
-	.loc 5 361 0
 	bl	P2V_block_in_plane
-.LVL527:
-	.loc 5 364 0
 	mov	r2, r5
-	.loc 5 361 0
 	mov	r6, r0
-.LVL528:
-	.loc 5 364 0
 	ldrh	r1, [r4]
 	ldr	r0, .L362+4
 	bl	printf
-.LVL529:
-	.loc 5 366 0
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
-.LVL530:
-	.loc 5 368 0
 	ldrh	r3, [r4]
 	movs	r2, #0
-	.loc 5 369 0
 	ldr	r0, .L362+8
-.LVL531:
 .L359:
-	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
 	bhi	.L361
-	.loc 5 372 0
 	cmp	r3, #15
-	.loc 5 373 0
 	itttt	ls
 	addls	r2, r3, #1
-.LVL532:
 	strhls	r2, [r4]	@ movhi
 	ldrls	r2, .L362+8
 	strhls	r5, [r2, r3, lsl #1]	@ movhi
 	b	.L360
-.LVL533:
 .L361:
 	adds	r2, r2, #1
-.LVL534:
-	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
-.LVL535:
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
 	bne	.L359
 .L360:
-	.loc 5 375 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL536:
 .L363:
 	.align	2
 .L362:
 	.word	.LANCHOR101
 	.word	.LC74
 	.word	.LANCHOR102
-	.cfi_endproc
-.LFE318:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -5388,53 +3329,32 @@ FtlGcMarkBadPhyBlk:
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB319:
-	.loc 5 379 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 380 0
 	ldr	r3, .L370
-	.loc 5 379 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 5 380 0
 	ldrh	r3, [r3]
 	cbz	r3, .L365
-	.loc 5 380 0 is_stmt 0 discriminator 1
 	ldr	r2, .L370+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
 	bne	.L365
-	.loc 5 381 0 is_stmt 1
 	ldr	r4, .L370+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	.loc 5 382 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB233:
-.LBB234:
-	.loc 5 383 0
 	ldr	r3, .L370+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
-.LVL537:
 	bl	FtlGcRefreshBlock
-.LVL538:
-	.loc 5 384 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 .L365:
-.LBE234:
-.LBE233:
-	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
 .L371:
@@ -5444,59 +3364,36 @@ FtlGcReFreshBadBlk:
 	.word	.LANCHOR99
 	.word	.LANCHOR103
 	.word	.LANCHOR102
-	.cfi_endproc
-.LFE319:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_free,"ax",%progbits
+	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
-	.global	ftl_free
+	.global	ftl_malloc
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_free, %function
-ftl_free:
-.LFB340:
-	.loc 1 24 0
-	.cfi_startproc
+	.type	ftl_malloc, %function
+ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL539:
-.LBB235:
-.LBB236:
-	.file 6 "include/linux/compat.h"
-	.loc 6 80 0
-	b	free
-.LVL540:
-.LBE236:
-.LBE235:
-	.cfi_endproc
-.LFE340:
-	.size	ftl_free, .-ftl_free
-	.section	.text.ftl_malloc,"ax",%progbits
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	ftl_malloc
+	.global	ftl_free
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_malloc, %function
-ftl_malloc:
-.LFB341:
-	.loc 1 28 0
-	.cfi_startproc
+	.type	ftl_free, %function
+ftl_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL541:
-	.loc 1 29 0
-	movs	r1, #0
-	b	kmalloc
-.LVL542:
-	.cfi_endproc
-.LFE341:
-	.size	ftl_malloc, .-ftl_malloc
+	b	free
+	.size	ftl_free, .-ftl_free
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
 	.global	rknand_print_hex
@@ -5506,108 +3403,52 @@ ftl_malloc:
 	.fpu softvfp
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB342:
-	.loc 1 33 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL543:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 40 0
 	movs	r6, #0
-	.loc 1 33 0
 	mov	fp, r0
 	mov	r7, r1
-.LVL544:
 	mov	r8, r2
 	mov	r10, r3
-	.loc 1 39 0
 	mov	r5, r6
-	.loc 1 40 0
 	mov	r4, r6
-.LVL545:
 .L375:
-	.loc 1 40 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
 	bcc	.L381
-	.loc 1 55 0 is_stmt 1
 	ldr	r0, .L384
-	.loc 1 56 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 11
-	.cfi_restore 10
-	.cfi_restore 8
-	.cfi_restore 7
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL546:
-	.loc 1 55 0
 	b	printf
-.LVL547:
 .L381:
-	.cfi_restore_state
-	.loc 1 41 0
 	cbnz	r5, .L376
-	.loc 1 42 0
 	mov	r2, r6
 	mov	r1, fp
 	ldr	r0, .L384+4
 	bl	printf
-.LVL548:
 .L376:
-	.loc 1 44 0
 	cmp	r8, #4
 	bne	.L377
-	.loc 1 45 0
 	ldr	r1, [r7, r4, lsl #2]
 .L383:
-	.loc 1 47 0
 	ldr	r0, .L384+8
 .L382:
-	.loc 1 50 0
 	adds	r5, r5, #1
-.LVL549:
-	.loc 1 49 0
 	bl	printf
-.LVL550:
-	.loc 1 50 0
 	cmp	r5, #15
 	bls	.L380
-.LVL551:
-	.loc 1 51 0
 	movs	r5, #0
-	.loc 1 52 0
 	ldr	r0, .L384
 	bl	printf
-.LVL552:
 .L380:
-	.loc 1 40 0 discriminator 2
 	adds	r4, r4, #1
-.LVL553:
 	add	r6, r6, r8
 	b	.L375
 .L377:
-	.loc 1 46 0
 	cmp	r8, #2
 	bne	.L379
-	.loc 1 47 0
 	ldrsh	r1, [r7, r4, lsl #1]
 	b	.L383
 .L379:
-	.loc 1 49 0
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
 	ldr	r0, .L384+12
 	b	.L382
@@ -5618,8 +3459,6 @@ rknand_print_hex:
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
-	.cfi_endproc
-.LFE342:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
@@ -5630,91 +3469,51 @@ rknand_print_hex:
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB344:
-	.loc 1 85 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL554:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 1 85 0
 	mov	r8, r1
-	.loc 1 87 0
 	ldr	r3, .L404
 	mov	r4, r0
-	.loc 1 91 0
 	movs	r5, #0
-	.loc 1 92 0
 	ldr	fp, .L404+12
-	.loc 1 87 0
 	ldrh	r2, [r3, #12]
-.LVL555:
 	mov	r10, r3
 	str	r2, [sp, #4]
-.LVL556:
 .L387:
-	.loc 1 91 0 discriminator 1
 	cmp	r5, r8
 	bne	.L394
-	.loc 1 112 0
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL557:
 .L394:
-	.cfi_restore_state
-	.loc 1 92 0
 	ldr	r3, [r4, #8]
 	cbz	r3, .L388
-	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
 	cbnz	r3, .L389
 .L388:
-	.loc 1 92 0 discriminator 3
-	movs	r2, #92
+	movs	r2, #96
 	ldr	r1, .L404+4
 	mov	r0, fp
 	bl	printf
-.LVL558:
 .L389:
-	.loc 1 94 0 is_stmt 1
 	ldr	r6, .L404+8
-	.loc 1 93 0
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL559:
-	.loc 1 94 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	ldr	r7, [r6, #12]
 	blx	r7
-.LVL560:
-	.loc 1 99 0
 	ldrh	r3, [r10, #14]
-	.loc 1 98 0
 	str	r0, [r4]
-	.loc 1 99 0
 	cmp	r3, #4
 	bne	.L391
-	.loc 1 100 0
 	ldr	r0, [sp, #4]
-.LVL561:
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
@@ -5724,34 +3523,23 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r6
-.LVL562:
-	.loc 1 104 0
 	adds	r0, r0, #1
-.LVL563:
 	beq	.L392
-	.loc 1 105 0 discriminator 1
 	ldr	r3, [r4, #12]
-	.loc 1 104 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
 	bne	.L391
-	.loc 1 105 0
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
 	bne	.L391
-	.loc 1 106 0
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	beq	.L391
 .L392:
-	.loc 1 108 0
 	mov	r3, #-1
 	str	r3, [r4]
-.LVL564:
 .L391:
-	.loc 1 91 0 discriminator 2
 	adds	r5, r5, #1
-.LVL565:
 	adds	r4, r4, #20
 	b	.L387
 .L405:
@@ -5761,8 +3549,6 @@ FlashReadPages:
 	.word	.LANCHOR104
 	.word	.LANCHOR105
 	.word	.LC1
-	.cfi_endproc
-.LFE344:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -5773,106 +3559,59 @@ FlashReadPages:
 	.fpu softvfp
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
-.LFB233:
-	.loc 4 279 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 4 286 0
 	ldr	r3, .L416
-	.loc 4 279 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 289 0
 	movs	r6, #0
-	.loc 4 286 0
 	ldr	r5, .L416+4
 	ldr	r3, [r3]
 	ldr	r7, .L416+8
-	.loc 4 291 0
 	ldr	r10, .L416+20
-	.loc 4 286 0
 	str	r3, [r5, #8]
-	.loc 4 287 0
 	ldr	r3, .L416+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.LVL566:
 .L407:
-	.loc 4 289 0 discriminator 1
 	ldr	r3, .L416+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
 	bcc	.L412
-	.loc 4 314 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL567:
 .L412:
-	.loc 4 291 0
 	ldrh	r4, [r10]
-	.loc 4 290 0
 	movw	r3, #65535
-	.loc 4 294 0
 	ldr	fp, .L416+4
-	.loc 4 290 0
 	strh	r3, [r7, #2]!	@ movhi
-	.loc 4 291 0
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL568:
 .L408:
-	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
 	bgt	.L410
-.LVL569:
-	.loc 4 292 0 is_stmt 1
 	mla	r3, r6, r3, r4
-.LVL570:
-	.loc 4 294 0
 	movs	r2, #1
-.LVL571:
 	mov	r1, r2
 	mov	r0, fp
-	.loc 4 292 0
 	lsls	r3, r3, #10
-	.loc 4 293 0
 	str	r3, [r5, #4]
-	.loc 4 294 0
 	bl	FlashReadPages
-.LVL572:
-	.loc 4 295 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	beq	.L409
-	.loc 4 301 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
 	bne	.L409
-	.loc 4 303 0
 	strh	r4, [r7]	@ movhi
 .L410:
-	.loc 4 289 0 discriminator 2
 	adds	r6, r6, #1
-.LVL573:
 	b	.L407
 .L409:
-	.loc 4 291 0 discriminator 2
 	subs	r4, r4, #1
-.LVL574:
 	uxth	r4, r4
-.LVL575:
 	b	.L408
 .L417:
 	.align	2
@@ -5883,8 +3622,6 @@ FtlLoadFactoryBbt:
 	.word	.LANCHOR108
 	.word	.LANCHOR10
 	.word	.LANCHOR17
-	.cfi_endproc
-.LFE233:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
@@ -5895,127 +3632,65 @@ FtlLoadFactoryBbt:
 	.fpu softvfp
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
-.LFB239:
-	.loc 2 47 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL576:
-	.loc 2 51 0
 	cmp	r1, #1
-	.loc 2 47 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 51 0
 	it	eq
 	ldreq	r3, .L427
-	.loc 2 47 0
 	sub	sp, sp, #88
-	.cfi_def_cfa_offset 112
-	.loc 2 57 0
 	lsl	r7, r0, #10
-	.loc 2 58 0
 	mov	r2, r1
-	.loc 2 51 0
 	it	ne
 	ldrne	r3, .L427+4
-	.loc 2 47 0
 	mov	r6, r1
-	.loc 2 58 0
 	add	r0, sp, #4
-.LVL577:
 	movs	r1, #1
-.LVL578:
-	.loc 2 51 0
 	ldrh	r5, [r3]
-.LVL579:
-	.loc 2 53 0
 	ldr	r3, .L427+8
-	.loc 2 56 0
 	subs	r5, r5, #1
-.LVL580:
 	sxth	r5, r5
-.LVL581:
-	.loc 2 53 0
 	str	r3, [sp, #12]
-	.loc 2 54 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-.LVL582:
-	.loc 2 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
-	.loc 2 58 0
 	bl	FlashReadPages
-.LVL583:
-	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	bne	.L421
 	mov	r8, #0
-.LVL584:
 .L422:
-	.loc 2 60 0
 	cmp	r8, r5
 	ble	.L425
-.LVL585:
 .L421:
-	.loc 2 73 0
 	mov	r0, r5
 	add	sp, sp, #88
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL586:
 .L425:
-	.cfi_restore_state
-	.loc 2 61 0
 	add	r3, r8, r5
-	.loc 2 63 0
 	mov	r2, r6
-	.loc 2 61 0
 	add	r3, r3, r3, lsr #31
-	.loc 2 63 0
 	movs	r1, #1
 	add	r0, sp, #4
-	.loc 2 61 0
 	asrs	r4, r3, #1
-.LVL587:
-	.loc 2 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
-	.loc 2 63 0
 	bl	FlashReadPages
-.LVL588:
-	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	bne	.L423
-	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	bne	.L423
-	.loc 2 66 0 is_stmt 1
 	subs	r4, r4, #1
-.LVL589:
 	sxth	r5, r4
-.LVL590:
 	b	.L422
-.LVL591:
 .L423:
-	.loc 2 68 0
 	adds	r4, r4, #1
-.LVL592:
 	sxth	r8, r4
-.LVL593:
 	b	.L422
 .L428:
 	.align	2
@@ -6023,8 +3698,6 @@ FtlGetLastWrittenPage:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	ftl_temp_buf
-	.cfi_endproc
-.LFE239:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
@@ -6035,82 +3708,45 @@ FtlGetLastWrittenPage:
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB345:
-	.loc 1 115 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL594:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #40
-	.cfi_def_cfa_offset 72
-	.loc 1 115 0
 	str	r3, [sp]
 	mov	r10, r1
 	mov	r7, r2
 	mov	r4, r0
-	.loc 1 117 0
 	ldr	r3, .L459
-.LVL595:
-	.loc 1 121 0
 	mov	r5, r0
 	movs	r6, #0
-	.loc 1 117 0
 	ldrh	r8, [r3, #12]
-.LVL596:
 	str	r3, [sp, #4]
-.LVL597:
 .L430:
-	.loc 1 121 0 discriminator 1
 	cmp	r6, r10
 	bne	.L438
-	.loc 1 142 0
 	ldr	r3, [sp]
 	cmp	r3, #0
 	bne	.L445
-.LVL598:
 .L458:
-	.loc 1 172 0
 	movs	r0, #0
 	add	sp, sp, #40
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL599:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL600:
 .L438:
-	.cfi_restore_state
-	.loc 1 122 0
 	ldr	r3, [r5, #8]
 	cbz	r3, .L431
-	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
 	cbnz	r3, .L432
 .L431:
-	.loc 1 122 0 discriminator 3
-	movs	r2, #122
+	movs	r2, #126
 	ldr	r1, .L459+4
 	ldr	r0, .L459+8
 	bl	printf
-.LVL601:
 .L432:
-	.loc 1 123 0 is_stmt 1
 	add	r2, sp, #12
 	add	r1, sp, #16
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL602:
-	.loc 1 124 0
 	ldr	r3, .L459+12
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
@@ -6118,18 +3754,13 @@ FlashProgPages:
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r3, [r5, #12]
 	blx	fp
-.LVL603:
-	.loc 1 129 0
 	cbnz	r0, .L433
-	.loc 1 128 0
 	str	r0, [r5]
 .L434:
-	.loc 1 132 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
 	bne	.L436
-	.loc 1 133 0
 	ldr	r1, .L459+12
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
@@ -6138,119 +3769,73 @@ FlashProgPages:
 	adds	r3, r3, #8
 	add	r2, r2, #2048
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-.LVL604:
 	add	r1, r1, r8
 	blx	fp
-.LVL605:
-	.loc 1 137 0
 	cbz	r0, .L436
-	.loc 1 138 0
 	mov	r3, #-1
 	str	r3, [r5]
 .L436:
-	.loc 1 121 0 discriminator 2
 	adds	r6, r6, #1
-.LVL606:
 	adds	r5, r5, #20
 	b	.L430
 .L433:
-	.loc 1 130 0
 	mov	r3, #-1
 	str	r3, [r5]
 	b	.L434
-.LVL607:
 .L443:
-.LBB237:
-	.loc 1 147 0
 	movs	r3, #0
-	.loc 1 153 0
 	mov	r2, r7
-	.loc 1 147 0
 	str	r3, [r8]
-	.loc 1 153 0
 	movs	r1, #1
-	.loc 1 148 0
 	str	r3, [r10]
-	.loc 1 153 0
 	add	r0, sp, #20
-	.loc 1 149 0
 	ldr	r3, [r4, #4]
-	.loc 1 150 0
 	str	r8, [sp, #28]
-	.loc 1 151 0
 	str	r10, [sp, #32]
-	.loc 1 149 0
 	str	r3, [sp, #24]
-	.loc 1 153 0
 	bl	FlashReadPages
-.LVL608:
-	.loc 1 154 0
 	ldr	fp, [sp, #20]
 	cmp	fp, #-1
 	bne	.L440
-	.loc 1 155 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L459+16
 	bl	printf
-.LVL609:
-	.loc 1 156 0
 	str	fp, [r4]
 .L440:
-	.loc 1 158 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L441
-	.loc 1 159 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	cmp	r2, r3
 	beq	.L441
-	.loc 1 160 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L459+20
 	bl	printf
-.LVL610:
-	.loc 1 161 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L441:
-	.loc 1 164 0
 	ldr	r3, [r4, #8]
 	cbz	r3, .L442
-	.loc 1 165 0
 	ldr	r2, [r3]
 	ldr	r3, [r8]
 	cmp	r2, r3
 	beq	.L442
-	.loc 1 166 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L459+24
 	bl	printf
-.LVL611:
-	.loc 1 167 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L442:
-.LBE237:
-	.loc 1 144 0 discriminator 2
 	adds	r5, r5, #1
-.LVL612:
 	adds	r4, r4, #20
-.LVL613:
 .L439:
-	.loc 1 144 0 is_stmt 0 discriminator 1
 	cmp	r6, r5
 	bne	.L443
 	b	.L458
-.LVL614:
 .L445:
 	movs	r5, #0
-.LBB238:
-	.loc 1 147 0 is_stmt 1
 	ldr	r8, .L459+28
-.LVL615:
-	.loc 1 148 0
 	ldr	r10, .L459+32
-.LVL616:
 	b	.L439
 .L460:
 	.align	2
@@ -6264,9 +3849,6 @@ FlashProgPages:
 	.word	.LC81
 	.word	check_buf
 	.word	.LANCHOR110
-.LBE238:
-	.cfi_endproc
-.LFE345:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -6277,89 +3859,50 @@ FlashProgPages:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB346:
-	.loc 1 175 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL617:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 1 175 0
 	mov	r7, r2
-	.loc 1 178 0
 	ldr	r5, .L472
 	adds	r4, r0, #4
-	.loc 1 181 0
 	movs	r6, #0
-	.loc 1 183 0
 	ldr	r10, .L472+4
-	.loc 1 178 0
 	ldrh	r8, [r5, #12]
-.LVL618:
 .L462:
-	.loc 1 181 0 discriminator 1
 	cmp	r6, r7
 	bne	.L468
-	.loc 1 194 0
 	movs	r0, #0
 	add	sp, sp, #12
-	.cfi_remember_state
-	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL619:
 .L468:
-	.cfi_restore_state
-	.loc 1 182 0
 	add	r1, sp, #4
 	mov	r2, sp
 	ldr	r0, [r4]
 	bl	l2p_addr_tran.isra.0
-.LVL620:
-	.loc 1 183 0
 	ldr	r3, [r10, #4]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL621:
-	.loc 1 185 0
 	cbnz	r0, .L463
-	.loc 1 184 0
 	str	r0, [r4, #-4]
 .L464:
-	.loc 1 187 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
 	bne	.L466
-	.loc 1 188 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r10, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-.LVL622:
 	add	r1, r1, r8
 	blx	r3
-.LVL623:
-	.loc 1 189 0
 	cbz	r0, .L466
-	.loc 1 190 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
 .L466:
-	.loc 1 181 0 discriminator 2
 	adds	r6, r6, #1
-.LVL624:
 	adds	r4, r4, #20
 	b	.L462
 .L463:
-	.loc 1 186 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
 	b	.L464
@@ -6368,8 +3911,6 @@ FlashEraseBlocks:
 .L472:
 	.word	.LANCHOR0
 	.word	.LANCHOR105
-	.cfi_endproc
-.LFE346:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -6380,91 +3921,48 @@ FlashEraseBlocks:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB243:
-	.loc 2 98 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL625:
-	.loc 2 99 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 2 98 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 98 0
 	mov	r5, r0
-	.loc 2 99 0
 	cmp	r3, r2
 	bhi	.L474
-.LBB247:
-.LBB248:
-	.loc 2 94 0
 	ldr	r4, .L483
-.LBE248:
-.LBE247:
-	.loc 2 101 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
 	beq	.L474
-.LVL626:
-.LBB249:
-.LBB250:
-	.loc 2 103 0
 	cbz	r1, .L476
-.LBB251:
-	.loc 2 104 0
 	bl	P2V_block_in_plane
-.LVL627:
-	.loc 2 105 0
 	ldr	r3, .L483+4
-	.loc 2 104 0
 	mov	r6, r0
-.LVL628:
-	.loc 2 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
-	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL629:
-	.loc 2 107 0
 	ldr	r3, .L483+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 108 0
 	ldr	r2, .L483+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL630:
 .L476:
-.LBE251:
-	.loc 2 110 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 2 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
-	.loc 2 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
-	.loc 2 112 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL631:
 .L474:
 	pop	{r4, r5, r6, pc}
 .L484:
@@ -6474,10 +3972,6 @@ FtlFreeSysBlkQueueIn:
 	.word	.LANCHOR111
 	.word	.LANCHOR43
 	.word	.LANCHOR75
-.LBE250:
-.LBE249:
-	.cfi_endproc
-.LFE243:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -6488,418 +3982,249 @@ FtlFreeSysBlkQueueIn:
 	.fpu softvfp
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-.LFB212:
-	.loc 3 528 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL632:
-	.loc 3 538 0
 	ldr	r3, .L528
-	.loc 3 528 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 3 540 0
 	ldr	r6, .L528+4
-	.loc 3 539 0
 	mov	fp, #0
-	.loc 3 536 0
 	mov	r5, fp
-	.loc 3 537 0
 	mov	r4, fp
-	.loc 3 538 0
 	str	r0, [r3]
-.LVL633:
-	.loc 3 540 0
 	mov	r10, #20
-	.loc 3 539 0
 	ldr	r3, .L528+8
-	.loc 3 540 0
 	ldr	r8, [r6]
-	.loc 3 528 0
 	str	r0, [sp, #4]
-	.loc 3 539 0
 	ldrh	r3, [r3]
-	.loc 3 528 0
 	str	r1, [sp]
-	.loc 3 539 0
 	str	r3, [sp, #8]
-	.loc 3 550 0
 	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	.loc 3 551 0
 	ldr	r3, .L528+16
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
-.LVL634:
 .L486:
-	.loc 3 539 0 discriminator 1
 	ldr	r3, [sp, #8]
 	uxth	r2, fp
 	cmp	r3, r2
 	bhi	.L490
-	.loc 3 559 0
 	cmp	r5, #0
 	beq	.L485
-	.loc 3 562 0
 	mov	r0, r8
-	.loc 3 563 0
 	movs	r7, #0
-	.loc 3 564 0
 	mov	r8, #20
-	.loc 3 562 0
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.LVL635:
 .L493:
-	.loc 3 563 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
 	bhi	.L495
-	.loc 3 571 0
 	ldr	r3, [sp]
 	cmp	r3, #0
 	beq	.L511
-.LVL636:
-	.loc 3 573 0
 	ldr	r3, .L528+24
-	.loc 3 572 0
 	mov	r8, #1
-	.loc 3 573 0
 	ldrh	r10, [r3]
-.LVL637:
-	.loc 3 574 0
 	lsr	r3, r10, #2
 	str	r3, [sp, #12]
-.LVL638:
 .L496:
 	movs	r6, #0
-.LVL639:
 .L505:
-	.loc 3 578 0
 	ldr	r3, .L528+8
 	mov	fp, #0
-	.loc 3 577 0
 	mov	r5, fp
-	.loc 3 578 0
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	.loc 3 579 0
 	ldr	r3, .L528+4
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	.loc 3 587 0
 	ldr	r3, .L528+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	.loc 3 588 0
 	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
 	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL640:
 .L497:
-	.loc 3 578 0 discriminator 1
 	ldr	r3, [sp, #16]
 	uxth	r2, fp
 	cmp	r3, r2
 	bhi	.L500
-	.loc 3 593 0
 	cbz	r5, .L485
-	.loc 3 598 0
 	ldr	fp, .L528+4
-.LVL641:
-	.loc 3 596 0
 	movs	r3, #1
 	mov	r2, r8
-.LVL642:
 	mov	r1, r5
 	ldr	r0, [sp, #8]
-	.loc 3 597 0
 	movs	r7, #0
-	.loc 3 596 0
 	bl	FlashProgPages
-.LVL643:
-	.loc 3 598 0
 	movs	r3, #20
-.LVL644:
 .L502:
-	.loc 3 597 0 discriminator 1
 	uxth	r2, r7
 	cmp	r5, r2
 	bhi	.L504
-	.loc 3 604 0
 	ldr	r3, [sp, #12]
 	add	r6, r6, r3
-.LVL645:
 	uxth	r6, r6
-.LVL646:
-	.loc 3 605 0
 	cmp	r10, r6
 	bhi	.L505
-	.loc 3 611 0 discriminator 1
 	ldr	r7, .L528+4
-.LVL647:
 	movs	r6, #0
-.LVL648:
 	mov	r10, #20
-.LVL649:
 .L506:
-	.loc 3 610 0 discriminator 1
 	uxth	r3, r6
 	cmp	r5, r3
 	bhi	.L508
-	.loc 3 615 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
 	bls	.L509
-	.loc 3 615 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp]
 	cbz	r3, .L485
 .L509:
-	.loc 3 616 0 is_stmt 1
 	ldr	r3, .L528+4
 	mov	r2, r5
 	mov	r1, r8
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.LVL650:
 .L485:
-	.loc 3 619 0
 	mov	r0, r4
 	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL651:
 .L490:
-	.cfi_restore_state
-	.loc 3 540 0
 	mul	r2, r10, fp
 	movs	r3, #0
-	.loc 3 541 0
 	ldr	r1, [sp, #4]
-	.loc 3 540 0
 	str	r3, [r8, r2]
-	.loc 3 541 0
 	ldr	r3, .L528+32
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL652:
-	.loc 3 543 0
 	ldr	r3, [sp]
-	.loc 3 541 0
 	mov	r7, r0
-.LVL653:
-	.loc 3 543 0
 	cbz	r3, .L487
-	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL654:
 	cbnz	r0, .L488
 .L487:
-	.loc 3 548 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL655:
 	cbnz	r0, .L489
-	.loc 3 549 0
 	mla	r1, r10, r5, r8
-	.loc 3 550 0
 	ldr	r3, [sp, #12]
-	.loc 3 549 0
 	lsls	r7, r7, #10
-	.loc 3 550 0
 	str	r3, [r1, #8]
-	.loc 3 551 0
 	ldr	r3, [sp, #20]
-	.loc 3 549 0
 	str	r7, [r1, #4]
-	.loc 3 551 0
 	mul	r2, r3, r5
 	ldr	r3, [sp, #16]
-	.loc 3 552 0
 	adds	r5, r5, #1
-.LVL656:
 	uxth	r5, r5
-.LVL657:
-	.loc 3 551 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
 .L488:
-.LVL658:
 	add	fp, fp, #1
-.LVL659:
 	b	.L486
-.LVL660:
 .L489:
-	.loc 3 554 0
 	adds	r4, r4, #1
-.LVL661:
 	uxth	r4, r4
-.LVL662:
 	b	.L488
-.LVL663:
 .L495:
-	.loc 3 564 0
 	mul	r3, r8, r7
 	ldr	r2, [r6]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
 	bne	.L494
-	.loc 3 566 0
 	ldr	r0, [r1, #4]
-	.loc 3 565 0
 	adds	r4, r4, #1
-.LVL664:
 	uxth	r4, r4
-.LVL665:
-	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL666:
 .L494:
 	adds	r7, r7, #1
-.LVL667:
 	b	.L493
-.LVL668:
 .L511:
-	.loc 3 533 0
 	movs	r3, #6
-	.loc 3 534 0
 	ldr	r8, [sp]
-	.loc 3 533 0
 	str	r3, [sp, #12]
-	.loc 3 531 0
 	mov	r10, #1
 	b	.L496
-.LVL669:
 .L500:
-	.loc 3 579 0
 	movs	r3, #20
 	mul	r2, r3, fp
 	ldr	r3, [sp, #8]
 	mov	r1, r3
 	movs	r3, #0
 	str	r3, [r1, r2]
-	.loc 3 580 0
 	ldr	r3, .L528+32
 	ldr	r1, [sp, #4]
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL670:
-	.loc 3 581 0
 	ldr	r3, [sp]
-	.loc 3 580 0
 	mov	r7, r0
-.LVL671:
-	.loc 3 581 0
 	cbz	r3, .L498
-	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL672:
 	cbnz	r0, .L499
 .L498:
-	.loc 3 585 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL673:
 	cbnz	r0, .L499
-	.loc 3 586 0
 	ldr	r3, [sp, #8]
 	movs	r2, #20
 	add	r7, r6, r7, lsl #10
 	mla	r1, r2, r5, r3
-	.loc 3 587 0
 	ldr	r3, [sp, #20]
 	str	r3, [r1, #8]
-	.loc 3 588 0
 	ldr	r3, [sp, #28]
-	.loc 3 586 0
 	str	r7, [r1, #4]
-	.loc 3 588 0
 	mul	r2, r3, r5
 	ldr	r3, [sp, #24]
-	.loc 3 589 0
 	adds	r5, r5, #1
-.LVL674:
 	uxth	r5, r5
-.LVL675:
-	.loc 3 588 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
 .L499:
-.LVL676:
 	add	fp, fp, #1
-.LVL677:
 	b	.L497
-.LVL678:
 .L504:
-	.loc 3 598 0
 	mul	r2, r3, r7
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
 	cbz	r2, .L503
-	.loc 3 600 0
 	ldr	r0, [r0, #4]
-	.loc 3 599 0
 	adds	r4, r4, #1
-.LVL679:
 	str	r3, [sp, #8]
 	uxth	r4, r4
-.LVL680:
-	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL681:
 	ldr	r3, [sp, #8]
 .L503:
-.LVL682:
 	adds	r7, r7, #1
-.LVL683:
 	b	.L502
-.LVL684:
 .L508:
-	.loc 3 611 0
 	ldr	r3, [sp]
 	cbz	r3, .L507
-	.loc 3 611 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r6
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cbnz	r3, .L507
-	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL685:
 .L507:
 	adds	r6, r6, #1
-.LVL686:
 	b	.L506
 .L529:
 	.align	2
@@ -6913,8 +4238,6 @@ FtlLowFormatEraseBlock:
 	.word	.LANCHOR20
 	.word	.LANCHOR115
 	.word	.LANCHOR13
-	.cfi_endproc
-.LFE212:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -6925,111 +4248,57 @@ FtlLowFormatEraseBlock:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB246:
-	.loc 2 181 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL687:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-.LBB252:
-.LBB253:
-	.loc 2 89 0
 	ldr	r4, .L537
-.LBE253:
-.LBE252:
-.LBB255:
-	.loc 2 192 0
 	ldr	r6, .L537+4
-.LVL688:
 .L531:
-.LBE255:
-.LBB256:
-.LBB254:
-	.loc 2 89 0
 	ldrh	r1, [r4, #6]
-.LBE254:
-.LBE256:
-	.loc 2 186 0
 	cbz	r1, .L532
-	.loc 2 187 0
 	ldrh	r3, [r4, #2]
-	.loc 2 188 0
 	subs	r1, r1, #1
 	strh	r1, [r4, #6]	@ movhi
-	.loc 2 187 0
 	adds	r2, r3, #4
-	.loc 2 189 0
 	adds	r3, r3, #1
-	.loc 2 187 0
 	ldrh	r5, [r4, r2, lsl #1]
-.LVL689:
-	.loc 2 189 0
 	ubfx	r3, r3, #0, #10
 	strh	r3, [r4, #2]	@ movhi
-.LBB257:
-	.loc 2 191 0
 	mov	r0, r5
 	bl	P2V_block_in_plane
-.LVL690:
 	mov	r7, r0
-.LVL691:
-	.loc 2 192 0
 	ldr	r0, [r6]
 	lsls	r3, r5, #10
-	.loc 2 193 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 192 0
 	str	r3, [r0, #4]
-	.loc 2 193 0
 	bl	FlashEraseBlocks
-.LVL692:
-	.loc 2 194 0
 	ldr	r3, .L537+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	.loc 2 195 0
 	ldr	r2, .L537+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LBE257:
-	.loc 2 202 0
 	subs	r3, r5, #1
 	uxth	r3, r3
 	movw	r2, #65533
 	cmp	r3, r2
 	bhi	.L533
-	.loc 2 208 0
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL693:
 .L532:
-	.loc 2 199 0
 	ldr	r0, .L537+16
 	bl	printf
-.LVL694:
 .L535:
 	b	.L535
-.LVL695:
 .L533:
-	.loc 2 203 0
 	ldrh	r2, [r4, #6]
 	mov	r1, r5
 	ldr	r0, .L537+20
 	bl	printf
-.LVL696:
-	.loc 2 205 0
 	b	.L531
 .L538:
 	.align	2
@@ -7040,8 +4309,6 @@ FtlFreeSysBlkQueueOut:
 	.word	.LANCHOR75
 	.word	.LC82
 	.word	.LC83
-	.cfi_endproc
-.LFE246:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -7052,97 +4319,57 @@ FtlFreeSysBlkQueueOut:
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB258:
-	.loc 2 562 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL697:
-	.loc 2 566 0
 	ldrh	r1, [r0, #10]
 	ldr	r2, [r0, #12]
-	.loc 2 562 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 562 0
 	mov	r4, r0
-	.loc 2 566 0
 	movs	r3, #0
-.LVL698:
 .L540:
 	uxth	r5, r3
-.LVL699:
-	.loc 2 566 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
 	bcs	.L543
-	.loc 2 567 0 is_stmt 1
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
 	bne	.L540
-	.loc 2 568 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL700:
-	.loc 2 569 0
 	subs	r3, r0, #1
 	movw	r2, #65533
 	uxth	r3, r3
-	.loc 2 568 0
 	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	.loc 2 569 0
 	cmp	r3, r2
 	bls	.L541
-	.loc 2 570 0
 	ldr	r3, .L547
 	ldr	r0, .L547+4
 	ldrh	r2, [r3, #6]
 	bl	printf
-.LVL701:
 .L542:
 	b	.L542
 .L541:
-	.loc 2 576 0
 	ldr	r3, [r4, #28]
-	.loc 2 574 0
 	strh	r6, [r4, #2]	@ movhi
-	.loc 2 575 0
 	strh	r5, [r4]	@ movhi
-	.loc 2 576 0
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	.loc 2 577 0
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 .L543:
-	.loc 2 581 0
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
 	bhi	.L545
-.LVL702:
-.LBB260:
-.LBB261:
 	movw	r2, #581
 	ldr	r1, .L547+8
 	ldr	r0, .L547+12
 	bl	printf
-.LVL703:
 .L545:
-.LBE261:
-.LBE260:
-	.loc 2 583 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL704:
 .L548:
 	.align	2
 .L547:
@@ -7150,8 +4377,6 @@ ftl_map_blk_alloc_new_blk:
 	.word	.LC84
 	.word	.LANCHOR116
 	.word	.LC1
-	.cfi_endproc
-.LFE258:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -7162,18 +4387,10 @@ ftl_map_blk_alloc_new_blk:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB349:
-	.loc 1 242 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL705:
-	.loc 1 243 0
 	b	memset
-.LVL706:
-	.cfi_endproc
-.LFE349:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
@@ -7184,488 +4401,283 @@ ftl_memset:
 	.fpu softvfp
 	.type	FtlMemInit, %function
 FtlMemInit:
-.LFB209:
-	.loc 3 280 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 283 0
 	movs	r1, #0
 	ldr	r3, .L651
-	.loc 3 312 0
 	mov	r8, #12
-	.loc 3 298 0
 	ldr	r2, .L651+4
-	.loc 3 283 0
 	str	r1, [r3]
-	.loc 3 284 0
 	ldr	r3, .L651+8
-	.loc 3 311 0
 	ldr	r4, .L651+12
-	.loc 3 308 0
 	str	r1, [sp, #4]
-	.loc 3 284 0
 	str	r1, [r3]
-	.loc 3 285 0
 	ldr	r3, .L651+16
-	.loc 3 311 0
 	ldrh	r0, [r4]
-	.loc 3 313 0
 	ldr	fp, .L651+288
-	.loc 3 285 0
 	str	r1, [r3]
-	.loc 3 286 0
 	ldr	r3, .L651+20
-	.loc 3 311 0
 	lsls	r0, r0, #1
-	.loc 3 317 0
 	ldr	r10, .L651+292
-	.loc 3 321 0
 	ldr	r5, .L651+24
-	.loc 3 286 0
 	str	r1, [r3]
-	.loc 3 287 0
 	ldr	r3, .L651+28
-	.loc 3 324 0
 	ldr	r7, .L651+32
-	.loc 3 287 0
 	str	r1, [r3]
-	.loc 3 288 0
 	ldr	r3, .L651+36
 	str	r1, [r3]
-	.loc 3 289 0
 	ldr	r3, .L651+40
 	str	r1, [r3]
-	.loc 3 290 0
 	ldr	r3, .L651+44
 	str	r1, [r3]
-	.loc 3 291 0
 	ldr	r3, .L651+48
 	str	r1, [r3]
-	.loc 3 292 0
 	ldr	r3, .L651+52
 	str	r1, [r3]
-	.loc 3 293 0
 	ldr	r3, .L651+56
 	str	r1, [r3]
-	.loc 3 294 0
 	ldr	r3, .L651+60
 	str	r1, [r3]
-	.loc 3 295 0
 	ldr	r3, .L651+64
 	str	r1, [r3]
-	.loc 3 296 0
 	ldr	r3, .L651+68
 	str	r1, [r3]
-	.loc 3 297 0
 	ldr	r3, .L651+72
 	str	r1, [r3]
-	.loc 3 298 0
 	movw	r3, #65535
 	str	r3, [r2]
-	.loc 3 299 0
 	ldr	r2, .L651+76
 	str	r1, [r2]
-	.loc 3 300 0
 	ldr	r2, .L651+80
 	str	r1, [r2]
-	.loc 3 301 0
 	ldr	r2, .L651+84
 	str	r1, [r2]
-	.loc 3 302 0
 	ldr	r2, .L651+88
 	strh	r3, [r2]	@ movhi
-	.loc 3 303 0
 	ldr	r2, .L651+92
 	strh	r3, [r2]	@ movhi
-	.loc 3 304 0
 	movs	r2, #32
 	ldr	r3, .L651+96
 	strh	r2, [r3]	@ movhi
-	.loc 3 305 0
 	movs	r2, #128
 	ldr	r3, .L651+100
 	strh	r2, [r3]	@ movhi
-	.loc 3 306 0
 	ldr	r3, .L651+104
 	strh	r1, [r3]	@ movhi
-	.loc 3 307 0
 	ldr	r3, .L651+108
 	strh	r1, [r3]	@ movhi
-	.loc 3 308 0
 	ldr	r3, .L651+112
 	strh	r1, [r3]	@ movhi
-	.loc 3 311 0
 	bl	ftl_malloc
-.LVL707:
 	ldr	r3, .L651+116
 	str	r0, [r3]
-	.loc 3 312 0
 	ldrh	r0, [r4]
-	.loc 3 313 0
 	movs	r4, #20
-	.loc 3 312 0
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL708:
-	.loc 3 313 0
 	ldrh	r2, [fp]
-	.loc 3 312 0
 	ldr	r3, .L651+120
-	.loc 3 313 0
 	muls	r4, r2, r4
-.LVL709:
-	.loc 3 312 0
 	str	r0, [r3]
-	.loc 3 314 0
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL710:
 	ldr	r3, .L651+124
 	str	r0, [r3]
-	.loc 3 315 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL711:
 	ldr	r3, .L651+128
 	str	r0, [r3]
-	.loc 3 316 0
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL712:
 	ldr	r3, .L651+132
-	.loc 3 325 0
 	ldr	r6, .L651+136
-	.loc 3 316 0
 	str	r0, [r3]
-	.loc 3 317 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL713:
 	str	r0, [r10]
-	.loc 3 318 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL714:
 	ldr	r3, .L651+140
-	.loc 3 321 0
 	ldrh	r2, [fp]
-	.loc 3 318 0
 	str	r0, [r3]
-	.loc 3 320 0
 	ldr	r3, .L651+144
-	.loc 3 321 0
 	lsls	r2, r2, #1
-	.loc 3 320 0
 	ldrh	r4, [r3]
-.LVL715:
-	.loc 3 321 0
 	adds	r2, r2, #1
 	str	r2, [r5]
-	.loc 3 322 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL716:
 	ldr	r3, .L651+148
 	str	r0, [r3]
-	.loc 3 323 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL717:
 	ldr	r3, .L651+152
 	str	r0, [r3]
-	.loc 3 324 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL718:
 	str	r0, [r7]
-	.loc 3 325 0
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-.LVL719:
 	str	r0, [r6]
-	.loc 3 326 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL720:
 	ldr	r2, .L651+156
 	str	r0, [r2]
-	.loc 3 327 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL721:
 	ldr	r2, .L651+160
-	.loc 3 330 0
 	ldr	r4, .L651+164
-.LVL722:
-	.loc 3 327 0
 	str	r0, [r2]
-	.loc 3 328 0
 	ldr	r0, [r5]
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL723:
 	ldr	r2, .L651+168
-	.loc 3 330 0
 	ldrh	r3, [fp]
-	.loc 3 328 0
 	str	r0, [r2]
-	.loc 3 330 0
 	ldrh	r2, [r4]
 	mul	fp, r3, r2
-.LVL724:
-	.loc 3 331 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL725:
 	ldr	r2, .L651+172
 	str	r0, [r2]
-	.loc 3 332 0
 	lsl	r0, fp, #2
 	bl	ftl_malloc
-.LVL726:
 	ldr	r3, .L651+176
 	str	r0, [r3]
-	.loc 3 333 0
 	ldrh	r3, [r4]
 	ldr	r0, [r5]
-	.loc 3 336 0
 	ldr	r4, .L651+180
 	ldr	r5, .L651+184
-	.loc 3 333 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL727:
 	ldr	r3, .L651+188
 	str	r0, [r3]
-	.loc 3 336 0
 	ldrh	r0, [r4]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r5]	@ movhi
-	.loc 3 337 0
 	bl	ftl_malloc
-.LVL728:
 	ldr	r3, .L651+192
 	str	r0, [r3]
-	.loc 3 338 0
 	ldrh	r3, [r5]
-	.loc 3 339 0
 	ldr	r0, .L651+196
-	.loc 3 338 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
-	.loc 3 339 0
 	and	r0, r0, r3, lsl #9
-	.loc 3 338 0
 	strh	r3, [r5]	@ movhi
-	.loc 3 339 0
 	bl	ftl_malloc
-.LVL729:
-	.loc 3 346 0
 	ldrh	fp, [r4]
-.LVL730:
-	.loc 3 339 0
 	ldr	r3, .L651+200
 	str	r0, [r3]
-	.loc 3 346 0
 	lsl	fp, fp, #1
-	.loc 3 340 0
 	ldr	r3, .L651+204
 	adds	r0, r0, #32
 	str	r0, [r3]
-.LVL731:
-	.loc 3 348 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL732:
 	ldr	r3, .L651+208
 	str	r0, [r3]
-	.loc 3 350 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL733:
-	.loc 3 351 0
 	ldr	fp, .L651+296
-.LVL734:
-	.loc 3 350 0
 	ldr	r3, .L651+212
 	str	r0, [r3]
-.LVL735:
-	.loc 3 351 0
 	ldr	r3, [fp]
 	lsls	r5, r3, #1
-.LVL736:
-	.loc 3 352 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL737:
 	ldr	r2, .L651+216
 	str	r0, [r2]
-	.loc 3 353 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL738:
 	ldr	r3, .L651+220
-	.loc 3 355 0
 	ldr	r5, .L651+224
-.LVL739:
-	.loc 3 353 0
 	str	r0, [r3]
-	.loc 3 354 0
 	ldrh	r0, [r4]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL740:
 	ldr	r3, .L651+228
 	str	r0, [r3]
-	.loc 3 355 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL741:
 	ldr	r2, .L651+232
 	str	r0, [r2]
-	.loc 3 356 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL742:
 	ldr	r2, .L651+236
 	str	r0, [r2]
-	.loc 3 357 0
 	ldrh	r0, [r5]
 	ldr	r5, .L651+120
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL743:
 	ldr	r3, .L651+240
 	str	r0, [r3]
-	.loc 3 358 0
 	ldr	r3, .L651+244
 	ldrh	r0, [r3]
 	str	r3, [sp]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL744:
-	.loc 3 359 0
 	ldr	r3, [sp]
-	.loc 3 358 0
 	ldr	r2, .L651+248
-	.loc 3 359 0
 	ldr	r1, [sp, #4]
-	.loc 3 358 0
 	str	r0, [r2]
-	.loc 3 359 0
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL745:
-	.loc 3 361 0
 	ldr	r3, .L651+252
 	ldrh	r0, [r3]
-	.loc 3 362 0
 	lsls	r0, r0, #2
-.LVL746:
 	bl	ftl_malloc
-.LVL747:
 	ldr	r3, .L651+256
 	str	r0, [r3]
-.LVL748:
-	.loc 3 363 0
 	ldr	r0, [fp]
-	.loc 3 365 0
 	ldr	fp, .L651+300
-	.loc 3 364 0
 	lsls	r0, r0, #2
-.LVL749:
 	bl	ftl_malloc
-.LVL750:
 	ldr	r3, .L651+260
 	str	r0, [r3]
-.LVL751:
-	.loc 3 365 0
 	ldrh	r0, [fp]
-	.loc 3 366 0
 	mul	r0, r8, r0
-.LVL752:
-	.loc 3 372 0
 	ldr	r8, .L651+304
-	.loc 3 366 0
 	bl	ftl_malloc
-.LVL753:
-	.loc 3 367 0
 	ldr	r2, .L651+144
-	.loc 3 366 0
 	ldr	r3, .L651+264
 	str	r0, [r3]
-.LVL754:
-	.loc 3 367 0
 	ldrh	r0, [r2]
 	ldrh	r3, [fp]
 	ldr	fp, .L651+132
-	.loc 3 368 0
 	muls	r0, r3, r0
-.LVL755:
 	bl	ftl_malloc
-.LVL756:
 	ldr	r3, .L651+268
 	str	r0, [r3]
-.LVL757:
-	.loc 3 370 0
 	movs	r0, #6
-	.loc 3 369 0
 	ldrh	r3, [r4]
-	.loc 3 371 0
 	ldr	r4, .L651+272
-	.loc 3 370 0
 	muls	r0, r3, r0
-.LVL758:
 	bl	ftl_malloc
-.LVL759:
 	ldr	r3, .L651+276
 	str	r0, [r3]
-	.loc 3 371 0
 	ldr	r3, .L651+280
 	ldrh	r0, [r3]
-	.loc 3 372 0
 	ldrh	r3, [r8]
-	.loc 3 371 0
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r4]	@ movhi
-.LVL760:
-	.loc 3 372 0
 	muls	r0, r3, r0
-.LVL761:
-	.loc 3 373 0
 	lsls	r0, r0, #2
-.LVL762:
 	bl	ftl_malloc
-.LVL763:
 	ldr	r2, .L651+284
 	str	r5, [sp, #4]
 	ldr	r5, .L651+124
 	mov	r1, r2
-	.loc 3 374 0
 	ldrh	r3, [r8]
-	.loc 3 373 0
 	str	r0, [r1, #28]!
-.LVL764:
-	.loc 3 375 0
 	ldrh	r0, [r4]
 	ldr	r8, .L651+140
 	ldr	lr, .L651+148
@@ -7755,213 +4767,160 @@ FtlMemInit:
 	lsls	r0, r0, #2
 	str	r5, [sp, #8]
 	ldr	r5, .L654
-	.loc 3 374 0
 	str	r3, [sp]
 	mov	r4, r0
 	movs	r3, #1
 	str	r5, [sp, #12]
-.LVL765:
 .L551:
-	.loc 3 374 0 is_stmt 0 discriminator 1
 	ldr	r5, [sp]
 	cmp	r3, r5
 	bcc	.L552
 	add	r3, r2, r3, lsl #2
-.LVL766:
 	ldr	r1, .L654+4
-	.loc 3 380 0 is_stmt 1
 	movs	r0, #0
 	adds	r3, r3, #24
 .L553:
-	.loc 3 378 0 discriminator 1
 	cmp	r1, r3
 	bne	.L554
-	.loc 3 384 0
 	ldr	r3, .L654+8
 	ldr	r3, [r3]
 	cbnz	r3, .L555
 .L557:
-	.loc 3 386 0
 	ldr	r1, .L654+12
 	ldr	r0, .L654+16
 	bl	printf
-.LVL767:
-	.loc 3 387 0
 	mov	r0, #-1
 .L550:
-	.loc 3 485 0
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL768:
 .L552:
-	.cfi_restore_state
-	.loc 3 375 0 discriminator 3
 	ldr	r5, [r2, #28]
-	.loc 3 374 0 discriminator 3
 	adds	r3, r3, #1
-.LVL769:
-	.loc 3 375 0 discriminator 3
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
 	b	.L551
-.LVL770:
 .L554:
-	.loc 3 380 0 discriminator 2
 	str	r0, [r3, #4]!
 	b	.L553
 .L555:
-	.loc 3 389 0
 	ldr	r3, .L654+20
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 394 0
 	ldr	r3, .L654+24
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 399 0
 	ldr	r3, .L654+28
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 405 0
 	ldr	r3, .L654+32
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 410 0
 	ldr	r3, .L654+36
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 415 0
 	ldr	r3, .L654+40
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 420 0
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 426 0
 	ldr	r3, .L654+44
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 431 0
 	ldr	r3, .L654+48
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 431 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	r3, [fp]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 discriminator 2
 	ldr	r3, [r10]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 discriminator 3
 	ldr	r3, [r8]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 436 0 discriminator 4
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 is_stmt 1
 	ldr	r3, [lr]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	r3, [ip]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 discriminator 2
 	ldr	r3, [r7]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 441 0 discriminator 3
 	ldr	r3, [r6]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 442 0 is_stmt 1
 	ldr	r3, .L654+52
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 442 0 is_stmt 0 discriminator 1
 	ldr	r3, .L654+56
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 442 0 discriminator 2
 	ldr	r3, .L654+60
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 447 0 is_stmt 1
 	ldr	r3, .L654+64
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 447 0 is_stmt 0 discriminator 1
 	ldr	r3, .L654+68
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 447 0 discriminator 2
 	ldr	r3, .L654+72
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 453 0 is_stmt 1
 	ldr	r3, .L654+76
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 453 0 is_stmt 0 discriminator 1
 	ldr	r3, .L654+80
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 459 0 is_stmt 1
 	ldr	r3, .L654+84
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 465 0
 	ldr	r3, .L654+88
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 471 0
 	ldr	r3, .L654+92
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 477 0
 	ldr	r3, .L654+96
 	ldr	r3, [r3]
 	cmp	r3, #0
 	beq	.L557
-	.loc 3 484 0
 	movs	r0, #0
 	b	.L550
 .L655:
@@ -7993,8 +4952,6 @@ FtlMemInit:
 	.word	.LANCHOR132
 	.word	.LANCHOR133
 	.word	.LANCHOR123
-	.cfi_endproc
-.LFE209:
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
@@ -8005,77 +4962,46 @@ FtlMemInit:
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB228:
-	.loc 4 66 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL771:
-	.loc 4 69 0
 	ldr	r3, .L662
-	.loc 4 66 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 4 66 0
 	mov	r5, r0
-	.loc 4 74 0
 	ldr	r7, .L662+4
-	.loc 4 66 0
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
-	.loc 4 69 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL772:
-	.loc 4 74 0
 	ldr	r8, .L662+12
-	.loc 4 69 0
 	mov	r0, r6
-.LVL773:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL774:
 .L659:
-	.loc 4 72 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L656
-	.loc 4 74 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
 	bhi	.L658
-	.loc 4 74 0 is_stmt 0 discriminator 1
 	movs	r2, #74
 	mov	r1, r8
 	ldr	r0, .L662+8
 	bl	printf
-.LVL775:
 .L658:
-	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
-	.loc 4 70 0 discriminator 2
 	cmp	r5, r4
-	.loc 4 75 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	lsl	r3, r2, r3
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	.loc 4 70 0 discriminator 2
 	bne	.L659
 .L656:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL776:
 .L663:
 	.align	2
 .L662:
@@ -8083,8 +5009,6 @@ FtlBbt2Bitmap:
 	.word	.LANCHOR17
 	.word	.LC1
 	.word	.LANCHOR139
-	.cfi_endproc
-.LFE228:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -8095,33 +5019,22 @@ FtlBbt2Bitmap:
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB230:
-	.loc 4 149 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 4 150 0
 	ldr	r0, .L665
 	movw	r3, #65535
-	.loc 4 152 0
 	movs	r2, #16
 	movs	r1, #255
-	.loc 4 150 0
 	strh	r3, [r0]	@ movhi
-	.loc 4 151 0
 	movs	r3, #0
 	strh	r3, [r0, #6]	@ movhi
-	.loc 4 152 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL777:
 .L666:
 	.align	2
 .L665:
 	.word	.LANCHOR37
-	.cfi_endproc
-.LFE230:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -8132,47 +5045,25 @@ FtlBbtMemInit:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB240:
-	.loc 2 76 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL778:
-	.loc 2 79 0
 	ldr	r3, .L668
-	.loc 2 83 0
 	mov	r2, #2048
-	.loc 2 76 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 2 79 0
 	movs	r4, #0
-	.loc 2 83 0
 	mov	r1, r4
-	.loc 2 79 0
 	strh	r4, [r3, #2]	@ movhi
-	.loc 2 80 0
 	strh	r4, [r3, #4]	@ movhi
-	.loc 2 81 0
 	strh	r4, [r3, #6]	@ movhi
-	.loc 2 82 0
 	strh	r0, [r3], #8	@ movhi
-	.loc 2 83 0
 	mov	r0, r3
-.LVL779:
 	bl	ftl_memset
-.LVL780:
-	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
 .L669:
 	.align	2
 .L668:
 	.word	.LANCHOR38
-	.cfi_endproc
-.LFE240:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.load_l2p_region,"ax",%progbits
 	.align	1
@@ -8183,53 +5074,28 @@ FtlFreeSysBlkQueueInit:
 	.fpu softvfp
 	.type	load_l2p_region, %function
 load_l2p_region:
-.LFB256:
-	.loc 2 488 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL781:
-	.loc 2 492 0
 	ldr	r3, .L676
-	.loc 2 488 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 488 0
 	mov	r5, r0
 	mov	r10, r1
-	.loc 2 492 0
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
 	bcs	.L671
-	.loc 2 492 0 is_stmt 0 discriminator 1
 	mov	r2, #492
 	ldr	r1, .L676+4
-.LVL782:
 	ldr	r0, .L676+8
-.LVL783:
 	bl	printf
-.LVL784:
 .L671:
-	.loc 2 493 0 is_stmt 1
 	ldr	fp, .L676+40
 	movs	r4, #12
 	ldr	r7, .L676+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
-.LVL785:
-	.loc 2 495 0
 	cmp	r8, #0
 	bne	.L672
-	.loc 2 496 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
@@ -8238,96 +5104,63 @@ load_l2p_region:
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL786:
-	.loc 2 497 0
 	ldr	r2, [r7]
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
-	.loc 2 498 0
 	str	r8, [r1, #4]
 .L673:
-	.loc 2 519 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL787:
 .L672:
-	.cfi_restore_state
-	.loc 2 502 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	.loc 2 501 0
 	ldr	r6, .L676+20
-	.loc 2 502 0
 	add	r2, r2, r4
-	.loc 2 504 0
 	mov	r0, r6
-	.loc 2 502 0
 	ldr	r2, [r2, #8]
-	.loc 2 501 0
 	str	r8, [r6, #4]
-	.loc 2 502 0
 	str	r2, [r6, #8]
-	.loc 2 503 0
 	ldr	r2, .L676+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
-	.loc 2 504 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL788:
-	.loc 2 505 0
 	ldr	r10, [r6, #12]
-.LVL789:
-	.loc 2 507 0
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
 	beq	.L674
-	.loc 2 508 0
 	mov	r2, r8
 	mov	r1, r5
 	ldr	r0, .L676+28
 	bl	printf
-.LVL790:
-	.loc 2 509 0
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
 	ldr	r0, .L676+32
 	bl	rknand_print_hex
-.LVL791:
-	.loc 2 510 0
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
 	ldr	r0, .L676+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.LVL792:
 .L674:
-	.loc 2 513 0
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
 	beq	.L675
-	.loc 2 513 0 is_stmt 0 discriminator 1
 	movw	r2, #513
 	ldr	r1, .L676+4
 	ldr	r0, .L676+8
 	bl	printf
-.LVL793:
 .L675:
-	.loc 2 516 0 is_stmt 1
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	.loc 2 517 0
 	strh	r5, [r3, r4]	@ movhi
-	.loc 2 518 0
 	b	.L673
 .L677:
 	.align	2
@@ -8343,8 +5176,6 @@ load_l2p_region:
 	.word	.LC87
 	.word	.LC88
 	.word	.LANCHOR134
-	.cfi_endproc
-.LFE256:
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -8355,169 +5186,96 @@ load_l2p_region:
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB257:
-	.loc 2 522 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL794:
-	.loc 2 531 0
 	ldrh	r2, [r0, #10]
-	.loc 2 522 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 525 0
 	ldr	r5, [r0, #20]
-	.loc 2 531 0
 	movs	r1, #0
-	.loc 2 523 0
 	ldr	r10, [r0, #12]
-.LVL795:
-	.loc 2 531 0
 	lsls	r2, r2, #1
-	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL796:
-	.loc 2 531 0
 	mov	r0, r5
-.LVL797:
 	bl	ftl_memset
-.LVL798:
-	.loc 2 532 0
 	movs	r3, #0
-.LVL799:
 .L679:
-	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
 	bhi	.L683
-	.loc 2 540 0 is_stmt 1
 	ldrh	r3, [r5]
-.LVL800:
-	.loc 2 543 0
 	movs	r6, #0
-.LVL801:
-	.loc 2 544 0
 	ldr	r2, .L692
-.LVL802:
-	.loc 2 541 0
 	mov	fp, r6
-.LVL803:
 .L684:
-	.loc 2 543 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL804:
 	cmp	r0, r1
 	bhi	.L688
-	.loc 2 559 0
 	mov	r0, fp
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL805:
 .L683:
-	.cfi_restore_state
-	.loc 2 533 0
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 2 534 0
 	movs	r2, #0
-	.loc 2 533 0
 	ubfx	r1, r1, #10, #16
-.LVL806:
 .L680:
-	.loc 2 534 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
 	bhi	.L682
-.LVL807:
 	adds	r3, r3, #1
-.LVL808:
 	b	.L679
-.LVL809:
 .L682:
-	.loc 2 535 0
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL810:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
-	.loc 2 536 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL811:
 	b	.L680
-.LVL812:
 .L688:
-	.loc 2 544 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
 	bne	.L685
-	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
-	.loc 2 545 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
 .L685:
-	.loc 2 546 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL813:
-	.loc 2 550 0
 	cmp	r8, #0
 	bne	.L687
-	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
 	cbz	r0, .L687
-	.loc 2 552 0 is_stmt 1
 	movs	r1, #1
-.LVL814:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL815:
-	.loc 2 553 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
-	.loc 2 554 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL816:
 .L687:
 	adds	r6, r6, #1
-.LVL817:
 	b	.L684
 .L693:
 	.align	2
 .L692:
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE257:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -8528,170 +5286,92 @@ ftl_free_no_use_map_blk:
 	.fpu softvfp
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-.LFB260:
-	.loc 2 632 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL818:
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 640 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 632 0
 	mov	r4, r0
-	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL819:
-	.loc 2 640 0
 	cmp	r3, r2
 	bne	.L695
-	.loc 2 641 0
 	ldrh	r3, [r0, #8]
 	cbz	r3, .L696
-	.loc 2 641 0 is_stmt 0 discriminator 1
 	movw	r2, #641
 	ldr	r1, .L704
 	ldr	r0, .L704+4
-.LVL820:
 	bl	printf
-.LVL821:
 .L696:
-	.loc 2 642 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL822:
-	.loc 2 644 0
 	movs	r3, #0
-	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 646 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL823:
 .L697:
-	.loc 2 677 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL824:
 .L695:
-	.loc 2 650 0
 	ldrh	r5, [r5, r3, lsl #1]
-.LVL825:
-	.loc 2 661 0
 	movs	r1, #255
-	.loc 2 651 0
 	ldrh	r3, [r0, #2]
 	ldr	r2, .L704+8
-	.loc 2 652 0
 	ldr	r7, .L704+12
-	.loc 2 636 0
 	ldr	r6, [r0, #24]
-	.loc 2 651 0
 	orr	r3, r3, r5, lsl #10
-	.loc 2 652 0
 	ldr	r0, [r7]
-.LVL826:
-	.loc 2 651 0
 	str	r3, [r2, #4]
-	.loc 2 653 0
 	ldr	r3, .L704+16
-	.loc 2 652 0
 	str	r0, [r2, #8]
-	.loc 2 653 0
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-.LVL827:
-	.loc 2 656 0
 	ldr	r2, [r4, #28]
 	str	r2, [r3, #4]
-	.loc 2 657 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 658 0
 	ldrh	r2, [r4, #4]
-	.loc 2 659 0
 	strh	r5, [r3, #2]	@ movhi
-	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 661 0
 	ldr	r3, .L704+20
-.LVL828:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL829:
-	.loc 2 663 0
 	ldrh	ip, [r4, #6]
 	movs	r3, #0
-	.loc 2 666 0
 	ldr	r1, [r7]
-	.loc 2 662 0
 	mov	r2, r3
-.LVL830:
 .L698:
-	.loc 2 663 0 discriminator 1
 	uxth	r0, r3
 	cmp	ip, r0
 	bhi	.L700
-	.loc 2 670 0
 	movs	r2, #1
-.LVL831:
 	movs	r3, #0
-.LVL832:
 	mov	r1, r2
 	ldr	r0, .L704+8
-.LVL833:
 	bl	FlashProgPages
-.LVL834:
-	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 671 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL835:
-	.loc 2 676 0
 	b	.L697
-.LVL836:
 .L700:
-	.loc 2 664 0
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
 	bne	.L699
-	.loc 2 665 0
 	adds	r2, r2, #1
-.LVL837:
 	uxth	r2, r2
-.LVL838:
-	.loc 2 666 0
 	str	r3, [r1, r2, lsl #3]
-	.loc 2 667 0
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
 .L699:
-.LVL839:
 	adds	r3, r3, #1
-.LVL840:
 	b	.L698
 .L705:
 	.align	2
@@ -8702,8 +5382,6 @@ Ftl_write_map_blk_to_last_page:
 	.word	.LANCHOR107
 	.word	.LANCHOR108
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE260:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
@@ -8714,205 +5392,120 @@ Ftl_write_map_blk_to_last_page:
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-.LFB261:
-	.loc 2 680 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL841:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 680 0
 	mov	r4, r0
-	.loc 2 687 0
 	ldr	r8, .L725+28
-	.loc 2 680 0
 	mov	r7, r1
-	.loc 2 683 0
 	movs	r6, #0
-	.loc 2 680 0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.LVL842:
 .L707:
-	.loc 2 686 0
 	ldr	r2, .L725
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-	.loc 2 687 0
 	ldrh	r3, [r8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	bge	.L708
-	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
 	bne	.L709
 .L708:
-	.loc 2 688 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL843:
 .L709:
-	.loc 2 699 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
 	cbnz	r3, .L710
-	.loc 2 699 0 is_stmt 0 discriminator 1
 	movw	r2, #699
 	ldr	r1, .L725+4
 	ldr	r0, .L725+8
 	bl	printf
-.LVL844:
 .L710:
-	.loc 2 700 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
 	bcc	.L711
-	.loc 2 700 0 is_stmt 0 discriminator 1
 	mov	r2, #700
 	ldr	r1, .L725+4
 	ldr	r0, .L725+8
 	bl	printf
-.LVL845:
 .L711:
-	.loc 2 701 0 is_stmt 1
 	ldrh	r2, [r4]
-	.loc 2 707 0
 	movs	r1, #0
-	.loc 2 701 0
 	ldr	r3, [r4, #12]
-	.loc 2 703 0
 	ldr	r5, .L725+12
-	.loc 2 701 0
 	ldrh	r10, [r3, r2, lsl #1]
-.LVL846:
-	.loc 2 703 0
 	ldrh	r2, [r4, #2]
-	.loc 2 704 0
 	ldr	r3, [sp, #4]
-	.loc 2 703 0
 	orr	r2, r2, r10, lsl #10
-	.loc 2 704 0
 	str	r3, [r5, #8]
-	.loc 2 703 0
 	str	r2, [r5, #4]
-	.loc 2 705 0
 	ldr	r2, .L725+16
 	ldr	r0, [r2]
-	.loc 2 707 0
 	movs	r2, #16
-	.loc 2 705 0
 	str	r0, [r5, #12]
-	.loc 2 707 0
 	bl	ftl_memset
-.LVL847:
-	.loc 2 708 0
 	ldr	r2, [r5, #12]
-.LVL848:
-	.loc 2 713 0
 	movs	r3, #1
-	.loc 2 709 0
 	ldr	r1, [r4, #28]
-	.loc 2 713 0
 	mov	r0, r5
-	.loc 2 710 0
 	strh	r7, [r2, #8]	@ movhi
-	.loc 2 709 0
 	str	r1, [r2, #4]
-	.loc 2 711 0
 	ldrh	r1, [r4, #4]
-	.loc 2 712 0
 	strh	r10, [r2, #2]	@ movhi
-	.loc 2 711 0
 	strh	r1, [r2]	@ movhi
-	.loc 2 713 0
 	mov	r2, r3
-.LVL849:
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL850:
-	.loc 2 714 0
 	ldrh	r2, [r4, #2]
-	.loc 2 716 0
 	ldr	r3, [r5]
-	.loc 2 714 0
 	adds	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 716 0
 	adds	r3, r3, #1
-	.loc 2 714 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 716 0
 	bne	.L712
-	.loc 2 717 0
 	ldr	r1, [r5, #4]
-	.loc 2 718 0
 	adds	r6, r6, #1
-.LVL851:
-	.loc 2 717 0
 	ldr	r0, .L725+20
-	.loc 2 718 0
 	uxth	r6, r6
-	.loc 2 717 0
 	bl	printf
-.LVL852:
-	.loc 2 719 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
-	.loc 2 720 0
 	ittt	ls
 	ldrhls	r2, [fp]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
-	.loc 2 722 0
 	cmp	r6, #3
 	bls	.L714
-	.loc 2 723 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
 	ldr	r0, .L725+24
 	bl	printf
-.LVL853:
 .L715:
 	b	.L715
 .L714:
-	.loc 2 727 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
 	beq	.L707
 .L724:
 	b	.L724
 .L712:
-	.loc 2 731 0
 	cmp	r2, #1
 	beq	.L707
-	.loc 2 734 0
 	ldr	r2, [r5, #4]
-	.loc 2 736 0
 	movs	r0, #0
-	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
-	.loc 2 736 0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL854:
 .L726:
 	.align	2
 .L725:
@@ -8924,8 +5517,6 @@ FtlMapWritePage:
 	.word	.LC89
 	.word	.LC90
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE261:
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
@@ -8936,179 +5527,104 @@ FtlMapWritePage:
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-.LFB259:
-	.loc 2 586 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL855:
-	.loc 2 591 0
 	ldr	r3, [r0, #24]
-	.loc 2 586 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 590 0
 	ldr	r5, [r0, #12]
-.LVL856:
-	.loc 2 591 0
 	str	r3, [sp]
-.LVL857:
-	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL858:
-	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
 	blt	.L728
-	.loc 2 597 0
 	uxth	r0, r0
 	ldrh	r7, [r5, r0, lsl #1]
-.LVL859:
-	.loc 2 598 0
 	cbz	r7, .L728
-	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
 	cbnz	r3, .L728
-	.loc 2 599 0 is_stmt 1
 	movs	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 600 0
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 601 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 602 0
 	ldr	r3, .L739
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L729
-	.loc 2 603 0
 	mov	r0, r4
-.LVL860:
 	bl	ftl_map_blk_alloc_new_blk
-.LVL861:
 .L729:
-	.loc 2 607 0 discriminator 1
 	ldr	r5, .L739+4
-.LVL862:
-	.loc 2 586 0 discriminator 1
 	movs	r6, #0
-	.loc 2 607 0 discriminator 1
 	ldr	fp, .L739+20
 .L730:
-	.loc 2 605 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
-.LVL863:
 	cmp	r3, r10
 	bhi	.L734
-	.loc 2 621 0
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL864:
-	.loc 2 622 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL865:
 .L728:
-	.loc 2 626 0
 	ldr	r3, .L739
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L735
-	.loc 2 627 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL866:
 .L735:
-	.loc 2 629 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL867:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL868:
 .L734:
-	.cfi_restore_state
-	.loc 2 606 0
 	ldr	r3, [sp]
 	uxth	r8, r6
 	ldr	r2, [r3, r8, lsl #2]
 	cmp	r7, r2, lsr #10
 	bne	.L731
-	.loc 2 607 0
 	ldr	r3, [fp]
-	.loc 2 609 0
 	str	r2, [r5, #4]
-.LVL869:
-	.loc 2 611 0
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, .L739+4
-	.loc 2 607 0
 	str	r3, [r5, #8]
-	.loc 2 608 0
 	ldr	r3, .L739+8
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	str	r3, [sp, #4]
-.LVL870:
-	.loc 2 611 0
 	bl	FlashReadPages
-.LVL871:
-	.loc 2 613 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
 	beq	.L732
-	.loc 2 613 0 is_stmt 0 discriminator 1
 	movw	r2, #613
 	ldr	r1, .L739+12
 	ldr	r0, .L739+16
 	bl	printf
-.LVL872:
 .L732:
-	.loc 2 614 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L733
-	.loc 2 615 0
 	ldr	r2, [sp]
 	movs	r3, #0
 	str	r3, [r2, r8, lsl #2]
 .L731:
-.LVL873:
 	adds	r6, r6, #1
-.LVL874:
 	b	.L730
-.LVL875:
 .L733:
-	.loc 2 617 0
 	ldr	r2, [r5, #8]
 	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL876:
 	b	.L731
 .L740:
 	.align	2
@@ -9119,8 +5635,6 @@ ftl_map_blk_gc:
 	.word	.LANCHOR143
 	.word	.LC1
 	.word	.LANCHOR123
-	.cfi_endproc
-.LFE259:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -9131,53 +5645,30 @@ ftl_map_blk_gc:
 	.fpu softvfp
 	.type	flush_l2p_region, %function
 flush_l2p_region:
-.LFB262:
-	.loc 2 739 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL877:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 742 0
 	movs	r4, #12
 	ldr	r5, .L742
 	muls	r4, r0, r4
-	.loc 2 743 0
 	ldr	r0, .L742+4
-.LVL878:
-	.loc 2 742 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
-.LVL879:
-	.loc 2 743 0
 	ldrh	r1, [r3, r4]
-.LVL880:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL881:
-	.loc 2 744 0
 	ldr	r3, [r5]
-	.loc 2 746 0
 	movs	r0, #0
-	.loc 2 744 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 746 0
 	pop	{r3, r4, r5, pc}
 .L743:
 	.align	2
 .L742:
 	.word	.LANCHOR55
 	.word	.LANCHOR144
-	.cfi_endproc
-.LFE262:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.log2phys,"ax",%progbits
 	.align	1
@@ -9188,159 +5679,92 @@ flush_l2p_region:
 	.fpu softvfp
 	.type	log2phys, %function
 log2phys:
-.LFB265:
-	.loc 2 802 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL882:
-	.loc 2 805 0
 	ldr	r3, .L758
-	.loc 2 802 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 802 0
 	mov	r7, r1
 	mov	r10, r2
-	.loc 2 805 0
 	ldrh	r4, [r3]
 	adds	r3, r4, #7
-	.loc 2 806 0
 	movs	r4, #1
-	.loc 2 805 0
 	lsr	r8, r0, r3
-	.loc 2 806 0
 	lsls	r4, r4, r3
-	.loc 2 808 0
 	ldr	r3, .L758+4
-	.loc 2 806 0
 	subs	r4, r4, #1
-	.loc 2 805 0
 	uxth	r8, r8
-.LVL883:
-	.loc 2 806 0
 	ands	r4, r4, r0
-	.loc 2 808 0
 	ldr	r3, [r3]
-	.loc 2 806 0
 	uxth	r4, r4
-.LVL884:
-	.loc 2 808 0
 	cmp	r0, r3
 	bcc	.L745
-	.loc 2 808 0 is_stmt 0 discriminator 1
 	mov	r2, #808
-.LVL885:
 	ldr	r1, .L758+8
-.LVL886:
 	ldr	r0, .L758+12
-.LVL887:
 	bl	printf
-.LVL888:
 .L745:
-	.loc 2 811 0 is_stmt 1
 	ldr	r6, .L758+16
 	mov	fp, #12
-	.loc 2 810 0
 	ldr	r3, .L758+20
-	.loc 2 811 0
 	ldr	r1, [r6]
-	.loc 2 810 0
 	ldrh	r2, [r3]
 	movs	r3, #0
-.LVL889:
 .L746:
 	uxth	r5, r3
-.LVL890:
-	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	r5, r2
 	bcc	.L751
-	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL891:
-	.loc 2 826 0
 	mul	fp, fp, r0
 	ldr	r3, [r6]
-	.loc 2 825 0
 	mov	r5, r0
-.LVL892:
-	.loc 2 826 0
 	ldrh	r1, [r3, fp]
 	add	r2, r3, fp
 	movw	r3, #65535
 	cmp	r1, r3
 	beq	.L752
-	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
 	bge	.L752
-	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL893:
 .L752:
-	.loc 2 830 0
 	mov	r1, r5
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL894:
-	.loc 2 831 0
 	b	.L747
-.LVL895:
 .L751:
 	adds	r3, r3, #1
-	.loc 2 811 0
 	mla	r0, fp, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
 	bne	.L746
-.LVL896:
 .L747:
-	.loc 2 814 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r3, r3, r5, r2
-	.loc 2 813 0
 	cmp	r10, #0
 	bne	.L748
-	.loc 2 814 0
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r4, lsl #2]
 	str	r3, [r7]
 .L749:
-	.loc 2 820 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r5, r3, r5, r2
-.LVL897:
 	ldr	r3, [r5, #4]
 	adds	r2, r3, #1
 	beq	.L755
-	.loc 2 821 0
 	adds	r3, r3, #1
 	str	r3, [r5, #4]
 .L755:
-	.loc 2 832 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL898:
 .L748:
-	.loc 2 816 0
 	ldr	r1, [r7]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r4, lsl #2]
-	.loc 2 817 0
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	.loc 2 818 0
 	ldr	r3, .L758+24
 	strh	r8, [r3]	@ movhi
 	b	.L749
@@ -9354,8 +5778,6 @@ log2phys:
 	.word	.LANCHOR55
 	.word	.LANCHOR33
 	.word	.LANCHOR56
-	.cfi_endproc
-.LFE265:
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -9366,139 +5788,75 @@ log2phys:
 	.fpu softvfp
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
-.LFB283:
-	.loc 2 1677 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL899:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 1677 0
 	mov	r6, r0
-	.loc 2 1680 0
 	ldr	r5, .L770
-	.loc 2 1678 0
 	ubfx	r0, r1, #10, #16
-.LVL900:
-	.loc 2 1677 0
 	str	r1, [sp, #4]
-	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL901:
-	.loc 2 1680 0
 	ldr	r2, [r5]
-	.loc 2 1678 0
 	mov	r7, r0
-.LVL902:
-	.loc 2 1680 0
 	ldrh	r3, [r2, r0, lsl #1]
 	cbnz	r3, .L761
-	.loc 2 1681 0
 	ldr	r2, .L770+4
 	ldr	r4, [r2]
 	cmp	r4, #0
 	beq	.L762
-.LBB262:
-	.loc 2 1685 0
 	ldr	r2, .L770+8
-	.loc 2 1693 0
 	movw	lr, #65535
-	.loc 2 1685 0
 	ldr	ip, .L770+24
-	.loc 2 1684 0
 	ldr	r0, .L770+12
-.LVL903:
-	.loc 2 1685 0
 	ldr	r2, [r2]
-	.loc 2 1684 0
 	ldrh	r1, [r0]
-.LVL904:
 	mov	r8, r0
-	.loc 2 1685 0
 	subs	r4, r4, r2
 	asrs	r4, r4, #1
 	mul	r4, ip, r4
-	.loc 2 1693 0
 	mov	ip, #6
-	.loc 2 1685 0
 	uxth	r4, r4
-.LVL905:
 .L763:
-	.loc 2 1686 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
 	bls	.L762
-	.loc 2 1687 0
 	cmp	r4, r7
 	bne	.L764
-	.loc 2 1688 0
 	mov	r1, r4
-.LVL906:
 	ldr	r0, .L770+4
 	bl	List_remove_node
-.LVL907:
 	ldrh	r3, [r8]
 	cbnz	r3, .L765
-	.loc 2 1688 0 is_stmt 0 discriminator 1
 	mov	r2, #1688
 	ldr	r1, .L770+16
 	ldr	r0, .L770+20
 	bl	printf
-.LVL908:
 .L765:
-	.loc 2 1688 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 1688 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 1689 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL909:
-	.loc 2 1690 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.LVL910:
 .L761:
-.LBE262:
-	.loc 2 1699 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
 	b	.L762
-.LVL911:
 .L764:
-.LBB263:
-	.loc 2 1693 0
 	mul	r4, ip, r4
-.LVL912:
 	adds	r3, r3, #1
-.LVL913:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
 	bne	.L763
-.LVL914:
 .L762:
-.LBE263:
-	.loc 2 1701 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
-.LVL915:
-	.loc 2 1702 0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL916:
 .L771:
 	.align	2
 .L770:
@@ -9509,8 +5867,6 @@ FtlReUsePrevPpa:
 	.word	.LANCHOR146
 	.word	.LC1
 	.word	-1431655765
-	.cfi_endproc
-.LFE283:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.ftl_scan_all_data,"ax",%progbits
 	.align	1
@@ -9521,107 +5877,61 @@ FtlReUsePrevPpa:
 	.fpu softvfp
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
-.LFB294:
-	.loc 2 2325 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 2331 0
 	movs	r5, #0
 	ldr	r7, .L786
-	.loc 2 2325 0
 	sub	sp, sp, #32
-	.cfi_def_cfa_offset 56
-	.loc 2 2330 0
 	movs	r1, #0
-	.loc 2 2334 0
 	ldr	r8, .L786+24
-	.loc 2 2330 0
 	ldr	r0, .L786+4
 	bl	printf
-.LVL917:
 .L773:
-	.loc 2 2331 0 discriminator 1
 	ldr	r3, [r7]
 	cmp	r5, r3
 	bcc	.L779
-	.loc 2 2353 0
 	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL918:
 .L779:
-	.cfi_restore_state
-	.loc 2 2332 0
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL919:
-	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
 	cbnz	r3, .L774
-	.loc 2 2334 0
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.LVL920:
 .L774:
-	.loc 2 2335 0
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
 	beq	.L776
-	.loc 2 2336 0
 	ldr	r4, .L786+8
-	.loc 2 2340 0
 	movs	r2, #0
-	.loc 2 2342 0
 	movs	r1, #1
-	.loc 2 2336 0
 	str	r3, [r4, #4]
-	.loc 2 2342 0
 	mov	r0, r4
-	.loc 2 2338 0
 	ldr	r3, .L786+12
-	.loc 2 2337 0
 	str	r5, [r4, #16]
-	.loc 2 2340 0
 	str	r2, [r4]
-	.loc 2 2338 0
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	.loc 2 2339 0
 	ldr	r3, .L786+16
 	ldr	r6, [r3]
-.LVL921:
 	str	r6, [r4, #12]
-	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL922:
-	.loc 2 2343 0
 	ldr	r3, [r4]
 	cmp	r3, #256
 	beq	.L777
-	.loc 2 2343 0 is_stmt 0 discriminator 1
 	adds	r3, r3, #1
 	beq	.L777
-	.loc 2 2344 0 is_stmt 1
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
 	beq	.L776
 .L777:
-	.loc 2 2347 0
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
 	ldr	r0, .L786+20
@@ -9639,11 +5949,8 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.LVL923:
 .L776:
-	.loc 2 2331 0 discriminator 2
 	adds	r5, r5, #1
-.LVL924:
 	b	.L773
 .L787:
 	.align	2
@@ -9655,8 +5962,6 @@ ftl_scan_all_data:
 	.word	.LANCHOR108
 	.word	.LC93
 	.word	.LC92
-	.cfi_endproc
-.LFE294:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlReadRefresh,"ax",%progbits
 	.align	1
@@ -9667,29 +5972,15 @@ ftl_scan_all_data:
 	.fpu softvfp
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
-.LFB321:
-	.loc 5 419 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL925:
-	.loc 5 425 0
 	ldr	r3, .L801
-	.loc 5 419 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #88
-	.cfi_def_cfa_offset 104
 	mov	r4, r3
-	.loc 5 425 0
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
 	beq	.L789
-	.loc 5 426 0
 	ldr	r6, .L801+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
@@ -9697,135 +5988,79 @@ FtlReadRefresh:
 	bcs	.L790
 	mov	r5, #2048
 .L795:
-.LVL926:
-.LBB269:
-.LBB270:
-	.loc 5 428 0
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
 	bcs	.L792
-	.loc 5 430 0
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL927:
-	.loc 5 432 0
 	ldr	r2, [sp]
-	.loc 5 431 0
 	ldr	r3, [r4, #84]
-	.loc 5 432 0
 	adds	r1, r2, #1
-	.loc 5 431 0
 	add	r3, r3, #1
 	str	r3, [r4, #84]
-	.loc 5 432 0
 	beq	.L793
-.LBB271:
-	.loc 5 435 0
 	str	r3, [sp, #20]
-	.loc 5 438 0
 	add	r0, sp, #88
-	.loc 5 436 0
 	ldr	r3, .L801+8
-	.loc 5 439 0
 	movs	r1, #1
-	.loc 5 434 0
 	str	r2, [sp, #8]
-	.loc 5 438 0
 	movs	r2, #0
 	str	r2, [r0, #-84]!
-	.loc 5 436 0
 	str	r3, [sp, #12]
-	.loc 5 437 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-	.loc 5 439 0
 	bl	FlashReadPages
-.LVL928:
-	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
 	bne	.L792
-	.loc 5 442 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL929:
 	bl	FtlGcRefreshBlock
-.LVL930:
 .L792:
-.LBE271:
 	mov	r0, #-1
 .L788:
-.LBE270:
-.LBE269:
-	.loc 5 466 0
 	add	sp, sp, #88
-	.cfi_remember_state
-	.cfi_def_cfa_offset 16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.LVL931:
 .L793:
-	.cfi_restore_state
-.LBB273:
-.LBB272:
-	.loc 5 427 0
 	subs	r5, r5, #1
-.LVL932:
 	bne	.L795
 	b	.L792
-.LVL933:
 .L790:
-.LBE272:
-.LBE273:
-	.loc 5 451 0
 	ldr	r2, .L801+12
-	.loc 5 449 0
 	movs	r0, #0
 	str	r0, [r3, #80]
-	.loc 5 450 0
 	str	r0, [r3, #84]
-	.loc 5 451 0
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
 	b	.L788
 .L789:
-.LVL934:
-.LBB274:
-	.loc 5 456 0
 	ldr	r1, [r3, #76]
 	ldr	r3, .L801+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
 	bhi	.L798
-	.loc 5 454 0
 	ldr	r3, .L801+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
 	asrs	r3, r3, r2
-	.loc 5 457 0
 	add	r3, r3, r1
 	cmp	r5, r3
 	bhi	.L798
-	.loc 5 458 0
 	ldr	r3, .L801+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L788
 .L798:
-	.loc 5 460 0
 	movs	r3, #1
-	.loc 5 461 0
 	movs	r0, #0
-	.loc 5 460 0
 	str	r3, [r4, #80]
-	.loc 5 461 0
 	str	r0, [r4, #84]
-	.loc 5 462 0
 	str	r5, [r4, #76]
 	b	.L788
 .L802:
@@ -9837,9 +6072,6 @@ FtlReadRefresh:
 	.word	.LANCHOR62
 	.word	.LANCHOR76
 	.word	.LANCHOR39
-.LBE274:
-	.cfi_endproc
-.LFE321:
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
 	.align	1
@@ -9850,94 +6082,44 @@ FtlReadRefresh:
 	.fpu softvfp
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
-.LFB270:
-	.loc 2 946 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL935:
-	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	.loc 2 946 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 952 0
 	cbz	r3, .L803
-	.loc 2 948 0
 	ldrh	r5, [r0, #6]
-	.loc 2 954 0
 	movs	r3, #0
-	.loc 2 949 0
 	ldr	r2, [r0, #24]
-	.loc 2 954 0
 	str	r3, [r0, #36]
-	.loc 2 948 0
 	subs	r5, r5, #1
-	.loc 2 956 0
 	ldr	r3, .L807
-	.loc 2 957 0
 	ldr	r1, .L807+4
-	.loc 2 979 0
 	uxth	r5, r5
-	.loc 2 956 0
 	ldr	r4, .L807+8
-	.loc 2 979 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL936:
-	.loc 2 956 0
 	ldr	r0, [r3]
-.LVL937:
-	.loc 2 957 0
 	ldr	r1, [r1]
-	.loc 2 980 0
 	str	r2, [r4, #4]
-	.loc 2 956 0
 	str	r0, [r4, #8]
-	.loc 2 957 0
 	str	r1, [r4, #12]
-	.loc 2 981 0
 	cbz	r2, .L805
-	.loc 2 983 0
 	movs	r2, #1
-.LVL938:
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL939:
 .L806:
-	.loc 2 990 0
 	ldr	r2, [r4, #8]
 	mov	r1, r5
 	mov	r0, r6
-	.loc 2 992 0
 	pop	{r4, r5, r6, lr}
-	.cfi_remember_state
-	.cfi_restore 14
-	.cfi_restore 6
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-.LVL940:
-	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL941:
 .L805:
-	.cfi_restore_state
-	.loc 2 987 0
 	ldr	r3, .L807+12
 	movs	r1, #255
 	ldrh	r2, [r3]
-.LVL942:
 	bl	ftl_memset
-.LVL943:
 	b	.L806
-.LVL944:
 .L803:
 	pop	{r4, r5, r6, pc}
 .L808:
@@ -9947,8 +6129,6 @@ FtlMapBlkWriteDump_data:
 	.word	.LANCHOR108
 	.word	.LANCHOR106
 	.word	.LANCHOR23
-	.cfi_endproc
-.LFE270:
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -9959,288 +6139,183 @@ FtlMapBlkWriteDump_data:
 	.fpu softvfp
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-.LFB273:
-	.loc 2 1144 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1150 0
 	movs	r4, #0
-	.loc 2 1152 0
 	ldr	r5, .L889
-	.loc 2 1144 0
 	sub	sp, sp, #32
-	.cfi_def_cfa_offset 64
-	.loc 2 1152 0
 	mov	r1, r4
-	.loc 2 1151 0
 	ldr	r3, .L889+4
-	.loc 2 1152 0
 	ldr	r2, [r5]
-	.loc 2 1150 0
 	ldr	r6, .L889+8
-	.loc 2 1151 0
 	strh	r4, [r3]	@ movhi
-	.loc 2 1152 0
 	ldr	r3, .L889+12
 	lsls	r2, r2, #2
-	.loc 2 1150 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 1154 0
 	ldr	r7, .L889+16
-	.loc 2 1152 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL945:
-	.loc 2 1153 0
 	ldr	r2, [r5]
 	mov	r1, r4
 	ldr	r3, .L889+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL946:
-	.loc 2 1154 0
 	ldrh	r2, [r7]
 	mov	r1, r4
 	ldr	r3, .L889+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL947:
-	.loc 2 1155 0
 	ldrh	r2, [r7]
 	mov	r1, r4
 	ldr	r3, .L889+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL948:
-	.loc 2 1156 0
 	movs	r2, #12
 	movs	r1, #255
 	ldr	r0, .L889+32
 	bl	ftl_memset
-.LVL949:
-	.loc 2 1158 0
 	ldr	r3, .L889+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.LVL950:
 .L810:
-	.loc 2 1158 0 is_stmt 0 discriminator 1
 	ldr	r3, .L889+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
 	bls	.L851
-	.loc 2 1162 0 is_stmt 1 discriminator 1
 	ldr	r3, .L889+44
-	.loc 2 1169 0 discriminator 1
 	movs	r5, #0
 	ldr	r1, .L889+48
 	mov	fp, r5
-	.loc 2 1167 0 discriminator 1
 	movs	r7, #20
-	.loc 2 1162 0 discriminator 1
 	ldrh	r8, [r3]
-	.loc 2 1167 0 discriminator 1
 	ldr	r3, .L889+52
-	.loc 2 1169 0 discriminator 1
 	ldr	r2, [r1]
 	ldr	r1, .L889+56
-	.loc 2 1167 0 discriminator 1
 	ldr	r6, [r3]
-	.loc 2 1168 0 discriminator 1
 	ldr	r3, .L889+60
-	.loc 2 1169 0 discriminator 1
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
-	.loc 2 1168 0 discriminator 1
 	ldr	r3, [r3]
-	.loc 2 1164 0 discriminator 1
 	ldr	r2, .L889+64
 	b	.L852
-.LVL951:
 .L812:
-	.loc 2 1164 0 is_stmt 0
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
 	str	r2, [sp, #24]
 	bl	V2P_block
-.LVL952:
 	str	r0, [sp, #20]
-.LVL953:
-	.loc 2 1165 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL954:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
 	cbnz	r0, .L811
-	.loc 2 1167 0
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
-	.loc 2 1169 0
 	ldr	r4, [sp, #8]
-	.loc 2 1167 0
 	lsls	r1, r1, #10
-	.loc 2 1168 0
 	str	r3, [r0, #8]
-	.loc 2 1167 0
 	str	r1, [r0, #4]
-	.loc 2 1169 0
 	mul	r1, r10, fp
 	bic	r1, r1, #3
 	add	r1, r1, r4
 	str	r1, [r0, #12]
-	.loc 2 1170 0
 	add	r1, fp, #1
 	uxth	fp, r1
-.LVL955:
 .L811:
 	adds	r5, r5, #1
-.LVL956:
 .L852:
-	.loc 2 1162 0 discriminator 1
 	uxth	r1, r5
 	cmp	r8, r1
 	bhi	.L812
-	.loc 2 1173 0
 	cmp	fp, #0
 	bne	.L813
-.LVL957:
 .L850:
-	.loc 2 1158 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-.LVL958:
 	b	.L810
-.LVL959:
 .L813:
-	.loc 2 1177 0
 	movs	r7, #0
-	.loc 2 1176 0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.LVL960:
 .L814:
-	.loc 2 1177 0 discriminator 1
 	uxth	r3, r7
 	cmp	fp, r3
 	bls	.L850
-	.loc 2 1178 0
 	ldr	r3, .L889+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
 	add	r2, r3, r8
-	.loc 2 1181 0
 	ldr	r3, [r3, r8]
-	.loc 2 1178 0
 	ldr	r5, [r2, #4]
-	.loc 2 1179 0
 	ldr	r6, [r2, #12]
-	.loc 2 1181 0
 	adds	r3, r3, #1
-	.loc 2 1178 0
 	ubfx	r5, r5, #10, #16
-.LVL961:
-	.loc 2 1181 0
 	bne	.L817
 	mov	r10, #16
 .L819:
-.LVL962:
-	.loc 2 1183 0
 	ldr	r3, .L889+52
-	.loc 2 1184 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 1183 0
 	ldr	r0, [r3]
 	add	r0, r0, r8
 	ldr	r3, [r0, #4]
 	adds	r3, r3, #1
 	str	r3, [r0, #4]
-	.loc 2 1184 0
 	bl	FlashReadPages
-.LVL963:
-	.loc 2 1185 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	.loc 2 1186 0
 	ldr	r3, .L889+52
 	ldr	r3, [r3]
-	.loc 2 1185 0
 	bne	.L816
-	.loc 2 1186 0
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	.loc 2 1194 0
 	ldr	r3, .L889+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
 	bne	.L817
-.LVL964:
 .L818:
-	.loc 2 1336 0
 	movs	r1, #0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-.LVL965:
 	b	.L822
-.LVL966:
 .L816:
-	.loc 2 1188 0
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
 	bne	.L817
-.LVL967:
 	add	r10, r10, #-1
-.LVL968:
 	uxth	r10, r10
-	.loc 2 1182 0 discriminator 2
 	cmp	r10, #0
 	bne	.L819
 	b	.L818
 .L817:
-	.loc 2 1196 0
 	ldr	r3, .L889+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
 	beq	.L820
-	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
 	bhi	.L821
 .L820:
-	.loc 2 1198 0 is_stmt 1
 	adds	r2, r3, #1
-	.loc 2 1201 0
 	ittt	ne
 	ldrne	r1, .L889+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
 .L821:
-	.loc 2 1206 0
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
@@ -10250,11 +6325,8 @@ FtlScanSysBlk:
 	cmp	r2, r3
 	beq	.L825
 .L822:
-.LVL969:
 	adds	r7, r7, #1
-.LVL970:
 	b	.L814
-.LVL971:
 .L824:
 	movw	r3, #61634
 	cmp	r2, r3
@@ -10264,89 +6336,63 @@ FtlScanSysBlk:
 	beq	.L818
 	b	.L822
 .L826:
-	.loc 2 1211 0
 	ldr	r3, .L889+8
 	ldrh	r2, [r3]
 	ldr	r3, .L889
 	ldr	r3, [r3]
 	cmp	r2, r3
 	bls	.L828
-	.loc 2 1211 0 is_stmt 0 discriminator 1
 	movw	r2, #1211
 	ldr	r1, .L889+72
 	ldr	r0, .L889+76
 	bl	printf
-.LVL972:
 .L828:
-	.loc 2 1212 0 is_stmt 1
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	.loc 2 1214 0
 	ldr	r2, .L889+12
-	.loc 2 1212 0
 	uxth	r10, r1
-	.loc 2 1214 0
 	ldr	ip, [r2]
-	.loc 2 1212 0
 	add	r3, r10, #-1
 	sub	r10, r10, r0
 	add	r10, r10, #-1
 	sxth	r3, r3
-.LVL973:
 	sxth	r10, r10
 .L829:
-	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
 	bgt	.L835
-	.loc 2 1235 0 is_stmt 1
 	cmp	r3, #0
 	bge	.L867
 	b	.L822
 .L835:
-	.loc 2 1214 0
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
 	bls	.L830
-	.loc 2 1216 0
 	ldr	r2, [ip]
 	cbnz	r2, .L831
-	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
-	.loc 2 1221 0 is_stmt 1 discriminator 1
 	ittt	ne
 	ldrne	r2, .L889+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
 .L831:
-	.loc 2 1227 0 discriminator 1
 	ldr	r2, .L889+20
-	.loc 2 1224 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1227 0 discriminator 1
 	ldr	r0, [r2]
 	movs	r2, #0
 .L832:
-	.loc 2 1224 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL974:
 	cmp	r10, lr
 	bhi	.L833
-	.loc 2 1229 0
 	ldr	r2, [r6, #4]
-	.loc 2 1235 0
 	cmp	r3, #0
-	.loc 2 1229 0
 	str	r2, [r8]
-	.loc 2 1230 0
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	.loc 2 1235 0
 	blt	.L822
-	.loc 2 1242 0
 	ldr	r2, .L889+8
 	ldrh	r0, [r2]
 	ldr	r2, .L889
@@ -10356,42 +6402,29 @@ FtlScanSysBlk:
 	sxth	r2, r2
 	cmp	r3, r2
 	bgt	.L822
-.LVL975:
 .L867:
-	.loc 2 1244 0
 	ldr	r2, .L889+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
-	.loc 2 1245 0
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	.loc 2 1246 0
 	ldr	r2, .L889+20
 .L887:
-	.loc 2 1290 0
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
 	b	.L822
-.LVL976:
 .L833:
-	.loc 2 1226 0 discriminator 3
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1227 0 discriminator 3
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1226 0 discriminator 3
 	str	r4, [ip, r1, lsl #2]
-	.loc 2 1227 0 discriminator 3
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-.LVL977:
 	b	.L832
 .L830:
 	subs	r3, r3, #1
-.LVL978:
 	sxth	r3, r3
-.LVL979:
 	b	.L829
 .L890:
 	.align	2
@@ -10416,80 +6449,56 @@ FtlScanSysBlk:
 	.word	.LANCHOR70
 	.word	.LANCHOR148
 	.word	.LC1
-.LVL980:
 .L825:
-	.loc 2 1252 0
 	ldr	r8, .L891+12
 	ldr	r10, .L891+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
 	bls	.L838
-	.loc 2 1252 0 is_stmt 0 discriminator 1
 	movw	r2, #1252
 	ldr	r1, .L891
 	ldr	r0, .L891+4
 	bl	printf
-.LVL981:
 .L838:
-	.loc 2 1255 0 is_stmt 1
 	ldr	r2, .L891+8
-	.loc 2 1253 0
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
-	.loc 2 1255 0
 	ldr	r0, [r2]
-	.loc 2 1253 0
 	add	r10, lr, #-1
 	sxth	r3, r10
-.LVL982:
 	sub	r10, r10, ip
 .L839:
-	.loc 2 1253 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
 	ble	.L844
-	.loc 2 1255 0 is_stmt 1
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
 	bls	.L840
-	.loc 2 1257 0
 	ldr	r2, [r0]
 	cbnz	r2, .L841
-	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	lr, ip
-	.loc 2 1265 0 is_stmt 1 discriminator 1
 	ittt	ne
 	ldrne	r2, .L891+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
 .L841:
-	.loc 2 1270 0 discriminator 1
 	ldr	r2, .L891+16
-	.loc 2 1267 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1270 0 discriminator 1
 	ldr	ip, [r2]
 	movs	r2, #0
 .L842:
-	.loc 2 1267 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL983:
 	cmp	r10, lr
 	bhi	.L843
-	.loc 2 1272 0
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
-	.loc 2 1273 0
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.LVL984:
 .L844:
-	.loc 2 1278 0
 	cmp	r3, #0
 	blt	.L822
-	.loc 2 1286 0
 	ldr	r2, .L891+20
 	ldr	ip, .L891+12
 	ldrh	r2, [r2]
@@ -10499,203 +6508,142 @@ FtlScanSysBlk:
 	sxth	r2, r2
 	cmp	r3, r2
 	bgt	.L822
-	.loc 2 1289 0
 	ldr	r2, [r6, #4]
-	.loc 2 1288 0
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
-	.loc 2 1289 0
 	str	r2, [r0, r3, lsl #2]
-	.loc 2 1290 0
 	ldr	r2, .L891+16
 	b	.L887
-.LVL985:
 .L843:
-	.loc 2 1269 0 discriminator 3
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1270 0 discriminator 3
 	add	lr, ip, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1269 0 discriminator 3
 	str	r4, [r0, r1, lsl #2]
-	.loc 2 1270 0 discriminator 3
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-.LVL986:
 	b	.L842
 .L840:
 	subs	r3, r3, #1
-.LVL987:
 	sxth	r3, r3
-.LVL988:
 	b	.L839
-.LVL989:
 .L823:
-	.loc 2 1297 0
 	ldr	r8, .L891+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
 	bne	.L846
 .L888:
-	.loc 2 1309 0
 	strh	r5, [r8]	@ movhi
-	.loc 2 1310 0
 	str	r3, [r8, #8]
 	b	.L822
 .L846:
-	.loc 2 1304 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
 	beq	.L847
-	.loc 2 1305 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL990:
 .L847:
-	.loc 2 1306 0
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
 	bcs	.L848
-	.loc 2 1308 0
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
 	b	.L888
 .L848:
-	.loc 2 1314 0
 	strh	r5, [r8, #4]	@ movhi
 	b	.L822
-.LVL991:
 .L851:
-	.loc 2 1341 0
 	ldr	r3, .L891+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
 	cbz	r3, .L853
 .L856:
-	.loc 2 1359 0
 	ldr	r3, .L891+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
 	beq	.L854
 .L855:
-	.loc 2 1377 0
 	ldr	r3, .L891+28
 	ldrh	r2, [r3]
 	ldr	r3, .L891+32
 	ldr	r3, [r3]
 	cmp	r2, r3
 	bls	.L886
-	.loc 2 1377 0 is_stmt 0 discriminator 1
 	movw	r2, #1377
 	ldr	r1, .L891
 	ldr	r0, .L891+4
 	bl	printf
-.LVL992:
 .L886:
-	.loc 2 1379 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #32
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL993:
 .L853:
-	.cfi_restore_state
-	.loc 2 1341 0 discriminator 1
 	ldr	r1, .L891+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
 	beq	.L856
-	.loc 2 1343 0 discriminator 1
 	ldr	r5, .L891+32
 	ldr	r0, [r5]
 .L857:
 	sxth	r1, r3
-.LVL994:
 	cmp	r1, r0
 	bcs	.L856
-	.loc 2 1345 0
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
 	beq	.L857
-	.loc 2 1350 0
 	ldr	r3, .L891+36
-	.loc 2 1351 0
 	movs	r6, #0
-	.loc 2 1350 0
 	ldr	r0, [r3]
 	mov	r3, r1
 .L858:
-.LVL995:
-	.loc 2 1347 0 discriminator 1
 	ldr	r4, [r5]
 	cmp	r3, r4
 	bcs	.L856
-	.loc 2 1349 0 discriminator 3
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
-	.loc 2 1350 0 discriminator 3
 	ldr	r7, [r0, r3, lsl #2]
 	str	r7, [r0, r4, lsl #2]
-	.loc 2 1351 0 discriminator 3
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-.LVL996:
 	sxth	r3, r3
-.LVL997:
 	b	.L858
-.LVL998:
 .L854:
-	.loc 2 1359 0 discriminator 1
 	ldr	r3, .L891+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
 	beq	.L855
-	.loc 2 1361 0 discriminator 1
 	ldr	r5, .L891+20
 	ldrh	r1, [r5]
 .L863:
 	sxth	r3, r2
-.LVL999:
 	cmp	r3, r1
 	mov	r6, r3
 	bge	.L855
-	.loc 2 1363 0
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
 	beq	.L863
-	.loc 2 1368 0
 	ldr	r2, .L891+8
-	.loc 2 1369 0
 	movs	r0, #0
-	.loc 2 1368 0
 	ldr	r2, [r2]
-.LVL1000:
 .L864:
-	.loc 2 1365 0 discriminator 1
 	ldrh	r1, [r5]
 	cmp	r3, r1
 	bge	.L855
-	.loc 2 1367 0 discriminator 3
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
-	.loc 2 1368 0 discriminator 3
 	ldr	r7, [r2, r3, lsl #2]
 	str	r7, [r2, r1, lsl #2]
 	adds	r1, r3, #1
-	.loc 2 1369 0 discriminator 3
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-.LVL1001:
 	b	.L864
 .L892:
 	.align	2
@@ -10711,8 +6659,6 @@ FtlScanSysBlk:
 	.word	.LANCHOR30
 	.word	.LANCHOR135
 	.word	.LANCHOR79
-	.cfi_endproc
-.LFE273:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -10723,244 +6669,137 @@ FtlScanSysBlk:
 	.fpu softvfp
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-.LFB278:
-	.loc 2 1515 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1002:
-	.loc 2 1521 0
 	ldr	r3, [r0, #16]
-	.loc 2 1526 0
 	movs	r1, #0
-	.loc 2 1515 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 1522 0
 	ldrh	fp, [r0, #6]
-	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1532 0
 	movs	r6, #0
-	.loc 2 1519 0
 	ldr	r8, [r0, #24]
-.LVL1003:
-	.loc 2 1521 0
 	str	r3, [sp, #12]
-	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-	.loc 2 1526 0
 	lsl	r2, fp, #2
-	.loc 2 1520 0
 	ldr	r10, [r0, #12]
-.LVL1004:
-	.loc 2 1526 0
 	mov	r0, r8
-.LVL1005:
-	.loc 2 1527 0
 	ldr	r5, .L920
-	.loc 2 1523 0
 	str	r3, [sp, #4]
-.LVL1006:
-	.loc 2 1526 0
 	bl	ftl_memset
-.LVL1007:
-	.loc 2 1527 0
 	ldr	r3, .L920+4
-	.loc 2 1532 0
 	str	r6, [r4, #32]
-	.loc 2 1533 0
 	str	r6, [r4, #28]
-	.loc 2 1527 0
 	ldr	r2, [r3]
-	.loc 2 1559 0
 	str	r3, [sp, #8]
-	.loc 2 1527 0
 	str	r2, [r5, #8]
-	.loc 2 1528 0
 	ldr	r2, .L920+8
 	ldr	r7, [r2]
-	.loc 2 1530 0
 	movw	r2, #65535
-	.loc 2 1528 0
 	str	r7, [r5, #12]
-.LVL1008:
-	.loc 2 1530 0
 	strh	r2, [r4]	@ movhi
-	.loc 2 1531 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 1534 0
 	movs	r2, #1
 	str	r2, [r4, #36]
-.LVL1009:
 .L894:
-	.loc 2 1535 0 discriminator 1
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
-.LVL1010:
 	cmp	r3, r2
 	bge	.L911
-	.loc 2 1537 0
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
 	bne	.L895
-	.loc 2 1539 0
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
 	str	r3, [sp, #4]
-.LVL1011:
 	bl	FtlGetLastWrittenPage
-.LVL1012:
-	.loc 2 1542 0
 	ldr	r3, [sp, #12]
-	.loc 2 1539 0
 	sxth	r10, r0
-.LVL1013:
-	.loc 2 1541 0
 	strh	r6, [r4]	@ movhi
-	.loc 2 1543 0
 	movs	r6, #0
-	.loc 2 1540 0
 	adds	r0, r0, #1
-	.loc 2 1542 0
 	mov	r2, r3
 	ldr	r3, [sp, #4]
-	.loc 2 1540 0
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1542 0
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.LVL1014:
-	.loc 2 1545 0
 	ldr	r3, .L920
-.LVL1015:
 .L896:
 	sxth	r2, r6
-.LVL1016:
-	.loc 2 1543 0 discriminator 1
 	cmp	r2, r10
 	ble	.L898
-.LVL1017:
 .L911:
-	.loc 2 1596 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL1018:
-	.loc 2 1597 0
 	ldr	r3, .L920+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bne	.L900
-	.loc 2 1599 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1019:
 .L900:
-	.loc 2 1602 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1020:
-	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1021:
-	.loc 2 1606 0
 	movs	r0, #0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1022:
 .L898:
-	.cfi_restore_state
-	.loc 2 1545 0
 	ldrh	r1, [r5]
-	.loc 2 1546 0
 	ldr	r0, .L920
-	.loc 2 1545 0
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
-.LVL1023:
 	str	r2, [r3, #4]
-	.loc 2 1546 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1024:
-	.loc 2 1549 0
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
 	beq	.L897
-	.loc 2 1551 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
 	bls	.L897
-	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1553 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
 .L897:
-.LVL1025:
 	adds	r6, r6, #1
-.LVL1026:
 	b	.L896
-.LVL1027:
 .L895:
-	.loc 2 1559 0
 	ldr	r1, [sp, #8]
-	.loc 2 1560 0
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	.loc 2 1561 0
 	ldr	r0, .L920
-	.loc 2 1559 0
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
-	.loc 2 1560 0
 	ldrh	r1, [r10, r3, lsl #1]
 	ldr	r3, .L920+12
-.LVL1028:
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
-	.loc 2 1561 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1029:
-	.loc 2 1564 0
 	ldr	r2, [r5]
 	adds	r2, r2, #1
 	beq	.L913
-	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
 	bne	.L913
-	.loc 2 1564 0 discriminator 2
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
@@ -10968,88 +6807,58 @@ FtlMapTblRecovery:
 .L913:
 	movs	r3, #0
 .L903:
-.LVL1030:
-	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldr	r1, .L920+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
 	bge	.L909
 	str	r3, [sp, #20]
-	.loc 2 1581 0
 	ldr	r3, [sp, #16]
-.LVL1031:
-	.loc 2 1582 0
 	ldr	r0, .L920
-	.loc 2 1581 0
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-.LVL1032:
 	str	r2, [r5, #4]
-	.loc 2 1582 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1033:
-	.loc 2 1585 0
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
 	beq	.L907
-	.loc 2 1587 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
 	bls	.L907
-	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1589 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
 .L907:
-.LVL1034:
 	adds	r3, r3, #1
-.LVL1035:
 	b	.L903
 .L902:
-	.loc 2 1567 0 discriminator 1
 	ldrh	r2, [r3]
-	.loc 2 1569 0 discriminator 1
 	movs	r1, #0
 	ldr	r3, [sp, #8]
-	.loc 2 1567 0 discriminator 1
 	subs	r2, r2, #1
-	.loc 2 1569 0 discriminator 1
 	ldr	ip, [r3]
 .L904:
 	sxth	r3, r1
-.LVL1036:
-	.loc 2 1567 0 discriminator 1
 	cmp	r3, r2
 	blt	.L906
 .L909:
-.LVL1037:
 	adds	r6, r6, #1
-.LVL1038:
 	b	.L894
-.LVL1039:
 .L906:
-	.loc 2 1569 0
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
-.LVL1040:
 	adds	r1, r1, #1
-.LVL1041:
-	.loc 2 1570 0
 	uxth	lr, r3
 	cmp	fp, lr
-	.loc 2 1572 0
 	itttt	hi
 	addhi	r0, r0, ip
 	movhi	r3, lr
-.LVL1042:
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
 	b	.L904
@@ -11060,8 +6869,6 @@ FtlMapTblRecovery:
 	.word	.LANCHOR107
 	.word	.LANCHOR108
 	.word	.LANCHOR20
-	.cfi_endproc
-.LFE278:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -11072,51 +6879,34 @@ FtlMapTblRecovery:
 	.fpu softvfp
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
-.LFB279:
-	.loc 2 1609 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 1610 0
 	ldr	r3, .L923
 	ldr	r0, .L923+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
-	.loc 2 1611 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	.loc 2 1612 0
 	ldr	r3, .L923+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	.loc 2 1613 0
 	ldr	r3, .L923+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	.loc 2 1614 0
 	ldr	r3, .L923+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	.loc 2 1615 0
 	ldr	r3, .L923+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	.loc 2 1616 0
 	ldr	r3, .L923+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	.loc 2 1617 0
 	ldr	r3, .L923+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
-	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1043:
-	.loc 2 1622 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L924:
@@ -11130,8 +6920,6 @@ FtlLoadVonderInfo:
 	.word	.LANCHOR132
 	.word	.LANCHOR131
 	.word	.LANCHOR133
-	.cfi_endproc
-.LFE279:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -11142,112 +6930,71 @@ FtlLoadVonderInfo:
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB280:
-	.loc 2 1625 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 1627 0
 	movs	r1, #0
 	ldr	r5, .L928
 	ldr	r4, .L928+4
 	ldr	r2, [r5]
-	.loc 2 1628 0
 	ldr	r7, .L928+8
 	ldr	r6, .L928+12
-	.loc 2 1627 0
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	.loc 2 1628 0
 	ldr	r8, .L928+44
-	.loc 2 1627 0
 	bl	ftl_memset
-.LVL1044:
-	.loc 2 1628 0
 	ldrh	r3, [r7]
 	movs	r1, #255
 	ldrh	r2, [r6]
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1045:
 	ldr	r3, .L928+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
-	.loc 2 1633 0
 	ldr	ip, [r8]
 	ldr	r2, [r3]
 	movs	r3, #12
 	ldrh	r7, [r7]
 	mla	r3, r1, r3, r3
 	adds	r1, r2, r3
-	.loc 2 1629 0
 	movs	r3, #0
-	.loc 2 1631 0
 	mov	lr, r3
-.LVL1046:
 .L926:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
-	.loc 2 1629 0 discriminator 1
 	cmp	r2, r1
 	bne	.L927
-	.loc 2 1635 0
 	ldr	r3, .L928+20
-	.loc 2 1637 0
 	ldr	r2, [r5]
-	.loc 2 1635 0
 	strh	r0, [r3, #2]	@ movhi
-	.loc 2 1637 0
 	strh	r2, [r3, #10]	@ movhi
-	.loc 2 1638 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	.loc 2 1639 0
 	ldr	r2, .L928+24
-	.loc 2 1636 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1639 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 1640 0
 	ldr	r2, .L928+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	.loc 2 1641 0
 	ldr	r2, .L928+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	.loc 2 1642 0
 	ldr	r2, .L928+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	.loc 2 1643 0
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	.loc 2 1644 0
 	ldr	r2, .L928+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
 .L927:
-	.loc 2 1633 0 discriminator 3
 	bic	r3, r3, #3
-	.loc 2 1631 0 discriminator 3
 	str	lr, [r2, #-8]
-	.loc 2 1633 0 discriminator 3
 	add	r3, r3, ip
-	.loc 2 1632 0 discriminator 3
 	strh	r0, [r2, #-12]	@ movhi
-	.loc 2 1633 0 discriminator 3
 	str	r3, [r2, #-4]
 	mov	r3, r6
 	b	.L926
@@ -11266,8 +7013,6 @@ FtlL2PDataInit:
 	.word	.LANCHOR135
 	.word	.LANCHOR134
 	.word	.LANCHOR136
-	.cfi_endproc
-.LFE280:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
@@ -11278,31 +7023,18 @@ FtlL2PDataInit:
 	.fpu softvfp
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
-.LFB281:
-	.loc 2 1648 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1047:
-	.loc 2 1651 0
 	ldr	r0, .L931
 	bl	FtlMapTblRecovery
-.LVL1048:
-	.loc 2 1654 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L932:
 	.align	2
 .L931:
 	.word	.LANCHOR144
-	.cfi_endproc
-.LFE281:
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -11313,85 +7045,52 @@ FtlLoadMapInfo:
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB210:
-	.loc 3 494 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 3 497 0
 	movw	r2, #65535
 	ldr	r3, .L934
-	.loc 3 498 0
 	movs	r4, #0
-	.loc 3 502 0
 	mov	r1, r4
-	.loc 3 503 0
 	ldr	r5, .L934+4
-	.loc 3 497 0
 	strh	r2, [r3]	@ movhi
-	.loc 3 500 0
 	mov	r2, #-1
-	.loc 3 498 0
 	ldr	r3, .L934+8
 	str	r4, [r3]
-	.loc 3 499 0
 	ldr	r3, .L934+12
 	str	r4, [r3]
-	.loc 3 500 0
 	ldr	r3, .L934+16
 	str	r2, [r3]
-	.loc 3 501 0
 	ldr	r3, .L934+20
 	strh	r4, [r3]	@ movhi
-	.loc 3 502 0
 	ldr	r3, .L934+24
 	ldrh	r2, [r3]
 	ldr	r3, .L934+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1049:
-	.loc 3 503 0
 	ldrh	r2, [r5]
 	mov	r1, r4
 	ldr	r3, .L934+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1050:
-	.loc 3 504 0
 	ldrh	r2, [r5]
 	mov	r1, r4
 	ldr	r3, .L934+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1051:
-	.loc 3 505 0
 	mov	r1, r4
 	movs	r2, #48
 	ldr	r0, .L934+40
 	bl	ftl_memset
-.LVL1052:
-	.loc 3 506 0
 	mov	r2, #512
 	mov	r1, r4
 	ldr	r0, .L934+44
 	bl	ftl_memset
-.LVL1053:
-	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1054:
-	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1055:
-	.loc 3 510 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
 .L935:
@@ -11409,8 +7108,6 @@ FtlVariablesInit:
 	.word	.LANCHOR126
 	.word	.LANCHOR39
 	.word	.LANCHOR81
-	.cfi_endproc
-.LFE210:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -11421,207 +7118,125 @@ FtlVariablesInit:
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB288:
-	.loc 2 2116 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2120 0
 	movs	r2, #6
 	ldr	r3, .L947
 	movs	r1, #0
-	.loc 2 2121 0
 	movs	r4, #0
-	.loc 2 2120 0
 	ldr	r5, .L947+4
-	.loc 2 2126 0
 	mov	r8, r4
-	.loc 2 2120 0
 	ldrh	r3, [r3]
-	.loc 2 2126 0
 	mov	r6, r4
-	.loc 2 2120 0
 	ldr	r0, [r5]
 	mov	r10, r5
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1056:
-	.loc 2 2121 0
 	ldr	r3, .L947+8
-	.loc 2 2124 0
 	ldr	r2, .L947+12
-	.loc 2 2121 0
 	str	r4, [r3]
-	.loc 2 2122 0
 	ldr	r3, .L947+16
-	.loc 2 2124 0
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
-	.loc 2 2122 0
 	str	r4, [r3]
-	.loc 2 2123 0
 	ldr	r3, .L947+20
 	str	r4, [r3]
-	.loc 2 2125 0
 	ldr	r3, .L947+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL1057:
 .L937:
-	.loc 2 2128 0 discriminator 1
 	ldr	r3, .L947+28
 	uxth	r7, r4
-.LVL1058:
 	ldrh	r3, [r3]
 	cmp	r7, r3
 	bcs	.L943
-	.loc 2 2130 0
 	ldr	r3, .L947+32
 	ldrh	r2, [r3]
-	.loc 2 2133 0
 	ldr	r3, .L947+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r5, r3
 	b	.L944
-.LVL1059:
 .L939:
 	str	r2, [sp, #12]
-	.loc 2 2131 0
 	mov	r1, r7
 	ldr	r2, .L947+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1060:
-	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL1061:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	cbnz	r0, .L938
-	.loc 2 2133 0
 	ldr	r1, [sp]
 	add	r5, r5, r1
-.LVL1062:
 	uxth	r5, r5
-.LVL1063:
 .L938:
 	adds	r3, r3, #1
-.LVL1064:
 .L944:
-	.loc 2 2130 0 discriminator 1
 	uxth	r1, r3
 	cmp	r2, r1
 	bhi	.L939
-	.loc 2 2135 0
 	cbz	r5, .L946
-	.loc 2 2136 0
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL1065:
 .L940:
-	.loc 2 2137 0
 	ldr	r1, [r10]
 	uxth	r2, r4
 	movs	r3, #6
 	mla	r3, r3, r2, r1
 	strh	r0, [r3, #4]	@ movhi
-	.loc 2 2139 0
 	ldr	r3, .L947+44
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	beq	.L941
-	.loc 2 2140 0 discriminator 1
 	ldr	r3, .L947+48
-	.loc 2 2139 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	beq	.L941
-	.loc 2 2141 0
 	ldr	r3, .L947+52
-	.loc 2 2140 0
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	beq	.L941
-	.loc 2 2143 0
 	ldr	r3, .L947+56
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cbnz	r3, .L942
-	.loc 2 2144 0
 	add	r8, r8, #1
-.LVL1066:
-	.loc 2 2145 0
 	mov	r0, r7
-.LVL1067:
-	.loc 2 2144 0
 	uxth	r8, r8
-.LVL1068:
-	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL1069:
 .L941:
 	adds	r4, r4, #1
-.LVL1070:
 	b	.L937
-.LVL1071:
 .L946:
 	mov	r0, r5
 	b	.L940
-.LVL1072:
 .L942:
-	.loc 2 2147 0
 	adds	r6, r6, #1
-.LVL1073:
-	.loc 2 2148 0
 	mov	r0, r7
-.LVL1074:
-	.loc 2 2147 0
 	uxth	r6, r6
-.LVL1075:
-	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1076:
 	b	.L941
 .L943:
-	.loc 2 2152 0
 	ldr	r2, [sp, #4]
-	.loc 2 2153 0
 	strh	r8, [fp]	@ movhi
-	.loc 2 2152 0
 	strh	r6, [r2]	@ movhi
-	.loc 2 2154 0
 	add	r6, r6, r8
-.LVL1077:
 	cmp	r6, r3
 	ble	.L945
-	.loc 2 2154 0 is_stmt 0 discriminator 1
 	movw	r2, #2154
 	ldr	r1, .L947+60
 	ldr	r0, .L947+64
 	bl	printf
-.LVL1078:
 .L945:
-	.loc 2 2156 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1079:
 .L948:
 	.align	2
 .L947:
@@ -11642,8 +7257,6 @@ SupperBlkListInit:
 	.word	.LANCHOR42
 	.word	.LANCHOR154
 	.word	.LC1
-	.cfi_endproc
-.LFE288:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.ftl_check_vpc,"ax",%progbits
 	.align	1
@@ -11654,163 +7267,95 @@ SupperBlkListInit:
 	.fpu softvfp
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
-.LFB293:
-	.loc 2 2273 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1080:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2282 0
 	movs	r4, #0
 	ldr	r6, .L973
-	.loc 2 2288 0
 	ldr	r5, .L973+4
-	.loc 2 2279 0
 	ldr	r1, .L973+8
 	ldr	r0, .L973+12
 	bl	printf
-.LVL1081:
-	.loc 2 2281 0
 	mov	r2, #8192
 	movs	r1, #0
 	ldr	r0, .L973+4
 	bl	ftl_memset
-.LVL1082:
 .L950:
-	.loc 2 2282 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r4, r3
 	bcc	.L952
-	.loc 2 2293 0 discriminator 1
 	ldr	r10, .L973+48
 	movs	r4, #0
-.LVL1083:
-	.loc 2 2295 0 discriminator 1
 	ldr	r7, .L973+16
 	mov	r6, r4
-.LVL1084:
 .L953:
-	.loc 2 2293 0 discriminator 1
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
 	bhi	.L955
-	.loc 2 2305 0
 	ldr	r3, .L973+20
 	ldr	r4, [r3]
-.LVL1085:
 	cbz	r4, .L956
-.LBB275:
-	.loc 2 2307 0
 	ldr	r3, .L973+24
-	.loc 2 2309 0
 	mov	r8, #0
-	.loc 2 2308 0
 	ldr	r5, .L973+28
-	.loc 2 2311 0
 	ldr	r10, .L973+16
-	.loc 2 2307 0
 	ldrh	r7, [r3]
-.LVL1086:
-	.loc 2 2308 0
 	ldr	r3, [r5]
-	.loc 2 2313 0
 	ldr	fp, .L973+4
-	.loc 2 2308 0
 	subs	r4, r4, r3
 	ldr	r3, .L973+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.LVL1087:
 .L957:
-	.loc 2 2309 0 discriminator 1
 	uxth	r3, r8
 	cmp	r7, r3
 	bls	.L956
-	.loc 2 2311 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
 	cbz	r2, .L958
-	.loc 2 2314 0
 	movs	r6, #1
-	.loc 2 2313 0
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
 	ldr	r0, .L973+36
 	bl	printf
-.LVL1088:
 .L958:
-	.loc 2 2316 0
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
-.LVL1089:
 	movw	r3, #65535
 	add	r8, r8, #1
-.LVL1090:
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
 	bne	.L957
-.LVL1091:
 .L956:
-.LBE275:
-	.loc 2 2321 0
 	cbz	r6, .L949
-.LVL1092:
-	.loc 2 2321 0 is_stmt 0 discriminator 1
 	movw	r2, #2321
 	ldr	r1, .L973+8
 	ldr	r0, .L973+40
 	bl	printf
-.LVL1093:
 .L949:
-	.loc 2 2322 0 is_stmt 1
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1094:
 .L952:
-	.cfi_restore_state
-	.loc 2 2284 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL1095:
-	.loc 2 2285 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
 	beq	.L951
-	.loc 2 2287 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1096:
-	.loc 2 2288 0
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.LVL1097:
 .L951:
-	.loc 2 2282 0 discriminator 2
 	adds	r4, r4, #1
-.LVL1098:
 	b	.L950
-.LVL1099:
 .L955:
-	.loc 2 2295 0
 	ldr	r3, [r7]
 	uxth	r5, r4
 	ldr	r8, .L973+4
@@ -11818,27 +7363,20 @@ ftl_check_vpc:
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
 	beq	.L954
-	.loc 2 2297 0
 	mov	r1, r5
 	ldr	r0, .L973+44
 	bl	printf
-.LVL1100:
-	.loc 2 2298 0
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
 	beq	.L954
-	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r8, r5, lsl #1]
-	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.LVL1101:
 .L954:
 	adds	r4, r4, #1
-.LVL1102:
 	b	.L953
 .L974:
 	.align	2
@@ -11856,8 +7394,6 @@ ftl_check_vpc:
 	.word	.LC1
 	.word	.LC95
 	.word	.LANCHOR5
-	.cfi_endproc
-.LFE293:
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -11868,35 +7404,21 @@ ftl_check_vpc:
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB312:
-	.loc 5 202 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	.loc 5 203 0
 	ldr	r2, .L976
 	movs	r3, #0
-	.loc 5 202 0
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 5 205 0
 	movs	r1, #255
 	ldr	r4, .L976+4
-	.loc 5 203 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 204 0
 	ldr	r2, .L976+8
 	strh	r3, [r2]	@ movhi
-	.loc 5 205 0
 	ldrh	r2, [r4]
 	ldr	r3, .L976+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1103:
-	.loc 5 206 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
@@ -11904,15 +7426,8 @@ FtlGcPageVarInit:
 	ldr	r3, .L976+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1104:
-	.loc 5 208 0
 	pop	{r4, lr}
-	.cfi_restore 14
-	.cfi_restore 4
-	.cfi_def_cfa_offset 0
-	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1105:
 .L977:
 	.align	2
 .L976:
@@ -11921,8 +7436,6 @@ FtlGcPageVarInit:
 	.word	.LANCHOR97
 	.word	.LANCHOR95
 	.word	.LANCHOR98
-	.cfi_endproc
-.LFE312:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -11933,192 +7446,112 @@ FtlGcPageVarInit:
 	.fpu softvfp
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-.LFB313:
-	.loc 5 211 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1106:
-	.loc 5 220 0
 	ldr	r3, .L1001
-	.loc 5 211 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 5 211 0
 	mov	r5, r0
 	str	r1, [sp, #8]
-	.loc 5 220 0
 	ldrh	r4, [r3]
-.LVL1107:
-	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
 	beq	.L995
-	.loc 5 223 0
 	cbnz	r4, .L979
 .L980:
-	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1108:
 	b	.L981
-.LVL1109:
 .L995:
-	.loc 5 222 0
 	movs	r4, #0
-.LVL1110:
 .L979:
-	.loc 5 223 0 discriminator 1
 	ldr	r3, .L1001+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
 	beq	.L980
-.LVL1111:
 .L981:
-	.loc 5 222 0
 	movs	r7, #0
-.LVL1112:
 .L989:
-	.loc 5 228 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
-	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
-.LVL1113:
-	.loc 5 228 0
 	cmp	r2, r3
 	beq	.L982
 .L992:
-.LVL1114:
-	.loc 5 231 0
 	ldr	r3, .L1001+8
 	movs	r2, #0
 	add	ip, r5, #16
-	.loc 5 230 0
 	mov	r6, r2
-	.loc 5 233 0
 	movw	lr, #65535
-	.loc 5 234 0
 	mov	r8, #20
-	.loc 5 231 0
 	ldrh	fp, [r3]
-	.loc 5 234 0
 	ldr	r3, .L1001+12
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
-	.loc 5 235 0
 	ldr	r3, .L1001+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
 	ldr	r3, .L1001+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
-	.loc 5 236 0
 	ldr	r3, .L1001+24
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	ldr	r3, .L1001+28
 	ldrh	r10, [r3]
-.LVL1115:
 .L983:
-	.loc 5 231 0 discriminator 1
 	uxth	r3, r2
 	cmp	fp, r3
 	bhi	.L985
-	.loc 5 241 0
 	mov	r8, #0
-	.loc 5 242 0
 	mov	fp, #20
-	.loc 5 240 0
 	movs	r2, #0
-.LVL1116:
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL1117:
 .L986:
-	.loc 5 241 0 discriminator 1
 	uxth	r3, r8
 	cmp	r6, r3
 	bhi	.L990
-	.loc 5 268 0
 	ldr	r3, [sp, #8]
-	.loc 5 266 0
 	adds	r7, r7, #1
-.LVL1118:
-	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL1119:
 	ldr	r2, .L1001+4
 	uxth	r4, r4
-.LVL1120:
-	.loc 5 268 0
 	cmp	r3, r7
 	bls	.L991
 .L993:
-	.loc 5 274 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
 	bhi	.L992
-	.loc 5 265 0
 	movs	r0, #0
 	b	.L982
-.LVL1121:
 .L985:
-	.loc 5 232 0
 	ldrh	r3, [ip], #2
-.LVL1122:
-	.loc 5 233 0
 	cmp	r3, lr
 	beq	.L984
-	.loc 5 234 0
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL1123:
-	.loc 5 235 0
 	ldr	r0, [sp, #12]
-	.loc 5 234 0
 	mla	r1, r8, r6, r1
 	str	r3, [r1, #4]
-	.loc 5 235 0
 	ldr	r3, [sp, #16]
 	muls	r3, r6, r3
 	bic	r3, r3, #3
 	add	r3, r3, r0
-	.loc 5 236 0
 	ldr	r0, [sp, #20]
-	.loc 5 235 0
 	str	r3, [r1, #8]
-	.loc 5 236 0
 	mul	r3, r10, r6
-	.loc 5 237 0
 	adds	r6, r6, #1
-.LVL1124:
 	uxth	r6, r6
-.LVL1125:
-	.loc 5 236 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
 .L984:
-.LVL1126:
 	adds	r2, r2, #1
-.LVL1127:
 	b	.L983
-.LVL1128:
 .L990:
-	.loc 5 242 0
 	ldr	r3, .L1001+12
 	mul	r10, fp, r8
 	ldr	r2, [r3]
@@ -12126,112 +7559,67 @@ FtlGcScanTempBlk:
 	str	r2, [sp, #16]
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
-.LVL1129:
-	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL1130:
-	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
 	cbnz	r2, .L987
-	.loc 5 247 0
 	ldr	r3, [sp, #12]
-	.loc 5 248 0
 	movw	r2, #65535
 	add	r8, r8, #1
-.LVL1131:
 	ldr	r1, [sp, #4]
-	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL1132:
-	.loc 5 248 0
 	ldrh	ip, [r3]
 	cmp	ip, r2
 	bne	.L988
-	.loc 5 249 0
 	ldr	r3, .L1001+32
-.LVL1133:
 	movs	r2, #1
 	str	r2, [r3]
-.LVL1134:
 .L982:
-	.loc 5 281 0
 	ldr	r3, .L1001
 	movw	r2, #65535
-	.loc 5 283 0
 	strb	r0, [r5, #6]
-	.loc 5 284 0
 	mov	r1, r4
-	.loc 5 282 0
 	strh	r4, [r5, #2]	@ movhi
-	.loc 5 281 0
 	strh	r2, [r3]	@ movhi
-	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r5
-.LVL1135:
 	bl	ftl_sb_update_avl_pages
-.LVL1136:
-	.loc 5 285 0
 	b	.L994
-.LVL1137:
 .L988:
-	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
-.LVL1138:
 	bl	FtlGcUpdatePage
-.LVL1139:
 	b	.L986
-.LVL1140:
 .L987:
-	.loc 5 256 0
 	ldr	r3, .L1001+36
 	movs	r4, #0
-.LVL1141:
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 5 257 0
 	ldrh	r0, [r5]
-.LVL1142:
 	bl	INSERT_FREE_LIST
-.LVL1143:
-	.loc 5 258 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.LVL1144:
-	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1145:
-	.loc 5 261 0
 	b	.L989
-.LVL1146:
 .L991:
-	.loc 5 268 0 discriminator 1
 	ldr	r1, .L1001
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
 	beq	.L993
-	.loc 5 269 0
 	add	r3, r3, r7
 	strh	r3, [r1]	@ movhi
-	.loc 5 270 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
 	bls	.L993
-.LVL1147:
 .L994:
-	.loc 5 286 0
 	mov	r0, #-1
 	add	sp, sp, #24
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1148:
 .L1002:
 	.align	2
 .L1001:
@@ -12245,8 +7633,6 @@ FtlGcScanTempBlk:
 	.word	.LANCHOR24
 	.word	.LANCHOR152
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE313:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
@@ -12257,106 +7643,56 @@ FtlGcScanTempBlk:
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB347:
-	.loc 1 197 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1149:
-	.loc 1 202 0
 	cmp	r0, #11
-	.loc 1 197 0
 	push	{r4, r5, lr}
-	.cfi_def_cfa_offset 12
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #92
-	.cfi_def_cfa_offset 104
-	.loc 1 202 0
 	bls	.L1005
-.LVL1150:
-.LBB278:
-.LBB279:
-	.loc 1 206 0
 	ldr	r5, .L1006
-	.loc 1 207 0
 	add	r0, sp, #24
-.LVL1151:
-	.loc 1 208 0
 	movs	r2, #32
 	movs	r1, #165
-	.loc 1 207 0
 	str	r0, [sp, #16]
-	.loc 1 210 0
 	lsls	r4, r4, #10
-.LVL1152:
-	.loc 1 206 0
 	str	r5, [sp, #12]
-	.loc 1 208 0
 	bl	ftl_memset
-.LVL1153:
-	.loc 1 209 0
 	movs	r2, #8
 	movs	r1, #90
 	mov	r0, r5
 	bl	ftl_memset
-.LVL1154:
-	.loc 1 211 0
 	movs	r2, #1
 	add	r0, sp, #4
 	mov	r1, r2
-	.loc 1 210 0
 	str	r4, [sp, #8]
-	.loc 1 211 0
 	bl	FlashEraseBlocks
-.LVL1155:
-	.loc 1 212 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1156:
-	.loc 1 213 0
 	ldr	r4, [sp, #4]
-	.loc 1 219 0
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
-	.loc 1 213 0
 	adds	r4, r4, #0
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
-.LDL1:
-.LVL1157:
-	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1158:
 .L1003:
-.LBE279:
-.LBE278:
-	.loc 1 221 0
 	mov	r0, r4
 	add	sp, sp, #92
-	.cfi_remember_state
-	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL1159:
 .L1005:
-	.cfi_restore_state
-	.loc 1 203 0
 	movs	r4, #0
 	b	.L1003
 .L1007:
 	.align	2
 .L1006:
 	.word	ftl_temp_buf
-	.cfi_endproc
-.LFE347:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -12367,54 +7703,28 @@ FlashTestBlk:
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB348:
-	.loc 1 224 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1160:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 1 227 0
 	mov	r2, #256
-	.loc 1 224 0
 	mov	r5, r1
-	.loc 1 227 0
 	movs	r1, #255
-.LVL1161:
-	.loc 1 224 0
 	mov	r4, r0
-	.loc 1 227 0
 	bl	ftl_memset
-.LVL1162:
-	.loc 1 228 0
 	ldr	r3, .L1015
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL1163:
 	uxth	r0, r0
-.LVL1164:
-	.loc 1 229 0
 	cmp	r0, #50
 	bls	.L1009
-	.loc 1 230 0
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL1165:
 	bl	ftl_memset
-.LVL1166:
-	.loc 1 231 0
 	movs	r0, #0
-.LVL1167:
 .L1009:
-	.loc 1 233 0
 	ldr	r3, .L1015+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
@@ -12422,15 +7732,11 @@ FlashGetBadBlockList:
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
 .L1011:
-	.loc 1 234 0 discriminator 1
 	cmp	r3, r1
 	bne	.L1012
 .L1014:
-	.loc 1 239 0
 	pop	{r3, r4, r5, pc}
-.LVL1168:
 .L1012:
-	.loc 1 235 0 discriminator 3
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
@@ -12440,8 +7746,6 @@ FlashGetBadBlockList:
 .L1015:
 	.word	.LANCHOR105
 	.word	.LANCHOR0
-	.cfi_endproc
-.LFE348:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -12452,18 +7756,10 @@ FlashGetBadBlockList:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB350:
-	.loc 1 247 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1169:
-	.loc 1 248 0
 	b	memcpy
-.LVL1170:
-	.cfi_endproc
-.LFE350:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -12474,250 +7770,144 @@ ftl_memcpy:
 	.fpu softvfp
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
-.LFB229:
-	.loc 4 80 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1171:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 91 0
 	movs	r4, #0
-	.loc 4 88 0
 	ldr	r7, .L1027
-	.loc 4 89 0
 	movs	r1, #0
-	.loc 4 87 0
 	ldr	r5, .L1027+4
-	.loc 4 88 0
 	ldr	r3, [r7]
 	mov	fp, r7
-	.loc 4 87 0
 	ldr	r8, .L1027+48
 	ldr	r6, .L1027+8
-	.loc 4 88 0
 	str	r3, [r5, #12]
-	.loc 4 91 0
 	ldr	r7, .L1027+12
-	.loc 4 89 0
 	ldr	r3, .L1027+16
-	.loc 4 92 0
 	ldr	r10, .L1027+52
-	.loc 4 87 0
 	ldr	r0, [r8]
-	.loc 4 89 0
 	ldrh	r2, [r3]
-	.loc 4 87 0
 	str	r0, [r5, #8]
-	.loc 4 89 0
 	bl	ftl_memset
-.LVL1172:
 .L1019:
-	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r4, r3
 	blt	.L1020
-	.loc 4 94 0
 	ldr	r6, [r5, #12]
-.LVL1173:
-	.loc 4 95 0
 	movs	r2, #16
-	.loc 4 98 0
 	ldr	r4, .L1027+20
-.LVL1174:
-	.loc 4 95 0
 	movs	r1, #255
-	.loc 4 84 0
 	movs	r7, #0
-	.loc 4 95 0
 	mov	r0, r6
 	bl	ftl_memset
-.LVL1175:
-	.loc 4 97 0
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
-	.loc 4 98 0
 	ldr	r3, [r4, #8]
-	.loc 4 82 0
 	str	r7, [sp, #12]
-	.loc 4 98 0
 	str	r3, [r6, #4]
-	.loc 4 99 0
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
-	.loc 4 100 0
 	ldrh	r3, [r4, #4]
 	strh	r3, [r6, #8]	@ movhi
-	.loc 4 101 0
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
-	.loc 4 102 0
 	ldr	r3, .L1027+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.LVL1176:
 .L1021:
-	.loc 4 104 0
 	ldr	r3, [r8]
-	.loc 4 107 0
 	ldrh	r1, [r4]
 	ldrh	r2, [r4, #2]
-	.loc 4 104 0
 	str	r3, [r5, #8]
-	.loc 4 105 0
 	ldr	r3, [fp]
-	.loc 4 108 0
 	ldrh	r0, [r6, #10]
-	.loc 4 105 0
 	str	r3, [r5, #12]
-	.loc 4 106 0
 	movs	r3, #0
 	str	r3, [r5]
-	.loc 4 107 0
 	orr	r3, r2, r1, lsl #10
 	str	r3, [r5, #4]
-	.loc 4 108 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
 	ldr	r0, .L1027+28
 	bl	printf
-.LVL1177:
-	.loc 4 109 0
 	movs	r3, #1
 	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1178:
-	.loc 4 110 0
 	ldr	r3, .L1027+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	blt	.L1022
-	.loc 4 113 0
 	ldr	r3, [r4, #8]
-	.loc 4 117 0
 	mov	r1, #0	@ movhi
-	.loc 4 115 0
 	ldrh	r2, [r4]
-	.loc 4 117 0
 	strh	r1, [r4, #2]	@ movhi
-	.loc 4 113 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
-	.loc 4 114 0
 	str	r3, [r6, #4]
-	.loc 4 115 0
 	strh	r2, [r6, #8]	@ movhi
-	.loc 4 116 0
 	ldrh	r3, [r4, #4]
-	.loc 4 118 0
 	strh	r2, [r4, #4]	@ movhi
-	.loc 4 121 0
 	ldr	r2, .L1027+36
-	.loc 4 116 0
 	strh	r3, [r4]	@ movhi
-	.loc 4 119 0
 	lsls	r3, r3, #10
-	.loc 4 121 0
 	ldr	r0, [r2]
-	.loc 4 122 0
 	movs	r2, #1
-	.loc 4 119 0
 	str	r3, [r5, #4]
-	.loc 4 122 0
 	mov	r1, r2
-	.loc 4 121 0
 	str	r3, [r0, #4]
-	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL1179:
-	.loc 4 123 0
 	movs	r3, #1
 	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1180:
 .L1022:
-	.loc 4 126 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
-	.loc 4 127 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L1023
-	.loc 4 130 0
 	adds	r7, r7, #1
-.LVL1181:
-	.loc 4 129 0
 	ldr	r1, [r5, #4]
-	.loc 4 130 0
 	uxth	r7, r7
-	.loc 4 129 0
 	ldr	r0, .L1027+40
 	bl	printf
-.LVL1182:
-	.loc 4 131 0
 	cmp	r7, #3
 	bls	.L1021
-	.loc 4 132 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
 	ldr	r0, .L1027+44
 	bl	printf
-.LVL1183:
 .L1025:
 	b	.L1025
-.LVL1184:
 .L1020:
-	.loc 4 92 0 discriminator 3
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r2, r4
 	lsls	r2, r2, #2
-	.loc 4 91 0 discriminator 3
 	adds	r4, r4, #1
-.LVL1185:
-	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL1186:
 	b	.L1019
-.LVL1187:
 .L1026:
 	movs	r3, #1
-.LVL1188:
 	str	r3, [sp, #12]
-.LVL1189:
 	b	.L1021
-.LVL1190:
 .L1023:
-	.loc 4 139 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
 	beq	.L1026
-	.loc 4 146 0
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1191:
 .L1028:
 	.align	2
 .L1027:
@@ -12735,8 +7925,6 @@ FtlBbmTblFlush:
 	.word	.LC99
 	.word	.LANCHOR107
 	.word	.LANCHOR137
-	.cfi_endproc
-.LFE229:
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
@@ -12747,28 +7935,12 @@ FtlBbmTblFlush:
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-.LFB301:
-	.loc 2 2582 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1192:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 2582 0
 	mov	r4, r0
 	ldr	r8, .L1067
-.LVL1193:
 .L1030:
-	.loc 2 2588 0
 	ldr	r3, .L1067
 	ldr	r6, .L1067+4
 	ldr	fp, .L1067+76
@@ -12778,18 +7950,14 @@ allocate_data_superblock:
 	ldrh	r2, [fp]
 	cmp	r3, r2
 	ble	.L1031
-	.loc 2 2588 0 is_stmt 0 discriminator 1
 	movw	r2, #2588
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1194:
 .L1031:
-	.loc 2 2590 0 is_stmt 1
 	ldr	r3, .L1067+16
 	cmp	r4, r3
 	bne	.L1056
-	.loc 2 2591 0
 	ldr	r2, .L1067+20
 	ldrh	r3, [r8]
 	ldr	r2, [r2]
@@ -12798,139 +7966,94 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL1195:
-	.loc 2 2595 0
 	cbz	r1, .L1032
-	.loc 2 2596 0
 	subs	r1, r1, #1
-.LVL1196:
 	uxth	r1, r1
-.LVL1197:
 .L1032:
-	.loc 2 2597 0
 	ldr	r0, .L1067+24
 	bl	List_pop_index_node
-.LVL1198:
 	ldrh	r3, [r8]
 	mov	r5, r0
 	uxth	r7, r0
-.LVL1199:
 	cbnz	r3, .L1033
-	.loc 2 2597 0 is_stmt 0 discriminator 1
 	movw	r2, #2597
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1200:
 .L1033:
-	.loc 2 2597 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 2601 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 2597 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 2600 0 discriminator 3
 	strh	r7, [r4]	@ movhi
-	.loc 2 2601 0 discriminator 3
 	bl	make_superblock
-.LVL1201:
-	.loc 2 2602 0 discriminator 3
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1034
-	.loc 2 2606 0
 	ldr	r3, .L1067+28
 	uxth	r5, r5
 	movw	r2, #65535
-	.loc 2 2607 0
 	mov	r0, r7
-	.loc 2 2606 0
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2607 0
 	bl	INSERT_DATA_LIST
-.LVL1202:
-	.loc 2 2608 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
 	ble	.L1030
-	.loc 2 2608 0 is_stmt 0 discriminator 1
 	mov	r2, #2608
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1203:
 	b	.L1030
-.LVL1204:
 .L1056:
 	movs	r1, #0
 	b	.L1032
-.LVL1205:
 .L1034:
-	.loc 2 2611 0 is_stmt 1
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
 	ble	.L1036
-	.loc 2 2611 0 is_stmt 0 discriminator 1
 	movw	r2, #2611
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1206:
 .L1036:
-	.loc 2 2615 0 is_stmt 1 discriminator 1
 	ldr	r3, .L1067+32
 	movs	r6, #0
-	.loc 2 2614 0 discriminator 1
 	ldr	r2, .L1067+36
 	add	ip, r4, #16
-	.loc 2 2615 0 discriminator 1
 	mov	lr, r6
-	.loc 2 2617 0 discriminator 1
 	movw	r10, #65535
-	.loc 2 2615 0 discriminator 1
 	ldr	r0, [r3]
 	ldrh	r1, [r2]
 	movs	r2, #20
-	.loc 2 2618 0 discriminator 1
 	str	r2, [sp, #4]
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
 .L1037:
-.LVL1207:
-	.loc 2 2614 0 discriminator 1
 	ldr	r2, [sp]
 	cmp	r2, r3
 	bne	.L1039
-	.loc 2 2622 0
 	cbnz	r6, .L1040
-	.loc 2 2622 0 is_stmt 0 discriminator 1
 	movw	r2, #2622
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1208:
 .L1040:
-	.loc 2 2624 0 is_stmt 1
 	ldr	r3, .L1067+40
 	ldrh	r3, [r3]
 	cmp	r3, r7
 	bne	.L1041
-	.loc 2 2624 0 is_stmt 0 discriminator 1
 	mov	r2, #2624
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1209:
 .L1041:
-	.loc 2 2625 0 is_stmt 1
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	uxth	r5, r5
 	ldr	r2, .L1067+44
@@ -12938,34 +8061,26 @@ allocate_data_superblock:
 	ldr	r10, .L1067+80
 	cmp	r1, #0
 	bne	.L1042
-	.loc 2 2626 0
 	ldr	r0, [r2]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
 	beq	.L1043
-	.loc 2 2627 0
 	ldr	r1, .L1067+52
 	ldrh	ip, [r1]
 	add	r1, lr, ip
 .L1066:
-	.loc 2 2629 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-	.loc 2 2631 0
 	mov	r0, r7
-	.loc 2 2630 0
 	ldr	r1, [r3]
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	adds	r1, r1, #1
 	str	r1, [r3]
-	.loc 2 2631 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
-.LVL1210:
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 .L1045:
-	.loc 2 2638 0
 	ldr	r2, [r2]
 	lsls	r1, r5, #1
 	str	r1, [sp]
@@ -12973,154 +8088,96 @@ allocate_data_superblock:
 	ldr	r2, .L1067+56
 	ldr	r1, [r2]
 	cmp	r0, r1
-	.loc 2 2641 0
 	ldrh	r1, [fp]
-	.loc 2 2639 0
 	it	hi
 	strhi	r0, [r2]
-	.loc 2 2641 0
 	ldr	r2, .L1067+52
 	ldr	r0, [r3]
 	ldr	r3, [r10]
 	ldrh	r2, [r2]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1211:
 	ldr	r3, .L1067+60
-	.loc 2 2645 0
 	ldr	ip, .L1067+84
-	.loc 2 2641 0
 	str	r0, [r3]
-	.loc 2 2642 0
 	ldr	r3, .L1067+64
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-.LVL1212:
 	movs	r2, #20
-	.loc 2 2645 0
 	ldr	r3, .L1067+32
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.LVL1213:
 .L1047:
 	adds	r3, r3, #20
-	.loc 2 2644 0 discriminator 1
 	cmp	r2, r3
 	bne	.L1048
-	.loc 2 2646 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
-	.loc 2 2648 0
 	mov	r10, #0
-	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1214:
-	.loc 2 2647 0
 	mov	r3, r10
-	.loc 2 2649 0
 	movs	r1, #20
-.LVL1215:
 .L1049:
-	.loc 2 2648 0 discriminator 1
 	uxth	r2, r10
 	cmp	r6, r2
 	bhi	.L1051
-	.loc 2 2659 0
 	cbz	r3, .L1052
-	.loc 2 2660 0
 	mov	r0, r7
 	bl	update_multiplier_value
-.LVL1216:
-	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1217:
 .L1052:
-	.loc 2 2664 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	ldr	r1, .L1067+28
 	cmp	r2, #0
 	bne	.L1053
-	.loc 2 2666 0
 	ldr	r3, [r1]
 	movw	r2, #65535
-	.loc 2 2667 0
 	mov	r0, r7
-	.loc 2 2666 0
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2667 0
 	bl	INSERT_DATA_LIST
-.LVL1218:
-	.loc 2 2668 0
 	b	.L1030
-.LVL1219:
 .L1039:
-	.loc 2 2617 0
 	ldrh	r1, [ip], #2
-	.loc 2 2615 0
 	str	lr, [r3, #8]
-	.loc 2 2616 0
 	str	lr, [r3, #12]
-	.loc 2 2617 0
 	cmp	r1, r10
 	beq	.L1038
-	.loc 2 2618 0
 	ldr	r2, [sp, #4]
 	lsls	r1, r1, #10
 	mla	r2, r2, r6, r0
-	.loc 2 2619 0
 	adds	r6, r6, #1
-.LVL1220:
 	uxth	r6, r6
-.LVL1221:
-	.loc 2 2618 0
 	str	r1, [r2, #4]
 .L1038:
 	adds	r3, r3, #20
 	b	.L1037
 .L1043:
-	.loc 2 2629 0
 	movs	r1, #2
 	b	.L1066
 .L1042:
-	.loc 2 2633 0
 	ldr	r0, [r2]
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB280:
-.LBB281:
 	mov	r0, r7
-.LBE281:
-.LBE280:
-	.loc 2 2634 0
 	ldr	r1, [r10]
 	adds	r1, r1, #1
 	str	r1, [r10]
-.LVL1222:
-.LBB283:
-.LBB282:
 	bl	ftl_set_blk_mode.part.6
-.LVL1223:
 	ldm	sp, {r2, r3}
 	b	.L1045
-.LVL1224:
 .L1048:
-.LBE282:
-.LBE283:
-	.loc 2 2645 0 discriminator 3
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
 	b	.L1047
-.LVL1225:
 .L1051:
-	.loc 2 2649 0
 	ldr	r0, .L1067+32
 	mul	r2, r1, r10
 	ldr	r0, [r0]
@@ -13128,89 +8185,56 @@ allocate_data_superblock:
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
 	bne	.L1050
-	.loc 2 2651 0
 	ldr	r0, [ip, #4]
-	.loc 2 2650 0
 	adds	r3, r3, #1
-.LVL1226:
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
-	.loc 2 2652 0
 	ubfx	r0, r0, #10, #16
-	.loc 2 2650 0
 	str	r3, [sp, #4]
-.LVL1227:
-	.loc 2 2652 0
 	bl	FtlBbmMapBadBlock
-.LVL1228:
-	.loc 2 2653 0
 	ldr	r2, [sp, #8]
 	add	r0, r4, r10, lsl #1
-	.loc 2 2654 0
 	ldr	r1, [sp, #12]
 	ldr	r3, [sp, #4]
-	.loc 2 2653 0
 	strh	r2, [r0, #16]	@ movhi
-	.loc 2 2654 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.LVL1229:
 .L1050:
 	add	r10, r10, #1
-.LVL1230:
 	b	.L1049
-.LVL1231:
 .L1053:
-	.loc 2 2671 0
 	ldr	r3, .L1067+68
-	.loc 2 2675 0
 	ldr	r0, .L1067+72
-	.loc 2 2671 0
 	ldrh	r3, [r3]
-	.loc 2 2672 0
 	strh	r7, [r4]	@ movhi
-	.loc 2 2671 0
 	smulbb	r3, r3, r2
-	.loc 2 2673 0
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 2674 0
 	strb	r2, [r4, #6]
-	.loc 2 2675 0
 	ldr	r2, [r0]
-	.loc 2 2671 0
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2675 0
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r0]
-	.loc 2 2676 0
 	ldr	r2, [r1]
 	ldr	r1, [sp]
 	strh	r3, [r2, r1]	@ movhi
-	.loc 2 2677 0
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1054
-	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1055
 .L1054:
-	.loc 2 2677 0 discriminator 3
 	movw	r2, #2677
 	ldr	r1, .L1067+8
 	ldr	r0, .L1067+12
 	bl	printf
-.LVL1232:
 .L1055:
-	.loc 2 2679 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1233:
 .L1068:
 	.align	2
 .L1067:
@@ -13236,8 +8260,6 @@ allocate_data_superblock:
 	.word	.LANCHOR5
 	.word	.LANCHOR73
 	.word	-1024
-	.cfi_endproc
-.LFE301:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -13248,135 +8270,72 @@ allocate_data_superblock:
 	.fpu softvfp
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
-.LFB320:
-	.loc 5 390 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1234:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 390 0
 	mov	r10, r0
-	.loc 5 395 0
 	ldr	r4, .L1081
 	ldrh	r3, [r4]
 	cbz	r3, .L1070
-.LBB286:
-.LBB287:
-	.loc 5 399 0
 	ldr	r8, .L1081+16
-.LBE287:
-.LBE286:
 	movs	r6, #0
-.LVL1235:
 .L1071:
-.LBB290:
-.LBB288:
-	.loc 5 396 0
 	ldr	r3, .L1081+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
 	bhi	.L1077
-	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1236:
 .L1070:
-.LBE288:
-.LBE290:
-	.loc 5 415 0
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1237:
 .L1077:
-	.cfi_restore_state
-.LBB291:
-.LBB289:
-	.loc 5 397 0
 	ldr	r2, .L1081+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1238:
-	.loc 5 401 0
 	ldr	r2, .L1081+12
-	.loc 5 397 0
 	mov	fp, r0
-.LVL1239:
 .L1072:
-	.loc 5 398 0
 	ldrh	r3, [r4]
 	uxth	r5, r7
-.LVL1240:
 	cmp	r3, r5
 	bhi	.L1076
-.LVL1241:
 	adds	r6, r6, #1
-.LVL1242:
 	b	.L1071
-.LVL1243:
 .L1076:
-	.loc 5 399 0
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
 	bne	.L1073
-	.loc 5 401 0
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	bl	printf
-.LVL1244:
-	.loc 5 403 0
 	mov	r0, fp
 	bl	FtlBbmMapBadBlock
-.LVL1245:
-	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1246:
 	ldr	r3, [sp, #4]
-	.loc 5 405 0
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.LVL1247:
 .L1074:
 	cmp	r5, r1
 	bcc	.L1075
-	.loc 5 407 0
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.LVL1248:
 .L1073:
 	adds	r7, r7, #1
-.LVL1249:
 	b	.L1072
-.LVL1250:
 .L1075:
-	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
-	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL1251:
 	uxth	r5, r5
-.LVL1252:
-	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
 	b	.L1074
 .L1082:
@@ -13387,10 +8346,6 @@ FtlGcFreeBadSuperBlk:
 	.word	.LANCHOR13
 	.word	.LC100
 	.word	.LANCHOR102
-.LBE289:
-.LBE291:
-	.cfi_endproc
-.LFE320:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -13401,67 +8356,40 @@ FtlGcFreeBadSuperBlk:
 	.fpu softvfp
 	.type	update_vpc_list, %function
 update_vpc_list:
-.LFB304:
-	.loc 2 2738 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1253:
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2738 0
 	mov	r4, r0
-	.loc 2 2739 0
 	ldr	r3, .L1093
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
 	bne	.L1084
-	.loc 2 2740 0
 	ldr	r2, .L1093+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
 	bne	.L1085
-	.loc 2 2742 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
 .L1086:
-.LVL1254:
-.LBB294:
-.LBB295:
-	.loc 2 2747 0
 	ldr	r5, .L1093+8
 	mov	r1, r4
 	ldr	r0, .L1093+12
-.LVL1255:
 	bl	List_remove_node
-.LVL1256:
 	ldrh	r3, [r5]
 	cbnz	r3, .L1088
 	movw	r2, #2747
 	ldr	r1, .L1093+16
 	ldr	r0, .L1093+20
 	bl	printf
-.LVL1257:
 .L1088:
 	ldrh	r3, [r5]
-	.loc 2 2748 0
 	mov	r0, r4
-	.loc 2 2747 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 2748 0
 	bl	free_data_superblock
-.LVL1258:
-	.loc 2 2749 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL1259:
-	.loc 2 2750 0
 	ldr	r3, .L1093+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
@@ -13474,40 +8402,27 @@ update_vpc_list:
 	ldr	r1, .L1093+16
 	ldr	r0, .L1093+20
 	bl	printf
-.LVL1260:
 .L1092:
 	movs	r3, #1
 	b	.L1083
-.LVL1261:
 .L1085:
-.LBE295:
-.LBE294:
-	.loc 2 2743 0
 	ldr	r2, .L1093+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1083
-	.loc 2 2743 0 is_stmt 0 discriminator 1
 	ldr	r2, .L1093+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1083
-	.loc 2 2743 0 discriminator 2
 	ldr	r2, .L1093+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	bne	.L1086
-.LVL1262:
 .L1083:
-	.loc 2 2756 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL1263:
 .L1084:
-	.loc 2 2753 0
 	bl	List_update_data_list
-.LVL1264:
-	.loc 2 2755 0
 	movs	r3, #0
 	b	.L1083
 .L1094:
@@ -13524,8 +8439,6 @@ update_vpc_list:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.cfi_endproc
-.LFE304:
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -13536,98 +8449,56 @@ update_vpc_list:
 	.fpu softvfp
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
-.LFB305:
-	.loc 2 2759 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1265:
-	.loc 2 2762 0
 	movw	r3, #65535
-	.loc 2 2759 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2762 0
 	cmp	r0, r3
-	.loc 2 2759 0
 	mov	r4, r0
-	.loc 2 2762 0
 	beq	.L1096
-	.loc 2 2763 0
 	ldr	r5, .L1104
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cbnz	r2, .L1097
-	.loc 2 2764 0
 	mov	r1, r0
 	ldr	r0, .L1104+4
-.LVL1266:
 	bl	printf
-.LVL1267:
-	.loc 2 2765 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
 	cbz	r5, .L1098
 .L1102:
-	.loc 2 2774 0
 	movs	r5, #0
-.LVL1268:
 .L1095:
-	.loc 2 2784 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.LVL1269:
 .L1098:
-	.loc 2 2765 0 discriminator 1
 	movw	r2, #2765
-.LVL1270:
 .L1103:
-	.loc 2 2781 0 discriminator 2
 	ldr	r1, .L1104+8
 	ldr	r0, .L1104+12
 	bl	printf
-.LVL1271:
 	b	.L1095
-.LVL1272:
 .L1097:
-	.loc 2 2768 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
 .L1096:
-	.loc 2 2772 0
 	ldr	r6, .L1104+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
-.LVL1273:
 	cmp	r0, r3
 	bne	.L1100
-	.loc 2 2773 0
 	strh	r4, [r6]	@ movhi
 	b	.L1102
 .L1100:
-	.loc 2 2775 0
 	cmp	r4, r0
 	beq	.L1102
-	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1274:
-	.loc 2 2781 0
 	ldr	r3, .L1104+20
-	.loc 2 2778 0
 	adds	r5, r0, #0
-	.loc 2 2781 0
 	ldr	r2, .L1104+24
-	.loc 2 2778 0
 	it	ne
 	movne	r5, #1
-.LVL1275:
-	.loc 2 2780 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 2781 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	subs	r3, r3, r2
@@ -13640,10 +8511,8 @@ decrement_vpc_count:
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
 	bne	.L1095
-	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
 	beq	.L1095
-	.loc 2 2781 0 discriminator 2
 	movw	r2, #2781
 	b	.L1103
 .L1105:
@@ -13657,8 +8526,6 @@ decrement_vpc_count:
 	.word	.LANCHOR41
 	.word	.LANCHOR40
 	.word	-1431655765
-	.cfi_endproc
-.LFE305:
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlWriteDump_data,"ax",%progbits
 	.align	1
@@ -13669,188 +8536,103 @@ decrement_vpc_count:
 	.fpu softvfp
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
-.LFB271:
-	.loc 2 996 0 is_stmt 1
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 56
-	.loc 2 997 0
 	ldr	r4, .L1125
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
 	beq	.L1107
-	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1107
-	.loc 2 998 0 is_stmt 1
 	ldr	r3, .L1125+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
 	beq	.L1107
-.LVL1276:
-.LBB299:
-.LBB300:
-	.loc 2 1005 0
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
 	cbnz	r7, .L1106
-	.loc 2 1000 0
 	ldr	r3, .L1125+8
-	.loc 2 1007 0
 	mov	r2, r7
 	mov	r1, sp
-	.loc 2 1000 0
 	ldr	r6, [r3]
-	.loc 2 1002 0
 	ldr	r3, .L1125+12
-	.loc 2 1000 0
 	subs	r6, r6, #1
-	.loc 2 1007 0
 	mov	r0, r6
-	.loc 2 1002 0
 	ldrh	r8, [r3]
-	.loc 2 1007 0
 	bl	log2phys
-.LVL1277:
-	.loc 2 1012 0
 	ldr	r2, .L1125+16
-	.loc 2 1010 0
 	ldr	r3, [sp]
-	.loc 2 1011 0
 	str	r6, [sp, #20]
-	.loc 2 1012 0
 	ldr	r0, [r2]
-	.loc 2 1013 0
 	ldr	r2, .L1125+20
-	.loc 2 1010 0
 	str	r3, [sp, #8]
-	.loc 2 1016 0
 	adds	r3, r3, #1
-	.loc 2 1012 0
 	str	r0, [sp, #12]
-	.loc 2 1013 0
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
-.LVL1278:
-	.loc 2 1015 0
 	str	r7, [r5, #4]
-	.loc 2 1016 0
 	beq	.L1109
-	.loc 2 1018 0
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL1279:
 .L1110:
-	.loc 2 1035 0
 	ldr	fp, .L1125
-	.loc 2 1002 0
 	lsl	r8, r8, #2
-.LVL1280:
-	.loc 2 1036 0
 	ldr	r10, .L1125+28
-	.loc 2 1024 0
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
 .L1111:
-	.loc 2 1025 0
 	cmp	r8, r7
 	bne	.L1115
 .L1112:
-	.loc 2 1041 0
 	movs	r3, #1
-.LVL1281:
 .L1124:
-.LBE300:
-.LBE299:
-	.loc 2 1047 0
 	strb	r3, [r4, #10]
 .L1106:
-	.loc 2 1049 0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1282:
 .L1109:
-	.cfi_restore_state
-.LBB302:
-.LBB301:
-	.loc 2 1022 0
 	ldr	r3, .L1125+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL1283:
 	b	.L1110
-.LVL1284:
 .L1115:
-	.loc 2 1027 0
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
 	beq	.L1112
-	.loc 2 1032 0
 	ldr	r3, [sp, #8]
-	.loc 2 1035 0
 	mov	r0, fp
-	.loc 2 1031 0
 	str	r6, [r5, #8]
 	adds	r7, r7, #1
-	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 1033 0
 	ldrh	r3, [r4]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL1285:
-	.loc 2 1036 0
 	ldr	r3, [r10]
-	.loc 2 1037 0
 	movs	r1, #1
-	.loc 2 1035 0
 	str	r0, [sp, #8]
-	.loc 2 1037 0
 	add	r0, sp, #4
-	.loc 2 1036 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, #0
 	str	r3, [r10]
-	.loc 2 1037 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1286:
-	.loc 2 1039 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1287:
 	b	.L1111
-.LVL1288:
 .L1107:
-.LBE301:
-.LBE302:
-	.loc 2 1047 0
 	movs	r3, #0
 	b	.L1124
 .L1126:
@@ -13864,8 +8646,6 @@ FtlWriteDump_data:
 	.word	.LANCHOR108
 	.word	.LANCHOR23
 	.word	.LANCHOR71
-	.cfi_endproc
-.LFE271:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
@@ -13876,39 +8656,21 @@ FtlWriteDump_data:
 	.fpu softvfp
 	.type	l2p_flush, %function
 l2p_flush:
-.LFB264:
-	.loc 2 789 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 795 0
 	movs	r4, #0
 	ldr	r5, .L1131
-	.loc 2 796 0
 	ldr	r6, .L1131+4
-	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1289:
 .L1128:
-	.loc 2 795 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1290:
 	cmp	r3, r0
 	bhi	.L1130
-	.loc 2 799 0
 	movs	r0, #0
-.LVL1291:
 	pop	{r4, r5, r6, pc}
-.LVL1292:
 .L1130:
-	.loc 2 796 0
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
@@ -13916,20 +8678,15 @@ l2p_flush:
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
 	bge	.L1129
-	.loc 2 797 0
 	bl	flush_l2p_region
-.LVL1293:
 .L1129:
 	adds	r4, r4, #1
-.LVL1294:
 	b	.L1128
 .L1132:
 	.align	2
 .L1131:
 	.word	.LANCHOR33
 	.word	.LANCHOR55
-	.cfi_endproc
-.LFE264:
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
@@ -13940,109 +8697,58 @@ l2p_flush:
 	.fpu softvfp
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-.LFB284:
-	.loc 2 1705 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1295:
-	.loc 2 1719 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
-	.loc 2 1705 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r8, r0
 	sub	sp, sp, #48
-	.cfi_def_cfa_offset 80
-	.loc 2 1719 0
 	cmp	r3, r2
 	beq	.L1262
-	.loc 2 1724 0
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
-.LVL1296:
-	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	.loc 2 1730 0
 	ldr	r1, [sp, #4]
-	.loc 2 1725 0
 	str	r3, [sp, #20]
-.LVL1297:
-	.loc 2 1730 0
 	ldr	r3, .L1270
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
 	bne	.L1136
-	.loc 2 1731 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL1298:
 .L1268:
-	.loc 2 2038 0
 	strb	r3, [r8, #6]
-.LVL1299:
 .L1262:
-	.loc 2 2059 0
 	movs	r0, #0
 	add	sp, sp, #48
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1300:
 .L1136:
-	.cfi_restore_state
-	.loc 2 1738 0
 	ldrh	r0, [r0, #16]
-.LVL1301:
 .L1137:
-	.loc 2 1739 0
 	cmp	r0, r2
 	uxth	r5, r3
-.LVL1302:
 	add	r3, r3, #1
 	beq	.L1138
-	.loc 2 1746 0
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
-.LVL1303:
 	mov	r4, r0
-.LVL1304:
-	.loc 2 1754 0
 	adds	r0, r0, #1
-.LVL1305:
 	beq	.L1139
-	.loc 2 1766 0
 	ldr	r3, .L1270+4
-	.loc 2 1771 0
 	movs	r2, #0
 	mov	r5, r2
-.LVL1306:
-	.loc 2 1768 0
 	movw	fp, #65535
-	.loc 2 1769 0
 	mov	r10, #20
-	.loc 2 1766 0
 	ldrh	ip, [r3]
-	.loc 2 1769 0
 	ldr	r3, .L1270+8
 	ldr	r0, [r3]
-	.loc 2 1770 0
 	ldr	r3, .L1270+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	ldr	r3, .L1270+16
 	ldrh	r7, [r3]
-	.loc 2 1771 0
 	ldr	r3, .L1270+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
@@ -14052,353 +8758,214 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #16]
 	str	r3, [sp]
 .L1140:
-.LVL1307:
-	.loc 2 1766 0 discriminator 1
 	uxth	r3, r2
 	cmp	ip, r3
 	bhi	.L1144
-	.loc 2 1776 0
 	movs	r2, #0
-.LVL1308:
 	mov	r1, r5
 	bl	FlashReadPages
-.LVL1309:
-	.loc 2 1777 0
 	ldr	r2, .L1270+28
-	.loc 2 1791 0
 	uxth	r1, r4
-	.loc 2 1715 0
 	movw	fp, #65535
-	.loc 2 1791 0
 	str	r1, [sp, #12]
-	.loc 2 1777 0
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-.LVL1310:
-	.loc 2 1779 0
 	ldr	r3, .L1270+8
-.LVL1311:
 	ldr	r10, [r3]
-	.loc 2 1778 0
 	movs	r3, #0
 	mov	r7, r10
-.LVL1312:
 .L1145:
 	uxth	r1, r3
-.LVL1313:
-	.loc 2 1778 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
 	bhi	.L1150
-	.loc 2 1794 0 is_stmt 1
 	bne	.L1148
-	.loc 2 1796 0
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.LVL1314:
 .L1263:
-	.loc 2 1802 0
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL1315:
-	.loc 2 1807 0
 	ldr	r3, .L1270
-	.loc 2 1802 0
 	mov	r10, r0
-.LVL1316:
-	.loc 2 1807 0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
 	bne	.L1152
-	.loc 2 1808 0
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
-	.loc 2 1809 0
 	movs	r3, #0
 	strb	r3, [r8, #6]
-	.loc 2 1810 0
 	strh	r3, [r8, #4]	@ movhi
 .L1152:
-	.loc 2 1813 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
 	bne	.L1153
-	.loc 2 1813 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
 	bne	.L1153
-	.loc 2 1814 0 is_stmt 1
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.LVL1317:
 .L1269:
-	.loc 2 2053 0
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-.LVL1318:
 	b	.L1262
-.LVL1319:
 .L1138:
-	.loc 2 1741 0
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-.LVL1320:
 	b	.L1137
-.LVL1321:
 .L1139:
-	.loc 2 1755 0
 	ldr	r3, [sp, #4]
 	cbz	r3, .L1141
-	.loc 2 1755 0 is_stmt 0 discriminator 1
 	movw	r2, #1755
 	ldr	r1, .L1270+32
 	ldr	r0, .L1270+36
 	bl	printf
-.LVL1322:
 .L1141:
-	.loc 2 1756 0 is_stmt 1
 	ldr	r3, [sp, #20]
 	cbz	r3, .L1142
-	.loc 2 1756 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
 	beq	.L1142
-	.loc 2 1756 0 discriminator 2
 	movw	r2, #1756
 	ldr	r1, .L1270+32
 	ldr	r0, .L1270+36
 	bl	printf
-.LVL1323:
 .L1142:
-	.loc 2 1757 0 is_stmt 1
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
 	b	.L1268
-.LVL1324:
 .L1144:
-	.loc 2 1767 0
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
-	.loc 2 1768 0
 	cmp	r3, fp
-	.loc 2 1767 0
 	str	r1, [sp]
-.LVL1325:
-	.loc 2 1768 0
 	beq	.L1143
-	.loc 2 1769 0
 	mla	r1, r10, r5, r0
-	.loc 2 1770 0
 	ldr	r6, [sp, #8]
-	.loc 2 1769 0
 	orr	r3, r4, r3, lsl #10
-.LVL1326:
 	str	r3, [r1, #4]
-	.loc 2 1770 0
 	mul	r3, r7, r5
 	bic	r3, r3, #3
 	add	r3, r3, r6
-	.loc 2 1771 0
 	ldr	r6, [sp, #12]
-	.loc 2 1770 0
 	str	r3, [r1, #8]
-	.loc 2 1771 0
 	mul	r3, lr, r5
-	.loc 2 1772 0
 	adds	r5, r5, #1
-.LVL1327:
 	uxth	r5, r5
-.LVL1328:
-	.loc 2 1771 0
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
 .L1143:
-.LVL1329:
 	adds	r2, r2, #1
-.LVL1330:
 	b	.L1140
-.LVL1331:
 .L1150:
-	.loc 2 1779 0
 	ldr	r1, [r7]
-.LVL1332:
 	cbnz	r1, .L1146
-	.loc 2 1780 0
 	ldr	r1, [r7, #12]
-	.loc 2 1781 0
 	ldr	r6, [r1, #4]
-	.loc 2 1780 0
 	str	r1, [sp, #8]
-.LVL1333:
-	.loc 2 1781 0
 	adds	r1, r6, #1
-.LVL1334:
 	beq	.L1147
-	.loc 2 1782 0
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-.LVL1335:
 	cbz	r0, .L1147
-	.loc 2 1784 0
 	adds	r6, r6, #1
 	str	r6, [r2]
 .L1147:
-	.loc 2 1787 0
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
 	bne	.L1149
-.LVL1336:
 .L1148:
-	.loc 2 1801 0
 	uxth	r2, r4
-	.loc 2 1802 0
 	uxth	r3, r3
-	.loc 2 1801 0
 	str	r2, [sp, #8]
-.LVL1337:
-	.loc 2 1802 0
 	movs	r2, #20
 	mla	r10, r2, r3, r10
 	b	.L1263
-.LVL1338:
 .L1146:
-	.loc 2 1791 0
 	ldr	fp, [sp, #12]
-.LVL1339:
 .L1149:
 	adds	r3, r3, #1
-.LVL1340:
 	adds	r7, r7, #20
 	b	.L1145
-.LVL1341:
 .L1153:
-	.loc 2 1819 0
 	movw	r3, #65535
 	cmp	fp, r3
 	bne	.L1154
-	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1155
 .L1154:
-.LVL1342:
-.LBB303:
-	.loc 2 1824 0 is_stmt 1
 	ldr	r3, .L1270+40
-	.loc 2 1823 0
 	uxth	r6, r4
-.LVL1343:
-	.loc 2 1827 0
 	uxth	r4, r4
-.LVL1344:
-	.loc 2 1834 0
 	ldr	r7, .L1270+8
-	.loc 2 1824 0
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	.loc 2 1825 0
 	itt	eq
 	ldreq	r2, [sp]
 	streq	r2, [r3]
-.LVL1345:
-	.loc 2 1827 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #7
 	cmp	r4, r3
-	.loc 2 1828 0
 	itet	gt
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.LVL1346:
 .L1158:
-	.loc 2 1829 0 discriminator 1
 	cmp	r4, r6
 	bhi	.L1168
-	.loc 2 1831 0
 	ldr	r3, .L1270+4
-	.loc 2 1833 0
 	movw	lr, #65535
-	.loc 2 1834 0
 	ldr	r0, [r7]
 	mov	ip, #20
-	.loc 2 1831 0
 	ldrh	fp, [r3]
-	.loc 2 1834 0
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
 	b	.L1169
-.LVL1347:
 .L1160:
-	.loc 2 1832 0
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
-	.loc 2 1833 0
 	cmp	r2, lr
-	.loc 2 1832 0
 	str	r1, [sp, #12]
-.LVL1348:
-	.loc 2 1833 0
 	beq	.L1159
-	.loc 2 1834 0
 	mla	r1, ip, r5, r0
-	.loc 2 1835 0
 	adds	r5, r5, #1
-.LVL1349:
-	.loc 2 1834 0
 	orr	r2, r4, r2, lsl #10
-.LVL1350:
-	.loc 2 1835 0
 	uxth	r5, r5
-.LVL1351:
-	.loc 2 1834 0
 	str	r2, [r1, #4]
 .L1159:
-.LVL1352:
 	adds	r3, r3, #1
-.LVL1353:
 .L1169:
-	.loc 2 1831 0 discriminator 1
 	uxth	r2, r3
 	cmp	fp, r2
 	bhi	.L1160
-	.loc 2 1838 0
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1354:
 	ldr	r3, .L1270+40
 	movs	r1, #20
-	.loc 2 1839 0
 	movs	r0, #0
-	.loc 2 1842 0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.LVL1355:
 .L1161:
-	.loc 2 1839 0 discriminator 1
 	cmp	r3, r5
 	bne	.L1166
 	cbz	r0, .L1167
 	ldr	r3, .L1270+40
 	str	r2, [r3]
 .L1167:
-	.loc 2 1829 0
 	adds	r4, r4, #1
-.LVL1356:
 	uxth	r4, r4
-.LVL1357:
 	b	.L1158
 .L1271:
 	.align	2
@@ -14415,450 +8982,275 @@ FtlRecoverySuperblock:
 	.word	.LC1
 	.word	.LANCHOR153
 .L1166:
-	.loc 2 1840 0
 	ldr	r1, [r3]
 	cmp	r1, #0
 	beq	.L1162
 	cbz	r0, .L1155
 .L1264:
-	.loc 2 1858 0
 	ldr	r3, .L1272
 	str	r2, [r3]
-.LVL1358:
 .L1155:
-.LBE303:
-	.loc 2 1863 0
 	ldr	r3, .L1272+4
 	movs	r2, #1
-	.loc 2 1864 0
 	ldr	r0, .L1272+8
-	.loc 2 1873 0
 	ldr	r6, .L1272+12
-	.loc 2 1863 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 1864 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1359:
 	ldr	fp, [sp, #4]
-.LVL1360:
 .L1170:
-	.loc 2 1870 0
 	ldr	r3, .L1272+16
-	.loc 2 1872 0
 	movw	lr, #65535
-	.loc 2 1873 0
 	ldr	r0, [r6]
 	movs	r7, #20
-	.loc 2 1870 0
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r3]
 	movs	r3, #0
-	.loc 2 1869 0
 	str	r3, [sp, #12]
-.LVL1361:
 .L1171:
-	.loc 2 1870 0 discriminator 1
 	uxth	r2, r3
 	cmp	r2, r4
 	bcc	.L1173
-	.loc 2 1877 0
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1362:
-	.loc 2 1878 0
 	movs	r3, #0
-.LVL1363:
 .L1267:
 	str	r3, [sp, #24]
-.LVL1364:
-	.loc 2 1878 0 is_stmt 0 discriminator 2
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
 	bhi	.L1202
-	.loc 2 2032 0 is_stmt 1
 	ldr	r3, .L1272+20
-	.loc 2 2031 0
 	add	fp, fp, #1
-.LVL1365:
 	uxth	fp, fp
-.LVL1366:
-	.loc 2 2032 0
 	ldrh	r3, [r3]
 	cmp	r3, fp
 	bne	.L1170
-	.loc 2 2035 0
 	ldr	r2, .L1272+16
-	.loc 2 2037 0
 	movw	r0, #65535
-	.loc 2 2034 0
 	movs	r3, #0
-	.loc 2 2033 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 2034 0
 	strh	r3, [r8, #4]	@ movhi
-.LVL1367:
-	.loc 2 2035 0
 	ldrh	r2, [r2]
-.LVL1368:
 .L1203:
-	.loc 2 2035 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
 	bcs	.L1262
-	.loc 2 2036 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
-	.loc 2 2037 0
 	cmp	r4, r0
-	.loc 2 2036 0
 	str	r1, [sp, #16]
-.LVL1369:
 	add	r1, r3, #1
-	.loc 2 2037 0
 	bne	.L1268
 	mov	r3, r1
-.LVL1370:
 	b	.L1203
-.LVL1371:
 .L1162:
-.LBB304:
-	.loc 2 1841 0
 	ldr	r1, [r3, #12]
-.LVL1372:
-	.loc 2 1842 0
 	ldrh	lr, [r1]
 	cmp	lr, ip
 	beq	.L1165
-	.loc 2 1844 0
 	ldr	r1, [r1, #4]
-.LVL1373:
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
 .L1165:
 	adds	r3, r3, #20
-.LVL1374:
 	b	.L1161
-.LVL1375:
 .L1168:
-	.loc 2 1858 0
 	mov	r2, #-1
 	b	.L1264
-.LVL1376:
 .L1173:
-.LBE304:
-	.loc 2 1871 0
 	ldrh	r2, [r1], #2
-.LVL1377:
-	.loc 2 1872 0
 	cmp	r2, lr
 	beq	.L1172
-	.loc 2 1873 0
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
-.LVL1378:
 	mla	ip, r7, r5, r0
 	str	r2, [ip, #4]
-	.loc 2 1874 0
 	mov	r2, r5
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1379:
 .L1172:
 	adds	r3, r3, #1
-.LVL1380:
 	b	.L1171
-.LVL1381:
 .L1202:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
-	.loc 2 1879 0
 	ldr	r3, [r6]
 	str	r3, [sp, #28]
 	adds	r7, r3, r5
 	ldr	r4, [r7, #4]
-	.loc 2 1880 0
 	ubfx	r0, r4, #10, #16
-	.loc 2 1879 0
 	str	r4, [sp, #44]
-	.loc 2 1880 0
 	bl	P2V_plane
-.LVL1382:
-	.loc 2 1882 0
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
 	bcc	.L1175
-	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	bne	.L1176
-	.loc 2 1883 0 is_stmt 1
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
 	bhi	.L1175
 .L1176:
-	.loc 2 1886 0
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
 	bne	.L1177
-	.loc 2 1886 0 is_stmt 0 discriminator 1
 	cmp	r10, r0
 	beq	.L1178
 .L1177:
-.LVL1383:
-	.loc 2 1890 0 is_stmt 1
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
 	beq	.L1179
-	.loc 2 1891 0
 	ldr	r3, [r7, #12]
-.LVL1384:
-	.loc 2 1892 0
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
 	beq	.L1180
-.LVL1385:
 .L1186:
-.LBB305:
-	.loc 2 1925 0
 	ldrh	r0, [r8]
-.LVL1386:
 .L1266:
-.LBE305:
-	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1387:
 .L1175:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
 	b	.L1267
-.LVL1388:
 .L1180:
-	.loc 2 1898 0
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
-.LVL1389:
-	.loc 2 1899 0
 	adds	r2, r2, #1
-.LVL1390:
 	beq	.L1181
-	.loc 2 1900 0 discriminator 1
 	ldr	r2, .L1272+24
 	ldr	r0, [sp]
-.LVL1391:
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1392:
-	.loc 2 1899 0 discriminator 1
 	cbz	r0, .L1181
-	.loc 2 1902 0
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
 .L1181:
-	.loc 2 1906 0
 	ldr	r4, [r3, #8]
-.LVL1393:
-	.loc 2 1908 0
 	add	r1, sp, #40
-	.loc 2 1907 0
 	ldr	r3, [r3, #12]
-.LVL1394:
-	.loc 2 1908 0
 	movs	r2, #0
 	mov	r0, r4
-	.loc 2 1907 0
 	str	r3, [sp, #36]
-	.loc 2 1908 0
 	bl	log2phys
-.LVL1395:
-	.loc 2 1909 0
 	ldr	r3, .L1272
 	ldr	r1, [r3]
 	adds	r3, r1, #1
 	beq	.L1182
-	.loc 2 1910 0 discriminator 1
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1396:
-	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
 	beq	.L1182
-.LBB306:
-	.loc 2 1914 0
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
 	beq	.L1183
-	.loc 2 1915 0
 	ldr	r0, [r6]
-	.loc 2 1917 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1915 0
 	add	r0, r0, r5
-	.loc 2 1916 0
 	str	r3, [r0, #4]
-	.loc 2 1915 0
 	ldr	r7, [r0, #12]
-.LVL1397:
-	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1398:
-	.loc 2 1930 0
 	ldr	r2, [r6]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
 	bne	.L1184
-.LVL1399:
 .L1185:
-	.loc 2 1962 0
 	mov	r3, #-1
-	.loc 2 1963 0
 	ldrh	r0, [r8]
-	.loc 2 1962 0
 	str	r3, [sp, #36]
-	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL1400:
 .L1193:
-.LBE306:
-	.loc 2 2003 0
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
 	beq	.L1175
 .L1206:
-	.loc 2 2005 0
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1401:
-	.loc 2 2006 0
 	ldr	r3, .L1272+28
-	.loc 2 2005 0
 	mov	r4, r0
-.LVL1402:
-	.loc 2 2006 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	bhi	.L1198
-	.loc 2 2006 0 is_stmt 0 discriminator 1
 	movw	r2, #2006
 	ldr	r1, .L1272+32
 	ldr	r0, .L1272+36
-.LVL1403:
 	bl	printf
-.LVL1404:
 .L1198:
-	.loc 2 2007 0 is_stmt 1
 	ldr	r3, .L1272+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
 	beq	.L1199
-	.loc 2 2009 0
 	mov	r0, r4
 	b	.L1266
-.LVL1405:
 .L1183:
-.LBB307:
-	.loc 2 1921 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
 	bne	.L1186
-	.loc 2 1922 0
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.LVL1406:
 	b	.L1186
-.LVL1407:
 .L1184:
-	.loc 2 1930 0 discriminator 1
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
 	bne	.L1185
-	.loc 2 1931 0 discriminator 2
 	ldr	r0, .L1272
-	.loc 2 1918 0 discriminator 2
 	ldr	r1, [r7, #4]
-	.loc 2 1931 0 discriminator 2
 	ldr	r0, [r0]
-	.loc 2 1918 0 discriminator 2
 	str	r1, [sp, #28]
-	.loc 2 1931 0 discriminator 2
 	bl	ftl_cmp_data_ver
-.LVL1408:
-	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
 	beq	.L1185
-	.loc 2 1932 0
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
 	bne	.L1188
 .L1191:
-	.loc 2 1958 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-.LVL1409:
 	b	.L1185
 .L1188:
-	.loc 2 1935 0
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
 	beq	.L1185
-	.loc 2 1936 0
 	adds	r0, r1, #1
 	beq	.L1189
-.LVL1410:
-	.loc 2 1938 0
 	str	r1, [r3, #4]
-	.loc 2 1939 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	.loc 2 1937 0
 	ldr	r7, [r3, #12]
-	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1411:
 .L1190:
-	.loc 2 1944 0
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
 	beq	.L1191
-	.loc 2 1945 0
 	ldr	r3, [r7, #4]
-.LVL1412:
-	.loc 2 1946 0
 	ldr	r2, .L1272
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1413:
 	cmp	r0, #0
 	beq	.L1191
-	.loc 2 1947 0
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
-.LVL1414:
 	cmp	r0, #0
 	beq	.L1185
-.LVL1415:
 	b	.L1191
-.LVL1416:
 .L1189:
-	.loc 2 1941 0
 	str	r1, [r2, r5]
 	b	.L1190
 .L1273:
@@ -14875,143 +9267,92 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR160
 	.word	.LC1
 	.word	.LANCHOR42
-.LVL1417:
 .L1182:
-.LBE307:
-	.loc 2 1964 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
 	beq	.L1193
-	.loc 2 1966 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL1418:
-	.loc 2 1967 0
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
 	beq	.L1193
-	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
 	beq	.L1206
-	.loc 2 1968 0 is_stmt 1
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1419:
-	.loc 2 1970 0
 	ldr	r3, .L1274
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L1197
-	.loc 2 1971 0 discriminator 1
 	ldr	r3, .L1274+4
-	.loc 2 1970 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	beq	.L1197
-	.loc 2 1972 0
 	ldr	r3, .L1274+8
-	.loc 2 1971 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
 	bne	.L1193
 .L1197:
-.LVL1420:
-.LBB308:
-	.loc 2 1976 0
 	ldr	r0, [r6]
-.LVL1421:
-	.loc 2 1979 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1978 0
 	str	r7, [r0, #4]
-	.loc 2 1976 0
 	ldr	r5, [r0, #12]
-.LVL1422:
-	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1423:
-	.loc 2 1982 0
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
 	beq	.L1193
-	.loc 2 1983 0
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1424:
 	cmp	r0, #0
 	bne	.L1193
-	.loc 2 1990 0
 	movs	r2, #1
 	add	r1, sp, #40
-.LVL1425:
 	mov	r0, r4
 	bl	log2phys
-.LVL1426:
 	b	.L1193
-.LVL1427:
 .L1199:
-.LBE308:
-	.loc 2 2011 0
 	mov	r1, r4
 	ldr	r0, .L1274+12
 	bl	printf
-.LVL1428:
 	b	.L1175
-.LVL1429:
 .L1179:
-	.loc 2 2018 0
 	ldr	r3, .L1274+16
 	ldr	r3, [r3]
 	cmp	r3, #31
 	bhi	.L1200
-	.loc 2 2019 0
 	ldr	r2, .L1274+20
 	str	r4, [r2, r3, lsl #2]
-	.loc 2 2020 0
 	adds	r3, r3, #1
 	ldr	r2, .L1274+16
 	str	r3, [r2]
 .L1200:
-	.loc 2 2022 0
 	ldrh	r0, [r8]
-.LVL1430:
 	bl	decrement_vpc_count
-.LVL1431:
-	.loc 2 2024 0
 	ldr	r3, .L1274+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
 	bne	.L1201
-	.loc 2 2025 0
 	ldr	r2, [sp]
 .L1265:
-	.loc 2 2027 0
 	str	r2, [r3]
 	b	.L1175
 .L1201:
-	.loc 2 2026 0
 	ldr	r1, [sp]
 	cmp	r1, r2
 	bcs	.L1175
-	.loc 2 2027 0
 	mov	r2, r1
 	b	.L1265
-.LVL1432:
 .L1178:
-	.loc 2 2051 0
 	strb	r10, [r8, #6]
-	.loc 2 2053 0
 	mov	r2, r10
-	.loc 2 2052 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 2053 0
 	mov	r1, fp
 	b	.L1269
 .L1275:
@@ -15024,8 +9365,6 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR162
 	.word	.LANCHOR163
 	.word	.LANCHOR153
-	.cfi_endproc
-.LFE284:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -15036,82 +9375,41 @@ FtlRecoverySuperblock:
 	.fpu softvfp
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
-.LFB291:
-	.loc 2 2205 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1433:
 	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 2 2211 0
 	mov	r3, #-1
-	.loc 2 2205 0
 	sub	sp, sp, #24
-	.cfi_def_cfa_offset 48
-	.loc 2 2213 0
 	ldr	r2, .L1287
-	.loc 2 2219 0
 	movs	r6, #0
-	.loc 2 2205 0
 	mov	r4, r0
-	.loc 2 2211 0
 	str	r3, [sp, #20]
-	.loc 2 2223 0
 	movs	r7, #7
-	.loc 2 2212 0
 	ldr	r3, .L1287+4
-	.loc 2 2213 0
 	ldr	r5, [r2]
-	.loc 2 2216 0
 	mvn	r2, #2
-	.loc 2 2229 0
 	ldr	r8, .L1287+16
-	.loc 2 2212 0
 	ldr	r3, [r3]
-	.loc 2 2213 0
 	str	r5, [sp, #16]
-.LVL1434:
-	.loc 2 2212 0
 	str	r3, [sp, #12]
-	.loc 2 2216 0
 	str	r2, [r5, #8]
-	.loc 2 2217 0
 	mvn	r2, #1
 	str	r2, [r5, #12]
-	.loc 2 2218 0
 	ldrh	r2, [r0]
-	.loc 2 2219 0
 	strh	r6, [r5]	@ movhi
-	.loc 2 2218 0
 	strh	r2, [r5, #2]	@ movhi
-	.loc 2 2220 0
 	movw	r2, #61589
 	str	r2, [r3]
-	.loc 2 2221 0
 	add	r2, r2, #304087040
 	add	r2, r2, #1269760
 	addw	r2, r2, #1507
 	str	r2, [r3, #4]
-.LVL1435:
 .L1277:
-	.loc 2 2223 0
 	subs	r7, r7, #1
-.LVL1436:
 	beq	.L1279
-.LVL1437:
-	.loc 2 2224 0
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1278
-.LVL1438:
 .L1279:
-	.loc 2 2234 0
 	ldr	r3, .L1287+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -15119,53 +9417,35 @@ FtlSuperblockPowerLostFix:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2235 0
 	ldr	r3, .L1287+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 2236 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
-	.loc 2 2237 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2238 0
 	add	sp, sp, #24
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1439:
 .L1278:
-	.cfi_restore_state
-	.loc 2 2226 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1440:
 	str	r0, [sp, #8]
-	.loc 2 2227 0
 	adds	r0, r0, #1
 	beq	.L1279
-	.loc 2 2229 0
 	ldr	r3, [r8]
-	.loc 2 2230 0
 	movs	r1, #1
 	add	r0, sp, #4
-	.loc 2 2229 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, r6
 	str	r3, [r8]
-	.loc 2 2230 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1441:
-	.loc 2 2231 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1442:
 	b	.L1277
 .L1288:
 	.align	2
@@ -15175,8 +9455,6 @@ FtlSuperblockPowerLostFix:
 	.word	.LANCHOR42
 	.word	.LANCHOR19
 	.word	.LANCHOR71
-	.cfi_endproc
-.LFE291:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -15187,276 +9465,170 @@ FtlSuperblockPowerLostFix:
 	.fpu softvfp
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
-.LFB232:
-	.loc 4 173 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 3, -32
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 4 180 0
 	ldr	r8, .L1318+40
 	ldr	r4, .L1318
 	ldr	r3, [r8]
-	.loc 4 184 0
 	ldr	r7, .L1318+4
-	.loc 4 186 0
 	mov	r10, r4
-	.loc 4 180 0
 	str	r3, [r4, #8]
-	.loc 4 181 0
 	ldr	r3, .L1318+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
-.LVL1443:
-	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1444:
-	.loc 4 184 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1445:
 .L1290:
-	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
 	bgt	.L1293
-	.loc 4 185 0 is_stmt 1
 	lsls	r3, r5, #10
-	.loc 4 186 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
-	.loc 4 185 0
 	str	r3, [r4, #4]
-	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1446:
-	.loc 4 187 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1291
-	.loc 4 188 0
 	ldr	r3, [r4, #4]
-	.loc 4 189 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
-	.loc 4 188 0
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
-	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1447:
 .L1291:
-	.loc 4 191 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1292
-	.loc 4 196 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1292
-	.loc 4 198 0
 	ldr	r3, .L1318+12
-	.loc 4 199 0
 	ldr	r2, [r6, #4]
-	.loc 4 198 0
 	strh	r5, [r3]	@ movhi
-	.loc 4 199 0
 	str	r2, [r3, #8]
-	.loc 4 200 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
 .L1293:
-	.loc 4 216 0
 	ldr	r5, .L1318+12
-.LVL1448:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
 	beq	.L1307
-	.loc 4 222 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
 	beq	.L1297
-	.loc 4 224 0
 	lsls	r3, r3, #10
-	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, .L1318
-	.loc 4 224 0
 	str	r3, [r4, #4]
-	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1449:
-	.loc 4 226 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1297
-	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1297
-	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
 	bls	.L1297
-	.loc 4 231 0 is_stmt 1
 	ldrh	r2, [r5, #4]
-	.loc 4 232 0
 	str	r3, [r5, #8]
-	.loc 4 233 0
 	ldrh	r3, [r6, #8]
-	.loc 4 231 0
 	strh	r2, [r5]	@ movhi
-	.loc 4 233 0
 	strh	r3, [r5, #4]	@ movhi
 .L1297:
-	.loc 4 245 0
 	ldr	r10, .L1318
-	.loc 4 238 0
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
-.LVL1450:
 	sxth	r7, r0
-.LVL1451:
-	.loc 4 239 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
 .L1299:
-	.loc 4 241 0
 	cmp	r7, #0
 	bge	.L1302
-	.loc 4 254 0
 	movs	r2, #254
 	ldr	r1, .L1318+16
 	ldr	r0, .L1318+20
 	bl	printf
-.LVL1452:
 .L1301:
-	.loc 4 255 0
 	ldrh	r3, [r6, #10]
-	.loc 4 257 0
 	ldrh	r0, [r6, #12]
-	.loc 4 255 0
 	strh	r3, [r5, #6]	@ movhi
-	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
 	beq	.L1304
-	.loc 4 259 0
 	ldr	r3, .L1318+24
 	ldr	r2, [r3]
 	cmp	r0, r2
 	beq	.L1304
-	.loc 4 259 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1318+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
 	bcs	.L1304
-	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
 	bcs	.L1304
-	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1453:
 .L1304:
 	ldr	r6, .L1318+32
-.LVL1454:
-	.loc 4 173 0 discriminator 1
 	movs	r5, #0
-	.loc 4 268 0 discriminator 1
 	ldr	r7, .L1318+36
-.LVL1455:
-	.loc 4 269 0 discriminator 1
 	ldr	r8, .L1318+44
 .L1305:
-.LVL1456:
-	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
 	bcc	.L1306
-	.loc 4 275 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1457:
 .L1292:
-	.loc 4 184 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1458:
 	uxth	r5, r5
-.LVL1459:
 	b	.L1290
-.LVL1460:
 .L1302:
-	.loc 4 243 0
 	ldrh	r3, [r5]
-	.loc 4 245 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
-	.loc 4 243 0
 	orr	r3, r7, r3, lsl #10
 	str	r3, [r4, #4]
-	.loc 4 244 0
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
-	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1461:
-	.loc 4 247 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1300
-	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	beq	.L1301
 .L1300:
 	subs	r7, r7, #1
-.LVL1462:
 	sxth	r7, r7
-.LVL1463:
 	b	.L1299
-.LVL1464:
 .L1306:
-	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
 	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
-	.loc 4 268 0 discriminator 3
 	adds	r5, r5, #1
-.LVL1465:
-	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1466:
 	b	.L1305
-.LVL1467:
 .L1307:
-	.loc 4 218 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1468:
 .L1319:
 	.align	2
 .L1318:
@@ -15472,8 +9644,6 @@ FtlLoadBbt:
 	.word	.LANCHOR10
 	.word	.LANCHOR107
 	.word	.LANCHOR137
-	.cfi_endproc
-.LFE232:
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -15484,129 +9654,74 @@ FtlLoadBbt:
 	.fpu softvfp
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
-.LFB234:
-	.loc 4 317 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 4 327 0
 	movs	r6, #0
 	ldr	r7, .L1339
-	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1469:
 	sub	r8, r7, #18
-	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1470:
 .L1321:
-	.loc 4 327 0 discriminator 1
 	ldr	r3, .L1339+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
 	bcc	.L1327
-	.loc 4 381 0 discriminator 1
 	ldr	r5, .L1339+8
 	movs	r4, #0
 .L1328:
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1471:
 	adds	r4, r4, #1
 	cmp	r3, r0
 	bhi	.L1329
-	.loc 4 387 0
 	ldr	r4, .L1339+12
-	.loc 4 396 0
 	movw	r6, #65535
-.LVL1472:
-	.loc 4 387 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1473:
 .L1330:
-	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
 	bgt	.L1334
-	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1474:
 	cmp	r0, #1
 	beq	.L1331
-	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1475:
 	cmp	r0, #0
 	beq	.L1332
-	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1476:
 .L1331:
-	.loc 4 387 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1477:
 	uxth	r5, r5
-.LVL1478:
 	b	.L1330
-.LVL1479:
 .L1327:
-	.loc 4 328 0
 	ldr	r3, .L1339+16
-	.loc 4 329 0
 	ldr	r5, .L1339+20
-	.loc 4 331 0
 	ldrh	r2, [r8, #2]!
-	.loc 4 328 0
 	ldr	r4, .L1339+24
 	ldr	r0, [r3]
-	.loc 4 331 0
 	movw	r3, #65535
-	.loc 4 329 0
 	ldr	r10, [r5]
-	.loc 4 331 0
 	cmp	r2, r3
 	mov	fp, r4
 	ldr	r3, .L1339+28
-	.loc 4 328 0
 	str	r0, [r4, #8]
-	.loc 4 329 0
 	str	r10, [r4, #12]
-.LVL1480:
-	.loc 4 331 0
 	beq	.L1322
-	.loc 4 333 0
 	ldrh	r5, [r3]
-	.loc 4 335 0
 	mov	r0, r4
-	.loc 4 333 0
 	str	r3, [sp]
 	mla	r5, r6, r5, r2
-.LVL1481:
-	.loc 4 334 0
 	lsls	r2, r5, #10
 	str	r2, [r4, #4]
-	.loc 4 335 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1482:
-	.loc 4 336 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r7]
@@ -15614,203 +9729,121 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1483:
 .L1323:
-	.loc 4 376 0 discriminator 2
 	uxth	r0, r5
-	.loc 4 327 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1484:
 	adds	r7, r7, #4
-	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1485:
 	b	.L1321
-.LVL1486:
 .L1322:
-	.loc 4 340 0
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
-.LVL1487:
-	.loc 4 341 0
 	ldr	r0, [r4, #8]
 	ldr	r1, [r7]
 	bl	FtlBbt2Bitmap
-.LVL1488:
-	.loc 4 343 0
 	ldr	r3, [sp]
-	.loc 4 350 0
 	str	r5, [sp, #4]
-	.loc 4 343 0
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL1489:
 .L1324:
-	.loc 4 345 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1490:
 	cmp	r0, #1
 	beq	.L1325
-	.loc 4 350 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
-	.loc 4 349 0
 	strh	r4, [r8]	@ movhi
-	.loc 4 350 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1491:
-	.loc 4 351 0
 	ldr	r3, .L1339+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1492:
-	.loc 4 355 0
 	ldr	r2, [sp]
-	.loc 4 352 0
 	movw	r3, #61664
 	strh	r3, [r10]	@ movhi
-	.loc 4 353 0
 	movs	r3, #0
 	str	r3, [r10, #4]
-	.loc 4 355 0
 	ldrh	r5, [r2]
-	.loc 4 354 0
 	ldrh	r3, [r8]
-	.loc 4 357 0
 	ldr	r1, [r7]
 	ldr	r0, [fp, #8]
-	.loc 4 354 0
 	strh	r3, [r10, #2]	@ movhi
-	.loc 4 355 0
 	mla	r5, r6, r5, r3
-.LVL1493:
-	.loc 4 356 0
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
-	.loc 4 357 0
 	ldr	r3, .L1339+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1494:
-	.loc 4 358 0
 	movs	r2, #1
 	ldr	r0, .L1339+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1495:
-	.loc 4 359 0
 	movs	r3, #1
 	ldr	r0, .L1339+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1496:
-	.loc 4 360 0
 	ldr	r3, [fp]
 	adds	r3, r3, #1
 	bne	.L1323
-	.loc 4 362 0
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1497:
-	.loc 4 363 0
 	b	.L1324
-.LVL1498:
 .L1325:
-	.loc 4 347 0
 	subs	r4, r4, #1
-.LVL1499:
 	uxth	r4, r4
-.LVL1500:
 	b	.L1324
-.LVL1501:
 .L1329:
-	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1502:
 	b	.L1328
-.LVL1503:
 .L1332:
-	.loc 4 396 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
 	bne	.L1333
-	.loc 4 398 0
 	strh	r5, [r4]	@ movhi
 	b	.L1331
 .L1333:
-	.loc 4 402 0
 	strh	r5, [r4, #4]	@ movhi
 .L1334:
-	.loc 4 414 0
 	ldr	r3, .L1339+36
-	.loc 4 411 0
 	movs	r5, #0
-.LVL1504:
-	.loc 4 413 0
 	str	r5, [r4, #8]
-	.loc 4 416 0
 	movs	r1, #1
 	movs	r2, #2
-	.loc 4 411 0
 	strh	r5, [r4, #2]	@ movhi
-	.loc 4 414 0
 	ldr	r0, [r3]
 	ldrh	r3, [r4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #4]
-	.loc 4 415 0
 	ldrh	r3, [r4, #4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #24]
-	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1505:
-	.loc 4 418 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
-.LVL1506:
-	.loc 4 419 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
-.LVL1507:
-	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1508:
-	.loc 4 422 0
 	ldr	r3, [r4, #8]
-	.loc 4 425 0
 	ldrh	r2, [r4, #4]
-	.loc 4 426 0
 	strh	r5, [r4, #2]	@ movhi
-	.loc 4 422 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
-	.loc 4 424 0
 	ldrh	r3, [r4]
-.LVL1509:
-	.loc 4 425 0
 	strh	r2, [r4]	@ movhi
-	.loc 4 427 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1510:
-	.loc 4 432 0
 	mov	r0, r5
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1340:
@@ -15826,8 +9859,6 @@ FtlMakeBbt:
 	.word	.LANCHOR17
 	.word	.LANCHOR137
 	.word	.LANCHOR111
-	.cfi_endproc
-.LFE234:
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -15838,177 +9869,95 @@ FtlMakeBbt:
 	.fpu softvfp
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
-.LFB266:
-	.loc 2 835 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1511:
-	.loc 2 843 0
 	ldr	r3, .L1353
-	.loc 2 835 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #104
-	.cfi_def_cfa_offset 136
-	.loc 2 835 0
 	str	r2, [sp]
-	.loc 2 843 0
 	adds	r2, r0, r1
-.LVL1512:
-	.loc 2 835 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 2 843 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bhi	.L1349
-	.loc 2 840 0
 	ldr	r3, .L1353+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.LVL1513:
 .L1343:
-	.loc 2 846 0
 	cbnz	r5, .L1348
-.LVL1514:
 .L1341:
-	.loc 2 869 0
 	mov	r0, r8
 	add	sp, sp, #104
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-.LVL1515:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1516:
 .L1348:
-	.cfi_restore_state
-	.loc 2 847 0
 	ldr	r3, .L1353+8
-	.loc 2 848 0
 	mov	r0, r7
 	ldr	r10, .L1353+24
-	.loc 2 847 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	.loc 2 848 0
 	ldr	r3, .L1353+12
-	.loc 2 847 0
 	str	r2, [sp, #12]
-.LVL1517:
-	.loc 2 848 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1518:
-	.loc 2 849 0
 	ldr	r3, [sp, #8]
-	.loc 2 850 0
 	ldr	r2, [sp, #12]
-	.loc 2 848 0
 	str	r1, [sp, #4]
-.LVL1519:
-	.loc 2 849 0
 	subs	r4, r3, r1
 	uxth	r4, r4
-.LVL1520:
-	.loc 2 850 0
 	cmp	r5, r4
-	.loc 2 851 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1521:
-	.loc 2 852 0
 	cbz	r2, .L1345
-	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
 	beq	.L1345
-	.loc 2 854 0 is_stmt 1
 	ldr	r3, [r10]
-	.loc 2 856 0
 	add	r0, sp, #20
-	.loc 2 853 0
 	str	r2, [sp, #24]
-	.loc 2 856 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 854 0
 	str	r3, [sp, #28]
-	.loc 2 855 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 856 0
 	bl	FlashReadPages
-.LVL1522:
 .L1346:
-	.loc 2 860 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
-	.loc 2 864 0
 	subs	r5, r5, r4
-.LVL1523:
-	.loc 2 860 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
-	.loc 2 865 0
 	add	r7, r7, r4
-.LVL1524:
 	add	fp, fp, #4
-	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1525:
-	.loc 2 861 0
 	ldr	r2, [r10]
 	mov	r1, r6
 	ldr	r0, .L1353+16
-	.loc 2 863 0
 	adds	r6, r6, #1
-.LVL1526:
-	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1527:
-	.loc 2 866 0
 	ldr	r3, [sp]
-	.loc 2 862 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
-.LVL1528:
-	.loc 2 866 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-.LVL1529:
 	b	.L1343
-.LVL1530:
 .L1345:
-	.loc 2 858 0
 	ldr	r3, .L1353+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
-.LVL1531:
 	bl	ftl_memset
-.LVL1532:
 	b	.L1346
-.LVL1533:
 .L1349:
-	.loc 2 844 0
 	mov	r8, #-1
 	b	.L1341
 .L1354:
@@ -16021,8 +9970,6 @@ FtlVendorPartWrite:
 	.word	.LANCHOR149
 	.word	.LANCHOR23
 	.word	.LANCHOR124
-	.cfi_endproc
-.LFE266:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -16033,78 +9980,55 @@ FtlVendorPartWrite:
 	.fpu softvfp
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-.LFB289:
-	.loc 2 2159 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2160 0
 	ldr	r2, .L1357
 	ldr	r3, .L1357+4
 	ldr	r1, [r2]
 	cmp	r1, r3
 	bne	.L1355
-.LBB311:
-.LBB312:
-	.loc 2 2161 0
 	ldr	r3, .L1357+8
-	.loc 2 2174 0
 	movs	r1, #1
 	movs	r0, #0
-	.loc 2 2161 0
 	str	r3, [r2, #4]
-	.loc 2 2162 0
 	ldr	r3, .L1357+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	.loc 2 2163 0
 	ldr	r3, .L1357+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	.loc 2 2164 0
 	ldr	r3, .L1357+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	.loc 2 2165 0
 	ldr	r3, .L1357+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	.loc 2 2166 0
 	ldr	r3, .L1357+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	.loc 2 2167 0
 	ldr	r3, .L1357+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	.loc 2 2168 0
 	ldr	r3, .L1357+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	.loc 2 2169 0
 	ldr	r3, .L1357+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	.loc 2 2170 0
 	ldr	r3, .L1357+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	.loc 2 2171 0
 	ldr	r3, .L1357+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	.loc 2 2172 0
 	ldr	r3, .L1357+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	.loc 2 2173 0
 	ldr	r3, .L1357+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	.loc 2 2174 0
 	b	FtlVendorPartWrite
-.LVL1534:
 .L1355:
 	bx	lr
 .L1358:
@@ -16125,10 +10049,6 @@ Ftl_save_ext_data:
 	.word	.LANCHOR65
 	.word	.LANCHOR76
 	.word	.LANCHOR77
-.LBE312:
-.LBE311:
-	.cfi_endproc
-.LFE289:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -16139,76 +10059,44 @@ Ftl_save_ext_data:
 	.fpu softvfp
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-.LFB268:
-	.loc 2 910 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1535:
-	.loc 2 913 0
 	ldr	r2, .L1364
-	.loc 2 910 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 2 913 0
 	ldrh	r3, [r2]
 	cmp	r3, #31
-	.loc 2 914 0
 	itett	ls
 	addls	r3, r3, #1
-	.loc 2 911 0
 	movhi	r3, #32
-	.loc 2 914 0
 	strhls	r3, [r2]	@ movhi
-.LVL1536:
-	.loc 2 915 0
 	movls	r3, #1
-.LVL1537:
 	ldr	r2, .L1364+4
-	.loc 2 917 0
 	cbnz	r0, .L1361
-	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
-.LVL1538:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
-.LVL1539:
 	cmp	r1, r3
 	bcc	.L1362
 .L1361:
-	.loc 2 919 0 is_stmt 1
 	ldr	r2, [r2]
-	.loc 2 924 0
 	movs	r0, #64
-	.loc 2 919 0
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	.loc 2 920 0
 	ldr	r3, .L1364+8
 	str	r3, [r2]
-	.loc 2 921 0
 	ldr	r3, .L1364+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 922 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 923 0
 	movs	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1540:
-	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1541:
 .L1362:
-	.loc 2 927 0
 	movs	r0, #0
 	pop	{r3, pc}
 .L1365:
@@ -16218,9 +10106,22 @@ FtlEctTblFlush:
 	.word	.LANCHOR127
 	.word	1112818501
 	.word	.LANCHOR125
-	.cfi_endproc
-.LFE268:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.sftl_vendor_write,"ax",%progbits
+	.align	1
+	.global	sftl_vendor_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_vendor_write, %function
+sftl_vendor_write:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartWrite
+	.size	sftl_vendor_write, .-sftl_vendor_write
 	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
 	.global	FtlVendorPartRead
@@ -16230,174 +10131,96 @@ FtlEctTblFlush:
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-.LFB267:
-	.loc 2 872 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1542:
-	.loc 2 881 0
-	ldr	r3, .L1375
-	.loc 2 872 0
+	ldr	r3, .L1376
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r8, r2
-	.loc 2 881 0
 	adds	r2, r0, r1
-.LVL1543:
-	.loc 2 872 0
 	sub	sp, sp, #104
-	.cfi_def_cfa_offset 136
-	.loc 2 872 0
 	mov	r6, r0
 	mov	r5, r1
-	.loc 2 881 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1374
-	.loc 2 877 0
-	ldr	r3, .L1375+4
+	bhi	.L1375
+	ldr	r3, .L1376+4
 	movs	r7, #0
-	.loc 2 891 0
-	ldr	fp, .L1375+16
-	.loc 2 877 0
+	ldr	fp, .L1376+16
 	ldrh	r3, [r3]
 	lsr	r3, r0, r3
 	lsls	r3, r3, #2
 	str	r3, [sp, #4]
-.LVL1544:
-.L1368:
-	.loc 2 883 0
-	cbnz	r5, .L1373
-.LVL1545:
-.L1366:
-	.loc 2 906 0
+.L1369:
+	cbnz	r5, .L1374
+.L1367:
 	mov	r0, r7
 	add	sp, sp, #104
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1546:
-.L1373:
-	.cfi_restore_state
-	.loc 2 884 0
-	ldr	r3, .L1375+8
-	.loc 2 885 0
+.L1374:
+	ldr	r3, .L1376+8
 	mov	r0, r6
-	.loc 2 884 0
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	.loc 2 885 0
-	ldr	r2, .L1375+12
-	.loc 2 884 0
+	ldr	r2, .L1376+12
 	str	r3, [sp, #12]
-.LVL1547:
-	.loc 2 885 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1548:
-	.loc 2 886 0
 	subs	r4, r4, r1
-	.loc 2 887 0
 	ldr	r3, [sp, #12]
-	.loc 2 886 0
 	uxth	r4, r4
-	.loc 2 885 0
 	str	r1, [sp, #8]
-.LVL1549:
-	.loc 2 887 0
 	cmp	r5, r4
-	.loc 2 888 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1550:
 	lsl	r10, r4, #9
-	.loc 2 889 0
-	cbz	r3, .L1370
-	.loc 2 890 0
+	cbz	r3, .L1371
 	str	r3, [sp, #24]
-	.loc 2 893 0
 	movs	r2, #1
-	.loc 2 891 0
 	ldr	r3, [fp]
-	.loc 2 893 0
 	mov	r1, r2
 	add	r0, sp, #20
-	.loc 2 891 0
 	str	r3, [sp, #28]
-	.loc 2 892 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 893 0
 	bl	FlashReadPages
-.LVL1551:
-	.loc 2 894 0
 	ldr	r3, [sp, #20]
-	.loc 2 896 0
 	mov	r2, r10
 	ldr	r1, [fp]
 	mov	r0, r8
-	.loc 2 895 0
 	adds	r3, r3, #1
-	.loc 2 896 0
 	ldr	r3, [sp, #8]
-	.loc 2 895 0
 	it	eq
 	moveq	r7, #-1
-.LVL1552:
-	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1553:
-.L1372:
+.L1373:
 	ldr	r3, [sp, #4]
-	.loc 2 901 0
 	subs	r5, r5, r4
-.LVL1554:
-	.loc 2 902 0
 	add	r6, r6, r4
-.LVL1555:
-	.loc 2 903 0
 	add	r8, r8, r10
-.LVL1556:
 	adds	r3, r3, #4
 	str	r3, [sp, #4]
-	b	.L1368
-.LVL1557:
-.L1370:
-	.loc 2 898 0
+	b	.L1369
+.L1371:
 	mov	r2, r10
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_memset
-.LVL1558:
-	b	.L1372
-.LVL1559:
-.L1374:
-	.loc 2 882 0
+	b	.L1373
+.L1375:
 	mov	r7, #-1
-	b	.L1366
-.L1376:
+	b	.L1367
+.L1377:
 	.align	2
-.L1375:
+.L1376:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
 	.word	.LANCHOR12
 	.word	.LANCHOR124
-	.cfi_endproc
-.LFE267:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -16408,61 +10231,39 @@ FtlVendorPartRead:
 	.fpu softvfp
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
-.LFB274:
-	.loc 2 1383 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 1384 0
 	movs	r0, #64
-	ldr	r4, .L1379
-	ldr	r5, .L1379+4
+	ldr	r4, .L1380
+	ldr	r5, .L1380+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
-.LVL1560:
-	.loc 2 1385 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1379+8
+	ldr	r3, .L1380+8
 	cmp	r2, r3
-	beq	.L1378
-.LBB315:
-.LBB316:
-	.loc 2 1387 0
-	ldr	r1, .L1379+12
-	ldr	r0, .L1379+16
+	beq	.L1379
+	ldr	r1, .L1380+12
+	ldr	r0, .L1380+16
 	bl	printf
-.LVL1561:
-	.loc 2 1388 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1562:
-.L1378:
-.LBE316:
-.LBE315:
-	.loc 2 1393 0
+.L1379:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1380:
+.L1381:
 	.align	2
-.L1379:
+.L1380:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
 	.word	.LC103
 	.word	.LC71
-	.cfi_endproc
-.LFE274:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -16473,112 +10274,79 @@ FtlLoadEctTbl:
 	.fpu softvfp
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
-.LFB290:
-	.loc 2 2179 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2180 0
 	movs	r1, #1
-	ldr	r4, .L1384
+	ldr	r4, .L1385
 	movs	r0, #0
-	.loc 2 2181 0
-	ldr	r5, .L1384+4
-	.loc 2 2180 0
+	ldr	r5, .L1385+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
-.LVL1563:
-	.loc 2 2181 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1382
-	.loc 2 2182 0
+	beq	.L1383
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
-.LVL1564:
-	.loc 2 2183 0
 	str	r5, [r4]
-.L1382:
-	.loc 2 2186 0
+.L1383:
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1384+8
-	bne	.L1383
-	.loc 2 2187 0
+	ldr	r3, .L1385+8
+	bne	.L1384
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1384+12
+	ldr	r2, .L1385+12
 	str	r1, [r2]
-	.loc 2 2188 0
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1384+16
+	ldr	r2, .L1385+16
 	str	r1, [r2]
-	.loc 2 2189 0
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1384+20
+	ldr	r2, .L1385+20
 	str	r1, [r2]
-	.loc 2 2190 0
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1384+24
+	ldr	r2, .L1385+24
 	str	r1, [r2]
-	.loc 2 2191 0
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1384+28
+	ldr	r2, .L1385+28
 	str	r1, [r2]
-	.loc 2 2192 0
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1384+32
+	ldr	r2, .L1385+32
 	str	r1, [r2]
-	.loc 2 2193 0
 	ldr	r2, [r4, #28]
-	.loc 2 2194 0
 	ldr	r1, [r4, #32]
-	.loc 2 2193 0
 	str	r2, [r3]
-	.loc 2 2194 0
-	ldr	r2, .L1384+36
+	ldr	r2, .L1385+36
 	str	r1, [r2]
-	.loc 2 2195 0
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1384+40
+	ldr	r2, .L1385+40
 	str	r1, [r2]
-	.loc 2 2196 0
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1384+44
+	ldr	r2, .L1385+44
 	str	r1, [r2]
-	.loc 2 2197 0
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1384+48
+	ldr	r2, .L1385+48
 	str	r1, [r2]
-	.loc 2 2198 0
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1384+52
+	ldr	r2, .L1385+52
 	str	r1, [r2]
-.L1383:
-	.loc 2 2201 0
-	ldr	r1, .L1384+56
-	ldr	r2, .L1384+60
+.L1384:
+	ldr	r1, .L1385+56
+	ldr	r2, .L1385+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1384+64
+	ldr	r1, .L1385+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-.LVL1565:
-	ldr	r3, .L1384+68
+	ldr	r3, .L1385+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1385:
+.L1386:
 	.align	2
-.L1384:
+.L1385:
 	.word	.LANCHOR81
 	.word	1179929683
 	.word	.LANCHOR73
@@ -16597,9 +10365,22 @@ Ftl_load_ext_data:
 	.word	.LANCHOR14
 	.word	.LANCHOR5
 	.word	.LANCHOR74
-	.cfi_endproc
-.LFE290:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.sftl_vendor_read,"ax",%progbits
+	.align	1
+	.global	sftl_vendor_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_vendor_read, %function
+sftl_vendor_read:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	add	r0, r0, #256
+	b	FtlVendorPartRead
+	.size	sftl_vendor_read, .-sftl_vendor_read
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
 	.global	FtlVpcTblFlush
@@ -16609,165 +10390,91 @@ Ftl_load_ext_data:
 	.fpu softvfp
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-.LFB272:
-	.loc 2 1053 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1566:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1065 0
 	movs	r6, #0
-	.loc 2 1062 0
-	ldr	r3, .L1398
-	.loc 2 1054 0
+	ldr	r3, .L1400
 	movw	fp, #65535
-	.loc 2 1059 0
-	ldr	r8, .L1398+80
-	.loc 2 1060 0
-	ldr	r10, .L1398+84
-	.loc 2 1062 0
+	ldr	r8, .L1400+80
+	ldr	r10, .L1400+84
 	ldrh	r2, [r3]
-	.loc 2 1059 0
 	ldr	r0, [r8]
-	.loc 2 1060 0
 	ldr	r7, [r10]
-	.loc 2 1059 0
-	ldr	r5, .L1398+4
-	.loc 2 1068 0
-	ldr	r4, .L1398+8
-	.loc 2 1069 0
-	ldr	r1, .L1398+12
-	.loc 2 1059 0
+	ldr	r5, .L1400+4
+	ldr	r4, .L1400+8
+	ldr	r1, .L1400+12
 	str	r0, [r5, #8]
-	.loc 2 1060 0
 	str	r7, [r5, #12]
-.LVL1567:
-	.loc 2 1062 0
 	strh	r2, [r7, #2]	@ movhi
-	.loc 2 1063 0
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
-	.loc 2 1064 0
 	ldr	r2, [r3, #8]
-	.loc 2 1065 0
 	str	r6, [r7, #8]
-	.loc 2 1066 0
 	str	r6, [r7, #12]
-	.loc 2 1064 0
 	str	r2, [r7, #4]
-	.loc 2 1069 0
-	ldr	r2, .L1398+16
-	.loc 2 1070 0
+	ldr	r2, .L1400+16
 	str	r3, [sp, #4]
-	.loc 2 1069 0
 	stm	r4, {r1, r2}
-	.loc 2 1070 0
 	ldrh	r2, [r3, #6]
 	strh	r2, [r4, #8]	@ movhi
-	.loc 2 1071 0
-	ldr	r2, .L1398+20
+	ldr	r2, .L1400+20
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	.loc 2 1073 0
-	ldr	r2, .L1398+24
+	ldr	r2, .L1400+24
 	ldrh	r1, [r2]
-	.loc 2 1074 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1073 0
 	strh	r1, [r4, #14]	@ movhi
-	.loc 2 1074 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1075 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
-	.loc 2 1074 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1077 0
-	ldr	r2, .L1398+28
-	.loc 2 1074 0
+	ldr	r2, .L1400+28
 	strh	r1, [r4, #16]	@ movhi
-	.loc 2 1077 0
 	ldrh	r1, [r2]
-	.loc 2 1078 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1077 0
 	strh	r1, [r4, #18]	@ movhi
-	.loc 2 1078 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1079 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	.loc 2 1078 0
 	orr	r1, r1, ip, lsl #6
 	strh	r1, [r4, #20]	@ movhi
-	.loc 2 1079 0
 	strb	r2, [r4, #12]
-	.loc 2 1081 0
-	ldr	r2, .L1398+32
+	ldr	r2, .L1400+32
 	ldrh	r1, [r2]
-	.loc 2 1082 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1081 0
 	strh	r1, [r4, #22]	@ movhi
-	.loc 2 1082 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1083 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
-	.loc 2 1082 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1085 0
-	ldr	r2, .L1398+36
-	.loc 2 1082 0
+	ldr	r2, .L1400+36
 	strh	r1, [r4, #24]	@ movhi
-	.loc 2 1096 0
 	movs	r1, #255
-	.loc 2 1085 0
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
-	.loc 2 1090 0
-	ldr	r2, .L1398+40
+	ldr	r2, .L1400+40
 	ldr	r2, [r2]
 	str	r2, [r4, #40]
-	.loc 2 1091 0
-	ldr	r2, .L1398+44
+	ldr	r2, .L1400+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
-	.loc 2 1096 0
-	ldr	r2, .L1398+48
+	ldr	r2, .L1400+48
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1568:
-	.loc 2 1097 0
 	mov	r1, r4
-	.loc 2 1098 0
-	ldr	r4, .L1398+52
-	.loc 2 1097 0
+	ldr	r4, .L1400+52
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-.LVL1569:
-	.loc 2 1098 0
 	ldrh	r2, [r4]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1398+56
+	ldr	r1, .L1400+56
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-.LVL1570:
-	.loc 2 1099 0
 	ldrh	r0, [r4]
-	ldr	r1, .L1398+60
+	ldr	r1, .L1400+60
 	ldr	r4, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -16777,154 +10484,100 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r4
 	bl	ftl_memcpy
-.LVL1571:
-	.loc 2 1100 0
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1572:
 	ldr	r3, [sp, #4]
 	mov	r4, r3
-.LVL1573:
-.L1387:
-	.loc 2 1102 0
+.L1389:
 	ldr	r3, [r8]
-	.loc 2 1104 0
 	ldrh	r2, [r4]
-	.loc 2 1105 0
-	ldr	r0, .L1398+4
-	.loc 2 1102 0
+	ldr	r0, .L1400+4
 	str	r3, [r5, #8]
-	.loc 2 1103 0
 	ldr	r3, [r10]
 	str	r3, [r5, #12]
-	.loc 2 1104 0
 	ldrh	r3, [r4, #2]
 	orr	r3, r3, r2, lsl #10
 	str	r3, [r5, #4]
-	.loc 2 1105 0
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1574:
-	.loc 2 1106 0
-	ldr	r3, .L1398+64
+	ldr	r3, .L1400+64
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1388
-	.loc 2 1108 0
+	blt	.L1390
 	ldrh	r3, [r4]
-	.loc 2 1107 0
 	ldrh	fp, [r4, #4]
-.LVL1575:
-	.loc 2 1108 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 1109 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1576:
-	.loc 2 1115 0
-	ldr	r2, .L1398+40
-	.loc 2 1110 0
+	ldr	r2, .L1400+40
 	strh	r0, [r4]	@ movhi
-	.loc 2 1115 0
 	ldr	r3, [r2]
 	adds	r1, r3, #1
 	str	r3, [r4, #8]
 	str	r1, [r2]
-	.loc 2 1116 0
 	lsls	r2, r0, #10
 	str	r2, [r5, #4]
-	.loc 2 1117 0
 	str	r3, [r7, #4]
-	.loc 2 1119 0
 	movs	r3, #1
-	.loc 2 1118 0
 	strh	r0, [r7, #2]	@ movhi
-	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1398+4
+	ldr	r0, .L1400+4
 	bl	FlashProgPages
-.LVL1577:
-.L1388:
-	.loc 2 1121 0
+.L1390:
 	ldrh	r3, [r4, #2]
-	.loc 2 1122 0
 	ldr	r2, [r5]
-	.loc 2 1121 0
 	adds	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1122 0
 	adds	r2, r2, #1
-	.loc 2 1121 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1122 0
-	bne	.L1389
-	.loc 2 1124 0
+	bne	.L1391
 	cmp	r3, #1
-	bne	.L1390
-	.loc 2 1124 0 is_stmt 0 discriminator 1
+	bne	.L1392
 	movw	r2, #1124
-	ldr	r1, .L1398+68
-	ldr	r0, .L1398+72
+	ldr	r1, .L1400+68
+	ldr	r0, .L1400+72
 	bl	printf
-.LVL1578:
-.L1390:
-	.loc 2 1125 0 is_stmt 1
+.L1392:
 	ldrh	r3, [r4, #2]
-	.loc 2 1127 0
 	adds	r6, r6, #1
-.LVL1579:
 	uxth	r6, r6
-.LVL1580:
-	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1126 0
 	itttt	eq
-	ldreq	r3, .L1398+64
+	ldreq	r3, .L1400+64
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 1128 0
 	cmp	r6, #3
-	bls	.L1387
-	.loc 2 1129 0
+	bls	.L1389
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1398+76
+	ldr	r0, .L1400+76
 	bl	printf
-.LVL1581:
-.L1393:
-	b	.L1393
-.L1389:
-	.loc 2 1135 0
+.L1395:
+	b	.L1395
+.L1391:
 	cmp	r3, #1
-	beq	.L1387
-	.loc 2 1138 0
+	beq	.L1389
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1394
-	.loc 2 1139 0
+	beq	.L1396
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.LVL1582:
-.L1394:
-	.loc 2 1141 0
+.L1396:
 	movs	r0, #0
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1583:
-.L1399:
+.L1401:
 	.align	2
-.L1398:
+.L1400:
 	.word	.LANCHOR79
 	.word	.LANCHOR106
 	.word	.LANCHOR39
@@ -16947,8 +10600,6 @@ FtlVpcTblFlush:
 	.word	.LC104
 	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.cfi_endproc
-.LFE272:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -16959,30 +10610,15 @@ FtlVpcTblFlush:
 	.fpu softvfp
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-.LFB215:
-	.loc 3 797 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 799 0
 	bl	l2p_flush
-.LVL1584:
-	.loc 3 800 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
-.LVL1585:
-	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1586:
-	.loc 3 803 0
 	movs	r0, #0
 	pop	{r3, pc}
-	.cfi_endproc
-.LFE215:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.sftl_deinit,"ax",%progbits
 	.align	1
@@ -16993,33 +10629,21 @@ FtlSysFlush:
 	.fpu softvfp
 	.type	sftl_deinit, %function
 sftl_deinit:
-.LFB216:
-	.loc 3 806 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 807 0
-	ldr	r3, .L1403
+	ldr	r3, .L1405
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1402
-	.loc 3 808 0
+	bne	.L1404
 	bl	FtlSysFlush
-.LVL1587:
-.L1402:
-	.loc 3 810 0
+.L1404:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1404:
+.L1406:
 	.align	2
-.L1403:
+.L1405:
 	.word	.LANCHOR86
-	.cfi_endproc
-.LFE216:
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",%progbits
 	.align	1
@@ -17030,172 +10654,96 @@ sftl_deinit:
 	.fpu softvfp
 	.type	FtlDiscard, %function
 FtlDiscard:
-.LFB221:
-	.loc 3 1121 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1588:
-	.loc 3 1128 0
-	ldr	r3, .L1420
+	ldr	r3, .L1422
 	adds	r2, r0, r1
-	.loc 3 1121 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 3 1121 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 3 1128 0
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1413
-	.loc 3 1131 0
+	bhi	.L1415
 	cmp	r1, #31
-	bhi	.L1407
-.LVL1589:
-.L1412:
-	.loc 3 1132 0
+	bhi	.L1409
+.L1414:
 	movs	r0, #0
-.L1405:
-	.loc 3 1165 0
+.L1407:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1590:
-.L1407:
-	.cfi_restore_state
-	.loc 3 1136 0
-	ldr	r8, .L1420+12
+.L1409:
+	ldr	r8, .L1422+12
 	ldrh	r4, [r8]
 	mov	r1, r4
-.LVL1591:
 	bl	__aeabi_uidiv
-.LVL1592:
-	.loc 3 1137 0
 	smulbb	r3, r0, r4
-	.loc 3 1136 0
 	mov	r6, r0
-.LVL1593:
-	.loc 3 1137 0
 	subs	r7, r7, r3
-.LVL1594:
 	uxth	r7, r7
-.LVL1595:
-	.loc 3 1138 0
-	cbz	r7, .L1408
-.LVL1596:
-	.loc 3 1139 0
+	cbz	r7, .L1410
 	subs	r4, r4, r7
-.LVL1597:
-	.loc 3 1140 0
 	adds	r6, r6, #1
-.LVL1598:
-	.loc 3 1139 0
 	cmp	r4, r5
 	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
-	.loc 3 1141 0
 	subs	r5, r5, r4
-.LVL1599:
-.L1408:
-	.loc 3 1148 0
-	ldr	r4, .L1420+4
-	.loc 3 1144 0
+.L1410:
+	ldr	r4, .L1422+4
 	mov	r3, #-1
-	.loc 3 1149 0
-	ldr	r7, .L1420+8
-.LVL1600:
-	.loc 3 1144 0
+	ldr	r7, .L1422+8
 	str	r3, [sp, #4]
-.L1409:
-	.loc 3 1145 0
+.L1411:
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1411
-	.loc 3 1158 0
-	ldr	r3, .L1420+4
+	bcs	.L1413
+	ldr	r3, .L1422+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1412
-	.loc 3 1160 0
+	bls	.L1414
 	movs	r4, #0
 	str	r4, [r3]
-	.loc 3 1161 0
 	bl	l2p_flush
-.LVL1601:
-	.loc 3 1162 0
 	bl	FtlVpcTblFlush
-.LVL1602:
-	b	.L1412
-.L1411:
-	.loc 3 1146 0
+	b	.L1414
+.L1413:
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r6
 	bl	log2phys
-.LVL1603:
-	.loc 3 1147 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1410
-	.loc 3 1148 0
+	beq	.L1412
 	ldr	r3, [r4]
-	.loc 3 1150 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
-	.loc 3 1148 0
 	adds	r3, r3, #1
 	str	r3, [r4]
-	.loc 3 1149 0
 	ldr	r3, [r7]
 	adds	r3, r3, #1
 	str	r3, [r7]
-	.loc 3 1150 0
 	bl	log2phys
-.LVL1604:
-	.loc 3 1151 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1605:
-	.loc 3 1152 0
 	bl	decrement_vpc_count
-.LVL1606:
-.L1410:
-	.loc 3 1155 0
+.L1412:
 	ldrh	r3, [r8]
-	.loc 3 1154 0
 	adds	r6, r6, #1
-.LVL1607:
-	.loc 3 1155 0
 	subs	r5, r5, r3
-.LVL1608:
-	b	.L1409
-.LVL1609:
-.L1413:
-	.loc 3 1129 0
+	b	.L1411
+.L1415:
 	mov	r0, #-1
-.LVL1610:
-	b	.L1405
-.L1421:
+	b	.L1407
+.L1423:
 	.align	2
-.L1420:
+.L1422:
 	.word	.LANCHOR34
 	.word	.LANCHOR167
 	.word	.LANCHOR63
 	.word	.LANCHOR12
-	.cfi_endproc
-.LFE221:
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
 	.align	1
@@ -17206,149 +10754,93 @@ FtlDiscard:
 	.fpu softvfp
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
-.LFB292:
-	.loc 2 2242 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -28
-	.cfi_offset 5, -24
-	.cfi_offset 6, -20
-	.cfi_offset 7, -16
-	.cfi_offset 8, -12
-	.cfi_offset 10, -8
-	.cfi_offset 14, -4
-	.loc 2 2249 0
 	movs	r5, #0
-	.loc 2 2247 0
-	ldr	r1, .L1434
-	ldr	r0, .L1434+4
+	ldr	r1, .L1436
+	ldr	r0, .L1436+4
 	bl	printf
-.LVL1611:
-	.loc 2 2248 0
-	ldr	r3, .L1434+8
+	ldr	r3, .L1436+8
 	movs	r1, #0
-	ldr	r4, .L1434+12
-	.loc 2 2249 0
-	ldr	r6, .L1434+16
-	.loc 2 2248 0
+	ldr	r4, .L1436+12
+	ldr	r6, .L1436+16
 	ldrh	r2, [r3]
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1612:
-.L1423:
-	.loc 2 2249 0 discriminator 1
+.L1425:
 	ldr	r3, [r6]
 	cmp	r5, r3
-	bcc	.L1425
-	.loc 2 2256 0 discriminator 1
-	ldr	r10, .L1434+36
+	bcc	.L1427
+	ldr	r10, .L1436+36
 	movs	r7, #0
-	.loc 2 2257 0 discriminator 1
-	ldr	r8, .L1434+40
-.LVL1613:
-.L1426:
-	.loc 2 2256 0 discriminator 1
+	ldr	r8, .L1436+40
+.L1428:
 	ldrh	r3, [r10]
 	uxth	r5, r7
-.LVL1614:
 	cmp	r3, r5
-	bhi	.L1430
-	.loc 2 2268 0
+	bhi	.L1432
 	add	sp, sp, #12
-	.cfi_remember_state
-	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL1615:
-.L1425:
-	.cfi_restore_state
-	.loc 2 2250 0
+.L1427:
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1616:
-	.loc 2 2251 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1424
-	.loc 2 2252 0
+	beq	.L1426
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1617:
-	.loc 2 2253 0
 	ldr	r2, [r4]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.LVL1618:
-.L1424:
-	.loc 2 2249 0 discriminator 2
+.L1426:
 	adds	r5, r5, #1
-.LVL1619:
-	b	.L1423
-.LVL1620:
-.L1430:
-	.loc 2 2257 0
+	b	.L1425
+.L1432:
 	ldr	r3, [r8]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1428
-	.loc 2 2257 0 is_stmt 0 discriminator 1
+	beq	.L1430
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1428
-	.loc 2 2259 0 is_stmt 1
+	beq	.L1430
 	mov	r1, r6
-	ldr	r0, .L1434+20
+	ldr	r0, .L1436+20
 	bl	printf
-.LVL1621:
-	.loc 2 2260 0
-	ldr	r3, .L1434+24
+	ldr	r3, .L1436+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1428
-	.loc 2 2260 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1434+28
+	beq	.L1430
+	ldr	r3, .L1436+28
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1428
-	.loc 2 2260 0 discriminator 2
-	ldr	r3, .L1434+32
+	beq	.L1430
+	ldr	r3, .L1436+32
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1428
-	.loc 2 2261 0 is_stmt 1
+	beq	.L1430
 	ldr	r3, [r4]
-	.loc 2 2262 0
 	mov	r0, r5
-	.loc 2 2261 0
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r8]
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1622:
-	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1623:
-	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1624:
-.L1428:
+.L1430:
 	adds	r7, r7, #1
-.LVL1625:
-	b	.L1426
-.L1435:
+	b	.L1428
+.L1437:
 	.align	2
-.L1434:
+.L1436:
 	.word	.LANCHOR168
 	.word	.LC94
 	.word	.LANCHOR6
@@ -17360,8 +10852,6 @@ FtlVpcCheckAndModify:
 	.word	.LANCHOR52
 	.word	.LANCHOR5
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE292:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -17372,114 +10862,68 @@ FtlVpcCheckAndModify:
 	.fpu softvfp
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
-.LFB302:
-	.loc 2 2682 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1626:
-	.loc 2 2684 0
-	ldr	r3, .L1446
-	.loc 2 2682 0
+	ldr	r3, .L1448
 	push	{r4, r5, r6, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 4, -16
-	.cfi_offset 5, -12
-	.cfi_offset 6, -8
-	.cfi_offset 14, -4
-	.loc 2 2682 0
 	mov	r6, r0
-	.loc 2 2683 0
 	ldrh	r4, [r0]
-.LVL1627:
-	.loc 2 2684 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1437
-	.loc 2 2684 0 is_stmt 0 discriminator 1
+	bcs	.L1439
 	movw	r2, #2684
-	ldr	r1, .L1446+4
-	ldr	r0, .L1446+8
-.LVL1628:
+	ldr	r1, .L1448+4
+	ldr	r0, .L1448+8
 	bl	printf
-.LVL1629:
-.L1437:
-	.loc 2 2686 0 is_stmt 1
+.L1439:
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1438
-	.loc 2 2687 0
-	ldr	r3, .L1446+12
-	.loc 2 2688 0
+	beq	.L1440
+	ldr	r3, .L1448+12
 	mov	r0, r4
-	.loc 2 2687 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1439
-	.loc 2 2688 0
+	cbz	r3, .L1441
 	bl	INSERT_DATA_LIST
-.LVL1630:
-.L1438:
-	.loc 2 2693 0
-	ldr	r5, .L1446+16
+.L1440:
+	ldr	r5, .L1448+16
 	movw	r2, #65535
-	.loc 2 2692 0
 	movs	r3, #1
 	strb	r3, [r6, #8]
-	.loc 2 2693 0
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1440
-	.loc 2 2694 0
+	beq	.L1442
 	cmp	r4, r0
-	bne	.L1441
-	.loc 2 2694 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1446+12
+	bne	.L1443
+	ldr	r3, .L1448+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1442
-.L1441:
-	.loc 2 2695 0 is_stmt 1
+	cbz	r3, .L1444
+.L1443:
 	bl	update_vpc_list
-.LVL1631:
-.L1442:
-	.loc 2 2696 0
+.L1444:
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1440:
-	.loc 2 2698 0
+.L1442:
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1632:
-	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1633:
-	.loc 2 2700 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1634:
-	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1635:
-	.loc 2 2703 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1636:
-.L1439:
-	.loc 2 2690 0
+.L1441:
 	bl	INSERT_FREE_LIST
-.LVL1637:
-	b	.L1438
-.L1447:
+	b	.L1440
+.L1449:
 	.align	2
-.L1446:
+.L1448:
 	.word	.LANCHOR5
 	.word	.LANCHOR169
 	.word	.LC1
 	.word	.LANCHOR42
 	.word	.LANCHOR150
-	.cfi_endproc
-.LFE302:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -17490,197 +10934,118 @@ allocate_new_data_superblock:
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
-.LFB218:
-	.loc 3 904 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1638:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 913 0
 	movs	r6, #0
-	.loc 3 917 0
-	ldr	r8, .L1462+24
-	.loc 3 904 0
+	ldr	r8, .L1464+24
 	mov	r4, r3
-	.loc 3 911 0
 	movs	r2, #0
-.LVL1639:
-	.loc 3 904 0
 	mov	r5, r0
-	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1640:
-	.loc 3 904 0
 	mov	r10, r1
-	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1641:
-.L1449:
-	.loc 3 913 0 discriminator 1
+.L1451:
 	cmp	r6, r10
-	beq	.L1456
-	.loc 3 918 0
-	ldr	r7, .L1462
-	b	.L1457
-.L1452:
-	.loc 3 915 0
+	beq	.L1458
+	ldr	r7, .L1464
+	b	.L1459
+.L1454:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1642:
-	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1450
-	.loc 3 917 0
+	bne	.L1452
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
-.LVL1643:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
-	.loc 3 918 0
 	ldrh	r3, [r7]
 	strh	r3, [r4, #2]	@ movhi
-	.loc 3 919 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
-	.loc 3 920 0
 	strh	r3, [r4, #4]	@ movhi
-.L1450:
-	.loc 3 922 0
+.L1452:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1451
-	.loc 3 923 0
+	cbnz	r3, .L1453
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1644:
-.L1451:
-	.loc 3 926 0
-	ldr	r2, .L1462+4
+.L1453:
+	ldr	r2, .L1464+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
-	.loc 3 927 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1645:
-	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1646:
-	.loc 3 930 0
 	movs	r2, #0
-	.loc 3 929 0
 	str	r0, [r5, #4]
-	.loc 3 928 0
 	str	r0, [sp, #4]
-	.loc 3 930 0
 	movs	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1647:
-.L1457:
-	.loc 3 914 0
+.L1459:
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1452
-	.loc 3 933 0
-	ldr	r3, .L1462+8
+	beq	.L1454
+	ldr	r3, .L1464+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1453
-	.loc 3 933 0 is_stmt 0 discriminator 1
+	bcc	.L1455
 	movw	r2, #933
-	ldr	r1, .L1462+12
-	ldr	r0, .L1462+16
+	ldr	r1, .L1464+12
+	ldr	r0, .L1464+16
 	bl	printf
-.LVL1648:
-.L1453:
-	.loc 3 934 0 is_stmt 1
+.L1455:
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
-	.loc 3 935 0
 	movs	r2, #1
 	ldr	r0, [r5, #16]
-	.loc 3 934 0
 	str	r3, [r1, #-4]!
-	.loc 3 935 0
 	bl	log2phys
-.LVL1649:
-	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	fp, [r3, #12]
-.LVL1650:
-	.loc 3 939 0
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-.LVL1651:
-	.loc 3 940 0
 	cmp	fp, #-1
-	.loc 3 939 0
 	mov	r7, r0
-.LVL1652:
-	.loc 3 940 0
-	beq	.L1454
-	.loc 3 942 0
+	beq	.L1456
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1455
-	.loc 3 943 0
+	cbnz	r2, .L1457
 	mov	r1, r0
-	ldr	r0, .L1462+20
-.LVL1653:
+	ldr	r0, .L1464+20
 	bl	printf
-.LVL1654:
-.L1455:
-	.loc 3 944 0
+.L1457:
 	mov	r0, r7
 	bl	decrement_vpc_count
-.LVL1655:
-.L1454:
-	.loc 3 913 0 discriminator 2
+.L1456:
 	adds	r6, r6, #1
-.LVL1656:
 	adds	r5, r5, #20
-	b	.L1449
-.LVL1657:
-.L1456:
-	.loc 3 948 0
-	ldr	r3, .L1462+8
+	b	.L1451
+.L1458:
+	ldr	r3, .L1464+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1448
-	.loc 3 948 0 is_stmt 0 discriminator 1
+	bcc	.L1450
 	mov	r2, #948
-	ldr	r1, .L1462+12
-	ldr	r0, .L1462+16
+	ldr	r1, .L1464+12
+	ldr	r0, .L1464+16
 	bl	printf
-.LVL1658:
-.L1448:
-	.loc 3 949 0 is_stmt 1
+.L1450:
 	add	sp, sp, #8
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1659:
-.L1463:
+.L1465:
 	.align	2
-.L1462:
+.L1464:
 	.word	.LANCHOR19
 	.word	.LANCHOR81
 	.word	.LANCHOR3
@@ -17688,8 +11053,6 @@ FtlProgPages:
 	.word	.LC1
 	.word	.LC106
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE218:
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
@@ -17700,319 +11063,199 @@ FtlProgPages:
 	.fpu softvfp
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-.LFB311:
-	.loc 5 112 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1660:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 119 0
 	movw	r2, #65535
-	ldr	r4, .L1490
-	.loc 5 115 0
-	ldr	r6, .L1490+4
-	.loc 5 119 0
+	ldr	r4, .L1492
+	ldr	r6, .L1492+4
 	ldrh	r5, [r4]
-	.loc 5 115 0
 	ldrh	r1, [r6]
-.LVL1661:
-	.loc 5 119 0
 	cmp	r5, r2
-	bne	.L1465
-.LVL1662:
-.L1475:
-	.loc 5 152 0
-	ldr	r3, .L1490+8
+	bne	.L1467
+.L1477:
+	ldr	r3, .L1492+8
 	movs	r2, #0
 	str	r2, [r3]
-	.loc 5 153 0
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1488
-.L1466:
-	.loc 5 154 0
+	bne	.L1490
+.L1468:
 	movs	r0, #0
-.L1464:
-	.loc 5 199 0
+.L1466:
 	add	sp, sp, #16
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1663:
-.L1465:
-	.cfi_restore_state
-	.loc 5 121 0
-	cbz	r0, .L1468
-.LVL1664:
-	.loc 5 123 0
-	ldr	r3, .L1490+12
+.L1467:
+	cbz	r0, .L1470
+	ldr	r3, .L1492+12
 	ldrh	r0, [r3]
-.LVL1665:
 	cmp	r0, r2
-	beq	.L1469
-.L1470:
-	.loc 5 122 0
+	beq	.L1471
+.L1472:
 	movs	r1, #2
-.LVL1666:
-.L1468:
-	.loc 5 131 0
-	ldr	r0, .L1490
+.L1470:
+	ldr	r0, .L1492
 	bl	FtlGcScanTempBlk
-.LVL1667:
 	str	r0, [sp, #12]
-	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1471
-	.loc 5 135 0
-	ldr	r3, .L1490+16
+	beq	.L1473
+	ldr	r3, .L1492+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1472
-	.loc 5 136 0
+	bls	.L1474
 	subs	r3, r3, #5
-	.loc 5 137 0
 	movs	r0, #1
-	.loc 5 136 0
 	strh	r3, [r2, r5, lsl #1]	@ movhi
-	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1668:
-.L1472:
-	.loc 5 139 0
-	ldr	r4, .L1490+8
+.L1474:
+	ldr	r4, .L1492+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1473
-	.loc 5 140 0
-	ldr	r2, .L1490+20
-	.loc 5 141 0
+	cbnz	r2, .L1475
+	ldr	r2, .L1492+20
 	ldr	r0, [sp, #12]
-	.loc 5 140 0
 	ldr	r3, [r2, #96]
-	.loc 5 141 0
 	ubfx	r0, r0, #10, #16
-	.loc 5 140 0
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
-	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1669:
-	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1670:
-.L1473:
-	.loc 5 144 0
+.L1475:
 	movs	r3, #0
 	str	r3, [r4]
-.L1484:
-	.loc 5 149 0
+.L1486:
 	movs	r0, #1
-	b	.L1464
-.LVL1671:
-.L1469:
-	.loc 5 124 0
+	b	.L1466
+.L1471:
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
-	.loc 5 125 0
-	ldr	r3, .L1490+24
+	ldr	r3, .L1492+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1470
-	b	.L1468
-.LVL1672:
-.L1471:
-	.loc 5 148 0
-	ldr	r3, .L1490+12
+	bhi	.L1472
+	b	.L1470
+.L1473:
+	ldr	r3, .L1492+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1484
-	b	.L1475
-.LVL1673:
-.L1488:
-	.loc 5 162 0
+	bne	.L1486
+	b	.L1477
+.L1490:
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1490+28
+	ldr	r5, .L1492+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1476
-	.loc 5 162 0 is_stmt 0 discriminator 1
+	beq	.L1478
 	movs	r2, #162
-	ldr	r1, .L1490+32
-	ldr	r0, .L1490+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1674:
-.L1476:
-	.loc 5 163 0 is_stmt 1
+.L1478:
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1490+40
+	ldr	r2, .L1492+40
 	ldrh	r0, [r4]
-	.loc 5 168 0
-	ldr	fp, .L1490+68
-	.loc 5 163 0
+	ldr	fp, .L1492+68
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
-	.loc 5 165 0
 	movs	r6, #0
 	str	r2, [sp, #4]
-	.loc 5 163 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	.loc 5 164 0
-	ldr	r1, .L1490+44
+	ldr	r1, .L1492+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.LVL1675:
-.L1477:
-	.loc 5 165 0 discriminator 1
+.L1479:
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1481
-	.loc 5 181 0
+	bhi	.L1483
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1676:
-	.loc 5 182 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1482
-	.loc 5 183 0
+	beq	.L1484
 	bl	INSERT_DATA_LIST
-.LVL1677:
-.L1483:
-	.loc 5 188 0
-	ldr	r3, .L1490+48
-	.loc 5 186 0
+.L1485:
+	ldr	r3, .L1492+48
 	movw	r6, #65535
-.LVL1678:
 	strh	r6, [r4]	@ movhi
-	.loc 5 187 0
 	movs	r4, #0
 	strh	r4, [r5]	@ movhi
-	.loc 5 188 0
 	strh	r4, [r3]	@ movhi
-	.loc 5 189 0
 	bl	l2p_flush
-.LVL1679:
-	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1680:
-	.loc 5 191 0
-	ldr	r3, .L1490+24
+	ldr	r3, .L1492+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1490+52
+	ldr	r3, .L1492+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1466
-	.loc 5 192 0
-	ldr	r3, .L1490+56
-	.loc 5 193 0
+	ble	.L1468
+	ldr	r3, .L1492+56
 	movs	r2, #20
-	.loc 5 192 0
 	strh	r6, [r3]	@ movhi
-	.loc 5 193 0
-	ldr	r3, .L1490+60
+	ldr	r3, .L1492+60
 	strh	r2, [r3]	@ movhi
-	b	.L1466
-.LVL1681:
-.L1481:
-	.loc 5 166 0
+	b	.L1468
+.L1483:
 	uxth	r3, r6
 	movs	r7, #12
-	.loc 5 168 0
 	ldr	r2, [fp]
-	.loc 5 166 0
 	muls	r7, r3, r7
-	ldr	r3, .L1490+64
+	ldr	r3, .L1492+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
-.LVL1682:
-	.loc 5 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1478
-	.loc 5 168 0 is_stmt 0 discriminator 1
+	bcc	.L1480
 	movs	r2, #168
-	ldr	r1, .L1490+32
-	ldr	r0, .L1490+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1683:
-.L1478:
-	.loc 5 169 0 is_stmt 1
+.L1480:
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1684:
-	.loc 5 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1479
-	.loc 5 171 0
+	bne	.L1481
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1685:
-	.loc 5 172 0
 	movs	r2, #1
-	.loc 5 171 0
 	mov	r7, r0
-.LVL1686:
-	.loc 5 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1687:
-	.loc 5 173 0
 	mov	r0, r7
-.LVL1688:
-.L1489:
-	.loc 5 177 0
+.L1491:
 	bl	decrement_vpc_count
-.LVL1689:
-.L1480:
+.L1482:
 	adds	r6, r6, #1
-.LVL1690:
-	b	.L1477
-.LVL1691:
-.L1479:
-	.loc 5 175 0
+	b	.L1479
+.L1481:
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1480
-	.loc 5 177 0
+	beq	.L1482
 	ldrh	r0, [r4]
-	b	.L1489
-.LVL1692:
-.L1482:
-	.loc 5 185 0
+	b	.L1491
+.L1484:
 	bl	INSERT_FREE_LIST
-.LVL1693:
-	b	.L1483
-.L1491:
+	b	.L1485
+.L1493:
 	.align	2
-.L1490:
+.L1492:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR152
@@ -18031,8 +11274,6 @@ FtlGcFreeTempBlock:
 	.word	.LANCHOR82
 	.word	.LANCHOR98
 	.word	.LANCHOR61
-	.cfi_endproc
-.LFE311:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -18043,56 +11284,34 @@ FtlGcFreeTempBlock:
 	.fpu softvfp
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
-.LFB314:
-	.loc 5 289 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 5 290 0
-	ldr	r4, .L1494
-	ldr	r5, .L1494+4
+	ldr	r4, .L1496
+	ldr	r5, .L1496+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1694:
-	.loc 5 291 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1492
-.LBB319:
-.LBB320:
-	.loc 5 293 0
-	ldr	r0, .L1494+8
+	bcc	.L1494
+	ldr	r0, .L1496+8
 	bl	FtlMapBlkWriteDump_data
-.LVL1695:
-	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1696:
-	.loc 5 295 0
-	ldr	r3, .L1494+12
+	ldr	r3, .L1496+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1492:
+.L1494:
 	pop	{r3, r4, r5, pc}
-.L1495:
+.L1497:
 	.align	2
-.L1494:
+.L1496:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR144
 	.word	.LANCHOR152
-.LBE320:
-.LBE319:
-	.cfi_endproc
-.LFE314:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -18103,63 +11322,33 @@ FtlGcPageRecovery:
 	.fpu softvfp
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
-.LFB286:
-	.loc 2 2081 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 2 2082 0
 	movs	r4, #0
-	.loc 2 2084 0
-	ldr	r5, .L1497
-	.loc 2 2082 0
-	ldr	r3, .L1497+4
-	.loc 2 2084 0
+	ldr	r5, .L1499
+	ldr	r3, .L1499+4
 	mov	r0, r5
-	.loc 2 2082 0
 	str	r4, [r3]
-	.loc 2 2084 0
 	bl	FtlRecoverySuperblock
-.LVL1697:
-	.loc 2 2085 0
 	mov	r0, r5
-	.loc 2 2086 0
-	ldr	r5, .L1497+8
-	.loc 2 2085 0
+	ldr	r5, .L1499+8
 	bl	FtlSlcSuperblockCheck
-.LVL1698:
-	.loc 2 2086 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
-.LVL1699:
-	.loc 2 2087 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1700:
-	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1701:
-	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1702:
-	.loc 2 2091 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1498:
+.L1500:
 	.align	2
-.L1497:
+.L1499:
 	.word	.LANCHOR51
 	.word	.LANCHOR162
 	.word	.LANCHOR52
-	.cfi_endproc
-.LFE286:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
@@ -18170,122 +11359,76 @@ FtlPowerLostRecovery:
 	.fpu softvfp
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-.LFB316:
-	.loc 5 316 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1506
-	.loc 5 321 0
+	ldr	r4, .L1508
 	movs	r6, #0
-	.loc 5 322 0
 	movs	r7, #20
-	.loc 5 320 0
 	mov	r2, r3
-	ldr	r5, .L1506+4
+	ldr	r5, .L1508+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.LVL1703:
-.L1500:
-	.loc 5 321 0 discriminator 1
+.L1502:
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1503
-	.loc 5 335 0
+	bhi	.L1505
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-.LVL1704:
-	.loc 5 337 0
-	ldr	r3, .L1506+8
-	.loc 5 336 0
+	ldr	r3, .L1508+8
 	movs	r0, #0
 	str	r0, [r4]
-	.loc 5 337 0
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1499
-	.loc 5 338 0
+	cbnz	r3, .L1501
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1705:
-	b	.L1505
-.L1503:
-	.loc 5 322 0
+	b	.L1507
+.L1505:
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
-.LVL1706:
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1501
-	.loc 5 323 0
-	ldr	r3, .L1506+8
+	bne	.L1503
+	ldr	r3, .L1508+8
 	movs	r5, #0
-	ldr	r0, .L1506+12
+	ldr	r0, .L1508+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
-	.loc 5 324 0
 	strh	r2, [r3]	@ movhi
-	.loc 5 325 0
-	ldr	r2, .L1506+16
-	.loc 5 326 0
+	ldr	r2, .L1508+16
 	ldr	r0, [r1, #4]
-	.loc 5 325 0
 	ldr	r3, [r2, #96]
-	.loc 5 326 0
 	ubfx	r0, r0, #10, #16
-	.loc 5 325 0
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
-	.loc 5 326 0
 	bl	FtlBbmMapBadBlock
-.LVL1707:
-	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1708:
-	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1709:
-.L1505:
-	.loc 5 339 0
+.L1507:
 	movs	r0, #1
-.L1499:
-	.loc 5 342 0
-	pop	{r3, r4, r5, r6, r7, pc}
 .L1501:
-	.loc 5 331 0 discriminator 2
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1503:
 	ldr	r3, [r1, #12]
-.LVL1710:
-	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1711:
-	b	.L1500
-.L1507:
+	b	.L1502
+.L1509:
 	.align	2
-.L1506:
+.L1508:
 	.word	.LANCHOR89
 	.word	.LANCHOR121
 	.word	.LANCHOR53
 	.word	.LANCHOR42
 	.word	.LANCHOR81
-	.cfi_endproc
-.LFE316:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -18296,78 +11439,41 @@ Ftl_gc_temp_data_write_back:
 	.fpu softvfp
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
-.LFB315:
-	.loc 5 300 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	.cfi_def_cfa_offset 16
-	.cfi_offset 3, -16
-	.cfi_offset 4, -12
-	.cfi_offset 5, -8
-	.cfi_offset 14, -4
-	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1511
+	ldr	r4, .L1513
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1509
-	.loc 5 301 0 is_stmt 0 discriminator 1
+	beq	.L1511
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1510
-.L1509:
-	.loc 5 303 0 is_stmt 1
+	cbnz	r3, .L1512
+.L1511:
 	movs	r0, #0
-	.loc 5 304 0
 	movs	r5, #0
-	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1712:
-	.loc 5 305 0
-	ldr	r0, .L1511
-	.loc 5 304 0
+	ldr	r0, .L1513
 	strb	r5, [r4, #8]
-	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1713:
-	.loc 5 306 0
-	ldr	r3, .L1511+4
+	ldr	r3, .L1513+4
 	strh	r5, [r3]	@ movhi
-	.loc 5 307 0
-	ldr	r3, .L1511+8
+	ldr	r3, .L1513+8
 	strh	r5, [r3]	@ movhi
-	.loc 5 308 0
 	bl	l2p_flush
-.LVL1714:
-	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1715:
-	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1716:
-.L1510:
-	.loc 5 312 0
-	ldr	r0, .L1511
-	.loc 5 313 0
+.L1512:
+	ldr	r0, .L1513
 	pop	{r3, r4, r5, lr}
-	.cfi_restore 14
-	.cfi_restore 5
-	.cfi_restore 4
-	.cfi_restore 3
-	.cfi_def_cfa_offset 0
-	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1717:
-.L1512:
+.L1514:
 	.align	2
-.L1511:
+.L1513:
 	.word	.LANCHOR53
 	.word	.LANCHOR96
 	.word	.LANCHOR97
-	.cfi_endproc
-.LFE315:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -18378,83 +11484,50 @@ Ftl_get_new_temp_ppa:
 	.fpu softvfp
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-.LFB322:
-	.loc 5 470 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1718:
-	.loc 5 478 0
-	ldr	r3, .L1631
-	.loc 5 470 0
+	ldr	r3, .L1633
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	mov	r7, r0
 	sub	sp, sp, #48
-	.cfi_def_cfa_offset 80
-	.loc 5 478 0
 	ldr	r0, [r3]
-.LVL1719:
 	cmp	r0, #0
-	bne	.L1588
-	.loc 5 481 0
-	ldr	r3, .L1631+4
+	bne	.L1590
+	ldr	r3, .L1633+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1513
-	.loc 5 485 0
-	ldr	r3, .L1631+8
+	bls	.L1515
+	ldr	r3, .L1633+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1515
-.LVL1720:
-.L1518:
-.LBB324:
-.LBB325:
-	.loc 5 489 0
-	ldr	r3, .L1631+12
+	bne	.L1517
+.L1520:
+	ldr	r3, .L1633+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1516
-.L1517:
-	.loc 5 496 0
-	ldr	r2, .L1631+16
-	.loc 5 497 0
+	bne	.L1518
+.L1519:
+	ldr	r2, .L1633+16
 	movw	r5, #65535
-	ldr	r6, .L1631+20
-	.loc 5 496 0
+	ldr	r6, .L1633+20
 	ldr	r3, [r2]
-	.loc 5 497 0
 	ldrh	r0, [r6]
-	.loc 5 496 0
 	adds	r3, r3, #1
 	add	r3, r3, r7, lsl #7
-	.loc 5 497 0
 	cmp	r0, r5
-	.loc 5 496 0
 	str	r3, [r2]
-	.loc 5 497 0
-	bne	.L1519
-	ldr	r1, .L1631+24
+	bne	.L1521
+	ldr	r1, .L1633+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1520
-	ldr	r0, .L1631+28
+	bne	.L1522
+	ldr	r0, .L1633+28
 	ldrh	r10, [r0]
 	cmp	r10, r1
-	bne	.L1521
-	.loc 5 498 0
-	ldr	r1, .L1631+32
+	bne	.L1523
+	ldr	r1, .L1633+32
 	ldrh	r0, [r1]
 	mov	r8, r1
 	cmp	r0, #24
@@ -18462,404 +11535,275 @@ rk_ftl_garbage_collect:
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1521
-.LBB326:
-	.loc 5 502 0
-	ldr	r3, .L1631+36
-	.loc 5 501 0
+	bls	.L1523
+	ldr	r3, .L1633+36
 	movs	r4, #0
 	str	r4, [r2]
-	.loc 5 502 0
 	strh	r4, [r3]	@ movhi
-	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1721:
-	.loc 5 504 0
 	cmp	r0, r10
-	.loc 5 503 0
 	mov	r5, r0
-.LVL1722:
-	.loc 5 504 0
-	bne	.L1592
-	.loc 5 505 0
-	ldr	r10, .L1631+96
+	bne	.L1594
+	ldr	r10, .L1633+96
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcs	.L1524
-	.loc 5 506 0
+	bcs	.L1526
 	movs	r0, #64
-.LVL1723:
 	bl	List_get_gc_head_node
-.LVL1724:
-	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1526
-	.loc 5 508 0
+	beq	.L1528
 	mov	r0, r3
-	ldr	r3, .L1631+40
+	ldr	r3, .L1633+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1527
-	.loc 5 509 0
+	bhi	.L1529
 	mov	r0, r4
-.LVL1725:
 	bl	List_get_gc_head_node
-.LVL1726:
 	uxth	r4, r0
-.LVL1727:
-	.loc 5 510 0
 	movs	r3, #128
 	strh	r3, [r10]	@ movhi
-	.loc 5 520 0
 	cmp	r4, r5
-	bne	.L1523
-.LVL1728:
-.L1526:
-	.loc 5 523 0
+	bne	.L1525
+.L1528:
 	bl	FtlGcReFreshBadBlk
-.LVL1729:
-.LBE326:
-	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1529
+	bne	.L1531
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1529
-.LVL1730:
-.L1586:
-	.loc 5 528 0
-	ldr	r3, .L1631+32
+	bne	.L1531
+.L1588:
+	ldr	r3, .L1633+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1593
-	ldr	r2, .L1631+44
-	.loc 5 530 0
+	bhi	.L1595
+	ldr	r2, .L1633+44
 	cmp	r3, #16
-	.loc 5 531 0
 	ldrh	r4, [r2]
-	.loc 5 530 0
-	bls	.L1531
-	.loc 5 531 0
+	bls	.L1533
 	lsrs	r4, r4, #5
-.LVL1731:
-.L1530:
-	.loc 5 539 0
-	ldr	r2, .L1631+48
+.L1532:
+	ldr	r2, .L1633+48
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1534
-	.loc 5 540 0
-	ldr	r3, .L1631+24
+	bcs	.L1536
+	ldr	r3, .L1633+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1535
-	ldr	r0, .L1631+28
+	bne	.L1537
+	ldr	r0, .L1633+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1535
-	.loc 5 542 0
-	ldr	r3, .L1631+36
+	bne	.L1537
+	ldr	r3, .L1633+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1536
-	ldr	r3, .L1631+52
-	ldr	r4, .L1631+56
-.LVL1732:
+	cbnz	r0, .L1538
+	ldr	r3, .L1633+52
+	ldr	r4, .L1633+56
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1537
-.L1536:
-	.loc 5 543 0
-	ldr	r3, .L1631+60
+	bcs	.L1539
+.L1538:
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1538:
-	.loc 5 546 0
-	ldr	r3, .L1631+64
+.L1540:
+	ldr	r3, .L1633+64
 	movs	r2, #0
 	str	r2, [r3]
-.LVL1733:
-.L1513:
-.LBE325:
-.LBE324:
-	.loc 5 754 0
+.L1515:
 	add	sp, sp, #48
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1734:
-.L1515:
-	.cfi_restore_state
-	.loc 5 485 0 discriminator 1
-	ldr	r2, .L1631+24
+.L1517:
+	ldr	r2, .L1633+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1518
-	.loc 5 486 0
+	beq	.L1520
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1735:
 	cmp	r0, #0
-	beq	.L1518
-	.loc 5 487 0
+	beq	.L1520
 	movs	r0, #1
-	b	.L1513
-.LVL1736:
-.L1516:
-.LBB330:
-.LBB328:
-	.loc 5 489 0
-	ldr	r1, .L1631+28
+	b	.L1515
+.L1518:
+	ldr	r1, .L1633+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
-	.loc 5 490 0
 	itt	eq
 	strheq	r0, [r1]	@ movhi
-	.loc 5 491 0
 	strheq	r2, [r3]	@ movhi
-	b	.L1517
-.LVL1737:
-.L1527:
-.LBB327:
-	.loc 5 512 0
+	b	.L1519
+.L1529:
 	movs	r3, #64
-.LVL1738:
-.L1625:
-	.loc 5 516 0
+.L1627:
 	strh	r3, [r10]	@ movhi
-	b	.L1526
-.LVL1739:
-.L1524:
+	b	.L1528
+.L1526:
 	movs	r3, #80
-	b	.L1625
-.L1592:
-	.loc 5 504 0
+	b	.L1627
+.L1594:
 	mov	r4, r0
-.LVL1740:
-.L1523:
-	.loc 5 521 0
-	ldr	r3, .L1631+40
+.L1525:
+	ldr	r3, .L1633+40
 	mov	r5, r4
-	ldr	r1, .L1631+48
+	ldr	r1, .L1633+48
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1631+68
+	ldr	r0, .L1633+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1631+72
+	ldr	r1, .L1633+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-.LVL1741:
-	b	.L1526
-.LVL1742:
-.L1531:
-.LBE327:
-	.loc 5 532 0
+	b	.L1528
+.L1533:
 	cmp	r3, #12
-	bls	.L1532
-	.loc 5 533 0
+	bls	.L1534
 	lsrs	r4, r4, #4
-.LVL1743:
-	b	.L1530
-.LVL1744:
-.L1532:
-	.loc 5 534 0
+	b	.L1532
+.L1534:
 	cmp	r3, #8
-	bls	.L1530
-	.loc 5 535 0
+	bls	.L1532
 	lsrs	r4, r4, #2
-.LVL1745:
-	b	.L1530
-.LVL1746:
-.L1593:
-	.loc 5 529 0
+	b	.L1532
+.L1595:
 	movs	r4, #1
-	b	.L1530
-.L1537:
-	.loc 5 545 0
+	b	.L1532
+.L1539:
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1538
-.LVL1747:
-.L1535:
-	.loc 5 549 0
-	ldr	r3, .L1631+60
+	b	.L1540
+.L1537:
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1534:
-	.loc 5 551 0
-	ldr	r3, .L1631+76
+.L1536:
+	ldr	r3, .L1633+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1594
-	.loc 5 552 0
+	cbz	r3, .L1596
 	adds	r4, r4, #32
-.LVL1748:
 	uxth	r4, r4
-.LVL1749:
-.L1594:
-	.loc 5 551 0
+.L1596:
 	movw	r5, #65535
-.LVL1750:
-.L1540:
-	.loc 5 595 0
+.L1542:
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1549
-	.loc 5 596 0
+	bne	.L1551
 	cmp	r5, r3
-	beq	.L1550
-	.loc 5 597 0
+	beq	.L1552
 	strh	r5, [r6]	@ movhi
-.LVL1751:
-.L1551:
-	.loc 5 607 0
+.L1553:
 	ldrh	r0, [r6]
 	movw	r7, #65535
-	.loc 5 606 0
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	.loc 5 607 0
 	cmp	r0, r7
-	beq	.L1549
-	.loc 5 608 0
+	beq	.L1551
 	bl	IsBlkInGcList
-.LVL1752:
-	cbz	r0, .L1554
-	.loc 5 609 0
+	cbz	r0, .L1556
 	strh	r7, [r6]	@ movhi
-.L1554:
-	.loc 5 611 0
+.L1556:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1549
-	.loc 5 612 0
-	ldr	r0, .L1631+20
+	beq	.L1551
+	ldr	r0, .L1633+20
 	bl	make_superblock
-.LVL1753:
-	.loc 5 615 0
-	ldr	r2, .L1631+80
-	.loc 5 613 0
+	ldr	r2, .L1633+80
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 5 614 0
 	strb	r3, [r6, #6]
-	.loc 5 615 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 616 0
-	ldr	r3, .L1631+40
+	ldr	r3, .L1633+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1631+84
+	ldr	r3, .L1633+84
 	strh	r2, [r3]	@ movhi
-.L1549:
-	.loc 5 621 0
-	ldr	r2, .L1631+88
+.L1551:
+	ldr	r2, .L1633+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1555
-	ldr	r2, .L1631+92
+	beq	.L1557
+	ldr	r2, .L1633+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1555
-	.loc 5 627 0
-	ldr	r6, .L1631+20
+	beq	.L1557
+	ldr	r6, .L1633+20
 	mov	fp, r6
-.L1556:
+.L1558:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1557
-	.loc 5 631 0
-	ldr	r8, .L1631+100
-	.loc 5 628 0
+	bne	.L1559
+	ldr	r8, .L1633+100
 	movs	r2, #0
-	ldr	r3, .L1631+64
+	ldr	r3, .L1633+64
 	str	r2, [r3]
-.L1558:
-	.loc 5 631 0
+.L1560:
 	ldrh	r7, [r8]
 	mov	r0, r7
 	bl	List_get_gc_head_node
-.LVL1754:
 	uxth	r3, r0
-	.loc 5 632 0
 	movw	r1, #65535
 	cmp	r3, r1
-	.loc 5 631 0
 	strh	r3, [fp]	@ movhi
-	.loc 5 632 0
-	bne	.L1559
-	.loc 5 633 0
+	bne	.L1561
 	movs	r3, #0
-	.loc 5 634 0
 	movs	r0, #8
-	.loc 5 633 0
 	strh	r3, [r8]	@ movhi
-	b	.L1513
-.LVL1755:
-.L1541:
-	.loc 5 558 0
-	ldr	r3, .L1631+64
+	b	.L1515
+.L1543:
+	ldr	r3, .L1633+64
 	movs	r2, #0
-	.loc 5 560 0
-	ldr	r1, .L1631+48
-	ldr	r4, .L1631+32
-	.loc 5 558 0
+	ldr	r1, .L1633+48
+	ldr	r4, .L1633+32
 	str	r2, [r3]
-	.loc 5 560 0
 	ldrh	r3, [r1]
 	mov	r2, r1
 	ldrh	r8, [r4]
-	ldr	r5, .L1631+36
+	ldr	r5, .L1633+36
 	cmp	r3, r8
-	bcs	.L1542
-	.loc 5 561 0
+	bcs	.L1544
 	ldrh	r3, [r5]
-	cbnz	r3, .L1543
-	ldr	r3, .L1631+52
-	ldr	r0, .L1631+56
+	cbnz	r3, .L1545
+	ldr	r3, .L1633+52
+	ldr	r0, .L1633+56
 	ldr	r3, [r3]
 	ldr	r0, [r0]
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcs	.L1544
-.L1543:
-	.loc 5 562 0
-	ldr	r3, .L1631+60
+	bcs	.L1546
+.L1545:
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.LVL1756:
-.L1628:
-	.loc 5 578 0
+.L1630:
 	bl	FtlReadRefresh
-.LVL1757:
-	.loc 5 579 0
 	ldrh	r0, [r5]
-	b	.L1513
-.L1632:
+	b	.L1515
+.L1634:
 	.align	2
-.L1631:
+.L1633:
 	.word	.LANCHOR117
 	.word	.LANCHOR45
 	.word	.LANCHOR156
@@ -18886,332 +11830,238 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR83
 	.word	.LANCHOR85
-.LVL1758:
-.L1544:
-	.loc 5 564 0
+.L1546:
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1628
-.L1542:
-	.loc 5 572 0
+	b	.L1630
+.L1544:
 	ldrh	r0, [r5]
 	cmp	r0, #0
-	bne	.L1546
-	.loc 5 573 0
-	ldr	r3, .L1633
+	bne	.L1548
+	ldr	r3, .L1635
 	ldrh	r7, [r3]
-.LVL1759:
 	add	r2, r7, r7, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r1]	@ movhi
-	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1760:
-	.loc 5 575 0
-	ldr	r3, .L1633+4
+	ldr	r3, .L1635+4
 	uxth	r0, r0
-	ldr	r2, .L1633+8
+	ldr	r2, .L1635+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1633+12
+	ldr	r3, .L1635+12
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1547
-	.loc 5 576 0
+	ble	.L1549
 	subs	r3, r7, #1
-	.loc 5 575 0
 	cmp	r8, r3
-	bge	.L1628
-.L1547:
-	.loc 5 584 0
+	bge	.L1630
+.L1549:
 	cmp	r1, #0
-	bne	.L1546
-	.loc 5 585 0
+	bne	.L1548
 	movw	r0, #65535
-.LVL1761:
 	bl	decrement_vpc_count
-.LVL1762:
-	.loc 5 586 0
 	ldrh	r0, [r4]
 	adds	r0, r0, #1
-	b	.L1513
-.LVL1763:
-.L1550:
-	.loc 5 598 0
-	ldr	r3, .L1633+16
+	b	.L1515
+.L1552:
+	ldr	r3, .L1635+16
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1551
-	.loc 5 600 0
-	ldr	r1, .L1633+4
+	beq	.L1553
+	ldr	r1, .L1635+4
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1552
-	.loc 5 601 0
+	cbnz	r2, .L1554
 	strh	r5, [r3]	@ movhi
-.L1552:
-	.loc 5 602 0
+.L1554:
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
-	.loc 5 603 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1551
-.LVL1764:
-.L1555:
-	.loc 5 622 0
+	b	.L1553
+.L1557:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.LVL1765:
-.L1629:
-	.loc 5 648 0
-	ldr	r3, .L1633+20
+.L1631:
+	ldr	r3, .L1635+20
 	ldrh	r0, [r3]
-	b	.L1513
-.LVL1766:
-.L1559:
+	b	.L1515
+.L1561:
 	str	r0, [sp, #16]
-	.loc 5 636 0
 	mov	r0, r3
 	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-.LVL1767:
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1560
-	.loc 5 637 0
+	cbz	r0, .L1562
 	strh	r7, [r8]	@ movhi
-	b	.L1558
-.L1560:
-	.loc 5 641 0
+	b	.L1560
+.L1562:
 	uxth	r0, r2
-	ldr	r2, .L1633+24
-	ldr	r10, .L1633+4
-	.loc 5 640 0
+	ldr	r2, .L1635+24
+	ldr	r10, .L1635+4
 	uxth	r7, r7
-	.loc 5 641 0
 	ldrh	lr, [r2]
-	ldr	r2, .L1633+8
+	ldr	r2, .L1635+8
 	ldr	r1, [r10]
-	.loc 5 640 0
 	strh	r7, [r8]	@ movhi
-	.loc 5 641 0
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	lr, r2, lr
 	cmp	ip, lr, asr #1
-	bgt	.L1562
-	.loc 5 642 0
+	bgt	.L1564
 	cmp	r7, #48
-	bls	.L1563
+	bls	.L1565
 	cmp	ip, #8
-	bls	.L1563
-	ldr	r7, .L1633+28
+	bls	.L1565
+	ldr	r7, .L1635+28
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1563
-.L1562:
-	.loc 5 643 0
-	ldr	r2, .L1633+32
+	bhi	.L1565
+.L1564:
+	ldr	r2, .L1635+32
 	movs	r7, #0
 	strh	r7, [r2]	@ movhi
-.L1563:
-	.loc 5 645 0
+.L1565:
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	lr, r1
-	bgt	.L1564
+	bgt	.L1566
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1564
-	.loc 5 647 0
-	ldr	r2, .L1633+32
+	bne	.L1566
+	ldr	r2, .L1635+32
 	movs	r3, #0
-	.loc 5 646 0
 	strh	r5, [fp]	@ movhi
-	.loc 5 647 0
 	strh	r3, [r2]	@ movhi
-	b	.L1629
-.L1564:
-	.loc 5 651 0
-	cbnz	r1, .L1565
-	.loc 5 652 0
+	b	.L1631
+.L1566:
+	cbnz	r1, .L1567
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1768:
-	.loc 5 653 0
-	ldr	r3, .L1633+32
-	ldr	r2, .L1633+32
+	ldr	r3, .L1635+32
+	ldr	r2, .L1635+32
 	ldrh	r3, [r3]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1558
-.L1565:
-	.loc 5 656 0
+	b	.L1560
+.L1567:
 	movs	r2, #0
 	strb	r2, [fp, #8]
-	.loc 5 658 0
-	ldr	r2, .L1633+36
+	ldr	r2, .L1635+36
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1566
+	bne	.L1568
 	movw	r2, #658
-	ldr	r1, .L1633+40
-	ldr	r0, .L1633+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1769:
-.L1566:
-	.loc 5 659 0
-	ldr	r3, .L1633+48
+.L1568:
+	ldr	r3, .L1635+48
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1567
+	bne	.L1569
 	movw	r2, #659
-	ldr	r1, .L1633+40
-	ldr	r0, .L1633+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1770:
-.L1567:
-	.loc 5 660 0
-	ldr	r3, .L1633+52
+.L1569:
+	ldr	r3, .L1635+52
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1568
+	bne	.L1570
 	mov	r2, #660
-	ldr	r1, .L1633+40
-	ldr	r0, .L1633+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1771:
-.L1568:
-	.loc 5 661 0
+.L1570:
 	mov	r0, r6
 	bl	make_superblock
-.LVL1772:
-	.loc 5 662 0
-	ldr	r2, .L1633+56
+	ldr	r2, .L1635+56
 	movs	r3, #0
-	.loc 5 663 0
 	ldrh	r1, [fp]
-	.loc 5 662 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 663 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1633+60
-	.loc 5 664 0
+	ldr	r2, .L1635+60
 	strh	r3, [fp, #2]	@ movhi
-	.loc 5 665 0
 	strb	r3, [fp, #6]
-	.loc 5 663 0
 	strh	r1, [r2]	@ movhi
-.L1557:
-	.loc 5 671 0
+.L1559:
 	bl	FtlReadRefresh
-.LVL1773:
-	.loc 5 674 0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1635+64
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 5 675 0
-	ldr	r3, .L1633+24
+	ldr	r3, .L1635+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL1774:
-	.loc 5 676 0
 	ldrh	r3, [fp, #2]
 	ldr	r1, [sp, #28]
 	adds	r2, r3, r4
 	cmp	r2, r1
-	.loc 5 677 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
-.LVL1775:
-	.loc 5 689 0
 	mov	r3, #0
-	.loc 5 677 0
 	it	gt
 	uxthgt	r4, r4
-.LVL1776:
-.L1627:
+.L1629:
 	str	r3, [sp, #24]
-.LVL1777:
-	.loc 5 679 0
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1578
-	.loc 5 681 0
-	ldr	r3, .L1633+8
-	.loc 5 683 0
+	bls	.L1580
+	ldr	r3, .L1635+8
 	movw	r10, #65535
-	.loc 5 684 0
 	ldrh	r8, [r6, #2]
-	ldr	r1, .L1633+68
-	.loc 5 681 0
+	ldr	r1, .L1635+68
 	ldrh	ip, [r3]
-	.loc 5 684 0
-	ldr	r3, .L1633+72
+	ldr	r3, .L1635+72
 	ldr	r0, [r3]
 	ldr	r3, [sp, #24]
 	add	r8, r8, r3
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1579
-.LVL1778:
-.L1572:
-	.loc 5 682 0
+	b	.L1581
+.L1574:
 	ldrh	r2, [r1, #2]!
-.LVL1779:
-	.loc 5 683 0
 	cmp	r2, r10
-	beq	.L1571
-	.loc 5 684 0
+	beq	.L1573
 	ldr	r7, [sp, #12]
 	mov	lr, #20
 	orr	r2, r8, r2, lsl #10
-.LVL1780:
 	mla	lr, lr, r7, r0
 	str	r2, [lr, #4]
-	.loc 5 685 0
 	mov	r2, r7
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1781:
-.L1571:
+.L1573:
 	adds	r3, r3, #1
-.LVL1782:
-.L1579:
-	.loc 5 681 0
+.L1581:
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1572
-	.loc 5 689 0
+	bhi	.L1574
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1783:
 	movs	r3, #0
-.LVL1784:
-.L1626:
+.L1628:
 	str	r3, [sp, #20]
-.LVL1785:
-	.loc 5 691 0
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1577
-.LVL1786:
+	bhi	.L1579
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1627
-.L1634:
+	b	.L1629
+.L1636:
 	.align	2
-.L1633:
+.L1635:
 	.word	.LANCHOR78
 	.word	.LANCHOR42
 	.word	.LANCHOR3
@@ -19231,287 +12081,197 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR117
 	.word	.LANCHOR80+14
 	.word	.LANCHOR93
-.LVL1787:
-.L1577:
+.L1579:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
-	.loc 5 692 0
-	ldr	r3, .L1635
+	ldr	r3, .L1637
 	ldr	r3, [r3]
 	adds	r2, r3, r7
-.LVL1788:
-	.loc 5 693 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1574
-	.loc 5 692 0
+	beq	.L1576
 	ldr	r3, [r2, #12]
-	.loc 5 693 0
 	ldrh	r2, [r3]
-.LVL1789:
-	.loc 5 692 0
 	str	r3, [sp, #16]
-	.loc 5 693 0
 	movw	r3, #61589
-.LVL1790:
 	cmp	r2, r3
-	bne	.L1574
-	.loc 5 695 0
+	bne	.L1576
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
-.LVL1791:
-	.loc 5 696 0
 	cmp	r8, #-1
-	bne	.L1575
+	bne	.L1577
 	mov	r2, #696
-	ldr	r1, .L1635+4
-	ldr	r0, .L1635+8
+	ldr	r1, .L1637+4
+	ldr	r0, .L1637+8
 	bl	printf
-.LVL1792:
-.L1575:
-	.loc 5 697 0
+.L1577:
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-.LVL1793:
-	.loc 5 698 0
-	ldr	r3, .L1635
+	ldr	r3, .L1637
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1574
-	.loc 5 700 0
-	ldr	r2, .L1635+12
-	.loc 5 701 0
+	bne	.L1576
+	ldr	r2, .L1637+12
 	mov	r10, #20
-	ldr	r8, .L1635+36
-.LVL1794:
+	ldr	r8, .L1637+36
 	ldr	r1, [r1, #16]
-	.loc 5 700 0
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 5 701 0
-	ldr	r2, .L1635+16
+	ldr	r2, .L1637+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
 	mla	r3, r10, r3, r0
 	str	r1, [r3, #16]
 	str	r3, [sp, #32]
-	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1795:
 	ldr	r3, [sp, #32]
-	.loc 5 703 0
 	ldr	r2, [sp, #36]
-	.loc 5 705 0
 	ldr	r1, [sp, #16]
-	.loc 5 702 0
 	str	r0, [r3, #4]
-	.loc 5 703 0
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1635
-	.loc 5 711 0
+	ldr	r2, .L1637
 	adds	r3, r3, #1
-	.loc 5 703 0
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	.loc 5 706 0
-	ldr	r7, .L1635+20
-	.loc 5 703 0
+	ldr	r7, .L1637+20
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
-	.loc 5 704 0
 	ldr	r2, [r0, #12]
 	str	r2, [r10, #12]
-	.loc 5 705 0
 	ldr	r2, [sp, #44]
 	str	r2, [r1, #12]
-	.loc 5 706 0
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	.loc 5 709 0
-	ldr	r2, .L1635+24
-	.loc 5 711 0
+	ldr	r2, .L1637+24
 	str	r3, [r8]
-	.loc 5 709 0
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
-	.loc 5 712 0
 	movs	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1796:
-	.loc 5 713 0
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1576
+	beq	.L1578
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1574
-.L1576:
-	.loc 5 714 0
+	cbnz	r3, .L1576
+.L1578:
 	bl	Ftl_gc_temp_data_write_back
-.LVL1797:
-	cbz	r0, .L1574
-.LVL1798:
-.L1630:
-	.loc 5 729 0
-	ldr	r3, .L1635+28
+	cbz	r0, .L1576
+.L1632:
+	ldr	r3, .L1637+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1629
-.LVL1799:
-.L1574:
+	b	.L1631
+.L1576:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1626
-.LVL1800:
-.L1578:
-	.loc 5 723 0
+	b	.L1628
+.L1580:
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-.LVL1801:
-	.loc 5 725 0
 	ldr	r3, [sp, #28]
-	.loc 5 723 0
 	uxth	r4, r4
-	.loc 5 725 0
 	cmp	r3, r4
-	.loc 5 723 0
 	strh	r4, [r6, #2]	@ movhi
-	.loc 5 725 0
-	bls	.L1580
-	ldr	r3, .L1635+12
+	bls	.L1582
+	ldr	r3, .L1637+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1635+32
+	ldr	r3, .L1637+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1581
-.L1580:
-	.loc 5 727 0
-	ldr	r3, .L1635+36
+	bne	.L1583
+.L1582:
+	ldr	r3, .L1637+36
 	ldr	r3, [r3]
-	cbz	r3, .L1582
-	.loc 5 728 0
+	cbz	r3, .L1584
 	bl	Ftl_gc_temp_data_write_back
-.LVL1802:
 	cmp	r0, #0
-	bne	.L1630
-.L1582:
-	.loc 5 733 0
-	ldr	r3, .L1635+12
+	bne	.L1632
+.L1584:
+	ldr	r3, .L1637+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1583
-	ldr	r3, .L1635+40
+	cbnz	r1, .L1585
+	ldr	r3, .L1637+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1583
-	.loc 5 735 0
+	cbz	r0, .L1585
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 5 736 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
-.LVL1803:
-	.loc 5 738 0
 	bl	l2p_flush
-.LVL1804:
-	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1805:
-.L1583:
-	.loc 5 741 0
+.L1585:
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1581:
-	.loc 5 743 0
-	ldr	r3, .L1635+44
+.L1583:
+	ldr	r3, .L1637+44
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1584
-	.loc 5 745 0
-	ldr	r3, .L1635+48
+	bhi	.L1586
+	ldr	r3, .L1637+48
 	ldrh	r4, [r3]
-.LVL1806:
-	b	.L1556
-.LVL1807:
-.L1584:
-	.loc 5 748 0
-	ldr	r2, .L1635+28
+	b	.L1558
+.L1586:
+	ldr	r2, .L1637+28
 	movs	r1, #0
 	str	r1, [r2]
-	.loc 5 750 0
-	ldr	r2, .L1635+52
+	ldr	r2, .L1637+52
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1513
-	.loc 5 753 0
+	bne	.L1515
 	adds	r0, r3, #1
-.LVL1808:
-	b	.L1513
-.LVL1809:
-.L1588:
-.LBE328:
-.LBE330:
-	.loc 5 479 0
+	b	.L1515
+.L1590:
 	movs	r0, #0
-	b	.L1513
-.LVL1810:
-.L1519:
-.LBB331:
-.LBB329:
-	.loc 5 527 0
+	b	.L1515
+.L1521:
 	cmp	r7, #0
-	beq	.L1586
-.LVL1811:
-.L1529:
-	.loc 5 557 0
-	ldr	r3, .L1635+20
+	beq	.L1588
+.L1531:
+	ldr	r3, .L1637+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1597
-.LVL1812:
-.L1587:
-	ldr	r3, .L1635+56
+	bne	.L1599
+.L1589:
+	ldr	r3, .L1637+56
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1597
+	bne	.L1599
 	cmp	r5, r3
-	bne	.L1597
+	bne	.L1599
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1541
-.LVL1813:
-.L1546:
-	.loc 5 556 0
+	beq	.L1543
+.L1548:
 	movw	r5, #65535
-.L1597:
+.L1599:
 	movs	r4, #1
-	b	.L1540
-.LVL1814:
-.L1521:
-	.loc 5 527 0
+	b	.L1542
+.L1523:
 	cmp	r7, #0
-	beq	.L1586
+	beq	.L1588
 	movw	r5, #65535
-	b	.L1587
-.LVL1815:
-.L1520:
+	b	.L1589
+.L1522:
 	cmp	r7, #0
-	bne	.L1546
-	b	.L1586
-.L1636:
+	bne	.L1548
+	b	.L1588
+.L1638:
 	.align	2
-.L1635:
+.L1637:
 	.word	.LANCHOR93
 	.word	.LANCHOR175
 	.word	.LC1
@@ -19527,10 +12287,6 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR19
 	.word	.LANCHOR172
 	.word	.LANCHOR99
-.LBE329:
-.LBE331:
-	.cfi_endproc
-.LFE322:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.sftl_gc,"ax",%progbits
 	.align	1
@@ -19541,19 +12297,12 @@ rk_ftl_garbage_collect:
 	.fpu softvfp
 	.type	sftl_gc, %function
 sftl_gc:
-.LFB323:
-	.loc 5 757 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 758 0
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1816:
-	.cfi_endproc
-.LFE323:
 	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",%progbits
 	.align	1
@@ -19564,427 +12313,268 @@ sftl_gc:
 	.fpu softvfp
 	.type	FtlRead, %function
 FtlRead:
-.LFB217:
-	.loc 3 814 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1817:
-	.loc 3 824 0
 	cmp	r0, #16
-	.loc 3 814 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #56
-	.cfi_def_cfa_offset 88
-	.loc 3 814 0
 	mov	r6, r1
 	mov	r8, r3
 	str	r2, [sp, #32]
-	.loc 3 824 0
-	bne	.L1639
-	.loc 3 825 0
+	bne	.L1641
 	mov	r2, r3
-.LVL1818:
 	ldr	r1, [sp, #32]
-.LVL1819:
 	add	r0, r6, #256
-.LVL1820:
 	bl	FtlVendorPartRead
-.LVL1821:
 	str	r0, [sp, #4]
-.LVL1822:
-.L1638:
-	.loc 3 901 0
+.L1640:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1823:
-.L1639:
-	.cfi_restore_state
-	.loc 3 830 0
+.L1641:
 	ldr	r3, [sp, #32]
-.LVL1824:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1670
+	ldr	r3, .L1672
 	ldr	r2, [sp, #12]
-.LVL1825:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1659
-	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1670+4
+	bhi	.L1661
+	ldr	r3, .L1672+4
 	ldr	r3, [r3]
 	adds	r0, r3, #1
-.LVL1826:
-	beq	.L1660
-	.loc 3 835 0 is_stmt 1
-	ldr	r3, .L1670+8
+	beq	.L1662
+	ldr	r3, .L1672+8
 	mov	r0, r6
-	.loc 3 828 0
 	movs	r7, #0
-	.loc 3 840 0
 	mov	r5, r7
-	.loc 3 835 0
 	ldrh	r4, [r3]
 	mov	r1, r4
-.LVL1827:
 	bl	__aeabi_uidiv
-.LVL1828:
-	.loc 3 836 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
-	.loc 3 835 0
 	str	r0, [sp, #16]
-.LVL1829:
-	.loc 3 836 0
 	subs	r0, r3, #1
-.LVL1830:
 	bl	__aeabi_uidiv
-.LVL1831:
-	.loc 3 837 0
 	ldr	r3, [sp, #16]
-	.loc 3 841 0
-	ldr	r2, .L1670+12
-	.loc 3 835 0
+	ldr	r2, .L1672+12
 	ldr	r4, [sp, #16]
-	.loc 3 837 0
 	rsb	r3, r3, #1
-	.loc 3 836 0
 	str	r0, [sp, #20]
-.LVL1832:
-	.loc 3 837 0
 	add	r3, r3, r0
-	.loc 3 828 0
 	str	r7, [sp, #28]
-	.loc 3 837 0
 	str	r3, [sp, #8]
-.LVL1833:
-	.loc 3 841 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1834:
-	.loc 3 820 0
 	str	r7, [sp, #24]
-	.loc 3 815 0
 	str	r7, [sp, #4]
-	.loc 3 841 0
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1835:
-.L1641:
-	.loc 3 842 0
+.L1643:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1657
-	.loc 3 898 0
-	ldr	r3, .L1670+16
+	cbnz	r3, .L1659
+	ldr	r3, .L1672+16
 	ldrh	r3, [r3]
-	cbnz	r3, .L1658
-	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1670+20
+	cbnz	r3, .L1660
+	ldr	r3, .L1672+20
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1638
-.L1658:
-	.loc 3 899 0 is_stmt 1
+	bhi	.L1640
+.L1660:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1836:
-	b	.L1638
-.LVL1837:
-.L1657:
-	.loc 3 843 0
+	b	.L1640
+.L1659:
 	add	r1, sp, #52
 	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
-.LVL1838:
-	.loc 3 844 0
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	bne	.L1642
-	.loc 3 845 0 discriminator 1
-	ldr	fp, .L1670+8
+	bne	.L1644
+	ldr	fp, .L1672+8
 	mov	r10, #0
-.L1643:
-.LVL1839:
+.L1645:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1645
-.LVL1840:
-.L1646:
-	.loc 3 874 0
+	bcc	.L1647
+.L1648:
 	ldr	r3, [sp, #8]
-	.loc 3 872 0
 	adds	r4, r4, #1
-.LVL1841:
-	.loc 3 874 0
 	subs	r3, r3, #1
-.LVL1842:
 	str	r3, [sp, #8]
-	beq	.L1650
-	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1670+24
-.LVL1843:
+	beq	.L1652
+	ldr	r3, .L1672+24
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1641
-.L1650:
-	.loc 3 875 0 is_stmt 1
+	bne	.L1643
+.L1652:
 	cmp	r5, #0
-	beq	.L1641
-	.loc 3 876 0
-	ldr	r3, .L1670+28
+	beq	.L1643
+	ldr	r3, .L1672+28
 	movs	r2, #0
 	mov	r1, r5
-	.loc 3 877 0
 	mov	r10, #0
-	.loc 3 876 0
 	ldr	r0, [r3]
 	bl	FlashReadPages
-.LVL1844:
-	.loc 3 883 0
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
-	.loc 3 880 0
 	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.LVL1845:
-.L1656:
+.L1658:
 	movs	r3, #20
 	mul	fp, r3, r10
-	.loc 3 878 0
-	ldr	r3, .L1670+28
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1652
-	.loc 3 879 0
+	bne	.L1654
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1670+32
+	ldr	r2, .L1672+32
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1653
-	.loc 3 880 0
+	bne	.L1655
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1669:
-	.loc 3 883 0
+.L1671:
 	bl	ftl_memcpy
-.LVL1846:
-.L1653:
-	.loc 3 885 0
-	ldr	r3, .L1670+28
+.L1655:
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [r2, fp]
 	add	r1, r2, fp
 	adds	r2, r3, #1
-	bne	.L1654
-	.loc 3 886 0
-	ldr	r1, .L1670+36
-	.loc 3 887 0
+	bne	.L1656
+	ldr	r1, .L1672+36
 	str	r3, [sp, #4]
-	.loc 3 886 0
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.LVL1847:
-.L1655:
-	.loc 3 877 0 discriminator 2
+.L1657:
 	add	r10, r10, #1
-.LVL1848:
 	cmp	r5, r10
-	bne	.L1656
-	.loc 3 894 0
+	bne	.L1658
 	movs	r5, #0
-.LVL1849:
-	b	.L1641
-.LVL1850:
-.L1645:
-	.loc 3 846 0
+	b	.L1643
+.L1647:
 	mla	r0, r0, r4, r10
-.LVL1851:
-	.loc 3 847 0
 	cmp	r6, r0
-	bhi	.L1644
-	.loc 3 847 0 is_stmt 0 discriminator 1
+	bhi	.L1646
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1644
-	.loc 3 848 0 is_stmt 1
+	bls	.L1646
 	subs	r0, r0, r6
-.LVL1852:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.LVL1853:
-.L1644:
-	.loc 3 845 0 discriminator 2
+.L1646:
 	add	r10, r10, #1
-.LVL1854:
-	b	.L1643
-.LVL1855:
-.L1642:
-	.loc 3 851 0
-	ldr	r2, .L1670+28
+	b	.L1645
+.L1644:
+	ldr	r2, .L1672+28
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
 	str	r3, [r10, #4]
-	.loc 3 852 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1670+8
-	bne	.L1647
-	.loc 3 853 0
-	ldr	r2, .L1670+32
-	.loc 3 854 0
+	ldr	r3, .L1672+8
+	bne	.L1649
+	ldr	r2, .L1672+32
 	mov	r0, r6
 	ldrh	fp, [r3]
-	.loc 3 853 0
 	ldr	r2, [r2]
-	.loc 3 854 0
 	mov	r1, fp
-	.loc 3 853 0
 	str	r2, [r10, #8]
-	.loc 3 854 0
 	bl	__aeabi_uidivmod
-.LVL1856:
 	ldr	r2, [sp, #32]
-	.loc 3 855 0
 	sub	r3, fp, r1
-	.loc 3 854 0
 	str	r1, [sp, #24]
-.LVL1857:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-.LVL1858:
-	.loc 3 857 0
 	cmp	fp, r3
 	str	r3, [sp, #28]
-.LVL1859:
-	bne	.L1648
-	.loc 3 858 0
+	bne	.L1650
 	str	r8, [r10, #8]
-.LVL1860:
-.L1648:
-	.loc 3 867 0
-	ldr	r3, .L1670+40
-	ldr	r2, .L1670+44
-	.loc 3 868 0
+.L1650:
+	ldr	r3, .L1672+40
+	ldr	r2, .L1672+44
 	str	r4, [r10, #16]
-	.loc 3 867 0
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	muls	r3, r5, r3
-	.loc 3 869 0
 	adds	r5, r5, #1
-.LVL1861:
-	.loc 3 867 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1646
-.L1647:
-	.loc 3 859 0
+	b	.L1648
+.L1649:
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1649
-	.loc 3 860 0
-	ldr	r2, .L1670+48
-	.loc 3 861 0
+	bne	.L1651
+	ldr	r2, .L1672+48
 	ldr	r1, [sp, #12]
-	.loc 3 860 0
 	ldr	r2, [r2]
 	str	r2, [r10, #8]
-	.loc 3 861 0
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r7, r1, r3
-.LVL1862:
-	.loc 3 862 0
 	cmp	r2, r7
-	bne	.L1648
-.L1668:
-	.loc 3 865 0
+	bne	.L1650
+.L1670:
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1648
-.L1649:
+	b	.L1650
+.L1651:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1668
-.LVL1863:
-.L1652:
-	.loc 3 881 0
+	b	.L1670
+.L1654:
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1653
-	.loc 3 882 0
-	ldr	r3, .L1670+48
+	bne	.L1655
+	ldr	r3, .L1672+48
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1653
-	.loc 3 883 0
-	ldr	r2, .L1670+8
+	bne	.L1655
+	ldr	r2, .L1672+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1669
-.L1654:
-	.loc 3 889 0
+	b	.L1671
+.L1656:
 	cmp	r3, #256
-	bne	.L1655
-.LBB332:
-	.loc 3 890 0
+	bne	.L1657
 	ldr	r0, [r1, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1864:
-	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1865:
-	b	.L1655
-.LVL1866:
-.L1659:
-.LBE332:
-	.loc 3 831 0
+	b	.L1657
+.L1661:
 	mov	r3, #-1
-.LVL1867:
-.L1660:
+.L1662:
 	str	r3, [sp, #4]
-	b	.L1638
-.L1671:
+	b	.L1640
+.L1673:
 	.align	2
-.L1670:
+.L1672:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR12
@@ -19998,8 +12588,6 @@ FtlRead:
 	.word	.LANCHOR24
 	.word	.LANCHOR114
 	.word	.LANCHOR113
-	.cfi_endproc
-.LFE217:
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",%progbits
 	.align	1
@@ -20010,25 +12598,14 @@ FtlRead:
 	.fpu softvfp
 	.type	sftl_read, %function
 sftl_read:
-.LFB222:
-	.loc 3 1168 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1868:
-	.loc 3 1169 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1869:
 	mov	r1, r0
-.LVL1870:
 	movs	r0, #0
-.LVL1871:
 	b	FtlRead
-.LVL1872:
-	.cfi_endproc
-.LFE222:
 	.size	sftl_read, .-sftl_read
 	.section	.text.FtlWrite,"ax",%progbits
 	.align	1
@@ -20039,215 +12616,123 @@ sftl_read:
 	.fpu softvfp
 	.type	FtlWrite, %function
 FtlWrite:
-.LFB220:
-	.loc 3 958 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1873:
-	.loc 3 966 0
 	cmp	r0, #16
-	.loc 3 958 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	sub	sp, sp, #72
-	.cfi_def_cfa_offset 104
-	.loc 3 958 0
 	str	r1, [sp, #4]
 	str	r2, [sp, #20]
 	str	r3, [sp, #16]
-	.loc 3 966 0
-	bne	.L1674
-	.loc 3 967 0
+	bne	.L1676
 	mov	r2, r3
-.LVL1874:
 	ldr	r3, [sp, #4]
-.LVL1875:
 	ldr	r1, [sp, #20]
-.LVL1876:
 	add	r0, r3, #256
-.LVL1877:
 	bl	FtlVendorPartWrite
-.LVL1878:
-.L1673:
-	.loc 3 1117 0
+.L1675:
 	add	sp, sp, #72
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1879:
-.L1674:
-	.cfi_restore_state
-	.loc 3 970 0
+.L1676:
 	ldr	r3, [sp, #4]
-.LVL1880:
 	ldr	r2, [sp, #20]
-.LVL1881:
 	adds	r4, r3, r2
-	ldr	r3, .L1724
+	ldr	r3, .L1726
 	ldr	r3, [r3]
 	cmp	r4, r3
-	bhi	.L1710
-	.loc 3 970 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1724+4
+	bhi	.L1712
+	ldr	r3, .L1726+4
 	ldr	r0, [r3]
-.LVL1882:
 	adds	r5, r0, #1
-	beq	.L1673
-	.loc 3 973 0 is_stmt 1
-	ldr	r3, .L1724+8
+	beq	.L1675
+	ldr	r3, .L1726+8
 	mov	r2, #2048
-	.loc 3 974 0
 	ldr	r0, [sp, #4]
-	.loc 3 973 0
 	str	r2, [r3]
-	.loc 3 974 0
-	ldr	r3, .L1724+12
+	ldr	r3, .L1726+12
 	ldrh	r5, [r3]
 	mov	r1, r5
-.LVL1883:
 	bl	__aeabi_uidiv
-.LVL1884:
-	.loc 3 975 0
 	mov	r1, r5
-	.loc 3 974 0
 	str	r0, [sp, #12]
-.LVL1885:
-	.loc 3 975 0
 	subs	r0, r4, #1
-.LVL1886:
-	ldr	r5, .L1724+16
+	ldr	r5, .L1726+16
 	bl	__aeabi_uidiv
-.LVL1887:
-	.loc 3 976 0
 	ldr	r2, [sp, #12]
-	.loc 3 975 0
 	str	r0, [sp, #28]
-.LVL1888:
-	.loc 3 976 0
 	subs	r3, r0, r2
-	.loc 3 978 0
-	ldr	r2, .L1724+20
-	.loc 3 976 0
+	ldr	r2, .L1726+20
 	str	r3, [sp, #32]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
-.LVL1889:
-	.loc 3 978 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1890:
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1891:
-	.loc 3 984 0
-	ldr	r3, .L1724+24
+	ldr	r3, .L1726+24
 	ldr	r3, [r3]
-	cbz	r3, .L1676
-	.loc 3 984 0 is_stmt 0 discriminator 1
+	cbz	r3, .L1678
 	ldrh	r2, [r5, #4]
-	.loc 3 985 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1724+28
+	ldr	r3, .L1726+28
 	cmp	r2, #0
 	it	eq
 	moveq	r5, r3
-.L1676:
-	.loc 3 974 0
+.L1678:
 	ldr	r6, [sp, #12]
-.LVL1892:
-.L1677:
-	.loc 3 987 0
+.L1679:
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1706
-	.loc 3 1103 0
-	ldr	r4, .L1724+32
-	.loc 3 1101 0
+	cbnz	r3, .L1708
+	ldr	r4, .L1726+32
 	mov	r0, r3
 	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
-.LVL1893:
-	.loc 3 1103 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
-	bls	.L1707
-.LVL1894:
-.L1709:
-	.loc 3 1116 0
+	bls	.L1709
+.L1711:
 	movs	r0, #0
-	b	.L1673
-.LVL1895:
-.L1706:
-	.loc 3 988 0
-	ldr	r3, .L1724+36
-.LVL1896:
+	b	.L1675
+.L1708:
+	ldr	r3, .L1726+36
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1678
-	.loc 3 988 0 is_stmt 0 discriminator 1
+	bcc	.L1680
 	mov	r2, #988
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1897:
-.L1678:
-	.loc 3 989 0 is_stmt 1
+.L1680:
 	ldrh	r2, [r5, #4]
-	cbnz	r2, .L1679
-	.loc 3 992 0
-	ldr	r3, .L1724+16
-	ldr	r4, .L1724+24
+	cbnz	r2, .L1681
+	ldr	r3, .L1726+16
+	ldr	r4, .L1726+24
 	cmp	r5, r3
-	bne	.L1680
-	.loc 3 993 0
-	ldr	r0, .L1724+28
+	bne	.L1682
+	ldr	r0, .L1726+28
 	ldrh	r5, [r0, #4]
-.LVL1898:
-	cbnz	r5, .L1681
-	.loc 3 994 0
+	cbnz	r5, .L1683
 	bl	allocate_new_data_superblock
-.LVL1899:
-	.loc 3 995 0
 	str	r5, [r4]
-.L1681:
-	.loc 3 997 0
-	ldr	r0, .L1724+16
+.L1683:
+	ldr	r0, .L1726+16
 	bl	allocate_new_data_superblock
-.LVL1900:
-	.loc 3 999 0
-	ldr	r5, .L1724+16
-	.loc 3 998 0
+	ldr	r5, .L1726+16
 	ldr	r2, [r4]
-	.loc 3 999 0
-	ldr	r3, .L1724+28
+	ldr	r3, .L1726+28
 	cmp	r2, #0
 	it	ne
 	movne	r5, r3
-.L1682:
-.LVL1901:
-	.loc 3 1009 0
+.L1684:
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1679
-	.loc 3 1010 0
+	cbnz	r3, .L1681
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1902:
-.L1679:
-	.loc 3 1017 0
+.L1681:
 	ldrb	r2, [r5, #7]	@ zero_extendqisi2
-	.loc 3 1019 0
 	ldrh	r3, [r5, #4]
 	ldr	r1, [sp, #8]
-	.loc 3 1017 0
 	lsls	r2, r2, #2
 	cmp	r3, r1
 	it	cs
@@ -20255,230 +12740,148 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	.loc 3 1021 0
-	ldr	r3, .L1724+36
+	ldr	r3, .L1726+36
 	str	r2, [sp, #44]
-.LVL1903:
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
-.LVL1904:
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1683
-	.loc 3 1021 0 is_stmt 0 discriminator 1
+	bcc	.L1685
 	movw	r2, #1021
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1905:
-.L1683:
-	.loc 3 1030 0 is_stmt 1 discriminator 1
-	ldr	r8, .L1724+48
-	.loc 3 1044 0 discriminator 1
+.L1685:
+	ldr	r8, .L1726+48
 	mov	fp, #0
-.L1684:
-.LVL1906:
-	.loc 3 1022 0 discriminator 1
+.L1686:
 	ldr	r3, [sp, #44]
 	cmp	fp, r3
-	bne	.L1704
-.L1685:
-.LVL1907:
-	.loc 3 1097 0
-	ldr	r0, .L1724+48
+	bne	.L1706
+.L1687:
+	ldr	r0, .L1726+48
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
-.LVL1908:
-	.loc 3 1098 0
 	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bls	.L1705
-	.loc 3 1098 0 is_stmt 0 discriminator 1
+	bls	.L1707
 	movw	r2, #1098
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1909:
-.L1705:
-	.loc 3 1099 0 is_stmt 1
+.L1707:
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-.LVL1910:
-	b	.L1677
-.LVL1911:
-.L1680:
-	.loc 3 1003 0
+	b	.L1679
+.L1682:
 	str	r2, [r4]
-	.loc 3 1004 0
 	ldrh	r2, [r3, #4]
-	cbnz	r2, .L1715
-	.loc 3 1005 0
+	cbnz	r2, .L1717
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1912:
-	b	.L1682
-.L1715:
+	b	.L1684
+.L1717:
 	mov	r5, r3
-.LVL1913:
-	b	.L1679
-.LVL1914:
-.L1704:
-	.loc 3 1023 0
+	b	.L1681
+.L1706:
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1685
-	.loc 3 1027 0
+	beq	.L1687
 	movs	r2, #0
 	add	r1, sp, #48
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1915:
-	.loc 3 1028 0
 	mov	r0, r5
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1916:
-	.loc 3 1031 0
-	ldr	r3, .L1724+52
-	.loc 3 1030 0
+	ldr	r3, .L1726+52
 	ldr	r1, [r8]
-	.loc 3 1031 0
 	ldrh	r2, [r3]
-	.loc 3 1030 0
 	add	r1, r1, r7
 	str	r0, [r1, #4]
-	.loc 3 1032 0
 	str	r6, [r1, #16]
-	.loc 3 1031 0
 	mul	r0, r2, fp
-.LVL1917:
 	bic	r3, r0, #3
-	ldr	r0, .L1724+56
+	ldr	r0, .L1726+56
 	str	r3, [sp, #36]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #36]
 	str	r3, [sp, #40]
 	add	r10, r3, r0
-.LVL1918:
 	str	r10, [r1, #12]
-	.loc 3 1035 0
 	mov	r0, r10
 	movs	r1, #0
-.LVL1919:
 	bl	ftl_memset
-.LVL1920:
-	.loc 3 1037 0
 	ldr	r3, [sp, #12]
-	ldr	r2, .L1724+12
+	ldr	r2, .L1726+12
 	cmp	r6, r3
-	beq	.L1686
-	.loc 3 1037 0 is_stmt 0 discriminator 1
+	beq	.L1688
 	ldr	r3, [sp, #28]
 	cmp	r6, r3
-	bne	.L1719
-.LVL1921:
-	.loc 3 1045 0 is_stmt 1
+	bne	.L1721
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [sp, #20]
 	smulbb	r2, r2, r6
 	adds	r4, r3, r1
-	.loc 3 1044 0
 	movs	r3, #0
-	.loc 3 1045 0
 	subs	r4, r4, r2
-	.loc 3 1044 0
 	str	r3, [sp, #24]
-	.loc 3 1045 0
 	uxth	r4, r4
-.LVL1922:
-	b	.L1689
-.LVL1923:
-.L1686:
-	.loc 3 1039 0
+	b	.L1691
+.L1688:
 	ldrh	r4, [r2]
 	ldr	r0, [sp, #4]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1924:
 	ldr	r3, [sp, #20]
-	.loc 3 1040 0
 	subs	r4, r4, r1
-	.loc 3 1039 0
 	str	r1, [sp, #24]
-.LVL1925:
 	cmp	r4, r3
 	it	cs
 	movcs	r4, r3
-.LVL1926:
-.L1689:
-	.loc 3 1048 0
-	ldr	r2, .L1724+12
-	.loc 3 1049 0
+.L1691:
+	ldr	r2, .L1726+12
 	ldr	r3, [sp, #12]
-	.loc 3 1048 0
 	ldrh	r2, [r2]
 	cmp	r4, r2
-	.loc 3 1050 0
 	ldr	r2, [r8]
-	.loc 3 1048 0
-	bne	.L1690
-	.loc 3 1049 0
+	bne	.L1692
 	cmp	r6, r3
-	.loc 3 1050 0
 	add	r7, r7, r2
-	.loc 3 1052 0
 	ittet	ne
 	mulne	r4, r4, r6
-.LVL1927:
 	ldrne	r3, [sp, #4]
-	.loc 3 1050 0
 	ldreq	r3, [sp, #16]
-	.loc 3 1052 0
 	subne	r4, r4, r3
 	itett	ne
 	ldrne	r3, [sp, #16]
-	.loc 3 1050 0
 	streq	r3, [r7, #8]
-	.loc 3 1052 0
 	addne	r4, r3, r4, lsl #9
 	strne	r4, [r7, #8]
-.LVL1928:
-.L1692:
-	.loc 3 1089 0
-	ldr	r3, .L1724+36
+.L1694:
+	ldr	r3, .L1726+36
 	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1701
-	.loc 3 1089 0 is_stmt 0 discriminator 1
+	bcc	.L1703
 	movw	r2, #1089
-	ldr	r1, .L1724+40
-	ldr	r0, .L1724+44
+	ldr	r1, .L1726+40
+	ldr	r0, .L1726+44
 	bl	printf
-.LVL1929:
-.L1701:
-	.loc 3 1090 0 is_stmt 1
+.L1703:
 	ldr	r3, [sp, #40]
 	movw	r2, #61589
 	ldr	r1, [sp, #36]
-	.loc 3 1022 0
 	add	fp, fp, #1
-.LVL1930:
-	.loc 3 1090 0
 	strh	r2, [r3, r1]	@ movhi
-	.loc 3 1091 0
-	ldr	r1, .L1724+60
-	.loc 3 1092 0
+	ldr	r1, .L1726+60
 	str	r6, [r10, #8]
-	.loc 3 1095 0
 	adds	r6, r6, #1
-.LVL1931:
-	.loc 3 1091 0
 	ldr	r2, [r1]
 	str	r2, [r10, #4]
 	adds	r2, r2, #1
@@ -20486,16 +12889,14 @@ FtlWrite:
 	it	eq
 	moveq	r2, #0
 	str	r2, [r1]
-	.loc 3 1093 0
 	ldr	r2, [sp, #48]
 	str	r2, [r10, #12]
-	.loc 3 1094 0
 	ldrh	r2, [r5]
 	strh	r2, [r10, #2]	@ movhi
-	b	.L1684
-.L1725:
+	b	.L1686
+.L1727:
 	.align	2
-.L1724:
+.L1726:
 	.word	.LANCHOR34
 	.word	.LANCHOR86
 	.word	.LANCHOR176
@@ -20512,118 +12913,81 @@ FtlWrite:
 	.word	.LANCHOR24
 	.word	.LANCHOR114
 	.word	.LANCHOR71
-.LVL1932:
-.L1690:
-	.loc 3 1055 0
+.L1692:
 	cmp	r6, r3
-	.loc 3 1056 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1726
-	.loc 3 1058 0
-	ldrne	r1, .L1726+4
+	ldreq	r1, .L1728
+	ldrne	r1, .L1728+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
-	.loc 3 1060 0
 	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1695
-.LBB333:
-	.loc 3 1062 0
+	beq	.L1697
 	str	r2, [sp, #56]
-	.loc 3 1066 0
 	add	r0, sp, #52
-	.loc 3 1064 0
 	ldr	r2, [r8]
-	.loc 3 1063 0
 	str	r6, [sp, #68]
-	.loc 3 1064 0
 	add	r2, r2, r7
 	ldr	r1, [r2, #8]
-	.loc 3 1065 0
 	ldr	r2, [r2, #12]
-	.loc 3 1064 0
 	str	r1, [sp, #60]
-	.loc 3 1066 0
 	movs	r1, #1
-	.loc 3 1065 0
 	str	r2, [sp, #64]
-	.loc 3 1066 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1933:
-	.loc 3 1067 0
 	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1696
-	.loc 3 1068 0
-	ldr	r1, .L1726+8
+	bne	.L1698
+	ldr	r1, .L1728+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1699:
-.LBE333:
-	.loc 3 1080 0
+.L1701:
 	ldr	r3, [sp, #12]
 	lsls	r2, r4, #9
 	cmp	r6, r3
-	bne	.L1700
-	.loc 3 1081 0
+	bne	.L1702
 	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
 	add	r7, r7, r1
 	ldr	r1, [sp, #16]
 	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1722:
-	.loc 3 1083 0
+.L1724:
 	bl	ftl_memcpy
-.LVL1934:
-	b	.L1692
-.L1696:
-.LBB334:
-	.loc 3 1070 0
+	b	.L1694
+.L1698:
 	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1698
-	.loc 3 1071 0
-	ldr	r0, .L1726+8
+	beq	.L1700
+	ldr	r0, .L1728+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
-	.loc 3 1072 0
 	mov	r2, r6
-	ldr	r0, .L1726+12
+	ldr	r0, .L1728+12
 	bl	printf
-.LVL1935:
-.L1698:
-	.loc 3 1074 0
+.L1700:
 	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1699
-	.loc 3 1074 0 is_stmt 0 discriminator 1
+	beq	.L1701
 	movw	r2, #1074
-	ldr	r1, .L1726+16
-	ldr	r0, .L1726+20
+	ldr	r1, .L1728+16
+	ldr	r0, .L1728+20
 	bl	printf
-.LVL1936:
-	b	.L1699
-.LVL1937:
-.L1695:
-.LBE334:
-	.loc 3 1077 0 is_stmt 1
+	b	.L1701
+.L1697:
 	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1726+24
+	ldr	r2, .L1728+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1938:
-	b	.L1699
-.L1700:
-	.loc 3 1083 0
-	ldr	r1, .L1726+28
+	b	.L1701
+.L1702:
+	ldr	r1, .L1728+28
 	ldr	r3, [sp, #4]
 	ldr	r0, [r8]
 	ldrh	r1, [r1]
@@ -20633,10 +12997,8 @@ FtlWrite:
 	subs	r1, r1, r3
 	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1722
-.LVL1939:
-.L1719:
-	.loc 3 1087 0
+	b	.L1724
+.L1721:
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
 	ldr	r1, [r8]
@@ -20646,64 +13008,44 @@ FtlWrite:
 	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1692
-.LVL1940:
-.L1707:
-	.loc 3 1105 0
-	ldr	r5, .L1726+32
-.LVL1941:
-	ldr	r6, .L1726+36
-.LVL1942:
-.L1720:
+	b	.L1694
+.L1709:
+	ldr	r5, .L1728+32
+	ldr	r6, .L1728+36
+.L1722:
 	ldrh	r3, [r5]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1708
-	.loc 3 1105 0 is_stmt 0 discriminator 1
+	bne	.L1710
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	bne	.L1708
-	.loc 3 1106 0 is_stmt 1
+	bne	.L1710
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1943:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1944:
-.L1708:
-	.loc 3 1107 0
-	ldr	r2, .L1726+40
+.L1710:
+	ldr	r2, .L1728+40
 	movs	r3, #128
-	.loc 3 1109 0
 	movs	r1, #1
 	mov	r0, r1
-	.loc 3 1107 0
 	strh	r3, [r2]	@ movhi
-	.loc 3 1108 0
-	ldr	r2, .L1726+44
+	ldr	r2, .L1728+44
 	strh	r3, [r2]	@ movhi
-	.loc 3 1109 0
 	bl	rk_ftl_garbage_collect
-.LVL1945:
-	.loc 3 1110 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1946:
-	.loc 3 1111 0
 	ldrh	r3, [r4]
 	cmp	r3, #8
-	bls	.L1720
-	b	.L1709
-.LVL1947:
-.L1710:
-	.loc 3 971 0
+	bls	.L1722
+	b	.L1711
+.L1712:
 	mov	r0, #-1
-.LVL1948:
-	b	.L1673
-.L1727:
+	b	.L1675
+.L1729:
 	.align	2
-.L1726:
+.L1728:
 	.word	.LANCHOR115
 	.word	.LANCHOR113
 	.word	.LANCHOR81
@@ -20716,8 +13058,6 @@ FtlWrite:
 	.word	.LANCHOR99
 	.word	.LANCHOR83
 	.word	.LANCHOR82
-	.cfi_endproc
-.LFE220:
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",%progbits
 	.align	1
@@ -20728,25 +13068,14 @@ FtlWrite:
 	.fpu softvfp
 	.type	sftl_write, %function
 sftl_write:
-.LFB223:
-	.loc 3 1173 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1949:
-	.loc 3 1174 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1950:
 	mov	r1, r0
-.LVL1951:
 	movs	r0, #0
-.LVL1952:
 	b	FtlWrite
-.LVL1953:
-	.cfi_endproc
-.LFE223:
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -20757,116 +13086,67 @@ sftl_write:
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-.LFB277:
-	.loc 2 1409 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 2 1417 0
 	movs	r1, #0
-	.loc 2 1414 0
-	ldr	r8, .L1750+136
-	.loc 2 1417 0
-	ldr	r5, .L1750
-	.loc 2 1414 0
+	ldr	r8, .L1752+136
+	ldr	r5, .L1752
 	ldr	r3, [r8]
-	ldr	r4, .L1750+4
-	.loc 2 1415 0
-	ldr	r10, .L1750+140
-	.loc 2 1417 0
+	ldr	r4, .L1752+4
+	ldr	r10, .L1752+140
 	ldrh	r2, [r5]
-	ldr	r7, .L1750+8
-	.loc 2 1414 0
+	ldr	r7, .L1752+8
 	str	r3, [r4, #8]
-	.loc 2 1418 0
-	ldr	r6, .L1750+12
-	.loc 2 1415 0
+	ldr	r6, .L1752+12
 	ldr	r3, [r10]
-	.loc 2 1417 0
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
-	.loc 2 1415 0
 	str	r3, [r4, #12]
-	.loc 2 1417 0
 	bl	ftl_memset
-.LVL1954:
-	.loc 2 1418 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1730
-.L1738:
-	.loc 2 1419 0
+	bne	.L1732
+.L1740:
 	mov	r0, #-1
-.L1729:
-	.loc 2 1512 0
+.L1731:
 	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1730:
-	.cfi_restore_state
-	.loc 2 1421 0
+.L1732:
 	movs	r1, #1
-	.loc 2 1427 0
 	mov	fp, r4
-	.loc 2 1421 0
 	bl	FtlGetLastWrittenPage
-.LVL1955:
-	.loc 2 1430 0
-	ldr	r3, .L1750+16
-	.loc 2 1421 0
+	ldr	r3, .L1752+16
 	sxth	r7, r0
-.LVL1956:
-	.loc 2 1422 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1732:
-	.loc 2 1424 0
+.L1734:
 	cmp	r7, #0
-	bge	.L1735
-	.loc 2 1437 0
+	bge	.L1737
 	movw	r2, #1437
-	ldr	r1, .L1750+20
-	ldr	r0, .L1750+24
+	ldr	r1, .L1752+20
+	ldr	r0, .L1752+24
 	bl	printf
-.LVL1957:
-.L1734:
-	.loc 2 1439 0
-	ldr	r2, .L1750+28
+.L1736:
+	ldr	r2, .L1752+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1737
-	.loc 2 1439 0 is_stmt 0 discriminator 1
+	bcs	.L1739
 	movw	r2, #1439
-	ldr	r1, .L1750+20
-	ldr	r0, .L1750+24
+	ldr	r1, .L1752+20
+	ldr	r0, .L1752+24
 	bl	printf
-.LVL1958:
-.L1737:
-	.loc 2 1441 0 is_stmt 1
-	ldr	r7, .L1750+32
-.LVL1959:
+.L1739:
+	ldr	r7, .L1752+32
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1960:
-	.loc 2 1442 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
 	ldr	r3, [sp]
@@ -20874,8 +13154,6 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1961:
-	.loc 2 1443 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
 	mov	r4, r7
@@ -20885,269 +13163,178 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1750+36
+	ldr	r3, .L1752+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1962:
-	.loc 2 1445 0
 	ldr	r2, [r7]
-	ldr	r3, .L1750+16
+	ldr	r3, .L1752+16
 	cmp	r2, r3
-	bne	.L1738
-	.loc 2 1449 0
-	ldr	r3, .L1750+40
+	bne	.L1740
+	ldr	r3, .L1752+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	.loc 2 1448 0
 	ldrh	r5, [r7, #8]
-	.loc 2 1449 0
 	ldrh	r3, [r3]
-	.loc 2 1448 0
 	strh	r5, [r6, #6]	@ movhi
-	.loc 2 1449 0
 	cmp	r2, r3
-	bne	.L1738
-	.loc 2 1452 0
-	ldr	r3, .L1750+44
-	.loc 2 1453 0
-	ldr	r2, .L1750+48
-	.loc 2 1452 0
+	bne	.L1740
+	ldr	r3, .L1752+44
+	ldr	r2, .L1752+48
 	str	r5, [r3]
-	.loc 2 1453 0
-	ldr	r3, .L1750+52
+	ldr	r3, .L1752+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	.loc 2 1454 0
-	ldr	r2, .L1750+56
+	ldr	r2, .L1752+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1750+60
+	ldr	r2, .L1752+60
 	str	r3, [r2]
-	.loc 2 1455 0
-	ldr	r3, .L1750+64
+	ldr	r3, .L1752+64
 	ldr	r6, [r3]
-	ldr	r3, .L1750+68
+	ldr	r3, .L1752+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1750+72
+	ldr	r3, .L1752+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1963:
-	ldr	r3, .L1750+76
-	.loc 2 1461 0
+	ldr	r3, .L1752+76
 	cmp	r5, r6
-	.loc 2 1455 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1461 0
-	bls	.L1739
-	.loc 2 1461 0 is_stmt 0 discriminator 1
+	bls	.L1741
 	movw	r2, #1461
-	ldr	r1, .L1750+20
-	ldr	r0, .L1750+24
+	ldr	r1, .L1752+20
+	ldr	r0, .L1752+24
 	bl	printf
-.LVL1964:
-.L1739:
-	.loc 2 1464 0 is_stmt 1
+.L1741:
 	ldrh	r2, [r4, #16]
-	.loc 2 1463 0
-	ldr	r3, .L1750+80
+	ldr	r3, .L1752+80
 	ldrh	ip, [r4, #14]
-	.loc 2 1468 0
-	ldr	r7, .L1750+84
-	.loc 2 1464 0
+	ldr	r7, .L1752+84
 	lsrs	r1, r2, #6
-	.loc 2 1465 0
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
-	.loc 2 1466 0
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	.loc 2 1464 0
 	strh	r1, [r3, #2]	@ movhi
-	.loc 2 1473 0
-	ldr	r1, .L1750+88
-	.loc 2 1466 0
+	ldr	r1, .L1752+88
 	strb	r2, [r3, #8]
-	.loc 2 1473 0
 	ldrh	r2, [r4, #18]
-	.loc 2 1463 0
 	strh	ip, [r3]	@ movhi
-	.loc 2 1468 0
 	movw	r3, #65535
 	strh	r3, [r7]	@ movhi
-	.loc 2 1469 0
 	movs	r3, #0
-	.loc 2 1473 0
 	strh	r2, [r1]	@ movhi
-	.loc 2 1474 0
 	ldrh	r2, [r4, #20]
-	.loc 2 1469 0
 	strh	r3, [r7, #2]	@ movhi
-	.loc 2 1470 0
 	strb	r3, [r7, #6]
-	.loc 2 1471 0
 	strb	r3, [r7, #8]
-	.loc 2 1474 0
 	lsrs	r5, r2, #6
-	.loc 2 1475 0
 	and	r2, r2, #63
 	strb	r2, [r1, #6]
-	.loc 2 1476 0
 	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	.loc 2 1474 0
 	strh	r5, [r1, #2]	@ movhi
-	.loc 2 1478 0
 	ldrh	r5, [r4, #22]
-	.loc 2 1476 0
 	strb	r2, [r1, #8]
-	.loc 2 1478 0
-	ldr	r2, .L1750+92
+	ldr	r2, .L1752+92
 	strh	r5, [r2]	@ movhi
-	.loc 2 1479 0
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
-	.loc 2 1480 0
 	and	r5, r5, #63
 	strb	r5, [r2, #6]
-	.loc 2 1481 0
 	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	.loc 2 1479 0
 	strh	r6, [r2, #2]	@ movhi
-	.loc 2 1488 0
 	ldr	r6, [r4, #32]
-	.loc 2 1481 0
 	strb	r5, [r2, #8]
-	.loc 2 1483 0
-	ldr	r5, .L1750+96
+	ldr	r5, .L1752+96
 	str	r3, [r5]
-	.loc 2 1484 0
-	ldr	r5, .L1750+100
+	ldr	r5, .L1752+100
 	str	r3, [r5]
-	.loc 2 1485 0
-	ldr	r5, .L1750+104
+	ldr	r5, .L1752+104
 	str	r3, [r5]
-	.loc 2 1486 0
-	ldr	r5, .L1750+108
+	ldr	r5, .L1752+108
 	str	r3, [r5]
-	.loc 2 1488 0
-	ldr	r5, .L1750+112
+	ldr	r5, .L1752+112
 	str	r6, [r5]
 	mov	r6, r1
-	.loc 2 1489 0
-	ldr	r5, .L1750+116
+	ldr	r5, .L1752+116
 	str	r3, [r5]
-	.loc 2 1490 0
-	ldr	r5, .L1750+120
+	ldr	r5, .L1752+120
 	str	r3, [r5]
-	.loc 2 1491 0
-	ldr	r5, .L1750+124
-	.loc 2 1493 0
+	ldr	r5, .L1752+124
 	ldr	lr, [r4, #40]
-	.loc 2 1491 0
 	str	r3, [r5]
-	.loc 2 1493 0
-	ldr	r3, .L1750+128
+	ldr	r3, .L1752+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
-	.loc 2 1494 0
 	it	hi
 	strhi	lr, [r3]
-	.loc 2 1496 0
-	ldr	r3, .L1750+132
+	ldr	r3, .L1752+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
-	.loc 2 1497 0
 	it	hi
 	strhi	r2, [r3]
-	.loc 2 1499 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1742
-	.loc 2 1500 0
-	ldr	r0, .L1750+80
+	beq	.L1744
+	ldr	r0, .L1752+80
 	bl	make_superblock
-.LVL1965:
-.L1742:
-	.loc 2 1502 0
+.L1744:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1743
-	.loc 2 1503 0
-	ldr	r0, .L1750+88
+	beq	.L1745
+	ldr	r0, .L1752+88
 	bl	make_superblock
-.LVL1966:
-.L1743:
-	.loc 2 1505 0
+.L1745:
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1744
-	.loc 2 1506 0
-	ldr	r0, .L1750+92
+	beq	.L1746
+	ldr	r0, .L1752+92
 	bl	make_superblock
-.LVL1967:
-.L1744:
-	.loc 2 1508 0
+.L1746:
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1745
-	.loc 2 1509 0
-	ldr	r0, .L1750+84
+	beq	.L1747
+	ldr	r0, .L1752+84
 	bl	make_superblock
-.LVL1968:
-.L1745:
-	.loc 2 1511 0
+.L1747:
 	movs	r0, #0
-	b	.L1729
-.LVL1969:
-.L1735:
-	.loc 2 1425 0
+	b	.L1731
+.L1737:
 	ldrh	r2, [r6]
-	.loc 2 1427 0
 	mov	r0, fp
 	str	r3, [sp, #4]
-	.loc 2 1425 0
 	orr	r2, r7, r2, lsl #10
 	str	r2, [r4, #4]
-	.loc 2 1426 0
 	ldr	r2, [r8]
 	str	r2, [r4, #8]
-	.loc 2 1427 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1970:
-	.loc 2 1430 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1733
-	.loc 2 1431 0 discriminator 1
+	beq	.L1735
 	ldr	r2, [r8]
-	.loc 2 1430 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1733
-	.loc 2 1432 0
+	bne	.L1735
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
-	.loc 2 1431 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1734
-.L1733:
+	beq	.L1736
+.L1735:
 	subs	r7, r7, #1
-.LVL1971:
 	sxth	r7, r7
-.LVL1972:
-	b	.L1732
-.L1751:
+	b	.L1734
+.L1753:
 	.align	2
-.L1750:
+.L1752:
 	.word	.LANCHOR5
 	.word	.LANCHOR106
 	.word	.LANCHOR42
@@ -21184,8 +13371,6 @@ FtlLoadSysInfo:
 	.word	.LANCHOR71
 	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.cfi_endproc
-.LFE277:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -21196,241 +13381,134 @@ FtlLoadSysInfo:
 	.fpu softvfp
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
-.LFB295:
-	.loc 2 2356 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 2360 0
 	movs	r3, #0
-	ldr	r6, .L1767
+	ldr	r6, .L1769
 	strh	r3, [r6]	@ movhi
-	.loc 2 2362 0
-	ldr	r3, .L1767+4
+	ldr	r3, .L1769+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1973:
-	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1974:
-	.loc 2 2364 0
-	ldr	r3, .L1767+8
+	ldr	r3, .L1769+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1753
-.L1755:
-	.loc 2 2365 0
+	bne	.L1755
+.L1757:
 	mov	r7, #-1
-.L1752:
-	.loc 2 2451 0
+.L1754:
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1753:
-	.loc 2 2367 0
+.L1755:
 	bl	FtlLoadSysInfo
-.LVL1975:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1755
-	.loc 2 2370 0
+	bne	.L1757
 	bl	FtlLoadMapInfo
-.LVL1976:
-	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1977:
-	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1978:
-	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1979:
-	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1980:
-	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1981:
-	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1982:
-	.loc 2 2380 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1983:
-.LBB338:
-.LBB339:
-	.loc 2 2382 0
-	ldr	r3, .L1767+12
-	.loc 2 2383 0
+	ldr	r3, .L1769+12
 	movs	r0, #12
-	.loc 2 2382 0
 	ldrh	r1, [r3]
-	.loc 2 2383 0
-	ldr	r3, .L1767+16
+	ldr	r3, .L1769+16
 	ldr	r2, [r3]
-	.loc 2 2382 0
 	mov	r3, r7
-.L1756:
-.LVL1984:
+.L1758:
 	cmp	r3, r1
-	bge	.L1761
-	.loc 2 2383 0
+	bge	.L1763
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1757
-.L1761:
-	.loc 2 2386 0
-	ldr	r4, .L1767+20
-	.loc 2 2388 0
+	bge	.L1759
+.L1763:
+	ldr	r4, .L1769+20
 	cmp	r3, r1
-	ldr	r5, .L1767+24
-	.loc 2 2386 0
+	ldr	r5, .L1769+24
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
-	.loc 2 2388 0
-	bge	.L1765
-.LVL1985:
-.L1758:
-	.loc 2 2390 0
-	ldr	r6, .L1767+28
-	.loc 2 2389 0
-	ldr	r0, .L1767+24
+	bge	.L1767
+.L1760:
+	ldr	r6, .L1769+28
+	ldr	r0, .L1769+24
 	bl	FtlSuperblockPowerLostFix
-.LVL1986:
-	.loc 2 2390 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL1987:
-.LBB340:
-	.loc 2 2396 0
-	ldr	r3, .L1767+32
+	ldr	r3, .L1769+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	.loc 2 2397 0
-	ldr	r0, .L1767+36
-	.loc 2 2396 0
+	ldr	r0, .L1769+36
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2402 0
 	ldrh	ip, [r6]
-	.loc 2 2397 0
 	ldrh	r3, [r0]
-	.loc 2 2402 0
 	ldrh	lr, [r6, #4]
-	.loc 2 2397 0
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 2398 0
 	movs	r3, #0
 	strb	r3, [r5, #6]
-	.loc 2 2399 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL1988:
-	.loc 2 2402 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
-	.loc 2 2403 0
 	ldrh	r2, [r0]
-.LBE340:
-	.loc 2 2409 0
-	ldr	r0, .L1767+40
-.LBB341:
-	.loc 2 2404 0
+	ldr	r0, .L1769+40
 	strb	r3, [r6, #6]
-	.loc 2 2403 0
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 2405 0
 	strh	r3, [r6, #4]	@ movhi
-.LBE341:
-	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1989:
-	.loc 2 2410 0
-	ldr	r0, .L1767+44
+	ldr	r0, .L1769+44
 	bl	FtlMapBlkWriteDump_data
-.LVL1990:
-	.loc 2 2422 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
-	.loc 2 2423 0
 	bl	l2p_flush
-.LVL1991:
-	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL1992:
-.L1766:
-	.loc 2 2428 0
+.L1768:
 	bl	FtlVpcTblFlush
-.LVL1993:
-	.loc 2 2432 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1764
+	beq	.L1766
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1764
-	.loc 2 2434 0
-	ldr	r5, .L1767+28
-	.loc 2 2433 0
+	cbnz	r3, .L1766
+	ldr	r5, .L1769+28
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1764
-	.loc 2 2435 0
+	cbnz	r3, .L1766
 	bl	FtlGcRefreshBlock
-.LVL1994:
-	.loc 2 2436 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL1995:
-	.loc 2 2437 0
-	ldr	r0, .L1767+24
+	ldr	r0, .L1769+24
 	bl	allocate_new_data_superblock
-.LVL1996:
-	.loc 2 2438 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1997:
-.L1764:
-	.loc 2 2443 0
+.L1766:
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1752
-	.loc 2 2444 0
+	bne	.L1754
 	bl	FtlVpcCheckAndModify
-.LVL1998:
-	b	.L1752
-.LVL1999:
-.L1757:
-	.loc 2 2382 0
+	b	.L1754
+.L1759:
 	adds	r3, r3, #1
-.LVL2000:
-	b	.L1756
-.L1765:
-	.loc 2 2388 0
+	b	.L1758
+.L1767:
 	ldrh	r3, [r6]
-.LVL2001:
 	cmp	r3, #0
-	bne	.L1758
-	.loc 2 2427 0
+	bne	.L1760
 	bl	l2p_flush
-.LVL2002:
-	b	.L1766
-.L1768:
+	b	.L1768
+.L1770:
 	.align	2
-.L1767:
+.L1769:
 	.word	.LANCHOR161
 	.word	.LANCHOR4
 	.word	.LANCHOR79
@@ -21443,10 +13521,6 @@ FtlSysBlkInit:
 	.word	.LANCHOR19
 	.word	.LANCHOR144
 	.word	.LANCHOR149
-.LBE339:
-.LBE338:
-	.cfi_endproc
-.LFE295:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",%progbits
 	.align	1
@@ -21457,464 +13531,278 @@ FtlSysBlkInit:
 	.fpu softvfp
 	.type	ftl_low_format, %function
 ftl_low_format:
-.LFB213:
-	.loc 3 623 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 629 0
 	movs	r3, #0
-	.loc 3 631 0
-	ldr	r6, .L1793
-	.loc 3 630 0
-	ldr	r2, .L1793+4
-	.loc 3 629 0
-	ldr	r5, .L1793+8
-	.loc 3 631 0
+	ldr	r6, .L1795
+	ldr	r2, .L1795+4
+	ldr	r5, .L1795+8
 	ldrh	r0, [r6]
-	.loc 3 630 0
 	str	r3, [r2]
-	.loc 3 629 0
 	str	r3, [r5]
-	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2003:
-	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2004:
-	cbz	r0, .L1770
-	.loc 3 633 0
+	cbz	r0, .L1772
 	bl	FtlMakeBbt
-.LVL2005:
-.L1770:
-	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1793+12
-	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1793+16
-	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1793+100
-	.loc 3 635 0 discriminator 1
+.L1772:
+	ldr	r3, .L1795+12
+	ldr	r2, .L1795+16
+	ldr	ip, .L1795+100
 	ldrh	r1, [r3]
-	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
-	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1793+20
+	ldr	r2, .L1795+20
 	str	r3, [sp, #4]
-	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
-	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1771:
-.LVL2006:
-	.loc 3 635 0 discriminator 1
+.L1773:
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2007:
 	cmp	r3, r1
-	blt	.L1772
-.LVL2008:
-	.loc 3 642 0
-	ldr	r3, .L1793+24
-.LVL2009:
-	.loc 3 641 0
+	blt	.L1774
+	ldr	r3, .L1795+24
 	movs	r7, #0
-	.loc 3 642 0
-	ldr	r10, .L1793+104
+	ldr	r10, .L1795+104
 	ldrh	r4, [r3]
-.LVL2010:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2011:
-.L1773:
-	.loc 3 642 0 is_stmt 0 discriminator 1
+.L1775:
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1774
-	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1793+28
-.LVL2012:
+	bhi	.L1776
+	ldr	r4, .L1795+28
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1775
-.LVL2013:
-.L1779:
-	.loc 3 641 0
+	bgt	.L1777
+.L1781:
 	movs	r6, #0
 	mov	r7, r6
-.L1776:
-	.loc 3 656 0 discriminator 1
+.L1778:
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2014:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1780
-	.loc 3 658 0
+	bhi	.L1782
 	ldrh	r2, [fp]
-	ldr	r3, .L1793+32
-	.loc 3 661 0
+	ldr	r3, .L1795+32
 	ldrh	r4, [r4]
-	ldr	r6, .L1793+36
-	.loc 3 658 0
+	ldr	r6, .L1795+36
 	str	r2, [r3]
-	.loc 3 661 0
-	ldr	r3, .L1793+40
+	ldr	r3, .L1795+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2015:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2016:
-	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
-	.loc 3 661 0
 	mov	r3, r0
 	str	r0, [r6]
-	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1793+44
+	ldr	r0, .L1795+44
 	strh	r1, [r0]	@ movhi
-	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1781
-	.loc 3 664 0
+	ble	.L1783
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2017:
-	.loc 3 665 0
 	ldr	r3, [sp]
-	.loc 3 664 0
 	str	r0, [r6]
-	.loc 3 665 0
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1781:
-	.loc 3 668 0
-	ldr	r2, .L1793+48
+.L1783:
+	ldr	r2, .L1795+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1783
-	.loc 3 669 0
-	ldr	r1, .L1793+44
+	cbz	r2, .L1785
+	ldr	r1, .L1795+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
-	.loc 3 670 0
 	mul	r0, r4, r2
 	cmp	r7, r0
-	.loc 3 672 0
 	itttt	lt
 	addlt	r2, r2, #32
-	.loc 3 671 0
 	strlt	r3, [r6]
-	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1783:
-	.loc 3 677 0
+.L1785:
 	ldr	r3, [sp]
-	ldr	r7, .L1793+52
-.LVL2018:
-	.loc 3 687 0
-	ldr	r10, .L1793+108
-	.loc 3 677 0
+	ldr	r7, .L1795+52
+	ldr	r10, .L1795+108
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	.loc 3 678 0
-	ldr	r3, .L1793+56
+	ldr	r3, .L1795+56
 	ldrh	r3, [r3]
-	.loc 3 677 0
 	str	r4, [r7]
-	.loc 3 678 0
 	muls	r4, r3, r4
-	.loc 3 679 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3]
-	.loc 3 678 0
 	str	r4, [r6]
-	.loc 3 694 0
-	ldr	r6, .L1793+60
-	.loc 3 679 0
+	ldr	r6, .L1795+60
 	muls	r4, r3, r4
-	ldr	r3, .L1793+64
+	ldr	r3, .L1795+64
 	str	r4, [r3]
-	.loc 3 689 0
 	movw	r4, #65535
-	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2019:
-	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2020:
-	.loc 3 688 0
-	ldr	r2, .L1793+68
+	ldr	r2, .L1795+68
 	movs	r3, #0
-	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 3 698 0
 	movs	r1, #255
-	.loc 3 695 0
 	strb	r3, [r6, #6]
-	.loc 3 688 0
 	str	r3, [r2]
-	.loc 3 689 0
-	ldr	r2, .L1793+72
-	.loc 3 696 0
+	ldr	r2, .L1795+72
 	strh	r3, [r6]	@ movhi
-	.loc 3 690 0
 	strh	r3, [r2, #2]	@ movhi
-	.loc 3 691 0
 	strb	r3, [r2, #6]
-	.loc 3 692 0
 	strb	r3, [r2, #8]
-	.loc 3 697 0
 	movs	r3, #1
-	.loc 3 689 0
 	strh	r4, [r2]	@ movhi
-	.loc 3 698 0
 	ldrh	r2, [r8]
 	mov	r8, r10
-	.loc 3 697 0
 	strb	r3, [r6, #8]
-	.loc 3 701 0
 	mov	r10, r6
-	.loc 3 698 0
-	ldr	r3, .L1793+76
+	ldr	r3, .L1795+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2021:
-.L1785:
-	.loc 3 701 0
+.L1787:
 	mov	r0, r10
 	bl	make_superblock
-.LVL2022:
-	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1786
-	.loc 3 705 0
+	bne	.L1788
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
-	.loc 3 706 0
 	ldrh	r3, [r6]
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
-	.loc 3 707 0
-	b	.L1785
-.LVL2023:
-.L1772:
-	.loc 3 636 0 discriminator 3
+	b	.L1787
+.L1774:
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
-	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2024:
-	b	.L1771
-.LVL2025:
-.L1774:
-	.loc 3 643 0 discriminator 3
+	b	.L1773
+.L1776:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2026:
-	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2027:
-	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2028:
 	uxth	r7, r7
-.LVL2029:
-	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2030:
-	b	.L1773
-.LVL2031:
-.L1775:
-	.loc 3 647 0
+	b	.L1775
+.L1777:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2032:
-	ldr	r3, .L1793+80
+	ldr	r3, .L1795+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2033:
-	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2034:
-	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2035:
-.L1777:
-	.loc 3 650 0 is_stmt 0 discriminator 1
+.L1779:
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1779
-	.loc 3 651 0 is_stmt 1 discriminator 3
+	bls	.L1781
 	mov	r0, r6
 	movs	r1, #1
-	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2036:
-	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2037:
-	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2038:
-	b	.L1777
-.LVL2039:
-.L1780:
-	.loc 3 657 0 discriminator 3
+	b	.L1779
+.L1782:
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2040:
 	add	r7, r7, r0
-.LVL2041:
 	uxth	r7, r7
-.LVL2042:
-	b	.L1776
-.LVL2043:
-.L1786:
-	.loc 3 709 0
+	b	.L1778
+.L1788:
 	ldr	r3, [r5]
-	.loc 3 710 0
 	ldrh	r1, [r6, #4]
-	.loc 3 712 0
-	ldr	r4, .L1793+84
-	.loc 3 709 0
+	ldr	r4, .L1795+84
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
-	.loc 3 710 0
 	ldr	r3, [r8]
-	.loc 3 717 0
 	mov	r10, r4
-	.loc 3 710 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 3 712 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 3 713 0
 	strb	r3, [r4, #6]
-	.loc 3 714 0
 	ldrh	r3, [r6]
-	.loc 3 721 0
 	movw	r6, #65535
-	.loc 3 714 0
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1787:
-	.loc 3 717 0
+.L1789:
 	mov	r0, r10
 	bl	make_superblock
-.LVL2044:
-	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1788
-	.loc 3 721 0
+	cbnz	r3, .L1790
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
-	.loc 3 722 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	.loc 3 723 0
-	b	.L1787
-.L1788:
-	.loc 3 725 0
+	b	.L1789
+.L1790:
 	ldr	r3, [r5]
-	.loc 3 726 0
 	ldrh	r1, [r4, #4]
-	.loc 3 725 0
 	str	r3, [r4, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
-	.loc 3 727 0
 	movw	r4, #65535
-	.loc 3 726 0
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 3 727 0
-	ldr	r3, .L1793+88
+	ldr	r3, .L1795+88
 	strh	r4, [r3]	@ movhi
-	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2045:
-	ldr	r3, .L1793+92
-	.loc 3 731 0
+	ldr	r3, .L1795+92
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	.loc 3 733 0
 	ldr	r2, [r7]
-	.loc 3 730 0
 	strh	r0, [r3]	@ movhi
-	.loc 3 732 0
 	strh	r4, [r3, #4]	@ movhi
-	.loc 3 733 0
 	strh	r2, [r3, #6]	@ movhi
-	.loc 3 734 0
 	ldr	r2, [r5]
 	str	r2, [r3, #8]
 	adds	r2, r2, #1
 	str	r2, [r5]
-	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2046:
-	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2047:
-	cbnz	r0, .L1789
-	.loc 3 737 0
-	ldr	r3, .L1793+96
+	cbnz	r0, .L1791
+	ldr	r3, .L1795+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1789:
-	.loc 3 739 0
+.L1791:
 	movs	r0, #0
 	add	sp, sp, #16
-	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1794:
+.L1796:
 	.align	2
-.L1793:
+.L1795:
 	.word	.LANCHOR4
 	.word	.LANCHOR71
 	.word	.LANCHOR70
@@ -21943,8 +13831,6 @@ ftl_low_format:
 	.word	168778952
 	.word	.LANCHOR6
 	.word	.LANCHOR42
-	.cfi_endproc
-.LFE213:
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.sftl_init,"ax",%progbits
 	.align	1
@@ -21955,89 +13841,51 @@ ftl_low_format:
 	.fpu softvfp
 	.type	sftl_init, %function
 sftl_init:
-.LFB214:
-	.loc 3 743 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2048:
 	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
-	.cfi_offset 14, -4
-	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1801
-	.loc 3 749 0
-	ldr	r1, .L1801+4
-	ldr	r0, .L1801+8
-	.loc 3 746 0
+	ldr	r4, .L1803
+	ldr	r1, .L1803+4
+	ldr	r0, .L1803+8
 	str	r3, [r4]
-	.loc 3 749 0
 	bl	printf
-.LVL2049:
-	.loc 3 750 0
-	ldr	r0, .L1801+12
+	ldr	r0, .L1803+12
 	bl	FtlConstantsInit
-.LVL2050:
-	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2051:
-	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2052:
-	.loc 3 753 0
-	ldr	r3, .L1801+16
+	ldr	r3, .L1803+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2053:
-.LDL2:
-	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2054:
-	cbnz	r0, .L1799
-	.loc 3 767 0
+	cbnz	r0, .L1801
 	bl	FtlSysBlkInit
-.LVL2055:
-	cbnz	r0, .L1799
-	.loc 3 779 0
+	cbnz	r0, .L1801
 	movs	r3, #1
 	str	r3, [r4]
-	.loc 3 783 0
-	ldr	r3, .L1801+20
+	ldr	r3, .L1803+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1799
+	bhi	.L1801
 	movw	r4, #8129
-.L1798:
-.LVL2056:
-.LBB342:
-	.loc 3 786 0 discriminator 3
+.L1800:
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2057:
-	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2058:
-	bne	.L1798
-.LVL2059:
-.L1799:
-.LBE342:
-	.loc 3 794 0
+	bne	.L1800
+.L1801:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1802:
+.L1804:
 	.align	2
-.L1801:
+.L1803:
 	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
 	.word	.LANCHOR0
 	.word	.LANCHOR4
 	.word	.LANCHOR48
-	.cfi_endproc
-.LFE214:
 	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -22048,18 +13896,10 @@ sftl_init:
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB351:
-	.loc 1 252 0
-	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2060:
-	.loc 1 253 0
 	b	memcmp
-.LVL2061:
-	.cfi_endproc
-.LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -23463,209 +15303,209 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-	.section	.rodata.__func__.10046,"a",%progbits
+	.section	.rodata.__func__.10051,"a",%progbits
 	.set	.LANCHOR175,. + 0
-	.type	__func__.10046, %object
-	.size	__func__.10046, 23
-__func__.10046:
+	.type	__func__.10051, %object
+	.size	__func__.10051, 23
+__func__.10051:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10310,"a",%progbits
+	.section	.rodata.__func__.10318,"a",%progbits
 	.set	.LANCHOR104,. + 0
-	.type	__func__.10310, %object
-	.size	__func__.10310, 15
-__func__.10310:
+	.type	__func__.10318, %object
+	.size	__func__.10318, 15
+__func__.10318:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10327,"a",%progbits
+	.section	.rodata.__func__.10335,"a",%progbits
 	.set	.LANCHOR109,. + 0
-	.type	__func__.10327, %object
-	.size	__func__.10327, 15
-__func__.10327:
+	.type	__func__.10335, %object
+	.size	__func__.10335, 15
+__func__.10335:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8802,"a",%progbits
+	.section	.rodata.__func__.8797,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8802, %object
-	.size	__func__.8802, 11
-__func__.8802:
+	.type	__func__.8797, %object
+	.size	__func__.8797, 11
+__func__.8797:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8926,"a",%progbits
+	.section	.rodata.__func__.8921,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.8926, %object
-	.size	__func__.8926, 13
-__func__.8926:
+	.type	__func__.8921, %object
+	.size	__func__.8921, 13
+__func__.8921:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8954,"a",%progbits
+	.section	.rodata.__func__.8949,"a",%progbits
 	.set	.LANCHOR178,. + 0
-	.type	__func__.8954, %object
-	.size	__func__.8954, 9
-__func__.8954:
+	.type	__func__.8949, %object
+	.size	__func__.8949, 9
+__func__.8949:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9018,"a",%progbits
+	.section	.rodata.__func__.9023,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9018, %object
-	.size	__func__.9018, 14
-__func__.9018:
+	.type	__func__.9023, %object
+	.size	__func__.9023, 14
+__func__.9023:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9061,"a",%progbits
+	.section	.rodata.__func__.9066,"a",%progbits
 	.set	.LANCHOR164,. + 0
-	.type	__func__.9061, %object
-	.size	__func__.9061, 11
-__func__.9061:
+	.type	__func__.9066, %object
+	.size	__func__.9066, 11
+__func__.9066:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9178,"a",%progbits
-	.set	.LANCHOR49,. + 0
-	.type	__func__.9178, %object
-	.size	__func__.9178, 17
-__func__.9178:
-	.ascii	"INSERT_FREE_LIST\000"
 	.section	.rodata.__func__.9183,"a",%progbits
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	__func__.9183, %object
 	.size	__func__.9183, 17
 __func__.9183:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.9188,"a",%progbits
+	.set	.LANCHOR46,. + 0
+	.type	__func__.9188, %object
+	.size	__func__.9188, 17
+__func__.9188:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9214,"a",%progbits
+	.section	.rodata.__func__.9219,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9214, %object
-	.size	__func__.9214, 17
-__func__.9214:
+	.type	__func__.9219, %object
+	.size	__func__.9219, 17
+__func__.9219:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9246,"a",%progbits
+	.section	.rodata.__func__.9251,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9246, %object
-	.size	__func__.9246, 22
-__func__.9246:
+	.type	__func__.9251, %object
+	.size	__func__.9251, 22
+__func__.9251:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9255,"a",%progbits
+	.section	.rodata.__func__.9260,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9255, %object
-	.size	__func__.9255, 16
-__func__.9255:
+	.type	__func__.9260, %object
+	.size	__func__.9260, 16
+__func__.9260:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9288,"a",%progbits
+	.section	.rodata.__func__.9293,"a",%progbits
 	.set	.LANCHOR116,. + 0
-	.type	__func__.9288, %object
-	.size	__func__.9288, 26
-__func__.9288:
+	.type	__func__.9293, %object
+	.size	__func__.9293, 26
+__func__.9293:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9299,"a",%progbits
+	.section	.rodata.__func__.9304,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9299, %object
-	.size	__func__.9299, 15
-__func__.9299:
+	.type	__func__.9304, %object
+	.size	__func__.9304, 15
+__func__.9304:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9313,"a",%progbits
+	.section	.rodata.__func__.9318,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9313, %object
-	.size	__func__.9313, 31
-__func__.9313:
+	.type	__func__.9318, %object
+	.size	__func__.9318, 31
+__func__.9318:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9327,"a",%progbits
+	.section	.rodata.__func__.9332,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.9327, %object
-	.size	__func__.9327, 16
-__func__.9327:
+	.type	__func__.9332, %object
+	.size	__func__.9332, 16
+__func__.9332:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9352,"a",%progbits
+	.section	.rodata.__func__.9357,"a",%progbits
 	.set	.LANCHOR57,. + 0
-	.type	__func__.9352, %object
-	.size	__func__.9352, 22
-__func__.9352:
+	.type	__func__.9357, %object
+	.size	__func__.9357, 22
+__func__.9357:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9369,"a",%progbits
+	.section	.rodata.__func__.9374,"a",%progbits
 	.set	.LANCHOR145,. + 0
-	.type	__func__.9369, %object
-	.size	__func__.9369, 9
-__func__.9369:
+	.type	__func__.9374, %object
+	.size	__func__.9374, 9
+__func__.9374:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9442,"a",%progbits
+	.section	.rodata.__func__.9447,"a",%progbits
 	.set	.LANCHOR166,. + 0
-	.type	__func__.9442, %object
-	.size	__func__.9442, 15
-__func__.9442:
+	.type	__func__.9447, %object
+	.size	__func__.9447, 15
+__func__.9447:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9464,"a",%progbits
+	.section	.rodata.__func__.9469,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9464, %object
-	.size	__func__.9464, 14
-__func__.9464:
+	.type	__func__.9469, %object
+	.size	__func__.9469, 14
+__func__.9469:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9521,"a",%progbits
+	.section	.rodata.__func__.9526,"a",%progbits
 	.set	.LANCHOR179,. + 0
-	.type	__func__.9521, %object
-	.size	__func__.9521, 15
-__func__.9521:
+	.type	__func__.9526, %object
+	.size	__func__.9526, 15
+__func__.9526:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9584,"a",%progbits
+	.section	.rodata.__func__.9589,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9584, %object
-	.size	__func__.9584, 16
-__func__.9584:
+	.type	__func__.9589, %object
+	.size	__func__.9589, 16
+__func__.9589:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9618,"a",%progbits
+	.section	.rodata.__func__.9623,"a",%progbits
 	.set	.LANCHOR160,. + 0
-	.type	__func__.9618, %object
-	.size	__func__.9618, 22
-__func__.9618:
+	.type	__func__.9623, %object
+	.size	__func__.9623, 22
+__func__.9623:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9675,"a",%progbits
+	.section	.rodata.__func__.9680,"a",%progbits
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9675, %object
-	.size	__func__.9675, 16
-__func__.9675:
+	.type	__func__.9680, %object
+	.size	__func__.9680, 16
+__func__.9680:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9696,"a",%progbits
+	.section	.rodata.__func__.9701,"a",%progbits
 	.set	.LANCHOR154,. + 0
-	.type	__func__.9696, %object
-	.size	__func__.9696, 18
-__func__.9696:
+	.type	__func__.9701, %object
+	.size	__func__.9701, 18
+__func__.9701:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9721,"a",%progbits
+	.section	.rodata.__func__.9726,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9721, %object
-	.size	__func__.9721, 21
-__func__.9721:
+	.type	__func__.9726, %object
+	.size	__func__.9726, 21
+__func__.9726:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9737,"a",%progbits
+	.section	.rodata.__func__.9742,"a",%progbits
 	.set	.LANCHOR155,. + 0
-	.type	__func__.9737, %object
-	.size	__func__.9737, 14
-__func__.9737:
+	.type	__func__.9742, %object
+	.size	__func__.9742, 14
+__func__.9742:
 	.ascii	"ftl_check_vpc\000"
-	.section	.rodata.__func__.9822,"a",%progbits
+	.section	.rodata.__func__.9827,"a",%progbits
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9822, %object
-	.size	__func__.9822, 25
-__func__.9822:
+	.type	__func__.9827, %object
+	.size	__func__.9827, 25
+__func__.9827:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.9843,"a",%progbits
+	.section	.rodata.__func__.9848,"a",%progbits
 	.set	.LANCHOR169,. + 0
-	.type	__func__.9843, %object
-	.size	__func__.9843, 29
-__func__.9843:
+	.type	__func__.9848, %object
+	.size	__func__.9848, 29
+__func__.9848:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.9850,"a",%progbits
+	.section	.rodata.__func__.9855,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.9850, %object
-	.size	__func__.9850, 19
-__func__.9850:
+	.type	__func__.9855, %object
+	.size	__func__.9855, 19
+__func__.9855:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.9863,"a",%progbits
+	.section	.rodata.__func__.9868,"a",%progbits
 	.set	.LANCHOR158,. + 0
-	.type	__func__.9863, %object
-	.size	__func__.9863, 16
-__func__.9863:
+	.type	__func__.9868, %object
+	.size	__func__.9868, 16
+__func__.9868:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.9870,"a",%progbits
+	.section	.rodata.__func__.9875,"a",%progbits
 	.set	.LANCHOR159,. + 0
-	.type	__func__.9870, %object
-	.size	__func__.9870, 20
-__func__.9870:
+	.type	__func__.9875, %object
+	.size	__func__.9875, 20
+__func__.9875:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.9940,"a",%progbits
+	.section	.rodata.__func__.9945,"a",%progbits
 	.set	.LANCHOR171,. + 0
-	.type	__func__.9940, %object
-	.size	__func__.9940, 19
-__func__.9940:
+	.type	__func__.9945, %object
+	.size	__func__.9945, 19
+__func__.9945:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC101:
@@ -23712,31985 +15552,4 @@ __func__.9940:
 	.ascii	"SFTL version: 5.0.44 20180713\000"
 .LC71:
 	.ascii	"%s\012\000"
-	.text
-.Letext0:
-	.file 7 "include/common.h"
-	.file 8 "./arch/arm/include/asm/types.h"
-	.file 9 "include/linux/types.h"
-	.file 10 "include/errno.h"
-	.file 11 "include/linux/string.h"
-	.file 12 "include/efi.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/part.h"
-	.file 15 "include/flash.h"
-	.file 16 "include/lmb.h"
-	.file 17 "include/asm-generic/u-boot.h"
-	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 19 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 20 "include/libfdt_env.h"
-	.file 21 "include/image.h"
-	.file 22 "include/net.h"
-	.file 23 "include/dm/uclass-id.h"
-	.file 24 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 25 "drivers/rkflash/rksftl/flash_com.h"
-	.file 26 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 27 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 28 "include/malloc.h"
-	.file 29 "include/stdio.h"
-	.file 30 "include/vsprintf.h"
-	.file 31 "include/log.h"
-	.section	.debug_info,"",%progbits
-.Ldebug_info0:
-	.4byte	0x92df
-	.2byte	0x4
-	.4byte	.Ldebug_abbrev0
-	.byte	0x4
-	.uleb128 0x1
-	.4byte	.LASF880
-	.byte	0xc
-	.4byte	.LASF881
-	.4byte	.LASF882
-	.4byte	.Ldebug_ranges0+0x208
-	.4byte	0
-	.4byte	.Ldebug_line0
-	.uleb128 0x2
-	.byte	0x2
-	.byte	0x7
-	.4byte	.LASF0
-	.uleb128 0x3
-	.4byte	.LASF4
-	.byte	0x7
-	.byte	0xd
-	.4byte	0x37
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF1
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF2
-	.uleb128 0x4
-	.4byte	.LASF20
-	.byte	0xa
-	.byte	0xc
-	.4byte	0x50
-	.uleb128 0x5
-	.byte	0x4
-	.byte	0x5
-	.ascii	"int\000"
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x6
-	.4byte	.LASF3
-	.uleb128 0x3
-	.4byte	.LASF5
-	.byte	0x8
-	.byte	0xc
-	.4byte	0x37
-	.uleb128 0x2
-	.byte	0x2
-	.byte	0x5
-	.4byte	.LASF6
-	.uleb128 0x3
-	.4byte	.LASF7
-	.byte	0x8
-	.byte	0x12
-	.4byte	0x7b
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF8
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x5
-	.4byte	.LASF9
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x7
-	.4byte	.LASF10
-	.uleb128 0x6
-	.ascii	"u8\000"
-	.byte	0x8
-	.byte	0x1f
-	.4byte	0x37
-	.uleb128 0x7
-	.4byte	0x90
-	.uleb128 0x6
-	.ascii	"u16\000"
-	.byte	0x8
-	.byte	0x22
-	.4byte	0x25
-	.uleb128 0x6
-	.ascii	"s32\000"
-	.byte	0x8
-	.byte	0x24
-	.4byte	0x50
-	.uleb128 0x6
-	.ascii	"u32\000"
-	.byte	0x8
-	.byte	0x25
-	.4byte	0x7b
-	.uleb128 0x3
-	.4byte	.LASF11
-	.byte	0x8
-	.byte	0x35
-	.4byte	0x3e
-	.uleb128 0x3
-	.4byte	.LASF12
-	.byte	0x8
-	.byte	0x36
-	.4byte	0x3e
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x7
-	.4byte	.LASF13
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xea
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x8
-	.4byte	.LASF14
-	.uleb128 0x7
-	.4byte	0xe3
-	.uleb128 0x2
-	.byte	0x4
-	.byte	0x5
-	.4byte	.LASF15
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xe3
-	.uleb128 0x3
-	.4byte	.LASF16
-	.byte	0x9
-	.byte	0x59
-	.4byte	0x25
-	.uleb128 0x3
-	.4byte	.LASF17
-	.byte	0x9
-	.byte	0x5b
-	.4byte	0x3e
-	.uleb128 0x3
-	.4byte	.LASF18
-	.byte	0x9
-	.byte	0x69
-	.4byte	0x5e
-	.uleb128 0x3
-	.4byte	.LASF19
-	.byte	0x9
-	.byte	0x97
-	.4byte	0x70
-	.uleb128 0x9
-	.byte	0x4
-	.uleb128 0x4
-	.4byte	.LASF21
-	.byte	0xb
-	.byte	0xb
-	.4byte	0xf6
-	.uleb128 0x2
-	.byte	0x1
-	.byte	0x2
-	.4byte	.LASF22
-	.uleb128 0xa
-	.4byte	0xe3
-	.4byte	0x147
-	.uleb128 0xb
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF23
-	.byte	0xc
-	.2byte	0x140
-	.4byte	0x13c
-	.uleb128 0xc
-	.4byte	.LASF24
-	.byte	0xc
-	.2byte	0x143
-	.4byte	0x13c
-	.uleb128 0xc
-	.4byte	.LASF25
-	.byte	0xc
-	.2byte	0x143
-	.4byte	0x13c
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x171
-	.uleb128 0xd
-	.uleb128 0xa
-	.4byte	0x107
-	.4byte	0x17d
-	.uleb128 0xb
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF26
-	.byte	0xd
-	.byte	0x10
-	.4byte	0x172
-	.uleb128 0xa
-	.4byte	0x37
-	.4byte	0x198
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x5
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF29
-	.byte	0x8
-	.byte	0xe
-	.byte	0xf
-	.4byte	0x1bd
-	.uleb128 0x10
-	.4byte	.LASF27
-	.byte	0xe
-	.byte	0x10
-	.4byte	0xf6
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF28
-	.byte	0xe
-	.byte	0x11
-	.4byte	0x1d6
-	.byte	0x4
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x198
-	.uleb128 0x11
-	.4byte	0x50
-	.4byte	0x1d6
-	.uleb128 0x12
-	.4byte	0x50
-	.uleb128 0x12
-	.4byte	0x50
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1c2
-	.uleb128 0xa
-	.4byte	0x1bd
-	.4byte	0x1e7
-	.uleb128 0xb
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x1dc
-	.uleb128 0x4
-	.4byte	.LASF29
-	.byte	0xe
-	.byte	0xcd
-	.4byte	0x1e7
-	.uleb128 0x13
-	.2byte	0xa0c
-	.byte	0xf
-	.byte	0x13
-	.4byte	0x23e
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0xf
-	.byte	0x14
-	.4byte	0x107
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF31
-	.byte	0xf
-	.byte	0x15
-	.4byte	0xfc
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF32
-	.byte	0xf
-	.byte	0x16
-	.4byte	0x107
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF33
-	.byte	0xf
-	.byte	0x17
-	.4byte	0x23e
-	.byte	0xc
-	.uleb128 0x14
-	.4byte	.LASF34
-	.byte	0xf
-	.byte	0x18
-	.4byte	0x24f
-	.2byte	0x80c
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x107
-	.4byte	0x24f
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x2c
-	.4byte	0x260
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x1ff
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF35
-	.byte	0xf
-	.byte	0x32
-	.4byte	0x1f7
-	.uleb128 0xa
-	.4byte	0x260
-	.4byte	0x276
-	.uleb128 0xb
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF36
-	.byte	0xf
-	.byte	0x34
-	.4byte	0x26b
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4
-	.4byte	.LASF37
-	.uleb128 0xf
-	.4byte	.LASF38
-	.byte	0x8
-	.byte	0x10
-	.byte	0x10
-	.4byte	0x2ad
-	.uleb128 0x10
-	.4byte	.LASF39
-	.byte	0x10
-	.byte	0x11
-	.4byte	0xc0
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x10
-	.byte	0x12
-	.4byte	0xcb
-	.byte	0x4
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF40
-	.byte	0x50
-	.byte	0x10
-	.byte	0x15
-	.4byte	0x2de
-	.uleb128 0x16
-	.ascii	"cnt\000"
-	.byte	0x10
-	.byte	0x16
-	.4byte	0x3e
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x10
-	.byte	0x17
-	.4byte	0xcb
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF41
-	.byte	0x10
-	.byte	0x18
-	.4byte	0x2de
-	.byte	0x8
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x288
-	.4byte	0x2ee
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x8
-	.byte	0
-	.uleb128 0x17
-	.ascii	"lmb\000"
-	.byte	0xa0
-	.byte	0x10
-	.byte	0x1b
-	.4byte	0x313
-	.uleb128 0x10
-	.4byte	.LASF42
-	.byte	0x10
-	.byte	0x1c
-	.4byte	0x2ad
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF43
-	.byte	0x10
-	.byte	0x1d
-	.4byte	0x2ad
-	.byte	0x50
-	.byte	0
-	.uleb128 0x18
-	.ascii	"lmb\000"
-	.byte	0x10
-	.byte	0x20
-	.4byte	0x2ee
-	.uleb128 0x19
-	.byte	0x8
-	.byte	0x11
-	.byte	0x5a
-	.4byte	0x33f
-	.uleb128 0x10
-	.4byte	.LASF33
-	.byte	0x11
-	.byte	0x5b
-	.4byte	0xc0
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF30
-	.byte	0x11
-	.byte	0x5c
-	.4byte	0xcb
-	.byte	0x4
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF44
-	.byte	0x58
-	.byte	0x11
-	.byte	0x1b
-	.4byte	0x430
-	.uleb128 0x10
-	.4byte	.LASF45
-	.byte	0x11
-	.byte	0x1c
-	.4byte	0x3e
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF46
-	.byte	0x11
-	.byte	0x1d
-	.4byte	0xcb
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF47
-	.byte	0x11
-	.byte	0x1e
-	.4byte	0x3e
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF48
-	.byte	0x11
-	.byte	0x1f
-	.4byte	0x3e
-	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF49
-	.byte	0x11
-	.byte	0x20
-	.4byte	0x3e
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF50
-	.byte	0x11
-	.byte	0x21
-	.4byte	0x3e
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF51
-	.byte	0x11
-	.byte	0x22
-	.4byte	0x3e
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF52
-	.byte	0x11
-	.byte	0x24
-	.4byte	0x3e
-	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF53
-	.byte	0x11
-	.byte	0x25
-	.4byte	0x3e
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF54
-	.byte	0x11
-	.byte	0x26
-	.4byte	0x3e
-	.byte	0x24
-	.uleb128 0x10
-	.4byte	.LASF55
-	.byte	0x11
-	.byte	0x31
-	.4byte	0x3e
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF56
-	.byte	0x11
-	.byte	0x32
-	.4byte	0x3e
-	.byte	0x2c
-	.uleb128 0x10
-	.4byte	.LASF57
-	.byte	0x11
-	.byte	0x33
-	.4byte	0x188
-	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF58
-	.byte	0x11
-	.byte	0x34
-	.4byte	0x25
-	.byte	0x36
-	.uleb128 0x10
-	.4byte	.LASF59
-	.byte	0x11
-	.byte	0x35
-	.4byte	0x3e
-	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF60
-	.byte	0x11
-	.byte	0x36
-	.4byte	0x3e
-	.byte	0x3c
-	.uleb128 0x10
-	.4byte	.LASF61
-	.byte	0x11
-	.byte	0x57
-	.4byte	0x107
-	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF62
-	.byte	0x11
-	.byte	0x58
-	.4byte	0x107
-	.byte	0x44
-	.uleb128 0x10
-	.4byte	.LASF63
-	.byte	0x11
-	.byte	0x5d
-	.4byte	0x430
-	.byte	0x48
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x31e
-	.4byte	0x440
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1
-	.byte	0
-	.uleb128 0x3
-	.4byte	.LASF64
-	.byte	0x11
-	.byte	0x5f
-	.4byte	0x33f
-	.uleb128 0x4
-	.4byte	.LASF65
-	.byte	0x12
-	.byte	0x13
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF66
-	.byte	0x12
-	.byte	0x14
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF67
-	.byte	0x12
-	.byte	0x15
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF68
-	.byte	0x12
-	.byte	0x16
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF69
-	.byte	0x12
-	.byte	0x17
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF70
-	.byte	0x12
-	.byte	0x18
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF71
-	.byte	0x12
-	.byte	0x19
-	.4byte	0x107
-	.uleb128 0xf
-	.4byte	.LASF72
-	.byte	0x28
-	.byte	0x13
-	.byte	0x39
-	.4byte	0x51d
-	.uleb128 0x10
-	.4byte	.LASF73
-	.byte	0x13
-	.byte	0x3a
-	.4byte	0x52e
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF74
-	.byte	0x13
-	.byte	0x3b
-	.4byte	0x52e
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF75
-	.byte	0x13
-	.byte	0x3c
-	.4byte	0x52e
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF76
-	.byte	0x13
-	.byte	0x3d
-	.4byte	0x52e
-	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF77
-	.byte	0x13
-	.byte	0x3e
-	.4byte	0x52e
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF78
-	.byte	0x13
-	.byte	0x3f
-	.4byte	0x52e
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF79
-	.byte	0x13
-	.byte	0x40
-	.4byte	0x52e
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF80
-	.byte	0x13
-	.byte	0x43
-	.4byte	0x52e
-	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF81
-	.byte	0x13
-	.byte	0x46
-	.4byte	0x52e
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF82
-	.byte	0x13
-	.byte	0x49
-	.4byte	0x52e
-	.byte	0x24
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF83
-	.byte	0x14
-	.byte	0xf
-	.4byte	0x528
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x498
-	.uleb128 0x3
-	.4byte	.LASF84
-	.byte	0x14
-	.byte	0x12
-	.4byte	0x11d
-	.uleb128 0x1a
-	.4byte	.LASF85
-	.byte	0x40
-	.byte	0x15
-	.2byte	0x133
-	.4byte	0x5e3
-	.uleb128 0x1b
-	.4byte	.LASF86
-	.byte	0x15
-	.2byte	0x134
-	.4byte	0x11d
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF87
-	.byte	0x15
-	.2byte	0x135
-	.4byte	0x11d
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF88
-	.byte	0x15
-	.2byte	0x136
-	.4byte	0x11d
-	.byte	0x8
-	.uleb128 0x1b
-	.4byte	.LASF89
-	.byte	0x15
-	.2byte	0x137
-	.4byte	0x11d
-	.byte	0xc
-	.uleb128 0x1b
-	.4byte	.LASF90
-	.byte	0x15
-	.2byte	0x138
-	.4byte	0x11d
-	.byte	0x10
-	.uleb128 0x1b
-	.4byte	.LASF91
-	.byte	0x15
-	.2byte	0x139
-	.4byte	0x11d
-	.byte	0x14
-	.uleb128 0x1b
-	.4byte	.LASF92
-	.byte	0x15
-	.2byte	0x13a
-	.4byte	0x11d
-	.byte	0x18
-	.uleb128 0x1b
-	.4byte	.LASF93
-	.byte	0x15
-	.2byte	0x13b
-	.4byte	0x112
-	.byte	0x1c
-	.uleb128 0x1b
-	.4byte	.LASF94
-	.byte	0x15
-	.2byte	0x13c
-	.4byte	0x112
-	.byte	0x1d
-	.uleb128 0x1b
-	.4byte	.LASF95
-	.byte	0x15
-	.2byte	0x13d
-	.4byte	0x112
-	.byte	0x1e
-	.uleb128 0x1b
-	.4byte	.LASF96
-	.byte	0x15
-	.2byte	0x13e
-	.4byte	0x112
-	.byte	0x1f
-	.uleb128 0x1b
-	.4byte	.LASF97
-	.byte	0x15
-	.2byte	0x13f
-	.4byte	0x5e3
-	.byte	0x20
-	.byte	0
-	.uleb128 0xa
-	.4byte	0x112
-	.4byte	0x5f3
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF98
-	.byte	0x15
-	.2byte	0x140
-	.4byte	0x539
-	.uleb128 0x1a
-	.4byte	.LASF99
-	.byte	0x18
-	.byte	0x15
-	.2byte	0x142
-	.4byte	0x681
-	.uleb128 0x1b
-	.4byte	.LASF33
-	.byte	0x15
-	.2byte	0x143
-	.4byte	0x107
-	.byte	0
-	.uleb128 0x1d
-	.ascii	"end\000"
-	.byte	0x15
-	.2byte	0x143
-	.4byte	0x107
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF100
-	.byte	0x15
-	.2byte	0x144
-	.4byte	0x107
-	.byte	0x8
-	.uleb128 0x1b
-	.4byte	.LASF101
-	.byte	0x15
-	.2byte	0x144
-	.4byte	0x107
-	.byte	0xc
-	.uleb128 0x1b
-	.4byte	.LASF102
-	.byte	0x15
-	.2byte	0x145
-	.4byte	0x107
-	.byte	0x10
-	.uleb128 0x1b
-	.4byte	.LASF103
-	.byte	0x15
-	.2byte	0x146
-	.4byte	0x112
-	.byte	0x14
-	.uleb128 0x1b
-	.4byte	.LASF104
-	.byte	0x15
-	.2byte	0x146
-	.4byte	0x112
-	.byte	0x15
-	.uleb128 0x1d
-	.ascii	"os\000"
-	.byte	0x15
-	.2byte	0x146
-	.4byte	0x112
-	.byte	0x16
-	.uleb128 0x1b
-	.4byte	.LASF105
-	.byte	0x15
-	.2byte	0x147
-	.4byte	0x112
-	.byte	0x17
-	.byte	0
-	.uleb128 0x1c
-	.4byte	.LASF106
-	.byte	0x15
-	.2byte	0x148
-	.4byte	0x5ff
-	.uleb128 0x1e
-	.4byte	.LASF107
-	.2byte	0x164
-	.byte	0x15
-	.2byte	0x14e
-	.4byte	0x820
-	.uleb128 0x1b
-	.4byte	.LASF108
-	.byte	0x15
-	.2byte	0x154
-	.4byte	0x820
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF109
-	.byte	0x15
-	.2byte	0x155
-	.4byte	0x5f3
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF110
-	.byte	0x15
-	.2byte	0x156
-	.4byte	0x107
-	.byte	0x44
-	.uleb128 0x1b
-	.4byte	.LASF111
-	.byte	0x15
-	.2byte	0x159
-	.4byte	0xdd
-	.byte	0x48
-	.uleb128 0x1b
-	.4byte	.LASF112
-	.byte	0x15
-	.2byte	0x15b
-	.4byte	0x128
-	.byte	0x4c
-	.uleb128 0x1b
-	.4byte	.LASF113
-	.byte	0x15
-	.2byte	0x15c
-	.4byte	0xdd
-	.byte	0x50
-	.uleb128 0x1b
-	.4byte	.LASF114
-	.byte	0x15
-	.2byte	0x15d
-	.4byte	0x50
-	.byte	0x54
-	.uleb128 0x1b
-	.4byte	.LASF115
-	.byte	0x15
-	.2byte	0x15f
-	.4byte	0x128
-	.byte	0x58
-	.uleb128 0x1b
-	.4byte	.LASF116
-	.byte	0x15
-	.2byte	0x160
-	.4byte	0xdd
-	.byte	0x5c
-	.uleb128 0x1b
-	.4byte	.LASF117
-	.byte	0x15
-	.2byte	0x161
-	.4byte	0x50
-	.byte	0x60
-	.uleb128 0x1b
-	.4byte	.LASF118
-	.byte	0x15
-	.2byte	0x163
-	.4byte	0x128
-	.byte	0x64
-	.uleb128 0x1b
-	.4byte	.LASF119
-	.byte	0x15
-	.2byte	0x164
-	.4byte	0xdd
-	.byte	0x68
-	.uleb128 0x1b
-	.4byte	.LASF120
-	.byte	0x15
-	.2byte	0x165
-	.4byte	0x50
-	.byte	0x6c
-	.uleb128 0x1b
-	.4byte	.LASF121
-	.byte	0x15
-	.2byte	0x167
-	.4byte	0x128
-	.byte	0x70
-	.uleb128 0x1b
-	.4byte	.LASF122
-	.byte	0x15
-	.2byte	0x168
-	.4byte	0xdd
-	.byte	0x74
-	.uleb128 0x1b
-	.4byte	.LASF123
-	.byte	0x15
-	.2byte	0x169
-	.4byte	0x50
-	.byte	0x78
-	.uleb128 0x1d
-	.ascii	"os\000"
-	.byte	0x15
-	.2byte	0x16d
-	.4byte	0x681
-	.byte	0x7c
-	.uleb128 0x1d
-	.ascii	"ep\000"
-	.byte	0x15
-	.2byte	0x16e
-	.4byte	0x107
-	.byte	0x94
-	.uleb128 0x1b
-	.4byte	.LASF124
-	.byte	0x15
-	.2byte	0x170
-	.4byte	0x107
-	.byte	0x98
-	.uleb128 0x1b
-	.4byte	.LASF125
-	.byte	0x15
-	.2byte	0x170
-	.4byte	0x107
-	.byte	0x9c
-	.uleb128 0x1b
-	.4byte	.LASF126
-	.byte	0x15
-	.2byte	0x172
-	.4byte	0xf6
-	.byte	0xa0
-	.uleb128 0x1b
-	.4byte	.LASF127
-	.byte	0x15
-	.2byte	0x173
-	.4byte	0x107
-	.byte	0xa4
-	.uleb128 0x1b
-	.4byte	.LASF128
-	.byte	0x15
-	.2byte	0x175
-	.4byte	0x107
-	.byte	0xa8
-	.uleb128 0x1b
-	.4byte	.LASF129
-	.byte	0x15
-	.2byte	0x176
-	.4byte	0x107
-	.byte	0xac
-	.uleb128 0x1b
-	.4byte	.LASF130
-	.byte	0x15
-	.2byte	0x177
-	.4byte	0x107
-	.byte	0xb0
-	.uleb128 0x1b
-	.4byte	.LASF131
-	.byte	0x15
-	.2byte	0x178
-	.4byte	0x107
-	.byte	0xb4
-	.uleb128 0x1d
-	.ascii	"kbd\000"
-	.byte	0x15
-	.2byte	0x179
-	.4byte	0x826
-	.byte	0xb8
-	.uleb128 0x1b
-	.4byte	.LASF132
-	.byte	0x15
-	.2byte	0x17c
-	.4byte	0x50
-	.byte	0xbc
-	.uleb128 0x1b
-	.4byte	.LASF133
-	.byte	0x15
-	.2byte	0x189
-	.4byte	0x50
-	.byte	0xc0
-	.uleb128 0x1d
-	.ascii	"lmb\000"
-	.byte	0x15
-	.2byte	0x18c
-	.4byte	0x2ee
-	.byte	0xc4
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x5f3
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x440
-	.uleb128 0x1c
-	.4byte	.LASF134
-	.byte	0x15
-	.2byte	0x18e
-	.4byte	0x68d
-	.uleb128 0xc
-	.4byte	.LASF135
-	.byte	0x15
-	.2byte	0x190
-	.4byte	0x82c
-	.uleb128 0x1f
-	.4byte	.LASF263
-	.byte	0x4
-	.4byte	0x50
-	.byte	0x17
-	.byte	0xe
-	.4byte	0xa41
-	.uleb128 0x20
-	.4byte	.LASF136
-	.byte	0
-	.uleb128 0x20
-	.4byte	.LASF137
-	.byte	0x1
-	.uleb128 0x20
-	.4byte	.LASF138
-	.byte	0x2
-	.uleb128 0x20
-	.4byte	.LASF139
-	.byte	0x3
-	.uleb128 0x20
-	.4byte	.LASF140
-	.byte	0x4
-	.uleb128 0x20
-	.4byte	.LASF141
-	.byte	0x5
-	.uleb128 0x20
-	.4byte	.LASF142
-	.byte	0x6
-	.uleb128 0x20
-	.4byte	.LASF143
-	.byte	0x7
-	.uleb128 0x20
-	.4byte	.LASF144
-	.byte	0x8
-	.uleb128 0x20
-	.4byte	.LASF145
-	.byte	0x9
-	.uleb128 0x20
-	.4byte	.LASF146
-	.byte	0xa
-	.uleb128 0x20
-	.4byte	.LASF147
-	.byte	0xb
-	.uleb128 0x20
-	.4byte	.LASF148
-	.byte	0xc
-	.uleb128 0x20
-	.4byte	.LASF149
-	.byte	0xd
-	.uleb128 0x20
-	.4byte	.LASF150
-	.byte	0xe
-	.uleb128 0x20
-	.4byte	.LASF151
-	.byte	0xf
-	.uleb128 0x20
-	.4byte	.LASF152
-	.byte	0x10
-	.uleb128 0x20
-	.4byte	.LASF153
-	.byte	0x11
-	.uleb128 0x20
-	.4byte	.LASF154
-	.byte	0x12
-	.uleb128 0x20
-	.4byte	.LASF155
-	.byte	0x13
-	.uleb128 0x20
-	.4byte	.LASF156
-	.byte	0x14
-	.uleb128 0x20
-	.4byte	.LASF157
-	.byte	0x15
-	.uleb128 0x20
-	.4byte	.LASF158
-	.byte	0x16
-	.uleb128 0x20
-	.4byte	.LASF159
-	.byte	0x17
-	.uleb128 0x20
-	.4byte	.LASF160
-	.byte	0x18
-	.uleb128 0x20
-	.4byte	.LASF161
-	.byte	0x19
-	.uleb128 0x20
-	.4byte	.LASF162
-	.byte	0x1a
-	.uleb128 0x20
-	.4byte	.LASF163
-	.byte	0x1b
-	.uleb128 0x20
-	.4byte	.LASF164
-	.byte	0x1c
-	.uleb128 0x20
-	.4byte	.LASF165
-	.byte	0x1d
-	.uleb128 0x20
-	.4byte	.LASF166
-	.byte	0x1e
-	.uleb128 0x20
-	.4byte	.LASF167
-	.byte	0x1f
-	.uleb128 0x20
-	.4byte	.LASF168
-	.byte	0x20
-	.uleb128 0x20
-	.4byte	.LASF169
-	.byte	0x21
-	.uleb128 0x20
-	.4byte	.LASF170
-	.byte	0x22
-	.uleb128 0x20
-	.4byte	.LASF171
-	.byte	0x23
-	.uleb128 0x20
-	.4byte	.LASF172
-	.byte	0x24
-	.uleb128 0x20
-	.4byte	.LASF173
-	.byte	0x25
-	.uleb128 0x20
-	.4byte	.LASF174
-	.byte	0x26
-	.uleb128 0x20
-	.4byte	.LASF175
-	.byte	0x27
-	.uleb128 0x20
-	.4byte	.LASF176
-	.byte	0x28
-	.uleb128 0x20
-	.4byte	.LASF177
-	.byte	0x29
-	.uleb128 0x20
-	.4byte	.LASF178
-	.byte	0x2a
-	.uleb128 0x20
-	.4byte	.LASF179
-	.byte	0x2b
-	.uleb128 0x20
-	.4byte	.LASF180
-	.byte	0x2c
-	.uleb128 0x20
-	.4byte	.LASF181
-	.byte	0x2d
-	.uleb128 0x20
-	.4byte	.LASF182
-	.byte	0x2e
-	.uleb128 0x20
-	.4byte	.LASF183
-	.byte	0x2f
-	.uleb128 0x20
-	.4byte	.LASF184
-	.byte	0x30
-	.uleb128 0x20
-	.4byte	.LASF185
-	.byte	0x31
-	.uleb128 0x20
-	.4byte	.LASF186
-	.byte	0x32
-	.uleb128 0x20
-	.4byte	.LASF187
-	.byte	0x33
-	.uleb128 0x20
-	.4byte	.LASF188
-	.byte	0x34
-	.uleb128 0x20
-	.4byte	.LASF189
-	.byte	0x35
-	.uleb128 0x20
-	.4byte	.LASF190
-	.byte	0x36
-	.uleb128 0x20
-	.4byte	.LASF191
-	.byte	0x37
-	.uleb128 0x20
-	.4byte	.LASF192
-	.byte	0x38
-	.uleb128 0x20
-	.4byte	.LASF193
-	.byte	0x39
-	.uleb128 0x20
-	.4byte	.LASF194
-	.byte	0x3a
-	.uleb128 0x20
-	.4byte	.LASF195
-	.byte	0x3b
-	.uleb128 0x20
-	.4byte	.LASF196
-	.byte	0x3c
-	.uleb128 0x20
-	.4byte	.LASF197
-	.byte	0x3d
-	.uleb128 0x20
-	.4byte	.LASF198
-	.byte	0x3e
-	.uleb128 0x20
-	.4byte	.LASF199
-	.byte	0x3f
-	.uleb128 0x20
-	.4byte	.LASF200
-	.byte	0x40
-	.uleb128 0x20
-	.4byte	.LASF201
-	.byte	0x41
-	.uleb128 0x20
-	.4byte	.LASF202
-	.byte	0x42
-	.uleb128 0x20
-	.4byte	.LASF203
-	.byte	0x43
-	.uleb128 0x20
-	.4byte	.LASF204
-	.byte	0x44
-	.uleb128 0x20
-	.4byte	.LASF205
-	.byte	0x45
-	.uleb128 0x20
-	.4byte	.LASF206
-	.byte	0x46
-	.uleb128 0x20
-	.4byte	.LASF207
-	.byte	0x47
-	.uleb128 0x20
-	.4byte	.LASF208
-	.byte	0x48
-	.uleb128 0x20
-	.4byte	.LASF209
-	.byte	0x49
-	.uleb128 0x20
-	.4byte	.LASF210
-	.byte	0x4a
-	.uleb128 0x20
-	.4byte	.LASF211
-	.byte	0x4b
-	.uleb128 0x20
-	.4byte	.LASF212
-	.byte	0x4c
-	.uleb128 0x20
-	.4byte	.LASF213
-	.byte	0x4d
-	.uleb128 0x20
-	.4byte	.LASF214
-	.byte	0x4e
-	.uleb128 0x20
-	.4byte	.LASF215
-	.byte	0x4f
-	.uleb128 0x20
-	.4byte	.LASF216
-	.byte	0x50
-	.uleb128 0x21
-	.4byte	.LASF217
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x22
-	.byte	0x4
-	.4byte	0x7b
-	.byte	0x1f
-	.byte	0xe0
-	.4byte	0xa54
-	.uleb128 0x20
-	.4byte	.LASF218
-	.byte	0x5
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xe3
-	.4byte	0xa64
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF219
-	.byte	0x7
-	.byte	0xa6
-	.4byte	0x107
-	.uleb128 0xa
-	.4byte	0x90
-	.4byte	0xa7a
-	.uleb128 0xb
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF220
-	.byte	0x7
-	.byte	0xa8
-	.4byte	0xa6f
-	.uleb128 0x4
-	.4byte	.LASF221
-	.byte	0x7
-	.byte	0xa9
-	.4byte	0xa6f
-	.uleb128 0x4
-	.4byte	.LASF222
-	.byte	0x7
-	.byte	0xf7
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF223
-	.byte	0x7
-	.byte	0xf8
-	.4byte	0x107
-	.uleb128 0x4
-	.4byte	.LASF224
-	.byte	0x7
-	.byte	0xf9
-	.4byte	0x107
-	.uleb128 0xf
-	.4byte	.LASF225
-	.byte	0x4
-	.byte	0x16
-	.byte	0x2e
-	.4byte	0xaca
-	.uleb128 0x10
-	.4byte	.LASF226
-	.byte	0x16
-	.byte	0x2f
-	.4byte	0x11d
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x2c
-	.uleb128 0xf
-	.4byte	.LASF227
-	.byte	0x40
-	.byte	0x16
-	.byte	0xa6
-	.4byte	0xb6d
-	.uleb128 0x10
-	.4byte	.LASF27
-	.byte	0x16
-	.byte	0xa8
-	.4byte	0xb6d
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF228
-	.byte	0x16
-	.byte	0xa9
-	.4byte	0x188
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF229
-	.byte	0x16
-	.byte	0xaa
-	.4byte	0xc0
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF133
-	.byte	0x16
-	.byte	0xab
-	.4byte	0x50
-	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF230
-	.byte	0x16
-	.byte	0xad
-	.4byte	0xb97
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF231
-	.byte	0x16
-	.byte	0xae
-	.4byte	0xbb6
-	.byte	0x24
-	.uleb128 0x10
-	.4byte	.LASF232
-	.byte	0x16
-	.byte	0xaf
-	.4byte	0xbcb
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF233
-	.byte	0x16
-	.byte	0xb0
-	.4byte	0xbdc
-	.byte	0x2c
-	.uleb128 0x10
-	.4byte	.LASF234
-	.byte	0x16
-	.byte	0xb4
-	.4byte	0xbcb
-	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF235
-	.byte	0x16
-	.byte	0xb5
-	.4byte	0xb91
-	.byte	0x34
-	.uleb128 0x10
-	.4byte	.LASF236
-	.byte	0x16
-	.byte	0xb6
-	.4byte	0x50
-	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF237
-	.byte	0x16
-	.byte	0xb7
-	.4byte	0x128
-	.byte	0x3c
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xe3
-	.4byte	0xb7d
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xf
-	.byte	0
-	.uleb128 0x11
-	.4byte	0x50
-	.4byte	0xb91
-	.uleb128 0x12
-	.4byte	0xb91
-	.uleb128 0x12
-	.4byte	0x826
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xad0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xb7d
-	.uleb128 0x11
-	.4byte	0x50
-	.4byte	0xbb6
-	.uleb128 0x12
-	.4byte	0xb91
-	.uleb128 0x12
-	.4byte	0x128
-	.uleb128 0x12
-	.4byte	0x50
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xb9d
-	.uleb128 0x11
-	.4byte	0x50
-	.4byte	0xbcb
-	.uleb128 0x12
-	.4byte	0xb91
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xbbc
-	.uleb128 0x23
-	.4byte	0xbdc
-	.uleb128 0x12
-	.4byte	0xb91
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xbd1
-	.uleb128 0x4
-	.4byte	.LASF238
-	.byte	0x16
-	.byte	0xbd
-	.4byte	0xb91
-	.uleb128 0x23
-	.4byte	0xbfd
-	.uleb128 0x12
-	.4byte	0x128
-	.uleb128 0x12
-	.4byte	0x50
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF239
-	.byte	0x16
-	.2byte	0x11e
-	.4byte	0xc09
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xbed
-	.uleb128 0xa
-	.4byte	0x90
-	.4byte	0xc1f
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x5
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF240
-	.byte	0x16
-	.2byte	0x1fd
-	.4byte	0xab1
-	.uleb128 0xc
-	.4byte	.LASF241
-	.byte	0x16
-	.2byte	0x1fe
-	.4byte	0xab1
-	.uleb128 0xc
-	.4byte	.LASF242
-	.byte	0x16
-	.2byte	0x200
-	.4byte	0xab1
-	.uleb128 0xc
-	.4byte	.LASF243
-	.byte	0x16
-	.2byte	0x205
-	.4byte	0xa54
-	.uleb128 0xc
-	.4byte	.LASF244
-	.byte	0x16
-	.2byte	0x206
-	.4byte	0xa54
-	.uleb128 0xa
-	.4byte	0xe3
-	.4byte	0xc6b
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x3f
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF245
-	.byte	0x16
-	.2byte	0x207
-	.4byte	0xc5b
-	.uleb128 0xc
-	.4byte	.LASF246
-	.byte	0x16
-	.2byte	0x209
-	.4byte	0xc0f
-	.uleb128 0xc
-	.4byte	.LASF247
-	.byte	0x16
-	.2byte	0x20a
-	.4byte	0xc0f
-	.uleb128 0xc
-	.4byte	.LASF248
-	.byte	0x16
-	.2byte	0x20b
-	.4byte	0xab1
-	.uleb128 0xc
-	.4byte	.LASF249
-	.byte	0x16
-	.2byte	0x20c
-	.4byte	0xab1
-	.uleb128 0xc
-	.4byte	.LASF250
-	.byte	0x16
-	.2byte	0x20d
-	.4byte	0xaca
-	.uleb128 0xa
-	.4byte	0xaca
-	.4byte	0xcc3
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x3
-	.byte	0
-	.uleb128 0xc
-	.4byte	.LASF251
-	.byte	0x16
-	.2byte	0x20e
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-	.uleb128 0xc
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-	.uleb128 0xc
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-	.4byte	0xcf7
-	.uleb128 0xc
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-	.uleb128 0xc
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-	.uleb128 0xc
-	.4byte	.LASF258
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-	.uleb128 0xc
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-	.4byte	0xd38
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-	.uleb128 0xc
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-	.uleb128 0xc
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-	.4byte	.LASF264
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-	.uleb128 0x20
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-	.uleb128 0x20
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-	.uleb128 0x20
-	.4byte	.LASF268
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-	.4byte	0xd79
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-	.4byte	.LASF270
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-	.byte	0x9
-	.4byte	0x37
-	.uleb128 0x3
-	.4byte	.LASF271
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-	.4byte	.LASF272
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-	.4byte	0x7b
-	.uleb128 0x3
-	.4byte	.LASF273
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-	.4byte	0x50
-	.uleb128 0x3
-	.4byte	.LASF274
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-	.byte	0xd
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-	.uleb128 0xf
-	.4byte	.LASF275
-	.byte	0x14
-	.byte	0x19
-	.byte	0x24
-	.4byte	0xe2f
-	.uleb128 0x10
-	.4byte	.LASF276
-	.byte	0x19
-	.byte	0x25
-	.4byte	0xb5
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF277
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-	.byte	0x26
-	.4byte	0xb5
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF278
-	.byte	0x19
-	.byte	0x27
-	.4byte	0xe2f
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF279
-	.byte	0x19
-	.byte	0x28
-	.4byte	0xe2f
-	.byte	0xc
-	.uleb128 0x16
-	.ascii	"lpa\000"
-	.byte	0x19
-	.byte	0x29
-	.4byte	0xb5
-	.byte	0x10
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xb5
-	.uleb128 0xf
-	.4byte	.LASF280
-	.byte	0x18
-	.byte	0x19
-	.byte	0x2c
-	.4byte	0xed2
-	.uleb128 0x10
-	.4byte	.LASF281
-	.byte	0x19
-	.byte	0x2d
-	.4byte	0x9f
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF282
-	.byte	0x19
-	.byte	0x2e
-	.4byte	0x9f
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF283
-	.byte	0x19
-	.byte	0x2f
-	.4byte	0x9f
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF284
-	.byte	0x19
-	.byte	0x30
-	.4byte	0x9f
-	.byte	0x6
-	.uleb128 0x10
-	.4byte	.LASF285
-	.byte	0x19
-	.byte	0x31
-	.4byte	0x9f
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF286
-	.byte	0x19
-	.byte	0x32
-	.4byte	0x9f
-	.byte	0xa
-	.uleb128 0x10
-	.4byte	.LASF287
-	.byte	0x19
-	.byte	0x33
-	.4byte	0x9f
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-	.uleb128 0x10
-	.4byte	.LASF288
-	.byte	0x19
-	.byte	0x34
-	.4byte	0x9f
-	.byte	0xe
-	.uleb128 0x10
-	.4byte	.LASF289
-	.byte	0x19
-	.byte	0x35
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-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF290
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-	.4byte	0x9f
-	.byte	0x12
-	.uleb128 0x10
-	.4byte	.LASF291
-	.byte	0x19
-	.byte	0x37
-	.4byte	0x9f
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-	.uleb128 0x10
-	.4byte	.LASF292
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-	.byte	0x38
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-	.4byte	0xe35
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-	.byte	0x10
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-	.byte	0x3b
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-	.4byte	.LASF294
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-	.byte	0x3c
-	.4byte	0xf2e
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-	.uleb128 0x10
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-	.byte	0x3d
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-	.uleb128 0x10
-	.4byte	.LASF296
-	.byte	0x19
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-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x16
-	.ascii	"id\000"
-	.byte	0x1a
-	.byte	0x9b
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF78
-	.byte	0x1a
-	.byte	0x9c
-	.4byte	0xdc5
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF332
-	.byte	0x1a
-	.byte	0x9d
-	.4byte	0xdc5
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF333
-	.byte	0x1a
-	.byte	0x9e
-	.4byte	0xdc5
-	.byte	0xc
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF334
-	.byte	0x30
-	.byte	0x1a
-	.byte	0xa1
-	.4byte	0x140e
-	.uleb128 0x16
-	.ascii	"tag\000"
-	.byte	0x1a
-	.byte	0xa3
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x16
-	.ascii	"ver\000"
-	.byte	0x1a
-	.byte	0xa4
-	.4byte	0xdc5
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF304
-	.byte	0x1a
-	.byte	0xa6
-	.4byte	0xdba
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF335
-	.byte	0x1a
-	.byte	0xa7
-	.4byte	0xdaf
-	.byte	0xa
-	.uleb128 0x10
-	.4byte	.LASF336
-	.byte	0x1a
-	.byte	0xa8
-	.4byte	0xdaf
-	.byte	0xb
-	.uleb128 0x10
-	.4byte	.LASF337
-	.byte	0x1a
-	.byte	0xa9
-	.4byte	0xdaf
-	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF338
-	.byte	0x1a
-	.byte	0xaa
-	.4byte	0xdaf
-	.byte	0xd
-	.uleb128 0x10
-	.4byte	.LASF339
-	.byte	0x1a
-	.byte	0xab
-	.4byte	0xdba
-	.byte	0xe
-	.uleb128 0x10
-	.4byte	.LASF340
-	.byte	0x1a
-	.byte	0xad
-	.4byte	0xdba
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF341
-	.byte	0x1a
-	.byte	0xae
-	.4byte	0xdba
-	.byte	0x12
-	.uleb128 0x10
-	.4byte	.LASF342
-	.byte	0x1a
-	.byte	0xaf
-	.4byte	0xdba
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF343
-	.byte	0x1a
-	.byte	0xb0
-	.4byte	0xdba
-	.byte	0x16
-	.uleb128 0x10
-	.4byte	.LASF344
-	.byte	0x1a
-	.byte	0xb2
-	.4byte	0xdba
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF345
-	.byte	0x1a
-	.byte	0xb3
-	.4byte	0xdba
-	.byte	0x1a
-	.uleb128 0x10
-	.4byte	.LASF346
-	.byte	0x1a
-	.byte	0xb4
-	.4byte	0xdba
-	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF347
-	.byte	0x1a
-	.byte	0xb5
-	.4byte	0xdba
-	.byte	0x1e
-	.uleb128 0x10
-	.4byte	.LASF348
-	.byte	0x1a
-	.byte	0xb7
-	.4byte	0xdc5
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF349
-	.byte	0x1a
-	.byte	0xb8
-	.4byte	0xdc5
-	.byte	0x24
-	.uleb128 0x10
-	.4byte	.LASF350
-	.byte	0x1a
-	.byte	0xb9
-	.4byte	0xdc5
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF323
-	.byte	0x1a
-	.byte	0xba
-	.4byte	0x11a9
-	.byte	0x2c
-	.byte	0
-	.uleb128 0x25
-	.4byte	.LASF351
-	.2byte	0x200
-	.byte	0x1a
-	.byte	0xbe
-	.4byte	0x1554
-	.uleb128 0x16
-	.ascii	"tag\000"
-	.byte	0x1a
-	.byte	0xc0
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x16
-	.ascii	"ver\000"
-	.byte	0x1a
-	.byte	0xc1
-	.4byte	0xdc5
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF352
-	.byte	0x1a
-	.byte	0xc3
-	.4byte	0xdc5
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF353
-	.byte	0x1a
-	.byte	0xc4
-	.4byte	0xdc5
-	.byte	0xc
-	.uleb128 0x10
-	.4byte	.LASF354
-	.byte	0x1a
-	.byte	0xc5
-	.4byte	0xdc5
-	.byte	0x10
-	.uleb128 0x10
-	.4byte	.LASF355
-	.byte	0x1a
-	.byte	0xc6
-	.4byte	0xdc5
-	.byte	0x14
-	.uleb128 0x10
-	.4byte	.LASF348
-	.byte	0x1a
-	.byte	0xc8
-	.4byte	0xdc5
-	.byte	0x18
-	.uleb128 0x10
-	.4byte	.LASF356
-	.byte	0x1a
-	.byte	0xc9
-	.4byte	0xdc5
-	.byte	0x1c
-	.uleb128 0x10
-	.4byte	.LASF357
-	.byte	0x1a
-	.byte	0xca
-	.4byte	0xdc5
-	.byte	0x20
-	.uleb128 0x10
-	.4byte	.LASF358
-	.byte	0x1a
-	.byte	0xcb
-	.4byte	0xdc5
-	.byte	0x24
-	.uleb128 0x10
-	.4byte	.LASF345
-	.byte	0x1a
-	.byte	0xcd
-	.4byte	0xdc5
-	.byte	0x28
-	.uleb128 0x10
-	.4byte	.LASF359
-	.byte	0x1a
-	.byte	0xce
-	.4byte	0xdc5
-	.byte	0x2c
-	.uleb128 0x10
-	.4byte	.LASF360
-	.byte	0x1a
-	.byte	0xcf
-	.4byte	0xdc5
-	.byte	0x30
-	.uleb128 0x10
-	.4byte	.LASF361
-	.byte	0x1a
-	.byte	0xd0
-	.4byte	0xdc5
-	.byte	0x34
-	.uleb128 0x10
-	.4byte	.LASF362
-	.byte	0x1a
-	.byte	0xd2
-	.4byte	0xdc5
-	.byte	0x38
-	.uleb128 0x10
-	.4byte	.LASF363
-	.byte	0x1a
-	.byte	0xd3
-	.4byte	0xdc5
-	.byte	0x3c
-	.uleb128 0x10
-	.4byte	.LASF364
-	.byte	0x1a
-	.byte	0xd4
-	.4byte	0xdc5
-	.byte	0x40
-	.uleb128 0x10
-	.4byte	.LASF365
-	.byte	0x1a
-	.byte	0xd5
-	.4byte	0xdc5
-	.byte	0x44
-	.uleb128 0x10
-	.4byte	.LASF366
-	.byte	0x1a
-	.byte	0xd7
-	.4byte	0xdc5
-	.byte	0x48
-	.uleb128 0x10
-	.4byte	.LASF367
-	.byte	0x1a
-	.byte	0xd8
-	.4byte	0xdc5
-	.byte	0x4c
-	.uleb128 0x10
-	.4byte	.LASF368
-	.byte	0x1a
-	.byte	0xd9
-	.4byte	0xdc5
-	.byte	0x50
-	.uleb128 0x10
-	.4byte	.LASF369
-	.byte	0x1a
-	.byte	0xda
-	.4byte	0xdc5
-	.byte	0x54
-	.uleb128 0x10
-	.4byte	.LASF370
-	.byte	0x1a
-	.byte	0xdc
-	.4byte	0xdc5
-	.byte	0x58
-	.uleb128 0x10
-	.4byte	.LASF371
-	.byte	0x1a
-	.byte	0xdd
-	.4byte	0xdc5
-	.byte	0x5c
-	.uleb128 0x10
-	.4byte	.LASF372
-	.byte	0x1a
-	.byte	0xde
-	.4byte	0xdc5
-	.byte	0x60
-	.uleb128 0x10
-	.4byte	.LASF323
-	.byte	0x1a
-	.byte	0xe0
-	.4byte	0x1554
-	.byte	0x64
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdc5
-	.4byte	0x1564
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x66
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF373
-	.byte	0x6
-	.byte	0x1a
-	.byte	0xe4
-	.4byte	0x1595
-	.uleb128 0x10
-	.4byte	.LASF235
-	.byte	0x1a
-	.byte	0xe6
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF374
-	.byte	0x1a
-	.byte	0xe7
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF375
-	.byte	0x1a
-	.byte	0xe8
-	.4byte	0xdba
-	.byte	0x4
-	.byte	0
-	.uleb128 0x25
-	.4byte	.LASF376
-	.2byte	0x808
-	.byte	0x1a
-	.byte	0xeb
-	.4byte	0x15df
-	.uleb128 0x16
-	.ascii	"max\000"
-	.byte	0x1a
-	.byte	0xed
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF377
-	.byte	0x1a
-	.byte	0xee
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF378
-	.byte	0x1a
-	.byte	0xef
-	.4byte	0xdba
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF325
-	.byte	0x1a
-	.byte	0xf0
-	.4byte	0xdba
-	.byte	0x6
-	.uleb128 0x16
-	.ascii	"arr\000"
-	.byte	0x1a
-	.byte	0xf1
-	.4byte	0x15df
-	.byte	0x8
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x15f0
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0xf
-	.4byte	.LASF379
-	.byte	0x30
-	.byte	0x1a
-	.byte	0xf5
-	.4byte	0x1682
-	.uleb128 0x16
-	.ascii	"id\000"
-	.byte	0x1a
-	.byte	0xf7
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x10
-	.4byte	.LASF380
-	.byte	0x1a
-	.byte	0xf8
-	.4byte	0xdba
-	.byte	0x2
-	.uleb128 0x10
-	.4byte	.LASF381
-	.byte	0x1a
-	.byte	0xf9
-	.4byte	0xdba
-	.byte	0x4
-	.uleb128 0x10
-	.4byte	.LASF382
-	.byte	0x1a
-	.byte	0xfa
-	.4byte	0xdaf
-	.byte	0x6
-	.uleb128 0x10
-	.4byte	.LASF383
-	.byte	0x1a
-	.byte	0xfb
-	.4byte	0xdaf
-	.byte	0x7
-	.uleb128 0x10
-	.4byte	.LASF384
-	.byte	0x1a
-	.byte	0xfc
-	.4byte	0xdaf
-	.byte	0x8
-	.uleb128 0x10
-	.4byte	.LASF385
-	.byte	0x1a
-	.byte	0xfd
-	.4byte	0xdaf
-	.byte	0x9
-	.uleb128 0x10
-	.4byte	.LASF386
-	.byte	0x1a
-	.byte	0xfe
-	.4byte	0xdaf
-	.byte	0xa
-	.uleb128 0x10
-	.4byte	.LASF387
-	.byte	0x1a
-	.byte	0xff
-	.4byte	0xdaf
-	.byte	0xb
-	.uleb128 0x1b
-	.4byte	.LASF78
-	.byte	0x1a
-	.2byte	0x100
-	.4byte	0xdc5
-	.byte	0xc
-	.uleb128 0x1b
-	.4byte	.LASF388
-	.byte	0x1a
-	.2byte	0x101
-	.4byte	0x1682
-	.byte	0x10
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x1692
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xf
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF389
-	.byte	0xc
-	.byte	0x1a
-	.2byte	0x105
-	.4byte	0x16c7
-	.uleb128 0x1b
-	.4byte	.LASF390
-	.byte	0x1a
-	.2byte	0x107
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF391
-	.byte	0x1a
-	.2byte	0x108
-	.4byte	0xdc5
-	.byte	0x4
-	.uleb128 0x1d
-	.ascii	"lpa\000"
-	.byte	0x1a
-	.2byte	0x109
-	.4byte	0xdc5
-	.byte	0x8
-	.byte	0
-	.uleb128 0x1a
-	.4byte	.LASF392
-	.byte	0xc
-	.byte	0x1a
-	.2byte	0x10c
-	.4byte	0x16fc
-	.uleb128 0x1b
-	.4byte	.LASF278
-	.byte	0x1a
-	.2byte	0x10e
-	.4byte	0xff2
-	.byte	0
-	.uleb128 0x1b
-	.4byte	.LASF279
-	.byte	0x1a
-	.2byte	0x10f
-	.4byte	0xff2
-	.byte	0x4
-	.uleb128 0x1b
-	.4byte	.LASF393
-	.byte	0x1a
-	.2byte	0x110
-	.4byte	0xdc5
-	.byte	0x8
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF394
-	.byte	0x1b
-	.byte	0x12
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_type
-	.uleb128 0x26
-	.4byte	.LASF395
-	.byte	0x1b
-	.byte	0x13
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.uleb128 0x26
-	.4byte	.LASF396
-	.byte	0x1b
-	.byte	0x14
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.uleb128 0x26
-	.4byte	.LASF397
-	.byte	0x1b
-	.byte	0x15
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.uleb128 0x26
-	.4byte	.LASF398
-	.byte	0x1b
-	.byte	0x16
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x26
-	.4byte	.LASF399
-	.byte	0x1b
-	.byte	0x17
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_num
-	.uleb128 0x26
-	.4byte	.LASF400
-	.byte	0x1b
-	.byte	0x18
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x26
-	.4byte	.LASF401
-	.byte	0x1b
-	.byte	0x19
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_ext_blk_pre_plane
-	.uleb128 0x26
-	.4byte	.LASF402
-	.byte	0x1b
-	.byte	0x1a
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x26
-	.4byte	.LASF403
-	.byte	0x1b
-	.byte	0x1c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_blk
-	.uleb128 0x26
-	.4byte	.LASF404
-	.byte	0x1b
-	.byte	0x1d
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_slc_blk
-	.uleb128 0x26
-	.4byte	.LASF405
-	.byte	0x1b
-	.byte	0x1e
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_page_pre_super_blk
-	.uleb128 0x26
-	.4byte	.LASF406
-	.byte	0x1b
-	.byte	0x1f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.uleb128 0x26
-	.4byte	.LASF407
-	.byte	0x1b
-	.byte	0x20
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.uleb128 0x26
-	.4byte	.LASF408
-	.byte	0x1b
-	.byte	0x24
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.uleb128 0x26
-	.4byte	.LASF409
-	.byte	0x1b
-	.byte	0x25
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_oob
-	.uleb128 0x26
-	.4byte	.LASF410
-	.byte	0x1b
-	.byte	0x26
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_reserved_blks
-	.uleb128 0x26
-	.4byte	.LASF411
-	.byte	0x1b
-	.byte	0x27
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_totle_phy_blks
-	.uleb128 0x26
-	.4byte	.LASF412
-	.byte	0x1b
-	.byte	0x29
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.uleb128 0x26
-	.4byte	.LASF413
-	.byte	0x1b
-	.byte	0x2a
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.uleb128 0x26
-	.4byte	.LASF414
-	.byte	0x1b
-	.byte	0x2c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_vendor_region_num
-	.uleb128 0x26
-	.4byte	.LASF415
-	.byte	0x1b
-	.byte	0x2e
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_map_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF416
-	.byte	0x1b
-	.byte	0x2f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.uleb128 0x26
-	.4byte	.LASF417
-	.byte	0x1b
-	.byte	0x30
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_vendor_blks
-	.uleb128 0x26
-	.4byte	.LASF418
-	.byte	0x1b
-	.byte	0x31
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_vendor_part_size
-	.uleb128 0x26
-	.4byte	.LASF419
-	.byte	0x1b
-	.byte	0x32
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF420
-	.byte	0x1b
-	.byte	0x33
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_init_sys_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF421
-	.byte	0x1b
-	.byte	0x34
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_sys_blks
-	.uleb128 0x26
-	.4byte	.LASF422
-	.byte	0x1b
-	.byte	0x35
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF423
-	.byte	0x1b
-	.byte	0x36
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_data_op_blks_per_plane
-	.uleb128 0x26
-	.4byte	.LASF424
-	.byte	0x1b
-	.byte	0x37
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_max_data_blks
-	.uleb128 0x26
-	.4byte	.LASF425
-	.byte	0x1b
-	.byte	0x38
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_power_lost_recovery_flag
-	.uleb128 0x26
-	.4byte	.LASF426
-	.byte	0x1b
-	.byte	0x3a
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalSysVersion
-	.uleb128 0x26
-	.4byte	.LASF427
-	.byte	0x1b
-	.byte	0x3b
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_GlobalDataVersion
-	.uleb128 0x26
-	.4byte	.LASF428
-	.byte	0x1b
-	.byte	0x3c
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbaSector
-	.uleb128 0x26
-	.4byte	.LASF429
-	.byte	0x1b
-	.byte	0x3d
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLpn
-	.uleb128 0x26
-	.4byte	.LASF430
-	.byte	0x1b
-	.byte	0x3e
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_VaildLpn
-	.uleb128 0x26
-	.4byte	.LASF431
-	.byte	0x1b
-	.byte	0x3f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_MaxLbn
-	.uleb128 0x26
-	.4byte	.LASF432
-	.byte	0x1b
-	.byte	0x41
-	.4byte	0xf72
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gBbtInfo
-	.uleb128 0x26
-	.4byte	.LASF433
-	.byte	0x1b
-	.byte	0x42
-	.4byte	0xff8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysInfo
-	.uleb128 0x26
-	.4byte	.LASF434
-	.byte	0x1b
-	.byte	0x43
-	.4byte	0x1595
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.uleb128 0x26
-	.4byte	.LASF435
-	.byte	0x1b
-	.byte	0x44
-	.4byte	0x1040
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gL2pMapInfo
-	.uleb128 0x26
-	.4byte	.LASF436
-	.byte	0x1b
-	.byte	0x45
-	.4byte	0x1040
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gVendorBlkInfo
-	.uleb128 0x26
-	.4byte	.LASF437
-	.byte	0x1b
-	.byte	0x46
-	.4byte	0xde6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_sys
-	.uleb128 0x26
-	.4byte	.LASF438
-	.byte	0x1b
-	.byte	0x47
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_read
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xde6
-	.uleb128 0x26
-	.4byte	.LASF439
-	.byte	0x1b
-	.byte	0x48
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_prgm
-	.uleb128 0x26
-	.4byte	.LASF440
-	.byte	0x1b
-	.byte	0x49
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_erase
-	.uleb128 0x26
-	.4byte	.LASF441
-	.byte	0x1b
-	.byte	0x4a
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc
-	.uleb128 0x26
-	.4byte	.LASF442
-	.byte	0x1b
-	.byte	0x4b
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	req_gc_dst
-	.uleb128 0xa
-	.4byte	0xdaf
-	.4byte	0x1a53
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF443
-	.byte	0x1b
-	.byte	0x4d
-	.4byte	0x1a43
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_plane_order_table
-	.uleb128 0x26
-	.4byte	.LASF444
-	.byte	0x1b
-	.byte	0x4f
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf
-	.uleb128 0x26
-	.4byte	.LASF445
-	.byte	0x1b
-	.byte	0x50
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_data_buf_1
-	.uleb128 0x26
-	.4byte	.LASF446
-	.byte	0x1b
-	.byte	0x51
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_data_buf
-	.uleb128 0x26
-	.4byte	.LASF447
-	.byte	0x1b
-	.byte	0x52
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.uleb128 0x26
-	.4byte	.LASF448
-	.byte	0x1b
-	.byte	0x53
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_0
-	.uleb128 0x26
-	.4byte	.LASF449
-	.byte	0x1b
-	.byte	0x54
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_data_buf_1
-	.uleb128 0x26
-	.4byte	.LASF450
-	.byte	0x1b
-	.byte	0x55
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_io_spare_buf
-	.uleb128 0x26
-	.4byte	.LASF451
-	.byte	0x1b
-	.byte	0x56
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_spare_buf
-	.uleb128 0x26
-	.4byte	.LASF452
-	.byte	0x1b
-	.byte	0x57
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_data_buf
-	.uleb128 0x26
-	.4byte	.LASF453
-	.byte	0x1b
-	.byte	0x58
-	.4byte	0x1b0e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_gc_page_buf_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x16c7
-	.uleb128 0x26
-	.4byte	.LASF454
-	.byte	0x1b
-	.byte	0x59
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_gc_page_buf_num
-	.uleb128 0x26
-	.4byte	.LASF455
-	.byte	0x1b
-	.byte	0x5a
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_num_req
-	.uleb128 0x26
-	.4byte	.LASF456
-	.byte	0x1b
-	.byte	0x5b
-	.4byte	0x1b47
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_ect_tbl_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x112c
-	.uleb128 0x26
-	.4byte	.LASF457
-	.byte	0x1b
-	.byte	0x5c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_info_size
-	.uleb128 0x26
-	.4byte	.LASF458
-	.byte	0x1b
-	.byte	0x5d
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_erase_count_table
-	.uleb128 0x26
-	.4byte	.LASF459
-	.byte	0x1b
-	.byte	0x5f
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_swl_mul_table
-	.uleb128 0x26
-	.4byte	.LASF460
-	.byte	0x1b
-	.byte	0x60
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_swl_count
-	.uleb128 0x26
-	.4byte	.LASF461
-	.byte	0x1b
-	.byte	0x61
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.uleb128 0x26
-	.4byte	.LASF462
-	.byte	0x1b
-	.byte	0x62
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_valid_page_count_check_table
-	.uleb128 0x26
-	.4byte	.LASF463
-	.byte	0x1b
-	.byte	0x63
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_blk_mode_table
-	.uleb128 0x26
-	.4byte	.LASF464
-	.byte	0x1b
-	.byte	0x65
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_table
-	.uleb128 0x26
-	.4byte	.LASF465
-	.byte	0x1b
-	.byte	0x66
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_valid_page_count
-	.uleb128 0x26
-	.4byte	.LASF466
-	.byte	0x1b
-	.byte	0x67
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_block_ver_table
-	.uleb128 0x26
-	.4byte	.LASF467
-	.byte	0x1b
-	.byte	0x68
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_map_region_ppn_table
-	.uleb128 0x26
-	.4byte	.LASF468
-	.byte	0x1b
-	.byte	0x69
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_map_block
-	.uleb128 0x26
-	.4byte	.LASF469
-	.byte	0x1b
-	.byte	0x6b
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_table
-	.uleb128 0x26
-	.4byte	.LASF470
-	.byte	0x1b
-	.byte	0x6c
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_valid_page_count
-	.uleb128 0x26
-	.4byte	.LASF471
-	.byte	0x1b
-	.byte	0x6d
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_block_ver_table
-	.uleb128 0x26
-	.4byte	.LASF472
-	.byte	0x1b
-	.byte	0x6e
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_vendor_region_ppn_table
-	.uleb128 0x26
-	.4byte	.LASF473
-	.byte	0x1b
-	.byte	0x6f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_vendor_block
-	.uleb128 0x26
-	.4byte	.LASF474
-	.byte	0x1b
-	.byte	0x71
-	.4byte	0x1c7f
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_ram_map
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x10ef
-	.uleb128 0x26
-	.4byte	.LASF475
-	.byte	0x1b
-	.byte	0x72
-	.4byte	0xff2
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_l2p_map_buf
-	.uleb128 0x26
-	.4byte	.LASF476
-	.byte	0x1b
-	.byte	0x73
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_l2p_last_update_region_id
-	.uleb128 0x26
-	.4byte	.LASF477
-	.byte	0x1b
-	.byte	0x7a
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1564
-	.uleb128 0x26
-	.4byte	.LASF478
-	.byte	0x1b
-	.byte	0x7b
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_free_data_block_list_head
-	.uleb128 0x26
-	.4byte	.LASF479
-	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_head
-	.uleb128 0x26
-	.4byte	.LASF480
-	.byte	0x1b
-	.byte	0x7e
-	.4byte	0x1cb8
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_data_block_list_tail
-	.uleb128 0x26
-	.4byte	.LASF481
-	.byte	0x1b
-	.byte	0x7f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.uleb128 0x26
-	.4byte	.LASF482
-	.byte	0x1b
-	.byte	0x80
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.uleb128 0x26
-	.4byte	.LASF483
-	.byte	0x1b
-	.byte	0x81
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_active_superblock
-	.uleb128 0x26
-	.4byte	.LASF484
-	.byte	0x1b
-	.byte	0x82
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_buffer_superblock
-	.uleb128 0x26
-	.4byte	.LASF485
-	.byte	0x1b
-	.byte	0x83
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.uleb128 0x26
-	.4byte	.LASF486
-	.byte	0x1b
-	.byte	0x84
-	.4byte	0x15f0
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_superblock
-	.uleb128 0x26
-	.4byte	.LASF487
-	.byte	0x1b
-	.byte	0x85
-	.4byte	0x1d68
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gp_last_act_superblock
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x15f0
-	.uleb128 0x26
-	.4byte	.LASF488
-	.byte	0x1b
-	.byte	0x86
-	.4byte	0x1311
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_save_data
-	.uleb128 0x26
-	.4byte	.LASF489
-	.byte	0x1b
-	.byte	0x87
-	.4byte	0x140e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_sys_ext_data
-	.uleb128 0x26
-	.4byte	.LASF490
-	.byte	0x1b
-	.byte	0x89
-	.4byte	0x1da1
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_page_info
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1692
-	.uleb128 0x26
-	.4byte	.LASF491
-	.byte	0x1b
-	.byte	0x8a
-	.4byte	0x10e9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	p_gc_blk_tbl
-	.uleb128 0x26
-	.4byte	.LASF492
-	.byte	0x1b
-	.byte	0x8b
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_num
-	.uleb128 0x26
-	.4byte	.LASF493
-	.byte	0x1b
-	.byte	0x8c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_page_offset
-	.uleb128 0x26
-	.4byte	.LASF494
-	.byte	0x1b
-	.byte	0x8d
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x26
-	.4byte	.LASF495
-	.byte	0x1b
-	.byte	0x8e
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x26
-	.4byte	.LASF496
-	.byte	0x1b
-	.byte	0x8f
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk
-	.uleb128 0x26
-	.4byte	.LASF497
-	.byte	0x1b
-	.byte	0x90
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_next_blk_1
-	.uleb128 0x26
-	.4byte	.LASF498
-	.byte	0x1b
-	.byte	0x91
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_num
-	.uleb128 0x26
-	.4byte	.LASF499
-	.byte	0x1b
-	.byte	0x92
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_gc_index
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x1e50
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x10
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF500
-	.byte	0x1b
-	.byte	0x93
-	.4byte	0x1e40
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x26
-	.4byte	.LASF501
-	.byte	0x1b
-	.byte	0x95
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_free_blk_threshold
-	.uleb128 0x26
-	.4byte	.LASF502
-	.byte	0x1b
-	.byte	0x96
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x26
-	.4byte	.LASF503
-	.byte	0x1b
-	.byte	0x97
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_blk_index
-	.uleb128 0x26
-	.4byte	.LASF504
-	.byte	0x1b
-	.byte	0x99
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_gc_page_count
-	.uleb128 0x26
-	.4byte	.LASF505
-	.byte	0x1b
-	.byte	0x9a
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_page_count
-	.uleb128 0x26
-	.4byte	.LASF506
-	.byte	0x1b
-	.byte	0x9b
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_write_sector
-	.uleb128 0x26
-	.4byte	.LASF507
-	.byte	0x1b
-	.byte	0x9c
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_sector
-	.uleb128 0x26
-	.4byte	.LASF508
-	.byte	0x1b
-	.byte	0x9e
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_discard_page_count
-	.uleb128 0x26
-	.4byte	.LASF509
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_read_page_count
-	.uleb128 0x26
-	.4byte	.LASF510
-	.byte	0x1b
-	.byte	0xa0
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_tmp_data_superblock_id
-	.uleb128 0x26
-	.4byte	.LASF511
-	.byte	0x1b
-	.byte	0xa1
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_cache_write_count
-	.uleb128 0x26
-	.4byte	.LASF512
-	.byte	0x1b
-	.byte	0xa2
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_l2p_write_count
-	.uleb128 0x26
-	.4byte	.LASF513
-	.byte	0x1b
-	.byte	0xa4
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_mlc_erase_count
-	.uleb128 0x26
-	.4byte	.LASF514
-	.byte	0x1b
-	.byte	0xa5
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_avg_erase_count
-	.uleb128 0x26
-	.4byte	.LASF515
-	.byte	0x1b
-	.byte	0xa6
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_min_erase_count
-	.uleb128 0x26
-	.4byte	.LASF516
-	.byte	0x1b
-	.byte	0xa7
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_slc_erase_count
-	.uleb128 0x26
-	.4byte	.LASF517
-	.byte	0x1b
-	.byte	0xa8
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_totle_sys_slc_erase_count
-	.uleb128 0x26
-	.4byte	.LASF518
-	.byte	0x1b
-	.byte	0xa9
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_max_erase_count
-	.uleb128 0x26
-	.4byte	.LASF519
-	.byte	0x1b
-	.byte	0xaa
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_gc_progress
-	.uleb128 0x26
-	.4byte	.LASF520
-	.byte	0x1b
-	.byte	0xab
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_in_swl_replace
-	.uleb128 0x26
-	.4byte	.LASF521
-	.byte	0x1b
-	.byte	0xac
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ftl_nand_free_count
-	.uleb128 0x26
-	.4byte	.LASF522
-	.byte	0x1b
-	.byte	0xad
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block
-	.uleb128 0x26
-	.4byte	.LASF523
-	.byte	0x1b
-	.byte	0xae
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_head_data_block_count
-	.uleb128 0x26
-	.4byte	.LASF524
-	.byte	0x1b
-	.byte	0xaf
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_gc_skip_write_count
-	.uleb128 0x26
-	.4byte	.LASF525
-	.byte	0x1b
-	.byte	0xb0
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_cur_erase_blk
-	.uleb128 0x26
-	.4byte	.LASF526
-	.byte	0x1b
-	.byte	0xb2
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_num
-	.uleb128 0x26
-	.4byte	.LASF527
-	.byte	0x1b
-	.byte	0xb3
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_page_min_ver
-	.uleb128 0xa
-	.4byte	0xdc5
-	.4byte	0x203c
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x26
-	.4byte	.LASF528
-	.byte	0x1b
-	.byte	0xb4
-	.4byte	0x202c
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_recovery_ppa_tbl
-	.uleb128 0x26
-	.4byte	.LASF529
-	.byte	0x1b
-	.byte	0xb5
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	c_mlc_erase_count_value
-	.uleb128 0x26
-	.4byte	.LASF530
-	.byte	0x1b
-	.byte	0xb6
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_power_lost_recovery_flag
-	.uleb128 0x4
-	.4byte	.LASF531
-	.byte	0x18
-	.byte	0x14
-	.4byte	0xe35
-	.uleb128 0x4
-	.4byte	.LASF532
-	.byte	0x18
-	.byte	0x15
-	.4byte	0xe35
-	.uleb128 0x4
-	.4byte	.LASF533
-	.byte	0x18
-	.byte	0x16
-	.4byte	0xed7
-	.uleb128 0xa
-	.4byte	0xb5
-	.4byte	0x20a1
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF534
-	.byte	0x18
-	.byte	0x17
-	.4byte	0x2090
-	.uleb128 0x26
-	.4byte	.LASF535
-	.byte	0x3
-	.byte	0x6
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	DeviceCapacity
-	.uleb128 0x26
-	.4byte	.LASF536
-	.byte	0x3
-	.byte	0x7
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gFtlInitStatus
-	.uleb128 0x4
-	.4byte	.LASF537
-	.byte	0x3
-	.byte	0x6d
-	.4byte	0xdc5
-	.uleb128 0x4
-	.4byte	.LASF538
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0xdc5
-	.uleb128 0x4
-	.4byte	.LASF539
-	.byte	0x3
-	.byte	0x6f
-	.4byte	0xdc5
-	.uleb128 0x4
-	.4byte	.LASF540
-	.byte	0x3
-	.byte	0x70
-	.4byte	0xdc5
-	.uleb128 0x27
-	.4byte	.LASF541
-	.byte	0x3
-	.2byte	0x3bc
-	.4byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	power_up_flag
-	.uleb128 0x28
-	.4byte	.LASF545
-	.byte	0x3
-	.2byte	0x45f
-	.4byte	0xdc5
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_discard_updated
-	.uleb128 0x27
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x38c
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_ect_tbl_power_up_flush
-	.uleb128 0x27
-	.4byte	.LASF543
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	FtlUpdateVaildLpnCount
-	.uleb128 0xa
-	.4byte	0xdba
-	.4byte	0x2153
-	.uleb128 0x15
-	.4byte	0xd6
-	.2byte	0x1fff
-	.byte	0
-	.uleb128 0x27
-	.4byte	.LASF544
-	.byte	0x2
-	.2byte	0x8df
-	.4byte	0x2142
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_vpc_table
-	.uleb128 0x29
-	.4byte	.LASF546
-	.byte	0x5
-	.byte	0x6d
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_gc_temp_block_bops_scan_page_addr
-	.uleb128 0x27
-	.4byte	.LASF547
-	.byte	0x5
-	.2byte	0x1d4
-	.4byte	0xdba
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	gc_ink_free_return_value
-	.uleb128 0xc
-	.4byte	.LASF548
-	.byte	0x1c
-	.2byte	0x3ba
-	.4byte	0x107
-	.uleb128 0xc
-	.4byte	.LASF549
-	.byte	0x1c
-	.2byte	0x3bb
-	.4byte	0x107
-	.uleb128 0xc
-	.4byte	.LASF550
-	.byte	0x1c
-	.2byte	0x3bc
-	.4byte	0x107
-	.uleb128 0xf
-	.4byte	.LASF551
-	.byte	0x4
-	.byte	0x6
-	.byte	0xc
-	.4byte	0x21c5
-	.uleb128 0x16
-	.ascii	"pid\000"
-	.byte	0x6
-	.byte	0xd
-	.4byte	0x50
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF552
-	.byte	0x6
-	.byte	0x10
-	.4byte	0x21d0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x21ac
-	.uleb128 0x2a
-	.4byte	0x207a
-	.byte	0x1
-	.byte	0x10
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_nand_phy_info
-	.uleb128 0x2a
-	.4byte	0x2085
-	.byte	0x1
-	.byte	0x11
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_nand_ops
-	.uleb128 0x29
-	.4byte	.LASF553
-	.byte	0x1
-	.byte	0x13
-	.4byte	0x2090
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_buf
-	.uleb128 0x2a
-	.4byte	0x20a1
-	.byte	0x1
-	.byte	0x14
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	ftl_temp_buf
-	.uleb128 0xa
-	.4byte	0xb5
-	.4byte	0x221e
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x29
-	.4byte	.LASF554
-	.byte	0x1
-	.byte	0x15
-	.4byte	0x220e
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	check_spare_buf
-	.uleb128 0x2b
-	.4byte	.LASF557
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x50
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2295
-	.uleb128 0x2c
-	.4byte	.LASF555
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x128
-	.4byte	.LLST454
-	.uleb128 0x2c
-	.4byte	.LASF556
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x128
-	.4byte	.LLST455
-	.uleb128 0x2c
-	.4byte	.LASF325
-	.byte	0x1
-	.byte	0xfb
-	.4byte	0x7b
-	.4byte	.LLST456
-	.uleb128 0x2d
-	.4byte	.LVL2061
-	.4byte	0x9292
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF558
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x128
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x22fb
-	.uleb128 0x2c
-	.4byte	.LASF559
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x128
-	.4byte	.LLST287
-	.uleb128 0x2c
-	.4byte	.LASF560
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x16b
-	.4byte	.LLST288
-	.uleb128 0x2c
-	.4byte	.LASF30
-	.byte	0x1
-	.byte	0xf6
-	.4byte	0x7b
-	.4byte	.LLST289
-	.uleb128 0x2d
-	.4byte	.LVL1170
-	.4byte	0x929d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF561
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x128
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x235b
-	.uleb128 0x2f
-	.ascii	"s\000"
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x128
-	.4byte	.LLST191
-	.uleb128 0x2f
-	.ascii	"c\000"
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x50
-	.4byte	.LLST192
-	.uleb128 0x2f
-	.ascii	"n\000"
-	.byte	0x1
-	.byte	0xf1
-	.4byte	0x7b
-	.4byte	.LLST193
-	.uleb128 0x2d
-	.4byte	.LVL706
-	.4byte	0x92a9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF562
-	.byte	0x1
-	.byte	0xdf
-	.4byte	0xaa
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x23ff
-	.uleb128 0x2c
-	.4byte	.LASF563
-	.byte	0x1
-	.byte	0xdf
-	.4byte	0xf28
-	.4byte	.LLST284
-	.uleb128 0x2f
-	.ascii	"die\000"
-	.byte	0x1
-	.byte	0xdf
-	.4byte	0xb5
-	.4byte	.LLST285
-	.uleb128 0x30
-	.4byte	.LASF325
-	.byte	0x1
-	.byte	0xe1
-	.4byte	0x9f
-	.4byte	.LLST286
-	.uleb128 0x31
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xe1
-	.4byte	0x9f
-	.uleb128 0x32
-	.4byte	.LVL1162
-	.4byte	0x22fb
-	.4byte	0x23cb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x100
-	.byte	0
-	.uleb128 0x33
-	.4byte	.LVL1163
-	.4byte	0x23e1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1166
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x100
-	.byte	0
-	.byte	0
-	.uleb128 0x35
-	.4byte	.LASF588
-	.byte	0x1
-	.byte	0xc4
-	.4byte	0xdd0
-	.byte	0x1
-	.4byte	0x2443
-	.uleb128 0x36
-	.4byte	.LASF576
-	.byte	0x1
-	.byte	0xc4
-	.4byte	0xdba
-	.uleb128 0x31
-	.ascii	"sts\000"
-	.byte	0x1
-	.byte	0xc6
-	.4byte	0xdd0
-	.uleb128 0x37
-	.4byte	.LASF564
-	.byte	0x1
-	.byte	0xc7
-	.4byte	0x2443
-	.uleb128 0x31
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0xc8
-	.4byte	0xde6
-	.uleb128 0x38
-	.ascii	"out\000"
-	.byte	0x1
-	.byte	0xda
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xdc5
-	.4byte	0x2453
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xf
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF565
-	.byte	0x1
-	.byte	0xae
-	.4byte	0xaa
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2509
-	.uleb128 0x2c
-	.4byte	.LASF566
-	.byte	0x1
-	.byte	0xae
-	.4byte	0x128
-	.4byte	.LLST164
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x1
-	.byte	0xae
-	.4byte	0xb5
-	.4byte	.LLST165
-	.uleb128 0x2c
-	.4byte	.LASF568
-	.byte	0x1
-	.byte	0xae
-	.4byte	0xb5
-	.4byte	.LLST166
-	.uleb128 0x3a
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x3a
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x30
-	.4byte	.LASF276
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.4byte	.LLST167
-	.uleb128 0x29
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0xb0
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x3b
-	.ascii	"req\000"
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-	.byte	0xb1
-	.4byte	0x19f9
-	.4byte	.LLST168
-	.uleb128 0x29
-	.4byte	.LASF570
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-	.byte	0xb2
-	.4byte	0xb5
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x34
-	.4byte	.LVL620
-	.4byte	0x83a0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x3c
-	.4byte	0x27b6
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 -4
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF571
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xaa
-	.4byte	.LFB345
-	.4byte	.LFE345-.LFB345
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2693
-	.uleb128 0x2c
-	.4byte	.LASF566
-	.byte	0x1
-	.byte	0x72
-	.4byte	0x128
-	.4byte	.LLST156
-	.uleb128 0x2c
-	.4byte	.LASF568
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xb5
-	.4byte	.LLST157
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xb5
-	.4byte	.LLST158
-	.uleb128 0x2c
-	.4byte	.LASF572
-	.byte	0x1
-	.byte	0x72
-	.4byte	0xb5
-	.4byte	.LLST159
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.4byte	.LLST160
-	.uleb128 0x3a
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x30
-	.4byte	.LASF276
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.4byte	.LLST161
-	.uleb128 0x29
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0x74
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x30
-	.4byte	.LASF570
-	.byte	0x1
-	.byte	0x75
-	.4byte	0xb5
-	.4byte	.LLST162
-	.uleb128 0x3b
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x76
-	.4byte	0x19f9
-	.4byte	.LLST163
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10327
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xa0
-	.4byte	0x263a
-	.uleb128 0x29
-	.4byte	.LASF574
-	.byte	0x1
-	.byte	0x91
-	.4byte	0xde6
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x32
-	.4byte	.LVL608
-	.4byte	0x26a8
-	.4byte	0x25f8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL609
-	.4byte	0x92b5
-	.4byte	0x260f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC79
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL610
-	.4byte	0x92b5
-	.4byte	0x2626
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC80
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL611
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC81
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL601
-	.4byte	0x92b5
-	.4byte	0x2660
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR109
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x7a
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL602
-	.4byte	0x83a0
-	.4byte	0x2682
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x3c
-	.4byte	0x27b6
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LVL603
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x3f
-	.4byte	.LVL605
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x26a3
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xe
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x2693
-	.uleb128 0x2b
-	.4byte	.LASF575
-	.byte	0x1
-	.byte	0x54
-	.4byte	0xaa
-	.4byte	.LFB344
-	.4byte	.LFE344-.LFB344
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x27a6
-	.uleb128 0x2c
-	.4byte	.LASF566
-	.byte	0x1
-	.byte	0x54
-	.4byte	0x128
-	.4byte	.LLST145
-	.uleb128 0x2c
-	.4byte	.LASF568
-	.byte	0x1
-	.byte	0x54
-	.4byte	0xb5
-	.4byte	.LLST146
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x1
-	.byte	0x54
-	.4byte	0xb5
-	.4byte	.LLST147
-	.uleb128 0x3a
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3a
-	.ascii	"cs\000"
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x30
-	.4byte	.LASF276
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.4byte	.LLST148
-	.uleb128 0x29
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0x56
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x29
-	.4byte	.LASF570
-	.byte	0x1
-	.byte	0x57
-	.4byte	0xb5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x3a
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x58
-	.4byte	0x19f9
-	.uleb128 0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.10310
-	.uleb128 0x32
-	.4byte	.LVL558
-	.4byte	0x92b5
-	.4byte	0x2773
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR104
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x5c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL559
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-	.4byte	0x2795
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x3c
-	.4byte	0x27b6
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LVL560
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x3f
-	.4byte	.LVL562
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x40
-	.4byte	.LASF883
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0xb5
-	.byte	0x1
-	.4byte	0x2825
-	.uleb128 0x41
-	.ascii	"req\000"
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0x19f9
-	.uleb128 0x36
-	.4byte	.LASF569
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0xe2f
-	.uleb128 0x36
-	.4byte	.LASF577
-	.byte	0x1
-	.byte	0x3a
-	.4byte	0xe2f
-	.uleb128 0x37
-	.4byte	.LASF578
-	.byte	0x1
-	.byte	0x3c
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF579
-	.byte	0x1
-	.byte	0x3c
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF285
-	.byte	0x1
-	.byte	0x3d
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF286
-	.byte	0x1
-	.byte	0x3d
-	.4byte	0x9f
-	.uleb128 0x37
-	.4byte	.LASF580
-	.byte	0x1
-	.byte	0x3e
-	.4byte	0xb5
-	.uleb128 0x37
-	.4byte	.LASF277
-	.byte	0x1
-	.byte	0x3f
-	.4byte	0xb5
-	.uleb128 0x37
-	.4byte	.LASF581
-	.byte	0x1
-	.byte	0x40
-	.4byte	0xb5
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF584
-	.byte	0x1
-	.byte	0x20
-	.4byte	.LFB342
-	.4byte	.LFE342-.LFB342
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2911
-	.uleb128 0x2f
-	.ascii	"s\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0xf6
-	.4byte	.LLST136
-	.uleb128 0x2f
-	.ascii	"buf\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x128
-	.4byte	.LLST137
-	.uleb128 0x2c
-	.4byte	.LASF582
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x50
-	.4byte	.LLST138
-	.uleb128 0x2f
-	.ascii	"len\000"
-	.byte	0x1
-	.byte	0x20
-	.4byte	0x50
-	.4byte	.LLST139
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x1
-	.byte	0x22
-	.4byte	0xb5
-	.4byte	.LLST140
-	.uleb128 0x3b
-	.ascii	"j\000"
-	.byte	0x1
-	.byte	0x22
-	.4byte	0xb5
-	.4byte	.LLST141
-	.uleb128 0x3b
-	.ascii	"p8\000"
-	.byte	0x1
-	.byte	0x23
-	.4byte	0xf6
-	.4byte	.LLST142
-	.uleb128 0x3b
-	.ascii	"p16\000"
-	.byte	0x1
-	.byte	0x24
-	.4byte	0x2911
-	.4byte	.LLST143
-	.uleb128 0x3b
-	.ascii	"p32\000"
-	.byte	0x1
-	.byte	0x25
-	.4byte	0xe2f
-	.4byte	.LLST144
-	.uleb128 0x43
-	.4byte	.LVL547
-	.4byte	0x92b5
-	.4byte	0x28d1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC78
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL548
-	.4byte	0x92b5
-	.4byte	0x28f4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC75
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL550
-	.4byte	0x92b5
-	.uleb128 0x34
-	.4byte	.LVL552
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC78
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x69
-	.uleb128 0x2b
-	.4byte	.LASF583
-	.byte	0x1
-	.byte	0x1b
-	.4byte	0x128
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-	.4byte	.LFE341-.LFB341
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2956
-	.uleb128 0x2c
-	.4byte	.LASF30
-	.byte	0x1
-	.byte	0x1b
-	.4byte	0x50
-	.4byte	.LLST135
-	.uleb128 0x2d
-	.4byte	.LVL542
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x42
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-	.byte	0x1
-	.byte	0x17
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-	.4byte	.LFE340-.LFB340
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x29a5
-	.uleb128 0x2f
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-	.byte	0x1
-	.byte	0x17
-	.4byte	0x128
-	.4byte	.LLST133
-	.uleb128 0x45
-	.4byte	0x29a5
-	.4byte	.LBB235
-	.4byte	.LBE235-.LBB235
-	.byte	0x1
-	.byte	0x19
-	.uleb128 0x46
-	.4byte	0x29b1
-	.4byte	.LLST134
-	.uleb128 0x2d
-	.4byte	.LVL540
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0
-	.byte	0
-	.uleb128 0x47
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-	.byte	0x4e
-	.byte	0x3
-	.4byte	0x29bd
-	.uleb128 0x36
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-	.byte	0x4e
-	.4byte	0x16b
-	.byte	0
-	.uleb128 0x48
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-	.4byte	.LFE323-.LFB323
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x29ec
-	.uleb128 0x2d
-	.4byte	.LVL1816
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF589
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x2ab9
-	.uleb128 0x4a
-	.4byte	.LASF590
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0xdc5
-	.uleb128 0x4a
-	.4byte	.LASF591
-	.byte	0x5
-	.2byte	0x1d5
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF592
-	.byte	0x5
-	.2byte	0x1d7
-	.4byte	0xdba
-	.uleb128 0x4c
-	.ascii	"lpa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0xdc5
-	.uleb128 0x4c
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1d8
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF593
-	.byte	0x5
-	.2byte	0x1d9
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF299
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF594
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF595
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF596
-	.byte	0x5
-	.2byte	0x1da
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF597
-	.byte	0x5
-	.2byte	0x1db
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF598
-	.byte	0x5
-	.2byte	0x1dc
-	.4byte	0x2ab9
-	.uleb128 0x4d
-	.4byte	.LASF599
-	.byte	0x5
-	.2byte	0x272
-	.uleb128 0x4d
-	.4byte	.LASF600
-	.byte	0x5
-	.2byte	0x275
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x2acf
-	.4byte	.LASF589
-	.uleb128 0x4f
-	.uleb128 0x4b
-	.4byte	.LASF601
-	.byte	0x5
-	.2byte	0x1f3
-	.4byte	0xdba
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1229
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x2acf
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x16
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x2abf
-	.uleb128 0x49
-	.4byte	.LASF602
-	.byte	0x5
-	.2byte	0x1a2
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x2b34
-	.uleb128 0x4c
-	.ascii	"ret\000"
-	.byte	0x5
-	.2byte	0x1a4
-	.4byte	0x50
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x1a5
-	.4byte	0x50
-	.uleb128 0x4c
-	.ascii	"ppa\000"
-	.byte	0x5
-	.2byte	0x1a6
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF564
-	.byte	0x5
-	.2byte	0x1a7
-	.4byte	0x2443
-	.uleb128 0x50
-	.4byte	0x2b25
-	.uleb128 0x4b
-	.4byte	.LASF603
-	.byte	0x5
-	.2byte	0x1b1
-	.4byte	0xde6
-	.byte	0
-	.uleb128 0x4f
-	.uleb128 0x4b
-	.4byte	.LASF604
-	.byte	0x5
-	.2byte	0x1c6
-	.4byte	0xdc5
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF605
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x2b7e
-	.uleb128 0x4a
-	.4byte	.LASF606
-	.byte	0x5
-	.2byte	0x185
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF594
-	.byte	0x5
-	.2byte	0x187
-	.4byte	0xdba
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0xdba
-	.uleb128 0x4c
-	.ascii	"j\000"
-	.byte	0x5
-	.2byte	0x188
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x189
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x51
-	.4byte	.LASF714
-	.byte	0x5
-	.2byte	0x17a
-	.4byte	0x50
-	.byte	0x1
-	.uleb128 0x48
-	.4byte	.LASF607
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0x50
-	.4byte	.LFB318
-	.4byte	.LFE318-.LFB318
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c15
-	.uleb128 0x52
-	.4byte	.LASF388
-	.byte	0x5
-	.2byte	0x166
-	.4byte	0xdba
-	.4byte	.LLST130
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x168
-	.4byte	0xdba
-	.4byte	.LLST131
-	.uleb128 0x54
-	.4byte	.LASF608
-	.byte	0x5
-	.2byte	0x169
-	.4byte	0xdba
-	.4byte	.LLST132
-	.uleb128 0x32
-	.4byte	.LVL527
-	.4byte	0x616f
-	.4byte	0x2be7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL529
-	.4byte	0x92b5
-	.4byte	0x2c04
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC74
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL530
-	.4byte	0x2c15
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF609
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0x50
-	.4byte	.LFB317
-	.4byte	.LFE317-.LFB317
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2c59
-	.uleb128 0x52
-	.4byte	.LASF586
-	.byte	0x5
-	.2byte	0x158
-	.4byte	0xdba
-	.4byte	.LLST129
-	.uleb128 0x34
-	.4byte	.LVL525
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC73
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF610
-	.byte	0x5
-	.2byte	0x13b
-	.4byte	0xdc5
-	.4byte	.LFB316
-	.4byte	.LFE316-.LFB316
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2cfd
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x5
-	.2byte	0x13d
-	.4byte	0xdba
-	.4byte	.LLST395
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x5
-	.2byte	0x13e
-	.4byte	0x2ab9
-	.4byte	.LLST396
-	.uleb128 0x32
-	.4byte	.LVL1703
-	.4byte	0x2509
-	.4byte	0x2cab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1704
-	.4byte	0x31c7
-	.4byte	0x2cc5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1705
-	.4byte	0x2f28
-	.4byte	0x2cd8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1707
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1708
-	.4byte	0x663d
-	.uleb128 0x44
-	.4byte	.LVL1709
-	.4byte	0x2ee1
-	.uleb128 0x44
-	.4byte	.LVL1711
-	.4byte	0x30d0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF611
-	.byte	0x5
-	.2byte	0x12b
-	.4byte	0xdc5
-	.4byte	.LFB315
-	.4byte	.LFE315-.LFB315
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2d79
-	.uleb128 0x32
-	.4byte	.LVL1712
-	.4byte	0x2f28
-	.4byte	0x2d2b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1713
-	.4byte	0x34f0
-	.4byte	0x2d3f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1714
-	.4byte	0x536c
-	.uleb128 0x32
-	.4byte	.LVL1715
-	.4byte	0x4fd8
-	.4byte	0x2d5c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1716
-	.4byte	0x4d67
-	.uleb128 0x2d
-	.4byte	.LVL1717
-	.4byte	0x331b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR53
-	.byte	0
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF670
-	.byte	0x5
-	.2byte	0x120
-	.byte	0x1
-	.uleb128 0x2b
-	.4byte	.LASF612
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdc5
-	.4byte	.LFB313
-	.4byte	.LFE313-.LFB313
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2ee1
-	.uleb128 0x2c
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x1d68
-	.4byte	.LLST271
-	.uleb128 0x2c
-	.4byte	.LASF614
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdc5
-	.4byte	.LLST272
-	.uleb128 0x30
-	.4byte	.LASF596
-	.byte	0x5
-	.byte	0xd4
-	.4byte	0xdba
-	.4byte	.LLST273
-	.uleb128 0x30
-	.4byte	.LASF568
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdba
-	.4byte	.LLST274
-	.uleb128 0x3b
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdba
-	.4byte	.LLST275
-	.uleb128 0x30
-	.4byte	.LASF594
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdba
-	.4byte	.LLST276
-	.uleb128 0x30
-	.4byte	.LASF382
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdba
-	.4byte	.LLST277
-	.uleb128 0x30
-	.4byte	.LASF380
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdba
-	.4byte	.LLST278
-	.uleb128 0x30
-	.4byte	.LASF615
-	.byte	0x5
-	.byte	0xd7
-	.4byte	0xdc5
-	.4byte	.LLST279
-	.uleb128 0x30
-	.4byte	.LASF616
-	.byte	0x5
-	.byte	0xd8
-	.4byte	0xdc5
-	.4byte	.LLST280
-	.uleb128 0x56
-	.4byte	.LASF617
-	.byte	0x5
-	.byte	0xd9
-	.4byte	0xdc5
-	.sleb128 -1
-	.uleb128 0x30
-	.4byte	.LASF598
-	.byte	0x5
-	.byte	0xda
-	.4byte	0x2ab9
-	.4byte	.LLST281
-	.uleb128 0x57
-	.4byte	.LASF618
-	.byte	0x5
-	.byte	0xe1
-	.uleb128 0x57
-	.4byte	.LASF619
-	.byte	0x5
-	.byte	0xe5
-	.uleb128 0x58
-	.4byte	.LASF688
-	.byte	0x5
-	.2byte	0x117
-	.4byte	.L982
-	.uleb128 0x44
-	.4byte	.LVL1108
-	.4byte	0x2ee1
-	.uleb128 0x32
-	.4byte	.LVL1117
-	.4byte	0x26a8
-	.4byte	0x2e90
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1130
-	.4byte	0x61a7
-	.4byte	0x2eab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1136
-	.4byte	0x46e1
-	.4byte	0x2ec5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1139
-	.4byte	0x30d0
-	.uleb128 0x44
-	.4byte	.LVL1143
-	.4byte	0x5e03
-	.uleb128 0x44
-	.4byte	.LVL1145
-	.4byte	0x2ee1
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF620
-	.byte	0x5
-	.byte	0xc9
-	.4byte	.LFB312
-	.4byte	.LFE312-.LFB312
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2f28
-	.uleb128 0x32
-	.4byte	.LVL1103
-	.4byte	0x22fb
-	.4byte	0x2f0a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1104
-	.4byte	0x22fb
-	.4byte	0x2f1e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x59
-	.4byte	.LVL1105
-	.4byte	0x3213
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF621
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x50
-	.4byte	.LFB311
-	.4byte	.LFE311-.LFB311
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x30bb
-	.uleb128 0x2c
-	.4byte	.LASF622
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x50
-	.4byte	.LLST390
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdba
-	.4byte	.LLST391
-	.uleb128 0x30
-	.4byte	.LASF623
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdba
-	.4byte	.LLST392
-	.uleb128 0x29
-	.4byte	.LASF624
-	.byte	0x5
-	.byte	0x72
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x30
-	.4byte	.LASF625
-	.byte	0x5
-	.byte	0x73
-	.4byte	0xdc5
-	.4byte	.LLST393
-	.uleb128 0x29
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0x74
-	.4byte	0x1d68
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	g_gc_temp_superblock
-	.byte	0x9f
-	.uleb128 0x30
-	.4byte	.LASF626
-	.byte	0x5
-	.byte	0x75
-	.4byte	0x1da1
-	.4byte	.LLST394
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x30cb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9940
-	.uleb128 0x32
-	.4byte	.LVL1667
-	.4byte	0x2d82
-	.4byte	0x2fcd
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1668
-	.4byte	0x4fd8
-	.4byte	0x2fe0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1669
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1670
-	.4byte	0x663d
-	.uleb128 0x32
-	.4byte	.LVL1674
-	.4byte	0x92b5
-	.4byte	0x3018
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR171
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1676
-	.4byte	0x3236
-	.4byte	0x302c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1677
-	.4byte	0x5dde
-	.uleb128 0x44
-	.4byte	.LVL1679
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1680
-	.4byte	0x4d67
-	.uleb128 0x32
-	.4byte	.LVL1683
-	.4byte	0x92b5
-	.4byte	0x306d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR171
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1684
-	.4byte	0x526b
-	.4byte	0x3086
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1685
-	.4byte	0x616f
-	.uleb128 0x32
-	.4byte	.LVL1687
-	.4byte	0x526b
-	.4byte	0x30a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1689
-	.4byte	0x3236
-	.uleb128 0x44
-	.4byte	.LVL1693
-	.4byte	0x5e03
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x30cb
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x12
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x30bb
-	.uleb128 0x42
-	.4byte	.LASF627
-	.byte	0x5
-	.byte	0x54
-	.4byte	.LFB310
-	.4byte	.LFE310-.LFB310
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3145
-	.uleb128 0x2c
-	.4byte	.LASF628
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdc5
-	.4byte	.LLST124
-	.uleb128 0x2c
-	.4byte	.LASF391
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdc5
-	.4byte	.LLST125
-	.uleb128 0x2f
-	.ascii	"lpa\000"
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdc5
-	.4byte	.LLST126
-	.uleb128 0x30
-	.4byte	.LASF629
-	.byte	0x5
-	.byte	0x56
-	.4byte	0xdba
-	.4byte	.LLST127
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x57
-	.4byte	0xdba
-	.4byte	.LLST128
-	.uleb128 0x34
-	.4byte	.LVL517
-	.4byte	0x616f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x75
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF630
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdc5
-	.4byte	.LFB309
-	.4byte	.LFE309-.LFB309
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x317b
-	.uleb128 0x2f
-	.ascii	"blk\000"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdba
-	.4byte	.LLST122
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x4b
-	.4byte	0xdba
-	.4byte	.LLST123
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF631
-	.byte	0x5
-	.byte	0x38
-	.4byte	.LFB308
-	.4byte	.LFE308-.LFB308
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x31c7
-	.uleb128 0x5a
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x38
-	.4byte	0x19f9
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x38
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0xdba
-	.4byte	.LLST120
-	.uleb128 0x30
-	.4byte	.LASF633
-	.byte	0x5
-	.byte	0x3b
-	.4byte	0xdba
-	.4byte	.LLST121
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF634
-	.byte	0x5
-	.byte	0x29
-	.4byte	.LFB307
-	.4byte	.LFE307-.LFB307
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3213
-	.uleb128 0x5a
-	.ascii	"req\000"
-	.byte	0x5
-	.byte	0x29
-	.4byte	0x19f9
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5b
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x29
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x2b
-	.4byte	0xdba
-	.4byte	.LLST118
-	.uleb128 0x30
-	.4byte	.LASF633
-	.byte	0x5
-	.byte	0x2c
-	.4byte	0xdba
-	.4byte	.LLST119
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF635
-	.byte	0x5
-	.byte	0x15
-	.4byte	.LFB306
-	.4byte	.LFE306-.LFB306
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3236
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x5
-	.byte	0x17
-	.4byte	0xdba
-	.4byte	.LLST117
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF636
-	.byte	0x2
-	.2byte	0xac6
-	.4byte	0x50
-	.4byte	.LFB305
-	.4byte	.LFE305-.LFB305
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x32c6
-	.uleb128 0x52
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xac6
-	.4byte	0xdba
-	.4byte	.LLST309
-	.uleb128 0x53
-	.ascii	"ret\000"
-	.byte	0x2
-	.2byte	0xac8
-	.4byte	0x50
-	.4byte	.LLST310
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x32d6
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9870
-	.uleb128 0x32
-	.4byte	.LVL1267
-	.4byte	0x92b5
-	.4byte	0x329c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC101
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1271
-	.4byte	0x92b5
-	.4byte	0x32bc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR159
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1274
-	.4byte	0x32db
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x32d6
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x13
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x32c6
-	.uleb128 0x49
-	.4byte	.LASF637
-	.byte	0x2
-	.2byte	0xab1
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x3306
-	.uleb128 0x4a
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xab1
-	.4byte	0xdba
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x3316
-	.4byte	.LASF637
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3316
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xf
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3306
-	.uleb128 0x48
-	.4byte	.LASF638
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0xdc5
-	.4byte	.LFB303
-	.4byte	.LFE303-.LFB303
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x340d
-	.uleb128 0x52
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0x1d68
-	.4byte	.LLST114
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa93
-	.4byte	0xdba
-	.4byte	.LLST115
-	.uleb128 0x54
-	.4byte	.LASF640
-	.byte	0x2
-	.2byte	0xa94
-	.4byte	0xdc5
-	.4byte	.LLST116
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x30cb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9850
-	.uleb128 0x32
-	.4byte	.LVL480
-	.4byte	0x92b5
-	.4byte	0x339b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa96
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL481
-	.4byte	0x92b5
-	.4byte	0x33c2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa97
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL482
-	.4byte	0x92b5
-	.4byte	0x33e9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa98
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL486
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xaad
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF641
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x50
-	.4byte	.LFB302
-	.4byte	.LFE302-.LFB302
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x34db
-	.uleb128 0x52
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x1d68
-	.4byte	.LLST381
-	.uleb128 0x28
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa7b
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x34eb
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9843
-	.uleb128 0x32
-	.4byte	.LVL1629
-	.4byte	0x92b5
-	.4byte	0x347b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR169
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa7c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1630
-	.4byte	0x5dde
-	.4byte	0x348f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1631
-	.4byte	0x32db
-	.uleb128 0x32
-	.4byte	.LVL1632
-	.4byte	0x34f0
-	.4byte	0x34ac
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1633
-	.4byte	0x536c
-	.uleb128 0x32
-	.4byte	.LVL1634
-	.4byte	0x4fd8
-	.4byte	0x34c8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1635
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL1637
-	.4byte	0x5e03
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x34eb
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x34db
-	.uleb128 0x5c
-	.4byte	.LASF642
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x50
-	.4byte	.LFB301
-	.4byte	.LFE301-.LFB301
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x378b
-	.uleb128 0x5d
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x1d68
-	.4byte	.LLST294
-	.uleb128 0x54
-	.4byte	.LASF643
-	.byte	0x2
-	.2byte	0xa17
-	.4byte	0xdba
-	.4byte	.LLST295
-	.uleb128 0x4b
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.4byte	.LLST296
-	.uleb128 0x53
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.4byte	.LLST297
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdba
-	.4byte	.LLST298
-	.uleb128 0x54
-	.4byte	.LASF644
-	.byte	0x2
-	.2byte	0xa19
-	.4byte	0x50
-	.4byte	.LLST299
-	.uleb128 0x54
-	.4byte	.LASF645
-	.byte	0x2
-	.2byte	0xa1a
-	.4byte	0xdba
-	.4byte	.LLST300
-	.uleb128 0x4d
-	.4byte	.LASF646
-	.byte	0x2
-	.2byte	0xa1b
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x379b
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9822
-	.uleb128 0x5e
-	.4byte	0x4b2d
-	.4byte	.LBB280
-	.4byte	.Ldebug_ranges0+0x118
-	.byte	0x2
-	.2byte	0xa4b
-	.4byte	0x35d7
-	.uleb128 0x46
-	.4byte	0x4b46
-	.4byte	.LLST301
-	.uleb128 0x46
-	.4byte	0x4b3a
-	.4byte	.LLST302
-	.uleb128 0x34
-	.4byte	.LVL1223
-	.4byte	0x83fa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x3c
-	.4byte	0x4b46
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1194
-	.4byte	0x92b5
-	.4byte	0x35fe
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa1c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1198
-	.4byte	0x5bb8
-	.4byte	0x3615
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR47
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1200
-	.4byte	0x92b5
-	.4byte	0x363c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1201
-	.4byte	0x3f1b
-	.4byte	0x3650
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1202
-	.4byte	0x5dde
-	.4byte	0x3664
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1203
-	.4byte	0x92b5
-	.4byte	0x368b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1206
-	.4byte	0x92b5
-	.4byte	0x36b2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa33
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1208
-	.4byte	0x92b5
-	.4byte	0x36d9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa3e
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1209
-	.4byte	0x92b5
-	.4byte	0x3700
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1210
-	.4byte	0x4b2d
-	.4byte	0x3719
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1214
-	.4byte	0x2453
-	.4byte	0x372d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1216
-	.4byte	0x3913
-	.4byte	0x3741
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1217
-	.4byte	0x663d
-	.uleb128 0x32
-	.4byte	.LVL1218
-	.4byte	0x5dde
-	.4byte	0x375e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1228
-	.4byte	0x6875
-	.uleb128 0x34
-	.4byte	.LVL1232
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR157
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa75
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x379b
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x18
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x378b
-	.uleb128 0x49
-	.4byte	.LASF647
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x37be
-	.uleb128 0x4a
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF648
-	.byte	0x2
-	.2byte	0x9c3
-	.4byte	0xdba
-	.4byte	.LFB299
-	.4byte	.LFE299-.LFB299
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x388f
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x9c5
-	.4byte	0xdba
-	.4byte	.LLST104
-	.uleb128 0x54
-	.4byte	.LASF650
-	.byte	0x2
-	.2byte	0x9c6
-	.4byte	0xdba
-	.4byte	.LLST105
-	.uleb128 0x54
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9c7
-	.4byte	0xdba
-	.4byte	.LLST106
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x9c8
-	.4byte	0x1cb8
-	.4byte	.LLST107
-	.uleb128 0x54
-	.4byte	.LASF653
-	.byte	0x2
-	.2byte	0x9c9
-	.4byte	0xdba
-	.4byte	.LLST108
-	.uleb128 0x54
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x9ca
-	.4byte	0xdba
-	.4byte	.LLST109
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9cb
-	.4byte	0xdc5
-	.4byte	.LLST110
-	.uleb128 0x54
-	.4byte	.LASF325
-	.byte	0x2
-	.2byte	0x9cc
-	.4byte	0xdba
-	.4byte	.LLST111
-	.uleb128 0x44
-	.4byte	.LVL458
-	.4byte	0x388f
-	.uleb128 0x44
-	.4byte	.LVL464
-	.4byte	0x38e8
-	.uleb128 0x34
-	.4byte	.LVL466
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC72
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 4
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF655
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdba
-	.4byte	.LFB298
-	.4byte	.LFE298-.LFB298
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x38e8
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdba
-	.4byte	.LLST93
-	.uleb128 0x54
-	.4byte	.LASF656
-	.byte	0x2
-	.2byte	0x9b0
-	.4byte	0xdba
-	.4byte	.LLST94
-	.uleb128 0x54
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x9b1
-	.4byte	0xdba
-	.4byte	.LLST95
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x9b2
-	.4byte	0xdba
-	.4byte	.LLST96
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF657
-	.byte	0x2
-	.2byte	0x9a5
-	.4byte	0xdba
-	.4byte	.LFB297
-	.4byte	.LFE297-.LFB297
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3913
-	.uleb128 0x54
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9a7
-	.4byte	0xdba
-	.4byte	.LLST92
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF658
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0x50
-	.4byte	.LFB296
-	.4byte	.LFE296-.LFB296
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x398b
-	.uleb128 0x52
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0xdba
-	.4byte	.LLST88
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdba
-	.4byte	.LLST89
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdba
-	.4byte	.LLST90
-	.uleb128 0x54
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x998
-	.4byte	0xdba
-	.4byte	.LLST91
-	.uleb128 0x32
-	.4byte	.LVL272
-	.4byte	0x61df
-	.4byte	0x3981
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL273
-	.4byte	0x6812
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF659
-	.byte	0x2
-	.2byte	0x933
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x39b5
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x50
-	.uleb128 0x4f
-	.uleb128 0x4b
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x95a
-	.4byte	0x1d68
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF660
-	.byte	0x2
-	.2byte	0x914
-	.4byte	.LFB294
-	.4byte	.LFE294-.LFB294
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a84
-	.uleb128 0x60
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x916
-	.4byte	0x50
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x60
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x917
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x54
-	.4byte	.LASF661
-	.byte	0x2
-	.2byte	0x918
-	.4byte	0x2ab9
-	.4byte	.LLST239
-	.uleb128 0x32
-	.4byte	.LVL917
-	.4byte	0x92b5
-	.4byte	0x3a13
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC91
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL919
-	.4byte	0x526b
-	.4byte	0x3a32
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL920
-	.4byte	0x92b5
-	.4byte	0x3a4c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL922
-	.4byte	0x26a8
-	.4byte	0x3a6a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL923
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC93
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF662
-	.byte	0x2
-	.2byte	0x8e0
-	.4byte	.LFB293
-	.4byte	.LFE293-.LFB293
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3bd7
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8e2
-	.4byte	0xdba
-	.4byte	.LLST266
-	.uleb128 0x53
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8e3
-	.4byte	0xdc5
-	.4byte	.LLST267
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x8e4
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8e5
-	.4byte	0xdba
-	.4byte	.LLST268
-	.uleb128 0x54
-	.4byte	.LASF664
-	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0xdba
-	.4byte	.LLST269
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3be7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9737
-	.uleb128 0x61
-	.4byte	.LBB275
-	.4byte	.LBE275-.LBB275
-	.4byte	0x3b2d
-	.uleb128 0x54
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x903
-	.4byte	0xdba
-	.4byte	.LLST270
-	.uleb128 0x34
-	.4byte	.LVL1088
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC96
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1081
-	.4byte	0x92b5
-	.4byte	0x3b4d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC94
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR155
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1082
-	.4byte	0x22fb
-	.4byte	0x3b6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2000
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1093
-	.4byte	0x92b5
-	.4byte	0x3b95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR155
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x911
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1095
-	.4byte	0x526b
-	.4byte	0x3bb4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1096
-	.4byte	0x616f
-	.uleb128 0x34
-	.4byte	.LVL1100
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3be7
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xd
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3bd7
-	.uleb128 0x5f
-	.4byte	.LASF665
-	.byte	0x2
-	.2byte	0x8c1
-	.4byte	.LFB292
-	.4byte	.LFE292-.LFB292
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3cee
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x8c3
-	.4byte	0xdba
-	.4byte	.LLST378
-	.uleb128 0x53
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x8c4
-	.4byte	0xdc5
-	.4byte	.LLST379
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x8c5
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x2
-	.2byte	0x8c6
-	.4byte	0xdba
-	.4byte	.LLST380
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3cfe
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9721
-	.uleb128 0x32
-	.4byte	.LVL1611
-	.4byte	0x92b5
-	.4byte	0x3c6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC94
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR168
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1612
-	.4byte	0x22fb
-	.4byte	0x3c82
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1616
-	.4byte	0x526b
-	.4byte	0x3ca1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1617
-	.4byte	0x616f
-	.uleb128 0x32
-	.4byte	.LVL1621
-	.4byte	0x92b5
-	.4byte	0x3cc7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC105
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1622
-	.4byte	0x32db
-	.4byte	0x3cdb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1623
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1624
-	.4byte	0x4d67
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3cfe
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x14
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3cee
-	.uleb128 0x5f
-	.4byte	.LASF666
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	.LFB291
-	.4byte	.LFE291-.LFB291
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3da6
-	.uleb128 0x52
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	0x1d68
-	.4byte	.LLST341
-	.uleb128 0x28
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x89e
-	.4byte	0xde6
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x28
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x89f
-	.4byte	0x2ab9
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x54
-	.4byte	.LASF668
-	.byte	0x2
-	.2byte	0x8a0
-	.4byte	0x50
-	.4byte	.LLST342
-	.uleb128 0x62
-	.4byte	.LASF384
-	.byte	0x2
-	.2byte	0x8a1
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1440
-	.4byte	0x331b
-	.4byte	0x3d77
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1441
-	.4byte	0x2509
-	.4byte	0x3d9c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1442
-	.4byte	0x3236
-	.byte	0
-	.uleb128 0x63
-	.4byte	.LASF669
-	.byte	0x2
-	.2byte	0x882
-	.4byte	.LFB290
-	.4byte	.LFE290-.LFB290
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3df7
-	.uleb128 0x32
-	.4byte	.LVL1563
-	.4byte	0x5030
-	.4byte	0x3dda
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1564
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x55
-	.4byte	.LASF671
-	.byte	0x2
-	.2byte	0x86e
-	.byte	0x1
-	.uleb128 0x5c
-	.4byte	.LASF672
-	.byte	0x2
-	.2byte	0x843
-	.4byte	0x50
-	.4byte	.LFB288
-	.4byte	.LFE288-.LFB288
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3f06
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST260
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST261
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST262
-	.uleb128 0x54
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdba
-	.4byte	.LLST263
-	.uleb128 0x54
-	.4byte	.LASF673
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0xdba
-	.4byte	.LLST264
-	.uleb128 0x54
-	.4byte	.LASF674
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0xdba
-	.4byte	.LLST265
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3f16
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9696
-	.uleb128 0x32
-	.4byte	.LVL1056
-	.4byte	0x22fb
-	.4byte	0x3e9d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1060
-	.4byte	0x61df
-	.4byte	0x3eb1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1061
-	.4byte	0x6812
-	.uleb128 0x32
-	.4byte	.LVL1069
-	.4byte	0x5e03
-	.4byte	0x3ece
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1076
-	.4byte	0x5dde
-	.4byte	0x3ee2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1078
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR154
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x86a
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x3f16
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x11
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3f06
-	.uleb128 0x48
-	.4byte	.LASF675
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x50
-	.4byte	.LFB287
-	.4byte	.LFE287-.LFB287
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3fb1
-	.uleb128 0x5d
-	.ascii	"p\000"
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x1d68
-	.4byte	.LLST86
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdba
-	.4byte	.LLST87
-	.uleb128 0x28
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9675
-	.uleb128 0x32
-	.4byte	.LVL259
-	.4byte	0x92b5
-	.4byte	0x3f97
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR60
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x831
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL262
-	.4byte	0x61df
-	.uleb128 0x34
-	.4byte	.LVL264
-	.4byte	0x6812
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF676
-	.byte	0x2
-	.2byte	0x820
-	.4byte	0x50
-	.4byte	.LFB286
-	.4byte	.LFE286-.LFB286
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4035
-	.uleb128 0x32
-	.4byte	.LVL1697
-	.4byte	0x405b
-	.4byte	0x3fdf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1698
-	.4byte	0x4035
-	.4byte	0x3ff3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1699
-	.4byte	0x405b
-	.4byte	0x4007
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1700
-	.4byte	0x4035
-	.4byte	0x401b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1701
-	.4byte	0x2d79
-	.uleb128 0x34
-	.4byte	.LVL1702
-	.4byte	0x3236
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF712
-	.byte	0x2
-	.2byte	0x80d
-	.byte	0x1
-	.4byte	0x405b
-	.uleb128 0x4a
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0x80d
-	.4byte	0x1d68
-	.uleb128 0x4b
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x80f
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF677
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x50
-	.4byte	.LFB284
-	.4byte	.LFE284-.LFB284
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x45b4
-	.uleb128 0x52
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x1d68
-	.4byte	.LLST315
-	.uleb128 0x54
-	.4byte	.LASF678
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdba
-	.4byte	.LLST316
-	.uleb128 0x54
-	.4byte	.LASF679
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdba
-	.4byte	.LLST317
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdba
-	.4byte	.LLST318
-	.uleb128 0x54
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdba
-	.4byte	.LLST319
-	.uleb128 0x54
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdba
-	.4byte	.LLST320
-	.uleb128 0x54
-	.4byte	.LASF680
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdba
-	.4byte	.LLST321
-	.uleb128 0x54
-	.4byte	.LASF681
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdba
-	.4byte	.LLST322
-	.uleb128 0x54
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x6ad
-	.4byte	0xdba
-	.4byte	.LLST323
-	.uleb128 0x54
-	.4byte	.LASF682
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x50
-	.4byte	.LLST324
-	.uleb128 0x54
-	.4byte	.LASF683
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x50
-	.4byte	.LLST324
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdba
-	.4byte	.LLST326
-	.uleb128 0x53
-	.ascii	"n\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdba
-	.4byte	.LLST327
-	.uleb128 0x53
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdba
-	.4byte	.LLST328
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.4byte	.LLST329
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x28
-	.4byte	.LASF624
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x28
-	.4byte	.LASF615
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x54
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdba
-	.4byte	.LLST330
-	.uleb128 0x54
-	.4byte	.LASF684
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdba
-	.4byte	.LLST331
-	.uleb128 0x54
-	.4byte	.LASF685
-	.byte	0x2
-	.2byte	0x6b2
-	.4byte	0xdc5
-	.4byte	.LLST332
-	.uleb128 0x54
-	.4byte	.LASF686
-	.byte	0x2
-	.2byte	0x6b3
-	.4byte	0xdba
-	.4byte	.LLST333
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x6b4
-	.4byte	0x2ab9
-	.4byte	.LLST334
-	.uleb128 0x62
-	.4byte	.LASF687
-	.byte	0x2
-	.2byte	0x6b5
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x45c4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9618
-	.uleb128 0x58
-	.4byte	.LASF689
-	.byte	0x2
-	.2byte	0x744
-	.4byte	.L1155
-	.uleb128 0x58
-	.4byte	.LASF619
-	.byte	0x2
-	.2byte	0x74c
-	.4byte	.L1170
-	.uleb128 0x58
-	.4byte	.LASF690
-	.byte	0x2
-	.2byte	0x7ff
-	.4byte	.L1178
-	.uleb128 0x4d
-	.4byte	.LASF691
-	.byte	0x2
-	.2byte	0x809
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x168
-	.4byte	0x4267
-	.uleb128 0x54
-	.4byte	.LASF692
-	.byte	0x2
-	.2byte	0x71c
-	.4byte	0xdc5
-	.4byte	.LLST335
-	.uleb128 0x54
-	.4byte	.LASF693
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0xdc5
-	.4byte	.LLST336
-	.uleb128 0x34
-	.4byte	.LVL1354
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x180
-	.4byte	0x433c
-	.uleb128 0x54
-	.4byte	.LASF694
-	.byte	0x2
-	.2byte	0x777
-	.4byte	0xdc5
-	.4byte	.LLST337
-	.uleb128 0x54
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x778
-	.4byte	0xdc5
-	.4byte	.LLST338
-	.uleb128 0x32
-	.4byte	.LVL1398
-	.4byte	0x26a8
-	.4byte	0x42a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1400
-	.4byte	0x3236
-	.uleb128 0x32
-	.4byte	.LVL1406
-	.4byte	0x526b
-	.4byte	0x42d0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -44
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1408
-	.4byte	0x612a
-	.4byte	0x42e4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1409
-	.4byte	0x45c9
-	.4byte	0x42f8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1411
-	.4byte	0x26a8
-	.4byte	0x4310
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1413
-	.4byte	0x612a
-	.4byte	0x4324
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1414
-	.4byte	0x612a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -52
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x61
-	.4byte	.LBB308
-	.4byte	.LBE308-.LBB308
-	.4byte	0x43b8
-	.uleb128 0x54
-	.4byte	.LASF696
-	.byte	0x2
-	.2byte	0x7b6
-	.4byte	0xdc5
-	.4byte	.LLST339
-	.uleb128 0x54
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x7b7
-	.4byte	0xdc5
-	.4byte	.LLST340
-	.uleb128 0x32
-	.4byte	.LVL1423
-	.4byte	0x26a8
-	.4byte	0x4381
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1424
-	.4byte	0x612a
-	.4byte	0x439c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1426
-	.4byte	0x526b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1303
-	.4byte	0x605e
-	.4byte	0x43cb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1309
-	.4byte	0x26a8
-	.4byte	0x43e4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1315
-	.4byte	0x61a7
-	.uleb128 0x32
-	.4byte	.LVL1318
-	.4byte	0x46e1
-	.4byte	0x4401
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1322
-	.4byte	0x92b5
-	.4byte	0x4428
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR160
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6db
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1323
-	.4byte	0x92b5
-	.4byte	0x444f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR160
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6dc
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1335
-	.4byte	0x612a
-	.4byte	0x4469
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1359
-	.4byte	0x4f1a
-	.4byte	0x4480
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1362
-	.4byte	0x26a8
-	.4byte	0x449b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1382
-	.4byte	0x61a7
-	.4byte	0x44b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x74
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1387
-	.4byte	0x3236
-	.uleb128 0x32
-	.4byte	.LVL1392
-	.4byte	0x612a
-	.4byte	0x44d9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1395
-	.4byte	0x526b
-	.4byte	0x44f8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -40
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1396
-	.4byte	0x612a
-	.4byte	0x4513
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1401
-	.4byte	0x616f
-	.4byte	0x452d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x77
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1404
-	.4byte	0x92b5
-	.4byte	0x4554
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR160
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7d6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1418
-	.4byte	0x526b
-	.4byte	0x4573
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1419
-	.4byte	0x616f
-	.4byte	0x458d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x77
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1428
-	.4byte	0x92b5
-	.4byte	0x45aa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC102
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1431
-	.4byte	0x3236
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x45c4
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x15
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x45b4
-	.uleb128 0x5f
-	.4byte	.LASF697
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	.LFB283
-	.4byte	.LFE283-.LFB283
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x46e1
-	.uleb128 0x5d
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdc5
-	.4byte	.LLST233
-	.uleb128 0x52
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdc5
-	.4byte	.LLST234
-	.uleb128 0x54
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x68e
-	.4byte	0xdba
-	.4byte	.LLST235
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9584
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xe8
-	.4byte	0x46aa
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x692
-	.4byte	0xdba
-	.4byte	.LLST236
-	.uleb128 0x54
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x693
-	.4byte	0xdba
-	.4byte	.LLST237
-	.uleb128 0x54
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x694
-	.4byte	0xdba
-	.4byte	.LLST238
-	.uleb128 0x32
-	.4byte	.LVL907
-	.4byte	0x5c23
-	.4byte	0x4672
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR47
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL908
-	.4byte	0x92b5
-	.4byte	0x4699
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR146
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x698
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL909
-	.4byte	0x5dde
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL901
-	.4byte	0x616f
-	.4byte	0x46c5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL915
-	.4byte	0x526b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF698
-	.byte	0x2
-	.2byte	0x678
-	.4byte	.LFB282
-	.4byte	.LFE282-.LFB282
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4736
-	.uleb128 0x65
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x1d68
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x52
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdba
-	.4byte	.LLST81
-	.uleb128 0x52
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdba
-	.4byte	.LLST82
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x67a
-	.4byte	0xdba
-	.4byte	.LLST83
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF699
-	.byte	0x2
-	.2byte	0x66f
-	.4byte	0x50
-	.4byte	.LFB281
-	.4byte	.LFE281-.LFB281
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x476d
-	.uleb128 0x44
-	.4byte	.LVL1047
-	.4byte	0x476d
-	.uleb128 0x34
-	.4byte	.LVL1048
-	.4byte	0x47e5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF700
-	.byte	0x2
-	.2byte	0x658
-	.4byte	.LFB280
-	.4byte	.LFE280-.LFB280
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x47b7
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0xdba
-	.4byte	.LLST259
-	.uleb128 0x32
-	.4byte	.LVL1044
-	.4byte	0x22fb
-	.4byte	0x47a6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1045
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF701
-	.byte	0x2
-	.2byte	0x648
-	.4byte	0x50
-	.4byte	.LFB279
-	.4byte	.LFE279-.LFB279
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x47e5
-	.uleb128 0x34
-	.4byte	.LVL1043
-	.4byte	0x47e5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR149
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF702
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x50
-	.4byte	.LFB278
-	.4byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4988
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x4988
-	.4byte	.LLST251
-	.uleb128 0x54
-	.4byte	.LASF704
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xddb
-	.4byte	.LLST252
-	.uleb128 0x54
-	.4byte	.LASF299
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xddb
-	.4byte	.LLST253
-	.uleb128 0x54
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x5ed
-	.4byte	0xddb
-	.4byte	.LLST254
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x5ee
-	.4byte	0xdba
-	.4byte	.LLST255
-	.uleb128 0x28
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x5ef
-	.4byte	0xff2
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x54
-	.4byte	.LASF310
-	.byte	0x2
-	.2byte	0x5f0
-	.4byte	0x10e9
-	.4byte	.LLST256
-	.uleb128 0x54
-	.4byte	.LASF311
-	.byte	0x2
-	.2byte	0x5f1
-	.4byte	0xff2
-	.4byte	.LLST257
-	.uleb128 0x28
-	.4byte	.LASF307
-	.byte	0x2
-	.2byte	0x5f2
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x54
-	.4byte	.LASF707
-	.byte	0x2
-	.2byte	0x5f3
-	.4byte	0xdba
-	.4byte	.LLST258
-	.uleb128 0x28
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x5f4
-	.4byte	0x498e
-	.uleb128 0x1
-	.byte	0x57
-	.uleb128 0x32
-	.4byte	.LVL1007
-	.4byte	0x22fb
-	.4byte	0x48cb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1012
-	.4byte	0x605e
-	.4byte	0x48de
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1018
-	.4byte	0x5896
-	.4byte	0x48f2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1019
-	.4byte	0x583e
-	.4byte	0x4906
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1020
-	.4byte	0x56f4
-	.4byte	0x491a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1021
-	.4byte	0x56f4
-	.4byte	0x492e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1024
-	.4byte	0x26a8
-	.4byte	0x494f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR106
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1029
-	.4byte	0x26a8
-	.4byte	0x496d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1033
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1040
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1271
-	.uleb128 0x5c
-	.4byte	.LASF709
-	.byte	0x2
-	.2byte	0x580
-	.4byte	0x50
-	.4byte	.LFB277
-	.4byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b02
-	.uleb128 0x54
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x582
-	.4byte	0xddb
-	.4byte	.LLST447
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9521
-	.uleb128 0x32
-	.4byte	.LVL1954
-	.4byte	0x22fb
-	.4byte	0x49e0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1955
-	.4byte	0x605e
-	.4byte	0x49f3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1957
-	.4byte	0x92b5
-	.4byte	0x4a1a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR179
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59d
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1958
-	.4byte	0x92b5
-	.4byte	0x4a41
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR179
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59f
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1960
-	.4byte	0x2295
-	.4byte	0x4a5b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1961
-	.4byte	0x2295
-	.uleb128 0x44
-	.4byte	.LVL1962
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1964
-	.4byte	0x92b5
-	.4byte	0x4a94
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR179
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x5b5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1965
-	.4byte	0x3f1b
-	.4byte	0x4aab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR51
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1966
-	.4byte	0x3f1b
-	.4byte	0x4abf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1967
-	.4byte	0x3f1b
-	.4byte	0x4ad3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1968
-	.4byte	0x3f1b
-	.4byte	0x4ae7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1970
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF710
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x50
-	.4byte	.LFB276
-	.4byte	.LFE276-.LFB276
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4b2d
-	.uleb128 0x52
-	.4byte	.LASF711
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0xdba
-	.4byte	.LLST80
-	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF713
-	.byte	0x2
-	.2byte	0x573
-	.byte	0x1
-	.4byte	0x4b53
-	.uleb128 0x4a
-	.4byte	.LASF711
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0xdba
-	.uleb128 0x4a
-	.4byte	.LASF590
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x50
-	.byte	0
-	.uleb128 0x51
-	.4byte	.LASF715
-	.byte	0x2
-	.2byte	0x566
-	.4byte	0x50
-	.byte	0x1
-	.uleb128 0x48
-	.4byte	.LASF716
-	.byte	0x2
-	.2byte	0x477
-	.4byte	0x50
-	.4byte	.LFB273
-	.4byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4d67
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0xdba
-	.4byte	.LLST245
-	.uleb128 0x28
-	.4byte	.LASF717
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0xdba
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -60
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0xdba
-	.4byte	.LLST246
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0xdba
-	.4byte	.LLST247
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0xddb
-	.4byte	.LLST248
-	.uleb128 0x53
-	.ascii	"j\000"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0xddb
-	.4byte	.LLST249
-	.uleb128 0x54
-	.4byte	.LASF718
-	.byte	0x2
-	.2byte	0x47c
-	.4byte	0x498e
-	.4byte	.LLST250
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3be7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9464
-	.uleb128 0x32
-	.4byte	.LVL945
-	.4byte	0x22fb
-	.4byte	0x4c08
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL946
-	.4byte	0x22fb
-	.4byte	0x4c1c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL947
-	.4byte	0x22fb
-	.4byte	0x4c30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL948
-	.4byte	0x22fb
-	.4byte	0x4c44
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL949
-	.4byte	0x22fb
-	.4byte	0x4c66
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR79
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL952
-	.4byte	0x61df
-	.4byte	0x4c7c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL954
-	.4byte	0x6812
-	.4byte	0x4c92
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL960
-	.4byte	0x26a8
-	.4byte	0x4cb1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL963
-	.4byte	0x26a8
-	.4byte	0x4cc9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL965
-	.4byte	0x5fb2
-	.4byte	0x4ce2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL972
-	.4byte	0x92b5
-	.4byte	0x4d09
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4bb
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL981
-	.4byte	0x92b5
-	.4byte	0x4d30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4e4
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL990
-	.4byte	0x5fb2
-	.4byte	0x4d43
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL992
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x561
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF719
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x50
-	.4byte	.LFB272
-	.4byte	.LFE272-.LFB272
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4ec8
-	.uleb128 0x54
-	.4byte	.LASF300
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0xdba
-	.4byte	.LLST369
-	.uleb128 0x54
-	.4byte	.LASF720
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x4ec8
-	.4byte	.LLST370
-	.uleb128 0x54
-	.4byte	.LASF721
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0xdba
-	.4byte	.LLST371
-	.uleb128 0x4d
-	.4byte	.LASF722
-	.byte	0x2
-	.2byte	0x44d
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9442
-	.uleb128 0x32
-	.4byte	.LVL1568
-	.4byte	0x22fb
-	.4byte	0x4ddc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1569
-	.4byte	0x2295
-	.4byte	0x4df9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1570
-	.4byte	0x2295
-	.uleb128 0x44
-	.4byte	.LVL1571
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1572
-	.4byte	0x4fb4
-	.4byte	0x4e1f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1574
-	.4byte	0x2509
-	.4byte	0x4e42
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1576
-	.4byte	0x5e28
-	.uleb128 0x32
-	.4byte	.LVL1577
-	.4byte	0x2509
-	.4byte	0x4e6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1578
-	.4byte	0x92b5
-	.4byte	0x4e95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR166
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x464
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1581
-	.4byte	0x92b5
-	.4byte	0x4eb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC104
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1582
-	.4byte	0x5fb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x12c9
-	.uleb128 0x64
-	.4byte	.LASF723
-	.byte	0x2
-	.2byte	0x3e3
-	.byte	0x1
-	.4byte	0x4f1a
-	.uleb128 0x4f
-	.uleb128 0x4c
-	.ascii	"lpa\000"
-	.byte	0x2
-	.2byte	0x3e8
-	.4byte	0xdc5
-	.uleb128 0x4c
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF724
-	.byte	0x2
-	.2byte	0x3ea
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x3eb
-	.4byte	0xde6
-	.uleb128 0x4b
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x3ec
-	.4byte	0x2ab9
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF725
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	.LFB270
-	.4byte	.LFE270-.LFB270
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4fb4
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	0x4988
-	.4byte	.LLST241
-	.uleb128 0x53
-	.ascii	"ppa\000"
-	.byte	0x2
-	.2byte	0x3b3
-	.4byte	0xdc5
-	.4byte	.LLST242
-	.uleb128 0x54
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x3b4
-	.4byte	0xdba
-	.4byte	.LLST243
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x3b5
-	.4byte	0xff2
-	.4byte	.LLST244
-	.uleb128 0x32
-	.4byte	.LVL939
-	.4byte	0x26a8
-	.4byte	0x4f8e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LVL941
-	.4byte	0x5470
-	.4byte	0x4fa3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL943
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF726
-	.byte	0x2
-	.2byte	0x3a2
-	.byte	0x1
-	.4byte	0x4fd8
-	.uleb128 0x4a
-	.4byte	.LASF393
-	.byte	0x2
-	.2byte	0x3a2
-	.4byte	0xdc5
-	.uleb128 0x4c
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x3a4
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF727
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0x50
-	.4byte	.LFB268
-	.4byte	.LFE268-.LFB268
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5030
-	.uleb128 0x52
-	.4byte	.LASF728
-	.byte	0x2
-	.2byte	0x38d
-	.4byte	0xdc5
-	.4byte	.LLST359
-	.uleb128 0x54
-	.4byte	.LASF729
-	.byte	0x2
-	.2byte	0x38f
-	.4byte	0xdc5
-	.4byte	.LLST360
-	.uleb128 0x32
-	.4byte	.LVL1540
-	.4byte	0x5148
-	.4byte	0x5026
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1541
-	.4byte	0x3df7
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF730
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdc5
-	.4byte	.LFB267
-	.4byte	.LFE267-.LFB267
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5142
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdc5
-	.4byte	.LLST361
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0xdc5
-	.4byte	.LLST362
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x367
-	.4byte	0x5142
-	.4byte	.LLST363
-	.uleb128 0x53
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0xdba
-	.4byte	.LLST364
-	.uleb128 0x54
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x369
-	.4byte	0xdba
-	.4byte	.LLST365
-	.uleb128 0x53
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x36a
-	.4byte	0xdc5
-	.4byte	.LLST366
-	.uleb128 0x54
-	.4byte	.LASF735
-	.byte	0x2
-	.2byte	0x36b
-	.4byte	0xdc5
-	.4byte	.LLST367
-	.uleb128 0x60
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x36c
-	.4byte	0xde6
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x54
-	.4byte	.LASF736
-	.byte	0x2
-	.2byte	0x36d
-	.4byte	0xdc5
-	.4byte	.LLST368
-	.uleb128 0x28
-	.4byte	.LASF564
-	.byte	0x2
-	.2byte	0x36e
-	.4byte	0x2443
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x32
-	.4byte	.LVL1551
-	.4byte	0x26a8
-	.4byte	0x5109
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1553
-	.4byte	0x2295
-	.4byte	0x5123
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1558
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -124
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xdaf
-	.uleb128 0x5c
-	.4byte	.LASF737
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0xdc5
-	.4byte	.LFB266
-	.4byte	.LFE266-.LFB266
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x526b
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0xdc5
-	.4byte	.LLST351
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0xdc5
-	.4byte	.LLST352
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x342
-	.4byte	0x5142
-	.4byte	.LLST353
-	.uleb128 0x53
-	.ascii	"len\000"
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0xdba
-	.4byte	.LLST354
-	.uleb128 0x54
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x344
-	.4byte	0xdba
-	.4byte	.LLST355
-	.uleb128 0x53
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x345
-	.4byte	0xdc5
-	.4byte	.LLST356
-	.uleb128 0x54
-	.4byte	.LASF735
-	.byte	0x2
-	.2byte	0x346
-	.4byte	0xdc5
-	.4byte	.LLST357
-	.uleb128 0x60
-	.ascii	"req\000"
-	.byte	0x2
-	.2byte	0x347
-	.4byte	0xde6
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x54
-	.4byte	.LASF736
-	.byte	0x2
-	.2byte	0x348
-	.4byte	0xdc5
-	.4byte	.LLST358
-	.uleb128 0x28
-	.4byte	.LASF564
-	.byte	0x2
-	.2byte	0x349
-	.4byte	0x2443
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x32
-	.4byte	.LVL1522
-	.4byte	0x26a8
-	.4byte	0x5221
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -116
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1525
-	.4byte	0x2295
-	.4byte	0x523e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -128
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1527
-	.4byte	0x5470
-	.4byte	0x525b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR149
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1532
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF738
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x50
-	.4byte	.LFB265
-	.4byte	.LFE265-.LFB265
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5357
-	.uleb128 0x5d
-	.ascii	"lpn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0xdc5
-	.4byte	.LLST229
-	.uleb128 0x5d
-	.ascii	"ppn\000"
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0xff2
-	.4byte	.LLST230
-	.uleb128 0x52
-	.4byte	.LASF739
-	.byte	0x2
-	.2byte	0x321
-	.4byte	0x50
-	.4byte	.LLST231
-	.uleb128 0x54
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdba
-	.4byte	.LLST232
-	.uleb128 0x28
-	.4byte	.LASF741
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x28
-	.4byte	.LASF742
-	.byte	0x2
-	.2byte	0x323
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x5367
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9369
-	.uleb128 0x58
-	.4byte	.LASF743
-	.byte	0x2
-	.2byte	0x32c
-	.4byte	.L747
-	.uleb128 0x32
-	.4byte	.LVL888
-	.4byte	0x92b5
-	.4byte	0x5323
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR145
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x328
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL891
-	.4byte	0x53a7
-	.uleb128 0x32
-	.4byte	.LVL893
-	.4byte	0x5422
-	.4byte	0x5340
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL894
-	.4byte	0x5965
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x5367
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x8
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x5357
-	.uleb128 0x48
-	.4byte	.LASF744
-	.byte	0x2
-	.2byte	0x314
-	.4byte	0x50
-	.4byte	.LFB264
-	.4byte	.LFE264-.LFB264
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x53a7
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x316
-	.4byte	0xdba
-	.4byte	.LLST314
-	.uleb128 0x44
-	.4byte	.LVL1289
-	.4byte	0x4ece
-	.uleb128 0x44
-	.4byte	.LVL1293
-	.4byte	0x5422
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF745
-	.byte	0x2
-	.2byte	0x2ec
-	.4byte	0xdba
-	.4byte	.LFB263
-	.4byte	.LFE263-.LFB263
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5422
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x2
-	.2byte	0x2ee
-	.4byte	0xdba
-	.4byte	.LLST74
-	.uleb128 0x54
-	.4byte	.LASF746
-	.byte	0x2
-	.2byte	0x2ef
-	.4byte	0xdba
-	.4byte	.LLST75
-	.uleb128 0x54
-	.4byte	.LASF747
-	.byte	0x2
-	.2byte	0x2f0
-	.4byte	0xdc5
-	.4byte	.LLST76
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x45c4
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9352
-	.uleb128 0x34
-	.4byte	.LVL221
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR57
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x310
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF748
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0x50
-	.4byte	.LFB262
-	.4byte	.LFE262-.LFB262
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5470
-	.uleb128 0x52
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x2e2
-	.4byte	0xdba
-	.4byte	.LLST227
-	.uleb128 0x54
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x2e4
-	.4byte	0xdc5
-	.4byte	.LLST228
-	.uleb128 0x34
-	.4byte	.LVL881
-	.4byte	0x5470
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF749
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x50
-	.4byte	.LFB261
-	.4byte	.LFE261-.LFB261
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x55cf
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0x4988
-	.4byte	.LLST214
-	.uleb128 0x52
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0xdc5
-	.4byte	.LLST215
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x2
-	.2byte	0x2a7
-	.4byte	0xff2
-	.4byte	.LLST216
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x2a9
-	.4byte	0xdc5
-	.4byte	.LLST217
-	.uleb128 0x54
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x2aa
-	.4byte	0x498e
-	.4byte	.LLST218
-	.uleb128 0x54
-	.4byte	.LASF721
-	.byte	0x2
-	.2byte	0x2ab
-	.4byte	0xdba
-	.4byte	.LLST219
-	.uleb128 0x4d
-	.4byte	.LASF750
-	.byte	0x2
-	.2byte	0x2ad
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9327
-	.uleb128 0x32
-	.4byte	.LVL843
-	.4byte	0x55cf
-	.4byte	0x5515
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL844
-	.4byte	0x92b5
-	.4byte	0x553c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR142
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bb
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL845
-	.4byte	0x92b5
-	.4byte	0x5563
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR142
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2bc
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL847
-	.4byte	0x22fb
-	.4byte	0x557b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL850
-	.4byte	0x2509
-	.4byte	0x559e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL852
-	.4byte	0x92b5
-	.4byte	0x55b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC89
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL853
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC90
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF751
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x50
-	.4byte	.LFB260
-	.4byte	.LFE260-.LFB260
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x56df
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x4988
-	.4byte	.LLST208
-	.uleb128 0x4b
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdba
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdba
-	.4byte	.LLST209
-	.uleb128 0x54
-	.4byte	.LASF752
-	.byte	0x2
-	.2byte	0x27a
-	.4byte	0xdba
-	.4byte	.LLST210
-	.uleb128 0x54
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x27b
-	.4byte	0x10e9
-	.4byte	.LLST211
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x27c
-	.4byte	0xff2
-	.4byte	.LLST212
-	.uleb128 0x54
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x27d
-	.4byte	0x498e
-	.4byte	.LLST213
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x56ef
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9313
-	.uleb128 0x32
-	.4byte	.LVL821
-	.4byte	0x92b5
-	.4byte	0x568b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR141
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x281
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL822
-	.4byte	0x5e28
-	.uleb128 0x32
-	.4byte	.LVL829
-	.4byte	0x22fb
-	.4byte	0x56a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL834
-	.4byte	0x2509
-	.4byte	0x56ce
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR106
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL835
-	.4byte	0x56f4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x56ef
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x56df
-	.uleb128 0x48
-	.4byte	.LASF754
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x50
-	.4byte	.LFB259
-	.4byte	.LFE259-.LFB259
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x583e
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x4988
-	.4byte	.LLST220
-	.uleb128 0x54
-	.4byte	.LASF755
-	.byte	0x2
-	.2byte	0x24b
-	.4byte	0xdba
-	.4byte	.LLST221
-	.uleb128 0x54
-	.4byte	.LASF756
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0xdba
-	.4byte	.LLST222
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x24d
-	.4byte	0xdba
-	.4byte	.LLST223
-	.uleb128 0x54
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x24e
-	.4byte	0x10e9
-	.4byte	.LLST224
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x24f
-	.4byte	0xff2
-	.4byte	.LLST225
-	.uleb128 0x54
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x498e
-	.4byte	.LLST226
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9299
-	.uleb128 0x32
-	.4byte	.LVL858
-	.4byte	0x5896
-	.4byte	0x57a1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL861
-	.4byte	0x583e
-	.4byte	0x57b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL864
-	.4byte	0x5fb2
-	.4byte	0x57ce
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL866
-	.4byte	0x583e
-	.4byte	0x57e2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL871
-	.4byte	0x26a8
-	.4byte	0x5800
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL872
-	.4byte	0x92b5
-	.4byte	0x5827
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR143
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x265
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL876
-	.4byte	0x5470
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF757
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x5881
-	.uleb128 0x4a
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x4988
-	.uleb128 0x4b
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x233
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x234
-	.4byte	0x10e9
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x5891
-	.4byte	.LASF757
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x5891
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x19
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x5881
-	.uleb128 0x48
-	.4byte	.LASF759
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x50
-	.4byte	.LFB257
-	.4byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5965
-	.uleb128 0x52
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x4988
-	.4byte	.LLST201
-	.uleb128 0x28
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x10e9
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x54
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x20c
-	.4byte	0xff2
-	.4byte	.LLST202
-	.uleb128 0x28
-	.4byte	.LASF760
-	.byte	0x2
-	.2byte	0x20d
-	.4byte	0x10e9
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdba
-	.4byte	.LLST203
-	.uleb128 0x54
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdba
-	.4byte	.LLST204
-	.uleb128 0x54
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x20f
-	.4byte	0xdba
-	.4byte	.LLST205
-	.uleb128 0x54
-	.4byte	.LASF761
-	.byte	0x2
-	.2byte	0x210
-	.4byte	0xdba
-	.4byte	.LLST206
-	.uleb128 0x54
-	.4byte	.LASF756
-	.byte	0x2
-	.2byte	0x211
-	.4byte	0xdba
-	.4byte	.LLST207
-	.uleb128 0x32
-	.4byte	.LVL798
-	.4byte	0x22fb
-	.4byte	0x5955
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL815
-	.4byte	0x5fb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF762
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x50
-	.4byte	.LFB256
-	.4byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5aa7
-	.uleb128 0x52
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdba
-	.4byte	.LLST199
-	.uleb128 0x52
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdba
-	.4byte	.LLST200
-	.uleb128 0x28
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x1e9
-	.4byte	0x498e
-	.uleb128 0x1
-	.byte	0x5a
-	.uleb128 0x28
-	.4byte	.LASF763
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3316
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9255
-	.uleb128 0x32
-	.4byte	.LVL784
-	.4byte	0x92b5
-	.4byte	0x59f1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR140
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1ec
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL786
-	.4byte	0x22fb
-	.4byte	0x5a05
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL788
-	.4byte	0x26a8
-	.4byte	0x5a23
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL790
-	.4byte	0x92b5
-	.4byte	0x5a46
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC86
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL791
-	.4byte	0x2825
-	.4byte	0x5a67
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC87
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL792
-	.4byte	0x2825
-	.4byte	0x5a83
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL793
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR140
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x201
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF764
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x5b26
-	.uleb128 0x4a
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF765
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF766
-	.byte	0x2
-	.2byte	0x1c2
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF767
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF768
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF769
-	.byte	0x2
-	.2byte	0x1c6
-	.4byte	0xdc5
-	.uleb128 0x4b
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1cb8
-	.uleb128 0x4b
-	.4byte	.LASF770
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1cb8
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x45c4
-	.4byte	.LASF764
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF771
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x50
-	.4byte	.LFB254
-	.4byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5b71
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0xdba
-	.4byte	.LLST62
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1ad
-	.4byte	0xdba
-	.4byte	.LLST63
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x1cb8
-	.4byte	.LLST64
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF772
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x50
-	.4byte	.LFB253
-	.4byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5bb2
-	.uleb128 0x52
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x5bb2
-	.4byte	.LLST61
-	.uleb128 0x2d
-	.4byte	.LVL178
-	.4byte	0x5bb8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1cb8
-	.uleb128 0x48
-	.4byte	.LASF774
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x50
-	.4byte	.LFB252
-	.4byte	.LFE252-.LFB252
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5c23
-	.uleb128 0x52
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0x5bb2
-	.4byte	.LLST57
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x193
-	.4byte	0xdba
-	.4byte	.LLST58
-	.uleb128 0x54
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x195
-	.4byte	0xdba
-	.4byte	.LLST59
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x196
-	.4byte	0x1cb8
-	.4byte	.LLST60
-	.uleb128 0x34
-	.4byte	.LVL170
-	.4byte	0x5c23
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF775
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x50
-	.4byte	.LFB251
-	.4byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5cae
-	.uleb128 0x52
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0x5bb2
-	.4byte	.LLST54
-	.uleb128 0x52
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x176
-	.4byte	0xdba
-	.4byte	.LLST55
-	.uleb128 0x28
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1cb8
-	.uleb128 0x1
-	.byte	0x54
-	.uleb128 0x54
-	.4byte	.LASF776
-	.byte	0x2
-	.2byte	0x178
-	.4byte	0x1cb8
-	.4byte	.LLST56
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x5cbe
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9214
-	.uleb128 0x34
-	.4byte	.LVL158
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x17b
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x5cbe
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0x10
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x5cae
-	.uleb128 0x48
-	.4byte	.LASF777
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0x50
-	.4byte	.LFB250
-	.4byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5d3c
-	.uleb128 0x52
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x145
-	.4byte	0xdba
-	.4byte	.LLST48
-	.uleb128 0x54
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1cb8
-	.4byte	.LLST49
-	.uleb128 0x54
-	.4byte	.LASF776
-	.byte	0x2
-	.2byte	0x147
-	.4byte	0x1cb8
-	.4byte	.LLST50
-	.uleb128 0x28
-	.4byte	.LASF778
-	.byte	0x2
-	.2byte	0x148
-	.4byte	0xdba
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x54
-	.4byte	.LASF779
-	.byte	0x2
-	.2byte	0x149
-	.4byte	0xdba
-	.4byte	.LLST51
-	.uleb128 0x54
-	.4byte	.LASF780
-	.byte	0x2
-	.2byte	0x14a
-	.4byte	0xdba
-	.4byte	.LLST52
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF781
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x50
-	.4byte	.LFB249
-	.4byte	.LFE249-.LFB249
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5dde
-	.uleb128 0x2c
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0xdba
-	.4byte	.LLST38
-	.uleb128 0x30
-	.4byte	.LASF652
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1cb8
-	.4byte	.LLST39
-	.uleb128 0x30
-	.4byte	.LASF776
-	.byte	0x2
-	.byte	0xfa
-	.4byte	0x1cb8
-	.4byte	.LLST40
-	.uleb128 0x30
-	.4byte	.LASF782
-	.byte	0x2
-	.byte	0xfb
-	.4byte	0xdba
-	.4byte	.LLST41
-	.uleb128 0x30
-	.4byte	.LASF783
-	.byte	0x2
-	.byte	0xfc
-	.4byte	0xdba
-	.4byte	.LLST42
-	.uleb128 0x30
-	.4byte	.LASF767
-	.byte	0x2
-	.byte	0xfd
-	.4byte	0xdc5
-	.4byte	.LLST43
-	.uleb128 0x30
-	.4byte	.LASF784
-	.byte	0x2
-	.byte	0xfe
-	.4byte	0xdc5
-	.4byte	.LLST44
-	.uleb128 0x30
-	.4byte	.LASF780
-	.byte	0x2
-	.byte	0xff
-	.4byte	0xdba
-	.4byte	.LLST45
-	.uleb128 0x54
-	.4byte	.LASF325
-	.byte	0x2
-	.2byte	0x100
-	.4byte	0xdba
-	.4byte	.LLST46
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF785
-	.byte	0x2
-	.byte	0xd9
-	.byte	0x1
-	.4byte	0x5e03
-	.uleb128 0x36
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xd9
-	.4byte	0xdba
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x5cbe
-	.4byte	.LASF785
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF786
-	.byte	0x2
-	.byte	0xd2
-	.byte	0x1
-	.4byte	0x5e28
-	.uleb128 0x36
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xd2
-	.4byte	0xdba
-	.uleb128 0x4e
-	.4byte	.LASF573
-	.4byte	0x5cbe
-	.4byte	.LASF786
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF787
-	.byte	0x2
-	.byte	0xb4
-	.4byte	0xdba
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5eec
-	.uleb128 0x3b
-	.ascii	"tmp\000"
-	.byte	0x2
-	.byte	0xb6
-	.4byte	0xdba
-	.4byte	.LLST185
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xb7
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x67
-	.4byte	.LASF788
-	.byte	0x2
-	.byte	0xb9
-	.4byte	.L531
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xd0
-	.4byte	0x5eac
-	.uleb128 0x30
-	.4byte	.LASF789
-	.byte	0x2
-	.byte	0xbf
-	.4byte	0xdba
-	.4byte	.LLST186
-	.uleb128 0x32
-	.4byte	.LVL690
-	.4byte	0x616f
-	.4byte	0x5e97
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL692
-	.4byte	0x2453
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x68
-	.4byte	0x5ff9
-	.4byte	.LBB252
-	.4byte	.Ldebug_ranges0+0xb8
-	.byte	0x2
-	.byte	0xba
-	.uleb128 0x32
-	.4byte	.LVL694
-	.4byte	0x92b5
-	.4byte	0x5ed2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC82
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL696
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC83
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x1595
-	.uleb128 0x2b
-	.4byte	.LASF790
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0x50
-	.4byte	.LFB245
-	.4byte	.LFE245-.LFB245
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5f56
-	.uleb128 0x2f
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0xa2
-	.4byte	0xdba
-	.4byte	.LLST35
-	.uleb128 0x3b
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0xa4
-	.4byte	0x50
-	.4byte	.LLST36
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0xa5
-	.4byte	0xdc5
-	.4byte	.LLST37
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0xa6
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x68
-	.4byte	0x5fed
-	.4byte	.LBB189
-	.4byte	.Ldebug_ranges0+0x18
-	.byte	0x2
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF791
-	.byte	0x2
-	.byte	0x75
-	.4byte	.LFB244
-	.4byte	.LFE244-.LFB244
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5fb2
-	.uleb128 0x29
-	.4byte	.LASF325
-	.byte	0x2
-	.byte	0x77
-	.4byte	0xdd0
-	.uleb128 0xe
-	.byte	0x3
-	.4byte	g_sys_save_data+28
-	.byte	0x94
-	.byte	0x2
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0xdba
-	.4byte	.LLST33
-	.uleb128 0x3b
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x78
-	.4byte	0xdba
-	.4byte	.LLST34
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x79
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF792
-	.byte	0x2
-	.byte	0x61
-	.byte	0x1
-	.4byte	0x5fed
-	.uleb128 0x41
-	.ascii	"blk\000"
-	.byte	0x2
-	.byte	0x61
-	.4byte	0xdba
-	.uleb128 0x36
-	.4byte	.LASF793
-	.byte	0x2
-	.byte	0x61
-	.4byte	0xdba
-	.uleb128 0x4f
-	.uleb128 0x31
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x66
-	.4byte	0x5eec
-	.uleb128 0x4f
-	.uleb128 0x37
-	.4byte	.LASF789
-	.byte	0x2
-	.byte	0x68
-	.4byte	0xdba
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF794
-	.byte	0x2
-	.byte	0x5c
-	.4byte	0xdba
-	.byte	0x1
-	.uleb128 0x69
-	.4byte	.LASF795
-	.byte	0x2
-	.byte	0x57
-	.4byte	0xdba
-	.byte	0x1
-	.uleb128 0x2b
-	.4byte	.LASF796
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0xdba
-	.4byte	.LFB240
-	.4byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x605e
-	.uleb128 0x2f
-	.ascii	"max\000"
-	.byte	0x2
-	.byte	0x4b
-	.4byte	0xdba
-	.4byte	.LLST198
-	.uleb128 0x3a
-	.ascii	"Q\000"
-	.byte	0x2
-	.byte	0x4d
-	.4byte	0x5eec
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.uleb128 0x34
-	.4byte	.LVL780
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR38+8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x800
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF797
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x50
-	.4byte	.LFB239
-	.4byte	.LFE239-.LFB239
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x612a
-	.uleb128 0x2c
-	.4byte	.LASF388
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0xdc5
-	.4byte	.LLST151
-	.uleb128 0x2c
-	.4byte	.LASF567
-	.byte	0x2
-	.byte	0x2e
-	.4byte	0x50
-	.4byte	.LLST152
-	.uleb128 0x3a
-	.ascii	"req\000"
-	.byte	0x2
-	.byte	0x30
-	.4byte	0xde6
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x3b
-	.ascii	"low\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0xddb
-	.4byte	.LLST153
-	.uleb128 0x29
-	.4byte	.LASF798
-	.byte	0x2
-	.byte	0x31
-	.4byte	0xddb
-	.uleb128 0x1
-	.byte	0x55
-	.uleb128 0x3b
-	.ascii	"mid\000"
-	.byte	0x2
-	.byte	0x31
-	.4byte	0xddb
-	.4byte	.LLST154
-	.uleb128 0x29
-	.4byte	.LASF799
-	.byte	0x2
-	.byte	0x32
-	.4byte	0x2443
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -88
-	.uleb128 0x30
-	.4byte	.LASF800
-	.byte	0x2
-	.byte	0x33
-	.4byte	0xdba
-	.4byte	.LLST155
-	.uleb128 0x32
-	.4byte	.LVL583
-	.4byte	0x26a8
-	.4byte	0x610d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL588
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -108
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF801
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0xdc5
-	.4byte	.LFB238
-	.4byte	.LFE238-.LFB238
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x616f
-	.uleb128 0x2c
-	.4byte	.LASF802
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0xdc5
-	.4byte	.LLST31
-	.uleb128 0x5b
-	.4byte	.LASF803
-	.byte	0x2
-	.byte	0x1e
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3b
-	.ascii	"ret\000"
-	.byte	0x2
-	.byte	0x20
-	.4byte	0xdc5
-	.4byte	.LLST32
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF804
-	.byte	0x2
-	.byte	0x14
-	.4byte	0xdba
-	.4byte	.LFB237
-	.4byte	.LFE237-.LFB237
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x61a7
-	.uleb128 0x2c
-	.4byte	.LASF596
-	.byte	0x2
-	.byte	0x14
-	.4byte	0xdba
-	.4byte	.LLST29
-	.uleb128 0x30
-	.4byte	.LASF717
-	.byte	0x2
-	.byte	0x16
-	.4byte	0xdba
-	.4byte	.LLST30
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF805
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xdba
-	.4byte	.LFB236
-	.4byte	.LFE236-.LFB236
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x61df
-	.uleb128 0x2c
-	.4byte	.LASF596
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xdba
-	.4byte	.LLST27
-	.uleb128 0x30
-	.4byte	.LASF594
-	.byte	0x2
-	.byte	0xe
-	.4byte	0xdba
-	.4byte	.LLST28
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF806
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LFB235
-	.4byte	.LFE235-.LFB235
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6226
-	.uleb128 0x2c
-	.4byte	.LASF594
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LLST24
-	.uleb128 0x2c
-	.4byte	.LASF717
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LLST25
-	.uleb128 0x30
-	.4byte	.LASF586
-	.byte	0x2
-	.byte	0x6
-	.4byte	0xdba
-	.4byte	.LLST26
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF807
-	.byte	0x4
-	.2byte	0x13c
-	.4byte	0xdd0
-	.4byte	.LFB234
-	.4byte	.LFE234-.LFB234
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x640d
-	.uleb128 0x53
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x13e
-	.4byte	0xdc5
-	.4byte	.LLST347
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x13f
-	.4byte	0xdba
-	.4byte	.LLST348
-	.uleb128 0x54
-	.4byte	.LASF576
-	.byte	0x4
-	.2byte	0x140
-	.4byte	0xdc5
-	.4byte	.LLST349
-	.uleb128 0x54
-	.4byte	.LASF808
-	.byte	0x4
-	.2byte	0x142
-	.4byte	0x640d
-	.4byte	.LLST350
-	.uleb128 0x4d
-	.4byte	.LASF809
-	.byte	0x4
-	.2byte	0x158
-	.uleb128 0x44
-	.4byte	.LVL1469
-	.4byte	0x6609
-	.uleb128 0x44
-	.4byte	.LVL1470
-	.4byte	0x6413
-	.uleb128 0x32
-	.4byte	.LVL1474
-	.4byte	0x6812
-	.4byte	0x62ae
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1475
-	.4byte	0x23ff
-	.4byte	0x62c2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1476
-	.4byte	0x6875
-	.4byte	0x62d6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1482
-	.4byte	0x26a8
-	.4byte	0x62f4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1483
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1485
-	.4byte	0x6875
-	.4byte	0x6311
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1487
-	.4byte	0x235b
-	.4byte	0x6325
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1488
-	.4byte	0x6786
-	.uleb128 0x44
-	.4byte	.LVL1490
-	.4byte	0x6812
-	.uleb128 0x32
-	.4byte	.LVL1491
-	.4byte	0x22fb
-	.4byte	0x634f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1492
-	.4byte	0x22fb
-	.4byte	0x6369
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1494
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1495
-	.4byte	0x2453
-	.4byte	0x6390
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1496
-	.4byte	0x2509
-	.4byte	0x63b3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1497
-	.4byte	0x6875
-	.4byte	0x63c7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1502
-	.4byte	0x6875
-	.uleb128 0x32
-	.4byte	.LVL1505
-	.4byte	0x2453
-	.4byte	0x63e8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1506
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1507
-	.4byte	0x6875
-	.uleb128 0x44
-	.4byte	.LVL1508
-	.4byte	0x663d
-	.uleb128 0x44
-	.4byte	.LVL1510
-	.4byte	0x663d
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x11b9
-	.uleb128 0x48
-	.4byte	.LASF810
-	.byte	0x4
-	.2byte	0x116
-	.4byte	0x50
-	.4byte	.LFB233
-	.4byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6484
-	.uleb128 0x60
-	.ascii	"die\000"
-	.byte	0x4
-	.2byte	0x118
-	.4byte	0xdc5
-	.uleb128 0x1
-	.byte	0x56
-	.uleb128 0x53
-	.ascii	"blk\000"
-	.byte	0x4
-	.2byte	0x119
-	.4byte	0xdba
-	.4byte	.LLST149
-	.uleb128 0x54
-	.4byte	.LASF811
-	.byte	0x4
-	.2byte	0x11a
-	.4byte	0xdc5
-	.4byte	.LLST150
-	.uleb128 0x28
-	.4byte	.LASF808
-	.byte	0x4
-	.2byte	0x11b
-	.4byte	0x640d
-	.uleb128 0x1
-	.byte	0x58
-	.uleb128 0x34
-	.4byte	.LVL572
-	.4byte	0x26a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF812
-	.byte	0x4
-	.byte	0xac
-	.4byte	0x50
-	.4byte	.LFB232
-	.4byte	.LFE232-.LFB232
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x65b3
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0xae
-	.4byte	0xdc5
-	.4byte	.LLST343
-	.uleb128 0x3b
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0xdba
-	.4byte	.LLST344
-	.uleb128 0x30
-	.4byte	.LASF705
-	.byte	0x4
-	.byte	0xb0
-	.4byte	0xddb
-	.4byte	.LLST345
-	.uleb128 0x30
-	.4byte	.LASF808
-	.byte	0x4
-	.byte	0xb1
-	.4byte	0x640d
-	.4byte	.LLST346
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x65c3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9061
-	.uleb128 0x44
-	.4byte	.LVL1444
-	.4byte	0x6609
-	.uleb128 0x32
-	.4byte	.LVL1446
-	.4byte	0x26a8
-	.4byte	0x650d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1447
-	.4byte	0x26a8
-	.4byte	0x652b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1449
-	.4byte	0x26a8
-	.4byte	0x6549
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1450
-	.4byte	0x605e
-	.4byte	0x655c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1452
-	.4byte	0x92b5
-	.4byte	0x6582
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR164
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xfe
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1453
-	.4byte	0x7a56
-	.uleb128 0x32
-	.4byte	.LVL1461
-	.4byte	0x26a8
-	.4byte	0x65a9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1466
-	.4byte	0x2295
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x65c3
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xa
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x65b3
-	.uleb128 0x2b
-	.4byte	.LASF813
-	.byte	0x4
-	.byte	0x9c
-	.4byte	0xdba
-	.4byte	.LFB231
-	.4byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6609
-	.uleb128 0x3b
-	.ascii	"blk\000"
-	.byte	0x4
-	.byte	0x9e
-	.4byte	0xdba
-	.4byte	.LLST22
-	.uleb128 0x30
-	.4byte	.LASF814
-	.byte	0x4
-	.byte	0x9f
-	.4byte	0xdba
-	.4byte	.LLST23
-	.uleb128 0x44
-	.4byte	.LVL59
-	.4byte	0x6812
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF815
-	.byte	0x4
-	.byte	0x94
-	.4byte	.LFB230
-	.4byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x663d
-	.uleb128 0x2d
-	.4byte	.LVL777
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR37+12
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF816
-	.byte	0x4
-	.byte	0x4f
-	.4byte	0x50
-	.4byte	.LFB229
-	.4byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6786
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x51
-	.4byte	0x50
-	.4byte	.LLST290
-	.uleb128 0x30
-	.4byte	.LASF817
-	.byte	0x4
-	.byte	0x52
-	.4byte	0x50
-	.4byte	.LLST291
-	.uleb128 0x30
-	.4byte	.LASF808
-	.byte	0x4
-	.byte	0x53
-	.4byte	0x640d
-	.4byte	.LLST292
-	.uleb128 0x30
-	.4byte	.LASF721
-	.byte	0x4
-	.byte	0x54
-	.4byte	0xdba
-	.4byte	.LLST293
-	.uleb128 0x57
-	.4byte	.LASF818
-	.byte	0x4
-	.byte	0x67
-	.uleb128 0x6a
-	.4byte	.LASF573
-	.4byte	0x26a3
-	.uleb128 0x32
-	.4byte	.LVL1172
-	.4byte	0x22fb
-	.4byte	0x66b4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1175
-	.4byte	0x22fb
-	.4byte	0x66d3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1177
-	.4byte	0x92b5
-	.4byte	0x66ea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC97
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1178
-	.4byte	0x2509
-	.4byte	0x670d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1179
-	.4byte	0x2453
-	.4byte	0x6725
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1180
-	.4byte	0x2509
-	.4byte	0x6748
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1182
-	.4byte	0x92b5
-	.4byte	0x675f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC98
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1183
-	.4byte	0x92b5
-	.4byte	0x677c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC99
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1186
-	.4byte	0x2295
-	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF819
-	.byte	0x4
-	.byte	0x41
-	.4byte	.LFB228
-	.4byte	.LFE228-.LFB228
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x680a
-	.uleb128 0x2c
-	.4byte	.LASF753
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x10e9
-	.4byte	.LLST196
-	.uleb128 0x2c
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x41
-	.4byte	0xff2
-	.4byte	.LLST197
-	.uleb128 0x31
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x43
-	.4byte	0xdc5
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x3be7
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.9018
-	.uleb128 0x32
-	.4byte	.LVL774
-	.4byte	0x22fb
-	.4byte	0x67ea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL775
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4a
-	.byte	0
-	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF821
-	.byte	0x4
-	.byte	0x26
-	.byte	0x1
-	.uleb128 0x39
-	.4byte	.LASF822
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x50
-	.4byte	.LFB226
-	.4byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6875
-	.uleb128 0x2c
-	.4byte	.LASF388
-	.byte	0x4
-	.byte	0x17
-	.4byte	0xdba
-	.4byte	.LLST17
-	.uleb128 0x3b
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x19
-	.4byte	0xdc5
-	.4byte	.LLST18
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x4
-	.byte	0x1a
-	.4byte	0xdc5
-	.4byte	.LLST19
-	.uleb128 0x30
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x1b
-	.4byte	0xff2
-	.4byte	.LLST20
-	.uleb128 0x30
-	.4byte	.LASF581
-	.byte	0x4
-	.byte	0x1c
-	.4byte	0xdba
-	.4byte	.LLST21
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF823
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x50
-	.4byte	.LFB225
-	.4byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x68ea
-	.uleb128 0x2c
-	.4byte	.LASF388
-	.byte	0x4
-	.byte	0x4
-	.4byte	0xdba
-	.4byte	.LLST13
-	.uleb128 0x3b
-	.ascii	"die\000"
-	.byte	0x4
-	.byte	0x6
-	.4byte	0xdc5
-	.4byte	.LLST14
-	.uleb128 0x30
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x7
-	.4byte	0xff2
-	.4byte	.LLST15
-	.uleb128 0x30
-	.4byte	.LASF581
-	.byte	0x4
-	.byte	0x8
-	.4byte	0xdba
-	.4byte	.LLST16
-	.uleb128 0x34
-	.4byte	.LVL45
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF885
-	.byte	0x3
-	.2byte	0x499
-	.4byte	0xdc5
-	.4byte	.LFB224
-	.4byte	.LFE224-.LFB224
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x48
-	.4byte	.LASF824
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0x50
-	.4byte	.LFB223
-	.4byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x696f
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0xb5
-	.4byte	.LLST444
-	.uleb128 0x52
-	.4byte	.LASF325
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0xb5
-	.4byte	.LLST445
-	.uleb128 0x5d
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x494
-	.4byte	0x696f
-	.4byte	.LLST446
-	.uleb128 0x2d
-	.4byte	.LVL1953
-	.4byte	0x6adf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0x90
-	.uleb128 0x48
-	.4byte	.LASF825
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0x50
-	.4byte	.LFB222
-	.4byte	.LFE222-.LFB222
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x69e4
-	.uleb128 0x52
-	.4byte	.LASF236
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0xb5
-	.4byte	.LLST426
-	.uleb128 0x52
-	.4byte	.LASF325
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0xb5
-	.4byte	.LLST427
-	.uleb128 0x5d
-	.ascii	"buf\000"
-	.byte	0x3
-	.2byte	0x48f
-	.4byte	0x696f
-	.4byte	.LLST428
-	.uleb128 0x2d
-	.4byte	.LVL1872
-	.4byte	0x708d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF826
-	.byte	0x3
-	.2byte	0x460
-	.4byte	0x50
-	.4byte	.LFB221
-	.4byte	.LFE221-.LFB221
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6adf
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x460
-	.4byte	0xdc5
-	.4byte	.LLST372
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x460
-	.4byte	0xdc5
-	.4byte	.LLST373
-	.uleb128 0x54
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x462
-	.4byte	0xdba
-	.4byte	.LLST374
-	.uleb128 0x53
-	.ascii	"tmp\000"
-	.byte	0x3
-	.2byte	0x463
-	.4byte	0xdba
-	.4byte	.LLST375
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x464
-	.4byte	0xdc5
-	.4byte	.LLST376
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x465
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x28
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x465
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x54
-	.4byte	.LASF629
-	.byte	0x3
-	.2byte	0x466
-	.4byte	0xdba
-	.4byte	.LLST377
-	.uleb128 0x44
-	.4byte	.LVL1601
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1602
-	.4byte	0x4d67
-	.uleb128 0x32
-	.4byte	.LVL1603
-	.4byte	0x526b
-	.4byte	0x6aad
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1604
-	.4byte	0x526b
-	.4byte	0x6acc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1605
-	.4byte	0x616f
-	.uleb128 0x44
-	.4byte	.LVL1606
-	.4byte	0x3236
-	.byte	0
-	.uleb128 0x5c
-	.4byte	.LASF827
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0x50
-	.4byte	.LFB220
-	.4byte	.LFE220-.LFB220
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e85
-	.uleb128 0x5d
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0xdaf
-	.4byte	.LLST429
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0xdc5
-	.4byte	.LLST430
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0xdc5
-	.4byte	.LLST431
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x3
-	.2byte	0x3bd
-	.4byte	0x5142
-	.4byte	.LLST432
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x3
-	.2byte	0x3bf
-	.4byte	0x2ab9
-	.4byte	.LLST433
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0xdc5
-	.4byte	.LLST434
-	.uleb128 0x54
-	.4byte	.LASF828
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0xdc5
-	.4byte	.LLST435
-	.uleb128 0x54
-	.4byte	.LASF829
-	.byte	0x3
-	.2byte	0x3c0
-	.4byte	0xdc5
-	.4byte	.LLST436
-	.uleb128 0x28
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x53
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdc5
-	.4byte	.LLST437
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0xdc5
-	.4byte	.LLST438
-	.uleb128 0x54
-	.4byte	.LASF830
-	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0xdc5
-	.4byte	.LLST439
-	.uleb128 0x54
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x3c2
-	.4byte	0xdc5
-	.4byte	.LLST440
-	.uleb128 0x54
-	.4byte	.LASF831
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0xdc5
-	.4byte	.LLST441
-	.uleb128 0x54
-	.4byte	.LASF832
-	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0xdc5
-	.4byte	.LLST442
-	.uleb128 0x54
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x3c4
-	.4byte	0x1d68
-	.4byte	.LLST443
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x5367
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.8954
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1d8
-	.4byte	0x6c7c
-	.uleb128 0x28
-	.4byte	.LASF603
-	.byte	0x3
-	.2byte	0x425
-	.4byte	0xde6
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x32
-	.4byte	.LVL1933
-	.4byte	0x26a8
-	.4byte	0x6c3b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1935
-	.4byte	0x92b5
-	.4byte	0x6c58
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC108
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1936
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x432
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1878
-	.4byte	0x5148
-	.4byte	0x6ca5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x7
-	.byte	0x91
-	.sleb128 -100
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x100
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -84
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1893
-	.4byte	0x29ec
-	.4byte	0x6cc3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -72
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1897
-	.4byte	0x92b5
-	.4byte	0x6cea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3dc
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1899
-	.4byte	0x340d
-	.4byte	0x6d01
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR52
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1900
-	.4byte	0x340d
-	.4byte	0x6d18
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR51
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1902
-	.4byte	0x340d
-	.4byte	0x6d2c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1905
-	.4byte	0x92b5
-	.4byte	0x6d53
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3fd
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1908
-	.4byte	0x6e92
-	.4byte	0x6d72
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1909
-	.4byte	0x92b5
-	.4byte	0x6d99
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x44a
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1912
-	.4byte	0x340d
-	.4byte	0x6dad
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1915
-	.4byte	0x526b
-	.4byte	0x6dcc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1916
-	.4byte	0x331b
-	.4byte	0x6de0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1920
-	.4byte	0x22fb
-	.4byte	0x6df9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1929
-	.4byte	0x92b5
-	.4byte	0x6e20
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR178
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x441
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1934
-	.4byte	0x2295
-	.uleb128 0x32
-	.4byte	.LVL1938
-	.4byte	0x22fb
-	.4byte	0x6e3c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1943
-	.4byte	0x5b26
-	.4byte	0x6e4f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1944
-	.4byte	0x2c15
-	.uleb128 0x32
-	.4byte	.LVL1945
-	.4byte	0x29ec
-	.4byte	0x6e70
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1946
-	.4byte	0x29ec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x51
-	.4byte	.LASF833
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x50
-	.byte	0x1
-	.uleb128 0x5f
-	.4byte	.LASF834
-	.byte	0x3
-	.2byte	0x387
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7078
-	.uleb128 0x5d
-	.ascii	"req\000"
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x19f9
-	.4byte	.LLST382
-	.uleb128 0x52
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdc5
-	.4byte	.LLST383
-	.uleb128 0x52
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdc5
-	.4byte	.LLST384
-	.uleb128 0x52
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x1d68
-	.4byte	.LLST385
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x389
-	.4byte	0xdc5
-	.4byte	.LLST386
-	.uleb128 0x60
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x54
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0xdc5
-	.4byte	.LLST387
-	.uleb128 0x54
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x38b
-	.4byte	0xdba
-	.4byte	.LLST388
-	.uleb128 0x54
-	.4byte	.LASF598
-	.byte	0x3
-	.2byte	0x38c
-	.4byte	0x2ab9
-	.4byte	.LLST389
-	.uleb128 0x62
-	.4byte	.LASF687
-	.byte	0x3
-	.2byte	0x38d
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x7088
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.8926
-	.uleb128 0x32
-	.4byte	.LVL1641
-	.4byte	0x2509
-	.4byte	0x6f71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1642
-	.4byte	0x616f
-	.uleb128 0x32
-	.4byte	.LVL1644
-	.4byte	0x340d
-	.4byte	0x6f8e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1645
-	.4byte	0x2b8b
-	.uleb128 0x32
-	.4byte	.LVL1646
-	.4byte	0x331b
-	.4byte	0x6fab
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1647
-	.4byte	0x2509
-	.4byte	0x6fc9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1648
-	.4byte	0x92b5
-	.4byte	0x6ff0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR170
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3a5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1649
-	.4byte	0x526b
-	.4byte	0x7009
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1651
-	.4byte	0x616f
-	.4byte	0x7023
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x8
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x9
-	.byte	0xea
-	.byte	0x24
-	.byte	0x9
-	.byte	0xf4
-	.byte	0x25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1654
-	.4byte	0x92b5
-	.4byte	0x7040
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC106
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1655
-	.4byte	0x3236
-	.4byte	0x7054
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1658
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR170
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3b4
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xea
-	.4byte	0x7088
-	.uleb128 0xe
-	.4byte	0xd6
-	.byte	0xc
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x7078
-	.uleb128 0x5c
-	.4byte	.LASF836
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x50
-	.4byte	.LFB217
-	.4byte	.LFE217-.LFB217
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7277
-	.uleb128 0x5d
-	.ascii	"LUN\000"
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdaf
-	.4byte	.LLST409
-	.uleb128 0x52
-	.4byte	.LASF731
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdc5
-	.4byte	.LLST410
-	.uleb128 0x52
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdc5
-	.4byte	.LLST411
-	.uleb128 0x52
-	.4byte	.LASF733
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5142
-	.4byte	.LLST412
-	.uleb128 0x53
-	.ascii	"ret\000"
-	.byte	0x3
-	.2byte	0x32f
-	.4byte	0x50
-	.4byte	.LLST413
-	.uleb128 0x54
-	.4byte	.LASF828
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdc5
-	.4byte	.LLST414
-	.uleb128 0x54
-	.4byte	.LASF829
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdc5
-	.4byte	.LLST415
-	.uleb128 0x54
-	.4byte	.LASF837
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdc5
-	.4byte	.LLST416
-	.uleb128 0x53
-	.ascii	"lpa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0xdc5
-	.4byte	.LLST417
-	.uleb128 0x60
-	.ascii	"ppa\000"
-	.byte	0x3
-	.2byte	0x331
-	.4byte	0xdc5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x53
-	.ascii	"n\000"
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdc5
-	.4byte	.LLST418
-	.uleb128 0x54
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdc5
-	.4byte	.LLST419
-	.uleb128 0x54
-	.4byte	.LASF830
-	.byte	0x3
-	.2byte	0x333
-	.4byte	0xdc5
-	.4byte	.LLST420
-	.uleb128 0x54
-	.4byte	.LASF838
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0xdc5
-	.4byte	.LLST421
-	.uleb128 0x54
-	.4byte	.LASF839
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0xdc5
-	.4byte	.LLST422
-	.uleb128 0x54
-	.4byte	.LASF840
-	.byte	0x3
-	.2byte	0x335
-	.4byte	0xdc5
-	.4byte	.LLST423
-	.uleb128 0x54
-	.4byte	.LASF841
-	.byte	0x3
-	.2byte	0x336
-	.4byte	0xdc5
-	.4byte	.LLST424
-	.uleb128 0x61
-	.4byte	.LBB332
-	.4byte	.LBE332-.LBB332
-	.4byte	0x71e4
-	.uleb128 0x54
-	.4byte	.LASF586
-	.byte	0x3
-	.2byte	0x37a
-	.4byte	0xdba
-	.4byte	.LLST425
-	.uleb128 0x44
-	.4byte	.LVL1864
-	.4byte	0x616f
-	.uleb128 0x44
-	.4byte	.LVL1865
-	.4byte	0x2c15
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1821
-	.4byte	0x5030
-	.4byte	0x7206
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x76
-	.sleb128 256
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1836
-	.4byte	0x29ec
-	.4byte	0x721e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1838
-	.4byte	0x526b
-	.4byte	0x723d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1844
-	.4byte	0x26a8
-	.4byte	0x7257
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1846
-	.4byte	0x2295
-	.uleb128 0x34
-	.4byte	.LVL1853
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF842
-	.byte	0x3
-	.2byte	0x325
-	.4byte	0x50
-	.4byte	.LFB216
-	.4byte	.LFE216-.LFB216
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x729b
-	.uleb128 0x44
-	.4byte	.LVL1587
-	.4byte	0x729b
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF843
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x50
-	.4byte	.LFB215
-	.4byte	.LFE215-.LFB215
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x72db
-	.uleb128 0x44
-	.4byte	.LVL1584
-	.4byte	0x536c
-	.uleb128 0x32
-	.4byte	.LVL1585
-	.4byte	0x4fd8
-	.4byte	0x72d1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1586
-	.4byte	0x4d67
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF844
-	.byte	0x3
-	.2byte	0x2e6
-	.4byte	0x50
-	.4byte	.LFB214
-	.4byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x73a9
-	.uleb128 0x28
-	.4byte	.LASF845
-	.byte	0x3
-	.2byte	0x2e8
-	.4byte	0x73a9
-	.uleb128 0x6
-	.byte	0x3
-	.4byte	g_nand_phy_info
-	.byte	0x9f
-	.uleb128 0x58
-	.4byte	.LASF846
-	.byte	0x3
-	.2byte	0x2f3
-	.4byte	.LDL2
-	.uleb128 0x61
-	.4byte	.LBB342
-	.4byte	.LBE342-.LBB342
-	.4byte	0x7344
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x310
-	.4byte	0xdc5
-	.4byte	.LLST453
-	.uleb128 0x34
-	.4byte	.LVL2057
-	.4byte	0x29ec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2049
-	.4byte	0x92b5
-	.4byte	0x7364
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC70
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2050
-	.4byte	0x79fa
-	.4byte	0x737b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2051
-	.4byte	0x779d
-	.uleb128 0x44
-	.4byte	.LVL2052
-	.4byte	0x76ed
-	.uleb128 0x44
-	.4byte	.LVL2053
-	.4byte	0x6005
-	.uleb128 0x44
-	.4byte	.LVL2054
-	.4byte	0x6484
-	.uleb128 0x44
-	.4byte	.LVL2055
-	.4byte	0x398b
-	.byte	0
-	.uleb128 0x8
-	.byte	0x4
-	.4byte	0xed2
-	.uleb128 0x5c
-	.4byte	.LASF847
-	.byte	0x3
-	.2byte	0x26e
-	.4byte	0x50
-	.4byte	.LFB213
-	.4byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7505
-	.uleb128 0x54
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdba
-	.4byte	.LLST449
-	.uleb128 0x54
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdba
-	.4byte	.LLST450
-	.uleb128 0x54
-	.4byte	.LASF849
-	.byte	0x3
-	.2byte	0x271
-	.4byte	0xdba
-	.4byte	.LLST451
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x272
-	.4byte	0xdba
-	.4byte	.LLST452
-	.uleb128 0x58
-	.4byte	.LASF850
-	.byte	0x3
-	.2byte	0x2bc
-	.4byte	.L1785
-	.uleb128 0x58
-	.4byte	.LASF851
-	.byte	0x3
-	.2byte	0x2cc
-	.4byte	.L1787
-	.uleb128 0x44
-	.4byte	.LVL2003
-	.4byte	0x6005
-	.uleb128 0x44
-	.4byte	.LVL2004
-	.4byte	0x6484
-	.uleb128 0x44
-	.4byte	.LVL2005
-	.4byte	0x6226
-	.uleb128 0x44
-	.4byte	.LVL2019
-	.4byte	0x663d
-	.uleb128 0x32
-	.4byte	.LVL2020
-	.4byte	0x22fb
-	.4byte	0x7456
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2021
-	.4byte	0x22fb
-	.4byte	0x746a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2022
-	.4byte	0x3f1b
-	.4byte	0x747e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2026
-	.4byte	0x7505
-	.4byte	0x7497
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2033
-	.4byte	0x7a56
-	.uleb128 0x44
-	.4byte	.LVL2034
-	.4byte	0x6005
-	.uleb128 0x32
-	.4byte	.LVL2037
-	.4byte	0x7505
-	.4byte	0x74c2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 -1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2040
-	.4byte	0x7505
-	.4byte	0x74d5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL2044
-	.4byte	0x3f1b
-	.4byte	0x74e9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL2045
-	.4byte	0x5e28
-	.uleb128 0x44
-	.4byte	.LVL2046
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL2047
-	.4byte	0x398b
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF852
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x50
-	.4byte	.LFB212
-	.4byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x76c3
-	.uleb128 0x52
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdba
-	.4byte	.LLST175
-	.uleb128 0x52
-	.4byte	.LASF853
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdaf
-	.4byte	.LLST176
-	.uleb128 0x54
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdba
-	.4byte	.LLST177
-	.uleb128 0x54
-	.4byte	.LASF568
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdba
-	.4byte	.LLST178
-	.uleb128 0x54
-	.4byte	.LASF594
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdba
-	.4byte	.LLST179
-	.uleb128 0x54
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdba
-	.4byte	.LLST180
-	.uleb128 0x54
-	.4byte	.LASF854
-	.byte	0x3
-	.2byte	0x213
-	.4byte	0xdba
-	.4byte	.LLST181
-	.uleb128 0x54
-	.4byte	.LASF855
-	.byte	0x3
-	.2byte	0x214
-	.4byte	0xdba
-	.4byte	.LLST182
-	.uleb128 0x54
-	.4byte	.LASF856
-	.byte	0x3
-	.2byte	0x215
-	.4byte	0xdba
-	.4byte	.LLST183
-	.uleb128 0x54
-	.4byte	.LASF857
-	.byte	0x3
-	.2byte	0x216
-	.4byte	0xdba
-	.4byte	.LLST184
-	.uleb128 0x58
-	.4byte	.LASF858
-	.byte	0x3
-	.2byte	0x240
-	.4byte	.L496
-	.uleb128 0x32
-	.4byte	.LVL635
-	.4byte	0x2453
-	.4byte	0x75e5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL643
-	.4byte	0x2509
-	.4byte	0x760b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL650
-	.4byte	0x2453
-	.4byte	0x7625
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL652
-	.4byte	0x61df
-	.4byte	0x763b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL654
-	.4byte	0x76c3
-	.4byte	0x764f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL655
-	.4byte	0x6812
-	.4byte	0x7663
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL666
-	.4byte	0x6875
-	.uleb128 0x32
-	.4byte	.LVL670
-	.4byte	0x61df
-	.4byte	0x7682
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -60
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL672
-	.4byte	0x76c3
-	.4byte	0x7696
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL673
-	.4byte	0x6812
-	.4byte	0x76aa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL681
-	.4byte	0x6875
-	.uleb128 0x34
-	.4byte	.LVL685
-	.4byte	0x5fb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF859
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x50
-	.byte	0x1
-	.4byte	0x76ed
-	.uleb128 0x4a
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0xdba
-	.uleb128 0x4b
-	.4byte	.LASF860
-	.byte	0x3
-	.2byte	0x203
-	.4byte	0xdba
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF861
-	.byte	0x3
-	.2byte	0x1ed
-	.4byte	0x50
-	.4byte	.LFB210
-	.4byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x779d
-	.uleb128 0x32
-	.4byte	.LVL1049
-	.4byte	0x22fb
-	.4byte	0x771b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1050
-	.4byte	0x22fb
-	.4byte	0x772f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1051
-	.4byte	0x22fb
-	.4byte	0x7743
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1052
-	.4byte	0x22fb
-	.4byte	0x7766
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1053
-	.4byte	0x22fb
-	.4byte	0x778a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR81
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1054
-	.4byte	0x3213
-	.uleb128 0x44
-	.4byte	.LVL1055
-	.4byte	0x476d
-	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF862
-	.byte	0x3
-	.2byte	0x117
-	.4byte	0x50
-	.4byte	.LFB209
-	.4byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x79fa
-	.uleb128 0x53
-	.ascii	"i\000"
-	.byte	0x3
-	.2byte	0x119
-	.4byte	0xdc5
-	.4byte	.LLST194
-	.uleb128 0x54
-	.4byte	.LASF863
-	.byte	0x3
-	.2byte	0x11a
-	.4byte	0xdc5
-	.4byte	.LLST195
-	.uleb128 0x3d
-	.4byte	.LASF573
-	.4byte	0x65c3
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	__func__.8802
-	.uleb128 0x44
-	.4byte	.LVL707
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL708
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL710
-	.4byte	0x2917
-	.4byte	0x780a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL711
-	.4byte	0x2917
-	.4byte	0x781e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL712
-	.4byte	0x2917
-	.4byte	0x7832
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL713
-	.4byte	0x2917
-	.4byte	0x7846
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL714
-	.4byte	0x2917
-	.4byte	0x785a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL716
-	.4byte	0x2917
-	.4byte	0x786e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL717
-	.4byte	0x2917
-	.4byte	0x7882
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL718
-	.4byte	0x2917
-	.4byte	0x7896
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL719
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL720
-	.4byte	0x2917
-	.4byte	0x78b3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL721
-	.4byte	0x2917
-	.4byte	0x78c7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL723
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL725
-	.4byte	0x2917
-	.4byte	0x78e4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL726
-	.4byte	0x2917
-	.4byte	0x78fa
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL727
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL728
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL729
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL732
-	.4byte	0x2917
-	.4byte	0x7929
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL733
-	.4byte	0x2917
-	.4byte	0x793d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL737
-	.4byte	0x2917
-	.4byte	0x7951
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL738
-	.4byte	0x2917
-	.4byte	0x7965
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL740
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL741
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL742
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL743
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL744
-	.4byte	0x2917
-	.uleb128 0x32
-	.4byte	.LVL745
-	.4byte	0x22fb
-	.4byte	0x79a7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL747
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL750
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL753
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL756
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL759
-	.4byte	0x2917
-	.uleb128 0x44
-	.4byte	.LVL763
-	.4byte	0x2917
-	.uleb128 0x34
-	.4byte	.LVL767
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC85
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR138
-	.byte	0
-	.byte	0
-	.uleb128 0x39
-	.4byte	.LASF864
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x50
-	.4byte	.LFB208
-	.4byte	.LFE208-.LFB208
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7a56
-	.uleb128 0x2c
-	.4byte	.LASF845
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x73a9
-	.4byte	.LLST10
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xb9
-	.4byte	0xdc5
-	.4byte	.LLST11
-	.uleb128 0x44
-	.4byte	.LVL30
-	.4byte	0x7a97
-	.uleb128 0x32
-	.4byte	.LVL31
-	.4byte	0x7a97
-	.4byte	0x7a4c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL35
-	.4byte	0x7a56
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF865
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0x50
-	.4byte	.LFB207
-	.4byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7a7f
-	.uleb128 0x2c
-	.4byte	.LASF866
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0xdba
-	.4byte	.LLST9
-	.byte	0
-	.uleb128 0x66
-	.4byte	.LASF867
-	.byte	0x3
-	.byte	0x9f
-	.byte	0x1
-	.4byte	0x7a97
-	.uleb128 0x36
-	.4byte	.LASF868
-	.byte	0x3
-	.byte	0x9f
-	.4byte	0xdc5
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF869
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdba
-	.4byte	.LFB205
-	.4byte	.LFE205-.LFB205
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7adc
-	.uleb128 0x2f
-	.ascii	"num\000"
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdc5
-	.4byte	.LLST6
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0x81
-	.4byte	0xdba
-	.4byte	.LLST7
-	.uleb128 0x30
-	.4byte	.LASF870
-	.byte	0x3
-	.byte	0x82
-	.4byte	0xdc5
-	.4byte	.LLST8
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF871
-	.byte	0x3
-	.byte	0x71
-	.4byte	0x50
-	.4byte	.LFB204
-	.4byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7b4a
-	.uleb128 0x2c
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0x71
-	.4byte	0xf6
-	.4byte	.LLST102
-	.uleb128 0x3b
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0x73
-	.4byte	0xf6
-	.4byte	.LLST103
-	.uleb128 0x32
-	.4byte	.LVL439
-	.4byte	0x92d7
-	.4byte	0x7b39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC70
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL441
-	.4byte	0x7b4a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x2b
-	.4byte	.LASF872
-	.byte	0x3
-	.byte	0xb
-	.4byte	0x50
-	.4byte	.LFB203
-	.4byte	.LFE203-.LFB203
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x83a0
-	.uleb128 0x2c
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0xb
-	.4byte	0xf6
-	.4byte	.LLST97
-	.uleb128 0x3b
-	.ascii	"i\000"
-	.byte	0x3
-	.byte	0xd
-	.4byte	0x50
-	.4byte	.LLST98
-	.uleb128 0x3b
-	.ascii	"buf\000"
-	.byte	0x3
-	.byte	0xe
-	.4byte	0xf6
-	.4byte	.LLST99
-	.uleb128 0x61
-	.4byte	.LBB225
-	.4byte	.LBE225-.LBB225
-	.4byte	0x7bde
-	.uleb128 0x30
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x57
-	.4byte	0xdba
-	.4byte	.LLST100
-	.uleb128 0x32
-	.4byte	.LVL425
-	.4byte	0x5b26
-	.4byte	0x7bbe
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL427
-	.4byte	0x92d7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC68
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x61
-	.4byte	.LBB226
-	.4byte	.LBE226-.LBB226
-	.4byte	0x7c17
-	.uleb128 0x30
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x60
-	.4byte	0xdba
-	.4byte	.LLST101
-	.uleb128 0x34
-	.4byte	.LVL435
-	.4byte	0x92d7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 -1
-	.byte	0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL290
-	.4byte	0x92d7
-	.4byte	0x7c34
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL292
-	.4byte	0x92d7
-	.4byte	0x7c51
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC3
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL294
-	.4byte	0x92d7
-	.4byte	0x7c6e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC4
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL296
-	.4byte	0x92d7
-	.4byte	0x7c8b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC5
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL298
-	.4byte	0x92d7
-	.4byte	0x7ca8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL300
-	.4byte	0x92d7
-	.4byte	0x7cc5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC7
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL302
-	.4byte	0x92d7
-	.4byte	0x7ce2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL304
-	.4byte	0x92d7
-	.4byte	0x7cff
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC9
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL306
-	.4byte	0x92d7
-	.4byte	0x7d1c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC10
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL308
-	.4byte	0x92d7
-	.4byte	0x7d39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC11
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL310
-	.4byte	0x92d7
-	.4byte	0x7d56
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC12
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL312
-	.4byte	0x92d7
-	.4byte	0x7d73
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC13
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL314
-	.4byte	0x92d7
-	.4byte	0x7d90
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC14
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL316
-	.4byte	0x92d7
-	.4byte	0x7dad
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC15
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL318
-	.4byte	0x92d7
-	.4byte	0x7dca
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC16
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL320
-	.4byte	0x92d7
-	.4byte	0x7de7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC17
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL322
-	.4byte	0x92d7
-	.4byte	0x7e04
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC18
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL324
-	.4byte	0x92d7
-	.4byte	0x7e21
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC19
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL326
-	.4byte	0x92d7
-	.4byte	0x7e3e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC20
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL328
-	.4byte	0x92d7
-	.4byte	0x7e5b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC21
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL330
-	.4byte	0x92d7
-	.4byte	0x7e78
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC22
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL332
-	.4byte	0x92d7
-	.4byte	0x7e95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC23
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL334
-	.4byte	0x92d7
-	.4byte	0x7eb2
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC24
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL336
-	.4byte	0x92d7
-	.4byte	0x7ecf
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC25
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL338
-	.4byte	0x92d7
-	.4byte	0x7eec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC26
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL340
-	.4byte	0x92d7
-	.4byte	0x7f09
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC27
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL342
-	.4byte	0x92d7
-	.4byte	0x7f26
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC28
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL344
-	.4byte	0x92d7
-	.4byte	0x7f43
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC29
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL346
-	.4byte	0x92d7
-	.4byte	0x7f60
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC30
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL348
-	.4byte	0x92d7
-	.4byte	0x7f7d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL350
-	.4byte	0x92d7
-	.4byte	0x7f9a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC32
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL352
-	.4byte	0x92d7
-	.4byte	0x7fb7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC33
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL354
-	.4byte	0x92d7
-	.4byte	0x7fd4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC34
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL356
-	.4byte	0x92d7
-	.4byte	0x7ff1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC35
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL358
-	.4byte	0x92d7
-	.4byte	0x800e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC36
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL360
-	.4byte	0x92d7
-	.4byte	0x802b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC37
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL362
-	.4byte	0x92d7
-	.4byte	0x8048
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC38
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL364
-	.4byte	0x92d7
-	.4byte	0x8065
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC39
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL366
-	.4byte	0x92d7
-	.4byte	0x8082
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL368
-	.4byte	0x92d7
-	.4byte	0x809f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC41
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL370
-	.4byte	0x92d7
-	.4byte	0x80bc
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC42
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL372
-	.4byte	0x92d7
-	.4byte	0x80d9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC43
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL374
-	.4byte	0x92d7
-	.4byte	0x80f6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC44
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL376
-	.4byte	0x92d7
-	.4byte	0x8113
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC45
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL378
-	.4byte	0x92d7
-	.4byte	0x8130
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC46
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL380
-	.4byte	0x92d7
-	.4byte	0x814d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC47
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL382
-	.4byte	0x92d7
-	.4byte	0x816a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC48
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL384
-	.4byte	0x92d7
-	.4byte	0x8187
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC49
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL386
-	.4byte	0x92d7
-	.4byte	0x81a4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC50
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL388
-	.4byte	0x92d7
-	.4byte	0x81c1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC51
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL390
-	.4byte	0x92d7
-	.4byte	0x81de
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC52
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL392
-	.4byte	0x92d7
-	.4byte	0x81fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC53
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL394
-	.4byte	0x92d7
-	.4byte	0x8218
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC54
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL396
-	.4byte	0x92d7
-	.4byte	0x8235
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC55
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL398
-	.4byte	0x92d7
-	.4byte	0x8252
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC56
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL400
-	.4byte	0x92d7
-	.4byte	0x826f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC57
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL402
-	.4byte	0x92d7
-	.4byte	0x828c
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC58
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL404
-	.4byte	0x92d7
-	.4byte	0x82a9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC59
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL406
-	.4byte	0x92d7
-	.4byte	0x82c6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC60
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL408
-	.4byte	0x92d7
-	.4byte	0x82e3
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC61
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL410
-	.4byte	0x92d7
-	.4byte	0x8300
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC62
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL412
-	.4byte	0x92d7
-	.4byte	0x831d
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC63
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL414
-	.4byte	0x92d7
-	.4byte	0x833a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC64
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL416
-	.4byte	0x38e8
-	.uleb128 0x32
-	.4byte	.LVL417
-	.4byte	0x92d7
-	.4byte	0x8360
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC65
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL419
-	.4byte	0x388f
-	.uleb128 0x32
-	.4byte	.LVL420
-	.4byte	0x92d7
-	.4byte	0x8386
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC66
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL423
-	.4byte	0x92d7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC67
-	.byte	0
-	.byte	0
-	.uleb128 0x6d
-	.4byte	0x27a6
-	.4byte	.LFB352
-	.4byte	.LFE352-.LFB352
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x83fa
-	.uleb128 0x46
-	.4byte	0x27c1
-	.4byte	.LLST0
-	.uleb128 0x46
-	.4byte	0x27cc
-	.4byte	.LLST1
-	.uleb128 0x6e
-	.4byte	0x27b6
-	.uleb128 0x6f
-	.4byte	0x27d7
-	.uleb128 0x6f
-	.4byte	0x27e2
-	.uleb128 0x70
-	.4byte	0x27ed
-	.4byte	.LLST2
-	.uleb128 0x70
-	.4byte	0x27f8
-	.4byte	.LLST3
-	.uleb128 0x70
-	.4byte	0x2803
-	.4byte	.LLST4
-	.uleb128 0x6f
-	.4byte	0x280e
-	.uleb128 0x6f
-	.4byte	0x2819
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x4b2d
-	.4byte	.LFB358
-	.4byte	.LFE358-.LFB358
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8423
-	.uleb128 0x46
-	.4byte	0x4b3a
-	.4byte	.LLST5
-	.uleb128 0x72
-	.4byte	0x4b46
-	.uleb128 0x6
-	.byte	0xfa
-	.4byte	0x4b46
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x7a7f
-	.4byte	.LFB206
-	.4byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x843e
-	.uleb128 0x72
-	.4byte	0x7a8b
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x76c3
-	.4byte	.LFB211
-	.4byte	.LFE211-.LFB211
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8476
-	.uleb128 0x46
-	.4byte	0x76d4
-	.4byte	.LLST12
-	.uleb128 0x6f
-	.4byte	0x76e0
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6e
-	.4byte	0x76d4
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6f
-	.4byte	0x845a
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x74
-	.4byte	0x6e85
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x74
-	.4byte	0x680a
-	.4byte	.LFB227
-	.4byte	.LFE227-.LFB227
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x74
-	.4byte	0x5ff9
-	.4byte	.LFB241
-	.4byte	.LFE241-.LFB241
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x74
-	.4byte	0x5fed
-	.4byte	.LFB242
-	.4byte	.LFE242-.LFB242
-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x71
-	.4byte	0x5dde
-	.4byte	.LFB248
-	.4byte	.LFE248-.LFB248
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8519
-	.uleb128 0x46
-	.4byte	0x5dea
-	.4byte	.LLST47
-	.uleb128 0x6f
-	.4byte	0x5df5
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x850f
-	.uleb128 0x6e
-	.4byte	0x5dea
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x6f
-	.4byte	0x84ce
-	.uleb128 0x2d
-	.4byte	.LVL134
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x5
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-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR46
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xdd
-	.byte	0
-	.byte	0
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-	.uleb128 0x44
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-	.uleb128 0x71
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-	.uleb128 0x46
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-	.uleb128 0x6e
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-	.4byte	.LVL153
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
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-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR49
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-	.uleb128 0x1
-	.byte	0x52
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-	.byte	0x8
-	.byte	0xd6
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-	.byte	0
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-	.byte	0
-	.uleb128 0x71
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-	.4byte	.LFE255-.LFB255
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-	.4byte	0x8699
-	.uleb128 0x46
-	.4byte	0x5ab8
-	.4byte	.LLST65
-	.uleb128 0x6f
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-	.uleb128 0x6f
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-	.uleb128 0x6f
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-	.uleb128 0x6f
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-	.uleb128 0x6f
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-	.uleb128 0x6f
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-	.uleb128 0x73
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-	.4byte	0x5ab8
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-	.uleb128 0x73
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-	.uleb128 0x70
-	.4byte	0x859c
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-	.uleb128 0x70
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-	.uleb128 0x70
-	.4byte	0x85a6
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-	.uleb128 0x70
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-	.uleb128 0x70
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-	.uleb128 0x70
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-	.uleb128 0x70
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-	.uleb128 0x32
-	.4byte	.LVL197
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-	.uleb128 0x2e
-	.uleb128 0x1
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-	.uleb128 0x5
-	.byte	0x3
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
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-	.4byte	.LANCHOR54
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1d6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL205
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-	.4byte	0x865f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR41
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL206
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-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR54
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1e1
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL207
-	.4byte	0x5dde
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
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-	.uleb128 0x1
-	.byte	0x9c
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-	.uleb128 0x46
-	.4byte	0x4fc1
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-	.4byte	0x4fcd
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-	.uleb128 0x73
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-	.uleb128 0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.uleb128 0x73
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-	.uleb128 0x71
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-	.uleb128 0x46
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-	.4byte	.LVL236
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x3
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x2b34
-	.4byte	.LFB320
-	.4byte	.LFE320-.LFB320
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8b85
-	.uleb128 0x46
-	.4byte	0x2b45
-	.4byte	.LLST303
-	.uleb128 0x6f
-	.4byte	0x2b51
-	.uleb128 0x6f
-	.4byte	0x2b5d
-	.uleb128 0x6f
-	.4byte	0x2b67
-	.uleb128 0x6f
-	.4byte	0x2b71
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x130
-	.uleb128 0x6e
-	.4byte	0x2b45
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x130
-	.uleb128 0x70
-	.4byte	0x8ae8
-	.4byte	.LLST304
-	.uleb128 0x70
-	.4byte	0x8aed
-	.4byte	.LLST305
-	.uleb128 0x70
-	.4byte	0x8af2
-	.4byte	.LLST306
-	.uleb128 0x78
-	.4byte	0x8af7
-	.uleb128 0x1
-	.byte	0x5b
-	.uleb128 0x44
-	.4byte	.LVL1236
-	.4byte	0x2b7e
-	.uleb128 0x32
-	.4byte	.LVL1238
-	.4byte	0x61df
-	.4byte	0x8b4a
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1244
-	.4byte	0x92b5
-	.4byte	0x8b65
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1245
-	.4byte	0x6875
-	.4byte	0x8b79
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1246
-	.4byte	0x663d
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x32db
-	.4byte	.LFB304
-	.4byte	.LFE304-.LFB304
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8c65
-	.uleb128 0x46
-	.4byte	0x32ec
-	.4byte	.LLST307
-	.uleb128 0x6f
-	.4byte	0x32f8
-	.uleb128 0x61
-	.4byte	.LBB294
-	.4byte	.LBE294-.LBB294
-	.4byte	0x8c5b
-	.uleb128 0x46
-	.4byte	0x32ec
-	.4byte	.LLST308
-	.uleb128 0x76
-	.4byte	.LBB295
-	.4byte	.LBE295-.LBB295
-	.uleb128 0x6f
-	.4byte	0x8ba1
-	.uleb128 0x32
-	.4byte	.LVL1256
-	.4byte	0x5c23
-	.4byte	0x8be7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR41
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1257
-	.4byte	0x92b5
-	.4byte	0x8c0e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR158
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xabb
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1258
-	.4byte	0x37a0
-	.4byte	0x8c22
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1259
-	.4byte	0x2b34
-	.4byte	0x8c36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1260
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR158
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xabe
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1264
-	.4byte	0x5aa7
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x4ece
-	.4byte	.LFB271
-	.4byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8d3d
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x150
-	.uleb128 0x70
-	.4byte	0x4edc
-	.4byte	.LLST311
-	.uleb128 0x78
-	.4byte	0x4ee8
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -56
-	.uleb128 0x70
-	.4byte	0x4ef4
-	.4byte	.LLST312
-	.uleb128 0x78
-	.4byte	0x4f00
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x70
-	.4byte	0x4f0c
-	.4byte	.LLST313
-	.uleb128 0x32
-	.4byte	.LVL1277
-	.4byte	0x526b
-	.4byte	0x8cc8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1279
-	.4byte	0x26a8
-	.4byte	0x8ce7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1283
-	.4byte	0x22fb
-	.4byte	0x8cfb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1285
-	.4byte	0x331b
-	.4byte	0x8d0f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1286
-	.4byte	0x2509
-	.4byte	0x8d32
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -52
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1287
-	.4byte	0x3236
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x3df7
-	.4byte	.LFB289
-	.4byte	.LFE289-.LFB289
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8d6e
-	.uleb128 0x2d
-	.4byte	.LVL1534
-	.4byte	0x5148
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR81
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x4b53
-	.4byte	.LFB274
-	.4byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8dc5
-	.uleb128 0x32
-	.4byte	.LVL1560
-	.4byte	0x5030
-	.4byte	0x8d95
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1561
-	.4byte	0x92b5
-	.4byte	0x8db5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC71
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC103
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1562
-	.4byte	0x22fb
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x2d79
-	.4byte	.LFB314
-	.4byte	.LFE314-.LFB314
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8e13
-	.uleb128 0x32
-	.4byte	.LVL1694
-	.4byte	0x2d82
-	.4byte	0x8dec
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1695
-	.4byte	0x4f1a
-	.4byte	0x8e03
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1696
-	.4byte	0x2f28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x29ec
-	.4byte	.LFB322
-	.4byte	.LFE322-.LFB322
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9129
-	.uleb128 0x46
-	.4byte	0x29fd
-	.4byte	.LLST397
-	.uleb128 0x46
-	.4byte	0x2a09
-	.4byte	.LLST398
-	.uleb128 0x75
-	.4byte	0x2a15
-	.byte	0x1
-	.uleb128 0x6f
-	.4byte	0x2a21
-	.uleb128 0x6f
-	.4byte	0x2a2d
-	.uleb128 0x7a
-	.4byte	0x2a39
-	.sleb128 -1
-	.uleb128 0x6f
-	.4byte	0x2a45
-	.uleb128 0x6f
-	.4byte	0x2a51
-	.uleb128 0x6f
-	.4byte	0x2a5d
-	.uleb128 0x6f
-	.4byte	0x2a69
-	.uleb128 0x6f
-	.4byte	0x2a75
-	.uleb128 0x6f
-	.4byte	0x2a81
-	.uleb128 0x6f
-	.4byte	0x2a9d
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1a0
-	.4byte	0x9119
-	.uleb128 0x46
-	.4byte	0x2a09
-	.4byte	.LLST399
-	.uleb128 0x46
-	.4byte	0x29fd
-	.4byte	.LLST400
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1a0
-	.uleb128 0x6f
-	.4byte	0x8e38
-	.uleb128 0x70
-	.4byte	0x8e3e
-	.4byte	.LLST401
-	.uleb128 0x78
-	.4byte	0x8e43
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x6f
-	.4byte	0x8e48
-	.uleb128 0x70
-	.4byte	0x8e4e
-	.4byte	.LLST402
-	.uleb128 0x70
-	.4byte	0x8e53
-	.4byte	.LLST403
-	.uleb128 0x70
-	.4byte	0x8e58
-	.4byte	.LLST404
-	.uleb128 0x70
-	.4byte	0x8e5d
-	.4byte	.LLST405
-	.uleb128 0x70
-	.4byte	0x8e62
-	.4byte	.LLST406
-	.uleb128 0x70
-	.4byte	0x8e67
-	.4byte	.LLST407
-	.uleb128 0x7b
-	.4byte	0x2a8d
-	.uleb128 0x7b
-	.4byte	0x2a95
-	.uleb128 0x6f
-	.4byte	0x8e6c
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1c0
-	.4byte	0x8f57
-	.uleb128 0x70
-	.4byte	0x2aab
-	.4byte	.LLST408
-	.uleb128 0x44
-	.4byte	.LVL1721
-	.4byte	0x37be
-	.uleb128 0x32
-	.4byte	.LVL1724
-	.4byte	0x5b26
-	.4byte	0x8f20
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1726
-	.4byte	0x5b26
-	.4byte	0x8f34
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1729
-	.4byte	0x2b7e
-	.uleb128 0x34
-	.4byte	.LVL1741
-	.4byte	0x92b5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC107
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1752
-	.4byte	0x3145
-	.uleb128 0x32
-	.4byte	.LVL1753
-	.4byte	0x3f1b
-	.4byte	0x8f74
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1754
-	.4byte	0x5b26
-	.4byte	0x8f88
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x77
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1757
-	.4byte	0x2ad4
-	.uleb128 0x44
-	.4byte	.LVL1760
-	.4byte	0x5b26
-	.uleb128 0x32
-	.4byte	.LVL1762
-	.4byte	0x3236
-	.4byte	0x8fae
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1767
-	.4byte	0x3145
-	.4byte	0x8fc5
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1768
-	.4byte	0x3236
-	.4byte	0x8fd9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1769
-	.4byte	0x92b5
-	.4byte	0x9000
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x292
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1770
-	.4byte	0x92b5
-	.4byte	0x9027
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x293
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1771
-	.4byte	0x92b5
-	.4byte	0x904e
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x294
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1772
-	.4byte	0x3f1b
-	.4byte	0x9062
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1773
-	.4byte	0x2ad4
-	.uleb128 0x32
-	.4byte	.LVL1783
-	.4byte	0x26a8
-	.4byte	0x9081
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1792
-	.4byte	0x92b5
-	.4byte	0x90a8
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR175
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2b8
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1793
-	.4byte	0x526b
-	.4byte	0x90c7
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x78
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1795
-	.4byte	0x2cfd
-	.uleb128 0x32
-	.4byte	.LVL1796
-	.4byte	0x317b
-	.4byte	0x90ea
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1797
-	.4byte	0x2c59
-	.uleb128 0x44
-	.4byte	.LVL1802
-	.4byte	0x2c59
-	.uleb128 0x44
-	.4byte	.LVL1803
-	.4byte	0x32db
-	.uleb128 0x44
-	.4byte	.LVL1804
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1805
-	.4byte	0x4d67
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1735
-	.4byte	0x2f28
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x71
-	.4byte	0x398b
-	.4byte	.LFB295
-	.4byte	.LFE295-.LFB295
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9292
-	.uleb128 0x75
-	.4byte	0x399c
-	.byte	0
-	.uleb128 0x61
-	.4byte	.LBB339
-	.4byte	.LBE339-.LBB339
-	.4byte	0x9228
-	.uleb128 0x6f
-	.4byte	0x913c
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1f0
-	.4byte	0x9167
-	.uleb128 0x70
-	.4byte	0x39a7
-	.4byte	.LLST448
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1986
-	.4byte	0x3d03
-	.4byte	0x917b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1987
-	.4byte	0x3d03
-	.4byte	0x918f
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1989
-	.4byte	0x4f1a
-	.4byte	0x91a6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1990
-	.4byte	0x4f1a
-	.4byte	0x91bd
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR149
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1991
-	.4byte	0x536c
-	.uleb128 0x44
-	.4byte	.LVL1992
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL1993
-	.4byte	0x4d67
-	.uleb128 0x44
-	.4byte	.LVL1994
-	.4byte	0x2c15
-	.uleb128 0x44
-	.4byte	.LVL1995
-	.4byte	0x2c15
-	.uleb128 0x32
-	.4byte	.LVL1996
-	.4byte	0x340d
-	.4byte	0x9201
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR51
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1997
-	.4byte	0x340d
-	.4byte	0x9215
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1998
-	.4byte	0x3bec
-	.uleb128 0x44
-	.4byte	.LVL2002
-	.4byte	0x536c
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1973
-	.4byte	0x6005
-	.uleb128 0x44
-	.4byte	.LVL1974
-	.4byte	0x4b60
-	.uleb128 0x44
-	.4byte	.LVL1975
-	.4byte	0x4994
-	.uleb128 0x44
-	.4byte	.LVL1976
-	.4byte	0x4736
-	.uleb128 0x44
-	.4byte	.LVL1977
-	.4byte	0x47b7
-	.uleb128 0x44
-	.4byte	.LVL1978
-	.4byte	0x3da6
-	.uleb128 0x44
-	.4byte	.LVL1979
-	.4byte	0x4b53
-	.uleb128 0x44
-	.4byte	.LVL1980
-	.4byte	0x5f56
-	.uleb128 0x44
-	.4byte	.LVL1981
-	.4byte	0x3e00
-	.uleb128 0x44
-	.4byte	.LVL1982
-	.4byte	0x3fb1
-	.uleb128 0x34
-	.4byte	.LVL1983
-	.4byte	0x4fb4
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x7c
-	.4byte	.LASF873
-	.4byte	.LASF873
-	.byte	0xb
-	.byte	0x72
-	.uleb128 0x7d
-	.4byte	.LASF874
-	.4byte	.LASF874
-	.byte	0x1c
-	.2byte	0x16d
-	.uleb128 0x7d
-	.4byte	.LASF875
-	.4byte	.LASF875
-	.byte	0x1c
-	.2byte	0x16c
-	.uleb128 0x7c
-	.4byte	.LASF876
-	.4byte	.LASF876
-	.byte	0x1d
-	.byte	0x12
-	.uleb128 0x7c
-	.4byte	.LASF877
-	.4byte	.LASF877
-	.byte	0x6
-	.byte	0x35
-	.uleb128 0x7d
-	.4byte	.LASF878
-	.4byte	.LASF878
-	.byte	0x1c
-	.2byte	0x399
-	.uleb128 0x7c
-	.4byte	.LASF879
-	.4byte	.LASF879
-	.byte	0x1e
-	.byte	0x6d
-	.byte	0
-	.section	.debug_abbrev,"",%progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x10
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x5
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x7
-	.uleb128 0x26
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.uleb128 0x1
-	.byte	0x1
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0x21
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0xd
-	.uleb128 0x26
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xe
-	.uleb128 0x21
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xf
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x10
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x12
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x13
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x14
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x15
-	.uleb128 0x21
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0x5
-	.byte	0
-	.byte	0
-	.uleb128 0x16
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x17
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x18
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x19
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1a
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1b
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x1c
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1d
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
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-	.uleb128 0x1e
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x1f
-	.uleb128 0x4
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x20
-	.uleb128 0x28
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1c
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x21
-	.uleb128 0x28
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1c
-	.uleb128 0xd
-	.byte	0
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-	.uleb128 0x22
-	.uleb128 0x4
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
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-	.uleb128 0x23
-	.uleb128 0x15
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-	.uleb128 0x27
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-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
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-	.uleb128 0xe
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-	.uleb128 0x3a
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-	.byte	0
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-	.uleb128 0x25
-	.uleb128 0x13
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-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0x5
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-	.2byte	0x1
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-	.4byte	.LVL614
-	.2byte	0x4
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-	.uleb128 0x1
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-	.2byte	0x1
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-	.4byte	.LFE345
-	.2byte	0x4
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-	.uleb128 0x1
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-	.4byte	.LVL594
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-	.2byte	0x1
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-	.4byte	.LVL594
-	.4byte	.LVL595
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-	.2byte	0x2
-	.byte	0x7d
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-	.4byte	.LVL600
-	.2byte	0x3
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-	.4byte	.LVL600
-	.4byte	.LFE345
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-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL596
-	.4byte	.LVL597
-	.2byte	0x2
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-	.4byte	.LVL598
-	.2byte	0x1
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-	.4byte	.LVL600
-	.4byte	.LVL607
-	.2byte	0x1
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	.LVL603
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-	.2byte	0x1
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-	.2byte	0x1
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-	.4byte	0
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-	.4byte	.LVL596
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-	.2byte	0x1
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-	.4byte	.LVL596
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-	.uleb128 0x1
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-	.4byte	.LVL554
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-	.4byte	.LVL554
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-	.4byte	.LVL554
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-	.4byte	.LVL560
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-	.sleb128 -1
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-	.4byte	.LVL543
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-	.4byte	.LVL543
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-	.4byte	.LVL543
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-	.4byte	.LVL543
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL544
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-	.4byte	.LVL541
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-	.4byte	.LVL539
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-	.4byte	.LVL539
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-	.4byte	.LVL526
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-	.4byte	.LVL530
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-	.4byte	.LVL523
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-	.4byte	.LVL1710
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-	.4byte	.LVL1106
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-	.4byte	.LVL1122
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-	.4byte	.LVL1114
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-	.4byte	.LVL1117
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-	.4byte	.LVL1113
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-	.4byte	.LVL1107
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-	.4byte	.LVL1129
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-	.4byte	.LVL1106
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-	.4byte	.LVL1132
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-	.byte	0x53
-	.4byte	.LVL1133
-	.4byte	.LVL1134
-	.2byte	0x5
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0xc
-	.4byte	.LVL1137
-	.4byte	.LVL1139-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST390:
-	.4byte	.LVL1660
-	.4byte	.LVL1662
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1662
-	.4byte	.LVL1663
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1663
-	.4byte	.LVL1665
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1665
-	.4byte	.LFE311
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST391:
-	.4byte	.LVL1673
-	.4byte	.LVL1675
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1675
-	.4byte	.LVL1678
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1681
-	.4byte	.LVL1689
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1689
-	.4byte	.LVL1690
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1691
-	.4byte	.LFE311
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST392:
-	.4byte	.LVL1666
-	.4byte	.LVL1671
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1672
-	.4byte	.LVL1673
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1686
-	.4byte	.LVL1688
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST393:
-	.4byte	.LVL1661
-	.4byte	.LVL1662
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1663
-	.4byte	.LVL1664
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1664
-	.4byte	.LVL1666
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	.LVL1666
-	.4byte	.LVL1667-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1671
-	.4byte	.LVL1672
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST394:
-	.4byte	.LVL1682
-	.4byte	.LVL1692
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST124:
-	.4byte	.LVL515
-	.4byte	.LVL516
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL516
-	.4byte	.LVL522
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL522
-	.4byte	.LFE310
-	.2byte	0x5
-	.byte	0x71
-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST125:
-	.4byte	.LVL515
-	.4byte	.LVL517-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL517-1
-	.4byte	.LVL522
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL522
-	.4byte	.LFE310
-	.2byte	0x7
-	.byte	0x71
-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST126:
-	.4byte	.LVL515
-	.4byte	.LVL517-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL517-1
-	.4byte	.LVL522
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL522
-	.4byte	.LFE310
-	.2byte	0x7
-	.byte	0x71
-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x8
-	.4byte	0
-	.4byte	0
-.LLST127:
-	.4byte	.LVL517
-	.4byte	.LVL521
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST128:
-	.4byte	.LVL517
-	.4byte	.LVL518
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL519
-	.4byte	.LVL520
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	0
-	.4byte	0
-.LLST122:
-	.4byte	.LVL510
-	.4byte	.LVL512
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL512
-	.4byte	.LVL513
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL513
-	.4byte	.LVL514
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL514
-	.4byte	.LFE309
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST123:
-	.4byte	.LVL510
-	.4byte	.LVL511
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST120:
-	.4byte	.LVL506
-	.4byte	.LVL507
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST121:
-	.4byte	.LVL504
-	.4byte	.LVL505
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL505
-	.4byte	.LVL508
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL508
-	.4byte	.LVL509
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST118:
-	.4byte	.LVL498
-	.4byte	.LVL499
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST119:
-	.4byte	.LVL496
-	.4byte	.LVL497
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL497
-	.4byte	.LVL500
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL500
-	.4byte	.LVL501
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL502
-	.4byte	.LVL503
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL503
-	.4byte	.LFE307
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST117:
-	.4byte	.LVL489
-	.4byte	.LVL490
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL491
-	.4byte	.LVL492
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL493
-	.4byte	.LVL494
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL495
-	.4byte	.LFE306
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST309:
-	.4byte	.LVL1265
-	.4byte	.LVL1266
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1266
-	.4byte	.LVL1272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1272
-	.4byte	.LVL1273
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1273
-	.4byte	.LFE305
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST310:
-	.4byte	.LVL1265
-	.4byte	.LVL1268
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1269
-	.4byte	.LVL1270
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1272
-	.4byte	.LVL1275
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1275
-	.4byte	.LFE305
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST114:
-	.4byte	.LVL478
-	.4byte	.LVL479
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL479
-	.4byte	.LFE303
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST115:
-	.4byte	.LVL483
-	.4byte	.LVL485
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL487
-	.4byte	.LFE303
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST116:
-	.4byte	.LVL478
-	.4byte	.LVL484
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL484
-	.4byte	.LVL487
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL487
-	.4byte	.LFE303
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST381:
-	.4byte	.LVL1626
-	.4byte	.LVL1628
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1628
-	.4byte	.LFE302
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST294:
-	.4byte	.LVL1192
-	.4byte	.LVL1193
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1193
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1233
-	.4byte	.LFE301
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST295:
-	.4byte	.LVL1199
-	.4byte	.LVL1204
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1205
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST296:
-	.4byte	.LVL1207
-	.4byte	.LVL1220
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1221
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST297:
-	.4byte	.LVL1212
-	.4byte	.LVL1213
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1214
-	.4byte	.LVL1215
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1215
-	.4byte	.LVL1219
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1225
-	.4byte	.LVL1229
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1229
-	.4byte	.LVL1230
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1231
-	.4byte	.LVL1233
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST298:
-	.4byte	.LVL1227
-	.4byte	.LVL1228-1
-	.2byte	0x6
-	.byte	0x7c
-	.sleb128 4
-	.byte	0x6
-	.byte	0x3a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST299:
-	.4byte	.LVL1214
-	.4byte	.LVL1215
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1215
-	.4byte	.LVL1216-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1225
-	.4byte	.LVL1226
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1226
-	.4byte	.LVL1227
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1227
-	.4byte	.LVL1228-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1228-1
-	.4byte	.LVL1229
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL1229
-	.4byte	.LVL1231
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST300:
-	.4byte	.LVL1192
-	.4byte	.LVL1193
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1195
-	.4byte	.LVL1196
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1196
-	.4byte	.LVL1197
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1197
-	.4byte	.LVL1198-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST301:
-	.4byte	.LVL1222
-	.4byte	.LVL1224
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST302:
-	.4byte	.LVL1222
-	.4byte	.LVL1224
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST104:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL471
-	.4byte	.LVL473
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST105:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL462
-	.4byte	.LVL467
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST106:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL461
-	.4byte	.LVL465
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL467
-	.4byte	.LVL472
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL473
-	.4byte	.LFE299
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST107:
-	.4byte	.LVL461
-	.4byte	.LVL462
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL467
-	.4byte	.LVL470
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL474
-	.4byte	.LFE299
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST108:
-	.4byte	.LVL459
-	.4byte	.LVL460
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST109:
-	.4byte	.LVL463
-	.4byte	.LVL467
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST110:
-	.4byte	.LVL446
-	.4byte	.LVL447
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL447
-	.4byte	.LVL448-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL451
-	.4byte	.LVL453
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL454
-	.4byte	.LVL455
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL455
-	.4byte	.LVL457
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST111:
-	.4byte	.LVL445
-	.4byte	.LVL450
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL451
-	.4byte	.LVL461
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL461
-	.4byte	.LVL464-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL467
-	.4byte	.LVL468
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL469
-	.4byte	.LFE299
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST93:
-	.4byte	.LVL280
-	.4byte	.LVL281
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL281
-	.4byte	.LVL284
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL285
-	.4byte	.LVL287
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL287
-	.4byte	.LFE298
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST94:
-	.4byte	.LVL280
-	.4byte	.LVL284
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL284
-	.4byte	.LVL285
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL285
-	.4byte	.LVL287
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL287
-	.4byte	.LFE298
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST95:
-	.4byte	.LVL282
-	.4byte	.LVL286
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST96:
-	.4byte	.LVL282
-	.4byte	.LVL283
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST92:
-	.4byte	.LVL278
-	.4byte	.LVL279
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL279
-	.4byte	.LFE297
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST88:
-	.4byte	.LVL267
-	.4byte	.LVL268
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL268
-	.4byte	.LFE296
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST89:
-	.4byte	.LVL267
-	.4byte	.LVL268
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL268
-	.4byte	.LVL275
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL275
-	.4byte	.LVL276
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL277
-	.4byte	.LFE296
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST90:
-	.4byte	.LVL272
-	.4byte	.LVL273-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST91:
-	.4byte	.LVL267
-	.4byte	.LVL268
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL268
-	.4byte	.LVL269
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL269
-	.4byte	.LVL270
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL270
-	.4byte	.LVL271
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 4
-	.4byte	.LVL271
-	.4byte	.LVL274
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL275
-	.4byte	.LFE296
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST239:
-	.4byte	.LVL921
-	.4byte	.LVL923
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST266:
-	.4byte	.LVL1084
-	.4byte	.LVL1085
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1087
-	.4byte	.LVL1090
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1099
-	.4byte	.LVL1101
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1101
-	.4byte	.LVL1102
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1102
-	.4byte	.LFE293
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST267:
-	.4byte	.LVL1082
-	.4byte	.LVL1083
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1094
-	.4byte	.LVL1099
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST268:
-	.4byte	.LVL1087
-	.4byte	.LVL1089
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1096
-	.4byte	.LVL1097
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST269:
-	.4byte	.LVL1080
-	.4byte	.LVL1084
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1084
-	.4byte	.LVL1087
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1091
-	.4byte	.LVL1092
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1092
-	.4byte	.LVL1093
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1094
-	.4byte	.LVL1099
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1099
-	.4byte	.LFE293
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST270:
-	.4byte	.LVL1086
-	.4byte	.LVL1091
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST378:
-	.4byte	.LVL1614
-	.4byte	.LVL1615
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1620
-	.4byte	.LVL1624
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1624
-	.4byte	.LVL1625
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1625
-	.4byte	.LFE292
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST379:
-	.4byte	.LVL1612
-	.4byte	.LVL1613
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1615
-	.4byte	.LVL1620
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST380:
-	.4byte	.LVL1617
-	.4byte	.LVL1618
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST341:
-	.4byte	.LVL1433
-	.4byte	.LVL1435
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1435
-	.4byte	.LFE291
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST342:
-	.4byte	.LVL1433
-	.4byte	.LVL1435
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL1435
-	.4byte	.LVL1436
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL1436
-	.4byte	.LVL1437
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1437
-	.4byte	.LVL1438
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	.LVL1439
-	.4byte	.LFE291
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -2
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST260:
-	.4byte	.LVL1058
-	.4byte	.LVL1069
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1069
-	.4byte	.LVL1070
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1070
-	.4byte	.LVL1071
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1071
-	.4byte	.LVL1079
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST261:
-	.4byte	.LVL1059
-	.4byte	.LVL1060-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1063
-	.4byte	.LVL1064
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1064
-	.4byte	.LVL1065-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1071
-	.4byte	.LVL1072
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST262:
-	.4byte	.LVL1060
-	.4byte	.LVL1061-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST263:
-	.4byte	.LVL1059
-	.4byte	.LVL1062
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1063
-	.4byte	.LVL1065
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1065
-	.4byte	.LVL1067
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1067
-	.4byte	.LVL1069-1
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x71
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	.LVL1071
-	.4byte	.LVL1072
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1072
-	.4byte	.LVL1074
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1074
-	.4byte	.LVL1076-1
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x71
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST264:
-	.4byte	.LVL1058
-	.4byte	.LVL1073
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1075
-	.4byte	.LVL1077
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1077
-	.4byte	.LVL1078-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_num_data_superblocks
-	.4byte	0
-	.4byte	0
-.LLST265:
-	.4byte	.LVL1058
-	.4byte	.LVL1066
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1068
-	.4byte	.LVL1079
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST86:
-	.4byte	.LVL257
-	.4byte	.LVL258
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL258
-	.4byte	.LFE287
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST87:
-	.4byte	.LVL260
-	.4byte	.LVL265
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL265
-	.4byte	.LVL266
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST315:
-	.4byte	.LVL1295
-	.4byte	.LVL1298
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1298
-	.4byte	.LVL1300
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1300
-	.4byte	.LVL1301
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1301
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST316:
-	.4byte	.LVL1296
-	.4byte	.LVL1299
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1300
-	.4byte	.LFE284
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST317:
-	.4byte	.LVL1297
-	.4byte	.LVL1299
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1300
-	.4byte	.LFE284
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST318:
-	.4byte	.LVL1300
-	.4byte	.LVL1301
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1302
-	.4byte	.LVL1306
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1307
-	.4byte	.LVL1308
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1308
-	.4byte	.LVL1309-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1319
-	.4byte	.LVL1321
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1321
-	.4byte	.LVL1324
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1324
-	.4byte	.LVL1329
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1329
-	.4byte	.LVL1330
-	.2byte	0x3
-	.byte	0x72
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1347
-	.4byte	.LVL1352
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1352
-	.4byte	.LVL1353
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1353
-	.4byte	.LVL1354-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1360
-	.4byte	.LVL1361
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1361
-	.4byte	.LVL1362-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1367
-	.4byte	.LVL1368
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1368
-	.4byte	.LVL1370
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1376
-	.4byte	.LVL1379
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1379
-	.4byte	.LVL1380
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST319:
-	.4byte	.LVL1359
-	.4byte	.LVL1360
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1382
-	.4byte	.LVL1385
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1388
-	.4byte	.LVL1391
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1429
-	.4byte	.LVL1430
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1432
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST320:
-	.4byte	.LVL1345
-	.4byte	.LVL1346
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1346
-	.4byte	.LVL1356
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1357
-	.4byte	.LVL1358
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1359
-	.4byte	.LVL1360
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1360
-	.4byte	.LVL1365
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1366
-	.4byte	.LVL1371
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1371
-	.4byte	.LVL1376
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1376
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST321:
-	.4byte	.LVL1316
-	.4byte	.LVL1319
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1341
-	.4byte	.LFE284
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST322:
-	.4byte	.LVL1314
-	.4byte	.LVL1319
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1337
-	.4byte	.LVL1338
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1341
-	.4byte	.LFE284
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	0
-	.4byte	0
-.LLST323:
-	.4byte	.LVL1301
-	.4byte	.LVL1303-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1319
-	.4byte	.LVL1321
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1325
-	.4byte	.LVL1326
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1326
-	.4byte	.LVL1331
-	.2byte	0x5
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL1348
-	.4byte	.LVL1350
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1350
-	.4byte	.LVL1353
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -68
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.4byte	.LVL1369
-	.4byte	.LVL1371
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1377
-	.4byte	.LVL1378
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1378
-	.4byte	.LVL1381
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 -2
-	.4byte	0
-	.4byte	0
-.LLST324:
-	.4byte	.LVL1304
-	.4byte	.LVL1305
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1305
-	.4byte	.LVL1317
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1321
-	.4byte	.LVL1344
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST326:
-	.4byte	.LVL1307
-	.4byte	.LVL1317
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1324
-	.4byte	.LVL1327
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1328
-	.4byte	.LVL1346
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1347
-	.4byte	.LVL1349
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1351
-	.4byte	.LVL1355
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1360
-	.4byte	.LVL1361
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1361
-	.4byte	.LVL1371
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	.LVL1376
-	.4byte	.LFE284
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST327:
-	.4byte	.LVL1310
-	.4byte	.LVL1312
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1313
-	.4byte	.LVL1314
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1331
-	.4byte	.LVL1332
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1332
-	.4byte	.LVL1339
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1339
-	.4byte	.LVL1340
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST328:
-	.4byte	.LVL1354
-	.4byte	.LVL1355
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1362
-	.4byte	.LVL1363
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1364
-	.4byte	.LVL1371
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL1381
-	.4byte	.LVL1387
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL1387
-	.4byte	.LVL1388
-	.2byte	0x7
-	.byte	0x91
-	.sleb128 -56
-	.byte	0x94
-	.byte	0x2
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL1388
-	.4byte	.LFE284
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	0
-	.4byte	0
-.LLST329:
-	.4byte	.LVL1393
-	.4byte	.LVL1402
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1405
-	.4byte	.LVL1427
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST330:
-	.4byte	.LVL1383
-	.4byte	.LVL1386
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1388
-	.4byte	.LVL1402
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1402
-	.4byte	.LVL1403
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1405
-	.4byte	.LVL1427
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1429
-	.4byte	.LVL1432
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST331:
-	.4byte	.LVL1383
-	.4byte	.LVL1386
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1388
-	.4byte	.LVL1400
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1405
-	.4byte	.LVL1419
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1419
-	.4byte	.LVL1421
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1429
-	.4byte	.LVL1432
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST332:
-	.4byte	.LVL1310
-	.4byte	.LVL1311
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1311
-	.4byte	.LVL1319
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1331
-	.4byte	.LVL1389
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1389
-	.4byte	.LVL1390
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1390
-	.4byte	.LFE284
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST333:
-	.4byte	.LVL1295
-	.4byte	.LVL1298
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1300
-	.4byte	.LVL1312
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1319
-	.4byte	.LVL1331
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1343
-	.4byte	.LVL1358
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1371
-	.4byte	.LVL1376
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST334:
-	.4byte	.LVL1333
-	.4byte	.LVL1334
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1334
-	.4byte	.LVL1336
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1372
-	.4byte	.LVL1373
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1373
-	.4byte	.LVL1374
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 12
-	.4byte	.LVL1374
-	.4byte	.LVL1375
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 -8
-	.4byte	.LVL1384
-	.4byte	.LVL1385
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1388
-	.4byte	.LVL1394
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1397
-	.4byte	.LVL1400
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1407
-	.4byte	.LVL1410
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1410
-	.4byte	.LVL1411-1
-	.2byte	0x2
-	.byte	0x73
-	.sleb128 12
-	.4byte	.LVL1411-1
-	.4byte	.LVL1417
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1422
-	.4byte	.LVL1427
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST335:
-	.4byte	.LVL1342
-	.4byte	.LVL1358
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1371
-	.4byte	.LVL1376
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST336:
-	.4byte	.LVL1342
-	.4byte	.LVL1346
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST337:
-	.4byte	.LVL1398
-	.4byte	.LVL1399
-	.2byte	0x2
-	.byte	0x77
-	.sleb128 4
-	.4byte	.LVL1407
-	.4byte	.LVL1408-1
-	.2byte	0x2
-	.byte	0x77
-	.sleb128 4
-	.4byte	0
-	.4byte	0
-.LLST338:
-	.4byte	.LVL1412
-	.4byte	.LVL1415
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1415
-	.4byte	.LVL1416
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST339:
-	.4byte	.LVL1420
-	.4byte	.LVL1427
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST340:
-	.4byte	.LVL1423
-	.4byte	.LVL1424-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 4
-	.4byte	.LVL1424-1
-	.4byte	.LVL1425
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST233:
-	.4byte	.LVL899
-	.4byte	.LVL900
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL900
-	.4byte	.LVL916
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL916
-	.4byte	.LFE283
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST234:
-	.4byte	.LVL899
-	.4byte	.LVL901-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST235:
-	.4byte	.LVL902
-	.4byte	.LVL903
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST236:
-	.4byte	.LVL905
-	.4byte	.LVL907-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL911
-	.4byte	.LVL913
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL913
-	.4byte	.LVL914
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST237:
-	.4byte	.LVL905
-	.4byte	.LVL910
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL911
-	.4byte	.LVL912
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST238:
-	.4byte	.LVL904
-	.4byte	.LVL906
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL906
-	.4byte	.LVL907-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_num_free_superblocks
-	.4byte	.LVL911
-	.4byte	.LVL914
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST81:
-	.4byte	.LVL241
-	.4byte	.LVL244
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL244
-	.4byte	.LVL246
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL246
-	.4byte	.LVL249
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL249
-	.4byte	.LFE282
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST82:
-	.4byte	.LVL241
-	.4byte	.LVL243
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL243
-	.4byte	.LFE282
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST83:
-	.4byte	.LVL242
-	.4byte	.LVL245
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL245
-	.4byte	.LVL246
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL246
-	.4byte	.LVL247
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL248
-	.4byte	.LVL249
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL249
-	.4byte	.LVL250
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST259:
-	.4byte	.LVL1045
-	.4byte	.LVL1046
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST251:
-	.4byte	.LVL1002
-	.4byte	.LVL1005
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1005
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST252:
-	.4byte	.LVL1010
-	.4byte	.LVL1012-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1012-1
-	.4byte	.LVL1015
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1027
-	.4byte	.LVL1028
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1028
-	.4byte	.LVL1037
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1037
-	.4byte	.LVL1038
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1039
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST253:
-	.4byte	.LVL1014
-	.4byte	.LVL1015
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1016
-	.4byte	.LVL1017
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1022
-	.4byte	.LVL1023
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1023
-	.4byte	.LVL1025
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1025
-	.4byte	.LVL1026
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1030
-	.4byte	.LVL1031
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1031
-	.4byte	.LVL1032
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1034
-	.4byte	.LVL1035
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1036
-	.4byte	.LVL1040
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1040
-	.4byte	.LVL1041
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST254:
-	.4byte	.LVL1013
-	.4byte	.LVL1017
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1022
-	.4byte	.LVL1027
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST255:
-	.4byte	.LVL1040
-	.4byte	.LVL1042
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1042
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x5e
-	.4byte	0
-	.4byte	0
-.LLST256:
-	.4byte	.LVL1004
-	.4byte	.LVL1013
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1027
-	.4byte	.LFE278
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST257:
-	.4byte	.LVL1004
-	.4byte	.LVL1005
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 16
-	.4byte	.LVL1005
-	.4byte	.LVL1007-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 16
-	.4byte	.LVL1007-1
-	.4byte	.LFE278
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	0
-	.4byte	0
-.LLST258:
-	.4byte	.LVL1006
-	.4byte	.LVL1011
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	.LVL1027
-	.4byte	.LFE278
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -52
-	.4byte	0
-	.4byte	0
-.LLST447:
-	.4byte	.LVL1956
-	.4byte	.LVL1959
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1969
-	.4byte	.LVL1971
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1972
-	.4byte	.LFE277
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST80:
-	.4byte	.LVL239
-	.4byte	.LVL240
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL240
-	.4byte	.LFE276
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST245:
-	.4byte	.LVL951
-	.4byte	.LVL955
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL955
-	.4byte	.LVL956
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL956
-	.4byte	.LVL957
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL959
-	.4byte	.LVL960
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL960
-	.4byte	.LVL969
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL969
-	.4byte	.LVL970
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL971
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST246:
-	.4byte	.LVL953
-	.4byte	.LVL956
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -44
-	.4byte	.LVL961
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST247:
-	.4byte	.LVL951
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST248:
-	.4byte	.LVL974
-	.4byte	.LVL975
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL976
-	.4byte	.LVL977
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL983
-	.4byte	.LVL984
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL985
-	.4byte	.LVL986
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL994
-	.4byte	.LVL998
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL999
-	.4byte	.LVL1000
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1000
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST249:
-	.4byte	.LVL962
-	.4byte	.LVL964
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL966
-	.4byte	.LVL967
-	.2byte	0x5
-	.byte	0x40
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL967
-	.4byte	.LVL968
-	.2byte	0x5
-	.byte	0x41
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL973
-	.4byte	.LVL978
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL979
-	.4byte	.LVL980
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL982
-	.4byte	.LVL987
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL988
-	.4byte	.LVL989
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL995
-	.4byte	.LVL996
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL997
-	.4byte	.LVL998
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1000
-	.4byte	.LFE273
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST250:
-	.4byte	.LVL961
-	.4byte	.LVL991
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST369:
-	.4byte	.LVL1566
-	.4byte	.LVL1573
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL1575
-	.4byte	.LVL1577
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST370:
-	.4byte	.LVL1567
-	.4byte	.LVL1583
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST371:
-	.4byte	.LVL1566
-	.4byte	.LVL1573
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1573
-	.4byte	.LVL1579
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1580
-	.4byte	.LVL1583
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST241:
-	.4byte	.LVL935
-	.4byte	.LVL937
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL937
-	.4byte	.LVL940
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL940
-	.4byte	.LVL941-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL941-1
-	.4byte	.LVL941
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL941
-	.4byte	.LVL944
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL944
-	.4byte	.LFE270
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST242:
-	.4byte	.LVL936
-	.4byte	.LVL938
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL938
-	.4byte	.LVL939-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+4
-	.4byte	.LVL941
-	.4byte	.LVL942
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL942
-	.4byte	.LVL943-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+4
-	.4byte	0
-	.4byte	0
-.LLST243:
-	.4byte	.LVL935
-	.4byte	.LVL937
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL937
-	.4byte	.LVL939-1
-	.2byte	0x7
-	.byte	0x76
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL941
-	.4byte	.LVL943-1
-	.2byte	0x7
-	.byte	0x76
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL944
-	.4byte	.LFE270
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST244:
-	.4byte	.LVL935
-	.4byte	.LVL937
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL937
-	.4byte	.LVL939-1
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 24
-	.4byte	.LVL941
-	.4byte	.LVL943-1
-	.2byte	0x2
-	.byte	0x76
-	.sleb128 24
-	.4byte	.LVL944
-	.4byte	.LFE270
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST359:
-	.4byte	.LVL1535
-	.4byte	.LVL1538
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1538
-	.4byte	.LFE268
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST360:
-	.4byte	.LVL1535
-	.4byte	.LVL1536
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.4byte	.LVL1536
-	.4byte	.LVL1537
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1539
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST361:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1544
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST362:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1544
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST363:
-	.4byte	.LVL1542
-	.4byte	.LVL1543
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1543
-	.4byte	.LFE267
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST364:
-	.4byte	.LVL1549
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST365:
-	.4byte	.LVL1549
-	.4byte	.LVL1559
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -128
-	.4byte	0
-	.4byte	0
-.LLST366:
-	.4byte	.LVL1547
-	.4byte	.LVL1548-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1548-1
-	.4byte	.LVL1557
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	.LVL1557
-	.4byte	.LVL1558-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1558-1
-	.4byte	.LVL1559
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	0
-	.4byte	0
-.LLST367:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1544
-	.4byte	.LVL1545
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1546
-	.4byte	.LVL1559
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST368:
-	.4byte	.LVL1542
-	.4byte	.LVL1544
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL1559
-	.4byte	.LFE267
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST351:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1513
-	.4byte	.LVL1524
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1528
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST352:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1513
-	.4byte	.LVL1523
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1528
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST353:
-	.4byte	.LVL1511
-	.4byte	.LVL1512
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1512
-	.4byte	.LVL1515
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1515
-	.4byte	.LVL1516
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -136
-	.4byte	.LVL1516
-	.4byte	.LVL1529
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1529
-	.4byte	.LVL1530
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1530
-	.4byte	.LFE266
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST354:
-	.4byte	.LVL1520
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST355:
-	.4byte	.LVL1519
-	.4byte	.LVL1533
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -132
-	.4byte	0
-	.4byte	0
-.LLST356:
-	.4byte	.LVL1517
-	.4byte	.LVL1518-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1518-1
-	.4byte	.LVL1530
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	.LVL1530
-	.4byte	.LVL1531
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1531
-	.4byte	.LVL1533
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -124
-	.4byte	0
-	.4byte	0
-.LLST357:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1513
-	.4byte	.LVL1514
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1516
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST358:
-	.4byte	.LVL1511
-	.4byte	.LVL1513
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	.LVL1513
-	.4byte	.LVL1514
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1516
-	.4byte	.LVL1526
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1526
-	.4byte	.LVL1527-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1527-1
-	.4byte	.LVL1528
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1528
-	.4byte	.LVL1533
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1533
-	.4byte	.LFE266
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST229:
-	.4byte	.LVL882
-	.4byte	.LVL887
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL887
-	.4byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST230:
-	.4byte	.LVL882
-	.4byte	.LVL886
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL886
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST231:
-	.4byte	.LVL882
-	.4byte	.LVL885
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL885
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST232:
-	.4byte	.LVL888
-	.4byte	.LVL889
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL890
-	.4byte	.LVL892
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL892
-	.4byte	.LVL893-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL895
-	.4byte	.LVL897
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL898
-	.4byte	.LFE265
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST314:
-	.4byte	.LVL1290
-	.4byte	.LVL1291
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1291
-	.4byte	.LVL1292
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1292
-	.4byte	.LVL1293-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1293-1
-	.4byte	.LVL1293
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1293
-	.4byte	.LVL1294
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST74:
-	.4byte	.LVL212
-	.4byte	.LVL213
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL214
-	.4byte	.LVL215
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL215
-	.4byte	.LVL216
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL217
-	.4byte	.LVL218
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL219
-	.4byte	.LVL222
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL222
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL224
-	.4byte	.LVL226
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL226
-	.4byte	.LVL227
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL227
-	.4byte	.LVL228
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL228
-	.4byte	.LVL230
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL230
-	.4byte	.LVL231
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL231
-	.4byte	.LFE263
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST75:
-	.4byte	.LVL219
-	.4byte	.LVL222
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL228
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST76:
-	.4byte	.LVL217
-	.4byte	.LVL218
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL219
-	.4byte	.LVL220
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL224
-	.4byte	.LVL225
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL226
-	.4byte	.LVL228
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL228
-	.4byte	.LVL229
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL230
-	.4byte	.LFE263
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST227:
-	.4byte	.LVL877
-	.4byte	.LVL878
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL878
-	.4byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST228:
-	.4byte	.LVL879
-	.4byte	.LVL880
-	.2byte	0x9
-	.byte	0x72
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL880
-	.4byte	.LVL881-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST214:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL842
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL854
-	.4byte	.LFE261
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST215:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL842
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL854
-	.4byte	.LFE261
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST216:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL842
-	.4byte	.LVL854
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL854
-	.4byte	.LFE261
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST217:
-	.4byte	.LVL846
-	.4byte	.LVL854
-	.2byte	0x7
-	.byte	0x7a
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST218:
-	.4byte	.LVL848
-	.4byte	.LVL849
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL849
-	.4byte	.LVL850-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	req_sys+12
-	.4byte	0
-	.4byte	0
-.LLST219:
-	.4byte	.LVL841
-	.4byte	.LVL842
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL842
-	.4byte	.LVL851
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL852
-	.4byte	.LVL854
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST208:
-	.4byte	.LVL818
-	.4byte	.LVL820
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL820
-	.4byte	.LVL824
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL824
-	.4byte	.LVL826
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL826
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST209:
-	.4byte	.LVL829
-	.4byte	.LVL830
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL830
-	.4byte	.LVL832
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL832
-	.4byte	.LVL833
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL836
-	.4byte	.LVL839
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL839
-	.4byte	.LVL840
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST210:
-	.4byte	.LVL829
-	.4byte	.LVL830
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL830
-	.4byte	.LVL831
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL836
-	.4byte	.LVL837
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL838
-	.4byte	.LFE260
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST211:
-	.4byte	.LVL819
-	.4byte	.LVL823
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL824
-	.4byte	.LVL825
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL825
-	.4byte	.LVL826
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL826
-	.4byte	.LVL829-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST212:
-	.4byte	.LVL819
-	.4byte	.LVL820
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL820
-	.4byte	.LVL821-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	.LVL824
-	.4byte	.LVL826
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 24
-	.4byte	.LVL826
-	.4byte	.LVL829-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 24
-	.4byte	0
-	.4byte	0
-.LLST213:
-	.4byte	.LVL827
-	.4byte	.LVL828
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL828
-	.4byte	.LVL829-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.4byte	0
-	.4byte	0
-.LLST220:
-	.4byte	.LVL855
-	.4byte	.LVL858-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL858-1
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST221:
-	.4byte	.LVL859
-	.4byte	.LVL865
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL868
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST222:
-	.4byte	.LVL858
-	.4byte	.LVL860
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST223:
-	.4byte	.LVL863
-	.4byte	.LVL865
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL868
-	.4byte	.LVL873
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL873
-	.4byte	.LVL874
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL874
-	.4byte	.LVL875
-	.2byte	0x3
-	.byte	0x78
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL875
-	.4byte	.LFE259
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST224:
-	.4byte	.LVL856
-	.4byte	.LVL862
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST225:
-	.4byte	.LVL857
-	.4byte	.LVL858-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL858-1
-	.4byte	.LVL867
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL867
-	.4byte	.LVL868
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -40
-	.4byte	.LVL868
-	.4byte	.LFE259
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST226:
-	.4byte	.LVL869
-	.4byte	.LVL870
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	0
-	.4byte	0
-.LLST201:
-	.4byte	.LVL794
-	.4byte	.LVL797
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL797
-	.4byte	.LFE257
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST202:
-	.4byte	.LVL796
-	.4byte	.LVL801
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL805
-	.4byte	.LVL812
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST203:
-	.4byte	.LVL806
-	.4byte	.LVL812
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST204:
-	.4byte	.LVL798
-	.4byte	.LVL799
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL799
-	.4byte	.LVL800
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL800
-	.4byte	.LVL802
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL805
-	.4byte	.LVL807
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL807
-	.4byte	.LVL808
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL809
-	.4byte	.LVL812
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST205:
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL804
-	.4byte	.LVL805
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL806
-	.4byte	.LVL810
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL810
-	.4byte	.LVL811
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL812
-	.4byte	.LVL814
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL814
-	.4byte	.LVL816
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL816
-	.4byte	.LVL817
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL817
-	.4byte	.LFE257
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST206:
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL804
-	.4byte	.LVL805
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL812
-	.4byte	.LVL815-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL815-1
-	.4byte	.LVL816
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST207:
-	.4byte	.LVL800
-	.4byte	.LVL803
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST199:
-	.4byte	.LVL781
-	.4byte	.LVL783
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL783
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST200:
-	.4byte	.LVL781
-	.4byte	.LVL782
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL782
-	.4byte	.LFE256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST62:
-	.4byte	.LVL179
-	.4byte	.LVL182
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL183
-	.4byte	.LVL184
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL186
-	.4byte	.LVL188
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST63:
-	.4byte	.LVL179
-	.4byte	.LVL187
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL187
-	.4byte	.LVL189
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST64:
-	.4byte	.LVL180
-	.4byte	.LVL181
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL185
-	.4byte	.LVL189
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST61:
-	.4byte	.LVL177
-	.4byte	.LVL178-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL178-1
-	.4byte	.LFE253
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST57:
-	.4byte	.LVL165
-	.4byte	.LVL170-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL170-1
-	.4byte	.LVL171
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL171
-	.4byte	.LVL176
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL176
-	.4byte	.LFE252
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST58:
-	.4byte	.LVL165
-	.4byte	.LVL169
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL171
-	.4byte	.LVL172
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL174
-	.4byte	.LFE252
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST59:
-	.4byte	.LVL165
-	.4byte	.LVL168
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL168
-	.4byte	.LVL171
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL171
-	.4byte	.LFE252
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST60:
-	.4byte	.LVL166
-	.4byte	.LVL167
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL171
-	.4byte	.LVL175
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST54:
-	.4byte	.LVL154
-	.4byte	.LVL157
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL157
-	.4byte	.LFE251
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST55:
-	.4byte	.LVL154
-	.4byte	.LVL156
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL156
-	.4byte	.LFE251
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST56:
-	.4byte	.LVL160
-	.4byte	.LVL161
-	.2byte	0x10
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL161
-	.4byte	.LVL162
-	.2byte	0x12
-	.byte	0x74
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL163
-	.4byte	.LVL164
-	.2byte	0xc
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL164
-	.4byte	.LFE251
-	.2byte	0xe
-	.byte	0x74
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST48:
-	.4byte	.LVL135
-	.4byte	.LVL138
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL138
-	.4byte	.LVL139
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL139
-	.4byte	.LFE250
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST49:
-	.4byte	.LVL136
-	.4byte	.LVL137
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL139
-	.4byte	.LFE250
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST50:
-	.4byte	.LVL140
-	.4byte	.LVL141
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL141
-	.4byte	.LFE250
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST51:
-	.4byte	.LVL141
-	.4byte	.LVL142
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL143
-	.4byte	.LVL145
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL146
-	.4byte	.LVL147
-	.2byte	0xb
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7c
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST52:
-	.4byte	.LVL141
-	.4byte	.LVL143
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL143
-	.4byte	.LVL146
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL146
-	.4byte	.LVL148
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL148
-	.4byte	.LVL149
-	.2byte	0x5
-	.byte	0x74
-	.sleb128 0
-	.byte	0x77
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST38:
-	.4byte	.LVL97
-	.4byte	.LVL101
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL101
-	.4byte	.LVL102
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL102
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST39:
-	.4byte	.LVL98
-	.4byte	.LVL100
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL102
-	.4byte	.LVL129
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL129
-	.4byte	.LFE249
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0x91
-	.sleb128 -44
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST40:
-	.4byte	.LVL105
-	.4byte	.LVL108
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL108
-	.4byte	.LVL118
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL119
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST41:
-	.4byte	.LVL103
-	.4byte	.LVL106
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL106
-	.4byte	.LVL116
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL119
-	.4byte	.LVL123
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL125
-	.4byte	.LVL128
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST42:
-	.4byte	.LVL111
-	.4byte	.LVL114
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL114
-	.4byte	.LVL116
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL119
-	.4byte	.LVL122
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL122
-	.4byte	.LVL123
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL125
-	.4byte	.LVL126
-	.2byte	0x8
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x91
-	.sleb128 -40
-	.byte	0x6
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST43:
-	.4byte	.LVL104
-	.4byte	.LVL105
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL105
-	.4byte	.LVL118
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0xe
-	.byte	0x76
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL119
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST44:
-	.4byte	.LVL112
-	.4byte	.LVL113
-	.2byte	0xe
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL113
-	.4byte	.LVL115
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL119
-	.4byte	.LVL120
-	.2byte	0xe
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL120
-	.4byte	.LVL121
-	.2byte	0x10
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL121
-	.4byte	.LVL122
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST45:
-	.4byte	.LVL107
-	.4byte	.LVL117
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL117
-	.4byte	.LVL118
-	.2byte	0x5
-	.byte	0x74
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x22
-	.4byte	.LVL119
-	.4byte	.LVL124
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL124
-	.4byte	.LVL125
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 2
-	.4byte	.LVL125
-	.4byte	.LVL128
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL128
-	.4byte	.LVL130
-	.2byte	0x5
-	.byte	0x74
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST46:
-	.4byte	.LVL97
-	.4byte	.LVL99
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL102
-	.4byte	.LVL108
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL108
-	.4byte	.LVL109
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL110
-	.4byte	.LVL118
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL118
-	.4byte	.LVL119
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL119
-	.4byte	.LFE249
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST185:
-	.4byte	.LVL687
-	.4byte	.LVL688
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.4byte	.LVL689
-	.4byte	.LVL693
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL695
-	.4byte	.LFE246
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST186:
-	.4byte	.LVL691
-	.4byte	.LVL693
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL695
-	.4byte	.LFE246
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST35:
-	.4byte	.LVL90
-	.4byte	.LVL93
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL93
-	.4byte	.LVL94
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL94
-	.4byte	.LVL96
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL96
-	.4byte	.LFE245
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST36:
-	.4byte	.LVL90
-	.4byte	.LVL96
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL96
-	.4byte	.LFE245
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST37:
-	.4byte	.LVL91
-	.4byte	.LVL92
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL94
-	.4byte	.LFE245
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST33:
-	.4byte	.LVL82
-	.4byte	.LVL83
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL83
-	.4byte	.LVL84
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL85
-	.4byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL88
-	.4byte	.LFE244
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST34:
-	.4byte	.LVL87
-	.4byte	.LVL89
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL89
-	.4byte	.LFE244
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x73
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST198:
-	.4byte	.LVL778
-	.4byte	.LVL779
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL779
-	.4byte	.LVL780-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.4byte	.LVL780-1
-	.4byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST151:
-	.4byte	.LVL576
-	.4byte	.LVL577
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL577
-	.4byte	.LFE239
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST152:
-	.4byte	.LVL576
-	.4byte	.LVL578
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL578
-	.4byte	.LVL583-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL583-1
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST153:
-	.4byte	.LVL582
-	.4byte	.LVL584
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL584
-	.4byte	.LVL585
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL586
-	.4byte	.LFE239
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST154:
-	.4byte	.LVL587
-	.4byte	.LVL589
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL589
-	.4byte	.LVL591
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL591
-	.4byte	.LVL592
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL592
-	.4byte	.LFE239
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST155:
-	.4byte	.LVL579
-	.4byte	.LVL580
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL580
-	.4byte	.LVL581
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST31:
-	.4byte	.LVL76
-	.4byte	.LVL77
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL77
-	.4byte	.LVL78
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LVL79
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL79
-	.4byte	.LFE238
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST32:
-	.4byte	.LVL76
-	.4byte	.LVL78
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL78
-	.4byte	.LVL80
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL80
-	.4byte	.LFE238
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST29:
-	.4byte	.LVL72
-	.4byte	.LVL73-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL73-1
-	.4byte	.LFE237
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST30:
-	.4byte	.LVL74
-	.4byte	.LVL75-1
-	.2byte	0x11
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST27:
-	.4byte	.LVL68
-	.4byte	.LVL70-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL70-1
-	.4byte	.LFE236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST28:
-	.4byte	.LVL69
-	.4byte	.LVL70-1
-	.2byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST24:
-	.4byte	.LVL63
-	.4byte	.LVL66-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL66-1
-	.4byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST25:
-	.4byte	.LVL63
-	.4byte	.LVL65
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL65
-	.4byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST26:
-	.4byte	.LVL64
-	.4byte	.LVL66-1
-	.2byte	0x20
-	.byte	0x77
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x76
-	.sleb128 0
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x77
-	.sleb128 0
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST347:
-	.4byte	.LVL1470
-	.4byte	.LVL1472
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1479
-	.4byte	.LVL1484
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1484
-	.4byte	.LVL1485
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1485
-	.4byte	.LVL1503
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST348:
-	.4byte	.LVL1471
-	.4byte	.LVL1473
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1473
-	.4byte	.LVL1477
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1478
-	.4byte	.LVL1479
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1489
-	.4byte	.LVL1499
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1500
-	.4byte	.LVL1501
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1501
-	.4byte	.LVL1502-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1502
-	.4byte	.LVL1503
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1503
-	.4byte	.LVL1504
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1509
-	.4byte	.LVL1510-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST349:
-	.4byte	.LVL1481
-	.4byte	.LVL1486
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1493
-	.4byte	.LVL1498
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST350:
-	.4byte	.LVL1480
-	.4byte	.LVL1501
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST149:
-	.4byte	.LVL568
-	.4byte	.LVL574
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL575
-	.4byte	.LFE233
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST150:
-	.4byte	.LVL569
-	.4byte	.LVL570
-	.2byte	0x13
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL570
-	.4byte	.LVL571
-	.2byte	0x13
-	.byte	0x72
-	.sleb128 15
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL571
-	.4byte	.LVL572-1
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x76
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x22
-	.byte	0x3a
-	.byte	0x24
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST343:
-	.4byte	.LVL1456
-	.4byte	.LVL1457
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1464
-	.4byte	.LVL1465
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1465
-	.4byte	.LVL1466
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1466
-	.4byte	.LVL1467
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST344:
-	.4byte	.LVL1445
-	.4byte	.LVL1448
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1457
-	.4byte	.LVL1458
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1459
-	.4byte	.LVL1460
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST345:
-	.4byte	.LVL1451
-	.4byte	.LVL1455
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1460
-	.4byte	.LVL1462
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1463
-	.4byte	.LVL1464
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST346:
-	.4byte	.LVL1443
-	.4byte	.LVL1454
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1457
-	.4byte	.LVL1464
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1467
-	.4byte	.LVL1468
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST22:
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL56
-	.4byte	.LVL57
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL57
-	.4byte	.LVL58
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL58
-	.4byte	.LVL59-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL59-1
-	.4byte	.LVL61
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL61
-	.4byte	.LVL62
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST23:
-	.4byte	.LVL54
-	.4byte	.LVL55
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL56
-	.4byte	.LVL60
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL61
-	.4byte	.LFE231
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST290:
-	.4byte	.LVL1172
-	.4byte	.LVL1174
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1184
-	.4byte	.LVL1185
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1185
-	.4byte	.LVL1186
-	.2byte	0x3
-	.byte	0x74
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1186
-	.4byte	.LVL1187
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST291:
-	.4byte	.LVL1171
-	.4byte	.LVL1176
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1176
-	.4byte	.LVL1184
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -36
-	.4byte	.LVL1184
-	.4byte	.LVL1187
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1188
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1188
-	.4byte	.LVL1189
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL1190
-	.4byte	.LVL1191
-	.2byte	0x6
-	.byte	0x91
-	.sleb128 -36
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x1
-	.byte	0x9f
-	.4byte	.LVL1191
-	.4byte	.LFE229
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST292:
-	.4byte	.LVL1173
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1187
-	.4byte	.LVL1191
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST293:
-	.4byte	.LVL1171
-	.4byte	.LVL1176
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1176
-	.4byte	.LVL1181
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1182
-	.4byte	.LVL1184
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1184
-	.4byte	.LVL1187
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1191
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST196:
-	.4byte	.LVL771
-	.4byte	.LVL773
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL773
-	.4byte	.LVL776
-	.2byte	0x4
-	.byte	0x75
-	.sleb128 -1022
-	.byte	0x9f
-	.4byte	.LVL776
-	.4byte	.LFE228
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST197:
-	.4byte	.LVL771
-	.4byte	.LVL772
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL772
-	.4byte	.LVL776
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL776
-	.4byte	.LFE228
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST17:
-	.4byte	.LVL47
-	.4byte	.LVL49-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL49-1
-	.4byte	.LFE226
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST18:
-	.4byte	.LVL48
-	.4byte	.LVL53
-	.2byte	0x10
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST19:
-	.4byte	.LVL50
-	.4byte	.LVL51-1
-	.2byte	0x32
-	.byte	0x74
-	.sleb128 0
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST20:
-	.4byte	.LVL50
-	.4byte	.LVL51-1
-	.2byte	0x19
-	.byte	0x76
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x75
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x25
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST21:
-	.4byte	.LVL50
-	.4byte	.LVL52
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST13:
-	.4byte	.LVL40
-	.4byte	.LVL41-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL41-1
-	.4byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST14:
-	.4byte	.LVL42
-	.4byte	.LVL46
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST15:
-	.4byte	.LVL44
-	.4byte	.LVL45-1
-	.2byte	0xa
-	.byte	0x76
-	.sleb128 6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x3
-	.4byte	gBbtInfo+4
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST16:
-	.4byte	.LVL44
-	.4byte	.LVL45-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST444:
-	.4byte	.LVL1949
-	.4byte	.LVL1952
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1952
-	.4byte	.LVL1953-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1953-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST445:
-	.4byte	.LVL1949
-	.4byte	.LVL1951
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1951
-	.4byte	.LVL1953-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1953-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST446:
-	.4byte	.LVL1949
-	.4byte	.LVL1950
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1950
-	.4byte	.LVL1953-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1953-1
-	.4byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST426:
-	.4byte	.LVL1868
-	.4byte	.LVL1871
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1871
-	.4byte	.LVL1872-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1872-1
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST427:
-	.4byte	.LVL1868
-	.4byte	.LVL1870
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1870
-	.4byte	.LVL1872-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1872-1
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST428:
-	.4byte	.LVL1868
-	.4byte	.LVL1869
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1869
-	.4byte	.LVL1872-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1872-1
-	.4byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST372:
-	.4byte	.LVL1588
-	.4byte	.LVL1589
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1589
-	.4byte	.LVL1590
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1590
-	.4byte	.LVL1592-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1592-1
-	.4byte	.LVL1594
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1594
-	.4byte	.LVL1609
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1609
-	.4byte	.LVL1610
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1610
-	.4byte	.LFE221
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST373:
-	.4byte	.LVL1588
-	.4byte	.LVL1589
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1589
-	.4byte	.LVL1590
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1590
-	.4byte	.LVL1591
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1591
-	.4byte	.LVL1609
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1609
-	.4byte	.LFE221
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST374:
-	.4byte	.LVL1595
-	.4byte	.LVL1600
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST375:
-	.4byte	.LVL1596
-	.4byte	.LVL1597
-	.2byte	0x21
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x75
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST376:
-	.4byte	.LVL1593
-	.4byte	.LVL1598
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1598
-	.4byte	.LVL1609
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST377:
-	.4byte	.LVL1605
-	.4byte	.LVL1606-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST429:
-	.4byte	.LVL1873
-	.4byte	.LVL1877
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1877
-	.4byte	.LVL1879
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1879
-	.4byte	.LVL1882
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1882
-	.4byte	.LVL1947
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1947
-	.4byte	.LVL1948
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1948
-	.4byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST430:
-	.4byte	.LVL1873
-	.4byte	.LVL1876
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1876
-	.4byte	.LVL1878-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1878-1
-	.4byte	.LVL1879
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL1879
-	.4byte	.LVL1883
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1883
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -100
-	.4byte	.LVL1947
-	.4byte	.LFE220
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST431:
-	.4byte	.LVL1873
-	.4byte	.LVL1874
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1874
-	.4byte	.LVL1879
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1879
-	.4byte	.LVL1881
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1881
-	.4byte	.LFE220
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	0
-	.4byte	0
-.LLST432:
-	.4byte	.LVL1873
-	.4byte	.LVL1875
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1875
-	.4byte	.LVL1878-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1878-1
-	.4byte	.LVL1879
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1879
-	.4byte	.LVL1880
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1880
-	.4byte	.LFE220
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	0
-	.4byte	0
-.LLST433:
-	.4byte	.LVL1918
-	.4byte	.LVL1940
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST434:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1892
-	.4byte	.LVL1894
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1895
-	.4byte	.LVL1942
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST435:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1886
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	0
-	.4byte	0
-.LLST436:
-	.4byte	.LVL1888
-	.4byte	.LVL1892
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1892
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -76
-	.4byte	0
-	.4byte	0
-.LLST437:
-	.4byte	.LVL1916
-	.4byte	.LVL1917
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1917
-	.4byte	.LVL1919
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 4
-	.4byte	.LVL1919
-	.4byte	.LVL1920-1
-	.2byte	0xb
-	.byte	0x3
-	.4byte	req_prgm
-	.byte	0x6
-	.byte	0x77
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.4byte	0
-	.4byte	0
-.LLST438:
-	.4byte	.LVL1906
-	.4byte	.LVL1911
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1914
-	.4byte	.LVL1930
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1930
-	.4byte	.LVL1931
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1931
-	.4byte	.LVL1940
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST439:
-	.4byte	.LVL1889
-	.4byte	.LVL1890
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1890
-	.4byte	.LVL1892
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1892
-	.4byte	.LVL1895
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1895
-	.4byte	.LVL1896
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1896
-	.4byte	.LVL1910
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1910
-	.4byte	.LVL1911
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1911
-	.4byte	.LVL1947
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -96
-	.4byte	0
-	.4byte	0
-.LLST440:
-	.4byte	.LVL1902
-	.4byte	.LVL1903
-	.2byte	0x1f
-	.byte	0x75
-	.sleb128 7
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x12
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x91
-	.sleb128 -96
-	.byte	0x6
-	.byte	0x16
-	.byte	0x14
-	.byte	0x40
-	.byte	0x4b
-	.byte	0x24
-	.byte	0x22
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.4byte	.LVL1903
-	.4byte	.LVL1904
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1904
-	.4byte	.LVL1907
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1907
-	.4byte	.LVL1911
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1914
-	.4byte	.LVL1940
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	0
-	.4byte	0
-.LLST441:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1921
-	.4byte	.LVL1923
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1925
-	.4byte	.LVL1926
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1926
-	.4byte	.LVL1928
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1932
-	.4byte	.LVL1939
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST442:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1922
-	.4byte	.LVL1923
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1926
-	.4byte	.LVL1927
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1932
-	.4byte	.LVL1939
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST443:
-	.4byte	.LVL1891
-	.4byte	.LVL1892
-	.2byte	0x6
-	.byte	0x3
-	.4byte	g_active_superblock
-	.byte	0x9f
-	.4byte	.LVL1892
-	.4byte	.LVL1894
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1895
-	.4byte	.LVL1898
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1901
-	.4byte	.LVL1913
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1914
-	.4byte	.LVL1941
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST382:
-	.4byte	.LVL1638
-	.4byte	.LVL1641-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1641-1
-	.4byte	.LVL1641
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1641
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST383:
-	.4byte	.LVL1638
-	.4byte	.LVL1641-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1641-1
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1659
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST384:
-	.4byte	.LVL1638
-	.4byte	.LVL1639
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1639
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST385:
-	.4byte	.LVL1638
-	.4byte	.LVL1640
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1640
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1659
-	.4byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST386:
-	.4byte	.LVL1641
-	.4byte	.LVL1659
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST387:
-	.4byte	.LVL1650
-	.4byte	.LVL1657
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	0
-	.4byte	0
-.LLST388:
-	.4byte	.LVL1642
-	.4byte	.LVL1643
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1652
-	.4byte	.LVL1653
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST389:
-	.4byte	.LVL1649
-	.4byte	.LVL1651-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST409:
-	.4byte	.LVL1817
-	.4byte	.LVL1820
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1820
-	.4byte	.LVL1823
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1823
-	.4byte	.LVL1826
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1826
-	.4byte	.LVL1866
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1866
-	.4byte	.LVL1867
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1867
-	.4byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST410:
-	.4byte	.LVL1817
-	.4byte	.LVL1819
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1819
-	.4byte	.LVL1823
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1823
-	.4byte	.LVL1827
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1827
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST411:
-	.4byte	.LVL1817
-	.4byte	.LVL1818
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1818
-	.4byte	.LVL1823
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	.LVL1823
-	.4byte	.LVL1825
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1825
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -56
-	.4byte	0
-	.4byte	0
-.LLST412:
-	.4byte	.LVL1817
-	.4byte	.LVL1821-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1821-1
-	.4byte	.LVL1823
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1823
-	.4byte	.LVL1824
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1824
-	.4byte	.LFE217
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST413:
-	.4byte	.LVL1817
-	.4byte	.LVL1822
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST414:
-	.4byte	.LVL1829
-	.4byte	.LVL1830
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1830
-	.4byte	.LVL1866
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	0
-	.4byte	0
-.LLST415:
-	.4byte	.LVL1832
-	.4byte	.LVL1835
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1835
-	.4byte	.LVL1866
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -68
-	.4byte	0
-	.4byte	0
-.LLST416:
-	.4byte	.LVL1851
-	.4byte	.LVL1852
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1852
-	.4byte	.LVL1853-1
-	.2byte	0x12
-	.byte	0x3
-	.4byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST417:
-	.4byte	.LVL1833
-	.4byte	.LVL1835
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1835
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST418:
-	.4byte	.LVL1844
-	.4byte	.LVL1845
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1845
-	.4byte	.LVL1850
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1863
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST419:
-	.4byte	.LVL1833
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1849
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1850
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST420:
-	.4byte	.LVL1833
-	.4byte	.LVL1834
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1834
-	.4byte	.LVL1835
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1835
-	.4byte	.LVL1837
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1837
-	.4byte	.LVL1838-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1838-1
-	.4byte	.LVL1841
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1841
-	.4byte	.LVL1842
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1842
-	.4byte	.LVL1843
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1843
-	.4byte	.LVL1866
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	0
-	.4byte	0
-.LLST421:
-	.4byte	.LVL1817
-	.4byte	.LVL1822
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1857
-	.4byte	.LVL1860
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1860
-	.4byte	.LVL1866
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -64
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST422:
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1857
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1857
-	.4byte	.LVL1858
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1858
-	.4byte	.LVL1859
-	.2byte	0x6
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1859
-	.4byte	.LVL1860
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1860
-	.4byte	.LVL1866
-	.2byte	0x2
-	.byte	0x91
-	.sleb128 -60
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST423:
-	.4byte	.LVL1823
-	.4byte	.LVL1835
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1835
-	.4byte	.LVL1866
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1866
-	.4byte	.LFE217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST424:
-	.4byte	.LVL1839
-	.4byte	.LVL1840
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1850
-	.4byte	.LVL1855
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST425:
-	.4byte	.LVL1864
-	.4byte	.LVL1865-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST453:
-	.4byte	.LVL2056
-	.4byte	.LVL2057
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2057
-	.4byte	.LVL2058
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc2
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL2058
-	.4byte	.LVL2059
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x74
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST449:
-	.4byte	.LVL2010
-	.4byte	.LVL2012
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2014
-	.4byte	.LVL2015
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2025
-	.4byte	.LVL2027
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2030
-	.4byte	.LVL2031
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL2035
-	.4byte	.LVL2036
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2038
-	.4byte	.LVL2039
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL2039
-	.4byte	.LVL2040-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL2042
-	.4byte	.LVL2043
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST450:
-	.4byte	.LVL2014
-	.4byte	.LVL2018
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2039
-	.4byte	.LVL2041
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2042
-	.4byte	.LVL2043
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST451:
-	.4byte	.LVL2008
-	.4byte	.LVL2011
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL2011
-	.4byte	.LVL2013
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2025
-	.4byte	.LVL2028
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2029
-	.4byte	.LVL2034
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL2034
-	.4byte	.LVL2035
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST452:
-	.4byte	.LVL2006
-	.4byte	.LVL2007
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL2007
-	.4byte	.LVL2009
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2023
-	.4byte	.LVL2024
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL2024
-	.4byte	.LVL2025
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST175:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL634
-	.4byte	.LFE212
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST176:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL634
-	.4byte	.LFE212
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST177:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL661
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL662
-	.4byte	.LVL664
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL665
-	.4byte	.LVL679
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL680
-	.4byte	.LFE212
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST178:
-	.4byte	.LVL632
-	.4byte	.LVL634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL639
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL639
-	.4byte	.LVL640
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL640
-	.4byte	.LVL656
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL657
-	.4byte	.LVL674
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL675
-	.4byte	.LFE212
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST179:
-	.4byte	.LVL633
-	.4byte	.LVL634
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL634
-	.4byte	.LVL635
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL635
-	.4byte	.LVL639
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL639
-	.4byte	.LVL640
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL640
-	.4byte	.LVL641
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL641
-	.4byte	.LVL642
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL643
-	.4byte	.LVL644
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL647
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL647
-	.4byte	.LVL649
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL649
-	.4byte	.LVL650
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL651
-	.4byte	.LVL658
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL658
-	.4byte	.LVL659
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL660
-	.4byte	.LVL663
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL663
-	.4byte	.LVL666
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL666
-	.4byte	.LVL667
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL668
-	.4byte	.LVL669
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL669
-	.4byte	.LVL676
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL676
-	.4byte	.LVL677
-	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL678
-	.4byte	.LVL682
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL682
-	.4byte	.LVL683
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL684
-	.4byte	.LVL685
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL685
-	.4byte	.LVL686
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST180:
-	.4byte	.LVL653
-	.4byte	.LVL654-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL671
-	.4byte	.LVL672-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST181:
-	.4byte	.LVL632
-	.4byte	.LVL637
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL637
-	.4byte	.LVL638
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST182:
-	.4byte	.LVL632
-	.4byte	.LVL639
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL639
-	.4byte	.LVL645
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL646
-	.4byte	.LVL648
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL669
-	.4byte	.LVL684
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST183:
-	.4byte	.LVL632
-	.4byte	.LVL638
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST184:
-	.4byte	.LVL632
-	.4byte	.LVL636
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL636
-	.4byte	.LVL638
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL651
-	.4byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST194:
-	.4byte	.LVL764
-	.4byte	.LVL765
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL765
-	.4byte	.LVL766
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL768
-	.4byte	.LVL770
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST195:
-	.4byte	.LVL709
-	.4byte	.LVL715
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL715
-	.4byte	.LVL722
-	.2byte	0x7
-	.byte	0x74
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.4byte	.LVL724
-	.4byte	.LVL730
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL731
-	.4byte	.LVL734
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL735
-	.4byte	.LVL736
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL736
-	.4byte	.LVL739
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL745
-	.4byte	.LVL746
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL746
-	.4byte	.LVL747-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL748
-	.4byte	.LVL749
-	.2byte	0x9
-	.byte	0x3
-	.4byte	c_ftl_nand_max_map_blks
-	.byte	0x6
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL749
-	.4byte	.LVL750-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL751
-	.4byte	.LVL752
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3c
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL752
-	.4byte	.LVL753-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL754
-	.4byte	.LVL755
-	.2byte	0x18
-	.byte	0x3
-	.4byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3
-	.4byte	c_ftl_nand_byte_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL755
-	.4byte	.LVL756-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL757
-	.4byte	.LVL758
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL758
-	.4byte	.LVL759-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL760
-	.4byte	.LVL761
-	.2byte	0x11
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL761
-	.4byte	.LVL762
-	.2byte	0x1e
-	.byte	0x3
-	.4byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x1f
-	.byte	0x35
-	.byte	0x26
-	.byte	0x3
-	.4byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL762
-	.4byte	.LVL763-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST10:
-	.4byte	.LVL25
-	.4byte	.LVL26
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL26
-	.4byte	.LVL32
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL32
-	.4byte	.LFE208
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST11:
-	.4byte	.LVL27
-	.4byte	.LVL29
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST9:
-	.4byte	.LVL22
-	.4byte	.LVL23
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL23
-	.4byte	.LVL24
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL24
-	.4byte	.LFE207
-	.2byte	0x5
-	.byte	0x3
-	.4byte	c_ftl_nand_sys_blks_per_plane
-	.4byte	0
-	.4byte	0
-.LLST6:
-	.4byte	.LVL14
-	.4byte	.LVL18
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL18
-	.4byte	.LVL19
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL19
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST7:
-	.4byte	.LVL14
-	.4byte	.LVL15
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL16
-	.4byte	.LVL17
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL17
-	.4byte	.LVL19
-	.2byte	0x3
-	.byte	0x73
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL19
-	.4byte	.LVL20
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL20
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST8:
-	.4byte	.LVL14
-	.4byte	.LVL15
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.4byte	.LVL16
-	.4byte	.LFE205
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST102:
-	.4byte	.LVL437
-	.4byte	.LVL439-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL439-1
-	.4byte	.LVL444
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL444
-	.4byte	.LFE204
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST103:
-	.4byte	.LVL438
-	.4byte	.LVL439-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL439-1
-	.4byte	.LVL440
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL440
-	.4byte	.LVL441
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL441
-	.4byte	.LVL442
-	.2byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL442
-	.4byte	.LVL443
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST97:
-	.4byte	.LVL288
-	.4byte	.LVL290-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL290-1
-	.4byte	.LFE203
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST98:
-	.4byte	.LVL426
-	.4byte	.LVL428
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL428
-	.4byte	.LVL430
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL430
-	.4byte	.LVL432
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL433
-	.4byte	.LVL434
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL434
-	.4byte	.LVL435-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL435-1
-	.4byte	.LVL436
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL436
-	.4byte	.LFE203
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST99:
-	.4byte	.LVL289
-	.4byte	.LVL290-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL290-1
-	.4byte	.LVL291
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL291
-	.4byte	.LVL403
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL403
-	.4byte	.LFE203
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST100:
-	.4byte	.LVL426
-	.4byte	.LVL427-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL430
-	.4byte	.LVL431
-	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST101:
-	.4byte	.LVL433
-	.4byte	.LVL435-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL436
-	.4byte	.LFE203
-	.2byte	0x9
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x76
-	.sleb128 0
-	.byte	0x22
-	.4byte	0
-	.4byte	0
-.LLST0:
-	.4byte	.LVL0
-	.4byte	.LVL5
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL5
-	.4byte	.LVL11
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL11
-	.4byte	.LFE352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST1:
-	.4byte	.LVL0
-	.4byte	.LVL7-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL7-1
-	.4byte	.LVL11
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL11
-	.4byte	.LFE352
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST2:
-	.4byte	.LVL1
-	.4byte	.LVL9
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST3:
-	.4byte	.LVL2
-	.4byte	.LVL4
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL4
-	.4byte	.LVL6
-	.2byte	0x5
-	.byte	0x3
-	.4byte	g_nand_phy_info+10
-	.4byte	.LVL6
-	.4byte	.LVL11
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST4:
-	.4byte	.LVL8
-	.4byte	.LVL10
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL10
-	.4byte	.LVL11
-	.2byte	0x2
-	.byte	0x7a
-	.sleb128 0
-	.4byte	.LVL11
-	.4byte	.LFE352
-	.2byte	0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST5:
-	.4byte	.LVL12
-	.4byte	.LVL13
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL13
-	.4byte	.LFE358
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST12:
-	.4byte	.LVL36
-	.4byte	.LVL37
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL37
-	.4byte	.LVL38
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL38
-	.4byte	.LVL39
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL39
-	.4byte	.LFE211
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST47:
-	.4byte	.LVL131
-	.4byte	.LVL132-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL132-1
-	.4byte	.LFE248
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST53:
-	.4byte	.LVL150
-	.4byte	.LVL151-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL151-1
-	.4byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST65:
-	.4byte	.LVL190
-	.4byte	.LVL196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL196
-	.4byte	.LVL208
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL210
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST66:
-	.4byte	.LVL191
-	.4byte	.LVL196
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL196
-	.4byte	.LVL207
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL210
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST67:
-	.4byte	.LVL198
-	.4byte	.LVL200
-	.2byte	0x5
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL200
-	.4byte	.LVL205-1
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0xd
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST68:
-	.4byte	.LVL193
-	.4byte	.LVL195
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL195
-	.4byte	.LVL196
-	.2byte	0xb
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL196
-	.4byte	.LVL197-1
-	.2byte	0xb
-	.byte	0x74
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL208
-	.4byte	.LVL210
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST69:
-	.4byte	.LVL193
-	.4byte	.LVL194
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL194
-	.4byte	.LVL203
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL208
-	.4byte	.LVL209
-	.2byte	0xe
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL209
-	.4byte	.LVL210
-	.2byte	0x10
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x7a
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST70:
-	.4byte	.LVL199
-	.4byte	.LVL204
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL204
-	.4byte	.LVL205-1
-	.2byte	0x1c
-	.byte	0x7a
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x26
-	.byte	0x11
-	.sleb128 -1431655765
-	.byte	0x1e
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST71:
-	.4byte	.LVL201
-	.4byte	.LVL202
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL202
-	.4byte	.LVL205-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL210
-	.4byte	.LVL211
-	.2byte	0xe
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL211
-	.4byte	.LFE255
-	.2byte	0x10
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST72:
-	.4byte	.LVL192
-	.4byte	.LVL207
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL208
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST73:
-	.4byte	.LVL198
-	.4byte	.LVL200
-	.2byte	0xa
-	.byte	0x3
-	.4byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.4byte	.LVL200
-	.4byte	.LVL205-1
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL210
-	.4byte	.LFE255
-	.2byte	0x1
-	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST77:
-	.4byte	.LVL232
-	.4byte	.LVL233
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL233
-	.4byte	.LFE269
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST78:
-	.4byte	.LVL235
-	.4byte	.LVL236-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL236-1
-	.4byte	.LVL236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL236
-	.4byte	.LVL237
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL237
-	.4byte	.LFE275
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST79:
-	.4byte	.LVL235
-	.4byte	.LVL236-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL236-1
-	.4byte	.LVL236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL236
-	.4byte	.LVL238
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL238
-	.4byte	.LFE275
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST84:
-	.4byte	.LVL252
-	.4byte	.LVL254
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL255
-	.4byte	.LFE285
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST85:
-	.4byte	.LVL253
-	.4byte	.LVL254
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL255
-	.4byte	.LFE285
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST112:
-	.4byte	.LVL475
-	.4byte	.LVL477-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL477-1
-	.4byte	.LFE300
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST113:
-	.4byte	.LVL476
-	.4byte	.LVL477-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL477-1
-	.4byte	.LVL477
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST169:
-	.4byte	.LVL625
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL627-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST170:
-	.4byte	.LVL625
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL627-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST171:
-	.4byte	.LVL626
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL627-1
-	.4byte	.LVL631
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
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-	.4byte	0
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-	.4byte	.LVL626
-	.4byte	.LVL627-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL627-1
-	.4byte	.LVL631
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL626
-	.4byte	.LVL631
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL628
-	.4byte	.LVL630
-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL697
-	.4byte	.LVL700-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL700-1
-	.4byte	.LVL704
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL704
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST188:
-	.4byte	.LVL697
-	.4byte	.LVL698
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL699
-	.4byte	.LVL704
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL697
-	.4byte	.LVL700-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST190:
-	.4byte	.LVL702
-	.4byte	.LVL703
-	.2byte	0x1
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-	.4byte	0
-.LLST240:
-	.4byte	.LVL926
-	.4byte	.LVL930
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x800
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL931
-	.4byte	.LVL932
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x801
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1c
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-	.4byte	.LVL932
-	.4byte	.LVL933
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-	.byte	0xa
-	.2byte	0x800
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-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST282:
-	.4byte	.LVL1149
-	.4byte	.LVL1151
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1151
-	.4byte	.LVL1159
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1159
-	.4byte	.LFE347
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST283:
-	.4byte	.LVL1150
-	.4byte	.LVL1152
-	.2byte	0x1
-	.byte	0x54
-	.4byte	0
-	.4byte	0
-.LLST303:
-	.4byte	.LVL1234
-	.4byte	.LVL1235
-	.2byte	0x1
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-	.4byte	.LVL1235
-	.4byte	.LFE320
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
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-	.4byte	0
-.LLST304:
-	.4byte	.LVL1235
-	.4byte	.LVL1236
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1237
-	.4byte	.LVL1241
-	.2byte	0x1
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-	.4byte	.LVL1241
-	.4byte	.LVL1242
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1243
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-	.2byte	0x1
-	.byte	0x56
-	.4byte	0
-	.4byte	0
-.LLST305:
-	.4byte	.LVL1240
-	.4byte	.LVL1247
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1247
-	.4byte	.LVL1248
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1248
-	.4byte	.LVL1249
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1250
-	.4byte	.LFE320
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
-.LLST306:
-	.4byte	.LVL1246
-	.4byte	.LVL1248
-	.2byte	0x1
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-	.4byte	.LVL1251
-	.2byte	0x1
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-	.4byte	.LVL1252
-	.4byte	.LFE320
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-	.4byte	0
-	.4byte	0
-.LLST307:
-	.4byte	.LVL1253
-	.4byte	.LVL1255
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-	.4byte	.LVL1261
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-	.uleb128 0x1
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-	.4byte	.LVL1262
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-	.4byte	.LVL1262
-	.4byte	.LVL1263
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-	.uleb128 0x1
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-	.4byte	.LVL1263
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-	.4byte	.LVL1264-1
-	.4byte	.LFE304
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-	.uleb128 0x1
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-	.4byte	0
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-	.4byte	.LVL1254
-	.4byte	.LVL1261
-	.2byte	0x1
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-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL1276
-	.4byte	.LVL1277-1
-	.2byte	0x9
-	.byte	0x3
-	.4byte	g_MaxLpn
-	.byte	0x6
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.4byte	.LVL1277-1
-	.4byte	.LVL1281
-	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1282
-	.4byte	.LVL1288
-	.2byte	0x1
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-	.4byte	0
-	.4byte	0
-.LLST312:
-	.4byte	.LVL1276
-	.4byte	.LVL1277-1
-	.2byte	0xe
-	.byte	0x3
-	.4byte	c_ftl_nand_planes_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1277-1
-	.4byte	.LVL1280
-	.2byte	0x9
-	.byte	0x78
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	.LVL1282
-	.4byte	.LVL1284
-	.2byte	0x9
-	.byte	0x78
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST313:
-	.4byte	.LVL1278
-	.4byte	.LVL1281
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1282
-	.4byte	.LVL1288
-	.2byte	0x1
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-	.4byte	0
-	.4byte	0
-.LLST397:
-	.4byte	.LVL1718
-	.4byte	.LVL1719
-	.2byte	0x1
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-	.4byte	.LVL1719
-	.4byte	.LVL1733
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1733
-	.4byte	.LVL1734
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.4byte	.LVL1734
-	.4byte	.LVL1750
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1750
-	.4byte	.LVL1755
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0x9f
-	.4byte	.LVL1755
-	.4byte	.LVL1756
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1756
-	.4byte	.LVL1758
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1758
-	.4byte	.LVL1759
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1759
-	.4byte	.LVL1809
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1809
-	.4byte	.LVL1813
-	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL1813
-	.4byte	.LVL1814
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	.LVL1814
-	.4byte	.LFE322
-	.2byte	0x1
-	.byte	0x57
-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL1718
-	.4byte	.LVL1720
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1720
-	.4byte	.LVL1734
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.4byte	.LVL1734
-	.4byte	.LVL1735-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1735-1
-	.4byte	.LVL1809
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.4byte	.LVL1809
-	.4byte	.LVL1810
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1810
-	.4byte	.LFE322
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.4byte	0
-	.4byte	0
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-	.4byte	.LVL1720
-	.4byte	.LVL1733
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1736
-	.4byte	.LVL1808
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
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-	.4byte	.LFE322
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-	.byte	0xf3
-	.uleb128 0x1
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-	.4byte	0
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-	.4byte	.LVL1720
-	.4byte	.LVL1733
-	.2byte	0x1
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-	.4byte	.LVL1736
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-	.4byte	.LVL1755
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-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0xf3
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.4byte	.LVL1794
-	.2byte	0x1
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-	.4byte	0
-	.4byte	0
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-	.sleb128 -56
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-	.sleb128 -56
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-	.uleb128 0x1
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-	.sleb128 -56
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-	.sleb128 1
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-	.sleb128 -60
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-	.sleb128 -68
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-	.sleb128 -68
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-	.4byte	g_active_superblock
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-	.section	.debug_aranges,"",%progbits
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-	.4byte	.LFE352-.LFB352
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-	.section	.debug_line,"",%progbits
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-	.section	.debug_str,"MS",%progbits,1
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-	.ascii	"FtlEctTblFlush\000"
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-	.ascii	"gc_page_num\000"
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-	.ascii	"superBlk\000"
-.LASF498:
-	.ascii	"g_gc_bad_block_temp_num\000"
-.LASF363:
-	.ascii	"all_blk_used_slc_mode\000"
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-	.ascii	"reserved\000"
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-	.ascii	"g_totle_read_sector\000"
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-	.ascii	"__func__\000"
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-	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
-.LASF732:
-	.ascii	"nSec\000"
-.LASF728:
-	.ascii	"forceFlush\000"
-.LASF107:
-	.ascii	"bootm_headers\000"
-.LASF452:
-	.ascii	"p_gc_data_buf\000"
-.LASF125:
-	.ascii	"rd_end\000"
-.LASF491:
-	.ascii	"p_gc_blk_tbl\000"
-.LASF787:
-	.ascii	"FtlFreeSysBlkQueueOut\000"
-.LASF324:
-	.ascii	"ftl_bbt_blk_header\000"
-.LASF227:
-	.ascii	"eth_device\000"
-.LASF306:
-	.ascii	"sign\000"
-.LASF831:
-	.ascii	"sctidx\000"
-.LASF669:
-	.ascii	"Ftl_load_ext_data\000"
-.LASF96:
-	.ascii	"ih_comp\000"
-.LASF586:
-	.ascii	"block\000"
-.LASF22:
-	.ascii	"_Bool\000"
-.LASF651:
-	.ascii	"min_ec\000"
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-	.ascii	"num_free_node\000"
-.LASF379:
-	.ascii	"ftl_superblock_info\000"
-.LASF126:
-	.ascii	"ft_addr\000"
-.LASF357:
-	.ascii	"sys_slc_erase_count\000"
-.LASF512:
-	.ascii	"g_totle_l2p_write_count\000"
-.LASF220:
-	.ascii	"__dtb_dt_begin\000"
-.LASF217:
-	.ascii	"UCLASS_INVALID\000"
-.LASF593:
-	.ascii	"gc_blk\000"
-.LASF277:
-	.ascii	"page_addr\000"
-.LASF863:
-	.ascii	"mem_size\000"
-.LASF856:
-	.ascii	"test_page_step\000"
-.LASF688:
-	.ascii	"read_super_page_end\000"
-.LASF368:
-	.ascii	"refresh_enable_mode\000"
-.LASF846:
-	.ascii	"load_bbt\000"
-.LASF859:
-	.ascii	"IsBlkInVendorPart\000"
-.LASF402:
-	.ascii	"c_ftl_nand_bbm_buf_size\000"
-.LASF782:
-	.ascii	"node_data_count\000"
-.LASF582:
-	.ascii	"width\000"
-.LASF39:
-	.ascii	"base\000"
-.LASF885:
-	.ascii	"sftl_get_density\000"
-.LASF838:
-	.ascii	"first_lpa_sctidx\000"
-.LASF589:
-	.ascii	"rk_ftl_garbage_collect\000"
-.LASF328:
-	.ascii	"lastPpa\000"
-.LASF111:
-	.ascii	"fit_uname_cfg\000"
-.LASF344:
-	.ascii	"gcTempPageOffset\000"
-.LASF636:
-	.ascii	"decrement_vpc_count\000"
-.LASF386:
-	.ascii	"dump_writed\000"
-.LASF748:
-	.ascii	"flush_l2p_region\000"
-.LASF130:
-	.ascii	"cmdline_start\000"
-.LASF535:
-	.ascii	"DeviceCapacity\000"
-.LASF355:
-	.ascii	"l2p_write_count\000"
-.LASF547:
-	.ascii	"gc_ink_free_return_value\000"
-.LASF358:
-	.ascii	"discard_page_count\000"
-.LASF155:
-	.ascii	"UCLASS_ETH\000"
-.LASF221:
-	.ascii	"__dtb_dt_spl_begin\000"
-.LASF10:
-	.ascii	"long long unsigned int\000"
-.LASF274:
-	.ascii	"int16\000"
-.LASF847:
-	.ascii	"ftl_low_format\000"
-.LASF734:
-	.ascii	"offset\000"
-.LASF503:
-	.ascii	"g_gc_blk_index\000"
-.LASF439:
-	.ascii	"req_prgm\000"
-.LASF436:
-	.ascii	"gVendorBlkInfo\000"
-.LASF676:
-	.ascii	"FtlPowerLostRecovery\000"
-.LASF461:
-	.ascii	"p_valid_page_count_table\000"
-.LASF702:
-	.ascii	"FtlMapTblRecovery\000"
-.LASF156:
-	.ascii	"UCLASS_GPIO\000"
-.LASF868:
-	.ascii	"debug_flag\000"
-.LASF497:
-	.ascii	"g_gc_next_blk_1\000"
-.LASF76:
-	.ascii	"off_dt_strings\000"
-.LASF376:
-	.ascii	"sys_blk_queue\000"
-.LASF647:
-	.ascii	"free_data_superblock\000"
-.LASF858:
-	.ascii	"re_test_next_page\000"
-.LASF61:
-	.ascii	"bi_arch_number\000"
-.LASF749:
-	.ascii	"FtlMapWritePage\000"
-.LASF783:
-	.ascii	"tmp_data_count\000"
-.LASF26:
-	.ascii	"ide_bus_offset\000"
-.LASF739:
-	.ascii	"action\000"
-.LASF408:
-	.ascii	"c_ftl_nand_byte_pre_page\000"
-.LASF216:
-	.ascii	"UCLASS_COUNT\000"
-.LASF174:
-	.ascii	"UCLASS_NVME\000"
-.LASF643:
-	.ascii	"new_id\000"
-.LASF345:
-	.ascii	"cache_write_count\000"
-.LASF640:
-	.ascii	"new_ppa\000"
-.LASF258:
-	.ascii	"net_restart_wrap\000"
-.LASF371:
-	.ascii	"totle_read_sector\000"
-.LASF341:
-	.ascii	"bufferSuperblockId\000"
-.LASF273:
-	.ascii	"int32\000"
-.LASF369:
-	.ascii	"refresh_start_lpa\000"
-.LASF80:
-	.ascii	"boot_cpuid_phys\000"
-.LASF304:
-	.ascii	"maxLogicBlk\000"
-.LASF321:
-	.ascii	"totleEc\000"
-.LASF38:
-	.ascii	"lmb_property\000"
-.LASF457:
-	.ascii	"g_ect_tbl_info_size\000"
-.LASF338:
-	.ascii	"gcTempFlashMode\000"
-.LASF431:
-	.ascii	"g_MaxLbn\000"
-.LASF533:
-	.ascii	"g_nand_ops\000"
-.LASF583:
-	.ascii	"ftl_malloc\000"
-.LASF839:
-	.ascii	"first_lpa_nscts\000"
-.LASF183:
-	.ascii	"UCLASS_PMIC\000"
-.LASF318:
-	.ascii	"L2PMap\000"
-.LASF765:
-	.ascii	"prev_node_id\000"
-.LASF453:
-	.ascii	"gp_gc_page_buf_info\000"
-.LASF508:
-	.ascii	"g_totle_discard_page_count\000"
-.LASF656:
-	.ascii	"max_ec\000"
-.LASF536:
-	.ascii	"gFtlInitStatus\000"
-.LASF9:
-	.ascii	"long long int\000"
-.LASF458:
-	.ascii	"p_erase_count_table\000"
-.LASF823:
-	.ascii	"FtlBbmMapBadBlock\000"
-.LASF427:
-	.ascii	"g_GlobalDataVersion\000"
-.LASF717:
-	.ascii	"block_in_plane\000"
-.LASF128:
-	.ascii	"initrd_start\000"
-.LASF428:
-	.ascii	"g_MaxLbaSector\000"
-.LASF382:
-	.ascii	"current_plane\000"
-.LASF878:
-	.ascii	"free\000"
-.LASF383:
-	.ascii	"num_planes\000"
-.LASF799:
-	.ascii	"spareBuf\000"
-.LASF730:
-	.ascii	"FtlVendorPartRead\000"
-.LASF723:
-	.ascii	"FtlWriteDump_data\000"
-.LASF197:
-	.ascii	"UCLASS_SPI_FLASH\000"
-.LASF202:
-	.ascii	"UCLASS_TIMER\000"
-.LASF797:
-	.ascii	"FtlGetLastWrittenPage\000"
-.LASF661:
-	.ascii	"pDataHeader\000"
-.LASF541:
-	.ascii	"power_up_flag\000"
-.LASF365:
-	.ascii	"inkDie_write_and_check_en\000"
-.LASF413:
-	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF842:
-	.ascii	"sftl_deinit\000"
-.LASF814:
-	.ascii	"totle_count\000"
-.LASF282:
-	.ascii	"die_num\000"
-.LASF750:
-	.ascii	"update_map_block\000"
-.LASF880:
-	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
-	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
-	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
-	.ascii	"-a9 -mfpu=vfpv3-d16 -mtls-dialect=gnu -g -Os -fno-b"
-	.ascii	"uiltin -ffreestanding -fshort-wchar -fno-stack-prot"
-	.ascii	"ector -fno-delete-null-pointer-checks -fstack-usage"
-	.ascii	" -fno-pic -ffunction-sections -fdata-sections -fno-"
-	.ascii	"common -ffixed-r9\000"
-.LASF307:
-	.ascii	"maxRegion\000"
-.LASF680:
-	.ascii	"next_free_active_plane\000"
-.LASF490:
-	.ascii	"p_gc_page_info\000"
-.LASF256:
-	.ascii	"net_our_vlan\000"
-.LASF361:
-	.ascii	"totle_power_on_run_times\000"
-.LASF93:
-	.ascii	"ih_os\000"
-.LASF525:
-	.ascii	"g_cur_erase_blk\000"
-.LASF184:
-	.ascii	"UCLASS_PWM\000"
-.LASF634:
-	.ascii	"FtlGcBufFree\000"
-.LASF774:
-	.ascii	"List_pop_index_node\000"
-.LASF690:
-	.ascii	"scan_completed\000"
-.LASF637:
-	.ascii	"update_vpc_list\000"
-.LASF170:
-	.ascii	"UCLASS_MMC\000"
-.LASF464:
-	.ascii	"p_map_block_table\000"
-.LASF543:
-	.ascii	"FtlUpdateVaildLpnCount\000"
-.LASF332:
-	.ascii	"res32_0\000"
-.LASF333:
-	.ascii	"res32_1\000"
-.LASF726:
-	.ascii	"FtlUpdateVaildLpn\000"
-.LASF390:
-	.ascii	"scr_ppa\000"
-.LASF162:
-	.ascii	"UCLASS_IDE\000"
-.LASF224:
-	.ascii	"save_size\000"
-.LASF78:
-	.ascii	"version\000"
-.LASF652:
-	.ascii	"pNode\000"
-.LASF638:
-	.ascii	"get_new_active_ppa\000"
-.LASF877:
-	.ascii	"kmalloc\000"
-.LASF25:
-	.ascii	"_binary_u_boot_bin_end\000"
-.LASF597:
-	.ascii	"max_gc_page_num\000"
-.LASF8:
-	.ascii	"unsigned int\000"
-.LASF712:
-	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF514:
-	.ascii	"g_totle_avg_erase_count\000"
-.LASF835:
-	.ascii	"flashType\000"
-.LASF791:
-	.ascii	"FtlFreeSysBLkSort\000"
-.LASF779:
-	.ascii	"tmp_erase_count\000"
-.LASF83:
-	.ascii	"working_fdt\000"
-.LASF861:
-	.ascii	"FtlVariablesInit\000"
-.LASF392:
-	.ascii	"ftl_gc_page_buffer\000"
-.LASF239:
-	.ascii	"push_packet\000"
-.LASF708:
-	.ascii	"pMapBlkHeader\000"
-.LASF82:
-	.ascii	"size_dt_struct\000"
-.LASF472:
-	.ascii	"p_vendor_region_ppn_table\000"
-.LASF675:
-	.ascii	"make_superblock\000"
-.LASF97:
-	.ascii	"ih_name\000"
-.LASF186:
-	.ascii	"UCLASS_PWRSEQ\000"
-.LASF337:
-	.ascii	"bufferFlashMode\000"
-.LASF6:
-	.ascii	"short int\000"
-.LASF836:
-	.ascii	"FtlRead\000"
-.LASF74:
-	.ascii	"totalsize\000"
-.LASF757:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-.LASF385:
-	.ascii	"check_en\000"
-.LASF442:
-	.ascii	"req_gc_dst\000"
-.LASF374:
-	.ascii	"prev\000"
-.LASF423:
-	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF650:
-	.ascii	"min_ec_id\000"
-.LASF388:
-	.ascii	"phyBlk\000"
-.LASF260:
-	.ascii	"net_boot_file_size\000"
-.LASF412:
-	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF665:
-	.ascii	"FtlVpcCheckAndModify\000"
-.LASF127:
-	.ascii	"ft_len\000"
-.LASF188:
-	.ascii	"UCLASS_REGULATOR\000"
-.LASF311:
-	.ascii	"pBlkVerTbl\000"
-.LASF488:
-	.ascii	"g_sys_save_data\000"
-.LASF124:
-	.ascii	"rd_start\000"
 	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index 6f23e5bfaa..087e6f9c3a 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,83 +2,41 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-07-13
+ * date: 2018-07-21
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
-	.text
-.Ltext0:
-	.cfi_sections	.debug_frame
 	.section	.text.l2p_addr_tran.isra.0,"ax",@progbits
 	.align	2
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB349:
-	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 58 0
-	.cfi_startproc
-.LVL0:
-	.loc 1 66 0
 	adrp	x4, .LANCHOR0
 	add	x4, x4, :lo12:.LANCHOR0
 	ldrh	w3, [x4, 8]
-.LVL1:
-	.loc 1 67 0
 	ldrh	w6, [x4, 10]
-.LVL2:
-	.loc 1 68 0
 	ldrh	w4, [x4, 14]
 	cmp	w4, 4
 	bne	.L2
-	.loc 1 69 0
 	lsr	w3, w3, 1
-.LVL3:
-	.loc 1 70 0
 	ubfiz	w6, w6, 1, 15
-.LVL4:
 .L2:
-	.loc 1 74 0
 	lsr	w5, w0, 10
-.LVL5:
-	.loc 1 78 0
 	and	w0, w0, 1023
-.LVL6:
-	.loc 1 75 0
 	and	w4, w5, 65535
-	.loc 1 76 0
 	and	w5, w5, 65535
-.LVL7:
-	.loc 1 75 0
 	udiv	w4, w4, w3
-.LVL8:
-	.loc 1 76 0
 	msub	w3, w3, w4, w5
-.LVL9:
-	.loc 1 78 0
 	madd	w3, w3, w6, w0
-	.loc 1 82 0
 	mov	w0, 0
-	.loc 1 78 0
 	str	w3, [x1]
-	.loc 1 79 0
 	str	w4, [x2]
-	.loc 1 82 0
 	ret
-	.cfi_endproc
-.LFE349:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.6,"ax",@progbits
 	.align	2
 	.type	ftl_set_blk_mode.part.6, %function
 ftl_set_blk_mode.part.6:
-.LFB355:
-	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1395 0
-	.cfi_startproc
-.LVL10:
-	.loc 2 1395 0
 	and	w0, w0, 65535
-	.loc 2 1398 0
 	adrp	x2, .LANCHOR1
 	ubfx	x1, x0, 5, 11
 	ldr	x3, [x2, #:lo12:.LANCHOR1]
@@ -86,335 +44,198 @@ ftl_set_blk_mode.part.6:
 	mov	w2, 1
 	lsl	w2, w2, w0
 	ldr	w0, [x3, x1]
-.LVL11:
 	orr	w0, w0, w2
 	str	w0, [x3, x1]
 	ret
-	.cfi_endproc
-.LFE355:
 	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
 	.global	Ftl_log2
 	.type	Ftl_log2, %function
 Ftl_log2:
-.LFB202:
-	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
-	.loc 3 128 0
-	.cfi_startproc
-.LVL12:
-	.loc 3 130 0
 	mov	w2, 1
-	.loc 3 132 0
 	mov	w1, 0
-.LVL13:
 .L5:
-	.loc 3 132 0 is_stmt 0 discriminator 1
 	cmp	w2, w0
 	bls	.L6
-.LVL14:
-	.loc 3 134 0 is_stmt 1
 	sub	w0, w1, #1
-.LVL15:
-	.loc 3 136 0
 	ret
-.LVL16:
 .L6:
-	.loc 3 132 0 discriminator 3
 	add	w1, w1, 1
-.LVL17:
-	.loc 3 133 0 discriminator 3
 	lsl	w2, w2, 1
-.LVL18:
-	.loc 3 132 0 discriminator 3
 	and	w1, w1, 65535
-.LVL19:
 	b	.L5
-	.cfi_endproc
-.LFE202:
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
 	.global	FtlPrintInfo
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
-.LFB203:
-	.loc 3 160 0
-	.cfi_startproc
-.LVL20:
 	ret
-	.cfi_endproc
-.LFE203:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",@progbits
 	.align	2
 	.global	FtlSysBlkNumInit
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
-.LFB204:
-	.loc 3 166 0
-	.cfi_startproc
-.LVL21:
-	.loc 3 166 0
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	.loc 3 170 0
 	adrp	x2, .LANCHOR4
 	csel	w0, w0, w1, cs
-.LVL22:
-	.loc 3 169 0
 	adrp	x1, .LANCHOR2
 	and	w0, w0, 65535
-.LVL23:
 	str	w0, [x1, #:lo12:.LANCHOR2]
-	.loc 3 170 0
 	adrp	x1, .LANCHOR3
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w1, w1, w0
 	str	w1, [x2, #:lo12:.LANCHOR4]
-	.loc 3 171 0
 	adrp	x2, .LANCHOR6
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	sub	w0, w2, w0
-.LVL24:
 	adrp	x2, .LANCHOR5
 	strh	w0, [x2, #:lo12:.LANCHOR5]
-	.loc 3 172 0
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	sub	w1, w0, w1
 	adrp	x0, .LANCHOR7
 	str	w1, [x0, #:lo12:.LANCHOR7]
-	.loc 3 175 0
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE204:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.section	.text.FtlConstantsInit,"ax",@progbits
 	.align	2
 	.global	FtlConstantsInit
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-.LFB205:
-	.loc 3 184 0
-	.cfi_startproc
-.LVL25:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	mov	x5, x0
-	.loc 3 191 0
 	adrp	x1, .LANCHOR11
-	.loc 3 184 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 189 0
 	ldrh	w2, [x0]
 	adrp	x0, .LANCHOR9
-.LVL26:
-	.loc 3 190 0
 	ldrh	w4, [x5, 2]
-	.loc 3 189 0
 	strh	w2, [x0, #:lo12:.LANCHOR9]
-	.loc 3 190 0
 	adrp	x0, .LANCHOR10
 	strh	w4, [x0, #:lo12:.LANCHOR10]
-	.loc 3 191 0
 	ldrh	w0, [x5, 4]
 	strh	w0, [x1, #:lo12:.LANCHOR11]
-	.loc 3 192 0
 	ldrh	w1, [x5, 14]
 	cmp	w1, 4
 	bne	.L10
-	.loc 3 193 0
 	ldrh	w1, [x5, 6]
 	adrp	x3, .LANCHOR6
 	lsr	w1, w1, 1
 	strh	w1, [x3, #:lo12:.LANCHOR6]
-	.loc 3 194 0
 	adrp	x1, .LANCHOR12
 	mov	w3, 8
 	strh	w3, [x1, #:lo12:.LANCHOR12]
 .L10:
-	.loc 3 198 0 discriminator 3
 	adrp	x3, .LANCHOR13
 	add	x3, x3, :lo12:.LANCHOR13
-	.loc 3 184 0 discriminator 3
 	mov	x1, 0
 .L11:
-.LVL27:
-	.loc 3 198 0 discriminator 3
 	strb	w1, [x1, x3]
-.LVL28:
 	add	x1, x1, 1
-.LVL29:
-	.loc 3 197 0 discriminator 3
 	cmp	x1, 32
 	bne	.L11
-	.loc 3 199 0
 	adrp	x1, .LANCHOR14
 	mov	w3, 5
-	.loc 3 201 0
 	cmp	w2, 1
-	.loc 3 199 0
 	strh	w3, [x1, #:lo12:.LANCHOR14]
-	.loc 3 200 0
 	adrp	x3, .LANCHOR15
 	strh	wzr, [x3, #:lo12:.LANCHOR15]
-	.loc 3 201 0
 	bne	.L12
-	.loc 3 202 0
 	strh	w2, [x1, #:lo12:.LANCHOR14]
 .L12:
-	.loc 3 203 0
 	adrp	x1, .LANCHOR16
 	mov	w2, 640
-	.loc 3 205 0
 	mul	w4, w4, w0
-	.loc 3 203 0
 	strh	w2, [x1, #:lo12:.LANCHOR16]
-	.loc 3 205 0
 	adrp	x1, .LANCHOR3
 	and	w4, w4, 65535
 	strh	w4, [x1, #:lo12:.LANCHOR3]
-	.loc 3 206 0
 	adrp	x1, .LANCHOR6
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
 	adrp	x1, .LANCHOR17
 	mul	w0, w0, w3
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
-	.loc 3 207 0
 	bl	Ftl_log2
-.LVL30:
-	.loc 3 208 0
 	ldrh	w7, [x5, 12]
-	.loc 3 207 0
 	adrp	x1, .LANCHOR18
-	.loc 3 208 0
 	adrp	x8, .LANCHOR19
-	.loc 3 207 0
 	strh	w0, [x1, #:lo12:.LANCHOR18]
-	.loc 3 209 0
 	adrp	x0, .LANCHOR20
-	.loc 3 210 0
 	mul	w1, w4, w7
-	.loc 3 208 0
 	strh	w7, [x8, #:lo12:.LANCHOR19]
-	.loc 3 209 0
 	strh	w7, [x0, #:lo12:.LANCHOR20]
-	.loc 3 210 0
 	adrp	x0, .LANCHOR21
 	strh	w1, [x0, #:lo12:.LANCHOR21]
-	.loc 3 211 0
 	adrp	x0, .LANCHOR12
 	ldrh	w6, [x0, #:lo12:.LANCHOR12]
 	mov	w0, w6
 	bl	Ftl_log2
-.LVL31:
 	and	w1, w0, 65535
 	adrp	x2, .LANCHOR22
-	.loc 3 213 0
 	adrp	x10, .LANCHOR23
-	.loc 3 215 0
 	ldrh	w5, [x5, 20]
-.LVL32:
-	.loc 3 211 0
 	strh	w0, [x2, #:lo12:.LANCHOR22]
-	.loc 3 213 0
 	ubfiz	w0, w6, 9, 7
 	strh	w0, [x10, #:lo12:.LANCHOR23]
-	.loc 3 214 0
 	adrp	x10, .LANCHOR24
 	ubfx	w0, w0, 8, 8
 	strh	w0, [x10, #:lo12:.LANCHOR24]
-	.loc 3 215 0
 	adrp	x0, .LANCHOR25
 	strh	w5, [x0, #:lo12:.LANCHOR25]
-	.loc 3 217 0
 	mul	w0, w4, w3
 	adrp	x5, .LANCHOR8
 	str	w0, [x5, #:lo12:.LANCHOR8]
-	.loc 3 218 0
 	adrp	x5, .LANCHOR26
 	mul	w0, w0, w6
-	.loc 3 219 0
 	mul	w6, w6, w7
-	.loc 3 218 0
 	mul	w0, w0, w7
 	mov	x7, x2
 	asr	w0, w0, 11
 	str	w0, [x5, #:lo12:.LANCHOR26]
-	.loc 3 219 0
 	mov	w0, 5120
 	adrp	x5, .LANCHOR27
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
-	.loc 3 220 0
 	cmp	w0, 4
 	bls	.L13
 .L19:
-	.loc 3 221 0
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	.loc 3 222 0
 	adrp	x2, .LANCHOR28
 	mov	w0, 640
-	.loc 3 224 0
 	lsl	w3, w3, 6
-	.loc 3 222 0
 	asr	w0, w0, w1
 	add	w0, w0, 2
-	.loc 3 224 0
 	add	w1, w1, 9
-	.loc 3 222 0
 	strh	w0, [x2, #:lo12:.LANCHOR28]
-	.loc 3 224 0
 	adrp	x0, .LANCHOR29
-	.loc 3 228 0
 	cmp	w4, 1
-	.loc 3 224 0
 	asr	w3, w3, w1
-	.loc 3 225 0
 	adrp	x1, .LANCHOR30
-	.loc 3 224 0
 	strh	w3, [x0, #:lo12:.LANCHOR29]
 	and	w3, w3, 65535
 	adrp	x6, .LANCHOR2
-	.loc 3 225 0
 	mul	w0, w3, w4
-	.loc 3 227 0
 	add	w3, w3, 8
-	.loc 3 225 0
 	str	w0, [x1, #:lo12:.LANCHOR30]
-	.loc 3 227 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	.loc 3 228 0
 	beq	.L15
 .L20:
-	.loc 3 229 0
 	str	w3, [x6, #:lo12:.LANCHOR2]
-	.loc 3 232 0
 	ldrh	w0, [x6, #:lo12:.LANCHOR2]
 	bl	FtlSysBlkNumInit
-.LVL33:
-	.loc 3 233 0
 	ldr	w1, [x6, #:lo12:.LANCHOR2]
 	adrp	x0, .LANCHOR31
-	.loc 3 264 0
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	.loc 3 233 0
 	str	w1, [x0, #:lo12:.LANCHOR31]
-	.loc 3 235 0
 	adrp	x0, .LANCHOR7
 	ldrh	w1, [x8, #:lo12:.LANCHOR19]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
@@ -426,164 +247,91 @@ FtlConstantsInit:
 	adrp	x1, .LANCHOR32
 	add	w0, w0, 2
 	strh	w0, [x1, #:lo12:.LANCHOR32]
-	.loc 3 236 0
 	adrp	x0, .LANCHOR33
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR33]
-	.loc 3 237 0
 	adrp	x0, .LANCHOR34
 	str	wzr, [x0, #:lo12:.LANCHOR34]
-	.loc 3 238 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	add	w0, w0, 3
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	.loc 3 239 0
 	ldr	w0, [x4, #:lo12:.LANCHOR30]
 	add	w0, w0, 3
 	str	w0, [x4, #:lo12:.LANCHOR30]
-	.loc 3 264 0
 	mov	w0, 0
 	ret
 .L13:
-	.cfi_restore_state
-	.loc 3 221 0
 	mov	w0, 4
 	b	.L19
 .L15:
-	.loc 3 229 0
 	add	w3, w3, 4
 	b	.L20
-	.cfi_endproc
-.LFE205:
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-.LFB208:
-	.loc 3 514 0
-	.cfi_startproc
-.LVL34:
-	.loc 3 517 0
 	adrp	x1, .LANCHOR35
-	.loc 3 514 0
 	and	w0, w0, 65535
-	.loc 3 517 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	cbz	w1, .L25
-.LBB185:
-.LBB186:
-	.loc 3 518 0
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
-	.loc 3 519 0
 	adrp	x1, .LANCHOR36
 	ldr	x3, [x1, #:lo12:.LANCHOR36]
 	mov	x1, 0
 .L23:
-.LVL35:
-	.loc 3 518 0
 	cmp	w2, w1, uxth
 	bhi	.L24
-.LVL36:
 .L25:
-.LBE186:
-.LBE185:
-	.loc 3 524 0
 	mov	w0, 0
-.LVL37:
 	ret
-.LVL38:
 .L24:
 	add	x1, x1, 1
-.LVL39:
-.LBB188:
-.LBB187:
-	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
 	bne	.L23
-	.loc 3 520 0
 	mov	w0, 1
-.LBE187:
-.LBE188:
-	.loc 3 525 0
 	ret
-	.cfi_endproc
-.LFE208:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlCacheWriteBack,"ax",@progbits
 	.align	2
 	.global	FtlCacheWriteBack
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
-.LFB216:
-	.loc 3 952 0
-	.cfi_startproc
-	.loc 3 954 0
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE216:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",@progbits
 	.align	2
 	.global	sftl_get_density
 	.type	sftl_get_density, %function
 sftl_get_density:
-.LFB221:
-	.loc 3 1178 0
-	.cfi_startproc
-	.loc 3 1180 0
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	ret
-	.cfi_endproc
-.LFE221:
 	.size	sftl_get_density, .-sftl_get_density
 	.section	.text.FtlBbmMapBadBlock,"ax",@progbits
 	.align	2
 	.global	FtlBbmMapBadBlock
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
-.LFB222:
-	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
-	.loc 4 5 0
-	.cfi_startproc
-.LVL40:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	and	w1, w0, 65535
-	.loc 4 10 0
 	adrp	x0, .LANCHOR17
-.LVL41:
-	.loc 4 15 0
 	mov	w4, 1
-	.loc 4 5 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 4 10 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
-	.loc 4 5 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 4 13 0
 	adrp	x19, .LANCHOR37
 	add	x19, x19, :lo12:.LANCHOR37
-	.loc 4 10 0
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
-.LVL42:
 	msub	w3, w3, w0, w1
-	.loc 4 13 0
 	add	x0, x19, x2, uxth 3
 	and	w3, w3, 65535
-.LVL43:
-	.loc 4 15 0
 	ldr	x0, [x0, 32]
 	ubfx	x5, x3, 5, 11
 	lsl	x5, x5, 2
@@ -591,314 +339,177 @@ FtlBbmMapBadBlock:
 	ldr	w6, [x0, x5]
 	orr	w4, w4, w6
 	str	w4, [x0, x5]
-	.loc 4 16 0
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.LVL44:
-	.loc 4 17 0
 	ldrh	w0, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 6]
-	.loc 4 19 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE222:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",@progbits
 	.align	2
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-.LFB223:
-	.loc 4 24 0
-	.cfi_startproc
-.LVL45:
-	.loc 4 30 0
 	adrp	x1, .LANCHOR17
-	.loc 4 24 0
 	and	w0, w0, 65535
-	.loc 4 30 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR17]
-.LVL46:
-	.loc 4 31 0
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-.LVL47:
-	.loc 4 33 0
 	adrp	x1, .LANCHOR37
-.LVL48:
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x2, x1, x2, uxth 3
-	.loc 4 31 0
 	and	w0, w0, 65535
-.LVL49:
-	.loc 4 34 0
 	ubfx	x3, x0, 5, 11
 	ldr	x1, [x2, 32]
 	ldr	w1, [x1, x3, lsl 2]
 	lsr	w0, w1, w0
-.LVL50:
-	.loc 4 36 0
 	and	w0, w0, 1
 	ret
-	.cfi_endproc
-.LFE223:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",@progbits
 	.align	2
 	.global	FtlBbtInfoPrint
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
-.LFB224:
-	.loc 4 39 0
-	.cfi_startproc
 	ret
-	.cfi_endproc
-.LFE224:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.FtlBbtCalcTotleCnt,"ax",@progbits
 	.align	2
 	.global	FtlBbtCalcTotleCnt
 	.type	FtlBbtCalcTotleCnt, %function
 FtlBbtCalcTotleCnt:
-.LFB228:
-	.loc 4 157 0
-	.cfi_startproc
-.LVL51:
-	.loc 4 160 0
 	adrp	x0, .LANCHOR17
 	mov	w4, 0
-	.loc 4 159 0
 	mov	w5, 0
-.LVL52:
-	.loc 4 160 0
 	ldrh	w6, [x0, #:lo12:.LANCHOR17]
 	adrp	x0, .LANCHOR10
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	mul	w6, w6, w0
 	cmp	w4, w6
 	blt	.L43
-	.loc 4 169 0
 	mov	w0, w5
 	ret
 .L43:
-	.loc 4 157 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 .L36:
-	.loc 4 162 0
 	mov	w0, w4
 	bl	FtlBbmIsBadBlock
-.LVL53:
 	cbz	w0, .L35
-	.loc 4 164 0
 	add	w5, w5, 1
-.LVL54:
 	and	w5, w5, 65535
-.LVL55:
 .L35:
-	.loc 4 160 0 discriminator 2
 	add	w4, w4, 1
-.LVL56:
 	and	w4, w4, 65535
-.LVL57:
 	cmp	w4, w6
 	blt	.L36
-	.loc 4 169 0
 	mov	w0, w5
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE228:
 	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
 	.section	.text.V2P_block,"ax",@progbits
 	.align	2
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-.LFB232:
-	.loc 2 5 0
-	.cfi_startproc
-.LVL58:
-	.loc 2 8 0
 	adrp	x2, .LANCHOR11
-	.loc 2 5 0
 	and	w0, w0, 65535
-	.loc 2 8 0
 	adrp	x4, .LANCHOR17
-	.loc 2 5 0
 	and	w1, w1, 65535
-	.loc 2 8 0
 	ldrh	w2, [x2, #:lo12:.LANCHOR11]
-.LVL59:
 	ldrh	w4, [x4, #:lo12:.LANCHOR17]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
-.LVL60:
 	madd	w2, w2, w1, w0
-.LVL61:
 	madd	w0, w3, w4, w2
-	.loc 2 10 0
 	ret
-	.cfi_endproc
-.LFE232:
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",@progbits
 	.align	2
 	.global	P2V_plane
 	.type	P2V_plane, %function
 P2V_plane:
-.LFB233:
-	.loc 2 13 0
-	.cfi_startproc
-.LVL62:
-	.loc 2 13 0
 	and	w3, w0, 65535
-	.loc 2 16 0
 	adrp	x0, .LANCHOR11
-.LVL63:
 	ldrh	w1, [x0, #:lo12:.LANCHOR11]
-.LVL64:
 	adrp	x0, .LANCHOR17
 	ldrh	w2, [x0, #:lo12:.LANCHOR17]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
 	madd	w0, w1, w2, w0
-	.loc 2 18 0
 	ret
-	.cfi_endproc
-.LFE233:
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",@progbits
 	.align	2
 	.global	P2V_block_in_plane
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
-.LFB234:
-	.loc 2 21 0
-	.cfi_startproc
-.LVL65:
-	.loc 2 21 0
 	and	w2, w0, 65535
-	.loc 2 24 0
 	adrp	x0, .LANCHOR17
-.LVL66:
 	ldrh	w1, [x0, #:lo12:.LANCHOR17]
 	udiv	w0, w2, w1
 	msub	w0, w0, w1, w2
-	.loc 2 25 0
 	adrp	x1, .LANCHOR11
 	ldrh	w1, [x1, #:lo12:.LANCHOR11]
-	.loc 2 24 0
 	and	w0, w0, 65535
-.LVL67:
-	.loc 2 27 0
 	udiv	w0, w0, w1
-.LVL68:
 	ret
-	.cfi_endproc
-.LFE234:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",@progbits
 	.align	2
 	.global	ftl_cmp_data_ver
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
-.LFB235:
-	.loc 2 31 0
-	.cfi_startproc
-.LVL69:
-	.loc 2 34 0
 	cmp	w0, w1
 	mov	w2, -2147483648
 	bls	.L48
-	.loc 2 36 0
 	sub	w1, w0, w1
-.LVL70:
 	cmp	w1, w2
 	cset	w0, ls
-.LVL71:
 	ret
-.LVL72:
 .L48:
-	.loc 2 40 0
 	sub	w1, w1, w0
-.LVL73:
 	cmp	w1, w2
 	cset	w0, hi
-.LVL74:
-	.loc 2 44 0
 	ret
-	.cfi_endproc
-.LFE235:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-.LFB238:
-	.loc 2 88 0
-	.cfi_startproc
-	.loc 2 89 0
 	adrp	x0, .LANCHOR38+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
 	cmp	w0, 0
-	.loc 2 90 0
 	cset	w0, eq
 	ret
-	.cfi_endproc
-.LFE238:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-.LFB239:
-	.loc 2 93 0
-	.cfi_startproc
-	.loc 2 94 0
 	adrp	x0, .LANCHOR38+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
 	cmp	w0, 1024
-	.loc 2 95 0
 	cset	w0, eq
 	ret
-	.cfi_endproc
-.LFE239:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBLkSort,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-.LFB241:
-	.loc 2 118 0
-	.cfi_startproc
-.LVL75:
-	.loc 2 123 0
 	adrp	x0, .LANCHOR38
 	add	x1, x0, :lo12:.LANCHOR38
 	ldrh	w2, [x1, 6]
 	cbz	w2, .L52
-	.loc 2 119 0
 	adrp	x2, .LANCHOR39+28
 	ldrh	w3, [x1, 2]
 	mov	w6, 0
@@ -907,962 +518,503 @@ FtlFreeSysBLkSort:
 	ldrh	w2, [x1, 4]
 	and	w5, w5, 31
 .L54:
-.LVL76:
-	.loc 2 124 0 discriminator 1
 	cmp	w5, w4
 	bgt	.L55
 	cbz	w6, .L52
 	add	x0, x0, :lo12:.LANCHOR38
 	strh	w3, [x0, 2]
 	strh	w2, [x0, 4]
-.LVL77:
 .L52:
 	ret
-.LVL78:
 .L55:
-	.loc 2 125 0 discriminator 3
 	add	x6, x1, x3, sxtw 1
-	.loc 2 124 0 discriminator 3
 	add	w4, w4, 1
-.LVL79:
-	.loc 2 126 0 discriminator 3
 	add	w3, w3, 1
-	.loc 2 124 0 discriminator 3
 	and	w4, w4, 65535
-	.loc 2 126 0 discriminator 3
 	and	w3, w3, 1023
-	.loc 2 125 0 discriminator 3
 	ldrh	w7, [x6, 8]
-.LVL80:
-	.loc 2 127 0 discriminator 3
 	add	x6, x1, x2, sxtw 1
 	strh	w7, [x6, 8]
 	mov	w6, 1
-	.loc 2 128 0 discriminator 3
 	add	w2, w2, w6
 	and	w2, w2, 1023
 	b	.L54
-	.cfi_endproc
-.LFE241:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.IsInFreeQueue,"ax",@progbits
 	.align	2
 	.global	IsInFreeQueue
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
-.LFB242:
-	.loc 2 163 0
-	.cfi_startproc
-.LVL81:
-.LBB189:
-.LBB190:
-	.loc 2 94 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
-.LBE190:
-.LBE189:
-	.loc 2 163 0
 	and	w0, w0, 65535
-.LBB192:
-.LBB191:
-	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE191:
-.LBE192:
-	.loc 2 168 0
 	cmp	w4, 1024
 	beq	.L65
-	.loc 2 171 0
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
 .L63:
-.LVL82:
-	.loc 2 170 0 discriminator 1
 	cmp	w3, w4
 	bcc	.L64
-.LVL83:
 .L65:
-	.loc 2 164 0
 	mov	w0, 0
-.LVL84:
 	ret
-.LVL85:
 .L64:
-	.loc 2 171 0
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
 	beq	.L66
-	.loc 2 170 0 discriminator 2
 	add	w3, w3, 1
-.LVL86:
 	b	.L63
 .L66:
-	.loc 2 172 0
 	mov	w0, 1
-.LVL87:
-	.loc 2 178 0
 	ret
-	.cfi_endproc
-.LFE242:
 	.size	IsInFreeQueue, .-IsInFreeQueue
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-.LFB246:
-	.loc 2 249 0
-	.cfi_startproc
-.LVL88:
-	.loc 2 260 0
 	adrp	x1, .LANCHOR5
-	.loc 2 249 0
 	and	w0, w0, 65535
-	.loc 2 260 0
 	ldrh	w14, [x1, #:lo12:.LANCHOR5]
 	cmp	w14, w0
 	bls	.L83
-	.loc 2 265 0
 	adrp	x1, .LANCHOR40
 	mov	w3, 6
 	ldr	x6, [x1, #:lo12:.LANCHOR40]
 	umull	x13, w0, w3
-	.loc 2 266 0
 	mov	w1, -1
-	.loc 2 265 0
 	add	x5, x6, x13
-.LVL89:
-	.loc 2 266 0
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	.loc 2 268 0
 	adrp	x1, .LANCHOR41
 	mov	x15, x1
 	ldr	x12, [x1, #:lo12:.LANCHOR41]
 	cbnz	x12, .L70
-	.loc 2 269 0
 	str	x5, [x1, #:lo12:.LANCHOR41]
-.LVL90:
 .L83:
-	.loc 2 323 0
 	mov	w0, 0
-.LVL91:
 	ret
-.LVL92:
 .L70:
-	.loc 2 249 0
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 273 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x2, x0, 1, 16
-	.loc 2 279 0
 	mov	x4, -6148914691236517206
-	.loc 2 249 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 273 0
 	ldr	x16, [x1, #:lo12:.LANCHOR42]
-	.loc 2 279 0
 	movk	x4, 0xaaab, lsl 0
-	.loc 2 274 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
-	.loc 2 289 0
 	mov	w11, w8
-	.loc 2 249 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 274 0
 	cmp	w1, 0
-	.loc 2 301 0
 	mov	w20, 65535
-	.loc 2 273 0
 	ldrh	w7, [x16, x2]
-.LVL93:
-	.loc 2 274 0
 	mul	w7, w7, w1
-.LVL94:
-	.loc 2 279 0
 	sub	x1, x12, x6
-.LVL95:
 	asr	x1, x1, 1
-	.loc 2 274 0
 	csel	w7, w7, w8, ne
-.LVL96:
-	.loc 2 309 0
 	mov	w8, w3
-	.loc 2 279 0
 	mul	x1, x1, x4
-	.loc 2 294 0
 	adrp	x4, .LANCHOR43
 	ldr	x17, [x4, #:lo12:.LANCHOR43]
-	.loc 2 279 0
 	and	w1, w1, 65535
-.LVL97:
-	.loc 2 294 0
 	mov	x4, x12
 	add	x10, x17, x2
-	.loc 2 256 0
 	mov	w2, 0
-.LVL98:
 .L78:
-	.loc 2 281 0
 	add	w2, w2, 1
-.LVL99:
 	and	w2, w2, 65535
-.LVL100:
-	.loc 2 282 0
 	cmp	w14, w2
 	bcc	.L69
-	.loc 2 285 0
 	cmp	w1, w0
 	beq	.L69
-	.loc 2 288 0
 	ubfiz	x30, x1, 1, 16
-	.loc 2 289 0
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
-	.loc 2 288 0
 	ldrh	w3, [x16, x30]
-.LVL101:
-	.loc 2 289 0
 	mul	w3, w3, w19
-.LVL102:
 	csel	w3, w3, w11, ne
-.LVL103:
-	.loc 2 293 0
 	cmp	w7, w3
 	bne	.L74
-	.loc 2 294 0
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
-.LVL104:
 	cmp	w19, w3
 	bcc	.L76
 .L75:
-	.loc 2 312 0
 	strh	w1, [x6, x13]
-.LVL105:
-	.loc 2 315 0
 	cmp	x4, x12
-	.loc 2 313 0
 	ldrh	w1, [x4, 2]
-.LVL106:
 	strh	w1, [x5, 2]
-	.loc 2 315 0
 	bne	.L79
-	.loc 2 316 0
 	strh	w0, [x4, 2]
-	.loc 2 317 0
 	str	x5, [x15, #:lo12:.LANCHOR41]
 	b	.L69
-.LVL107:
 .L74:
-	.loc 2 298 0
 	bcc	.L75
-.LVL108:
 .L76:
-	.loc 2 301 0
 	ldrh	w3, [x4]
 	cmp	w3, w20
 	bne	.L77
-	.loc 2 302 0
 	strh	w1, [x5, 2]
-.LVL109:
-	.loc 2 303 0
 	strh	w0, [x4]
-	.loc 2 304 0
 	adrp	x0, .LANCHOR44
 	str	x5, [x0, #:lo12:.LANCHOR44]
-.LVL110:
 .L69:
-	.loc 2 323 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL111:
 .L77:
-	.cfi_restore_state
-	.loc 2 309 0
 	umaddl	x4, w3, w8, x6
-.LVL112:
-	.loc 2 281 0
 	mov	w1, w3
 	b	.L78
-.LVL113:
 .L79:
-	.loc 2 319 0
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
-.LVL114:
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
-.LVL115:
-	.loc 2 320 0
 	strh	w0, [x4, 2]
 	b	.L69
-	.cfi_endproc
-.LFE246:
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
 	.global	INSERT_DATA_LIST
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
-.LFB245:
-	.loc 2 218 0
-	.cfi_startproc
-.LVL116:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 219 0
 	bl	insert_data_list
-.LVL117:
-	.loc 2 220 0
 	adrp	x1, .LANCHOR45
 	ldrh	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR45]
-	.loc 2 221 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
 	bcs	.L85
-.LVL118:
-	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-.LBB195:
-.LBB196:
-	.loc 2 221 0
 	mov	w2, 221
 	adrp	x1, .LANCHOR46
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL119:
 .L85:
-	.cfi_restore_state
-.LBE196:
-.LBE195:
-	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE245:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",@progbits
 	.align	2
 	.global	insert_free_list
 	.type	insert_free_list, %function
 insert_free_list:
-.LFB247:
-	.loc 2 326 0
-	.cfi_startproc
-.LVL120:
-	.loc 2 326 0
 	and	w0, w0, 65535
-	.loc 2 332 0
 	mov	w7, 65535
 	cmp	w0, w7
 	beq	.L89
-	.loc 2 335 0
 	adrp	x1, .LANCHOR40
 	mov	w6, 6
 	ldr	x3, [x1, #:lo12:.LANCHOR40]
 	umull	x8, w0, w6
-	.loc 2 336 0
 	mov	w1, -1
-	.loc 2 335 0
 	add	x4, x3, x8
-.LVL121:
-	.loc 2 336 0
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	.loc 2 338 0
 	adrp	x1, .LANCHOR47
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR47]
 	cbnz	x5, .L90
-	.loc 2 339 0
 	str	x4, [x1, #:lo12:.LANCHOR47]
-.LVL122:
 .L89:
-	.loc 2 372 0
 	mov	w0, 0
-.LVL123:
 	ret
-.LVL124:
 .L90:
-	.loc 2 343 0
 	adrp	x1, .LANCHOR43
-	.loc 2 345 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 343 0
 	ldr	x11, [x1, #:lo12:.LANCHOR43]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
-.LVL125:
-	.loc 2 345 0
 	sub	x1, x5, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.LVL126:
 .L93:
-	.loc 2 348 0
 	ubfiz	x10, x1, 1, 16
-	.loc 2 349 0
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
 	bcs	.L91
-	.loc 2 352 0
 	ldrh	w10, [x2]
 	cmp	w10, w7
 	bne	.L92
-	.loc 2 353 0
 	strh	w1, [x4, 2]
-.LVL127:
-	.loc 2 354 0
 	strh	w0, [x2]
-	.loc 2 355 0
 	b	.L89
-.LVL128:
 .L92:
-	.loc 2 358 0
 	umaddl	x2, w10, w6, x3
-.LVL129:
-	.loc 2 348 0
 	mov	w1, w10
-.LVL130:
 	b	.L93
-.LVL131:
 .L91:
-	.loc 2 361 0
 	ldrh	w6, [x2, 2]
-	.loc 2 364 0
 	cmp	x2, x5
-	.loc 2 361 0
 	strh	w6, [x4, 2]
-.LVL132:
-	.loc 2 362 0
 	strh	w1, [x3, x8]
-	.loc 2 364 0
 	bne	.L94
-	.loc 2 365 0
 	strh	w0, [x2, 2]
-	.loc 2 366 0
 	str	x4, [x12, #:lo12:.LANCHOR47]
 	b	.L89
 .L94:
-	.loc 2 368 0
 	ldrh	w1, [x2, 2]
-.LVL133:
 	mov	w4, 6
-.LVL134:
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
-.LVL135:
-	.loc 2 369 0
 	strh	w0, [x2, 2]
 	b	.L89
-	.cfi_endproc
-.LFE247:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
 	.global	INSERT_FREE_LIST
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
-.LFB244:
-	.loc 2 211 0
-	.cfi_startproc
-.LVL136:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 212 0
 	bl	insert_free_list
-.LVL137:
-	.loc 2 213 0
 	adrp	x1, .LANCHOR48
 	ldrh	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR48]
-	.loc 2 214 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
 	bcs	.L95
-.LVL138:
-	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-.LBB199:
-.LBB200:
-	.loc 2 214 0
 	mov	w2, 214
 	adrp	x1, .LANCHOR49
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL139:
 .L95:
-	.cfi_restore_state
-.LBE200:
-.LBE199:
-	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE244:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",@progbits
 	.align	2
 	.global	List_remove_node
 	.type	List_remove_node, %function
 List_remove_node:
-.LFB248:
-	.loc 2 375 0
-	.cfi_startproc
-.LVL140:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	and	w1, w1, 65535
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 378 0
 	adrp	x20, .LANCHOR40
-	.loc 2 375 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
 	mov	x22, x0
-	.loc 2 378 0
 	mov	w0, 6
-.LVL141:
-	.loc 2 375 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-	.loc 2 378 0
 	ldr	x23, [x20, #:lo12:.LANCHOR40]
 	umull	x21, w1, w0
-	.loc 2 379 0
 	mov	w0, 65535
-	.loc 2 378 0
 	add	x19, x23, x21
-.LVL142:
-	.loc 2 379 0
 	ldrh	w1, [x19, 2]
-.LVL143:
 	cmp	w1, w0
 	bne	.L99
-	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	x0, [x22]
 	cmp	x19, x0
 	beq	.L99
-	.loc 2 379 0 discriminator 2
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
 	mov	w2, 379
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL144:
 .L99:
-	.loc 2 381 0 is_stmt 1
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
 	bne	.L100
-	.loc 2 382 0
 	cmp	w0, w1
 	bne	.L101
-	.loc 2 383 0
 	str	xzr, [x22]
 .L102:
-	.loc 2 399 0
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
-	.loc 2 401 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL145:
 	ldp	x21, x22, [sp, 32]
-.LVL146:
 	ldr	x23, [sp, 48]
-.LVL147:
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL148:
 .L101:
-	.cfi_restore_state
-	.loc 2 385 0
 	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
-	.loc 2 386 0
 	mov	w1, -1
-	.loc 2 385 0
 	str	x0, [x22]
-	.loc 2 386 0
 	strh	w1, [x0, 2]
 	b	.L102
 .L100:
-	.loc 2 388 0
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
 	bne	.L103
-	.loc 2 389 0
 	cmp	w1, w0
 	beq	.L102
-.LVL149:
-	.loc 2 390 0
 	mov	w0, 6
-	.loc 2 391 0
 	mov	w2, -1
-	.loc 2 390 0
 	umull	x1, w1, w0
-.LVL150:
-	.loc 2 391 0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
 	b	.L102
-.LVL151:
 .L103:
-	.loc 2 394 0
 	ldr	x2, [x20, #:lo12:.LANCHOR40]
-.LVL152:
 	mov	w3, 6
-	.loc 2 395 0
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
-.LVL153:
-	.loc 2 396 0
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
-	.loc 2 397 0
 	strh	w0, [x2, x1]
 	b	.L102
-	.cfi_endproc
-.LFE248:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
 	.global	List_pop_index_node
 	.type	List_pop_index_node, %function
 List_pop_index_node:
-.LFB249:
-	.loc 2 404 0
-	.cfi_startproc
-.LVL154:
-	.loc 2 408 0
 	ldr	x2, [x0]
 	cbz	x2, .L111
-	.loc 2 404 0
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 413 0
 	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
-	.loc 2 412 0
 	mov	w4, 65535
-	.loc 2 404 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 413 0
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR40]
-.LVL155:
 .L107:
-	.loc 2 412 0
 	cbnz	w1, .L108
 .L110:
-	.loc 2 416 0
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
-.LVL156:
 	asr	x19, x19, 1
 	movk	x2, 0xaaab, lsl 0
 	mul	x19, x19, x2
 	and	w19, w19, 65535
-.LVL157:
-	.loc 2 417 0
 	mov	w1, w19
-.LVL158:
 	bl	List_remove_node
-.LVL159:
-	.loc 2 419 0
 	mov	w0, w19
-	.loc 2 420 0
 	ldr	x19, [sp, 16]
-.LVL160:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL161:
 .L108:
-	.cfi_restore_state
-	.loc 2 412 0 discriminator 1
 	ldrh	w3, [x2]
 	cmp	w3, w4
 	beq	.L110
-	.loc 2 414 0
 	sub	w1, w1, #1
-.LVL162:
-	.loc 2 413 0
 	umaddl	x2, w3, w5, x19
-.LVL163:
-	.loc 2 414 0
 	and	w1, w1, 65535
-.LVL164:
 	b	.L107
-.LVL165:
 .L111:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 29
-	.cfi_restore 30
-	.loc 2 409 0
 	mov	w0, 65535
-.LVL166:
 	ret
-	.cfi_endproc
-.LFE249:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_pop_head_node,"ax",@progbits
 	.align	2
 	.global	List_pop_head_node
 	.type	List_pop_head_node, %function
 List_pop_head_node:
-.LFB250:
-	.loc 2 423 0
-	.cfi_startproc
-.LVL167:
-	.loc 2 424 0
 	mov	w1, 0
 	b	List_pop_index_node
-.LVL168:
-	.cfi_endproc
-.LFE250:
 	.size	List_pop_head_node, .-List_pop_head_node
 	.section	.text.List_get_gc_head_node,"ax",@progbits
 	.align	2
 	.global	List_get_gc_head_node
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
-.LFB251:
-	.loc 2 428 0
-	.cfi_startproc
-.LVL169:
-	.loc 2 428 0
 	and	w2, w0, 65535
-	.loc 2 432 0
 	adrp	x0, .LANCHOR41
-.LVL170:
 	ldr	x1, [x0, #:lo12:.LANCHOR41]
 	cbz	x1, .L122
-	.loc 2 437 0
 	adrp	x0, .LANCHOR40
 	mov	w4, 6
 	ldr	x3, [x0, #:lo12:.LANCHOR40]
-	.loc 2 436 0
 	mov	w0, 65535
-.LVL171:
 .L119:
 	cbz	w2, .L120
-	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x1]
-.LVL172:
 	cmp	w1, w0
 	bne	.L121
 	ret
 .L121:
-	.loc 2 438 0 is_stmt 1
 	sub	w2, w2, #1
-.LVL173:
-	.loc 2 437 0
 	umaddl	x1, w1, w4, x3
-.LVL174:
-	.loc 2 438 0
 	and	w2, w2, 65535
-.LVL175:
 	b	.L119
-.LVL176:
 .L122:
-	.loc 2 433 0
 	mov	w0, 65535
 	ret
-.LVL177:
 .L120:
-	.loc 2 442 0
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
-.LVL178:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	.loc 2 444 0
 	and	w0, w0, 65535
-	.loc 2 445 0
 	ret
-	.cfi_endproc
-.LFE251:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",@progbits
 	.align	2
 	.global	List_update_data_list
 	.type	List_update_data_list, %function
 List_update_data_list:
-.LFB252:
-	.loc 2 448 0
-	.cfi_startproc
-.LVL179:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	and	w19, w0, 65535
-	.loc 2 457 0
 	adrp	x0, .LANCHOR51
-.LVL180:
-	.loc 2 448 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.loc 2 457 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	.loc 2 448 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 457 0
 	cmp	w0, w19
 	beq	.L125
-	.loc 2 457 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
 	beq	.L125
-	.loc 2 457 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
 	beq	.L125
-.LVL181:
-.LBB203:
-.LBB204:
-	.loc 2 460 0 is_stmt 1
 	adrp	x0, .LANCHOR40
 	mov	w21, 6
-	.loc 2 462 0
 	adrp	x24, .LANCHOR41
 	mov	x26, x0
-	.loc 2 460 0
 	umull	x21, w19, w21
 	ldr	x23, [x0, #:lo12:.LANCHOR40]
-	.loc 2 462 0
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
-	.loc 2 460 0
 	add	x22, x23, x21
-.LVL182:
-	.loc 2 462 0
 	cmp	x22, x1
 	beq	.L125
-	.loc 2 465 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	mov	x25, x1
 	ldr	x2, [x1, #:lo12:.LANCHOR42]
-	.loc 2 470 0
 	mov	w1, 65535
-	.loc 2 465 0
 	ldrh	w20, [x2, x0]
-.LVL183:
-	.loc 2 466 0
 	ldrh	w0, [x22, 4]
-.LVL184:
 	cmp	w0, 0
 	mul	w20, w20, w0
-.LVL185:
-	.loc 2 470 0
 	ldrh	w0, [x22, 2]
-.LVL186:
-	.loc 2 466 0
 	csinv	w20, w20, wzr, ne
-.LVL187:
-	.loc 2 470 0
 	cmp	w0, w1
 	bne	.L128
 	ldrh	w1, [x23, x21]
@@ -1871,13 +1023,10 @@ List_update_data_list:
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
 	mov	w2, 470
-.LVL188:
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL189:
 .L128:
-	.loc 2 471 0
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
@@ -1886,44 +1035,26 @@ List_update_data_list:
 	cmp	w1, w0
 	beq	.L125
 .L129:
-	.loc 2 473 0
 	mov	w1, 6
-	.loc 2 474 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 473 0
 	umull	x0, w0, w1
-.LVL190:
-	.loc 2 474 0
 	asr	x1, x0, 1
 	mul	x1, x1, x2
-	.loc 2 475 0
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1, lsl 1]
-.LVL191:
-	.loc 2 476 0
 	ldr	x2, [x26, #:lo12:.LANCHOR40]
 	add	x0, x2, x0
-.LVL192:
 	ldrh	w2, [x0, 4]
-.LVL193:
 	cmp	w2, 0
 	mul	w0, w1, w2
-.LVL194:
 	csinv	w0, w0, wzr, ne
-.LVL195:
-	.loc 2 480 0
 	cmp	w20, w0
 	bcs	.L125
-	.loc 2 481 0
 	adrp	x20, .LANCHOR45
-.LVL196:
 	mov	w1, w19
-.LVL197:
 	add	x0, x24, :lo12:.LANCHOR41
-.LVL198:
 	bl	List_remove_node
-.LVL199:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	cbnz	w0, .L131
 	adrp	x1, .LANCHOR54
@@ -1932,240 +1063,129 @@ List_update_data_list:
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL200:
 .L131:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 482 0
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL201:
 .L125:
-.LBE204:
-.LBE203:
-	.loc 2 485 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL202:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE252:
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
 	.global	select_l2p_ram_region
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
-.LFB260:
-	.loc 2 749 0
-	.cfi_startproc
-.LVL203:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 754 0
 	adrp	x0, .LANCHOR33
 	mov	x1, 0
-	.loc 2 755 0
 	mov	w3, 65535
-	.loc 2 749 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 754 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 755 0
 	adrp	x0, .LANCHOR55
-	.loc 2 749 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 755 0
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
-.LVL204:
 .L136:
 	and	w19, w1, 65535
-.LVL205:
-	.loc 2 754 0 discriminator 1
 	cmp	w19, w2
 	bcc	.L138
 	add	x3, x0, 4
-	.loc 2 754 0 is_stmt 0
 	mov	w19, w2
-.LVL206:
 	mov	w5, -2147483648
 	mov	w1, 0
-.LVL207:
 .L139:
-	.loc 2 764 0 is_stmt 1 discriminator 1
 	cmp	w1, w2
 	bne	.L141
-	.loc 2 773 0
 	cmp	w19, w2
 	bcc	.L137
-	.loc 2 779 0
 	adrp	x1, .LANCHOR56
-.LVL208:
 	mov	w19, w2
-.LVL209:
 	mov	w3, -1
 	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.LVL210:
 .L142:
-	.loc 2 778 0 discriminator 1
 	cmp	w1, w2
 	bne	.L144
-	.loc 2 784 0
 	cmp	w19, w1
 	bcc	.L137
-	.loc 2 784 0 is_stmt 0 discriminator 1
 	mov	w2, 784
 	adrp	x1, .LANCHOR57
-.LVL211:
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL212:
 	b	.L137
-.LVL213:
 .L138:
 	add	x1, x1, 1
-	.loc 2 755 0 is_stmt 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
 	bne	.L136
-.LVL214:
 .L137:
-	.loc 2 786 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL215:
 .L141:
-	.cfi_restore_state
-	.loc 2 765 0
 	ldr	w4, [x3]
 	tbnz	w4, #31, .L140
-	.loc 2 766 0
 	cmp	w5, w4
 	bls	.L140
 	mov	w5, w4
-.LVL216:
 	mov	w19, w1
-.LVL217:
 .L140:
-	.loc 2 764 0 discriminator 2
 	add	w1, w1, 1
-.LVL218:
 	add	x3, x3, 16
 	and	w1, w1, 65535
-.LVL219:
 	b	.L139
-.LVL220:
 .L144:
-	.loc 2 779 0
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
 	bls	.L143
-	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
-.LVL221:
 	csel	w19, w19, w1, eq
-.LVL222:
 .L143:
-	.loc 2 778 0 is_stmt 1 discriminator 2
 	add	w1, w1, 1
-.LVL223:
 	add	x0, x0, 16
 	and	w1, w1, 65535
-.LVL224:
 	b	.L142
-	.cfi_endproc
-.LFE260:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-.LFB266:
-	.loc 2 931 0
-	.cfi_startproc
-.LVL225:
-	.loc 2 934 0
 	adrp	x2, .LANCHOR58
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
 	bhi	.L147
-	.loc 2 934 0 is_stmt 0 discriminator 1
 	cbnz	w0, .L147
-	.loc 2 934 0
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR58]
-	.loc 2 943 0 is_stmt 1
 	ret
 .L147:
-.LBB207:
-.LBB208:
-	.loc 2 937 0
 	adrp	x1, .LANCHOR5
-.LBE208:
-.LBE207:
-	.loc 2 936 0
 	adrp	x0, .LANCHOR59
-.LVL226:
-	.loc 2 935 0
 	strh	wzr, [x3, #:lo12:.LANCHOR58]
-.LBB211:
-.LBB209:
-	.loc 2 939 0
 	mov	w2, 0
-	.loc 2 937 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR5]
-	.loc 2 939 0
 	adrp	x1, .LANCHOR42
-.LBE209:
-.LBE211:
-	.loc 2 936 0
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-.LVL227:
-.LBB212:
-.LBB210:
-	.loc 2 939 0
 	mov	w3, 0
 	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
 .L148:
-.LVL228:
-	.loc 2 937 0
 	cmp	w5, w1, uxth
 	bhi	.L150
 	cbz	w3, .L146
@@ -2173,42 +1193,25 @@ FtlUpdateVaildLpn:
 .L146:
 	ret
 .L150:
-	.loc 2 939 0
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
 	beq	.L149
-	.loc 2 940 0
 	add	w2, w2, w4
 	mov	w3, 1
 .L149:
-.LVL229:
 	add	x1, x1, 1
-.LVL230:
 	b	.L148
-.LBE210:
-.LBE212:
-	.cfi_endproc
-.LFE266:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
 	.global	ftl_set_blk_mode
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
-.LFB272:
-	.loc 2 1396 0
-	.cfi_startproc
-.LVL231:
-	.loc 2 1396 0
 	and	w0, w0, 65535
-	.loc 2 1397 0
 	cbz	w1, .L157
 	b	ftl_set_blk_mode.part.6
-.LVL232:
 .L157:
-	.loc 2 1400 0
 	adrp	x1, .LANCHOR1
-.LVL233:
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
 	ldr	x3, [x1, #:lo12:.LANCHOR1]
@@ -2218,422 +1221,244 @@ ftl_set_blk_mode:
 	bic	w0, w1, w0
 	str	w0, [x3, x2]
 	ret
-	.cfi_endproc
-.LFE272:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",@progbits
 	.align	2
 	.global	ftl_get_blk_mode
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
-.LFB273:
-	.loc 2 1404 0
-	.cfi_startproc
-.LVL234:
-	.loc 2 1404 0
 	and	w1, w0, 65535
-	.loc 2 1405 0
 	adrp	x0, .LANCHOR1
-.LVL235:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	ubfx	x2, x1, 5, 11
 	ldr	w0, [x0, x2, lsl 2]
 	lsr	w0, w0, w1
-	.loc 2 1406 0
 	and	w0, w0, 1
 	ret
-	.cfi_endproc
-.LFE273:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
 	.align	2
 	.global	ftl_sb_update_avl_pages
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
-.LFB279:
-	.loc 2 1657 0
-	.cfi_startproc
-.LVL236:
-	.loc 2 1657 0
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	.loc 2 1660 0
 	adrp	x1, .LANCHOR3
-.LVL237:
 	add	x4, x4, 16
-	.loc 2 1659 0
 	strh	wzr, [x0, 4]
-.LVL238:
 	add	x4, x0, x4
-	.loc 2 1660 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
-	.loc 2 1662 0
 	mov	w1, 65535
-.LVL239:
 .L160:
-	.loc 2 1660 0 discriminator 1
 	cmp	w2, w3
 	bcc	.L162
-	.loc 2 1671 0
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-.LVL240:
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	add	x3, x0, x3
-	.loc 2 1669 0
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-	.loc 2 1671 0
 	sub	w1, w1, w6
 .L163:
-	.loc 2 1667 0 discriminator 1
 	cmp	x2, x3
 	bne	.L165
-	.loc 2 1674 0
 	ret
-.LVL241:
 .L162:
-	.loc 2 1662 0
 	ldrh	w5, [x4]
 	cmp	w5, w1
 	beq	.L161
-	.loc 2 1664 0
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
 .L161:
-	.loc 2 1660 0 discriminator 2
 	add	w2, w2, 1
-.LVL242:
 	add	x4, x4, 2
 	and	w2, w2, 65535
-.LVL243:
 	b	.L160
-.LVL244:
 .L165:
-	.loc 2 1669 0
 	ldrh	w4, [x2]
 	cmp	w4, w5
 	beq	.L164
-	.loc 2 1671 0
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
 .L164:
 	add	x2, x2, 2
 	b	.L163
-	.cfi_endproc
-.LFE279:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
 	.global	FtlSlcSuperblockCheck
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
-.LFB282:
-	.loc 2 2062 0
-	.cfi_startproc
-.LVL245:
-	.loc 2 2065 0
 	ldrh	w1, [x0, 4]
 	cbz	w1, .L166
-	.loc 2 2067 0
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
 	beq	.L166
-.LVL246:
-.LBB215:
-.LBB216:
-	.loc 2 2069 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
-.LVL247:
-	.loc 2 2072 0
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
-	.loc 2 2070 0
 	mov	w2, w1
 .L169:
 	cmp	w3, w2
 	beq	.L171
-.LVL248:
 .L166:
 	ret
-.LVL249:
 .L171:
-	.loc 2 2071 0
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
-	.loc 2 2072 0
 	cmp	w1, w4
 	bne	.L170
-	.loc 2 2073 0
 	ldrh	w1, [x0, 2]
-	.loc 2 2074 0
 	strb	wzr, [x0, 6]
-	.loc 2 2073 0
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
 .L170:
-	.loc 2 2076 0
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL250:
 	b	.L169
-.LBE216:
-.LBE215:
-	.cfi_endproc
-.LFE282:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
 	.global	make_superblock
 	.type	make_superblock, %function
 make_superblock:
-.LFB284:
-	.loc 2 2094 0
-	.cfi_startproc
-.LVL251:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 2097 0
 	ldrh	w1, [x0]
-	.loc 2 2094 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 2094 0
 	mov	x19, x0
-	.loc 2 2097 0
 	adrp	x0, .LANCHOR5
-.LVL252:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
 	bcc	.L173
-	.loc 2 2097 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
 	mov	w2, 2097
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL253:
 .L173:
-	.loc 2 2100 0 is_stmt 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2101 0
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
 	add	x7, x7, :lo12:.LANCHOR13
-	.loc 2 2100 0
 	ldrh	w8, [x0, #:lo12:.LANCHOR3]
 	mov	x5, 0
-	.loc 2 2098 0
 	strh	wzr, [x19, 4]
-	.loc 2 2102 0
 	mov	w10, -1
-	.loc 2 2099 0
 	strb	wzr, [x19, 7]
-.LVL254:
 .L174:
-	.loc 2 2100 0 discriminator 1
 	cmp	w8, w5, uxth
 	bhi	.L176
-	.loc 2 2110 0
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	.loc 2 2111 0
 	mov	w0, 1
 	strb	w0, [x19, 9]
-	.loc 2 2113 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL255:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL256:
 .L176:
-	.cfi_restore_state
-	.loc 2 2101 0
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL257:
 	mov	w4, w0
-.LVL258:
-	.loc 2 2102 0
 	strh	w10, [x6]
-	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL259:
 	cbnz	w0, .L175
-	.loc 2 2104 0
 	strh	w4, [x6]
-	.loc 2 2105 0
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
 .L175:
-.LVL260:
 	add	x5, x5, 1
-.LVL261:
 	add	x6, x6, 2
 	b	.L174
-	.cfi_endproc
-.LFE284:
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
 	.global	update_multiplier_value
 	.type	update_multiplier_value, %function
 update_multiplier_value:
-.LFB293:
-	.loc 2 2454 0
-	.cfi_startproc
-.LVL262:
 	and	w6, w0, 65535
-	.loc 2 2458 0
 	adrp	x0, .LANCHOR3
-.LVL263:
 	mov	x7, 0
-	.loc 2 2459 0
 	adrp	x8, .LANCHOR13
-	.loc 2 2458 0
 	ldrh	w10, [x0, #:lo12:.LANCHOR3]
-	.loc 2 2461 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2456 0
 	mov	w5, 0
-	.loc 2 2459 0
 	add	x8, x8, :lo12:.LANCHOR13
-.LVL264:
-	.loc 2 2461 0
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
-	.loc 2 2458 0
 	cmp	w10, w7, uxth
 	bhi	.L190
-	.loc 2 2463 0
 	cbz	w5, .L188
-	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL265:
 .L189:
-	.loc 2 2465 0
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-.LVL266:
-	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2467 0
 	ret
-.LVL267:
 .L183:
-	.cfi_def_cfa 29, 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	mov	w5, 0
-.LVL268:
 	b	.L182
-.LVL269:
 .L188:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 29
-	.cfi_restore 30
 	mov	w5, 0
 	b	.L189
 .L190:
-	.loc 2 2454 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 .L181:
-	.loc 2 2459 0
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
-.LVL270:
-	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL271:
 	cbnz	w0, .L180
-	.loc 2 2461 0
 	add	w5, w5, w11
-.LVL272:
 	and	w5, w5, 65535
-.LVL273:
 .L180:
 	add	x7, x7, 1
-.LVL274:
-	.loc 2 2458 0 discriminator 2
 	cmp	w10, w7, uxth
 	bhi	.L181
-	.loc 2 2463 0
 	cbz	w5, .L183
-	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL275:
 .L182:
-	.loc 2 2465 0
 	adrp	x0, .LANCHOR40
 	mov	w1, 6
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2467 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE293:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",@progbits
 	.align	2
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-.LFB294:
-	.loc 2 2470 0
-	.cfi_startproc
-.LVL276:
-	.loc 2 2473 0
 	adrp	x0, .LANCHOR47
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
 	cbz	x0, .L193
-	.loc 2 2474 0
 	adrp	x1, .LANCHOR40
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
@@ -2645,49 +1470,29 @@ GetFreeBlockMinEraseCount:
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
-.LVL277:
 	ret
-.LVL278:
 .L193:
-	.loc 2 2471 0
 	mov	w0, 0
-.LVL279:
-	.loc 2 2476 0
 	ret
-	.cfi_endproc
-.LFE294:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",@progbits
 	.align	2
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-.LFB295:
-	.loc 2 2479 0
-	.cfi_startproc
-.LVL280:
-	.loc 2 2484 0
 	adrp	x1, .LANCHOR47
-	.loc 2 2479 0
 	and	w0, w0, 65535
-	.loc 2 2484 0
 	ldr	x1, [x1, #:lo12:.LANCHOR47]
 	cbz	x1, .L201
-	.loc 2 2485 0
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
-	.loc 2 2489 0
 	mov	w5, 6
 	mov	w6, 65535
-	.loc 2 2485 0
 	ldrh	w2, [x2, #:lo12:.LANCHOR48]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
-	.loc 2 2486 0
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-.LVL281:
-	.loc 2 2487 0
 	adrp	x2, .LANCHOR40
 	ldr	x3, [x2, #:lo12:.LANCHOR40]
 	mov	x2, -6148914691236517206
@@ -2695,204 +1500,121 @@ GetFreeBlockMaxEraseCount:
 	sub	x1, x1, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
-	.loc 2 2488 0
 	mov	w2, 0
-	.loc 2 2487 0
 	and	w1, w1, 65535
-.LVL282:
 .L197:
-	.loc 2 2488 0 discriminator 1
 	cmp	w0, w2
 	beq	.L200
-	.loc 2 2489 0
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
 	bne	.L198
 .L200:
-	.loc 2 2493 0
 	adrp	x0, .LANCHOR43
-.LVL283:
 	ubfiz	x1, x1, 1, 16
-.LVL284:
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x1]
-.LVL285:
 	ret
-.LVL286:
 .L198:
-	.loc 2 2488 0 discriminator 2
 	add	w2, w2, 1
-.LVL287:
 	mov	w1, w4
 	and	w2, w2, 65535
-.LVL288:
 	b	.L197
-.LVL289:
 .L201:
-	.loc 2 2480 0
 	mov	w0, 0
-.LVL290:
-	.loc 2 2496 0
 	ret
-	.cfi_endproc
-.LFE295:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.FtlPrintInfo2buf,"ax",@progbits
 	.align	2
 	.global	FtlPrintInfo2buf
 	.type	FtlPrintInfo2buf, %function
 FtlPrintInfo2buf:
-.LFB200:
-	.loc 3 12 0
-	.cfi_startproc
-.LVL291:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 3 16 0
 	adrp	x1, .LC2
 	add	x1, x1, :lo12:.LC2
-	.loc 3 12 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 3 31 0
 	adrp	x19, .LANCHOR37
-	.loc 3 12 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	x21, x0
-.LVL292:
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 3 32 0
 	adrp	x23, .LANCHOR48
-	.loc 3 12 0
 	stp	x25, x26, [sp, 64]
-	.loc 3 39 0
 	adrp	x22, .LANCHOR39
-	.loc 3 12 0
 	str	x27, [sp, 80]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.loc 3 16 0
 	bl	sprintf
-.LVL293:
 	add	x20, x21, x0, sxtw
-.LVL294:
-	.loc 3 17 0
 	adrp	x0, .LANCHOR26
 	adrp	x1, .LC3
 	add	x1, x1, :lo12:.LC3
 	ldr	w2, [x0, #:lo12:.LANCHOR26]
 	mov	x0, x20
-	.loc 3 39 0
 	add	x22, x22, :lo12:.LANCHOR39
-	.loc 3 50 0
 	adrp	x24, .LANCHOR51
-	.loc 3 67 0
 	adrp	x25, .LANCHOR80
-	.loc 3 17 0
 	bl	sprintf
-.LVL295:
 	add	x20, x20, x0, sxtw
-.LVL296:
-	.loc 3 18 0
 	mov	x0, x20
 	adrp	x1, .LC4
 	add	x1, x1, :lo12:.LC4
 	bl	sprintf
-.LVL297:
 	add	x20, x20, x0, sxtw
-.LVL298:
-	.loc 3 19 0
 	adrp	x0, .LANCHOR61
 	adrp	x1, .LC5
 	add	x1, x1, :lo12:.LC5
 	ldr	w2, [x0, #:lo12:.LANCHOR61]
 	mov	x0, x20
 	bl	sprintf
-.LVL299:
 	add	x20, x20, x0, sxtw
-.LVL300:
-	.loc 3 20 0
 	adrp	x0, .LANCHOR59
 	adrp	x1, .LC6
 	add	x1, x1, :lo12:.LC6
 	ldr	w2, [x0, #:lo12:.LANCHOR59]
 	mov	x0, x20
 	bl	sprintf
-.LVL301:
 	add	x20, x20, x0, sxtw
-.LVL302:
-	.loc 3 21 0
 	adrp	x0, .LANCHOR62
 	adrp	x1, .LC7
 	add	x1, x1, :lo12:.LC7
 	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	mov	x0, x20
 	bl	sprintf
-.LVL303:
 	add	x20, x20, x0, sxtw
-.LVL304:
-	.loc 3 22 0
 	adrp	x0, .LANCHOR63
 	adrp	x1, .LC8
 	add	x1, x1, :lo12:.LC8
 	ldr	w2, [x0, #:lo12:.LANCHOR63]
 	mov	x0, x20
 	bl	sprintf
-.LVL305:
 	add	x20, x20, x0, sxtw
-.LVL306:
-	.loc 3 23 0
 	adrp	x0, .LANCHOR64
 	adrp	x1, .LC9
 	add	x1, x1, :lo12:.LC9
 	ldr	w2, [x0, #:lo12:.LANCHOR64]
 	mov	x0, x20
 	bl	sprintf
-.LVL307:
 	add	x20, x20, x0, sxtw
-.LVL308:
-	.loc 3 24 0
 	adrp	x0, .LANCHOR65
 	adrp	x1, .LC10
 	add	x1, x1, :lo12:.LC10
 	ldr	w2, [x0, #:lo12:.LANCHOR65]
 	mov	x0, x20
 	bl	sprintf
-.LVL309:
 	add	x20, x20, x0, sxtw
-.LVL310:
-	.loc 3 25 0
 	adrp	x0, .LANCHOR66
 	adrp	x1, .LC11
 	add	x1, x1, :lo12:.LC11
 	ldr	w2, [x0, #:lo12:.LANCHOR66]
 	mov	x0, x20
 	bl	sprintf
-.LVL311:
 	add	x20, x20, x0, sxtw
-.LVL312:
-	.loc 3 26 0
 	adrp	x0, .LANCHOR67
 	adrp	x1, .LC12
 	add	x1, x1, :lo12:.LC12
 	ldr	w2, [x0, #:lo12:.LANCHOR67]
 	mov	x0, x20
 	bl	sprintf
-.LVL313:
 	add	x20, x20, x0, sxtw
-.LVL314:
-	.loc 3 27 0
 	adrp	x0, .LANCHOR68
 	adrp	x1, .LC13
 	add	x1, x1, :lo12:.LC13
@@ -2900,10 +1622,7 @@ FtlPrintInfo2buf:
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL315:
 	add	x20, x20, x0, sxtw
-.LVL316:
-	.loc 3 28 0
 	adrp	x0, .LANCHOR69
 	adrp	x1, .LC14
 	add	x1, x1, :lo12:.LC14
@@ -2911,573 +1630,375 @@ FtlPrintInfo2buf:
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL317:
 	add	x20, x20, x0, sxtw
-.LVL318:
-	.loc 3 29 0
 	adrp	x0, .LANCHOR70
 	adrp	x1, .LC15
 	add	x1, x1, :lo12:.LC15
 	ldr	w2, [x0, #:lo12:.LANCHOR70]
 	mov	x0, x20
 	bl	sprintf
-.LVL319:
 	add	x20, x20, x0, sxtw
-.LVL320:
-	.loc 3 30 0
 	adrp	x0, .LANCHOR71
 	adrp	x1, .LC16
 	add	x1, x1, :lo12:.LC16
 	ldr	w2, [x0, #:lo12:.LANCHOR71]
 	mov	x0, x20
 	bl	sprintf
-.LVL321:
 	add	x20, x20, x0, sxtw
-.LVL322:
-	.loc 3 31 0
 	add	x0, x19, :lo12:.LANCHOR37
 	adrp	x1, .LC17
 	add	x1, x1, :lo12:.LC17
 	ldrh	w2, [x0, 6]
 	mov	x0, x20
 	bl	sprintf
-.LVL323:
 	add	x20, x20, x0, sxtw
-.LVL324:
-	.loc 3 32 0
 	ldrh	w2, [x23, #:lo12:.LANCHOR48]
 	mov	x0, x20
 	adrp	x1, .LC18
 	add	x1, x1, :lo12:.LC18
 	bl	sprintf
-.LVL325:
 	add	x20, x20, x0, sxtw
-.LVL326:
-	.loc 3 33 0
 	adrp	x0, .LANCHOR72
 	adrp	x1, .LC19
 	add	x1, x1, :lo12:.LC19
 	ldr	w2, [x0, #:lo12:.LANCHOR72]
 	mov	x0, x20
 	bl	sprintf
-.LVL327:
 	add	x20, x20, x0, sxtw
-.LVL328:
-	.loc 3 34 0
 	adrp	x0, .LANCHOR73
 	adrp	x1, .LC20
 	add	x1, x1, :lo12:.LC20
 	ldr	w2, [x0, #:lo12:.LANCHOR73]
 	mov	x0, x20
 	bl	sprintf
-.LVL329:
 	add	x20, x20, x0, sxtw
-.LVL330:
-	.loc 3 35 0
 	adrp	x0, .LANCHOR74
 	adrp	x1, .LC21
 	add	x1, x1, :lo12:.LC21
 	ldr	w2, [x0, #:lo12:.LANCHOR74]
 	mov	x0, x20
 	bl	sprintf
-.LVL331:
 	add	x20, x20, x0, sxtw
-.LVL332:
-	.loc 3 36 0
 	adrp	x0, .LANCHOR75
 	adrp	x1, .LC22
 	add	x1, x1, :lo12:.LC22
 	ldr	w2, [x0, #:lo12:.LANCHOR75]
 	mov	x0, x20
 	bl	sprintf
-.LVL333:
 	add	x20, x20, x0, sxtw
-.LVL334:
-	.loc 3 37 0
 	adrp	x0, .LANCHOR76
 	adrp	x1, .LC23
 	add	x1, x1, :lo12:.LC23
 	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	mov	x0, x20
 	bl	sprintf
-.LVL335:
 	add	x20, x20, x0, sxtw
-.LVL336:
-	.loc 3 38 0
 	adrp	x0, .LANCHOR77
 	adrp	x1, .LC24
 	add	x1, x1, :lo12:.LC24
 	ldr	w2, [x0, #:lo12:.LANCHOR77]
 	mov	x0, x20
 	bl	sprintf
-.LVL337:
 	add	x20, x20, x0, sxtw
-.LVL338:
-	.loc 3 39 0
 	ldrh	w2, [x22, 30]
 	mov	x0, x20
 	adrp	x1, .LC25
 	add	x1, x1, :lo12:.LC25
 	bl	sprintf
-.LVL339:
 	add	x20, x20, x0, sxtw
-.LVL340:
-	.loc 3 40 0
 	ldrh	w2, [x22, 28]
 	mov	x0, x20
 	adrp	x1, .LC26
 	add	x1, x1, :lo12:.LC26
-	.loc 3 55 0
 	adrp	x22, .LANCHOR42
-	.loc 3 40 0
 	bl	sprintf
-.LVL341:
 	add	x20, x20, x0, sxtw
-.LVL342:
-	.loc 3 41 0
 	adrp	x0, .LANCHOR34
 	adrp	x1, .LC27
 	add	x1, x1, :lo12:.LC27
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	mov	x0, x20
 	bl	sprintf
-.LVL343:
 	add	x20, x20, x0, sxtw
-.LVL344:
-	.loc 3 42 0
 	adrp	x0, .LANCHOR31
 	adrp	x1, .LC28
 	add	x1, x1, :lo12:.LC28
 	ldr	w2, [x0, #:lo12:.LANCHOR31]
 	mov	x0, x20
 	bl	sprintf
-.LVL345:
 	add	x20, x20, x0, sxtw
-.LVL346:
-	.loc 3 43 0
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LC29
 	add	x1, x1, :lo12:.LC29
 	ldr	w2, [x0, #:lo12:.LANCHOR2]
 	mov	x0, x20
 	bl	sprintf
-.LVL347:
 	add	x20, x20, x0, sxtw
-.LVL348:
-	.loc 3 44 0
 	adrp	x0, .LANCHOR38+6
 	adrp	x1, .LC30
 	add	x1, x1, :lo12:.LC30
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	mov	x0, x20
 	bl	sprintf
-.LVL349:
 	add	x20, x20, x0, sxtw
-.LVL350:
-	.loc 3 45 0
 	adrp	x0, .LANCHOR5
 	adrp	x1, .LC31
 	add	x1, x1, :lo12:.LC31
 	ldrh	w2, [x0, #:lo12:.LANCHOR5]
 	mov	x0, x20
 	bl	sprintf
-.LVL351:
 	add	x20, x20, x0, sxtw
-.LVL352:
-	.loc 3 46 0
 	adrp	x0, .LANCHOR78
 	adrp	x1, .LC32
 	add	x1, x1, :lo12:.LC32
 	ldrh	w2, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x20
 	bl	sprintf
-.LVL353:
 	add	x20, x20, x0, sxtw
-.LVL354:
-	.loc 3 47 0
 	adrp	x0, .LANCHOR7
 	adrp	x1, .LC33
 	add	x1, x1, :lo12:.LC33
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	mov	x0, x20
 	bl	sprintf
-.LVL355:
 	add	x20, x20, x0, sxtw
-.LVL356:
-	.loc 3 48 0
 	adrp	x0, .LANCHOR79
 	adrp	x1, .LC34
 	add	x1, x1, :lo12:.LC34
 	ldrh	w2, [x0, #:lo12:.LANCHOR79]
 	mov	x0, x20
 	bl	sprintf
-.LVL357:
 	add	x20, x20, x0, sxtw
-.LVL358:
-	.loc 3 49 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR37]
-	.loc 3 50 0
 	add	x19, x24, :lo12:.LANCHOR51
-	.loc 3 49 0
 	mov	x0, x20
 	adrp	x1, .LC35
 	add	x1, x1, :lo12:.LC35
 	bl	sprintf
-.LVL359:
 	add	x20, x20, x0, sxtw
-.LVL360:
-	.loc 3 50 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC36
 	add	x1, x1, :lo12:.LC36
 	bl	sprintf
-.LVL361:
 	add	x20, x20, x0, sxtw
-.LVL362:
-	.loc 3 51 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC37
 	add	x1, x1, :lo12:.LC37
 	bl	sprintf
-.LVL363:
 	add	x20, x20, x0, sxtw
-.LVL364:
-	.loc 3 52 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR51]
 	mov	x0, x20
 	adrp	x1, .LC38
 	add	x1, x1, :lo12:.LC38
 	bl	sprintf
-.LVL365:
 	add	x20, x20, x0, sxtw
-.LVL366:
-	.loc 3 53 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC39
 	add	x1, x1, :lo12:.LC39
 	bl	sprintf
-.LVL367:
 	add	x20, x20, x0, sxtw
-.LVL368:
-	.loc 3 54 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC40
 	add	x1, x1, :lo12:.LC40
 	bl	sprintf
-.LVL369:
 	add	x20, x20, x0, sxtw
-.LVL370:
-	.loc 3 55 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR51]
-	.loc 3 56 0
 	adrp	x24, .LANCHOR52
-	.loc 3 55 0
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	.loc 3 56 0
 	add	x19, x24, :lo12:.LANCHOR52
-	.loc 3 55 0
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC41
 	add	x1, x1, :lo12:.LC41
 	bl	sprintf
-.LVL371:
 	add	x20, x20, x0, sxtw
-.LVL372:
-	.loc 3 56 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC42
 	add	x1, x1, :lo12:.LC42
 	bl	sprintf
-.LVL373:
 	add	x20, x20, x0, sxtw
-.LVL374:
-	.loc 3 57 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC43
 	add	x1, x1, :lo12:.LC43
 	bl	sprintf
-.LVL375:
 	add	x20, x20, x0, sxtw
-.LVL376:
-	.loc 3 58 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR52]
 	mov	x0, x20
 	adrp	x1, .LC44
 	add	x1, x1, :lo12:.LC44
 	bl	sprintf
-.LVL377:
 	add	x20, x20, x0, sxtw
-.LVL378:
-	.loc 3 59 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC45
 	add	x1, x1, :lo12:.LC45
 	bl	sprintf
-.LVL379:
 	add	x20, x20, x0, sxtw
-.LVL380:
-	.loc 3 60 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC46
 	add	x1, x1, :lo12:.LC46
 	bl	sprintf
-.LVL381:
 	add	x20, x20, x0, sxtw
-.LVL382:
-	.loc 3 61 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR52]
-	.loc 3 62 0
 	adrp	x24, .LANCHOR53
-	.loc 3 61 0
 	ldr	x0, [x22, #:lo12:.LANCHOR42]
-	.loc 3 62 0
 	add	x19, x24, :lo12:.LANCHOR53
-	.loc 3 61 0
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	x0, x20
 	adrp	x1, .LC47
 	add	x1, x1, :lo12:.LC47
 	bl	sprintf
-.LVL383:
 	add	x20, x20, x0, sxtw
-.LVL384:
-	.loc 3 62 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC48
 	add	x1, x1, :lo12:.LC48
 	bl	sprintf
-.LVL385:
 	add	x20, x20, x0, sxtw
-.LVL386:
-	.loc 3 63 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC49
 	add	x1, x1, :lo12:.LC49
 	bl	sprintf
-.LVL387:
 	add	x20, x20, x0, sxtw
-.LVL388:
-	.loc 3 64 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR53]
 	mov	x0, x20
 	adrp	x1, .LC50
 	add	x1, x1, :lo12:.LC50
-	.loc 3 72 0
 	adrp	x24, .LANCHOR81
 	add	x24, x24, :lo12:.LANCHOR81
-	.loc 3 64 0
 	bl	sprintf
-.LVL389:
 	add	x20, x20, x0, sxtw
-.LVL390:
-	.loc 3 65 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC51
 	add	x1, x1, :lo12:.LC51
 	bl	sprintf
-.LVL391:
 	add	x20, x20, x0, sxtw
-.LVL392:
-	.loc 3 66 0
 	ldrh	w2, [x19, 4]
-	.loc 3 67 0
 	add	x19, x25, :lo12:.LANCHOR80
-	.loc 3 66 0
 	mov	x0, x20
 	adrp	x1, .LC52
 	add	x1, x1, :lo12:.LC52
 	bl	sprintf
-.LVL393:
 	add	x20, x20, x0, sxtw
-.LVL394:
-	.loc 3 67 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC53
 	add	x1, x1, :lo12:.LC53
 	bl	sprintf
-.LVL395:
 	add	x20, x20, x0, sxtw
-.LVL396:
-	.loc 3 68 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC54
 	add	x1, x1, :lo12:.LC54
 	bl	sprintf
-.LVL397:
 	add	x20, x20, x0, sxtw
-.LVL398:
-	.loc 3 69 0
 	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mov	x0, x20
 	adrp	x1, .LC55
 	add	x1, x1, :lo12:.LC55
 	bl	sprintf
-.LVL399:
 	add	x20, x20, x0, sxtw
-.LVL400:
-	.loc 3 70 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC56
 	add	x1, x1, :lo12:.LC56
 	bl	sprintf
-.LVL401:
 	add	x20, x20, x0, sxtw
-.LVL402:
-	.loc 3 71 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC57
 	add	x1, x1, :lo12:.LC57
 	bl	sprintf
-.LVL403:
 	add	x20, x20, x0, sxtw
-.LVL404:
-	.loc 3 72 0
 	ldp	w4, w2, [x24, 76]
 	adrp	x1, .LC58
 	ldr	w3, [x24, 84]
 	add	x1, x1, :lo12:.LC58
 	mov	x0, x20
 	bl	sprintf
-.LVL405:
 	add	x19, x20, x0, sxtw
-.LVL406:
-	.loc 3 73 0
 	ldr	w2, [x24, 72]
 	mov	x0, x19
 	adrp	x1, .LC59
 	add	x1, x1, :lo12:.LC59
 	bl	sprintf
-.LVL407:
 	add	x19, x19, x0, sxtw
-.LVL408:
-	.loc 3 74 0
 	ldr	w2, [x24, 96]
 	mov	x0, x19
 	adrp	x1, .LC60
 	add	x1, x1, :lo12:.LC60
 	bl	sprintf
-.LVL409:
 	add	x19, x19, x0, sxtw
-.LVL410:
-	.loc 3 75 0
 	adrp	x0, .LANCHOR82
 	adrp	x1, .LC61
 	add	x1, x1, :lo12:.LC61
 	ldrh	w2, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
 	bl	sprintf
-.LVL411:
 	add	x19, x19, x0, sxtw
-.LVL412:
-	.loc 3 76 0
 	adrp	x0, .LANCHOR83
 	adrp	x1, .LC62
 	add	x1, x1, :lo12:.LC62
 	ldrh	w2, [x0, #:lo12:.LANCHOR83]
 	mov	x0, x19
 	bl	sprintf
-.LVL413:
 	add	x19, x19, x0, sxtw
-.LVL414:
-	.loc 3 77 0
 	adrp	x0, .LANCHOR84
 	adrp	x1, .LC63
 	add	x1, x1, :lo12:.LC63
 	ldr	w2, [x0, #:lo12:.LANCHOR84]
 	mov	x0, x19
 	bl	sprintf
-.LVL415:
 	add	x19, x19, x0, sxtw
-.LVL416:
-	.loc 3 78 0
 	adrp	x0, .LANCHOR85
 	adrp	x1, .LC64
 	add	x1, x1, :lo12:.LC64
 	ldrh	w2, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	sprintf
-.LVL417:
 	add	x19, x19, x0, sxtw
-.LVL418:
-	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL419:
 	and	w2, w0, 65535
 	adrp	x1, .LC65
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC65
 	bl	sprintf
-.LVL420:
 	add	x19, x19, x0, sxtw
-.LVL421:
-	.loc 3 80 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	bl	GetFreeBlockMaxEraseCount
-.LVL422:
 	and	w2, w0, 65535
 	adrp	x1, .LC66
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC66
 	bl	sprintf
-.LVL423:
 	add	x19, x19, x0, sxtw
-.LVL424:
-	.loc 3 81 0
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
 	beq	.L203
 .L208:
-	.loc 3 104 0
 	sub	w0, w19, w21
-	.loc 3 105 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL425:
 	ldp	x21, x22, [sp, 32]
-.LVL426:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL427:
 .L203:
-	.cfi_restore_state
-	.loc 3 84 0
 	ldrh	w0, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L205
-	.loc 3 85 0
 	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x1, x0]
@@ -3485,36 +2006,20 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC67
 	add	x1, x1, :lo12:.LC67
 	bl	sprintf
-.LVL428:
 	add	x19, x19, x0, sxtw
-.LVL429:
 .L205:
-.LBB217:
-	.loc 3 87 0
 	mov	w0, 0
-	.loc 3 91 0
 	adrp	x24, .LC68
-	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL430:
-	.loc 3 91 0
 	add	x24, x24, :lo12:.LC68
-	.loc 3 87 0
 	and	w3, w0, 65535
-.LVL431:
-	.loc 3 88 0
 	mov	w23, 0
-	.loc 3 89 0
 	mov	w27, 65535
 	adrp	x20, .LANCHOR40
-	.loc 3 91 0
 	mov	w26, 6
-.LVL432:
 .L207:
-	.loc 3 89 0
 	cmp	w3, w27
 	beq	.L206
-	.loc 3 91 0 discriminator 2
 	adrp	x0, .LANCHOR43
 	umull	x25, w3, w26
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
@@ -3528,57 +2033,32 @@ FtlPrintInfo2buf:
 	ldrh	w5, [x0, 4]
 	mov	x1, x24
 	mov	x0, x19
-	.loc 3 88 0 discriminator 2
 	add	w23, w23, 1
-.LVL433:
-	.loc 3 91 0 discriminator 2
 	bl	sprintf
-.LVL434:
 	add	x19, x19, x0, sxtw
-.LVL435:
-	.loc 3 92 0 discriminator 2
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	.loc 3 88 0 discriminator 2
 	cmp	w23, 16
-	.loc 3 92 0 discriminator 2
 	ldrh	w3, [x0, x25]
-.LVL436:
-	.loc 3 88 0 discriminator 2
 	bne	.L207
 .L206:
-.LBE217:
-.LBB218:
-	.loc 3 96 0
 	adrp	x0, .LANCHOR47
-	.loc 3 100 0
 	adrp	x23, .LC69
-.LVL437:
 	add	x23, x23, :lo12:.LC69
-	.loc 3 97 0
 	mov	w22, 0
-	.loc 3 96 0
 	ldr	x3, [x0, #:lo12:.LANCHOR47]
-.LVL438:
-	.loc 3 98 0
 	mov	w25, 65535
-	.loc 3 96 0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
-	.loc 3 100 0
 	mov	w26, 6
 	adrp	x27, .LANCHOR43
-	.loc 3 96 0
 	sub	x3, x3, x0
 	mov	x0, -6148914691236517206
 	asr	x3, x3, 1
 	movk	x0, 0xaaab, lsl 0
 	mul	x3, x3, x0
 	and	w3, w3, 65535
-.LVL439:
 .L209:
-	.loc 3 98 0
 	cmp	w3, w25
 	beq	.L208
-	.loc 3 100 0 discriminator 2
 	umull	x24, w3, w26
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldr	x2, [x27, #:lo12:.LANCHOR43]
@@ -3589,137 +2069,70 @@ FtlPrintInfo2buf:
 	ldrh	w4, [x0, 4]
 	mov	x1, x23
 	mov	x0, x19
-	.loc 3 97 0 discriminator 2
 	add	w22, w22, 1
-.LVL440:
-	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL441:
 	add	x19, x19, x0, sxtw
-.LVL442:
-	.loc 3 97 0 discriminator 2
 	cmp	w22, 4
 	beq	.L208
-	.loc 3 101 0
 	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldrh	w3, [x0, x24]
 	b	.L209
-.LBE218:
-	.cfi_endproc
-.LFE200:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
 	.section	.text.rknand_proc_ftlread,"ax",@progbits
 	.align	2
 	.global	rknand_proc_ftlread
 	.type	rknand_proc_ftlread, %function
 rknand_proc_ftlread:
-.LFB201:
-	.loc 3 114 0
-	.cfi_startproc
-.LVL443:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 120 0
 	adrp	x2, .LC70
 	adrp	x1, .LC71
 	add	x2, x2, :lo12:.LC70
-	.loc 3 114 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 120 0
 	add	x1, x1, :lo12:.LC71
-	.loc 3 114 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 3 114 0
 	mov	x20, x0
-.LVL444:
-	.loc 3 120 0
 	bl	sprintf
-.LVL445:
 	add	x19, x20, x0, sxtw
-.LVL446:
-	.loc 3 122 0
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
-.LVL447:
 	add	x0, x19, x0, sxtw
-.LVL448:
-	.loc 3 124 0
 	sub	w0, w0, w20
-.LVL449:
 	ldp	x19, x20, [sp, 16]
-.LVL450:
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE201:
 	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
 	.section	.text.GetSwlReplaceBlock,"ax",@progbits
 	.align	2
 	.global	GetSwlReplaceBlock
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
-.LFB296:
-	.loc 2 2500 0
-	.cfi_startproc
-.LVL451:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2510 0
 	adrp	x2, .LANCHOR74
 	adrp	x8, .LANCHOR77
-	.loc 2 2500 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 2510 0
 	ldr	w3, [x2, #:lo12:.LANCHOR74]
 	ldr	w7, [x8, #:lo12:.LANCHOR77]
 	cmp	w3, w7
 	bcs	.L218
-	.loc 2 2513 0
 	adrp	x1, .LANCHOR5
-	.loc 2 2512 0
 	adrp	x0, .LANCHOR72
-	.loc 2 2513 0
 	mov	w5, 0
 	mov	w4, 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR5]
-	.loc 2 2514 0
 	adrp	x1, .LANCHOR43
-	.loc 2 2512 0
 	str	wzr, [x0, #:lo12:.LANCHOR72]
-.LVL452:
-	.loc 2 2514 0
 	ldr	x6, [x1, #:lo12:.LANCHOR43]
-	.loc 2 2513 0
 	mov	x1, 0
-.LVL453:
 .L219:
-	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	w3, w1
 	bhi	.L220
 	cbz	w5, .L221
 	str	w4, [x0, #:lo12:.LANCHOR72]
 .L221:
-	.loc 2 2515 0 is_stmt 1
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
-.LVL454:
 	udiv	w3, w1, w3
 	str	w3, [x2, #:lo12:.LANCHOR74]
-	.loc 2 2516 0
 	adrp	x3, .LANCHOR73
 	ldr	w3, [x3, #:lo12:.LANCHOR73]
 	sub	w1, w1, w3
@@ -3728,169 +2141,108 @@ GetSwlReplaceBlock:
 	udiv	w1, w1, w3
 	str	w1, [x0, #:lo12:.LANCHOR72]
 .L222:
-	.loc 2 2522 0
 	ldr	w10, [x2, #:lo12:.LANCHOR74]
 	add	w0, w7, 256
 	cmp	w0, w10
 	bls	.L227
-	.loc 2 2522 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR76
 	add	w0, w7, 768
 	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	cmp	w0, w1
 	bls	.L227
-.LVL455:
 .L229:
-	.loc 2 2523 0 is_stmt 1
 	mov	w19, 65535
 .L228:
-	.loc 2 2569 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-.LVL456:
 .L220:
-	.cfi_restore_state
-	.loc 2 2514 0 discriminator 3
 	ldrh	w5, [x6, x1, lsl 1]
 	add	x1, x1, 1
-.LVL457:
 	add	w4, w4, w5
 	mov	w5, 1
 	b	.L219
 .L218:
-	.loc 2 2517 0
 	adrp	x1, .LANCHOR76
 	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	cmp	w3, w0
 	bls	.L222
-	.loc 2 2518 0
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
-.LVL458:
-	.loc 2 2520 0
 	adrp	x0, .LANCHOR43
-	.loc 2 2519 0
 	adrp	x1, .LANCHOR5
 	add	x1, x1, :lo12:.LANCHOR5
-	.loc 2 2520 0
 	ldr	x4, [x0, #:lo12:.LANCHOR43]
-	.loc 2 2519 0
 	mov	w0, 0
-.LVL459:
 .L224:
-	.loc 2 2519 0 is_stmt 0 discriminator 1
 	ldrh	w3, [x1]
 	cmp	w0, w3
 	bcs	.L222
-	.loc 2 2520 0 is_stmt 1 discriminator 3
 	ubfiz	x5, x0, 1, 32
-	.loc 2 2519 0 discriminator 3
 	add	w0, w0, 1
-.LVL460:
-	.loc 2 2520 0 discriminator 3
 	ldrh	w3, [x4, x5]
 	add	w3, w3, 1
 	strh	w3, [x4, x5]
 	b	.L224
-.LVL461:
 .L227:
-	.loc 2 2525 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w0, lsl 1
 	lsr	w0, w0, 2
 	bl	GetFreeBlockMaxEraseCount
-.LVL462:
 	and	w6, w0, 65535
-.LVL463:
-	.loc 2 2526 0
 	add	w0, w7, 64
-.LVL464:
 	cmp	w6, w0
 	bcc	.L229
-	.loc 2 2529 0
 	adrp	x0, .LANCHOR41
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	cbz	x0, .L229
-	.loc 2 2533 0
 	adrp	x1, .LANCHOR5
-	.loc 2 2537 0
 	mov	w3, 65535
-	.loc 2 2536 0
 	mov	x14, -6148914691236517206
-	.loc 2 2537 0
 	mov	w2, w3
-	.loc 2 2533 0
 	ldrh	w13, [x1, #:lo12:.LANCHOR5]
-	.loc 2 2536 0
 	adrp	x1, .LANCHOR40
-	.loc 2 2531 0
 	mov	w12, w3
-	.loc 2 2536 0
 	movk	x14, 0xaaab, lsl 0
 	ldr	x11, [x1, #:lo12:.LANCHOR40]
-	.loc 2 2537 0
 	adrp	x1, .LANCHOR43
-	.loc 2 2546 0
 	mov	w15, 6
-	.loc 2 2537 0
 	ldr	x4, [x1, #:lo12:.LANCHOR43]
 	mov	w1, 0
-.LVL465:
 .L230:
-	.loc 2 2531 0
 	ldrh	w5, [x0]
 	cmp	w5, w12
 	bne	.L233
 	mov	w19, w2
-.LVL466:
 .L232:
-	.loc 2 2549 0
 	mov	w0, 65535
 	cmp	w19, w0
 	beq	.L229
-	.loc 2 2551 0
 	ubfiz	x2, x19, 1, 32
 	ldrh	w5, [x4, x2]
-.LVL467:
-	.loc 2 2552 0
 	cmp	w7, w5
 	bcs	.L234
-	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL468:
 	cmp	w7, w0, uxth
 	bcs	.L234
-	.loc 2 2555 0
 	str	w3, [x8, #:lo12:.LANCHOR77]
 .L234:
-	.loc 2 2557 0
 	cmp	w10, w5
 	bls	.L229
-	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	w0, w5, 128
 	cmp	w6, w0
 	ble	.L229
-	.loc 2 2559 0 is_stmt 1
 	add	w0, w5, 256
 	adrp	x1, .LANCHOR76
 	cmp	w10, w0
 	bhi	.L235
-	.loc 2 2559 0 is_stmt 0 discriminator 1
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
-.LVL469:
 	add	w0, w5, 768
 	cmp	w0, w3
 	bcs	.L229
 .L235:
-	.loc 2 2561 0 is_stmt 1
 	adrp	x0, .LANCHOR42
 	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	mov	w1, w19
@@ -3900,1210 +2252,659 @@ GetSwlReplaceBlock:
 	adrp	x0, .LC72
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.LVL470:
-	.loc 2 2562 0
 	adrp	x0, .LANCHOR87
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR87]
-	.loc 2 2563 0
 	b	.L228
-.LVL471:
 .L233:
-	.loc 2 2532 0
 	add	w1, w1, 1
-.LVL472:
 	and	w1, w1, 65535
-.LVL473:
-	.loc 2 2533 0
 	cmp	w1, w13
 	bhi	.L229
-	.loc 2 2535 0
 	ldrh	w16, [x0, 4]
 	cbz	w16, .L231
-	.loc 2 2536 0
 	sub	x0, x0, x11
-.LVL474:
 	asr	x0, x0, 1
 	mul	x0, x0, x14
 	and	w19, w0, 65535
-.LVL475:
-	.loc 2 2537 0
 	and	x0, x0, 65535
 	ldrh	w0, [x4, x0, lsl 1]
 	cmp	w7, w0
 	bcs	.L232
-	.loc 2 2541 0
 	cmp	w3, w0
 	bls	.L231
 	mov	w3, w0
-.LVL476:
-	.loc 2 2536 0
 	mov	w2, w19
-.LVL477:
 .L231:
-	.loc 2 2546 0
 	umaddl	x0, w5, w15, x11
-.LVL478:
 	b	.L230
-	.cfi_endproc
-.LFE296:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
 	.section	.text.free_data_superblock,"ax",@progbits
 	.align	2
 	.global	free_data_superblock
 	.type	free_data_superblock, %function
 free_data_superblock:
-.LFB297:
-	.loc 2 2573 0
-	.cfi_startproc
-.LVL479:
 	and	w0, w0, 65535
-	.loc 2 2574 0
 	mov	w1, 65535
 	cmp	w0, w1
 	beq	.L249
-.LVL480:
-	.loc 2 2573 0
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-.LBB221:
-.LBB222:
-	.loc 2 2576 0
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
-.LBE222:
-.LBE221:
-	.loc 2 2573 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-.LBB224:
-.LBB223:
-	.loc 2 2576 0
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	strh	wzr, [x2, x1]
-	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL481:
-.LBE223:
-.LBE224:
-	.loc 2 2579 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL482:
 .L249:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE297:
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.get_new_active_ppa,"ax",@progbits
 	.align	2
 	.global	get_new_active_ppa
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
-.LFB300:
-	.loc 2 2706 0
-	.cfi_startproc
-.LVL483:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 2710 0
 	ldrh	w1, [x0]
 	mov	w0, 65535
-.LVL484:
-	.loc 2 2706 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2710 0
 	cmp	w1, w0
 	bne	.L253
-	.loc 2 2710 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2710
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL485:
 .L253:
-	.loc 2 2711 0 is_stmt 1
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
 	bne	.L254
-	.loc 2 2711 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2711
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL486:
 .L254:
-	.loc 2 2712 0 is_stmt 1
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L255
-	.loc 2 2712 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2712
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL487:
 .L255:
-	.loc 2 2714 0 is_stmt 1
 	ldrb	w0, [x19, 6]
-	.loc 2 2717 0
 	adrp	x1, .LANCHOR3
-	.loc 2 2713 0
 	strb	wzr, [x19, 10]
-	.loc 2 2714 0
 	add	x0, x0, 8
-	.loc 2 2717 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
-	.loc 2 2715 0
 	mov	w1, 65535
-	.loc 2 2714 0
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL488:
 .L256:
-	.loc 2 2715 0
 	cmp	w0, w1
 	beq	.L258
-	.loc 2 2723 0
 	ldrh	w21, [x19, 2]
-	.loc 2 2731 0
 	mov	w3, 65535
-	.loc 2 2724 0
 	ldrh	w1, [x19, 4]
-	.loc 2 2723 0
 	orr	w21, w21, w0, lsl 10
-.LVL489:
 	ldrb	w0, [x19, 6]
-.LVL490:
-	.loc 2 2724 0
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
 .L260:
-	.loc 2 2726 0
 	add	w0, w0, 1
 	and	w0, w0, 255
-	.loc 2 2727 0
 	cmp	w2, w0
 	bne	.L259
-	.loc 2 2728 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 2729 0
 	mov	w0, 0
 .L259:
-	.loc 2 2731 0
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
 	beq	.L260
 	strb	w0, [x19, 6]
-	.loc 2 2733 0
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
 	bne	.L252
-	.loc 2 2733 0 is_stmt 0 discriminator 1
 	cbz	w1, .L252
-	.loc 2 2733 0 discriminator 2
 	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
 	mov	w2, 2733
 	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL491:
 .L252:
-	.loc 2 2735 0 is_stmt 1
 	mov	w0, w21
 	ldr	x21, [sp, 32]
-.LVL492:
 	ldp	x19, x20, [sp, 16]
-.LVL493:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL494:
 .L258:
-	.cfi_restore_state
-	.loc 2 2716 0
 	ldrb	w0, [x19, 6]
-.LVL495:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	.loc 2 2717 0
 	cmp	w0, w2
 	bne	.L257
-	.loc 2 2718 0
 	ldrh	w0, [x19, 2]
-	.loc 2 2719 0
 	strb	wzr, [x19, 6]
-	.loc 2 2718 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 .L257:
-	.loc 2 2721 0
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL496:
 	b	.L256
-	.cfi_endproc
-.LFE300:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlGcBufInit,"ax",@progbits
 	.align	2
 	.global	FtlGcBufInit
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-.LFB303:
-	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
-	.loc 5 22 0
-	.cfi_startproc
-	.loc 5 27 0
 	adrp	x1, .LANCHOR90
-	.loc 5 25 0
 	adrp	x0, .LANCHOR89
-	.loc 5 28 0
 	adrp	x7, .LANCHOR91
-	.loc 5 29 0
 	adrp	x6, .LANCHOR92
-	.loc 5 27 0
 	ldr	x5, [x1, #:lo12:.LANCHOR90]
-	.loc 5 28 0
 	adrp	x1, .LANCHOR23
-	.loc 5 25 0
 	str	wzr, [x0, #:lo12:.LANCHOR89]
-.LVL497:
-	.loc 5 26 0
 	adrp	x0, .LANCHOR3
-	.loc 5 28 0
 	ldrh	w10, [x1, #:lo12:.LANCHOR23]
-	.loc 5 29 0
 	adrp	x1, .LANCHOR24
-	.loc 5 26 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	w8, 24
-	.loc 5 29 0
 	ldrh	w11, [x1, #:lo12:.LANCHOR24]
-	.loc 5 30 0
 	adrp	x1, .LANCHOR93
-	.loc 5 28 0
 	ldr	x14, [x7, #:lo12:.LANCHOR91]
 	mov	x3, x5
 	ldr	x4, [x1, #:lo12:.LANCHOR93]
-	.loc 5 26 0
 	mov	w2, 0
-	.loc 5 29 0
 	ldr	x15, [x6, #:lo12:.LANCHOR92]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
-	.loc 5 26 0
 	mov	w1, 0
-	.loc 5 27 0
 	mov	w16, 1
-.LVL498:
 .L268:
 	add	w13, w2, w10
 	add	w12, w1, w11
-	.loc 5 26 0 discriminator 1
 	cmp	x3, x8
 	bne	.L269
-	.loc 5 34 0
 	adrp	x1, .LANCHOR94
-	.loc 5 36 0
 	ldr	x7, [x7, #:lo12:.LANCHOR91]
-	.loc 5 37 0
 	ldr	x6, [x6, #:lo12:.LANCHOR92]
-	.loc 5 35 0
 	mov	w8, 24
-	.loc 5 34 0
 	ldr	w4, [x1, #:lo12:.LANCHOR94]
 .L270:
-.LVL499:
-	.loc 5 34 0 is_stmt 0 discriminator 1
 	cmp	w0, w4
 	bcc	.L271
-	.loc 5 39 0 is_stmt 1
 	ret
-.LVL500:
 .L269:
-	.loc 5 28 0 discriminator 3
 	asr	w2, w2, 2
-	.loc 5 29 0 discriminator 3
 	asr	w1, w1, 2
-	.loc 5 28 0 discriminator 3
 	add	x2, x14, x2, sxtw 2
-	.loc 5 29 0 discriminator 3
 	add	x1, x15, x1, sxtw 2
-	.loc 5 27 0 discriminator 3
 	str	w16, [x3, 16]
-	.loc 5 29 0 discriminator 3
 	stp	x2, x1, [x3]
 	add	x3, x3, 24
-	.loc 5 31 0 discriminator 3
 	stp	x2, x1, [x4]
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
 	b	.L268
-.LVL501:
 .L271:
-	.loc 5 35 0 discriminator 3
 	umull	x3, w0, w8
-	.loc 5 36 0 discriminator 3
 	mul	w1, w10, w0
-	.loc 5 35 0 discriminator 3
 	add	x2, x5, x3
-	.loc 5 36 0 discriminator 3
 	asr	w1, w1, 2
 	add	x1, x7, x1, sxtw 2
-	.loc 5 35 0 discriminator 3
 	str	wzr, [x2, 16]
-	.loc 5 36 0 discriminator 3
 	str	x1, [x5, x3]
-	.loc 5 37 0 discriminator 3
 	mul	w1, w11, w0
-	.loc 5 34 0 discriminator 3
 	add	w0, w0, 1
-.LVL502:
 	and	w0, w0, 65535
-.LVL503:
-	.loc 5 37 0 discriminator 3
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
 	b	.L270
-	.cfi_endproc
-.LFE303:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
 	.global	FtlGcBufFree
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
-.LFB304:
-	.loc 5 42 0
-	.cfi_startproc
-.LVL504:
-	.loc 5 47 0
 	adrp	x2, .LANCHOR94
-	.loc 5 46 0
 	mov	w3, 0
-	.loc 5 48 0
 	mov	w8, 24
-	.loc 5 47 0
 	ldr	w7, [x2, #:lo12:.LANCHOR94]
-	.loc 5 48 0
 	adrp	x2, .LANCHOR90
 	ldr	x5, [x2, #:lo12:.LANCHOR90]
-.LVL505:
 .L273:
-	.loc 5 46 0 discriminator 1
 	cmp	w3, w1
 	bcs	.L272
-	.loc 5 48 0
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
 	b	.L278
-.LVL506:
 .L274:
-	.loc 5 47 0 discriminator 2
 	add	w2, w2, 1
-.LVL507:
 	and	w2, w2, 65535
-.LVL508:
 .L278:
-	.loc 5 47 0 is_stmt 0 discriminator 1
 	cmp	w2, w7
 	bcs	.L275
-	.loc 5 48 0 is_stmt 1
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
 	bne	.L274
-	.loc 5 49 0
 	str	wzr, [x10, 16]
 .L275:
-	.loc 5 46 0 discriminator 2
 	add	w3, w3, 1
-.LVL509:
 	and	w3, w3, 65535
-.LVL510:
 	b	.L273
-.LVL511:
 .L272:
 	ret
-	.cfi_endproc
-.LFE304:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
 	.align	2
 	.global	FtlGcBufAlloc
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
-.LFB305:
-	.loc 5 57 0
-	.cfi_startproc
-.LVL512:
-	.loc 5 62 0
 	adrp	x2, .LANCHOR94
-	.loc 5 61 0
 	mov	w3, 0
-	.loc 5 63 0
 	mov	w7, 24
-	.loc 5 64 0
 	mov	w8, 1
-	.loc 5 62 0
 	ldr	w5, [x2, #:lo12:.LANCHOR94]
-	.loc 5 63 0
 	adrp	x2, .LANCHOR90
 	ldr	x6, [x2, #:lo12:.LANCHOR90]
-.LVL513:
 .L280:
-	.loc 5 61 0 discriminator 1
 	cmp	w3, w1
 	bcs	.L279
 	mov	w2, 0
 	b	.L285
-.LVL514:
 .L281:
-	.loc 5 62 0 discriminator 2
 	add	w2, w2, 1
-.LVL515:
 	and	w2, w2, 65535
-.LVL516:
 .L285:
-	.loc 5 62 0 is_stmt 0 discriminator 1
 	cmp	w2, w5
 	bcs	.L282
-	.loc 5 63 0 is_stmt 1
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
 	cbnz	w10, .L281
-	.loc 5 65 0
 	ubfiz	x2, x3, 5, 16
-.LVL517:
 	ldr	x10, [x4]
 	add	x2, x0, x2
-	.loc 5 64 0
 	str	w8, [x4, 16]
-	.loc 5 66 0
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
 .L282:
-	.loc 5 61 0 discriminator 2
 	add	w3, w3, 1
-.LVL518:
 	and	w3, w3, 65535
-.LVL519:
 	b	.L280
 .L279:
 	ret
-	.cfi_endproc
-.LFE305:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
 	.align	2
 	.global	IsBlkInGcList
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
-.LFB306:
-	.loc 5 74 0
-	.cfi_startproc
-.LVL520:
-	.loc 5 77 0
 	adrp	x1, .LANCHOR95
-	.loc 5 74 0
 	and	w0, w0, 65535
-	.loc 5 77 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR95]
-	.loc 5 78 0
 	adrp	x1, .LANCHOR96
 	ldr	x3, [x1, #:lo12:.LANCHOR96]
-	.loc 5 77 0
 	mov	x1, 0
-.LVL521:
 .L287:
-	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	w2, w1, uxth
 	bhi	.L289
-	.loc 5 81 0 is_stmt 1
 	mov	w0, 0
-.LVL522:
 	ret
 .L289:
 	add	x1, x1, 1
-.LVL523:
-	.loc 5 78 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
 	bne	.L287
-	.loc 5 79 0
 	mov	w0, 1
-	.loc 5 82 0
 	ret
-	.cfi_endproc
-.LFE306:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",@progbits
 	.align	2
 	.global	FtlGcUpdatePage
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
-.LFB307:
-	.loc 5 85 0
-	.cfi_startproc
-.LVL524:
 	mov	w6, w0
 	mov	w10, w1
 	mov	w8, w2
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 5 88 0
 	lsr	w0, w0, 10
-.LVL525:
-	.loc 5 85 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL526:
 	and	w7, w0, 65535
-.LVL527:
-	.loc 5 91 0
 	adrp	x4, .LANCHOR95
-	.loc 5 92 0
 	adrp	x2, .LANCHOR96
-	.loc 5 91 0
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR95]
-	.loc 5 92 0
 	ldr	x5, [x2, #:lo12:.LANCHOR96]
-.LVL528:
 .L292:
 	and	w2, w3, 65535
-.LVL529:
-	.loc 5 91 0 discriminator 1
 	cmp	w2, w1
 	bcc	.L294
-	.loc 5 96 0
 	bne	.L293
-	.loc 5 97 0
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
-	.loc 5 98 0
 	ldrh	w0, [x4, #:lo12:.LANCHOR95]
-.LVL530:
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR95]
-.LVL531:
 	b	.L293
-.LVL532:
 .L294:
 	add	x3, x3, 1
-	.loc 5 92 0
 	add	x2, x5, x3, lsl 1
-.LVL533:
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
 	bne	.L292
-.LVL534:
 .L293:
-	.loc 5 101 0
 	adrp	x4, .LANCHOR97
 	adrp	x1, .LANCHOR98
 	mov	w3, 12
 	ldrh	w0, [x4, #:lo12:.LANCHOR97]
 	ldr	x5, [x1, #:lo12:.LANCHOR98]
 	umull	x3, w0, w3
-	.loc 5 107 0
 	add	w0, w0, 1
-	.loc 5 101 0
 	add	x7, x5, x3
-.LVL535:
-	.loc 5 102 0
 	stp	w10, w8, [x7, 4]
-	.loc 5 103 0
 	str	w6, [x5, x3]
-	.loc 5 107 0
 	strh	w0, [x4, #:lo12:.LANCHOR97]
-	.loc 5 108 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE307:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcRefreshBlock
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
-.LFB314:
-	.loc 5 345 0
-	.cfi_startproc
-.LVL536:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 345 0
 	and	w19, w0, 65535
-	.loc 5 347 0
 	mov	w1, w19
 	adrp	x0, .LC73
-.LVL537:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.LVL538:
-	.loc 5 349 0
 	adrp	x3, .LANCHOR99
 	ldrh	w4, [x3, #:lo12:.LANCHOR99]
 	cmp	w19, w4
 	beq	.L297
-	.loc 5 349 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR100
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w19, w2
 	beq	.L297
-	.loc 5 351 0 is_stmt 1
 	mov	w1, 65535
 	cmp	w4, w1
 	bne	.L298
-	.loc 5 352 0
 	strh	w19, [x3, #:lo12:.LANCHOR99]
 .L297:
-	.loc 5 356 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL539:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
 .L298:
-	.cfi_restore_state
-	.loc 5 353 0
 	cmp	w2, w1
 	bne	.L297
-	.loc 5 354 0
 	strh	w19, [x0, #:lo12:.LANCHOR100]
 	b	.L297
-	.cfi_endproc
-.LFE314:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcMarkBadPhyBlk
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
-.LFB315:
-	.loc 5 359 0
-	.cfi_startproc
-.LVL540:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w20, w0, 65535
-	.loc 5 364 0
 	adrp	x19, .LANCHOR101
-	.loc 5 359 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 5 361 0
 	mov	w0, w20
-.LVL541:
 	bl	P2V_block_in_plane
-.LVL542:
-	.loc 5 364 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR101]
 	mov	w2, w20
-	.loc 5 361 0
 	mov	w21, w0
-.LVL543:
-	.loc 5 364 0
 	adrp	x0, .LC74
-.LVL544:
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-.LVL545:
-	.loc 5 366 0
 	mov	w0, w21
 	bl	FtlGcRefreshBlock
-.LVL546:
-	.loc 5 368 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR101]
-	.loc 5 369 0
 	adrp	x2, .LANCHOR102
 	add	x2, x2, :lo12:.LANCHOR102
-	.loc 5 368 0
 	mov	x1, 0
-.LVL547:
 .L301:
-	.loc 5 368 0 is_stmt 0 discriminator 1
 	cmp	w0, w1, uxth
 	bhi	.L303
-	.loc 5 372 0 is_stmt 1
 	cmp	w0, 15
 	bhi	.L302
-	.loc 5 373 0
 	add	w1, w0, 1
-.LVL548:
 	strh	w1, [x19, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR102
 	add	x1, x1, :lo12:.LANCHOR102
 	strh	w20, [x1, w0, sxtw 1]
 	b	.L302
-.LVL549:
 .L303:
 	add	x1, x1, 1
-.LVL550:
-	.loc 5 369 0
 	add	x3, x2, x1, lsl 1
 	ldrh	w3, [x3, -2]
 	cmp	w3, w20
 	bne	.L301
 .L302:
-	.loc 5 375 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
-.LVL551:
 	ldp	x19, x20, [sp, 16]
-.LVL552:
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE315:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcReFreshBadBlk
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
-.LFB316:
-	.loc 5 379 0
-	.cfi_startproc
-	.loc 5 380 0
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cbz	w0, .L312
-	.loc 5 380 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR99
 	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 65535
 	cmp	w2, w1
 	bne	.L312
-	.loc 5 379 0 is_stmt 1
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 381 0
 	adrp	x19, .LANCHOR103
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	cmp	w1, w0
 	bcc	.L307
-	.loc 5 382 0
 	strh	wzr, [x19, #:lo12:.LANCHOR103]
 .L307:
-.LBB227:
-.LBB228:
-	.loc 5 383 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR102
 	add	x0, x0, :lo12:.LANCHOR102
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
-.LVL553:
 	bl	FtlGcRefreshBlock
-.LVL554:
-	.loc 5 384 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR103]
 	add	w0, w0, 1
 	strh	w0, [x19, #:lo12:.LANCHOR103]
-.LBE228:
-.LBE227:
-	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
 .L312:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE316:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_free,"ax",@progbits
-	.align	2
-	.global	ftl_free
-	.type	ftl_free, %function
-ftl_free:
-.LFB337:
-	.loc 1 24 0
-	.cfi_startproc
-.LVL555:
-.LBB229:
-.LBB230:
-	.file 6 "include/linux/compat.h"
-	.loc 6 80 0
-	b	free
-.LVL556:
-.LBE230:
-.LBE229:
-	.cfi_endproc
-.LFE337:
-	.size	ftl_free, .-ftl_free
 	.section	.text.ftl_malloc,"ax",@progbits
 	.align	2
 	.global	ftl_malloc
 	.type	ftl_malloc, %function
 ftl_malloc:
-.LFB338:
-	.loc 1 28 0
-	.cfi_startproc
-.LVL557:
-	.loc 1 29 0
 	mov	w1, 0
 	sxtw	x0, w0
 	b	kmalloc
-.LVL558:
-	.cfi_endproc
-.LFE338:
 	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
 	.section	.text.rknand_print_hex,"ax",@progbits
 	.align	2
 	.global	rknand_print_hex
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB339:
-	.loc 1 33 0
-	.cfi_startproc
-.LVL559:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	x22, x1
-.LVL560:
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 1 42 0
 	adrp	x24, .LC75
-	.loc 1 33 0
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 1 49 0
 	adrp	x25, .LC77
-	.loc 1 33 0
 	mov	x28, x0
 	mov	w27, w3
-	.loc 1 42 0
 	add	x24, x24, :lo12:.LC75
-	.loc 1 49 0
 	add	x25, x25, :lo12:.LC77
-	.loc 1 33 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 1 40 0
 	mov	w21, 0
 	mov	x19, 0
-	.loc 1 39 0
 	mov	w20, 0
-	.loc 1 47 0
 	adrp	x26, .LC76
-.LVL561:
 .L318:
-	.loc 1 40 0 discriminator 1
 	cmp	w27, w19
 	bhi	.L324
-	.loc 1 56 0
 	ldp	x19, x20, [sp, 16]
-.LVL562:
-	.loc 1 55 0
 	adrp	x0, .LC78
-	.loc 1 56 0
 	ldp	x21, x22, [sp, 32]
-.LVL563:
-	.loc 1 55 0
 	add	x0, x0, :lo12:.LC78
-	.loc 1 56 0
 	ldp	x23, x24, [sp, 48]
-.LVL564:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL565:
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	.loc 1 55 0
 	b	printf
-.LVL566:
 .L324:
-	.cfi_restore_state
-	.loc 1 41 0
 	cbnz	w20, .L319
-	.loc 1 42 0
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.LVL567:
 .L319:
-	.loc 1 44 0
 	cmp	w23, 4
 	bne	.L320
-	.loc 1 45 0
 	ldr	w1, [x22, x19, lsl 2]
 .L327:
-	.loc 1 47 0
 	add	x0, x26, :lo12:.LC76
 .L326:
-	.loc 1 49 0
 	bl	printf
-.LVL568:
-	.loc 1 50 0
 	add	w20, w20, 1
-.LVL569:
 	cmp	w20, 15
 	bls	.L323
-.LVL570:
-	.loc 1 51 0
 	mov	w20, 0
-	.loc 1 52 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.LVL571:
 .L323:
 	add	x19, x19, 1
-.LVL572:
 	add	w21, w21, w23
 	b	.L318
-.LVL573:
 .L320:
-	.loc 1 46 0
 	cmp	w23, 2
 	bne	.L322
-	.loc 1 47 0
 	ldrsh	w1, [x22, x19, lsl 1]
 	b	.L327
 .L322:
-	.loc 1 49 0
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
 	b	.L326
-	.cfi_endproc
-.LFE339:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
 	.global	FlashReadPages
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB341:
-	.loc 1 85 0
-	.cfi_startproc
-.LVL574:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 1 87 0
 	adrp	x2, .LANCHOR0
-.LVL575:
 	add	x3, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 5, 32
-.LVL576:
-	.loc 1 85 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x25, [sp, 64]
-	.cfi_offset 25, -32
-	.loc 1 87 0
 	ldrh	w25, [x3, 12]
-.LVL577:
-	.loc 1 85 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 1 92 0
 	adrp	x21, .LANCHOR104
-	.loc 1 85 0
 	stp	x23, x24, [sp, 48]
-	.loc 1 92 0
 	adrp	x22, .LC1
-	.loc 1 85 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	add	x24, x0, x1
 	mov	x19, x0
 	mov	x23, x2
-	.loc 1 92 0
 	add	x21, x21, :lo12:.LANCHOR104
 	add	x22, x22, :lo12:.LC1
-.LVL578:
 .L329:
-	.loc 1 91 0 discriminator 1
 	cmp	x19, x24
 	bne	.L336
-	.loc 1 112 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
-.LVL579:
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL580:
 .L336:
-	.cfi_restore_state
-	.loc 1 92 0
 	ldr	x0, [x19, 8]
 	cbz	x0, .L330
-	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
 	cbnz	x0, .L331
 .L330:
-	.loc 1 92 0 discriminator 3
-	mov	w2, 92
+	mov	w2, 96
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.LVL581:
 .L331:
-	.loc 1 93 0 is_stmt 1
 	ldr	w0, [x19, 4]
-	.loc 1 94 0
 	adrp	x20, .LANCHOR105
 	add	x20, x20, :lo12:.LANCHOR105
-	.loc 1 93 0
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL582:
-	.loc 1 94 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x20, 24]
 	blr	x4
-.LVL583:
-	.loc 1 98 0
 	str	w0, [x19]
-	.loc 1 99 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL584:
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
 	bne	.L333
-	.loc 1 100 0
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x20, 24]
 	ldp	x2, x3, [x19, 8]
@@ -5112,475 +2913,245 @@ FlashReadPages:
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL585:
-	.loc 1 104 0
 	cmn	w0, #1
 	beq	.L334
-	.loc 1 105 0 discriminator 1
 	ldr	x0, [x19, 16]
-.LVL586:
-	.loc 1 104 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
 	bne	.L333
-	.loc 1 105 0
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
 	bne	.L333
-	.loc 1 106 0
 	ldr	w0, [x0]
 	cmn	w0, #1
 	beq	.L333
 .L334:
-	.loc 1 108 0
 	mov	w0, -1
 	str	w0, [x19]
 .L333:
 	add	x19, x19, 32
 	b	.L329
-	.cfi_endproc
-.LFE341:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
 	.global	FtlLoadFactoryBbt
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
-.LFB230:
-	.loc 4 279 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 4 286 0
 	adrp	x2, .LANCHOR107
 	adrp	x0, .LANCHOR106
 	add	x1, x0, :lo12:.LANCHOR106
-	.loc 4 279 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 4 286 0
 	ldr	x2, [x2, #:lo12:.LANCHOR107]
-	.loc 4 279 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 4 291 0
 	adrp	x26, .LANCHOR17
-	.loc 4 279 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 4 291 0
 	add	x28, x26, :lo12:.LANCHOR17
-	.loc 4 279 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
 	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
 	add	x20, x20, :lo12:.LANCHOR37
-	.loc 4 286 0
 	str	x2, [x1, 8]
-	.loc 4 287 0
 	adrp	x2, .LANCHOR108
-	.loc 4 289 0
 	adrp	x23, .LANCHOR10
 	add	x20, x20, 12
-	.loc 4 287 0
 	ldr	x25, [x2, #:lo12:.LANCHOR108]
-	.loc 4 289 0
 	add	x23, x23, :lo12:.LANCHOR10
 	mov	w21, 0
-	.loc 4 290 0
 	mov	w27, -1
-	.loc 4 287 0
 	str	x25, [x1, 16]
-.LVL587:
 .L348:
-	.loc 4 289 0 discriminator 1
 	ldrh	w0, [x23]
 	cmp	w21, w0
 	bcc	.L353
-	.loc 4 314 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL588:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL589:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL590:
 .L353:
-	.cfi_restore_state
-	.loc 4 291 0
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
-	.loc 4 293 0
 	add	x24, x22, :lo12:.LANCHOR106
-	.loc 4 290 0
 	strh	w27, [x20]
-	.loc 4 301 0
 	mov	w3, 61664
-	.loc 4 291 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL591:
 .L349:
-	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
 	bgt	.L351
-	.loc 4 292 0 is_stmt 1
 	madd	w0, w0, w21, w19
-	.loc 4 294 0
 	mov	w2, 1
 	str	w3, [x29, 108]
-.LVL592:
 	mov	w1, w2
-	.loc 4 292 0
 	lsl	w0, w0, 10
-	.loc 4 293 0
 	str	w0, [x24, 4]
-	.loc 4 294 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL593:
-	.loc 4 295 0
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
 	beq	.L350
-	.loc 4 301 0
 	ldrh	w0, [x25]
 	cmp	w0, w3
 	bne	.L350
-	.loc 4 303 0
 	strh	w19, [x20]
 .L351:
-	.loc 4 289 0 discriminator 2
 	add	w21, w21, 1
-.LVL594:
 	add	x20, x20, 2
 	b	.L348
 .L350:
-	.loc 4 291 0 discriminator 2
 	sub	w19, w19, #1
-.LVL595:
 	and	w19, w19, 65535
-.LVL596:
 	b	.L349
-	.cfi_endproc
-.LFE230:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
 	.global	FtlGetLastWrittenPage
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
-.LFB236:
-	.loc 2 47 0
-	.cfi_startproc
-.LVL597:
 	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
-	.loc 2 51 0
 	cmp	w1, 1
-	.loc 2 47 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -112
-	.cfi_offset 24, -104
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-	.cfi_offset 21, -128
-	.cfi_offset 22, -120
-	.loc 2 51 0
 	bne	.L359
-	.loc 2 51 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR20
-.LVL598:
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
 .L360:
-.LVL599:
-	.loc 2 56 0 is_stmt 1 discriminator 4
 	sub	w19, w19, #1
-.LVL600:
-	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
-	.loc 2 56 0 discriminator 4
 	sxth	w19, w19
-	.loc 2 53 0 discriminator 4
 	add	x1, x1, :lo12:ftl_temp_buf
-	.loc 2 57 0 discriminator 4
 	lsl	w21, w0, 10
-	.loc 2 53 0 discriminator 4
 	str	x1, [x29, 72]
-	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL601:
-	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
-	.loc 2 57 0 discriminator 4
 	str	w0, [x29, 68]
-	.loc 2 58 0 discriminator 4
 	mov	w2, w23
-	.loc 2 54 0 discriminator 4
 	str	x1, [x29, 80]
-.LVL602:
-	.loc 2 58 0 discriminator 4
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL603:
-	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
 	bne	.L361
 	mov	w22, 0
-	.loc 2 61 0
 	mov	w24, 2
-.LVL604:
 .L362:
-	.loc 2 60 0
 	cmp	w22, w19
 	ble	.L365
-.LVL605:
 .L361:
-	.loc 2 73 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL606:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL607:
 	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL608:
 .L359:
-	.cfi_restore_state
-	.loc 2 51 0 discriminator 2
 	adrp	x1, .LANCHOR19
-.LVL609:
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
 	b	.L360
-.LVL610:
 .L365:
-	.loc 2 61 0
 	add	w20, w22, w19
-	.loc 2 63 0
 	mov	w2, w23
 	mov	w1, 1
-	.loc 2 61 0
 	sdiv	w20, w20, w24
-.LVL611:
-	.loc 2 62 0
 	sxth	w0, w20
 	orr	w0, w0, w21
 	str	w0, [x29, 68]
-	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL612:
-	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
 	bne	.L363
-	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
 	bne	.L363
-	.loc 2 66 0 is_stmt 1
 	sub	w19, w20, #1
-.LVL613:
 	sxth	w19, w19
-.LVL614:
 	b	.L362
 .L363:
-	.loc 2 68 0
 	add	w20, w20, 1
-.LVL615:
 	sxth	w22, w20
-.LVL616:
 	b	.L362
-	.cfi_endproc
-.LFE236:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
 	.global	FlashProgPages
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB342:
-	.loc 1 115 0
-	.cfi_startproc
-.LVL617:
 	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL618:
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
 	mov	w25, w2
 	mov	w26, w3
-	.loc 1 117 0
 	adrp	x2, .LANCHOR0
-.LVL619:
 	add	x3, x2, :lo12:.LANCHOR0
-.LVL620:
-	.loc 1 115 0
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
 	mov	x20, x0
 	stp	x21, x22, [sp, 32]
-	.loc 1 121 0
 	mov	x19, x0
-	.loc 1 117 0
 	ldrh	w27, [x3, 12]
-.LVL621:
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	.loc 1 122 0
 	adrp	x21, .LANCHOR109
-	.loc 1 115 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.loc 1 124 0
 	adrp	x22, .LANCHOR105
 	add	x24, x0, x1
 	mov	x23, x2
-	.loc 1 122 0
 	add	x21, x21, :lo12:.LANCHOR109
-	.loc 1 133 0
 	add	x28, x22, :lo12:.LANCHOR105
-.LVL622:
 .L368:
-	.loc 1 121 0 discriminator 1
 	cmp	x19, x24
 	bne	.L376
-	.loc 1 142 0
 	cbnz	w26, .L377
-.LVL623:
 .L395:
-	.loc 1 172 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL624:
 	ldp	x27, x28, [sp, 80]
-.LVL625:
 	ldp	x29, x30, [sp], 144
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL626:
 .L376:
-	.cfi_restore_state
-	.loc 1 122 0
 	ldr	x0, [x19, 8]
 	cbz	x0, .L369
-	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
 	cbnz	x0, .L370
 .L369:
-	.loc 1 122 0 discriminator 3
 	adrp	x0, .LC1
-	mov	w2, 122
+	mov	w2, 126
 	mov	x1, x21
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL627:
 .L370:
-	.loc 1 123 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
-.LVL628:
-	.loc 1 124 0
 	add	x0, x22, :lo12:.LANCHOR105
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x0, 16]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL629:
-	.loc 1 129 0
 	cbnz	w0, .L371
-	.loc 1 128 0
 	str	wzr, [x19]
-.LVL630:
 .L372:
-	.loc 1 132 0
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
 	bne	.L374
-	.loc 1 133 0
 	ldrb	w0, [x29, 104]
 	ldr	x4, [x28, 16]
 	ldp	x2, x3, [x19, 8]
@@ -5589,3431 +3160,1889 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-.LVL631:
-	.loc 1 137 0
 	cbz	w0, .L374
-	.loc 1 138 0
 	mov	w0, -1
-.LVL632:
 	str	w0, [x19]
 .L374:
 	add	x19, x19, 32
 	b	.L368
-.LVL633:
 .L371:
-	.loc 1 130 0
 	mov	w0, -1
-.LVL634:
 	str	w0, [x19]
 	b	.L372
-.LVL635:
 .L381:
-.LBB231:
-	.loc 1 147 0
 	str	wzr, [x22]
-	.loc 1 153 0
 	mov	w2, w25
-	.loc 1 148 0
 	str	wzr, [x24]
-	.loc 1 153 0
 	mov	w1, 1
-	.loc 1 151 0
 	stp	x22, x24, [x29, 120]
-	.loc 1 149 0
 	ldr	w0, [x20, 4]
 	str	w0, [x29, 116]
-	.loc 1 153 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL636:
-	.loc 1 154 0
 	ldr	w26, [x29, 112]
 	cmn	w26, #1
 	bne	.L378
-	.loc 1 155 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.LVL637:
-	.loc 1 156 0
 	str	w26, [x20]
 .L378:
-	.loc 1 158 0
 	ldr	x0, [x20, 16]
 	cbz	x0, .L379
-	.loc 1 159 0
 	ldr	w3, [x23, #:lo12:.LANCHOR110]
 	ldr	w2, [x0]
 	cmp	w2, w3
 	beq	.L379
-	.loc 1 160 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.LVL638:
-	.loc 1 161 0
 	mov	w0, -1
 	str	w0, [x20]
 .L379:
-	.loc 1 164 0
 	ldr	x0, [x20, 8]
 	cbz	x0, .L380
-	.loc 1 165 0
 	ldr	w3, [x21, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
 	beq	.L380
-	.loc 1 166 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.LVL639:
-	.loc 1 167 0
 	mov	w0, -1
 	str	w0, [x20]
 .L380:
 	add	x20, x20, 32
 .L396:
-.LBE231:
-	.loc 1 144 0 discriminator 1
 	cmp	x20, x19
 	bne	.L381
 	b	.L395
-.LVL640:
 .L377:
-.LBB232:
-	.loc 1 147 0 discriminator 1
 	adrp	x21, check_buf
-	.loc 1 148 0 discriminator 1
 	adrp	x23, .LANCHOR110
-	.loc 1 147 0 discriminator 1
 	add	x22, x21, :lo12:check_buf
-	.loc 1 148 0 discriminator 1
 	add	x24, x23, :lo12:.LANCHOR110
 	b	.L396
-.LBE232:
-	.cfi_endproc
-.LFE342:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
 	.global	FlashEraseBlocks
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB343:
-	.loc 1 175 0
-	.cfi_startproc
-.LVL641:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 1 178 0
 	adrp	x1, .LANCHOR0
-.LVL642:
 	add	x3, x1, :lo12:.LANCHOR0
 	ubfiz	x2, x2, 5, 32
-.LVL643:
-	.loc 1 175 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
 	add	x2, x2, 4
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 1 178 0
 	ldrh	w23, [x3, 12]
-.LVL644:
-	.loc 1 175 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	add	x19, x0, 4
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	mov	x20, x1
-	.loc 1 183 0
 	adrp	x21, .LANCHOR105
 	add	x22, x0, x2
-	.loc 1 188 0
 	add	x24, x21, :lo12:.LANCHOR105
-.LVL645:
 .L399:
-	.loc 1 181 0 discriminator 1
 	cmp	x19, x22
 	bne	.L405
-	.loc 1 194 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL646:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL647:
 .L405:
-	.cfi_restore_state
-	.loc 1 182 0
 	ldr	w0, [x19]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL648:
-	.loc 1 183 0
 	add	x0, x21, :lo12:.LANCHOR105
 	ldr	w1, [x29, 76]
 	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
 	blr	x2
-.LVL649:
-	.loc 1 185 0
 	cbnz	w0, .L400
-	.loc 1 184 0
 	str	wzr, [x19, -4]
-.LVL650:
 .L401:
-	.loc 1 187 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
 	bne	.L403
-	.loc 1 188 0
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x24, 8]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL651:
-	.loc 1 189 0
 	cbz	w0, .L403
-	.loc 1 190 0
 	mov	w0, -1
-.LVL652:
 	str	w0, [x19, -4]
 .L403:
 	add	x19, x19, 32
 	b	.L399
-.LVL653:
 .L400:
-	.loc 1 186 0
 	mov	w0, -1
-.LVL654:
 	str	w0, [x19, -4]
 	b	.L401
-	.cfi_endproc
-.LFE343:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueIn
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
-.LFB240:
-	.loc 2 98 0
-	.cfi_startproc
-.LVL655:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w20, w0, 65535
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 99 0
 	sub	w2, w20, #1
 	mov	w0, 65533
-.LVL656:
 	cmp	w0, w2, uxth
 	bcc	.L410
-.LBB241:
-.LBB242:
-	.loc 2 94 0
 	adrp	x0, .LANCHOR38
 	add	x2, x0, :lo12:.LANCHOR38
 	mov	x19, x0
-.LBE242:
-.LBE241:
-	.loc 2 101 0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
 	beq	.L410
 	and	w1, w1, 65535
-.LVL657:
-.LBB243:
-.LBB244:
-	.loc 2 103 0
 	cbz	w1, .L412
-.LBB245:
-	.loc 2 104 0
 	mov	w0, w20
 	bl	P2V_block_in_plane
-.LVL658:
 	and	w21, w0, 65535
-.LVL659:
-	.loc 2 105 0
 	adrp	x0, .LANCHOR111
-.LVL660:
 	lsl	w1, w20, 10
-	.loc 2 106 0
 	mov	w2, 1
-	.loc 2 105 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
-	.loc 2 106 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL661:
-	.loc 2 107 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x21, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 108 0
 	adrp	x1, .LANCHOR75
 	ldr	w0, [x1, #:lo12:.LANCHOR75]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR75]
-.LVL662:
 .L412:
-.LBE245:
-	.loc 2 110 0
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
-	.loc 2 111 0
 	ldrh	w1, [x0, 4]
 	add	x2, x0, x1, sxtw 1
-	.loc 2 112 0
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	.loc 2 111 0
 	strh	w20, [x2, 8]
-.LVL663:
 .L410:
-.LBE244:
-.LBE243:
-	.loc 2 115 0
 	ldp	x19, x20, [sp, 16]
-.LVL664:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE240:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
 	.global	FtlLowFormatEraseBlock
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-.LFB209:
-	.loc 3 528 0
-	.cfi_startproc
-.LVL665:
 	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	.loc 3 541 0
 	adrp	x7, .LANCHOR13
 	add	x7, x7, :lo12:.LANCHOR13
-	.loc 3 539 0
 	mov	x5, 0
-	.loc 3 528 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
 	and	w24, w0, 65535
-	.loc 3 538 0
 	adrp	x0, .LANCHOR112
-.LVL666:
-	.loc 3 528 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w23, w1, 255
-	.loc 3 538 0
 	str	w24, [x0, #:lo12:.LANCHOR112]
-.LVL667:
-	.loc 3 551 0
 	adrp	x0, .LANCHOR114
-	.loc 3 550 0
 	adrp	x1, .LANCHOR113
-.LVL668:
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	.loc 3 539 0
 	adrp	x20, .LANCHOR3
-	.loc 3 540 0
 	adrp	x21, .LANCHOR111
-	.loc 3 551 0
 	ldr	x11, [x0, #:lo12:.LANCHOR114]
 	adrp	x0, .LANCHOR24
-	.loc 3 539 0
 	ldrh	w8, [x20, #:lo12:.LANCHOR3]
-	.loc 3 540 0
 	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	.loc 3 536 0
 	mov	w22, 0
-	.loc 3 550 0
 	ldr	x10, [x1, #:lo12:.LANCHOR113]
-	.loc 3 537 0
 	mov	w19, 0
-	.loc 3 551 0
 	ldrh	w12, [x0, #:lo12:.LANCHOR24]
-	.loc 3 528 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
 	stp	x0, x1, [x29, 120]
-.LVL669:
 .L421:
-	.loc 3 539 0 discriminator 1
 	cmp	w8, w5, uxth
 	bhi	.L425
-	.loc 3 559 0
 	cbz	w22, .L420
-	.loc 3 562 0
 	mov	w2, w22
 	ubfiz	x22, x22, 5, 16
-.LVL670:
 	mov	x25, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.LVL671:
 .L429:
-	.loc 3 564 0
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
 	bne	.L428
-	.loc 3 566 0
 	ldr	w0, [x1, 4]
-	.loc 3 565 0
 	add	w19, w19, 1
-.LVL672:
 	and	w19, w19, 65535
-.LVL673:
-	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL674:
 .L428:
 	add	x25, x25, 32
-	.loc 3 563 0 discriminator 2
 	cmp	x25, x22
 	bne	.L429
-	.loc 3 571 0
 	cbz	w23, .L442
-.LVL675:
-	.loc 3 573 0
 	adrp	x0, .LANCHOR20
-	.loc 3 572 0
 	mov	w25, 1
-	.loc 3 573 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-.LVL676:
-	.loc 3 574 0
 	lsr	w28, w26, 2
-.LVL677:
 .L430:
-	.loc 3 578 0
 	add	x0, x20, :lo12:.LANCHOR3
-	.loc 3 580 0
 	adrp	x27, .LANCHOR13
-	.loc 3 578 0
 	str	x0, [x29, 136]
 	mov	w22, 0
-	.loc 3 580 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 112]
-.LVL678:
 .L438:
-	.loc 3 578 0
 	ldr	x0, [x29, 136]
 	mov	x5, 0
-	.loc 3 579 0
 	ldr	x6, [x21, #:lo12:.LANCHOR111]
-	.loc 3 577 0
 	mov	w20, 0
-	.loc 3 578 0
 	ldrh	w7, [x0]
-	.loc 3 587 0
 	adrp	x0, .LANCHOR115
 	ldr	x8, [x0, #:lo12:.LANCHOR115]
-	.loc 3 588 0
 	ldr	x0, [x29, 128]
 	ldr	x10, [x0, #:lo12:.LANCHOR113]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.LVL679:
 .L431:
-	.loc 3 578 0 discriminator 1
 	cmp	w7, w5, uxth
 	bhi	.L434
-	.loc 3 593 0
 	cbz	w20, .L420
-	.loc 3 596 0
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w25
 	mov	x0, x6
 	bl	FlashProgPages
-.LVL680:
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.LVL681:
 .L437:
-	.loc 3 598 0
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
 	cbz	w0, .L436
-	.loc 3 600 0
 	ldr	w0, [x3, 4]
-	.loc 3 599 0
 	add	w19, w19, 1
-.LVL682:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL683:
-	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL684:
 	ldr	x1, [x29, 104]
 .L436:
 	add	x27, x27, 32
-	.loc 3 597 0 discriminator 2
 	cmp	x1, x27
 	bne	.L437
-	.loc 3 604 0
 	add	w22, w22, w28
-.LVL685:
 	and	w22, w22, 65535
-.LVL686:
-	.loc 3 605 0
 	cmp	w26, w22
 	bhi	.L438
 	mov	x22, 0
-.LVL687:
 .L440:
-	.loc 3 611 0
 	cbz	w23, .L439
-	.loc 3 611 0 is_stmt 0 discriminator 1
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cbnz	w0, .L439
-	.loc 3 612 0 is_stmt 1
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL688:
 .L439:
 	add	x22, x22, 32
-	.loc 3 610 0 discriminator 2
 	cmp	x22, x27
 	bne	.L440
-	.loc 3 615 0
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
 	beq	.L420
-	.loc 3 616 0
 	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	mov	w2, w20
 	mov	w1, w25
 	bl	FlashEraseBlocks
-.LVL689:
 .L420:
-	.loc 3 619 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL690:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL691:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL692:
 .L425:
-	.cfi_restore_state
-	.loc 3 540 0
 	lsl	x0, x5, 5
-	.loc 3 541 0
 	mov	w1, w24
-	.loc 3 540 0
 	str	wzr, [x6, x0]
-	.loc 3 541 0
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL693:
 	and	w13, w0, 65535
 	mov	w14, w13
-.LVL694:
-	.loc 3 543 0
 	cbz	w23, .L422
-	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL695:
 	cbnz	w0, .L423
 .L422:
-	.loc 3 548 0
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-.LVL696:
 	cbnz	w0, .L424
-	.loc 3 549 0
 	ubfiz	x0, x22, 5, 16
-	.loc 3 551 0
 	mul	w1, w22, w12
-	.loc 3 549 0
 	add	x0, x6, x0
-	.loc 3 552 0
 	add	w22, w22, 1
-.LVL697:
 	and	w22, w22, 65535
-.LVL698:
-	.loc 3 549 0
 	lsl	w13, w13, 10
-.LVL699:
-	.loc 3 551 0
 	asr	w1, w1, 2
 	add	x1, x11, x1, sxtw 2
-	.loc 3 549 0
 	str	w13, [x0, 4]
-	.loc 3 551 0
 	stp	x10, x1, [x0, 8]
 .L423:
-.LVL700:
 	add	x5, x5, 1
-.LVL701:
 	b	.L421
-.LVL702:
 .L424:
-	.loc 3 554 0
 	add	w19, w19, 1
-.LVL703:
 	and	w19, w19, 65535
-.LVL704:
 	b	.L423
-.LVL705:
 .L442:
-	.loc 3 534 0
 	mov	w25, 0
-	.loc 3 533 0
 	mov	w28, 6
-	.loc 3 531 0
 	mov	w26, 1
 	b	.L430
-.LVL706:
 .L434:
-	.loc 3 579 0
 	lsl	x0, x5, 5
-	.loc 3 580 0
 	mov	w1, w24
-	.loc 3 579 0
 	str	wzr, [x6, x0]
-	.loc 3 580 0
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
-.LVL707:
 	and	w12, w0, 65535
 	mov	w13, w12
-.LVL708:
-	.loc 3 581 0
 	cbz	w23, .L432
-	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL709:
 	cbnz	w0, .L433
 .L432:
-	.loc 3 585 0
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-.LVL710:
 	cbnz	w0, .L433
-	.loc 3 586 0
 	ubfiz	x0, x20, 5, 16
-	.loc 3 588 0
 	mul	w1, w20, w11
-	.loc 3 586 0
 	add	x0, x6, x0
-	.loc 3 589 0
 	add	w20, w20, 1
-.LVL711:
 	and	w20, w20, 65535
-.LVL712:
-	.loc 3 586 0
 	add	w12, w22, w12, lsl 10
-.LVL713:
-	.loc 3 588 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
-	.loc 3 586 0
 	str	w12, [x0, 4]
-	.loc 3 588 0
 	stp	x8, x1, [x0, 8]
 .L433:
-.LVL714:
 	add	x5, x5, 1
-.LVL715:
 	b	.L431
-	.cfi_endproc
-.LFE209:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-.LFB243:
-	.loc 2 181 0
-	.cfi_startproc
-.LVL716:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-.LBB246:
-.LBB247:
-	.loc 2 89 0
 	adrp	x19, .LANCHOR38
-.LBE247:
-.LBE246:
-	.loc 2 181 0
 	stp	x21, x22, [sp, 32]
-.LBB250:
-.LBB248:
-	.loc 2 89 0
 	add	x19, x19, :lo12:.LANCHOR38
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-.LBE248:
-.LBE250:
-.LBB251:
-	.loc 2 195 0
 	adrp	x21, .LANCHOR75
-.LBE251:
-	.loc 2 181 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-.LBB252:
-	.loc 2 195 0
 	add	x21, x21, :lo12:.LANCHOR75
-.LBE252:
-	.loc 2 203 0
 	adrp	x23, .LC83
 	add	x23, x23, :lo12:.LC83
-.LVL717:
 .L464:
-.LBB253:
-.LBB249:
-	.loc 2 89 0
 	ldrh	w1, [x19, 6]
-.LBE249:
-.LBE253:
-	.loc 2 186 0
 	cbz	w1, .L465
-	.loc 2 187 0
 	ldrh	w0, [x19, 2]
-	.loc 2 188 0
 	sub	w1, w1, #1
 	strh	w1, [x19, 6]
-	.loc 2 187 0
 	add	x2, x19, x0, sxtw 1
-	.loc 2 189 0
 	add	w0, w0, 1
 	and	w0, w0, 1023
 	strh	w0, [x19, 2]
-	.loc 2 187 0
 	ldrh	w20, [x2, 8]
-.LVL718:
-.LBB254:
-	.loc 2 191 0
 	mov	w0, w20
 	bl	P2V_block_in_plane
-.LVL719:
 	and	w22, w0, 65535
-.LVL720:
-	.loc 2 192 0
 	adrp	x0, .LANCHOR111
-.LVL721:
 	lsl	w1, w20, 10
-	.loc 2 193 0
 	mov	w2, 1
-	.loc 2 192 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
-	.loc 2 193 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL722:
-	.loc 2 194 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x22, 1, 16
 	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 195 0
 	ldr	w0, [x21]
-.LBE254:
-	.loc 2 202 0
 	sub	w1, w20, #1
-.LBB255:
-	.loc 2 195 0
 	add	w0, w0, 1
 	str	w0, [x21]
-.LBE255:
-	.loc 2 202 0
 	mov	w0, 65533
 	cmp	w0, w1, uxth
 	bcc	.L466
-	.loc 2 208 0
 	mov	w0, w20
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL723:
 	ldp	x21, x22, [sp, 32]
-.LVL724:
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL725:
 .L465:
-	.cfi_restore_state
-	.loc 2 199 0
 	adrp	x0, .LC82
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC82
 	bl	printf
-.LVL726:
 .L468:
 	b	.L468
-.LVL727:
 .L466:
-	.loc 2 203 0
 	ldrh	w2, [x19, 6]
 	mov	w1, w20
 	mov	x0, x23
 	bl	printf
-.LVL728:
-	.loc 2 205 0
 	b	.L464
-	.cfi_endproc
-.LFE243:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
 	.align	2
 	.global	ftl_map_blk_alloc_new_blk
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
-.LFB255:
-	.loc 2 562 0
-	.cfi_startproc
-.LVL729:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-.LVL730:
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 566 0
 	ldrh	w1, [x0, 10]
 	mov	w20, 0
 	ldr	x0, [x0, 16]
-.LVL731:
-	.loc 2 562 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-.LVL732:
 .L472:
-	.loc 2 566 0 discriminator 1
 	cmp	w20, w1
 	beq	.L476
-	.loc 2 567 0
 	mov	x21, x0
 	ldrh	w2, [x0], 2
 	cbnz	w2, .L473
-	.loc 2 568 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL733:
 	and	w1, w0, 65535
 	strh	w0, [x21]
-	.loc 2 569 0
 	sub	w2, w1, #1
 	mov	w0, 65533
 	cmp	w0, w2, uxth
 	bcs	.L474
-	.loc 2 570 0
 	adrp	x0, .LANCHOR38+6
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	adrp	x0, .LC84
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.LVL734:
 .L475:
 	b	.L475
 .L474:
-	.loc 2 576 0
 	ldr	w0, [x19, 48]
-	.loc 2 574 0
 	strh	wzr, [x19, 2]
-	.loc 2 576 0
 	add	w0, w0, 1
 	str	w0, [x19, 48]
-	.loc 2 577 0
 	ldrh	w0, [x19, 8]
-	.loc 2 575 0
 	strh	w20, [x19]
-	.loc 2 577 0
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
 .L476:
-	.loc 2 581 0
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
 	bhi	.L478
-.LVL735:
-.LBB258:
-.LBB259:
 	adrp	x1, .LANCHOR116
 	adrp	x0, .LC1
 	mov	w2, 581
 	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL736:
 .L478:
-.LBE259:
-.LBE258:
-	.loc 2 583 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL737:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL738:
 .L473:
-	.cfi_restore_state
-	.loc 2 566 0 discriminator 2
 	add	w20, w20, 1
-.LVL739:
 	and	w20, w20, 65535
-.LVL740:
 	b	.L472
-	.cfi_endproc
-.LFE255:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB346:
-	.loc 1 242 0
-	.cfi_startproc
-.LVL741:
-	.loc 1 243 0
 	uxtw	x2, w2
 	b	memset
-.LVL742:
-	.cfi_endproc
-.LFE346:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",@progbits
 	.align	2
 	.global	FtlMemInit
 	.type	FtlMemInit, %function
 FtlMemInit:
-.LFB206:
-	.loc 3 280 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -208]!
-	.cfi_def_cfa_offset 208
-	.cfi_offset 29, -208
-	.cfi_offset 30, -200
-	.loc 3 283 0
 	adrp	x0, .LANCHOR70
-	.loc 3 298 0
 	mov	w1, 65535
-	.loc 3 280 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 283 0
 	str	wzr, [x0, #:lo12:.LANCHOR70]
-	.loc 3 284 0
 	adrp	x0, .LANCHOR71
-	.loc 3 280 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -192
-	.cfi_offset 20, -184
-	.loc 3 311 0
 	adrp	x19, .LANCHOR21
-	.loc 3 284 0
 	str	wzr, [x0, #:lo12:.LANCHOR71]
-	.loc 3 285 0
 	adrp	x0, .LANCHOR67
-	.loc 3 280 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -176
-	.cfi_offset 22, -168
-	.loc 3 313 0
 	adrp	x22, .LANCHOR3
-	.loc 3 285 0
 	str	wzr, [x0, #:lo12:.LANCHOR67]
-	.loc 3 286 0
 	adrp	x0, .LANCHOR64
-	.loc 3 280 0
 	stp	x23, x24, [sp, 48]
-	.loc 3 320 0
 	adrp	x21, .LANCHOR23
-	.loc 3 286 0
 	str	wzr, [x0, #:lo12:.LANCHOR64]
-	.loc 3 287 0
 	adrp	x0, .LANCHOR63
-	.loc 3 280 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -160
-	.cfi_offset 24, -152
-	.cfi_offset 25, -144
-	.cfi_offset 26, -136
-	.loc 3 331 0
 	adrp	x24, .LANCHOR108
-	.loc 3 287 0
 	str	wzr, [x0, #:lo12:.LANCHOR63]
-	.loc 3 288 0
 	adrp	x0, .LANCHOR65
-	.loc 3 280 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -128
-	.cfi_offset 28, -120
-	.loc 3 332 0
 	adrp	x23, .LANCHOR114
-	.loc 3 288 0
 	str	wzr, [x0, #:lo12:.LANCHOR65]
-	.loc 3 289 0
 	adrp	x0, .LANCHOR66
-	.loc 3 350 0
 	adrp	x25, .LANCHOR42
-	.loc 3 352 0
 	adrp	x27, .LANCHOR129
-	.loc 3 289 0
 	str	wzr, [x0, #:lo12:.LANCHOR66]
-	.loc 3 290 0
 	adrp	x0, .LANCHOR62
-	.loc 3 353 0
 	adrp	x26, .LANCHOR130
-	.loc 3 290 0
 	str	wzr, [x0, #:lo12:.LANCHOR62]
-	.loc 3 291 0
 	adrp	x0, .LANCHOR72
 	str	wzr, [x0, #:lo12:.LANCHOR72]
-	.loc 3 292 0
 	adrp	x0, .LANCHOR73
 	str	wzr, [x0, #:lo12:.LANCHOR73]
-	.loc 3 293 0
 	adrp	x0, .LANCHOR75
 	str	wzr, [x0, #:lo12:.LANCHOR75]
-	.loc 3 294 0
 	adrp	x0, .LANCHOR76
 	str	wzr, [x0, #:lo12:.LANCHOR76]
-	.loc 3 295 0
 	adrp	x0, .LANCHOR77
 	str	wzr, [x0, #:lo12:.LANCHOR77]
-	.loc 3 296 0
 	adrp	x0, .LANCHOR117
 	str	wzr, [x0, #:lo12:.LANCHOR117]
-	.loc 3 297 0
 	adrp	x0, .LANCHOR87
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	.loc 3 298 0
 	adrp	x0, .LANCHOR118
 	str	w1, [x0, #:lo12:.LANCHOR118]
-	.loc 3 299 0
 	adrp	x0, .LANCHOR119
-	.loc 3 302 0
 	adrp	x1, .LANCHOR99
-	.loc 3 299 0
 	str	wzr, [x0, #:lo12:.LANCHOR119]
-	.loc 3 300 0
 	adrp	x0, .LANCHOR84
 	str	wzr, [x0, #:lo12:.LANCHOR84]
-	.loc 3 301 0
 	adrp	x0, .LANCHOR112
 	str	wzr, [x0, #:lo12:.LANCHOR112]
-	.loc 3 302 0
 	mov	w0, -1
 	strh	w0, [x1, #:lo12:.LANCHOR99]
-	.loc 3 303 0
 	adrp	x1, .LANCHOR100
 	strh	w0, [x1, #:lo12:.LANCHOR100]
-	.loc 3 304 0
 	adrp	x0, .LANCHOR82
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	.loc 3 305 0
 	adrp	x0, .LANCHOR83
 	mov	w1, 128
 	strh	w1, [x0, #:lo12:.LANCHOR83]
-	.loc 3 306 0
 	adrp	x0, .LANCHOR85
 	strh	wzr, [x0, #:lo12:.LANCHOR85]
-	.loc 3 307 0
 	adrp	x0, .LANCHOR101
 	strh	wzr, [x0, #:lo12:.LANCHOR101]
-	.loc 3 308 0
 	adrp	x0, .LANCHOR103
 	strh	wzr, [x0, #:lo12:.LANCHOR103]
-	.loc 3 311 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL743:
 	adrp	x1, .LANCHOR96
 	str	x0, [x1, #:lo12:.LANCHOR96]
-	.loc 3 312 0
 	mov	w0, 12
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL744:
-	.loc 3 313 0
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	.loc 3 312 0
 	adrp	x3, .LANCHOR98
 	str	x3, [x29, 104]
-	.loc 3 313 0
 	lsl	w20, w19, 5
-.LVL745:
-	.loc 3 314 0
 	lsl	w19, w19, 7
-	.loc 3 312 0
 	str	x0, [x3, #:lo12:.LANCHOR98]
-	.loc 3 314 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL746:
 	adrp	x15, .LANCHOR120
 	str	x15, [x29, 112]
 	str	x0, [x15, #:lo12:.LANCHOR120]
-	.loc 3 315 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL747:
 	adrp	x11, .LANCHOR121
 	str	x11, [x29, 120]
 	str	x0, [x11, #:lo12:.LANCHOR121]
-	.loc 3 316 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL748:
 	adrp	x14, .LANCHOR122
 	str	x14, [x29, 128]
 	str	x0, [x14, #:lo12:.LANCHOR122]
-	.loc 3 317 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL749:
 	adrp	x13, .LANCHOR111
 	str	x13, [x29, 136]
 	str	x0, [x13, #:lo12:.LANCHOR111]
-	.loc 3 318 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL750:
-	.loc 3 321 0
 	adrp	x20, .LANCHOR94
-.LVL751:
-	.loc 3 318 0
 	adrp	x12, .LANCHOR93
-	.loc 3 320 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-.LVL752:
-	.loc 3 318 0
 	str	x12, [x29, 144]
 	str	x0, [x12, #:lo12:.LANCHOR93]
-	.loc 3 321 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR94]
-	.loc 3 322 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL753:
 	adrp	x10, .LANCHOR107
 	str	x10, [x29, 152]
 	str	x0, [x10, #:lo12:.LANCHOR107]
-	.loc 3 323 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL754:
 	adrp	x8, .LANCHOR123
 	str	x8, [x29, 160]
 	str	x0, [x8, #:lo12:.LANCHOR123]
-	.loc 3 324 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL755:
 	adrp	x7, .LANCHOR124
 	str	x7, [x29, 168]
 	str	x0, [x7, #:lo12:.LANCHOR124]
-	.loc 3 325 0
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-.LVL756:
 	adrp	x6, .LANCHOR91
 	str	x6, [x29, 176]
 	str	x0, [x6, #:lo12:.LANCHOR91]
-	.loc 3 326 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL757:
 	adrp	x5, .LANCHOR115
 	str	x5, [x29, 184]
 	str	x0, [x5, #:lo12:.LANCHOR115]
-	.loc 3 327 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL758:
-	.loc 3 330 0
 	adrp	x19, .LANCHOR24
-.LVL759:
-	.loc 3 327 0
 	adrp	x4, .LANCHOR113
-	.loc 3 328 0
 	ldr	w2, [x20, #:lo12:.LANCHOR94]
-	.loc 3 327 0
 	str	x4, [x29, 192]
 	str	x0, [x4, #:lo12:.LANCHOR113]
-	.loc 3 328 0
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
-.LVL760:
-	.loc 3 330 0
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	.loc 3 328 0
 	adrp	x1, .LANCHOR90
 	str	x0, [x1, #:lo12:.LANCHOR90]
-	.loc 3 330 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
-	.loc 3 333 0
 	adrp	x22, .LANCHOR92
-	.loc 3 330 0
 	mul	w28, w28, w0
-.LVL761:
-	.loc 3 331 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL762:
 	str	x0, [x24, #:lo12:.LANCHOR108]
-	.loc 3 332 0
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-.LVL763:
 	str	x0, [x23, #:lo12:.LANCHOR114]
-	.loc 3 333 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
-	.loc 3 336 0
 	adrp	x28, .LANCHOR125
-.LVL764:
-	.loc 3 333 0
 	ldr	w0, [x20, #:lo12:.LANCHOR94]
-	.loc 3 336 0
 	adrp	x20, .LANCHOR6
-	.loc 3 333 0
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL765:
 	str	x0, [x22, #:lo12:.LANCHOR92]
-	.loc 3 336 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 337 0
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL766:
 	adrp	x1, .LANCHOR126
 	str	x0, [x1, #:lo12:.LANCHOR126]
-	.loc 3 338 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR125]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 339 0
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL767:
 	adrp	x1, .LANCHOR127
-	.loc 3 346 0
 	ldrh	w28, [x20, #:lo12:.LANCHOR6]
-	.loc 3 339 0
 	str	x0, [x1, #:lo12:.LANCHOR127]
-	.loc 3 340 0
 	adrp	x1, .LANCHOR43
-	.loc 3 346 0
 	lsl	w28, w28, 1
-	.loc 3 340 0
 	add	x0, x0, 32
 	str	x0, [x1, #:lo12:.LANCHOR43]
-.LVL768:
-	.loc 3 348 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL769:
 	adrp	x1, .LANCHOR128
 	str	x0, [x1, #:lo12:.LANCHOR128]
-	.loc 3 350 0
 	mov	w0, w28
-	.loc 3 351 0
 	adrp	x28, .LANCHOR30
-.LVL770:
-	.loc 3 350 0
 	bl	ftl_malloc
-.LVL771:
 	str	x0, [x25, #:lo12:.LANCHOR42]
-.LVL772:
-	.loc 3 351 0
 	ldr	w1, [x28, #:lo12:.LANCHOR30]
 	lsl	w19, w1, 1
-	.loc 3 352 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL773:
 	str	x0, [x27, #:lo12:.LANCHOR129]
-	.loc 3 353 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL774:
 	str	x0, [x26, #:lo12:.LANCHOR130]
-	.loc 3 354 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
-	.loc 3 355 0
 	adrp	x19, .LANCHOR27
-	.loc 3 354 0
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL775:
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
-	.loc 3 355 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL776:
 	adrp	x2, .LANCHOR36
 	str	x0, [x2, #:lo12:.LANCHOR36]
-	.loc 3 356 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL777:
 	adrp	x2, .LANCHOR131
 	str	x0, [x2, #:lo12:.LANCHOR131]
-	.loc 3 357 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	adrp	x19, .LANCHOR43
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL778:
 	adrp	x1, .LANCHOR132
 	str	x0, [x1, #:lo12:.LANCHOR132]
-	.loc 3 358 0
 	adrp	x1, .LANCHOR28
 	str	x1, [x29, 200]
 	ldrh	w0, [x1, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL779:
-	.loc 3 359 0
 	ldr	x1, [x29, 200]
-	.loc 3 358 0
 	adrp	x2, .LANCHOR133
 	str	x0, [x2, #:lo12:.LANCHOR133]
-	.loc 3 359 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR28]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL780:
-	.loc 3 361 0
 	adrp	x0, .LANCHOR32
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
-	.loc 3 362 0
 	lsl	w0, w0, 2
-.LVL781:
 	bl	ftl_malloc
-.LVL782:
 	adrp	x1, .LANCHOR134
 	str	x0, [x1, #:lo12:.LANCHOR134]
-.LVL783:
-	.loc 3 363 0
 	ldr	w0, [x28, #:lo12:.LANCHOR30]
-	.loc 3 365 0
 	adrp	x28, .LANCHOR33
-	.loc 3 364 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL784:
 	adrp	x1, .LANCHOR135
 	str	x0, [x1, #:lo12:.LANCHOR135]
-.LVL785:
-	.loc 3 365 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR33]
-	.loc 3 366 0
 	lsl	w0, w0, 4
-.LVL786:
 	bl	ftl_malloc
-.LVL787:
 	adrp	x1, .LANCHOR55
 	str	x0, [x1, #:lo12:.LANCHOR55]
-.LVL788:
-	.loc 3 367 0
 	ldrh	w1, [x28, #:lo12:.LANCHOR33]
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
-	.loc 3 372 0
 	adrp	x21, .LANCHOR10
-	.loc 3 368 0
 	mul	w0, w1, w0
-.LVL789:
 	bl	ftl_malloc
-.LVL790:
 	adrp	x1, .LANCHOR136
 	str	x0, [x1, #:lo12:.LANCHOR136]
-.LVL791:
-	.loc 3 370 0
 	mov	w0, 6
-	.loc 3 369 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR6]
-	.loc 3 371 0
 	adrp	x20, .LANCHOR137
-	.loc 3 370 0
 	mul	w0, w1, w0
-.LVL792:
 	bl	ftl_malloc
-.LVL793:
 	adrp	x1, .LANCHOR40
 	str	x0, [x1, #:lo12:.LANCHOR40]
-	.loc 3 371 0
 	adrp	x0, .LANCHOR17
-	.loc 3 372 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR10]
-	.loc 3 371 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x20, #:lo12:.LANCHOR137]
-.LVL794:
-	.loc 3 372 0
 	mul	w0, w1, w0
-.LVL795:
-	.loc 3 373 0
 	lsl	w0, w0, 2
-.LVL796:
 	bl	ftl_malloc
-.LVL797:
 	ldp	x3, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
-	.loc 3 375 0
 	ldrh	w20, [x20, #:lo12:.LANCHOR137]
-	.loc 3 373 0
 	add	x2, x1, :lo12:.LANCHOR37
 	ldp	x11, x14, [x29, 120]
-	.loc 3 374 0
 	mov	w30, w20
 	ldp	x13, x12, [x29, 136]
 	mov	x16, x3
 	ldp	x10, x8, [x29, 152]
-	.loc 3 373 0
 	str	x0, [x2, 32]
-.LVL798:
 	ldp	x7, x6, [x29, 168]
 	adrp	x17, .LANCHOR96
 	ldp	x5, x4, [x29, 184]
 	adrp	x3, .LANCHOR90
-	.loc 3 374 0
 	ldrh	w28, [x21, #:lo12:.LANCHOR10]
 	add	x21, x2, 40
 	mov	x0, 1
 	str	x19, [x29, 200]
-.LVL799:
 .L482:
-	.loc 3 374 0 is_stmt 0 discriminator 1
 	cmp	w0, w28
 	bcc	.L483
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	.loc 3 380 0 is_stmt 1
 	add	x1, x1, :lo12:.LANCHOR37
-	.loc 3 374 0
 	mov	x19, 0
 .L484:
 	add	x19, x19, 1
-	.loc 3 378 0 discriminator 1
 	cmp	x19, x2
 	bne	.L485
-	.loc 3 384 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	cbnz	x0, .L486
 .L488:
-	.loc 3 386 0
 	adrp	x1, .LANCHOR138
 	adrp	x0, .LC85
 	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC85
 	bl	printf
-.LVL800:
-	.loc 3 387 0
 	mov	w0, -1
 .L481:
-	.loc 3 485 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
 .L483:
-	.cfi_restore_state
-	.loc 3 375 0 discriminator 3
 	ldr	x19, [x2, 32]
-	.loc 3 374 0 discriminator 3
 	add	w0, w0, 1
-	.loc 3 375 0 discriminator 3
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
 	b	.L482
 .L485:
-	.loc 3 380 0 discriminator 2
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
 	b	.L484
 .L486:
-	.loc 3 389 0
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
 	cbz	x0, .L488
-	.loc 3 394 0
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
 	cbz	x0, .L488
-	.loc 3 399 0
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
 	cbz	x0, .L488
-	.loc 3 405 0
 	adrp	x0, .LANCHOR55
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	cbz	x0, .L488
-	.loc 3 410 0
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	cbz	x0, .L488
-	.loc 3 415 0
 	adrp	x0, .LANCHOR40
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	cbz	x0, .L488
-	.loc 3 420 0
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
 	cbz	x0, .L488
-	.loc 3 426 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	cbz	x0, .L488
-	.loc 3 431 0
 	ldr	x0, [x17, #:lo12:.LANCHOR96]
 	cbz	x0, .L488
-	.loc 3 431 0 is_stmt 0 discriminator 1
 	ldr	x0, [x16, #:lo12:.LANCHOR98]
 	cbz	x0, .L488
-	.loc 3 436 0 is_stmt 1
 	ldr	x0, [x15, #:lo12:.LANCHOR120]
 	cbz	x0, .L488
-	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	x0, [x14, #:lo12:.LANCHOR122]
 	cbz	x0, .L488
-	.loc 3 436 0 discriminator 2
 	ldr	x0, [x13, #:lo12:.LANCHOR111]
 	cbz	x0, .L488
-	.loc 3 436 0 discriminator 3
 	ldr	x0, [x12, #:lo12:.LANCHOR93]
 	cbz	x0, .L488
-	.loc 3 436 0 discriminator 4
 	ldr	x0, [x11, #:lo12:.LANCHOR121]
 	cbz	x0, .L488
-	.loc 3 441 0 is_stmt 1
 	ldr	x0, [x10, #:lo12:.LANCHOR107]
 	cbz	x0, .L488
-	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	x0, [x8, #:lo12:.LANCHOR123]
 	cbz	x0, .L488
-	.loc 3 441 0 discriminator 2
 	ldr	x0, [x7, #:lo12:.LANCHOR124]
 	cbz	x0, .L488
-	.loc 3 441 0 discriminator 3
 	ldr	x0, [x6, #:lo12:.LANCHOR91]
 	cbz	x0, .L488
-	.loc 3 442 0 is_stmt 1
 	ldr	x0, [x5, #:lo12:.LANCHOR115]
 	cbz	x0, .L488
-	.loc 3 442 0 is_stmt 0 discriminator 1
 	ldr	x0, [x4, #:lo12:.LANCHOR113]
 	cbz	x0, .L488
-	.loc 3 442 0 discriminator 2
 	ldr	x0, [x3, #:lo12:.LANCHOR90]
 	cbz	x0, .L488
-	.loc 3 447 0 is_stmt 1
 	ldr	x0, [x24, #:lo12:.LANCHOR108]
 	cbz	x0, .L488
-	.loc 3 447 0 is_stmt 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR114]
 	cbz	x0, .L488
-	.loc 3 447 0 discriminator 2
 	ldr	x0, [x22, #:lo12:.LANCHOR92]
 	cbz	x0, .L488
-	.loc 3 453 0 is_stmt 1
 	ldr	x0, [x29, 200]
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	cbz	x0, .L488
-	.loc 3 453 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	cbz	x0, .L488
-	.loc 3 459 0 is_stmt 1
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	cbz	x0, .L488
-	.loc 3 465 0
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	cbz	x0, .L488
-	.loc 3 471 0
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
 	cbz	x0, .L488
-	.loc 3 477 0
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
 	cbz	x0, .L488
-	.loc 3 484 0
 	mov	w0, 0
 	b	.L481
-	.cfi_endproc
-.LFE206:
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
 	.global	FtlBbt2Bitmap
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
-.LFB225:
-	.loc 4 66 0
-	.cfi_startproc
-.LVL801:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
 	mov	x22, x0
-	.loc 4 69 0
 	adrp	x0, .LANCHOR137
-.LVL802:
-	.loc 4 66 0
 	stp	x23, x24, [sp, 48]
-	.loc 4 74 0
 	adrp	x21, .LANCHOR17
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
 	adrp	x23, .LANCHOR139
-	.loc 4 69 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR137]
-	.loc 4 74 0
 	add	x21, x21, :lo12:.LANCHOR17
 	add	x23, x23, :lo12:.LANCHOR139
-	.loc 4 66 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 4 72 0
 	mov	w24, 65535
-	.loc 4 69 0
 	mov	x19, 0
-	.loc 4 66 0
 	mov	x20, x1
-	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL803:
 	mov	x0, x20
 	bl	ftl_memset
-.LVL804:
 .L586:
-	.loc 4 72 0
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
 	beq	.L583
-	.loc 4 74 0
 	ldrh	w1, [x21]
 	cmp	w1, w0
 	bhi	.L585
-	.loc 4 74 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL805:
 .L585:
-	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
 	add	x19, x19, 2
-	.loc 4 70 0 discriminator 2
 	cmp	x19, 1024
-	.loc 4 75 0 discriminator 2
 	ubfx	x0, x2, 5, 11
 	lsl	w2, w1, w2
 	lsl	x0, x0, 2
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	.loc 4 70 0 discriminator 2
 	bne	.L586
 .L583:
-	.loc 4 77 0
 	ldp	x19, x20, [sp, 16]
-.LVL806:
 	ldp	x21, x22, [sp, 32]
-.LVL807:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE225:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",@progbits
 	.align	2
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-.LFB227:
-	.loc 4 149 0
-	.cfi_startproc
-	.loc 4 150 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	mov	w2, -1
-	.loc 4 152 0
 	add	x0, x0, 12
-	.loc 4 150 0
 	strh	w2, [x1, #:lo12:.LANCHOR37]
-	.loc 4 152 0
 	mov	w2, 16
-	.loc 4 151 0
 	strh	wzr, [x0, -6]
-	.loc 4 152 0
 	mov	w1, 255
 	b	ftl_memset
-.LVL808:
-	.cfi_endproc
-.LFE227:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueInit
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
-.LFB237:
-	.loc 2 76 0
-	.cfi_startproc
-.LVL809:
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 79 0
 	adrp	x1, .LANCHOR38
 	add	x3, x1, :lo12:.LANCHOR38
-	.loc 2 83 0
 	mov	w2, 2048
-	.loc 2 76 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 82 0
 	strh	w0, [x1, #:lo12:.LANCHOR38]
-	.loc 2 83 0
 	mov	w1, 0
-	.loc 2 79 0
 	strh	wzr, [x3, 2]
-	.loc 2 83 0
 	add	x0, x3, 8
-.LVL810:
-	.loc 2 80 0
 	strh	wzr, [x3, 4]
-	.loc 2 81 0
 	strh	wzr, [x3, 6]
-	.loc 2 83 0
 	bl	ftl_memset
-.LVL811:
-	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE237:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.load_l2p_region,"ax",@progbits
 	.align	2
 	.global	load_l2p_region
 	.type	load_l2p_region, %function
 load_l2p_region:
-.LFB253:
-	.loc 2 488 0
-	.cfi_startproc
-.LVL812:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 2 492 0
 	adrp	x23, .LANCHOR32
-	.loc 2 488 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	and	x19, x1, 65535
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	and	w21, w0, 65535
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 492 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-.LVL813:
 	cmp	w0, w21
 	bcs	.L594
-	.loc 2 492 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
-.LVL814:
 	adrp	x0, .LC1
 	mov	w2, 492
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL815:
 .L594:
-	.loc 2 493 0 is_stmt 1
 	adrp	x26, .LANCHOR134
 	ubfiz	x0, x21, 2, 16
 	adrp	x22, .LANCHOR55
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	ldr	w24, [x1, x0]
-.LVL816:
-	.loc 2 495 0
 	cbnz	w24, .L595
-	.loc 2 496 0
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-.LVL817:
 	adrp	x1, .LANCHOR23
 	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL818:
-	.loc 2 497 0
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	strh	w21, [x0, x19]
-	.loc 2 498 0
 	str	wzr, [x1, 4]
 .L596:
-	.loc 2 519 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL819:
 	ldp	x23, x24, [sp, 48]
-.LVL820:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL821:
 .L595:
-	.cfi_restore_state
-	.loc 2 502 0
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-	.loc 2 501 0
 	adrp	x20, .LANCHOR106
 	add	x20, x20, :lo12:.LANCHOR106
-	.loc 2 502 0
 	add	x0, x0, x19
-	.loc 2 504 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 501 0
 	str	w24, [x20, 4]
-	.loc 2 502 0
 	ldr	x0, [x0, 8]
 	str	x0, [x20, 8]
-	.loc 2 503 0
 	adrp	x0, .LANCHOR108
 	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 504 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL822:
-	.loc 2 505 0
 	ldr	x25, [x20, 16]
-.LVL823:
-	.loc 2 507 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
 	beq	.L597
-	.loc 2 508 0
 	mov	w2, w24
 	mov	w1, w21
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
-.LVL824:
-	.loc 2 509 0
 	ldr	x1, [x20, 16]
 	mov	w3, 4
 	adrp	x0, .LC87
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC87
 	bl	rknand_print_hex
-.LVL825:
-	.loc 2 510 0
 	ldrh	w3, [x23, #:lo12:.LANCHOR32]
 	adrp	x0, .LC88
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC88
 	bl	rknand_print_hex
-.LVL826:
 .L597:
-	.loc 2 513 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
 	beq	.L598
-	.loc 2 513 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
 	mov	w2, 513
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL827:
 .L598:
-	.loc 2 516 0 is_stmt 1
 	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
-	.loc 2 517 0
 	strh	w21, [x0, x19]
-	.loc 2 518 0
 	b	.L596
-	.cfi_endproc
-.LFE253:
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
 	.align	2
 	.global	ftl_free_no_use_map_blk
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
-.LFB254:
-	.loc 2 522 0
-	.cfi_startproc
-.LVL828:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 2 531 0
 	mov	w1, 0
-	.loc 2 522 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 531 0
 	ldrh	w2, [x0, 10]
-	.loc 2 522 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 524 0
 	ldp	x21, x20, [x0, 32]
-	.loc 2 522 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 2 531 0
 	lsl	w2, w2, 1
-	.loc 2 523 0
 	ldr	x23, [x0, 16]
-.LVL829:
-	.loc 2 531 0
 	mov	x0, x21
-.LVL830:
 	bl	ftl_memset
-.LVL831:
-	.loc 2 532 0
 	mov	w0, 0
-.LVL832:
 .L601:
-	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
 	bhi	.L605
-	.loc 2 540 0 is_stmt 1
 	ldrh	w26, [x21]
-.LVL833:
-	.loc 2 544 0
 	adrp	x24, .LANCHOR20
 	add	x24, x24, :lo12:.LANCHOR20
-	.loc 2 541 0
 	mov	w25, 0
-	.loc 2 543 0
 	mov	w20, 0
-.LVL834:
 .L606:
-	.loc 2 543 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
 	bhi	.L610
-	.loc 2 559 0 is_stmt 1
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL835:
 	ldp	x21, x22, [sp, 32]
-.LVL836:
 	ldp	x23, x24, [sp, 48]
-.LVL837:
 	ldp	x25, x26, [sp, 64]
-.LVL838:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL839:
 .L605:
-	.cfi_restore_state
-	.loc 2 533 0
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
-	.loc 2 534 0
 	mov	w1, 0
-	.loc 2 533 0
 	ubfx	x2, x2, 10, 16
-.LVL840:
 .L602:
-	.loc 2 534 0 discriminator 1
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
 	bhi	.L604
-	.loc 2 532 0 discriminator 2
 	add	w0, w0, 1
-.LVL841:
 	and	w0, w0, 65535
-.LVL842:
 	b	.L601
 .L604:
-	.loc 2 535 0
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
 	bne	.L603
-	.loc 2 536 0
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
 .L603:
-	.loc 2 534 0 discriminator 2
 	add	w1, w1, 1
-.LVL843:
 	and	w1, w1, 65535
-.LVL844:
 	b	.L602
-.LVL845:
 .L610:
-	.loc 2 544 0
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
 	bne	.L607
-	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
 	bcs	.L607
-	.loc 2 545 0 is_stmt 1
 	strh	w0, [x21, x22, lsl 1]
 .L607:
-	.loc 2 546 0
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
 	bls	.L608
 	mov	w25, w20
-.LVL846:
 	mov	w26, w0
-.LVL847:
 .L608:
-	.loc 2 550 0
 	cbnz	w0, .L609
-	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, x22]
 	cbz	w0, .L609
-	.loc 2 552 0 is_stmt 1
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL848:
-	.loc 2 553 0
 	strh	wzr, [x23, x22]
-	.loc 2 554 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
 .L609:
-	.loc 2 543 0 discriminator 2
 	add	w20, w20, 1
-.LVL849:
 	and	w20, w20, 65535
-.LVL850:
 	b	.L606
-	.cfi_endproc
-.LFE254:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-.LFB257:
-	.loc 2 632 0
-	.cfi_startproc
-.LVL851:
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 640 0
 	mov	w1, 65535
-	.loc 2 632 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
 	mov	x19, x0
-	.loc 2 635 0
 	ldr	x20, [x0, 16]
-.LVL852:
-	.loc 2 632 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 640 0
 	ldrh	w0, [x0]
-.LVL853:
-	.loc 2 632 0
 	str	x23, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.loc 2 640 0
 	cmp	w0, w1
 	bne	.L616
-	.loc 2 641 0
 	ldrh	w0, [x19, 8]
 	cbz	w0, .L617
-	.loc 2 641 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
 	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL854:
 .L617:
-	.loc 2 642 0 is_stmt 1
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL855:
 	strh	w0, [x20]
-	.loc 2 646 0
 	ldr	w0, [x19, 48]
-	.loc 2 644 0
 	strh	wzr, [x19, 2]
-	.loc 2 646 0
 	add	w0, w0, 1
-	.loc 2 645 0
 	strh	wzr, [x19]
-	.loc 2 646 0
 	str	w0, [x19, 48]
-.LVL856:
 .L618:
-	.loc 2 677 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL857:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL858:
 .L616:
-	.cfi_restore_state
-	.loc 2 650 0
 	ubfiz	x0, x0, 1, 16
-	.loc 2 653 0
 	adrp	x1, .LANCHOR108
-	.loc 2 652 0
 	adrp	x23, .LANCHOR107
-	.loc 2 636 0
 	ldr	x22, [x19, 40]
-	.loc 2 653 0
 	ldr	x1, [x1, #:lo12:.LANCHOR108]
-	.loc 2 650 0
 	ldrh	w21, [x20, x0]
-	.loc 2 651 0
 	adrp	x20, .LANCHOR106
-.LVL859:
 	ldrh	w0, [x19, 2]
 	add	x2, x20, :lo12:.LANCHOR106
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	.loc 2 652 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 2 653 0
 	str	x1, [x2, 16]
-.LVL860:
-	.loc 2 652 0
 	str	x0, [x2, 8]
-	.loc 2 656 0
 	ldr	w2, [x19, 48]
 	str	w2, [x1, 4]
-	.loc 2 657 0
 	mov	w2, -1291
 	strh	w2, [x1, 8]
-	.loc 2 658 0
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
-	.loc 2 659 0
 	strh	w21, [x1, 2]
-	.loc 2 661 0
 	adrp	x1, .LANCHOR20
-.LVL861:
 	ldrh	w2, [x1, #:lo12:.LANCHOR20]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL862:
-	.loc 2 663 0
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	.loc 2 666 0
 	ldr	x3, [x23, #:lo12:.LANCHOR107]
-	.loc 2 662 0
 	mov	w2, 0
-.LVL863:
 .L619:
-	.loc 2 663 0 discriminator 1
 	cmp	w4, w1, uxth
 	bhi	.L621
-	.loc 2 670 0
 	mov	w2, 1
-.LVL864:
 	mov	w3, 0
 	mov	w1, w2
-.LVL865:
 	add	x0, x20, :lo12:.LANCHOR106
 	bl	FlashProgPages
-.LVL866:
-	.loc 2 671 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 675 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL867:
-	.loc 2 676 0
 	b	.L618
-.LVL868:
 .L621:
-	.loc 2 664 0
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
 	bne	.L620
-	.loc 2 665 0
 	add	w2, w2, 1
-.LVL869:
 	and	w2, w2, 65535
-.LVL870:
-	.loc 2 666 0
 	ubfiz	x0, x2, 1, 16
 	str	w1, [x3, x0, lsl 2]
-	.loc 2 667 0
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
 .L620:
-.LVL871:
 	add	x1, x1, 1
-.LVL872:
 	b	.L619
-	.cfi_endproc
-.LFE257:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",@progbits
 	.align	2
 	.global	FtlMapWritePage
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
-.LFB258:
-	.loc 2 680 0
-	.cfi_startproc
-.LVL873:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 686 0
 	adrp	x23, .LANCHOR66
-	.loc 2 680 0
 	stp	x25, x26, [sp, 64]
-	.loc 2 699 0
 	adrp	x24, .LANCHOR142
-	.loc 2 680 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 687 0
 	adrp	x26, .LANCHOR20
-	.loc 2 680 0
 	stp	x19, x20, [sp, 16]
 	mov	w25, w1
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
 	mov	x19, x0
 	mov	x27, x2
-	.loc 2 686 0
 	add	x23, x23, :lo12:.LANCHOR66
-	.loc 2 699 0
 	add	x24, x24, :lo12:.LANCHOR142
-	.loc 2 720 0
 	add	x28, x26, :lo12:.LANCHOR20
-	.loc 2 680 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 683 0
 	mov	w22, 0
-.LVL874:
 .L627:
-	.loc 2 686 0
 	ldr	w0, [x23]
-	.loc 2 687 0
 	ldrh	w1, [x19, 2]
-	.loc 2 686 0
 	add	w0, w0, 1
 	str	w0, [x23]
-	.loc 2 687 0
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
 	bge	.L628
-	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L629
 .L628:
-	.loc 2 688 0 is_stmt 1
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL875:
 .L629:
-	.loc 2 699 0
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
 	cbnz	w0, .L630
-	.loc 2 699 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 699
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL876:
 .L630:
-	.loc 2 700 0 is_stmt 1
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
 	bcc	.L631
-	.loc 2 700 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL877:
 .L631:
-	.loc 2 701 0 is_stmt 1
 	ldrh	w1, [x19]
-	.loc 2 703 0
 	adrp	x21, .LANCHOR106
-	.loc 2 701 0
 	ldr	x0, [x19, 16]
-	.loc 2 703 0
 	add	x20, x21, :lo12:.LANCHOR106
-	.loc 2 707 0
 	mov	w2, 16
-	.loc 2 701 0
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL878:
-	.loc 2 707 0
 	mov	w1, 0
-	.loc 2 703 0
 	ldrh	w0, [x19, 2]
 	str	w3, [x29, 108]
-	.loc 2 704 0
 	str	x27, [x20, 8]
-	.loc 2 703 0
 	orr	w0, w0, w3, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 705 0
 	adrp	x0, .LANCHOR108
 	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 707 0
 	bl	ftl_memset
-.LVL879:
-	.loc 2 708 0
 	ldr	x0, [x20, 16]
-.LVL880:
-	.loc 2 709 0
 	ldr	w1, [x19, 48]
-	.loc 2 712 0
 	ldr	w3, [x29, 108]
-	.loc 2 709 0
 	str	w1, [x0, 4]
-	.loc 2 711 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 712 0
 	strh	w3, [x0, 2]
-	.loc 2 713 0
 	mov	w3, 1
-	.loc 2 710 0
 	strh	w25, [x0, 8]
-	.loc 2 713 0
 	mov	w1, w3
 	mov	w2, w3
 	mov	x0, x20
-.LVL881:
 	bl	FlashProgPages
-.LVL882:
-	.loc 2 714 0
 	ldrh	w0, [x19, 2]
-	.loc 2 716 0
 	ldr	w1, [x21, #:lo12:.LANCHOR106]
-	.loc 2 714 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 716 0
 	cmn	w1, #1
 	bne	.L632
-	.loc 2 717 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC89
 	add	x0, x0, :lo12:.LC89
-	.loc 2 718 0
 	add	w22, w22, 1
-.LVL883:
 	and	w22, w22, 65535
-	.loc 2 717 0
 	bl	printf
-.LVL884:
-	.loc 2 719 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
 	bhi	.L633
-	.loc 2 720 0
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
 .L633:
-	.loc 2 722 0
 	cmp	w22, 3
 	bls	.L634
-	.loc 2 723 0
 	add	x21, x21, :lo12:.LANCHOR106
 	adrp	x0, .LC90
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC90
 	ldr	w1, [x21, 4]
 	bl	printf
-.LVL885:
 .L635:
 	b	.L635
 .L634:
-	.loc 2 727 0
 	ldr	w0, [x19, 52]
 	cbz	w0, .L627
 .L644:
 	b	.L644
 .L632:
-	.loc 2 731 0
 	cmp	w0, 1
 	beq	.L627
-	.loc 2 734 0
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
-	.loc 2 736 0
 	ldp	x21, x22, [sp, 32]
-.LVL886:
 	ldp	x23, x24, [sp, 48]
 	ldp	x27, x28, [sp, 80]
-.LVL887:
-	.loc 2 734 0
 	str	w1, [x0, w25, uxtw 2]
-	.loc 2 736 0
 	ldp	x19, x20, [sp, 16]
-.LVL888:
 	mov	w0, 0
 	ldp	x25, x26, [sp, 64]
-.LVL889:
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL890:
 	ret
-	.cfi_endproc
-.LFE258:
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
 	.global	ftl_map_blk_gc
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
-.LFB256:
-	.loc 2 586 0
-	.cfi_startproc
-.LVL891:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
 	adrp	x23, .LANCHOR20
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 2 590 0
 	ldr	x20, [x0, 16]
-.LVL892:
-	.loc 2 591 0
 	ldr	x24, [x0, 40]
-.LVL893:
-	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL894:
-	.loc 2 596 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
 	blt	.L647
-	.loc 2 597 0
 	ubfiz	x0, x0, 1, 16
-.LVL895:
 	ldrh	w21, [x20, x0]
-.LVL896:
-	.loc 2 598 0
 	cbz	w21, .L647
-	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19, 52]
 	cbnz	w1, .L647
-	.loc 2 599 0 is_stmt 1
 	mov	w1, 1
 	str	w1, [x19, 52]
-	.loc 2 600 0
 	strh	wzr, [x20, x0]
-	.loc 2 601 0
 	ldrh	w0, [x19, 8]
-	.loc 2 602 0
 	ldrh	w1, [x19, 2]
-	.loc 2 601 0
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	.loc 2 602 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
 	bcc	.L648
-	.loc 2 603 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL897:
 .L648:
-	.loc 2 607 0 discriminator 1
 	adrp	x25, .LANCHOR106
-	.loc 2 613 0 discriminator 1
 	adrp	x22, .LANCHOR143
-	.loc 2 614 0 discriminator 1
 	add	x26, x25, :lo12:.LANCHOR106
-	.loc 2 613 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR143
-	.loc 2 586 0 discriminator 1
 	mov	w20, 0
-.LVL898:
 .L649:
-	.loc 2 605 0 discriminator 1
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
 	bhi	.L653
-	.loc 2 621 0
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
-.LVL899:
-	.loc 2 622 0
 	str	wzr, [x19, 52]
-.LVL900:
 .L647:
-	.loc 2 626 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
 	bcc	.L654
-	.loc 2 627 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL901:
 .L654:
-	.loc 2 629 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL902:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL903:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL904:
 .L653:
-	.cfi_restore_state
-	.loc 2 606 0
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x24, x27]
 	cmp	w21, w1, lsr 10
 	bne	.L650
-	.loc 2 607 0
 	adrp	x2, .LANCHOR123
 	add	x0, x25, :lo12:.LANCHOR106
 	ldr	x2, [x2, #:lo12:.LANCHOR123]
 	str	x2, [x0, 8]
-	.loc 2 608 0
 	adrp	x2, .LANCHOR108
-	.loc 2 609 0
 	str	w1, [x0, 4]
-	.loc 2 608 0
 	ldr	x28, [x2, #:lo12:.LANCHOR108]
-.LVL905:
-	.loc 2 611 0
 	mov	w2, 1
-	.loc 2 608 0
 	str	x28, [x0, 16]
-	.loc 2 611 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL906:
-	.loc 2 613 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
 	beq	.L651
-	.loc 2 613 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 613
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL907:
 .L651:
-	.loc 2 614 0 is_stmt 1
 	ldr	w0, [x26]
 	cmn	w0, #1
 	bne	.L652
-	.loc 2 615 0
 	str	wzr, [x24, x27]
-.LVL908:
 .L650:
-	.loc 2 605 0 discriminator 2
 	add	w20, w20, 1
-.LVL909:
 	and	w20, w20, 65535
-.LVL910:
 	b	.L649
-.LVL911:
 .L652:
-	.loc 2 617 0
 	ldr	x2, [x26, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL912:
 	b	.L650
-	.cfi_endproc
-.LFE256:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
 	.global	flush_l2p_region
 	.type	flush_l2p_region, %function
 flush_l2p_region:
-.LFB259:
-	.loc 2 739 0
-	.cfi_startproc
-.LVL913:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 742 0
 	adrp	x20, .LANCHOR55
 	ubfiz	x19, x0, 4, 16
 	ldr	x0, [x20, #:lo12:.LANCHOR55]
-.LVL914:
 	add	x1, x0, x19
-.LVL915:
-	.loc 2 743 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-.LVL916:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapWritePage
-.LVL917:
-	.loc 2 744 0
 	ldr	x0, [x20, #:lo12:.LANCHOR55]
 	add	x0, x0, x19
-	.loc 2 746 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 744 0
 	ldr	w1, [x0, 4]
 	and	w1, w1, 2147483647
 	str	w1, [x0, 4]
-	.loc 2 746 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE259:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.log2phys,"ax",@progbits
 	.align	2
 	.global	log2phys
 	.type	log2phys, %function
 log2phys:
-.LFB262:
-	.loc 2 802 0
-	.cfi_startproc
-.LVL918:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
 	mov	x23, x1
-	.loc 2 805 0
 	adrp	x1, .LANCHOR22
-.LVL919:
-	.loc 2 802 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w24, w2
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 805 0
 	ldrh	w19, [x1, #:lo12:.LANCHOR22]
-	.loc 2 802 0
 	str	x25, [sp, 64]
-	.cfi_offset 25, -16
-	.loc 2 805 0
 	add	w1, w19, 7
-	.loc 2 806 0
 	mov	x19, 1
-	.loc 2 805 0
 	lsr	w22, w0, w1
 	and	w22, w22, 65535
-.LVL920:
-	.loc 2 806 0
 	lsl	x19, x19, x1
-	.loc 2 808 0
 	adrp	x1, .LANCHOR61
-	.loc 2 806 0
 	sub	w19, w19, #1
-	.loc 2 808 0
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
-	.loc 2 806 0
 	and	w19, w19, w0
 	and	x19, x19, 65535
-.LVL921:
-	.loc 2 808 0
 	cmp	w0, w1
 	bcc	.L662
-	.loc 2 808 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-.LVL922:
 	mov	w2, 808
-.LVL923:
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL924:
 .L662:
-	.loc 2 811 0 is_stmt 1
 	adrp	x21, .LANCHOR55
-	.loc 2 810 0
 	adrp	x0, .LANCHOR33
-	.loc 2 811 0
 	ldr	x2, [x21, #:lo12:.LANCHOR55]
-	.loc 2 810 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.LVL925:
 .L663:
 	and	x20, x0, 65535
-.LVL926:
-	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
 	bcc	.L668
-	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL927:
 	and	x20, x0, 65535
-.LVL928:
-	.loc 2 826 0
 	ldr	x2, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x1, x20, 4, 16
-	.loc 2 825 0
 	mov	w25, w0
-	.loc 2 826 0
 	add	x3, x2, x1
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
 	beq	.L669
-	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	w1, [x3, 4]
 	tbz	w1, #31, .L669
-	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL929:
 .L669:
-	.loc 2 830 0
 	mov	w1, w25
 	mov	w0, w22
 	bl	load_l2p_region
-.LVL930:
-	.loc 2 831 0
 	b	.L664
-.LVL931:
 .L668:
 	add	x0, x0, 1
-	.loc 2 811 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
 	bne	.L663
-.LVL932:
 .L664:
-	.loc 2 814 0
 	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x0, x0, x20, lsl 4
-	.loc 2 813 0
 	cbnz	w24, .L665
-	.loc 2 814 0
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x23]
 .L666:
-	.loc 2 820 0
 	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x20, x0, x20, lsl 4
-.LVL933:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
 	beq	.L671
-	.loc 2 821 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
 .L671:
-	.loc 2 832 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL934:
 	ldp	x21, x22, [sp, 32]
-.LVL935:
 	ldp	x23, x24, [sp, 48]
-.LVL936:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL937:
 .L665:
-	.cfi_restore_state
-	.loc 2 816 0
 	ldr	x1, [x0, 8]
 	ldr	w2, [x23]
 	str	w2, [x1, x19, lsl 2]
-	.loc 2 817 0
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	.loc 2 818 0
 	adrp	x0, .LANCHOR56
 	strh	w22, [x0, #:lo12:.LANCHOR56]
 	b	.L666
-	.cfi_endproc
-.LFE262:
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
 	.global	FtlReUsePrevPpa
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
-.LFB280:
-	.loc 2 1677 0
-	.cfi_startproc
-.LVL938:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 1680 0
 	adrp	x22, .LANCHOR42
-	.loc 2 1677 0
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
-	.loc 2 1678 0
 	lsr	w0, w1, 10
-.LVL939:
-	.loc 2 1677 0
 	str	x23, [sp, 48]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 23, -32
-	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL940:
-	.loc 2 1680 0
 	ldr	x2, [x22, #:lo12:.LANCHOR42]
-	.loc 2 1678 0
 	and	w3, w0, 65535
-.LVL941:
-	.loc 2 1680 0
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
 	cbnz	w1, .L677
-	.loc 2 1681 0
 	adrp	x0, .LANCHOR47
-.LVL942:
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
 	cbz	x19, .L678
-.LBB260:
-	.loc 2 1685 0
 	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	.loc 2 1684 0
 	adrp	x23, .LANCHOR48
-	.loc 2 1685 0
 	ldr	x2, [x2, #:lo12:.LANCHOR40]
-	.loc 2 1693 0
 	mov	w6, 65535
-	.loc 2 1684 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-.LVL943:
-	.loc 2 1685 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
-	.loc 2 1693 0
 	mov	w5, 6
-	.loc 2 1685 0
 	and	w19, w19, 65535
-.LVL944:
 .L679:
-	.loc 2 1686 0 discriminator 1
 	cmp	w1, w4
 	beq	.L678
-	.loc 2 1687 0
 	cmp	w19, w3
 	bne	.L680
-	.loc 2 1688 0
 	mov	w1, w19
-.LVL945:
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-.LVL946:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	cbnz	w0, .L681
-	.loc 2 1688 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
 	mov	w2, 1688
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL947:
 .L681:
-	.loc 2 1688 0 discriminator 3
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
-	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL948:
-	.loc 2 1690 0 discriminator 3
 	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL949:
 .L678:
-.LBE260:
-	.loc 2 1701 0
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
 	bl	log2phys
-.LVL950:
-	.loc 2 1702 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL951:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL952:
 .L680:
-	.cfi_restore_state
-.LBB261:
-	.loc 2 1693 0
 	umull	x19, w19, w5
-.LVL953:
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
 	beq	.L678
-.LVL954:
-	.loc 2 1686 0 discriminator 2
 	add	w1, w1, 1
-.LVL955:
 	and	w1, w1, 65535
-.LVL956:
 	b	.L679
-.LVL957:
 .L677:
-.LBE261:
-	.loc 2 1699 0
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
 	b	.L678
-	.cfi_endproc
-.LFE280:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
 	.global	ftl_scan_all_data
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
-.LFB291:
-	.loc 2 2325 0
-	.cfi_startproc
 	sub	sp, sp, #96
-	.cfi_def_cfa_offset 96
-	.loc 2 2330 0
 	adrp	x0, .LC91
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC91
-	.loc 2 2325 0
 	stp	x29, x30, [sp, 16]
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 16
-	.cfi_def_cfa 29, 80
 	stp	x19, x20, [sp, 32]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.loc 2 2336 0
 	adrp	x20, .LANCHOR106
-	.loc 2 2325 0
 	stp	x21, x22, [sp, 48]
-	.loc 2 2331 0
 	mov	w19, 0
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
 	adrp	x21, .LANCHOR61
-	.loc 2 2347 0
 	add	x22, x20, :lo12:.LANCHOR106
-	.loc 2 2331 0
 	add	x21, x21, :lo12:.LANCHOR61
-	.loc 2 2325 0
 	str	x23, [sp, 64]
-	.cfi_offset 23, -32
-	.loc 2 2330 0
 	bl	printf
-.LVL958:
 .L688:
-	.loc 2 2331 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
 	bcc	.L694
-	.loc 2 2353 0
 	ldp	x19, x20, [sp, 32]
-.LVL959:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
 	add	sp, sp, 96
-	.cfi_remember_state
-	.cfi_restore 29
-	.cfi_restore 30
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL960:
 .L694:
-	.cfi_restore_state
-	.loc 2 2332 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
-.LVL961:
-	.loc 2 2333 0
 	tst	x19, 2047
 	bne	.L689
-	.loc 2 2334 0
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC92
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.LVL962:
 .L689:
-	.loc 2 2335 0
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
 	beq	.L691
-	.loc 2 2336 0
 	add	x0, x20, :lo12:.LANCHOR106
-	.loc 2 2340 0
 	str	wzr, [x20, #:lo12:.LANCHOR106]
-	.loc 2 2342 0
 	mov	w2, 0
-	.loc 2 2336 0
 	str	w1, [x0, 4]
-	.loc 2 2338 0
 	adrp	x1, .LANCHOR107
-	.loc 2 2337 0
 	str	w19, [x0, 24]
-	.loc 2 2338 0
 	ldr	x1, [x1, #:lo12:.LANCHOR107]
 	str	x1, [x0, 8]
-	.loc 2 2339 0
 	adrp	x1, .LANCHOR108
 	ldr	x23, [x1, #:lo12:.LANCHOR108]
-.LVL963:
-	.loc 2 2342 0
 	mov	w1, 1
-	.loc 2 2339 0
 	str	x23, [x0, 16]
-	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL964:
-	.loc 2 2343 0
 	ldr	w0, [x20, #:lo12:.LANCHOR106]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	beq	.L692
-	.loc 2 2344 0
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
 	beq	.L691
 .L692:
-	.loc 2 2347 0
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
@@ -9025,627 +5054,343 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC93
 	mov	w1, w19
 	bl	printf
-.LVL965:
 .L691:
-	.loc 2 2331 0 discriminator 2
 	add	w19, w19, 1
-.LVL966:
 	b	.L688
-	.cfi_endproc
-.LFE291:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.FtlReadRefresh,"ax",@progbits
 	.align	2
 	.global	FtlReadRefresh
 	.type	FtlReadRefresh, %function
 FtlReadRefresh:
-.LFB318:
-	.loc 5 419 0
-	.cfi_startproc
-.LVL967:
-	.loc 5 425 0
 	adrp	x1, .LANCHOR81
 	add	x0, x1, :lo12:.LANCHOR81
 	ldr	w2, [x0, 80]
 	cbz	w2, .L697
-	.loc 5 426 0
 	adrp	x1, .LANCHOR61
 	ldr	w3, [x0, 84]
 	ldr	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w3, w2
 	bcs	.L698
-	.loc 5 419 0
 	stp	x29, x30, [sp, -160]!
-	.cfi_def_cfa_offset 160
-	.cfi_offset 29, -160
-	.cfi_offset 30, -152
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -144
-	.cfi_offset 20, -136
-.LBB267:
-.LBB268:
-	.loc 5 428 0
 	mov	x19, x0
 	add	x20, x1, :lo12:.LANCHOR61
-.LBE268:
-.LBE267:
-	.loc 5 419 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -128
 	mov	w21, 2048
 .L703:
-.LVL968:
-.LBB273:
-.LBB270:
-	.loc 5 428 0
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
 	bcs	.L700
-	.loc 5 430 0
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL969:
-	.loc 5 431 0
 	ldr	w0, [x19, 84]
-	.loc 5 432 0
 	ldr	w1, [x29, 60]
-	.loc 5 431 0
 	add	w0, w0, 1
 	str	w0, [x19, 84]
-	.loc 5 432 0
 	cmn	w1, #1
 	beq	.L701
-.LBB269:
-	.loc 5 435 0
 	str	w0, [x29, 88]
-	.loc 5 436 0
 	adrp	x0, ftl_temp_buf
 	add	x0, x0, :lo12:ftl_temp_buf
 	str	x0, [x29, 72]
-	.loc 5 437 0
 	add	x0, x29, 96
 	str	x0, [x29, 80]
-	.loc 5 438 0
 	add	x0, x29, 160
-	.loc 5 434 0
 	str	w1, [x29, 68]
-	.loc 5 439 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 5 438 0
 	str	wzr, [x0, -96]!
-	.loc 5 439 0
 	bl	FlashReadPages
-.LVL970:
-	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
 	bne	.L700
-	.loc 5 442 0
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL971:
 	bl	FtlGcRefreshBlock
-.LVL972:
 .L700:
-.LBE269:
-.LBE270:
-.LBE273:
-	.loc 5 466 0
 	ldp	x19, x20, [sp, 16]
-.LBB274:
-.LBB271:
 	mov	w0, -1
-.LBE271:
-.LBE274:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL973:
 .L701:
-	.cfi_restore_state
-.LBB275:
-.LBB272:
-	.loc 5 427 0
 	subs	w21, w21, #1
-.LVL974:
 	bne	.L703
 	b	.L700
-.LVL975:
 .L698:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_restore 21
-	.cfi_restore 29
-	.cfi_restore 30
-.LBE272:
-.LBE275:
-	.loc 5 451 0
 	adrp	x1, .LANCHOR62
-	.loc 5 450 0
 	str	wzr, [x0, 84]
-	.loc 5 451 0
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	.loc 5 449 0
 	stp	w1, wzr, [x0, 76]
 .L707:
-	.loc 5 420 0
 	mov	w0, 0
-	.loc 5 465 0
 	ret
 .L697:
-.LVL976:
-.LBB276:
-	.loc 5 456 0
 	ldr	w4, [x0, 76]
 	adrp	x0, .LANCHOR62
 	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	add	w0, w2, 1048576
 	cmp	w4, w0
 	bhi	.L706
-	.loc 5 454 0
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	lsr	w3, w0, 10
 	mov	w0, 33554432
 	asr	w0, w0, w3
-	.loc 5 457 0
 	add	w0, w0, w4
 	cmp	w2, w0
 	bhi	.L706
-	.loc 5 458 0
 	adrp	x0, .LANCHOR39+28
 	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
 	cbnz	w0, .L707
 .L706:
-	.loc 5 460 0
 	add	x0, x1, :lo12:.LANCHOR81
 	mov	w1, 1
-	.loc 5 461 0
 	str	wzr, [x0, 84]
-	.loc 5 460 0
 	stp	w2, w1, [x0, 76]
 	b	.L707
-.LBE276:
-	.cfi_endproc
-.LFE318:
 	.size	FtlReadRefresh, .-FtlReadRefresh
 	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
 	.align	2
 	.global	FtlMapBlkWriteDump_data
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
-.LFB267:
-	.loc 2 946 0
-	.cfi_startproc
-.LVL977:
-	.loc 2 952 0
 	ldr	w1, [x0, 56]
 	cbz	w1, .L713
-	.loc 2 946 0
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-.LVL978:
-	.loc 2 956 0
 	adrp	x1, .LANCHOR106
-	.loc 2 957 0
 	adrp	x2, .LANCHOR108
-	.loc 2 946 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 948 0
 	ldrh	w20, [x0, 6]
-	.loc 2 956 0
 	adrp	x0, .LANCHOR123
-.LVL979:
-	.loc 2 957 0
 	ldr	x2, [x2, #:lo12:.LANCHOR108]
-	.loc 2 956 0
 	ldr	x3, [x0, #:lo12:.LANCHOR123]
 	add	x0, x1, :lo12:.LANCHOR106
-	.loc 2 948 0
 	sub	w20, w20, #1
-	.loc 2 949 0
 	ldr	x4, [x19, 40]
-	.loc 2 948 0
 	and	w20, w20, 65535
-	.loc 2 946 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 957 0
 	stp	x3, x2, [x0, 8]
-	.loc 2 979 0
 	ubfiz	x2, x20, 2, 16
-	.loc 2 954 0
 	str	wzr, [x19, 56]
 	mov	x21, x1
-	.loc 2 979 0
 	ldr	w2, [x4, x2]
-.LVL980:
-	.loc 2 980 0
 	str	w2, [x0, 4]
-	.loc 2 981 0
 	cbz	w2, .L715
-	.loc 2 983 0
 	mov	w2, 1
-.LVL981:
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL982:
 .L716:
-	.loc 2 990 0
 	add	x1, x21, :lo12:.LANCHOR106
 	mov	x0, x19
-	.loc 2 992 0
 	ldr	x21, [sp, 32]
-	.loc 2 990 0
 	ldr	x2, [x1, 8]
 	mov	w1, w20
-	.loc 2 992 0
 	ldp	x19, x20, [sp, 16]
-.LVL983:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL984:
 .L715:
-	.cfi_restore_state
-	.loc 2 987 0
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-.LVL985:
 	mov	x0, x3
 	bl	ftl_memset
-.LVL986:
 	b	.L716
-.LVL987:
 .L713:
-	.cfi_def_cfa 31, 0
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_restore 21
-	.cfi_restore 29
-	.cfi_restore 30
 	ret
-	.cfi_endproc
-.LFE267:
 	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
 	.section	.text.FtlScanSysBlk,"ax",@progbits
 	.align	2
 	.global	FtlScanSysBlk
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-.LFB270:
-	.loc 2 1144 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -176]!
-	.cfi_def_cfa_offset 176
-	.cfi_offset 29, -176
-	.cfi_offset 30, -168
-	.loc 2 1152 0
 	mov	w1, 0
-	.loc 2 1144 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -112
-	.cfi_offset 26, -104
-	.loc 2 1152 0
 	adrp	x25, .LANCHOR135
-	.loc 2 1144 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -144
-	.cfi_offset 22, -136
-	.loc 2 1152 0
 	adrp	x21, .LANCHOR30
 	ldr	x0, [x25, #:lo12:.LANCHOR135]
-	.loc 2 1154 0
 	adrp	x22, .LANCHOR132
-	.loc 2 1152 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1144 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -160
-	.cfi_offset 20, -152
-	.loc 2 1150 0
 	adrp	x20, .LANCHOR147
-	.loc 2 1144 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -128
-	.cfi_offset 24, -120
-	.loc 2 1151 0
 	adrp	x23, .LANCHOR35
-	.loc 2 1144 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -96
-	.cfi_offset 28, -88
-	.loc 2 1153 0
 	adrp	x27, .LANCHOR129
-	.loc 2 1152 0
 	lsl	w2, w2, 2
-	.loc 2 1150 0
 	strh	wzr, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1151 0
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1152 0
 	bl	ftl_memset
-.LVL988:
-	.loc 2 1153 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1154 0
 	adrp	x19, .LANCHOR27
-	.loc 2 1155 0
 	adrp	x28, .LANCHOR36
-	.loc 2 1156 0
 	adrp	x24, .LANCHOR79
-	.loc 2 1153 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL989:
-	.loc 2 1154 0
 	ldr	x0, [x22, #:lo12:.LANCHOR132]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL990:
-	.loc 2 1155 0
 	ldr	x0, [x28, #:lo12:.LANCHOR36]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL991:
-	.loc 2 1156 0
 	mov	w2, 12
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR79
 	bl	ftl_memset
-.LVL992:
-	.loc 2 1158 0
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	str	w0, [x29, 172]
-.LVL993:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
-	.loc 2 1201 0
 	adrp	x0, .LANCHOR70
 	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
 .L721:
-	.loc 2 1158 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
 	bls	.L761
-	.loc 2 1162 0 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 1167 0 discriminator 1
 	adrp	x25, .LANCHOR120
-	.loc 2 1164 0 discriminator 1
 	adrp	x6, .LANCHOR13
-	.loc 2 1169 0 discriminator 1
 	mov	x5, 0
-	.loc 2 1162 0 discriminator 1
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
-	.loc 2 1168 0 discriminator 1
 	adrp	x0, .LANCHOR91
-	.loc 2 1167 0 discriminator 1
 	ldr	x7, [x25, #:lo12:.LANCHOR120]
-	.loc 2 1169 0 discriminator 1
 	mov	w22, 0
-	.loc 2 1168 0 discriminator 1
 	ldr	x11, [x0, #:lo12:.LANCHOR91]
-	.loc 2 1169 0 discriminator 1
 	adrp	x0, .LANCHOR92
-	.loc 2 1164 0 discriminator 1
 	add	x6, x6, :lo12:.LANCHOR13
-	.loc 2 1169 0 discriminator 1
 	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
 	b	.L762
-.LVL994:
 .L723:
-	.loc 2 1164 0
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
-.LVL995:
 	and	w4, w0, 65535
-.LVL996:
-	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL997:
 	cbnz	w0, .L722
-	.loc 2 1167 0
 	ubfiz	x0, x22, 5, 16
-	.loc 2 1169 0
 	mul	w1, w22, w8
-	.loc 2 1167 0
 	add	x0, x7, x0
-	.loc 2 1170 0
 	add	w22, w22, 1
-.LVL998:
 	and	w22, w22, 65535
-.LVL999:
-	.loc 2 1167 0
 	lsl	w4, w4, 10
-.LVL1000:
-	.loc 2 1169 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
-	.loc 2 1167 0
 	str	w4, [x0, 4]
-	.loc 2 1169 0
 	stp	x11, x1, [x0, 8]
 .L722:
-.LVL1001:
 	add	x5, x5, 1
-.LVL1002:
 .L762:
-	.loc 2 1162 0 discriminator 1
 	cmp	w12, w5, uxth
 	bhi	.L723
-	.loc 2 1173 0
 	cbnz	w22, .L724
-.LVL1003:
 .L760:
-	.loc 2 1158 0
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-.LVL1004:
 	b	.L721
-.LVL1005:
 .L724:
-	.loc 2 1176 0
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
 	bl	FlashReadPages
-.LVL1006:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-.LVL1007:
 	str	x0, [x29, 128]
-.LVL1008:
-	.loc 2 1211 0
 	adrp	x0, .LANCHOR148
 	add	x0, x0, :lo12:.LANCHOR148
 	str	x0, [x29, 136]
 .L759:
-	.loc 2 1178 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x1, x0, x22
-	.loc 2 1181 0
 	ldr	w0, [x0, x22]
-	.loc 2 1178 0
 	ldr	w3, [x1, 4]
-	.loc 2 1181 0
 	cmn	w0, #1
-	.loc 2 1179 0
 	ldr	x27, [x1, 16]
-	.loc 2 1178 0
 	ubfx	x26, x3, 10, 16
-.LVL1009:
-	.loc 2 1181 0
 	bne	.L727
 	mov	w5, 16
-	.loc 2 1185 0
 	mov	w7, 65535
 .L729:
-	.loc 2 1183 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x6, x25, :lo12:.LANCHOR120
-	.loc 2 1184 0
 	mov	w2, 1
 	str	w7, [x29, 100]
-	.loc 2 1183 0
 	add	x0, x0, x22
 	str	x6, [x29, 104]
 	str	w5, [x29, 168]
-.LVL1010:
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
-	.loc 2 1184 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1011:
-	.loc 2 1185 0
 	ldrh	w0, [x27]
 	ldr	w7, [x29, 100]
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
 	bne	.L726
-	.loc 2 1186 0
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
-	.loc 2 1194 0
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
 	bne	.L727
-.LVL1012:
 .L728:
-	.loc 2 1336 0
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1013:
 	b	.L732
-.LVL1014:
 .L726:
-	.loc 2 1188 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
 	bne	.L727
-.LVL1015:
 	sub	w5, w5, #1
-.LVL1016:
-	.loc 2 1182 0 discriminator 2
 	ands	w5, w5, 65535
 	bne	.L729
 	b	.L728
 .L727:
-	.loc 2 1196 0
 	adrp	x0, .LANCHOR70
 	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
 	beq	.L730
-	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	w1, w0
 	bhi	.L731
 .L730:
-	.loc 2 1198 0 is_stmt 1
 	cmn	w0, #1
 	beq	.L731
-	.loc 2 1201 0
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
 .L731:
-	.loc 2 1206 0
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
@@ -9655,14 +5400,12 @@ FtlScanSysBlk:
 	cmp	w1, w0
 	beq	.L735
 .L732:
-	.loc 2 1177 0 discriminator 2
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
 	bne	.L759
 	b	.L760
 .L734:
-	.loc 2 1206 0
 	mov	w0, 61634
 	cmp	w1, w0
 	beq	.L736
@@ -9671,44 +5414,32 @@ FtlScanSysBlk:
 	beq	.L728
 	b	.L732
 .L736:
-	.loc 2 1211 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
 	bls	.L738
-	.loc 2 1211 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1211
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1017:
 .L738:
-	.loc 2 1212 0 is_stmt 1
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1214 0
 	ldr	x3, [x29, 152]
-	.loc 2 1212 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
-.LVL1018:
 	sub	w2, w2, #1
-	.loc 2 1214 0
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
-	.loc 2 1212 0
 	sxth	w2, w2
 .L739:
-	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
 	bgt	.L745
-	.loc 2 1235 0 is_stmt 1
 	tbz	w0, #31, .L779
 	b	.L732
 .L745:
-	.loc 2 1214 0
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
@@ -9716,34 +5447,23 @@ FtlScanSysBlk:
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
 	bls	.L740
-	.loc 2 1216 0
 	ldr	w2, [x5]
 	cbnz	w2, .L741
-	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	w6, w1
 	beq	.L741
-	.loc 2 1221 0 is_stmt 1
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
 .L741:
-	.loc 2 1227 0 discriminator 1
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
 .L742:
-.LVL1019:
-	.loc 2 1224 0 discriminator 1
 	cmp	w1, w0
 	bne	.L743
-	.loc 2 1229 0
 	ldr	w1, [x27, 4]
-.LVL1020:
 	str	w1, [x10]
-	.loc 2 1230 0
 	strh	w26, [x6, x8, lsl 1]
-	.loc 2 1235 0
 	tbnz	w0, #31, .L732
-	.loc 2 1242 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
@@ -9751,76 +5471,53 @@ FtlScanSysBlk:
 	cmp	w0, w2, sxth
 	bgt	.L732
 .L779:
-	.loc 2 1244 0
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1245 0
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
-	.loc 2 1246 0
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
 .L797:
-	.loc 2 1290 0
 	strh	w26, [x1, x0, lsl 1]
 	b	.L732
-.LVL1021:
 .L743:
-	.loc 2 1226 0 discriminator 3
 	sxtw	x2, w1
 	add	w1, w1, 1
-.LVL1022:
 	lsl	x7, x2, 2
-	.loc 2 1227 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1226 0 discriminator 3
 	add	x11, x5, x7
 	sxth	w1, w1
-.LVL1023:
 	ldr	w11, [x11, 4]
 	str	w11, [x5, x7]
-	.loc 2 1227 0 discriminator 3
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
 	b	.L742
-.LVL1024:
 .L740:
 	sub	w0, w0, #1
-.LVL1025:
 	sxth	x0, w0
-.LVL1026:
 	b	.L739
-.LVL1027:
 .L735:
-	.loc 2 1252 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
 	bls	.L748
-	.loc 2 1252 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1252
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1028:
 .L748:
-	.loc 2 1253 0 is_stmt 1
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
-.LVL1029:
 	sub	w5, w1, w2
-	.loc 2 1255 0
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
 .L749:
-	.loc 2 1253 0 discriminator 1
 	cmp	w0, w5
 	ble	.L754
-	.loc 2 1255 0
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
@@ -9828,147 +5525,102 @@ FtlScanSysBlk:
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
 	bls	.L750
-	.loc 2 1257 0
 	ldr	w5, [x1]
 	cbnz	w5, .L751
-	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	w6, w2
 	beq	.L751
-	.loc 2 1265 0 is_stmt 1
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
 .L751:
-	.loc 2 1270 0 discriminator 1
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
 .L752:
-.LVL1030:
-	.loc 2 1267 0 discriminator 1
 	cmp	w2, w0
 	bne	.L753
-	.loc 2 1272 0
 	ldr	w2, [x27, 4]
-.LVL1031:
 	str	w2, [x10]
-	.loc 2 1273 0
 	strh	w26, [x6, x7, lsl 1]
 .L754:
-	.loc 2 1278 0
 	tbnz	w0, #31, .L732
-	.loc 2 1286 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
 	bgt	.L732
-	.loc 2 1288 0
 	add	w5, w5, 1
-	.loc 2 1289 0
 	ldr	w2, [x27, 4]
-	.loc 2 1288 0
 	strh	w5, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1289 0
 	str	w2, [x1, x0, lsl 2]
-	.loc 2 1290 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	b	.L797
-.LVL1032:
 .L753:
-	.loc 2 1269 0 discriminator 3
 	sxtw	x5, w2
 	add	w2, w2, 1
-.LVL1033:
 	lsl	x8, x5, 2
-	.loc 2 1270 0 discriminator 3
 	lsl	x5, x5, 1
-	.loc 2 1269 0 discriminator 3
 	add	x11, x1, x8
 	sxth	w2, w2
-.LVL1034:
 	ldr	w11, [x11, 4]
 	str	w11, [x1, x8]
-	.loc 2 1270 0 discriminator 3
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
 	b	.L752
-.LVL1035:
 .L750:
 	sub	w0, w0, #1
-.LVL1036:
 	sxth	x0, w0
-.LVL1037:
 	b	.L749
-.LVL1038:
 .L733:
-	.loc 2 1297 0
 	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
 	bne	.L756
-	.loc 2 1299 0
 	strh	w26, [x24, #:lo12:.LANCHOR79]
-	.loc 2 1300 0
 	str	w0, [x2, 8]
 	b	.L732
 .L756:
-	.loc 2 1304 0
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
 	beq	.L757
-	.loc 2 1305 0
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL1039:
 .L757:
-	.loc 2 1306 0
 	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
 	bcs	.L758
-	.loc 2 1308 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
-	.loc 2 1309 0
 	strh	w26, [x24, #:lo12:.LANCHOR79]
-	.loc 2 1310 0
 	str	w1, [x0, 8]
 	b	.L732
 .L758:
-	.loc 2 1314 0
 	strh	w26, [x0, 4]
 	b	.L732
-.LVL1040:
 .L761:
-	.loc 2 1341 0
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
 	cbz	w0, .L763
 .L766:
-	.loc 2 1359 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
 	cbz	w0, .L764
 .L765:
-	.loc 2 1377 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
 	bls	.L795
-	.loc 2 1377 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
 	mov	w2, 1377
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1041:
 .L795:
-	.loc 2 1379 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9976,405 +5628,219 @@ FtlScanSysBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL1042:
 	ret
-.LVL1043:
 .L763:
-	.cfi_restore_state
-	.loc 2 1341 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR147]
 	cbz	w0, .L766
-	.loc 2 1343 0 discriminator 1
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
 .L767:
-.LVL1044:
 	cmp	w0, w1
 	bcs	.L766
-	.loc 2 1345 0
 	ldrh	w3, [x2, w0, sxtw 1]
 	cbz	w3, .L768
-	.loc 2 1350 0
 	ldr	x1, [x29, 152]
-	.loc 2 1347 0
 	add	x7, x21, :lo12:.LANCHOR30
-	.loc 2 1350 0
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
 .L769:
-.LVL1045:
-	.loc 2 1347 0 discriminator 1
 	ldr	w3, [x7]
 	cmp	w1, w3
 	bcs	.L766
-	.loc 2 1349 0 discriminator 3
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
 	sxtw	x3, w3
 	add	w1, w1, 1
-.LVL1046:
-	.loc 2 1350 0 discriminator 3
 	ldr	w6, [x4, x6, lsl 2]
 	sxth	w1, w1
-.LVL1047:
-	.loc 2 1349 0 discriminator 3
 	ldrh	w8, [x2, x5]
 	strh	w8, [x2, x3, lsl 1]
-	.loc 2 1350 0 discriminator 3
 	str	w6, [x4, x3, lsl 2]
-	.loc 2 1351 0 discriminator 3
 	strh	wzr, [x2, x5]
 	b	.L769
-.LVL1048:
 .L768:
 	add	w0, w0, 1
-.LVL1049:
 	sxth	w0, w0
-.LVL1050:
 	b	.L767
-.LVL1051:
 .L764:
-	.loc 2 1359 0 discriminator 1
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
 	cbz	w0, .L765
-	.loc 2 1361 0 discriminator 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
 .L774:
-.LVL1052:
 	mov	w6, w0
 	cmp	w0, w2
 	bge	.L765
-	.loc 2 1363 0
 	ldrh	w3, [x1, w0, sxtw 1]
 	cbz	w3, .L775
-	.loc 2 1368 0
 	ldr	x2, [x29, 144]
-	.loc 2 1365 0
 	add	x19, x19, :lo12:.LANCHOR27
-	.loc 2 1368 0
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.LVL1053:
 .L776:
-	.loc 2 1365 0 discriminator 1
 	ldrh	w2, [x19]
 	cmp	w0, w2
 	bge	.L765
-	.loc 2 1367 0 discriminator 3
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
 	sxtw	x2, w2
 	add	w0, w0, 1
-.LVL1054:
-	.loc 2 1368 0 discriminator 3
 	ldr	w5, [x3, x5, lsl 2]
 	sxth	w0, w0
-.LVL1055:
-	.loc 2 1367 0 discriminator 3
 	ldrh	w7, [x1, x4]
 	strh	w7, [x1, x2, lsl 1]
-	.loc 2 1368 0 discriminator 3
 	str	w5, [x3, x2, lsl 2]
-	.loc 2 1369 0 discriminator 3
 	strh	wzr, [x1, x4]
 	b	.L776
-.LVL1056:
 .L775:
 	add	w0, w0, 1
-.LVL1057:
 	sxth	w0, w0
-.LVL1058:
 	b	.L774
-	.cfi_endproc
-.LFE270:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
 	.global	FtlMapTblRecovery
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-.LFB275:
-	.loc 2 1515 0
-	.cfi_startproc
-.LVL1059:
 	stp	x29, x30, [sp, -144]!
-	.cfi_def_cfa_offset 144
-	.cfi_offset 29, -144
-	.cfi_offset 30, -136
-	.loc 2 1526 0
 	mov	w1, 0
-	.loc 2 1515 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -128
-	.cfi_offset 20, -120
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	.loc 2 1527 0
 	adrp	x20, .LANCHOR106
-	.cfi_offset 23, -96
-	.cfi_offset 24, -88
-	.loc 2 1522 0
 	ldrh	w23, [x0, 6]
-	.loc 2 1560 0
 	adrp	x24, .LANCHOR20
-	.loc 2 1515 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -112
-	.cfi_offset 22, -104
-	.loc 2 1519 0
 	ldr	x21, [x0, 40]
-.LVL1060:
-	.loc 2 1520 0
 	ldr	x22, [x0, 16]
-.LVL1061:
-	.loc 2 1526 0
 	lsl	w2, w23, 2
-	.loc 2 1521 0
 	ldr	x0, [x0, 24]
-.LVL1062:
 	str	x0, [x29, 128]
-.LVL1063:
-	.loc 2 1523 0
 	ldrh	w0, [x19, 8]
-.LVL1064:
-	.loc 2 1515 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 25, -80
-	.cfi_offset 26, -72
-	.cfi_offset 27, -64
-	.cfi_offset 28, -56
-	.loc 2 1535 0
 	mov	w27, 0
-	.loc 2 1523 0
 	str	w0, [x29, 140]
-.LVL1065:
-	.loc 2 1526 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1066:
 	str	x20, [x29, 120]
-	.loc 2 1527 0
 	adrp	x7, .LANCHOR107
 	add	x3, x20, :lo12:.LANCHOR106
 	mov	x26, x7
-	.loc 2 1559 0
 	mov	x20, x3
-	.loc 2 1527 0
 	ldr	x0, [x7, #:lo12:.LANCHOR107]
 	str	x0, [x3, 8]
-	.loc 2 1528 0
 	adrp	x0, .LANCHOR108
-	.loc 2 1532 0
 	stp	wzr, wzr, [x19, 48]
-	.loc 2 1528 0
 	ldr	x25, [x0, #:lo12:.LANCHOR108]
-	.loc 2 1530 0
 	mov	w0, -1
-	.loc 2 1528 0
 	str	x25, [x3, 16]
-.LVL1067:
-	.loc 2 1530 0
 	strh	w0, [x19]
-	.loc 2 1531 0
 	strh	w0, [x19, 2]
-	.loc 2 1534 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-.LVL1068:
-	.loc 2 1537 0
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	str	w0, [x29, 136]
-	.loc 2 1579 0
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.LVL1069:
 .L799:
-	.loc 2 1535 0 discriminator 1
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
 	bge	.L816
-	.loc 2 1537 0
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
 	bne	.L800
-	.loc 2 1539 0
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
 	ldrh	w0, [x22, x0]
-	.loc 2 1543 0
 	mov	w22, 0
-.LVL1070:
-	.loc 2 1539 0
 	bl	FtlGetLastWrittenPage
-.LVL1071:
 	sxth	w26, w0
-.LVL1072:
-	.loc 2 1540 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 1542 0
 	ldr	x0, [x29, 128]
-	.loc 2 1541 0
 	strh	w27, [x19]
-	.loc 2 1542 0
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.LVL1073:
-	.loc 2 1545 0
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR106
-.LVL1074:
 .L801:
-	.loc 2 1543 0 discriminator 1
 	cmp	w22, w26
 	ble	.L803
-.LVL1075:
 .L816:
-	.loc 2 1596 0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-.LVL1076:
-	.loc 2 1597 0
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
 	bne	.L805
-	.loc 2 1599 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1077:
 .L805:
-	.loc 2 1602 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1078:
-	.loc 2 1604 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1079:
-	.loc 2 1606 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1080:
 	ldp	x21, x22, [sp, 32]
-.LVL1081:
 	ldp	x23, x24, [sp, 48]
-.LVL1082:
 	ldp	x25, x26, [sp, 64]
-.LVL1083:
 	ldp	x27, x28, [sp, 80]
-.LVL1084:
 	ldp	x29, x30, [sp], 144
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL1085:
 	ret
-.LVL1086:
 .L803:
-	.cfi_restore_state
-	.loc 2 1545 0
 	ldrh	w0, [x24]
-	.loc 2 1546 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1545 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1546 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1087:
-	.loc 2 1549 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	beq	.L802
-	.loc 2 1551 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
 	bls	.L802
-	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
 	bne	.L802
-	.loc 2 1553 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
 .L802:
 	add	w22, w22, 1
-.LVL1088:
 	sxth	w22, w22
-.LVL1089:
 	b	.L801
-.LVL1090:
 .L800:
-	.loc 2 1559 0
 	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	.loc 2 1561 0
 	mov	w2, 1
-	.loc 2 1559 0
 	str	x0, [x20, 8]
-	.loc 2 1560 0
 	lsl	x0, x28, 1
 	ldrh	w1, [x24, #:lo12:.LANCHOR20]
 	add	x28, x22, x0
 	ldrh	w0, [x22, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1561 0
 	mov	w1, w2
-	.loc 2 1560 0
 	str	w0, [x20, 4]
-	.loc 2 1561 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1091:
-	.loc 2 1564 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	beq	.L818
-	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
 	bne	.L818
-	.loc 2 1564 0 discriminator 2
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
@@ -10382,862 +5848,474 @@ FtlMapTblRecovery:
 .L818:
 	mov	w5, 0
 .L808:
-.LVL1092:
-	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
 	bge	.L814
-	.loc 2 1581 0
 	ldrh	w0, [x28]
-	.loc 2 1582 0
 	mov	w2, 1
-	.loc 2 1581 0
 	str	w5, [x29, 108]
-	.loc 2 1582 0
 	mov	w1, w2
-	.loc 2 1581 0
 	orr	w0, w5, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1582 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1093:
-	.loc 2 1585 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
 	beq	.L812
-	.loc 2 1587 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
 	bls	.L812
-	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
 	bne	.L812
-	.loc 2 1589 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
 .L812:
 	add	w5, w5, 1
 	sxth	w5, w5
-.LVL1094:
 	b	.L808
-.LVL1095:
 .L807:
-	.loc 2 1567 0 discriminator 1
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	.loc 2 1569 0 discriminator 1
 	mov	w0, 0
 	ldr	x10, [x26, #:lo12:.LANCHOR107]
-	.loc 2 1567 0 discriminator 1
 	sub	w5, w5, #1
 .L809:
-.LVL1096:
 	cmp	w0, w5
 	blt	.L811
-.LVL1097:
 .L814:
 	add	w4, w27, 1
 	sxth	w27, w4
-.LVL1098:
 	b	.L799
-.LVL1099:
 .L811:
-	.loc 2 1569 0
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
-.LVL1100:
-	.loc 2 1570 0
 	cmp	w23, w1
 	bls	.L810
-	.loc 2 1572 0
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-.LVL1101:
 	ldr	w2, [x10, x2, lsl 2]
-.LVL1102:
 	str	w2, [x21, x1]
-.LVL1103:
 .L810:
 	add	w0, w0, 1
-.LVL1104:
 	sxth	w0, w0
-.LVL1105:
 	b	.L809
-	.cfi_endproc
-.LFE275:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadVonderInfo
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
-.LFB276:
-	.loc 2 1609 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 1610 0
 	adrp	x1, .LANCHOR27
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 1609 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 1610 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR27]
 	strh	w1, [x0, 10]
-	.loc 2 1611 0
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	.loc 2 1612 0
 	adrp	x1, .LANCHOR35
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	strh	w1, [x0, 8]
-	.loc 2 1613 0
 	adrp	x1, .LANCHOR28
 	ldrh	w1, [x1, #:lo12:.LANCHOR28]
 	strh	w1, [x0, 6]
-	.loc 2 1614 0
 	adrp	x1, .LANCHOR36
 	ldr	x1, [x1, #:lo12:.LANCHOR36]
 	str	x1, [x0, 16]
-	.loc 2 1615 0
 	adrp	x1, .LANCHOR132
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	str	x1, [x0, 24]
-	.loc 2 1616 0
 	adrp	x1, .LANCHOR131
 	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	str	x1, [x0, 32]
-	.loc 2 1617 0
 	adrp	x1, .LANCHOR133
 	ldr	x1, [x1, #:lo12:.LANCHOR133]
 	str	x1, [x0, 40]
-	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1106:
-	.loc 2 1622 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE276:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
 	.global	FtlL2PDataInit
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-.LFB277:
-	.loc 2 1625 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 1627 0
 	mov	w1, 0
-	.loc 2 1625 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 1627 0
 	adrp	x19, .LANCHOR130
 	adrp	x20, .LANCHOR30
-	.loc 2 1625 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1627 0
 	ldr	x0, [x19, #:lo12:.LANCHOR130]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.loc 2 1628 0
 	adrp	x22, .LANCHOR23
-	.loc 2 1627 0
 	ldr	w2, [x20, #:lo12:.LANCHOR30]
-	.loc 2 1628 0
 	adrp	x21, .LANCHOR33
-	.loc 2 1625 0
 	str	x23, [sp, 48]
-	.cfi_offset 23, -16
-	.loc 2 1628 0
 	adrp	x23, .LANCHOR136
-	.loc 2 1627 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1107:
-	.loc 2 1628 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR23]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR136]
 	bl	ftl_memset
-.LVL1108:
 	adrp	x0, .LANCHOR55
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	.loc 2 1633 0
 	ldr	x6, [x23, #:lo12:.LANCHOR136]
-	.loc 2 1629 0
 	mov	x1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.LVL1109:
 .L829:
 	add	x4, x1, x5
-	.loc 2 1629 0 is_stmt 0 discriminator 1
 	cmp	x0, x3
 	bne	.L830
-	.loc 2 1635 0 is_stmt 1
 	adrp	x1, .LANCHOR144
 	add	x0, x1, :lo12:.LANCHOR144
-	.loc 2 1645 0
 	ldp	x21, x22, [sp, 32]
-	.loc 2 1636 0
 	strh	w2, [x1, #:lo12:.LANCHOR144]
-	.loc 2 1637 0
 	ldr	w1, [x20, #:lo12:.LANCHOR30]
 	strh	w1, [x0, 10]
-	.loc 2 1638 0
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	.loc 2 1639 0
 	adrp	x1, .LANCHOR147
-	.loc 2 1645 0
 	ldr	x23, [sp, 48]
-	.loc 2 1635 0
 	strh	w2, [x0, 2]
-	.loc 2 1639 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR147]
 	strh	w1, [x0, 8]
-	.loc 2 1640 0
 	adrp	x1, .LANCHOR32
 	ldrh	w1, [x1, #:lo12:.LANCHOR32]
 	strh	w1, [x0, 6]
-	.loc 2 1641 0
 	adrp	x1, .LANCHOR129
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
 	str	x1, [x0, 16]
-	.loc 2 1642 0
 	adrp	x1, .LANCHOR135
 	ldr	x1, [x1, #:lo12:.LANCHOR135]
 	str	x1, [x0, 24]
-	.loc 2 1643 0
 	ldr	x1, [x19, #:lo12:.LANCHOR130]
-	.loc 2 1645 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 1643 0
 	str	x1, [x0, 32]
-	.loc 2 1644 0
 	adrp	x1, .LANCHOR134
 	ldr	x1, [x1, #:lo12:.LANCHOR134]
 	str	x1, [x0, 40]
-	.loc 2 1645 0
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
 .L830:
-	.cfi_restore_state
-	.loc 2 1633 0 discriminator 3
 	and	x1, x1, -4
-	.loc 2 1632 0 discriminator 3
 	strh	w2, [x0]
-	.loc 2 1633 0 discriminator 3
 	add	x1, x6, x1
-	.loc 2 1631 0 discriminator 3
 	str	wzr, [x0, 4]
-	.loc 2 1633 0 discriminator 3
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
 	b	.L829
-	.cfi_endproc
-.LFE277:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlLoadMapInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadMapInfo
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
-.LFB278:
-	.loc 2 1648 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1110:
-	.loc 2 1651 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapTblRecovery
-.LVL1111:
-	.loc 2 1654 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE278:
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
 	.global	FtlVariablesInit
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
-.LFB207:
-	.loc 3 494 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 497 0
 	adrp	x0, .LANCHOR150
 	mov	w1, -1
-	.loc 3 494 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 497 0
 	strh	w1, [x0, #:lo12:.LANCHOR150]
-	.loc 3 498 0
 	adrp	x0, .LANCHOR151
-	.loc 3 500 0
 	mov	w1, -1
-	.loc 3 494 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 498 0
 	str	wzr, [x0, #:lo12:.LANCHOR151]
-	.loc 3 499 0
 	adrp	x0, .LANCHOR152
-	.loc 3 503 0
 	adrp	x19, .LANCHOR6
-	.loc 3 499 0
 	str	wzr, [x0, #:lo12:.LANCHOR152]
-	.loc 3 500 0
 	adrp	x0, .LANCHOR153
 	str	w1, [x0, #:lo12:.LANCHOR153]
-	.loc 3 501 0
 	adrp	x0, .LANCHOR35
-	.loc 3 502 0
 	mov	w1, 0
-	.loc 3 501 0
 	strh	wzr, [x0, #:lo12:.LANCHOR35]
-	.loc 3 502 0
 	adrp	x0, .LANCHOR27
 	ldrh	w2, [x0, #:lo12:.LANCHOR27]
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1112:
-	.loc 3 503 0
 	adrp	x0, .LANCHOR43
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1113:
-	.loc 3 504 0
 	adrp	x0, .LANCHOR126
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1114:
-	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
 	adrp	x0, .LANCHOR39
 	add	x0, x0, :lo12:.LANCHOR39
 	bl	ftl_memset
-.LVL1115:
-	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	bl	ftl_memset
-.LVL1116:
-	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1117:
-	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1118:
-	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE207:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",@progbits
 	.align	2
 	.global	SupperBlkListInit
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-.LFB285:
-	.loc 2 2116 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 2 2120 0
 	adrp	x0, .LANCHOR6
 	mov	w1, 0
-	.loc 2 2116 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 2120 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	mov	w0, 6
-	.loc 2 2116 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 2 2120 0
 	adrp	x24, .LANCHOR40
-	.loc 2 2116 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2124 0
 	adrp	x23, .LANCHOR45
-	.loc 2 2116 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 2125 0
 	adrp	x22, .LANCHOR48
-	.loc 2 2120 0
 	mul	w2, w2, w0
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
-	.loc 2 2116 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.loc 2 2128 0
 	adrp	x25, .LANCHOR5
-	.loc 2 2116 0
 	str	x27, [sp, 80]
-	.cfi_offset 27, -16
-	.loc 2 2131 0
 	adrp	x26, .LANCHOR13
-	.loc 2 2128 0
 	add	x25, x25, :lo12:.LANCHOR5
-	.loc 2 2131 0
 	add	x26, x26, :lo12:.LANCHOR13
-	.loc 2 2120 0
 	bl	ftl_memset
-.LVL1119:
-	.loc 2 2126 0
 	mov	w21, 0
-	.loc 2 2121 0
 	adrp	x0, .LANCHOR47
-	.loc 2 2126 0
 	mov	w20, 0
-	.loc 2 2128 0
 	mov	w19, 0
-	.loc 2 2124 0
 	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2121 0
 	str	xzr, [x0, #:lo12:.LANCHOR47]
-	.loc 2 2122 0
 	adrp	x0, .LANCHOR41
-	.loc 2 2125 0
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
-.LVL1120:
-	.loc 2 2130 0
 	adrp	x27, .LANCHOR3
-	.loc 2 2122 0
 	str	xzr, [x0, #:lo12:.LANCHOR41]
-	.loc 2 2123 0
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.LVL1121:
 .L837:
-	.loc 2 2128 0 discriminator 1
 	ldrh	w0, [x25]
 	cmp	w19, w0
 	bcs	.L843
-	.loc 2 2133 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2130 0
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
-	.loc 2 2133 0
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
 	b	.L844
-.LVL1122:
 .L839:
-	.loc 2 2131 0
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
-.LVL1123:
-	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL1124:
 	cbnz	w0, .L838
-	.loc 2 2133 0
 	add	w5, w5, w7
-.LVL1125:
 	and	w5, w5, 65535
-.LVL1126:
 .L838:
 	add	x6, x6, 1
-.LVL1127:
 .L844:
-	.loc 2 2130 0 discriminator 1
 	cmp	w8, w6, uxth
 	bhi	.L839
-	.loc 2 2135 0
 	cbz	w5, .L846
-	.loc 2 2136 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL1128:
 .L840:
-	.loc 2 2137 0
 	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	.loc 2 2139 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
 	beq	.L841
-	.loc 2 2140 0 discriminator 1
 	adrp	x0, .LANCHOR52
-	.loc 2 2139 0 discriminator 1
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
 	beq	.L841
-	.loc 2 2141 0
 	adrp	x0, .LANCHOR53
-	.loc 2 2140 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
 	beq	.L841
-	.loc 2 2143 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cbnz	w0, .L842
-	.loc 2 2144 0
 	add	w21, w21, 1
-.LVL1129:
-	.loc 2 2145 0
 	mov	w0, w19
-	.loc 2 2144 0
 	and	w21, w21, 65535
-.LVL1130:
-	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL1131:
 .L841:
-	.loc 2 2128 0 discriminator 2
 	add	w19, w19, 1
-.LVL1132:
 	and	w19, w19, 65535
-.LVL1133:
 	b	.L837
-.LVL1134:
 .L846:
 	mov	w5, 0
-.LVL1135:
 	b	.L840
-.LVL1136:
 .L842:
-	.loc 2 2147 0
 	add	w20, w20, 1
-.LVL1137:
-	.loc 2 2148 0
 	mov	w0, w19
-	.loc 2 2147 0
 	and	w20, w20, 65535
-.LVL1138:
-	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1139:
 	b	.L841
 .L843:
-	.loc 2 2152 0
 	strh	w20, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2154 0
 	add	w20, w20, w21
-.LVL1140:
-	.loc 2 2153 0
 	strh	w21, [x22, #:lo12:.LANCHOR48]
-	.loc 2 2154 0
 	cmp	w20, w0
 	ble	.L845
-	.loc 2 2154 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
 	mov	w2, 2154
 	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1141:
 .L845:
-	.loc 2 2156 0 is_stmt 1
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL1142:
 	ldp	x21, x22, [sp, 32]
-.LVL1143:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE285:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.ftl_check_vpc,"ax",@progbits
 	.align	2
 	.global	ftl_check_vpc
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
-.LFB290:
-	.loc 2 2273 0
-	.cfi_startproc
-.LVL1144:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 2 2279 0
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
-	.loc 2 2273 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 2282 0
 	adrp	x23, .LANCHOR61
 	add	x23, x23, :lo12:.LANCHOR61
-	.loc 2 2273 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 2282 0
 	mov	w22, 0
-	.loc 2 2273 0
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	.loc 2 2279 0
 	adrp	x21, .LANCHOR155
-	.loc 2 2273 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 2279 0
 	add	x1, x21, :lo12:.LANCHOR155
-	.loc 2 2281 0
 	adrp	x20, check_vpc_table
-	.loc 2 2279 0
 	bl	printf
-.LVL1145:
-	.loc 2 2281 0
 	add	x19, x20, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL1146:
 .L849:
-	.loc 2 2282 0 discriminator 1
 	ldr	w0, [x23]
 	cmp	w22, w0
 	bcc	.L851
-	.loc 2 2293 0 discriminator 1
 	adrp	x22, .LANCHOR5
-.LVL1147:
-	.loc 2 2297 0 discriminator 1
 	adrp	x24, .LC95
-	.loc 2 2293 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2295 0 discriminator 1
 	add	x26, x20, :lo12:check_vpc_table
-	.loc 2 2297 0 discriminator 1
 	add	x24, x24, :lo12:.LC95
 	mov	w23, 0
 	mov	w19, 0
-	.loc 2 2295 0 discriminator 1
 	adrp	x25, .LANCHOR42
-.LVL1148:
 .L852:
-	.loc 2 2293 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
 	bhi	.L854
-	.loc 2 2305 0
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-.LVL1149:
 	cbz	x19, .L855
-.LBB277:
-	.loc 2 2307 0
 	adrp	x0, .LANCHOR48
-	.loc 2 2313 0
 	adrp	x25, .LC96
 	add	x20, x20, :lo12:check_vpc_table
 	add	x25, x25, :lo12:.LC96
-	.loc 2 2307 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-.LVL1150:
-	.loc 2 2308 0
 	adrp	x0, .LANCHOR40
 	mov	x24, x0
-	.loc 2 2309 0
 	mov	w22, 0
-	.loc 2 2308 0
 	ldr	x1, [x0, #:lo12:.LANCHOR40]
-	.loc 2 2311 0
 	adrp	x27, .LANCHOR42
-	.loc 2 2316 0
 	mov	w28, 6
-	.loc 2 2308 0
 	sub	x19, x19, x1
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.LVL1151:
 .L856:
-	.loc 2 2309 0 discriminator 1
 	cmp	w22, w26
 	bne	.L858
-.LVL1152:
 .L855:
-.LBE277:
-	.loc 2 2321 0
 	cbz	w23, .L848
-.LVL1153:
-	.loc 2 2321 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 2321
 	add	x1, x21, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1154:
 .L848:
-	.loc 2 2322 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1155:
 .L851:
-	.cfi_restore_state
-	.loc 2 2284 0
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
-.LVL1156:
-	.loc 2 2285 0
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
 	beq	.L850
-	.loc 2 2287 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1157:
-	.loc 2 2288 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.LVL1158:
 .L850:
-	.loc 2 2282 0 discriminator 2
 	add	w22, w22, 1
-.LVL1159:
 	b	.L849
-.LVL1160:
 .L854:
-	.loc 2 2295 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
@@ -11245,106 +6323,61 @@ ftl_check_vpc:
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
 	beq	.L853
-	.loc 2 2297 0
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
-.LVL1161:
-	.loc 2 2298 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
 	beq	.L853
-	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x26, x27, lsl 1]
-	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.LVL1162:
 .L853:
-	.loc 2 2293 0 discriminator 2
 	add	w19, w19, 1
-.LVL1163:
 	and	w19, w19, 65535
-.LVL1164:
 	b	.L852
-.LVL1165:
 .L858:
-.LBB278:
-	.loc 2 2311 0
 	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
 	cbz	w2, .L857
-	.loc 2 2313 0
 	ldrh	w3, [x20, w19, sxtw 1]
-	.loc 2 2314 0
 	mov	w23, 1
-.LVL1166:
-	.loc 2 2313 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.LVL1167:
 .L857:
-	.loc 2 2316 0
 	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
-.LVL1168:
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
 	beq	.L855
-.LVL1169:
-	.loc 2 2309 0 discriminator 2
 	add	w22, w22, 1
-.LVL1170:
 	and	w22, w22, 65535
-.LVL1171:
 	b	.L856
-.LBE278:
-	.cfi_endproc
-.LFE290:
 	.size	ftl_check_vpc, .-ftl_check_vpc
 	.section	.text.FtlGcPageVarInit,"ax",@progbits
 	.align	2
 	.global	FtlGcPageVarInit
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
-.LFB309:
-	.loc 5 202 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 203 0
 	adrp	x0, .LANCHOR95
-	.loc 5 205 0
 	mov	w1, 255
-	.loc 5 202 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 5 203 0
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	.loc 5 204 0
 	adrp	x0, .LANCHOR97
-	.loc 5 202 0
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 5 205 0
 	adrp	x19, .LANCHOR21
-	.loc 5 204 0
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	.loc 5 205 0
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1172:
-	.loc 5 206 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
 	mov	w1, 255
@@ -11352,870 +6385,452 @@ FtlGcPageVarInit:
 	adrp	x0, .LANCHOR98
 	ldr	x0, [x0, #:lo12:.LANCHOR98]
 	bl	ftl_memset
-.LVL1173:
-	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1174:
-	.cfi_endproc
-.LFE309:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcScanTempBlk
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
-.LFB310:
-	.loc 5 211 0
-	.cfi_startproc
-.LVL1175:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 5 220 0
 	adrp	x21, .LANCHOR156
-	.loc 5 211 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
 	mov	x20, x0
 	stp	x27, x28, [sp, 80]
-	.loc 5 221 0
 	mov	w0, 65535
-.LVL1176:
-	.loc 5 220 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR156]
-.LVL1177:
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 5 211 0
 	mov	w28, w1
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 5 221 0
 	cmp	w19, w0
 	beq	.L892
-	.loc 5 223 0
 	cbnz	w19, .L876
 .L877:
-	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1178:
 	b	.L878
-.LVL1179:
 .L892:
-	.loc 5 222 0
 	mov	w19, 0
-.LVL1180:
 .L876:
-	.loc 5 223 0 discriminator 1
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w28
 	beq	.L877
-.LVL1181:
 .L878:
-	.loc 5 235 0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
-	.loc 5 222 0
 	mov	w22, 0
-	.loc 5 228 0
 	mov	w23, 65535
-.LVL1182:
 .L886:
 	ldrh	w0, [x20]
-	.loc 5 226 0
 	strb	wzr, [x20, 8]
-.LVL1183:
-	.loc 5 228 0
 	cmp	w0, w23
 	beq	.L893
-	.loc 5 236 0
 	adrp	x25, .LANCHOR24
-	.loc 5 231 0
 	adrp	x26, .LANCHOR3
-	.loc 5 236 0
 	add	x25, x25, :lo12:.LANCHOR24
-	.loc 5 231 0
 	add	x26, x26, :lo12:.LANCHOR3
 .L889:
-.LVL1184:
-	.loc 5 235 0
 	adrp	x1, .LANCHOR91
-	.loc 5 234 0
 	adrp	x24, .LANCHOR120
-	.loc 5 235 0
 	ldrh	w7, [x27]
 	add	x5, x20, 16
 	ldr	x6, [x1, #:lo12:.LANCHOR91]
-	.loc 5 236 0
 	adrp	x1, .LANCHOR92
-	.loc 5 234 0
 	ldr	x0, [x24, #:lo12:.LANCHOR120]
-	.loc 5 230 0
 	mov	w3, 0
-	.loc 5 236 0
 	ldr	x8, [x1, #:lo12:.LANCHOR92]
 	ldrh	w1, [x26]
 	ldrh	w10, [x25]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.LVL1185:
 .L880:
-	.loc 5 231 0 discriminator 1
 	cmp	x1, x5
 	bne	.L882
-	.loc 5 240 0
 	mov	w1, w3
 	str	w3, [x29, 108]
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1186:
 	ldr	w3, [x29, 108]
-	.loc 5 241 0
 	mov	x11, 0
 	ubfiz	x12, x3, 5, 16
-.LVL1187:
 .L883:
-	.loc 5 241 0 is_stmt 0 discriminator 1
 	cmp	x11, x12
 	bne	.L887
-	.loc 5 264 0 is_stmt 1
 	add	w19, w19, 1
-.LVL1188:
-	.loc 5 266 0
 	add	w22, w22, 1
-.LVL1189:
-	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL1190:
-	.loc 5 268 0
 	cmp	w28, w22
 	adrp	x1, .LANCHOR19
 	bls	.L888
 .L890:
-	.loc 5 274 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
 	bhi	.L889
 .L893:
-	.loc 5 227 0
 	mov	w2, 0
 	b	.L879
-.LVL1191:
 .L882:
-	.loc 5 232 0
 	ldrh	w4, [x5]
-.LVL1192:
-	.loc 5 233 0
 	cmp	w4, w23
 	beq	.L881
-	.loc 5 234 0
 	ubfiz	x2, x3, 5, 16
 	orr	w4, w19, w4, lsl 10
-.LVL1193:
 	add	x2, x0, x2
 	str	w4, [x2, 4]
-	.loc 5 235 0
 	mul	w4, w3, w7
 	asr	w4, w4, 2
 	add	x4, x6, x4, sxtw 2
 	str	x4, [x2, 8]
-	.loc 5 236 0
 	mul	w4, w3, w10
-	.loc 5 237 0
 	add	w3, w3, 1
-.LVL1194:
 	and	w3, w3, 65535
-.LVL1195:
-	.loc 5 236 0
 	asr	w4, w4, 2
 	add	x4, x8, x4, sxtw 2
 	str	x4, [x2, 16]
 .L881:
 	add	x5, x5, 2
-.LVL1196:
 	b	.L880
-.LVL1197:
 .L887:
-	.loc 5 242 0
 	ldr	x6, [x24, #:lo12:.LANCHOR120]
 	add	x5, x6, x11
 	ldr	w4, [x5, 4]
-.LVL1198:
-	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL1199:
 	and	w2, w0, 65535
-.LVL1200:
-	.loc 5 245 0
 	ldr	w0, [x6, x11]
-.LVL1201:
 	cbnz	w0, .L884
-	.loc 5 247 0
 	ldr	x0, [x5, 16]
-.LVL1202:
 	add	x11, x11, 32
-	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w23
 	bne	.L885
-	.loc 5 249 0
 	adrp	x0, .LANCHOR152
-.LVL1203:
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR152]
-.LVL1204:
 .L879:
-	.loc 5 282 0
 	strh	w19, [x20, 2]
-	.loc 5 281 0
 	mov	w0, -1
-	.loc 5 283 0
 	strb	w2, [x20, 6]
-	.loc 5 284 0
 	mov	w1, w19
-	.loc 5 281 0
 	strh	w0, [x21, #:lo12:.LANCHOR156]
-	.loc 5 284 0
 	mov	x0, x20
 	bl	ftl_sb_update_avl_pages
-.LVL1205:
-	.loc 5 285 0
 	b	.L891
-.LVL1206:
 .L885:
-	.loc 5 252 0
 	ldp	w2, w0, [x0, 8]
-.LVL1207:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL1208:
 	b	.L883
-.LVL1209:
 .L884:
-	.loc 5 256 0
 	adrp	x0, .LANCHOR42
 	ldrh	w1, [x20]
-	.loc 5 259 0
 	mov	w19, 0
-.LVL1210:
-	.loc 5 256 0
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
-	.loc 5 257 0
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
-.LVL1211:
-	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x20]
-.LVL1212:
-	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1213:
-	.loc 5 261 0
 	b	.L886
-.LVL1214:
 .L888:
-	.loc 5 268 0 discriminator 1
 	ldrh	w0, [x21, #:lo12:.LANCHOR156]
 	cmp	w0, w23
 	beq	.L890
-	.loc 5 269 0
 	add	w0, w0, w22
 	strh	w0, [x21, #:lo12:.LANCHOR156]
-	.loc 5 270 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
 	bls	.L890
-.LVL1215:
 .L891:
-	.loc 5 286 0
 	ldp	x19, x20, [sp, 16]
-.LVL1216:
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
-.LVL1217:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1218:
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE310:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
 	.global	FlashTestBlk
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB344:
-	.loc 1 197 0
-	.cfi_startproc
-.LVL1219:
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 1 197 0
 	and	w19, w0, 65535
-	.loc 1 202 0
 	cmp	w19, 11
 	bls	.L901
-.LVL1220:
-.LBB281:
-.LBB282:
-	.loc 1 207 0
 	add	x0, x29, 64
-.LVL1221:
-	.loc 1 208 0
 	mov	w2, 32
 	mov	w1, 165
-	.loc 1 206 0
 	adrp	x20, ftl_temp_buf
 	add	x20, x20, :lo12:ftl_temp_buf
-	.loc 1 207 0
 	stp	x20, x0, [x29, 40]
-	.loc 1 208 0
 	bl	ftl_memset
-.LVL1222:
-	.loc 1 210 0
 	lsl	w19, w19, 10
-.LVL1223:
-	.loc 1 209 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL1224:
-	.loc 1 211 0
 	mov	w2, 1
-	.loc 1 210 0
 	str	w19, [x29, 36]
-	.loc 1 211 0
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL1225:
-	.loc 1 212 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1226:
-	.loc 1 213 0
 	ldr	w0, [x29, 32]
-	.loc 1 219 0
 	mov	w2, 1
 	mov	w1, 0
-	.loc 1 213 0
 	cmp	w0, 0
-	.loc 1 219 0
 	add	x0, x29, 32
-	.loc 1 213 0
 	csetm	w19, ne
-.LDL1:
-.LVL1227:
-	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1228:
 .L899:
-.LBE282:
-.LBE281:
-	.loc 1 221 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1229:
 .L901:
-	.cfi_restore_state
-	.loc 1 203 0
 	mov	w19, 0
 	b	.L899
-	.cfi_endproc
-.LFE344:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
 	.global	FlashGetBadBlockList
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB345:
-	.loc 1 224 0
-	.cfi_startproc
-.LVL1230:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 1 227 0
 	mov	w2, 256
-	.loc 1 224 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 1 224 0
 	mov	x19, x0
 	mov	w20, w1
-	.loc 1 227 0
 	mov	w1, 255
-.LVL1231:
 	bl	ftl_memset
-.LVL1232:
-	.loc 1 228 0
 	adrp	x0, .LANCHOR105
 	mov	w1, w20
 	ldr	x2, [x0, #:lo12:.LANCHOR105]
 	mov	x0, x19
 	blr	x2
-.LVL1233:
 	and	w0, w0, 65535
-.LVL1234:
-	.loc 1 229 0
 	cmp	w0, 50
 	bls	.L904
-	.loc 1 230 0
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
-.LVL1235:
 	bl	ftl_memset
-.LVL1236:
-	.loc 1 231 0
 	mov	w0, 0
-.LVL1237:
 .L904:
-	.loc 1 233 0
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
 	bne	.L908
 	mov	x1, 0
 .L906:
-.LVL1238:
-	.loc 1 234 0 discriminator 1
 	cmp	w0, w1, uxth
 	bhi	.L907
-.LVL1239:
 .L908:
-	.loc 1 239 0
 	ldp	x19, x20, [sp, 16]
-.LVL1240:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1241:
 .L907:
-	.cfi_restore_state
-	.loc 1 235 0 discriminator 3
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
-.LVL1242:
 	add	x1, x1, 1
-.LVL1243:
 	b	.L906
-	.cfi_endproc
-.LFE345:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB347:
-	.loc 1 247 0
-	.cfi_startproc
-.LVL1244:
-	.loc 1 248 0
 	uxtw	x2, w2
 	b	memcpy
-.LVL1245:
-	.cfi_endproc
-.LFE347:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlBbmTblFlush
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
-.LFB226:
-	.loc 4 80 0
-	.cfi_startproc
-.LVL1246:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 4 88 0
 	adrp	x23, .LANCHOR108
-	.loc 4 80 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 4 87 0
 	adrp	x19, .LANCHOR106
-	.loc 4 80 0
 	stp	x21, x22, [sp, 32]
-	.loc 4 87 0
 	add	x20, x19, :lo12:.LANCHOR106
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	adrp	x22, .LANCHOR107
-	.loc 4 88 0
 	ldr	x1, [x23, #:lo12:.LANCHOR108]
-	.loc 4 80 0
 	stp	x25, x26, [sp, 64]
 	adrp	x21, .LANCHOR37
 	str	x27, [sp, 80]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.cfi_offset 27, -16
 	add	x25, x21, :lo12:.LANCHOR37
-	.loc 4 87 0
 	ldr	x0, [x22, #:lo12:.LANCHOR107]
-	.loc 4 91 0
 	adrp	x26, .LANCHOR10
-	.loc 4 88 0
 	stp	x0, x1, [x20, 8]
-	.loc 4 89 0
 	adrp	x1, .LANCHOR23
-	.loc 4 92 0
 	adrp	x27, .LANCHOR137
 	add	x25, x25, 32
-	.loc 4 89 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
-	.loc 4 91 0
 	mov	w24, 0
 	add	x26, x26, :lo12:.LANCHOR10
-	.loc 4 92 0
 	add	x27, x27, :lo12:.LANCHOR137
-	.loc 4 89 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1247:
 .L912:
-	.loc 4 91 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w24, w0
 	blt	.L913
-	.loc 4 94 0
 	add	x19, x19, :lo12:.LANCHOR106
-	.loc 4 98 0
 	add	x20, x21, :lo12:.LANCHOR37
-	.loc 4 95 0
 	mov	w2, 16
 	mov	w1, 255
-	.loc 4 108 0
 	adrp	x24, .LC97
-.LVL1248:
-	.loc 4 110 0
 	adrp	x26, .LANCHOR20
-	.loc 4 94 0
 	ldr	x27, [x19, 16]
-.LVL1249:
-	.loc 4 108 0
 	add	x24, x24, :lo12:.LC97
-	.loc 4 110 0
 	add	x26, x26, :lo12:.LANCHOR20
-	.loc 4 82 0
 	mov	w25, 0
-	.loc 4 95 0
 	mov	x0, x27
 	bl	ftl_memset
-.LVL1250:
-	.loc 4 97 0
 	mov	w0, -3887
 	strh	w0, [x27]
-	.loc 4 98 0
 	ldr	w0, [x20, 8]
 	str	w0, [x27, 4]
-	.loc 4 99 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR37]
-	.loc 4 84 0
 	mov	w21, 0
-	.loc 4 99 0
 	strh	w0, [x27, 2]
-	.loc 4 100 0
 	ldrh	w0, [x20, 4]
 	strh	w0, [x27, 8]
-	.loc 4 101 0
 	ldrh	w0, [x20, 6]
 	strh	w0, [x27, 10]
-	.loc 4 102 0
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.LVL1251:
 .L914:
-	.loc 4 108 0
 	ldrh	w4, [x27, 10]
-	.loc 4 107 0
 	ldrh	w1, [x20]
 	ldrh	w2, [x20, 2]
-	.loc 4 108 0
 	ldrh	w3, [x20, 4]
-	.loc 4 104 0
 	ldr	x0, [x22, #:lo12:.LANCHOR107]
 	str	x0, [x19, 8]
-	.loc 4 105 0
 	ldr	x0, [x23, #:lo12:.LANCHOR108]
 	str	x0, [x19, 16]
-	.loc 4 107 0
 	orr	w0, w2, w1, lsl 10
-	.loc 4 106 0
 	str	wzr, [x19]
-	.loc 4 107 0
 	str	w0, [x19, 4]
-	.loc 4 108 0
 	mov	x0, x24
 	bl	printf
-.LVL1252:
-	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL1253:
-	.loc 4 110 0
 	ldrh	w0, [x26]
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
 	blt	.L915
-	.loc 4 113 0
 	ldr	w0, [x20, 8]
-	.loc 4 122 0
 	mov	w2, 1
-	.loc 4 116 0
 	ldrh	w1, [x20, 4]
-	.loc 4 113 0
 	add	w0, w0, 1
 	str	w0, [x20, 8]
-	.loc 4 114 0
 	str	w0, [x27, 4]
-	.loc 4 115 0
 	ldrh	w0, [x20]
 	strh	w0, [x27, 8]
-	.loc 4 118 0
 	strh	w0, [x20, 4]
-	.loc 4 121 0
 	adrp	x0, .LANCHOR111
-	.loc 4 116 0
 	strh	w1, [x20]
-	.loc 4 119 0
 	lsl	w1, w1, 10
-	.loc 4 121 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	.loc 4 119 0
 	str	w1, [x19, 4]
-	.loc 4 117 0
 	strh	wzr, [x20, 2]
-	.loc 4 121 0
 	str	w1, [x0, 4]
-	.loc 4 122 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1254:
-	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1255:
 .L915:
-	.loc 4 126 0
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
 	strh	w0, [x20, 2]
-	.loc 4 127 0
 	ldr	w0, [x19]
 	cmn	w0, #1
 	bne	.L916
-	.loc 4 129 0
 	ldr	w1, [x19, 4]
-	.loc 4 130 0
 	add	w21, w21, 1
-.LVL1256:
-	.loc 4 129 0
 	adrp	x0, .LC98
-	.loc 4 130 0
 	and	w21, w21, 65535
-	.loc 4 129 0
 	add	x0, x0, :lo12:.LC98
 	bl	printf
-.LVL1257:
-	.loc 4 131 0
 	cmp	w21, 3
 	bls	.L914
-	.loc 4 132 0
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC99
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC99
 	bl	printf
-.LVL1258:
 .L918:
 	b	.L918
-.LVL1259:
 .L913:
-	.loc 4 92 0 discriminator 3
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
 	ldr	x0, [x20, 8]
 	mul	w3, w24, w2
 	lsl	w2, w2, 2
-	.loc 4 91 0 discriminator 3
 	add	w24, w24, 1
-.LVL1260:
-	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL1261:
 	b	.L912
-.LVL1262:
 .L919:
 	mov	w25, 1
-.LVL1263:
 	b	.L914
-.LVL1264:
 .L916:
-	.loc 4 139 0
 	cbz	w25, .L919
-	.loc 4 146 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
-.LVL1265:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1266:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1267:
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE226:
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-.LFB298:
-	.loc 2 2582 0
-	.cfi_startproc
-.LVL1268:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 2588 0
 	adrp	x28, .LANCHOR48
-	.loc 2 2582 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 2591 0
 	add	x23, x28, :lo12:.LANCHOR48
-	.loc 2 2582 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2588 0
 	adrp	x27, .LANCHOR45
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.loc 2 2582 0
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2588 0
 	add	x0, x27, :lo12:.LANCHOR45
-.LVL1269:
-	.loc 2 2582 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 2 2588 0
 	str	x0, [x29, 104]
-.LVL1270:
 .L922:
 	ldr	x1, [x29, 104]
 	adrp	x24, .LANCHOR5
@@ -12225,21 +6840,17 @@ allocate_data_superblock:
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
 	ble	.L923
-	.loc 2 2588 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2588
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1271:
 .L923:
-	.loc 2 2590 0 is_stmt 1
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
 	bne	.L948
-	.loc 2 2591 0
 	adrp	x1, .LANCHOR87
 	ldrh	w0, [x23]
 	ldr	w1, [x1, #:lo12:.LANCHOR87]
@@ -12247,141 +6858,103 @@ allocate_data_superblock:
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-.LVL1272:
-	.loc 2 2595 0
 	ands	w1, w1, 65535
 	beq	.L924
-	.loc 2 2596 0
 	sub	w1, w1, #1
-.LVL1273:
 	and	w1, w1, 65535
-.LVL1274:
 .L924:
-	.loc 2 2597 0
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
-.LVL1275:
 	and	w20, w0, 65535
-.LVL1276:
 	ldrh	w0, [x23]
 	cbnz	w0, .L925
-	.loc 2 2597 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2597
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1277:
 .L925:
-	.loc 2 2597 0 discriminator 3
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-	.loc 2 2600 0 is_stmt 1 discriminator 3
 	strh	w20, [x19]
-	.loc 2 2601 0 discriminator 3
 	mov	x0, x19
 	bl	make_superblock
-.LVL1278:
-	.loc 2 2602 0 discriminator 3
 	ldrb	w0, [x19, 7]
 	cbnz	w0, .L926
-	.loc 2 2606 0
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x20, 1, 16
 	mov	w2, -1
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	.loc 2 2607 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1279:
-	.loc 2 2608 0
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
 	ble	.L922
-	.loc 2 2608 0 is_stmt 0 discriminator 1
 	mov	w2, 2608
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1280:
 	b	.L922
-.LVL1281:
 .L948:
 	mov	w1, 0
 	b	.L924
-.LVL1282:
 .L926:
-	.loc 2 2611 0 is_stmt 1
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
 	ble	.L928
-	.loc 2 2611 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2611
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1283:
 .L928:
-	.loc 2 2614 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2615 0 discriminator 1
 	adrp	x25, .LANCHOR111
 	add	x26, x19, 16
 	mov	w21, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	x4, x26
 	ldr	x3, [x25, #:lo12:.LANCHOR111]
-	.loc 2 2617 0 discriminator 1
 	mov	w6, 65535
 	ubfiz	x0, x0, 5, 16
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
 .L929:
-.LVL1284:
-	.loc 2 2614 0 discriminator 1
 	cmp	x0, x1
 	bne	.L931
-	.loc 2 2622 0
 	cbnz	w21, .L932
-	.loc 2 2622 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2622
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1285:
 .L932:
-	.loc 2 2624 0 is_stmt 1
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
 	bne	.L933
-	.loc 2 2624 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2624
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1286:
 .L933:
-	.loc 2 2625 0 is_stmt 1
 	ldrb	w0, [x19, 8]
 	uxtw	x22, w20
 	adrp	x6, .LANCHOR43
@@ -12389,29 +6962,21 @@ allocate_data_superblock:
 	adrp	x5, .LANCHOR72
 	adrp	x4, .LANCHOR73
 	cbnz	w0, .L934
-	.loc 2 2626 0
 	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
 	cbz	w0, .L935
-	.loc 2 2627 0
 	ldrh	w3, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w3
 .L959:
-	.loc 2 2629 0
 	strh	w0, [x2, x1]
-	.loc 2 2631 0
 	mov	w1, 0
-	.loc 2 2630 0
 	ldr	w0, [x5, #:lo12:.LANCHOR72]
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR72]
-	.loc 2 2631 0
 	mov	w0, w20
 	bl	ftl_set_blk_mode
-.LVL1287:
 .L937:
-	.loc 2 2638 0
 	ldr	x0, [x6, #:lo12:.LANCHOR43]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
@@ -12419,10 +6984,8 @@ allocate_data_superblock:
 	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	cmp	w1, w2
 	bls	.L938
-	.loc 2 2639 0
 	str	w1, [x0, #:lo12:.LANCHOR76]
 .L938:
-	.loc 2 2641 0
 	ldr	w2, [x5, #:lo12:.LANCHOR72]
 	ldr	w1, [x4, #:lo12:.LANCHOR73]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
@@ -12431,83 +6994,50 @@ allocate_data_superblock:
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR74
 	str	w0, [x1, #:lo12:.LANCHOR74]
-	.loc 2 2642 0
 	adrp	x0, .LANCHOR127
 	ldr	x1, [x0, #:lo12:.LANCHOR127]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-.LVL1288:
-	.loc 2 2645 0
 	ldr	x0, [x25, #:lo12:.LANCHOR111]
 	ubfiz	x1, x21, 5, 16
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.LVL1289:
 .L939:
-	.loc 2 2644 0 discriminator 1
 	cmp	x1, x2
 	bne	.L940
-	.loc 2 2646 0
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
-	.loc 2 2648 0
 	mov	x24, 0
-	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1290:
-	.loc 2 2647 0
 	mov	w1, 0
-.LVL1291:
 .L941:
-	.loc 2 2648 0 discriminator 1
 	cmp	w21, w24, uxth
 	bhi	.L943
-	.loc 2 2659 0
 	cbz	w1, .L944
-	.loc 2 2660 0
 	mov	w0, w20
 	bl	update_multiplier_value
-.LVL1292:
-	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1293:
 .L944:
-	.loc 2 2664 0
 	ldrb	w0, [x19, 7]
 	adrp	x2, .LANCHOR42
 	cbnz	w0, .L945
-	.loc 2 2666 0
 	ldr	x0, [x2, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	.loc 2 2667 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1294:
-	.loc 2 2668 0
 	b	.L922
-.LVL1295:
 .L931:
-	.loc 2 2617 0
 	ldrh	w2, [x4]
-	.loc 2 2616 0
 	stp	xzr, xzr, [x1]
-	.loc 2 2617 0
 	cmp	w2, w6
 	beq	.L930
-	.loc 2 2618 0
 	ubfiz	x5, x21, 5, 16
-	.loc 2 2619 0
 	add	w21, w21, 1
-.LVL1296:
-	.loc 2 2618 0
 	add	x5, x3, x5
-	.loc 2 2619 0
 	and	w21, w21, 65535
-.LVL1297:
-	.loc 2 2618 0
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
 .L930:
@@ -12515,362 +7045,193 @@ allocate_data_superblock:
 	add	x4, x4, 2
 	b	.L929
 .L935:
-	.loc 2 2629 0
 	mov	w0, 2
 	b	.L959
 .L934:
-	.loc 2 2633 0
 	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 2634 0
 	ldr	w0, [x4, #:lo12:.LANCHOR73]
 	add	w0, w0, 1
 	str	w0, [x4, #:lo12:.LANCHOR73]
-.LVL1298:
-.LBB283:
-.LBB284:
 	mov	w0, w20
 	bl	ftl_set_blk_mode.part.6
-.LVL1299:
 	b	.L937
-.LVL1300:
 .L940:
-.LBE284:
-.LBE283:
-	.loc 2 2645 0 discriminator 3
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
 	b	.L939
-.LVL1301:
 .L943:
-	.loc 2 2649 0
 	ldr	x2, [x25, #:lo12:.LANCHOR111]
 	lsl	x0, x24, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
 	bne	.L942
-	.loc 2 2650 0
 	add	w1, w1, 1
-.LVL1302:
-	.loc 2 2651 0
 	ldr	w0, [x3, 4]
-	.loc 2 2650 0
 	stp	w2, w1, [x29, 96]
-.LVL1303:
-	.loc 2 2652 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1304:
-	.loc 2 2654 0
 	ldp	w2, w1, [x29, 96]
-	.loc 2 2653 0
 	strh	w2, [x26]
-	.loc 2 2654 0
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.LVL1305:
 .L942:
 	add	x24, x24, 1
-.LVL1306:
 	add	x26, x26, 2
 	b	.L941
-.LVL1307:
 .L945:
-	.loc 2 2671 0
 	adrp	x1, .LANCHOR19
-	.loc 2 2675 0
 	adrp	x3, .LANCHOR70
-	.loc 2 2674 0
 	strb	wzr, [x19, 6]
-	.loc 2 2671 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	.loc 2 2673 0
 	strh	wzr, [x19, 2]
-	.loc 2 2672 0
 	strh	w20, [x19]
-	.loc 2 2671 0
 	mul	w0, w0, w1
-	.loc 2 2675 0
 	ldr	w1, [x3, #:lo12:.LANCHOR70]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
 	str	w1, [x3, #:lo12:.LANCHOR70]
-	.loc 2 2676 0
 	ldr	x1, [x2, #:lo12:.LANCHOR42]
-	.loc 2 2671 0
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	.loc 2 2676 0
 	strh	w0, [x1, x22]
-	.loc 2 2677 0
 	ldrh	w0, [x19, 4]
 	cbz	w0, .L946
-	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	w0, [x19, 7]
 	cbnz	w0, .L947
 .L946:
-	.loc 2 2677 0 discriminator 3
 	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
 	mov	w2, 2677
 	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1308:
 .L947:
-	.loc 2 2679 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1309:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1310:
 	ldp	x23, x24, [sp, 48]
-.LVL1311:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE298:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeBadSuperBlk
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
-.LFB317:
-	.loc 5 390 0
-	.cfi_startproc
-.LVL1312:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 5 395 0
 	adrp	x21, .LANCHOR101
-	.loc 5 390 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
 	and	w25, w0, 65535
-	.loc 5 395 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR101]
-.LVL1313:
-	.loc 5 390 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 27, -16
-	.loc 5 395 0
 	cbz	w0, .L961
-.LBB287:
-.LBB288:
-	.loc 5 399 0
 	adrp	x23, .LANCHOR102
-	.loc 5 406 0
 	add	x24, x23, :lo12:.LANCHOR102
-.LBE288:
-.LBE287:
 	mov	w19, 0
 .L962:
-.LVL1314:
-.LBB291:
-.LBB289:
-	.loc 5 396 0
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
 	bhi	.L968
-	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1315:
 .L961:
-.LBE289:
-.LBE291:
-	.loc 5 415 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1316:
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1317:
 .L968:
-	.cfi_restore_state
-.LBB292:
-.LBB290:
-	.loc 5 397 0
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
-	.loc 5 398 0
 	add	x22, x21, :lo12:.LANCHOR101
 	mov	w20, 0
-	.loc 5 397 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
-.LVL1318:
 	and	w26, w0, 65535
-.LVL1319:
 .L963:
-	.loc 5 398 0
 	ldrh	w0, [x22]
 	cmp	w0, w20
 	bhi	.L967
-	.loc 5 396 0
 	add	w19, w19, 1
-.LVL1320:
 	and	w19, w19, 65535
-.LVL1321:
 	b	.L962
 .L967:
-	.loc 5 399 0
 	add	x0, x23, :lo12:.LANCHOR102
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
 	bne	.L964
-	.loc 5 401 0
 	mov	w1, w26
 	adrp	x0, .LC100
 	add	x0, x0, :lo12:.LC100
 	bl	printf
-.LVL1322:
-	.loc 5 403 0
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
-.LVL1323:
-	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1324:
-	.loc 5 405 0
 	ldrh	w1, [x22]
-	.loc 5 406 0
 	sxtw	x3, w27
 	and	x4, x20, 65535
-	.loc 5 405 0
 	mov	x0, 0
-.LVL1325:
 .L965:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
 	bhi	.L966
-	.loc 5 407 0
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.LVL1326:
 .L964:
-	.loc 5 398 0
 	and	w20, w27, 65535
-.LVL1327:
 	b	.L963
-.LVL1328:
 .L966:
-	.loc 5 406 0
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
-.LVL1329:
 	strh	w5, [x24, x2, lsl 1]
 	b	.L965
-.LBE290:
-.LBE292:
-	.cfi_endproc
-.LFE317:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
 	.global	update_vpc_list
 	.type	update_vpc_list, %function
 update_vpc_list:
-.LFB301:
-	.loc 2 2738 0
-	.cfi_startproc
-.LVL1330:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2739 0
 	adrp	x1, .LANCHOR42
-	.loc 2 2738 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 2738 0
 	and	w19, w0, 65535
-	.loc 2 2739 0
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
-.LVL1331:
 	ldrh	w0, [x1, x0]
 	cbnz	w0, .L974
-	.loc 2 2740 0
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w19
 	bne	.L975
-	.loc 2 2742 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR80]
 .L976:
-.LVL1332:
-.LBB295:
-.LBB296:
-	.loc 2 2747 0
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	adrp	x0, .LANCHOR41
 	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
-.LVL1333:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	cbnz	w0, .L978
 	adrp	x1, .LANCHOR158
@@ -12879,20 +7240,14 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1334:
 .L978:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 2748 0
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL1335:
-	.loc 2 2749 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL1336:
-	.loc 2 2750 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
@@ -12907,160 +7262,95 @@ update_vpc_list:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1337:
 .L982:
 	mov	w0, 1
 	b	.L973
-.LVL1338:
 .L975:
-.LBE296:
-.LBE295:
-	.loc 2 2743 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
 	beq	.L981
-	.loc 2 2743 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
 	beq	.L981
-	.loc 2 2743 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
 	bne	.L976
 .L981:
-	.loc 2 2745 0 is_stmt 1
 	mov	w0, 0
 .L973:
-	.loc 2 2756 0
 	ldp	x19, x20, [sp, 16]
-.LVL1339:
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
 .L974:
-	.cfi_restore_state
-	.loc 2 2753 0
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL1340:
 	b	.L981
-	.cfi_endproc
-.LFE301:
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
 	.global	decrement_vpc_count
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
-.LFB302:
-	.loc 2 2759 0
-	.cfi_startproc
-.LVL1341:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
 	and	w19, w0, 65535
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2762 0
 	mov	w0, 65535
-.LVL1342:
 	cmp	w19, w0
 	beq	.L985
-	.loc 2 2763 0
 	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
 	cbnz	w0, .L986
-	.loc 2 2764 0
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC101
 	add	x0, x0, :lo12:.LC101
 	bl	printf
-.LVL1343:
-	.loc 2 2765 0
 	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
 	cbz	w0, .L987
 .L992:
-.LVL1344:
-	.loc 2 2766 0 discriminator 1
 	mov	w20, 0
-.LVL1345:
 .L984:
-	.loc 2 2784 0
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1346:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1347:
 .L987:
-	.cfi_restore_state
-	.loc 2 2765 0 discriminator 1
 	mov	w2, 2765
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1348:
 	b	.L992
 .L986:
-	.loc 2 2768 0
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
 .L985:
-	.loc 2 2772 0
 	adrp	x21, .LANCHOR150
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR150]
 	cmp	w0, w1
 	bne	.L989
-	.loc 2 2773 0
 	strh	w19, [x21, #:lo12:.LANCHOR150]
 	b	.L992
 .L989:
-	.loc 2 2775 0
 	cmp	w19, w0
 	beq	.L992
-	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1349:
 	cmp	w0, 0
-	.loc 2 2781 0
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LANCHOR41
-	.loc 2 2780 0
 	strh	w19, [x21, #:lo12:.LANCHOR150]
-	.loc 2 2778 0
 	cset	w20, ne
-.LVL1350:
-	.loc 2 2781 0
 	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	sub	x0, x0, x1
@@ -13073,435 +7363,219 @@ decrement_vpc_count:
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
 	cbnz	w1, .L984
-	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	w19, w0, uxth
 	beq	.L984
-	.loc 2 2781 0 discriminator 2
 	mov	w2, 2781
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1351:
 	b	.L984
-	.cfi_endproc
-.LFE302:
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlWriteDump_data,"ax",@progbits
 	.align	2
 	.global	FtlWriteDump_data
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
-.LFB268:
-	.loc 2 996 0 is_stmt 1
-	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
-	.loc 2 997 0
 	adrp	x19, .LANCHOR51
 	add	x0, x19, :lo12:.LANCHOR51
-	.loc 2 996 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.loc 2 997 0
 	ldrh	w2, [x0, 4]
-	.loc 2 996 0
 	str	x25, [sp, 64]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 25, -64
-	.loc 2 997 0
 	cbz	w2, .L994
-	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	w1, [x0, 8]
 	cbnz	w1, .L994
-	.loc 2 998 0 is_stmt 1
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
 	beq	.L994
-.LVL1352:
-.LBB300:
-.LBB301:
-	.loc 2 1005 0
 	ldrb	w0, [x0, 10]
 	cbnz	w0, .L993
-	.loc 2 1000 0
 	adrp	x0, .LANCHOR61
-	.loc 2 1007 0
 	mov	w2, 0
 	add	x1, x29, 92
-	.loc 2 1000 0
 	ldr	w21, [x0, #:lo12:.LANCHOR61]
-	.loc 2 1002 0
 	adrp	x0, .LANCHOR3
-	.loc 2 1000 0
 	sub	w21, w21, #1
-	.loc 2 1002 0
 	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	.loc 2 1007 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1353:
-	.loc 2 1013 0
 	adrp	x2, .LANCHOR108
-	.loc 2 1012 0
 	adrp	x0, .LANCHOR107
-	.loc 2 1010 0
 	ldr	w1, [x29, 92]
-	.loc 2 1013 0
 	ldr	x20, [x2, #:lo12:.LANCHOR108]
-	.loc 2 1012 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	.loc 2 1016 0
 	cmn	w1, #1
-	.loc 2 1010 0
 	str	w1, [x29, 100]
-	.loc 2 1013 0
 	stp	x0, x20, [x29, 104]
-.LVL1354:
-	.loc 2 1011 0
 	str	w21, [x29, 120]
-	.loc 2 1015 0
 	str	wzr, [x20, 4]
-	.loc 2 1016 0
 	beq	.L996
-	.loc 2 1018 0
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1355:
 .L997:
-	.loc 2 1036 0
 	adrp	x23, .LANCHOR71
-	.loc 2 1002 0
 	lsl	w25, w25, 2
-.LVL1356:
-	.loc 2 1027 0
 	add	x22, x19, :lo12:.LANCHOR51
-	.loc 2 1036 0
 	add	x23, x23, :lo12:.LANCHOR71
-	.loc 2 1024 0
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
 .L998:
-	.loc 2 1025 0
 	cmp	w25, w24
 	bne	.L1002
 .L999:
-	.loc 2 1041 0
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.LVL1357:
 .L993:
-.LBE301:
-.LBE300:
-	.loc 2 1049 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1358:
 .L996:
-	.cfi_restore_state
-.LBB303:
-.LBB302:
-	.loc 2 1022 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1359:
 	b	.L997
-.LVL1360:
 .L1002:
-	.loc 2 1027 0
 	ldrh	w0, [x22, 4]
 	cbz	w0, .L999
-	.loc 2 1032 0
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
 	stp	w21, w0, [x20, 8]
-	.loc 2 1033 0
 	ldrh	w0, [x22]
 	strh	w0, [x20, 2]
-	.loc 2 1035 0
 	mov	x0, x22
 	bl	get_new_active_ppa
-.LVL1361:
 	str	w0, [x29, 100]
-	.loc 2 1036 0
 	ldr	w0, [x23]
-	.loc 2 1037 0
 	mov	w3, 0
-	.loc 2 1036 0
 	str	w0, [x20, 4]
-	.loc 2 1037 0
 	mov	w2, 0
-	.loc 2 1036 0
 	add	w0, w0, 1
-	.loc 2 1037 0
 	mov	w1, 1
-	.loc 2 1036 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x23]
-	.loc 2 1037 0
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1362:
-	.loc 2 1039 0
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-.LVL1363:
 	b	.L998
-.LVL1364:
 .L994:
-.LBE302:
-.LBE303:
-	.loc 2 1047 0
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
-	.loc 2 1049 0
 	b	.L993
-	.cfi_endproc
-.LFE268:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
 	.section	.text.l2p_flush,"ax",@progbits
 	.align	2
 	.global	l2p_flush
 	.type	l2p_flush, %function
 l2p_flush:
-.LFB261:
-	.loc 2 789 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 795 0
 	adrp	x20, .LANCHOR33
 	add	x20, x20, :lo12:.LANCHOR33
-	.loc 2 789 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 795 0
 	mov	w19, 0
-	.loc 2 796 0
 	adrp	x21, .LANCHOR55
-	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1365:
 .L1012:
-	.loc 2 795 0 discriminator 1
 	ldrh	w0, [x20]
 	cmp	w0, w19
 	bhi	.L1014
-	.loc 2 799 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1366:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1367:
 .L1014:
-	.cfi_restore_state
-	.loc 2 796 0
 	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
 	tbz	w0, #31, .L1013
-	.loc 2 797 0
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1368:
 .L1013:
-	.loc 2 795 0 discriminator 2
 	add	w19, w19, 1
-.LVL1369:
 	and	w19, w19, 65535
-.LVL1370:
 	b	.L1012
-	.cfi_endproc
-.LFE261:
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.FtlRecoverySuperblock,"ax",@progbits
 	.align	2
 	.global	FtlRecoverySuperblock
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-.LFB281:
-	.loc 2 1705 0
-	.cfi_startproc
-.LVL1371:
 	stp	x29, x30, [sp, -192]!
-	.cfi_def_cfa_offset 192
-	.cfi_offset 29, -192
-	.cfi_offset 30, -184
-	.loc 2 1719 0
 	mov	w1, 65535
-	.loc 2 1705 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -176
-	.cfi_offset 20, -168
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1719 0
 	ldrh	w0, [x0]
-.LVL1372:
-	.loc 2 1705 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.loc 2 1719 0
 	cmp	w0, w1
-	.loc 2 1705 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 21, -160
-	.cfi_offset 22, -152
-	.cfi_offset 23, -144
-	.cfi_offset 24, -136
-	.cfi_offset 25, -128
-	.cfi_offset 26, -120
-	.cfi_offset 27, -112
-	.cfi_offset 28, -104
-	.loc 2 1719 0
 	beq	.L1140
-	.loc 2 1725 0
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
-	.loc 2 1730 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1724 0
 	ldrh	w26, [x19, 2]
-.LVL1373:
 	str	x0, [x29, 128]
-	.loc 2 1730 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
 	bne	.L1019
-	.loc 2 1731 0
 	strh	wzr, [x19, 4]
-.LVL1374:
 .L1146:
-	.loc 2 1758 0
 	strb	wzr, [x19, 6]
-.LVL1375:
 .L1140:
-	.loc 2 2059 0
 	ldp	x19, x20, [sp, 16]
-.LVL1376:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1377:
 .L1019:
-	.cfi_restore_state
-	.loc 2 1738 0
 	ldrh	w0, [x19, 16]
-.LVL1378:
-	.loc 2 1737 0
 	mov	w20, 0
-.LVL1379:
 .L1020:
-	.loc 2 1739 0
 	cmp	w0, w1
 	beq	.L1021
-	.loc 2 1746 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1380:
 	mov	w23, w0
-.LVL1381:
-	.loc 2 1754 0
 	cmn	w0, #1
 	beq	.L1022
-	.loc 2 1770 0
 	adrp	x1, .LANCHOR91
-	.loc 2 1766 0
 	adrp	x2, .LANCHOR3
-	.loc 2 1769 0
 	adrp	x20, .LANCHOR120
-.LVL1382:
-	.loc 2 1771 0
 	add	x4, x19, 16
-	.loc 2 1770 0
 	ldr	x5, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR23
-	.loc 2 1769 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1383:
-	.loc 2 1771 0
 	mov	w22, 0
-	.loc 2 1770 0
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	.loc 2 1771 0
 	adrp	x1, .LANCHOR92
-	.loc 2 1768 0
 	mov	w10, 65535
 	str	x2, [x29, 152]
-	.loc 2 1771 0
 	ldr	x7, [x1, #:lo12:.LANCHOR92]
 	adrp	x1, .LANCHOR24
 	ldrh	w8, [x1, #:lo12:.LANCHOR24]
@@ -13511,67 +7585,39 @@ FtlRecoverySuperblock:
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
 .L1023:
-.LVL1384:
-	.loc 2 1766 0 discriminator 1
 	cmp	x4, x1
 	bne	.L1027
-	.loc 2 1776 0
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-.LVL1385:
-	.loc 2 1777 0
 	adrp	x0, .LANCHOR71
-	.loc 2 1779 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1791 0
 	and	w10, w23, 65535
-	.loc 2 1782 0
 	add	x7, x0, :lo12:.LANCHOR71
-	.loc 2 1777 0
 	ldr	w21, [x0, #:lo12:.LANCHOR71]
 	mov	x11, x4
-	.loc 2 1715 0
 	mov	w6, 65535
-	.loc 2 1778 0
 	mov	w3, 0
-	.loc 2 1777 0
 	sub	w21, w21, #1
-.LVL1386:
 	str	x0, [x29, 144]
-.LVL1387:
 .L1028:
-	.loc 2 1778 0 discriminator 1
 	cmp	w22, w3
 	bne	.L1033
-	.loc 2 1796 0
 	add	w22, w23, 1
-.LVL1388:
-	.loc 2 1798 0
 	ldr	w0, [x4, 4]
-	.loc 2 1796 0
 	and	w22, w22, 65535
-.LVL1389:
 .L1142:
-	.loc 2 1802 0
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1390:
 	and	w27, w0, 65535
-.LVL1391:
-	.loc 2 1807 0
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
 	bne	.L1035
-	.loc 2 1808 0
 	strh	w22, [x19, 2]
-	.loc 2 1809 0
 	strb	wzr, [x19, 6]
-	.loc 2 1810 0
 	strh	wzr, [x19, 4]
 .L1035:
-	.loc 2 1813 0
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
@@ -13579,578 +7625,350 @@ FtlRecoverySuperblock:
 	cset	w0, eq
 	tst	w1, w0
 	beq	.L1036
-.LVL1392:
 .L1147:
-	.loc 2 2053 0
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-.LVL1393:
 	b	.L1140
-.LVL1394:
 .L1021:
-	.loc 2 1740 0
 	add	w20, w20, 1
-.LVL1395:
 	and	w20, w20, 65535
-.LVL1396:
-	.loc 2 1741 0
 	add	x0, x19, x20, sxtw 1
-.LVL1397:
 	ldrh	w0, [x0, 16]
-.LVL1398:
 	b	.L1020
-.LVL1399:
 .L1022:
-	.loc 2 1755 0
 	cbz	w26, .L1024
-	.loc 2 1755 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
-.LVL1400:
 	mov	w2, 1755
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1401:
 .L1024:
-	.loc 2 1756 0 is_stmt 1
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
 	beq	.L1025
-	.loc 2 1756 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
 	mov	w2, 1756
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1402:
 .L1025:
-	.loc 2 1757 0 is_stmt 1
 	strh	wzr, [x19, 2]
 	b	.L1146
-.LVL1403:
 .L1027:
-	.loc 2 1767 0
 	ldrh	w3, [x4]
-.LVL1404:
-	.loc 2 1768 0
 	cmp	w3, w10
 	beq	.L1026
-	.loc 2 1769 0
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
-.LVL1405:
 	add	x2, x0, x2
 	str	w3, [x2, 4]
-	.loc 2 1770 0
 	mul	w3, w22, w6
 	asr	w3, w3, 2
 	add	x3, x5, x3, sxtw 2
 	str	x3, [x2, 8]
-	.loc 2 1771 0
 	mul	w3, w22, w8
-	.loc 2 1772 0
 	add	w22, w22, 1
-.LVL1406:
 	and	w22, w22, 65535
-.LVL1407:
-	.loc 2 1771 0
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
 .L1026:
 	add	x4, x4, 2
-.LVL1408:
 	b	.L1023
-.LVL1409:
 .L1033:
-	.loc 2 1779 0
 	ldr	w0, [x11]
 	cbnz	w0, .L1029
-	.loc 2 1780 0
 	ldr	x8, [x11, 16]
-.LVL1410:
-	.loc 2 1781 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
 	beq	.L1030
-	.loc 2 1782 0
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1411:
 	cbz	w0, .L1030
-	.loc 2 1784 0
 	add	w5, w5, 1
 	str	w5, [x7]
 .L1030:
-	.loc 2 1787 0
 	ldr	w0, [x8]
 	cmn	w0, #1
 	bne	.L1032
-	.loc 2 1802 0
 	ubfiz	x3, x3, 5, 16
-.LVL1412:
-	.loc 2 1801 0
 	and	w22, w23, 65535
-.LVL1413:
-	.loc 2 1802 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
 	b	.L1142
-.LVL1414:
 .L1029:
-	.loc 2 1791 0
 	mov	w6, w10
-.LVL1415:
 .L1032:
-	.loc 2 1778 0 discriminator 2
 	add	w3, w3, 1
-.LVL1416:
 	add	x11, x11, 32
 	and	w3, w3, 65535
-.LVL1417:
 	b	.L1028
-.LVL1418:
 .L1036:
-	.loc 2 1819 0
 	mov	w0, 65535
 	cmp	w6, w0
 	bne	.L1037
-	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	w0, [x19, 8]
 	cbnz	w0, .L1038
 .L1037:
-.LVL1419:
-.LBB304:
-	.loc 2 1824 0 is_stmt 1
 	adrp	x25, .LANCHOR153
-	.loc 2 1823 0
 	and	w28, w23, 65535
-.LVL1420:
-	.loc 2 1824 0
 	ldr	w0, [x25, #:lo12:.LANCHOR153]
 	cmn	w0, #1
 	bne	.L1039
-	.loc 2 1825 0
 	str	w21, [x25, #:lo12:.LANCHOR153]
 .L1039:
-.LVL1421:
-	.loc 2 1827 0
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
 	bge	.L1089
-	.loc 2 1828 0
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.LVL1422:
 .L1040:
-	.loc 2 1831 0 discriminator 1
 	ldr	x0, [x29, 152]
-	.loc 2 1833 0 discriminator 1
 	mov	w3, 65535
 	mov	w5, 1
-	.loc 2 1831 0 discriminator 1
 	add	x4, x0, :lo12:.LANCHOR3
-.LVL1423:
 .L1041:
-	.loc 2 1829 0 discriminator 1
 	cmp	w24, w28
 	bhi	.L1051
 	ldrh	w1, [x4]
-	.loc 2 1834 0
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
 	b	.L1052
-.LVL1424:
 .L1089:
 	mov	w24, w26
 	b	.L1040
-.LVL1425:
 .L1043:
-	.loc 2 1832 0
 	ldrh	w6, [x2]
-.LVL1426:
-	.loc 2 1833 0
 	cmp	w6, w3
 	beq	.L1042
-	.loc 2 1834 0
 	ubfiz	x7, x23, 5, 16
-	.loc 2 1835 0
 	add	w23, w23, 1
-.LVL1427:
-	.loc 2 1834 0
 	add	x7, x0, x7
-	.loc 2 1835 0
 	and	w23, w23, 65535
-.LVL1428:
-	.loc 2 1834 0
 	orr	w6, w24, w6, lsl 10
-.LVL1429:
 	str	w6, [x7, 4]
 .L1042:
 	add	x2, x2, 2
-.LVL1430:
 .L1052:
-	.loc 2 1831 0 discriminator 1
 	cmp	x2, x1
 	bne	.L1043
-	.loc 2 1838 0
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
 	ubfiz	x23, x23, 5, 16
-.LVL1431:
 	str	w3, [x29, 120]
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-.LVL1432:
-	.loc 2 1840 0
 	ldr	x2, [x20, #:lo12:.LANCHOR120]
 	ldr	w1, [x25, #:lo12:.LANCHOR153]
-	.loc 2 1839 0
 	ldr	w5, [x29, 112]
 	add	x0, x2, 16
 	ldr	w3, [x29, 120]
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.LVL1433:
 .L1044:
-	.loc 2 1839 0 is_stmt 0 discriminator 1
 	cmp	x23, x0
 	bne	.L1049
 	cbz	w2, .L1050
 	str	w1, [x25, #:lo12:.LANCHOR153]
 .L1050:
-	.loc 2 1829 0 is_stmt 1
 	add	w24, w24, 1
-.LVL1434:
 	and	w24, w24, 65535
-.LVL1435:
 	b	.L1041
 .L1049:
-	.loc 2 1840 0
 	ldr	w6, [x0, -16]
 	cbz	w6, .L1045
 	cbz	w2, .L1038
 	str	w1, [x25, #:lo12:.LANCHOR153]
-.LVL1436:
 .L1038:
-.LBE304:
-	.loc 2 1863 0
 	mov	w1, 1
 	adrp	x0, .LANCHOR161
-	.loc 2 1864 0
 	mov	w23, w26
-	.loc 2 2024 0
 	adrp	x28, .LANCHOR153
-	.loc 2 1863 0
 	strh	w1, [x0, #:lo12:.LANCHOR161]
-	.loc 2 1864 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1437:
-.LBB305:
-	.loc 2 1946 0
 	add	x0, x28, :lo12:.LANCHOR153
 	str	x0, [x29, 104]
-.LVL1438:
 .L1053:
 	ldr	x1, [x29, 152]
-.LBE305:
-	.loc 2 1869 0
 	mov	w24, 0
-	.loc 2 1873 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1872 0
 	mov	w5, 65535
-	.loc 2 1870 0
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.LVL1439:
 .L1054:
-	.loc 2 1870 0 is_stmt 0 discriminator 1
 	cmp	x1, x2
 	bne	.L1056
-	.loc 2 1877 0 is_stmt 1
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
-.LVL1440:
-	.loc 2 1878 0
 	mov	x25, 0
 	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 112]
-	.loc 2 2018 0
 	adrp	x0, .LANCHOR162
 	add	x0, x0, :lo12:.LANCHOR162
 	str	x0, [x29, 120]
-.LVL1441:
 .L1057:
-	.loc 2 1878 0 discriminator 1
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
 	bne	.L1083
-	.loc 2 2032 0
 	ldr	x0, [x29, 128]
-	.loc 2 2031 0
 	add	w23, w23, 1
-.LVL1442:
 	and	w23, w23, 65535
-.LVL1443:
-	.loc 2 2032 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
 	bne	.L1053
-	.loc 2 2035 0
 	ldr	x0, [x29, 152]
-	.loc 2 2037 0
 	mov	w2, 65535
-	.loc 2 2033 0
 	strh	w23, [x19, 2]
-	.loc 2 2034 0
 	strh	wzr, [x19, 4]
-.LVL1444:
-	.loc 2 2035 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.LVL1445:
 .L1084:
-	.loc 2 2035 0 is_stmt 0 discriminator 1
 	cmp	w0, w1
 	beq	.L1140
-.LVL1446:
-	.loc 2 2037 0 is_stmt 1
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
-.LVL1447:
 	cmp	w3, w2
 	beq	.L1085
-	.loc 2 2038 0
 	strb	w0, [x19, 6]
-.LVL1448:
-	.loc 2 2039 0
 	b	.L1140
-.LVL1449:
 .L1045:
-.LBB306:
-	.loc 2 1841 0
 	ldr	x6, [x0]
-.LVL1450:
-	.loc 2 1842 0
 	ldrh	w7, [x6]
 	cmp	w7, w3
 	beq	.L1048
-	.loc 2 1844 0
 	ldr	w6, [x6, 4]
-.LVL1451:
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
 .L1048:
 	add	x0, x0, 32
-.LVL1452:
 	b	.L1044
-.LVL1453:
 .L1051:
-	.loc 2 1858 0
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR153]
 	b	.L1038
-.LVL1454:
 .L1056:
-.LBE306:
-	.loc 2 1871 0
 	ldrh	w3, [x2]
-.LVL1455:
-	.loc 2 1872 0
 	cmp	w3, w5
 	beq	.L1055
-	.loc 2 1873 0
 	ubfiz	x4, x24, 5, 16
-	.loc 2 1874 0
 	add	w24, w24, 1
-.LVL1456:
-	.loc 2 1873 0
 	add	x4, x0, x4
-	.loc 2 1874 0
 	and	w24, w24, 65535
-.LVL1457:
-	.loc 2 1873 0
 	orr	w3, w23, w3, lsl 10
-.LVL1458:
 	str	w3, [x4, 4]
 .L1055:
 	add	x2, x2, 2
-.LVL1459:
 	b	.L1054
-.LVL1460:
 .L1083:
-	.loc 2 1879 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 188]
-	.loc 2 1880 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1461:
 	and	w0, w0, 65535
-.LVL1462:
-	.loc 2 1882 0
 	cmp	w23, w26
 	bcc	.L1058
-	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
 	bhi	.L1058
-	.loc 2 1886 0 is_stmt 1
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
 	beq	.L1059
-.LVL1463:
-	.loc 2 1890 0
 	ldr	w0, [x4]
-.LVL1464:
 	cmn	w0, #1
 	beq	.L1060
-	.loc 2 1891 0
 	ldr	x3, [x4, 16]
-.LVL1465:
-	.loc 2 1892 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
 	beq	.L1061
-.LVL1466:
 .L1067:
-.LBB307:
-	.loc 2 1925 0
 	ldrh	w0, [x19]
-.LVL1467:
 .L1145:
-.LBE307:
-	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1468:
 .L1058:
 	add	x25, x25, 32
 	b	.L1057
-.LVL1469:
 .L1061:
-	.loc 2 1898 0
 	ldr	w21, [x3, 4]
-.LVL1470:
-	.loc 2 1899 0
 	cmn	w21, #1
 	beq	.L1062
-	.loc 2 1900 0 discriminator 1
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1471:
-	.loc 2 1899 0 discriminator 1
 	cbz	w0, .L1062
-	.loc 2 1902 0
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR71]
 .L1062:
-	.loc 2 1907 0
 	ldp	w24, w0, [x3, 8]
-	.loc 2 1908 0
 	add	x1, x29, 184
-	.loc 2 1907 0
 	str	w0, [x29, 180]
-	.loc 2 1908 0
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-.LVL1472:
-	.loc 2 1909 0
 	ldr	w1, [x28, #:lo12:.LANCHOR153]
 	cmn	w1, #1
 	beq	.L1063
-	.loc 2 1910 0 discriminator 1
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1473:
-	.loc 2 1909 0 discriminator 1
 	cbz	w0, .L1063
-.LBB308:
-	.loc 2 1914 0
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
 	beq	.L1064
-	.loc 2 1915 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1917 0
 	mov	w2, 0
-	.loc 2 1915 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
-	.loc 2 1916 0
 	str	w1, [x0, 4]
-	.loc 2 1917 0
 	mov	w1, 1
-	.loc 2 1915 0
 	str	x3, [x29, 136]
-.LVL1474:
-	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1475:
-	.loc 2 1930 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	x3, [x29, 136]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
 	bne	.L1065
-.LVL1476:
 .L1066:
-	.loc 2 1962 0
 	mov	w0, -1
 	str	w0, [x29, 180]
-	.loc 2 1963 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1477:
 .L1074:
-.LBE308:
-	.loc 2 2003 0
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
 	beq	.L1058
 .L1088:
-	.loc 2 2005 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1478:
 	and	w24, w0, 65535
-	.loc 2 2006 0
 	adrp	x0, .LANCHOR5
-	.loc 2 2005 0
 	mov	w3, w24
-.LVL1479:
-	.loc 2 2006 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
 	bhi	.L1079
-	.loc 2 2006 0 is_stmt 0 discriminator 1
 	mov	w2, 2006
 	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
@@ -14158,345 +7976,207 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC1
 	str	w24, [x29, 136]
 	bl	printf
-.LVL1480:
 	ldr	w3, [x29, 136]
-.LVL1481:
 .L1079:
-	.loc 2 2007 0 is_stmt 1
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cbz	w0, .L1080
-	.loc 2 2009 0
 	mov	w0, w3
 	b	.L1145
-.LVL1482:
 .L1064:
-.LBB309:
-	.loc 2 1921 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
 	bne	.L1067
-	.loc 2 1922 0
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.LVL1483:
 	b	.L1067
-.LVL1484:
 .L1065:
-	.loc 2 1930 0 discriminator 1
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
 	bne	.L1066
-	.loc 2 1918 0 discriminator 2
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
-.LVL1485:
 	str	x3, [x29, 96]
-	.loc 2 1931 0 discriminator 2
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	bl	ftl_cmp_data_ver
-.LVL1486:
-	.loc 2 1930 0 discriminator 2
 	cbz	w0, .L1066
-	.loc 2 1932 0
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
 	cmp	w0, w1
-	.loc 2 1934 0
 	ldr	w1, [x29, 180]
-	.loc 2 1932 0
 	bne	.L1069
 .L1143:
-	.loc 2 1958 0
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-.LVL1487:
 	b	.L1066
 .L1069:
-	.loc 2 1935 0
 	cmp	w0, w1
 	beq	.L1066
-	.loc 2 1936 0
 	cmn	w0, #1
 	beq	.L1070
-.LVL1488:
-	.loc 2 1937 0
 	ldr	x3, [x4, 16]
-	.loc 2 1939 0
 	mov	w2, 0
-	.loc 2 1938 0
 	str	w0, [x4, 4]
-	.loc 2 1939 0
 	mov	w1, 1
-	.loc 2 1937 0
 	str	x3, [x29, 96]
-	.loc 2 1939 0
 	mov	x0, x4
 	bl	FlashReadPages
-.LVL1489:
 	ldr	x3, [x29, 96]
-.LVL1490:
 .L1071:
-	.loc 2 1944 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
 	beq	.L1072
-	.loc 2 1946 0
 	ldr	x0, [x29, 104]
-	.loc 2 1945 0
 	ldr	w3, [x3, 4]
-.LVL1491:
-	.loc 2 1946 0
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-.LVL1492:
 	cbz	w0, .L1072
-	.loc 2 1947 0
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1493:
 	cbz	w0, .L1066
-.LVL1494:
 .L1072:
-	.loc 2 1958 0
 	ldr	w1, [x29, 180]
 	b	.L1143
 .L1070:
-	.loc 2 1941 0
 	str	w0, [x4]
 	b	.L1071
 .L1063:
-.LBE309:
-	.loc 2 1964 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
 	beq	.L1074
-	.loc 2 1966 0
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
-.LVL1495:
-	.loc 2 1967 0
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
 	beq	.L1074
-	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
 	beq	.L1088
-	.loc 2 1968 0 is_stmt 1
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1496:
-	.loc 2 1970 0
 	adrp	x1, .LANCHOR51
-	.loc 2 1968 0
 	and	w0, w0, 65535
-.LVL1497:
-	.loc 2 1970 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
 	beq	.L1078
-	.loc 2 1971 0 discriminator 1
 	adrp	x1, .LANCHOR52
-	.loc 2 1970 0 discriminator 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
 	beq	.L1078
-	.loc 2 1972 0
 	adrp	x1, .LANCHOR53
-	.loc 2 1971 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
 	bne	.L1074
 .L1078:
-.LVL1498:
-.LBB310:
-	.loc 2 1976 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1499:
-	.loc 2 1979 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 2 1976 0
 	ldr	x4, [x0, 16]
-	.loc 2 1978 0
 	str	w3, [x0, 4]
-	.loc 2 1976 0
 	str	x4, [x29, 136]
-.LVL1500:
-	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1501:
-	.loc 2 1982 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0]
 	cmn	w0, #1
 	beq	.L1074
-	.loc 2 1983 0
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-.LVL1502:
 	cbnz	w0, .L1074
-	.loc 2 1990 0
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-.LVL1503:
 	b	.L1074
-.LVL1504:
 .L1080:
-.LBE310:
-	.loc 2 2011 0
 	mov	w1, w24
 	adrp	x0, .LC102
 	add	x0, x0, :lo12:.LC102
 	bl	printf
-.LVL1505:
 	b	.L1058
-.LVL1506:
 .L1060:
-	.loc 2 2018 0
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
 	bhi	.L1081
-	.loc 2 2019 0
 	adrp	x1, .LANCHOR163
 	add	x1, x1, :lo12:.LANCHOR163
 	str	w5, [x1, w0, uxtw 2]
-	.loc 2 2020 0
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
 .L1081:
-	.loc 2 2022 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1507:
-	.loc 2 2024 0
 	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	cmn	w0, #1
 	bne	.L1082
 .L1144:
-	.loc 2 2027 0
 	str	w21, [x28, #:lo12:.LANCHOR153]
 	b	.L1058
 .L1082:
-	.loc 2 2026 0
 	cmp	w21, w0
 	bcs	.L1058
 	b	.L1144
-.LVL1508:
 .L1085:
-	.loc 2 2035 0 discriminator 2
 	add	w0, w0, 1
-.LVL1509:
 	and	w0, w0, 65535
-.LVL1510:
 	b	.L1084
-.LVL1511:
 .L1059:
-	.loc 2 2051 0
 	strb	w27, [x19, 6]
-	.loc 2 2052 0
 	strh	w22, [x19, 2]
 	b	.L1147
-	.cfi_endproc
-.LFE281:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
 	.global	FtlSuperblockPowerLostFix
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
-.LFB288:
-	.loc 2 2205 0
-	.cfi_startproc
-.LVL1512:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 2 2213 0
 	adrp	x1, .LANCHOR108
-	.loc 2 2205 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 2211 0
 	mov	w0, -1
-.LVL1513:
-	.loc 2 2213 0
 	ldr	x20, [x1, #:lo12:.LANCHOR108]
-	.loc 2 2211 0
 	str	w0, [x29, 72]
-	.loc 2 2212 0
 	adrp	x0, .LANCHOR107
-	.loc 2 2205 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 2 2216 0
 	mov	w1, -3
-	.loc 2 2212 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	.loc 2 2229 0
 	adrp	x21, .LANCHOR71
-	.loc 2 2213 0
 	str	x20, [x29, 64]
-.LVL1514:
-	.loc 2 2229 0
 	add	x21, x21, :lo12:.LANCHOR71
-	.loc 2 2212 0
 	str	x0, [x29, 56]
-	.loc 2 2223 0
 	mov	w22, 7
-	.loc 2 2216 0
 	str	w1, [x20, 8]
-	.loc 2 2217 0
 	mov	w1, -2
 	str	w1, [x20, 12]
-	.loc 2 2218 0
 	ldrh	w1, [x19]
 	strh	w1, [x20, 2]
-	.loc 2 2219 0
 	strh	wzr, [x20]
-	.loc 2 2220 0
 	mov	w1, 61589
 	str	w1, [x0]
-	.loc 2 2221 0
 	mov	w1, 22136
 	movk	w1, 0x1234, lsl 16
 	str	w1, [x0, 4]
-.LVL1515:
 .L1149:
-	.loc 2 2223 0
 	subs	w22, w22, #1
-.LVL1516:
 	beq	.L1151
-.LVL1517:
-	.loc 2 2224 0
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L1150
-.LVL1518:
 .L1151:
-	.loc 2 2234 0
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
@@ -14505,741 +8185,426 @@ FtlSuperblockPowerLostFix:
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2235 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2236 0
 	strb	wzr, [x19, 6]
-	.loc 2 2237 0
 	strh	wzr, [x19, 4]
-	.loc 2 2235 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	strh	w0, [x19, 2]
-	.loc 2 2238 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1519:
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1520:
 .L1150:
-	.cfi_restore_state
-	.loc 2 2226 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1521:
 	str	w0, [x29, 52]
-	.loc 2 2227 0
 	cmn	w0, #1
 	beq	.L1151
-	.loc 2 2229 0
 	ldr	w0, [x21]
-	.loc 2 2230 0
 	mov	w3, 0
-	.loc 2 2229 0
 	str	w0, [x20, 4]
-	.loc 2 2230 0
 	mov	w2, 0
-	.loc 2 2229 0
 	add	w0, w0, 1
-	.loc 2 2230 0
 	mov	w1, 1
-	.loc 2 2229 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x21]
-	.loc 2 2230 0
 	add	x0, x29, 48
 	bl	FlashProgPages
-.LVL1522:
-	.loc 2 2231 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1523:
 	b	.L1149
-	.cfi_endproc
-.LFE288:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
 	.global	FtlLoadBbt
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
-.LFB229:
-	.loc 4 173 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 4 180 0
 	adrp	x23, .LANCHOR107
-	.loc 4 173 0
 	stp	x19, x20, [sp, 16]
-	.loc 4 184 0
 	adrp	x24, .LANCHOR17
-	.loc 4 173 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.loc 4 180 0
 	adrp	x22, .LANCHOR106
 	add	x20, x22, :lo12:.LANCHOR106
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 4 173 0
 	str	x25, [sp, 64]
-	.cfi_offset 25, -16
-	.loc 4 196 0
 	mov	w25, 61649
-	.loc 4 180 0
 	str	x0, [x20, 8]
-	.loc 4 181 0
 	adrp	x0, .LANCHOR108
 	ldr	x21, [x0, #:lo12:.LANCHOR108]
 	str	x21, [x20, 16]
-.LVL1524:
-	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1525:
-	.loc 4 184 0
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1526:
 .L1161:
-	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
 	bgt	.L1164
-	.loc 4 185 0 is_stmt 1
 	lsl	w0, w19, 10
-	.loc 4 186 0
 	mov	w2, 1
-	.loc 4 185 0
 	str	w0, [x20, 4]
-	.loc 4 186 0
 	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1527:
-	.loc 4 187 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	bne	.L1162
-	.loc 4 188 0
 	ldr	w0, [x20, 4]
-	.loc 4 189 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 4 188 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-	.loc 4 189 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1528:
 .L1162:
-	.loc 4 191 0
 	ldr	w0, [x20]
 	cmn	w0, #1
 	beq	.L1163
-	.loc 4 196 0
 	ldrh	w0, [x21]
 	cmp	w0, w25
 	bne	.L1163
-	.loc 4 198 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
 	strh	w19, [x1, #:lo12:.LANCHOR37]
-	.loc 4 199 0
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
-	.loc 4 200 0
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
 .L1164:
-	.loc 4 216 0
 	adrp	x19, .LANCHOR37
-.LVL1529:
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
 	beq	.L1178
-	.loc 4 222 0
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
 	beq	.L1168
-	.loc 4 224 0
 	add	x0, x22, :lo12:.LANCHOR106
 	lsl	w1, w1, 10
-	.loc 4 225 0
 	mov	w2, 1
-	.loc 4 224 0
 	str	w1, [x0, 4]
-	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1530:
-	.loc 4 226 0
 	ldr	w0, [x22, #:lo12:.LANCHOR106]
 	cmn	w0, #1
 	beq	.L1168
-	.loc 4 229 0
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
 	bne	.L1168
-	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
 	bls	.L1168
-	.loc 4 231 0 is_stmt 1
 	ldrh	w1, [x20, 4]
-	.loc 4 232 0
 	str	w0, [x20, 8]
-	.loc 4 233 0
 	ldrh	w0, [x21, 8]
-	.loc 4 231 0
 	strh	w1, [x19, #:lo12:.LANCHOR37]
-	.loc 4 233 0
 	strh	w0, [x20, 4]
 .L1168:
-	.loc 4 238 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
 	mov	w1, 1
-	.loc 4 247 0
 	mov	w25, 61649
-	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1531:
 	sxth	w20, w0
-.LVL1532:
-	.loc 4 239 0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
-	.loc 4 243 0
 	add	x24, x22, :lo12:.LANCHOR106
 .L1170:
-	.loc 4 241 0
 	tbz	w20, #31, .L1173
-	.loc 4 254 0
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 254
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1533:
 .L1172:
-	.loc 4 255 0
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
-	.loc 4 257 0
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
 	beq	.L1175
-	.loc 4 259 0
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
 	beq	.L1175
-	.loc 4 259 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
 	bcs	.L1175
-	.loc 4 261 0 is_stmt 1
 	cmp	w0, w1
 	bcs	.L1175
-	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1534:
 .L1175:
 	add	x19, x19, :lo12:.LANCHOR37
-	.loc 4 268 0 discriminator 1
 	adrp	x21, .LANCHOR10
-.LVL1535:
-	.loc 4 269 0 discriminator 1
 	adrp	x23, .LANCHOR137
 	add	x19, x19, 32
-	.loc 4 268 0 discriminator 1
 	add	x21, x21, :lo12:.LANCHOR10
-	.loc 4 269 0 discriminator 1
 	add	x23, x23, :lo12:.LANCHOR137
 	add	x22, x22, :lo12:.LANCHOR106
-	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1536:
 .L1176:
-	.loc 4 268 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w20, w0
 	bcc	.L1177
-	.loc 4 275 0
 	mov	w0, 0
-.LVL1537:
 .L1160:
-	.loc 4 276 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1538:
 .L1163:
-	.cfi_restore_state
-	.loc 4 184 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1539:
 	and	w19, w19, 65535
-.LVL1540:
 	b	.L1161
-.LVL1541:
 .L1173:
-	.loc 4 243 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
-	.loc 4 245 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 4 243 0
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
-	.loc 4 244 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x24, 8]
-	.loc 4 245 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL1542:
-	.loc 4 247 0
 	ldr	w0, [x24]
 	cmn	w0, #1
 	beq	.L1171
-	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w0, w25
 	beq	.L1172
 .L1171:
 	sub	w20, w20, #1
-.LVL1543:
 	sxth	w20, w20
-.LVL1544:
 	b	.L1170
-.LVL1545:
 .L1177:
-	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
 	lsl	w2, w2, 2
-	.loc 4 268 0 discriminator 3
 	add	w20, w20, 1
-.LVL1546:
-	.loc 4 269 0 discriminator 3
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-.LVL1547:
 	b	.L1176
-.LVL1548:
 .L1178:
-	.loc 4 218 0
 	mov	w0, -1
 	b	.L1160
-	.cfi_endproc
-.LFE229:
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
 	.global	FtlMakeBbt
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
-.LFB231:
-	.loc 4 317 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
-	.cfi_def_cfa_offset 128
-	.cfi_offset 29, -128
-	.cfi_offset 30, -120
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -96
-	.cfi_offset 22, -88
-	.loc 4 327 0
 	mov	w22, 0
-	.loc 4 317 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -112
-	.cfi_offset 20, -104
 	adrp	x20, .LANCHOR37
 	stp	x23, x24, [sp, 48]
 	add	x21, x20, :lo12:.LANCHOR37
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 23, -80
-	.cfi_offset 24, -72
-	.cfi_offset 25, -64
-	.cfi_offset 26, -56
 	add	x24, x21, 32
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -48
-	.cfi_offset 28, -40
-	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1549:
-	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1550:
-	.loc 4 328 0
 	adrp	x28, .LANCHOR106
 	add	x21, x21, 12
-	.loc 4 356 0
 	add	x25, x28, :lo12:.LANCHOR106
-	.loc 4 327 0
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.LVL1551:
 .L1191:
-	.loc 4 327 0 is_stmt 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
 	bcc	.L1197
-	.loc 4 381 0 is_stmt 1 discriminator 1
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
 .L1198:
-.LVL1552:
 	ldrh	w0, [x21]
 	cmp	w0, w19
 	bhi	.L1199
-	.loc 4 387 0
 	add	x21, x20, :lo12:.LANCHOR37
-	.loc 4 396 0
 	mov	w22, 65535
-.LVL1553:
-	.loc 4 387 0
 	ldrh	w19, [x21, 12]
-.LVL1554:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1555:
 .L1200:
-	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
 	bgt	.L1204
-	.loc 4 389 0 is_stmt 1
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1556:
 	cmp	w0, 1
 	beq	.L1201
-	.loc 4 391 0
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1557:
 	cbz	w0, .L1202
-	.loc 4 393 0
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1558:
 .L1201:
-	.loc 4 387 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1559:
 	and	w19, w19, 65535
-.LVL1560:
 	b	.L1200
-.LVL1561:
 .L1197:
-	.loc 4 329 0
 	adrp	x2, .LANCHOR108
-	.loc 4 328 0
 	adrp	x0, .LANCHOR107
 	add	x19, x28, :lo12:.LANCHOR106
-	.loc 4 331 0
 	ldrh	w1, [x21]
-	.loc 4 328 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	.loc 4 331 0
 	mov	w3, 65535
-	.loc 4 329 0
 	ldr	x26, [x2, #:lo12:.LANCHOR108]
-	.loc 4 331 0
 	cmp	w1, w3
-	.loc 4 329 0
 	stp	x0, x26, [x19, 8]
-.LVL1562:
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
-	.loc 4 331 0
 	beq	.L1192
-	.loc 4 333 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
-	.loc 4 335 0
 	mov	w2, 1
-	.loc 4 333 0
 	madd	w27, w4, w22, w1
-.LVL1563:
-	.loc 4 335 0
 	mov	w1, w2
-	.loc 4 334 0
 	lsl	w0, w27, 10
 	str	w0, [x19, 4]
-	.loc 4 335 0
 	mov	x0, x19
 	bl	FlashReadPages
-.LVL1564:
-	.loc 4 336 0
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
 	ldrh	w2, [x23, #:lo12:.LANCHOR17]
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1565:
 .L1193:
-	.loc 4 376 0 discriminator 2
 	mov	w0, w27
-	.loc 4 327 0 discriminator 2
 	add	w22, w22, 1
-.LVL1566:
-	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1567:
 	add	x24, x24, 8
 	add	x21, x21, 2
 	b	.L1191
-.LVL1568:
 .L1192:
-	.loc 4 340 0
 	mov	w1, w22
 	bl	FlashGetBadBlockList
-.LVL1569:
-	.loc 4 341 0
 	ldr	x0, [x19, 8]
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-.LVL1570:
-	.loc 4 343 0
 	ldrh	w19, [x23, #:lo12:.LANCHOR17]
-	.loc 4 345 0
 	add	x23, x23, :lo12:.LANCHOR17
-	.loc 4 357 0
 	adrp	x0, .LANCHOR137
-	.loc 4 343 0
 	sub	w19, w19, #1
-	.loc 4 357 0
 	add	x0, x0, :lo12:.LANCHOR137
-	.loc 4 343 0
 	and	w19, w19, 65535
-.LVL1571:
-	.loc 4 357 0
 	str	x0, [x29, 104]
 .L1194:
-	.loc 4 345 0
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1572:
 	cmp	w0, 1
 	beq	.L1195
-	.loc 4 350 0
 	ldr	x0, [x29, 112]
 	mov	w2, 16
-	.loc 4 349 0
 	strh	w19, [x21]
-	.loc 4 350 0
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-.LVL1573:
-	.loc 4 351 0
 	adrp	x0, .LANCHOR107
 	mov	w2, 4096
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	bl	ftl_memset
-.LVL1574:
-	.loc 4 352 0
 	mov	w0, -3872
 	strh	w0, [x26]
-	.loc 4 355 0
 	ldrh	w4, [x23]
-	.loc 4 354 0
 	ldrh	w0, [x21]
 	strh	w0, [x26, 2]
-	.loc 4 357 0
 	ldr	x1, [x24]
-	.loc 4 353 0
 	str	wzr, [x26, 4]
-	.loc 4 355 0
 	madd	w27, w4, w22, w0
-.LVL1575:
-	.loc 4 356 0
 	lsl	w0, w27, 10
 	str	w0, [x25, 4]
-	.loc 4 357 0
 	ldr	x0, [x29, 104]
 	ldrh	w2, [x0]
 	ldr	x0, [x25, 8]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-.LVL1576:
-	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x25
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1577:
-	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x25
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1578:
-	.loc 4 360 0
 	ldr	w0, [x25]
 	cmn	w0, #1
 	bne	.L1193
-	.loc 4 362 0
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-.LVL1579:
-	.loc 4 363 0
 	b	.L1194
-.LVL1580:
 .L1195:
-	.loc 4 347 0
 	sub	w19, w19, #1
-.LVL1581:
 	and	w19, w19, 65535
-.LVL1582:
 	b	.L1194
-.LVL1583:
 .L1199:
-	.loc 4 383 0 discriminator 3
 	mov	w0, w19
-	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
-.LVL1584:
-	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1585:
-	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1586:
 	b	.L1198
-.LVL1587:
 .L1202:
-	.loc 4 396 0
 	ldrh	w0, [x21]
 	cmp	w0, w22
 	bne	.L1203
-	.loc 4 398 0
 	strh	w19, [x21]
 	b	.L1201
 .L1203:
-	.loc 4 402 0
 	strh	w19, [x21, 4]
 .L1204:
-	.loc 4 414 0
 	adrp	x0, .LANCHOR111
-	.loc 4 411 0
 	add	x19, x20, :lo12:.LANCHOR37
-.LVL1588:
-	.loc 4 414 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
-	.loc 4 416 0
 	mov	w2, 2
-	.loc 4 414 0
 	ldr	x0, [x0, #:lo12:.LANCHOR111]
-	.loc 4 413 0
 	str	wzr, [x19, 8]
-	.loc 4 414 0
 	lsl	w1, w1, 10
-	.loc 4 411 0
 	strh	wzr, [x19, 2]
-	.loc 4 414 0
 	str	w1, [x0, 4]
-	.loc 4 415 0
 	ldrh	w1, [x19, 4]
 	lsl	w1, w1, 10
 	str	w1, [x0, 36]
-	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1589:
-	.loc 4 418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
 	bl	FtlBbmMapBadBlock
-.LVL1590:
-	.loc 4 419 0
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
-.LVL1591:
-	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1592:
-	.loc 4 426 0
 	strh	wzr, [x19, 2]
-	.loc 4 422 0
 	ldr	w0, [x19, 8]
-	.loc 4 425 0
 	ldrh	w1, [x19, 4]
-	.loc 4 422 0
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	.loc 4 424 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-.LVL1593:
-	.loc 4 427 0
 	strh	w0, [x19, 4]
-	.loc 4 425 0
 	strh	w1, [x20, #:lo12:.LANCHOR37]
-	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1594:
-	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15247,234 +8612,109 @@ FtlMakeBbt:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE231:
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartWrite
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
-.LFB263:
-	.loc 2 835 0
-	.cfi_startproc
-.LVL1595:
 	stp	x29, x30, [sp, -208]!
-	.cfi_def_cfa_offset 208
-	.cfi_offset 29, -208
-	.cfi_offset 30, -200
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -192
-	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x27, x28, [sp, 80]
-	.loc 2 843 0
 	add	w1, w0, w1
-.LVL1596:
-	.cfi_offset 27, -128
-	.cfi_offset 28, -120
-	.loc 2 835 0
 	mov	w28, w0
-.LVL1597:
-	.loc 2 843 0
 	adrp	x0, .LANCHOR16
-.LVL1598:
-	.loc 2 835 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 843 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 835 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -176
-	.cfi_offset 22, -168
-	.cfi_offset 23, -160
-	.cfi_offset 24, -152
-	.cfi_offset 25, -144
-	.cfi_offset 26, -136
-	.loc 2 843 0
 	cmp	w1, w0
 	bhi	.L1218
-	.loc 2 840 0
 	adrp	x0, .LANCHOR22
-	.loc 2 848 0
 	adrp	x25, .LANCHOR12
-	.loc 2 858 0
 	adrp	x26, .LANCHOR23
 	mov	x24, x2
-	.loc 2 840 0
 	ldrh	w21, [x0, #:lo12:.LANCHOR22]
-	.loc 2 848 0
 	add	x25, x25, :lo12:.LANCHOR12
-	.loc 2 858 0
 	add	x26, x26, :lo12:.LANCHOR23
-	.loc 2 840 0
 	mov	w23, 0
 	lsr	w21, w28, w21
-.LVL1599:
 .L1212:
-	.loc 2 846 0
 	cbnz	w20, .L1217
-.LVL1600:
 .L1210:
-	.loc 2 869 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
-.LVL1601:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1602:
 	ldp	x29, x30, [sp], 208
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1603:
 .L1217:
-	.cfi_restore_state
-	.loc 2 848 0
 	ldrh	w1, [x25]
-	.loc 2 847 0
 	adrp	x0, .LANCHOR133
 	adrp	x27, .LANCHOR124
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	.loc 2 848 0
 	udiv	w22, w28, w1
-	.loc 2 847 0
 	ldr	w2, [x0, w21, uxtw 2]
-.LVL1604:
-	.loc 2 851 0
 	and	w0, w20, 65535
-	.loc 2 848 0
 	msub	w22, w22, w1, w28
-.LVL1605:
-	.loc 2 849 0
 	sub	w19, w1, w22
 	and	w19, w19, 65535
-.LVL1606:
-	.loc 2 851 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1607:
-	.loc 2 852 0
 	cbz	w2, .L1214
-	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	w19, w1
 	beq	.L1214
-	.loc 2 854 0 is_stmt 1
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 855 0
 	add	x0, x29, 144
-	.loc 2 853 0
 	str	w2, [x29, 116]
-	.loc 2 856 0
 	mov	w2, 1
-.LVL1608:
-	.loc 2 855 0
 	str	x0, [x29, 128]
-	.loc 2 856 0
 	mov	w1, w2
 	add	x0, x29, 112
-.LVL1609:
 	bl	FlashReadPages
-.LVL1610:
 .L1215:
-	.loc 2 860 0
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	lsl	w22, w22, 7
-.LVL1611:
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-.LVL1612:
-	.loc 2 861 0
 	ldr	x2, [x27, #:lo12:.LANCHOR124]
 	mov	w1, w21
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 864 0
 	sub	w20, w20, w19
-.LVL1613:
-	.loc 2 865 0
 	add	w28, w28, w19
-.LVL1614:
-	.loc 2 863 0
 	add	w21, w21, 1
-.LVL1615:
-	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1616:
-	.loc 2 862 0
 	cmn	w0, #1
-	.loc 2 866 0
 	ldr	w4, [x29, 108]
-	.loc 2 862 0
 	csinv	w23, w23, wzr, ne
-.LVL1617:
-	.loc 2 866 0
 	add	x24, x24, x4, sxtw
-.LVL1618:
 	b	.L1212
-.LVL1619:
 .L1214:
-	.loc 2 858 0
 	ldrh	w2, [x26]
-.LVL1620:
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	bl	ftl_memset
-.LVL1621:
 	b	.L1215
-.LVL1622:
 .L1218:
-	.loc 2 844 0
 	mov	w23, -1
 	b	.L1210
-	.cfi_endproc
-.LFE263:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-.LFB286:
-	.loc 2 2159 0
-	.cfi_startproc
-	.loc 2 2160 0
 	adrp	x0, .LANCHOR81
 	add	x2, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, #:lo12:.LANCHOR81]
@@ -15482,721 +8722,415 @@ Ftl_save_ext_data:
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
 	bne	.L1223
-.LBB313:
-.LBB314:
-	.loc 2 2161 0
 	mov	w0, 68
-	.loc 2 2174 0
 	mov	w1, 1
-	.loc 2 2161 0
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	.loc 2 2162 0
 	adrp	x0, .LANCHOR68
 	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	str	w0, [x2, 88]
-	.loc 2 2163 0
 	adrp	x0, .LANCHOR69
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
 	str	w0, [x2, 92]
-	.loc 2 2164 0
 	adrp	x0, .LANCHOR67
 	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	str	w0, [x2, 8]
-	.loc 2 2165 0
 	adrp	x0, .LANCHOR64
 	ldr	w0, [x0, #:lo12:.LANCHOR64]
 	str	w0, [x2, 12]
-	.loc 2 2166 0
 	adrp	x0, .LANCHOR62
 	ldr	w0, [x0, #:lo12:.LANCHOR62]
 	str	w0, [x2, 16]
-	.loc 2 2167 0
 	adrp	x0, .LANCHOR66
 	ldr	w0, [x0, #:lo12:.LANCHOR66]
 	str	w0, [x2, 20]
-	.loc 2 2168 0
 	adrp	x0, .LANCHOR73
 	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	str	w0, [x2, 28]
-	.loc 2 2169 0
 	adrp	x0, .LANCHOR75
 	ldr	w0, [x0, #:lo12:.LANCHOR75]
 	str	w0, [x2, 32]
-	.loc 2 2170 0
 	adrp	x0, .LANCHOR63
 	ldr	w0, [x0, #:lo12:.LANCHOR63]
 	str	w0, [x2, 36]
-	.loc 2 2171 0
 	adrp	x0, .LANCHOR65
 	ldr	w0, [x0, #:lo12:.LANCHOR65]
 	str	w0, [x2, 40]
-	.loc 2 2172 0
 	adrp	x0, .LANCHOR76
 	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	str	w0, [x2, 44]
-	.loc 2 2173 0
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
 	str	w0, [x2, 48]
-	.loc 2 2174 0
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.LVL1623:
 .L1223:
 	ret
-.LBE314:
-.LBE313:
-	.cfi_endproc
-.LFE286:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-.LFB265:
-	.loc 2 910 0
-	.cfi_startproc
-.LVL1624:
-	.loc 2 913 0
 	adrp	x2, .LANCHOR165
 	ldrh	w1, [x2, #:lo12:.LANCHOR165]
 	cmp	w1, 31
 	bhi	.L1229
-	.loc 2 914 0
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR165]
-.LVL1625:
-	.loc 2 915 0
 	mov	w1, 1
-.LVL1626:
 .L1226:
 	adrp	x2, .LANCHOR127
-	.loc 2 917 0
 	cbnz	w0, .L1227
-	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
-.LVL1627:
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
-.LVL1628:
 	cmp	w0, w1
 	bcc	.L1231
 .L1227:
-	.loc 2 910 0 is_stmt 1
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 919 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
-	.loc 2 920 0
 	mov	w0, 17221
-	.loc 2 923 0
 	str	wzr, [x2, 4]
-	.loc 2 920 0
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	.loc 2 921 0
 	adrp	x0, .LANCHOR125
 	ldrh	w1, [x0, #:lo12:.LANCHOR125]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
-	.loc 2 922 0
 	ldr	w0, [x2, 8]
 	add	w0, w0, 1
 	str	w0, [x2, 8]
-	.loc 2 924 0
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1629:
-	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1630:
-	.loc 2 927 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1631:
 .L1229:
-	.loc 2 911 0
 	mov	w1, 32
 	b	.L1226
-.LVL1632:
 .L1231:
-	.loc 2 927 0
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE265:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.sftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	sftl_vendor_write
+	.type	sftl_vendor_write, %function
+sftl_vendor_write:
+	add	w0, w0, 256
+	b	FtlVendorPartWrite
+	.size	sftl_vendor_write, .-sftl_vendor_write
 	.section	.text.FtlVendorPartRead,"ax",@progbits
 	.align	2
 	.global	FtlVendorPartRead
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
-.LFB264:
-	.loc 2 872 0
-	.cfi_startproc
-.LVL1633:
 	stp	x29, x30, [sp, -208]!
-	.cfi_def_cfa_offset 208
-	.cfi_offset 29, -208
-	.cfi_offset 30, -200
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -192
-	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	.loc 2 881 0
 	add	w1, w0, w1
-.LVL1634:
-	.cfi_offset 21, -176
-	.cfi_offset 22, -168
-	.loc 2 872 0
 	mov	w21, w0
-.LVL1635:
-	.loc 2 881 0
 	adrp	x0, .LANCHOR16
-.LVL1636:
-	.loc 2 872 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 881 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 872 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 23, -160
-	.cfi_offset 24, -152
-	.cfi_offset 25, -144
-	.cfi_offset 26, -136
-	.cfi_offset 27, -128
-	.cfi_offset 28, -120
-	.loc 2 881 0
 	cmp	w1, w0
-	bhi	.L1241
-	.loc 2 877 0
+	bhi	.L1242
 	adrp	x0, .LANCHOR22
-	.loc 2 885 0
 	adrp	x24, .LANCHOR12
 	mov	x23, x2
 	add	x24, x24, :lo12:.LANCHOR12
-	.loc 2 877 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR22]
 	mov	w22, 0
-	.loc 2 884 0
 	adrp	x25, .LANCHOR133
-	.loc 2 877 0
 	lsr	w26, w21, w3
-.LVL1637:
-.L1235:
-	.loc 2 883 0
-	cbnz	w20, .L1240
-.LVL1638:
-.L1233:
-	.loc 2 906 0
+.L1236:
+	cbnz	w20, .L1241
+.L1234:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1639:
 	ldp	x21, x22, [sp, 32]
-.LVL1640:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1641:
-.L1240:
-	.cfi_restore_state
-	.loc 2 885 0
+.L1241:
 	ldrh	w19, [x24]
-	.loc 2 884 0
 	ldr	x0, [x25, #:lo12:.LANCHOR133]
-	.loc 2 885 0
 	udiv	w27, w21, w19
-	.loc 2 884 0
 	ldr	w1, [x0, w26, uxtw 2]
-.LVL1642:
-	.loc 2 888 0
 	and	w0, w20, 65535
-	.loc 2 885 0
 	msub	w27, w27, w19, w21
-.LVL1643:
-	.loc 2 886 0
 	sub	w19, w19, w27
 	and	w19, w19, 65535
-.LVL1644:
-	.loc 2 888 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1645:
 	lsl	w28, w19, 9
-	.loc 2 889 0
-	cbz	w1, .L1237
-	.loc 2 891 0
+	cbz	w1, .L1238
 	adrp	x4, .LANCHOR124
-	.loc 2 893 0
 	mov	w2, 1
-	.loc 2 891 0
 	str	x4, [x29, 104]
-	.loc 2 896 0
 	lsl	w27, w27, 7
-.LVL1646:
-	.loc 2 891 0
 	ldr	x0, [x4, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 892 0
 	add	x0, x29, 144
-	.loc 2 890 0
 	str	w1, [x29, 116]
-	.loc 2 893 0
 	mov	w1, w2
-.LVL1647:
-	.loc 2 892 0
 	str	x0, [x29, 128]
-	.loc 2 893 0
 	add	x0, x29, 112
-.LVL1648:
 	bl	FlashReadPages
-.LVL1649:
-	.loc 2 896 0
 	ldr	x4, [x29, 104]
 	mov	w2, w28
-	.loc 2 895 0
 	ldr	w0, [x29, 112]
 	cmn	w0, #1
-	.loc 2 896 0
 	mov	x0, x23
 	ldr	x1, [x4, #:lo12:.LANCHOR124]
-	.loc 2 895 0
 	csinv	w22, w22, wzr, ne
-.LVL1650:
-	.loc 2 896 0
 	add	x1, x1, x27, sxtw 2
 	bl	ftl_memcpy
-.LVL1651:
-.L1239:
-	.loc 2 900 0
+.L1240:
 	add	w26, w26, 1
-.LVL1652:
-	.loc 2 901 0
 	sub	w20, w20, w19
-.LVL1653:
-	.loc 2 902 0
 	add	w21, w21, w19
-.LVL1654:
-	.loc 2 903 0
 	add	x23, x23, x28, sxtw
-.LVL1655:
-	b	.L1235
-.LVL1656:
-.L1237:
-	.loc 2 898 0
+	b	.L1236
+.L1238:
 	mov	w2, w28
 	mov	w1, 0
-.LVL1657:
 	mov	x0, x23
 	bl	ftl_memset
-.LVL1658:
-	b	.L1239
-.LVL1659:
-.L1241:
-	.loc 2 882 0
+	b	.L1240
+.L1242:
 	mov	w22, -1
-	b	.L1233
-	.cfi_endproc
-.LFE264:
+	b	.L1234
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
 	.global	FtlLoadEctTbl
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
-.LFB271:
-	.loc 2 1383 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 1384 0
 	mov	w0, 64
-	.loc 2 1383 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 2 1384 0
 	adrp	x19, .LANCHOR127
 	adrp	x20, .LANCHOR125
 	ldr	x2, [x19, #:lo12:.LANCHOR127]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	bl	FtlVendorPartRead
-.LVL1660:
-	.loc 2 1385 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1244
-.LBB317:
-.LBB318:
-	.loc 2 1387 0
+	beq	.L1245
 	adrp	x1, .LC103
 	adrp	x0, .LC71
 	add	x1, x1, :lo12:.LC103
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL1661:
-	.loc 2 1388 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1662:
-.L1244:
-.LBE318:
-.LBE317:
-	.loc 2 1393 0
+.L1245:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE271:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_load_ext_data
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
-.LFB287:
-	.loc 2 2179 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
-	.loc 2 2180 0
 	mov	w1, 1
 	mov	w0, 0
-	.loc 2 2179 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 2180 0
 	adrp	x19, .LANCHOR81
-	.loc 2 2179 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2180 0
 	add	x21, x19, :lo12:.LANCHOR81
 	mov	x2, x21
 	bl	FtlVendorPartRead
-.LVL1663:
-	.loc 2 2181 0
 	ldr	w0, [x19, #:lo12:.LANCHOR81]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1247
-	.loc 2 2182 0
+	beq	.L1248
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1664:
-	.loc 2 2183 0
 	str	w20, [x19, #:lo12:.LANCHOR81]
-.L1247:
-	.loc 2 2186 0
+.L1248:
 	ldr	w1, [x19, #:lo12:.LANCHOR81]
 	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
 	adrp	x1, .LANCHOR73
-	bne	.L1248
-	.loc 2 2187 0
+	bne	.L1249
 	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
 	str	w3, [x2, #:lo12:.LANCHOR68]
-	.loc 2 2188 0
 	adrp	x2, .LANCHOR69
 	ldr	w3, [x0, 92]
 	str	w3, [x2, #:lo12:.LANCHOR69]
-	.loc 2 2189 0
 	adrp	x2, .LANCHOR67
 	ldr	w3, [x0, 8]
 	str	w3, [x2, #:lo12:.LANCHOR67]
-	.loc 2 2190 0
 	adrp	x2, .LANCHOR64
 	ldr	w3, [x0, 12]
 	str	w3, [x2, #:lo12:.LANCHOR64]
-	.loc 2 2191 0
 	adrp	x2, .LANCHOR62
 	ldr	w3, [x0, 16]
 	str	w3, [x2, #:lo12:.LANCHOR62]
-	.loc 2 2192 0
 	adrp	x2, .LANCHOR66
 	ldr	w3, [x0, 20]
 	str	w3, [x2, #:lo12:.LANCHOR66]
-	.loc 2 2194 0
 	ldp	w2, w3, [x0, 28]
-	.loc 2 2193 0
 	str	w2, [x1, #:lo12:.LANCHOR73]
-	.loc 2 2194 0
 	adrp	x2, .LANCHOR75
 	str	w3, [x2, #:lo12:.LANCHOR75]
-	.loc 2 2195 0
 	adrp	x2, .LANCHOR63
 	ldr	w3, [x0, 36]
 	str	w3, [x2, #:lo12:.LANCHOR63]
-	.loc 2 2196 0
 	adrp	x2, .LANCHOR65
 	ldr	w3, [x0, 40]
 	str	w3, [x2, #:lo12:.LANCHOR65]
-	.loc 2 2197 0
 	adrp	x2, .LANCHOR76
 	ldr	w3, [x0, 44]
 	str	w3, [x2, #:lo12:.LANCHOR76]
-	.loc 2 2198 0
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR77
 	str	w2, [x0, #:lo12:.LANCHOR77]
-.L1248:
-	.loc 2 2201 0
+.L1249:
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR72
 	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	ldrh	w0, [x0, #:lo12:.LANCHOR14]
 	ldr	w2, [x2, #:lo12:.LANCHOR72]
-	.loc 2 2202 0
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
-	.loc 2 2201 0
 	madd	w0, w0, w2, w1
 	adrp	x1, .LANCHOR5
-	.loc 2 2202 0
 	ldp	x29, x30, [sp], 48
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	.loc 2 2201 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR74
 	str	w0, [x1, #:lo12:.LANCHOR74]
-	.loc 2 2202 0
 	ret
-	.cfi_endproc
-.LFE287:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.sftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	sftl_vendor_read
+	.type	sftl_vendor_read, %function
+sftl_vendor_read:
+	add	w0, w0, 256
+	b	FtlVendorPartRead
+	.size	sftl_vendor_read, .-sftl_vendor_read
 	.section	.text.FtlVpcTblFlush,"ax",@progbits
 	.align	2
 	.global	FtlVpcTblFlush
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
-.LFB269:
-	.loc 2 1053 0
-	.cfi_startproc
-.LVL1665:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 2 1062 0
 	adrp	x1, .LANCHOR79
-	.loc 2 1068 0
 	mov	w2, 19539
-	.loc 2 1053 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.loc 2 1060 0
 	adrp	x25, .LANCHOR108
-	.loc 2 1053 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 2 1059 0
 	adrp	x22, .LANCHOR106
-	.loc 2 1053 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.loc 2 1059 0
 	adrp	x24, .LANCHOR107
-	.loc 2 1053 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -32
-	.cfi_offset 28, -24
-	.loc 2 1059 0
 	add	x28, x22, :lo12:.LANCHOR106
-	.loc 2 1060 0
 	ldr	x21, [x25, #:lo12:.LANCHOR108]
-	.loc 2 1068 0
 	movk	w2, 0x4654, lsl 16
-	.loc 2 1053 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.loc 2 1062 0
 	add	x19, x1, :lo12:.LANCHOR79
-	.loc 2 1059 0
 	ldr	x0, [x24, #:lo12:.LANCHOR107]
-	.loc 2 1090 0
 	adrp	x23, .LANCHOR70
-	.loc 2 1062 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	.loc 2 1106 0
 	adrp	x27, .LANCHOR20
-	.loc 2 1060 0
 	stp	x0, x21, [x28, 8]
-.LVL1666:
-	.loc 2 1054 0
 	mov	w26, 65535
-	.loc 2 1062 0
 	strh	w1, [x21, 2]
-	.loc 2 1063 0
 	mov	w1, -3932
 	strh	w1, [x21]
-	.loc 2 1064 0
 	ldr	w1, [x19, 8]
-	.loc 2 1065 0
 	stp	w1, wzr, [x21, 4]
-	.loc 2 1068 0
 	adrp	x1, .LANCHOR39
 	add	x20, x1, :lo12:.LANCHOR39
-	.loc 2 1066 0
 	str	wzr, [x21, 12]
-	.loc 2 1068 0
 	str	w2, [x1, #:lo12:.LANCHOR39]
-	.loc 2 1069 0
 	mov	w1, 68
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x20, 4]
-	.loc 2 1070 0
 	ldrh	w1, [x19, 6]
-	.loc 2 1073 0
 	adrp	x2, .LANCHOR51
-	.loc 2 1070 0
 	strh	w1, [x20, 8]
-	.loc 2 1071 0
 	adrp	x1, .LANCHOR10
 	ldrh	w1, [x1, #:lo12:.LANCHOR10]
 	strb	w1, [x20, 10]
-	.loc 2 1073 0
 	add	x1, x2, :lo12:.LANCHOR51
 	ldrh	w2, [x2, #:lo12:.LANCHOR51]
 	strh	w2, [x20, 14]
-	.loc 2 1074 0
 	ldrh	w2, [x1, 2]
 	ldrb	w3, [x1, 6]
-	.loc 2 1075 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 11]
-	.loc 2 1074 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 16]
-	.loc 2 1077 0
 	adrp	x2, .LANCHOR52
 	add	x1, x2, :lo12:.LANCHOR52
 	ldrh	w2, [x2, #:lo12:.LANCHOR52]
-	.loc 2 1078 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1077 0
 	strh	w2, [x20, 18]
-	.loc 2 1078 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1079 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 12]
-	.loc 2 1078 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 20]
-	.loc 2 1081 0
 	adrp	x2, .LANCHOR53
 	add	x1, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
-	.loc 2 1082 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1081 0
 	strh	w2, [x20, 22]
-	.loc 2 1082 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1083 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 13]
-	.loc 2 1085 0
 	adrp	x1, .LANCHOR72
-	.loc 2 1082 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 24]
-	.loc 2 1085 0
 	ldr	w1, [x1, #:lo12:.LANCHOR72]
 	str	w1, [x20, 32]
-	.loc 2 1090 0
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
 	str	w1, [x20, 40]
-	.loc 2 1091 0
 	adrp	x1, .LANCHOR71
 	ldr	w1, [x1, #:lo12:.LANCHOR71]
 	str	w1, [x20, 36]
-	.loc 2 1096 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1667:
-	.loc 2 1097 0
 	ldr	x0, [x28, 8]
 	mov	x1, x20
 	mov	w2, 48
-	.loc 2 1098 0
 	adrp	x20, .LANCHOR5
-	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1668:
-	.loc 2 1098 0
 	adrp	x1, .LANCHOR42
 	ldrh	w2, [x20, #:lo12:.LANCHOR5]
 	ldr	x0, [x28, 8]
@@ -16204,14 +9138,10 @@ FtlVpcTblFlush:
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1669:
-	.loc 2 1099 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
 	ldr	x3, [x28, 8]
-	.loc 2 1056 0
 	mov	w20, 0
-	.loc 2 1099 0
 	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
@@ -16220,1712 +9150,958 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1670:
-	.loc 2 1100 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1671:
-	.loc 2 1126 0
 	add	x0, x27, :lo12:.LANCHOR20
 	str	x0, [x29, 104]
-.LVL1672:
-.L1251:
-	.loc 2 1102 0
+.L1253:
 	ldr	x0, [x24, #:lo12:.LANCHOR107]
-	.loc 2 1105 0
 	mov	w3, 1
-	.loc 2 1102 0
 	str	x0, [x28, 8]
-	.loc 2 1105 0
 	mov	w2, w3
-	.loc 2 1103 0
 	ldr	x0, [x25, #:lo12:.LANCHOR108]
-	.loc 2 1104 0
 	ldrh	w1, [x19, 2]
-	.loc 2 1103 0
 	str	x0, [x28, 16]
-	.loc 2 1104 0
 	ldrh	w0, [x19]
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1105 0
 	mov	w1, w3
-	.loc 2 1104 0
 	str	w0, [x28, 4]
-	.loc 2 1105 0
 	mov	x0, x28
 	bl	FlashProgPages
-.LVL1673:
-	.loc 2 1106 0
 	ldrh	w0, [x27, #:lo12:.LANCHOR20]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1252
-	.loc 2 1108 0
+	blt	.L1254
 	ldrh	w0, [x19]
-	.loc 2 1107 0
 	ldrh	w26, [x19, 4]
-.LVL1674:
-	.loc 2 1109 0
 	strh	wzr, [x19, 2]
-	.loc 2 1108 0
 	strh	w0, [x19, 4]
-	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1675:
 	strh	w0, [x19]
-	.loc 2 1115 0
 	ldr	w1, [x23, #:lo12:.LANCHOR70]
-	.loc 2 1119 0
 	mov	w3, 1
-	.loc 2 1115 0
 	str	w1, [x19, 8]
 	add	w2, w1, 1
 	str	w2, [x23, #:lo12:.LANCHOR70]
-	.loc 2 1116 0
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
-	.loc 2 1118 0
 	strh	w0, [x21, 2]
-	.loc 2 1119 0
 	mov	w2, w3
-	.loc 2 1117 0
 	str	w1, [x21, 4]
-	.loc 2 1119 0
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1676:
-.L1252:
-	.loc 2 1121 0
+.L1254:
 	ldrh	w0, [x19, 2]
-	.loc 2 1122 0
 	ldr	w1, [x28]
-	.loc 2 1121 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 1122 0
 	cmn	w1, #1
-	bne	.L1253
-	.loc 2 1124 0
+	bne	.L1255
 	cmp	w0, 1
-	bne	.L1254
-	.loc 2 1124 0 is_stmt 0 discriminator 1
+	bne	.L1256
 	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
 	mov	w2, 1124
 	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1677:
-.L1254:
-	.loc 2 1125 0 is_stmt 1
+.L1256:
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1255
-	.loc 2 1126 0
+	bne	.L1257
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1255:
-	.loc 2 1127 0
+.L1257:
 	add	w20, w20, 1
-.LVL1678:
 	and	w20, w20, 65535
-.LVL1679:
-	.loc 2 1128 0
 	cmp	w20, 3
-	bls	.L1251
-	.loc 2 1129 0
+	bls	.L1253
 	add	x22, x22, :lo12:.LANCHOR106
 	adrp	x0, .LC104
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC104
 	ldr	w1, [x22, 4]
 	bl	printf
-.LVL1680:
-.L1257:
-	b	.L1257
-.L1253:
-	.loc 2 1135 0
+.L1259:
+	b	.L1259
+.L1255:
 	cmp	w0, 1
-	beq	.L1251
-	.loc 2 1138 0
+	beq	.L1253
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1258
-	.loc 2 1139 0
+	beq	.L1260
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1681:
-.L1258:
-	.loc 2 1141 0
+.L1260:
 	ldp	x19, x20, [sp, 16]
-.LVL1682:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1683:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1684:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE269:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSysFlush,"ax",@progbits
 	.align	2
 	.global	FtlSysFlush
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-.LFB212:
-	.loc 3 797 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 799 0
 	bl	l2p_flush
-.LVL1685:
-	.loc 3 800 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1686:
-	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1687:
-	.loc 3 803 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE212:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.sftl_deinit,"ax",@progbits
 	.align	2
 	.global	sftl_deinit
 	.type	sftl_deinit, %function
 sftl_deinit:
-.LFB213:
-	.loc 3 806 0
-	.cfi_startproc
-	.loc 3 807 0
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	bne	.L1268
-	.loc 3 806 0
+	bne	.L1270
 	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1688:
-	.loc 3 810 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
 	ret
-.L1268:
+.L1270:
 	mov	w0, 0
 	ret
-	.cfi_endproc
-.LFE213:
 	.size	sftl_deinit, .-sftl_deinit
 	.section	.text.FtlDiscard,"ax",@progbits
 	.align	2
 	.global	FtlDiscard
 	.type	FtlDiscard, %function
 FtlDiscard:
-.LFB218:
-	.loc 3 1121 0
-	.cfi_startproc
-.LVL1689:
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 3 1128 0
 	add	w2, w0, w1
-	.loc 3 1121 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
 	mov	w19, w1
-	.loc 3 1128 0
 	adrp	x1, .LANCHOR34
-.LVL1690:
-	.loc 3 1121 0
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.loc 3 1128 0
 	ldr	w1, [x1, #:lo12:.LANCHOR34]
 	cmp	w2, w1
-	bhi	.L1279
-	.loc 3 1131 0
+	bhi	.L1281
 	cmp	w19, 31
-	bhi	.L1273
-.LVL1691:
-.L1287:
-	.loc 3 1164 0
+	bhi	.L1275
+.L1289:
 	mov	w0, 0
-.L1271:
-	.loc 3 1165 0
+.L1273:
 	ldp	x19, x20, [sp, 16]
-.LVL1692:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1693:
-.L1273:
-	.cfi_restore_state
-	.loc 3 1136 0
+.L1275:
 	adrp	x21, .LANCHOR12
 	ldrh	w1, [x21, #:lo12:.LANCHOR12]
 	udiv	w20, w0, w1
-.LVL1694:
-	.loc 3 1137 0
 	msub	w0, w1, w20, w0
-.LVL1695:
-	.loc 3 1138 0
 	ands	w0, w0, 65535
-	beq	.L1274
-.LVL1696:
-	.loc 3 1139 0
+	beq	.L1276
 	sub	w1, w1, w0
-.LVL1697:
-	.loc 3 1140 0
 	add	w20, w20, 1
-.LVL1698:
-	.loc 3 1139 0
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
-	.loc 3 1141 0
 	sub	w19, w19, w1, uxth
-.LVL1699:
-.L1274:
-	.loc 3 1148 0
+.L1276:
 	adrp	x22, .LANCHOR167
-	.loc 3 1149 0
 	adrp	x23, .LANCHOR63
-	.loc 3 1148 0
 	add	x22, x22, :lo12:.LANCHOR167
-	.loc 3 1149 0
 	add	x23, x23, :lo12:.LANCHOR63
-	.loc 3 1144 0
 	mov	w0, -1
-.LVL1700:
 	str	w0, [x29, 76]
-.LVL1701:
-.L1275:
-	.loc 3 1145 0
+.L1277:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1277
-	.loc 3 1158 0
+	bcs	.L1279
 	adrp	x0, .LANCHOR167
 	ldr	w1, [x0, #:lo12:.LANCHOR167]
 	cmp	w1, 32
-	bls	.L1287
-	.loc 3 1160 0
+	bls	.L1289
 	str	wzr, [x0, #:lo12:.LANCHOR167]
-	.loc 3 1161 0
 	bl	l2p_flush
-.LVL1702:
-	.loc 3 1162 0
 	bl	FtlVpcTblFlush
-.LVL1703:
-	b	.L1287
-.L1277:
-	.loc 3 1146 0
+	b	.L1289
+.L1279:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w20
 	bl	log2phys
-.LVL1704:
-	.loc 3 1147 0
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1276
-	.loc 3 1148 0
+	beq	.L1278
 	ldr	w0, [x22]
-	.loc 3 1150 0
 	mov	w2, 1
 	add	x1, x29, 76
-	.loc 3 1148 0
 	add	w0, w0, 1
 	str	w0, [x22]
-	.loc 3 1149 0
 	ldr	w0, [x23]
 	add	w0, w0, 1
 	str	w0, [x23]
-	.loc 3 1150 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1705:
-	.loc 3 1151 0
 	ldr	w0, [x29, 72]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1706:
-	.loc 3 1152 0
 	bl	decrement_vpc_count
-.LVL1707:
-.L1276:
-	.loc 3 1155 0
+.L1278:
 	ldrh	w0, [x21, #:lo12:.LANCHOR12]
-	.loc 3 1154 0
 	add	w20, w20, 1
-.LVL1708:
-	.loc 3 1155 0
 	sub	w19, w19, w0
-.LVL1709:
-	b	.L1275
-.LVL1710:
-.L1279:
-	.loc 3 1129 0
+	b	.L1277
+.L1281:
 	mov	w0, -1
-.LVL1711:
-	b	.L1271
-	.cfi_endproc
-.LFE218:
+	b	.L1273
 	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
 	.global	FtlVpcCheckAndModify
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
-.LFB289:
-	.loc 2 2242 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 2 2247 0
 	adrp	x1, .LANCHOR168
 	adrp	x0, .LC94
 	add	x1, x1, :lo12:.LANCHOR168
-	.loc 2 2242 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.loc 2 2247 0
 	add	x0, x0, :lo12:.LC94
-	.loc 2 2242 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 2248 0
 	adrp	x20, .LANCHOR128
-	.loc 2 2242 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 2249 0
 	adrp	x21, .LANCHOR61
-	.loc 2 2242 0
 	str	x25, [sp, 64]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 25, -32
-	.loc 2 2247 0
 	bl	printf
-.LVL1712:
-	.loc 2 2248 0
 	adrp	x0, .LANCHOR6
-	.loc 2 2249 0
 	mov	w19, 0
 	add	x21, x21, :lo12:.LANCHOR61
-	.loc 2 2248 0
 	mov	w1, 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1713:
-.L1289:
-	.loc 2 2249 0 discriminator 1
+.L1291:
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1291
-	.loc 2 2256 0 discriminator 1
+	bcc	.L1293
 	adrp	x22, .LANCHOR5
-	.loc 2 2259 0 discriminator 1
 	adrp	x23, .LC105
-	.loc 2 2256 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2259 0 discriminator 1
 	add	x23, x23, :lo12:.LC105
 	mov	w19, 0
-.LVL1714:
-	.loc 2 2257 0 discriminator 1
 	adrp	x25, .LANCHOR42
 	mov	w24, 65535
-.L1292:
-.LVL1715:
-	.loc 2 2256 0 discriminator 1
+.L1294:
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1296
-	.loc 2 2268 0
+	bhi	.L1298
 	ldp	x19, x20, [sp, 16]
-.LVL1716:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1717:
-.L1291:
-	.cfi_restore_state
-	.loc 2 2250 0
+.L1293:
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
-.LVL1718:
-	.loc 2 2251 0
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1290
-	.loc 2 2252 0
+	beq	.L1292
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1719:
-	.loc 2 2253 0
 	ldr	x2, [x20, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
-.LVL1720:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1290:
-	.loc 2 2249 0 discriminator 2
+.L1292:
 	add	w19, w19, 1
-.LVL1721:
-	b	.L1289
-.LVL1722:
-.L1296:
-	.loc 2 2257 0
+	b	.L1291
+.L1298:
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x21, x19, 1, 16
 	ldrh	w2, [x0, x21]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1294
-	.loc 2 2257 0 is_stmt 0 discriminator 1
+	beq	.L1296
 	cmp	w2, w24
-	beq	.L1294
-	.loc 2 2259 0 is_stmt 1
+	beq	.L1296
 	mov	w1, w19
 	mov	x0, x23
 	bl	printf
-.LVL1723:
-	.loc 2 2260 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1294
-	.loc 2 2260 0 is_stmt 0 discriminator 1
+	beq	.L1296
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1294
-	.loc 2 2260 0 discriminator 2
+	beq	.L1296
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1294
-	.loc 2 2261 0 is_stmt 1
+	beq	.L1296
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w1, [x0, x21]
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x21]
-	.loc 2 2262 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1724:
-	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1725:
-	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1726:
-.L1294:
-	.loc 2 2256 0 discriminator 2
+.L1296:
 	add	w19, w19, 1
-.LVL1727:
 	and	w19, w19, 65535
-.LVL1728:
-	b	.L1292
-	.cfi_endproc
-.LFE289:
+	b	.L1294
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
 	.section	.text.allocate_new_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_new_data_superblock
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
-.LFB299:
-	.loc 2 2682 0
-	.cfi_startproc
-.LVL1729:
 	stp	x29, x30, [sp, -48]!
-	.cfi_def_cfa_offset 48
-	.cfi_offset 29, -48
-	.cfi_offset 30, -40
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 2683 0
 	ldrh	w19, [x0]
-.LVL1730:
-	.loc 2 2682 0
 	str	x21, [sp, 32]
-	.cfi_offset 21, -16
-	.loc 2 2682 0
 	mov	x21, x0
-	.loc 2 2684 0
 	adrp	x0, .LANCHOR5
-.LVL1731:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1302
-	.loc 2 2684 0 is_stmt 0 discriminator 1
+	bcs	.L1304
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
 	mov	w2, 2684
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1732:
-.L1302:
-	.loc 2 2686 0 is_stmt 1
+.L1304:
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1303
-	.loc 2 2687 0
+	beq	.L1305
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1304
-	.loc 2 2688 0
+	cbz	w0, .L1306
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL1733:
-.L1303:
-	.loc 2 2693 0
+.L1305:
 	adrp	x1, .LANCHOR150
-	.loc 2 2692 0
 	mov	w0, 1
 	strb	w0, [x21, 8]
-	.loc 2 2693 0
 	mov	w2, 65535
 	ldrh	w0, [x1, #:lo12:.LANCHOR150]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1305
-	.loc 2 2694 0
+	beq	.L1307
 	cmp	w19, w0
-	bne	.L1306
-	.loc 2 2694 0 is_stmt 0 discriminator 1
+	bne	.L1308
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1307
-.L1306:
-	.loc 2 2695 0 is_stmt 1
+	cbz	w1, .L1309
+.L1308:
 	bl	update_vpc_list
-.LVL1734:
-.L1307:
-	.loc 2 2696 0
+.L1309:
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR150]
-.L1305:
-	.loc 2 2698 0
+.L1307:
 	mov	x0, x21
 	bl	allocate_data_superblock
-.LVL1735:
-	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1736:
-	.loc 2 2700 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1737:
-	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1738:
-	.loc 2 2703 0
 	ldr	x21, [sp, 32]
-.LVL1739:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1740:
 	ldp	x29, x30, [sp], 48
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 21
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1741:
-.L1304:
-	.cfi_restore_state
-	.loc 2 2690 0
+.L1306:
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-.LVL1742:
-	b	.L1303
-	.cfi_endproc
-.LFE299:
+	b	.L1305
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
 	.global	FtlProgPages
 	.type	FtlProgPages, %function
 FtlProgPages:
-.LFB215:
-	.loc 3 904 0
-	.cfi_startproc
-.LVL1743:
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 3 911 0
 	mov	w2, 0
-.LVL1744:
-	.loc 3 904 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
 	mov	x19, x3
 	stp	x23, x24, [sp, 48]
 	add	x20, x0, 4
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
 	mov	w21, w1
 	str	x25, [sp, 64]
-	.cfi_offset 25, -32
 	ubfiz	x21, x21, 5, 32
 	add	x21, x21, 4
-	.loc 3 918 0
 	adrp	x24, .LANCHOR19
-	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1745:
-	.loc 3 926 0
 	adrp	x23, .LANCHOR81
 	add	x21, x0, x21
-	.loc 3 918 0
 	add	x24, x24, :lo12:.LANCHOR19
-	.loc 3 926 0
 	add	x23, x23, :lo12:.LANCHOR81
-	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1746:
-.L1313:
-	.loc 3 913 0 discriminator 1
+.L1315:
 	cmp	x20, x21
-	beq	.L1320
+	beq	.L1322
 	sub	x22, x20, #4
-	.loc 3 917 0
 	adrp	x25, .LANCHOR42
-	b	.L1321
-.L1316:
-	.loc 3 915 0
+	b	.L1323
+.L1318:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1747:
-	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1314
-	.loc 3 917 0
+	bne	.L1316
 	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
-.LVL1748:
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
-	.loc 3 919 0
 	strb	wzr, [x19, 6]
-	.loc 3 918 0
 	ldrh	w0, [x24]
 	strh	w0, [x19, 2]
-	.loc 3 920 0
 	strh	wzr, [x19, 4]
-.L1314:
-	.loc 3 922 0
+.L1316:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1315
-	.loc 3 923 0
+	cbnz	w0, .L1317
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1749:
-.L1315:
-	.loc 3 926 0
+.L1317:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
-	.loc 3 927 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1750:
-	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1751:
-	.loc 3 929 0
 	str	w0, [x20]
-	.loc 3 930 0
 	mov	w2, 0
-	.loc 3 928 0
 	str	w0, [x29, 92]
-	.loc 3 930 0
 	mov	w1, 1
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.LVL1752:
-.L1321:
-	.loc 3 914 0
+.L1323:
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1316
-	.loc 3 933 0
+	beq	.L1318
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1317
-	.loc 3 933 0 is_stmt 0 discriminator 1
+	bcc	.L1319
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 933
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1753:
-.L1317:
-	.loc 3 934 0 is_stmt 1
+.L1319:
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
-	.loc 3 935 0
 	mov	w2, 1
-	.loc 3 934 0
 	str	w0, [x1, -4]!
-	.loc 3 935 0
 	ldr	w0, [x22, 24]
 	bl	log2phys
-.LVL1754:
-	.loc 3 937 0
 	ldr	x0, [x22, 16]
 	ldr	w3, [x0, 12]
-.LVL1755:
-	.loc 3 939 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1756:
 	and	w1, w0, 65535
 	mov	w22, w1
-.LVL1757:
-	.loc 3 940 0
 	cmn	w3, #1
-	beq	.L1318
-	.loc 3 942 0
+	beq	.L1320
 	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1319
-	.loc 3 943 0
+	cbnz	w0, .L1321
 	adrp	x0, .LC106
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC106
 	bl	printf
-.LVL1758:
-.L1319:
-	.loc 3 944 0
+.L1321:
 	mov	w0, w22
 	bl	decrement_vpc_count
-.LVL1759:
-.L1318:
-	add	x20, x20, 32
-	b	.L1313
-.LVL1760:
 .L1320:
-	.loc 3 948 0
+	add	x20, x20, 32
+	b	.L1315
+.L1322:
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1312
-	.loc 3 948 0 is_stmt 0 discriminator 1
+	bcc	.L1314
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
 	mov	w2, 948
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1761:
-.L1312:
-	.loc 3 949 0 is_stmt 1
+.L1314:
 	ldp	x19, x20, [sp, 16]
-.LVL1762:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE215:
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-.LFB308:
-	.loc 5 112 0
-	.cfi_startproc
-.LVL1763:
 	stp	x29, x30, [sp, -112]!
-	.cfi_def_cfa_offset 112
-	.cfi_offset 29, -112
-	.cfi_offset 30, -104
-	.loc 5 119 0
 	mov	w2, 65535
-	.loc 5 112 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -96
-	.cfi_offset 20, -88
-	.loc 5 119 0
 	adrp	x19, .LANCHOR53
-	.loc 5 112 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -80
-	.cfi_offset 22, -72
-	.loc 5 115 0
 	adrp	x21, .LANCHOR19
-	.loc 5 119 0
 	ldrh	w20, [x19, #:lo12:.LANCHOR53]
-	.loc 5 112 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.loc 5 119 0
 	cmp	w20, w2
-	.loc 5 112 0
 	str	x27, [sp, 80]
-	.cfi_offset 23, -64
-	.cfi_offset 24, -56
-	.cfi_offset 25, -48
-	.cfi_offset 26, -40
-	.cfi_offset 27, -32
-	.loc 5 115 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-.LVL1764:
-	.loc 5 119 0
-	bne	.L1328
-.LVL1765:
-.L1338:
-	.loc 5 152 0
+	bne	.L1330
+.L1340:
 	adrp	x0, .LANCHOR152
-	.loc 5 153 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	mov	w1, 65535
-	.loc 5 152 0
 	str	wzr, [x0, #:lo12:.LANCHOR152]
-	.loc 5 153 0
 	cmp	w2, w1
 	add	x0, x19, :lo12:.LANCHOR53
-	bne	.L1351
-.L1354:
-	.loc 5 198 0
+	bne	.L1353
+.L1356:
 	mov	w0, 0
-.L1327:
-	.loc 5 199 0
+.L1329:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1766:
-.L1328:
-	.cfi_restore_state
-	.loc 5 121 0
-	cbz	w0, .L1331
-.LVL1767:
-	.loc 5 123 0
+.L1330:
+	cbz	w0, .L1333
 	adrp	x0, .LANCHOR156
-.LVL1768:
 	ldrh	w3, [x0, #:lo12:.LANCHOR156]
 	cmp	w3, w2
-	beq	.L1332
-.L1333:
-	.loc 5 122 0
+	beq	.L1334
+.L1335:
 	mov	w1, 2
-.LVL1769:
-.L1331:
-	.loc 5 131 0
+.L1333:
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
-.LVL1770:
 	str	w0, [x29, 108]
-	.loc 5 132 0
 	cmn	w0, #1
-	beq	.L1334
-	.loc 5 135 0
+	beq	.L1336
 	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
-.LVL1771:
 	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1335
-	.loc 5 136 0
+	bls	.L1337
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
-	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1772:
-.L1335:
-	.loc 5 139 0
+.L1337:
 	adrp	x0, .LANCHOR152
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR152]
-	cbnz	w1, .L1336
-	.loc 5 140 0
+	cbnz	w1, .L1338
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
-	.loc 5 141 0
 	ldr	w0, [x29, 108]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1773:
-	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1774:
-.L1336:
-	.loc 5 144 0
+.L1338:
 	str	wzr, [x19, #:lo12:.LANCHOR152]
-.L1347:
-	.loc 5 149 0
+.L1349:
 	mov	w0, 1
-	b	.L1327
-.LVL1775:
-.L1332:
-	.loc 5 124 0
+	b	.L1329
+.L1334:
 	strh	wzr, [x0, #:lo12:.LANCHOR156]
-	.loc 5 125 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1333
-	b	.L1331
-.LVL1776:
-.L1334:
-	.loc 5 148 0
+	bhi	.L1335
+	b	.L1333
+.L1336:
 	adrp	x0, .LANCHOR156
 	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1347
-	b	.L1338
-.LVL1777:
-.L1351:
-	.loc 5 162 0
+	bne	.L1349
+	b	.L1340
+.L1353:
 	ldrb	w0, [x0, 7]
 	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
 	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1339
-	.loc 5 162 0 is_stmt 0 discriminator 1
+	beq	.L1341
 	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
 	mov	w2, 162
 	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1778:
-.L1339:
-	.loc 5 163 0 is_stmt 1
+.L1341:
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
-	.loc 5 168 0
 	adrp	x25, .LANCHOR61
-	.loc 5 163 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
-	.loc 5 168 0
 	adrp	x26, .LANCHOR171
-	.loc 5 163 0
 	ldrb	w0, [x0, 7]
-	.loc 5 168 0
 	add	x25, x25, :lo12:.LANCHOR61
-	.loc 5 163 0
 	ldr	x1, [x23, #:lo12:.LANCHOR42]
-	.loc 5 168 0
 	add	x26, x26, :lo12:.LANCHOR171
-	.loc 5 165 0
 	mov	w21, 0
-	.loc 5 163 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	.loc 5 164 0
 	adrp	x1, .LANCHOR67
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR67]
-.LVL1779:
-.L1340:
-	.loc 5 165 0 discriminator 1
+.L1342:
 	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
-	bhi	.L1344
-	.loc 5 181 0
+	bhi	.L1346
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1780:
-	.loc 5 182 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1345
-	.loc 5 183 0
+	cbz	w1, .L1347
 	bl	INSERT_DATA_LIST
-.LVL1781:
-.L1346:
-	.loc 5 188 0
+.L1348:
 	adrp	x0, .LANCHOR95
-	.loc 5 186 0
 	mov	w21, -1
-.LVL1782:
-	.loc 5 187 0
 	strh	wzr, [x20, #:lo12:.LANCHOR97]
-	.loc 5 186 0
 	strh	w21, [x19, #:lo12:.LANCHOR53]
-	.loc 5 188 0
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	.loc 5 189 0
 	bl	l2p_flush
-.LVL1783:
-	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1784:
-	.loc 5 191 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1354
-	.loc 5 192 0
+	ble	.L1356
 	adrp	x0, .LANCHOR80
-	.loc 5 193 0
 	mov	w1, 20
-	.loc 5 192 0
 	strh	w21, [x0, #:lo12:.LANCHOR80]
-	.loc 5 193 0
 	adrp	x0, .LANCHOR82
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1354
-.LVL1785:
-.L1344:
-	.loc 5 166 0
+	b	.L1356
+.L1346:
 	adrp	x0, .LANCHOR98
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR98]
 	umull	x24, w21, w24
-	.loc 5 168 0
 	ldr	w0, [x25]
-	.loc 5 166 0
 	add	x22, x27, x24
-.LVL1786:
-	.loc 5 168 0
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1341
-	.loc 5 168 0 is_stmt 0 discriminator 1
+	bcc	.L1343
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1787:
-.L1341:
-	.loc 5 169 0 is_stmt 1
+.L1343:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-.LVL1788:
-	.loc 5 170 0
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1342
-	.loc 5 171 0
+	bne	.L1344
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1789:
 	mov	w24, w0
-.LVL1790:
-	.loc 5 172 0
 	ldr	w0, [x22, 8]
-.LVL1791:
 	mov	w2, 1
 	add	x1, x22, 4
 	bl	log2phys
-.LVL1792:
-	.loc 5 173 0
 	mov	w0, w24
-.LVL1793:
-.L1353:
-	.loc 5 177 0
+.L1355:
 	bl	decrement_vpc_count
-.LVL1794:
-.L1343:
-	.loc 5 165 0 discriminator 2
+.L1345:
 	add	w21, w21, 1
-.LVL1795:
 	and	w21, w21, 65535
-.LVL1796:
-	b	.L1340
-.L1342:
-	.loc 5 175 0
+	b	.L1342
+.L1344:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1343
-	.loc 5 177 0
+	beq	.L1345
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1353
-.LVL1797:
-.L1345:
-	.loc 5 185 0
+	b	.L1355
+.L1347:
 	bl	INSERT_FREE_LIST
-.LVL1798:
-	b	.L1346
-	.cfi_endproc
-.LFE308:
+	b	.L1348
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
 	.global	FtlGcPageRecovery
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
-.LFB311:
-	.loc 5 289 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 5 290 0
 	adrp	x20, .LANCHOR19
 	adrp	x19, .LANCHOR53
 	add	x19, x19, :lo12:.LANCHOR53
 	ldrh	w1, [x20, #:lo12:.LANCHOR19]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
-.LVL1799:
-	.loc 5 291 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1355
-.LBB321:
-.LBB322:
-	.loc 5 293 0
+	bcc	.L1357
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1800:
-	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1801:
-	.loc 5 295 0
 	adrp	x0, .LANCHOR152
 	str	wzr, [x0, #:lo12:.LANCHOR152]
-.L1355:
-.LBE322:
-.LBE321:
-	.loc 5 297 0
+.L1357:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE311:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",@progbits
 	.align	2
 	.global	FtlPowerLostRecovery
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
-.LFB283:
-	.loc 2 2081 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 2 2082 0
 	adrp	x0, .LANCHOR162
-	.loc 2 2081 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 2 2084 0
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	.loc 2 2082 0
 	str	wzr, [x0, #:lo12:.LANCHOR162]
-	.loc 2 2084 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1802:
-	.loc 2 2085 0
 	mov	x0, x19
-	.loc 2 2086 0
 	adrp	x19, .LANCHOR52
-	.loc 2 2085 0
 	bl	FtlSlcSuperblockCheck
-.LVL1803:
-	.loc 2 2086 0
 	add	x19, x19, :lo12:.LANCHOR52
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1804:
-	.loc 2 2087 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1805:
-	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1806:
-	.loc 2 2089 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1807:
-	.loc 2 2091 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE283:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
 	.align	2
 	.global	Ftl_gc_temp_data_write_back
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
-.LFB313:
-	.loc 5 316 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 320 0
 	mov	w3, 0
 	mov	w2, 0
-	.loc 5 316 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -16
-	.cfi_offset 20, -8
-	.loc 5 320 0
 	adrp	x19, .LANCHOR89
 	adrp	x20, .LANCHOR121
 	ldr	w1, [x19, #:lo12:.LANCHOR89]
-	.loc 5 321 0
 	add	x19, x19, :lo12:.LANCHOR89
-	.loc 5 320 0
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FlashProgPages
-.LVL1808:
-	.loc 5 321 0
 	mov	w11, 0
-.LVL1809:
-.L1361:
-	.loc 5 321 0 is_stmt 0 discriminator 1
+.L1363:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1364
-	.loc 5 335 0 is_stmt 1
+	bcc	.L1366
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FtlGcBufFree
-.LVL1810:
-	.loc 5 336 0
 	str	wzr, [x19]
-	.loc 5 337 0
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1365
-	.loc 5 338 0
+	cbnz	w0, .L1367
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1811:
-	b	.L1367
-.LVL1812:
-.L1364:
-	.loc 5 322 0
+	b	.L1369
+.L1366:
 	ldr	x2, [x20, #:lo12:.LANCHOR121]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1362
-	.loc 5 323 0
+	bne	.L1364
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
 	ldr	x3, [x3, #:lo12:.LANCHOR42]
 	strh	wzr, [x3, x4, lsl 1]
-	.loc 5 324 0
 	strh	w2, [x0, #:lo12:.LANCHOR53]
-	.loc 5 325 0
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
-	.loc 5 326 0
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1813:
-	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1814:
-	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1815:
-.L1367:
-	.loc 5 339 0
+.L1369:
 	mov	w0, 1
-.L1360:
-	.loc 5 342 0
+.L1362:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1816:
-.L1362:
-	.cfi_restore_state
-	.loc 5 331 0 discriminator 2
+.L1364:
 	ldr	x0, [x1, 16]
-.LVL1817:
-	.loc 5 332 0 discriminator 2
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1818:
 	bl	FtlGcUpdatePage
-.LVL1819:
-	.loc 5 321 0 discriminator 2
 	add	w11, w11, 1
-.LVL1820:
 	and	w11, w11, 65535
-.LVL1821:
-	b	.L1361
-.LVL1822:
-.L1365:
-	.loc 5 341 0
+	b	.L1363
+.L1367:
 	mov	w0, 0
-	b	.L1360
-	.cfi_endproc
-.LFE313:
+	b	.L1362
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
 	.global	Ftl_get_new_temp_ppa
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
-.LFB312:
-	.loc 5 300 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 5 301 0
 	adrp	x0, .LANCHOR53
 	mov	w2, 65535
-	.loc 5 300 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
 	mov	x19, x0
-	.loc 5 301 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1369
+	beq	.L1371
 	add	x1, x0, :lo12:.LANCHOR53
-	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1370
-.L1369:
-	.loc 5 303 0 is_stmt 1
+	cbnz	w0, .L1372
+.L1371:
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1823:
-	.loc 5 304 0
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
-	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1824:
-	.loc 5 306 0
 	adrp	x0, .LANCHOR95
 	strh	wzr, [x0, #:lo12:.LANCHOR95]
-	.loc 5 307 0
 	adrp	x0, .LANCHOR97
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	.loc 5 308 0
 	bl	l2p_flush
-.LVL1825:
-	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1826:
-	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1827:
-.L1370:
-	.loc 5 312 0
+.L1372:
 	add	x0, x19, :lo12:.LANCHOR53
-	.loc 5 313 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1828:
-	.cfi_endproc
-.LFE312:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-.LFB319:
-	.loc 5 470 0
-	.cfi_startproc
-.LVL1829:
 	stp	x29, x30, [sp, -192]!
-	.cfi_def_cfa_offset 192
-	.cfi_offset 29, -192
-	.cfi_offset 30, -184
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -160
-	.cfi_offset 22, -152
-	.loc 5 478 0
 	adrp	x22, .LANCHOR117
-	.loc 5 470 0
 	stp	x19, x20, [sp, 16]
-	.loc 5 478 0
 	ldr	w1, [x22, #:lo12:.LANCHOR117]
-.LVL1830:
-	.loc 5 470 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 19, -176
-	.cfi_offset 20, -168
-	.cfi_offset 23, -144
-	.cfi_offset 24, -136
-	.cfi_offset 25, -128
-	.cfi_offset 26, -120
-	.cfi_offset 27, -112
-	.cfi_offset 28, -104
-	.loc 5 478 0
-	cbnz	w1, .L1444
-	.loc 5 481 0
+	cbnz	w1, .L1446
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1444
+	bls	.L1446
 	mov	w24, w0
-	.loc 5 485 0
 	adrp	x0, .LANCHOR156
-.LVL1831:
 	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1374
-.L1377:
-.LVL1832:
-.LBB326:
-.LBB327:
-	.loc 5 489 0
+	bne	.L1376
+.L1379:
 	adrp	x0, .LANCHOR100
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
-	bne	.L1375
-.L1376:
-	.loc 5 496 0
+	bne	.L1377
+.L1378:
 	adrp	x2, .LANCHOR84
-	.loc 5 497 0
 	adrp	x19, .LANCHOR80
 	mov	w20, 65535
-	.loc 5 496 0
 	ldr	w1, [x2, #:lo12:.LANCHOR84]
-	.loc 5 497 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
-	.loc 5 496 0
 	add	w1, w1, 1
 	add	w1, w1, w24, lsl 7
 	str	w1, [x2, #:lo12:.LANCHOR84]
-	.loc 5 497 0
 	cmp	w0, w20
-	bne	.L1378
+	bne	.L1380
 	adrp	x3, .LANCHOR53
 	ldrh	w20, [x3, #:lo12:.LANCHOR53]
 	cmp	w20, w0
-	bne	.L1447
+	bne	.L1449
 	adrp	x0, .LANCHOR99
 	ldrh	w21, [x0, #:lo12:.LANCHOR99]
 	cmp	w21, w20
-	bne	.L1378
-	.loc 5 498 0
+	bne	.L1380
 	adrp	x23, .LANCHOR48
 	mov	w3, 1024
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
@@ -17933,200 +10109,125 @@ rk_ftl_garbage_collect:
 	mov	w0, 5120
 	csel	w0, w0, w3, cc
 	cmp	w1, w0
-	bls	.L1450
-.LBB328:
-	.loc 5 502 0
+	bls	.L1452
 	adrp	x0, .LANCHOR172
-	.loc 5 501 0
 	str	wzr, [x2, #:lo12:.LANCHOR84]
-	.loc 5 502 0
 	strh	wzr, [x0, #:lo12:.LANCHOR172]
-	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1833:
 	and	w20, w0, 65535
-.LVL1834:
-	.loc 5 504 0
 	cmp	w20, w21
-	bne	.L1451
-	.loc 5 505 0
+	bne	.L1453
 	adrp	x5, .LANCHOR83
 	ldrh	w1, [x23, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR83]
-.LVL1835:
 	cmp	w1, w0
-	bcs	.L1381
-	.loc 5 506 0
+	bcs	.L1383
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1836:
 	and	w0, w0, 65535
-.LVL1837:
-	.loc 5 507 0
 	cmp	w0, w20
-	beq	.L1383
-	.loc 5 508 0
+	beq	.L1385
 	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
-.LVL1838:
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1384
-	.loc 5 509 0
+	bhi	.L1386
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1839:
 	and	w21, w0, 65535
-.LVL1840:
-	.loc 5 510 0
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	.loc 5 520 0
 	cmp	w21, w20
-	bne	.L1380
-.LVL1841:
-.L1383:
-	.loc 5 523 0
+	bne	.L1382
+.L1385:
 	bl	FtlGcReFreshBadBlk
-.LVL1842:
-.L1378:
-.LBE328:
-	.loc 5 527 0
+.L1380:
 	cmp	w24, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1386
-	.loc 5 528 0
+	bne	.L1388
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1452
+	bhi	.L1454
 	adrp	x1, .LANCHOR19
-	.loc 5 530 0
 	cmp	w0, 16
-	.loc 5 531 0
 	ldrh	w21, [x1, #:lo12:.LANCHOR19]
-	.loc 5 530 0
-	bls	.L1388
-	.loc 5 531 0
+	bls	.L1390
 	lsr	w21, w21, 5
-.LVL1843:
-.L1387:
-	.loc 5 539 0
+.L1389:
 	adrp	x2, .LANCHOR82
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
-	bcs	.L1391
-	.loc 5 540 0
+	bcs	.L1393
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1392
+	bne	.L1394
 	adrp	x1, .LANCHOR99
 	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
-	bne	.L1392
-	.loc 5 542 0
+	bne	.L1394
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	cbnz	w0, .L1393
+	cbnz	w0, .L1395
 	adrp	x1, .LANCHOR61
 	adrp	x4, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1394
-.L1393:
-	.loc 5 543 0
+	bcs	.L1396
+.L1395:
 	adrp	x1, .LANCHOR78
 	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR82]
-.L1395:
-	.loc 5 546 0
+.L1397:
 	adrp	x1, .LANCHOR87
 	str	wzr, [x1, #:lo12:.LANCHOR87]
-.LVL1844:
-.L1372:
-.LBE327:
-.LBE326:
-	.loc 5 754 0
+.L1374:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1845:
-.L1374:
-	.cfi_restore_state
-	.loc 5 485 0 discriminator 1
+.L1376:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1377
-	.loc 5 486 0
+	beq	.L1379
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1846:
-	cbz	w0, .L1377
-	.loc 5 487 0
+	cbz	w0, .L1379
 	mov	w0, 1
-	b	.L1372
-.LVL1847:
-.L1375:
-.LBB331:
-.LBB330:
-	.loc 5 489 0
+	b	.L1374
+.L1377:
 	adrp	x1, .LANCHOR99
 	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
-	bne	.L1376
-	.loc 5 490 0
+	bne	.L1378
 	strh	w2, [x1, #:lo12:.LANCHOR99]
-	.loc 5 491 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR100]
-	b	.L1376
-.LVL1848:
-.L1384:
-.LBB329:
-	.loc 5 512 0
+	b	.L1378
+.L1386:
 	mov	w0, 64
-.L1476:
-	.loc 5 516 0
+.L1478:
 	strh	w0, [x5, #:lo12:.LANCHOR83]
-	b	.L1383
-.L1381:
+	b	.L1385
+.L1383:
 	mov	w0, 80
-	b	.L1476
-.LVL1849:
-.L1451:
-	.loc 5 504 0
+	b	.L1478
+.L1453:
 	mov	w21, w20
-.LVL1850:
-.L1380:
-	.loc 5 521 0
+.L1382:
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x21, 1, 32
 	adrp	x3, .LANCHOR82
@@ -18142,261 +10243,179 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC107
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.LVL1851:
-	b	.L1383
-.LVL1852:
-.L1447:
-.LBE329:
-	.loc 5 473 0
+	b	.L1385
+.L1449:
 	mov	w20, w0
-	b	.L1378
-.L1450:
+	b	.L1380
+.L1452:
 	mov	w20, w21
-	b	.L1378
-.LVL1853:
-.L1388:
-	.loc 5 532 0
+	b	.L1380
+.L1390:
 	cmp	w0, 12
-	bls	.L1389
-	.loc 5 533 0
+	bls	.L1391
 	lsr	w21, w21, 4
-.LVL1854:
-	b	.L1387
-.LVL1855:
-.L1389:
-	.loc 5 534 0
+	b	.L1389
+.L1391:
 	cmp	w0, 8
-	bls	.L1387
-	.loc 5 535 0
+	bls	.L1389
 	lsr	w21, w21, 2
-.LVL1856:
-	b	.L1387
-.LVL1857:
-.L1452:
-	.loc 5 529 0
+	b	.L1389
+.L1454:
 	mov	w21, 1
-	b	.L1387
-.LVL1858:
-.L1394:
-	.loc 5 545 0
+	b	.L1389
+.L1396:
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR82]
-	b	.L1395
-.L1392:
-	.loc 5 549 0
+	b	.L1397
+.L1394:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR82]
-.L1391:
-	.loc 5 551 0
+.L1393:
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1453
-	.loc 5 552 0
+	cbz	w0, .L1455
 	add	w21, w21, 32
-.LVL1859:
 	and	w21, w21, 65535
-.LVL1860:
-.L1453:
-	.loc 5 551 0
+.L1455:
 	mov	w20, 65535
-.LVL1861:
-.L1397:
-	.loc 5 595 0
+.L1399:
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1406
-	.loc 5 596 0
+	bne	.L1408
 	cmp	w20, w0
-	beq	.L1407
-	.loc 5 597 0
+	beq	.L1409
 	strh	w20, [x19, #:lo12:.LANCHOR80]
-.LVL1862:
-.L1408:
-	.loc 5 606 0
+.L1410:
 	add	x0, x19, :lo12:.LANCHOR80
-	.loc 5 607 0
 	mov	w1, 65535
-	.loc 5 606 0
 	strb	wzr, [x0, 8]
-	.loc 5 607 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	beq	.L1406
-	.loc 5 608 0
+	beq	.L1408
 	bl	IsBlkInGcList
-.LVL1863:
-	cbz	w0, .L1411
-	.loc 5 609 0
+	cbz	w0, .L1413
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1411:
-	.loc 5 611 0
+.L1413:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	add	x23, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
-	beq	.L1406
-	.loc 5 612 0
+	beq	.L1408
 	mov	x0, x23
 	bl	make_superblock
-.LVL1864:
-	.loc 5 615 0
 	adrp	x0, .LANCHOR173
-	.loc 5 616 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	.loc 5 613 0
 	strh	wzr, [x23, 2]
-	.loc 5 615 0
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
-	.loc 5 616 0
 	adrp	x0, .LANCHOR42
-	.loc 5 614 0
 	strb	wzr, [x23, 6]
-	.loc 5 616 0
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L1406:
-	.loc 5 621 0
+.L1408:
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	cmp	w2, w1
-	beq	.L1412
+	beq	.L1414
 	adrp	x0, .LANCHOR52
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w1
-	beq	.L1412
-	.loc 5 631 0
+	beq	.L1414
 	adrp	x24, .LANCHOR85
-.LVL1865:
-	.loc 5 653 0
 	add	x0, x24, :lo12:.LANCHOR85
 	str	x0, [x29, 160]
-.L1413:
-	.loc 5 627 0
+.L1415:
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1414
-	.loc 5 628 0
+	bne	.L1416
 	adrp	x0, .LANCHOR87
-	.loc 5 641 0
 	adrp	x25, .LANCHOR19
 	add	x25, x25, :lo12:.LANCHOR19
-	.loc 5 628 0
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-.L1415:
-	.loc 5 631 0
+.L1417:
 	ldrh	w5, [x24, #:lo12:.LANCHOR85]
 	add	x7, x24, :lo12:.LANCHOR85
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1866:
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR80]
-	.loc 5 632 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1416
-	.loc 5 633 0
+	bne	.L1418
 	strh	wzr, [x7]
-	.loc 5 634 0
 	mov	w0, 8
-	b	.L1372
-.LVL1867:
-.L1386:
-	.loc 5 557 0
+	b	.L1374
+.L1388:
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1456
+	bne	.L1458
 	adrp	x0, .LANCHOR99
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
-	bne	.L1456
+	bne	.L1458
 	cmp	w20, w0
-	bne	.L1456
+	bne	.L1458
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	beq	.L1398
-.LVL1868:
-.L1456:
-	.loc 5 556 0
+	beq	.L1400
+.L1458:
 	mov	w21, 1
-	b	.L1397
-.LVL1869:
-.L1398:
-	.loc 5 558 0
+	b	.L1399
+.L1400:
 	adrp	x0, .LANCHOR87
-	.loc 5 560 0
 	adrp	x21, .LANCHOR48
 	adrp	x23, .LANCHOR172
-	.loc 5 558 0
 	str	wzr, [x0, #:lo12:.LANCHOR87]
-	.loc 5 560 0
 	adrp	x0, .LANCHOR82
 	ldrh	w6, [x21, #:lo12:.LANCHOR48]
 	mov	x2, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR82]
 	cmp	w1, w6
-	.loc 5 561 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR172]
-	.loc 5 560 0
-	bcs	.L1399
-	.loc 5 561 0
-	cbnz	w1, .L1400
+	bcs	.L1401
+	cbnz	w1, .L1402
 	adrp	x1, .LANCHOR61
 	adrp	x3, .LANCHOR59
 	ldr	w1, [x1, #:lo12:.LANCHOR61]
 	ldr	w3, [x3, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w3, w1, lsr 2
-	bcs	.L1401
-.L1400:
-	.loc 5 562 0
+	bcs	.L1403
+.L1402:
 	adrp	x0, .LANCHOR78
 	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR82]
-.LVL1870:
-.L1477:
-	.loc 5 578 0
+.L1479:
 	bl	FtlReadRefresh
-.LVL1871:
-	.loc 5 579 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR172]
-	b	.L1372
-.LVL1872:
-.L1401:
-	.loc 5 564 0
+	b	.L1374
+.L1403:
 	mov	w1, 18
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	b	.L1477
-.L1399:
-	.loc 5 572 0
-	cbnz	w1, .L1456
-	.loc 5 573 0
+	b	.L1479
+.L1401:
+	cbnz	w1, .L1458
 	adrp	x1, .LANCHOR78
 	ldrh	w5, [x1, #:lo12:.LANCHOR78]
 	add	w1, w5, w5, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-	.loc 5 574 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1873:
-	.loc 5 575 0
 	ubfiz	x0, x0, 1, 16
-.LVL1874:
 	adrp	x1, .LANCHOR42
 	adrp	x2, .LANCHOR3
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
@@ -18406,335 +10425,227 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1404
-	.loc 5 576 0
+	ble	.L1406
 	sub	w5, w5, #1
-	.loc 5 575 0
 	cmp	w6, w5
-	bge	.L1477
-.L1404:
-	.loc 5 584 0
-	cbnz	w1, .L1456
-	.loc 5 585 0
+	bge	.L1479
+.L1406:
+	cbnz	w1, .L1458
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1875:
-	.loc 5 586 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1372
-.LVL1876:
-.L1407:
-	.loc 5 598 0
+	b	.L1374
+.L1409:
 	adrp	x0, .LANCHOR99
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w1, w20
-	beq	.L1408
-	.loc 5 600 0
+	beq	.L1410
 	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1409
-	.loc 5 601 0
+	cbnz	w1, .L1411
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-.L1409:
-	.loc 5 602 0
+.L1411:
 	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	strh	w1, [x19, #:lo12:.LANCHOR80]
-	.loc 5 603 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR99]
-	b	.L1408
-.LVL1877:
-.L1412:
-	.loc 5 622 0
+	b	.L1410
+.L1414:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.LVL1878:
-.L1478:
-	.loc 5 730 0
+.L1480:
 	adrp	x0, .LANCHOR172
 	ldrh	w0, [x0, #:lo12:.LANCHOR172]
-	b	.L1372
-.LVL1879:
-.L1416:
-	.loc 5 636 0
+	b	.L1374
+.L1418:
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1880:
 	add	w5, w5, 1
-	cbz	w0, .L1417
-	.loc 5 637 0
+	cbz	w0, .L1419
 	strh	w5, [x24, #:lo12:.LANCHOR85]
-	b	.L1415
-.L1417:
-	.loc 5 641 0
+	b	.L1417
+.L1419:
 	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x25]
 	ubfiz	x1, x6, 1, 16
 	ldr	x2, [x23, #:lo12:.LANCHOR42]
-	.loc 5 640 0
 	and	w5, w5, 65535
-	.loc 5 641 0
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	.loc 5 640 0
 	strh	w5, [x24, #:lo12:.LANCHOR85]
-	.loc 5 641 0
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1419
-	.loc 5 642 0
+	bgt	.L1421
 	cmp	w5, 48
-	bls	.L1420
+	bls	.L1422
 	cmp	w3, 8
-	bls	.L1420
+	bls	.L1422
 	adrp	x3, .LANCHOR95
 	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
-	bhi	.L1420
-.L1419:
-	.loc 5 643 0
+	bhi	.L1422
+.L1421:
 	ldr	x3, [x29, 160]
 	strh	wzr, [x3]
-.L1420:
-	.loc 5 645 0
+.L1422:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1421
+	bgt	.L1423
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1421
-	.loc 5 646 0
+	bne	.L1423
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-	.loc 5 647 0
 	adrp	x0, .LANCHOR85
 	strh	wzr, [x0, #:lo12:.LANCHOR85]
-	b	.L1478
-.L1421:
-	.loc 5 651 0
-	cbnz	w1, .L1422
-	.loc 5 652 0
+	b	.L1480
+.L1423:
+	cbnz	w1, .L1424
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1881:
-	.loc 5 653 0
 	ldr	x0, [x29, 160]
 	ldr	x1, [x29, 160]
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L1415
-.L1422:
-	.loc 5 656 0
+	b	.L1417
+.L1424:
 	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
-	.loc 5 658 0
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1423
+	bne	.L1425
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 658
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1882:
-.L1423:
-	.loc 5 659 0
+.L1425:
 	ldr	x0, [x29, 128]
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1424
+	bne	.L1426
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 659
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1883:
-.L1424:
-	.loc 5 660 0
+.L1426:
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1425
+	bne	.L1427
 	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
 	mov	w2, 660
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1884:
-.L1425:
-	.loc 5 661 0
+.L1427:
 	add	x25, x19, :lo12:.LANCHOR80
 	mov	x0, x25
 	bl	make_superblock
-.LVL1885:
-	.loc 5 662 0
 	adrp	x0, .LANCHOR173
-	.loc 5 663 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR80]
-	.loc 5 662 0
 	strh	wzr, [x0, #:lo12:.LANCHOR173]
-	.loc 5 663 0
 	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR174
-	.loc 5 664 0
 	strh	wzr, [x25, 2]
-	.loc 5 663 0
 	strh	w1, [x0, #:lo12:.LANCHOR174]
-	.loc 5 665 0
 	strb	wzr, [x25, 6]
-.L1414:
-	.loc 5 671 0
+.L1416:
 	bl	FtlReadRefresh
-.LVL1886:
-	.loc 5 675 0
 	adrp	x1, .LANCHOR19
-	.loc 5 674 0
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR117]
-	.loc 5 675 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	str	w0, [x29, 172]
-.LVL1887:
-	.loc 5 676 0
 	add	x0, x19, :lo12:.LANCHOR80
 	str	x1, [x29, 120]
 	ldr	w3, [x29, 172]
 	ldrh	w0, [x0, 2]
 	add	w2, w0, w21
 	cmp	w2, w3
-	ble	.L1426
-	.loc 5 677 0
+	ble	.L1428
 	sub	w21, w3, w0
-.LVL1888:
 	and	w21, w21, 65535
-.LVL1889:
-.L1426:
-	.loc 5 700 0
+.L1428:
 	adrp	x0, .LANCHOR173
-	.loc 5 689 0
 	mov	w27, 0
-	.loc 5 700 0
 	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 152]
-.LVL1890:
-.L1427:
-	.loc 5 679 0
+.L1429:
 	cmp	w21, w27, uxth
-	bls	.L1435
-	.loc 5 684 0
+	bls	.L1437
 	add	x1, x19, :lo12:.LANCHOR80
-	.loc 5 681 0
 	adrp	x0, .LANCHOR3
-	.loc 5 684 0
 	adrp	x25, .LANCHOR93
 	add	x1, x1, 16
-	.loc 5 681 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
-	.loc 5 684 0
 	mov	w23, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
-	.loc 5 683 0
 	mov	w6, 65535
-	.loc 5 684 0
 	add	w4, w4, w27
-	b	.L1436
-.LVL1891:
-.L1429:
-	.loc 5 682 0
+	b	.L1438
+.L1431:
 	ldrh	w3, [x1]
-.LVL1892:
-	.loc 5 683 0
 	cmp	w3, w6
-	beq	.L1428
-	.loc 5 684 0
+	beq	.L1430
 	ubfiz	x5, x23, 5, 16
-	.loc 5 685 0
 	add	w23, w23, 1
-.LVL1893:
-	.loc 5 684 0
 	add	x5, x0, x5
-	.loc 5 685 0
 	and	w23, w23, 65535
-.LVL1894:
-	.loc 5 684 0
 	orr	w3, w4, w3, lsl 10
-.LVL1895:
 	str	w3, [x5, 4]
-.L1428:
-	.loc 5 681 0
+.L1430:
 	add	w2, w2, 1
-.LVL1896:
 	add	x1, x1, 2
-.LVL1897:
 	and	w2, w2, 65535
-.LVL1898:
-.L1436:
+.L1438:
 	cmp	w2, w7
-	bne	.L1429
-	.loc 5 689 0
+	bne	.L1431
 	add	x1, x19, :lo12:.LANCHOR80
-	.loc 5 701 0
 	adrp	x26, .LANCHOR89
 	add	x26, x26, :lo12:.LANCHOR89
-	.loc 5 689 0
 	ldrb	w2, [x1, 8]
-.LVL1899:
 	mov	w1, w23
 	bl	FlashReadPages
-.LVL1900:
 	ubfiz	x0, x23, 5, 16
 	mov	x23, 0
-.LVL1901:
 	str	x0, [x29, 144]
-.LVL1902:
-.L1430:
-	.loc 5 691 0
+.L1432:
 	ldr	x0, [x29, 144]
 	cmp	x0, x23
-	bne	.L1434
-.LVL1903:
+	bne	.L1436
 	add	w27, w27, 1
-.LVL1904:
-	b	.L1427
-.LVL1905:
-.L1434:
-	.loc 5 692 0
+	b	.L1429
+.L1436:
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x1, x0, x23
-.LVL1906:
-	.loc 5 693 0
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	beq	.L1431
-	.loc 5 692 0
+	beq	.L1433
 	ldr	x28, [x1, 16]
-	.loc 5 693 0
 	mov	w0, 61589
 	ldrh	w1, [x28]
-.LVL1907:
 	cmp	w1, w0
-	bne	.L1431
-	.loc 5 695 0
+	bne	.L1433
 	ldr	w4, [x28, 8]
-.LVL1908:
-	.loc 5 696 0
 	cmn	w4, #1
-	bne	.L1432
+	bne	.L1434
 	str	w4, [x29, 112]
 	mov	w2, 696
 	adrp	x1, .LANCHOR175
@@ -18742,415 +10653,251 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1909:
 	ldr	w4, [x29, 112]
-.LVL1910:
-.L1432:
-	.loc 5 697 0
+.L1434:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-.LVL1911:
-	.loc 5 698 0
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x23
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1431
-	.loc 5 700 0
+	bne	.L1433
 	ldr	x1, [x29, 152]
-	.loc 5 701 0
 	adrp	x4, .LANCHOR121
-	.loc 5 700 0
 	ldr	x2, [x29, 152]
-	.loc 5 701 0
 	ldr	w0, [x0, 24]
-	.loc 5 700 0
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	.loc 5 701 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
 	ldr	w1, [x26]
 	add	x1, x2, x1, lsl 5
 	stp	x4, x1, [x29, 104]
 	str	w0, [x1, 24]
-	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1912:
 	ldp	x4, x1, [x29, 104]
-	.loc 5 703 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
-	.loc 5 702 0
 	str	w0, [x1, 4]
-	.loc 5 703 0
 	ldr	w1, [x26]
 	ubfiz	x0, x1, 5, 32
-	.loc 5 711 0
 	add	w1, w1, 1
-	.loc 5 703 0
 	add	x2, x2, x0
 	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x0, x0, x23
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
-	.loc 5 704 0
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	.loc 5 705 0
 	ldr	w2, [x29, 188]
 	str	w2, [x28, 12]
-	.loc 5 706 0
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	strh	w2, [x28, 2]
-	.loc 5 709 0
 	adrp	x2, .LANCHOR71
-	.loc 5 711 0
 	str	w1, [x26]
-	.loc 5 712 0
 	mov	w1, 1
-	.loc 5 709 0
 	ldr	w2, [x2, #:lo12:.LANCHOR71]
 	str	w2, [x28, 4]
-	.loc 5 712 0
 	bl	FtlGcBufAlloc
-.LVL1913:
-	.loc 5 713 0
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x26]
 	cmp	w1, w0
-	beq	.L1433
+	beq	.L1435
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1431
-.L1433:
-	.loc 5 714 0
+	cbnz	w0, .L1433
+.L1435:
 	bl	Ftl_gc_temp_data_write_back
-.LVL1914:
-	cbz	w0, .L1431
-.LVL1915:
-.L1479:
-	.loc 5 729 0
+	cbz	w0, .L1433
+.L1481:
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	b	.L1478
-.LVL1916:
-.L1431:
+	b	.L1480
+.L1433:
 	add	x23, x23, 32
-	b	.L1430
-.L1435:
-	.loc 5 723 0
+	b	.L1432
+.L1437:
 	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
 	add	w21, w21, w0
-.LVL1917:
-	.loc 5 725 0
 	ldr	w0, [x29, 172]
-	.loc 5 723 0
 	and	w21, w21, 65535
 	strh	w21, [x1, 2]
-	.loc 5 725 0
 	cmp	w0, w21
-	bls	.L1437
+	bls	.L1439
 	adrp	x0, .LANCHOR173
 	ldrh	w1, [x0, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR174
 	ldrh	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w1, w0
-	bne	.L1438
-.L1437:
-	.loc 5 727 0
+	bne	.L1440
+.L1439:
 	adrp	x0, .LANCHOR89
 	ldr	w0, [x0, #:lo12:.LANCHOR89]
-	cbz	w0, .L1439
-	.loc 5 728 0
+	cbz	w0, .L1441
 	bl	Ftl_gc_temp_data_write_back
-.LVL1918:
-	cbnz	w0, .L1479
-.L1439:
-	.loc 5 733 0
+	cbnz	w0, .L1481
+.L1441:
 	adrp	x0, .LANCHOR173
 	ldrh	w0, [x0, #:lo12:.LANCHOR173]
-	cbnz	w0, .L1440
+	cbnz	w0, .L1442
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	adrp	x1, .LANCHOR42
 	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1440
-	.loc 5 735 0
+	cbz	w2, .L1442
 	strh	wzr, [x1, x0]
-	.loc 5 736 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
-.LVL1919:
-	.loc 5 738 0
 	bl	l2p_flush
-.LVL1920:
-	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1921:
-.L1440:
-	.loc 5 741 0
+.L1442:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR80]
-.L1438:
-	.loc 5 743 0
+.L1440:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1441
-	.loc 5 745 0
+	bhi	.L1443
 	ldr	x0, [x29, 120]
 	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-.LVL1922:
-	b	.L1413
-.LVL1923:
-.L1441:
-	.loc 5 750 0
+	b	.L1415
+.L1443:
 	adrp	x1, .LANCHOR172
-	.loc 5 748 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	.loc 5 750 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR172]
-	.loc 5 751 0
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1372
-.LVL1924:
-.L1444:
-.LBE330:
-.LBE331:
-	.loc 5 479 0
+	b	.L1374
+.L1446:
 	mov	w0, 0
-.LVL1925:
-	b	.L1372
-	.cfi_endproc
-.LFE319:
+	b	.L1374
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.sftl_gc,"ax",@progbits
 	.align	2
 	.global	sftl_gc
 	.type	sftl_gc, %function
 sftl_gc:
-.LFB320:
-	.loc 5 757 0
-	.cfi_startproc
-	.loc 5 758 0
 	mov	w1, 1
 	mov	w0, w1
 	b	rk_ftl_garbage_collect
-.LVL1926:
-	.cfi_endproc
-.LFE320:
 	.size	sftl_gc, .-sftl_gc
 	.section	.text.FtlRead,"ax",@progbits
 	.align	2
 	.global	FtlRead
 	.type	FtlRead, %function
 FtlRead:
-.LFB214:
-	.loc 3 814 0
-	.cfi_startproc
-.LVL1927:
 	stp	x29, x30, [sp, -176]!
-	.cfi_def_cfa_offset 176
-	.cfi_offset 29, -176
-	.cfi_offset 30, -168
 	and	w0, w0, 255
-	.loc 3 824 0
 	cmp	w0, 16
-	.loc 3 814 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -160
-	.cfi_offset 20, -152
 	mov	w19, w1
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -128
-	.cfi_offset 24, -120
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -96
-	.cfi_offset 28, -88
 	mov	w27, w2
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -144
-	.cfi_offset 22, -136
-	.cfi_offset 25, -112
-	.cfi_offset 26, -104
-	.loc 3 824 0
-	bne	.L1482
-	.loc 3 825 0
+	bne	.L1484
 	mov	x2, x3
-.LVL1928:
 	mov	w1, w27
-.LVL1929:
 	add	w0, w19, 256
-.LVL1930:
 	bl	FtlVendorPartRead
-.LVL1931:
 	mov	w21, w0
-.LVL1932:
-.L1481:
-	.loc 3 901 0
+.L1483:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1933:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1934:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1935:
 	ldp	x29, x30, [sp], 176
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.LVL1936:
-.L1482:
-	.cfi_restore_state
-	.loc 3 830 0
+.L1484:
 	add	w0, w1, w2
 	str	w0, [x29, 140]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
-.LVL1937:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1502
-	.loc 3 830 0 is_stmt 0 discriminator 1
+	bhi	.L1504
 	adrp	x0, .LANCHOR86
 	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
-	beq	.L1481
-	.loc 3 835 0 is_stmt 1
+	beq	.L1483
 	adrp	x22, .LANCHOR12
-	.loc 3 836 0
 	sub	w24, w1, #1
-	.loc 3 841 0
 	adrp	x1, .LANCHOR62
-	.loc 3 840 0
 	mov	w25, 0
-	.loc 3 835 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 815 0
 	mov	w21, 0
-	.loc 3 851 0
 	adrp	x28, .LANCHOR120
-	.loc 3 828 0
 	stp	wzr, wzr, [x29, 144]
-	.loc 3 835 0
 	udiv	w26, w19, w0
-.LVL1938:
-	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1939:
-	.loc 3 835 0
 	mov	w20, w26
-	.loc 3 837 0
 	sub	w0, w24, w26
 	add	w0, w0, 1
 	stp	wzr, w0, [x29, 152]
-.LVL1940:
-	.loc 3 841 0
 	ldr	w0, [x1, #:lo12:.LANCHOR62]
-.LVL1941:
 	ldr	w2, [x29, 156]
-.LVL1942:
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR62]
-	.loc 3 886 0
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	str	x0, [x29, 128]
-.LVL1943:
-.L1484:
-	.loc 3 842 0
+.L1486:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1500
-	.loc 3 898 0
+	cbnz	w0, .L1502
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
-	cbnz	w0, .L1501
-	.loc 3 898 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L1503
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1481
-.L1501:
-	.loc 3 899 0 is_stmt 1
+	bhi	.L1483
+.L1503:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1944:
-	b	.L1481
-.L1500:
-	.loc 3 843 0
+	b	.L1483
+.L1502:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1945:
-	.loc 3 844 0
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1485
-	.loc 3 845 0 discriminator 1
+	bne	.L1487
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1486:
-.LVL1946:
+.L1488:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1488
-.LVL1947:
-.L1489:
-	.loc 3 874 0
+	bcc	.L1490
+.L1491:
 	ldr	w0, [x29, 156]
-	.loc 3 872 0
 	add	w20, w20, 1
-.LVL1948:
-	.loc 3 874 0
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-.LVL1949:
-	beq	.L1493
-	.loc 3 874 0 is_stmt 0 discriminator 1
+	beq	.L1495
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w25, w0, lsl 2
-	bne	.L1484
-.L1493:
-	.loc 3 875 0 is_stmt 1
-	cbz	w25, .L1484
-	.loc 3 876 0
+	bne	.L1486
+.L1495:
+	cbz	w25, .L1486
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1950:
-	.loc 3 883 0
 	ldr	w0, [x29, 144]
 	lsl	w0, w0, 9
 	str	w0, [x29, 136]
-	.loc 3 880 0
 	ldr	w0, [x29, 152]
 	lsl	w0, w0, 9
 	str	x0, [x29, 120]
@@ -19159,77 +10906,53 @@ FtlRead:
 	str	w0, [x29, 112]
 	ubfiz	x0, x25, 5, 32
 	mov	x25, 0
-.LVL1951:
 	str	x0, [x29, 104]
-.LVL1952:
-	.loc 3 883 0
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1499:
-	.loc 3 878 0
+.L1501:
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x0, x0, x25
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1495
-	.loc 3 879 0
+	bne	.L1497
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR115
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	cmp	x1, x0
-	bne	.L1496
-	.loc 3 880 0
+	bne	.L1498
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 112]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1513:
-	.loc 3 883 0
+.L1515:
 	bl	ftl_memcpy
-.LVL1953:
-.L1496:
-	.loc 3 885 0
+.L1498:
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1497
-	.loc 3 886 0
+	bne	.L1499
 	ldr	x1, [x29, 128]
-	.loc 3 887 0
 	mov	w21, w0
-.LVL1954:
-	.loc 3 886 0
 	ldr	x2, [x29, 128]
 	ldr	w1, [x1, 72]
 	add	w1, w1, 1
 	str	w1, [x2, 72]
-.LVL1955:
-.L1498:
-	.loc 3 877 0 discriminator 2
+.L1500:
 	ldr	x0, [x29, 104]
 	add	x25, x25, 32
-.LVL1956:
 	cmp	x0, x25
-	bne	.L1499
-	.loc 3 894 0
+	bne	.L1501
 	mov	w25, 0
-	b	.L1484
-.LVL1957:
-.L1488:
-	.loc 3 846 0
+	b	.L1486
+.L1490:
 	madd	w0, w20, w0, w4
-.LVL1958:
-	.loc 3 847 0
 	cmp	w19, w0
-	bhi	.L1487
-	.loc 3 847 0 is_stmt 0 discriminator 1
+	bhi	.L1489
 	ldr	w1, [x29, 140]
 	cmp	w1, w0
-	bls	.L1487
-	.loc 3 848 0 is_stmt 1
+	bls	.L1489
 	sub	w0, w0, w19
-.LVL1959:
 	str	x5, [x29, 112]
 	lsl	w0, w0, 9
 	str	w4, [x29, 120]
@@ -19237,114 +10960,75 @@ FtlRead:
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1960:
 	ldr	w4, [x29, 120]
 	ldr	x5, [x29, 112]
-.LVL1961:
-.L1487:
-	.loc 3 845 0 discriminator 2
+.L1489:
 	add	w4, w4, 1
-.LVL1962:
-	b	.L1486
-.LVL1963:
-.L1485:
-	.loc 3 851 0
+	b	.L1488
+.L1487:
 	ldr	x2, [x28, #:lo12:.LANCHOR120]
 	ubfiz	x0, x25, 5, 32
-	.loc 3 852 0
 	cmp	w20, w26
-	.loc 3 851 0
 	add	x0, x2, x0
 	str	w1, [x0, 4]
-	.loc 3 852 0
-	bne	.L1490
-	.loc 3 853 0
+	bne	.L1492
 	adrp	x1, .LANCHOR115
 	ldr	x1, [x1, #:lo12:.LANCHOR115]
 	str	x1, [x0, 8]
-	.loc 3 854 0
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
-.LVL1964:
-	.loc 3 855 0
 	sub	w2, w1, w2
-.LVL1965:
 	cmp	w27, w2
 	csel	w2, w27, w2, ls
-.LVL1966:
 	str	w2, [x29, 148]
-.LVL1967:
-	.loc 3 857 0
 	cmp	w1, w2
-	bne	.L1491
-	.loc 3 858 0
+	bne	.L1493
 	str	x23, [x0, 8]
-.LVL1968:
-.L1491:
-	.loc 3 867 0
+.L1493:
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR114
-	.loc 3 868 0
 	str	w20, [x0, 24]
-	.loc 3 867 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
 	ldr	x2, [x2, #:lo12:.LANCHOR114]
 	mul	w1, w1, w25
-	.loc 3 869 0
 	add	w25, w25, 1
-.LVL1969:
-	.loc 3 867 0
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1489
-.L1490:
-	.loc 3 859 0
+	b	.L1491
+.L1492:
 	cmp	w20, w24
-	bne	.L1492
-	.loc 3 861 0
+	bne	.L1494
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	.loc 3 860 0
 	adrp	x1, .LANCHOR113
-	.loc 3 861 0
 	ldr	w3, [x29, 140]
-	.loc 3 860 0
 	ldr	x1, [x1, #:lo12:.LANCHOR113]
 	str	x1, [x0, 8]
-	.loc 3 861 0
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
-.LVL1970:
-	.loc 3 862 0
 	cmp	w2, w3
-	bne	.L1491
-.LVL1971:
-.L1512:
-	.loc 3 865 0
+	bne	.L1493
+.L1514:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1491
-.L1492:
+	b	.L1493
+.L1494:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1512
-.LVL1972:
-.L1495:
-	.loc 3 881 0
+	b	.L1514
+.L1497:
 	cmp	w24, w1
-	bne	.L1496
-	.loc 3 882 0
+	bne	.L1498
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR113
 	ldr	x0, [x0, #:lo12:.LANCHOR113]
 	cmp	x1, x0
-	bne	.L1496
-	.loc 3 883 0
+	bne	.L1498
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 136]
 	ldrh	w0, [x0]
@@ -19352,282 +11036,162 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1513
-.L1497:
-	.loc 3 889 0
+	b	.L1515
+.L1499:
 	cmp	w0, 256
-	bne	.L1498
-.LBB332:
-	.loc 3 890 0
+	bne	.L1500
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1973:
-	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1974:
-	b	.L1498
-.LVL1975:
-.L1502:
-.LBE332:
-	.loc 3 831 0
+	b	.L1500
+.L1504:
 	mov	w21, -1
-	b	.L1481
-	.cfi_endproc
-.LFE214:
+	b	.L1483
 	.size	FtlRead, .-FtlRead
 	.section	.text.sftl_read,"ax",@progbits
 	.align	2
 	.global	sftl_read
 	.type	sftl_read, %function
 sftl_read:
-.LFB219:
-	.loc 3 1168 0
-	.cfi_startproc
-.LVL1976:
-	.loc 3 1169 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1977:
 	mov	w1, w0
-.LVL1978:
 	mov	w0, 0
-.LVL1979:
 	b	FtlRead
-.LVL1980:
-	.cfi_endproc
-.LFE219:
 	.size	sftl_read, .-sftl_read
 	.section	.text.FtlWrite,"ax",@progbits
 	.align	2
 	.global	FtlWrite
 	.type	FtlWrite, %function
 FtlWrite:
-.LFB217:
-	.loc 3 958 0
-	.cfi_startproc
-.LVL1981:
 	stp	x29, x30, [sp, -240]!
-	.cfi_def_cfa_offset 240
-	.cfi_offset 29, -240
-	.cfi_offset 30, -232
 	and	w0, w0, 255
-	.loc 3 966 0
 	cmp	w0, 16
-	.loc 3 958 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -208
-	.cfi_offset 22, -200
 	mov	w21, w1
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
 	mov	x26, x3
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-	.cfi_offset 27, -160
-	.cfi_offset 28, -152
-	.loc 3 958 0
 	str	w2, [x29, 176]
-	.loc 3 966 0
-	bne	.L1516
-	.loc 3 967 0
+	bne	.L1518
 	add	w0, w1, 256
-.LVL1982:
 	ldr	w1, [x29, 176]
-.LVL1983:
 	mov	x2, x3
-.LVL1984:
 	bl	FtlVendorPartWrite
-.LVL1985:
-.L1515:
-	.loc 3 1117 0
+.L1517:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1986:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-.LVL1987:
 	ret
-.LVL1988:
-.L1516:
-	.cfi_restore_state
-	.loc 3 970 0
+.L1518:
 	ldr	w0, [x29, 176]
 	add	w0, w1, w0
 	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR34
 	ldr	w1, [x29, 168]
-.LVL1989:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1551
-	.loc 3 970 0 is_stmt 0 discriminator 1
+	bhi	.L1553
 	adrp	x0, .LANCHOR86
 	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
-	beq	.L1515
-	.loc 3 973 0 is_stmt 1
+	beq	.L1517
 	adrp	x0, .LANCHOR176
 	mov	w1, 2048
-	.loc 3 974 0
 	adrp	x22, .LANCHOR12
-	.loc 3 973 0
 	str	w1, [x0, #:lo12:.LANCHOR176]
-	.loc 3 975 0
 	ldr	w1, [x29, 168]
-	.loc 3 974 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 975 0
 	sub	w1, w1, #1
-	.loc 3 974 0
 	udiv	w25, w21, w0
-.LVL1990:
-	.loc 3 975 0
 	udiv	w0, w1, w0
-	.loc 3 978 0
 	adrp	x1, .LANCHOR64
-	.loc 3 975 0
 	str	w0, [x29, 156]
-.LVL1991:
-	.loc 3 976 0
 	sub	w0, w0, w25
-.LVL1992:
 	add	w24, w0, 1
-.LVL1993:
 	str	w0, [x29, 152]
-	.loc 3 978 0
 	ldr	w0, [x1, #:lo12:.LANCHOR64]
 	add	w0, w0, w24
 	str	w0, [x1, #:lo12:.LANCHOR64]
-.LVL1994:
-	.loc 3 984 0
 	adrp	x0, .LANCHOR177
 	str	x0, [x29, 160]
 	ldr	w1, [x0, #:lo12:.LANCHOR177]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1518
-	.loc 3 984 0 is_stmt 0 discriminator 1
+	cbz	w1, .L1520
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1518
-	.loc 3 985 0 is_stmt 1
+	cbnz	w0, .L1520
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1518:
+.L1520:
 	mov	w20, w25
-	.loc 3 999 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.LVL1995:
-.L1519:
-	.loc 3 987 0
-	cbnz	w24, .L1547
-	.loc 3 1101 0
+.L1521:
+	cbnz	w24, .L1549
 	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1996:
-	.loc 3 1103 0
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 15
-	bls	.L1548
-.LVL1997:
-.L1550:
-	.loc 3 1116 0
+	bls	.L1550
+.L1552:
 	mov	w0, 0
-	b	.L1515
-.LVL1998:
-.L1547:
-	.loc 3 988 0
+	b	.L1517
+.L1549:
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1520
-	.loc 3 988 0 is_stmt 0 discriminator 1
+	bcc	.L1522
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 988
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1999:
-.L1520:
-	.loc 3 989 0 is_stmt 1
+.L1522:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1521
-	.loc 3 992 0
+	cbnz	w0, .L1523
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1522
-	.loc 3 993 0
+	bne	.L1524
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1523
-	.loc 3 994 0
+	cbnz	w1, .L1525
 	bl	allocate_new_data_superblock
-.LVL2000:
-	.loc 3 995 0
 	ldr	x0, [x29, 160]
 	str	wzr, [x0, #:lo12:.LANCHOR177]
-.L1523:
-	.loc 3 997 0
+.L1525:
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2001:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2002:
-	.loc 3 998 0
 	ldr	x0, [x29, 160]
 	ldr	w0, [x0, #:lo12:.LANCHOR177]
-	.loc 3 999 0
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1524:
-.LVL2003:
-	.loc 3 1009 0
+.L1526:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1521
-	.loc 3 1010 0
+	cbnz	w0, .L1523
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2004:
-.L1521:
-	.loc 3 1019 0
+.L1523:
 	ldrh	w0, [x19, 4]
-	.loc 3 1017 0
 	ldrb	w1, [x19, 7]
 	cmp	w0, w24
 	csel	w0, w0, w24, ls
@@ -19635,112 +11199,76 @@ FtlWrite:
 	cmp	w1, w0
 	csel	w0, w1, w0, ls
 	str	w0, [x29, 148]
-.LVL2005:
-	.loc 3 1021 0
 	ldr	x0, [x29, 120]
-.LVL2006:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1525
-	.loc 3 1021 0 is_stmt 0 discriminator 1
+	bcc	.L1527
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1021
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2007:
-.L1525:
-	.loc 3 1031 0 is_stmt 1 discriminator 1
+.L1527:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	.loc 3 1044 0 discriminator 1
 	str	xzr, [x29, 184]
-	.loc 3 1031 0 discriminator 1
 	str	x0, [x29, 112]
-	.loc 3 1077 0 discriminator 1
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1526:
-	.loc 3 1022 0 discriminator 1
+.L1528:
 	ldr	w1, [x29, 148]
 	adrp	x28, .LANCHOR122
 	ldr	w23, [x29, 184]
-.LVL2008:
 	cmp	w23, w1
-	bcc	.L1545
+	bcc	.L1547
 	mov	x23, x1
-.L1527:
-.LVL2009:
-	.loc 3 1097 0
+.L1529:
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	mov	x3, x19
 	mov	w2, 0
 	mov	w1, w23
 	bl	FtlProgPages
-.LVL2010:
-	.loc 3 1098 0
 	cmp	w24, w23
-	bcs	.L1546
-	.loc 3 1098 0 is_stmt 0 discriminator 1
+	bcs	.L1548
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1098
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2011:
-.L1546:
-	.loc 3 1099 0 is_stmt 1
+.L1548:
 	sub	w24, w24, w23
-.LVL2012:
-	b	.L1519
-.LVL2013:
-.L1522:
-	.loc 3 1003 0
+	b	.L1521
+.L1524:
 	ldr	x1, [x29, 160]
 	str	wzr, [x1, #:lo12:.LANCHOR177]
-	.loc 3 1004 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1556
-	.loc 3 1005 0
+	cbnz	w1, .L1558
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2014:
-	b	.L1524
-.L1556:
+	b	.L1526
+.L1558:
 	mov	x19, x0
-.LVL2015:
-	b	.L1521
-.LVL2016:
-.L1545:
-	.loc 3 1023 0
+	b	.L1523
+.L1547:
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1527
-	.loc 3 1027 0
+	cbz	w0, .L1529
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2017:
-	.loc 3 1028 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2018:
 	ldr	x1, [x29, 184]
 	lsl	x27, x1, 5
-	.loc 3 1030 0
 	ldr	x1, [x28, #:lo12:.LANCHOR122]
 	add	x1, x1, x27
 	str	w0, [x1, 4]
-	.loc 3 1031 0
 	ldr	x0, [x29, 112]
-.LVL2019:
-	.loc 3 1032 0
 	str	w20, [x1, 24]
-	.loc 3 1031 0
 	ldrh	w2, [x0]
 	mul	w23, w23, w2
 	and	x0, x23, 4294967292
@@ -19750,176 +11278,118 @@ FtlWrite:
 	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	str	x0, [x29, 128]
 	add	x23, x0, x3
-.LVL2020:
 	str	x23, [x1, 16]
-	.loc 3 1035 0
 	mov	x0, x23
 	mov	w1, 0
-.LVL2021:
 	bl	ftl_memset
-.LVL2022:
-	.loc 3 1037 0
 	ldr	w0, [x29, 156]
 	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1528
-	.loc 3 1038 0
+	bne	.L1530
 	cmp	w20, w25
-	bne	.L1529
-	.loc 3 1039 0
+	bne	.L1531
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	udiv	w0, w21, w2
 	msub	w0, w0, w2, w21
 	str	w0, [x29, 172]
-.LVL2023:
-	.loc 3 1040 0
 	sub	w2, w2, w0
 	ldr	w0, [x29, 176]
-.LVL2024:
 	cmp	w2, w0
 	csel	w0, w2, w0, ls
 	str	w0, [x29, 180]
-.LVL2025:
-.L1530:
-	.loc 3 1048 0
+.L1532:
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	ldr	w1, [x29, 180]
 	cmp	w1, w0
-	.loc 3 1050 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1048 0
-	bne	.L1531
-	.loc 3 1050 0
+	bne	.L1533
 	add	x3, x0, x27
-	.loc 3 1049 0
 	cmp	w20, w25
-	bne	.L1532
-	.loc 3 1050 0
+	bne	.L1534
 	str	x26, [x3, 8]
-.LVL2026:
-.L1533:
-	.loc 3 1089 0
+.L1535:
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1542
-	.loc 3 1089 0 is_stmt 0 discriminator 1
+	bcc	.L1544
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	mov	w2, 1089
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2027:
-.L1542:
-	.loc 3 1090 0 is_stmt 1
+.L1544:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	.loc 3 1091 0
 	adrp	x1, .LANCHOR71
 	ldr	w0, [x1, #:lo12:.LANCHOR71]
-	.loc 3 1092 0
 	stp	w0, w20, [x23, 4]
-	.loc 3 1095 0
 	add	w20, w20, 1
-.LVL2028:
-	.loc 3 1091 0
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x1, #:lo12:.LANCHOR71]
-	.loc 3 1093 0
 	ldr	w0, [x29, 204]
 	str	w0, [x23, 12]
-	.loc 3 1094 0
 	ldrh	w0, [x19]
 	strh	w0, [x23, 2]
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1526
-.LVL2029:
-.L1529:
-	.loc 3 1045 0
+	b	.L1528
+.L1531:
 	ldr	w0, [x29, 168]
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
-	.loc 3 1044 0
 	str	wzr, [x29, 172]
-	.loc 3 1045 0
 	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
 	str	w0, [x29, 180]
-.LVL2030:
-	b	.L1530
-.LVL2031:
-.L1532:
-	.loc 3 1052 0
+	b	.L1532
+.L1534:
 	ldr	w0, [x29, 180]
-.LVL2032:
-.L1563:
-	.loc 3 1087 0
+.L1565:
 	mul	w0, w0, w20
 	sub	w0, w0, w21
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x3, 8]
-	b	.L1533
-.LVL2033:
-.L1531:
-	.loc 3 1056 0
+	b	.L1535
+.L1533:
 	add	x0, x0, x27
-	.loc 3 1055 0
 	cmp	w20, w25
-	bne	.L1534
-	.loc 3 1056 0
+	bne	.L1536
 	adrp	x1, .LANCHOR115
 	ldr	x1, [x1, #:lo12:.LANCHOR115]
-.L1562:
-	.loc 3 1058 0
+.L1564:
 	str	x1, [x0, 8]
-	.loc 3 1060 0
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1536
-.LBB333:
-	.loc 3 1062 0
+	beq	.L1538
 	str	w0, [x29, 212]
-	.loc 3 1066 0
 	mov	w2, 0
-	.loc 3 1064 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1063 0
 	str	w20, [x29, 232]
-	.loc 3 1064 0
 	add	x0, x0, x27
-	.loc 3 1065 0
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 216]
-	.loc 3 1066 0
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2034:
-	.loc 3 1067 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1537
-	.loc 3 1068 0
+	bne	.L1539
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1540:
+.L1542:
 	ldr	w0, [x29, 180]
-.LBE333:
-	.loc 3 1080 0
 	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1541
-	.loc 3 1081 0
+	bne	.L1543
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	mov	x1, x26
 	add	x3, x0, x27
@@ -19927,52 +11397,38 @@ FtlWrite:
 	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
 	add	x0, x3, x0
-.L1564:
-	.loc 3 1083 0
+.L1566:
 	bl	ftl_memcpy
-.LVL2035:
-	b	.L1533
-.L1534:
-	.loc 3 1058 0
+	b	.L1535
+.L1536:
 	adrp	x1, .LANCHOR113
 	ldr	x1, [x1, #:lo12:.LANCHOR113]
-	b	.L1562
-.L1537:
-.LBB334:
-	.loc 3 1070 0
+	b	.L1564
+.L1539:
 	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1539
-	.loc 3 1071 0
+	beq	.L1541
 	adrp	x0, .LANCHOR81
 	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	.loc 3 1072 0
 	adrp	x0, .LC108
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC108
 	bl	printf
-.LVL2036:
-.L1539:
-	.loc 3 1074 0
+.L1541:
 	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1540
-	.loc 3 1074 0 is_stmt 0 discriminator 1
+	beq	.L1542
 	mov	w2, 1074
 	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2037:
-	b	.L1540
-.LVL2038:
-.L1536:
-.LBE334:
-	.loc 3 1077 0 is_stmt 1
+	b	.L1542
+.L1538:
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	ldr	x1, [x29, 104]
 	add	x0, x0, x27
@@ -19980,10 +11436,8 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2039:
-	b	.L1540
-.L1541:
-	.loc 3 1083 0
+	b	.L1542
+.L1543:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x3, x0, x27
@@ -19992,260 +11446,147 @@ FtlWrite:
 	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
 	add	x1, x26, x1
-	b	.L1564
-.LVL2040:
-.L1528:
-	.loc 3 1087 0
+	b	.L1566
+.L1530:
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x3, x0, x27
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	b	.L1563
-.LVL2041:
-.L1548:
-	.loc 3 1105 0
+	b	.L1565
+.L1550:
 	adrp	x21, .LANCHOR99
-.LVL2042:
-	.loc 3 1107 0
 	adrp	x20, .LANCHOR83
-.LVL2043:
-	.loc 3 1108 0
 	adrp	x19, .LANCHOR82
-.LVL2044:
-	.loc 3 1105 0
 	add	x21, x21, :lo12:.LANCHOR99
-	.loc 3 1107 0
 	add	x20, x20, :lo12:.LANCHOR83
-	.loc 3 1108 0
 	add	x19, x19, :lo12:.LANCHOR82
-.L1560:
-	.loc 3 1105 0
+.L1562:
 	adrp	x0, .LANCHOR80
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w1
-	bne	.L1549
-	.loc 3 1105 0 is_stmt 0 discriminator 1
+	bne	.L1551
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bne	.L1549
-	.loc 3 1106 0 is_stmt 1
+	bne	.L1551
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL2045:
 	bl	FtlGcRefreshBlock
-.LVL2046:
-.L1549:
-	.loc 3 1107 0
+.L1551:
 	mov	w0, 128
-	.loc 3 1109 0
 	mov	w1, 1
-	.loc 3 1107 0
 	strh	w0, [x20]
-	.loc 3 1108 0
 	strh	w0, [x19]
-	.loc 3 1109 0
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-.LVL2047:
-	.loc 3 1110 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2048:
-	.loc 3 1111 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 8
-	bls	.L1560
-	b	.L1550
-.LVL2049:
-.L1551:
-	.loc 3 971 0
+	bls	.L1562
+	b	.L1552
+.L1553:
 	mov	w0, -1
-	b	.L1515
-	.cfi_endproc
-.LFE217:
+	b	.L1517
 	.size	FtlWrite, .-FtlWrite
 	.section	.text.sftl_write,"ax",@progbits
 	.align	2
 	.global	sftl_write
 	.type	sftl_write, %function
 sftl_write:
-.LFB220:
-	.loc 3 1173 0
-	.cfi_startproc
-.LVL2050:
-	.loc 3 1174 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2051:
 	mov	w1, w0
-.LVL2052:
 	mov	w0, 0
-.LVL2053:
 	b	FtlWrite
-.LVL2054:
-	.cfi_endproc
-.LFE220:
 	.size	sftl_write, .-sftl_write
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
 	.global	FtlLoadSysInfo
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
-.LFB274:
-	.loc 2 1409 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
-	.loc 2 1417 0
 	mov	w1, 0
-	.loc 2 1409 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 2 1414 0
 	adrp	x19, .LANCHOR106
-	.loc 2 1409 0
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -48
-	.cfi_offset 24, -40
-	.loc 2 1414 0
 	adrp	x23, .LANCHOR107
-	.loc 2 1409 0
 	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 1414 0
 	add	x21, x19, :lo12:.LANCHOR106
-	.loc 2 1409 0
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -32
-	.cfi_offset 26, -24
-	.loc 2 1415 0
 	adrp	x26, .LANCHOR108
-	.loc 2 1409 0
 	stp	x27, x28, [sp, 80]
-	.cfi_offset 27, -16
-	.cfi_offset 28, -8
-	.loc 2 1417 0
 	adrp	x25, .LANCHOR42
-	.loc 2 1414 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 2 1417 0
 	adrp	x24, .LANCHOR5
-	.loc 2 1414 0
 	str	x0, [x21, 8]
-	.loc 2 1418 0
 	adrp	x20, .LANCHOR79
-	.loc 2 1415 0
 	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	str	x0, [x21, 16]
-	.loc 2 1417 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2055:
-	.loc 2 1418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1567
-.L1575:
-	.loc 2 1419 0
+	bne	.L1569
+.L1577:
 	mov	w0, -1
-.L1566:
-	.loc 2 1512 0
+.L1568:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 27
-	.cfi_restore 28
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.L1567:
-	.cfi_restore_state
+.L1569:
 	add	x27, x20, :lo12:.LANCHOR79
-	.loc 2 1421 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2056:
 	sxth	w22, w0
-.LVL2057:
-	.loc 2 1422 0
 	add	w0, w0, 1
-	.loc 2 1431 0
 	mov	w28, 61604
-	.loc 2 1422 0
 	strh	w0, [x27, 2]
-	.loc 2 1430 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1569:
-	.loc 2 1424 0
-	tbz	w22, #31, .L1572
-	.loc 2 1437 0
+.L1571:
+	tbz	w22, #31, .L1574
 	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
 	mov	w2, 1437
 	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2058:
-.L1571:
-	.loc 2 1439 0
+.L1573:
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1574
-	.loc 2 1439 0 is_stmt 0 discriminator 1
+	bcs	.L1576
 	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
 	mov	w2, 1439
 	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2059:
-.L1574:
-	.loc 2 1441 0 is_stmt 1
+.L1576:
 	add	x22, x19, :lo12:.LANCHOR106
-.LVL2060:
 	adrp	x19, .LANCHOR39
 	add	x21, x19, :lo12:.LANCHOR39
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2061:
-	.loc 2 1442 0
 	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	ldr	x1, [x22, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2062:
-	.loc 2 1443 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
 	lsr	w2, w1, 3
@@ -20257,419 +11598,252 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2063:
-	.loc 2 1445 0
 	ldr	w1, [x19, #:lo12:.LANCHOR39]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1575
-	.loc 2 1448 0
+	bne	.L1577
 	add	x20, x20, :lo12:.LANCHOR79
-	.loc 2 1449 0
 	adrp	x0, .LANCHOR10
-	.loc 2 1448 0
 	ldrh	w1, [x21, 8]
-	.loc 2 1449 0
 	ldrb	w2, [x21, 10]
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	.loc 2 1448 0
 	strh	w1, [x20, 6]
-	.loc 2 1449 0
 	cmp	w2, w0
-	bne	.L1575
-	.loc 2 1452 0
+	bne	.L1577
 	adrp	x0, .LANCHOR180
-	.loc 2 1453 0
 	adrp	x2, .LANCHOR61
-	.loc 2 1455 0
 	adrp	x3, .LANCHOR3
-	.loc 2 1452 0
 	str	w1, [x0, #:lo12:.LANCHOR180]
-	.loc 2 1453 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1455 0
 	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	.loc 2 1453 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	str	w0, [x2, #:lo12:.LANCHOR61]
-	.loc 2 1454 0
 	adrp	x2, .LANCHOR12
 	ldrh	w2, [x2, #:lo12:.LANCHOR12]
 	mul	w0, w2, w0
 	adrp	x2, .LANCHOR34
 	str	w0, [x2, #:lo12:.LANCHOR34]
-	.loc 2 1455 0
 	adrp	x0, .LANCHOR7
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	adrp	x0, .LANCHOR37+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	.loc 2 1461 0
 	cmp	w1, w2
-	.loc 2 1455 0
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR78
 	strh	w0, [x3, #:lo12:.LANCHOR78]
-	.loc 2 1461 0
-	bls	.L1576
-	.loc 2 1461 0 is_stmt 0 discriminator 1
+	bls	.L1578
 	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
 	mov	w2, 1461
 	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2064:
-.L1576:
-	.loc 2 1463 0 is_stmt 1
+.L1578:
 	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
-	.loc 2 1468 0
 	adrp	x20, .LANCHOR80
-	.loc 2 1464 0
 	ldrh	w2, [x1, 16]
-	.loc 2 1463 0
 	ldrh	w6, [x1, 14]
 	strh	w6, [x0, #:lo12:.LANCHOR51]
-	.loc 2 1464 0
 	lsr	w4, w2, 6
-	.loc 2 1465 0
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
-	.loc 2 1466 0
 	ldrb	w2, [x1, 11]
 	strb	w2, [x3, 8]
-	.loc 2 1468 0
 	add	x2, x20, :lo12:.LANCHOR80
-	.loc 2 1464 0
 	strh	w4, [x3, 2]
-	.loc 2 1468 0
 	mov	w3, -1
 	strh	w3, [x20, #:lo12:.LANCHOR80]
-	.loc 2 1469 0
 	strh	wzr, [x2, 2]
-	.loc 2 1470 0
 	strb	wzr, [x2, 6]
-	.loc 2 1471 0
 	strb	wzr, [x2, 8]
-	.loc 2 1473 0
 	adrp	x2, .LANCHOR52
 	ldrh	w3, [x1, 18]
 	add	x4, x2, :lo12:.LANCHOR52
 	strh	w3, [x2, #:lo12:.LANCHOR52]
 	mov	x21, x2
-	.loc 2 1474 0
 	ldrh	w3, [x1, 20]
 	lsr	w5, w3, 6
-	.loc 2 1475 0
 	and	w3, w3, 63
 	strb	w3, [x4, 6]
-	.loc 2 1476 0
 	ldrb	w3, [x1, 12]
-	.loc 2 1474 0
 	strh	w5, [x4, 2]
-	.loc 2 1476 0
 	strb	w3, [x4, 8]
-	.loc 2 1478 0
 	adrp	x4, .LANCHOR53
 	ldrh	w3, [x1, 22]
 	add	x5, x4, :lo12:.LANCHOR53
 	strh	w3, [x4, #:lo12:.LANCHOR53]
 	mov	x22, x4
-	.loc 2 1479 0
 	ldrh	w3, [x1, 24]
 	lsr	w7, w3, 6
-	.loc 2 1480 0
 	and	w3, w3, 63
 	strb	w3, [x5, 6]
-	.loc 2 1481 0
 	ldrb	w3, [x1, 13]
 	strb	w3, [x5, 8]
-	.loc 2 1483 0
 	adrp	x3, .LANCHOR67
-	.loc 2 1479 0
 	strh	w7, [x5, 2]
-	.loc 2 1488 0
 	ldr	w5, [x1, 32]
-	.loc 2 1483 0
 	str	wzr, [x3, #:lo12:.LANCHOR67]
-	.loc 2 1484 0
 	adrp	x3, .LANCHOR64
 	str	wzr, [x3, #:lo12:.LANCHOR64]
-	.loc 2 1485 0
 	adrp	x3, .LANCHOR62
 	str	wzr, [x3, #:lo12:.LANCHOR62]
-	.loc 2 1486 0
 	adrp	x3, .LANCHOR66
 	str	wzr, [x3, #:lo12:.LANCHOR66]
-	.loc 2 1488 0
 	adrp	x3, .LANCHOR72
 	str	w5, [x3, #:lo12:.LANCHOR72]
-	.loc 2 1489 0
 	adrp	x3, .LANCHOR73
 	str	wzr, [x3, #:lo12:.LANCHOR73]
-	.loc 2 1490 0
 	adrp	x3, .LANCHOR76
 	str	wzr, [x3, #:lo12:.LANCHOR76]
-	.loc 2 1491 0
 	adrp	x3, .LANCHOR65
 	str	wzr, [x3, #:lo12:.LANCHOR65]
-	.loc 2 1493 0
 	ldr	w3, [x1, 40]
 	adrp	x1, .LANCHOR70
 	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L1577
-	.loc 2 1494 0
+	bls	.L1579
 	str	w3, [x1, #:lo12:.LANCHOR70]
-.L1577:
-	.loc 2 1496 0
+.L1579:
 	add	x19, x19, :lo12:.LANCHOR39
 	adrp	x1, .LANCHOR71
 	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1578
-	.loc 2 1497 0
+	bls	.L1580
 	str	w2, [x1, #:lo12:.LANCHOR71]
-.L1578:
-	.loc 2 1499 0
+.L1580:
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1579
-	.loc 2 1500 0
+	beq	.L1581
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2065:
-.L1579:
-	.loc 2 1502 0
+.L1581:
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1580
-	.loc 2 1503 0
+	beq	.L1582
 	bl	make_superblock
-.LVL2066:
-.L1580:
-	.loc 2 1505 0
+.L1582:
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1581
-	.loc 2 1506 0
+	beq	.L1583
 	bl	make_superblock
-.LVL2067:
-.L1581:
-	.loc 2 1508 0
+.L1583:
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L1582
-	.loc 2 1509 0
+	beq	.L1584
 	bl	make_superblock
-.LVL2068:
-.L1582:
-	.loc 2 1511 0
+.L1584:
 	mov	w0, 0
-	b	.L1566
-.LVL2069:
-.L1572:
-	.loc 2 1425 0
+	b	.L1568
+.L1574:
 	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	.loc 2 1427 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1425 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x21, 4]
-	.loc 2 1426 0
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x21, 8]
-	.loc 2 1427 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2070:
-	.loc 2 1430 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1570
-	.loc 2 1431 0 discriminator 1
+	beq	.L1572
 	ldr	x0, [x23, #:lo12:.LANCHOR107]
-	.loc 2 1430 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1570
-	.loc 2 1432 0
+	bne	.L1572
 	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	ldrh	w0, [x0]
-	.loc 2 1431 0
 	cmp	w0, w28
-	beq	.L1571
-.L1570:
+	beq	.L1573
+.L1572:
 	sub	w22, w22, #1
-.LVL2071:
 	sxth	w22, w22
-.LVL2072:
-	b	.L1569
-	.cfi_endproc
-.LFE274:
+	b	.L1571
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlSysBlkInit,"ax",@progbits
 	.align	2
 	.global	FtlSysBlkInit
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
-.LFB292:
-	.loc 2 2356 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
-	.loc 2 2362 0
 	adrp	x0, .LANCHOR4
-	.loc 2 2356 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 2362 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	.loc 2 2356 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
-	.loc 2 2360 0
 	adrp	x20, .LANCHOR161
-	.loc 2 2356 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 2 2360 0
 	strh	wzr, [x20, #:lo12:.LANCHOR161]
-	.loc 2 2362 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2073:
-	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL2074:
-	.loc 2 2364 0
 	adrp	x0, .LANCHOR79
 	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1589
-.L1591:
-	.loc 2 2365 0
+	bne	.L1591
+.L1593:
 	mov	w23, -1
-.L1588:
-	.loc 2 2451 0
+.L1590:
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-.L1589:
-	.cfi_restore_state
-	.loc 2 2367 0
+.L1591:
 	bl	FtlLoadSysInfo
-.LVL2075:
 	mov	w23, w0
-	cbnz	w0, .L1591
-	.loc 2 2370 0
+	cbnz	w0, .L1593
 	bl	FtlLoadMapInfo
-.LVL2076:
-	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL2077:
-	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL2078:
-	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL2079:
-	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL2080:
-	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL2081:
-	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL2082:
-	.loc 2 2380 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2083:
-.LBB338:
-.LBB339:
-	.loc 2 2382 0
 	adrp	x0, .LANCHOR33
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 2383 0
 	adrp	x0, .LANCHOR55
 	ldr	x1, [x0, #:lo12:.LANCHOR55]
-	.loc 2 2382 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1592:
-.LVL2084:
+.L1594:
 	cmp	w0, w2
-	bge	.L1597
-	.loc 2 2383 0
+	bge	.L1599
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1593
-.L1597:
-	.loc 2 2386 0
+	tbz	w3, #31, .L1595
+.L1599:
 	adrp	x19, .LANCHOR39
 	add	x3, x19, :lo12:.LANCHOR39
-	.loc 2 2388 0
 	cmp	w0, w2
 	adrp	x22, .LANCHOR51
-	.loc 2 2386 0
 	ldrh	w1, [x3, 28]
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
-	.loc 2 2388 0
-	bge	.L1601
-.LVL2085:
-.L1594:
-	.loc 2 2389 0
+	bge	.L1603
+.L1596:
 	add	x21, x22, :lo12:.LANCHOR51
-	.loc 2 2390 0
 	adrp	x24, .LANCHOR52
-	.loc 2 2389 0
 	mov	x0, x21
-	.loc 2 2390 0
 	add	x20, x24, :lo12:.LANCHOR52
-	.loc 2 2389 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2086:
-	.loc 2 2390 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2087:
-.LBB340:
-	.loc 2 2396 0
 	adrp	x0, .LANCHOR42
 	ldrh	w3, [x21, 4]
 	ldr	x1, [x0, #:lo12:.LANCHOR42]
@@ -20677,706 +11851,394 @@ FtlSysBlkInit:
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w3
-	.loc 2 2397 0
 	adrp	x3, .LANCHOR19
-	.loc 2 2396 0
 	strh	w2, [x1, x0]
-	.loc 2 2398 0
 	strb	wzr, [x21, 6]
-	.loc 2 2397 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x21, 2]
-	.loc 2 2402 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	.loc 2 2399 0
 	strh	wzr, [x21, 4]
-.LVL2088:
-	.loc 2 2402 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w4
 	strh	w2, [x1, x0]
-	.loc 2 2404 0
 	strb	wzr, [x20, 6]
-	.loc 2 2403 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x20, 2]
-	.loc 2 2405 0
 	strh	wzr, [x20, 4]
-.LBE340:
-	.loc 2 2409 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2089:
-	.loc 2 2410 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2090:
-	.loc 2 2422 0
 	add	x1, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x1, 30]
 	add	w0, w0, 1
 	strh	w0, [x1, 30]
-	.loc 2 2423 0
 	bl	l2p_flush
-.LVL2091:
-	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL2092:
-.L1603:
-	.loc 2 2428 0
+.L1605:
 	bl	FtlVpcTblFlush
-.LVL2093:
-	.loc 2 2432 0
 	add	x21, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L1600
+	beq	.L1602
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1600
-	.loc 2 2434 0
+	cbnz	w1, .L1602
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
-	.loc 2 2433 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1600
-	.loc 2 2435 0
+	cbnz	w1, .L1602
 	bl	FtlGcRefreshBlock
-.LVL2094:
-	.loc 2 2436 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2095:
-	.loc 2 2437 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2096:
-	.loc 2 2438 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2097:
-.L1600:
-	.loc 2 2443 0
+.L1602:
 	add	x19, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1588
-	.loc 2 2444 0
+	bne	.L1590
 	bl	FtlVpcCheckAndModify
-.LVL2098:
-	b	.L1588
-.LVL2099:
-.L1593:
-	.loc 2 2382 0
+	b	.L1590
+.L1595:
 	add	w0, w0, 1
-.LVL2100:
-	b	.L1592
-.L1601:
-	.loc 2 2388 0
+	b	.L1594
+.L1603:
 	ldrh	w0, [x20, #:lo12:.LANCHOR161]
-.LVL2101:
-	cbnz	w0, .L1594
-	.loc 2 2427 0
+	cbnz	w0, .L1596
 	bl	l2p_flush
-.LVL2102:
-	b	.L1603
-.LBE339:
-.LBE338:
-	.cfi_endproc
-.LFE292:
+	b	.L1605
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
 	.type	ftl_low_format, %function
 ftl_low_format:
-.LFB210:
-	.loc 3 623 0
-	.cfi_startproc
 	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	.loc 3 630 0
 	adrp	x0, .LANCHOR71
-	.loc 3 623 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -32
-	.cfi_offset 24, -24
-	.loc 3 631 0
 	adrp	x24, .LANCHOR4
-	.loc 3 630 0
 	str	wzr, [x0, #:lo12:.LANCHOR71]
-	.loc 3 631 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
-	.loc 3 623 0
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	.loc 3 629 0
 	adrp	x20, .LANCHOR70
-	.loc 3 623 0
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 25, -16
-	.cfi_offset 26, -8
-	.loc 3 629 0
 	str	wzr, [x20, #:lo12:.LANCHOR70]
-	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2103:
-	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2104:
-	cbz	w0, .L1605
-	.loc 3 633 0
+	cbz	w0, .L1607
 	bl	FtlMakeBbt
-.LVL2105:
-.L1605:
-	.loc 3 635 0 discriminator 1
+.L1607:
 	adrp	x23, .LANCHOR12
-	.loc 3 636 0 discriminator 1
 	adrp	x0, .LANCHOR115
-	.loc 3 637 0 discriminator 1
 	mov	w6, 23752
-	.loc 3 635 0 discriminator 1
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
-	.loc 3 637 0 discriminator 1
 	movk	w6, 0xa0f, lsl 16
-	.loc 3 636 0 discriminator 1
 	ldr	x4, [x0, #:lo12:.LANCHOR115]
-	.loc 3 637 0 discriminator 1
 	adrp	x0, .LANCHOR113
-	.loc 3 635 0 discriminator 1
 	lsl	w1, w1, 7
-	.loc 3 637 0 discriminator 1
 	ldr	x5, [x0, #:lo12:.LANCHOR113]
 	mov	w0, 0
-.L1606:
-.LVL2106:
-	.loc 3 635 0 discriminator 1
+.L1608:
 	cmp	w0, w1
-	blt	.L1607
-.LVL2107:
-	.loc 3 642 0
+	blt	.L1609
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
 	add	x26, x22, :lo12:.LANCHOR6
-	.loc 3 641 0
 	mov	w19, 0
-	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2108:
-.L1608:
-	.loc 3 642 0 is_stmt 0 discriminator 1
+.L1610:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1609
-	.loc 3 645 0 is_stmt 1
+	bhi	.L1611
 	adrp	x25, .LANCHOR3
-.LVL2109:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1610
-.LVL2110:
-.L1614:
-	.loc 3 656 0
+	bgt	.L1612
+.L1616:
 	add	x26, x21, :lo12:.LANCHOR5
-	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1611:
-.LVL2111:
-	.loc 3 656 0 discriminator 1
+.L1613:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1615
-	.loc 3 658 0
+	bhi	.L1617
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
-	.loc 3 661 0
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
-	.loc 3 662 0
 	adrp	x2, .LANCHOR78
-	.loc 3 658 0
 	str	w1, [x0, #:lo12:.LANCHOR112]
-	.loc 3 661 0
 	adrp	x0, .LANCHOR7
 	adrp	x3, .LANCHOR61
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
 	udiv	w5, w1, w4
-	.loc 3 662 0
 	ubfx	x0, x5, 5, 16
-	.loc 3 661 0
 	str	w5, [x3, #:lo12:.LANCHOR61]
-	.loc 3 662 0
 	add	w6, w0, 36
 	strh	w6, [x2, #:lo12:.LANCHOR78]
-	.loc 3 663 0
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1616
-	.loc 3 664 0
+	ble	.L1618
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
 	str	w1, [x3, #:lo12:.LANCHOR61]
-	.loc 3 665 0
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1616:
-	.loc 3 668 0
+.L1618:
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1618
-	.loc 3 669 0
+	cbz	w1, .L1620
 	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
 	strh	w6, [x2, #:lo12:.LANCHOR78]
-	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1618
-	.loc 3 672 0
+	bge	.L1620
 	add	w1, w1, 32
-	.loc 3 671 0
 	str	w5, [x3, #:lo12:.LANCHOR61]
-	.loc 3 672 0
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR78]
-.L1618:
-	.loc 3 677 0
+.L1620:
 	ldrh	w1, [x2, #:lo12:.LANCHOR78]
 	adrp	x25, .LANCHOR180
 	ldr	w0, [x3, #:lo12:.LANCHOR61]
-	.loc 3 687 0
 	adrp	x24, .LANCHOR42
-.LVL2112:
-	.loc 3 677 0
 	sub	w0, w0, w1
-	.loc 3 678 0
 	adrp	x1, .LANCHOR19
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	.loc 3 677 0
 	mul	w0, w0, w4
 	str	w0, [x25, #:lo12:.LANCHOR180]
-	.loc 3 678 0
 	mul	w0, w1, w0
-	.loc 3 679 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
-	.loc 3 678 0
 	str	w0, [x3, #:lo12:.LANCHOR61]
-	.loc 3 689 0
 	mov	w23, -1
-	.loc 3 679 0
 	mul	w0, w1, w0
 	adrp	x1, .LANCHOR34
 	str	w0, [x1, #:lo12:.LANCHOR34]
-	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2113:
-	.loc 3 687 0
 	ldr	x0, [x24, #:lo12:.LANCHOR42]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2114:
-	.loc 3 688 0
 	adrp	x0, .LANCHOR59
-	.loc 3 689 0
 	adrp	x1, .LANCHOR80
-	.loc 3 698 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
-	.loc 3 688 0
 	str	wzr, [x0, #:lo12:.LANCHOR59]
-	.loc 3 689 0
 	add	x0, x1, :lo12:.LANCHOR80
 	strh	w23, [x1, #:lo12:.LANCHOR80]
-	.loc 3 698 0
 	mov	w1, 255
 	lsr	w2, w2, 3
-	.loc 3 690 0
 	strh	wzr, [x0, 2]
-	.loc 3 691 0
 	strb	wzr, [x0, 6]
-	.loc 3 692 0
 	strb	wzr, [x0, 8]
-	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2115:
-	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
-	.loc 3 697 0
 	mov	w0, 1
 	strb	w0, [x19, 8]
-	.loc 3 698 0
 	adrp	x0, .LANCHOR1
-	.loc 3 694 0
 	strh	wzr, [x19, 2]
-	.loc 3 698 0
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
-	.loc 3 695 0
 	strb	wzr, [x19, 6]
-	.loc 3 698 0
 	bl	ftl_memset
-.LVL2116:
-.L1620:
-	.loc 3 701 0
+.L1622:
 	mov	x0, x19
 	bl	make_superblock
-.LVL2117:
-	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1621
-	.loc 3 705 0
+	cbnz	w1, .L1623
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
-	.loc 3 706 0
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	.loc 3 707 0
-	b	.L1620
-.LVL2118:
-.L1607:
-	.loc 3 636 0 discriminator 3
+	b	.L1622
+.L1609:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
-	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2119:
 	and	w0, w0, 65535
-.LVL2120:
-	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
-	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1606
-.LVL2121:
-.L1609:
-	.loc 3 643 0 discriminator 3
+	b	.L1608
+.L1611:
 	mov	w0, w25
 	mov	w1, 1
-	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2122:
-	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2123:
 	add	w19, w19, w0
-.LVL2124:
-	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
-	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2125:
-	b	.L1608
-.LVL2126:
-.L1610:
-	.loc 3 647 0
+	b	.L1610
+.L1612:
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2127:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2128:
-	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
-	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
-	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2129:
-	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2130:
-.L1612:
-	.loc 3 650 0 is_stmt 0 discriminator 1
+.L1614:
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1614
-	.loc 3 651 0 is_stmt 1 discriminator 3
+	bls	.L1616
 	mov	w0, w19
-	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2131:
-	.loc 3 651 0 discriminator 3
 	mov	w1, 1
-	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
-	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2132:
-	b	.L1612
-.LVL2133:
-.L1615:
-	.loc 3 657 0 discriminator 3
+	b	.L1614
+.L1617:
 	mov	w0, w24
 	mov	w1, 0
-	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2134:
-	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2135:
 	add	w19, w19, w0
-.LVL2136:
-	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
-	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2137:
-	b	.L1611
-.LVL2138:
-.L1621:
-	.loc 3 709 0
+	b	.L1613
+.L1623:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 710 0
 	ubfiz	x0, x0, 1, 16
-	.loc 3 709 0
 	str	w1, [x19, 12]
-	.loc 3 721 0
 	mov	w23, -1
-	.loc 3 709 0
 	add	w1, w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 710 0
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	.loc 3 712 0
 	adrp	x2, .LANCHOR52
 	add	x0, x2, :lo12:.LANCHOR52
-	.loc 3 714 0
 	ldrh	w1, [x19]
-	.loc 3 717 0
 	mov	x19, x0
-	.loc 3 714 0
 	add	w1, w1, 1
-	.loc 3 712 0
 	strh	wzr, [x0, 2]
-	.loc 3 714 0
 	strh	w1, [x2, #:lo12:.LANCHOR52]
-	.loc 3 715 0
 	mov	w1, 1
-	.loc 3 713 0
 	strb	wzr, [x0, 6]
-	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1622:
-	.loc 3 717 0
+.L1624:
 	mov	x0, x19
 	bl	make_superblock
-.LVL2139:
-	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1623
-	.loc 3 721 0
+	cbnz	w1, .L1625
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
-	.loc 3 722 0
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	.loc 3 723 0
-	b	.L1622
-.L1623:
-	.loc 3 725 0
+	b	.L1624
+.L1625:
 	ldr	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 726 0
 	ubfiz	x0, x0, 1, 16
-	.loc 3 725 0
 	str	w1, [x19, 12]
 	add	w1, w1, 1
 	str	w1, [x20, #:lo12:.LANCHOR70]
-	.loc 3 726 0
 	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
-	.loc 3 727 0
 	mov	w19, -1
-	.loc 3 726 0
 	strh	w2, [x1, x0]
-	.loc 3 727 0
 	adrp	x0, .LANCHOR53
 	strh	w19, [x0, #:lo12:.LANCHOR53]
-	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2140:
 	adrp	x2, .LANCHOR79
 	add	x1, x2, :lo12:.LANCHOR79
 	strh	w0, [x2, #:lo12:.LANCHOR79]
-	.loc 3 733 0
 	ldr	w0, [x25, #:lo12:.LANCHOR180]
 	strh	w0, [x1, 6]
-	.loc 3 734 0
 	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
-	.loc 3 731 0
 	strh	wzr, [x1, 2]
-	.loc 3 732 0
 	strh	w19, [x1, 4]
-	.loc 3 734 0
 	str	w0, [x20, #:lo12:.LANCHOR70]
-	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2141:
-	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2142:
-	cbnz	w0, .L1624
-	.loc 3 737 0
+	cbnz	w0, .L1626
 	adrp	x0, .LANCHOR86
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR86]
-.L1624:
-	.loc 3 739 0
+.L1626:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 25
-	.cfi_restore 26
-	.cfi_restore 23
-	.cfi_restore 24
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE210:
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.sftl_init,"ax",@progbits
 	.align	2
 	.global	sftl_init
 	.type	sftl_init, %function
 sftl_init:
-.LFB211:
-	.loc 3 743 0
-	.cfi_startproc
-.LVL2143:
 	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	.loc 3 749 0
 	adrp	x1, .LC70
 	add	x1, x1, :lo12:.LC70
-	.loc 3 746 0
 	mov	w0, -1
-	.loc 3 743 0
 	add	x29, sp, 0
-	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 746 0
 	adrp	x19, .LANCHOR86
 	str	w0, [x19, #:lo12:.LANCHOR86]
-	.loc 3 749 0
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2144:
-	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2145:
-	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2146:
-	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2147:
-	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2148:
-.LDL2:
-	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2149:
-	cbnz	w0, .L1633
-	.loc 3 767 0
+	cbnz	w0, .L1635
 	bl	FtlSysBlkInit
-.LVL2150:
-	cbnz	w0, .L1633
-	.loc 3 779 0
+	cbnz	w0, .L1635
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR86]
-	.loc 3 783 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1633
+	bhi	.L1635
 	mov	w19, 8129
-.L1632:
-.LVL2151:
-.LBB341:
-	.loc 3 786 0 discriminator 3
+.L1634:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2152:
-	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2153:
-	bne	.L1632
-.LVL2154:
-.L1633:
-.LBE341:
-	.loc 3 794 0
+	bne	.L1634
+.L1635:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
 	ret
-	.cfi_endproc
-.LFE211:
 	.size	sftl_init, .-sftl_init
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
 	.global	ftl_memcmp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB348:
-	.loc 1 252 0
-	.cfi_startproc
-.LVL2155:
-	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2156:
-	.cfi_endproc
-.LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -22778,243 +13640,243 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6107,"a",@progbits
+	.section	.rodata.__func__.6058,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6107, %object
-	.size	__func__.6107, 11
-__func__.6107:
+	.type	__func__.6058, %object
+	.size	__func__.6058, 11
+__func__.6058:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6231,"a",@progbits
+	.section	.rodata.__func__.6182,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6231, %object
-	.size	__func__.6231, 13
-__func__.6231:
+	.type	__func__.6182, %object
+	.size	__func__.6182, 13
+__func__.6182:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6259,"a",@progbits
+	.section	.rodata.__func__.6210,"a",@progbits
 	.align	3
 	.set	.LANCHOR178,. + 0
-	.type	__func__.6259, %object
-	.size	__func__.6259, 9
-__func__.6259:
+	.type	__func__.6210, %object
+	.size	__func__.6210, 9
+__func__.6210:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6323,"a",@progbits
+	.section	.rodata.__func__.6284,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6323, %object
-	.size	__func__.6323, 14
-__func__.6323:
+	.type	__func__.6284, %object
+	.size	__func__.6284, 14
+__func__.6284:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6366,"a",@progbits
+	.section	.rodata.__func__.6327,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.6366, %object
-	.size	__func__.6366, 11
-__func__.6366:
+	.type	__func__.6327, %object
+	.size	__func__.6327, 11
+__func__.6327:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6483,"a",@progbits
+	.section	.rodata.__func__.6444,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6483, %object
-	.size	__func__.6483, 17
-__func__.6483:
+	.type	__func__.6444, %object
+	.size	__func__.6444, 17
+__func__.6444:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6488,"a",@progbits
+	.section	.rodata.__func__.6449,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6488, %object
-	.size	__func__.6488, 17
-__func__.6488:
+	.type	__func__.6449, %object
+	.size	__func__.6449, 17
+__func__.6449:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6519,"a",@progbits
+	.section	.rodata.__func__.6480,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6519, %object
-	.size	__func__.6519, 17
-__func__.6519:
+	.type	__func__.6480, %object
+	.size	__func__.6480, 17
+__func__.6480:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6551,"a",@progbits
+	.section	.rodata.__func__.6512,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6551, %object
-	.size	__func__.6551, 22
-__func__.6551:
+	.type	__func__.6512, %object
+	.size	__func__.6512, 22
+__func__.6512:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6560,"a",@progbits
+	.section	.rodata.__func__.6521,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6560, %object
-	.size	__func__.6560, 16
-__func__.6560:
+	.type	__func__.6521, %object
+	.size	__func__.6521, 16
+__func__.6521:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6593,"a",@progbits
+	.section	.rodata.__func__.6554,"a",@progbits
 	.align	3
 	.set	.LANCHOR116,. + 0
-	.type	__func__.6593, %object
-	.size	__func__.6593, 26
-__func__.6593:
+	.type	__func__.6554, %object
+	.size	__func__.6554, 26
+__func__.6554:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6604,"a",@progbits
+	.section	.rodata.__func__.6565,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6604, %object
-	.size	__func__.6604, 15
-__func__.6604:
+	.type	__func__.6565, %object
+	.size	__func__.6565, 15
+__func__.6565:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6618,"a",@progbits
+	.section	.rodata.__func__.6579,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6618, %object
-	.size	__func__.6618, 31
-__func__.6618:
+	.type	__func__.6579, %object
+	.size	__func__.6579, 31
+__func__.6579:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6632,"a",@progbits
+	.section	.rodata.__func__.6593,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6632, %object
-	.size	__func__.6632, 16
-__func__.6632:
+	.type	__func__.6593, %object
+	.size	__func__.6593, 16
+__func__.6593:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6657,"a",@progbits
+	.section	.rodata.__func__.6618,"a",@progbits
 	.align	3
 	.set	.LANCHOR57,. + 0
-	.type	__func__.6657, %object
-	.size	__func__.6657, 22
-__func__.6657:
+	.type	__func__.6618, %object
+	.size	__func__.6618, 22
+__func__.6618:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6674,"a",@progbits
+	.section	.rodata.__func__.6635,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6674, %object
-	.size	__func__.6674, 9
-__func__.6674:
+	.type	__func__.6635, %object
+	.size	__func__.6635, 9
+__func__.6635:
 	.string	"log2phys"
-	.section	.rodata.__func__.6747,"a",@progbits
+	.section	.rodata.__func__.6708,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.6747, %object
-	.size	__func__.6747, 15
-__func__.6747:
+	.type	__func__.6708, %object
+	.size	__func__.6708, 15
+__func__.6708:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6769,"a",@progbits
+	.section	.rodata.__func__.6730,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6769, %object
-	.size	__func__.6769, 14
-__func__.6769:
+	.type	__func__.6730, %object
+	.size	__func__.6730, 14
+__func__.6730:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6826,"a",@progbits
+	.section	.rodata.__func__.6787,"a",@progbits
 	.align	3
 	.set	.LANCHOR179,. + 0
-	.type	__func__.6826, %object
-	.size	__func__.6826, 15
-__func__.6826:
+	.type	__func__.6787, %object
+	.size	__func__.6787, 15
+__func__.6787:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6889,"a",@progbits
+	.section	.rodata.__func__.6850,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6889, %object
-	.size	__func__.6889, 16
-__func__.6889:
+	.type	__func__.6850, %object
+	.size	__func__.6850, 16
+__func__.6850:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6923,"a",@progbits
+	.section	.rodata.__func__.6884,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.6923, %object
-	.size	__func__.6923, 22
-__func__.6923:
+	.type	__func__.6884, %object
+	.size	__func__.6884, 22
+__func__.6884:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6980,"a",@progbits
+	.section	.rodata.__func__.6941,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.6980, %object
-	.size	__func__.6980, 16
-__func__.6980:
+	.type	__func__.6941, %object
+	.size	__func__.6941, 16
+__func__.6941:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7001,"a",@progbits
+	.section	.rodata.__func__.6962,"a",@progbits
 	.align	3
 	.set	.LANCHOR154,. + 0
-	.type	__func__.7001, %object
-	.size	__func__.7001, 18
-__func__.7001:
+	.type	__func__.6962, %object
+	.size	__func__.6962, 18
+__func__.6962:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7026,"a",@progbits
+	.section	.rodata.__func__.6987,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7026, %object
-	.size	__func__.7026, 21
-__func__.7026:
+	.type	__func__.6987, %object
+	.size	__func__.6987, 21
+__func__.6987:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7042,"a",@progbits
+	.section	.rodata.__func__.7003,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.7042, %object
-	.size	__func__.7042, 14
-__func__.7042:
+	.type	__func__.7003, %object
+	.size	__func__.7003, 14
+__func__.7003:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7127,"a",@progbits
+	.section	.rodata.__func__.7088,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.7127, %object
-	.size	__func__.7127, 25
-__func__.7127:
+	.type	__func__.7088, %object
+	.size	__func__.7088, 25
+__func__.7088:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7148,"a",@progbits
+	.section	.rodata.__func__.7109,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.7148, %object
-	.size	__func__.7148, 29
-__func__.7148:
+	.type	__func__.7109, %object
+	.size	__func__.7109, 29
+__func__.7109:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7155,"a",@progbits
+	.section	.rodata.__func__.7116,"a",@progbits
 	.align	3
 	.set	.LANCHOR88,. + 0
-	.type	__func__.7155, %object
-	.size	__func__.7155, 19
-__func__.7155:
+	.type	__func__.7116, %object
+	.size	__func__.7116, 19
+__func__.7116:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7168,"a",@progbits
+	.section	.rodata.__func__.7129,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7168, %object
-	.size	__func__.7168, 16
-__func__.7168:
+	.type	__func__.7129, %object
+	.size	__func__.7129, 16
+__func__.7129:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7175,"a",@progbits
+	.section	.rodata.__func__.7136,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7175, %object
-	.size	__func__.7175, 20
-__func__.7175:
+	.type	__func__.7136, %object
+	.size	__func__.7136, 20
+__func__.7136:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7245,"a",@progbits
+	.section	.rodata.__func__.7206,"a",@progbits
 	.align	3
 	.set	.LANCHOR171,. + 0
-	.type	__func__.7245, %object
-	.size	__func__.7245, 19
-__func__.7245:
+	.type	__func__.7206, %object
+	.size	__func__.7206, 19
+__func__.7206:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7351,"a",@progbits
+	.section	.rodata.__func__.7312,"a",@progbits
 	.align	3
 	.set	.LANCHOR175,. + 0
-	.type	__func__.7351, %object
-	.size	__func__.7351, 23
-__func__.7351:
+	.type	__func__.7312, %object
+	.size	__func__.7312, 23
+__func__.7312:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7615,"a",@progbits
+	.section	.rodata.__func__.7579,"a",@progbits
 	.align	3
 	.set	.LANCHOR104,. + 0
-	.type	__func__.7615, %object
-	.size	__func__.7615, 15
-__func__.7615:
+	.type	__func__.7579, %object
+	.size	__func__.7579, 15
+__func__.7579:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7632,"a",@progbits
+	.section	.rodata.__func__.7596,"a",@progbits
 	.align	3
 	.set	.LANCHOR109,. + 0
-	.type	__func__.7632, %object
-	.size	__func__.7632, 15
-__func__.7632:
+	.type	__func__.7596, %object
+	.size	__func__.7596, 15
+__func__.7596:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC101:
@@ -23060,32521 +13922,4 @@ __func__.7632:
 	.string	"SFTL version: 5.0.44 20180713"
 .LC71:
 	.string	"%s\n"
-	.text
-.Letext0:
-	.file 7 "include/common.h"
-	.file 8 "./arch/arm/include/asm/types.h"
-	.file 9 "include/linux/types.h"
-	.file 10 "include/errno.h"
-	.file 11 "include/linux/string.h"
-	.file 12 "include/efi.h"
-	.file 13 "include/ide.h"
-	.file 14 "include/part.h"
-	.file 15 "include/flash.h"
-	.file 16 "include/lmb.h"
-	.file 17 "include/asm-generic/u-boot.h"
-	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 19 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 20 "include/libfdt_env.h"
-	.file 21 "include/image.h"
-	.file 22 "include/net.h"
-	.file 23 "include/dm/uclass-id.h"
-	.file 24 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 25 "drivers/rkflash/rksftl/flash_com.h"
-	.file 26 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 27 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 28 "include/malloc.h"
-	.file 29 "include/stdio.h"
-	.file 30 "include/vsprintf.h"
-	.file 31 "include/log.h"
-	.section	.debug_info,"",@progbits
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-	.byte	0x1a
-	.byte	0xf5
-	.4byte	0x1691
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-	.byte	0xf7
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x10
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-	.byte	0xf8
-	.4byte	0xdc9
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-	.4byte	.LASF381
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-	.byte	0xf9
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-	.byte	0x4
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-	.4byte	.LASF382
-	.byte	0x1a
-	.byte	0xfa
-	.4byte	0xdbe
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-	.4byte	.LASF383
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-	.4byte	.LASF386
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-	.uleb128 0x1b
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-	.4byte	.LASF388
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-	.byte	0
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-	.byte	0x1a
-	.2byte	0x10c
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-	.uleb128 0x1b
-	.4byte	.LASF278
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-	.2byte	0x10e
-	.4byte	0x1001
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-	.uleb128 0x1b
-	.4byte	.LASF279
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-	.4byte	0x1001
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-	.uleb128 0x1b
-	.4byte	.LASF393
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-	.byte	0x10
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF394
-	.byte	0x1b
-	.byte	0x12
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_type
-	.uleb128 0x28
-	.4byte	.LASF395
-	.byte	0x1b
-	.byte	0x13
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_die_num
-	.uleb128 0x28
-	.4byte	.LASF396
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-	.byte	0x14
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.uleb128 0x28
-	.4byte	.LASF397
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-	.byte	0x15
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.uleb128 0x28
-	.4byte	.LASF398
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-	.8byte	c_ftl_nand_blks_per_die_shift
-	.uleb128 0x28
-	.4byte	.LASF399
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-	.byte	0x17
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_num
-	.uleb128 0x28
-	.4byte	.LASF400
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_blk_pre_plane
-	.uleb128 0x28
-	.4byte	.LASF401
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-	.byte	0x19
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-	.8byte	c_ftl_nand_ext_blk_pre_plane
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-	.4byte	.LASF402
-	.byte	0x1b
-	.byte	0x1a
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_bbm_buf_size
-	.uleb128 0x28
-	.4byte	.LASF403
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-	.byte	0x1c
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_page_pre_blk
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-	.4byte	.LASF404
-	.byte	0x1b
-	.byte	0x1d
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-	.byte	0x3
-	.8byte	c_ftl_nand_page_pre_slc_blk
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-	.byte	0x1e
-	.4byte	0xdc9
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-	.byte	0x1f
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
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-	.byte	0x24
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-	.uleb128 0x28
-	.4byte	.LASF409
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-	.uleb128 0x9
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-	.byte	0x26
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-	.8byte	c_ftl_nand_l2pmap_ram_region_num
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.uleb128 0x28
-	.4byte	.LASF462
-	.byte	0x1b
-	.byte	0x62
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_valid_page_count_check_table
-	.uleb128 0x28
-	.4byte	.LASF463
-	.byte	0x1b
-	.byte	0x63
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_blk_mode_table
-	.uleb128 0x28
-	.4byte	.LASF464
-	.byte	0x1b
-	.byte	0x65
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_table
-	.uleb128 0x28
-	.4byte	.LASF465
-	.byte	0x1b
-	.byte	0x66
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_valid_page_count
-	.uleb128 0x28
-	.4byte	.LASF466
-	.byte	0x1b
-	.byte	0x67
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_block_ver_table
-	.uleb128 0x28
-	.4byte	.LASF467
-	.byte	0x1b
-	.byte	0x68
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_map_region_ppn_table
-	.uleb128 0x28
-	.4byte	.LASF468
-	.byte	0x1b
-	.byte	0x69
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_map_block
-	.uleb128 0x28
-	.4byte	.LASF469
-	.byte	0x1b
-	.byte	0x6b
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_table
-	.uleb128 0x28
-	.4byte	.LASF470
-	.byte	0x1b
-	.byte	0x6c
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_valid_page_count
-	.uleb128 0x28
-	.4byte	.LASF471
-	.byte	0x1b
-	.byte	0x6d
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_block_ver_table
-	.uleb128 0x28
-	.4byte	.LASF472
-	.byte	0x1b
-	.byte	0x6e
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_vendor_region_ppn_table
-	.uleb128 0x28
-	.4byte	.LASF473
-	.byte	0x1b
-	.byte	0x6f
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_vendor_block
-	.uleb128 0x28
-	.4byte	.LASF474
-	.byte	0x1b
-	.byte	0x71
-	.4byte	0x1dd2
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_l2p_ram_map
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x10fe
-	.uleb128 0x28
-	.4byte	.LASF475
-	.byte	0x1b
-	.byte	0x72
-	.4byte	0x1001
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_l2p_map_buf
-	.uleb128 0x28
-	.4byte	.LASF476
-	.byte	0x1b
-	.byte	0x73
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_l2p_last_update_region_id
-	.uleb128 0x28
-	.4byte	.LASF477
-	.byte	0x1b
-	.byte	0x7a
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x1573
-	.uleb128 0x28
-	.4byte	.LASF478
-	.byte	0x1b
-	.byte	0x7b
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_free_data_block_list_head
-	.uleb128 0x28
-	.4byte	.LASF479
-	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_head
-	.uleb128 0x28
-	.4byte	.LASF480
-	.byte	0x1b
-	.byte	0x7e
-	.4byte	0x1e17
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_data_block_list_tail
-	.uleb128 0x28
-	.4byte	.LASF481
-	.byte	0x1b
-	.byte	0x7f
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_num_free_superblocks
-	.uleb128 0x28
-	.4byte	.LASF482
-	.byte	0x1b
-	.byte	0x80
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_num_data_superblocks
-	.uleb128 0x28
-	.4byte	.LASF483
-	.byte	0x1b
-	.byte	0x81
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_active_superblock
-	.uleb128 0x28
-	.4byte	.LASF484
-	.byte	0x1b
-	.byte	0x82
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_buffer_superblock
-	.uleb128 0x28
-	.4byte	.LASF485
-	.byte	0x1b
-	.byte	0x83
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_temp_superblock
-	.uleb128 0x28
-	.4byte	.LASF486
-	.byte	0x1b
-	.byte	0x84
-	.4byte	0x15ff
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_superblock
-	.uleb128 0x28
-	.4byte	.LASF487
-	.byte	0x1b
-	.byte	0x85
-	.4byte	0x1eef
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gp_last_act_superblock
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x15ff
-	.uleb128 0x28
-	.4byte	.LASF488
-	.byte	0x1b
-	.byte	0x86
-	.4byte	0x1320
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_sys_save_data
-	.uleb128 0x28
-	.4byte	.LASF489
-	.byte	0x1b
-	.byte	0x87
-	.4byte	0x141d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_sys_ext_data
-	.uleb128 0x28
-	.4byte	.LASF490
-	.byte	0x1b
-	.byte	0x89
-	.4byte	0x1f34
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_page_info
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x16a1
-	.uleb128 0x28
-	.4byte	.LASF491
-	.byte	0x1b
-	.byte	0x8a
-	.4byte	0x10f8
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	p_gc_blk_tbl
-	.uleb128 0x28
-	.4byte	.LASF492
-	.byte	0x1b
-	.byte	0x8b
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_blk_num
-	.uleb128 0x28
-	.4byte	.LASF493
-	.byte	0x1b
-	.byte	0x8c
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_page_offset
-	.uleb128 0x28
-	.4byte	.LASF494
-	.byte	0x1b
-	.byte	0x8d
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_cur_blk_valid_pages
-	.uleb128 0x28
-	.4byte	.LASF495
-	.byte	0x1b
-	.byte	0x8e
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_cur_blk_max_valid_pages
-	.uleb128 0x28
-	.4byte	.LASF496
-	.byte	0x1b
-	.byte	0x8f
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_next_blk
-	.uleb128 0x28
-	.4byte	.LASF497
-	.byte	0x1b
-	.byte	0x90
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_next_blk_1
-	.uleb128 0x28
-	.4byte	.LASF498
-	.byte	0x1b
-	.byte	0x91
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_temp_num
-	.uleb128 0x28
-	.4byte	.LASF499
-	.byte	0x1b
-	.byte	0x92
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_gc_index
-	.uleb128 0xa
-	.4byte	0xdc9
-	.4byte	0x2007
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x10
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF500
-	.byte	0x1b
-	.byte	0x93
-	.4byte	0x1ff7
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_bad_block_temp_tbl
-	.uleb128 0x28
-	.4byte	.LASF501
-	.byte	0x1b
-	.byte	0x95
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_free_blk_threshold
-	.uleb128 0x28
-	.4byte	.LASF502
-	.byte	0x1b
-	.byte	0x96
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_merge_free_blk_threshold
-	.uleb128 0x28
-	.4byte	.LASF503
-	.byte	0x1b
-	.byte	0x97
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_blk_index
-	.uleb128 0x28
-	.4byte	.LASF504
-	.byte	0x1b
-	.byte	0x99
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_gc_page_count
-	.uleb128 0x28
-	.4byte	.LASF505
-	.byte	0x1b
-	.byte	0x9a
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_write_page_count
-	.uleb128 0x28
-	.4byte	.LASF506
-	.byte	0x1b
-	.byte	0x9b
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_write_sector
-	.uleb128 0x28
-	.4byte	.LASF507
-	.byte	0x1b
-	.byte	0x9c
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_read_sector
-	.uleb128 0x28
-	.4byte	.LASF508
-	.byte	0x1b
-	.byte	0x9e
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_discard_page_count
-	.uleb128 0x28
-	.4byte	.LASF509
-	.byte	0x1b
-	.byte	0x9f
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_read_page_count
-	.uleb128 0x28
-	.4byte	.LASF510
-	.byte	0x1b
-	.byte	0xa0
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_tmp_data_superblock_id
-	.uleb128 0x28
-	.4byte	.LASF511
-	.byte	0x1b
-	.byte	0xa1
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_cache_write_count
-	.uleb128 0x28
-	.4byte	.LASF512
-	.byte	0x1b
-	.byte	0xa2
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_l2p_write_count
-	.uleb128 0x28
-	.4byte	.LASF513
-	.byte	0x1b
-	.byte	0xa4
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_mlc_erase_count
-	.uleb128 0x28
-	.4byte	.LASF514
-	.byte	0x1b
-	.byte	0xa5
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_avg_erase_count
-	.uleb128 0x28
-	.4byte	.LASF515
-	.byte	0x1b
-	.byte	0xa6
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_min_erase_count
-	.uleb128 0x28
-	.4byte	.LASF516
-	.byte	0x1b
-	.byte	0xa7
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_slc_erase_count
-	.uleb128 0x28
-	.4byte	.LASF517
-	.byte	0x1b
-	.byte	0xa8
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_totle_sys_slc_erase_count
-	.uleb128 0x28
-	.4byte	.LASF518
-	.byte	0x1b
-	.byte	0xa9
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_max_erase_count
-	.uleb128 0x28
-	.4byte	.LASF519
-	.byte	0x1b
-	.byte	0xaa
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_in_gc_progress
-	.uleb128 0x28
-	.4byte	.LASF520
-	.byte	0x1b
-	.byte	0xab
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_in_swl_replace
-	.uleb128 0x28
-	.4byte	.LASF521
-	.byte	0x1b
-	.byte	0xac
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_ftl_nand_free_count
-	.uleb128 0x28
-	.4byte	.LASF522
-	.byte	0x1b
-	.byte	0xad
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_head_data_block
-	.uleb128 0x28
-	.4byte	.LASF523
-	.byte	0x1b
-	.byte	0xae
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_head_data_block_count
-	.uleb128 0x28
-	.4byte	.LASF524
-	.byte	0x1b
-	.byte	0xaf
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_gc_skip_write_count
-	.uleb128 0x28
-	.4byte	.LASF525
-	.byte	0x1b
-	.byte	0xb0
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_cur_erase_blk
-	.uleb128 0x28
-	.4byte	.LASF526
-	.byte	0x1b
-	.byte	0xb2
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_page_num
-	.uleb128 0x28
-	.4byte	.LASF527
-	.byte	0x1b
-	.byte	0xb3
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_page_min_ver
-	.uleb128 0xa
-	.4byte	0xdd4
-	.4byte	0x2263
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x1f
-	.byte	0
-	.uleb128 0x28
-	.4byte	.LASF528
-	.byte	0x1b
-	.byte	0xb4
-	.4byte	0x2253
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_recovery_ppa_tbl
-	.uleb128 0x28
-	.4byte	.LASF529
-	.byte	0x1b
-	.byte	0xb5
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	c_mlc_erase_count_value
-	.uleb128 0x28
-	.4byte	.LASF530
-	.byte	0x1b
-	.byte	0xb6
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_power_lost_recovery_flag
-	.uleb128 0x4
-	.4byte	.LASF531
-	.byte	0x18
-	.byte	0x14
-	.4byte	0xe44
-	.uleb128 0x4
-	.4byte	.LASF532
-	.byte	0x18
-	.byte	0x15
-	.4byte	0xe44
-	.uleb128 0x4
-	.4byte	.LASF533
-	.byte	0x18
-	.byte	0x16
-	.4byte	0xee6
-	.uleb128 0xa
-	.4byte	0xb9
-	.4byte	0x22d4
-	.uleb128 0x15
-	.4byte	0xda
-	.2byte	0x3ff
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF534
-	.byte	0x18
-	.byte	0x17
-	.4byte	0x22c3
-	.uleb128 0x28
-	.4byte	.LASF535
-	.byte	0x3
-	.byte	0x6
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	DeviceCapacity
-	.uleb128 0x28
-	.4byte	.LASF536
-	.byte	0x3
-	.byte	0x7
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gFtlInitStatus
-	.uleb128 0x4
-	.4byte	.LASF537
-	.byte	0x3
-	.byte	0x6d
-	.4byte	0xdd4
-	.uleb128 0x4
-	.4byte	.LASF538
-	.byte	0x3
-	.byte	0x6e
-	.4byte	0xdd4
-	.uleb128 0x4
-	.4byte	.LASF539
-	.byte	0x3
-	.byte	0x6f
-	.4byte	0xdd4
-	.uleb128 0x4
-	.4byte	.LASF540
-	.byte	0x3
-	.byte	0x70
-	.4byte	0xdd4
-	.uleb128 0x29
-	.4byte	.LASF541
-	.byte	0x3
-	.2byte	0x3bc
-	.4byte	0x5b
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	power_up_flag
-	.uleb128 0x2a
-	.4byte	.LASF545
-	.byte	0x3
-	.2byte	0x45f
-	.4byte	0xdd4
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	gc_discard_updated
-	.uleb128 0x29
-	.4byte	.LASF542
-	.byte	0x2
-	.2byte	0x38c
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_ect_tbl_power_up_flush
-	.uleb128 0x29
-	.4byte	.LASF543
-	.byte	0x2
-	.2byte	0x3a1
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	FtlUpdateVaildLpnCount
-	.uleb128 0xa
-	.4byte	0xdc9
-	.4byte	0x239e
-	.uleb128 0x15
-	.4byte	0xda
-	.2byte	0x1fff
-	.byte	0
-	.uleb128 0x29
-	.4byte	.LASF544
-	.byte	0x2
-	.2byte	0x8df
-	.4byte	0x238d
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	check_vpc_table
-	.uleb128 0x2b
-	.4byte	.LASF546
-	.byte	0x5
-	.byte	0x6d
-	.4byte	0xdc9
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	ftl_gc_temp_block_bops_scan_page_addr
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-	.4byte	0xdc9
-	.uleb128 0x9
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-	.8byte	gc_ink_free_return_value
-	.uleb128 0xc
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-	.2byte	0x3ba
-	.4byte	0x10b
-	.uleb128 0xc
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-	.2byte	0x3bb
-	.4byte	0x10b
-	.uleb128 0xc
-	.4byte	.LASF550
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-	.2byte	0x3bc
-	.4byte	0x10b
-	.uleb128 0xf
-	.4byte	.LASF551
-	.byte	0x4
-	.byte	0x6
-	.byte	0xc
-	.4byte	0x241c
-	.uleb128 0x16
-	.string	"pid"
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-	.byte	0xd
-	.4byte	0x5b
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.4byte	.LASF552
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-	.byte	0x10
-	.4byte	0x2427
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x2403
-	.uleb128 0x2c
-	.4byte	0x22ad
-	.byte	0x1
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_nand_phy_info
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-	.4byte	0x22b8
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_nand_ops
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-	.byte	0x1
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	check_buf
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-	.4byte	0x22d4
-	.byte	0x1
-	.byte	0x14
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	ftl_temp_buf
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-	.4byte	0xb9
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-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x7f
-	.byte	0
-	.uleb128 0x2b
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-	.byte	0x1
-	.byte	0x15
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	check_spare_buf
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-	.byte	0x1
-	.byte	0xfb
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-	.8byte	.LFE348-.LFB348
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x2512
-	.uleb128 0x2e
-	.4byte	.LASF555
-	.byte	0x1
-	.byte	0xfb
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-	.4byte	.LLST469
-	.uleb128 0x2e
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-	.byte	0x1
-	.byte	0xfb
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-	.4byte	.LLST470
-	.uleb128 0x2e
-	.4byte	.LASF325
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-	.byte	0xfb
-	.4byte	0x30
-	.4byte	.LLST471
-	.uleb128 0x2f
-	.8byte	.LVL2156
-	.4byte	0xa92c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF558
-	.byte	0x1
-	.byte	0xf6
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-	.uleb128 0x1
-	.byte	0x9c
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-	.uleb128 0x2e
-	.4byte	.LASF559
-	.byte	0x1
-	.byte	0xf6
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-	.byte	0x1
-	.byte	0xf6
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-	.uleb128 0x2e
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-	.byte	0x1
-	.byte	0xf6
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-	.4byte	.LLST306
-	.uleb128 0x2f
-	.8byte	.LVL1245
-	.4byte	0xa937
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
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-	.uleb128 0x1
-	.byte	0x52
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-	.4byte	0xffffffff
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-	.byte	0
-	.byte	0
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-	.uleb128 0x1
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-	.8byte	.LVL1825
-	.4byte	0x5d49
-	.uleb128 0x34
-	.8byte	.LVL1826
-	.4byte	0x594e
-	.4byte	0x30f4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1827
-	.4byte	0x567a
-	.uleb128 0x2f
-	.8byte	.LVL1828
-	.4byte	0x37d5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR53
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF670
-	.byte	0x5
-	.2byte	0x120
-	.byte	0x1
-	.uleb128 0x2d
-	.4byte	.LASF612
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdd4
-	.8byte	.LFB310
-	.8byte	.LFE310-.LFB310
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x32a3
-	.uleb128 0x2e
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0x1eef
-	.4byte	.LLST287
-	.uleb128 0x2e
-	.4byte	.LASF614
-	.byte	0x5
-	.byte	0xd2
-	.4byte	0xdd4
-	.4byte	.LLST288
-	.uleb128 0x32
-	.4byte	.LASF596
-	.byte	0x5
-	.byte	0xd4
-	.4byte	0xdc9
-	.4byte	.LLST289
-	.uleb128 0x32
-	.4byte	.LASF568
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdc9
-	.4byte	.LLST290
-	.uleb128 0x33
-	.string	"req"
-	.byte	0x5
-	.byte	0xd5
-	.4byte	0xdc9
-	.4byte	.LLST291
-	.uleb128 0x32
-	.4byte	.LASF594
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdc9
-	.4byte	.LLST292
-	.uleb128 0x32
-	.4byte	.LASF382
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdc9
-	.4byte	.LLST293
-	.uleb128 0x32
-	.4byte	.LASF380
-	.byte	0x5
-	.byte	0xd6
-	.4byte	0xdc9
-	.4byte	.LLST294
-	.uleb128 0x32
-	.4byte	.LASF615
-	.byte	0x5
-	.byte	0xd7
-	.4byte	0xdd4
-	.4byte	.LLST295
-	.uleb128 0x32
-	.4byte	.LASF616
-	.byte	0x5
-	.byte	0xd8
-	.4byte	0xdd4
-	.4byte	.LLST296
-	.uleb128 0x57
-	.4byte	.LASF617
-	.byte	0x5
-	.byte	0xd9
-	.4byte	0xdd4
-	.sleb128 -1
-	.uleb128 0x32
-	.4byte	.LASF598
-	.byte	0x5
-	.byte	0xda
-	.4byte	0x2dea
-	.4byte	.LLST297
-	.uleb128 0x58
-	.4byte	.LASF618
-	.byte	0x5
-	.byte	0xe1
-	.uleb128 0x58
-	.4byte	.LASF619
-	.byte	0x5
-	.byte	0xe5
-	.uleb128 0x59
-	.4byte	.LASF688
-	.byte	0x5
-	.2byte	0x117
-	.8byte	.L879
-	.uleb128 0x45
-	.8byte	.LVL1178
-	.4byte	0x32a3
-	.uleb128 0x34
-	.8byte	.LVL1186
-	.4byte	0x298f
-	.4byte	0x3243
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 204
-	.byte	0x94
-	.byte	0x4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1199
-	.4byte	0x6d73
-	.4byte	0x325d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x74
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1205
-	.4byte	0x4ec4
-	.4byte	0x327b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1208
-	.4byte	0x3503
-	.uleb128 0x45
-	.8byte	.LVL1211
-	.4byte	0x6951
-	.uleb128 0x45
-	.8byte	.LVL1213
-	.4byte	0x32a3
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF620
-	.byte	0x5
-	.byte	0xc9
-	.8byte	.LFB309
-	.8byte	.LFE309-.LFB309
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x32fe
-	.uleb128 0x34
-	.8byte	.LVL1172
-	.4byte	0x258a
-	.4byte	0x32d8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1173
-	.4byte	0x258a
-	.4byte	0x32f0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x5a
-	.8byte	.LVL1174
-	.4byte	0x3666
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF621
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x5b
-	.8byte	.LFB308
-	.8byte	.LFE308-.LFB308
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x34ee
-	.uleb128 0x2e
-	.4byte	.LASF622
-	.byte	0x5
-	.byte	0x6f
-	.4byte	0x5b
-	.4byte	.LLST405
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdc9
-	.4byte	.LLST406
-	.uleb128 0x32
-	.4byte	.LASF623
-	.byte	0x5
-	.byte	0x71
-	.4byte	0xdc9
-	.4byte	.LLST407
-	.uleb128 0x2b
-	.4byte	.LASF624
-	.byte	0x5
-	.byte	0x72
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x32
-	.4byte	.LASF625
-	.byte	0x5
-	.byte	0x73
-	.4byte	0xdd4
-	.4byte	.LLST408
-	.uleb128 0x2b
-	.4byte	.LASF613
-	.byte	0x5
-	.byte	0x74
-	.4byte	0x1eef
-	.uleb128 0xa
-	.byte	0x3
-	.8byte	g_gc_temp_superblock
-	.byte	0x9f
-	.uleb128 0x32
-	.4byte	.LASF626
-	.byte	0x5
-	.byte	0x75
-	.4byte	0x1f34
-	.4byte	.LLST409
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x34fe
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7245
-	.uleb128 0x34
-	.8byte	.LVL1770
-	.4byte	0x3126
-	.4byte	0x33be
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR53
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1772
-	.4byte	0x594e
-	.4byte	0x33d5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1773
-	.4byte	0x75b1
-	.uleb128 0x45
-	.8byte	.LVL1774
-	.4byte	0x7304
-	.uleb128 0x34
-	.8byte	.LVL1778
-	.4byte	0xa94f
-	.4byte	0x3421
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR171
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa2
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1780
-	.4byte	0x3691
-	.4byte	0x3439
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1781
-	.4byte	0x692c
-	.uleb128 0x45
-	.8byte	.LVL1783
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL1784
-	.4byte	0x567a
-	.uleb128 0x34
-	.8byte	.LVL1787
-	.4byte	0xa94f
-	.4byte	0x348b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa8
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1788
-	.4byte	0x5c1c
-	.4byte	0x34a9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 188
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1789
-	.4byte	0x6d33
-	.uleb128 0x34
-	.8byte	.LVL1792
-	.4byte	0x5c1c
-	.4byte	0x34d3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1794
-	.4byte	0x3691
-	.uleb128 0x45
-	.8byte	.LVL1798
-	.4byte	0x6951
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x34fe
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x12
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x34ee
-	.uleb128 0x43
-	.4byte	.LASF627
-	.byte	0x5
-	.byte	0x54
-	.8byte	.LFB307
-	.8byte	.LFE307-.LFB307
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3580
-	.uleb128 0x2e
-	.4byte	.LASF628
-	.byte	0x5
-	.byte	0x54
-	.4byte	0xdd4
-	.4byte	.LLST124
-	.uleb128 0x2e
-	.4byte	.LASF391
-	.byte	0x5
-	.byte	0x54
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-	.4byte	.LLST125
-	.uleb128 0x31
-	.string	"lpa"
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-	.byte	0x54
-	.4byte	0xdd4
-	.4byte	.LLST126
-	.uleb128 0x32
-	.4byte	.LASF629
-	.byte	0x5
-	.byte	0x56
-	.4byte	0xdc9
-	.4byte	.LLST127
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x57
-	.4byte	0xdc9
-	.4byte	.LLST128
-	.uleb128 0x36
-	.8byte	.LVL526
-	.4byte	0x6d33
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x76
-	.sleb128 0
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-	.byte	0x25
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF630
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdd4
-	.8byte	.LFB306
-	.8byte	.LFE306-.LFB306
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x35be
-	.uleb128 0x31
-	.string	"blk"
-	.byte	0x5
-	.byte	0x49
-	.4byte	0xdc9
-	.4byte	.LLST122
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x4b
-	.4byte	0xdc9
-	.4byte	.LLST123
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF631
-	.byte	0x5
-	.byte	0x38
-	.8byte	.LFB305
-	.8byte	.LFE305-.LFB305
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3612
-	.uleb128 0x5b
-	.string	"req"
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-	.byte	0x38
-	.4byte	0x1abc
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x38
-	.4byte	0xdd4
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x5
-	.byte	0x3a
-	.4byte	0xdc9
-	.4byte	.LLST120
-	.uleb128 0x32
-	.4byte	.LASF633
-	.byte	0x5
-	.byte	0x3b
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-	.4byte	.LLST121
-	.byte	0
-	.uleb128 0x43
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-	.byte	0x29
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-	.8byte	.LFE304-.LFB304
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3666
-	.uleb128 0x5b
-	.string	"req"
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5c
-	.4byte	.LASF632
-	.byte	0x5
-	.byte	0x29
-	.4byte	0xdd4
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x33
-	.string	"i"
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-	.4byte	.LLST118
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-	.byte	0x5
-	.byte	0x2c
-	.4byte	0xdc9
-	.4byte	.LLST119
-	.byte	0
-	.uleb128 0x43
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-	.8byte	.LFE303-.LFB303
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3691
-	.uleb128 0x33
-	.string	"i"
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-	.byte	0x17
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-	.4byte	.LLST117
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-	.uleb128 0x49
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-	.8byte	.LFE302-.LFB302
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-	.byte	0x9c
-	.4byte	0x3780
-	.uleb128 0x53
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xac6
-	.4byte	0xdc9
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-	.uleb128 0x54
-	.string	"ret"
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-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x3790
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7175
-	.uleb128 0x34
-	.8byte	.LVL1343
-	.4byte	0xa94f
-	.4byte	0x3710
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC101
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1348
-	.4byte	0xa94f
-	.4byte	0x3743
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x9
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-	.8byte	.LANCHOR159
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xacd
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1349
-	.4byte	0x3795
-	.uleb128 0x36
-	.8byte	.LVL1351
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR159
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
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-	.byte	0
-	.uleb128 0xa
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-	.uleb128 0xe
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-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3780
-	.uleb128 0x4a
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-	.4byte	0x37c0
-	.uleb128 0x4b
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-	.uleb128 0xa
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-	.4byte	0x37d0
-	.uleb128 0xe
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-	.8byte	.LFB300
-	.8byte	.LFE300-.LFB300
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3903
-	.uleb128 0x53
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa91
-	.4byte	0x1eef
-	.4byte	.LLST114
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa93
-	.4byte	0xdc9
-	.4byte	.LLST115
-	.uleb128 0x55
-	.4byte	.LASF640
-	.byte	0x2
-	.2byte	0xa94
-	.4byte	0xdd4
-	.4byte	.LLST116
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x34fe
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7155
-	.uleb128 0x34
-	.8byte	.LVL485
-	.4byte	0xa94f
-	.4byte	0x386d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa96
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL486
-	.4byte	0xa94f
-	.4byte	0x38a0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa97
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL487
-	.4byte	0xa94f
-	.4byte	0x38d3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa98
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL491
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xaad
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF641
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x5b
-	.8byte	.LFB299
-	.8byte	.LFE299-.LFB299
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3a0e
-	.uleb128 0x53
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0xa79
-	.4byte	0x1eef
-	.4byte	.LLST396
-	.uleb128 0x55
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa7b
-	.4byte	0xdc9
-	.4byte	.LLST397
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x3a1e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7148
-	.uleb128 0x34
-	.8byte	.LVL1732
-	.4byte	0xa94f
-	.4byte	0x398b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR169
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa7c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1733
-	.4byte	0x692c
-	.4byte	0x39a3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1734
-	.4byte	0x3795
-	.uleb128 0x34
-	.8byte	.LVL1735
-	.4byte	0x3a23
-	.4byte	0x39c8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1736
-	.4byte	0x5d49
-	.uleb128 0x34
-	.8byte	.LVL1737
-	.4byte	0x594e
-	.4byte	0x39ec
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1738
-	.4byte	0x567a
-	.uleb128 0x36
-	.8byte	.LVL1742
-	.4byte	0x6951
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x3a1e
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3a0e
-	.uleb128 0x49
-	.4byte	.LASF642
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x5b
-	.8byte	.LFB298
-	.8byte	.LFE298-.LFB298
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3d4e
-	.uleb128 0x5d
-	.string	"p"
-	.byte	0x2
-	.2byte	0xa15
-	.4byte	0x1eef
-	.4byte	.LLST311
-	.uleb128 0x55
-	.4byte	.LASF643
-	.byte	0x2
-	.2byte	0xa17
-	.4byte	0xdc9
-	.4byte	.LLST312
-	.uleb128 0x4c
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.uleb128 0x55
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.4byte	.LLST313
-	.uleb128 0x54
-	.string	"n"
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.4byte	.LLST314
-	.uleb128 0x4c
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0xa18
-	.4byte	0xdc9
-	.uleb128 0x55
-	.4byte	.LASF644
-	.byte	0x2
-	.2byte	0xa19
-	.4byte	0x5b
-	.4byte	.LLST315
-	.uleb128 0x55
-	.4byte	.LASF645
-	.byte	0x2
-	.2byte	0xa1a
-	.4byte	0xdc9
-	.4byte	.LLST316
-	.uleb128 0x4e
-	.4byte	.LASF646
-	.byte	0x2
-	.2byte	0xa1b
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x3d5e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7127
-	.uleb128 0x5e
-	.4byte	0x53f4
-	.8byte	.LBB283
-	.8byte	.LBE283-.LBB283
-	.byte	0x2
-	.2byte	0xa4b
-	.4byte	0x3b1e
-	.uleb128 0x47
-	.4byte	0x540d
-	.4byte	.LLST317
-	.uleb128 0x47
-	.4byte	0x5401
-	.4byte	.LLST318
-	.uleb128 0x36
-	.8byte	.LVL1299
-	.4byte	0x96a0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x3e
-	.4byte	0x540d
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1271
-	.4byte	0xa94f
-	.4byte	0x3b51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa1c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1275
-	.4byte	0x66d0
-	.4byte	0x3b70
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR47
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1277
-	.4byte	0xa94f
-	.4byte	0x3ba3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1278
-	.4byte	0x45ef
-	.4byte	0x3bbb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1279
-	.4byte	0x692c
-	.4byte	0x3bd3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1280
-	.4byte	0xa94f
-	.4byte	0x3c06
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1283
-	.4byte	0xa94f
-	.4byte	0x3c39
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa33
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1285
-	.4byte	0xa94f
-	.4byte	0x3c6c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa3e
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1286
-	.4byte	0xa94f
-	.4byte	0x3c9f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1287
-	.4byte	0x53f4
-	.4byte	0x3cbc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1290
-	.4byte	0x270c
-	.4byte	0x3cd4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1292
-	.4byte	0x3ef1
-	.4byte	0x3cec
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1293
-	.4byte	0x7304
-	.uleb128 0x34
-	.8byte	.LVL1294
-	.4byte	0x692c
-	.4byte	0x3d11
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1304
-	.4byte	0x75b1
-	.uleb128 0x36
-	.8byte	.LVL1308
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR157
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xa75
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x3d5e
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x18
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x3d4e
-	.uleb128 0x4a
-	.4byte	.LASF647
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x3d81
-	.uleb128 0x4b
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0xa0c
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF648
-	.byte	0x2
-	.2byte	0x9c3
-	.4byte	0xdc9
-	.8byte	.LFB296
-	.8byte	.LFE296-.LFB296
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3e5d
-	.uleb128 0x55
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x9c5
-	.4byte	0xdc9
-	.4byte	.LLST104
-	.uleb128 0x55
-	.4byte	.LASF650
-	.byte	0x2
-	.2byte	0x9c6
-	.4byte	0xdc9
-	.4byte	.LLST105
-	.uleb128 0x55
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9c7
-	.4byte	0xdc9
-	.4byte	.LLST106
-	.uleb128 0x55
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x9c8
-	.4byte	0x1e17
-	.4byte	.LLST107
-	.uleb128 0x55
-	.4byte	.LASF653
-	.byte	0x2
-	.2byte	0x9c9
-	.4byte	0xdc9
-	.4byte	.LLST108
-	.uleb128 0x55
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x9ca
-	.4byte	0xdc9
-	.4byte	.LLST109
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x9cb
-	.4byte	0xdd4
-	.4byte	.LLST110
-	.uleb128 0x55
-	.4byte	.LASF325
-	.byte	0x2
-	.2byte	0x9cc
-	.4byte	0xdc9
-	.4byte	.LLST111
-	.uleb128 0x45
-	.8byte	.LVL462
-	.4byte	0x3e5d
-	.uleb128 0x45
-	.8byte	.LVL468
-	.4byte	0x3ebe
-	.uleb128 0x36
-	.8byte	.LVL470
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC72
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF655
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdc9
-	.8byte	.LFB295
-	.8byte	.LFE295-.LFB295
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ebe
-	.uleb128 0x53
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x9ae
-	.4byte	0xdc9
-	.4byte	.LLST93
-	.uleb128 0x55
-	.4byte	.LASF656
-	.byte	0x2
-	.2byte	0x9b0
-	.4byte	0xdc9
-	.4byte	.LLST94
-	.uleb128 0x55
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x9b1
-	.4byte	0xdc9
-	.4byte	.LLST95
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x9b2
-	.4byte	0xdc9
-	.4byte	.LLST96
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF657
-	.byte	0x2
-	.2byte	0x9a5
-	.4byte	0xdc9
-	.8byte	.LFB294
-	.8byte	.LFE294-.LFB294
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3ef1
-	.uleb128 0x55
-	.4byte	.LASF651
-	.byte	0x2
-	.2byte	0x9a7
-	.4byte	0xdc9
-	.4byte	.LLST92
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF658
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0x5b
-	.8byte	.LFB293
-	.8byte	.LFE293-.LFB293
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x3f79
-	.uleb128 0x53
-	.4byte	.LASF623
-	.byte	0x2
-	.2byte	0x995
-	.4byte	0xdc9
-	.4byte	.LLST88
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdc9
-	.4byte	.LLST89
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x997
-	.4byte	0xdc9
-	.4byte	.LLST90
-	.uleb128 0x55
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x998
-	.4byte	0xdc9
-	.4byte	.LLST91
-	.uleb128 0x34
-	.8byte	.LVL270
-	.4byte	0x6dce
-	.4byte	0x3f6b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL271
-	.4byte	0x7522
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF659
-	.byte	0x2
-	.2byte	0x933
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x3fa3
-	.uleb128 0x4d
-	.string	"i"
-	.byte	0x2
-	.2byte	0x935
-	.4byte	0x5b
-	.uleb128 0x50
-	.uleb128 0x4c
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x95a
-	.4byte	0x1eef
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF660
-	.byte	0x2
-	.2byte	0x914
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-	.byte	0x9c
-	.4byte	0x40a7
-	.uleb128 0x54
-	.string	"i"
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-	.2byte	0x916
-	.4byte	0x5b
-	.4byte	.LLST250
-	.uleb128 0x60
-	.string	"ppa"
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-	.2byte	0x917
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x55
-	.4byte	.LASF661
-	.byte	0x2
-	.2byte	0x918
-	.4byte	0x2dea
-	.4byte	.LLST251
-	.uleb128 0x34
-	.8byte	.LVL958
-	.4byte	0xa94f
-	.4byte	0x4013
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC91
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL961
-	.4byte	0x5c1c
-	.4byte	0x4037
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 140
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL962
-	.4byte	0xa94f
-	.4byte	0x405c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC92
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL964
-	.4byte	0x298f
-	.4byte	0x4085
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL965
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC93
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF662
-	.byte	0x2
-	.2byte	0x8e0
-	.8byte	.LFB290
-	.8byte	.LFE290-.LFB290
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4229
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x8e2
-	.4byte	0xdc9
-	.4byte	.LLST282
-	.uleb128 0x54
-	.string	"lpn"
-	.byte	0x2
-	.2byte	0x8e3
-	.4byte	0xdd4
-	.4byte	.LLST283
-	.uleb128 0x2a
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x8e4
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x54
-	.string	"blk"
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-	.2byte	0x8e5
-	.4byte	0xdc9
-	.4byte	.LLST284
-	.uleb128 0x55
-	.4byte	.LASF664
-	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0xdc9
-	.4byte	.LLST285
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4239
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7042
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x210
-	.4byte	0x4159
-	.uleb128 0x55
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x903
-	.4byte	0xdc9
-	.4byte	.LLST286
-	.uleb128 0x36
-	.8byte	.LVL1167
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1145
-	.4byte	0xa94f
-	.4byte	0x4185
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC94
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR155
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1146
-	.4byte	0x258a
-	.4byte	0x41aa
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2000
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1154
-	.4byte	0xa94f
-	.4byte	0x41dd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR155
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x911
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1156
-	.4byte	0x5c1c
-	.4byte	0x4201
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 188
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1157
-	.4byte	0x6d33
-	.uleb128 0x36
-	.8byte	.LVL1161
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
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-	.4byte	0x4239
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-	.byte	0xd
-	.byte	0
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-	.4byte	0x4229
-	.uleb128 0x5f
-	.4byte	.LASF665
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-	.byte	0x9c
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-	.uleb128 0x54
-	.string	"i"
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-	.4byte	0xdc9
-	.4byte	.LLST393
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-	.string	"lpn"
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-	.2byte	0x8c4
-	.4byte	0xdd4
-	.4byte	.LLST394
-	.uleb128 0x2a
-	.4byte	.LASF663
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-	.2byte	0x8c5
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x54
-	.string	"blk"
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-	.2byte	0x8c6
-	.4byte	0xdc9
-	.4byte	.LLST395
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4382
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7026
-	.uleb128 0x34
-	.8byte	.LVL1712
-	.4byte	0xa94f
-	.4byte	0x42d8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC94
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR168
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1713
-	.4byte	0x258a
-	.4byte	0x42f0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1718
-	.4byte	0x5c1c
-	.4byte	0x4314
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 156
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1719
-	.4byte	0x6d33
-	.uleb128 0x34
-	.8byte	.LVL1723
-	.4byte	0xa94f
-	.4byte	0x433f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1724
-	.4byte	0x3795
-	.4byte	0x4357
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1725
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL1726
-	.4byte	0x567a
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x4382
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x14
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x4372
-	.uleb128 0x5f
-	.4byte	.LASF666
-	.byte	0x2
-	.2byte	0x89c
-	.8byte	.LFB288
-	.8byte	.LFE288-.LFB288
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x443f
-	.uleb128 0x53
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x89c
-	.4byte	0x1eef
-	.4byte	.LLST355
-	.uleb128 0x2a
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x89e
-	.4byte	0xdf5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x55
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x89f
-	.4byte	0x2dea
-	.4byte	.LLST356
-	.uleb128 0x55
-	.4byte	.LASF668
-	.byte	0x2
-	.2byte	0x8a0
-	.4byte	0x5b
-	.4byte	.LLST357
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-	.2byte	0x8a1
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1521
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-	.4byte	0x4409
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1522
-	.4byte	0x27d2
-	.4byte	0x4431
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1523
-	.4byte	0x3691
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF669
-	.byte	0x2
-	.2byte	0x882
-	.8byte	.LFB287
-	.8byte	.LFE287-.LFB287
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x44a0
-	.uleb128 0x34
-	.8byte	.LVL1663
-	.4byte	0x59b6
-	.4byte	0x447f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1664
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x56
-	.4byte	.LASF671
-	.byte	0x2
-	.2byte	0x86e
-	.byte	0x1
-	.uleb128 0x49
-	.4byte	.LASF672
-	.byte	0x2
-	.2byte	0x843
-	.4byte	0x5b
-	.8byte	.LFB285
-	.8byte	.LFE285-.LFB285
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x45da
-	.uleb128 0x55
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST276
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST277
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST278
-	.uleb128 0x55
-	.4byte	.LASF375
-	.byte	0x2
-	.2byte	0x845
-	.4byte	0xdc9
-	.4byte	.LLST279
-	.uleb128 0x55
-	.4byte	.LASF673
-	.byte	0x2
-	.2byte	0x846
-	.4byte	0xdc9
-	.4byte	.LLST280
-	.uleb128 0x55
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-	.2byte	0x846
-	.4byte	0xdc9
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-	.uleb128 0x3f
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.7001
-	.uleb128 0x34
-	.8byte	.LVL1119
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-	.4byte	0x4555
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1123
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1124
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-	.uleb128 0x34
-	.8byte	.LVL1131
-	.4byte	0x6951
-	.4byte	0x4592
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1139
-	.4byte	0x692c
-	.4byte	0x45aa
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1141
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR154
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x86a
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x45ea
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x11
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x45da
-	.uleb128 0x49
-	.4byte	.LASF675
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x5b
-	.8byte	.LFB284
-	.8byte	.LFE284-.LFB284
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x46a7
-	.uleb128 0x5d
-	.string	"p"
-	.byte	0x2
-	.2byte	0x82d
-	.4byte	0x1eef
-	.4byte	.LLST85
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdc9
-	.4byte	.LLST86
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x82f
-	.4byte	0xdc9
-	.4byte	.LLST87
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x37d0
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6980
-	.uleb128 0x34
-	.8byte	.LVL253
-	.4byte	0xa94f
-	.4byte	0x4685
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR60
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x831
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL257
-	.4byte	0x6dce
-	.uleb128 0x36
-	.8byte	.LVL259
-	.4byte	0x7522
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF676
-	.byte	0x2
-	.2byte	0x820
-	.4byte	0x5b
-	.8byte	.LFB283
-	.8byte	.LFE283-.LFB283
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x474b
-	.uleb128 0x34
-	.8byte	.LVL1802
-	.4byte	0x4771
-	.4byte	0x46e1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1803
-	.4byte	0x474b
-	.4byte	0x46f9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1804
-	.4byte	0x4771
-	.4byte	0x4711
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1805
-	.4byte	0x474b
-	.4byte	0x4729
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1806
-	.4byte	0x311d
-	.uleb128 0x36
-	.8byte	.LVL1807
-	.4byte	0x3691
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF712
-	.byte	0x2
-	.2byte	0x80d
-	.byte	0x1
-	.4byte	0x4771
-	.uleb128 0x4b
-	.4byte	.LASF639
-	.byte	0x2
-	.2byte	0x80d
-	.4byte	0x1eef
-	.uleb128 0x4c
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x80f
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF677
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x5b
-	.8byte	.LFB281
-	.8byte	.LFE281-.LFB281
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4d6e
-	.uleb128 0x53
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x6a8
-	.4byte	0x1eef
-	.4byte	.LLST330
-	.uleb128 0x55
-	.4byte	.LASF678
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdc9
-	.4byte	.LLST331
-	.uleb128 0x55
-	.4byte	.LASF679
-	.byte	0x2
-	.2byte	0x6aa
-	.4byte	0xdc9
-	.4byte	.LLST332
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdc9
-	.4byte	.LLST333
-	.uleb128 0x55
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdc9
-	.4byte	.LLST334
-	.uleb128 0x55
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x6ab
-	.4byte	0xdc9
-	.4byte	.LLST335
-	.uleb128 0x55
-	.4byte	.LASF680
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdc9
-	.4byte	.LLST336
-	.uleb128 0x55
-	.4byte	.LASF681
-	.byte	0x2
-	.2byte	0x6ac
-	.4byte	0xdc9
-	.4byte	.LLST337
-	.uleb128 0x55
-	.4byte	.LASF596
-	.byte	0x2
-	.2byte	0x6ad
-	.4byte	0xdc9
-	.4byte	.LLST338
-	.uleb128 0x55
-	.4byte	.LASF682
-	.byte	0x2
-	.2byte	0x6ae
-	.4byte	0x5b
-	.4byte	.LLST339
-	.uleb128 0x55
-	.4byte	.LASF683
-	.byte	0x2
-	.2byte	0x6ae
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-	.4byte	.LLST339
-	.uleb128 0x55
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0x6af
-	.4byte	0xdc9
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-	.uleb128 0x54
-	.string	"n"
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-	.4byte	0xdc9
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-	.uleb128 0x54
-	.string	"req"
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-	.2byte	0x6af
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-	.uleb128 0x60
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x1
-	.byte	0x68
-	.uleb128 0x2a
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -12
-	.uleb128 0x2a
-	.4byte	.LASF624
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -8
-	.uleb128 0x2a
-	.4byte	.LASF615
-	.byte	0x2
-	.2byte	0x6b0
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x55
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdc9
-	.4byte	.LLST344
-	.uleb128 0x55
-	.4byte	.LASF684
-	.byte	0x2
-	.2byte	0x6b1
-	.4byte	0xdc9
-	.4byte	.LLST345
-	.uleb128 0x55
-	.4byte	.LASF685
-	.byte	0x2
-	.2byte	0x6b2
-	.4byte	0xdd4
-	.4byte	.LLST346
-	.uleb128 0x55
-	.4byte	.LASF686
-	.byte	0x2
-	.2byte	0x6b3
-	.4byte	0xdc9
-	.4byte	.LLST347
-	.uleb128 0x55
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x6b4
-	.4byte	0x2dea
-	.4byte	.LLST348
-	.uleb128 0x61
-	.4byte	.LASF687
-	.byte	0x2
-	.2byte	0x6b5
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4d7e
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6923
-	.uleb128 0x59
-	.4byte	.LASF689
-	.byte	0x2
-	.2byte	0x744
-	.8byte	.L1038
-	.uleb128 0x59
-	.4byte	.LASF619
-	.byte	0x2
-	.2byte	0x74c
-	.8byte	.L1053
-	.uleb128 0x59
-	.4byte	.LASF690
-	.byte	0x2
-	.2byte	0x7ff
-	.8byte	.L1059
-	.uleb128 0x4e
-	.4byte	.LASF691
-	.byte	0x2
-	.2byte	0x809
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2b0
-	.4byte	0x4991
-	.uleb128 0x55
-	.4byte	.LASF692
-	.byte	0x2
-	.2byte	0x71c
-	.4byte	0xdd4
-	.4byte	.LLST349
-	.uleb128 0x55
-	.4byte	.LASF693
-	.byte	0x2
-	.2byte	0x71d
-	.4byte	0xdd4
-	.4byte	.LLST350
-	.uleb128 0x36
-	.8byte	.LVL1432
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2e0
-	.4byte	0x4a8c
-	.uleb128 0x55
-	.4byte	.LASF694
-	.byte	0x2
-	.2byte	0x777
-	.4byte	0xdd4
-	.4byte	.LLST351
-	.uleb128 0x55
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x778
-	.4byte	0xdd4
-	.4byte	.LLST352
-	.uleb128 0x34
-	.8byte	.LVL1475
-	.4byte	0x298f
-	.4byte	0x49d6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1477
-	.4byte	0x3691
-	.uleb128 0x34
-	.8byte	.LVL1483
-	.4byte	0x5c1c
-	.4byte	0x4a07
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 340
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1486
-	.4byte	0x6ce4
-	.4byte	0x4a22
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x94
-	.byte	0x4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1487
-	.4byte	0x4d83
-	.4byte	0x4a3a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1489
-	.4byte	0x298f
-	.4byte	0x4a56
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1492
-	.4byte	0x6ce4
-	.4byte	0x4a6e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1493
-	.4byte	0x6ce4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x94
-	.byte	0x4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x73
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x63
-	.8byte	.LBB310
-	.8byte	.LBE310-.LBB310
-	.4byte	0x4b16
-	.uleb128 0x55
-	.4byte	.LASF696
-	.byte	0x2
-	.2byte	0x7b6
-	.4byte	0xdd4
-	.4byte	.LLST353
-	.uleb128 0x55
-	.4byte	.LASF695
-	.byte	0x2
-	.2byte	0x7b7
-	.4byte	0xdd4
-	.4byte	.LLST354
-	.uleb128 0x34
-	.8byte	.LVL1501
-	.4byte	0x298f
-	.4byte	0x4add
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1502
-	.4byte	0x6ce4
-	.4byte	0x4af5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1503
-	.4byte	0x5c1c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 344
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1380
-	.4byte	0x6c07
-	.4byte	0x4b2d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1385
-	.4byte	0x298f
-	.4byte	0x4b4a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1390
-	.4byte	0x6d73
-	.uleb128 0x34
-	.8byte	.LVL1393
-	.4byte	0x4ec4
-	.4byte	0x4b7b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1401
-	.4byte	0xa94f
-	.4byte	0x4bae
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6db
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1402
-	.4byte	0xa94f
-	.4byte	0x4be1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x6dc
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1411
-	.4byte	0x6ce4
-	.4byte	0x4bf9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1437
-	.4byte	0x5875
-	.4byte	0x4c18
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
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-	.uleb128 0x34
-	.8byte	.LVL1440
-	.4byte	0x298f
-	.4byte	0x4c35
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1461
-	.4byte	0x6d73
-	.4byte	0x4c4f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x75
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1468
-	.4byte	0x3691
-	.uleb128 0x34
-	.8byte	.LVL1471
-	.4byte	0x6ce4
-	.4byte	0x4c74
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1472
-	.4byte	0x5c1c
-	.4byte	0x4c98
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 344
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1473
-	.4byte	0x6ce4
-	.4byte	0x4cb0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1478
-	.4byte	0x6d33
-	.4byte	0x4cca
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x73
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1480
-	.4byte	0xa94f
-	.4byte	0x4cfd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x7d6
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1495
-	.4byte	0x5c1c
-	.4byte	0x4d21
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 348
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1496
-	.4byte	0x6d33
-	.4byte	0x4d3b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x73
-	.sleb128 0
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1505
-	.4byte	0xa94f
-	.4byte	0x4d60
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC102
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1507
-	.4byte	0x3691
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x4d7e
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x15
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x4d6e
-	.uleb128 0x5f
-	.4byte	.LASF697
-	.byte	0x2
-	.2byte	0x68c
-	.8byte	.LFB280
-	.8byte	.LFE280-.LFB280
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4ec4
-	.uleb128 0x5d
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdd4
-	.4byte	.LLST244
-	.uleb128 0x53
-	.4byte	.LASF663
-	.byte	0x2
-	.2byte	0x68c
-	.4byte	0xdd4
-	.4byte	.LLST245
-	.uleb128 0x55
-	.4byte	.LASF629
-	.byte	0x2
-	.2byte	0x68e
-	.4byte	0xdc9
-	.4byte	.LLST246
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x37d0
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6889
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x190
-	.4byte	0x4e88
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x692
-	.4byte	0xdc9
-	.4byte	.LLST247
-	.uleb128 0x55
-	.4byte	.LASF586
-	.byte	0x2
-	.2byte	0x693
-	.4byte	0xdc9
-	.4byte	.LLST248
-	.uleb128 0x55
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x694
-	.4byte	0xdc9
-	.4byte	.LLST249
-	.uleb128 0x34
-	.8byte	.LVL946
-	.4byte	0x6747
-	.4byte	0x4e40
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR47
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL947
-	.4byte	0xa94f
-	.4byte	0x4e73
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR146
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x698
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL948
-	.4byte	0x692c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL940
-	.4byte	0x6d33
-	.4byte	0x4ea3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x3a
-	.byte	0x25
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL950
-	.4byte	0x5c1c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 124
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF698
-	.byte	0x2
-	.2byte	0x678
-	.8byte	.LFB279
-	.8byte	.LFE279-.LFB279
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f21
-	.uleb128 0x64
-	.4byte	.LASF613
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0x1eef
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x53
-	.4byte	.LASF380
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdc9
-	.4byte	.LLST80
-	.uleb128 0x53
-	.4byte	.LASF382
-	.byte	0x2
-	.2byte	0x678
-	.4byte	0xdc9
-	.4byte	.LLST81
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x67a
-	.4byte	0xdc9
-	.4byte	.LLST82
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF699
-	.byte	0x2
-	.2byte	0x66f
-	.4byte	0x5b
-	.8byte	.LFB278
-	.8byte	.LFE278-.LFB278
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4f6c
-	.uleb128 0x45
-	.8byte	.LVL1110
-	.4byte	0x4f6c
-	.uleb128 0x36
-	.8byte	.LVL1111
-	.4byte	0x5004
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF700
-	.byte	0x2
-	.2byte	0x658
-	.8byte	.LFB277
-	.8byte	.LFE277-.LFB277
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x4fc6
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x65a
-	.4byte	0xdc9
-	.4byte	.LLST275
-	.uleb128 0x34
-	.8byte	.LVL1107
-	.4byte	0x258a
-	.4byte	0x4fb1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1108
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF701
-	.byte	0x2
-	.2byte	0x648
-	.4byte	0x5b
-	.8byte	.LFB276
-	.8byte	.LFE276-.LFB276
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5004
-	.uleb128 0x36
-	.8byte	.LVL1106
-	.4byte	0x5004
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR149
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF702
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x5b
-	.8byte	.LFB275
-	.8byte	.LFE275-.LFB275
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x51d6
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x5ea
-	.4byte	0x51d6
-	.4byte	.LLST264
-	.uleb128 0x55
-	.4byte	.LASF704
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xdea
-	.4byte	.LLST265
-	.uleb128 0x55
-	.4byte	.LASF299
-	.byte	0x2
-	.2byte	0x5ec
-	.4byte	0xdea
-	.4byte	.LLST266
-	.uleb128 0x55
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x5ed
-	.4byte	0xdea
-	.4byte	.LLST267
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x5ee
-	.4byte	0xdc9
-	.4byte	.LLST268
-	.uleb128 0x55
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x5ef
-	.4byte	0x1001
-	.4byte	.LLST269
-	.uleb128 0x55
-	.4byte	.LASF310
-	.byte	0x2
-	.2byte	0x5f0
-	.4byte	0x10f8
-	.4byte	.LLST270
-	.uleb128 0x55
-	.4byte	.LASF311
-	.byte	0x2
-	.2byte	0x5f1
-	.4byte	0x1001
-	.4byte	.LLST271
-	.uleb128 0x55
-	.4byte	.LASF307
-	.byte	0x2
-	.2byte	0x5f2
-	.4byte	0xdc9
-	.4byte	.LLST272
-	.uleb128 0x55
-	.4byte	.LASF707
-	.byte	0x2
-	.2byte	0x5f3
-	.4byte	0xdc9
-	.4byte	.LLST273
-	.uleb128 0x55
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x5f4
-	.4byte	0x51dc
-	.4byte	.LLST274
-	.uleb128 0x34
-	.8byte	.LVL1066
-	.4byte	0x258a
-	.4byte	0x50fc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x4
-	.byte	0x87
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1071
-	.4byte	0x6c07
-	.4byte	0x5113
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1076
-	.4byte	0x6340
-	.4byte	0x512b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1077
-	.4byte	0x62e8
-	.4byte	0x5143
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1078
-	.4byte	0x616e
-	.4byte	0x515b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1079
-	.4byte	0x616e
-	.4byte	0x5173
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1087
-	.4byte	0x298f
-	.4byte	0x5195
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1091
-	.4byte	0x298f
-	.4byte	0x51b7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1093
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x104f
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x1280
-	.uleb128 0x49
-	.4byte	.LASF709
-	.byte	0x2
-	.2byte	0x580
-	.4byte	0x5b
-	.8byte	.LFB274
-	.8byte	.LFE274-.LFB274
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x53c1
-	.uleb128 0x55
-	.4byte	.LASF705
-	.byte	0x2
-	.2byte	0x582
-	.4byte	0xdea
-	.4byte	.LLST462
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x298a
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6826
-	.uleb128 0x34
-	.8byte	.LVL2055
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-	.4byte	0x523e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2056
-	.4byte	0x6c07
-	.4byte	0x5255
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2058
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-	.4byte	0x5288
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR179
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59d
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2059
-	.4byte	0xa94f
-	.4byte	0x52bb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR179
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x59f
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2061
-	.4byte	0x2512
-	.4byte	0x52d9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2062
-	.4byte	0x2512
-	.uleb128 0x45
-	.8byte	.LVL2063
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL2064
-	.4byte	0xa94f
-	.4byte	0x5326
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR179
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x5b5
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2065
-	.4byte	0x45ef
-	.4byte	0x5345
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR51
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2066
-	.4byte	0x45ef
-	.4byte	0x5364
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR52
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2067
-	.4byte	0x45ef
-	.4byte	0x5383
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR53
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2068
-	.4byte	0x45ef
-	.4byte	0x53a2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR80
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL2070
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF710
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0x5b
-	.8byte	.LFB273
-	.8byte	.LFE273-.LFB273
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x53f4
-	.uleb128 0x53
-	.4byte	.LASF711
-	.byte	0x2
-	.2byte	0x57b
-	.4byte	0xdc9
-	.4byte	.LLST79
-	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF713
-	.byte	0x2
-	.2byte	0x573
-	.byte	0x1
-	.4byte	0x541a
-	.uleb128 0x4b
-	.4byte	.LASF711
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0xdc9
-	.uleb128 0x4b
-	.4byte	.LASF590
-	.byte	0x2
-	.2byte	0x573
-	.4byte	0x5b
-	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF715
-	.byte	0x2
-	.2byte	0x566
-	.4byte	0x5b
-	.byte	0x1
-	.uleb128 0x49
-	.4byte	.LASF716
-	.byte	0x2
-	.2byte	0x477
-	.4byte	0x5b
-	.8byte	.LFB270
-	.8byte	.LFE270-.LFB270
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x567a
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0xdc9
-	.4byte	.LLST257
-	.uleb128 0x55
-	.4byte	.LASF717
-	.byte	0x2
-	.2byte	0x479
-	.4byte	0xdc9
-	.4byte	.LLST258
-	.uleb128 0x55
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0xdc9
-	.4byte	.LLST259
-	.uleb128 0x55
-	.4byte	.LASF568
-	.byte	0x2
-	.2byte	0x47a
-	.4byte	0xdc9
-	.4byte	.LLST260
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0xdea
-	.4byte	.LLST261
-	.uleb128 0x54
-	.string	"j"
-	.byte	0x2
-	.2byte	0x47b
-	.4byte	0xdea
-	.4byte	.LLST262
-	.uleb128 0x55
-	.4byte	.LASF718
-	.byte	0x2
-	.2byte	0x47c
-	.4byte	0x51dc
-	.4byte	.LLST263
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4239
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6769
-	.uleb128 0x34
-	.8byte	.LVL988
-	.4byte	0x258a
-	.4byte	0x54df
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL989
-	.4byte	0x258a
-	.4byte	0x54f6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL990
-	.4byte	0x258a
-	.4byte	0x550d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL991
-	.4byte	0x258a
-	.4byte	0x5524
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL992
-	.4byte	0x258a
-	.4byte	0x554e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR79
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x3c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL995
-	.4byte	0x6dce
-	.4byte	0x5569
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 332
-	.byte	0x94
-	.byte	0x2
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL997
-	.4byte	0x7522
-	.4byte	0x5581
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1006
-	.4byte	0x298f
-	.4byte	0x559e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1011
-	.4byte	0x298f
-	.4byte	0x55ba
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1013
-	.4byte	0x6b48
-	.4byte	0x55d7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1017
-	.4byte	0xa94f
-	.4byte	0x5605
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4bb
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1028
-	.4byte	0xa94f
-	.4byte	0x5633
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x4
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x4e4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1039
-	.4byte	0x6b48
-	.4byte	0x564a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1041
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR148
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x561
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF719
-	.byte	0x2
-	.2byte	0x41c
-	.4byte	0x5b
-	.8byte	.LFB269
-	.8byte	.LFE269-.LFB269
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x5823
-	.uleb128 0x55
-	.4byte	.LASF300
-	.byte	0x2
-	.2byte	0x41e
-	.4byte	0xdc9
-	.4byte	.LLST384
-	.uleb128 0x55
-	.4byte	.LASF720
-	.byte	0x2
-	.2byte	0x41f
-	.4byte	0x5823
-	.4byte	.LLST385
-	.uleb128 0x55
-	.4byte	.LASF721
-	.byte	0x2
-	.2byte	0x420
-	.4byte	0xdc9
-	.4byte	.LLST386
-	.uleb128 0x4e
-	.4byte	.LASF722
-	.byte	0x2
-	.2byte	0x44d
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x298a
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6747
-	.uleb128 0x34
-	.8byte	.LVL1667
-	.4byte	0x258a
-	.4byte	0x56ff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1668
-	.4byte	0x2512
-	.4byte	0x5724
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR39
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1669
-	.4byte	0x2512
-	.uleb128 0x45
-	.8byte	.LVL1670
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL1671
-	.4byte	0x592a
-	.4byte	0x5756
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1673
-	.4byte	0x27d2
-	.4byte	0x577d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1675
-	.4byte	0x6976
-	.uleb128 0x34
-	.8byte	.LVL1676
-	.4byte	0x27d2
-	.4byte	0x57b1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1677
-	.4byte	0xa94f
-	.4byte	0x57e4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR166
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x464
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1680
-	.4byte	0xa94f
-	.4byte	0x5809
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC104
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1681
-	.4byte	0x6b48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x12d8
-	.uleb128 0x62
-	.4byte	.LASF723
-	.byte	0x2
-	.2byte	0x3e3
-	.byte	0x1
-	.4byte	0x5875
-	.uleb128 0x50
-	.uleb128 0x4d
-	.string	"lpa"
-	.byte	0x2
-	.2byte	0x3e8
-	.4byte	0xdd4
-	.uleb128 0x4d
-	.string	"ppa"
-	.byte	0x2
-	.2byte	0x3e9
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF724
-	.byte	0x2
-	.2byte	0x3ea
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF667
-	.byte	0x2
-	.2byte	0x3eb
-	.4byte	0xdf5
-	.uleb128 0x4c
-	.4byte	.LASF598
-	.byte	0x2
-	.2byte	0x3ec
-	.4byte	0x2dea
-	.byte	0
-	.byte	0
-	.uleb128 0x5f
-	.4byte	.LASF725
-	.byte	0x2
-	.2byte	0x3b1
-	.8byte	.LFB267
-	.8byte	.LFE267-.LFB267
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x592a
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x3b1
-	.4byte	0x51d6
-	.4byte	.LLST253
-	.uleb128 0x54
-	.string	"ppa"
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-	.2byte	0x3b3
-	.4byte	0xdd4
-	.4byte	.LLST254
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-	.byte	0x2
-	.2byte	0x3b4
-	.4byte	0xdc9
-	.4byte	.LLST255
-	.uleb128 0x55
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-	.byte	0x2
-	.2byte	0x3b5
-	.4byte	0x1001
-	.4byte	.LLST256
-	.uleb128 0x34
-	.8byte	.LVL982
-	.4byte	0x298f
-	.4byte	0x58fc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x44
-	.8byte	.LVL984
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL986
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x34
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-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC89
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL885
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC90
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF751
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x5b
-	.8byte	.LFB257
-	.8byte	.LFE257-.LFB257
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6159
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x277
-	.4byte	0x51d6
-	.4byte	.LLST217
-	.uleb128 0x4c
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdc9
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x279
-	.4byte	0xdc9
-	.4byte	.LLST218
-	.uleb128 0x55
-	.4byte	.LASF752
-	.byte	0x2
-	.2byte	0x27a
-	.4byte	0xdc9
-	.4byte	.LLST219
-	.uleb128 0x55
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x27b
-	.4byte	0x10f8
-	.4byte	.LLST220
-	.uleb128 0x55
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x27c
-	.4byte	0x1001
-	.4byte	.LLST221
-	.uleb128 0x55
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x27d
-	.4byte	0x51dc
-	.4byte	.LLST222
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x6169
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6618
-	.uleb128 0x34
-	.8byte	.LVL854
-	.4byte	0xa94f
-	.4byte	0x60f1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR141
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x281
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL855
-	.4byte	0x6976
-	.uleb128 0x34
-	.8byte	.LVL862
-	.4byte	0x258a
-	.4byte	0x6116
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL866
-	.4byte	0x27d2
-	.4byte	0x6144
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL867
-	.4byte	0x616e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x6169
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x1e
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x6159
-	.uleb128 0x49
-	.4byte	.LASF754
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x5b
-	.8byte	.LFB256
-	.8byte	.LFE256-.LFB256
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x62e8
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x249
-	.4byte	0x51d6
-	.4byte	.LLST229
-	.uleb128 0x55
-	.4byte	.LASF755
-	.byte	0x2
-	.2byte	0x24b
-	.4byte	0xdc9
-	.4byte	.LLST230
-	.uleb128 0x55
-	.4byte	.LASF756
-	.byte	0x2
-	.2byte	0x24c
-	.4byte	0xdc9
-	.4byte	.LLST231
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x24d
-	.4byte	0xdc9
-	.4byte	.LLST232
-	.uleb128 0x55
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x24e
-	.4byte	0x10f8
-	.4byte	.LLST233
-	.uleb128 0x55
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x24f
-	.4byte	0x1001
-	.4byte	.LLST234
-	.uleb128 0x55
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x250
-	.4byte	0x51dc
-	.4byte	.LLST235
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x298a
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6604
-	.uleb128 0x34
-	.8byte	.LVL894
-	.4byte	0x6340
-	.4byte	0x622b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL897
-	.4byte	0x62e8
-	.4byte	0x6243
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL899
-	.4byte	0x6b48
-	.4byte	0x6260
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL901
-	.4byte	0x62e8
-	.4byte	0x6278
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL906
-	.4byte	0x298f
-	.4byte	0x62a1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL907
-	.4byte	0xa94f
-	.4byte	0x62cd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x265
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL912
-	.4byte	0x5e8c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF757
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x632b
-	.uleb128 0x4b
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x231
-	.4byte	0x51d6
-	.uleb128 0x4c
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x233
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x234
-	.4byte	0x10f8
-	.uleb128 0x4f
-	.4byte	.LASF573
-	.4byte	0x633b
-	.4byte	.LASF757
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x633b
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0x19
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x632b
-	.uleb128 0x49
-	.4byte	.LASF759
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x5b
-	.8byte	.LFB254
-	.8byte	.LFE254-.LFB254
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6423
-	.uleb128 0x53
-	.4byte	.LASF703
-	.byte	0x2
-	.2byte	0x209
-	.4byte	0x51d6
-	.4byte	.LLST208
-	.uleb128 0x55
-	.4byte	.LASF753
-	.byte	0x2
-	.2byte	0x20b
-	.4byte	0x10f8
-	.4byte	.LLST209
-	.uleb128 0x55
-	.4byte	.LASF706
-	.byte	0x2
-	.2byte	0x20c
-	.4byte	0x1001
-	.4byte	.LLST210
-	.uleb128 0x55
-	.4byte	.LASF760
-	.byte	0x2
-	.2byte	0x20d
-	.4byte	0x10f8
-	.4byte	.LLST211
-	.uleb128 0x55
-	.4byte	.LASF388
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdc9
-	.4byte	.LLST212
-	.uleb128 0x55
-	.4byte	.LASF330
-	.byte	0x2
-	.2byte	0x20e
-	.4byte	0xdc9
-	.4byte	.LLST213
-	.uleb128 0x55
-	.4byte	.LASF758
-	.byte	0x2
-	.2byte	0x20f
-	.4byte	0xdc9
-	.4byte	.LLST214
-	.uleb128 0x55
-	.4byte	.LASF761
-	.byte	0x2
-	.2byte	0x210
-	.4byte	0xdc9
-	.4byte	.LLST215
-	.uleb128 0x55
-	.4byte	.LASF756
-	.byte	0x2
-	.2byte	0x211
-	.4byte	0xdc9
-	.4byte	.LLST216
-	.uleb128 0x34
-	.8byte	.LVL831
-	.4byte	0x258a
-	.4byte	0x640f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL848
-	.4byte	0x6b48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF762
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0x5b
-	.8byte	.LFB253
-	.8byte	.LFE253-.LFB253
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x65ab
-	.uleb128 0x53
-	.4byte	.LASF317
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdc9
-	.4byte	.LLST205
-	.uleb128 0x53
-	.4byte	.LASF740
-	.byte	0x2
-	.2byte	0x1e7
-	.4byte	0xdc9
-	.4byte	.LLST206
-	.uleb128 0x2a
-	.4byte	.LASF708
-	.byte	0x2
-	.2byte	0x1e9
-	.4byte	0x51dc
-	.uleb128 0x1
-	.byte	0x69
-	.uleb128 0x55
-	.4byte	.LASF763
-	.byte	0x2
-	.2byte	0x1ea
-	.4byte	0xdd4
-	.4byte	.LLST207
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x37d0
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6560
-	.uleb128 0x34
-	.8byte	.LVL815
-	.4byte	0xa94f
-	.4byte	0x64c9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR140
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1ec
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL818
-	.4byte	0x258a
-	.4byte	0x64e1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL822
-	.4byte	0x298f
-	.4byte	0x6503
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL824
-	.4byte	0xa94f
-	.4byte	0x652e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC86
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL825
-	.4byte	0x2b07
-	.4byte	0x6557
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC87
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL826
-	.4byte	0x2b07
-	.4byte	0x657b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC88
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x34
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL827
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR140
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x201
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF764
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x662a
-	.uleb128 0x4b
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1bf
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF765
-	.byte	0x2
-	.2byte	0x1c1
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF766
-	.byte	0x2
-	.2byte	0x1c2
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF767
-	.byte	0x2
-	.2byte	0x1c3
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF768
-	.byte	0x2
-	.2byte	0x1c5
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF769
-	.byte	0x2
-	.2byte	0x1c6
-	.4byte	0xdd4
-	.uleb128 0x4c
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1e17
-	.uleb128 0x4c
-	.4byte	.LASF770
-	.byte	0x2
-	.2byte	0x1c7
-	.4byte	0x1e17
-	.uleb128 0x4f
-	.4byte	.LASF573
-	.4byte	0x4d7e
-	.4byte	.LASF764
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF771
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0x5b
-	.8byte	.LFB251
-	.8byte	.LFE251-.LFB251
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x667d
-	.uleb128 0x53
-	.4byte	.LASF236
-	.byte	0x2
-	.2byte	0x1ab
-	.4byte	0xdc9
-	.4byte	.LLST61
-	.uleb128 0x55
-	.4byte	.LASF649
-	.byte	0x2
-	.2byte	0x1ad
-	.4byte	0xdc9
-	.4byte	.LLST62
-	.uleb128 0x55
-	.4byte	.LASF652
-	.byte	0x2
-	.2byte	0x1ae
-	.4byte	0x1e17
-	.4byte	.LLST63
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF772
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x5b
-	.8byte	.LFB250
-	.8byte	.LFE250-.LFB250
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x66ca
-	.uleb128 0x53
-	.4byte	.LASF773
-	.byte	0x2
-	.2byte	0x1a6
-	.4byte	0x66ca
-	.4byte	.LLST60
-	.uleb128 0x2f
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
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-	.4byte	0x1e17
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-	.byte	0x2
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-	.4byte	0x5b
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-	.8byte	.LFE249-.LFB249
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-	.4byte	0x6747
-	.uleb128 0x53
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-	.4byte	0x66ca
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.byte	0
-	.byte	0
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-	.8byte	.LFE248-.LFB248
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-	.4byte	0x67ec
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-	.4byte	.LLST53
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-	.4byte	0x1e17
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-	.uleb128 0x3f
-	.4byte	.LASF573
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-	.8byte	__func__.6519
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-	.8byte	.LVL144
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
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-	.8byte	.LC1
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-	.uleb128 0x1
-	.byte	0x51
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
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-	.byte	0
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-	.4byte	0x1e17
-	.4byte	.LLST47
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-	.4byte	0xdc9
-	.uleb128 0x1
-	.byte	0x5d
-	.uleb128 0x55
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-	.byte	0x2
-	.2byte	0x149
-	.4byte	0xdc9
-	.4byte	.LLST48
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-	.4byte	.LASF780
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-	.2byte	0x14a
-	.4byte	0xdc9
-	.4byte	.LLST49
-	.byte	0
-	.uleb128 0x2d
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-	.byte	0x2
-	.byte	0xf8
-	.4byte	0x5b
-	.8byte	.LFB246
-	.8byte	.LFE246-.LFB246
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-	.byte	0x9c
-	.4byte	0x692c
-	.uleb128 0x2e
-	.4byte	.LASF649
-	.byte	0x2
-	.byte	0xf8
-	.4byte	0xdc9
-	.4byte	.LLST34
-	.uleb128 0x32
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-	.byte	0xfa
-	.4byte	0x1e17
-	.4byte	.LLST35
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-	.byte	0xfa
-	.4byte	0x1e17
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-	.byte	0xfb
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-	.byte	0xfc
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-	.8byte	.LFE233-.LFB233
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6dce
-	.uleb128 0x2e
-	.4byte	.LASF596
-	.byte	0x2
-	.byte	0xc
-	.4byte	0xdc9
-	.4byte	.LLST24
-	.uleb128 0x2b
-	.4byte	.LASF594
-	.byte	0x2
-	.byte	0xe
-	.4byte	0xdc9
-	.uleb128 0x1e
-	.byte	0x73
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x73
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x9f
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF806
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdc9
-	.8byte	.LFB232
-	.8byte	.LFE232-.LFB232
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6e1b
-	.uleb128 0x2e
-	.4byte	.LASF594
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdc9
-	.4byte	.LLST22
-	.uleb128 0x5c
-	.4byte	.LASF717
-	.byte	0x2
-	.byte	0x4
-	.4byte	0xdc9
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x32
-	.4byte	.LASF586
-	.byte	0x2
-	.byte	0x6
-	.4byte	0xdc9
-	.4byte	.LLST23
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF807
-	.byte	0x4
-	.2byte	0x13c
-	.4byte	0xddf
-	.8byte	.LFB231
-	.8byte	.LFE231-.LFB231
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7066
-	.uleb128 0x54
-	.string	"die"
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-	.2byte	0x13e
-	.4byte	0xdd4
-	.4byte	.LLST362
-	.uleb128 0x54
-	.string	"blk"
-	.byte	0x4
-	.2byte	0x13f
-	.4byte	0xdc9
-	.4byte	.LLST363
-	.uleb128 0x55
-	.4byte	.LASF576
-	.byte	0x4
-	.2byte	0x140
-	.4byte	0xdd4
-	.4byte	.LLST364
-	.uleb128 0x55
-	.4byte	.LASF808
-	.byte	0x4
-	.2byte	0x142
-	.4byte	0x7066
-	.4byte	.LLST365
-	.uleb128 0x4e
-	.4byte	.LASF809
-	.byte	0x4
-	.2byte	0x158
-	.uleb128 0x45
-	.8byte	.LVL1549
-	.4byte	0x72c0
-	.uleb128 0x45
-	.8byte	.LVL1550
-	.4byte	0x706c
-	.uleb128 0x34
-	.8byte	.LVL1556
-	.4byte	0x7522
-	.4byte	0x6eb7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1557
-	.4byte	0x26b8
-	.4byte	0x6ecf
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1558
-	.4byte	0x75b1
-	.4byte	0x6ee7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1564
-	.4byte	0x298f
-	.4byte	0x6f09
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1565
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL1567
-	.4byte	0x75b1
-	.4byte	0x6f2e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1569
-	.4byte	0x25fc
-	.4byte	0x6f46
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1570
-	.4byte	0x747e
-	.uleb128 0x45
-	.8byte	.LVL1572
-	.4byte	0x7522
-	.uleb128 0x34
-	.8byte	.LVL1573
-	.4byte	0x258a
-	.4byte	0x6f7c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1574
-	.4byte	0x258a
-	.4byte	0x6f9a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x1000
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1576
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL1577
-	.4byte	0x270c
-	.4byte	0x6fc9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1578
-	.4byte	0x27d2
-	.4byte	0x6ff0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1579
-	.4byte	0x75b1
-	.4byte	0x7008
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1585
-	.4byte	0x75b1
-	.uleb128 0x34
-	.8byte	.LVL1589
-	.4byte	0x270c
-	.4byte	0x7031
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x32
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1590
-	.4byte	0x75b1
-	.uleb128 0x45
-	.8byte	.LVL1591
-	.4byte	0x75b1
-	.uleb128 0x45
-	.8byte	.LVL1592
-	.4byte	0x7304
-	.uleb128 0x45
-	.8byte	.LVL1594
-	.4byte	0x7304
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0x11c8
-	.uleb128 0x49
-	.4byte	.LASF810
-	.byte	0x4
-	.2byte	0x116
-	.4byte	0x5b
-	.8byte	.LFB230
-	.8byte	.LFE230-.LFB230
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x70e9
-	.uleb128 0x54
-	.string	"die"
-	.byte	0x4
-	.2byte	0x118
-	.4byte	0xdd4
-	.4byte	.LLST151
-	.uleb128 0x54
-	.string	"blk"
-	.byte	0x4
-	.2byte	0x119
-	.4byte	0xdc9
-	.4byte	.LLST152
-	.uleb128 0x4c
-	.4byte	.LASF811
-	.byte	0x4
-	.2byte	0x11a
-	.4byte	0xdd4
-	.uleb128 0x55
-	.4byte	.LASF808
-	.byte	0x4
-	.2byte	0x11b
-	.4byte	0x7066
-	.4byte	.LLST153
-	.uleb128 0x36
-	.8byte	.LVL593
-	.4byte	0x298f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF812
-	.byte	0x4
-	.byte	0xac
-	.4byte	0x5b
-	.8byte	.LFB229
-	.8byte	.LFE229-.LFB229
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7257
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x4
-	.byte	0xae
-	.4byte	0xdd4
-	.4byte	.LLST358
-	.uleb128 0x33
-	.string	"blk"
-	.byte	0x4
-	.byte	0xaf
-	.4byte	0xdc9
-	.4byte	.LLST359
-	.uleb128 0x32
-	.4byte	.LASF705
-	.byte	0x4
-	.byte	0xb0
-	.4byte	0xdea
-	.4byte	.LLST360
-	.uleb128 0x32
-	.4byte	.LASF808
-	.byte	0x4
-	.byte	0xb1
-	.4byte	0x7066
-	.4byte	.LLST361
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x7267
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6366
-	.uleb128 0x45
-	.8byte	.LVL1525
-	.4byte	0x72c0
-	.uleb128 0x34
-	.8byte	.LVL1527
-	.4byte	0x298f
-	.4byte	0x7186
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1528
-	.4byte	0x298f
-	.4byte	0x71a8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1530
-	.4byte	0x298f
-	.4byte	0x71d1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1531
-	.4byte	0x6c07
-	.4byte	0x71e8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1533
-	.4byte	0xa94f
-	.4byte	0x721a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR164
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xfe
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1534
-	.4byte	0x8a94
-	.uleb128 0x34
-	.8byte	.LVL1542
-	.4byte	0x298f
-	.4byte	0x7249
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1547
-	.4byte	0x2512
-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x7267
-	.uleb128 0xe
-	.4byte	0xda
-	.byte	0xa
-	.byte	0
-	.uleb128 0x7
-	.4byte	0x7257
-	.uleb128 0x2d
-	.4byte	.LASF813
-	.byte	0x4
-	.byte	0x9c
-	.4byte	0xdc9
-	.8byte	.LFB228
-	.8byte	.LFE228-.LFB228
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x72c0
-	.uleb128 0x33
-	.string	"blk"
-	.byte	0x4
-	.byte	0x9e
-	.4byte	0xdc9
-	.4byte	.LLST20
-	.uleb128 0x32
-	.4byte	.LASF814
-	.byte	0x4
-	.byte	0x9f
-	.4byte	0xdc9
-	.4byte	.LLST21
-	.uleb128 0x36
-	.8byte	.LVL53
-	.4byte	0x7522
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF815
-	.byte	0x4
-	.byte	0x94
-	.8byte	.LFB227
-	.8byte	.LFE227-.LFB227
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7304
-	.uleb128 0x2f
-	.8byte	.LVL808
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR37+12
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF816
-	.byte	0x4
-	.byte	0x4f
-	.4byte	0x5b
-	.8byte	.LFB226
-	.8byte	.LFE226-.LFB226
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x747e
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x4
-	.byte	0x51
-	.4byte	0x5b
-	.4byte	.LLST307
-	.uleb128 0x32
-	.4byte	.LASF817
-	.byte	0x4
-	.byte	0x52
-	.4byte	0x5b
-	.4byte	.LLST308
-	.uleb128 0x32
-	.4byte	.LASF808
-	.byte	0x4
-	.byte	0x53
-	.4byte	0x7066
-	.4byte	.LLST309
-	.uleb128 0x32
-	.4byte	.LASF721
-	.byte	0x4
-	.byte	0x54
-	.4byte	0xdc9
-	.4byte	.LLST310
-	.uleb128 0x58
-	.4byte	.LASF818
-	.byte	0x4
-	.byte	0x67
-	.uleb128 0x69
-	.4byte	.LASF573
-	.4byte	0x298a
-	.uleb128 0x34
-	.8byte	.LVL1247
-	.4byte	0x258a
-	.4byte	0x7387
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1250
-	.4byte	0x258a
-	.4byte	0x73aa
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8b
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1252
-	.4byte	0xa94f
-	.4byte	0x73c2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1253
-	.4byte	0x27d2
-	.4byte	0x73e9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1254
-	.4byte	0x270c
-	.4byte	0x7405
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1255
-	.4byte	0x27d2
-	.4byte	0x742c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1257
-	.4byte	0xa94f
-	.4byte	0x744b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC98
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1258
-	.4byte	0xa94f
-	.4byte	0x7470
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC99
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1261
-	.4byte	0x2512
-	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF819
-	.byte	0x4
-	.byte	0x41
-	.8byte	.LFB225
-	.8byte	.LFE225-.LFB225
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x751a
-	.uleb128 0x2e
-	.4byte	.LASF753
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x10f8
-	.4byte	.LLST202
-	.uleb128 0x2e
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x41
-	.4byte	0x1001
-	.4byte	.LLST203
-	.uleb128 0x39
-	.string	"i"
-	.byte	0x4
-	.byte	0x43
-	.4byte	0xdd4
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x4239
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6323
-	.uleb128 0x34
-	.8byte	.LVL804
-	.4byte	0x258a
-	.4byte	0x74f2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL805
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x4a
-	.byte	0
-	.byte	0
-	.uleb128 0x6a
-	.4byte	.LASF821
-	.byte	0x4
-	.byte	0x26
-	.byte	0x1
-	.uleb128 0x2d
-	.4byte	.LASF822
-	.byte	0x4
-	.byte	0x17
-	.4byte	0x5b
-	.8byte	.LFB223
-	.8byte	.LFE223-.LFB223
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x75b1
-	.uleb128 0x2e
-	.4byte	.LASF388
-	.byte	0x4
-	.byte	0x17
-	.4byte	0xdc9
-	.4byte	.LLST16
-	.uleb128 0x33
-	.string	"die"
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-	.byte	0x19
-	.4byte	0xdd4
-	.4byte	.LLST17
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x4
-	.byte	0x1a
-	.4byte	0xdd4
-	.4byte	.LLST18
-	.uleb128 0x2b
-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x1b
-	.4byte	0x1001
-	.uleb128 0x27
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.8byte	gBbtInfo
-	.byte	0x22
-	.uleb128 0x32
-	.4byte	.LASF581
-	.byte	0x4
-	.byte	0x1c
-	.4byte	0xdc9
-	.4byte	.LLST19
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF823
-	.byte	0x4
-	.byte	0x4
-	.4byte	0x5b
-	.8byte	.LFB222
-	.8byte	.LFE222-.LFB222
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7635
-	.uleb128 0x2e
-	.4byte	.LASF388
-	.byte	0x4
-	.byte	0x4
-	.4byte	0xdc9
-	.4byte	.LLST12
-	.uleb128 0x33
-	.string	"die"
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-	.byte	0x6
-	.4byte	0xdd4
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-	.4byte	.LASF820
-	.byte	0x4
-	.byte	0x7
-	.4byte	0x1001
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-	.4byte	.LASF581
-	.byte	0x4
-	.byte	0x8
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-	.uleb128 0x36
-	.8byte	.LVL44
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x9
-	.byte	0x3
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0
-	.byte	0
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-	.byte	0x3
-	.2byte	0x499
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-	.uleb128 0x1
-	.byte	0x9c
-	.uleb128 0x49
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-	.4byte	0x76ce
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x94
-	.byte	0x4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1999
-	.4byte	0xa94f
-	.4byte	0x7aa9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3dc
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2000
-	.4byte	0x3903
-	.4byte	0x7ac8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR52
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2002
-	.4byte	0x3903
-	.4byte	0x7ae0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2004
-	.4byte	0x3903
-	.4byte	0x7af8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2007
-	.4byte	0xa94f
-	.4byte	0x7b2b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x3fd
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2010
-	.4byte	0x7caf
-	.4byte	0x7b4e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2011
-	.4byte	0xa94f
-	.4byte	0x7b81
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x44a
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2014
-	.4byte	0x3903
-	.4byte	0x7b99
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2017
-	.4byte	0x5c1c
-	.4byte	0x7bbd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 380
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2018
-	.4byte	0x37d5
-	.4byte	0x7bd5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2022
-	.4byte	0x258a
-	.4byte	0x7bf2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2027
-	.4byte	0xa94f
-	.4byte	0x7c25
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR178
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x441
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2035
-	.4byte	0x2512
-	.uleb128 0x34
-	.8byte	.LVL2039
-	.4byte	0x258a
-	.4byte	0x7c49
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2045
-	.4byte	0x662a
-	.4byte	0x7c60
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2046
-	.4byte	0x2f5e
-	.uleb128 0x34
-	.8byte	.LVL2047
-	.4byte	0x2d1d
-	.4byte	0x7c89
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL2048
-	.4byte	0x2d1d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF833
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x5b
-	.byte	0x1
-	.uleb128 0x5f
-	.4byte	.LASF834
-	.byte	0x3
-	.2byte	0x387
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7ee3
-	.uleb128 0x5d
-	.string	"req"
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x1abc
-	.4byte	.LLST398
-	.uleb128 0x53
-	.4byte	.LASF595
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdd4
-	.4byte	.LLST399
-	.uleb128 0x53
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0xdd4
-	.4byte	.LLST400
-	.uleb128 0x53
-	.4byte	.LASF639
-	.byte	0x3
-	.2byte	0x387
-	.4byte	0x1eef
-	.4byte	.LLST401
-	.uleb128 0x4d
-	.string	"i"
-	.byte	0x3
-	.2byte	0x389
-	.4byte	0xdd4
-	.uleb128 0x60
-	.string	"ppa"
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-	.2byte	0x38a
-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x55
-	.4byte	.LASF663
-	.byte	0x3
-	.2byte	0x38a
-	.4byte	0xdd4
-	.4byte	.LLST402
-	.uleb128 0x55
-	.4byte	.LASF623
-	.byte	0x3
-	.2byte	0x38b
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-	.uleb128 0x55
-	.4byte	.LASF598
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-	.4byte	0x2dea
-	.4byte	.LLST404
-	.uleb128 0x61
-	.4byte	.LASF687
-	.byte	0x3
-	.2byte	0x38d
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x7ef3
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6231
-	.uleb128 0x34
-	.8byte	.LVL1746
-	.4byte	0x27d2
-	.4byte	0x7d9a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 -4
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
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-	.8byte	.LVL1747
-	.4byte	0x6d33
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-	.8byte	.LVL1749
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.byte	0
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-	.8byte	.LVL1750
-	.4byte	0x2ebc
-	.uleb128 0x34
-	.8byte	.LVL1751
-	.4byte	0x37d5
-	.4byte	0x7de4
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1752
-	.4byte	0x27d2
-	.4byte	0x7e06
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1753
-	.4byte	0xa94f
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR170
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
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-	.uleb128 0x34
-	.8byte	.LVL1754
-	.4byte	0x5c1c
-	.4byte	0x7e57
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
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-	.uleb128 0x34
-	.8byte	.LVL1756
-	.4byte	0x6d33
-	.4byte	0x7e71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x73
-	.sleb128 0
-	.byte	0x3a
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-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1758
-	.4byte	0xa94f
-	.4byte	0x7e9b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC106
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1759
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1761
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
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-	.8byte	.LANCHOR170
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-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
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-	.byte	0
-	.uleb128 0xa
-	.4byte	0xee
-	.4byte	0x7ef3
-	.uleb128 0xe
-	.4byte	0xda
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-	.byte	0
-	.uleb128 0x7
-	.4byte	0x7ee3
-	.uleb128 0x49
-	.4byte	.LASF836
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-	.2byte	0x32d
-	.4byte	0x5b
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-	.8byte	.LFE214-.LFB214
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8111
-	.uleb128 0x5d
-	.string	"LUN"
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-	.4byte	0xdbe
-	.4byte	.LLST424
-	.uleb128 0x53
-	.4byte	.LASF731
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-	.2byte	0x32d
-	.4byte	0xdd4
-	.4byte	.LLST425
-	.uleb128 0x53
-	.4byte	.LASF732
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0xdd4
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-	.uleb128 0x53
-	.4byte	.LASF733
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-	.2byte	0x32d
-	.4byte	0x5ad8
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-	.uleb128 0x54
-	.string	"ret"
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-	.4byte	0x5b
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-	.4byte	.LASF828
-	.byte	0x3
-	.2byte	0x330
-	.4byte	0xdd4
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-	.uleb128 0x55
-	.4byte	.LASF829
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-	.2byte	0x330
-	.4byte	0xdd4
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-	.4byte	.LASF837
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-	.4byte	0xdd4
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-	.uleb128 0x54
-	.string	"lpa"
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-	.4byte	0xdd4
-	.4byte	.LLST432
-	.uleb128 0x60
-	.string	"ppa"
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-	.4byte	0xdd4
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x54
-	.string	"n"
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-	.uleb128 0x55
-	.4byte	.LASF595
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-	.2byte	0x333
-	.4byte	0xdd4
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-	.uleb128 0x55
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-	.byte	0x3
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-	.4byte	0xdd4
-	.4byte	.LLST435
-	.uleb128 0x55
-	.4byte	.LASF838
-	.byte	0x3
-	.2byte	0x334
-	.4byte	0xdd4
-	.4byte	.LLST436
-	.uleb128 0x55
-	.4byte	.LASF839
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-	.4byte	.LLST437
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-	.uleb128 0x55
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-	.uleb128 0x63
-	.8byte	.LBB332
-	.8byte	.LBE332-.LBB332
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-	.uleb128 0x55
-	.4byte	.LASF586
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-	.8byte	.LVL1973
-	.4byte	0x6d33
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-	.8byte	.LVL1974
-	.4byte	0x2f5e
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-	.4byte	0x59b6
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-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x83
-	.sleb128 256
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-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
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-	.uleb128 0x34
-	.8byte	.LVL1945
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x34
-	.8byte	.LVL1950
-	.4byte	0x298f
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1953
-	.4byte	0x2512
-	.uleb128 0x36
-	.8byte	.LVL1960
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF842
-	.byte	0x3
-	.2byte	0x325
-	.4byte	0x5b
-	.8byte	.LFB213
-	.8byte	.LFE213-.LFB213
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8141
-	.uleb128 0x45
-	.8byte	.LVL1688
-	.4byte	0x8141
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF843
-	.byte	0x3
-	.2byte	0x31c
-	.4byte	0x5b
-	.8byte	.LFB212
-	.8byte	.LFE212-.LFB212
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8195
-	.uleb128 0x45
-	.8byte	.LVL1685
-	.4byte	0x5d49
-	.uleb128 0x34
-	.8byte	.LVL1686
-	.4byte	0x594e
-	.4byte	0x8187
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1687
-	.4byte	0x567a
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF844
-	.byte	0x3
-	.2byte	0x2e6
-	.4byte	0x5b
-	.8byte	.LFB211
-	.8byte	.LFE211-.LFB211
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x82a7
-	.uleb128 0x2a
-	.4byte	.LASF845
-	.byte	0x3
-	.2byte	0x2e8
-	.4byte	0x82a7
-	.uleb128 0xa
-	.byte	0x3
-	.8byte	g_nand_phy_info
-	.byte	0x9f
-	.uleb128 0x59
-	.4byte	.LASF846
-	.byte	0x3
-	.2byte	0x2f3
-	.8byte	.LDL2
-	.uleb128 0x63
-	.8byte	.LBB341
-	.8byte	.LBE341-.LBB341
-	.4byte	0x821a
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x3
-	.2byte	0x310
-	.4byte	0xdd4
-	.4byte	.LLST468
-	.uleb128 0x36
-	.8byte	.LVL2152
-	.4byte	0x2d1d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2144
-	.4byte	0xa94f
-	.4byte	0x8246
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC70
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2145
-	.4byte	0x8a24
-	.4byte	0x8265
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2146
-	.4byte	0x8730
-	.uleb128 0x45
-	.8byte	.LVL2147
-	.4byte	0x8659
-	.uleb128 0x45
-	.8byte	.LVL2148
-	.4byte	0x6b9b
-	.uleb128 0x45
-	.8byte	.LVL2149
-	.4byte	0x70e9
-	.uleb128 0x45
-	.8byte	.LVL2150
-	.4byte	0x3f79
-	.byte	0
-	.uleb128 0x8
-	.byte	0x8
-	.4byte	0xee1
-	.uleb128 0x49
-	.4byte	.LASF847
-	.byte	0x3
-	.2byte	0x26e
-	.4byte	0x5b
-	.8byte	.LFB210
-	.8byte	.LFE210-.LFB210
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8447
-	.uleb128 0x55
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdc9
-	.4byte	.LLST464
-	.uleb128 0x55
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x270
-	.4byte	0xdc9
-	.4byte	.LLST465
-	.uleb128 0x55
-	.4byte	.LASF849
-	.byte	0x3
-	.2byte	0x271
-	.4byte	0xdc9
-	.4byte	.LLST466
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x3
-	.2byte	0x272
-	.4byte	0xdc9
-	.4byte	.LLST467
-	.uleb128 0x59
-	.4byte	.LASF850
-	.byte	0x3
-	.2byte	0x2bc
-	.8byte	.L1620
-	.uleb128 0x59
-	.4byte	.LASF851
-	.byte	0x3
-	.2byte	0x2cc
-	.8byte	.L1622
-	.uleb128 0x45
-	.8byte	.LVL2103
-	.4byte	0x6b9b
-	.uleb128 0x45
-	.8byte	.LVL2104
-	.4byte	0x70e9
-	.uleb128 0x45
-	.8byte	.LVL2105
-	.4byte	0x6e1b
-	.uleb128 0x45
-	.8byte	.LVL2113
-	.4byte	0x7304
-	.uleb128 0x34
-	.8byte	.LVL2114
-	.4byte	0x258a
-	.4byte	0x8378
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2116
-	.4byte	0x258a
-	.4byte	0x8390
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2117
-	.4byte	0x45ef
-	.4byte	0x83a8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2123
-	.4byte	0x8447
-	.4byte	0x83bf
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2128
-	.4byte	0x8a94
-	.uleb128 0x45
-	.8byte	.LVL2129
-	.4byte	0x6b9b
-	.uleb128 0x34
-	.8byte	.LVL2132
-	.4byte	0x8447
-	.4byte	0x83f0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2135
-	.4byte	0x8447
-	.4byte	0x8407
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2139
-	.4byte	0x45ef
-	.4byte	0x841f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2140
-	.4byte	0x6976
-	.uleb128 0x45
-	.8byte	.LVL2141
-	.4byte	0x567a
-	.uleb128 0x45
-	.8byte	.LVL2142
-	.4byte	0x3f79
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF852
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0x5b
-	.8byte	.LFB209
-	.8byte	.LFE209-.LFB209
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x862f
-	.uleb128 0x53
-	.4byte	.LASF717
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdc9
-	.4byte	.LLST181
-	.uleb128 0x53
-	.4byte	.LASF853
-	.byte	0x3
-	.2byte	0x20f
-	.4byte	0xdbe
-	.4byte	.LLST182
-	.uleb128 0x55
-	.4byte	.LASF848
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdc9
-	.4byte	.LLST183
-	.uleb128 0x55
-	.4byte	.LASF568
-	.byte	0x3
-	.2byte	0x211
-	.4byte	0xdc9
-	.4byte	.LLST184
-	.uleb128 0x55
-	.4byte	.LASF594
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdc9
-	.4byte	.LLST185
-	.uleb128 0x55
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x212
-	.4byte	0xdc9
-	.4byte	.LLST186
-	.uleb128 0x55
-	.4byte	.LASF854
-	.byte	0x3
-	.2byte	0x213
-	.4byte	0xdc9
-	.4byte	.LLST187
-	.uleb128 0x55
-	.4byte	.LASF855
-	.byte	0x3
-	.2byte	0x214
-	.4byte	0xdc9
-	.4byte	.LLST188
-	.uleb128 0x55
-	.4byte	.LASF856
-	.byte	0x3
-	.2byte	0x215
-	.4byte	0xdc9
-	.4byte	.LLST189
-	.uleb128 0x55
-	.4byte	.LASF857
-	.byte	0x3
-	.2byte	0x216
-	.4byte	0xdc9
-	.4byte	.LLST190
-	.uleb128 0x59
-	.4byte	.LASF858
-	.byte	0x3
-	.2byte	0x240
-	.8byte	.L430
-	.uleb128 0x34
-	.8byte	.LVL671
-	.4byte	0x270c
-	.4byte	0x8530
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL674
-	.4byte	0x75b1
-	.uleb128 0x34
-	.8byte	.LVL680
-	.4byte	0x27d2
-	.4byte	0x8560
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL684
-	.4byte	0x75b1
-	.uleb128 0x34
-	.8byte	.LVL688
-	.4byte	0x6b48
-	.4byte	0x8584
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL689
-	.4byte	0x270c
-	.4byte	0x85a2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL693
-	.4byte	0x6dce
-	.4byte	0x85ba
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL695
-	.4byte	0x862f
-	.4byte	0x85d2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL696
-	.4byte	0x7522
-	.4byte	0x85ea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7e
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL707
-	.4byte	0x6dce
-	.4byte	0x8602
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL709
-	.4byte	0x862f
-	.4byte	0x861a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL710
-	.4byte	0x7522
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x7d
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x4a
-	.4byte	.LASF859
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0x5b
-	.byte	0x1
-	.4byte	0x8659
-	.uleb128 0x4b
-	.4byte	.LASF388
-	.byte	0x3
-	.2byte	0x201
-	.4byte	0xdc9
-	.uleb128 0x4c
-	.4byte	.LASF860
-	.byte	0x3
-	.2byte	0x203
-	.4byte	0xdc9
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF861
-	.byte	0x3
-	.2byte	0x1ed
-	.4byte	0x5b
-	.8byte	.LFB207
-	.8byte	.LFE207-.LFB207
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8730
-	.uleb128 0x34
-	.8byte	.LVL1112
-	.4byte	0x258a
-	.4byte	0x8692
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1113
-	.4byte	0x258a
-	.4byte	0x86a9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1114
-	.4byte	0x258a
-	.4byte	0x86c0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1115
-	.4byte	0x258a
-	.4byte	0x86ea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR39
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1116
-	.4byte	0x258a
-	.4byte	0x8715
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR81
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x200
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1117
-	.4byte	0x3666
-	.uleb128 0x45
-	.8byte	.LVL1118
-	.4byte	0x4f6c
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF862
-	.byte	0x3
-	.2byte	0x117
-	.4byte	0x5b
-	.8byte	.LFB206
-	.8byte	.LFE206-.LFB206
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8a24
-	.uleb128 0x54
-	.string	"i"
-	.byte	0x3
-	.2byte	0x119
-	.4byte	0xdd4
-	.4byte	.LLST200
-	.uleb128 0x55
-	.4byte	.LASF863
-	.byte	0x3
-	.2byte	0x11a
-	.4byte	0xdd4
-	.4byte	.LLST201
-	.uleb128 0x3f
-	.4byte	.LASF573
-	.4byte	0x7267
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	__func__.6107
-	.uleb128 0x45
-	.8byte	.LVL743
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL744
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL746
-	.4byte	0x2c16
-	.4byte	0x87b5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL747
-	.4byte	0x2c16
-	.4byte	0x87cd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL748
-	.4byte	0x2c16
-	.4byte	0x87e5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL749
-	.4byte	0x2c16
-	.4byte	0x87fd
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL750
-	.4byte	0x2c16
-	.4byte	0x8815
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL753
-	.4byte	0x2c16
-	.4byte	0x882d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL754
-	.4byte	0x2c16
-	.4byte	0x8845
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL755
-	.4byte	0x2c16
-	.4byte	0x885d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL756
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL757
-	.4byte	0x2c16
-	.4byte	0x8882
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL758
-	.4byte	0x2c16
-	.4byte	0x889a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL760
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL762
-	.4byte	0x2c16
-	.4byte	0x88bf
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL763
-	.4byte	0x2c16
-	.4byte	0x88d9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x4
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL765
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL766
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL767
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL769
-	.4byte	0x2c16
-	.4byte	0x8918
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8c
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL771
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL773
-	.4byte	0x2c16
-	.4byte	0x893d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL774
-	.4byte	0x2c16
-	.4byte	0x8955
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL775
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL776
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL777
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL778
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL779
-	.4byte	0x2c16
-	.uleb128 0x34
-	.8byte	.LVL780
-	.4byte	0x258a
-	.4byte	0x89ad
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL782
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL784
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL787
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL790
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL793
-	.4byte	0x2c16
-	.uleb128 0x45
-	.8byte	.LVL797
-	.4byte	0x2c16
-	.uleb128 0x36
-	.8byte	.LVL800
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC85
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR138
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF864
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x5b
-	.8byte	.LFB205
-	.8byte	.LFE205-.LFB205
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8a94
-	.uleb128 0x2e
-	.4byte	.LASF845
-	.byte	0x3
-	.byte	0xb7
-	.4byte	0x82a7
-	.4byte	.LLST8
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x3
-	.byte	0xb9
-	.4byte	0xdd4
-	.4byte	.LLST9
-	.uleb128 0x45
-	.8byte	.LVL30
-	.4byte	0x8add
-	.uleb128 0x34
-	.8byte	.LVL31
-	.4byte	0x8add
-	.4byte	0x8a86
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL33
-	.4byte	0x8a94
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF865
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0x5b
-	.8byte	.LFB204
-	.8byte	.LFE204-.LFB204
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8ac5
-	.uleb128 0x2e
-	.4byte	.LASF866
-	.byte	0x3
-	.byte	0xa5
-	.4byte	0xdc9
-	.4byte	.LLST7
-	.byte	0
-	.uleb128 0x65
-	.4byte	.LASF867
-	.byte	0x3
-	.byte	0x9f
-	.byte	0x1
-	.4byte	0x8add
-	.uleb128 0x38
-	.4byte	.LASF868
-	.byte	0x3
-	.byte	0x9f
-	.4byte	0xdd4
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF869
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdc9
-	.8byte	.LFB202
-	.8byte	.LFE202-.LFB202
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8b2a
-	.uleb128 0x31
-	.string	"num"
-	.byte	0x3
-	.byte	0x7f
-	.4byte	0xdd4
-	.4byte	.LLST4
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x3
-	.byte	0x81
-	.4byte	0xdc9
-	.4byte	.LLST5
-	.uleb128 0x32
-	.4byte	.LASF870
-	.byte	0x3
-	.byte	0x82
-	.4byte	0xdd4
-	.4byte	.LLST6
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF871
-	.byte	0x3
-	.byte	0x71
-	.4byte	0x5b
-	.8byte	.LFB201
-	.8byte	.LFE201-.LFB201
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x8bb0
-	.uleb128 0x2e
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0x71
-	.4byte	0xfa
-	.4byte	.LLST102
-	.uleb128 0x33
-	.string	"buf"
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-	.byte	0x73
-	.4byte	0xfa
-	.4byte	.LLST103
-	.uleb128 0x34
-	.8byte	.LVL445
-	.4byte	0xa971
-	.4byte	0x8b9b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC70
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL447
-	.4byte	0x8bb0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x2d
-	.4byte	.LASF872
-	.byte	0x3
-	.byte	0xb
-	.4byte	0x5b
-	.8byte	.LFB200
-	.8byte	.LFE200-.LFB200
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x963e
-	.uleb128 0x2e
-	.4byte	.LASF299
-	.byte	0x3
-	.byte	0xb
-	.4byte	0xfa
-	.4byte	.LLST97
-	.uleb128 0x33
-	.string	"i"
-	.byte	0x3
-	.byte	0xd
-	.4byte	0x5b
-	.4byte	.LLST98
-	.uleb128 0x33
-	.string	"buf"
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-	.byte	0xe
-	.4byte	0xfa
-	.4byte	.LLST99
-	.uleb128 0x63
-	.8byte	.LBB217
-	.8byte	.LBE217-.LBB217
-	.4byte	0x8c58
-	.uleb128 0x32
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x57
-	.4byte	0xdc9
-	.4byte	.LLST100
-	.uleb128 0x34
-	.8byte	.LVL430
-	.4byte	0x662a
-	.4byte	0x8c37
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL434
-	.4byte	0xa971
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 -1
-	.byte	0
-	.byte	0
-	.uleb128 0x63
-	.8byte	.LBB218
-	.8byte	.LBE218-.LBB218
-	.4byte	0x8c9d
-	.uleb128 0x32
-	.4byte	.LASF586
-	.byte	0x3
-	.byte	0x60
-	.4byte	0xdc9
-	.4byte	.LLST101
-	.uleb128 0x36
-	.8byte	.LVL441
-	.4byte	0xa971
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 -1
-	.byte	0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL293
-	.4byte	0xa971
-	.4byte	0x8cc2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC2
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL295
-	.4byte	0xa971
-	.4byte	0x8ce7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC3
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL297
-	.4byte	0xa971
-	.4byte	0x8d0c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC4
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL299
-	.4byte	0xa971
-	.4byte	0x8d31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC5
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL301
-	.4byte	0xa971
-	.4byte	0x8d56
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC6
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL303
-	.4byte	0xa971
-	.4byte	0x8d7b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC7
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL305
-	.4byte	0xa971
-	.4byte	0x8da0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC8
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL307
-	.4byte	0xa971
-	.4byte	0x8dc5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC9
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL309
-	.4byte	0xa971
-	.4byte	0x8dea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC10
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL311
-	.4byte	0xa971
-	.4byte	0x8e0f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC11
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL313
-	.4byte	0xa971
-	.4byte	0x8e34
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC12
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL315
-	.4byte	0xa971
-	.4byte	0x8e59
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC13
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL317
-	.4byte	0xa971
-	.4byte	0x8e7e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC14
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL319
-	.4byte	0xa971
-	.4byte	0x8ea3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC15
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL321
-	.4byte	0xa971
-	.4byte	0x8ec8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC16
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL323
-	.4byte	0xa971
-	.4byte	0x8eed
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC17
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL325
-	.4byte	0xa971
-	.4byte	0x8f12
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC18
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL327
-	.4byte	0xa971
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC19
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL329
-	.4byte	0xa971
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC20
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL331
-	.4byte	0xa971
-	.4byte	0x8f81
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC21
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL333
-	.4byte	0xa971
-	.4byte	0x8fa6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC22
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL335
-	.4byte	0xa971
-	.4byte	0x8fcb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC23
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL337
-	.4byte	0xa971
-	.4byte	0x8ff0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC24
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL339
-	.4byte	0xa971
-	.4byte	0x9015
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC25
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL341
-	.4byte	0xa971
-	.4byte	0x903a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC26
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL343
-	.4byte	0xa971
-	.4byte	0x905f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC27
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL345
-	.4byte	0xa971
-	.4byte	0x9084
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC28
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL347
-	.4byte	0xa971
-	.4byte	0x90a9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC29
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL349
-	.4byte	0xa971
-	.4byte	0x90ce
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL351
-	.4byte	0xa971
-	.4byte	0x90f3
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL353
-	.4byte	0xa971
-	.4byte	0x9118
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC32
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL355
-	.4byte	0xa971
-	.4byte	0x913d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC33
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL357
-	.4byte	0xa971
-	.4byte	0x9162
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC34
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL359
-	.4byte	0xa971
-	.4byte	0x9187
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC35
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL361
-	.4byte	0xa971
-	.4byte	0x91ac
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC36
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL363
-	.4byte	0xa971
-	.4byte	0x91d1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC37
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL365
-	.4byte	0xa971
-	.4byte	0x91f6
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC38
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL367
-	.4byte	0xa971
-	.4byte	0x921b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC39
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL369
-	.4byte	0xa971
-	.4byte	0x9240
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL371
-	.4byte	0xa971
-	.4byte	0x9265
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC41
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL373
-	.4byte	0xa971
-	.4byte	0x928a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC42
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL375
-	.4byte	0xa971
-	.4byte	0x92af
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC43
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL377
-	.4byte	0xa971
-	.4byte	0x92d4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC44
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL379
-	.4byte	0xa971
-	.4byte	0x92f9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC45
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL381
-	.4byte	0xa971
-	.4byte	0x931e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC46
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL383
-	.4byte	0xa971
-	.4byte	0x9343
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC47
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL385
-	.4byte	0xa971
-	.4byte	0x9368
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC48
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL387
-	.4byte	0xa971
-	.4byte	0x938d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC49
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL389
-	.4byte	0xa971
-	.4byte	0x93b2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC50
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL391
-	.4byte	0xa971
-	.4byte	0x93d7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC51
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL393
-	.4byte	0xa971
-	.4byte	0x93fc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC52
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL395
-	.4byte	0xa971
-	.4byte	0x9421
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC53
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL397
-	.4byte	0xa971
-	.4byte	0x9446
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC54
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL399
-	.4byte	0xa971
-	.4byte	0x946b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC55
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL401
-	.4byte	0xa971
-	.4byte	0x9490
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC56
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL403
-	.4byte	0xa971
-	.4byte	0x94b5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC57
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL405
-	.4byte	0xa971
-	.4byte	0x94da
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC58
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL407
-	.4byte	0xa971
-	.4byte	0x94ff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC59
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL409
-	.4byte	0xa971
-	.4byte	0x9524
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC60
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL411
-	.4byte	0xa971
-	.4byte	0x9549
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC61
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL413
-	.4byte	0xa971
-	.4byte	0x956e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC62
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL415
-	.4byte	0xa971
-	.4byte	0x9593
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC63
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL417
-	.4byte	0xa971
-	.4byte	0x95b8
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC64
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL419
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-	.8byte	.LVL420
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-	.4byte	0x95ea
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC65
-	.byte	0
-	.uleb128 0x45
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-	.4byte	0x3e5d
-	.uleb128 0x34
-	.8byte	.LVL423
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC66
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL428
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-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
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-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC67
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x2a88
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-	.8byte	.LFE349-.LFB349
-	.uleb128 0x1
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-	.4byte	0x96a0
-	.uleb128 0x6d
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-	.uleb128 0x1
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-	.uleb128 0x6d
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-	.uleb128 0x1
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-	.uleb128 0x6f
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-	.uleb128 0x6f
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x6f
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-	.uleb128 0x6c
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-	.8byte	.LFE355-.LFB355
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-	.uleb128 0x6c
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-	.8byte	.LFE203-.LFB203
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-	.uleb128 0x6d
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-	.uleb128 0x1
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-	.uleb128 0x6c
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-	.8byte	.LFE208-.LFB208
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-	.uleb128 0x6e
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-	.uleb128 0x72
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-	.uleb128 0x6f
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-	.byte	0
-	.byte	0
-	.byte	0
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-	.8byte	.LFE216-.LFB216
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-	.uleb128 0x73
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-	.8byte	.LFE224-.LFB224
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-	.uleb128 0x73
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-	.8byte	.LFE238-.LFB238
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-	.uleb128 0x73
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-	.byte	0x9c
-	.uleb128 0x6c
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-	.uleb128 0x1
-	.byte	0x9c
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-	.uleb128 0x47
-	.4byte	0x6938
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-	.uleb128 0x70
-	.4byte	0x6943
-	.uleb128 0x63
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-	.8byte	.LBE195-.LBB195
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-	.uleb128 0x47
-	.4byte	0x6938
-	.4byte	.LLST44
-	.uleb128 0x74
-	.8byte	.LBB196
-	.8byte	.LBE196-.LBB196
-	.uleb128 0x70
-	.4byte	0x97b8
-	.uleb128 0x2f
-	.8byte	.LVL119
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR46
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xdd
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL117
-	.4byte	0x6882
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0
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-	.uleb128 0x70
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-	.8byte	.LBE199-.LBB199
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-	.uleb128 0x47
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-	.uleb128 0x2f
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.8byte	.LANCHOR49
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.byte	0
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.8byte	.LANCHOR54
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.8byte	.LANCHOR41
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-	.uleb128 0x1
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-	.uleb128 0x2
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-	.uleb128 0x1
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-	.uleb128 0x30
-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.uleb128 0x70
-	.4byte	0x2e38
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x1c0
-	.4byte	0x9e17
-	.uleb128 0x70
-	.4byte	0x9d63
-	.uleb128 0x6f
-	.4byte	0x9d69
-	.4byte	.LLST252
-	.uleb128 0x71
-	.4byte	0x9d6e
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -100
-	.uleb128 0x71
-	.4byte	0x9d73
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x63
-	.8byte	.LBB269
-	.8byte	.LBE269-.LBB269
-	.4byte	0x9dfc
-	.uleb128 0x71
-	.4byte	0x2e49
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x34
-	.8byte	.LVL970
-	.4byte	0x298f
-	.4byte	0x9de1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 96
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL971
-	.4byte	0x6d33
-	.uleb128 0x45
-	.8byte	.LVL972
-	.4byte	0x2f5e
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL969
-	.4byte	0x5c1c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 92
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x74
-	.8byte	.LBB276
-	.8byte	.LBE276-.LBB276
-	.uleb128 0x71
-	.4byte	0x2e57
-	.uleb128 0x12
-	.byte	0x40
-	.byte	0x45
-	.byte	0x24
-	.byte	0x3
-	.8byte	g_max_erase_count
-	.byte	0x94
-	.byte	0x4
-	.byte	0x3a
-	.byte	0x25
-	.byte	0x26
-	.byte	0x9f
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x26b8
-	.8byte	.LFB344
-	.8byte	.LFE344-.LFB344
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9f76
-	.uleb128 0x47
-	.4byte	0x26c8
-	.4byte	.LLST298
-	.uleb128 0x75
-	.4byte	0x26d3
-	.byte	0
-	.uleb128 0x70
-	.4byte	0x26de
-	.uleb128 0x70
-	.4byte	0x26e9
-	.uleb128 0x74
-	.8byte	.LBB281
-	.8byte	.LBE281-.LBB281
-	.uleb128 0x47
-	.4byte	0x26c8
-	.4byte	.LLST299
-	.uleb128 0x74
-	.8byte	.LBB282
-	.8byte	.LBE282-.LBB282
-	.uleb128 0x70
-	.4byte	0x9e66
-	.uleb128 0x71
-	.4byte	0x9e6c
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -64
-	.uleb128 0x71
-	.4byte	0x9e71
-	.uleb128 0x3
-	.byte	0x91
-	.sleb128 -96
-	.uleb128 0x77
-	.4byte	0x26f4
-	.8byte	.LDL1
-	.uleb128 0x34
-	.8byte	.LVL1222
-	.4byte	0x258a
-	.4byte	0x9ee9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 80
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xa5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x20
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1224
-	.4byte	0x258a
-	.4byte	0x9f0c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x5a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x38
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1225
-	.4byte	0x270c
-	.4byte	0x9f2e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1226
-	.4byte	0x27d2
-	.4byte	0x9f55
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1228
-	.4byte	0x270c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8f
-	.sleb128 48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x2e65
-	.8byte	.LFB317
-	.8byte	.LFE317-.LFB317
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa04f
-	.uleb128 0x47
-	.4byte	0x2e76
-	.4byte	.LLST319
-	.uleb128 0x70
-	.4byte	0x2e82
-	.uleb128 0x70
-	.4byte	0x2e8e
-	.uleb128 0x70
-	.4byte	0x2e98
-	.uleb128 0x70
-	.4byte	0x2ea2
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x240
-	.uleb128 0x6e
-	.4byte	0x2e76
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x240
-	.uleb128 0x6f
-	.4byte	0x9f9a
-	.4byte	.LLST320
-	.uleb128 0x71
-	.4byte	0x9f9f
-	.uleb128 0x1
-	.byte	0x64
-	.uleb128 0x6f
-	.4byte	0x9fa4
-	.4byte	.LLST321
-	.uleb128 0x71
-	.4byte	0x9fa9
-	.uleb128 0x1
-	.byte	0x6a
-	.uleb128 0x45
-	.8byte	.LVL1315
-	.4byte	0x2eaf
-	.uleb128 0x34
-	.8byte	.LVL1318
-	.4byte	0x6dce
-	.4byte	0xa002
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1322
-	.4byte	0xa94f
-	.4byte	0xa027
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC100
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1323
-	.4byte	0x75b1
-	.4byte	0xa03f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1324
-	.4byte	0x7304
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3795
-	.8byte	.LFB301
-	.8byte	.LFE301-.LFB301
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa17a
-	.uleb128 0x47
-	.4byte	0x37a6
-	.4byte	.LLST322
-	.uleb128 0x70
-	.4byte	0x37b2
-	.uleb128 0x63
-	.8byte	.LBB295
-	.8byte	.LBE295-.LBB295
-	.4byte	0xa165
-	.uleb128 0x47
-	.4byte	0x37a6
-	.4byte	.LLST323
-	.uleb128 0x74
-	.8byte	.LBB296
-	.8byte	.LBE296-.LBB296
-	.uleb128 0x70
-	.4byte	0xa073
-	.uleb128 0x34
-	.8byte	.LVL1333
-	.4byte	0x6747
-	.4byte	0xa0d1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR41
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1334
-	.4byte	0xa94f
-	.4byte	0xa104
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR158
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xabb
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1335
-	.4byte	0x3d63
-	.4byte	0xa11c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1336
-	.4byte	0x2e65
-	.4byte	0xa134
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1337
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR158
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0xabe
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1340
-	.4byte	0x65ab
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x5829
-	.8byte	.LFB268
-	.8byte	.LFE268-.LFB268
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa273
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x280
-	.uleb128 0x6f
-	.4byte	0x5837
-	.4byte	.LLST326
-	.uleb128 0x71
-	.4byte	0x5843
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -36
-	.uleb128 0x6f
-	.4byte	0x584f
-	.4byte	.LLST327
-	.uleb128 0x71
-	.4byte	0x585b
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -32
-	.uleb128 0x6f
-	.4byte	0x5867
-	.4byte	.LLST328
-	.uleb128 0x34
-	.8byte	.LVL1353
-	.4byte	0x5c1c
-	.4byte	0xa1e9
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 156
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1355
-	.4byte	0x298f
-	.4byte	0xa20c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1359
-	.4byte	0x258a
-	.4byte	0xa224
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1361
-	.4byte	0x37d5
-	.4byte	0xa23c
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x86
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1362
-	.4byte	0x27d2
-	.4byte	0xa264
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 160
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1363
-	.4byte	0x3691
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x44a0
-	.8byte	.LFB286
-	.8byte	.LFE286-.LFB286
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa2b4
-	.uleb128 0x2f
-	.8byte	.LVL1623
-	.4byte	0x5ade
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR81
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x541a
-	.8byte	.LFB271
-	.8byte	.LFE271-.LFB271
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa327
-	.uleb128 0x34
-	.8byte	.LVL1660
-	.4byte	0x59b6
-	.4byte	0xa2e7
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1661
-	.4byte	0xa94f
-	.4byte	0xa313
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC71
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC103
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1662
-	.4byte	0x258a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x311d
-	.8byte	.LFB311
-	.8byte	.LFE311-.LFB311
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa38d
-	.uleb128 0x34
-	.8byte	.LVL1799
-	.4byte	0x3126
-	.4byte	0xa35a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1800
-	.4byte	0x5875
-	.4byte	0xa379
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1801
-	.4byte	0x32fe
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x2d1d
-	.8byte	.LFB319
-	.8byte	.LFE319-.LFB319
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa742
-	.uleb128 0x47
-	.4byte	0x2d2e
-	.4byte	.LLST412
-	.uleb128 0x47
-	.4byte	0x2d3a
-	.4byte	.LLST413
-	.uleb128 0x75
-	.4byte	0x2d46
-	.byte	0x1
-	.uleb128 0x70
-	.4byte	0x2d52
-	.uleb128 0x70
-	.4byte	0x2d5e
-	.uleb128 0x78
-	.4byte	0x2d6a
-	.sleb128 -1
-	.uleb128 0x70
-	.4byte	0x2d76
-	.uleb128 0x70
-	.4byte	0x2d82
-	.uleb128 0x70
-	.4byte	0x2d8e
-	.uleb128 0x70
-	.4byte	0x2d9a
-	.uleb128 0x70
-	.4byte	0x2da6
-	.uleb128 0x70
-	.4byte	0x2db2
-	.uleb128 0x70
-	.4byte	0x2dce
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x330
-	.4byte	0xa72e
-	.uleb128 0x47
-	.4byte	0x2d3a
-	.4byte	.LLST414
-	.uleb128 0x47
-	.4byte	0x2d2e
-	.4byte	.LLST415
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x330
-	.uleb128 0x70
-	.4byte	0xa3ba
-	.uleb128 0x6f
-	.4byte	0xa3c0
-	.4byte	.LLST416
-	.uleb128 0x71
-	.4byte	0xa3c5
-	.uleb128 0x2
-	.byte	0x91
-	.sleb128 -4
-	.uleb128 0x70
-	.4byte	0xa3ca
-	.uleb128 0x6f
-	.4byte	0xa3d0
-	.4byte	.LLST417
-	.uleb128 0x6f
-	.4byte	0xa3d5
-	.4byte	.LLST418
-	.uleb128 0x6f
-	.4byte	0xa3da
-	.4byte	.LLST419
-	.uleb128 0x6f
-	.4byte	0xa3df
-	.4byte	.LLST420
-	.uleb128 0x6f
-	.4byte	0xa3e4
-	.4byte	.LLST421
-	.uleb128 0x6f
-	.4byte	0xa3e9
-	.4byte	.LLST422
-	.uleb128 0x79
-	.4byte	0x2dbe
-	.uleb128 0x79
-	.4byte	0x2dc6
-	.uleb128 0x70
-	.4byte	0xa3ee
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x360
-	.4byte	0xa4f0
-	.uleb128 0x6f
-	.4byte	0x2ddc
-	.4byte	.LLST423
-	.uleb128 0x45
-	.8byte	.LVL1833
-	.4byte	0x3d81
-	.uleb128 0x34
-	.8byte	.LVL1836
-	.4byte	0x662a
-	.4byte	0xa4aa
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x8
-	.byte	0x40
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1839
-	.4byte	0x662a
-	.4byte	0xa4c1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1842
-	.4byte	0x2eaf
-	.uleb128 0x36
-	.8byte	.LVL1851
-	.4byte	0xa94f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC107
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1863
-	.4byte	0x3580
-	.uleb128 0x34
-	.8byte	.LVL1864
-	.4byte	0x45ef
-	.4byte	0xa515
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1866
-	.4byte	0x662a
-	.4byte	0xa52d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1871
-	.4byte	0x2e05
-	.uleb128 0x34
-	.8byte	.LVL1873
-	.4byte	0x662a
-	.4byte	0xa551
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1875
-	.4byte	0x3691
-	.4byte	0xa569
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1880
-	.4byte	0x3580
-	.4byte	0xa581
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1881
-	.4byte	0x3691
-	.4byte	0xa599
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x9
-	.byte	0xff
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1882
-	.4byte	0xa94f
-	.4byte	0xa5cc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x292
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1883
-	.4byte	0xa94f
-	.4byte	0xa5ff
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x293
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1884
-	.4byte	0xa94f
-	.4byte	0xa632
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x294
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1885
-	.4byte	0x45ef
-	.4byte	0xa64a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1886
-	.4byte	0x2e05
-	.uleb128 0x34
-	.8byte	.LVL1900
-	.4byte	0x298f
-	.4byte	0xa66f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x87
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1909
-	.4byte	0xa94f
-	.4byte	0xa6a2
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR175
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x2b8
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL1911
-	.4byte	0x5c1c
-	.4byte	0xa6c0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x8f
-	.sleb128 348
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1912
-	.4byte	0x3078
-	.uleb128 0x34
-	.8byte	.LVL1913
-	.4byte	0x35be
-	.4byte	0xa6eb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x70
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1914
-	.4byte	0x2fb2
-	.uleb128 0x45
-	.8byte	.LVL1918
-	.4byte	0x2fb2
-	.uleb128 0x45
-	.8byte	.LVL1919
-	.4byte	0x3795
-	.uleb128 0x45
-	.8byte	.LVL1920
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL1921
-	.4byte	0x567a
-	.byte	0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL1846
-	.4byte	0x32fe
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x6c
-	.4byte	0x3f79
-	.8byte	.LFB292
-	.8byte	.LFE292-.LFB292
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0xa92c
-	.uleb128 0x75
-	.4byte	0x3f8a
-	.byte	0
-	.uleb128 0x63
-	.8byte	.LBB339
-	.8byte	.LBE339-.LBB339
-	.4byte	0xa896
-	.uleb128 0x70
-	.4byte	0xa75d
-	.uleb128 0x63
-	.8byte	.LBB340
-	.8byte	.LBE340-.LBB340
-	.4byte	0xa79c
-	.uleb128 0x6f
-	.4byte	0x3f95
-	.4byte	.LLST463
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2086
-	.4byte	0x4387
-	.4byte	0xa7b4
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0x4387
-	.4byte	0xa7cc
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2089
-	.4byte	0x5875
-	.4byte	0xa7eb
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR144
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2090
-	.4byte	0x5875
-	.4byte	0xa80a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR149
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2091
-	.4byte	0x5d49
-	.uleb128 0x45
-	.8byte	.LVL2092
-	.4byte	0x567a
-	.uleb128 0x45
-	.8byte	.LVL2093
-	.4byte	0x567a
-	.uleb128 0x45
-	.8byte	.LVL2094
-	.4byte	0x2f5e
-	.uleb128 0x45
-	.8byte	.LVL2095
-	.4byte	0x2f5e
-	.uleb128 0x34
-	.8byte	.LVL2096
-	.4byte	0x3903
-	.4byte	0xa863
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2097
-	.4byte	0x3903
-	.4byte	0xa87b
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2098
-	.4byte	0x423e
-	.uleb128 0x45
-	.8byte	.LVL2102
-	.4byte	0x5d49
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2073
-	.4byte	0x6b9b
-	.uleb128 0x45
-	.8byte	.LVL2074
-	.4byte	0x5427
-	.uleb128 0x45
-	.8byte	.LVL2075
-	.4byte	0x51e2
-	.uleb128 0x45
-	.8byte	.LVL2076
-	.4byte	0x4f21
-	.uleb128 0x45
-	.8byte	.LVL2077
-	.4byte	0x4fc6
-	.uleb128 0x45
-	.8byte	.LVL2078
-	.4byte	0x443f
-	.uleb128 0x45
-	.8byte	.LVL2079
-	.4byte	0x541a
-	.uleb128 0x45
-	.8byte	.LVL2080
-	.4byte	0x6ade
-	.uleb128 0x45
-	.8byte	.LVL2081
-	.4byte	0x44a9
-	.uleb128 0x45
-	.8byte	.LVL2082
-	.4byte	0x46a7
-	.uleb128 0x36
-	.8byte	.LVL2083
-	.4byte	0x592a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.byte	0
-	.uleb128 0x7a
-	.4byte	.LASF873
-	.4byte	.LASF873
-	.byte	0xb
-	.byte	0x72
-	.uleb128 0x7b
-	.4byte	.LASF874
-	.4byte	.LASF874
-	.byte	0x1c
-	.2byte	0x16d
-	.uleb128 0x7b
-	.4byte	.LASF875
-	.4byte	.LASF875
-	.byte	0x1c
-	.2byte	0x16c
-	.uleb128 0x7a
-	.4byte	.LASF876
-	.4byte	.LASF876
-	.byte	0x1d
-	.byte	0x12
-	.uleb128 0x7a
-	.4byte	.LASF877
-	.4byte	.LASF877
-	.byte	0x6
-	.byte	0x35
-	.uleb128 0x7b
-	.4byte	.LASF878
-	.4byte	.LASF878
-	.byte	0x1c
-	.2byte	0x399
-	.uleb128 0x7a
-	.4byte	.LASF879
-	.4byte	.LASF879
-	.byte	0x1e
-	.byte	0x6d
-	.byte	0
-	.section	.debug_abbrev,"",@progbits
-.Ldebug_abbrev0:
-	.uleb128 0x1
-	.uleb128 0x11
-	.byte	0x1
-	.uleb128 0x25
-	.uleb128 0xe
-	.uleb128 0x13
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x1b
-	.uleb128 0xe
-	.uleb128 0x55
-	.uleb128 0x17
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x10
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x2
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0xe
-	.byte	0
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x4
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0x5
-	.uleb128 0x24
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3e
-	.uleb128 0xb
-	.uleb128 0x3
-	.uleb128 0x8
-	.byte	0
-	.byte	0
-	.uleb128 0x6
-	.uleb128 0x16
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0x8
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x7
-	.uleb128 0x26
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x8
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x9
-	.uleb128 0xf
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xa
-	.uleb128 0x1
-	.byte	0x1
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0xb
-	.uleb128 0x21
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xc
-	.uleb128 0x34
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0x5
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x3f
-	.uleb128 0x19
-	.uleb128 0x3c
-	.uleb128 0x19
-	.byte	0
-	.byte	0
-	.uleb128 0xd
-	.uleb128 0x26
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0xe
-	.uleb128 0x21
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x2f
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0xf
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0xb
-	.uleb128 0xb
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x10
-	.uleb128 0xd
-	.byte	0
-	.uleb128 0x3
-	.uleb128 0xe
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
-	.uleb128 0xb
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x38
-	.uleb128 0xb
-	.byte	0
-	.byte	0
-	.uleb128 0x11
-	.uleb128 0x15
-	.byte	0x1
-	.uleb128 0x27
-	.uleb128 0x19
-	.uleb128 0x49
-	.uleb128 0x13
-	.uleb128 0x1
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x12
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x49
-	.uleb128 0x13
-	.byte	0
-	.byte	0
-	.uleb128 0x13
-	.uleb128 0x13
-	.byte	0x1
-	.uleb128 0xb
-	.uleb128 0x5
-	.uleb128 0x3a
-	.uleb128 0xb
-	.uleb128 0x3b
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-	.section	.debug_loc,"",@progbits
-.Ldebug_loc0:
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-	.8byte	.LVL2156-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2156-1
-	.8byte	.LFE348
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0x9f
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-	.8byte	.LVL2156-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL2156-1
-	.8byte	.LFE348
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-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.8byte	0
-	.8byte	0
-.LLST471:
-	.8byte	.LVL2155
-	.8byte	.LVL2156-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL2156-1
-	.8byte	.LFE348
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST304:
-	.8byte	.LVL1244
-	.8byte	.LVL1245-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1245-1
-	.8byte	.LFE347
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST305:
-	.8byte	.LVL1244
-	.8byte	.LVL1245-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1245-1
-	.8byte	.LFE347
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
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-.LLST306:
-	.8byte	.LVL1244
-	.8byte	.LVL1245-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1245-1
-	.8byte	.LFE347
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST197:
-	.8byte	.LVL741
-	.8byte	.LVL742-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL742-1
-	.8byte	.LFE346
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-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST410:
-	.8byte	.LVL1808
-	.8byte	.LVL1809
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1809
-	.8byte	.LVL1810-1
-	.2byte	0x1
-	.byte	0x5b
-	.8byte	.LVL1812
-	.8byte	.LVL1813-1
-	.2byte	0x1
-	.byte	0x5b
-	.8byte	.LVL1816
-	.8byte	.LVL1820
-	.2byte	0x1
-	.byte	0x5b
-	.8byte	.LVL1821
-	.8byte	.LVL1822
-	.2byte	0x1
-	.byte	0x5b
-	.8byte	0
-	.8byte	0
-.LLST411:
-	.8byte	.LVL1817
-	.8byte	.LVL1818
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1818
-	.8byte	.LVL1819-1
-	.2byte	0x17
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x35
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe0
-	.byte	0x1a
-	.byte	0x3
-	.8byte	req_gc_dst
-	.byte	0x6
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x10
-	.8byte	0
-	.8byte	0
-.LLST287:
-	.8byte	.LVL1175
-	.8byte	.LVL1176
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1176
-	.8byte	.LVL1216
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1216
-	.8byte	.LFE310
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST288:
-	.8byte	.LVL1175
-	.8byte	.LVL1178-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1178-1
-	.8byte	.LVL1179
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1179
-	.8byte	.LVL1181
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1181
-	.8byte	.LVL1218
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1218
-	.8byte	.LFE310
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST289:
-	.8byte	.LVL1192
-	.8byte	.LVL1193
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1193
-	.8byte	.LVL1196
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 0
-	.8byte	.LVL1196
-	.8byte	.LVL1197
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 -2
-	.8byte	0
-	.8byte	0
-.LLST290:
-	.8byte	.LVL1184
-	.8byte	.LVL1185
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1185
-	.8byte	.LVL1186-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1191
-	.8byte	.LVL1194
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1195
-	.8byte	.LVL1197
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST291:
-	.8byte	.LVL1186
-	.8byte	.LVL1187
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST292:
-	.8byte	.LVL1184
-	.8byte	.LVL1185
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST293:
-	.8byte	.LVL1183
-	.8byte	.LVL1187
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1190
-	.8byte	.LVL1197
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1200
-	.8byte	.LVL1201
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1201
-	.8byte	.LVL1205-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1206
-	.8byte	.LVL1207
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1209
-	.8byte	.LVL1211-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1214
-	.8byte	.LVL1215
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST294:
-	.8byte	.LVL1177
-	.8byte	.LVL1188
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1190
-	.8byte	.LVL1210
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1212
-	.8byte	.LVL1214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1214
-	.8byte	.LVL1216
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST295:
-	.8byte	.LVL1198
-	.8byte	.LVL1204
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1206
-	.8byte	.LVL1208-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1209
-	.8byte	.LVL1211-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST296:
-	.8byte	.LVL1175
-	.8byte	.LVL1182
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1182
-	.8byte	.LVL1189
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1189
-	.8byte	.LVL1190
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1190
-	.8byte	.LVL1217
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST297:
-	.8byte	.LVL1202
-	.8byte	.LVL1203
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1203
-	.8byte	.LVL1204
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 16
-	.8byte	.LVL1206
-	.8byte	.LVL1207
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1207
-	.8byte	.LVL1208-1
-	.2byte	0x2
-	.byte	0x75
-	.sleb128 16
-	.8byte	0
-	.8byte	0
-.LLST405:
-	.8byte	.LVL1763
-	.8byte	.LVL1765
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1765
-	.8byte	.LVL1766
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1766
-	.8byte	.LVL1768
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1768
-	.8byte	.LFE308
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST406:
-	.8byte	.LVL1777
-	.8byte	.LVL1779
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1779
-	.8byte	.LVL1782
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1785
-	.8byte	.LVL1795
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1796
-	.8byte	.LFE308
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST407:
-	.8byte	.LVL1769
-	.8byte	.LVL1771
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1776
-	.8byte	.LVL1777
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1790
-	.8byte	.LVL1791
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1791
-	.8byte	.LVL1793
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST408:
-	.8byte	.LVL1764
-	.8byte	.LVL1765
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1766
-	.8byte	.LVL1767
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1767
-	.8byte	.LVL1769
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	.LVL1769
-	.8byte	.LVL1770-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1775
-	.8byte	.LVL1776
-	.2byte	0x2
-	.byte	0x32
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST409:
-	.8byte	.LVL1786
-	.8byte	.LVL1797
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST124:
-	.8byte	.LVL524
-	.8byte	.LVL525
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL525
-	.8byte	.LFE307
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST125:
-	.8byte	.LVL524
-	.8byte	.LVL526-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL526-1
-	.8byte	.LFE307
-	.2byte	0x1
-	.byte	0x5a
-	.8byte	0
-	.8byte	0
-.LLST126:
-	.8byte	.LVL524
-	.8byte	.LVL526-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL526-1
-	.8byte	.LFE307
-	.2byte	0x1
-	.byte	0x58
-	.8byte	0
-	.8byte	0
-.LLST127:
-	.8byte	.LVL527
-	.8byte	.LVL530
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL530
-	.8byte	.LVL531
-	.2byte	0x7
-	.byte	0x73
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x75
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL531
-	.8byte	.LVL532
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL532
-	.8byte	.LVL534
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL534
-	.8byte	.LVL535
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST128:
-	.8byte	.LVL527
-	.8byte	.LVL528
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL529
-	.8byte	.LVL533
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST122:
-	.8byte	.LVL520
-	.8byte	.LVL522
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL522
-	.8byte	.LFE306
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST123:
-	.8byte	.LVL520
-	.8byte	.LVL521
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL521
-	.8byte	.LVL523
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST120:
-	.8byte	.LVL514
-	.8byte	.LVL515
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL516
-	.8byte	.LVL517
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST121:
-	.8byte	.LVL512
-	.8byte	.LVL513
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL513
-	.8byte	.LVL518
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL519
-	.8byte	.LFE305
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST118:
-	.8byte	.LVL506
-	.8byte	.LVL507
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL508
-	.8byte	.LVL511
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST119:
-	.8byte	.LVL504
-	.8byte	.LVL505
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL505
-	.8byte	.LVL509
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL510
-	.8byte	.LFE304
-	.2byte	0x1
-	.byte	0x53
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-	.8byte	0
-.LLST117:
-	.8byte	.LVL497
-	.8byte	.LVL498
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL499
-	.8byte	.LVL500
-	.2byte	0x1
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-	.8byte	.LVL501
-	.8byte	.LVL502
-	.2byte	0x1
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-	.8byte	.LVL503
-	.8byte	.LFE303
-	.2byte	0x1
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-	.8byte	0
-	.8byte	0
-.LLST324:
-	.8byte	.LVL1341
-	.8byte	.LVL1342
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1342
-	.8byte	.LVL1346
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1346
-	.8byte	.LFE302
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST325:
-	.8byte	.LVL1341
-	.8byte	.LVL1345
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1347
-	.8byte	.LVL1350
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1350
-	.8byte	.LFE302
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST114:
-	.8byte	.LVL483
-	.8byte	.LVL484
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL484
-	.8byte	.LVL493
-	.2byte	0x1
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-	.8byte	.LVL493
-	.8byte	.LVL494
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL494
-	.8byte	.LFE300
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST115:
-	.8byte	.LVL488
-	.8byte	.LVL490
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL494
-	.8byte	.LVL495
-	.2byte	0x1
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-	.8byte	.LVL496
-	.8byte	.LFE300
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST116:
-	.8byte	.LVL483
-	.8byte	.LVL489
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL489
-	.8byte	.LVL492
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL492
-	.8byte	.LVL494
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL494
-	.8byte	.LFE300
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST396:
-	.8byte	.LVL1729
-	.8byte	.LVL1731
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1731
-	.8byte	.LVL1739
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1739
-	.8byte	.LVL1741
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1741
-	.8byte	.LFE299
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST397:
-	.8byte	.LVL1730
-	.8byte	.LVL1740
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1741
-	.8byte	.LFE299
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST311:
-	.8byte	.LVL1268
-	.8byte	.LVL1269
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1269
-	.8byte	.LVL1309
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1309
-	.8byte	.LFE298
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST312:
-	.8byte	.LVL1276
-	.8byte	.LVL1281
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1282
-	.8byte	.LVL1309
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST313:
-	.8byte	.LVL1284
-	.8byte	.LVL1296
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1297
-	.8byte	.LVL1310
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST314:
-	.8byte	.LVL1288
-	.8byte	.LVL1289
-	.2byte	0x2
-	.byte	0x30
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-	.8byte	.LVL1290
-	.8byte	.LVL1291
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1291
-	.8byte	.LVL1295
-	.2byte	0x1
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-	.8byte	.LVL1301
-	.8byte	.LVL1305
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1305
-	.8byte	.LVL1306
-	.2byte	0x3
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-	.sleb128 1
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-	.8byte	.LVL1307
-	.8byte	.LVL1311
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST315:
-	.8byte	.LVL1290
-	.8byte	.LVL1291
-	.2byte	0x2
-	.byte	0x30
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-	.8byte	.LVL1292-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1301
-	.8byte	.LVL1302
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1302
-	.8byte	.LVL1303
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1303
-	.8byte	.LVL1304-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1304-1
-	.8byte	.LVL1305
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 196
-	.8byte	.LVL1305
-	.8byte	.LVL1307
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST316:
-	.8byte	.LVL1268
-	.8byte	.LVL1270
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1272
-	.8byte	.LVL1273
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1273
-	.8byte	.LVL1274
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1274
-	.8byte	.LVL1275-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST317:
-	.8byte	.LVL1298
-	.8byte	.LVL1300
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST318:
-	.8byte	.LVL1298
-	.8byte	.LVL1300
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST104:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL456
-	.8byte	.LVL465
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL475
-	.8byte	.LVL477
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST105:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL456
-	.8byte	.LVL465
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL465
-	.8byte	.LVL466
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL466
-	.8byte	.LVL471
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL471
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST106:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL456
-	.8byte	.LVL465
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL465
-	.8byte	.LVL469
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL471
-	.8byte	.LVL476
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL477
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST107:
-	.8byte	.LVL465
-	.8byte	.LVL466
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL471
-	.8byte	.LVL474
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL478
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST108:
-	.8byte	.LVL463
-	.8byte	.LVL464
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL464
-	.8byte	.LVL470-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL471
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST109:
-	.8byte	.LVL467
-	.8byte	.LVL470-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST110:
-	.8byte	.LVL452
-	.8byte	.LVL453
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL453
-	.8byte	.LVL454
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL456
-	.8byte	.LVL457
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL458
-	.8byte	.LVL459
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL459
-	.8byte	.LVL461
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST111:
-	.8byte	.LVL451
-	.8byte	.LVL455
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL456
-	.8byte	.LVL465
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL465
-	.8byte	.LVL468-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL471
-	.8byte	.LVL472
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL473
-	.8byte	.LFE296
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST93:
-	.8byte	.LVL280
-	.8byte	.LVL281
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL281
-	.8byte	.LVL283
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL283
-	.8byte	.LVL286
-	.2byte	0x41
-	.byte	0x3
-	.8byte	g_num_free_superblocks
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x37
-	.byte	0x1e
-	.byte	0x33
-	.byte	0x26
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x3
-	.8byte	g_num_free_superblocks
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x37
-	.byte	0x1e
-	.byte	0x33
-	.byte	0x26
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x2b
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL286
-	.8byte	.LVL289
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL289
-	.8byte	.LFE295
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST94:
-	.8byte	.LVL280
-	.8byte	.LVL285
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL285
-	.8byte	.LVL286
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL286
-	.8byte	.LVL290
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL290
-	.8byte	.LFE295
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST95:
-	.8byte	.LVL282
-	.8byte	.LVL284
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL286
-	.8byte	.LVL289
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST96:
-	.8byte	.LVL282
-	.8byte	.LVL287
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL288
-	.8byte	.LVL289
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST92:
-	.8byte	.LVL276
-	.8byte	.LVL277
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL277
-	.8byte	.LVL278
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL278
-	.8byte	.LVL279
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL279
-	.8byte	.LFE294
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST88:
-	.8byte	.LVL262
-	.8byte	.LVL263
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL263
-	.8byte	.LVL266
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL266
-	.8byte	.LFE293
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST89:
-	.8byte	.LVL262
-	.8byte	.LVL264
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL264
-	.8byte	.LVL273
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL273
-	.8byte	.LVL274
-	.2byte	0x3
-	.byte	0x77
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL274
-	.8byte	.LFE293
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST90:
-	.8byte	.LVL270
-	.8byte	.LVL271-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST91:
-	.8byte	.LVL262
-	.8byte	.LVL264
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL264
-	.8byte	.LVL268
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL269
-	.8byte	.LVL272
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL273
-	.8byte	.LFE293
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST250:
-	.8byte	.LVL958
-	.8byte	.LVL959
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL960
-	.8byte	.LFE291
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST251:
-	.8byte	.LVL963
-	.8byte	.LVL965
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST282:
-	.8byte	.LVL1148
-	.8byte	.LVL1149
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1151
-	.8byte	.LVL1152
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1160
-	.8byte	.LVL1163
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1164
-	.8byte	.LVL1165
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1165
-	.8byte	.LVL1170
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1171
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST283:
-	.8byte	.LVL1146
-	.8byte	.LVL1147
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1155
-	.8byte	.LVL1160
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST284:
-	.8byte	.LVL1151
-	.8byte	.LVL1152
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1157
-	.8byte	.LVL1158
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1165
-	.8byte	.LVL1168
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1169
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST285:
-	.8byte	.LVL1144
-	.8byte	.LVL1148
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1148
-	.8byte	.LVL1153
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1153
-	.8byte	.LVL1154
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL1155
-	.8byte	.LVL1160
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1160
-	.8byte	.LVL1166
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1167
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST286:
-	.8byte	.LVL1150
-	.8byte	.LVL1152
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1165
-	.8byte	.LFE290
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST393:
-	.8byte	.LVL1715
-	.8byte	.LVL1716
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1722
-	.8byte	.LVL1727
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1728
-	.8byte	.LFE289
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST394:
-	.8byte	.LVL1713
-	.8byte	.LVL1714
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1717
-	.8byte	.LVL1722
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST395:
-	.8byte	.LVL1719
-	.8byte	.LVL1720
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST355:
-	.8byte	.LVL1512
-	.8byte	.LVL1513
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1513
-	.8byte	.LVL1519
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1519
-	.8byte	.LVL1520
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1520
-	.8byte	.LFE288
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST356:
-	.8byte	.LVL1514
-	.8byte	.LVL1519
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1520
-	.8byte	.LFE288
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST357:
-	.8byte	.LVL1512
-	.8byte	.LVL1515
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.8byte	.LVL1515
-	.8byte	.LVL1516
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -2
-	.byte	0x9f
-	.8byte	.LVL1516
-	.8byte	.LVL1517
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1517
-	.8byte	.LVL1518
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -2
-	.byte	0x9f
-	.8byte	.LVL1520
-	.8byte	.LFE288
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -2
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST276:
-	.8byte	.LVL1120
-	.8byte	.LVL1121
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1121
-	.8byte	.LVL1132
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1133
-	.8byte	.LVL1142
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST277:
-	.8byte	.LVL1122
-	.8byte	.LVL1126
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1126
-	.8byte	.LVL1127
-	.2byte	0x3
-	.byte	0x76
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1127
-	.8byte	.LVL1131-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1134
-	.8byte	.LVL1139-1
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST278:
-	.8byte	.LVL1123
-	.8byte	.LVL1124-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST279:
-	.8byte	.LVL1122
-	.8byte	.LVL1125
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1126
-	.8byte	.LVL1131-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1134
-	.8byte	.LVL1135
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1136
-	.8byte	.LVL1139-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST280:
-	.8byte	.LVL1120
-	.8byte	.LVL1121
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1121
-	.8byte	.LVL1137
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1138
-	.8byte	.LVL1140
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1140
-	.8byte	.LVL1141-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	g_num_data_superblocks
-	.8byte	0
-	.8byte	0
-.LLST281:
-	.8byte	.LVL1120
-	.8byte	.LVL1121
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1121
-	.8byte	.LVL1129
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1130
-	.8byte	.LVL1143
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST85:
-	.8byte	.LVL251
-	.8byte	.LVL252
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL252
-	.8byte	.LVL255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL255
-	.8byte	.LVL256
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL256
-	.8byte	.LFE284
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST86:
-	.8byte	.LVL254
-	.8byte	.LVL260
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL260
-	.8byte	.LVL261
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST87:
-	.8byte	.LVL258
-	.8byte	.LVL259-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL259-1
-	.8byte	.LFE284
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST330:
-	.8byte	.LVL1371
-	.8byte	.LVL1372
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1372
-	.8byte	.LVL1376
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1376
-	.8byte	.LVL1377
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST331:
-	.8byte	.LVL1373
-	.8byte	.LVL1375
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1377
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST332:
-	.8byte	.LVL1373
-	.8byte	.LVL1374
-	.2byte	0x8
-	.byte	0x83
-	.sleb128 6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1374
-	.8byte	.LVL1375
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LVL1380-1
-	.2byte	0x8
-	.byte	0x83
-	.sleb128 6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1380-1
-	.8byte	.LVL1394
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1394
-	.8byte	.LVL1399
-	.2byte	0x8
-	.byte	0x83
-	.sleb128 6
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1399
-	.8byte	.LFE281
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST333:
-	.8byte	.LVL1377
-	.8byte	.LVL1379
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1379
-	.8byte	.LVL1382
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1394
-	.8byte	.LVL1395
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1396
-	.8byte	.LVL1403
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1438
-	.8byte	.LVL1439
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1444
-	.8byte	.LVL1445
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1445
-	.8byte	.LVL1449
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1508
-	.8byte	.LVL1509
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1510
-	.8byte	.LVL1511
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST334:
-	.8byte	.LVL1437
-	.8byte	.LVL1438
-	.2byte	0x9
-	.byte	0x8f
-	.sleb128 324
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL1462
-	.8byte	.LVL1464
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1511
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST335:
-	.8byte	.LVL1421
-	.8byte	.LVL1422
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1423
-	.8byte	.LVL1424
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1424
-	.8byte	.LVL1425
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1425
-	.8byte	.LVL1434
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1435
-	.8byte	.LVL1436
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1437
-	.8byte	.LVL1438
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1438
-	.8byte	.LVL1442
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1443
-	.8byte	.LVL1449
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1449
-	.8byte	.LVL1454
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1454
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST336:
-	.8byte	.LVL1391
-	.8byte	.LVL1394
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1418
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST337:
-	.8byte	.LVL1389
-	.8byte	.LVL1394
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1413
-	.8byte	.LVL1414
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1418
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST338:
-	.8byte	.LVL1378
-	.8byte	.LVL1380-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1394
-	.8byte	.LVL1397
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1398
-	.8byte	.LVL1399
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1404
-	.8byte	.LVL1405
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1405
-	.8byte	.LVL1408
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 0
-	.8byte	.LVL1408
-	.8byte	.LVL1409
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 -2
-	.8byte	.LVL1426
-	.8byte	.LVL1429
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1429
-	.8byte	.LVL1430
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 0
-	.8byte	.LVL1446
-	.8byte	.LVL1447
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x6
-	.byte	0x32
-	.byte	0x1c
-	.8byte	.LVL1447
-	.8byte	.LVL1448
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 -4
-	.8byte	.LVL1455
-	.8byte	.LVL1458
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1458
-	.8byte	.LVL1459
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 0
-	.8byte	.LVL1459
-	.8byte	.LVL1460
-	.2byte	0x2
-	.byte	0x72
-	.sleb128 -2
-	.8byte	.LVL1508
-	.8byte	.LVL1511
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 -4
-	.8byte	0
-	.8byte	0
-.LLST339:
-	.8byte	.LVL1381
-	.8byte	.LVL1383
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1383
-	.8byte	.LVL1392
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1399
-	.8byte	.LVL1400
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1400
-	.8byte	.LVL1423
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1424
-	.8byte	.LVL1425
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST341:
-	.8byte	.LVL1384
-	.8byte	.LVL1388
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1403
-	.8byte	.LVL1406
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1407
-	.8byte	.LVL1413
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1414
-	.8byte	.LVL1418
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1425
-	.8byte	.LVL1427
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1428
-	.8byte	.LVL1431
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1438
-	.8byte	.LVL1439
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1439
-	.8byte	.LVL1441
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1454
-	.8byte	.LVL1456
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1457
-	.8byte	.LVL1460
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST342:
-	.8byte	.LVL1386
-	.8byte	.LVL1387
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1387
-	.8byte	.LVL1389
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1409
-	.8byte	.LVL1412
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1414
-	.8byte	.LVL1416
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1417
-	.8byte	.LVL1418
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST343:
-	.8byte	.LVL1432
-	.8byte	.LVL1433
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1440
-	.8byte	.LVL1441
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST344:
-	.8byte	.LVL1463
-	.8byte	.LVL1467
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1469
-	.8byte	.LVL1479
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1479
-	.8byte	.LVL1482
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1482
-	.8byte	.LVL1504
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1504
-	.8byte	.LVL1506
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1506
-	.8byte	.LVL1508
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST345:
-	.8byte	.LVL1463
-	.8byte	.LVL1467
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1469
-	.8byte	.LVL1477
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1482
-	.8byte	.LVL1497
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1497
-	.8byte	.LVL1499
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1506
-	.8byte	.LVL1508
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST346:
-	.8byte	.LVL1386
-	.8byte	.LVL1394
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1409
-	.8byte	.LFE281
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST347:
-	.8byte	.LVL1371
-	.8byte	.LVL1375
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LVL1387
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1387
-	.8byte	.LVL1392
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1394
-	.8byte	.LVL1409
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1409
-	.8byte	.LVL1420
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1420
-	.8byte	.LVL1436
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1449
-	.8byte	.LVL1454
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST348:
-	.8byte	.LVL1410
-	.8byte	.LVL1414
-	.2byte	0x1
-	.byte	0x58
-	.8byte	.LVL1450
-	.8byte	.LVL1451
-	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL1451
-	.8byte	.LVL1452
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 0
-	.8byte	.LVL1452
-	.8byte	.LVL1453
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 -32
-	.8byte	.LVL1465
-	.8byte	.LVL1466
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1469
-	.8byte	.LVL1472-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1474
-	.8byte	.LVL1475-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1475-1
-	.8byte	.LVL1476
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1484
-	.8byte	.LVL1485
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1488
-	.8byte	.LVL1489-1
-	.2byte	0x2
-	.byte	0x74
-	.sleb128 16
-	.8byte	.LVL1489-1
-	.8byte	.LVL1490
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 256
-	.8byte	.LVL1500
-	.8byte	.LVL1501-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1501-1
-	.8byte	.LVL1504
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	0
-	.8byte	0
-.LLST349:
-	.8byte	.LVL1419
-	.8byte	.LVL1436
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1449
-	.8byte	.LVL1454
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST350:
-	.8byte	.LVL1419
-	.8byte	.LVL1423
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1424
-	.8byte	.LVL1425
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST351:
-	.8byte	.LVL1475
-	.8byte	.LVL1476
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	.LVL1484
-	.8byte	.LVL1485
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	0
-	.8byte	0
-.LLST352:
-	.8byte	.LVL1491
-	.8byte	.LVL1494
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST353:
-	.8byte	.LVL1498
-	.8byte	.LVL1504
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST354:
-	.8byte	.LVL1501
-	.8byte	.LVL1502-1
-	.2byte	0x6
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x6
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	0
-	.8byte	0
-.LLST244:
-	.8byte	.LVL938
-	.8byte	.LVL939
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL939
-	.8byte	.LVL951
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL951
-	.8byte	.LVL952
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL952
-	.8byte	.LFE280
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST245:
-	.8byte	.LVL938
-	.8byte	.LVL940-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST246:
-	.8byte	.LVL941
-	.8byte	.LVL942
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL942
-	.8byte	.LVL946-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL952
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL957
-	.8byte	.LFE280
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL944
-	.8byte	.LVL945
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL952
-	.8byte	.LVL955
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL956
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST248:
-	.8byte	.LVL944
-	.8byte	.LVL949
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL952
-	.8byte	.LVL953
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL954
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST249:
-	.8byte	.LVL943
-	.8byte	.LVL946-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL952
-	.8byte	.LVL957
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST80:
-	.8byte	.LVL236
-	.8byte	.LVL237
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL237
-	.8byte	.LFE279
-	.2byte	0x1
-	.byte	0x56
-	.8byte	0
-	.8byte	0
-.LLST81:
-	.8byte	.LVL236
-	.8byte	.LVL239
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL239
-	.8byte	.LFE279
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST82:
-	.8byte	.LVL238
-	.8byte	.LVL240
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL241
-	.8byte	.LVL242
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL243
-	.8byte	.LVL244
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST275:
-	.8byte	.LVL1108
-	.8byte	.LVL1109
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST264:
-	.8byte	.LVL1059
-	.8byte	.LVL1062
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1062
-	.8byte	.LVL1080
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1080
-	.8byte	.LVL1086
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST265:
-	.8byte	.LVL1068
-	.8byte	.LVL1069
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1069
-	.8byte	.LVL1084
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST266:
-	.8byte	.LVL1073
-	.8byte	.LVL1074
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1074
-	.8byte	.LVL1075
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1086
-	.8byte	.LVL1088
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1089
-	.8byte	.LVL1090
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1092
-	.8byte	.LVL1093-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1094
-	.8byte	.LVL1095
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1096
-	.8byte	.LVL1097
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1099
-	.8byte	.LVL1104
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1105
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST267:
-	.8byte	.LVL1072
-	.8byte	.LVL1075
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1086
-	.8byte	.LVL1090
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST268:
-	.8byte	.LVL1100
-	.8byte	.LVL1101
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1101
-	.8byte	.LVL1102
-	.2byte	0x7
-	.byte	0x72
-	.sleb128 -1
-	.byte	0x32
-	.byte	0x24
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL1102
-	.8byte	.LVL1103
-	.2byte	0xf
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x32
-	.byte	0x24
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST269:
-	.8byte	.LVL1060
-	.8byte	.LVL1081
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST270:
-	.8byte	.LVL1061
-	.8byte	.LVL1070
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1090
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST271:
-	.8byte	.LVL1063
-	.8byte	.LVL1064
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1064
-	.8byte	.LVL1066-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 24
-	.8byte	.LVL1066-1
-	.8byte	.LVL1085
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 256
-	.8byte	.LVL1085
-	.8byte	.LVL1086
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 112
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 256
-	.8byte	0
-	.8byte	0
-.LLST272:
-	.8byte	.LVL1063
-	.8byte	.LVL1082
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST273:
-	.8byte	.LVL1065
-	.8byte	.LVL1085
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 268
-	.8byte	.LVL1085
-	.8byte	.LVL1086
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 124
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 268
-	.8byte	0
-	.8byte	0
-.LLST274:
-	.8byte	.LVL1067
-	.8byte	.LVL1083
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1086
-	.8byte	.LFE275
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST462:
-	.8byte	.LVL2057
-	.8byte	.LVL2060
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2069
-	.8byte	.LVL2071
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2072
-	.8byte	.LFE274
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST79:
-	.8byte	.LVL234
-	.8byte	.LVL235
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL235
-	.8byte	.LFE273
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST257:
-	.8byte	.LVL994
-	.8byte	.LVL1001
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1001
-	.8byte	.LVL1002
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1002
-	.8byte	.LVL1003
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1005
-	.8byte	.LVL1006-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL1006
-	.8byte	.LVL1008
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST258:
-	.8byte	.LVL993
-	.8byte	.LVL1042
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 332
-	.8byte	.LVL1042
-	.8byte	.LVL1043
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 156
-	.8byte	.LVL1043
-	.8byte	.LFE270
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 332
-	.8byte	0
-	.8byte	0
-.LLST259:
-	.8byte	.LVL996
-	.8byte	.LVL997-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL997-1
-	.8byte	.LVL1000
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1009
-	.8byte	.LVL1040
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST260:
-	.8byte	.LVL994
-	.8byte	.LVL998
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL999
-	.8byte	.LVL1003
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1005
-	.8byte	.LVL1007
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST261:
-	.8byte	.LVL1019
-	.8byte	.LVL1020
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1021
-	.8byte	.LVL1022
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1023
-	.8byte	.LVL1024
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1030
-	.8byte	.LVL1031
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1032
-	.8byte	.LVL1033
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1034
-	.8byte	.LVL1035
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1044
-	.8byte	.LVL1049
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1050
-	.8byte	.LVL1051
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1052
-	.8byte	.LVL1053
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1056
-	.8byte	.LVL1057
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1058
-	.8byte	.LFE270
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST262:
-	.8byte	.LVL1010
-	.8byte	.LVL1012
-	.2byte	0x8
-	.byte	0x40
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1014
-	.8byte	.LVL1015
-	.2byte	0x8
-	.byte	0x40
-	.byte	0x8f
-	.sleb128 328
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1015
-	.8byte	.LVL1016
-	.2byte	0x5
-	.byte	0x41
-	.byte	0x75
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1018
-	.8byte	.LVL1025
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1026
-	.8byte	.LVL1027
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1029
-	.8byte	.LVL1036
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1037
-	.8byte	.LVL1038
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1045
-	.8byte	.LVL1046
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1047
-	.8byte	.LVL1048
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1053
-	.8byte	.LVL1054
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1055
-	.8byte	.LVL1056
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST263:
-	.8byte	.LVL1009
-	.8byte	.LVL1040
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST384:
-	.8byte	.LVL1665
-	.8byte	.LVL1672
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL1672
-	.8byte	.LVL1684
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST385:
-	.8byte	.LVL1666
-	.8byte	.LVL1683
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST386:
-	.8byte	.LVL1665
-	.8byte	.LVL1672
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1672
-	.8byte	.LVL1678
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1679
-	.8byte	.LVL1682
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST253:
-	.8byte	.LVL977
-	.8byte	.LVL979
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL979
-	.8byte	.LVL983
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL983
-	.8byte	.LVL984-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL984-1
-	.8byte	.LVL984
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL984
-	.8byte	.LVL987
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL987
-	.8byte	.LFE267
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST254:
-	.8byte	.LVL980
-	.8byte	.LVL981
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL981
-	.8byte	.LVL982-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	req_sys+4
-	.8byte	.LVL984
-	.8byte	.LVL985
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL985
-	.8byte	.LVL986-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	req_sys+4
-	.8byte	0
-	.8byte	0
-.LLST255:
-	.8byte	.LVL977
-	.8byte	.LVL978
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL987
-	.8byte	.LFE267
-	.2byte	0x7
-	.byte	0x70
-	.sleb128 6
-	.byte	0x94
-	.byte	0x2
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST256:
-	.8byte	.LVL977
-	.8byte	.LVL978
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 40
-	.8byte	.LVL987
-	.8byte	.LFE267
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 40
-	.8byte	0
-	.8byte	0
-.LLST374:
-	.8byte	.LVL1624
-	.8byte	.LVL1627
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1627
-	.8byte	.LVL1631
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1631
-	.8byte	.LVL1632
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1632
-	.8byte	.LFE265
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST375:
-	.8byte	.LVL1624
-	.8byte	.LVL1625
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.8byte	.LVL1625
-	.8byte	.LVL1626
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL1626
-	.8byte	.LVL1628
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1631
-	.8byte	.LVL1632
-	.2byte	0x3
-	.byte	0x8
-	.byte	0x20
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST376:
-	.8byte	.LVL1633
-	.8byte	.LVL1636
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1636
-	.8byte	.LVL1640
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1641
-	.8byte	.LFE264
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST377:
-	.8byte	.LVL1633
-	.8byte	.LVL1634
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1634
-	.8byte	.LVL1639
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1641
-	.8byte	.LFE264
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST378:
-	.8byte	.LVL1633
-	.8byte	.LVL1637
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1637
-	.8byte	.LVL1638
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1641
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1659
-	.8byte	.LFE264
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST379:
-	.8byte	.LVL1644
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST380:
-	.8byte	.LVL1643
-	.8byte	.LVL1646
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1646
-	.8byte	.LVL1649-1
-	.2byte	0x28
-	.byte	0x85
-	.sleb128 0
-	.byte	0x85
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1656
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST381:
-	.8byte	.LVL1642
-	.8byte	.LVL1647
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1647
-	.8byte	.LVL1648
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 212
-	.8byte	.LVL1648
-	.8byte	.LVL1649-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 4
-	.8byte	.LVL1656
-	.8byte	.LVL1657
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1657
-	.8byte	.LVL1658-1
-	.2byte	0x16
-	.byte	0x8a
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x10
-	.uleb128 0x3fffffffc
-	.byte	0x1a
-	.byte	0x3
-	.8byte	p_vendor_region_ppn_table
-	.byte	0x6
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST382:
-	.8byte	.LVL1633
-	.8byte	.LVL1637
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1637
-	.8byte	.LVL1638
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1641
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1659
-	.8byte	.LFE264
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST383:
-	.8byte	.LVL1635
-	.8byte	.LVL1636
-	.2byte	0x13
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1636
-	.8byte	.LVL1637
-	.2byte	0x13
-	.byte	0x85
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1637
-	.8byte	.LVL1638
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1641
-	.8byte	.LVL1659
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1659
-	.8byte	.LFE264
-	.2byte	0x13
-	.byte	0x85
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST366:
-	.8byte	.LVL1595
-	.8byte	.LVL1598
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1598
-	.8byte	.LVL1602
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1603
-	.8byte	.LVL1614
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL1617
-	.8byte	.LFE263
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST367:
-	.8byte	.LVL1595
-	.8byte	.LVL1596
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1596
-	.8byte	.LVL1601
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1603
-	.8byte	.LVL1613
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1617
-	.8byte	.LFE263
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST368:
-	.8byte	.LVL1595
-	.8byte	.LVL1599
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1599
-	.8byte	.LVL1600
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1603
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1622
-	.8byte	.LFE263
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST369:
-	.8byte	.LVL1606
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST370:
-	.8byte	.LVL1605
-	.8byte	.LVL1611
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1619
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST371:
-	.8byte	.LVL1604
-	.8byte	.LVL1608
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1608
-	.8byte	.LVL1609
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 212
-	.8byte	.LVL1609
-	.8byte	.LVL1610-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 4
-	.8byte	.LVL1619
-	.8byte	.LVL1620
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1620
-	.8byte	.LVL1621-1
-	.2byte	0x16
-	.byte	0x85
-	.sleb128 0
-	.byte	0x32
-	.byte	0x24
-	.byte	0x10
-	.uleb128 0x3fffffffc
-	.byte	0x1a
-	.byte	0x3
-	.8byte	p_vendor_region_ppn_table
-	.byte	0x6
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST372:
-	.8byte	.LVL1595
-	.8byte	.LVL1599
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1599
-	.8byte	.LVL1600
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1603
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1622
-	.8byte	.LFE263
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST373:
-	.8byte	.LVL1597
-	.8byte	.LVL1598
-	.2byte	0x13
-	.byte	0x70
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1598
-	.8byte	.LVL1599
-	.2byte	0x13
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	.LVL1599
-	.8byte	.LVL1600
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1603
-	.8byte	.LVL1615
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1615
-	.8byte	.LVL1616-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1616-1
-	.8byte	.LVL1617
-	.2byte	0x3
-	.byte	0x85
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1617
-	.8byte	.LVL1622
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1622
-	.8byte	.LFE263
-	.2byte	0x13
-	.byte	0x8c
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page_shift
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST238:
-	.8byte	.LVL918
-	.8byte	.LVL922
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL922
-	.8byte	.LFE262
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST239:
-	.8byte	.LVL918
-	.8byte	.LVL919
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL919
-	.8byte	.LVL936
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL936
-	.8byte	.LVL937
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST240:
-	.8byte	.LVL918
-	.8byte	.LVL923
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL923
-	.8byte	.LVL936
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL936
-	.8byte	.LVL937
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST241:
-	.8byte	.LVL924
-	.8byte	.LVL925
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL926
-	.8byte	.LVL928
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL928
-	.8byte	.LVL929-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL929-1
-	.8byte	.LVL931
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL931
-	.8byte	.LVL933
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST242:
-	.8byte	.LVL920
-	.8byte	.LVL935
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST243:
-	.8byte	.LVL921
-	.8byte	.LVL934
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL937
-	.8byte	.LFE262
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST329:
-	.8byte	.LVL1365
-	.8byte	.LVL1366
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1367
-	.8byte	.LVL1369
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1370
-	.8byte	.LFE261
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST73:
-	.8byte	.LVL203
-	.8byte	.LVL204
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL205
-	.8byte	.LVL206
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL206
-	.8byte	.LVL208
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL210
-	.8byte	.LVL211
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL213
-	.8byte	.LVL214
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL215
-	.8byte	.LVL218
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL219
-	.8byte	.LVL223
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL224
-	.8byte	.LFE260
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST74:
-	.8byte	.LVL207
-	.8byte	.LVL209
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL210
-	.8byte	.LVL213
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL215
-	.8byte	.LFE260
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST75:
-	.8byte	.LVL207
-	.8byte	.LVL210
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL210
-	.8byte	.LVL212-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL215
-	.8byte	.LVL216
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL217
-	.8byte	.LVL220
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL220
-	.8byte	.LVL221
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL222
-	.8byte	.LFE260
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST236:
-	.8byte	.LVL913
-	.8byte	.LVL914
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL914
-	.8byte	.LFE259
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST237:
-	.8byte	.LVL915
-	.8byte	.LVL916
-	.2byte	0x9
-	.byte	0x71
-	.sleb128 0
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL916
-	.8byte	.LVL917-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST223:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL874
-	.8byte	.LVL888
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL888
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST224:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL874
-	.8byte	.LVL889
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL889
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST225:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL874
-	.8byte	.LVL887
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL887
-	.8byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST226:
-	.8byte	.LVL878
-	.8byte	.LVL879-1
-	.2byte	0x7
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL879-1
-	.8byte	.LVL890
-	.2byte	0xa
-	.byte	0x8f
-	.sleb128 204
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL890
-	.8byte	.LFE258
-	.2byte	0xa
-	.byte	0x8f
-	.sleb128 92
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST227:
-	.8byte	.LVL880
-	.8byte	.LVL881
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL881
-	.8byte	.LVL882-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	req_sys+16
-	.8byte	0
-	.8byte	0
-.LLST228:
-	.8byte	.LVL873
-	.8byte	.LVL874
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL874
-	.8byte	.LVL883
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL884
-	.8byte	.LVL886
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST217:
-	.8byte	.LVL851
-	.8byte	.LVL853
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL853
-	.8byte	.LVL857
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL857
-	.8byte	.LVL858
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL858
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST218:
-	.8byte	.LVL862
-	.8byte	.LVL863
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL863
-	.8byte	.LVL865
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL868
-	.8byte	.LVL871
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL871
-	.8byte	.LVL872
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST219:
-	.8byte	.LVL862
-	.8byte	.LVL863
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL863
-	.8byte	.LVL864
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL868
-	.8byte	.LVL869
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL870
-	.8byte	.LFE257
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST220:
-	.8byte	.LVL852
-	.8byte	.LVL856
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL858
-	.8byte	.LVL859
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL859
-	.8byte	.LVL862-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 16
-	.8byte	0
-	.8byte	0
-.LLST221:
-	.8byte	.LVL852
-	.8byte	.LVL853
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 40
-	.8byte	.LVL853
-	.8byte	.LVL854-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 40
-	.8byte	.LVL858
-	.8byte	.LVL862-1
-	.2byte	0x2
-	.byte	0x83
-	.sleb128 40
-	.8byte	0
-	.8byte	0
-.LLST222:
-	.8byte	.LVL860
-	.8byte	.LVL861
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL861
-	.8byte	.LVL862-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	p_sys_spare_buf
-	.8byte	0
-	.8byte	0
-.LLST229:
-	.8byte	.LVL891
-	.8byte	.LVL894-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL894-1
-	.8byte	.LVL902
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL902
-	.8byte	.LVL904
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL904
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST230:
-	.8byte	.LVL896
-	.8byte	.LVL900
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL904
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST231:
-	.8byte	.LVL894
-	.8byte	.LVL895
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST232:
-	.8byte	.LVL898
-	.8byte	.LVL900
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL904
-	.8byte	.LVL909
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL910
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST233:
-	.8byte	.LVL892
-	.8byte	.LVL898
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST234:
-	.8byte	.LVL893
-	.8byte	.LVL903
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL904
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST235:
-	.8byte	.LVL905
-	.8byte	.LVL908
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL911
-	.8byte	.LFE256
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST208:
-	.8byte	.LVL828
-	.8byte	.LVL830
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL830
-	.8byte	.LVL835
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL835
-	.8byte	.LVL839
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL839
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST209:
-	.8byte	.LVL829
-	.8byte	.LVL837
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL839
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST210:
-	.8byte	.LVL829
-	.8byte	.LVL834
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL839
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST211:
-	.8byte	.LVL829
-	.8byte	.LVL836
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL839
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST212:
-	.8byte	.LVL840
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST213:
-	.8byte	.LVL831
-	.8byte	.LVL832
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL832
-	.8byte	.LVL834
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL839
-	.8byte	.LVL841
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL842
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST214:
-	.8byte	.LVL833
-	.8byte	.LVL834
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL834
-	.8byte	.LVL835
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL840
-	.8byte	.LVL843
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL844
-	.8byte	.LVL845
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL845
-	.8byte	.LVL849
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL850
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST215:
-	.8byte	.LVL833
-	.8byte	.LVL838
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL845
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST216:
-	.8byte	.LVL833
-	.8byte	.LVL834
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL834
-	.8byte	.LVL838
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL845
-	.8byte	.LVL846
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL847
-	.8byte	.LFE254
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST205:
-	.8byte	.LVL812
-	.8byte	.LVL813
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL813
-	.8byte	.LVL819
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL819
-	.8byte	.LFE253
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST206:
-	.8byte	.LVL812
-	.8byte	.LVL814
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL814
-	.8byte	.LVL817
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL817
-	.8byte	.LFE253
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST207:
-	.8byte	.LVL816
-	.8byte	.LVL820
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL821
-	.8byte	.LFE253
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST61:
-	.8byte	.LVL169
-	.8byte	.LVL170
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL170
-	.8byte	.LVL173
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL175
-	.8byte	.LFE251
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST62:
-	.8byte	.LVL169
-	.8byte	.LVL177
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL177
-	.8byte	.LVL178
-	.2byte	0x8
-	.byte	0x71
-	.sleb128 0
-	.byte	0x73
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST63:
-	.8byte	.LVL171
-	.8byte	.LVL172
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL174
-	.8byte	.LVL176
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL177
-	.8byte	.LVL178
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST60:
-	.8byte	.LVL167
-	.8byte	.LVL168-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL168-1
-	.8byte	.LFE250
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST56:
-	.8byte	.LVL154
-	.8byte	.LVL159-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL159-1
-	.8byte	.LVL161
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL161
-	.8byte	.LVL166
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL166
-	.8byte	.LFE249
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST57:
-	.8byte	.LVL154
-	.8byte	.LVL155
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL155
-	.8byte	.LVL158
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL161
-	.8byte	.LVL162
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL164
-	.8byte	.LFE249
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST58:
-	.8byte	.LVL154
-	.8byte	.LVL157
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL157
-	.8byte	.LVL160
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL160
-	.8byte	.LVL161
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL161
-	.8byte	.LFE249
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST59:
-	.8byte	.LVL155
-	.8byte	.LVL156
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL161
-	.8byte	.LVL165
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST52:
-	.8byte	.LVL140
-	.8byte	.LVL141
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL141
-	.8byte	.LVL146
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL146
-	.8byte	.LVL148
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL148
-	.8byte	.LFE248
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST53:
-	.8byte	.LVL140
-	.8byte	.LVL143
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL143
-	.8byte	.LFE248
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST54:
-	.8byte	.LVL142
-	.8byte	.LVL145
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL145
-	.8byte	.LVL146
-	.2byte	0x6
-	.byte	0x87
-	.sleb128 0
-	.byte	0x85
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL146
-	.8byte	.LVL147
-	.2byte	0xd
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x87
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL148
-	.8byte	.LFE248
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST55:
-	.8byte	.LVL149
-	.8byte	.LVL150
-	.2byte	0x14
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL150
-	.8byte	.LVL151
-	.2byte	0x16
-	.byte	0x83
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL152
-	.8byte	.LVL153
-	.2byte	0xc
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL153
-	.8byte	.LFE248
-	.2byte	0xe
-	.byte	0x83
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST45:
-	.8byte	.LVL120
-	.8byte	.LVL123
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL123
-	.8byte	.LFE247
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST46:
-	.8byte	.LVL121
-	.8byte	.LVL122
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL124
-	.8byte	.LVL134
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL134
-	.8byte	.LFE247
-	.2byte	0x6
-	.byte	0x73
-	.sleb128 0
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST47:
-	.8byte	.LVL125
-	.8byte	.LVL126
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL126
-	.8byte	.LFE247
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST48:
-	.8byte	.LVL126
-	.8byte	.LVL127
-	.2byte	0xb
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL128
-	.8byte	.LVL130
-	.2byte	0xb
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL131
-	.8byte	.LVL132
-	.2byte	0xb
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x31
-	.byte	0x24
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST49:
-	.8byte	.LVL126
-	.8byte	.LVL128
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL128
-	.8byte	.LVL131
-	.2byte	0x1
-	.byte	0x5a
-	.8byte	.LVL131
-	.8byte	.LVL133
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL133
-	.8byte	.LVL135
-	.2byte	0x5
-	.byte	0x73
-	.sleb128 0
-	.byte	0x78
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST34:
-	.8byte	.LVL88
-	.8byte	.LVL91
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL91
-	.8byte	.LFE246
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST35:
-	.8byte	.LVL89
-	.8byte	.LVL90
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL92
-	.8byte	.LFE246
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST36:
-	.8byte	.LVL96
-	.8byte	.LVL98
-	.2byte	0x1
-	.byte	0x5c
-	.8byte	.LVL98
-	.8byte	.LFE246
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST37:
-	.8byte	.LVL93
-	.8byte	.LVL94
-	.2byte	0x1
-	.byte	0x57
-	.8byte	.LVL94
-	.8byte	.LVL98
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL98
-	.8byte	.LVL105
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x80
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL107
-	.8byte	.LVL109
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x80
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL111
-	.8byte	.LVL113
-	.2byte	0xd
-	.byte	0x70
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x80
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST38:
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL102
-	.8byte	.LVL105
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL107
-	.8byte	.LVL109
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL111
-	.8byte	.LVL113
-	.2byte	0x5
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST39:
-	.8byte	.LVL93
-	.8byte	.LVL94
-	.2byte	0xe
-	.byte	0x77
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL94
-	.8byte	.LVL95
-	.2byte	0x13
-	.byte	0x80
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL95
-	.8byte	.LVL96
-	.2byte	0x15
-	.byte	0x80
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x75
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL96
-	.8byte	.LFE246
-	.2byte	0x1
-	.byte	0x57
-	.8byte	0
-	.8byte	0
-.LLST40:
-	.8byte	.LVL101
-	.8byte	.LVL102
-	.2byte	0xe
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL102
-	.8byte	.LVL103
-	.2byte	0x13
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL103
-	.8byte	.LVL104
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL104
-	.8byte	.LVL105
-	.2byte	0x29
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL107
-	.8byte	.LVL108
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL108
-	.8byte	.LVL109
-	.2byte	0x29
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL111
-	.8byte	.LVL112
-	.2byte	0x29
-	.byte	0x80
-	.sleb128 0
-	.byte	0x8e
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x7b
-	.sleb128 0
-	.byte	0x74
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x30
-	.byte	0x2e
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST41:
-	.8byte	.LVL97
-	.8byte	.LVL106
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL106
-	.8byte	.LVL107
-	.2byte	0x5
-	.byte	0x76
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL107
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL111
-	.8byte	.LVL113
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL113
-	.8byte	.LVL115
-	.2byte	0x5
-	.byte	0x76
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST42:
-	.8byte	.LVL88
-	.8byte	.LVL98
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL98
-	.8byte	.LVL99
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL100
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL111
-	.8byte	.LVL114
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST191:
-	.8byte	.LVL716
-	.8byte	.LVL717
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
-	.byte	0x9f
-	.8byte	.LVL718
-	.8byte	.LVL723
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL723
-	.8byte	.LVL725
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL727
-	.8byte	.LFE243
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST192:
-	.8byte	.LVL720
-	.8byte	.LVL721
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL721
-	.8byte	.LVL724
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL727
-	.8byte	.LFE243
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST31:
-	.8byte	.LVL81
-	.8byte	.LVL84
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL84
-	.8byte	.LFE242
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST32:
-	.8byte	.LVL81
-	.8byte	.LVL87
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL87
-	.8byte	.LFE242
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST33:
-	.8byte	.LVL82
-	.8byte	.LVL83
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL85
-	.8byte	.LFE242
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST30:
-	.8byte	.LVL76
-	.8byte	.LVL77
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL78
-	.8byte	.LVL79
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL80
-	.8byte	.LFE241
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST204:
-	.8byte	.LVL809
-	.8byte	.LVL810
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL810
-	.8byte	.LVL811-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.8byte	.LVL811-1
-	.8byte	.LFE237
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST154:
-	.8byte	.LVL597
-	.8byte	.LVL601
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL601
-	.8byte	.LVL608
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL608
-	.8byte	.LVL610
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL610
-	.8byte	.LFE236
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST155:
-	.8byte	.LVL597
-	.8byte	.LVL598
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL598
-	.8byte	.LVL607
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL607
-	.8byte	.LVL608
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL608
-	.8byte	.LVL609
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL609
-	.8byte	.LFE236
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST156:
-	.8byte	.LVL602
-	.8byte	.LVL604
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL604
-	.8byte	.LVL605
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL610
-	.8byte	.LFE236
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST157:
-	.8byte	.LVL602
-	.8byte	.LVL606
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL610
-	.8byte	.LVL613
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL614
-	.8byte	.LFE236
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST158:
-	.8byte	.LVL611
-	.8byte	.LVL615
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL615
-	.8byte	.LFE236
-	.2byte	0x3
-	.byte	0x84
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST159:
-	.8byte	.LVL599
-	.8byte	.LVL600
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST27:
-	.8byte	.LVL69
-	.8byte	.LVL71
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL71
-	.8byte	.LVL72
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL74
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL74
-	.8byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST28:
-	.8byte	.LVL69
-	.8byte	.LVL70
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL70
-	.8byte	.LVL72
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL73
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL73
-	.8byte	.LFE235
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST29:
-	.8byte	.LVL69
-	.8byte	.LVL72
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL72
-	.8byte	.LVL74
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL74
-	.8byte	.LFE235
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST25:
-	.8byte	.LVL65
-	.8byte	.LVL66
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL66
-	.8byte	.LFE234
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST26:
-	.8byte	.LVL67
-	.8byte	.LVL68
-	.2byte	0x15
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.8byte	.LVL68
-	.8byte	.LFE234
-	.2byte	0x3a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST24:
-	.8byte	.LVL62
-	.8byte	.LVL63
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL63
-	.8byte	.LFE233
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST22:
-	.8byte	.LVL58
-	.8byte	.LVL60
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL60
-	.8byte	.LFE232
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST23:
-	.8byte	.LVL59
-	.8byte	.LVL60
-	.2byte	0x24
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x72
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x70
-	.sleb128 0
-	.byte	0x72
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL60
-	.8byte	.LVL61
-	.2byte	0x26
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x72
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x72
-	.sleb128 0
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1e
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x72
-	.sleb128 0
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL61
-	.8byte	.LFE232
-	.2byte	0x41
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x71
-	.sleb128 0
-	.byte	0x1e
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1d
-	.byte	0x22
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST362:
-	.8byte	.LVL1550
-	.8byte	.LVL1551
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1551
-	.8byte	.LVL1553
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1561
-	.8byte	.LVL1566
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1566
-	.8byte	.LVL1567
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1567
-	.8byte	.LVL1587
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST363:
-	.8byte	.LVL1552
-	.8byte	.LVL1554
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1555
-	.8byte	.LVL1559
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1560
-	.8byte	.LVL1561
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1571
-	.8byte	.LVL1581
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1582
-	.8byte	.LVL1584
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1584
-	.8byte	.LVL1585-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1586
-	.8byte	.LVL1588
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1593
-	.8byte	.LVL1594-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST364:
-	.8byte	.LVL1563
-	.8byte	.LVL1568
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1575
-	.8byte	.LVL1580
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST365:
-	.8byte	.LVL1562
-	.8byte	.LVL1583
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST151:
-	.8byte	.LVL587
-	.8byte	.LVL588
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL590
-	.8byte	.LFE230
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST152:
-	.8byte	.LVL591
-	.8byte	.LVL595
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL596
-	.8byte	.LFE230
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST153:
-	.8byte	.LVL587
-	.8byte	.LVL589
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL590
-	.8byte	.LFE230
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST358:
-	.8byte	.LVL1536
-	.8byte	.LVL1537
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1545
-	.8byte	.LVL1546
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1546
-	.8byte	.LVL1547
-	.2byte	0x3
-	.byte	0x84
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1547
-	.8byte	.LVL1548
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST359:
-	.8byte	.LVL1526
-	.8byte	.LVL1529
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1538
-	.8byte	.LVL1539
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1540
-	.8byte	.LVL1541
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST360:
-	.8byte	.LVL1532
-	.8byte	.LVL1536
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1541
-	.8byte	.LVL1543
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1544
-	.8byte	.LVL1545
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST361:
-	.8byte	.LVL1524
-	.8byte	.LVL1535
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1538
-	.8byte	.LVL1545
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1548
-	.8byte	.LFE229
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST20:
-	.8byte	.LVL51
-	.8byte	.LVL52
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL52
-	.8byte	.LVL56
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL57
-	.8byte	.LFE228
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST21:
-	.8byte	.LVL51
-	.8byte	.LVL52
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL52
-	.8byte	.LVL54
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL55
-	.8byte	.LFE228
-	.2byte	0x1
-	.byte	0x55
-	.8byte	0
-	.8byte	0
-.LLST307:
-	.8byte	.LVL1247
-	.8byte	.LVL1248
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1259
-	.8byte	.LVL1260
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1260
-	.8byte	.LVL1261
-	.2byte	0x3
-	.byte	0x88
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL1261
-	.8byte	.LVL1262
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST308:
-	.8byte	.LVL1246
-	.8byte	.LVL1251
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1251
-	.8byte	.LVL1259
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1259
-	.8byte	.LVL1262
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1262
-	.8byte	.LVL1263
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL1264
-	.8byte	.LVL1267
-	.2byte	0x3
-	.byte	0x89
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST309:
-	.8byte	.LVL1249
-	.8byte	.LVL1259
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1262
-	.8byte	.LVL1265
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	0
-	.8byte	0
-.LLST310:
-	.8byte	.LVL1246
-	.8byte	.LVL1251
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1251
-	.8byte	.LVL1256
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1257
-	.8byte	.LVL1259
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1259
-	.8byte	.LVL1262
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1262
-	.8byte	.LVL1266
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST202:
-	.8byte	.LVL801
-	.8byte	.LVL802
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL802
-	.8byte	.LVL807
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL807
-	.8byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST203:
-	.8byte	.LVL801
-	.8byte	.LVL803
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL803
-	.8byte	.LVL806
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL806
-	.8byte	.LFE225
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST16:
-	.8byte	.LVL45
-	.8byte	.LVL47
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL47
-	.8byte	.LFE223
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST17:
-	.8byte	.LVL46
-	.8byte	.LVL47
-	.2byte	0x10
-	.byte	0x70
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x71
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL47
-	.8byte	.LVL48
-	.2byte	0x11
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x71
-	.sleb128 0
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL48
-	.8byte	.LFE223
-	.2byte	0x1a
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST18:
-	.8byte	.LVL49
-	.8byte	.LVL50
-	.2byte	0x41
-	.byte	0x70
-	.sleb128 0
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.8byte	gBbtInfo
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x4
-	.byte	0x70
-	.sleb128 0
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL50
-	.8byte	.LFE223
-	.2byte	0x97
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x35
-	.byte	0x25
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xf7
-	.uleb128 0x29
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.8byte	gBbtInfo
-	.byte	0x22
-	.byte	0x6
-	.byte	0x22
-	.byte	0x94
-	.byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x4f
-	.byte	0x1a
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x25
-	.byte	0x31
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST19:
-	.8byte	.LVL49
-	.8byte	.LVL50
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL50
-	.8byte	.LFE223
-	.2byte	0x2e
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST12:
-	.8byte	.LVL40
-	.8byte	.LVL41
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL41
-	.8byte	.LVL44-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL44-1
-	.8byte	.LFE222
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST13:
-	.8byte	.LVL42
-	.8byte	.LVL44-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST14:
-	.8byte	.LVL43
-	.8byte	.LVL44-1
-	.2byte	0x16
-	.byte	0x72
-	.sleb128 0
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x4
-	.byte	0x33
-	.byte	0x24
-	.byte	0x3
-	.8byte	gBbtInfo
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST15:
-	.8byte	.LVL43
-	.8byte	.LVL44-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST459:
-	.8byte	.LVL2050
-	.8byte	.LVL2053
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2053
-	.8byte	.LVL2054-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL2054-1
-	.8byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST460:
-	.8byte	.LVL2050
-	.8byte	.LVL2052
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL2052
-	.8byte	.LVL2054-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL2054-1
-	.8byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST461:
-	.8byte	.LVL2050
-	.8byte	.LVL2051
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL2051
-	.8byte	.LVL2054-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL2054-1
-	.8byte	.LFE220
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST441:
-	.8byte	.LVL1976
-	.8byte	.LVL1979
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1979
-	.8byte	.LVL1980-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1980-1
-	.8byte	.LFE219
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST442:
-	.8byte	.LVL1976
-	.8byte	.LVL1978
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1978
-	.8byte	.LVL1980-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1980-1
-	.8byte	.LFE219
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST443:
-	.8byte	.LVL1976
-	.8byte	.LVL1977
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1977
-	.8byte	.LVL1980-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1980-1
-	.8byte	.LFE219
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST387:
-	.8byte	.LVL1689
-	.8byte	.LVL1691
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1691
-	.8byte	.LVL1693
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1693
-	.8byte	.LVL1695
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1695
-	.8byte	.LVL1710
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1710
-	.8byte	.LVL1711
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1711
-	.8byte	.LFE218
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST388:
-	.8byte	.LVL1689
-	.8byte	.LVL1690
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1690
-	.8byte	.LVL1692
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1693
-	.8byte	.LFE218
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST389:
-	.8byte	.LVL1695
-	.8byte	.LVL1700
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1700
-	.8byte	.LVL1701
-	.2byte	0x2a
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0xf7
-	.uleb128 0x30
-	.byte	0x1b
-	.byte	0xf7
-	.uleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST390:
-	.8byte	.LVL1696
-	.8byte	.LVL1697
-	.2byte	0x25
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL1697
-	.8byte	.LVL1699
-	.2byte	0x2e
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1c
-	.byte	0x12
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x83
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST391:
-	.8byte	.LVL1694
-	.8byte	.LVL1710
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST392:
-	.8byte	.LVL1706
-	.8byte	.LVL1707-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST444:
-	.8byte	.LVL1981
-	.8byte	.LVL1982
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1982
-	.8byte	.LFE217
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST445:
-	.8byte	.LVL1981
-	.8byte	.LVL1983
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1983
-	.8byte	.LVL1985
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1985
-	.8byte	.LVL1988
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL1988
-	.8byte	.LVL1989
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1989
-	.8byte	.LVL1997
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1997
-	.8byte	.LVL1998
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL1998
-	.8byte	.LVL2042
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2042
-	.8byte	.LVL2049
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL2049
-	.8byte	.LFE217
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST446:
-	.8byte	.LVL1981
-	.8byte	.LVL1984
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1984
-	.8byte	.LVL1987
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 352
-	.8byte	.LVL1987
-	.8byte	.LVL1988
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 112
-	.8byte	.LVL1988
-	.8byte	.LVL1995
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1995
-	.8byte	.LVL2049
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 352
-	.8byte	.LVL2049
-	.8byte	.LFE217
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST447:
-	.8byte	.LVL1981
-	.8byte	.LVL1985-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1985-1
-	.8byte	.LVL1986
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1986
-	.8byte	.LVL1988
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL1988
-	.8byte	.LVL1995
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1995
-	.8byte	.LVL2049
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL2049
-	.8byte	.LFE217
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST448:
-	.8byte	.LVL2020
-	.8byte	.LVL2041
-	.2byte	0x1
-	.byte	0x67
-	.8byte	0
-	.8byte	0
-.LLST449:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1995
-	.8byte	.LVL1997
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1998
-	.8byte	.LVL2043
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST450:
-	.8byte	.LVL1990
-	.8byte	.LVL2049
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST451:
-	.8byte	.LVL1991
-	.8byte	.LVL1992
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1992
-	.8byte	.LVL2049
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 332
-	.8byte	0
-	.8byte	0
-.LLST452:
-	.8byte	.LVL2018
-	.8byte	.LVL2019
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2019
-	.8byte	.LVL2021
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 4
-	.8byte	.LVL2021
-	.8byte	.LVL2022-1
-	.2byte	0xf
-	.byte	0x3
-	.8byte	req_prgm
-	.byte	0x6
-	.byte	0x8b
-	.sleb128 0
-	.byte	0x22
-	.byte	0x23
-	.uleb128 0x4
-	.8byte	0
-	.8byte	0
-.LLST453:
-	.8byte	.LVL2008
-	.8byte	.LVL2013
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 360
-	.8byte	.LVL2016
-	.8byte	.LVL2028
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 360
-	.8byte	.LVL2028
-	.8byte	.LVL2029
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2029
-	.8byte	.LVL2041
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 360
-	.8byte	0
-	.8byte	0
-.LLST454:
-	.8byte	.LVL1993
-	.8byte	.LVL2049
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST455:
-	.8byte	.LVL2004
-	.8byte	.LVL2005
-	.2byte	0x21
-	.byte	0x83
-	.sleb128 7
-	.byte	0x94
-	.byte	0x1
-	.byte	0x8
-	.byte	0xff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x12
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x88
-	.sleb128 0
-	.byte	0x16
-	.byte	0x14
-	.byte	0xc
-	.4byte	0xffffffff
-	.byte	0x1a
-	.byte	0x2d
-	.byte	0x28
-	.2byte	0x1
-	.byte	0x16
-	.byte	0x13
-	.byte	0x9f
-	.8byte	.LVL2005
-	.8byte	.LVL2006
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2006
-	.8byte	.LVL2009
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 324
-	.8byte	.LVL2009
-	.8byte	.LVL2013
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL2016
-	.8byte	.LVL2041
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 324
-	.8byte	0
-	.8byte	0
-.LLST456:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2023
-	.8byte	.LVL2024
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2024
-	.8byte	.LVL2026
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2029
-	.8byte	.LVL2031
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2031
-	.8byte	.LVL2032
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2033
-	.8byte	.LVL2040
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 348
-	.8byte	0
-	.8byte	0
-.LLST457:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2025
-	.8byte	.LVL2026
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 356
-	.8byte	.LVL2030
-	.8byte	.LVL2031
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2031
-	.8byte	.LVL2032
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 356
-	.8byte	.LVL2033
-	.8byte	.LVL2040
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 356
-	.8byte	0
-	.8byte	0
-.LLST458:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
-	.2byte	0xa
-	.byte	0x3
-	.8byte	g_active_superblock
-	.byte	0x9f
-	.8byte	.LVL1995
-	.8byte	.LVL1997
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1998
-	.8byte	.LVL2001
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2003
-	.8byte	.LVL2015
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2016
-	.8byte	.LVL2044
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST398:
-	.8byte	.LVL1743
-	.8byte	.LVL1746-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1746-1
-	.8byte	.LVL1746
-	.2byte	0x3
-	.byte	0x84
-	.sleb128 -4
-	.byte	0x9f
-	.8byte	.LVL1746
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST399:
-	.8byte	.LVL1743
-	.8byte	.LVL1746-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1746-1
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST400:
-	.8byte	.LVL1743
-	.8byte	.LVL1744
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1744
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST401:
-	.8byte	.LVL1743
-	.8byte	.LVL1745
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1745
-	.8byte	.LVL1762
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1762
-	.8byte	.LFE215
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST402:
-	.8byte	.LVL1755
-	.8byte	.LVL1758-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST403:
-	.8byte	.LVL1747
-	.8byte	.LVL1748
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1757
-	.8byte	.LVL1758-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1758-1
-	.8byte	.LVL1760
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST404:
-	.8byte	.LVL1754
-	.8byte	.LVL1756-1
-	.2byte	0x2
-	.byte	0x86
-	.sleb128 16
-	.8byte	0
-	.8byte	0
-.LLST424:
-	.8byte	.LVL1927
-	.8byte	.LVL1930
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1930
-	.8byte	.LFE214
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST425:
-	.8byte	.LVL1927
-	.8byte	.LVL1929
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1929
-	.8byte	.LVL1933
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1933
-	.8byte	.LVL1936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1937
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1937
-	.8byte	.LFE214
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST426:
-	.8byte	.LVL1927
-	.8byte	.LVL1928
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1928
-	.8byte	.LVL1935
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1935
-	.8byte	.LVL1936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x52
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1942
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1942
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST427:
-	.8byte	.LVL1927
-	.8byte	.LVL1931-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1931-1
-	.8byte	.LVL1934
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1934
-	.8byte	.LVL1936
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x53
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1943
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST428:
-	.8byte	.LVL1927
-	.8byte	.LVL1932
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1954
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1956
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST429:
-	.8byte	.LVL1938
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST430:
-	.8byte	.LVL1939
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST431:
-	.8byte	.LVL1958
-	.8byte	.LVL1959
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1959
-	.8byte	.LVL1960-1
-	.2byte	0x16
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x84
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x74
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST432:
-	.8byte	.LVL1940
-	.8byte	.LVL1943
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL1943
-	.8byte	.LVL1975
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST433:
-	.8byte	.LVL1950
-	.8byte	.LVL1952
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST434:
-	.8byte	.LVL1940
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1951
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1957
-	.8byte	.LVL1972
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST435:
-	.8byte	.LVL1940
-	.8byte	.LVL1941
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1941
-	.8byte	.LVL1948
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 300
-	.8byte	.LVL1948
-	.8byte	.LVL1949
-	.2byte	0x8
-	.byte	0x8f
-	.sleb128 300
-	.byte	0x94
-	.byte	0x4
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1957
-	.8byte	.LVL1972
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 300
-	.8byte	0
-	.8byte	0
-.LLST436:
-	.8byte	.LVL1927
-	.8byte	.LVL1932
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1964
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1964
-	.8byte	.LVL1965
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1965
-	.8byte	.LVL1975
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 296
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST437:
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1965
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 292
-	.8byte	.LVL1965
-	.8byte	.LVL1966
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1966
-	.8byte	.LVL1967
-	.2byte	0x9
-	.byte	0x71
-	.sleb128 0
-	.byte	0x8f
-	.sleb128 296
-	.byte	0x94
-	.byte	0x4
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL1967
-	.8byte	.LVL1968
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1968
-	.8byte	.LVL1975
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 292
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST438:
-	.8byte	.LVL1936
-	.8byte	.LVL1943
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL1943
-	.8byte	.LVL1970
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 288
-	.8byte	.LVL1970
-	.8byte	.LVL1971
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL1971
-	.8byte	.LVL1975
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 288
-	.8byte	.LVL1975
-	.8byte	.LFE214
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST439:
-	.8byte	.LVL1946
-	.8byte	.LVL1947
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1957
-	.8byte	.LVL1960-1
-	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL1960-1
-	.8byte	.LVL1961
-	.2byte	0x3
-	.byte	0x8f
-	.sleb128 264
-	.8byte	.LVL1962
-	.8byte	.LVL1963
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST440:
-	.8byte	.LVL1973
-	.8byte	.LVL1974-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST468:
-	.8byte	.LVL2151
-	.8byte	.LVL2152
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL2152
-	.8byte	.LVL2153
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc2
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL2153
-	.8byte	.LVL2154
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x1fc1
-	.byte	0x83
-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST464:
-	.8byte	.LVL2108
-	.8byte	.LVL2109
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2111
-	.8byte	.LVL2112
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL2121
-	.8byte	.LVL2122
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2122
-	.8byte	.LVL2123-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2125
-	.8byte	.LVL2126
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2130
-	.8byte	.LVL2131
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2131
-	.8byte	.LVL2132-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2132
-	.8byte	.LVL2133
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2133
-	.8byte	.LVL2134
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL2134
-	.8byte	.LVL2135-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2137
-	.8byte	.LVL2138
-	.2byte	0x1
-	.byte	0x68
-	.8byte	0
-	.8byte	0
-.LLST465:
-	.8byte	.LVL2111
-	.8byte	.LVL2115
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2133
-	.8byte	.LVL2136
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2137
-	.8byte	.LVL2138
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST466:
-	.8byte	.LVL2107
-	.8byte	.LVL2108
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2108
-	.8byte	.LVL2110
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2121
-	.8byte	.LVL2124
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2125
-	.8byte	.LVL2127
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2129
-	.8byte	.LVL2130
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST467:
-	.8byte	.LVL2106
-	.8byte	.LVL2108
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2118
-	.8byte	.LVL2119
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2120
-	.8byte	.LVL2121
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST181:
-	.8byte	.LVL665
-	.8byte	.LVL666
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL666
-	.8byte	.LVL691
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL691
-	.8byte	.LFE209
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST182:
-	.8byte	.LVL665
-	.8byte	.LVL668
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL668
-	.8byte	.LVL691
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL691
-	.8byte	.LFE209
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST183:
-	.8byte	.LVL665
-	.8byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL669
-	.8byte	.LVL672
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL673
-	.8byte	.LVL682
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL683
-	.8byte	.LVL690
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL692
-	.8byte	.LVL703
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL704
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST184:
-	.8byte	.LVL665
-	.8byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL669
-	.8byte	.LVL670
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL678
-	.8byte	.LVL679
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL679
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL692
-	.8byte	.LVL697
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL698
-	.8byte	.LVL705
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL706
-	.8byte	.LVL711
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL712
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST185:
-	.8byte	.LVL667
-	.8byte	.LVL669
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL669
-	.8byte	.LVL671-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL678
-	.8byte	.LVL679
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL679
-	.8byte	.LVL680-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL680
-	.8byte	.LVL681
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL700
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL700
-	.8byte	.LVL701
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL702
-	.8byte	.LVL705
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL706
-	.8byte	.LVL714
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL714
-	.8byte	.LVL715
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST186:
-	.8byte	.LVL694
-	.8byte	.LVL699
-	.2byte	0x1
-	.byte	0x5d
-	.8byte	.LVL699
-	.8byte	.LVL702
-	.2byte	0x1
-	.byte	0x5e
-	.8byte	.LVL702
-	.8byte	.LVL705
-	.2byte	0x1
-	.byte	0x5d
-	.8byte	.LVL708
-	.8byte	.LVL713
-	.2byte	0x1
-	.byte	0x5c
-	.8byte	.LVL713
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x5d
-	.8byte	0
-	.8byte	0
-.LLST187:
-	.8byte	.LVL665
-	.8byte	.LVL676
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL676
-	.8byte	.LVL677
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL678
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST188:
-	.8byte	.LVL665
-	.8byte	.LVL678
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL678
-	.8byte	.LVL685
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL686
-	.8byte	.LVL687
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST189:
-	.8byte	.LVL665
-	.8byte	.LVL677
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.8byte	.LVL678
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x36
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	0
-	.8byte	0
-.LLST190:
-	.8byte	.LVL665
-	.8byte	.LVL675
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL675
-	.8byte	.LVL677
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL678
-	.8byte	.LVL689
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL692
-	.8byte	.LVL706
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL706
-	.8byte	.LFE209
-	.2byte	0x1
-	.byte	0x69
-	.8byte	0
-	.8byte	0
-.LLST200:
-	.8byte	.LVL798
-	.8byte	.LVL799
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST201:
-	.8byte	.LVL745
-	.8byte	.LVL751
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL752
-	.8byte	.LVL759
-	.2byte	0x7
-	.byte	0x83
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x9f
-	.8byte	.LVL761
-	.8byte	.LVL764
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL768
-	.8byte	.LVL770
-	.2byte	0x1
-	.byte	0x6c
-	.8byte	.LVL770
-	.8byte	.LVL771-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL772
-	.8byte	.LVL773-1
-	.2byte	0xe
-	.byte	0x3
-	.8byte	c_ftl_nand_max_map_blks
-	.byte	0x94
-	.byte	0x4
-	.byte	0x31
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL780
-	.8byte	.LVL781
-	.2byte	0x12
-	.byte	0x3
-	.8byte	c_ftl_nand_map_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL781
-	.8byte	.LVL782-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL783
-	.8byte	.LVL784-1
-	.2byte	0xe
-	.byte	0x3
-	.8byte	c_ftl_nand_max_map_blks
-	.byte	0x94
-	.byte	0x4
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL785
-	.8byte	.LVL786
-	.2byte	0x12
-	.byte	0x3
-	.8byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x34
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL786
-	.8byte	.LVL787-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL788
-	.8byte	.LVL789
-	.2byte	0x20
-	.byte	0x3
-	.8byte	c_ftl_nand_l2pmap_ram_region_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x3
-	.8byte	c_ftl_nand_byte_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL789
-	.8byte	.LVL790-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL791
-	.8byte	.LVL792
-	.2byte	0x12
-	.byte	0x3
-	.8byte	c_ftl_nand_blk_pre_plane
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL792
-	.8byte	.LVL793-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL794
-	.8byte	.LVL795
-	.2byte	0x15
-	.byte	0x3
-	.8byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL795
-	.8byte	.LVL796
-	.2byte	0x26
-	.byte	0x3
-	.8byte	c_ftl_nand_blks_per_die
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x23
-	.uleb128 0x1f
-	.byte	0x35
-	.byte	0x26
-	.byte	0x3
-	.8byte	c_ftl_nand_die_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL796
-	.8byte	.LVL797-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST8:
-	.8byte	.LVL25
-	.8byte	.LVL26
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL26
-	.8byte	.LVL32
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL32
-	.8byte	.LFE205
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST9:
-	.8byte	.LVL27
-	.8byte	.LVL28
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL28
-	.8byte	.LVL29
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 1
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST7:
-	.8byte	.LVL21
-	.8byte	.LVL22
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL22
-	.8byte	.LVL23
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL23
-	.8byte	.LVL24
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL24
-	.8byte	.LFE204
-	.2byte	0x9
-	.byte	0x3
-	.8byte	c_ftl_nand_sys_blks_per_plane
-	.8byte	0
-	.8byte	0
-.LLST4:
-	.8byte	.LVL12
-	.8byte	.LVL15
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL15
-	.8byte	.LVL16
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LFE202
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST5:
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL13
-	.8byte	.LVL14
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL14
-	.8byte	.LVL16
-	.2byte	0x3
-	.byte	0x71
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL16
-	.8byte	.LVL17
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL19
-	.8byte	.LFE202
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST6:
-	.8byte	.LVL12
-	.8byte	.LVL13
-	.2byte	0x2
-	.byte	0x31
-	.byte	0x9f
-	.8byte	.LVL13
-	.8byte	.LFE202
-	.2byte	0x1
-	.byte	0x52
-	.8byte	0
-	.8byte	0
-.LLST102:
-	.8byte	.LVL443
-	.8byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL445-1
-	.8byte	.LVL450
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL450
-	.8byte	.LFE201
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST103:
-	.8byte	.LVL444
-	.8byte	.LVL445-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL445-1
-	.8byte	.LVL446
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL446
-	.8byte	.LVL447
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL447
-	.8byte	.LVL448
-	.2byte	0xc
-	.byte	0x70
-	.sleb128 0
-	.byte	0x8
-	.byte	0x20
-	.byte	0x24
-	.byte	0x8
-	.byte	0x20
-	.byte	0x26
-	.byte	0x83
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL448
-	.8byte	.LVL449
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST97:
-	.8byte	.LVL291
-	.8byte	.LVL293-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL293-1
-	.8byte	.LVL426
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL426
-	.8byte	.LVL427
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL427
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST98:
-	.8byte	.LVL431
-	.8byte	.LVL432
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL432
-	.8byte	.LVL433
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL433
-	.8byte	.LVL434-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL434-1
-	.8byte	.LVL436
-	.2byte	0x3
-	.byte	0x87
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL436
-	.8byte	.LVL437
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL439
-	.8byte	.LVL440
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL440
-	.8byte	.LVL441-1
-	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL441-1
-	.8byte	.LVL442
-	.2byte	0x3
-	.byte	0x86
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL442
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST99:
-	.8byte	.LVL292
-	.8byte	.LVL293-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL293-1
-	.8byte	.LVL294
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL294
-	.8byte	.LVL406
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL406
-	.8byte	.LVL425
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL427
-	.8byte	.LFE200
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST100:
-	.8byte	.LVL431
-	.8byte	.LVL434-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL436
-	.8byte	.LVL438
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST101:
-	.8byte	.LVL439
-	.8byte	.LVL441-1
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL442
-	.8byte	.LFE200
-	.2byte	0xd
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x88
-	.sleb128 0
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST0:
-	.8byte	.LVL5
-	.8byte	.LVL7
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL7
-	.8byte	.LVL8
-	.2byte	0x1
-	.byte	0x54
-	.8byte	0
-	.8byte	0
-.LLST1:
-	.8byte	.LVL1
-	.8byte	.LVL9
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
-.LLST2:
-	.8byte	.LVL4
-	.8byte	.LVL6
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST3:
-	.8byte	.LVL10
-	.8byte	.LVL11
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL11
-	.8byte	.LFE355
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST10:
-	.8byte	.LVL34
-	.8byte	.LVL37
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL37
-	.8byte	.LFE208
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST11:
-	.8byte	.LVL35
-	.8byte	.LVL36
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL38
-	.8byte	.LVL39
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST43:
-	.8byte	.LVL116
-	.8byte	.LVL117-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL117-1
-	.8byte	.LFE245
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST44:
-	.8byte	.LVL118
-	.8byte	.LVL119
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST50:
-	.8byte	.LVL136
-	.8byte	.LVL137-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL137-1
-	.8byte	.LFE244
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST51:
-	.8byte	.LVL138
-	.8byte	.LVL139
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST64:
-	.8byte	.LVL179
-	.8byte	.LVL180
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL180
-	.8byte	.LVL202
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL202
-	.8byte	.LFE252
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST65:
-	.8byte	.LVL181
-	.8byte	.LVL201
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST66:
-	.8byte	.LVL190
-	.8byte	.LVL192
-	.2byte	0x5
-	.byte	0x70
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LVL199-1
-	.2byte	0xd
-	.byte	0x86
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x36
-	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST67:
-	.8byte	.LVL183
-	.8byte	.LVL185
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL185
-	.8byte	.LVL188
-	.2byte	0xd
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL188
-	.8byte	.LVL189-1
-	.2byte	0x15
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.8byte	0
-	.8byte	0
-.LLST68:
-	.8byte	.LVL184
-	.8byte	.LVL185
-	.2byte	0xe
-	.byte	0x84
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL185
-	.8byte	.LVL186
-	.2byte	0x1b
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x70
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL186
-	.8byte	.LVL187
-	.2byte	0x1d
-	.byte	0x83
-	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0x22
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x86
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL187
-	.8byte	.LVL196
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST69:
-	.8byte	.LVL191
-	.8byte	.LVL197
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST70:
-	.8byte	.LVL193
-	.8byte	.LVL195
-	.2byte	0xe
-	.byte	0x71
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x72
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.8byte	.LVL195
-	.8byte	.LVL198
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST71:
-	.8byte	.LVL182
-	.8byte	.LVL201
-	.2byte	0x1
-	.byte	0x66
-	.8byte	0
-	.8byte	0
-.LLST72:
-	.8byte	.LVL190
-	.8byte	.LVL192
-	.2byte	0xe
-	.byte	0x3
-	.8byte	p_data_block_list_table
-	.byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL192
-	.8byte	.LVL194
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL194
-	.8byte	.LVL199-1
-	.2byte	0x16
-	.byte	0x86
-	.sleb128 2
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
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-	.byte	0x36
-	.byte	0x1e
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-	.8byte	p_data_block_list_table
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-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL225
-	.8byte	.LVL226
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL226
-	.8byte	.LFE266
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL231
-	.8byte	.LVL232-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL232-1
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL231
-	.8byte	.LVL232-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL232-1
-	.8byte	.LVL232
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	.LVL232
-	.8byte	.LVL233
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL233
-	.8byte	.LFE272
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL246
-	.8byte	.LVL248
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL249
-	.8byte	.LFE282
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL247
-	.8byte	.LVL248
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL249
-	.8byte	.LFE282
-	.2byte	0x1
-	.byte	0x53
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL479
-	.8byte	.LVL481-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL481-1
-	.8byte	.LFE297
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL480
-	.8byte	.LVL481-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL481-1
-	.8byte	.LVL482
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL655
-	.8byte	.LVL656
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL656
-	.8byte	.LVL664
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL664
-	.8byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST176:
-	.8byte	.LVL655
-	.8byte	.LVL658-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL658-1
-	.8byte	.LFE240
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
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-	.8byte	0
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-	.8byte	.LVL657
-	.8byte	.LVL658-1
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL658-1
-	.8byte	.LVL663
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL657
-	.8byte	.LVL663
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST179:
-	.8byte	.LVL657
-	.8byte	.LVL663
-	.2byte	0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST180:
-	.8byte	.LVL659
-	.8byte	.LVL660
-	.2byte	0x1
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-	.8byte	.LVL660
-	.8byte	.LVL662
-	.2byte	0x1
-	.byte	0x65
-	.8byte	0
-	.8byte	0
-.LLST193:
-	.8byte	.LVL729
-	.8byte	.LVL731
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL731
-	.8byte	.LVL737
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL737
-	.8byte	.LVL738
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL738
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST194:
-	.8byte	.LVL729
-	.8byte	.LVL732
-	.2byte	0x2
-	.byte	0x30
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-	.8byte	.LVL732
-	.8byte	.LVL737
-	.2byte	0x1
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-	.8byte	.LVL738
-	.8byte	.LVL739
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL740
-	.8byte	.LFE255
-	.2byte	0x1
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-	.8byte	0
-	.8byte	0
-.LLST195:
-	.8byte	.LVL729
-	.8byte	.LVL730
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 16
-	.8byte	0
-	.8byte	0
-.LLST196:
-	.8byte	.LVL735
-	.8byte	.LVL736
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST252:
-	.8byte	.LVL968
-	.8byte	.LVL972
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x800
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-	.sleb128 0
-	.byte	0x1c
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-	.8byte	.LVL974
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x801
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-	.sleb128 0
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-	.8byte	.LVL974
-	.8byte	.LVL975
-	.2byte	0x7
-	.byte	0xa
-	.2byte	0x800
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-	.sleb128 0
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST298:
-	.8byte	.LVL1219
-	.8byte	.LVL1221
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1221
-	.8byte	.LVL1223
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1223
-	.8byte	.LVL1229
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	.LVL1229
-	.8byte	.LFE344
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST299:
-	.8byte	.LVL1220
-	.8byte	.LVL1223
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1223
-	.8byte	.LVL1228
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST319:
-	.8byte	.LVL1312
-	.8byte	.LVL1313
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1313
-	.8byte	.LVL1316
-	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1316
-	.8byte	.LFE317
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST320:
-	.8byte	.LVL1314
-	.8byte	.LVL1315
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1317
-	.8byte	.LVL1320
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1321
-	.8byte	.LFE317
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
-.LLST321:
-	.8byte	.LVL1324
-	.8byte	.LVL1325
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1325
-	.8byte	.LVL1326
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL1328
-	.8byte	.LVL1329
-	.2byte	0x6
-	.byte	0x70
-	.sleb128 0
-	.byte	0x84
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST322:
-	.8byte	.LVL1330
-	.8byte	.LVL1331
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1331
-	.8byte	.LVL1339
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1339
-	.8byte	.LFE301
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST323:
-	.8byte	.LVL1332
-	.8byte	.LVL1338
-	.2byte	0x1
-	.byte	0x63
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL1352
-	.8byte	.LVL1353-1
-	.2byte	0xe
-	.byte	0x3
-	.8byte	g_MaxLpn
-	.byte	0x94
-	.byte	0x4
-	.byte	0x31
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST327:
-	.8byte	.LVL1352
-	.8byte	.LVL1353-1
-	.2byte	0x12
-	.byte	0x3
-	.8byte	c_ftl_nand_planes_num
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL1353-1
-	.8byte	.LVL1356
-	.2byte	0x9
-	.byte	0x89
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
-	.byte	0x24
-	.byte	0x9f
-	.8byte	.LVL1358
-	.8byte	.LVL1360
-	.2byte	0x9
-	.byte	0x89
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x32
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-	.byte	0x9f
-	.8byte	0
-	.8byte	0
-.LLST328:
-	.8byte	.LVL1354
-	.8byte	.LVL1357
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1358
-	.8byte	.LVL1364
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL1829
-	.8byte	.LVL1831
-	.2byte	0x1
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-	.8byte	.LVL1844
-	.2byte	0x1
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-	.8byte	.LVL1845
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
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-	.byte	0xf3
-	.uleb128 0x1
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-	.8byte	.LVL1878
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-	.byte	0xf3
-	.uleb128 0x1
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-	.8byte	.LVL1925
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1925
-	.8byte	.LFE319
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL1829
-	.8byte	.LVL1830
-	.2byte	0x1
-	.byte	0x51
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-	.byte	0xf3
-	.uleb128 0x1
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL1832
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-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.8byte	.LVL1847
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-	.byte	0xf3
-	.uleb128 0x1
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-	.8byte	0
-	.8byte	0
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-	.uleb128 0x1
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-	.uleb128 0x1
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL1908
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-	.sleb128 272
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-	.8byte	0
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-	.8byte	.LVL1889
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-	.8byte	.LVL1904
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-	.byte	0x8b
-	.sleb128 1
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-	.8byte	0
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-	.8byte	.LVL1899
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-	.8byte	.LVL1891
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-	.8byte	.LVL1892
-	.8byte	.LVL1895
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-	.8byte	.LVL1897
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-	.sleb128 0
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-	.sleb128 -2
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-	.8byte	0
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-	.8byte	.LVL1887
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-	.sleb128 332
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-	.8byte	0
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-	.8byte	.LVL1906
-	.8byte	.LVL1907
-	.2byte	0x2
-	.byte	0x71
-	.sleb128 16
-	.8byte	.LVL1907
-	.8byte	.LVL1915
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL1837
-	.8byte	.LVL1838
-	.2byte	0x1
-	.byte	0x50
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-	.8byte	0
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-	.8byte	.LVL2087
-	.8byte	.LVL2088
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-	.byte	0x3
-	.8byte	g_active_superblock
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-	.byte	0x3
-	.8byte	g_buffer_superblock
-	.byte	0x9f
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-	.8byte	0
-	.section	.debug_aranges,"",@progbits
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-	.8byte	.LFB349
-	.8byte	.LFE349-.LFB349
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-	.8byte	.LFE355-.LFB355
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-	.8byte	.LFE202-.LFB202
-	.8byte	.LFB203
-	.8byte	.LFE203-.LFB203
-	.8byte	.LFB204
-	.8byte	.LFE204-.LFB204
-	.8byte	.LFB205
-	.8byte	.LFE205-.LFB205
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-	.8byte	.LFE221-.LFB221
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-	.8byte	.LFE222-.LFB222
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-	.8byte	.LFE233-.LFB233
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-	.8byte	.LFE234-.LFB234
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-	.8byte	.LFE235-.LFB235
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-	.8byte	.LFE238-.LFB238
-	.8byte	.LFB239
-	.8byte	.LFE239-.LFB239
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-	.8byte	.LFE242-.LFB242
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-	.8byte	.LFE246-.LFB246
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-	.section	.debug_line,"",@progbits
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-	.section	.debug_str,"MS",@progbits,1
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-	.string	"FtlEctTblFlush"
-.LASF592:
-	.string	"gc_page_num"
-.LASF608:
-	.string	"superBlk"
-.LASF498:
-	.string	"g_gc_bad_block_temp_num"
-.LASF363:
-	.string	"all_blk_used_slc_mode"
-.LASF43:
-	.string	"reserved"
-.LASF507:
-	.string	"g_totle_read_sector"
-.LASF573:
-	.string	"__func__"
-.LASF419:
-	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF732:
-	.string	"nSec"
-.LASF728:
-	.string	"forceFlush"
-.LASF107:
-	.string	"bootm_headers"
-.LASF452:
-	.string	"p_gc_data_buf"
-.LASF125:
-	.string	"rd_end"
-.LASF491:
-	.string	"p_gc_blk_tbl"
-.LASF787:
-	.string	"FtlFreeSysBlkQueueOut"
-.LASF324:
-	.string	"ftl_bbt_blk_header"
-.LASF227:
-	.string	"eth_device"
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-	.string	"sign"
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-	.string	"sctidx"
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-	.string	"Ftl_load_ext_data"
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-	.string	"ih_comp"
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-	.string	"block"
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-	.string	"_Bool"
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-	.string	"min_ec"
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-	.string	"req_read_temp"
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-	.string	"p_spare"
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-	.string	"recovery_cur_page_ver"
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-	.string	"g_totle_write_page_count"
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-	.string	"net_root_path"
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-	.string	"lookup_ppa"
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-	.string	"FtlBbmTblFlush"
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-	.string	"Ftl_get_new_temp_ppa"
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-	.string	"ftl_data_blk_header"
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-	.string	"blk_per_plane"
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-	.string	"min_erase_count"
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-	.string	"fit_noffset_os"
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-	.string	"des_ppa"
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-	.string	"priv"
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-	.string	"insert_free_list"
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-	.ascii	"GNU C11 6.3.1 20170404 -ms"
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-	.string	"___strtok"
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-	.string	"UCLASS_SPI_GENERIC"
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-	.string	"g_l2p_last_update_region_id"
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-	.string	"ftl_sb_update_avl_pages"
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-	.string	"FlashProgPages"
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-	.string	"test_page_num"
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-	.string	"lookup_superblock_id"
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-	.string	"c_ftl_nand_init_sys_blks_per_plane"
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-	.string	"FtlConstantsInit"
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-	.string	"num_io"
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-	.string	"FtlPrintInfo"
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-	.string	"l2p_flush"
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-	.string	"rear"
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-	.string	"ftl_l2p_map_info"
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-	.string	"g_in_swl_replace"
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-	.string	"c_ftl_nand_page_pre_slc_blk"
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-	.string	"net_nis_domain"
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-	.string	"List_update_data_list"
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-	.string	"create_first_buffer_superblock"
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-	.string	"g_gc_merge_free_blk_threshold"
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-	.string	"last_mlc_page_version"
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-	.string	"IsBlkInGcList"
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-	.string	"next"
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-	.string	"pBlkVpcTbl"
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-	.string	"FtlReUsePrevPpa"
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-	.string	"update_multiplier_value"
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-	.string	"c_ftl_nand_totle_phy_blks"
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-	.string	"memcmp"
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-	.string	"c_ftl_nand_max_sys_blks"
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-	.string	"PhyBlk"
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-	.string	"FlashReadPages"
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-	.string	"p_free_data_block_list_head"
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-	.string	"UCLASS_AHCI"
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-	.string	"UCLASS_I2C_MUX"
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-	.string	"uclass_id"
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-	.string	"get_new_gc_superblock"
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-	.string	"BOPS_EN"
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-	.string	"net_netmask"
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-	.string	"bad_block_cnt"
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-	.string	"c_ftl_nand_max_data_blks"
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-	.string	"pvTo"
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-	.string	"fit_noffset_rd"
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-	.string	"UCLASS_RTC"
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-	.string	"pBbtHeader"
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-	.string	"bi_memsize"
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-	.string	"bi_flashstart"
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-	.string	"minValidPageCount"
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-	.string	"recv"
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-	.string	"fit_uname_setup"
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-	.string	"UCLASS_SYSCON"
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-	.string	"UCLASS_DISPLAY"
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-	.string	"g_max_erase_count"
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-	.string	"flash_type"
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-	.string	"g_recovery_ppa_tbl"
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-	.string	"bi_dram"
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-	.string	"die_index"
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-	.string	"ver2"
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-	.string	"gSysFreeQueue"
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-	.string	"UCLASS_I2C_EEPROM"
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-	.string	"g_nand_phy_info"
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-	.string	"check_spare_buf"
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-	.string	"UCLASS_PCI_EMUL"
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-	.string	"fdt_header"
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-	.string	"ftl_free"
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-	.string	"g_MaxLpn"
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-	.string	"bufferPageOffset"
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-	.string	"reversed"
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-	.string	"g_totle_write_sector"
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-	.string	"off_dt_struct"
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-	.string	"c_ftl_nand_max_vendor_blks"
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-	.string	"prev_valid_page_count"
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-	.string	"NETLOOP_CONTINUE"
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-	.string	"g_gc_temp_superblock"
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-	.string	"UCLASS_SPI"
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-	.string	"BbtMap"
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-	.string	"found_lpa"
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-	.string	"UCLASS_VIDEO_CONSOLE"
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-	.string	"UCLASS_VIDEO"
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-	.string	"current_ppa"
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-	.string	"create_first_active_superblock"
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-	.string	"pMapPpnTbl"
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-	.string	"net_state"
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-	.string	"num_page"
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-	.string	"ftl_gc_temp_power_lost_recovery_flag"
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-	.string	"totle_num"
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-	.string	"Index"
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-	.string	"next_free_active_page"
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-	.string	"spperBlk"
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-	.string	"IRQ_STACK_START"
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-	.string	"verify"
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-	.string	"ftl_set_blk_mode"
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-	.string	"NETLOOP_RESTART"
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-	.string	"uint8"
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-	.string	"write_page_count"
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-	.string	"Ftl_gc_temp_data_write_back"
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-	.string	"erase_blk"
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-	.string	"g_num_free_superblocks"
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-	.string	"s_addr"
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-	.string	"re_save_bbmdata"
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-	.string	"UCLASS_SYSRESET"
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-	.string	"FtlLoadFactoryBbt"
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-	.string	"sec_per_blk"
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-	.string	"UCLASS_ROOT"
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-	.string	"UCLASS_CROS_EC"
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-	.string	"c_ftl_nand_sec_pre_page_shift"
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-	.string	"IsInFreeQueue"
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-	.string	"index"
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-	.string	"maxDieNum"
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-	.string	"block_size"
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-	.string	"ih_load"
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-	.string	"FtlProgPages"
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-	.string	"error_flag"
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-	.string	"c_ftl_nand_page_pre_blk"
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-	.string	"blk_Id"
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-	.string	"UCLASS_KEY"
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-	.string	"List_Node"
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-	.string	"p_die"
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-	.string	"UCLASS_ADC"
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-	.string	"UCLASS_IRQ"
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-	.string	"__u8"
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-	.string	"g_gc_page_offset"
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-	.string	"UCLASS_TEST"
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-	.string	"recovery_super_page"
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-	.string	"c_ftl_nand_planes_per_die"
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-	.string	"blkNum"
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-	.string	"g_totle_map_block"
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-	.string	"totle_write_sector"
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-	.string	"BlkNum"
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-	.string	"FtlReadRefresh"
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-	.string	"free_blk_index"
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-	.string	"FtlBbt2Bitmap"
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-	.string	"legacy_hdr_os"
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-	.string	"UCLASS_USB"
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-	.string	"get_bad_blk_list"
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-	.string	"uchar"
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-	.string	"pages"
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-	.string	"addr"
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-	.string	"UCLASS_SPI_EMUL"
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-	.string	"FtlMemInit"
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-	.string	"prev_ppa"
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-	.string	"FlashTestBlk"
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-	.string	"bi_sramstart"
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-	.string	"enetaddr"
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-	.string	"l2p_region_id"
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-	.string	"check_buf"
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-	.string	"UCLASS_RESET"
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-	.string	"UCLASS_DEMO"
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-	.string	"bd_info"
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-	.string	"nand_req"
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-	.string	"slc_erase_count"
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-	.string	"bi_busfreq"
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-	.string	"prev_multiplier_value"
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-	.string	"UCLASS_BLK"
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-	.string	"FtlVendorPartWrite"
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-	.string	"FtlGcFreeTempBlock"
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-	.string	"remalloc"
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-	.string	"ih_dcrc"
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-	.string	"flash_info_t"
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-	.string	"GetFreeBlockMaxEraseCount"
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-.LASF647:
-	.string	"free_data_superblock"
-.LASF858:
-	.string	"re_test_next_page"
-.LASF61:
-	.string	"bi_arch_number"
-.LASF749:
-	.string	"FtlMapWritePage"
-.LASF783:
-	.string	"tmp_data_count"
-.LASF26:
-	.string	"ide_bus_offset"
-.LASF739:
-	.string	"action"
-.LASF408:
-	.string	"c_ftl_nand_byte_pre_page"
-.LASF216:
-	.string	"UCLASS_COUNT"
-.LASF174:
-	.string	"UCLASS_NVME"
-.LASF643:
-	.string	"new_id"
-.LASF345:
-	.string	"cache_write_count"
-.LASF640:
-	.string	"new_ppa"
-.LASF258:
-	.string	"net_restart_wrap"
-.LASF371:
-	.string	"totle_read_sector"
-.LASF341:
-	.string	"bufferSuperblockId"
-.LASF273:
-	.string	"int32"
-.LASF369:
-	.string	"refresh_start_lpa"
-.LASF80:
-	.string	"boot_cpuid_phys"
-.LASF304:
-	.string	"maxLogicBlk"
-.LASF321:
-	.string	"totleEc"
-.LASF38:
-	.string	"lmb_property"
-.LASF457:
-	.string	"g_ect_tbl_info_size"
-.LASF338:
-	.string	"gcTempFlashMode"
-.LASF431:
-	.string	"g_MaxLbn"
-.LASF533:
-	.string	"g_nand_ops"
-.LASF583:
-	.string	"ftl_malloc"
-.LASF839:
-	.string	"first_lpa_nscts"
-.LASF183:
-	.string	"UCLASS_PMIC"
-.LASF318:
-	.string	"L2PMap"
-.LASF765:
-	.string	"prev_node_id"
-.LASF453:
-	.string	"gp_gc_page_buf_info"
-.LASF508:
-	.string	"g_totle_discard_page_count"
-.LASF656:
-	.string	"max_ec"
-.LASF536:
-	.string	"gFtlInitStatus"
-.LASF9:
-	.string	"long long int"
-.LASF458:
-	.string	"p_erase_count_table"
-.LASF823:
-	.string	"FtlBbmMapBadBlock"
-.LASF427:
-	.string	"g_GlobalDataVersion"
-.LASF717:
-	.string	"block_in_plane"
-.LASF128:
-	.string	"initrd_start"
-.LASF428:
-	.string	"g_MaxLbaSector"
-.LASF382:
-	.string	"current_plane"
-.LASF878:
-	.string	"free"
-.LASF383:
-	.string	"num_planes"
-.LASF799:
-	.string	"spareBuf"
-.LASF730:
-	.string	"FtlVendorPartRead"
-.LASF723:
-	.string	"FtlWriteDump_data"
-.LASF197:
-	.string	"UCLASS_SPI_FLASH"
-.LASF202:
-	.string	"UCLASS_TIMER"
-.LASF797:
-	.string	"FtlGetLastWrittenPage"
-.LASF661:
-	.string	"pDataHeader"
-.LASF541:
-	.string	"power_up_flag"
-.LASF365:
-	.string	"inkDie_write_and_check_en"
-.LASF413:
-	.string	"c_ftl_nand_l2pmap_ram_region_num"
-.LASF842:
-	.string	"sftl_deinit"
-.LASF814:
-	.string	"totle_count"
-.LASF282:
-	.string	"die_num"
-.LASF750:
-	.string	"update_map_block"
-.LASF307:
-	.string	"maxRegion"
-.LASF680:
-	.string	"next_free_active_plane"
-.LASF490:
-	.string	"p_gc_page_info"
-.LASF256:
-	.string	"net_our_vlan"
-.LASF361:
-	.string	"totle_power_on_run_times"
-.LASF93:
-	.string	"ih_os"
-.LASF525:
-	.string	"g_cur_erase_blk"
-.LASF184:
-	.string	"UCLASS_PWM"
-.LASF634:
-	.string	"FtlGcBufFree"
-.LASF774:
-	.string	"List_pop_index_node"
-.LASF690:
-	.string	"scan_completed"
-.LASF637:
-	.string	"update_vpc_list"
-.LASF170:
-	.string	"UCLASS_MMC"
-.LASF464:
-	.string	"p_map_block_table"
-.LASF543:
-	.string	"FtlUpdateVaildLpnCount"
-.LASF332:
-	.string	"res32_0"
-.LASF333:
-	.string	"res32_1"
-.LASF726:
-	.string	"FtlUpdateVaildLpn"
-.LASF390:
-	.string	"scr_ppa"
-.LASF162:
-	.string	"UCLASS_IDE"
-.LASF224:
-	.string	"save_size"
-.LASF78:
-	.string	"version"
-.LASF652:
-	.string	"pNode"
-.LASF638:
-	.string	"get_new_active_ppa"
-.LASF877:
-	.string	"kmalloc"
-.LASF25:
-	.string	"_binary_u_boot_bin_end"
-.LASF597:
-	.string	"max_gc_page_num"
-.LASF1:
-	.string	"unsigned int"
-.LASF712:
-	.string	"FtlSlcSuperblockCheck"
-.LASF514:
-	.string	"g_totle_avg_erase_count"
-.LASF835:
-	.string	"flashType"
-.LASF791:
-	.string	"FtlFreeSysBLkSort"
-.LASF779:
-	.string	"tmp_erase_count"
-.LASF83:
-	.string	"working_fdt"
-.LASF861:
-	.string	"FtlVariablesInit"
-.LASF392:
-	.string	"ftl_gc_page_buffer"
-.LASF239:
-	.string	"push_packet"
-.LASF708:
-	.string	"pMapBlkHeader"
-.LASF82:
-	.string	"size_dt_struct"
-.LASF472:
-	.string	"p_vendor_region_ppn_table"
-.LASF675:
-	.string	"make_superblock"
-.LASF97:
-	.string	"ih_name"
-.LASF186:
-	.string	"UCLASS_PWRSEQ"
-.LASF337:
-	.string	"bufferFlashMode"
-.LASF7:
-	.string	"short int"
-.LASF836:
-	.string	"FtlRead"
-.LASF74:
-	.string	"totalsize"
-.LASF757:
-	.string	"ftl_map_blk_alloc_new_blk"
-.LASF385:
-	.string	"check_en"
-.LASF442:
-	.string	"req_gc_dst"
-.LASF374:
-	.string	"prev"
-.LASF423:
-	.string	"c_ftl_nand_data_op_blks_per_plane"
-.LASF650:
-	.string	"min_ec_id"
-.LASF388:
-	.string	"phyBlk"
-.LASF260:
-	.string	"net_boot_file_size"
-.LASF412:
-	.string	"c_ftl_nand_map_region_num"
-.LASF665:
-	.string	"FtlVpcCheckAndModify"
-.LASF127:
-	.string	"ft_len"
-.LASF188:
-	.string	"UCLASS_REGULATOR"
-.LASF311:
-	.string	"pBlkVerTbl"
-.LASF488:
-	.string	"g_sys_save_data"
-.LASF124:
-	.string	"rd_start"
 	.hidden	free
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index 614cbe36d0..299197250e 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <asm/arch/clock.h>
+#include <rksfc.h>
 
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 51edb6fcb0..f2d394929a 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -8,11 +8,11 @@
 #include <linux/bug.h>
 #include <linux/delay.h>
 
-#include "flash.h"
 #include "flash_com.h"
+#include "rkflash_debug.h"
+#include "rk_sftl.h"
 #include "sfc.h"
 #include "sfc_nand.h"
-#include "rkflash_debug.h"
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
@@ -559,7 +559,7 @@ u32 sfc_nand_init(void)
 	PRINT_SFC_I("...%s enter...\n", __func__);
 
 	sfc_nand_read_id_raw(id_byte);
-	PRINT_SFC_E("sfc_nand id: %x %x %x\n",
+	PRINT_SFC_I("sfc_nand id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
 		return FTL_NO_FLASH;
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
old mode 100755
new mode 100644
index d5f0086ac7..7b0b8318b1
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -117,7 +117,11 @@ struct nand_info {
 	u32 (*ecc_status)(void);
 };
 
+extern struct nand_phy_info	g_nand_phy_info;
+extern struct nand_ops		g_nand_ops;
+
 u32 sfc_nand_init(void);
+void sfc_nand_deinit(void);
 int sfc_nand_read_id(u8 *buf);
 u32 sfc_nand_ecc_status_sp1(void);
 u32 sfc_nand_ecc_status_sp3(void);
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index 1a1cd01492..4d074d5789 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -526,7 +526,7 @@ int snor_init(struct SFNOR_DEV *p_dev)
 
 	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
 	snor_read_id(id_byte);
-	PRINT_SFC_E("sfc nor id: %x %x %x\n",
+	PRINT_SFC_I("sfc nor id: %x %x %x\n",
 		    id_byte[0], id_byte[1], id_byte[2]);
 	if (0xFF == id_byte[0] || 0x00 == id_byte[0]) {
 		err = SFC_ERROR;
diff --git a/drivers/rkflash/typedef.h b/drivers/rkflash/typedef.h
index ca20ceeb18..04e2723e0e 100644
--- a/drivers/rkflash/typedef.h
+++ b/drivers/rkflash/typedef.h
@@ -29,15 +29,4 @@
 #define INVALID_UINT16	((u16)0xFFFF)
 #define INVALID_UINT32	((u32)0xFFFFFFFFL)
 
-#define PRINT_E	pr_info
-#define PRINT_I	pr_info
-
-void *ftl_malloc(int n_size);
-void *ftl_memset(void *s, int c, unsigned int n);
-void *ftl_memcpy(void *pv_to,
-		 const void *pv_from,
-		 unsigned int size);
-void ftl_free(void *p);
-void rknand_print_hex(char *s, void *buf, int width, int len);
-
 #endif  /*__TYPEDEF_H */

commit 3872c3f472bbb32fcf8477eb11c65d1281e89935
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 23:12:33 2018 +0800

    drvers: block: blk-uclass: add SPI Flash blk devices
    
    1.Add SPI Flash blk devices;
    2.Remove unused RKSFC blk devices.
    
    Change-Id: I0c570798875b4dddf7dfc651f992d2e8eb725228
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 4e000b9e8a..ed7392ecd0 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -25,7 +25,8 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_SYSTEMACE]	= "ace",
 	[IF_TYPE_NVME]		= "nvme",
 	[IF_TYPE_RKNAND]	= "rknand",
-	[IF_TYPE_RKSFC]		= "rksfc",
+	[IF_TYPE_SPINAND]	= "spinand",
+	[IF_TYPE_SPINOR]	= "spinor",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -40,7 +41,8 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_HOST]		= UCLASS_ROOT,
 	[IF_TYPE_NVME]		= UCLASS_NVME,
 	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
-	[IF_TYPE_RKSFC]		= UCLASS_SPI_FLASH,
+	[IF_TYPE_SPINAND]	= UCLASS_SPI_FLASH,
+	[IF_TYPE_SPINOR]	= UCLASS_SPI_FLASH,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/include/blk.h b/include/blk.h
index f925832237..d8e3825454 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -35,7 +35,6 @@ enum if_type {
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
 	IF_TYPE_RKNAND,
-	IF_TYPE_RKSFC,
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
 

commit 3f360b79311b333bbf59ffb4525c37f570cb57fc
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:59:44 2018 +0800

    rockchip: bootcmd: change rksfc to spi flash devices in bootdev
    
    1.Under the control of sfc, SPI Nand and SPI Nor are registered as two
    different if_type block dev and are both the child_dev of sfc:
            a.Dev 0: blk_dev "rkflash", devenum 0, if_type SpiNand
            b.Dev 1: blk_dev "rkflash", devenum 1, if_type SpiNor
    
    Change-Id: Iaa90fdc5c0926495c989189b9ef9e317b70f23a4
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 4df4e0ef1e..38ff08a57f 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -92,8 +92,10 @@
 		"setenv devtype mmc; setenv devnum 0;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
-        "elif rksfc dev 0; then " \
-                "setenv devtype rksfc; setenv devnum 0;" \
+	"elif rksfc dev 0; then " \
+		"setenv devtype spinand; setenv devnum 0;" \
+	"elif rksfc dev 1; then " \
+		"setenv devtype spinor; setenv devnum 1;" \
 	"fi; \0"
 
 #define RKIMG_BOOTCOMMAND \

commit aa16b1f80312183f6bebceb1efe5f9499b9526e5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:44:39 2018 +0800

    cmd: rksfc: change dev if_type
    
    1.In rkflash driver, SPI Nand and SPI Nor are registered as two
    different if_type
    block dev. They are both the child_dev of sfc;
    2.Here we send cmd to "rksfc" to operate it's child-dev spi flash device.
    
    Change-Id: I9314ef9c556f8cfbe023021bd66bebec137a4e71
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/cmd/rksfc.c b/cmd/rksfc.c
index f4b4a317d7..b0cf3ae120 100644
--- a/cmd/rksfc.c
+++ b/cmd/rksfc.c
@@ -13,6 +13,12 @@ static int rksfc_curr_dev;
 static int do_rksfc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	int ret;
+	u32 dev_type = IF_TYPE_UNKNOWN;
+
+	if (rksfc_curr_dev == 0)
+		dev_type = IF_TYPE_SPINAND;
+	else if (rksfc_curr_dev == 1)
+		dev_type = IF_TYPE_SPINOR;
 
 	if (argc == 2) {
 		if (strncmp(argv[1], "scan", 4) == 0) {
@@ -24,7 +30,16 @@ static int do_rksfc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		}
 	}
 
-	return blk_common_cmd(argc, argv, IF_TYPE_RKSFC, &rksfc_curr_dev);
+	if (argc == 3) {
+		if (strncmp(argv[1], "dev", 3) == 0) {
+			if ((int)simple_strtoul(argv[2], NULL, 10) == 0)
+				dev_type = IF_TYPE_SPINAND;
+			else
+				dev_type = IF_TYPE_SPINOR;
+		}
+	}
+
+	return blk_common_cmd(argc, argv, dev_type, &rksfc_curr_dev);
 }
 
 U_BOOT_CMD(
@@ -33,6 +48,8 @@ U_BOOT_CMD(
 	"scan - scan Sfc devices\n"
 	"rksfc info - show all available Sfc devices\n"
 	"rksfc device [dev] - show or set current Sfc device\n"
+	"      dev 0 - spinand\n"
+	"      dev 1 - spinor\n"
 	"rksfc part [dev] - print partition table of one or all Sfc devices\n"
 	"rksfc read addr blk# cnt - read `cnt' blocks starting at block\n"
 	"     `blk#' to memory address `addr'\n"

commit c8638ec3c0fb9b79df3640a14f568b1e643f8864
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:41:26 2018 +0800

    common: boot_rkimg: add SPI flash boot type
    
    Change-Id: I9d1d36390833387a93eb7ed76b1d6f90e3640edb
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
old mode 100755
new mode 100644
index 4de48926ea..37b58c4f6c
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -171,9 +171,12 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";
-	} else if (!strcmp(devtype, "rksfc")) {
-		type = IF_TYPE_RKSFC;
+	} else if (!strcmp(devtype, "spinand")) {
+		type = IF_TYPE_SPINAND;
 		boot_media = "nand"; /* kernel treat sfc nand as nand device */
+	} else if (!strcmp(devtype, "spinor")) {
+		type = IF_TYPE_SPINOR;
+		boot_media = "nor";
 	} else {
 		/* Add new to support */
 	}
@@ -185,7 +188,9 @@ int get_bootdev_type(void)
 		 * 2. rknand doesn't need "androidboot.mode=";
 		 */
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
-		    (type == IF_TYPE_RKNAND) || (type == IF_TYPE_RKSFC))
+		    (type == IF_TYPE_RKNAND) ||
+		    (type == IF_TYPE_SPINAND) ||
+		    (type == IF_TYPE_SPINOR))
 			snprintf(boot_options, sizeof(boot_options),
 				 "storagemedia=%s", boot_media);
 		else

commit 4c0421560de016138235050e908e36d6768c4ec6
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:34:11 2018 +0800

    disk: part: add SPI Flash blk_desc print
    
    1.Add SPI Flash blk_desc print;
    2.Remove RKSFC print which is unused.
    
    Change-Id: I5ef3b6936dd57cd01490176bc8877159cedadccc
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 72d1146c94..095127dfdf 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -146,16 +146,12 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_USB:
 	case IF_TYPE_NVME:
 	case IF_TYPE_RKNAND:
-		printf ("Vendor: %s Rev: %s Prod: %s\n",
-			dev_desc->vendor,
-			dev_desc->revision,
-			dev_desc->product);
-		break;
-	case IF_TYPE_RKSFC:
-		printf ("Vendor: %s Rev: %s Prod: %s\n",
-			dev_desc->vendor,
-			dev_desc->revision,
-			dev_desc->product);
+	case IF_TYPE_SPINAND:
+	case IF_TYPE_SPINOR:
+		printf("Vendor: %s Rev: %s Prod: %s\n",
+		       dev_desc->vendor,
+		       dev_desc->revision,
+		       dev_desc->product);
 		break;
 	case IF_TYPE_DOC:
 		puts("device type DOC\n");
@@ -291,8 +287,11 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_RKNAND:
 		puts("RKNAND");
 		break;
-	case IF_TYPE_RKSFC:
-		puts("RKSFC");
+	case IF_TYPE_SPINAND:
+		puts("SPINAND");
+		break;
+	case IF_TYPE_SPINOR:
+		puts("SPINOR");
 		break;
 	default:
 		puts ("UNKNOWN");

commit b331f5a603f3a3fae5078e353c4fb51ab63c8740
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 26 21:21:41 2018 +0800

    drivers: rkflash: treat spi nand and spi nor as two different block devices
    
    1.when dm sfc of-match, it will bind two kinds of spi flash devices as
    rkflash:
            a.SpiNand, devnum 0, if_type IF_TYPE_SPINAND
            b.SpiNor, devnum 1, if_type IF_TYPE_SPINOR
    2.Publish type of rkflash product.
    
    Change-Id: I393452b16640811e9b0217fe5e91e76bc84c7745
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index e4b0901c08..338acd996c 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -19,7 +19,7 @@ ulong rkflash_bread(struct udevice *udev, lbaint_t start,
 	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
-	debug("%s lba %x cnt %x", __func__, (u32)start, (u32)blkcnt);
+	debug("%s lba %x cnt %x\n", __func__, (u32)start, (u32)blkcnt);
 	if (blkcnt == 0)
 		return -EINVAL;
 
@@ -72,22 +72,33 @@ static int rkflash_blk_probe(struct udevice *udev)
 {
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 	struct blk_desc *desc = dev_get_uclass_platdata(udev);
-
+	char *product;
+
+	if (desc->if_type != priv->flash_con_type)
+		return  -ENODEV;
+
+	switch (priv->flash_con_type) {
+	case IF_TYPE_RKNAND:
+		product = "rkflash-NandFlash";
+		break;
+	case IF_TYPE_SPINAND:
+		product = "rkflash-SpiNand";
+		break;
+	case IF_TYPE_SPINOR:
+		product = "rkflash-SpiNor";
+		break;
+	default:
+		product = "unknown";
+		break;
+	}
 	debug("%s %d %p ndev = %p %p\n", __func__, __LINE__,
 	      udev, priv, udev->parent);
 	priv->child_dev = udev;
-	if (priv->flash_con_type == FLASH_CON_TYPE_SFC)
-		desc->if_type = IF_TYPE_RKSFC;
-	else if (priv->flash_con_type == FLASH_CON_TYPE_NANDC)
-		desc->if_type = IF_TYPE_RKNAND;
-
 	desc->lba = priv->density;
 	desc->log2blksz = 9;
-	desc->blksz = 512;
 	desc->bdev = udev;
-	desc->devnum = 0;
 	sprintf(desc->vendor, "0x%.4x", 0x0308);
-	memcpy(desc->product, "rkflash", sizeof("rkflash"));
+	memcpy(desc->product, product, strlen(product));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
 	part_init(desc);
 	rkflash_test(udev);
diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
index ef824e36dd..9b9de4a63d 100644
--- a/drivers/rkflash/rknandc_base.c
+++ b/drivers/rkflash/rknandc_base.c
@@ -15,7 +15,7 @@
 
 static struct flash_operation nandc_flash_op = {
 #ifdef	CONFIG_RKNANDC_NAND
-	FLASH_TYPE_NANDC_NAND,
+	IF_TYPE_RKNAND,
 	rknand_flash_init,
 	rknand_flash_get_density,
 	rknand_flash_read,
@@ -87,7 +87,7 @@ static int rockchip_nand_probe(struct udevice *udev)
 	}
 	ret = nandc_flash_op.flash_init(udev);
 	if (!ret) {
-		priv->flash_con_type = FLASH_CON_TYPE_NANDC;
+		priv->flash_con_type = nandc_flash_op.id;
 		priv->density = nandc_flash_op.flash_get_capacity(udev);
 		priv->read = nandc_flash_op.flash_read;
 		priv->write = nandc_flash_op.flash_write;
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index b813ae9e11..614cbe36d0 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -15,7 +15,7 @@
 
 static struct flash_operation sfc_nor_op = {
 #ifdef	CONFIG_RKSFC_NOR
-	FLASH_TYPE_SFC_NOR,
+	IF_TYPE_SPINOR,
 	rksfc_nor_init,
 	rksfc_nor_get_capacity,
 	rksfc_nor_read,
@@ -30,7 +30,7 @@ static struct flash_operation sfc_nor_op = {
 
 static struct flash_operation sfc_nand_op = {
 #ifdef CONFIG_RKSFC_NAND
-	FLASH_TYPE_SFC_NAND,
+	IF_TYPE_SPINAND,
 	rksfc_nand_init,
 	rksfc_nand_get_density,
 	rksfc_nand_read,
@@ -74,8 +74,12 @@ static int rksfc_blk_bind(struct udevice *udev)
 	int ret;
 
 	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
-				 IF_TYPE_RKSFC,
+				 IF_TYPE_SPINAND,
 				 0, 512, 0, &bdev);
+	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+				 IF_TYPE_SPINOR,
+				 1, 512, 0, &bdev);
+
 	if (ret) {
 		debug("Cannot create block device\n");
 		return ret;
@@ -103,14 +107,14 @@ static int rockchip_rksfc_probe(struct udevice *udev)
 
 	sfc_init(priv->ioaddr);
 	for (i = 0; i < 2; i++) {
-		if (spi_flash_op[i]->id == -1) {
+		if (spi_flash_op[i]->id <= 0) {
 			debug("%s no optional spi flash for type %x\n",
 			      __func__, i);
 			continue;
 		}
 		ret = spi_flash_op[i]->flash_init(udev);
 		if (!ret) {
-			priv->flash_con_type = FLASH_CON_TYPE_SFC;
+			priv->flash_con_type = spi_flash_op[i]->id;
 			priv->density =
 				spi_flash_op[i]->flash_get_capacity(udev);
 			priv->read = spi_flash_op[i]->flash_read;

commit 9563e87b414d247aa89015c100c1fdfec5a7ea29
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Fri Jul 27 16:55:08 2018 +0800

    ARM64: invalid icache for cortex a35
    
    Different loader can not boot normally in cortex-A35,like rk3308,
    because cortex-A35 enable icache in default.
    
    Change-Id: I87f3e8a2539186f3e408fad8ea903c375118b1d9
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index 0c8652a675..61e90284ab 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -78,6 +78,17 @@ lr	.req	x30
 	b.eq	\el1_label
 .endm
 
+/*
+ * Branch if current processor is a Cortex-A35 core.
+ */
+.macro	branch_if_a35_core, xreg, a35_label
+	mrs	\xreg, midr_el1
+	lsr	\xreg, \xreg, #4
+	and	\xreg, \xreg, #0x00000FFF
+	cmp	\xreg, #0xD04		/* Cortex-A35 MPCore processor. */
+	b.eq	\a35_label
+.endm
+
 /*
  * Branch if current processor is a Cortex-A57 core.
  */
diff --git a/arch/arm/lib/setjmp_aarch64.S b/arch/arm/lib/setjmp_aarch64.S
index b68edb86d6..c7959e9b6c 100644
--- a/arch/arm/lib/setjmp_aarch64.S
+++ b/arch/arm/lib/setjmp_aarch64.S
@@ -37,6 +37,8 @@ ENTRY(longjmp)
 	/* Move the return value in place, but return 1 if passed 0. */
 	adds x0, xzr, x1
 	csinc x0, x0, xzr, ne
+	/* invalid icache for cortex a35 */
+branch_if_a35_core x1, __asm_invalidate_icache_all
 	ret
 ENDPROC(longjmp)
 .popsection

commit 5b580fb9ec4d6e7cae16e3ec70cea56dee9b5453
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Fri Jul 27 17:05:55 2018 +0800

    rockchip: rv1108: spl: disable SPL_LIBCOMMON/GENERIC configs
    
    remove CONFIG_SPL_LIBCOMMON_SUPPORT and CONFIG_SPL_LIBGENERIC_SUPPORT
    defconfig for reducing spl size.
    
    Change-Id: Ie7b1905c44976f8a62e2462acd455a6ec6bb8be7
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 2096487043..f8b09f8a88 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -2,8 +2,6 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y

commit e62c13b97779616ec7f3313ca4648944532dd76e
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Wed Jul 25 18:11:24 2018 +0800

    rockchip: spl: add udelay(),hang(),memset() in spl
    
    add udelay(),hang(),memset() in spl.c when we do not config
    CONFIG_SPL_LIBGENERIC_SUPPORT.
    
    Change-Id: Ib6c5532af002b501659ee5964d3a09954f0b3fdf
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index b0de24030a..2c1ffe5ab0 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -86,6 +86,56 @@ __weak int rk_board_init_f(void)
 	return 0;
 }
 
+#ifndef CONFIG_SPL_LIBGENERIC_SUPPORT
+void udelay(unsigned long usec)
+{
+	__udelay(usec);
+}
+
+void hang(void)
+{
+	bootstage_error(BOOTSTAGE_ID_NEED_RESET);
+	for (;;)
+		;
+}
+
+/**
+ * memset - Fill a region of memory with the given value
+ * @s: Pointer to the start of the area.
+ * @c: The byte to fill the area with
+ * @count: The size of the area.
+ *
+ * Do not use memset() to access IO space, use memset_io() instead.
+ */
+void *memset(void *s, int c, size_t count)
+{
+	unsigned long *sl = (unsigned long *)s;
+	char *s8;
+
+#if !CONFIG_IS_ENABLED(TINY_MEMSET)
+	unsigned long cl = 0;
+	int i;
+
+	/* do it one word at a time (32 bits or 64 bits) while possible */
+	if (((ulong)s & (sizeof(*sl) - 1)) == 0) {
+		for (i = 0; i < sizeof(*sl); i++) {
+			cl <<= 8;
+			cl |= c & 0xff;
+		}
+		while (count >= sizeof(*sl)) {
+			*sl++ = cl;
+			count -= sizeof(*sl);
+		}
+	}
+#endif /* fill 8 bits at a time */
+	s8 = (char *)sl;
+	while (count--)
+		*s8++ = c;
+
+	return s;
+}
+#endif
+
 void board_init_f(ulong dummy)
 {
 #ifdef CONFIG_SPL_FRAMEWORK

commit d4bcb632d8b9b50458504c22f371af0f5a46bcdb
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 22 22:04:59 2018 +0800

    configs: evb-px30: enable vendor partition
    
    Change-Id: Ic55ef11f3164c17318f7ee1213001e0f1b800271
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index ff21ecf5c4..f9945a3cee 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -98,6 +98,7 @@ CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 6266c4934d8df5124780fdb273c779b02d087907
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu Jul 26 16:41:07 2018 +0800

    fuel gauge: rk817: clear the OFF_CNT register
    
    Change-Id: Iab37f0a0b69a35ed56f3bef4c0d0699d4922e6bc
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 5508150e72..5ba8434d05 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -621,7 +621,12 @@ static bool is_rk817_bat_first_pwron(struct rk817_battery_device *battery)
 
 static int rk817_bat_get_off_count(struct rk817_battery_device *battery)
 {
-	return rk817_bat_read(battery, OFF_CNT);
+	int value;
+
+	value = rk817_bat_read(battery, OFF_CNT);
+	rk817_bat_write(battery, OFF_CNT, 0x00);
+
+	return value;
 }
 
 static void rk817_bat_update_qmax(struct rk817_battery_device *battery,
@@ -759,7 +764,6 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
 	battery->nac = rk817_bat_vol_to_cap(battery,
 					    battery->pwron_voltage);
-	battery->pwroff_min = rk817_bat_get_off_count(battery);
 	battery->remain_cap = pre_cap * 1000;
 	battery->is_halt = is_rk817_bat_last_halt(battery);
 

commit 4be02e281669fe7856df28456b0496c3946d0901
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 26 20:51:51 2018 +0800

    rockchip: px30: enable vol+ key in pre-reloc
    
    We need vol+ key as recovery key for board to get into rockusb.
    
    Change-Id: Ia1d80cb62695fa2208744ea62a0c6fec5d1e20a8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 6a21a99012..9eaa7d88e7 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -24,12 +24,14 @@
 	};
 
 	adc-keys {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
 		io-channel-names = "buttons";
 		keyup-threshold-microvolt = <1800000>;
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <10000>;
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index f9c7488ce6..278a8ba6a0 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -24,12 +24,14 @@
 	};
 
 	adc-keys {
+		u-boot,dm-pre-reloc;
 		compatible = "adc-keys";
 		io-channels = <&saradc 2>;
 		io-channel-names = "buttons";
 		keyup-threshold-microvolt = <1800000>;
 
 		vol-up-key {
+			u-boot,dm-pre-reloc;
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
 			press-threshold-microvolt = <10000>;

commit 0c53cb8fc445ebc0aae7655bc12fcde34168ff7a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 26 20:30:29 2018 +0800

    rockchip: dts: px30: enable usb gadget for rockusb
    
    Rockusb have to available so that we can use it even if there is
    no avaiable kernel/resource image.
    
    Change-Id: I39c22052f66fb7151eeb885b684d8fc1291dc3f4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 555e0b1250..0e294196b5 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -66,3 +66,22 @@
 	u-boot,dm-pre-reloc;
 	status = "disabled";
 };
+
+&usb20_otg {
+	u-boot,dm-pre-reloc;
+};
+
+&usb2phy_grf {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&u2phy_otg {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit 4897499e15df4924998bfe5088fb51519ec30c7f
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Jul 26 16:39:43 2018 +0800

    clk: rockchip: rk3399: add gpll and npll init
    
    remove clk_set_defaults(), need init pll freq as kernel.
    
    Change-Id: I245d01bf65b3092c21a0c2aa06a0a6eaca8528ef
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 9c4104845d..97faba7324 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -82,16 +82,16 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define ATCLK_CORE_HZ	(300*MHz)
 #define PCLK_DBG_HZ	(100*MHz)
 
-#define PERIHP_ACLK_HZ	(148500*KHz)
-#define PERIHP_HCLK_HZ	(148500*KHz)
-#define PERIHP_PCLK_HZ	(37125*KHz)
+#define PERIHP_ACLK_HZ	(150 * MHz)
+#define PERIHP_HCLK_HZ	(75 * MHz)
+#define PERIHP_PCLK_HZ	(37500 * KHz)
 
-#define PERILP0_ACLK_HZ	(99000*KHz)
-#define PERILP0_HCLK_HZ	(99000*KHz)
-#define PERILP0_PCLK_HZ	(49500*KHz)
+#define PERILP0_ACLK_HZ	(100 * MHz)
+#define PERILP0_HCLK_HZ	(100 * MHz)
+#define PERILP0_PCLK_HZ	(50 * MHz)
 
-#define PERILP1_HCLK_HZ	(99000*KHz)
-#define PERILP1_PCLK_HZ	(99000*KHz)
+#define PERILP1_HCLK_HZ	(100 * MHz)
+#define PERILP1_PCLK_HZ	(50 * MHz)
 
 #define PWM_CLOCK_HZ    PMU_PCLK_HZ
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 74ef6a64ca..4d76d66052 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -53,6 +53,8 @@ struct pll_div {
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 6, 1);
+static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1);
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
@@ -1153,7 +1155,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
 
 	/* configure perihp aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
+	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERIHP_ACLK_HZ) - 1;
 	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
@@ -1173,7 +1175,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
 
 	/* configure perilp0 aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
+	aclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP0_ACLK_HZ) - 1;
 	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
@@ -1193,7 +1195,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     aclk_div << ACLK_PERILP0_DIV_CON_SHIFT);
 
 	/* perilp1 hclk select gpll as source */
-	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
+	hclk_div = DIV_ROUND_UP(GPLL_HZ, PERILP1_HCLK_HZ) - 1;
 	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
 	       GPLL_HZ && (hclk_div <= 0x1f));
 
@@ -1207,6 +1209,9 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
 		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
 		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
+
+	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
+	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
 }
 
 static int rk3399_clk_probe(struct udevice *dev)

commit cadc8d74e2348c994fe805cbbec0a955bb4d333d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 26 15:03:00 2018 +0800

    clock: remove clk_set_defaults() in device core
    
    We do not need to assign-clock for every driver in Rockchip platform,
    only below module need this feature, remove it for boot time optimize:
    - GMAC (need set parent from dts)
    - CRU ARM clock (rockchip board will call set_armclk_rate() instead)
    - VOP (need set parent)
    
    Change-Id: Ie8facfb7499323f4649e0e1d908f850de1338e12
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index e3b15fd121..f2261d7c94 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -423,11 +423,6 @@ int device_probe(struct udevice *dev)
 			goto fail;
 	}
 
-	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
-	ret = clk_set_defaults(dev);
-	if (ret)
-		debug("%s clk_set_defaults failed %d\n", __func__, ret);
-
 	if (drv->probe) {
 		ret = drv->probe(dev);
 		if (ret) {
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 1eb7ce1aa1..172d423e2e 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -459,6 +459,11 @@ static int gmac_rockchip_probe(struct udevice *dev)
 	ulong rate;
 	int ret;
 
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
+
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
 		return ret;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 0d20bf1b53..74813bf3bd 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -241,10 +241,10 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->version = vop_data->version;
 	vop->max_output = vop_data->max_output;
 
-	/*
-	 * TODO:
-	 * Set Dclk pll parent
-	 */
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(crtc_state->dev);
+	if (ret)
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 
 	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
 	if (!ret)

commit 596700d74b5076e13a41492da9ada0dd2d8276f8
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Jul 26 15:25:16 2018 +0800

    make.sh: fix the broken of px3se loader/trust packing
    
    PX3SE loader/trust packing was broken since
      d443b7d make.sh: parse RKCHIP from .config
    
    This fixs px3se building with previous commit. And since we're
    here, detecting the variant gracefully.
    
    Change-Id: I5c7f5385a4cfd0d6beba842bd4766b77d8f67d88
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/make.sh b/make.sh
index 071f3f7787..aeef535c48 100755
--- a/make.sh
+++ b/make.sh
@@ -288,28 +288,27 @@ select_chip_info()
 	local target_board item value
 
 	# Read RKCHIP firstly from .config
-	count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
-	RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+	# The regular expression that matching:
+	#  - PX30, PX3SE
+	#  - RK????, RK????X
+	#  - RV????
+	local chip_reg='^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9ESX]{2,5}'
+	count=`egrep -c ${chip_reg} ${OUTDIR}/.config`
+	# Obtain the matching only
+	RKCHIP=`egrep -o ${chip_reg} ${OUTDIR}/.config`
 
 	if [ $count -eq 1 ]; then
-		RKCHIP=${RKCHIP%=*}
 		RKCHIP=${RKCHIP##*_}
 	elif [ $count -gt 1 ]; then
-		# Is RK3126 ?
-		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3126=y/p"`
-		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3126=y' ]; then
-			RKCHIP=RK3126
-		fi
-		# Is RK3326 ?
-		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3326=y/p"`
-		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3326=y' ]; then
-			RKCHIP=RK3326
-		fi
-		# Is RK3128X ?
-		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3128X=y/p"`
-		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3128X=y' ]; then
-			RKCHIP=RK3128X
-		fi
+		# Grep the RK CHIP variant
+		grep '^CONFIG_ROCKCHIP_PX3SE=y' ${OUTDIR}/.config > /dev/null \
+			&& RKCHIP=PX3SE
+		grep '^CONFIG_ROCKCHIP_RK3126=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3126
+		grep '^CONFIG_ROCKCHIP_RK3326=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3326
+		grep '^CONFIG_ROCKCHIP_RK3128X=y' ${OUTDIR}/.config >/dev/null \
+			&& RKCHIP=RK3128X
 	else
 		echo "Can't get Rockchip SoC definition in .config"
 		exit 1
@@ -463,7 +462,7 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ $TOS_TA -a $TOS ]; then
+		if [ x$TOS_TA != x -a x$TOS != x ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "Both trust.img and trust_with_ta.img are ready"

commit f094cb29545c1c03e4929fd812ac6b9a8b190e6a
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Thu Jul 26 15:22:20 2018 +0800

    rockchip: add PX3SE kconfig
    
    PX3SE is a variant of RK3128, especially the loader and trust img.
    
    Change-Id: I91f417957b5f3db503fdaa8f2f6c3271f46094b6
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index dd028bba50..dcce0cbd70 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -77,6 +77,12 @@ config ROCKCHIP_RK3126
 	  RK3126 can use most code from RK3128, but at some situations we have
 	  to distinguish between RK3126 and RK3128, so this macro gives help.
 	  It is usually selected in rk3126 board defconfig.
+
+config ROCKCHIP_PX3SE
+	bool "Support Rockchip PX3SE"
+	help
+	  PX3SE is a variant of RK3128, it shares codes with RK3128, but we still
+	  need this macro to distinguish PX3SE and RK3128.
 endif
 
 config ROCKCHIP_RK3066
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index c2e524e939..43e453a914 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_PX3SE=y
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y

commit 9b95292d1a5af3a58ddf751cc92f17213130d7b0
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Thu Jul 5 09:12:49 2018 +0800

    configs: evb-rk3326: enable CONFIG_FASTBOOT_OEM_UNLOCK
    
    Change-Id: I76bffc998986e5e4bd723b8e9649592f5bc1e63f
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 4f60418fb0..b78fb4f43b 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -29,6 +29,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_OEM_UNLOCK=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y

commit ce6becde2e570847b8a68aca301d40a3f40f9960
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Wed Jul 25 16:58:47 2018 +0800

    config/dts: px3se: Rockusb mode by Vol+ and reset
    
    Enalbe ADC keys to enter Rockusb mode by holding Vol Up
    key and reset.
    
    Change-Id: I2f17fccf890424049aff5946f439016ad76ea52d
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
index b434b922f7..4371b34cd8 100644
--- a/arch/arm/dts/px3se-evb.dts
+++ b/arch/arm/dts/px3se-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/input/input.h>
 #include "rk3128.dtsi"
 #include "rk3128-u-boot.dtsi"
 
@@ -13,6 +14,26 @@
 	model = "Rockchip PX3SE Evaluation board";
 	compatible = "rockchip,px3se-evb", "rockchip,px3se";
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <18000>;
+		};
+
+		vol-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <300000>;
+		};
+	};
+
 	chosen {
 		stdout-path = &uart1;
 	};
@@ -33,6 +54,10 @@
 	status = "okay";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &u2phy {
 	status = "okay";
 };
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index a36e775541..c2e524e939 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -2,18 +2,18 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -25,6 +25,8 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y

commit 8a7ae883f720f9b5b3758a5d01c245ede0fcebc0
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Wed Jul 25 09:42:06 2018 +0800

    fuel gauge: rk817: set different input current when different charger is detected
    
    The four power source types that are detected are:
    Standard downstream port (SDP)
    – This is a computer USB port capable of 500mA.
    Charging downstream port (CDP)
    - This is typically a powered USB hub capable of 1500mA.
    Dedicated charging port (DCP)
    - This is a standard wall charger capable of at least 1500mA.
    DCP without shorting D+/D-(FLOATING)
    - This is a non-standard wall charger capable of at least 1500mA.
    
    Change-Id: Icb3d3c02d9ef5dfbcabf0232743ad057c578dcf4
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 5e5f004ad1..5508150e72 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -198,6 +198,14 @@ enum charger_type {
 	UNDEF_CHARGER,
 };
 
+enum power_supply_type {
+	POWER_SUPPLY_TYPE_UNKNOWN = 0,
+	POWER_SUPPLY_TYPE_USB,		/* Standard Downstream Port */
+	POWER_SUPPLY_TYPE_USB_DCP,	/* Dedicated Charging Port */
+	POWER_SUPPLY_TYPE_USB_CDP,	/* Charging Downstream Port */
+	POWER_SUPPLY_TYPE_USB_FLOATING,	/* DCP without shorting D+/D- */
+};
+
 struct rk817_battery_device {
 	struct udevice *dev;
 	int				res_div;
@@ -924,17 +932,18 @@ static int rk817_bat_get_usb_state(struct rk817_battery_device *battery)
 	int charger_type;
 
 	switch (rk817_bat_dwc_otg_check_dpdm()) {
-	case 0:
+	case POWER_SUPPLY_TYPE_UNKNOWN:
 		if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
 		else
 			charger_type = NO_CHARGER;
 		break;
-	case 1:
-	case 3:
+	case POWER_SUPPLY_TYPE_USB:
 		charger_type = USB_CHARGER;
 		break;
-	case 2:
+	case POWER_SUPPLY_TYPE_USB_DCP:
+	case POWER_SUPPLY_TYPE_USB_CDP:
+	case POWER_SUPPLY_TYPE_USB_FLOATING:
 		charger_type = AC_CHARGER;
 		break;
 	default:

commit de440615aaa98f6362d36acf19da861ea142af18
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 25 10:20:57 2018 +0800

    make.sh: support specify table to assign index name of loader/trust ini file
    
    add gva-rk3229_defconfig to specify table
    
    Change-Id: I347b4d43fa241f75f7aa95897369174ec6229e3d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 76e04d3bd5..071f3f7787 100755
--- a/make.sh
+++ b/make.sh
@@ -1,4 +1,4 @@
-#!/bin/sh
+#!/bin/bash
 set -e
 BOARD=$1
 SUBCMD=$1
@@ -6,6 +6,18 @@ FUNCADDR=$1
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
+# @target board: defined in arch/arm/mach-rockchip/<soc>/Kconfig
+# @label: show build message
+# @loader: search for ini file to pack loader
+# @trust: search for ini file to pack trust
+#
+# "NA" means use default name reading from .config
+#
+# Format:           target board               label         loader      trust
+RKCHIP_INI_DESC=("CONFIG_TARGET_GVA_RK3229       NA          RK322XAT     NA"
+# to be add...
+                )
+
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
@@ -21,8 +33,11 @@ TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_a
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
-# Declare global INI file searching index name for every chip, update in fixup_platform_configure()
+# Declare global INI file searching index name for every chip, update in select_chip_info()
 RKCHIP=
+RKCHIP_LABEL=
+RKCHIP_LOADER=
+RKCHIP_TRUST=
 
 # Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
 RKTOOLS=
@@ -261,16 +276,18 @@ sub_commands()
 	esac
 }
 
-# Support platform special configure
-#	1. fixup chip name;
-#	2. fixup pack mode;
-#	3. fixup image size
-#	4. fixup ARM64 cpu boot with AArch32
-fixup_platform_configure()
+# We select chip info to do:
+#	1. RKCHIP: fixup platform configure
+#	2. RKCHIP_LOADER: search ini file to pack loader
+#	3. RKCHIP_TRUST: search ini file to pack trust
+#	4. RKCHIP_LABEL: show build message
+#
+# We read chip info from .config and 'RKCHIP_INI_DESC'
+select_chip_info()
 {
-	local count plat
+	local target_board item value
 
-# <1> Get RKCHIP for searching trust/loader ini files
+	# Read RKCHIP firstly from .config
 	count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
 	RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
 
@@ -298,7 +315,41 @@ fixup_platform_configure()
 		exit 1
 	fi
 
-# <2> Fixup rsa/sha pack mode for platforms
+	# Default use RKCHIP
+	RKCHIP_LABEL=${RKCHIP}
+	RKCHIP_LOADER=${RKCHIP}
+	RKCHIP_TRUST=${RKCHIP}
+
+	# Read from RKCHIP_INI_DESC
+	for item in "${RKCHIP_INI_DESC[@]}"
+	do
+		target_board=`echo $item | awk '{ print $1 }'`
+		if grep  -q "^${target_board}=y" ${OUTDIR}/.config ; then
+			value=`echo $item | awk '{ print $2 }'`
+			if [ "$value" != "NA" ]; then
+				RKCHIP_LABEL=${value};
+			fi
+			value=`echo $item | awk '{ print $3 }'`
+			if [ "$value" != "NA" ]; then
+				RKCHIP_LOADER=${value};
+			fi
+			value=`echo $item | awk '{ print $4 }'`
+			if [ "$value" != "NA" ]; then
+				RKCHIP_TRUST=${value};
+			fi
+		fi
+	done
+}
+
+# Fixup platform special configure
+#	1. fixup pack mode;
+#	2. fixup image size
+#	3. fixup ARM64 cpu boot with AArch32
+fixup_platform_configure()
+{
+	local count plat
+
+# <*> Fixup rsa/sha pack mode for platforms
 	# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
 	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
 		PLATFORM_RSA="--rsa 3"
@@ -308,7 +359,7 @@ fixup_platform_configure()
 	# other platforms use default configure
 	fi
 
-# <3> Fixup images size pack for platforms
+# <*> Fixup images size pack for platforms
 	if [ $RKCHIP = "RK3308" ]; then
 		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
 			PLATFORM_UBOOT_IMG_SIZE="--size 512 2"
@@ -319,7 +370,7 @@ fixup_platform_configure()
 		fi
 	fi
 
-# <4> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
+# <*> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
 	if [ $RKCHIP = "RK3308" ]; then
 		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
 			PLATFORM_AARCH32="AARCH32"
@@ -350,15 +401,15 @@ pack_loader_image()
 {
 	local mode=$1 files ini
 
-	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
 
 	if [ "${mode}" = 'all' ]; then
-		files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL*.ini`
 		for ini in $files
 		do
 			if [ -f "$ini" ]; then
@@ -367,8 +418,8 @@ pack_loader_image()
 			fi
 		done
 	else
-		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
-		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini
+		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP_LOADER}MINIALL.ini"
 	fi
 
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
@@ -380,20 +431,20 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini
 
 		cd - && mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}${PLATFORM_AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
 			return
 		fi
 
@@ -405,8 +456,8 @@ pack_trust_image()
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini|tr -d '\r'`
 
 		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
@@ -427,7 +478,7 @@ pack_trust_image()
 			exit 1
 		fi
 
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP_TRUST}TOS.ini"
 	fi
 }
 
@@ -435,14 +486,15 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${RKCHIP_LABEL}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 
 prepare
 select_toolchain
+select_chip_info
 fixup_platform_configure
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}

commit 504e252f281e061b02d854313bef7c42a6a8249f
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 20 15:13:55 2018 +0800

    driver: ram: rockhip: px30: add more sdram print info
    
    Change-Id: Idac5f78aec81c4c4a3e45150bf96e48415a1913b
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index a3ed63841a..7b28887404 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -734,15 +734,74 @@ static void enable_low_power(struct dram_info *dram,
 	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
 }
 
-static int print_dec2hex(int i)
+static void print_ddr_info(struct px30_sdram_params *sdram_params)
 {
-	int tmp;
+	u64 cap;
+	u32 bg;
+	u32 split;
 
-	tmp = (i % 10);
-	tmp |= ((i % 100) / 10) << 4;
-	tmp |= ((i % 1000) / 100) << 8;
+	split = readl(DDR_GRF_BASE_ADDR + DDR_GRF_SPLIT_CON);
+	bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+	switch (sdram_params->dramtype) {
+	case LPDDR3:
+		printascii("LPDDR3\n");
+		break;
+	case DDR3:
+		printascii("DDR3\n");
+		break;
+	case DDR4:
+		printascii("DDR4\n");
+		break;
+	case LPDDR2:
+		printascii("LPDDR2\n");
+		break;
+	default:
+		printascii("Unknown Device\n");
+		break;
+	}
 
-	return tmp;
+	printdec(sdram_params->ddr_freq);
+	printascii("MHz\n");
+	printascii("BW=");
+	printdec(8 << sdram_params->ch.bw);
+	printascii(" Col=");
+	printdec(sdram_params->ch.col);
+	printascii(" Bk=");
+	printdec(0x1 << sdram_params->ch.bk);
+	if (sdram_params->dramtype == DDR4) {
+		printascii(" BG=");
+		printdec(1 << bg);
+	}
+	printascii(" CS0 Row=");
+	printdec(sdram_params->ch.cs0_row);
+	if (sdram_params->ch.cs0_high16bit_row !=
+		sdram_params->ch.cs0_row) {
+		printascii("/");
+		printdec(sdram_params->ch.cs0_high16bit_row);
+	}
+	if (sdram_params->ch.rank > 1) {
+		printascii(" CS1 Row=");
+		printdec(sdram_params->ch.cs1_row);
+		if (sdram_params->ch.cs1_high16bit_row !=
+			sdram_params->ch.cs1_row) {
+			printascii("/");
+			printdec(sdram_params->ch.cs1_high16bit_row);
+		}
+	}
+	printascii(" CS=");
+	printdec(sdram_params->ch.rank);
+	printascii(" Die BW=");
+	printdec(8 << sdram_params->ch.dbw);
+
+	cap = get_cs_cap(sdram_params, 3);
+	if (sdram_params->ch.row_3_4)
+		cap = cap * 3 / 4;
+	else if (!(split & (1 << SPLIT_BYPASS_OFFSET)))
+		cap = cap / 2 + ((split & 0xff) << 24) / 2;
+
+	printascii(" Size=");
+	printdec(cap >> 20);
+	printascii("MB\n");
 }
 
 /*
@@ -767,26 +826,6 @@ static int sdram_init_(struct dram_info *dram,
 	rkclk_ddr_reset(dram, 1, 1, 1, 0);
 	rkclk_configure_ddr(dram, sdram_params);
 
-	if (pre_init == 1) {
-		switch (sdram_params->dramtype) {
-		case DDR3:
-			printascii("DDR3\n");
-			break;
-		case DDR4:
-			printascii("DDR4\n");
-			break;
-		case LPDDR2:
-			printascii("LPDDR2\n");
-			break;
-		case LPDDR3:
-		default:
-			printascii("LPDDR3\n");
-			break;
-		}
-		printhex4(print_dec2hex(sdram_params->ddr_freq));
-		printascii("MHz\n");
-	}
-
 	/* release phy srst to provide clk to ctrl */
 	rkclk_ddr_reset(dram, 1, 1, 0, 0);
 	udelay(10);
@@ -1159,8 +1198,6 @@ int sdram_init(void)
 	struct px30_sdram_params *sdram_params;
 	int ret = 0;
 
-	printascii("DDR Init V1.07\n");
-
 	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;
 	dram_info.pctl = (void *)DDRC_BASE_ADDR;
 	dram_info.grf = (void *)GRF_BASE_ADDR;
@@ -1175,6 +1212,8 @@ int sdram_init(void)
 	if (ret)
 		goto error;
 
+	print_ddr_info(sdram_params);
+
 	printascii("out\n");
 	return ret;
 error:

commit b68c9a795ba6fdd7da85888f0d007f58c3b65381
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 20 15:46:49 2018 +0800

    rockchip: px30: add setting QOS Priority in TPL
    
    Change-Id: I26cbf7c3cd88c27c81f5bd80657348611857ae8d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 4caafb7a82..02b2fd27ad 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -16,7 +16,12 @@
 #include <asm/arch/cru_px30.h>
 #include <dt-bindings/clock/px30-cru.h>
 
-#define PMU_PWRDN_CON	0xff000018
+#define PMU_PWRDN_CON			0xff000018
+
+#define SERVICE_CORE_ADDR		0xff508000
+#define QOS_PRIORITY			0x08
+
+#define QOS_PRIORITY_LEVEL(h, l)	((((h) & 3) << 8) | ((l) & 3))
 
 static struct mm_region px30_mem_map[] = {
 	{
@@ -49,6 +54,11 @@ int arch_cpu_init(void)
 	/* Enable PD_VO (default disable at reset) */
 	rk_clrreg(PMU_PWRDN_CON, 1 << 13);
 
+#ifdef CONFIG_TPL_BUILD
+	/* Set cpu qos priority */
+	writel(QOS_PRIORITY_LEVEL(1, 1), SERVICE_CORE_ADDR + QOS_PRIORITY);
+#endif
+
 	return 0;
 }
 

commit ebb6c43980f01a071054604fe9f952cd40f9cdcb
Author: YouMin Chen <cym@rock-chips.com>
Date:   Mon Jul 23 19:57:20 2018 +0800

    rockchip: board: compulsory execution board_debug_uart_init
    
    Insure if defined CONFIG_SUPPORT_SPL but not use SPL bin,
    board_debug_uart_init still have be called.
    
    Change-Id: I2e8a7bf1cfb4e6ec4a916983eb13652afe8c8af2
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index a474cf0a5b..233f0b6f9a 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -208,9 +208,8 @@ int board_init(void)
 {
 	int ret;
 
-#if !defined(CONFIG_SUPPORT_SPL)
 	board_debug_uart_init();
-#endif
+
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif

commit ad9ba815b167f90f2d0933029950189dd784d745
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 24 16:37:58 2018 +0800

    rockchip: add rk3128x support
    
    Change-Id: I52193b8f78cfc4b88af7959b74f1c0dedcf75b7c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d6b5c91f80..dd028bba50 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -140,6 +140,16 @@ config ROCKCHIP_RK322X
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK322X
+
+config ROCKCHIP_RK3128X
+	bool "Support Rockchip RK3128X "
+	help
+	  RK3128X can use most code from RK322X, but at some situations we have
+	  to distinguish between RK3128X and RK322X, so this macro gives help.
+	  It is usually selected in RK3128X board defconfig.
+endif
+
 config ROCKCHIP_RK3288
 	bool "Support Rockchip RK3288"
 	select CPU_V7
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index bdf96bb9bf..15baad390e 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -79,7 +79,11 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 #elif defined(CONFIG_ROCKCHIP_RK3126) || defined(CONFIG_ROCKCHIP_RK3128)
 		chip_info[0] = 0x33313241;
 #elif defined(CONFIG_ROCKCHIP_RK322X)
+#if defined(CONFIG_ROCKCHIP_RK3128X)
+		chip_info[0] = 0x33313258;
+#else
 		chip_info[0] = 0x33323241;
+#endif
 #elif defined(CONFIG_ROCKCHIP_RK3328)
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
diff --git a/configs/rk3128x_defconfig b/configs/rk3128x_defconfig
new file mode 100644
index 0000000000..63fa63940e
--- /dev/null
+++ b/configs/rk3128x_defconfig
@@ -0,0 +1,111 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_ROCKCHIP_RK3128X=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3229=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit ce995491809e3e09e0ca6d98a2c958808d1b10c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 24 16:38:09 2018 +0800

    make.sh: add rk3128x support
    
    Change-Id: I44a409e519c520cb6da5088a45b2ae197cda632d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 4b84bfd446..76e04d3bd5 100755
--- a/make.sh
+++ b/make.sh
@@ -288,6 +288,11 @@ fixup_platform_configure()
 		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3326=y' ]; then
 			RKCHIP=RK3326
 		fi
+		# Is RK3128X ?
+		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3128X=y/p"`
+		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3128X=y' ]; then
+			RKCHIP=RK3128X
+		fi
 	else
 		echo "Can't get Rockchip SoC definition in .config"
 		exit 1

commit 60f62d2692e5160ff01ba922beefaed4a5b77334
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 24 12:24:07 2018 +0800

    mmc: dw_mmc: print a caution when find ciu-sample fail
    
    BUG: If not find ciu-sample, probe will fail. This make
    mmc device unusable.
    
    Change-Id: I86310cd2bc84cea5a81b72d103c8947ed4c1b07b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 3a25209f62..6e55ec4538 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -254,7 +254,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 
 	ret = clk_get_by_name(dev, "ciu-sample", &priv->sample_clk);
 	if (ret < 0)
-		return ret;
+		printf("Caution: find clock fail, not support hs200!\n");
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |

commit c30a11ade1b7c63933570d39503852adedd8f015
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 22 22:06:12 2018 +0800

    configs: evb-rk3326: enable vendor partition
    
    Change-Id: Icfdad9a26d7179d6f2aa2b1e0b82c94a7962bf8e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index de933e1251..4f60418fb0 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"

commit ef2fbb3d6dc5d70e1f0b99851b47f228c176cafd
Author: Xing Zheng <zhengxing@rock-chips.com>
Date:   Mon Jul 23 20:43:35 2018 +0800

    arm: dts: rk3308-evb: remove 'mmc-hs200-1_8v' property
    
    Change-Id: I015b542e751db29278af8f9a485894aef8ccf9d5
    Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 87012226ba..862c628fed 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -276,7 +276,6 @@
 
 &emmc {
 	cap-mmc-highspeed;
-	mmc-hs200-1_8v;
 	supports-emmc;
 	non-removable;
 	num-slots = <1>;

commit 121de4078fd2792375e7af3f29ce55fc842e8b8d
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Jul 23 11:33:03 2018 +0800

    video/drm: edp: Move enable video into config_video()
    
    We need to enable video before analogix_dp_is_video_stream_on(),
    so we can get the right video stream status.
    
    Change-Id: I43d28791616d6422a614666fe41e7d3bab528ced
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index 7b92e1b632..1e63d7f60c 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -612,6 +612,9 @@ static int analogix_dp_config_video(struct analogix_dp_device *dp)
 	/* Configure video slave mode */
 	analogix_dp_enable_video_master(dp, 0);
 
+	/* Enable video input */
+	analogix_dp_start_video(dp);
+
 	timeout_loop = 0;
 
 	for (;;) {
@@ -986,9 +989,6 @@ static int rockchip_analogix_dp_enable(struct display_state *state)
 	if (ret)
 		pr_err("unable to config video\n");
 
-	/* Enable video */
-	analogix_dp_start_video(dp);
-
 	return 0;
 }
 

commit b40c07fc2e802a4ff2f3f3fc2acc2fdab91d3281
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 21 12:21:38 2018 +0800

    test: rockchip: compile depends on dm config
    
    Change-Id: I8e3a7a8dedaa4615426b3d059746d2c080b481c0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 1930056ecd..4739485926 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -6,11 +6,11 @@
 
 obj-y += test-rockchip.o
 obj-y += test-timer.o
-obj-y += test-key.o
-obj-y += test-emmc.o
-obj-y += test-regulator.o
-obj-y += test-rknand.o
+obj-y += test-brom-dnl.o
+obj-$(CONFIG_DM_KEY) += test-key.o
+obj-$(CONFIG_MMC) += test-emmc.o
+obj-$(CONFIG_DM_REGULATOR)+= test-regulator.o
+obj-$(CONFIG_RKNAND) += test-rknand.o
 obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
-obj-y += test-brom-dnl.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += test-vendor-storage.o
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 757a47eddc..29a4fc3dae 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -15,17 +15,26 @@ typedef struct board_module {
 
 static board_module_t g_board_modules[] = {
 	{ .name = "timer",	.test = board_timer_test },
+	{ .name = "brom",	.test = board_brom_dnl_test },
+
+#if defined(CONFIG_DM_KEY)
 	{ .name = "key",	.test = board_key_test },
+#endif
+#if defined(CONFIG_MMC)
 	{ .name = "emmc",	.test = board_emmc_test },
+#endif
+#if defined(CONFIG_DM_REGULATOR)
 	{ .name = "regulator",	.test = board_regulator_test },
+#endif
+#if defined(CONFIG_RKNAND)
 	{ .name = "rknand",	.test = board_rknand_test },
+#endif
 #if defined(CONFIG_GMAC_ROCKCHIP)
 	{ .name = "eth",        .test = board_eth_test },
 #endif
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
-	{ .name = "brom_dnl",	.test = board_brom_dnl_test},
 #if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
 	{ .name = "vendor",	.test = board_vendor_storage_test },
 #endif
@@ -34,7 +43,7 @@ static board_module_t g_board_modules[] = {
 static void help(void)
 {
 	printf("Command: rktest [module] [args...]\n\n"
-	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom_dnl|vendor\n"
+	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom|vendor\n"
 	       "  - args: depends on module\n");
 }
 

commit 16cc62c811841a908165cc307232fbad1d6ffb69
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jul 16 10:54:07 2018 +0800

    mmc: dw_mmc: support mmc hs200
    
    we can set mmc-hs200-1_8v to the node of emmc
    in the dts to support hs200.
    
    Change-Id: I5fa195505b877449864f294564cfc33bcd4202e5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 001d31e0e2..3a25209f62 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -280,6 +280,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	}
 #endif
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
+	if (dev_read_bool(dev, "mmc-hs200-1_8v"))
+		plat->cfg.host_caps |= MMC_MODE_HS200;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;

commit 68995a9bef213fe8abdd123f7717f15f5dc01893
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 21 11:18:27 2018 +0800

    dm: key: remove deprecated platform_read_key()
    
    Change-Id: I88af911581b94f59504124786cb1adaa82dae12f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 6fc0decfab..43ed0ddd38 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -196,11 +196,6 @@ out:
 	return keyval;
 }
 
-int platform_key_read(int code)
-{
-	return KEY_NOT_EXIST;
-}
-
 UCLASS_DRIVER(key) = {
 	.id		= UCLASS_KEY,
 	.name		= "key",
diff --git a/include/key.h b/include/key.h
index 36812f748c..a1c610f993 100644
--- a/include/key.h
+++ b/include/key.h
@@ -62,7 +62,4 @@ int key_is_pressed(int keyval);
 /* Read key */
 int key_read(int code);
 
-/* deprecated */
-int platform_key_read(int code);
-
 #endif

commit fd62311e5361c74bbc92ed3c5de5af8f75017d25
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 20 18:13:28 2018 +0800

    power: charge animation: fix i2c failed issue
    
    i2c maybe interrpted by power key interrupt, so we need to
    disable local irq when i2c transfer.
    
    Change-Id: Ifd4c1f15ebab25c7fa54e4386c72e5731bc821b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index a9cf41b361..fef2bd6584 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -143,12 +143,6 @@ static int check_key_press(struct udevice *dev)
 
 static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
-	/*
-	 * TODO: enter low power mode:
-	 * 3. auto turn off screen when timout;
-	 * 4. power key wakeup;
-	 * 5. timer period wakeup for pmic fg
-	 */
 	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
 		putc('1');
@@ -410,6 +404,13 @@ static int charge_animation_show(struct udevice *dev)
 
 		debug("step1 (%d)... \n", screen_on);
 
+		/*
+		 * Most fuel gauge is I2C interface, it shouldn't be interrupted
+		 * during tansfer. The power key event depends on interrupt, so
+		 * so we should disable local irq when update fuel gauge.
+		 */
+		local_irq_disable();
+
 		/* Step1: Is charging now ? */
 		charging = fuel_gauge_get_chrg_online(fg);
 		if (charging <= 0) {
@@ -447,6 +448,9 @@ static int charge_animation_show(struct udevice *dev)
 			continue;
 		}
 		first_poll_fg = 0;
+
+		local_irq_enable();
+
 show_images:
 		/*
 		 * Just for debug, otherwise there will be nothing output which

commit 93aee2d9030fdd7fc67def2e10c0f9b4f4f6a74a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 20 18:12:05 2018 +0800

    power: charge animation: fix auto off and optimise images show
    
    - fix auto off screen issue;
    - don't call charge_show_bmp() unless image changed;
    
    Change-Id: I6474c8ef55617883da2ba4abb4da240a770e0d93
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 09a4f80cc6..a9cf41b361 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -115,6 +115,10 @@ static int check_key_press(struct udevice *dev)
 	state = key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
+	else if (state == KEY_PRESS_DOWN)
+		printf("power key pressed...\n");
+	else if (state == KEY_PRESS_LONG_DOWN)
+		printf("power key long pressed...\n");
 
 	/* Fixup key state for following cases */
 	if (pdata->auto_wakeup_interval) {
@@ -126,7 +130,8 @@ static int check_key_press(struct udevice *dev)
 			}
 		}
 	} else if (pdata->auto_off_screen_interval) {
-		if (get_timer(priv->auto_screen_off_timeout) >
+		if (priv->auto_screen_off_timeout &&
+		    get_timer(priv->auto_screen_off_timeout) >
 		    pdata->auto_off_screen_interval * 1000) {	/* 1000ms */
 			state = KEY_PRESS_DOWN;
 			printf("Auto screen off\n");
@@ -308,7 +313,7 @@ static int charge_animation_show(struct udevice *dev)
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
 	ulong delta;
 	ulong ms = 0, sec = 0;
-	int start_idx = 0, show_idx = -1;
+	int start_idx = 0, show_idx = -1, old_show_idx = IMAGE_SHOW_RESET;
 	int soc, voltage, current, key_state;
 	int i, charging = 1, ret;
 	int boot_mode;
@@ -441,7 +446,6 @@ static int charge_animation_show(struct udevice *dev)
 			printf("get current failed: %d\n", current);
 			continue;
 		}
-
 		first_poll_fg = 0;
 show_images:
 		/*
@@ -510,9 +514,12 @@ show_images:
 
 		/* Step3: show images */
 		if (screen_on) {
-			debug("SHOW: %s\n", image[show_idx].name);
-			charge_show_bmp(image[show_idx].name);
-
+			/* Don't call 'charge_show_bmp' unless image changed */
+			if (old_show_idx != show_idx) {
+				old_show_idx = show_idx;
+				debug("SHOW: %s\n", image[show_idx].name);
+				charge_show_bmp(image[show_idx].name);
+			}
 			/* Re calculate timeout to off screen */
 			if (priv->auto_screen_off_timeout == 0)
 				priv->auto_screen_off_timeout = get_timer(0);
@@ -543,6 +550,8 @@ show_images:
 		 */
 		key_state = check_key_press(dev);
 		if (key_state == KEY_PRESS_DOWN) {
+			old_show_idx = IMAGE_SHOW_RESET;
+
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
 				charge_show_bmp(NULL);

commit 5e80474146f4ad79f062bad14d022a10e6f6109d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 20:33:50 2018 +0800

    power: charge animation: add poll time to update fuel gauge
    
    Usually, fuel gauge is a i2c device and we had better set a
    poll seconds to update it, which can reduce i2c read/write.
    
    Change-Id: I192e8229d3b6b7f8887a38296314e69b9dc30753
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 63e82cd95d..09a4f80cc6 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -29,6 +29,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define IMAGE_SHOW_RESET			-1
+#define FUEL_GAUGE_POLL_MS			1000
 
 struct charge_image {
 	const char *name;
@@ -305,11 +306,13 @@ static int charge_animation_show(struct udevice *dev)
 	bool ever_lowpower_screen_off = false;
 	bool screen_on = true;
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
+	ulong delta;
 	ulong ms = 0, sec = 0;
 	int start_idx = 0, show_idx = -1;
 	int soc, voltage, current, key_state;
 	int i, charging = 1, ret;
 	int boot_mode;
+	int first_poll_fg = 1;
 
 /*
  * Check sequence:
@@ -386,9 +389,20 @@ static int charge_animation_show(struct udevice *dev)
 	printf("Enter U-Boot charging mode\n");
 
 	charge_start = get_timer(0);
+	delta = get_timer(0);
 
 	/* Charging ! */
 	while (1) {
+		/*
+		 * At the most time, fuel gauge is usually a i2c device, we
+		 * should avoid read/write all the time. We had better set
+		 * poll seconds to update fuel gauge info.
+		 */
+		if (!first_poll_fg && get_timer(delta) < FUEL_GAUGE_POLL_MS)
+			goto show_images;
+
+		delta = get_timer(0);
+
 		debug("step1 (%d)... \n", screen_on);
 
 		/* Step1: Is charging now ? */
@@ -428,6 +442,8 @@ static int charge_animation_show(struct udevice *dev)
 			continue;
 		}
 
+		first_poll_fg = 0;
+show_images:
 		/*
 		 * Just for debug, otherwise there will be nothing output which
 		 * is not good to know what happen.

commit 787a62ebebd74b39304524c7f792c1aa4dbd53c4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:57:56 2018 +0800

    power: charge animation: use read_key() to read power key
    
    Change-Id: Id8218f0aa8d192baaa347d6e76ee2d0f002d9c6b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 519a3a81c9..63e82cd95d 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -111,7 +111,7 @@ static int check_key_press(struct udevice *dev)
 	struct charge_animation_priv *priv = dev_get_priv(dev);
 	u32 state;
 
-	state = platform_key_read(KEY_POWER);
+	state = key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
@@ -640,7 +640,7 @@ static int charge_animation_probe(struct udevice *dev)
 	priv->fg = fg;
 
 	/* Get PWRKEY: used for wakeup and turn off/on LCD */
-	ret = platform_key_read(KEY_POWER);
+	ret = key_read(KEY_POWER);
 	if (ret == KEY_NOT_EXIST) {
 		printf("Can't find power key\n");
 		return -EINVAL;

commit 8c0a5f1c64e1b3818cce61ee1922fa1892432b6e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 20:25:45 2018 +0800

    configs: rk3328: enable keys
    
    Change-Id: I07e774f925085359084ded1df1623aba1ad6530d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index cd89448594..e9af89c26b 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -60,6 +60,9 @@ CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit dfd935fcd3593383a9d04539d118a0bb7d781fa8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:55:24 2018 +0800

    rockchip: add a generic way to read recovery key
    
    use key_read() interface, provided by dm key.
    
    Change-Id: Ic68186efe2fa5c0e57fcfc166615814755b60cb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index ce5830eedf..8a20a3a31e 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -13,6 +13,7 @@
 #include <fdtdec.h>
 #include <boot_rkimg.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <key.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -42,7 +43,17 @@ void set_back_to_bootrom_dnl_flag(void)
 
 __weak int rockchip_dnl_key_pressed(void)
 {
-#if defined(CONFIG_ADC)
+	int keyval = false;
+
+/*
+ * This is a generic interface to read key
+ */
+#if defined(CONFIG_DM_KEY)
+	keyval = key_read(KEY_VOLUMEUP);
+
+	return key_is_pressed(keyval);
+
+#elif defined(CONFIG_ADC)
 	const void *blob = gd->fdt_blob;
 	unsigned int val;
 	int channel = 1;
@@ -66,9 +77,9 @@ __weak int rockchip_dnl_key_pressed(void)
 		return true;
 	else
 		return false;
-#else
-	return false;
 #endif
+
+	return keyval;
 }
 
 void devtype_num_envset(void)

commit d240ec0518e055e26c4c78b72d8e01f83e732c93
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:49:03 2018 +0800

    test: rockchip: key: use key_read()
    
    key_read() is a new dm key interface.
    
    Change-Id: Idd950353749482a606085728bac2cac44e1bf58d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index 25718b0dbc..deef4e81c2 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -14,14 +14,33 @@
 
 int board_key_test(int argc, char * const argv[])
 {
+	int i, ret;
+	u32 key_code[] = {
+		KEY_VOLUMEUP,
+		KEY_VOLUMEDOWN,
+		KEY_POWER,
+		KEY_MENU,
+		KEY_ESC,
+		KEY_HOME,
+	};
+	const char *key_name[] = {
+		"volume up",
+		"volume down",
+		"power",
+		"menu",
+		"esc",
+		"home",
+	};
+
 	while (!ctrlc()) {
-		mdelay(100);
-		platform_key_read(KEY_VOLUMEUP);
-		platform_key_read(KEY_VOLUMEDOWN);
-		platform_key_read(KEY_POWER);
-		platform_key_read(KEY_HOME);
-		platform_key_read(KEY_MENU);
-		platform_key_read(KEY_ESC);
+		for (i = 0; i < ARRAY_SIZE(key_code); i++) {
+			mdelay(20);
+			ret = key_read(key_code[i]);
+			if (ret == KEY_PRESS_DOWN)
+				printf("'%s' key pressed...\n", key_name[i]);
+			else if (ret == KEY_PRESS_LONG_DOWN)
+				printf("'%s' key long pressed...\n", key_name[i]);
+		}
 	}
 
 	return 0;

commit 64048c537e998f015febb9bde9bf1ad42d869e8f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 19 19:43:59 2018 +0800

    dm: key: optimise framework and update drivers
    
    1. dm key framework takes over more generic jobs;
    2. key drivers remove unused codes and match new framework;
    3. only power key is registered as interrupt key;
    
    Change-Id: Icdda86f588af721b685f801ed251581f2fd85793
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
index bf25f10198..65645d01bc 100644
--- a/drivers/input/adc_key.c
+++ b/drivers/input/adc_key.c
@@ -15,19 +15,11 @@
 #include <key.h>
 #include <linux/input.h>
 
-#define ADC_MARGIN		30
-#define MAX_KEY_NR		10
-
-struct adc_key_priv {
-	u32 key_nr;
-};
-
 static int adc_keys_ofdata_to_platdata(struct udevice *dev)
 {
-	struct adc_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 adc_channels[2], i = 0, microvolt;
-	int vref, err;
+	struct input_key *key;
+	u32 adc_channels[2], microvolt;
+	int vref, ret;
 	ofnode node;
 
 	/* Get vref */
@@ -39,90 +31,54 @@ static int adc_keys_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	/* Get IO channel */
-	err = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
-	if (err) {
-		printf("failed to read 'io-channels' of %s key, ret=%d\n",
-		       key->name, err);
+	ret = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
+	if (ret) {
+		printf("failed to read 'io-channels', ret=%d\n", ret);
 		return -EINVAL;
 	}
 
 	/* Parse every adc key data */
 	dev_for_each_subnode(node, dev) {
-		key[i].name = ofnode_read_string(node, "label");
-		key[i].vref = vref;
-		key[i].margin = ADC_MARGIN;
-		key[i].channel = adc_channels[1];
-		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+		key = calloc(1, sizeof(struct input_key));
+		if (!key)
+			return -ENOMEM;
+
+		key->parent = dev;
+		key->type = ADC_KEY;
+		key->vref = vref;
+		key->channel = adc_channels[1];
+		key->name = ofnode_read_string(node, "label");
+		ret = ofnode_read_u32(node, "linux,code", &key->code);
+		if (ret) {
 			printf("%s: failed to read 'linux,code', ret=%d\n",
-			       key[i].name, key[i].code);
-			return -EINVAL;
-		}
-		if (ofnode_read_u32(node, "press-threshold-microvolt",
-				    &microvolt)) {
-			printf("%s: failed read 'press-threshold-microvolt', ret=%d\n",
-			       key[i].name, microvolt);
-			return -EINVAL;
-		}
-		/* Convert microvolt to adc value */
-		key[i].value = microvolt / (key[i].vref / 1024);
-
-		debug("%s: name=%s: code=%d, vref=%d, margin=%d, channel=%d, val=%d\n",
-		      __func__, key[i].name, key[i].code, key[i].vref,
-		      key[i].margin, key[i].channel, key[i].value);
-
-		/* Next node */
-		i++;
-		priv->key_nr = i;
-		if (i >= MAX_KEY_NR) {
-			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
-			return -EINVAL;
+			       key->name, ret);
+			free(key);
+			continue;
 		}
-	}
 
-	return 0;
-}
-
-static int adc_keys_read(struct udevice *dev, int code)
-{
-	struct adc_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int report = KEY_NOT_EXIST;
-	int max, min, i = 0;
-	unsigned int adcval;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].code != code)
+		ret = ofnode_read_u32(node, "press-threshold-microvolt",
+				      &microvolt);
+		if (ret) {
+			printf("%s: failed to read 'press-threshold-microvolt', ret=%d\n",
+			       key->name, ret);
+			free(key);
 			continue;
+		}
 
-		if (adc_channel_single_shot("saradc",
-					    key[i].channel, &adcval)) {
-			printf("%s: failed to read saradc\n", key[i].name);
-		} else {
-			/* Get min, max */
-			max = key[i].value + key[i].margin;
-			if (key[i].value > key[i].margin)
-				min = key[i].value - key[i].margin;
-			else
-				min = key[i].value;
+		/* Convert microvolt to adc value */
+		key->adcval = microvolt / (key->vref / 1024);
+		key_add(key);
 
-			/* Check */
-			if ((adcval <= max) && (adcval >= min)) {
-				report = KEY_PRESS_DOWN;
-				printf("'%s' key pressed down\n",
-				       key[i].name);
-			} else {
-				report = KEY_PRESS_NONE;
-			}
-		}
-		break;
+		debug("%s: name=%s: code=%d, vref=%d, channel=%d, microvolt=%d, adcval=%d\n",
+		      __func__, key->name, key->code, key->vref,
+		      key->channel, microvolt, key->adcval);
 	}
 
-	return report;
+	return 0;
 }
 
 static const struct dm_key_ops key_ops = {
-	.name = "adc_keys",
-	.read = adc_keys_read,
+	.name = "adc-keys",
 };
 
 static const struct udevice_id adc_keys_ids[] = {
@@ -136,6 +92,4 @@ U_BOOT_DRIVER(adc_keys) = {
 	.ops	= &key_ops,
 	.of_match = adc_keys_ids,
 	.ofdata_to_platdata = adc_keys_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
-	.priv_auto_alloc_size = sizeof(struct adc_key_priv),
 };
diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index d41fef6eda..34db0d868d 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -19,107 +19,93 @@
 #include <irq-generic.h>
 #include <irq-platform.h>
 
-#define MAX_KEY_NR	10
-
-struct gpio_key_priv {
-	u32 key_nr;
-};
-
 static void gpio_irq_handler(int irq, void *data)
 {
-	struct udevice *dev = data;
-	struct gpio_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int i;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].irq != irq)
-			continue;
-
-		/* up event */
-		if (irq_get_gpio_level(irq)) {
-			key[i].up_t = key_get_timer(0);
-			debug("%s: key down: %llu ms\n",
-			      key[i].name, key[i].down_t);
-		/* down event */
-		} else {
-			key[i].down_t = key_get_timer(0);
-			debug("%s: key up: %llu ms\n",
-			      key[i].name, key[i].up_t);
-		}
-		/* Must delay */
-		mdelay(10);
-		irq_revert_irq_type(irq);
+	struct input_key *key = data;
+
+	if (key->irq != irq)
+		return;
+
+	/* up event */
+	if (irq_get_gpio_level(irq)) {
+		key->up_t = key_timer(0);
+		debug("%s: key down: %llu ms\n", key->name, key->down_t);
+	/* down event */
+	} else {
+		key->down_t = key_timer(0);
+		debug("%s: key up: %llu ms\n", key->name, key->up_t);
 	}
+	/* Must delay */
+	mdelay(10);
+	irq_revert_irq_type(irq);
 }
 
 static int gpio_key_ofdata_to_platdata(struct udevice *dev)
 {
-	struct gpio_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 gpios[2], i = 0;
+	struct input_key *key;
+	u32 gpios[2];
 	ofnode node;
-	int irq;
+	int irq, ret;
 
 	dev_for_each_subnode(node, dev) {
-		key[i].name = ofnode_read_string(node, "label");
-		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
-			printf("failed read 'linux,code' of %s key\n",
-			       key[i].name);
-			return -EINVAL;
-		}
-		if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
-			printf("failed to read 'gpios' of %s key\n",
-			       key[i].name);
-			return -EINVAL;
+		key = calloc(1, sizeof(struct input_key));
+		if (!key)
+			return -ENOMEM;
+
+		key->parent = dev;
+		key->type = GPIO_KEY;
+		key->name = ofnode_read_string(node, "label");
+		ret = ofnode_read_u32(node, "linux,code", &key->code);
+		if (ret) {
+			printf("%s: failed read 'linux,code', ret=%d\n",
+			       key->name, ret);
+			free(key);
+			continue;
 		}
 
-		/* Must register as interrupt, be able to wakeup system */
-		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-		if (irq < 0) {
-			printf("failed to request irq for gpio, ret=%d\n", irq);
-			return irq;
+		/* Only register power key as interrupt */
+		if (key->code == KEY_POWER) {
+			ret = ofnode_read_u32_array(node, "gpios", gpios, 2);
+			if (ret) {
+				printf("%s: failed to read 'gpios', ret=%d\n",
+				       key->name, ret);
+				free(key);
+				continue;
+			}
+
+			/* Must register as interrupt, be able to wakeup system */
+			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+			if (irq < 0) {
+				printf("%s: failed to request irq, ret=%d\n",
+				       key->name, irq);
+				free(key);
+				continue;
+			}
+			key->irq = irq;
+			key_add(key);
+			irq_install_handler(irq, gpio_irq_handler, key);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+			irq_handler_enable(irq);
+		} else {
+			ret = gpio_request_by_name_nodev(node, "gpios", 0,
+							 &key->gpio,
+							 GPIOD_IS_IN);
+			if (ret) {
+				printf("%s: failed to request gpio, ret=%d\n",
+				       key->name, ret);
+			}
+
+			key_add(key);
 		}
-		key[i].irq = irq;
-		irq_install_handler(irq, gpio_irq_handler, dev);
-		irq_handler_enable(irq);
-		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-
-		debug("%s: name=%s: code=%d\n",
-		      __func__, key[i].name, key[i].code);
 
-		/* Next node */
-		i++;
-		priv->key_nr = i;
-		if (i >= MAX_KEY_NR) {
-			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
-			return -EINVAL;
-		}
+		debug("%s: name=%s: code=%d\n", __func__, key->name, key->code);
 	}
 
 	return 0;
 }
 
-static int gpio_key_read(struct udevice *dev, int code)
-{
-	struct gpio_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 report = KEY_NOT_EXIST;
-	int i = 0;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].code != code)
-			continue;
-		report = key_parse_gpio_event(&key[i]);
-		break;
-	}
-
-	return report;
-}
-
 static const struct dm_key_ops key_ops = {
 	.name = "gpio-keys",
-	.read = gpio_key_read,
 };
 
 static const struct udevice_id gpio_key_ids[] = {
@@ -133,6 +119,4 @@ U_BOOT_DRIVER(gpio_keys) = {
 	.of_match = gpio_key_ids,
 	.ops	= &key_ops,
 	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
-	.priv_auto_alloc_size = sizeof(struct gpio_key_priv),
 };
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index efa6001311..6fc0decfab 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -4,10 +4,12 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <dm.h>
-#include <key.h>
 #include <common.h>
+#include <adc.h>
 #include <dm.h>
+#include <key.h>
+
+static LIST_HEAD(key_list);
 
 static inline uint64_t arch_counter_get_cntpct(void)
 {
@@ -22,7 +24,7 @@ static inline uint64_t arch_counter_get_cntpct(void)
 	return cval;
 }
 
-uint64_t key_get_timer(uint64_t base)
+uint64_t key_timer(uint64_t base)
 {
 	uint64_t cntpct;
 
@@ -30,50 +32,51 @@ uint64_t key_get_timer(uint64_t base)
 	return (cntpct > base) ? (cntpct - base) : 0;
 }
 
-static int key_state_valid(int state)
-{
-	return (state >= KEY_PRESS_NONE && state < KEY_NOT_EXIST);
-}
-
-static int key_read(struct udevice *dev, int code)
-{
-	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->read)
-		return -ENOSYS;
-
-	return ops->read(dev, code);
-}
-
-int key_parse_adc_event(struct input_key *key, unsigned int adcval)
+/*
+ * What's simple and complex event mean?
+ *
+ * simple event:   key press down or none;
+ * complext event: key press down, long down or none;
+ */
+static int key_read_adc_simple_event(struct input_key *key, unsigned int adcval)
 {
-	int report = KEY_NOT_EXIST;
-	int max, min;
+	int max, min, margin = 30;
+	int keyval;
 
 	/* Get min, max */
-	max = key->value + key->margin;
-	if (key->value > key->margin)
-		min = key->value - key->margin;
+	max = key->adcval + margin;
+	if (key->adcval > margin)
+		min = key->adcval - margin;
 	else
-		min = key->value;
+		min = 0;
 
-	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
-	      __func__, key->name, max, min, adcval);
+	debug("%s: %s: val=%d, max=%d, min=%d, adcval=%d\n",
+	      __func__, key->name, key->adcval, max, min, adcval);
 
 	/* Check */
 	if ((adcval <= max) && (adcval >= min)) {
-		report = KEY_PRESS_DOWN;
-		printf("%s key pressed..\n", key->name);
+		keyval = KEY_PRESS_DOWN;
+		debug("%s key pressed..\n", key->name);
 	} else {
-		report = KEY_PRESS_NONE;
+		keyval = KEY_PRESS_NONE;
+	}
+
+	return keyval;
+}
+
+static int key_read_gpio_simple_event(struct input_key *key)
+{
+	if (!dm_gpio_is_valid(&key->gpio)) {
+		printf("%s: invalid gpio\n", key->name);
+		return KEY_PRESS_NONE;
 	}
 
-	return report;
+	return dm_gpio_get_value(&key->gpio) ? KEY_PRESS_DOWN : KEY_PRESS_NONE;
 }
 
-int key_parse_gpio_event(struct input_key *key)
+static int key_read_gpio_complex_event(struct input_key *key)
 {
-	u32 report = KEY_NOT_EXIST;
+	int keyval;
 
 	debug("%s: %s: up=%llu, down=%llu, delta=%llu\n",
 	      __func__, key->name, key->up_t, key->down_t,
@@ -81,7 +84,7 @@ int key_parse_gpio_event(struct input_key *key)
 
 	/* Possible this is machine power-on long pressed, so ignore this */
 	if (key->down_t == 0 && key->up_t != 0) {
-		report = KEY_PRESS_NONE;
+		keyval = KEY_PRESS_NONE;
 		goto out;
 	}
 
@@ -89,45 +92,113 @@ int key_parse_gpio_event(struct input_key *key)
 	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
 		key->up_t = 0;
 		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("%s key long pressed(hold)..\n", key->name);
+		keyval = KEY_PRESS_LONG_DOWN;
+		debug("%s key long pressed..\n", key->name);
 	} else if (key->down_t &&
-		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
+		   key_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
 		key->up_t = 0;
 		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("%s key long pressed..\n", key->name);
+		keyval = KEY_PRESS_LONG_DOWN;
+		debug("%s key long pressed(hold)..\n", key->name);
 	} else if ((key->up_t > key->down_t) &&
 		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
 		key->up_t = 0;
 		key->down_t = 0;
-		report = KEY_PRESS_DOWN;
-		printf("%s key short pressed..\n", key->name);
+		keyval = KEY_PRESS_DOWN;
+		debug("%s key short pressed..\n", key->name);
+	/* Possible in charge animation, we enable irq after fuel gauge updated */
+	} else if (key->up_t && key->down_t && (key->up_t == key->down_t)){
+		key->up_t = 0;
+		key->down_t = 0;
+		keyval = KEY_PRESS_DOWN;
+		debug("%s key short pressed..\n", key->name);
 	} else {
-		report = KEY_PRESS_NONE;
+		keyval = KEY_PRESS_NONE;
 	}
 
 out:
-	return report;
+	return keyval;
 }
 
-int platform_key_read(int code)
+static int key_read_gpio_interrupt_event(struct input_key *key)
+{
+	debug("%s: %s\n", __func__, key->name);
+
+	return key_read_gpio_complex_event(key);
+}
+
+int key_is_pressed(int keyval)
+{
+	return (keyval == KEY_PRESS_DOWN || keyval == KEY_PRESS_LONG_DOWN);
+}
+
+void key_add(struct input_key *key)
+{
+	if (!key)
+		return;
+
+	list_add_tail(&key->link, &key_list);
+}
+
+int key_read(int code)
 {
 	struct udevice *dev;
-	int report = KEY_NOT_EXIST;
-
-	for (uclass_first_device(UCLASS_KEY, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		debug("key dev.name = %s, code = %d\n", dev->name, code);
-		report = key_read(dev, code);
-		if (key_state_valid(report)) {
-			debug("key dev.name = %s, state=%d\n", dev->name, report);
+	struct input_key *key;
+	static int initialized;
+	unsigned int adcval;
+	int keyval = KEY_NOT_EXIST;
+	int found = 0, ret;
+
+	/* Initialize all key drivers */
+	if (!initialized) {
+		for (uclass_first_device(UCLASS_KEY, &dev);
+		     dev;
+		     uclass_next_device(&dev)) {
+			debug("%s: dev.name = %s\n", __func__, dev->name);
+			;
+		}
+	}
+
+	/* Search on the key list */
+	list_for_each_entry(key, &key_list, link) {
+		if (key->code == code) {
+			found = 1;
 			break;
 		}
 	}
+	if (!found)
+		goto out;
+
+	/* Is a adc key? */
+	if (key->type & ADC_KEY) {
+		ret = adc_channel_single_shot("saradc", key->channel, &adcval);
+		if (ret)
+			printf("%s: failed to read saradc, ret=%d\n",
+			       key->name, ret);
+		else
+			keyval = key_read_adc_simple_event(key, adcval);
+	/* Is a gpio key? */
+	} else if (key->type & GPIO_KEY) {
+		/* All pwrkey must register as an interrupt event */
+		if (key->code == KEY_POWER) {
+			keyval = key_read_gpio_interrupt_event(key);
+		} else {
+			keyval = key_read_gpio_simple_event(key);
+		}
+	} else {
+		printf("%s: invalid key type!\n", __func__);
+	}
 
-	return report;
+	debug("%s: key.name=%s, code=%d, keyval=%d\n",
+	      __func__, key->name, key->code, keyval);
+
+out:
+	return keyval;
+}
+
+int platform_key_read(int code)
+{
+	return KEY_NOT_EXIST;
 }
 
 UCLASS_DRIVER(key) = {
diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 3f10a2c3cb..fc3ee631e5 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -101,16 +101,6 @@ static struct reg_data rk805_init_reg[] = {
 	{ RK805_INT_STS_REG, 0xff },
 };
 
-static int rk8xx_pwrkey_read(struct udevice *dev, int code)
-{
-	struct input_key *key = dev_get_platdata(dev);
-
-	if (key->code != code)
-		return KEY_NOT_EXIST;
-
-	return key_parse_gpio_event(key);
-}
-
 static void pwrkey_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
@@ -145,13 +135,13 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 	/* fall event */
 	if (val & priv->pwron_fall_int) {
-		key->down_t = key_get_timer(0);
+		key->down_t = key_timer(0);
 		debug("%s: key down: %llu ms\n", __func__, key->down_t);
 	}
 
 	/* rise event */
 	if (val & priv->pwron_rise_int) {
-		key->up_t = key_get_timer(0);
+		key->up_t = key_timer(0);
 		debug("%s: key up: %llu ms\n", __func__, key->up_t);
 	}
 
@@ -188,9 +178,17 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 		return ret;
 	}
 
-	key->name = "power";
+	key->parent = dev;
+	key->name = "rk8xx_pwrkey";
 	key->code = KEY_POWER;
+	key->type = GPIO_KEY;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
+	if (irq < 0) {
+		printf("%s: failed to request irq, ret=%d\n", key->name, irq);
+		return irq;
+	}
+	key->irq = irq;
+	key_add(key);
 	irq_install_handler(irq, pwrkey_irq_handler, dev);
 	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 	irq_handler_enable(irq);
@@ -200,7 +198,6 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 
 static const struct dm_key_ops key_ops = {
 	.name = "rk8xx-pwrkey",
-	.read = rk8xx_pwrkey_read,
 };
 
 static int rk8xx_pwrkey_probe(struct udevice *dev)
diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index cf5e7a865a..8a58e1b0e1 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -19,54 +19,33 @@
 #include <irq-generic.h>
 #include <irq-platform.h>
 
-#define ADC_MARGIN		30
-#define MAX_KEY_NR		10
-
-struct rk_key_priv {
-	u32 key_nr;
-};
-
-enum {
-	INVAL_KEY = 0,
-	ADC_KEY,
-	GPIO_KEY,
-};
-
 static void gpio_irq_handler(int irq, void *data)
 {
-	struct udevice *dev = data;
-	struct rk_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int i;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].irq != irq)
-			continue;
-
-		/* up event */
-		if (irq_get_gpio_level(irq)) {
-			key[i].up_t = key_get_timer(0);
-			debug("%s: key down: %llu ms\n",
-			      key[i].name, key[i].down_t);
-		/* down event */
-		} else {
-			key[i].down_t = key_get_timer(0);
-			debug("%s: key up: %llu ms\n",
-			      key[i].name, key[i].up_t);
-		}
-		/* Must delay */
-		mdelay(10);
-		irq_revert_irq_type(irq);
+	struct input_key *key = data;
+
+	if (key->irq != irq)
+		return;
+
+	/* up event */
+	if (irq_get_gpio_level(irq)) {
+		key->up_t = key_timer(0);
+		debug("%s: key down: %llu ms\n", key->name, key->down_t);
+	/* down event */
+	} else {
+		key->down_t = key_timer(0);
+		debug("%s: key up: %llu ms\n", key->name, key->up_t);
 	}
+	/* Must delay */
+	mdelay(10);
+	irq_revert_irq_type(irq);
 }
 
 static int rk_keys_ofdata_to_platdata(struct udevice *dev)
 {
-	struct rk_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	u32 adc_channels[2], gpios[2], adcval, i = 0;
+	struct input_key *key;
+	u32 adc_channels[2], gpios[2], adcval;
+	int irq, ret;
 	ofnode node;
-	int irq;
 
 	/* Get IO channel */
 	if (dev_read_u32_array(dev, "io-channels", adc_channels, 2)) {
@@ -75,94 +54,83 @@ static int rk_keys_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	dev_for_each_subnode(node, dev) {
+		key = calloc(1, sizeof(struct input_key));
+		if (!key)
+			return -ENOMEM;
+
 		/* This is an ACD key */
 		if (!ofnode_read_u32(node, "rockchip,adc_value", &adcval)) {
-			key[i].name = ofnode_read_string(node, "label");
-			key[i].flag = ADC_KEY;
-			key[i].margin = ADC_MARGIN;
-			key[i].value = adcval;
-			key[i].channel = adc_channels[1];
-			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+			key->parent = dev;
+			key->name = ofnode_read_string(node, "label");
+			key->type = ADC_KEY;
+			key->adcval = adcval;
+			key->channel = adc_channels[1];
+			if (ofnode_read_u32(node, "linux,code", &key->code)) {
 				printf("%s: failed to read 'linux,code'\n",
-				       key[i].name);
-				return -EINVAL;
+				       key->name);
+				free(key);
+				continue;
 			}
 		/* This is a GPIO key */
 		} else {
-			key[i].name = ofnode_read_string(node, "label");
-			key[i].flag = GPIO_KEY;
-			if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
-				printf("%s: failed to read 'gpios'\n",
-				       key[i].name);
-				return -EINVAL;
-			}
-			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
-				printf("%s: failed read 'linux,code'\n",
-				       key[i].name);
-				return -EINVAL;
+			key->parent = dev;
+			key->type = GPIO_KEY;
+			key->name = ofnode_read_string(node, "label");
+			ret = ofnode_read_u32(node, "linux,code", &key->code);
+			if (ret) {
+				printf("%s: failed read 'linux,code', ret=%d\n",
+				       key->name, ret);
+				free(key);
+				continue;
 			}
 
-			/* Request irq */
-			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-			if (irq < 0) {
-				printf("%s: failed to request irq, ret=%d\n",
-				       __func__, irq);
-				return irq;
+			/* Only register power key as interrupt */
+			if (key->code == KEY_POWER) {
+				ret = ofnode_read_u32_array(node, "gpios",
+							    gpios, 2);
+				if (ret) {
+					printf("%s: failed to read 'gpios', ret=%d\n",
+					       key->name, ret);
+					free(key);
+					continue;
+				}
+
+				/* Request irq */
+				irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+				if (irq < 0) {
+					printf("%s: failed to request irq, ret=%d\n",
+					       __func__, irq);
+					free(key);
+					continue;
+				}
+				key->irq = irq;
+				key_add(key);
+				irq_install_handler(irq, gpio_irq_handler, key);
+				irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+				irq_handler_enable(irq);
+			} else {
+				ret = gpio_request_by_name_nodev(node, "gpios",
+						0, &key->gpio, GPIOD_IS_IN);
+				if (ret) {
+					printf("%s: failed to request gpio, ret=%d\n",
+					       key->name, ret);
+					free(key);
+					continue;
+				}
+				key_add(key);
 			}
-			key[i].irq = irq;
-			irq_install_handler(irq, gpio_irq_handler, dev);
-			irq_handler_enable(irq);
-			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
 		}
 
-		debug("%s: name=%s: code=%d, val=%d, channel=%d, flag=%d, margin=%d\n",
-		      __func__, key[i].name, key[i].code, key[i].value,
-		      key[i].channel, key[i].flag, key[i].margin);
-
-		/* Next node */
-		i++;
-		priv->key_nr = i;
-		if (i >= MAX_KEY_NR) {
-			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
-			return -EINVAL;
-		}
+		debug("%s: name=%s: code=%d, adcval=%d, channel=%d, type=%d\n",
+		      __func__, key->name, key->code, key->adcval,
+		      key->channel, key->type);
 	}
 
 	return 0;
 }
 
-static int rk_keys_read(struct udevice *dev, int code)
-{
-	struct rk_key_priv *priv = dev_get_priv(dev);
-	struct input_key *key = dev_get_platdata(dev);
-	int report = KEY_NOT_EXIST;
-	int i = 0;
-	unsigned int adcval;
-
-	for (i = 0; i < priv->key_nr; i++) {
-		if (key[i].code != code)
-			continue;
-
-		if (key[i].flag == ADC_KEY) {
-			if (adc_channel_single_shot("saradc",
-						    key[i].channel, &adcval)) {
-				printf("%s: failed to read saradc\n",
-				       key[i].name);
-			} else {
-				report = key_parse_adc_event(&key[i], adcval);
-			}
-		} else {
-			report = key_parse_gpio_event(&key[i]);
-		}
-		break;
-	}
-
-	return report;
-}
-
 static const struct dm_key_ops key_ops = {
 	.name = "rk-keys",
-	.read = rk_keys_read,
 };
 
 static const struct udevice_id rk_keys_ids[] = {
@@ -176,6 +144,4 @@ U_BOOT_DRIVER(rk_keys) = {
 	.ops	= &key_ops,
 	.of_match = rk_keys_ids,
 	.ofdata_to_platdata = rk_keys_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
-	.priv_auto_alloc_size = sizeof(struct rk_key_priv),
 };
diff --git a/include/key.h b/include/key.h
index ab4471b7a8..36812f748c 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,10 +7,17 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
+#include <asm-generic/gpio.h>
 #include <dt-bindings/input/linux-event-codes.h>
 
 #define KEY_LONG_DOWN_MS	2000
 
+enum {
+	INVAL_KEY = 0x0,
+	ADC_KEY   = 0x1,
+	GPIO_KEY  = 0x2,
+};
+
 enum key_state {
 	KEY_PRESS_NONE,	/* press without release */
 	KEY_PRESS_DOWN,	/* press -> release */
@@ -18,30 +25,44 @@ enum key_state {
 	KEY_NOT_EXIST,
 };
 
-struct dm_key_ops {
-	const char *name;
-	int (*read)(struct udevice *dev, int code);
-};
-
 struct input_key {
+	struct udevice *parent;
+	struct list_head link;
 	const char *name;
 	u32 code;
-	u32 channel;
-	u32 value;
-	u32 margin;
+	u8 type;
+
+	/* ADC key */
+	u32 adcval;
 	u32 vref;
-	int flag;
+	u8 channel;
 
+	/* GPIO key */
 	u32 irq;
+	struct gpio_desc gpio;
+
+	/* Event */
 	u64 up_t;
 	u64 down_t;
 };
 
-uint64_t key_get_timer(uint64_t base);
-int platform_key_read(int code);
+struct dm_key_ops {
+	const char *name;
+};
+
+/* Use it instead of get_timer() in key interrupt handler */
+uint64_t key_timer(uint64_t base);
 
-/* General interface for adc or gpio interrupt key event parse */
-int key_parse_gpio_event(struct input_key *key);
-int key_parse_adc_event(struct input_key *key, unsigned int adcval);
+/* Reister you key to dm key framework */
+void key_add(struct input_key *key);
+
+/* Confirm if your key value is a press event */
+int key_is_pressed(int keyval);
+
+/* Read key */
+int key_read(int code);
+
+/* deprecated */
+int platform_key_read(int code);
 
 #endif

commit 99b886601743614d976040d9c37aa9b539488228
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 11:53:40 2018 +0800

    rockchip: evb_rk3229: remove unused configure
    
    Change-Id: Ifcea5ff63d0a68d3ca6a327bbd216da7e4a7b842
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index f9868d8aea..db1a843e80 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -20,23 +20,9 @@
 #define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
-/* Enable gpt partition table */
-#undef CONFIG_PREBOOT
-#define CONFIG_PREBOOT \
-	"mmc dev 0; " \
-	"gpt guid mmc 0; " \
-	"if test $? = 1; then " \
-		"fastboot usb 0; " \
-	"fi; "
-
-#define CONFIG_SYS_BOOT_RAMDISK_HIGH
-
-/* Enable atags */
-#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
-#define CONFIG_INITRD_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
 
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
 #endif
 
 #endif

commit 70cdc99019eb29736b6789706110c695bb612014
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 20:36:21 2018 +0800

    configs: add rk322x_defconfig
    
    Change-Id: I3ead4f8d9d34aae340973f729aa7caf0054f6500
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk322x_defconfig b/configs/rk322x_defconfig
new file mode 100644
index 0000000000..40380018f0
--- /dev/null
+++ b/configs/rk322x_defconfig
@@ -0,0 +1,110 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3229=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit ade6d65fa167bb7a6f9e4c5af94229600a8fade2
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Fri Jul 20 15:46:33 2018 +0800

    rockchip: sdram_common: move BROM_BOOTSOURCE_ID_ADDR to sdram_common.h
    
    Change-Id: I35d33524ffb19da21bf12622b5cbfd9933ea5a49
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 33c8192f8e..d250759c11 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -78,6 +78,8 @@ enum {
 #define SYS_REG1_CS1_COL_SHIFT(ch)		(0 + (ch) * 2)
 #define SYS_REG1_CS1_COL_MASK			3
 
+#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
+
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
 
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bd09ce3917..d6b5c91f80 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -345,6 +345,7 @@ config ROCKCHIP_IRAM_START_ADDR
 	default 0x10080000 if ROCKCHIP_RK3188
 	default 0x10080000 if ROCKCHIP_RK322X
 	default 0xff700000 if ROCKCHIP_RK3288
+	default 0xfff80000 if ROCKCHIP_RK3308
 	default 0xff091000 if ROCKCHIP_RK3328
 	default 0xff8c0000 if ROCKCHIP_RK3368
 	default 0xff8c0000 if ROCKCHIP_RK3399
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 53ff85b00a..b0de24030a 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -10,12 +10,12 @@
 #include <ram.h>
 #include <spl.h>
 #include <asm/arch/bootrom.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch-rockchip/sys_proto.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
 void board_return_to_bootrom(void)
 {
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);

commit c6c6283c781a7a614d2ec1e7927150385c0ffd0b
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Sat Jul 14 17:36:21 2018 +0800

    rockchip: clk: rk3399: fix up the hdmi clk error
    
    make the dclk_vop div=1.
    
    Change-Id: I0faedbd557cddd55f93529d66f2f7815ce4c5f9e
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 8ece6e9578..74ef6a64ca 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -696,7 +696,6 @@ static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 	return rk3399_spi_get_clk(cru, clk_id);
 }
 
-#define RK3399_LIMIT_PLL_DCLK_VOP	(600 * 1000000)
 #define RK3399_LIMIT_PLL_ACLK_VOP	(400 * 1000000)
 
 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
@@ -727,14 +726,12 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 		     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
 		     (div - 1) << ACLK_VOP_DIV_CON_SHIFT);
 
-	div = DIV_ROUND_UP(RK3399_LIMIT_PLL_DCLK_VOP, hz);
-
 	if (readl(dclkreg_addr) & DCLK_VOP_PLL_SEL_MASK) {
-		if (pll_para_config(div * hz, &cpll_config))
+		if (pll_para_config(hz, &cpll_config))
 			return -1;
 		rkclk_set_pll(&cru->cpll_con[0], &cpll_config);
 	} else {
-		if (pll_para_config(div * hz, &vpll_config))
+		if (pll_para_config(hz, &vpll_config))
 			return -1;
 		rkclk_set_pll(&cru->vpll_con[0], &vpll_config);
 	}
@@ -742,7 +739,7 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 	rk_clrsetreg(dclkreg_addr,
 		     DCLK_VOP_DCLK_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
 		     DCLK_VOP_DCLK_SEL_DIVOUT << DCLK_VOP_DCLK_SEL_SHIFT |
-		     (div - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
 
 	return hz;
 }

commit c5c7b477dfb1a1b01802fa408a18643cc8d7c63b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jul 20 11:17:38 2018 +0800

    rockchip: dts: update mmc property "ciu-sample"
    
    dts property always use '-' instead of '_' for description
    
    Change-Id: I216549bec2850c614b2173ac4a3bae58da317379
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index 4a78bb5010..5f37fa8459 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -252,7 +252,7 @@
 		max-frequency = <37500000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 		<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		dmas = <&pdma 12>;
 		dma-names = "rx-tx";
 		fifo-depth = <0x100>;
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index cf63f34b70..a10937e044 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -513,7 +513,7 @@
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
@@ -528,7 +528,7 @@
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		bus-width = <8>;
 		default-sample-phase = <158>;
 		num-slots = <1>;
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 3192980c48..e05835267d 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -454,7 +454,7 @@
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
@@ -467,7 +467,7 @@
 		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
@@ -481,7 +481,7 @@
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		bus-width = <8>;
 		default-sample-phase = <158>;
 		num-slots = <1>;
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index a1dad688b0..5189a16546 100644
--- a/arch/arm/dts/rk3288-veyron.dtsi
+++ b/arch/arm/dts/rk3288-veyron.dtsi
@@ -274,7 +274,7 @@
 	card-external-vcc-supply = <&wifi_regulator>;
 	clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, <&cru SCLK_SDIO0_DRV>,
 		 <&cru SCLK_SDIO0_SAMPLE>, <&rk808 RK808_CLKOUT1>;
-	clock-names = "biu", "ciu", "ciu_drv", "ciu_sample", "card_ext_clock";
+	clock-names = "biu", "ciu", "ciu-drv", "ciu-sample", "card-ext-clock";
 	keep-power-in-suspend;
 	non-removable;
 	num-slots = <1>;
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index f7654fa5b2..20adb0dece 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -191,7 +191,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0c0000 0x4000>;
@@ -203,7 +203,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
 			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0d0000 0x4000>;
@@ -215,7 +215,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
 			 <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0e0000 0x4000>;
@@ -227,7 +227,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0xff0f0000 0x4000>;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index e6df508c8f..94d39b1b35 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -480,7 +480,7 @@
 		max-frequency = <150000000>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 21b0971de3..70f432ced1 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -261,7 +261,7 @@
 		clock-freq-min-max = <400000 150000000>;
 		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
 			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";

commit d114ba00ec73f3f299d7a1ac8d9974afda4c92aa
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 12:02:35 2018 +0800

    core: dump: increase info length
    
    Change-Id: Ide57bc45fcdeb5fb158ae67d0c56a9f80ac4d8cf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 6c6b944453..1cc929203b 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -16,7 +16,7 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 	struct udevice *child;
 
 	/* print the first 11 characters to not break the tree-format. */
-	printf(" %-10.10s [ %c ]   %-10.10s  ", dev->uclass->uc_drv->name,
+	printf(" %-10.10s [ %c ]   %-25.25s  ", dev->uclass->uc_drv->name,
 	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ', dev->driver->name);
 
 	for (i = depth; i >= 0; i--) {
@@ -48,8 +48,8 @@ void dm_dump_all(void)
 
 	root = dm_root();
 	if (root) {
-		printf(" Class      Probed  Driver      Name\n");
-		printf("----------------------------------------\n");
+		printf(" Class      Probed        Driver               Name\n");
+		printf("----------------------------------------------------------\n");
 		show_devices(root, -1, 0);
 	}
 }

commit 68d7ed5765f6c6c783e94df473bb090db84c49c6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 11:55:49 2018 +0800

    rockchip: rk3368: do arch_cpu_init() not only when SPL
    
    Change-Id: I1ee279e0011c566517494de2f9898d6818463edb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index b00364305f..03c1b9b48f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -124,7 +124,6 @@ int arch_early_init_r(void)
 }
 #endif
 
-#ifdef CONFIG_SPL_BUILD
 static void cpu_axi_qos_prority_level_config(void)
 {
 	u32 level;
@@ -155,6 +154,7 @@ static void cpu_axi_qos_prority_level_config(void)
 	writel(level, ISP_W1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
 }
 
+#ifdef CONFIG_SPL_BUILD
 /*
  * The SPL (and also the full U-Boot stage on the RK3368) will run in
  * secure mode (i.e. EL3) and an ATF will eventually be booted before
@@ -216,9 +216,11 @@ static void sgrf_init(void)
 	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
 	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
 }
+#endif
 
 void board_debug_uart_init(void)
 {
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/*
 	 * N.B.: This is called before the device-model has been
 	 *       initialised. For this reason, we can not access
@@ -237,7 +239,6 @@ void board_debug_uart_init(void)
 		GPIO2D0_UART0_SIN       = (1 << 0),
 	};
 
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
 	/* Enable early UART0 on the RK3368 */
 	rk_clrsetreg(&grf->gpio2d_iomux,
 		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
@@ -263,9 +264,10 @@ int arch_cpu_init(void)
 	/* Cpu axi qos config */
 	cpu_axi_qos_prority_level_config();
 
+#ifdef CONFIG_SPL_BUILD
 	/* Reset security, so we can use DMA in the MMC drivers */
 	sgrf_init();
+#endif
 
 	return 0;
 }
-#endif

commit 465fe90ad97b37ce4818b3e021b83e0000619def
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Jul 18 11:28:28 2018 +0800

    drivers: rknand: zftl: fix hynix F16 64Gb NAND multi plane prog error issue
    
    3326: fix hynix F16 64Gb NAND multi plane prog error issue
    bug:
    [   15.257968] hynix RR 12 row=2000, count 12, status=-1
    [   15.257985] flash_complete_page_read 0 2000 error_ecc -1 1
    [   15.258000] blk= 20, page=0, ppa = 2000, status = ffffffff
    
    Change-Id: Ic7306aea8a55a06d68c73162676e048ffa02111d
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 6cf6fd60b1..ff7c3447d4 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-07-04
+ * date: 2018-07-18
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -1146,7 +1146,7 @@ flash_wait_device_ready_raw:
 	bhi	.L254
 	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 599
+	mov	w2, 602
 	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1562,7 +1562,7 @@ flash_start_page_read:
 	bhi	.L337
 	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
-	mov	w2, 741
+	mov	w2, 744
 	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1637,7 +1637,7 @@ flash_erase_duplane_block:
 	bhi	.L346
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 510
+	mov	w2, 513
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1746,7 +1746,7 @@ flash_erase_block_en:
 	bhi	.L361
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
-	mov	w2, 555
+	mov	w2, 558
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -1895,7 +1895,7 @@ flash_start_plane_read:
 	bhi	.L381
 	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 836
+	mov	w2, 839
 	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -2001,32 +2001,34 @@ flash_start_plane_read:
 flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR42
 	stp	x23, x24, [sp, 48]
+	add	x22, x22, :lo12:.LANCHOR42
 	adrp	x24, .LANCHOR41
-	stp	x21, x22, [sp, 32]
 	adrp	x23, .LANCHOR14
-	adrp	x22, .LANCHOR42
 	str	x25, [sp, 64]
 	add	x24, x24, :lo12:.LANCHOR41
-	add	x22, x22, :lo12:.LANCHOR42
 	add	x23, x23, :lo12:.LANCHOR14
 	mov	w25, w0
 	stp	x19, x20, [sp, 16]
-	mov	x20, 0
+	mov	x21, 0
 .L410:
-	lsl	x0, x20, 3
-	ldrb	w21, [x0, x24]
+	lsl	x0, x21, 3
+	ldrb	w19, [x0, x24]
 	mov	w0, 69
-	cmp	w21, 152
-	ccmp	w21, w0, 4, ne
+	cmp	w19, 152
+	ccmp	w19, w0, 4, ne
 	beq	.L401
-	cmp	w21, 44
+	cmp	w19, 44
+	mov	w0, 137
+	ccmp	w19, w0, 4, ne
 	bne	.L402
 .L401:
 	adrp	x0, .LANCHOR13
 	ldrb	w1, [x22]
 	cmp	w25, 1
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	ldr	x20, [x0, #:lo12:.LANCHOR13]
 	bne	.L403
 	tbz	x1, 0, .L402
 	ldr	w0, [x23]
@@ -2035,23 +2037,25 @@ flash_set_interface_mode:
 	add	x0, x0, :lo12:.LC36
 	bl	printf
 .L404:
-	add	x0, x19, x20, lsl 8
+	add	x0, x20, x21, lsl 8
 	mov	w1, 239
-	cmp	w21, 44
+	cmp	w19, 44
 	str	w1, [x0, 2056]
+	mov	w1, 137
+	ccmp	w19, w1, 4, ne
 	mov	w1, 1
 	bne	.L405
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L425:
+.L428:
 	str	w1, [x0, 2048]
 .L409:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 .L402:
-	add	x20, x20, 1
-	cmp	x20, 4
+	add	x21, x21, 1
+	cmp	x21, 4
 	bne	.L410
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
@@ -2064,7 +2068,7 @@ flash_set_interface_mode:
 .L405:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L425
+	b	.L428
 .L403:
 	tbz	x1, 2, .L402
 	ldr	w0, [x23]
@@ -2073,15 +2077,17 @@ flash_set_interface_mode:
 	add	x0, x0, :lo12:.LC37
 	bl	printf
 .L407:
-	add	x0, x19, x20, lsl 8
+	add	x0, x20, x21, lsl 8
 	mov	w1, 239
-	cmp	w21, 44
+	cmp	w19, 44
 	str	w1, [x0, 2056]
+	mov	w1, 137
+	ccmp	w19, w1, 4, ne
 	bne	.L408
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L425
+	b	.L428
 .L408:
 	mov	w1, 128
 	str	w1, [x0, 2052]
@@ -2145,7 +2151,7 @@ flash_read_id:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L427
+	bhi	.L430
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2156,7 +2162,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L427:
+.L430:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2198,67 +2204,59 @@ flash_read_spare:
 	.global	sandisk_prog_test_bad_block
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
-	stp	x29, x30, [sp, -48]!
-	mov	w4, w1
+	stp	x29, x30, [sp, -32]!
+	mov	w5, w1
 	adrp	x1, .LANCHOR13
 	and	x2, x0, 255
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR34
-	ldr	x19, [x1, #:lo12:.LANCHOR13]
-	add	x1, x20, :lo12:.LANCHOR34
-	str	x21, [sp, 32]
+	ldr	x4, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR34+29
+	str	x19, [sp, 16]
 	mov	x0, x2
+	ldrb	w1, [x1, #:lo12:.LANCHOR34+29]
 	add	x2, x2, 8
-	ldrb	w1, [x1, 29]
-	add	x2, x19, x2, lsl 8
-	cbz	w1, .L433
-.L447:
+	add	x2, x4, x2, lsl 8
+	cbz	w1, .L436
+.L446:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
-	add	x19, x19, x0
+	add	x4, x4, x0
 	mov	w0, 128
-	str	w0, [x19, 2056]
-	and	w0, w4, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
-	str	w0, [x19, 2052]
+	str	w0, [x4, 2056]
+	and	w0, w5, 255
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w5, 8
+	str	w0, [x4, 2052]
+	lsr	w0, w5, 16
+	str	w0, [x4, 2052]
 	mov	w0, 16
-	str	w0, [x19, 2056]
+	str	w0, [x4, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 112
-	str	w0, [x19, 2056]
+	str	w0, [x4, 2056]
 	mov	w0, 80
 	bl	timer_delay_ns
-	ldr	w2, [x19, 2048]
+	ldr	w2, [x4, 2048]
 	mov	w0, 5
-	ands	w21, w2, w0
+	ands	w19, w2, w0
 	beq	.L435
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	tbz	x0, 12, .L435
 	adrp	x0, .LC39
-	mov	w1, w4
+	mov	w1, w5
 	add	x0, x0, :lo12:.LC39
 	bl	printf
 .L435:
-	add	x20, x20, :lo12:.LANCHOR34
-	ldrb	w0, [x20, 30]
-	cbz	w0, .L432
-	str	w0, [x19, 2056]
-.L432:
-	mov	w0, w21
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L433:
+.L436:
 	mov	w1, 162
-	b	.L447
+	b	.L446
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
@@ -2288,48 +2286,48 @@ nandc_bch_sel:
 	cmp	w2, 9
 	adrp	x2, .LANCHOR13
 	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	bne	.L451
+	bne	.L450
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L458
+	beq	.L457
 	cmp	w0, 60
-	beq	.L459
+	beq	.L458
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L452:
+.L451:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L458:
+.L457:
 	mov	w1, 0
-	b	.L452
-.L459:
+	b	.L451
+.L458:
 	mov	w1, 3
-	b	.L452
-.L451:
+	b	.L451
+.L450:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L454
-.L457:
+	bne	.L453
+.L456:
 	and	w1, w1, -17
-.L455:
+.L454:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L454:
+.L453:
 	cmp	w0, 24
-	bne	.L456
+	bne	.L455
 	orr	w1, w1, 16
-	b	.L455
-.L456:
+	b	.L454
+.L455:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L455
-	b	.L457
+	bne	.L454
+	b	.L456
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
@@ -2339,10 +2337,10 @@ zftl_nandc_get_irq_status:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L465
+	bne	.L464
 	ldr	w0, [x0, 296]
 	ret
-.L465:
+.L464:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2385,7 +2383,7 @@ nandc_xfer_start:
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L471
+	bne	.L470
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
@@ -2398,13 +2396,13 @@ nandc_xfer_start:
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L472
+	cbz	w0, .L471
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x0, #:lo12:.LANCHOR45]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L472:
+.L471:
 	add	x21, x4, :lo12:.LANCHOR46
 	add	x0, x2, 63
 	and	w20, w20, 63
@@ -2447,13 +2445,13 @@ nandc_xfer_start:
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L470:
+.L469:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L471:
+.L470:
 	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
@@ -2469,7 +2467,7 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L474
+	cbz	w23, .L473
 	adrp	x0, .LANCHOR43
 	ubfx	x1, x1, 1, 7
 	ldr	x8, [x4, #:lo12:.LANCHOR46]
@@ -2480,11 +2478,11 @@ nandc_xfer_start:
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L476:
+.L475:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L477
-.L478:
+	bne	.L476
+.L477:
 	add	x21, x4, :lo12:.LANCHOR46
 	ldr	x0, [x4, #:lo12:.LANCHOR46]
 	and	w20, w20, 63
@@ -2520,8 +2518,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L470
-.L477:
+	b	.L469
+.L476:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2529,11 +2527,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L476
-.L474:
+	b	.L475
+.L473:
 	ldr	x1, [x4, #:lo12:.LANCHOR46]
 	str	w0, [x1]
-	b	.L478
+	b	.L477
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2554,10 +2552,10 @@ nandc_set_seed:
 	cmp	w1, 9
 	adrp	x1, .LANCHOR13
 	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L488
+	bne	.L487
 	str	w0, [x1, 520]
 	ret
-.L488:
+.L487:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2574,25 +2572,25 @@ zftl_flash_de_init:
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
 	ldrb	w0, [x19, #:lo12:.LANCHOR20]
-	cbz	w0, .L493
+	cbz	w0, .L492
 	adrp	x0, .LANCHOR42
 	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	tbz	x0, 0, .L493
+	tbz	x0, 0, .L492
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L493:
+.L492:
 	adrp	x3, .LANCHOR45
 	ldrb	w0, [x3, #:lo12:.LANCHOR45]
-	cbz	w0, .L494
+	cbz	w0, .L493
 	mov	w0, 0
 	strb	wzr, [x3, #:lo12:.LANCHOR45]
 	bl	nandc_set_seed
 	mov	w0, 1
 	strb	w0, [x3, #:lo12:.LANCHOR45]
-.L494:
+.L493:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2627,7 +2625,7 @@ buf_reinit:
 	adrp	x0, .LANCHOR49
 	add	x1, x0, :lo12:.LANCHOR49
 	mov	w2, 0
-.L508:
+.L507:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2637,7 +2635,7 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L508
+	bne	.L507
 	add	x0, x0, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -2662,49 +2660,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L516
+	bne	.L515
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L512
+	bne	.L511
 	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 74
 	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L512:
+.L511:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L510:
+.L509:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L516:
+.L515:
 	adrp	x0, .LANCHOR49
 	add	x2, x0, :lo12:.LANCHOR49
 	mov	x19, x0
-.L517:
+.L516:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L517
+	bne	.L516
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L514
+	bne	.L513
 	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 81
 	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L514:
+.L513:
 	add	x0, x19, :lo12:.LANCHOR49
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L510
+	b	.L509
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
@@ -2738,10 +2736,10 @@ buf_free:
 	adrp	x2, .LANCHOR50
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L522
+	cbz	w1, .L521
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L522
+	beq	.L521
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
 	add	x0, x2, :lo12:.LANCHOR50
@@ -2753,7 +2751,7 @@ buf_free:
 	add	w0, w0, 1
 	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
-.L522:
+.L521:
 	ldrb	w1, [x2, #:lo12:.LANCHOR50]
 	strb	w1, [x0]
 	adrp	x1, .LANCHOR51
@@ -2775,8 +2773,8 @@ buf_alloc:
 	adrp	x19, .LANCHOR51
 	and	w20, w0, 255
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L535
-.L538:
+	cbz	w0, .L534
+.L537:
 	adrp	x2, .LANCHOR50
 	adrp	x1, .LANCHOR49
 	add	x0, x1, :lo12:.LANCHOR49
@@ -2784,8 +2782,8 @@ buf_alloc:
 	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
 	mov	x4, x2
-	cbz	w20, .L536
-.L537:
+	cbz	w20, .L535
+.L536:
 	add	x1, x1, :lo12:.LANCHOR49
 	sbfiz	x3, x3, 6, 32
 	add	x2, x1, x3
@@ -2804,8 +2802,8 @@ buf_alloc:
 	mov	w1, -1
 	str	xzr, [x2, 16]
 	str	w1, [x2, 36]
-	b	.L534
-.L535:
+	b	.L533
+.L534:
 	mov	w2, 121
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC0
@@ -2813,18 +2811,18 @@ buf_alloc:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L538
-.L540:
+	cbnz	w0, .L537
+.L539:
 	mov	x0, 0
-.L534:
+.L533:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L536:
+.L535:
 	ldrb	w2, [x19, #:lo12:.LANCHOR51]
 	cmp	w2, 1
-	bne	.L537
-	b	.L540
+	bne	.L536
+	b	.L539
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2834,30 +2832,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L548
+	bne	.L547
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L552:
+.L551:
 	mov	w0, 1
 	ret
-.L549:
+.L548:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L550
+	bne	.L549
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L552
-.L548:
+	b	.L551
+.L547:
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
-.L550:
+.L549:
 	cmp	w2, 255
-	bne	.L549
+	bne	.L548
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2872,29 +2870,29 @@ buf_remove_free:
 	adrp	x19, .LANCHOR51
 	mov	x20, x0
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbnz	w0, .L554
+	cbnz	w0, .L553
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
 	mov	w2, 172
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L554:
+.L553:
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
-	cbz	w0, .L553
+	cbz	w0, .L552
 	mov	x1, x20
 	adrp	x0, .LANCHOR50
 	add	x0, x0, :lo12:.LANCHOR50
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L553
+	bne	.L552
 	ldrb	w0, [x19, #:lo12:.LANCHOR51]
 	sub	w0, w0, #1
 	strb	w0, [x19, #:lo12:.LANCHOR51]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L553:
+.L552:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -3002,11 +3000,11 @@ zftl_cache_flush:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L566
+	cbnz	w0, .L565
 	adrp	x0, .LANCHOR58
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
 	ret
-.L566:
+.L565:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -3070,14 +3068,14 @@ gc_add_sblk:
 	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L575
+	bhi	.L574
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
-	mov	w2, 258
+	mov	w2, 259
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L575:
+.L574:
 	adrp	x22, .LANCHOR9
 	uxtw	x19, w20
 	lsl	x26, x19, 1
@@ -3086,7 +3084,7 @@ gc_add_sblk:
 	adrp	x27, .LANCHOR7
 	ldrh	w21, [x0, x26]
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L576
+	tbz	x0, 8, .L575
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	mov	w4, w21
 	mov	w2, w24
@@ -3101,59 +3099,59 @@ gc_add_sblk:
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L576:
+.L575:
 	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, lsl 2
 	ldrb	w2, [x19, 2]
 	tst	w2, 224
-	bne	.L577
-	cbz	w21, .L597
+	bne	.L576
+	cbz	w21, .L596
 	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
-	mov	w2, 263
+	mov	w2, 264
 	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L597:
+.L596:
 	mov	w0, 0
-	b	.L574
-.L577:
+	b	.L573
+.L576:
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w0, w20
-	beq	.L597
+	beq	.L596
 	adrp	x21, .LANCHOR10
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w3, [x0, 48]
 	cmp	w3, w20
-	beq	.L597
+	beq	.L596
 	ldrh	w3, [x0, 16]
 	cmp	w3, w20
-	beq	.L597
+	beq	.L596
 	ldrh	w3, [x0, 80]
 	cmp	w3, w20
-	beq	.L597
+	beq	.L596
 	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
 	mov	w3, 0
-.L579:
+.L578:
 	cmp	w3, w4
-	bcc	.L580
-	cbnz	w24, .L584
+	bcc	.L579
+	cbnz	w24, .L583
 	adrp	x1, .LANCHOR63
 	ldrh	w5, [x1, #:lo12:.LANCHOR63]
 	cmp	w20, w5
-	beq	.L597
+	beq	.L596
 	adrp	x3, .LANCHOR64
 	add	x3, x3, :lo12:.LANCHOR64
 	mov	x1, 0
-.L583:
+.L582:
 	ldrh	w6, [x1, x3]
 	cmp	w20, w6
-	bne	.L582
+	bne	.L581
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L597
+	tbz	x0, 8, .L596
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w4, w20
 	ubfx	x2, x2, 5, 3
@@ -3162,23 +3160,23 @@ gc_add_sblk:
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-	b	.L597
-.L580:
+	b	.L596
+.L579:
 	ldrh	w5, [x1], 2
 	cmp	w5, w20
-	beq	.L597
+	beq	.L596
 	add	w3, w3, 1
-	b	.L579
-.L582:
+	b	.L578
+.L581:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L583
+	bne	.L582
 	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L585:
+.L584:
 	ldr	w0, [x23, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L586
+	tbz	x0, 8, .L585
 	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	adrp	x1, .LANCHOR61
 	mov	w5, w4
@@ -3190,23 +3188,23 @@ gc_add_sblk:
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L586:
+.L585:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L589:
+.L588:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L587
+	bne	.L586
 	strh	w20, [x0]
-	cbz	w24, .L588
+	cbz	w24, .L587
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L607:
+.L606:
 	mov	w0, 1
-.L574:
+.L573:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3214,21 +3212,21 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L584:
+.L583:
 	add	x19, x0, 392
-	b	.L585
-.L588:
+	b	.L584
+.L587:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x25, x0, x25, uxth 1
 	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
 	strh	w0, [x25, 120]
-	b	.L607
-.L587:
+	b	.L606
+.L586:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L589
-	b	.L607
+	bne	.L588
+	b	.L606
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
@@ -3257,10 +3255,10 @@ gc_write_completed:
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L610:
+.L609:
 	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L621
+	bne	.L620
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3268,7 +3266,7 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L621:
+.L620:
 	lsl	x1, x19, 6
 	add	x0, x24, :lo12:.LANCHOR49
 	add	x2, x0, x1
@@ -3276,7 +3274,7 @@ gc_write_completed:
 	ldr	w1, [x2, 52]
 	strb	w0, [x23]
 	ldrh	w25, [x2, 48]
-	cbz	w1, .L611
+	cbz	w1, .L610
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR62
 	add	x0, x0, :lo12:.LANCHOR62
@@ -3288,26 +3286,26 @@ gc_write_completed:
 	bl	printf
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 544
+	mov	w2, 545
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L611:
+.L610:
 	adrp	x26, .LANCHOR68
 	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L622
+	bne	.L621
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L612:
+.L611:
 	adrp	x0, .LANCHOR14
 	adrp	x28, .LANCHOR69
 	and	x21, x25, 65535
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L613
+	tbz	x0, 8, .L612
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	w3, w25
@@ -3317,54 +3315,54 @@ gc_write_completed:
 	add	x0, x0, :lo12:.LC44
 	mov	w1, w25
 	bl	printf
-.L613:
+.L612:
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	x27, x21
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L614
+	beq	.L613
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 551
+	mov	w2, 552
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L614:
+.L613:
 	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L615
+	beq	.L614
 	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L615
+	bne	.L614
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbnz	w0, .L615
+	cbnz	w0, .L614
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	mov	x0, 0
 	add	x21, x1, x21
-.L616:
+.L615:
 	cmp	w20, w0, uxth
-	bls	.L610
+	bls	.L609
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L616
-.L622:
+	b	.L615
+.L621:
 	mov	w20, 1
-	b	.L612
-.L615:
+	b	.L611
+.L614:
 	adrp	x19, .LANCHOR62
 	add	x19, x19, :lo12:.LANCHOR62
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w25, [x19, 316]
-.L617:
+.L616:
 	cmp	x20, x27
-	beq	.L610
+	beq	.L609
 	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	ldrb	w0, [x1, x27]
 	strb	w21, [x1, x27]
@@ -3378,7 +3376,7 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L617
+	b	.L616
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -3390,44 +3388,44 @@ gc_get_src_blk:
 	adrp	x0, .LANCHOR71
 	ldrb	w3, [x0, #:lo12:.LANCHOR71]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L634
+	cbz	w0, .L633
 	add	x1, x2, 392
 	mov	w4, 1
-.L635:
+.L634:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L639:
+.L638:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L637
+	beq	.L636
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L638
+	cbz	w4, .L637
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L634:
+.L633:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L640
+	cbz	w0, .L639
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L635
-.L638:
+	b	.L634
+.L637:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L637:
+.L636:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L639
+	bne	.L638
 	ret
-.L640:
+.L639:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3443,11 +3441,11 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L649
+	cbz	w1, .L648
 	adrp	x1, .LANCHOR51
 	ldrb	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, 1
-	bhi	.L649
+	bhi	.L648
 	ldrh	w19, [x0, 316]
 	adrp	x2, .LANCHOR73
 	adrp	x0, .LANCHOR72
@@ -3461,34 +3459,34 @@ gc_free_temp_buf:
 	csel	w1, w0, w1, ls
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
-.L644:
+.L643:
 	cmp	w19, w1
-	bcc	.L647
-.L649:
+	bcc	.L646
+.L648:
 	mov	w0, 0
-	b	.L642
-.L647:
+	b	.L641
+.L646:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L645
+	beq	.L644
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L645
+	cbnz	w3, .L644
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L646
+	tbz	x0, 8, .L645
 	ldr	x0, [x21, #:lo12:.LANCHOR69]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC45
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L646:
+.L645:
 	ldr	x0, [x21, #:lo12:.LANCHOR69]
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w1, -1
@@ -3497,14 +3495,14 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L642:
+.L641:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L645:
+.L644:
 	add	w19, w19, 1
-	b	.L644
+	b	.L643
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
@@ -3533,21 +3531,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L659
+	bne	.L658
 	mov	w1, w0
 	adrp	x0, .LANCHOR75
 	ldr	x0, [x0, #:lo12:.LANCHOR75]
-.L661:
+.L660:
 	b	_list_get_gc_head_node.isra.2
-.L659:
+.L658:
 	cmp	w1, 2
-	bne	.L660
+	bne	.L659
 	b	zftl_get_gc_node.part.9
-.L660:
+.L659:
 	mov	w1, w0
 	adrp	x0, .LANCHOR76
 	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L661
+	b	.L660
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3568,9 +3566,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L663
+	cbz	w19, .L662
 	mov	w0, w19
-.L662:
+.L661:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3578,9 +3576,9 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L663:
+.L662:
 	and	w20, w2, 255
-	cbnz	w21, .L665
+	cbnz	w21, .L664
 	adrp	x24, .LANCHOR77
 	adrp	x26, .LANCHOR14
 	adrp	x27, .LC47
@@ -3590,9 +3588,9 @@ gc_search_src_blk:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	mov	w23, 0
 	mov	w25, 0
-.L666:
+.L665:
 	cmp	w25, w22
-	bcs	.L671
+	bcs	.L670
 	ldrh	w6, [x24, #:lo12:.LANCHOR77]
 	add	x7, x24, :lo12:.LANCHOR77
 	mov	w1, 3
@@ -3605,45 +3603,45 @@ gc_search_src_blk:
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L667
+	beq	.L666
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L668
+	tbz	x0, 8, .L667
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L668:
+.L667:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
 	adrp	x0, .LANCHOR61
 	ldrh	w0, [x0, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bcs	.L669
+	bcs	.L668
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L670
+	cbz	w0, .L669
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L670
-.L671:
+	bcs	.L669
+.L670:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L673
+	tbz	x0, 1, .L672
 	adrp	x25, .LANCHOR79
 	adrp	x24, .LANCHOR78
 	add	x27, x25, :lo12:.LANCHOR79
 	add	x24, x24, :lo12:.LANCHOR78
 	mov	w28, 0
 	mov	w26, 65535
-.L674:
+.L673:
 	cmp	w28, w22
-	beq	.L678
+	beq	.L677
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3652,26 +3650,26 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L675
+	beq	.L674
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L675
+	bcs	.L674
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L677
+	cbz	w0, .L676
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L677
-.L678:
+	bcs	.L676
+.L677:
 	cmp	w23, w22
 	adrp	x0, .LANCHOR80
-	bcs	.L680
+	bcs	.L679
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x3, .LANCHOR73
 	adrp	x0, .LANCHOR72
@@ -3681,85 +3679,85 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L673
+	bge	.L672
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L673:
+.L672:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L681
+	tbz	x0, 0, .L680
 	cmp	w23, w22
-	bcs	.L681
+	bcs	.L680
 	adrp	x24, .LANCHOR81
 	add	x24, x24, :lo12:.LANCHOR81
 	mov	w25, 65535
-.L686:
+.L685:
 	ldrh	w6, [x24]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L682
+	beq	.L681
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L683
+	cbz	w0, .L682
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L683
-.L684:
+	bhi	.L682
+.L683:
 	adrp	x0, .LANCHOR80
 	adrp	x1, .LANCHOR61
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w2, w0, lsr 1
-	bls	.L681
+	bls	.L680
 	sub	w0, w2, w0, lsr 3
-	b	.L761
-.L669:
+	b	.L760
+.L668:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L671
-.L667:
+	b	.L670
+.L666:
 	strh	wzr, [x7]
-	b	.L671
-.L670:
+	b	.L670
+.L669:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L666
-.L675:
+	b	.L665
+.L674:
 	strh	wzr, [x24]
-	b	.L678
-.L677:
+	b	.L677
+.L676:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L674
-.L680:
+	b	.L673
+.L679:
 	ldrh	w1, [x25, #:lo12:.LANCHOR79]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bls	.L673
+	bls	.L672
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L673
-.L682:
+	b	.L672
+.L681:
 	strh	wzr, [x24]
-.L685:
+.L684:
 	cmp	w23, w22
-	bcs	.L684
+	bcs	.L683
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LANCHOR80
 	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w2, w0
-	bcs	.L681
+	bcs	.L680
 	add	w0, w2, w0, lsr 3
-.L761:
+.L760:
 	strh	w0, [x1, #:lo12:.LANCHOR61]
-.L681:
+.L680:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L708
+	tbz	x0, 8, .L707
 	ldr	w2, [x29, 112]
 	adrp	x0, .LC48
 	mov	w4, w20
@@ -3767,16 +3765,16 @@ gc_search_src_blk:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L708:
+.L707:
 	mov	w0, w23
-	b	.L662
-.L683:
+	b	.L661
+.L682:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L686
-	b	.L685
-.L665:
+	bne	.L685
+	b	.L684
+.L664:
 	adrp	x0, .LANCHOR62+318
 	strh	wzr, [x0, #:lo12:.LANCHOR62+318]
 	adrp	x0, .LANCHOR82
@@ -3785,7 +3783,7 @@ gc_search_src_blk:
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L711
+	tbz	x0, 0, .L710
 	adrp	x1, .LANCHOR84
 	adrp	x25, .LANCHOR83
 	str	x1, [x29, 96]
@@ -3793,11 +3791,11 @@ gc_search_src_blk:
 	ldrh	w0, [x25, #:lo12:.LANCHOR83]
 	ldrh	w2, [x1, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsr 2
-	bcc	.L688
+	bcc	.L687
 	ldrh	w1, [x26, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bls	.L712
-.L688:
+	bls	.L711
+.L687:
 	ldrh	w0, [x26, #:lo12:.LANCHOR85]
 	adrp	x22, .LANCHOR81
 	lsr	w0, w0, 2
@@ -3807,7 +3805,7 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L714
+	beq	.L713
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x3, [x2, #:lo12:.LANCHOR9]
@@ -3815,56 +3813,56 @@ gc_search_src_blk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L714
+	bcs	.L713
 	strh	wzr, [x22, #:lo12:.LANCHOR81]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L690:
+.L689:
 	add	x22, x22, :lo12:.LANCHOR81
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L692:
+.L691:
 	ldrh	w6, [x22]
 	mov	w0, w6
 	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L689
+	beq	.L688
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L691
+	cbz	w0, .L690
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L689
-.L691:
+	bcs	.L688
+.L690:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L692
-.L689:
+	bne	.L691
+.L688:
 	ldr	x0, [x29, 96]
 	ldrh	w1, [x25, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	cmp	w1, w0, lsr 3
-	bhi	.L709
+	bhi	.L708
 	ldrh	w0, [x26, #:lo12:.LANCHOR85]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L687
-.L709:
+	ble	.L686
+.L708:
 	adrp	x24, .LANCHOR77
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	add	x24, x24, :lo12:.LANCHOR77
-.L694:
+.L693:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3872,22 +3870,22 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L687
+	beq	.L686
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L693
+	cbz	w0, .L692
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L687
-.L693:
+	bcs	.L686
+.L692:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L694
-.L687:
+	bne	.L693
+.L686:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L695
+	tbz	x0, 1, .L694
 	adrp	x24, .LANCHOR78
 	adrp	x28, .LANCHOR86
 	adrp	x25, .LANCHOR73
@@ -3896,7 +3894,7 @@ gc_search_src_blk:
 	add	x25, x25, :lo12:.LANCHOR73
 	strh	wzr, [x24, #:lo12:.LANCHOR78]
 	mov	w22, 64
-.L700:
+.L699:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -3906,9 +3904,9 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L696
+	beq	.L695
 	cmp	w20, 1
-	bne	.L697
+	bne	.L696
 	adrp	x3, .LANCHOR72
 	ldrb	w2, [x25]
 	ldrh	w3, [x3, #:lo12:.LANCHOR72]
@@ -3917,37 +3915,37 @@ gc_search_src_blk:
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L697:
+.L696:
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L698
+	bcs	.L697
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L699
+	cbz	w0, .L698
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L699
-.L696:
+	bcc	.L698
+.L695:
 	cmp	w23, w20
 	adrp	x0, .LANCHOR80
 	adrp	x3, .LANCHOR73
-	bcc	.L701
-	cbnz	w19, .L702
+	bcc	.L700
+	cbnz	w19, .L701
 	adrp	x1, .LANCHOR87
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	adrp	x1, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	cmp	w2, w1
-	bls	.L702
-.L701:
+	bls	.L701
+.L700:
 	ldrh	w2, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
 	ldrb	w3, [x3, #:lo12:.LANCHOR73]
@@ -3957,12 +3955,12 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L695
+	bge	.L694
 	add	w1, w1, w2
 	strh	w1, [x28, #:lo12:.LANCHOR86]
-.L695:
+.L694:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L681
+	cbz	w0, .L680
 	adrp	x25, .LANCHOR77
 	adrp	x22, .LANCHOR89
 	adrp	x26, .LANCHOR84
@@ -3972,7 +3970,7 @@ gc_search_src_blk:
 	add	x27, x27, :lo12:.LANCHOR83
 	strh	wzr, [x25, #:lo12:.LANCHOR77]
 	mov	w24, 64
-.L706:
+.L705:
 	ldrh	w6, [x25, #:lo12:.LANCHOR77]
 	mov	w1, 3
 	mov	w0, w6
@@ -3982,69 +3980,69 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L703
+	beq	.L702
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L704
+	bls	.L703
 	cmp	w1, 2
-	bls	.L704
+	bls	.L703
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L703
-.L704:
+	bls	.L702
+.L703:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L705
+	cbz	w0, .L704
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L703
-.L705:
+	bcs	.L702
+.L704:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L706
-.L703:
+	bne	.L705
+.L702:
 	cmp	w23, w20
 	adrp	x0, .LANCHOR80
-	bcs	.L707
+	bcs	.L706
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	ldrh	w1, [x22, #:lo12:.LANCHOR89]
 	cmp	w1, w0, lsr 1
-	bls	.L681
+	bls	.L680
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x22, #:lo12:.LANCHOR89]
-	b	.L681
-.L714:
+	b	.L680
+.L713:
 	mov	w23, 0
-	b	.L690
-.L711:
+	b	.L689
+.L710:
 	mov	w23, 0
-	b	.L687
-.L698:
+	b	.L686
+.L697:
 	strh	wzr, [x24, #:lo12:.LANCHOR78]
-	b	.L696
-.L699:
+	b	.L695
+.L698:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L700
-	b	.L696
-.L702:
+	bne	.L699
+	b	.L695
+.L701:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	ldrb	w1, [x3, #:lo12:.LANCHOR73]
 	ldrh	w2, [x28, #:lo12:.LANCHOR86]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L695
+	ble	.L694
 	sub	w0, w2, w0, lsr 3
 	strh	w0, [x28, #:lo12:.LANCHOR86]
-	b	.L695
-.L707:
+	b	.L694
+.L706:
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
 	ldrh	w2, [x22, #:lo12:.LANCHOR89]
@@ -4052,13 +4050,13 @@ gc_search_src_blk:
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L681
+	bge	.L680
 	add	w1, w2, w1, lsr 3
 	strh	w1, [x22, #:lo12:.LANCHOR89]
-	b	.L681
-.L712:
+	b	.L680
+.L711:
 	mov	w23, 0
-	b	.L689
+	b	.L688
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -4071,27 +4069,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L763
+	bne	.L762
 	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR91
 	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR91
-.L765:
+.L764:
 	b	_insert_free_list
-.L763:
+.L762:
 	cmp	w0, 16
-	bne	.L764
+	bne	.L763
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR93
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
-	b	.L765
-.L764:
+	b	.L764
+.L763:
 	adrp	x2, .LANCHOR94
 	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L765
+	b	.L764
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4105,30 +4103,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L767
+	bne	.L766
 	adrp	x2, .LANCHOR85
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR85
 	add	x0, x0, :lo12:.LANCHOR12
-.L770:
+.L769:
 	b	_insert_data_list
-.L767:
+.L766:
 	cmp	w2, 96
-	bne	.L768
+	bne	.L767
 	adrp	x2, .LANCHOR83
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L770
-.L768:
+	b	.L769
+.L767:
 	cmp	w2, 160
-	bne	.L766
+	bne	.L765
 	adrp	x2, .LANCHOR87
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L770
-.L766:
+	b	.L769
+.L765:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4147,8 +4145,8 @@ zftl_gc_get_free_sblk:
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L772
-	cbnz	w21, .L772
+	beq	.L771
+	cbnz	w21, .L771
 	mov	w1, w19
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
@@ -4156,31 +4154,31 @@ zftl_gc_get_free_sblk:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L773:
+.L772:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L772:
+.L771:
 	adrp	x2, .LANCHOR92
 	adrp	x20, .LANCHOR94
 	ldrh	w0, [x2, #:lo12:.LANCHOR92]
 	ldrh	w1, [x20, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bls	.L774
+	bls	.L773
 	lsr	w1, w0, 3
 	cmp	w21, 0
 	adrp	x0, .LANCHOR93
 	csel	w1, w1, wzr, ne
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
-.L788:
+.L787:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L779
+	bne	.L778
 	adrp	x0, .LANCHOR90
 	ldrh	w5, [x20, #:lo12:.LANCHOR94]
 	mov	w2, w22
@@ -4191,11 +4189,11 @@ zftl_gc_get_free_sblk:
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L779:
-	cbz	w21, .L773
+.L778:
+	cbz	w21, .L772
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L773
+	tbz	x0, 8, .L772
 	adrp	x4, .LANCHOR9
 	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
@@ -4215,20 +4213,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L773
-.L774:
-	cbnz	w21, .L777
+	b	.L772
+.L773:
+	cbnz	w21, .L776
 	lsr	w1, w1, 2
-.L778:
+.L777:
 	adrp	x0, .LANCHOR95
 	add	x2, x20, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L788
-.L777:
+	b	.L787
+.L776:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L778
+	b	.L777
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4241,36 +4239,36 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L790
+	bne	.L789
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR94
 	ldrh	w3, [x2, #:lo12:.LANCHOR92]
 	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w1
-	bcc	.L791
+	bcc	.L790
 	adrp	x4, .LANCHOR90
 	ldrh	w4, [x4, #:lo12:.LANCHOR90]
 	cmp	w4, w3
-	bls	.L792
-	cbz	w1, .L792
-.L791:
+	bls	.L791
+	cbz	w1, .L791
+.L790:
 	add	x2, x0, :lo12:.LANCHOR94
 	lsr	w1, w1, 1
-.L811:
+.L810:
 	adrp	x0, .LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L810
-.L792:
+	b	.L809
+.L791:
 	adrp	x0, .LANCHOR93
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
 	mov	w1, 0
-.L810:
+.L809:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L795
+	bne	.L794
 	adrp	x0, .LANCHOR94
 	mov	w2, w20
 	mov	w1, w19
@@ -4282,17 +4280,17 @@ zftl_get_free_sblk:
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-	b	.L795
-.L790:
+	b	.L794
+.L789:
 	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
 	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L794
+	beq	.L793
 	cmp	w20, 1
-	beq	.L794
+	beq	.L793
 	mov	w1, w19
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
@@ -4300,32 +4298,32 @@ zftl_get_free_sblk:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L795:
+.L794:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L794:
+.L793:
 	adrp	x2, .LANCHOR90
 	adrp	x4, .LANCHOR94
 	ldrh	w1, [x2, #:lo12:.LANCHOR90]
 	ldrh	w3, [x4, #:lo12:.LANCHOR94]
 	cmp	w1, w3
-	bcc	.L796
+	bcc	.L795
 	adrp	x5, .LANCHOR92
 	ldrh	w5, [x5, #:lo12:.LANCHOR92]
 	cmp	w5, w1
-	bls	.L797
-	cbz	w3, .L797
-.L796:
+	bls	.L796
+	cbz	w3, .L796
+.L795:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
 	add	x2, x4, :lo12:.LANCHOR94
 	mov	w1, w0
-	b	.L811
-.L797:
+	b	.L810
+.L796:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
@@ -4333,7 +4331,7 @@ zftl_get_free_sblk:
 	mov	w1, w0
 	adrp	x0, .LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR91
-	b	.L810
+	b	.L809
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4347,30 +4345,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L813
+	bne	.L812
 	adrp	x2, .LANCHOR85
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR85
 	add	x0, x0, :lo12:.LANCHOR12
-.L816:
+.L815:
 	b	_list_remove_node
-.L813:
+.L812:
 	cmp	w2, 96
-	bne	.L814
+	bne	.L813
 	adrp	x2, .LANCHOR83
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L816
-.L814:
+	b	.L815
+.L813:
 	cmp	w2, 160
-	bne	.L812
+	bne	.L811
 	adrp	x2, .LANCHOR87
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L816
-.L812:
+	b	.L815
+.L811:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4384,27 +4382,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L818
+	bne	.L817
 	adrp	x2, .LANCHOR90
 	adrp	x0, .LANCHOR91
 	add	x2, x2, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR91
-.L820:
+.L819:
 	b	_list_remove_node
-.L818:
+.L817:
 	cmp	w0, 16
-	bne	.L819
+	bne	.L818
 	adrp	x2, .LANCHOR92
 	adrp	x0, .LANCHOR93
 	add	x2, x2, :lo12:.LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR93
-	b	.L820
-.L819:
+	b	.L819
+.L818:
 	adrp	x2, .LANCHOR94
 	adrp	x0, .LANCHOR95
 	add	x2, x2, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L820
+	b	.L819
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4418,30 +4416,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L822
+	bne	.L821
 	adrp	x2, .LANCHOR85
 	adrp	x0, .LANCHOR12
 	add	x2, x2, :lo12:.LANCHOR85
 	add	x0, x0, :lo12:.LANCHOR12
-.L825:
+.L824:
 	b	_list_update_data_list
-.L822:
+.L821:
 	cmp	w2, 96
-	bne	.L823
+	bne	.L822
 	adrp	x2, .LANCHOR83
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L825
-.L823:
+	b	.L824
+.L822:
 	cmp	w2, 160
-	bne	.L821
+	bne	.L820
 	adrp	x2, .LANCHOR87
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR87
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L825
-.L821:
+	b	.L824
+.L820:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4462,7 +4460,7 @@ print_list_info:
 	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L826
+	cbz	x19, .L825
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC54
 	adrp	x21, .LANCHOR96
@@ -4471,7 +4469,7 @@ print_list_info:
 	mov	w20, 0
 	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L830:
+.L829:
 	ldr	x2, [x23, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR7
 	adrp	x8, .LANCHOR9
@@ -4504,7 +4502,7 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L826
+	beq	.L825
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
@@ -4512,8 +4510,8 @@ print_list_info:
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L830
-.L826:
+	bcs	.L829
+.L825:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4569,36 +4567,36 @@ ftl_tmp_into_update:
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L835
+	bls	.L834
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L835:
+.L834:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L836
+	bls	.L835
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L836:
+.L835:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L837
+	bls	.L836
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L837:
+.L836:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L834
+	bls	.L833
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L834:
+.L833:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4625,18 +4623,18 @@ ftl_get_blk_list_in_sblk:
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L840:
+.L839:
 	cmp	w3, w10
-	blt	.L844
+	blt	.L843
 	sxtw	x2, w0
 	mov	w3, -1
-.L845:
+.L844:
 	cmp	w10, w2
-	bgt	.L846
+	bgt	.L845
 	ret
-.L844:
+.L843:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L841
+	tbnz	x2, 0, .L840
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4645,21 +4643,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L842
-.L847:
+	bhi	.L841
+.L846:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L841:
+.L840:
 	add	w3, w3, 1
-	b	.L840
-.L842:
+	b	.L839
+.L841:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L847
-.L846:
+	b	.L846
+.L845:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L845
+	b	.L844
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4678,7 +4676,7 @@ ftl_free_sblk:
 	mov	x19, x23
 	add	x20, x4, x21
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L850
+	tbz	x0, 3, .L849
 	adrp	x1, .LANCHOR97
 	ldrh	w2, [x4, x21]
 	adrp	x8, .LANCHOR100
@@ -4698,7 +4696,7 @@ ftl_free_sblk:
 	and	w1, w1, 65535
 	add	w7, w7, w1
 	cmp	w7, w8
-	ble	.L851
+	ble	.L850
 	adrp	x1, .LANCHOR88
 	adrp	x7, .LANCHOR92
 	ldrh	w5, [x1, #:lo12:.LANCHOR88]
@@ -4708,16 +4706,16 @@ ftl_free_sblk:
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L852
-.L867:
+	blt	.L851
+.L866:
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
-.L865:
+.L864:
 	strb	w0, [x20, 2]
-.L853:
+.L852:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L857
+	bne	.L856
 	mul	w2, w6, w2
 	ldrh	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4725,7 +4723,7 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 9
 	bfi	w0, w2, 0, 11
 	strh	w0, [x4, x21]
-.L850:
+.L849:
 	mov	w0, w19
 	bl	zftl_remove_data_node
 	ldr	x0, [x22, #:lo12:.LANCHOR7]
@@ -4737,29 +4735,29 @@ ftl_free_sblk:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x23, lsl 1]
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L859
+	tbz	x0, 3, .L858
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	cmp	w1, w19
-	bne	.L860
+	bne	.L859
 	mov	w1, -1
 	ldrh	w2, [x0, 588]
 	strh	w1, [x0, 584]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L860
+	bne	.L858
 	strh	w19, [x0, 588]
 	mov	w1, w19
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
-.L866:
+.L865:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L852:
+.L851:
 	adrp	x1, .LANCHOR101
 	adrp	x7, .LANCHOR90
 	ldrh	w5, [x1, #:lo12:.LANCHOR101]
@@ -4772,16 +4770,16 @@ ftl_free_sblk:
 	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L867
-.L856:
+	blt	.L866
+.L855:
 	and	w0, w0, -25
-	b	.L865
-.L851:
+	b	.L864
+.L850:
 	madd	w1, w2, w1, w5
 	adrp	x5, .LANCHOR102
 	ldrh	w5, [x5, #:lo12:.LANCHOR102]
 	cmp	w1, w5
-	ble	.L853
+	ble	.L852
 	adrp	x1, .LANCHOR101
 	adrp	x7, .LANCHOR90
 	ldrh	w5, [x1, #:lo12:.LANCHOR101]
@@ -4794,7 +4792,7 @@ ftl_free_sblk:
 	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	bge	.L856
+	bge	.L855
 	adrp	x1, .LANCHOR88
 	adrp	x7, .LANCHOR92
 	ldrh	w5, [x1, #:lo12:.LANCHOR88]
@@ -4804,11 +4802,11 @@ ftl_free_sblk:
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L856
-	b	.L867
-.L857:
+	blt	.L855
+	b	.L866
+.L856:
 	cmp	w0, 16
-	bne	.L850
+	bne	.L849
 	sdiv	w2, w3, w2
 	ldr	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4816,23 +4814,23 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 6
 	bfi	w0, w2, 11, 8
 	str	w0, [x4, x21]
-	b	.L850
-.L860:
+	b	.L849
+.L859:
 	ldrh	w1, [x0, 586]
 	cmp	w1, w19
-	bne	.L859
+	bne	.L858
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L859
+	bne	.L858
 	strh	w19, [x0, 590]
 	mov	w1, w19
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
-	b	.L866
-.L859:
+	b	.L865
+.L858:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -4858,10 +4856,10 @@ gc_free_src_blk:
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L869:
+.L868:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L883
+	bhi	.L882
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4869,18 +4867,18 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L883:
+.L882:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L870
+	cbz	w2, .L869
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L870:
+.L869:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR7
@@ -4888,95 +4886,95 @@ gc_free_src_blk:
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L871
+	tbz	x0, 8, .L870
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC58
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC58
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L871:
+.L870:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L872
+	beq	.L871
 	tst	w0, 192
-	bne	.L873
-.L872:
+	bne	.L872
+.L871:
 	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 798
+	mov	w2, 799
 	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L873:
+.L872:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L874
+	cbz	w2, .L873
 	add	x3, x0, 392
 	mov	w1, 0
-.L876:
+.L875:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L875
+	bne	.L874
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L874:
+.L873:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L877
+	cbz	w2, .L876
 	add	x3, x0, 136
 	mov	w1, 0
-.L879:
+.L878:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L878
+	bne	.L877
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L877:
+.L876:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L880
+	cbz	w2, .L879
 	add	x3, x0, 264
 	mov	w1, 0
-.L882:
+.L881:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L881
+	bne	.L880
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L880:
+.L879:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L869
-.L875:
+	b	.L868
+.L874:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L876
-	b	.L874
-.L878:
+	bne	.L875
+	b	.L873
+.L877:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L879
-	b	.L877
-.L881:
+	bne	.L878
+	b	.L876
+.L880:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L882
-	b	.L880
+	bne	.L881
+	b	.L879
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -5002,14 +5000,14 @@ ftl_erase_phy_blk:
 	adrp	x0, .LANCHOR104
 	sxth	w19, w19
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L907
+	cbz	w0, .L906
 	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L907:
+.L906:
 	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	mov	w1, w21
 	mov	w0, w20
@@ -5044,10 +5042,10 @@ ftl_erase_sblk:
 	add	x24, x24, :lo12:.LANCHOR98
 	add	x27, x29, 112
 	mov	w19, 0
-.L913:
+.L912:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L924
+	bge	.L923
 	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR105
 	mov	w21, 0
@@ -5056,31 +5054,31 @@ ftl_erase_sblk:
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L925
-.L915:
+	b	.L924
+.L914:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L914
+	tbnz	x2, 0, .L913
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L914:
+.L913:
 	add	w0, w0, 1
-.L925:
+.L924:
 	cmp	w0, w1
-	blt	.L915
+	blt	.L914
 	cmp	w1, 4
-	bne	.L916
+	bne	.L915
 	mov	x3, 0
-.L917:
+.L916:
 	cmp	w21, w3
-	bgt	.L918
-.L919:
-	add	w19, w19, 1
-	b	.L913
+	bgt	.L917
 .L918:
+	add	w19, w19, 1
+	b	.L912
+.L917:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5088,45 +5086,45 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L917
-.L916:
+	b	.L916
+.L915:
 	cmp	w21, 2
-	bne	.L920
+	bne	.L919
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L921
+	cbz	w0, .L920
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L921:
+.L920:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L919
-.L920:
+	b	.L918
+.L919:
 	cmp	w21, 1
-	bne	.L919
+	bne	.L918
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbz	w0, .L923
+	cbz	w0, .L922
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L923:
+.L922:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L919
-.L924:
+	b	.L918
+.L923:
 	adrp	x2, .LANCHOR97
 	ldr	x3, [x23, #:lo12:.LANCHOR7]
-	cbnz	w20, .L926
+	cbnz	w20, .L925
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
@@ -5138,9 +5136,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L928
+	bge	.L927
 	strh	w0, [x1, 96]
-.L928:
+.L927:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5149,7 +5147,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L926:
+.L925:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5163,9 +5161,9 @@ ftl_erase_sblk:
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L928
+	bcs	.L927
 	strh	w0, [x1, 98]
-	b	.L928
+	b	.L927
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5180,37 +5178,37 @@ ftl_alloc_sys_blk:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L938
+	bls	.L937
 	strh	wzr, [x1, 136]
-.L938:
+.L937:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L939
+	cbnz	w0, .L938
 	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1118
+	mov	w2, 1117
 	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L939:
+.L938:
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 65535
-.L942:
+.L941:
 	ldrh	w2, [x1, 136]
-.L940:
+.L939:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L941
+	ble	.L940
 	strh	wzr, [x1, 136]
-	b	.L942
-.L941:
+	b	.L941
+.L940:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L945
+	bne	.L944
 	mov	x2, x4
-	b	.L940
-.L945:
+	b	.L939
+.L944:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5236,35 +5234,35 @@ ftl_free_sys_blk:
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L948
+	bls	.L947
 	strh	wzr, [x1, 138]
-.L948:
+.L947:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L949
+	bls	.L948
 	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1142
+	mov	w2, 1141
 	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L949:
+.L948:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w4, 65535
-.L952:
+.L951:
 	ldrh	w1, [x0, 138]
-.L950:
+.L949:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L951
+	ble	.L950
 	strh	wzr, [x0, 138]
-	b	.L952
-.L951:
+	b	.L951
+.L950:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L953
+	bne	.L952
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5274,9 +5272,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L953:
+.L952:
 	mov	x1, x3
-	b	.L950
+	b	.L949
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5286,7 +5284,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L966
+	beq	.L965
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
@@ -5297,7 +5295,7 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L956
+	bne	.L955
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
@@ -5306,14 +5304,14 @@ ftl_info_data_recovery:
 	ldrb	w0, [x21, 2]
 	adrp	x1, .LANCHOR97
 	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	tbz	x0, 3, .L960
+	tbz	x0, 3, .L959
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L961:
+.L960:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L963
+	bne	.L962
 	ldr	w0, [x20, x19]
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ubfx	x2, x0, 11, 8
@@ -5323,44 +5321,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L956:
+.L955:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L960:
+.L959:
 	tst	w0, 24
-	bne	.L962
+	bne	.L961
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L961
-.L962:
+	b	.L960
+.L961:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L961
-.L963:
+	b	.L960
+.L962:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L964
+	bne	.L963
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L956
-.L964:
+	b	.L955
+.L963:
 	cmp	w0, 96
-	bne	.L956
+	bne	.L955
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L956
-.L966:
+	b	.L955
+.L965:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5380,9 +5378,9 @@ ftl_get_ppa_from_index:
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L970
+	bge	.L969
 	add	x2, x2, 16
-.L971:
+.L970:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5390,25 +5388,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L972
+	bne	.L971
 	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
-	mov	w2, 1529
+	mov	w2, 1528
 	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L972:
+.L971:
 	adrp	x0, .LANCHOR105
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L970:
+.L969:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L971
+	b	.L970
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5424,21 +5422,21 @@ lpa_hash_get_ppa:
 	ldr	x4, [x2, #:lo12:.LANCHOR111]
 	adrp	x2, .LANCHOR112
 	ldr	x5, [x2, #:lo12:.LANCHOR112]
-.L975:
+.L974:
 	cmp	w1, w3
-	bne	.L977
+	bne	.L976
 	mov	w0, -1
 	ret
-.L977:
+.L976:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L976
+	bne	.L975
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L976:
+.L975:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L975
+	b	.L974
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5452,45 +5450,45 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L979
+	bne	.L978
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1644
+	mov	w2, 1643
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L979:
+.L978:
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bne	.L980
+	bne	.L979
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1645
+	mov	w2, 1644
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L980:
+.L979:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L981
+	cbnz	w0, .L980
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 1646
+	mov	w2, 1645
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L981:
+.L980:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR73
 	ldrb	w4, [x0, #:lo12:.LANCHOR73]
-.L982:
+.L981:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L984
+	beq	.L983
 	adrp	x0, .LANCHOR105
 	add	w1, w1, 1
 	and	w1, w1, 255
@@ -5506,29 +5504,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L978
+	bne	.L977
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L978:
+.L977:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L984:
+.L983:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L983
+	bne	.L982
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L983:
+.L982:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L982
+	b	.L981
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5544,14 +5542,14 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L988
+	bcs	.L987
 	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
-	mov	w2, 1677
+	mov	w2, 1676
 	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L988:
+.L987:
 	adrp	x20, .LANCHOR97
 	mov	w1, 0
 	mov	w0, w19
@@ -5576,12 +5574,12 @@ ftl_total_vpn_update:
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR115]
 	cmp	w1, 4
-	bhi	.L991
-	cbnz	w0, .L991
+	bhi	.L990
+	cbnz	w0, .L990
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR115]
 	ret
-.L991:
+.L990:
 	adrp	x0, .LANCHOR6
 	strh	wzr, [x3, #:lo12:.LANCHOR115]
 	mov	x1, 0
@@ -5593,9 +5591,9 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR7
 	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L993:
+.L992:
 	cmp	w5, w1, uxth
-	bhi	.L996
+	bhi	.L995
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
@@ -5603,27 +5601,27 @@ ftl_total_vpn_update:
 	str	w0, [x1, 528]
 	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L990
+	cbz	w2, .L989
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L990:
+.L989:
 	ret
-.L996:
+.L995:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L994
+	beq	.L993
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L995
+	bne	.L994
 	add	w0, w0, w3
-.L994:
+.L993:
 	add	x1, x1, 1
+	b	.L992
+.L994:
+	add	w2, w2, w3
 	b	.L993
-.L995:
-	add	w2, w2, w3
-	b	.L994
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5648,17 +5646,17 @@ ftl_vpn_update:
 	ubfiz	x19, x19, 1, 16
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L1004
+	cbnz	w0, .L1003
 	adrp	x1, .LANCHOR116
 	mov	w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR116]
-.L1002:
+.L1001:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1004:
+.L1003:
 	mov	w0, 0
-	b	.L1002
+	b	.L1001
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5671,34 +5669,34 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1007
+	beq	.L1006
 	adrp	x0, .LANCHOR9
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L1008
+	cbnz	w0, .L1007
 	adrp	x0, .LC59
 	mov	w2, 0
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L1013:
+.L1012:
 	mov	w0, 0
-	b	.L1006
-.L1008:
+	b	.L1005
+.L1007:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L1007:
+.L1006:
 	adrp	x20, .LANCHOR63
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	cmp	w19, w0
-	beq	.L1013
+	beq	.L1012
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1010
+	bne	.L1009
 	strh	w19, [x20, #:lo12:.LANCHOR63]
-	b	.L1013
-.L1010:
+	b	.L1012
+.L1009:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	adrp	x1, .LANCHOR117
@@ -5715,7 +5713,7 @@ ftl_vpn_decrement:
 	adrp	x1, .LANCHOR64
 	add	x1, x1, :lo12:.LANCHOR64
 	strh	w3, [x1, x2, lsl 1]
-.L1006:
+.L1005:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5736,27 +5734,27 @@ lpa_hash_update_ppa:
 	ldr	x8, [x4, #:lo12:.LANCHOR111]
 	adrp	x4, .LANCHOR112
 	ldr	x4, [x4, #:lo12:.LANCHOR112]
-.L1016:
+.L1015:
 	cmp	w6, w12
-	beq	.L1020
+	beq	.L1019
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L1017
+	bne	.L1016
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L1018
+	bne	.L1017
 	add	x6, x3, :lo12:.LANCHOR110
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L1019:
+.L1018:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1020:
+.L1019:
 	uxtw	x6, w2
 	add	x3, x3, :lo12:.LANCHOR110
 	cmn	w1, #1
@@ -5764,7 +5762,7 @@ lpa_hash_update_ppa:
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1027
+	beq	.L1026
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR99
 	add	x29, sp, 0
@@ -5783,15 +5781,15 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L1018:
+.L1017:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L1019
-.L1017:
+	b	.L1018
+.L1016:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L1016
-.L1027:
+	b	.L1015
+.L1026:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5819,17 +5817,17 @@ ftl_mask_bad_block:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L1031
+	tbz	x0, 14, .L1030
 	adrp	x0, .LC60
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L1031:
+.L1030:
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bls	.L1030
+	bls	.L1029
 	adrp	x0, .LANCHOR7
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5838,7 +5836,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L1030:
+.L1029:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5936,21 +5934,21 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1040
+	cbnz	x0, .L1039
 	adrp	x1, .LANCHOR120
 	add	x1, x1, :lo12:.LANCHOR120
-	mov	w2, 661
+	mov	w2, 662
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1039:
+.L1038:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1043:
+.L1042:
 	mov	x1, x19
 	adrp	x0, .LANCHOR56
 	add	x0, x0, :lo12:.LANCHOR56
@@ -5968,33 +5966,33 @@ ftl_write_buf:
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1039
-.L1040:
+	b	.L1038
+.L1039:
 	mov	x19, x0
 	adrp	x0, .LANCHOR121
 	mov	x20, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1045
+	bls	.L1044
 	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 666
+	mov	w2, 667
 	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1045:
+.L1044:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR57
-	cbz	w0, .L1042
+	cbz	w0, .L1041
 	ldrb	w1, [x20, #:lo12:.LANCHOR121]
 	cmp	w1, w0
-	bcs	.L1043
-.L1042:
+	bcs	.L1042
+.L1041:
 	mov	x0, x19
 	bl	buf_free
 	ldrb	w0, [x21, #:lo12:.LANCHOR57]
-	b	.L1039
+	b	.L1038
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -6013,17 +6011,17 @@ ftl_write_completed:
 	add	x22, x22, :lo12:.LANCHOR99
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L1051:
+.L1050:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1057
+	bne	.L1056
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1057:
+.L1056:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -6032,7 +6030,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L1052
+	bne	.L1051
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -6061,32 +6059,32 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1053
+	bne	.L1052
 	strh	wzr, [x0, 22]
-.L1054:
+.L1053:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L1051
-.L1053:
+	b	.L1050
+.L1052:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1054
+	bne	.L1053
 	strh	wzr, [x0, 54]
-	b	.L1054
-.L1052:
+	b	.L1053
+.L1051:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1056
+	tbz	x0, 2, .L1055
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1051
-.L1056:
+	b	.L1050
+.L1055:
 	mov	x0, x21
 	bl	buf_free
-	b	.L1051
+	b	.L1050
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.zftl_add_read_buf,"ax",@progbits
 	.align	2
@@ -6096,8 +6094,8 @@ zftl_add_read_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	cbnz	x0, .L1060
-	mov	w2, 948
+	cbnz	x0, .L1059
+	mov	w2, 949
 	adrp	x1, .LANCHOR123
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR123
@@ -6106,20 +6104,20 @@ zftl_add_read_buf:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	print_ftl_debug_info
-.L1060:
+.L1059:
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w1, w0
-	bls	.L1062
+	bls	.L1061
 	adrp	x1, .LANCHOR123
 	adrp	x0, .LC0
-	mov	w2, 953
+	mov	w2, 954
 	add	x1, x1, :lo12:.LANCHOR123
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1062:
+.L1061:
 	mov	x1, x19
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
@@ -6152,35 +6150,35 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1067
+	beq	.L1066
 	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1068
+	beq	.L1067
 	adrp	x1, .LANCHOR126
 	adrp	x0, .LC0
 	mov	w2, 827
 	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1068:
+.L1067:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1069:
+.L1068:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1067:
+.L1066:
 	bl	print_ftl_debug_info
 	adrp	x21, .LC67
 	mov	w2, w20
@@ -6203,7 +6201,7 @@ ftl_alloc_sblk:
 	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1069
+	b	.L1068
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
@@ -6238,7 +6236,7 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19, #:lo12:.LANCHOR53]
 	cmp	w19, 255
-	beq	.L1076
+	beq	.L1075
 	adrp	x1, .LANCHOR49
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR49
@@ -6246,7 +6244,7 @@ dump_sblk_queue:
 	add	x19, x1, x19
 	add	x21, x21, :lo12:.LC69
 	mov	x20, x1
-.L1078:
+.L1077:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6254,11 +6252,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1076
+	beq	.L1075
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1078
-.L1076:
+	b	.L1077
+.L1075:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6272,15 +6270,15 @@ queue_lun_state:
 	adrp	x2, .LANCHOR53
 	ldrb	w2, [x2, #:lo12:.LANCHOR53]
 	cmp	w2, 255
-	beq	.L1094
+	beq	.L1093
 	adrp	x3, .LANCHOR99
 	adrp	x7, .LANCHOR49
 	add	x7, x7, :lo12:.LANCHOR49
-	adrp	x10, .L1090
+	adrp	x10, .L1089
 	ldrh	w8, [x3, #:lo12:.LANCHOR99]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1090
+	add	x10, x10, :lo12:.L1089
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
@@ -6294,57 +6292,57 @@ queue_lun_state:
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1093:
+.L1092:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1088
+	bne	.L1087
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1089
+	bne	.L1088
 	cmp	w1, 1
-	bne	.L1086
+	bne	.L1085
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1088
+	beq	.L1087
 	ret
-.L1089:
+.L1088:
 	cmp	w1, 3
-	bhi	.L1088
+	bhi	.L1087
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1090
+	adr	x13, .Lrtx1089
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1090:
+.Lrtx1089:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1090:
-	.byte	(.L1086 - .Lrtx1090) / 4
-	.byte	(.L1091 - .Lrtx1090) / 4
-	.byte	(.L1092 - .Lrtx1090) / 4
-	.byte	(.L1086 - .Lrtx1090) / 4
+.L1089:
+	.byte	(.L1085 - .Lrtx1089) / 4
+	.byte	(.L1090 - .Lrtx1089) / 4
+	.byte	(.L1091 - .Lrtx1089) / 4
+	.byte	(.L1085 - .Lrtx1089) / 4
 	.section	.text.queue_lun_state
-.L1091:
+.L1090:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1088
+	beq	.L1087
 	ret
-.L1092:
+.L1091:
 	cmp	w0, 10
-	bne	.L1086
-.L1088:
+	bne	.L1085
+.L1087:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1093
-.L1094:
+	bne	.L1092
+.L1093:
 	mov	w0, 0
-.L1086:
+.L1085:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6368,9 +6366,9 @@ queue_remove_completed_req:
 	add	x10, x4, :lo12:.LANCHOR122
 	mov	w6, 0
 	mov	w15, -1
-.L1097:
+.L1096:
 	cmp	w2, 255
-	beq	.L1098
+	beq	.L1097
 	sbfiz	x8, x2, 6, 32
 	sxtw	x0, w2
 	add	x4, x5, x8
@@ -6378,61 +6376,61 @@ queue_remove_completed_req:
 	sub	w4, w4, #11
 	and	w4, w4, 255
 	cmp	w4, 1
-	bls	.L1099
-	cbz	w6, .L1096
+	bls	.L1098
+	cbz	w6, .L1095
 	strb	w2, [x1, #:lo12:.LANCHOR53]
 	ret
-.L1099:
+.L1098:
 	lsl	x6, x0, 6
 	ldrb	w2, [x5, x8]
 	add	x4, x5, x6
 	strb	w15, [x5, x6]
 	ldrb	w6, [x4, 59]
 	cmp	w6, 1
-	bne	.L1102
+	bne	.L1101
 	ldrh	w4, [x4, 50]
-	cbnz	w4, .L1110
+	cbnz	w4, .L1109
 	mov	w4, w14
 	mov	x6, x10
-.L1103:
+.L1102:
 	cmp	w4, 255
-	bne	.L1108
+	bne	.L1107
 	add	x3, x3, :lo12:.LANCHOR49
 	strb	w2, [x1, #:lo12:.LANCHOR53]
 	add	x0, x3, x0, lsl 6
 	ldrb	w0, [x0, 1]
 	strb	w0, [x6]
 	ret
-.L1102:
-	cbnz	w6, .L1104
+.L1101:
+	cbnz	w6, .L1103
 	ldr	w4, [x4, 36]
 	cmn	w4, #1
-	beq	.L1104
+	beq	.L1103
 	mov	w4, w13
 	mov	x6, x7
-	b	.L1103
-.L1110:
+	b	.L1102
+.L1109:
 	mov	w4, w12
 	mov	x6, x16
-	b	.L1103
-.L1108:
+	b	.L1102
+.L1107:
 	mov	w6, w4
 	sbfiz	x4, x4, 6, 32
 	ldrb	w4, [x11, x4]
 	cmp	w4, 255
-	bne	.L1108
+	bne	.L1107
 	add	x0, x11, x0, lsl 6
 	sbfiz	x6, x6, 6, 32
 	ldrb	w0, [x0, 1]
 	strb	w0, [x11, x6]
-.L1104:
+.L1103:
 	mov	w6, 1
-	b	.L1097
-.L1098:
-	cbz	w6, .L1096
+	b	.L1096
+.L1097:
+	cbz	w6, .L1095
 	mov	w0, -1
 	strb	w0, [x1, #:lo12:.LANCHOR53]
-.L1096:
+.L1095:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6454,17 +6452,17 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1121
+	bls	.L1120
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1122
-.L1121:
+	bne	.L1121
+.L1120:
 	adrp	x19, .LC70
 	add	x19, x19, :lo12:.LC70
 	adrp	x23, .LANCHOR7
-.L1134:
+.L1133:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -6476,7 +6474,7 @@ pm_alloc_new_blk:
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1123
+	bne	.L1122
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -6485,8 +6483,8 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1134
-.L1123:
+	b	.L1133
+.L1122:
 	ldr	x0, [x14]
 	adrp	x1, .LANCHOR128
 	mov	w2, 1
@@ -6495,29 +6493,29 @@ pm_alloc_new_blk:
 	str	w2, [x1, #:lo12:.LANCHOR128]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1125:
+.L1124:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1124
+	beq	.L1123
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1125
+	bne	.L1124
 	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 194
 	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1124:
+.L1123:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1122:
+.L1121:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
@@ -6525,14 +6523,14 @@ pm_alloc_new_blk:
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1127
+	bcs	.L1126
 	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 199
 	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1127:
+.L1126:
 	adrp	x1, .LANCHOR99
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	mov	w2, 21
@@ -6544,7 +6542,7 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1130
+	tbz	x0, 12, .L1129
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
@@ -6554,7 +6552,7 @@ pm_alloc_new_blk:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.L1130:
+.L1129:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6574,62 +6572,62 @@ pm_select_ram_region:
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1139:
+.L1138:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1138
+	beq	.L1137
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1139
+	bne	.L1138
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1141:
+.L1140:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1140
+	tbnz	x3, 15, .L1139
 	cmp	w3, w4
-	bcs	.L1140
+	bcs	.L1139
 	mov	w4, w3
 	mov	w19, w1
-.L1140:
+.L1139:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1141
+	bne	.L1140
 	cmp	w19, 32
-	bne	.L1138
+	bne	.L1137
 	adrp	x1, .LANCHOR131
 	mov	w2, -1
 	ldrb	w3, [x1, #:lo12:.LANCHOR131]
 	mov	w1, 0
-.L1143:
+.L1142:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1142
+	bcs	.L1141
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1142:
+.L1141:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1143
+	bne	.L1142
 	cmp	w19, 32
-	bne	.L1138
+	bne	.L1137
 	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
 	mov	w2, 297
 	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1138:
+.L1137:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6652,15 +6650,15 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR3
-	cbnz	w0, .L1150
+	cbnz	w0, .L1149
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1151:
+.L1150:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1151
-.L1157:
+	bne	.L1150
+.L1156:
 	adrp	x20, .LANCHOR133
 	add	x20, x20, :lo12:.LANCHOR133
 	mov	w2, 1024
@@ -6669,42 +6667,42 @@ flash_lsb_page_tbl_build:
 	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1152:
+.L1151:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1152
+	bne	.L1151
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1150:
+.L1149:
 	cmp	w0, 1
-	bne	.L1153
+	bne	.L1152
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1156:
+.L1155:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1154
+	bls	.L1153
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1154:
+.L1153:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1156
-	b	.L1157
-.L1153:
+	bne	.L1155
+	b	.L1156
+.L1152:
 	cmp	w0, 2
-	bne	.L1158
+	bne	.L1157
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1160:
+.L1159:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6713,31 +6711,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1160
-	b	.L1157
-.L1158:
+	bne	.L1159
+	b	.L1156
+.L1157:
 	cmp	w0, 3
-	bne	.L1161
+	bne	.L1160
 	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1164:
+.L1163:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1162
+	bls	.L1161
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1162:
+.L1161:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1164
-	b	.L1157
-.L1161:
+	bne	.L1163
+	b	.L1156
+.L1160:
 	cmp	w0, 4
-	bne	.L1165
+	bne	.L1164
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6755,7 +6753,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1167:
+.L1166:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6764,156 +6762,161 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1167
-	b	.L1157
-.L1165:
+	bne	.L1166
+	b	.L1156
+.L1164:
 	cmp	w0, 5
-	bne	.L1168
+	bne	.L1167
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1169:
+.L1168:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1169
+	bne	.L1168
 	add	x1, x1, 32
-.L1170:
+.L1169:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1170
-	b	.L1157
-.L1168:
+	bne	.L1169
+	b	.L1156
+.L1167:
 	cmp	w0, 8
-	bne	.L1157
+	bne	.L1156
 	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1171:
+.L1170:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1171
-	b	.L1157
+	bne	.L1170
+	b	.L1156
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
 	.global	flash_die_info_init
 	.type	flash_die_info_init, %function
 flash_die_info_init:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -64]!
 	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1187
+	tbz	x0, 12, .L1186
 	adrp	x1, .LANCHOR134
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1187:
-	adrp	x23, .LANCHOR34
-	add	x19, x23, :lo12:.LANCHOR34
-	adrp	x25, .LANCHOR2
-	adrp	x26, .LANCHOR18
-	adrp	x22, .LANCHOR29
-	add	x21, x22, :lo12:.LANCHOR29
-	ldrh	w0, [x19, 26]
+.L1186:
+	adrp	x22, .LANCHOR34
+	add	x19, x22, :lo12:.LANCHOR34
+	adrp	x23, .LANCHOR2
+	adrp	x24, .LANCHOR18
+	adrp	x21, .LANCHOR29
 	mov	w2, 8
+	ldrh	w0, [x19, 26]
+	adrp	x20, .LANCHOR136
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR136
-	strh	w0, [x25, #:lo12:.LANCHOR2]
-	add	x20, x24, :lo12:.LANCHOR136
+	strh	w0, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x19, 10]
-	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR18]
+	strb	wzr, [x24, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
 	adrp	x1, .LANCHOR135
 	strh	w0, [x1, #:lo12:.LANCHOR135]
 	mov	w1, 0
-	mov	x0, x21
+	add	x0, x21, :lo12:.LANCHOR29
 	bl	ftl_memset
+	add	x0, x20, :lo12:.LANCHOR136
 	mov	w2, 32
 	mov	w1, 0
-	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR34]
-	mov	x7, x23
+	mov	x15, x21
+	mov	x11, x20
+	adrp	x12, .LANCHOR35
 	adrp	x14, .LANCHOR41
-	add	x11, x26, :lo12:.LANCHOR18
-	add	x23, x14, :lo12:.LANCHOR41
-	mov	x8, 0
-.L1189:
-	mov	w2, w13
-	add	x1, x23, x8, lsl 3
-	mov	x0, x19
-	bl	flash_mem_cmp8
-	cbnz	w0, .L1188
-	ldrb	w1, [x11]
-	add	w0, w1, 1
-	strb	w0, [x11]
-	str	wzr, [x20, x1, lsl 2]
-	strb	w8, [x21, x1]
+	mov	x7, x22
+	add	x12, x12, :lo12:.LANCHOR35
+	add	x20, x14, :lo12:.LANCHOR41
+	add	x21, x19, 1
+	mov	x10, 0
 .L1188:
-	add	x8, x8, 1
-	cmp	x8, 4
-	bne	.L1189
+	ldrb	w2, [x19]
+	mov	w0, 2
+	strb	w0, [x10, x12]
+	add	x1, x20, x10, lsl 3
+	mov	x0, x21
+	bl	flash_mem_cmp8
+	cbnz	w0, .L1187
+	ldrb	w2, [x24, #:lo12:.LANCHOR18]
+	add	x1, x11, :lo12:.LANCHOR136
+	add	w0, w2, 1
+	strb	w0, [x24, #:lo12:.LANCHOR18]
+	and	w0, w10, 255
+	str	wzr, [x1, x2, lsl 2]
+	add	x1, x15, :lo12:.LANCHOR29
+	strb	w0, [x1, x2]
+	bl	zftl_flash_enter_slc_mode
+.L1187:
+	add	x10, x10, 1
+	cmp	x10, 4
+	bne	.L1188
 	add	x0, x7, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1190
-.L1194:
+	beq	.L1189
+.L1193:
 	add	x7, x7, :lo12:.LANCHOR34
-	ldrb	w0, [x26, #:lo12:.LANCHOR18]
+	ldrb	w0, [x24, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	mul	w0, w0, w1
 	ldrh	w1, [x7, 14]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 64
 	mul	w0, w0, w1
 	adrp	x1, .LANCHOR137
 	strh	w0, [x1, #:lo12:.LANCHOR137]
 	ret
-.L1190:
-	ldrh	w1, [x25, #:lo12:.LANCHOR2]
+.L1189:
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	x14, x14, :lo12:.LANCHOR41
-	ldrb	w11, [x0, 13]
-	add	x8, x0, 1
-	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR18
-	add	x15, x24, :lo12:.LANCHOR136
-	add	x22, x22, :lo12:.LANCHOR29
-	mov	x12, 0
-	mul	w11, w11, w1
+	ldrb	w12, [x0, 13]
+	add	x10, x0, 1
+	ldrb	w20, [x7, #:lo12:.LANCHOR34]
+	add	x19, x24, :lo12:.LANCHOR18
+	ldrb	w21, [x0, 23]
+	add	x11, x11, :lo12:.LANCHOR136
+	add	x15, x15, :lo12:.LANCHOR29
+	mov	x13, 0
+	mul	w12, w12, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
-	mul	w11, w11, w1
-	lsl	w21, w11, 1
-.L1193:
-	mov	w2, w13
-	add	x1, x14, x12, lsl 3
-	mov	x0, x8
+	mul	w12, w12, w1
+	lsl	w22, w12, 1
+.L1192:
+	mov	w2, w20
+	add	x1, x14, x13, lsl 3
+	mov	x0, x10
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1191
+	cbnz	w0, .L1190
 	ldrb	w1, [x19]
-	cmp	w20, 0
-	csel	w2, w11, w21, eq
+	cmp	w21, 0
+	csel	w2, w12, w22, eq
 	add	w0, w1, 1
 	strb	w0, [x19]
-	str	w2, [x15, x1, lsl 2]
-	strb	w12, [x22, x1]
-.L1191:
-	add	x12, x12, 1
-	cmp	x12, 4
-	bne	.L1193
-	b	.L1194
+	str	w2, [x11, x1, lsl 2]
+	strb	w13, [x15, x1]
+.L1190:
+	add	x13, x13, 1
+	cmp	x13, 4
+	bne	.L1192
+	b	.L1193
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6950,7 +6953,7 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1207
+	tbz	x0, 12, .L1206
 	adrp	x1, .LANCHOR138
 	adrp	x0, .LC72
 	mov	w3, 0
@@ -6958,7 +6961,7 @@ lpa_rebuild_hash:
 	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L1207:
+.L1206:
 	adrp	x20, .LANCHOR80
 	adrp	x22, .LANCHOR73
 	adrp	x19, .LANCHOR110
@@ -6981,28 +6984,28 @@ lpa_rebuild_hash:
 	ldr	x5, [x21, #:lo12:.LANCHOR112]
 	mov	w1, 0
 	ldr	x4, [x0, #:lo12:.LANCHOR111]
-.L1208:
+.L1207:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1210
+	blt	.L1209
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1210:
+.L1209:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1209
+	beq	.L1208
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1209:
+.L1208:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1208
+	b	.L1207
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -7054,20 +7057,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR18
 	ldrb	w3, [x0, #:lo12:.LANCHOR18]
-.L1219:
+.L1218:
 	cmp	w3, w1, uxtb
-	bhi	.L1220
+	bhi	.L1219
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1220:
+.L1219:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1219
+	b	.L1218
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -7086,9 +7089,9 @@ gc_static_wearleveling:
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1223
+	bls	.L1222
 	bl	ftl_tmp_into_update
-.L1223:
+.L1222:
 	adrp	x19, .LANCHOR10
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
@@ -7096,14 +7099,14 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1224
+	bhi	.L1223
 	ldr	x3, [x25, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1273
-.L1224:
+	bls	.L1272
+.L1223:
 	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	mov	w20, 65535
 	adrp	x8, .LANCHOR14
@@ -7123,10 +7126,10 @@ gc_static_wearleveling:
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1226:
+.L1225:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1235
+	bhi	.L1234
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
@@ -7141,7 +7144,7 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1236
+	tbz	x3, 10, .L1235
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
@@ -7156,13 +7159,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1236:
+.L1235:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1237
+	tbz	x0, 3, .L1236
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1238
+	bne	.L1237
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7171,7 +7174,7 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1237:
+.L1236:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w3, [x24, #:lo12:.LANCHOR14]
 	ldr	x2, [x23, #:lo12:.LANCHOR7]
@@ -7179,7 +7182,7 @@ gc_static_wearleveling:
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1239
+	tbz	x3, 10, .L1238
 	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
 	ldr	x6, [x3, #:lo12:.LANCHOR9]
@@ -7194,13 +7197,13 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1239:
+.L1238:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1240
+	tbz	x0, 3, .L1239
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1241
+	bne	.L1240
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
@@ -7209,9 +7212,9 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
 	strh	w1, [x0, #:lo12:.LANCHOR62+318]
-.L1240:
+.L1239:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1242
+	tbz	x0, 10, .L1241
 	ldr	w6, [x29, 128]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7231,9 +7234,9 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1242:
+.L1241:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1243
+	tbz	x0, 10, .L1242
 	ldr	w6, [x29, 136]
 	adrp	x2, .LANCHOR9
 	ldr	x1, [x23, #:lo12:.LANCHOR7]
@@ -7253,7 +7256,7 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1243:
+.L1242:
 	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
@@ -7267,7 +7270,7 @@ gc_static_wearleveling:
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1244
+	tbz	x0, 10, .L1243
 	adrp	x0, .LC78
 	and	w4, w4, 65535
 	and	w3, w3, 65535
@@ -7275,9 +7278,9 @@ gc_static_wearleveling:
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1244:
+.L1243:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L1245
+	tbz	x0, 10, .L1244
 	adrp	x0, .LANCHOR139
 	ldr	w3, [x29, 156]
 	mov	w4, w22
@@ -7289,21 +7292,21 @@ gc_static_wearleveling:
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.L1245:
+.L1244:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
 	adrp	x0, .LANCHOR139
 	ldr	w1, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w1, w0
-	bgt	.L1246
+	bgt	.L1245
 	adrp	x1, .LANCHOR140
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR140]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1274
-.L1246:
+	ble	.L1273
+.L1245:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x28, .LANCHOR62
 	add	x28, x28, :lo12:.LANCHOR62
@@ -7319,61 +7322,61 @@ gc_static_wearleveling:
 	adrp	x0, .LANCHOR140
 	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 128]
-.L1248:
+.L1247:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1258
-.L1257:
+	bcc	.L1257
+.L1256:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1247:
-	cbz	w21, .L1260
+.L1246:
+	cbz	w21, .L1259
 	ldr	x2, [x25, #:lo12:.LANCHOR97]
 	adrp	x0, .LANCHOR6
 	ldrh	w5, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1261:
+.L1260:
 	cmp	w1, w5
-	bcc	.L1263
+	bcc	.L1262
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1260
+	bcs	.L1259
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1260:
-	cbz	w20, .L1266
+.L1259:
+	cbz	w20, .L1265
 	ldr	x2, [x25, #:lo12:.LANCHOR97]
 	adrp	x0, .LANCHOR6
 	ldrh	w6, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1267:
+.L1266:
 	cmp	w1, w6
-	bcc	.L1269
+	bcc	.L1268
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1266
+	bcs	.L1265
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1266:
+.L1265:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1225
+	beq	.L1224
 	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
@@ -7381,12 +7384,12 @@ gc_static_wearleveling:
 	adrp	x1, .LANCHOR80
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w2, w1
-	bhi	.L1225
+	bhi	.L1224
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1225:
+.L1224:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7395,7 +7398,7 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1235:
+.L1234:
 	uxtw	x7, w24
 	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
@@ -7403,40 +7406,40 @@ gc_static_wearleveling:
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1227
+	beq	.L1226
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1228
+	tbz	x4, 0, .L1227
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1229:
+.L1228:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1272
+	bls	.L1271
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1272:
+.L1271:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1232
+	bcs	.L1231
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1232:
+.L1231:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1231
-.L1233:
+	bne	.L1230
+.L1232:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1227
+	bhi	.L1226
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1227
+	tbz	x0, 8, .L1226
 	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
@@ -7453,71 +7456,77 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1227:
+.L1226:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1226
-.L1228:
+	b	.L1225
+.L1227:
 	tst	w0, 24
-	bne	.L1230
+	bne	.L1229
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1229
-.L1230:
+	b	.L1228
+.L1229:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1231:
+.L1230:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1234
+	bls	.L1233
 	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1234:
+.L1233:
 	cmp	w22, w0
-	bcs	.L1233
+	bcs	.L1232
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1233
-.L1238:
+	b	.L1232
+.L1237:
 	tst	w0, 224
-	bne	.L1237
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	mov	w1, 65535
-	ldrh	w2, [x0, 590]
-	cmp	w2, w1
-	bne	.L1237
-	ldrh	w0, [x0, 586]
-	bl	zftl_remove_free_node
+	bne	.L1236
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	mov	w0, 65535
+	ldrh	w2, [x1, 590]
+	cmp	w2, w0
+	bne	.L1236
+	ldrh	w0, [x1, 586]
+	ldrh	w1, [x1, 588]
+	cmp	w1, w0
+	beq	.L1236
+	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1237
-.L1241:
+	b	.L1236
+.L1240:
 	tst	w0, 224
-	bne	.L1240
-	ldr	x0, [x19, #:lo12:.LANCHOR10]
-	mov	w1, 65535
-	ldrh	w2, [x0, 588]
-	cmp	w2, w1
-	bne	.L1240
-	ldrh	w0, [x0, 584]
+	bne	.L1239
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	mov	w0, 65535
+	ldrh	w2, [x1, 588]
+	cmp	w2, w0
+	bne	.L1239
+	ldrh	w0, [x1, 584]
+	ldrh	w1, [x1, 590]
+	cmp	w1, w0
+	beq	.L1239
 	bl	zftl_remove_free_node
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1240
-.L1258:
+	b	.L1239
+.L1257:
 	add	w7, w26, 1
 	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
@@ -7528,31 +7537,31 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1250
+	beq	.L1249
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1250
+	beq	.L1249
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1251
+	tbz	x0, 0, .L1250
 	cmp	w2, 160
-.L1338:
-	bne	.L1253
+.L1337:
+	bne	.L1252
 	adrp	x0, .LANCHOR139
 	ldr	w2, [x29, 148]
 	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w2, w0
-	ble	.L1254
+	ble	.L1253
 	ldr	w0, [x4, x3]
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w21
-	bls	.L1255
-	cbz	w1, .L1254
+	bls	.L1254
+	cbz	w1, .L1253
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1254
-.L1255:
+	bgt	.L1253
+.L1254:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7565,7 +7574,7 @@ gc_static_wearleveling:
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1254
+	tbz	x0, 10, .L1253
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7581,40 +7590,40 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1339:
+.L1338:
 	bl	printf
-.L1254:
+.L1253:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1257
-.L1250:
+	bhi	.L1256
+.L1249:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1248
-.L1251:
+	b	.L1247
+.L1250:
 	cmp	w0, 2
-	b	.L1338
-.L1253:
+	b	.L1337
+.L1252:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1254
+	ble	.L1253
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1256
-	cbz	w1, .L1254
+	ble	.L1255
+	cbz	w1, .L1253
 	ldr	w0, [x4, x3]
 	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1254
-.L1256:
+	bgt	.L1253
+.L1255:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7627,7 +7636,7 @@ gc_static_wearleveling:
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1254
+	tbz	x0, 10, .L1253
 	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -7643,48 +7652,48 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1339
-.L1274:
+	b	.L1338
+.L1273:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1247
-.L1263:
+	b	.L1246
+.L1262:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1262
+	bhi	.L1261
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1262
+	beq	.L1261
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1262:
+.L1261:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1261
-.L1269:
+	b	.L1260
+.L1268:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1268
+	blt	.L1267
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1268
+	beq	.L1267
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1268:
+.L1267:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1267
-.L1273:
+	b	.L1266
+.L1272:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1225
+	b	.L1224
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7756,11 +7765,11 @@ zftl_sblk_list_init:
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1341:
+.L1340:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1357
+	blt	.L1356
 	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x24, #:lo12:.LANCHOR90]
 	ldp	x25, x26, [sp, 64]
@@ -7781,12 +7790,12 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1357:
+.L1356:
 	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1358
+	cbz	w6, .L1357
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldr	x7, [x25, #:lo12:.LANCHOR97]
@@ -7794,15 +7803,15 @@ zftl_sblk_list_init:
 	ldr	x0, [x29, 104]
 	ldrh	w10, [x0, #:lo12:.LANCHOR72]
 	mov	w0, 0
-.L1343:
+.L1342:
 	cmp	w1, w8
-	blt	.L1346
-	cbz	w0, .L1347
+	blt	.L1345
+	cbz	w0, .L1346
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1342:
+.L1341:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -7817,44 +7826,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1348
+	beq	.L1347
 	adrp	x5, .LANCHOR10
 	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1348
+	beq	.L1347
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1348
+	beq	.L1347
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1348
+	beq	.L1347
 	cmp	w0, 64
-	bne	.L1349
+	bne	.L1348
 	ldr	x0, [x29, 128]
 	add	x2, x21, :lo12:.LANCHOR85
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR12
-.L1361:
+.L1360:
 	bl	_insert_data_list
-.L1348:
+.L1347:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1341
-.L1346:
+	b	.L1340
+.L1345:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1344
+	tbnz	x5, 0, .L1343
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1345:
-	add	w1, w1, 1
-	b	.L1343
 .L1344:
+	add	w1, w1, 1
+	b	.L1342
+.L1343:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1345
-.L1347:
+	b	.L1344
+.L1346:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -7862,75 +7871,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR9
 	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1342
-.L1358:
+	b	.L1341
+.L1357:
 	ldr	w0, [x29, 188]
-	b	.L1342
-.L1349:
+	b	.L1341
+.L1348:
 	cmp	w0, 96
-	bne	.L1350
+	bne	.L1349
 	ldr	x0, [x29, 136]
 	add	x2, x19, :lo12:.LANCHOR83
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1361
-.L1350:
+	b	.L1360
+.L1349:
 	cmp	w0, 160
-	bne	.L1351
+	bne	.L1350
 	ldr	x0, [x29, 120]
 	add	x2, x20, :lo12:.LANCHOR87
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR75
-	b	.L1361
-.L1351:
-	cbnz	w0, .L1348
+	b	.L1360
+.L1350:
+	cbnz	w0, .L1347
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1352
+	cbz	w2, .L1351
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1353
+	tbz	x0, 4, .L1352
 	mov	w1, 5
-.L1360:
+.L1359:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1348
-.L1353:
-	mov	w1, 2
-	b	.L1360
+	b	.L1347
 .L1352:
+	mov	w1, 2
+	b	.L1359
+.L1351:
 	ands	w1, w1, 24
-	bne	.L1355
+	bne	.L1354
 	ldr	x0, [x29, 160]
 	add	x2, x24, :lo12:.LANCHOR90
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR91
-.L1362:
+.L1361:
 	bl	_insert_free_list
-	b	.L1348
-.L1355:
+	b	.L1347
+.L1354:
 	cmp	w1, 16
-	bne	.L1356
+	bne	.L1355
 	ldr	x0, [x29, 152]
 	add	x2, x23, :lo12:.LANCHOR92
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR93
-	b	.L1362
-.L1356:
+	b	.L1361
+.L1355:
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR94
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR95
-	b	.L1362
+	b	.L1361
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7951,8 +7960,8 @@ ftl_open_sblk_init:
 	add	x20, x20, :lo12:.LANCHOR73
 	add	x21, x21, :lo12:.LC70
 	stp	x25, x26, [sp, 64]
-.L1364:
-.L1367:
+.L1363:
+.L1366:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7972,11 +7981,11 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1368
+	beq	.L1367
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1365:
+.L1364:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
@@ -7992,7 +8001,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1363
+	cbnz	w0, .L1362
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -8001,11 +8010,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1367
-.L1368:
+	b	.L1366
+.L1367:
 	mov	w0, 0
-	b	.L1365
-.L1363:
+	b	.L1364
+.L1362:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8028,14 +8037,14 @@ pm_free_sblk:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1371
+	bls	.L1370
 	adrp	x1, .LANCHOR142
 	adrp	x0, .LC0
 	mov	w2, 78
 	add	x1, x1, :lo12:.LANCHOR142
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1371:
+.L1370:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
@@ -8057,9 +8066,9 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1372:
+.L1371:
 	cmp	x4, x1
-	bne	.L1376
+	bne	.L1375
 	adrp	x24, .LANCHOR73
 	adrp	x25, .LANCHOR80
 	adrp	x26, .LANCHOR14
@@ -8073,10 +8082,10 @@ pm_free_sblk:
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1377:
+.L1376:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1383
+	bhi	.L1382
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8085,7 +8094,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1376:
+.L1375:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -8093,23 +8102,23 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1373:
+.L1372:
 	cmp	w13, w3, uxth
-	bhi	.L1375
+	bhi	.L1374
 	add	x4, x4, 4
-	b	.L1372
-.L1375:
+	b	.L1371
+.L1374:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1374
+	bne	.L1373
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1374:
+.L1373:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1373
-.L1383:
+	b	.L1372
+.L1382:
 	ldr	x1, [x5, #:lo12:.LANCHOR97]
 	sxtw	x21, w19
 	add	x0, x21, 208
@@ -8118,22 +8127,22 @@ pm_free_sblk:
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1378
+	bne	.L1377
 	ldrb	w0, [x24, #:lo12:.LANCHOR73]
 	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1378:
+.L1377:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1379
-	cbnz	w0, .L1384
-.L1381:
+	bls	.L1378
+	cbnz	w0, .L1383
+.L1380:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1380
+	beq	.L1379
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1382
+	tbz	x0, 12, .L1381
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8141,7 +8150,7 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1382:
+.L1381:
 	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
@@ -8154,17 +8163,17 @@ pm_free_sblk:
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1380
+	b	.L1379
+.L1378:
+	cbz	w0, .L1380
 .L1379:
-	cbz	w0, .L1381
-.L1380:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1377
-.L1384:
+	b	.L1376
+.L1383:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1380
+	b	.L1379
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -8190,24 +8199,24 @@ ftl_memcpy:
 	uxtw	x2, w2
 	b	memcpy
 	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.flash_into_data_init,"ax",@progbits
+	.section	.text.flash_info_data_init,"ax",@progbits
 	.align	2
-	.global	flash_into_data_init
-	.type	flash_into_data_init, %function
-flash_into_data_init:
+	.global	flash_info_data_init
+	.type	flash_info_data_init, %function
+flash_info_data_init:
 	stp	x29, x30, [sp, -32]!
 	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1393
+	tbz	x0, 12, .L1392
 	adrp	x2, .LANCHOR143
 	adrp	x0, .LC84
 	add	x2, x2, :lo12:.LANCHOR143
 	mov	w1, 100
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1393:
+.L1392:
 	adrp	x19, .LANCHOR26
 	mov	w2, 2048
 	mov	w1, 0
@@ -8234,22 +8243,22 @@ flash_into_data_init:
 	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, 48
 	b	ftl_memcpy
-	.size	flash_into_data_init, .-flash_into_data_init
+	.size	flash_info_data_init, .-flash_info_data_init
 	.section	.text.ftl_memcpy32,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy32
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1399:
+.L1398:
 	cmp	w2, w3
-	bhi	.L1400
+	bhi	.L1399
 	ret
-.L1400:
+.L1399:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1399
+	b	.L1398
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8290,14 +8299,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1405
+	tbz	x0, 12, .L1404
 	adrp	x1, .LANCHOR144
 	adrp	x0, .LC85
 	mov	x2, x19
 	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1405:
+.L1404:
 	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -8308,22 +8317,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1406
+	bne	.L1405
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1406:
+.L1405:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1407
+	bne	.L1406
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR27]
-.L1407:
+.L1406:
 	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR44
-	bne	.L1408
+	bne	.L1407
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x29, 56]
@@ -8348,17 +8357,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1410
+	tbz	x0, 12, .L1409
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1423:
+.L1422:
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1410:
+.L1409:
 	adrp	x0, .LANCHOR45
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR45]
@@ -8367,17 +8376,17 @@ nandc_init:
 	adrp	x0, .LANCHOR43
 	strb	wzr, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1404
+	tbz	x0, 12, .L1403
 	ldrb	w1, [x20, #:lo12:.LANCHOR27]
 	adrp	x0, .LC87
 	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1404:
+.L1403:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1408:
+.L1407:
 	strb	wzr, [x0, #:lo12:.LANCHOR44]
 	mov	w1, 1
 	ldr	w0, [x29, 56]
@@ -8405,14 +8414,14 @@ nandc_init:
 	adrp	x1, .LANCHOR46
 	str	x0, [x1, #:lo12:.LANCHOR46]
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1410
+	tbz	x0, 12, .L1409
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1423
+	b	.L1422
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8429,7 +8438,7 @@ buf_init:
 	adrp	x22, .LANCHOR121
 	add	x22, x22, :lo12:.LANCHOR121
 	mov	w21, 0
-.L1425:
+.L1424:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8447,7 +8456,7 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1425
+	bne	.L1424
 	add	x0, x20, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -8569,18 +8578,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1432:
+.L1431:
 	cmp	w1, w3
-	bhi	.L1433
+	bhi	.L1432
 	ret
-.L1433:
+.L1432:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1432
+	b	.L1431
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8644,9 +8653,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC90
-.L1440:
+.L1439:
 	cmp	x25, x19
-	bne	.L1446
+	bne	.L1445
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC90
 	ldp	x21, x22, [sp, 32]
@@ -8658,38 +8667,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1446:
-	cbnz	w20, .L1441
+.L1445:
+	cbnz	w20, .L1440
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1441:
+.L1440:
 	cmp	w24, 4
-	bne	.L1442
+	bne	.L1441
 	ldr	w1, [x22, x19, lsl 2]
-.L1448:
+.L1447:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1445
+	bls	.L1444
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC90
 	adrp	x0, .LC91
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1445:
+.L1444:
 	add	x19, x19, 1
-	b	.L1440
-.L1442:
+	b	.L1439
+.L1441:
 	cmp	w24, 2
-	bne	.L1444
+	bne	.L1443
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1448
-.L1444:
+	b	.L1447
+.L1443:
 	ldrb	w1, [x22, x19]
-	b	.L1448
+	b	.L1447
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -8721,43 +8730,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1450
+	bne	.L1449
 	mov	w0, -89
 	strb	w0, [x28, 128]
 	adrp	x0, .LANCHOR150+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR150+17]
-.L1505:
+.L1504:
 	mov	w0, 7
-	b	.L1540
-.L1450:
+	b	.L1539
+.L1449:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
+	bne	.L1451
+	mov	x7, 0
+.L1452:
+	sub	w0, w7, #80
+	strb	w0, [x22, x7]
+	add	x7, x7, 1
+	cmp	x7, 8
 	bne	.L1452
-	mov	x6, 0
-.L1453:
-	sub	w0, w6, #80
-	strb	w0, [x22, x6]
-	add	x6, x6, 1
-	cmp	x6, 8
-	bne	.L1453
-	stp	w6, w6, [x29, 132]
-.L1451:
+	stp	w7, w7, [x29, 132]
+.L1450:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1458
-	adrp	x7, .LANCHOR18
-	adrp	x11, .LANCHOR29
-	add	x24, x7, :lo12:.LANCHOR18
-	add	x25, x11, :lo12:.LANCHOR29
+	bhi	.L1457
+	adrp	x6, .LANCHOR18
+	adrp	x8, .LANCHOR29
+	add	x24, x6, :lo12:.LANCHOR18
+	add	x25, x8, :lo12:.LANCHOR29
 	mov	w20, 0
 	mov	w26, 55
-.L1459:
+.L1458:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1465
-.L1466:
+	bhi	.L1464
+.L1465:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -8770,10 +8779,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1452:
+.L1451:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1454
+	bne	.L1453
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -8789,13 +8798,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1541:
+.L1540:
 	str	w0, [x29, 136]
-	b	.L1451
-.L1454:
+	b	.L1450
+.L1453:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1455
+	bne	.L1454
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -8805,14 +8814,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1540:
+.L1539:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1541
-.L1455:
+	b	.L1540
+.L1454:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1456
+	bne	.L1455
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -8822,18 +8831,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1540
-.L1456:
+	b	.L1539
+.L1455:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1505
+	bne	.L1504
 	mov	x0, 0
-.L1457:
+.L1456:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1457
+	bne	.L1456
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -8841,8 +8850,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1541
-.L1465:
+	b	.L1540
+.L1464:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -8854,7 +8863,7 @@ hynix_get_read_retry_default:
 	adrp	x1, .LANCHOR13
 	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x23, x4, x0
-.L1460:
+.L1459:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -8865,15 +8874,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1460
+	bhi	.L1459
 	adrp	x3, .LANCHOR150
 	add	x3, x3, :lo12:.LANCHOR150
 	mov	x0, 0
-.L1463:
+.L1462:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1462:
+.L1461:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8882,10 +8891,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1462
+	bne	.L1461
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1463
+	bne	.L1462
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8895,12 +8904,12 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1459
-.L1458:
+	b	.L1458
+.L1457:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1466
+	bhi	.L1465
 	ldp	w0, w1, [x29, 132]
 	adrp	x19, .LANCHOR18
 	add	x19, x19, :lo12:.LANCHOR18
@@ -8918,48 +8927,50 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1467:
+.L1466:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1466
+	bls	.L1465
 	ldr	w1, [x29, 128]
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
-	mov	w10, 160
-	mov	w23, 255
-	ldrb	w4, [x0, w1, sxtw]
+	ldrb	w23, [x0, w1, sxtw]
+	mov	w0, w23
+	bl	zftl_flash_exit_slc_mode
 	mov	x0, 32
-	umaddl	x10, w10, w4, x0
+	mov	w5, 160
+	umaddl	x5, w5, w23, x0
 	ldr	x0, [x29, 112]
-	ubfiz	x4, x4, 8, 8
-	add	x0, x0, x10
+	ubfiz	x23, x23, 8, 8
+	add	x0, x0, x5
 	str	x0, [x29, 104]
 	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	add	x27, x0, x4
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	add	x27, x4, x23
+	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1468
+	bne	.L1467
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1542:
+.L1541:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1543
-.L1468:
+	b	.L1542
+.L1467:
 	cmp	w20, 1
-	bhi	.L1470
+	bhi	.L1469
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1543:
+.L1542:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8974,10 +8985,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1471
+	bne	.L1470
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1472:
+.L1471:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8985,122 +8996,122 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1506
+	bls	.L1505
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1473:
+.L1472:
 	adrp	x3, .LANCHOR151
 	mov	x1, 0
 	ldr	x0, [x3, #:lo12:.LANCHOR151]
-.L1474:
+.L1473:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1474
+	bhi	.L1473
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1475
+	bne	.L1474
 	mov	w1, 0
-.L1477:
+.L1476:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1476
+	beq	.L1475
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1476
+	beq	.L1475
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1477
-.L1478:
+	bne	.L1476
+.L1477:
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1480:
-	b	.L1480
-.L1470:
+.L1479:
+	b	.L1479
+.L1469:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1542
-.L1471:
+	b	.L1541
+.L1470:
 	str	wzr, [x27, 2052]
-	b	.L1472
-.L1506:
+	b	.L1471
+.L1505:
 	mov	w23, 16
-	b	.L1473
-.L1476:
+	b	.L1472
+.L1475:
 	cmp	w1, 6
-	bhi	.L1478
-.L1479:
+	bhi	.L1477
+.L1478:
 	ldr	x2, [x3, #:lo12:.LANCHOR151]
 	mov	x0, 0
-.L1484:
+.L1483:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1485
+	bgt	.L1484
 	ldr	x1, [x3, #:lo12:.LANCHOR151]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1487:
-	mov	x0, 0
 .L1486:
+	mov	x0, 0
+.L1485:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1486
+	bgt	.L1485
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1487
+	bne	.L1486
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1488:
+.L1487:
 	mov	w3, 0
 	mov	w0, 0
-.L1492:
+.L1491:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1490:
+.L1489:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1490
+	bne	.L1489
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1492
+	bne	.L1491
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1488
+	bgt	.L1487
 	mov	x0, 0
 	mov	w3, 0
-.L1495:
+.L1494:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1495
+	bne	.L1494
 	cmp	w3, 7
-	ble	.L1496
+	ble	.L1495
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC93
@@ -9110,67 +9121,67 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1497:
-	b	.L1497
-.L1475:
+.L1496:
+	b	.L1496
+.L1474:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1479
+	bne	.L1478
 	mov	x1, 0
-.L1481:
+.L1480:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1479
+	beq	.L1478
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1479
+	beq	.L1478
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1481
+	bne	.L1480
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1483:
-	b	.L1483
-.L1485:
+.L1482:
+	b	.L1482
+.L1484:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1484
-.L1496:
+	b	.L1483
+.L1495:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1508
+	beq	.L1507
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1498:
-	ldr	x10, [x29, 104]
+.L1497:
+	ldr	x5, [x29, 104]
 	mov	w3, 0
-.L1499:
+.L1498:
 	mov	x1, 0
-.L1500:
+.L1499:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
-	strb	w16, [x10, x1]
+	strb	w16, [x5, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1500
+	bhi	.L1499
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
-	add	x10, x10, x0
+	add	x5, x5, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1499
+	bgt	.L1498
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1502
+	bhi	.L1501
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -9185,20 +9196,20 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1544:
+.L1543:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1467
-.L1508:
+	b	.L1466
+.L1507:
 	mov	x0, 4
-	b	.L1498
-.L1502:
+	b	.L1497
+.L1501:
 	mov	w0, 56
-	b	.L1544
+	b	.L1543
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -9210,9 +9221,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1545
+	bhi	.L1544
 	b	hynix_get_read_retry_default
-.L1545:
+.L1544:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9231,27 +9242,27 @@ nandc_xfer_done:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
 	strb	wzr, [x0, #:lo12:.LANCHOR152]
-	bne	.L1548
+	bne	.L1547
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1549
+	tbnz	x0, 1, .L1548
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1550:
+.L1549:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1553
+	tbnz	x0, 20, .L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1550
+	bne	.L1549
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -9263,39 +9274,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1550
-.L1549:
+	b	.L1549
+.L1548:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1551:
+.L1550:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1553
+	bge	.L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1552
+	tbz	x0, 13, .L1551
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1552
+	tbz	x0, 17, .L1551
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
 	ubfx	x1, x1, 17, 1
-.L1585:
+.L1584:
 	bl	printf
-	b	.L1553
-.L1552:
+	b	.L1552
+.L1551:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1551
+	bne	.L1550
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9309,10 +9320,10 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1551
+	tbz	x0, 13, .L1550
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR152]
-.L1553:
+.L1552:
 	adrp	x0, .LANCHOR46+32
 	ldp	x19, x20, [sp, 16]
 	str	wzr, [x0, #:lo12:.LANCHOR46+32]
@@ -9320,26 +9331,26 @@ nandc_xfer_done:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1548:
+.L1547:
 	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1559
+	tbnz	x0, 1, .L1558
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1560:
+.L1559:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1553
+	tbnz	x0, 20, .L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1560
+	bne	.L1559
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -9351,34 +9362,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1560
-.L1559:
+	b	.L1559
+.L1558:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1561:
+.L1560:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1553
+	bge	.L1552
 	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1562
+	tbz	x0, 13, .L1561
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1562
+	tbz	x0, 17, .L1561
 	adrp	x0, .LC98
 	ldr	w1, [x29, 72]
 	add	x0, x0, :lo12:.LC98
-	b	.L1585
-.L1562:
+	b	.L1584
+.L1561:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1561
+	bne	.L1560
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9391,7 +9402,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1561
+	b	.L1560
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9412,20 +9423,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1605
+	cbnz	w22, .L1604
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1588
+	bne	.L1587
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1589:
+.L1588:
 	cmp	w2, w19
-	bcc	.L1593
+	bcc	.L1592
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9434,7 +9445,7 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1595
+	bne	.L1594
 	mov	w1, w19
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
@@ -9443,11 +9454,11 @@ nandc_xfer:
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1595:
-	tbz	x19, 13, .L1596
+.L1594:
+	tbz	x19, 13, .L1595
 	adrp	x1, .LANCHOR152
 	ldrb	w1, [x1, #:lo12:.LANCHOR152]
-	cbz	w1, .L1596
+	cbz	w1, .L1595
 	mov	w1, w19
 	adrp	x0, .LC100
 	add	x0, x0, :lo12:.LC100
@@ -9455,14 +9466,14 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1624:
+.L1623:
 	mov	w0, -1
-.L1587:
+.L1586:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1593:
+.L1592:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9473,30 +9484,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1607
+	tbnz	x1, 2, .L1606
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1607
+	tbnz	x1, 18, .L1606
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1591
+	ble	.L1590
 	ubfx	x1, x1, 3, 7
-.L1592:
+.L1591:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1590:
+.L1589:
 	add	w2, w2, 1
-	b	.L1589
-.L1591:
+	b	.L1588
+.L1590:
 	ubfx	x1, x1, 19, 7
-	b	.L1592
-.L1607:
+	b	.L1591
+.L1606:
 	mov	w0, -1
-	b	.L1590
-.L1588:
+	b	.L1589
+.L1587:
 	adrp	x0, .LANCHOR43
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -9508,25 +9519,25 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1598:
+.L1597:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1599
+	bcc	.L1598
 	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1600:
+.L1599:
 	cmp	w3, w19
-	bcc	.L1604
+	bcc	.L1603
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1596
+	bne	.L1595
 	mov	w1, w19
 	adrp	x0, .LC101
 	add	x0, x0, :lo12:.LC101
@@ -9534,8 +9545,8 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1624
-.L1599:
+	b	.L1623
+.L1598:
 	ldr	x7, [x6, #:lo12:.LANCHOR46]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -9552,16 +9563,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1598
-.L1604:
+	b	.L1597
+.L1603:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1610
+	tbnz	x1, 2, .L1609
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1610
+	tbnz	x1, 15, .L1609
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9574,42 +9585,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1602
+	bls	.L1601
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1623:
+.L1622:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1601:
+.L1600:
 	add	w3, w3, 1
-	b	.L1600
-.L1602:
+	b	.L1599
+.L1601:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1623
-.L1610:
+	b	.L1622
+.L1609:
 	mov	w0, -1
-	b	.L1601
-.L1596:
+	b	.L1600
+.L1595:
 	cmn	w0, #1
-	beq	.L1587
+	beq	.L1586
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1587
+	bne	.L1586
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1587
+	bne	.L1586
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1587
-.L1605:
+	b	.L1586
+.L1604:
 	mov	w0, 0
-	b	.L1587
+	b	.L1586
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9633,22 +9644,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1626
+	tbz	x0, 4, .L1625
 	mov	w3, w1
 	adrp	x0, .LC102
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1626:
+.L1625:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	adrp	x6, .LANCHOR16
-	cbnz	w23, .L1627
+	cbnz	w23, .L1626
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1628:
+.L1627:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9665,12 +9676,12 @@ flash_read_page:
 	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1630
-	cbz	w23, .L1630
+	bne	.L1629
+	cbz	w23, .L1629
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1639:
+.L1638:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9694,23 +9705,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1627:
+.L1626:
 	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1629
+	bne	.L1628
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1628
-.L1629:
+	b	.L1627
+.L1628:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1628
-.L1630:
+	b	.L1627
+.L1629:
 	mov	w0, w20
-	b	.L1639
+	b	.L1638
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -9748,12 +9759,12 @@ micron_read_retrial:
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1641:
+.L1640:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1646
-.L1645:
+	bcc	.L1645
+.L1644:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -9767,14 +9778,14 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1647
+	bcc	.L1646
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1647:
+.L1646:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1640
+	bne	.L1639
 	adrp	x0, .LC104
 	mov	w4, w28
 	mov	w3, w21
@@ -9782,7 +9793,7 @@ micron_read_retrial:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1640:
+.L1639:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9791,7 +9802,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1646:
+.L1645:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -9812,7 +9823,7 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1642
+	tbz	x0, 12, .L1641
 	str	w7, [x29, 112]
 	mov	w4, w28
 	mov	w3, w21
@@ -9822,9 +9833,9 @@ micron_read_retrial:
 	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1642:
+.L1641:
 	cmn	w7, #1
-	beq	.L1643
+	beq	.L1642
 	adrp	x0, .LANCHOR151
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
@@ -9832,13 +9843,13 @@ micron_read_retrial:
 	ldr	x25, [x0, #:lo12:.LANCHOR151]
 	adrp	x0, .LANCHOR153
 	ldr	x26, [x0, #:lo12:.LANCHOR153]
-	bcc	.L1649
-.L1643:
+	bcc	.L1648
+.L1642:
 	mov	w21, w27
-	b	.L1641
-.L1649:
+	b	.L1640
+.L1648:
 	mov	w28, w7
-	b	.L1645
+	b	.L1644
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9879,17 +9890,17 @@ toshiba_3d_read_retrial:
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR23
-	cbnz	w4, .L1664
+	cbnz	w4, .L1663
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1671:
+.L1670:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1665
+	bne	.L1664
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9897,7 +9908,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1666:
+.L1665:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9907,7 +9918,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1667
+	tbz	x0, 4, .L1666
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -9916,9 +9927,9 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1667:
+.L1666:
 	cmn	w4, #1
-	beq	.L1668
+	beq	.L1667
 	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
@@ -9929,38 +9940,38 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1686
-.L1668:
+	bcc	.L1685
+.L1667:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1671
-.L1670:
+	bne	.L1670
+.L1669:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1672
+	bne	.L1671
 	mov	w2, 0
-.L1709:
+.L1708:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1673
-.L1665:
+	b	.L1672
+.L1664:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1666
-.L1686:
+	b	.L1665
+.L1685:
 	mov	w19, w4
-	b	.L1670
-.L1672:
+	b	.L1669
+.L1671:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1673:
+.L1672:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1682
+	bne	.L1681
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9969,19 +9980,19 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1682:
+.L1681:
 	adrp	x0, .LANCHOR43
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1683
+	bcc	.L1682
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1683:
+.L1682:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1684
+	bne	.L1683
 	adrp	x0, .LC107
 	mov	w4, w19
 	mov	w3, w20
@@ -9989,7 +10000,7 @@ toshiba_3d_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1684:
+.L1683:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9999,23 +10010,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1664:
+.L1663:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1680:
+.L1679:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1674
+	bne	.L1673
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1708:
+.L1707:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -10027,7 +10038,7 @@ toshiba_3d_read_retrial:
 	mov	w4, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L1676
+	tbz	x0, 4, .L1675
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -10036,9 +10047,9 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1676:
+.L1675:
 	cmn	w4, #1
-	beq	.L1677
+	beq	.L1676
 	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
@@ -10049,32 +10060,32 @@ toshiba_3d_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1687
-.L1677:
+	bcc	.L1686
+.L1676:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1680
-.L1679:
+	bne	.L1679
+.L1678:
 	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1681
+	bne	.L1680
 	mov	w2, 1
-	b	.L1709
-.L1674:
+	b	.L1708
+.L1673:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1708
-.L1687:
+	b	.L1707
+.L1686:
 	mov	w19, w4
-	b	.L1679
-.L1681:
+	b	.L1678
+.L1680:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1673
+	b	.L1672
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -10106,35 +10117,35 @@ toshiba_read_retrial:
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1728
+	bls	.L1727
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1729
+	cbz	w0, .L1728
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1712:
+.L1711:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1711:
+.L1710:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1713:
+.L1712:
 	adrp	x0, .LANCHOR154
 	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1722
+	bcc	.L1721
 	mov	w28, w24
-.L1721:
+.L1720:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10142,9 +10153,9 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1723
+	bhi	.L1722
 	bl	sandisk_set_rr_para
-.L1724:
+.L1723:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -10154,14 +10165,14 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1725
+	bcc	.L1724
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1725:
+.L1724:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1726
+	bne	.L1725
 	adrp	x0, .LC107
 	mov	w4, w28
 	mov	w3, w20
@@ -10169,12 +10180,12 @@ toshiba_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1726:
+.L1725:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1710
+	cbz	w23, .L1709
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1710:
+.L1709:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10183,13 +10194,13 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1729:
-	mov	w23, 0
-	b	.L1712
 .L1728:
 	mov	w23, 0
 	b	.L1711
-.L1722:
+.L1727:
+	mov	w23, 0
+	b	.L1710
+.L1721:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
@@ -10197,22 +10208,22 @@ toshiba_read_retrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1714
+	bhi	.L1713
 	bl	sandisk_set_rr_para
-.L1715:
+.L1714:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	cmp	w0, 34
-	bne	.L1716
+	bne	.L1715
 	adrp	x0, .LANCHOR154
 	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1716
+	bne	.L1715
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1716:
+.L1715:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10227,7 +10238,7 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1719
+	beq	.L1718
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
 	adrp	x0, .LANCHOR151
@@ -10238,16 +10249,16 @@ toshiba_read_retrial:
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1721
-.L1719:
+	bcc	.L1720
+.L1718:
 	add	w20, w20, 1
-	b	.L1713
-.L1714:
+	b	.L1712
+.L1713:
 	bl	toshiba_set_rr_para
-	b	.L1715
-.L1723:
+	b	.L1714
+.L1722:
 	bl	toshiba_set_rr_para
-	b	.L1724
+	b	.L1723
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10280,24 +10291,24 @@ hynix_read_retrial:
 	mov	w5, 0
 	adrp	x7, .LANCHOR151
 	adrp	x8, .LANCHOR153
-.L1743:
+.L1742:
 	cmp	w5, w24
-	bcc	.L1748
-.L1747:
+	bcc	.L1747
+.L1746:
 	adrp	x0, .LANCHOR43
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1749
+	bcc	.L1748
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1749:
+.L1748:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1742
+	bne	.L1741
 	adrp	x0, .LC108
 	mov	w4, w19
 	mov	w3, w5
@@ -10305,7 +10316,7 @@ hynix_read_retrial:
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1742:
+.L1741:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10314,7 +10325,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1748:
+.L1747:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10335,7 +10346,7 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1745
+	beq	.L1744
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
@@ -10343,13 +10354,13 @@ hynix_read_retrial:
 	ldr	x26, [x8, #:lo12:.LANCHOR153]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1751
-.L1745:
+	bcc	.L1750
+.L1744:
 	add	w5, w5, 1
-	b	.L1743
-.L1751:
+	b	.L1742
+.L1750:
 	mov	w19, w0
-	b	.L1747
+	b	.L1746
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10385,7 +10396,7 @@ flash_ddr_tuning_read:
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1767:
+.L1766:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -10397,7 +10408,7 @@ flash_ddr_tuning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1762
+	tbz	x0, 4, .L1761
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -10405,10 +10416,10 @@ flash_ddr_tuning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1762:
+.L1761:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1763
+	bhi	.L1762
 	adrp	x0, .LANCHOR151
 	ldr	x0, [x0, #:lo12:.LANCHOR151]
 	str	x0, [x29, 128]
@@ -10416,40 +10427,40 @@ flash_ddr_tuning_read:
 	ldr	x26, [x0, #:lo12:.LANCHOR153]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1772
+	bcs	.L1771
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1772
+	bls	.L1771
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1765:
+.L1764:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1766:
-	cbz	w28, .L1768
+.L1765:
+	cbz	w28, .L1767
 	adrp	x0, .LANCHOR43
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1768
+	bls	.L1767
 	mov	w1, w28
 	adrp	x0, .LC110
 	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1782:
+.L1781:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1761
+	cbz	w19, .L1760
 	ldr	w1, [x29, 136]
 	adrp	x0, .LC111
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC111
 	mov	w27, w19
 	bl	printf
-.L1761:
+.L1760:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10458,29 +10469,29 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1763:
+.L1762:
 	cmp	w24, w23
-	bls	.L1773
+	bls	.L1772
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1766
+	bhi	.L1765
 	mov	w23, w24
-.L1773:
-	mov	w24, 0
-	b	.L1764
 .L1772:
+	mov	w24, 0
+	b	.L1763
+.L1771:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1764:
+.L1763:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1767
-	b	.L1765
-.L1768:
+	bne	.L1766
+	b	.L1764
+.L1767:
 	ldrb	w0, [x29, 124]
-	b	.L1782
+	b	.L1781
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10504,47 +10515,47 @@ flash_read_page_en:
 	ubfx	x26, x19, 24, 2
 	mov	x25, x0
 	cmp	w1, w21
-	bhi	.L1784
+	bhi	.L1783
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC0
-	mov	w2, 377
+	mov	w2, 380
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1784:
+.L1783:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w21, sxtw]
 	ldrb	w0, [x25, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bcs	.L1785
+	bcs	.L1784
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 6, .L1785
+	tbz	x0, 6, .L1784
 	adrp	x0, .LC112
 	mov	w3, w19
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC112
 	bl	printf
-.L1785:
-	cbnz	w26, .L1786
+.L1784:
+	cbnz	w26, .L1785
 	adrp	x0, .LANCHOR0
 	adrp	x1, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L1787
-	ldrb	w0, [x1, #:lo12:.LANCHOR1]
 	cbz	w0, .L1786
-.L1787:
+	ldrb	w0, [x1, #:lo12:.LANCHOR1]
+	cbz	w0, .L1785
+.L1786:
 	adrp	x0, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR1]
 	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1788
+	cbz	w1, .L1787
 	add	w19, w0, w19, lsl 1
-.L1786:
+.L1785:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10553,16 +10564,16 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1783
+	bne	.L1782
 	adrp	x25, .LANCHOR45
 	mov	x26, x25
 	ldrb	w27, [x25, #:lo12:.LANCHOR45]
-	cbnz	w27, .L1790
-.L1793:
+	cbnz	w27, .L1789
+.L1792:
 	adrp	x0, .LANCHOR156
 	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1791
-.L1792:
+	cbnz	x5, .L1790
+.L1791:
 	ldrb	w4, [x26, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
@@ -10572,7 +10583,7 @@ flash_read_page_en:
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbz	w0, .L1783
+	cbz	w0, .L1782
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10585,13 +10596,13 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1788:
+.L1787:
 	adrp	x1, .LANCHOR3
 	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1786
-.L1790:
+	b	.L1785
+.L1789:
 	strb	wzr, [x25, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
@@ -10601,10 +10612,10 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w27, [x25, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1793
-.L1811:
+	beq	.L1792
+.L1810:
 	mov	w21, w0
-.L1783:
+.L1782:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10613,7 +10624,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1791:
+.L1790:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10621,8 +10632,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1792
-	b	.L1811
+	beq	.L1791
+	b	.L1810
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10652,23 +10663,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1813
+	bne	.L1812
 	mov	w27, 0
 	mov	w28, 2
-.L1814:
-	cmp	w27, w19
-	ble	.L1817
 .L1813:
+	cmp	w27, w19
+	ble	.L1816
+.L1812:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L1818
+	tbz	x0, 12, .L1817
 	ldr	w3, [x22]
 	adrp	x0, .LC114
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1818:
+.L1817:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10677,7 +10688,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1817:
+.L1816:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10687,14 +10698,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1815
+	bne	.L1814
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1814
-.L1815:
+	b	.L1813
+.L1814:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1814
+	b	.L1813
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -10731,7 +10742,7 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1825
+	tbz	x0, 12, .L1824
 	ldr	x4, [x20, #:lo12:.LANCHOR26]
 	adrp	x2, .LANCHOR157
 	adrp	x0, .LC115
@@ -10740,7 +10751,7 @@ flash_info_blk_init:
 	mov	w1, 49
 	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1825:
+.L1824:
 	adrp	x21, .LANCHOR158
 	adrp	x23, .LANCHOR2
 	mov	w24, 21321
@@ -10748,7 +10759,7 @@ flash_info_blk_init:
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1828:
+.L1827:
 	ldrh	w1, [x26]
 	mov	w4, 4
 	ldr	x3, [x21, #:lo12:.LANCHOR158]
@@ -10759,18 +10770,18 @@ flash_info_blk_init:
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1826
+	beq	.L1825
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1827
-.L1826:
+	beq	.L1826
+.L1825:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1828
-.L1852:
+	bne	.L1827
+.L1851:
 	mov	w0, -1
-.L1824:
+.L1823:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10778,13 +10789,13 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1836:
+.L1835:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1837
+	bne	.L1836
 	ldr	w19, [x0, 4]
-.L1830:
+.L1829:
 	add	x24, x21, :lo12:.LANCHOR159
 	ldrh	w0, [x23, #:lo12:.LANCHOR2]
 	ldr	x3, [x22, #:lo12:.LANCHOR158]
@@ -10795,21 +10806,21 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1831
+	beq	.L1830
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1831
+	bne	.L1830
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1831
+	bcs	.L1830
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
 	strb	w1, [x21, #:lo12:.LANCHOR159]
 	strb	w0, [x24, 1]
-.L1831:
+.L1830:
 	ldrb	w1, [x21, #:lo12:.LANCHOR159]
 	add	x24, x21, :lo12:.LANCHOR159
 	ldr	x3, [x22, #:lo12:.LANCHOR158]
@@ -10825,17 +10836,17 @@ flash_info_blk_init:
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1832:
-	tbz	w19, #31, .L1834
+.L1831:
+	tbz	w19, #31, .L1833
 	cmn	w19, #1
-	bne	.L1835
+	bne	.L1834
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w1, [x0]
 	adrp	x0, .LC116
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1852
-.L1834:
+	b	.L1851
+.L1833:
 	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
@@ -10843,20 +10854,20 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1833
+	beq	.L1832
 	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1833
-.L1835:
+	bne	.L1832
+.L1834:
 	mov	w0, 0
-	b	.L1824
-.L1833:
+	b	.L1823
+.L1832:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1832
-.L1827:
+	b	.L1831
+.L1826:
 	adrp	x21, .LANCHOR159
 	add	x1, x21, :lo12:.LANCHOR159
 	ldrb	w3, [x2, 37]
@@ -10870,10 +10881,10 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1836
-.L1837:
+	bne	.L1835
+.L1836:
 	mov	w19, 0
-	b	.L1830
+	b	.L1829
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10912,15 +10923,15 @@ flash_ddr_para_scan:
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1854
+	bne	.L1853
 	ldrb	w1, [x20, #:lo12:.LANCHOR42]
-	tbz	x1, 0, .L1854
+	tbz	x1, 0, .L1853
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR20]
-.L1855:
+.L1854:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10928,10 +10939,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1854:
+.L1853:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR20]
-	b	.L1855
+	b	.L1854
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_plane_page_read,"ax",@progbits
 	.align	2
@@ -10951,14 +10962,14 @@ flash_complete_plane_page_read:
 	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x22, x2
 	cmp	w0, w23
-	bhi	.L1861
+	bhi	.L1860
 	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 782
+	mov	w2, 785
 	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1861:
+.L1860:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w6, [x0, w23, sxtw]
@@ -10966,11 +10977,11 @@ flash_complete_plane_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
-	cbnz	w20, .L1862
+	cbnz	w20, .L1861
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1862:
+.L1861:
 	adrp	x0, .LANCHOR19+16
 	and	x1, x6, 255
 	and	w3, w19, 255
@@ -10979,28 +10990,28 @@ flash_complete_plane_page_read:
 	adrp	x5, .LANCHOR16
 	cmp	w0, 1
 	lsr	w0, w19, 16
-	bne	.L1863
+	bne	.L1862
 	add	x1, x4, x1, lsl 8
 	mov	w4, 6
-.L1874:
+.L1873:
 	str	w4, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
 	str	w3, [x1, 2052]
 	str	w2, [x1, 2052]
 	str	w0, [x1, 2052]
-.L1872:
+.L1871:
 	mov	w0, 224
 	str	w0, [x1, 2056]
 	ldr	x0, [x5, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1866
-	cbz	w20, .L1866
+	bne	.L1865
+	cbz	w20, .L1865
 	add	w19, w19, w19, lsl 1
 	sub	w20, w20, #1
 	add	w0, w19, w20
-.L1873:
+.L1872:
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR34+9
 	mov	x4, x22
@@ -11017,15 +11028,15 @@ flash_complete_plane_page_read:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1863:
+.L1862:
 	ldr	x7, [x5, #:lo12:.LANCHOR16]
 	add	x1, x4, x1, lsl 8
 	ldrb	w7, [x7, 12]
 	cmp	w7, 3
-	bne	.L1865
+	bne	.L1864
 	mov	w4, 5
-	b	.L1874
-.L1865:
+	b	.L1873
+.L1864:
 	str	wzr, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
@@ -11036,10 +11047,10 @@ flash_complete_plane_page_read:
 	str	w0, [x1, 2056]
 	str	wzr, [x1, 2052]
 	str	wzr, [x1, 2052]
-	b	.L1872
-.L1866:
+	b	.L1871
+.L1865:
 	mov	w0, w19
-	b	.L1873
+	b	.L1872
 	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -11062,14 +11073,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1876
+	bhi	.L1875
 	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 904
+	mov	w2, 907
 	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1876:
+.L1875:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
@@ -11077,11 +11088,11 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1877
+	cbnz	w21, .L1876
 	mov	w0, w19
 	bl	slc_phy_page_address_calc
 	mov	w19, w0
-.L1877:
+.L1876:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -11100,12 +11111,12 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1878
-	cbz	w21, .L1878
+	bne	.L1877
+	cbz	w21, .L1877
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1905:
+.L1904:
 	adrp	x20, .LANCHOR34
 	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
@@ -11116,10 +11127,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1880
+	bne	.L1879
 	adrp	x26, .LANCHOR45
 	ldrb	w27, [x26, #:lo12:.LANCHOR45]
-	cbz	w27, .L1881
+	cbz	w27, .L1880
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR45]
@@ -11128,16 +11139,16 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR45]
-	cbnz	w21, .L1882
-.L1887:
+	cbnz	w21, .L1881
+.L1886:
 	adrp	x1, .LANCHOR0
 	ldrb	w1, [x1, #:lo12:.LANCHOR0]
-	cbz	w1, .L1882
+	cbz	w1, .L1881
 	adrp	x1, .LANCHOR43
 	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1882
+	blt	.L1881
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -11145,7 +11156,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1875:
+.L1874:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11153,17 +11164,17 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1878:
+.L1877:
 	mov	w0, w19
-	b	.L1905
-.L1882:
+	b	.L1904
+.L1881:
 	cmn	w0, #1
-	bne	.L1875
-.L1888:
+	bne	.L1874
+.L1887:
 	adrp	x0, .LANCHOR156
 	ldr	x5, [x0, #:lo12:.LANCHOR156]
-	cbnz	x5, .L1884
-.L1886:
+	cbnz	x5, .L1883
+.L1885:
 	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
@@ -11174,10 +11185,10 @@ flash_complete_page_read:
 	bl	printf
 	adrp	x0, .LANCHOR20
 	ldrb	w0, [x0, #:lo12:.LANCHOR20]
-	cbnz	w0, .L1885
+	cbnz	w0, .L1884
 	mov	w0, -1
-	b	.L1875
-.L1884:
+	b	.L1874
+.L1883:
 	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
@@ -11186,9 +11197,9 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1886
-	b	.L1875
-.L1885:
+	beq	.L1885
+	b	.L1874
+.L1884:
 	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -11202,12 +11213,12 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
+.L1879:
+	cbz	w21, .L1886
+	b	.L1874
 .L1880:
-	cbz	w21, .L1887
-	b	.L1875
-.L1881:
-	cbnz	w21, .L1888
-	b	.L1887
+	cbnz	w21, .L1887
+	b	.L1886
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
@@ -11223,59 +11234,59 @@ queue_wait_first_req_completed:
 	cmp	w0, 255
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	bne	.L1907
-.L1936:
-	mov	w22, 0
-	b	.L1906
-.L1907:
+	bne	.L1906
+.L1935:
+	mov	w21, 0
+	b	.L1905
+.L1906:
 	adrp	x19, .LANCHOR49
 	sxtw	x20, w0
 	add	x1, x19, :lo12:.LANCHOR49
 	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
-	ldr	w22, [x1, 40]
+	ldr	w24, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1936
-	adrp	x1, .L1910
-	add	x1, x1, :lo12:.L1910
+	bhi	.L1935
+	adrp	x1, .L1909
+	add	x1, x1, :lo12:.L1909
 	ldrh	w1, [x1,w3,uxtw #1]
-	adr	x3, .Lrtx1910
+	adr	x3, .Lrtx1909
 	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1910:
+.Lrtx1909:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1910:
-	.2byte	(.L1909 - .Lrtx1910) / 4
-	.2byte	(.L1911 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1913 - .Lrtx1910) / 4
-	.2byte	(.L1914 - .Lrtx1910) / 4
-	.2byte	(.L1915 - .Lrtx1910) / 4
-	.2byte	(.L1912 - .Lrtx1910) / 4
-	.2byte	(.L1915 - .Lrtx1910) / 4
-	.section	.text.queue_wait_first_req_completed
 .L1909:
+	.2byte	(.L1908 - .Lrtx1909) / 4
+	.2byte	(.L1910 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1912 - .Lrtx1909) / 4
+	.2byte	(.L1913 - .Lrtx1909) / 4
+	.2byte	(.L1914 - .Lrtx1909) / 4
+	.2byte	(.L1911 - .Lrtx1909) / 4
+	.2byte	(.L1914 - .Lrtx1909) / 4
+	.section	.text.queue_wait_first_req_completed
+.L1908:
 	mov	w1, 64
-	mov	w0, w22
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1936
+	tbz	x0, 6, .L1935
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldp	x1, x2, [x0, 8]
-	cbz	x2, .L1917
+	cbz	x2, .L1916
 	ldrb	w3, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w3, w0
 	csel	x1, x1, x2, ne
-.L1917:
+.L1916:
 	add	x19, x19, :lo12:.LANCHOR49
-	mov	w0, w22
+	mov	w0, w24
 	add	x20, x19, x20, lsl 6
 	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
@@ -11285,12 +11296,12 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
 	strb	w0, [x20, 2]
-	b	.L1936
-.L1911:
+	b	.L1935
+.L1910:
 	mov	w1, 64
-	mov	w0, w22
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1936
+	tbz	x0, 6, .L1935
 	add	x0, x19, :lo12:.LANCHOR49
 	lsl	x2, x20, 6
 	add	x1, x0, x2
@@ -11298,23 +11309,23 @@ queue_wait_first_req_completed:
 	add	x0, x0, x21, lsl 6
 	ldr	x24, [x0, 8]
 	ldp	x26, x0, [x1, 8]
-	cbz	x0, .L1918
+	cbz	x0, .L1917
 	ldrb	w2, [x1, 56]
 	adrp	x1, .LANCHOR121
 	ldrb	w1, [x1, #:lo12:.LANCHOR121]
 	cmp	w2, w1
 	csel	x26, x26, x0, ne
-.L1918:
+.L1917:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	x1, [x0, 16]
-	cbz	x1, .L1919
+	cbz	x1, .L1918
 	ldrb	w2, [x0, 56]
 	adrp	x0, .LANCHOR121
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w2, w0
 	csel	x24, x24, x1, ne
-.L1919:
+.L1918:
 	add	x22, x19, :lo12:.LANCHOR49
 	mov	x1, x26
 	add	x27, x22, x20, lsl 6
@@ -11329,15 +11340,15 @@ queue_wait_first_req_completed:
 	bl	flash_complete_plane_page_read
 	mov	w25, w0
 	cmn	w23, #1
-	beq	.L1920
+	beq	.L1919
 	ldr	w0, [x27, 36]
 	cmn	w0, #1
-	beq	.L1921
+	beq	.L1920
 	ldr	x1, [x27, 24]
 	ldr	w1, [x1, 4]
 	cmp	w0, w1
-	beq	.L1921
-.L1920:
+	beq	.L1920
+.L1919:
 	add	x22, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x22, x22, x20, lsl 6
@@ -11351,36 +11362,36 @@ queue_wait_first_req_completed:
 	mov	w23, w0
 	ldr	w2, [x22, 36]
 	cmn	w2, #1
-	beq	.L1922
+	beq	.L1921
 	ldr	x0, [x22, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1922
+	beq	.L1921
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1922
+	tbz	x1, 6, .L1921
 	ldr	w3, [x0]
 	adrp	x0, .LC118
 	ldr	w1, [x22, 40]
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1922:
+.L1921:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x20, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1921
+	beq	.L1920
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1921
+	beq	.L1920
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
 	mov	w2, 338
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1921:
+.L1920:
 	add	x0, x19, :lo12:.LANCHOR49
 	mov	w1, 12
 	add	x20, x0, x20, lsl 6
@@ -11390,16 +11401,16 @@ queue_wait_first_req_completed:
 	str	w23, [x20, 52]
 	orr	w1, w1, 8
 	strb	w1, [x20, 2]
-	beq	.L1923
+	beq	.L1922
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1925
+	beq	.L1924
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1925
-.L1923:
+	beq	.L1924
+.L1922:
 	add	x20, x19, :lo12:.LANCHOR49
 	adrp	x2, .LANCHOR121
 	add	x20, x20, x21, lsl 6
@@ -11412,36 +11423,36 @@ queue_wait_first_req_completed:
 	bl	flash_read_page_en
 	ldr	w2, [x20, 36]
 	cmn	w2, #1
-	beq	.L1927
+	beq	.L1926
 	ldr	x0, [x20, 24]
 	ldr	w4, [x0, 4]
 	cmp	w2, w4
-	beq	.L1927
+	beq	.L1926
 	adrp	x1, .LANCHOR14
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 6, .L1927
+	tbz	x1, 6, .L1926
 	ldr	w3, [x0]
 	adrp	x0, .LC118
 	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1927:
+.L1926:
 	add	x0, x19, :lo12:.LANCHOR49
 	add	x0, x0, x21, lsl 6
 	ldr	w1, [x0, 36]
 	cmn	w1, #1
-	beq	.L1925
+	beq	.L1924
 	ldr	x0, [x0, 24]
 	ldr	w0, [x0, 4]
 	cmp	w1, w0
-	beq	.L1925
+	beq	.L1924
 	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
 	mov	w2, 353
 	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1925:
+.L1924:
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 12
 	add	x21, x19, x21, lsl 6
@@ -11450,32 +11461,32 @@ queue_wait_first_req_completed:
 	str	w23, [x21, 52]
 	orr	w0, w0, 8
 	strb	w0, [x21, 2]
-	b	.L1936
-.L1912:
-	mov	w0, w22
+	b	.L1935
+.L1911:
 	mov	w1, 64
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	mov	w22, w0
-	tbz	x22, 6, .L1936
+	mov	w21, w0
+	tbz	x21, 6, .L1935
 	add	x19, x19, :lo12:.LANCHOR49
 	mov	w0, 5
 	add	x20, x19, x20, lsl 6
-	tst	w22, w0
-	beq	.L1935
+	tst	w21, w0
+	beq	.L1934
 	ldrb	w1, [x20, 1]
 	mov	w0, 11
 	ldr	w3, [x20, 40]
 	mov	w4, 11
-	ldr	w2, [x20, 52]
 	strb	w0, [x20, 58]
+	mov	w2, w21
 	adrp	x0, .LC119
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1996:
+.L1995:
 	mov	w0, -1
 	str	w0, [x20, 52]
-	b	.L1906
-.L1915:
+	b	.L1905
+.L1914:
 	cmp	w2, 10
 	add	x21, x19, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 8
@@ -11483,47 +11494,48 @@ queue_wait_first_req_completed:
 	mov	w2, 9
 	add	x0, x21, x0
 	csel	w2, w2, w1, eq
-	ubfx	x3, x22, 21, 3
-.L1930:
+	ubfx	x3, x24, 21, 3
+	mov	x22, x21
+.L1929:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1934
-	mov	w22, -1
-	b	.L1906
-.L1934:
+	bne	.L1933
+	mov	w21, -1
+	b	.L1905
+.L1933:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
-	add	x1, x21, x23, lsl 6
-	add	x0, x21, x0
+	add	x1, x22, x23, lsl 6
+	add	x0, x22, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1930
+	bne	.L1929
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1930
-	mov	w0, w22
+	bne	.L1929
+	mov	w0, w24
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
-	and	w22, w0, 64
-	tbz	x24, 6, .L1932
-	add	x21, x21, x20, lsl 6
-	ands	w22, w0, 15
-	beq	.L1933
-	ldrb	w1, [x21, 1]
+	and	w21, w0, 64
+	tbz	x24, 6, .L1931
+	add	x22, x22, x20, lsl 6
+	ands	w21, w0, 15
+	beq	.L1932
+	ldrb	w1, [x22, 1]
+	mov	w2, w0
+	ldr	w3, [x22, 40]
 	mov	w4, 11
-	ldr	w3, [x21, 40]
-	adrp	x0, .LC119
-	ldr	w2, [x21, 52]
-	add	x0, x0, :lo12:.LC119
-	mov	w22, w24
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
+	mov	w21, w24
 	bl	printf
 	mov	w0, 11
-	strb	w0, [x21, 58]
+	strb	w0, [x22, 58]
 	mov	w0, -1
-	str	w0, [x21, 52]
-.L1932:
+	str	w0, [x22, 52]
+.L1931:
 	add	x1, x19, :lo12:.LANCHOR49
 	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -11531,8 +11543,8 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1906:
-	mov	w0, w22
+.L1905:
+	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11540,40 +11552,40 @@ queue_wait_first_req_completed:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1933:
+.L1932:
 	mov	w0, 12
-	str	wzr, [x21, 52]
-	strb	w0, [x21, 58]
-	b	.L1932
-.L1913:
-	mov	w0, w22
+	str	wzr, [x22, 52]
+	strb	w0, [x22, 58]
+	b	.L1931
+.L1912:
 	mov	w1, 32
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	mov	w22, w0
-	tbz	x22, 5, .L1936
+	mov	w21, w0
+	tbz	x21, 5, .L1935
 	add	x19, x19, :lo12:.LANCHOR49
-	tst	x22, 15
+	tst	x21, 15
 	add	x20, x19, x20, lsl 6
-	beq	.L1935
+	beq	.L1934
 	mov	w0, 11
 	strb	w0, [x20, 58]
-	b	.L1996
-.L1935:
+	b	.L1995
+.L1934:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1936
-.L1914:
+	b	.L1935
+.L1913:
 	mov	w1, 64
-	mov	w0, w22
+	mov	w0, w24
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1936
+	tbz	x0, 6, .L1935
 	add	x19, x19, :lo12:.LANCHOR49
 	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1936
+	b	.L1935
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11585,17 +11597,17 @@ sblk_wait_write_queue_completed:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR53
 	add	x19, x19, :lo12:.LANCHOR53
-.L1998:
+.L1997:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1999
+	bne	.L1998
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1999:
+.L1998:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1998
+	b	.L1997
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11669,13 +11681,13 @@ sblk_read_page:
 	add	x21, x21, :lo12:.LANCHOR49
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR105
-.L2006:
-	cbnz	w20, .L2016
-.L2029:
+.L2005:
+	cbnz	w20, .L2015
+.L2028:
 	adrp	x19, .LANCHOR49
 	add	x19, x19, :lo12:.LANCHOR49
-.L2017:
-	cbnz	w22, .L2019
+.L2016:
+	cbnz	w22, .L2018
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11684,31 +11696,31 @@ sblk_read_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2016:
+.L2015:
 	ldrb	w24, [x19]
 	ldr	w25, [x19, 40]
-.L2007:
+.L2006:
 	mov	w1, 0
 	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L2008
+	cbnz	w0, .L2007
 	cmp	w20, 1
-	beq	.L2013
+	beq	.L2012
 	ldrb	w0, [x26]
-	cbnz	w0, .L2010
-.L2013:
+	cbnz	w0, .L2009
+.L2012:
 	mov	x0, x19
 	bl	queue_read_cmd
-	b	.L2011
-.L2008:
+	b	.L2010
+.L2007:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2007
-.L2010:
+	b	.L2006
+.L2009:
 	ldrb	w0, [x19]
 	ubfx	x4, x25, 21, 3
 	cmp	w0, 255
-	bne	.L2012
+	bne	.L2011
 	str	w4, [x29, 124]
 	mov	w2, 624
 	adrp	x1, .LANCHOR166
@@ -11717,18 +11729,18 @@ sblk_read_page:
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	ldr	w4, [x29, 124]
-.L2012:
+.L2011:
 	ldrb	w28, [x19]
 	sbfiz	x2, x28, 6, 32
 	add	x3, x21, x2
 	ldr	w1, [x3, 40]
 	ubfx	x0, x1, 21, 3
 	cmp	w4, w0
-	bne	.L2013
+	bne	.L2012
 	ldrh	w0, [x27, #:lo12:.LANCHOR105]
 	add	w25, w0, w25
 	cmp	w1, w25
-	bne	.L2013
+	bne	.L2012
 	ldr	w0, [x19, 40]
 	adrp	x25, .LANCHOR53
 	ldrb	w24, [x21, x2]
@@ -11754,26 +11766,26 @@ sblk_read_page:
 	add	x1, x21, x1
 	strb	w4, [x21, x2]
 	bl	buf_add_tail
-.L2011:
+.L2010:
 	subs	w20, w20, #1
-	beq	.L2029
+	beq	.L2028
 	ubfiz	x19, x24, 6, 8
 	add	x19, x21, x19
-	b	.L2006
-.L2019:
+	b	.L2005
+.L2018:
 	ldrb	w0, [x23, 58]
 	cmp	w0, 12
-	bne	.L2018
+	bne	.L2017
 	ldrb	w0, [x23]
 	sub	w22, w22, #1
 	cmp	w0, 255
-	beq	.L2018
+	beq	.L2017
 	ubfiz	x23, x0, 6, 8
 	add	x23, x19, x23
-.L2018:
+.L2017:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2017
+	b	.L2016
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11800,22 +11812,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2032
-	adrp	x0, .LC120
+	tbz	x0, 4, .L2031
+	adrp	x0, .LC121
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L2032:
+.L2031:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2033
+	cbnz	w28, .L2032
 	bl	zftl_flash_enter_slc_mode
-.L2034:
+.L2033:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11844,15 +11856,15 @@ flash_prog_page:
 	mov	w2, w0
 	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2031
+	tbz	x2, 2, .L2030
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2031
-	adrp	x0, .LC121
+	tbz	x0, 12, .L2030
+	adrp	x0, .LC122
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2031:
+.L2030:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11861,9 +11873,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2033:
+.L2032:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2034
+	b	.L2033
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11871,83 +11883,74 @@ flash_prog_page:
 	.type	flash_test_blk, %function
 flash_test_blk:
 	stp	x29, x30, [sp, -64]!
+	mov	w2, 32
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR151
 	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	ldr	x0, [x22, #:lo12:.LANCHOR151]
+	adrp	x21, .LANCHOR153
 	and	w19, w1, 65535
-	stp	x21, x22, [sp, 32]
-	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L2047
-	adrp	x0, .LANCHOR167
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
-	cmp	w0, w19
-	bhi	.L2051
-.L2047:
-	adrp	x22, .LANCHOR160
-	adrp	x23, .LANCHOR161
-	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR161]
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
 	adrp	x0, .LANCHOR2
-	ldrh	w20, [x0, #:lo12:.LANCHOR2]
-	mov	w0, w21
-	mul	w20, w20, w19
-	mov	w1, w20
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	mul	w19, w0, w19
+	mov	w0, w20
+	mov	w1, w19
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L2049
-	adrp	x19, .LANCHOR34
-	add	x19, x19, :lo12:.LANCHOR34
-	ldr	x3, [x22, #:lo12:.LANCHOR160]
-	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR161]
+	bne	.L2046
+.L2048:
+	mov	w21, -1
+.L2047:
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_erase_block
+	ldr	x23, [sp, 48]
 	mov	w0, w21
-	ldrb	w4, [x19, 9]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2046:
+	adrp	x23, .LANCHOR34
+	add	x23, x23, :lo12:.LANCHOR34
+	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	mov	w1, w19
+	ldr	x2, [x22, #:lo12:.LANCHOR151]
+	mov	w0, w20
+	ldrb	w4, [x23, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2049
-	ldrb	w4, [x19, 9]
-	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR160]
-	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR161]
+	beq	.L2048
+	ldrb	w4, [x23, 9]
+	mov	w1, w19
+	ldr	x3, [x21, #:lo12:.LANCHOR153]
+	mov	w0, w20
+	ldr	x2, [x22, #:lo12:.LANCHOR151]
 	bl	flash_read_page
-	mov	w19, w0
 	cmn	w0, #1
-	beq	.L2049
-	ldr	x0, [x23, #:lo12:.LANCHOR161]
-	ldr	w1, [x0]
-	mov	w0, 23130
-	movk	w0, 0x5a5a, lsl 16
-	cmp	w1, w0
-	bne	.L2049
-	ldr	x0, [x22, #:lo12:.LANCHOR160]
+	beq	.L2048
+	ldr	x0, [x22, #:lo12:.LANCHOR151]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L2050
-.L2049:
-	mov	w19, -1
-.L2050:
-	mov	w1, w20
-	mov	w0, w21
-	bl	flash_erase_block
-	mov	w0, w19
-.L2046:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L2051:
-	mov	w0, 0
-	b	.L2046
+	bne	.L2048
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	csetm	w21, ne
+	b	.L2047
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11958,45 +11961,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR168
+	adrp	x0, .LANCHOR167
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2062
+	cbnz	w0, .L2056
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2062
+	bhi	.L2056
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2062
+	tbz	x0, 0, .L2056
 	adrp	x21, .LANCHOR133
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
 	adrp	x24, .LANCHOR151
-.L2064:
+.L2058:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2065
-.L2062:
+	bhi	.L2059
+.L2056:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2065:
+.L2059:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2062
+	bne	.L2056
 	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12009,7 +12012,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2064
+	b	.L2058
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -12026,16 +12029,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L2068
+	bls	.L2062
 	cmp	w1, 575
-	bhi	.L2069
-	adrp	x0, .LANCHOR169
+	bhi	.L2063
+	adrp	x0, .LANCHOR168
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR169]
+	str	w2, [x0, #:lo12:.LANCHOR168]
 	adrp	x0, idb_buf
-	bhi	.L2070
+	bhi	.L2064
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -12043,9 +12046,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2146:
+.L2140:
 	bl	ftl_memcpy
-.L2125:
+.L2119:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12054,7 +12057,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L2070:
+.L2064:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -12064,14 +12067,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2146
-.L2068:
+	b	.L2140
+.L2062:
 	cmp	w1, 575
-	bls	.L2125
-.L2069:
-	adrp	x0, .LANCHOR169
-	ldr	w0, [x0, #:lo12:.LANCHOR169]
-	cbz	w0, .L2125
+	bls	.L2119
+.L2063:
+	adrp	x0, .LANCHOR168
+	ldr	w0, [x0, #:lo12:.LANCHOR168]
+	cbz	w0, .L2119
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
@@ -12093,9 +12096,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L2075:
+.L2069:
 	ldr	w5, [x1]
-	cbnz	w5, .L2073
+	cbnz	w5, .L2067
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -12103,19 +12106,19 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L2075
-.L2073:
+	bne	.L2069
+.L2067:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2109:
+.L2103:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -12128,7 +12131,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2076
+	beq	.L2070
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
@@ -12148,11 +12151,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2115
+	bne	.L2109
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2115
+	bne	.L2109
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -12188,19 +12191,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L2077:
+.L2071:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR168
+	adrp	x28, .LANCHOR167
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR168
+	add	x0, x28, :lo12:.LANCHOR167
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2079:
+.L2073:
 	cmp	w27, w20
-	bhi	.L2090
+	bhi	.L2084
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR45
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
@@ -12226,10 +12229,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2091:
+.L2085:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2105
+	bcc	.L2099
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -12238,21 +12241,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2106:
+.L2100:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2107
+	bcc	.L2101
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L2076
-	b	.L2111
-.L2115:
+	bls	.L2070
+	b	.L2105
+.L2109:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L2077
-.L2090:
+	b	.L2071
+.L2084:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -12260,30 +12263,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2081
+	cbz	w2, .L2075
 	adrp	x0, .LANCHOR1
 	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2081:
+.L2075:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2083
-.L2144:
+	bne	.L2077
+.L2138:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2085
+	cbnz	w2, .L2079
 	mov	w5, w0
-.L2086:
+.L2080:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR43
 	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2087
+	cbnz	x6, .L2081
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12303,31 +12306,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR168]
+	ldrb	w0, [x28, #:lo12:.LANCHOR167]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2088
+	cbnz	w0, .L2082
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2088:
+.L2082:
 	add	x22, x22, 2048
-.L2089:
+.L2083:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2079
-.L2083:
+	b	.L2073
+.L2077:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2144
-.L2085:
+	b	.L2138
+.L2079:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2086
-.L2087:
+	b	.L2080
+.L2081:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12346,21 +12349,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2089
-.L2105:
+	b	.L2083
+.L2099:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR167
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR167]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2092
+	cbnz	w1, .L2086
 	mov	w19, w0
-.L2093:
+.L2087:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
@@ -12380,7 +12383,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2094:
+.L2088:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12389,32 +12392,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2095
+	bne	.L2089
 	ldrb	w6, [x25]
-	cbnz	w6, .L2096
-.L2099:
+	cbnz	w6, .L2090
+.L2093:
 	adrp	x0, .LANCHOR156
 	ldr	x6, [x0, #:lo12:.LANCHOR156]
-	cbnz	x6, .L2097
-.L2098:
+	cbnz	x6, .L2091
+.L2092:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2095
+	cbz	w0, .L2089
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2145
-.L2092:
+	b	.L2139
+.L2086:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2093
-.L2096:
+	b	.L2087
+.L2090:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12428,21 +12431,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2099
-.L2145:
+	beq	.L2093
+.L2139:
 	mov	w5, w0
-.L2095:
+.L2089:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2101
+	beq	.L2095
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2094
-.L2097:
+	b	.L2088
+.L2091:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12452,9 +12455,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2098
-	b	.L2145
-.L2101:
+	beq	.L2092
+	b	.L2139
+.L2095:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12464,62 +12467,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2103
+	bne	.L2097
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2103
+	cbnz	w0, .L2097
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2103
+	bne	.L2097
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2104:
+.L2098:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2091
-.L2103:
+	b	.L2085
+.L2097:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2104
-.L2107:
+	b	.L2098
+.L2101:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2106
+	beq	.L2100
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2076:
+.L2070:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2109
+	bne	.L2103
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2111
-	adrp	x0, .LC124
+	cbnz	w0, .L2105
+	adrp	x0, .LC125
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2111:
-	adrp	x0, .LANCHOR169
-	str	wzr, [x0, #:lo12:.LANCHOR169]
-	b	.L2125
+.L2105:
+	adrp	x0, .LANCHOR168
+	str	wzr, [x0, #:lo12:.LANCHOR168]
+	b	.L2119
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12542,14 +12545,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2148
-	adrp	x1, .LANCHOR170
+	bhi	.L2142
+	adrp	x1, .LANCHOR169
 	adrp	x0, .LC0
-	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 651
+	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2148:
+.L2142:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12557,12 +12560,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2149
+	cbz	w25, .L2143
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2149:
+.L2143:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12662,21 +12665,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2157:
+.L2151:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2158
+	cbnz	w0, .L2152
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2158:
+.L2152:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2157
+	b	.L2151
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12693,13 +12696,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2161:
+.L2155:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2162
+	cbnz	w0, .L2156
 	cmp	w24, 2
-	bne	.L2163
+	bne	.L2157
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12779,21 +12782,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2164:
+.L2158:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2162:
+.L2156:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2161
-.L2163:
+	b	.L2155
+.L2157:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2164
+	b	.L2158
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12816,40 +12819,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2167
-	adrp	x1, .LANCHOR171
+	bhi	.L2161
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	mov	w2, 699
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 702
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2167:
+.L2161:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2168
+	cbnz	w0, .L2162
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2169
+	bne	.L2163
 	bl	nandc_wait_flash_ready
-.L2168:
+.L2162:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2170
+	cbnz	w22, .L2164
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2171
+	cbz	w0, .L2165
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2171:
+.L2165:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -12879,16 +12882,16 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs.constprop.29
-.L2169:
+.L2163:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2168
-.L2170:
+	b	.L2162
+.L2164:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2171
+	b	.L2165
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -12907,23 +12910,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2177
+	beq	.L2171
 	adrp	x2, .LANCHOR49
 	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2179:
+.L2173:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2178
+	bne	.L2172
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2178
+	bne	.L2172
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2177:
+.L2171:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12935,12 +12938,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2178:
+.L2172:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2179
-	b	.L2177
+	bne	.L2173
+	b	.L2171
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12957,25 +12960,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2186
+	cbz	w0, .L2180
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2186
+	tbz	x0, 8, .L2180
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC125
+	adrp	x0, .LC126
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2186:
+.L2180:
 	adrp	x25, .LANCHOR38
 	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
 	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2187:
-	cbnz	w20, .L2198
-.L2211:
+.L2181:
+	cbnz	w20, .L2192
+.L2205:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12984,49 +12987,49 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2198:
+.L2192:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2188:
+.L2182:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2189
+	cbnz	w0, .L2183
 	cmp	w20, 1
-	beq	.L2190
+	beq	.L2184
 	ldrb	w0, [x25]
-	cbnz	w0, .L2191
-.L2190:
+	cbnz	w0, .L2185
+.L2184:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2192:
+.L2186:
 	subs	w20, w20, #1
-	beq	.L2211
+	beq	.L2205
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2187
-.L2189:
+	b	.L2181
+.L2183:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2188
-.L2191:
+	b	.L2182
+.L2185:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2193
-	adrp	x1, .LANCHOR172
+	bne	.L2187
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2193:
+.L2187:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2194
+	bne	.L2188
 	adrp	x0, .LANCHOR99
 	ldrh	w2, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR98
@@ -13049,9 +13052,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2194
+	bne	.L2188
 	cmp	w21, w3
-	beq	.L2194
+	beq	.L2188
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13067,12 +13070,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2192
-.L2194:
+	b	.L2186
+.L2188:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2192
+	b	.L2186
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13085,17 +13088,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR173
-	cbz	w1, .L2214
-	ldrb	w2, [x20, #:lo12:.LANCHOR173]
+	adrp	x20, .LANCHOR172
+	cbz	w1, .L2208
+	ldrb	w2, [x20, #:lo12:.LANCHOR172]
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2214:
+.L2208:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR173]
+	strb	w0, [x20, #:lo12:.LANCHOR172]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13124,43 +13127,43 @@ flash_prog_page_en:
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2220
-	adrp	x1, .LANCHOR174
+	bhi	.L2214
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 476
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2220:
+.L2214:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2230
+	cbnz	w19, .L2224
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2222
+	cbz	w1, .L2216
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2230
-.L2222:
+	cbz	w1, .L2224
+.L2216:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2223
+	cbz	w0, .L2217
 	add	w19, w19, w1, lsl 1
-.L2221:
+.L2215:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2224
-	adrp	x0, .LC126
+	tbz	x0, 4, .L2218
+	adrp	x0, .LC127
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2224:
+.L2218:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -13168,7 +13171,7 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2225
+	cbz	w21, .L2219
 	adrp	x26, .LANCHOR160
 	adrp	x21, .LANCHOR161
 	mov	w4, w25
@@ -13179,57 +13182,57 @@ flash_prog_page_en:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2226
+	beq	.L2220
 	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2226
+	bne	.L2220
 	ldr	x0, [x26, #:lo12:.LANCHOR160]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2225
-.L2226:
+	beq	.L2219
+.L2220:
 	ldr	x1, [x26, #:lo12:.LANCHOR160]
 	mov	w3, 4
-	adrp	x0, .LC127
+	adrp	x0, .LC128
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
 	ldr	x1, [x21, #:lo12:.LANCHOR161]
 	mov	w3, 4
-	adrp	x0, .LC128
+	adrp	x0, .LC129
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC128
+	add	x0, x0, :lo12:.LC129
 	bl	rknand_print_hex
-.L2227:
+.L2221:
 	mov	w1, w20
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-	mov	w2, 499
-	adrp	x1, .LANCHOR174
+	mov	w2, 502
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR174
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2228
-.L2223:
+	b	.L2222
+.L2217:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2221
-.L2230:
+	b	.L2215
+.L2224:
 	mov	w19, w20
-	b	.L2221
-.L2225:
+	b	.L2215
+.L2219:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2227
-.L2228:
+	beq	.L2221
+.L2222:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13247,7 +13250,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR175
+	adrp	x25, .LANCHOR174
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
@@ -13260,45 +13263,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR175]
+	str	wzr, [x25, #:lo12:.LANCHOR174]
 	str	x0, [x29, 96]
-.L2242:
+.L2236:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2252
+	bls	.L2246
 	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2253
-.L2251:
+	b	.L2247
+.L2245:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2243
-	adrp	x0, .LC130
+	tbz	x0, 12, .L2237
+	adrp	x0, .LC131
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2243:
+.L2237:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2244
+	cbnz	w20, .L2238
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2245
-.L2244:
+	bcs	.L2239
+.L2238:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2245
+	cbnz	w0, .L2239
 	adrp	x0, .LANCHOR105
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR105]
@@ -13306,54 +13309,54 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2246
+	cbz	w0, .L2240
 	adrp	x0, .LANCHOR68
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2268
+	bne	.L2262
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2268
+	cbz	w0, .L2262
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2268
-.L2250:
+	cbnz	w0, .L2262
+.L2244:
 	adrp	x0, .LANCHOR68
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2249:
+.L2243:
 	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR175
+	add	x3, x25, :lo12:.LANCHOR174
 	add	x2, x24, :lo12:ftl_tmp_buffer
 	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2245
-.L2268:
+	cbz	w0, .L2239
+.L2262:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2245:
+.L2239:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2253:
+.L2247:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2251
+	bhi	.L2245
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2242
+	b	.L2236
+.L2240:
+	cbz	w23, .L2243
+	b	.L2244
 .L2246:
-	cbz	w23, .L2249
-	b	.L2250
-.L2252:
-	cbz	w23, .L2254
+	cbz	w23, .L2248
 	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
@@ -13361,7 +13364,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2254:
+.L2248:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13396,18 +13399,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2269
-	mov	w2, 2151
-	adrp	x1, .LANCHOR176
+	bne	.L2263
+	mov	w2, 2150
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC129
+	adrp	x0, .LC130
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2269:
+.L2263:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13426,24 +13429,24 @@ ftl_info_flush:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR178
+	adrp	x22, .LANCHOR177
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR178
+	add	x25, x22, :lo12:.LANCHOR177
 	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR177
+	adrp	x20, .LANCHOR176
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR177
+	add	x0, x20, :lo12:.LANCHOR176
 	bl	ftl_memset
-.L2273:
-	add	x0, x22, :lo12:.LANCHOR178
-	ldrb	w6, [x22, #:lo12:.LANCHOR178]
+.L2267:
+	add	x0, x22, :lo12:.LANCHOR177
+	ldrb	w6, [x22, #:lo12:.LANCHOR177]
 	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
 	adrp	x0, .LANCHOR97
@@ -13451,41 +13454,41 @@ ftl_info_flush:
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR177
-	str	w27, [x20, #:lo12:.LANCHOR177]
+	add	x0, x20, :lo12:.LANCHOR176
+	str	w27, [x20, #:lo12:.LANCHOR176]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2274
+	tbz	x0, 12, .L2268
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC131
+	adrp	x0, .LC132
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2274:
+.L2268:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2275
-	adrp	x19, .LANCHOR179
+	bhi	.L2269
+	adrp	x19, .LANCHOR178
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR179
+	add	x19, x19, :lo12:.LANCHOR178
 	add	x3, x3, :lo12:.LC0
-.L2282:
+.L2276:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2276
+	bls	.L2270
 	mov	x0, 0
-.L2281:
+.L2275:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13494,24 +13497,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2277
+	bhi	.L2271
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2280:
+.L2274:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2276:
+.L2270:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2282
+	beq	.L2276
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -13519,7 +13522,7 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR176
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13527,53 +13530,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2283:
+.L2277:
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR177
+	add	x3, x20, :lo12:.LANCHOR176
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR180
+	adrp	x0, .LANCHOR179
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2284
-	ldrb	w1, [x0, #:lo12:.LANCHOR180]
-	cbz	w1, .L2285
-.L2284:
-	strb	wzr, [x0, #:lo12:.LANCHOR180]
-	b	.L2273
-.L2277:
+	beq	.L2278
+	ldrb	w1, [x0, #:lo12:.LANCHOR179]
+	cbz	w1, .L2279
+.L2278:
+	strb	wzr, [x0, #:lo12:.LANCHOR179]
+	b	.L2267
+.L2271:
 	cmp	w2, 255
-	bne	.L2280
+	bne	.L2274
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2281
+	bne	.L2275
 	mov	w24, w0
-	b	.L2280
-.L2275:
+	b	.L2274
+.L2269:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2283
+	cbnz	w0, .L2277
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2283
-.L2285:
-	cbnz	w24, .L2286
-.L2294:
-	adrp	x0, .LANCHOR178
-	ldrb	w0, [x0, #:lo12:.LANCHOR178]
+	b	.L2277
+.L2279:
+	cbnz	w24, .L2280
+.L2288:
+	adrp	x0, .LANCHOR177
+	ldrb	w0, [x0, #:lo12:.LANCHOR177]
 	cmp	w0, 255
-	bne	.L2288
-	adrp	x1, .LANCHOR179
+	bne	.L2282
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR179
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2288:
+.L2282:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13582,17 +13585,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2286:
+.L2280:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR179
+	adrp	x20, .LANCHOR178
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR179
+	add	x20, x20, :lo12:.LANCHOR178
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2289:
+.L2283:
 	cmp	w19, 7
-	bhi	.L2294
+	bhi	.L2288
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13600,24 +13603,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2290
+	bhi	.L2284
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2291:
+.L2285:
 	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2292
-.L2290:
+	b	.L2286
+.L2284:
 	cmp	w23, 255
-	bne	.L2291
-.L2292:
+	bne	.L2285
+.L2286:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2289
+	b	.L2283
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13625,17 +13628,17 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR181
-	adrp	x1, .LANCHOR180
+	adrp	x0, .LANCHOR180
+	adrp	x1, .LANCHOR179
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	strb	wzr, [x0, #:lo12:.LANCHOR180]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR180]
-	adrp	x1, .LANCHOR182
+	strb	w0, [x1, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR181
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR182]
+	strb	w0, [x1, #:lo12:.LANCHOR181]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
@@ -13644,7 +13647,7 @@ ftl_info_blk_init:
 	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR178
+	adrp	x21, .LANCHOR177
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
@@ -13660,7 +13663,7 @@ ftl_info_blk_init:
 	bl	ftl_memset
 	adrp	x25, .LANCHOR121
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR178
+	add	x0, x21, :lo12:.LANCHOR177
 	mov	w27, 21574
 	add	x26, x26, :lo12:.LANCHOR105
 	add	x25, x25, :lo12:.LANCHOR121
@@ -13668,9 +13671,9 @@ ftl_info_blk_init:
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	strb	w1, [x21, #:lo12:.LANCHOR177]
 	strh	wzr, [x0, 2]
-.L2310:
+.L2304:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13678,26 +13681,26 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2309
-.L2314:
+	bne	.L2303
+.L2308:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2310
+	bne	.L2304
 	mov	w24, 0
-.L2311:
+.L2305:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2315
+	tbz	x0, 12, .L2309
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2315:
+.L2309:
 	cmn	w19, #1
-	bne	.L2316
+	bne	.L2310
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
@@ -13706,11 +13709,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 9
+	mov	w1, 17
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2308:
+.L2302:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13718,12 +13721,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2309:
+.L2303:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR177
-	add	x7, x7, :lo12:.LANCHOR177
+	adrp	x7, .LANCHOR176
+	add	x7, x7, :lo12:.LANCHOR176
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13736,7 +13739,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2312
+	bne	.L2306
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13744,30 +13747,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2312:
+.L2306:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2313
+	tbz	x0, 12, .L2307
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2313:
+.L2307:
 	cmn	w5, #1
-	beq	.L2314
+	beq	.L2308
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2314
+	bne	.L2308
 	mov	w19, w24
-	b	.L2311
-.L2316:
+	b	.L2305
+.L2310:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
@@ -13779,11 +13782,11 @@ ftl_info_blk_init:
 	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR178
-	strb	w1, [x21, #:lo12:.LANCHOR178]
+	add	x0, x21, :lo12:.LANCHOR177
+	strb	w1, [x21, #:lo12:.LANCHOR177]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR177
-	add	x24, x24, :lo12:.LANCHOR177
+	adrp	x24, .LANCHOR176
+	add	x24, x24, :lo12:.LANCHOR176
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -13791,11 +13794,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR178]
+	ldrb	w25, [x21, #:lo12:.LANCHOR177]
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2318:
-	tbnz	w23, #31, .L2321
+.L2312:
+	tbnz	w23, #31, .L2315
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13803,13 +13806,13 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2319
+	beq	.L2313
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2319
-.L2321:
-	add	x21, x21, :lo12:.LANCHOR178
+	bne	.L2313
+.L2315:
+	add	x21, x21, :lo12:.LANCHOR177
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
@@ -13821,12 +13824,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2308
-.L2319:
+	b	.L2302
+.L2313:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2318
+	b	.L2312
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13843,21 +13846,21 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2337
+	cbz	w1, .L2331
 	str	wzr, [x0, 520]
-.L2337:
+.L2331:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR183
+	adrp	x22, .LANCHOR182
 	adrp	x21, .LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR183
+	add	x22, x22, :lo12:.LANCHOR182
 	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2338:
+.L2332:
 	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2341:
+.L2335:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -13865,26 +13868,26 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2339
+	bcc	.L2333
 	bl	ftl_ext_alloc_new_blk
-.L2339:
+.L2333:
 	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2340
+	bne	.L2334
 	adrp	x0, .LC0
-	mov	w2, 1747
+	mov	w2, 1746
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2340:
+.L2334:
 	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR177
-	add	x25, x27, :lo12:.LANCHOR177
+	adrp	x27, .LANCHOR176
+	add	x25, x27, :lo12:.LANCHOR176
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13906,7 +13909,7 @@ ftl_ext_info_flush:
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR177]
+	str	wzr, [x27, #:lo12:.LANCHOR176]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
@@ -13919,16 +13922,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2341
+	beq	.L2335
 	cmn	w0, #1
-	adrp	x0, .LANCHOR182
-	beq	.L2342
-	ldrb	w1, [x0, #:lo12:.LANCHOR182]
-	cbz	w1, .L2343
-.L2342:
-	strb	wzr, [x0, #:lo12:.LANCHOR182]
-	b	.L2338
-.L2343:
+	adrp	x0, .LANCHOR181
+	beq	.L2336
+	ldrb	w1, [x0, #:lo12:.LANCHOR181]
+	cbz	w1, .L2337
+.L2336:
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	b	.L2332
+.L2337:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13955,11 +13958,11 @@ ftl_ext_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR177
+	adrp	x24, .LANCHOR176
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR177
+	add	x3, x24, :lo12:.LANCHOR176
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
@@ -13976,18 +13979,18 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2354
+	tbz	x0, 12, .L2348
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR184
+	adrp	x1, .LANCHOR183
 	and	w4, w21, 65535
 	mov	w3, w22
-	mov	w2, 1791
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 1790
+	add	x1, x1, :lo12:.LANCHOR183
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2354:
+.L2348:
 	adrp	x26, .LANCHOR121
 	adrp	x28, .LANCHOR105
 	mov	w5, 20038
@@ -13995,14 +13998,14 @@ ftl_ext_info_init:
 	add	x28, x28, :lo12:.LANCHOR105
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2355:
+.L2349:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2360
+	tbnz	x0, 15, .L2354
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR177
+	add	x3, x24, :lo12:.LANCHOR176
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14011,22 +14014,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2356
+	beq	.L2350
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2356
-.L2360:
+	bne	.L2350
+.L2354:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2358
+	bgt	.L2352
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2358:
+.L2352:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14047,9 +14050,9 @@ ftl_ext_info_init:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2356:
+.L2350:
 	add	w23, w23, 1
-	b	.L2355
+	b	.L2349
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14082,14 +14085,14 @@ ftl_low_format_data_init:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2369
-	adrp	x1, .LANCHOR185
+	bcs	.L2363
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1974
-	add	x1, x1, :lo12:.LANCHOR185
+	mov	w2, 1973
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2369:
+.L2363:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
@@ -14113,8 +14116,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR186
-	ldrh	w1, [x1, #:lo12:.LANCHOR186]
+	adrp	x1, .LANCHOR185
+	ldrh	w1, [x1, #:lo12:.LANCHOR185]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14181,13 +14184,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR187
+	adrp	x20, .LANCHOR186
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR187
+	add	x20, x20, :lo12:.LANCHOR186
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14195,30 +14198,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2374:
+.L2368:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2372
-	mov	w2, 2028
+	bhi	.L2366
+	mov	w2, 2027
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2372:
+.L2366:
 	cmp	w21, 255
-	beq	.L2373
+	beq	.L2367
 	adrp	x0, .LANCHOR105
 	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2373:
+.L2367:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2374
+	bne	.L2368
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14232,9 +14235,9 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2375:
+.L2369:
 	cmp	x0, x2
-	bne	.L2376
+	bne	.L2370
 	adrp	x21, .LANCHOR97
 	mov	w1, 21574
 	adrp	x24, .LANCHOR59
@@ -14245,11 +14248,11 @@ ftl_low_format:
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2377:
+.L2371:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2385
+	bhi	.L2379
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
 	ldrb	w2, [x23, #:lo12:.LANCHOR98]
@@ -14268,7 +14271,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2388:
+.L2382:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14277,7 +14280,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2388
+	bne	.L2382
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
@@ -14289,14 +14292,14 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2389
-	adrp	x0, .LC136
+	tbz	x0, 12, .L2383
+	adrp	x0, .LC137
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2074
-	add	x0, x0, :lo12:.LC136
+	mov	w1, 2073
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2389:
+.L2383:
 	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
@@ -14319,9 +14322,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2390:
+.L2384:
 	cmp	w20, w12
-	bcc	.L2396
+	bcc	.L2390
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14337,14 +14340,14 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2376:
+.L2370:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2375
-.L2385:
+	b	.L2369
+.L2379:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
@@ -14358,16 +14361,16 @@ ftl_low_format:
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2378:
+.L2372:
 	cmp	w8, w14
-	bcs	.L2382
+	bcs	.L2376
 	add	w15, w11, w7
-	b	.L2383
-.L2381:
+	b	.L2377
+.L2375:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2379
+	cbz	w0, .L2373
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14375,29 +14378,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2380:
+.L2374:
 	add	w7, w7, 1
-.L2383:
+.L2377:
 	cmp	w7, w15
-	bne	.L2381
+	bne	.L2375
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2378
-.L2379:
+	b	.L2372
+.L2373:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2380
-.L2382:
-	cbnz	w10, .L2384
+	b	.L2374
+.L2376:
+	cbnz	w10, .L2378
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2384:
+.L2378:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2377
-.L2396:
+	b	.L2371
+.L2390:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14405,48 +14408,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2391:
+.L2385:
 	cmp	w5, w15
-	bcc	.L2398
+	bcc	.L2392
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2390
-.L2394:
+	b	.L2384
+.L2388:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2392
+	tbnz	x11, 0, .L2386
 	cmp	w13, 1
-	bls	.L2397
+	bls	.L2391
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2393:
+.L2387:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2392:
+.L2386:
 	add	x7, x7, 1
-.L2395:
+.L2389:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2394
+	bcc	.L2388
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2391
-.L2397:
+	b	.L2385
+.L2391:
 	mov	w0, w1
-	b	.L2393
-.L2398:
+	b	.L2387
+.L2392:
 	mov	x7, 0
-	b	.L2395
+	b	.L2389
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14455,8 +14458,8 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
@@ -14473,9 +14476,9 @@ ftl_re_low_format:
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2409:
+.L2403:
 	cmp	w1, w7
-	bcc	.L2413
+	bcc	.L2407
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14486,29 +14489,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2413:
+.L2407:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2410
+	bne	.L2404
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2411:
+.L2405:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2409
-.L2410:
+	b	.L2403
+.L2404:
 	cmp	w6, 16
-	bne	.L2412
+	bne	.L2406
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2411
-.L2412:
+	b	.L2405
+.L2406:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2411
+	b	.L2405
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14530,7 +14533,7 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2418
+	bne	.L2412
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
@@ -14542,15 +14545,15 @@ ftl_write_last_log_page:
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2419
+	beq	.L2413
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR175
+	adrp	x0, .LANCHOR174
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR175
+	add	x6, x0, :lo12:.LANCHOR174
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR175]
+	str	w1, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
@@ -14567,13 +14570,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2419:
+.L2413:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2418:
+.L2412:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14593,41 +14596,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2425
+	tbz	x0, 12, .L2419
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
-	bl	printf
-.L2425:
-	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2426
-	ldrb	w1, [x28, 5]
 	adrp	x0, .LC139
 	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2426:
+.L2419:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2427
-	ldrh	w1, [x28]
+	tbz	x0, 12, .L2420
+	ldrb	w1, [x28, 5]
 	adrp	x0, .LC140
 	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2427:
+.L2420:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2428
-	ldrh	w2, [x28, 18]
+	tbz	x0, 12, .L2421
+	ldrh	w1, [x28]
 	adrp	x0, .LC141
-	ldrh	w1, [x28, 16]
 	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2428:
+.L2421:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2422
+	ldrh	w2, [x28, 18]
+	adrp	x0, .LC142
+	ldrh	w1, [x28, 16]
+	add	x0, x0, :lo12:.LC142
+	bl	printf
+.L2422:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2424
+	bcs	.L2418
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
@@ -14638,11 +14641,11 @@ ftl_open_sblk_recovery:
 	add	x0, x26, :lo12:.LANCHOR121
 	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2431:
+.L2425:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2444
-.L2434:
+	bhi	.L2438
+.L2428:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -14652,22 +14655,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2445
-	adrp	x1, .LANCHOR188
+	beq	.L2439
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1473
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1472
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2445:
+.L2439:
 	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2446:
+.L2440:
 	cmp	w1, w3
-	bcc	.L2448
+	bcc	.L2442
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR9
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -14675,32 +14678,32 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2449
+	tbz	x0, 12, .L2443
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC142
+	adrp	x0, .LC143
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2449:
+.L2443:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR73
-	adrp	x26, .LC143
+	adrp	x26, .LC144
 	add	x24, x24, :lo12:.LANCHOR73
 	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC143
+	add	x26, x26, :lo12:.LC144
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2450:
+.L2444:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2453
+	bcc	.L2447
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
@@ -14710,17 +14713,17 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2454
-	adrp	x1, .LANCHOR188
+	beq	.L2448
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1503
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1502
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2454:
+.L2448:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2424
+	bne	.L2418
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14729,25 +14732,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2444:
+.L2438:
 	ldrb	w20, [x28, 5]
 	adrp	x24, .LANCHOR105
 	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2432:
+.L2426:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2443
+	bhi	.L2437
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2431
-.L2443:
+	b	.L2425
+.L2437:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2433
+	beq	.L2427
 	ldr	x1, [x29, 136]
 	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
@@ -14757,36 +14760,36 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2434
+	beq	.L2428
 	cmn	w0, #1
-	beq	.L2435
+	beq	.L2429
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2435
+	bne	.L2429
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2435
+	bne	.L2429
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2434
-.L2435:
-	adrp	x0, .LANCHOR181
+	beq	.L2428
+.L2429:
+	adrp	x0, .LANCHOR180
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
+	strb	w1, [x0, #:lo12:.LANCHOR180]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2436
-	adrp	x1, .LANCHOR188
+	beq	.L2430
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1395
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2436:
+.L2430:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -14794,28 +14797,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2437
-	adrp	x1, .LANCHOR188
+	beq	.L2431
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1397
-	add	x1, x1, :lo12:.LANCHOR188
+	mov	w2, 1396
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2437:
+.L2431:
 	cmn	w24, #1
-	beq	.L2439
+	beq	.L2433
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2439
+	beq	.L2433
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2441
+	cbz	x25, .L2435
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2441
+	beq	.L2435
 	cmn	w0, #1
-	beq	.L2441
+	beq	.L2435
 	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
@@ -14830,11 +14833,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2441
+	bne	.L2435
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR177
+	adrp	x8, .LANCHOR176
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR177
+	add	x2, x8, :lo12:.LANCHOR176
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14843,13 +14846,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR177]
+	ldr	w0, [x8, #:lo12:.LANCHOR176]
 	cmp	w10, w0
-	bhi	.L2441
+	bhi	.L2435
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2439
+	beq	.L2433
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
 	ldrh	w1, [x6, #:lo12:.LANCHOR99]
@@ -14861,7 +14864,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2439:
+.L2433:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14869,37 +14872,37 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2433:
+.L2427:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2432
-.L2448:
+	b	.L2426
+.L2442:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2447
+	beq	.L2441
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2447:
+.L2441:
 	add	w1, w1, 1
-	b	.L2446
-.L2453:
-	cbz	w27, .L2451
+	b	.L2440
+.L2447:
+	cbz	w27, .L2445
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2451
+	bls	.L2445
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2452
+	tbz	x0, 12, .L2446
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2452:
+.L2446:
 	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
@@ -14915,37 +14918,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2451:
+.L2445:
 	add	w20, w20, 1
-	b	.L2450
-.L2441:
+	b	.L2444
+.L2435:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR118
 	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2439
+	bcs	.L2433
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2439
+	bge	.L2433
 	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2442
+	bls	.L2436
 	str	w1, [x0, 8]
-.L2442:
+.L2436:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2439
-.L2424:
+	b	.L2433
+.L2418:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14975,7 +14978,7 @@ pm_write_page:
 	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2504:
+.L2498:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
@@ -14983,37 +14986,37 @@ pm_write_page:
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2505
+	bcs	.L2499
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2506
-.L2505:
+	bne	.L2500
+.L2499:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2506:
+.L2500:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2507
-	adrp	x1, .LANCHOR189
+	bne	.L2501
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2507:
+.L2501:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR190
+	adrp	x27, .LANCHOR189
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR190]
+	ldr	x0, [x27, #:lo12:.LANCHOR189]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR190]
+	ldr	x3, [x27, #:lo12:.LANCHOR189]
 	mov	x2, x25
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
@@ -15030,28 +15033,28 @@ pm_write_page:
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR191
-	beq	.L2508
-	ldrb	w3, [x1, #:lo12:.LANCHOR191]
-	cbz	w3, .L2509
-.L2508:
-	strb	wzr, [x1, #:lo12:.LANCHOR191]
-	b	.L2504
-.L2509:
+	adrp	x1, .LANCHOR190
+	beq	.L2502
+	ldrb	w3, [x1, #:lo12:.LANCHOR190]
+	cbz	w3, .L2503
+.L2502:
+	strb	wzr, [x1, #:lo12:.LANCHOR190]
+	b	.L2498
+.L2503:
 	cmn	w0, #1
-	bne	.L2511
+	bne	.L2505
 	mov	w1, w26
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-	b	.L2504
-.L2511:
+	b	.L2498
+.L2505:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2512
+	bcs	.L2506
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2512:
+.L2506:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15075,14 +15078,14 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2518
-	adrp	x2, .LANCHOR192
+	tbz	x0, 12, .L2512
+	adrp	x2, .LANCHOR191
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR192
+	add	x2, x2, :lo12:.LANCHOR191
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2518:
+.L2512:
 	adrp	x23, .LANCHOR158
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
@@ -15090,18 +15093,18 @@ flash_info_flush:
 	ldr	x0, [x23, #:lo12:.LANCHOR158]
 	adrp	x21, .LANCHOR159
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC146
+	adrp	x24, .LC147
 	adrp	x25, .LANCHOR135
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC146
+	add	x24, x24, :lo12:.LC147
 	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR159
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15109,7 +15112,7 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2519:
+.L2513:
 	add	x28, x21, :lo12:.LANCHOR159
 	ldrb	w4, [x21, #:lo12:.LANCHOR159]
 	ldrh	w19, [x22]
@@ -15124,7 +15127,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2520
+	blt	.L2514
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15143,18 +15146,18 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2529:
+.L2523:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2521
-.L2524:
+	b	.L2515
+.L2518:
 	mov	w26, 1
-	b	.L2519
-.L2520:
+	b	.L2513
+.L2514:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2529
-.L2521:
+	cbz	w1, .L2523
+.L2515:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR158]
@@ -15171,14 +15174,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2522
+	bne	.L2516
 	mov	w1, w19
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2519
-.L2522:
-	cbz	w26, .L2524
+	b	.L2513
+.L2516:
+	cbz	w26, .L2518
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15193,7 +15196,7 @@ flash_info_flush:
 	.global	nand_flash_init
 	.type	nand_flash_init, %function
 nand_flash_init:
-	stp	x29, x30, [sp, -96]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR14
@@ -15202,31 +15205,27 @@ nand_flash_init:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2531
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2525
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2209
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2220
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2531:
+.L2525:
 	mov	x0, x19
 	adrp	x23, .LANCHOR16
 	bl	nandc_init
 	adrp	x19, .LANCHOR34
-	adrp	x20, .LANCHOR41
+	adrp	x22, .LANCHOR41
 	add	x0, x19, :lo12:.LANCHOR34
-	add	x24, x20, :lo12:.LANCHOR41
+	add	x24, x22, :lo12:.LANCHOR41
 	str	x0, [x23, #:lo12:.LANCHOR16]
-	adrp	x25, .LANCHOR35
+	mov	x25, x24
 	adrp	x0, .LANCHOR18
-	add	x25, x25, :lo12:.LANCHOR35
-	mov	x26, x24
 	mov	w1, 1
-	mov	x22, 0
-	mov	w27, 2
-	mov	w28, 44
+	mov	w20, 0
+	mov	w26, 44
 	strb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w2, 8
 	mov	w1, 0
@@ -15238,117 +15237,118 @@ nand_flash_init:
 	adrp	x0, .LANCHOR136
 	add	x0, x0, :lo12:.LANCHOR136
 	bl	ftl_memset
-.L2537:
+.L2531:
 	mov	x1, x24
-	mov	w0, w22
+	mov	w0, w20
 	bl	flash_read_id
-	strb	w27, [x22, x25]
-	cbnz	x22, .L2532
-	ldrb	w0, [x26]
+	cbnz	w20, .L2526
+	ldrb	w0, [x25]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2533
-.L2535:
+	bls	.L2527
+.L2529:
 	mov	w19, -2
-.L2530:
+.L2524:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L2533:
-	ldrb	w0, [x26, 1]
+.L2527:
+	ldrb	w0, [x25, 1]
 	cmp	w0, 255
-	beq	.L2535
-.L2532:
+	beq	.L2529
+.L2526:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2536
-	strb	w28, [x24]
-.L2536:
-	add	x22, x22, 1
+	bne	.L2530
+	strb	w26, [x24]
+.L2530:
+	add	w20, w20, 1
 	add	x24, x24, 8
-	cmp	x22, 4
-	bne	.L2537
-	adrp	x0, .LANCHOR194
-	add	x8, x0, :lo12:.LANCHOR194
+	and	w20, w20, 255
+	cmp	w20, 4
+	bne	.L2531
+	adrp	x0, .LANCHOR193
+	add	x8, x0, :lo12:.LANCHOR193
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR41
+	add	x12, x22, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2540:
+.L2534:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2538
-	add	x0, x7, :lo12:.LANCHOR194
+	cbnz	w0, .L2532
+	add	x0, x7, :lo12:.LANCHOR193
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR195
-	add	x4, x1, :lo12:.LANCHOR195
+	adrp	x1, .LANCHOR194
+	add	x4, x1, :lo12:.LANCHOR194
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2539:
+.L2533:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2541
+	beq	.L2535
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2539
+	bne	.L2533
 	mov	w2, w0
-.L2541:
+.L2535:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR195
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
 	add	x0, x0, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	add	x22, x19, :lo12:.LANCHOR34
+	add	x20, x19, :lo12:.LANCHOR34
 	mov	x1, x24
 	adrp	x24, .LANCHOR27
 	mov	w2, 32
-	mov	x0, x22
+	mov	x0, x20
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2542
-	ldrb	w1, [x22, 20]
+	bhi	.L2536
+	ldrb	w1, [x20, 20]
 	cmp	w1, 60
-	bls	.L2543
+	bls	.L2537
 	mov	w1, 60
-	strb	w1, [x22, 20]
-.L2543:
+	strb	w1, [x20, 20]
+.L2537:
 	cmp	w0, 8
-	bne	.L2542
-	ldrb	w0, [x20, #:lo12:.LANCHOR41]
+	bne	.L2536
+	ldrb	w0, [x22, #:lo12:.LANCHOR41]
+	mov	w1, 137
 	cmp	w0, 44
-	bne	.L2542
+	ccmp	w0, w1, 4, ne
+	bne	.L2536
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2542
+	bne	.L2536
 	strb	wzr, [x0, 28]
-.L2542:
+.L2536:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2544
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2538
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2233
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2244
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2544:
+.L2538:
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR161
@@ -15374,8 +15374,8 @@ nand_flash_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR158
 	str	x0, [x1, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR167
-	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR195
+	strb	wzr, [x0, #:lo12:.LANCHOR195]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
@@ -15411,65 +15411,65 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2545
+	bne	.L2539
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2545:
+.L2539:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR167
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR168]
+	strb	w0, [x1, #:lo12:.LANCHOR167]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2547
+	tbz	x1, 6, .L2541
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2548
+	bhi	.L2542
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
 	str	x1, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 19
 	adrp	x0, .LANCHOR154
-	beq	.L2549
+	beq	.L2543
 	mov	w1, 7
-.L2593:
+.L2590:
 	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2547
-.L2538:
+	b	.L2541
+.L2532:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 30
-	bne	.L2540
-	b	.L2535
-.L2549:
+	cmp	x10, 32
+	bne	.L2534
+	b	.L2529
+.L2543:
 	mov	w1, 15
-	b	.L2593
-.L2548:
+	b	.L2590
+.L2542:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2551
+	bhi	.L2545
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2595:
+.L2592:
 	mov	w1, 7
 	adrp	x0, .LANCHOR154
-	b	.L2593
-.L2551:
+	b	.L2590
+.L2545:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2552
+	bhi	.L2546
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
 	str	x2, [x20, #:lo12:.LANCHOR156]
@@ -15477,87 +15477,87 @@ nand_flash_init:
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR154
-	beq	.L2553
+	beq	.L2547
 	mov	w2, 7
-.L2592:
+.L2589:
 	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2555
+	bhi	.L2549
 	mov	w1, 4
-.L2594:
+.L2591:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2547:
+.L2541:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2556
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2550
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2281
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2292
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2556:
+.L2550:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2557
+	tbz	x0, 0, .L2551
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2596:
+.L2593:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2559
+	bne	.L2553
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2560
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2554
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2301
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2313
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2560:
+.L2554:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2530
-.L2553:
+	b	.L2524
+.L2547:
 	mov	w2, 17
-	b	.L2592
-.L2555:
+	b	.L2589
+.L2549:
 	mov	w1, 5
-	b	.L2594
-.L2552:
+	b	.L2591
+.L2546:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2547
+	bhi	.L2541
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-	b	.L2595
-.L2557:
+	b	.L2592
+.L2551:
 	mov	w0, 4
-	b	.L2596
-.L2559:
+	b	.L2593
+.L2553:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2561
+	bhi	.L2555
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-.L2561:
+.L2555:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2563
+	tbz	x0, 2, .L2557
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2563
+	cbz	w0, .L2557
 	adrp	x0, .LANCHOR159
 	ldrb	w1, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR2
@@ -15566,23 +15566,23 @@ nand_flash_init:
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2563
+	cbnz	w0, .L2557
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2563:
+.L2557:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2565
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2559
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
-	mov	w1, 2356
+	add	x2, x2, :lo12:.LANCHOR192
+	mov	w1, 2370
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2565:
+.L2559:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2530
+	b	.L2524
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15610,20 +15610,20 @@ ftl_sysblk_dump:
 	add	x27, x27, :lo12:.LANCHOR105
 	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2598:
+.L2595:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2600
+	bhi	.L2597
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2601
+	cbz	w20, .L2598
 	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 1339
+	mov	w2, 1338
 	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2601:
+.L2598:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15633,7 +15633,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2600:
+.L2597:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15662,19 +15662,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2598
+	b	.L2595
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15685,41 +15685,41 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC150
+	adrp	x0, .LC151
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC151
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR10
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR178
-	add	x1, x0, :lo12:.LANCHOR178
+	adrp	x0, .LANCHOR177
+	add	x1, x0, :lo12:.LANCHOR177
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR178]
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	ldrb	w1, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x0, .LC153
 	add	x0, x0, :lo12:.LC153
-	ldrh	w5, [x1, 26]
-	ldrh	w4, [x1, 22]
-	ldrb	w3, [x1, 21]
-	ldrh	w2, [x1, 18]
-	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x0, .LC154
 	add	x0, x0, :lo12:.LC154
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15728,8 +15728,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x19, .LANCHOR73
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -15742,21 +15742,21 @@ dump_ftl_info:
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR111
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC156
+	adrp	x0, .LC157
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC156
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15764,15 +15764,15 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR110
-	adrp	x0, .LC159
+	adrp	x0, .LC160
 	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC159
+	add	x0, x0, :lo12:.LC160
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
@@ -15784,8 +15784,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15812,20 +15812,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2612
+	bne	.L2609
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2612:
+.L2609:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15841,22 +15841,22 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2618
+	bls	.L2615
 	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 31
 	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2618:
+.L2615:
 	adrp	x22, .LANCHOR97
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2619
+	bcs	.L2616
 	mov	w1, w19
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
 	adrp	x0, .LANCHOR198
 	mov	w1, 255
@@ -15867,16 +15867,16 @@ load_l2p_region:
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2621
+	bcs	.L2618
 	mov	w2, 35
-.L2626:
+.L2623:
 	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2621
-.L2619:
+	b	.L2618
+.L2616:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -15885,69 +15885,69 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2622
+	cbnz	w21, .L2619
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	printf
 	adrp	x0, .LANCHOR198
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR198]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2621:
+.L2618:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2622:
-	adrp	x20, .LANCHOR190
+.L2619:
+	adrp	x20, .LANCHOR189
 	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR190]
+	ldr	x2, [x20, #:lo12:.LANCHOR189]
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	ldr	x1, [x20, #:lo12:.LANCHOR189]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2623
+	beq	.L2620
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	bl	printf
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR190]
-	adrp	x0, .LC167
+	ldr	x1, [x20, #:lo12:.LANCHOR189]
+	adrp	x0, .LC168
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC167
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L2623:
-	ldr	x0, [x20, #:lo12:.LANCHOR190]
+.L2620:
+	ldr	x0, [x20, #:lo12:.LANCHOR189]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2621
+	beq	.L2618
 	mov	w2, 59
-	b	.L2626
+	b	.L2623
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15967,19 +15967,19 @@ pm_gc:
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2629
+	blt	.L2626
 	bl	pm_free_sblk
 	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2629
+	blt	.L2626
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2631
+	bne	.L2628
 	adrp	x1, .LANCHOR199
 	add	x1, x1, :lo12:.LANCHOR199
 	mov	w2, 131
@@ -15990,7 +15990,7 @@ pm_gc:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2631:
+.L2628:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR130
@@ -16002,28 +16002,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2632
+	beq	.L2629
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2632
+	cbz	x1, .L2629
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2632
+	tbz	w2, #31, .L2629
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2632:
+.L2629:
 	add	x1, x23, :lo12:.LANCHOR130
 	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2633:
+.L2630:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2635
+	bhi	.L2632
 	bl	pm_free_sblk
-.L2629:
+.L2626:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16031,7 +16031,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2635:
+.L2632:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16046,7 +16046,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2634
+	bne	.L2631
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16055,10 +16055,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2634:
+.L2631:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2633
+	b	.L2630
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16080,10 +16080,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR128
 	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2641
+	cbz	w0, .L2638
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2641:
+.L2638:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16101,17 +16101,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2648:
+.L2645:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2647
+	tbz	w0, #31, .L2644
 	mov	w0, w20
 	bl	pm_flush_id
-.L2647:
+.L2644:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2648
+	bne	.L2645
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16165,35 +16165,35 @@ pm_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR130
 	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR191
+	adrp	x0, .LANCHOR190
 	stp	x25, x26, [sp, 64]
 	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR191]
+	strb	w1, [x0, #:lo12:.LANCHOR190]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR190
+	adrp	x1, .LANCHOR189
 	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
 	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR190]
+	str	x0, [x1, #:lo12:.LANCHOR189]
 	mov	w25, -1
-.L2658:
+.L2655:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2657
+	cbz	w24, .L2654
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2657:
+.L2654:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2658
+	bne	.L2655
 	add	x0, x20, :lo12:.LANCHOR130
 	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR190]
+	ldr	x24, [x21, #:lo12:.LANCHOR189]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
@@ -16207,11 +16207,11 @@ pm_init:
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2659
+	bgt	.L2656
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	adrp	x27, .LANCHOR105
 	adrp	x28, .LANCHOR121
 	add	x27, x27, :lo12:.LANCHOR105
@@ -16219,14 +16219,14 @@ pm_init:
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2660:
+.L2657:
 	cmp	w21, w26
-	ble	.L2662
-	adrp	x0, .LANCHOR181
+	ble	.L2659
+	adrp	x0, .LANCHOR180
 	mov	w1, 1
 	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR181]
+	strb	w1, [x0, #:lo12:.LANCHOR180]
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
@@ -16236,7 +16236,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2659:
+.L2656:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16247,7 +16247,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2662:
+.L2659:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
@@ -16266,25 +16266,25 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2661
+	beq	.L2658
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2661
+	bcs	.L2658
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2661:
+.L2658:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2660
+	b	.L2657
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -16309,51 +16309,51 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2672
+	bcc	.L2669
 	mov	w1, w0
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	bl	printf
 	mov	w0, -1
-.L2671:
+.L2668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2672:
+.L2669:
 	adrp	x24, .LANCHOR130
 	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2678:
+.L2675:
 	ldr	x1, [x0]
-	cbz	x1, .L2674
+	cbz	x1, .L2671
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2674
-.L2675:
-	cbnz	w23, .L2676
+	bne	.L2671
+.L2672:
+	cbnz	w23, .L2673
 	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2677:
+.L2674:
 	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2680
+	beq	.L2677
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2680:
+.L2677:
 	mov	w0, 0
-	b	.L2671
-.L2676:
+	b	.L2668
+.L2673:
 	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
@@ -16364,13 +16364,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR131
 	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2677
-.L2674:
+	b	.L2674
+.L2671:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2678
+	bne	.L2675
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -16380,17 +16380,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2679
+	beq	.L2676
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2679
+	tbz	w1, #31, .L2676
 	bl	pm_flush_id
-.L2679:
+.L2676:
 	adrp	x0, .LANCHOR200
 	mov	w1, w26
 	strb	w19, [x0, #:lo12:.LANCHOR200]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2675
+	b	.L2672
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16418,12 +16418,12 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2687
+	beq	.L2684
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
 	bl	buf_alloc
-	mov	x25, x0
+	mov	x26, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
 	adrp	x3, .LANCHOR105
@@ -16438,33 +16438,33 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2688
+	bne	.L2685
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2732:
-	str	w0, [x25, 40]
-.L2689:
+.L2729:
+	str	w0, [x26, 40]
+.L2686:
 	mov	w1, 1
-	mov	x0, x25
+	mov	x0, x26
 	bl	sblk_read_page
-	ldr	w0, [x25, 52]
+	ldr	w0, [x26, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2690
-	ldr	x0, [x25, 24]
+	beq	.L2687
+	ldr	x0, [x26, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2691
-.L2690:
-	mov	x0, x25
+	beq	.L2688
+.L2687:
+	mov	x0, x26
 	bl	buf_free
-	ldr	x1, [x25, 24]
-	ldr	x0, [x25, 8]
+	ldr	x1, [x26, 24]
+	ldr	x0, [x26, 8]
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 16]
 	ldr	w2, [x1, 8]
@@ -16473,26 +16473,26 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC171
+	adrp	x0, .LC172
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC171
-	ldr	w1, [x25, 40]
-	ldr	w2, [x25, 52]
+	add	x0, x0, :lo12:.LC172
+	ldr	w1, [x26, 40]
+	ldr	w2, [x26, 52]
 	bl	printf
-.L2736:
+.L2733:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
-	mov	w28, 0
+	mov	w22, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2692:
+.L2689:
 	ldrh	w1, [x20, 80]
-	mov	w2, w28
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	mov	w2, w22
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16502,9 +16502,9 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2719
+	beq	.L2716
 	bl	ftl_free_sblk
-.L2719:
+.L2716:
 	adrp	x0, .LANCHOR97
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
@@ -16513,7 +16513,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2686:
+.L2683:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16522,64 +16522,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2688:
+.L2685:
 	cmp	w0, 2
-	bne	.L2689
+	bne	.L2686
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2732
-.L2691:
-	adrp	x19, .LANCHOR72
+	b	.L2729
+.L2688:
+	adrp	x28, .LANCHOR72
 	adrp	x22, .LANCHOR73
-	adrp	x23, .LANCHOR147
-	ldr	x1, [x25, 8]
+	adrp	x27, .LANCHOR147
+	ldr	x1, [x26, 8]
 	ldrb	w0, [x22, #:lo12:.LANCHOR73]
 	adrp	x24, .LANCHOR148
-	ldrh	w2, [x19, #:lo12:.LANCHOR72]
+	ldrh	w2, [x28, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldrb	w1, [x22, #:lo12:.LANCHOR73]
-	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x28, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
-	ldr	x1, [x25, 8]
+	ldr	x1, [x26, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
 	ldr	x0, [x24, #:lo12:.LANCHOR148]
 	bl	ftl_memcpy
-	str	x19, [x29, 144]
+	str	x28, [x29, 144]
 	adrp	x0, .LANCHOR80
 	ldrh	w14, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2693
-.L2733:
+	beq	.L2690
+.L2730:
 	str	w0, [x29, 184]
-	adrp	x26, .LC172
+	adrp	x25, .LC173
 	ldr	x0, [x29, 152]
+	mov	w23, 0
 	mov	w22, 0
-	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
-	add	x0, x26, :lo12:.LC172
+	add	x0, x25, :lo12:.LC173
 	str	x0, [x29, 120]
-.L2695:
-	sub	w0, w22, #1
+.L2692:
+	sub	w0, w23, #1
 	str	w0, [x29, 188]
-	cmp	w22, w14
-	beq	.L2704
-	mov	x27, 0
-	b	.L2705
-.L2693:
+	cmp	w23, w14
+	beq	.L2701
+	mov	x19, 0
+	b	.L2702
+.L2690:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2733
-.L2701:
+	b	.L2730
+.L2698:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16589,92 +16589,92 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2696
-	add	w0, w22, w0
-	orr	w0, w0, w26, lsl 24
-.L2734:
-	str	w0, [x25, 40]
+	bne	.L2693
+	add	w0, w23, w0
+	orr	w0, w0, w25, lsl 24
+.L2731:
+	str	w0, [x26, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
-	mov	x0, x25
+	mov	x0, x26
 	bl	sblk_read_page
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
-	ldr	w3, [x0, x19]
-	ldr	x0, [x25, 24]
+	ldr	w3, [x0, x28]
+	ldr	x0, [x26, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2699
+	bne	.L2696
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
-	ldr	w2, [x1, x19]
+	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2700
-.L2699:
+	beq	.L2697
+.L2696:
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w14, [x29, 112]
-	ldr	w4, [x1, x19]
+	ldr	w4, [x1, x28]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	ldr	w1, [x25, 40]
-	ldr	w2, [x25, 52]
+	ldr	w1, [x26, 40]
+	ldr	w2, [x26, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
-	ldr	w0, [x0, x19]
+	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2700
-	mov	x0, x25
+	beq	.L2697
+	mov	x0, x26
 	bl	buf_free
-	b	.L2736
-.L2696:
+	b	.L2733
+.L2693:
 	cmp	w1, 2
-	bne	.L2698
+	bne	.L2695
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
-	add	w0, w0, w26
+	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2734
-.L2698:
-	add	w0, w22, w0
-	b	.L2734
+	b	.L2731
+.L2695:
+	add	w0, w23, w0
+	b	.L2731
+.L2697:
+	add	w22, w22, 1
+	add	w25, w25, 1
+	add	x28, x28, 4
 .L2700:
-	add	w28, w28, 1
-	add	w26, w26, 1
-	add	x19, x19, 4
-.L2703:
 	ldr	w0, [x29, 184]
-	cmp	w0, w26
-	bcs	.L2701
-	add	x27, x27, 1
-.L2705:
+	cmp	w0, w25
+	bcs	.L2698
+	add	x19, x19, 1
+.L2702:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w27
-	ble	.L2702
-	add	x0, x20, x27, lsl 1
+	cmp	w0, w19
+	ble	.L2699
+	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
-	sbfiz	x19, x28, 2, 32
-	mov	w26, 1
+	sbfiz	x28, x22, 2, 32
+	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2703
-.L2702:
-	add	w22, w22, 1
-	b	.L2695
-.L2704:
-	mov	x0, x25
+	b	.L2700
+.L2699:
+	add	w23, w23, 1
+	b	.L2692
+.L2701:
+	mov	x0, x26
 	bl	buf_free
 	ldr	x3, [x29, 144]
 	adrp	x25, .LANCHOR9
 	ldr	x0, [x29, 176]
-	mov	w28, 0
+	mov	w22, 0
 	ldrh	w2, [x20, 80]
-	mov	w27, 0
+	mov	w28, 0
 	ldr	x1, [x25, #:lo12:.LANCHOR9]
 	ldrh	w3, [x3, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, 9]
@@ -16685,37 +16685,37 @@ gc_recovery:
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2706:
-	sub	w0, w27, #1
+.L2703:
+	sub	w0, w28, #1
 	str	w0, [x29, 136]
-	cmp	w22, w27
-	beq	.L2717
+	cmp	w23, w28
+	beq	.L2714
 	mov	x26, 0
-	b	.L2718
-.L2714:
+	b	.L2715
+.L2711:
 	ldr	w0, [x29, 188]
-	ldr	x1, [x23, #:lo12:.LANCHOR147]
+	ldr	x1, [x27, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
-	ldr	w6, [x1, x0]
-	cmn	w6, #1
-	beq	.L2707
+	ldr	w5, [x1, x0]
+	cmn	w5, #1
+	beq	.L2704
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
-	str	w6, [x29, 108]
+	str	w5, [x29, 108]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 160]
-	mov	w0, w6
+	mov	w0, w5
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	ldr	w6, [x29, 108]
-	bne	.L2708
-	mov	w0, w6
-	str	w6, [x29, 108]
+	ldr	w5, [x29, 108]
+	bne	.L2705
+	mov	w0, w5
+	str	w5, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
-	ldr	w6, [x29, 108]
-.L2708:
+	ldr	w5, [x29, 108]
+.L2705:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
@@ -16724,10 +16724,10 @@ gc_recovery:
 	ldr	x1, [x29, 168]
 	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2709
-	add	w0, w27, w0
+	bne	.L2706
+	add	w0, w28, w0
 	orr	w0, w0, w25, lsl 24
-.L2735:
+.L2732:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16745,14 +16745,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2712
+	bne	.L2709
 	add	x1, x29, 200
-	mov	w0, w6
+	mov	w0, w5
 	bl	pm_log2phys
-	add	w28, w28, 1
+	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2713:
+.L2710:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16761,66 +16761,68 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2707
+	bne	.L2704
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2707
+	cbz	w1, .L2704
 	strh	wzr, [x0, x19]
-.L2707:
+.L2704:
 	add	w25, w25, 1
-.L2716:
+.L2713:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2714
+	bcs	.L2711
 	add	x26, x26, 1
-.L2718:
+.L2715:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2715
+	ble	.L2712
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR98
 	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2716
-.L2709:
+	b	.L2713
+.L2706:
 	cmp	w1, 2
-	bne	.L2711
+	bne	.L2708
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2735
-.L2711:
-	add	w0, w27, w0
-	b	.L2735
-.L2712:
+	b	.L2732
+.L2708:
+	add	w0, w28, w0
+	b	.L2732
+.L2709:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
-	cinc	w28, w28, eq
-	b	.L2713
-.L2715:
-	add	w27, w27, 1
-	b	.L2706
-.L2717:
+	cinc	w22, w22, eq
+	b	.L2710
+.L2712:
+	add	w28, w28, 1
+	b	.L2703
+.L2714:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	w28, [x0, x1, lsl 1]
-	b	.L2692
-.L2687:
+	strh	w22, [x0, x1, lsl 1]
+	ldrh	w0, [x20, 80]
+	bl	zftl_insert_data_list
+	b	.L2689
+.L2684:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2686
+	beq	.L2683
 	adrp	x19, .LANCHOR97
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2721
+	bne	.L2718
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -16830,11 +16832,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2721:
+.L2718:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2686
+	b	.L2683
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16858,19 +16860,19 @@ zftl_init:
 	stp	x23, x24, [sp, 48]
 	adrp	x20, .LANCHOR198
 	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR173
+	adrp	x1, .LANCHOR172
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR173]
+	strb	w0, [x1, #:lo12:.LANCHOR172]
 	adrp	x0, .LANCHOR119
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR119]
 	adrp	x0, .LANCHOR201
 	str	w1, [x0, #:lo12:.LANCHOR201]
-	adrp	x1, .LC174
+	adrp	x1, .LC175
 	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC174
+	add	x1, x1, :lo12:.LC175
 	add	x0, x0, :lo12:.LC91
 	bl	printf
 	adrp	x1, .LANCHOR34
@@ -16906,9 +16908,9 @@ zftl_init:
 	and	w6, w6, 255
 	mov	w1, 0
 	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2738:
+.L2735:
 	cmp	w4, w3
-	bcs	.L2739
+	bcs	.L2736
 	mul	w2, w0, w2
 	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
@@ -16917,9 +16919,9 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2740:
+.L2737:
 	cmp	w11, w1
-	bcs	.L2741
+	bcs	.L2738
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -16927,7 +16929,7 @@ zftl_init:
 	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR186
+	adrp	x24, .LANCHOR185
 	mul	w8, w8, w6
 	adrp	x27, .LANCHOR203
 	mul	w2, w2, w6
@@ -16948,7 +16950,7 @@ zftl_init:
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR186]
+	strh	w0, [x24, #:lo12:.LANCHOR185]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
 	adrp	x8, .LANCHOR88
@@ -16961,10 +16963,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2742
+	bhi	.L2739
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2742:
+.L2739:
 	adrp	x7, .LANCHOR102
 	mov	w0, 2000
 	adrp	x3, .LANCHOR100
@@ -16981,11 +16983,11 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2743
+	beq	.L2740
 	adrp	x5, .LANCHOR70
 	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2744
-.L2743:
+	cbz	w5, .L2741
+.L2740:
 	mov	w5, 150
 	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
@@ -16994,80 +16996,80 @@ zftl_init:
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2744
+	cbnz	w2, .L2741
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2744:
+.L2741:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2746
+	tbz	x0, 12, .L2743
 	str	x4, [x29, 96]
-	adrp	x0, .LC175
-	add	x0, x0, :lo12:.LC175
-	bl	printf
-	ldr	x4, [x29, 96]
-.L2746:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2747
-	ldr	w1, [x4, #:lo12:.LANCHOR202]
 	adrp	x0, .LC176
 	add	x0, x0, :lo12:.LC176
 	bl	printf
-.L2747:
+	ldr	x4, [x29, 96]
+.L2743:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2748
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
+	tbz	x0, 12, .L2744
+	ldr	w1, [x4, #:lo12:.LANCHOR202]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2748:
+.L2744:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2749
-	ldr	w1, [x27, #:lo12:.LANCHOR203]
+	tbz	x0, 12, .L2745
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2749:
+.L2745:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2750
-	ldrh	w1, [x24, #:lo12:.LANCHOR186]
+	tbz	x0, 12, .L2746
+	ldr	w1, [x27, #:lo12:.LANCHOR203]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2750:
+.L2746:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2751
-	ldrh	w1, [x20, #:lo12:.LANCHOR198]
+	tbz	x0, 12, .L2747
+	ldrh	w1, [x24, #:lo12:.LANCHOR185]
 	adrp	x0, .LC180
 	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2751:
+.L2747:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2752
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
+	tbz	x0, 12, .L2748
+	ldrh	w1, [x20, #:lo12:.LANCHOR198]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2752:
+.L2748:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2753
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
+	tbz	x0, 12, .L2749
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
 	adrp	x0, .LC182
 	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L2753:
+.L2749:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2754
-	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR88]
+	tbz	x0, 12, .L2750
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
 	adrp	x0, .LC183
 	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2754:
+.L2750:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2751
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
+	bl	printf
+.L2751:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17099,15 +17101,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2755
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	tbz	x0, 12, .L2752
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2755:
+.L2752:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR73]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR186]
+	ldrh	w22, [x24, #:lo12:.LANCHOR185]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17116,37 +17118,37 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2756
+	tbz	x0, 12, .L2753
 	ldrh	w3, [x20, #:lo12:.LANCHOR198]
-	adrp	x0, .LC185
+	adrp	x0, .LC186
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC185
+	add	x0, x0, :lo12:.LC186
 	bl	printf
-.L2756:
+.L2753:
 	ldrh	w0, [x20, #:lo12:.LANCHOR198]
 	cmp	w21, w0
-	bhi	.L2757
+	bhi	.L2754
 	cmp	w22, w0
-	bls	.L2758
-.L2757:
-.L2801:
-	b	.L2801
-.L2739:
+	bls	.L2755
+.L2754:
+.L2798:
+	b	.L2798
+.L2736:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2738
-.L2741:
+	b	.L2735
+.L2738:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2740
-.L2758:
+	b	.L2737
+.L2755:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2737
+	beq	.L2734
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR97
 	mov	w0, 1
@@ -17177,20 +17179,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR181
-	ldrb	w0, [x0, #:lo12:.LANCHOR181]
-	cbz	w0, .L2760
+	adrp	x0, .LANCHOR180
+	ldrb	w0, [x0, #:lo12:.LANCHOR180]
+	cbz	w0, .L2757
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2760:
+.L2757:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2737:
+.L2734:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17208,14 +17210,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2805
+	cbnz	w0, .L2802
 	bl	zftl_init
-.L2805:
+.L2802:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC186
-	add	x0, x0, :lo12:.LC186
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17244,12 +17246,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2808
+	tbz	x1, 8, .L2805
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2808:
+.L2805:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17260,12 +17262,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR121
 	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2809:
+.L2806:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2819
+	bhi	.L2816
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2820
+	tbz	x0, 8, .L2817
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17273,22 +17275,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2820:
+.L2817:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2821
+	beq	.L2818
 	adrp	x1, .LANCHOR204
 	adrp	x0, .LC0
-	mov	w2, 488
+	mov	w2, 489
 	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2821:
+.L2818:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17301,13 +17303,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2819:
+.L2816:
 	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2810
+	beq	.L2807
 	adrp	x0, .LANCHOR121
 	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
@@ -17315,42 +17317,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2811
+	tbz	x0, 8, .L2808
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC188
+	adrp	x0, .LC189
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC188
+	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2811:
+.L2808:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2812:
+.L2809:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2818
-.L2810:
+	bne	.L2815
+.L2807:
 	add	x22, x22, 1
-	b	.L2809
-.L2818:
+	b	.L2806
+.L2815:
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2813
+	beq	.L2810
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2813
+	bne	.L2810
 	adrp	x0, .LANCHOR148
 	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
@@ -17358,15 +17360,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2814
+	bne	.L2811
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2814:
+.L2811:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2815
+	bne	.L2812
 	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
@@ -17388,25 +17390,25 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2841:
+.L2838:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2813:
+.L2810:
 	add	x19, x19, 4
-	b	.L2812
-.L2815:
+	b	.L2809
+.L2812:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2817
+	tbz	x0, 8, .L2814
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2817:
+.L2814:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2841
+	b	.L2838
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17430,17 +17432,17 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR73
 	ldrb	w4, [x2, #:lo12:.LANCHOR73]
 	ldrh	w2, [x1, 2]
-.L2843:
+.L2840:
 	cmp	w3, w7
-	beq	.L2845
-	cbz	w6, .L2846
+	beq	.L2842
+	cbz	w6, .L2843
 	add	x1, x19, :lo12:.LANCHOR62
 	strb	w0, [x1, 4]
-.L2846:
-	cbz	w5, .L2847
+.L2843:
+	cbz	w5, .L2844
 	add	x0, x19, :lo12:.LANCHOR62
 	strh	w2, [x0, 2]
-.L2847:
+.L2844:
 	adrp	x0, .LANCHOR105
 	ldrh	w22, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR68
@@ -17448,25 +17450,25 @@ gc_scan_src_blk_one_page:
 	ldrb	w1, [x0, #:lo12:.LANCHOR68]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2848
+	bne	.L2845
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2848
+	cbnz	w1, .L2845
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2849:
+.L2846:
 	add	x1, x19, :lo12:.LANCHOR62
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2850
+	bne	.L2847
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2850:
+.L2847:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR62
 	bl	buf_alloc
@@ -17474,15 +17476,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR65
-.L2860:
+.L2857:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2851
-	cbz	w20, .L2852
-.L2851:
+	bne	.L2848
+	cbz	w20, .L2849
+.L2848:
 	cmp	w0, w20
-	bgt	.L2853
-.L2861:
+	bgt	.L2850
+.L2858:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -17491,33 +17493,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2845:
+.L2842:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2844
+	bne	.L2841
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2844:
+.L2841:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2843
-.L2848:
+	b	.L2840
+.L2845:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2849
-.L2853:
+	b	.L2846
+.L2850:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2854
-	cbnz	w0, .L2854
+	bne	.L2851
+	cbnz	w0, .L2851
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2874:
+.L2871:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -17525,40 +17527,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2857
+	beq	.L2854
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2858
+	bne	.L2855
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2858:
+.L2855:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2857
+	bne	.L2854
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR65]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2857:
+.L2854:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2852:
+.L2849:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2860
-	b	.L2861
-.L2854:
+	bne	.L2857
+	b	.L2858
+.L2851:
 	orr	w0, w22, w20, lsl 24
-	b	.L2874
+	b	.L2871
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17575,42 +17577,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2876
+	bne	.L2873
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 925
+	mov	w2, 926
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2876:
+.L2873:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2896
+	beq	.L2893
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2878
+	tbz	x0, 8, .L2875
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2878:
+.L2875:
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2879
+	cbnz	w1, .L2876
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2896:
+.L2893:
 	mov	w0, 0
-	b	.L2875
-.L2879:
+	b	.L2872
+.L2876:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
@@ -17620,59 +17622,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2880
+	beq	.L2877
 	cmp	w1, 224
-	beq	.L2880
-	cbz	w1, .L2881
+	beq	.L2877
+	cbz	w1, .L2878
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2880
+	beq	.L2877
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2880
+	beq	.L2877
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2910
-.L2880:
+	bne	.L2907
+.L2877:
 	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2896
-.L2881:
+	b	.L2893
+.L2878:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2883
+	cbz	w1, .L2880
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 945
+	mov	w2, 946
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2883:
+.L2880:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2880
-.L2910:
+	b	.L2877
+.L2907:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2884
+	bne	.L2881
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 953
+	mov	w2, 954
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2884:
+.L2881:
 	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
 	adrp	x2, .LANCHOR80
@@ -17688,14 +17690,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2897
+	bne	.L2894
 	adrp	x1, .LANCHOR68
 	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2886
+	beq	.L2883
 	and	w21, w21, 65535
-.L2885:
+.L2882:
 	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17721,41 +17723,41 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2887
-.L2912:
+	bne	.L2884
+.L2909:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2875:
+.L2872:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2886:
+.L2883:
 	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2885
-.L2897:
+	b	.L2882
+.L2894:
 	mov	w21, 1
-	b	.L2885
-.L2887:
+	b	.L2882
+.L2884:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2888
-	mov	w2, 985
+	beq	.L2885
+	mov	w2, 986
 	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2912
-.L2888:
+	b	.L2909
+.L2885:
 	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	adrp	x22, .LANCHOR99
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -17767,9 +17769,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2889:
+.L2886:
 	cmp	w21, w26
-	bgt	.L2894
+	bgt	.L2891
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -17781,11 +17783,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2895
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	beq	.L2892
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
 	bl	printf
-.L2895:
+.L2892:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -17793,20 +17795,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2875
-.L2894:
+	b	.L2872
+.L2891:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2891
+	beq	.L2888
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2892
+	bne	.L2889
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2892:
+.L2889:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17821,16 +17823,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2891
+	bne	.L2888
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2891:
+.L2888:
 	add	x26, x26, 1
-	b	.L2889
+	b	.L2886
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17846,13 +17848,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2914
+	beq	.L2911
 	adrp	x21, .LANCHOR206
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR206
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2922:
+.L2919:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -17860,7 +17862,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2915
+	beq	.L2912
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17870,7 +17872,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2916
+	bne	.L2913
 	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -17886,21 +17888,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2916:
+.L2913:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2917
-	mov	w2, 1424
+	beq	.L2914
+	mov	w2, 1425
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2917:
+.L2914:
 	mov	x0, x23
 	bl	buf_free
-.L2915:
+.L2912:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR118
 	ldr	w2, [x2, #:lo12:.LANCHOR118]
@@ -17908,7 +17910,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2918
+	bcc	.L2915
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17919,42 +17921,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2913:
+.L2910:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2918:
+.L2915:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2913
+	bne	.L2910
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2922
-	b	.L2913
-.L2914:
+	bne	.L2919
+	b	.L2910
+.L2911:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2924
+	bhi	.L2921
 	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2913
-.L2924:
+	bls	.L2910
+.L2921:
 	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2913
+	b	.L2910
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17980,29 +17982,29 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC193
+	adrp	x0, .LC194
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC193
+	add	x0, x0, :lo12:.LC194
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2951
+	beq	.L2948
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2951
+	bls	.L2948
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2952
+	bne	.L2949
 	adrp	x0, .LANCHOR68
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2932:
+.L2929:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	mov	w0, w21
@@ -18018,11 +18020,11 @@ ftl_sblk_dump:
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC194
+	adrp	x0, .LC195
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC195
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18037,36 +18039,36 @@ ftl_sblk_dump:
 	adrp	x0, .LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2933:
+.L2930:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2948
+	bls	.L2945
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	str	x0, [x29, 120]
-	b	.L2949
-.L2952:
+	b	.L2946
+.L2949:
 	mov	w25, 1
-	b	.L2932
-.L2945:
+	b	.L2929
+.L2942:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2934
+	beq	.L2931
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2935
+	bne	.L2932
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2936:
+.L2933:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18108,22 +18110,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2934
+	beq	.L2931
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2939
+	bne	.L2936
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2939:
+.L2936:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2940
+	bne	.L2937
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18131,81 +18133,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC195
-	add	x0, x0, :lo12:.LC195
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2940:
+.L2937:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2942
+	cbz	x0, .L2939
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2943
+	beq	.L2940
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2943
-	adrp	x0, .LC196
+	tbz	x0, 12, .L2940
+	adrp	x0, .LC197
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC196
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2943:
+.L2940:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2942
+	beq	.L2939
 	cmn	w0, #1
-	beq	.L2942
+	beq	.L2939
 	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
-	mov	w2, 1300
+	mov	w2, 1299
 	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2942:
+.L2939:
 	add	w27, w27, 1
-.L2934:
+.L2931:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2947:
+.L2944:
 	cmp	w25, w22
-	bcs	.L2945
+	bcs	.L2942
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2949:
+.L2946:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2946
+	bls	.L2943
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2947
-.L2935:
+	b	.L2944
+.L2932:
 	cmp	w25, 2
-	bne	.L2937
+	bne	.L2934
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2936
-.L2937:
+	b	.L2933
+.L2934:
 	add	w19, w20, w19
-	b	.L2936
-.L2946:
+	b	.L2933
+.L2943:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2933
-.L2948:
+	b	.L2930
+.L2945:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18214,11 +18216,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2930:
+.L2927:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18227,9 +18229,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2951:
+.L2948:
 	mov	w0, 0
-	b	.L2930
+	b	.L2927
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -18249,22 +18251,22 @@ zftl_read:
 	stp	x23, x24, [sp, 48]
 	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2963
+	tbz	x0, 12, .L2960
 	mov	w3, w2
-	adrp	x0, .LC198
+	adrp	x0, .LC199
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC198
+	add	x0, x0, :lo12:.LC199
 	mov	w1, w20
 	bl	printf
-.L2963:
-	cbnz	w20, .L2964
+.L2960:
+	cbnz	w20, .L2961
 	adrp	x0, .LANCHOR58
 	mov	w20, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2965:
+.L2962:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2993
+	bcc	.L2990
 	adrp	x1, .LANCHOR97
 	add	w20, w20, w19
 	add	w3, w26, w20
@@ -18286,10 +18288,10 @@ zftl_read:
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2967:
-	cbnz	w25, .L2991
+.L2964:
+	cbnz	w25, .L2988
 	ldr	w0, [x29, 164]
-.L2962:
+.L2959:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18297,22 +18299,22 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2964:
+.L2961:
 	cmp	w20, 3
-	bhi	.L2993
+	bhi	.L2990
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2965
-.L2991:
+	b	.L2962
+.L2988:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L2994
+	bne	.L2991
 	cmp	w21, w27
-	bne	.L2969
+	bne	.L2966
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18321,17 +18323,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2968:
+.L2965:
 	adrp	x23, .LANCHOR49
 	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2972:
+.L2969:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2970
+	bne	.L2967
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2970
+	tbz	x2, 3, .L2967
 	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -18343,19 +18345,19 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2971:
+.L2968:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L2978:
+.L2975:
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 2
-	bls	.L2979
-	cbnz	w25, .L2967
-.L2979:
+	bls	.L2976
+	cbnz	w25, .L2964
+.L2976:
 	adrp	x0, .LANCHOR125
 	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2967
+	cbz	w1, .L2964
 	adrp	x24, .LANCHOR124
 	add	x0, x23, :lo12:.LANCHOR49
 	ldrb	w2, [x24, #:lo12:.LANCHOR124]
@@ -18367,63 +18369,63 @@ zftl_read:
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L2981:
+.L2978:
 	ldrb	w0, [x28]
-	cbnz	w0, .L2990
+	cbnz	w0, .L2987
 	mov	w0, -1
 	strb	wzr, [x28]
 	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2967
-.L2969:
+	b	.L2964
+.L2966:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2994:
+.L2991:
 	mov	w24, 0
-	b	.L2968
-.L2970:
+	b	.L2965
+.L2967:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2972
+	bne	.L2969
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2973
+	bne	.L2970
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2973:
+.L2970:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2974
+	bne	.L2971
 	ldr	x0, [x29, 168]
 	mov	w19, 0
 	add	x24, x0, :lo12:.LANCHOR121
-.L2975:
+.L2972:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2971
+	bcs	.L2968
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L2976
+	bhi	.L2973
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2976
+	bls	.L2973
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2976:
+.L2973:
 	add	w19, w19, 1
-	b	.L2975
-.L2974:
+	b	.L2972
+.L2971:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L2978
+	cbz	x0, .L2975
 	ldr	x2, [x29, 120]
 	ldr	x3, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x3, 40]
@@ -18438,15 +18440,15 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2971
-.L2990:
+	b	.L2968
+.L2987:
 	ldrb	w0, [x24, #:lo12:.LANCHOR124]
 	cmp	w0, 255
-	bne	.L2982
+	bne	.L2979
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1064
+	mov	w2, 1065
 	bl	printf
-.L2982:
+.L2979:
 	ldrb	w19, [x24, #:lo12:.LANCHOR124]
 	add	x0, x23, :lo12:.LANCHOR49
 	ubfiz	x1, x19, 6, 8
@@ -18458,21 +18460,21 @@ zftl_read:
 	strb	w0, [x24, #:lo12:.LANCHOR124]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L2983
+	bne	.L2980
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2984:
+.L2981:
 	add	x10, x23, :lo12:.LANCHOR49
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
 	ldr	w2, [x10, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w2
-	beq	.L2985
+	beq	.L2982
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
@@ -18483,9 +18485,9 @@ zftl_read:
 	ldrb	w1, [x10, 1]
 	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC200
+	adrp	x0, .LC201
 	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC200
+	add	x0, x0, :lo12:.LC201
 	bl	printf
 	ldr	x10, [x29, 112]
 	adrp	x0, .LANCHOR99
@@ -18504,28 +18506,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L2985:
+.L2982:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L2986
+	bne	.L2983
 	cmn	w8, #1
-	bne	.L2987
-.L2986:
+	bne	.L2984
+.L2983:
 	ldp	x0, x1, [x29, 128]
-	mov	w2, 1085
+	mov	w2, 1086
 	bl	printf
-.L2987:
+.L2984:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w0, w2
-	bls	.L2988
+	bls	.L2985
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18533,7 +18535,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2989:
+.L2986:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
@@ -18543,10 +18545,10 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L2981
-.L2983:
+	b	.L2978
+.L2980:
 	cmp	w8, 256
-	bne	.L2984
+	bne	.L2981
 	adrp	x0, .LANCHOR99
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
@@ -18561,8 +18563,8 @@ zftl_read:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
-	adrp	x0, .LC199
-	add	x0, x0, :lo12:.LC199
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
 	bl	printf
@@ -18573,15 +18575,15 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L2984
-.L2988:
+	b	.L2981
+.L2985:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L2989
-.L2993:
+	b	.L2986
+.L2990:
 	mov	w0, -1
-	b	.L2962
+	b	.L2959
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18664,46 +18666,46 @@ gc_check_data_one_wl:
 	ldr	x0, [x22, 8]
 	stp	x27, x28, [sp, 96]
 	ldr	x21, [x20, #:lo12:.LANCHOR10]
-	cbnz	x0, .L3016
+	cbnz	x0, .L3013
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x22, 8]
-.L3016:
+.L3013:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldr	x22, [x0, 8]
-	cbnz	x22, .L3017
+	cbnz	x22, .L3014
 	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 366
+	mov	w2, 367
 	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3017:
+.L3014:
 	adrp	x2, .LANCHOR105
 	add	x28, x21, 96
 	add	x27, x21, 80
 	add	x2, x2, :lo12:.LANCHOR105
 	mov	w26, 0
-.L3018:
+.L3015:
 	ldrb	w0, [x27, 9]
 	cmp	w26, w0
-	bge	.L3027
+	bge	.L3024
 	adrp	x25, .LANCHOR68
 	mov	w24, 1
 	add	x23, x19, :lo12:.LANCHOR62
 	add	x25, x25, :lo12:.LANCHOR68
-	b	.L3028
-.L3026:
+	b	.L3025
+.L3023:
 	ldrh	w0, [x28]
 	ldrh	w1, [x2]
 	ldrb	w3, [x25]
 	cmp	w3, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x23, 16]
-	bne	.L3019
+	bne	.L3016
 	add	w0, w0, w1
 	orr	w0, w0, w24, lsl 24
-.L3040:
+.L3037:
 	str	w0, [x22, 40]
 	mov	w1, 1
 	str	x2, [x29, 104]
@@ -18713,7 +18715,7 @@ gc_check_data_one_wl:
 	adrp	x1, .LANCHOR147
 	ldr	x2, [x29, 104]
 	cmn	w0, #1
-	beq	.L3022
+	beq	.L3019
 	ldrh	w0, [x23, 22]
 	ldr	x4, [x1, #:lo12:.LANCHOR147]
 	ldr	x3, [x22, 24]
@@ -18721,28 +18723,28 @@ gc_check_data_one_wl:
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L3022
+	bne	.L3019
 	adrp	x4, .LANCHOR148
 	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L3023
-.L3022:
+	beq	.L3020
+.L3019:
 	add	x4, x1, :lo12:.LANCHOR147
 	ldrh	w0, [x23, 22]
 	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	ldr	w0, [x1, x0, lsl 2]
 	cmn	w0, #1
-	beq	.L3023
+	beq	.L3020
 	adrp	x19, .LANCHOR72
 	ldrb	w3, [x27, 9]
 	str	x4, [x29, 104]
 	mov	w2, 4
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w3, w3, w0
-	adrp	x0, .LC201
-	add	x0, x0, :lo12:.LC201
+	adrp	x0, .LC202
+	add	x0, x0, :lo12:.LC202
 	bl	rknand_print_hex
 	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	adrp	x19, .LANCHOR148
@@ -18750,13 +18752,13 @@ gc_check_data_one_wl:
 	mov	w2, 4
 	ldr	x1, [x19, #:lo12:.LANCHOR148]
 	mul	w3, w3, w0
-	adrp	x0, .LC202
-	add	x0, x0, :lo12:.LC202
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR14
 	ldr	x4, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 10, .L3024
+	tbz	x0, 10, .L3021
 	ldr	x1, [x22, 24]
 	ldrh	w0, [x23, 22]
 	ldr	x2, [x4]
@@ -18767,13 +18769,13 @@ gc_check_data_one_wl:
 	ldr	w4, [x3, x0]
 	ldp	w5, w6, [x1]
 	ldr	w3, [x2, x0]
-	adrp	x0, .LC203
+	adrp	x0, .LC204
 	ldr	w7, [x1, 8]
-	add	x0, x0, :lo12:.LC203
+	add	x0, x0, :lo12:.LC204
 	ldr	w1, [x22, 40]
 	ldr	w2, [x22, 52]
 	bl	printf
-.L3024:
+.L3021:
 	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	ldrh	w0, [x0, 80]
@@ -18783,7 +18785,7 @@ gc_check_data_one_wl:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L3015:
+.L3012:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18792,43 +18794,43 @@ gc_check_data_one_wl:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3019:
+.L3016:
 	cmp	w3, 2
-	bne	.L3021
+	bne	.L3018
 	sub	w0, w0, #1
 	add	w1, w24, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L3040
-.L3021:
+	b	.L3037
+.L3018:
 	add	w0, w0, w1
-	b	.L3040
-.L3023:
+	b	.L3037
+.L3020:
 	ldrh	w0, [x23, 22]
 	add	w24, w24, 1
 	add	w0, w0, 1
 	strh	w0, [x23, 22]
-.L3028:
+.L3025:
 	ldrh	w0, [x23, 20]
 	cmp	w24, w0
-	ble	.L3026
+	ble	.L3023
 	add	w26, w26, 1
 	add	x28, x28, 2
-	b	.L3018
-.L3027:
+	b	.L3015
+.L3024:
 	add	x19, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x19, 16]
 	add	w1, w0, 1
 	strh	w1, [x19, 16]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbz	w1, .L3029
+	cbz	w1, .L3026
 	add	w0, w0, 2
 	strh	w0, [x19, 16]
-.L3029:
-.L3025:
+.L3026:
+.L3022:
 	mov	w0, 0
-	b	.L3015
+	b	.L3012
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18855,35 +18857,35 @@ ftl_update_l2p_map:
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L3042
+	beq	.L3039
 	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
-	mov	w2, 1576
+	mov	w2, 1575
 	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3042:
+.L3039:
 	adrp	x27, .LANCHOR121
 	mov	x24, 0
 	add	x0, x27, :lo12:.LANCHOR121
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L3043:
+.L3040:
 	cmp	w24, w23
-	blt	.L3049
+	blt	.L3046
 	adrp	x0, .LANCHOR14
 	adrp	x19, .LANCHOR9
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3050
+	tbz	x0, 12, .L3047
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC207
+	adrp	x0, .LC208
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3050:
+.L3047:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
@@ -18894,38 +18896,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L3049:
+.L3046:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L3044
+	beq	.L3041
 	ldrb	w20, [x27, #:lo12:.LANCHOR121]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L3045
-	adrp	x0, .LC204
+	tbz	x0, 12, .L3042
+	adrp	x0, .LC205
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC204
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L3045:
+.L3042:
 	adrp	x25, .LANCHOR105
-	adrp	x26, .LC205
+	adrp	x26, .LC206
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC205
-.L3048:
+	add	x26, x26, :lo12:.LC206
+.L3045:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3046
+	beq	.L3043
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3046
+	bne	.L3043
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18937,15 +18939,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3047
+	cbz	w0, .L3044
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC207
+	add	x0, x0, :lo12:.LC207
 	bl	rknand_print_hex
-.L3047:
+.L3044:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18954,13 +18956,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3046:
+.L3043:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3048
-.L3044:
+	bgt	.L3045
+.L3041:
 	add	x24, x24, 1
-	b	.L3043
+	b	.L3040
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18976,9 +18978,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3072
+	beq	.L3069
 	bl	zftl_insert_data_list
-.L3072:
+.L3069:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -19010,10 +19012,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3077:
+.L3074:
 	adrp	x2, .LANCHOR57
 	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3079
+	cbz	w1, .L3076
 	adrp	x3, .LANCHOR56
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
@@ -19032,24 +19034,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L3081
+	bcc	.L3078
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 495
+	mov	w2, 496
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3081:
+.L3078:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3082
+	bcc	.L3079
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3076:
+.L3073:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19057,7 +19059,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3082:
+.L3079:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -19065,17 +19067,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3084
-	adrp	x0, .LANCHOR173
-	ldrb	w1, [x0, #:lo12:.LANCHOR173]
+	cbz	w1, .L3081
+	adrp	x0, .LANCHOR172
+	ldrb	w1, [x0, #:lo12:.LANCHOR172]
 	add	x1, x23, x1, lsl 6
-.L3085:
+.L3082:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3086
+	bne	.L3083
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3084
+	bne	.L3081
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19084,33 +19086,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3077
-.L3086:
+	b	.L3074
+.L3083:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3085
-.L3084:
+	b	.L3082
+.L3081:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3088
+	bne	.L3085
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3088:
+.L3085:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3091:
+.L3088:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3089
+	bne	.L3086
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3089
+	tbz	x2, 3, .L3086
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19118,50 +19120,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3090:
+.L3087:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3115
+	bcs	.L3112
 	add	w20, w21, w20
-	cbz	x24, .L3093
-	cbz	w21, .L3094
+	cbz	x24, .L3090
+	cbz	w21, .L3091
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3094:
+.L3091:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3095
+	bcc	.L3092
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3115:
+.L3112:
 	mov	w24, 0
-	b	.L3092
-.L3089:
+	b	.L3089
+.L3086:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3091
+	bne	.L3088
 	mov	x24, 0
-	b	.L3090
-.L3095:
+	b	.L3087
+.L3092:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3115
-.L3093:
+	b	.L3112
+.L3090:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3096
+	beq	.L3093
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19174,11 +19176,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3097
+	bne	.L3094
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3098
-.L3097:
+	bne	.L3095
+.L3094:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19186,53 +19188,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC208
-	add	x0, x0, :lo12:.LC208
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC167
+	adrp	x0, .LC168
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC167
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L3098:
+.L3095:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3099
+	bne	.L3096
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3100
-.L3099:
+	bne	.L3097
+.L3096:
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 566
+	mov	w2, 567
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3100:
-	cbz	w21, .L3101
+.L3097:
+	cbz	w21, .L3098
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3102
+	beq	.L3099
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3103:
+.L3100:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3101:
+.L3098:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3104
-	bls	.L3105
+	bcc	.L3101
+	bls	.L3102
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3105:
-	cbz	x27, .L3092
+.L3102:
+	cbz	x27, .L3089
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -19242,17 +19244,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3092:
+.L3089:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3107
+	cbnz	w0, .L3104
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3107:
+.L3104:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR173
+	adrp	x20, .LANCHOR172
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19273,7 +19275,7 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR173
+	add	x0, x20, :lo12:.LANCHOR172
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
 	ldrb	w2, [x0, #:lo12:.LANCHOR119]
@@ -19284,22 +19286,22 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR212]
 	ldrh	w0, [x19, 6]
-	bhi	.L3108
+	bhi	.L3105
 	cmp	w0, 1
-	bne	.L3080
-.L3108:
+	bne	.L3077
+.L3105:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR173]
+	ldrb	w0, [x20, #:lo12:.LANCHOR172]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3112:
+.L3109:
 	cmp	w1, w4
-	bne	.L3113
-	strb	w3, [x20, #:lo12:.LANCHOR173]
+	bne	.L3110
+	strb	w3, [x20, #:lo12:.LANCHOR172]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
@@ -19309,58 +19311,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3080
+	bne	.L3077
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3080:
+.L3077:
 	adrp	x0, .LANCHOR57
 	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3077
-.L3079:
+	cbnz	w0, .L3074
+.L3076:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3076
-.L3104:
+	b	.L3073
+.L3101:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3106
+	beq	.L3103
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3105
-.L3106:
+	b	.L3102
+.L3103:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3105
-.L3113:
+	b	.L3102
+.L3110:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3112
-.L3114:
+	b	.L3109
+.L3111:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3102:
+.L3099:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3103
-.L3096:
-	cbnz	w21, .L3114
+	b	.L3100
+.L3093:
+	cbnz	w21, .L3111
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3101
+	b	.L3098
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19377,10 +19379,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3138
+	cbnz	w0, .L3135
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3137
+	cbz	x0, .L3134
 	adrp	x20, .LANCHOR62
 	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
@@ -19396,52 +19398,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3140
+	bne	.L3137
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 600
+	mov	w2, 601
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3140:
+.L3137:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3141
+	bne	.L3138
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3141:
+.L3138:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3142
+	bne	.L3139
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3145:
+.L3142:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3143
+	bne	.L3140
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3143
+	tbz	x2, 1, .L3140
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3137
+	tbz	x0, 8, .L3134
 	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC209
+	adrp	x0, .LC210
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC210
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3137:
+.L3134:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19450,10 +19452,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3143:
+.L3140:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3145
+	bne	.L3142
 	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -19468,19 +19470,19 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3146
+	tbz	x0, 8, .L3143
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC211
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC211
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3146:
+.L3143:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -19493,27 +19495,27 @@ gc_do_copy_back:
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3137
-.L3142:
+	b	.L3134
+.L3139:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3147
+	tbz	x0, 8, .L3144
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC211
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3147:
+.L3144:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3137
-.L3138:
+	b	.L3134
+.L3135:
 	adrp	x1, .LANCHOR10
 	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
@@ -19522,10 +19524,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3148
+	bne	.L3145
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3149
+	cbz	w0, .L3146
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19534,7 +19536,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3150:
+.L3147:
 	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR62
@@ -19546,13 +19548,13 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR148
 	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3153:
+.L3150:
 	cmp	w2, w8
-	blt	.L3155
-.L3182:
+	blt	.L3152
+.L3179:
 	mov	w23, 1
-	b	.L3151
-.L3149:
+	b	.L3148
+.L3146:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -19568,12 +19570,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3150
-.L3151:
+	beq	.L3147
+.L3148:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3156
+	tbz	x1, 8, .L3153
 	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -19581,18 +19583,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR148]
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC211
+	adrp	x0, .LC212
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC212
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3156:
+.L3153:
 	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3157:
+.L3154:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19600,27 +19602,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3169
+	blt	.L3166
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3170
+	beq	.L3167
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3171:
+.L3168:
 	cmp	w2, w3
-	blt	.L3177
+	blt	.L3174
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3176
-.L3148:
+	b	.L3173
+.L3145:
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3152
+	cbnz	w0, .L3149
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19628,8 +19630,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3150
-.L3152:
+	b	.L3147
+.L3149:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19637,28 +19639,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3150
-.L3155:
+	b	.L3147
+.L3152:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3182
+	beq	.L3179
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3154
+	bne	.L3151
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3137
+	bcs	.L3134
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3154:
+.L3151:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3153
-.L3169:
+	b	.L3150
+.L3166:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19667,11 +19669,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3158
+	bne	.L3155
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3159
+	cbnz	x0, .L3156
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19679,8 +19681,8 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3137
-.L3159:
+	cbz	x0, .L3134
+.L3156:
 	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR72
@@ -19700,7 +19702,7 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3160
+	bne	.L3157
 	adrp	x0, .LANCHOR147
 	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
@@ -19746,7 +19748,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3158:
+.L3155:
 	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
@@ -19765,7 +19767,7 @@ gc_do_copy_back:
 	strb	w23, [x3, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3164
+	bne	.L3161
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR105
 	ldrh	w6, [x6, #:lo12:.LANCHOR105]
@@ -19783,10 +19785,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3165:
+.L3162:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3168
+	tbz	x0, 8, .L3165
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -19800,19 +19802,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3168:
+.L3165:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3157
-.L3160:
+	b	.L3154
+.L3157:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR148]
@@ -19825,7 +19827,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3162
+	bne	.L3159
 	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR99]
@@ -19844,30 +19846,30 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3162
+	bne	.L3159
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3162
+	bne	.L3159
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 715
+	mov	w2, 716
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3162:
+.L3159:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR118
 	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3163
+	bcc	.L3160
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3163:
+.L3160:
 	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -19875,32 +19877,32 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3158
-.L3164:
+	b	.L3155
+.L3161:
 	cmp	w0, 2
-	bne	.L3166
+	bne	.L3163
 	adrp	x0, .LANCHOR104
 	adrp	x1, .LANCHOR105
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3167
+	cbnz	w0, .L3164
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3225:
+.L3222:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3166:
+.L3163:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3165
-.L3167:
+	b	.L3162
+.L3164:
 	add	w0, w19, w26, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
@@ -19908,32 +19910,32 @@ gc_do_copy_back:
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3225
-.L3170:
+	b	.L3222
+.L3167:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3172
-.L3175:
-	strb	wzr, [x1, 60]
-	b	.L3173
+	cbz	w3, .L3169
 .L3172:
+	strb	wzr, [x1, 60]
+	b	.L3170
+.L3169:
 	cmp	w23, 1
-	bne	.L3174
+	bne	.L3171
 	mov	w3, 9
-.L3224:
+.L3221:
 	strb	w3, [x1, 60]
-.L3173:
+.L3170:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3176:
+.L3173:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3178
+	cbz	w1, .L3175
 	add	w0, w0, w0, lsl 1
-.L3179:
+.L3176:
 	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR62
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
@@ -19948,34 +19950,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3180
+	blt	.L3177
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3180:
+.L3177:
 	bl	gc_write_completed
-	b	.L3137
-.L3174:
+	b	.L3134
+.L3171:
 	cmp	w23, 2
-	bne	.L3175
+	bne	.L3172
 	mov	w3, 13
-	b	.L3224
-.L3177:
+	b	.L3221
+.L3174:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3171
-.L3178:
+	b	.L3168
+.L3175:
 	adrp	x1, .LANCHOR104
 	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3179
+	b	.L3176
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -20000,35 +20002,35 @@ zftl_do_gc:
 	stp	x27, x28, [sp, 96]
 	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3333
+	bhi	.L3330
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3229
-	add	x0, x0, :lo12:.L3229
+	adrp	x0, .L3226
+	add	x0, x0, :lo12:.L3226
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3229
+	adr	x1, .Lrtx3226
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3229:
+.Lrtx3226:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3229:
-	.2byte	(.L3228 - .Lrtx3229) / 4
-	.2byte	(.L3230 - .Lrtx3229) / 4
-	.2byte	(.L3231 - .Lrtx3229) / 4
-	.2byte	(.L3232 - .Lrtx3229) / 4
-	.2byte	(.L3233 - .Lrtx3229) / 4
-	.2byte	(.L3234 - .Lrtx3229) / 4
-	.2byte	(.L3235 - .Lrtx3229) / 4
+.L3226:
+	.2byte	(.L3225 - .Lrtx3226) / 4
+	.2byte	(.L3227 - .Lrtx3226) / 4
+	.2byte	(.L3228 - .Lrtx3226) / 4
+	.2byte	(.L3229 - .Lrtx3226) / 4
+	.2byte	(.L3230 - .Lrtx3226) / 4
+	.2byte	(.L3231 - .Lrtx3226) / 4
+	.2byte	(.L3232 - .Lrtx3226) / 4
 	.section	.text.zftl_do_gc
-.L3234:
+.L3231:
 	adrp	x20, .LANCHOR62
 	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3236:
+.L3233:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3329
+	cbz	w0, .L3326
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20045,8 +20047,8 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3397
-.L3228:
+	b	.L3394
+.L3225:
 	adrp	x0, .LANCHOR92
 	adrp	x28, .LANCHOR85
 	adrp	x27, .LANCHOR83
@@ -20060,16 +20062,16 @@ zftl_do_gc:
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3237
-	cbnz	w26, .L3238
+	beq	.L3234
+	cbnz	w26, .L3235
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3238
-.L3333:
+	blt	.L3235
+.L3330:
 	mov	w20, 16
-	b	.L3226
-.L3238:
+	b	.L3223
+.L3235:
 	adrp	x5, .LANCHOR82
 	mov	w1, 5
 	adrp	x26, .LANCHOR71
@@ -20081,7 +20083,7 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3239
+	beq	.L3236
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20094,120 +20096,120 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3240
+	bcs	.L3237
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3239
+	bls	.L3236
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3239
-.L3240:
+	bls	.L3236
+.L3237:
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3241
+	cbz	w0, .L3238
 	mov	w0, 1
 	str	wzr, [x20, #:lo12:.LANCHOR146]
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3239:
+	b	.L3330
+.L3236:
 	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3241:
+.L3238:
 	cmp	w22, 15
-	bls	.L3335
+	bls	.L3332
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3335
+	bhi	.L3332
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3242:
+.L3239:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3243
+	tbz	x0, 8, .L3240
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
-	mov	w1, 1853
+	mov	w1, 1856
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3243:
+.L3240:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3244
-.L3245:
+	ble	.L3241
+.L3242:
 	mov	w0, 1
-.L3399:
+.L3396:
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3335:
+	b	.L3330
+.L3332:
 	mov	w20, 2
-	b	.L3242
-.L3244:
+	b	.L3239
+.L3241:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3245
-	b	.L3333
-.L3237:
+	bgt	.L3242
+	b	.L3330
+.L3234:
 	cmp	w26, 1
-	bne	.L3247
+	bne	.L3244
 	bl	gc_scan_static_data
 	adrp	x24, .LANCHOR71
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3248
-.L3249:
+	cbz	w0, .L3245
+.L3246:
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3399
-.L3248:
+	b	.L3396
+.L3245:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3249
-	cbnz	w22, .L3250
-.L3254:
-	mov	w20, 16
+	cbnz	w0, .L3246
+	cbnz	w22, .L3247
 .L3251:
+	mov	w20, 16
+.L3248:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
 	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3259
+	cbz	w5, .L3256
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3226
+	tbz	x1, 8, .L3223
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC214
+	adrp	x0, .LC215
 	mov	w2, 0
-	mov	w1, 1951
-	add	x0, x0, :lo12:.LC214
+	mov	w1, 1954
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3226:
+.L3223:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20217,25 +20219,25 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3250:
+.L3247:
 	cmp	w21, w25
 	adrp	x1, .LANCHOR87
 	adrp	x2, .LANCHOR84
-	bcs	.L3252
+	bcs	.L3249
 	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3253
-.L3252:
+	blt	.L3250
+.L3249:
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3253
+	blt	.L3250
 	adrp	x0, .LANCHOR88
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3254
-.L3253:
+	bcc	.L3251
+.L3250:
 	adrp	x5, .LANCHOR146
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
@@ -20245,17 +20247,17 @@ zftl_do_gc:
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3255
+	bls	.L3252
 	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3255
+	bls	.L3252
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3254
+	beq	.L3251
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20266,82 +20268,82 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3254
+	bgt	.L3251
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3387:
+.L3384:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3254
-	b	.L3245
-.L3255:
+	cbz	w0, .L3251
+	b	.L3242
+.L3252:
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3257
+	bcc	.L3254
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3387
-.L3257:
+	b	.L3384
+.L3254:
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3258
+	cbnz	w0, .L3255
 	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3251
-.L3258:
+	bls	.L3248
+.L3255:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3387
-.L3247:
+	b	.L3384
+.L3244:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3333
-	b	.L3254
-.L3259:
+	bcc	.L3330
+	b	.L3251
+.L3256:
 	adrp	x2, .LANCHOR74
 	mov	x24, x2
 	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3260
-	cbz	w22, .L3261
+	bcs	.L3257
+	cbz	w22, .L3258
 	cmp	w22, 16
-	bls	.L3262
+	bls	.L3259
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3262
+	bhi	.L3259
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3263
+	bne	.L3260
 	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3389:
+.L3386:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3264:
-	cbnz	w0, .L3266
-	b	.L3226
-.L3263:
+.L3261:
+	cbnz	w0, .L3263
+	b	.L3223
+.L3260:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3266
+	beq	.L3263
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20354,16 +20356,16 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3267
+	bcs	.L3264
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3266
+	bls	.L3263
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3266
-.L3267:
+	bls	.L3263
+.L3264:
 	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
@@ -20371,67 +20373,67 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3266:
+.L3263:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3226
-.L3262:
+	b	.L3223
+.L3259:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3396:
+.L3393:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3266
+	bne	.L3263
 	mov	w2, 2
-.L3392:
+.L3389:
 	mov	w1, 3
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3389
-.L3261:
+	b	.L3386
+.L3258:
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3269
+	tbz	x1, 8, .L3266
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC214
+	adrp	x0, .LC215
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1981
-	add	x0, x0, :lo12:.LC214
+	mov	w1, 1984
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3269:
+.L3266:
 	cmp	w21, 16
-	bls	.L3270
+	bls	.L3267
 	mov	w2, 4
-	b	.L3392
-.L3270:
+	b	.L3389
+.L3267:
 	mov	w2, 1
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3396
-.L3260:
+	b	.L3393
+.L3257:
 	cmp	w26, 1
-	bne	.L3226
+	bne	.L3223
 	cmp	w21, w4, lsl 1
-	bge	.L3271
+	bge	.L3268
 	cmp	w25, w22, lsr 1
-	bcs	.L3272
+	bcs	.L3269
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcs	.L3272
+	bcs	.L3269
 	adrp	x0, .LANCHOR84
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3226
-.L3272:
+	b	.L3223
+.L3269:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -20439,21 +20441,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3273
-.L3278:
-	cmp	w22, 1
-	bhi	.L3274
+	bne	.L3270
 .L3275:
+	cmp	w22, 1
+	bhi	.L3271
+.L3272:
 	cmp	w21, w25
 	adrp	x21, .LANCHOR84
-	bcs	.L3282
+	bcs	.L3279
 	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3282
+	beq	.L3279
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20464,13 +20466,13 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3284
-.L3282:
+	ble	.L3281
+.L3279:
 	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3226
-.L3273:
+	b	.L3223
+.L3270:
 	adrp	x2, .LANCHOR146
 	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
@@ -20480,14 +20482,14 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
 	adrp	x4, .LANCHOR9
-	bls	.L3276
+	bls	.L3273
 	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3276
+	bcs	.L3273
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20495,167 +20497,167 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3266
-.L3276:
+	cbnz	w0, .L3263
+.L3273:
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3277
+	bhi	.L3274
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3266
-.L3277:
+	b	.L3263
+.L3274:
 	ldrh	w2, [x27, #:lo12:.LANCHOR83]
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
 	adrp	x2, .LANCHOR84
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3278
+	ble	.L3275
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3275
-	b	.L3278
-.L3274:
+	bcc	.L3272
+	b	.L3275
+.L3271:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3279
+	bls	.L3276
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3279
+	bhi	.L3276
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3280
+	bne	.L3277
 	mov	w2, 4
-.L3388:
+.L3385:
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3280:
+.L3277:
 	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3390
+	bls	.L3387
 	lsr	w1, w1, 2
-.L3391:
+.L3388:
 	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3264
-.L3279:
+	b	.L3261
+.L3276:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3280
+	bne	.L3277
 	mov	w2, 2
-	b	.L3388
-.L3284:
+	b	.L3385
+.L3281:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3390:
+.L3387:
 	lsr	w1, w1, 1
-	b	.L3391
-.L3271:
+	b	.L3388
+.L3268:
 	adrp	x0, .LANCHOR84
 	mov	w20, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3226
-.L3230:
+	b	.L3223
+.L3227:
 	adrp	x7, .LANCHOR62
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3285
+	bne	.L3282
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3285:
+.L3282:
 	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3398
+	beq	.L3395
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3287
+	cbz	w5, .L3284
 	add	x1, x1, 58
 	mov	w0, 0
-.L3289:
+.L3286:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3288
-.L3293:
+	bne	.L3285
+.L3290:
 	adrp	x0, .LANCHOR62
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3333
-.L3288:
+	b	.L3330
+.L3285:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3289
-.L3287:
+	bne	.L3286
+.L3284:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3290
+	beq	.L3287
 	tst	w0, 192
-	bne	.L3291
-.L3290:
+	bne	.L3288
+.L3287:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3293
-	mov	w2, 2214
+	cbz	w0, .L3290
+	mov	w2, 2217
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3293
-.L3291:
+	b	.L3290
+.L3288:
 	mov	w0, 2
-	b	.L3399
-.L3231:
+	b	.L3396
+.L3228:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3294
+	bne	.L3291
 	mov	w0, 3
-	b	.L3399
-.L3294:
+	b	.L3396
+.L3291:
 	adrp	x20, .LANCHOR62
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3245
+	beq	.L3242
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3295
+	cbz	w2, .L3292
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3295:
+	b	.L3330
+.L3292:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR9
@@ -20663,14 +20665,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3296
+	cbz	w1, .L3293
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2242
+	mov	w2, 2245
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3296:
+.L3293:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20681,70 +20683,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3297
+	bhi	.L3294
 	strh	w0, [x21, 30]
-	b	.L3293
-.L3297:
+	b	.L3290
+.L3294:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3293
-.L3232:
+	b	.L3290
+.L3229:
 	adrp	x20, .LANCHOR62
 	adrp	x23, .LANCHOR80
 	add	x22, x20, :lo12:.LANCHOR62
 	add	x23, x23, :lo12:.LANCHOR80
-.L3368:
+.L3365:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3299
+	bcs	.L3296
 	cmp	w21, 7
-	bls	.L3368
-	b	.L3333
-.L3299:
+	bls	.L3365
+	b	.L3330
+.L3296:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3300
+	cbz	w3, .L3297
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3301
+	tbz	x0, 8, .L3298
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3301:
+.L3298:
 	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	add	x0, x20, :lo12:.LANCHOR62
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3302
+	beq	.L3299
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2276
+	mov	w2, 2279
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3302:
+.L3299:
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3333
-.L3300:
+	b	.L3330
+.L3297:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -20752,27 +20754,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3303
+	tbz	x0, 8, .L3300
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3303:
+.L3300:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3304
+	beq	.L3301
 	tst	w0, 192
-	bne	.L3305
-.L3304:
+	bne	.L3302
+.L3301:
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2286
+	mov	w2, 2289
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3305:
+.L3302:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20782,56 +20784,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3306
+	bhi	.L3303
 	strh	w0, [x19, 30]
-	b	.L3333
-.L3306:
+	b	.L3330
+.L3303:
 	strh	wzr, [x19, 30]
-.L3397:
+.L3394:
 	bl	flt_sys_flush
-	b	.L3333
-.L3233:
+	b	.L3330
+.L3230:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3307
+	bne	.L3304
 	adrp	x0, .LANCHOR71
 	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3307
+	bne	.L3304
 	bl	ftl_flush
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3308
+	cbz	w1, .L3305
 	mov	w0, w22
 	mov	w1, 5
-.L3394:
+.L3391:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3310
+	beq	.L3307
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3311
+	beq	.L3308
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2315
+	mov	w2, 2318
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3311:
+.L3308:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3332:
+.L3329:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20894,12 +20896,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3333
-.L3308:
+	b	.L3330
+.L3305:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3394
-.L3307:
+	b	.L3391
+.L3304:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20912,24 +20914,24 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR71
 	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3314:
+.L3311:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3333
+	beq	.L3330
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3315
+	cbnz	w0, .L3312
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3316
+	bhi	.L3313
 	bl	ftl_write_commit
-.L3316:
+.L3313:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3314
+	bcc	.L3311
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
@@ -20939,35 +20941,37 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3318
+	cbz	w1, .L3315
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2390
+	mov	w2, 2393
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3318:
+.L3315:
 	ldrh	w0, [x21, #:lo12:.LANCHOR62]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3319
+	cbnz	w1, .L3316
 	bl	ftl_free_sblk
-	b	.L3293
-.L3319:
+	b	.L3290
+.L3316:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3293
-.L3315:
+	b	.L3290
+.L3312:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3320
-	ldr	w0, [x20, 324]
+	cbz	w0, .L3317
 	strh	wzr, [x20, 320]
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	w0, [x20, 324]
 	cmn	w0, #1
-	beq	.L3321
+	beq	.L3318
 	bl	ftl_mask_bad_block
-.L3321:
+.L3318:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20982,28 +20986,28 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3322
+	cbz	x0, .L3319
 	bl	buf_free
-.L3322:
+.L3319:
 	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2426
+	mov	w2, 2431
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3333
-.L3320:
+	b	.L3330
+.L3317:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3323
+	bls	.L3320
 	cmp	w1, w0
-	bcc	.L3314
+	bcc	.L3311
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
@@ -21014,12 +21018,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3333
-.L3323:
+	b	.L3330
+.L3320:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3324
+	bcc	.L3321
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -21028,7 +21032,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3324:
+.L3321:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -21046,40 +21050,40 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3326
+	bne	.L3323
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	adrp	x1, .LANCHOR104
 	ldrb	w1, [x1, #:lo12:.LANCHOR104]
-	cbnz	w1, .L3326
+	cbnz	w1, .L3323
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3326:
+.L3323:
 	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3333
-.L3329:
+	b	.L3330
+.L3326:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3330
+	bcc	.L3327
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3333
-.L3330:
+	b	.L3330
+.L3327:
 	cmp	w21, 15
-	bls	.L3236
+	bls	.L3233
 	cmp	w26, 1
-	bne	.L3333
+	bne	.L3330
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3236
-	b	.L3333
-.L3235:
+	bls	.L3233
+	b	.L3330
+.L3232:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21092,17 +21096,17 @@ zftl_do_gc:
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3398:
+.L3395:
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3333
-.L3310:
-	mov	w2, 2321
+	b	.L3330
+.L3307:
+	mov	w2, 2324
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3332
+	b	.L3329
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21122,22 +21126,22 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3401
+	tbz	x0, 12, .L3398
 	mov	w3, w2
-	adrp	x0, .LC217
+	adrp	x0, .LC218
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC217
+	add	x0, x0, :lo12:.LC218
 	mov	w1, w27
 	bl	printf
-.L3401:
-	cbnz	w27, .L3402
+.L3398:
+	cbnz	w27, .L3399
 	adrp	x0, .LANCHOR58
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3403:
+.L3400:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3417
+	bcc	.L3414
 	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
@@ -21152,8 +21156,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3405:
-	cbnz	w21, .L3413
+.L3402:
+	cbnz	w21, .L3410
 	adrp	x20, .LANCHOR90
 	adrp	x19, .LANCHOR94
 	add	x20, x20, :lo12:.LANCHOR90
@@ -21163,14 +21167,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3414:
+.L3411:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3415
+	ble	.L3412
 	mov	w0, 0
-.L3400:
+.L3397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21178,28 +21182,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3402:
+.L3399:
 	cmp	w27, 3
-	bhi	.L3417
+	bhi	.L3414
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3403
-.L3413:
+	b	.L3400
+.L3410:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3406
+	cbnz	x0, .L3403
 	bl	ftl_write_commit
-	b	.L3405
-.L3406:
+	b	.L3402
+.L3403:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3409
+	bne	.L3406
 	cmp	w26, w22
-	bne	.L3410
+	bne	.L3407
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21208,9 +21212,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3422:
+.L3419:
 	strb	w3, [x28, 56]
-.L3409:
+.L3406:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -21232,19 +21236,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3405
-.L3410:
+	b	.L3402
+.L3407:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3422
-.L3415:
+	b	.L3419
+.L3412:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3414
-.L3417:
+	b	.L3411
+.L3414:
 	mov	w0, -1
-	b	.L3400
+	b	.L3397
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -21303,12 +21307,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3428
+	bne	.L3425
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3428:
+.L3425:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21335,7 +21339,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3451
+	bcc	.L3448
 	adrp	x24, .LANCHOR216
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
@@ -21344,14 +21348,14 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR216]
-	tbz	x2, 12, .L3432
-	adrp	x0, .LC218
+	tbz	x2, 12, .L3429
+	adrp	x0, .LC219
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3432:
+.L3429:
 	adrp	x23, .LANCHOR97
 	adrp	x26, .LANCHOR121
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
@@ -21363,7 +21367,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3433
+	cbz	w25, .L3430
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21371,20 +21375,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3434
+	bne	.L3431
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3434:
+.L3431:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3436
+	beq	.L3433
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3436
+	cbz	x0, .L3433
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21403,53 +21407,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3436:
+.L3433:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3433:
-	cbz	w19, .L3438
+.L3430:
+	cbz	w19, .L3435
 	bl	ftl_flush
-.L3438:
+.L3435:
 	adrp	x25, .LANCHOR99
 	add	x21, x26, :lo12:.LANCHOR121
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3439:
+.L3436:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3444
-	cbz	w19, .L3446
+	bcs	.L3441
+	cbz	w19, .L3443
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3447
+	bne	.L3444
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3447:
+.L3444:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3446
+	beq	.L3443
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3446
+	cbz	x0, .L3443
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3449
+	bcc	.L3446
 	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1235
+	mov	w2, 1236
 	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3449:
+.L3446:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21461,38 +21465,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3446:
+.L3443:
 	ldr	w1, [x24, #:lo12:.LANCHOR216]
 	cmp	w1, 8192
-	bls	.L3452
+	bls	.L3449
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3450
-	adrp	x0, .LC218
+	tbz	x0, 12, .L3447
+	adrp	x0, .LC219
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC218
+	add	x0, x0, :lo12:.LC219
 	bl	printf
-.L3450:
+.L3447:
 	str	wzr, [x24, #:lo12:.LANCHOR216]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3452:
+.L3449:
 	mov	w0, 0
-	b	.L3430
-.L3444:
+	b	.L3427
+.L3441:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3440
+	beq	.L3437
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3442
+	cbz	x0, .L3439
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21504,24 +21508,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3478:
+.L3475:
 	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3442:
+.L3439:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3439
-.L3440:
+	b	.L3436
+.L3437:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3442
+	beq	.L3439
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21539,10 +21543,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3478
-.L3451:
+	b	.L3475
+.L3448:
 	mov	w0, -1
-.L3430:
+.L3427:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21795,7 +21799,7 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -21971,7 +21975,7 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -21991,7 +21995,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -22004,7 +22008,7 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -22045,7 +22049,7 @@ ftl_sblk_vpn:
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22058,7 +22062,7 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -22150,7 +22154,7 @@ g_flash_multi_page_read_en:
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22197,7 +22201,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -22216,7 +22220,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22287,7 +22291,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22545,7 +22549,7 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -22595,7 +22599,7 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
@@ -22702,7 +22706,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -22791,7 +22795,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -23636,9 +23640,9 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 960
+	.size	zftl_nand_flash_para_tbl, 1024
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -24354,7 +24358,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1056
-	.hword	473
+	.hword	455
 	.byte	2
 	.byte	6
 	.byte	40
@@ -24462,490 +24466,546 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.byte	32
-	.hword	256
-	.byte	2
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	2092
+	.hword	473
+	.byte	2
+	.byte	5
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.hword	256
+	.byte	2
+	.byte	-65
+	.byte	-66
+	.byte	0
+	.byte	5
+	.byte	-119
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-95
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	1
+	.hword	1024
+	.hword	1479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	-119
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
 	.byte	2
-	.hword	2092
-	.hword	473
 	.byte	2
-	.byte	5
+	.hword	1024
+	.hword	1479
+	.byte	3
+	.byte	17
 	.byte	40
 	.byte	32
-	.byte	3
 	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
 	.byte	3
 	.byte	0
-	.hword	256
-	.byte	2
-	.byte	-65
-	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10041,"a",@progbits
+	.byte	0
+	.section	.rodata.__func__.10060,"a",@progbits
 	.align	3
 	.set	.LANCHOR5,. + 0
-	.type	__func__.10041, %object
-	.size	__func__.10041, 18
-__func__.10041:
+	.type	__func__.10060, %object
+	.size	__func__.10060, 18
+__func__.10060:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10066,"a",@progbits
+	.section	.rodata.__func__.10085,"a",@progbits
 	.align	3
 	.set	.LANCHOR11,. + 0
-	.type	__func__.10066, %object
-	.size	__func__.10066, 23
-__func__.10066:
+	.type	__func__.10085, %object
+	.size	__func__.10085, 23
+__func__.10085:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10174,"a",@progbits
+	.section	.rodata.__func__.10193,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.10174, %object
-	.size	__func__.10174, 15
-__func__.10174:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.10193, %object
+	.size	__func__.10193, 15
+__func__.10193:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10206,"a",@progbits
+	.section	.rodata.__func__.10225,"a",@progbits
 	.align	3
 	.set	.LANCHOR126,. + 0
-	.type	__func__.10206, %object
-	.size	__func__.10206, 15
-__func__.10206:
+	.type	__func__.10225, %object
+	.size	__func__.10225, 15
+__func__.10225:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10247,"a",@progbits
+	.section	.rodata.__func__.10266,"a",@progbits
 	.align	3
 	.set	.LANCHOR107,. + 0
-	.type	__func__.10247, %object
-	.size	__func__.10247, 18
-__func__.10247:
+	.type	__func__.10266, %object
+	.size	__func__.10266, 18
+__func__.10266:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10257,"a",@progbits
+	.section	.rodata.__func__.10276,"a",@progbits
 	.align	3
 	.set	.LANCHOR108,. + 0
-	.type	__func__.10257, %object
-	.size	__func__.10257, 17
-__func__.10257:
+	.type	__func__.10276, %object
+	.size	__func__.10276, 17
+__func__.10276:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10292,"a",@progbits
+	.section	.rodata.__func__.10311,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10292, %object
-	.size	__func__.10292, 14
-__func__.10292:
+	.type	__func__.10311, %object
+	.size	__func__.10311, 14
+__func__.10311:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10316,"a",@progbits
-	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.10316, %object
-	.size	__func__.10316, 16
-__func__.10316:
-	.string	"ftl_sysblk_dump"
 	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	__func__.10335, %object
-	.size	__func__.10335, 23
+	.size	__func__.10335, 16
 __func__.10335:
+	.string	"ftl_sysblk_dump"
+	.section	.rodata.__func__.10354,"a",@progbits
+	.align	3
+	.set	.LANCHOR187,. + 0
+	.type	__func__.10354, %object
+	.size	__func__.10354, 23
+__func__.10354:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10361,"a",@progbits
+	.section	.rodata.__func__.10380,"a",@progbits
 	.align	3
 	.set	.LANCHOR109,. + 0
-	.type	__func__.10361, %object
-	.size	__func__.10361, 23
-__func__.10361:
+	.type	__func__.10380, %object
+	.size	__func__.10380, 23
+__func__.10380:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10382,"a",@progbits
+	.section	.rodata.__func__.10401,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.10382, %object
-	.size	__func__.10382, 19
-__func__.10382:
+	.type	__func__.10401, %object
+	.size	__func__.10401, 19
+__func__.10401:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10400,"a",@progbits
+	.section	.rodata.__func__.10419,"a",@progbits
 	.align	3
 	.set	.LANCHOR113,. + 0
-	.type	__func__.10400, %object
-	.size	__func__.10400, 22
-__func__.10400:
+	.type	__func__.10419, %object
+	.size	__func__.10419, 22
+__func__.10419:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10411,"a",@progbits
+	.section	.rodata.__func__.10430,"a",@progbits
 	.align	3
 	.set	.LANCHOR114,. + 0
-	.type	__func__.10411, %object
-	.size	__func__.10411, 22
-__func__.10411:
+	.type	__func__.10430, %object
+	.size	__func__.10430, 22
+__func__.10430:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10436,"a",@progbits
+	.section	.rodata.__func__.10455,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.10436, %object
-	.size	__func__.10436, 19
-__func__.10436:
+	.set	.LANCHOR182,. + 0
+	.type	__func__.10455, %object
+	.size	__func__.10455, 19
+__func__.10455:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10448,"a",@progbits
+	.section	.rodata.__func__.10467,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.10448, %object
-	.size	__func__.10448, 18
-__func__.10448:
+	.set	.LANCHOR183,. + 0
+	.type	__func__.10467, %object
+	.size	__func__.10467, 18
+__func__.10467:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10485,"a",@progbits
+	.section	.rodata.__func__.10504,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
-	.type	__func__.10485, %object
-	.size	__func__.10485, 25
-__func__.10485:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.10504, %object
+	.size	__func__.10504, 25
+__func__.10504:
 	.string	"ftl_low_format_data_init"
-	.section	.rodata.__func__.10500,"a",@progbits
+	.section	.rodata.__func__.10519,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.10500, %object
-	.size	__func__.10500, 15
-__func__.10500:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.10519, %object
+	.size	__func__.10519, 15
+__func__.10519:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.10548,"a",@progbits
+	.section	.rodata.__func__.10567,"a",@progbits
 	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.10548, %object
-	.size	__func__.10548, 14
-__func__.10548:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.10567, %object
+	.size	__func__.10567, 14
+__func__.10567:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10665,"a",@progbits
+	.section	.rodata.__func__.10684,"a",@progbits
 	.align	3
 	.set	.LANCHOR164,. + 0
-	.type	__func__.10665, %object
-	.size	__func__.10665, 31
-__func__.10665:
+	.type	__func__.10684, %object
+	.size	__func__.10684, 31
+__func__.10684:
 	.string	"queue_wait_first_req_completed"
-	.section	.rodata.__func__.10718,"a",@progbits
+	.section	.rodata.__func__.10737,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.10718, %object
-	.size	__func__.10718, 15
-__func__.10718:
+	.set	.LANCHOR171,. + 0
+	.type	__func__.10737, %object
+	.size	__func__.10737, 15
+__func__.10737:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10745,"a",@progbits
+	.section	.rodata.__func__.10764,"a",@progbits
 	.align	3
 	.set	.LANCHOR166,. + 0
-	.type	__func__.10745, %object
-	.size	__func__.10745, 15
-__func__.10745:
+	.type	__func__.10764, %object
+	.size	__func__.10764, 15
+__func__.10764:
 	.string	"sblk_read_page"
-	.section	.rodata.__func__.10784,"a",@progbits
+	.section	.rodata.__func__.10803,"a",@progbits
 	.align	3
 	.set	.LANCHOR197,. + 0
-	.type	__func__.10784, %object
-	.size	__func__.10784, 16
-__func__.10784:
+	.type	__func__.10803, %object
+	.size	__func__.10803, 16
+__func__.10803:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10798,"a",@progbits
+	.section	.rodata.__func__.10817,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.10798, %object
-	.size	__func__.10798, 13
-__func__.10798:
+	.type	__func__.10817, %object
+	.size	__func__.10817, 13
+__func__.10817:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10818,"a",@progbits
+	.section	.rodata.__func__.10837,"a",@progbits
 	.align	3
 	.set	.LANCHOR199,. + 0
-	.type	__func__.10818, %object
-	.size	__func__.10818, 6
-__func__.10818:
+	.type	__func__.10837, %object
+	.size	__func__.10837, 6
+__func__.10837:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10834,"a",@progbits
+	.section	.rodata.__func__.10853,"a",@progbits
 	.align	3
 	.set	.LANCHOR129,. + 0
-	.type	__func__.10834, %object
-	.size	__func__.10834, 17
-__func__.10834:
+	.type	__func__.10853, %object
+	.size	__func__.10853, 17
+__func__.10853:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10844,"a",@progbits
+	.section	.rodata.__func__.10863,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.10844, %object
-	.size	__func__.10844, 14
-__func__.10844:
+	.set	.LANCHOR188,. + 0
+	.type	__func__.10863, %object
+	.size	__func__.10863, 14
+__func__.10863:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10862,"a",@progbits
+	.section	.rodata.__func__.10881,"a",@progbits
 	.align	3
 	.set	.LANCHOR132,. + 0
-	.type	__func__.10862, %object
-	.size	__func__.10862, 21
-__func__.10862:
+	.type	__func__.10881, %object
+	.size	__func__.10881, 21
+__func__.10881:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8511,"a",@progbits
+	.section	.rodata.__func__.8530,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.8511, %object
-	.size	__func__.8511, 19
-__func__.8511:
+	.type	__func__.8530, %object
+	.size	__func__.8530, 19
+__func__.8530:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8540,"a",@progbits
+	.section	.rodata.__func__.8559,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.8540, %object
-	.size	__func__.8540, 19
-__func__.8540:
+	.set	.LANCHOR173,. + 0
+	.type	__func__.8559, %object
+	.size	__func__.8559, 19
+__func__.8559:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8555,"a",@progbits
+	.section	.rodata.__func__.8574,"a",@progbits
 	.align	3
 	.set	.LANCHOR37,. + 0
-	.type	__func__.8555, %object
-	.size	__func__.8555, 26
-__func__.8555:
+	.type	__func__.8574, %object
+	.size	__func__.8574, 26
+__func__.8574:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8566,"a",@progbits
+	.section	.rodata.__func__.8585,"a",@progbits
 	.align	3
 	.set	.LANCHOR39,. + 0
-	.type	__func__.8566, %object
-	.size	__func__.8566, 21
-__func__.8566:
+	.type	__func__.8585, %object
+	.size	__func__.8585, 21
+__func__.8585:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8580,"a",@progbits
+	.section	.rodata.__func__.8599,"a",@progbits
 	.align	3
 	.set	.LANCHOR28,. + 0
-	.type	__func__.8580, %object
-	.size	__func__.8580, 28
-__func__.8580:
+	.type	__func__.8599, %object
+	.size	__func__.8599, 28
+__func__.8599:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8604,"a",@progbits
+	.section	.rodata.__func__.8623,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.8604, %object
-	.size	__func__.8604, 26
-__func__.8604:
+	.set	.LANCHOR169,. + 0
+	.type	__func__.8623, %object
+	.size	__func__.8623, 26
+__func__.8623:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8622,"a",@progbits
+	.section	.rodata.__func__.8641,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.8622, %object
-	.size	__func__.8622, 22
-__func__.8622:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.8641, %object
+	.size	__func__.8641, 22
+__func__.8641:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8633,"a",@progbits
+	.section	.rodata.__func__.8652,"a",@progbits
 	.align	3
 	.set	.LANCHOR36,. + 0
-	.type	__func__.8633, %object
-	.size	__func__.8633, 22
-__func__.8633:
+	.type	__func__.8652, %object
+	.size	__func__.8652, 22
+__func__.8652:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8646,"a",@progbits
+	.section	.rodata.__func__.8665,"a",@progbits
 	.align	3
 	.set	.LANCHOR162,. + 0
-	.type	__func__.8646, %object
-	.size	__func__.8646, 31
-__func__.8646:
+	.type	__func__.8665, %object
+	.size	__func__.8665, 31
+__func__.8665:
 	.string	"flash_complete_plane_page_read"
-	.section	.rodata.__func__.8658,"a",@progbits
+	.section	.rodata.__func__.8677,"a",@progbits
 	.align	3
 	.set	.LANCHOR40,. + 0
-	.type	__func__.8658, %object
-	.size	__func__.8658, 23
-__func__.8658:
+	.type	__func__.8677, %object
+	.size	__func__.8677, 23
+__func__.8677:
 	.string	"flash_start_plane_read"
-	.section	.rodata.__func__.8671,"a",@progbits
+	.section	.rodata.__func__.8690,"a",@progbits
 	.align	3
 	.set	.LANCHOR163,. + 0
-	.type	__func__.8671, %object
-	.size	__func__.8671, 25
-__func__.8671:
+	.type	__func__.8690, %object
+	.size	__func__.8690, 25
+__func__.8690:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.8982,"a",@progbits
+	.section	.rodata.__func__.9001,"a",@progbits
 	.align	3
 	.set	.LANCHOR134,. + 0
-	.type	__func__.8982, %object
-	.size	__func__.8982, 20
-__func__.8982:
+	.type	__func__.9001, %object
+	.size	__func__.9001, 20
+__func__.9001:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.8992,"a",@progbits
+	.section	.rodata.__func__.9011,"a",@progbits
 	.align	3
 	.set	.LANCHOR15,. + 0
-	.type	__func__.8992, %object
-	.size	__func__.8992, 22
-__func__.8992:
+	.type	__func__.9011, %object
+	.size	__func__.9011, 22
+__func__.9011:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.9036,"a",@progbits
+	.section	.rodata.__func__.9055,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.9036, %object
-	.size	__func__.9036, 16
-__func__.9036:
+	.set	.LANCHOR192,. + 0
+	.type	__func__.9055, %object
+	.size	__func__.9055, 16
+__func__.9055:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9059,"a",@progbits
+	.section	.rodata.__func__.9078,"a",@progbits
 	.align	3
 	.set	.LANCHOR144,. + 0
-	.type	__func__.9059, %object
-	.size	__func__.9059, 11
-__func__.9059:
+	.type	__func__.9078, %object
+	.size	__func__.9078, 11
+__func__.9078:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9219,"a",@progbits
+	.section	.rodata.__func__.9238,"a",@progbits
 	.align	3
 	.set	.LANCHOR52,. + 0
-	.type	__func__.9219, %object
-	.size	__func__.9219, 13
-__func__.9219:
+	.type	__func__.9238, %object
+	.size	__func__.9238, 13
+__func__.9238:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9232,"a",@progbits
+	.section	.rodata.__func__.9251,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9232, %object
-	.size	__func__.9232, 10
-__func__.9232:
+	.type	__func__.9251, %object
+	.size	__func__.9251, 10
+__func__.9251:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9246,"a",@progbits
+	.section	.rodata.__func__.9265,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.9246, %object
-	.size	__func__.9246, 16
-__func__.9246:
+	.type	__func__.9265, %object
+	.size	__func__.9265, 16
+__func__.9265:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9258,"a",@progbits
+	.section	.rodata.__func__.9277,"a",@progbits
 	.align	3
 	.set	.LANCHOR157,. + 0
-	.type	__func__.9258, %object
-	.size	__func__.9258, 20
-__func__.9258:
+	.type	__func__.9277, %object
+	.size	__func__.9277, 20
+__func__.9277:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9269,"a",@progbits
+	.section	.rodata.__func__.9288,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9269, %object
-	.size	__func__.9269, 21
-__func__.9269:
-	.string	"flash_into_data_init"
-	.section	.rodata.__func__.9291,"a",@progbits
+	.type	__func__.9288, %object
+	.size	__func__.9288, 21
+__func__.9288:
+	.string	"flash_info_data_init"
+	.section	.rodata.__func__.9310,"a",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
-	.type	__func__.9291, %object
-	.size	__func__.9291, 17
-__func__.9291:
+	.set	.LANCHOR191,. + 0
+	.type	__func__.9310, %object
+	.size	__func__.9310, 17
+__func__.9310:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9367,"a",@progbits
+	.section	.rodata.__func__.9386,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.9367, %object
-	.size	__func__.9367, 17
-__func__.9367:
+	.type	__func__.9386, %object
+	.size	__func__.9386, 17
+__func__.9386:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9414,"a",@progbits
+	.section	.rodata.__func__.9433,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9414, %object
-	.size	__func__.9414, 17
-__func__.9414:
+	.type	__func__.9433, %object
+	.size	__func__.9433, 17
+__func__.9433:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9432,"a",@progbits
+	.section	.rodata.__func__.9451,"a",@progbits
 	.align	3
 	.set	.LANCHOR120,. + 0
-	.type	__func__.9432, %object
-	.size	__func__.9432, 14
-__func__.9432:
+	.type	__func__.9451, %object
+	.size	__func__.9451, 14
+__func__.9451:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9476,"a",@progbits
+	.section	.rodata.__func__.9495,"a",@progbits
 	.align	3
 	.set	.LANCHOR123,. + 0
-	.type	__func__.9476, %object
-	.size	__func__.9476, 18
-__func__.9476:
+	.type	__func__.9495, %object
+	.size	__func__.9495, 18
+__func__.9495:
 	.string	"zftl_add_read_buf"
-	.section	.rodata.__func__.9509,"a",@progbits
+	.section	.rodata.__func__.9528,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.9509, %object
-	.size	__func__.9509, 10
-__func__.9509:
+	.type	__func__.9528, %object
+	.size	__func__.9528, 10
+__func__.9528:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9540,"a",@progbits
+	.section	.rodata.__func__.9559,"a",@progbits
 	.align	3
 	.set	.LANCHOR217,. + 0
-	.type	__func__.9540, %object
-	.size	__func__.9540, 13
-__func__.9540:
+	.type	__func__.9559, %object
+	.size	__func__.9559, 13
+__func__.9559:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9659,"a",@progbits
+	.section	.rodata.__func__.9678,"a",@progbits
 	.align	3
 	.set	.LANCHOR60,. + 0
-	.type	__func__.9659, %object
-	.size	__func__.9659, 12
-__func__.9659:
+	.type	__func__.9678, %object
+	.size	__func__.9678, 12
+__func__.9678:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9680,"a",@progbits
+	.section	.rodata.__func__.9699,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.9680, %object
-	.size	__func__.9680, 21
-__func__.9680:
+	.type	__func__.9699, %object
+	.size	__func__.9699, 21
+__func__.9699:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9714,"a",@progbits
+	.section	.rodata.__func__.9733,"a",@progbits
 	.align	3
 	.set	.LANCHOR204,. + 0
-	.type	__func__.9714, %object
-	.size	__func__.9714, 22
-__func__.9714:
+	.type	__func__.9733, %object
+	.size	__func__.9733, 22
+__func__.9733:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9727,"a",@progbits
+	.section	.rodata.__func__.9746,"a",@progbits
 	.align	3
 	.set	.LANCHOR67,. + 0
-	.type	__func__.9727, %object
-	.size	__func__.9727, 19
-__func__.9727:
+	.type	__func__.9746, %object
+	.size	__func__.9746, 19
+__func__.9746:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9756,"a",@progbits
+	.section	.rodata.__func__.9775,"a",@progbits
 	.align	3
 	.set	.LANCHOR213,. + 0
-	.type	__func__.9756, %object
-	.size	__func__.9756, 16
-__func__.9756:
+	.type	__func__.9775, %object
+	.size	__func__.9775, 16
+__func__.9775:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9778,"a",@progbits
+	.section	.rodata.__func__.9797,"a",@progbits
 	.align	3
 	.set	.LANCHOR103,. + 0
-	.type	__func__.9778, %object
-	.size	__func__.9778, 16
-__func__.9778:
+	.type	__func__.9797, %object
+	.size	__func__.9797, 16
+__func__.9797:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9823,"a",@progbits
+	.section	.rodata.__func__.9842,"a",@progbits
 	.align	3
 	.set	.LANCHOR205,. + 0
-	.type	__func__.9823, %object
-	.size	__func__.9823, 16
-__func__.9823:
+	.type	__func__.9842, %object
+	.size	__func__.9842, 16
+__func__.9842:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9881,"a",@progbits
+	.section	.rodata.__func__.9900,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.9881, %object
-	.size	__func__.9881, 20
-__func__.9881:
+	.type	__func__.9900, %object
+	.size	__func__.9900, 20
+__func__.9900:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9948,"a",@progbits
+	.section	.rodata.__func__.9967,"a",@progbits
 	.align	3
 	.set	.LANCHOR215,. + 0
-	.type	__func__.9948, %object
-	.size	__func__.9948, 11
-__func__.9948:
+	.type	__func__.9967, %object
+	.size	__func__.9967, 11
+__func__.9967:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC150:
-	.string	"free_buf_count: %d\n"
 .LC151:
-	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
+	.string	"free_buf_count: %d\n"
 .LC152:
-	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
+	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
 .LC153:
-	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
 .LC154:
-	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC155:
-	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC156:
-	.string	"lpa:"
+	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
 .LC157:
-	.string	"vpn:"
+	.string	"lpa:"
 .LC158:
-	.string	"sblk:"
+	.string	"vpn:"
 .LC159:
-	.string	"lpa_hash:"
+	.string	"sblk:"
 .LC160:
+	.string	"lpa_hash:"
+.LC161:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -24983,32 +25043,32 @@ __func__.9948:
 	.string	"...%d @ %s %d %p\n"
 .LC116:
 	.string	"no sys info %x\n"
+	.section	.rodata.flash_info_data_init.str1.1,"aMS",@progbits,1
+.LC84:
+	.string	"...%d @ %s\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC145:
-	.string	"finfo:"
 .LC146:
-	.string	"flash_info_flush id = %x, page = %x\n"
+	.string	"finfo:"
 .LC147:
+	.string	"flash_info_flush id = %x, page = %x\n"
+.LC148:
 	.string	"sys_info_flush error:%x\n"
-	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
-.LC84:
-	.string	"...%d @ %s\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC120:
-	.string	"flash_prog_page %x %x %x\n"
 .LC121:
+	.string	"flash_prog_page %x %x %x\n"
+.LC122:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC126:
-	.string	"flash_prog_page_en:%x %x\n"
 .LC127:
-	.string	"spare"
+	.string	"flash_prog_page_en:%x %x\n"
 .LC128:
-	.string	"data"
+	.string	"spare"
 .LC129:
+	.string	"data"
+.LC130:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -25030,7 +25090,7 @@ __func__.9948:
 .LC67:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC134:
+.LC135:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
@@ -25038,70 +25098,70 @@ __func__.9948:
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC132:
-	.string	"%d %x @%d %x\n"
 .LC133:
+	.string	"%d %x @%d %x\n"
+.LC134:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC131:
+.LC132:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC135:
-	.string	"ftl_low_format %d\n"
 .LC136:
+	.string	"ftl_low_format %d\n"
+.LC137:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC138:
-	.string	"saved_active_page  = %x\n"
 .LC139:
-	.string	"saved_active_plane = %x\n"
+	.string	"saved_active_page  = %x\n"
 .LC140:
-	.string	"sblk = %x\n"
+	.string	"saved_active_plane = %x\n"
 .LC141:
-	.string	"phy_blk = %x %x\n"
+	.string	"sblk = %x\n"
 .LC142:
-	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"phy_blk = %x %x\n"
 .LC143:
+	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+.LC144:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC137:
+.LC138:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC193:
-	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
 .LC194:
-	.string	"ftl_sblk_dump = %x %x %x %x\n"
+	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
 .LC195:
-	.string	"page_addr = %x, lpa=%x vpn = %d\n"
+	.string	"ftl_sblk_dump = %x %x %x %x\n"
 .LC196:
-	.string	"index= %x, lpa=%x\n"
+	.string	"page_addr = %x, lpa=%x vpn = %d\n"
 .LC197:
+	.string	"index= %x, lpa=%x\n"
+.LC198:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC148:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC149:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC150:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC130:
+.LC131:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC204:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC205:
-	.string	"ftl_update_l2p_map"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC206:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map"
 .LC207:
+	.string	"lpa_tbl:"
+.LC208:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC208:
+.LC209:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -25112,20 +25172,20 @@ __func__.9948:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC201:
-	.string	"gc_lpa:"
 .LC202:
-	.string	"gc_ppa:"
+	.string	"gc_lpa:"
 .LC203:
+	.string	"gc_ppa:"
+.LC204:
 	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC209:
-	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC210:
-	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC211:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 .LC212:
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+.LC213:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -25136,16 +25196,16 @@ __func__.9948:
 .LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC171:
-	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC172:
-	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
 .LC173:
+	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+.LC174:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC191:
-	.string	"gc_scan_src_blk = %x, vpn = %d\n"
 .LC192:
+	.string	"gc_scan_src_blk = %x, vpn = %d\n"
+.LC193:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC47:
@@ -25172,13 +25232,13 @@ __func__.9948:
 .LC81:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC187:
-	.string	"gc_update_l2p_map_new sblk %x\n"
 .LC188:
-	.string	"gc_update_l2p_map_new: %x %x %x\n"
+	.string	"gc_update_l2p_map_new sblk %x\n"
 .LC189:
-	.string	"lpa: %x %x %x\n"
+	.string	"gc_update_l2p_map_new: %x %x %x\n"
 .LC190:
+	.string	"lpa: %x %x %x\n"
+.LC191:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC43:
@@ -25194,24 +25254,24 @@ __func__.9948:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC122:
-	.string	"1 write_idblock fix data %x %x %x\n"
 .LC123:
-	.string	"write_idblock check fail! %x\n"
+	.string	"1 write_idblock fix data %x %x %x\n"
 .LC124:
+	.string	"write_idblock check fail! %x\n"
+.LC125:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC162:
-	.string	"region_id = %d, pm_max_region = %d\n"
 .LC163:
-	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
+	.string	"region_id = %d, pm_max_region = %d\n"
 .LC164:
-	.string	"load_l2p_region = %x,%x,%x, %x\n"
+	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
 .LC165:
-	.string	"pm_ppa:"
+	.string	"load_l2p_region = %x,%x,%x, %x\n"
 .LC166:
-	.string	"data:"
+	.string	"pm_ppa:"
 .LC167:
+	.string	"data:"
+.LC168:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
@@ -25316,18 +25376,18 @@ __func__.9948:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC168:
-	.string	"pm_init posr %x %x %x\n"
 .LC169:
+	.string	"pm_init posr %x %x %x\n"
+.LC170:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC170:
+.LC171:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC161:
+.LC162:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC144:
+.LC145:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -25352,7 +25412,9 @@ __func__.9948:
 .LC118:
 	.string	"read: %x %x %x %x\n"
 .LC119:
-	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
+	.string	"0set buf %d,status = %x, ppa = %x lun state = %d\n"
+.LC120:
+	.string	"1set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
 	.set	.LANCHOR48,. + 0
@@ -25488,7 +25550,7 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC186:
+.LC187:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC88:
@@ -25503,7 +25565,7 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC125:
+.LC126:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -26101,16 +26163,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC218:
+.LC219:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC213:
-	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC214:
-	.string	"gc %d: %d %d %d %d %d %d\n"
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC215:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"gc %d: %d %d %d %d %d %d\n"
 .LC216:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC217:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -26123,41 +26185,41 @@ toshiba_ref_value:
 .LC52:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC174:
-	.string	"FTL version: 6.0.9 20180704"
 .LC175:
-	.string	"_c_user_data_density := %d\n"
+	.string	"FTL version: 6.0.11 20180718"
 .LC176:
-	.string	"_c_totle_phy_density := %d\n"
+	.string	"_c_user_data_density := %d\n"
 .LC177:
-	.string	"_c_totle_log_page := %d\n"
+	.string	"_c_totle_phy_density := %d\n"
 .LC178:
-	.string	"_c_totle_data_density := %d\n"
+	.string	"_c_totle_log_page := %d\n"
 .LC179:
-	.string	"_c_ftl_pm_page_num := %d\n"
+	.string	"_c_totle_data_density := %d\n"
 .LC180:
-	.string	"_c_ftl_byte_pre_page := %d\n"
+	.string	"_c_ftl_pm_page_num := %d\n"
 .LC181:
-	.string	"_c_max_pm_sblk := %d\n"
+	.string	"_c_ftl_byte_pre_page := %d\n"
 .LC182:
-	.string	"_min_slc_super_block := %d\n"
+	.string	"_c_max_pm_sblk := %d\n"
 .LC183:
-	.string	"_max_xlc_super_block := %d\n"
+	.string	"_min_slc_super_block := %d\n"
 .LC184:
-	.string	"gp_ftl_ext_info %p %p %p\n"
+	.string	"_max_xlc_super_block := %d\n"
 .LC185:
+	.string	"gp_ftl_ext_info %p %p %p\n"
+.LC186:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC198:
-	.string	"ftl_read %x %x %x\n"
 .LC199:
-	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+	.string	"ftl_read %x %x %x\n"
 .LC200:
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+.LC201:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC217:
+.LC218:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 30b27f610be3151991b138e2b3e5df5c6be07c03
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 11:06:09 2018 +0800

    rockchip: rk3399: do arch_cpu_init() not only when SPL
    
    Change-Id: I604bbdcfa65962e506550e6abe43bff0a189da87
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 27697a8e44..377b639309 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -67,17 +67,22 @@ void rockchip_stimer_init(void)
 	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
 	printf("%s\n", __func__);
 }
+#endif
 
 #define GRF_BASE	0xff770000
 #define PMUGRF_BASE	0xff320000
 #define PMUSGRF_BASE	0xff330000
+
 int arch_cpu_init(void)
 {
-	struct rk3399_pmusgrf_regs *sgrf = (void *)PMUSGRF_BASE;
 	struct rk3399_pmugrf_regs *pmugrf = (void *)PMUGRF_BASE;
 	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
 	/* We do some SoC one time setting here. */
+
+#ifdef CONFIG_SPL_BUILD
+	struct rk3399_pmusgrf_regs *sgrf = (void *)PMUSGRF_BASE;
+
 	/*
 	 * Disable DDR and SRAM security regions.
 	 *
@@ -89,8 +94,9 @@ int arch_cpu_init(void)
 	 */
 	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
 	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
+#endif
 
-	/*  eMMC clock generator: disable the clock multipilier */
+	/* eMMC clock generator: disable the clock multipilier */
 	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
 
 	/* PWM3 select pwm3a io */
@@ -98,7 +104,6 @@ int arch_cpu_init(void)
 
 	return 0;
 }
-#endif
 
 void board_debug_uart_init(void)
 {

commit b8f8ff5155676d8465112278a1e7d81e32bc4173
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 10:57:56 2018 +0800

    rockchip: rk322x: add RKIMG_DET_BOOTDEV
    
    Change-Id: I92512be99439f926fa86df956e23eae6bce94109
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 0e5ab51c0e..5efc3aaf88 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -57,6 +57,7 @@
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 #endif
 

commit 65cb013dff64660b51138b52bd6d5c35271587e4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 17 10:57:09 2018 +0800

    rockchip: rk322x: arch_cpu_init: initial SGRF in SPL
    
    Change-Id: Ica512e2a3ca671b989a67b5302d21b701b7747dd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 8b80a9ebaa..252fdae86b 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -16,14 +16,16 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
 	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
 };
-#ifdef CONFIG_SPL_BUILD
+
 int arch_cpu_init(void)
 {
 	static struct rk322x_grf * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 
+#ifdef CONFIG_SPL_BUILD
 	/* Disable the ddr secure region setting to make it non-secure */
 	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+#endif
 
 	/* PWMs select rkpwm clock source */
 	rk_setreg(&grf->soc_con[2], 1 << 0);
@@ -47,7 +49,6 @@ int arch_cpu_init(void)
 
 	return 0;
 }
-#endif
 
 void board_debug_uart_init(void)
 {

commit d54bc4cb37da9facc7fbacb0a8fefcf14065347a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 20:34:35 2018 +0800

    rockchip: rk322x: fix GPIO1B2_UART21_SIN definition mistake
    
    Change-Id: I0458b9a8242fa5f543c7426a9c8b262b468c4231
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index b38a308500..8b80a9ebaa 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -56,7 +56,7 @@ void board_debug_uart_init(void)
 		GPIO1B2_SHIFT		= 4,
 		GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
 		GPIO1B2_GPIO		= 0,
-		GPIO1B2_UART21_SIN,
+		GPIO1B2_UART21_SIN	= 2,
 
 		GPIO1B1_SHIFT		= 2,
 		GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,

commit 9bfe736ccbce2f00e6f33f24a731c19edec4545d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 17:33:31 2018 +0800

    rockchip: rk322x: enable vidconsole
    
    Change-Id: I6ab5fd0232ed61578f958b2371ebef87caa10c5b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index 7f2d2fe1e5..f9868d8aea 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -9,6 +9,9 @@
 
 #include <configs/rk322x_common.h>
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
 
 /* Store env in emmc */
 #define CONFIG_SYS_MMC_ENV_DEV          0
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index 2847bdda16..b8f3e94f84 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -64,6 +64,7 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_CMDLINE_TAG
 
+#define ROCKCHIP_DEVICE_SETTINGS
 #endif
 
 #endif
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 28263e1895..0e5ab51c0e 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -56,6 +56,7 @@
 	"fdt_high=0x7fffffff\0" \
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 #endif
 

commit 51117ff49b12af12c6579ae15c5744be0fb70eec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 17:30:35 2018 +0800

    rockchip: rk3328: enable vidconsole
    
    Change-Id: I5eebb1e10fe2fac7c3e0cec1884cd1c121fa9587
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index 2f16ddbed5..9e4e19e595 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -9,6 +9,10 @@
 
 #include <configs/rk3328_common.h>
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #define CONFIG_SYS_MMC_ENV_DEV 1
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 03b6ce4955..537bdea9c9 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -65,6 +65,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	RKIMG_DET_BOOTDEV \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit e5bc49ba7a0b72d7060b84f990495734342afdcf
Author: Tang Yun ping <typ@rock-chips.com>
Date:   Fri Jun 8 17:30:25 2018 +0800

    rockchip: sdram_common: fix DDR4 cap calculate
    
    For DDR4 memory size we also need to get bank group by die bw,
    8bit DDR4 have 4 bank group, 16bit DDR4 have 2 bank group.
    
    Change-Id: Icea47a01ff6ceec838a91d0bf4152e4b8427a6ac
    Signed-off-by: Tang Yun ping <typ@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 546eb768c5..16e5c4eb28 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -98,11 +98,14 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	size_t size_mb = 0;
 	u32 ch;
 	u32 cs1_col = 0;
+	u32 bg = 0;
+	u32 dbw, dram_type;
 	u32 sys_reg = readl(reg);
 	u32 sys_reg1 = readl(reg + 4);
 	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
 		       & SYS_REG_NUM_CH_MASK);
 
+	dram_type = (sys_reg >> SYS_REG_DDRTYPE_SHIFT) & SYS_REG_DDRTYPE_MASK;
 	debug("%s %x %x\n", __func__, (u32)reg, sys_reg);
 	for (ch = 0; ch < ch_num; ch++) {
 		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
@@ -149,8 +152,12 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 			SYS_REG_BW_MASK));
 		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
 			SYS_REG_ROW_3_4_MASK;
-
-		chipsize_mb = (1 << (cs0_row + cs0_col + bk + bw - 20));
+		if (dram_type == DDR4) {
+			dbw = (sys_reg >> SYS_REG_DBW_SHIFT(ch)) &
+				SYS_REG_DBW_MASK;
+			bg = (dbw == 2) ? 2 : 1;
+		}
+		chipsize_mb = (1 << (cs0_row + cs0_col + bk + bg + bw - 20));
 
 		if (rank > 1)
 			chipsize_mb += chipsize_mb >> ((cs0_row - cs1_row) +

commit 2bbf1028632be4d484e0015dd383e14968ca2dc0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jul 13 08:52:58 2018 +0800

    cmd: mmc: do not force init HW in 'mmc dev' cmd
    
    This is a revert to :
    a5710920b7 cmd_mmc: make mmc dev always re-probe the HW
    
    For emmc device, we should not re-init the HW with 'mmc dev' cmd,
    please use 'mmc rescan' when need HW re-init.
    
    Change-Id: I994d12beb7215db568e7a0ed58be3e36dfda5744
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 74b379ebf3..18008fd1c7 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -568,7 +568,7 @@ static int do_mmc_dev(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_USAGE;
 	}
 
-	mmc = init_mmc_device(dev, true);
+	mmc = init_mmc_device(dev, false);
 	if (!mmc)
 		return CMD_RET_FAILURE;
 

commit 3d460b4c2035b520b09499abdcd6daef7f88a573
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jul 9 10:16:40 2018 +0800

    rockchip: rk3308: switch VCCIO3 voltage controlled by io_vsel3
    
    According to the description of GRF_SON_CON0, the voltage of
    VCCIO3(which is the concern of emmc/flash/sfc controller) will
    indicate by GPIO0_A4 or io_vsel3. The SOC defaults use GPIO0_A4
    to indicate power supply voltage for VCCIO3 by hardware, then
    we can switch to io_vsel3 after system power on, and release
    GPIO0_A4 for other usage.
    
    Change-Id: Ia18617ef765b8ff019748acd30ece0ca8cd51045
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 384ef42f90..586c4efcf2 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch/hardware.h>
+#include <asm/gpio.h>
 #include <debug_uart.h>
 
 #ifdef CONFIG_ARM64
@@ -73,6 +74,53 @@ enum {
 	UART2_IO_SEL_USB,
 };
 
+enum {
+	IOVSEL3_CTRL_SHIFT	= 8,
+	IOVSEL3_CTRL_MASK	= BIT(8),
+	VCCIO3_SEL_BY_GPIO	= 0,
+	VCCIO3_SEL_BY_IOVSEL3,
+
+	IOVSEL3_SHIFT		= 3,
+	IOVSEL3_MASK		= BIT(3),
+	VCCIO3_3V3		= 0,
+	VCCIO3_1V8,
+};
+
+/*
+ * The voltage of VCCIO3(which is the voltage domain of emmc/flash/sfc
+ * interface) can indicated by GPIO0_A4 or io_vsel3. The SOC defaults
+ * use GPIO0_A4 to indicate power supply voltage for VCCIO3 by hardware,
+ * then we can switch to io_vsel3 after system power on, and release GPIO0_A4
+ * for other usage.
+ */
+
+#define GPIO0_A4	4
+
+int rk_board_init(void)
+{
+	static struct rk3308_grf * const grf = (void *)GRF_BASE;
+	u32 val;
+	int ret;
+
+	ret = gpio_request(GPIO0_A4, "gpio0_a4");
+	if (ret < 0) {
+		debug("request for gpio0_a4 failed:%d\n", ret);
+		return ret;
+	}
+
+	gpio_direction_input(GPIO0_A4);
+
+	if (gpio_get_value(GPIO0_A4))
+		val = VCCIO3_SEL_BY_IOVSEL3 << IOVSEL3_CTRL_SHIFT |
+		      VCCIO3_1V8 << IOVSEL3_SHIFT;
+	else
+		val = VCCIO3_SEL_BY_IOVSEL3 << IOVSEL3_CTRL_SHIFT |
+		      VCCIO3_3V3 << IOVSEL3_SHIFT;
+	rk_clrsetreg(&grf->soc_con0, IOVSEL3_CTRL_MASK | IOVSEL3_MASK, val);
+
+	return 0;
+}
+
 void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;

commit 5c6b26af2020c0a8a8acccc17e571b690ae0ce6f
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jul 18 16:08:03 2018 +0800

    rockchip: rkflash: fix compile error
    
    Change-Id: Ic545fda80852fd35f513b35f0aadbbf63b489546
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index 19d980597a..6330c86e93 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -4,16 +4,16 @@
 # SPDX-License-Identifier:	GPL-2.0
 #
 
-obj-$(CONFIG_RKNANDC_NAND) += rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
-obj-$(CONFIG_RKSFC_NAND) += rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
+obj-$(CONFIG_RKNANDC_NAND) += rksftl.o rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
+obj-$(CONFIG_RKSFC_NAND) += rksftl.o rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
 obj-$(CONFIG_RKSFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_api.o rkflash_debug.o sfc_nor.o sfc.o
 
 ifneq (, $(CONFIG_RKNANDC_NAND)$(CONFIG_RKSFC_NAND))
 
 ifdef CONFIG_ARM64
-obj-y += rk_sftl_arm_v8.o
+rksftl-y += rk_sftl_arm_v8.o
 else
-obj-y += rk_sftl_arm_v7.o
+rksftl-y += rk_sftl_arm_v7.o
 endif
 
 endif

commit ab83a6fe5812f67d3b3e398bb083b48c0b4c5fad
Author: CanYang He <hcy@rock-chips.com>
Date:   Thu Jul 5 10:09:38 2018 +0800

    debug_uart: add a printdec() to print decimalism result
    
    some value use decimalism to print is more readable for user, for
    example: frequency, capacity
    
    Change-Id: I9fa2a68d30c7694a582167d2d8767e18e28a9e83
    Signed-off-by: CanYang He <hcy@rock-chips.com>

diff --git a/include/debug_uart.h b/include/debug_uart.h
index 6f0b0c5e15..5aefafd601 100644
--- a/include/debug_uart.h
+++ b/include/debug_uart.h
@@ -105,6 +105,13 @@ void printhex4(uint value);
  */
 void printhex8(uint value);
 
+/**
+ * printdec() - Output a decimalism value
+ *
+ * @value:	Value to output
+ */
+void printdec(uint value);
+
 #ifdef CONFIG_DEBUG_UART_ANNOUNCE
 #define _DEBUG_UART_ANNOUNCE	printascii("<debug_uart> ");
 #else
@@ -171,6 +178,18 @@ void printhex8(uint value);
 	{ \
 		printhex(value, 8); \
 	} \
+\
+	void printdec(uint value) \
+	{ \
+		if (value > 10) { \
+			printdec(value / 10); \
+			value %= 10; \
+		} else if (value == 10) { \
+			_debug_uart_putc('1'); \
+			value = 0; \
+		} \
+		_debug_uart_putc('0' + value); \
+	} \
 \
 	void debug_uart_init(void) \
 	{ \

commit cc527546d340ae2a76d0a423b55e03ffa226a185
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 5 10:20:57 2018 +0800

    androidboot: nodify cmd bootavb
    
    1.printf necessary information
    2.delete useless function: do_avb_write,
        do_avb_write_ab_metada
    
    Change-Id: I5f932e7774ecf9b383358b3c081369cdc7db0167
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
old mode 100644
new mode 100755
index 4e775cea3b..e815ec4762
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -161,6 +161,7 @@ int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Initialize ab data to misc partition success.\n");
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -202,6 +203,7 @@ int do_avb_ab_mark_slot_active(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Mark slot %d active successfully.\n", slot_number);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -229,6 +231,7 @@ int do_avb_ab_mark_slot_unbootable(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Mark slot %d unbootable successfully.\n", slot_number);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -285,7 +288,7 @@ int do_avb_read_rollback_index(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	printf("out_rollback_index = %llx\n", out_rollback_index);
+	printf("\nout_rollback_index = %llx\n", out_rollback_index);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -317,6 +320,7 @@ int do_avb_write_rollback_index(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("\nWrite  rollback index successfully.\n");
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -343,7 +347,8 @@ int do_avb_read_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	printf("out_is_unlocked = %d\n", out_is_unlocked);
+	printf("\n The device is %s\n",
+		out_is_unlocked ? "UNLOCKED" : "LOCKED");
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -398,12 +403,13 @@ int do_avb_get_size_of_partition(cmd_tbl_t *cmdtp, int flag,
 
 	if (ops->get_size_of_partition(ops, requested_partitions,
 				       &out_size_in_bytes) != 0) {
-		printf("do_avb_get_size_of_partition error!\n");
+		printf("Can not get %s partition size!\n", requested_partitions);
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
-	printf("partition size = %lld\n", out_size_in_bytes);
+	printf("%s partition size = 0x%llx\n", requested_partitions,
+	       out_size_in_bytes);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -429,12 +435,13 @@ int do_avb_get_get_unique_guid_for_partition(cmd_tbl_t *cmdtp, int flag,
 
 	if (ops->get_unique_guid_for_partition(ops, requested_partitions,
 					       guid_buf, guid_buf_size) != 0) {
-		printf("do_avb_get_get_unique_guid_for_partition error!\n");
+		printf("Can not get %s partition UUID!\n",
+		       requested_partitions);
 		avb_ops_user_free(ops);
 		return CMD_RET_FAILURE;
 	}
 
-	printf("guid = %s\n", guid_buf);
+	printf("%s partition UUID is %s\n", requested_partitions, guid_buf);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -475,47 +482,10 @@ int do_avb_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		return CMD_RET_FAILURE;
 	}
 
-	for (i = 0; i < 512 * blkcnt; i++)
-		printf("buffer %d = %d\n", i, buffer[i]);
-
-	free(buffer);
-	avb_ops_user_free(ops);
-
-	return CMD_RET_SUCCESS;
-}
-
-int do_avb_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	AvbOps *ops;
-	char *requested_partitions;
-	int64_t offset_blk;
-	size_t blkcnt;
-	size_t out_num_read;
-	char *buffer;
-
-	if (argc != 4)
-		return CMD_RET_USAGE;
-
-	requested_partitions = argv[1];
-	offset_blk = simple_strtoul(argv[2], NULL, 16);
-	blkcnt = simple_strtoul(argv[3], NULL, 16);
-	ops = avb_ops_user_new();
-	buffer = (char *)malloc(blkcnt * 512);
-	if (buffer == NULL) {
-		printf("malloc buffer failed!\n");
-		return CMD_RET_FAILURE;
-	}
-
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return CMD_RET_FAILURE;
-	}
-	if (ops->read_from_partition(ops, requested_partitions, offset_blk,
-				     blkcnt, buffer, &out_num_read) != 0) {
-		printf("do_avb_write error!\n");
-		free(buffer);
-		avb_ops_user_free(ops);
-		return CMD_RET_FAILURE;
+	for (i = 0; i < 512 * blkcnt; i++) {
+		printf("buffer %d = %x", i, buffer[i]);
+		if ((i + 1) % 4 == 0)
+			printf("\n");
 	}
 
 	free(buffer);
@@ -545,6 +515,18 @@ int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
+	printf("Slot A information:\n");
+	printf("slot A: priority = %d, tries_remaining = %d,\
+	       successful_boot = %d\n",
+	       ab_data.slots[0].priority,
+	       ab_data.slots[0].tries_remaining,
+	       ab_data.slots[0].successful_boot);
+	printf("Slot B information:\n");
+	printf("slot B: priority = %d, tries_remaining = %d,\
+	       successful_boot = %d\n",
+	       ab_data.slots[1].priority,
+	       ab_data.slots[1].tries_remaining,
+	       ab_data.slots[1].successful_boot);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -846,9 +828,7 @@ static cmd_tbl_t cmd_avb[] = {
 	U_BOOT_CMD_MKENT(part_guid, 2, 1,
 			 do_avb_get_get_unique_guid_for_partition, "", ""),
 	U_BOOT_CMD_MKENT(read, 4, 1, do_avb_read, "", ""),
-	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
 	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
-	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(perm_attr_test, 1, 1, do_perm_attr_test, "", ""),
 	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
 	U_BOOT_CMD_MKENT(flow, 2, 1, do_avb_flow, "", "")
@@ -883,15 +863,13 @@ U_BOOT_CMD(
 	"bootavb slot_unbootable cnt\n"
 	"bootavb slot_successful cnt\n"
 	"bootavb read_rollback rollback_index_location\n"
-	"bootavb write_rollback rollback_index_location out_rollback_index\n"
+	"bootavb write_rollback rollback_index_location rollback_index\n"
 	"bootavb read_lock_status\n"
 	"bootavb write_lock_status 0 or 1\n"
 	"bootavb part_size partitions_name\n"
 	"bootavb part_guid partitions_name\n"
 	"bootavb read partition offset_blk cnt\n"
-	"bootavb write partition offset_blk cnt\n"
 	"bootavb readabmisc\n"
-	"bootavb writeabmisc\n"
 	"bootavb perm_attr_test\n"
 	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
 	"bootavb flow v/n\n"

commit d34064effa44cb69bf87cba77adaee72f4185d35
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jul 4 11:18:11 2018 +0800

    android: get dev_desc by rockchip_get_bootdev()
    
    Get dev_desc by call rockchip_get_bootdev() but not
    default mmc 0.
    
    Change-Id: I78c6760eb6410a14a9f767db2f90902ec97f432f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a92b31d327..090da46998 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -211,7 +211,6 @@ static int android_bootloader_boot_bootloader(void)
 static int android_bootloader_get_fdt(const char *part_name,
 		const char *load_file_name)
 {
-	const char *dev_iface = "mmc";
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	char *fdt_addr = NULL;
@@ -222,12 +221,11 @@ static int android_bootloader_get_fdt(const char *part_name,
 	loff_t len_read;
 	unsigned long addr = 0;
 	int part_num = -1;
-	int dev_num = 0;
 	int ret;
 
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
 
@@ -251,7 +249,7 @@ static int android_bootloader_get_fdt(const char *part_name,
 #endif
 
 	snprintf(dev_part, ARRAY_SIZE(dev_part), ":%x", part_num);
-	if (fs_set_blk_dev(dev_iface, dev_part, FS_TYPE_EXT))
+	if (fs_set_blk_dev_with_part(dev_desc, part_num))
 		return -1;
 
 	fdt_addr = env_get("fdt_addr_r");
@@ -620,14 +618,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	int ret;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
 	/* Load the kernel from the desired "boot" partition. */
@@ -646,14 +642,12 @@ int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
 
 int android_boot_flow(unsigned long kernel_address)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t boot_part_info;
 	int ret;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: dev_desc is NULL!\n", __func__);
 		return -1;
 	}
 	/* Load the kernel from the desired "boot" partition. */

commit 65413a00f94435b88ee3f5b4afd5619f74e5a2a5
Author: Jian Qiu <qiujian@rock-chips.com>
Date:   Thu Jul 5 09:09:55 2018 +0800

    fastboot: add FASTBOOT_OEM_UNLOCK option
    
    This enables the following fastboot commands:
      fastboot oem unlock
      fastboot oem unlock_accept
      fastboot oem lock
      fastboot getvar oem-unlock
    
    Android 8.1 need the oem unlock status attach to bootargs on boot.
    
    Change-Id: Icc83451336a4dea2cbcf4927287de23bc8e28cb1
    Signed-off-by: Jian Qiu <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index fd104f4874..c13e0dcab0 100755
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -41,7 +41,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		load_attestation_key(dev_desc, &misc_part_info);
 #endif
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 	/* read oem unlock status and attach to bootargs */
 	uint8_t unlock = 0;
 	TEEC_Result result;
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index 453cc49057..14a1effd61 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -82,6 +82,15 @@ config FASTBOOT_FLASH_MMC_DEV
 	  regarding the non-volatile storage device. Define this to
 	  the eMMC device that fastboot should use to store the image.
 
+config FASTBOOT_OEM_UNLOCK
+	bool "Enable FASTBOOT OEM UNLOCK command"
+	depends on OPTEE_CLIENT
+	help
+	  This enables the command "fastboot oem unlock" the fastboot
+	  oem unlock command requires tee security storage to store
+	  unlock status. oem unlock status attach to bootargs on boot.
+
+
 endif # USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 
 endif # FASTBOOT
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 97d01a7b00..a92b31d327 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -582,7 +582,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
 	env_set("android_slotsufix", slot_suffix);
 
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 	/* read oem unlock status and attach to bootargs */
 	uint8_t unlock = 0;
 	TEEC_Result result;
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b6edd661e9..502d936088 100755
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -688,7 +688,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			strncat(response, part_size_str, chars_left);
 		}
 	} else if (!strncmp("oem-unlock", cmd, 10)) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1182,7 +1182,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else
 #endif
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1214,7 +1214,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (strncmp("unlock_accept", cmd + 4, 13) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1271,7 +1271,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (strncmp("lock", cmd + 4, 8) == 0) {
-#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_FASTBOOT_OEM_UNLOCK
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
 		return;

commit f6d4196e0f044cdb0f22ef8c7d3a989143d7ad32
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jun 28 10:18:51 2018 +0800

    rockchip: px30: enable tpl and spl support
    
    Because px30 sram size is small, so need define CONFIG_TPL_TINY_FRAMEWORK
    to reduce TPL size when build TPL firmware.
    
    Change-Id: I5c190946314725e325e14599707a2be5b2e4ec22
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fa8efc7f16..bd09ce3917 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -5,6 +5,15 @@ config ROCKCHIP_PX30
 	select ARM64
 	select GICV2
 	select ARM_SMCCC
+	select SUPPORT_SPL
+	select SUPPORT_TPL
+	select SPL
+	select TPL
+	select TPL_TINY_FRAMEWORK if TPL
+
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
+	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -13,6 +22,15 @@ config ROCKCHIP_PX30
 
 if ROCKCHIP_PX30
 
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+	default 0xff0e1000
+
+config TPL_MAX_SIZE
+	default 10240
+
 config ROCKCHIP_RK3326
 	bool "Support Rockchip RK3326 "
 	help
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
old mode 100755
new mode 100644
index 1b9c740d50..ff21ecf5c4
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -1,8 +1,13 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
@@ -10,8 +15,13 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
@@ -27,11 +37,15 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_CMD_NET is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -53,6 +67,8 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
@@ -60,7 +76,6 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index bd6b65ad42..de933e1251 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -1,9 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
@@ -11,8 +16,13 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
@@ -28,11 +38,15 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -54,6 +68,8 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
@@ -61,7 +77,6 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
index feac2a1a08..956fb9f91d 100644
--- a/configs/rk3326_defconfig
+++ b/configs/rk3326_defconfig
@@ -1,9 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_PX30=y
 CONFIG_ROCKCHIP_RK3326=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
@@ -11,8 +16,13 @@ CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
@@ -28,11 +38,15 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -54,6 +68,8 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
@@ -61,7 +77,6 @@ CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y

commit 846371a2e87c99e3a4c64d355b4d61b362735b5a
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jun 28 10:18:12 2018 +0800

    rockchip: px30: spl: fix spl compile error
    
    fix spl compile error about defined CONFIG_BOOTCOMMAND.
    
    Change-Id: I0a16e50f2f0ea8c283aa43ed78c7264e910ed4a8
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index ae92c55fdb..1717f2d1bc 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -19,7 +19,9 @@
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 #define CONFIG_SUPPORT_EMMC_RPMB
 
+#ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif

commit 4d65b3b35255b58bc0afc611e662a554b09dbaba
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jun 28 10:17:30 2018 +0800

    rockchip: px30: spl: change CONFIG_SPL_MAX_SIZE to 0x20000
    
    px30 spl size over 0x10000,so set CONFIG_SPL_MAX_SIZE to 0x20000.
    
    Change-Id: I3e9bea5ccb7d4516ecc4881eb2d454e1afdcabb0
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 9b93951315..a948c5df24 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -22,7 +22,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x10000
+#define CONFIG_SPL_MAX_SIZE		0x20000
 #define CONFIG_SPL_BSS_START_ADDR	0x2000000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */

commit 1881cdb1bc0debc2d5c5e1f752bc5bca78ae8fc0
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 09:14:32 2018 +0800

    drivers: ram: rockchip: add px30 sdram init code
    
    Change-Id: Ia7496d062d3041e22f26cb9ee91e72f6f463cde5
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
new file mode 100644
index 0000000000..6b20b8eed4
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_px30.h
@@ -0,0 +1,592 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ASM_ARCH_SDRAM_PX30_H
+#define _ASM_ARCH_SDRAM_PX30_H
+
+#define SR_IDLE				93
+#define PD_IDLE				13
+#define PATTERN				(0x5aa5f00f)
+
+/* ddr pctl registers define */
+#define DDR_PCTL2_MSTR			0x0
+#define DDR_PCTL2_STAT			0x4
+#define DDR_PCTL2_MSTR1			0x8
+#define DDR_PCTL2_MRCTRL0		0x10
+#define DDR_PCTL2_MRCTRL1		0x14
+#define DDR_PCTL2_MRSTAT		0x18
+#define DDR_PCTL2_MRCTRL2		0x1c
+#define DDR_PCTL2_DERATEEN		0x20
+#define DDR_PCTL2_DERATEINT		0x24
+#define DDR_PCTL2_PWRCTL		0x30
+#define DDR_PCTL2_PWRTMG		0x34
+#define DDR_PCTL2_HWLPCTL		0x38
+#define DDR_PCTL2_RFSHCTL0		0x50
+#define DDR_PCTL2_RFSHCTL1		0x54
+#define DDR_PCTL2_RFSHCTL2		0x58
+#define DDR_PCTL2_RFSHCTL4		0x5c
+#define DDR_PCTL2_RFSHCTL3		0x60
+#define DDR_PCTL2_RFSHTMG		0x64
+#define DDR_PCTL2_RFSHTMG1		0x68
+#define DDR_PCTL2_RFSHCTL5		0x6c
+#define DDR_PCTL2_INIT0			0xd0
+#define DDR_PCTL2_INIT1			0xd4
+#define DDR_PCTL2_INIT2			0xd8
+#define DDR_PCTL2_INIT3			0xdc
+#define DDR_PCTL2_INIT4			0xe0
+#define DDR_PCTL2_INIT5			0xe4
+#define DDR_PCTL2_INIT6			0xe8
+#define DDR_PCTL2_INIT7			0xec
+#define DDR_PCTL2_DIMMCTL		0xf0
+#define DDR_PCTL2_RANKCTL		0xf4
+#define DDR_PCTL2_CHCTL			0xfc
+#define DDR_PCTL2_DRAMTMG0		0x100
+#define DDR_PCTL2_DRAMTMG1		0x104
+#define DDR_PCTL2_DRAMTMG2		0x108
+#define DDR_PCTL2_DRAMTMG3		0x10c
+#define DDR_PCTL2_DRAMTMG4		0x110
+#define DDR_PCTL2_DRAMTMG5		0x114
+#define DDR_PCTL2_DRAMTMG6		0x118
+#define DDR_PCTL2_DRAMTMG7		0x11c
+#define DDR_PCTL2_DRAMTMG8		0x120
+#define DDR_PCTL2_DRAMTMG9		0x124
+#define DDR_PCTL2_DRAMTMG10		0x128
+#define DDR_PCTL2_DRAMTMG11		0x12c
+#define DDR_PCTL2_DRAMTMG12		0x130
+#define DDR_PCTL2_DRAMTMG13		0x134
+#define DDR_PCTL2_DRAMTMG14		0x138
+#define DDR_PCTL2_DRAMTMG15		0x13c
+#define DDR_PCTL2_DRAMTMG16		0x140
+#define DDR_PCTL2_ZQCTL0		0x180
+#define DDR_PCTL2_ZQCTL1		0x184
+#define DDR_PCTL2_ZQCTL2		0x188
+#define DDR_PCTL2_ZQSTAT		0x18c
+#define DDR_PCTL2_DFITMG0		0x190
+#define DDR_PCTL2_DFITMG1		0x194
+#define DDR_PCTL2_DFILPCFG0		0x198
+#define DDR_PCTL2_DFILPCFG1		0x19c
+#define DDR_PCTL2_DFIUPD0		0x1a0
+#define DDR_PCTL2_DFIUPD1		0x1a4
+#define DDR_PCTL2_DFIUPD2		0x1a8
+#define DDR_PCTL2_DFIMISC		0x1b0
+#define DDR_PCTL2_DFITMG2		0x1b4
+#define DDR_PCTL2_DFITMG3		0x1b8
+#define DDR_PCTL2_DFISTAT		0x1bc
+#define DDR_PCTL2_DBICTL		0x1c0
+#define DDR_PCTL2_ADDRMAP0		0x200
+#define DDR_PCTL2_ADDRMAP1		0x204
+#define DDR_PCTL2_ADDRMAP2		0x208
+#define DDR_PCTL2_ADDRMAP3		0x20c
+#define DDR_PCTL2_ADDRMAP4		0x210
+#define DDR_PCTL2_ADDRMAP5		0x214
+#define DDR_PCTL2_ADDRMAP6		0x218
+#define DDR_PCTL2_ADDRMAP7		0x21c
+#define DDR_PCTL2_ADDRMAP8		0x220
+#define DDR_PCTL2_ADDRMAP9		0x224
+#define DDR_PCTL2_ADDRMAP10		0x228
+#define DDR_PCTL2_ADDRMAP11		0x22c
+#define DDR_PCTL2_ODTCFG		0x240
+#define DDR_PCTL2_ODTMAP		0x244
+#define DDR_PCTL2_SCHED			0x250
+#define DDR_PCTL2_SCHED1		0x254
+#define DDR_PCTL2_PERFHPR1		0x25c
+#define DDR_PCTL2_PERFLPR1		0x264
+#define DDR_PCTL2_PERFWR1		0x26c
+#define DDR_PCTL2_DQMAP0		0x280
+#define DDR_PCTL2_DQMAP1		0x284
+#define DDR_PCTL2_DQMAP2		0x288
+#define DDR_PCTL2_DQMAP3		0x28c
+#define DDR_PCTL2_DQMAP4		0x290
+#define DDR_PCTL2_DQMAP5		0x294
+#define DDR_PCTL2_DBG0			0x300
+#define DDR_PCTL2_DBG1			0x304
+#define DDR_PCTL2_DBGCAM		0x308
+#define DDR_PCTL2_DBGCMD		0x30c
+#define DDR_PCTL2_DBGSTAT		0x310
+#define DDR_PCTL2_SWCTL			0x320
+#define DDR_PCTL2_SWSTAT		0x324
+#define DDR_PCTL2_POISONCFG		0x36c
+#define DDR_PCTL2_POISONSTAT		0x370
+#define DDR_PCTL2_ADVECCINDEX		0x374
+#define DDR_PCTL2_ADVECCSTAT		0x378
+#define DDR_PCTL2_PSTAT			0x3fc
+#define DDR_PCTL2_PCCFG			0x400
+#define DDR_PCTL2_PCFGR_n		0x404
+#define DDR_PCTL2_PCFGW_n		0x408
+#define DDR_PCTL2_PCTRL_n		0x490
+
+/* PCTL2_MRSTAT */
+#define MR_WR_BUSY			BIT(0)
+
+/* PHY_REG0 */
+#define DIGITAL_DERESET			BIT(3)
+#define ANALOG_DERESET			BIT(2)
+#define DIGITAL_RESET			(0 << 3)
+#define ANALOG_RESET			(0 << 2)
+
+/* PHY_REG1 */
+#define PHY_DDR2			(0)
+#define PHY_LPDDR2			(1)
+#define PHY_DDR3			(2)
+#define PHY_LPDDR3			(3)
+#define PHY_DDR4			(4)
+#define PHY_BL_4			(0 << 2)
+#define PHY_BL_8			BIT(2)
+
+/* PHY_REG2 */
+#define PHY_DTT_EN			BIT(0)
+#define PHY_DTT_DISB			(0 << 0)
+#define PHY_WRITE_LEVELING_EN		BIT(2)
+#define PHY_WRITE_LEVELING_DISB		(0 << 2)
+#define PHY_SELECT_CS0			(2)
+#define PHY_SELECT_CS1			(1)
+#define PHY_SELECT_CS0_1		(0)
+#define PHY_WRITE_LEVELING_SELECTCS(n)	((n) << 6)
+#define PHY_DATA_TRAINING_SELECTCS(n)	((n) << 4)
+
+#define PHY_DDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR3_RON_RTT_451ohm		(1)
+#define PHY_DDR3_RON_RTT_225ohm		(2)
+#define PHY_DDR3_RON_RTT_150ohm		(3)
+#define PHY_DDR3_RON_RTT_112ohm		(4)
+#define PHY_DDR3_RON_RTT_90ohm		(5)
+#define PHY_DDR3_RON_RTT_75ohm		(6)
+#define PHY_DDR3_RON_RTT_64ohm		(7)
+#define PHY_DDR3_RON_RTT_56ohm		(16)
+#define PHY_DDR3_RON_RTT_50ohm		(17)
+#define PHY_DDR3_RON_RTT_45ohm		(18)
+#define PHY_DDR3_RON_RTT_41ohm		(19)
+#define PHY_DDR3_RON_RTT_37ohm		(20)
+#define PHY_DDR3_RON_RTT_34ohm		(21)
+#define PHY_DDR3_RON_RTT_33ohm		(22)
+#define PHY_DDR3_RON_RTT_30ohm		(23)
+#define PHY_DDR3_RON_RTT_28ohm		(24)
+#define PHY_DDR3_RON_RTT_26ohm		(25)
+#define PHY_DDR3_RON_RTT_25ohm		(26)
+#define PHY_DDR3_RON_RTT_23ohm		(27)
+#define PHY_DDR3_RON_RTT_22ohm		(28)
+#define PHY_DDR3_RON_RTT_21ohm		(29)
+#define PHY_DDR3_RON_RTT_20ohm		(30)
+#define PHY_DDR3_RON_RTT_19ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
+
+/* noc registers define */
+#define DEVICECONF			0x8
+#define DEVICESIZE			0xc
+#define DDRTIMINGA0			0x10
+#define DDRTIMINGB0			0x14
+#define DDRTIMINGC0			0x18
+#define DEVTODEV0			0x1c
+#define DDRMODE				0x110
+#define DDR4TIMING			0x114
+#define AGINGX0				0x1000
+#define AGING0				0x1040
+#define AGING1				0x1044
+#define AGING2				0x1048
+#define AGING3				0x104c
+
+/* PMUGRF */
+#define PMUGRF_OS_REG0			(0x200)
+#define PMUGRF_OS_REG(n)		(PMUGRF_OS_REG0 + (n) * 4)
+
+/* DDR GRF */
+#define DDR_GRF_CON(n)			(0 + (n) * 4)
+#define DDR_GRF_STATUS_BASE		(0X100)
+#define DDR_GRF_STATUS(n)		(DDR_GRF_STATUS_BASE + (n) * 4)
+#define DDR_GRF_LP_CON			(0x20)
+
+#define SPLIT_MODE_32_L16_VALID		(0)
+#define SPLIT_MODE_32_H16_VALID		(1)
+#define SPLIT_MODE_16_L8_VALID		(2)
+#define SPLIT_MODE_16_H8_VALID		(3)
+
+#define DDR_GRF_SPLIT_CON		(0x8)
+#define SPLIT_MODE_MASK			(0x3)
+#define SPLIT_MODE_OFFSET		(9)
+#define SPLIT_BYPASS_MASK		(1)
+#define SPLIT_BYPASS_OFFSET		(8)
+#define SPLIT_SIZE_MASK			(0xff)
+#define SPLIT_SIZE_OFFSET		(0)
+
+/*
+ * sys_reg bitfield struct
+ * [31]		row_3_4_ch1
+ * [30]		row_3_4_ch0
+ * [29:28]	chinfo
+ * [27]		rank_ch1
+ * [26:25]	col_ch1
+ * [24]		bk_ch1
+ * [23:22]	cs0_row_ch1
+ * [21:20]	cs1_row_ch1
+ * [19:18]	bw_ch1
+ * [17:16]	dbw_ch1;
+ * [15:13]	ddrtype
+ * [12]		channelnum
+ * [11]		rank_ch0
+ * [10:9]	col_ch0
+ * [8]		bk_ch0
+ * [7:6]	cs0_row_ch0
+ * [5:4]	cs1_row_ch0
+ * [3:2]	bw_ch0
+ * [1:0]	dbw_ch0
+ */
+
+#define DDR_SYS_REG_VERSION		(0x2)
+#define SYS_REG_ENC_ROW_3_4(n)		((n) << 30)
+#define SYS_REG_DEC_ROW_3_4(n)		(((n) >> 30) & 0x1)
+#define SYS_REG_ENC_CHINFO()		(1 << 28)
+#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
+#define SYS_REG_DEC_DDRTYPE(n)		(((n) >> 13) & 0x7)
+#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
+#define SYS_REG_DEC_NUM_CH(n)		(1 + (((n) >> 12) & 0x1))
+#define SYS_REG_ENC_RANK(n)		(((n) - 1) << 11)
+#define SYS_REG_DEC_RANK(n)		(1 + (((n) >> 11) & 0x1))
+#define SYS_REG_ENC_COL(n)		(((n) - 9) << 9)
+#define SYS_REG_DEC_COL(n)		(9 + (((n) >> 9) & 0x3))
+#define SYS_REG_ENC_BK(n)		(((n) == 3 ? 0 : 1) << 8)
+#define SYS_REG_DEC_BK(n)		(3 - (((n) >> 8) & 0x1))
+#define SYS_REG_ENC_CS0_ROW(n)		(((n) - 13) << 6)
+#define SYS_REG_DEC_CS0_ROW(n)		(13 + (((n) >> 6) & 0x3))
+#define SYS_REG_ENC_BW(n)		((2 >> (n)) << 2)
+#define SYS_REG_DEC_BW(n)		(2 >> (((n) >> 2) & 0x3))
+#define SYS_REG_ENC_DBW(n)		((2 >> (n)) << 0)
+#define SYS_REG_DEC_DBW(n)		(2 >> (((n) >> 0) & 0x3))
+/* sys reg 3 */
+#define SYS_REG_ENC_VERSION(n)		((n) << 28)
+#define SYS_REG_DEC_VERSION(n)		(((n) >> 28) & 0xf)
+#define SYS_REG_ENC_CS0_ROW_(n, os_reg2, os_reg3) do {	\
+			(os_reg2) |= (((n) - 13) & 0x3) << 6;\
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 5; \
+		} while (0)
+
+#define SYS_REG_DEC_CS0_ROW_(os_reg2, os_reg3)	\
+		((((((os_reg2) >> 6 & 0x3) | \
+		 ((((os_reg3) >> 5) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_ROW_(n, os_reg2, os_reg3) do {	\
+			(os_reg2) &= (~(0x3 << 4));\
+			(os_reg3) &= (~(0x1 << 4));\
+			(os_reg2) |= (((n) - 13) & 0x3) << 4;\
+			(os_reg3) |= ((((n) - 13) & 0x4) >> 2) << 4; \
+		} while (0)
+
+#define SYS_REG_DEC_CS1_ROW_(os_reg2, os_reg3)	\
+		((((((os_reg2) >> 4 & 0x3) | \
+		 ((((os_reg3) >> 4) & 0x1) << 2)) + 1) & 0x7) + 12)
+
+#define SYS_REG_ENC_CS1_COL(n)		(((n) - 9) << 0)
+#define SYS_REG_DEC_CS1_COL(n)		(9 + (((n) >> 0) & 0x3))
+
+/* CRU define */
+/* CRU_PLL_CON0 */
+#define PB(n)				((0x1 << (15 + 16)) | ((n) << 15))
+#define POSTDIV1(n)			((0x7 << (12 + 16)) | ((n) << 12))
+#define FBDIV(n)			((0xFFF << 16) | (n))
+
+/* CRU_PLL_CON1 */
+#define RSTMODE(n)			((0x1 << (15 + 16)) | ((n) << 15))
+#define RST(n)				((0x1 << (14 + 16)) | ((n) << 14))
+#define PD(n)				((0x1 << (13 + 16)) | ((n) << 13))
+#define DSMPD(n)			((0x1 << (12 + 16)) | ((n) << 12))
+#define LOCK(n)				(((n) >> 10) & 0x1)
+#define POSTDIV2(n)			((0x7 << (6 + 16)) | ((n) << 6))
+#define REFDIV(n)			((0x3F << 16) | (n))
+
+/* CRU_MODE */
+#define CLOCK_FROM_XIN_OSC		(0)
+#define CLOCK_FROM_PLL			(1)
+#define CLOCK_FROM_RTC_32K		(2)
+#define DPLL_MODE(n)			((0x3 << (4 + 16)) | ((n) << 4))
+
+/* CRU_SOFTRESET_CON1 */
+#define upctl2_psrstn_req(n)		(((0x1 << 6) << 16) | ((n) << 6))
+#define upctl2_asrstn_req(n)		(((0x1 << 5) << 16) | ((n) << 5))
+#define upctl2_srstn_req(n)		(((0x1 << 4) << 16) | ((n) << 4))
+
+/* CRU_SOFTRESET_CON2 */
+#define ddrphy_psrstn_req(n)		(((0x1 << 2) << 16) | ((n) << 2))
+#define ddrphy_srstn_req(n)		(((0x1 << 0) << 16) | ((n) << 0))
+
+/* CRU register */
+#define CRU_PLL_CON(pll_id, n)		((pll_id)  * 0x20 + (n) * 4)
+#define CRU_MODE			(0xa0)
+#define CRU_GLB_CNT_TH			(0xb0)
+#define CRU_CLKSEL_CON_BASE		0x100
+#define CRU_CLKSELS_CON(i)		(CRU_CLKSEL_CON_BASE + ((i) * 4))
+#define CRU_CLKGATE_CON_BASE		0x200
+#define CRU_CLKGATE_CON(i)		(CRU_CLKGATE_CON_BASE + ((i) * 4))
+#define CRU_CLKSFTRST_CON_BASE		0x300
+#define CRU_CLKSFTRST_CON(i)		(CRU_CLKSFTRST_CON_BASE + ((i) * 4))
+
+u8 ddr_cfg_2_rbc[] = {
+	/*
+	 * [6:4] max row: 13+n
+	 * [3]  bank(0:4bank,1:8bank)
+	 * [2:0]    col(10+n)
+	 */
+	((5 << 4) | (1 << 3) | 0), /* 0 */
+	((5 << 4) | (1 << 3) | 1), /* 1 */
+	((4 << 4) | (1 << 3) | 2), /* 2 */
+	((3 << 4) | (1 << 3) | 3), /* 3 */
+	((2 << 4) | (1 << 3) | 4), /* 4 */
+	((5 << 4) | (0 << 3) | 2), /* 5 */
+	((4 << 4) | (1 << 3) | 2), /* 6 */
+	/*((0<<3)|3),*/	 /* 12 for ddr4 */
+	/*((1<<3)|1),*/  /* 13 B,C exchange for rkvdec */
+};
+
+/*
+ * for ddr4 if ddrconfig=7, upctl should set 7 and noc should
+ * set to 1 for more efficient.
+ * noc ddrconf, upctl addrmap
+ * 1  7
+ * 2  8
+ * 3  9
+ * 12 10
+ * 5  11
+ */
+u8 d4_rbc_2_d3_rbc[] = {
+	1, /* 7 */
+	2, /* 8 */
+	3, /* 9 */
+	12, /* 10 */
+	5, /* 11 */
+};
+
+/*
+ * row higher than cs should be disabled by set to 0xf
+ * rank addrmap calculate by real cap.
+ */
+u32 addrmap[][8] = {
+	/* map0 map1,   map2,       map3,       map4,      map5
+	 * map6,        map7,       map8
+	 * -------------------------------------------------------
+	 * bk2-0       col 5-2     col 9-6    col 11-10   row 11-0
+	 * row 15-12   row 17-16   bg1,0
+	 * -------------------------------------------------------
+	 * 4,3,2       5-2         9-6                    6
+	 *                         3,2
+	 */
+	{0x00060606, 0x00000000, 0x1f1f0000, 0x00001f1f, 0x05050505,
+		0x05050505, 0x00000505, 0x3f3f}, /* 0 */
+	{0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x06060606, 0x3f3f}, /* 1 */
+	{0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f3f}, /* 2 */
+	{0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f}, /* 3 */
+	{0x000a0a0a, 0x00000000, 0x00000000, 0x00000000, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f}, /* 4 */
+	{0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x3f3f}, /* 5 */
+	{0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f}, /* 6 */
+	{0x003f0808, 0x00000006, 0x1f1f0000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x0600}, /* 7 */
+	{0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x0700}, /* 8 */
+	{0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0801}, /* 9 */
+	{0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f01}, /* 10 */
+	{0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x3f00}, /* 11 */
+	/* when ddr4 12 map to 10, when ddr3 12 unused */
+	{0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f01}, /* 10 */
+	{0x00070706, 0x00000000, 0x1f010000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000606, 0x3f3f}, /* 13 */
+};
+
+union noc_ddrtiminga0 {
+	u32 d32;
+	struct {
+		unsigned acttoact : 6;
+		unsigned reserved0 : 2;
+		unsigned rdtomiss : 6;
+		unsigned reserved1 : 2;
+		unsigned wrtomiss : 6;
+		unsigned reserved2 : 2;
+		unsigned readlatency : 8;
+	} b;
+};
+
+union noc_ddrtimingb0 {
+	u32 d32;
+	struct {
+		unsigned rdtowr : 5;
+		unsigned reserved0 : 3;
+		unsigned wrtord : 5;
+		unsigned reserved1 : 3;
+		unsigned rrd : 4;
+		unsigned reserved2 : 4;
+		unsigned faw : 6;
+		unsigned reserved3 : 2;
+	} b;
+};
+
+union noc_ddrtimingc0 {
+	u32 d32;
+	struct {
+		unsigned burstpenalty : 4;
+		unsigned reserved0 : 4;
+		unsigned wrtomwr : 6;
+		unsigned reserved1 : 18;
+	} b;
+};
+
+union noc_devtodev0 {
+	u32 d32;
+	struct {
+		unsigned busrdtord : 3;
+		unsigned reserved0 : 1;
+		unsigned busrdtowr : 3;
+		unsigned reserved1 : 1;
+		unsigned buswrtord : 3;
+		unsigned reserved2 : 1;
+		unsigned buswrtowr : 3;
+		unsigned reserved3 : 17;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge : 1;
+		unsigned bypassfiltering : 1;
+		unsigned fawbank : 1;
+		unsigned burstsize : 2;
+		unsigned mwrsize : 2;
+		unsigned reserved2 : 1;
+		unsigned forceorder : 8;
+		unsigned forceorderstate : 8;
+		unsigned reserved3 : 8;
+	} b;
+};
+
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl : 3;
+		unsigned wrtordl : 5;
+		unsigned rrdl : 4;
+		unsigned reserved1 : 20;
+	} b;
+};
+
+struct px30_msch_timings {
+	union noc_ddrtiminga0 ddrtiminga0;
+	union noc_ddrtimingb0 ddrtimingb0;
+	union noc_ddrtimingc0 ddrtimingc0;
+	union noc_devtodev0 devtodev0;
+	union noc_ddrmode ddrmode;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+};
+
+struct px30_msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 deviceconf;
+	u32 devicesize;
+	u32 ddrtiminga0;
+	u32 ddrtimingb0;
+	u32 ddrtimingc0;
+	u32 devtodev0;
+	u32 reserved1[(0x110 - 0x20) / 4];
+	u32 ddrmode;
+	u32 ddr4timing;
+	u32 reserved2[(0x1000 - 0x118) / 4];
+	u32 agingx0;
+	u32 reserved3[(0x1040 - 0x1004) / 4];
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+};
+
+struct px30_ddr_grf_regs {
+	u32 ddr_grf_con[4];
+	u32 reserved1[(0x20 - 0x10) / 4];
+	u32 ddr_grf_lp_con;
+	u32 reserved2[(0x100 - 0x24) / 4];
+	u32 ddr_grf_status[11];
+};
+
+struct px30_ddr_pctl_regs {
+	u32 pctl[30][2];
+};
+
+struct px30_ddr_phy_regs {
+	u32 phy[5][2];
+};
+
+struct px30_ddr_skew {
+	u32 a0_a1_skew[15];
+	u32 cs0_dm0_skew[11];
+	u32 cs0_dm1_skew[11];
+	u32 cs0_dm2_skew[11];
+	u32 cs0_dm3_skew[11];
+	u32 cs1_dm0_skew[11];
+	u32 cs1_dm1_skew[11];
+	u32 cs1_dm2_skew[11];
+	u32 cs1_dm3_skew[11];
+};
+
+struct px30_sdram_channel {
+	unsigned char rank;
+	unsigned char col;
+	/* 3:8bank, 2:4bank */
+	unsigned char bk;
+	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned char bw;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned char dbw;
+	unsigned char row_3_4;
+	unsigned char cs0_row;
+	unsigned char cs1_row;
+	unsigned char cs0_high16bit_row;
+	unsigned char cs1_high16bit_row;
+	unsigned int ddrconfig;
+	struct px30_msch_timings noc_timings;
+};
+
+struct px30_sdram_params {
+	struct px30_sdram_channel ch;
+	unsigned int ddr_freq;
+	unsigned int dramtype;
+	unsigned int odt;
+	struct px30_ddr_pctl_regs pctl_regs;
+	struct px30_ddr_phy_regs phy_regs;
+	struct px30_ddr_skew *skew;
+};
+
+#define PHY_REG(base, n)		((base) + 4 * (n))
+
+#endif
diff --git a/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
new file mode 100644
index 0000000000..561273f40c
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc
@@ -0,0 +1,66 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xC,
+		.bk = 0x3,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0x10,
+		.cs1_row = 0x10,
+		.cs0_high16bit_row = 0x10,
+		.cs1_high16bit_row = 0x10,
+		.ddrconfig = 0,
+		{
+			{0x290b0609},
+			{0x08020401},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000222},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = DDR3,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x43041001},	/* MSTR */
+			{0x00000064, 0x0028003b},	/* RFSHTMG */
+			{0x000000d0, 0x00020053},	/* INIT0 */
+			{0x000000d4, 0x00020000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x03200000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00090000},	/* INIT5 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x07090b06},	/* DRAMTMG0 */
+			{0x00000104, 0x00050209},	/* DRAMTMG1 */
+			{0x00000108, 0x03030407},	/* DRAMTMG2 */
+			{0x0000010c, 0x00202006},	/* DRAMTMG3 */
+			{0x00000110, 0x03020204},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x00000903},	/* DRAMTMG8 */
+			{0x00000180, 0x00800020},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07010001},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000000a},	/* PHYREG01 */
+			{0x00000028, 0x00000006},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000005},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
new file mode 100644
index 0000000000..dddd2f0269
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc
@@ -0,0 +1,69 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xA,
+		.bk = 0x2,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0x11,
+		.cs1_row = 0x0,
+		.cs0_high16bit_row = 0x11,
+		.cs1_high16bit_row = 0x0,
+		.ddrconfig = 0,
+		{
+			{0x4d110a08},
+			{0x06020501},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000022a},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = DDR4,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x43049010},	/* MSTR */
+			{0x00000064, 0x0028003b},	/* RFSHTMG */
+			{0x000000d0, 0x00020053},	/* INIT0 */
+			{0x000000d4, 0x00220000},	/* INIT1 */
+			{0x000000d8, 0x00000100},	/* INIT2 */
+			{0x000000dc, 0x00040000},	/* INIT3 */
+			{0x000000e0, 0x00000000},	/* INIT4 */
+			{0x000000e4, 0x00110000},	/* INIT5 */
+			{0x000000e8, 0x00000420},	/* INIT6 */
+			{0x000000ec, 0x00000400},	/* INIT7 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x09060b06},	/* DRAMTMG0 */
+			{0x00000104, 0x00020209},	/* DRAMTMG1 */
+			{0x00000108, 0x0505040a},	/* DRAMTMG2 */
+			{0x0000010c, 0x0040400c},	/* DRAMTMG3 */
+			{0x00000110, 0x05030206},	/* DRAMTMG4 */
+			{0x00000114, 0x03030202},	/* DRAMTMG5 */
+			{0x00000120, 0x03030b03},	/* DRAMTMG8 */
+			{0x00000124, 0x00020208},	/* DRAMTMG9 */
+			{0x00000180, 0x01000040},	/* ZQCTL0 */
+			{0x00000184, 0x00000000},	/* ZQCTL1 */
+			{0x00000190, 0x07030003},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x06000604},	/* ODTCFG */
+			{0x00000244, 0x00000201},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000000c},	/* PHYREG01 */
+			{0x00000028, 0x0000000a},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000009},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
\ No newline at end of file
diff --git a/drivers/ram/rockchip/sdram-px30-ddr_skew.inc b/drivers/ram/rockchip/sdram-px30-ddr_skew.inc
new file mode 100644
index 0000000000..f24343dda1
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-ddr_skew.inc
@@ -0,0 +1,121 @@
+		{
+			0x77,
+			0x88,
+			0x79,
+			0x79,
+			0x87,
+			0x97,
+			0x87,
+			0x78,
+			0x77,
+			0x78,
+			0x87,
+			0x88,
+			0x87,
+			0x87,
+			0x77
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x79,
+			0x9,
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x79,
+			0x9,
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x78,
+			0x77,
+			0x79,
+			0x9,
+		},
+		{
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x78,
+			0x69,
+			0x9,
+		},
+		{
+			0x77,
+			0x78,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x77,
+			0x79,
+			0x9,
+		}
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
new file mode 100644
index 0000000000..b65cb0a98f
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc
@@ -0,0 +1,67 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xC,
+		.bk = 0x3,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0xF,
+		.cs1_row = 0xF,
+		.cs0_high16bit_row = 0xF,
+		.cs1_high16bit_row = 0xF,
+		.ddrconfig = 0,
+		{
+			{0x2b0c070a},
+			{0x08020303},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x00000219},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = LPDDR2,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x41041004},	/* MSTR */
+			{0x00000064, 0x00140023},	/* RFSHTMG */
+			{0x000000d0, 0x00220002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000703},	/* INIT2 */
+			{0x000000dc, 0x00630005},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00070003},	/* INIT5 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x07090b07},	/* DRAMTMG0 */
+			{0x00000104, 0x0002010b},	/* DRAMTMG1 */
+			{0x00000108, 0x02040506},	/* DRAMTMG2 */
+			{0x0000010c, 0x00303000},	/* DRAMTMG3 */
+			{0x00000110, 0x04010204},	/* DRAMTMG4 */
+			{0x00000114, 0x01010303},	/* DRAMTMG5 */
+			{0x00000118, 0x02020003},	/* DRAMTMG6 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000138, 0x00000025},	/* DRAMTMG14 */
+			{0x00000180, 0x003c000f},	/* ZQCTL0 */
+			{0x00000184, 0x00900000},	/* ZQCTL1 */
+			{0x00000190, 0x07020001},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x07030718},	/* ODTCFG */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x00000009},	/* PHYREG01 */
+			{0x00000028, 0x00000007},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000004},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
new file mode 100644
index 0000000000..f3a1816ee6
--- /dev/null
+++ b/drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc
@@ -0,0 +1,68 @@
+{
+	{
+		.rank = 0x1,
+		.col = 0xC,
+		.bk = 0x3,
+		.bw = 0x1,
+		.dbw = 0x0,
+		.row_3_4 = 0x0,
+		.cs0_row = 0x10,
+		.cs1_row = 0x10,
+		.cs0_high16bit_row = 0x10,
+		.cs1_high16bit_row = 0x10,
+		.ddrconfig = 0,
+		{
+			{0x290a060a},
+			{0x08020303},
+			{0x00000002},
+			{0x00001111},
+			{0x0000000c},
+			{0x0000021a},
+			0x000000ff
+		}
+	},
+	.ddr_freq = 333,
+	.dramtype = LPDDR3,
+	.odt = 0,
+	{
+		{
+			{0x00000000, 0x43041008},	/* MSTR */
+			{0x00000064, 0x00140023},	/* RFSHTMG */
+			{0x000000d0, 0x00220002},	/* INIT0 */
+			{0x000000d4, 0x00010000},	/* INIT1 */
+			{0x000000d8, 0x00000703},	/* INIT2 */
+			{0x000000dc, 0x00830004},	/* INIT3 */
+			{0x000000e0, 0x00010000},	/* INIT4 */
+			{0x000000e4, 0x00070003},	/* INIT5 */
+			{0x000000f4, 0x000f012f},	/* RANKCTL */
+			{0x00000100, 0x06090b07},	/* DRAMTMG0 */
+			{0x00000104, 0x0002020b},	/* DRAMTMG1 */
+			{0x00000108, 0x02030506},	/* DRAMTMG2 */
+			{0x0000010c, 0x00505000},	/* DRAMTMG3 */
+			{0x00000110, 0x03020204},	/* DRAMTMG4 */
+			{0x00000114, 0x01010303},	/* DRAMTMG5 */
+			{0x00000118, 0x02020003},	/* DRAMTMG6 */
+			{0x00000120, 0x00000303},	/* DRAMTMG8 */
+			{0x00000138, 0x00000025},	/* DRAMTMG14 */
+			{0x00000180, 0x003c000f},	/* ZQCTL0 */
+			{0x00000184, 0x00900000},	/* ZQCTL1 */
+			{0x00000190, 0x07020000},	/* DFITMG0 */
+			{0x00000198, 0x05000101},	/* DFILPCFG0 */
+			{0x000001a0, 0xc0400003},	/* DFIUPD0 */
+			{0x00000240, 0x0900090c},	/* ODTCFG */
+			{0x00000244, 0x00000101},	/* ODTMAP */
+			{0x00000250, 0x00001f00},	/* SCHED */
+			{0x00000490, 0x00000001},	/* PCTRL_0 */
+			{0xffffffff, 0xffffffff}
+		}
+	},
+	{
+		{
+			{0x00000004, 0x0000000b},	/* PHYREG01 */
+			{0x00000028, 0x00000006},	/* PHYREG0A */
+			{0x0000002c, 0x00000000},	/* PHYREG0B */
+			{0x00000030, 0x00000003},	/* PHYREG0C */
+			{0xffffffff, 0xffffffff}
+		}
+	}
+},
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index f98ba8cc29..a3ed63841a 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -1,23 +1,1188 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
  */
 
 #include <common.h>
+#include <debug_uart.h>
 #include <dm.h>
 #include <ram.h>
 #include <syscon.h>
+#include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_px30.h>
+
+/*
+ * Because px30 sram size is small, so need define CONFIG_TPL_TINY_FRAMEWORK
+ * to reduce TPL size when build TPL firmware.
+ */
+#ifdef CONFIG_TPL_BUILD
+#ifndef CONFIG_TPL_TINY_FRAMEWORK
+#error please defined CONFIG_TPL_TINY_FRAMEWORK for px30 !!!
+#endif
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
+#ifdef CONFIG_TPL_BUILD
+	struct px30_ddr_pctl_regs *pctl;
+	struct px30_ddr_phy_regs *phy;
+	struct px30_cru *cru;
+	struct px30_msch_regs *msch;
+	struct px30_ddr_grf_regs *ddr_grf;
+	struct px30_grf *grf;
+#endif
 	struct ram_info info;
 	struct px30_pmugrf *pmugrf;
 };
 
+#ifdef CONFIG_TPL_BUILD
+#define PMUGRF_BASE_ADDR		0xFF010000
+#define CRU_BASE_ADDR			0xFF2B0000
+#define GRF_BASE_ADDR			0xFF140000
+#define DDRC_BASE_ADDR			0xFF600000
+#define DDR_PHY_BASE_ADDR		0xFF2A0000
+#define SERVER_MSCH0_BASE_ADDR		0xFF530000
+#define DDR_GRF_BASE_ADDR		0xff630000
+
+struct dram_info dram_info;
+
+struct px30_sdram_params sdram_configs[] = {
+#include	"sdram-px30-lpddr3-detect-333.inc"
+};
+
+struct px30_ddr_skew skew = {
+#include	"sdram-px30-ddr_skew.inc"
+};
+
+static void rkclk_ddr_reset(struct dram_info *dram,
+			    u32 ctl_srstn, u32 ctl_psrstn,
+			    u32 phy_srstn, u32 phy_psrstn)
+{
+	writel(upctl2_srstn_req(ctl_srstn) | upctl2_psrstn_req(ctl_psrstn) |
+	       upctl2_asrstn_req(ctl_srstn),
+	       &dram->cru->softrst_con[1]);
+	writel(ddrphy_srstn_req(phy_srstn) | ddrphy_psrstn_req(phy_psrstn),
+	       &dram->cru->softrst_con[2]);
+}
+
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int mhz)
+{
+	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
+	int delay = 1000;
+
+	refdiv = 1;
+	if (mhz <= 300) {
+		postdiv1 = 4;
+		postdiv2 = 2;
+	} else if (mhz <= 400) {
+		postdiv1 = 6;
+		postdiv2 = 1;
+	} else if (mhz <= 600) {
+		postdiv1 = 4;
+		postdiv2 = 1;
+	} else if (mhz <= 800) {
+		postdiv1 = 3;
+		postdiv2 = 1;
+	} else if (mhz <= 1600) {
+		postdiv1 = 2;
+		postdiv2 = 1;
+	} else {
+		postdiv1 = 1;
+		postdiv2 = 1;
+	}
+	fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
+
+	writel(DPLL_MODE(CLOCK_FROM_XIN_OSC), &dram->cru->mode);
+
+	writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->pll[1].con0);
+	writel(DSMPD(1) | POSTDIV2(postdiv2) | REFDIV(refdiv),
+	       &dram->cru->pll[1].con1);
+
+	while (delay > 0) {
+		udelay(1);
+		if (LOCK(readl(&dram->cru->pll[1].con1)))
+			break;
+		delay--;
+	}
+
+	writel(DPLL_MODE(CLOCK_FROM_PLL), &dram->cru->mode);
+}
+
+static void rkclk_configure_ddr(struct dram_info *dram,
+				struct px30_sdram_params *sdram_params)
+{
+	/* for inno ddr phy need 2*freq */
+	rkclk_set_dpll(dram,  sdram_params->ddr_freq * 2);
+}
+
+static void phy_soft_reset(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
+	udelay(1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
+	udelay(5);
+	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
+	udelay(1);
+}
+
+static int pctl_cfg(struct dram_info *dram,
+		    struct px30_sdram_params *sdram_params)
+{
+	u32 i;
+	void __iomem *pctl_base = dram->pctl;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->pctl_regs.pctl[i][1],
+		       pctl_base + sdram_params->pctl_regs.pctl[i][0]);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
+			(0xff << 16) | 0x1f,
+			((SR_IDLE & 0xff) << 16) | (PD_IDLE & 0x1f));
+
+	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
+			0xfff << 16,
+			5 << 16);
+	/* disable zqcs */
+	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
+
+	return 0;
+}
+
+/* return ddrconfig value
+ *       (-1), find ddrconfig fail
+ *       other, the ddrconfig value
+ * only support cs0_row >= cs1_row
+ */
+static unsigned int calculate_ddrconfig(struct px30_sdram_params *sdram_params)
+{
+	u32 bw, die_bw, col, bank;
+	u32 i, tmp;
+	u32 ddrconf = -1;
+
+	bw = sdram_params->ch.bw;
+	die_bw = sdram_params->ch.dbw;
+	col = sdram_params->ch.col;
+	bank = sdram_params->ch.bk;
+
+	if (sdram_params->dramtype == DDR4) {
+		if (die_bw == 0)
+			ddrconf = 7 + bw;
+		else
+			ddrconf = 12 - bw;
+		ddrconf = d4_rbc_2_d3_rbc[ddrconf - 7];
+	} else {
+		tmp = ((bank - 2) << 3) | (col + bw - 10);
+		for (i = 0; i < 7; i++)
+			if ((ddr_cfg_2_rbc[i] & 0xf) == tmp) {
+				ddrconf = i;
+				break;
+			}
+		if (i > 6)
+			printascii("calculate ddrconfig error\n");
+	}
+
+	return ddrconf;
+}
+
+/* n: Unit bytes */
+static void copy_to_reg(u32 *dest, u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+/*
+ * calculate controller dram address map, and setting to register.
+ * argument sdram_params->ch.ddrconf must be right value before
+ * call this function.
+ */
+static void set_ctl_address_map(struct dram_info *dram,
+				struct px30_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 cs_pst, bg, max_row, ddrconf;
+	u32 i;
+
+	if (sdram_params->dramtype == DDR4)
+		/*
+		 * DDR4 8bit dram BG = 2(4bank groups),
+		 * 16bit dram BG = 1 (2 bank groups)
+		 */
+		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+	else
+		bg = 0;
+
+	cs_pst = sdram_params->ch.bw + sdram_params->ch.col +
+		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row;
+	if (cs_pst >= 32 || sdram_params->ch.rank == 1)
+		writel(0x1f, pctl_base + DDR_PCTL2_ADDRMAP0);
+	else
+		writel(cs_pst - 8, pctl_base + DDR_PCTL2_ADDRMAP0);
+
+	ddrconf = sdram_params->ch.ddrconfig;
+	if (sdram_params->dramtype == DDR4) {
+		for (i = 0; i < ARRAY_SIZE(d4_rbc_2_d3_rbc); i++) {
+			if (d4_rbc_2_d3_rbc[i] == ddrconf) {
+				ddrconf = 7 + i;
+				break;
+			}
+		}
+	}
+
+	copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP1),
+		    &addrmap[ddrconf][0], 8 * 4);
+	max_row = cs_pst - 1 - 8 - (addrmap[ddrconf][5] & 0xf);
+
+	if (max_row < 12)
+		printascii("set addrmap fail\n");
+	/* need to disable row ahead of rank by set to 0xf */
+	for (i = 17; i > max_row; i--)
+		clrsetbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6 +
+			((i - 12) * 8 / 32) * 4,
+			0xf << ((i - 12) * 8 % 32),
+			0xf << ((i - 12) * 8 % 32));
+
+	if ((sdram_params->dramtype == LPDDR3 ||
+	     sdram_params->dramtype == LPDDR2) &&
+		 sdram_params->ch.row_3_4)
+		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
+	if (sdram_params->dramtype == DDR4 && sdram_params->ch.bw != 0x2)
+		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
+}
+
+static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 tmp;
+	u32 i, j;
+
+	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
+	for (i = 0; i < 4; i++) {
+		j = 0x26 + i * 0x10;
+		setbits_le32(PHY_REG(phy_base, j), 1 << 4);
+		clrbits_le32(PHY_REG(phy_base, j + 0x1), 1 << 3);
+	}
+
+	if (freq <= (400 * MHz))
+		/* DLL bypass */
+		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	else
+		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+
+	if (freq <= (801 * MHz))
+		tmp = 2;
+	else
+		tmp = 1;
+
+	for (i = 0; i < 4; i++) {
+		j = 0x28 + i * 0x10;
+		writel(tmp, PHY_REG(phy_base, j));
+	}
+}
+
+static void set_ds_odt(struct dram_info *dram,
+		       struct px30_sdram_params *sdram_params)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+	u32 i, j;
+
+	if (sdram_params->dramtype == DDR3) {
+		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR3_RON_RTT_45ohm;
+		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
+	} else {
+		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
+		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		if (sdram_params->dramtype == LPDDR2)
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_DISABLE;
+		else
+			dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
+	}
+	/* DS */
+	writel(cmd_drv, PHY_REG(phy_base, 0x11));
+	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
+	writel(clk_drv, PHY_REG(phy_base, 0x16));
+	writel(clk_drv, PHY_REG(phy_base, 0x18));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(dqs_drv, PHY_REG(phy_base, j));
+		writel(dqs_drv, PHY_REG(phy_base, j + 0xf));
+		/* ODT */
+		writel(dqs_odt, PHY_REG(phy_base, j + 0x1));
+		writel(dqs_odt, PHY_REG(phy_base, j + 0xe));
+	}
+}
+
+static void phy_cfg(struct dram_info *dram,
+		    struct px30_sdram_params *sdram_params)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 i;
+
+	phy_dll_bypass_set(dram, sdram_params->ddr_freq);
+	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->phy_regs.phy[i][1],
+		       phy_base + sdram_params->phy_regs.phy[i][0]);
+	}
+	if (sdram_params->ch.bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	} else if (sdram_params->ch.bw == 1) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	} else {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 1 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x36), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+	set_ds_odt(dram, sdram_params);
+
+	/* deskew */
+	setbits_le32(PHY_REG(phy_base, 2), 8);
+	copy_to_reg(PHY_REG(phy_base, 0xb0),
+		    &sdram_params->skew->a0_a1_skew[0], 15 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0x70),
+		    &sdram_params->skew->cs0_dm0_skew[0], 44 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0xc0),
+		    &sdram_params->skew->cs0_dm1_skew[0], 44 * 4);
+}
+
+static int update_refresh_reg(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 ret;
+
+	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
+	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
+
+	return 0;
+}
+
+/*
+ * rank = 1: cs0
+ * rank = 2: cs1
+ */
+int read_mr(struct dram_info *dram, u32 rank, u32 mr_num)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *ddr_grf_base = dram->ddr_grf;
+
+	writel((rank << 4) | (1 << 0), pctl_base + DDR_PCTL2_MRCTRL0);
+	writel((mr_num << 8), pctl_base + DDR_PCTL2_MRCTRL1);
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return (readl(ddr_grf_base + DDR_GRF_STATUS(0)) & 0xff);
+}
+
+u32 disable_zqcs_arefresh(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 dis_auto_zq = 0;
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	update_refresh_reg(dram);
+
+	return dis_auto_zq;
+}
+
+void restore_zqcs_arefresh(struct dram_info *dram, u32 dis_auto_zq)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+
+	update_refresh_reg(dram);
+}
+
+#define MIN(a, b)	(((a) > (b)) ? (b) : (a))
+#define MAX(a, b)	(((a) > (b)) ? (a) : (b))
+static u32 check_rd_gate(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	u32 max_val = 0;
+	u32 min_val = 0xff;
+	u32 gate[4];
+	u32 i, bw;
+
+	bw = (readl(PHY_REG(phy_base, 0x0)) >> 4) & 0xf;
+	switch (bw) {
+	case 0x1:
+		bw = 1;
+		break;
+	case 0x3:
+		bw = 2;
+		break;
+	case 0xf:
+	default:
+		bw = 4;
+		break;
+	}
+
+	for (i = 0; i < bw; i++) {
+		gate[i] = readl(PHY_REG(phy_base, 0xfb + i));
+		max_val = MAX(max_val, gate[i]);
+		min_val = MIN(min_val, gate[i]);
+	}
+
+	if (max_val > 0x80 || min_val < 0x20)
+		return -1;
+	else
+		return 0;
+}
+
+static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)
+{
+	void __iomem *phy_base = dram->phy;
+	u32 ret;
+	u32 dis_auto_zq = 0;
+	u32 odt_val;
+	u32 i, j;
+
+	odt_val = readl(PHY_REG(phy_base, 0x2e));
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(PHY_DDR3_RON_RTT_225ohm, PHY_REG(phy_base, j + 0x1));
+		writel(0, PHY_REG(phy_base, j + 0xe));
+	}
+
+	dis_auto_zq = disable_zqcs_arefresh(dram);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
+	}
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
+	/* enable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
+	udelay(50);
+	ret = readl(PHY_REG(phy_base, 0xff));
+	/* disable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	clrbits_le32(PHY_REG(phy_base, 2), 0x30);
+	restore_zqcs_arefresh(dram, dis_auto_zq);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
+	}
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
+		ret = (ret == 0) ? 0 : -1;
+	}
+
+	for (i = 0; i < 4; i++) {
+		j = 0x20 + i * 0x10;
+		writel(odt_val, PHY_REG(phy_base, j + 0x1));
+		writel(odt_val, PHY_REG(phy_base, j + 0xe));
+	}
+
+	return ret;
+}
+
+/* rank = 1: cs0
+ * rank = 2: cs1
+ * rank = 3: cs0 & cs1
+ * note: be careful of keep mr original val
+ */
+static int write_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 arg,
+		    u32 dramtype)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+	if (dramtype == DDR3 || dramtype == DDR4) {
+		writel((mr_num << 12) | (rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
+	} else {
+		writel((rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel((mr_num << 8) | (arg & 0xff),
+		       pctl_base + DDR_PCTL2_MRCTRL1);
+	}
+
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return 0;
+}
+
+/*
+ * rank : 1:cs0, 2:cs1, 3:cs0&cs1
+ * vrefrate: 4500: 45%,
+ */
+static int write_vrefdq(struct dram_info *dram, u32 rank, u32 vrefrate,
+			u32 dramtype)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 tccd_l, value;
+	u32 dis_auto_zq = 0;
+
+	if (dramtype != DDR4 || vrefrate < 4500 ||
+	    vrefrate > 9200)
+		return (-1);
+
+	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
+	tccd_l = (tccd_l - 4) << 10;
+
+	if (vrefrate > 7500) {
+		/* range 1 */
+		value = ((vrefrate - 6000) / 65) | tccd_l;
+	} else {
+		/* range 2 */
+		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
+	}
+
+	dis_auto_zq = disable_zqcs_arefresh(dram);
+
+	/* enable vrefdq calibratin */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvrefdqe */
+	/* write vrefdq value */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvref_time */
+	write_mr(dram, rank, 6, value | (0 << 7), dramtype);
+	udelay(1);/* tvrefdqx */
+
+	restore_zqcs_arefresh(dram, dis_auto_zq);
+
+	return 0;
+}
+
+/*
+ * cs: 0:cs0
+ *	   1:cs1
+ *     else cs0+cs1
+ * note: it didn't consider about row_3_4
+ */
+u64 get_cs_cap(struct px30_sdram_params *sdram_params, u32 cs)
+{
+	u32 bg;
+	u64 cap[2];
+
+	if (sdram_params->dramtype == DDR4)
+		/* DDR4 8bit dram BG = 2(4bank groups),
+		 * 16bit dram BG = 1 (2 bank groups)
+		 */
+		bg = (sdram_params->ch.dbw == 0) ? 2 : 1;
+	else
+		bg = 0;
+	cap[0] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
+		bg + sdram_params->ch.bk + sdram_params->ch.cs0_row);
+
+	if (sdram_params->ch.rank == 2)
+		cap[1] = 1llu << (sdram_params->ch.bw + sdram_params->ch.col +
+			bg + sdram_params->ch.bk + sdram_params->ch.cs1_row);
+	else
+		cap[1] = 0;
+
+	if (cs == 0)
+		return cap[0];
+	else if (cs == 1)
+		return cap[1];
+	else
+		return (cap[0] + cap[1]);
+}
+
+static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
+{
+	writel(ddrconfig | (ddrconfig << 8), &dram->msch->deviceconf);
+	rk_clrsetreg(&dram->grf->soc_noc_con[1], 0x3 << 14, 0 << 14);
+}
+
+static void dram_all_config(struct dram_info *dram,
+			    struct px30_sdram_params *sdram_params)
+{
+	u32 sys_reg = 0;
+	u32 sys_reg3 = 0;
+	u64 cs_cap[2];
+
+	set_ddrconfig(dram, sdram_params->ch.ddrconfig);
+
+	sys_reg |= SYS_REG_ENC_DDRTYPE(sdram_params->dramtype);
+	sys_reg |= SYS_REG_ENC_ROW_3_4(sdram_params->ch.row_3_4);
+	sys_reg |= SYS_REG_ENC_RANK(sdram_params->ch.rank);
+	sys_reg |= SYS_REG_ENC_COL(sdram_params->ch.col);
+	sys_reg |= SYS_REG_ENC_BK(sdram_params->ch.bk);
+	sys_reg |= SYS_REG_ENC_BW(sdram_params->ch.bw);
+	sys_reg |= SYS_REG_ENC_DBW(sdram_params->ch.dbw);
+
+	SYS_REG_ENC_CS0_ROW_(sdram_params->ch.cs0_row, sys_reg, sys_reg3);
+	if (sdram_params->ch.cs1_row)
+		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row, sys_reg,
+				     sys_reg3);
+	sys_reg3 |= SYS_REG_ENC_CS1_COL(sdram_params->ch.col);
+	sys_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
+
+	writel(sys_reg, &dram->pmugrf->os_reg[2]);
+	writel(sys_reg3, &dram->pmugrf->os_reg[3]);
+
+	cs_cap[0] = get_cs_cap(sdram_params, 0);
+	cs_cap[1] = get_cs_cap(sdram_params, 1);
+	writel(((((cs_cap[1] >> 20) / 64) & 0xff) << 8) |
+			(((cs_cap[0] >> 20) / 64) & 0xff),
+			&dram->msch->devicesize);
+
+	writel(sdram_params->ch.noc_timings.ddrtiminga0.d32,
+	       &dram->msch->ddrtiminga0);
+	writel(sdram_params->ch.noc_timings.ddrtimingb0.d32,
+	       &dram->msch->ddrtimingb0);
+	writel(sdram_params->ch.noc_timings.ddrtimingc0.d32,
+	       &dram->msch->ddrtimingc0);
+	writel(sdram_params->ch.noc_timings.devtodev0.d32,
+	       &dram->msch->devtodev0);
+	writel(sdram_params->ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
+	writel(sdram_params->ch.noc_timings.ddr4timing.d32,
+	       &dram->msch->ddr4timing);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->agingx0);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging0);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging1);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging2);
+	writel(sdram_params->ch.noc_timings.agingx0, &dram->msch->aging3);
+}
+
+static void enable_low_power(struct dram_info *dram,
+			     struct px30_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *ddr_grf_base = dram->ddr_grf;
+	u32 grf_lp_con;
+
+	/*
+	 * bit0: grf_upctl_axi_cg_en = 1 enable upctl2 axi clk auto gating
+	 * bit1: grf_upctl_apb_cg_en = 1 ungated axi,core clk for apb access
+	 * bit2: grf_upctl_core_cg_en = 1 enable upctl2 core clk auto gating
+	 * bit3: grf_selfref_type2_en = 0 disable core clk gating when type2 sr
+	 * bit4: grf_upctl_syscreq_cg_en = 1
+	 *       ungating coreclk when c_sysreq assert
+	 * bit8-11: grf_auto_sr_dly = 6
+	 */
+	writel(0x1f1f0617, &dram->ddr_grf->ddr_grf_con[1]);
+
+	if (sdram_params->dramtype == DDR4)
+		grf_lp_con = (0x7 << 16) | (1 << 1);
+	else if (sdram_params->dramtype == DDR3)
+		grf_lp_con = (0x7 << 16) | (1 << 0);
+	else
+		grf_lp_con = (0x7 << 16) | (1 << 2);
+
+	/* en lpckdis_en */
+	grf_lp_con = grf_lp_con | (0x1 << (9 + 16)) | (0x1 << 9);
+	writel(grf_lp_con, ddr_grf_base + DDR_GRF_LP_CON);
+
+	/* enable sr, pd */
+	if (PD_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	if (SR_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
+}
+
+static int print_dec2hex(int i)
+{
+	int tmp;
+
+	tmp = (i % 10);
+	tmp |= ((i % 100) / 10) << 4;
+	tmp |= ((i % 1000) / 100) << 8;
+
+	return tmp;
+}
+
+/*
+ * pre_init: 0: pre init for dram cap detect
+ * 1: detect correct cap(except cs1 row)info, than reinit
+ * 2: after reinit, we detect cs1_row, if cs1_row not equal
+ *    to cs0_row and cs is in middle on ddrconf map, we need
+ *    to reinit dram, than set the correct ddrconf.
+ */
+static int sdram_init_(struct dram_info *dram,
+		       struct px30_sdram_params *sdram_params, u32 pre_init)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	rkclk_ddr_reset(dram, 1, 1, 1, 1);
+	udelay(10);
+	/*
+	 * dereset ddr phy psrstn to config pll,
+	 * if using phy pll psrstn must be dereset
+	 * before config pll
+	 */
+	rkclk_ddr_reset(dram, 1, 1, 1, 0);
+	rkclk_configure_ddr(dram, sdram_params);
+
+	if (pre_init == 1) {
+		switch (sdram_params->dramtype) {
+		case DDR3:
+			printascii("DDR3\n");
+			break;
+		case DDR4:
+			printascii("DDR4\n");
+			break;
+		case LPDDR2:
+			printascii("LPDDR2\n");
+			break;
+		case LPDDR3:
+		default:
+			printascii("LPDDR3\n");
+			break;
+		}
+		printhex4(print_dec2hex(sdram_params->ddr_freq));
+		printascii("MHz\n");
+	}
+
+	/* release phy srst to provide clk to ctrl */
+	rkclk_ddr_reset(dram, 1, 1, 0, 0);
+	udelay(10);
+	phy_soft_reset(dram);
+	/* release ctrl presetn, and config ctl registers */
+	rkclk_ddr_reset(dram, 1, 0, 0, 0);
+	pctl_cfg(dram, sdram_params);
+	sdram_params->ch.ddrconfig = calculate_ddrconfig(sdram_params);
+	set_ctl_address_map(dram, sdram_params);
+	phy_cfg(dram, sdram_params);
+
+	/* enable dfi_init_start to init phy after ctl srstn deassert */
+	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
+
+	rkclk_ddr_reset(dram, 0, 0, 0, 0);
+	/* wait for dfi_init_done and dram init complete */
+	while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0)
+		continue;
+
+	if (sdram_params->dramtype == LPDDR3)
+		write_mr(dram, 3, 11, 3, LPDDR3);
+
+	/* do ddr gate training */
+redo_cs0_training:
+	if (data_training(dram, 0, sdram_params->dramtype) != 0) {
+		if (pre_init != 0)
+			printascii("DTT cs0 error\n");
+		return -1;
+	}
+	if (check_rd_gate(dram)) {
+		printascii("re training cs0");
+		goto redo_cs0_training;
+	}
+
+	if (sdram_params->dramtype == LPDDR3) {
+		if ((read_mr(dram, 1, 8) & 0x3) != 0x3)
+			return -1;
+	} else if (sdram_params->dramtype == LPDDR2) {
+		if ((read_mr(dram, 1, 8) & 0x3) != 0x0)
+			return -1;
+	}
+	/* for px30: when 2cs, both 2 cs should be training */
+	if (pre_init != 0 && sdram_params->ch.rank == 2) {
+redo_cs1_training:
+		if (data_training(dram, 1, sdram_params->dramtype) != 0) {
+			printascii("DTT cs1 error\n");
+			return -1;
+		}
+		if (check_rd_gate(dram)) {
+			printascii("re training cs1");
+			goto redo_cs1_training;
+		}
+	}
+
+	if (sdram_params->dramtype == DDR4)
+		write_vrefdq(dram, 0x3, 5670, sdram_params->dramtype);
+
+	dram_all_config(dram, sdram_params);
+	enable_low_power(dram, sdram_params);
+
+	return 0;
+}
+
+static u64 dram_detect_cap(struct dram_info *dram,
+			   struct px30_sdram_params *sdram_params,
+			   unsigned char channel)
+{
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+
+	/*
+	 * for ddr3: ddrconf = 3
+	 * for ddr4: ddrconf = 12
+	 * for lpddr3: ddrconf = 3
+	 * default bw = 1
+	 */
+	u32 bk, bktmp;
+	u32 col, coltmp;
+	u32 row, rowtmp, row_3_4;
+	void __iomem *test_addr, *test_addr1;
+	u32 dbw;
+	u32 cs;
+	u32 bw = 1;
+	u64 cap = 0;
+	u32 dram_type = sdram_params->dramtype;
+	u32 pwrctl;
+
+	if (dram_type != DDR4) {
+		/* detect col and bk for ddr3/lpddr3 */
+		coltmp = 12;
+		bktmp = 3;
+		rowtmp = 16;
+
+		for (col = coltmp; col >= 9; col -= 1) {
+			writel(0, CONFIG_SYS_SDRAM_BASE);
+			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+					(1ul << (col + bw - 1ul)));
+			writel(PATTERN, test_addr);
+			if ((readl(test_addr) == PATTERN) &&
+			    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+				break;
+		}
+		if (col == 8) {
+			printascii("col error\n");
+			goto cap_err;
+		}
+
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (coltmp + bktmp + bw - 1ul)));
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			bk = 3;
+		else
+			bk = 2;
+		if (dram_type == DDR3)
+			dbw = 1;
+		else
+			dbw = 2;
+	} else {
+		/* detect bg for ddr4 */
+		coltmp = 10;
+		bktmp = 4;
+		rowtmp = 17;
+
+		col = 10;
+		bk = 2;
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (coltmp + bw + 1ul)));
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			dbw = 0;
+		else
+			dbw = 1;
+	}
+	/* detect row */
+	for (row = rowtmp; row > 12; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				(1ul << (row + bktmp + coltmp + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 12) {
+		printascii("row error");
+		goto cap_err;
+	}
+	/* detect row_3_4 */
+	test_addr = CONFIG_SYS_SDRAM_BASE;
+	test_addr1 = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
+
+	writel(0, test_addr);
+	writel(PATTERN, test_addr1);
+	if ((readl(test_addr) == 0) &&
+	    (readl(test_addr1) == PATTERN))
+		row_3_4 = 0;
+	else
+		row_3_4 = 1;
+
+	/* disable auto low-power */
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+
+	/* bw and cs detect using phy read gate training */
+	if (data_training(dram, 1, dram_type) == 0)
+		cs = 1;
+	else
+		cs = 0;
+
+	clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	setbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+
+	phy_soft_reset(dram);
+
+	if (data_training(dram, 0, dram_type) == 0)
+		bw = 2;
+	else
+		bw = 1;
+
+	/* restore auto low-power */
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
+
+	sdram_params->ch.rank = cs + 1;
+	sdram_params->ch.col = col;
+	sdram_params->ch.bk = bk;
+	sdram_params->ch.dbw = dbw;
+	sdram_params->ch.bw = bw;
+	sdram_params->ch.cs0_row = row;
+	sdram_params->ch.cs0_high16bit_row = row;
+	if (cs) {
+		sdram_params->ch.cs1_row = row;
+		sdram_params->ch.cs1_high16bit_row = row;
+	} else {
+		sdram_params->ch.cs1_row = 0;
+		sdram_params->ch.cs1_high16bit_row = 0;
+	}
+	sdram_params->ch.row_3_4 = row_3_4;
+
+	if (dram_type == DDR4)
+		cap = 1llu << (cs + row + bk + col + ((dbw == 0) ? 2 : 1) + bw);
+	else
+		cap = 1llu << (cs + row + bk + col + bw);
+
+	return cap;
+
+cap_err:
+	return 0;
+}
+
+static u32 remodify_sdram_params(struct px30_sdram_params *sdram_params)
+{
+	u32 tmp = 0, tmp_adr = 0, i;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		if (sdram_params->pctl_regs.pctl[i][0] == 0) {
+			tmp = sdram_params->pctl_regs.pctl[i][1];/* MSTR */
+			tmp_adr = i;
+		}
+	}
+
+	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
+
+	switch (sdram_params->ch.dbw) {
+	case 2:
+		tmp |= (3ul << 30);
+		break;
+	case 1:
+		tmp |= (2ul << 30);
+		break;
+	case 0:
+	default:
+		tmp |= (1ul << 30);
+		break;
+	}
+
+	if (sdram_params->ch.rank == 2)
+		tmp |= 3 << 24;
+	else
+		tmp |= 1 << 24;
+
+	tmp |= (2 - sdram_params->ch.bw) << 12;
+
+	sdram_params->pctl_regs.pctl[tmp_adr][1] = tmp;
+
+	return 0;
+}
+
+int dram_detect_high_row(struct dram_info *dram,
+			 struct px30_sdram_params *sdram_params,
+			 unsigned char channel)
+{
+	sdram_params->ch.cs0_high16bit_row = sdram_params->ch.cs0_row;
+	sdram_params->ch.cs1_high16bit_row = sdram_params->ch.cs1_row;
+
+	return 0;
+}
+
+static int dram_detect_cs1_row(struct px30_sdram_params *sdram_params,
+			       unsigned char channel)
+{
+	u32 ret = 0;
+	void __iomem *test_addr;
+	u32 row, bktmp, coltmp, bw;
+	u64 cs0_cap;
+	u32 byte_mask;
+
+	if (sdram_params->ch.rank == 2) {
+		cs0_cap = get_cs_cap(sdram_params, 0);
+
+		if (sdram_params->dramtype == DDR4) {
+			if (sdram_params->ch.dbw == 0)
+				bktmp = sdram_params->ch.bk + 2;
+			else
+				bktmp = sdram_params->ch.bk + 1;
+		} else {
+			bktmp = sdram_params->ch.bk;
+		}
+		bw = sdram_params->ch.bw;
+		coltmp = sdram_params->ch.col;
+
+		/*
+		 * because px30 support axi split,min bandwidth
+		 * is 8bit. if cs0 is 32bit, cs1 may 32bit or 16bit
+		 * so we check low 16bit data when detect cs1 row.
+		 * if cs0 is 16bit/8bit, we check low 8bit data.
+		 */
+		if (bw == 2)
+			byte_mask = 0xFFFF;
+		else
+			byte_mask = 0xFF;
+
+		/* detect cs1 row */
+		for (row = sdram_params->ch.cs0_row; row > 12; row--) {
+			test_addr = (void __iomem *)(CONFIG_SYS_SDRAM_BASE +
+				    cs0_cap +
+				    (1ul << (row + bktmp + coltmp + bw - 1ul)));
+			writel(0, CONFIG_SYS_SDRAM_BASE + cs0_cap);
+			writel(PATTERN, test_addr);
+
+			if (((readl(test_addr) & byte_mask) ==
+			     (PATTERN & byte_mask)) &&
+			    ((readl(CONFIG_SYS_SDRAM_BASE + cs0_cap) &
+			      byte_mask) == 0)) {
+				ret = row;
+				break;
+			}
+		}
+	}
+
+	return ret;
+}
+
+/* return: 0 = success, other = fail */
+static int sdram_init_detect(struct dram_info *dram,
+			     struct px30_sdram_params *sdram_params)
+{
+	u32 ret;
+	u32 sys_reg = 0;
+	u32 sys_reg3 = 0;
+
+	if (sdram_init_(dram, sdram_params, 0) != 0)
+		return -1;
+
+	if (dram_detect_cap(dram, sdram_params, 0) == 0)
+		return -1;
+
+	/* modify bw, cs related timing */
+	remodify_sdram_params(sdram_params);
+	/* reinit sdram by real dram cap */
+	ret = sdram_init_(dram, sdram_params, 1);
+	if (ret != 0)
+		goto out;
+
+	/* redetect cs1 row */
+	sdram_params->ch.cs1_row =
+		dram_detect_cs1_row(sdram_params, 0);
+	if (sdram_params->ch.cs1_row) {
+		sys_reg = readl(&dram->pmugrf->os_reg[2]);
+		sys_reg3 = readl(&dram->pmugrf->os_reg[3]);
+		SYS_REG_ENC_CS1_ROW_(sdram_params->ch.cs1_row,
+				     sys_reg, sys_reg3);
+		writel(sys_reg, &dram->pmugrf->os_reg[2]);
+		writel(sys_reg3, &dram->pmugrf->os_reg[3]);
+	}
+
+	ret = dram_detect_high_row(dram, sdram_params, 0);
+
+out:
+	return ret;
+}
+
+struct px30_sdram_params
+		*get_default_sdram_config(void)
+{
+	sdram_configs[0].skew = &skew;
+
+	return &sdram_configs[0];
+}
+
+/* return: 0 = success, other = fail */
+int sdram_init(void)
+{
+	struct px30_sdram_params *sdram_params;
+	int ret = 0;
+
+	printascii("DDR Init V1.07\n");
+
+	dram_info.phy = (void *)DDR_PHY_BASE_ADDR;
+	dram_info.pctl = (void *)DDRC_BASE_ADDR;
+	dram_info.grf = (void *)GRF_BASE_ADDR;
+	dram_info.cru = (void *)CRU_BASE_ADDR;
+	dram_info.msch = (void *)SERVER_MSCH0_BASE_ADDR;
+	dram_info.ddr_grf = (void *)DDR_GRF_BASE_ADDR;
+	dram_info.pmugrf = (void *)PMUGRF_BASE_ADDR;
+
+	sdram_params = get_default_sdram_config();
+	ret = sdram_init_detect(&dram_info, sdram_params);
+
+	if (ret)
+		goto error;
+
+	printascii("out\n");
+	return ret;
+error:
+	return (-1);
+}
+
+#else /* CONFIG_TPL_BUILD */
+
 static int px30_dmc_probe(struct udevice *dev)
 {
 	struct dram_info *priv = dev_get_priv(dev);
@@ -25,8 +1190,8 @@ static int px30_dmc_probe(struct udevice *dev)
 	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
-	priv->info.size = rockchip_sdram_size(
-				(phys_addr_t)&priv->pmugrf->os_reg[2]);
+	priv->info.size =
+		rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg[2]);
 
 	return 0;
 }
@@ -44,7 +1209,6 @@ static struct ram_ops px30_dmc_ops = {
 	.get_info = px30_dmc_get_info,
 };
 
-
 static const struct udevice_id px30_dmc_ids[] = {
 	{ .compatible = "rockchip,px30-dmc" },
 	{ }
@@ -58,3 +1222,4 @@ U_BOOT_DRIVER(dmc_px30) = {
 	.probe = px30_dmc_probe,
 	.priv_auto_alloc_size = sizeof(struct dram_info),
 };
+#endif /* CONFIG_TPL_BUILD */

commit 4998d279e602a0597b13fe9f2ad0ccb53c1381b5
Author: YouMin Chen <cym@rock-chips.com>
Date:   Wed Jul 18 17:06:42 2018 +0800

    rockchip: px30: enable FIFO for uart in board_debug_uart_init
    
    Change-Id: I87a49f871625e9a705cd1a5e33db162d8c761048
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 47375ecef6..4caafb7a82 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -10,6 +10,7 @@
 #include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/uart.h>
 #include <asm/armv8/mmu.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_px30.h>
@@ -52,6 +53,7 @@ int arch_cpu_init(void)
 }
 
 #define GRF_BASE		0xff140000
+#define UART2_BASE		0xff160000
 #define CRU_BASE		0xff2b0000
 void board_debug_uart_init(void)
 {
@@ -68,6 +70,7 @@ void board_debug_uart_init(void)
 
 #ifdef CONFIG_TPL_BUILD
 	static struct px30_cru * const cru = (void *)CRU_BASE;
+	static struct rk_uart * const uart = (void *)UART2_BASE;
 
 	/* GRF_GPIO2BH_IOMUX */
 	enum {
@@ -119,6 +122,9 @@ void board_debug_uart_init(void)
 	rk_clrsetreg(&grf->gpio2bh_iomux,
 		     GPIO2B4_MASK,
 		     GPIO2B4_UART2_TXM1 << GPIO2B4_SHIFT);
+
+	/* enable FIFO */
+	writel(0x1, &uart->sfe);
 #else
 #ifdef CONFIG_SPL_BUILD
 	/* GRF_GPIO1DL_IOMUX */

commit 0f72a32513dbaf49205ce78e74f8b9195e246ec8
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 09:08:43 2018 +0800

    rockchip: px30: add UART clock and iomux for TPL_BUILD
    
    Change-Id: Id2fed3e99e0e421063e006fcf857fed889216b72
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 3094246b38..1cadbe4b54 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -274,7 +274,7 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
-	/* CRU_CLK_SEL24_CON */
+	/* CRU_CLK_SEL37_CON */
 	UART2_PLL_SEL_SHIFT	= 14,
 	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
 	UART2_PLL_SEL_GPLL	= 0,
@@ -284,7 +284,7 @@ enum {
 	UART2_DIV_CON_SHIFT	= 0,
 	UART2_DIV_CON_MASK	= 0x1f << UART2_DIV_CON_SHIFT,
 
-	/* CRU_CLK_SEL25_CON */
+	/* CRU_CLK_SEL38_CON */
 	UART2_CLK_SEL_SHIFT	= 14,
 	UART2_CLK_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
 	UART2_CLK_SEL_UART2	= 0,
diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
index 65d99ccbd6..fa9f501da7 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
@@ -142,452 +142,4 @@ struct px30_pmugrf {
 
 check_member(px30_pmugrf, reset_function_status, 0x230);
 
-/* GRF_GPIO0A_IOMUX */
-enum {
-	GPIO0A7_SHIFT		= 14,
-	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
-	GPIO0A7_GPIO		= 0,
-	GPIO0A7_I2C3_SDA,
-	GPIO0A7_HDMI_DDCSDA,
-
-	GPIO0A6_SHIFT		= 12,
-	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
-	GPIO0A6_GPIO		= 0,
-	GPIO0A6_I2C3_SCL,
-	GPIO0A6_HDMI_DDCSCL,
-
-	GPIO0A3_SHIFT		= 6,
-	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
-	GPIO0A3_GPIO		= 0,
-	GPIO0A3_I2C1_SDA,
-	GPIO0A3_SDIO_CMD,
-
-	GPIO0A2_SHIFT		= 4,
-	GPIO0A2_MASK		= 3 << GPIO0A2_SHIFT,
-	GPIO0A2_GPIO		= 0,
-	GPIO0A2_I2C1_SCL,
-
-	GPIO0A1_SHIFT		= 2,
-	GPIO0A1_MASK		= 3 << GPIO0A1_SHIFT,
-	GPIO0A1_GPIO		= 0,
-	GPIO0A1_I2C0_SDA,
-
-	GPIO0A0_SHIFT		= 0,
-	GPIO0A0_MASK		= 3 << GPIO0A0_SHIFT,
-	GPIO0A0_GPIO		= 0,
-	GPIO0A0_I2C0_SCL,
-};
-
-/* GRF_GPIO0B_IOMUX */
-enum {
-	GPIO0B7_SHIFT		= 14,
-	GPIO0B7_MASK		= 3 << GPIO0B7_SHIFT,
-	GPIO0B7_GPIO		= 0,
-	GPIO0B7_HDMI_HDP,
-
-	GPIO0B6_SHIFT		= 12,
-	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
-	GPIO0B6_GPIO		= 0,
-	GPIO0B6_I2S_SDI,
-	GPIO0B6_SPI_CSN0,
-
-	GPIO0B5_SHIFT		= 10,
-	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
-	GPIO0B5_GPIO		= 0,
-	GPIO0B5_I2S_SDO,
-	GPIO0B5_SPI_RXD,
-
-	GPIO0B3_SHIFT		= 6,
-	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
-	GPIO0B3_GPIO		= 0,
-	GPIO0B3_I2S1_LRCKRX,
-	GPIO0B3_SPI_TXD,
-
-	GPIO0B1_SHIFT		= 2,
-	GPIO0B1_MASK		= 3 << GPIO0B1_SHIFT,
-	GPIO0B1_GPIO		= 0,
-	GPIO0B1_I2S_SCLK,
-	GPIO0B1_SPI_CLK,
-
-	GPIO0B0_SHIFT		= 0,
-	GPIO0B0_MASK		= 3,
-	GPIO0B0_GPIO		= 0,
-	GPIO0B0_I2S_MCLK,
-};
-
-/* GRF_GPIO0C_IOMUX */
-enum {
-	GPIO0C4_SHIFT		= 8,
-	GPIO0C4_MASK		= 3 << GPIO0C4_SHIFT,
-	GPIO0C4_GPIO		= 0,
-	GPIO0C4_HDMI_CECSDA,
-
-	GPIO0C1_SHIFT		= 2,
-	GPIO0C1_MASK		= 3 << GPIO0C1_SHIFT,
-	GPIO0C1_GPIO		= 0,
-	GPIO0C1_UART0_RSTN,
-	GPIO0C1_CLK_OUT1,
-};
-
-/* GRF_GPIO0D_IOMUX */
-enum {
-	GPIO0D6_SHIFT		= 12,
-	GPIO0D6_MASK		= 3 << GPIO0D6_SHIFT,
-	GPIO0D6_GPIO		= 0,
-	GPIO0D6_SDIO_PWREN,
-	GPIO0D6_PWM11,
-
-
-	GPIO0D4_SHIFT		= 8,
-	GPIO0D4_MASK		= 3 << GPIO0D4_SHIFT,
-	GPIO0D4_GPIO		= 0,
-	GPIO0D4_PWM2,
-
-	GPIO0D3_SHIFT		= 6,
-	GPIO0D3_MASK		= 3 << GPIO0D3_SHIFT,
-	GPIO0D3_GPIO		= 0,
-	GPIO0D3_PWM1,
-
-	GPIO0D2_SHIFT		= 4,
-	GPIO0D2_MASK		= 3 << GPIO0D2_SHIFT,
-	GPIO0D2_GPIO		= 0,
-	GPIO0D2_PWM0,
-};
-
-/* GRF_GPIO1A_IOMUX */
-enum {
-	GPIO1A7_SHIFT		= 14,
-	GPIO1A7_MASK		= 1,
-	GPIO1A7_GPIO		= 0,
-	GPIO1A7_SDMMC_WRPRT,
-};
-
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT		= 14,
-	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
-	GPIO1B7_GPIO		= 0,
-	GPIO1B7_SDMMC_CMD,
-
-	GPIO1B6_SHIFT		= 12,
-	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
-	GPIO1B6_GPIO		= 0,
-	GPIO1B6_SDMMC_PWREN,
-
-	GPIO1B4_SHIFT		= 8,
-	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
-	GPIO1B4_GPIO		= 0,
-	GPIO1B4_SPI_CSN1,
-	GPIO1B4_PWM12,
-
-	GPIO1B3_SHIFT		= 6,
-	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
-	GPIO1B3_GPIO		= 0,
-	GPIO1B3_UART1_RSTN,
-	GPIO1B3_PWM13,
-
-	GPIO1B2_SHIFT		= 4,
-	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
-	GPIO1B2_GPIO		= 0,
-	GPIO1B2_UART1_SIN,
-	GPIO1B2_UART21_SIN,
-
-	GPIO1B1_SHIFT		= 2,
-	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
-	GPIO1B1_GPIO		= 0,
-	GPIO1B1_UART1_SOUT,
-	GPIO1B1_UART21_SOUT,
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT		= 14,
-	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
-	GPIO1C7_GPIO		= 0,
-	GPIO1C7_NAND_CS3,
-	GPIO1C7_EMMC_RSTNOUT,
-
-	GPIO1C6_SHIFT		= 12,
-	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
-	GPIO1C6_GPIO		= 0,
-	GPIO1C6_NAND_CS2,
-	GPIO1C6_EMMC_CMD,
-
-
-	GPIO1C5_SHIFT		= 10,
-	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
-	GPIO1C5_GPIO		= 0,
-	GPIO1C5_SDMMC_D3,
-	GPIO1C5_JTAG_TMS,
-
-	GPIO1C4_SHIFT		= 8,
-	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
-	GPIO1C4_GPIO		= 0,
-	GPIO1C4_SDMMC_D2,
-	GPIO1C4_JTAG_TCK,
-
-	GPIO1C3_SHIFT		= 6,
-	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
-	GPIO1C3_GPIO		= 0,
-	GPIO1C3_SDMMC_D1,
-	GPIO1C3_UART2_SIN,
-
-	GPIO1C2_SHIFT		= 4,
-	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
-	GPIO1C2_GPIO		= 0,
-	GPIO1C2_SDMMC_D0,
-	GPIO1C2_UART2_SOUT,
-
-	GPIO1C1_SHIFT		= 2,
-	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
-	GPIO1C1_GPIO		= 0,
-	GPIO1C1_SDMMC_DETN,
-
-	GPIO1C0_SHIFT		= 0,
-	GPIO1C0_MASK		= 3 << GPIO1C0_SHIFT,
-	GPIO1C0_GPIO		= 0,
-	GPIO1C0_SDMMC_CLKOUT,
-};
-
-/* GRF_GPIO1DL_IOMUX */
-enum {
-
-	GPIO1D3_SHIFT		= 12,
-	GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
-	GPIO1D3_GPIO		= 0,
-	GPIO1D3_SDMMC1_D1,
-	GPIO1D3_UART2_RXM0,
-
-	GPIO1D2_SHIFT		= 8,
-	GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
-	GPIO1D2_GPIO		= 0,
-	GPIO1D2_SDMMC1_D0,
-	GPIO1D2_UART2_TXM0,
-
-	GPIO1D1_SHIFT		= 4,
-	GPIO1D1_MASK		= 0xf << GPIO1D1_SHIFT,
-	GPIO1D1_GPIO		= 0,
-	GPIO1D1_SDMMC1_D3,
-
-	GPIO1D0_SHIFT		= 0,
-	GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
-	GPIO1D0_GPIO		= 0,
-	GPIO1D0_SDMMC1_D2,
-};
-/* GRF_GPIO1DH_IOMUX */
-enum {
-
-	GPIO1D7_SHIFT		= 14,
-	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
-	GPIO1D7_GPIO		= 0,
-	GPIO1D7_NAND_D7,
-	GPIO1D7_EMMC_D7,
-
-	GPIO1D6_SHIFT		= 12,
-	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
-	GPIO1D6_GPIO		= 0,
-	GPIO1D6_NAND_D6,
-	GPIO1D6_EMMC_D6,
-
-	GPIO1D5_SHIFT		= 10,
-	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
-	GPIO1D5_GPIO		= 0,
-	GPIO1D5_NAND_D5,
-	GPIO1D5_EMMC_D5,
-
-	GPIO1D4_SHIFT		= 8,
-	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
-	GPIO1D4_GPIO		= 0,
-	GPIO1D4_NAND_D4,
-	GPIO1D4_EMMC_D4,
-};
-/* GRF_GPIO2A_IOMUX */
-enum {
-	GPIO2A7_SHIFT		= 14,
-	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_NAND_DQS,
-	GPIO2A7_EMMC_CLKOUT,
-
-	GPIO2A5_SHIFT		= 10,
-	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO		= 0,
-	GPIO2A5_NAND_WP,
-	GPIO2A5_EMMC_PWREN,
-
-	GPIO2A4_SHIFT		= 8,
-	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO		= 0,
-	GPIO2A4_NAND_RDY,
-	GPIO2A4_EMMC_CMD,
-
-	GPIO2A3_SHIFT		= 6,
-	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO		= 0,
-	GPIO2A3_NAND_RDN,
-	GPIO2A4_SPI1_CSN1,
-
-	GPIO2A2_SHIFT		= 4,
-	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO		= 0,
-	GPIO2A2_NAND_WRN,
-	GPIO2A4_SPI1_CSN0,
-
-	GPIO2A1_SHIFT		= 2,
-	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO		= 0,
-	GPIO2A1_NAND_CLE,
-	GPIO2A1_SPI1_TXD,
-
-	GPIO2A0_SHIFT		= 0,
-	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO		= 0,
-	GPIO2A0_NAND_ALE,
-	GPIO2A0_SPI1_RXD,
-};
-
-/* GRF_GPIO2B_IOMUX */
-enum {
-	GPIO2B7_SHIFT		= 14,
-	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
-	GPIO2B7_GPIO		= 0,
-	GPIO2B7_GMAC_RXER,
-
-	GPIO2B6_SHIFT		= 12,
-	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO		= 0,
-	GPIO2B6_GMAC_CLK,
-	GPIO2B6_MAC_LINK,
-
-	GPIO2B5_SHIFT		= 10,
-	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO		= 0,
-	GPIO2B5_GMAC_TXEN,
-
-	GPIO2B4_SHIFT		= 8,
-	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO		= 0,
-	GPIO2B4_GMAC_MDIO,
-
-	GPIO2B3_SHIFT		= 6,
-	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO		= 0,
-	GPIO2B3_GMAC_RXCLK,
-
-	GPIO2B2_SHIFT		= 4,
-	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO		= 0,
-	GPIO2B2_GMAC_CRS,
-
-	GPIO2B1_SHIFT		= 2,
-	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO		= 0,
-	GPIO2B1_GMAC_TXCLK,
-
-
-	GPIO2B0_SHIFT		= 0,
-	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO		= 0,
-	GPIO2B0_GMAC_RXDV,
-	GPIO2B0_MAC_SPEED_IOUT,
-};
-
-/* GRF_GPIO2C_IOMUX */
-enum {
-	GPIO2C7_SHIFT		= 14,
-	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
-	GPIO2C7_GPIO		= 0,
-	GPIO2C7_GMAC_TXD3,
-
-	GPIO2C6_SHIFT		= 12,
-	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
-	GPIO2C6_GPIO		= 0,
-	GPIO2C6_GMAC_TXD2,
-
-	GPIO2C5_SHIFT		= 10,
-	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
-	GPIO2C5_GPIO		= 0,
-	GPIO2C5_I2C2_SCL,
-	GPIO2C5_GMAC_RXD2,
-
-	GPIO2C4_SHIFT		= 8,
-	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
-	GPIO2C4_GPIO		= 0,
-	GPIO2C4_I2C2_SDA,
-	GPIO2C4_GMAC_RXD3,
-
-	GPIO2C3_SHIFT		= 6,
-	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
-	GPIO2C3_GPIO		= 0,
-	GPIO2C3_GMAC_TXD0,
-
-	GPIO2C2_SHIFT		= 4,
-	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
-	GPIO2C2_GPIO		= 0,
-	GPIO2C2_GMAC_TXD1,
-
-	GPIO2C1_SHIFT		= 2,
-	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
-	GPIO2C1_GPIO		= 0,
-	GPIO2C1_GMAC_RXD0,
-
-	GPIO2C0_SHIFT		= 0,
-	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
-	GPIO2C0_GPIO		= 0,
-	GPIO2C0_GMAC_RXD1,
-};
-
-/* GRF_GPIO2D_IOMUX */
-enum {
-	GPIO2D1_SHIFT		= 2,
-	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
-	GPIO2D1_GPIO		= 0,
-	GPIO2D1_GMAC_MDC,
-
-	GPIO2D0_SHIFT		= 0,
-	GPIO2D0_MASK		= 3,
-	GPIO2D0_GPIO		= 0,
-	GPIO2D0_GMAC_COL,
-};
-
-/* GRF_GPIO3C_IOMUX */
-enum {
-	GPIO3C6_SHIFT		= 12,
-	GPIO3C6_MASK		= 3 << GPIO3C6_SHIFT,
-	GPIO3C6_GPIO		= 0,
-	GPIO3C6_DRV_VBUS1,
-
-	GPIO3C5_SHIFT		= 10,
-	GPIO3C5_MASK		= 3 << GPIO3C5_SHIFT,
-	GPIO3C5_GPIO		= 0,
-	GPIO3C5_PWM10,
-
-	GPIO3C1_SHIFT		= 2,
-	GPIO3C1_MASK		= 3 << GPIO3C1_SHIFT,
-	GPIO3C1_GPIO		= 0,
-	GPIO3C1_DRV_VBUS,
-};
-
-/* GRF_GPIO3D_IOMUX */
-enum {
-	GPIO3D2_SHIFT	= 4,
-	GPIO3D2_MASK	= 3 << GPIO3D2_SHIFT,
-	GPIO3D2_GPIO	= 0,
-	GPIO3D2_PWM3,
-};
-
-/* GRF_IOFUNC_CON0 */
-enum {
-	CON_IOMUX_UART2SEL_SHIFT	= 10,
-	CON_IOMUX_UART2SEL_MASK	= 3 << CON_IOMUX_UART2SEL_SHIFT,
-	CON_IOMUX_UART2SEL_M0	= 0,
-	CON_IOMUX_UART2SEL_M1,
-	CON_IOMUX_UART2SEL_USBPHY,
-};
-
-/* GRF_MACPHY_CON0 */
-enum {
-	MACPHY_CFG_ENABLE_SHIFT = 0,
-	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,
-};
 #endif
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 0aefee52dd..47375ecef6 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <asm/io.h>
+#include <asm/arch/cru_px30.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
 #include <asm/armv8/mmu.h>
@@ -49,11 +50,102 @@ int arch_cpu_init(void)
 
 	return 0;
 }
-#define GRF_BASE	0xff140000
+
+#define GRF_BASE		0xff140000
+#define CRU_BASE		0xff2b0000
 void board_debug_uart_init(void)
 {
-static struct px30_grf * const grf = (void *)GRF_BASE;
+	static struct px30_grf * const grf = (void *)GRF_BASE;
+
+	/* GRF_IOFUNC_CON0 */
+	enum {
+		CON_IOMUX_UART2SEL_SHIFT	= 10,
+		CON_IOMUX_UART2SEL_MASK = 3 << CON_IOMUX_UART2SEL_SHIFT,
+		CON_IOMUX_UART2SEL_M0	= 0,
+		CON_IOMUX_UART2SEL_M1,
+		CON_IOMUX_UART2SEL_USBPHY,
+	};
+
+#ifdef CONFIG_TPL_BUILD
+	static struct px30_cru * const cru = (void *)CRU_BASE;
+
+	/* GRF_GPIO2BH_IOMUX */
+	enum {
+		GPIO2B7_SHIFT		= 12,
+		GPIO2B7_MASK		= 0xf << GPIO2B7_SHIFT,
+		GPIO2B7_GPIO		= 0,
+		GPIO2B7_CIF_D10M0,
+		GPIO2B7_I2C2_SCL,
+
+		GPIO2B6_SHIFT		= 8,
+		GPIO2B6_MASK		= 0xf << GPIO2B6_SHIFT,
+		GPIO2B6_GPIO		= 0,
+		GPIO2B6_CIF_D1M0,
+		GPIO2B6_UART2_RXM1,
+
+		GPIO2B5_SHIFT		= 4,
+		GPIO2B5_MASK		= 0xf << GPIO2B5_SHIFT,
+		GPIO2B5_GPIO		= 0,
+		GPIO2B5_PWM2,
+
+		GPIO2B4_SHIFT		= 4,
+		GPIO2B4_MASK		= 0xf << GPIO2B4_SHIFT,
+		GPIO2B4_GPIO		= 0,
+		GPIO2B4_CIF_D0M0,
+		GPIO2B4_UART2_TXM1,
+	};
+
+	/* uart_sel_clk default select 24MHz */
+	rk_clrsetreg(&cru->clksel_con[37],
+		     UART2_PLL_SEL_MASK | UART2_DIV_CON_MASK,
+		     UART2_PLL_SEL_24M << UART2_PLL_SEL_SHIFT | 0);
+	rk_clrsetreg(&cru->clksel_con[38],
+		     UART2_CLK_SEL_MASK,
+		     UART2_CLK_SEL_UART2 << UART2_CLK_SEL_SHIFT);
+
+	/* Enable early UART2 */
+	rk_clrsetreg(&grf->iofunc_con0,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_M1 << CON_IOMUX_UART2SEL_SHIFT);
+
+	/*
+	 * Set iomux to UART2_M0 and UART2_M1.
+	 * Because uart2_rxm0 and uart2_txm0 are default reset value,
+	 * so only need set uart2_rxm1 and uart2_txm1 here.
+	 */
+	rk_clrsetreg(&grf->gpio2bh_iomux,
+		     GPIO2B6_MASK,
+		     GPIO2B6_UART2_RXM1 << GPIO2B6_SHIFT);
+	rk_clrsetreg(&grf->gpio2bh_iomux,
+		     GPIO2B4_MASK,
+		     GPIO2B4_UART2_TXM1 << GPIO2B4_SHIFT);
+#else
 #ifdef CONFIG_SPL_BUILD
+	/* GRF_GPIO1DL_IOMUX */
+	enum {
+		GPIO1D3_SHIFT		= 12,
+		GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
+		GPIO1D3_GPIO		= 0,
+		GPIO1D3_SDMMC_D1,
+		GPIO1D3_UART2_RXM0,
+
+		GPIO1D2_SHIFT		= 8,
+		GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
+		GPIO1D2_GPIO		= 0,
+		GPIO1D2_SDMMC_D0,
+		GPIO1D2_UART2_TXM0,
+
+		GPIO1D1_SHIFT		= 4,
+		GPIO1D1_MASK		= 0xf << GPIO1D1_SHIFT,
+		GPIO1D1_GPIO		= 0,
+		GPIO1D1_SDIO_D3,
+
+		GPIO1D0_SHIFT		= 4,
+		GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
+		GPIO1D0_GPIO		= 0,
+		GPIO1D0_SDIO_D2,
+	};
+
 	/* Do not set the iomux in U-Boot proper because SD card may using it */
 	/* Enable early UART2 channel m0 on the px30 */
 	rk_clrsetreg(&grf->gpio1dl_iomux,
@@ -65,6 +157,7 @@ static struct px30_grf * const grf = (void *)GRF_BASE;
 	rk_clrsetreg(&grf->iofunc_con0,
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
+#endif
 }
 
 int set_armclk_rate(void)

commit c58827f3a4ebc8f82f5c015153c94ab51035928c
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 09:30:38 2018 +0800

    rockchip: px30: not need syscon_px30.c when build TPL_TINY_FRAMEWORK
    
    Change-Id: I50456633160241f25cdc58201739111345b6884c
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/Makefile b/arch/arm/mach-rockchip/px30/Makefile
index 73d159c32a..027b304acd 100644
--- a/arch/arm/mach-rockchip/px30/Makefile
+++ b/arch/arm/mach-rockchip/px30/Makefile
@@ -6,5 +6,7 @@
 
 
 obj-y += clk_px30.o
+ifneq ($(CONFIG_TPL_BUILD)$(CONFIG_TPL_TINY_FRAMEWORK),yy)
 obj-y += syscon_px30.o
+endif
 obj-y += px30.o

commit 7af4eca73c1c016e8ce5157d5aa0dc77c015c3e1
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 20:05:41 2018 +0800

    drivers: ram: ram-uclass depend on TPL_DM or SPL_DM
    
    Some platform with sram size small, not use TPL_DM framework for TPL,
    so never need ram-uclass.
    This can remove _u_boot_list_2_uclass_2_ram from tpl bin.
    
    Change-Id: I93a6cfcc164f193d12f763d41ce68b5b20233541
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 51ae6be655..8d102f9c1d 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -4,7 +4,7 @@
 #
 # SPDX-License-Identifier:      GPL-2.0+
 #
-obj-$(CONFIG_RAM) += ram-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)DM) += ram-uclass.o
 obj-$(CONFIG_SANDBOX) += sandbox_ram.o
 obj-$(CONFIG_STM32_SDRAM) += stm32_sdram.o
 obj-$(CONFIG_ARCH_BMIPS) += bmips_ram.o

commit ee6382047fd997ce7f89191e5de4e041ef9e5cb3
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 19:56:04 2018 +0800

    drivers: ram: TPL_RAM remove dependency of TPL_DM
    
    Some platform has a very limited SRAM space to run the TPL with
    TPL_DM framework, so it's better to remove the dependency of
    TPL_DM here.
    
    Change-Id: Ia8bb6351e21f6590f68efe3663a60ca3653ba78d
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 47969f3f28..c3273ab7d9 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -19,7 +19,7 @@ config SPL_RAM
 
 config TPL_RAM
 	bool "Enable RAM support in TPL"
-	depends on RAM && TPL_DM
+	depends on RAM
 	help
 	  The RAM subsystem adds a small amount of overhead to the image.
 	  If this is acceptable and you have a need to use RAM drivers in

commit 5dd9d28a4c5bf06ae4d664edf0cbd39d206c10d9
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 19:41:29 2018 +0800

    rockchip: ARM64: tpl: add timer_init and __udelay in tpl.c
    
    For ARM64,it don't have define timer_init and __udelay except
    lib/timer.c.
    If undefine CONFIG_TPL_LIBGENERIC_SUPPORT for reduce TPL size,
    it need add timer_init and __udelay to replace.
    
    Change-Id: Ia9fbac7e21675b8d7d6c542d01d3eebc3be245e4
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 315ba3ad20..ee70aae527 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -34,6 +34,30 @@ void putc(char c)
 #endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
 #ifndef CONFIG_TPL_LIBGENERIC_SUPPORT
+#ifdef CONFIG_ARM64
+/* for ARM64,it don't have define timer_init and __udelay except lib/timer.c */
+int __weak timer_init(void)
+{
+	return 0;
+}
+
+void __weak __udelay(unsigned long usec)
+{
+	u64 i, j, count;
+
+	asm volatile ("MRS %0, CNTPCT_EL0" : "=r"(count));
+	i = count;
+	/* usec to count,24MHz */
+	j = usec * 24;
+	i += j;
+	while (1) {
+		asm volatile ("MRS %0, CNTPCT_EL0" : "=r"(count));
+		if (count > i)
+			break;
+	}
+}
+#endif /* CONFIG_ARM64 */
+
 void udelay(unsigned long usec)
 {
 	__udelay(usec);
@@ -45,7 +69,7 @@ void hang(void)
         for (;;)
                 ;
 }
-#endif
+#endif /* CONFIG_TPL_LIBGENERIC_SUPPORT */
 
 u32 spl_boot_device(void)
 {

commit 37e5dcc8baea3dc897741e9be973d7d226f5edb4
Author: YouMin Chen <cym@rock-chips.com>
Date:   Thu Jul 5 19:30:58 2018 +0800

    rockchip: ARM64: tpl: modify TPL_TINY_FRAMEWORK flow to reduce code size
    
    If sram size is small for TPL build, it can defined
    CONFIG_TPL_TINY_FRAMEWORK to reduce TPL size.
    For ARM64 if defined CONFIG_TPL_TINY_FRAMEWORK when build TPL, after
    save_boot_params(), it jump to board_init_f() directly, then return to
    maskrom. and stack also use maskrom defined result, never change the SP.
    
    Change-Id: I80dc414fcc276f5ea2c09afd6d1eb16e2f2f4cf6
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 6d47988a13..3336c1e0fd 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -30,6 +30,7 @@ _start:
 	b	reset
 #endif
 
+#if !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	.align 3
 
 .globl	_TEXT_BASE
@@ -355,3 +356,4 @@ ENDPROC(c_runtime_cpu_setup)
 WEAK(save_boot_params)
 	b	save_boot_params_ret	/* back to my caller */
 ENDPROC(save_boot_params)
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 5d35c35c28..d5bbe31e84 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -42,9 +42,18 @@ entry_counter:
 
 #if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
 	/* U-Boot proper of armv7 do not need this */
+#if CONFIG_IS_ENABLED(TINY_FRAMEWORK) && defined(CONFIG_ARM64)
+	/* Allow the board to save important registers */
+	b save_boot_params
+.globl	save_boot_params_ret
+save_boot_params_ret:
+	b board_init_f
+#else
 	b reset
 #endif
 
+#endif
+
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 3cb9b7d5c6..315ba3ad20 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -57,6 +57,14 @@ __weak void rockchip_stimer_init(void)
 #ifndef CONFIG_ARM64
 	asm volatile("mcr p15, 0, %0, c14, c0, 0"
 		     : : "r"(COUNTER_FREQUENCY));
+#elif CONFIG_IS_ENABLED(TINY_FRAMEWORK)
+	/*
+	 * For ARM64,generally initialize CNTFRQ in start.S,
+	 * but if defined CONFIG_TPL_TINY_FRAMEWORK should skip start.S.
+	 * So initialize CNTFRQ to 24MHz here.
+	 */
+	asm volatile("msr CNTFRQ_EL0, %0"
+		     : : "r" (COUNTER_FREQUENCY));
 #endif
 	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);

commit ba5fd738de215472cc7c5f5511860738cf87df12
Author: YouMin Chen <cym@rock-chips.com>
Date:   Fri Jul 6 19:58:32 2018 +0800

    rockchip: tpl: rename CONFIG_TINY_TPL to CONFIG_TPL_TINY_FRAMEWORK
    
    Change-Id: Ia05a73467578f5620a9ba168e67bcfb02c40e1d0
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index c6725f5993..536ed98b31 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,7 +7,7 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
-#if !defined(CONFIG_SPL_FRAMEWORK) || defined(CONFIG_TINY_TPL)
+#if !defined(CONFIG_SPL_FRAMEWORK) || CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 int sdram_init(void);
 #endif
 
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index d712130d55..3cb9b7d5c6 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -71,7 +71,7 @@ __weak int arch_cpu_init(void)
 
 void board_init_f(ulong dummy)
 {
-#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
+#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	struct udevice *dev;
 	int ret;
 #endif
@@ -93,7 +93,7 @@ void board_init_f(ulong dummy)
 				U_BOOT_TIME ")\n");
 #endif
 
-#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
+#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
@@ -104,7 +104,7 @@ void board_init_f(ulong dummy)
 	/* Init ARM arch timer */
 	timer_init();
 
-#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
+#if defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK)
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);
@@ -119,7 +119,7 @@ void board_init_f(ulong dummy)
 #endif
 }
 
-#if !(defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL))
+#if !(defined(CONFIG_SPL_FRAMEWORK) && !CONFIG_IS_ENABLED(TINY_FRAMEWORK))
 /* Place Holders */
 void board_init_r(gd_t *id, ulong dest_addr)
 {
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 0be334db2a..42203591d0 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -852,7 +852,7 @@ config TPL_LIBGENERIC_SUPPORT
 	  Enable support for generic U-Boot libraries within TPL. See
 	  SPL_LIBGENERIC_SUPPORT for details.
 
-config TINY_TPL
+config TPL_TINY_FRAMEWORK
 	bool "Support not to use spl framework in TPL"
 	help
 	  Enable support for not using spl framework in TPL, to reduce the TPL size.
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 2267db8801..3e33f3138b 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -9,7 +9,7 @@
 #
 
 ifeq ($(CONFIG_TPL_BUILD), y)
-ifndef CONFIG_TINY_TPL
+ifndef CONFIG_TPL_TINY_FRAMEWORK
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 endif
 else
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 9c064ce8e7..8ee6329d53 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -28,6 +28,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
+CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 8bfd8f46c5..565ec37f67 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -28,6 +28,7 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_SPL_OPTEE=y
+CONFIG_TPL_TINY_FRAMEWORK=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index fc4f814355..f136a5bb2b 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -14,7 +14,6 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
-#define CONFIG_TINY_TPL
 #define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_SYS_NS16550_SERIAL
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 0d0426757d..e2f0741db6 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -65,7 +65,7 @@ libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/)
 libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
 
 ifeq ($(CONFIG_TPL_BUILD),y)
-ifndef CONFIG_TINY_TPL
+ifndef CONFIG_TPL_TINY_FRAMEWORK
 libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/
 endif
 else
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 12430e5d73..de92384d40 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4870,9 +4870,9 @@ CONFIG_TIZEN
 CONFIG_TI_KEYSTONE_SERDES
 CONFIG_TI_KSNAV
 CONFIG_TI_SPI_MMAP
-CONFIG_TINY_TPL
 CONFIG_TMU_TIMER
 CONFIG_TPL_PAD_TO
+CONFIG_TPL_TINY_FRAMEWORK
 CONFIG_TPM_TIS_BASE_ADDRESS
 CONFIG_TPS6586X_POWER
 CONFIG_TQM834X

commit 891b189dd2ad7f9a2ac80ff0000f696418165b79
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Jun 26 19:53:18 2018 +0800

    rockchip: sdram: change sdram_init return value to int
    
    Change-Id: Iccd78d83e898683d7315dfa1670a0308a5863824
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
index 4ce2ba5e6e..686e778f98 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
@@ -331,7 +331,7 @@ struct rk3036_ddr_config {
 };
 
 /* rk3036 sdram initial */
-void sdram_init(void);
+int sdram_init(void);
 
 /* get ddr die config, implement in specific board */
 void get_ddr_config(struct rk3036_ddr_config *config);
diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index f66bccee2f..c6725f5993 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -8,7 +8,7 @@
 #define _ASM_ARCH_SYS_PROTO_H
 
 #if !defined(CONFIG_SPL_FRAMEWORK) || defined(CONFIG_TINY_TPL)
-void sdram_init(void);
+int sdram_init(void);
 #endif
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index ea4e1d9ec5..55abfd2166 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -738,7 +738,7 @@ size_t sdram_size(void)
 	return size;
 }
 
-void sdram_init(void)
+int sdram_init(void)
 {
 	struct rk3036_sdram_priv sdram_priv;
 
@@ -763,6 +763,8 @@ void sdram_init(void)
 	data_training(&sdram_priv);
 	move_to_access_state(&sdram_priv);
 	dram_cfg_rbc(&sdram_priv);
+
+	return 0;
 }
 
 #if !CONFIG_IS_ENABLED(RAM)
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
index f068604d3b..d8851adf79 100644
--- a/drivers/ram/rockchip/sdram_rv1108.c
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -112,7 +112,7 @@ void *get_base_addr(unsigned int *reg, unsigned int offset)
 	return (void *)p;
 }
 
-void sdram_init(void)
+int sdram_init(void)
 {
 	int ret;
 	struct dram_info *sdram_priv = &info;
@@ -135,4 +135,6 @@ void sdram_init(void)
 	ret = rv1108_sdram_init(sdram_priv, params);
 	if (ret)
 		debug("rv1108_sdram_init() fail!");
+
+	return ret;
 }

commit 5589e612928b7bd413fe22545264384e74915eee
Author: YouMin Chen <cym@rock-chips.com>
Date:   Tue Jun 26 20:15:09 2018 +0800

    rockchip: sdram: the enum of DDR type move to sdram_common.h
    
    Change-Id: I62877384b6f0ee232e9765143b3deea2c5693a36
    Signed-off-by: YouMin Chen <cym@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram.h b/arch/arm/include/asm/arch-rockchip/sdram.h
index d7d67baa68..250477055f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram.h
@@ -9,12 +9,6 @@
 #ifndef _ASM_ARCH_RK3288_SDRAM_H__
 #define _ASM_ARCH_RK3288_SDRAM_H__
 
-enum {
-	DDR3 = 3,
-	LPDDR3 = 6,
-	UNUSED = 0xFF,
-};
-
 struct rk3288_sdram_channel {
 	/*
 	 * bit width in address, eg:
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 8be19c6ccb..33c8192f8e 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -6,6 +6,17 @@
 
 #ifndef _ASM_ARCH_SDRAM_COMMON_H
 #define _ASM_ARCH_SDRAM_COMMON_H
+
+enum {
+	DDR4 = 0,
+	DDR2 = 2,
+	DDR3 = 3,
+	LPDDR2 = 5,
+	LPDDR3 = 6,
+	LPDDR4 = 7,
+	UNUSED = 0xFF
+};
+
 /*
  * sys_reg bitfield struct
  * [31]		row_3_4_ch1
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
index b10de76411..58c44c4bbb 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
@@ -8,13 +8,6 @@
 
 #include <common.h>
 
-enum {
-	DDR3		= 3,
-	LPDDR2		= 5,
-	LPDDR3		= 6,
-	UNUSED		= 0xFF,
-};
-
 struct rk322x_sdram_channel {
 	/*
 	 * bit width in address, eg:
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
index 951d4fab18..51cc03fbce 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
@@ -7,15 +7,6 @@
 #ifndef _ASM_ARCH_SDRAM_RK3328_H
 #define _ASM_ARCH_SDRAM_RK3328_H
 
-enum {
-	DDR4 = 0,
-	DDR3 = 3,
-	LPDDR2 = 5,
-	LPDDR3 = 6,
-	LPDDR4 = 7,
-	UNUSED = 0xFF
-};
-
 #define SR_IDLE		93
 #define PD_IDLE		13
 #define SDRAM_ADDR	0x00000000
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index 22a6ca9ae1..2cee2e5ee5 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -7,14 +7,6 @@
 #ifndef _ASM_ARCH_SDRAM_RK3399_H
 #define _ASM_ARCH_SDRAM_RK3399_H
 
-enum {
-	DDR3 = 0x3,
-	LPDDR2 = 0x5,
-	LPDDR3 = 0x6,
-	LPDDR4 = 0x7,
-	UNUSED = 0xFF
-};
-
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];
 };

commit c22f479c2b2028dd9089075991f61ae46b44cc52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 5 20:16:10 2018 +0800

    rockchip: dts: rk3288: add rk3288-u-boot.dtsi
    
    Change-Id: I5c48541e1eeffc8d83e05c3ee8a87454f8ff62af
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
index 828257e311..a21868b1b9 100644
--- a/arch/arm/dts/rk3288-evb-rk1608.dtsi
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index e5fe0a57b1..e03cddbddb 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-fennec.dtsi b/arch/arm/dts/rk3288-fennec.dtsi
index c31a168caa..9c9ac163d6 100644
--- a/arch/arm/dts/rk3288-fennec.dtsi
+++ b/arch/arm/dts/rk3288-fennec.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
index 020e7e576b..6a84fd4ee4 100644
--- a/arch/arm/dts/rk3288-firefly.dtsi
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index 77b618805f..b565b0354e 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi
index 02d11968cb..ff7c88a863 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -44,6 +44,7 @@
 
 #include <dt-bindings/net/ti-dp83867.h>
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	model = "Phytec RK3288 phyCORE";
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi
index 63785eb55e..2617276ba9 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory{
diff --git a/arch/arm/dts/rk3288-rock2-som.dtsi b/arch/arm/dts/rk3288-rock2-som.dtsi
index 1ece66f3e1..b7e143af14 100644
--- a/arch/arm/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/dts/rk3288-rock2-som.dtsi
@@ -40,6 +40,7 @@
 
 #include <dt-bindings/pwm/pwm.h>
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory {
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index a752458663..81f8d5a6c3 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory {
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
new file mode 100644
index 0000000000..a80334192b
--- /dev/null
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&pmu {
+	u-boot,dm-pre-reloc;
+};
+
+&sgrf {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&noc {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index 77b9bf8c88..a1dad688b0 100644
--- a/arch/arm/dts/rk3288-veyron.dtsi
+++ b/arch/arm/dts/rk3288-veyron.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/rockchip,rk808.h>
 #include <dt-bindings/input/input.h>
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	memory {
diff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts
index 93a9c5ee09..33f5863b87 100644
--- a/arch/arm/dts/rk3288-vyasa.dts
+++ b/arch/arm/dts/rk3288-vyasa.dts
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 #include "rk3288.dtsi"
+#include "rk3288-u-boot.dtsi"
 
 / {
 	model = "Amarula Vyasa-RK3288";
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 16b94b1942..f7654fa5b2 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -491,7 +491,6 @@
 	};
 
 	dmc: dmc@ff610000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-dmc", "syscon";
 		rockchip,cru = <&cru>;
 		rockchip,grf = <&grf>;
@@ -607,13 +606,11 @@
 	};
 
 	pmu: power-management@ff730000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-pmu", "syscon";
 		reg = <0xff730000 0x100>;
 	};
 
 	sgrf: syscon@ff740000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-sgrf", "syscon";
 		reg = <0xff740000 0x1000>;
 	};
@@ -622,7 +619,6 @@
 		compatible = "rockchip,rk3288-cru";
 		reg = <0xff760000 0x1000>;
 		rockchip,grf = <&grf>;
-		u-boot,dm-pre-reloc;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 		assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
@@ -638,7 +634,6 @@
 	};
 
 	grf: syscon@ff770000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-grf", "syscon";
 		reg = <0xff770000 0x1000>;
 	};
@@ -682,7 +677,6 @@
 	};
 
 	vopb: vop@ff930000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-vop-big";
 		reg = <0xff930000 0x19c>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -737,7 +731,6 @@
 		iommus = <&vopl_mmu>;
 		power-domains = <&power RK3288_PD_VIO>;
 		status = "disabled";
-		u-boot,dm-pre-reloc;
 		vopl_out: port {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -938,7 +931,6 @@
 	};
 
 	noc: syscon@ffac0000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3288-noc", "syscon";
 		reg = <0xffac0000 0x2000>;
 	};

commit 24cd8f3602c8d59e9525e90f8593d66ed212a0c7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 13 15:25:59 2018 +0800

    armv8: dump registers when system crash
    
    default provide: grf, pmugrf, cru and pmucru, it looks like:
    
    rockchip,px30-cru:
    ff2b0000:  0000304b 00001441 00000001 00000007
    ff2b0010:  00007f00 00000000 00000000 00000000
    ff2b0020:  00003053 00001441 00000001 00000007
    ......
    
    rockchip,px30-grf:
    ff140000:  00002222 00002222 00002222 00001111
    ff140010:  00000000 00000000 00002200 00000033
    ff140020:  00000000 00000000 00000000 00000202
    ......
    
    Change-Id: I1630b07cb9412103b737ac4c2f6d86cfe3c81fc1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index f3194fd94e..0781034b03 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -206,6 +206,14 @@ void show_regs(struct pt_regs *regs)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
 	printf("\n");
+
+#ifdef CONFIG_ROCKCHIP_CRASH_DUMP
+	iomem_show_by_compatible("-cru", 0, 0x400);
+	iomem_show_by_compatible("-pmucru", 0, 0x400);
+	iomem_show_by_compatible("-grf", 0, 0x400);
+	iomem_show_by_compatible("-pmugrf", 0, 0x400);
+	/* tobe add here ... */
+#endif
 }
 
 #else
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 839c2b18f6..fa8efc7f16 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -432,6 +432,12 @@ config ROCKCHIP_DEBUGGER
 	  and dump pt_regs when the timeout event trigger. This helps us to know cpu
 	  state when system hang.
 
+config ROCKCHIP_CRASH_DUMP
+	bool "Rockchip crash dump registers"
+	help
+	  This enable dump registers when system crash, the registers you would like
+	  to dump can be added in show_regs().
+
 config GICV2
 	bool "ARM GICv2"
 

commit 737e12167da416aeda5e7b6cb6972531f8508490
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 13 11:53:55 2018 +0800

    rockchip: add iomem show interface
    
    this is mainly for debug.
    
    Change-Id: Ied842841f09780c11092624fb602a3f3723469c3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 1cc2cc35e7..6d0fd25d51 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -23,6 +23,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-y += boot_mode.o
 obj-y += board.o
 obj-y += chip_info.o
+obj-y += iomem.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/iomem.c b/arch/arm/mach-rockchip/iomem.c
new file mode 100644
index 0000000000..75b8bb3b75
--- /dev/null
+++ b/arch/arm/mach-rockchip/iomem.c
@@ -0,0 +1,86 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+
+void iomem_show(const char *label, unsigned long base, size_t start, size_t end)
+{
+	unsigned long val, offset = start, nr = 0;
+
+	if (label)
+		printf("%s:\n", label);
+
+	printf("%08lx:  ", base + offset);
+	for (offset = start; offset <= end; offset += 0x04) {
+		if (nr >= 4) {
+			printf("\n%08lx:  ", base + offset);
+			nr = 0;
+		}
+		val = readl((void __iomem *)base + offset);
+		printf("%08lx ", val);
+		nr++;
+	}
+	printf("\n");
+}
+
+void iomem_show_by_compatible(const char *compat, size_t start, size_t end)
+{
+	const void *fdt = gd->fdt_blob;
+	const char *compatible;
+	fdt_addr_t addr;
+	int offset;
+
+	if (!compat)
+		return;
+
+	for (offset = fdt_next_node(fdt, 0, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		compatible = fdt_getprop(fdt, offset, "compatible", NULL);
+		if (!compatible)
+			continue;
+
+		if (strstr(compatible, compat)) {
+			addr = fdtdec_get_addr_size_auto_noparent(fdt, offset,
+							"reg", 0, NULL, false);
+			compatible = fdt_getprop(fdt, offset, "compatible",
+						 NULL);
+			iomem_show(compatible, addr, start, end);
+			break;
+		}
+	}
+
+	printf("\n");
+}
+
+static int do_iomem_by_compatible(cmd_tbl_t *cmdtp, int flag, int argc,
+				  char *const argv[])
+{
+	size_t start, end;
+	const char *compat;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	compat = argv[1];
+	start = simple_strtoul(argv[2], NULL, 0);
+	end = simple_strtoul(argv[3], NULL, 0);
+
+	iomem_show_by_compatible(compat, start, end);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	iomem,		4,	1,	do_iomem_by_compatible,
+	"Show iomem data by device compatible",
+	"iomem <compatible> <start offset>  <end offset>\n"
+	"  eg: iomem -grf 0x0 0x200"
+);
diff --git a/include/iomem.h b/include/iomem.h
new file mode 100644
index 0000000000..55ef1573c3
--- /dev/null
+++ b/include/iomem.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ */
+
+#ifndef _ROCKCHIP_IOMEM_H_
+#define _ROCKCHIP_IOMEM_H_
+
+/**
+ * iomem_show() - Show iomem data. Usually for peripheral registers.
+ *
+ * @lable:	Title to show
+ * @base:	Base address of iomem
+ * @start:	Start offset
+ * @end:	End offset
+ */
+void iomem_show(const char *label, unsigned long base, size_t start, size_t end);
+
+/**
+ * iomem_show_by_compatible() - Show iomem data and auto find base address by
+ *				compabile(sub string match).
+ *
+ * @compat:	Compatible name, sub string match.
+ * @start:	Start offset
+ * @end:	End offset
+ *
+ * eg: iomem_show_by_compatible("-grf", 0x0, 0x200);
+ *     first node that contains "-grf" will be dump.
+ *
+ */
+void iomem_show_by_compatible(const char *compat, size_t start, size_t end);
+
+#endif

commit 366357ca8d683701bfa07310515e3c8d266fd2c2
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 15 11:06:09 2018 +0800

    include/config_fallbacks.h: add CONFIG_RKFLASH for fallback  HAVE_BLOCK_DEVICE
    
    RKFLASH also works as a block device, so add the
    dependency here.
    
    Change-Id: I22791156465302984adbbdce76ddc01242f2bb7e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 2c4d43d672..d9a7d7a928 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -52,7 +52,8 @@
 	defined(CONFIG_MMC) || \
 	defined(CONFIG_NVME) || \
 	defined(CONFIG_SYSTEMACE) || \
-	defined(CONFIG_SANDBOX)
+	defined(CONFIG_SANDBOX)   || \
+	defined(CONFIG_RKFLASH)
 #define HAVE_BLOCK_DEVICE
 #endif
 

commit 8986cb610b1b8e7bba338d166dfa0993cdde9d54
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 15 11:03:38 2018 +0800

    rockchip: boot_mode: add adc dependency for dnl key detection
    
    Most rockchip boards detect the download key via adc,
    but there are also some boards don't want to use this
    function, they may disable the adc subsystem, so add
    the adc dependency here.
    
    Change-Id: I31af5666c8c5e973e9e6b31ce1a3847e0b478840
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 5619ce5576..ce5830eedf 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -42,6 +42,7 @@ void set_back_to_bootrom_dnl_flag(void)
 
 __weak int rockchip_dnl_key_pressed(void)
 {
+#if defined(CONFIG_ADC)
 	const void *blob = gd->fdt_blob;
 	unsigned int val;
 	int channel = 1;
@@ -65,6 +66,9 @@ __weak int rockchip_dnl_key_pressed(void)
 		return true;
 	else
 		return false;
+#else
+	return false;
+#endif
 }
 
 void devtype_num_envset(void)

commit 0b4606ef44723ea88391345fa12f21fe17e1a65a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jul 12 09:26:28 2018 +0800

    test: rockchip: improve regulator test
    
    1. dump all regulator fdt configure and current status;
    2. only adjudst voltage for bucks;
    
    Change-Id: Ib1b1730e0eb8157a9c979e3552932b2c80f40458
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-regulator.c b/test/rockchip/test-regulator.c
index 53fddfed51..093336689c 100644
--- a/test/rockchip/test-regulator.c
+++ b/test/rockchip/test-regulator.c
@@ -6,7 +6,7 @@
 
 #include <asm/io.h>
 #include <common.h>
-#include <common.h>
+#include <console.h>
 #include <dm.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
@@ -15,36 +15,44 @@
 static void regulator_show_dt(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	int uV;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+	uV = regulator_get_value(dev);
+
+	printf("%25s@%15s: ", dev->name, uc_pdata->name);
+	printf("%7duV <-> %7duV, set %7duV, %s",
+	       uc_pdata->min_uV, uc_pdata->max_uV, uV,
+	       (uc_pdata->always_on || uc_pdata->boot_on) ?
+	       "enabling" : "disabled");
 
-	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
-		printf("%d uV", uc_pdata->min_uV);
-	else
-		printf("%d ~ %d uV", uc_pdata->min_uV, uc_pdata->max_uV);
+	printf(" | supsend %7duV, %s",
+	       uc_pdata->suspend_uV,
+	       uc_pdata->suspend_on ? "enabling" : "disabled");
+	if (uc_pdata->init_uV != -ENODATA)
+		printf("; init %7duV", uc_pdata->init_uV);
+
+	printf("\n");
 
-	printf("; %s]\n", uc_pdata->boot_on ? "enable" : "disabled");
 }
 
 static void regulator_show_state(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
-	int enable, uV;
-	int same = 1;
+	int enable, uV, suspend_enable, suspend_uV;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+
 	enable = regulator_get_enable(dev);
 	uV = regulator_get_value(dev);
 
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
-		same = (enable == uc_pdata->boot_on) &&
-		       (uV == uc_pdata->min_uV);
+	suspend_enable = regulator_get_suspend_enable(dev);
+	suspend_uV = regulator_get_suspend_value(dev);
 
-	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
-	printf("%d uV", uV);
-	printf("; %s] <%s>\n", enable ? "enable" : "disabled",
-	       same ? "same" : "Not same");
+	printf("%25s@%15s: set %7duV, %s | suspend %7duV, %s\n",
+	       dev->name, uc_pdata->name, uV,
+	       enable ? "enabling" : "disabled", suspend_uV,
+	       suspend_enable ? "enabling" : "disabled");
 }
 
 static int regulator_confirm_dt(void)
@@ -57,25 +65,21 @@ static int regulator_confirm_dt(void)
 	if (ret)
 		return ret;
 
-	printf("<FDT config>:\n");
+	printf("<Board dts config>:\n");
 	for (uclass_first_device(UCLASS_REGULATOR, &dev);
 	     dev;
 	     uclass_next_device(&dev)) {
 		regulator_show_dt(dev);
 	}
 
-	printf("\n\n\n<NOW state>:\n");
+	printf("\n<Board current status>:\n");
 	for (uclass_first_device(UCLASS_REGULATOR, &dev);
 	     dev;
 	     uclass_next_device(&dev)) {
 		regulator_show_state(dev);
 	}
 
-	printf("\n\n\n");
-	printf("1. Please compare <NOW state> and <FDT config>.\n");
-	printf("2. Please measure the volatge of all regulators "
-	       "and compare with <Now state> voltage.\n\n");
-	printf("After above done, you can hit any key to continue test case2...\n\n\n\n");
+	printf("\n");
 
 	while (!getc())
 		;
@@ -92,7 +96,7 @@ static int regulator_adjust_voltage(struct udevice *dev)
 
 	/* only not fix voltage regulator will be tested! */
 	if ((uc_pdata->max_uV == uc_pdata->min_uV) ||
-	    !regulator_get_enable(dev))
+	    !regulator_get_enable(dev) || strncmp("DCDC", dev->name, 4))
 		return 0;
 
 	/* save for restore after test done */
@@ -100,13 +104,12 @@ static int regulator_adjust_voltage(struct udevice *dev)
 
 	for (i = 1; i < 4; i++) {
 		uV = regulator_get_value(dev);
-		printf("[%s] ", uc_pdata->name);
-		printf("Try: %d uV --> %d uV;  ", uV, uV + step_uV * i);
+		printf("[%s@%s] set: %d uV -> %d uV;  ",
+		       dev->name, uc_pdata->name, uV, uV + step_uV * i);
 		uV += (step_uV * i);
 		regulator_set_value(dev, uV);
-		printf("Now: %d uV.\n\n", regulator_get_value(dev));
-		printf("Please measure voltage of [%s].\n"
-		       "After done, hit any key to continue...\n\n\n\n",
+		printf("ReadBack: %d uV\n\n", regulator_get_value(dev));
+		printf("Confirm '%s' voltage, then hit any key to continue...\n\n",
 		       uc_pdata->name);
 
 		while (!getc())
@@ -141,12 +144,12 @@ static int regulator_confirm_voltage_accuracy(void)
 int board_regulator_test(int argc, char * const argv[])
 {
 	printf("----------------------------------------------------\n");
-	printf("REGULATOR test case 1: regulator fdt config confirm\n");
+	printf("REGULATOR: status show\n");
 	printf("----------------------------------------------------\n\n");
 	regulator_confirm_dt();
 
 	printf("----------------------------------------------------\n");
-	printf("REGULATOR test case 2: regulator voltage accuracy confirm\n");
+	printf("REGULATOR: voltage accuracy confirm\n");
 	printf("----------------------------------------------------\n\n");
 	regulator_confirm_voltage_accuracy();
 

commit 3403638a65145ac55568de1221ec5e3617769af7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 12 11:12:01 2018 +0800

    configs: evb-rk3326: delete clock-names
    
    Delete clock-names from CONFIG_OF_SPL_REMOVE_PROPS,
    then we use clk_get_by_name() to get the clock.
    
    Change-Id: I29b71d42699aec15d6afa2a6b2e99500672f4ce5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index dab64402d2..bd6b65ad42 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -29,7 +29,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y

commit 08c9dc10f47ca595c2bb374624f506001a248556
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Jul 12 10:22:55 2018 +0800

    mmc: dw_mmc: rockchip: fix get ciu-sample bug
    
    1.judge the clk_get_by_name return value
    2.rename the ciu_sample to ciu-sample according
      to dts
    
    Change-Id: I60c9f43f8cf0dd02815ee9078f5e957dc9c6d24d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 7155607e77..001d31e0e2 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -251,7 +251,10 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	ret = clk_get_by_index(dev, 0, &priv->clk);
 	if (ret < 0)
 		return ret;
-	clk_get_by_name(dev, "ciu_sample", &priv->sample_clk);
+
+	ret = clk_get_by_name(dev, "ciu-sample", &priv->sample_clk);
+	if (ret < 0)
+		return ret;
 	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |

commit c96295c291e54c739507c46b3d3ad16024433040
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 14 17:17:06 2018 +0800

    rockchip: dts: px30: enable "u-boot,dm-pre-reloc" for saradc
    
    Change-Id: I80b3c9a5ffca675ab1be5b42e49a8ff97d57e2ed
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 865eb8fd94..555e0b1250 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -42,6 +42,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &gpio0 {
 	u-boot,dm-pre-reloc;
 	status = "disabled";

commit 527e4be7d9f7d3271040ecdc1a54c22c930b4963
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jul 14 15:45:25 2018 +0800

    rockchip: core: update kernel dtb node handle
    
    Don't duplicate bind EMMC and NAND device after load kernel dtb.
    Always use serial node from u-boot and use all other nodes from kernel.
    
    Change-Id: Iaef9258f66f4f1060f057a9f7b194694e0e1df21
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 825dc6bc0f..e3b15fd121 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -51,24 +51,33 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	}
 
 #ifdef CONFIG_USING_KERNEL_DTB
-	/* Do not use mmc node and nand node from kernel dtb */
-	if(drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND)
-	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
-		if (!strcmp(name, dev->name)){
-			debug("%s do not bind dev already in list %s\n",
-			        __func__, name);
-			dev->node = node;
-			return 0;
+	if (gd->flags & GD_FLG_RELOC) {
+		/* For mmc and nand, just update from kernel dtb instead bind again*/
+		if (drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND) {
+			list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+				if (!strcmp(name, dev->name)) {
+					debug("%s do not bind dev already in list %s\n",
+					      __func__, dev->name);
+					dev->node = node;
+					return 0;
+				}
+			}
 		}
-	}
 
-	/* use cru node from kernel dtb */
-	if (drv->id == UCLASS_CLK) {
+		/* Use other nodes from kernel dtb */
 		struct udevice *n;
 
 		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
-			if (!strcmp(name, dev->name))
-				list_del(&dev->uclass_node);
+			if (!strcmp(name, dev->name)) {
+				if (drv->id == UCLASS_SERIAL) {
+					/* Always use serial node from U-Boot dtb */
+					debug("%s do not delete uboot dev: %s\n",
+					      __func__, dev->name);
+					return 0;
+				} else {
+					list_del(&dev->uclass_node);
+				}
+			}
 		}
 	}
 #endif

commit 852c7866fdc984588f4255a550e8510c2c9d73c1
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Jul 13 09:39:24 2018 +0800

    fuel gauge: rk817: smooth the dispaly soc when system reboot
    
    There is a difference between the display soc and real soc,
    so it can not be directly equivalent.
    
    Change-Id: I99dfa1e3952693053ccd853cd5802feb7eebf8b0
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 78b3113ea7..5e5f004ad1 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -811,12 +811,19 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 	} else {
 		battery->remain_cap = rk817_bat_get_capacity_uah(battery);
 		battery->rsoc = rk817_bat_get_rsoc(battery);
-		pre_soc = battery->rsoc;
+
+		if (pre_cap < battery->remain_cap / 1000) {
+			pre_soc += (battery->remain_cap - pre_cap * 1000) * 100 / battery->fcc;
+			if (pre_soc > 100000)
+				pre_soc = 100000;
+		}
 		pre_cap = battery->remain_cap / 1000;
 		goto finish;
 	}
 finish:
 	battery->dsoc = pre_soc;
+	if (battery->dsoc > 100000)
+		battery->dsoc = 100000;
 	battery->nac = pre_cap;
 	if (battery->nac < 0)
 		battery->nac = 0;

commit faa7eb0f76fd6e206963e74af89afc949c2e2c17
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 13 11:55:22 2018 +0800

    armv8: exceptions: optimize exception regs info
    
    Add arm core registers bits description, it looks like:
    
    Relocate offset = 000000003db55000
    * ELR(PC)    =   000000000025bd78
    * LR         =   000000000025def4
    * SP         =   0000000039d4a6b0
    
    * ESR_EL2    =   0000000040732550
            EC[31:26] == 001100, Exception from an MCRR or MRRC access
            IL[25] == 0, 16-bit instruction trapped
    
    * DAIF       =   00000000000003c0
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 1, IRQ masked
            F[6] == 1, FIQ masked
    
    * SPSR_EL2   =   0000000080000349
            D[9] == 1, DBG masked
            A[8] == 1, ABORT masked
            I[7] == 0, IRQ not masked
            F[6] == 1, FIQ masked
            M[4] == 0, Exception taken from AArch64
            M[3:0] == 1001, EL2h
    
    * SCTLR_EL2  =   0000000030c51835
            I[12] == 1, Icaches enabled
            C[2] == 1, Dcache enabled
            M[0] == 1, MMU enabled
    
    * VBAR_EL2   =   000000003dd55800
    * HCR_EL2    =   000000000800003a
    * TTBR0_EL2  =   000000003fff0000
    
    x0 : 00000000ff300000 x1 : 0000000054808028
    x2 : 000000000000002f x3 : 00000000ff160000
    x4 : 0000000039d7fe80 x5 : 000000003de24ab0
    ......
    x28: 0000000039d81ef0 x29: 0000000039d4a910
    
    Change-Id: I828cafc961fdc3fcb2aa08916a7e36f690627313
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 8c7c1d3eb8..cf3997793d 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -90,19 +90,46 @@ _exception_entry:
 	switch_el x11, 3f, 2f, 1f
 3:	mrs	x1, esr_el3
 	mrs	x2, elr_el3
+	mrs	x3, daif
+	mrs	x4, vbar_el3
+	mrs	x5, spsr_el3
+	sub	x6, sp, #(8*30)
+	mrs	x7, sctlr_el3
+	mrs	x8, scr_el3
+	mrs	x9, ttbr0_el3
 	b	0f
 2:	mrs	x1, esr_el2
 	mrs	x2, elr_el2
+	mrs	x3, daif
+	mrs	x4, vbar_el2
+	mrs	x5, spsr_el2
+	sub	x6, sp, #(8*30)
+	mrs	x7, sctlr_el2
+	mrs	x8, hcr_el2
+	mrs	x9, ttbr0_el2
 	b	0f
+
 1:	mrs	x1, esr_el1
 	mrs	x2, elr_el1
+	mrs	x3, daif
+	mrs	x4, vbar_el1
+	mrs	x5, spsr_el1
+	sub	x6, sp, #(8*30)
+	mrs	x7, sctlr_el1
+	mov	x8, #0	/* Not used, EL1 don't have register, like 'scr_el1' */
+	mrs	x9, ttbr0_el1
 0:
-	stp	x2, x0, [sp, #-16]!
+	stp     x2, x0, [sp, #-16]!
+	stp	x3, x1, [sp, #-16]!
+	stp	x5, x4, [sp, #-16]!
+	stp	x7, x6, [sp, #-16]!
+	stp	x9, x8, [sp, #-16]!
 	mov	x0, sp
 	ret
 
 
 exception_exit:
+	add	sp, sp, #(8*8)/* see: sys registers size of struct pt_regs */
 	ldp	x2, x0, [sp],#16
 	switch_el x11, 3f, 2f, 1f
 3:	msr	elr_el3, x2
diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
index 71df5a9e25..6137047504 100644
--- a/arch/arm/include/asm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
@@ -21,6 +21,20 @@
  * on the stack during an exception.
  */
 struct pt_regs {
+	/*
+	 * system register
+	 *
+	 * Note: never change order! see "_exception_entry" and "exception_exit"
+	 */
+	unsigned long ttbr0;
+	unsigned long hcr;	/* hcr_el2/scr_el3 */
+	unsigned long sctlr;
+	unsigned long sp;
+	unsigned long spsr;
+	unsigned long vbar;
+	unsigned long daif;
+	unsigned long esr;
+
 	unsigned long elr;
 	unsigned long regs[31];
 };
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 061f23c652..f3194fd94e 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -28,6 +28,187 @@ int disable_interrupts(void)
 }
 #endif
 
+#if (!defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD))
+#define REG_BITS(val, shift, mask)	(((val) >> (shift)) & (mask))
+
+void show_regs(struct pt_regs *regs)
+{
+	int i;
+	int el = current_el();
+	const char *h_scr_name[] = {
+		[2] = "HCR_EL2",
+		[3] = "SCR_EL3",
+	};
+	const char *esr_bits_ec[] = {
+		[0]  = "EC[31:26] == 000000, Exception with an unknown reason",
+		[1]  = "EC[31:26] == 000001, Exception from a WFI or WFE instruction",
+		[3]  = "EC[31:26] == 000011, Exception from an MCR or MRC access",
+		[4]  = "EC[31:26] == 000100, Exception from an MCRR or MRRC access",
+		[5]  = "EC[31:26] == 000101, Exception from an MCR or MRC access",
+		[6]  = "EC[31:26] == 000110, Exception from an LDC or STC access to CP14",
+		[7]  = "EC[31:26] == 000111, Exception from an access to an Advanced SIMD or floating-point register, resulting from CPACR_EL1.FPEN or CPTR_ELx.TFP",
+		[8]  = "EC[31:26] == 001000, Exception from an MCR or MRC access",
+		[12] = "EC[31:26] == 001100, Exception from an MCRR or MRRC access",
+		[14] = "EC[31:26] == 001110, Exception from an Illegal execution state, or a PC or SP alignment fault",
+		[10] = "EC[31:26] == 010001, Exception from HVC or SVC instruction execution",
+		[18] = "EC[31:26] == 010010, Exception from HVC or SVC instruction execution",
+		[19] = "EC[31:26] == 010011, Exception from SMC instruction execution in AArch32 state",
+		[21] = "EC[31:26] == 010101, Exception from HVC or SVC instruction execution",
+		[22] = "EC[31:26] == 010110, Exception from HVC or SVC instruction execution",
+		[23] = "EC[31:26] == 010111, Exception from SMC instruction execution in AArch64 state",
+		[24] = "EC[31:26] == 011000, Exception from MSR, MRS, or System instruction execution in AArch64 state",
+		[31] = "EC[31:26] == 011111, IMPLEMENTATION DEFINED exception to EL3",
+		[32] = "EC[31:26] == 100000, Exception from an Instruction abort",
+		[33] = "EC[31:26] == 100001, Exception from an Instruction abort",
+		[34] = "EC[31:26] == 100010, Exception from an Illegal execution state, or a PC or SP alignment fault",
+		[36] = "EC[31:26] == 100100, Exception from a Data abort, from lower exception level",
+		[37] = "EC[31:26] == 100101, Exception from a Data abort, from current exception level",
+		[38] = "EC[31:26] == 100110, Exception from an Illegal execution state, or a PC or SP alignment fault",
+		[40] = "EC[31:26] == 101000, Exception from a trapped Floating-point exception",
+		[44] = "EC[31:26] == 101100, Exception from a trapped Floating-point exception",
+		[47] = "EC[31:26] == 101111, SError interrupt",
+		[48] = "EC[31:26] == 110000, Exception from a Breakpoint or Vector Catch debug event",
+		[49] = "EC[31:26] == 110001, Exception from a Breakpoint or Vector Catch debug event",
+		[50] = "EC[31:26] == 110010, Exception from a Software Step debug event",
+		[51] = "EC[31:26] == 110011, Exception from a Software Step debug event",
+		[52] = "EC[31:26] == 110100, Exception from a Watchpoint debug event",
+		[53] = "EC[31:26] == 110101, Exception from a Watchpoint debug event",
+		[56] = "EC[31:26] == 111000, Exception from execution of a Software Breakpoint instructio",
+	};
+	const char *esr_bits_il[] = {
+		"IL[25] == 0, 16-bit instruction trapped",
+		"IL[25] == 1, 32-bit instruction trapped",
+	};
+	const char *daif_bits_f[] = {
+		"F[6] == 0, FIQ not masked",
+		"F[6] == 1, FIQ masked",
+	};
+	const char *daif_bits_i[] = {
+		"I[7] == 0, IRQ not masked",
+		"I[7] == 1, IRQ masked",
+	};
+	const char *daif_bits_a[] = {
+		"A[8] == 0, ABORT not masked",
+		"A[8] == 1, ABORT masked",
+	};
+	const char *daif_bits_d[] = {
+		"D[9] == 0, DBG not masked",
+		"D[9] == 1, DBG masked",
+	};
+	const char *spsr_bits_m_aarch32[] = {
+		[0]  = "M[3:0] == 0000, User",
+		[1]  = "M[3:0] == 0001, FIQ",
+		[2]  = "M[3:0] == 0010, IRQ",
+		[3]  = "M[3:0] == 0011, Supervisor",
+		[6]  = "M[3:0] == 0110, Monitor",
+		[7]  = "M[3:0] == 0111, Abort",
+		[10] = "M[3:0] == 1010, Hyp",
+		[11] = "M[3:0] == 1011, Undefined",
+		[15] = "M[3:0] == 1111, System",
+	};
+	const char *spsr_bits_m_aarch64[] = {
+		[0] = "M[3:0] == 0000, EL0t",
+		[4] = "M[3:0] == 0100, EL1t",
+		[5] = "M[3:0] == 0101, EL1h",
+		[8] = "M[3:0] == 1000, EL2t",
+		[9] = "M[3:0] == 1001, EL2h",
+		[10] = "M[3:0] == 1100, EL3t",
+		[11] = "M[3:0] == 1101, EL3h",
+	};
+	const char *spsr_bits_m[] = {
+		"M[4] == 0, Exception taken from AArch64",
+		"M[4] == 1, Exception taken from AArch32",
+	};
+	const char *spsr_bits_f[] = {
+		"F[6] == 0, FIQ not masked",
+		"F[6] == 1, FIQ masked",
+	};
+	const char *spsr_bits_i[] = {
+		"I[7] == 0, IRQ not masked",
+		"I[7] == 1, IRQ masked",
+	};
+	const char *spsr_bits_a[] = {
+		"A[8] == 0, ABORT not masked",
+		"A[8] == 1, ABORT masked",
+	};
+	const char *spsr_bits_d[] = {
+		"D[9] == 0, DBG not masked",
+		"D[9] == 1, DBG masked",
+	};
+	const char *sctlr_bits_i[] = {
+		"I[12] == 0, Icache disabled",
+		"I[12] == 1, Icaches enabled",
+	};
+	const char *sctlr_bits_c[] = {
+		"C[2] == 0, Dcache disabled",
+		"C[2] == 1, Dcache enabled",
+	};
+	const char *sctlr_bits_m[] = {
+		"M[0] == 0, MMU disabled",
+		"M[0] == 1, MMU enabled",
+	};
+
+	printf("* Relocate offset = %016lx\n", gd->reloc_off);
+
+	if (gd->flags & GD_FLG_RELOC) {
+		printf("* ELR(PC)    =   %016lx\n", regs->elr - gd->reloc_off);
+		printf("* LR         =   %016lx\n", regs->regs[30] - gd->reloc_off);
+	} else {
+		printf("* ELR(PC)    =   %016lx\n", regs->elr);
+		printf("* LR         =   %016lx\n", regs->regs[30]);
+	}
+
+	printf("* SP         =   %016lx\n", regs->sp);
+	printf("\n");
+
+	/*
+	 * System registers
+	 */
+	/* ESR_EL2 */
+	printf("* ESR_EL%d    =   %016lx\n", el, regs->esr);
+	printf("\t%s\n", esr_bits_ec[REG_BITS(regs->esr, 26, 0x3f)]);
+	printf("\t%s\n", esr_bits_il[REG_BITS(regs->esr, 25, 0x01)]);
+	printf("\n");
+	/* DAIF */
+	printf("* DAIF       =   %016lx\n", regs->daif);
+	printf("\t%s\n", daif_bits_d[REG_BITS(regs->daif, 9, 0x1)]);
+	printf("\t%s\n", daif_bits_a[REG_BITS(regs->daif, 8, 0x1)]);
+	printf("\t%s\n", daif_bits_i[REG_BITS(regs->daif, 7, 0x1)]);
+	printf("\t%s\n", daif_bits_f[REG_BITS(regs->daif, 6, 0x1)]);
+	printf("\n");
+	/* SPSR_ELx */
+	printf("* SPSR_EL%d   =	 %016lx\n", el, regs->spsr);
+	printf("\t%s\n", spsr_bits_d[REG_BITS(regs->spsr, 9, 0x1)]);
+	printf("\t%s\n", spsr_bits_a[REG_BITS(regs->spsr, 8, 0x1)]);
+	printf("\t%s\n", spsr_bits_i[REG_BITS(regs->spsr, 7, 0x1)]);
+	printf("\t%s\n", spsr_bits_f[REG_BITS(regs->spsr, 6, 0x1)]);
+	printf("\t%s\n", spsr_bits_m[REG_BITS(regs->spsr, 4, 0x1)]);
+	if (REG_BITS(regs->spsr, 4, 0x1))
+		printf("\t%s\n", spsr_bits_m_aarch32[REG_BITS(regs->spsr, 0, 0xf)]);
+	else
+		printf("\t%s\n", spsr_bits_m_aarch64[REG_BITS(regs->spsr, 0, 0xf)]);
+	printf("\n");
+	/* SCTLR_EL2 */
+	printf("* SCTLR_EL%d  =	 %016lx\n", el, regs->sctlr);
+	printf("\t%s\n", sctlr_bits_i[REG_BITS(regs->sctlr, 12, 0x1)]);
+	printf("\t%s\n", sctlr_bits_c[REG_BITS(regs->sctlr, 2, 0x1)]);
+	printf("\t%s\n", sctlr_bits_m[REG_BITS(regs->sctlr, 0, 0x1)]);
+	printf("\n");
+
+	/* Other */
+	if (el >= 2)
+		printf("* %s    =   %016lx\n", h_scr_name[el], regs->hcr);
+	printf("* VBAR_EL%d   =   %016lx\n", el, regs->vbar);
+	printf("* TTBR0_EL%d  =   %016lx\n", el, regs->ttbr0);
+	printf("\n");
+
+	for (i = 0; i < 29; i += 2)
+		printf("x%-2d: %016lx x%-2d: %016lx\n",
+		       i, regs->regs[i], i+1, regs->regs[i+1]);
+	printf("\n");
+}
+
+#else
 void show_regs(struct pt_regs *regs)
 {
 	int i;
@@ -44,6 +225,7 @@ void show_regs(struct pt_regs *regs)
 		       i, regs->regs[i], i+1, regs->regs[i+1]);
 	printf("\n");
 }
+#endif
 
 /*
  * do_bad_sync handles the impossible case in the Synchronous Abort vector.

commit 243527b501abf820d518527c25a7418e115ec96f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 20:01:24 2018 +0800

    console: support timestamp for printf
    
    with this patch, we can see the detail boot time of boot flow.
    The U-Boot log is like this:
    
    [    0.259266] U-Boot 2017.09-01739-g856f373-dirty (Jul 10 2018 - 20:26:05 +0800)
    [    0.260596] Model: Rockchip RK3399 Evaluation Board
    [    0.261332] DRAM:  3.8 GiB
    Relocation Offset is: f5bfd000
    Using default environment
    
    [    0.354038] dwmmc@fe320000: 1, sdhci@fe330000: 0
    [    0.521125] Card did not respond to voltage select!
    [    0.521188] mmc_init: -95, time 9
    [    0.671451] switch to partitions #0, OK
    [    0.671500] mmc0(part 0) is current device
    ......
    
    Change-Id: I3ce2a4466f9ecd9eeb6b334ba4ba48391aa47c30
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 5172bb3346..4ec8cfd83c 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -111,6 +111,10 @@ config BOOTSTAGE_STASH_SIZE
 	  This should be large enough to hold the bootstage stash. A value of
 	  4096 (4KiB) is normally plenty.
 
+config BOOTSTAGE_PRINTF_TIMESTAMP
+	bool "Support printf timestamp"
+	help
+	  Enabling this will support printf timestamp.
 endmenu
 
 menu "Boot media"
diff --git a/common/console.c b/common/console.c
index cbec485345..260236b998 100644
--- a/common/console.c
+++ b/common/console.c
@@ -19,6 +19,7 @@
 #include <exports.h>
 #include <environment.h>
 #include <watchdog.h>
+#include <vsprintf.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -516,11 +517,51 @@ void putc(const char c)
 	}
 }
 
+#if (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP))
+static void vspfunc(char *buf, size_t size, char *format, ...)
+{
+	va_list ap;
+
+	va_start(ap, format);
+	vsnprintf(buf, size, format, ap);
+	va_end(ap);
+}
+
+void puts(const char *s)
+{
+	unsigned long ts_sec, ts_msec, ticks;
+	char pr_timestamp[32], *p;
+
+	while (*s) {
+		if (*s == '\n') {
+			gd->new_line = 1;
+			putc(*s++);
+			continue;
+		}
+
+		if (gd->new_line) {
+			gd->new_line = 0;
+			ticks = (get_ticks() / 24ULL);
+			ts_sec = ticks / 1000000;
+			ts_msec = ticks % 1000000;
+			vspfunc(pr_timestamp, sizeof(pr_timestamp),
+				"[%5lu.%06lu] ", ts_sec, ts_msec);
+			p = pr_timestamp;
+			while (*p)
+				putc(*p++);
+		}
+
+		putc(*s++);
+	}
+}
+#else
 void puts(const char *s)
 {
 	while (*s)
 		putc(*s++);
 }
+#endif
+
 
 #ifdef CONFIG_CONSOLE_RECORD
 int console_record_init(void)
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 5158bc8817..b46e542500 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -122,6 +122,11 @@ typedef struct global_data {
 	struct bootstage_data *new_bootstage;	/* Relocated bootstage info */
 #endif
 	phys_addr_t pm_ctx_phys;
+
+#ifdef CONFIG_BOOTSTAGE_PRINTF_TIMESTAMP
+	int new_line;
+#endif
+
 #ifdef CONFIG_LOG
 	int log_drop_count;		/* Number of dropped log messages */
 	int default_log_level;		/* For devices with no filters */

commit b520084e799d79ca39fceba72dfc89b673471584
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Fri Jul 13 11:17:58 2018 +0800

    configs: rockchip: enable edp display for fennec-rk3288
    
    Change-Id: I4ed48d9d4c6ead8a83a5117f27921f80e7e8dae4
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index c56dbfc556..39f71f4ac9 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
@@ -35,6 +36,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_REGMAP=y
@@ -76,6 +78,10 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 15a374cca7..97b56b667a 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -7,9 +7,10 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
-
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
 #endif

commit 279eedad258a369c537737608989e926b502acaf
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 16:04:07 2018 +0800

    config: rk3288: disable CONFIG_SILENT_CONSOLE
    
    For more log.
    
    Change-Id: Ic26085aad82d8106a4458048ea1663a8df6b5b65
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index ebe548cd33..4c65113ff0 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -8,7 +8,7 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb-rk1608"
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index af61858314..ab15591951 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 7ebfbf3a2a..c56dbfc556 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 1f2d1eef57..e0f243021b 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 088b15f5be..09d5979dff 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -8,7 +8,7 @@ CONFIG_TARGET_MIQI_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
 CONFIG_DEBUG_UART=y
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index e44384e9dd..3abf7c1088 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -9,7 +9,7 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_SILENT_CONSOLE=y
+# CONFIG_SILENT_CONSOLE is not set
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y

commit 4a08baf6816a7c0f2f8b19658c06306e30ca0289
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 15:53:29 2018 +0800

    rockchip: dts: rk3288-evb: add edp display support
    
    Enable lg,lp079qx1-sp0v edp panel for show logo
    on rk3288-evb-act8846
    
    Change-Id: I5d911275415fd8f26f0e023623a999c41ee62096
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index 32c262907b..e5fe0a57b1 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -140,22 +140,47 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm0_pin>;
 		pwm-delay-us = <10000>;
-		status = "disabled";
+		status = "okay";
 	};
 
-	panel: panel {
-		compatible = "simple-panel";
-		power-supply = <&vcc_io>;
+	edp_panel: edp-panel {
+		compatible ="lg,lp079qx1-sp0v", "simple-panel";
 		backlight = <&backlight>;
-		enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
-		status = "disabled";
+		power-supply = <&vcc_io>;
+		enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		enable-delay-ms = <20>;
+
+		ports {
+			panel_in: endpoint {
+				remote-endpoint = <&edp_out>;
+			};
+		};
 	};
+
 };
 
 &cpu0 {
 	cpu0-supply = <&vdd_cpu>;
 };
 
+&display_subsystem {
+	status = "okay";
+};
+
+&edp {
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+			edp_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
+
 &emmc {
 	broken-cd;
 	bus-width = <8>;
@@ -387,6 +412,10 @@
 	status = "okay";
 };
 
+&route_edp {
+	status = "okay";
+};
+
 &saradc {
 	vref-supply = <&vcc_18>;
 	status = "okay";
@@ -449,45 +478,10 @@
 	status = "okay";
 };
 
-&vopb {
-	status = "okay";
-};
-
-&vopb_mmu {
-	status = "okay";
-};
-
 &vopl {
 	status = "okay";
 };
 
-&vopl_mmu {
-	status = "okay";
-};
-
-&mipi_dsi0 {
-	status = "disabled";
-	rockchip,panel = <&panel>;
-	display-timings {
-		timing0 {
-		bits-per-pixel = <24>;
-		clock-frequency = <160000000>;
-		hfront-porch = <120>;
-		hsync-len = <20>;
-		hback-porch = <21>;
-		hactive = <1200>;
-		vfront-porch = <21>;
-		vsync-len = <3>;
-		vback-porch = <18>;
-		vactive = <1920>;
-		hsync-active = <0>;
-		vsync-active = <0>;
-		de-active = <1>;
-		pixelclk-active = <0>;
-		};
-	};
-};
-
 &wdt {
 	status = "okay";
 };

commit c125f78268945e376928630616e0e49e74463fb8
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 15:52:56 2018 +0800

    configs: rockchip: enable edp display for evb-rk3288
    
    Change-Id: I57bf828e287b7a1cd64fa87472ca46171c8046fd
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 06e903e97d..af61858314 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -33,6 +33,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -67,6 +68,7 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
@@ -76,9 +78,8 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x320a
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 15a374cca7..8482826f3b 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -7,9 +7,12 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif

commit e22bdefeaa1240989bf5c999ee5775aca5fc3f9a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jul 12 15:48:44 2018 +0800

    rockchip: dts: rk3288: Fix vop and edp node
    
    Change-Id: I9995c2a6501820b2b62a5262d35023ecb45f1014
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 316cb3b590..16b94b1942 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -160,9 +160,30 @@
 		always-on;
 	};
 
-	display-subsystem {
+	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vopl_out>, <&vopb_out>;
+		status = "disabled";
+
+		route {
+			route_hdmi: route-hdmi {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopb_out_hdmi>;
+			};
+
+			route_edp: route-edp {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopl_out_edp>;
+			};
+		};
 	};
 
 	sdmmc: dwmmc@ff0c0000 {
@@ -662,7 +683,7 @@
 
 	vopb: vop@ff930000 {
 		u-boot,dm-pre-reloc;
-		compatible = "rockchip,rk3288-vop";
+		compatible = "rockchip,rk3288-vop-big";
 		reg = <0xff930000 0x19c>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
@@ -706,7 +727,7 @@
 	};
 
 	vopl: vop@ff940000 {
-		compatible = "rockchip,rk3288-vop";
+		compatible = "rockchip,rk3288-vop-lit";
 		reg = <0xff940000 0x19c>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
@@ -751,7 +772,7 @@
 	};
 
 	edp: edp@ff970000 {
-		compatible = "rockchip,rk3288-edp";
+		compatible = "rockchip,rk3288-dp";
 		reg = <0xff970000 0x4000>;
 		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru PCLK_EDP_CTRL>;
@@ -762,6 +783,9 @@
 		power-domains = <&power RK3288_PD_VIO>;
 		status = "disabled";
 		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
 			edp_in: port {
 				#address-cells = <1>;
 				#size-cells = <0>;

commit 79bdfc405d0c870814470e017ee67cb5eac50a5b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jul 16 15:56:52 2018 +0800

    android: only handle compressed kernel after read a valid android image
    
    We shouldn't go on with the compress/decompress flow
    when we get a invalid andoird image.
    
    Change-Id: Ied7266b8791fe571c670cacafffdd393161c8189
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index c05279bb1e..a61d37177e 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -52,7 +52,6 @@ u32 android_image_get_comp(const struct andr_img_hdr *hdr)
 int android_image_parse_kernel_comp(const struct andr_img_hdr *hdr)
 {
 	ulong kaddr = android_image_get_kernel_addr(hdr);
-
 	return bootm_parse_comp((const unsigned char *)kaddr);
 }
 
@@ -231,11 +230,11 @@ long android_image_load(struct blk_desc *dev_desc,
 		blk_read = -1;
 	}
 
-	comp = android_image_parse_kernel_comp(buf);
 
 	if (!blk_read) {
 		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
 			   part_info->blksz - 1) / part_info->blksz;
+		comp = android_image_parse_kernel_comp(buf);
 		/*
 		 * We should load a compressed kernel Image
 		 * to high memory
@@ -258,18 +257,19 @@ long android_image_load(struct blk_desc *dev_desc,
 			blk_read = blk_dread(dev_desc, part_info->start,
 					     blk_cnt, buf);
 		}
-	}
 
-	/*
-	 * zImage is not need to decompress
-	 * kernel will handle decompress itself
-	 */
-	if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
-		kload_addr = env_get_ulong("kernel_addr_r", 16, 0x02080000);
-		android_image_set_kload(buf, kload_addr);
-		android_image_set_comp(buf, comp);
-	} else {
-		android_image_set_comp(buf, IH_COMP_NONE);
+		/*
+		 * zImage is not need to decompress
+		 * kernel will handle decompress itself
+		 */
+		if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
+			kload_addr = env_get_ulong("kernel_addr_r", 16, 0x02080000);
+			android_image_set_kload(buf, kload_addr);
+			android_image_set_comp(buf, comp);
+		} else {
+			android_image_set_comp(buf, IH_COMP_NONE);
+		}
+
 	}
 
 	unmap_sysmem(buf);

commit 766c66006cf63bf3912dc8110412e31b5fabcb99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 14:58:50 2018 +0800

    rockchip: dts: rk3328: add rk3328-u-boot.dtsi
    
    Change-Id: I0fa2256aa02452b4e56fb7b2c035025e49cf61a8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index d9faee410c..aafafec649 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include "rk3328.dtsi"
+#include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr3-666.dtsi"
 
 / {
@@ -62,7 +63,6 @@
 };
 
 &uart2 {
-	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -79,7 +79,6 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
 	bus-width = <8>;
 	cap-mmc-highspeed;
 	supports-emmc;
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
new file mode 100644
index 0000000000..67842670ed
--- /dev/null
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 5f7542bd9a..e6df508c8f 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -187,7 +187,6 @@
 	};
 
 	grf: syscon@ff100000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xff100000 0x0 0x1000>;
 		#address-cells = <1>;
@@ -355,7 +354,6 @@
 	};
 
 	dmc: dmc {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-dmc";
 		reg = <0x0 0xff400000 0x0 0x1000
 		       0x0 0xff780000 0x0 0x3000
@@ -366,7 +364,6 @@
 	};
 
 	cru: clock-controller@ff440000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
 		reg = <0x0 0xff440000 0x0 0x1000>;
 		rockchip,grf = <&grf>;

commit 669ef96c7a4e34deda9ef8ca3feb14c67f41abfb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 14:58:07 2018 +0800

    configs: rk3328: set CONFIG_BOOTDELAY=0
    
    Change-Id: Ie276e574cb54e816aa8d847d6bc7766302d04662
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index b0fe0ad1ee..cd89448594 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -17,6 +18,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
@@ -104,7 +106,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit defeaf58f431a9d71216672bf57eeeb7b57ccd32
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 16 14:39:42 2018 +0800

    rockchip: boot_mode: print error code when adc keys detect failed
    
    Change-Id: Ida71ccbc6dd4e3a5144cee5748b77270928e1864
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 9ae0611004..5619ce5576 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -46,6 +46,7 @@ __weak int rockchip_dnl_key_pressed(void)
 	unsigned int val;
 	int channel = 1;
 	int node;
+	int ret;
 	u32 chns[2];
 
 	node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
@@ -54,8 +55,9 @@ __weak int rockchip_dnl_key_pressed(void)
 		       channel = chns[1];
 	}
 
-	if (adc_channel_single_shot("saradc", channel, &val)) {
-		printf("%s adc_channel_single_shot fail!\n", __func__);
+	ret = adc_channel_single_shot("saradc", channel, &val);
+	if (ret) {
+		printf("%s adc_channel_single_shot fail! ret=%d\n", __func__, ret);
 		return false;
 	}
 

commit e2ced6c33b4428ecbfb739c16bb7286dfc7c8206
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jul 16 08:35:32 2018 +0800

    android: only take the successed return value as load_address from android_image_load
    
    Function android_image_load will return a negative value in case
    of error. We should check the return value first before take it
    as an unsigned long load_address.
    
    This fix 008aee876ae5("boot_android: add runtime compatible for
    un/compressed kernel image"), which may cause system panic on
    a system that boot with none-android format image.
    
    Change-Id: I7f67c322d4ef343328b2276fe83432716148a76d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index ccf9dab5d7..97d01a7b00 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -569,12 +569,13 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
 	      boot_part_info.name, part_num);
 
-	load_address = android_image_load(dev_desc, &boot_part_info, load_address,
+	ret = android_image_load(dev_desc, &boot_part_info, load_address,
 				 -1UL);
-	if (load_address < 0) {
+	if (ret < 0) {
 		printf("%s %s part load fail\n", __func__, boot_part_info.name);
-		return load_address;
+		return ret;
 	}
+	load_address = ret;
 #endif
 
 	/* Set Android root variables. */

commit bff338f2e6ae821dca996e0dff687f4e5c560c49
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 14 19:15:35 2018 +0800

    lib: optee client: printf content end with "\n".
    
    Change-Id: I9a2f503c4e6b3c1f0c117f93fc2f2d429d43dfbc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index 969a5bb348..b811179caa 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -140,7 +140,7 @@ void OpteeClientMemInit(void)
 
 	tee_smc_call(&ArmSmcArgs);
 
-	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x\n",
 			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 
 	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);

commit bebecb3702371e05a2a75ae93883e2dea90d5141
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 15:34:13 2018 +0800

    configs: rk3399: enable vendor, cmd i2c/pmic/regulator
    
    Change-Id: Ifd88e7f22910aa3794de9c82585c1241943a21ac
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 6d318ec834..0b64fb61e0 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
@@ -26,6 +27,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
@@ -35,6 +37,8 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y

commit 9f6bbf6c0c8f577a677b82c1d2eae62f9454fa83
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 6 09:27:51 2018 +0800

    configs: rk3288: enable edp, cmd i2c/pmic/regulator
    
    Change-Id: I53bce213cb1cd585b0d087ba3859137c78008930
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
index c7ddda3cc2..f7522aeeaf 100644
--- a/configs/rk3288_defconfig
+++ b/configs/rk3288_defconfig
@@ -18,12 +18,15 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
@@ -83,6 +86,7 @@ CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y

commit 712b6f80ff313c5be766d0880c32ebd54df0ca0c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 20:33:38 2018 +0800

    regulator: rk8xx: implement get suspend value and enable callback
    
    - regulator_get_suspend_enable;
    - regulator_get_suspend_value;
    
    Change-Id: Id2326f4286d6eb45cfa5c0b47bcbf0030dbfd128
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 69b1515c3f..498597c047 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -532,6 +532,48 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
+static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	int ret, val;
+	uint mask;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << buck;
+		val = pmic_reg_read(pmic, RK816_REG_DCDC_SLP_EN);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF1);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		if (buck < 4)
+			mask = 1 << buck;
+		else
+			mask = 1 << 5;	/* BUCK5 for RK809 */
+
+		val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 						int num, int uvolt)
 {
@@ -689,6 +731,50 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 	return ret;
 }
 
+static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	int val, ret = 0;
+	uint mask;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << ldo;
+		val = pmic_reg_read(pmic, RK816_REG_LDO_SLP_EN);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF2);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		if (ldo == 8) {
+			mask = 1 << 4;	/* LDO9 */
+			val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
+			if (val < 0)
+				return val;
+			ret = val & mask ? 1 : 0;
+		} else {
+			mask = 1 << ldo;
+			val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(1));
+			if (val < 0)
+				return val;
+			ret = val & mask ? 1 : 0;
+		}
+		break;
+	}
+
+	return ret;
+}
+
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -715,6 +801,26 @@ static int buck_set_value(struct udevice *dev, int uvolt)
 	return _buck_set_value(dev->parent, buck, uvolt);
 }
 
+static int buck_get_suspend_value(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+	/* We assume level-1 voltage is enough for usage in U-Boot */
+	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
+	int mask = info->vsel_mask;
+	int ret, val;
+
+	if (info->vsel_sleep_reg == NA)
+		return -ENOSYS;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+	if (ret < 0)
+		return ret;
+
+	val = ret & mask;
+
+	return info->min_uv + val * info->step_uv;
+}
+
 static int buck_set_suspend_value(struct udevice *dev, int uvolt)
 {
 	int buck = dev->driver_data - 1;
@@ -736,6 +842,13 @@ static int buck_set_suspend_enable(struct udevice *dev, bool enable)
 	return _buck_set_suspend_enable(dev->parent, buck, enable);
 }
 
+static int buck_get_suspend_enable(struct udevice *dev)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_get_suspend_enable(dev->parent, buck);
+}
+
 static int buck_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
 {
 	int buck = dev->driver_data - 1;
@@ -809,6 +922,25 @@ static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
 	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
 }
 
+static int ldo_get_suspend_value(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
+	int mask = info->vsel_mask;
+	int val, ret;
+
+	if (info->vsel_sleep_reg == NA)
+		return -ENOSYS;
+
+	ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
+	if (ret < 0)
+		return ret;
+
+	val = ret & mask;
+
+	return info->min_uv + val * info->step_uv;
+}
+
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
 	int ldo = dev->driver_data - 1;
@@ -823,6 +955,13 @@ static int ldo_set_suspend_enable(struct udevice *dev, bool enable)
 	return _ldo_set_suspend_enable(dev->parent, ldo, enable);
 }
 
+static int ldo_get_suspend_enable(struct udevice *dev)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_get_suspend_enable(dev->parent, ldo);
+}
+
 static int ldo_get_enable(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
@@ -892,6 +1031,11 @@ static int switch_set_suspend_value(struct udevice *dev, int uvolt)
 	return 0;
 }
 
+static int switch_get_suspend_value(struct udevice *dev)
+{
+	return 0;
+}
+
 static int switch_set_suspend_enable(struct udevice *dev, bool enable)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
@@ -922,6 +1066,39 @@ static int switch_set_suspend_enable(struct udevice *dev, bool enable)
 	return ret;
 }
 
+static int switch_get_suspend_enable(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int val, ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
+
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	case RK809_ID:
+		mask = 1 << (sw + 6);
+		val = pmic_reg_read(dev->parent, RK817_POWER_SLP_EN(0));
+		if (val < 0)
+			return val;
+		ret = val & mask ? 1 : 0;
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
+		if (val < 0)
+			return val;
+		ret = val & mask ? 0 : 1;
+		break;
+	}
+
+	return ret;
+}
+
 static int rk8xx_buck_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -962,9 +1139,11 @@ static const struct dm_regulator_ops rk8xx_buck_ops = {
 	.get_value  = buck_get_value,
 	.set_value  = buck_set_value,
 	.set_suspend_value = buck_set_suspend_value,
+	.get_suspend_value = buck_get_suspend_value,
 	.get_enable = buck_get_enable,
 	.set_enable = buck_set_enable,
 	.set_suspend_enable = buck_set_suspend_enable,
+	.get_suspend_enable = buck_get_suspend_enable,
 	.set_ramp_delay = buck_set_ramp_delay,
 };
 
@@ -972,16 +1151,20 @@ static const struct dm_regulator_ops rk8xx_ldo_ops = {
 	.get_value  = ldo_get_value,
 	.set_value  = ldo_set_value,
 	.set_suspend_value = ldo_set_suspend_value,
+	.get_suspend_value = ldo_get_suspend_value,
 	.get_enable = ldo_get_enable,
 	.set_enable = ldo_set_enable,
 	.set_suspend_enable = ldo_set_suspend_enable,
+	.get_suspend_enable = ldo_get_suspend_enable,
 };
 
 static const struct dm_regulator_ops rk8xx_switch_ops = {
 	.get_enable = switch_get_enable,
 	.set_enable = switch_set_enable,
 	.set_suspend_enable = switch_set_suspend_enable,
+	.get_suspend_enable = switch_get_suspend_enable,
 	.set_suspend_value = switch_set_suspend_value,
+	.get_suspend_value = switch_get_suspend_value,
 };
 
 U_BOOT_DRIVER(rk8xx_buck) = {

commit 8152d3f659bdaa5006e97bc82e5b81734c9f3957
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 21:14:07 2018 +0800

    dm: regulator: update message print format
    
    Change-Id: Ibaa0a21c64f672b59f4e1dc3881ecf232f471444
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index fc0e1ad968..c319b53b95 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -288,22 +288,25 @@ int regulator_autoset(struct udevice *dev)
 static void regulator_show(struct udevice *dev, int ret)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	int uV = 0;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+	uV = regulator_get_value(dev);
 
-	printf("%s@%s: ", dev->name, uc_pdata->name);
-	printf("%duV <-> %duV, set %duV, %s",
-	       uc_pdata->min_uV, uc_pdata->max_uV, uc_pdata->min_uV,
+	printf("%25s@%15s: ", dev->name, uc_pdata->name);
+	printf("%7duV <-> %7duV, set %7duV, %s",
+	       uc_pdata->min_uV, uc_pdata->max_uV, uV,
 	       (uc_pdata->always_on || uc_pdata->boot_on) ?
-	       "enabling" : "not enabling");
-	if (ret)
-		printf(" (ret: %d)", ret);
+	       "enabling" : "disabled");
 
-	printf("; supsend %duV, %s",
+	printf(" | supsend %7duV, %s",
 	       uc_pdata->suspend_uV,
-	       uc_pdata->suspend_on ? "enabling" : "not enabling");
+	       uc_pdata->suspend_on ? "enabling" : "disabled");
 	if (uc_pdata->init_uV != -ENODATA)
-		printf("; init %duV", uc_pdata->init_uV);
+		printf(" ; init %7duV", uc_pdata->init_uV);
+
+	if (ret)
+		printf(" (ret: %d)", ret);
 
 	printf("\n");
 }

commit 71aebe781cc3331ed342df2082617e412709892c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 18:30:28 2018 +0800

    dm: regulator: add regulator_get_suspend_enable and regulator_get_suspend_value
    
    Change-Id: Ib5148f588896ff76a465923fb12956dc6c433de7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 145e7a5572..fc0e1ad968 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -84,6 +84,16 @@ int regulator_set_suspend_value(struct udevice *dev, int uV)
 	return ops->set_suspend_value(dev, uV);
 }
 
+int regulator_get_suspend_value(struct udevice *dev)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_suspend_value)
+		return -ENOSYS;
+
+	return ops->get_suspend_value(dev);
+}
+
 /*
  * To be called with at most caution as there is no check
  * before setting the actual voltage value.
@@ -155,6 +165,16 @@ int regulator_set_suspend_enable(struct udevice *dev, bool enable)
 	return ops->set_suspend_enable(dev, enable);
 }
 
+int regulator_get_suspend_enable(struct udevice *dev)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_suspend_enable)
+		return -ENOSYS;
+
+	return ops->get_suspend_enable(dev);
+}
+
 int regulator_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/regulator.h b/include/power/regulator.h
index a442d885bb..8e5f7c855d 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -196,6 +196,7 @@ struct dm_regulator_ops {
 	int (*get_value)(struct udevice *dev);
 	int (*set_value)(struct udevice *dev, int uV);
 	int (*set_suspend_value)(struct udevice *dev, int uV);
+	int (*get_suspend_value)(struct udevice *dev);
 
 	/**
 	 * The regulator output current function calls operates on a micro Amps.
@@ -221,6 +222,7 @@ struct dm_regulator_ops {
 	int (*get_enable)(struct udevice *dev);
 	int (*set_enable)(struct udevice *dev, bool enable);
 	int (*set_suspend_enable)(struct udevice *dev, bool enable);
+	int (*get_suspend_enable)(struct udevice *dev);
 
 	/**
 	 * The 'get/set_mode()' function calls should operate on a driver-
@@ -284,6 +286,14 @@ int regulator_set_value(struct udevice *dev, int uV);
  */
 int regulator_set_suspend_value(struct udevice *dev, int uV);
 
+/**
+ * regulator_get_suspend_value: get the suspend microvoltage value of a given regulator.
+ *
+ * @dev    - pointer to the regulator device
+ * @return - positive output value [uV] on success or negative errno if fail.
+ */
+int regulator_get_suspend_value(struct udevice *dev);
+
 /**
  * regulator_set_value_force: set the microvoltage value of a given regulator
  *			      without any min-,max condition check
@@ -337,6 +347,14 @@ int regulator_set_enable(struct udevice *dev, bool enable);
  */
 int regulator_set_suspend_enable(struct udevice *dev, bool enable);
 
+/**
+ * regulator_get_suspend_enable: get regulator suspend enable state
+ *
+ * @dev    - pointer to the regulator device
+ * @return - 0 on success or -errno val if fails
+ */
+int regulator_get_suspend_enable(struct udevice *dev);
+
 /**
  * regulator_get_mode: get active operation mode id of a given regulator
  *

commit 336e1992eb54f3785a6229e25f2bdcc63e04d63e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 17:33:47 2018 +0800

    test: rockchip: improve help guide
    
    Change-Id: I321f9b5357a1ef0ad0617124a84bb4890b45be7e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 5710884e46..757a47eddc 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -31,6 +31,13 @@ static board_module_t g_board_modules[] = {
 #endif
 };
 
+static void help(void)
+{
+	printf("Command: rktest [module] [args...]\n\n"
+	       "  - module: timer|key|emmc|rknand|regulator|eth|ir|brom_dnl|vendor\n"
+	       "  - args: depends on module\n");
+}
+
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -43,7 +50,7 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	if (argc >= 2) {
 		module_name = argv[1];
 	} else {
-		printf("cmd format: test_rockchip [module_name] [args...]\n");
+		help();
 		return 0;
 	}
 

commit 44e080753f6f4cba2e82114c51d6b98f6fd8672d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 17:15:26 2018 +0800

    test: rockchip: add vendor storage test
    
    Change-Id: I3bfb884c32e44371fb01351af4b20587f7a1fa1f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 90c710ce44..1930056ecd 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -13,3 +13,4 @@ obj-y += test-rknand.o
 obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
 obj-y += test-brom-dnl.o
+obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += test-vendor-storage.o
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index d6e808bfb9..5710884e46 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -25,7 +25,10 @@ static board_module_t g_board_modules[] = {
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
-	{ .name = "brom_dnl",	.test = board_brom_dnl_test}
+	{ .name = "brom_dnl",	.test = board_brom_dnl_test},
+#if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
+	{ .name = "vendor",	.test = board_vendor_storage_test },
+#endif
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index e628829a28..85e5335937 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -18,7 +18,9 @@ int board_eth_test(int argc, char * const argv[]);
 #if defined(CONFIG_RK_IR)
 int board_ir_test(int argc, char * const argv[]);
 #endif
-
 int board_brom_dnl_test(int argc, char * const argv[]);
+#if defined(CONFIG_ROCKCHIP_VENDOR_PARTITION)
+int board_vendor_storage_test(int argc, char * const argv[]);
+#endif
 
 #endif /* _TEST_ROCKCHIP_H */
diff --git a/test/rockchip/test-vendor-storage.c b/test/rockchip/test-vendor-storage.c
new file mode 100644
index 0000000000..ba75c237e7
--- /dev/null
+++ b/test/rockchip/test-vendor-storage.c
@@ -0,0 +1,14 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/vendor.h>
+
+int board_vendor_storage_test(int argc, char * const argv[])
+{
+	return vendor_storage_test();
+}

commit 143a7f24b7954a952c0b2d459e60eb75732def58
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 17:13:58 2018 +0800

    rockchip: vendor: export vendor_storage_test()
    
    used for rockchip test driver.
    
    Change-Id: Ib25a5ff4bae5fdf510dbbb89defabd8e3d0fcbfd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
index fdeafefd0a..ea82e0abd8 100644
--- a/arch/arm/include/asm/arch-rockchip/vendor.h
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -11,6 +11,7 @@
 #define VENDOR_LAN_MAC_ID	3 /* lan mac */
 #define VENDOR_BLUETOOTH_ID	4 /* bluetooth mac */
 
+int vendor_storage_test(void);
 int vendor_storage_read(u16 id, void *pbuf, u16 size);
 int vendor_storage_write(u16 id, void *pbuf, u16 size);
 
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 4b7e7140ea..d9a598de6a 100755
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -40,10 +40,7 @@
 #define FLASH_VENDOR_ITEM_NUM		62
 
 /* Vendor uinit test define */
-/* #define VENDOR_STORAGE_TEST */
-#ifdef VENDOR_STORAGE_TEST
 int vendor_storage_test(void);
-#endif /* VENDOR_STORAGE_TEST */
 
 struct vendor_item {
 	u16  id;
@@ -176,6 +173,7 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 int vendor_storage_init(void)
 {
 	int ret = 0;
+	int ret_size;
 	u8 *buffer;
 	u32 size, i;
 	u32 max_ver = 0;
@@ -235,9 +233,12 @@ int vendor_storage_init(void)
 
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
 	for (i = 0; i < VENDOR_PART_NUM; i++) {
-		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
-		if (ret != part_size)
-			return -EIO;
+		ret_size = vendor_ops((u8 *)vendor_info.hdr,
+				      part_size * i, part_size, 0);
+		if (ret_size != part_size) {
+			ret = -EIO;
+			goto out;
+		}
 
 		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
 		    (*(vendor_info.version2) == vendor_info.hdr->version)) {
@@ -247,6 +248,7 @@ int vendor_storage_init(void)
 			}
 		}
 	}
+
 	if (max_ver) {
 		debug("[Vendor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
 		/*
@@ -254,9 +256,12 @@ int vendor_storage_init(void)
 		 * version of vendor
 		 */
 		if (max_index != (VENDOR_PART_NUM - 1)) {
-			ret = vendor_ops((u8 *)vendor_info.hdr, part_size * max_index, part_size, 0);
-			if (ret != part_size)
-				return -EIO;
+			ret_size = vendor_ops((u8 *)vendor_info.hdr,
+					       part_size * max_index, part_size, 0);
+			if (ret_size != part_size) {
+				ret = -EIO;
+				goto out;
+			}
 		}
 	} else {
 		debug("[Vendor INFO]:Reset vendor info...\n");
@@ -271,11 +276,7 @@ int vendor_storage_init(void)
 	}
 	debug("[Vendor INFO]:ret=%d.\n", ret);
 
-#ifdef VENDOR_STORAGE_TEST
-	if (vendor_storage_test())
-		printf("[Vendor ERROR]:Vendor test result:failure\n");
-#endif
-
+out:
 	return ret;
 }
 
@@ -421,9 +422,8 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 /**********************************************************/
 /*              vendor API uinit test                      */
 /**********************************************************/
-#ifdef VENDOR_STORAGE_TEST
 /* Reset the vendor storage space to the initial state */
-void vendor_test_reset(void)
+static void vendor_test_reset(void)
 {
 	u16 i, part_size;
 	u32 size;
@@ -474,6 +474,15 @@ int vendor_storage_test(void)
 	u8 *buffer = NULL;
 	int ret = 0;
 
+	if (!bootdev_type) {
+		ret = vendor_storage_init();
+		if (ret) {
+			printf("%s: vendor storage init failed, ret=%d\n",
+			       __func__, ret);
+			return ret;
+		}
+	}
+
 	/*
 	 * Calculate the maximum number of items and the maximum
 	 * allocable memory for each item.
@@ -639,4 +648,3 @@ int vendor_storage_test(void)
 
 	return 0;
 }
-#endif /* VENDOR_STORAGE_TEST */

commit 3ee3aa89665b276da6d267d27a94fb82f61010c1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jul 14 17:25:26 2018 +0800

    common: fdt_support: replace env_update with env_update_filter
    
    Change-Id: Ic47d3b82b3aac6b36f9fe7803c0d3a165ebd9e05
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index da19054df8..667b7e06fa 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -306,13 +306,13 @@ int fdt_chosen(void *fdt)
 #ifdef CONFIG_ANDROID_AB
 			env_update_filter("bootargs", bootargs, "root=");
 #else
-			env_update("bootargs", bootargs);
-#endif
 			/*
 			 * Initrd fixup: remove unused "initrd=0x...,0x...",
 			 * this for compatible with legacy parameter.txt
 			 */
-			env_delete("bootargs", "initrd=");
+			env_update_filter("bootargs", bootargs, "initrd=");
+#endif
+
 			str = env_get("bootargs");
 		}
 #endif

commit b7618fd33c611de77a7c34bada9c24596f89f19d
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 13 10:17:35 2018 +0800

    drm/rockchip: rk3399 vop: add support win csc
    
    support rgb2yuv for yuv output, the csc matrix maybe
    bt601,bt601l,bt709 and bt2020, depend on connect output
    color space.
    
    Change-Id: Ibd8defc9a2519f850d8f3af7ee350022e5ee2ee4
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index bd11805fe7..9d613abeaf 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -82,6 +82,7 @@ struct crtc_state {
 	int crtc_y;
 	int crtc_w;
 	int crtc_h;
+	bool yuv_overlay;
 	struct rockchip_mcu_timing mcu_timing;
 };
 
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 28dc622fbd..0d20bf1b53 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -236,6 +236,8 @@ static int rockchip_vop_init(struct display_state *state)
 
 	vop->grf_ctrl = vop_data->grf_ctrl;
 	vop->line_flag = vop_data->line_flag;
+	vop->csc_table = vop_data->csc_table;
+	vop->win_csc = vop_data->win_csc;
 	vop->version = vop_data->version;
 	vop->max_output = vop_data->max_output;
 
@@ -388,6 +390,7 @@ static int rockchip_vop_init(struct display_state *state)
 			post_r2y_en = true;
 	}
 
+	crtc_state->yuv_overlay = yuv_overlay;
 	post_csc_mode = to_vop_csc_mode(conn_state->color_space);
 	VOP_CTRL_SET(vop, bcsh_r2y_en, post_r2y_en);
 	VOP_CTRL_SET(vop, bcsh_y2r_en, post_y2r_en);
@@ -584,6 +587,54 @@ static void scl_vop_cal_scl_fac(struct vop *vop,
 	}
 }
 
+static void vop_load_csc_table(struct vop *vop, u32 offset, const u32 *table)
+{
+	int i;
+
+	/*
+	 * so far the csc offset is not 0 and in the feature the csc offset
+	 * impossible be 0, so when the offset is 0, should return here.
+	 */
+	if (!table || offset == 0)
+		return;
+
+	for (i = 0; i < 8; i++)
+		vop_writel(vop, offset + i * 4, table[i]);
+}
+
+static int rockchip_vop_setup_csc_table(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct vop *vop = crtc_state->private;
+	const uint32_t *csc_table = NULL;
+
+	if (!vop->csc_table || !crtc_state->yuv_overlay)
+		return 0;
+	/* todo: only implement r2y*/
+	switch (conn_state->color_space) {
+	case V4L2_COLORSPACE_SMPTE170M:
+		csc_table = vop->csc_table->r2y_bt601_12_235;
+		break;
+	case V4L2_COLORSPACE_REC709:
+	case V4L2_COLORSPACE_DEFAULT:
+	case V4L2_COLORSPACE_JPEG:
+		csc_table = vop->csc_table->r2y_bt709;
+		break;
+	case V4L2_COLORSPACE_BT2020:
+		csc_table = vop->csc_table->r2y_bt2020;
+		break;
+	default:
+		csc_table = vop->csc_table->r2y_bt601;
+		break;
+	}
+
+	vop_load_csc_table(vop, vop->win_csc->r2y_offset, csc_table);
+	VOP_WIN_CSC_SET(vop, r2y_en, 1);
+
+	return 0;
+}
+
 static int rockchip_vop_set_plane(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -630,6 +681,7 @@ static int rockchip_vop_set_plane(struct display_state *state)
 
 	VOP_WIN_SET(vop, src_alpha_ctl, 0);
 
+	rockchip_vop_setup_csc_table(state);
 	VOP_WIN_SET(vop, enable, 1);
 	vop_cfg_done(vop);
 
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 03c48e4c7d..130e2a1cd6 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -58,6 +58,8 @@
 		REG_SET(x, name, 0, (x)->ctrl->name, v)
 #define VOP_LINE_FLAG_SET(x, name, v) \
 		REG_SET(x, name, 0, (x)->line_flag->name, v)
+#define VOP_WIN_CSC_SET(x, name, v) \
+		REG_SET(x, name, 0, (x)->win_csc->name, v)
 
 #define VOP_CTRL_GET(x, name) \
 		vop_read_reg(x, 0, &vop->ctrl->name)
@@ -429,6 +431,23 @@ struct vop_rect {
 	int height;
 };
 
+struct vop_csc_table {
+	const uint32_t *r2y_bt601;
+	const uint32_t *r2y_bt601_12_235;
+	const uint32_t *r2y_bt709;
+	const uint32_t *r2y_bt2020;
+};
+
+struct vop_csc {
+	struct vop_reg y2r_en;
+	struct vop_reg r2r_en;
+	struct vop_reg r2y_en;
+
+	uint32_t y2r_offset;
+	uint32_t r2r_offset;
+	uint32_t r2y_offset;
+};
+
 #define VOP_FEATURE_OUTPUT_10BIT	BIT(0)
 
 struct vop_data {
@@ -437,6 +456,8 @@ struct vop_data {
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
 	const struct vop_grf_ctrl *grf_ctrl;
+	const struct vop_csc_table *csc_table;
+	const struct vop_csc *win_csc;
 	int win_offset;
 	int reg_len;
 	u64 feature;
@@ -453,6 +474,8 @@ struct vop {
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
 	const struct vop_grf_ctrl *grf_ctrl;
+	const struct vop_csc_table *csc_table;
+	const struct vop_csc *win_csc;
 	int win_offset;
 	struct vop_rect max_output;
 };
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 66c9713e26..eed6d5b8b2 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -235,6 +235,42 @@ const struct vop_data rk3366_vop = {
 	.reg_len = RK3366_DSP_VACT_ST_END_F1 * 4,
 };
 
+static const uint32_t vop_csc_r2y_bt601[] = {
+	0x02590132, 0xff530075, 0x0200fead, 0xfe530200,
+	0x0000ffad, 0x00000200, 0x00080200, 0x00080200,
+};
+
+static const uint32_t vop_csc_r2y_bt601_12_235[] = {
+	0x02040107, 0xff680064, 0x01c2fed6, 0xffb7fe87,
+	0x0000ffb7, 0x00010200, 0x00080200, 0x00080200,
+};
+
+static const uint32_t vop_csc_r2y_bt709[] = {
+	0x027500bb, 0xff99003f, 0x01c2fea5, 0xfe6801c2,
+	0x0000ffd7, 0x00010200, 0x00080200, 0x00080200,
+};
+
+static const uint32_t vop_csc_r2y_bt2020[] = {
+	0x025300e6, 0xff830034, 0x01c1febd, 0xfe6401c1,
+	0x0000ffdc, 0x00010200, 0x00080200, 0x00080200,
+};
+
+static const struct vop_csc_table rk3399_csc_table = {
+	.r2y_bt601		= vop_csc_r2y_bt601,
+	.r2y_bt601_12_235	= vop_csc_r2y_bt601_12_235,
+	.r2y_bt709		= vop_csc_r2y_bt709,
+	.r2y_bt2020		= vop_csc_r2y_bt2020,
+};
+
+static const struct vop_csc rk3399_win0_csc = {
+	.r2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 0),
+	.y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1),
+	.r2y_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 2),
+	.y2r_offset = RK3399_WIN0_YUV2YUV_Y2R,
+	.r2r_offset = RK3399_WIN0_YUV2YUV_3X3,
+	.r2y_offset = RK3399_WIN0_YUV2YUV_R2Y,
+};
+
 const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
 	.max_output = {4096, 2160},
@@ -242,6 +278,8 @@ const struct vop_data rk3399_vop_big = {
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
+	.csc_table = &rk3399_csc_table,
+	.win_csc = &rk3399_win0_csc,
 	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
 };
 
@@ -251,6 +289,8 @@ const struct vop_data rk3399_vop_lit = {
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
+	.csc_table = &rk3399_csc_table,
+	.win_csc = &rk3399_win0_csc,
 	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
 };
 

commit 543c0e7848ba8d40d5c371aa0599e22d6c32a684
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jul 12 15:04:30 2018 +0800

    drm/rockchip: vop: fix VOP_REG_SUPPORT judge wrong
    
    If the register isn't define at rockchip_vop_reg.c, the default value
    of reg.major is 0, this will lead to judge error. so we add reg.mask
    conditions because if it's defined register, the reg.mask can't be 0.
    
    Change-Id: I368276d2d81983b5c5dbf591503def1de49ccdc1
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 8662ed1400..03c48e4c7d 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -16,10 +16,11 @@
 #define VOP_MINOR(version) 	((version) & 0xff)
 
 #define VOP_REG_SUPPORT(vop, reg) \
-		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
-		reg.begin_minor <= VOP_MINOR(vop->version) && \
-		reg.end_minor >= VOP_MINOR(vop->version) && \
-		reg.mask))
+		(reg.mask && \
+		 (!reg.major || \
+		  (reg.major == VOP_MAJOR(vop->version) && \
+		   reg.begin_minor <= VOP_MINOR(vop->version) && \
+		   reg.end_minor >= VOP_MINOR(vop->version))))
 
 #define VOP_WIN_SUPPORT(vop, win, name) \
 		VOP_REG_SUPPORT(vop, win->name)

commit 2c9c7f0d247d5101e5e52c7c3548ab0404051c55
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jul 6 16:37:18 2018 +0800

    common: fdt_support: delete root=
    
    Delete default "root=" in the dts when use AB system.
    
    The ab bootctl will choose the high priority system
    and storage its UUID to cmdline.The format is:
    root=PARTUUID=xxxx-xxxx...
    
    Change-Id: I4ad5b167952c84764fee741b527346bdfe5af1d7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index feb01d0b79..da19054df8 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -296,8 +296,18 @@ int fdt_chosen(void *fdt)
 
 		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
 		if (bootargs) {
-			/* Append kernel bootargs */
+			/*
+			 * Append kernel bootargs
+			 * If use AB system, delete default "root=" which route
+			 * to rootfs. Then the ab bootctl will choose the
+			 * high priority system to boot and add its UUID
+			 * to cmdline. The format is "roo=PARTUUID=xxxx...".
+			 */
+#ifdef CONFIG_ANDROID_AB
+			env_update_filter("bootargs", bootargs, "root=");
+#else
 			env_update("bootargs", bootargs);
+#endif
 			/*
 			 * Initrd fixup: remove unused "initrd=0x...,0x...",
 			 * this for compatible with legacy parameter.txt

commit 8f0cd0fbde62ccd7e966c78280b545bb9f3998ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 4 17:09:35 2018 +0800

    disk: rkparm: use env_update_filter() to append cmdline
    
    Change-Id: I4b5024adc4b2d176f1ffa25677323ba17a1d061f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 4dd2d564d7..8e2f37163f 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -48,14 +48,12 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	next = strchr(blkdev_parts, ':');
 	cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	*cmdline_end = '\0';
-	/* skip "CMDLINE:" */
-	env_update("bootargs", cmdline + strlen("CMDLINE:"));
-
 	/*
-	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
-	 * compatible with legacy parameter.txt
+	 * 1. skip "CMDLINE:"
+	 * 2. Initrd fixup: remove unused "initrd=0x...,0x...", this for
+	 *    compatible with legacy parameter.txt
 	 */
-	env_delete("bootargs", "initrd=");
+	env_update_filter("bootargs", cmdline + strlen("CMDLINE:"), "initrd=");
 
 	INIT_LIST_HEAD(parts_head);
 	while (next) {

commit feff4979f68be5bd86d0ef510db0187ddb3c8920
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:56:35 2018 +0800

    rockchip: rk322x: syscon: use dm_scan_fdt_dev() for bind
    
    Since usb phys are the subnodes of rk322 syscon node,
    we need to use dm_scan_fdt_dev() to scan the subnodes.
    
    Change-Id: Ife0d5d346953944952d5bb96441908573450763e
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
index 1b11b8cbeb..a93c4df77f 100644
--- a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
@@ -18,5 +18,6 @@ static const struct udevice_id rk322x_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk322x) = {
 	.name = "rk322x_syscon",
 	.id = UCLASS_SYSCON,
+	.bind = dm_scan_fdt_dev,
 	.of_match = rk322x_syscon_ids,
 };

commit 8f4f34a3e02da825b3480542eee34b143f6746c8
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:55:02 2018 +0800

    rockchip: dts: enable usb phy for rk322x boards
    
    Enable usb phy for rk3229 evb and gva.
    
    Change-Id: I675624f23f41adb83dcc618fc48d22f7e456c63b
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 66619689a6..f43fe86f6a 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -88,6 +88,18 @@
 	status = "okay";
 };
 
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		status = "okay";
+	};
+};
+
 &usb20_otg {
        status = "okay";
 };
diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index 35b266e3b3..f6a8f97121 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -297,6 +297,18 @@
 	status = "okay";
 };
 
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		status = "okay";
+	};
+};
+
 &usb20_otg {
        status = "okay";
 };

commit e4a1de104281b7b528e360a26c3d871790a3f9b4
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:53:31 2018 +0800

    rockchip: dts: rk322x: add usb phy nodes
    
    Add usb phy nodes for rk322x usb otg port and host port.
    
    Change-Id: Ib7f8c5d354d06af3882c9ee9641e8b0002b66855
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index bbb8d4962c..3192980c48 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -169,6 +169,51 @@
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3228-grf", "syscon";
 		reg = <0x11000000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy0: usb2-phy@760 {
+			compatible = "rockchip,rk322x-usb2phy";
+			reg = <0x0760 0x0c>;
+			status = "disabled";
+
+			u2phy0_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy0_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
+
+		u2phy1: usb2-phy@800 {
+			compatible = "rockchip,rk322x-usb2phy";
+			reg = <0x0800 0x0c>;
+			status = "disabled";
+
+			u2phy1_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy1_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
 	};
 
 	uart0: serial@11010000 {
@@ -455,6 +500,8 @@
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
+		phys = <&u2phy0_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 

commit ed5a6560152086996ea7ad0648ab4929d7b4116c
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:51:59 2018 +0800

    configs: rockchip: enable usb phy support for rk3229 boards
    
    Change-Id: I16d1cfbe4fddf7f0990c522fb07e130fcb58b799
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 94051e7e3b..f83bc88bfc 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -64,6 +64,7 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index 26e9c9bfee..f438447f61 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -55,6 +55,8 @@ CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y

commit a636a6d7a26ca3036c0657f998e6537ff19517cd
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 09:46:04 2018 +0800

    phy: phy-rockchip-inno-usb2: add support for rk322x
    
    This patch add phy configuration for rk322x, and
    open pre-emphasize in non-chirp state for otg port.
    
    Change-Id: I33d1d64fd3dfe6a328ec0695ff6e648280860137
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 70bdcd1f4e..d42a889398 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -532,9 +532,24 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
+	if (rphy->phy_cfg->phy_tuning)
+		rphy->phy_cfg->phy_tuning(rphy);
+
 	return 0;
 }
 
+static int rk322x_usb2phy_tuning(struct rockchip_usb2phy *rphy)
+{
+	void __iomem *base = get_reg_base(rphy);
+	int ret = 0;
+
+	/* Open pre-emphasize in non-chirp state for PHY0 otg port */
+	if (rphy->phy_cfg->reg == 0x760)
+		ret = writel(0x00070004, base + 0x76c);
+
+	return ret;
+}
+
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
@@ -590,6 +605,76 @@ static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
 	{ /* sentinel */ }
 };
 
+static const struct rockchip_usb2phy_cfg rk322x_phy_cfgs[] = {
+	{
+		.reg = 0x760,
+		.num_ports	= 2,
+		.phy_tuning	= rk322x_usb2phy_tuning,
+		.clkout_ctl	= { 0x0768, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0760, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
+				.bvalid_det_clr	= { 0x06a0, 3, 3, 0, 1 },
+				.iddig_output	= { 0x0760, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0760, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0680, 6, 6, 0, 1 },
+				.idfall_det_st	= { 0x0690, 6, 6, 0, 1 },
+				.idfall_det_clr	= { 0x06a0, 6, 6, 0, 1 },
+				.idrise_det_en	= { 0x0680, 5, 5, 0, 1 },
+				.idrise_det_st	= { 0x0690, 5, 5, 0, 1 },
+				.idrise_det_clr	= { 0x06a0, 5, 5, 0, 1 },
+				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
+				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
+				.utmi_bvalid	= { 0x0480, 4, 4, 0, 1 },
+				.utmi_iddig	= { 0x0480, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x0480, 3, 2, 0, 1 },
+				.vbus_det_en	= { 0x0788, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0764, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
+				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0760, 3, 0, 5, 1 },
+			.cp_det		= { 0x0884, 4, 4, 0, 1 },
+			.dcp_det	= { 0x0884, 3, 3, 0, 1 },
+			.dp_det		= { 0x0884, 5, 5, 0, 1 },
+			.idm_sink_en	= { 0x0768, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0768, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0768, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0768, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0768, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0768, 11, 11, 0, 1 },
+		},
+	},
+	{
+		.reg = 0x800,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0808, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x804, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0684, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x0694, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x06a4, 1, 1, 0, 1 }
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x800, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0684, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0694, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x06a4, 0, 0, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
 static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
 	{
 		.reg = 0x100,
@@ -687,6 +772,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 
 static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
+	{ .compatible = "rockchip,rk322x-usb2phy", .data = (ulong)&rk322x_phy_cfgs },
 	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },

commit 0958c00c0776311c62c607d699bc836e2a4ef428
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Jun 12 14:26:54 2018 +0800

    rockchip: rk3308: enable lzo/lz4/gzip compressed kernel image
    
    Change-Id: Ic44218ddf2ee8a993b4530cad04d712d6aecfccc
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 6a67a31103..9bddfec667 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -9,12 +9,12 @@ CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
@@ -62,4 +62,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZ4=y
+CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index e4756a043c..b562c94cd3 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -50,13 +50,15 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
+	"kernel_addr_c=0x04080000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 #else
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x03200000\0" \
-	"kernel_addr_r=0x2008000\0" \
+	"kernel_addr_r=0x00058000\0" \
+	"kernel_addr_c=0x2008000\0" \
 	"ramdisk_addr_r=0x03080000\0"
 #endif
 

commit 008aee876ae5041eb6e2889c9becb47351d0ee47
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Jun 12 14:21:17 2018 +0800

    boot_android: add runtime compatible for un/compressed kernel image
    
    This patch add auto parse the compress format of kernel image.
    Then decompress the compressed kernel image for arm64, as for
    arm32 zImage, we only need to load it to a higher memory, then
    the kernel will handle the decompress itself.
    
    Test on RK3308 AARCH64 mode (Cortex A35 816 MHZ) boot with eMMC:
    
    ------------------------------------------------------------------
    Format    |  Size(Byte) | Ratio | Decomp time(ms) | Boot time(ms) |
    -------------------------------------------------------------------
    Image     | 7720968     |       |                 |     488       |
    -------------------------------------------------------------------
    Image.lz4 | 4119448     | 53%   |       59        |     455       |
    -------------------------------------------------------------------
    Image.lzo | 3858322     | 49%   |       141       |     536       |
    -------------------------------------------------------------------
    Image.gz  | 3529108     | 45%   |       222       |     609       |
    -------------------------------------------------------------------
    Image.bz2 | 3295914     | 42%   |       2940      |               |
    -------------------------------------------------------------------
    Image.lzma| 2683750     | 34%   |                 |               |
    -------------------------------------------------------------------
    
    Note: the boot time is counted from first ddr init log to first Kernel log.
    
    Change-Id: I73b12ec944fbc8238b0e061a37e2f31aa3093231
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 308d1a7b11..4e775cea3b 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -42,10 +42,12 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
+#if defined(CONFIG_ARM64)
 	/* ARM64 kernel load addr need to align to 0x80000, and android boot.img
 	 * have a 2KB header, need to reserve space for it.
 	 */
 	load_address &= ~0x7ffff;
+#endif
 	load_address -= 0x800; /* default page size for boot header */
 	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
 	if (!dev_desc) {
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index add6003397..ccf9dab5d7 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -569,11 +569,11 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
 	      boot_part_info.name, part_num);
 
-	ret = android_image_load(dev_desc, &boot_part_info, load_address,
+	load_address = android_image_load(dev_desc, &boot_part_info, load_address,
 				 -1UL);
-	if (ret < 0) {
+	if (load_address < 0) {
 		printf("%s %s part load fail\n", __func__, boot_part_info.name);
-		return ret;
+		return load_address;
 	}
 #endif
 
diff --git a/common/bootm.c b/common/bootm.c
index 0bebb2d046..97bfd23226 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -162,7 +162,7 @@ static int bootm_find_os(cmd_tbl_t *cmdtp, int flag, int argc,
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	case IMAGE_FORMAT_ANDROID:
 		images.os.type = IH_TYPE_KERNEL;
-		images.os.comp = IH_COMP_NONE;
+		images.os.comp = android_image_get_comp(os_hdr);
 		images.os.os = IH_OS_LINUX;
 
 		images.os.end = android_image_get_end(os_hdr);
@@ -344,6 +344,33 @@ static int handle_decomp_error(int comp_type, size_t uncomp_size,
 	return BOOTM_ERR_RESET;
 }
 
+int bootm_parse_comp(const unsigned char *hdr)
+{
+#if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
+	ulong start, end;
+
+	if (!bootz_setup((ulong)hdr, &start, &end))
+		return IH_COMP_ZIMAGE;
+#endif
+#if defined(CONFIG_LZ4)
+	if (lz4_is_valid_header(hdr))
+		return IH_COMP_LZ4;
+#endif
+#if defined(CONFIG_LZO)
+	if (lzop_is_valid_header(hdr))
+		return IH_COMP_LZO;
+#endif
+#if defined(CONFIG_GZIP)
+	if (gzip_parse_header(hdr, 0xffff) > 0)
+		return IH_COMP_GZIP;
+#endif
+#if defined(CONFIG_BZIP2)
+	if ((hdr[0] == 'B') && (hdr[1] == 'Z') && (hdr[2] == 'h'))
+		return IH_COMP_BZIP2;
+#endif
+	return IH_COMP_NONE;
+}
+
 int bootm_decomp_image(int comp, ulong load, ulong image_start, int type,
 		       void *load_buf, void *image_buf, ulong image_len,
 		       uint unc_len, ulong *load_end)
diff --git a/common/image-android.c b/common/image-android.c
index 0013f33cb2..c05279bb1e 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -18,6 +18,7 @@
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 
 static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
+static u32 android_kernel_comp_type = IH_COMP_NONE;
 
 static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 {
@@ -38,6 +39,23 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 	return hdr->kernel_addr;
 }
 
+void android_image_set_comp(struct andr_img_hdr *hdr, u32 comp)
+{
+	android_kernel_comp_type = comp;
+}
+
+u32 android_image_get_comp(const struct andr_img_hdr *hdr)
+{
+	return android_kernel_comp_type;
+}
+
+int android_image_parse_kernel_comp(const struct andr_img_hdr *hdr)
+{
+	ulong kaddr = android_image_get_kernel_addr(hdr);
+
+	return bootm_parse_comp((const unsigned char *)kaddr);
+}
+
 /**
  * android_image_get_kernel() - processes kernel part of Android boot images
  * @hdr:	Pointer to image header, which is at the start
@@ -127,6 +145,16 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr)
 	return end;
 }
 
+u32 android_image_get_ksize(const struct andr_img_hdr *hdr)
+{
+	return hdr->kernel_size;
+}
+
+void android_image_set_kload(struct andr_img_hdr *hdr, u32 load_address)
+{
+	hdr->kernel_addr = load_address;
+}
+
 ulong android_image_get_kload(const struct andr_img_hdr *hdr)
 {
 	return android_image_get_kernel_addr(hdr);
@@ -179,7 +207,10 @@ long android_image_load(struct blk_desc *dev_desc,
 			unsigned long load_address,
 			unsigned long max_size) {
 	void *buf;
-	long blk_cnt, blk_read = 0;
+	long blk_cnt = 0;
+	long blk_read = 0;
+	u32 comp;
+	u32 kload_addr;
 
 	if (max_size < part_info->blksz)
 		return -1;
@@ -189,17 +220,33 @@ long android_image_load(struct blk_desc *dev_desc,
 	 */
 	buf = map_sysmem(load_address, 0 /* size */);
 
-	/* Read the Android header first and then read the rest. */
-	if (blk_dread(dev_desc, part_info->start, 1, buf) != 1)
+	/* Read the Android boot.img header and a few parts of
+	 * the head of kernel image.
+	 */
+	if (blk_dread(dev_desc, part_info->start, 8, buf) != 8)
 		blk_read = -1;
 
 	if (!blk_read && android_image_check_header(buf) != 0) {
 		printf("** Invalid Android Image header **\n");
 		blk_read = -1;
 	}
+
+	comp = android_image_parse_kernel_comp(buf);
+
 	if (!blk_read) {
 		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
 			   part_info->blksz - 1) / part_info->blksz;
+		/*
+		 * We should load a compressed kernel Image
+		 * to high memory
+		 */
+		if (comp != IH_COMP_NONE) {
+			load_address += android_image_get_ksize(buf) * 3;
+			load_address = env_get_ulong("kernel_addr_c", 16, load_address);
+			unmap_sysmem(buf);
+			buf = map_sysmem(load_address, 0 /* size */);
+		}
+
 		if (blk_cnt * part_info->blksz > max_size) {
 			debug("Android Image too big (%lu bytes, max %lu)\n",
 			      android_image_get_end(buf) - (ulong)buf,
@@ -213,15 +260,26 @@ long android_image_load(struct blk_desc *dev_desc,
 		}
 	}
 
+	/*
+	 * zImage is not need to decompress
+	 * kernel will handle decompress itself
+	 */
+	if (comp != IH_COMP_NONE && comp != IH_COMP_ZIMAGE) {
+		kload_addr = env_get_ulong("kernel_addr_r", 16, 0x02080000);
+		android_image_set_kload(buf, kload_addr);
+		android_image_set_comp(buf, comp);
+	} else {
+		android_image_set_comp(buf, IH_COMP_NONE);
+	}
+
 	unmap_sysmem(buf);
-	if (blk_read < 0)
-		return blk_read;
 
 	debug("%lu blocks read: %s\n",
 	      blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
 	if (blk_read != blk_cnt)
 		return -1;
-	return blk_read;
+
+	return load_address;
 }
 
 #if !defined(CONFIG_SPL_BUILD)
diff --git a/include/common.h b/include/common.h
index a53559a3e5..911a6786bf 100644
--- a/include/common.h
+++ b/include/common.h
@@ -664,6 +664,7 @@ int gzwrite(unsigned char *src, int len,
 	    u64 szexpected);
 
 /* lib/lz4_wrapper.c */
+bool lz4_is_valid_header(const unsigned char *h);
 int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn);
 
 /* lib/qsort.c */
diff --git a/include/image.h b/include/image.h
index 29fdf9c13b..d8892114e7 100644
--- a/include/image.h
+++ b/include/image.h
@@ -290,6 +290,7 @@ enum {
 	IH_COMP_LZMA,			/* lzma  Compression Used	*/
 	IH_COMP_LZO,			/* lzo   Compression Used	*/
 	IH_COMP_LZ4,			/* lz4   Compression Used	*/
+	IH_COMP_ZIMAGE,			/* zImage Decompressed itself   */
 
 	IH_COMP_COUNT,
 };
@@ -1263,23 +1264,25 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len);
 int android_image_get_fdt(const struct andr_img_hdr *hdr,
 			      ulong *rd_data);
+u32 android_image_get_comp(const struct andr_img_hdr *hdr);
 ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
 /** android_image_load - Load an Android Image from storage.
  *
- * Load an Android Image based on the header size in the storage. Return the
- * number of bytes read from storage, which could be bigger than the actual
- * Android Image as described in the header size. In case of error reading the
- * image or if the image size needed to be read from disk is bigger than the
- * the passed |max_size| a negative number is returned.
+ * Load an Android Image based on the header size in the storage.
+ * Return the final load address, which could be a different address
+ * of argument load_address, if the Kernel Image is compressed. In case
+ * of error reading the image or if the image size needed to be read
+ * from disk is bigger than the passed |max_size| a negative number
+ * is returned.
  *
  * @dev_desc:		The device where to read the image from
  * @part_info:		The partition in |dev_desc| where to read the image from
  * @load_address:	The address where the image will be loaded
  * @max_size:		The maximum loaded size, in bytes
- * @return the number of bytes read or a negative number in case of error.
+ * @return the final load address or a negative number in case of error.
  */
 long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
@@ -1288,6 +1291,8 @@ long android_image_load(struct blk_desc *dev_desc,
 
 #endif /* CONFIG_ANDROID_BOOT_IMAGE */
 
+int bootm_parse_comp(const unsigned char *hdr);
+
 /**
  * board_fit_config_name_match() - Check for a matching board name
  *
diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index 6dc8b764b3..eb29c01d24 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -63,6 +63,20 @@ struct lz4_block_header {
 	/* + u32 block_checksum iff has_block_checksum is set */
 } __packed;
 
+bool lz4_is_valid_header(const unsigned char *h)
+{
+	const struct lz4_frame_header *hdr  = (const struct lz4_frame_header *)h;
+	/* We assume there's always only a single, standard frame. */
+	if (le32_to_cpu(hdr->magic) != LZ4F_MAGIC || hdr->version != 1)
+		return false;        /* unknown format */
+	if (hdr->reserved0 || hdr->reserved1 || hdr->reserved2)
+		return false; /* reserved must be zero */
+	if (!hdr->independent_blocks)
+		return false; /* we can't support this yet */
+
+	return true;
+}
+
 int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn)
 {
 	const void *end = dst + *dstn;

commit d5d77aebb0bdba422a93787b85c520b1c9aa7500
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Jul 6 10:16:48 2018 +0800

    lib: optee_client: modify macro in Kconfig
    
    CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION is support
    for OPTEE_V1
    
    Change-Id: Ic83d06a08a1d409905dcc61e0f7346ab23261b0c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index c0e5565ddc..2e61c40bf8 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -23,8 +23,7 @@ config OPTEE_V2
 	  step.
 
 config OPTEE_ALWAYS_USE_SECURITY_PARTITION
-	bool "Support use emmc security partition for OPTEE version 2.0"
-	depends on OPTEE_V2
+	bool "Support use emmc security partition for OPTEE"
 	help
 	  U-boot can secure store data to security partition
 	  for nand or emmc, do not to store data to rpmb.

commit 0d2d4c06b32c4e44ed0f308ca818b07ce1b4b846
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jul 12 23:28:16 2018 +0800

    drivers: rkflash: Fully remove caching last few sectors in ftl_write.
    
    1.Remove cashe write
    2.Remark power off lost page
    
    Change-Id: I6cdeb0f5b2d40e1c00d4cdd7f2260bf869c0e7a8
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index 466f5ff3fa..722a608011 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-07-04
+ * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-07-13
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -107,23 +107,23 @@ l2p_addr_tran.isra.0:
 	.cfi_endproc
 .LFE352:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
-	.section	.text.ftl_set_blk_mode.part.7,"ax",%progbits
+	.section	.text.ftl_set_blk_mode.part.6,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_set_blk_mode.part.7, %function
-ftl_set_blk_mode.part.7:
-.LFB359:
+	.type	ftl_set_blk_mode.part.6, %function
+ftl_set_blk_mode.part.6:
+.LFB358:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1346 0
+	.loc 2 1395 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL12:
-	.loc 2 1349 0
+	.loc 2 1398 0
 	ldr	r3, .L6
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
@@ -140,8 +140,8 @@ ftl_set_blk_mode.part.7:
 .L6:
 	.word	.LANCHOR1
 	.cfi_endproc
-.LFE359:
-	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+.LFE358:
+	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
 	.global	Ftl_log2
@@ -197,7 +197,7 @@ Ftl_log2:
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 .LFB206:
-	.loc 3 159 0
+	.loc 3 160 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -217,43 +217,43 @@ FtlPrintInfo:
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 .LFB207:
-	.loc 3 165 0
+	.loc 3 166 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL22:
-	.loc 3 168 0
+	.loc 3 169 0
 	ldr	r3, .L13
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
 .LVL23:
-	.loc 3 169 0
+	.loc 3 170 0
 	ldr	r2, .L13+4
-	.loc 3 168 0
-	str	r0, [r3]
 	.loc 3 169 0
+	str	r0, [r3]
+	.loc 3 170 0
 	ldr	r3, .L13+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	.loc 3 170 0
+	.loc 3 171 0
 	ldr	r2, .L13+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
 .LVL24:
 	ldr	r2, .L13+16
 	strh	r0, [r2]	@ movhi
-	.loc 3 174 0
+	.loc 3 175 0
 	movs	r0, #0
-	.loc 3 171 0
+	.loc 3 172 0
 	ldr	r2, .L13+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
 	ldr	r2, .L13+24
 	str	r3, [r2]
-	.loc 3 174 0
+	.loc 3 175 0
 	bx	lr
 .L14:
 	.align	2
@@ -279,15 +279,15 @@ FtlSysBlkNumInit:
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
 .LFB208:
-	.loc 3 183 0
+	.loc 3 184 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL25:
-	.loc 3 188 0
+	.loc 3 189 0
 	ldrh	r1, [r0]
 	ldr	r2, .L25
-	.loc 3 183 0
+	.loc 3 184 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -298,219 +298,219 @@ FtlConstantsInit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 3 183 0
+	.loc 3 184 0
 	mov	r7, r0
-	.loc 3 189 0
+	.loc 3 190 0
 	ldrh	r5, [r0, #2]
-	.loc 3 188 0
-	strh	r1, [r2]	@ movhi
 	.loc 3 189 0
-	ldr	r2, .L25+4
+	strh	r1, [r2]	@ movhi
 	.loc 3 190 0
+	ldr	r2, .L25+4
+	.loc 3 191 0
 	ldrh	r0, [r0, #4]
 .LVL26:
-	.loc 3 189 0
-	strh	r5, [r2]	@ movhi
 	.loc 3 190 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 191 0
 	ldr	r2, .L25+8
 	strh	r0, [r2]	@ movhi
-	.loc 3 191 0
+	.loc 3 192 0
 	ldrh	r2, [r7, #14]
 	cmp	r2, #4
 	bne	.L16
-	.loc 3 192 0
+	.loc 3 193 0
 	ldrh	r2, [r7, #6]
 	ldr	r4, .L25+12
 	lsrs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
-	.loc 3 193 0
+	.loc 3 194 0
 	movs	r4, #8
 	ldr	r2, .L25+16
 	strh	r4, [r2]	@ movhi
 .L16:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	ldr	r4, .L25+20
-	.loc 3 183 0 discriminator 3
+	.loc 3 184 0 discriminator 3
 	movs	r2, #0
 .L17:
 .LVL27:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	strb	r2, [r2, r4]
-	.loc 3 196 0 discriminator 3
+	.loc 3 197 0 discriminator 3
 	adds	r2, r2, #1
 .LVL28:
 	cmp	r2, #32
 	bne	.L17
-	.loc 3 198 0
+	.loc 3 199 0
 	ldr	r2, .L25+24
 .LVL29:
-	.loc 3 200 0
+	.loc 3 201 0
 	cmp	r1, #1
-	.loc 3 198 0
+	.loc 3 199 0
 	mov	r4, #5
-	.loc 3 204 0
+	.loc 3 205 0
 	smulbb	r5, r5, r0
-	.loc 3 199 0
+	.loc 3 200 0
 	mov	r6, #0
-	.loc 3 198 0
+	.loc 3 199 0
 	strh	r4, [r2]	@ movhi
-	.loc 3 201 0
+	.loc 3 202 0
 	it	eq
 	strheq	r1, [r2]	@ movhi
-	.loc 3 202 0
+	.loc 3 203 0
 	mov	r1, #640
 	ldr	r2, .L25+28
-	.loc 3 204 0
+	.loc 3 205 0
 	uxth	r5, r5
-	.loc 3 199 0
+	.loc 3 200 0
 	ldr	r4, .L25+32
-	.loc 3 202 0
+	.loc 3 203 0
 	strh	r1, [r2]	@ movhi
-	.loc 3 204 0
+	.loc 3 205 0
 	ldr	r2, .L25+36
-	.loc 3 199 0
+	.loc 3 200 0
 	strh	r6, [r4]	@ movhi
-	.loc 3 210 0
+	.loc 3 211 0
 	ldr	r6, .L25+40
-	.loc 3 204 0
-	strh	r5, [r2]	@ movhi
 	.loc 3 205 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 206 0
 	ldr	r2, .L25+12
 	ldrh	r4, [r2]
 	ldr	r2, .L25+44
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r2]	@ movhi
-	.loc 3 206 0
+	.loc 3 207 0
 	bl	Ftl_log2
 .LVL30:
 	ldr	r2, .L25+48
-	.loc 3 207 0
+	.loc 3 208 0
 	ldrh	r8, [r7, #12]
 	ldr	r3, .L25+52
-	.loc 3 206 0
+	.loc 3 207 0
 	strh	r0, [r2]	@ movhi
-	.loc 3 208 0
-	ldr	r2, .L25+56
 	.loc 3 209 0
+	ldr	r2, .L25+56
+	.loc 3 210 0
 	smulbb	r1, r5, r8
-	.loc 3 207 0
-	strh	r8, [r3]	@ movhi
 	.loc 3 208 0
-	strh	r8, [r2]	@ movhi
+	strh	r8, [r3]	@ movhi
 	.loc 3 209 0
+	strh	r8, [r2]	@ movhi
+	.loc 3 210 0
 	ldr	r2, .L25+60
 	strh	r1, [r2]	@ movhi
-	.loc 3 210 0
+	.loc 3 211 0
 	ldr	r2, .L25+16
 	ldrh	fp, [r2]
 	mov	r0, fp
 	bl	Ftl_log2
 .LVL31:
-	.loc 3 212 0
+	.loc 3 213 0
 	lsl	r2, fp, #9
 	ldr	r1, .L25+64
-	.loc 3 214 0
+	.loc 3 215 0
 	ldr	r3, .L25+68
-	.loc 3 210 0
+	.loc 3 211 0
 	mov	r10, r0
-	.loc 3 212 0
+	.loc 3 213 0
 	uxth	r2, r2
-	.loc 3 210 0
+	.loc 3 211 0
 	strh	r0, [r6]	@ movhi
-	.loc 3 218 0
+	.loc 3 219 0
 	mov	r0, #5120
-	.loc 3 212 0
-	strh	r2, [r1]	@ movhi
 	.loc 3 213 0
+	strh	r2, [r1]	@ movhi
+	.loc 3 214 0
 	lsrs	r2, r2, #8
 	ldr	r1, .L25+72
 	strh	r2, [r1]	@ movhi
-	.loc 3 218 0
+	.loc 3 219 0
 	mul	r1, r8, fp
-	.loc 3 214 0
+	.loc 3 215 0
 	ldrh	r2, [r7, #20]
 	ldr	r7, .L25+52
 .LVL32:
 	strh	r2, [r3]	@ movhi
-	.loc 3 216 0
+	.loc 3 217 0
 	mul	r3, r4, r5
 	ldr	r2, .L25+76
-	.loc 3 223 0
+	.loc 3 224 0
 	lsls	r4, r4, #6
-	.loc 3 216 0
-	str	r3, [r2]
 	.loc 3 217 0
+	str	r3, [r2]
+	.loc 3 218 0
 	mul	r3, fp, r3
 	ldr	r2, .L25+80
 	mul	r3, r8, r3
 	ldr	r8, .L25+116
 	asrs	r3, r3, #11
 	str	r3, [r2]
-	.loc 3 218 0
+	.loc 3 219 0
 	bl	__aeabi_idiv
 .LVL33:
 	uxth	r0, r0
-	.loc 3 221 0
+	.loc 3 222 0
 	ldr	r2, .L25+84
-	.loc 3 226 0
+	.loc 3 227 0
 	mov	r1, r5
-	.loc 3 219 0
-	cmp	r0, #4
 	.loc 3 220 0
+	cmp	r0, #4
+	.loc 3 221 0
 	itet	ls
 	movls	r3, #4
-	.loc 3 218 0
+	.loc 3 219 0
 	strhhi	r0, [r8]	@ movhi
-	.loc 3 220 0
-	strhls	r3, [r8]	@ movhi
 	.loc 3 221 0
+	strhls	r3, [r8]	@ movhi
+	.loc 3 222 0
 	mov	r3, #640
 	asr	r3, r3, r10
-	.loc 3 223 0
+	.loc 3 224 0
 	add	r10, r10, #9
 	asr	r4, r4, r10
-	.loc 3 224 0
+	.loc 3 225 0
 	ldr	r10, .L25+120
-	.loc 3 221 0
+	.loc 3 222 0
 	adds	r3, r3, #2
-	.loc 3 226 0
+	.loc 3 227 0
 	ldrh	r0, [r8]
-	.loc 3 221 0
+	.loc 3 222 0
 	strh	r3, [r2]	@ movhi
-	.loc 3 223 0
+	.loc 3 224 0
 	ldr	r3, .L25+88
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
-	.loc 3 224 0
+	.loc 3 225 0
 	mul	r3, r5, r4
-	.loc 3 226 0
+	.loc 3 227 0
 	adds	r4, r4, #8
-	.loc 3 224 0
+	.loc 3 225 0
 	str	r3, [r10]
-	.loc 3 226 0
+	.loc 3 227 0
 	bl	__aeabi_uidiv
 .LVL34:
 	uxtah	r0, r4, r0
 	ldr	r4, .L25+92
-	.loc 3 227 0
-	cmp	r5, #1
 	.loc 3 228 0
+	cmp	r5, #1
+	.loc 3 229 0
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
-	.loc 3 231 0
+	.loc 3 232 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
 .LVL35:
-	.loc 3 232 0
+	.loc 3 233 0
 	ldr	r2, [r4]
-	.loc 3 236 0
+	.loc 3 237 0
 	movs	r0, #0
-	.loc 3 232 0
+	.loc 3 233 0
 	ldr	r3, .L25+96
 	str	r2, [r3]
-	.loc 3 234 0
+	.loc 3 235 0
 	ldr	r3, .L25+100
 	ldr	r2, [r3]
 	ldrh	r3, [r7]
@@ -522,22 +522,22 @@ FtlConstantsInit:
 	ldr	r2, .L25+104
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	.loc 3 235 0
+	.loc 3 236 0
 	movs	r2, #32
 	ldr	r3, .L25+108
 	strh	r2, [r3]	@ movhi
-	.loc 3 236 0
+	.loc 3 237 0
 	ldr	r3, .L25+112
 	str	r0, [r3]
-	.loc 3 237 0
+	.loc 3 238 0
 	ldrh	r3, [r8]
 	adds	r3, r3, #3
 	strh	r3, [r8]	@ movhi
-	.loc 3 238 0
+	.loc 3 239 0
 	ldr	r3, [r10]
 	adds	r3, r3, #3
 	str	r3, [r10]
-	.loc 3 263 0
+	.loc 3 264 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L26:
 	.align	2
@@ -596,8 +596,8 @@ IsBlkInVendorPart:
 	ldr	r3, .L34
 	ldrh	r3, [r3]
 	cbz	r3, .L33
-.LBB166:
-.LBB167:
+.LBB185:
+.LBB186:
 	.loc 3 519 0
 	ldr	r3, .L34+4
 	.loc 3 518 0
@@ -611,16 +611,16 @@ IsBlkInVendorPart:
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE167:
-.LBE166:
+.LBE186:
+.LBE185:
 	.loc 3 524 0
 	movs	r0, #0
 .LVL37:
 	bx	lr
 .LVL38:
 .L30:
-.LBB169:
-.LBB168:
+.LBB188:
+.LBB187:
 	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
@@ -628,8 +628,8 @@ IsBlkInVendorPart:
 	.loc 3 520 0
 	movs	r0, #1
 .LVL39:
-.LBE168:
-.LBE169:
+.LBE187:
+.LBE188:
 	.loc 3 525 0
 	bx	lr
 .L35:
@@ -641,6 +641,27 @@ IsBlkInVendorPart:
 	.cfi_endproc
 .LFE211:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB219:
+	.loc 3 952 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 3 954 0
+	movs	r0, #0
+	bx	lr
+	.cfi_endproc
+.LFE219:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",%progbits
 	.align	1
 	.global	sftl_get_density
@@ -651,18 +672,18 @@ IsBlkInVendorPart:
 	.type	sftl_get_density, %function
 sftl_get_density:
 .LFB224:
-	.loc 3 1214 0
+	.loc 3 1178 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 3 1216 0
-	ldr	r3, .L37
+	.loc 3 1180 0
+	ldr	r3, .L38
 	ldr	r0, [r3]
 	bx	lr
-.L38:
+.L39:
 	.align	2
-.L37:
+.L38:
 	.word	.LANCHOR34
 	.cfi_endproc
 .LFE224:
@@ -685,7 +706,7 @@ FtlBbmMapBadBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL40:
 	.loc 4 10 0
-	ldr	r3, .L40
+	ldr	r3, .L41
 	.loc 4 5 0
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 32
@@ -703,7 +724,7 @@ FtlBbmMapBadBlock:
 .LVL41:
 	mov	r1, r4
 	.loc 4 13 0
-	ldr	r4, .L40+4
+	ldr	r4, .L41+4
 	.loc 4 10 0
 	uxth	r6, r0
 .LVL42:
@@ -727,7 +748,7 @@ FtlBbmMapBadBlock:
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L40+8
+	ldr	r0, .L41+8
 	bl	printf
 .LVL45:
 	.loc 4 17 0
@@ -743,9 +764,9 @@ FtlBbmMapBadBlock:
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
 .LVL46:
-.L41:
+.L42:
 	.align	2
-.L40:
+.L41:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LC0
@@ -768,7 +789,7 @@ FtlBbmIsBadBlock:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL47:
 	.loc 4 30 0
-	ldr	r3, .L43
+	ldr	r3, .L44
 	.loc 4 24 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -795,7 +816,7 @@ FtlBbmIsBadBlock:
 	bl	__aeabi_uidiv
 .LVL51:
 	.loc 4 33 0
-	ldr	r3, .L43+4
+	ldr	r3, .L44+4
 	.loc 4 30 0
 	uxth	r0, r0
 	.loc 4 34 0
@@ -812,9 +833,9 @@ FtlBbmIsBadBlock:
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
 .LVL53:
-.L44:
+.L45:
 	.align	2
-.L43:
+.L44:
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.cfi_endproc
@@ -855,8 +876,8 @@ FtlBbtCalcTotleCnt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL54:
 	.loc 4 160 0
-	ldr	r3, .L53
-	ldr	r2, .L53+4
+	ldr	r3, .L54
+	ldr	r2, .L54+4
 	.loc 4 157 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -873,34 +894,34 @@ FtlBbtCalcTotleCnt:
 	ldrh	r6, [r2]
 	muls	r6, r3, r6
 .LVL55:
-.L47:
+.L48:
 	uxth	r0, r5
 .LVL56:
 	.loc 4 160 0 is_stmt 0 discriminator 1
 	cmp	r0, r6
-	blt	.L49
+	blt	.L50
 	.loc 4 169 0 is_stmt 1
 	mov	r0, r4
 .LVL57:
 	pop	{r4, r5, r6, pc}
 .LVL58:
-.L49:
+.L50:
 	.loc 4 162 0
 	bl	FtlBbmIsBadBlock
 .LVL59:
-	cbz	r0, .L48
+	cbz	r0, .L49
 	.loc 4 164 0
 	adds	r4, r4, #1
 .LVL60:
 	uxth	r4, r4
 .LVL61:
-.L48:
+.L49:
 	adds	r5, r5, #1
 .LVL62:
-	b	.L47
-.L54:
+	b	.L48
+.L55:
 	.align	2
-.L53:
+.L54:
 	.word	.LANCHOR17
 	.word	.LANCHOR10
 	.cfi_endproc
@@ -932,7 +953,7 @@ V2P_block:
 	.loc 2 5 0
 	mov	r5, r1
 	.loc 2 8 0
-	ldr	r3, .L56
+	ldr	r3, .L57
 	.loc 2 5 0
 	mov	r7, r0
 	.loc 2 8 0
@@ -942,7 +963,7 @@ V2P_block:
 .LVL65:
 	bl	__aeabi_uidiv
 .LVL66:
-	ldr	r3, .L56+4
+	ldr	r3, .L57+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
@@ -955,9 +976,9 @@ V2P_block:
 	.loc 2 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L57:
+.L58:
 	.align	2
-.L56:
+.L57:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.cfi_endproc
@@ -979,7 +1000,7 @@ P2V_plane:
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL68:
 	.loc 2 16 0
-	ldr	r3, .L59
+	ldr	r3, .L60
 	.loc 2 13 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -992,7 +1013,7 @@ P2V_plane:
 	.loc 2 16 0
 	ldrh	r5, [r3]
 .LVL69:
-	ldr	r3, .L59+4
+	ldr	r3, .L60+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 .LVL70:
@@ -1005,9 +1026,9 @@ P2V_plane:
 	.loc 2 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L60:
+.L61:
 	.align	2
-.L59:
+.L60:
 	.word	.LANCHOR11
 	.word	.LANCHOR17
 	.cfi_endproc
@@ -1033,12 +1054,12 @@ P2V_block_in_plane:
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
 	.loc 2 24 0
-	ldr	r3, .L62
+	ldr	r3, .L63
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
 .LVL73:
 	.loc 2 25 0
-	ldr	r3, .L62+4
+	ldr	r3, .L63+4
 	.loc 2 24 0
 	uxth	r0, r1
 .LVL74:
@@ -1049,9 +1070,9 @@ P2V_block_in_plane:
 	.loc 2 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
-.L63:
+.L64:
 	.align	2
-.L62:
+.L63:
 	.word	.LANCHOR17
 	.word	.LANCHOR11
 	.cfi_endproc
@@ -1075,7 +1096,7 @@ ftl_cmp_data_ver:
 .LVL76:
 	.loc 2 34 0
 	cmp	r0, r1
-	bls	.L65
+	bls	.L66
 	.loc 2 36 0
 	subs	r0, r0, r1
 .LVL77:
@@ -1085,7 +1106,7 @@ ftl_cmp_data_ver:
 	movls	r0, #1
 	bx	lr
 .LVL78:
-.L65:
+.L66:
 	.loc 2 40 0
 	subs	r0, r1, r0
 .LVL79:
@@ -1115,15 +1136,15 @@ FtlFreeSysBlkQueueEmpty:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 2 89 0
-	ldr	r3, .L68
+	ldr	r3, .L69
 	ldrh	r0, [r3, #6]
 	.loc 2 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L69:
+.L70:
 	.align	2
-.L68:
+.L69:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE241:
@@ -1144,16 +1165,16 @@ FtlFreeSysBlkQueueFull:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 2 94 0
-	ldr	r3, .L71
+	ldr	r3, .L72
 	ldrh	r0, [r3, #6]
 	.loc 2 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L72:
+.L73:
 	.align	2
-.L71:
+.L72:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE242:
@@ -1168,137 +1189,73 @@ FtlFreeSysBlkQueueFull:
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
 .LFB244:
-	.loc 2 116 0
+	.loc 2 118 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL81:
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
 	.loc 2 123 0
-	ldr	r4, .L82
-	.loc 2 125 0
-	ldr	r3, .L82+4
-	.loc 2 124 0
-	ldrh	r7, [r4, #2]
+	ldr	r3, .L83
+	.loc 2 118 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
 	.loc 2 123 0
-	ldrh	r6, [r4, #6]
-	.loc 2 125 0
-	ldr	r5, [r3]
-	ldr	r3, .L82+8
-	add	r8, r4, r7, lsl #1
-	mov	r10, r5
-	ldr	r3, [r3]
-	add	fp, r5, r6, lsl #2
-	add	r8, r8, #6
-.LVL82:
-.L74:
-	.loc 2 123 0 discriminator 1
-	cmp	r10, fp
-	bne	.L75
-	movs	r3, #0
-	.loc 2 128 0
-	add	lr, r6, #-1
+	ldrh	r2, [r3, #6]
+	cbz	r2, .L74
+	.loc 2 119 0
+	ldr	r2, .L83+4
+	movs	r6, #0
+	ldrh	r1, [r3, #2]
+	mov	r5, r6
+	ldrh	r4, [r2, #28]
+	ldrh	r2, [r3, #4]
+	and	r4, r4, #31
 .L76:
+.LVL82:
+	.loc 2 124 0 discriminator 1
+	uxth	r0, r6
+	adds	r6, r6, #1
 .LVL83:
-	.loc 2 128 0 is_stmt 0 discriminator 1
-	cmp	r3, lr
-	blt	.L81
-	.loc 2 144 0 is_stmt 1
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+	cmp	r4, r0
+	bgt	.L77
+	cbz	r5, .L74
+	strh	r1, [r3, #2]	@ movhi
+	strh	r2, [r3, #4]	@ movhi
 .LVL84:
-.L75:
-	.cfi_restore_state
-	.loc 2 124 0 discriminator 3
-	ldrh	r0, [r8, #2]!
-	str	r3, [sp, #4]
-	bl	P2V_block_in_plane
+.L74:
+	pop	{r4, r5, r6, pc}
 .LVL85:
+.L77:
 	.loc 2 125 0 discriminator 3
-	ldr	r3, [sp, #4]
-	ldrh	r2, [r3, r0, lsl #1]
-	str	r2, [r10], #4
-	b	.L74
+	adds	r0, r1, #4
 .LVL86:
-.L81:
-	.loc 2 130 0
-	add	ip, r3, #1
-	mov	r2, r3
-	uxth	ip, ip
+	.loc 2 126 0 discriminator 3
+	adds	r1, r1, #1
+	.loc 2 125 0 discriminator 3
+	ldrh	r5, [r3, r0, lsl #1]
 .LVL87:
-	mov	r8, ip
+	.loc 2 127 0 discriminator 3
+	adds	r0, r2, #4
+	.loc 2 126 0 discriminator 3
+	ubfx	r1, r1, #0, #10
+	.loc 2 127 0 discriminator 3
+	strh	r5, [r3, r0, lsl #1]	@ movhi
 .LVL88:
-.L77:
-	.loc 2 130 0 is_stmt 0 discriminator 1
-	cmp	r8, r6
-	bcc	.L79
-	.loc 2 134 0 is_stmt 1
-	cmp	r3, r2
-	beq	.L80
-	.loc 2 135 0
-	ldr	r0, [r5, r2, lsl #2]
+	movs	r5, #1
 .LVL89:
-	.loc 2 136 0
-	ldr	r1, [r5, r3, lsl #2]
-	str	r1, [r5, r2, lsl #2]
-	.loc 2 139 0
-	add	r2, r2, r7
-.LVL90:
-	.loc 2 137 0
-	str	r0, [r5, r3, lsl #2]
-	.loc 2 140 0
-	add	r3, r3, r7
-.LVL91:
-	.loc 2 139 0
-	adds	r2, r2, #4
-	.loc 2 140 0
-	adds	r3, r3, #4
-	.loc 2 139 0
-	ldrh	r1, [r4, r2, lsl #1]
-.LVL92:
-	.loc 2 140 0
-	ldrh	r0, [r4, r3, lsl #1]
-.LVL93:
-	strh	r0, [r4, r2, lsl #1]	@ movhi
-	.loc 2 141 0
-	strh	r1, [r4, r3, lsl #1]	@ movhi
-.LVL94:
-.L80:
-	mov	r3, ip
+	.loc 2 128 0 discriminator 3
+	add	r2, r2, r5
+	ubfx	r2, r2, #0, #10
 	b	.L76
-.LVL95:
-.L79:
-	.loc 2 131 0
-	ldr	r1, [r5, r8, lsl #2]
-	ldr	r0, [r5, r2, lsl #2]
-	cmp	r0, r1
-	it	hi
-	movhi	r2, r8
-.LVL96:
-	.loc 2 130 0
-	add	r8, r8, #1
-.LVL97:
-	uxth	r8, r8
-.LVL98:
-	b	.L77
-.L83:
+.L84:
 	.align	2
-.L82:
+.L83:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
-	.word	.LANCHOR40
 	.cfi_endproc
 .LFE244:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -1312,130 +1269,72 @@ FtlFreeSysBLkSort:
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
 .LFB245:
-	.loc 2 147 0
+	.loc 2 163 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL99:
-.LBB170:
-.LBB171:
+.LVL90:
+.LBB189:
+.LBB190:
 	.loc 2 94 0
-	ldr	r3, .L90
-.LBE171:
-.LBE170:
-	.loc 2 147 0
+	ldr	r3, .L91
+.LBE190:
+.LBE189:
+	.loc 2 163 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-.LBB173:
-.LBB172:
+.LBB192:
+.LBB191:
 	.loc 2 94 0
 	ldrh	r4, [r3, #6]
-.LBE172:
-.LBE173:
-	.loc 2 152 0
+.LBE191:
+.LBE192:
+	.loc 2 168 0
 	cmp	r4, #1024
-	beq	.L88
-	.loc 2 155 0
+	beq	.L89
+	.loc 2 171 0
 	ldrh	r5, [r3, #2]
 	movs	r1, #0
-.L86:
-.LVL100:
-	.loc 2 154 0 discriminator 1
+.L87:
+.LVL91:
+	.loc 2 170 0 discriminator 1
 	cmp	r1, r4
-	bcc	.L87
-.LVL101:
-.L88:
-	.loc 2 148 0
+	bcc	.L88
+.LVL92:
+.L89:
+	.loc 2 164 0
 	movs	r0, #0
-.LVL102:
+.LVL93:
 	pop	{r4, r5, pc}
-.LVL103:
-.L87:
-	.loc 2 155 0
+.LVL94:
+.L88:
+	.loc 2 171 0
 	adds	r2, r1, r5
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r3, r2, lsl #1]
 	cmp	r2, r0
-	beq	.L89
-	.loc 2 154 0 discriminator 2
+	beq	.L90
+	.loc 2 170 0 discriminator 2
 	adds	r1, r1, #1
-.LVL104:
-	b	.L86
-.L89:
-	.loc 2 156 0
+.LVL95:
+	b	.L87
+.L90:
+	.loc 2 172 0
 	movs	r0, #1
-.LVL105:
-	.loc 2 162 0
+.LVL96:
+	.loc 2 178 0
 	pop	{r4, r5, pc}
-.L91:
+.L92:
 	.align	2
-.L90:
+.L91:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE245:
 	.size	IsInFreeQueue, .-IsInFreeQueue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueOut
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-.LFB246:
-	.loc 2 165 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL106:
-.LBB174:
-.LBB175:
-	.loc 2 89 0
-	ldr	r2, .L95
-	ldrh	r1, [r2, #6]
-.LBE175:
-.LBE174:
-	.loc 2 168 0
-	cbz	r1, .L94
-.LVL107:
-.LBB176:
-	.loc 2 170 0
-	ldrh	r3, [r2, #2]
-	.loc 2 171 0
-	subs	r1, r1, #1
-	strh	r1, [r2, #6]	@ movhi
-	.loc 2 170 0
-	adds	r0, r3, #4
-	.loc 2 172 0
-	adds	r3, r3, #1
-	ubfx	r3, r3, #0, #10
-	.loc 2 170 0
-	ldrh	r0, [r2, r0, lsl #1]
-.LVL108:
-	.loc 2 172 0
-	strh	r3, [r2, #2]	@ movhi
-	bx	lr
-.LVL109:
-.L94:
-.LBE176:
-	.loc 2 166 0
-	movw	r0, #65535
-.LVL110:
-	.loc 2 176 0
-	bx	lr
-.L96:
-	.align	2
-.L95:
-	.word	.LANCHOR38
-	.cfi_endproc
-.LFE246:
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
 	.global	insert_data_list
@@ -1446,16 +1345,13 @@ FtlFreeSysBlkQueueOut:
 	.type	insert_data_list, %function
 insert_data_list:
 .LFB249:
-	.loc 2 217 0
+	.loc 2 249 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL111:
-	.loc 2 225 0
-	movw	r3, #65535
-	.loc 2 217 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 40
+.LVL97:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
 	.cfi_offset 5, -28
 	.cfi_offset 6, -24
@@ -1464,177 +1360,200 @@ insert_data_list:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 225 0
-	cmp	r0, r3
-	beq	.L98
-	.loc 2 230 0
-	ldr	r2, .L111
+	.loc 2 260 0
+	ldr	r3, .L109
+	ldrh	lr, [r3]
+	cmp	lr, r0
+	bls	.L95
+	.loc 2 265 0
+	ldr	r3, .L109+4
 	movs	r5, #6
-	muls	r5, r0, r5
-	ldr	r4, [r2]
-	adds	r1, r4, r5
-.LVL112:
-	.loc 2 231 0
+	ldr	r4, [r3]
+	mul	r3, r5, r0
+	str	r3, [sp, #4]
+	adds	r1, r4, r3
+.LVL98:
+	.loc 2 266 0
+	ldr	r2, [sp, #4]
+	movw	r3, #65535
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [r4, r5]	@ movhi
-	.loc 2 233 0
-	ldr	r3, .L111+4
+	strh	r3, [r4, r2]	@ movhi
+	.loc 2 268 0
+	ldr	r3, .L109+8
 	ldr	ip, [r3]
 	cmp	ip, #0
-	bne	.L99
-.L110:
-	.loc 2 275 0
+	bne	.L96
+.LVL99:
+.L108:
+	.loc 2 317 0
 	str	r1, [r3]
-.LVL113:
-.L98:
-	.loc 2 281 0
+.LVL100:
+.L95:
+	.loc 2 323 0
 	movs	r0, #0
-.LVL114:
-	add	sp, sp, #8
+.LVL101:
+	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL115:
-.L99:
+.LVL102:
+.L96:
 	.cfi_restore_state
-	.loc 2 238 0
-	ldr	r3, .L111+8
-	lsls	r7, r0, #1
-	.loc 2 239 0
-	ldrh	r6, [r1, #4]
-	.loc 2 238 0
-	ldr	lr, [r3]
-	ldrh	r3, [lr, r0, lsl #1]
+	.loc 2 273 0
+	ldr	r3, .L109+12
+	lsls	r2, r0, #1
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldrh	r6, [r3, r0, lsl #1]
+.LVL103:
+	.loc 2 274 0
+	ldrh	r3, [r1, #4]
+.LVL104:
+	.loc 2 275 0
+	cbz	r3, .L106
+	.loc 2 274 0
+	mul	fp, r3, r6
+.L97:
+.LVL105:
+	.loc 2 279 0
+	sub	r3, ip, r4
+	asrs	r6, r3, #1
+.LVL106:
+	ldr	r3, .L109+16
+	muls	r3, r6, r3
+	.loc 2 294 0
+	ldr	r6, .L109+20
+	ldr	r8, [r6]
+	.loc 2 256 0
+	movs	r6, #0
+	.loc 2 279 0
+	uxth	r3, r3
+.LVL107:
+	.loc 2 294 0
+	add	r2, r8, r2
+	str	r2, [sp, #12]
+	mov	r2, ip
+.LVL108:
+.L104:
+	.loc 2 281 0
+	adds	r6, r6, #1
+.LVL109:
+	uxth	r6, r6
+.LVL110:
+	.loc 2 282 0
+	cmp	lr, r6
+	bcc	.L95
+	.loc 2 285 0
+	cmp	r3, r0
+	beq	.L95
+	.loc 2 288 0
+	ldr	r7, [sp, #8]
+	lsl	r10, r3, #1
+	ldrh	r7, [r7, r3, lsl #1]
+	mov	r5, r7
+.LVL111:
+	.loc 2 289 0
+	ldrh	r7, [r2, #4]
+.LVL112:
+	.loc 2 290 0
+	cbz	r7, .L107
+	.loc 2 289 0
+	muls	r7, r5, r7
+.LVL113:
+.L99:
+	.loc 2 293 0
+	cmp	fp, r7
+	bne	.L100
+	.loc 2 294 0
+	ldr	r5, [sp, #12]
+.LVL114:
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r5]
+.LVL115:
+	cmp	r10, r7
+	bcc	.L102
+.L101:
+	.loc 2 312 0
+	ldr	r5, [sp, #4]
+	.loc 2 315 0
+	cmp	r2, ip
+	.loc 2 312 0
+	strh	r3, [r4, r5]	@ movhi
 .LVL116:
-	.loc 2 240 0
-	cbz	r6, .L108
-	.loc 2 239 0
-	muls	r6, r3, r6
+	.loc 2 313 0
+	ldrh	r3, [r2, #2]
 .LVL117:
-.L100:
-	.loc 2 244 0
-	sub	r2, ip, r4
-	asrs	r3, r2, #1
+	strh	r3, [r1, #2]	@ movhi
+	.loc 2 315 0
+	bne	.L105
+	.loc 2 316 0
+	strh	r0, [r2, #2]	@ movhi
+	.loc 2 317 0
+	ldr	r3, .L109+8
+	b	.L108
 .LVL118:
-	ldr	r2, .L111+12
-	muls	r2, r3, r2
-	.loc 2 252 0
-	ldr	r3, .L111+16
-	ldr	r8, [r3]
-	.loc 2 244 0
-	uxth	r2, r2
+.L106:
+	.loc 2 276 0
+	mov	fp, #-1
+	b	.L97
 .LVL119:
-	.loc 2 252 0
-	add	r3, r8, r7
-	str	r3, [sp, #4]
-	mov	r3, ip
+.L107:
+	.loc 2 291 0
+	mov	r7, #-1
 .LVL120:
-.L106:
-	.loc 2 247 0
-	ldrh	r7, [r3, #4]
-	.loc 2 246 0
-	lsl	r10, r2, #1
-	ldrh	fp, [lr, r2, lsl #1]
+	b	.L99
 .LVL121:
-	.loc 2 248 0
-	cbz	r7, .L109
-	.loc 2 247 0
-	mul	r7, r7, fp
+.L100:
+	.loc 2 298 0
+	bcc	.L101
 .LVL122:
-.L101:
-	.loc 2 251 0
-	cmp	r6, r7
-	bne	.L102
-	.loc 2 252 0
-	ldr	r7, [sp, #4]
+.L102:
+	.loc 2 301 0
+	ldrh	r7, [r2]
+	movw	r5, #65535
+	cmp	r7, r5
+	bne	.L103
+	.loc 2 302 0
+	strh	r3, [r1, #2]	@ movhi
 .LVL123:
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r7]
-	cmp	r10, r7
-	bcc	.L104
-.L103:
-	.loc 2 270 0
-	strh	r2, [r4, r5]	@ movhi
+	.loc 2 303 0
+	strh	r0, [r2]	@ movhi
+	.loc 2 304 0
+	ldr	r3, .L109+24
 .LVL124:
-	.loc 2 273 0
-	cmp	r3, ip
-	.loc 2 271 0
-	ldrh	r2, [r3, #2]
+	b	.L108
 .LVL125:
-	strh	r2, [r1, #2]	@ movhi
-	.loc 2 273 0
-	bne	.L107
-	.loc 2 274 0
-	strh	r0, [r3, #2]	@ movhi
-	.loc 2 275 0
-	ldr	r3, .L111+4
+.L103:
+	.loc 2 309 0
+	movs	r3, #6
 .LVL126:
-	b	.L110
+	mla	r2, r3, r7, r4
 .LVL127:
-.L108:
-	.loc 2 241 0
-	mov	r6, #-1
+	.loc 2 281 0
+	mov	r3, r7
+	b	.L104
 .LVL128:
-	b	.L100
-.LVL129:
-.L109:
-	.loc 2 249 0
-	mov	r7, #-1
-.LVL130:
-	b	.L101
-.LVL131:
-.L102:
-	.loc 2 256 0
-	bcc	.L103
-.LVL132:
-.L104:
-	.loc 2 259 0
-	ldrh	r7, [r3]
-	movw	r10, #65535
-	cmp	r7, r10
-	bne	.L105
-	.loc 2 260 0
-	strh	r2, [r1, #2]	@ movhi
-.LVL133:
-	.loc 2 261 0
-	strh	r0, [r3]	@ movhi
-	.loc 2 262 0
-	ldr	r3, .L111+20
-.LVL134:
-	b	.L110
-.LVL135:
 .L105:
-	.loc 2 267 0
+	.loc 2 319 0
+	ldrh	r1, [r2, #2]
+.LVL129:
 	movs	r3, #6
-.LVL136:
-	.loc 2 246 0
-	mov	r2, r7
-	.loc 2 267 0
-	mla	r3, r3, r7, r4
-.LVL137:
-	.loc 2 246 0
-	b	.L106
-.LVL138:
-.L107:
-	.loc 2 277 0
-	ldrh	r1, [r3, #2]
-.LVL139:
-	movs	r2, #6
-	muls	r2, r1, r2
-	strh	r0, [r4, r2]	@ movhi
-.LVL140:
-	.loc 2 278 0
-	strh	r0, [r3, #2]	@ movhi
-	b	.L98
-.L112:
+	muls	r3, r1, r3
+	strh	r0, [r4, r3]	@ movhi
+.LVL130:
+	.loc 2 320 0
+	strh	r0, [r2, #2]	@ movhi
+	b	.L95
+.L110:
 	.align	2
-.L111:
+.L109:
+	.word	.LANCHOR5
+	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR42
-	.word	.LANCHOR43
 	.word	-1431655765
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LANCHOR44
 	.cfi_endproc
 .LFE249:
@@ -1649,60 +1568,60 @@ insert_data_list:
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 .LFB248:
-	.loc 2 186 0
+	.loc 2 218 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL141:
+.LVL131:
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 187 0
+	.loc 2 219 0
 	bl	insert_data_list
-.LVL142:
-	.loc 2 188 0
-	ldr	r2, .L115
+.LVL132:
+	.loc 2 220 0
+	ldr	r2, .L113
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 189 0
-	ldr	r2, .L115+4
+	.loc 2 221 0
+	ldr	r2, .L113+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L113
-.LVL143:
-.LBB179:
-.LBB180:
-	movs	r2, #189
-	ldr	r1, .L115+8
-	ldr	r0, .L115+12
-.LBE180:
-.LBE179:
-	.loc 2 190 0
+	bcs	.L111
+.LVL133:
+.LBB195:
+.LBB196:
+	movs	r2, #221
+	ldr	r1, .L113+8
+	ldr	r0, .L113+12
+.LBE196:
+.LBE195:
+	.loc 2 222 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB182:
-.LBB181:
-	.loc 2 189 0
+.LBB198:
+.LBB197:
+	.loc 2 221 0
 	b	printf
-.LVL144:
-.L113:
+.LVL134:
+.L111:
 	.cfi_restore_state
 	pop	{r3, pc}
-.L116:
+.L114:
 	.align	2
-.L115:
+.L113:
 	.word	.LANCHOR45
 	.word	.LANCHOR5
 	.word	.LANCHOR46
 	.word	.LC1
-.LBE181:
-.LBE182:
+.LBE197:
+.LBE198:
 	.cfi_endproc
 .LFE248:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -1716,14 +1635,14 @@ INSERT_DATA_LIST:
 	.type	insert_free_list, %function
 insert_free_list:
 .LFB250:
-	.loc 2 284 0
+	.loc 2 326 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL145:
-	.loc 2 290 0
+.LVL135:
+	.loc 2 332 0
 	movw	r1, #65535
-	.loc 2 284 0
+	.loc 2 326 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -1734,117 +1653,117 @@ insert_free_list:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 290 0
+	.loc 2 332 0
 	cmp	r0, r1
-	beq	.L118
-	.loc 2 293 0
-	ldr	r3, .L124
+	beq	.L116
+	.loc 2 335 0
+	ldr	r3, .L122
 	mov	r10, #6
 	mul	r7, r10, r0
 	ldr	r4, [r3]
-	.loc 2 296 0
-	ldr	r3, .L124+4
-	.loc 2 293 0
+	.loc 2 338 0
+	ldr	r3, .L122+4
+	.loc 2 335 0
 	adds	r5, r4, r7
-.LVL146:
-	.loc 2 296 0
+.LVL136:
+	.loc 2 338 0
 	ldr	r6, [r3]
 	mov	lr, r3
-	.loc 2 294 0
+	.loc 2 336 0
 	strh	r1, [r5, #2]	@ movhi
 	strh	r1, [r4, r7]	@ movhi
-	.loc 2 296 0
-	cbnz	r6, .L119
-	.loc 2 297 0
+	.loc 2 338 0
+	cbnz	r6, .L117
+	.loc 2 339 0
 	str	r5, [r3]
-.LVL147:
-.L118:
-	.loc 2 330 0
+.LVL137:
+.L116:
+	.loc 2 372 0
 	movs	r0, #0
-.LVL148:
+.LVL138:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL149:
-.L119:
-	.loc 2 301 0
-	ldr	r3, .L124+8
-	.loc 2 303 0
+.LVL139:
+.L117:
+	.loc 2 343 0
+	ldr	r3, .L122+8
+	.loc 2 345 0
 	subs	r2, r6, r4
-	.loc 2 310 0
+	.loc 2 352 0
 	mov	fp, r1
-	.loc 2 301 0
+	.loc 2 343 0
 	ldr	ip, [r3]
-	.loc 2 303 0
+	.loc 2 345 0
 	asrs	r3, r2, #1
-	ldr	r2, .L124+12
-	.loc 2 301 0
+	ldr	r2, .L122+12
+	.loc 2 343 0
 	ldrh	r8, [ip, r0, lsl #1]
-.LVL150:
-	.loc 2 303 0
+.LVL140:
+	.loc 2 345 0
 	muls	r2, r3, r2
 	mov	r3, r6
 	uxth	r2, r2
-.LVL151:
-.L122:
-	.loc 2 307 0
+.LVL141:
+.L120:
+	.loc 2 349 0
 	ldrh	r1, [ip, r2, lsl #1]
 	cmp	r1, r8
-	bcs	.L120
-	.loc 2 310 0
+	bcs	.L118
+	.loc 2 352 0
 	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L121
-	.loc 2 311 0
+	bne	.L119
+	.loc 2 353 0
 	strh	r2, [r5, #2]	@ movhi
-.LVL152:
-	.loc 2 312 0
+.LVL142:
+	.loc 2 354 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 313 0
-	b	.L118
-.LVL153:
-.L121:
-	.loc 2 316 0
+	.loc 2 355 0
+	b	.L116
+.LVL143:
+.L119:
+	.loc 2 358 0
 	mla	r3, r10, r1, r4
-.LVL154:
-	.loc 2 306 0
+.LVL144:
+	.loc 2 348 0
 	mov	r2, r1
-.LVL155:
-	b	.L122
-.LVL156:
-.L120:
-	.loc 2 319 0
+.LVL145:
+	b	.L120
+.LVL146:
+.L118:
+	.loc 2 361 0
 	ldrh	r1, [r3, #2]
-	.loc 2 322 0
+	.loc 2 364 0
 	cmp	r3, r6
-	.loc 2 319 0
+	.loc 2 361 0
 	strh	r1, [r5, #2]	@ movhi
-.LVL157:
-	.loc 2 326 0
+.LVL147:
+	.loc 2 368 0
 	it	ne
 	ldrhne	r1, [r3, #2]
-	.loc 2 320 0
+	.loc 2 362 0
 	strh	r2, [r4, r7]	@ movhi
-	.loc 2 326 0
+	.loc 2 368 0
 	iteet	ne
 	movne	r2, #6
-.LVL158:
-	.loc 2 323 0
+.LVL148:
+	.loc 2 365 0
 	strheq	r0, [r3, #2]	@ movhi
-	.loc 2 324 0
+	.loc 2 366 0
 	streq	r5, [lr]
-	.loc 2 326 0
+	.loc 2 368 0
 	mulne	r2, r2, r1
 	itt	ne
 	strhne	r0, [r4, r2]	@ movhi
-.LVL159:
-	.loc 2 327 0
+.LVL149:
+	.loc 2 369 0
 	strhne	r0, [r3, #2]	@ movhi
-	b	.L118
-.L125:
+	b	.L116
+.L123:
 	.align	2
-.L124:
-	.word	.LANCHOR41
-	.word	.LANCHOR47
+.L122:
 	.word	.LANCHOR40
+	.word	.LANCHOR47
+	.word	.LANCHOR43
 	.word	-1431655765
 	.cfi_endproc
 .LFE250:
@@ -1859,60 +1778,60 @@ insert_free_list:
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 .LFB247:
-	.loc 2 179 0
+	.loc 2 211 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL160:
+.LVL150:
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 180 0
+	.loc 2 212 0
 	bl	insert_free_list
-.LVL161:
-	.loc 2 181 0
-	ldr	r2, .L128
+.LVL151:
+	.loc 2 213 0
+	ldr	r2, .L126
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	.loc 2 182 0
-	ldr	r2, .L128+4
+	.loc 2 214 0
+	ldr	r2, .L126+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L126
-.LVL162:
-.LBB185:
-.LBB186:
-	movs	r2, #182
-	ldr	r1, .L128+8
-	ldr	r0, .L128+12
-.LBE186:
-.LBE185:
-	.loc 2 183 0
+	bcs	.L124
+.LVL152:
+.LBB201:
+.LBB202:
+	movs	r2, #214
+	ldr	r1, .L126+8
+	ldr	r0, .L126+12
+.LBE202:
+.LBE201:
+	.loc 2 215 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB188:
-.LBB187:
-	.loc 2 182 0
+.LBB204:
+.LBB203:
+	.loc 2 214 0
 	b	printf
-.LVL163:
-.L126:
+.LVL153:
+.L124:
 	.cfi_restore_state
 	pop	{r3, pc}
-.L129:
+.L127:
 	.align	2
-.L128:
+.L126:
 	.word	.LANCHOR48
 	.word	.LANCHOR5
 	.word	.LANCHOR49
 	.word	.LC1
-.LBE187:
-.LBE188:
+.LBE203:
+.LBE204:
 	.cfi_endproc
 .LFE247:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -1926,11 +1845,11 @@ INSERT_FREE_LIST:
 	.type	List_remove_node, %function
 List_remove_node:
 .LFB251:
-	.loc 2 333 0
+	.loc 2 375 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL164:
+.LVL154:
 	push	{r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 4, -24
@@ -1939,91 +1858,103 @@ List_remove_node:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 336 0
+	.loc 2 378 0
 	movs	r6, #6
-	ldr	r5, .L137
+	ldr	r5, .L134
 	muls	r6, r1, r6
-	.loc 2 337 0
+	.loc 2 379 0
 	movw	r3, #65535
-	.loc 2 333 0
+	.loc 2 375 0
 	mov	r8, r0
-	.loc 2 336 0
+	.loc 2 378 0
 	ldr	r7, [r5]
 	adds	r4, r7, r6
-.LVL165:
-	.loc 2 337 0
+.LVL155:
+	.loc 2 379 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L131
-	.loc 2 337 0 is_stmt 0 discriminator 1
+	bne	.L129
+	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L131
-	.loc 2 337 0 discriminator 2
-	movw	r2, #337
-	ldr	r1, .L137+4
-.LVL166:
-	ldr	r0, .L137+8
-.LVL167:
+	beq	.L129
+	.loc 2 379 0 discriminator 2
+	movw	r2, #379
+	ldr	r1, .L134+4
+.LVL156:
+	ldr	r0, .L134+8
+.LVL157:
 	bl	printf
-.LVL168:
-.L131:
-	.loc 2 339 0 is_stmt 1
+.LVL158:
+.L129:
+	.loc 2 381 0 is_stmt 1
 	ldr	r3, [r8]
 	movw	r1, #65535
-	ldrh	r2, [r7, r6]
 	cmp	r4, r3
-	bne	.L132
-	.loc 2 340 0
-	cmp	r2, r1
-	.loc 2 343 0
+	ldrh	r3, [r7, r6]
+	bne	.L130
+	.loc 2 382 0
+	cmp	r3, r1
+	.loc 2 385 0
 	ittee	ne
 	ldrne	r0, [r5]
-	movne	r3, #6
-	.loc 2 341 0
+	movne	r2, #6
+	.loc 2 383 0
 	moveq	r3, #0
 	streq	r3, [r8]
-	.loc 2 343 0
+	.loc 2 385 0
 	ittt	ne
-	mlane	r2, r3, r2, r0
-	strne	r2, [r8]
-	.loc 2 344 0
-	strhne	r1, [r2, #2]	@ movhi
-.L134:
-	.loc 2 355 0
+	mlane	r3, r2, r3, r0
+	strne	r3, [r8]
+	.loc 2 386 0
+	strhne	r1, [r3, #2]	@ movhi
+.L132:
+	.loc 2 399 0
 	movw	r3, #65535
-	.loc 2 357 0
+	.loc 2 401 0
 	movs	r0, #0
-	.loc 2 355 0
+	.loc 2 399 0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 357 0
+	.loc 2 401 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL169:
-.L132:
-	.loc 2 346 0
-	cmp	r2, r1
-	.loc 2 348 0
-	ldr	r1, [r5]
-.LVL170:
-	mov	r3, #6
-	ldrh	r0, [r4, #2]
-	.loc 2 351 0
-	ittt	ne
-	mlane	r5, r3, r2, r1
-	strhne	r0, [r5, #2]	@ movhi
-.LVL171:
-	.loc 2 352 0
-	ldrhne	r0, [r4, #2]
-	.loc 2 353 0
-	muls	r3, r0, r3
-	strh	r2, [r1, r3]	@ movhi
-.LVL172:
-	b	.L134
-.L138:
+.LVL159:
+.L130:
+	.loc 2 388 0
+	cmp	r3, r1
+	ldrh	r1, [r4, #2]
+	bne	.L133
+	.loc 2 389 0
+	cmp	r1, r3
+	beq	.L132
+.LVL160:
+	.loc 2 391 0
+	movs	r2, #6
+	ldr	r0, [r5]
+	muls	r1, r2, r1
+.LVL161:
+	strh	r3, [r0, r1]	@ movhi
+	b	.L132
+.LVL162:
+.L133:
+	.loc 2 394 0
+	ldr	r0, [r5]
+.LVL163:
+	.loc 2 395 0
+	movs	r2, #6
+	mla	r5, r2, r3, r0
+	strh	r1, [r5, #2]	@ movhi
+.LVL164:
+	.loc 2 396 0
+	ldrh	r1, [r4, #2]
+	.loc 2 397 0
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L132
+.L135:
 	.align	2
-.L137:
-	.word	.LANCHOR41
+.L134:
+	.word	.LANCHOR40
 	.word	.LANCHOR50
 	.word	.LC1
 	.cfi_endproc
@@ -2039,76 +1970,76 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 .LFB252:
-	.loc 2 360 0
+	.loc 2 404 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL173:
-	.loc 2 364 0
+.LVL165:
+	.loc 2 408 0
 	ldr	r3, [r0]
-	.loc 2 360 0
+	.loc 2 404 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 364 0
-	cbz	r3, .L145
-	.loc 2 369 0
-	ldr	r2, .L146
-	.loc 2 368 0
+	.loc 2 408 0
+	cbz	r3, .L142
+	.loc 2 413 0
+	ldr	r2, .L143
+	.loc 2 412 0
 	movw	r5, #65535
-	.loc 2 369 0
+	.loc 2 413 0
 	movs	r6, #6
 	ldr	r2, [r2]
+.L138:
+.LVL166:
+	.loc 2 412 0
+	cbnz	r1, .L139
 .L141:
-.LVL174:
-	.loc 2 368 0
-	cbnz	r1, .L142
-.L144:
-	.loc 2 372 0
-	ldr	r4, .L146+4
+	.loc 2 416 0
+	ldr	r4, .L143+4
 	subs	r3, r3, r2
-.LVL175:
+.LVL167:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
-.LVL176:
-	.loc 2 373 0
+.LVL168:
+	.loc 2 417 0
 	uxth	r1, r4
-.LVL177:
+.LVL169:
 	bl	List_remove_node
-.LVL178:
+.LVL170:
 	uxth	r0, r4
-	.loc 2 375 0
+	.loc 2 419 0
 	pop	{r4, r5, r6, pc}
-.LVL179:
-.L142:
-	.loc 2 368 0 discriminator 1
+.LVL171:
+.L139:
+	.loc 2 412 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L144
-	.loc 2 370 0
+	beq	.L141
+	.loc 2 414 0
 	subs	r1, r1, #1
-.LVL180:
-	.loc 2 369 0
+.LVL172:
+	.loc 2 413 0
 	mla	r3, r6, r4, r2
-.LVL181:
-	.loc 2 370 0
+.LVL173:
+	.loc 2 414 0
 	uxth	r1, r1
-.LVL182:
-	b	.L141
-.LVL183:
-.L145:
-	.loc 2 365 0
+.LVL174:
+	b	.L138
+.LVL175:
+.L142:
+	.loc 2 409 0
 	movw	r0, #65535
-.LVL184:
-	.loc 2 376 0
+.LVL176:
+	.loc 2 420 0
 	pop	{r4, r5, r6, pc}
-.L147:
+.L144:
 	.align	2
-.L146:
-	.word	.LANCHOR41
+.L143:
+	.word	.LANCHOR40
 	.word	-1431655765
 	.cfi_endproc
 .LFE252:
@@ -2123,16 +2054,16 @@ List_pop_index_node:
 	.type	List_pop_head_node, %function
 List_pop_head_node:
 .LFB253:
-	.loc 2 379 0
+	.loc 2 423 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL185:
-	.loc 2 380 0
+.LVL177:
+	.loc 2 424 0
 	movs	r1, #0
 	b	List_pop_index_node
-.LVL186:
+.LVL178:
 	.cfi_endproc
 .LFE253:
 	.size	List_pop_head_node, .-List_pop_head_node
@@ -2146,69 +2077,69 @@ List_pop_head_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 .LFB254:
-	.loc 2 384 0
+	.loc 2 428 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL187:
-	.loc 2 388 0
-	ldr	r3, .L155
-	.loc 2 384 0
+.LVL179:
+	.loc 2 432 0
+	ldr	r3, .L152
+	.loc 2 428 0
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
-	.loc 2 388 0
+	.loc 2 432 0
 	ldr	r3, [r3]
-	cbz	r3, .L154
-	.loc 2 393 0
-	ldr	r2, .L155+4
+	cbz	r3, .L151
+	.loc 2 437 0
+	ldr	r2, .L152+4
 	movs	r4, #6
 	ldr	r1, [r2]
-	.loc 2 392 0
+	.loc 2 436 0
 	movw	r2, #65535
-.L151:
-.LVL188:
-	cbz	r0, .L152
-	.loc 2 392 0 is_stmt 0 discriminator 1
+.L148:
+.LVL180:
+	cbz	r0, .L149
+	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
-.LVL189:
+.LVL181:
 	cmp	r3, r2
-	bne	.L153
-.L154:
-	.loc 2 389 0 is_stmt 1
+	bne	.L150
+.L151:
+	.loc 2 433 0 is_stmt 1
 	movw	r0, #65535
-.LVL190:
+.LVL182:
 	pop	{r4, pc}
-.LVL191:
-.L153:
-	.loc 2 394 0
+.LVL183:
+.L150:
+	.loc 2 438 0
 	subs	r0, r0, #1
-.LVL192:
-	.loc 2 393 0
+.LVL184:
+	.loc 2 437 0
 	mla	r3, r4, r3, r1
-.LVL193:
-	.loc 2 394 0
+.LVL185:
+	.loc 2 438 0
 	uxth	r0, r0
-.LVL194:
-	b	.L151
-.L152:
-.LVL195:
-	.loc 2 398 0
-	ldr	r0, .L155+8
-.LVL196:
+.LVL186:
+	b	.L148
+.L149:
+.LVL187:
+	.loc 2 442 0
+	ldr	r0, .L152+8
+.LVL188:
 	subs	r3, r3, r1
-.LVL197:
+.LVL189:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
-	.loc 2 401 0
+	.loc 2 445 0
 	pop	{r4, pc}
-.L156:
+.L153:
 	.align	2
-.L155:
-	.word	.LANCHOR42
+.L152:
 	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	-1431655765
 	.cfi_endproc
 .LFE254:
@@ -2223,260 +2154,190 @@ List_get_gc_head_node:
 	.type	List_update_data_list, %function
 List_update_data_list:
 .LFB255:
-	.loc 2 404 0
+	.loc 2 448 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL198:
-	.loc 2 413 0
+.LVL190:
+	.loc 2 457 0
 	ldr	r3, .L165
-	.loc 2 404 0
-	push	{r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
+	.loc 2 448 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 404 0
+	.loc 2 448 0
 	mov	r4, r0
-	.loc 2 413 0
+	.loc 2 457 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L159
-	.loc 2 413 0 is_stmt 0 discriminator 1
+	beq	.L156
+	.loc 2 457 0 is_stmt 0 discriminator 1
 	ldr	r3, .L165+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L159
-	.loc 2 413 0 discriminator 2
+	beq	.L156
+	.loc 2 457 0 discriminator 2
 	ldr	r3, .L165+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L159
-.LVL199:
-.LBB191:
-.LBB192:
-	.loc 2 416 0 is_stmt 1
-	ldr	r6, .L165+12
-	movs	r3, #6
-	.loc 2 418 0
-	ldr	r2, .L165+16
-	.loc 2 416 0
-	muls	r3, r0, r3
-	ldr	r1, [r6]
-	.loc 2 418 0
-	ldr	r2, [r2]
-	.loc 2 416 0
-	add	r8, r1, r3
-.LVL200:
-	.loc 2 418 0
-	cmp	r8, r2
-	beq	.L159
-.LVL201:
-	.loc 2 421 0
-	ldr	r7, .L165+20
-	.loc 2 422 0
-	ldrh	r5, [r8, #4]
-	.loc 2 421 0
-	ldr	r2, [r7]
-	.loc 2 422 0
+	beq	.L156
+.LVL191:
+.LBB207:
+.LBB208:
+	.loc 2 460 0 is_stmt 1
+	ldr	r7, .L165+12
+	movs	r6, #6
+	.loc 2 462 0
+	ldr	r3, .L165+16
+	.loc 2 460 0
+	muls	r6, r0, r6
+	ldr	fp, [r7]
+	.loc 2 462 0
+	ldr	r3, [r3]
+	.loc 2 460 0
+	add	r10, fp, r6
+.LVL192:
+	.loc 2 462 0
+	cmp	r10, r3
+	beq	.L156
+	.loc 2 465 0
+	ldr	r3, .L165+20
+	.loc 2 466 0
+	ldrh	r5, [r10, #4]
+	.loc 2 465 0
+	ldr	r2, [r3]
+	mov	r8, r3
 	ldrh	r2, [r2, r0, lsl #1]
-.LVL202:
-	.loc 2 424 0
+.LVL193:
+	.loc 2 467 0
+	cmp	r5, #0
+	beq	.L163
+	.loc 2 466 0
 	muls	r5, r2, r5
-.LVL203:
-	.loc 2 426 0
-	ldrh	r2, [r8, #2]
-	movw	r0, #65535
-.LVL204:
-	.loc 2 424 0
-	it	eq
-	moveq	r5, #-1
-.LVL205:
-	.loc 2 426 0
-	cmp	r2, r0
-	bne	.L162
-	ldrh	r3, [r1, r3]
+.LVL194:
+.L158:
+	.loc 2 470 0
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+.LVL195:
 	cmp	r3, r2
-	bne	.L162
-	mov	r2, #426
+	bne	.L159
+	ldrh	r2, [fp, r6]
+	cmp	r2, r3
+	bne	.L159
+	mov	r2, #470
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
+.LVL196:
 	bl	printf
-.LVL206:
-.L162:
-	.loc 2 427 0
-	ldrh	r3, [r8, #2]
+.LVL197:
+.L159:
+	.loc 2 471 0
+	ldrh	r3, [r10, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L160
+	ldrh	r2, [fp, r6]
+	cmp	r2, r3
+	beq	.L156
+.L160:
+	.loc 2 473 0
 	movs	r2, #6
 	muls	r2, r3, r2
-.LVL207:
-	.loc 2 428 0
+.LVL198:
+	.loc 2 474 0
 	ldr	r3, .L165+32
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
-	.loc 2 429 0
-	ldr	r1, [r7]
-	.loc 2 430 0
+	.loc 2 475 0
+	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
-	ldr	r1, [r6]
+.LVL199:
+	.loc 2 476 0
+	ldr	r1, [r7]
 	add	r2, r2, r1
-.LVL208:
+.LVL200:
 	ldrh	r3, [r2, #4]
-.LVL209:
-	.loc 2 432 0
+.LVL201:
+	.loc 2 477 0
+	cbz	r3, .L164
+	.loc 2 476 0
 	muls	r3, r0, r3
-.LVL210:
-	it	eq
-	moveq	r3, #-1
-.LVL211:
-	.loc 2 434 0
+.LVL202:
+.L161:
+	.loc 2 480 0
 	cmp	r5, r3
-	bcs	.L159
-	.loc 2 435 0
+	bcs	.L156
+	.loc 2 481 0
 	ldr	r5, .L165+36
-.LVL212:
+.LVL203:
 	mov	r1, r4
 	ldr	r0, .L165+16
+.LVL204:
 	bl	List_remove_node
-.LVL213:
+.LVL205:
 	ldrh	r3, [r5]
-	cbnz	r3, .L164
-	movw	r2, #435
+	cbnz	r3, .L162
+	movw	r2, #481
 	ldr	r1, .L165+24
 	ldr	r0, .L165+28
 	bl	printf
-.LVL214:
-.L164:
+.LVL206:
+.L162:
 	ldrh	r3, [r5]
-	.loc 2 436 0
+	.loc 2 482 0
 	mov	r0, r4
-	.loc 2 435 0
+	.loc 2 481 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 436 0
+	.loc 2 482 0
 	bl	INSERT_DATA_LIST
-.LVL215:
-.L159:
-.LBE192:
-.LBE191:
-	.loc 2 439 0
+.LVL207:
+.L156:
+.LBE208:
+.LBE207:
+	.loc 2 485 0
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL208:
+.L163:
+.LBB210:
+.LBB209:
+	.loc 2 468 0
+	mov	r5, #-1
+.LVL209:
+	b	.L158
+.LVL210:
+.L164:
+	.loc 2 478 0
+	mov	r3, #-1
+.LVL211:
+	b	.L161
 .L166:
 	.align	2
 .L165:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
+	.word	.LANCHOR40
 	.word	.LANCHOR41
 	.word	.LANCHOR42
-	.word	.LANCHOR43
 	.word	.LANCHOR54
 	.word	.LC1
 	.word	-1431655765
 	.word	.LANCHOR45
+.LBE209:
+.LBE210:
 	.cfi_endproc
 .LFE255:
 	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_alloc_new_blk
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-.LFB258:
-	.loc 2 516 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL216:
-	.loc 2 520 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
-	.loc 2 516 0
-	push	{r3, r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 24
-	.cfi_offset 3, -24
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
-	.cfi_offset 14, -4
-	.loc 2 516 0
-	mov	r4, r0
-	.loc 2 520 0
-	movs	r3, #0
-.LVL217:
-.L168:
-	uxth	r5, r3
-.LVL218:
-	.loc 2 520 0 is_stmt 0 discriminator 1
-	cmp	r5, r1
-	bcc	.L170
-.LVL219:
-.L171:
-.LBB195:
-.LBB196:
-	.loc 2 532 0 is_stmt 1
-	mov	r2, #532
-	ldr	r1, .L177
-	ldr	r0, .L177+4
-	bl	printf
-.LVL220:
-	b	.L172
-.LVL221:
-.L170:
-.LBE196:
-.LBE195:
-	.loc 2 521 0
-	mov	r7, r2
-	adds	r3, r3, #1
-	ldrh	r6, [r7]
-	adds	r2, r2, #2
-	cmp	r6, #0
-	bne	.L168
-	.loc 2 522 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL222:
-	strh	r0, [r7]	@ movhi
-	.loc 2 523 0
-	cbz	r0, .L169
-	.loc 2 526 0
-	ldr	r3, [r4, #28]
-	.loc 2 524 0
-	strh	r6, [r4, #2]	@ movhi
-	.loc 2 525 0
-	strh	r5, [r4]	@ movhi
-	.loc 2 526 0
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	.loc 2 527 0
-	ldrh	r3, [r4, #8]
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-.L169:
-	.loc 2 532 0
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bls	.L171
-.L172:
-	.loc 2 534 0
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.LVL223:
-.L178:
-	.align	2
-.L177:
-	.word	.LANCHOR55
-	.word	.LC1
-	.cfi_endproc
-.LFE258:
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
 	.global	select_l2p_ram_region
@@ -2487,11 +2348,11 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 .LFB263:
-	.loc 2 700 0
+	.loc 2 749 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL224:
+.LVL212:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -2500,121 +2361,121 @@ select_l2p_ram_region:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 705 0
+	.loc 2 754 0
 	movs	r1, #0
-	ldr	r3, .L189
-	.loc 2 706 0
+	ldr	r3, .L177
+	.loc 2 755 0
 	movs	r0, #12
 	movw	r5, #65535
-	.loc 2 705 0
+	.loc 2 754 0
 	ldrh	r2, [r3]
-	.loc 2 706 0
-	ldr	r3, .L189+4
+	.loc 2 755 0
+	ldr	r3, .L177+4
 	ldr	r3, [r3]
-.LVL225:
-.L180:
+.LVL213:
+.L168:
 	uxth	r4, r1
-.LVL226:
-	.loc 2 705 0 discriminator 1
+.LVL214:
+	.loc 2 754 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L182
+	bcc	.L170
 	mov	r4, r2
-.LVL227:
+.LVL215:
 	movs	r1, #0
-.LVL228:
+.LVL216:
 	mov	r6, #-2147483648
-	.loc 2 716 0
+	.loc 2 765 0
 	movs	r7, #12
-.L183:
+.L171:
 	uxth	r5, r1
-.LVL229:
-	.loc 2 715 0 discriminator 1
+.LVL217:
+	.loc 2 764 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L185
-	.loc 2 724 0
+	bcc	.L173
+	.loc 2 773 0
 	cmp	r4, r2
-	bcc	.L181
-	.loc 2 730 0
-	ldr	r1, .L189+8
+	bcc	.L169
+	.loc 2 779 0
+	ldr	r1, .L177+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.LVL230:
-.L186:
+.LVL218:
+.L174:
 	uxth	r5, r1
-.LVL231:
-	.loc 2 729 0 discriminator 1
+.LVL219:
+	.loc 2 778 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L188
-	.loc 2 735 0
+	bcc	.L176
+	.loc 2 784 0
 	cmp	r4, r2
-	bcc	.L181
-	.loc 2 735 0 is_stmt 0 discriminator 1
-	movw	r2, #735
-	ldr	r1, .L189+12
-	ldr	r0, .L189+16
-.LVL232:
+	bcc	.L169
+	.loc 2 784 0 is_stmt 0 discriminator 1
+	mov	r2, #784
+	ldr	r1, .L177+12
+	ldr	r0, .L177+16
+.LVL220:
 	bl	printf
-.LVL233:
-	b	.L181
-.LVL234:
-.L182:
-	adds	r1, r1, #1
-	.loc 2 706 0 is_stmt 1
+.LVL221:
+	b	.L169
+.LVL222:
+.L170:
+	adds	r1, r1, #1
+	.loc 2 755 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L180
-.LVL235:
-.L181:
-	.loc 2 737 0
+	bne	.L168
+.LVL223:
+.L169:
+	.loc 2 786 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL236:
-.L185:
-	.loc 2 716 0
+.LVL224:
+.L173:
+	.loc 2 765 0
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L184
-	.loc 2 717 0
+	blt	.L172
+	.loc 2 766 0
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
-.LVL237:
+.LVL225:
 	movhi	r4, r5
-.L184:
-.LVL238:
+.L172:
+.LVL226:
 	adds	r1, r1, #1
-.LVL239:
-	b	.L183
-.LVL240:
-.L188:
-	.loc 2 730 0
+.LVL227:
+	b	.L171
+.LVL228:
+.L176:
+	.loc 2 779 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L187
-	.loc 2 730 0 is_stmt 0 discriminator 1
+	bls	.L175
+	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
-.LVL241:
+.LVL229:
 	movne	r4, r5
-.LVL242:
-.L187:
+.LVL230:
+.L175:
 	adds	r1, r1, #1
-.LVL243:
+.LVL231:
 	adds	r3, r3, #12
-	b	.L186
-.L190:
+	b	.L174
+.L178:
 	.align	2
-.L189:
+.L177:
 	.word	.LANCHOR33
+	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
-	.word	.LANCHOR58
 	.word	.LC1
 	.cfi_endproc
 .LFE263:
@@ -2629,14 +2490,14 @@ select_l2p_ram_region:
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 .LFB269:
-	.loc 2 882 0 is_stmt 1
+	.loc 2 931 0 is_stmt 1
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL244:
-	.loc 2 885 0
-	ldr	r2, .L201
-	.loc 2 882 0
+.LVL232:
+	.loc 2 934 0
+	ldr	r2, .L189
+	.loc 2 931 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -2644,78 +2505,78 @@ FtlUpdateVaildLpn:
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
 	mov	r1, r2
-	.loc 2 885 0
+	.loc 2 934 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L192
-	.loc 2 885 0 is_stmt 0 discriminator 1
-	cbnz	r0, .L192
-	.loc 2 885 0
+	bhi	.L180
+	.loc 2 934 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L180
+	.loc 2 934 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 2 894 0 is_stmt 1
+	.loc 2 943 0 is_stmt 1
 	pop	{r4, r5, r6, pc}
-.L192:
-	.loc 2 886 0
+.L180:
+	.loc 2 935 0
 	movs	r3, #0
-.LBB199:
-.LBB200:
-	.loc 2 888 0
-	ldr	r0, .L201+4
-.LVL245:
-.LBE200:
-.LBE199:
-	.loc 2 886 0
+.LBB213:
+.LBB214:
+	.loc 2 937 0
+	ldr	r0, .L189+4
+.LVL233:
+.LBE214:
+.LBE213:
+	.loc 2 935 0
 	strh	r3, [r1]	@ movhi
-.LBB204:
-.LBB201:
-	.loc 2 890 0
+.LBB218:
+.LBB215:
+	.loc 2 939 0
 	movw	r6, #65535
-	ldr	r1, .L201+8
+	ldr	r1, .L189+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-.LBE201:
-.LBE204:
-	.loc 2 887 0
-	ldr	r2, .L201+12
-.LBB205:
-.LBB202:
-	.loc 2 890 0
+.LBE215:
+.LBE218:
+	.loc 2 936 0
+	ldr	r2, .L189+12
+.LBB219:
+.LBB216:
+	.loc 2 939 0
 	ldr	r1, [r1]
-.LBE202:
-.LBE205:
-	.loc 2 887 0
+.LBE216:
+.LBE219:
+	.loc 2 936 0
 	str	r3, [r2]
-.LVL246:
+.LVL234:
 	add	r4, r1, r4, lsl #1
-.L193:
-.LBB206:
-.LBB203:
-	.loc 2 888 0
+.L181:
+.LBB220:
+.LBB217:
+	.loc 2 937 0
 	cmp	r1, r4
-	bne	.L195
-	cbz	r3, .L191
+	bne	.L183
+	cbz	r3, .L179
 	str	r0, [r2]
-.L191:
+.L179:
 	pop	{r4, r5, r6, pc}
-.L195:
-	.loc 2 890 0
+.L183:
+	.loc 2 939 0
 	ldrh	r5, [r1], #2
 	cmp	r5, r6
-	.loc 2 891 0
+	.loc 2 940 0
 	itt	ne
 	addne	r0, r0, r5
 	movne	r3, #1
-	b	.L193
-.L202:
+	b	.L181
+.L190:
 	.align	2
-.L201:
-	.word	.LANCHOR59
+.L189:
+	.word	.LANCHOR58
 	.word	.LANCHOR5
-	.word	.LANCHOR43
-	.word	.LANCHOR60
-.LBE203:
-.LBE206:
+	.word	.LANCHOR42
+	.word	.LANCHOR59
+.LBE217:
+.LBE220:
 	.cfi_endproc
 .LFE269:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2729,35 +2590,35 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 .LFB275:
-	.loc 2 1347 0
+	.loc 2 1396 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL247:
-	.loc 2 1347 0
+.LVL235:
+	.loc 2 1396 0
 	mov	r3, r0
-	.loc 2 1348 0
-	cbz	r1, .L204
-	b	ftl_set_blk_mode.part.7
-.LVL248:
-.L204:
-	.loc 2 1351 0
-	ldr	r2, .L205
+	.loc 2 1397 0
+	cbz	r1, .L192
+	b	ftl_set_blk_mode.part.6
+.LVL236:
+.L192:
+	.loc 2 1400 0
+	ldr	r2, .L193
 	lsrs	r0, r0, #5
-.LVL249:
+.LVL237:
 	and	r3, r3, #31
 	ldr	r1, [r2]
-.LVL250:
+.LVL238:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L206:
+.L194:
 	.align	2
-.L205:
+.L193:
 	.word	.LANCHOR1
 	.cfi_endproc
 .LFE275:
@@ -2772,26 +2633,26 @@ ftl_set_blk_mode:
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 .LFB276:
-	.loc 2 1355 0
+	.loc 2 1404 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL251:
-	.loc 2 1356 0
-	ldr	r3, .L208
+.LVL239:
+	.loc 2 1405 0
+	ldr	r3, .L196
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-.LVL252:
+.LVL240:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
-	.loc 2 1357 0
+	.loc 2 1406 0
 	and	r0, r0, #1
 	bx	lr
-.L209:
+.L197:
 	.align	2
-.L208:
+.L196:
 	.word	.LANCHOR1
 	.cfi_endproc
 .LFE276:
@@ -2806,88 +2667,88 @@ ftl_get_blk_mode:
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 .LFB282:
-	.loc 2 1608 0
+	.loc 2 1657 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL253:
-	.loc 2 1610 0
+.LVL241:
+	.loc 2 1659 0
 	movs	r3, #0
-	.loc 2 1608 0
+	.loc 2 1657 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 1610 0
+	.loc 2 1659 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL254:
-	.loc 2 1613 0
+.LVL242:
+	.loc 2 1662 0
 	movw	r6, #65535
-	.loc 2 1611 0
-	ldr	r3, .L217
+	.loc 2 1660 0
+	ldr	r3, .L205
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.LVL255:
-.L211:
-	.loc 2 1611 0 is_stmt 0 discriminator 1
+.LVL243:
+.L199:
+	.loc 2 1660 0 is_stmt 0 discriminator 1
 	cmp	r2, r4
-	bcc	.L213
-	.loc 2 1622 0 is_stmt 1
-	ldr	r3, .L217+4
+	bcc	.L201
+	.loc 2 1671 0 is_stmt 1
+	ldr	r3, .L205+4
 	add	r5, r0, #16
-	.loc 2 1620 0
+	.loc 2 1669 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
-.LVL256:
-	.loc 2 1622 0
+.LVL244:
+	.loc 2 1671 0
 	movs	r3, #0
 	uxth	r1, r1
-.LVL257:
-.L214:
-	.loc 2 1618 0 discriminator 1
+.LVL245:
+.L202:
+	.loc 2 1667 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L216
-	.loc 2 1625 0
+	bhi	.L204
+	.loc 2 1674 0
 	pop	{r4, r5, r6, pc}
-.LVL258:
-.L213:
-	.loc 2 1613 0
+.LVL246:
+.L201:
+	.loc 2 1662 0
 	ldrh	r5, [r3, #2]!
-	.loc 2 1611 0
+	.loc 2 1660 0
 	adds	r2, r2, #1
-.LVL259:
+.LVL247:
 	uxth	r2, r2
-.LVL260:
-	.loc 2 1613 0
+.LVL248:
+	.loc 2 1662 0
 	cmp	r5, r6
-	.loc 2 1615 0
+	.loc 2 1664 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L211
-.LVL261:
-.L216:
-	.loc 2 1620 0
+	b	.L199
+.LVL249:
+.L204:
+	.loc 2 1669 0
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
-.LVL262:
+.LVL250:
 	cmp	r2, r6
-	.loc 2 1622 0
+	.loc 2 1671 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L214
-.L218:
+	b	.L202
+.L206:
 	.align	2
-.L217:
+.L205:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
 	.cfi_endproc
@@ -2903,78 +2764,78 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 .LFB285:
-	.loc 2 2013 0
+	.loc 2 2062 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL263:
-	.loc 2 2016 0
+.LVL251:
+	.loc 2 2065 0
 	ldrh	r3, [r0, #4]
-	.loc 2 2013 0
+	.loc 2 2062 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2016 0
-	cbz	r3, .L219
-	.loc 2 2018 0
+	.loc 2 2065 0
+	cbz	r3, .L207
+	.loc 2 2067 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L219
-.LVL264:
-.LBB209:
-.LBB210:
-	.loc 2 2020 0
+	beq	.L207
+.LVL252:
+.LBB223:
+.LBB224:
+	.loc 2 2069 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
-	.loc 2 2025 0
+	.loc 2 2074 0
 	movs	r5, #0
-	.loc 2 2020 0
+	.loc 2 2069 0
 	adds	r2, r2, #8
 	ldrh	r1, [r0, r2, lsl #1]
-.LVL265:
-	.loc 2 2023 0
-	ldr	r2, .L225
+.LVL253:
+	.loc 2 2072 0
+	ldr	r2, .L213
 	ldrh	r4, [r2]
-	.loc 2 2021 0
+	.loc 2 2070 0
 	mov	r2, r3
-.L222:
+.L210:
 	cmp	r1, r2
-	beq	.L224
-.LVL266:
-.L219:
+	beq	.L212
+.LVL254:
+.L207:
 	pop	{r4, r5, pc}
-.LVL267:
-.L224:
-	.loc 2 2022 0
+.LVL255:
+.L212:
+	.loc 2 2071 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2023 0
+	.loc 2 2072 0
 	cmp	r3, r4
-	.loc 2 2022 0
+	.loc 2 2071 0
 	strb	r3, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	itttt	eq
 	ldrheq	r3, [r0, #2]
-	.loc 2 2025 0
+	.loc 2 2074 0
 	strbeq	r5, [r0, #6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	addeq	r3, r3, #1
 	strheq	r3, [r0, #2]	@ movhi
-	.loc 2 2027 0
+	.loc 2 2076 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r1, [r0, r3, lsl #1]
-.LVL268:
-	b	.L222
-.L226:
+.LVL256:
+	b	.L210
+.L214:
 	.align	2
-.L225:
+.L213:
 	.word	.LANCHOR3
-.LBE210:
-.LBE209:
+.LBE224:
+.LBE223:
 	.cfi_endproc
 .LFE285:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -2988,15 +2849,15 @@ FtlSlcSuperblockCheck:
 	.type	make_superblock, %function
 make_superblock:
 .LFB287:
-	.loc 2 2045 0
+	.loc 2 2094 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL269:
-	.loc 2 2048 0
-	ldr	r3, .L232
+.LVL257:
+	.loc 2 2097 0
+	ldr	r3, .L220
 	ldrh	r2, [r0]
-	.loc 2 2045 0
+	.loc 2 2094 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -3007,88 +2868,88 @@ make_superblock:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2045 0
+	.loc 2 2094 0
 	mov	r4, r0
-	.loc 2 2048 0
+	.loc 2 2097 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L228
-	.loc 2 2048 0 is_stmt 0 discriminator 1
-	mov	r2, #2048
-	ldr	r1, .L232+4
-	ldr	r0, .L232+8
-.LVL270:
+	bcc	.L216
+	.loc 2 2097 0 is_stmt 0 discriminator 1
+	movw	r2, #2097
+	ldr	r1, .L220+4
+	ldr	r0, .L220+8
+.LVL258:
 	bl	printf
-.LVL271:
-.L228:
-	.loc 2 2051 0 is_stmt 1
-	ldr	r3, .L232+12
+.LVL259:
+.L216:
+	.loc 2 2100 0 is_stmt 1
+	ldr	r3, .L220+12
 	add	r6, r4, #16
-	.loc 2 2052 0
-	ldr	r10, .L232+20
-	.loc 2 2053 0
+	.loc 2 2101 0
+	ldr	r10, .L220+20
+	.loc 2 2102 0
 	movw	r7, #65535
-	.loc 2 2049 0
+	.loc 2 2098 0
 	movs	r5, #0
-	.loc 2 2051 0
+	.loc 2 2100 0
 	ldrh	r8, [r3]
-	.loc 2 2049 0
+	.loc 2 2098 0
 	strh	r5, [r4, #4]	@ movhi
-	.loc 2 2050 0
+	.loc 2 2099 0
 	strb	r5, [r4, #7]
-.LVL272:
-.L229:
-	.loc 2 2051 0 discriminator 1
+.LVL260:
+.L217:
+	.loc 2 2100 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L231
-	.loc 2 2061 0
-	ldr	r2, .L232+16
-	.loc 2 2064 0
+	bhi	.L219
+	.loc 2 2110 0
+	ldr	r2, .L220+16
+	.loc 2 2113 0
 	movs	r0, #0
-	.loc 2 2061 0
+	.loc 2 2110 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2062 0
+	.loc 2 2111 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-	.loc 2 2064 0
+	.loc 2 2113 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL273:
-.L231:
-	.loc 2 2052 0
+.LVL261:
+.L219:
+	.loc 2 2101 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL274:
-	.loc 2 2053 0
+.LVL262:
+	.loc 2 2102 0
 	strh	r7, [r6]	@ movhi
-	.loc 2 2052 0
+	.loc 2 2101 0
 	mov	fp, r0
-.LVL275:
-	.loc 2 2054 0
+.LVL263:
+	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL276:
-	cbnz	r0, .L230
-	.loc 2 2055 0
+.LVL264:
+	cbnz	r0, .L218
+	.loc 2 2104 0
 	strh	fp, [r6]	@ movhi
-	.loc 2 2056 0
+	.loc 2 2105 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L230:
-.LVL277:
+.L218:
+.LVL265:
 	adds	r5, r5, #1
-.LVL278:
+.LVL266:
 	adds	r6, r6, #2
-	b	.L229
-.L233:
+	b	.L217
+.L221:
 	.align	2
-.L232:
+.L220:
 	.word	.LANCHOR5
-	.word	.LANCHOR61
+	.word	.LANCHOR60
 	.word	.LC1
 	.word	.LANCHOR3
 	.word	.LANCHOR19
@@ -3106,11 +2967,11 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 .LFB296:
-	.loc 2 2401 0
+	.loc 2 2454 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL279:
+.LVL267:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 3, -32
@@ -3121,74 +2982,74 @@ update_multiplier_value:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 2 2405 0
+	.loc 2 2458 0
 	movs	r5, #0
-	ldr	r3, .L240
-	.loc 2 2401 0
+	ldr	r3, .L228
+	.loc 2 2454 0
 	mov	r6, r0
-	.loc 2 2403 0
+	.loc 2 2456 0
 	mov	r4, r5
-	.loc 2 2406 0
-	ldr	r10, .L240+12
-	.loc 2 2405 0
+	.loc 2 2459 0
+	ldr	r10, .L228+12
+	.loc 2 2458 0
 	ldrh	r7, [r3]
-	.loc 2 2408 0
-	ldr	r3, .L240+4
+	.loc 2 2461 0
+	ldr	r3, .L228+4
 	ldrh	r8, [r3]
-.LVL280:
-.L235:
-	.loc 2 2405 0 discriminator 1
+.LVL268:
+.L223:
+	.loc 2 2458 0 discriminator 1
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L237
-	.loc 2 2410 0
-	cbz	r4, .L239
-	.loc 2 2411 0
+	bhi	.L225
+	.loc 2 2463 0
+	cbz	r4, .L227
+	.loc 2 2464 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL281:
-.L238:
-	.loc 2 2412 0
-	ldr	r3, .L240+8
+.LVL269:
+.L226:
+	.loc 2 2465 0
+	ldr	r3, .L228+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
-	.loc 2 2414 0
+	.loc 2 2467 0
 	movs	r0, #0
-.LVL282:
+.LVL270:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL283:
-.L237:
-	.loc 2 2406 0
+.LVL271:
+.L225:
+	.loc 2 2459 0
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL284:
-	.loc 2 2407 0
+.LVL272:
+	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL285:
-	cbnz	r0, .L236
-	.loc 2 2408 0
+.LVL273:
+	cbnz	r0, .L224
+	.loc 2 2461 0
 	add	r4, r4, r8
-.LVL286:
+.LVL274:
 	uxth	r4, r4
-.LVL287:
-.L236:
+.LVL275:
+.L224:
 	adds	r5, r5, #1
-.LVL288:
-	b	.L235
-.LVL289:
-.L239:
+.LVL276:
+	b	.L223
+.LVL277:
+.L227:
 	mov	r0, r4
-	b	.L238
-.L241:
+	b	.L226
+.L229:
 	.align	2
-.L240:
+.L228:
 	.word	.LANCHOR3
 	.word	.LANCHOR19
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR13
 	.cfi_endproc
 .LFE296:
@@ -3203,38 +3064,38 @@ update_multiplier_value:
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 .LFB297:
-	.loc 2 2417 0
+	.loc 2 2470 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL290:
-	.loc 2 2420 0
-	ldr	r3, .L245
+.LVL278:
+	.loc 2 2473 0
+	ldr	r3, .L233
 	ldr	r0, [r3]
-	cbz	r0, .L243
-	.loc 2 2421 0
-	ldr	r3, .L245+4
+	cbz	r0, .L231
+	.loc 2 2474 0
+	ldr	r3, .L233+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L245+8
+	ldr	r3, .L233+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L245+12
+	ldr	r3, .L233+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.LVL291:
-.L243:
-	.loc 2 2423 0
+.LVL279:
+.L231:
+	.loc 2 2476 0
 	bx	lr
-.L246:
+.L234:
 	.align	2
-.L245:
+.L233:
 	.word	.LANCHOR47
-	.word	.LANCHOR41
-	.word	-1431655765
 	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LANCHOR43
 	.cfi_endproc
 .LFE297:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3248,87 +3109,87 @@ GetFreeBlockMinEraseCount:
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 .LFB298:
-	.loc 2 2426 0
+	.loc 2 2479 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL292:
-	.loc 2 2431 0
-	ldr	r3, .L255
-	.loc 2 2426 0
+.LVL280:
+	.loc 2 2484 0
+	ldr	r3, .L243
+	.loc 2 2479 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 2431 0
+	.loc 2 2484 0
 	ldr	r3, [r3]
-	cbz	r3, .L253
-	.loc 2 2432 0
-	ldr	r2, .L255+4
-	.loc 2 2436 0
+	cbz	r3, .L241
+	.loc 2 2485 0
+	ldr	r2, .L243+4
+	.loc 2 2489 0
 	movs	r5, #6
 	movw	r6, #65535
-	.loc 2 2432 0
+	.loc 2 2485 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
-	.loc 2 2433 0
+	.loc 2 2486 0
 	it	gt
 	uxthgt	r0, r2
-.LVL293:
-	.loc 2 2434 0
-	ldr	r2, .L255+8
+.LVL281:
+	.loc 2 2487 0
+	ldr	r2, .L243+8
 	ldr	r1, [r2]
-	ldr	r2, .L255+12
+	ldr	r2, .L243+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	.loc 2 2435 0
+	.loc 2 2488 0
 	movs	r2, #0
-	.loc 2 2434 0
+	.loc 2 2487 0
 	uxth	r3, r3
-.LVL294:
-.L250:
-	.loc 2 2435 0 discriminator 1
+.LVL282:
+.L238:
+	.loc 2 2488 0 discriminator 1
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L252
-	.loc 2 2436 0
+	bls	.L240
+	.loc 2 2489 0
 	mul	r4, r5, r3
 	adds	r2, r2, #1
-.LVL295:
+.LVL283:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L254
-.L252:
-	.loc 2 2440 0
-	ldr	r2, .L255+16
+	bne	.L242
+.L240:
+	.loc 2 2493 0
+	ldr	r2, .L243+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
-.LVL296:
+.LVL284:
 	pop	{r4, r5, r6, pc}
-.LVL297:
-.L254:
+.LVL285:
+.L242:
 	mov	r3, r4
-.LVL298:
-	b	.L250
-.L253:
-	.loc 2 2427 0
+.LVL286:
+	b	.L238
+.L241:
+	.loc 2 2480 0
 	mov	r0, r3
-.LVL299:
-	.loc 2 2443 0
+.LVL287:
+	.loc 2 2496 0
 	pop	{r4, r5, r6, pc}
-.L256:
+.L244:
 	.align	2
-.L255:
+.L243:
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR41
-	.word	-1431655765
 	.word	.LANCHOR40
+	.word	-1431655765
+	.word	.LANCHOR43
 	.cfi_endproc
 .LFE298:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3346,7 +3207,7 @@ FtlPrintInfo2buf:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL300:
+.LVL288:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -3359,605 +3220,605 @@ FtlPrintInfo2buf:
 	.cfi_offset 14, -4
 	.loc 3 12 0
 	mov	r8, r0
-.LVL301:
+.LVL289:
 	.loc 3 16 0
-	ldr	r1, .L269
+	ldr	r1, .L257
 	bl	sprintf
-.LVL302:
+.LVL290:
 	.loc 3 17 0
-	ldr	r3, .L269+4
+	ldr	r3, .L257+4
 	.loc 3 16 0
 	add	r5, r8, r0
-.LVL303:
+.LVL291:
 	.loc 3 17 0
-	ldr	r1, .L269+8
+	ldr	r1, .L257+8
 	mov	r0, r5
 	.loc 3 31 0
-	ldr	r4, .L269+12
+	ldr	r4, .L257+12
 	.loc 3 17 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL304:
+.LVL292:
 	add	r5, r5, r0
-.LVL305:
+.LVL293:
 	.loc 3 18 0
-	ldr	r1, .L269+16
+	ldr	r1, .L257+16
 	mov	r0, r5
 	.loc 3 32 0
-	ldr	r10, .L269+352
+	ldr	r10, .L257+352
 	.loc 3 18 0
 	bl	sprintf
-.LVL306:
+.LVL294:
 	.loc 3 19 0
-	ldr	r3, .L269+20
+	ldr	r3, .L257+20
 	.loc 3 18 0
 	add	r5, r5, r0
-.LVL307:
+.LVL295:
 	.loc 3 19 0
-	ldr	r1, .L269+24
+	ldr	r1, .L257+24
 	mov	r0, r5
 	.loc 3 39 0
-	ldr	r6, .L269+28
+	ldr	r6, .L257+28
 	.loc 3 19 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL308:
+.LVL296:
 	.loc 3 20 0
-	ldr	r3, .L269+32
+	ldr	r3, .L257+32
 	.loc 3 19 0
 	add	r5, r5, r0
-.LVL309:
+.LVL297:
 	.loc 3 20 0
-	ldr	r1, .L269+36
+	ldr	r1, .L257+36
 	mov	r0, r5
 	.loc 3 67 0
-	ldr	r7, .L269+40
+	ldr	r7, .L257+40
 	.loc 3 20 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL310:
+.LVL298:
 	.loc 3 21 0
-	ldr	r3, .L269+44
+	ldr	r3, .L257+44
 	.loc 3 20 0
 	add	r5, r5, r0
-.LVL311:
+.LVL299:
 	.loc 3 21 0
-	ldr	r1, .L269+48
+	ldr	r1, .L257+48
 	mov	r0, r5
 	.loc 3 72 0
-	ldr	fp, .L269+356
+	ldr	fp, .L257+356
 	.loc 3 21 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL312:
+.LVL300:
 	.loc 3 22 0
-	ldr	r3, .L269+52
+	ldr	r3, .L257+52
 	.loc 3 21 0
 	add	r5, r5, r0
-.LVL313:
+.LVL301:
 	.loc 3 22 0
-	ldr	r1, .L269+56
+	ldr	r1, .L257+56
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL314:
+.LVL302:
 	.loc 3 23 0
-	ldr	r3, .L269+60
+	ldr	r3, .L257+60
 	.loc 3 22 0
 	add	r5, r5, r0
-.LVL315:
+.LVL303:
 	.loc 3 23 0
-	ldr	r1, .L269+64
+	ldr	r1, .L257+64
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL316:
+.LVL304:
 	.loc 3 24 0
-	ldr	r3, .L269+68
+	ldr	r3, .L257+68
 	.loc 3 23 0
 	add	r5, r5, r0
-.LVL317:
+.LVL305:
 	.loc 3 24 0
-	ldr	r1, .L269+72
+	ldr	r1, .L257+72
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL318:
+.LVL306:
 	.loc 3 25 0
-	ldr	r3, .L269+76
+	ldr	r3, .L257+76
 	.loc 3 24 0
 	add	r5, r5, r0
-.LVL319:
+.LVL307:
 	.loc 3 25 0
-	ldr	r1, .L269+80
+	ldr	r1, .L257+80
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL320:
+.LVL308:
 	.loc 3 26 0
-	ldr	r3, .L269+84
+	ldr	r3, .L257+84
 	.loc 3 25 0
 	add	r5, r5, r0
-.LVL321:
+.LVL309:
 	.loc 3 26 0
-	ldr	r1, .L269+88
+	ldr	r1, .L257+88
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL322:
+.LVL310:
 	.loc 3 27 0
-	ldr	r3, .L269+92
+	ldr	r3, .L257+92
 	.loc 3 26 0
 	add	r5, r5, r0
-.LVL323:
+.LVL311:
 	.loc 3 27 0
-	ldr	r1, .L269+96
+	ldr	r1, .L257+96
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL324:
+.LVL312:
 	.loc 3 28 0
-	ldr	r3, .L269+100
+	ldr	r3, .L257+100
 	.loc 3 27 0
 	add	r5, r5, r0
-.LVL325:
+.LVL313:
 	.loc 3 28 0
-	ldr	r1, .L269+104
+	ldr	r1, .L257+104
 	mov	r0, r5
 	ldr	r2, [r3]
 	lsrs	r2, r2, #11
 	bl	sprintf
-.LVL326:
+.LVL314:
 	.loc 3 29 0
-	ldr	r3, .L269+108
+	ldr	r3, .L257+108
 	.loc 3 28 0
 	add	r5, r5, r0
-.LVL327:
+.LVL315:
 	.loc 3 29 0
-	ldr	r1, .L269+112
+	ldr	r1, .L257+112
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL328:
+.LVL316:
 	.loc 3 30 0
-	ldr	r3, .L269+116
+	ldr	r3, .L257+116
 	.loc 3 29 0
 	add	r5, r5, r0
-.LVL329:
+.LVL317:
 	.loc 3 30 0
-	ldr	r1, .L269+120
+	ldr	r1, .L257+120
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL330:
+.LVL318:
 	add	r5, r5, r0
-.LVL331:
+.LVL319:
 	.loc 3 31 0
 	ldrh	r2, [r4, #6]
-	ldr	r1, .L269+124
+	ldr	r1, .L257+124
 	mov	r0, r5
 	bl	sprintf
-.LVL332:
+.LVL320:
 	add	r5, r5, r0
-.LVL333:
+.LVL321:
 	.loc 3 32 0
 	ldrh	r2, [r10]
-	ldr	r1, .L269+128
+	ldr	r1, .L257+128
 	mov	r0, r5
 	bl	sprintf
-.LVL334:
+.LVL322:
 	.loc 3 33 0
-	ldr	r3, .L269+132
+	ldr	r3, .L257+132
 	.loc 3 32 0
 	add	r5, r5, r0
-.LVL335:
+.LVL323:
 	.loc 3 33 0
-	ldr	r1, .L269+136
+	ldr	r1, .L257+136
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL336:
+.LVL324:
 	.loc 3 34 0
-	ldr	r3, .L269+140
+	ldr	r3, .L257+140
 	.loc 3 33 0
 	add	r5, r5, r0
-.LVL337:
+.LVL325:
 	.loc 3 34 0
-	ldr	r1, .L269+144
+	ldr	r1, .L257+144
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL338:
+.LVL326:
 	.loc 3 35 0
-	ldr	r3, .L269+148
+	ldr	r3, .L257+148
 	.loc 3 34 0
 	add	r5, r5, r0
-.LVL339:
+.LVL327:
 	.loc 3 35 0
-	ldr	r1, .L269+152
+	ldr	r1, .L257+152
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL340:
+.LVL328:
 	.loc 3 36 0
-	ldr	r3, .L269+156
+	ldr	r3, .L257+156
 	.loc 3 35 0
 	add	r5, r5, r0
-.LVL341:
+.LVL329:
 	.loc 3 36 0
-	ldr	r1, .L269+160
+	ldr	r1, .L257+160
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL342:
+.LVL330:
 	.loc 3 37 0
-	ldr	r3, .L269+164
+	ldr	r3, .L257+164
 	.loc 3 36 0
 	add	r5, r5, r0
-.LVL343:
+.LVL331:
 	.loc 3 37 0
-	ldr	r1, .L269+168
+	ldr	r1, .L257+168
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL344:
+.LVL332:
 	.loc 3 38 0
-	ldr	r3, .L269+172
+	ldr	r3, .L257+172
 	.loc 3 37 0
 	add	r5, r5, r0
-.LVL345:
+.LVL333:
 	.loc 3 38 0
-	ldr	r1, .L269+176
+	ldr	r1, .L257+176
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL346:
+.LVL334:
 	add	r5, r5, r0
-.LVL347:
+.LVL335:
 	.loc 3 39 0
 	ldrh	r2, [r6, #30]
-	ldr	r1, .L269+180
+	ldr	r1, .L257+180
 	mov	r0, r5
 	bl	sprintf
-.LVL348:
+.LVL336:
 	add	r5, r5, r0
-.LVL349:
+.LVL337:
 	.loc 3 40 0
 	ldrh	r2, [r6, #28]
-	ldr	r1, .L269+184
+	ldr	r1, .L257+184
 	mov	r0, r5
 	bl	sprintf
-.LVL350:
+.LVL338:
 	.loc 3 41 0
-	ldr	r3, .L269+188
+	ldr	r3, .L257+188
 	.loc 3 40 0
 	add	r5, r5, r0
-.LVL351:
+.LVL339:
 	.loc 3 41 0
-	ldr	r1, .L269+192
+	ldr	r1, .L257+192
 	mov	r0, r5
 	.loc 3 55 0
-	ldr	r6, .L269+196
+	ldr	r6, .L257+196
 	.loc 3 41 0
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL352:
+.LVL340:
 	.loc 3 42 0
-	ldr	r3, .L269+200
+	ldr	r3, .L257+200
 	.loc 3 41 0
 	add	r5, r5, r0
-.LVL353:
+.LVL341:
 	.loc 3 42 0
-	ldr	r1, .L269+204
+	ldr	r1, .L257+204
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL354:
+.LVL342:
 	.loc 3 43 0
-	ldr	r3, .L269+208
+	ldr	r3, .L257+208
 	.loc 3 42 0
 	add	r5, r5, r0
-.LVL355:
+.LVL343:
 	.loc 3 43 0
-	ldr	r1, .L269+212
+	ldr	r1, .L257+212
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL356:
+.LVL344:
 	.loc 3 44 0
-	ldr	r3, .L269+216
+	ldr	r3, .L257+216
 	.loc 3 43 0
 	add	r5, r5, r0
-.LVL357:
+.LVL345:
 	.loc 3 44 0
-	ldr	r1, .L269+220
+	ldr	r1, .L257+220
 	mov	r0, r5
 	ldrh	r2, [r3, #6]
 	bl	sprintf
-.LVL358:
+.LVL346:
 	.loc 3 45 0
-	ldr	r3, .L269+224
+	ldr	r3, .L257+224
 	.loc 3 44 0
 	add	r5, r5, r0
-.LVL359:
+.LVL347:
 	.loc 3 45 0
-	ldr	r1, .L269+228
+	ldr	r1, .L257+228
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL360:
+.LVL348:
 	.loc 3 46 0
-	ldr	r3, .L269+232
+	ldr	r3, .L257+232
 	.loc 3 45 0
 	add	r5, r5, r0
-.LVL361:
+.LVL349:
 	.loc 3 46 0
-	ldr	r1, .L269+236
+	ldr	r1, .L257+236
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL362:
+.LVL350:
 	.loc 3 47 0
-	ldr	r3, .L269+240
+	ldr	r3, .L257+240
 	.loc 3 46 0
 	add	r5, r5, r0
-.LVL363:
+.LVL351:
 	.loc 3 47 0
-	ldr	r1, .L269+244
+	ldr	r1, .L257+244
 	mov	r0, r5
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL364:
+.LVL352:
 	.loc 3 48 0
-	ldr	r3, .L269+248
+	ldr	r3, .L257+248
 	.loc 3 47 0
 	add	r5, r5, r0
-.LVL365:
+.LVL353:
 	.loc 3 48 0
-	ldr	r1, .L269+252
+	ldr	r1, .L257+252
 	mov	r0, r5
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL366:
+.LVL354:
 	.loc 3 49 0
 	ldrh	r2, [r4]
 	.loc 3 48 0
 	add	r5, r5, r0
-.LVL367:
+.LVL355:
 	.loc 3 50 0
-	ldr	r4, .L269+256
+	ldr	r4, .L257+256
 	.loc 3 49 0
 	mov	r0, r5
-	ldr	r1, .L269+260
+	ldr	r1, .L257+260
 	bl	sprintf
-.LVL368:
+.LVL356:
 	add	r5, r5, r0
-.LVL369:
+.LVL357:
 	.loc 3 50 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, .L269+264
+	ldr	r1, .L257+264
 	mov	r0, r5
 	bl	sprintf
-.LVL370:
+.LVL358:
 	add	r5, r5, r0
-.LVL371:
+.LVL359:
 	.loc 3 51 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+268
+	ldr	r1, .L257+268
 	mov	r0, r5
 	bl	sprintf
-.LVL372:
+.LVL360:
 	add	r5, r5, r0
-.LVL373:
+.LVL361:
 	.loc 3 52 0
 	ldrh	r2, [r4]
-	ldr	r1, .L269+272
+	ldr	r1, .L257+272
 	mov	r0, r5
 	bl	sprintf
-.LVL374:
+.LVL362:
 	add	r5, r5, r0
-.LVL375:
+.LVL363:
 	.loc 3 53 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L269+276
+	ldr	r1, .L257+276
 	mov	r0, r5
 	bl	sprintf
-.LVL376:
+.LVL364:
 	add	r5, r5, r0
-.LVL377:
+.LVL365:
 	.loc 3 54 0
 	ldrh	r2, [r4, #4]
-	ldr	r1, .L269+280
+	ldr	r1, .L257+280
 	mov	r0, r5
 	bl	sprintf
-.LVL378:
+.LVL366:
 	.loc 3 55 0
 	ldr	r3, [r6]
 	.loc 3 54 0
 	add	r5, r5, r0
-.LVL379:
+.LVL367:
 	.loc 3 55 0
 	ldrh	r2, [r4]
 	mov	r0, r5
 	.loc 3 56 0
-	ldr	r4, .L269+284
+	ldr	r4, .L257+284
 	.loc 3 55 0
-	ldr	r1, .L269+288
+	ldr	r1, .L257+288
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL380:
+.LVL368:
 	add	r5, r5, r0
-.LVL381:
+.LVL369:
 	.loc 3 56 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, .L269+292
+	ldr	r1, .L257+292
 	mov	r0, r5
 	bl	sprintf
-.LVL382:
+.LVL370:
 	add	r5, r5, r0
-.LVL383:
+.LVL371:
 	.loc 3 57 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+296
+	ldr	r1, .L257+296
 	mov	r0, r5
 	bl	sprintf
-.LVL384:
+.LVL372:
 	add	r5, r5, r0
-.LVL385:
+.LVL373:
 	.loc 3 58 0
 	ldrh	r2, [r4]
-	ldr	r1, .L269+300
+	ldr	r1, .L257+300
 	mov	r0, r5
 	bl	sprintf
-.LVL386:
+.LVL374:
 	add	r5, r5, r0
-.LVL387:
+.LVL375:
 	.loc 3 59 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L269+304
+	ldr	r1, .L257+304
 	mov	r0, r5
 	bl	sprintf
-.LVL388:
+.LVL376:
 	add	r5, r5, r0
-.LVL389:
+.LVL377:
 	.loc 3 60 0
 	ldrh	r2, [r4, #4]
-	ldr	r1, .L269+308
+	ldr	r1, .L257+308
 	mov	r0, r5
 	bl	sprintf
-.LVL390:
+.LVL378:
 	.loc 3 61 0
 	ldr	r3, [r6]
 	.loc 3 60 0
 	add	r5, r5, r0
-.LVL391:
+.LVL379:
 	.loc 3 61 0
 	ldrh	r2, [r4]
 	mov	r0, r5
 	.loc 3 62 0
-	ldr	r4, .L269+312
+	ldr	r4, .L257+312
 	.loc 3 61 0
-	ldr	r1, .L269+316
+	ldr	r1, .L257+316
 	ldrh	r2, [r3, r2, lsl #1]
 	bl	sprintf
-.LVL392:
+.LVL380:
 	add	r5, r5, r0
-.LVL393:
+.LVL381:
 	.loc 3 62 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, .L269+320
+	ldr	r1, .L257+320
 	mov	r0, r5
 	bl	sprintf
-.LVL394:
+.LVL382:
 	add	r5, r5, r0
-.LVL395:
+.LVL383:
 	.loc 3 63 0
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+324
+	ldr	r1, .L257+324
 	mov	r0, r5
 	bl	sprintf
-.LVL396:
+.LVL384:
 	add	r5, r5, r0
-.LVL397:
+.LVL385:
 	.loc 3 64 0
 	ldrh	r2, [r4]
-	ldr	r1, .L269+328
+	ldr	r1, .L257+328
 	mov	r0, r5
 	bl	sprintf
-.LVL398:
+.LVL386:
 	add	r5, r5, r0
-.LVL399:
+.LVL387:
 	.loc 3 65 0
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r1, .L269+332
+	ldr	r1, .L257+332
 	mov	r0, r5
 	bl	sprintf
-.LVL400:
+.LVL388:
 	add	r5, r5, r0
-.LVL401:
+.LVL389:
 	.loc 3 66 0
 	ldrh	r2, [r4, #4]
-	ldr	r1, .L269+336
+	ldr	r1, .L257+336
 	mov	r0, r5
 	bl	sprintf
-.LVL402:
+.LVL390:
 	add	r5, r5, r0
-.LVL403:
+.LVL391:
 	.loc 3 67 0
 	ldrh	r2, [r7, #2]
-	ldr	r1, .L269+340
+	ldr	r1, .L257+340
 	mov	r0, r5
 	bl	sprintf
-.LVL404:
+.LVL392:
 	add	r5, r5, r0
-.LVL405:
+.LVL393:
 	.loc 3 68 0
 	ldrb	r2, [r7, #6]	@ zero_extendqisi2
-	ldr	r1, .L269+344
+	ldr	r1, .L257+344
 	mov	r0, r5
 	bl	sprintf
-.LVL406:
+.LVL394:
 	add	r5, r5, r0
-.LVL407:
+.LVL395:
 	.loc 3 69 0
 	ldrh	r2, [r7]
-	ldr	r1, .L269+348
+	ldr	r1, .L257+348
 	mov	r0, r5
-	b	.L270
-.L271:
+	b	.L258
+.L259:
 	.align	2
-.L269:
+.L257:
 	.word	.LC2
 	.word	.LANCHOR26
 	.word	.LC3
 	.word	.LANCHOR37
 	.word	.LC4
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LC5
-	.word	.LANCHOR79
-	.word	.LANCHOR60
+	.word	.LANCHOR39
+	.word	.LANCHOR59
 	.word	.LC6
-	.word	.LANCHOR82
-	.word	.LANCHOR63
+	.word	.LANCHOR80
+	.word	.LANCHOR62
 	.word	.LC7
-	.word	.LANCHOR64
+	.word	.LANCHOR63
 	.word	.LC8
-	.word	.LANCHOR65
+	.word	.LANCHOR64
 	.word	.LC9
-	.word	.LANCHOR66
+	.word	.LANCHOR65
 	.word	.LC10
-	.word	.LANCHOR67
+	.word	.LANCHOR66
 	.word	.LC11
-	.word	.LANCHOR68
+	.word	.LANCHOR67
 	.word	.LC12
-	.word	.LANCHOR69
+	.word	.LANCHOR68
 	.word	.LC13
-	.word	.LANCHOR70
+	.word	.LANCHOR69
 	.word	.LC14
-	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LC15
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LC16
 	.word	.LC17
 	.word	.LC18
-	.word	.LANCHOR73
+	.word	.LANCHOR72
 	.word	.LC19
-	.word	.LANCHOR74
+	.word	.LANCHOR73
 	.word	.LC20
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.word	.LC21
-	.word	.LANCHOR76
+	.word	.LANCHOR75
 	.word	.LC22
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.word	.LC23
-	.word	.LANCHOR78
+	.word	.LANCHOR77
 	.word	.LC24
 	.word	.LC25
 	.word	.LC26
 	.word	.LANCHOR34
 	.word	.LC27
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.word	.LANCHOR31
 	.word	.LC28
 	.word	.LANCHOR2
@@ -3966,11 +3827,11 @@ FtlPrintInfo2buf:
 	.word	.LC30
 	.word	.LANCHOR5
 	.word	.LC31
-	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LC32
 	.word	.LANCHOR7
 	.word	.LC33
-	.word	.LANCHOR81
+	.word	.LANCHOR79
 	.word	.LC34
 	.word	.LANCHOR51
 	.word	.LC35
@@ -3997,130 +3858,130 @@ FtlPrintInfo2buf:
 	.word	.LC54
 	.word	.LC55
 	.word	.LANCHOR48
-	.word	.LANCHOR83
-.L270:
+	.word	.LANCHOR81
+.L258:
 	bl	sprintf
-.LVL408:
+.LVL396:
 	add	r5, r5, r0
-.LVL409:
+.LVL397:
 	.loc 3 70 0
 	ldrb	r2, [r7, #8]	@ zero_extendqisi2
-	ldr	r1, .L272
+	ldr	r1, .L260
 	mov	r0, r5
 	bl	sprintf
-.LVL410:
+.LVL398:
 	add	r5, r5, r0
-.LVL411:
+.LVL399:
 	.loc 3 71 0
 	ldrh	r2, [r7, #4]
-	ldr	r1, .L272+4
+	ldr	r1, .L260+4
 	mov	r0, r5
 	bl	sprintf
-.LVL412:
+.LVL400:
 	.loc 3 72 0
 	ldr	r3, [fp, #76]
 	.loc 3 71 0
 	add	r5, r5, r0
-.LVL413:
+.LVL401:
 	.loc 3 72 0
-	ldr	r1, .L272+8
+	ldr	r1, .L260+8
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [fp, #84]
 	ldr	r2, [fp, #80]
 	bl	sprintf
-.LVL414:
+.LVL402:
 	adds	r4, r5, r0
-.LVL415:
+.LVL403:
 	.loc 3 73 0
 	ldr	r2, [fp, #72]
-	ldr	r1, .L272+12
+	ldr	r1, .L260+12
 	mov	r0, r4
 	bl	sprintf
-.LVL416:
+.LVL404:
 	add	r4, r4, r0
-.LVL417:
+.LVL405:
 	.loc 3 74 0
 	ldr	r2, [fp, #96]
-	ldr	r1, .L272+16
+	ldr	r1, .L260+16
 	mov	r0, r4
 	bl	sprintf
-.LVL418:
+.LVL406:
 	.loc 3 75 0
-	ldr	r3, .L272+20
+	ldr	r3, .L260+20
 	.loc 3 74 0
 	add	r4, r4, r0
-.LVL419:
+.LVL407:
 	.loc 3 75 0
-	ldr	r1, .L272+24
+	ldr	r1, .L260+24
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL420:
+.LVL408:
 	.loc 3 76 0
-	ldr	r3, .L272+28
+	ldr	r3, .L260+28
 	.loc 3 75 0
 	add	r4, r4, r0
-.LVL421:
+.LVL409:
 	.loc 3 76 0
-	ldr	r1, .L272+32
+	ldr	r1, .L260+32
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL422:
+.LVL410:
 	.loc 3 77 0
-	ldr	r3, .L272+36
+	ldr	r3, .L260+36
 	.loc 3 76 0
 	add	r4, r4, r0
-.LVL423:
+.LVL411:
 	.loc 3 77 0
-	ldr	r1, .L272+40
+	ldr	r1, .L260+40
 	mov	r0, r4
 	ldr	r2, [r3]
 	bl	sprintf
-.LVL424:
+.LVL412:
 	.loc 3 78 0
-	ldr	r3, .L272+44
+	ldr	r3, .L260+44
 	.loc 3 77 0
 	add	r4, r4, r0
-.LVL425:
+.LVL413:
 	.loc 3 78 0
-	ldr	r1, .L272+48
+	ldr	r1, .L260+48
 	mov	r0, r4
 	ldrh	r2, [r3]
 	bl	sprintf
-.LVL426:
+.LVL414:
 	add	r4, r4, r0
-.LVL427:
+.LVL415:
 	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL428:
-	ldr	r1, .L272+52
+.LVL416:
+	ldr	r1, .L260+52
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL429:
+.LVL417:
 	add	r4, r4, r0
-.LVL430:
+.LVL418:
 	.loc 3 80 0
 	ldrh	r0, [r10]
 	bl	GetFreeBlockMaxEraseCount
-.LVL431:
-	ldr	r1, .L272+56
+.LVL419:
+	ldr	r1, .L260+56
 	mov	r2, r0
 	mov	r0, r4
 	bl	sprintf
-.LVL432:
+.LVL420:
 	.loc 3 81 0
-	ldr	r3, .L272+60
+	ldr	r3, .L260+60
 	.loc 3 80 0
 	add	r4, r4, r0
-.LVL433:
+.LVL421:
 	.loc 3 81 0
 	ldr	r3, [r3]
 	cmp	r3, #1
-	beq	.L258
-.L263:
+	beq	.L246
+.L251:
 	.loc 3 104 0
 	sub	r0, r4, r8
 	.loc 3 105 0
@@ -4129,48 +3990,48 @@ FtlPrintInfo2buf:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL434:
-.L258:
+.LVL422:
+.L246:
 	.cfi_restore_state
 	.loc 3 84 0
 	ldrh	r3, [r7]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L260
+	beq	.L248
 	.loc 3 85 0
 	ldr	r2, [r6]
 	mov	r0, r4
-	ldr	r1, .L272+64
+	ldr	r1, .L260+64
 	ldrh	r2, [r2, r3, lsl #1]
 	bl	sprintf
-.LVL435:
+.LVL423:
 	add	r4, r4, r0
-.LVL436:
-.L260:
-.LBB211:
+.LVL424:
+.L248:
+.LBB225:
 	.loc 3 87 0
 	movs	r0, #0
-	ldr	r5, .L272+68
+	ldr	r5, .L260+68
 	.loc 3 91 0
-	ldr	fp, .L272+84
+	ldr	fp, .L260+84
 	.loc 3 88 0
 	movs	r7, #0
 	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL437:
+.LVL425:
 	uxth	r3, r0
-.LVL438:
-.L262:
+.LVL426:
+.L250:
 	.loc 3 89 0
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L261
+	beq	.L249
 	.loc 3 91 0 discriminator 2
 	ldr	r2, [fp]
 	mov	r10, #6
 	mul	r10, r10, r3
 	mov	r0, r4
-	ldr	r1, .L272+72
+	ldr	r1, .L260+72
 	ldrh	r2, [r2, r3, lsl #1]
 	str	r2, [sp, #8]
 	ldr	r2, [r5]
@@ -4182,51 +4043,51 @@ FtlPrintInfo2buf:
 	str	r2, [sp]
 	mov	r2, r7
 	bl	sprintf
-.LVL439:
+.LVL427:
 	.loc 3 88 0 discriminator 2
 	adds	r7, r7, #1
-.LVL440:
+.LVL428:
 	.loc 3 92 0 discriminator 2
 	ldr	r3, [r5]
 	.loc 3 88 0 discriminator 2
 	cmp	r7, #16
 	.loc 3 91 0 discriminator 2
 	add	r4, r4, r0
-.LVL441:
+.LVL429:
 	.loc 3 92 0 discriminator 2
 	ldrh	r3, [r3, r10]
-.LVL442:
+.LVL430:
 	.loc 3 88 0 discriminator 2
-	bne	.L262
-.L261:
-.LBE211:
-.LBB212:
+	bne	.L250
+.L249:
+.LBE225:
+.LBB226:
 	.loc 3 96 0
-	ldr	r3, .L272+76
-.LVL443:
+	ldr	r3, .L260+76
+.LVL431:
 	.loc 3 97 0
 	movs	r7, #0
-.LVL444:
+.LVL432:
 	.loc 3 96 0
 	ldr	r2, [r5]
 	.loc 3 100 0
-	ldr	r10, .L272+84
+	ldr	r10, .L260+84
 	.loc 3 96 0
 	ldr	r3, [r3]
 	.loc 3 100 0
-	ldr	fp, .L272+88
+	ldr	fp, .L260+88
 	.loc 3 96 0
 	subs	r3, r3, r2
-	ldr	r2, .L272+80
+	ldr	r2, .L260+80
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	uxth	r3, r3
-.LVL445:
-.L264:
+.LVL433:
+.L252:
 	.loc 3 98 0
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L263
+	beq	.L251
 	.loc 3 100 0 discriminator 2
 	ldr	r2, [r10]
 	movs	r6, #6
@@ -4242,48 +4103,48 @@ FtlPrintInfo2buf:
 	mov	r2, r7
 	.loc 3 97 0 discriminator 2
 	adds	r7, r7, #1
-.LVL446:
+.LVL434:
 	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL447:
+.LVL435:
 	.loc 3 97 0 discriminator 2
 	cmp	r7, #4
 	.loc 3 100 0 discriminator 2
 	add	r4, r4, r0
-.LVL448:
+.LVL436:
 	.loc 3 97 0 discriminator 2
-	beq	.L263
+	beq	.L251
 	.loc 3 101 0
 	ldr	r3, [r5]
 	ldrh	r3, [r3, r6]
-	b	.L264
-.L273:
+	b	.L252
+.L261:
 	.align	2
-.L272:
+.L260:
 	.word	.LC56
 	.word	.LC57
 	.word	.LC58
 	.word	.LC59
 	.word	.LC60
-	.word	.LANCHOR84
+	.word	.LANCHOR82
 	.word	.LC61
-	.word	.LANCHOR85
+	.word	.LANCHOR83
 	.word	.LC62
-	.word	.LANCHOR86
+	.word	.LANCHOR84
 	.word	.LC63
-	.word	.LANCHOR87
+	.word	.LANCHOR85
 	.word	.LC64
 	.word	.LC65
 	.word	.LC66
-	.word	.LANCHOR88
+	.word	.LANCHOR86
 	.word	.LC67
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LC68
 	.word	.LANCHOR47
 	.word	-1431655765
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LC69
-.LBE212:
+.LBE226:
 	.cfi_endproc
 .LFE203:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -4301,7 +4162,7 @@ rknand_proc_ftlread:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL449:
+.LVL437:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -4310,28 +4171,28 @@ rknand_proc_ftlread:
 	.cfi_offset 14, -4
 	.loc 3 114 0
 	mov	r5, r0
-.LVL450:
+.LVL438:
 	.loc 3 120 0
-	ldr	r2, .L275
-	ldr	r1, .L275+4
+	ldr	r2, .L263
+	ldr	r1, .L263+4
 	bl	sprintf
-.LVL451:
+.LVL439:
 	adds	r4, r5, r0
-.LVL452:
+.LVL440:
 	.loc 3 122 0
 	mov	r0, r4
 	bl	FtlPrintInfo2buf
-.LVL453:
+.LVL441:
 	add	r0, r0, r4
-.LVL454:
+.LVL442:
 	.loc 3 124 0
 	subs	r0, r0, r5
-.LVL455:
+.LVL443:
 	pop	{r3, r4, r5, pc}
-.LVL456:
-.L276:
+.LVL444:
+.L264:
 	.align	2
-.L275:
+.L263:
 	.word	.LC70
 	.word	.LC71
 	.cfi_endproc
@@ -4347,13 +4208,13 @@ rknand_proc_ftlread:
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
 .LFB299:
-	.loc 2 2447 0
+	.loc 2 2500 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL457:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
+.LVL445:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
 	.cfi_offset 5, -28
 	.cfi_offset 6, -24
@@ -4362,215 +4223,219 @@ GetSwlReplaceBlock:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2456 0
-	ldr	r3, .L306
-	ldr	r6, .L306+4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 2510 0
+	ldr	r3, .L293
+	ldr	r6, .L293+4
 	ldr	r5, [r3]
 	mov	r10, r3
 	ldr	r1, [r6]
 	cmp	r1, r5
-	bcs	.L278
-	.loc 2 2459 0
-	ldr	r2, .L306+8
-	.loc 2 2458 0
+	bcs	.L266
+	.loc 2 2513 0
+	ldr	r2, .L293+8
+	.loc 2 2512 0
 	movs	r3, #0
-	ldr	r4, .L306+12
-	.loc 2 2459 0
+	ldr	r4, .L293+12
+	.loc 2 2513 0
 	mov	r0, r3
 	ldrh	r1, [r2]
-	.loc 2 2460 0
-	ldr	r2, .L306+16
-	.loc 2 2458 0
+	.loc 2 2514 0
+	ldr	r2, .L293+16
+	.loc 2 2512 0
 	str	r3, [r4]
-.LVL458:
-	.loc 2 2460 0
+.LVL446:
+	.loc 2 2514 0
 	ldr	r7, [r2]
-	.loc 2 2459 0
+	.loc 2 2513 0
 	mov	r2, r3
-.LVL459:
-.L279:
-	.loc 2 2459 0 is_stmt 0 discriminator 1
+.LVL447:
+.L267:
+	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	r2, r1
-	bcc	.L280
-	cbz	r3, .L281
+	bcc	.L268
+	cbz	r3, .L269
 	str	r0, [r4]
-.L281:
-	.loc 2 2461 0 is_stmt 1
+.L269:
+	.loc 2 2515 0 is_stmt 1
 	ldr	r7, [r4]
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL460:
-	.loc 2 2462 0
-	ldr	r3, .L306+20
-	.loc 2 2461 0
+.LVL448:
+	.loc 2 2516 0
+	ldr	r3, .L293+20
+	.loc 2 2515 0
 	str	r0, [r6]
-	.loc 2 2462 0
+	.loc 2 2516 0
 	ldr	r0, [r3]
-	ldr	r3, .L306+24
+	ldr	r3, .L293+24
 	subs	r0, r7, r0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-.LVL461:
+.LVL449:
 	str	r0, [r4]
-.L282:
-	.loc 2 2468 0
+.L270:
+	.loc 2 2522 0
 	ldr	r6, [r6]
 	add	r3, r5, #256
 	cmp	r3, r6
-	bls	.L287
-	.loc 2 2468 0 is_stmt 0 discriminator 1
-	ldr	r2, .L306+28
+	bls	.L275
+	.loc 2 2522 0 is_stmt 0 discriminator 1
+	ldr	r2, .L293+28
 	add	r3, r5, #768
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bls	.L287
-.LVL462:
-.L290:
-	.loc 2 2469 0 is_stmt 1
+	bls	.L275
+.LVL450:
+.L277:
+	.loc 2 2523 0 is_stmt 1
 	movw	r4, #65535
-.L288:
-	.loc 2 2518 0
+.L276:
+	.loc 2 2569 0
 	mov	r0, r4
-	add	sp, sp, #16
+	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL463:
-.L280:
+.LVL451:
+.L268:
 	.cfi_restore_state
-	.loc 2 2460 0 discriminator 3
+	.loc 2 2514 0 discriminator 3
 	ldrh	r3, [r7, r2, lsl #1]
-	.loc 2 2459 0 discriminator 3
+	.loc 2 2513 0 discriminator 3
 	adds	r2, r2, #1
-.LVL464:
-	.loc 2 2460 0 discriminator 3
+.LVL452:
+	.loc 2 2514 0 discriminator 3
 	add	r0, r0, r3
 	movs	r3, #1
-	b	.L279
-.LVL465:
-.L278:
-	.loc 2 2463 0
-	ldr	r2, .L306+28
+	b	.L267
+.LVL453:
+.L266:
+	.loc 2 2517 0
+	ldr	r2, .L293+28
 	ldr	r3, [r2]
 	cmp	r1, r3
-	bls	.L282
-	.loc 2 2464 0
+	bls	.L270
+	.loc 2 2518 0
 	adds	r3, r3, #1
-	.loc 2 2465 0
-	ldr	r0, .L306+8
-	.loc 2 2464 0
+	.loc 2 2519 0
+	ldr	r0, .L293+8
+	.loc 2 2518 0
 	str	r3, [r2]
-.LVL466:
-	.loc 2 2465 0
+.LVL454:
+	.loc 2 2519 0
 	movs	r2, #0
-	.loc 2 2466 0
-	ldr	r3, .L306+16
+	.loc 2 2520 0
+	ldr	r3, .L293+16
 	ldr	r3, [r3]
 	subs	r3, r3, #2
-.LVL467:
-.L284:
-	.loc 2 2465 0 discriminator 1
+.LVL455:
+.L272:
+	.loc 2 2519 0 discriminator 1
 	ldrh	r1, [r0]
 	cmp	r2, r1
-	bcs	.L282
-	.loc 2 2466 0 discriminator 3
+	bcs	.L270
+	.loc 2 2520 0 discriminator 3
 	ldrh	r1, [r3, #2]
-	.loc 2 2465 0 discriminator 3
+	.loc 2 2519 0 discriminator 3
 	adds	r2, r2, #1
-.LVL468:
-	.loc 2 2466 0 discriminator 3
+.LVL456:
+	.loc 2 2520 0 discriminator 3
 	adds	r1, r1, #1
 	strh	r1, [r3, #2]!	@ movhi
-	b	.L284
-.LVL469:
-.L287:
-	.loc 2 2471 0
-	ldr	r3, .L306+32
+	b	.L272
+.LVL457:
+.L275:
+	.loc 2 2525 0
+	ldr	r3, .L293+32
 	ldrh	r0, [r3]
 	add	r0, r0, r0, lsl #1
 	ubfx	r0, r0, #2, #16
 	bl	GetFreeBlockMaxEraseCount
-.LVL470:
-	.loc 2 2472 0
+.LVL458:
+	.loc 2 2526 0
 	add	r3, r5, #64
-	.loc 2 2471 0
+	.loc 2 2525 0
 	mov	r2, r0
-.LVL471:
-	.loc 2 2472 0
+.LVL459:
+	.loc 2 2526 0
 	cmp	r0, r3
-	bcs	.L289
-	.loc 2 2472 0 is_stmt 0 discriminator 1
-	cmp	r5, #30
-	bhi	.L290
-.L289:
-	.loc 2 2476 0 is_stmt 1
-	ldr	r3, .L306+36
+	bcc	.L277
+	.loc 2 2529 0
+	ldr	r3, .L293+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L290
-	.loc 2 2483 0
-	ldr	r1, .L306+40
-	.loc 2 2495 0
+	beq	.L277
+	.loc 2 2533 0
+	ldr	r1, .L293+8
+	.loc 2 2537 0
+	movs	r0, #0
+.LVL460:
+	.loc 2 2546 0
 	mov	fp, #6
-	.loc 2 2483 0
-	ldr	lr, [r1]
-	.loc 2 2484 0
-	ldr	r1, .L306+16
-	ldr	r0, [r1]
-.LVL472:
+	.loc 2 2533 0
+	ldrh	r1, [r1]
+	str	r1, [sp, #20]
+	.loc 2 2536 0
+	ldr	r1, .L293+40
+	ldr	r8, [r1]
+	.loc 2 2537 0
+	ldr	r1, .L293+16
+	ldr	r7, [r1]
 	movw	r1, #65535
-	mov	r7, r1
-	.loc 2 2479 0
-	mov	r8, r1
-.LVL473:
-.L291:
-	ldrh	ip, [r3]
-	cmp	ip, r8
-	bne	.L294
-	mov	r4, r7
-.LVL474:
-.L293:
-	.loc 2 2498 0
+	mov	ip, r1
+.LVL461:
+.L278:
+	.loc 2 2531 0
+	ldrh	lr, [r3]
+	movw	r4, #65535
+	cmp	lr, r4
+	bne	.L281
+	mov	r4, ip
+.LVL462:
+.L280:
+	.loc 2 2549 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L290
-	.loc 2 2500 0
-	ldrh	r7, [r0, r4, lsl #1]
-.LVL475:
+	beq	.L277
+	.loc 2 2551 0
+	ldrh	r7, [r7, r4, lsl #1]
+.LVL463:
 	lsl	r8, r4, #1
-	.loc 2 2501 0
+	.loc 2 2552 0
 	cmp	r5, r7
-	bcs	.L295
-	.loc 2 2503 0
+	bcs	.L282
+	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL476:
+.LVL464:
 	cmp	r5, r0
-	.loc 2 2504 0
+	.loc 2 2555 0
 	it	cc
 	strcc	r1, [r10]
-.L295:
-	.loc 2 2506 0
+.L282:
+	.loc 2 2557 0
 	cmp	r6, r7
-	bls	.L290
-	.loc 2 2506 0 is_stmt 0 discriminator 1
+	bls	.L277
+	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	r3, r7, #128
 	cmp	r2, r3
-	ble	.L290
-	.loc 2 2508 0 is_stmt 1
+	ble	.L277
+	.loc 2 2559 0 is_stmt 1
 	add	r3, r7, #256
-	ldr	r0, .L306+28
+	ldr	r0, .L293+28
 	cmp	r6, r3
-	bhi	.L296
-	.loc 2 2508 0 is_stmt 0 discriminator 1
+	bhi	.L283
+	.loc 2 2559 0 is_stmt 0 discriminator 1
 	ldr	r1, [r0]
-.LVL477:
+.LVL465:
 	add	r3, r7, #768
 	cmp	r3, r1
-	bcs	.L290
-.L296:
-	.loc 2 2510 0 is_stmt 1
-	ldr	r3, .L306+44
+	bcs	.L277
+.L283:
+	.loc 2 2561 0 is_stmt 1
+	ldr	r3, .L293+44
 	mov	r1, r4
 	str	r2, [sp, #8]
 	mov	r2, r6
@@ -4579,62 +4444,73 @@ GetSwlReplaceBlock:
 	ldrh	r3, [r3, r8]
 	str	r3, [sp]
 	ldr	r3, [r0]
-	ldr	r0, .L306+48
+	ldr	r0, .L293+48
 	bl	printf
-.LVL478:
-	.loc 2 2511 0
-	ldr	r3, .L306+52
+.LVL466:
+	.loc 2 2562 0
+	ldr	r3, .L293+52
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 2 2512 0
-	b	.L288
-.LVL479:
-.L294:
-	.loc 2 2481 0
+	.loc 2 2563 0
+	b	.L276
+.LVL467:
+.L281:
+	.loc 2 2532 0
+	adds	r0, r0, #1
+.LVL468:
+	.loc 2 2533 0
+	ldr	r4, [sp, #20]
+	.loc 2 2532 0
+	uxth	r0, r0
+.LVL469:
+	.loc 2 2533 0
+	cmp	r0, r4
+	bhi	.L277
+	.loc 2 2535 0
 	ldrh	r4, [r3, #4]
-	cbz	r4, .L292
-	.loc 2 2483 0
-	ldr	r4, .L306+56
-	sub	r3, r3, lr
-.LVL480:
+	cbz	r4, .L279
+	.loc 2 2536 0
+	ldr	r4, .L293+56
+	sub	r3, r3, r8
+.LVL470:
 	asrs	r3, r3, #1
 	muls	r3, r4, r3
 	uxth	r4, r3
-.LVL481:
-	.loc 2 2484 0
-	ldrh	r3, [r0, r4, lsl #1]
+.LVL471:
+	.loc 2 2537 0
+	ldrh	r3, [r7, r4, lsl #1]
 	cmp	r5, r3
-	bcs	.L293
-	.loc 2 2489 0
+	bcs	.L280
+	.loc 2 2541 0
 	cmp	r1, r3
 	itt	hi
 	movhi	r1, r3
-.LVL482:
-	.loc 2 2483 0
-	movhi	r7, r4
-.LVL483:
-.L292:
-	.loc 2 2495 0
-	mla	r3, fp, ip, lr
-.LVL484:
-	b	.L291
-.L307:
+.LVL472:
+	.loc 2 2536 0
+	movhi	ip, r4
+.LVL473:
+.L279:
+	.loc 2 2546 0
+	mla	r3, fp, lr, r8
+.LVL474:
+	b	.L278
+.L294:
 	.align	2
-.L306:
-	.word	.LANCHOR78
-	.word	.LANCHOR75
+.L293:
+	.word	.LANCHOR77
+	.word	.LANCHOR74
 	.word	.LANCHOR5
+	.word	.LANCHOR72
+	.word	.LANCHOR43
 	.word	.LANCHOR73
-	.word	.LANCHOR40
-	.word	.LANCHOR74
 	.word	.LANCHOR14
-	.word	.LANCHOR77
+	.word	.LANCHOR76
 	.word	.LANCHOR48
-	.word	.LANCHOR42
 	.word	.LANCHOR41
-	.word	.LANCHOR43
+	.word	.LANCHOR40
+	.word	.LANCHOR42
 	.word	.LC72
-	.word	.LANCHOR89
+	.word	.LANCHOR87
 	.word	-1431655765
 	.cfi_endproc
 .LFE299:
@@ -4649,42 +4525,42 @@ GetSwlReplaceBlock:
 	.type	free_data_superblock, %function
 free_data_superblock:
 .LFB300:
-	.loc 2 2522 0
+	.loc 2 2573 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL485:
-	.loc 2 2523 0
+.LVL475:
+	.loc 2 2574 0
 	movw	r2, #65535
-	.loc 2 2522 0
+	.loc 2 2573 0
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 2523 0
+	.loc 2 2574 0
 	cmp	r0, r2
-	beq	.L309
-.LVL486:
-.LBB215:
-.LBB216:
-	.loc 2 2525 0
-	ldr	r2, .L310
+	beq	.L296
+.LVL476:
+.LBB229:
+.LBB230:
+	.loc 2 2576 0
+	ldr	r2, .L297
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
-	.loc 2 2526 0
+	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL487:
-.L309:
-.LBE216:
-.LBE215:
-	.loc 2 2528 0
+.LVL477:
+.L296:
+.LBE230:
+.LBE229:
+	.loc 2 2579 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L311:
+.L298:
 	.align	2
-.L310:
-	.word	.LANCHOR43
+.L297:
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE300:
 	.size	free_data_superblock, .-free_data_superblock
@@ -4698,14 +4574,14 @@ free_data_superblock:
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
 .LFB303:
-	.loc 2 2655 0
+	.loc 2 2706 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL488:
-	.loc 2 2659 0
+.LVL478:
+	.loc 2 2710 0
 	ldrh	r2, [r0]
-	.loc 2 2655 0
+	.loc 2 2706 0
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -4714,143 +4590,143 @@ get_new_active_ppa:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 2659 0
+	.loc 2 2710 0
 	movw	r3, #65535
-	.loc 2 2655 0
+	.loc 2 2706 0
 	mov	r4, r0
-	.loc 2 2659 0
+	.loc 2 2710 0
 	cmp	r2, r3
-	bne	.L313
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	movw	r2, #2659
-	ldr	r1, .L326
-	ldr	r0, .L326+4
-.LVL489:
+	bne	.L300
+	.loc 2 2710 0 is_stmt 0 discriminator 1
+	movw	r2, #2710
+	ldr	r1, .L313
+	ldr	r0, .L313+4
+.LVL479:
 	bl	printf
-.LVL490:
-.L313:
-	.loc 2 2660 0 is_stmt 1
-	ldr	r5, .L326+8
+.LVL480:
+.L300:
+	.loc 2 2711 0 is_stmt 1
+	ldr	r5, .L313+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
-	bne	.L314
-	.loc 2 2660 0 is_stmt 0 discriminator 1
-	movw	r2, #2660
-	ldr	r1, .L326
-	ldr	r0, .L326+4
+	bne	.L301
+	.loc 2 2711 0 is_stmt 0 discriminator 1
+	movw	r2, #2711
+	ldr	r1, .L313
+	ldr	r0, .L313+4
 	bl	printf
-.LVL491:
-.L314:
-	.loc 2 2661 0 is_stmt 1
+.LVL481:
+.L301:
+	.loc 2 2712 0 is_stmt 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L315
-	.loc 2 2661 0 is_stmt 0 discriminator 1
-	movw	r2, #2661
-	ldr	r1, .L326
-	ldr	r0, .L326+4
+	cbnz	r3, .L302
+	.loc 2 2712 0 is_stmt 0 discriminator 1
+	movw	r2, #2712
+	ldr	r1, .L313
+	ldr	r0, .L313+4
 	bl	printf
-.LVL492:
-.L315:
-	.loc 2 2663 0 is_stmt 1
+.LVL482:
+.L302:
+	.loc 2 2714 0 is_stmt 1
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	.loc 2 2662 0
+	.loc 2 2713 0
 	movs	r3, #0
 	strb	r3, [r4, #10]
-	.loc 2 2664 0
+	.loc 2 2715 0
 	movw	r6, #65535
-	.loc 2 2663 0
+	.loc 2 2714 0
 	adds	r2, r2, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.LVL493:
-	.loc 2 2666 0
-	ldr	r2, .L326+12
+.LVL483:
+	.loc 2 2717 0
+	ldr	r2, .L313+12
 	ldrh	r1, [r2]
-	.loc 2 2668 0
+	.loc 2 2719 0
 	mov	r2, r3
-.L316:
-	.loc 2 2664 0
+.L303:
+	.loc 2 2715 0
 	cmp	r0, r6
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	beq	.L318
-	.loc 2 2673 0
+	beq	.L305
+	.loc 2 2724 0
 	ldrh	r2, [r4, #4]
-	.loc 2 2672 0
+	.loc 2 2723 0
 	ldrh	r6, [r4, #2]
-	.loc 2 2673 0
+	.loc 2 2724 0
 	subs	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 2672 0
+	.loc 2 2723 0
 	orr	r6, r6, r0, lsl #10
-.LVL494:
-	.loc 2 2680 0
+.LVL484:
+	.loc 2 2731 0
 	movw	r0, #65535
-.LVL495:
-	.loc 2 2673 0
+.LVL485:
+	.loc 2 2724 0
 	strh	r2, [r4, #4]	@ movhi
-.L320:
-	.loc 2 2675 0
+.L307:
+	.loc 2 2726 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2676 0
+	.loc 2 2727 0
 	cmp	r1, r3
-	.loc 2 2677 0
+	.loc 2 2728 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2678 0
+	.loc 2 2729 0
 	moveq	r3, #0
-	.loc 2 2680 0
+	.loc 2 2731 0
 	add	r7, r3, #8
 	ldrh	r7, [r4, r7, lsl #1]
 	cmp	r7, r0
-	beq	.L320
+	beq	.L307
 	strb	r3, [r4, #6]
-	.loc 2 2682 0
+	.loc 2 2733 0
 	ldrh	r1, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r1, r3
-	bne	.L312
-	.loc 2 2682 0 is_stmt 0 discriminator 1
-	cbz	r2, .L312
-	.loc 2 2682 0 discriminator 2
-	movw	r2, #2682
-	ldr	r1, .L326
-	ldr	r0, .L326+4
+	bne	.L299
+	.loc 2 2733 0 is_stmt 0 discriminator 1
+	cbz	r2, .L299
+	.loc 2 2733 0 discriminator 2
+	movw	r2, #2733
+	ldr	r1, .L313
+	ldr	r0, .L313+4
 	bl	printf
-.LVL496:
-.L312:
-	.loc 2 2684 0 is_stmt 1
+.LVL486:
+.L299:
+	.loc 2 2735 0 is_stmt 1
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL497:
-.L318:
-	.loc 2 2665 0
+.LVL487:
+.L305:
+	.loc 2 2716 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
-	.loc 2 2666 0
+	.loc 2 2717 0
 	cmp	r3, r1
-	.loc 2 2665 0
+	.loc 2 2716 0
 	strb	r3, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2718 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
-	.loc 2 2668 0
+	.loc 2 2719 0
 	strbeq	r2, [r4, #6]
-	.loc 2 2667 0
+	.loc 2 2718 0
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 2670 0
+	.loc 2 2721 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r0, [r4, r3, lsl #1]
-.LVL498:
-	b	.L316
-.L327:
+.LVL488:
+	b	.L303
+.L314:
 	.align	2
-.L326:
-	.word	.LANCHOR90
+.L313:
+	.word	.LANCHOR88
 	.word	.LC1
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -4885,19 +4761,19 @@ FtlGcBufInit:
 	.loc 5 25 0
 	movs	r3, #0
 	.loc 5 27 0
-	ldr	r1, .L333
+	ldr	r1, .L320
 	mov	fp, #1
 	.loc 5 25 0
-	ldr	r2, .L333+4
+	ldr	r2, .L320+4
 	.loc 5 27 0
 	ldr	r5, [r1]
 	.loc 5 28 0
-	ldr	r1, .L333+8
+	ldr	r1, .L320+8
 	.loc 5 25 0
 	str	r3, [r2]
-.LVL499:
+.LVL489:
 	.loc 5 26 0
-	ldr	r2, .L333+12
+	ldr	r2, .L320+12
 	mov	r0, r5
 	.loc 5 28 0
 	ldr	r1, [r1]
@@ -4905,16 +4781,16 @@ FtlGcBufInit:
 	ldrh	r2, [r2]
 	.loc 5 28 0
 	str	r1, [sp, #4]
-	ldr	r1, .L333+16
+	ldr	r1, .L320+16
 	ldrh	r1, [r1]
 	str	r1, [sp]
 	.loc 5 29 0
-	ldr	r1, .L333+20
+	ldr	r1, .L320+20
 	ldr	r10, [r1]
-	ldr	r1, .L333+24
+	ldr	r1, .L320+24
 	ldrh	r7, [r1]
 	.loc 5 30 0
-	ldr	r1, .L333+28
+	ldr	r1, .L320+28
 	ldr	r4, [r1]
 	movs	r1, #12
 	mla	r1, r2, r1, r1
@@ -4922,8 +4798,8 @@ FtlGcBufInit:
 	add	r8, r5, r1
 	.loc 5 26 0
 	mov	r1, r3
-.LVL500:
-.L329:
+.LVL490:
+.L316:
 	adds	r0, r0, #12
 	ldr	r6, [sp]
 	.loc 5 26 0 is_stmt 0 discriminator 1
@@ -4931,33 +4807,33 @@ FtlGcBufInit:
 	add	ip, r3, r7
 	add	r4, r4, #20
 	add	lr, r1, r6
-	bne	.L330
+	bne	.L317
 	.loc 5 34 0 is_stmt 1
-	ldr	r3, .L333+32
+	ldr	r3, .L320+32
 	.loc 5 35 0
 	mov	lr, #12
 	mov	r8, #0
 	.loc 5 34 0
 	ldr	r0, [r3]
 	.loc 5 36 0
-	ldr	r3, .L333+8
+	ldr	r3, .L320+8
 	ldr	r4, [r3]
 	.loc 5 37 0
-	ldr	r3, .L333+20
+	ldr	r3, .L320+20
 	ldr	ip, [r3]
-.L331:
-.LVL501:
+.L318:
+.LVL491:
 	.loc 5 34 0 discriminator 1
 	cmp	r2, r0
-	bcc	.L332
+	bcc	.L319
 	.loc 5 39 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL502:
-.L330:
+.LVL492:
+.L317:
 	.cfi_restore_state
 	.loc 5 28 0 discriminator 3
 	bic	r1, r1, #3
@@ -4983,9 +4859,9 @@ FtlGcBufInit:
 	mov	r3, ip
 	.loc 5 30 0 discriminator 3
 	str	r6, [r4, #-20]
-	b	.L329
-.LVL503:
-.L332:
+	b	.L316
+.LVL493:
+.L319:
 	.loc 5 36 0 discriminator 3
 	ldr	r3, [sp]
 	.loc 5 35 0 discriminator 3
@@ -5003,26 +4879,26 @@ FtlGcBufInit:
 	mul	r3, r2, r7
 	.loc 5 34 0 discriminator 3
 	adds	r2, r2, #1
-.LVL504:
+.LVL494:
 	uxth	r2, r2
-.LVL505:
+.LVL495:
 	.loc 5 37 0 discriminator 3
 	bic	r3, r3, #3
 	add	r3, r3, ip
 	str	r3, [r1, #4]
-	b	.L331
-.L334:
+	b	.L318
+.L321:
 	.align	2
-.L333:
-	.word	.LANCHOR92
+.L320:
+	.word	.LANCHOR90
+	.word	.LANCHOR89
 	.word	.LANCHOR91
-	.word	.LANCHOR93
 	.word	.LANCHOR3
 	.word	.LANCHOR23
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR24
-	.word	.LANCHOR95
-	.word	.LANCHOR96
+	.word	.LANCHOR93
+	.word	.LANCHOR94
 	.cfi_endproc
 .LFE306:
 	.size	FtlGcBufInit, .-FtlGcBufInit
@@ -5040,9 +4916,9 @@ FtlGcBufFree:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL506:
+.LVL496:
 	.loc 5 47 0
-	ldr	r3, .L342
+	ldr	r3, .L329
 	.loc 5 48 0
 	mov	ip, #12
 	.loc 5 42 0
@@ -5065,48 +4941,48 @@ FtlGcBufFree:
 	.loc 5 47 0
 	ldr	r7, [r3]
 	.loc 5 48 0
-	ldr	r3, .L342+4
+	ldr	r3, .L329+4
 	ldr	r5, [r3]
-.LVL507:
-.L336:
+.LVL497:
+.L323:
 	uxth	r3, r4
 	.loc 5 46 0 discriminator 1
 	cmp	r1, r3
-	bls	.L335
+	bls	.L322
 	.loc 5 48 0
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L337:
-.LVL508:
+.L324:
+.LVL498:
 	uxth	r3, r2
 	.loc 5 47 0 discriminator 1
 	cmp	r7, r3
-	bls	.L338
+	bls	.L325
 	.loc 5 48 0
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
-.LVL509:
+.LVL499:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L337
+	bne	.L324
 	.loc 5 49 0
 	str	lr, [r10, #8]
-.L338:
-.LVL510:
+.L325:
+.LVL500:
 	adds	r4, r4, #1
-.LVL511:
-	b	.L336
-.LVL512:
-.L335:
+.LVL501:
+	b	.L323
+.LVL502:
+.L322:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL513:
-.L343:
+.LVL503:
+.L330:
 	.align	2
-.L342:
-	.word	.LANCHOR96
-	.word	.LANCHOR92
+.L329:
+	.word	.LANCHOR94
+	.word	.LANCHOR90
 	.cfi_endproc
 .LFE307:
 	.size	FtlGcBufFree, .-FtlGcBufFree
@@ -5124,9 +5000,9 @@ FtlGcBufAlloc:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL514:
+.LVL504:
 	.loc 5 62 0
-	ldr	r3, .L351
+	ldr	r3, .L338
 	.loc 5 61 0
 	movs	r2, #0
 	.loc 5 57 0
@@ -5148,31 +5024,31 @@ FtlGcBufAlloc:
 	.loc 5 62 0
 	ldr	r4, [r3]
 	.loc 5 63 0
-	ldr	r3, .L351+4
+	ldr	r3, .L338+4
 	ldr	r5, [r3]
-.LVL515:
-.L345:
+.LVL505:
+.L332:
 	uxth	r8, r2
 	.loc 5 61 0 discriminator 1
 	cmp	r1, r8
-	bhi	.L349
+	bhi	.L336
 	.loc 5 71 0
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L349:
+.L336:
 	mov	r10, #0
-.L346:
-.LVL516:
+.L333:
+.LVL506:
 	uxth	r3, r10
 	.loc 5 62 0 discriminator 1
 	cmp	r4, r3
-	bls	.L347
+	bls	.L334
 	.loc 5 63 0
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
-.LVL517:
+.LVL507:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L346
+	bne	.L333
 	.loc 5 65 0
 	mla	r8, lr, r8, r0
 	.loc 5 64 0
@@ -5185,16 +5061,16 @@ FtlGcBufAlloc:
 	str	r6, [r8, #8]
 	.loc 5 66 0
 	str	r3, [r8, #12]
-.L347:
-.LVL518:
+.L334:
+.LVL508:
 	adds	r2, r2, #1
-.LVL519:
-	b	.L345
-.L352:
+.LVL509:
+	b	.L332
+.L339:
 	.align	2
-.L351:
-	.word	.LANCHOR96
-	.word	.LANCHOR92
+.L338:
+	.word	.LANCHOR94
+	.word	.LANCHOR90
 	.cfi_endproc
 .LFE308:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -5213,40 +5089,40 @@ IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL520:
+.LVL510:
 	.loc 5 78 0
-	ldr	r3, .L358
+	ldr	r3, .L345
 	.loc 5 77 0
-	ldr	r2, .L358+4
+	ldr	r2, .L345+4
 	.loc 5 78 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.LVL521:
-.L354:
+.LVL511:
+.L341:
 	.loc 5 77 0 discriminator 1
 	cmp	r3, r2
-	bne	.L356
+	bne	.L343
 	.loc 5 81 0
 	movs	r0, #0
-.LVL522:
+.LVL512:
 	bx	lr
-.LVL523:
-.L356:
+.LVL513:
+.L343:
 	.loc 5 78 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L354
+	bne	.L341
 	.loc 5 79 0
 	movs	r0, #1
-.LVL524:
+.LVL514:
 	.loc 5 82 0
 	bx	lr
-.L359:
+.L346:
 	.align	2
-.L358:
-	.word	.LANCHOR97
-	.word	.LANCHOR98
+.L345:
+	.word	.LANCHOR95
+	.word	.LANCHOR96
 	.cfi_endproc
 .LFE309:
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -5264,7 +5140,7 @@ FtlGcUpdatePage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL525:
+.LVL515:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -5276,54 +5152,54 @@ FtlGcUpdatePage:
 	.loc 5 85 0
 	mov	r5, r0
 	.loc 5 91 0
-	ldr	r4, .L364
+	ldr	r4, .L351
 	.loc 5 88 0
 	ubfx	r0, r0, #10, #16
-.LVL526:
+.LVL516:
 	.loc 5 85 0
 	mov	r6, r1
 	mov	r7, r2
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL527:
+.LVL517:
 	.loc 5 92 0
-	ldr	r3, .L364+4
+	ldr	r3, .L351+4
 	.loc 5 91 0
 	ldrh	r1, [r4]
 	.loc 5 92 0
 	ldr	r2, [r3]
 	.loc 5 91 0
 	movs	r3, #0
-.LVL528:
-.L361:
+.LVL518:
+.L348:
 	uxth	ip, r3
-.LVL529:
+.LVL519:
 	.loc 5 91 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
-	bcc	.L363
+	bcc	.L350
 	.loc 5 96 0 is_stmt 1
-	bne	.L362
+	bne	.L349
 	.loc 5 97 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
 	.loc 5 98 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L362
-.L363:
+	b	.L349
+.L350:
 	adds	r3, r3, #1
 	.loc 5 92 0
 	add	ip, r2, r3, lsl #1
-.LVL530:
+.LVL520:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L361
-.L362:
+	bne	.L348
+.L349:
 	.loc 5 101 0
-	ldr	r2, .L364+8
+	ldr	r2, .L351+8
 	movs	r0, #12
-.LVL531:
-	ldr	r1, .L364+12
+.LVL521:
+	ldr	r1, .L351+12
 	ldrh	r3, [r2]
 	ldr	r1, [r1]
 	muls	r0, r3, r0
@@ -5339,14 +5215,14 @@ FtlGcUpdatePage:
 	.loc 5 107 0
 	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL532:
-.L365:
+.LVL522:
+.L352:
 	.align	2
-.L364:
-	.word	.LANCHOR98
+.L351:
+	.word	.LANCHOR96
+	.word	.LANCHOR95
 	.word	.LANCHOR97
-	.word	.LANCHOR99
-	.word	.LANCHOR100
+	.word	.LANCHOR98
 	.cfi_endproc
 .LFE310:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -5364,7 +5240,7 @@ FtlGcRefreshBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL533:
+.LVL523:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -5376,43 +5252,43 @@ FtlGcRefreshBlock:
 	.loc 5 345 0
 	mov	r4, r0
 	.loc 5 347 0
-	ldr	r0, .L369
-.LVL534:
+	ldr	r0, .L356
+.LVL524:
 	bl	printf
-.LVL535:
+.LVL525:
 	.loc 5 349 0
-	ldr	r0, .L369+4
+	ldr	r0, .L356+4
 	ldrh	r5, [r0]
 	cmp	r4, r5
-	beq	.L367
+	beq	.L354
 	.loc 5 349 0 is_stmt 0 discriminator 1
-	ldr	r3, .L369+8
+	ldr	r3, .L356+8
 	ldrh	r1, [r3]
 	cmp	r4, r1
-	beq	.L367
+	beq	.L354
 	.loc 5 351 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L368
+	bne	.L355
 	.loc 5 352 0
 	strh	r4, [r0]	@ movhi
-.L367:
+.L354:
 	.loc 5 356 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L368:
+.L355:
 	.loc 5 353 0
 	cmp	r1, r2
 	.loc 5 354 0
 	it	eq
 	strheq	r4, [r3]	@ movhi
-	b	.L367
-.L370:
+	b	.L354
+.L357:
 	.align	2
-.L369:
+.L356:
 	.word	.LC73
-	.word	.LANCHOR101
-	.word	.LANCHOR102
+	.word	.LANCHOR99
+	.word	.LANCHOR100
 	.cfi_endproc
 .LFE317:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -5430,7 +5306,7 @@ FtlGcMarkBadPhyBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL536:
+.LVL526:
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -5440,66 +5316,66 @@ FtlGcMarkBadPhyBlk:
 	.loc 5 359 0
 	mov	r5, r0
 	.loc 5 364 0
-	ldr	r4, .L375
+	ldr	r4, .L362
 	.loc 5 361 0
 	bl	P2V_block_in_plane
-.LVL537:
+.LVL527:
 	.loc 5 364 0
 	mov	r2, r5
 	.loc 5 361 0
 	mov	r6, r0
-.LVL538:
+.LVL528:
 	.loc 5 364 0
 	ldrh	r1, [r4]
-	ldr	r0, .L375+4
+	ldr	r0, .L362+4
 	bl	printf
-.LVL539:
+.LVL529:
 	.loc 5 366 0
 	mov	r0, r6
 	bl	FtlGcRefreshBlock
-.LVL540:
+.LVL530:
 	.loc 5 368 0
 	ldrh	r3, [r4]
 	movs	r2, #0
 	.loc 5 369 0
-	ldr	r0, .L375+8
-.LVL541:
-.L372:
+	ldr	r0, .L362+8
+.LVL531:
+.L359:
 	.loc 5 368 0 discriminator 1
 	uxth	r1, r2
 	cmp	r3, r1
-	bhi	.L374
+	bhi	.L361
 	.loc 5 372 0
 	cmp	r3, #15
 	.loc 5 373 0
 	itttt	ls
 	addls	r2, r3, #1
-.LVL542:
+.LVL532:
 	strhls	r2, [r4]	@ movhi
-	ldrls	r2, .L375+8
+	ldrls	r2, .L362+8
 	strhls	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L373
-.LVL543:
-.L374:
+	b	.L360
+.LVL533:
+.L361:
 	adds	r2, r2, #1
-.LVL544:
+.LVL534:
 	.loc 5 369 0
 	add	r1, r0, r2, lsl #1
-.LVL545:
+.LVL535:
 	ldrh	r1, [r1, #-2]
 	cmp	r1, r5
-	bne	.L372
-.L373:
+	bne	.L359
+.L360:
 	.loc 5 375 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL546:
-.L376:
+.LVL536:
+.L363:
 	.align	2
-.L375:
-	.word	.LANCHOR103
+.L362:
+	.word	.LANCHOR101
 	.word	.LC74
-	.word	.LANCHOR104
+	.word	.LANCHOR102
 	.cfi_endproc
 .LFE318:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
@@ -5518,7 +5394,7 @@ FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 380 0
-	ldr	r3, .L383
+	ldr	r3, .L370
 	.loc 5 379 0
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
@@ -5526,48 +5402,48 @@ FtlGcReFreshBadBlk:
 	.cfi_offset 14, -4
 	.loc 5 380 0
 	ldrh	r3, [r3]
-	cbz	r3, .L378
+	cbz	r3, .L365
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	ldr	r2, .L383+4
+	ldr	r2, .L370+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L378
+	bne	.L365
 	.loc 5 381 0 is_stmt 1
-	ldr	r4, .L383+8
+	ldr	r4, .L370+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
 	.loc 5 382 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB219:
-.LBB220:
+.LBB233:
+.LBB234:
 	.loc 5 383 0
-	ldr	r3, .L383+12
+	ldr	r3, .L370+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
-.LVL547:
+.LVL537:
 	bl	FtlGcRefreshBlock
-.LVL548:
+.LVL538:
 	.loc 5 384 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L378:
-.LBE220:
-.LBE219:
+.L365:
+.LBE234:
+.LBE233:
 	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L384:
+.L371:
 	.align	2
-.L383:
-	.word	.LANCHOR103
+.L370:
 	.word	.LANCHOR101
-	.word	.LANCHOR105
-	.word	.LANCHOR104
+	.word	.LANCHOR99
+	.word	.LANCHOR103
+	.word	.LANCHOR102
 	.cfi_endproc
 .LFE319:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -5586,15 +5462,15 @@ ftl_free:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL549:
-.LBB221:
-.LBB222:
+.LVL539:
+.LBB235:
+.LBB236:
 	.file 6 "include/linux/compat.h"
 	.loc 6 80 0
 	b	free
-.LVL550:
-.LBE222:
-.LBE221:
+.LVL540:
+.LBE236:
+.LBE235:
 	.cfi_endproc
 .LFE340:
 	.size	ftl_free, .-ftl_free
@@ -5613,11 +5489,11 @@ ftl_malloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL551:
+.LVL541:
 	.loc 1 29 0
 	movs	r1, #0
 	b	kmalloc
-.LVL552:
+.LVL542:
 	.cfi_endproc
 .LFE341:
 	.size	ftl_malloc, .-ftl_malloc
@@ -5635,7 +5511,7 @@ rknand_print_hex:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL553:
+.LVL543:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -5651,20 +5527,20 @@ rknand_print_hex:
 	.loc 1 33 0
 	mov	fp, r0
 	mov	r7, r1
-.LVL554:
+.LVL544:
 	mov	r8, r2
 	mov	r10, r3
 	.loc 1 39 0
 	mov	r5, r6
 	.loc 1 40 0
 	mov	r4, r6
-.LVL555:
-.L388:
+.LVL545:
+.L375:
 	.loc 1 40 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
-	bcc	.L394
+	bcc	.L381
 	.loc 1 55 0 is_stmt 1
-	ldr	r0, .L397
+	ldr	r0, .L384
 	.loc 1 56 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_remember_state
@@ -5677,67 +5553,67 @@ rknand_print_hex:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL556:
+.LVL546:
 	.loc 1 55 0
 	b	printf
-.LVL557:
-.L394:
+.LVL547:
+.L381:
 	.cfi_restore_state
 	.loc 1 41 0
-	cbnz	r5, .L389
+	cbnz	r5, .L376
 	.loc 1 42 0
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L397+4
+	ldr	r0, .L384+4
 	bl	printf
-.LVL558:
-.L389:
+.LVL548:
+.L376:
 	.loc 1 44 0
 	cmp	r8, #4
-	bne	.L390
+	bne	.L377
 	.loc 1 45 0
 	ldr	r1, [r7, r4, lsl #2]
-.L396:
+.L383:
 	.loc 1 47 0
-	ldr	r0, .L397+8
-.L395:
+	ldr	r0, .L384+8
+.L382:
 	.loc 1 50 0
 	adds	r5, r5, #1
-.LVL559:
+.LVL549:
 	.loc 1 49 0
 	bl	printf
-.LVL560:
+.LVL550:
 	.loc 1 50 0
 	cmp	r5, #15
-	bls	.L393
-.LVL561:
+	bls	.L380
+.LVL551:
 	.loc 1 51 0
 	movs	r5, #0
 	.loc 1 52 0
-	ldr	r0, .L397
+	ldr	r0, .L384
 	bl	printf
-.LVL562:
-.L393:
+.LVL552:
+.L380:
 	.loc 1 40 0 discriminator 2
 	adds	r4, r4, #1
-.LVL563:
+.LVL553:
 	add	r6, r6, r8
-	b	.L388
-.L390:
+	b	.L375
+.L377:
 	.loc 1 46 0
 	cmp	r8, #2
-	bne	.L392
+	bne	.L379
 	.loc 1 47 0
 	ldrsh	r1, [r7, r4, lsl #1]
-	b	.L396
-.L392:
+	b	.L383
+.L379:
 	.loc 1 49 0
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L397+12
-	b	.L395
-.L398:
+	ldr	r0, .L384+12
+	b	.L382
+.L385:
 	.align	2
-.L397:
+.L384:
 	.word	.LC78
 	.word	.LC75
 	.word	.LC76
@@ -5759,7 +5635,7 @@ FlashReadPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL564:
+.LVL554:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -5773,22 +5649,22 @@ FlashReadPages:
 	.loc 1 85 0
 	mov	r8, r1
 	.loc 1 87 0
-	ldr	r3, .L417
+	ldr	r3, .L404
 	mov	r4, r0
 	.loc 1 91 0
 	movs	r5, #0
 	.loc 1 92 0
-	ldr	fp, .L417+12
+	ldr	fp, .L404+12
 	.loc 1 87 0
 	ldrh	r2, [r3, #12]
-.LVL565:
+.LVL555:
 	mov	r10, r3
 	str	r2, [sp, #4]
-.LVL566:
-.L400:
+.LVL556:
+.L387:
 	.loc 1 91 0 discriminator 1
 	cmp	r5, r8
-	bne	.L407
+	bne	.L394
 	.loc 1 112 0
 	movs	r0, #0
 	add	sp, sp, #16
@@ -5796,31 +5672,31 @@ FlashReadPages:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL567:
-.L407:
+.LVL557:
+.L394:
 	.cfi_restore_state
 	.loc 1 92 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L401
+	cbz	r3, .L388
 	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L402
-.L401:
+	cbnz	r3, .L389
+.L388:
 	.loc 1 92 0 discriminator 3
 	movs	r2, #92
-	ldr	r1, .L417+4
+	ldr	r1, .L404+4
 	mov	r0, fp
 	bl	printf
-.LVL568:
-.L402:
+.LVL558:
+.L389:
 	.loc 1 94 0 is_stmt 1
-	ldr	r6, .L417+8
+	ldr	r6, .L404+8
 	.loc 1 93 0
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL569:
+.LVL559:
 	.loc 1 94 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
@@ -5828,17 +5704,17 @@ FlashReadPages:
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	ldr	r7, [r6, #12]
 	blx	r7
-.LVL570:
+.LVL560:
 	.loc 1 99 0
 	ldrh	r3, [r10, #14]
 	.loc 1 98 0
 	str	r0, [r4]
 	.loc 1 99 0
 	cmp	r3, #4
-	bne	.L404
+	bne	.L391
 	.loc 1 100 0
 	ldr	r0, [sp, #4]
-.LVL571:
+.LVL561:
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
@@ -5848,42 +5724,42 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r6
-.LVL572:
+.LVL562:
 	.loc 1 104 0
 	adds	r0, r0, #1
-.LVL573:
-	beq	.L405
+.LVL563:
+	beq	.L392
 	.loc 1 105 0 discriminator 1
 	ldr	r3, [r4, #12]
 	.loc 1 104 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L404
+	bne	.L391
 	.loc 1 105 0
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L404
+	bne	.L391
 	.loc 1 106 0
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L404
-.L405:
+	beq	.L391
+.L392:
 	.loc 1 108 0
 	mov	r3, #-1
 	str	r3, [r4]
-.LVL574:
-.L404:
+.LVL564:
+.L391:
 	.loc 1 91 0 discriminator 2
 	adds	r5, r5, #1
-.LVL575:
+.LVL565:
 	adds	r4, r4, #20
-	b	.L400
-.L418:
+	b	.L387
+.L405:
 	.align	2
-.L417:
+.L404:
 	.word	.LANCHOR0
-	.word	.LANCHOR106
-	.word	.LANCHOR107
+	.word	.LANCHOR104
+	.word	.LANCHOR105
 	.word	.LC1
 	.cfi_endproc
 .LFE344:
@@ -5903,7 +5779,7 @@ FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 4 286 0
-	ldr	r3, .L429
+	ldr	r3, .L416
 	.loc 4 279 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -5918,54 +5794,54 @@ FtlLoadFactoryBbt:
 	.loc 4 289 0
 	movs	r6, #0
 	.loc 4 286 0
-	ldr	r5, .L429+4
+	ldr	r5, .L416+4
 	ldr	r3, [r3]
-	ldr	r7, .L429+8
+	ldr	r7, .L416+8
 	.loc 4 291 0
-	ldr	r10, .L429+20
+	ldr	r10, .L416+20
 	.loc 4 286 0
 	str	r3, [r5, #8]
 	.loc 4 287 0
-	ldr	r3, .L429+12
+	ldr	r3, .L416+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.LVL576:
-.L420:
+.LVL566:
+.L407:
 	.loc 4 289 0 discriminator 1
-	ldr	r3, .L429+16
+	ldr	r3, .L416+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L425
+	bcc	.L412
 	.loc 4 314 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL577:
-.L425:
+.LVL567:
+.L412:
 	.loc 4 291 0
 	ldrh	r4, [r10]
 	.loc 4 290 0
 	movw	r3, #65535
 	.loc 4 294 0
-	ldr	fp, .L429+4
+	ldr	fp, .L416+4
 	.loc 4 290 0
 	strh	r3, [r7, #2]!	@ movhi
 	.loc 4 291 0
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL578:
-.L421:
+.LVL568:
+.L408:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L423
-.LVL579:
+	bgt	.L410
+.LVL569:
 	.loc 4 292 0 is_stmt 1
 	mla	r3, r6, r3, r4
-.LVL580:
+.LVL570:
 	.loc 4 294 0
 	movs	r2, #1
-.LVL581:
+.LVL571:
 	mov	r1, r2
 	mov	r0, fp
 	.loc 4 292 0
@@ -5974,37 +5850,37 @@ FtlLoadFactoryBbt:
 	str	r3, [r5, #4]
 	.loc 4 294 0
 	bl	FlashReadPages
-.LVL582:
+.LVL572:
 	.loc 4 295 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L422
+	beq	.L409
 	.loc 4 301 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L422
+	bne	.L409
 	.loc 4 303 0
 	strh	r4, [r7]	@ movhi
-.L423:
+.L410:
 	.loc 4 289 0 discriminator 2
 	adds	r6, r6, #1
-.LVL583:
-	b	.L420
-.L422:
+.LVL573:
+	b	.L407
+.L409:
 	.loc 4 291 0 discriminator 2
 	subs	r4, r4, #1
-.LVL584:
+.LVL574:
 	uxth	r4, r4
-.LVL585:
-	b	.L421
-.L430:
+.LVL575:
+	b	.L408
+.L417:
 	.align	2
-.L429:
-	.word	.LANCHOR39
-	.word	.LANCHOR108
+.L416:
+	.word	.LANCHOR107
+	.word	.LANCHOR106
 	.word	.LANCHOR37+10
-	.word	.LANCHOR109
+	.word	.LANCHOR108
 	.word	.LANCHOR10
 	.word	.LANCHOR17
 	.cfi_endproc
@@ -6024,7 +5900,7 @@ FtlGetLastWrittenPage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL586:
+.LVL576:
 	.loc 2 51 0
 	cmp	r1, #1
 	.loc 2 47 0
@@ -6038,7 +5914,7 @@ FtlGetLastWrittenPage:
 	.cfi_offset 14, -4
 	.loc 2 51 0
 	it	eq
-	ldreq	r3, .L440
+	ldreq	r3, .L427
 	.loc 2 47 0
 	sub	sp, sp, #88
 	.cfi_def_cfa_offset 112
@@ -6048,48 +5924,48 @@ FtlGetLastWrittenPage:
 	mov	r2, r1
 	.loc 2 51 0
 	it	ne
-	ldrne	r3, .L440+4
+	ldrne	r3, .L427+4
 	.loc 2 47 0
 	mov	r6, r1
 	.loc 2 58 0
 	add	r0, sp, #4
-.LVL587:
+.LVL577:
 	movs	r1, #1
-.LVL588:
+.LVL578:
 	.loc 2 51 0
 	ldrh	r5, [r3]
-.LVL589:
+.LVL579:
 	.loc 2 53 0
-	ldr	r3, .L440+8
+	ldr	r3, .L427+8
 	.loc 2 56 0
 	subs	r5, r5, #1
-.LVL590:
+.LVL580:
 	sxth	r5, r5
-.LVL591:
+.LVL581:
 	.loc 2 53 0
 	str	r3, [sp, #12]
 	.loc 2 54 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-.LVL592:
+.LVL582:
 	.loc 2 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
 	.loc 2 58 0
 	bl	FlashReadPages
-.LVL593:
+.LVL583:
 	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L434
+	bne	.L421
 	mov	r8, #0
-.LVL594:
-.L435:
+.LVL584:
+.L422:
 	.loc 2 60 0
 	cmp	r8, r5
-	ble	.L438
-.LVL595:
-.L434:
+	ble	.L425
+.LVL585:
+.L421:
 	.loc 2 73 0
 	mov	r0, r5
 	add	sp, sp, #88
@@ -6097,8 +5973,8 @@ FtlGetLastWrittenPage:
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL596:
-.L438:
+.LVL586:
+.L425:
 	.cfi_restore_state
 	.loc 2 61 0
 	add	r3, r8, r5
@@ -6111,39 +5987,39 @@ FtlGetLastWrittenPage:
 	add	r0, sp, #4
 	.loc 2 61 0
 	asrs	r4, r3, #1
-.LVL597:
+.LVL587:
 	.loc 2 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
 	.loc 2 63 0
 	bl	FlashReadPages
-.LVL598:
+.LVL588:
 	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L436
+	bne	.L423
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L436
+	bne	.L423
 	.loc 2 66 0 is_stmt 1
 	subs	r4, r4, #1
-.LVL599:
+.LVL589:
 	sxth	r5, r4
-.LVL600:
-	b	.L435
-.LVL601:
-.L436:
+.LVL590:
+	b	.L422
+.LVL591:
+.L423:
 	.loc 2 68 0
 	adds	r4, r4, #1
-.LVL602:
+.LVL592:
 	sxth	r8, r4
-.LVL603:
-	b	.L435
-.L441:
+.LVL593:
+	b	.L422
+.L428:
 	.align	2
-.L440:
+.L427:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	ftl_temp_buf
@@ -6164,7 +6040,7 @@ FlashProgPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL604:
+.LVL594:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -6183,78 +6059,78 @@ FlashProgPages:
 	mov	r7, r2
 	mov	r4, r0
 	.loc 1 117 0
-	ldr	r3, .L472
-.LVL605:
+	ldr	r3, .L459
+.LVL595:
 	.loc 1 121 0
 	mov	r5, r0
 	movs	r6, #0
 	.loc 1 117 0
 	ldrh	r8, [r3, #12]
-.LVL606:
+.LVL596:
 	str	r3, [sp, #4]
-.LVL607:
-.L443:
+.LVL597:
+.L430:
 	.loc 1 121 0 discriminator 1
 	cmp	r6, r10
-	bne	.L451
+	bne	.L438
 	.loc 1 142 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	bne	.L458
-.LVL608:
-.L471:
+	bne	.L445
+.LVL598:
+.L458:
 	.loc 1 172 0
 	movs	r0, #0
 	add	sp, sp, #40
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL609:
+.LVL599:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL610:
-.L451:
+.LVL600:
+.L438:
 	.cfi_restore_state
 	.loc 1 122 0
 	ldr	r3, [r5, #8]
-	cbz	r3, .L444
+	cbz	r3, .L431
 	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L445
-.L444:
+	cbnz	r3, .L432
+.L431:
 	.loc 1 122 0 discriminator 3
 	movs	r2, #122
-	ldr	r1, .L472+4
-	ldr	r0, .L472+8
+	ldr	r1, .L459+4
+	ldr	r0, .L459+8
 	bl	printf
-.LVL611:
-.L445:
+.LVL601:
+.L432:
 	.loc 1 123 0 is_stmt 1
 	add	r2, sp, #12
 	add	r1, sp, #16
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL612:
+.LVL602:
 	.loc 1 124 0
-	ldr	r3, .L472+12
+	ldr	r3, .L459+12
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	ldr	fp, [r3, #8]
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r3, [r5, #12]
 	blx	fp
-.LVL613:
+.LVL603:
 	.loc 1 129 0
-	cbnz	r0, .L446
+	cbnz	r0, .L433
 	.loc 1 128 0
 	str	r0, [r5]
-.L447:
+.L434:
 	.loc 1 132 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L449
+	bne	.L436
 	.loc 1 133 0
-	ldr	r1, .L472+12
+	ldr	r1, .L459+12
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	fp, [r1, #8]
@@ -6262,29 +6138,29 @@ FlashProgPages:
 	adds	r3, r3, #8
 	add	r2, r2, #2048
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-.LVL614:
+.LVL604:
 	add	r1, r1, r8
 	blx	fp
-.LVL615:
+.LVL605:
 	.loc 1 137 0
-	cbz	r0, .L449
+	cbz	r0, .L436
 	.loc 1 138 0
 	mov	r3, #-1
 	str	r3, [r5]
-.L449:
+.L436:
 	.loc 1 121 0 discriminator 2
 	adds	r6, r6, #1
-.LVL616:
+.LVL606:
 	adds	r5, r5, #20
-	b	.L443
-.L446:
+	b	.L430
+.L433:
 	.loc 1 130 0
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L447
-.LVL617:
-.L456:
-.LBB223:
+	b	.L434
+.LVL607:
+.L443:
+.LBB237:
 	.loc 1 147 0
 	movs	r3, #0
 	.loc 1 153 0
@@ -6307,88 +6183,88 @@ FlashProgPages:
 	str	r3, [sp, #24]
 	.loc 1 153 0
 	bl	FlashReadPages
-.LVL618:
+.LVL608:
 	.loc 1 154 0
 	ldr	fp, [sp, #20]
 	cmp	fp, #-1
-	bne	.L453
+	bne	.L440
 	.loc 1 155 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+16
+	ldr	r0, .L459+16
 	bl	printf
-.LVL619:
+.LVL609:
 	.loc 1 156 0
 	str	fp, [r4]
-.L453:
+.L440:
 	.loc 1 158 0
 	ldr	r3, [r4, #12]
-	cbz	r3, .L454
+	cbz	r3, .L441
 	.loc 1 159 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L454
+	beq	.L441
 	.loc 1 160 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+20
+	ldr	r0, .L459+20
 	bl	printf
-.LVL620:
+.LVL610:
 	.loc 1 161 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L454:
+.L441:
 	.loc 1 164 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L455
+	cbz	r3, .L442
 	.loc 1 165 0
 	ldr	r2, [r3]
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L455
+	beq	.L442
 	.loc 1 166 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L472+24
+	ldr	r0, .L459+24
 	bl	printf
-.LVL621:
+.LVL611:
 	.loc 1 167 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L455:
-.LBE223:
+.L442:
+.LBE237:
 	.loc 1 144 0 discriminator 2
 	adds	r5, r5, #1
-.LVL622:
+.LVL612:
 	adds	r4, r4, #20
-.LVL623:
-.L452:
+.LVL613:
+.L439:
 	.loc 1 144 0 is_stmt 0 discriminator 1
 	cmp	r6, r5
-	bne	.L456
-	b	.L471
-.LVL624:
-.L458:
+	bne	.L443
+	b	.L458
+.LVL614:
+.L445:
 	movs	r5, #0
-.LBB224:
+.LBB238:
 	.loc 1 147 0 is_stmt 1
-	ldr	r8, .L472+28
-.LVL625:
+	ldr	r8, .L459+28
+.LVL615:
 	.loc 1 148 0
-	ldr	r10, .L472+32
-.LVL626:
-	b	.L452
-.L473:
+	ldr	r10, .L459+32
+.LVL616:
+	b	.L439
+.L460:
 	.align	2
-.L472:
+.L459:
 	.word	.LANCHOR0
-	.word	.LANCHOR110
+	.word	.LANCHOR109
 	.word	.LC1
-	.word	.LANCHOR107
+	.word	.LANCHOR105
 	.word	.LC79
 	.word	.LC80
 	.word	.LC81
 	.word	check_buf
-	.word	.LANCHOR111
-.LBE224:
+	.word	.LANCHOR110
+.LBE238:
 	.cfi_endproc
 .LFE345:
 	.size	FlashProgPages, .-FlashProgPages
@@ -6406,7 +6282,7 @@ FlashEraseBlocks:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL627:
+.LVL617:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -28
@@ -6419,19 +6295,19 @@ FlashEraseBlocks:
 	.loc 1 175 0
 	mov	r7, r2
 	.loc 1 178 0
-	ldr	r5, .L485
+	ldr	r5, .L472
 	adds	r4, r0, #4
 	.loc 1 181 0
 	movs	r6, #0
 	.loc 1 183 0
-	ldr	r10, .L485+4
+	ldr	r10, .L472+4
 	.loc 1 178 0
 	ldrh	r8, [r5, #12]
-.LVL628:
-.L475:
+.LVL618:
+.L462:
 	.loc 1 181 0 discriminator 1
 	cmp	r6, r7
-	bne	.L481
+	bne	.L468
 	.loc 1 194 0
 	movs	r0, #0
 	add	sp, sp, #12
@@ -6439,59 +6315,59 @@ FlashEraseBlocks:
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL629:
-.L481:
+.LVL619:
+.L468:
 	.cfi_restore_state
 	.loc 1 182 0
 	add	r1, sp, #4
 	mov	r2, sp
 	ldr	r0, [r4]
 	bl	l2p_addr_tran.isra.0
-.LVL630:
+.LVL620:
 	.loc 1 183 0
 	ldr	r3, [r10, #4]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL631:
+.LVL621:
 	.loc 1 185 0
-	cbnz	r0, .L476
+	cbnz	r0, .L463
 	.loc 1 184 0
 	str	r0, [r4, #-4]
-.L477:
+.L464:
 	.loc 1 187 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L479
+	bne	.L466
 	.loc 1 188 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r10, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-.LVL632:
+.LVL622:
 	add	r1, r1, r8
 	blx	r3
-.LVL633:
+.LVL623:
 	.loc 1 189 0
-	cbz	r0, .L479
+	cbz	r0, .L466
 	.loc 1 190 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-.L479:
+.L466:
 	.loc 1 181 0 discriminator 2
 	adds	r6, r6, #1
-.LVL634:
+.LVL624:
 	adds	r4, r4, #20
-	b	.L475
-.L476:
+	b	.L462
+.L463:
 	.loc 1 186 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-	b	.L477
-.L486:
+	b	.L464
+.L473:
 	.align	2
-.L485:
+.L472:
 	.word	.LANCHOR0
-	.word	.LANCHOR107
+	.word	.LANCHOR105
 	.cfi_endproc
 .LFE346:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -6509,7 +6385,12 @@ FtlFreeSysBlkQueueIn:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL635:
+.LVL625:
+	.loc 2 99 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 2 98 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -6518,78 +6399,83 @@ FtlFreeSysBlkQueueIn:
 	.cfi_offset 14, -4
 	.loc 2 98 0
 	mov	r5, r0
-.LBB225:
-.LBB226:
-	.loc 2 94 0
-	ldr	r4, .L496
-.LBE226:
-.LBE225:
 	.loc 2 99 0
+	cmp	r3, r2
+	bhi	.L474
+.LBB247:
+.LBB248:
+	.loc 2 94 0
+	ldr	r4, .L483
+.LBE248:
+.LBE247:
+	.loc 2 101 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L487
-.LVL636:
-.LBB227:
-	.loc 2 101 0
-	cbz	r1, .L489
-.LBB228:
-	.loc 2 102 0
-	bl	P2V_block_in_plane
-.LVL637:
+	beq	.L474
+.LVL626:
+.LBB249:
+.LBB250:
 	.loc 2 103 0
-	ldr	r3, .L496+4
-	.loc 2 102 0
-	mov	r6, r0
-.LVL638:
+	cbz	r1, .L476
+.LBB251:
+	.loc 2 104 0
+	bl	P2V_block_in_plane
+.LVL627:
+	.loc 2 105 0
+	ldr	r3, .L483+4
 	.loc 2 104 0
+	mov	r6, r0
+.LVL628:
+	.loc 2 106 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 103 0
+	.loc 2 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
-	.loc 2 104 0
+	.loc 2 106 0
 	bl	FlashEraseBlocks
-.LVL639:
-	.loc 2 105 0
-	ldr	r3, .L496+8
+.LVL629:
+	.loc 2 107 0
+	ldr	r3, .L483+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	.loc 2 106 0
-	ldr	r2, .L496+12
+	.loc 2 108 0
+	ldr	r2, .L483+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL640:
-.L489:
-.LBE228:
-	.loc 2 108 0
+.LVL630:
+.L476:
+.LBE251:
+	.loc 2 110 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	.loc 2 109 0
+	.loc 2 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
-	.loc 2 110 0
+	.loc 2 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	.loc 2 109 0
+	.loc 2 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
-	.loc 2 110 0
+	.loc 2 112 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL641:
-.L487:
+.LVL631:
+.L474:
 	pop	{r4, r5, r6, pc}
-.L497:
+.L484:
 	.align	2
-.L496:
+.L483:
 	.word	.LANCHOR38
-	.word	.LANCHOR112
-	.word	.LANCHOR40
-	.word	.LANCHOR76
-.LBE227:
+	.word	.LANCHOR111
+	.word	.LANCHOR43
+	.word	.LANCHOR75
+.LBE250:
+.LBE249:
 	.cfi_endproc
 .LFE243:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -6607,9 +6493,9 @@ FtlLowFormatEraseBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL642:
+.LVL632:
 	.loc 3 538 0
-	ldr	r3, .L541
+	ldr	r3, .L528
 	.loc 3 528 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -6624,7 +6510,7 @@ FtlLowFormatEraseBlock:
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
 	.loc 3 540 0
-	ldr	r6, .L541+4
+	ldr	r6, .L528+4
 	.loc 3 539 0
 	mov	fp, #0
 	.loc 3 536 0
@@ -6633,11 +6519,11 @@ FtlLowFormatEraseBlock:
 	mov	r4, fp
 	.loc 3 538 0
 	str	r0, [r3]
-.LVL643:
+.LVL633:
 	.loc 3 540 0
 	mov	r10, #20
 	.loc 3 539 0
-	ldr	r3, .L541+8
+	ldr	r3, .L528+8
 	.loc 3 540 0
 	ldr	r8, [r6]
 	.loc 3 528 0
@@ -6649,26 +6535,26 @@ FtlLowFormatEraseBlock:
 	.loc 3 539 0
 	str	r3, [sp, #8]
 	.loc 3 550 0
-	ldr	r3, .L541+12
+	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
 	.loc 3 551 0
-	ldr	r3, .L541+16
+	ldr	r3, .L528+16
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L541+20
+	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
-.LVL644:
-.L499:
+.LVL634:
+.L486:
 	.loc 3 539 0 discriminator 1
 	ldr	r3, [sp, #8]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L503
+	bhi	.L490
 	.loc 3 559 0
 	cmp	r5, #0
-	beq	.L498
+	beq	.L485
 	.loc 3 562 0
 	mov	r0, r8
 	.loc 3 563 0
@@ -6679,34 +6565,34 @@ FtlLowFormatEraseBlock:
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.LVL645:
-.L506:
+.LVL635:
+.L493:
 	.loc 3 563 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L508
+	bhi	.L495
 	.loc 3 571 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	beq	.L524
-.LVL646:
+	beq	.L511
+.LVL636:
 	.loc 3 573 0
-	ldr	r3, .L541+24
+	ldr	r3, .L528+24
 	.loc 3 572 0
 	mov	r8, #1
 	.loc 3 573 0
 	ldrh	r10, [r3]
-.LVL647:
+.LVL637:
 	.loc 3 574 0
 	lsr	r3, r10, #2
 	str	r3, [sp, #12]
-.LVL648:
-.L509:
+.LVL638:
+.L496:
 	movs	r6, #0
-.LVL649:
-.L518:
+.LVL639:
+.L505:
 	.loc 3 578 0
-	ldr	r3, .L541+8
+	ldr	r3, .L528+8
 	mov	fp, #0
 	.loc 3 577 0
 	mov	r5, fp
@@ -6714,88 +6600,88 @@ FtlLowFormatEraseBlock:
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 3 579 0
-	ldr	r3, .L541+4
+	ldr	r3, .L528+4
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	.loc 3 587 0
-	ldr	r3, .L541+28
+	ldr	r3, .L528+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	.loc 3 588 0
-	ldr	r3, .L541+12
+	ldr	r3, .L528+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L541+20
+	ldr	r3, .L528+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL650:
-.L510:
+.LVL640:
+.L497:
 	.loc 3 578 0 discriminator 1
 	ldr	r3, [sp, #16]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L513
+	bhi	.L500
 	.loc 3 593 0
-	cbz	r5, .L498
+	cbz	r5, .L485
 	.loc 3 598 0
-	ldr	fp, .L541+4
-.LVL651:
+	ldr	fp, .L528+4
+.LVL641:
 	.loc 3 596 0
 	movs	r3, #1
 	mov	r2, r8
-.LVL652:
+.LVL642:
 	mov	r1, r5
 	ldr	r0, [sp, #8]
 	.loc 3 597 0
 	movs	r7, #0
 	.loc 3 596 0
 	bl	FlashProgPages
-.LVL653:
+.LVL643:
 	.loc 3 598 0
 	movs	r3, #20
-.LVL654:
-.L515:
+.LVL644:
+.L502:
 	.loc 3 597 0 discriminator 1
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L517
+	bhi	.L504
 	.loc 3 604 0
 	ldr	r3, [sp, #12]
 	add	r6, r6, r3
-.LVL655:
+.LVL645:
 	uxth	r6, r6
-.LVL656:
+.LVL646:
 	.loc 3 605 0
 	cmp	r10, r6
-	bhi	.L518
+	bhi	.L505
 	.loc 3 611 0 discriminator 1
-	ldr	r7, .L541+4
-.LVL657:
+	ldr	r7, .L528+4
+.LVL647:
 	movs	r6, #0
-.LVL658:
+.LVL648:
 	mov	r10, #20
-.LVL659:
-.L519:
+.LVL649:
+.L506:
 	.loc 3 610 0 discriminator 1
 	uxth	r3, r6
 	cmp	r5, r3
-	bhi	.L521
+	bhi	.L508
 	.loc 3 615 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L522
+	bls	.L509
 	.loc 3 615 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp]
-	cbz	r3, .L498
-.L522:
+	cbz	r3, .L485
+.L509:
 	.loc 3 616 0 is_stmt 1
-	ldr	r3, .L541+4
+	ldr	r3, .L528+4
 	mov	r2, r5
 	mov	r1, r8
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.LVL660:
-.L498:
+.LVL650:
+.L485:
 	.loc 3 619 0
 	mov	r0, r4
 	add	sp, sp, #32
@@ -6803,8 +6689,8 @@ FtlLowFormatEraseBlock:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL661:
-.L503:
+.LVL651:
+.L490:
 	.cfi_restore_state
 	.loc 3 540 0
 	mul	r2, r10, fp
@@ -6814,27 +6700,27 @@ FtlLowFormatEraseBlock:
 	.loc 3 540 0
 	str	r3, [r8, r2]
 	.loc 3 541 0
-	ldr	r3, .L541+32
+	ldr	r3, .L528+32
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL662:
+.LVL652:
 	.loc 3 543 0
 	ldr	r3, [sp]
 	.loc 3 541 0
 	mov	r7, r0
-.LVL663:
+.LVL653:
 	.loc 3 543 0
-	cbz	r3, .L500
+	cbz	r3, .L487
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL664:
-	cbnz	r0, .L501
-.L500:
+.LVL654:
+	cbnz	r0, .L488
+.L487:
 	.loc 3 548 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL665:
-	cbnz	r0, .L502
+.LVL655:
+	cbnz	r0, .L489
 	.loc 3 549 0
 	mla	r1, r10, r5, r8
 	.loc 3 550 0
@@ -6852,52 +6738,52 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #16]
 	.loc 3 552 0
 	adds	r5, r5, #1
-.LVL666:
+.LVL656:
 	uxth	r5, r5
-.LVL667:
+.LVL657:
 	.loc 3 551 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L501:
-.LVL668:
+.L488:
+.LVL658:
 	add	fp, fp, #1
-.LVL669:
-	b	.L499
-.LVL670:
-.L502:
+.LVL659:
+	b	.L486
+.LVL660:
+.L489:
 	.loc 3 554 0
 	adds	r4, r4, #1
-.LVL671:
+.LVL661:
 	uxth	r4, r4
-.LVL672:
-	b	.L501
-.LVL673:
-.L508:
+.LVL662:
+	b	.L488
+.LVL663:
+.L495:
 	.loc 3 564 0
 	mul	r3, r8, r7
 	ldr	r2, [r6]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L507
+	bne	.L494
 	.loc 3 566 0
 	ldr	r0, [r1, #4]
 	.loc 3 565 0
 	adds	r4, r4, #1
-.LVL674:
+.LVL664:
 	uxth	r4, r4
-.LVL675:
+.LVL665:
 	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL676:
-.L507:
+.LVL666:
+.L494:
 	adds	r7, r7, #1
-.LVL677:
-	b	.L506
-.LVL678:
-.L524:
+.LVL667:
+	b	.L493
+.LVL668:
+.L511:
 	.loc 3 533 0
 	movs	r3, #6
 	.loc 3 534 0
@@ -6906,9 +6792,9 @@ FtlLowFormatEraseBlock:
 	str	r3, [sp, #12]
 	.loc 3 531 0
 	mov	r10, #1
-	b	.L509
-.LVL679:
-.L513:
+	b	.L496
+.LVL669:
+.L500:
 	.loc 3 579 0
 	movs	r3, #20
 	mul	r2, r3, fp
@@ -6917,28 +6803,28 @@ FtlLowFormatEraseBlock:
 	movs	r3, #0
 	str	r3, [r1, r2]
 	.loc 3 580 0
-	ldr	r3, .L541+32
+	ldr	r3, .L528+32
 	ldr	r1, [sp, #4]
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL680:
+.LVL670:
 	.loc 3 581 0
 	ldr	r3, [sp]
 	.loc 3 580 0
 	mov	r7, r0
-.LVL681:
+.LVL671:
 	.loc 3 581 0
-	cbz	r3, .L511
+	cbz	r3, .L498
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL682:
-	cbnz	r0, .L512
-.L511:
+.LVL672:
+	cbnz	r0, .L499
+.L498:
 	.loc 3 585 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL683:
-	cbnz	r0, .L512
+.LVL673:
+	cbnz	r0, .L499
 	.loc 3 586 0
 	ldr	r3, [sp, #8]
 	movs	r2, #20
@@ -6956,654 +6842,891 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #24]
 	.loc 3 589 0
 	adds	r5, r5, #1
-.LVL684:
+.LVL674:
 	uxth	r5, r5
-.LVL685:
+.LVL675:
 	.loc 3 588 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L512:
-.LVL686:
+.L499:
+.LVL676:
 	add	fp, fp, #1
-.LVL687:
-	b	.L510
-.LVL688:
-.L517:
+.LVL677:
+	b	.L497
+.LVL678:
+.L504:
 	.loc 3 598 0
 	mul	r2, r3, r7
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L516
+	cbz	r2, .L503
 	.loc 3 600 0
 	ldr	r0, [r0, #4]
 	.loc 3 599 0
 	adds	r4, r4, #1
-.LVL689:
+.LVL679:
 	str	r3, [sp, #8]
 	uxth	r4, r4
-.LVL690:
+.LVL680:
 	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL691:
+.LVL681:
 	ldr	r3, [sp, #8]
-.L516:
-.LVL692:
+.L503:
+.LVL682:
 	adds	r7, r7, #1
-.LVL693:
-	b	.L515
-.LVL694:
-.L521:
+.LVL683:
+	b	.L502
+.LVL684:
+.L508:
 	.loc 3 611 0
 	ldr	r3, [sp]
-	cbz	r3, .L520
+	cbz	r3, .L507
 	.loc 3 611 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r6
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L520
+	cbnz	r3, .L507
 	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL695:
-.L520:
+.LVL685:
+.L507:
 	adds	r6, r6, #1
-.LVL696:
-	b	.L519
-.L542:
+.LVL686:
+	b	.L506
+.L529:
 	.align	2
-.L541:
-	.word	.LANCHOR113
+.L528:
 	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR3
+	.word	.LANCHOR113
 	.word	.LANCHOR114
-	.word	.LANCHOR115
 	.word	.LANCHOR24
 	.word	.LANCHOR20
-	.word	.LANCHOR116
+	.word	.LANCHOR115
 	.word	.LANCHOR13
 	.cfi_endproc
 .LFE212:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.ftl_memset,"ax",%progbits
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	ftl_memset
+	.global	FtlFreeSysBlkQueueOut
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_memset, %function
-ftl_memset:
-.LFB349:
-	.loc 1 242 0
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB246:
+	.loc 2 181 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-.LVL697:
-	.loc 1 243 0
-	b	memset
-.LVL698:
+.LVL687:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+.LBB252:
+.LBB253:
+	.loc 2 89 0
+	ldr	r4, .L537
+.LBE253:
+.LBE252:
+.LBB255:
+	.loc 2 192 0
+	ldr	r6, .L537+4
+.LVL688:
+.L531:
+.LBE255:
+.LBB256:
+.LBB254:
+	.loc 2 89 0
+	ldrh	r1, [r4, #6]
+.LBE254:
+.LBE256:
+	.loc 2 186 0
+	cbz	r1, .L532
+	.loc 2 187 0
+	ldrh	r3, [r4, #2]
+	.loc 2 188 0
+	subs	r1, r1, #1
+	strh	r1, [r4, #6]	@ movhi
+	.loc 2 187 0
+	adds	r2, r3, #4
+	.loc 2 189 0
+	adds	r3, r3, #1
+	.loc 2 187 0
+	ldrh	r5, [r4, r2, lsl #1]
+.LVL689:
+	.loc 2 189 0
+	ubfx	r3, r3, #0, #10
+	strh	r3, [r4, #2]	@ movhi
+.LBB257:
+	.loc 2 191 0
+	mov	r0, r5
+	bl	P2V_block_in_plane
+.LVL690:
+	mov	r7, r0
+.LVL691:
+	.loc 2 192 0
+	ldr	r0, [r6]
+	lsls	r3, r5, #10
+	.loc 2 193 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 192 0
+	str	r3, [r0, #4]
+	.loc 2 193 0
+	bl	FlashEraseBlocks
+.LVL692:
+	.loc 2 194 0
+	ldr	r3, .L537+8
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r7, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	.loc 2 195 0
+	ldr	r2, .L537+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.LBE257:
+	.loc 2 202 0
+	subs	r3, r5, #1
+	uxth	r3, r3
+	movw	r2, #65533
+	cmp	r3, r2
+	bhi	.L533
+	.loc 2 208 0
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL693:
+.L532:
+	.loc 2 199 0
+	ldr	r0, .L537+16
+	bl	printf
+.LVL694:
+.L535:
+	b	.L535
+.LVL695:
+.L533:
+	.loc 2 203 0
+	ldrh	r2, [r4, #6]
+	mov	r1, r5
+	ldr	r0, .L537+20
+	bl	printf
+.LVL696:
+	.loc 2 205 0
+	b	.L531
+.L538:
+	.align	2
+.L537:
+	.word	.LANCHOR38
+	.word	.LANCHOR111
+	.word	.LANCHOR43
+	.word	.LANCHOR75
+	.word	.LC82
+	.word	.LC83
 	.cfi_endproc
-.LFE349:
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.FtlMemInit,"ax",%progbits
+.LFE246:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	ftl_map_blk_alloc_new_blk
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlMemInit, %function
-FtlMemInit:
-.LFB209:
-	.loc 3 279 0
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB258:
+	.loc 2 562 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 3 282 0
-	movs	r1, #0
-	ldr	r3, .L645
-	.loc 3 311 0
-	mov	r8, #12
-	.loc 3 297 0
-	ldr	r2, .L645+4
-	.loc 3 282 0
-	str	r1, [r3]
+.LVL697:
+	.loc 2 566 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	.loc 2 562 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 562 0
+	mov	r4, r0
+	.loc 2 566 0
+	movs	r3, #0
+.LVL698:
+.L540:
+	uxth	r5, r3
+.LVL699:
+	.loc 2 566 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bcs	.L543
+	.loc 2 567 0 is_stmt 1
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L540
+	.loc 2 568 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL700:
+	.loc 2 569 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 2 568 0
+	mov	r1, r0
+	strh	r0, [r7]	@ movhi
+	.loc 2 569 0
+	cmp	r3, r2
+	bls	.L541
+	.loc 2 570 0
+	ldr	r3, .L547
+	ldr	r0, .L547+4
+	ldrh	r2, [r3, #6]
+	bl	printf
+.LVL701:
+.L542:
+	b	.L542
+.L541:
+	.loc 2 576 0
+	ldr	r3, [r4, #28]
+	.loc 2 574 0
+	strh	r6, [r4, #2]	@ movhi
+	.loc 2 575 0
+	strh	r5, [r4]	@ movhi
+	.loc 2 576 0
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	.loc 2 577 0
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L543:
+	.loc 2 581 0
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L545
+.LVL702:
+.LBB260:
+.LBB261:
+	movw	r2, #581
+	ldr	r1, .L547+8
+	ldr	r0, .L547+12
+	bl	printf
+.LVL703:
+.L545:
+.LBE261:
+.LBE260:
+	.loc 2 583 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL704:
+.L548:
+	.align	2
+.L547:
+	.word	.LANCHOR38
+	.word	.LC84
+	.word	.LANCHOR116
+	.word	.LC1
+	.cfi_endproc
+.LFE258:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memset, %function
+ftl_memset:
+.LFB349:
+	.loc 1 242 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL705:
+	.loc 1 243 0
+	b	memset
+.LVL706:
+	.cfi_endproc
+.LFE349:
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
+	.align	1
+	.global	FtlMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMemInit, %function
+FtlMemInit:
+.LFB209:
+	.loc 3 280 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	.loc 3 283 0
-	ldr	r3, .L645+8
-	.loc 3 310 0
-	ldr	r4, .L645+12
-	.loc 3 307 0
-	str	r1, [sp, #4]
+	movs	r1, #0
+	ldr	r3, .L651
+	.loc 3 312 0
+	mov	r8, #12
+	.loc 3 298 0
+	ldr	r2, .L651+4
 	.loc 3 283 0
 	str	r1, [r3]
 	.loc 3 284 0
-	ldr	r3, .L645+16
-	.loc 3 310 0
-	ldrh	r0, [r4]
-	.loc 3 312 0
-	ldr	fp, .L645+288
+	ldr	r3, .L651+8
+	.loc 3 311 0
+	ldr	r4, .L651+12
+	.loc 3 308 0
+	str	r1, [sp, #4]
 	.loc 3 284 0
 	str	r1, [r3]
 	.loc 3 285 0
-	ldr	r3, .L645+20
-	.loc 3 310 0
-	lsls	r0, r0, #1
-	.loc 3 316 0
-	ldr	r10, .L645+292
-	.loc 3 320 0
-	ldr	r5, .L645+24
+	ldr	r3, .L651+16
+	.loc 3 311 0
+	ldrh	r0, [r4]
+	.loc 3 313 0
+	ldr	fp, .L651+288
 	.loc 3 285 0
 	str	r1, [r3]
 	.loc 3 286 0
-	ldr	r3, .L645+28
-	.loc 3 323 0
-	ldr	r7, .L645+32
+	ldr	r3, .L651+20
+	.loc 3 311 0
+	lsls	r0, r0, #1
+	.loc 3 317 0
+	ldr	r10, .L651+292
+	.loc 3 321 0
+	ldr	r5, .L651+24
 	.loc 3 286 0
 	str	r1, [r3]
 	.loc 3 287 0
-	ldr	r3, .L645+36
+	ldr	r3, .L651+28
+	.loc 3 324 0
+	ldr	r7, .L651+32
+	.loc 3 287 0
 	str	r1, [r3]
 	.loc 3 288 0
-	ldr	r3, .L645+40
+	ldr	r3, .L651+36
 	str	r1, [r3]
 	.loc 3 289 0
-	ldr	r3, .L645+44
+	ldr	r3, .L651+40
 	str	r1, [r3]
 	.loc 3 290 0
-	ldr	r3, .L645+48
+	ldr	r3, .L651+44
 	str	r1, [r3]
 	.loc 3 291 0
-	ldr	r3, .L645+52
+	ldr	r3, .L651+48
 	str	r1, [r3]
 	.loc 3 292 0
-	ldr	r3, .L645+56
+	ldr	r3, .L651+52
 	str	r1, [r3]
 	.loc 3 293 0
-	ldr	r3, .L645+60
+	ldr	r3, .L651+56
 	str	r1, [r3]
 	.loc 3 294 0
-	ldr	r3, .L645+64
+	ldr	r3, .L651+60
 	str	r1, [r3]
 	.loc 3 295 0
-	ldr	r3, .L645+68
+	ldr	r3, .L651+64
 	str	r1, [r3]
 	.loc 3 296 0
-	ldr	r3, .L645+72
+	ldr	r3, .L651+68
 	str	r1, [r3]
 	.loc 3 297 0
+	ldr	r3, .L651+72
+	str	r1, [r3]
+	.loc 3 298 0
 	movw	r3, #65535
 	str	r3, [r2]
-	.loc 3 298 0
-	ldr	r2, .L645+76
-	str	r1, [r2]
 	.loc 3 299 0
-	ldr	r2, .L645+80
+	ldr	r2, .L651+76
 	str	r1, [r2]
 	.loc 3 300 0
-	ldr	r2, .L645+84
+	ldr	r2, .L651+80
 	str	r1, [r2]
 	.loc 3 301 0
-	ldr	r2, .L645+88
-	strh	r3, [r2]	@ movhi
+	ldr	r2, .L651+84
+	str	r1, [r2]
 	.loc 3 302 0
-	ldr	r2, .L645+92
+	ldr	r2, .L651+88
 	strh	r3, [r2]	@ movhi
 	.loc 3 303 0
+	ldr	r2, .L651+92
+	strh	r3, [r2]	@ movhi
+	.loc 3 304 0
 	movs	r2, #32
-	ldr	r3, .L645+96
+	ldr	r3, .L651+96
 	strh	r2, [r3]	@ movhi
-	.loc 3 304 0
+	.loc 3 305 0
 	movs	r2, #128
-	ldr	r3, .L645+100
+	ldr	r3, .L651+100
 	strh	r2, [r3]	@ movhi
-	.loc 3 305 0
-	ldr	r3, .L645+104
-	strh	r1, [r3]	@ movhi
 	.loc 3 306 0
-	ldr	r3, .L645+108
+	ldr	r3, .L651+104
 	strh	r1, [r3]	@ movhi
 	.loc 3 307 0
-	ldr	r3, .L645+112
+	ldr	r3, .L651+108
+	strh	r1, [r3]	@ movhi
+	.loc 3 308 0
+	ldr	r3, .L651+112
 	strh	r1, [r3]	@ movhi
-	.loc 3 310 0
+	.loc 3 311 0
 	bl	ftl_malloc
-.LVL699:
-	ldr	r3, .L645+116
+.LVL707:
+	ldr	r3, .L651+116
 	str	r0, [r3]
-	.loc 3 311 0
-	ldrh	r0, [r4]
 	.loc 3 312 0
+	ldrh	r0, [r4]
+	.loc 3 313 0
 	movs	r4, #20
-	.loc 3 311 0
+	.loc 3 312 0
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL700:
-	.loc 3 312 0
+.LVL708:
+	.loc 3 313 0
 	ldrh	r2, [fp]
-	.loc 3 311 0
-	ldr	r3, .L645+120
 	.loc 3 312 0
+	ldr	r3, .L651+120
+	.loc 3 313 0
 	muls	r4, r2, r4
-.LVL701:
-	.loc 3 311 0
+.LVL709:
+	.loc 3 312 0
 	str	r0, [r3]
-	.loc 3 313 0
+	.loc 3 314 0
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL702:
-	ldr	r3, .L645+124
+.LVL710:
+	ldr	r3, .L651+124
 	str	r0, [r3]
-	.loc 3 314 0
+	.loc 3 315 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL703:
-	ldr	r3, .L645+128
+.LVL711:
+	ldr	r3, .L651+128
 	str	r0, [r3]
-	.loc 3 315 0
+	.loc 3 316 0
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL704:
-	ldr	r3, .L645+132
-	.loc 3 324 0
-	ldr	r6, .L645+136
-	.loc 3 315 0
-	str	r0, [r3]
+.LVL712:
+	ldr	r3, .L651+132
+	.loc 3 325 0
+	ldr	r6, .L651+136
 	.loc 3 316 0
+	str	r0, [r3]
+	.loc 3 317 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL705:
+.LVL713:
 	str	r0, [r10]
-	.loc 3 317 0
+	.loc 3 318 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL706:
-	ldr	r3, .L645+140
-	.loc 3 320 0
+.LVL714:
+	ldr	r3, .L651+140
+	.loc 3 321 0
 	ldrh	r2, [fp]
-	.loc 3 317 0
+	.loc 3 318 0
 	str	r0, [r3]
-	.loc 3 319 0
-	ldr	r3, .L645+144
 	.loc 3 320 0
+	ldr	r3, .L651+144
+	.loc 3 321 0
 	lsls	r2, r2, #1
-	.loc 3 319 0
-	ldrh	r4, [r3]
-.LVL707:
 	.loc 3 320 0
+	ldrh	r4, [r3]
+.LVL715:
+	.loc 3 321 0
 	adds	r2, r2, #1
 	str	r2, [r5]
-	.loc 3 321 0
+	.loc 3 322 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL708:
-	ldr	r3, .L645+148
+.LVL716:
+	ldr	r3, .L651+148
 	str	r0, [r3]
-	.loc 3 322 0
+	.loc 3 323 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL709:
-	ldr	r3, .L645+152
+.LVL717:
+	ldr	r3, .L651+152
 	str	r0, [r3]
-	.loc 3 323 0
+	.loc 3 324 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL710:
+.LVL718:
 	str	r0, [r7]
-	.loc 3 324 0
+	.loc 3 325 0
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-.LVL711:
+.LVL719:
 	str	r0, [r6]
-	.loc 3 325 0
+	.loc 3 326 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL712:
-	ldr	r2, .L645+156
+.LVL720:
+	ldr	r2, .L651+156
 	str	r0, [r2]
-	.loc 3 326 0
+	.loc 3 327 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL713:
-	ldr	r2, .L645+160
-	.loc 3 329 0
-	ldr	r4, .L645+164
-.LVL714:
-	.loc 3 326 0
-	str	r0, [r2]
+.LVL721:
+	ldr	r2, .L651+160
+	.loc 3 330 0
+	ldr	r4, .L651+164
+.LVL722:
 	.loc 3 327 0
+	str	r0, [r2]
+	.loc 3 328 0
 	ldr	r0, [r5]
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL715:
-	ldr	r2, .L645+168
-	.loc 3 329 0
+.LVL723:
+	ldr	r2, .L651+168
+	.loc 3 330 0
 	ldrh	r3, [fp]
-	.loc 3 327 0
+	.loc 3 328 0
 	str	r0, [r2]
-	.loc 3 329 0
+	.loc 3 330 0
 	ldrh	r2, [r4]
 	mul	fp, r3, r2
-.LVL716:
-	.loc 3 330 0
+.LVL724:
+	.loc 3 331 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL717:
-	ldr	r2, .L645+172
+.LVL725:
+	ldr	r2, .L651+172
 	str	r0, [r2]
-	.loc 3 331 0
+	.loc 3 332 0
 	lsl	r0, fp, #2
 	bl	ftl_malloc
-.LVL718:
-	ldr	r3, .L645+176
+.LVL726:
+	ldr	r3, .L651+176
 	str	r0, [r3]
-	.loc 3 332 0
+	.loc 3 333 0
 	ldrh	r3, [r4]
 	ldr	r0, [r5]
-	.loc 3 335 0
-	ldr	r4, .L645+180
-	ldr	r5, .L645+184
-	.loc 3 332 0
+	.loc 3 336 0
+	ldr	r4, .L651+180
+	ldr	r5, .L651+184
+	.loc 3 333 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL719:
-	ldr	r3, .L645+188
+.LVL727:
+	ldr	r3, .L651+188
 	str	r0, [r3]
-	.loc 3 335 0
+	.loc 3 336 0
 	ldrh	r0, [r4]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r5]	@ movhi
-	.loc 3 336 0
+	.loc 3 337 0
 	bl	ftl_malloc
-.LVL720:
-	ldr	r3, .L645+192
+.LVL728:
+	ldr	r3, .L651+192
 	str	r0, [r3]
-	.loc 3 337 0
+	.loc 3 338 0
 	ldrh	r3, [r5]
+	.loc 3 339 0
+	ldr	r0, .L651+196
 	.loc 3 338 0
-	ldr	r0, .L645+196
-	.loc 3 337 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
-	.loc 3 338 0
+	.loc 3 339 0
 	and	r0, r0, r3, lsl #9
-	.loc 3 337 0
-	strh	r3, [r5]	@ movhi
 	.loc 3 338 0
+	strh	r3, [r5]	@ movhi
+	.loc 3 339 0
 	bl	ftl_malloc
-.LVL721:
-	.loc 3 345 0
+.LVL729:
+	.loc 3 346 0
 	ldrh	fp, [r4]
-.LVL722:
-	.loc 3 338 0
-	ldr	r3, .L645+200
+.LVL730:
+	.loc 3 339 0
+	ldr	r3, .L651+200
 	str	r0, [r3]
-	.loc 3 345 0
+	.loc 3 346 0
 	lsl	fp, fp, #1
-	.loc 3 339 0
-	ldr	r3, .L645+204
+	.loc 3 340 0
+	ldr	r3, .L651+204
 	adds	r0, r0, #32
 	str	r0, [r3]
-.LVL723:
-	.loc 3 347 0
+.LVL731:
+	.loc 3 348 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL724:
-	ldr	r3, .L645+208
+.LVL732:
+	ldr	r3, .L651+208
 	str	r0, [r3]
-	.loc 3 349 0
+	.loc 3 350 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL725:
+.LVL733:
+	.loc 3 351 0
+	ldr	fp, .L651+296
+.LVL734:
 	.loc 3 350 0
-	ldr	fp, .L645+296
-.LVL726:
-	.loc 3 349 0
-	ldr	r3, .L645+212
+	ldr	r3, .L651+212
 	str	r0, [r3]
-.LVL727:
-	.loc 3 350 0
+.LVL735:
+	.loc 3 351 0
 	ldr	r3, [fp]
 	lsls	r5, r3, #1
-.LVL728:
-	.loc 3 351 0
+.LVL736:
+	.loc 3 352 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL729:
-	ldr	r2, .L645+216
+.LVL737:
+	ldr	r2, .L651+216
 	str	r0, [r2]
-	.loc 3 352 0
+	.loc 3 353 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL730:
-	ldr	r3, .L645+220
-	.loc 3 354 0
-	ldr	r5, .L645+224
-.LVL731:
-	.loc 3 352 0
-	str	r0, [r3]
+.LVL738:
+	ldr	r3, .L651+220
+	.loc 3 355 0
+	ldr	r5, .L651+224
+.LVL739:
 	.loc 3 353 0
+	str	r0, [r3]
+	.loc 3 354 0
 	ldrh	r0, [r4]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL732:
-	ldr	r3, .L645+228
+.LVL740:
+	ldr	r3, .L651+228
 	str	r0, [r3]
-	.loc 3 354 0
+	.loc 3 355 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL733:
-	ldr	r2, .L645+232
+.LVL741:
+	ldr	r2, .L651+232
 	str	r0, [r2]
-	.loc 3 355 0
+	.loc 3 356 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL734:
-	ldr	r2, .L645+236
+.LVL742:
+	ldr	r2, .L651+236
 	str	r0, [r2]
-	.loc 3 356 0
+	.loc 3 357 0
 	ldrh	r0, [r5]
-	ldr	r5, .L645+120
+	ldr	r5, .L651+120
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL735:
-	ldr	r3, .L645+240
+.LVL743:
+	ldr	r3, .L651+240
 	str	r0, [r3]
-	.loc 3 357 0
-	ldr	r3, .L645+244
+	.loc 3 358 0
+	ldr	r3, .L651+244
 	ldrh	r0, [r3]
 	str	r3, [sp]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL736:
-	.loc 3 358 0
+.LVL744:
+	.loc 3 359 0
 	ldr	r3, [sp]
-	.loc 3 357 0
-	ldr	r2, .L645+248
 	.loc 3 358 0
+	ldr	r2, .L651+248
+	.loc 3 359 0
 	ldr	r1, [sp, #4]
-	.loc 3 357 0
-	str	r0, [r2]
 	.loc 3 358 0
+	str	r0, [r2]
+	.loc 3 359 0
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL737:
-	.loc 3 360 0
-	ldr	r3, .L645+252
-	ldrh	r0, [r3]
+.LVL745:
 	.loc 3 361 0
+	ldr	r3, .L651+252
+	ldrh	r0, [r3]
+	.loc 3 362 0
 	lsls	r0, r0, #2
-.LVL738:
+.LVL746:
 	bl	ftl_malloc
-.LVL739:
-	ldr	r3, .L645+256
+.LVL747:
+	ldr	r3, .L651+256
 	str	r0, [r3]
-.LVL740:
-	.loc 3 362 0
+.LVL748:
+	.loc 3 363 0
 	ldr	r0, [fp]
+	.loc 3 365 0
+	ldr	fp, .L651+300
 	.loc 3 364 0
-	ldr	fp, .L645+300
-	.loc 3 363 0
 	lsls	r0, r0, #2
-.LVL741:
+.LVL749:
 	bl	ftl_malloc
-.LVL742:
-	ldr	r3, .L645+260
+.LVL750:
+	ldr	r3, .L651+260
 	str	r0, [r3]
-.LVL743:
-	.loc 3 364 0
-	ldrh	r0, [fp]
+.LVL751:
 	.loc 3 365 0
+	ldrh	r0, [fp]
+	.loc 3 366 0
 	mul	r0, r8, r0
-.LVL744:
-	.loc 3 371 0
-	ldr	r8, .L645+304
-	.loc 3 365 0
+.LVL752:
+	.loc 3 372 0
+	ldr	r8, .L651+304
+	.loc 3 366 0
 	bl	ftl_malloc
-.LVL745:
+.LVL753:
+	.loc 3 367 0
+	ldr	r2, .L651+144
 	.loc 3 366 0
-	ldr	r2, .L645+144
-	.loc 3 365 0
-	ldr	r3, .L645+264
+	ldr	r3, .L651+264
 	str	r0, [r3]
-.LVL746:
-	.loc 3 366 0
+.LVL754:
+	.loc 3 367 0
 	ldrh	r0, [r2]
 	ldrh	r3, [fp]
-	ldr	fp, .L645+132
-	.loc 3 367 0
+	ldr	fp, .L651+132
+	.loc 3 368 0
 	muls	r0, r3, r0
-.LVL747:
+.LVL755:
 	bl	ftl_malloc
-.LVL748:
-	ldr	r3, .L645+268
+.LVL756:
+	ldr	r3, .L651+268
 	str	r0, [r3]
-.LVL749:
-	.loc 3 369 0
+.LVL757:
+	.loc 3 370 0
 	movs	r0, #6
-	.loc 3 368 0
+	.loc 3 369 0
 	ldrh	r3, [r4]
+	.loc 3 371 0
+	ldr	r4, .L651+272
 	.loc 3 370 0
-	ldr	r4, .L645+272
-	.loc 3 369 0
 	muls	r0, r3, r0
-.LVL750:
+.LVL758:
 	bl	ftl_malloc
-.LVL751:
-	ldr	r3, .L645+276
+.LVL759:
+	ldr	r3, .L651+276
 	str	r0, [r3]
-	.loc 3 370 0
-	ldr	r3, .L645+280
-	ldrh	r0, [r3]
 	.loc 3 371 0
+	ldr	r3, .L651+280
+	ldrh	r0, [r3]
+	.loc 3 372 0
 	ldrh	r3, [r8]
-	.loc 3 370 0
+	.loc 3 371 0
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r4]	@ movhi
-.LVL752:
-	.loc 3 371 0
-	muls	r0, r3, r0
-.LVL753:
+.LVL760:
 	.loc 3 372 0
+	muls	r0, r3, r0
+.LVL761:
+	.loc 3 373 0
 	lsls	r0, r0, #2
-.LVL754:
+.LVL762:
 	bl	ftl_malloc
-.LVL755:
-	ldr	r2, .L645+284
+.LVL763:
+	ldr	r2, .L651+284
 	str	r5, [sp, #4]
-	ldr	r5, .L645+124
+	ldr	r5, .L651+124
 	mov	r1, r2
-	.loc 3 373 0
+	.loc 3 374 0
 	ldrh	r3, [r8]
-	.loc 3 372 0
+	.loc 3 373 0
 	str	r0, [r1, #28]!
-.LVL756:
-	.loc 3 374 0
+.LVL764:
+	.loc 3 375 0
 	ldrh	r0, [r4]
-	ldr	r8, .L645+140
-	ldr	lr, .L645+148
-	b	.L646
-.L647:
+	ldr	r8, .L651+140
+	ldr	lr, .L651+148
+	b	.L652
+.L653:
 	.align	2
-.L645:
-	.word	.LANCHOR71
+.L651:
+	.word	.LANCHOR70
 	.word	.LANCHOR118
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR21
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR96
+	.word	.LANCHOR67
 	.word	.LANCHOR64
+	.word	.LANCHOR94
+	.word	.LANCHOR63
 	.word	.LANCHOR124
+	.word	.LANCHOR65
 	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR63
+	.word	.LANCHOR62
+	.word	.LANCHOR72
 	.word	.LANCHOR73
-	.word	.LANCHOR74
+	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR78
 	.word	.LANCHOR117
-	.word	.LANCHOR89
+	.word	.LANCHOR87
 	.word	.LANCHOR119
-	.word	.LANCHOR86
-	.word	.LANCHOR113
-	.word	.LANCHOR101
-	.word	.LANCHOR102
 	.word	.LANCHOR84
+	.word	.LANCHOR112
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.word	.LANCHOR85
-	.word	.LANCHOR87
+	.word	.LANCHOR101
 	.word	.LANCHOR103
-	.word	.LANCHOR105
-	.word	.LANCHOR97
-	.word	.LANCHOR100
+	.word	.LANCHOR95
+	.word	.LANCHOR98
 	.word	.LANCHOR120
 	.word	.LANCHOR121
 	.word	.LANCHOR122
+	.word	.LANCHOR91
 	.word	.LANCHOR93
-	.word	.LANCHOR95
 	.word	.LANCHOR23
-	.word	.LANCHOR39
+	.word	.LANCHOR107
 	.word	.LANCHOR123
-	.word	.LANCHOR116
-	.word	.LANCHOR114
-	.word	.LANCHOR24
-	.word	.LANCHOR92
-	.word	.LANCHOR109
 	.word	.LANCHOR115
+	.word	.LANCHOR113
+	.word	.LANCHOR24
+	.word	.LANCHOR90
+	.word	.LANCHOR108
+	.word	.LANCHOR114
 	.word	.LANCHOR6
 	.word	.LANCHOR125
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR126
 	.word	33553920
 	.word	.LANCHOR127
-	.word	.LANCHOR40
-	.word	.LANCHOR128
 	.word	.LANCHOR43
+	.word	.LANCHOR128
+	.word	.LANCHOR42
 	.word	.LANCHOR129
 	.word	.LANCHOR130
 	.word	.LANCHOR27
@@ -7616,254 +7739,254 @@ FtlMemInit:
 	.word	.LANCHOR32
 	.word	.LANCHOR134
 	.word	.LANCHOR135
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR136
 	.word	.LANCHOR137
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR17
 	.word	.LANCHOR37
 	.word	.LANCHOR3
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.word	.LANCHOR30
 	.word	.LANCHOR33
 	.word	.LANCHOR10
-.L646:
-	ldr	ip, .L648+100
+.L652:
+	ldr	ip, .L654+100
 	lsls	r0, r0, #2
 	str	r5, [sp, #8]
-	ldr	r5, .L648
-	.loc 3 373 0
+	ldr	r5, .L654
+	.loc 3 374 0
 	str	r3, [sp]
 	mov	r4, r0
 	movs	r3, #1
 	str	r5, [sp, #12]
-.LVL757:
-.L545:
-	.loc 3 373 0 is_stmt 0 discriminator 1
+.LVL765:
+.L551:
+	.loc 3 374 0 is_stmt 0 discriminator 1
 	ldr	r5, [sp]
 	cmp	r3, r5
-	bcc	.L546
+	bcc	.L552
 	add	r3, r2, r3, lsl #2
-.LVL758:
-	ldr	r1, .L648+4
-	.loc 3 379 0 is_stmt 1
+.LVL766:
+	ldr	r1, .L654+4
+	.loc 3 380 0 is_stmt 1
 	movs	r0, #0
 	adds	r3, r3, #24
-.L547:
-	.loc 3 377 0 discriminator 1
+.L553:
+	.loc 3 378 0 discriminator 1
 	cmp	r1, r3
-	bne	.L548
-	.loc 3 383 0
-	ldr	r3, .L648+8
+	bne	.L554
+	.loc 3 384 0
+	ldr	r3, .L654+8
 	ldr	r3, [r3]
-	cbnz	r3, .L549
-.L551:
-	.loc 3 385 0
-	ldr	r1, .L648+12
-	ldr	r0, .L648+16
-	bl	printf
-.LVL759:
+	cbnz	r3, .L555
+.L557:
 	.loc 3 386 0
+	ldr	r1, .L654+12
+	ldr	r0, .L654+16
+	bl	printf
+.LVL767:
+	.loc 3 387 0
 	mov	r0, #-1
-.L544:
-	.loc 3 484 0
+.L550:
+	.loc 3 485 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL760:
-.L546:
+.LVL768:
+.L552:
 	.cfi_restore_state
-	.loc 3 374 0 discriminator 3
+	.loc 3 375 0 discriminator 3
 	ldr	r5, [r2, #28]
-	.loc 3 373 0 discriminator 3
-	adds	r3, r3, #1
-.LVL761:
 	.loc 3 374 0 discriminator 3
+	adds	r3, r3, #1
+.LVL769:
+	.loc 3 375 0 discriminator 3
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
-	b	.L545
-.LVL762:
-.L548:
-	.loc 3 379 0 discriminator 2
+	b	.L551
+.LVL770:
+.L554:
+	.loc 3 380 0 discriminator 2
 	str	r0, [r3, #4]!
-	b	.L547
-.L549:
-	.loc 3 388 0
-	ldr	r3, .L648+20
+	b	.L553
+.L555:
+	.loc 3 389 0
+	ldr	r3, .L654+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 393 0
-	ldr	r3, .L648+24
+	beq	.L557
+	.loc 3 394 0
+	ldr	r3, .L654+24
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 398 0
-	ldr	r3, .L648+28
+	beq	.L557
+	.loc 3 399 0
+	ldr	r3, .L654+28
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 404 0
-	ldr	r3, .L648+32
+	beq	.L557
+	.loc 3 405 0
+	ldr	r3, .L654+32
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 409 0
-	ldr	r3, .L648+36
+	beq	.L557
+	.loc 3 410 0
+	ldr	r3, .L654+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 414 0
-	ldr	r3, .L648+40
+	beq	.L557
+	.loc 3 415 0
+	ldr	r3, .L654+40
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 419 0
+	beq	.L557
+	.loc 3 420 0
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 425 0
-	ldr	r3, .L648+44
+	beq	.L557
+	.loc 3 426 0
+	ldr	r3, .L654+44
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 430 0
-	ldr	r3, .L648+48
+	beq	.L557
+	.loc 3 431 0
+	ldr	r3, .L654+48
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 430 0 is_stmt 0 discriminator 1
+	beq	.L557
+	.loc 3 431 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 is_stmt 1
+	beq	.L557
+	.loc 3 436 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 is_stmt 0 discriminator 1
+	beq	.L557
+	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	r3, [fp]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 discriminator 2
+	beq	.L557
+	.loc 3 436 0 discriminator 2
 	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 discriminator 3
+	beq	.L557
+	.loc 3 436 0 discriminator 3
 	ldr	r3, [r8]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 435 0 discriminator 4
+	beq	.L557
+	.loc 3 436 0 discriminator 4
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 is_stmt 1
+	beq	.L557
+	.loc 3 441 0 is_stmt 1
 	ldr	r3, [lr]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 is_stmt 0 discriminator 1
+	beq	.L557
+	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	r3, [ip]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 discriminator 2
+	beq	.L557
+	.loc 3 441 0 discriminator 2
 	ldr	r3, [r7]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 440 0 discriminator 3
+	beq	.L557
+	.loc 3 441 0 discriminator 3
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 441 0 is_stmt 1
-	ldr	r3, .L648+52
+	beq	.L557
+	.loc 3 442 0 is_stmt 1
+	ldr	r3, .L654+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	r3, .L648+56
+	beq	.L557
+	.loc 3 442 0 is_stmt 0 discriminator 1
+	ldr	r3, .L654+56
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 441 0 discriminator 2
-	ldr	r3, .L648+60
+	beq	.L557
+	.loc 3 442 0 discriminator 2
+	ldr	r3, .L654+60
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 446 0 is_stmt 1
-	ldr	r3, .L648+64
+	beq	.L557
+	.loc 3 447 0 is_stmt 1
+	ldr	r3, .L654+64
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	r3, .L648+68
+	beq	.L557
+	.loc 3 447 0 is_stmt 0 discriminator 1
+	ldr	r3, .L654+68
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 446 0 discriminator 2
-	ldr	r3, .L648+72
+	beq	.L557
+	.loc 3 447 0 discriminator 2
+	ldr	r3, .L654+72
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 452 0 is_stmt 1
-	ldr	r3, .L648+76
+	beq	.L557
+	.loc 3 453 0 is_stmt 1
+	ldr	r3, .L654+76
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	r3, .L648+80
+	beq	.L557
+	.loc 3 453 0 is_stmt 0 discriminator 1
+	ldr	r3, .L654+80
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 458 0 is_stmt 1
-	ldr	r3, .L648+84
+	beq	.L557
+	.loc 3 459 0 is_stmt 1
+	ldr	r3, .L654+84
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 464 0
-	ldr	r3, .L648+88
+	beq	.L557
+	.loc 3 465 0
+	ldr	r3, .L654+88
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 470 0
-	ldr	r3, .L648+92
+	beq	.L557
+	.loc 3 471 0
+	ldr	r3, .L654+92
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 476 0
-	ldr	r3, .L648+96
+	beq	.L557
+	.loc 3 477 0
+	ldr	r3, .L654+96
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L551
-	.loc 3 483 0
+	beq	.L557
+	.loc 3 484 0
 	movs	r0, #0
-	b	.L544
-.L649:
+	b	.L550
+.L655:
 	.align	2
-.L648:
+.L654:
 	.word	.LANCHOR121
 	.word	.LANCHOR37+56
 	.word	.LANCHOR129
 	.word	.LANCHOR138
-	.word	.LC82
+	.word	.LC85
 	.word	.LANCHOR130
 	.word	.LANCHOR134
 	.word	.LANCHOR135
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR136
-	.word	.LANCHOR41
-	.word	.LANCHOR43
-	.word	.LANCHOR97
-	.word	.LANCHOR116
+	.word	.LANCHOR40
+	.word	.LANCHOR42
+	.word	.LANCHOR95
+	.word	.LANCHOR115
+	.word	.LANCHOR113
+	.word	.LANCHOR90
+	.word	.LANCHOR108
 	.word	.LANCHOR114
 	.word	.LANCHOR92
-	.word	.LANCHOR109
-	.word	.LANCHOR115
-	.word	.LANCHOR94
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LANCHOR126
 	.word	.LANCHOR36
 	.word	.LANCHOR131
@@ -7887,9 +8010,9 @@ FtlBbt2Bitmap:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL763:
+.LVL771:
 	.loc 4 69 0
-	ldr	r3, .L656
+	ldr	r3, .L662
 	.loc 4 66 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 24
@@ -7902,7 +8025,7 @@ FtlBbt2Bitmap:
 	.loc 4 66 0
 	mov	r5, r0
 	.loc 4 74 0
-	ldr	r7, .L656+4
+	ldr	r7, .L662+4
 	.loc 4 66 0
 	mov	r6, r1
 	subs	r4, r5, #2
@@ -7910,32 +8033,32 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL764:
+.LVL772:
 	.loc 4 74 0
-	ldr	r8, .L656+12
+	ldr	r8, .L662+12
 	.loc 4 69 0
 	mov	r0, r6
-.LVL765:
+.LVL773:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL766:
-.L653:
+.LVL774:
+.L659:
 	.loc 4 72 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L650
+	beq	.L656
 	.loc 4 74 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L652
+	bhi	.L658
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L656+8
+	ldr	r0, .L662+8
 	bl	printf
-.LVL767:
-.L652:
+.LVL775:
+.L658:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
@@ -7949,13 +8072,13 @@ FtlBbt2Bitmap:
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
 	.loc 4 70 0 discriminator 2
-	bne	.L653
-.L650:
+	bne	.L659
+.L656:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL768:
-.L657:
+.LVL776:
+.L663:
 	.align	2
-.L656:
+.L662:
 	.word	.LANCHOR137
 	.word	.LANCHOR17
 	.word	.LC1
@@ -7979,7 +8102,7 @@ FtlBbtMemInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 4 150 0
-	ldr	r0, .L659
+	ldr	r0, .L665
 	movw	r3, #65535
 	.loc 4 152 0
 	movs	r2, #16
@@ -7992,10 +8115,10 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL769:
-.L660:
+.LVL777:
+.L666:
 	.align	2
-.L659:
+.L665:
 	.word	.LANCHOR37
 	.cfi_endproc
 .LFE230:
@@ -8014,9 +8137,9 @@ FtlFreeSysBlkQueueInit:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL770:
+.LVL778:
 	.loc 2 79 0
-	ldr	r3, .L662
+	ldr	r3, .L668
 	.loc 2 83 0
 	mov	r2, #2048
 	.loc 2 76 0
@@ -8038,15 +8161,15 @@ FtlFreeSysBlkQueueInit:
 	strh	r0, [r3], #8	@ movhi
 	.loc 2 83 0
 	mov	r0, r3
-.LVL771:
+.LVL779:
 	bl	ftl_memset
-.LVL772:
+.LVL780:
 	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L663:
+.L669:
 	.align	2
-.L662:
+.L668:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE240:
@@ -8061,14 +8184,14 @@ FtlFreeSysBlkQueueInit:
 	.type	load_l2p_region, %function
 load_l2p_region:
 .LFB256:
-	.loc 2 442 0
+	.loc 2 488 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL773:
-	.loc 2 446 0
-	ldr	r3, .L670
-	.loc 2 442 0
+.LVL781:
+	.loc 2 492 0
+	ldr	r3, .L676
+	.loc 2 488 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8079,146 +8202,146 @@ load_l2p_region:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 442 0
+	.loc 2 488 0
 	mov	r5, r0
 	mov	r10, r1
-	.loc 2 446 0
+	.loc 2 492 0
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L665
-	.loc 2 446 0 is_stmt 0 discriminator 1
-	mov	r2, #446
-	ldr	r1, .L670+4
-.LVL774:
-	ldr	r0, .L670+8
-.LVL775:
+	bcs	.L671
+	.loc 2 492 0 is_stmt 0 discriminator 1
+	mov	r2, #492
+	ldr	r1, .L676+4
+.LVL782:
+	ldr	r0, .L676+8
+.LVL783:
 	bl	printf
-.LVL776:
-.L665:
-	.loc 2 447 0 is_stmt 1
-	ldr	fp, .L670+40
+.LVL784:
+.L671:
+	.loc 2 493 0 is_stmt 1
+	ldr	fp, .L676+40
 	movs	r4, #12
-	ldr	r7, .L670+12
+	ldr	r7, .L676+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
-.LVL777:
-	.loc 2 449 0
+.LVL785:
+	.loc 2 495 0
 	cmp	r8, #0
-	bne	.L666
-	.loc 2 450 0
+	bne	.L672
+	.loc 2 496 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L670+16
+	ldr	r2, .L676+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL778:
-	.loc 2 451 0
+.LVL786:
+	.loc 2 497 0
 	ldr	r2, [r7]
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
-	.loc 2 452 0
+	.loc 2 498 0
 	str	r8, [r1, #4]
-.L667:
-	.loc 2 473 0
+.L673:
+	.loc 2 519 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL779:
-.L666:
+.LVL787:
+.L672:
 	.cfi_restore_state
-	.loc 2 456 0
+	.loc 2 502 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
-	.loc 2 455 0
-	ldr	r6, .L670+20
-	.loc 2 456 0
+	.loc 2 501 0
+	ldr	r6, .L676+20
+	.loc 2 502 0
 	add	r2, r2, r4
-	.loc 2 458 0
+	.loc 2 504 0
 	mov	r0, r6
-	.loc 2 456 0
+	.loc 2 502 0
 	ldr	r2, [r2, #8]
-	.loc 2 455 0
+	.loc 2 501 0
 	str	r8, [r6, #4]
-	.loc 2 456 0
+	.loc 2 502 0
 	str	r2, [r6, #8]
-	.loc 2 457 0
-	ldr	r2, .L670+24
+	.loc 2 503 0
+	ldr	r2, .L676+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
-	.loc 2 458 0
+	.loc 2 504 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL780:
-	.loc 2 459 0
+.LVL788:
+	.loc 2 505 0
 	ldr	r10, [r6, #12]
-.LVL781:
-	.loc 2 461 0
+.LVL789:
+	.loc 2 507 0
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L668
-	.loc 2 462 0
+	beq	.L674
+	.loc 2 508 0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L670+28
+	ldr	r0, .L676+28
 	bl	printf
-.LVL782:
-	.loc 2 463 0
+.LVL790:
+	.loc 2 509 0
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L670+32
+	ldr	r0, .L676+32
 	bl	rknand_print_hex
-.LVL783:
-	.loc 2 464 0
+.LVL791:
+	.loc 2 510 0
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L670+36
+	ldr	r0, .L676+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.LVL784:
-.L668:
-	.loc 2 467 0
+.LVL792:
+.L674:
+	.loc 2 513 0
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L669
-	.loc 2 467 0 is_stmt 0 discriminator 1
-	movw	r2, #467
-	ldr	r1, .L670+4
-	ldr	r0, .L670+8
+	beq	.L675
+	.loc 2 513 0 is_stmt 0 discriminator 1
+	movw	r2, #513
+	ldr	r1, .L676+4
+	ldr	r0, .L676+8
 	bl	printf
-.LVL785:
-.L669:
-	.loc 2 470 0 is_stmt 1
+.LVL793:
+.L675:
+	.loc 2 516 0 is_stmt 1
 	ldr	r3, [r7]
 	movs	r1, #0
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	.loc 2 471 0
+	.loc 2 517 0
 	strh	r5, [r3, r4]	@ movhi
-	.loc 2 472 0
-	b	.L667
-.L671:
+	.loc 2 518 0
+	b	.L673
+.L677:
 	.align	2
-.L670:
+.L676:
 	.word	.LANCHOR32
 	.word	.LANCHOR140
 	.word	.LC1
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR23
+	.word	.LANCHOR106
 	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LC83
-	.word	.LC84
-	.word	.LC85
+	.word	.LC86
+	.word	.LC87
+	.word	.LC88
 	.word	.LANCHOR134
 	.cfi_endproc
 .LFE256:
@@ -8233,14 +8356,14 @@ load_l2p_region:
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
 .LFB257:
-	.loc 2 476 0
+	.loc 2 522 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL786:
-	.loc 2 485 0
+.LVL794:
+	.loc 2 531 0
 	ldrh	r2, [r0, #10]
-	.loc 2 476 0
+	.loc 2 522 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8251,147 +8374,147 @@ ftl_free_no_use_map_blk:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 476 0
+	.loc 2 522 0
 	mov	r4, r0
-	.loc 2 479 0
+	.loc 2 525 0
 	ldr	r5, [r0, #20]
-	.loc 2 485 0
+	.loc 2 531 0
 	movs	r1, #0
-	.loc 2 477 0
+	.loc 2 523 0
 	ldr	r10, [r0, #12]
-.LVL787:
-	.loc 2 485 0
+.LVL795:
+	.loc 2 531 0
 	lsls	r2, r2, #1
-	.loc 2 478 0
+	.loc 2 524 0
 	ldr	r6, [r0, #24]
-.LVL788:
-	.loc 2 485 0
+.LVL796:
+	.loc 2 531 0
 	mov	r0, r5
-.LVL789:
+.LVL797:
 	bl	ftl_memset
-.LVL790:
-	.loc 2 486 0
+.LVL798:
+	.loc 2 532 0
 	movs	r3, #0
-.LVL791:
-.L673:
-	.loc 2 486 0 is_stmt 0 discriminator 1
+.LVL799:
+.L679:
+	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L677
-	.loc 2 494 0 is_stmt 1
+	bhi	.L683
+	.loc 2 540 0 is_stmt 1
 	ldrh	r3, [r5]
-.LVL792:
-	.loc 2 497 0
+.LVL800:
+	.loc 2 543 0
 	movs	r6, #0
-.LVL793:
-	.loc 2 498 0
-	ldr	r2, .L686
-.LVL794:
-	.loc 2 495 0
+.LVL801:
+	.loc 2 544 0
+	ldr	r2, .L692
+.LVL802:
+	.loc 2 541 0
 	mov	fp, r6
-.LVL795:
-.L678:
-	.loc 2 497 0 discriminator 1
+.LVL803:
+.L684:
+	.loc 2 543 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL796:
+.LVL804:
 	cmp	r0, r1
-	bhi	.L682
-	.loc 2 513 0
+	bhi	.L688
+	.loc 2 559 0
 	mov	r0, fp
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL797:
-.L677:
+.LVL805:
+.L683:
 	.cfi_restore_state
-	.loc 2 487 0
+	.loc 2 533 0
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
-	.loc 2 488 0
+	.loc 2 534 0
 	movs	r2, #0
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfx	r1, r1, #10, #16
-.LVL798:
-.L674:
-	.loc 2 488 0 discriminator 1
+.LVL806:
+.L680:
+	.loc 2 534 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L676
-.LVL799:
+	bhi	.L682
+.LVL807:
 	adds	r3, r3, #1
-.LVL800:
-	b	.L673
-.LVL801:
-.L676:
-	.loc 2 489 0
+.LVL808:
+	b	.L679
+.LVL809:
+.L682:
+	.loc 2 535 0
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL802:
+.LVL810:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
-	.loc 2 490 0
+	.loc 2 536 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL803:
-	b	.L674
-.LVL804:
-.L682:
-	.loc 2 498 0
+.LVL811:
+	b	.L680
+.LVL812:
+.L688:
+	.loc 2 544 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L679
-	.loc 2 498 0 is_stmt 0 discriminator 1
+	bne	.L685
+	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
-	.loc 2 499 0 is_stmt 1 discriminator 1
+	.loc 2 545 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L679:
-	.loc 2 500 0
+.L685:
+	.loc 2 546 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL805:
-	.loc 2 504 0
+.LVL813:
+	.loc 2 550 0
 	cmp	r8, #0
-	bne	.L681
-	.loc 2 504 0 is_stmt 0 discriminator 1
+	bne	.L687
+	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L681
-	.loc 2 506 0 is_stmt 1
+	cbz	r0, .L687
+	.loc 2 552 0 is_stmt 1
 	movs	r1, #1
-.LVL806:
+.LVL814:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL807:
-	.loc 2 507 0
+.LVL815:
+	.loc 2 553 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
-	.loc 2 508 0
+	.loc 2 554 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL808:
-.L681:
-	adds	r6, r6, #1
-.LVL809:
-	b	.L678
+.LVL816:
 .L687:
+	adds	r6, r6, #1
+.LVL817:
+	b	.L684
+.L693:
 	.align	2
-.L686:
+.L692:
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE257:
@@ -8406,11 +8529,11 @@ ftl_free_no_use_map_blk:
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
 .LFB260:
-	.loc 2 583 0
+	.loc 2 632 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL810:
+.LVL818:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -8419,165 +8542,165 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 591 0
+	.loc 2 640 0
 	movw	r2, #65535
 	ldrh	r3, [r0]
-	.loc 2 583 0
+	.loc 2 632 0
 	mov	r4, r0
-	.loc 2 586 0
+	.loc 2 635 0
 	ldr	r5, [r0, #12]
-.LVL811:
-	.loc 2 591 0
+.LVL819:
+	.loc 2 640 0
 	cmp	r3, r2
-	bne	.L689
-	.loc 2 592 0
+	bne	.L695
+	.loc 2 641 0
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L690
-	.loc 2 592 0 is_stmt 0 discriminator 1
-	mov	r2, #592
-	ldr	r1, .L698
-	ldr	r0, .L698+4
-.LVL812:
+	cbz	r3, .L696
+	.loc 2 641 0 is_stmt 0 discriminator 1
+	movw	r2, #641
+	ldr	r1, .L704
+	ldr	r0, .L704+4
+.LVL820:
 	bl	printf
-.LVL813:
-.L690:
-	.loc 2 593 0 is_stmt 1
+.LVL821:
+.L696:
+	.loc 2 642 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 594 0
+	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL814:
-	.loc 2 595 0
+.LVL822:
+	.loc 2 644 0
 	movs	r3, #0
-	.loc 2 594 0
+	.loc 2 643 0
 	strh	r0, [r5]	@ movhi
-	.loc 2 595 0
+	.loc 2 644 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 596 0
+	.loc 2 645 0
 	strh	r3, [r4]	@ movhi
-	.loc 2 597 0
+	.loc 2 646 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL815:
-.L691:
-	.loc 2 628 0
+.LVL823:
+.L697:
+	.loc 2 677 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL816:
-.L689:
-	.loc 2 601 0
+.LVL824:
+.L695:
+	.loc 2 650 0
 	ldrh	r5, [r5, r3, lsl #1]
-.LVL817:
-	.loc 2 612 0
+.LVL825:
+	.loc 2 661 0
 	movs	r1, #255
-	.loc 2 602 0
+	.loc 2 651 0
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L698+8
-	.loc 2 603 0
-	ldr	r7, .L698+12
-	.loc 2 587 0
+	ldr	r2, .L704+8
+	.loc 2 652 0
+	ldr	r7, .L704+12
+	.loc 2 636 0
 	ldr	r6, [r0, #24]
-	.loc 2 602 0
+	.loc 2 651 0
 	orr	r3, r3, r5, lsl #10
-	.loc 2 603 0
+	.loc 2 652 0
 	ldr	r0, [r7]
-.LVL818:
-	.loc 2 602 0
+.LVL826:
+	.loc 2 651 0
 	str	r3, [r2, #4]
-	.loc 2 604 0
-	ldr	r3, .L698+16
-	.loc 2 603 0
+	.loc 2 653 0
+	ldr	r3, .L704+16
+	.loc 2 652 0
 	str	r0, [r2, #8]
-	.loc 2 604 0
+	.loc 2 653 0
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-.LVL819:
-	.loc 2 607 0
+.LVL827:
+	.loc 2 656 0
 	ldr	r2, [r4, #28]
 	str	r2, [r3, #4]
-	.loc 2 608 0
+	.loc 2 657 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 609 0
+	.loc 2 658 0
 	ldrh	r2, [r4, #4]
-	.loc 2 610 0
+	.loc 2 659 0
 	strh	r5, [r3, #2]	@ movhi
-	.loc 2 609 0
+	.loc 2 658 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 612 0
-	ldr	r3, .L698+20
-.LVL820:
+	.loc 2 661 0
+	ldr	r3, .L704+20
+.LVL828:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL821:
-	.loc 2 614 0
+.LVL829:
+	.loc 2 663 0
 	ldrh	ip, [r4, #6]
 	movs	r3, #0
-	.loc 2 617 0
+	.loc 2 666 0
 	ldr	r1, [r7]
-	.loc 2 613 0
+	.loc 2 662 0
 	mov	r2, r3
-.LVL822:
-.L692:
-	.loc 2 614 0 discriminator 1
+.LVL830:
+.L698:
+	.loc 2 663 0 discriminator 1
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L694
-	.loc 2 621 0
+	bhi	.L700
+	.loc 2 670 0
 	movs	r2, #1
-.LVL823:
+.LVL831:
 	movs	r3, #0
-.LVL824:
+.LVL832:
 	mov	r1, r2
-	ldr	r0, .L698+8
-.LVL825:
+	ldr	r0, .L704+8
+.LVL833:
 	bl	FlashProgPages
-.LVL826:
-	.loc 2 622 0
+.LVL834:
+	.loc 2 671 0
 	ldrh	r3, [r4, #2]
-	.loc 2 626 0
+	.loc 2 675 0
 	mov	r0, r4
-	.loc 2 622 0
+	.loc 2 671 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 626 0
+	.loc 2 675 0
 	bl	ftl_map_blk_gc
-.LVL827:
-	.loc 2 627 0
-	b	.L691
-.LVL828:
-.L694:
-	.loc 2 615 0
+.LVL835:
+	.loc 2 676 0
+	b	.L697
+.LVL836:
+.L700:
+	.loc 2 664 0
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
-	bne	.L693
-	.loc 2 616 0
+	bne	.L699
+	.loc 2 665 0
 	adds	r2, r2, #1
-.LVL829:
+.LVL837:
 	uxth	r2, r2
-.LVL830:
-	.loc 2 617 0
+.LVL838:
+	.loc 2 666 0
 	str	r3, [r1, r2, lsl #3]
-	.loc 2 618 0
+	.loc 2 667 0
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
-.L693:
-.LVL831:
-	adds	r3, r3, #1
-.LVL832:
-	b	.L692
 .L699:
+.LVL839:
+	adds	r3, r3, #1
+.LVL840:
+	b	.L698
+.L705:
 	.align	2
-.L698:
+.L704:
 	.word	.LANCHOR141
 	.word	.LC1
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.word	.LANCHOR39
-	.word	.LANCHOR109
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE260:
@@ -8592,11 +8715,11 @@ Ftl_write_map_blk_to_last_page:
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
 .LFB261:
-	.loc 2 631 0
+	.loc 2 680 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL833:
+.LVL841:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8607,199 +8730,199 @@ FtlMapWritePage:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 631 0
+	.loc 2 680 0
 	mov	r4, r0
-	.loc 2 638 0
-	ldr	r8, .L719+28
-	.loc 2 631 0
+	.loc 2 687 0
+	ldr	r8, .L725+28
+	.loc 2 680 0
 	mov	r7, r1
-	.loc 2 634 0
+	.loc 2 683 0
 	movs	r6, #0
-	.loc 2 631 0
+	.loc 2 680 0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.LVL834:
-.L701:
-	.loc 2 637 0
-	ldr	r2, .L719
+.LVL842:
+.L707:
+	.loc 2 686 0
+	ldr	r2, .L725
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-	.loc 2 638 0
+	.loc 2 687 0
 	ldrh	r3, [r8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L702
-	.loc 2 638 0 is_stmt 0 discriminator 1
+	bge	.L708
+	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L703
-.L702:
-	.loc 2 639 0 is_stmt 1
+	bne	.L709
+.L708:
+	.loc 2 688 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL835:
-.L703:
-	.loc 2 650 0
+.LVL843:
+.L709:
+	.loc 2 699 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L704
-	.loc 2 650 0 is_stmt 0 discriminator 1
-	movw	r2, #650
-	ldr	r1, .L719+4
-	ldr	r0, .L719+8
+	cbnz	r3, .L710
+	.loc 2 699 0 is_stmt 0 discriminator 1
+	movw	r2, #699
+	ldr	r1, .L725+4
+	ldr	r0, .L725+8
 	bl	printf
-.LVL836:
-.L704:
-	.loc 2 651 0 is_stmt 1
+.LVL844:
+.L710:
+	.loc 2 700 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L705
-	.loc 2 651 0 is_stmt 0 discriminator 1
-	movw	r2, #651
-	ldr	r1, .L719+4
-	ldr	r0, .L719+8
+	bcc	.L711
+	.loc 2 700 0 is_stmt 0 discriminator 1
+	mov	r2, #700
+	ldr	r1, .L725+4
+	ldr	r0, .L725+8
 	bl	printf
-.LVL837:
-.L705:
-	.loc 2 652 0 is_stmt 1
+.LVL845:
+.L711:
+	.loc 2 701 0 is_stmt 1
 	ldrh	r2, [r4]
-	.loc 2 658 0
+	.loc 2 707 0
 	movs	r1, #0
-	.loc 2 652 0
+	.loc 2 701 0
 	ldr	r3, [r4, #12]
-	.loc 2 654 0
-	ldr	r5, .L719+12
-	.loc 2 652 0
+	.loc 2 703 0
+	ldr	r5, .L725+12
+	.loc 2 701 0
 	ldrh	r10, [r3, r2, lsl #1]
-.LVL838:
-	.loc 2 654 0
+.LVL846:
+	.loc 2 703 0
 	ldrh	r2, [r4, #2]
-	.loc 2 655 0
+	.loc 2 704 0
 	ldr	r3, [sp, #4]
-	.loc 2 654 0
+	.loc 2 703 0
 	orr	r2, r2, r10, lsl #10
-	.loc 2 655 0
+	.loc 2 704 0
 	str	r3, [r5, #8]
-	.loc 2 654 0
+	.loc 2 703 0
 	str	r2, [r5, #4]
-	.loc 2 656 0
-	ldr	r2, .L719+16
+	.loc 2 705 0
+	ldr	r2, .L725+16
 	ldr	r0, [r2]
-	.loc 2 658 0
+	.loc 2 707 0
 	movs	r2, #16
-	.loc 2 656 0
+	.loc 2 705 0
 	str	r0, [r5, #12]
-	.loc 2 658 0
+	.loc 2 707 0
 	bl	ftl_memset
-.LVL839:
-	.loc 2 659 0
+.LVL847:
+	.loc 2 708 0
 	ldr	r2, [r5, #12]
-.LVL840:
-	.loc 2 664 0
+.LVL848:
+	.loc 2 713 0
 	movs	r3, #1
-	.loc 2 660 0
+	.loc 2 709 0
 	ldr	r1, [r4, #28]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	r0, r5
-	.loc 2 661 0
+	.loc 2 710 0
 	strh	r7, [r2, #8]	@ movhi
-	.loc 2 660 0
+	.loc 2 709 0
 	str	r1, [r2, #4]
-	.loc 2 662 0
+	.loc 2 711 0
 	ldrh	r1, [r4, #4]
-	.loc 2 663 0
+	.loc 2 712 0
 	strh	r10, [r2, #2]	@ movhi
-	.loc 2 662 0
+	.loc 2 711 0
 	strh	r1, [r2]	@ movhi
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	r2, r3
-.LVL841:
+.LVL849:
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL842:
-	.loc 2 665 0
+.LVL850:
+	.loc 2 714 0
 	ldrh	r2, [r4, #2]
-	.loc 2 667 0
+	.loc 2 716 0
 	ldr	r3, [r5]
-	.loc 2 665 0
+	.loc 2 714 0
 	adds	r2, r2, #1
 	uxth	r2, r2
-	.loc 2 667 0
+	.loc 2 716 0
 	adds	r3, r3, #1
-	.loc 2 665 0
+	.loc 2 714 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 667 0
-	bne	.L706
-	.loc 2 668 0
+	.loc 2 716 0
+	bne	.L712
+	.loc 2 717 0
 	ldr	r1, [r5, #4]
-	.loc 2 669 0
+	.loc 2 718 0
 	adds	r6, r6, #1
-.LVL843:
-	.loc 2 668 0
-	ldr	r0, .L719+20
-	.loc 2 669 0
+.LVL851:
+	.loc 2 717 0
+	ldr	r0, .L725+20
+	.loc 2 718 0
 	uxth	r6, r6
-	.loc 2 668 0
+	.loc 2 717 0
 	bl	printf
-.LVL844:
-	.loc 2 670 0
+.LVL852:
+	.loc 2 719 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
-	.loc 2 671 0
+	.loc 2 720 0
 	ittt	ls
 	ldrhls	r2, [fp]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
-	.loc 2 673 0
+	.loc 2 722 0
 	cmp	r6, #3
-	bls	.L708
-	.loc 2 674 0
+	bls	.L714
+	.loc 2 723 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L719+24
+	ldr	r0, .L725+24
 	bl	printf
-.LVL845:
-.L709:
-	b	.L709
-.L708:
-	.loc 2 678 0
+.LVL853:
+.L715:
+	b	.L715
+.L714:
+	.loc 2 727 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L701
-.L718:
-	b	.L718
-.L706:
-	.loc 2 682 0
+	beq	.L707
+.L724:
+	b	.L724
+.L712:
+	.loc 2 731 0
 	cmp	r2, #1
-	beq	.L701
-	.loc 2 685 0
+	beq	.L707
+	.loc 2 734 0
 	ldr	r2, [r5, #4]
-	.loc 2 687 0
+	.loc 2 736 0
 	movs	r0, #0
-	.loc 2 685 0
+	.loc 2 734 0
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r7, lsl #2]
-	.loc 2 687 0
+	.loc 2 736 0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL846:
-.L720:
+.LVL854:
+.L726:
 	.align	2
-.L719:
-	.word	.LANCHOR67
+.L725:
+	.word	.LANCHOR66
 	.word	.LANCHOR142
 	.word	.LC1
+	.word	.LANCHOR106
 	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LC86
-	.word	.LC87
+	.word	.LC89
+	.word	.LC90
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE261:
@@ -8814,14 +8937,14 @@ FtlMapWritePage:
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
 .LFB259:
-	.loc 2 537 0
+	.loc 2 586 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL847:
-	.loc 2 542 0
+.LVL855:
+	.loc 2 591 0
 	ldr	r3, [r0, #24]
-	.loc 2 537 0
+	.loc 2 586 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8832,167 +8955,167 @@ ftl_map_blk_gc:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 537 0
+	.loc 2 586 0
 	mov	r4, r0
-	.loc 2 541 0
+	.loc 2 590 0
 	ldr	r5, [r0, #12]
-.LVL848:
-	.loc 2 542 0
+.LVL856:
+	.loc 2 591 0
 	str	r3, [sp]
-.LVL849:
-	.loc 2 545 0
+.LVL857:
+	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL850:
-	.loc 2 547 0
+.LVL858:
+	.loc 2 596 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L722
-	.loc 2 548 0
+	blt	.L728
+	.loc 2 597 0
 	uxth	r0, r0
 	ldrh	r7, [r5, r0, lsl #1]
-.LVL851:
-	.loc 2 549 0
-	cbz	r7, .L722
-	.loc 2 549 0 is_stmt 0 discriminator 1
+.LVL859:
+	.loc 2 598 0
+	cbz	r7, .L728
+	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L722
-	.loc 2 550 0 is_stmt 1
+	cbnz	r3, .L728
+	.loc 2 599 0 is_stmt 1
 	movs	r2, #1
 	str	r2, [r4, #32]
-	.loc 2 551 0
+	.loc 2 600 0
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-	.loc 2 552 0
+	.loc 2 601 0
 	ldrh	r3, [r4, #8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	r2, [r4, #2]
-	.loc 2 552 0
+	.loc 2 601 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	.loc 2 553 0
-	ldr	r3, .L733
+	.loc 2 602 0
+	ldr	r3, .L739
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L723
-	.loc 2 554 0
+	bcc	.L729
+	.loc 2 603 0
 	mov	r0, r4
-.LVL852:
+.LVL860:
 	bl	ftl_map_blk_alloc_new_blk
-.LVL853:
-.L723:
-	.loc 2 558 0 discriminator 1
-	ldr	r5, .L733+4
-.LVL854:
-	.loc 2 537 0 discriminator 1
+.LVL861:
+.L729:
+	.loc 2 607 0 discriminator 1
+	ldr	r5, .L739+4
+.LVL862:
+	.loc 2 586 0 discriminator 1
 	movs	r6, #0
-	.loc 2 558 0 discriminator 1
-	ldr	fp, .L733+20
-.L724:
-	.loc 2 556 0 discriminator 1
+	.loc 2 607 0 discriminator 1
+	ldr	fp, .L739+20
+.L730:
+	.loc 2 605 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
-.LVL855:
+.LVL863:
 	cmp	r3, r10
-	bhi	.L728
-	.loc 2 572 0
+	bhi	.L734
+	.loc 2 621 0
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL856:
-	.loc 2 573 0
+.LVL864:
+	.loc 2 622 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL857:
-.L722:
-	.loc 2 577 0
-	ldr	r3, .L733
+.LVL865:
+.L728:
+	.loc 2 626 0
+	ldr	r3, .L739
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L729
-	.loc 2 578 0
+	bcc	.L735
+	.loc 2 627 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL858:
-.L729:
-	.loc 2 580 0
+.LVL866:
+.L735:
+	.loc 2 629 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL859:
+.LVL867:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL860:
-.L728:
+.LVL868:
+.L734:
 	.cfi_restore_state
-	.loc 2 557 0
+	.loc 2 606 0
 	ldr	r3, [sp]
 	uxth	r8, r6
 	ldr	r2, [r3, r8, lsl #2]
 	cmp	r7, r2, lsr #10
-	bne	.L725
-	.loc 2 558 0
+	bne	.L731
+	.loc 2 607 0
 	ldr	r3, [fp]
-	.loc 2 560 0
+	.loc 2 609 0
 	str	r2, [r5, #4]
-.LVL861:
-	.loc 2 562 0
+.LVL869:
+	.loc 2 611 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L733+4
-	.loc 2 558 0
+	ldr	r0, .L739+4
+	.loc 2 607 0
 	str	r3, [r5, #8]
-	.loc 2 559 0
-	ldr	r3, .L733+8
+	.loc 2 608 0
+	ldr	r3, .L739+8
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	str	r3, [sp, #4]
-.LVL862:
-	.loc 2 562 0
+.LVL870:
+	.loc 2 611 0
 	bl	FlashReadPages
-.LVL863:
-	.loc 2 564 0
+.LVL871:
+	.loc 2 613 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L726
-	.loc 2 564 0 is_stmt 0 discriminator 1
-	mov	r2, #564
-	ldr	r1, .L733+12
-	ldr	r0, .L733+16
+	beq	.L732
+	.loc 2 613 0 is_stmt 0 discriminator 1
+	movw	r2, #613
+	ldr	r1, .L739+12
+	ldr	r0, .L739+16
 	bl	printf
-.LVL864:
-.L726:
-	.loc 2 565 0 is_stmt 1
+.LVL872:
+.L732:
+	.loc 2 614 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L727
-	.loc 2 566 0
+	bne	.L733
+	.loc 2 615 0
 	ldr	r2, [sp]
 	movs	r3, #0
 	str	r3, [r2, r8, lsl #2]
-.L725:
-.LVL865:
+.L731:
+.LVL873:
 	adds	r6, r6, #1
-.LVL866:
-	b	.L724
-.LVL867:
-.L727:
-	.loc 2 568 0
+.LVL874:
+	b	.L730
+.LVL875:
+.L733:
+	.loc 2 617 0
 	ldr	r2, [r5, #8]
 	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL868:
-	b	.L725
-.L734:
+.LVL876:
+	b	.L731
+.L740:
 	.align	2
-.L733:
+.L739:
 	.word	.LANCHOR20
+	.word	.LANCHOR106
 	.word	.LANCHOR108
-	.word	.LANCHOR109
 	.word	.LANCHOR143
 	.word	.LC1
 	.word	.LANCHOR123
@@ -9009,49 +9132,49 @@ ftl_map_blk_gc:
 	.type	flush_l2p_region, %function
 flush_l2p_region:
 .LFB262:
-	.loc 2 690 0
+	.loc 2 739 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL869:
+.LVL877:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 693 0
+	.loc 2 742 0
 	movs	r4, #12
-	ldr	r5, .L736
+	ldr	r5, .L742
 	muls	r4, r0, r4
-	.loc 2 694 0
-	ldr	r0, .L736+4
-.LVL870:
-	.loc 2 693 0
+	.loc 2 743 0
+	ldr	r0, .L742+4
+.LVL878:
+	.loc 2 742 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
-.LVL871:
-	.loc 2 694 0
+.LVL879:
+	.loc 2 743 0
 	ldrh	r1, [r3, r4]
-.LVL872:
+.LVL880:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL873:
-	.loc 2 695 0
+.LVL881:
+	.loc 2 744 0
 	ldr	r3, [r5]
-	.loc 2 697 0
+	.loc 2 746 0
 	movs	r0, #0
-	.loc 2 695 0
+	.loc 2 744 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-	.loc 2 697 0
+	.loc 2 746 0
 	pop	{r3, r4, r5, pc}
-.L737:
+.L743:
 	.align	2
-.L736:
-	.word	.LANCHOR56
+.L742:
+	.word	.LANCHOR55
 	.word	.LANCHOR144
 	.cfi_endproc
 .LFE262:
@@ -9066,14 +9189,14 @@ flush_l2p_region:
 	.type	log2phys, %function
 log2phys:
 .LFB265:
-	.loc 2 753 0
+	.loc 2 802 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL874:
-	.loc 2 756 0
-	ldr	r3, .L752
-	.loc 2 753 0
+.LVL882:
+	.loc 2 805 0
+	ldr	r3, .L758
+	.loc 2 802 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -9084,153 +9207,153 @@ log2phys:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 753 0
+	.loc 2 802 0
 	mov	r7, r1
 	mov	r10, r2
-	.loc 2 756 0
+	.loc 2 805 0
 	ldrh	r4, [r3]
 	adds	r3, r4, #7
-	.loc 2 757 0
+	.loc 2 806 0
 	movs	r4, #1
-	.loc 2 756 0
+	.loc 2 805 0
 	lsr	r8, r0, r3
-	.loc 2 757 0
+	.loc 2 806 0
 	lsls	r4, r4, r3
-	.loc 2 759 0
-	ldr	r3, .L752+4
-	.loc 2 757 0
+	.loc 2 808 0
+	ldr	r3, .L758+4
+	.loc 2 806 0
 	subs	r4, r4, #1
-	.loc 2 756 0
+	.loc 2 805 0
 	uxth	r8, r8
-.LVL875:
-	.loc 2 757 0
+.LVL883:
+	.loc 2 806 0
 	ands	r4, r4, r0
-	.loc 2 759 0
+	.loc 2 808 0
 	ldr	r3, [r3]
-	.loc 2 757 0
+	.loc 2 806 0
 	uxth	r4, r4
-.LVL876:
-	.loc 2 759 0
+.LVL884:
+	.loc 2 808 0
 	cmp	r0, r3
-	bcc	.L739
-	.loc 2 759 0 is_stmt 0 discriminator 1
-	movw	r2, #759
-.LVL877:
-	ldr	r1, .L752+8
-.LVL878:
-	ldr	r0, .L752+12
-.LVL879:
+	bcc	.L745
+	.loc 2 808 0 is_stmt 0 discriminator 1
+	mov	r2, #808
+.LVL885:
+	ldr	r1, .L758+8
+.LVL886:
+	ldr	r0, .L758+12
+.LVL887:
 	bl	printf
-.LVL880:
-.L739:
-	.loc 2 762 0 is_stmt 1
-	ldr	r6, .L752+16
+.LVL888:
+.L745:
+	.loc 2 811 0 is_stmt 1
+	ldr	r6, .L758+16
 	mov	fp, #12
-	.loc 2 761 0
-	ldr	r3, .L752+20
-	.loc 2 762 0
+	.loc 2 810 0
+	ldr	r3, .L758+20
+	.loc 2 811 0
 	ldr	r1, [r6]
-	.loc 2 761 0
+	.loc 2 810 0
 	ldrh	r2, [r3]
 	movs	r3, #0
-.LVL881:
-.L740:
+.LVL889:
+.L746:
 	uxth	r5, r3
-.LVL882:
-	.loc 2 761 0 is_stmt 0 discriminator 1
+.LVL890:
+	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L745
-	.loc 2 776 0 is_stmt 1
+	bcc	.L751
+	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL883:
-	.loc 2 777 0
+.LVL891:
+	.loc 2 826 0
 	mul	fp, fp, r0
 	ldr	r3, [r6]
-	.loc 2 776 0
+	.loc 2 825 0
 	mov	r5, r0
-.LVL884:
-	.loc 2 777 0
+.LVL892:
+	.loc 2 826 0
 	ldrh	r1, [r3, fp]
 	add	r2, r3, fp
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L746
-	.loc 2 777 0 is_stmt 0 discriminator 1
+	beq	.L752
+	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L746
-	.loc 2 778 0 is_stmt 1
+	bge	.L752
+	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL885:
-.L746:
-	.loc 2 781 0
+.LVL893:
+.L752:
+	.loc 2 830 0
 	mov	r1, r5
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL886:
-	.loc 2 782 0
-	b	.L741
-.LVL887:
-.L745:
+.LVL894:
+	.loc 2 831 0
+	b	.L747
+.LVL895:
+.L751:
 	adds	r3, r3, #1
-	.loc 2 762 0
+	.loc 2 811 0
 	mla	r0, fp, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L740
-.LVL888:
-.L741:
-	.loc 2 765 0
+	bne	.L746
+.LVL896:
+.L747:
+	.loc 2 814 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r3, r3, r5, r2
-	.loc 2 764 0
+	.loc 2 813 0
 	cmp	r10, #0
-	bne	.L742
-	.loc 2 765 0
+	bne	.L748
+	.loc 2 814 0
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r4, lsl #2]
 	str	r3, [r7]
-.L743:
-	.loc 2 771 0
+.L749:
+	.loc 2 820 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r5, r3, r5, r2
-.LVL889:
+.LVL897:
 	ldr	r3, [r5, #4]
 	adds	r2, r3, #1
-	beq	.L749
-	.loc 2 772 0
+	beq	.L755
+	.loc 2 821 0
 	adds	r3, r3, #1
 	str	r3, [r5, #4]
-.L749:
-	.loc 2 783 0
+.L755:
+	.loc 2 832 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL890:
-.L742:
-	.loc 2 767 0
+.LVL898:
+.L748:
+	.loc 2 816 0
 	ldr	r1, [r7]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r4, lsl #2]
-	.loc 2 768 0
+	.loc 2 817 0
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	.loc 2 769 0
-	ldr	r3, .L752+24
+	.loc 2 818 0
+	ldr	r3, .L758+24
 	strh	r8, [r3]	@ movhi
-	b	.L743
-.L753:
+	b	.L749
+.L759:
 	.align	2
-.L752:
+.L758:
 	.word	.LANCHOR22
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR145
 	.word	.LC1
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR33
-	.word	.LANCHOR57
+	.word	.LANCHOR56
 	.cfi_endproc
 .LFE265:
 	.size	log2phys, .-log2phys
@@ -9244,11 +9367,11 @@ log2phys:
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
 .LFB283:
-	.loc 2 1628 0
+	.loc 2 1677 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL891:
+.LVL899:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -24
@@ -9257,131 +9380,131 @@ FtlReUsePrevPpa:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 1628 0
+	.loc 2 1677 0
 	mov	r6, r0
-	.loc 2 1631 0
-	ldr	r5, .L764
-	.loc 2 1629 0
+	.loc 2 1680 0
+	ldr	r5, .L770
+	.loc 2 1678 0
 	ubfx	r0, r1, #10, #16
-.LVL892:
-	.loc 2 1628 0
+.LVL900:
+	.loc 2 1677 0
 	str	r1, [sp, #4]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL893:
-	.loc 2 1631 0
+.LVL901:
+	.loc 2 1680 0
 	ldr	r2, [r5]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	mov	r7, r0
-.LVL894:
-	.loc 2 1631 0
+.LVL902:
+	.loc 2 1680 0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L755
-	.loc 2 1632 0
-	ldr	r2, .L764+4
+	cbnz	r3, .L761
+	.loc 2 1681 0
+	ldr	r2, .L770+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L756
-.LBB229:
-	.loc 2 1636 0
-	ldr	r2, .L764+8
-	.loc 2 1644 0
+	beq	.L762
+.LBB262:
+	.loc 2 1685 0
+	ldr	r2, .L770+8
+	.loc 2 1693 0
 	movw	lr, #65535
-	.loc 2 1636 0
-	ldr	ip, .L764+24
-	.loc 2 1635 0
-	ldr	r0, .L764+12
-.LVL895:
-	.loc 2 1636 0
+	.loc 2 1685 0
+	ldr	ip, .L770+24
+	.loc 2 1684 0
+	ldr	r0, .L770+12
+.LVL903:
+	.loc 2 1685 0
 	ldr	r2, [r2]
-	.loc 2 1635 0
+	.loc 2 1684 0
 	ldrh	r1, [r0]
-.LVL896:
+.LVL904:
 	mov	r8, r0
-	.loc 2 1636 0
+	.loc 2 1685 0
 	subs	r4, r4, r2
 	asrs	r4, r4, #1
 	mul	r4, ip, r4
-	.loc 2 1644 0
+	.loc 2 1693 0
 	mov	ip, #6
-	.loc 2 1636 0
+	.loc 2 1685 0
 	uxth	r4, r4
-.LVL897:
-.L757:
-	.loc 2 1637 0 discriminator 1
+.LVL905:
+.L763:
+	.loc 2 1686 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L756
-	.loc 2 1638 0
+	bls	.L762
+	.loc 2 1687 0
 	cmp	r4, r7
-	bne	.L758
-	.loc 2 1639 0
+	bne	.L764
+	.loc 2 1688 0
 	mov	r1, r4
-.LVL898:
-	ldr	r0, .L764+4
+.LVL906:
+	ldr	r0, .L770+4
 	bl	List_remove_node
-.LVL899:
+.LVL907:
 	ldrh	r3, [r8]
-	cbnz	r3, .L759
-	.loc 2 1639 0 is_stmt 0 discriminator 1
-	movw	r2, #1639
-	ldr	r1, .L764+16
-	ldr	r0, .L764+20
+	cbnz	r3, .L765
+	.loc 2 1688 0 is_stmt 0 discriminator 1
+	mov	r2, #1688
+	ldr	r1, .L770+16
+	ldr	r0, .L770+20
 	bl	printf
-.LVL900:
-.L759:
-	.loc 2 1639 0 discriminator 3
+.LVL908:
+.L765:
+	.loc 2 1688 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 1640 0 is_stmt 1 discriminator 3
+	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 1639 0 discriminator 3
+	.loc 2 1688 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 1640 0 discriminator 3
+	.loc 2 1689 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL901:
-	.loc 2 1641 0 discriminator 3
+.LVL909:
+	.loc 2 1690 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.LVL902:
-.L755:
-.LBE229:
-	.loc 2 1650 0
+.LVL910:
+.L761:
+.LBE262:
+	.loc 2 1699 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L756
-.LVL903:
-.L758:
-.LBB230:
-	.loc 2 1644 0
+	b	.L762
+.LVL911:
+.L764:
+.LBB263:
+	.loc 2 1693 0
 	mul	r4, ip, r4
-.LVL904:
+.LVL912:
 	adds	r3, r3, #1
-.LVL905:
+.LVL913:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L757
-.LVL906:
-.L756:
-.LBE230:
-	.loc 2 1652 0
+	bne	.L763
+.LVL914:
+.L762:
+.LBE263:
+	.loc 2 1701 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
-.LVL907:
-	.loc 2 1653 0
+.LVL915:
+	.loc 2 1702 0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL908:
-.L765:
+.LVL916:
+.L771:
 	.align	2
-.L764:
-	.word	.LANCHOR43
+.L770:
+	.word	.LANCHOR42
 	.word	.LANCHOR47
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR48
 	.word	.LANCHOR146
 	.word	.LC1
@@ -9399,7 +9522,7 @@ FtlReUsePrevPpa:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 .LFB294:
-	.loc 2 2275 0
+	.loc 2 2325 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -9411,97 +9534,97 @@ ftl_scan_all_data:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 2281 0
+	.loc 2 2331 0
 	movs	r5, #0
-	ldr	r7, .L780
-	.loc 2 2275 0
+	ldr	r7, .L786
+	.loc 2 2325 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 56
-	.loc 2 2280 0
+	.loc 2 2330 0
 	movs	r1, #0
-	.loc 2 2284 0
-	ldr	r8, .L780+24
-	.loc 2 2280 0
-	ldr	r0, .L780+4
+	.loc 2 2334 0
+	ldr	r8, .L786+24
+	.loc 2 2330 0
+	ldr	r0, .L786+4
 	bl	printf
-.LVL909:
-.L767:
-	.loc 2 2281 0 discriminator 1
+.LVL917:
+.L773:
+	.loc 2 2331 0 discriminator 1
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L773
-	.loc 2 2303 0
+	bcc	.L779
+	.loc 2 2353 0
 	add	sp, sp, #32
 	.cfi_remember_state
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL910:
-.L773:
+.LVL918:
+.L779:
 	.cfi_restore_state
-	.loc 2 2282 0
+	.loc 2 2332 0
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL911:
-	.loc 2 2283 0
+.LVL919:
+	.loc 2 2333 0
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L768
-	.loc 2 2284 0
+	cbnz	r3, .L774
+	.loc 2 2334 0
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.LVL912:
-.L768:
-	.loc 2 2285 0
+.LVL920:
+.L774:
+	.loc 2 2335 0
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L770
-	.loc 2 2286 0
-	ldr	r4, .L780+8
-	.loc 2 2290 0
+	beq	.L776
+	.loc 2 2336 0
+	ldr	r4, .L786+8
+	.loc 2 2340 0
 	movs	r2, #0
-	.loc 2 2292 0
+	.loc 2 2342 0
 	movs	r1, #1
-	.loc 2 2286 0
+	.loc 2 2336 0
 	str	r3, [r4, #4]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	mov	r0, r4
-	.loc 2 2288 0
-	ldr	r3, .L780+12
-	.loc 2 2287 0
+	.loc 2 2338 0
+	ldr	r3, .L786+12
+	.loc 2 2337 0
 	str	r5, [r4, #16]
-	.loc 2 2290 0
+	.loc 2 2340 0
 	str	r2, [r4]
-	.loc 2 2288 0
+	.loc 2 2338 0
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
-	.loc 2 2289 0
-	ldr	r3, .L780+16
+	.loc 2 2339 0
+	ldr	r3, .L786+16
 	ldr	r6, [r3]
-.LVL913:
+.LVL921:
 	str	r6, [r4, #12]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL914:
-	.loc 2 2293 0
+.LVL922:
+	.loc 2 2343 0
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L771
-	.loc 2 2293 0 is_stmt 0 discriminator 1
+	beq	.L777
+	.loc 2 2343 0 is_stmt 0 discriminator 1
 	adds	r3, r3, #1
-	beq	.L771
-	.loc 2 2294 0 is_stmt 1
+	beq	.L777
+	.loc 2 2344 0 is_stmt 1
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L770
-.L771:
-	.loc 2 2297 0
+	beq	.L776
+.L777:
+	.loc 2 2347 0
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L780+20
+	ldr	r0, .L786+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -9516,22 +9639,22 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.LVL915:
-.L770:
-	.loc 2 2281 0 discriminator 2
+.LVL923:
+.L776:
+	.loc 2 2331 0 discriminator 2
 	adds	r5, r5, #1
-.LVL916:
-	b	.L767
-.L781:
+.LVL924:
+	b	.L773
+.L787:
 	.align	2
-.L780:
-	.word	.LANCHOR62
-	.word	.LC88
+.L786:
+	.word	.LANCHOR61
+	.word	.LC91
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.word	.LANCHOR39
-	.word	.LANCHOR109
-	.word	.LC90
-	.word	.LC89
+	.word	.LC93
+	.word	.LC92
 	.cfi_endproc
 .LFE294:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -9549,9 +9672,9 @@ FtlReadRefresh:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL917:
+.LVL925:
 	.loc 5 425 0
-	ldr	r3, .L795
+	ldr	r3, .L801
 	.loc 5 419 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -9565,28 +9688,28 @@ FtlReadRefresh:
 	.loc 5 425 0
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
-	beq	.L783
+	beq	.L789
 	.loc 5 426 0
-	ldr	r6, .L795+4
+	ldr	r6, .L801+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
 	cmp	r0, r1
-	bcs	.L784
+	bcs	.L790
 	mov	r5, #2048
-.L789:
-.LVL918:
-.LBB236:
-.LBB237:
+.L795:
+.LVL926:
+.LBB269:
+.LBB270:
 	.loc 5 428 0
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L786
+	bcs	.L792
 	.loc 5 430 0
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL919:
+.LVL927:
 	.loc 5 432 0
 	ldr	r2, [sp]
 	.loc 5 431 0
@@ -9597,14 +9720,14 @@ FtlReadRefresh:
 	add	r3, r3, #1
 	str	r3, [r4, #84]
 	.loc 5 432 0
-	beq	.L787
-.LBB238:
+	beq	.L793
+.LBB271:
 	.loc 5 435 0
 	str	r3, [sp, #20]
 	.loc 5 438 0
 	add	r0, sp, #88
 	.loc 5 436 0
-	ldr	r3, .L795+8
+	ldr	r3, .L801+8
 	.loc 5 439 0
 	movs	r1, #1
 	.loc 5 434 0
@@ -9619,46 +9742,46 @@ FtlReadRefresh:
 	str	r3, [sp, #16]
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL920:
+.LVL928:
 	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L786
+	bne	.L792
 	.loc 5 442 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL921:
+.LVL929:
 	bl	FtlGcRefreshBlock
-.LVL922:
-.L786:
-.LBE238:
+.LVL930:
+.L792:
+.LBE271:
 	mov	r0, #-1
-.L782:
-.LBE237:
-.LBE236:
+.L788:
+.LBE270:
+.LBE269:
 	.loc 5 466 0
 	add	sp, sp, #88
 	.cfi_remember_state
 	.cfi_def_cfa_offset 16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.LVL923:
-.L787:
+.LVL931:
+.L793:
 	.cfi_restore_state
-.LBB240:
-.LBB239:
+.LBB273:
+.LBB272:
 	.loc 5 427 0
 	subs	r5, r5, #1
-.LVL924:
-	bne	.L789
-	b	.L786
-.LVL925:
-.L784:
-.LBE239:
-.LBE240:
+.LVL932:
+	bne	.L795
+	b	.L792
+.LVL933:
+.L790:
+.LBE272:
+.LBE273:
 	.loc 5 451 0
-	ldr	r2, .L795+12
+	ldr	r2, .L801+12
 	.loc 5 449 0
 	movs	r0, #0
 	str	r0, [r3, #80]
@@ -9667,19 +9790,19 @@ FtlReadRefresh:
 	.loc 5 451 0
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
-	b	.L782
-.L783:
-.LVL926:
-.LBB241:
+	b	.L788
+.L789:
+.LVL934:
+.LBB274:
 	.loc 5 456 0
 	ldr	r1, [r3, #76]
-	ldr	r3, .L795+12
+	ldr	r3, .L801+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
-	bhi	.L792
+	bhi	.L798
 	.loc 5 454 0
-	ldr	r3, .L795+16
+	ldr	r3, .L801+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
@@ -9687,13 +9810,13 @@ FtlReadRefresh:
 	.loc 5 457 0
 	add	r3, r3, r1
 	cmp	r5, r3
-	bhi	.L792
+	bhi	.L798
 	.loc 5 458 0
-	ldr	r3, .L795+20
+	ldr	r3, .L801+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L782
-.L792:
+	bne	.L788
+.L798:
 	.loc 5 460 0
 	movs	r3, #1
 	.loc 5 461 0
@@ -9704,17 +9827,17 @@ FtlReadRefresh:
 	str	r0, [r4, #84]
 	.loc 5 462 0
 	str	r5, [r4, #76]
-	b	.L782
-.L796:
+	b	.L788
+.L802:
 	.align	2
-.L795:
-	.word	.LANCHOR83
-	.word	.LANCHOR62
+.L801:
+	.word	.LANCHOR81
+	.word	.LANCHOR61
 	.word	ftl_temp_buf
-	.word	.LANCHOR63
-	.word	.LANCHOR77
-	.word	.LANCHOR79
-.LBE241:
+	.word	.LANCHOR62
+	.word	.LANCHOR76
+	.word	.LANCHOR39
+.LBE274:
 	.cfi_endproc
 .LFE321:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9728,71 +9851,71 @@ FtlReadRefresh:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 .LFB270:
-	.loc 2 897 0
+	.loc 2 946 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL927:
-	.loc 2 903 0
+.LVL935:
+	.loc 2 952 0
 	ldr	r3, [r0, #36]
-	.loc 2 897 0
+	.loc 2 946 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 897 0
+	.loc 2 946 0
 	mov	r6, r0
-	.loc 2 903 0
-	cbz	r3, .L797
-	.loc 2 899 0
+	.loc 2 952 0
+	cbz	r3, .L803
+	.loc 2 948 0
 	ldrh	r5, [r0, #6]
-	.loc 2 905 0
+	.loc 2 954 0
 	movs	r3, #0
-	.loc 2 900 0
+	.loc 2 949 0
 	ldr	r2, [r0, #24]
-	.loc 2 905 0
+	.loc 2 954 0
 	str	r3, [r0, #36]
-	.loc 2 899 0
+	.loc 2 948 0
 	subs	r5, r5, #1
-	.loc 2 907 0
-	ldr	r3, .L801
-	.loc 2 908 0
-	ldr	r1, .L801+4
-	.loc 2 930 0
+	.loc 2 956 0
+	ldr	r3, .L807
+	.loc 2 957 0
+	ldr	r1, .L807+4
+	.loc 2 979 0
 	uxth	r5, r5
-	.loc 2 907 0
-	ldr	r4, .L801+8
-	.loc 2 930 0
+	.loc 2 956 0
+	ldr	r4, .L807+8
+	.loc 2 979 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL928:
-	.loc 2 907 0
+.LVL936:
+	.loc 2 956 0
 	ldr	r0, [r3]
-.LVL929:
-	.loc 2 908 0
+.LVL937:
+	.loc 2 957 0
 	ldr	r1, [r1]
-	.loc 2 931 0
+	.loc 2 980 0
 	str	r2, [r4, #4]
-	.loc 2 907 0
+	.loc 2 956 0
 	str	r0, [r4, #8]
-	.loc 2 908 0
+	.loc 2 957 0
 	str	r1, [r4, #12]
-	.loc 2 932 0
-	cbz	r2, .L799
-	.loc 2 934 0
+	.loc 2 981 0
+	cbz	r2, .L805
+	.loc 2 983 0
 	movs	r2, #1
-.LVL930:
+.LVL938:
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL931:
-.L800:
-	.loc 2 941 0
+.LVL939:
+.L806:
+	.loc 2 990 0
 	ldr	r2, [r4, #8]
 	mov	r1, r5
 	mov	r0, r6
-	.loc 2 943 0
+	.loc 2 992 0
 	pop	{r4, r5, r6, lr}
 	.cfi_remember_state
 	.cfi_restore 14
@@ -9800,29 +9923,29 @@ FtlMapBlkWriteDump_data:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL932:
-	.loc 2 941 0
+.LVL940:
+	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL933:
-.L799:
+.LVL941:
+.L805:
 	.cfi_restore_state
-	.loc 2 938 0
-	ldr	r3, .L801+12
+	.loc 2 987 0
+	ldr	r3, .L807+12
 	movs	r1, #255
 	ldrh	r2, [r3]
-.LVL934:
+.LVL942:
 	bl	ftl_memset
-.LVL935:
-	b	.L800
-.LVL936:
-.L797:
+.LVL943:
+	b	.L806
+.LVL944:
+.L803:
 	pop	{r4, r5, r6, pc}
-.L802:
+.L808:
 	.align	2
-.L801:
+.L807:
 	.word	.LANCHOR123
-	.word	.LANCHOR109
 	.word	.LANCHOR108
+	.word	.LANCHOR106
 	.word	.LANCHOR23
 	.cfi_endproc
 .LFE270:
@@ -9837,7 +9960,7 @@ FtlMapBlkWriteDump_data:
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
 .LFB273:
-	.loc 2 1095 0
+	.loc 2 1144 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -9851,432 +9974,428 @@ FtlScanSysBlk:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 1101 0
+	.loc 2 1150 0
 	movs	r4, #0
-	.loc 2 1103 0
-	ldr	r5, .L884
-	.loc 2 1095 0
+	.loc 2 1152 0
+	ldr	r5, .L889
+	.loc 2 1144 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
-	.loc 2 1103 0
+	.loc 2 1152 0
 	mov	r1, r4
-	.loc 2 1102 0
-	ldr	r3, .L884+4
-	.loc 2 1103 0
+	.loc 2 1151 0
+	ldr	r3, .L889+4
+	.loc 2 1152 0
 	ldr	r2, [r5]
-	.loc 2 1101 0
-	ldr	r6, .L884+8
-	.loc 2 1102 0
+	.loc 2 1150 0
+	ldr	r6, .L889+8
+	.loc 2 1151 0
 	strh	r4, [r3]	@ movhi
-	.loc 2 1103 0
-	ldr	r3, .L884+12
+	.loc 2 1152 0
+	ldr	r3, .L889+12
 	lsls	r2, r2, #2
-	.loc 2 1101 0
+	.loc 2 1150 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 1105 0
-	ldr	r7, .L884+16
-	.loc 2 1103 0
+	.loc 2 1154 0
+	ldr	r7, .L889+16
+	.loc 2 1152 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL937:
-	.loc 2 1104 0
+.LVL945:
+	.loc 2 1153 0
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L884+20
+	ldr	r3, .L889+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL938:
-	.loc 2 1105 0
+.LVL946:
+	.loc 2 1154 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L884+24
+	ldr	r3, .L889+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL939:
-	.loc 2 1106 0
+.LVL947:
+	.loc 2 1155 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L884+28
+	ldr	r3, .L889+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL940:
-	.loc 2 1107 0
+.LVL948:
+	.loc 2 1156 0
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L884+32
+	ldr	r0, .L889+32
 	bl	ftl_memset
-.LVL941:
-	.loc 2 1109 0
-	ldr	r3, .L884+36
+.LVL949:
+	.loc 2 1158 0
+	ldr	r3, .L889+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.LVL942:
-.L804:
-	.loc 2 1109 0 is_stmt 0 discriminator 1
-	ldr	r3, .L884+40
+.LVL950:
+.L810:
+	.loc 2 1158 0 is_stmt 0 discriminator 1
+	ldr	r3, .L889+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L845
-	.loc 2 1113 0 is_stmt 1 discriminator 1
-	ldr	r3, .L884+44
-	.loc 2 1120 0 discriminator 1
+	bls	.L851
+	.loc 2 1162 0 is_stmt 1 discriminator 1
+	ldr	r3, .L889+44
+	.loc 2 1169 0 discriminator 1
 	movs	r5, #0
-	ldr	r1, .L884+48
+	ldr	r1, .L889+48
 	mov	fp, r5
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1167 0 discriminator 1
 	movs	r7, #20
-	.loc 2 1113 0 discriminator 1
+	.loc 2 1162 0 discriminator 1
 	ldrh	r8, [r3]
-	.loc 2 1118 0 discriminator 1
-	ldr	r3, .L884+52
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1167 0 discriminator 1
+	ldr	r3, .L889+52
+	.loc 2 1169 0 discriminator 1
 	ldr	r2, [r1]
-	ldr	r1, .L884+56
-	.loc 2 1118 0 discriminator 1
+	ldr	r1, .L889+56
+	.loc 2 1167 0 discriminator 1
 	ldr	r6, [r3]
-	.loc 2 1119 0 discriminator 1
-	ldr	r3, .L884+60
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
+	ldr	r3, .L889+60
+	.loc 2 1169 0 discriminator 1
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
-	.loc 2 1119 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
 	ldr	r3, [r3]
-	.loc 2 1115 0 discriminator 1
-	ldr	r2, .L884+64
-	b	.L846
-.LVL943:
-.L806:
-	.loc 2 1115 0 is_stmt 0
+	.loc 2 1164 0 discriminator 1
+	ldr	r2, .L889+64
+	b	.L852
+.LVL951:
+.L812:
+	.loc 2 1164 0 is_stmt 0
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
 	str	r2, [sp, #24]
 	bl	V2P_block
-.LVL944:
+.LVL952:
 	str	r0, [sp, #20]
-.LVL945:
-	.loc 2 1116 0 is_stmt 1
+.LVL953:
+	.loc 2 1165 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL946:
+.LVL954:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L805
-	.loc 2 1118 0
+	cbnz	r0, .L811
+	.loc 2 1167 0
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
-	.loc 2 1120 0
+	.loc 2 1169 0
 	ldr	r4, [sp, #8]
-	.loc 2 1118 0
+	.loc 2 1167 0
 	lsls	r1, r1, #10
-	.loc 2 1119 0
+	.loc 2 1168 0
 	str	r3, [r0, #8]
-	.loc 2 1118 0
+	.loc 2 1167 0
 	str	r1, [r0, #4]
-	.loc 2 1120 0
+	.loc 2 1169 0
 	mul	r1, r10, fp
 	bic	r1, r1, #3
 	add	r1, r1, r4
 	str	r1, [r0, #12]
-	.loc 2 1121 0
+	.loc 2 1170 0
 	add	r1, fp, #1
 	uxth	fp, r1
-.LVL947:
-.L805:
+.LVL955:
+.L811:
 	adds	r5, r5, #1
-.LVL948:
-.L846:
-	.loc 2 1113 0 discriminator 1
+.LVL956:
+.L852:
+	.loc 2 1162 0 discriminator 1
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L806
-	.loc 2 1124 0
+	bhi	.L812
+	.loc 2 1173 0
 	cmp	fp, #0
-	bne	.L807
-.LVL949:
-.L844:
-	.loc 2 1109 0
+	bne	.L813
+.LVL957:
+.L850:
+	.loc 2 1158 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-.LVL950:
-	b	.L804
-.LVL951:
-.L807:
-	.loc 2 1128 0
+.LVL958:
+	b	.L810
+.LVL959:
+.L813:
+	.loc 2 1177 0
 	movs	r7, #0
-	.loc 2 1127 0
+	.loc 2 1176 0
 	movs	r2, #1
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.LVL952:
-.L808:
-	.loc 2 1128 0 discriminator 1
+.LVL960:
+.L814:
+	.loc 2 1177 0 discriminator 1
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L844
-	.loc 2 1129 0
-	ldr	r3, .L884+52
+	bls	.L850
+	.loc 2 1178 0
+	ldr	r3, .L889+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
 	add	r2, r3, r8
-	.loc 2 1132 0
+	.loc 2 1181 0
 	ldr	r3, [r3, r8]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ldr	r5, [r2, #4]
-	.loc 2 1130 0
+	.loc 2 1179 0
 	ldr	r6, [r2, #12]
-	.loc 2 1132 0
+	.loc 2 1181 0
 	adds	r3, r3, #1
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ubfx	r5, r5, #10, #16
-.LVL953:
-	.loc 2 1132 0
-	bne	.L811
+.LVL961:
+	.loc 2 1181 0
+	bne	.L817
 	mov	r10, #16
-.L813:
-.LVL954:
-	.loc 2 1134 0
-	ldr	r3, .L884+52
-	.loc 2 1135 0
+.L819:
+.LVL962:
+	.loc 2 1183 0
+	ldr	r3, .L889+52
+	.loc 2 1184 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 1134 0
+	.loc 2 1183 0
 	ldr	r0, [r3]
 	add	r0, r0, r8
 	ldr	r3, [r0, #4]
 	adds	r3, r3, #1
 	str	r3, [r0, #4]
-	.loc 2 1135 0
+	.loc 2 1184 0
 	bl	FlashReadPages
-.LVL955:
-	.loc 2 1136 0
+.LVL963:
+	.loc 2 1185 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	.loc 2 1137 0
-	ldr	r3, .L884+52
+	.loc 2 1186 0
+	ldr	r3, .L889+52
 	ldr	r3, [r3]
-	.loc 2 1136 0
-	bne	.L810
-	.loc 2 1137 0
+	.loc 2 1185 0
+	bne	.L816
+	.loc 2 1186 0
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	.loc 2 1145 0
-	ldr	r3, .L884+52
+	.loc 2 1194 0
+	ldr	r3, .L889+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L811
-.LVL956:
-.L812:
-	.loc 2 1287 0
-	movs	r1, #1
-	b	.L883
-.LVL957:
-.L810:
-	.loc 2 1139 0
+	bne	.L817
+.LVL964:
+.L818:
+	.loc 2 1336 0
+	movs	r1, #0
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+.LVL965:
+	b	.L822
+.LVL966:
+.L816:
+	.loc 2 1188 0
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L811
-.LVL958:
+	bne	.L817
+.LVL967:
 	add	r10, r10, #-1
-.LVL959:
+.LVL968:
 	uxth	r10, r10
-	.loc 2 1133 0 discriminator 2
+	.loc 2 1182 0 discriminator 2
 	cmp	r10, #0
-	bne	.L813
-	b	.L812
-.L811:
-	.loc 2 1147 0
-	ldr	r3, .L884+68
+	bne	.L819
+	b	.L818
+.L817:
+	.loc 2 1196 0
+	ldr	r3, .L889+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L814
-	.loc 2 1147 0 is_stmt 0 discriminator 1
+	beq	.L820
+	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L815
-.L814:
-	.loc 2 1149 0 is_stmt 1
+	bhi	.L821
+.L820:
+	.loc 2 1198 0 is_stmt 1
 	adds	r2, r3, #1
-	.loc 2 1152 0
+	.loc 2 1201 0
 	ittt	ne
-	ldrne	r1, .L884+68
+	ldrne	r1, .L889+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L815:
-	.loc 2 1157 0
+.L821:
+	.loc 2 1206 0
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L817
-	bhi	.L818
+	beq	.L823
+	bhi	.L824
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L819
-.L816:
-.LVL960:
+	beq	.L825
+.L822:
+.LVL969:
 	adds	r7, r7, #1
-.LVL961:
-	b	.L808
-.LVL962:
-.L818:
+.LVL970:
+	b	.L814
+.LVL971:
+.L824:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L820
+	beq	.L826
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L816
-	.loc 2 1280 0
-	movs	r1, #0
-.L883:
-	.loc 2 1287 0
-	mov	r0, r5
-	bl	FtlFreeSysBlkQueueIn
-.LVL963:
-	b	.L816
-.L820:
-	.loc 2 1162 0
-	ldr	r3, .L884+8
+	beq	.L818
+	b	.L822
+.L826:
+	.loc 2 1211 0
+	ldr	r3, .L889+8
 	ldrh	r2, [r3]
-	ldr	r3, .L884
+	ldr	r3, .L889
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L822
-	.loc 2 1162 0 is_stmt 0 discriminator 1
-	movw	r2, #1162
-	ldr	r1, .L884+72
-	ldr	r0, .L884+76
+	bls	.L828
+	.loc 2 1211 0 is_stmt 0 discriminator 1
+	movw	r2, #1211
+	ldr	r1, .L889+72
+	ldr	r0, .L889+76
 	bl	printf
-.LVL964:
-.L822:
-	.loc 2 1163 0 is_stmt 1
+.LVL972:
+.L828:
+	.loc 2 1212 0 is_stmt 1
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
-	.loc 2 1165 0
-	ldr	r2, .L884+12
-	.loc 2 1163 0
+	.loc 2 1214 0
+	ldr	r2, .L889+12
+	.loc 2 1212 0
 	uxth	r10, r1
-	.loc 2 1165 0
+	.loc 2 1214 0
 	ldr	ip, [r2]
-	.loc 2 1163 0
+	.loc 2 1212 0
 	add	r3, r10, #-1
 	sub	r10, r10, r0
 	add	r10, r10, #-1
 	sxth	r3, r3
-.LVL965:
+.LVL973:
 	sxth	r10, r10
-.L823:
-	.loc 2 1163 0 is_stmt 0 discriminator 1
+.L829:
+	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	bgt	.L829
-	.loc 2 1186 0 is_stmt 1
+	bgt	.L835
+	.loc 2 1235 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L861
-	b	.L816
-.L829:
-	.loc 2 1165 0
+	bge	.L867
+	b	.L822
+.L835:
+	.loc 2 1214 0
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L824
-	.loc 2 1167 0
+	bls	.L830
+	.loc 2 1216 0
 	ldr	r2, [ip]
-	cbnz	r2, .L825
-	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L831
+	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
-	.loc 2 1172 0 is_stmt 1 discriminator 1
+	.loc 2 1221 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L884+8
+	ldrne	r2, .L889+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L825:
-	.loc 2 1178 0 discriminator 1
-	ldr	r2, .L884+20
-	.loc 2 1175 0 discriminator 1
+.L831:
+	.loc 2 1227 0 discriminator 1
+	ldr	r2, .L889+20
+	.loc 2 1224 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1178 0 discriminator 1
+	.loc 2 1227 0 discriminator 1
 	ldr	r0, [r2]
 	movs	r2, #0
-.L826:
-	.loc 2 1175 0 discriminator 1
+.L832:
+	.loc 2 1224 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL966:
+.LVL974:
 	cmp	r10, lr
-	bhi	.L827
-	.loc 2 1180 0
+	bhi	.L833
+	.loc 2 1229 0
 	ldr	r2, [r6, #4]
-	.loc 2 1186 0
+	.loc 2 1235 0
 	cmp	r3, #0
-	.loc 2 1180 0
+	.loc 2 1229 0
 	str	r2, [r8]
-	.loc 2 1181 0
+	.loc 2 1230 0
 	strh	r5, [r0, r3, lsl #1]	@ movhi
-	.loc 2 1186 0
-	blt	.L816
-	.loc 2 1193 0
-	ldr	r2, .L884+8
+	.loc 2 1235 0
+	blt	.L822
+	.loc 2 1242 0
+	ldr	r2, .L889+8
 	ldrh	r0, [r2]
-	ldr	r2, .L884
+	ldr	r2, .L889
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L816
-.LVL967:
-.L861:
-	.loc 2 1195 0
-	ldr	r2, .L884+8
+	bgt	.L822
+.LVL975:
+.L867:
+	.loc 2 1244 0
+	ldr	r2, .L889+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
-	.loc 2 1196 0
+	.loc 2 1245 0
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
-	.loc 2 1197 0
-	ldr	r2, .L884+20
-.L881:
-	.loc 2 1241 0
+	.loc 2 1246 0
+	ldr	r2, .L889+20
+.L887:
+	.loc 2 1290 0
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L816
-.LVL968:
-.L827:
-	.loc 2 1177 0 discriminator 3
+	b	.L822
+.LVL976:
+.L833:
+	.loc 2 1226 0 discriminator 3
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	add	lr, r0, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1177 0 discriminator 3
+	.loc 2 1226 0 discriminator 3
 	str	r4, [ip, r1, lsl #2]
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-.LVL969:
-	b	.L826
-.L824:
+.LVL977:
+	b	.L832
+.L830:
 	subs	r3, r3, #1
-.LVL970:
+.LVL978:
 	sxth	r3, r3
-.LVL971:
-	b	.L823
-.L885:
+.LVL979:
+	b	.L829
+.L890:
 	.align	2
-.L884:
+.L889:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR147
@@ -10285,302 +10404,302 @@ FtlScanSysBlk:
 	.word	.LANCHOR129
 	.word	.LANCHOR132
 	.word	.LANCHOR36
-	.word	.LANCHOR81
+	.word	.LANCHOR79
 	.word	.LANCHOR5
 	.word	.LANCHOR6
 	.word	.LANCHOR3
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR120
 	.word	.LANCHOR24
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR13
-	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LANCHOR148
 	.word	.LC1
-.LVL972:
-.L819:
-	.loc 2 1203 0
-	ldr	r8, .L886+12
-	ldr	r10, .L886+20
+.LVL980:
+.L825:
+	.loc 2 1252 0
+	ldr	r8, .L891+12
+	ldr	r10, .L891+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L832
-	.loc 2 1203 0 is_stmt 0 discriminator 1
-	movw	r2, #1203
-	ldr	r1, .L886
-	ldr	r0, .L886+4
+	bls	.L838
+	.loc 2 1252 0 is_stmt 0 discriminator 1
+	movw	r2, #1252
+	ldr	r1, .L891
+	ldr	r0, .L891+4
 	bl	printf
-.LVL973:
-.L832:
-	.loc 2 1206 0 is_stmt 1
-	ldr	r2, .L886+8
-	.loc 2 1204 0
+.LVL981:
+.L838:
+	.loc 2 1255 0 is_stmt 1
+	ldr	r2, .L891+8
+	.loc 2 1253 0
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
-	.loc 2 1206 0
+	.loc 2 1255 0
 	ldr	r0, [r2]
-	.loc 2 1204 0
+	.loc 2 1253 0
 	add	r10, lr, #-1
 	sxth	r3, r10
-.LVL974:
+.LVL982:
 	sub	r10, r10, ip
-.L833:
-	.loc 2 1204 0 is_stmt 0 discriminator 1
+.L839:
+	.loc 2 1253 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	ble	.L838
-	.loc 2 1206 0 is_stmt 1
+	ble	.L844
+	.loc 2 1255 0 is_stmt 1
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L834
-	.loc 2 1208 0
+	bls	.L840
+	.loc 2 1257 0
 	ldr	r2, [r0]
-	cbnz	r2, .L835
-	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cbnz	r2, .L841
+	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	lr, ip
-	.loc 2 1216 0 is_stmt 1 discriminator 1
+	.loc 2 1265 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L886+12
+	ldrne	r2, .L891+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L835:
-	.loc 2 1221 0 discriminator 1
-	ldr	r2, .L886+16
-	.loc 2 1218 0 discriminator 1
+.L841:
+	.loc 2 1270 0 discriminator 1
+	ldr	r2, .L891+16
+	.loc 2 1267 0 discriminator 1
 	uxth	r10, r3
-	.loc 2 1221 0 discriminator 1
+	.loc 2 1270 0 discriminator 1
 	ldr	ip, [r2]
 	movs	r2, #0
-.L836:
-	.loc 2 1218 0 discriminator 1
+.L842:
+	.loc 2 1267 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL975:
+.LVL983:
 	cmp	r10, lr
-	bhi	.L837
-	.loc 2 1223 0
+	bhi	.L843
+	.loc 2 1272 0
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
-	.loc 2 1224 0
+	.loc 2 1273 0
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.LVL976:
-.L838:
-	.loc 2 1229 0
+.LVL984:
+.L844:
+	.loc 2 1278 0
 	cmp	r3, #0
-	blt	.L816
-	.loc 2 1237 0
-	ldr	r2, .L886+20
-	ldr	ip, .L886+12
+	blt	.L822
+	.loc 2 1286 0
+	ldr	r2, .L891+20
+	ldr	ip, .L891+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L816
-	.loc 2 1240 0
+	bgt	.L822
+	.loc 2 1289 0
 	ldr	r2, [r6, #4]
-	.loc 2 1239 0
+	.loc 2 1288 0
 	adds	r1, r1, #1
 	strh	r1, [ip]	@ movhi
-	.loc 2 1240 0
+	.loc 2 1289 0
 	str	r2, [r0, r3, lsl #2]
-	.loc 2 1241 0
-	ldr	r2, .L886+16
-	b	.L881
-.LVL977:
-.L837:
-	.loc 2 1220 0 discriminator 3
+	.loc 2 1290 0
+	ldr	r2, .L891+16
+	b	.L887
+.LVL985:
+.L843:
+	.loc 2 1269 0 discriminator 3
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
 	ldr	r4, [lr, #4]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	add	lr, ip, r1, lsl #1
 	ldrh	lr, [lr, #2]
-	.loc 2 1220 0 discriminator 3
+	.loc 2 1269 0 discriminator 3
 	str	r4, [r0, r1, lsl #2]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-.LVL978:
-	b	.L836
-.L834:
+.LVL986:
+	b	.L842
+.L840:
 	subs	r3, r3, #1
-.LVL979:
+.LVL987:
 	sxth	r3, r3
-.LVL980:
-	b	.L833
-.LVL981:
-.L817:
-	.loc 2 1248 0
-	ldr	r8, .L886+40
+.LVL988:
+	b	.L839
+.LVL989:
+.L823:
+	.loc 2 1297 0
+	ldr	r8, .L891+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L840
-.L882:
-	.loc 2 1260 0
+	bne	.L846
+.L888:
+	.loc 2 1309 0
 	strh	r5, [r8]	@ movhi
-	.loc 2 1261 0
+	.loc 2 1310 0
 	str	r3, [r8, #8]
-	b	.L816
-.L840:
-	.loc 2 1255 0
+	b	.L822
+.L846:
+	.loc 2 1304 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L841
-	.loc 2 1256 0
+	beq	.L847
+	.loc 2 1305 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL982:
-.L841:
-	.loc 2 1257 0
+.LVL990:
+.L847:
+	.loc 2 1306 0
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L842
-	.loc 2 1259 0
+	bcs	.L848
+	.loc 2 1308 0
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L882
-.L842:
-	.loc 2 1265 0
+	b	.L888
+.L848:
+	.loc 2 1314 0
 	strh	r5, [r8, #4]	@ movhi
-	b	.L816
-.LVL983:
-.L845:
-	.loc 2 1292 0
-	ldr	r3, .L886+24
+	b	.L822
+.LVL991:
+.L851:
+	.loc 2 1341 0
+	ldr	r3, .L891+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L847
-.L850:
-	.loc 2 1310 0
-	ldr	r3, .L886+16
+	cbz	r3, .L853
+.L856:
+	.loc 2 1359 0
+	ldr	r3, .L891+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L848
-.L849:
-	.loc 2 1328 0
-	ldr	r3, .L886+28
+	beq	.L854
+.L855:
+	.loc 2 1377 0
+	ldr	r3, .L891+28
 	ldrh	r2, [r3]
-	ldr	r3, .L886+32
+	ldr	r3, .L891+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L880
-	.loc 2 1328 0 is_stmt 0 discriminator 1
-	mov	r2, #1328
-	ldr	r1, .L886
-	ldr	r0, .L886+4
+	bls	.L886
+	.loc 2 1377 0 is_stmt 0 discriminator 1
+	movw	r2, #1377
+	ldr	r1, .L891
+	ldr	r0, .L891+4
 	bl	printf
-.LVL984:
-.L880:
-	.loc 2 1330 0 is_stmt 1
+.LVL992:
+.L886:
+	.loc 2 1379 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #32
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL985:
-.L847:
+.LVL993:
+.L853:
 	.cfi_restore_state
-	.loc 2 1292 0 discriminator 1
-	ldr	r1, .L886+28
+	.loc 2 1341 0 discriminator 1
+	ldr	r1, .L891+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L850
-	.loc 2 1294 0 discriminator 1
-	ldr	r5, .L886+32
+	beq	.L856
+	.loc 2 1343 0 discriminator 1
+	ldr	r5, .L891+32
 	ldr	r0, [r5]
-.L851:
+.L857:
 	sxth	r1, r3
-.LVL986:
+.LVL994:
 	cmp	r1, r0
-	bcs	.L850
-	.loc 2 1296 0
+	bcs	.L856
+	.loc 2 1345 0
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L851
-	.loc 2 1301 0
-	ldr	r3, .L886+36
-	.loc 2 1302 0
+	beq	.L857
+	.loc 2 1350 0
+	ldr	r3, .L891+36
+	.loc 2 1351 0
 	movs	r6, #0
-	.loc 2 1301 0
+	.loc 2 1350 0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L852:
-.LVL987:
-	.loc 2 1298 0 discriminator 1
+.L858:
+.LVL995:
+	.loc 2 1347 0 discriminator 1
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L850
-	.loc 2 1300 0 discriminator 3
+	bcs	.L856
+	.loc 2 1349 0 discriminator 3
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
 	strh	r7, [r2, r4, lsl #1]	@ movhi
-	.loc 2 1301 0 discriminator 3
+	.loc 2 1350 0 discriminator 3
 	ldr	r7, [r0, r3, lsl #2]
 	str	r7, [r0, r4, lsl #2]
-	.loc 2 1302 0 discriminator 3
+	.loc 2 1351 0 discriminator 3
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-.LVL988:
+.LVL996:
 	sxth	r3, r3
-.LVL989:
-	b	.L852
-.LVL990:
-.L848:
-	.loc 2 1310 0 discriminator 1
-	ldr	r3, .L886+12
+.LVL997:
+	b	.L858
+.LVL998:
+.L854:
+	.loc 2 1359 0 discriminator 1
+	ldr	r3, .L891+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L849
-	.loc 2 1312 0 discriminator 1
-	ldr	r5, .L886+20
+	beq	.L855
+	.loc 2 1361 0 discriminator 1
+	ldr	r5, .L891+20
 	ldrh	r1, [r5]
-.L857:
+.L863:
 	sxth	r3, r2
-.LVL991:
+.LVL999:
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L849
-	.loc 2 1314 0
+	bge	.L855
+	.loc 2 1363 0
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L857
-	.loc 2 1319 0
-	ldr	r2, .L886+8
-	.loc 2 1320 0
+	beq	.L863
+	.loc 2 1368 0
+	ldr	r2, .L891+8
+	.loc 2 1369 0
 	movs	r0, #0
-	.loc 2 1319 0
+	.loc 2 1368 0
 	ldr	r2, [r2]
-.LVL992:
-.L858:
-	.loc 2 1316 0 discriminator 1
+.LVL1000:
+.L864:
+	.loc 2 1365 0 discriminator 1
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L849
-	.loc 2 1318 0 discriminator 3
+	bge	.L855
+	.loc 2 1367 0 discriminator 3
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
 	strh	r7, [r4, r1, lsl #1]	@ movhi
-	.loc 2 1319 0 discriminator 3
+	.loc 2 1368 0 discriminator 3
 	ldr	r7, [r2, r3, lsl #2]
 	str	r7, [r2, r1, lsl #2]
 	adds	r1, r3, #1
-	.loc 2 1320 0 discriminator 3
+	.loc 2 1369 0 discriminator 3
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-.LVL993:
-	b	.L858
-.L887:
+.LVL1001:
+	b	.L864
+.L892:
 	.align	2
-.L886:
+.L891:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR132
@@ -10591,7 +10710,7 @@ FtlScanSysBlk:
 	.word	.LANCHOR147
 	.word	.LANCHOR30
 	.word	.LANCHOR135
-	.word	.LANCHOR81
+	.word	.LANCHOR79
 	.cfi_endproc
 .LFE273:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -10605,16 +10724,16 @@ FtlScanSysBlk:
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
 .LFB278:
-	.loc 2 1466 0
+	.loc 2 1515 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL994:
-	.loc 2 1472 0
+.LVL1002:
+	.loc 2 1521 0
 	ldr	r3, [r0, #16]
-	.loc 2 1477 0
+	.loc 2 1526 0
 	movs	r1, #0
-	.loc 2 1466 0
+	.loc 2 1515 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -10627,319 +10746,319 @@ FtlMapTblRecovery:
 	.cfi_offset 14, -4
 	sub	sp, sp, #24
 	.cfi_def_cfa_offset 56
-	.loc 2 1473 0
+	.loc 2 1522 0
 	ldrh	fp, [r0, #6]
-	.loc 2 1466 0
+	.loc 2 1515 0
 	mov	r4, r0
-	.loc 2 1483 0
+	.loc 2 1532 0
 	movs	r6, #0
-	.loc 2 1470 0
+	.loc 2 1519 0
 	ldr	r8, [r0, #24]
-.LVL995:
-	.loc 2 1472 0
+.LVL1003:
+	.loc 2 1521 0
 	str	r3, [sp, #12]
-	.loc 2 1474 0
+	.loc 2 1523 0
 	ldrh	r3, [r0, #8]
-	.loc 2 1477 0
+	.loc 2 1526 0
 	lsl	r2, fp, #2
-	.loc 2 1471 0
+	.loc 2 1520 0
 	ldr	r10, [r0, #12]
-.LVL996:
-	.loc 2 1477 0
+.LVL1004:
+	.loc 2 1526 0
 	mov	r0, r8
-.LVL997:
-	.loc 2 1478 0
-	ldr	r5, .L915
-	.loc 2 1474 0
+.LVL1005:
+	.loc 2 1527 0
+	ldr	r5, .L920
+	.loc 2 1523 0
 	str	r3, [sp, #4]
-.LVL998:
-	.loc 2 1477 0
+.LVL1006:
+	.loc 2 1526 0
 	bl	ftl_memset
-.LVL999:
-	.loc 2 1478 0
-	ldr	r3, .L915+4
-	.loc 2 1483 0
+.LVL1007:
+	.loc 2 1527 0
+	ldr	r3, .L920+4
+	.loc 2 1532 0
 	str	r6, [r4, #32]
-	.loc 2 1484 0
+	.loc 2 1533 0
 	str	r6, [r4, #28]
-	.loc 2 1478 0
+	.loc 2 1527 0
 	ldr	r2, [r3]
-	.loc 2 1510 0
+	.loc 2 1559 0
 	str	r3, [sp, #8]
-	.loc 2 1478 0
+	.loc 2 1527 0
 	str	r2, [r5, #8]
-	.loc 2 1479 0
-	ldr	r2, .L915+8
+	.loc 2 1528 0
+	ldr	r2, .L920+8
 	ldr	r7, [r2]
-	.loc 2 1481 0
+	.loc 2 1530 0
 	movw	r2, #65535
-	.loc 2 1479 0
+	.loc 2 1528 0
 	str	r7, [r5, #12]
-.LVL1000:
-	.loc 2 1481 0
+.LVL1008:
+	.loc 2 1530 0
 	strh	r2, [r4]	@ movhi
-	.loc 2 1482 0
+	.loc 2 1531 0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 1485 0
+	.loc 2 1534 0
 	movs	r2, #1
 	str	r2, [r4, #36]
-.LVL1001:
-.L889:
-	.loc 2 1486 0 discriminator 1
+.LVL1009:
+.L894:
+	.loc 2 1535 0 discriminator 1
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
-.LVL1002:
+.LVL1010:
 	cmp	r3, r2
-	bge	.L906
-	.loc 2 1488 0
+	bge	.L911
+	.loc 2 1537 0
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L890
-	.loc 2 1490 0
+	bne	.L895
+	.loc 2 1539 0
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
 	str	r3, [sp, #4]
-.LVL1003:
+.LVL1011:
 	bl	FtlGetLastWrittenPage
-.LVL1004:
-	.loc 2 1493 0
+.LVL1012:
+	.loc 2 1542 0
 	ldr	r3, [sp, #12]
-	.loc 2 1490 0
+	.loc 2 1539 0
 	sxth	r10, r0
-.LVL1005:
-	.loc 2 1492 0
+.LVL1013:
+	.loc 2 1541 0
 	strh	r6, [r4]	@ movhi
-	.loc 2 1494 0
+	.loc 2 1543 0
 	movs	r6, #0
-	.loc 2 1491 0
+	.loc 2 1540 0
 	adds	r0, r0, #1
-	.loc 2 1493 0
+	.loc 2 1542 0
 	mov	r2, r3
 	ldr	r3, [sp, #4]
-	.loc 2 1491 0
+	.loc 2 1540 0
 	strh	r0, [r4, #2]	@ movhi
-	.loc 2 1493 0
+	.loc 2 1542 0
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.LVL1006:
-	.loc 2 1496 0
-	ldr	r3, .L915
-.LVL1007:
-.L891:
+.LVL1014:
+	.loc 2 1545 0
+	ldr	r3, .L920
+.LVL1015:
+.L896:
 	sxth	r2, r6
-.LVL1008:
-	.loc 2 1494 0 discriminator 1
+.LVL1016:
+	.loc 2 1543 0 discriminator 1
 	cmp	r2, r10
-	ble	.L893
-.LVL1009:
-.L906:
-	.loc 2 1547 0
+	ble	.L898
+.LVL1017:
+.L911:
+	.loc 2 1596 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL1010:
-	.loc 2 1548 0
-	ldr	r3, .L915+12
+.LVL1018:
+	.loc 2 1597 0
+	ldr	r3, .L920+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L895
-	.loc 2 1550 0
+	bne	.L900
+	.loc 2 1599 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1011:
-.L895:
-	.loc 2 1553 0
+.LVL1019:
+.L900:
+	.loc 2 1602 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1012:
-	.loc 2 1555 0
+.LVL1020:
+	.loc 2 1604 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1013:
-	.loc 2 1557 0
+.LVL1021:
+	.loc 2 1606 0
 	movs	r0, #0
 	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1014:
-.L893:
+.LVL1022:
+.L898:
 	.cfi_restore_state
-	.loc 2 1496 0
+	.loc 2 1545 0
 	ldrh	r1, [r5]
-	.loc 2 1497 0
-	ldr	r0, .L915
-	.loc 2 1496 0
+	.loc 2 1546 0
+	ldr	r0, .L920
+	.loc 2 1545 0
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
-.LVL1015:
+.LVL1023:
 	str	r2, [r3, #4]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1016:
-	.loc 2 1500 0
+.LVL1024:
+	.loc 2 1549 0
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L892
-	.loc 2 1502 0
+	beq	.L897
+	.loc 2 1551 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L892
-	.loc 2 1502 0 is_stmt 0 discriminator 1
+	bls	.L897
+	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1504 0 is_stmt 1 discriminator 1
+	.loc 2 1553 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L892:
-.LVL1017:
+.L897:
+.LVL1025:
 	adds	r6, r6, #1
-.LVL1018:
-	b	.L891
-.LVL1019:
-.L890:
-	.loc 2 1510 0
+.LVL1026:
+	b	.L896
+.LVL1027:
+.L895:
+	.loc 2 1559 0
 	ldr	r1, [sp, #8]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	add	r2, r10, r2
 	str	r2, [sp, #16]
-	.loc 2 1512 0
-	ldr	r0, .L915
-	.loc 2 1510 0
+	.loc 2 1561 0
+	ldr	r0, .L920
+	.loc 2 1559 0
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L915+12
-.LVL1020:
+	ldr	r3, .L920+12
+.LVL1028:
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
-	.loc 2 1512 0
+	.loc 2 1561 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1021:
-	.loc 2 1515 0
+.LVL1029:
+	.loc 2 1564 0
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L908
-	.loc 2 1515 0 is_stmt 0 discriminator 1
+	beq	.L913
+	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L908
-	.loc 2 1515 0 discriminator 2
+	bne	.L913
+	.loc 2 1564 0 discriminator 2
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L897
-.L908:
+	beq	.L902
+.L913:
 	movs	r3, #0
-.L898:
-.LVL1022:
-	.loc 2 1530 0 is_stmt 1 discriminator 1
-	ldr	r1, .L915+12
+.L903:
+.LVL1030:
+	.loc 2 1579 0 is_stmt 1 discriminator 1
+	ldr	r1, .L920+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L904
+	bge	.L909
 	str	r3, [sp, #20]
-	.loc 2 1532 0
+	.loc 2 1581 0
 	ldr	r3, [sp, #16]
-.LVL1023:
-	.loc 2 1533 0
-	ldr	r0, .L915
-	.loc 2 1532 0
+.LVL1031:
+	.loc 2 1582 0
+	ldr	r0, .L920
+	.loc 2 1581 0
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-.LVL1024:
+.LVL1032:
 	str	r2, [r5, #4]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1025:
-	.loc 2 1536 0
+.LVL1033:
+	.loc 2 1585 0
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L902
-	.loc 2 1538 0
+	beq	.L907
+	.loc 2 1587 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L902
-	.loc 2 1538 0 is_stmt 0 discriminator 1
+	bls	.L907
+	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
 	cmp	r0, r1
-	.loc 2 1540 0 is_stmt 1 discriminator 1
+	.loc 2 1589 0 is_stmt 1 discriminator 1
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L902:
-.LVL1026:
+.L907:
+.LVL1034:
 	adds	r3, r3, #1
-.LVL1027:
-	b	.L898
-.L897:
-	.loc 2 1518 0 discriminator 1
+.LVL1035:
+	b	.L903
+.L902:
+	.loc 2 1567 0 discriminator 1
 	ldrh	r2, [r3]
-	.loc 2 1520 0 discriminator 1
+	.loc 2 1569 0 discriminator 1
 	movs	r1, #0
 	ldr	r3, [sp, #8]
-	.loc 2 1518 0 discriminator 1
+	.loc 2 1567 0 discriminator 1
 	subs	r2, r2, #1
-	.loc 2 1520 0 discriminator 1
+	.loc 2 1569 0 discriminator 1
 	ldr	ip, [r3]
-.L899:
+.L904:
 	sxth	r3, r1
-.LVL1028:
-	.loc 2 1518 0 discriminator 1
+.LVL1036:
+	.loc 2 1567 0 discriminator 1
 	cmp	r3, r2
-	blt	.L901
-.L904:
-.LVL1029:
+	blt	.L906
+.L909:
+.LVL1037:
 	adds	r6, r6, #1
-.LVL1030:
-	b	.L889
-.LVL1031:
-.L901:
-	.loc 2 1520 0
+.LVL1038:
+	b	.L894
+.LVL1039:
+.L906:
+	.loc 2 1569 0
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
-.LVL1032:
+.LVL1040:
 	adds	r1, r1, #1
-.LVL1033:
-	.loc 2 1521 0
+.LVL1041:
+	.loc 2 1570 0
 	uxth	lr, r3
 	cmp	fp, lr
-	.loc 2 1523 0
+	.loc 2 1572 0
 	itttt	hi
 	addhi	r0, r0, ip
 	movhi	r3, lr
-.LVL1034:
+.LVL1042:
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L899
-.L916:
+	b	.L904
+.L921:
 	.align	2
-.L915:
+.L920:
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.word	.LANCHOR108
-	.word	.LANCHOR39
-	.word	.LANCHOR109
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE278:
@@ -10954,7 +11073,7 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 .LFB279:
-	.loc 2 1560 0
+	.loc 2 1609 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -10962,47 +11081,47 @@ FtlLoadVonderInfo:
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 1561 0
-	ldr	r3, .L918
-	ldr	r0, .L918+4
+	.loc 2 1610 0
+	ldr	r3, .L923
+	ldr	r0, .L923+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
-	.loc 2 1562 0
+	.loc 2 1611 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	.loc 2 1563 0
-	ldr	r3, .L918+8
+	.loc 2 1612 0
+	ldr	r3, .L923+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	.loc 2 1564 0
-	ldr	r3, .L918+12
+	.loc 2 1613 0
+	ldr	r3, .L923+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	.loc 2 1565 0
-	ldr	r3, .L918+16
+	.loc 2 1614 0
+	ldr	r3, .L923+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	.loc 2 1566 0
-	ldr	r3, .L918+20
+	.loc 2 1615 0
+	ldr	r3, .L923+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	.loc 2 1567 0
-	ldr	r3, .L918+24
+	.loc 2 1616 0
+	ldr	r3, .L923+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	.loc 2 1568 0
-	ldr	r3, .L918+28
+	.loc 2 1617 0
+	ldr	r3, .L923+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
-	.loc 2 1570 0
+	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1035:
-	.loc 2 1573 0
+.LVL1043:
+	.loc 2 1622 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L919:
+.L924:
 	.align	2
-.L918:
+.L923:
 	.word	.LANCHOR27
 	.word	.LANCHOR149
 	.word	.LANCHOR35
@@ -11024,7 +11143,7 @@ FtlLoadVonderInfo:
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
 .LFB280:
-	.loc 2 1576 0
+	.loc 2 1625 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11036,110 +11155,110 @@ FtlL2PDataInit:
 	.cfi_offset 7, -12
 	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	.loc 2 1578 0
+	.loc 2 1627 0
 	movs	r1, #0
-	ldr	r5, .L923
-	ldr	r4, .L923+4
+	ldr	r5, .L928
+	ldr	r4, .L928+4
 	ldr	r2, [r5]
-	.loc 2 1579 0
-	ldr	r7, .L923+8
-	ldr	r6, .L923+12
-	.loc 2 1578 0
+	.loc 2 1628 0
+	ldr	r7, .L928+8
+	ldr	r6, .L928+12
+	.loc 2 1627 0
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
-	.loc 2 1579 0
-	ldr	r8, .L923+44
-	.loc 2 1578 0
+	.loc 2 1628 0
+	ldr	r8, .L928+44
+	.loc 2 1627 0
 	bl	ftl_memset
-.LVL1036:
-	.loc 2 1579 0
+.LVL1044:
+	.loc 2 1628 0
 	ldrh	r3, [r7]
 	movs	r1, #255
 	ldrh	r2, [r6]
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1037:
-	ldr	r3, .L923+16
+.LVL1045:
+	ldr	r3, .L928+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
-	.loc 2 1584 0
+	.loc 2 1633 0
 	ldr	ip, [r8]
 	ldr	r2, [r3]
 	movs	r3, #12
 	ldrh	r7, [r7]
 	mla	r3, r1, r3, r3
 	adds	r1, r2, r3
-	.loc 2 1580 0
+	.loc 2 1629 0
 	movs	r3, #0
-	.loc 2 1582 0
+	.loc 2 1631 0
 	mov	lr, r3
-.LVL1038:
-.L921:
+.LVL1046:
+.L926:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
-	.loc 2 1580 0 discriminator 1
+	.loc 2 1629 0 discriminator 1
 	cmp	r2, r1
-	bne	.L922
-	.loc 2 1586 0
-	ldr	r3, .L923+20
-	.loc 2 1588 0
+	bne	.L927
+	.loc 2 1635 0
+	ldr	r3, .L928+20
+	.loc 2 1637 0
 	ldr	r2, [r5]
-	.loc 2 1586 0
+	.loc 2 1635 0
 	strh	r0, [r3, #2]	@ movhi
-	.loc 2 1588 0
+	.loc 2 1637 0
 	strh	r2, [r3, #10]	@ movhi
-	.loc 2 1589 0
+	.loc 2 1638 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	.loc 2 1590 0
-	ldr	r2, .L923+24
-	.loc 2 1587 0
+	.loc 2 1639 0
+	ldr	r2, .L928+24
+	.loc 2 1636 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1590 0
+	.loc 2 1639 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	.loc 2 1591 0
-	ldr	r2, .L923+28
+	.loc 2 1640 0
+	ldr	r2, .L928+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	.loc 2 1592 0
-	ldr	r2, .L923+32
+	.loc 2 1641 0
+	ldr	r2, .L928+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	.loc 2 1593 0
-	ldr	r2, .L923+36
+	.loc 2 1642 0
+	ldr	r2, .L928+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
-	.loc 2 1595 0
-	ldr	r2, .L923+40
+	.loc 2 1644 0
+	ldr	r2, .L928+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L922:
-	.loc 2 1584 0 discriminator 3
+.L927:
+	.loc 2 1633 0 discriminator 3
 	bic	r3, r3, #3
-	.loc 2 1582 0 discriminator 3
+	.loc 2 1631 0 discriminator 3
 	str	lr, [r2, #-8]
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	add	r3, r3, ip
-	.loc 2 1583 0 discriminator 3
+	.loc 2 1632 0 discriminator 3
 	strh	r0, [r2, #-12]	@ movhi
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L921
-.L924:
+	b	.L926
+.L929:
 	.align	2
-.L923:
+.L928:
 	.word	.LANCHOR30
 	.word	.LANCHOR130
 	.word	.LANCHOR23
 	.word	.LANCHOR33
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.word	.LANCHOR144
 	.word	.LANCHOR147
 	.word	.LANCHOR32
@@ -11160,7 +11279,7 @@ FtlL2PDataInit:
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
 .LFB281:
-	.loc 2 1599 0
+	.loc 2 1648 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11168,19 +11287,19 @@ FtlLoadMapInfo:
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 1600 0
+	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1039:
-	.loc 2 1602 0
-	ldr	r0, .L926
+.LVL1047:
+	.loc 2 1651 0
+	ldr	r0, .L931
 	bl	FtlMapTblRecovery
-.LVL1040:
-	.loc 2 1605 0
+.LVL1048:
+	.loc 2 1654 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L927:
+.L932:
 	.align	2
-.L926:
+.L931:
 	.word	.LANCHOR144
 	.cfi_endproc
 .LFE281:
@@ -11195,7 +11314,7 @@ FtlLoadMapInfo:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 .LFB210:
-	.loc 3 493 0
+	.loc 3 494 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11205,95 +11324,91 @@ FtlVariablesInit:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 3 496 0
-	movs	r4, #0
-	ldr	r3, .L929
 	.loc 3 497 0
 	movw	r2, #65535
+	ldr	r3, .L934
+	.loc 3 498 0
+	movs	r4, #0
 	.loc 3 502 0
 	mov	r1, r4
 	.loc 3 503 0
-	ldr	r5, .L929+4
-	.loc 3 496 0
-	str	r4, [r3]
+	ldr	r5, .L934+4
 	.loc 3 497 0
-	ldr	r3, .L929+8
 	strh	r2, [r3]	@ movhi
 	.loc 3 500 0
 	mov	r2, #-1
 	.loc 3 498 0
-	ldr	r3, .L929+12
+	ldr	r3, .L934+8
 	str	r4, [r3]
 	.loc 3 499 0
-	ldr	r3, .L929+16
+	ldr	r3, .L934+12
 	str	r4, [r3]
 	.loc 3 500 0
-	ldr	r3, .L929+20
+	ldr	r3, .L934+16
 	str	r2, [r3]
 	.loc 3 501 0
-	ldr	r3, .L929+24
+	ldr	r3, .L934+20
 	strh	r4, [r3]	@ movhi
 	.loc 3 502 0
-	ldr	r3, .L929+28
+	ldr	r3, .L934+24
 	ldrh	r2, [r3]
-	ldr	r3, .L929+32
+	ldr	r3, .L934+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1041:
+.LVL1049:
 	.loc 3 503 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L929+36
+	ldr	r3, .L934+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1042:
+.LVL1050:
 	.loc 3 504 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L929+40
+	ldr	r3, .L934+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1043:
+.LVL1051:
 	.loc 3 505 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L929+44
+	ldr	r0, .L934+40
 	bl	ftl_memset
-.LVL1044:
+.LVL1052:
 	.loc 3 506 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L929+48
+	ldr	r0, .L934+44
 	bl	ftl_memset
-.LVL1045:
+.LVL1053:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1046:
+.LVL1054:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1047:
+.LVL1055:
 	.loc 3 510 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L930:
+.L935:
 	.align	2
-.L929:
+.L934:
 	.word	.LANCHOR150
 	.word	.LANCHOR6
 	.word	.LANCHOR151
 	.word	.LANCHOR152
 	.word	.LANCHOR153
-	.word	.LANCHOR154
 	.word	.LANCHOR35
 	.word	.LANCHOR27
 	.word	.LANCHOR36
-	.word	.LANCHOR40
+	.word	.LANCHOR43
 	.word	.LANCHOR126
-	.word	.LANCHOR79
-	.word	.LANCHOR83
+	.word	.LANCHOR39
+	.word	.LANCHOR81
 	.cfi_endproc
 .LFE210:
 	.size	FtlVariablesInit, .-FtlVariablesInit
@@ -11307,7 +11422,7 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 .LFB288:
-	.loc 2 2067 0
+	.loc 2 2116 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -11321,200 +11436,200 @@ SupperBlkListInit:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2071 0
+	.loc 2 2120 0
 	movs	r2, #6
-	ldr	r3, .L942
+	ldr	r3, .L947
 	movs	r1, #0
-	.loc 2 2072 0
+	.loc 2 2121 0
 	movs	r4, #0
-	.loc 2 2071 0
-	ldr	r5, .L942+4
-	.loc 2 2077 0
+	.loc 2 2120 0
+	ldr	r5, .L947+4
+	.loc 2 2126 0
 	mov	r8, r4
-	.loc 2 2071 0
+	.loc 2 2120 0
 	ldrh	r3, [r3]
-	.loc 2 2077 0
+	.loc 2 2126 0
 	mov	r6, r4
-	.loc 2 2071 0
+	.loc 2 2120 0
 	ldr	r0, [r5]
 	mov	r10, r5
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1048:
-	.loc 2 2072 0
-	ldr	r3, .L942+8
-	.loc 2 2075 0
-	ldr	r2, .L942+12
-	.loc 2 2072 0
+.LVL1056:
+	.loc 2 2121 0
+	ldr	r3, .L947+8
+	.loc 2 2124 0
+	ldr	r2, .L947+12
+	.loc 2 2121 0
 	str	r4, [r3]
-	.loc 2 2073 0
-	ldr	r3, .L942+16
-	.loc 2 2075 0
+	.loc 2 2122 0
+	ldr	r3, .L947+16
+	.loc 2 2124 0
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
-	.loc 2 2073 0
+	.loc 2 2122 0
 	str	r4, [r3]
-	.loc 2 2074 0
-	ldr	r3, .L942+20
+	.loc 2 2123 0
+	ldr	r3, .L947+20
 	str	r4, [r3]
-	.loc 2 2076 0
-	ldr	r3, .L942+24
+	.loc 2 2125 0
+	ldr	r3, .L947+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL1049:
-.L932:
-	.loc 2 2079 0 discriminator 1
-	ldr	r3, .L942+28
+.LVL1057:
+.L937:
+	.loc 2 2128 0 discriminator 1
+	ldr	r3, .L947+28
 	uxth	r7, r4
-.LVL1050:
+.LVL1058:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L938
-	.loc 2 2081 0
-	ldr	r3, .L942+32
+	bcs	.L943
+	.loc 2 2130 0
+	ldr	r3, .L947+32
 	ldrh	r2, [r3]
-	.loc 2 2084 0
-	ldr	r3, .L942+36
+	.loc 2 2133 0
+	ldr	r3, .L947+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L939
-.LVL1051:
-.L934:
+	b	.L944
+.LVL1059:
+.L939:
 	str	r2, [sp, #12]
-	.loc 2 2082 0
+	.loc 2 2131 0
 	mov	r1, r7
-	ldr	r2, .L942+40
+	ldr	r2, .L947+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1052:
-	.loc 2 2083 0
+.LVL1060:
+	.loc 2 2132 0
 	bl	FtlBbmIsBadBlock
-.LVL1053:
+.LVL1061:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L933
-	.loc 2 2084 0
+	cbnz	r0, .L938
+	.loc 2 2133 0
 	ldr	r1, [sp]
 	add	r5, r5, r1
-.LVL1054:
+.LVL1062:
 	uxth	r5, r5
-.LVL1055:
-.L933:
+.LVL1063:
+.L938:
 	adds	r3, r3, #1
-.LVL1056:
-.L939:
-	.loc 2 2081 0 discriminator 1
+.LVL1064:
+.L944:
+	.loc 2 2130 0 discriminator 1
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L934
-	.loc 2 2086 0
-	cbz	r5, .L941
-	.loc 2 2087 0
+	bhi	.L939
+	.loc 2 2135 0
+	cbz	r5, .L946
+	.loc 2 2136 0
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL1057:
-.L935:
-	.loc 2 2088 0
+.LVL1065:
+.L940:
+	.loc 2 2137 0
 	ldr	r1, [r10]
 	uxth	r2, r4
 	movs	r3, #6
 	mla	r3, r3, r2, r1
 	strh	r0, [r3, #4]	@ movhi
-	.loc 2 2090 0
-	ldr	r3, .L942+44
+	.loc 2 2139 0
+	ldr	r3, .L947+44
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L936
-	.loc 2 2091 0 discriminator 1
-	ldr	r3, .L942+48
-	.loc 2 2090 0 discriminator 1
+	beq	.L941
+	.loc 2 2140 0 discriminator 1
+	ldr	r3, .L947+48
+	.loc 2 2139 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L936
-	.loc 2 2092 0
-	ldr	r3, .L942+52
-	.loc 2 2091 0
+	beq	.L941
+	.loc 2 2141 0
+	ldr	r3, .L947+52
+	.loc 2 2140 0
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L936
-	.loc 2 2094 0
-	ldr	r3, .L942+56
+	beq	.L941
+	.loc 2 2143 0
+	ldr	r3, .L947+56
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L937
-	.loc 2 2095 0
+	cbnz	r3, .L942
+	.loc 2 2144 0
 	add	r8, r8, #1
-.LVL1058:
-	.loc 2 2096 0
+.LVL1066:
+	.loc 2 2145 0
 	mov	r0, r7
-.LVL1059:
-	.loc 2 2095 0
+.LVL1067:
+	.loc 2 2144 0
 	uxth	r8, r8
-.LVL1060:
-	.loc 2 2096 0
+.LVL1068:
+	.loc 2 2145 0
 	bl	INSERT_FREE_LIST
-.LVL1061:
-.L936:
-	adds	r4, r4, #1
-.LVL1062:
-	b	.L932
-.LVL1063:
+.LVL1069:
 .L941:
+	adds	r4, r4, #1
+.LVL1070:
+	b	.L937
+.LVL1071:
+.L946:
 	mov	r0, r5
-	b	.L935
-.LVL1064:
-.L937:
-	.loc 2 2098 0
+	b	.L940
+.LVL1072:
+.L942:
+	.loc 2 2147 0
 	adds	r6, r6, #1
-.LVL1065:
-	.loc 2 2099 0
+.LVL1073:
+	.loc 2 2148 0
 	mov	r0, r7
-.LVL1066:
-	.loc 2 2098 0
+.LVL1074:
+	.loc 2 2147 0
 	uxth	r6, r6
-.LVL1067:
-	.loc 2 2099 0
+.LVL1075:
+	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1068:
-	b	.L936
-.L938:
-	.loc 2 2103 0
+.LVL1076:
+	b	.L941
+.L943:
+	.loc 2 2152 0
 	ldr	r2, [sp, #4]
-	.loc 2 2104 0
+	.loc 2 2153 0
 	strh	r8, [fp]	@ movhi
-	.loc 2 2103 0
+	.loc 2 2152 0
 	strh	r6, [r2]	@ movhi
-	.loc 2 2105 0
+	.loc 2 2154 0
 	add	r6, r6, r8
-.LVL1069:
+.LVL1077:
 	cmp	r6, r3
-	ble	.L940
-	.loc 2 2105 0 is_stmt 0 discriminator 1
-	movw	r2, #2105
-	ldr	r1, .L942+60
-	ldr	r0, .L942+64
+	ble	.L945
+	.loc 2 2154 0 is_stmt 0 discriminator 1
+	movw	r2, #2154
+	ldr	r1, .L947+60
+	ldr	r0, .L947+64
 	bl	printf
-.LVL1070:
-.L940:
-	.loc 2 2107 0 is_stmt 1
+.LVL1078:
+.L945:
+	.loc 2 2156 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1071:
-.L943:
+.LVL1079:
+.L948:
 	.align	2
-.L942:
+.L947:
 	.word	.LANCHOR6
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	.LANCHOR47
 	.word	.LANCHOR45
-	.word	.LANCHOR42
+	.word	.LANCHOR41
 	.word	.LANCHOR44
 	.word	.LANCHOR48
 	.word	.LANCHOR5
@@ -11524,8 +11639,8 @@ SupperBlkListInit:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR43
-	.word	.LANCHOR155
+	.word	.LANCHOR42
+	.word	.LANCHOR154
 	.word	.LC1
 	.cfi_endproc
 .LFE288:
@@ -11540,11 +11655,11 @@ SupperBlkListInit:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 .LFB293:
-	.loc 2 2223 0
+	.loc 2 2273 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1072:
+.LVL1080:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -11555,191 +11670,191 @@ ftl_check_vpc:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2232 0
+	.loc 2 2282 0
 	movs	r4, #0
-	ldr	r6, .L968
-	.loc 2 2238 0
-	ldr	r5, .L968+4
-	.loc 2 2229 0
-	ldr	r1, .L968+8
-	ldr	r0, .L968+12
+	ldr	r6, .L973
+	.loc 2 2288 0
+	ldr	r5, .L973+4
+	.loc 2 2279 0
+	ldr	r1, .L973+8
+	ldr	r0, .L973+12
 	bl	printf
-.LVL1073:
-	.loc 2 2231 0
+.LVL1081:
+	.loc 2 2281 0
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L968+4
+	ldr	r0, .L973+4
 	bl	ftl_memset
-.LVL1074:
-.L945:
-	.loc 2 2232 0 discriminator 1
+.LVL1082:
+.L950:
+	.loc 2 2282 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L947
-	.loc 2 2243 0 discriminator 1
-	ldr	r10, .L968+48
+	bcc	.L952
+	.loc 2 2293 0 discriminator 1
+	ldr	r10, .L973+48
 	movs	r4, #0
-.LVL1075:
-	.loc 2 2245 0 discriminator 1
-	ldr	r7, .L968+16
+.LVL1083:
+	.loc 2 2295 0 discriminator 1
+	ldr	r7, .L973+16
 	mov	r6, r4
-.LVL1076:
-.L948:
-	.loc 2 2243 0 discriminator 1
+.LVL1084:
+.L953:
+	.loc 2 2293 0 discriminator 1
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L950
-	.loc 2 2255 0
-	ldr	r3, .L968+20
+	bhi	.L955
+	.loc 2 2305 0
+	ldr	r3, .L973+20
 	ldr	r4, [r3]
-.LVL1077:
-	cbz	r4, .L951
-.LBB242:
-	.loc 2 2257 0
-	ldr	r3, .L968+24
-	.loc 2 2259 0
+.LVL1085:
+	cbz	r4, .L956
+.LBB275:
+	.loc 2 2307 0
+	ldr	r3, .L973+24
+	.loc 2 2309 0
 	mov	r8, #0
-	.loc 2 2258 0
-	ldr	r5, .L968+28
-	.loc 2 2261 0
-	ldr	r10, .L968+16
-	.loc 2 2257 0
+	.loc 2 2308 0
+	ldr	r5, .L973+28
+	.loc 2 2311 0
+	ldr	r10, .L973+16
+	.loc 2 2307 0
 	ldrh	r7, [r3]
-.LVL1078:
-	.loc 2 2258 0
+.LVL1086:
+	.loc 2 2308 0
 	ldr	r3, [r5]
-	.loc 2 2263 0
-	ldr	fp, .L968+4
-	.loc 2 2258 0
+	.loc 2 2313 0
+	ldr	fp, .L973+4
+	.loc 2 2308 0
 	subs	r4, r4, r3
-	ldr	r3, .L968+32
+	ldr	r3, .L973+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.LVL1079:
-.L952:
-	.loc 2 2259 0 discriminator 1
+.LVL1087:
+.L957:
+	.loc 2 2309 0 discriminator 1
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L951
-	.loc 2 2261 0
+	bls	.L956
+	.loc 2 2311 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L953
-	.loc 2 2264 0
+	cbz	r2, .L958
+	.loc 2 2314 0
 	movs	r6, #1
-	.loc 2 2263 0
+	.loc 2 2313 0
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L968+36
+	ldr	r0, .L973+36
 	bl	printf
-.LVL1080:
-.L953:
-	.loc 2 2266 0
+.LVL1088:
+.L958:
+	.loc 2 2316 0
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
-.LVL1081:
+.LVL1089:
 	movw	r3, #65535
 	add	r8, r8, #1
-.LVL1082:
+.LVL1090:
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L952
-.LVL1083:
-.L951:
-.LBE242:
-	.loc 2 2271 0
-	cbz	r6, .L944
-.LVL1084:
-	.loc 2 2271 0 is_stmt 0 discriminator 1
-	movw	r2, #2271
-	ldr	r1, .L968+8
-	ldr	r0, .L968+40
+	bne	.L957
+.LVL1091:
+.L956:
+.LBE275:
+	.loc 2 2321 0
+	cbz	r6, .L949
+.LVL1092:
+	.loc 2 2321 0 is_stmt 0 discriminator 1
+	movw	r2, #2321
+	ldr	r1, .L973+8
+	ldr	r0, .L973+40
 	bl	printf
-.LVL1085:
-.L944:
-	.loc 2 2272 0 is_stmt 1
+.LVL1093:
+.L949:
+	.loc 2 2322 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1086:
-.L947:
+.LVL1094:
+.L952:
 	.cfi_restore_state
-	.loc 2 2234 0
+	.loc 2 2284 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL1087:
-	.loc 2 2235 0
+.LVL1095:
+	.loc 2 2285 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L946
-	.loc 2 2237 0
+	beq	.L951
+	.loc 2 2287 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1088:
-	.loc 2 2238 0
+.LVL1096:
+	.loc 2 2288 0
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.LVL1089:
-.L946:
-	.loc 2 2232 0 discriminator 2
+.LVL1097:
+.L951:
+	.loc 2 2282 0 discriminator 2
 	adds	r4, r4, #1
-.LVL1090:
-	b	.L945
-.LVL1091:
-.L950:
-	.loc 2 2245 0
+.LVL1098:
+	b	.L950
+.LVL1099:
+.L955:
+	.loc 2 2295 0
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L968+4
+	ldr	r8, .L973+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L949
-	.loc 2 2247 0
+	beq	.L954
+	.loc 2 2297 0
 	mov	r1, r5
-	ldr	r0, .L968+44
+	ldr	r0, .L973+44
 	bl	printf
-.LVL1092:
-	.loc 2 2248 0
+.LVL1100:
+	.loc 2 2298 0
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L949
-	.loc 2 2248 0 is_stmt 0 discriminator 1
+	beq	.L954
+	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r8, r5, lsl #1]
-	.loc 2 2250 0 is_stmt 1 discriminator 1
+	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.LVL1093:
-.L949:
+.LVL1101:
+.L954:
 	adds	r4, r4, #1
-.LVL1094:
-	b	.L948
-.L969:
+.LVL1102:
+	b	.L953
+.L974:
 	.align	2
-.L968:
-	.word	.LANCHOR62
+.L973:
+	.word	.LANCHOR61
 	.word	check_vpc_table
-	.word	.LANCHOR156
-	.word	.LC91
-	.word	.LANCHOR43
+	.word	.LANCHOR155
+	.word	.LC94
+	.word	.LANCHOR42
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	-1431655765
-	.word	.LC93
+	.word	.LC96
 	.word	.LC1
-	.word	.LC92
+	.word	.LC95
 	.word	.LANCHOR5
 	.cfi_endproc
 .LFE293:
@@ -11759,7 +11874,7 @@ FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 203 0
-	ldr	r2, .L971
+	ldr	r2, .L976
 	movs	r3, #0
 	.loc 5 202 0
 	push	{r4, lr}
@@ -11768,28 +11883,28 @@ FtlGcPageVarInit:
 	.cfi_offset 14, -4
 	.loc 5 205 0
 	movs	r1, #255
-	ldr	r4, .L971+4
+	ldr	r4, .L976+4
 	.loc 5 203 0
 	strh	r3, [r2]	@ movhi
 	.loc 5 204 0
-	ldr	r2, .L971+8
+	ldr	r2, .L976+8
 	strh	r3, [r2]	@ movhi
 	.loc 5 205 0
 	ldrh	r2, [r4]
-	ldr	r3, .L971+12
+	ldr	r3, .L976+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1095:
+.LVL1103:
 	.loc 5 206 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L971+16
+	ldr	r3, .L976+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1096:
+.LVL1104:
 	.loc 5 208 0
 	pop	{r4, lr}
 	.cfi_restore 14
@@ -11797,15 +11912,15 @@ FtlGcPageVarInit:
 	.cfi_def_cfa_offset 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1097:
-.L972:
+.LVL1105:
+.L977:
 	.align	2
-.L971:
-	.word	.LANCHOR98
+.L976:
+	.word	.LANCHOR96
 	.word	.LANCHOR21
-	.word	.LANCHOR99
 	.word	.LANCHOR97
-	.word	.LANCHOR100
+	.word	.LANCHOR95
+	.word	.LANCHOR98
 	.cfi_endproc
 .LFE312:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -11823,9 +11938,9 @@ FtlGcScanTempBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1098:
+.LVL1106:
 	.loc 5 220 0
-	ldr	r3, .L996
+	ldr	r3, .L1001
 	.loc 5 211 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -11844,50 +11959,50 @@ FtlGcScanTempBlk:
 	str	r1, [sp, #8]
 	.loc 5 220 0
 	ldrh	r4, [r3]
-.LVL1099:
+.LVL1107:
 	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L990
+	beq	.L995
 	.loc 5 223 0
-	cbnz	r4, .L974
-.L975:
+	cbnz	r4, .L979
+.L980:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1100:
-	b	.L976
-.LVL1101:
-.L990:
+.LVL1108:
+	b	.L981
+.LVL1109:
+.L995:
 	.loc 5 222 0
 	movs	r4, #0
-.LVL1102:
-.L974:
+.LVL1110:
+.L979:
 	.loc 5 223 0 discriminator 1
-	ldr	r3, .L996+4
+	ldr	r3, .L1001+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	beq	.L975
-.LVL1103:
-.L976:
+	beq	.L980
+.LVL1111:
+.L981:
 	.loc 5 222 0
 	movs	r7, #0
-.LVL1104:
-.L984:
+.LVL1112:
+.L989:
 	.loc 5 228 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
-.LVL1105:
+.LVL1113:
 	.loc 5 228 0
 	cmp	r2, r3
-	beq	.L977
-.L987:
-.LVL1106:
+	beq	.L982
+.L992:
+.LVL1114:
 	.loc 5 231 0
-	ldr	r3, .L996+8
+	ldr	r3, .L1001+8
 	movs	r2, #0
 	add	ip, r5, #16
 	.loc 5 230 0
@@ -11899,78 +12014,78 @@ FtlGcScanTempBlk:
 	.loc 5 231 0
 	ldrh	fp, [r3]
 	.loc 5 234 0
-	ldr	r3, .L996+12
+	ldr	r3, .L1001+12
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	.loc 5 235 0
-	ldr	r3, .L996+16
+	ldr	r3, .L1001+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L996+20
+	ldr	r3, .L1001+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 5 236 0
-	ldr	r3, .L996+24
+	ldr	r3, .L1001+24
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L996+28
+	ldr	r3, .L1001+28
 	ldrh	r10, [r3]
-.LVL1107:
-.L978:
+.LVL1115:
+.L983:
 	.loc 5 231 0 discriminator 1
 	uxth	r3, r2
 	cmp	fp, r3
-	bhi	.L980
+	bhi	.L985
 	.loc 5 241 0
 	mov	r8, #0
 	.loc 5 242 0
 	mov	fp, #20
 	.loc 5 240 0
 	movs	r2, #0
-.LVL1108:
+.LVL1116:
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL1109:
-.L981:
+.LVL1117:
+.L986:
 	.loc 5 241 0 discriminator 1
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L985
+	bhi	.L990
 	.loc 5 268 0
 	ldr	r3, [sp, #8]
 	.loc 5 266 0
 	adds	r7, r7, #1
-.LVL1110:
+.LVL1118:
 	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL1111:
-	ldr	r2, .L996+4
+.LVL1119:
+	ldr	r2, .L1001+4
 	uxth	r4, r4
-.LVL1112:
+.LVL1120:
 	.loc 5 268 0
 	cmp	r3, r7
-	bls	.L986
-.L988:
+	bls	.L991
+.L993:
 	.loc 5 274 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bhi	.L987
+	bhi	.L992
 	.loc 5 265 0
 	movs	r0, #0
-	b	.L977
-.LVL1113:
-.L980:
+	b	.L982
+.LVL1121:
+.L985:
 	.loc 5 232 0
 	ldrh	r3, [ip], #2
-.LVL1114:
+.LVL1122:
 	.loc 5 233 0
 	cmp	r3, lr
-	beq	.L979
+	beq	.L984
 	.loc 5 234 0
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL1115:
+.LVL1123:
 	.loc 5 235 0
 	ldr	r0, [sp, #12]
 	.loc 5 234 0
@@ -11989,61 +12104,61 @@ FtlGcScanTempBlk:
 	mul	r3, r10, r6
 	.loc 5 237 0
 	adds	r6, r6, #1
-.LVL1116:
+.LVL1124:
 	uxth	r6, r6
-.LVL1117:
+.LVL1125:
 	.loc 5 236 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L979:
-.LVL1118:
+.L984:
+.LVL1126:
 	adds	r2, r2, #1
-.LVL1119:
-	b	.L978
-.LVL1120:
-.L985:
+.LVL1127:
+	b	.L983
+.LVL1128:
+.L990:
 	.loc 5 242 0
-	ldr	r3, .L996+12
+	ldr	r3, .L1001+12
 	mul	r10, fp, r8
 	ldr	r2, [r3]
 	add	r3, r2, r10
 	str	r2, [sp, #16]
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
-.LVL1121:
+.LVL1129:
 	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL1122:
+.LVL1130:
 	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L982
+	cbnz	r2, .L987
 	.loc 5 247 0
 	ldr	r3, [sp, #12]
 	.loc 5 248 0
 	movw	r2, #65535
 	add	r8, r8, #1
-.LVL1123:
+.LVL1131:
 	ldr	r1, [sp, #4]
 	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL1124:
+.LVL1132:
 	.loc 5 248 0
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L983
+	bne	.L988
 	.loc 5 249 0
-	ldr	r3, .L996+32
-.LVL1125:
+	ldr	r3, .L1001+32
+.LVL1133:
 	movs	r2, #1
 	str	r2, [r3]
-.LVL1126:
-.L977:
+.LVL1134:
+.L982:
 	.loc 5 281 0
-	ldr	r3, .L996
+	ldr	r3, .L1001
 	movw	r2, #65535
 	.loc 5 283 0
 	strb	r0, [r5, #6]
@@ -12056,80 +12171,80 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r5
-.LVL1127:
+.LVL1135:
 	bl	ftl_sb_update_avl_pages
-.LVL1128:
+.LVL1136:
 	.loc 5 285 0
-	b	.L989
-.LVL1129:
-.L983:
+	b	.L994
+.LVL1137:
+.L988:
 	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
-.LVL1130:
+.LVL1138:
 	bl	FtlGcUpdatePage
-.LVL1131:
-	b	.L981
-.LVL1132:
-.L982:
+.LVL1139:
+	b	.L986
+.LVL1140:
+.L987:
 	.loc 5 256 0
-	ldr	r3, .L996+36
+	ldr	r3, .L1001+36
 	movs	r4, #0
-.LVL1133:
+.LVL1141:
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	.loc 5 257 0
 	ldrh	r0, [r5]
-.LVL1134:
+.LVL1142:
 	bl	INSERT_FREE_LIST
-.LVL1135:
+.LVL1143:
 	.loc 5 258 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.LVL1136:
+.LVL1144:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1137:
+.LVL1145:
 	.loc 5 261 0
-	b	.L984
-.LVL1138:
-.L986:
+	b	.L989
+.LVL1146:
+.L991:
 	.loc 5 268 0 discriminator 1
-	ldr	r1, .L996
+	ldr	r1, .L1001
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
-	beq	.L988
+	beq	.L993
 	.loc 5 269 0
 	add	r3, r3, r7
 	strh	r3, [r1]	@ movhi
 	.loc 5 270 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bls	.L988
-.LVL1139:
-.L989:
+	bls	.L993
+.LVL1147:
+.L994:
 	.loc 5 286 0
 	mov	r0, #-1
 	add	sp, sp, #24
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1140:
-.L997:
+.LVL1148:
+.L1002:
 	.align	2
-.L996:
-	.word	.LANCHOR157
+.L1001:
+	.word	.LANCHOR156
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR120
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR23
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR24
-	.word	.LANCHOR153
-	.word	.LANCHOR43
+	.word	.LANCHOR152
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE313:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
@@ -12147,7 +12262,7 @@ FlashTestBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1141:
+.LVL1149:
 	.loc 1 202 0
 	cmp	r0, #11
 	.loc 1 197 0
@@ -12160,15 +12275,15 @@ FlashTestBlk:
 	sub	sp, sp, #92
 	.cfi_def_cfa_offset 104
 	.loc 1 202 0
-	bls	.L1000
-.LVL1142:
-.LBB245:
-.LBB246:
+	bls	.L1005
+.LVL1150:
+.LBB278:
+.LBB279:
 	.loc 1 206 0
-	ldr	r5, .L1001
+	ldr	r5, .L1006
 	.loc 1 207 0
 	add	r0, sp, #24
-.LVL1143:
+.LVL1151:
 	.loc 1 208 0
 	movs	r2, #32
 	movs	r1, #165
@@ -12176,18 +12291,18 @@ FlashTestBlk:
 	str	r0, [sp, #16]
 	.loc 1 210 0
 	lsls	r4, r4, #10
-.LVL1144:
+.LVL1152:
 	.loc 1 206 0
 	str	r5, [sp, #12]
 	.loc 1 208 0
 	bl	ftl_memset
-.LVL1145:
+.LVL1153:
 	.loc 1 209 0
 	movs	r2, #8
 	movs	r1, #90
 	mov	r0, r5
 	bl	ftl_memset
-.LVL1146:
+.LVL1154:
 	.loc 1 211 0
 	movs	r2, #1
 	add	r0, sp, #4
@@ -12196,14 +12311,14 @@ FlashTestBlk:
 	str	r4, [sp, #8]
 	.loc 1 211 0
 	bl	FlashEraseBlocks
-.LVL1147:
+.LVL1155:
 	.loc 1 212 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1148:
+.LVL1156:
 	.loc 1 213 0
 	ldr	r4, [sp, #4]
 	.loc 1 219 0
@@ -12216,13 +12331,13 @@ FlashTestBlk:
 	movne	r4, #1
 	negs	r4, r4
 .LDL1:
-.LVL1149:
+.LVL1157:
 	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1150:
-.L998:
-.LBE246:
-.LBE245:
+.LVL1158:
+.L1003:
+.LBE279:
+.LBE278:
 	.loc 1 221 0
 	mov	r0, r4
 	add	sp, sp, #92
@@ -12230,15 +12345,15 @@ FlashTestBlk:
 	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL1151:
-.L1000:
+.LVL1159:
+.L1005:
 	.cfi_restore_state
 	.loc 1 203 0
 	movs	r4, #0
-	b	.L998
-.L1002:
+	b	.L1003
+.L1007:
 	.align	2
-.L1001:
+.L1006:
 	.word	ftl_temp_buf
 	.cfi_endproc
 .LFE347:
@@ -12257,7 +12372,7 @@ FlashGetBadBlockList:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1152:
+.LVL1160:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -12270,60 +12385,60 @@ FlashGetBadBlockList:
 	mov	r5, r1
 	.loc 1 227 0
 	movs	r1, #255
-.LVL1153:
+.LVL1161:
 	.loc 1 224 0
 	mov	r4, r0
 	.loc 1 227 0
 	bl	ftl_memset
-.LVL1154:
+.LVL1162:
 	.loc 1 228 0
-	ldr	r3, .L1010
+	ldr	r3, .L1015
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL1155:
+.LVL1163:
 	uxth	r0, r0
-.LVL1156:
+.LVL1164:
 	.loc 1 229 0
 	cmp	r0, #50
-	bls	.L1004
+	bls	.L1009
 	.loc 1 230 0
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL1157:
+.LVL1165:
 	bl	ftl_memset
-.LVL1158:
+.LVL1166:
 	.loc 1 231 0
 	movs	r0, #0
-.LVL1159:
-.L1004:
+.LVL1167:
+.L1009:
 	.loc 1 233 0
-	ldr	r3, .L1010+4
+	ldr	r3, .L1015+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L1009
+	bne	.L1014
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L1006:
+.L1011:
 	.loc 1 234 0 discriminator 1
 	cmp	r3, r1
-	bne	.L1007
-.L1009:
+	bne	.L1012
+.L1014:
 	.loc 1 239 0
 	pop	{r3, r4, r5, pc}
-.LVL1160:
-.L1007:
+.LVL1168:
+.L1012:
 	.loc 1 235 0 discriminator 3
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L1006
-.L1011:
+	b	.L1011
+.L1016:
 	.align	2
-.L1010:
-	.word	.LANCHOR107
+.L1015:
+	.word	.LANCHOR105
 	.word	.LANCHOR0
 	.cfi_endproc
 .LFE348:
@@ -12343,10 +12458,10 @@ ftl_memcpy:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1161:
+.LVL1169:
 	.loc 1 248 0
 	b	memcpy
-.LVL1162:
+.LVL1170:
 	.cfi_endproc
 .LFE350:
 	.size	ftl_memcpy, .-ftl_memcpy
@@ -12364,7 +12479,7 @@ FtlBbmTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1163:
+.LVL1171:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12378,25 +12493,25 @@ FtlBbmTblFlush:
 	.loc 4 91 0
 	movs	r4, #0
 	.loc 4 88 0
-	ldr	r7, .L1022
+	ldr	r7, .L1027
 	.loc 4 89 0
 	movs	r1, #0
 	.loc 4 87 0
-	ldr	r5, .L1022+4
+	ldr	r5, .L1027+4
 	.loc 4 88 0
 	ldr	r3, [r7]
 	mov	fp, r7
 	.loc 4 87 0
-	ldr	r8, .L1022+48
-	ldr	r6, .L1022+8
+	ldr	r8, .L1027+48
+	ldr	r6, .L1027+8
 	.loc 4 88 0
 	str	r3, [r5, #12]
 	.loc 4 91 0
-	ldr	r7, .L1022+12
+	ldr	r7, .L1027+12
 	.loc 4 89 0
-	ldr	r3, .L1022+16
+	ldr	r3, .L1027+16
 	.loc 4 92 0
-	ldr	r10, .L1022+52
+	ldr	r10, .L1027+52
 	.loc 4 87 0
 	ldr	r0, [r8]
 	.loc 4 89 0
@@ -12405,20 +12520,20 @@ FtlBbmTblFlush:
 	str	r0, [r5, #8]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL1164:
-.L1014:
+.LVL1172:
+.L1019:
 	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1015
+	blt	.L1020
 	.loc 4 94 0
 	ldr	r6, [r5, #12]
-.LVL1165:
+.LVL1173:
 	.loc 4 95 0
 	movs	r2, #16
 	.loc 4 98 0
-	ldr	r4, .L1022+20
-.LVL1166:
+	ldr	r4, .L1027+20
+.LVL1174:
 	.loc 4 95 0
 	movs	r1, #255
 	.loc 4 84 0
@@ -12426,7 +12541,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	r0, r6
 	bl	ftl_memset
-.LVL1167:
+.LVL1175:
 	.loc 4 97 0
 	movw	r3, #61649
 	mov	r10, r4
@@ -12447,11 +12562,11 @@ FtlBbmTblFlush:
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
 	.loc 4 102 0
-	ldr	r3, .L1022+24
+	ldr	r3, .L1027+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.LVL1168:
-.L1016:
+.LVL1176:
+.L1021:
 	.loc 4 104 0
 	ldr	r3, [r8]
 	.loc 4 107 0
@@ -12474,23 +12589,23 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1022+28
+	ldr	r0, .L1027+28
 	bl	printf
-.LVL1169:
+.LVL1177:
 	.loc 4 109 0
 	movs	r3, #1
-	ldr	r0, .L1022+4
+	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1170:
+.LVL1178:
 	.loc 4 110 0
-	ldr	r3, .L1022+32
+	ldr	r3, .L1027+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1017
+	blt	.L1022
 	.loc 4 113 0
 	ldr	r3, [r4, #8]
 	.loc 4 117 0
@@ -12511,7 +12626,7 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	r2, [r4, #4]	@ movhi
 	.loc 4 121 0
-	ldr	r2, .L1022+36
+	ldr	r2, .L1027+36
 	.loc 4 116 0
 	strh	r3, [r4]	@ movhi
 	.loc 4 119 0
@@ -12528,15 +12643,15 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL1171:
+.LVL1179:
 	.loc 4 123 0
 	movs	r3, #1
-	ldr	r0, .L1022+4
+	ldr	r0, .L1027+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1172:
-.L1017:
+.LVL1180:
+.L1022:
 	.loc 4 126 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
@@ -12544,31 +12659,31 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1018
+	bne	.L1023
 	.loc 4 130 0
 	adds	r7, r7, #1
-.LVL1173:
+.LVL1181:
 	.loc 4 129 0
 	ldr	r1, [r5, #4]
 	.loc 4 130 0
 	uxth	r7, r7
 	.loc 4 129 0
-	ldr	r0, .L1022+40
+	ldr	r0, .L1027+40
 	bl	printf
-.LVL1174:
+.LVL1182:
 	.loc 4 131 0
 	cmp	r7, #3
-	bls	.L1016
+	bls	.L1021
 	.loc 4 132 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1022+44
+	ldr	r0, .L1027+44
 	bl	printf
-.LVL1175:
+.LVL1183:
+.L1025:
+	b	.L1025
+.LVL1184:
 .L1020:
-	b	.L1020
-.LVL1176:
-.L1015:
 	.loc 4 92 0 discriminator 3
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
@@ -12577,48 +12692,48 @@ FtlBbmTblFlush:
 	lsls	r2, r2, #2
 	.loc 4 91 0 discriminator 3
 	adds	r4, r4, #1
-.LVL1177:
+.LVL1185:
 	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL1178:
-	b	.L1014
-.LVL1179:
-.L1021:
+.LVL1186:
+	b	.L1019
+.LVL1187:
+.L1026:
 	movs	r3, #1
-.LVL1180:
+.LVL1188:
 	str	r3, [sp, #12]
-.LVL1181:
-	b	.L1016
-.LVL1182:
-.L1018:
+.LVL1189:
+	b	.L1021
+.LVL1190:
+.L1023:
 	.loc 4 139 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1021
+	beq	.L1026
 	.loc 4 146 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1183:
-.L1023:
+.LVL1191:
+.L1028:
 	.align	2
-.L1022:
-	.word	.LANCHOR109
+.L1027:
 	.word	.LANCHOR108
+	.word	.LANCHOR106
 	.word	.LANCHOR37+24
 	.word	.LANCHOR10
 	.word	.LANCHOR23
 	.word	.LANCHOR37
 	.word	.LANCHOR2
-	.word	.LC94
+	.word	.LC97
 	.word	.LANCHOR20
-	.word	.LANCHOR112
-	.word	.LC95
-	.word	.LC96
-	.word	.LANCHOR39
+	.word	.LANCHOR111
+	.word	.LC98
+	.word	.LC99
+	.word	.LANCHOR107
 	.word	.LANCHOR137
 	.cfi_endproc
 .LFE229:
@@ -12633,11 +12748,11 @@ FtlBbmTblFlush:
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
 .LFB301:
-	.loc 2 2531 0
+	.loc 2 2582 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1184:
+.LVL1192:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12648,34 +12763,34 @@ allocate_data_superblock:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 2531 0
+	.loc 2 2582 0
 	mov	r4, r0
-	ldr	r8, .L1062
-.LVL1185:
-.L1025:
-	.loc 2 2537 0
-	ldr	r3, .L1062
-	ldr	r6, .L1062+4
-	ldr	fp, .L1062+76
+	ldr	r8, .L1067
+.LVL1193:
+.L1030:
+	.loc 2 2588 0
+	ldr	r3, .L1067
+	ldr	r6, .L1067+4
+	ldr	fp, .L1067+76
 	ldrh	r3, [r3]
 	ldrh	r2, [r6]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1026
-	.loc 2 2537 0 is_stmt 0 discriminator 1
-	movw	r2, #2537
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ble	.L1031
+	.loc 2 2588 0 is_stmt 0 discriminator 1
+	movw	r2, #2588
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1186:
-.L1026:
-	.loc 2 2539 0 is_stmt 1
-	ldr	r3, .L1062+16
+.LVL1194:
+.L1031:
+	.loc 2 2590 0 is_stmt 1
+	ldr	r3, .L1067+16
 	cmp	r4, r3
-	bne	.L1051
-	.loc 2 2540 0
-	ldr	r2, .L1062+20
+	bne	.L1056
+	.loc 2 2591 0
+	ldr	r2, .L1067+20
 	ldrh	r3, [r8]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -12683,443 +12798,443 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL1187:
-	.loc 2 2544 0
-	cbz	r1, .L1027
-	.loc 2 2545 0
+.LVL1195:
+	.loc 2 2595 0
+	cbz	r1, .L1032
+	.loc 2 2596 0
 	subs	r1, r1, #1
-.LVL1188:
+.LVL1196:
 	uxth	r1, r1
-.LVL1189:
-.L1027:
-	.loc 2 2546 0
-	ldr	r0, .L1062+24
+.LVL1197:
+.L1032:
+	.loc 2 2597 0
+	ldr	r0, .L1067+24
 	bl	List_pop_index_node
-.LVL1190:
+.LVL1198:
 	ldrh	r3, [r8]
 	mov	r5, r0
 	uxth	r7, r0
-.LVL1191:
-	cbnz	r3, .L1028
-	.loc 2 2546 0 is_stmt 0 discriminator 1
-	movw	r2, #2546
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+.LVL1199:
+	cbnz	r3, .L1033
+	.loc 2 2597 0 is_stmt 0 discriminator 1
+	movw	r2, #2597
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1192:
-.L1028:
-	.loc 2 2546 0 discriminator 3
+.LVL1200:
+.L1033:
+	.loc 2 2597 0 discriminator 3
 	ldrh	r3, [r8]
-	.loc 2 2550 0 is_stmt 1 discriminator 3
+	.loc 2 2601 0 is_stmt 1 discriminator 3
 	mov	r0, r4
-	.loc 2 2546 0 discriminator 3
+	.loc 2 2597 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
-	.loc 2 2549 0 discriminator 3
+	.loc 2 2600 0 discriminator 3
 	strh	r7, [r4]	@ movhi
-	.loc 2 2550 0 discriminator 3
+	.loc 2 2601 0 discriminator 3
 	bl	make_superblock
-.LVL1193:
-	.loc 2 2551 0 discriminator 3
+.LVL1201:
+	.loc 2 2602 0 discriminator 3
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1029
-	.loc 2 2555 0
-	ldr	r3, .L1062+28
+	cbnz	r3, .L1034
+	.loc 2 2606 0
+	ldr	r3, .L1067+28
 	uxth	r5, r5
 	movw	r2, #65535
-	.loc 2 2556 0
+	.loc 2 2607 0
 	mov	r0, r7
-	.loc 2 2555 0
+	.loc 2 2606 0
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2556 0
+	.loc 2 2607 0
 	bl	INSERT_DATA_LIST
-.LVL1194:
-	.loc 2 2557 0
+.LVL1202:
+	.loc 2 2608 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1025
-	.loc 2 2557 0 is_stmt 0 discriminator 1
-	movw	r2, #2557
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ble	.L1030
+	.loc 2 2608 0 is_stmt 0 discriminator 1
+	mov	r2, #2608
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1195:
-	b	.L1025
-.LVL1196:
-.L1051:
+.LVL1203:
+	b	.L1030
+.LVL1204:
+.L1056:
 	movs	r1, #0
-	b	.L1027
-.LVL1197:
-.L1029:
-	.loc 2 2560 0 is_stmt 1
+	b	.L1032
+.LVL1205:
+.L1034:
+	.loc 2 2611 0 is_stmt 1
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1031
-	.loc 2 2560 0 is_stmt 0 discriminator 1
-	mov	r2, #2560
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	ble	.L1036
+	.loc 2 2611 0 is_stmt 0 discriminator 1
+	movw	r2, #2611
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1198:
-.L1031:
-	.loc 2 2564 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1062+32
+.LVL1206:
+.L1036:
+	.loc 2 2615 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1067+32
 	movs	r6, #0
-	.loc 2 2563 0 discriminator 1
-	ldr	r2, .L1062+36
+	.loc 2 2614 0 discriminator 1
+	ldr	r2, .L1067+36
 	add	ip, r4, #16
-	.loc 2 2564 0 discriminator 1
+	.loc 2 2615 0 discriminator 1
 	mov	lr, r6
-	.loc 2 2566 0 discriminator 1
+	.loc 2 2617 0 discriminator 1
 	movw	r10, #65535
-	.loc 2 2564 0 discriminator 1
+	.loc 2 2615 0 discriminator 1
 	ldr	r0, [r3]
 	ldrh	r1, [r2]
 	movs	r2, #20
-	.loc 2 2567 0 discriminator 1
+	.loc 2 2618 0 discriminator 1
 	str	r2, [sp, #4]
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
-.L1032:
-.LVL1199:
-	.loc 2 2563 0 discriminator 1
+.L1037:
+.LVL1207:
+	.loc 2 2614 0 discriminator 1
 	ldr	r2, [sp]
 	cmp	r2, r3
-	bne	.L1034
-	.loc 2 2571 0
-	cbnz	r6, .L1035
-	.loc 2 2571 0 is_stmt 0 discriminator 1
-	movw	r2, #2571
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	bne	.L1039
+	.loc 2 2622 0
+	cbnz	r6, .L1040
+	.loc 2 2622 0 is_stmt 0 discriminator 1
+	movw	r2, #2622
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1200:
-.L1035:
-	.loc 2 2573 0 is_stmt 1
-	ldr	r3, .L1062+40
+.LVL1208:
+.L1040:
+	.loc 2 2624 0 is_stmt 1
+	ldr	r3, .L1067+40
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L1036
-	.loc 2 2573 0 is_stmt 0 discriminator 1
-	movw	r2, #2573
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	bne	.L1041
+	.loc 2 2624 0 is_stmt 0 discriminator 1
+	mov	r2, #2624
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1201:
-.L1036:
-	.loc 2 2574 0 is_stmt 1
+.LVL1209:
+.L1041:
+	.loc 2 2625 0 is_stmt 1
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	uxth	r5, r5
-	ldr	r2, .L1062+44
-	ldr	r3, .L1062+48
-	ldr	r10, .L1062+80
+	ldr	r2, .L1067+44
+	ldr	r3, .L1067+48
+	ldr	r10, .L1067+80
 	cmp	r1, #0
-	bne	.L1037
-	.loc 2 2575 0
+	bne	.L1042
+	.loc 2 2626 0
 	ldr	r0, [r2]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
-	beq	.L1038
-	.loc 2 2576 0
-	ldr	r1, .L1062+52
+	beq	.L1043
+	.loc 2 2627 0
+	ldr	r1, .L1067+52
 	ldrh	ip, [r1]
 	add	r1, lr, ip
-.L1061:
-	.loc 2 2578 0
+.L1066:
+	.loc 2 2629 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-	.loc 2 2580 0
+	.loc 2 2631 0
 	mov	r0, r7
-	.loc 2 2579 0
+	.loc 2 2630 0
 	ldr	r1, [r3]
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	adds	r1, r1, #1
 	str	r1, [r3]
-	.loc 2 2580 0
+	.loc 2 2631 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
-.LVL1202:
+.LVL1210:
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
-.L1040:
-	.loc 2 2587 0
+.L1045:
+	.loc 2 2638 0
 	ldr	r2, [r2]
 	lsls	r1, r5, #1
 	str	r1, [sp]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1062+56
+	ldr	r2, .L1067+56
 	ldr	r1, [r2]
 	cmp	r0, r1
-	.loc 2 2590 0
+	.loc 2 2641 0
 	ldrh	r1, [fp]
-	.loc 2 2588 0
+	.loc 2 2639 0
 	it	hi
 	strhi	r0, [r2]
-	.loc 2 2590 0
-	ldr	r2, .L1062+52
+	.loc 2 2641 0
+	ldr	r2, .L1067+52
 	ldr	r0, [r3]
 	ldr	r3, [r10]
 	ldrh	r2, [r2]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1203:
-	ldr	r3, .L1062+60
-	.loc 2 2594 0
-	ldr	ip, .L1062+84
-	.loc 2 2590 0
+.LVL1211:
+	ldr	r3, .L1067+60
+	.loc 2 2645 0
+	ldr	ip, .L1067+84
+	.loc 2 2641 0
 	str	r0, [r3]
-	.loc 2 2591 0
-	ldr	r3, .L1062+64
+	.loc 2 2642 0
+	ldr	r3, .L1067+64
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-.LVL1204:
+.LVL1212:
 	movs	r2, #20
-	.loc 2 2594 0
-	ldr	r3, .L1062+32
+	.loc 2 2645 0
+	ldr	r3, .L1067+32
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.LVL1205:
-.L1042:
+.LVL1213:
+.L1047:
 	adds	r3, r3, #20
-	.loc 2 2593 0 discriminator 1
+	.loc 2 2644 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1043
-	.loc 2 2595 0
+	bne	.L1048
+	.loc 2 2646 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
-	.loc 2 2597 0
+	.loc 2 2648 0
 	mov	r10, #0
-	.loc 2 2595 0
+	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1206:
-	.loc 2 2596 0
+.LVL1214:
+	.loc 2 2647 0
 	mov	r3, r10
-	.loc 2 2598 0
+	.loc 2 2649 0
 	movs	r1, #20
-.LVL1207:
-.L1044:
-	.loc 2 2597 0 discriminator 1
+.LVL1215:
+.L1049:
+	.loc 2 2648 0 discriminator 1
 	uxth	r2, r10
 	cmp	r6, r2
-	bhi	.L1046
-	.loc 2 2608 0
-	cbz	r3, .L1047
-	.loc 2 2609 0
+	bhi	.L1051
+	.loc 2 2659 0
+	cbz	r3, .L1052
+	.loc 2 2660 0
 	mov	r0, r7
 	bl	update_multiplier_value
-.LVL1208:
-	.loc 2 2610 0
+.LVL1216:
+	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1209:
-.L1047:
-	.loc 2 2613 0
+.LVL1217:
+.L1052:
+	.loc 2 2664 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1062+28
+	ldr	r1, .L1067+28
 	cmp	r2, #0
-	bne	.L1048
-	.loc 2 2615 0
+	bne	.L1053
+	.loc 2 2666 0
 	ldr	r3, [r1]
 	movw	r2, #65535
-	.loc 2 2616 0
+	.loc 2 2667 0
 	mov	r0, r7
-	.loc 2 2615 0
+	.loc 2 2666 0
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	.loc 2 2616 0
+	.loc 2 2667 0
 	bl	INSERT_DATA_LIST
-.LVL1210:
+.LVL1218:
+	.loc 2 2668 0
+	b	.L1030
+.LVL1219:
+.L1039:
 	.loc 2 2617 0
-	b	.L1025
-.LVL1211:
-.L1034:
-	.loc 2 2566 0
 	ldrh	r1, [ip], #2
-	.loc 2 2564 0
+	.loc 2 2615 0
 	str	lr, [r3, #8]
-	.loc 2 2565 0
+	.loc 2 2616 0
 	str	lr, [r3, #12]
-	.loc 2 2566 0
+	.loc 2 2617 0
 	cmp	r1, r10
-	beq	.L1033
-	.loc 2 2567 0
+	beq	.L1038
+	.loc 2 2618 0
 	ldr	r2, [sp, #4]
 	lsls	r1, r1, #10
 	mla	r2, r2, r6, r0
-	.loc 2 2568 0
+	.loc 2 2619 0
 	adds	r6, r6, #1
-.LVL1212:
+.LVL1220:
 	uxth	r6, r6
-.LVL1213:
-	.loc 2 2567 0
+.LVL1221:
+	.loc 2 2618 0
 	str	r1, [r2, #4]
-.L1033:
-	adds	r3, r3, #20
-	b	.L1032
 .L1038:
-	.loc 2 2578 0
+	adds	r3, r3, #20
+	b	.L1037
+.L1043:
+	.loc 2 2629 0
 	movs	r1, #2
-	b	.L1061
-.L1037:
-	.loc 2 2582 0
+	b	.L1066
+.L1042:
+	.loc 2 2633 0
 	ldr	r0, [r2]
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB247:
-.LBB248:
+.LBB280:
+.LBB281:
 	mov	r0, r7
-.LBE248:
-.LBE247:
-	.loc 2 2583 0
+.LBE281:
+.LBE280:
+	.loc 2 2634 0
 	ldr	r1, [r10]
 	adds	r1, r1, #1
 	str	r1, [r10]
-.LVL1214:
-.LBB250:
-.LBB249:
-	bl	ftl_set_blk_mode.part.7
-.LVL1215:
+.LVL1222:
+.LBB283:
+.LBB282:
+	bl	ftl_set_blk_mode.part.6
+.LVL1223:
 	ldm	sp, {r2, r3}
-	b	.L1040
-.LVL1216:
-.L1043:
-.LBE249:
-.LBE250:
-	.loc 2 2594 0 discriminator 3
+	b	.L1045
+.LVL1224:
+.L1048:
+.LBE282:
+.LBE283:
+	.loc 2 2645 0 discriminator 3
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L1042
-.LVL1217:
-.L1046:
-	.loc 2 2598 0
-	ldr	r0, .L1062+32
+	b	.L1047
+.LVL1225:
+.L1051:
+	.loc 2 2649 0
+	ldr	r0, .L1067+32
 	mul	r2, r1, r10
 	ldr	r0, [r0]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1045
-	.loc 2 2600 0
+	bne	.L1050
+	.loc 2 2651 0
 	ldr	r0, [ip, #4]
-	.loc 2 2599 0
+	.loc 2 2650 0
 	adds	r3, r3, #1
-.LVL1218:
+.LVL1226:
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
-	.loc 2 2601 0
+	.loc 2 2652 0
 	ubfx	r0, r0, #10, #16
-	.loc 2 2599 0
+	.loc 2 2650 0
 	str	r3, [sp, #4]
-.LVL1219:
-	.loc 2 2601 0
+.LVL1227:
+	.loc 2 2652 0
 	bl	FtlBbmMapBadBlock
-.LVL1220:
-	.loc 2 2602 0
+.LVL1228:
+	.loc 2 2653 0
 	ldr	r2, [sp, #8]
 	add	r0, r4, r10, lsl #1
-	.loc 2 2603 0
+	.loc 2 2654 0
 	ldr	r1, [sp, #12]
 	ldr	r3, [sp, #4]
-	.loc 2 2602 0
+	.loc 2 2653 0
 	strh	r2, [r0, #16]	@ movhi
-	.loc 2 2603 0
+	.loc 2 2654 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.LVL1221:
-.L1045:
+.LVL1229:
+.L1050:
 	add	r10, r10, #1
-.LVL1222:
-	b	.L1044
-.LVL1223:
-.L1048:
-	.loc 2 2620 0
-	ldr	r3, .L1062+68
-	.loc 2 2624 0
-	ldr	r0, .L1062+72
-	.loc 2 2620 0
+.LVL1230:
+	b	.L1049
+.LVL1231:
+.L1053:
+	.loc 2 2671 0
+	ldr	r3, .L1067+68
+	.loc 2 2675 0
+	ldr	r0, .L1067+72
+	.loc 2 2671 0
 	ldrh	r3, [r3]
-	.loc 2 2621 0
+	.loc 2 2672 0
 	strh	r7, [r4]	@ movhi
-	.loc 2 2620 0
+	.loc 2 2671 0
 	smulbb	r3, r3, r2
-	.loc 2 2622 0
+	.loc 2 2673 0
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
-	.loc 2 2623 0
+	.loc 2 2674 0
 	strb	r2, [r4, #6]
-	.loc 2 2624 0
+	.loc 2 2675 0
 	ldr	r2, [r0]
-	.loc 2 2620 0
+	.loc 2 2671 0
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2624 0
+	.loc 2 2675 0
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r0]
-	.loc 2 2625 0
+	.loc 2 2676 0
 	ldr	r2, [r1]
 	ldr	r1, [sp]
 	strh	r3, [r2, r1]	@ movhi
-	.loc 2 2626 0
+	.loc 2 2677 0
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1049
-	.loc 2 2626 0 is_stmt 0 discriminator 2
+	cbz	r3, .L1054
+	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1050
-.L1049:
-	.loc 2 2626 0 discriminator 3
-	movw	r2, #2626
-	ldr	r1, .L1062+8
-	ldr	r0, .L1062+12
+	cbnz	r3, .L1055
+.L1054:
+	.loc 2 2677 0 discriminator 3
+	movw	r2, #2677
+	ldr	r1, .L1067+8
+	ldr	r0, .L1067+12
 	bl	printf
-.LVL1224:
-.L1050:
-	.loc 2 2628 0 is_stmt 1
+.LVL1232:
+.L1055:
+	.loc 2 2679 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1225:
-.L1063:
+.LVL1233:
+.L1068:
 	.align	2
-.L1062:
+.L1067:
 	.word	.LANCHOR48
 	.word	.LANCHOR45
-	.word	.LANCHOR158
+	.word	.LANCHOR157
 	.word	.LC1
 	.word	.LANCHOR53
-	.word	.LANCHOR89
+	.word	.LANCHOR87
 	.word	.LANCHOR47
-	.word	.LANCHOR43
-	.word	.LANCHOR112
+	.word	.LANCHOR42
+	.word	.LANCHOR111
 	.word	.LANCHOR3
-	.word	.LANCHOR82
-	.word	.LANCHOR40
-	.word	.LANCHOR73
+	.word	.LANCHOR80
+	.word	.LANCHOR43
+	.word	.LANCHOR72
 	.word	.LANCHOR14
-	.word	.LANCHOR77
-	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR74
 	.word	.LANCHOR127
 	.word	.LANCHOR19
-	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LANCHOR5
-	.word	.LANCHOR74
+	.word	.LANCHOR73
 	.word	-1024
 	.cfi_endproc
 .LFE301:
@@ -13138,7 +13253,7 @@ FtlGcFreeBadSuperBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1226:
+.LVL1234:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -13152,32 +13267,32 @@ FtlGcFreeBadSuperBlk:
 	.loc 5 390 0
 	mov	r10, r0
 	.loc 5 395 0
-	ldr	r4, .L1076
+	ldr	r4, .L1081
 	ldrh	r3, [r4]
-	cbz	r3, .L1065
-.LBB253:
-.LBB254:
+	cbz	r3, .L1070
+.LBB286:
+.LBB287:
 	.loc 5 399 0
-	ldr	r8, .L1076+16
-.LBE254:
-.LBE253:
+	ldr	r8, .L1081+16
+.LBE287:
+.LBE286:
 	movs	r6, #0
-.LVL1227:
-.L1066:
-.LBB257:
-.LBB255:
+.LVL1235:
+.L1071:
+.LBB290:
+.LBB288:
 	.loc 5 396 0
-	ldr	r3, .L1076+4
+	ldr	r3, .L1081+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1072
+	bhi	.L1077
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1228:
-.L1065:
-.LBE255:
-.LBE257:
+.LVL1236:
+.L1070:
+.LBE288:
+.LBE290:
 	.loc 5 415 0
 	movs	r0, #0
 	add	sp, sp, #8
@@ -13185,95 +13300,95 @@ FtlGcFreeBadSuperBlk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1229:
-.L1072:
+.LVL1237:
+.L1077:
 	.cfi_restore_state
-.LBB258:
-.LBB256:
+.LBB291:
+.LBB289:
 	.loc 5 397 0
-	ldr	r2, .L1076+8
+	ldr	r2, .L1081+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1230:
+.LVL1238:
 	.loc 5 401 0
-	ldr	r2, .L1076+12
+	ldr	r2, .L1081+12
 	.loc 5 397 0
 	mov	fp, r0
-.LVL1231:
-.L1067:
+.LVL1239:
+.L1072:
 	.loc 5 398 0
 	ldrh	r3, [r4]
 	uxth	r5, r7
-.LVL1232:
+.LVL1240:
 	cmp	r3, r5
-	bhi	.L1071
-.LVL1233:
+	bhi	.L1076
+.LVL1241:
 	adds	r6, r6, #1
-.LVL1234:
-	b	.L1066
-.LVL1235:
-.L1071:
+.LVL1242:
+	b	.L1071
+.LVL1243:
+.L1076:
 	.loc 5 399 0
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
-	bne	.L1068
+	bne	.L1073
 	.loc 5 401 0
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	bl	printf
-.LVL1236:
+.LVL1244:
 	.loc 5 403 0
 	mov	r0, fp
 	bl	FtlBbmMapBadBlock
-.LVL1237:
+.LVL1245:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1238:
+.LVL1246:
 	ldr	r3, [sp, #4]
 	.loc 5 405 0
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.LVL1239:
-.L1069:
+.LVL1247:
+.L1074:
 	cmp	r5, r1
-	bcc	.L1070
+	bcc	.L1075
 	.loc 5 407 0
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.LVL1240:
-.L1068:
+.LVL1248:
+.L1073:
 	adds	r7, r7, #1
-.LVL1241:
-	b	.L1067
-.LVL1242:
-.L1070:
+.LVL1249:
+	b	.L1072
+.LVL1250:
+.L1075:
 	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
 	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL1243:
+.LVL1251:
 	uxth	r5, r5
-.LVL1244:
+.LVL1252:
 	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1069
-.L1077:
+	b	.L1074
+.L1082:
 	.align	2
-.L1076:
-	.word	.LANCHOR103
+.L1081:
+	.word	.LANCHOR101
 	.word	.LANCHOR3
 	.word	.LANCHOR13
-	.word	.LC97
-	.word	.LANCHOR104
-.LBE256:
-.LBE258:
+	.word	.LC100
+	.word	.LANCHOR102
+.LBE289:
+.LBE291:
 	.cfi_endproc
 .LFE320:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -13287,122 +13402,122 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 .LFB304:
-	.loc 2 2687 0
+	.loc 2 2738 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1245:
+.LVL1253:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2687 0
+	.loc 2 2738 0
 	mov	r4, r0
-	.loc 2 2688 0
-	ldr	r3, .L1088
+	.loc 2 2739 0
+	ldr	r3, .L1093
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1079
-	.loc 2 2689 0
-	ldr	r2, .L1088+4
+	bne	.L1084
+	.loc 2 2740 0
+	ldr	r2, .L1093+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1080
-	.loc 2 2691 0
+	bne	.L1085
+	.loc 2 2742 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1081:
-.LVL1246:
-.LBB261:
-.LBB262:
-	.loc 2 2696 0
-	ldr	r5, .L1088+8
+.L1086:
+.LVL1254:
+.LBB294:
+.LBB295:
+	.loc 2 2747 0
+	ldr	r5, .L1093+8
 	mov	r1, r4
-	ldr	r0, .L1088+12
-.LVL1247:
+	ldr	r0, .L1093+12
+.LVL1255:
 	bl	List_remove_node
-.LVL1248:
+.LVL1256:
 	ldrh	r3, [r5]
-	cbnz	r3, .L1083
-	movw	r2, #2696
-	ldr	r1, .L1088+16
-	ldr	r0, .L1088+20
+	cbnz	r3, .L1088
+	movw	r2, #2747
+	ldr	r1, .L1093+16
+	ldr	r0, .L1093+20
 	bl	printf
-.LVL1249:
-.L1083:
+.LVL1257:
+.L1088:
 	ldrh	r3, [r5]
-	.loc 2 2697 0
+	.loc 2 2748 0
 	mov	r0, r4
-	.loc 2 2696 0
+	.loc 2 2747 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
-	.loc 2 2697 0
+	.loc 2 2748 0
 	bl	free_data_superblock
-.LVL1250:
-	.loc 2 2698 0
+.LVL1258:
+	.loc 2 2749 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL1251:
-	.loc 2 2699 0
-	ldr	r3, .L1088+24
+.LVL1259:
+	.loc 2 2750 0
+	ldr	r3, .L1093+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1088+28
+	ldr	r2, .L1093+28
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1087
-	movw	r2, #2699
-	ldr	r1, .L1088+16
-	ldr	r0, .L1088+20
+	ble	.L1092
+	movw	r2, #2750
+	ldr	r1, .L1093+16
+	ldr	r0, .L1093+20
 	bl	printf
-.LVL1252:
-.L1087:
+.LVL1260:
+.L1092:
 	movs	r3, #1
-	b	.L1078
-.LVL1253:
-.L1080:
-.LBE262:
-.LBE261:
-	.loc 2 2692 0
-	ldr	r2, .L1088+32
+	b	.L1083
+.LVL1261:
+.L1085:
+.LBE295:
+.LBE294:
+	.loc 2 2743 0
+	ldr	r2, .L1093+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1078
-	.loc 2 2692 0 is_stmt 0 discriminator 1
-	ldr	r2, .L1088+36
+	beq	.L1083
+	.loc 2 2743 0 is_stmt 0 discriminator 1
+	ldr	r2, .L1093+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1078
-	.loc 2 2692 0 discriminator 2
-	ldr	r2, .L1088+40
+	beq	.L1083
+	.loc 2 2743 0 discriminator 2
+	ldr	r2, .L1093+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1081
-.LVL1254:
-.L1078:
-	.loc 2 2705 0 is_stmt 1
+	bne	.L1086
+.LVL1262:
+.L1083:
+	.loc 2 2756 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL1255:
-.L1079:
-	.loc 2 2702 0
+.LVL1263:
+.L1084:
+	.loc 2 2753 0
 	bl	List_update_data_list
-.LVL1256:
-	.loc 2 2704 0
+.LVL1264:
+	.loc 2 2755 0
 	movs	r3, #0
-	b	.L1078
-.L1089:
+	b	.L1083
+.L1094:
 	.align	2
-.L1088:
-	.word	.LANCHOR43
-	.word	.LANCHOR82
-	.word	.LANCHOR45
+.L1093:
 	.word	.LANCHOR42
-	.word	.LANCHOR159
+	.word	.LANCHOR80
+	.word	.LANCHOR45
+	.word	.LANCHOR41
+	.word	.LANCHOR158
 	.word	.LC1
 	.word	.LANCHOR48
 	.word	.LANCHOR5
@@ -13422,125 +13537,125 @@ update_vpc_list:
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
 .LFB305:
-	.loc 2 2708 0
+	.loc 2 2759 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1257:
-	.loc 2 2711 0
+.LVL1265:
+	.loc 2 2762 0
 	movw	r3, #65535
-	.loc 2 2708 0
+	.loc 2 2759 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 2711 0
+	.loc 2 2762 0
 	cmp	r0, r3
-	.loc 2 2708 0
+	.loc 2 2759 0
 	mov	r4, r0
-	.loc 2 2711 0
-	beq	.L1091
-	.loc 2 2712 0
-	ldr	r5, .L1099
+	.loc 2 2762 0
+	beq	.L1096
+	.loc 2 2763 0
+	ldr	r5, .L1104
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1092
-	.loc 2 2713 0
+	cbnz	r2, .L1097
+	.loc 2 2764 0
 	mov	r1, r0
-	ldr	r0, .L1099+4
-.LVL1258:
+	ldr	r0, .L1104+4
+.LVL1266:
 	bl	printf
-.LVL1259:
-	.loc 2 2714 0
+.LVL1267:
+	.loc 2 2765 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1093
-.L1097:
-	.loc 2 2723 0
+	cbz	r5, .L1098
+.L1102:
+	.loc 2 2774 0
 	movs	r5, #0
-.LVL1260:
-.L1090:
-	.loc 2 2733 0
+.LVL1268:
+.L1095:
+	.loc 2 2784 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.LVL1261:
-.L1093:
-	.loc 2 2714 0 discriminator 1
-	movw	r2, #2714
-.LVL1262:
+.LVL1269:
 .L1098:
-	.loc 2 2730 0 discriminator 2
-	ldr	r1, .L1099+8
-	ldr	r0, .L1099+12
+	.loc 2 2765 0 discriminator 1
+	movw	r2, #2765
+.LVL1270:
+.L1103:
+	.loc 2 2781 0 discriminator 2
+	ldr	r1, .L1104+8
+	ldr	r0, .L1104+12
 	bl	printf
-.LVL1263:
-	b	.L1090
-.LVL1264:
-.L1092:
-	.loc 2 2717 0
+.LVL1271:
+	b	.L1095
+.LVL1272:
+.L1097:
+	.loc 2 2768 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1091:
-	.loc 2 2721 0
-	ldr	r6, .L1099+16
+.L1096:
+	.loc 2 2772 0
+	ldr	r6, .L1104+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
-.LVL1265:
+.LVL1273:
 	cmp	r0, r3
-	bne	.L1095
-	.loc 2 2722 0
+	bne	.L1100
+	.loc 2 2773 0
 	strh	r4, [r6]	@ movhi
-	b	.L1097
-.L1095:
-	.loc 2 2724 0
+	b	.L1102
+.L1100:
+	.loc 2 2775 0
 	cmp	r4, r0
-	beq	.L1097
-	.loc 2 2727 0
+	beq	.L1102
+	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1266:
-	.loc 2 2730 0
-	ldr	r3, .L1099+20
-	.loc 2 2727 0
+.LVL1274:
+	.loc 2 2781 0
+	ldr	r3, .L1104+20
+	.loc 2 2778 0
 	adds	r5, r0, #0
-	.loc 2 2730 0
-	ldr	r2, .L1099+24
-	.loc 2 2727 0
+	.loc 2 2781 0
+	ldr	r2, .L1104+24
+	.loc 2 2778 0
 	it	ne
 	movne	r5, #1
-.LVL1267:
-	.loc 2 2729 0
+.LVL1275:
+	.loc 2 2780 0
 	strh	r4, [r6]	@ movhi
-	.loc 2 2730 0
+	.loc 2 2781 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1099+28
+	ldr	r3, .L1104+28
 	muls	r3, r2, r3
-	ldr	r2, .L1099
+	ldr	r2, .L1104
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1090
-	.loc 2 2730 0 is_stmt 0 discriminator 1
+	bne	.L1095
+	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
-	beq	.L1090
-	.loc 2 2730 0 discriminator 2
-	movw	r2, #2730
-	b	.L1098
-.L1100:
+	beq	.L1095
+	.loc 2 2781 0 discriminator 2
+	movw	r2, #2781
+	b	.L1103
+.L1105:
 	.align	2
-.L1099:
-	.word	.LANCHOR43
-	.word	.LC98
-	.word	.LANCHOR160
-	.word	.LC1
-	.word	.LANCHOR151
+.L1104:
 	.word	.LANCHOR42
+	.word	.LC101
+	.word	.LANCHOR159
+	.word	.LC1
+	.word	.LANCHOR150
 	.word	.LANCHOR41
+	.word	.LANCHOR40
 	.word	-1431655765
 	.cfi_endproc
 .LFE305:
@@ -13555,7 +13670,7 @@ decrement_vpc_count:
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
 .LFB271:
-	.loc 2 947 0 is_stmt 1
+	.loc 2 996 0 is_stmt 1
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -13571,184 +13686,184 @@ FtlWriteDump_data:
 	.cfi_offset 14, -4
 	sub	sp, sp, #24
 	.cfi_def_cfa_offset 56
-	.loc 2 948 0
-	ldr	r4, .L1120
+	.loc 2 997 0
+	ldr	r4, .L1125
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1102
-	.loc 2 948 0 is_stmt 0 discriminator 1
+	beq	.L1107
+	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1102
-	.loc 2 949 0 is_stmt 1
-	ldr	r3, .L1120+4
+	bne	.L1107
+	.loc 2 998 0 is_stmt 1
+	ldr	r3, .L1125+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1102
-.LVL1268:
-.LBB266:
-.LBB267:
-	.loc 2 956 0
+	beq	.L1107
+.LVL1276:
+.LBB299:
+.LBB300:
+	.loc 2 1005 0
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1101
-	.loc 2 951 0
-	ldr	r3, .L1120+8
-	.loc 2 958 0
+	cbnz	r7, .L1106
+	.loc 2 1000 0
+	ldr	r3, .L1125+8
+	.loc 2 1007 0
 	mov	r2, r7
 	mov	r1, sp
-	.loc 2 951 0
+	.loc 2 1000 0
 	ldr	r6, [r3]
-	.loc 2 953 0
-	ldr	r3, .L1120+12
-	.loc 2 951 0
+	.loc 2 1002 0
+	ldr	r3, .L1125+12
+	.loc 2 1000 0
 	subs	r6, r6, #1
-	.loc 2 958 0
+	.loc 2 1007 0
 	mov	r0, r6
-	.loc 2 953 0
+	.loc 2 1002 0
 	ldrh	r8, [r3]
-	.loc 2 958 0
+	.loc 2 1007 0
 	bl	log2phys
-.LVL1269:
-	.loc 2 963 0
-	ldr	r2, .L1120+16
-	.loc 2 961 0
+.LVL1277:
+	.loc 2 1012 0
+	ldr	r2, .L1125+16
+	.loc 2 1010 0
 	ldr	r3, [sp]
-	.loc 2 962 0
+	.loc 2 1011 0
 	str	r6, [sp, #20]
-	.loc 2 963 0
+	.loc 2 1012 0
 	ldr	r0, [r2]
-	.loc 2 964 0
-	ldr	r2, .L1120+20
-	.loc 2 961 0
+	.loc 2 1013 0
+	ldr	r2, .L1125+20
+	.loc 2 1010 0
 	str	r3, [sp, #8]
-	.loc 2 967 0
+	.loc 2 1016 0
 	adds	r3, r3, #1
-	.loc 2 963 0
+	.loc 2 1012 0
 	str	r0, [sp, #12]
-	.loc 2 964 0
+	.loc 2 1013 0
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
-.LVL1270:
-	.loc 2 966 0
+.LVL1278:
+	.loc 2 1015 0
 	str	r7, [r5, #4]
-	.loc 2 967 0
-	beq	.L1104
-	.loc 2 969 0
+	.loc 2 1016 0
+	beq	.L1109
+	.loc 2 1018 0
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL1271:
-.L1105:
-	.loc 2 986 0
-	ldr	fp, .L1120
-	.loc 2 953 0
+.LVL1279:
+.L1110:
+	.loc 2 1035 0
+	ldr	fp, .L1125
+	.loc 2 1002 0
 	lsl	r8, r8, #2
-.LVL1272:
-	.loc 2 987 0
-	ldr	r10, .L1120+28
-	.loc 2 975 0
+.LVL1280:
+	.loc 2 1036 0
+	ldr	r10, .L1125+28
+	.loc 2 1024 0
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1106:
-	.loc 2 976 0
+.L1111:
+	.loc 2 1025 0
 	cmp	r8, r7
-	bne	.L1110
-.L1107:
-	.loc 2 992 0
+	bne	.L1115
+.L1112:
+	.loc 2 1041 0
 	movs	r3, #1
-.LVL1273:
-.L1119:
-.LBE267:
-.LBE266:
-	.loc 2 998 0
+.LVL1281:
+.L1124:
+.LBE300:
+.LBE299:
+	.loc 2 1047 0
 	strb	r3, [r4, #10]
-.L1101:
-	.loc 2 1000 0
+.L1106:
+	.loc 2 1049 0
 	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1274:
-.L1104:
+.LVL1282:
+.L1109:
 	.cfi_restore_state
-.LBB269:
-.LBB268:
-	.loc 2 973 0
-	ldr	r3, .L1120+24
+.LBB302:
+.LBB301:
+	.loc 2 1022 0
+	ldr	r3, .L1125+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL1275:
-	b	.L1105
-.LVL1276:
-.L1110:
-	.loc 2 978 0
+.LVL1283:
+	b	.L1110
+.LVL1284:
+.L1115:
+	.loc 2 1027 0
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1107
-	.loc 2 983 0
+	beq	.L1112
+	.loc 2 1032 0
 	ldr	r3, [sp, #8]
-	.loc 2 986 0
+	.loc 2 1035 0
 	mov	r0, fp
-	.loc 2 982 0
+	.loc 2 1031 0
 	str	r6, [r5, #8]
 	adds	r7, r7, #1
-	.loc 2 983 0
+	.loc 2 1032 0
 	str	r3, [r5, #12]
-	.loc 2 984 0
+	.loc 2 1033 0
 	ldrh	r3, [r4]
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 986 0
+	.loc 2 1035 0
 	bl	get_new_active_ppa
-.LVL1277:
-	.loc 2 987 0
+.LVL1285:
+	.loc 2 1036 0
 	ldr	r3, [r10]
-	.loc 2 988 0
+	.loc 2 1037 0
 	movs	r1, #1
-	.loc 2 986 0
+	.loc 2 1035 0
 	str	r0, [sp, #8]
-	.loc 2 988 0
+	.loc 2 1037 0
 	add	r0, sp, #4
-	.loc 2 987 0
+	.loc 2 1036 0
 	str	r3, [r5, #4]
 	adds	r3, r3, #1
 	adds	r2, r3, #1
 	it	eq
 	moveq	r3, #0
 	str	r3, [r10]
-	.loc 2 988 0
+	.loc 2 1037 0
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1278:
-	.loc 2 990 0
+.LVL1286:
+	.loc 2 1039 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1279:
-	b	.L1106
-.LVL1280:
-.L1102:
-.LBE268:
-.LBE269:
-	.loc 2 998 0
+.LVL1287:
+	b	.L1111
+.LVL1288:
+.L1107:
+.LBE301:
+.LBE302:
+	.loc 2 1047 0
 	movs	r3, #0
-	b	.L1119
-.L1121:
+	b	.L1124
+.L1126:
 	.align	2
-.L1120:
+.L1125:
 	.word	.LANCHOR51
 	.word	.LANCHOR19
-	.word	.LANCHOR62
+	.word	.LANCHOR61
 	.word	.LANCHOR3
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.word	.LANCHOR23
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.cfi_endproc
 .LFE271:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -13762,7 +13877,7 @@ FtlWriteDump_data:
 	.type	l2p_flush, %function
 l2p_flush:
 .LFB264:
-	.loc 2 740 0
+	.loc 2 789 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -13772,47 +13887,47 @@ l2p_flush:
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 746 0
+	.loc 2 795 0
 	movs	r4, #0
-	ldr	r5, .L1126
-	.loc 2 747 0
-	ldr	r6, .L1126+4
-	.loc 2 744 0
+	ldr	r5, .L1131
+	.loc 2 796 0
+	ldr	r6, .L1131+4
+	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1281:
-.L1123:
-	.loc 2 746 0 discriminator 1
+.LVL1289:
+.L1128:
+	.loc 2 795 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1282:
+.LVL1290:
 	cmp	r3, r0
-	bhi	.L1125
-	.loc 2 750 0
+	bhi	.L1130
+	.loc 2 799 0
 	movs	r0, #0
-.LVL1283:
+.LVL1291:
 	pop	{r4, r5, r6, pc}
-.LVL1284:
-.L1125:
-	.loc 2 747 0
+.LVL1292:
+.L1130:
+	.loc 2 796 0
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1124
-	.loc 2 748 0
+	bge	.L1129
+	.loc 2 797 0
 	bl	flush_l2p_region
-.LVL1285:
-.L1124:
+.LVL1293:
+.L1129:
 	adds	r4, r4, #1
-.LVL1286:
-	b	.L1123
-.L1127:
+.LVL1294:
+	b	.L1128
+.L1132:
 	.align	2
-.L1126:
+.L1131:
 	.word	.LANCHOR33
-	.word	.LANCHOR56
+	.word	.LANCHOR55
 	.cfi_endproc
 .LFE264:
 	.size	l2p_flush, .-l2p_flush
@@ -13826,15 +13941,15 @@ l2p_flush:
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
 .LFB284:
-	.loc 2 1656 0
+	.loc 2 1705 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1287:
-	.loc 2 1670 0
+.LVL1295:
+	.loc 2 1719 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
-	.loc 2 1656 0
+	.loc 2 1705 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -13848,1067 +13963,1067 @@ FtlRecoverySuperblock:
 	mov	r8, r0
 	sub	sp, sp, #48
 	.cfi_def_cfa_offset 80
-	.loc 2 1670 0
+	.loc 2 1719 0
 	cmp	r3, r2
-	beq	.L1257
-	.loc 2 1675 0
+	beq	.L1262
+	.loc 2 1724 0
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
-.LVL1288:
-	.loc 2 1676 0
+.LVL1296:
+	.loc 2 1725 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	.loc 2 1681 0
+	.loc 2 1730 0
 	ldr	r1, [sp, #4]
-	.loc 2 1676 0
+	.loc 2 1725 0
 	str	r3, [sp, #20]
-.LVL1289:
-	.loc 2 1681 0
-	ldr	r3, .L1265
+.LVL1297:
+	.loc 2 1730 0
+	ldr	r3, .L1270
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1131
-	.loc 2 1682 0
+	bne	.L1136
+	.loc 2 1731 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL1290:
-.L1263:
-	.loc 2 1989 0
+.LVL1298:
+.L1268:
+	.loc 2 2038 0
 	strb	r3, [r8, #6]
-.LVL1291:
-.L1257:
-	.loc 2 2010 0
+.LVL1299:
+.L1262:
+	.loc 2 2059 0
 	movs	r0, #0
 	add	sp, sp, #48
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1292:
-.L1131:
+.LVL1300:
+.L1136:
 	.cfi_restore_state
-	.loc 2 1689 0
+	.loc 2 1738 0
 	ldrh	r0, [r0, #16]
-.LVL1293:
-.L1132:
-	.loc 2 1690 0
+.LVL1301:
+.L1137:
+	.loc 2 1739 0
 	cmp	r0, r2
 	uxth	r5, r3
-.LVL1294:
+.LVL1302:
 	add	r3, r3, #1
-	beq	.L1133
-	.loc 2 1697 0
+	beq	.L1138
+	.loc 2 1746 0
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
-.LVL1295:
+.LVL1303:
 	mov	r4, r0
-.LVL1296:
-	.loc 2 1705 0
+.LVL1304:
+	.loc 2 1754 0
 	adds	r0, r0, #1
-.LVL1297:
-	beq	.L1134
-	.loc 2 1717 0
-	ldr	r3, .L1265+4
-	.loc 2 1722 0
+.LVL1305:
+	beq	.L1139
+	.loc 2 1766 0
+	ldr	r3, .L1270+4
+	.loc 2 1771 0
 	movs	r2, #0
 	mov	r5, r2
-.LVL1298:
-	.loc 2 1719 0
+.LVL1306:
+	.loc 2 1768 0
 	movw	fp, #65535
-	.loc 2 1720 0
+	.loc 2 1769 0
 	mov	r10, #20
-	.loc 2 1717 0
+	.loc 2 1766 0
 	ldrh	ip, [r3]
-	.loc 2 1720 0
-	ldr	r3, .L1265+8
+	.loc 2 1769 0
+	ldr	r3, .L1270+8
 	ldr	r0, [r3]
-	.loc 2 1721 0
-	ldr	r3, .L1265+12
+	.loc 2 1770 0
+	ldr	r3, .L1270+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1265+16
+	ldr	r3, .L1270+16
 	ldrh	r7, [r3]
-	.loc 2 1722 0
-	ldr	r3, .L1265+20
+	.loc 2 1771 0
+	ldr	r3, .L1270+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1265+24
+	ldr	r3, .L1270+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1135:
-.LVL1299:
-	.loc 2 1717 0 discriminator 1
+.L1140:
+.LVL1307:
+	.loc 2 1766 0 discriminator 1
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1139
-	.loc 2 1727 0
+	bhi	.L1144
+	.loc 2 1776 0
 	movs	r2, #0
-.LVL1300:
+.LVL1308:
 	mov	r1, r5
 	bl	FlashReadPages
-.LVL1301:
-	.loc 2 1728 0
-	ldr	r2, .L1265+28
-	.loc 2 1742 0
+.LVL1309:
+	.loc 2 1777 0
+	ldr	r2, .L1270+28
+	.loc 2 1791 0
 	uxth	r1, r4
-	.loc 2 1666 0
+	.loc 2 1715 0
 	movw	fp, #65535
-	.loc 2 1742 0
+	.loc 2 1791 0
 	str	r1, [sp, #12]
-	.loc 2 1728 0
+	.loc 2 1777 0
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-.LVL1302:
-	.loc 2 1730 0
-	ldr	r3, .L1265+8
-.LVL1303:
+.LVL1310:
+	.loc 2 1779 0
+	ldr	r3, .L1270+8
+.LVL1311:
 	ldr	r10, [r3]
-	.loc 2 1729 0
+	.loc 2 1778 0
 	movs	r3, #0
 	mov	r7, r10
-.LVL1304:
-.L1140:
+.LVL1312:
+.L1145:
 	uxth	r1, r3
-.LVL1305:
-	.loc 2 1729 0 is_stmt 0 discriminator 1
+.LVL1313:
+	.loc 2 1778 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bhi	.L1145
-	.loc 2 1745 0 is_stmt 1
-	bne	.L1143
-	.loc 2 1747 0
+	bhi	.L1150
+	.loc 2 1794 0 is_stmt 1
+	bne	.L1148
+	.loc 2 1796 0
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.LVL1306:
-.L1258:
-	.loc 2 1753 0
+.LVL1314:
+.L1263:
+	.loc 2 1802 0
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL1307:
-	.loc 2 1758 0
-	ldr	r3, .L1265
-	.loc 2 1753 0
+.LVL1315:
+	.loc 2 1807 0
+	ldr	r3, .L1270
+	.loc 2 1802 0
 	mov	r10, r0
-.LVL1308:
-	.loc 2 1758 0
+.LVL1316:
+	.loc 2 1807 0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1147
-	.loc 2 1759 0
+	bne	.L1152
+	.loc 2 1808 0
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
-	.loc 2 1760 0
+	.loc 2 1809 0
 	movs	r3, #0
 	strb	r3, [r8, #6]
-	.loc 2 1761 0
+	.loc 2 1810 0
 	strh	r3, [r8, #4]	@ movhi
-.L1147:
-	.loc 2 1764 0
+.L1152:
+	.loc 2 1813 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1148
-	.loc 2 1764 0 is_stmt 0 discriminator 1
+	bne	.L1153
+	.loc 2 1813 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1148
-	.loc 2 1765 0 is_stmt 1
+	bne	.L1153
+	.loc 2 1814 0 is_stmt 1
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.LVL1309:
-.L1264:
-	.loc 2 2004 0
+.LVL1317:
+.L1269:
+	.loc 2 2053 0
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-.LVL1310:
-	b	.L1257
-.LVL1311:
-.L1133:
-	.loc 2 1692 0
+.LVL1318:
+	b	.L1262
+.LVL1319:
+.L1138:
+	.loc 2 1741 0
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-.LVL1312:
-	b	.L1132
-.LVL1313:
-.L1134:
-	.loc 2 1706 0
+.LVL1320:
+	b	.L1137
+.LVL1321:
+.L1139:
+	.loc 2 1755 0
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1136
-	.loc 2 1706 0 is_stmt 0 discriminator 1
-	movw	r2, #1706
-	ldr	r1, .L1265+32
-	ldr	r0, .L1265+36
+	cbz	r3, .L1141
+	.loc 2 1755 0 is_stmt 0 discriminator 1
+	movw	r2, #1755
+	ldr	r1, .L1270+32
+	ldr	r0, .L1270+36
 	bl	printf
-.LVL1314:
-.L1136:
-	.loc 2 1707 0 is_stmt 1
+.LVL1322:
+.L1141:
+	.loc 2 1756 0 is_stmt 1
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1137
-	.loc 2 1707 0 is_stmt 0 discriminator 1
+	cbz	r3, .L1142
+	.loc 2 1756 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L1137
-	.loc 2 1707 0 discriminator 2
-	movw	r2, #1707
-	ldr	r1, .L1265+32
-	ldr	r0, .L1265+36
+	beq	.L1142
+	.loc 2 1756 0 discriminator 2
+	movw	r2, #1756
+	ldr	r1, .L1270+32
+	ldr	r0, .L1270+36
 	bl	printf
-.LVL1315:
-.L1137:
-	.loc 2 1708 0 is_stmt 1
+.LVL1323:
+.L1142:
+	.loc 2 1757 0 is_stmt 1
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1263
-.LVL1316:
-.L1139:
-	.loc 2 1718 0
+	b	.L1268
+.LVL1324:
+.L1144:
+	.loc 2 1767 0
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
-	.loc 2 1719 0
+	.loc 2 1768 0
 	cmp	r3, fp
-	.loc 2 1718 0
+	.loc 2 1767 0
 	str	r1, [sp]
-.LVL1317:
-	.loc 2 1719 0
-	beq	.L1138
-	.loc 2 1720 0
+.LVL1325:
+	.loc 2 1768 0
+	beq	.L1143
+	.loc 2 1769 0
 	mla	r1, r10, r5, r0
-	.loc 2 1721 0
+	.loc 2 1770 0
 	ldr	r6, [sp, #8]
-	.loc 2 1720 0
+	.loc 2 1769 0
 	orr	r3, r4, r3, lsl #10
-.LVL1318:
+.LVL1326:
 	str	r3, [r1, #4]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	mul	r3, r7, r5
 	bic	r3, r3, #3
 	add	r3, r3, r6
-	.loc 2 1722 0
+	.loc 2 1771 0
 	ldr	r6, [sp, #12]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	str	r3, [r1, #8]
-	.loc 2 1722 0
+	.loc 2 1771 0
 	mul	r3, lr, r5
-	.loc 2 1723 0
+	.loc 2 1772 0
 	adds	r5, r5, #1
-.LVL1319:
+.LVL1327:
 	uxth	r5, r5
-.LVL1320:
-	.loc 2 1722 0
+.LVL1328:
+	.loc 2 1771 0
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1138:
-.LVL1321:
+.L1143:
+.LVL1329:
 	adds	r2, r2, #1
-.LVL1322:
-	b	.L1135
-.LVL1323:
-.L1145:
-	.loc 2 1730 0
+.LVL1330:
+	b	.L1140
+.LVL1331:
+.L1150:
+	.loc 2 1779 0
 	ldr	r1, [r7]
-.LVL1324:
-	cbnz	r1, .L1141
-	.loc 2 1731 0
+.LVL1332:
+	cbnz	r1, .L1146
+	.loc 2 1780 0
 	ldr	r1, [r7, #12]
-	.loc 2 1732 0
+	.loc 2 1781 0
 	ldr	r6, [r1, #4]
-	.loc 2 1731 0
+	.loc 2 1780 0
 	str	r1, [sp, #8]
-.LVL1325:
-	.loc 2 1732 0
+.LVL1333:
+	.loc 2 1781 0
 	adds	r1, r6, #1
-.LVL1326:
-	beq	.L1142
-	.loc 2 1733 0
+.LVL1334:
+	beq	.L1147
+	.loc 2 1782 0
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-.LVL1327:
-	cbz	r0, .L1142
-	.loc 2 1735 0
+.LVL1335:
+	cbz	r0, .L1147
+	.loc 2 1784 0
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1142:
-	.loc 2 1738 0
+.L1147:
+	.loc 2 1787 0
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1144
-.LVL1328:
-.L1143:
-	.loc 2 1752 0
+	bne	.L1149
+.LVL1336:
+.L1148:
+	.loc 2 1801 0
 	uxth	r2, r4
-	.loc 2 1753 0
+	.loc 2 1802 0
 	uxth	r3, r3
-	.loc 2 1752 0
+	.loc 2 1801 0
 	str	r2, [sp, #8]
-.LVL1329:
-	.loc 2 1753 0
+.LVL1337:
+	.loc 2 1802 0
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1258
-.LVL1330:
-.L1141:
-	.loc 2 1742 0
+	b	.L1263
+.LVL1338:
+.L1146:
+	.loc 2 1791 0
 	ldr	fp, [sp, #12]
-.LVL1331:
-.L1144:
+.LVL1339:
+.L1149:
 	adds	r3, r3, #1
-.LVL1332:
+.LVL1340:
 	adds	r7, r7, #20
-	b	.L1140
-.LVL1333:
-.L1148:
-	.loc 2 1770 0
+	b	.L1145
+.LVL1341:
+.L1153:
+	.loc 2 1819 0
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1149
-	.loc 2 1770 0 is_stmt 0 discriminator 1
+	bne	.L1154
+	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1150
-.L1149:
-.LVL1334:
-.LBB270:
-	.loc 2 1775 0 is_stmt 1
-	ldr	r3, .L1265+40
-	.loc 2 1774 0
+	bne	.L1155
+.L1154:
+.LVL1342:
+.LBB303:
+	.loc 2 1824 0 is_stmt 1
+	ldr	r3, .L1270+40
+	.loc 2 1823 0
 	uxth	r6, r4
-.LVL1335:
-	.loc 2 1778 0
+.LVL1343:
+	.loc 2 1827 0
 	uxth	r4, r4
-.LVL1336:
-	.loc 2 1785 0
-	ldr	r7, .L1265+8
-	.loc 2 1775 0
+.LVL1344:
+	.loc 2 1834 0
+	ldr	r7, .L1270+8
+	.loc 2 1824 0
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	.loc 2 1776 0
+	.loc 2 1825 0
 	itt	eq
 	ldreq	r2, [sp]
 	streq	r2, [r3]
-.LVL1337:
-	.loc 2 1778 0
+.LVL1345:
+	.loc 2 1827 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #7
 	cmp	r4, r3
-	.loc 2 1779 0
+	.loc 2 1828 0
 	itet	gt
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.LVL1338:
-.L1153:
-	.loc 2 1780 0 discriminator 1
+.LVL1346:
+.L1158:
+	.loc 2 1829 0 discriminator 1
 	cmp	r4, r6
-	bhi	.L1163
-	.loc 2 1782 0
-	ldr	r3, .L1265+4
-	.loc 2 1784 0
+	bhi	.L1168
+	.loc 2 1831 0
+	ldr	r3, .L1270+4
+	.loc 2 1833 0
 	movw	lr, #65535
-	.loc 2 1785 0
+	.loc 2 1834 0
 	ldr	r0, [r7]
 	mov	ip, #20
-	.loc 2 1782 0
+	.loc 2 1831 0
 	ldrh	fp, [r3]
-	.loc 2 1785 0
+	.loc 2 1834 0
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1164
-.LVL1339:
-.L1155:
-	.loc 2 1783 0
+	b	.L1169
+.LVL1347:
+.L1160:
+	.loc 2 1832 0
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
-	.loc 2 1784 0
+	.loc 2 1833 0
 	cmp	r2, lr
-	.loc 2 1783 0
+	.loc 2 1832 0
 	str	r1, [sp, #12]
-.LVL1340:
-	.loc 2 1784 0
-	beq	.L1154
-	.loc 2 1785 0
+.LVL1348:
+	.loc 2 1833 0
+	beq	.L1159
+	.loc 2 1834 0
 	mla	r1, ip, r5, r0
-	.loc 2 1786 0
+	.loc 2 1835 0
 	adds	r5, r5, #1
-.LVL1341:
-	.loc 2 1785 0
+.LVL1349:
+	.loc 2 1834 0
 	orr	r2, r4, r2, lsl #10
-.LVL1342:
-	.loc 2 1786 0
+.LVL1350:
+	.loc 2 1835 0
 	uxth	r5, r5
-.LVL1343:
-	.loc 2 1785 0
+.LVL1351:
+	.loc 2 1834 0
 	str	r2, [r1, #4]
-.L1154:
-.LVL1344:
+.L1159:
+.LVL1352:
 	adds	r3, r3, #1
-.LVL1345:
-.L1164:
-	.loc 2 1782 0 discriminator 1
+.LVL1353:
+.L1169:
+	.loc 2 1831 0 discriminator 1
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1155
-	.loc 2 1789 0
+	bhi	.L1160
+	.loc 2 1838 0
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1346:
-	ldr	r3, .L1265+40
+.LVL1354:
+	ldr	r3, .L1270+40
 	movs	r1, #20
-	.loc 2 1790 0
+	.loc 2 1839 0
 	movs	r0, #0
-	.loc 2 1793 0
+	.loc 2 1842 0
 	movw	ip, #65535
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.LVL1347:
-.L1156:
-	.loc 2 1790 0 discriminator 1
+.LVL1355:
+.L1161:
+	.loc 2 1839 0 discriminator 1
 	cmp	r3, r5
-	bne	.L1161
-	cbz	r0, .L1162
-	ldr	r3, .L1265+40
+	bne	.L1166
+	cbz	r0, .L1167
+	ldr	r3, .L1270+40
 	str	r2, [r3]
-.L1162:
-	.loc 2 1780 0
+.L1167:
+	.loc 2 1829 0
 	adds	r4, r4, #1
-.LVL1348:
+.LVL1356:
 	uxth	r4, r4
-.LVL1349:
-	b	.L1153
-.L1266:
+.LVL1357:
+	b	.L1158
+.L1271:
 	.align	2
-.L1265:
+.L1270:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR120
-	.word	.LANCHOR93
+	.word	.LANCHOR91
 	.word	.LANCHOR23
-	.word	.LANCHOR94
+	.word	.LANCHOR92
 	.word	.LANCHOR24
-	.word	.LANCHOR72
-	.word	.LANCHOR161
+	.word	.LANCHOR71
+	.word	.LANCHOR160
 	.word	.LC1
-	.word	.LANCHOR154
-.L1161:
-	.loc 2 1791 0
+	.word	.LANCHOR153
+.L1166:
+	.loc 2 1840 0
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1157
-	cbz	r0, .L1150
-.L1259:
-	.loc 2 1809 0
-	ldr	r3, .L1267
+	beq	.L1162
+	cbz	r0, .L1155
+.L1264:
+	.loc 2 1858 0
+	ldr	r3, .L1272
 	str	r2, [r3]
-.LVL1350:
-.L1150:
-.LBE270:
-	.loc 2 1814 0
-	ldr	r3, .L1267+4
+.LVL1358:
+.L1155:
+.LBE303:
+	.loc 2 1863 0
+	ldr	r3, .L1272+4
 	movs	r2, #1
-	.loc 2 1815 0
-	ldr	r0, .L1267+8
-	.loc 2 1824 0
-	ldr	r6, .L1267+12
-	.loc 2 1814 0
+	.loc 2 1864 0
+	ldr	r0, .L1272+8
+	.loc 2 1873 0
+	ldr	r6, .L1272+12
+	.loc 2 1863 0
 	strh	r2, [r3]	@ movhi
-	.loc 2 1815 0
+	.loc 2 1864 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1351:
+.LVL1359:
 	ldr	fp, [sp, #4]
-.LVL1352:
-.L1165:
-	.loc 2 1821 0
-	ldr	r3, .L1267+16
-	.loc 2 1823 0
+.LVL1360:
+.L1170:
+	.loc 2 1870 0
+	ldr	r3, .L1272+16
+	.loc 2 1872 0
 	movw	lr, #65535
-	.loc 2 1824 0
+	.loc 2 1873 0
 	ldr	r0, [r6]
 	movs	r7, #20
-	.loc 2 1821 0
+	.loc 2 1870 0
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r3]
 	movs	r3, #0
-	.loc 2 1820 0
+	.loc 2 1869 0
 	str	r3, [sp, #12]
-.LVL1353:
-.L1166:
-	.loc 2 1821 0 discriminator 1
+.LVL1361:
+.L1171:
+	.loc 2 1870 0 discriminator 1
 	uxth	r2, r3
 	cmp	r2, r4
-	bcc	.L1168
-	.loc 2 1828 0
+	bcc	.L1173
+	.loc 2 1877 0
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1354:
-	.loc 2 1829 0
+.LVL1362:
+	.loc 2 1878 0
 	movs	r3, #0
-.LVL1355:
-.L1262:
+.LVL1363:
+.L1267:
 	str	r3, [sp, #24]
-.LVL1356:
-	.loc 2 1829 0 is_stmt 0 discriminator 2
+.LVL1364:
+	.loc 2 1878 0 is_stmt 0 discriminator 2
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1197
-	.loc 2 1983 0 is_stmt 1
-	ldr	r3, .L1267+20
-	.loc 2 1982 0
+	bhi	.L1202
+	.loc 2 2032 0 is_stmt 1
+	ldr	r3, .L1272+20
+	.loc 2 2031 0
 	add	fp, fp, #1
-.LVL1357:
+.LVL1365:
 	uxth	fp, fp
-.LVL1358:
-	.loc 2 1983 0
+.LVL1366:
+	.loc 2 2032 0
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1165
-	.loc 2 1986 0
-	ldr	r2, .L1267+16
-	.loc 2 1988 0
+	bne	.L1170
+	.loc 2 2035 0
+	ldr	r2, .L1272+16
+	.loc 2 2037 0
 	movw	r0, #65535
-	.loc 2 1985 0
+	.loc 2 2034 0
 	movs	r3, #0
-	.loc 2 1984 0
+	.loc 2 2033 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 1985 0
+	.loc 2 2034 0
 	strh	r3, [r8, #4]	@ movhi
-.LVL1359:
-	.loc 2 1986 0
+.LVL1367:
+	.loc 2 2035 0
 	ldrh	r2, [r2]
-.LVL1360:
-.L1198:
-	.loc 2 1986 0 is_stmt 0 discriminator 1
+.LVL1368:
+.L1203:
+	.loc 2 2035 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1257
-	.loc 2 1987 0 is_stmt 1
+	bcs	.L1262
+	.loc 2 2036 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
-	.loc 2 1988 0
+	.loc 2 2037 0
 	cmp	r4, r0
-	.loc 2 1987 0
+	.loc 2 2036 0
 	str	r1, [sp, #16]
-.LVL1361:
+.LVL1369:
 	add	r1, r3, #1
-	.loc 2 1988 0
-	bne	.L1263
+	.loc 2 2037 0
+	bne	.L1268
 	mov	r3, r1
-.LVL1362:
-	b	.L1198
-.LVL1363:
-.L1157:
-.LBB271:
-	.loc 2 1792 0
+.LVL1370:
+	b	.L1203
+.LVL1371:
+.L1162:
+.LBB304:
+	.loc 2 1841 0
 	ldr	r1, [r3, #12]
-.LVL1364:
-	.loc 2 1793 0
+.LVL1372:
+	.loc 2 1842 0
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1160
-	.loc 2 1795 0
+	beq	.L1165
+	.loc 2 1844 0
 	ldr	r1, [r1, #4]
-.LVL1365:
+.LVL1373:
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1160:
+.L1165:
 	adds	r3, r3, #20
-.LVL1366:
-	b	.L1156
-.LVL1367:
-.L1163:
-	.loc 2 1809 0
-	mov	r2, #-1
-	b	.L1259
-.LVL1368:
+.LVL1374:
+	b	.L1161
+.LVL1375:
 .L1168:
-.LBE271:
-	.loc 2 1822 0
+	.loc 2 1858 0
+	mov	r2, #-1
+	b	.L1264
+.LVL1376:
+.L1173:
+.LBE304:
+	.loc 2 1871 0
 	ldrh	r2, [r1], #2
-.LVL1369:
-	.loc 2 1823 0
+.LVL1377:
+	.loc 2 1872 0
 	cmp	r2, lr
-	beq	.L1167
-	.loc 2 1824 0
+	beq	.L1172
+	.loc 2 1873 0
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
-.LVL1370:
+.LVL1378:
 	mla	ip, r7, r5, r0
 	str	r2, [ip, #4]
-	.loc 2 1825 0
+	.loc 2 1874 0
 	mov	r2, r5
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1371:
-.L1167:
+.LVL1379:
+.L1172:
 	adds	r3, r3, #1
-.LVL1372:
-	b	.L1166
-.LVL1373:
-.L1197:
+.LVL1380:
+	b	.L1171
+.LVL1381:
+.L1202:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
-	.loc 2 1830 0
+	.loc 2 1879 0
 	ldr	r3, [r6]
 	str	r3, [sp, #28]
 	adds	r7, r3, r5
 	ldr	r4, [r7, #4]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	ubfx	r0, r4, #10, #16
-	.loc 2 1830 0
+	.loc 2 1879 0
 	str	r4, [sp, #44]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	bl	P2V_plane
-.LVL1374:
-	.loc 2 1833 0
+.LVL1382:
+	.loc 2 1882 0
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1170
-	.loc 2 1833 0 is_stmt 0 discriminator 1
+	bcc	.L1175
+	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
-	bne	.L1171
-	.loc 2 1834 0 is_stmt 1
+	bne	.L1176
+	.loc 2 1883 0 is_stmt 1
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1170
-.L1171:
-	.loc 2 1837 0
+	bhi	.L1175
+.L1176:
+	.loc 2 1886 0
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1172
-	.loc 2 1837 0 is_stmt 0 discriminator 1
+	bne	.L1177
+	.loc 2 1886 0 is_stmt 0 discriminator 1
 	cmp	r10, r0
-	beq	.L1173
-.L1172:
-.LVL1375:
-	.loc 2 1841 0 is_stmt 1
+	beq	.L1178
+.L1177:
+.LVL1383:
+	.loc 2 1890 0 is_stmt 1
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1174
-	.loc 2 1842 0
+	beq	.L1179
+	.loc 2 1891 0
 	ldr	r3, [r7, #12]
-.LVL1376:
-	.loc 2 1843 0
+.LVL1384:
+	.loc 2 1892 0
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1175
-.LVL1377:
-.L1181:
-.LBB272:
-	.loc 2 1876 0
+	beq	.L1180
+.LVL1385:
+.L1186:
+.LBB305:
+	.loc 2 1925 0
 	ldrh	r0, [r8]
-.LVL1378:
-.L1261:
-.LBE272:
-	.loc 2 1960 0
+.LVL1386:
+.L1266:
+.LBE305:
+	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1379:
-.L1170:
+.LVL1387:
+.L1175:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1262
-.LVL1380:
-.L1175:
-	.loc 2 1849 0
+	b	.L1267
+.LVL1388:
+.L1180:
+	.loc 2 1898 0
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
-.LVL1381:
-	.loc 2 1850 0
+.LVL1389:
+	.loc 2 1899 0
 	adds	r2, r2, #1
-.LVL1382:
-	beq	.L1176
-	.loc 2 1851 0 discriminator 1
-	ldr	r2, .L1267+24
+.LVL1390:
+	beq	.L1181
+	.loc 2 1900 0 discriminator 1
+	ldr	r2, .L1272+24
 	ldr	r0, [sp]
-.LVL1383:
+.LVL1391:
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1384:
-	.loc 2 1850 0 discriminator 1
-	cbz	r0, .L1176
-	.loc 2 1853 0
+.LVL1392:
+	.loc 2 1899 0 discriminator 1
+	cbz	r0, .L1181
+	.loc 2 1902 0
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1176:
-	.loc 2 1857 0
+.L1181:
+	.loc 2 1906 0
 	ldr	r4, [r3, #8]
-.LVL1385:
-	.loc 2 1859 0
+.LVL1393:
+	.loc 2 1908 0
 	add	r1, sp, #40
-	.loc 2 1858 0
+	.loc 2 1907 0
 	ldr	r3, [r3, #12]
-.LVL1386:
-	.loc 2 1859 0
+.LVL1394:
+	.loc 2 1908 0
 	movs	r2, #0
 	mov	r0, r4
-	.loc 2 1858 0
+	.loc 2 1907 0
 	str	r3, [sp, #36]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	bl	log2phys
-.LVL1387:
-	.loc 2 1860 0
-	ldr	r3, .L1267
+.LVL1395:
+	.loc 2 1909 0
+	ldr	r3, .L1272
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1177
-	.loc 2 1861 0 discriminator 1
+	beq	.L1182
+	.loc 2 1910 0 discriminator 1
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1388:
-	.loc 2 1860 0 discriminator 1
+.LVL1396:
+	.loc 2 1909 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1177
-.LBB273:
-	.loc 2 1865 0
+	beq	.L1182
+.LBB306:
+	.loc 2 1914 0
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1178
-	.loc 2 1866 0
+	beq	.L1183
+	.loc 2 1915 0
 	ldr	r0, [r6]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1866 0
+	.loc 2 1915 0
 	add	r0, r0, r5
-	.loc 2 1867 0
+	.loc 2 1916 0
 	str	r3, [r0, #4]
-	.loc 2 1866 0
+	.loc 2 1915 0
 	ldr	r7, [r0, #12]
-.LVL1389:
-	.loc 2 1868 0
+.LVL1397:
+	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1390:
-	.loc 2 1881 0
+.LVL1398:
+	.loc 2 1930 0
 	ldr	r2, [r6]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1179
-.LVL1391:
-.L1180:
-	.loc 2 1913 0
+	bne	.L1184
+.LVL1399:
+.L1185:
+	.loc 2 1962 0
 	mov	r3, #-1
-	.loc 2 1914 0
+	.loc 2 1963 0
 	ldrh	r0, [r8]
-	.loc 2 1913 0
+	.loc 2 1962 0
 	str	r3, [sp, #36]
-	.loc 2 1914 0
+	.loc 2 1963 0
 	bl	decrement_vpc_count
-.LVL1392:
-.L1188:
-.LBE273:
-	.loc 2 1954 0
+.LVL1400:
+.L1193:
+.LBE306:
+	.loc 2 2003 0
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1170
-.L1201:
-	.loc 2 1956 0
+	beq	.L1175
+.L1206:
+	.loc 2 2005 0
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1393:
-	.loc 2 1957 0
-	ldr	r3, .L1267+28
-	.loc 2 1956 0
+.LVL1401:
+	.loc 2 2006 0
+	ldr	r3, .L1272+28
+	.loc 2 2005 0
 	mov	r4, r0
-.LVL1394:
-	.loc 2 1957 0
+.LVL1402:
+	.loc 2 2006 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1193
-	.loc 2 1957 0 is_stmt 0 discriminator 1
-	movw	r2, #1957
-	ldr	r1, .L1267+32
-	ldr	r0, .L1267+36
-.LVL1395:
+	bhi	.L1198
+	.loc 2 2006 0 is_stmt 0 discriminator 1
+	movw	r2, #2006
+	ldr	r1, .L1272+32
+	ldr	r0, .L1272+36
+.LVL1403:
 	bl	printf
-.LVL1396:
-.L1193:
-	.loc 2 1958 0 is_stmt 1
-	ldr	r3, .L1267+40
+.LVL1404:
+.L1198:
+	.loc 2 2007 0 is_stmt 1
+	ldr	r3, .L1272+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1194
-	.loc 2 1960 0
+	beq	.L1199
+	.loc 2 2009 0
 	mov	r0, r4
-	b	.L1261
-.LVL1397:
-.L1178:
-.LBB274:
-	.loc 2 1872 0
+	b	.L1266
+.LVL1405:
+.L1183:
+.LBB307:
+	.loc 2 1921 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1181
-	.loc 2 1873 0
+	bne	.L1186
+	.loc 2 1922 0
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.LVL1398:
-	b	.L1181
-.LVL1399:
-.L1179:
-	.loc 2 1881 0 discriminator 1
+.LVL1406:
+	b	.L1186
+.LVL1407:
+.L1184:
+	.loc 2 1930 0 discriminator 1
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1180
-	.loc 2 1882 0 discriminator 2
-	ldr	r0, .L1267
-	.loc 2 1869 0 discriminator 2
+	bne	.L1185
+	.loc 2 1931 0 discriminator 2
+	ldr	r0, .L1272
+	.loc 2 1918 0 discriminator 2
 	ldr	r1, [r7, #4]
-	.loc 2 1882 0 discriminator 2
+	.loc 2 1931 0 discriminator 2
 	ldr	r0, [r0]
-	.loc 2 1869 0 discriminator 2
+	.loc 2 1918 0 discriminator 2
 	str	r1, [sp, #28]
-	.loc 2 1882 0 discriminator 2
+	.loc 2 1931 0 discriminator 2
 	bl	ftl_cmp_data_ver
-.LVL1400:
-	.loc 2 1881 0 discriminator 2
+.LVL1408:
+	.loc 2 1930 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1180
-	.loc 2 1883 0
+	beq	.L1185
+	.loc 2 1932 0
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1183
-.L1186:
-	.loc 2 1909 0
+	bne	.L1188
+.L1191:
+	.loc 2 1958 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-.LVL1401:
-	b	.L1180
-.L1183:
-	.loc 2 1886 0
+.LVL1409:
+	b	.L1185
+.L1188:
+	.loc 2 1935 0
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1180
-	.loc 2 1887 0
+	beq	.L1185
+	.loc 2 1936 0
 	adds	r0, r1, #1
-	beq	.L1184
-.LVL1402:
-	.loc 2 1889 0
+	beq	.L1189
+.LVL1410:
+	.loc 2 1938 0
 	str	r1, [r3, #4]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	.loc 2 1888 0
+	.loc 2 1937 0
 	ldr	r7, [r3, #12]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	bl	FlashReadPages
-.LVL1403:
-.L1185:
-	.loc 2 1895 0
+.LVL1411:
+.L1190:
+	.loc 2 1944 0
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1186
-	.loc 2 1896 0
+	beq	.L1191
+	.loc 2 1945 0
 	ldr	r3, [r7, #4]
-.LVL1404:
-	.loc 2 1897 0
-	ldr	r2, .L1267
+.LVL1412:
+	.loc 2 1946 0
+	ldr	r2, .L1272
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1405:
+.LVL1413:
 	cmp	r0, #0
-	beq	.L1186
-	.loc 2 1898 0
+	beq	.L1191
+	.loc 2 1947 0
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
-.LVL1406:
+.LVL1414:
 	cmp	r0, #0
-	beq	.L1180
-.LVL1407:
-	b	.L1186
-.LVL1408:
-.L1184:
-	.loc 2 1892 0
+	beq	.L1185
+.LVL1415:
+	b	.L1191
+.LVL1416:
+.L1189:
+	.loc 2 1941 0
 	str	r1, [r2, r5]
-	b	.L1185
-.L1268:
+	b	.L1190
+.L1273:
 	.align	2
-.L1267:
-	.word	.LANCHOR154
-	.word	.LANCHOR162
+.L1272:
+	.word	.LANCHOR153
+	.word	.LANCHOR161
 	.word	.LANCHOR144
 	.word	.LANCHOR120
 	.word	.LANCHOR3
 	.word	.LANCHOR19
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR5
-	.word	.LANCHOR161
+	.word	.LANCHOR160
 	.word	.LC1
-	.word	.LANCHOR43
-.LVL1409:
-.L1177:
-.LBE274:
-	.loc 2 1915 0
+	.word	.LANCHOR42
+.LVL1417:
+.L1182:
+.LBE307:
+	.loc 2 1964 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1188
-	.loc 2 1917 0
+	beq	.L1193
+	.loc 2 1966 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL1410:
-	.loc 2 1918 0
+.LVL1418:
+	.loc 2 1967 0
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1188
-	.loc 2 1918 0 is_stmt 0 discriminator 1
+	beq	.L1193
+	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1201
-	.loc 2 1919 0 is_stmt 1
+	beq	.L1206
+	.loc 2 1968 0 is_stmt 1
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1411:
-	.loc 2 1921 0
-	ldr	r3, .L1269
+.LVL1419:
+	.loc 2 1970 0
+	ldr	r3, .L1274
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1192
-	.loc 2 1922 0 discriminator 1
-	ldr	r3, .L1269+4
-	.loc 2 1921 0 discriminator 1
+	beq	.L1197
+	.loc 2 1971 0 discriminator 1
+	ldr	r3, .L1274+4
+	.loc 2 1970 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1192
-	.loc 2 1923 0
-	ldr	r3, .L1269+8
-	.loc 2 1922 0
+	beq	.L1197
+	.loc 2 1972 0
+	ldr	r3, .L1274+8
+	.loc 2 1971 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1188
-.L1192:
-.LVL1412:
-.LBB275:
-	.loc 2 1927 0
+	bne	.L1193
+.L1197:
+.LVL1420:
+.LBB308:
+	.loc 2 1976 0
 	ldr	r0, [r6]
-.LVL1413:
-	.loc 2 1930 0
+.LVL1421:
+	.loc 2 1979 0
 	movs	r2, #0
 	movs	r1, #1
-	.loc 2 1929 0
+	.loc 2 1978 0
 	str	r7, [r0, #4]
-	.loc 2 1927 0
+	.loc 2 1976 0
 	ldr	r5, [r0, #12]
-.LVL1414:
-	.loc 2 1930 0
+.LVL1422:
+	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1415:
-	.loc 2 1933 0
+.LVL1423:
+	.loc 2 1982 0
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1188
-	.loc 2 1934 0
+	beq	.L1193
+	.loc 2 1983 0
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1416:
+.LVL1424:
 	cmp	r0, #0
-	bne	.L1188
-	.loc 2 1941 0
+	bne	.L1193
+	.loc 2 1990 0
 	movs	r2, #1
 	add	r1, sp, #40
-.LVL1417:
+.LVL1425:
 	mov	r0, r4
 	bl	log2phys
-.LVL1418:
-	b	.L1188
-.LVL1419:
-.L1194:
-.LBE275:
-	.loc 2 1962 0
+.LVL1426:
+	b	.L1193
+.LVL1427:
+.L1199:
+.LBE308:
+	.loc 2 2011 0
 	mov	r1, r4
-	ldr	r0, .L1269+12
+	ldr	r0, .L1274+12
 	bl	printf
-.LVL1420:
-	b	.L1170
-.LVL1421:
-.L1174:
-	.loc 2 1969 0
-	ldr	r3, .L1269+16
+.LVL1428:
+	b	.L1175
+.LVL1429:
+.L1179:
+	.loc 2 2018 0
+	ldr	r3, .L1274+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1195
-	.loc 2 1970 0
-	ldr	r2, .L1269+20
+	bhi	.L1200
+	.loc 2 2019 0
+	ldr	r2, .L1274+20
 	str	r4, [r2, r3, lsl #2]
-	.loc 2 1971 0
+	.loc 2 2020 0
 	adds	r3, r3, #1
-	ldr	r2, .L1269+16
+	ldr	r2, .L1274+16
 	str	r3, [r2]
-.L1195:
-	.loc 2 1973 0
+.L1200:
+	.loc 2 2022 0
 	ldrh	r0, [r8]
-.LVL1422:
+.LVL1430:
 	bl	decrement_vpc_count
-.LVL1423:
-	.loc 2 1975 0
-	ldr	r3, .L1269+24
+.LVL1431:
+	.loc 2 2024 0
+	ldr	r3, .L1274+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1196
-	.loc 2 1976 0
+	bne	.L1201
+	.loc 2 2025 0
 	ldr	r2, [sp]
-.L1260:
-	.loc 2 1978 0
+.L1265:
+	.loc 2 2027 0
 	str	r2, [r3]
-	b	.L1170
-.L1196:
-	.loc 2 1977 0
+	b	.L1175
+.L1201:
+	.loc 2 2026 0
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1170
-	.loc 2 1978 0
+	bcs	.L1175
+	.loc 2 2027 0
 	mov	r2, r1
-	b	.L1260
-.LVL1424:
-.L1173:
-	.loc 2 2002 0
+	b	.L1265
+.LVL1432:
+.L1178:
+	.loc 2 2051 0
 	strb	r10, [r8, #6]
-	.loc 2 2004 0
+	.loc 2 2053 0
 	mov	r2, r10
-	.loc 2 2003 0
+	.loc 2 2052 0
 	strh	fp, [r8, #2]	@ movhi
-	.loc 2 2004 0
+	.loc 2 2053 0
 	mov	r1, fp
-	b	.L1264
-.L1270:
+	b	.L1269
+.L1275:
 	.align	2
-.L1269:
+.L1274:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LC99
+	.word	.LC102
+	.word	.LANCHOR162
 	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR154
+	.word	.LANCHOR153
 	.cfi_endproc
 .LFE284:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -14922,132 +15037,144 @@ FtlRecoverySuperblock:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 .LFB291:
-	.loc 2 2156 0
+	.loc 2 2205 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1425:
-	push	{r4, r5, r6, r7, lr}
-	.cfi_def_cfa_offset 20
-	.cfi_offset 4, -20
-	.cfi_offset 5, -16
-	.cfi_offset 6, -12
-	.cfi_offset 7, -8
+.LVL1433:
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
 	.cfi_offset 14, -4
-	mov	r4, r0
-	.loc 2 2169 0
-	ldr	r6, .L1282
-	.loc 2 2156 0
-	sub	sp, sp, #28
+	.loc 2 2211 0
+	mov	r3, #-1
+	.loc 2 2205 0
+	sub	sp, sp, #24
 	.cfi_def_cfa_offset 48
-	.loc 2 2162 0
-	movs	r5, #7
-	.loc 2 2170 0
-	ldr	r7, .L1282+4
-.LVL1426:
-.L1272:
-	.loc 2 2162 0
-	subs	r5, r5, #1
-.LVL1427:
-	beq	.L1274
-.LVL1428:
-	.loc 2 2163 0
+	.loc 2 2213 0
+	ldr	r2, .L1287
+	.loc 2 2219 0
+	movs	r6, #0
+	.loc 2 2205 0
+	mov	r4, r0
+	.loc 2 2211 0
+	str	r3, [sp, #20]
+	.loc 2 2223 0
+	movs	r7, #7
+	.loc 2 2212 0
+	ldr	r3, .L1287+4
+	.loc 2 2213 0
+	ldr	r5, [r2]
+	.loc 2 2216 0
+	mvn	r2, #2
+	.loc 2 2229 0
+	ldr	r8, .L1287+16
+	.loc 2 2212 0
+	ldr	r3, [r3]
+	.loc 2 2213 0
+	str	r5, [sp, #16]
+.LVL1434:
+	.loc 2 2212 0
+	str	r3, [sp, #12]
+	.loc 2 2216 0
+	str	r2, [r5, #8]
+	.loc 2 2217 0
+	mvn	r2, #1
+	str	r2, [r5, #12]
+	.loc 2 2218 0
+	ldrh	r2, [r0]
+	.loc 2 2219 0
+	strh	r6, [r5]	@ movhi
+	.loc 2 2218 0
+	strh	r2, [r5, #2]	@ movhi
+	.loc 2 2220 0
+	movw	r2, #61589
+	str	r2, [r3]
+	.loc 2 2221 0
+	add	r2, r2, #304087040
+	add	r2, r2, #1269760
+	addw	r2, r2, #1507
+	str	r2, [r3, #4]
+.LVL1435:
+.L1277:
+	.loc 2 2223 0
+	subs	r7, r7, #1
+.LVL1436:
+	beq	.L1279
+.LVL1437:
+	.loc 2 2224 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1273
-.LVL1429:
-.L1274:
-	.loc 2 2183 0
-	ldr	r3, .L1282+8
+	cbnz	r3, .L1278
+.LVL1438:
+.L1279:
+	.loc 2 2234 0
+	ldr	r3, .L1287+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2184 0
-	ldr	r3, .L1282+12
+	.loc 2 2235 0
+	ldr	r3, .L1287+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 2185 0
+	.loc 2 2236 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
-	.loc 2 2186 0
+	.loc 2 2237 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 2188 0
-	add	sp, sp, #28
+	.loc 2 2238 0
+	add	sp, sp, #24
 	.cfi_remember_state
-	.cfi_def_cfa_offset 20
+	.cfi_def_cfa_offset 24
 	@ sp needed
-	pop	{r4, r5, r6, r7, pc}
-.LVL1430:
-.L1273:
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1439:
+.L1278:
 	.cfi_restore_state
-	.loc 2 2165 0
+	.loc 2 2226 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1431:
+.LVL1440:
 	str	r0, [sp, #8]
-	.loc 2 2166 0
+	.loc 2 2227 0
 	adds	r0, r0, #1
-	beq	.L1274
-	.loc 2 2170 0
-	ldr	r1, [r7]
-	.loc 2 2168 0
-	mov	r3, #-1
-	.loc 2 2169 0
-	ldr	r2, [r6]
-	.loc 2 2178 0
-	ldr	r0, .L1282+16
-	.loc 2 2168 0
-	str	r3, [sp, #20]
-	.loc 2 2170 0
-	str	r1, [sp, #16]
-.LVL1432:
-	.loc 2 2169 0
-	str	r2, [sp, #12]
-	.loc 2 2174 0
-	str	r3, [r1, #12]
-	.loc 2 2178 0
-	ldr	r2, [r0]
-	.loc 2 2173 0
-	str	r3, [r1, #8]
-	.loc 2 2175 0
-	ldrh	r3, [r4]
-	.loc 2 2178 0
-	str	r2, [r1, #4]
-	adds	r2, r2, #1
-	.loc 2 2175 0
-	strh	r3, [r1, #2]	@ movhi
-	.loc 2 2176 0
-	movs	r3, #0
-	strh	r3, [r1]	@ movhi
-	.loc 2 2178 0
-	adds	r1, r2, #1
-.LVL1433:
-	it	eq
-	moveq	r2, r3
-	.loc 2 2179 0
+	beq	.L1279
+	.loc 2 2229 0
+	ldr	r3, [r8]
+	.loc 2 2230 0
 	movs	r1, #1
-	.loc 2 2178 0
-	str	r2, [r0]
-	.loc 2 2179 0
-	mov	r2, r3
 	add	r0, sp, #4
+	.loc 2 2229 0
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, r6
+	str	r3, [r8]
+	.loc 2 2230 0
+	movs	r3, #0
+	mov	r2, r3
 	bl	FlashProgPages
-.LVL1434:
-	.loc 2 2180 0
+.LVL1441:
+	.loc 2 2231 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1435:
-	b	.L1272
-.L1283:
+.LVL1442:
+	b	.L1277
+.L1288:
 	.align	2
-.L1282:
-	.word	.LANCHOR39
-	.word	.LANCHOR109
-	.word	.LANCHOR43
+.L1287:
+	.word	.LANCHOR108
+	.word	.LANCHOR107
+	.word	.LANCHOR42
 	.word	.LANCHOR19
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.cfi_endproc
 .LFE291:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -15076,34 +15203,34 @@ FtlLoadBbt:
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
 	.loc 4 180 0
-	ldr	r8, .L1313+40
-	ldr	r4, .L1313
+	ldr	r8, .L1318+40
+	ldr	r4, .L1318
 	ldr	r3, [r8]
 	.loc 4 184 0
-	ldr	r7, .L1313+4
+	ldr	r7, .L1318+4
 	.loc 4 186 0
 	mov	r10, r4
 	.loc 4 180 0
 	str	r3, [r4, #8]
 	.loc 4 181 0
-	ldr	r3, .L1313+8
+	ldr	r3, .L1318+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
-.LVL1436:
+.LVL1443:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1437:
+.LVL1444:
 	.loc 4 184 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1438:
-.L1285:
+.LVL1445:
+.L1290:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L1288
+	bgt	.L1293
 	.loc 4 185 0 is_stmt 1
 	lsls	r3, r5, #10
 	.loc 4 186 0
@@ -15114,11 +15241,11 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1439:
+.LVL1446:
 	.loc 4 187 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1286
+	bne	.L1291
 	.loc 4 188 0
 	ldr	r3, [r4, #4]
 	.loc 4 189 0
@@ -15130,19 +15257,19 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1440:
-.L1286:
+.LVL1447:
+.L1291:
 	.loc 4 191 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1287
+	beq	.L1292
 	.loc 4 196 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1287
+	bne	.L1292
 	.loc 4 198 0
-	ldr	r3, .L1313+12
+	ldr	r3, .L1318+12
 	.loc 4 199 0
 	ldr	r2, [r6, #4]
 	.loc 4 198 0
@@ -15152,43 +15279,43 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L1288:
+.L1293:
 	.loc 4 216 0
-	ldr	r5, .L1313+12
-.LVL1441:
+	ldr	r5, .L1318+12
+.LVL1448:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L1302
+	beq	.L1307
 	.loc 4 222 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L1292
+	beq	.L1297
 	.loc 4 224 0
 	lsls	r3, r3, #10
 	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1313
+	ldr	r0, .L1318
 	.loc 4 224 0
 	str	r3, [r4, #4]
 	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1442:
+.LVL1449:
 	.loc 4 226 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1292
+	beq	.L1297
 	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1292
+	bne	.L1297
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1292
+	bls	.L1297
 	.loc 4 231 0 is_stmt 1
 	ldrh	r2, [r5, #4]
 	.loc 4 232 0
@@ -15199,30 +15326,30 @@ FtlLoadBbt:
 	strh	r2, [r5]	@ movhi
 	.loc 4 233 0
 	strh	r3, [r5, #4]	@ movhi
-.L1292:
+.L1297:
 	.loc 4 245 0
-	ldr	r10, .L1313
+	ldr	r10, .L1318
 	.loc 4 238 0
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
-.LVL1443:
+.LVL1450:
 	sxth	r7, r0
-.LVL1444:
+.LVL1451:
 	.loc 4 239 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L1294:
+.L1299:
 	.loc 4 241 0
 	cmp	r7, #0
-	bge	.L1297
+	bge	.L1302
 	.loc 4 254 0
 	movs	r2, #254
-	ldr	r1, .L1313+16
-	ldr	r0, .L1313+20
+	ldr	r1, .L1318+16
+	ldr	r0, .L1318+20
 	bl	printf
-.LVL1445:
-.L1296:
+.LVL1452:
+.L1301:
 	.loc 4 255 0
 	ldrh	r3, [r6, #10]
 	.loc 4 257 0
@@ -15232,53 +15359,53 @@ FtlLoadBbt:
 	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1299
+	beq	.L1304
 	.loc 4 259 0
-	ldr	r3, .L1313+24
+	ldr	r3, .L1318+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L1299
+	beq	.L1304
 	.loc 4 259 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1313+28
+	ldr	r3, .L1318+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1299
+	bcs	.L1304
 	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
-	bcs	.L1299
+	bcs	.L1304
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1446:
-.L1299:
-	ldr	r6, .L1313+32
-.LVL1447:
+.LVL1453:
+.L1304:
+	ldr	r6, .L1318+32
+.LVL1454:
 	.loc 4 173 0 discriminator 1
 	movs	r5, #0
 	.loc 4 268 0 discriminator 1
-	ldr	r7, .L1313+36
-.LVL1448:
+	ldr	r7, .L1318+36
+.LVL1455:
 	.loc 4 269 0 discriminator 1
-	ldr	r8, .L1313+44
-.L1300:
-.LVL1449:
+	ldr	r8, .L1318+44
+.L1305:
+.LVL1456:
 	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1301
+	bcc	.L1306
 	.loc 4 275 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1450:
-.L1287:
+.LVL1457:
+.L1292:
 	.loc 4 184 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1451:
+.LVL1458:
 	uxth	r5, r5
-.LVL1452:
-	b	.L1285
-.LVL1453:
-.L1297:
+.LVL1459:
+	b	.L1290
+.LVL1460:
+.L1302:
 	.loc 4 243 0
 	ldrh	r3, [r5]
 	.loc 4 245 0
@@ -15293,24 +15420,24 @@ FtlLoadBbt:
 	str	r3, [r4, #8]
 	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1454:
+.LVL1461:
 	.loc 4 247 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1295
+	beq	.L1300
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1296
-.L1295:
+	beq	.L1301
+.L1300:
 	subs	r7, r7, #1
-.LVL1455:
+.LVL1462:
 	sxth	r7, r7
-.LVL1456:
-	b	.L1294
-.LVL1457:
-.L1301:
+.LVL1463:
+	b	.L1299
+.LVL1464:
+.L1306:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
@@ -15319,31 +15446,31 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	.loc 4 268 0 discriminator 3
 	adds	r5, r5, #1
-.LVL1458:
+.LVL1465:
 	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1459:
-	b	.L1300
-.LVL1460:
-.L1302:
+.LVL1466:
+	b	.L1305
+.LVL1467:
+.L1307:
 	.loc 4 218 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1461:
-.L1314:
+.LVL1468:
+.L1319:
 	.align	2
-.L1313:
-	.word	.LANCHOR108
+.L1318:
+	.word	.LANCHOR106
 	.word	.LANCHOR17
-	.word	.LANCHOR109
+	.word	.LANCHOR108
 	.word	.LANCHOR37
-	.word	.LANCHOR165
+	.word	.LANCHOR164
 	.word	.LC1
 	.word	.LANCHOR2
 	.word	.LANCHOR6
 	.word	.LANCHOR37+24
 	.word	.LANCHOR10
-	.word	.LANCHOR39
+	.word	.LANCHOR107
 	.word	.LANCHOR137
 	.cfi_endproc
 .LFE232:
@@ -15374,79 +15501,79 @@ FtlMakeBbt:
 	.cfi_offset 14, -4
 	.loc 4 327 0
 	movs	r6, #0
-	ldr	r7, .L1334
+	ldr	r7, .L1339
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1462:
+.LVL1469:
 	sub	r8, r7, #18
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1463:
-.L1316:
+.LVL1470:
+.L1321:
 	.loc 4 327 0 discriminator 1
-	ldr	r3, .L1334+4
+	ldr	r3, .L1339+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1322
+	bcc	.L1327
 	.loc 4 381 0 discriminator 1
-	ldr	r5, .L1334+8
+	ldr	r5, .L1339+8
 	movs	r4, #0
-.L1323:
+.L1328:
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1464:
+.LVL1471:
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1324
+	bhi	.L1329
 	.loc 4 387 0
-	ldr	r4, .L1334+12
+	ldr	r4, .L1339+12
 	.loc 4 396 0
 	movw	r6, #65535
-.LVL1465:
+.LVL1472:
 	.loc 4 387 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1466:
-.L1325:
+.LVL1473:
+.L1330:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1329
+	bgt	.L1334
 	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1467:
+.LVL1474:
 	cmp	r0, #1
-	beq	.L1326
+	beq	.L1331
 	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1468:
+.LVL1475:
 	cmp	r0, #0
-	beq	.L1327
+	beq	.L1332
 	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1469:
-.L1326:
+.LVL1476:
+.L1331:
 	.loc 4 387 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1470:
+.LVL1477:
 	uxth	r5, r5
-.LVL1471:
-	b	.L1325
-.LVL1472:
-.L1322:
+.LVL1478:
+	b	.L1330
+.LVL1479:
+.L1327:
 	.loc 4 328 0
-	ldr	r3, .L1334+16
+	ldr	r3, .L1339+16
 	.loc 4 329 0
-	ldr	r5, .L1334+20
+	ldr	r5, .L1339+20
 	.loc 4 331 0
 	ldrh	r2, [r8, #2]!
 	.loc 4 328 0
-	ldr	r4, .L1334+24
+	ldr	r4, .L1339+24
 	ldr	r0, [r3]
 	.loc 4 331 0
 	movw	r3, #65535
@@ -15455,14 +15582,14 @@ FtlMakeBbt:
 	.loc 4 331 0
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1334+28
+	ldr	r3, .L1339+28
 	.loc 4 328 0
 	str	r0, [r4, #8]
 	.loc 4 329 0
 	str	r10, [r4, #12]
-.LVL1473:
+.LVL1480:
 	.loc 4 331 0
-	beq	.L1317
+	beq	.L1322
 	.loc 4 333 0
 	ldrh	r5, [r3]
 	.loc 4 335 0
@@ -15470,7 +15597,7 @@ FtlMakeBbt:
 	.loc 4 333 0
 	str	r3, [sp]
 	mla	r5, r6, r5, r2
-.LVL1474:
+.LVL1481:
 	.loc 4 334 0
 	lsls	r2, r5, #10
 	str	r2, [r4, #4]
@@ -15478,7 +15605,7 @@ FtlMakeBbt:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1475:
+.LVL1482:
 	.loc 4 336 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
@@ -15487,30 +15614,30 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1476:
-.L1318:
+.LVL1483:
+.L1323:
 	.loc 4 376 0 discriminator 2
 	uxth	r0, r5
 	.loc 4 327 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1477:
+.LVL1484:
 	adds	r7, r7, #4
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1478:
-	b	.L1316
-.LVL1479:
-.L1317:
+.LVL1485:
+	b	.L1321
+.LVL1486:
+.L1322:
 	.loc 4 340 0
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
-.LVL1480:
+.LVL1487:
 	.loc 4 341 0
 	ldr	r0, [r4, #8]
 	ldr	r1, [r7]
 	bl	FtlBbt2Bitmap
-.LVL1481:
+.LVL1488:
 	.loc 4 343 0
 	ldr	r3, [sp]
 	.loc 4 350 0
@@ -15519,17 +15646,17 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL1482:
-.L1319:
+.LVL1489:
+.L1324:
 	.loc 4 345 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1483:
+.LVL1490:
 	cmp	r0, #1
-	beq	.L1320
+	beq	.L1325
 	.loc 4 350 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
@@ -15539,14 +15666,14 @@ FtlMakeBbt:
 	.loc 4 350 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1484:
+.LVL1491:
 	.loc 4 351 0
-	ldr	r3, .L1334+16
+	ldr	r3, .L1339+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1485:
+.LVL1492:
 	.loc 4 355 0
 	ldr	r2, [sp]
 	.loc 4 352 0
@@ -15566,71 +15693,71 @@ FtlMakeBbt:
 	strh	r3, [r10, #2]	@ movhi
 	.loc 4 355 0
 	mla	r5, r6, r5, r3
-.LVL1486:
+.LVL1493:
 	.loc 4 356 0
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
 	.loc 4 357 0
-	ldr	r3, .L1334+32
+	ldr	r3, .L1339+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1487:
+.LVL1494:
 	.loc 4 358 0
 	movs	r2, #1
-	ldr	r0, .L1334+24
+	ldr	r0, .L1339+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1488:
+.LVL1495:
 	.loc 4 359 0
 	movs	r3, #1
-	ldr	r0, .L1334+24
+	ldr	r0, .L1339+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1489:
+.LVL1496:
 	.loc 4 360 0
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1318
+	bne	.L1323
 	.loc 4 362 0
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1490:
+.LVL1497:
 	.loc 4 363 0
-	b	.L1319
-.LVL1491:
-.L1320:
+	b	.L1324
+.LVL1498:
+.L1325:
 	.loc 4 347 0
 	subs	r4, r4, #1
-.LVL1492:
+.LVL1499:
 	uxth	r4, r4
-.LVL1493:
-	b	.L1319
-.LVL1494:
-.L1324:
+.LVL1500:
+	b	.L1324
+.LVL1501:
+.L1329:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1495:
-	b	.L1323
-.LVL1496:
-.L1327:
+.LVL1502:
+	b	.L1328
+.LVL1503:
+.L1332:
 	.loc 4 396 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1328
+	bne	.L1333
 	.loc 4 398 0
 	strh	r5, [r4]	@ movhi
-	b	.L1326
-.L1328:
+	b	.L1331
+.L1333:
 	.loc 4 402 0
 	strh	r5, [r4, #4]	@ movhi
-.L1329:
+.L1334:
 	.loc 4 414 0
-	ldr	r3, .L1334+36
+	ldr	r3, .L1339+36
 	.loc 4 411 0
 	movs	r5, #0
-.LVL1497:
+.LVL1504:
 	.loc 4 413 0
 	str	r5, [r4, #8]
 	.loc 4 416 0
@@ -15649,18 +15776,18 @@ FtlMakeBbt:
 	str	r3, [r0, #24]
 	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1498:
+.LVL1505:
 	.loc 4 418 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
-.LVL1499:
+.LVL1506:
 	.loc 4 419 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
-.LVL1500:
+.LVL1507:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1501:
+.LVL1508:
 	.loc 4 422 0
 	ldr	r3, [r4, #8]
 	.loc 4 425 0
@@ -15672,33 +15799,33 @@ FtlMakeBbt:
 	str	r3, [r4, #8]
 	.loc 4 424 0
 	ldrh	r3, [r4]
-.LVL1502:
+.LVL1509:
 	.loc 4 425 0
 	strh	r2, [r4]	@ movhi
 	.loc 4 427 0
 	strh	r3, [r4, #4]	@ movhi
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1503:
+.LVL1510:
 	.loc 4 432 0
 	mov	r0, r5
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1335:
+.L1340:
 	.align	2
-.L1334:
+.L1339:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
 	.word	.LANCHOR37
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LANCHOR107
 	.word	.LANCHOR108
+	.word	.LANCHOR106
 	.word	.LANCHOR17
 	.word	.LANCHOR137
-	.word	.LANCHOR112
+	.word	.LANCHOR111
 	.cfi_endproc
 .LFE234:
 	.size	FtlMakeBbt, .-FtlMakeBbt
@@ -15712,14 +15839,14 @@ FtlMakeBbt:
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
 .LFB266:
-	.loc 2 786 0
+	.loc 2 835 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1504:
-	.loc 2 794 0
-	ldr	r3, .L1348
-	.loc 2 786 0
+.LVL1511:
+	.loc 2 843 0
+	ldr	r3, .L1353
+	.loc 2 835 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -15732,161 +15859,161 @@ FtlVendorPartWrite:
 	.cfi_offset 14, -4
 	sub	sp, sp, #104
 	.cfi_def_cfa_offset 136
-	.loc 2 786 0
+	.loc 2 835 0
 	str	r2, [sp]
-	.loc 2 794 0
+	.loc 2 843 0
 	adds	r2, r0, r1
-.LVL1505:
-	.loc 2 786 0
+.LVL1512:
+	.loc 2 835 0
 	mov	r7, r0
 	mov	r5, r1
-	.loc 2 794 0
+	.loc 2 843 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1344
-	.loc 2 791 0
-	ldr	r3, .L1348+4
+	bhi	.L1349
+	.loc 2 840 0
+	ldr	r3, .L1353+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.LVL1506:
-.L1338:
-	.loc 2 797 0
-	cbnz	r5, .L1343
-.LVL1507:
-.L1336:
-	.loc 2 820 0
+.LVL1513:
+.L1343:
+	.loc 2 846 0
+	cbnz	r5, .L1348
+.LVL1514:
+.L1341:
+	.loc 2 869 0
 	mov	r0, r8
 	add	sp, sp, #104
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL1508:
+.LVL1515:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1509:
-.L1343:
+.LVL1516:
+.L1348:
 	.cfi_restore_state
-	.loc 2 798 0
-	ldr	r3, .L1348+8
-	.loc 2 799 0
+	.loc 2 847 0
+	ldr	r3, .L1353+8
+	.loc 2 848 0
 	mov	r0, r7
-	ldr	r10, .L1348+24
-	.loc 2 798 0
+	ldr	r10, .L1353+24
+	.loc 2 847 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	.loc 2 799 0
-	ldr	r3, .L1348+12
-	.loc 2 798 0
+	.loc 2 848 0
+	ldr	r3, .L1353+12
+	.loc 2 847 0
 	str	r2, [sp, #12]
-.LVL1510:
-	.loc 2 799 0
+.LVL1517:
+	.loc 2 848 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1511:
-	.loc 2 800 0
+.LVL1518:
+	.loc 2 849 0
 	ldr	r3, [sp, #8]
-	.loc 2 801 0
+	.loc 2 850 0
 	ldr	r2, [sp, #12]
-	.loc 2 799 0
+	.loc 2 848 0
 	str	r1, [sp, #4]
-.LVL1512:
-	.loc 2 800 0
+.LVL1519:
+	.loc 2 849 0
 	subs	r4, r3, r1
 	uxth	r4, r4
-.LVL1513:
-	.loc 2 801 0
+.LVL1520:
+	.loc 2 850 0
 	cmp	r5, r4
-	.loc 2 802 0
+	.loc 2 851 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1514:
-	.loc 2 803 0
-	cbz	r2, .L1340
-	.loc 2 803 0 is_stmt 0 discriminator 1
+.LVL1521:
+	.loc 2 852 0
+	cbz	r2, .L1345
+	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
-	beq	.L1340
-	.loc 2 805 0 is_stmt 1
+	beq	.L1345
+	.loc 2 854 0 is_stmt 1
 	ldr	r3, [r10]
-	.loc 2 807 0
+	.loc 2 856 0
 	add	r0, sp, #20
-	.loc 2 804 0
+	.loc 2 853 0
 	str	r2, [sp, #24]
-	.loc 2 807 0
+	.loc 2 856 0
 	movs	r2, #1
 	mov	r1, r2
-	.loc 2 805 0
+	.loc 2 854 0
 	str	r3, [sp, #28]
-	.loc 2 806 0
+	.loc 2 855 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 807 0
+	.loc 2 856 0
 	bl	FlashReadPages
-.LVL1515:
-.L1341:
-	.loc 2 811 0
+.LVL1522:
+.L1346:
+	.loc 2 860 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
-	.loc 2 815 0
+	.loc 2 864 0
 	subs	r5, r5, r4
-.LVL1516:
-	.loc 2 811 0
+.LVL1523:
+	.loc 2 860 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
-	.loc 2 816 0
+	.loc 2 865 0
 	add	r7, r7, r4
-.LVL1517:
+.LVL1524:
 	add	fp, fp, #4
-	.loc 2 811 0
+	.loc 2 860 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1518:
-	.loc 2 812 0
+.LVL1525:
+	.loc 2 861 0
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1348+16
-	.loc 2 814 0
+	ldr	r0, .L1353+16
+	.loc 2 863 0
 	adds	r6, r6, #1
-.LVL1519:
-	.loc 2 812 0
+.LVL1526:
+	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1520:
-	.loc 2 817 0
+.LVL1527:
+	.loc 2 866 0
 	ldr	r3, [sp]
-	.loc 2 813 0
+	.loc 2 862 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
-.LVL1521:
-	.loc 2 817 0
+.LVL1528:
+	.loc 2 866 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-.LVL1522:
-	b	.L1338
-.LVL1523:
-.L1340:
-	.loc 2 809 0
-	ldr	r3, .L1348+20
+.LVL1529:
+	b	.L1343
+.LVL1530:
+.L1345:
+	.loc 2 858 0
+	ldr	r3, .L1353+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
-.LVL1524:
+.LVL1531:
 	bl	ftl_memset
-.LVL1525:
-	b	.L1341
-.LVL1526:
-.L1344:
-	.loc 2 795 0
-	mov	r8, #-1
-	b	.L1336
+.LVL1532:
+	b	.L1346
+.LVL1533:
 .L1349:
+	.loc 2 844 0
+	mov	r8, #-1
+	b	.L1341
+.L1354:
 	.align	2
-.L1348:
+.L1353:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -15907,99 +16034,99 @@ FtlVendorPartWrite:
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
 .LFB289:
-	.loc 2 2110 0
+	.loc 2 2159 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 2 2111 0
-	ldr	r2, .L1352
-	ldr	r3, .L1352+4
+	.loc 2 2160 0
+	ldr	r2, .L1357
+	ldr	r3, .L1357+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1350
-.LBB278:
-.LBB279:
-	.loc 2 2112 0
-	ldr	r3, .L1352+8
-	.loc 2 2125 0
+	bne	.L1355
+.LBB311:
+.LBB312:
+	.loc 2 2161 0
+	ldr	r3, .L1357+8
+	.loc 2 2174 0
 	movs	r1, #1
 	movs	r0, #0
-	.loc 2 2112 0
+	.loc 2 2161 0
 	str	r3, [r2, #4]
-	.loc 2 2113 0
-	ldr	r3, .L1352+12
+	.loc 2 2162 0
+	ldr	r3, .L1357+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	.loc 2 2114 0
-	ldr	r3, .L1352+16
+	.loc 2 2163 0
+	ldr	r3, .L1357+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	.loc 2 2115 0
-	ldr	r3, .L1352+20
+	.loc 2 2164 0
+	ldr	r3, .L1357+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	.loc 2 2116 0
-	ldr	r3, .L1352+24
+	.loc 2 2165 0
+	ldr	r3, .L1357+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	.loc 2 2117 0
-	ldr	r3, .L1352+28
+	.loc 2 2166 0
+	ldr	r3, .L1357+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	.loc 2 2118 0
-	ldr	r3, .L1352+32
+	.loc 2 2167 0
+	ldr	r3, .L1357+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	.loc 2 2119 0
-	ldr	r3, .L1352+36
+	.loc 2 2168 0
+	ldr	r3, .L1357+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	.loc 2 2120 0
-	ldr	r3, .L1352+40
+	.loc 2 2169 0
+	ldr	r3, .L1357+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	.loc 2 2121 0
-	ldr	r3, .L1352+44
+	.loc 2 2170 0
+	ldr	r3, .L1357+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	.loc 2 2122 0
-	ldr	r3, .L1352+48
+	.loc 2 2171 0
+	ldr	r3, .L1357+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	.loc 2 2123 0
-	ldr	r3, .L1352+52
+	.loc 2 2172 0
+	ldr	r3, .L1357+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	.loc 2 2124 0
-	ldr	r3, .L1352+56
+	.loc 2 2173 0
+	ldr	r3, .L1357+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	.loc 2 2125 0
+	.loc 2 2174 0
 	b	FtlVendorPartWrite
-.LVL1527:
-.L1350:
+.LVL1534:
+.L1355:
 	bx	lr
-.L1353:
+.L1358:
 	.align	2
-.L1352:
-	.word	.LANCHOR83
+.L1357:
+	.word	.LANCHOR81
 	.word	1179929683
-	.word	1342177344
-	.word	.LANCHOR69
-	.word	.LANCHOR70
+	.word	1342177348
 	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR63
+	.word	.LANCHOR69
 	.word	.LANCHOR67
-	.word	.LANCHOR74
-	.word	.LANCHOR76
 	.word	.LANCHOR64
+	.word	.LANCHOR62
 	.word	.LANCHOR66
+	.word	.LANCHOR73
+	.word	.LANCHOR75
+	.word	.LANCHOR63
+	.word	.LANCHOR65
+	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR78
-.LBE279:
-.LBE278:
+.LBE312:
+.LBE311:
 	.cfi_endproc
 .LFE289:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -16013,81 +16140,81 @@ Ftl_save_ext_data:
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
 .LFB268:
-	.loc 2 861 0
+	.loc 2 910 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1528:
-	.loc 2 864 0
-	ldr	r2, .L1359
-	.loc 2 861 0
+.LVL1535:
+	.loc 2 913 0
+	ldr	r2, .L1364
+	.loc 2 910 0
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
-	.loc 2 864 0
+	.loc 2 913 0
 	ldrh	r3, [r2]
 	cmp	r3, #31
-	.loc 2 865 0
+	.loc 2 914 0
 	itett	ls
 	addls	r3, r3, #1
-	.loc 2 862 0
+	.loc 2 911 0
 	movhi	r3, #32
-	.loc 2 865 0
+	.loc 2 914 0
 	strhls	r3, [r2]	@ movhi
-.LVL1529:
-	.loc 2 866 0
+.LVL1536:
+	.loc 2 915 0
 	movls	r3, #1
-.LVL1530:
-	ldr	r2, .L1359+4
-	.loc 2 868 0
-	cbnz	r0, .L1356
-	.loc 2 868 0 is_stmt 0 discriminator 1
+.LVL1537:
+	ldr	r2, .L1364+4
+	.loc 2 917 0
+	cbnz	r0, .L1361
+	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
-.LVL1531:
+.LVL1538:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
-.LVL1532:
+.LVL1539:
 	cmp	r1, r3
-	bcc	.L1357
-.L1356:
-	.loc 2 870 0 is_stmt 1
+	bcc	.L1362
+.L1361:
+	.loc 2 919 0 is_stmt 1
 	ldr	r2, [r2]
-	.loc 2 875 0
+	.loc 2 924 0
 	movs	r0, #64
-	.loc 2 870 0
+	.loc 2 919 0
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	.loc 2 871 0
-	ldr	r3, .L1359+8
+	.loc 2 920 0
+	ldr	r3, .L1364+8
 	str	r3, [r2]
-	.loc 2 872 0
-	ldr	r3, .L1359+12
+	.loc 2 921 0
+	ldr	r3, .L1364+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
-	.loc 2 873 0
+	.loc 2 922 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
-	.loc 2 874 0
+	.loc 2 923 0
 	movs	r3, #0
 	str	r3, [r2, #4]
-	.loc 2 875 0
+	.loc 2 924 0
 	bl	FtlVendorPartWrite
-.LVL1533:
-	.loc 2 876 0
+.LVL1540:
+	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1534:
-.L1357:
-	.loc 2 878 0
+.LVL1541:
+.L1362:
+	.loc 2 927 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1360:
+.L1365:
 	.align	2
-.L1359:
-	.word	.LANCHOR166
+.L1364:
+	.word	.LANCHOR165
 	.word	.LANCHOR127
 	.word	1112818501
 	.word	.LANCHOR125
@@ -16104,14 +16231,14 @@ FtlEctTblFlush:
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 .LFB267:
-	.loc 2 823 0
+	.loc 2 872 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1535:
-	.loc 2 832 0
-	ldr	r3, .L1370
-	.loc 2 823 0
+.LVL1542:
+	.loc 2 881 0
+	ldr	r3, .L1375
+	.loc 2 872 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -16123,147 +16250,147 @@ FtlVendorPartRead:
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
 	mov	r8, r2
-	.loc 2 832 0
+	.loc 2 881 0
 	adds	r2, r0, r1
-.LVL1536:
-	.loc 2 823 0
+.LVL1543:
+	.loc 2 872 0
 	sub	sp, sp, #104
 	.cfi_def_cfa_offset 136
-	.loc 2 823 0
+	.loc 2 872 0
 	mov	r6, r0
 	mov	r5, r1
-	.loc 2 832 0
+	.loc 2 881 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1369
-	.loc 2 828 0
-	ldr	r3, .L1370+4
+	bhi	.L1374
+	.loc 2 877 0
+	ldr	r3, .L1375+4
 	movs	r7, #0
-	.loc 2 842 0
-	ldr	fp, .L1370+16
-	.loc 2 828 0
+	.loc 2 891 0
+	ldr	fp, .L1375+16
+	.loc 2 877 0
 	ldrh	r3, [r3]
 	lsr	r3, r0, r3
 	lsls	r3, r3, #2
 	str	r3, [sp, #4]
-.LVL1537:
-.L1363:
-	.loc 2 834 0
-	cbnz	r5, .L1368
-.LVL1538:
-.L1361:
-	.loc 2 857 0
+.LVL1544:
+.L1368:
+	.loc 2 883 0
+	cbnz	r5, .L1373
+.LVL1545:
+.L1366:
+	.loc 2 906 0
 	mov	r0, r7
 	add	sp, sp, #104
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1539:
-.L1368:
+.LVL1546:
+.L1373:
 	.cfi_restore_state
-	.loc 2 835 0
-	ldr	r3, .L1370+8
-	.loc 2 836 0
+	.loc 2 884 0
+	ldr	r3, .L1375+8
+	.loc 2 885 0
 	mov	r0, r6
-	.loc 2 835 0
+	.loc 2 884 0
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	.loc 2 836 0
-	ldr	r2, .L1370+12
-	.loc 2 835 0
+	.loc 2 885 0
+	ldr	r2, .L1375+12
+	.loc 2 884 0
 	str	r3, [sp, #12]
-.LVL1540:
-	.loc 2 836 0
+.LVL1547:
+	.loc 2 885 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1541:
-	.loc 2 837 0
+.LVL1548:
+	.loc 2 886 0
 	subs	r4, r4, r1
-	.loc 2 838 0
+	.loc 2 887 0
 	ldr	r3, [sp, #12]
-	.loc 2 837 0
+	.loc 2 886 0
 	uxth	r4, r4
-	.loc 2 836 0
+	.loc 2 885 0
 	str	r1, [sp, #8]
-.LVL1542:
-	.loc 2 838 0
+.LVL1549:
+	.loc 2 887 0
 	cmp	r5, r4
-	.loc 2 839 0
+	.loc 2 888 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1543:
+.LVL1550:
 	lsl	r10, r4, #9
-	.loc 2 840 0
-	cbz	r3, .L1365
-	.loc 2 841 0
+	.loc 2 889 0
+	cbz	r3, .L1370
+	.loc 2 890 0
 	str	r3, [sp, #24]
-	.loc 2 844 0
+	.loc 2 893 0
 	movs	r2, #1
-	.loc 2 842 0
+	.loc 2 891 0
 	ldr	r3, [fp]
-	.loc 2 844 0
+	.loc 2 893 0
 	mov	r1, r2
 	add	r0, sp, #20
-	.loc 2 842 0
+	.loc 2 891 0
 	str	r3, [sp, #28]
-	.loc 2 843 0
+	.loc 2 892 0
 	add	r3, sp, #40
 	str	r3, [sp, #32]
-	.loc 2 844 0
+	.loc 2 893 0
 	bl	FlashReadPages
-.LVL1544:
-	.loc 2 845 0
+.LVL1551:
+	.loc 2 894 0
 	ldr	r3, [sp, #20]
-	.loc 2 847 0
+	.loc 2 896 0
 	mov	r2, r10
 	ldr	r1, [fp]
 	mov	r0, r8
-	.loc 2 846 0
+	.loc 2 895 0
 	adds	r3, r3, #1
-	.loc 2 847 0
+	.loc 2 896 0
 	ldr	r3, [sp, #8]
-	.loc 2 846 0
+	.loc 2 895 0
 	it	eq
 	moveq	r7, #-1
-.LVL1545:
-	.loc 2 847 0
+.LVL1552:
+	.loc 2 896 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1546:
-.L1367:
+.LVL1553:
+.L1372:
 	ldr	r3, [sp, #4]
-	.loc 2 852 0
+	.loc 2 901 0
 	subs	r5, r5, r4
-.LVL1547:
-	.loc 2 853 0
+.LVL1554:
+	.loc 2 902 0
 	add	r6, r6, r4
-.LVL1548:
-	.loc 2 854 0
+.LVL1555:
+	.loc 2 903 0
 	add	r8, r8, r10
-.LVL1549:
+.LVL1556:
 	adds	r3, r3, #4
 	str	r3, [sp, #4]
-	b	.L1363
-.LVL1550:
-.L1365:
-	.loc 2 849 0
+	b	.L1368
+.LVL1557:
+.L1370:
+	.loc 2 898 0
 	mov	r2, r10
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_memset
-.LVL1551:
-	b	.L1367
-.LVL1552:
-.L1369:
-	.loc 2 833 0
+.LVL1558:
+	b	.L1372
+.LVL1559:
+.L1374:
+	.loc 2 882 0
 	mov	r7, #-1
-	b	.L1361
-.L1371:
+	b	.L1366
+.L1376:
 	.align	2
-.L1370:
+.L1375:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -16282,7 +16409,7 @@ FtlVendorPartRead:
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
 .LFB274:
-	.loc 2 1334 0
+	.loc 2 1383 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -16292,47 +16419,47 @@ FtlLoadEctTbl:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 1335 0
+	.loc 2 1384 0
 	movs	r0, #64
-	ldr	r4, .L1374
-	ldr	r5, .L1374+4
+	ldr	r4, .L1379
+	ldr	r5, .L1379+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
-.LVL1553:
-	.loc 2 1336 0
+.LVL1560:
+	.loc 2 1385 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1374+8
+	ldr	r3, .L1379+8
 	cmp	r2, r3
-	beq	.L1373
-.LBB282:
-.LBB283:
-	.loc 2 1338 0
-	ldr	r1, .L1374+12
-	ldr	r0, .L1374+16
+	beq	.L1378
+.LBB315:
+.LBB316:
+	.loc 2 1387 0
+	ldr	r1, .L1379+12
+	ldr	r0, .L1379+16
 	bl	printf
-.LVL1554:
-	.loc 2 1339 0
+.LVL1561:
+	.loc 2 1388 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1555:
-.L1373:
-.LBE283:
-.LBE282:
-	.loc 2 1344 0
+.LVL1562:
+.L1378:
+.LBE316:
+.LBE315:
+	.loc 2 1393 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1375:
+.L1380:
 	.align	2
-.L1374:
+.L1379:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
-	.word	.LC100
+	.word	.LC103
 	.word	.LC71
 	.cfi_endproc
 .LFE274:
@@ -16347,7 +16474,7 @@ FtlLoadEctTbl:
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
 .LFB290:
-	.loc 2 2130 0
+	.loc 2 2179 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -16357,119 +16484,119 @@ Ftl_load_ext_data:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2131 0
+	.loc 2 2180 0
 	movs	r1, #1
-	ldr	r4, .L1379
+	ldr	r4, .L1384
 	movs	r0, #0
-	.loc 2 2132 0
-	ldr	r5, .L1379+4
-	.loc 2 2131 0
+	.loc 2 2181 0
+	ldr	r5, .L1384+4
+	.loc 2 2180 0
 	mov	r2, r4
 	bl	FtlVendorPartRead
-.LVL1556:
-	.loc 2 2132 0
+.LVL1563:
+	.loc 2 2181 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1377
-	.loc 2 2133 0
+	beq	.L1382
+	.loc 2 2182 0
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
-.LVL1557:
-	.loc 2 2134 0
+.LVL1564:
+	.loc 2 2183 0
 	str	r5, [r4]
-.L1377:
-	.loc 2 2137 0
+.L1382:
+	.loc 2 2186 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1379+8
-	bne	.L1378
-	.loc 2 2138 0
+	ldr	r3, .L1384+8
+	bne	.L1383
+	.loc 2 2187 0
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1379+12
+	ldr	r2, .L1384+12
 	str	r1, [r2]
-	.loc 2 2139 0
+	.loc 2 2188 0
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1379+16
+	ldr	r2, .L1384+16
 	str	r1, [r2]
-	.loc 2 2140 0
+	.loc 2 2189 0
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1379+20
+	ldr	r2, .L1384+20
 	str	r1, [r2]
-	.loc 2 2141 0
+	.loc 2 2190 0
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1379+24
+	ldr	r2, .L1384+24
 	str	r1, [r2]
-	.loc 2 2142 0
+	.loc 2 2191 0
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1379+28
+	ldr	r2, .L1384+28
 	str	r1, [r2]
-	.loc 2 2143 0
+	.loc 2 2192 0
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1379+32
+	ldr	r2, .L1384+32
 	str	r1, [r2]
-	.loc 2 2144 0
+	.loc 2 2193 0
 	ldr	r2, [r4, #28]
-	.loc 2 2145 0
+	.loc 2 2194 0
 	ldr	r1, [r4, #32]
-	.loc 2 2144 0
+	.loc 2 2193 0
 	str	r2, [r3]
-	.loc 2 2145 0
-	ldr	r2, .L1379+36
+	.loc 2 2194 0
+	ldr	r2, .L1384+36
 	str	r1, [r2]
-	.loc 2 2146 0
+	.loc 2 2195 0
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1379+40
+	ldr	r2, .L1384+40
 	str	r1, [r2]
-	.loc 2 2147 0
+	.loc 2 2196 0
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1379+44
+	ldr	r2, .L1384+44
 	str	r1, [r2]
-	.loc 2 2148 0
+	.loc 2 2197 0
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1379+48
+	ldr	r2, .L1384+48
 	str	r1, [r2]
-	.loc 2 2149 0
+	.loc 2 2198 0
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1379+52
+	ldr	r2, .L1384+52
 	str	r1, [r2]
-.L1378:
-	.loc 2 2152 0
-	ldr	r1, .L1379+56
-	ldr	r2, .L1379+60
+.L1383:
+	.loc 2 2201 0
+	ldr	r1, .L1384+56
+	ldr	r2, .L1384+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1379+64
+	ldr	r1, .L1384+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-.LVL1558:
-	ldr	r3, .L1379+68
+.LVL1565:
+	ldr	r3, .L1384+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1380:
+.L1385:
 	.align	2
-.L1379:
-	.word	.LANCHOR83
+.L1384:
+	.word	.LANCHOR81
 	.word	1179929683
-	.word	.LANCHOR74
-	.word	.LANCHOR69
-	.word	.LANCHOR70
+	.word	.LANCHOR73
 	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR63
+	.word	.LANCHOR69
 	.word	.LANCHOR67
-	.word	.LANCHOR76
 	.word	.LANCHOR64
+	.word	.LANCHOR62
 	.word	.LANCHOR66
+	.word	.LANCHOR75
+	.word	.LANCHOR63
+	.word	.LANCHOR65
+	.word	.LANCHOR76
 	.word	.LANCHOR77
-	.word	.LANCHOR78
-	.word	.LANCHOR73
+	.word	.LANCHOR72
 	.word	.LANCHOR14
 	.word	.LANCHOR5
-	.word	.LANCHOR75
+	.word	.LANCHOR74
 	.cfi_endproc
 .LFE290:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
@@ -16483,11 +16610,11 @@ Ftl_load_ext_data:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 .LFB272:
-	.loc 2 1004 0
+	.loc 2 1053 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1559:
+.LVL1566:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -16498,149 +16625,149 @@ FtlVpcTblFlush:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 1016 0
+	.loc 2 1065 0
 	movs	r6, #0
-	.loc 2 1013 0
-	ldr	r3, .L1393
-	.loc 2 1005 0
+	.loc 2 1062 0
+	ldr	r3, .L1398
+	.loc 2 1054 0
 	movw	fp, #65535
-	.loc 2 1010 0
-	ldr	r8, .L1393+80
-	.loc 2 1011 0
-	ldr	r10, .L1393+84
-	.loc 2 1013 0
+	.loc 2 1059 0
+	ldr	r8, .L1398+80
+	.loc 2 1060 0
+	ldr	r10, .L1398+84
+	.loc 2 1062 0
 	ldrh	r2, [r3]
-	.loc 2 1010 0
+	.loc 2 1059 0
 	ldr	r0, [r8]
-	.loc 2 1011 0
+	.loc 2 1060 0
 	ldr	r7, [r10]
-	.loc 2 1010 0
-	ldr	r5, .L1393+4
-	.loc 2 1019 0
-	ldr	r4, .L1393+8
-	.loc 2 1020 0
-	ldr	r1, .L1393+12
-	.loc 2 1010 0
+	.loc 2 1059 0
+	ldr	r5, .L1398+4
+	.loc 2 1068 0
+	ldr	r4, .L1398+8
+	.loc 2 1069 0
+	ldr	r1, .L1398+12
+	.loc 2 1059 0
 	str	r0, [r5, #8]
-	.loc 2 1011 0
+	.loc 2 1060 0
 	str	r7, [r5, #12]
-.LVL1560:
-	.loc 2 1013 0
+.LVL1567:
+	.loc 2 1062 0
 	strh	r2, [r7, #2]	@ movhi
-	.loc 2 1014 0
+	.loc 2 1063 0
 	movw	r2, #61604
 	strh	r2, [r7]	@ movhi
-	.loc 2 1015 0
+	.loc 2 1064 0
 	ldr	r2, [r3, #8]
-	.loc 2 1016 0
+	.loc 2 1065 0
 	str	r6, [r7, #8]
-	.loc 2 1017 0
+	.loc 2 1066 0
 	str	r6, [r7, #12]
-	.loc 2 1015 0
+	.loc 2 1064 0
 	str	r2, [r7, #4]
-	.loc 2 1020 0
-	ldr	r2, .L1393+16
-	.loc 2 1021 0
+	.loc 2 1069 0
+	ldr	r2, .L1398+16
+	.loc 2 1070 0
 	str	r3, [sp, #4]
-	.loc 2 1020 0
+	.loc 2 1069 0
 	stm	r4, {r1, r2}
-	.loc 2 1021 0
+	.loc 2 1070 0
 	ldrh	r2, [r3, #6]
 	strh	r2, [r4, #8]	@ movhi
-	.loc 2 1022 0
-	ldr	r2, .L1393+20
+	.loc 2 1071 0
+	ldr	r2, .L1398+20
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
-	.loc 2 1024 0
-	ldr	r2, .L1393+24
+	.loc 2 1073 0
+	ldr	r2, .L1398+24
 	ldrh	r1, [r2]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1024 0
+	.loc 2 1073 0
 	strh	r1, [r4, #14]	@ movhi
-	.loc 2 1025 0
+	.loc 2 1074 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1026 0
+	.loc 2 1075 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #11]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1028 0
-	ldr	r2, .L1393+28
-	.loc 2 1025 0
+	.loc 2 1077 0
+	ldr	r2, .L1398+28
+	.loc 2 1074 0
 	strh	r1, [r4, #16]	@ movhi
-	.loc 2 1028 0
+	.loc 2 1077 0
 	ldrh	r1, [r2]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1028 0
+	.loc 2 1077 0
 	strh	r1, [r4, #18]	@ movhi
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1030 0
+	.loc 2 1079 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
-	.loc 2 1029 0
+	.loc 2 1078 0
 	orr	r1, r1, ip, lsl #6
 	strh	r1, [r4, #20]	@ movhi
-	.loc 2 1030 0
+	.loc 2 1079 0
 	strb	r2, [r4, #12]
-	.loc 2 1032 0
-	ldr	r2, .L1393+32
+	.loc 2 1081 0
+	ldr	r2, .L1398+32
 	ldrh	r1, [r2]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrh	ip, [r2, #2]
-	.loc 2 1032 0
+	.loc 2 1081 0
 	strh	r1, [r4, #22]	@ movhi
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrb	r1, [r2, #6]	@ zero_extendqisi2
-	.loc 2 1034 0
+	.loc 2 1083 0
 	ldrb	r2, [r2, #8]	@ zero_extendqisi2
 	strb	r2, [r4, #13]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	orr	r1, r1, ip, lsl #6
-	.loc 2 1036 0
-	ldr	r2, .L1393+36
-	.loc 2 1033 0
+	.loc 2 1085 0
+	ldr	r2, .L1398+36
+	.loc 2 1082 0
 	strh	r1, [r4, #24]	@ movhi
-	.loc 2 1047 0
+	.loc 2 1096 0
 	movs	r1, #255
-	.loc 2 1036 0
+	.loc 2 1085 0
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
-	.loc 2 1041 0
-	ldr	r2, .L1393+40
+	.loc 2 1090 0
+	ldr	r2, .L1398+40
 	ldr	r2, [r2]
 	str	r2, [r4, #40]
-	.loc 2 1042 0
-	ldr	r2, .L1393+44
+	.loc 2 1091 0
+	ldr	r2, .L1398+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
-	.loc 2 1047 0
-	ldr	r2, .L1393+48
+	.loc 2 1096 0
+	ldr	r2, .L1398+48
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1561:
-	.loc 2 1048 0
+.LVL1568:
+	.loc 2 1097 0
 	mov	r1, r4
-	.loc 2 1049 0
-	ldr	r4, .L1393+52
-	.loc 2 1048 0
+	.loc 2 1098 0
+	ldr	r4, .L1398+52
+	.loc 2 1097 0
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-.LVL1562:
-	.loc 2 1049 0
+.LVL1569:
+	.loc 2 1098 0
 	ldrh	r2, [r4]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1393+56
+	ldr	r1, .L1398+56
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-.LVL1563:
-	.loc 2 1050 0
+.LVL1570:
+	.loc 2 1099 0
 	ldrh	r0, [r4]
-	ldr	r1, .L1393+60
+	ldr	r1, .L1398+60
 	ldr	r4, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -16650,179 +16777,426 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r4
 	bl	ftl_memcpy
-.LVL1564:
-	.loc 2 1051 0
+.LVL1571:
+	.loc 2 1100 0
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1565:
+.LVL1572:
 	ldr	r3, [sp, #4]
 	mov	r4, r3
-.LVL1566:
-.L1382:
-	.loc 2 1053 0
+.LVL1573:
+.L1387:
+	.loc 2 1102 0
 	ldr	r3, [r8]
-	.loc 2 1055 0
+	.loc 2 1104 0
 	ldrh	r2, [r4]
-	.loc 2 1056 0
-	ldr	r0, .L1393+4
-	.loc 2 1053 0
+	.loc 2 1105 0
+	ldr	r0, .L1398+4
+	.loc 2 1102 0
 	str	r3, [r5, #8]
-	.loc 2 1054 0
+	.loc 2 1103 0
 	ldr	r3, [r10]
 	str	r3, [r5, #12]
-	.loc 2 1055 0
+	.loc 2 1104 0
 	ldrh	r3, [r4, #2]
 	orr	r3, r3, r2, lsl #10
 	str	r3, [r5, #4]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1567:
-	.loc 2 1057 0
-	ldr	r3, .L1393+64
+.LVL1574:
+	.loc 2 1106 0
+	ldr	r3, .L1398+64
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1383
-	.loc 2 1059 0
+	blt	.L1388
+	.loc 2 1108 0
 	ldrh	r3, [r4]
-	.loc 2 1058 0
+	.loc 2 1107 0
 	ldrh	fp, [r4, #4]
-.LVL1568:
-	.loc 2 1059 0
+.LVL1575:
+	.loc 2 1108 0
 	strh	r3, [r4, #4]	@ movhi
-	.loc 2 1060 0
+	.loc 2 1109 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1061 0
+	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1569:
-	.loc 2 1066 0
-	ldr	r2, .L1393+40
-	.loc 2 1061 0
+.LVL1576:
+	.loc 2 1115 0
+	ldr	r2, .L1398+40
+	.loc 2 1110 0
 	strh	r0, [r4]	@ movhi
-	.loc 2 1066 0
+	.loc 2 1115 0
 	ldr	r3, [r2]
 	adds	r1, r3, #1
 	str	r3, [r4, #8]
 	str	r1, [r2]
-	.loc 2 1067 0
+	.loc 2 1116 0
 	lsls	r2, r0, #10
 	str	r2, [r5, #4]
-	.loc 2 1068 0
+	.loc 2 1117 0
 	str	r3, [r7, #4]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	movs	r3, #1
-	.loc 2 1069 0
+	.loc 2 1118 0
 	strh	r0, [r7, #2]	@ movhi
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1393+4
+	ldr	r0, .L1398+4
 	bl	FlashProgPages
-.LVL1570:
-.L1383:
-	.loc 2 1072 0
+.LVL1577:
+.L1388:
+	.loc 2 1121 0
 	ldrh	r3, [r4, #2]
-	.loc 2 1073 0
+	.loc 2 1122 0
 	ldr	r2, [r5]
-	.loc 2 1072 0
+	.loc 2 1121 0
 	adds	r3, r3, #1
 	uxth	r3, r3
-	.loc 2 1073 0
+	.loc 2 1122 0
 	adds	r2, r2, #1
-	.loc 2 1072 0
+	.loc 2 1121 0
 	strh	r3, [r4, #2]	@ movhi
-	.loc 2 1073 0
-	bne	.L1384
-	.loc 2 1075 0
+	.loc 2 1122 0
+	bne	.L1389
+	.loc 2 1124 0
 	cmp	r3, #1
-	bne	.L1385
-	.loc 2 1075 0 is_stmt 0 discriminator 1
-	movw	r2, #1075
-	ldr	r1, .L1393+68
-	ldr	r0, .L1393+72
+	bne	.L1390
+	.loc 2 1124 0 is_stmt 0 discriminator 1
+	movw	r2, #1124
+	ldr	r1, .L1398+68
+	ldr	r0, .L1398+72
 	bl	printf
-.LVL1571:
-.L1385:
-	.loc 2 1076 0 is_stmt 1
+.LVL1578:
+.L1390:
+	.loc 2 1125 0 is_stmt 1
 	ldrh	r3, [r4, #2]
-	.loc 2 1078 0
+	.loc 2 1127 0
 	adds	r6, r6, #1
-.LVL1572:
+.LVL1579:
 	uxth	r6, r6
-.LVL1573:
-	.loc 2 1076 0
+.LVL1580:
+	.loc 2 1125 0
 	cmp	r3, #1
-	.loc 2 1077 0
+	.loc 2 1126 0
 	itttt	eq
-	ldreq	r3, .L1393+64
+	ldreq	r3, .L1398+64
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
-	.loc 2 1079 0
+	.loc 2 1128 0
 	cmp	r6, #3
-	bls	.L1382
-	.loc 2 1080 0
+	bls	.L1387
+	.loc 2 1129 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1393+76
+	ldr	r0, .L1398+76
 	bl	printf
-.LVL1574:
-.L1388:
-	b	.L1388
-.L1384:
-	.loc 2 1086 0
+.LVL1581:
+.L1393:
+	b	.L1393
+.L1389:
+	.loc 2 1135 0
 	cmp	r3, #1
-	beq	.L1382
-	.loc 2 1089 0
+	beq	.L1387
+	.loc 2 1138 0
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1389
-	.loc 2 1090 0
+	beq	.L1394
+	.loc 2 1139 0
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.LVL1575:
-.L1389:
-	.loc 2 1092 0
+.LVL1582:
+.L1394:
+	.loc 2 1141 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1576:
-.L1394:
+.LVL1583:
+.L1399:
 	.align	2
-.L1393:
-	.word	.LANCHOR81
-	.word	.LANCHOR108
+.L1398:
 	.word	.LANCHOR79
+	.word	.LANCHOR106
+	.word	.LANCHOR39
 	.word	1179929683
-	.word	1342177344
+	.word	1342177348
 	.word	.LANCHOR10
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR73
-	.word	.LANCHOR71
 	.word	.LANCHOR72
+	.word	.LANCHOR70
+	.word	.LANCHOR71
 	.word	.LANCHOR23
 	.word	.LANCHOR5
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.word	.LANCHOR1
 	.word	.LANCHOR20
-	.word	.LANCHOR167
+	.word	.LANCHOR166
 	.word	.LC1
-	.word	.LC101
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LC104
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.cfi_endproc
 .LFE272:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB215:
+	.loc 3 797 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1584:
+	.loc 3 800 0
+	movs	r0, #1
+	bl	FtlEctTblFlush
+.LVL1585:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1586:
+	.loc 3 803 0
+	movs	r0, #0
+	pop	{r3, pc}
+	.cfi_endproc
+.LFE215:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",%progbits
+	.align	1
+	.global	sftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB216:
+	.loc 3 806 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 807 0
+	ldr	r3, .L1403
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L1402
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1587:
+.L1402:
+	.loc 3 810 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L1404:
+	.align	2
+.L1403:
+	.word	.LANCHOR86
+	.cfi_endproc
+.LFE216:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",%progbits
+	.align	1
+	.global	FtlDiscard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB221:
+	.loc 3 1121 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1588:
+	.loc 3 1128 0
+	ldr	r3, .L1420
+	adds	r2, r0, r1
+	.loc 3 1121 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 3 1121 0
+	mov	r7, r0
+	mov	r5, r1
+	.loc 3 1128 0
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1413
+	.loc 3 1131 0
+	cmp	r1, #31
+	bhi	.L1407
+.LVL1589:
+.L1412:
+	.loc 3 1132 0
+	movs	r0, #0
+.L1405:
+	.loc 3 1165 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1590:
+.L1407:
+	.cfi_restore_state
+	.loc 3 1136 0
+	ldr	r8, .L1420+12
+	ldrh	r4, [r8]
+	mov	r1, r4
+.LVL1591:
+	bl	__aeabi_uidiv
+.LVL1592:
+	.loc 3 1137 0
+	smulbb	r3, r0, r4
+	.loc 3 1136 0
+	mov	r6, r0
+.LVL1593:
+	.loc 3 1137 0
+	subs	r7, r7, r3
+.LVL1594:
+	uxth	r7, r7
+.LVL1595:
+	.loc 3 1138 0
+	cbz	r7, .L1408
+.LVL1596:
+	.loc 3 1139 0
+	subs	r4, r4, r7
+.LVL1597:
+	.loc 3 1140 0
+	adds	r6, r6, #1
+.LVL1598:
+	.loc 3 1139 0
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
+	uxth	r4, r4
+	.loc 3 1141 0
+	subs	r5, r5, r4
+.LVL1599:
+.L1408:
+	.loc 3 1148 0
+	ldr	r4, .L1420+4
+	.loc 3 1144 0
+	mov	r3, #-1
+	.loc 3 1149 0
+	ldr	r7, .L1420+8
+.LVL1600:
+	.loc 3 1144 0
+	str	r3, [sp, #4]
+.L1409:
+	.loc 3 1145 0
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L1411
+	.loc 3 1158 0
+	ldr	r3, .L1420+4
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L1412
+	.loc 3 1160 0
+	movs	r4, #0
+	str	r4, [r3]
+	.loc 3 1161 0
+	bl	l2p_flush
+.LVL1601:
+	.loc 3 1162 0
+	bl	FtlVpcTblFlush
+.LVL1602:
+	b	.L1412
+.L1411:
+	.loc 3 1146 0
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r6
+	bl	log2phys
+.LVL1603:
+	.loc 3 1147 0
+	ldr	r3, [sp]
+	adds	r3, r3, #1
+	beq	.L1410
+	.loc 3 1148 0
+	ldr	r3, [r4]
+	.loc 3 1150 0
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	.loc 3 1148 0
+	adds	r3, r3, #1
+	str	r3, [r4]
+	.loc 3 1149 0
+	ldr	r3, [r7]
+	adds	r3, r3, #1
+	str	r3, [r7]
+	.loc 3 1150 0
+	bl	log2phys
+.LVL1604:
+	.loc 3 1151 0
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1605:
+	.loc 3 1152 0
+	bl	decrement_vpc_count
+.LVL1606:
+.L1410:
+	.loc 3 1155 0
+	ldrh	r3, [r8]
+	.loc 3 1154 0
+	adds	r6, r6, #1
+.LVL1607:
+	.loc 3 1155 0
+	subs	r5, r5, r3
+.LVL1608:
+	b	.L1409
+.LVL1609:
+.L1413:
+	.loc 3 1129 0
+	mov	r0, #-1
+.LVL1610:
+	b	.L1405
+.L1421:
+	.align	2
+.L1420:
+	.word	.LANCHOR34
+	.word	.LANCHOR167
+	.word	.LANCHOR63
+	.word	.LANCHOR12
+	.cfi_endproc
+.LFE221:
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
 	.align	1
 	.global	FtlVpcCheckAndModify
@@ -16833,7 +17207,7 @@ FtlVpcTblFlush:
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 .LFB292:
-	.loc 2 2192 0
+	.loc 2 2242 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -16846,146 +17220,146 @@ FtlVpcCheckAndModify:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 2 2199 0
+	.loc 2 2249 0
 	movs	r5, #0
-	.loc 2 2197 0
-	ldr	r1, .L1407
-	ldr	r0, .L1407+4
+	.loc 2 2247 0
+	ldr	r1, .L1434
+	ldr	r0, .L1434+4
 	bl	printf
-.LVL1577:
-	.loc 2 2198 0
-	ldr	r3, .L1407+8
+.LVL1611:
+	.loc 2 2248 0
+	ldr	r3, .L1434+8
 	movs	r1, #0
-	ldr	r4, .L1407+12
-	.loc 2 2199 0
-	ldr	r6, .L1407+16
-	.loc 2 2198 0
+	ldr	r4, .L1434+12
+	.loc 2 2249 0
+	ldr	r6, .L1434+16
+	.loc 2 2248 0
 	ldrh	r2, [r3]
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1578:
-.L1396:
-	.loc 2 2199 0 discriminator 1
+.LVL1612:
+.L1423:
+	.loc 2 2249 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r5, r3
-	bcc	.L1398
-	.loc 2 2206 0 discriminator 1
-	ldr	r10, .L1407+36
+	bcc	.L1425
+	.loc 2 2256 0 discriminator 1
+	ldr	r10, .L1434+36
 	movs	r7, #0
-	.loc 2 2207 0 discriminator 1
-	ldr	r8, .L1407+40
-.LVL1579:
-.L1399:
-	.loc 2 2206 0 discriminator 1
+	.loc 2 2257 0 discriminator 1
+	ldr	r8, .L1434+40
+.LVL1613:
+.L1426:
+	.loc 2 2256 0 discriminator 1
 	ldrh	r3, [r10]
 	uxth	r5, r7
-.LVL1580:
+.LVL1614:
 	cmp	r3, r5
-	bhi	.L1403
-	.loc 2 2218 0
+	bhi	.L1430
+	.loc 2 2268 0
 	add	sp, sp, #12
 	.cfi_remember_state
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL1581:
-.L1398:
+.LVL1615:
+.L1425:
 	.cfi_restore_state
-	.loc 2 2200 0
+	.loc 2 2250 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1582:
-	.loc 2 2201 0
+.LVL1616:
+	.loc 2 2251 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1397
-	.loc 2 2202 0
+	beq	.L1424
+	.loc 2 2252 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1583:
-	.loc 2 2203 0
+.LVL1617:
+	.loc 2 2253 0
 	ldr	r2, [r4]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.LVL1584:
-.L1397:
-	.loc 2 2199 0 discriminator 2
+.LVL1618:
+.L1424:
+	.loc 2 2249 0 discriminator 2
 	adds	r5, r5, #1
-.LVL1585:
-	b	.L1396
-.LVL1586:
-.L1403:
-	.loc 2 2207 0
+.LVL1619:
+	b	.L1423
+.LVL1620:
+.L1430:
+	.loc 2 2257 0
 	ldr	r3, [r8]
 	uxth	r6, r7
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1401
-	.loc 2 2207 0 is_stmt 0 discriminator 1
+	beq	.L1428
+	.loc 2 2257 0 is_stmt 0 discriminator 1
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1401
-	.loc 2 2209 0 is_stmt 1
+	beq	.L1428
+	.loc 2 2259 0 is_stmt 1
 	mov	r1, r6
-	ldr	r0, .L1407+20
+	ldr	r0, .L1434+20
 	bl	printf
-.LVL1587:
-	.loc 2 2210 0
-	ldr	r3, .L1407+24
+.LVL1621:
+	.loc 2 2260 0
+	ldr	r3, .L1434+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1401
-	.loc 2 2210 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1407+28
+	beq	.L1428
+	.loc 2 2260 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1434+28
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1401
-	.loc 2 2210 0 discriminator 2
-	ldr	r3, .L1407+32
+	beq	.L1428
+	.loc 2 2260 0 discriminator 2
+	ldr	r3, .L1434+32
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1401
-	.loc 2 2211 0 is_stmt 1
+	beq	.L1428
+	.loc 2 2261 0 is_stmt 1
 	ldr	r3, [r4]
-	.loc 2 2212 0
+	.loc 2 2262 0
 	mov	r0, r5
-	.loc 2 2211 0
+	.loc 2 2261 0
 	ldrh	r2, [r3, r6, lsl #1]
 	ldr	r3, [r8]
 	strh	r2, [r3, r6, lsl #1]	@ movhi
-	.loc 2 2212 0
+	.loc 2 2262 0
 	bl	update_vpc_list
-.LVL1588:
-	.loc 2 2213 0
+.LVL1622:
+	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1589:
-	.loc 2 2214 0
+.LVL1623:
+	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1590:
-.L1401:
+.LVL1624:
+.L1428:
 	adds	r7, r7, #1
-.LVL1591:
-	b	.L1399
-.L1408:
+.LVL1625:
+	b	.L1426
+.L1435:
 	.align	2
-.L1407:
+.L1434:
 	.word	.LANCHOR168
-	.word	.LC91
+	.word	.LC94
 	.word	.LANCHOR6
 	.word	.LANCHOR128
-	.word	.LANCHOR62
-	.word	.LC102
+	.word	.LANCHOR61
+	.word	.LC105
 	.word	.LANCHOR51
 	.word	.LANCHOR53
 	.word	.LANCHOR52
 	.word	.LANCHOR5
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE292:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -16999,111 +17373,111 @@ FtlVpcCheckAndModify:
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
 .LFB302:
-	.loc 2 2631 0
+	.loc 2 2682 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1592:
-	.loc 2 2633 0
-	ldr	r3, .L1419
-	.loc 2 2631 0
+.LVL1626:
+	.loc 2 2684 0
+	ldr	r3, .L1446
+	.loc 2 2682 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
 	.cfi_offset 5, -12
 	.cfi_offset 6, -8
 	.cfi_offset 14, -4
-	.loc 2 2631 0
+	.loc 2 2682 0
 	mov	r6, r0
-	.loc 2 2632 0
+	.loc 2 2683 0
 	ldrh	r4, [r0]
-.LVL1593:
-	.loc 2 2633 0
+.LVL1627:
+	.loc 2 2684 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1410
-	.loc 2 2633 0 is_stmt 0 discriminator 1
-	movw	r2, #2633
-	ldr	r1, .L1419+4
-	ldr	r0, .L1419+8
-.LVL1594:
+	bcs	.L1437
+	.loc 2 2684 0 is_stmt 0 discriminator 1
+	movw	r2, #2684
+	ldr	r1, .L1446+4
+	ldr	r0, .L1446+8
+.LVL1628:
 	bl	printf
-.LVL1595:
-.L1410:
-	.loc 2 2635 0 is_stmt 1
+.LVL1629:
+.L1437:
+	.loc 2 2686 0 is_stmt 1
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1411
-	.loc 2 2636 0
-	ldr	r3, .L1419+12
-	.loc 2 2637 0
+	beq	.L1438
+	.loc 2 2687 0
+	ldr	r3, .L1446+12
+	.loc 2 2688 0
 	mov	r0, r4
-	.loc 2 2636 0
+	.loc 2 2687 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1412
-	.loc 2 2637 0
+	cbz	r3, .L1439
+	.loc 2 2688 0
 	bl	INSERT_DATA_LIST
-.LVL1596:
-.L1411:
-	.loc 2 2642 0
-	ldr	r5, .L1419+16
+.LVL1630:
+.L1438:
+	.loc 2 2693 0
+	ldr	r5, .L1446+16
 	movw	r2, #65535
-	.loc 2 2641 0
+	.loc 2 2692 0
 	movs	r3, #1
 	strb	r3, [r6, #8]
-	.loc 2 2642 0
+	.loc 2 2693 0
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1413
-	.loc 2 2643 0
+	beq	.L1440
+	.loc 2 2694 0
 	cmp	r4, r0
-	bne	.L1414
-	.loc 2 2643 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1419+12
+	bne	.L1441
+	.loc 2 2694 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1446+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1415
-.L1414:
-	.loc 2 2644 0 is_stmt 1
+	cbz	r3, .L1442
+.L1441:
+	.loc 2 2695 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1597:
-.L1415:
-	.loc 2 2645 0
+.LVL1631:
+.L1442:
+	.loc 2 2696 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1413:
-	.loc 2 2647 0
+.L1440:
+	.loc 2 2698 0
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1598:
-	.loc 2 2648 0
+.LVL1632:
+	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1599:
-	.loc 2 2649 0
+.LVL1633:
+	.loc 2 2700 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1600:
-	.loc 2 2650 0
+.LVL1634:
+	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1601:
-	.loc 2 2652 0
+.LVL1635:
+	.loc 2 2703 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1602:
-.L1412:
-	.loc 2 2639 0
+.LVL1636:
+.L1439:
+	.loc 2 2690 0
 	bl	INSERT_FREE_LIST
-.LVL1603:
-	b	.L1411
-.L1420:
+.LVL1637:
+	b	.L1438
+.L1447:
 	.align	2
-.L1419:
+.L1446:
 	.word	.LANCHOR5
 	.word	.LANCHOR169
 	.word	.LC1
-	.word	.LANCHOR43
-	.word	.LANCHOR151
+	.word	.LANCHOR42
+	.word	.LANCHOR150
 	.cfi_endproc
 .LFE302:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
@@ -17121,7 +17495,7 @@ FtlProgPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1604:
+.LVL1638:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -17135,43 +17509,43 @@ FtlProgPages:
 	.loc 3 913 0
 	movs	r6, #0
 	.loc 3 917 0
-	ldr	r8, .L1435+24
+	ldr	r8, .L1462+24
 	.loc 3 904 0
 	mov	r4, r3
 	.loc 3 911 0
 	movs	r2, #0
-.LVL1605:
+.LVL1639:
 	.loc 3 904 0
 	mov	r5, r0
 	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1606:
+.LVL1640:
 	.loc 3 904 0
 	mov	r10, r1
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1607:
-.L1422:
+.LVL1641:
+.L1449:
 	.loc 3 913 0 discriminator 1
 	cmp	r6, r10
-	beq	.L1429
+	beq	.L1456
 	.loc 3 918 0
-	ldr	r7, .L1435
-	b	.L1430
-.L1425:
+	ldr	r7, .L1462
+	b	.L1457
+.L1452:
 	.loc 3 915 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1608:
+.LVL1642:
 	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1423
+	bne	.L1450
 	.loc 3 917 0
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
-.LVL1609:
+.LVL1643:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
@@ -17183,17 +17557,17 @@ FtlProgPages:
 	strb	r3, [r4, #6]
 	.loc 3 920 0
 	strh	r3, [r4, #4]	@ movhi
-.L1423:
+.L1450:
 	.loc 3 922 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1424
+	cbnz	r3, .L1451
 	.loc 3 923 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1610:
-.L1424:
+.LVL1644:
+.L1451:
 	.loc 3 926 0
-	ldr	r2, .L1435+4
+	ldr	r2, .L1462+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17201,11 +17575,11 @@ FtlProgPages:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1611:
+.LVL1645:
 	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1612:
+.LVL1646:
 	.loc 3 930 0
 	movs	r2, #0
 	.loc 3 929 0
@@ -17217,25 +17591,25 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1613:
-.L1430:
+.LVL1647:
+.L1457:
 	.loc 3 914 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1425
+	beq	.L1452
 	.loc 3 933 0
-	ldr	r3, .L1435+8
+	ldr	r3, .L1462+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1426
+	bcc	.L1453
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	movw	r2, #933
-	ldr	r1, .L1435+12
-	ldr	r0, .L1435+16
+	ldr	r1, .L1462+12
+	ldr	r0, .L1462+16
 	bl	printf
-.LVL1614:
-.L1426:
+.LVL1648:
+.L1453:
 	.loc 3 934 0 is_stmt 1
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
@@ -17246,465 +17620,167 @@ FtlProgPages:
 	str	r3, [r1, #-4]!
 	.loc 3 935 0
 	bl	log2phys
-.LVL1615:
+.LVL1649:
 	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	fp, [r3, #12]
-.LVL1616:
+.LVL1650:
 	.loc 3 939 0
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-.LVL1617:
+.LVL1651:
 	.loc 3 940 0
 	cmp	fp, #-1
 	.loc 3 939 0
 	mov	r7, r0
-.LVL1618:
+.LVL1652:
 	.loc 3 940 0
-	beq	.L1427
+	beq	.L1454
 	.loc 3 942 0
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1428
+	cbnz	r2, .L1455
 	.loc 3 943 0
 	mov	r1, r0
-	ldr	r0, .L1435+20
-.LVL1619:
+	ldr	r0, .L1462+20
+.LVL1653:
 	bl	printf
-.LVL1620:
-.L1428:
+.LVL1654:
+.L1455:
 	.loc 3 944 0
 	mov	r0, r7
 	bl	decrement_vpc_count
-.LVL1621:
-.L1427:
+.LVL1655:
+.L1454:
 	.loc 3 913 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1622:
+.LVL1656:
 	adds	r5, r5, #20
-	b	.L1422
-.LVL1623:
-.L1429:
+	b	.L1449
+.LVL1657:
+.L1456:
 	.loc 3 948 0
-	ldr	r3, .L1435+8
+	ldr	r3, .L1462+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1421
+	bcc	.L1448
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	mov	r2, #948
-	ldr	r1, .L1435+12
-	ldr	r0, .L1435+16
+	ldr	r1, .L1462+12
+	ldr	r0, .L1462+16
 	bl	printf
-.LVL1624:
-.L1421:
+.LVL1658:
+.L1448:
 	.loc 3 949 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1625:
-.L1436:
+.LVL1659:
+.L1463:
 	.align	2
-.L1435:
+.L1462:
 	.word	.LANCHOR19
-	.word	.LANCHOR83
+	.word	.LANCHOR81
 	.word	.LANCHOR3
 	.word	.LANCHOR170
 	.word	.LC1
-	.word	.LC103
-	.word	.LANCHOR43
+	.word	.LC106
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE218:
 	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlGcFreeTempBlock
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-.LFB219:
-	.loc 3 952 0
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+.LFB311:
+	.loc 5 112 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 4, -8
+.LVL1660:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 3 953 0
-	ldr	r4, .L1442
-	ldr	r0, [r4]
-	cbz	r0, .L1438
-	.loc 3 954 0
-	ldr	r3, .L1442+4
+	.loc 5 119 0
+	movw	r2, #65535
+	ldr	r4, .L1490
+	.loc 5 115 0
+	ldr	r6, .L1490+4
+	.loc 5 119 0
+	ldrh	r5, [r4]
+	.loc 5 115 0
+	ldrh	r1, [r6]
+.LVL1661:
+	.loc 5 119 0
+	cmp	r5, r2
+	bne	.L1465
+.LVL1662:
+.L1475:
+	.loc 5 152 0
+	ldr	r3, .L1490+8
 	movs	r2, #0
-	movs	r1, #1
-	ldr	r3, [r3]
-	bl	FtlProgPages
-.LVL1626:
-	.loc 3 955 0
-	movs	r3, #0
-	str	r3, [r4]
-.L1438:
-	.loc 3 958 0
+	str	r2, [r3]
+	.loc 5 153 0
+	movw	r3, #65535
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L1488
+.L1466:
+	.loc 5 154 0
 	movs	r0, #0
-	pop	{r4, pc}
-.L1443:
-	.align	2
-.L1442:
-	.word	.LANCHOR150
-	.word	.LANCHOR171
-	.cfi_endproc
-.LFE219:
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-.LFB215:
-	.loc 3 797 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 798 0
-	bl	FtlCacheWriteBack
-.LVL1627:
-	.loc 3 799 0
-	bl	l2p_flush
-.LVL1628:
-	.loc 3 800 0
-	movs	r0, #1
-	bl	FtlEctTblFlush
-.LVL1629:
-	.loc 3 801 0
-	bl	FtlVpcTblFlush
-.LVL1630:
-	.loc 3 803 0
-	movs	r0, #0
-	pop	{r3, pc}
-	.cfi_endproc
-.LFE215:
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.sftl_deinit,"ax",%progbits
-	.align	1
-	.global	sftl_deinit
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	sftl_deinit, %function
-sftl_deinit:
-.LFB216:
-	.loc 3 806 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	.cfi_def_cfa_offset 8
-	.cfi_offset 3, -8
-	.cfi_offset 14, -4
-	.loc 3 807 0
-	ldr	r3, .L1447
-	ldr	r3, [r3]
-	cmp	r3, #1
-	bne	.L1446
-	.loc 3 808 0
-	bl	FtlSysFlush
-.LVL1631:
-.L1446:
-	.loc 3 810 0
-	movs	r0, #0
-	pop	{r3, pc}
-.L1448:
-	.align	2
-.L1447:
-	.word	.LANCHOR88
-	.cfi_endproc
-.LFE216:
-	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",%progbits
-	.align	1
-	.global	FtlDiscard
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlDiscard, %function
-FtlDiscard:
-.LFB221:
-	.loc 3 1157 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1632:
-	.loc 3 1164 0
-	ldr	r3, .L1464
-	adds	r2, r0, r1
-	.loc 3 1157 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	.cfi_def_cfa_offset 32
-	.cfi_offset 4, -24
-	.cfi_offset 5, -20
-	.cfi_offset 6, -16
-	.cfi_offset 7, -12
-	.cfi_offset 8, -8
-	.cfi_offset 14, -4
-	.loc 3 1157 0
-	mov	r6, r0
-	mov	r5, r1
-	.loc 3 1164 0
-	ldr	r3, [r3]
-	cmp	r2, r3
-	bhi	.L1457
-	.loc 3 1167 0
-	cmp	r1, #31
-	bhi	.L1451
-.LVL1633:
-.L1456:
-	.loc 3 1168 0
-	movs	r0, #0
-.L1449:
-	.loc 3 1201 0
-	add	sp, sp, #8
-	.cfi_remember_state
-	.cfi_def_cfa_offset 24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1634:
-.L1451:
-	.cfi_restore_state
-	.loc 3 1172 0
-	ldr	r8, .L1464+12
-	.loc 3 1170 0
-	bl	FtlCacheWriteBack
-.LVL1635:
-	.loc 3 1172 0
-	mov	r0, r6
-	ldrh	r4, [r8]
-	mov	r1, r4
-	bl	__aeabi_uidiv
-.LVL1636:
-	.loc 3 1173 0
-	smulbb	r3, r0, r4
-	.loc 3 1172 0
-	mov	r7, r0
-.LVL1637:
-	.loc 3 1173 0
-	subs	r6, r6, r3
-.LVL1638:
-	uxth	r6, r6
-.LVL1639:
-	.loc 3 1174 0
-	cbz	r6, .L1452
-.LVL1640:
-	.loc 3 1175 0
-	subs	r4, r4, r6
-.LVL1641:
-	.loc 3 1176 0
-	adds	r7, r7, #1
-.LVL1642:
-	.loc 3 1175 0
-	cmp	r4, r5
-	it	cs
-	movcs	r4, r5
-	uxth	r4, r4
-	.loc 3 1177 0
-	subs	r5, r5, r4
-.LVL1643:
-.L1452:
-	.loc 3 1184 0
-	ldr	r4, .L1464+4
-	.loc 3 1180 0
-	mov	r3, #-1
-	.loc 3 1185 0
-	ldr	r6, .L1464+8
-.LVL1644:
-	.loc 3 1180 0
-	str	r3, [sp, #4]
-.L1453:
-	.loc 3 1181 0
-	ldrh	r3, [r8]
-	cmp	r5, r3
-	bcs	.L1455
-	.loc 3 1194 0
-	ldr	r3, .L1464+4
-	ldr	r2, [r3]
-	cmp	r2, #32
-	bls	.L1456
-	.loc 3 1196 0
-	movs	r4, #0
-	str	r4, [r3]
-	.loc 3 1197 0
-	bl	l2p_flush
-.LVL1645:
-	.loc 3 1198 0
-	bl	FtlVpcTblFlush
-.LVL1646:
-	b	.L1456
-.L1455:
-	.loc 3 1182 0
-	movs	r2, #0
-	mov	r1, sp
-	mov	r0, r7
-	bl	log2phys
-.LVL1647:
-	.loc 3 1183 0
-	ldr	r3, [sp]
-	adds	r3, r3, #1
-	beq	.L1454
-	.loc 3 1184 0
-	ldr	r3, [r4]
-	.loc 3 1186 0
-	movs	r2, #1
-	add	r1, sp, #4
-	mov	r0, r7
-	.loc 3 1184 0
-	adds	r3, r3, #1
-	str	r3, [r4]
-	.loc 3 1185 0
-	ldr	r3, [r6]
-	adds	r3, r3, #1
-	str	r3, [r6]
-	.loc 3 1186 0
-	bl	log2phys
-.LVL1648:
-	.loc 3 1187 0
-	ldr	r0, [sp]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-.LVL1649:
-	.loc 3 1188 0
-	bl	decrement_vpc_count
-.LVL1650:
-.L1454:
-	.loc 3 1191 0
-	ldrh	r3, [r8]
-	.loc 3 1190 0
-	adds	r7, r7, #1
-.LVL1651:
-	.loc 3 1191 0
-	subs	r5, r5, r3
-.LVL1652:
-	b	.L1453
-.LVL1653:
-.L1457:
-	.loc 3 1165 0
-	mov	r0, #-1
-.LVL1654:
-	b	.L1449
-.L1465:
-	.align	2
 .L1464:
-	.word	.LANCHOR34
-	.word	.LANCHOR172
-	.word	.LANCHOR64
-	.word	.LANCHOR12
-	.cfi_endproc
-.LFE221:
-	.size	FtlDiscard, .-FtlDiscard
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
-	.align	1
-	.global	FtlGcFreeTempBlock
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-.LFB311:
-	.loc 5 112 0
-	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1655:
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	.cfi_def_cfa_offset 48
-	.cfi_offset 4, -32
-	.cfi_offset 5, -28
-	.cfi_offset 6, -24
-	.cfi_offset 7, -20
-	.cfi_offset 8, -16
-	.cfi_offset 10, -12
-	.cfi_offset 11, -8
-	.cfi_offset 14, -4
-	.loc 5 119 0
-	movw	r2, #65535
-	ldr	r4, .L1492
-	.loc 5 115 0
-	ldr	r6, .L1492+4
-	.loc 5 119 0
-	ldrh	r5, [r4]
-	.loc 5 115 0
-	ldrh	r1, [r6]
-.LVL1656:
-	.loc 5 119 0
-	cmp	r5, r2
-	bne	.L1467
-.LVL1657:
-.L1477:
-	.loc 5 152 0
-	ldr	r3, .L1492+8
-	movs	r2, #0
-	str	r2, [r3]
-	.loc 5 153 0
-	movw	r3, #65535
-	ldrh	r2, [r4]
-	cmp	r2, r3
-	bne	.L1490
-.L1468:
-	.loc 5 154 0
-	movs	r0, #0
-.L1466:
 	.loc 5 199 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1658:
-.L1467:
+.LVL1663:
+.L1465:
 	.cfi_restore_state
 	.loc 5 121 0
-	cbz	r0, .L1470
-.LVL1659:
+	cbz	r0, .L1468
+.LVL1664:
 	.loc 5 123 0
-	ldr	r3, .L1492+12
+	ldr	r3, .L1490+12
 	ldrh	r0, [r3]
-.LVL1660:
+.LVL1665:
 	cmp	r0, r2
-	beq	.L1471
-.L1472:
+	beq	.L1469
+.L1470:
 	.loc 5 122 0
 	movs	r1, #2
-.LVL1661:
-.L1470:
+.LVL1666:
+.L1468:
 	.loc 5 131 0
-	ldr	r0, .L1492
+	ldr	r0, .L1490
 	bl	FtlGcScanTempBlk
-.LVL1662:
+.LVL1667:
 	str	r0, [sp, #12]
 	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1473
+	beq	.L1471
 	.loc 5 135 0
-	ldr	r3, .L1492+16
+	ldr	r3, .L1490+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1474
+	bls	.L1472
 	.loc 5 136 0
 	subs	r3, r3, #5
 	.loc 5 137 0
@@ -17713,14 +17789,14 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1663:
-.L1474:
+.LVL1668:
+.L1472:
 	.loc 5 139 0
-	ldr	r4, .L1492+8
+	ldr	r4, .L1490+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1475
+	cbnz	r2, .L1473
 	.loc 5 140 0
-	ldr	r2, .L1492+20
+	ldr	r2, .L1490+20
 	.loc 5 141 0
 	ldr	r0, [sp, #12]
 	.loc 5 140 0
@@ -17732,65 +17808,62 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1664:
+.LVL1669:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1665:
-.L1475:
+.LVL1670:
+.L1473:
 	.loc 5 144 0
 	movs	r3, #0
 	str	r3, [r4]
-.L1486:
+.L1484:
 	.loc 5 149 0
 	movs	r0, #1
-	b	.L1466
-.LVL1666:
-.L1471:
+	b	.L1464
+.LVL1671:
+.L1469:
 	.loc 5 124 0
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
 	.loc 5 125 0
-	ldr	r3, .L1492+24
+	ldr	r3, .L1490+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1472
-	b	.L1470
-.LVL1667:
-.L1473:
+	bhi	.L1470
+	b	.L1468
+.LVL1672:
+.L1471:
 	.loc 5 148 0
-	ldr	r3, .L1492+12
+	ldr	r3, .L1490+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1486
-	b	.L1477
-.LVL1668:
-.L1490:
-	.loc 5 160 0
-	bl	FtlCacheWriteBack
-.LVL1669:
+	bne	.L1484
+	b	.L1475
+.LVL1673:
+.L1488:
 	.loc 5 162 0
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1492+28
+	ldr	r5, .L1490+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1478
+	beq	.L1476
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	movs	r2, #162
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1490+32
+	ldr	r0, .L1490+36
 	bl	printf
-.LVL1670:
-.L1478:
+.LVL1674:
+.L1476:
 	.loc 5 163 0 is_stmt 1
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1492+40
+	ldr	r2, .L1490+40
 	ldrh	r0, [r4]
 	.loc 5 168 0
-	ldr	fp, .L1492+68
+	ldr	fp, .L1490+68
 	.loc 5 163 0
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
@@ -17800,38 +17873,38 @@ FtlGcFreeTempBlock:
 	.loc 5 163 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
 	.loc 5 164 0
-	ldr	r1, .L1492+44
+	ldr	r1, .L1490+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.LVL1671:
-.L1479:
+.LVL1675:
+.L1477:
 	.loc 5 165 0 discriminator 1
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1483
+	bhi	.L1481
 	.loc 5 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1672:
+.LVL1676:
 	.loc 5 182 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1484
+	beq	.L1482
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1673:
-.L1485:
+.LVL1677:
+.L1483:
 	.loc 5 188 0
-	ldr	r3, .L1492+48
+	ldr	r3, .L1490+48
 	.loc 5 186 0
 	movw	r6, #65535
-.LVL1674:
+.LVL1678:
 	strh	r6, [r4]	@ movhi
 	.loc 5 187 0
 	movs	r4, #0
@@ -17840,30 +17913,30 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1675:
+.LVL1679:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1676:
+.LVL1680:
 	.loc 5 191 0
-	ldr	r3, .L1492+24
+	ldr	r3, .L1490+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1492+52
+	ldr	r3, .L1490+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1468
+	ble	.L1466
 	.loc 5 192 0
-	ldr	r3, .L1492+56
+	ldr	r3, .L1490+56
 	.loc 5 193 0
 	movs	r2, #20
 	.loc 5 192 0
 	strh	r6, [r3]	@ movhi
 	.loc 5 193 0
-	ldr	r3, .L1492+60
+	ldr	r3, .L1490+60
 	strh	r2, [r3]	@ movhi
-	b	.L1468
-.LVL1677:
-.L1483:
+	b	.L1466
+.LVL1681:
+.L1481:
 	.loc 5 166 0
 	uxth	r3, r6
 	movs	r7, #12
@@ -17871,93 +17944,93 @@ FtlGcFreeTempBlock:
 	ldr	r2, [fp]
 	.loc 5 166 0
 	muls	r7, r3, r7
-	ldr	r3, .L1492+64
+	ldr	r3, .L1490+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
-.LVL1678:
+.LVL1682:
 	.loc 5 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1480
+	bcc	.L1478
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	movs	r2, #168
-	ldr	r1, .L1492+32
-	ldr	r0, .L1492+36
+	ldr	r1, .L1490+32
+	ldr	r0, .L1490+36
 	bl	printf
-.LVL1679:
-.L1480:
+.LVL1683:
+.L1478:
 	.loc 5 169 0 is_stmt 1
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1680:
+.LVL1684:
 	.loc 5 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1481
+	bne	.L1479
 	.loc 5 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1681:
+.LVL1685:
 	.loc 5 172 0
 	movs	r2, #1
 	.loc 5 171 0
 	mov	r7, r0
-.LVL1682:
+.LVL1686:
 	.loc 5 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1683:
+.LVL1687:
 	.loc 5 173 0
 	mov	r0, r7
-.LVL1684:
-.L1491:
+.LVL1688:
+.L1489:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1685:
-.L1482:
+.LVL1689:
+.L1480:
 	adds	r6, r6, #1
-.LVL1686:
-	b	.L1479
-.LVL1687:
-.L1481:
+.LVL1690:
+	b	.L1477
+.LVL1691:
+.L1479:
 	.loc 5 175 0
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1482
+	beq	.L1480
 	.loc 5 177 0
 	ldrh	r0, [r4]
-	b	.L1491
-.LVL1688:
-.L1484:
+	b	.L1489
+.LVL1692:
+.L1482:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1689:
-	b	.L1485
-.L1493:
+.LVL1693:
+	b	.L1483
+.L1491:
 	.align	2
-.L1492:
+.L1490:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
-	.word	.LANCHOR153
-	.word	.LANCHOR157
-	.word	.LANCHOR40
-	.word	.LANCHOR83
+	.word	.LANCHOR152
+	.word	.LANCHOR156
+	.word	.LANCHOR43
+	.word	.LANCHOR81
 	.word	.LANCHOR48
-	.word	.LANCHOR99
-	.word	.LANCHOR173
+	.word	.LANCHOR97
+	.word	.LANCHOR171
 	.word	.LC1
-	.word	.LANCHOR43
-	.word	.LANCHOR68
-	.word	.LANCHOR98
+	.word	.LANCHOR42
+	.word	.LANCHOR67
+	.word	.LANCHOR96
+	.word	.LANCHOR78
 	.word	.LANCHOR80
 	.word	.LANCHOR82
-	.word	.LANCHOR84
-	.word	.LANCHOR100
-	.word	.LANCHOR62
+	.word	.LANCHOR98
+	.word	.LANCHOR61
 	.cfi_endproc
 .LFE311:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
@@ -17982,42 +18055,42 @@ FtlGcPageRecovery:
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
 	.loc 5 290 0
-	ldr	r4, .L1496
-	ldr	r5, .L1496+4
+	ldr	r4, .L1494
+	ldr	r5, .L1494+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1690:
+.LVL1694:
 	.loc 5 291 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1494
-.LBB286:
-.LBB287:
+	bcc	.L1492
+.LBB319:
+.LBB320:
 	.loc 5 293 0
-	ldr	r0, .L1496+8
+	ldr	r0, .L1494+8
 	bl	FtlMapBlkWriteDump_data
-.LVL1691:
+.LVL1695:
 	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1692:
+.LVL1696:
 	.loc 5 295 0
-	ldr	r3, .L1496+12
+	ldr	r3, .L1494+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1494:
+.L1492:
 	pop	{r3, r4, r5, pc}
-.L1497:
+.L1495:
 	.align	2
-.L1496:
+.L1494:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR144
-	.word	.LANCHOR153
-.LBE287:
-.LBE286:
+	.word	.LANCHOR152
+.LBE320:
+.LBE319:
 	.cfi_endproc
 .LFE314:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -18031,7 +18104,7 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 .LFB286:
-	.loc 2 2032 0
+	.loc 2 2081 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -18041,49 +18114,49 @@ FtlPowerLostRecovery:
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 2 2033 0
+	.loc 2 2082 0
 	movs	r4, #0
-	.loc 2 2035 0
-	ldr	r5, .L1499
-	.loc 2 2033 0
-	ldr	r3, .L1499+4
-	.loc 2 2035 0
+	.loc 2 2084 0
+	ldr	r5, .L1497
+	.loc 2 2082 0
+	ldr	r3, .L1497+4
+	.loc 2 2084 0
 	mov	r0, r5
-	.loc 2 2033 0
+	.loc 2 2082 0
 	str	r4, [r3]
-	.loc 2 2035 0
+	.loc 2 2084 0
 	bl	FtlRecoverySuperblock
-.LVL1693:
-	.loc 2 2036 0
+.LVL1697:
+	.loc 2 2085 0
 	mov	r0, r5
-	.loc 2 2037 0
-	ldr	r5, .L1499+8
-	.loc 2 2036 0
+	.loc 2 2086 0
+	ldr	r5, .L1497+8
+	.loc 2 2085 0
 	bl	FtlSlcSuperblockCheck
-.LVL1694:
-	.loc 2 2037 0
+.LVL1698:
+	.loc 2 2086 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
-.LVL1695:
-	.loc 2 2038 0
+.LVL1699:
+	.loc 2 2087 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1696:
-	.loc 2 2039 0
+.LVL1700:
+	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1697:
-	.loc 2 2040 0
+.LVL1701:
+	.loc 2 2089 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1698:
-	.loc 2 2042 0
+.LVL1702:
+	.loc 2 2091 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1500:
+.L1498:
 	.align	2
-.L1499:
+.L1497:
 	.word	.LANCHOR51
-	.word	.LANCHOR163
+	.word	.LANCHOR162
 	.word	.LANCHOR52
 	.cfi_endproc
 .LFE286:
@@ -18112,62 +18185,62 @@ Ftl_gc_temp_data_write_back:
 	.cfi_offset 14, -4
 	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1508
+	ldr	r4, .L1506
 	.loc 5 321 0
 	movs	r6, #0
 	.loc 5 322 0
 	movs	r7, #20
 	.loc 5 320 0
 	mov	r2, r3
-	ldr	r5, .L1508+4
+	ldr	r5, .L1506+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.LVL1699:
-.L1502:
+.LVL1703:
+.L1500:
 	.loc 5 321 0 discriminator 1
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1505
+	bhi	.L1503
 	.loc 5 335 0
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-.LVL1700:
+.LVL1704:
 	.loc 5 337 0
-	ldr	r3, .L1508+8
+	ldr	r3, .L1506+8
 	.loc 5 336 0
 	movs	r0, #0
 	str	r0, [r4]
 	.loc 5 337 0
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1501
+	cbnz	r3, .L1499
 	.loc 5 338 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1701:
-	b	.L1507
-.L1505:
+.LVL1705:
+	b	.L1505
+.L1503:
 	.loc 5 322 0
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
-.LVL1702:
+.LVL1706:
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1503
+	bne	.L1501
 	.loc 5 323 0
-	ldr	r3, .L1508+8
+	ldr	r3, .L1506+8
 	movs	r5, #0
-	ldr	r0, .L1508+12
+	ldr	r0, .L1506+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	.loc 5 324 0
 	strh	r2, [r3]	@ movhi
 	.loc 5 325 0
-	ldr	r2, .L1508+16
+	ldr	r2, .L1506+16
 	.loc 5 326 0
 	ldr	r0, [r1, #4]
 	.loc 5 325 0
@@ -18179,38 +18252,38 @@ Ftl_gc_temp_data_write_back:
 	str	r3, [r2, #96]
 	.loc 5 326 0
 	bl	FtlBbmMapBadBlock
-.LVL1703:
+.LVL1707:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1704:
+.LVL1708:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1705:
-.L1507:
+.LVL1709:
+.L1505:
 	.loc 5 339 0
 	movs	r0, #1
-.L1501:
+.L1499:
 	.loc 5 342 0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1503:
+.L1501:
 	.loc 5 331 0 discriminator 2
 	ldr	r3, [r1, #12]
-.LVL1706:
+.LVL1710:
 	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1707:
-	b	.L1502
-.L1509:
+.LVL1711:
+	b	.L1500
+.L1507:
 	.align	2
-.L1508:
-	.word	.LANCHOR91
+.L1506:
+	.word	.LANCHOR89
 	.word	.LANCHOR121
 	.word	.LANCHOR53
-	.word	.LANCHOR43
-	.word	.LANCHOR83
+	.word	.LANCHOR42
+	.word	.LANCHOR81
 	.cfi_endproc
 .LFE316:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -18236,50 +18309,47 @@ Ftl_get_new_temp_ppa:
 	.cfi_offset 14, -4
 	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1513
+	ldr	r4, .L1511
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1511
+	beq	.L1509
 	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1512
-.L1511:
-	.loc 5 302 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL1708:
-	.loc 5 303 0
+	cbnz	r3, .L1510
+.L1509:
+	.loc 5 303 0 is_stmt 1
 	movs	r0, #0
 	.loc 5 304 0
 	movs	r5, #0
 	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1709:
+.LVL1712:
 	.loc 5 305 0
-	ldr	r0, .L1513
+	ldr	r0, .L1511
 	.loc 5 304 0
 	strb	r5, [r4, #8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1710:
+.LVL1713:
 	.loc 5 306 0
-	ldr	r3, .L1513+4
+	ldr	r3, .L1511+4
 	strh	r5, [r3]	@ movhi
 	.loc 5 307 0
-	ldr	r3, .L1513+8
+	ldr	r3, .L1511+8
 	strh	r5, [r3]	@ movhi
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1711:
+.LVL1714:
 	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1712:
+.LVL1715:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1713:
-.L1512:
+.LVL1716:
+.L1510:
 	.loc 5 312 0
-	ldr	r0, .L1513
+	ldr	r0, .L1511
 	.loc 5 313 0
 	pop	{r3, r4, r5, lr}
 	.cfi_restore 14
@@ -18289,13 +18359,13 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa_offset 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1714:
-.L1514:
+.LVL1717:
+.L1512:
 	.align	2
-.L1513:
+.L1511:
 	.word	.LANCHOR53
-	.word	.LANCHOR98
-	.word	.LANCHOR99
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.cfi_endproc
 .LFE315:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
@@ -18313,9 +18383,9 @@ rk_ftl_garbage_collect:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1715:
+.LVL1718:
 	.loc 5 478 0
-	ldr	r3, .L1633
+	ldr	r3, .L1631
 	.loc 5 470 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -18332,36 +18402,36 @@ rk_ftl_garbage_collect:
 	.cfi_def_cfa_offset 80
 	.loc 5 478 0
 	ldr	r0, [r3]
-.LVL1716:
+.LVL1719:
 	cmp	r0, #0
-	bne	.L1590
+	bne	.L1588
 	.loc 5 481 0
-	ldr	r3, .L1633+4
+	ldr	r3, .L1631+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1515
+	bls	.L1513
 	.loc 5 485 0
-	ldr	r3, .L1633+8
+	ldr	r3, .L1631+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1517
-.LVL1717:
-.L1520:
-.LBB291:
-.LBB292:
+	bne	.L1515
+.LVL1720:
+.L1518:
+.LBB324:
+.LBB325:
 	.loc 5 489 0
-	ldr	r3, .L1633+12
+	ldr	r3, .L1631+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1518
-.L1519:
+	bne	.L1516
+.L1517:
 	.loc 5 496 0
-	ldr	r2, .L1633+16
+	ldr	r2, .L1631+16
 	.loc 5 497 0
 	movw	r5, #65535
-	ldr	r6, .L1633+20
+	ldr	r6, .L1631+20
 	.loc 5 496 0
 	ldr	r3, [r2]
 	.loc 5 497 0
@@ -18374,17 +18444,17 @@ rk_ftl_garbage_collect:
 	.loc 5 496 0
 	str	r3, [r2]
 	.loc 5 497 0
-	bne	.L1521
-	ldr	r1, .L1633+24
+	bne	.L1519
+	ldr	r1, .L1631+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1522
-	ldr	r0, .L1633+28
+	bne	.L1520
+	ldr	r0, .L1631+28
 	ldrh	r10, [r0]
 	cmp	r10, r1
-	bne	.L1523
+	bne	.L1521
 	.loc 5 498 0
-	ldr	r1, .L1633+32
+	ldr	r1, .L1631+32
 	ldrh	r0, [r1]
 	mov	r8, r1
 	cmp	r0, #24
@@ -18392,10 +18462,10 @@ rk_ftl_garbage_collect:
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1523
-.LBB293:
+	bls	.L1521
+.LBB326:
 	.loc 5 502 0
-	ldr	r3, .L1633+36
+	ldr	r3, .L1631+36
 	.loc 5 501 0
 	movs	r4, #0
 	str	r4, [r2]
@@ -18403,152 +18473,152 @@ rk_ftl_garbage_collect:
 	strh	r4, [r3]	@ movhi
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1718:
+.LVL1721:
 	.loc 5 504 0
 	cmp	r0, r10
 	.loc 5 503 0
 	mov	r5, r0
-.LVL1719:
+.LVL1722:
 	.loc 5 504 0
-	bne	.L1594
+	bne	.L1592
 	.loc 5 505 0
-	ldr	r10, .L1633+96
+	ldr	r10, .L1631+96
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcs	.L1526
+	bcs	.L1524
 	.loc 5 506 0
 	movs	r0, #64
-.LVL1720:
+.LVL1723:
 	bl	List_get_gc_head_node
-.LVL1721:
+.LVL1724:
 	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1528
+	beq	.L1526
 	.loc 5 508 0
 	mov	r0, r3
-	ldr	r3, .L1633+40
+	ldr	r3, .L1631+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1529
+	bhi	.L1527
 	.loc 5 509 0
 	mov	r0, r4
-.LVL1722:
+.LVL1725:
 	bl	List_get_gc_head_node
-.LVL1723:
+.LVL1726:
 	uxth	r4, r0
-.LVL1724:
+.LVL1727:
 	.loc 5 510 0
 	movs	r3, #128
 	strh	r3, [r10]	@ movhi
 	.loc 5 520 0
 	cmp	r4, r5
-	bne	.L1525
-.LVL1725:
-.L1528:
+	bne	.L1523
+.LVL1728:
+.L1526:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1726:
-.LBE293:
+.LVL1729:
+.LBE326:
 	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1531
+	bne	.L1529
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1531
-.LVL1727:
-.L1588:
+	bne	.L1529
+.LVL1730:
+.L1586:
 	.loc 5 528 0
-	ldr	r3, .L1633+32
+	ldr	r3, .L1631+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1595
-	ldr	r2, .L1633+44
+	bhi	.L1593
+	ldr	r2, .L1631+44
 	.loc 5 530 0
 	cmp	r3, #16
 	.loc 5 531 0
 	ldrh	r4, [r2]
 	.loc 5 530 0
-	bls	.L1533
+	bls	.L1531
 	.loc 5 531 0
 	lsrs	r4, r4, #5
-.LVL1728:
-.L1532:
+.LVL1731:
+.L1530:
 	.loc 5 539 0
-	ldr	r2, .L1633+48
+	ldr	r2, .L1631+48
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1536
+	bcs	.L1534
 	.loc 5 540 0
-	ldr	r3, .L1633+24
+	ldr	r3, .L1631+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1537
-	ldr	r0, .L1633+28
+	bne	.L1535
+	ldr	r0, .L1631+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1537
+	bne	.L1535
 	.loc 5 542 0
-	ldr	r3, .L1633+36
+	ldr	r3, .L1631+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1538
-	ldr	r3, .L1633+52
-	ldr	r4, .L1633+56
-.LVL1729:
+	cbnz	r0, .L1536
+	ldr	r3, .L1631+52
+	ldr	r4, .L1631+56
+.LVL1732:
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1539
-.L1538:
+	bcs	.L1537
+.L1536:
 	.loc 5 543 0
-	ldr	r3, .L1633+60
+	ldr	r3, .L1631+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1540:
+.L1538:
 	.loc 5 546 0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1631+64
 	movs	r2, #0
 	str	r2, [r3]
-.LVL1730:
-.L1515:
-.LBE292:
-.LBE291:
-	.loc 5 758 0
+.LVL1733:
+.L1513:
+.LBE325:
+.LBE324:
+	.loc 5 754 0
 	add	sp, sp, #48
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1731:
-.L1517:
+.LVL1734:
+.L1515:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
-	ldr	r2, .L1633+24
+	ldr	r2, .L1631+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1520
+	beq	.L1518
 	.loc 5 486 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1732:
+.LVL1735:
 	cmp	r0, #0
-	beq	.L1520
+	beq	.L1518
 	.loc 5 487 0
 	movs	r0, #1
-	b	.L1515
-.LVL1733:
-.L1518:
-.LBB297:
-.LBB295:
+	b	.L1513
+.LVL1736:
+.L1516:
+.LBB330:
+.LBB328:
 	.loc 5 489 0
-	ldr	r1, .L1633+28
+	ldr	r1, .L1631+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	.loc 5 490 0
@@ -18556,912 +18626,909 @@ rk_ftl_garbage_collect:
 	strheq	r0, [r1]	@ movhi
 	.loc 5 491 0
 	strheq	r2, [r3]	@ movhi
-	b	.L1519
-.LVL1734:
-.L1529:
-.LBB294:
+	b	.L1517
+.LVL1737:
+.L1527:
+.LBB327:
 	.loc 5 512 0
 	movs	r3, #64
-.LVL1735:
-.L1627:
+.LVL1738:
+.L1625:
 	.loc 5 516 0
 	strh	r3, [r10]	@ movhi
-	b	.L1528
-.LVL1736:
-.L1526:
+	b	.L1526
+.LVL1739:
+.L1524:
 	movs	r3, #80
-	b	.L1627
-.L1594:
+	b	.L1625
+.L1592:
 	.loc 5 504 0
 	mov	r4, r0
-.LVL1737:
-.L1525:
+.LVL1740:
+.L1523:
 	.loc 5 521 0
-	ldr	r3, .L1633+40
+	ldr	r3, .L1631+40
 	mov	r5, r4
-	ldr	r1, .L1633+48
+	ldr	r1, .L1631+48
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1633+68
+	ldr	r0, .L1631+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1633+72
+	ldr	r1, .L1631+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-.LVL1738:
-	b	.L1528
-.LVL1739:
-.L1533:
-.LBE294:
+.LVL1741:
+	b	.L1526
+.LVL1742:
+.L1531:
+.LBE327:
 	.loc 5 532 0
 	cmp	r3, #12
-	bls	.L1534
+	bls	.L1532
 	.loc 5 533 0
 	lsrs	r4, r4, #4
-.LVL1740:
-	b	.L1532
-.LVL1741:
-.L1534:
+.LVL1743:
+	b	.L1530
+.LVL1744:
+.L1532:
 	.loc 5 534 0
 	cmp	r3, #8
-	bls	.L1532
+	bls	.L1530
 	.loc 5 535 0
 	lsrs	r4, r4, #2
-.LVL1742:
-	b	.L1532
-.LVL1743:
-.L1595:
+.LVL1745:
+	b	.L1530
+.LVL1746:
+.L1593:
 	.loc 5 529 0
 	movs	r4, #1
-	b	.L1532
-.L1539:
+	b	.L1530
+.L1537:
 	.loc 5 545 0
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1540
-.LVL1744:
-.L1537:
+	b	.L1538
+.LVL1747:
+.L1535:
 	.loc 5 549 0
-	ldr	r3, .L1633+60
+	ldr	r3, .L1631+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1536:
+.L1534:
 	.loc 5 551 0
-	ldr	r3, .L1633+76
+	ldr	r3, .L1631+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1596
+	cbz	r3, .L1594
 	.loc 5 552 0
 	adds	r4, r4, #32
-.LVL1745:
+.LVL1748:
 	uxth	r4, r4
-.LVL1746:
-.L1596:
+.LVL1749:
+.L1594:
 	.loc 5 551 0
 	movw	r5, #65535
-.LVL1747:
-.L1542:
-	.loc 5 597 0
+.LVL1750:
+.L1540:
+	.loc 5 595 0
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1551
-	.loc 5 598 0
+	bne	.L1549
+	.loc 5 596 0
 	cmp	r5, r3
-	beq	.L1552
-	.loc 5 599 0
+	beq	.L1550
+	.loc 5 597 0
 	strh	r5, [r6]	@ movhi
-.LVL1748:
-.L1553:
-	.loc 5 611 0
+.LVL1751:
+.L1551:
+	.loc 5 607 0
 	ldrh	r0, [r6]
 	movw	r7, #65535
-	.loc 5 610 0
+	.loc 5 606 0
 	movs	r3, #0
 	strb	r3, [r6, #8]
-	.loc 5 611 0
+	.loc 5 607 0
 	cmp	r0, r7
-	beq	.L1551
-	.loc 5 612 0
+	beq	.L1549
+	.loc 5 608 0
 	bl	IsBlkInGcList
-.LVL1749:
-	cbz	r0, .L1556
-	.loc 5 613 0
+.LVL1752:
+	cbz	r0, .L1554
+	.loc 5 609 0
 	strh	r7, [r6]	@ movhi
-.L1556:
-	.loc 5 615 0
+.L1554:
+	.loc 5 611 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1551
-	.loc 5 616 0
-	ldr	r0, .L1633+20
+	beq	.L1549
+	.loc 5 612 0
+	ldr	r0, .L1631+20
 	bl	make_superblock
-.LVL1750:
-	.loc 5 619 0
-	ldr	r2, .L1633+80
-	.loc 5 617 0
+.LVL1753:
+	.loc 5 615 0
+	ldr	r2, .L1631+80
+	.loc 5 613 0
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
-	.loc 5 618 0
+	.loc 5 614 0
 	strb	r3, [r6, #6]
-	.loc 5 619 0
+	.loc 5 615 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 620 0
-	ldr	r3, .L1633+40
+	.loc 5 616 0
+	ldr	r3, .L1631+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1633+84
+	ldr	r3, .L1631+84
 	strh	r2, [r3]	@ movhi
-.L1551:
-	.loc 5 625 0
-	ldr	r2, .L1633+88
+.L1549:
+	.loc 5 621 0
+	ldr	r2, .L1631+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	ldr	r2, .L1633+92
+	beq	.L1555
+	ldr	r2, .L1631+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1557
-	.loc 5 631 0
-	ldr	r6, .L1633+20
+	beq	.L1555
+	.loc 5 627 0
+	ldr	r6, .L1631+20
 	mov	fp, r6
-.L1558:
+.L1556:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1559
-	.loc 5 635 0
-	ldr	r8, .L1633+100
-	.loc 5 632 0
+	bne	.L1557
+	.loc 5 631 0
+	ldr	r8, .L1631+100
+	.loc 5 628 0
 	movs	r2, #0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1631+64
 	str	r2, [r3]
-.L1560:
-	.loc 5 635 0
+.L1558:
+	.loc 5 631 0
 	ldrh	r7, [r8]
 	mov	r0, r7
 	bl	List_get_gc_head_node
-.LVL1751:
+.LVL1754:
 	uxth	r3, r0
-	.loc 5 636 0
+	.loc 5 632 0
 	movw	r1, #65535
 	cmp	r3, r1
-	.loc 5 635 0
+	.loc 5 631 0
 	strh	r3, [fp]	@ movhi
-	.loc 5 636 0
-	bne	.L1561
-	.loc 5 637 0
+	.loc 5 632 0
+	bne	.L1559
+	.loc 5 633 0
 	movs	r3, #0
-	.loc 5 638 0
+	.loc 5 634 0
 	movs	r0, #8
-	.loc 5 637 0
+	.loc 5 633 0
 	strh	r3, [r8]	@ movhi
-	b	.L1515
-.LVL1752:
-.L1543:
+	b	.L1513
+.LVL1755:
+.L1541:
 	.loc 5 558 0
-	ldr	r3, .L1633+64
+	ldr	r3, .L1631+64
 	movs	r2, #0
 	.loc 5 560 0
-	ldr	r1, .L1633+48
-	ldr	r4, .L1633+32
+	ldr	r1, .L1631+48
+	ldr	r4, .L1631+32
 	.loc 5 558 0
 	str	r2, [r3]
 	.loc 5 560 0
 	ldrh	r3, [r1]
 	mov	r2, r1
 	ldrh	r8, [r4]
-	ldr	r5, .L1633+36
+	ldr	r5, .L1631+36
 	cmp	r3, r8
-	bcs	.L1544
+	bcs	.L1542
 	.loc 5 561 0
 	ldrh	r3, [r5]
-	cbnz	r3, .L1545
-	ldr	r3, .L1633+52
-	ldr	r0, .L1633+56
+	cbnz	r3, .L1543
+	ldr	r3, .L1631+52
+	ldr	r0, .L1631+56
 	ldr	r3, [r3]
 	ldr	r0, [r0]
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcs	.L1546
-.L1545:
+	bcs	.L1544
+.L1543:
 	.loc 5 562 0
-	ldr	r3, .L1633+60
+	ldr	r3, .L1631+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.LVL1753:
-.L1630:
+.LVL1756:
+.L1628:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1754:
+.LVL1757:
 	.loc 5 579 0
 	ldrh	r0, [r5]
-	b	.L1515
-.L1634:
+	b	.L1513
+.L1632:
 	.align	2
-.L1633:
+.L1631:
 	.word	.LANCHOR117
 	.word	.LANCHOR45
-	.word	.LANCHOR157
-	.word	.LANCHOR102
-	.word	.LANCHOR86
-	.word	.LANCHOR82
+	.word	.LANCHOR156
+	.word	.LANCHOR100
+	.word	.LANCHOR84
+	.word	.LANCHOR80
 	.word	.LANCHOR53
-	.word	.LANCHOR101
+	.word	.LANCHOR99
 	.word	.LANCHOR48
-	.word	.LANCHOR174
-	.word	.LANCHOR43
+	.word	.LANCHOR172
+	.word	.LANCHOR42
 	.word	.LANCHOR19
-	.word	.LANCHOR84
-	.word	.LANCHOR62
-	.word	.LANCHOR60
-	.word	.LANCHOR80
-	.word	.LANCHOR89
-	.word	.LC104
-	.word	.LANCHOR40
-	.word	.LANCHOR103
-	.word	.LANCHOR175
-	.word	.LANCHOR176
+	.word	.LANCHOR82
+	.word	.LANCHOR61
+	.word	.LANCHOR59
+	.word	.LANCHOR78
+	.word	.LANCHOR87
+	.word	.LC107
+	.word	.LANCHOR43
+	.word	.LANCHOR101
+	.word	.LANCHOR173
+	.word	.LANCHOR174
 	.word	.LANCHOR51
 	.word	.LANCHOR52
+	.word	.LANCHOR83
 	.word	.LANCHOR85
-	.word	.LANCHOR87
-.LVL1755:
-.L1546:
+.LVL1758:
+.L1544:
 	.loc 5 564 0
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1630
-.L1544:
+	b	.L1628
+.L1542:
 	.loc 5 572 0
 	ldrh	r0, [r5]
 	cmp	r0, #0
-	bne	.L1548
+	bne	.L1546
 	.loc 5 573 0
-	ldr	r3, .L1635
+	ldr	r3, .L1633
 	ldrh	r7, [r3]
-.LVL1756:
+.LVL1759:
 	add	r2, r7, r7, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r1]	@ movhi
 	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1757:
+.LVL1760:
 	.loc 5 575 0
-	ldr	r3, .L1635+4
+	ldr	r3, .L1633+4
 	uxth	r0, r0
-	ldr	r2, .L1635+8
+	ldr	r2, .L1633+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1635+12
+	ldr	r3, .L1633+12
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1549
+	ble	.L1547
 	.loc 5 576 0
 	subs	r3, r7, #1
 	.loc 5 575 0
 	cmp	r8, r3
-	bge	.L1630
-.L1549:
+	bge	.L1628
+.L1547:
 	.loc 5 584 0
 	cmp	r1, #0
-	bne	.L1548
+	bne	.L1546
 	.loc 5 585 0
 	movw	r0, #65535
-.LVL1758:
+.LVL1761:
 	bl	decrement_vpc_count
-.LVL1759:
+.LVL1762:
 	.loc 5 586 0
 	ldrh	r0, [r4]
 	adds	r0, r0, #1
-	b	.L1515
-.LVL1760:
-.L1552:
-	.loc 5 600 0
-	ldr	r3, .L1635+16
+	b	.L1513
+.LVL1763:
+.L1550:
+	.loc 5 598 0
+	ldr	r3, .L1633+16
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1553
-	.loc 5 604 0
-	ldr	r1, .L1635+4
+	beq	.L1551
+	.loc 5 600 0
+	ldr	r1, .L1633+4
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1554
-	.loc 5 605 0
+	cbnz	r2, .L1552
+	.loc 5 601 0
 	strh	r5, [r3]	@ movhi
-.L1554:
-	.loc 5 606 0
+.L1552:
+	.loc 5 602 0
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
-	.loc 5 607 0
+	.loc 5 603 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1553
-.LVL1761:
-.L1557:
-	.loc 5 626 0
+	b	.L1551
+.LVL1764:
+.L1555:
+	.loc 5 622 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.LVL1762:
-.L1631:
-	.loc 5 652 0
-	ldr	r3, .L1635+20
+.LVL1765:
+.L1629:
+	.loc 5 648 0
+	ldr	r3, .L1633+20
 	ldrh	r0, [r3]
-	b	.L1515
-.LVL1763:
-.L1561:
+	b	.L1513
+.LVL1766:
+.L1559:
 	str	r0, [sp, #16]
-	.loc 5 640 0
+	.loc 5 636 0
 	mov	r0, r3
 	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-.LVL1764:
+.LVL1767:
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1562
-	.loc 5 641 0
+	cbz	r0, .L1560
+	.loc 5 637 0
 	strh	r7, [r8]	@ movhi
-	b	.L1560
-.L1562:
-	.loc 5 645 0
+	b	.L1558
+.L1560:
+	.loc 5 641 0
 	uxth	r0, r2
-	ldr	r2, .L1635+24
-	ldr	r10, .L1635+4
-	.loc 5 644 0
+	ldr	r2, .L1633+24
+	ldr	r10, .L1633+4
+	.loc 5 640 0
 	uxth	r7, r7
-	.loc 5 645 0
+	.loc 5 641 0
 	ldrh	lr, [r2]
-	ldr	r2, .L1635+8
+	ldr	r2, .L1633+8
 	ldr	r1, [r10]
-	.loc 5 644 0
+	.loc 5 640 0
 	strh	r7, [r8]	@ movhi
-	.loc 5 645 0
+	.loc 5 641 0
 	ldrh	r2, [r2]
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	lr, r2, lr
 	cmp	ip, lr, asr #1
-	bgt	.L1564
-	.loc 5 646 0
+	bgt	.L1562
+	.loc 5 642 0
 	cmp	r7, #48
-	bls	.L1565
+	bls	.L1563
 	cmp	ip, #8
-	bls	.L1565
-	ldr	r7, .L1635+28
+	bls	.L1563
+	ldr	r7, .L1633+28
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1565
-.L1564:
-	.loc 5 647 0
-	ldr	r2, .L1635+32
+	bhi	.L1563
+.L1562:
+	.loc 5 643 0
+	ldr	r2, .L1633+32
 	movs	r7, #0
 	strh	r7, [r2]	@ movhi
-.L1565:
-	.loc 5 649 0
+.L1563:
+	.loc 5 645 0
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	lr, r1
-	bgt	.L1566
+	bgt	.L1564
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1566
-	.loc 5 651 0
-	ldr	r2, .L1635+32
+	bne	.L1564
+	.loc 5 647 0
+	ldr	r2, .L1633+32
 	movs	r3, #0
-	.loc 5 650 0
+	.loc 5 646 0
 	strh	r5, [fp]	@ movhi
-	.loc 5 651 0
+	.loc 5 647 0
 	strh	r3, [r2]	@ movhi
-	b	.L1631
-.L1566:
-	.loc 5 655 0
-	cbnz	r1, .L1567
-	.loc 5 656 0
+	b	.L1629
+.L1564:
+	.loc 5 651 0
+	cbnz	r1, .L1565
+	.loc 5 652 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1765:
-	.loc 5 657 0
-	ldr	r3, .L1635+32
-	ldr	r2, .L1635+32
+.LVL1768:
+	.loc 5 653 0
+	ldr	r3, .L1633+32
+	ldr	r2, .L1633+32
 	ldrh	r3, [r3]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1560
-.L1567:
-	.loc 5 660 0
+	b	.L1558
+.L1565:
+	.loc 5 656 0
 	movs	r2, #0
 	strb	r2, [fp, #8]
-	.loc 5 662 0
-	ldr	r2, .L1635+36
+	.loc 5 658 0
+	ldr	r2, .L1633+36
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1568
-	movw	r2, #662
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1566
+	movw	r2, #658
+	ldr	r1, .L1633+40
+	ldr	r0, .L1633+44
 	bl	printf
-.LVL1766:
-.L1568:
-	.loc 5 663 0
-	ldr	r3, .L1635+48
+.LVL1769:
+.L1566:
+	.loc 5 659 0
+	ldr	r3, .L1633+48
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1569
-	movw	r2, #663
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1567
+	movw	r2, #659
+	ldr	r1, .L1633+40
+	ldr	r0, .L1633+44
 	bl	printf
-.LVL1767:
-.L1569:
-	.loc 5 664 0
-	ldr	r3, .L1635+52
+.LVL1770:
+.L1567:
+	.loc 5 660 0
+	ldr	r3, .L1633+52
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1570
-	mov	r2, #664
-	ldr	r1, .L1635+40
-	ldr	r0, .L1635+44
+	bne	.L1568
+	mov	r2, #660
+	ldr	r1, .L1633+40
+	ldr	r0, .L1633+44
 	bl	printf
-.LVL1768:
-.L1570:
-	.loc 5 665 0
+.LVL1771:
+.L1568:
+	.loc 5 661 0
 	mov	r0, r6
 	bl	make_superblock
-.LVL1769:
-	.loc 5 666 0
-	ldr	r2, .L1635+56
+.LVL1772:
+	.loc 5 662 0
+	ldr	r2, .L1633+56
 	movs	r3, #0
-	.loc 5 667 0
+	.loc 5 663 0
 	ldrh	r1, [fp]
-	.loc 5 666 0
+	.loc 5 662 0
 	strh	r3, [r2]	@ movhi
-	.loc 5 667 0
+	.loc 5 663 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1635+60
-	.loc 5 668 0
+	ldr	r2, .L1633+60
+	.loc 5 664 0
 	strh	r3, [fp, #2]	@ movhi
-	.loc 5 669 0
+	.loc 5 665 0
 	strb	r3, [fp, #6]
-	.loc 5 667 0
+	.loc 5 663 0
 	strh	r1, [r2]	@ movhi
-.L1559:
-	.loc 5 675 0
+.L1557:
+	.loc 5 671 0
 	bl	FtlReadRefresh
-.LVL1770:
-	.loc 5 678 0
-	ldr	r3, .L1635+64
+.LVL1773:
+	.loc 5 674 0
+	ldr	r3, .L1633+64
 	movs	r2, #1
 	str	r2, [r3]
-	.loc 5 679 0
-	ldr	r3, .L1635+24
+	.loc 5 675 0
+	ldr	r3, .L1633+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL1771:
-	.loc 5 680 0
+.LVL1774:
+	.loc 5 676 0
 	ldrh	r3, [fp, #2]
 	ldr	r1, [sp, #28]
 	adds	r2, r3, r4
 	cmp	r2, r1
-	.loc 5 681 0
+	.loc 5 677 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
-.LVL1772:
-	.loc 5 693 0
+.LVL1775:
+	.loc 5 689 0
 	mov	r3, #0
-	.loc 5 681 0
+	.loc 5 677 0
 	it	gt
 	uxthgt	r4, r4
-.LVL1773:
-.L1629:
+.LVL1776:
+.L1627:
 	str	r3, [sp, #24]
-.LVL1774:
-	.loc 5 683 0
+.LVL1777:
+	.loc 5 679 0
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1580
-	.loc 5 685 0
-	ldr	r3, .L1635+8
-	.loc 5 687 0
+	bls	.L1578
+	.loc 5 681 0
+	ldr	r3, .L1633+8
+	.loc 5 683 0
 	movw	r10, #65535
-	.loc 5 688 0
+	.loc 5 684 0
 	ldrh	r8, [r6, #2]
-	ldr	r1, .L1635+68
-	.loc 5 685 0
+	ldr	r1, .L1633+68
+	.loc 5 681 0
 	ldrh	ip, [r3]
-	.loc 5 688 0
-	ldr	r3, .L1635+72
+	.loc 5 684 0
+	ldr	r3, .L1633+72
 	ldr	r0, [r3]
 	ldr	r3, [sp, #24]
 	add	r8, r8, r3
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1581
-.LVL1775:
-.L1574:
-	.loc 5 686 0
+	b	.L1579
+.LVL1778:
+.L1572:
+	.loc 5 682 0
 	ldrh	r2, [r1, #2]!
-.LVL1776:
-	.loc 5 687 0
+.LVL1779:
+	.loc 5 683 0
 	cmp	r2, r10
-	beq	.L1573
-	.loc 5 688 0
+	beq	.L1571
+	.loc 5 684 0
 	ldr	r7, [sp, #12]
 	mov	lr, #20
 	orr	r2, r8, r2, lsl #10
-.LVL1777:
+.LVL1780:
 	mla	lr, lr, r7, r0
 	str	r2, [lr, #4]
-	.loc 5 689 0
+	.loc 5 685 0
 	mov	r2, r7
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1778:
-.L1573:
+.LVL1781:
+.L1571:
 	adds	r3, r3, #1
-.LVL1779:
-.L1581:
-	.loc 5 685 0
+.LVL1782:
+.L1579:
+	.loc 5 681 0
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1574
-	.loc 5 693 0
+	bhi	.L1572
+	.loc 5 689 0
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1780:
+.LVL1783:
 	movs	r3, #0
-.LVL1781:
-.L1628:
+.LVL1784:
+.L1626:
 	str	r3, [sp, #20]
-.LVL1782:
-	.loc 5 695 0
+.LVL1785:
+	.loc 5 691 0
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1579
-.LVL1783:
+	bhi	.L1577
+.LVL1786:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1629
-.L1636:
+	b	.L1627
+.L1634:
 	.align	2
-.L1635:
-	.word	.LANCHOR80
-	.word	.LANCHOR43
+.L1633:
+	.word	.LANCHOR78
+	.word	.LANCHOR42
 	.word	.LANCHOR3
 	.word	.LANCHOR20
-	.word	.LANCHOR101
-	.word	.LANCHOR174
+	.word	.LANCHOR99
+	.word	.LANCHOR172
 	.word	.LANCHOR19
-	.word	.LANCHOR98
-	.word	.LANCHOR87
+	.word	.LANCHOR96
+	.word	.LANCHOR85
 	.word	.LANCHOR51
-	.word	.LANCHOR177
+	.word	.LANCHOR175
 	.word	.LC1
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR175
-	.word	.LANCHOR176
+	.word	.LANCHOR173
+	.word	.LANCHOR174
 	.word	.LANCHOR117
-	.word	.LANCHOR82+14
-	.word	.LANCHOR95
-.LVL1784:
-.L1579:
+	.word	.LANCHOR80+14
+	.word	.LANCHOR93
+.LVL1787:
+.L1577:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
-	.loc 5 696 0
-	ldr	r3, .L1637
+	.loc 5 692 0
+	ldr	r3, .L1635
 	ldr	r3, [r3]
 	adds	r2, r3, r7
-.LVL1785:
-	.loc 5 697 0
+.LVL1788:
+	.loc 5 693 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1576
-	.loc 5 696 0
+	beq	.L1574
+	.loc 5 692 0
 	ldr	r3, [r2, #12]
-	.loc 5 697 0
+	.loc 5 693 0
 	ldrh	r2, [r3]
-.LVL1786:
-	.loc 5 696 0
+.LVL1789:
+	.loc 5 692 0
 	str	r3, [sp, #16]
-	.loc 5 697 0
+	.loc 5 693 0
 	movw	r3, #61589
-.LVL1787:
+.LVL1790:
 	cmp	r2, r3
-	bne	.L1576
-	.loc 5 699 0
+	bne	.L1574
+	.loc 5 695 0
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
-.LVL1788:
-	.loc 5 700 0
+.LVL1791:
+	.loc 5 696 0
 	cmp	r8, #-1
-	bne	.L1577
-	mov	r2, #700
-	ldr	r1, .L1637+4
-	ldr	r0, .L1637+8
+	bne	.L1575
+	mov	r2, #696
+	ldr	r1, .L1635+4
+	ldr	r0, .L1635+8
 	bl	printf
-.LVL1789:
-.L1577:
-	.loc 5 701 0
+.LVL1792:
+.L1575:
+	.loc 5 697 0
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-.LVL1790:
-	.loc 5 702 0
-	ldr	r3, .L1637
+.LVL1793:
+	.loc 5 698 0
+	ldr	r3, .L1635
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1576
-	.loc 5 704 0
-	ldr	r2, .L1637+12
-	.loc 5 705 0
+	bne	.L1574
+	.loc 5 700 0
+	ldr	r2, .L1635+12
+	.loc 5 701 0
 	mov	r10, #20
-	ldr	r8, .L1637+36
-.LVL1791:
+	ldr	r8, .L1635+36
+.LVL1794:
 	ldr	r1, [r1, #16]
-	.loc 5 704 0
+	.loc 5 700 0
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	.loc 5 705 0
-	ldr	r2, .L1637+16
+	.loc 5 701 0
+	ldr	r2, .L1635+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
 	mla	r3, r10, r3, r0
 	str	r1, [r3, #16]
 	str	r3, [sp, #32]
-	.loc 5 706 0
+	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1792:
+.LVL1795:
 	ldr	r3, [sp, #32]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	r2, [sp, #36]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	r1, [sp, #16]
-	.loc 5 706 0
+	.loc 5 702 0
 	str	r0, [r3, #4]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1637
-	.loc 5 715 0
+	ldr	r2, .L1635
+	.loc 5 711 0
 	adds	r3, r3, #1
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	r0, [r2]
 	add	r0, r0, r7
-	.loc 5 710 0
-	ldr	r7, .L1637+20
-	.loc 5 707 0
+	.loc 5 706 0
+	ldr	r7, .L1635+20
+	.loc 5 703 0
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
-	.loc 5 708 0
+	.loc 5 704 0
 	ldr	r2, [r0, #12]
 	str	r2, [r10, #12]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	r2, [sp, #44]
 	str	r2, [r1, #12]
-	.loc 5 710 0
+	.loc 5 706 0
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
-	.loc 5 713 0
-	ldr	r2, .L1637+24
-	.loc 5 715 0
+	.loc 5 709 0
+	ldr	r2, .L1635+24
+	.loc 5 711 0
 	str	r3, [r8]
-	.loc 5 713 0
+	.loc 5 709 0
 	ldr	r2, [r2]
 	str	r2, [r1, #4]
-	.loc 5 716 0
+	.loc 5 712 0
 	movs	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1793:
-	.loc 5 717 0
+.LVL1796:
+	.loc 5 713 0
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1578
+	beq	.L1576
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1576
-.L1578:
-	.loc 5 718 0
+	cbnz	r3, .L1574
+.L1576:
+	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1794:
-	cbz	r0, .L1576
-.LVL1795:
-.L1632:
-	.loc 5 733 0
-	ldr	r3, .L1637+28
+.LVL1797:
+	cbz	r0, .L1574
+.LVL1798:
+.L1630:
+	.loc 5 729 0
+	ldr	r3, .L1635+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1631
-.LVL1796:
-.L1576:
+	b	.L1629
+.LVL1799:
+.L1574:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1628
-.LVL1797:
-.L1580:
-	.loc 5 727 0
+	b	.L1626
+.LVL1800:
+.L1578:
+	.loc 5 723 0
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-.LVL1798:
-	.loc 5 729 0
+.LVL1801:
+	.loc 5 725 0
 	ldr	r3, [sp, #28]
-	.loc 5 727 0
+	.loc 5 723 0
 	uxth	r4, r4
-	.loc 5 729 0
+	.loc 5 725 0
 	cmp	r3, r4
-	.loc 5 727 0
+	.loc 5 723 0
 	strh	r4, [r6, #2]	@ movhi
-	.loc 5 729 0
-	bls	.L1582
-	ldr	r3, .L1637+12
+	.loc 5 725 0
+	bls	.L1580
+	ldr	r3, .L1635+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1637+32
+	ldr	r3, .L1635+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1583
-.L1582:
-	.loc 5 731 0
-	ldr	r3, .L1637+36
+	bne	.L1581
+.L1580:
+	.loc 5 727 0
+	ldr	r3, .L1635+36
 	ldr	r3, [r3]
-	cbz	r3, .L1584
-	.loc 5 732 0
+	cbz	r3, .L1582
+	.loc 5 728 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1799:
+.LVL1802:
 	cmp	r0, #0
-	bne	.L1632
-.L1584:
-	.loc 5 737 0
-	ldr	r3, .L1637+12
+	bne	.L1630
+.L1582:
+	.loc 5 733 0
+	ldr	r3, .L1635+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1585
-	ldr	r3, .L1637+40
+	cbnz	r1, .L1583
+	ldr	r3, .L1635+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1585
-	.loc 5 739 0
+	cbz	r0, .L1583
+	.loc 5 735 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	.loc 5 740 0
+	.loc 5 736 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
-.LVL1800:
-	.loc 5 741 0
-	bl	FtlCacheWriteBack
-.LVL1801:
-	.loc 5 742 0
+.LVL1803:
+	.loc 5 738 0
 	bl	l2p_flush
-.LVL1802:
-	.loc 5 743 0
+.LVL1804:
+	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1803:
-.L1585:
-	.loc 5 745 0
+.LVL1805:
+.L1583:
+	.loc 5 741 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1583:
-	.loc 5 747 0
-	ldr	r3, .L1637+44
+.L1581:
+	.loc 5 743 0
+	ldr	r3, .L1635+44
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1586
-	.loc 5 749 0
-	ldr	r3, .L1637+48
+	bhi	.L1584
+	.loc 5 745 0
+	ldr	r3, .L1635+48
 	ldrh	r4, [r3]
-.LVL1804:
-	b	.L1558
-.LVL1805:
-.L1586:
-	.loc 5 752 0
-	ldr	r2, .L1637+28
+.LVL1806:
+	b	.L1556
+.LVL1807:
+.L1584:
+	.loc 5 748 0
+	ldr	r2, .L1635+28
 	movs	r1, #0
 	str	r1, [r2]
-	.loc 5 754 0
-	ldr	r2, .L1637+52
+	.loc 5 750 0
+	ldr	r2, .L1635+52
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1515
-	.loc 5 757 0
+	bne	.L1513
+	.loc 5 753 0
 	adds	r0, r3, #1
-.LVL1806:
-	b	.L1515
-.LVL1807:
-.L1590:
-.LBE295:
-.LBE297:
+.LVL1808:
+	b	.L1513
+.LVL1809:
+.L1588:
+.LBE328:
+.LBE330:
 	.loc 5 479 0
 	movs	r0, #0
-	b	.L1515
-.LVL1808:
-.L1521:
-.LBB298:
-.LBB296:
+	b	.L1513
+.LVL1810:
+.L1519:
+.LBB331:
+.LBB329:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1588
-.LVL1809:
-.L1531:
+	beq	.L1586
+.LVL1811:
+.L1529:
 	.loc 5 557 0
-	ldr	r3, .L1637+20
+	ldr	r3, .L1635+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1599
-.LVL1810:
-.L1589:
-	ldr	r3, .L1637+56
+	bne	.L1597
+.LVL1812:
+.L1587:
+	ldr	r3, .L1635+56
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1599
+	bne	.L1597
 	cmp	r5, r3
-	bne	.L1599
+	bne	.L1597
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1543
-.LVL1811:
-.L1548:
+	beq	.L1541
+.LVL1813:
+.L1546:
 	.loc 5 556 0
 	movw	r5, #65535
-.L1599:
+.L1597:
 	movs	r4, #1
-	b	.L1542
-.LVL1812:
-.L1523:
+	b	.L1540
+.LVL1814:
+.L1521:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1588
+	beq	.L1586
 	movw	r5, #65535
-	b	.L1589
-.LVL1813:
-.L1522:
+	b	.L1587
+.LVL1815:
+.L1520:
 	cmp	r7, #0
-	bne	.L1548
-	b	.L1588
-.L1638:
+	bne	.L1546
+	b	.L1586
+.L1636:
 	.align	2
-.L1637:
-	.word	.LANCHOR95
-	.word	.LANCHOR177
-	.word	.LC1
+.L1635:
+	.word	.LANCHOR93
 	.word	.LANCHOR175
+	.word	.LC1
+	.word	.LANCHOR173
 	.word	.LANCHOR121
 	.word	.LANCHOR53
-	.word	.LANCHOR72
+	.word	.LANCHOR71
 	.word	.LANCHOR117
-	.word	.LANCHOR176
-	.word	.LANCHOR91
-	.word	.LANCHOR43
+	.word	.LANCHOR174
+	.word	.LANCHOR89
+	.word	.LANCHOR42
 	.word	.LANCHOR48
 	.word	.LANCHOR19
-	.word	.LANCHOR174
-	.word	.LANCHOR101
-.LBE296:
-.LBE298:
+	.word	.LANCHOR172
+	.word	.LANCHOR99
+.LBE329:
+.LBE331:
 	.cfi_endproc
 .LFE322:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -19475,16 +19542,16 @@ rk_ftl_garbage_collect:
 	.type	sftl_gc, %function
 sftl_gc:
 .LFB323:
-	.loc 5 761 0
+	.loc 5 757 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	.loc 5 762 0
+	.loc 5 758 0
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1814:
+.LVL1816:
 	.cfi_endproc
 .LFE323:
 	.size	sftl_gc, .-sftl_gc
@@ -19502,7 +19569,7 @@ FtlRead:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1815:
+.LVL1817:
 	.loc 3 824 0
 	cmp	r0, #16
 	.loc 3 814 0
@@ -19523,19 +19590,19 @@ FtlRead:
 	mov	r8, r3
 	str	r2, [sp, #32]
 	.loc 3 824 0
-	bne	.L1641
+	bne	.L1639
 	.loc 3 825 0
 	mov	r2, r3
-.LVL1816:
+.LVL1818:
 	ldr	r1, [sp, #32]
-.LVL1817:
+.LVL1819:
 	add	r0, r6, #256
-.LVL1818:
+.LVL1820:
 	bl	FtlVendorPartRead
-.LVL1819:
+.LVL1821:
 	str	r0, [sp, #4]
-.LVL1820:
-.L1640:
+.LVL1822:
+.L1638:
 	.loc 3 901 0
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
@@ -19543,31 +19610,28 @@ FtlRead:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1821:
-.L1641:
+.LVL1823:
+.L1639:
 	.cfi_restore_state
 	.loc 3 830 0
 	ldr	r3, [sp, #32]
-.LVL1822:
+.LVL1824:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1672
+	ldr	r3, .L1670
 	ldr	r2, [sp, #12]
-.LVL1823:
+.LVL1825:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1661
+	bhi	.L1659
 	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1672+4
+	ldr	r3, .L1670+4
 	ldr	r3, [r3]
 	adds	r0, r3, #1
-.LVL1824:
-	beq	.L1662
-	.loc 3 833 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL1825:
-	.loc 3 835 0
-	ldr	r3, .L1672+8
+.LVL1826:
+	beq	.L1660
+	.loc 3 835 0 is_stmt 1
+	ldr	r3, .L1670+8
 	mov	r0, r6
 	.loc 3 828 0
 	movs	r7, #0
@@ -19576,41 +19640,42 @@ FtlRead:
 	.loc 3 835 0
 	ldrh	r4, [r3]
 	mov	r1, r4
+.LVL1827:
 	bl	__aeabi_uidiv
-.LVL1826:
+.LVL1828:
 	.loc 3 836 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
 	.loc 3 835 0
 	str	r0, [sp, #16]
-.LVL1827:
+.LVL1829:
 	.loc 3 836 0
 	subs	r0, r3, #1
-.LVL1828:
+.LVL1830:
 	bl	__aeabi_uidiv
-.LVL1829:
+.LVL1831:
 	.loc 3 837 0
 	ldr	r3, [sp, #16]
 	.loc 3 841 0
-	ldr	r2, .L1672+12
+	ldr	r2, .L1670+12
 	.loc 3 835 0
 	ldr	r4, [sp, #16]
 	.loc 3 837 0
 	rsb	r3, r3, #1
 	.loc 3 836 0
 	str	r0, [sp, #20]
-.LVL1830:
+.LVL1832:
 	.loc 3 837 0
 	add	r3, r3, r0
 	.loc 3 828 0
 	str	r7, [sp, #28]
 	.loc 3 837 0
 	str	r3, [sp, #8]
-.LVL1831:
+.LVL1833:
 	.loc 3 841 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1832:
+.LVL1834:
 	.loc 3 820 0
 	str	r7, [sp, #24]
 	.loc 3 815 0
@@ -19618,71 +19683,71 @@ FtlRead:
 	.loc 3 841 0
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1833:
-.L1643:
+.LVL1835:
+.L1641:
 	.loc 3 842 0
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1659
+	cbnz	r3, .L1657
 	.loc 3 898 0
-	ldr	r3, .L1672+16
+	ldr	r3, .L1670+16
 	ldrh	r3, [r3]
-	cbnz	r3, .L1660
+	cbnz	r3, .L1658
 	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1672+20
+	ldr	r3, .L1670+20
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1640
-.L1660:
+	bhi	.L1638
+.L1658:
 	.loc 3 899 0 is_stmt 1
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1834:
-	b	.L1640
-.LVL1835:
-.L1659:
+.LVL1836:
+	b	.L1638
+.LVL1837:
+.L1657:
 	.loc 3 843 0
 	add	r1, sp, #52
 	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
-.LVL1836:
+.LVL1838:
 	.loc 3 844 0
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	bne	.L1644
+	bne	.L1642
 	.loc 3 845 0 discriminator 1
-	ldr	fp, .L1672+8
+	ldr	fp, .L1670+8
 	mov	r10, #0
-.L1645:
-.LVL1837:
+.L1643:
+.LVL1839:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1647
-.LVL1838:
-.L1648:
+	bcc	.L1645
+.LVL1840:
+.L1646:
 	.loc 3 874 0
 	ldr	r3, [sp, #8]
 	.loc 3 872 0
 	adds	r4, r4, #1
-.LVL1839:
+.LVL1841:
 	.loc 3 874 0
 	subs	r3, r3, #1
-.LVL1840:
+.LVL1842:
 	str	r3, [sp, #8]
-	beq	.L1652
+	beq	.L1650
 	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1672+24
-.LVL1841:
+	ldr	r3, .L1670+24
+.LVL1843:
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1643
-.L1652:
+	bne	.L1641
+.L1650:
 	.loc 3 875 0 is_stmt 1
 	cmp	r5, #0
-	beq	.L1643
+	beq	.L1641
 	.loc 3 876 0
-	ldr	r3, .L1672+28
+	ldr	r3, .L1670+28
 	movs	r2, #0
 	mov	r1, r5
 	.loc 3 877 0
@@ -19690,7 +19755,7 @@ FtlRead:
 	.loc 3 876 0
 	ldr	r0, [r3]
 	bl	FlashReadPages
-.LVL1842:
+.LVL1844:
 	.loc 3 883 0
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
@@ -19701,89 +19766,89 @@ FtlRead:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.LVL1843:
-.L1658:
+.LVL1845:
+.L1656:
 	movs	r3, #20
 	mul	fp, r3, r10
 	.loc 3 878 0
-	ldr	r3, .L1672+28
+	ldr	r3, .L1670+28
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1654
+	bne	.L1652
 	.loc 3 879 0
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1672+32
+	ldr	r2, .L1670+32
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1655
+	bne	.L1653
 	.loc 3 880 0
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1671:
+.L1669:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1844:
-.L1655:
+.LVL1846:
+.L1653:
 	.loc 3 885 0
-	ldr	r3, .L1672+28
+	ldr	r3, .L1670+28
 	ldr	r2, [r3]
 	ldr	r3, [r2, fp]
 	add	r1, r2, fp
 	adds	r2, r3, #1
-	bne	.L1656
+	bne	.L1654
 	.loc 3 886 0
-	ldr	r1, .L1672+36
+	ldr	r1, .L1670+36
 	.loc 3 887 0
 	str	r3, [sp, #4]
 	.loc 3 886 0
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.LVL1845:
-.L1657:
+.LVL1847:
+.L1655:
 	.loc 3 877 0 discriminator 2
 	add	r10, r10, #1
-.LVL1846:
+.LVL1848:
 	cmp	r5, r10
-	bne	.L1658
+	bne	.L1656
 	.loc 3 894 0
 	movs	r5, #0
-.LVL1847:
-	b	.L1643
-.LVL1848:
-.L1647:
+.LVL1849:
+	b	.L1641
+.LVL1850:
+.L1645:
 	.loc 3 846 0
 	mla	r0, r0, r4, r10
-.LVL1849:
+.LVL1851:
 	.loc 3 847 0
 	cmp	r6, r0
-	bhi	.L1646
+	bhi	.L1644
 	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1646
+	bls	.L1644
 	.loc 3 848 0 is_stmt 1
 	subs	r0, r0, r6
-.LVL1850:
+.LVL1852:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.LVL1851:
-.L1646:
-	.loc 3 845 0 discriminator 2
-	add	r10, r10, #1
-.LVL1852:
-	b	.L1645
 .LVL1853:
 .L1644:
+	.loc 3 845 0 discriminator 2
+	add	r10, r10, #1
+.LVL1854:
+	b	.L1643
+.LVL1855:
+.L1642:
 	.loc 3 851 0
-	ldr	r2, .L1672+28
+	ldr	r2, .L1670+28
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
@@ -19791,10 +19856,10 @@ FtlRead:
 	.loc 3 852 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1672+8
-	bne	.L1649
+	ldr	r3, .L1670+8
+	bne	.L1647
 	.loc 3 853 0
-	ldr	r2, .L1672+32
+	ldr	r2, .L1670+32
 	.loc 3 854 0
 	mov	r0, r6
 	ldrh	fp, [r3]
@@ -19806,29 +19871,29 @@ FtlRead:
 	str	r2, [r10, #8]
 	.loc 3 854 0
 	bl	__aeabi_uidivmod
-.LVL1854:
+.LVL1856:
 	ldr	r2, [sp, #32]
 	.loc 3 855 0
 	sub	r3, fp, r1
 	.loc 3 854 0
 	str	r1, [sp, #24]
-.LVL1855:
+.LVL1857:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-.LVL1856:
+.LVL1858:
 	.loc 3 857 0
 	cmp	fp, r3
 	str	r3, [sp, #28]
-.LVL1857:
-	bne	.L1650
+.LVL1859:
+	bne	.L1648
 	.loc 3 858 0
 	str	r8, [r10, #8]
-.LVL1858:
-.L1650:
+.LVL1860:
+.L1648:
 	.loc 3 867 0
-	ldr	r3, .L1672+40
-	ldr	r2, .L1672+44
+	ldr	r3, .L1670+40
+	ldr	r2, .L1670+44
 	.loc 3 868 0
 	str	r4, [r10, #16]
 	.loc 3 867 0
@@ -19837,19 +19902,19 @@ FtlRead:
 	muls	r3, r5, r3
 	.loc 3 869 0
 	adds	r5, r5, #1
-.LVL1859:
+.LVL1861:
 	.loc 3 867 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1648
-.L1649:
+	b	.L1646
+.L1647:
 	.loc 3 859 0
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1651
+	bne	.L1649
 	.loc 3 860 0
-	ldr	r2, .L1672+48
+	ldr	r2, .L1670+48
 	.loc 3 861 0
 	ldr	r1, [sp, #12]
 	.loc 3 860 0
@@ -19859,80 +19924,80 @@ FtlRead:
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r7, r1, r3
-.LVL1860:
+.LVL1862:
 	.loc 3 862 0
 	cmp	r2, r7
-	bne	.L1650
-.L1670:
+	bne	.L1648
+.L1668:
 	.loc 3 865 0
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1650
-.L1651:
+	b	.L1648
+.L1649:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1670
-.LVL1861:
-.L1654:
+	b	.L1668
+.LVL1863:
+.L1652:
 	.loc 3 881 0
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1655
+	bne	.L1653
 	.loc 3 882 0
-	ldr	r3, .L1672+48
+	ldr	r3, .L1670+48
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1655
+	bne	.L1653
 	.loc 3 883 0
-	ldr	r2, .L1672+8
+	ldr	r2, .L1670+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1671
-.L1656:
+	b	.L1669
+.L1654:
 	.loc 3 889 0
 	cmp	r3, #256
-	bne	.L1657
-.LBB299:
+	bne	.L1655
+.LBB332:
 	.loc 3 890 0
 	ldr	r0, [r1, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1862:
+.LVL1864:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1863:
-	b	.L1657
-.LVL1864:
-.L1661:
-.LBE299:
+.LVL1865:
+	b	.L1655
+.LVL1866:
+.L1659:
+.LBE332:
 	.loc 3 831 0
 	mov	r3, #-1
-.LVL1865:
-.L1662:
+.LVL1867:
+.L1660:
 	str	r3, [sp, #4]
-	b	.L1640
-.L1673:
+	b	.L1638
+.L1671:
 	.align	2
-.L1672:
+.L1670:
 	.word	.LANCHOR34
-	.word	.LANCHOR88
+	.word	.LANCHOR86
 	.word	.LANCHOR12
-	.word	.LANCHOR63
-	.word	.LANCHOR103
+	.word	.LANCHOR62
+	.word	.LANCHOR101
 	.word	.LANCHOR48
 	.word	.LANCHOR3
 	.word	.LANCHOR120
-	.word	.LANCHOR116
-	.word	.LANCHOR83
-	.word	.LANCHOR24
 	.word	.LANCHOR115
+	.word	.LANCHOR81
+	.word	.LANCHOR24
 	.word	.LANCHOR114
+	.word	.LANCHOR113
 	.cfi_endproc
 .LFE217:
 	.size	FtlRead, .-FtlRead
@@ -19946,22 +20011,22 @@ FtlRead:
 	.type	sftl_read, %function
 sftl_read:
 .LFB222:
-	.loc 3 1204 0
+	.loc 3 1168 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1866:
-	.loc 3 1205 0
+.LVL1868:
+	.loc 3 1169 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1867:
+.LVL1869:
 	mov	r1, r0
-.LVL1868:
+.LVL1870:
 	movs	r0, #0
-.LVL1869:
+.LVL1871:
 	b	FtlRead
-.LVL1870:
+.LVL1872:
 	.cfi_endproc
 .LFE222:
 	.size	sftl_read, .-sftl_read
@@ -19975,14 +20040,14 @@ sftl_read:
 	.type	FtlWrite, %function
 FtlWrite:
 .LFB220:
-	.loc 3 962 0
+	.loc 3 958 0
 	.cfi_startproc
-	@ args = 0, pretend = 0, frame = 64
+	@ args = 0, pretend = 0, frame = 72
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1871:
-	.loc 3 970 0
+.LVL1873:
+	.loc 3 966 0
 	cmp	r0, #16
-	.loc 3 962 0
+	.loc 3 958 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -19993,317 +20058,196 @@ FtlWrite:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	sub	sp, sp, #64
-	.cfi_def_cfa_offset 96
-	.loc 3 962 0
-	mov	r8, r1
-	str	r2, [sp, #16]
-	str	r3, [sp]
-	.loc 3 970 0
-	bne	.L1676
-	.loc 3 971 0
+	sub	sp, sp, #72
+	.cfi_def_cfa_offset 104
+	.loc 3 958 0
+	str	r1, [sp, #4]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	.loc 3 966 0
+	bne	.L1674
+	.loc 3 967 0
 	mov	r2, r3
-.LVL1872:
-	ldr	r1, [sp, #16]
-.LVL1873:
-	add	r0, r8, #256
 .LVL1874:
-	bl	FtlVendorPartWrite
+	ldr	r3, [sp, #4]
 .LVL1875:
-.L1675:
-	.loc 3 1153 0
-	add	sp, sp, #64
+	ldr	r1, [sp, #20]
+.LVL1876:
+	add	r0, r3, #256
+.LVL1877:
+	bl	FtlVendorPartWrite
+.LVL1878:
+.L1673:
+	.loc 3 1117 0
+	add	sp, sp, #72
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL1876:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1877:
-.L1676:
+.LVL1879:
+.L1674:
 	.cfi_restore_state
-	.loc 3 974 0
-	ldr	r3, [sp, #16]
-.LVL1878:
-	adds	r5, r1, r3
-	ldr	r3, .L1736
+	.loc 3 970 0
+	ldr	r3, [sp, #4]
+.LVL1880:
+	ldr	r2, [sp, #20]
+.LVL1881:
+	adds	r4, r3, r2
+	ldr	r3, .L1724
 	ldr	r3, [r3]
-	cmp	r5, r3
-	bhi	.L1716
-	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1736+4
+	cmp	r4, r3
+	bhi	.L1710
+	.loc 3 970 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1724+4
 	ldr	r0, [r3]
-.LVL1879:
-	adds	r4, r0, #1
-	beq	.L1675
-	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1736+8
+.LVL1882:
+	adds	r5, r0, #1
+	beq	.L1673
+	.loc 3 973 0 is_stmt 1
+	ldr	r3, .L1724+8
 	mov	r2, #2048
-.LVL1880:
-	.loc 3 978 0
-	mov	r0, r8
-	.loc 3 977 0
+	.loc 3 974 0
+	ldr	r0, [sp, #4]
+	.loc 3 973 0
 	str	r2, [r3]
-	.loc 3 978 0
-	ldr	r3, .L1736+12
-	ldrh	r4, [r3]
-	mov	r1, r4
-.LVL1881:
-	bl	__aeabi_uidiv
-.LVL1882:
-	.loc 3 979 0
-	mov	r1, r4
-	.loc 3 978 0
-	mov	r10, r0
+	.loc 3 974 0
+	ldr	r3, .L1724+12
+	ldrh	r5, [r3]
+	mov	r1, r5
 .LVL1883:
-	.loc 3 979 0
-	subs	r0, r5, #1
-.LVL1884:
 	bl	__aeabi_uidiv
+.LVL1884:
+	.loc 3 975 0
+	mov	r1, r5
+	.loc 3 974 0
+	str	r0, [sp, #12]
 .LVL1885:
-	.loc 3 982 0
-	ldr	r2, .L1736+16
-	.loc 3 980 0
-	sub	r5, r0, r10
-	adds	r3, r5, #1
-	.loc 3 982 0
-	adds	r1, r5, #1
-	.loc 3 980 0
-	str	r3, [sp, #12]
-	.loc 3 982 0
-	ldr	r3, [r2]
-	.loc 3 979 0
-	str	r0, [sp, #20]
+	.loc 3 975 0
+	subs	r0, r4, #1
 .LVL1886:
-	.loc 3 982 0
+	ldr	r5, .L1724+16
+	bl	__aeabi_uidiv
+.LVL1887:
+	.loc 3 976 0
+	ldr	r2, [sp, #12]
+	.loc 3 975 0
+	str	r0, [sp, #28]
+.LVL1888:
+	.loc 3 976 0
+	subs	r3, r0, r2
+	.loc 3 978 0
+	ldr	r2, .L1724+20
+	.loc 3 976 0
+	str	r3, [sp, #32]
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+.LVL1889:
+	.loc 3 978 0
+	ldr	r1, [sp, #8]
+	ldr	r3, [r2]
+.LVL1890:
 	add	r3, r3, r1
 	str	r3, [r2]
-	.loc 3 983 0
-	ldr	r3, .L1736+20
-	ldr	r7, [r3]
-	cbz	r7, .L1678
+.LVL1891:
 	.loc 3 984 0
-	ldr	r3, [r7, #16]
-	cmp	r10, r3
-	beq	.L1679
-	.loc 3 985 0
-	bl	FtlCacheWriteBack
-.LVL1887:
-.L1678:
-	.loc 3 1008 0
-	ldr	r3, .L1736+24
-	ldr	r4, .L1736+28
+	ldr	r3, .L1724+24
 	ldr	r3, [r3]
-	cbz	r3, .L1681
-	.loc 3 1008 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r4, #4]
-	.loc 3 1009 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1736+32
+	cbz	r3, .L1676
+	.loc 3 984 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r5, #4]
+	.loc 3 985 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1724+28
 	cmp	r2, #0
 	it	eq
-	moveq	r4, r3
-.L1681:
-	.loc 3 1068 0
-	mov	r6, r10
-.LVL1888:
-.L1682:
-	.loc 3 1011 0
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L1712
-	.loc 3 1137 0
-	ldr	r3, [sp, #20]
-	.loc 3 1139 0
-	ldr	r4, .L1736+36
-.LVL1889:
-	.loc 3 1137 0
-	ldr	r0, [sp, #12]
-	sub	r1, r3, r10
+	moveq	r5, r3
+.L1676:
+	.loc 3 974 0
+	ldr	r6, [sp, #12]
+.LVL1892:
+.L1677:
+	.loc 3 987 0
+	ldr	r3, [sp, #8]
+	cbnz	r3, .L1706
+	.loc 3 1103 0
+	ldr	r4, .L1724+32
+	.loc 3 1101 0
+	mov	r0, r3
+	ldr	r1, [sp, #32]
 	bl	rk_ftl_garbage_collect
-.LVL1890:
-	.loc 3 1139 0
+.LVL1893:
+	.loc 3 1103 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
-	bhi	.L1713
-	.loc 3 1141 0
-	ldr	r5, .L1736+40
-	ldr	r6, .L1736+44
-.LVL1891:
-.L1732:
-	ldrh	r3, [r5]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1714
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	r2, [r6]
-	cmp	r2, r3
-	bne	.L1714
-	.loc 3 1142 0 is_stmt 1
-	movs	r0, #0
-	bl	List_get_gc_head_node
-.LVL1892:
-	uxth	r0, r0
-	bl	FtlGcRefreshBlock
-.LVL1893:
-.L1714:
-	.loc 3 1143 0
-	ldr	r2, .L1736+48
-	movs	r3, #128
-	.loc 3 1145 0
-	movs	r1, #1
-	mov	r0, r1
-	.loc 3 1143 0
-	strh	r3, [r2]	@ movhi
-	.loc 3 1144 0
-	ldr	r2, .L1736+52
-	strh	r3, [r2]	@ movhi
-	.loc 3 1145 0
-	bl	rk_ftl_garbage_collect
+	bls	.L1707
 .LVL1894:
-	.loc 3 1146 0
-	movs	r1, #1
+.L1709:
+	.loc 3 1116 0
 	movs	r0, #0
-	bl	rk_ftl_garbage_collect
+	b	.L1673
 .LVL1895:
-	.loc 3 1147 0
-	ldrh	r3, [r4]
-	cmp	r3, #8
-	bls	.L1732
-	b	.L1713
-.LVL1896:
-.L1679:
-	.loc 3 987 0
-	ldr	r2, .L1736+56
+.L1706:
 	.loc 3 988 0
-	mov	r1, r4
+	ldr	r3, .L1724+36
+.LVL1896:
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1678
+	.loc 3 988 0 is_stmt 0 discriminator 1
+	mov	r2, #988
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
+	bl	printf
 .LVL1897:
-	mov	r0, r8
-.LVL1898:
-	.loc 3 987 0
-	ldr	r3, [r2]
-	adds	r3, r3, #1
-	str	r3, [r2]
-	.loc 3 988 0
-	bl	__aeabi_uidivmod
-.LVL1899:
-	ldr	r2, [sp, #16]
-	.loc 3 989 0
-	subs	r4, r4, r1
-	.loc 3 992 0
-	ldr	r0, [r7, #8]
-	.loc 3 988 0
-	mov	r3, r1
-.LVL1900:
+.L1678:
+	.loc 3 989 0 is_stmt 1
+	ldrh	r2, [r5, #4]
+	cbnz	r2, .L1679
 	.loc 3 992 0
-	ldr	r1, [sp]
-.LVL1901:
-	cmp	r4, r2
-	it	cs
-	movcs	r4, r2
-.LVL1902:
-	lsls	r6, r4, #9
-	add	r0, r0, r3, lsl #9
-	mov	r2, r6
-	bl	ftl_memcpy
-.LVL1903:
+	ldr	r3, .L1724+16
+	ldr	r4, .L1724+24
+	cmp	r5, r3
+	bne	.L1680
+	.loc 3 993 0
+	ldr	r0, .L1724+28
+	ldrh	r5, [r0, #4]
+.LVL1898:
+	cbnz	r5, .L1681
 	.loc 3 994 0
-	cbnz	r5, .L1680
-.LVL1904:
-.L1713:
+	bl	allocate_new_data_superblock
+.LVL1899:
 	.loc 3 995 0
-	movs	r0, #0
-	b	.L1675
-.LVL1905:
-.L1680:
-	.loc 3 996 0
-	ldr	r3, [sp, #16]
+	str	r5, [r4]
+.L1681:
 	.loc 3 997 0
-	add	r8, r8, r4
-.LVL1906:
+	ldr	r0, .L1724+16
+	bl	allocate_new_data_superblock
+.LVL1900:
 	.loc 3 999 0
-	add	r10, r10, #1
-.LVL1907:
-	.loc 3 996 0
-	subs	r3, r3, r4
-	str	r3, [sp, #16]
-.LVL1908:
+	ldr	r5, .L1724+16
 	.loc 3 998 0
-	ldr	r3, [sp]
-.LVL1909:
-	add	r3, r3, r6
-	str	r3, [sp]
-.LVL1910:
-	.loc 3 1000 0
-	bl	FtlCacheWriteBack
-.LVL1911:
-	str	r5, [sp, #12]
-	b	.L1678
-.LVL1912:
-.L1712:
-	.loc 3 1012 0
-	ldr	r3, .L1736+60
-.LVL1913:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1683
-	.loc 3 1012 0 is_stmt 0 discriminator 1
-	mov	r2, #1012
-	ldr	r1, .L1736+64
-	ldr	r0, .L1736+68
-	bl	printf
-.LVL1914:
-.L1683:
-	.loc 3 1013 0 is_stmt 1
-	ldrh	r7, [r4, #4]
-	cbnz	r7, .L1684
-	.loc 3 1014 0
-	bl	FtlCacheWriteBack
-.LVL1915:
-	.loc 3 1016 0
-	ldr	r3, .L1736+28
-	ldr	r5, .L1736+24
-	cmp	r4, r3
-	bne	.L1685
-	.loc 3 1017 0
-	ldr	r0, .L1736+32
-	ldrh	r4, [r0, #4]
-.LVL1916:
-	cbnz	r4, .L1686
-	.loc 3 1018 0
-	bl	allocate_new_data_superblock
-.LVL1917:
-	.loc 3 1019 0
-	str	r4, [r5]
-.L1686:
-	.loc 3 1021 0
-	ldr	r0, .L1736+28
-	bl	allocate_new_data_superblock
-.LVL1918:
-	.loc 3 1023 0
-	ldr	r4, .L1736+28
-	.loc 3 1022 0
-	ldr	r2, [r5]
-	.loc 3 1023 0
-	ldr	r3, .L1736+32
+	ldr	r2, [r4]
+	.loc 3 999 0
+	ldr	r3, .L1724+28
 	cmp	r2, #0
 	it	ne
-	movne	r4, r3
-.L1687:
-.LVL1919:
-	.loc 3 1033 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1684
-	.loc 3 1034 0
-	mov	r0, r4
+	movne	r5, r3
+.L1682:
+.LVL1901:
+	.loc 3 1009 0
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1679
+	.loc 3 1010 0
+	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1920:
-.L1684:
-	.loc 3 1041 0
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	.loc 3 1043 0
-	ldrh	r3, [r4, #4]
-	ldr	r1, [sp, #12]
-	.loc 3 1041 0
+.LVL1902:
+.L1679:
+	.loc 3 1017 0
+	ldrb	r2, [r5, #7]	@ zero_extendqisi2
+	.loc 3 1019 0
+	ldrh	r3, [r5, #4]
+	ldr	r1, [sp, #8]
+	.loc 3 1017 0
 	lsls	r2, r2, #2
 	cmp	r3, r1
 	it	cs
@@ -20311,446 +20255,467 @@ FtlWrite:
 	cmp	r2, r3
 	it	cs
 	movcs	r2, r3
-	.loc 3 1045 0
-	ldr	r3, .L1736+60
-	str	r2, [sp, #36]
-.LVL1921:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-.LVL1922:
+	.loc 3 1021 0
+	ldr	r3, .L1724+36
+	str	r2, [sp, #44]
+.LVL1903:
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+.LVL1904:
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1688
-	.loc 3 1045 0 is_stmt 0 discriminator 1
-	movw	r2, #1045
-	ldr	r1, .L1736+64
-	ldr	r0, .L1736+68
+	bcc	.L1683
+	.loc 3 1021 0 is_stmt 0 discriminator 1
+	movw	r2, #1021
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
 	bl	printf
-.LVL1923:
-.L1688:
-	.loc 3 1054 0 is_stmt 1 discriminator 1
-	ldr	fp, .L1736+72
-	.loc 3 1068 0 discriminator 1
-	movs	r3, #0
-	str	r3, [sp, #4]
-.L1689:
-.LVL1924:
-	.loc 3 1046 0 discriminator 1
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #36]
-	cmp	r3, r2
-	bne	.L1710
-.L1690:
-.LVL1925:
-	.loc 3 1133 0
-	ldr	r0, .L1736+72
-	mov	r3, r4
+.LVL1905:
+.L1683:
+	.loc 3 1030 0 is_stmt 1 discriminator 1
+	ldr	r8, .L1724+48
+	.loc 3 1044 0 discriminator 1
+	mov	fp, #0
+.L1684:
+.LVL1906:
+	.loc 3 1022 0 discriminator 1
+	ldr	r3, [sp, #44]
+	cmp	fp, r3
+	bne	.L1704
+.L1685:
+.LVL1907:
+	.loc 3 1097 0
+	ldr	r0, .L1724+48
+	mov	r3, r5
 	movs	r2, #0
-	ldr	r1, [sp, #4]
+	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
-.LVL1926:
-	.loc 3 1134 0
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #12]
-	cmp	r3, r2
-	bls	.L1711
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	movw	r2, #1134
-	ldr	r1, .L1736+64
-	ldr	r0, .L1736+68
+.LVL1908:
+	.loc 3 1098 0
+	ldr	r3, [sp, #8]
+	cmp	fp, r3
+	bls	.L1705
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	movw	r2, #1098
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
 	bl	printf
-.LVL1927:
-.L1711:
-	.loc 3 1135 0 is_stmt 1
-	ldr	r3, [sp, #12]
-	ldr	r2, [sp, #4]
-	subs	r3, r3, r2
-	str	r3, [sp, #12]
-.LVL1928:
-	b	.L1682
-.LVL1929:
-.L1685:
-	.loc 3 1028 0
+.LVL1909:
+.L1705:
+	.loc 3 1099 0 is_stmt 1
+	ldr	r3, [sp, #8]
+	sub	r3, r3, fp
+	str	r3, [sp, #8]
+.LVL1910:
+	b	.L1677
+.LVL1911:
+.L1680:
+	.loc 3 1003 0
+	str	r2, [r4]
+	.loc 3 1004 0
 	ldrh	r2, [r3, #4]
-	.loc 3 1027 0
-	str	r7, [r5]
-	.loc 3 1028 0
-	cbnz	r2, .L1721
-	.loc 3 1029 0
-	mov	r0, r4
+	cbnz	r2, .L1715
+	.loc 3 1005 0
+	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL1930:
-	b	.L1687
-.L1721:
-	mov	r4, r3
-.LVL1931:
-	b	.L1684
-.LVL1932:
-.L1710:
-	.loc 3 1047 0
-	ldrh	r2, [r4, #4]
+.LVL1912:
+	b	.L1682
+.L1715:
+	mov	r5, r3
+.LVL1913:
+	b	.L1679
+.LVL1914:
+.L1704:
+	.loc 3 1023 0
+	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L1690
-	.loc 3 1051 0
+	beq	.L1685
+	.loc 3 1027 0
 	movs	r2, #0
-	add	r1, sp, #40
+	add	r1, sp, #48
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1933:
-	.loc 3 1052 0
-	mov	r0, r4
+.LVL1915:
+	.loc 3 1028 0
+	mov	r0, r5
+	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1934:
-	ldr	r3, [sp, #4]
-	.loc 3 1054 0
-	ldr	r1, [fp]
-	muls	r7, r3, r7
-	.loc 3 1055 0
-	ldr	r3, .L1736+76
+.LVL1916:
+	.loc 3 1031 0
+	ldr	r3, .L1724+52
+	.loc 3 1030 0
+	ldr	r1, [r8]
+	.loc 3 1031 0
 	ldrh	r2, [r3]
-	ldr	r3, [sp, #4]
-	.loc 3 1054 0
+	.loc 3 1030 0
 	add	r1, r1, r7
 	str	r0, [r1, #4]
-	.loc 3 1056 0
+	.loc 3 1032 0
 	str	r6, [r1, #16]
-.LVL1935:
-	.loc 3 1055 0
-	mul	r0, r2, r3
-.LVL1936:
+	.loc 3 1031 0
+	mul	r0, r2, fp
+.LVL1917:
 	bic	r3, r0, #3
-	ldr	r0, .L1736+80
-	str	r3, [sp, #28]
+	ldr	r0, .L1724+56
+	str	r3, [sp, #36]
 	ldr	r3, [r0]
-	ldr	r0, [sp, #28]
-	str	r3, [sp, #32]
-	add	r3, r3, r0
-	str	r3, [r1, #12]
-	.loc 3 1059 0
-	mov	r0, r3
+	ldr	r0, [sp, #36]
+	str	r3, [sp, #40]
+	add	r10, r3, r0
+.LVL1918:
+	str	r10, [r1, #12]
+	.loc 3 1035 0
+	mov	r0, r10
 	movs	r1, #0
-.LVL1937:
-	.loc 3 1055 0
-	str	r3, [sp, #8]
-.LVL1938:
-	.loc 3 1059 0
+.LVL1919:
 	bl	ftl_memset
-.LVL1939:
-	.loc 3 1061 0
-	cmp	r6, r10
-	ldr	r2, .L1736+12
-	beq	.L1691
-	.loc 3 1061 0 is_stmt 0 discriminator 1
-	ldr	r3, [sp, #20]
+.LVL1920:
+	.loc 3 1037 0
+	ldr	r3, [sp, #12]
+	ldr	r2, .L1724+12
 	cmp	r6, r3
-	bne	.L1731
-.LVL1940:
-	.loc 3 1069 0 is_stmt 1
+	beq	.L1686
+	.loc 3 1037 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #28]
+	cmp	r6, r3
+	bne	.L1719
+.LVL1921:
+	.loc 3 1045 0 is_stmt 1
 	ldrh	r2, [r2]
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #4]
+	ldr	r1, [sp, #20]
 	smulbb	r2, r2, r6
-	add	r5, r8, r3
-	.loc 3 1068 0
+	adds	r4, r3, r1
+	.loc 3 1044 0
 	movs	r3, #0
+	.loc 3 1045 0
+	subs	r4, r4, r2
+	.loc 3 1044 0
 	str	r3, [sp, #24]
-	.loc 3 1069 0
-	subs	r5, r5, r2
-	uxth	r5, r5
-.LVL1941:
-	b	.L1694
-.L1737:
-	.align	2
-.L1736:
-	.word	.LANCHOR34
-	.word	.LANCHOR88
-	.word	.LANCHOR178
-	.word	.LANCHOR12
-	.word	.LANCHOR65
-	.word	.LANCHOR150
-	.word	.LANCHOR179
-	.word	.LANCHOR51
-	.word	.LANCHOR52
-	.word	.LANCHOR48
-	.word	.LANCHOR82
-	.word	.LANCHOR101
-	.word	.LANCHOR85
-	.word	.LANCHOR84
-	.word	.LANCHOR66
-	.word	.LANCHOR3
-	.word	.LANCHOR180
-	.word	.LC1
-	.word	.LANCHOR122
-	.word	.LANCHOR24
-	.word	.LANCHOR115
-.LVL1942:
-.L1691:
-	.loc 3 1063 0
-	ldrh	r5, [r2]
-	mov	r0, r8
-	mov	r1, r5
+	.loc 3 1045 0
+	uxth	r4, r4
+.LVL1922:
+	b	.L1689
+.LVL1923:
+.L1686:
+	.loc 3 1039 0
+	ldrh	r4, [r2]
+	ldr	r0, [sp, #4]
+	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1943:
-	ldr	r3, [sp, #16]
-	.loc 3 1064 0
-	subs	r5, r5, r1
-	.loc 3 1063 0
+.LVL1924:
+	ldr	r3, [sp, #20]
+	.loc 3 1040 0
+	subs	r4, r4, r1
+	.loc 3 1039 0
 	str	r1, [sp, #24]
-.LVL1944:
-	cmp	r5, r3
+.LVL1925:
+	cmp	r4, r3
 	it	cs
-	movcs	r5, r3
-.LVL1945:
-.L1694:
-	.loc 3 1072 0
-	ldr	r2, .L1738
+	movcs	r4, r3
+.LVL1926:
+.L1689:
+	.loc 3 1048 0
+	ldr	r2, .L1724+12
+	.loc 3 1049 0
+	ldr	r3, [sp, #12]
+	.loc 3 1048 0
 	ldrh	r2, [r2]
-	cmp	r5, r2
-	.loc 3 1074 0
-	ldr	r2, [fp]
-	.loc 3 1072 0
-	bne	.L1695
-	.loc 3 1073 0
-	cmp	r6, r10
-	.loc 3 1074 0
+	cmp	r4, r2
+	.loc 3 1050 0
+	ldr	r2, [r8]
+	.loc 3 1048 0
+	bne	.L1690
+	.loc 3 1049 0
+	cmp	r6, r3
+	.loc 3 1050 0
 	add	r7, r7, r2
-	.loc 3 1076 0
+	.loc 3 1052 0
 	ittet	ne
-	mulne	r5, r5, r6
-.LVL1946:
-	ldrne	r3, [sp]
-	.loc 3 1074 0
-	ldreq	r3, [sp]
-	.loc 3 1076 0
-	subne	r5, r5, r8
-	.loc 3 1074 0
-	itee	eq
+	mulne	r4, r4, r6
+.LVL1927:
+	ldrne	r3, [sp, #4]
+	.loc 3 1050 0
+	ldreq	r3, [sp, #16]
+	.loc 3 1052 0
+	subne	r4, r4, r3
+	itett	ne
+	ldrne	r3, [sp, #16]
+	.loc 3 1050 0
 	streq	r3, [r7, #8]
-	.loc 3 1076 0
-	addne	r5, r3, r5, lsl #9
-	strne	r5, [r7, #8]
-.LVL1947:
-.L1697:
-	.loc 3 1119 0
-	ldr	r3, .L1738+4
-	ldrb	r1, [r4, #6]	@ zero_extendqisi2
+	.loc 3 1052 0
+	addne	r4, r3, r4, lsl #9
+	strne	r4, [r7, #8]
+.LVL1928:
+.L1692:
+	.loc 3 1089 0
+	ldr	r3, .L1724+36
+	ldrb	r1, [r5, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1707
-	.loc 3 1119 0 is_stmt 0 discriminator 1
-	movw	r2, #1119
-	ldr	r1, .L1738+8
-	ldr	r0, .L1738+12
+	bcc	.L1701
+	.loc 3 1089 0 is_stmt 0 discriminator 1
+	movw	r2, #1089
+	ldr	r1, .L1724+40
+	ldr	r0, .L1724+44
 	bl	printf
-.LVL1948:
-.L1707:
-	.loc 3 1120 0 is_stmt 1
-	ldr	r3, [sp, #32]
+.LVL1929:
+.L1701:
+	.loc 3 1090 0 is_stmt 1
+	ldr	r3, [sp, #40]
 	movw	r2, #61589
-	ldr	r1, [sp, #28]
+	ldr	r1, [sp, #36]
+	.loc 3 1022 0
+	add	fp, fp, #1
+.LVL1930:
+	.loc 3 1090 0
 	strh	r2, [r3, r1]	@ movhi
-	.loc 3 1121 0
-	ldr	r1, .L1738+16
-	ldr	r3, [sp, #8]
+	.loc 3 1091 0
+	ldr	r1, .L1724+60
+	.loc 3 1092 0
+	str	r6, [r10, #8]
+	.loc 3 1095 0
+	adds	r6, r6, #1
+.LVL1931:
+	.loc 3 1091 0
 	ldr	r2, [r1]
-	str	r2, [r3, #4]
+	str	r2, [r10, #4]
 	adds	r2, r2, #1
 	adds	r3, r2, #1
-	.loc 3 1122 0
-	ldr	r3, [sp, #8]
-	.loc 3 1121 0
 	it	eq
 	moveq	r2, #0
 	str	r2, [r1]
-	.loc 3 1123 0
-	ldr	r2, [sp, #40]
-	.loc 3 1122 0
-	str	r6, [r3, #8]
-	.loc 3 1125 0
-	adds	r6, r6, #1
-.LVL1949:
-	.loc 3 1123 0
-	str	r2, [r3, #12]
-	.loc 3 1124 0
-	ldrh	r2, [r4]
-	strh	r2, [r3, #2]	@ movhi
-	.loc 3 1046 0
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	str	r3, [sp, #4]
-.LVL1950:
-	b	.L1689
-.LVL1951:
-.L1695:
-	.loc 3 1079 0
-	cmp	r6, r10
-	.loc 3 1080 0
+	.loc 3 1093 0
+	ldr	r2, [sp, #48]
+	str	r2, [r10, #12]
+	.loc 3 1094 0
+	ldrh	r2, [r5]
+	strh	r2, [r10, #2]	@ movhi
+	b	.L1684
+.L1725:
+	.align	2
+.L1724:
+	.word	.LANCHOR34
+	.word	.LANCHOR86
+	.word	.LANCHOR176
+	.word	.LANCHOR12
+	.word	.LANCHOR51
+	.word	.LANCHOR64
+	.word	.LANCHOR177
+	.word	.LANCHOR52
+	.word	.LANCHOR48
+	.word	.LANCHOR3
+	.word	.LANCHOR178
+	.word	.LC1
+	.word	.LANCHOR122
+	.word	.LANCHOR24
+	.word	.LANCHOR114
+	.word	.LANCHOR71
+.LVL1932:
+.L1690:
+	.loc 3 1055 0
+	cmp	r6, r3
+	.loc 3 1056 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1738+20
-	.loc 3 1082 0
-	ldrne	r1, .L1738+24
+	ldreq	r1, .L1726
+	.loc 3 1058 0
+	ldrne	r1, .L1726+4
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
-	.loc 3 1084 0
-	ldr	r2, [sp, #40]
+	.loc 3 1060 0
+	ldr	r2, [sp, #48]
 	adds	r1, r2, #1
-	beq	.L1700
-.LBB300:
-	.loc 3 1086 0
-	str	r2, [sp, #48]
-	.loc 3 1090 0
-	add	r0, sp, #44
-	.loc 3 1088 0
-	ldr	r2, [fp]
-	.loc 3 1087 0
-	str	r6, [sp, #60]
-	.loc 3 1088 0
+	beq	.L1695
+.LBB333:
+	.loc 3 1062 0
+	str	r2, [sp, #56]
+	.loc 3 1066 0
+	add	r0, sp, #52
+	.loc 3 1064 0
+	ldr	r2, [r8]
+	.loc 3 1063 0
+	str	r6, [sp, #68]
+	.loc 3 1064 0
 	add	r2, r2, r7
 	ldr	r1, [r2, #8]
-	.loc 3 1089 0
+	.loc 3 1065 0
 	ldr	r2, [r2, #12]
-	.loc 3 1088 0
-	str	r1, [sp, #52]
-	.loc 3 1090 0
+	.loc 3 1064 0
+	str	r1, [sp, #60]
+	.loc 3 1066 0
 	movs	r1, #1
-	.loc 3 1089 0
-	str	r2, [sp, #56]
-	.loc 3 1090 0
+	.loc 3 1065 0
+	str	r2, [sp, #64]
+	.loc 3 1066 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1952:
-	.loc 3 1091 0
-	ldr	r2, [sp, #44]
+.LVL1933:
+	.loc 3 1067 0
+	ldr	r2, [sp, #52]
 	adds	r2, r2, #1
-	bne	.L1701
-	.loc 3 1092 0
-	ldr	r1, .L1738+28
+	bne	.L1696
+	.loc 3 1068 0
+	ldr	r1, .L1726+8
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1704:
-.LBE300:
-	.loc 3 1104 0
-	cmp	r6, r10
-	lsl	r2, r5, #9
-	bne	.L1705
-	.loc 3 1105 0
-	ldr	r1, [fp]
+.L1699:
+.LBE333:
+	.loc 3 1080 0
+	ldr	r3, [sp, #12]
+	lsls	r2, r4, #9
+	cmp	r6, r3
+	bne	.L1700
+	.loc 3 1081 0
+	ldr	r1, [r8]
 	ldr	r3, [sp, #24]
-	add	r1, r1, r7
-	ldr	r0, [r1, #8]
-	ldr	r1, [sp]
+	add	r7, r7, r1
+	ldr	r1, [sp, #16]
+	ldr	r0, [r7, #8]
 	add	r0, r0, r3, lsl #9
-.L1734:
-	.loc 3 1107 0
+.L1722:
+	.loc 3 1083 0
 	bl	ftl_memcpy
-.LVL1953:
-	.loc 3 1109 0
-	ldr	r3, [sp, #20]
-	cmp	r6, r3
-	bne	.L1697
-	.loc 3 1110 0
-	ldrh	r2, [r4, #4]
-	cmp	r2, #0
-	beq	.L1697
-	.loc 3 1111 0
-	ldr	r2, [fp]
-	add	r7, r7, r2
-	ldr	r2, .L1738+32
-	str	r7, [r2]
-	.loc 3 1112 0
-	ldr	r2, .L1738+36
-	str	r4, [r2]
-	b	.L1697
-.L1701:
-.LBB301:
-	.loc 3 1094 0
-	ldr	r3, [sp, #8]
-	ldr	r1, [r3, #8]
+.LVL1934:
+	b	.L1692
+.L1696:
+.LBB334:
+	.loc 3 1070 0
+	ldr	r1, [r10, #8]
 	cmp	r6, r1
-	beq	.L1703
-	.loc 3 1095 0
-	ldr	r0, .L1738+28
+	beq	.L1698
+	.loc 3 1071 0
+	ldr	r0, .L1726+8
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
-	.loc 3 1096 0
+	.loc 3 1072 0
 	mov	r2, r6
-	ldr	r0, .L1738+40
+	ldr	r0, .L1726+12
 	bl	printf
-.LVL1954:
-.L1703:
-	.loc 3 1098 0
-	ldr	r3, [sp, #8]
-	ldr	r2, [r3, #8]
+.LVL1935:
+.L1698:
+	.loc 3 1074 0
+	ldr	r2, [r10, #8]
 	cmp	r6, r2
-	beq	.L1704
-	.loc 3 1098 0 is_stmt 0 discriminator 1
-	movw	r2, #1098
-	ldr	r1, .L1738+8
-	ldr	r0, .L1738+12
+	beq	.L1699
+	.loc 3 1074 0 is_stmt 0 discriminator 1
+	movw	r2, #1074
+	ldr	r1, .L1726+16
+	ldr	r0, .L1726+20
 	bl	printf
-.LVL1955:
-	b	.L1704
-.LVL1956:
-.L1700:
-.LBE301:
-	.loc 3 1101 0 is_stmt 1
-	ldr	r2, [fp]
+.LVL1936:
+	b	.L1699
+.LVL1937:
+.L1695:
+.LBE334:
+	.loc 3 1077 0 is_stmt 1
+	ldr	r2, [r8]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1738+44
+	ldr	r2, .L1726+24
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1957:
-	b	.L1704
-.L1705:
-	.loc 3 1107 0
-	ldr	r1, .L1738
-	ldr	r0, [fp]
-	ldr	r3, [sp]
+.LVL1938:
+	b	.L1699
+.L1700:
+	.loc 3 1083 0
+	ldr	r1, .L1726+28
+	ldr	r3, [sp, #4]
+	ldr	r0, [r8]
 	ldrh	r1, [r1]
-	add	r0, r0, r7
-	ldr	r0, [r0, #8]
+	add	r7, r7, r0
+	ldr	r0, [r7, #8]
 	muls	r1, r6, r1
-	sub	r1, r1, r8
+	subs	r1, r1, r3
+	ldr	r3, [sp, #16]
 	add	r1, r3, r1, lsl #9
-	b	.L1734
-.LVL1958:
-.L1731:
-	.loc 3 1117 0
+	b	.L1722
+.LVL1939:
+.L1719:
+	.loc 3 1087 0
 	ldrh	r2, [r2]
-	ldr	r3, [sp]
-	ldr	r1, [fp]
+	ldr	r3, [sp, #4]
+	ldr	r1, [r8]
 	muls	r2, r6, r2
 	add	r7, r7, r1
-	sub	r2, r2, r8
+	subs	r2, r2, r3
+	ldr	r3, [sp, #16]
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1697
-.LVL1959:
-.L1716:
-	.loc 3 975 0
+	b	.L1692
+.LVL1940:
+.L1707:
+	.loc 3 1105 0
+	ldr	r5, .L1726+32
+.LVL1941:
+	ldr	r6, .L1726+36
+.LVL1942:
+.L1720:
+	ldrh	r3, [r5]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1708
+	.loc 3 1105 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bne	.L1708
+	.loc 3 1106 0 is_stmt 1
+	movs	r0, #0
+	bl	List_get_gc_head_node
+.LVL1943:
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.LVL1944:
+.L1708:
+	.loc 3 1107 0
+	ldr	r2, .L1726+40
+	movs	r3, #128
+	.loc 3 1109 0
+	movs	r1, #1
+	mov	r0, r1
+	.loc 3 1107 0
+	strh	r3, [r2]	@ movhi
+	.loc 3 1108 0
+	ldr	r2, .L1726+44
+	strh	r3, [r2]	@ movhi
+	.loc 3 1109 0
+	bl	rk_ftl_garbage_collect
+.LVL1945:
+	.loc 3 1110 0
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL1946:
+	.loc 3 1111 0
+	ldrh	r3, [r4]
+	cmp	r3, #8
+	bls	.L1720
+	b	.L1709
+.LVL1947:
+.L1710:
+	.loc 3 971 0
 	mov	r0, #-1
-.LVL1960:
-	b	.L1675
-.L1739:
-	.align	2
-.L1738:
-	.word	.LANCHOR12
-	.word	.LANCHOR3
-	.word	.LANCHOR180
+.LVL1948:
+	b	.L1673
+.L1727:
+	.align	2
+.L1726:
+	.word	.LANCHOR115
+	.word	.LANCHOR113
+	.word	.LANCHOR81
+	.word	.LC108
+	.word	.LANCHOR178
 	.word	.LC1
-	.word	.LANCHOR72
-	.word	.LANCHOR116
-	.word	.LANCHOR114
-	.word	.LANCHOR83
-	.word	.LANCHOR150
-	.word	.LANCHOR171
-	.word	.LC105
 	.word	.LANCHOR23
+	.word	.LANCHOR12
+	.word	.LANCHOR80
+	.word	.LANCHOR99
+	.word	.LANCHOR83
+	.word	.LANCHOR82
 	.cfi_endproc
 .LFE220:
 	.size	FtlWrite, .-FtlWrite
@@ -20764,22 +20729,22 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 .LFB223:
-	.loc 3 1209 0
+	.loc 3 1173 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1961:
-	.loc 3 1210 0
+.LVL1949:
+	.loc 3 1174 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1962:
+.LVL1950:
 	mov	r1, r0
-.LVL1963:
+.LVL1951:
 	movs	r0, #0
-.LVL1964:
+.LVL1952:
 	b	FtlWrite
-.LVL1965:
+.LVL1953:
 	.cfi_endproc
 .LFE223:
 	.size	sftl_write, .-sftl_write
@@ -20793,7 +20758,7 @@ sftl_write:
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
 .LFB277:
-	.loc 2 1360 0
+	.loc 2 1409 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -20807,101 +20772,101 @@ FtlLoadSysInfo:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 2 1368 0
+	.loc 2 1417 0
 	movs	r1, #0
-	.loc 2 1365 0
-	ldr	r8, .L1762+136
-	.loc 2 1368 0
-	ldr	r5, .L1762
-	.loc 2 1365 0
+	.loc 2 1414 0
+	ldr	r8, .L1750+136
+	.loc 2 1417 0
+	ldr	r5, .L1750
+	.loc 2 1414 0
 	ldr	r3, [r8]
-	ldr	r4, .L1762+4
-	.loc 2 1366 0
-	ldr	r10, .L1762+140
-	.loc 2 1368 0
+	ldr	r4, .L1750+4
+	.loc 2 1415 0
+	ldr	r10, .L1750+140
+	.loc 2 1417 0
 	ldrh	r2, [r5]
-	ldr	r7, .L1762+8
-	.loc 2 1365 0
+	ldr	r7, .L1750+8
+	.loc 2 1414 0
 	str	r3, [r4, #8]
-	.loc 2 1369 0
-	ldr	r6, .L1762+12
-	.loc 2 1366 0
+	.loc 2 1418 0
+	ldr	r6, .L1750+12
+	.loc 2 1415 0
 	ldr	r3, [r10]
-	.loc 2 1368 0
+	.loc 2 1417 0
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
-	.loc 2 1366 0
+	.loc 2 1415 0
 	str	r3, [r4, #12]
-	.loc 2 1368 0
+	.loc 2 1417 0
 	bl	ftl_memset
-.LVL1966:
-	.loc 2 1369 0
+.LVL1954:
+	.loc 2 1418 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1742
-.L1750:
-	.loc 2 1370 0
+	bne	.L1730
+.L1738:
+	.loc 2 1419 0
 	mov	r0, #-1
-.L1741:
-	.loc 2 1463 0
+.L1729:
+	.loc 2 1512 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1742:
+.L1730:
 	.cfi_restore_state
-	.loc 2 1372 0
+	.loc 2 1421 0
 	movs	r1, #1
-	.loc 2 1378 0
+	.loc 2 1427 0
 	mov	fp, r4
-	.loc 2 1372 0
+	.loc 2 1421 0
 	bl	FtlGetLastWrittenPage
-.LVL1967:
-	.loc 2 1381 0
-	ldr	r3, .L1762+16
-	.loc 2 1372 0
+.LVL1955:
+	.loc 2 1430 0
+	ldr	r3, .L1750+16
+	.loc 2 1421 0
 	sxth	r7, r0
-.LVL1968:
-	.loc 2 1373 0
+.LVL1956:
+	.loc 2 1422 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1744:
-	.loc 2 1375 0
+.L1732:
+	.loc 2 1424 0
 	cmp	r7, #0
-	bge	.L1747
-	.loc 2 1388 0
-	movw	r2, #1388
-	ldr	r1, .L1762+20
-	ldr	r0, .L1762+24
+	bge	.L1735
+	.loc 2 1437 0
+	movw	r2, #1437
+	ldr	r1, .L1750+20
+	ldr	r0, .L1750+24
 	bl	printf
-.LVL1969:
-.L1746:
-	.loc 2 1390 0
-	ldr	r2, .L1762+28
+.LVL1957:
+.L1734:
+	.loc 2 1439 0
+	ldr	r2, .L1750+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1749
-	.loc 2 1390 0 is_stmt 0 discriminator 1
-	movw	r2, #1390
-	ldr	r1, .L1762+20
-	ldr	r0, .L1762+24
+	bcs	.L1737
+	.loc 2 1439 0 is_stmt 0 discriminator 1
+	movw	r2, #1439
+	ldr	r1, .L1750+20
+	ldr	r0, .L1750+24
 	bl	printf
-.LVL1970:
-.L1749:
-	.loc 2 1392 0 is_stmt 1
-	ldr	r7, .L1762+32
-.LVL1971:
+.LVL1958:
+.L1737:
+	.loc 2 1441 0 is_stmt 1
+	ldr	r7, .L1750+32
+.LVL1959:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1972:
-	.loc 2 1393 0
+.LVL1960:
+	.loc 2 1442 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
 	ldr	r3, [sp]
@@ -20909,8 +20874,8 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1973:
-	.loc 2 1394 0
+.LVL1961:
+	.loc 2 1443 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
 	mov	r4, r7
@@ -20920,305 +20885,305 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1762+36
+	ldr	r3, .L1750+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1974:
-	.loc 2 1396 0
+.LVL1962:
+	.loc 2 1445 0
 	ldr	r2, [r7]
-	ldr	r3, .L1762+16
+	ldr	r3, .L1750+16
 	cmp	r2, r3
-	bne	.L1750
-	.loc 2 1400 0
-	ldr	r3, .L1762+40
+	bne	.L1738
+	.loc 2 1449 0
+	ldr	r3, .L1750+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
-	.loc 2 1399 0
+	.loc 2 1448 0
 	ldrh	r5, [r7, #8]
-	.loc 2 1400 0
+	.loc 2 1449 0
 	ldrh	r3, [r3]
-	.loc 2 1399 0
+	.loc 2 1448 0
 	strh	r5, [r6, #6]	@ movhi
-	.loc 2 1400 0
+	.loc 2 1449 0
 	cmp	r2, r3
-	bne	.L1750
-	.loc 2 1403 0
-	ldr	r3, .L1762+44
-	.loc 2 1404 0
-	ldr	r2, .L1762+48
-	.loc 2 1403 0
+	bne	.L1738
+	.loc 2 1452 0
+	ldr	r3, .L1750+44
+	.loc 2 1453 0
+	ldr	r2, .L1750+48
+	.loc 2 1452 0
 	str	r5, [r3]
-	.loc 2 1404 0
-	ldr	r3, .L1762+52
+	.loc 2 1453 0
+	ldr	r3, .L1750+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
-	.loc 2 1405 0
-	ldr	r2, .L1762+56
+	.loc 2 1454 0
+	ldr	r2, .L1750+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1762+60
+	ldr	r2, .L1750+60
 	str	r3, [r2]
-	.loc 2 1406 0
-	ldr	r3, .L1762+64
+	.loc 2 1455 0
+	ldr	r3, .L1750+64
 	ldr	r6, [r3]
-	ldr	r3, .L1762+68
+	ldr	r3, .L1750+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1762+72
+	ldr	r3, .L1750+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1975:
-	ldr	r3, .L1762+76
-	.loc 2 1412 0
+.LVL1963:
+	ldr	r3, .L1750+76
+	.loc 2 1461 0
 	cmp	r5, r6
-	.loc 2 1406 0
+	.loc 2 1455 0
 	strh	r0, [r3]	@ movhi
-	.loc 2 1412 0
-	bls	.L1751
-	.loc 2 1412 0 is_stmt 0 discriminator 1
-	movw	r2, #1412
-	ldr	r1, .L1762+20
-	ldr	r0, .L1762+24
+	.loc 2 1461 0
+	bls	.L1739
+	.loc 2 1461 0 is_stmt 0 discriminator 1
+	movw	r2, #1461
+	ldr	r1, .L1750+20
+	ldr	r0, .L1750+24
 	bl	printf
-.LVL1976:
-.L1751:
-	.loc 2 1415 0 is_stmt 1
+.LVL1964:
+.L1739:
+	.loc 2 1464 0 is_stmt 1
 	ldrh	r2, [r4, #16]
-	.loc 2 1414 0
-	ldr	r3, .L1762+80
+	.loc 2 1463 0
+	ldr	r3, .L1750+80
 	ldrh	ip, [r4, #14]
-	.loc 2 1419 0
-	ldr	r7, .L1762+84
-	.loc 2 1415 0
+	.loc 2 1468 0
+	ldr	r7, .L1750+84
+	.loc 2 1464 0
 	lsrs	r1, r2, #6
-	.loc 2 1416 0
+	.loc 2 1465 0
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
-	.loc 2 1417 0
+	.loc 2 1466 0
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
-	.loc 2 1415 0
+	.loc 2 1464 0
 	strh	r1, [r3, #2]	@ movhi
-	.loc 2 1424 0
-	ldr	r1, .L1762+88
-	.loc 2 1417 0
+	.loc 2 1473 0
+	ldr	r1, .L1750+88
+	.loc 2 1466 0
 	strb	r2, [r3, #8]
-	.loc 2 1424 0
+	.loc 2 1473 0
 	ldrh	r2, [r4, #18]
-	.loc 2 1414 0
+	.loc 2 1463 0
 	strh	ip, [r3]	@ movhi
-	.loc 2 1419 0
+	.loc 2 1468 0
 	movw	r3, #65535
 	strh	r3, [r7]	@ movhi
-	.loc 2 1420 0
+	.loc 2 1469 0
 	movs	r3, #0
-	.loc 2 1424 0
+	.loc 2 1473 0
 	strh	r2, [r1]	@ movhi
-	.loc 2 1425 0
+	.loc 2 1474 0
 	ldrh	r2, [r4, #20]
-	.loc 2 1420 0
+	.loc 2 1469 0
 	strh	r3, [r7, #2]	@ movhi
-	.loc 2 1421 0
+	.loc 2 1470 0
 	strb	r3, [r7, #6]
-	.loc 2 1422 0
+	.loc 2 1471 0
 	strb	r3, [r7, #8]
-	.loc 2 1425 0
+	.loc 2 1474 0
 	lsrs	r5, r2, #6
-	.loc 2 1426 0
+	.loc 2 1475 0
 	and	r2, r2, #63
 	strb	r2, [r1, #6]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	ldrb	r2, [r4, #12]	@ zero_extendqisi2
-	.loc 2 1425 0
+	.loc 2 1474 0
 	strh	r5, [r1, #2]	@ movhi
-	.loc 2 1429 0
+	.loc 2 1478 0
 	ldrh	r5, [r4, #22]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	strb	r2, [r1, #8]
-	.loc 2 1429 0
-	ldr	r2, .L1762+92
+	.loc 2 1478 0
+	ldr	r2, .L1750+92
 	strh	r5, [r2]	@ movhi
-	.loc 2 1430 0
+	.loc 2 1479 0
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
-	.loc 2 1431 0
+	.loc 2 1480 0
 	and	r5, r5, #63
 	strb	r5, [r2, #6]
-	.loc 2 1432 0
+	.loc 2 1481 0
 	ldrb	r5, [r4, #13]	@ zero_extendqisi2
-	.loc 2 1430 0
+	.loc 2 1479 0
 	strh	r6, [r2, #2]	@ movhi
-	.loc 2 1439 0
+	.loc 2 1488 0
 	ldr	r6, [r4, #32]
-	.loc 2 1432 0
+	.loc 2 1481 0
 	strb	r5, [r2, #8]
-	.loc 2 1434 0
-	ldr	r5, .L1762+96
+	.loc 2 1483 0
+	ldr	r5, .L1750+96
 	str	r3, [r5]
-	.loc 2 1435 0
-	ldr	r5, .L1762+100
+	.loc 2 1484 0
+	ldr	r5, .L1750+100
 	str	r3, [r5]
-	.loc 2 1436 0
-	ldr	r5, .L1762+104
+	.loc 2 1485 0
+	ldr	r5, .L1750+104
 	str	r3, [r5]
-	.loc 2 1437 0
-	ldr	r5, .L1762+108
+	.loc 2 1486 0
+	ldr	r5, .L1750+108
 	str	r3, [r5]
-	.loc 2 1439 0
-	ldr	r5, .L1762+112
+	.loc 2 1488 0
+	ldr	r5, .L1750+112
 	str	r6, [r5]
 	mov	r6, r1
-	.loc 2 1440 0
-	ldr	r5, .L1762+116
+	.loc 2 1489 0
+	ldr	r5, .L1750+116
 	str	r3, [r5]
-	.loc 2 1441 0
-	ldr	r5, .L1762+120
+	.loc 2 1490 0
+	ldr	r5, .L1750+120
 	str	r3, [r5]
-	.loc 2 1442 0
-	ldr	r5, .L1762+124
-	.loc 2 1444 0
+	.loc 2 1491 0
+	ldr	r5, .L1750+124
+	.loc 2 1493 0
 	ldr	lr, [r4, #40]
-	.loc 2 1442 0
+	.loc 2 1491 0
 	str	r3, [r5]
-	.loc 2 1444 0
-	ldr	r3, .L1762+128
+	.loc 2 1493 0
+	ldr	r3, .L1750+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
-	.loc 2 1445 0
+	.loc 2 1494 0
 	it	hi
 	strhi	lr, [r3]
-	.loc 2 1447 0
-	ldr	r3, .L1762+132
+	.loc 2 1496 0
+	ldr	r3, .L1750+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
-	.loc 2 1448 0
+	.loc 2 1497 0
 	it	hi
 	strhi	r2, [r3]
-	.loc 2 1450 0
+	.loc 2 1499 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1754
-	.loc 2 1451 0
-	ldr	r0, .L1762+80
+	beq	.L1742
+	.loc 2 1500 0
+	ldr	r0, .L1750+80
 	bl	make_superblock
-.LVL1977:
-.L1754:
-	.loc 2 1453 0
+.LVL1965:
+.L1742:
+	.loc 2 1502 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1755
-	.loc 2 1454 0
-	ldr	r0, .L1762+88
+	beq	.L1743
+	.loc 2 1503 0
+	ldr	r0, .L1750+88
 	bl	make_superblock
-.LVL1978:
-.L1755:
-	.loc 2 1456 0
+.LVL1966:
+.L1743:
+	.loc 2 1505 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1756
-	.loc 2 1457 0
-	ldr	r0, .L1762+92
+	beq	.L1744
+	.loc 2 1506 0
+	ldr	r0, .L1750+92
 	bl	make_superblock
-.LVL1979:
-.L1756:
-	.loc 2 1459 0
+.LVL1967:
+.L1744:
+	.loc 2 1508 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1757
-	.loc 2 1460 0
-	ldr	r0, .L1762+84
+	beq	.L1745
+	.loc 2 1509 0
+	ldr	r0, .L1750+84
 	bl	make_superblock
-.LVL1980:
-.L1757:
-	.loc 2 1462 0
+.LVL1968:
+.L1745:
+	.loc 2 1511 0
 	movs	r0, #0
-	b	.L1741
-.LVL1981:
-.L1747:
-	.loc 2 1376 0
+	b	.L1729
+.LVL1969:
+.L1735:
+	.loc 2 1425 0
 	ldrh	r2, [r6]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	mov	r0, fp
 	str	r3, [sp, #4]
-	.loc 2 1376 0
+	.loc 2 1425 0
 	orr	r2, r7, r2, lsl #10
 	str	r2, [r4, #4]
-	.loc 2 1377 0
+	.loc 2 1426 0
 	ldr	r2, [r8]
 	str	r2, [r4, #8]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1982:
-	.loc 2 1381 0
+.LVL1970:
+	.loc 2 1430 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1745
-	.loc 2 1382 0 discriminator 1
+	beq	.L1733
+	.loc 2 1431 0 discriminator 1
 	ldr	r2, [r8]
-	.loc 2 1381 0 discriminator 1
+	.loc 2 1430 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1745
-	.loc 2 1383 0
+	bne	.L1733
+	.loc 2 1432 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
-	.loc 2 1382 0
+	.loc 2 1431 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1746
-.L1745:
+	beq	.L1734
+.L1733:
 	subs	r7, r7, #1
-.LVL1983:
+.LVL1971:
 	sxth	r7, r7
-.LVL1984:
-	b	.L1744
-.L1763:
+.LVL1972:
+	b	.L1732
+.L1751:
 	.align	2
-.L1762:
+.L1750:
 	.word	.LANCHOR5
-	.word	.LANCHOR108
-	.word	.LANCHOR43
-	.word	.LANCHOR81
+	.word	.LANCHOR106
+	.word	.LANCHOR42
+	.word	.LANCHOR79
 	.word	1179929683
-	.word	.LANCHOR181
+	.word	.LANCHOR179
 	.word	.LC1
 	.word	.LANCHOR23
-	.word	.LANCHOR79
+	.word	.LANCHOR39
 	.word	.LANCHOR1
 	.word	.LANCHOR10
-	.word	.LANCHOR182
-	.word	.LANCHOR62
+	.word	.LANCHOR180
+	.word	.LANCHOR61
 	.word	.LANCHOR19
 	.word	.LANCHOR12
 	.word	.LANCHOR34
 	.word	.LANCHOR7
 	.word	.LANCHOR37
 	.word	.LANCHOR3
-	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LANCHOR51
-	.word	.LANCHOR82
+	.word	.LANCHOR80
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR63
 	.word	.LANCHOR67
-	.word	.LANCHOR73
-	.word	.LANCHOR74
-	.word	.LANCHOR77
+	.word	.LANCHOR64
+	.word	.LANCHOR62
 	.word	.LANCHOR66
-	.word	.LANCHOR71
 	.word	.LANCHOR72
-	.word	.LANCHOR39
-	.word	.LANCHOR109
+	.word	.LANCHOR73
+	.word	.LANCHOR76
+	.word	.LANCHOR65
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR107
+	.word	.LANCHOR108
 	.cfi_endproc
 .LFE277:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -21232,7 +21197,7 @@ FtlLoadSysInfo:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 .LFB295:
-	.loc 2 2306 0
+	.loc 2 2356 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -21244,239 +21209,242 @@ FtlSysBlkInit:
 	.cfi_offset 6, -12
 	.cfi_offset 7, -8
 	.cfi_offset 14, -4
-	.loc 2 2310 0
+	.loc 2 2360 0
 	movs	r3, #0
-	ldr	r6, .L1780
+	ldr	r6, .L1767
 	strh	r3, [r6]	@ movhi
-	.loc 2 2312 0
-	ldr	r3, .L1780+4
+	.loc 2 2362 0
+	ldr	r3, .L1767+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1985:
-	.loc 2 2313 0
+.LVL1973:
+	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL1986:
-	.loc 2 2314 0
-	ldr	r3, .L1780+8
+.LVL1974:
+	.loc 2 2364 0
+	ldr	r3, .L1767+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1765
-.L1767:
-	.loc 2 2315 0
+	bne	.L1753
+.L1755:
+	.loc 2 2365 0
 	mov	r7, #-1
-.L1764:
-	.loc 2 2398 0
+.L1752:
+	.loc 2 2451 0
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1765:
-	.loc 2 2317 0
+.L1753:
+	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL1987:
+.LVL1975:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1767
-	.loc 2 2320 0
+	bne	.L1755
+	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL1988:
-	.loc 2 2321 0
+.LVL1976:
+	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL1989:
-	.loc 2 2322 0
+.LVL1977:
+	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL1990:
-	.loc 2 2324 0
+.LVL1978:
+	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL1991:
-	.loc 2 2325 0
+.LVL1979:
+	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL1992:
-	.loc 2 2327 0
+.LVL1980:
+	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL1993:
-	.loc 2 2328 0
+.LVL1981:
+	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL1994:
-	.loc 2 2330 0
+.LVL1982:
+	.loc 2 2380 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1995:
-.LBB305:
-.LBB306:
-	.loc 2 2332 0
-	ldr	r3, .L1780+12
-	.loc 2 2333 0
+.LVL1983:
+.LBB338:
+.LBB339:
+	.loc 2 2382 0
+	ldr	r3, .L1767+12
+	.loc 2 2383 0
 	movs	r0, #12
-	.loc 2 2332 0
+	.loc 2 2382 0
 	ldrh	r1, [r3]
-	.loc 2 2333 0
-	ldr	r3, .L1780+16
+	.loc 2 2383 0
+	ldr	r3, .L1767+16
 	ldr	r2, [r3]
-	.loc 2 2332 0
+	.loc 2 2382 0
 	mov	r3, r7
-.L1768:
-.LVL1996:
+.L1756:
+.LVL1984:
 	cmp	r3, r1
-	bge	.L1773
-	.loc 2 2333 0
+	bge	.L1761
+	.loc 2 2383 0
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1769
-.L1773:
-	.loc 2 2336 0
-	ldr	r4, .L1780+20
-	.loc 2 2338 0
+	bge	.L1757
+.L1761:
+	.loc 2 2386 0
+	ldr	r4, .L1767+20
+	.loc 2 2388 0
 	cmp	r3, r1
-	ldr	r5, .L1780+24
-	.loc 2 2336 0
+	ldr	r5, .L1767+24
+	.loc 2 2386 0
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
-	.loc 2 2338 0
-	bge	.L1779
-.LVL1997:
-.L1770:
-	.loc 2 2340 0
-	ldr	r6, .L1780+28
-	.loc 2 2339 0
-	ldr	r0, .L1780+24
+	.loc 2 2388 0
+	bge	.L1765
+.LVL1985:
+.L1758:
+	.loc 2 2390 0
+	ldr	r6, .L1767+28
+	.loc 2 2389 0
+	ldr	r0, .L1767+24
 	bl	FtlSuperblockPowerLostFix
-.LVL1998:
-	.loc 2 2340 0
+.LVL1986:
+	.loc 2 2390 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL1999:
-.LBB307:
-	.loc 2 2346 0
-	ldr	r3, .L1780+32
+.LVL1987:
+.LBB340:
+	.loc 2 2396 0
+	ldr	r3, .L1767+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
-	.loc 2 2347 0
-	ldr	r0, .L1780+36
-	.loc 2 2346 0
+	.loc 2 2397 0
+	ldr	r0, .L1767+36
+	.loc 2 2396 0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
-	.loc 2 2352 0
+	.loc 2 2402 0
 	ldrh	ip, [r6]
-	.loc 2 2347 0
+	.loc 2 2397 0
 	ldrh	r3, [r0]
-	.loc 2 2352 0
+	.loc 2 2402 0
 	ldrh	lr, [r6, #4]
-	.loc 2 2347 0
+	.loc 2 2397 0
 	strh	r3, [r5, #2]	@ movhi
-	.loc 2 2348 0
+	.loc 2 2398 0
 	movs	r3, #0
 	strb	r3, [r5, #6]
-	.loc 2 2349 0
+	.loc 2 2399 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL2000:
-	.loc 2 2352 0
+.LVL1988:
+	.loc 2 2402 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
-	.loc 2 2353 0
+	.loc 2 2403 0
 	ldrh	r2, [r0]
-.LBE307:
-	.loc 2 2359 0
-	ldr	r0, .L1780+40
-.LBB308:
-	.loc 2 2354 0
+.LBE340:
+	.loc 2 2409 0
+	ldr	r0, .L1767+40
+.LBB341:
+	.loc 2 2404 0
 	strb	r3, [r6, #6]
-	.loc 2 2353 0
+	.loc 2 2403 0
 	strh	r2, [r6, #2]	@ movhi
-	.loc 2 2355 0
+	.loc 2 2405 0
 	strh	r3, [r6, #4]	@ movhi
-.LBE308:
-	.loc 2 2359 0
+.LBE341:
+	.loc 2 2409 0
 	bl	FtlMapBlkWriteDump_data
-.LVL2001:
-	.loc 2 2360 0
-	ldr	r0, .L1780+44
+.LVL1989:
+	.loc 2 2410 0
+	ldr	r0, .L1767+44
 	bl	FtlMapBlkWriteDump_data
-.LVL2002:
-	.loc 2 2372 0
+.LVL1990:
+	.loc 2 2422 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
-	.loc 2 2373 0
+	.loc 2 2423 0
 	bl	l2p_flush
-.LVL2003:
-	.loc 2 2374 0
+.LVL1991:
+	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL2004:
-	.loc 2 2375 0
+.LVL1992:
+.L1766:
+	.loc 2 2428 0
 	bl	FtlVpcTblFlush
-.LVL2005:
-	b	.L1774
-.LVL2006:
-.L1769:
-	.loc 2 2332 0
-	adds	r3, r3, #1
-.LVL2007:
-	b	.L1768
-.L1779:
-	.loc 2 2338 0
-	ldrh	r3, [r6]
-.LVL2008:
-	cmp	r3, #0
-	bne	.L1770
-.L1774:
-	.loc 2 2379 0
+.LVL1993:
+	.loc 2 2432 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1775
+	beq	.L1764
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1775
-	.loc 2 2381 0
-	ldr	r5, .L1780+28
-	.loc 2 2380 0
+	cbnz	r3, .L1764
+	.loc 2 2434 0
+	ldr	r5, .L1767+28
+	.loc 2 2433 0
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1775
-	.loc 2 2382 0
+	cbnz	r3, .L1764
+	.loc 2 2435 0
 	bl	FtlGcRefreshBlock
-.LVL2009:
-	.loc 2 2383 0
+.LVL1994:
+	.loc 2 2436 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL2010:
-	.loc 2 2384 0
-	ldr	r0, .L1780+24
+.LVL1995:
+	.loc 2 2437 0
+	ldr	r0, .L1767+24
 	bl	allocate_new_data_superblock
-.LVL2011:
-	.loc 2 2385 0
+.LVL1996:
+	.loc 2 2438 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL2012:
-.L1775:
-	.loc 2 2390 0
+.LVL1997:
+.L1764:
+	.loc 2 2443 0
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1764
-	.loc 2 2391 0
+	bne	.L1752
+	.loc 2 2444 0
 	bl	FtlVpcCheckAndModify
-.LVL2013:
-	b	.L1764
-.L1781:
+.LVL1998:
+	b	.L1752
+.LVL1999:
+.L1757:
+	.loc 2 2382 0
+	adds	r3, r3, #1
+.LVL2000:
+	b	.L1756
+.L1765:
+	.loc 2 2388 0
+	ldrh	r3, [r6]
+.LVL2001:
+	cmp	r3, #0
+	bne	.L1758
+	.loc 2 2427 0
+	bl	l2p_flush
+.LVL2002:
+	b	.L1766
+.L1768:
 	.align	2
-.L1780:
-	.word	.LANCHOR162
+.L1767:
+	.word	.LANCHOR161
 	.word	.LANCHOR4
-	.word	.LANCHOR81
-	.word	.LANCHOR33
-	.word	.LANCHOR56
 	.word	.LANCHOR79
+	.word	.LANCHOR33
+	.word	.LANCHOR55
+	.word	.LANCHOR39
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.word	.LANCHOR19
 	.word	.LANCHOR144
 	.word	.LANCHOR149
-.LBE306:
-.LBE305:
+.LBE339:
+.LBE338:
 	.cfi_endproc
 .LFE295:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -21507,11 +21475,11 @@ ftl_low_format:
 	.loc 3 629 0
 	movs	r3, #0
 	.loc 3 631 0
-	ldr	r6, .L1806
+	ldr	r6, .L1793
 	.loc 3 630 0
-	ldr	r2, .L1806+4
+	ldr	r2, .L1793+4
 	.loc 3 629 0
-	ldr	r5, .L1806+8
+	ldr	r5, .L1793+8
 	.loc 3 631 0
 	ldrh	r0, [r6]
 	.loc 3 630 0
@@ -21520,96 +21488,96 @@ ftl_low_format:
 	str	r3, [r5]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2014:
+.LVL2003:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2015:
-	cbz	r0, .L1783
+.LVL2004:
+	cbz	r0, .L1770
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2016:
-.L1783:
+.LVL2005:
+.L1770:
 	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1806+12
+	ldr	r3, .L1793+12
 	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1806+16
+	ldr	r2, .L1793+16
 	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1806+100
+	ldr	ip, .L1793+100
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r3]
 	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
 	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1806+20
+	ldr	r2, .L1793+20
 	str	r3, [sp, #4]
 	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
 	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1784:
-.LVL2017:
+.L1771:
+.LVL2006:
 	.loc 3 635 0 discriminator 1
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2018:
+.LVL2007:
 	cmp	r3, r1
-	blt	.L1785
-.LVL2019:
+	blt	.L1772
+.LVL2008:
 	.loc 3 642 0
-	ldr	r3, .L1806+24
-.LVL2020:
+	ldr	r3, .L1793+24
+.LVL2009:
 	.loc 3 641 0
 	movs	r7, #0
 	.loc 3 642 0
-	ldr	r10, .L1806+104
+	ldr	r10, .L1793+104
 	ldrh	r4, [r3]
-.LVL2021:
+.LVL2010:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2022:
-.L1786:
+.LVL2011:
+.L1773:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1787
+	bhi	.L1774
 	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1806+28
-.LVL2023:
+	ldr	r4, .L1793+28
+.LVL2012:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1788
-.LVL2024:
-.L1792:
+	bgt	.L1775
+.LVL2013:
+.L1779:
 	.loc 3 641 0
 	movs	r6, #0
 	mov	r7, r6
-.L1789:
+.L1776:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2025:
+.LVL2014:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1793
+	bhi	.L1780
 	.loc 3 658 0
 	ldrh	r2, [fp]
-	ldr	r3, .L1806+32
+	ldr	r3, .L1793+32
 	.loc 3 661 0
 	ldrh	r4, [r4]
-	ldr	r6, .L1806+36
+	ldr	r6, .L1793+36
 	.loc 3 658 0
 	str	r2, [r3]
 	.loc 3 661 0
-	ldr	r3, .L1806+40
+	ldr	r3, .L1793+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2026:
+.LVL2015:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2027:
+.LVL2016:
 	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
 	.loc 3 661 0
@@ -21617,21 +21585,21 @@ ftl_low_format:
 	str	r0, [r6]
 	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1806+44
+	ldr	r0, .L1793+44
 	strh	r1, [r0]	@ movhi
 	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1794
+	ble	.L1781
 	.loc 3 664 0
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2028:
+.LVL2017:
 	.loc 3 665 0
 	ldr	r3, [sp]
 	.loc 3 664 0
@@ -21641,13 +21609,13 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1794:
+.L1781:
 	.loc 3 668 0
-	ldr	r2, .L1806+48
+	ldr	r2, .L1793+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1796
+	cbz	r2, .L1783
 	.loc 3 669 0
-	ldr	r1, .L1806+44
+	ldr	r1, .L1793+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -21662,20 +21630,20 @@ ftl_low_format:
 	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1796:
+.L1783:
 	.loc 3 677 0
 	ldr	r3, [sp]
-	ldr	r7, .L1806+52
-.LVL2029:
+	ldr	r7, .L1793+52
+.LVL2018:
 	.loc 3 687 0
-	ldr	r10, .L1806+108
+	ldr	r10, .L1793+108
 	.loc 3 677 0
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
 	.loc 3 678 0
-	ldr	r3, .L1806+56
+	ldr	r3, .L1793+56
 	ldrh	r3, [r3]
 	.loc 3 677 0
 	str	r4, [r7]
@@ -21687,25 +21655,25 @@ ftl_low_format:
 	.loc 3 678 0
 	str	r4, [r6]
 	.loc 3 694 0
-	ldr	r6, .L1806+60
+	ldr	r6, .L1793+60
 	.loc 3 679 0
 	muls	r4, r3, r4
-	ldr	r3, .L1806+64
+	ldr	r3, .L1793+64
 	str	r4, [r3]
 	.loc 3 689 0
 	movw	r4, #65535
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2030:
+.LVL2019:
 	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2031:
+.LVL2020:
 	.loc 3 688 0
-	ldr	r2, .L1806+68
+	ldr	r2, .L1793+68
 	movs	r3, #0
 	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
@@ -21716,7 +21684,7 @@ ftl_low_format:
 	.loc 3 688 0
 	str	r3, [r2]
 	.loc 3 689 0
-	ldr	r2, .L1806+72
+	ldr	r2, .L1793+72
 	.loc 3 696 0
 	strh	r3, [r6]	@ movhi
 	.loc 3 690 0
@@ -21737,21 +21705,21 @@ ftl_low_format:
 	.loc 3 701 0
 	mov	r10, r6
 	.loc 3 698 0
-	ldr	r3, .L1806+76
+	ldr	r3, .L1793+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2032:
-.L1798:
+.LVL2021:
+.L1785:
 	.loc 3 701 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2033:
+.LVL2022:
 	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1799
+	bne	.L1786
 	.loc 3 705 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -21760,92 +21728,92 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
 	.loc 3 707 0
-	b	.L1798
-.LVL2034:
-.L1785:
+	b	.L1785
+.LVL2023:
+.L1772:
 	.loc 3 636 0 discriminator 3
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2035:
-	b	.L1784
-.LVL2036:
-.L1787:
+.LVL2024:
+	b	.L1771
+.LVL2025:
+.L1774:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2037:
+.LVL2026:
 	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2038:
+.LVL2027:
 	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2039:
+.LVL2028:
 	uxth	r7, r7
-.LVL2040:
+.LVL2029:
 	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2041:
-	b	.L1786
-.LVL2042:
-.L1788:
+.LVL2030:
+	b	.L1773
+.LVL2031:
+.L1775:
 	.loc 3 647 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2043:
-	ldr	r3, .L1806+80
+.LVL2032:
+	ldr	r3, .L1793+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2044:
+.LVL2033:
 	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2045:
+.LVL2034:
 	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2046:
-.L1790:
+.LVL2035:
+.L1777:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1792
+	bls	.L1779
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
 	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2047:
+.LVL2036:
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2048:
+.LVL2037:
 	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2049:
-	b	.L1790
-.LVL2050:
-.L1793:
+.LVL2038:
+	b	.L1777
+.LVL2039:
+.L1780:
 	.loc 3 657 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2051:
+.LVL2040:
 	add	r7, r7, r0
-.LVL2052:
+.LVL2041:
 	uxth	r7, r7
-.LVL2053:
-	b	.L1789
-.LVL2054:
-.L1799:
+.LVL2042:
+	b	.L1776
+.LVL2043:
+.L1786:
 	.loc 3 709 0
 	ldr	r3, [r5]
 	.loc 3 710 0
 	ldrh	r1, [r6, #4]
 	.loc 3 712 0
-	ldr	r4, .L1806+84
+	ldr	r4, .L1793+84
 	.loc 3 709 0
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
@@ -21871,15 +21839,15 @@ ftl_low_format:
 	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1800:
+.L1787:
 	.loc 3 717 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2055:
+.LVL2044:
 	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1801
+	cbnz	r3, .L1788
 	.loc 3 721 0
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -21888,8 +21856,8 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	.loc 3 723 0
-	b	.L1800
-.L1801:
+	b	.L1787
+.L1788:
 	.loc 3 725 0
 	ldr	r3, [r5]
 	.loc 3 726 0
@@ -21904,12 +21872,12 @@ ftl_low_format:
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	ldr	r3, .L1806+88
+	ldr	r3, .L1793+88
 	strh	r4, [r3]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2056:
-	ldr	r3, .L1806+92
+.LVL2045:
+	ldr	r3, .L1793+92
 	.loc 3 731 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
@@ -21928,53 +21896,53 @@ ftl_low_format:
 	str	r2, [r5]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2057:
+.LVL2046:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2058:
-	cbnz	r0, .L1802
+.LVL2047:
+	cbnz	r0, .L1789
 	.loc 3 737 0
-	ldr	r3, .L1806+96
+	ldr	r3, .L1793+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1802:
+.L1789:
 	.loc 3 739 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1807:
+.L1794:
 	.align	2
-.L1806:
+.L1793:
 	.word	.LANCHOR4
-	.word	.LANCHOR72
 	.word	.LANCHOR71
+	.word	.LANCHOR70
 	.word	.LANCHOR12
-	.word	.LANCHOR116
-	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR113
 	.word	.LANCHOR5
 	.word	.LANCHOR3
-	.word	.LANCHOR113
-	.word	.LANCHOR62
+	.word	.LANCHOR112
+	.word	.LANCHOR61
 	.word	.LANCHOR7
-	.word	.LANCHOR80
+	.word	.LANCHOR78
 	.word	.LANCHOR15
-	.word	.LANCHOR182
+	.word	.LANCHOR180
 	.word	.LANCHOR19
 	.word	.LANCHOR51
 	.word	.LANCHOR34
-	.word	.LANCHOR60
-	.word	.LANCHOR82
+	.word	.LANCHOR59
+	.word	.LANCHOR80
 	.word	.LANCHOR1
 	.word	.LANCHOR31
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR81
-	.word	.LANCHOR88
+	.word	.LANCHOR79
+	.word	.LANCHOR86
 	.word	168778952
 	.word	.LANCHOR6
-	.word	.LANCHOR43
+	.word	.LANCHOR42
 	.cfi_endproc
 .LFE213:
 	.size	ftl_low_format, .-ftl_low_format
@@ -21992,77 +21960,77 @@ sftl_init:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2059:
+.LVL2048:
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1814
+	ldr	r4, .L1801
 	.loc 3 749 0
-	ldr	r1, .L1814+4
-	ldr	r0, .L1814+8
+	ldr	r1, .L1801+4
+	ldr	r0, .L1801+8
 	.loc 3 746 0
 	str	r3, [r4]
 	.loc 3 749 0
 	bl	printf
-.LVL2060:
+.LVL2049:
 	.loc 3 750 0
-	ldr	r0, .L1814+12
+	ldr	r0, .L1801+12
 	bl	FtlConstantsInit
-.LVL2061:
+.LVL2050:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2062:
+.LVL2051:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2063:
+.LVL2052:
 	.loc 3 753 0
-	ldr	r3, .L1814+16
+	ldr	r3, .L1801+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2064:
+.LVL2053:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2065:
-	cbnz	r0, .L1812
+.LVL2054:
+	cbnz	r0, .L1799
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2066:
-	cbnz	r0, .L1812
+.LVL2055:
+	cbnz	r0, .L1799
 	.loc 3 779 0
 	movs	r3, #1
 	str	r3, [r4]
 	.loc 3 783 0
-	ldr	r3, .L1814+20
+	ldr	r3, .L1801+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1812
+	bhi	.L1799
 	movw	r4, #8129
-.L1811:
-.LVL2067:
-.LBB309:
+.L1798:
+.LVL2056:
+.LBB342:
 	.loc 3 786 0 discriminator 3
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2068:
+.LVL2057:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2069:
-	bne	.L1811
-.LVL2070:
-.L1812:
-.LBE309:
+.LVL2058:
+	bne	.L1798
+.LVL2059:
+.L1799:
+.LBE342:
 	.loc 3 794 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1815:
+.L1802:
 	.align	2
-.L1814:
-	.word	.LANCHOR88
+.L1801:
+	.word	.LANCHOR86
 	.word	.LC70
 	.word	.LC71
 	.word	.LANCHOR0
@@ -22086,10 +22054,10 @@ ftl_memcmp:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2071:
+.LVL2060:
 	.loc 1 253 0
 	b	memcmp
-.LVL2072:
+.LVL2061:
 	.cfi_endproc
 .LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -22191,7 +22159,6 @@ ftl_memcmp:
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
 	.global	p_plane_order_table
-	.global	g_req_cache
 	.global	req_gc_dst
 	.global	req_gc
 	.global	req_erase
@@ -22250,7 +22217,7 @@ DeviceCapacity:
 	.space	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -22306,7 +22273,7 @@ c_ftl_nand_data_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -22474,7 +22441,7 @@ c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -22494,7 +22461,7 @@ check_buf:
 	.space	4096
 	.section	.bss.check_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	check_spare_buf, %object
 	.size	check_spare_buf, 512
 check_spare_buf:
@@ -22507,7 +22474,7 @@ check_vpc_table:
 	.space	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -22541,7 +22508,7 @@ gSysFreeQueue:
 	.space	2056
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
@@ -22555,14 +22522,14 @@ gVendorBlkInfo:
 	.space	40
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -22576,21 +22543,21 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
@@ -22611,7 +22578,7 @@ g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -22625,70 +22592,70 @@ g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.space	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.space	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
@@ -22709,49 +22676,49 @@ g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -22772,35 +22739,35 @@ g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nand_ops,"aw",%nobits
 	.align	2
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 16
 g_nand_ops:
@@ -22828,91 +22795,84 @@ g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.space	2
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.space	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
-	.section	.bss.g_req_cache,"aw",%nobits
-	.align	2
-	.set	.LANCHOR150,. + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
-	.space	4
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -22926,42 +22886,42 @@ g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -22975,28 +22935,28 @@ g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.space	4
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
 	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -23010,14 +22970,13 @@ gp_ect_tbl_info:
 	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -23031,14 +22990,14 @@ p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
@@ -23052,7 +23011,7 @@ p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
@@ -23066,49 +23025,49 @@ p_free_data_block_list_head:
 	.space	4
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
@@ -23122,7 +23081,7 @@ p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -23170,7 +23129,7 @@ p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
@@ -23184,7 +23143,7 @@ p_sys_data_buf_1:
 	.space	4
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
@@ -23198,7 +23157,7 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
@@ -23240,14 +23199,14 @@ p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -23275,28 +23234,28 @@ req_read:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 20
 req_sys:
 	.space	20
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
 	.align	1
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",%progbits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
@@ -23313,14 +23272,20 @@ power_up_flag:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC94:
+.LC97:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC95:
+.LC98:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC96:
+.LC99:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
+.LC82:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC83:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
-.LC97:
+.LC100:
 	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
 .LC74:
@@ -23329,15 +23294,15 @@ power_up_flag:
 .LC73:
 	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC100:
+.LC103:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC86:
+.LC89:
 	.ascii	"FtlMapWritePage error = %x \012\000"
-.LC87:
+.LC90:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
-.LC82:
+.LC85:
 	.ascii	"%s error allocating memory. return -1\012\000"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
 .LC2:
@@ -23477,19 +23442,19 @@ power_up_flag:
 .LC69:
 	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC103:
+.LC106:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC99:
+.LC102:
 	.ascii	"spuer block %x vpn is 0\012 \000"
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",%progbits,1
-.LC102:
+.LC105:
 	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC101:
+.LC104:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
-.LC105:
+.LC108:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
 .LC72:
@@ -23499,175 +23464,175 @@ power_up_flag:
 .LC1:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
 	.section	.rodata.__func__.10046,"a",%progbits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	__func__.10046, %object
 	.size	__func__.10046, 23
 __func__.10046:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.__func__.10310,"a",%progbits
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	__func__.10310, %object
 	.size	__func__.10310, 15
 __func__.10310:
 	.ascii	"FlashReadPages\000"
 	.section	.rodata.__func__.10327,"a",%progbits
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	__func__.10327, %object
 	.size	__func__.10327, 15
 __func__.10327:
 	.ascii	"FlashProgPages\000"
-	.section	.rodata.__func__.8799,"a",%progbits
+	.section	.rodata.__func__.8802,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.8799, %object
-	.size	__func__.8799, 11
-__func__.8799:
+	.type	__func__.8802, %object
+	.size	__func__.8802, 11
+__func__.8802:
 	.ascii	"FtlMemInit\000"
-	.section	.rodata.__func__.8923,"a",%progbits
+	.section	.rodata.__func__.8926,"a",%progbits
 	.set	.LANCHOR170,. + 0
-	.type	__func__.8923, %object
-	.size	__func__.8923, 13
-__func__.8923:
+	.type	__func__.8926, %object
+	.size	__func__.8926, 13
+__func__.8926:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.8951,"a",%progbits
-	.set	.LANCHOR180,. + 0
-	.type	__func__.8951, %object
-	.size	__func__.8951, 9
-__func__.8951:
+	.section	.rodata.__func__.8954,"a",%progbits
+	.set	.LANCHOR178,. + 0
+	.type	__func__.8954, %object
+	.size	__func__.8954, 9
+__func__.8954:
 	.ascii	"FtlWrite\000"
-	.section	.rodata.__func__.9015,"a",%progbits
+	.section	.rodata.__func__.9018,"a",%progbits
 	.set	.LANCHOR139,. + 0
-	.type	__func__.9015, %object
-	.size	__func__.9015, 14
-__func__.9015:
+	.type	__func__.9018, %object
+	.size	__func__.9018, 14
+__func__.9018:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.9058,"a",%progbits
-	.set	.LANCHOR165,. + 0
-	.type	__func__.9058, %object
-	.size	__func__.9058, 11
-__func__.9058:
+	.section	.rodata.__func__.9061,"a",%progbits
+	.set	.LANCHOR164,. + 0
+	.type	__func__.9061, %object
+	.size	__func__.9061, 11
+__func__.9061:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.9181,"a",%progbits
+	.section	.rodata.__func__.9178,"a",%progbits
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9181, %object
-	.size	__func__.9181, 17
-__func__.9181:
+	.type	__func__.9178, %object
+	.size	__func__.9178, 17
+__func__.9178:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.9186,"a",%progbits
+	.section	.rodata.__func__.9183,"a",%progbits
 	.set	.LANCHOR46,. + 0
-	.type	__func__.9186, %object
-	.size	__func__.9186, 17
-__func__.9186:
+	.type	__func__.9183, %object
+	.size	__func__.9183, 17
+__func__.9183:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.9216,"a",%progbits
+	.section	.rodata.__func__.9214,"a",%progbits
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9216, %object
-	.size	__func__.9216, 17
-__func__.9216:
+	.type	__func__.9214, %object
+	.size	__func__.9214, 17
+__func__.9214:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.9248,"a",%progbits
+	.section	.rodata.__func__.9246,"a",%progbits
 	.set	.LANCHOR54,. + 0
-	.type	__func__.9248, %object
-	.size	__func__.9248, 22
-__func__.9248:
+	.type	__func__.9246, %object
+	.size	__func__.9246, 22
+__func__.9246:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.9257,"a",%progbits
+	.section	.rodata.__func__.9255,"a",%progbits
 	.set	.LANCHOR140,. + 0
-	.type	__func__.9257, %object
-	.size	__func__.9257, 16
-__func__.9257:
+	.type	__func__.9255, %object
+	.size	__func__.9255, 16
+__func__.9255:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.9289,"a",%progbits
-	.set	.LANCHOR55,. + 0
-	.type	__func__.9289, %object
-	.size	__func__.9289, 26
-__func__.9289:
+	.section	.rodata.__func__.9288,"a",%progbits
+	.set	.LANCHOR116,. + 0
+	.type	__func__.9288, %object
+	.size	__func__.9288, 26
+__func__.9288:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.9300,"a",%progbits
+	.section	.rodata.__func__.9299,"a",%progbits
 	.set	.LANCHOR143,. + 0
-	.type	__func__.9300, %object
-	.size	__func__.9300, 15
-__func__.9300:
+	.type	__func__.9299, %object
+	.size	__func__.9299, 15
+__func__.9299:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.9314,"a",%progbits
+	.section	.rodata.__func__.9313,"a",%progbits
 	.set	.LANCHOR141,. + 0
-	.type	__func__.9314, %object
-	.size	__func__.9314, 31
-__func__.9314:
+	.type	__func__.9313, %object
+	.size	__func__.9313, 31
+__func__.9313:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.9328,"a",%progbits
+	.section	.rodata.__func__.9327,"a",%progbits
 	.set	.LANCHOR142,. + 0
-	.type	__func__.9328, %object
-	.size	__func__.9328, 16
-__func__.9328:
+	.type	__func__.9327, %object
+	.size	__func__.9327, 16
+__func__.9327:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.9353,"a",%progbits
-	.set	.LANCHOR58,. + 0
-	.type	__func__.9353, %object
-	.size	__func__.9353, 22
-__func__.9353:
+	.section	.rodata.__func__.9352,"a",%progbits
+	.set	.LANCHOR57,. + 0
+	.type	__func__.9352, %object
+	.size	__func__.9352, 22
+__func__.9352:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.9370,"a",%progbits
+	.section	.rodata.__func__.9369,"a",%progbits
 	.set	.LANCHOR145,. + 0
-	.type	__func__.9370, %object
-	.size	__func__.9370, 9
-__func__.9370:
+	.type	__func__.9369, %object
+	.size	__func__.9369, 9
+__func__.9369:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.9443,"a",%progbits
-	.set	.LANCHOR167,. + 0
-	.type	__func__.9443, %object
-	.size	__func__.9443, 15
-__func__.9443:
+	.section	.rodata.__func__.9442,"a",%progbits
+	.set	.LANCHOR166,. + 0
+	.type	__func__.9442, %object
+	.size	__func__.9442, 15
+__func__.9442:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.9465,"a",%progbits
+	.section	.rodata.__func__.9464,"a",%progbits
 	.set	.LANCHOR148,. + 0
-	.type	__func__.9465, %object
-	.size	__func__.9465, 14
-__func__.9465:
+	.type	__func__.9464, %object
+	.size	__func__.9464, 14
+__func__.9464:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.9522,"a",%progbits
-	.set	.LANCHOR181,. + 0
-	.type	__func__.9522, %object
-	.size	__func__.9522, 15
-__func__.9522:
+	.section	.rodata.__func__.9521,"a",%progbits
+	.set	.LANCHOR179,. + 0
+	.type	__func__.9521, %object
+	.size	__func__.9521, 15
+__func__.9521:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.9585,"a",%progbits
+	.section	.rodata.__func__.9584,"a",%progbits
 	.set	.LANCHOR146,. + 0
-	.type	__func__.9585, %object
-	.size	__func__.9585, 16
-__func__.9585:
+	.type	__func__.9584, %object
+	.size	__func__.9584, 16
+__func__.9584:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.9619,"a",%progbits
-	.set	.LANCHOR161,. + 0
-	.type	__func__.9619, %object
-	.size	__func__.9619, 22
-__func__.9619:
+	.section	.rodata.__func__.9618,"a",%progbits
+	.set	.LANCHOR160,. + 0
+	.type	__func__.9618, %object
+	.size	__func__.9618, 22
+__func__.9618:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.9676,"a",%progbits
-	.set	.LANCHOR61,. + 0
-	.type	__func__.9676, %object
-	.size	__func__.9676, 16
-__func__.9676:
+	.section	.rodata.__func__.9675,"a",%progbits
+	.set	.LANCHOR60,. + 0
+	.type	__func__.9675, %object
+	.size	__func__.9675, 16
+__func__.9675:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.9697,"a",%progbits
-	.set	.LANCHOR155,. + 0
-	.type	__func__.9697, %object
-	.size	__func__.9697, 18
-__func__.9697:
+	.section	.rodata.__func__.9696,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9696, %object
+	.size	__func__.9696, 18
+__func__.9696:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.9722,"a",%progbits
+	.section	.rodata.__func__.9721,"a",%progbits
 	.set	.LANCHOR168,. + 0
-	.type	__func__.9722, %object
-	.size	__func__.9722, 21
-__func__.9722:
+	.type	__func__.9721, %object
+	.size	__func__.9721, 21
+__func__.9721:
 	.ascii	"FtlVpcCheckAndModify\000"
-	.section	.rodata.__func__.9738,"a",%progbits
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9738, %object
-	.size	__func__.9738, 14
-__func__.9738:
+	.section	.rodata.__func__.9737,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.9737, %object
+	.size	__func__.9737, 14
+__func__.9737:
 	.ascii	"ftl_check_vpc\000"
 	.section	.rodata.__func__.9822,"a",%progbits
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	__func__.9822, %object
 	.size	__func__.9822, 25
 __func__.9822:
@@ -23679,56 +23644,59 @@ __func__.9822:
 __func__.9843:
 	.ascii	"allocate_new_data_superblock\000"
 	.section	.rodata.__func__.9850,"a",%progbits
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	__func__.9850, %object
 	.size	__func__.9850, 19
 __func__.9850:
 	.ascii	"get_new_active_ppa\000"
 	.section	.rodata.__func__.9863,"a",%progbits
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	__func__.9863, %object
 	.size	__func__.9863, 16
 __func__.9863:
 	.ascii	"update_vpc_list\000"
 	.section	.rodata.__func__.9870,"a",%progbits
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	__func__.9870, %object
 	.size	__func__.9870, 20
 __func__.9870:
 	.ascii	"decrement_vpc_count\000"
 	.section	.rodata.__func__.9940,"a",%progbits
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.9940, %object
 	.size	__func__.9940, 19
 __func__.9940:
 	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC98:
+.LC101:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
-.LC91:
+.LC94:
 	.ascii	"...%s enter...\012\000"
-.LC92:
+.LC95:
 	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
-.LC93:
+.LC96:
 	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC84:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
-.LC88:
+.LC91:
 	.ascii	"ftl_scan_all_data = %x\012\000"
-.LC89:
+.LC92:
 	.ascii	"scan lpa = %x ppa= %x\012\000"
-.LC90:
+.LC93:
 	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
 	.ascii	"\000"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC83:
+.LC86:
 	.ascii	"region_id = %x phyAddr = %x\012\000"
-.LC84:
+.LC87:
 	.ascii	"spare:\000"
-.LC85:
+.LC88:
 	.ascii	"map_ppn:\000"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
-.LC104:
+.LC107:
 	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
 .LC75:
@@ -23741,7 +23709,7 @@ __func__.9940:
 	.ascii	"\012\000"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
 .LC70:
-	.ascii	"SFTL version: 5.0.43 20180116\000"
+	.ascii	"SFTL version: 5.0.44 20180713\000"
 .LC71:
 	.ascii	"%s\012\000"
 	.text
@@ -23773,16 +23741,16 @@ __func__.9940:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x92b5
+	.4byte	0x92df
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF882
+	.4byte	.LASF880
 	.byte	0xc
-	.4byte	.LASF883
-	.4byte	.LASF884
-	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x208
 	.4byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -27001,106 +26969,98 @@ __func__.9940:
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	req_gc_dst
-	.uleb128 0x26
-	.4byte	.LASF443
-	.byte	0x1b
-	.byte	0x4d
-	.4byte	0x19f9
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	g_req_cache
 	.uleb128 0xa
 	.4byte	0xdaf
-	.4byte	0x1a64
+	.4byte	0x1a53
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF444
+	.4byte	.LASF443
 	.byte	0x1b
-	.byte	0x4f
-	.4byte	0x1a54
+	.byte	0x4d
+	.4byte	0x1a43
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_plane_order_table
 	.uleb128 0x26
-	.4byte	.LASF445
+	.4byte	.LASF444
 	.byte	0x1b
-	.byte	0x51
+	.byte	0x4f
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf
 	.uleb128 0x26
-	.4byte	.LASF446
+	.4byte	.LASF445
 	.byte	0x1b
-	.byte	0x52
+	.byte	0x50
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_data_buf_1
 	.uleb128 0x26
-	.4byte	.LASF447
+	.4byte	.LASF446
 	.byte	0x1b
-	.byte	0x53
+	.byte	0x51
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_data_buf
 	.uleb128 0x26
-	.4byte	.LASF448
+	.4byte	.LASF447
 	.byte	0x1b
-	.byte	0x54
+	.byte	0x52
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.uleb128 0x26
-	.4byte	.LASF449
+	.4byte	.LASF448
 	.byte	0x1b
-	.byte	0x55
+	.byte	0x53
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_0
 	.uleb128 0x26
-	.4byte	.LASF450
+	.4byte	.LASF449
 	.byte	0x1b
-	.byte	0x56
+	.byte	0x54
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_data_buf_1
 	.uleb128 0x26
-	.4byte	.LASF451
+	.4byte	.LASF450
 	.byte	0x1b
-	.byte	0x57
+	.byte	0x55
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_io_spare_buf
 	.uleb128 0x26
-	.4byte	.LASF452
+	.4byte	.LASF451
 	.byte	0x1b
-	.byte	0x58
+	.byte	0x56
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_spare_buf
 	.uleb128 0x26
-	.4byte	.LASF453
+	.4byte	.LASF452
 	.byte	0x1b
-	.byte	0x59
+	.byte	0x57
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_data_buf
 	.uleb128 0x26
-	.4byte	.LASF454
+	.4byte	.LASF453
 	.byte	0x1b
-	.byte	0x5a
-	.4byte	0x1b1f
+	.byte	0x58
+	.4byte	0x1b0e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_gc_page_buf_info
@@ -27108,26 +27068,26 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x16c7
 	.uleb128 0x26
-	.4byte	.LASF455
+	.4byte	.LASF454
 	.byte	0x1b
-	.byte	0x5b
+	.byte	0x59
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_gc_page_buf_num
 	.uleb128 0x26
-	.4byte	.LASF456
+	.4byte	.LASF455
 	.byte	0x1b
-	.byte	0x5c
+	.byte	0x5a
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_num_req
 	.uleb128 0x26
-	.4byte	.LASF457
+	.4byte	.LASF456
 	.byte	0x1b
-	.byte	0x5d
-	.4byte	0x1b58
+	.byte	0x5b
+	.4byte	0x1b47
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_ect_tbl_info
@@ -27135,146 +27095,146 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x112c
 	.uleb128 0x26
-	.4byte	.LASF458
+	.4byte	.LASF457
 	.byte	0x1b
-	.byte	0x5e
+	.byte	0x5c
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_info_size
 	.uleb128 0x26
-	.4byte	.LASF459
+	.4byte	.LASF458
 	.byte	0x1b
-	.byte	0x5f
+	.byte	0x5d
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_erase_count_table
 	.uleb128 0x26
-	.4byte	.LASF460
+	.4byte	.LASF459
 	.byte	0x1b
-	.byte	0x61
+	.byte	0x5f
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_swl_mul_table
 	.uleb128 0x26
-	.4byte	.LASF461
+	.4byte	.LASF460
 	.byte	0x1b
-	.byte	0x62
+	.byte	0x60
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_swl_count
 	.uleb128 0x26
-	.4byte	.LASF462
+	.4byte	.LASF461
 	.byte	0x1b
-	.byte	0x63
+	.byte	0x61
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_table
 	.uleb128 0x26
-	.4byte	.LASF463
+	.4byte	.LASF462
 	.byte	0x1b
-	.byte	0x64
+	.byte	0x62
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_valid_page_count_check_table
 	.uleb128 0x26
-	.4byte	.LASF464
+	.4byte	.LASF463
 	.byte	0x1b
-	.byte	0x65
+	.byte	0x63
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_blk_mode_table
 	.uleb128 0x26
-	.4byte	.LASF465
+	.4byte	.LASF464
 	.byte	0x1b
-	.byte	0x67
+	.byte	0x65
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_table
 	.uleb128 0x26
-	.4byte	.LASF466
+	.4byte	.LASF465
 	.byte	0x1b
-	.byte	0x68
+	.byte	0x66
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_valid_page_count
 	.uleb128 0x26
-	.4byte	.LASF467
+	.4byte	.LASF466
 	.byte	0x1b
-	.byte	0x69
+	.byte	0x67
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_block_ver_table
 	.uleb128 0x26
-	.4byte	.LASF468
+	.4byte	.LASF467
 	.byte	0x1b
-	.byte	0x6a
+	.byte	0x68
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_map_region_ppn_table
 	.uleb128 0x26
-	.4byte	.LASF469
+	.4byte	.LASF468
 	.byte	0x1b
-	.byte	0x6b
+	.byte	0x69
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_map_block
 	.uleb128 0x26
-	.4byte	.LASF470
+	.4byte	.LASF469
 	.byte	0x1b
-	.byte	0x6d
+	.byte	0x6b
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_table
 	.uleb128 0x26
-	.4byte	.LASF471
+	.4byte	.LASF470
 	.byte	0x1b
-	.byte	0x6e
+	.byte	0x6c
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_valid_page_count
 	.uleb128 0x26
-	.4byte	.LASF472
+	.4byte	.LASF471
 	.byte	0x1b
-	.byte	0x6f
+	.byte	0x6d
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_block_ver_table
 	.uleb128 0x26
-	.4byte	.LASF473
+	.4byte	.LASF472
 	.byte	0x1b
-	.byte	0x70
+	.byte	0x6e
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_vendor_region_ppn_table
 	.uleb128 0x26
-	.4byte	.LASF474
+	.4byte	.LASF473
 	.byte	0x1b
-	.byte	0x71
+	.byte	0x6f
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_vendor_block
 	.uleb128 0x26
-	.4byte	.LASF475
+	.4byte	.LASF474
 	.byte	0x1b
-	.byte	0x73
-	.4byte	0x1c90
+	.byte	0x71
+	.4byte	0x1c7f
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_ram_map
@@ -27282,26 +27242,26 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x10ef
 	.uleb128 0x26
-	.4byte	.LASF476
+	.4byte	.LASF475
 	.byte	0x1b
-	.byte	0x74
+	.byte	0x72
 	.4byte	0xff2
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_l2p_map_buf
 	.uleb128 0x26
-	.4byte	.LASF477
+	.4byte	.LASF476
 	.byte	0x1b
-	.byte	0x75
+	.byte	0x73
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_l2p_last_update_region_id
 	.uleb128 0x26
-	.4byte	.LASF478
+	.4byte	.LASF477
 	.byte	0x1b
-	.byte	0x7c
-	.4byte	0x1cc9
+	.byte	0x7a
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_table
@@ -27309,82 +27269,82 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1564
 	.uleb128 0x26
-	.4byte	.LASF479
+	.4byte	.LASF478
 	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1cc9
+	.byte	0x7b
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_free_data_block_list_head
 	.uleb128 0x26
-	.4byte	.LASF480
+	.4byte	.LASF479
 	.byte	0x1b
-	.byte	0x7f
-	.4byte	0x1cc9
+	.byte	0x7d
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_head
 	.uleb128 0x26
-	.4byte	.LASF481
+	.4byte	.LASF480
 	.byte	0x1b
-	.byte	0x80
-	.4byte	0x1cc9
+	.byte	0x7e
+	.4byte	0x1cb8
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_data_block_list_tail
 	.uleb128 0x26
-	.4byte	.LASF482
+	.4byte	.LASF481
 	.byte	0x1b
-	.byte	0x81
+	.byte	0x7f
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
 	.uleb128 0x26
-	.4byte	.LASF483
+	.4byte	.LASF482
 	.byte	0x1b
-	.byte	0x82
+	.byte	0x80
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
 	.uleb128 0x26
-	.4byte	.LASF484
+	.4byte	.LASF483
 	.byte	0x1b
-	.byte	0x83
+	.byte	0x81
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_active_superblock
 	.uleb128 0x26
-	.4byte	.LASF485
+	.4byte	.LASF484
 	.byte	0x1b
-	.byte	0x84
+	.byte	0x82
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_buffer_superblock
 	.uleb128 0x26
-	.4byte	.LASF486
+	.4byte	.LASF485
 	.byte	0x1b
-	.byte	0x85
+	.byte	0x83
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_temp_superblock
 	.uleb128 0x26
-	.4byte	.LASF487
+	.4byte	.LASF486
 	.byte	0x1b
-	.byte	0x86
+	.byte	0x84
 	.4byte	0x15f0
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_superblock
 	.uleb128 0x26
-	.4byte	.LASF488
+	.4byte	.LASF487
 	.byte	0x1b
-	.byte	0x87
-	.4byte	0x1d79
+	.byte	0x85
+	.4byte	0x1d68
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gp_last_act_superblock
@@ -27392,26 +27352,26 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x15f0
 	.uleb128 0x26
-	.4byte	.LASF489
+	.4byte	.LASF488
 	.byte	0x1b
-	.byte	0x88
+	.byte	0x86
 	.4byte	0x1311
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_save_data
 	.uleb128 0x26
-	.4byte	.LASF490
+	.4byte	.LASF489
 	.byte	0x1b
-	.byte	0x89
+	.byte	0x87
 	.4byte	0x140e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_sys_ext_data
 	.uleb128 0x26
-	.4byte	.LASF491
+	.4byte	.LASF490
 	.byte	0x1b
-	.byte	0x8b
-	.4byte	0x1db2
+	.byte	0x89
+	.4byte	0x1da1
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_page_info
@@ -27419,368 +27379,368 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1692
 	.uleb128 0x26
-	.4byte	.LASF492
+	.4byte	.LASF491
 	.byte	0x1b
-	.byte	0x8c
+	.byte	0x8a
 	.4byte	0x10e9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	p_gc_blk_tbl
 	.uleb128 0x26
-	.4byte	.LASF493
+	.4byte	.LASF492
 	.byte	0x1b
-	.byte	0x8d
+	.byte	0x8b
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_num
 	.uleb128 0x26
-	.4byte	.LASF494
+	.4byte	.LASF493
 	.byte	0x1b
-	.byte	0x8e
+	.byte	0x8c
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_page_offset
 	.uleb128 0x26
-	.4byte	.LASF495
+	.4byte	.LASF494
 	.byte	0x1b
-	.byte	0x8f
+	.byte	0x8d
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x26
-	.4byte	.LASF496
+	.4byte	.LASF495
 	.byte	0x1b
-	.byte	0x90
+	.byte	0x8e
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x26
-	.4byte	.LASF497
+	.4byte	.LASF496
 	.byte	0x1b
-	.byte	0x91
+	.byte	0x8f
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk
 	.uleb128 0x26
-	.4byte	.LASF498
+	.4byte	.LASF497
 	.byte	0x1b
-	.byte	0x92
+	.byte	0x90
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_next_blk_1
 	.uleb128 0x26
-	.4byte	.LASF499
+	.4byte	.LASF498
 	.byte	0x1b
-	.byte	0x93
+	.byte	0x91
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_num
 	.uleb128 0x26
-	.4byte	.LASF500
+	.4byte	.LASF499
 	.byte	0x1b
-	.byte	0x94
+	.byte	0x92
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_gc_index
 	.uleb128 0xa
 	.4byte	0xdba
-	.4byte	0x1e61
+	.4byte	0x1e50
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x10
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF501
+	.4byte	.LASF500
 	.byte	0x1b
-	.byte	0x95
-	.4byte	0x1e51
+	.byte	0x93
+	.4byte	0x1e40
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x26
-	.4byte	.LASF502
+	.4byte	.LASF501
 	.byte	0x1b
-	.byte	0x97
+	.byte	0x95
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_free_blk_threshold
 	.uleb128 0x26
-	.4byte	.LASF503
+	.4byte	.LASF502
 	.byte	0x1b
-	.byte	0x98
+	.byte	0x96
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x26
-	.4byte	.LASF504
+	.4byte	.LASF503
 	.byte	0x1b
-	.byte	0x99
+	.byte	0x97
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_blk_index
 	.uleb128 0x26
-	.4byte	.LASF505
+	.4byte	.LASF504
 	.byte	0x1b
-	.byte	0x9b
+	.byte	0x99
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_gc_page_count
 	.uleb128 0x26
-	.4byte	.LASF506
+	.4byte	.LASF505
 	.byte	0x1b
-	.byte	0x9c
+	.byte	0x9a
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_page_count
 	.uleb128 0x26
-	.4byte	.LASF507
+	.4byte	.LASF506
 	.byte	0x1b
-	.byte	0x9d
+	.byte	0x9b
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_write_sector
 	.uleb128 0x26
-	.4byte	.LASF508
+	.4byte	.LASF507
 	.byte	0x1b
-	.byte	0x9e
+	.byte	0x9c
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_sector
 	.uleb128 0x26
-	.4byte	.LASF509
+	.4byte	.LASF508
 	.byte	0x1b
-	.byte	0xa0
+	.byte	0x9e
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_discard_page_count
 	.uleb128 0x26
-	.4byte	.LASF510
+	.4byte	.LASF509
 	.byte	0x1b
-	.byte	0xa1
+	.byte	0x9f
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_read_page_count
 	.uleb128 0x26
-	.4byte	.LASF511
+	.4byte	.LASF510
 	.byte	0x1b
-	.byte	0xa2
+	.byte	0xa0
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_tmp_data_superblock_id
 	.uleb128 0x26
-	.4byte	.LASF512
+	.4byte	.LASF511
 	.byte	0x1b
-	.byte	0xa3
+	.byte	0xa1
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_cache_write_count
 	.uleb128 0x26
-	.4byte	.LASF513
+	.4byte	.LASF512
 	.byte	0x1b
-	.byte	0xa4
+	.byte	0xa2
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_l2p_write_count
 	.uleb128 0x26
-	.4byte	.LASF514
+	.4byte	.LASF513
 	.byte	0x1b
-	.byte	0xa6
+	.byte	0xa4
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_mlc_erase_count
 	.uleb128 0x26
-	.4byte	.LASF515
+	.4byte	.LASF514
 	.byte	0x1b
-	.byte	0xa7
+	.byte	0xa5
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_avg_erase_count
 	.uleb128 0x26
-	.4byte	.LASF516
+	.4byte	.LASF515
 	.byte	0x1b
-	.byte	0xa8
+	.byte	0xa6
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_min_erase_count
 	.uleb128 0x26
-	.4byte	.LASF517
+	.4byte	.LASF516
 	.byte	0x1b
-	.byte	0xa9
+	.byte	0xa7
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_slc_erase_count
 	.uleb128 0x26
-	.4byte	.LASF518
+	.4byte	.LASF517
 	.byte	0x1b
-	.byte	0xaa
+	.byte	0xa8
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_totle_sys_slc_erase_count
 	.uleb128 0x26
-	.4byte	.LASF519
+	.4byte	.LASF518
 	.byte	0x1b
-	.byte	0xab
+	.byte	0xa9
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_max_erase_count
 	.uleb128 0x26
-	.4byte	.LASF520
+	.4byte	.LASF519
 	.byte	0x1b
-	.byte	0xac
+	.byte	0xaa
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_gc_progress
 	.uleb128 0x26
-	.4byte	.LASF521
+	.4byte	.LASF520
 	.byte	0x1b
-	.byte	0xad
+	.byte	0xab
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_in_swl_replace
 	.uleb128 0x26
-	.4byte	.LASF522
+	.4byte	.LASF521
 	.byte	0x1b
-	.byte	0xae
+	.byte	0xac
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ftl_nand_free_count
 	.uleb128 0x26
-	.4byte	.LASF523
+	.4byte	.LASF522
 	.byte	0x1b
-	.byte	0xaf
+	.byte	0xad
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block
 	.uleb128 0x26
-	.4byte	.LASF524
+	.4byte	.LASF523
 	.byte	0x1b
-	.byte	0xb0
+	.byte	0xae
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_head_data_block_count
 	.uleb128 0x26
-	.4byte	.LASF525
+	.4byte	.LASF524
 	.byte	0x1b
-	.byte	0xb1
+	.byte	0xaf
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_gc_skip_write_count
 	.uleb128 0x26
-	.4byte	.LASF526
+	.4byte	.LASF525
 	.byte	0x1b
-	.byte	0xb2
+	.byte	0xb0
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_cur_erase_blk
 	.uleb128 0x26
-	.4byte	.LASF527
+	.4byte	.LASF526
 	.byte	0x1b
-	.byte	0xb4
+	.byte	0xb2
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_num
 	.uleb128 0x26
-	.4byte	.LASF528
+	.4byte	.LASF527
 	.byte	0x1b
-	.byte	0xb5
+	.byte	0xb3
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_page_min_ver
 	.uleb128 0xa
 	.4byte	0xdc5
-	.4byte	0x204d
+	.4byte	0x203c
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x26
-	.4byte	.LASF529
+	.4byte	.LASF528
 	.byte	0x1b
-	.byte	0xb6
-	.4byte	0x203d
+	.byte	0xb4
+	.4byte	0x202c
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_recovery_ppa_tbl
 	.uleb128 0x26
-	.4byte	.LASF530
+	.4byte	.LASF529
 	.byte	0x1b
-	.byte	0xb7
+	.byte	0xb5
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	c_mlc_erase_count_value
 	.uleb128 0x26
-	.4byte	.LASF531
+	.4byte	.LASF530
 	.byte	0x1b
-	.byte	0xb8
+	.byte	0xb6
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_power_lost_recovery_flag
 	.uleb128 0x4
-	.4byte	.LASF532
+	.4byte	.LASF531
 	.byte	0x18
 	.byte	0x14
 	.4byte	0xe35
 	.uleb128 0x4
-	.4byte	.LASF533
+	.4byte	.LASF532
 	.byte	0x18
 	.byte	0x15
 	.4byte	0xe35
 	.uleb128 0x4
-	.4byte	.LASF534
+	.4byte	.LASF533
 	.byte	0x18
 	.byte	0x16
 	.4byte	0xed7
 	.uleb128 0xa
 	.4byte	0xb5
-	.4byte	0x20b2
+	.4byte	0x20a1
 	.uleb128 0x15
 	.4byte	0xd6
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF535
+	.4byte	.LASF534
 	.byte	0x18
 	.byte	0x17
-	.4byte	0x20a1
+	.4byte	0x2090
 	.uleb128 0x26
-	.4byte	.LASF536
+	.4byte	.LASF535
 	.byte	0x3
 	.byte	0x6
 	.4byte	0xdc5
@@ -27788,7 +27748,7 @@ __func__.9940:
 	.byte	0x3
 	.4byte	DeviceCapacity
 	.uleb128 0x26
-	.4byte	.LASF537
+	.4byte	.LASF536
 	.byte	0x3
 	.byte	0x7
 	.4byte	0xdc5
@@ -27796,74 +27756,74 @@ __func__.9940:
 	.byte	0x3
 	.4byte	gFtlInitStatus
 	.uleb128 0x4
-	.4byte	.LASF538
+	.4byte	.LASF537
 	.byte	0x3
 	.byte	0x6d
 	.4byte	0xdc5
 	.uleb128 0x4
-	.4byte	.LASF539
+	.4byte	.LASF538
 	.byte	0x3
 	.byte	0x6e
 	.4byte	0xdc5
 	.uleb128 0x4
-	.4byte	.LASF540
+	.4byte	.LASF539
 	.byte	0x3
 	.byte	0x6f
 	.4byte	0xdc5
 	.uleb128 0x4
-	.4byte	.LASF541
+	.4byte	.LASF540
 	.byte	0x3
 	.byte	0x70
 	.4byte	0xdc5
 	.uleb128 0x27
-	.4byte	.LASF542
+	.4byte	.LASF541
 	.byte	0x3
-	.2byte	0x3c0
+	.2byte	0x3bc
 	.4byte	0x50
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	power_up_flag
 	.uleb128 0x28
-	.4byte	.LASF546
+	.4byte	.LASF545
 	.byte	0x3
-	.2byte	0x483
+	.2byte	0x45f
 	.4byte	0xdc5
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	gc_discard_updated
 	.uleb128 0x27
-	.4byte	.LASF543
+	.4byte	.LASF542
 	.byte	0x2
-	.2byte	0x35b
+	.2byte	0x38c
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_ect_tbl_power_up_flush
 	.uleb128 0x27
-	.4byte	.LASF544
+	.4byte	.LASF543
 	.byte	0x2
-	.2byte	0x370
+	.2byte	0x3a1
 	.4byte	0xdba
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	FtlUpdateVaildLpnCount
 	.uleb128 0xa
 	.4byte	0xdba
-	.4byte	0x2164
+	.4byte	0x2153
 	.uleb128 0x15
 	.4byte	0xd6
 	.2byte	0x1fff
 	.byte	0
 	.uleb128 0x27
-	.4byte	.LASF545
+	.4byte	.LASF544
 	.byte	0x2
-	.2byte	0x8ad
-	.4byte	0x2153
+	.2byte	0x8df
+	.4byte	0x2142
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_vpc_table
 	.uleb128 0x29
-	.4byte	.LASF547
+	.4byte	.LASF546
 	.byte	0x5
 	.byte	0x6d
 	.4byte	0xdba
@@ -27871,7 +27831,7 @@ __func__.9940:
 	.byte	0x3
 	.4byte	ftl_gc_temp_block_bops_scan_page_addr
 	.uleb128 0x27
-	.4byte	.LASF548
+	.4byte	.LASF547
 	.byte	0x5
 	.2byte	0x1d4
 	.4byte	0xdba
@@ -27879,26 +27839,26 @@ __func__.9940:
 	.byte	0x3
 	.4byte	gc_ink_free_return_value
 	.uleb128 0xc
-	.4byte	.LASF549
+	.4byte	.LASF548
 	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x107
 	.uleb128 0xc
-	.4byte	.LASF550
+	.4byte	.LASF549
 	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x107
 	.uleb128 0xc
-	.4byte	.LASF551
+	.4byte	.LASF550
 	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x107
 	.uleb128 0xf
-	.4byte	.LASF552
+	.4byte	.LASF551
 	.byte	0x4
 	.byte	0x6
 	.byte	0xc
-	.4byte	0x21d6
+	.4byte	0x21c5
 	.uleb128 0x16
 	.ascii	"pid\000"
 	.byte	0x6
@@ -27907,37 +27867,37 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF553
+	.4byte	.LASF552
 	.byte	0x6
 	.byte	0x10
-	.4byte	0x21e1
+	.4byte	0x21d0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x21bd
+	.4byte	0x21ac
 	.uleb128 0x2a
-	.4byte	0x208b
+	.4byte	0x207a
 	.byte	0x1
 	.byte	0x10
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_nand_phy_info
 	.uleb128 0x2a
-	.4byte	0x2096
+	.4byte	0x2085
 	.byte	0x1
 	.byte	0x11
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	g_nand_ops
 	.uleb128 0x29
-	.4byte	.LASF554
+	.4byte	.LASF553
 	.byte	0x1
 	.byte	0x13
-	.4byte	0x20a1
+	.4byte	0x2090
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_buf
 	.uleb128 0x2a
-	.4byte	0x20b2
+	.4byte	0x20a1
 	.byte	0x1
 	.byte	0x14
 	.uleb128 0x5
@@ -27945,21 +27905,21 @@ __func__.9940:
 	.4byte	ftl_temp_buf
 	.uleb128 0xa
 	.4byte	0xb5
-	.4byte	0x222f
+	.4byte	0x221e
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x7f
 	.byte	0
 	.uleb128 0x29
-	.4byte	.LASF555
+	.4byte	.LASF554
 	.byte	0x1
 	.byte	0x15
-	.4byte	0x221f
+	.4byte	0x220e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	check_spare_buf
 	.uleb128 0x2b
-	.4byte	.LASF558
+	.4byte	.LASF557
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x50
@@ -27967,28 +27927,28 @@ __func__.9940:
 	.4byte	.LFE351-.LFB351
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x22a6
+	.4byte	0x2295
 	.uleb128 0x2c
-	.4byte	.LASF556
+	.4byte	.LASF555
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST455
+	.4byte	.LLST454
 	.uleb128 0x2c
-	.4byte	.LASF557
+	.4byte	.LASF556
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST456
+	.4byte	.LLST455
 	.uleb128 0x2c
 	.4byte	.LASF325
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x7b
-	.4byte	.LLST457
+	.4byte	.LLST456
 	.uleb128 0x2d
-	.4byte	.LVL2072
-	.4byte	0x9268
+	.4byte	.LVL2061
+	.4byte	0x9292
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28013,7 +27973,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF559
+	.4byte	.LASF558
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x128
@@ -28021,15 +27981,15 @@ __func__.9940:
 	.4byte	.LFE350-.LFB350
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x230c
+	.4byte	0x22fb
 	.uleb128 0x2c
-	.4byte	.LASF560
+	.4byte	.LASF559
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x128
 	.4byte	.LLST287
 	.uleb128 0x2c
-	.4byte	.LASF561
+	.4byte	.LASF560
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x16b
@@ -28041,8 +28001,8 @@ __func__.9940:
 	.4byte	0x7b
 	.4byte	.LLST289
 	.uleb128 0x2d
-	.4byte	.LVL1162
-	.4byte	0x9273
+	.4byte	.LVL1170
+	.4byte	0x929d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28067,7 +28027,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF562
+	.4byte	.LASF561
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x128
@@ -28075,7 +28035,7 @@ __func__.9940:
 	.4byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x236c
+	.4byte	0x235b
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
@@ -28095,8 +28055,8 @@ __func__.9940:
 	.4byte	0x7b
 	.4byte	.LLST193
 	.uleb128 0x2d
-	.4byte	.LVL698
-	.4byte	0x927f
+	.4byte	.LVL706
+	.4byte	0x92a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28121,7 +28081,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF563
+	.4byte	.LASF562
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xaa
@@ -28129,9 +28089,9 @@ __func__.9940:
 	.4byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2410
+	.4byte	0x23ff
 	.uleb128 0x2c
-	.4byte	.LASF564
+	.4byte	.LASF563
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xf28
@@ -28154,9 +28114,9 @@ __func__.9940:
 	.byte	0xe1
 	.4byte	0x9f
 	.uleb128 0x32
-	.4byte	.LVL1154
-	.4byte	0x230c
-	.4byte	0x23dc
+	.4byte	.LVL1162
+	.4byte	0x22fb
+	.4byte	0x23cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28177,8 +28137,8 @@ __func__.9940:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL1155
-	.4byte	0x23f2
+	.4byte	.LVL1163
+	.4byte	0x23e1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28193,8 +28153,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1158
-	.4byte	0x230c
+	.4byte	.LVL1166
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28216,14 +28176,14 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xdd0
 	.byte	0x1
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x36
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xdba
@@ -28233,10 +28193,10 @@ __func__.9940:
 	.byte	0xc6
 	.4byte	0xdd0
 	.uleb128 0x37
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x1
 	.byte	0xc7
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x31
 	.ascii	"req\000"
 	.byte	0x1
@@ -28249,13 +28209,13 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdc5
-	.4byte	0x2464
+	.4byte	0x2453
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xf
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF566
+	.4byte	.LASF565
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xaa
@@ -28263,25 +28223,25 @@ __func__.9940:
 	.4byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x251a
+	.4byte	0x2509
 	.uleb128 0x2c
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0xae
 	.4byte	0x128
-	.4byte	.LLST172
+	.4byte	.LLST164
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST173
+	.4byte	.LLST165
 	.uleb128 0x2c
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST174
+	.4byte	.LLST166
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
@@ -28302,9 +28262,9 @@ __func__.9940:
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb5
-	.4byte	.LLST175
+	.4byte	.LLST167
 	.uleb128 0x29
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb5
@@ -28316,17 +28276,17 @@ __func__.9940:
 	.byte	0x1
 	.byte	0xb1
 	.4byte	0x19f9
-	.4byte	.LLST176
+	.4byte	.LLST168
 	.uleb128 0x29
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0xb2
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL630
-	.4byte	0x842f
+	.4byte	.LVL620
+	.4byte	0x83a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28340,14 +28300,14 @@ __func__.9940:
 	.byte	0x7d
 	.sleb128 0
 	.uleb128 0x3c
-	.4byte	0x27c7
+	.4byte	0x27b6
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 -4
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF572
+	.4byte	.LASF571
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xaa
@@ -28355,37 +28315,37 @@ __func__.9940:
 	.4byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26a4
+	.4byte	0x2693
 	.uleb128 0x2c
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x72
 	.4byte	0x128
-	.4byte	.LLST164
+	.4byte	.LLST156
 	.uleb128 0x2c
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST165
+	.4byte	.LLST157
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST166
+	.4byte	.LLST158
 	.uleb128 0x2c
-	.4byte	.LASF573
+	.4byte	.LASF572
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST167
+	.4byte	.LLST159
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST168
+	.4byte	.LLST160
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
@@ -28399,9 +28359,9 @@ __func__.9940:
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST169
+	.4byte	.LLST161
 	.uleb128 0x29
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb5
@@ -28409,28 +28369,28 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -56
 	.uleb128 0x30
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xb5
-	.4byte	.LLST170
+	.4byte	.LLST162
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x76
 	.4byte	0x19f9
-	.4byte	.LLST171
+	.4byte	.LLST163
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.10327
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x88
-	.4byte	0x264b
+	.4byte	.Ldebug_ranges0+0xa0
+	.4byte	0x263a
 	.uleb128 0x29
-	.4byte	.LASF575
+	.4byte	.LASF574
 	.byte	0x1
 	.byte	0x91
 	.4byte	0xde6
@@ -28438,9 +28398,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL618
-	.4byte	0x26b9
-	.4byte	0x2609
+	.4byte	.LVL608
+	.4byte	0x26a8
+	.4byte	0x25f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28460,9 +28420,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL619
-	.4byte	0x928b
-	.4byte	0x2620
+	.4byte	.LVL609
+	.4byte	0x92b5
+	.4byte	0x260f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28471,9 +28431,9 @@ __func__.9940:
 	.4byte	.LC79
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL620
-	.4byte	0x928b
-	.4byte	0x2637
+	.4byte	.LVL610
+	.4byte	0x92b5
+	.4byte	0x2626
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28482,8 +28442,8 @@ __func__.9940:
 	.4byte	.LC80
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL621
-	.4byte	0x928b
+	.4byte	.LVL611
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28493,9 +28453,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL611
-	.4byte	0x928b
-	.4byte	0x2671
+	.4byte	.LVL601
+	.4byte	0x92b5
+	.4byte	0x2660
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28507,7 +28467,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR110
+	.4byte	.LANCHOR109
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -28516,9 +28476,9 @@ __func__.9940:
 	.byte	0x7a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL612
-	.4byte	0x842f
-	.4byte	0x2693
+	.4byte	.LVL602
+	.4byte	0x83a0
+	.4byte	0x2682
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28532,33 +28492,33 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -60
 	.uleb128 0x3c
-	.4byte	0x27c7
+	.4byte	0x27b6
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL613
+	.4byte	.LVL603
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL615
+	.4byte	.LVL605
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x26b4
+	.4byte	0x26a3
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xe
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x26a4
+	.4byte	0x2693
 	.uleb128 0x2b
-	.4byte	.LASF576
+	.4byte	.LASF575
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xaa
@@ -28566,25 +28526,25 @@ __func__.9940:
 	.4byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x27b7
+	.4byte	0x27a6
 	.uleb128 0x2c
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x54
 	.4byte	0x128
-	.4byte	.LLST153
+	.4byte	.LLST145
 	.uleb128 0x2c
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST154
+	.4byte	.LLST146
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST155
+	.4byte	.LLST147
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
@@ -28605,9 +28565,9 @@ __func__.9940:
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb5
-	.4byte	.LLST156
+	.4byte	.LLST148
 	.uleb128 0x29
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb5
@@ -28615,7 +28575,7 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x29
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x57
 	.4byte	0xb5
@@ -28633,15 +28593,15 @@ __func__.9940:
 	.byte	0x50
 	.byte	0x9f
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.10310
 	.uleb128 0x32
-	.4byte	.LVL568
-	.4byte	0x928b
-	.4byte	0x2784
+	.4byte	.LVL558
+	.4byte	0x92b5
+	.4byte	0x2773
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28653,7 +28613,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR106
+	.4byte	.LANCHOR104
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -28662,9 +28622,9 @@ __func__.9940:
 	.byte	0x5c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL569
-	.4byte	0x842f
-	.4byte	0x27a6
+	.4byte	.LVL559
+	.4byte	0x83a0
+	.4byte	0x2795
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28678,51 +28638,51 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x3c
-	.4byte	0x27c7
+	.4byte	0x27b6
 	.uleb128 0x2
 	.byte	0x74
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL570
+	.4byte	.LVL560
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL572
+	.4byte	.LVL562
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
 	.byte	0
 	.uleb128 0x40
-	.4byte	.LASF885
+	.4byte	.LASF883
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xb5
 	.byte	0x1
-	.4byte	0x2836
+	.4byte	0x2825
 	.uleb128 0x41
 	.ascii	"req\000"
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0x19f9
 	.uleb128 0x36
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x36
-	.4byte	.LASF578
+	.4byte	.LASF577
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x37
-	.4byte	.LASF579
+	.4byte	.LASF578
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x9f
 	.uleb128 0x37
-	.4byte	.LASF580
+	.4byte	.LASF579
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0x9f
@@ -28737,7 +28697,7 @@ __func__.9940:
 	.byte	0x3d
 	.4byte	0x9f
 	.uleb128 0x37
-	.4byte	.LASF581
+	.4byte	.LASF580
 	.byte	0x1
 	.byte	0x3e
 	.4byte	0xb5
@@ -28747,78 +28707,78 @@ __func__.9940:
 	.byte	0x3f
 	.4byte	0xb5
 	.uleb128 0x37
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x1
 	.byte	0x40
 	.4byte	0xb5
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF585
+	.4byte	.LASF584
 	.byte	0x1
 	.byte	0x20
 	.4byte	.LFB342
 	.4byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2922
+	.4byte	0x2911
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0xf6
-	.4byte	.LLST144
+	.4byte	.LLST136
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x128
-	.4byte	.LLST145
+	.4byte	.LLST137
 	.uleb128 0x2c
-	.4byte	.LASF583
+	.4byte	.LASF582
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST146
+	.4byte	.LLST138
 	.uleb128 0x2f
 	.ascii	"len\000"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST147
+	.4byte	.LLST139
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST148
+	.4byte	.LLST140
 	.uleb128 0x3b
 	.ascii	"j\000"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST149
+	.4byte	.LLST141
 	.uleb128 0x3b
 	.ascii	"p8\000"
 	.byte	0x1
 	.byte	0x23
 	.4byte	0xf6
-	.4byte	.LLST150
+	.4byte	.LLST142
 	.uleb128 0x3b
 	.ascii	"p16\000"
 	.byte	0x1
 	.byte	0x24
-	.4byte	0x2922
-	.4byte	.LLST151
+	.4byte	0x2911
+	.4byte	.LLST143
 	.uleb128 0x3b
 	.ascii	"p32\000"
 	.byte	0x1
 	.byte	0x25
 	.4byte	0xe2f
-	.4byte	.LLST152
+	.4byte	.LLST144
 	.uleb128 0x43
-	.4byte	.LVL557
-	.4byte	0x928b
-	.4byte	0x28e2
+	.4byte	.LVL547
+	.4byte	0x92b5
+	.4byte	0x28d1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28827,9 +28787,9 @@ __func__.9940:
 	.4byte	.LC78
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL558
-	.4byte	0x928b
-	.4byte	0x2905
+	.4byte	.LVL548
+	.4byte	0x92b5
+	.4byte	0x28f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28850,11 +28810,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL560
-	.4byte	0x928b
+	.4byte	.LVL550
+	.4byte	0x92b5
 	.uleb128 0x34
-	.4byte	.LVL562
-	.4byte	0x928b
+	.4byte	.LVL552
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28867,7 +28827,7 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x69
 	.uleb128 0x2b
-	.4byte	.LASF584
+	.4byte	.LASF583
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x128
@@ -28875,16 +28835,16 @@ __func__.9940:
 	.4byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2967
+	.4byte	0x2956
 	.uleb128 0x2c
 	.4byte	.LASF30
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x50
-	.4byte	.LLST143
+	.4byte	.LLST135
 	.uleb128 0x2d
-	.4byte	.LVL552
-	.4byte	0x9296
+	.4byte	.LVL542
+	.4byte	0x92c0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28900,32 +28860,32 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF586
+	.4byte	.LASF585
 	.byte	0x1
 	.byte	0x17
 	.4byte	.LFB340
 	.4byte	.LFE340-.LFB340
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x29b6
+	.4byte	0x29a5
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x128
-	.4byte	.LLST141
+	.4byte	.LLST133
 	.uleb128 0x45
-	.4byte	0x29b6
-	.4byte	.LBB221
-	.4byte	.LBE221-.LBB221
+	.4byte	0x29a5
+	.4byte	.LBB235
+	.4byte	.LBE235-.LBB235
 	.byte	0x1
 	.byte	0x19
 	.uleb128 0x46
-	.4byte	0x29c2
-	.4byte	.LLST142
+	.4byte	0x29b1
+	.4byte	.LLST134
 	.uleb128 0x2d
-	.4byte	.LVL550
-	.4byte	0x92a1
+	.4byte	.LVL540
+	.4byte	0x92cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28937,30 +28897,30 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x47
-	.4byte	.LASF886
+	.4byte	.LASF884
 	.byte	0x6
 	.byte	0x4e
 	.byte	0x3
-	.4byte	0x29ce
+	.4byte	0x29bd
 	.uleb128 0x36
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x6
 	.byte	0x4e
 	.4byte	0x16b
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF588
+	.4byte	.LASF587
 	.byte	0x5
-	.2byte	0x2f8
+	.2byte	0x2f4
 	.4byte	0xb5
 	.4byte	.LFB323
 	.4byte	.LFE323-.LFB323
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x29fd
+	.4byte	0x29ec
 	.uleb128 0x2d
-	.4byte	.LVL1814
-	.4byte	0x29fd
+	.4byte	.LVL1816
+	.4byte	0x29ec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28974,24 +28934,24 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF590
+	.4byte	.LASF589
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2aca
+	.4byte	0x2ab9
 	.uleb128 0x4a
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
 	.uleb128 0x4a
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF593
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdba
@@ -29006,7 +28966,7 @@ __func__.9940:
 	.2byte	0x1d8
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF594
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdba
@@ -29016,45 +28976,45 @@ __func__.9940:
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF598
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2aca
+	.4byte	0x2ab9
 	.uleb128 0x4d
-	.4byte	.LASF600
+	.4byte	.LASF599
 	.byte	0x5
-	.2byte	0x276
+	.2byte	0x272
 	.uleb128 0x4d
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x5
-	.2byte	0x279
+	.2byte	0x275
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x2ae0
-	.4byte	.LASF590
+	.4byte	.LASF573
+	.4byte	0x2acf
+	.4byte	.LASF589
 	.uleb128 0x4f
 	.uleb128 0x4b
-	.4byte	.LASF602
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdba
@@ -29065,20 +29025,20 @@ __func__.9940:
 	.4byte	0x1229
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x2ae0
+	.4byte	0x2acf
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2ad0
+	.4byte	0x2abf
 	.uleb128 0x49
-	.4byte	.LASF603
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2b45
+	.4byte	0x2b34
 	.uleb128 0x4c
 	.ascii	"ret\000"
 	.byte	0x5
@@ -29095,40 +29055,40 @@ __func__.9940:
 	.2byte	0x1a6
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x5
 	.2byte	0x1a7
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x50
-	.4byte	0x2b36
+	.4byte	0x2b25
 	.uleb128 0x4b
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xde6
 	.byte	0
 	.uleb128 0x4f
 	.uleb128 0x4b
-	.4byte	.LASF605
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdc5
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF606
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2b8f
+	.4byte	0x2b7e
 	.uleb128 0x4a
-	.4byte	.LASF607
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdba
@@ -29149,13 +29109,13 @@ __func__.9940:
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x51
-	.4byte	.LASF715
+	.4byte	.LASF714
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x50
 	.byte	0x1
 	.uleb128 0x48
-	.4byte	.LASF608
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x50
@@ -29163,29 +29123,29 @@ __func__.9940:
 	.4byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c26
+	.4byte	0x2c15
 	.uleb128 0x52
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdba
-	.4byte	.LLST138
+	.4byte	.LLST130
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdba
-	.4byte	.LLST139
+	.4byte	.LLST131
 	.uleb128 0x54
-	.4byte	.LASF609
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdba
-	.4byte	.LLST140
+	.4byte	.LLST132
 	.uleb128 0x32
-	.4byte	.LVL537
-	.4byte	0x6189
-	.4byte	0x2bf8
+	.4byte	.LVL527
+	.4byte	0x616f
+	.4byte	0x2be7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29194,9 +29154,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL539
-	.4byte	0x928b
-	.4byte	0x2c15
+	.4byte	.LVL529
+	.4byte	0x92b5
+	.4byte	0x2c04
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29211,8 +29171,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL540
-	.4byte	0x2c26
+	.4byte	.LVL530
+	.4byte	0x2c15
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29222,7 +29182,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF610
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x50
@@ -29230,16 +29190,16 @@ __func__.9940:
 	.4byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c6a
+	.4byte	0x2c59
 	.uleb128 0x52
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdba
-	.4byte	.LLST137
+	.4byte	.LLST129
 	.uleb128 0x34
-	.4byte	.LVL535
-	.4byte	0x928b
+	.4byte	.LVL525
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29255,7 +29215,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF611
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdc5
@@ -29263,23 +29223,23 @@ __func__.9940:
 	.4byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d0e
+	.4byte	0x2cfd
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdba
-	.4byte	.LLST396
+	.4byte	.LLST395
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2aca
-	.4byte	.LLST397
+	.4byte	0x2ab9
+	.4byte	.LLST396
 	.uleb128 0x32
-	.4byte	.LVL1699
-	.4byte	0x251a
-	.4byte	0x2cbc
+	.4byte	.LVL1703
+	.4byte	0x2509
+	.4byte	0x2cab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29294,9 +29254,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1700
-	.4byte	0x31ea
-	.4byte	0x2cd6
+	.4byte	.LVL1704
+	.4byte	0x31c7
+	.4byte	0x2cc5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29311,9 +29271,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1701
-	.4byte	0x2f42
-	.4byte	0x2ce9
+	.4byte	.LVL1705
+	.4byte	0x2f28
+	.4byte	0x2cd8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29321,20 +29281,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1703
-	.4byte	0x688f
+	.4byte	.LVL1707
+	.4byte	0x6875
 	.uleb128 0x44
-	.4byte	.LVL1704
-	.4byte	0x6657
+	.4byte	.LVL1708
+	.4byte	0x663d
 	.uleb128 0x44
-	.4byte	.LVL1705
-	.4byte	0x2efb
+	.4byte	.LVL1709
+	.4byte	0x2ee1
 	.uleb128 0x44
-	.4byte	.LVL1707
-	.4byte	0x30f3
+	.4byte	.LVL1711
+	.4byte	0x30d0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF612
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdc5
@@ -29342,14 +29302,11 @@ __func__.9940:
 	.4byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d93
-	.uleb128 0x44
-	.4byte	.LVL1708
-	.4byte	0x6ee0
+	.4byte	0x2d79
 	.uleb128 0x32
-	.4byte	.LVL1709
-	.4byte	0x2f42
-	.4byte	0x2d45
+	.4byte	.LVL1712
+	.4byte	0x2f28
+	.4byte	0x2d2b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29358,9 +29315,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1710
-	.4byte	0x3513
-	.4byte	0x2d59
+	.4byte	.LVL1713
+	.4byte	0x34f0
+	.4byte	0x2d3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29369,12 +29326,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1711
-	.4byte	0x537a
+	.4byte	.LVL1714
+	.4byte	0x536c
 	.uleb128 0x32
-	.4byte	.LVL1712
-	.4byte	0x4fe6
-	.4byte	0x2d76
+	.4byte	.LVL1715
+	.4byte	0x4fd8
+	.4byte	0x2d5c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29383,11 +29340,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1713
-	.4byte	0x4d75
+	.4byte	.LVL1716
+	.4byte	0x4d67
 	.uleb128 0x2d
-	.4byte	.LVL1714
-	.4byte	0x333e
+	.4byte	.LVL1717
+	.4byte	0x331b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29397,12 +29354,12 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x55
-	.4byte	.LASF671
+	.4byte	.LASF670
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF613
+	.4byte	.LASF612
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
@@ -29410,27 +29367,27 @@ __func__.9940:
 	.4byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2efb
+	.4byte	0x2ee1
 	.uleb128 0x2c
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x1d79
+	.4byte	0x1d68
 	.4byte	.LLST271
 	.uleb128 0x2c
-	.4byte	.LASF615
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
 	.4byte	.LLST272
 	.uleb128 0x30
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdba
 	.4byte	.LLST273
 	.uleb128 0x30
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdba
@@ -29442,7 +29399,7 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST275
 	.uleb128 0x30
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
@@ -29460,49 +29417,49 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST278
 	.uleb128 0x30
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdc5
 	.4byte	.LLST279
 	.uleb128 0x30
-	.4byte	.LASF617
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdc5
 	.4byte	.LLST280
 	.uleb128 0x56
-	.4byte	.LASF618
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdc5
 	.sleb128 -1
 	.uleb128 0x30
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2aca
+	.4byte	0x2ab9
 	.4byte	.LLST281
 	.uleb128 0x57
-	.4byte	.LASF619
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xe1
 	.uleb128 0x57
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe5
 	.uleb128 0x58
-	.4byte	.LASF689
+	.4byte	.LASF688
 	.byte	0x5
 	.2byte	0x117
-	.4byte	.L977
+	.4byte	.L982
 	.uleb128 0x44
-	.4byte	.LVL1100
-	.4byte	0x2efb
+	.4byte	.LVL1108
+	.4byte	0x2ee1
 	.uleb128 0x32
-	.4byte	.LVL1109
-	.4byte	0x26b9
-	.4byte	0x2eaa
+	.4byte	.LVL1117
+	.4byte	0x26a8
+	.4byte	0x2e90
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29524,9 +29481,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1122
-	.4byte	0x61c1
-	.4byte	0x2ec5
+	.4byte	.LVL1130
+	.4byte	0x61a7
+	.4byte	0x2eab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29542,9 +29499,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1128
-	.4byte	0x46f4
-	.4byte	0x2edf
+	.4byte	.LVL1136
+	.4byte	0x46e1
+	.4byte	0x2ec5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29559,28 +29516,28 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1131
-	.4byte	0x30f3
+	.4byte	.LVL1139
+	.4byte	0x30d0
 	.uleb128 0x44
-	.4byte	.LVL1135
-	.4byte	0x5e01
+	.4byte	.LVL1143
+	.4byte	0x5e03
 	.uleb128 0x44
-	.4byte	.LVL1137
-	.4byte	0x2efb
+	.4byte	.LVL1145
+	.4byte	0x2ee1
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF621
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xc9
 	.4byte	.LFB312
 	.4byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2f42
+	.4byte	0x2f28
 	.uleb128 0x32
-	.4byte	.LVL1095
-	.4byte	0x230c
-	.4byte	0x2f24
+	.4byte	.LVL1103
+	.4byte	0x22fb
+	.4byte	0x2f0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29589,9 +29546,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1096
-	.4byte	0x230c
-	.4byte	0x2f38
+	.4byte	.LVL1104
+	.4byte	0x22fb
+	.4byte	0x2f1e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29600,11 +29557,11 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x59
-	.4byte	.LVL1097
-	.4byte	0x3236
+	.4byte	.LVL1105
+	.4byte	0x3213
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF622
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
@@ -29612,27 +29569,27 @@ __func__.9940:
 	.4byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x30de
+	.4byte	0x30bb
 	.uleb128 0x2c
-	.4byte	.LASF623
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
-	.4byte	.LLST391
+	.4byte	.LLST390
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST392
+	.4byte	.LLST391
 	.uleb128 0x30
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST393
+	.4byte	.LLST392
 	.uleb128 0x29
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdc5
@@ -29640,36 +29597,36 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x30
-	.4byte	.LASF626
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdc5
-	.4byte	.LLST394
+	.4byte	.LLST393
 	.uleb128 0x29
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0x74
-	.4byte	0x1d79
+	.4byte	0x1d68
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x30
-	.4byte	.LASF627
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x75
-	.4byte	0x1db2
-	.4byte	.LLST395
+	.4byte	0x1da1
+	.4byte	.LLST394
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x30ee
+	.4byte	.LASF573
+	.4byte	0x30cb
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9940
 	.uleb128 0x32
-	.4byte	.LVL1662
-	.4byte	0x2d9c
-	.4byte	0x2fe7
+	.4byte	.LVL1667
+	.4byte	0x2d82
+	.4byte	0x2fcd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29678,9 +29635,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1663
-	.4byte	0x4fe6
-	.4byte	0x2ffa
+	.4byte	.LVL1668
+	.4byte	0x4fd8
+	.4byte	0x2fe0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29688,18 +29645,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1664
-	.4byte	0x688f
-	.uleb128 0x44
-	.4byte	.LVL1665
-	.4byte	0x6657
-	.uleb128 0x44
 	.4byte	.LVL1669
-	.4byte	0x6ee0
-	.uleb128 0x32
+	.4byte	0x6875
+	.uleb128 0x44
 	.4byte	.LVL1670
-	.4byte	0x928b
-	.4byte	0x303b
+	.4byte	0x663d
+	.uleb128 0x32
+	.4byte	.LVL1674
+	.4byte	0x92b5
+	.4byte	0x3018
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29711,7 +29665,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR173
+	.4byte	.LANCHOR171
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29720,9 +29674,9 @@ __func__.9940:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1672
-	.4byte	0x3259
-	.4byte	0x304f
+	.4byte	.LVL1676
+	.4byte	0x3236
+	.4byte	0x302c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29731,18 +29685,18 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1673
-	.4byte	0x5ddc
+	.4byte	.LVL1677
+	.4byte	0x5dde
 	.uleb128 0x44
-	.4byte	.LVL1675
-	.4byte	0x537a
+	.4byte	.LVL1679
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL1676
-	.4byte	0x4d75
+	.4byte	.LVL1680
+	.4byte	0x4d67
 	.uleb128 0x32
-	.4byte	.LVL1679
-	.4byte	0x928b
-	.4byte	0x3090
+	.4byte	.LVL1683
+	.4byte	0x92b5
+	.4byte	0x306d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29754,7 +29708,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR173
+	.4byte	.LANCHOR171
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29763,9 +29717,9 @@ __func__.9940:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1680
-	.4byte	0x5279
-	.4byte	0x30a9
+	.4byte	.LVL1684
+	.4byte	0x526b
+	.4byte	0x3086
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29779,12 +29733,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1681
-	.4byte	0x6189
+	.4byte	.LVL1685
+	.4byte	0x616f
 	.uleb128 0x32
-	.4byte	.LVL1683
-	.4byte	0x5279
-	.4byte	0x30cb
+	.4byte	.LVL1687
+	.4byte	0x526b
+	.4byte	0x30a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29798,63 +29752,63 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1685
-	.4byte	0x3259
-	.uleb128 0x44
 	.4byte	.LVL1689
-	.4byte	0x5e01
+	.4byte	0x3236
+	.uleb128 0x44
+	.4byte	.LVL1693
+	.4byte	0x5e03
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x30ee
+	.4byte	0x30cb
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x30de
+	.4byte	0x30bb
 	.uleb128 0x42
-	.4byte	.LASF628
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x54
 	.4byte	.LFB310
 	.4byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3168
+	.4byte	0x3145
 	.uleb128 0x2c
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
-	.4byte	.LLST132
+	.4byte	.LLST124
 	.uleb128 0x2c
 	.4byte	.LASF391
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
-	.4byte	.LLST133
+	.4byte	.LLST125
 	.uleb128 0x2f
 	.ascii	"lpa\000"
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
-	.4byte	.LLST134
+	.4byte	.LLST126
 	.uleb128 0x30
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdba
-	.4byte	.LLST135
+	.4byte	.LLST127
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x57
 	.4byte	0xdba
-	.4byte	.LLST136
+	.4byte	.LLST128
 	.uleb128 0x34
-	.4byte	.LVL527
-	.4byte	0x6189
+	.4byte	.LVL517
+	.4byte	0x616f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29870,7 +29824,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF631
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdc5
@@ -29878,29 +29832,29 @@ __func__.9940:
 	.4byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x319e
+	.4byte	0x317b
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdba
-	.4byte	.LLST130
+	.4byte	.LLST122
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x4b
 	.4byte	0xdba
-	.4byte	.LLST131
+	.4byte	.LLST123
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF632
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x38
 	.4byte	.LFB308
 	.4byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31ea
+	.4byte	0x31c7
 	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
@@ -29909,7 +29863,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5b
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdc5
@@ -29920,23 +29874,23 @@ __func__.9940:
 	.byte	0x5
 	.byte	0x3a
 	.4byte	0xdba
-	.4byte	.LLST128
+	.4byte	.LLST120
 	.uleb128 0x30
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdba
-	.4byte	.LLST129
+	.4byte	.LLST121
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF635
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x29
 	.4byte	.LFB307
 	.4byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3236
+	.4byte	0x3213
 	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
@@ -29945,7 +29899,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5b
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdc5
@@ -29956,68 +29910,68 @@ __func__.9940:
 	.byte	0x5
 	.byte	0x2b
 	.4byte	0xdba
-	.4byte	.LLST126
+	.4byte	.LLST118
 	.uleb128 0x30
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdba
-	.4byte	.LLST127
+	.4byte	.LLST119
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF636
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x15
 	.4byte	.LFB306
 	.4byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3259
+	.4byte	0x3236
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x17
 	.4byte	0xdba
-	.4byte	.LLST125
+	.4byte	.LLST117
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF637
+	.4byte	.LASF636
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0x50
 	.4byte	.LFB305
 	.4byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x32e9
+	.4byte	0x32c6
 	.uleb128 0x52
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0xdba
 	.4byte	.LLST309
 	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x2
-	.2byte	0xa95
+	.2byte	0xac8
 	.4byte	0x50
 	.4byte	.LLST310
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x32f9
+	.4byte	.LASF573
+	.4byte	0x32d6
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9870
 	.uleb128 0x32
-	.4byte	.LVL1259
-	.4byte	0x928b
-	.4byte	0x32bf
+	.4byte	.LVL1267
+	.4byte	0x92b5
+	.4byte	0x329c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC98
+	.4byte	.LC101
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30026,9 +29980,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1263
-	.4byte	0x928b
-	.4byte	0x32df
+	.4byte	.LVL1271
+	.4byte	0x92b5
+	.4byte	0x32bc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30040,85 +29994,85 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR160
+	.4byte	.LANCHOR159
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1266
-	.4byte	0x32fe
+	.4byte	.LVL1274
+	.4byte	0x32db
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x32f9
+	.4byte	0x32d6
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x32e9
+	.4byte	0x32c6
 	.uleb128 0x49
-	.4byte	.LASF638
+	.4byte	.LASF637
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x3329
+	.4byte	0x3306
 	.uleb128 0x4a
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0xdba
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x3339
-	.4byte	.LASF638
+	.4byte	.LASF573
+	.4byte	0x3316
+	.4byte	.LASF637
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3339
+	.4byte	0x3316
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3329
+	.4byte	0x3306
 	.uleb128 0x48
-	.4byte	.LASF639
+	.4byte	.LASF638
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa91
 	.4byte	0xdc5
 	.4byte	.LFB303
 	.4byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3430
+	.4byte	0x340d
 	.uleb128 0x52
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa5e
-	.4byte	0x1d79
-	.4byte	.LLST122
+	.2byte	0xa91
+	.4byte	0x1d68
+	.4byte	.LLST114
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0xa60
+	.2byte	0xa93
 	.4byte	0xdba
-	.4byte	.LLST123
+	.4byte	.LLST115
 	.uleb128 0x54
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x2
-	.2byte	0xa61
+	.2byte	0xa94
 	.4byte	0xdc5
-	.4byte	.LLST124
+	.4byte	.LLST116
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x30ee
+	.4byte	.LASF573
+	.4byte	0x30cb
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9850
 	.uleb128 0x32
-	.4byte	.LVL490
-	.4byte	0x928b
-	.4byte	0x33be
+	.4byte	.LVL480
+	.4byte	0x92b5
+	.4byte	0x339b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30130,18 +30084,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa63
+	.2byte	0xa96
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL491
-	.4byte	0x928b
-	.4byte	0x33e5
+	.4byte	.LVL481
+	.4byte	0x92b5
+	.4byte	0x33c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30153,18 +30107,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa64
+	.2byte	0xa97
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL492
-	.4byte	0x928b
-	.4byte	0x340c
+	.4byte	.LVL482
+	.4byte	0x92b5
+	.4byte	0x33e9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30176,17 +30130,17 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa65
+	.2byte	0xa98
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL496
-	.4byte	0x928b
+	.4byte	.LVL486
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30198,48 +30152,48 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR90
+	.4byte	.LANCHOR88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa7a
+	.2byte	0xaad
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF642
+	.4byte	.LASF641
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa79
 	.4byte	0x50
 	.4byte	.LFB302
 	.4byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x34fe
+	.4byte	0x34db
 	.uleb128 0x52
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa46
-	.4byte	0x1d79
-	.4byte	.LLST376
+	.2byte	0xa79
+	.4byte	0x1d68
+	.4byte	.LLST381
 	.uleb128 0x28
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa48
+	.2byte	0xa7b
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x350e
+	.4byte	.LASF573
+	.4byte	0x34eb
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9843
 	.uleb128 0x32
-	.4byte	.LVL1595
-	.4byte	0x928b
-	.4byte	0x349e
+	.4byte	.LVL1629
+	.4byte	0x92b5
+	.4byte	0x347b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30257,12 +30211,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa49
+	.2byte	0xa7c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1596
-	.4byte	0x5ddc
-	.4byte	0x34b2
+	.4byte	.LVL1630
+	.4byte	0x5dde
+	.4byte	0x348f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30271,12 +30225,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1597
-	.4byte	0x32fe
+	.4byte	.LVL1631
+	.4byte	0x32db
 	.uleb128 0x32
-	.4byte	.LVL1598
-	.4byte	0x3513
-	.4byte	0x34cf
+	.4byte	.LVL1632
+	.4byte	0x34f0
+	.4byte	0x34ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30285,12 +30239,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1599
-	.4byte	0x537a
+	.4byte	.LVL1633
+	.4byte	0x536c
 	.uleb128 0x32
-	.4byte	.LVL1600
-	.4byte	0x4fe6
-	.4byte	0x34eb
+	.4byte	.LVL1634
+	.4byte	0x4fd8
+	.4byte	0x34c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30298,104 +30252,104 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1601
-	.4byte	0x4d75
+	.4byte	.LVL1635
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL1603
-	.4byte	0x5e01
+	.4byte	.LVL1637
+	.4byte	0x5e03
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x350e
+	.4byte	0x34eb
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x34fe
+	.4byte	0x34db
 	.uleb128 0x5c
-	.4byte	.LASF643
+	.4byte	.LASF642
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa15
 	.4byte	0x50
 	.4byte	.LFB301
 	.4byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x37ae
+	.4byte	0x378b
 	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x9e2
-	.4byte	0x1d79
+	.2byte	0xa15
+	.4byte	0x1d68
 	.4byte	.LLST294
 	.uleb128 0x54
-	.4byte	.LASF644
+	.4byte	.LASF643
 	.byte	0x2
-	.2byte	0x9e4
+	.2byte	0xa17
 	.4byte	0xdba
 	.4byte	.LLST295
 	.uleb128 0x4b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.4byte	.LLST296
 	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.4byte	.LLST297
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdba
 	.4byte	.LLST298
 	.uleb128 0x54
-	.4byte	.LASF645
+	.4byte	.LASF644
 	.byte	0x2
-	.2byte	0x9e6
+	.2byte	0xa19
 	.4byte	0x50
 	.4byte	.LLST299
 	.uleb128 0x54
-	.4byte	.LASF646
+	.4byte	.LASF645
 	.byte	0x2
-	.2byte	0x9e7
+	.2byte	0xa1a
 	.4byte	0xdba
 	.4byte	.LLST300
 	.uleb128 0x4d
-	.4byte	.LASF647
+	.4byte	.LASF646
 	.byte	0x2
-	.2byte	0x9e8
+	.2byte	0xa1b
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x37be
+	.4byte	.LASF573
+	.4byte	0x379b
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9822
 	.uleb128 0x5e
-	.4byte	0x4b40
-	.4byte	.LBB247
-	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	0x4b2d
+	.4byte	.LBB280
+	.4byte	.Ldebug_ranges0+0x118
 	.byte	0x2
-	.2byte	0xa18
-	.4byte	0x35fa
+	.2byte	0xa4b
+	.4byte	0x35d7
 	.uleb128 0x46
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.4byte	.LLST301
 	.uleb128 0x46
-	.4byte	0x4b4d
+	.4byte	0x4b3a
 	.4byte	.LLST302
 	.uleb128 0x34
-	.4byte	.LVL1215
-	.4byte	0x8489
+	.4byte	.LVL1223
+	.4byte	0x83fa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30403,15 +30357,15 @@ __func__.9940:
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3c
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1186
-	.4byte	0x928b
-	.4byte	0x3621
+	.4byte	.LVL1194
+	.4byte	0x92b5
+	.4byte	0x35fe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30423,18 +30377,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9e9
+	.2byte	0xa1c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1190
-	.4byte	0x5bc6
-	.4byte	0x3638
+	.4byte	.LVL1198
+	.4byte	0x5bb8
+	.4byte	0x3615
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30443,9 +30397,9 @@ __func__.9940:
 	.4byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1192
-	.4byte	0x928b
-	.4byte	0x365f
+	.4byte	.LVL1200
+	.4byte	0x92b5
+	.4byte	0x363c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30457,18 +30411,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9f2
+	.2byte	0xa25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1193
-	.4byte	0x3f2e
-	.4byte	0x3673
+	.4byte	.LVL1201
+	.4byte	0x3f1b
+	.4byte	0x3650
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30477,9 +30431,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1194
-	.4byte	0x5ddc
-	.4byte	0x3687
+	.4byte	.LVL1202
+	.4byte	0x5dde
+	.4byte	0x3664
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30488,9 +30442,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1195
-	.4byte	0x928b
-	.4byte	0x36ae
+	.4byte	.LVL1203
+	.4byte	0x92b5
+	.4byte	0x368b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30502,18 +30456,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9fd
+	.2byte	0xa30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1198
-	.4byte	0x928b
-	.4byte	0x36d5
+	.4byte	.LVL1206
+	.4byte	0x92b5
+	.4byte	0x36b2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30525,18 +30479,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa00
+	.2byte	0xa33
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1200
-	.4byte	0x928b
-	.4byte	0x36fc
+	.4byte	.LVL1208
+	.4byte	0x92b5
+	.4byte	0x36d9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30548,18 +30502,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0b
+	.2byte	0xa3e
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1201
-	.4byte	0x928b
-	.4byte	0x3723
+	.4byte	.LVL1209
+	.4byte	0x92b5
+	.4byte	0x3700
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30571,18 +30525,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0d
+	.2byte	0xa40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1202
-	.4byte	0x4b40
-	.4byte	0x373c
+	.4byte	.LVL1210
+	.4byte	0x4b2d
+	.4byte	0x3719
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30596,9 +30550,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1206
-	.4byte	0x2464
-	.4byte	0x3750
+	.4byte	.LVL1214
+	.4byte	0x2453
+	.4byte	0x372d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -30607,9 +30561,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1208
-	.4byte	0x3926
-	.4byte	0x3764
+	.4byte	.LVL1216
+	.4byte	0x3913
+	.4byte	0x3741
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30618,12 +30572,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1209
-	.4byte	0x6657
+	.4byte	.LVL1217
+	.4byte	0x663d
 	.uleb128 0x32
-	.4byte	.LVL1210
-	.4byte	0x5ddc
-	.4byte	0x3781
+	.4byte	.LVL1218
+	.4byte	0x5dde
+	.4byte	0x375e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30632,11 +30586,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1220
-	.4byte	0x688f
+	.4byte	.LVL1228
+	.4byte	0x6875
 	.uleb128 0x34
-	.4byte	.LVL1224
-	.4byte	0x928b
+	.4byte	.LVL1232
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30648,98 +30602,104 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR158
+	.4byte	.LANCHOR157
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa42
+	.2byte	0xa75
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x37be
+	.4byte	0x379b
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x37ae
+	.4byte	0x378b
 	.uleb128 0x49
-	.4byte	.LASF648
+	.4byte	.LASF647
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x37e1
+	.4byte	0x37be
 	.uleb128 0x4a
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF649
+	.4byte	.LASF648
 	.byte	0x2
-	.2byte	0x98e
+	.2byte	0x9c3
 	.4byte	0xdba
 	.4byte	.LFB299
 	.4byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38a2
+	.4byte	0x388f
+	.uleb128 0x54
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x9c5
+	.4byte	0xdba
+	.4byte	.LLST104
 	.uleb128 0x54
 	.4byte	.LASF650
 	.byte	0x2
-	.2byte	0x990
+	.2byte	0x9c6
 	.4byte	0xdba
-	.4byte	.LLST113
+	.4byte	.LLST105
 	.uleb128 0x54
 	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x991
+	.2byte	0x9c7
 	.4byte	0xdba
-	.4byte	.LLST114
+	.4byte	.LLST106
 	.uleb128 0x54
 	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x992
-	.4byte	0xdba
-	.4byte	.LLST115
+	.2byte	0x9c8
+	.4byte	0x1cb8
+	.4byte	.LLST107
 	.uleb128 0x54
 	.4byte	.LASF653
 	.byte	0x2
-	.2byte	0x993
-	.4byte	0x1cc9
-	.4byte	.LLST116
-	.uleb128 0x54
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x994
+	.2byte	0x9c9
 	.4byte	0xdba
-	.4byte	.LLST117
+	.4byte	.LLST108
 	.uleb128 0x54
-	.4byte	.LASF655
+	.4byte	.LASF654
 	.byte	0x2
-	.2byte	0x995
+	.2byte	0x9ca
 	.4byte	0xdba
-	.4byte	.LLST118
+	.4byte	.LLST109
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x996
+	.2byte	0x9cb
 	.4byte	0xdc5
-	.4byte	.LLST119
+	.4byte	.LLST110
+	.uleb128 0x54
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x9cc
+	.4byte	0xdba
+	.4byte	.LLST111
 	.uleb128 0x44
-	.4byte	.LVL470
-	.4byte	0x38a2
+	.4byte	.LVL458
+	.4byte	0x388f
 	.uleb128 0x44
-	.4byte	.LVL476
-	.4byte	0x38fb
+	.4byte	.LVL464
+	.4byte	0x38e8
 	.uleb128 0x34
-	.4byte	.LVL478
-	.4byte	0x928b
+	.4byte	.LVL466
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30768,95 +30728,95 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF656
+	.4byte	.LASF655
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdba
 	.4byte	.LFB298
 	.4byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38fb
+	.4byte	0x38e8
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdba
-	.4byte	.LLST102
+	.4byte	.LLST93
 	.uleb128 0x54
-	.4byte	.LASF657
+	.4byte	.LASF656
 	.byte	0x2
-	.2byte	0x97b
+	.2byte	0x9b0
 	.4byte	0xdba
-	.4byte	.LLST103
+	.4byte	.LLST94
 	.uleb128 0x54
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x97c
+	.2byte	0x9b1
 	.4byte	0xdba
-	.4byte	.LLST104
+	.4byte	.LLST95
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x97d
+	.2byte	0x9b2
 	.4byte	0xdba
-	.4byte	.LLST105
+	.4byte	.LLST96
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF658
+	.4byte	.LASF657
 	.byte	0x2
-	.2byte	0x970
+	.2byte	0x9a5
 	.4byte	0xdba
 	.4byte	.LFB297
 	.4byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3926
+	.4byte	0x3913
 	.uleb128 0x54
-	.4byte	.LASF652
+	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x972
+	.2byte	0x9a7
 	.4byte	0xdba
-	.4byte	.LLST101
+	.4byte	.LLST92
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF659
+	.4byte	.LASF658
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0x50
 	.4byte	.LFB296
 	.4byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x399e
+	.4byte	0x398b
 	.uleb128 0x52
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0xdba
-	.4byte	.LLST97
+	.4byte	.LLST88
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdba
-	.4byte	.LLST98
+	.4byte	.LLST89
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdba
-	.4byte	.LLST99
+	.4byte	.LLST90
 	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x963
+	.2byte	0x998
 	.4byte	0xdba
-	.4byte	.LLST100
+	.4byte	.LLST91
 	.uleb128 0x32
-	.4byte	.LVL284
-	.4byte	0x61f9
-	.4byte	0x3994
+	.4byte	.LVL272
+	.4byte	0x61df
+	.4byte	0x3981
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30865,69 +30825,69 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL285
-	.4byte	0x682c
+	.4byte	.LVL273
+	.4byte	0x6812
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF660
+	.4byte	.LASF659
 	.byte	0x2
-	.2byte	0x901
+	.2byte	0x933
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x39c8
+	.4byte	0x39b5
 	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x903
+	.2byte	0x935
 	.4byte	0x50
 	.uleb128 0x4f
 	.uleb128 0x4b
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x928
-	.4byte	0x1d79
+	.2byte	0x95a
+	.4byte	0x1d68
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF661
+	.4byte	.LASF660
 	.byte	0x2
-	.2byte	0x8e2
+	.2byte	0x914
 	.4byte	.LFB294
 	.4byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a97
+	.4byte	0x3a84
 	.uleb128 0x60
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8e4
+	.2byte	0x916
 	.4byte	0x50
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x8e5
+	.2byte	0x917
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x54
-	.4byte	.LASF662
+	.4byte	.LASF661
 	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x2aca
+	.2byte	0x918
+	.4byte	0x2ab9
 	.4byte	.LLST239
 	.uleb128 0x32
-	.4byte	.LVL909
-	.4byte	0x928b
-	.4byte	0x3a26
+	.4byte	.LVL917
+	.4byte	0x92b5
+	.4byte	0x3a13
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC88
+	.4byte	.LC91
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30936,9 +30896,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL911
-	.4byte	0x5279
-	.4byte	0x3a45
+	.4byte	.LVL919
+	.4byte	0x526b
+	.4byte	0x3a32
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30958,9 +30918,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL912
-	.4byte	0x928b
-	.4byte	0x3a5f
+	.4byte	.LVL920
+	.4byte	0x92b5
+	.4byte	0x3a4c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30975,9 +30935,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL914
-	.4byte	0x26b9
-	.4byte	0x3a7d
+	.4byte	.LVL922
+	.4byte	0x26a8
+	.4byte	0x3a6a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30996,14 +30956,14 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL915
-	.4byte	0x928b
+	.4byte	.LVL923
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC90
+	.4byte	.LC93
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31013,30 +30973,30 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF663
+	.4byte	.LASF662
 	.byte	0x2
-	.2byte	0x8ae
+	.2byte	0x8e0
 	.4byte	.LFB293
 	.4byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3bea
+	.4byte	0x3bd7
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x8b0
+	.2byte	0x8e2
 	.4byte	0xdba
 	.4byte	.LLST266
 	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x8b1
+	.2byte	0x8e3
 	.4byte	0xdc5
 	.4byte	.LLST267
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x8b2
+	.2byte	0x8e4
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
@@ -31044,40 +31004,40 @@ __func__.9940:
 	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x8b3
+	.2byte	0x8e5
 	.4byte	0xdba
 	.4byte	.LLST268
 	.uleb128 0x54
-	.4byte	.LASF665
+	.4byte	.LASF664
 	.byte	0x2
-	.2byte	0x8b4
+	.2byte	0x8e6
 	.4byte	0xdba
 	.4byte	.LLST269
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3bfa
+	.4byte	.LASF573
+	.4byte	0x3be7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9738
+	.4byte	__func__.9737
 	.uleb128 0x61
-	.4byte	.LBB242
-	.4byte	.LBE242-.LBB242
-	.4byte	0x3b40
+	.4byte	.LBB275
+	.4byte	.LBE275-.LBB275
+	.4byte	0x3b2d
 	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x8d1
+	.2byte	0x903
 	.4byte	0xdba
 	.4byte	.LLST270
 	.uleb128 0x34
-	.4byte	.LVL1080
-	.4byte	0x928b
+	.4byte	.LVL1088
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC93
+	.4byte	.LC96
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31087,26 +31047,26 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1073
-	.4byte	0x928b
-	.4byte	0x3b60
+	.4byte	.LVL1081
+	.4byte	0x92b5
+	.4byte	0x3b4d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC91
+	.4byte	.LC94
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR156
+	.4byte	.LANCHOR155
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1074
-	.4byte	0x230c
-	.4byte	0x3b81
+	.4byte	.LVL1082
+	.4byte	0x22fb
+	.4byte	0x3b6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31127,9 +31087,9 @@ __func__.9940:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1085
-	.4byte	0x928b
-	.4byte	0x3ba8
+	.4byte	.LVL1093
+	.4byte	0x92b5
+	.4byte	0x3b95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31141,18 +31101,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR156
+	.4byte	.LANCHOR155
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x8df
+	.2byte	0x911
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1087
-	.4byte	0x5279
-	.4byte	0x3bc7
+	.4byte	.LVL1095
+	.4byte	0x526b
+	.4byte	0x3bb4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31172,17 +31132,17 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1088
-	.4byte	0x6189
+	.4byte	.LVL1096
+	.4byte	0x616f
 	.uleb128 0x34
-	.4byte	.LVL1092
-	.4byte	0x928b
+	.4byte	.LVL1100
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC92
+	.4byte	.LC95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31193,38 +31153,38 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3bfa
+	.4byte	0x3be7
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3bea
+	.4byte	0x3bd7
 	.uleb128 0x5f
-	.4byte	.LASF666
+	.4byte	.LASF665
 	.byte	0x2
-	.2byte	0x88f
+	.2byte	0x8c1
 	.4byte	.LFB292
 	.4byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d01
+	.4byte	0x3cee
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x891
+	.2byte	0x8c3
 	.4byte	0xdba
-	.4byte	.LLST373
+	.4byte	.LLST378
 	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x892
+	.2byte	0x8c4
 	.4byte	0xdc5
-	.4byte	.LLST374
+	.4byte	.LLST379
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x893
+	.2byte	0x8c5
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
@@ -31232,25 +31192,25 @@ __func__.9940:
 	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
-	.2byte	0x894
+	.2byte	0x8c6
 	.4byte	0xdba
-	.4byte	.LLST375
+	.4byte	.LLST380
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3d11
+	.4byte	.LASF573
+	.4byte	0x3cfe
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9722
+	.4byte	__func__.9721
 	.uleb128 0x32
-	.4byte	.LVL1577
-	.4byte	0x928b
-	.4byte	0x3c81
+	.4byte	.LVL1611
+	.4byte	0x92b5
+	.4byte	0x3c6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC91
+	.4byte	.LC94
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31259,9 +31219,9 @@ __func__.9940:
 	.4byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1578
-	.4byte	0x230c
-	.4byte	0x3c95
+	.4byte	.LVL1612
+	.4byte	0x22fb
+	.4byte	0x3c82
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31270,9 +31230,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1582
-	.4byte	0x5279
-	.4byte	0x3cb4
+	.4byte	.LVL1616
+	.4byte	0x526b
+	.4byte	0x3ca1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31292,18 +31252,18 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1583
-	.4byte	0x6189
+	.4byte	.LVL1617
+	.4byte	0x616f
 	.uleb128 0x32
-	.4byte	.LVL1587
-	.4byte	0x928b
-	.4byte	0x3cda
+	.4byte	.LVL1621
+	.4byte	0x92b5
+	.4byte	0x3cc7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC102
+	.4byte	.LC105
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31312,9 +31272,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1588
-	.4byte	0x32fe
-	.4byte	0x3cee
+	.4byte	.LVL1622
+	.4byte	0x32db
+	.4byte	0x3cdb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31323,66 +31283,67 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1589
-	.4byte	0x537a
+	.4byte	.LVL1623
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL1590
-	.4byte	0x4d75
+	.4byte	.LVL1624
+	.4byte	0x4d67
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3d11
+	.4byte	0x3cfe
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3d01
+	.4byte	0x3cee
 	.uleb128 0x5f
-	.4byte	.LASF667
+	.4byte	.LASF666
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.4byte	.LFB291
 	.4byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3db9
+	.4byte	0x3da6
 	.uleb128 0x52
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x86b
-	.4byte	0x1d79
+	.2byte	0x89c
+	.4byte	0x1d68
 	.4byte	.LLST341
 	.uleb128 0x28
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x86d
+	.2byte	0x89e
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x54
-	.4byte	.LASF599
+	.uleb128 0x28
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x86e
-	.4byte	0x2aca
-	.4byte	.LLST342
+	.2byte	0x89f
+	.4byte	0x2ab9
+	.uleb128 0x1
+	.byte	0x55
 	.uleb128 0x54
-	.4byte	.LASF669
+	.4byte	.LASF668
 	.byte	0x2
-	.2byte	0x86f
+	.2byte	0x8a0
 	.4byte	0x50
-	.4byte	.LLST343
+	.4byte	.LLST342
 	.uleb128 0x62
 	.4byte	.LASF384
 	.byte	0x2
-	.2byte	0x870
+	.2byte	0x8a1
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1431
-	.4byte	0x333e
-	.4byte	0x3d8c
+	.4byte	.LVL1440
+	.4byte	0x331b
+	.4byte	0x3d77
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31391,9 +31352,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1434
-	.4byte	0x251a
-	.4byte	0x3daf
+	.4byte	.LVL1441
+	.4byte	0x2509
+	.4byte	0x3d9c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31408,31 +31369,33 @@ __func__.9940:
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x53
-	.uleb128 0x1
-	.byte	0x30
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1435
-	.4byte	0x3259
+	.4byte	.LVL1442
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0x63
-	.4byte	.LASF670
+	.4byte	.LASF669
 	.byte	0x2
-	.2byte	0x851
+	.2byte	0x882
 	.4byte	.LFB290
 	.4byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e0a
+	.4byte	0x3df7
 	.uleb128 0x32
-	.4byte	.LVL1556
-	.4byte	0x503e
-	.4byte	0x3ded
+	.4byte	.LVL1563
+	.4byte	0x5030
+	.4byte	0x3dda
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31451,8 +31414,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1557
-	.4byte	0x230c
+	.4byte	.LVL1564
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31473,66 +31436,66 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x55
-	.4byte	.LASF672
+	.4byte	.LASF671
 	.byte	0x2
-	.2byte	0x83d
+	.2byte	0x86e
 	.byte	0x1
 	.uleb128 0x5c
-	.4byte	.LASF673
+	.4byte	.LASF672
 	.byte	0x2
-	.2byte	0x812
+	.2byte	0x843
 	.4byte	0x50
 	.4byte	.LFB288
 	.4byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f19
+	.4byte	0x3f06
 	.uleb128 0x54
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST260
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST261
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST262
 	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdba
 	.4byte	.LLST263
 	.uleb128 0x54
-	.4byte	.LASF674
+	.4byte	.LASF673
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0xdba
 	.4byte	.LLST264
 	.uleb128 0x54
-	.4byte	.LASF675
+	.4byte	.LASF674
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0xdba
 	.4byte	.LLST265
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3f29
+	.4byte	.LASF573
+	.4byte	0x3f16
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9697
+	.4byte	__func__.9696
 	.uleb128 0x32
-	.4byte	.LVL1048
-	.4byte	0x230c
-	.4byte	0x3eb0
+	.4byte	.LVL1056
+	.4byte	0x22fb
+	.4byte	0x3e9d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31541,9 +31504,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1052
-	.4byte	0x61f9
-	.4byte	0x3ec4
+	.4byte	.LVL1060
+	.4byte	0x61df
+	.4byte	0x3eb1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31552,12 +31515,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1053
-	.4byte	0x682c
-	.uleb128 0x32
 	.4byte	.LVL1061
-	.4byte	0x5e01
-	.4byte	0x3ee1
+	.4byte	0x6812
+	.uleb128 0x32
+	.4byte	.LVL1069
+	.4byte	0x5e03
+	.4byte	0x3ece
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31566,9 +31529,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1068
-	.4byte	0x5ddc
-	.4byte	0x3ef5
+	.4byte	.LVL1076
+	.4byte	0x5dde
+	.4byte	0x3ee2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31577,8 +31540,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1070
-	.4byte	0x928b
+	.4byte	.LVL1078
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31590,63 +31553,63 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR155
+	.4byte	.LANCHOR154
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x839
+	.2byte	0x86a
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3f29
+	.4byte	0x3f16
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3f19
+	.4byte	0x3f06
 	.uleb128 0x48
-	.4byte	.LASF676
+	.4byte	.LASF675
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x50
 	.4byte	.LFB287
 	.4byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3fc4
+	.4byte	0x3fb1
 	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
-	.2byte	0x7fc
-	.4byte	0x1d79
-	.4byte	.LLST95
+	.2byte	0x82d
+	.4byte	0x1d68
+	.4byte	.LLST86
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdba
-	.4byte	.LLST96
+	.4byte	.LLST87
 	.uleb128 0x28
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9676
+	.4byte	__func__.9675
 	.uleb128 0x32
-	.4byte	.LVL271
-	.4byte	0x928b
-	.4byte	0x3faa
+	.4byte	.LVL259
+	.4byte	0x92b5
+	.4byte	0x3f97
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31658,20 +31621,20 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR61
+	.4byte	.LANCHOR60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x800
+	.2byte	0x831
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL274
-	.4byte	0x61f9
+	.4byte	.LVL262
+	.4byte	0x61df
 	.uleb128 0x34
-	.4byte	.LVL276
-	.4byte	0x682c
+	.4byte	.LVL264
+	.4byte	0x6812
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31681,19 +31644,19 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF677
+	.4byte	.LASF676
 	.byte	0x2
-	.2byte	0x7ef
+	.2byte	0x820
 	.4byte	0x50
 	.4byte	.LFB286
 	.4byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4048
+	.4byte	0x4035
 	.uleb128 0x32
-	.4byte	.LVL1693
-	.4byte	0x406e
-	.4byte	0x3ff2
+	.4byte	.LVL1697
+	.4byte	0x405b
+	.4byte	0x3fdf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31702,9 +31665,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1694
-	.4byte	0x4048
-	.4byte	0x4006
+	.4byte	.LVL1698
+	.4byte	0x4035
+	.4byte	0x3ff3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31713,9 +31676,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1695
-	.4byte	0x406e
-	.4byte	0x401a
+	.4byte	.LVL1699
+	.4byte	0x405b
+	.4byte	0x4007
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31724,9 +31687,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1696
-	.4byte	0x4048
-	.4byte	0x402e
+	.4byte	.LVL1700
+	.4byte	0x4035
+	.4byte	0x401b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31735,11 +31698,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1697
-	.4byte	0x2d93
+	.4byte	.LVL1701
+	.4byte	0x2d79
 	.uleb128 0x34
-	.4byte	.LVL1698
-	.4byte	0x3259
+	.4byte	.LVL1702
+	.4byte	0x3236
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31749,225 +31712,225 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF713
+	.4byte	.LASF712
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x406e
+	.4byte	0x405b
 	.uleb128 0x4a
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0x7dc
-	.4byte	0x1d79
+	.2byte	0x80d
+	.4byte	0x1d68
 	.uleb128 0x4b
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7de
+	.2byte	0x80f
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF678
+	.4byte	.LASF677
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x50
 	.4byte	.LFB284
 	.4byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45c7
+	.4byte	0x45b4
 	.uleb128 0x52
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x677
-	.4byte	0x1d79
+	.2byte	0x6a8
+	.4byte	0x1d68
 	.4byte	.LLST315
 	.uleb128 0x54
-	.4byte	.LASF679
+	.4byte	.LASF678
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0xdba
 	.4byte	.LLST316
 	.uleb128 0x54
-	.4byte	.LASF680
+	.4byte	.LASF679
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0xdba
 	.4byte	.LLST317
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdba
 	.4byte	.LLST318
 	.uleb128 0x54
 	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdba
 	.4byte	.LLST319
 	.uleb128 0x54
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdba
 	.4byte	.LLST320
 	.uleb128 0x54
-	.4byte	.LASF681
+	.4byte	.LASF680
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0xdba
 	.4byte	.LLST321
 	.uleb128 0x54
-	.4byte	.LASF682
+	.4byte	.LASF681
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0xdba
 	.4byte	.LLST322
 	.uleb128 0x54
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x67c
+	.2byte	0x6ad
 	.4byte	0xdba
 	.4byte	.LLST323
 	.uleb128 0x54
-	.4byte	.LASF683
+	.4byte	.LASF682
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x50
 	.4byte	.LLST324
 	.uleb128 0x54
-	.4byte	.LASF684
+	.4byte	.LASF683
 	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x50
 	.4byte	.LLST324
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdba
 	.4byte	.LLST326
 	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdba
 	.4byte	.LLST327
 	.uleb128 0x53
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdba
 	.4byte	.LLST328
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.4byte	.LLST329
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
 	.uleb128 0x28
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x28
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x54
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0xdba
 	.4byte	.LLST330
 	.uleb128 0x54
-	.4byte	.LASF685
+	.4byte	.LASF684
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0xdba
 	.4byte	.LLST331
 	.uleb128 0x54
-	.4byte	.LASF686
+	.4byte	.LASF685
 	.byte	0x2
-	.2byte	0x681
+	.2byte	0x6b2
 	.4byte	0xdc5
 	.4byte	.LLST332
 	.uleb128 0x54
-	.4byte	.LASF687
+	.4byte	.LASF686
 	.byte	0x2
-	.2byte	0x682
+	.2byte	0x6b3
 	.4byte	0xdba
 	.4byte	.LLST333
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x683
-	.4byte	0x2aca
+	.2byte	0x6b4
+	.4byte	0x2ab9
 	.4byte	.LLST334
 	.uleb128 0x62
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x2
-	.2byte	0x684
+	.2byte	0x6b5
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x45d7
+	.4byte	.LASF573
+	.4byte	0x45c4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9619
+	.4byte	__func__.9618
 	.uleb128 0x58
-	.4byte	.LASF690
+	.4byte	.LASF689
 	.byte	0x2
-	.2byte	0x713
-	.4byte	.L1150
+	.2byte	0x744
+	.4byte	.L1155
 	.uleb128 0x58
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x2
-	.2byte	0x71b
-	.4byte	.L1165
+	.2byte	0x74c
+	.4byte	.L1170
 	.uleb128 0x58
-	.4byte	.LASF691
+	.4byte	.LASF690
 	.byte	0x2
-	.2byte	0x7ce
-	.4byte	.L1173
+	.2byte	0x7ff
+	.4byte	.L1178
 	.uleb128 0x4d
-	.4byte	.LASF692
+	.4byte	.LASF691
 	.byte	0x2
-	.2byte	0x7d8
+	.2byte	0x809
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x120
-	.4byte	0x427a
+	.4byte	.Ldebug_ranges0+0x168
+	.4byte	0x4267
 	.uleb128 0x54
-	.4byte	.LASF693
+	.4byte	.LASF692
 	.byte	0x2
-	.2byte	0x6eb
+	.2byte	0x71c
 	.4byte	0xdc5
 	.4byte	.LLST335
 	.uleb128 0x54
-	.4byte	.LASF694
+	.4byte	.LASF693
 	.byte	0x2
-	.2byte	0x6ec
+	.2byte	0x71d
 	.4byte	0xdc5
 	.4byte	.LLST336
 	.uleb128 0x34
-	.4byte	.LVL1346
-	.4byte	0x26b9
+	.4byte	.LVL1354
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31982,24 +31945,24 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x138
-	.4byte	0x434f
+	.4byte	.Ldebug_ranges0+0x180
+	.4byte	0x433c
 	.uleb128 0x54
-	.4byte	.LASF695
+	.4byte	.LASF694
 	.byte	0x2
-	.2byte	0x746
+	.2byte	0x777
 	.4byte	0xdc5
 	.4byte	.LLST337
 	.uleb128 0x54
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x747
+	.2byte	0x778
 	.4byte	0xdc5
 	.4byte	.LLST338
 	.uleb128 0x32
-	.4byte	.LVL1390
-	.4byte	0x26b9
-	.4byte	0x42bb
+	.4byte	.LVL1398
+	.4byte	0x26a8
+	.4byte	0x42a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32012,12 +31975,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1392
-	.4byte	0x3259
+	.4byte	.LVL1400
+	.4byte	0x3236
 	.uleb128 0x32
-	.4byte	.LVL1398
-	.4byte	0x5279
-	.4byte	0x42e3
+	.4byte	.LVL1406
+	.4byte	0x526b
+	.4byte	0x42d0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32037,9 +32000,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1400
-	.4byte	0x6144
-	.4byte	0x42f7
+	.4byte	.LVL1408
+	.4byte	0x612a
+	.4byte	0x42e4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32048,9 +32011,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1401
-	.4byte	0x45dc
-	.4byte	0x430b
+	.4byte	.LVL1409
+	.4byte	0x45c9
+	.4byte	0x42f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32059,9 +32022,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1403
-	.4byte	0x26b9
-	.4byte	0x4323
+	.4byte	.LVL1411
+	.4byte	0x26a8
+	.4byte	0x4310
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32074,9 +32037,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1405
-	.4byte	0x6144
-	.4byte	0x4337
+	.4byte	.LVL1413
+	.4byte	0x612a
+	.4byte	0x4324
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32085,8 +32048,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1406
-	.4byte	0x6144
+	.4byte	.LVL1414
+	.4byte	0x612a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32103,25 +32066,25 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LBB275
-	.4byte	.LBE275-.LBB275
-	.4byte	0x43cb
+	.4byte	.LBB308
+	.4byte	.LBE308-.LBB308
+	.4byte	0x43b8
 	.uleb128 0x54
-	.4byte	.LASF697
+	.4byte	.LASF696
 	.byte	0x2
-	.2byte	0x785
+	.2byte	0x7b6
 	.4byte	0xdc5
 	.4byte	.LLST339
 	.uleb128 0x54
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x786
+	.2byte	0x7b7
 	.4byte	0xdc5
 	.4byte	.LLST340
 	.uleb128 0x32
-	.4byte	.LVL1415
-	.4byte	0x26b9
-	.4byte	0x4394
+	.4byte	.LVL1423
+	.4byte	0x26a8
+	.4byte	0x4381
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32134,9 +32097,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1416
-	.4byte	0x6144
-	.4byte	0x43af
+	.4byte	.LVL1424
+	.4byte	0x612a
+	.4byte	0x439c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32152,8 +32115,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1418
-	.4byte	0x5279
+	.4byte	.LVL1426
+	.4byte	0x526b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32174,9 +32137,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1295
-	.4byte	0x6078
-	.4byte	0x43de
+	.4byte	.LVL1303
+	.4byte	0x605e
+	.4byte	0x43cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32184,9 +32147,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1301
-	.4byte	0x26b9
-	.4byte	0x43f7
+	.4byte	.LVL1309
+	.4byte	0x26a8
+	.4byte	0x43e4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32200,12 +32163,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1307
-	.4byte	0x61c1
+	.4byte	.LVL1315
+	.4byte	0x61a7
 	.uleb128 0x32
-	.4byte	.LVL1310
-	.4byte	0x46f4
-	.4byte	0x4414
+	.4byte	.LVL1318
+	.4byte	0x46e1
+	.4byte	0x4401
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32214,9 +32177,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1314
-	.4byte	0x928b
-	.4byte	0x443b
+	.4byte	.LVL1322
+	.4byte	0x92b5
+	.4byte	0x4428
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32228,18 +32191,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR161
+	.4byte	.LANCHOR160
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6aa
+	.2byte	0x6db
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1315
-	.4byte	0x928b
-	.4byte	0x4462
+	.4byte	.LVL1323
+	.4byte	0x92b5
+	.4byte	0x444f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32251,18 +32214,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR161
+	.4byte	.LANCHOR160
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6ab
+	.2byte	0x6dc
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1327
-	.4byte	0x6144
-	.4byte	0x447c
+	.4byte	.LVL1335
+	.4byte	0x612a
+	.4byte	0x4469
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32277,9 +32240,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1351
-	.4byte	0x4f28
-	.4byte	0x4493
+	.4byte	.LVL1359
+	.4byte	0x4f1a
+	.4byte	0x4480
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32288,9 +32251,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1354
-	.4byte	0x26b9
-	.4byte	0x44ae
+	.4byte	.LVL1362
+	.4byte	0x26a8
+	.4byte	0x449b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32305,9 +32268,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1374
-	.4byte	0x61c1
-	.4byte	0x44c8
+	.4byte	.LVL1382
+	.4byte	0x61a7
+	.4byte	0x44b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32322,12 +32285,12 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1379
-	.4byte	0x3259
+	.4byte	.LVL1387
+	.4byte	0x3236
 	.uleb128 0x32
-	.4byte	.LVL1384
-	.4byte	0x6144
-	.4byte	0x44ec
+	.4byte	.LVL1392
+	.4byte	0x612a
+	.4byte	0x44d9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32343,9 +32306,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1387
-	.4byte	0x5279
-	.4byte	0x450b
+	.4byte	.LVL1395
+	.4byte	0x526b
+	.4byte	0x44f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32365,9 +32328,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1388
-	.4byte	0x6144
-	.4byte	0x4526
+	.4byte	.LVL1396
+	.4byte	0x612a
+	.4byte	0x4513
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32383,9 +32346,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1393
-	.4byte	0x6189
-	.4byte	0x4540
+	.4byte	.LVL1401
+	.4byte	0x616f
+	.4byte	0x452d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32400,9 +32363,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1396
-	.4byte	0x928b
-	.4byte	0x4567
+	.4byte	.LVL1404
+	.4byte	0x92b5
+	.4byte	0x4554
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32414,18 +32377,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR161
+	.4byte	.LANCHOR160
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x7a5
+	.2byte	0x7d6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1410
-	.4byte	0x5279
-	.4byte	0x4586
+	.4byte	.LVL1418
+	.4byte	0x526b
+	.4byte	0x4573
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32445,9 +32408,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1411
-	.4byte	0x6189
-	.4byte	0x45a0
+	.4byte	.LVL1419
+	.4byte	0x616f
+	.4byte	0x458d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32462,15 +32425,15 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1420
-	.4byte	0x928b
-	.4byte	0x45bd
+	.4byte	.LVL1428
+	.4byte	0x92b5
+	.4byte	0x45aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC99
+	.4byte	.LC102
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32479,76 +32442,76 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1423
-	.4byte	0x3259
+	.4byte	.LVL1431
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x45d7
+	.4byte	0x45c4
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x45c7
+	.4byte	0x45b4
 	.uleb128 0x5f
-	.4byte	.LASF698
+	.4byte	.LASF697
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	.LFB283
 	.4byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46f4
+	.4byte	0x46e1
 	.uleb128 0x5d
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdc5
 	.4byte	.LLST233
 	.uleb128 0x52
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdc5
 	.4byte	.LLST234
 	.uleb128 0x54
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x2
-	.2byte	0x65d
+	.2byte	0x68e
 	.4byte	0xdba
 	.4byte	.LLST235
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9585
+	.4byte	__func__.9584
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xa0
-	.4byte	0x46bd
+	.4byte	.Ldebug_ranges0+0xe8
+	.4byte	0x46aa
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x661
+	.2byte	0x692
 	.4byte	0xdba
 	.4byte	.LLST236
 	.uleb128 0x54
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x662
+	.2byte	0x693
 	.4byte	0xdba
 	.4byte	.LLST237
 	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x663
+	.2byte	0x694
 	.4byte	0xdba
 	.4byte	.LLST238
 	.uleb128 0x32
-	.4byte	.LVL899
-	.4byte	0x5c31
-	.4byte	0x4685
+	.4byte	.LVL907
+	.4byte	0x5c23
+	.4byte	0x4672
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32563,9 +32526,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL900
-	.4byte	0x928b
-	.4byte	0x46ac
+	.4byte	.LVL908
+	.4byte	0x92b5
+	.4byte	0x4699
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32583,11 +32546,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x667
+	.2byte	0x698
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL901
-	.4byte	0x5ddc
+	.4byte	.LVL909
+	.4byte	0x5dde
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32597,9 +32560,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL893
-	.4byte	0x6189
-	.4byte	0x46d8
+	.4byte	.LVL901
+	.4byte	0x616f
+	.4byte	0x46c5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32615,8 +32578,8 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL907
-	.4byte	0x5279
+	.4byte	.LVL915
+	.4byte	0x526b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32637,56 +32600,56 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF699
+	.4byte	.LASF698
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	.LFB282
 	.4byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4749
+	.4byte	0x4736
 	.uleb128 0x65
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x647
-	.4byte	0x1d79
+	.2byte	0x678
+	.4byte	0x1d68
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x52
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdba
-	.4byte	.LLST90
+	.4byte	.LLST81
 	.uleb128 0x52
 	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdba
-	.4byte	.LLST91
+	.4byte	.LLST82
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x649
+	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST92
+	.4byte	.LLST83
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF700
+	.4byte	.LASF699
 	.byte	0x2
-	.2byte	0x63e
+	.2byte	0x66f
 	.4byte	0x50
 	.4byte	.LFB281
 	.4byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4780
+	.4byte	0x476d
 	.uleb128 0x44
-	.4byte	.LVL1039
-	.4byte	0x4780
+	.4byte	.LVL1047
+	.4byte	0x476d
 	.uleb128 0x34
-	.4byte	.LVL1040
-	.4byte	0x47f8
+	.4byte	.LVL1048
+	.4byte	0x47e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32696,24 +32659,24 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF701
+	.4byte	.LASF700
 	.byte	0x2
-	.2byte	0x627
+	.2byte	0x658
 	.4byte	.LFB280
 	.4byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x47ca
+	.4byte	0x47b7
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x629
+	.2byte	0x65a
 	.4byte	0xdba
 	.4byte	.LLST259
 	.uleb128 0x32
-	.4byte	.LVL1036
-	.4byte	0x230c
-	.4byte	0x47b9
+	.4byte	.LVL1044
+	.4byte	0x22fb
+	.4byte	0x47a6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32721,8 +32684,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1037
-	.4byte	0x230c
+	.4byte	.LVL1045
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32732,18 +32695,18 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF702
+	.4byte	.LASF701
 	.byte	0x2
-	.2byte	0x617
+	.2byte	0x648
 	.4byte	0x50
 	.4byte	.LFB279
 	.4byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x47f8
+	.4byte	0x47e5
 	.uleb128 0x34
-	.4byte	.LVL1035
-	.4byte	0x47f8
+	.4byte	.LVL1043
+	.4byte	0x47e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32753,88 +32716,88 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF703
+	.4byte	.LASF702
 	.byte	0x2
-	.2byte	0x5b9
+	.2byte	0x5ea
 	.4byte	0x50
 	.4byte	.LFB278
 	.4byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x499b
+	.4byte	0x4988
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x5b9
-	.4byte	0x499b
+	.2byte	0x5ea
+	.4byte	0x4988
 	.4byte	.LLST251
 	.uleb128 0x54
-	.4byte	.LASF705
+	.4byte	.LASF704
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xddb
 	.4byte	.LLST252
 	.uleb128 0x54
 	.4byte	.LASF299
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xddb
 	.4byte	.LLST253
 	.uleb128 0x54
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x5bc
+	.2byte	0x5ed
 	.4byte	0xddb
 	.4byte	.LLST254
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x5bd
+	.2byte	0x5ee
 	.4byte	0xdba
 	.4byte	.LLST255
 	.uleb128 0x28
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x5be
+	.2byte	0x5ef
 	.4byte	0xff2
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x54
 	.4byte	.LASF310
 	.byte	0x2
-	.2byte	0x5bf
+	.2byte	0x5f0
 	.4byte	0x10e9
 	.4byte	.LLST256
 	.uleb128 0x54
 	.4byte	.LASF311
 	.byte	0x2
-	.2byte	0x5c0
+	.2byte	0x5f1
 	.4byte	0xff2
 	.4byte	.LLST257
 	.uleb128 0x28
 	.4byte	.LASF307
 	.byte	0x2
-	.2byte	0x5c1
+	.2byte	0x5f2
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x54
-	.4byte	.LASF708
+	.4byte	.LASF707
 	.byte	0x2
-	.2byte	0x5c2
+	.2byte	0x5f3
 	.4byte	0xdba
 	.4byte	.LLST258
 	.uleb128 0x28
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x5c3
-	.4byte	0x49a1
+	.2byte	0x5f4
+	.4byte	0x498e
 	.uleb128 0x1
 	.byte	0x57
 	.uleb128 0x32
-	.4byte	.LVL999
-	.4byte	0x230c
-	.4byte	0x48de
+	.4byte	.LVL1007
+	.4byte	0x22fb
+	.4byte	0x48cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32857,9 +32820,9 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1004
-	.4byte	0x6078
-	.4byte	0x48f1
+	.4byte	.LVL1012
+	.4byte	0x605e
+	.4byte	0x48de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32867,9 +32830,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1010
-	.4byte	0x58a4
-	.4byte	0x4905
+	.4byte	.LVL1018
+	.4byte	0x5896
+	.4byte	0x48f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32878,9 +32841,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1011
-	.4byte	0x584c
-	.4byte	0x4919
+	.4byte	.LVL1019
+	.4byte	0x583e
+	.4byte	0x4906
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32889,9 +32852,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1012
-	.4byte	0x5702
-	.4byte	0x492d
+	.4byte	.LVL1020
+	.4byte	0x56f4
+	.4byte	0x491a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32900,9 +32863,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1013
-	.4byte	0x5702
-	.4byte	0x4941
+	.4byte	.LVL1021
+	.4byte	0x56f4
+	.4byte	0x492e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32911,15 +32874,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1016
-	.4byte	0x26b9
-	.4byte	0x4962
+	.4byte	.LVL1024
+	.4byte	0x26a8
+	.4byte	0x494f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR108
+	.4byte	.LANCHOR106
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32932,9 +32895,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1021
-	.4byte	0x26b9
-	.4byte	0x4980
+	.4byte	.LVL1029
+	.4byte	0x26a8
+	.4byte	0x496d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32953,8 +32916,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1025
-	.4byte	0x26b9
+	.4byte	.LVL1033
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32980,31 +32943,31 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1271
 	.uleb128 0x5c
-	.4byte	.LASF710
+	.4byte	.LASF709
 	.byte	0x2
-	.2byte	0x54f
+	.2byte	0x580
 	.4byte	0x50
 	.4byte	.LFB277
 	.4byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b15
+	.4byte	0x4b02
 	.uleb128 0x54
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x551
+	.2byte	0x582
 	.4byte	0xddb
-	.4byte	.LLST448
+	.4byte	.LLST447
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9522
+	.4byte	__func__.9521
 	.uleb128 0x32
-	.4byte	.LVL1966
-	.4byte	0x230c
-	.4byte	0x49f3
+	.4byte	.LVL1954
+	.4byte	0x22fb
+	.4byte	0x49e0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33012,9 +32975,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1967
-	.4byte	0x6078
-	.4byte	0x4a06
+	.4byte	.LVL1955
+	.4byte	0x605e
+	.4byte	0x49f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33022,9 +32985,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1969
-	.4byte	0x928b
-	.4byte	0x4a2d
+	.4byte	.LVL1957
+	.4byte	0x92b5
+	.4byte	0x4a1a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33036,18 +32999,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR181
+	.4byte	.LANCHOR179
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56c
+	.2byte	0x59d
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1970
-	.4byte	0x928b
-	.4byte	0x4a54
+	.4byte	.LVL1958
+	.4byte	0x92b5
+	.4byte	0x4a41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33059,18 +33022,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR181
+	.4byte	.LANCHOR179
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56e
+	.2byte	0x59f
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1972
-	.4byte	0x22a6
-	.4byte	0x4a6e
+	.4byte	.LVL1960
+	.4byte	0x2295
+	.4byte	0x4a5b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33085,15 +33048,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1973
-	.4byte	0x22a6
+	.4byte	.LVL1961
+	.4byte	0x2295
 	.uleb128 0x44
-	.4byte	.LVL1974
-	.4byte	0x22a6
+	.4byte	.LVL1962
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1976
-	.4byte	0x928b
-	.4byte	0x4aa7
+	.4byte	.LVL1964
+	.4byte	0x92b5
+	.4byte	0x4a94
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33105,18 +33068,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR181
+	.4byte	.LANCHOR179
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x584
+	.2byte	0x5b5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1977
-	.4byte	0x3f2e
-	.4byte	0x4abe
+	.4byte	.LVL1965
+	.4byte	0x3f1b
+	.4byte	0x4aab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33125,9 +33088,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1978
-	.4byte	0x3f2e
-	.4byte	0x4ad2
+	.4byte	.LVL1966
+	.4byte	0x3f1b
+	.4byte	0x4abf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33136,9 +33099,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1979
-	.4byte	0x3f2e
-	.4byte	0x4ae6
+	.4byte	.LVL1967
+	.4byte	0x3f1b
+	.4byte	0x4ad3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33147,9 +33110,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1980
-	.4byte	0x3f2e
-	.4byte	0x4afa
+	.4byte	.LVL1968
+	.4byte	0x3f1b
+	.4byte	0x4ae7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33158,8 +33121,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1982
-	.4byte	0x26b9
+	.4byte	.LVL1970
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33179,65 +33142,65 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF711
+	.4byte	.LASF710
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x50
 	.4byte	.LFB276
 	.4byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4b40
+	.4byte	0x4b2d
 	.uleb128 0x52
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0xdba
-	.4byte	.LLST89
+	.4byte	.LLST80
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF714
+	.4byte	.LASF713
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.byte	0x1
-	.4byte	0x4b66
+	.4byte	0x4b53
 	.uleb128 0x4a
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0xdba
 	.uleb128 0x4a
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x50
 	.byte	0
 	.uleb128 0x51
-	.4byte	.LASF716
+	.4byte	.LASF715
 	.byte	0x2
-	.2byte	0x535
+	.2byte	0x566
 	.4byte	0x50
 	.byte	0x1
 	.uleb128 0x48
-	.4byte	.LASF717
+	.4byte	.LASF716
 	.byte	0x2
-	.2byte	0x446
+	.2byte	0x477
 	.4byte	0x50
 	.4byte	.LFB273
 	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d75
+	.4byte	0x4d67
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdba
 	.4byte	.LLST245
 	.uleb128 0x28
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdba
 	.uleb128 0x2
 	.byte	0x91
@@ -33245,43 +33208,43 @@ __func__.9940:
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdba
 	.4byte	.LLST246
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdba
 	.4byte	.LLST247
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xddb
 	.4byte	.LLST248
 	.uleb128 0x53
 	.ascii	"j\000"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xddb
 	.4byte	.LLST249
 	.uleb128 0x54
-	.4byte	.LASF719
+	.4byte	.LASF718
 	.byte	0x2
-	.2byte	0x44b
-	.4byte	0x49a1
+	.2byte	0x47c
+	.4byte	0x498e
 	.4byte	.LLST250
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3bfa
+	.4byte	.LASF573
+	.4byte	0x3be7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9465
+	.4byte	__func__.9464
 	.uleb128 0x32
-	.4byte	.LVL937
-	.4byte	0x230c
-	.4byte	0x4c1b
+	.4byte	.LVL945
+	.4byte	0x22fb
+	.4byte	0x4c08
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33290,9 +33253,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL938
-	.4byte	0x230c
-	.4byte	0x4c2f
+	.4byte	.LVL946
+	.4byte	0x22fb
+	.4byte	0x4c1c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33301,9 +33264,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL939
-	.4byte	0x230c
-	.4byte	0x4c43
+	.4byte	.LVL947
+	.4byte	0x22fb
+	.4byte	0x4c30
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33312,9 +33275,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL940
-	.4byte	0x230c
-	.4byte	0x4c57
+	.4byte	.LVL948
+	.4byte	0x22fb
+	.4byte	0x4c44
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33323,15 +33286,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL941
-	.4byte	0x230c
-	.4byte	0x4c79
+	.4byte	.LVL949
+	.4byte	0x22fb
+	.4byte	0x4c66
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR81
+	.4byte	.LANCHOR79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33345,9 +33308,9 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL944
-	.4byte	0x61f9
-	.4byte	0x4c8f
+	.4byte	.LVL952
+	.4byte	0x61df
+	.4byte	0x4c7c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33358,9 +33321,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL946
-	.4byte	0x682c
-	.4byte	0x4ca5
+	.4byte	.LVL954
+	.4byte	0x6812
+	.4byte	0x4c92
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33371,9 +33334,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL952
-	.4byte	0x26b9
-	.4byte	0x4cc4
+	.4byte	.LVL960
+	.4byte	0x26a8
+	.4byte	0x4cb1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33393,9 +33356,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL955
-	.4byte	0x26b9
-	.4byte	0x4cdc
+	.4byte	.LVL963
+	.4byte	0x26a8
+	.4byte	0x4cc9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33408,20 +33371,25 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL963
-	.4byte	0x5f68
-	.4byte	0x4cf0
+	.4byte	.LVL965
+	.4byte	0x5fb2
+	.4byte	0x4ce2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x75
 	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL964
-	.4byte	0x928b
-	.4byte	0x4d17
+	.4byte	.LVL972
+	.4byte	0x92b5
+	.4byte	0x4d09
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33439,12 +33407,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x48a
+	.2byte	0x4bb
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL973
-	.4byte	0x928b
-	.4byte	0x4d3e
+	.4byte	.LVL981
+	.4byte	0x92b5
+	.4byte	0x4d30
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33462,12 +33430,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x4b3
+	.2byte	0x4e4
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL982
-	.4byte	0x5f68
-	.4byte	0x4d51
+	.4byte	.LVL990
+	.4byte	0x5fb2
+	.4byte	0x4d43
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33475,8 +33443,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL984
-	.4byte	0x928b
+	.4byte	.LVL992
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33494,51 +33462,51 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x530
+	.2byte	0x561
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF720
+	.4byte	.LASF719
 	.byte	0x2
-	.2byte	0x3eb
+	.2byte	0x41c
 	.4byte	0x50
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ed6
+	.4byte	0x4ec8
 	.uleb128 0x54
 	.4byte	.LASF300
 	.byte	0x2
-	.2byte	0x3ed
+	.2byte	0x41e
 	.4byte	0xdba
-	.4byte	.LLST370
+	.4byte	.LLST369
 	.uleb128 0x54
-	.4byte	.LASF721
+	.4byte	.LASF720
 	.byte	0x2
-	.2byte	0x3ee
-	.4byte	0x4ed6
-	.4byte	.LLST371
+	.2byte	0x41f
+	.4byte	0x4ec8
+	.4byte	.LLST370
 	.uleb128 0x54
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x3ef
+	.2byte	0x420
 	.4byte	0xdba
-	.4byte	.LLST372
+	.4byte	.LLST371
 	.uleb128 0x4d
-	.4byte	.LASF723
+	.4byte	.LASF722
 	.byte	0x2
-	.2byte	0x41c
+	.2byte	0x44d
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9443
+	.4byte	__func__.9442
 	.uleb128 0x32
-	.4byte	.LVL1561
-	.4byte	0x230c
-	.4byte	0x4dea
+	.4byte	.LVL1568
+	.4byte	0x22fb
+	.4byte	0x4ddc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33547,15 +33515,15 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1562
-	.4byte	0x22a6
-	.4byte	0x4e07
+	.4byte	.LVL1569
+	.4byte	0x2295
+	.4byte	0x4df9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR79
+	.4byte	.LANCHOR39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -33564,15 +33532,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1563
-	.4byte	0x22a6
+	.4byte	.LVL1570
+	.4byte	0x2295
 	.uleb128 0x44
-	.4byte	.LVL1564
-	.4byte	0x22a6
+	.4byte	.LVL1571
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1565
-	.4byte	0x4fc2
-	.4byte	0x4e2d
+	.4byte	.LVL1572
+	.4byte	0x4fb4
+	.4byte	0x4e1f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33581,9 +33549,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1567
-	.4byte	0x251a
-	.4byte	0x4e50
+	.4byte	.LVL1574
+	.4byte	0x2509
+	.4byte	0x4e42
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33607,12 +33575,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1569
-	.4byte	0x5e26
+	.4byte	.LVL1576
+	.4byte	0x5e28
 	.uleb128 0x32
-	.4byte	.LVL1570
-	.4byte	0x251a
-	.4byte	0x4e7c
+	.4byte	.LVL1577
+	.4byte	0x2509
+	.4byte	0x4e6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33636,9 +33604,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1571
-	.4byte	0x928b
-	.4byte	0x4ea3
+	.4byte	.LVL1578
+	.4byte	0x92b5
+	.4byte	0x4e95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33650,24 +33618,24 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR167
+	.4byte	.LANCHOR166
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x433
+	.2byte	0x464
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1574
-	.4byte	0x928b
-	.4byte	0x4ec0
+	.4byte	.LVL1581
+	.4byte	0x92b5
+	.4byte	0x4eb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC101
+	.4byte	.LC104
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -33676,8 +33644,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1575
-	.4byte	0x5f68
+	.4byte	.LVL1582
+	.4byte	0x5fb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33695,76 +33663,76 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x12c9
 	.uleb128 0x64
-	.4byte	.LASF724
+	.4byte	.LASF723
 	.byte	0x2
-	.2byte	0x3b2
+	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x4f28
+	.4byte	0x4f1a
 	.uleb128 0x4f
 	.uleb128 0x4c
 	.ascii	"lpa\000"
 	.byte	0x2
-	.2byte	0x3b7
+	.2byte	0x3e8
 	.4byte	0xdc5
 	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x3b8
+	.2byte	0x3e9
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF725
+	.4byte	.LASF724
 	.byte	0x2
-	.2byte	0x3b9
+	.2byte	0x3ea
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x3ba
+	.2byte	0x3eb
 	.4byte	0xde6
 	.uleb128 0x4b
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x3bb
-	.4byte	0x2aca
+	.2byte	0x3ec
+	.4byte	0x2ab9
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF726
+	.4byte	.LASF725
 	.byte	0x2
-	.2byte	0x380
+	.2byte	0x3b1
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fc2
+	.4byte	0x4fb4
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x380
-	.4byte	0x499b
+	.2byte	0x3b1
+	.4byte	0x4988
 	.4byte	.LLST241
 	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x2
-	.2byte	0x382
+	.2byte	0x3b3
 	.4byte	0xdc5
 	.4byte	.LLST242
 	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x383
+	.2byte	0x3b4
 	.4byte	0xdba
 	.4byte	.LLST243
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x384
+	.2byte	0x3b5
 	.4byte	0xff2
 	.4byte	.LLST244
 	.uleb128 0x32
-	.4byte	.LVL931
-	.4byte	0x26b9
-	.4byte	0x4f9c
+	.4byte	.LVL939
+	.4byte	0x26a8
+	.4byte	0x4f8e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33783,9 +33751,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LVL933
-	.4byte	0x547e
-	.4byte	0x4fb1
+	.4byte	.LVL941
+	.4byte	0x5470
+	.4byte	0x4fa3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33795,8 +33763,8 @@ __func__.9940:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL935
-	.4byte	0x230c
+	.4byte	.LVL943
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33806,48 +33774,48 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x64
-	.4byte	.LASF727
+	.4byte	.LASF726
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x4fe6
+	.4byte	0x4fd8
 	.uleb128 0x4a
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.4byte	0xdc5
 	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x373
+	.2byte	0x3a4
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF728
+	.4byte	.LASF727
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x50
 	.4byte	.LFB268
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x503e
+	.4byte	0x5030
 	.uleb128 0x52
-	.4byte	.LASF729
+	.4byte	.LASF728
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0xdc5
-	.4byte	.LLST360
+	.4byte	.LLST359
 	.uleb128 0x54
-	.4byte	.LASF730
+	.4byte	.LASF729
 	.byte	0x2
-	.2byte	0x35e
+	.2byte	0x38f
 	.4byte	0xdc5
-	.4byte	.LLST361
+	.4byte	.LLST360
 	.uleb128 0x32
-	.4byte	.LVL1533
-	.4byte	0x5156
-	.4byte	0x5034
+	.4byte	.LVL1540
+	.4byte	0x5148
+	.4byte	0x5026
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33856,87 +33824,87 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1534
-	.4byte	0x3e0a
+	.4byte	.LVL1541
+	.4byte	0x3df7
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF731
+	.4byte	.LASF730
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdc5
 	.4byte	.LFB267
 	.4byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5150
+	.4byte	0x5142
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x367
+	.4byte	0xdc5
+	.4byte	.LLST361
 	.uleb128 0x52
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdc5
 	.4byte	.LLST362
 	.uleb128 0x52
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0xdc5
+	.2byte	0x367
+	.4byte	0x5142
 	.4byte	.LLST363
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x336
-	.4byte	0x5150
-	.4byte	.LLST364
 	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdba
-	.4byte	.LLST365
+	.4byte	.LLST364
 	.uleb128 0x54
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdba
-	.4byte	.LLST366
+	.4byte	.LLST365
 	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x339
+	.2byte	0x36a
 	.4byte	0xdc5
-	.4byte	.LLST367
+	.4byte	.LLST366
 	.uleb128 0x54
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x33a
+	.2byte	0x36b
 	.4byte	0xdc5
-	.4byte	.LLST368
+	.4byte	.LLST367
 	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x33b
+	.2byte	0x36c
 	.4byte	0xde6
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
 	.uleb128 0x54
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x33c
+	.2byte	0x36d
 	.4byte	0xdc5
-	.4byte	.LLST369
+	.4byte	.LLST368
 	.uleb128 0x28
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x33d
-	.4byte	0x2454
+	.2byte	0x36e
+	.4byte	0x2443
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1544
-	.4byte	0x26b9
-	.4byte	0x5117
+	.4byte	.LVL1551
+	.4byte	0x26a8
+	.4byte	0x5109
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33955,9 +33923,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1546
-	.4byte	0x22a6
-	.4byte	0x5131
+	.4byte	.LVL1553
+	.4byte	0x2295
+	.4byte	0x5123
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33972,8 +33940,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1551
-	.4byte	0x230c
+	.4byte	.LVL1558
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33999,83 +33967,83 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0xdaf
 	.uleb128 0x5c
-	.4byte	.LASF738
+	.4byte	.LASF737
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdc5
 	.4byte	.LFB266
 	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5279
+	.4byte	0x526b
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x342
+	.4byte	0xdc5
+	.4byte	.LLST351
 	.uleb128 0x52
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdc5
 	.4byte	.LLST352
 	.uleb128 0x52
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0xdc5
+	.2byte	0x342
+	.4byte	0x5142
 	.4byte	.LLST353
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x311
-	.4byte	0x5150
-	.4byte	.LLST354
 	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdba
-	.4byte	.LLST355
+	.4byte	.LLST354
 	.uleb128 0x54
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdba
-	.4byte	.LLST356
+	.4byte	.LLST355
 	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x314
+	.2byte	0x345
 	.4byte	0xdc5
-	.4byte	.LLST357
+	.4byte	.LLST356
 	.uleb128 0x54
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x315
+	.2byte	0x346
 	.4byte	0xdc5
-	.4byte	.LLST358
+	.4byte	.LLST357
 	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
-	.2byte	0x316
+	.2byte	0x347
 	.4byte	0xde6
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
 	.uleb128 0x54
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x317
+	.2byte	0x348
 	.4byte	0xdc5
-	.4byte	.LLST359
+	.4byte	.LLST358
 	.uleb128 0x28
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x318
-	.4byte	0x2454
+	.2byte	0x349
+	.4byte	0x2443
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1515
-	.4byte	0x26b9
-	.4byte	0x522f
+	.4byte	.LVL1522
+	.4byte	0x26a8
+	.4byte	0x5221
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34094,9 +34062,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1518
-	.4byte	0x22a6
-	.4byte	0x524c
+	.4byte	.LVL1525
+	.4byte	0x2295
+	.4byte	0x523e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34113,9 +34081,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1520
-	.4byte	0x547e
-	.4byte	0x5269
+	.4byte	.LVL1527
+	.4byte	0x5470
+	.4byte	0x525b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34130,8 +34098,8 @@ __func__.9940:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1525
-	.4byte	0x230c
+	.4byte	.LVL1532
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34140,68 +34108,68 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF739
+	.4byte	.LASF738
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x50
 	.4byte	.LFB265
 	.4byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5365
+	.4byte	0x5357
 	.uleb128 0x5d
 	.ascii	"lpn\000"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0xdc5
 	.4byte	.LLST229
 	.uleb128 0x5d
 	.ascii	"ppn\000"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0xff2
 	.4byte	.LLST230
 	.uleb128 0x52
-	.4byte	.LASF740
+	.4byte	.LASF739
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x50
 	.4byte	.LLST231
 	.uleb128 0x54
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdba
 	.4byte	.LLST232
 	.uleb128 0x28
-	.4byte	.LASF742
+	.4byte	.LASF741
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x28
-	.4byte	.LASF743
+	.4byte	.LASF742
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x5375
+	.4byte	.LASF573
+	.4byte	0x5367
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9370
+	.4byte	__func__.9369
 	.uleb128 0x58
-	.4byte	.LASF744
+	.4byte	.LASF743
 	.byte	0x2
-	.2byte	0x2fb
-	.4byte	.L741
+	.2byte	0x32c
+	.4byte	.L747
 	.uleb128 0x32
-	.4byte	.LVL880
-	.4byte	0x928b
-	.4byte	0x5331
+	.4byte	.LVL888
+	.4byte	0x92b5
+	.4byte	0x5323
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34219,15 +34187,15 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2f7
+	.2byte	0x328
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL883
-	.4byte	0x53b5
+	.4byte	.LVL891
+	.4byte	0x53a7
 	.uleb128 0x32
-	.4byte	.LVL885
-	.4byte	0x5430
-	.4byte	0x534e
+	.4byte	.LVL893
+	.4byte	0x5422
+	.4byte	0x5340
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34236,8 +34204,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL886
-	.4byte	0x5973
+	.4byte	.LVL894
+	.4byte	0x5965
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34254,73 +34222,73 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5375
+	.4byte	0x5367
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5365
+	.4byte	0x5357
 	.uleb128 0x48
-	.4byte	.LASF745
+	.4byte	.LASF744
 	.byte	0x2
-	.2byte	0x2e3
+	.2byte	0x314
 	.4byte	0x50
 	.4byte	.LFB264
 	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x53b5
+	.4byte	0x53a7
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2e5
+	.2byte	0x316
 	.4byte	0xdba
 	.4byte	.LLST314
 	.uleb128 0x44
-	.4byte	.LVL1281
-	.4byte	0x4edc
+	.4byte	.LVL1289
+	.4byte	0x4ece
 	.uleb128 0x44
-	.4byte	.LVL1285
-	.4byte	0x5430
+	.4byte	.LVL1293
+	.4byte	0x5422
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF746
+	.4byte	.LASF745
 	.byte	0x2
-	.2byte	0x2bb
+	.2byte	0x2ec
 	.4byte	0xdba
 	.4byte	.LFB263
 	.4byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5430
+	.4byte	0x5422
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
-	.2byte	0x2bd
+	.2byte	0x2ee
 	.4byte	0xdba
-	.4byte	.LLST83
+	.4byte	.LLST74
 	.uleb128 0x54
-	.4byte	.LASF747
+	.4byte	.LASF746
 	.byte	0x2
-	.2byte	0x2be
+	.2byte	0x2ef
 	.4byte	0xdba
-	.4byte	.LLST84
+	.4byte	.LLST75
 	.uleb128 0x54
-	.4byte	.LASF748
+	.4byte	.LASF747
 	.byte	0x2
-	.2byte	0x2bf
+	.2byte	0x2f0
 	.4byte	0xdc5
-	.4byte	.LLST85
+	.4byte	.LLST76
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x45d7
+	.4byte	.LASF573
+	.4byte	0x45c4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9353
+	.4byte	__func__.9352
 	.uleb128 0x34
-	.4byte	.LVL233
-	.4byte	0x928b
+	.4byte	.LVL221
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34332,40 +34300,40 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR58
+	.4byte	.LANCHOR57
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2df
+	.2byte	0x310
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF749
+	.4byte	.LASF748
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x50
 	.4byte	.LFB262
 	.4byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x547e
+	.4byte	0x5470
 	.uleb128 0x52
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0xdba
 	.4byte	.LLST227
 	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x2b3
+	.2byte	0x2e4
 	.4byte	0xdc5
 	.4byte	.LLST228
 	.uleb128 0x34
-	.4byte	.LVL873
-	.4byte	0x547e
+	.4byte	.LVL881
+	.4byte	0x5470
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34375,65 +34343,65 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF750
+	.4byte	.LASF749
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x50
 	.4byte	.LFB261
 	.4byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x55dd
+	.4byte	0x55cf
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x276
-	.4byte	0x499b
+	.2byte	0x2a7
+	.4byte	0x4988
 	.4byte	.LLST214
 	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0xdc5
 	.4byte	.LLST215
 	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0xff2
 	.4byte	.LLST216
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x278
+	.2byte	0x2a9
 	.4byte	0xdc5
 	.4byte	.LLST217
 	.uleb128 0x54
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x279
-	.4byte	0x49a1
+	.2byte	0x2aa
+	.4byte	0x498e
 	.4byte	.LLST218
 	.uleb128 0x54
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x27a
+	.2byte	0x2ab
 	.4byte	0xdba
 	.4byte	.LLST219
 	.uleb128 0x4d
-	.4byte	.LASF751
+	.4byte	.LASF750
 	.byte	0x2
-	.2byte	0x27c
+	.2byte	0x2ad
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9328
+	.4byte	__func__.9327
 	.uleb128 0x32
-	.4byte	.LVL835
-	.4byte	0x55dd
-	.4byte	0x5523
+	.4byte	.LVL843
+	.4byte	0x55cf
+	.4byte	0x5515
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34442,9 +34410,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL836
-	.4byte	0x928b
-	.4byte	0x554a
+	.4byte	.LVL844
+	.4byte	0x92b5
+	.4byte	0x553c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34462,12 +34430,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28a
+	.2byte	0x2bb
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL837
-	.4byte	0x928b
-	.4byte	0x5571
+	.4byte	.LVL845
+	.4byte	0x92b5
+	.4byte	0x5563
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34485,12 +34453,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28b
+	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL839
-	.4byte	0x230c
-	.4byte	0x5589
+	.4byte	.LVL847
+	.4byte	0x22fb
+	.4byte	0x557b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34503,9 +34471,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL842
-	.4byte	0x251a
-	.4byte	0x55ac
+	.4byte	.LVL850
+	.4byte	0x2509
+	.4byte	0x559e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34529,25 +34497,25 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL844
-	.4byte	0x928b
-	.4byte	0x55c3
+	.4byte	.LVL852
+	.4byte	0x92b5
+	.4byte	0x55b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC86
+	.4byte	.LC89
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL845
-	.4byte	0x928b
+	.4byte	.LVL853
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC87
+	.4byte	.LC90
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -34557,66 +34525,66 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF752
+	.4byte	.LASF751
 	.byte	0x2
-	.2byte	0x246
+	.2byte	0x277
 	.4byte	0x50
 	.4byte	.LFB260
 	.4byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x56ed
+	.4byte	0x56df
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x246
-	.4byte	0x499b
+	.2byte	0x277
+	.4byte	0x4988
 	.4byte	.LLST208
 	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdba
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdba
 	.4byte	.LLST209
 	.uleb128 0x54
-	.4byte	.LASF753
+	.4byte	.LASF752
 	.byte	0x2
-	.2byte	0x249
+	.2byte	0x27a
 	.4byte	0xdba
 	.4byte	.LLST210
 	.uleb128 0x54
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x24a
+	.2byte	0x27b
 	.4byte	0x10e9
 	.4byte	.LLST211
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x24b
+	.2byte	0x27c
 	.4byte	0xff2
 	.4byte	.LLST212
 	.uleb128 0x54
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x49a1
+	.2byte	0x27d
+	.4byte	0x498e
 	.4byte	.LLST213
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x56fd
+	.4byte	.LASF573
+	.4byte	0x56ef
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9314
+	.4byte	__func__.9313
 	.uleb128 0x32
-	.4byte	.LVL813
-	.4byte	0x928b
-	.4byte	0x5699
+	.4byte	.LVL821
+	.4byte	0x92b5
+	.4byte	0x568b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34634,15 +34602,15 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x250
+	.2byte	0x281
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL814
-	.4byte	0x5e26
+	.4byte	.LVL822
+	.4byte	0x5e28
 	.uleb128 0x32
-	.4byte	.LVL821
-	.4byte	0x230c
-	.4byte	0x56b6
+	.4byte	.LVL829
+	.4byte	0x22fb
+	.4byte	0x56a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34651,15 +34619,15 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL826
-	.4byte	0x251a
-	.4byte	0x56dc
+	.4byte	.LVL834
+	.4byte	0x2509
+	.4byte	0x56ce
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR108
+	.4byte	.LANCHOR106
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34677,8 +34645,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL827
-	.4byte	0x5702
+	.4byte	.LVL835
+	.4byte	0x56f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34689,75 +34657,75 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x56fd
+	.4byte	0x56ef
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x56ed
+	.4byte	0x56df
 	.uleb128 0x48
-	.4byte	.LASF755
+	.4byte	.LASF754
 	.byte	0x2
-	.2byte	0x218
+	.2byte	0x249
 	.4byte	0x50
 	.4byte	.LFB259
 	.4byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x584c
+	.4byte	0x583e
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x218
-	.4byte	0x499b
+	.2byte	0x249
+	.4byte	0x4988
 	.4byte	.LLST220
 	.uleb128 0x54
-	.4byte	.LASF756
+	.4byte	.LASF755
 	.byte	0x2
-	.2byte	0x21a
+	.2byte	0x24b
 	.4byte	0xdba
 	.4byte	.LLST221
 	.uleb128 0x54
-	.4byte	.LASF757
+	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x21b
+	.2byte	0x24c
 	.4byte	0xdba
 	.4byte	.LLST222
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x21c
+	.2byte	0x24d
 	.4byte	0xdba
 	.4byte	.LLST223
 	.uleb128 0x54
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x21d
+	.2byte	0x24e
 	.4byte	0x10e9
 	.4byte	.LLST224
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x21e
+	.2byte	0x24f
 	.4byte	0xff2
 	.4byte	.LLST225
 	.uleb128 0x54
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x21f
-	.4byte	0x49a1
+	.2byte	0x250
+	.4byte	0x498e
 	.4byte	.LLST226
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9300
+	.4byte	__func__.9299
 	.uleb128 0x32
-	.4byte	.LVL850
-	.4byte	0x58a4
-	.4byte	0x57af
+	.4byte	.LVL858
+	.4byte	0x5896
+	.4byte	0x57a1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34766,9 +34734,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL853
-	.4byte	0x584c
-	.4byte	0x57c3
+	.4byte	.LVL861
+	.4byte	0x583e
+	.4byte	0x57b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34777,9 +34745,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL856
-	.4byte	0x5f68
-	.4byte	0x57dc
+	.4byte	.LVL864
+	.4byte	0x5fb2
+	.4byte	0x57ce
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34793,9 +34761,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL858
-	.4byte	0x584c
-	.4byte	0x57f0
+	.4byte	.LVL866
+	.4byte	0x583e
+	.4byte	0x57e2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34804,9 +34772,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL863
-	.4byte	0x26b9
-	.4byte	0x580e
+	.4byte	.LVL871
+	.4byte	0x26a8
+	.4byte	0x5800
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34825,9 +34793,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL864
-	.4byte	0x928b
-	.4byte	0x5835
+	.4byte	.LVL872
+	.4byte	0x92b5
+	.4byte	0x5827
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34845,11 +34813,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x234
+	.2byte	0x265
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL868
-	.4byte	0x547e
+	.4byte	.LVL876
+	.4byte	0x5470
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34865,111 +34833,111 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF758
+	.4byte	.LASF757
 	.byte	0x2
-	.2byte	0x203
+	.2byte	0x231
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x588f
+	.4byte	0x5881
 	.uleb128 0x4a
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x203
-	.4byte	0x499b
+	.2byte	0x231
+	.4byte	0x4988
 	.uleb128 0x4b
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x205
+	.2byte	0x233
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x206
+	.2byte	0x234
 	.4byte	0x10e9
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x589f
-	.4byte	.LASF758
+	.4byte	.LASF573
+	.4byte	0x5891
+	.4byte	.LASF757
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x589f
+	.4byte	0x5891
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x588f
+	.4byte	0x5881
 	.uleb128 0x48
-	.4byte	.LASF760
+	.4byte	.LASF759
 	.byte	0x2
-	.2byte	0x1db
+	.2byte	0x209
 	.4byte	0x50
 	.4byte	.LFB257
 	.4byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5973
+	.4byte	0x5965
 	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x1db
-	.4byte	0x499b
+	.2byte	0x209
+	.4byte	0x4988
 	.4byte	.LLST201
 	.uleb128 0x28
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x1dd
+	.2byte	0x20b
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x54
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x1de
+	.2byte	0x20c
 	.4byte	0xff2
 	.4byte	.LLST202
 	.uleb128 0x28
-	.4byte	.LASF761
+	.4byte	.LASF760
 	.byte	0x2
-	.2byte	0x1df
+	.2byte	0x20d
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdba
 	.4byte	.LLST203
 	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdba
 	.4byte	.LLST204
 	.uleb128 0x54
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x1e1
+	.2byte	0x20f
 	.4byte	0xdba
 	.4byte	.LLST205
 	.uleb128 0x54
-	.4byte	.LASF762
+	.4byte	.LASF761
 	.byte	0x2
-	.2byte	0x1e2
+	.2byte	0x210
 	.4byte	0xdba
 	.4byte	.LLST206
 	.uleb128 0x54
-	.4byte	.LASF757
+	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x1e3
+	.2byte	0x211
 	.4byte	0xdba
 	.4byte	.LLST207
 	.uleb128 0x32
-	.4byte	.LVL790
-	.4byte	0x230c
-	.4byte	0x5963
+	.4byte	.LVL798
+	.4byte	0x22fb
+	.4byte	0x5955
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34983,8 +34951,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL807
-	.4byte	0x5f68
+	.4byte	.LVL815
+	.4byte	0x5fb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34993,51 +34961,51 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF763
+	.4byte	.LASF762
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x50
 	.4byte	.LFB256
 	.4byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ab5
+	.4byte	0x5aa7
 	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdba
 	.4byte	.LLST199
 	.uleb128 0x52
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdba
 	.4byte	.LLST200
 	.uleb128 0x28
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x1bb
-	.4byte	0x49a1
+	.2byte	0x1e9
+	.4byte	0x498e
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x28
-	.4byte	.LASF764
+	.4byte	.LASF763
 	.byte	0x2
-	.2byte	0x1bc
+	.2byte	0x1ea
 	.4byte	0xdc5
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3339
+	.4byte	.LASF573
+	.4byte	0x3316
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9257
+	.4byte	__func__.9255
 	.uleb128 0x32
-	.4byte	.LVL776
-	.4byte	0x928b
-	.4byte	0x59ff
+	.4byte	.LVL784
+	.4byte	0x92b5
+	.4byte	0x59f1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35055,12 +35023,12 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1be
+	.2byte	0x1ec
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL778
-	.4byte	0x230c
-	.4byte	0x5a13
+	.4byte	.LVL786
+	.4byte	0x22fb
+	.4byte	0x5a05
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35069,9 +35037,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL780
-	.4byte	0x26b9
-	.4byte	0x5a31
+	.4byte	.LVL788
+	.4byte	0x26a8
+	.4byte	0x5a23
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35090,15 +35058,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL782
-	.4byte	0x928b
-	.4byte	0x5a54
+	.4byte	.LVL790
+	.4byte	0x92b5
+	.4byte	0x5a46
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC83
+	.4byte	.LC86
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35113,15 +35081,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL783
-	.4byte	0x2836
-	.4byte	0x5a75
+	.4byte	.LVL791
+	.4byte	0x2825
+	.4byte	0x5a67
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC84
+	.4byte	.LC87
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -35134,15 +35102,15 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL784
-	.4byte	0x2836
-	.4byte	0x5a91
+	.4byte	.LVL792
+	.4byte	0x2825
+	.4byte	0x5a83
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC85
+	.4byte	.LC88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -35150,8 +35118,8 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL785
-	.4byte	0x928b
+	.4byte	.LVL793
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35169,109 +35137,109 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1d3
+	.2byte	0x201
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF765
+	.4byte	.LASF764
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x5b34
+	.4byte	0x5b26
 	.uleb128 0x4a
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF766
+	.4byte	.LASF765
 	.byte	0x2
-	.2byte	0x195
+	.2byte	0x1c1
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF767
+	.4byte	.LASF766
 	.byte	0x2
-	.2byte	0x196
+	.2byte	0x1c2
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.2byte	0x197
+	.2byte	0x1c3
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF769
+	.4byte	.LASF768
 	.byte	0x2
-	.2byte	0x199
+	.2byte	0x1c5
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF770
+	.4byte	.LASF769
 	.byte	0x2
-	.2byte	0x19a
+	.2byte	0x1c6
 	.4byte	0xdc5
 	.uleb128 0x4b
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1cc9
+	.2byte	0x1c7
+	.4byte	0x1cb8
 	.uleb128 0x4b
-	.4byte	.LASF771
+	.4byte	.LASF770
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1cc9
+	.2byte	0x1c7
+	.4byte	0x1cb8
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x45d7
-	.4byte	.LASF765
+	.4byte	.LASF573
+	.4byte	0x45c4
+	.4byte	.LASF764
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF772
+	.4byte	.LASF771
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x50
 	.4byte	.LFB254
 	.4byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5b7f
+	.4byte	0x5b71
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0xdba
-	.4byte	.LLST67
+	.4byte	.LLST62
 	.uleb128 0x54
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x181
+	.2byte	0x1ad
 	.4byte	0xdba
-	.4byte	.LLST68
+	.4byte	.LLST63
 	.uleb128 0x54
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x182
-	.4byte	0x1cc9
-	.4byte	.LLST69
+	.2byte	0x1ae
+	.4byte	0x1cb8
+	.4byte	.LLST64
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF773
+	.4byte	.LASF772
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x1a6
 	.4byte	0x50
 	.4byte	.LFB253
 	.4byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5bc0
+	.4byte	0x5bb2
 	.uleb128 0x52
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x17a
-	.4byte	0x5bc0
-	.4byte	.LLST66
+	.2byte	0x1a6
+	.4byte	0x5bb2
+	.4byte	.LLST61
 	.uleb128 0x2d
-	.4byte	.LVL186
-	.4byte	0x5bc6
+	.4byte	.LVL178
+	.4byte	0x5bb8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35288,44 +35256,44 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
-	.4byte	0x1cc9
+	.4byte	0x1cb8
 	.uleb128 0x48
-	.4byte	.LASF775
+	.4byte	.LASF774
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x50
 	.4byte	.LFB252
 	.4byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c31
+	.4byte	0x5c23
 	.uleb128 0x52
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x5bc0
-	.4byte	.LLST62
+	.2byte	0x193
+	.4byte	0x5bb2
+	.4byte	.LLST57
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0xdba
-	.4byte	.LLST63
+	.4byte	.LLST58
 	.uleb128 0x54
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x169
+	.2byte	0x195
 	.4byte	0xdba
-	.4byte	.LLST64
+	.4byte	.LLST59
 	.uleb128 0x54
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x16a
-	.4byte	0x1cc9
-	.4byte	.LLST65
+	.2byte	0x196
+	.4byte	0x1cb8
+	.4byte	.LLST60
 	.uleb128 0x34
-	.4byte	.LVL178
-	.4byte	0x5c31
+	.4byte	.LVL170
+	.4byte	0x5c23
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35335,49 +35303,49 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF776
+	.4byte	.LASF775
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x50
 	.4byte	.LFB251
 	.4byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5cbc
+	.4byte	0x5cae
 	.uleb128 0x52
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x5bc0
-	.4byte	.LLST59
+	.2byte	0x176
+	.4byte	0x5bb2
+	.4byte	.LLST54
 	.uleb128 0x52
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0xdba
-	.4byte	.LLST60
+	.4byte	.LLST55
 	.uleb128 0x28
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1cc9
+	.2byte	0x178
+	.4byte	0x1cb8
 	.uleb128 0x1
 	.byte	0x54
 	.uleb128 0x54
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1cc9
-	.4byte	.LLST61
+	.2byte	0x178
+	.4byte	0x1cb8
+	.4byte	.LLST56
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x5ccc
+	.4byte	.LASF573
+	.4byte	0x5cbe
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9216
+	.4byte	__func__.9214
 	.uleb128 0x34
-	.4byte	.LVL168
-	.4byte	0x928b
+	.4byte	.LVL158
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35395,384 +35363,401 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x151
+	.2byte	0x17b
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5ccc
+	.4byte	0x5cbe
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5cbc
+	.4byte	0x5cae
 	.uleb128 0x48
-	.4byte	.LASF778
+	.4byte	.LASF777
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x50
 	.4byte	.LFB250
 	.4byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d4a
+	.4byte	0x5d3c
 	.uleb128 0x52
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0xdba
-	.4byte	.LLST53
+	.4byte	.LLST48
 	.uleb128 0x54
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1cc9
-	.4byte	.LLST54
+	.2byte	0x147
+	.4byte	0x1cb8
+	.4byte	.LLST49
 	.uleb128 0x54
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1cc9
-	.4byte	.LLST55
+	.2byte	0x147
+	.4byte	0x1cb8
+	.4byte	.LLST50
 	.uleb128 0x28
-	.4byte	.LASF779
+	.4byte	.LASF778
 	.byte	0x2
-	.2byte	0x11e
+	.2byte	0x148
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x54
-	.4byte	.LASF780
+	.4byte	.LASF779
 	.byte	0x2
-	.2byte	0x11f
+	.2byte	0x149
 	.4byte	0xdba
-	.4byte	.LLST56
+	.4byte	.LLST51
 	.uleb128 0x54
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.2byte	0x120
+	.2byte	0x14a
 	.4byte	0xdba
-	.4byte	.LLST57
+	.4byte	.LLST52
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF782
+	.4byte	.LASF781
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x50
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ddc
+	.4byte	0x5dde
 	.uleb128 0x2c
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0xdba
-	.4byte	.LLST44
+	.4byte	.LLST38
 	.uleb128 0x30
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1cc9
-	.4byte	.LLST45
+	.byte	0xfa
+	.4byte	0x1cb8
+	.4byte	.LLST39
 	.uleb128 0x30
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1cc9
-	.4byte	.LLST46
+	.byte	0xfa
+	.4byte	0x1cb8
+	.4byte	.LLST40
 	.uleb128 0x30
-	.4byte	.LASF783
+	.4byte	.LASF782
 	.byte	0x2
-	.byte	0xdb
+	.byte	0xfb
 	.4byte	0xdba
-	.4byte	.LLST47
+	.4byte	.LLST41
 	.uleb128 0x30
-	.4byte	.LASF784
+	.4byte	.LASF783
 	.byte	0x2
-	.byte	0xdc
+	.byte	0xfc
 	.4byte	0xdba
-	.4byte	.LLST48
+	.4byte	.LLST42
 	.uleb128 0x30
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.byte	0xdd
+	.byte	0xfd
 	.4byte	0xdc5
-	.4byte	.LLST49
+	.4byte	.LLST43
 	.uleb128 0x30
-	.4byte	.LASF785
+	.4byte	.LASF784
 	.byte	0x2
-	.byte	0xde
+	.byte	0xfe
 	.4byte	0xdc5
-	.4byte	.LLST50
+	.4byte	.LLST44
 	.uleb128 0x30
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.byte	0xdf
+	.byte	0xff
 	.4byte	0xdba
-	.4byte	.LLST51
+	.4byte	.LLST45
+	.uleb128 0x54
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0xdba
+	.4byte	.LLST46
 	.byte	0
 	.uleb128 0x66
-	.4byte	.LASF786
+	.4byte	.LASF785
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.byte	0x1
-	.4byte	0x5e01
+	.4byte	0x5e03
 	.uleb128 0x36
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.4byte	0xdba
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x5ccc
-	.4byte	.LASF786
+	.4byte	.LASF573
+	.4byte	0x5cbe
+	.4byte	.LASF785
 	.byte	0
 	.uleb128 0x66
-	.4byte	.LASF787
+	.4byte	.LASF786
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.byte	0x1
-	.4byte	0x5e26
+	.4byte	0x5e28
 	.uleb128 0x36
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.4byte	0xdba
 	.uleb128 0x4e
-	.4byte	.LASF574
-	.4byte	0x5ccc
-	.4byte	.LASF787
+	.4byte	.LASF573
+	.4byte	0x5cbe
+	.4byte	.LASF786
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF788
+	.4byte	.LASF787
 	.byte	0x2
-	.byte	0xa4
+	.byte	0xb4
 	.4byte	0xdba
 	.4byte	.LFB246
 	.4byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e79
+	.4byte	0x5eec
 	.uleb128 0x3b
 	.ascii	"tmp\000"
 	.byte	0x2
-	.byte	0xa6
+	.byte	0xb6
 	.4byte	0xdba
-	.4byte	.LLST42
-	.uleb128 0x61
-	.4byte	.LBB176
-	.4byte	.LBE176-.LBB176
-	.4byte	0x5e69
-	.uleb128 0x3b
+	.4byte	.LLST185
+	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0xa9
-	.4byte	0x5e79
-	.4byte	.LLST43
-	.byte	0
+	.byte	0xb7
+	.4byte	0x5eec
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
 	.uleb128 0x67
-	.4byte	0x6013
-	.4byte	.LBB174
-	.4byte	.LBE174-.LBB174
+	.4byte	.LASF788
 	.byte	0x2
-	.byte	0xa8
+	.byte	0xb9
+	.4byte	.L531
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	0x5eac
+	.uleb128 0x30
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0xbf
+	.4byte	0xdba
+	.4byte	.LLST186
+	.uleb128 0x32
+	.4byte	.LVL690
+	.4byte	0x616f
+	.4byte	0x5e97
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL692
+	.4byte	0x2453
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.4byte	0x5ff9
+	.4byte	.LBB252
+	.4byte	.Ldebug_ranges0+0xb8
+	.byte	0x2
+	.byte	0xba
+	.uleb128 0x32
+	.4byte	.LVL694
+	.4byte	0x92b5
+	.4byte	0x5ed2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC82
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL696
+	.4byte	0x92b5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x1595
 	.uleb128 0x2b
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x50
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ee3
+	.4byte	0x5f56
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0xdba
-	.4byte	.LLST39
+	.4byte	.LLST35
 	.uleb128 0x3b
 	.ascii	"ret\000"
 	.byte	0x2
-	.byte	0x94
+	.byte	0xa4
 	.4byte	0x50
-	.4byte	.LLST40
+	.4byte	.LLST36
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x2
-	.byte	0x95
+	.byte	0xa5
 	.4byte	0xdc5
-	.4byte	.LLST41
+	.4byte	.LLST37
 	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0x96
-	.4byte	0x5e79
+	.byte	0xa6
+	.4byte	0x5eec
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x68
-	.4byte	0x6007
-	.4byte	.LBB170
+	.4byte	0x5fed
+	.4byte	.LBB189
 	.4byte	.Ldebug_ranges0+0x18
 	.byte	0x2
-	.byte	0x98
+	.byte	0xa8
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
-	.byte	0x73
+	.byte	0x75
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f68
+	.4byte	0x5fb2
+	.uleb128 0x29
+	.4byte	.LASF325
+	.byte	0x2
+	.byte	0x77
+	.4byte	0xdd0
+	.uleb128 0xe
+	.byte	0x3
+	.4byte	g_sys_save_data+28
+	.byte	0x94
+	.byte	0x2
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x2
-	.byte	0x75
+	.byte	0x78
 	.4byte	0xdba
 	.4byte	.LLST33
 	.uleb128 0x3b
-	.ascii	"tmp\000"
+	.ascii	"blk\000"
 	.byte	0x2
-	.byte	0x75
+	.byte	0x78
 	.4byte	0xdba
 	.4byte	.LLST34
-	.uleb128 0x3b
-	.ascii	"j\000"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0xdba
-	.4byte	.LLST35
-	.uleb128 0x30
-	.4byte	.LASF602
-	.byte	0x2
-	.byte	0x76
-	.4byte	0xdba
-	.4byte	.LLST36
-	.uleb128 0x30
-	.4byte	.LASF791
-	.byte	0x2
-	.byte	0x77
-	.4byte	0xdba
-	.4byte	.LLST37
-	.uleb128 0x30
-	.4byte	.LASF792
-	.byte	0x2
-	.byte	0x78
-	.4byte	0xdc5
-	.4byte	.LLST38
 	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x5e79
+	.4byte	0x5eec
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x44
-	.4byte	.LVL85
-	.4byte	0x6189
 	.byte	0
-	.uleb128 0x42
-	.4byte	.LASF793
+	.uleb128 0x66
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x61
-	.4byte	.LFB243
-	.4byte	.LFE243-.LFB243
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6007
-	.uleb128 0x2f
+	.byte	0x1
+	.4byte	0x5fed
+	.uleb128 0x41
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST177
-	.uleb128 0x2c
-	.4byte	.LASF794
+	.uleb128 0x36
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST178
-	.uleb128 0x61
-	.4byte	.LBB227
-	.4byte	.LBE227-.LBB227
-	.4byte	0x5ff7
-	.uleb128 0x3b
+	.uleb128 0x4f
+	.uleb128 0x31
 	.ascii	"Q\000"
 	.byte	0x2
-	.byte	0x64
-	.4byte	0x5e79
-	.4byte	.LLST179
-	.uleb128 0x69
-	.4byte	.LBB228
-	.4byte	.LBE228-.LBB228
-	.uleb128 0x30
-	.4byte	.LASF795
-	.byte	0x2
 	.byte	0x66
+	.4byte	0x5eec
+	.uleb128 0x4f
+	.uleb128 0x37
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x68
 	.4byte	0xdba
-	.4byte	.LLST180
-	.uleb128 0x32
-	.4byte	.LVL637
-	.4byte	0x6189
-	.4byte	0x5fe1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x75
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL639
-	.4byte	0x2464
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x67
-	.4byte	0x6007
-	.4byte	.LBB225
-	.4byte	.LBE225-.LBB225
-	.byte	0x2
-	.byte	0x63
-	.byte	0
-	.uleb128 0x6a
-	.4byte	.LASF796
+	.uleb128 0x69
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdba
 	.byte	0x1
-	.uleb128 0x6a
-	.4byte	.LASF797
+	.uleb128 0x69
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdba
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF798
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdba
@@ -35780,7 +35765,7 @@ __func__.9940:
 	.4byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6078
+	.4byte	0x605e
 	.uleb128 0x2f
 	.ascii	"max\000"
 	.byte	0x2
@@ -35791,14 +35776,14 @@ __func__.9940:
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x5e79
+	.4byte	0x5eec
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	.LVL772
-	.4byte	0x230c
+	.4byte	.LVL780
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35820,7 +35805,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF799
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
@@ -35828,19 +35813,19 @@ __func__.9940:
 	.4byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6144
+	.4byte	0x612a
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdc5
-	.4byte	.LLST159
+	.4byte	.LLST151
 	.uleb128 0x2c
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
-	.4byte	.LLST160
+	.4byte	.LLST152
 	.uleb128 0x3a
 	.ascii	"req\000"
 	.byte	0x2
@@ -35854,9 +35839,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST161
+	.4byte	.LLST153
 	.uleb128 0x29
-	.4byte	.LASF800
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
@@ -35867,25 +35852,25 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST162
+	.4byte	.LLST154
 	.uleb128 0x29
-	.4byte	.LASF801
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x32
-	.4byte	0x2454
+	.4byte	0x2443
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -88
 	.uleb128 0x30
-	.4byte	.LASF802
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdba
-	.4byte	.LLST163
+	.4byte	.LLST155
 	.uleb128 0x32
-	.4byte	.LVL593
-	.4byte	0x26b9
-	.4byte	0x6127
+	.4byte	.LVL583
+	.4byte	0x26a8
+	.4byte	0x610d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35905,8 +35890,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL598
-	.4byte	0x26b9
+	.4byte	.LVL588
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35927,7 +35912,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF803
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35935,15 +35920,15 @@ __func__.9940:
 	.4byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6189
+	.4byte	0x616f
 	.uleb128 0x2c
-	.4byte	.LASF804
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
 	.4byte	.LLST31
 	.uleb128 0x5b
-	.4byte	.LASF805
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35957,7 +35942,7 @@ __func__.9940:
 	.4byte	.LLST32
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF806
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
@@ -35965,22 +35950,22 @@ __func__.9940:
 	.4byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x61c1
+	.4byte	0x61a7
 	.uleb128 0x2c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
 	.4byte	.LLST29
 	.uleb128 0x30
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdba
 	.4byte	.LLST30
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF807
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
@@ -35988,22 +35973,22 @@ __func__.9940:
 	.4byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x61f9
+	.4byte	0x61df
 	.uleb128 0x2c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
 	.4byte	.LLST27
 	.uleb128 0x30
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdba
 	.4byte	.LLST28
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF808
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
@@ -36011,28 +35996,28 @@ __func__.9940:
 	.4byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6240
+	.4byte	0x6226
 	.uleb128 0x2c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST24
 	.uleb128 0x2c
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST25
 	.uleb128 0x30
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdba
 	.4byte	.LLST26
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF809
+	.4byte	.LASF807
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xdd0
@@ -36040,45 +36025,45 @@ __func__.9940:
 	.4byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6427
+	.4byte	0x640d
 	.uleb128 0x53
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdc5
-	.4byte	.LLST348
+	.4byte	.LLST347
 	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdba
-	.4byte	.LLST349
+	.4byte	.LLST348
 	.uleb128 0x54
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdc5
-	.4byte	.LLST350
+	.4byte	.LLST349
 	.uleb128 0x54
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x6427
-	.4byte	.LLST351
+	.4byte	0x640d
+	.4byte	.LLST350
 	.uleb128 0x4d
-	.4byte	.LASF811
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x44
-	.4byte	.LVL1462
-	.4byte	0x6623
+	.4byte	.LVL1469
+	.4byte	0x6609
 	.uleb128 0x44
-	.4byte	.LVL1463
-	.4byte	0x642d
+	.4byte	.LVL1470
+	.4byte	0x6413
 	.uleb128 0x32
-	.4byte	.LVL1467
-	.4byte	0x682c
-	.4byte	0x62c8
+	.4byte	.LVL1474
+	.4byte	0x6812
+	.4byte	0x62ae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36087,9 +36072,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1468
-	.4byte	0x2410
-	.4byte	0x62dc
+	.4byte	.LVL1475
+	.4byte	0x23ff
+	.4byte	0x62c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36098,9 +36083,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1469
-	.4byte	0x688f
-	.4byte	0x62f0
+	.4byte	.LVL1476
+	.4byte	0x6875
+	.4byte	0x62d6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36109,9 +36094,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1475
-	.4byte	0x26b9
-	.4byte	0x630e
+	.4byte	.LVL1482
+	.4byte	0x26a8
+	.4byte	0x62f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36130,12 +36115,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1476
-	.4byte	0x22a6
+	.4byte	.LVL1483
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1478
-	.4byte	0x688f
-	.4byte	0x632b
+	.4byte	.LVL1485
+	.4byte	0x6875
+	.4byte	0x6311
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36144,9 +36129,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1480
-	.4byte	0x236c
-	.4byte	0x633f
+	.4byte	.LVL1487
+	.4byte	0x235b
+	.4byte	0x6325
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36155,15 +36140,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1481
-	.4byte	0x67a0
+	.4byte	.LVL1488
+	.4byte	0x6786
 	.uleb128 0x44
-	.4byte	.LVL1483
-	.4byte	0x682c
+	.4byte	.LVL1490
+	.4byte	0x6812
 	.uleb128 0x32
-	.4byte	.LVL1484
-	.4byte	0x230c
-	.4byte	0x6369
+	.4byte	.LVL1491
+	.4byte	0x22fb
+	.4byte	0x634f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36176,9 +36161,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1485
-	.4byte	0x230c
-	.4byte	0x6383
+	.4byte	.LVL1492
+	.4byte	0x22fb
+	.4byte	0x6369
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36192,12 +36177,12 @@ __func__.9940:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1487
-	.4byte	0x22a6
+	.4byte	.LVL1494
+	.4byte	0x2295
 	.uleb128 0x32
-	.4byte	.LVL1488
-	.4byte	0x2464
-	.4byte	0x63aa
+	.4byte	.LVL1495
+	.4byte	0x2453
+	.4byte	0x6390
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36216,9 +36201,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1489
-	.4byte	0x251a
-	.4byte	0x63cd
+	.4byte	.LVL1496
+	.4byte	0x2509
+	.4byte	0x63b3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36242,9 +36227,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1490
-	.4byte	0x688f
-	.4byte	0x63e1
+	.4byte	.LVL1497
+	.4byte	0x6875
+	.4byte	0x63c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36253,12 +36238,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1495
-	.4byte	0x688f
+	.4byte	.LVL1502
+	.4byte	0x6875
 	.uleb128 0x32
-	.4byte	.LVL1498
-	.4byte	0x2464
-	.4byte	0x6402
+	.4byte	.LVL1505
+	.4byte	0x2453
+	.4byte	0x63e8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36271,23 +36256,23 @@ __func__.9940:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1499
-	.4byte	0x688f
+	.4byte	.LVL1506
+	.4byte	0x6875
 	.uleb128 0x44
-	.4byte	.LVL1500
-	.4byte	0x688f
+	.4byte	.LVL1507
+	.4byte	0x6875
 	.uleb128 0x44
-	.4byte	.LVL1501
-	.4byte	0x6657
+	.4byte	.LVL1508
+	.4byte	0x663d
 	.uleb128 0x44
-	.4byte	.LVL1503
-	.4byte	0x6657
+	.4byte	.LVL1510
+	.4byte	0x663d
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x11b9
 	.uleb128 0x48
-	.4byte	.LASF812
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x50
@@ -36295,7 +36280,7 @@ __func__.9940:
 	.4byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x649e
+	.4byte	0x6484
 	.uleb128 0x60
 	.ascii	"die\000"
 	.byte	0x4
@@ -36308,23 +36293,23 @@ __func__.9940:
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdba
-	.4byte	.LLST157
+	.4byte	.LLST149
 	.uleb128 0x54
-	.4byte	.LASF813
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdc5
-	.4byte	.LLST158
+	.4byte	.LLST150
 	.uleb128 0x28
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x6427
+	.4byte	0x640d
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL582
-	.4byte	0x26b9
+	.4byte	.LVL572
+	.4byte	0x26a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36344,7 +36329,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF814
+	.4byte	.LASF812
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x50
@@ -36352,44 +36337,44 @@ __func__.9940:
 	.4byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65cd
+	.4byte	0x65b3
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdc5
-	.4byte	.LLST344
+	.4byte	.LLST343
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdba
-	.4byte	.LLST345
+	.4byte	.LLST344
 	.uleb128 0x30
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xddb
-	.4byte	.LLST346
+	.4byte	.LLST345
 	.uleb128 0x30
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x6427
-	.4byte	.LLST347
+	.4byte	0x640d
+	.4byte	.LLST346
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x65dd
+	.4byte	.LASF573
+	.4byte	0x65c3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9058
+	.4byte	__func__.9061
 	.uleb128 0x44
-	.4byte	.LVL1437
-	.4byte	0x6623
+	.4byte	.LVL1444
+	.4byte	0x6609
 	.uleb128 0x32
-	.4byte	.LVL1439
-	.4byte	0x26b9
-	.4byte	0x6527
+	.4byte	.LVL1446
+	.4byte	0x26a8
+	.4byte	0x650d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36408,9 +36393,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1440
-	.4byte	0x26b9
-	.4byte	0x6545
+	.4byte	.LVL1447
+	.4byte	0x26a8
+	.4byte	0x652b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36429,9 +36414,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1442
-	.4byte	0x26b9
-	.4byte	0x6563
+	.4byte	.LVL1449
+	.4byte	0x26a8
+	.4byte	0x6549
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36450,9 +36435,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1443
-	.4byte	0x6078
-	.4byte	0x6576
+	.4byte	.LVL1450
+	.4byte	0x605e
+	.4byte	0x655c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36460,9 +36445,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1445
-	.4byte	0x928b
-	.4byte	0x659c
+	.4byte	.LVL1452
+	.4byte	0x92b5
+	.4byte	0x6582
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36474,7 +36459,7 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR165
+	.4byte	.LANCHOR164
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -36483,12 +36468,12 @@ __func__.9940:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1446
-	.4byte	0x7ae5
+	.4byte	.LVL1453
+	.4byte	0x7a56
 	.uleb128 0x32
-	.4byte	.LVL1454
-	.4byte	0x26b9
-	.4byte	0x65c3
+	.4byte	.LVL1461
+	.4byte	0x26a8
+	.4byte	0x65a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36507,20 +36492,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1459
-	.4byte	0x22a6
+	.4byte	.LVL1466
+	.4byte	0x2295
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x65dd
+	.4byte	0x65c3
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x65cd
+	.4byte	0x65b3
 	.uleb128 0x2b
-	.4byte	.LASF815
+	.4byte	.LASF813
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdba
@@ -36528,7 +36513,7 @@ __func__.9940:
 	.4byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6623
+	.4byte	0x6609
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
@@ -36536,27 +36521,27 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST22
 	.uleb128 0x30
-	.4byte	.LASF816
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdba
 	.4byte	.LLST23
 	.uleb128 0x44
 	.4byte	.LVL59
-	.4byte	0x682c
+	.4byte	0x6812
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF817
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x94
 	.4byte	.LFB230
 	.4byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6657
+	.4byte	0x663d
 	.uleb128 0x2d
-	.4byte	.LVL769
-	.4byte	0x230c
+	.4byte	.LVL777
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36577,7 +36562,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF818
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x50
@@ -36585,7 +36570,7 @@ __func__.9940:
 	.4byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x67a0
+	.4byte	0x6786
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
@@ -36593,34 +36578,34 @@ __func__.9940:
 	.4byte	0x50
 	.4byte	.LLST290
 	.uleb128 0x30
-	.4byte	.LASF819
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x50
 	.4byte	.LLST291
 	.uleb128 0x30
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x6427
+	.4byte	0x640d
 	.4byte	.LLST292
 	.uleb128 0x30
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdba
 	.4byte	.LLST293
 	.uleb128 0x57
-	.4byte	.LASF820
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x6b
-	.4byte	.LASF574
-	.4byte	0x26b4
+	.uleb128 0x6a
+	.4byte	.LASF573
+	.4byte	0x26a3
 	.uleb128 0x32
-	.4byte	.LVL1164
-	.4byte	0x230c
-	.4byte	0x66ce
+	.4byte	.LVL1172
+	.4byte	0x22fb
+	.4byte	0x66b4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36629,9 +36614,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1167
-	.4byte	0x230c
-	.4byte	0x66ed
+	.4byte	.LVL1175
+	.4byte	0x22fb
+	.4byte	0x66d3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36651,20 +36636,20 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1169
-	.4byte	0x928b
-	.4byte	0x6704
+	.4byte	.LVL1177
+	.4byte	0x92b5
+	.4byte	0x66ea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC94
+	.4byte	.LC97
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1170
-	.4byte	0x251a
-	.4byte	0x6727
+	.4byte	.LVL1178
+	.4byte	0x2509
+	.4byte	0x670d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36688,9 +36673,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1171
-	.4byte	0x2464
-	.4byte	0x673f
+	.4byte	.LVL1179
+	.4byte	0x2453
+	.4byte	0x6725
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36703,9 +36688,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1172
-	.4byte	0x251a
-	.4byte	0x6762
+	.4byte	.LVL1180
+	.4byte	0x2509
+	.4byte	0x6748
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36729,26 +36714,26 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1174
-	.4byte	0x928b
-	.4byte	0x6779
+	.4byte	.LVL1182
+	.4byte	0x92b5
+	.4byte	0x675f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC95
+	.4byte	.LC98
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1175
-	.4byte	0x928b
-	.4byte	0x6796
+	.4byte	.LVL1183
+	.4byte	0x92b5
+	.4byte	0x677c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC96
+	.4byte	.LC99
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -36757,26 +36742,26 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1178
-	.4byte	0x22a6
+	.4byte	.LVL1186
+	.4byte	0x2295
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF821
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x41
 	.4byte	.LFB228
 	.4byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6824
+	.4byte	0x680a
 	.uleb128 0x2c
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10e9
 	.4byte	.LLST196
 	.uleb128 0x2c
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x41
 	.4byte	0xff2
@@ -36787,15 +36772,15 @@ __func__.9940:
 	.byte	0x43
 	.4byte	0xdc5
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x3bfa
+	.4byte	.LASF573
+	.4byte	0x3be7
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.9015
+	.4byte	__func__.9018
 	.uleb128 0x32
-	.4byte	.LVL766
-	.4byte	0x230c
-	.4byte	0x6804
+	.4byte	.LVL774
+	.4byte	0x22fb
+	.4byte	0x67ea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36809,8 +36794,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL767
-	.4byte	0x928b
+	.4byte	.LVL775
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36831,13 +36816,13 @@ __func__.9940:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF823
+	.uleb128 0x6b
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x39
-	.4byte	.LASF824
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x50
@@ -36845,7 +36830,7 @@ __func__.9940:
 	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x688f
+	.4byte	0x6875
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36865,20 +36850,20 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST19
 	.uleb128 0x30
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0xff2
 	.4byte	.LLST20
 	.uleb128 0x30
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x1c
 	.4byte	0xdba
 	.4byte	.LLST21
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF825
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x50
@@ -36886,7 +36871,7 @@ __func__.9940:
 	.4byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6904
+	.4byte	0x68ea
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36900,20 +36885,20 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST14
 	.uleb128 0x30
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x7
 	.4byte	0xff2
 	.4byte	.LLST15
 	.uleb128 0x30
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x8
 	.4byte	0xdba
 	.4byte	.LLST16
 	.uleb128 0x34
 	.4byte	.LVL45
-	.4byte	0x928b
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36934,46 +36919,46 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	.LASF887
+	.uleb128 0x6c
+	.4byte	.LASF885
 	.byte	0x3
-	.2byte	0x4bd
+	.2byte	0x499
 	.4byte	0xdc5
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x48
-	.4byte	.LASF826
+	.4byte	.LASF824
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0x50
 	.4byte	.LFB223
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6989
+	.4byte	0x696f
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb5
-	.4byte	.LLST445
+	.4byte	.LLST444
 	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb5
-	.4byte	.LLST446
+	.4byte	.LLST445
 	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x6989
-	.4byte	.LLST447
+	.2byte	0x494
+	.4byte	0x696f
+	.4byte	.LLST446
 	.uleb128 0x2d
-	.4byte	.LVL1965
-	.4byte	0x6b02
+	.4byte	.LVL1953
+	.4byte	0x6adf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37006,36 +36991,36 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x90
 	.uleb128 0x48
-	.4byte	.LASF827
+	.4byte	.LASF825
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0x50
 	.4byte	.LFB222
 	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x69fe
+	.4byte	0x69e4
 	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb5
-	.4byte	.LLST427
+	.4byte	.LLST426
 	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb5
-	.4byte	.LLST428
+	.4byte	.LLST427
 	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x6989
-	.4byte	.LLST429
+	.2byte	0x48f
+	.4byte	0x696f
+	.4byte	.LLST428
 	.uleb128 0x2d
-	.4byte	.LVL1870
-	.4byte	0x710a
+	.4byte	.LVL1872
+	.4byte	0x708d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37065,85 +37050,82 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF828
+	.4byte	.LASF826
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0x50
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6b02
+	.4byte	0x6adf
 	.uleb128 0x52
-	.4byte	.LASF732
+	.4byte	.LASF731
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdc5
-	.4byte	.LLST385
+	.4byte	.LLST372
 	.uleb128 0x52
-	.4byte	.LASF733
+	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdc5
-	.4byte	.LLST386
+	.4byte	.LLST373
 	.uleb128 0x54
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x462
 	.4byte	0xdba
-	.4byte	.LLST387
+	.4byte	.LLST374
 	.uleb128 0x53
 	.ascii	"tmp\000"
 	.byte	0x3
-	.2byte	0x487
+	.2byte	0x463
 	.4byte	0xdba
-	.4byte	.LLST388
+	.4byte	.LLST375
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x488
+	.2byte	0x464
 	.4byte	0xdc5
-	.4byte	.LLST389
+	.4byte	.LLST376
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x28
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
 	.uleb128 0x54
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x3
-	.2byte	0x48a
+	.2byte	0x466
 	.4byte	0xdba
-	.4byte	.LLST390
-	.uleb128 0x44
-	.4byte	.LVL1635
-	.4byte	0x6ee0
+	.4byte	.LLST377
 	.uleb128 0x44
-	.4byte	.LVL1645
-	.4byte	0x537a
+	.4byte	.LVL1601
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL1646
-	.4byte	0x4d75
+	.4byte	.LVL1602
+	.4byte	0x4d67
 	.uleb128 0x32
-	.4byte	.LVL1647
-	.4byte	0x5279
-	.4byte	0x6ad0
+	.4byte	.LVL1603
+	.4byte	0x526b
+	.4byte	0x6aad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37158,14 +37140,14 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1648
-	.4byte	0x5279
-	.4byte	0x6aef
+	.4byte	.LVL1604
+	.4byte	0x526b
+	.4byte	0x6acc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x77
+	.byte	0x76
 	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37180,74 +37162,74 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1649
-	.4byte	0x6189
+	.4byte	.LVL1605
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL1650
-	.4byte	0x3259
+	.4byte	.LVL1606
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0x5c
-	.4byte	.LASF829
+	.4byte	.LASF827
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0x50
 	.4byte	.LFB220
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ee0
+	.4byte	0x6e85
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdaf
+	.4byte	.LLST429
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3bd
+	.4byte	0xdc5
 	.4byte	.LLST430
 	.uleb128 0x52
 	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdc5
 	.4byte	.LLST431
 	.uleb128 0x52
 	.4byte	.LASF733
 	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdc5
+	.2byte	0x3bd
+	.4byte	0x5142
 	.4byte	.LLST432
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x5150
-	.4byte	.LLST433
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x2aca
-	.4byte	.LLST434
+	.2byte	0x3bf
+	.4byte	0x2ab9
+	.4byte	.LLST433
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdc5
-	.4byte	.LLST435
+	.4byte	.LLST434
 	.uleb128 0x54
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdc5
-	.4byte	.LLST436
+	.4byte	.LLST435
 	.uleb128 0x54
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdc5
-	.4byte	.LLST437
+	.4byte	.LLST436
 	.uleb128 0x28
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
@@ -37255,66 +37237,66 @@ __func__.9940:
 	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdc5
-	.4byte	.LLST438
+	.4byte	.LLST437
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
+	.4byte	0xdc5
+	.4byte	.LLST438
+	.uleb128 0x54
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c2
 	.4byte	0xdc5
 	.4byte	.LLST439
 	.uleb128 0x54
-	.4byte	.LASF832
+	.4byte	.LASF595
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
 	.4byte	0xdc5
 	.4byte	.LLST440
 	.uleb128 0x54
-	.4byte	.LASF596
+	.4byte	.LASF831
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c3
 	.4byte	0xdc5
 	.4byte	.LLST441
 	.uleb128 0x54
-	.4byte	.LASF833
+	.4byte	.LASF832
 	.byte	0x3
-	.2byte	0x3c7
+	.2byte	0x3c3
 	.4byte	0xdc5
 	.4byte	.LLST442
 	.uleb128 0x54
-	.4byte	.LASF834
+	.4byte	.LASF639
 	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0xdc5
+	.2byte	0x3c4
+	.4byte	0x1d68
 	.4byte	.LLST443
-	.uleb128 0x54
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x3c8
-	.4byte	0x1d79
-	.4byte	.LLST444
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x5375
+	.4byte	.LASF573
+	.4byte	0x5367
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.8951
+	.4byte	__func__.8954
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x190
-	.4byte	0x6c9f
+	.4byte	.Ldebug_ranges0+0x1d8
+	.4byte	0x6c7c
 	.uleb128 0x28
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x3
-	.2byte	0x43d
+	.2byte	0x425
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL1952
-	.4byte	0x26b9
-	.4byte	0x6c5e
+	.4byte	.LVL1933
+	.4byte	0x26a8
+	.4byte	0x6c3b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37333,15 +37315,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1954
-	.4byte	0x928b
-	.4byte	0x6c7b
+	.4byte	.LVL1935
+	.4byte	0x92b5
+	.4byte	0x6c58
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC105
+	.4byte	.LC108
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -37350,8 +37332,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1955
-	.4byte	0x928b
+	.4byte	.LVL1936
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37363,133 +37345,66 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x44a
+	.2byte	0x432
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1875
-	.4byte	0x5156
-	.4byte	0x6cc3
+	.4byte	.LVL1878
+	.4byte	0x5148
+	.4byte	0x6ca5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x3
-	.byte	0x78
-	.sleb128 256
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -100
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x100
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -80
+	.sleb128 -84
 	.byte	0x6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -88
 	.byte	0x6
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1887
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1890
-	.4byte	0x29fd
-	.4byte	0x6ced
+	.4byte	.LVL1893
+	.4byte	0x29ec
+	.4byte	0x6cc3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -96
 	.byte	0x6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x7
+	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -76
-	.byte	0x6
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1892
-	.4byte	0x5b34
-	.4byte	0x6d00
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1893
-	.4byte	0x2c26
-	.uleb128 0x32
-	.4byte	.LVL1894
-	.4byte	0x29fd
-	.4byte	0x6d21
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1895
-	.4byte	0x29fd
-	.4byte	0x6d39
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1903
-	.4byte	0x22a6
-	.4byte	0x6d54
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x3
-	.byte	0x7d
-	.sleb128 0
+	.sleb128 -72
 	.byte	0x6
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1911
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1914
-	.4byte	0x928b
-	.4byte	0x6d84
+	.4byte	.LVL1897
+	.4byte	0x92b5
+	.4byte	0x6cea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37501,21 +37416,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x3f4
+	.2byte	0x3dc
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1915
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1917
-	.4byte	0x3430
-	.4byte	0x6da4
+	.4byte	.LVL1899
+	.4byte	0x340d
+	.4byte	0x6d01
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37524,9 +37436,9 @@ __func__.9940:
 	.4byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1918
-	.4byte	0x3430
-	.4byte	0x6dbb
+	.4byte	.LVL1900
+	.4byte	0x340d
+	.4byte	0x6d18
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37535,20 +37447,20 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1920
-	.4byte	0x3430
-	.4byte	0x6dcf
+	.4byte	.LVL1902
+	.4byte	0x340d
+	.4byte	0x6d2c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1923
-	.4byte	0x928b
-	.4byte	0x6df6
+	.4byte	.LVL1905
+	.4byte	0x92b5
+	.4byte	0x6d53
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37560,25 +37472,24 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x415
+	.2byte	0x3fd
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1926
-	.4byte	0x6f0f
-	.4byte	0x6e17
+	.4byte	.LVL1908
+	.4byte	0x6e92
+	.4byte	0x6d72
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -37588,13 +37499,13 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0x53
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1927
-	.4byte	0x928b
-	.4byte	0x6e3e
+	.4byte	.LVL1909
+	.4byte	0x92b5
+	.4byte	0x6d99
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37606,29 +37517,29 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x46e
+	.2byte	0x44a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1930
-	.4byte	0x3430
-	.4byte	0x6e52
+	.4byte	.LVL1912
+	.4byte	0x340d
+	.4byte	0x6dad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1933
-	.4byte	0x5279
-	.4byte	0x6e71
+	.4byte	.LVL1915
+	.4byte	0x526b
+	.4byte	0x6dcc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37648,27 +37559,26 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1934
-	.4byte	0x333e
-	.4byte	0x6e85
+	.4byte	.LVL1916
+	.4byte	0x331b
+	.4byte	0x6de0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x74
+	.byte	0x75
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1939
-	.4byte	0x230c
-	.4byte	0x6ea0
+	.4byte	.LVL1920
+	.4byte	0x22fb
+	.4byte	0x6df9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -88
-	.byte	0x6
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37676,9 +37586,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1948
-	.4byte	0x928b
-	.4byte	0x6ec7
+	.4byte	.LVL1929
+	.4byte	0x92b5
+	.4byte	0x6e20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37690,91 +37600,115 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR180
+	.4byte	.LANCHOR178
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x45f
+	.2byte	0x441
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1953
-	.4byte	0x22a6
-	.uleb128 0x34
-	.4byte	.LVL1957
-	.4byte	0x230c
+	.4byte	.LVL1934
+	.4byte	0x2295
+	.uleb128 0x32
+	.4byte	.LVL1938
+	.4byte	0x22fb
+	.4byte	0x6e3c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1943
+	.4byte	0x5b26
+	.4byte	0x6e4f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
-	.uleb128 0x48
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x50
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
+	.uleb128 0x44
+	.4byte	.LVL1944
+	.4byte	0x2c15
+	.uleb128 0x32
+	.4byte	.LVL1945
+	.4byte	0x29ec
+	.4byte	0x6e70
+	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6f0f
-	.uleb128 0x34
-	.4byte	.LVL1626
-	.4byte	0x6f0f
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1946
+	.4byte	0x29ec
 	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x1
 	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
 	.byte	0
+	.uleb128 0x51
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x50
+	.byte	0x1
 	.uleb128 0x5f
-	.4byte	.LASF836
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x387
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70f5
+	.4byte	0x7078
 	.uleb128 0x5d
 	.ascii	"req\000"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x19f9
-	.4byte	.LLST377
+	.4byte	.LLST382
 	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST378
+	.4byte	.LLST383
 	.uleb128 0x52
-	.4byte	.LASF837
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST379
+	.4byte	.LLST384
 	.uleb128 0x52
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x1d79
-	.4byte	.LLST380
+	.4byte	0x1d68
+	.4byte	.LLST385
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x389
 	.4byte	0xdc5
-	.4byte	.LLST381
+	.4byte	.LLST386
 	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
@@ -37784,39 +37718,39 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x54
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdc5
-	.4byte	.LLST382
+	.4byte	.LLST387
 	.uleb128 0x54
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdba
-	.4byte	.LLST383
+	.4byte	.LLST388
 	.uleb128 0x54
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2aca
-	.4byte	.LLST384
+	.4byte	0x2ab9
+	.4byte	.LLST389
 	.uleb128 0x62
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x7105
+	.4byte	.LASF573
+	.4byte	0x7088
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.8923
+	.4byte	__func__.8926
 	.uleb128 0x32
-	.4byte	.LVL1607
-	.4byte	0x251a
-	.4byte	0x6fee
+	.4byte	.LVL1641
+	.4byte	0x2509
+	.4byte	0x6f71
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37837,12 +37771,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1608
-	.4byte	0x6189
+	.4byte	.LVL1642
+	.4byte	0x616f
 	.uleb128 0x32
-	.4byte	.LVL1610
-	.4byte	0x3430
-	.4byte	0x700b
+	.4byte	.LVL1644
+	.4byte	0x340d
+	.4byte	0x6f8e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37851,12 +37785,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1611
-	.4byte	0x2b9c
+	.4byte	.LVL1645
+	.4byte	0x2b8b
 	.uleb128 0x32
-	.4byte	.LVL1612
-	.4byte	0x333e
-	.4byte	0x7028
+	.4byte	.LVL1646
+	.4byte	0x331b
+	.4byte	0x6fab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37865,9 +37799,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1613
-	.4byte	0x251a
-	.4byte	0x7046
+	.4byte	.LVL1647
+	.4byte	0x2509
+	.4byte	0x6fc9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37886,9 +37820,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1614
-	.4byte	0x928b
-	.4byte	0x706d
+	.4byte	.LVL1648
+	.4byte	0x92b5
+	.4byte	0x6ff0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37909,9 +37843,9 @@ __func__.9940:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1615
-	.4byte	0x5279
-	.4byte	0x7086
+	.4byte	.LVL1649
+	.4byte	0x526b
+	.4byte	0x7009
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37925,9 +37859,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1617
-	.4byte	0x6189
-	.4byte	0x70a0
+	.4byte	.LVL1651
+	.4byte	0x616f
+	.4byte	0x7023
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37942,15 +37876,15 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1620
-	.4byte	0x928b
-	.4byte	0x70bd
+	.4byte	.LVL1654
+	.4byte	0x92b5
+	.4byte	0x7040
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC103
+	.4byte	.LC106
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37959,9 +37893,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1621
-	.4byte	0x3259
-	.4byte	0x70d1
+	.4byte	.LVL1655
+	.4byte	0x3236
+	.4byte	0x7054
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37970,8 +37904,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1624
-	.4byte	0x928b
+	.4byte	.LVL1658
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37994,15 +37928,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x7105
+	.4byte	0x7088
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x70f5
+	.4byte	0x7078
 	.uleb128 0x5c
-	.4byte	.LASF838
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x50
@@ -38010,12 +37944,18 @@ __func__.9940:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72fd
+	.4byte	0x7277
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdaf
+	.4byte	.LLST409
+	.uleb128 0x52
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdc5
 	.4byte	.LLST410
 	.uleb128 0x52
 	.4byte	.LASF732
@@ -38027,44 +37967,38 @@ __func__.9940:
 	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0xdc5
+	.4byte	0x5142
 	.4byte	.LLST412
-	.uleb128 0x52
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5150
-	.4byte	.LLST413
 	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x50
-	.4byte	.LLST414
+	.4byte	.LLST413
 	.uleb128 0x54
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST415
+	.4byte	.LLST414
 	.uleb128 0x54
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST416
+	.4byte	.LLST415
 	.uleb128 0x54
-	.4byte	.LASF839
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST417
+	.4byte	.LLST416
 	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdc5
-	.4byte	.LLST418
+	.4byte	.LLST417
 	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
@@ -38078,64 +38012,64 @@ __func__.9940:
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST419
+	.4byte	.LLST418
 	.uleb128 0x54
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST420
+	.4byte	.LLST419
 	.uleb128 0x54
-	.4byte	.LASF832
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST421
+	.4byte	.LLST420
 	.uleb128 0x54
-	.4byte	.LASF840
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST422
+	.4byte	.LLST421
 	.uleb128 0x54
-	.4byte	.LASF841
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST423
+	.4byte	.LLST422
 	.uleb128 0x54
-	.4byte	.LASF842
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdc5
-	.4byte	.LLST424
+	.4byte	.LLST423
 	.uleb128 0x54
-	.4byte	.LASF843
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST425
+	.4byte	.LLST424
 	.uleb128 0x61
-	.4byte	.LBB299
-	.4byte	.LBE299-.LBB299
-	.4byte	0x7261
+	.4byte	.LBB332
+	.4byte	.LBE332-.LBB332
+	.4byte	0x71e4
 	.uleb128 0x54
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdba
-	.4byte	.LLST426
+	.4byte	.LLST425
 	.uleb128 0x44
-	.4byte	.LVL1862
-	.4byte	0x6189
+	.4byte	.LVL1864
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL1863
-	.4byte	0x2c26
+	.4byte	.LVL1865
+	.4byte	0x2c15
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1819
-	.4byte	0x503e
-	.4byte	0x7283
+	.4byte	.LVL1821
+	.4byte	0x5030
+	.4byte	0x7206
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38156,13 +38090,10 @@ __func__.9940:
 	.byte	0x78
 	.sleb128 0
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1825
-	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1834
-	.4byte	0x29fd
-	.4byte	0x72a4
+	.4byte	.LVL1836
+	.4byte	0x29ec
+	.4byte	0x721e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38175,9 +38106,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1836
-	.4byte	0x5279
-	.4byte	0x72c3
+	.4byte	.LVL1838
+	.4byte	0x526b
+	.4byte	0x723d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38197,9 +38128,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1842
-	.4byte	0x26b9
-	.4byte	0x72dd
+	.4byte	.LVL1844
+	.4byte	0x26a8
+	.4byte	0x7257
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38214,11 +38145,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1844
-	.4byte	0x22a6
+	.4byte	.LVL1846
+	.4byte	0x2295
 	.uleb128 0x34
-	.4byte	.LVL1851
-	.4byte	0x230c
+	.4byte	.LVL1853
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38233,7 +38164,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF844
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x50
@@ -38241,13 +38172,13 @@ __func__.9940:
 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7321
+	.4byte	0x729b
 	.uleb128 0x44
-	.4byte	.LVL1631
-	.4byte	0x7321
+	.4byte	.LVL1587
+	.4byte	0x729b
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF845
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x50
@@ -38255,17 +38186,14 @@ __func__.9940:
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x736a
-	.uleb128 0x44
-	.4byte	.LVL1627
-	.4byte	0x6ee0
+	.4byte	0x72db
 	.uleb128 0x44
-	.4byte	.LVL1628
-	.4byte	0x537a
+	.4byte	.LVL1584
+	.4byte	0x536c
 	.uleb128 0x32
-	.4byte	.LVL1629
-	.4byte	0x4fe6
-	.4byte	0x7360
+	.4byte	.LVL1585
+	.4byte	0x4fd8
+	.4byte	0x72d1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38273,11 +38201,11 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1630
-	.4byte	0x4d75
+	.4byte	.LVL1586
+	.4byte	0x4d67
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF846
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x50
@@ -38285,34 +38213,34 @@ __func__.9940:
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7438
+	.4byte	0x73a9
 	.uleb128 0x28
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x7438
+	.4byte	0x73a9
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_nand_phy_info
 	.byte	0x9f
 	.uleb128 0x58
-	.4byte	.LASF848
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2f3
 	.4byte	.LDL2
 	.uleb128 0x61
-	.4byte	.LBB309
-	.4byte	.LBE309-.LBB309
-	.4byte	0x73d3
+	.4byte	.LBB342
+	.4byte	.LBE342-.LBB342
+	.4byte	0x7344
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdc5
-	.4byte	.LLST454
+	.4byte	.LLST453
 	.uleb128 0x34
-	.4byte	.LVL2068
-	.4byte	0x29fd
+	.4byte	.LVL2057
+	.4byte	0x29ec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38326,9 +38254,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2060
-	.4byte	0x928b
-	.4byte	0x73f3
+	.4byte	.LVL2049
+	.4byte	0x92b5
+	.4byte	0x7364
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38343,9 +38271,9 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2061
-	.4byte	0x7a89
-	.4byte	0x740a
+	.4byte	.LVL2050
+	.4byte	0x79fa
+	.4byte	0x737b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38354,26 +38282,26 @@ __func__.9940:
 	.4byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2062
-	.4byte	0x782c
+	.4byte	.LVL2051
+	.4byte	0x779d
 	.uleb128 0x44
-	.4byte	.LVL2063
-	.4byte	0x777c
+	.4byte	.LVL2052
+	.4byte	0x76ed
 	.uleb128 0x44
-	.4byte	.LVL2064
-	.4byte	0x601f
+	.4byte	.LVL2053
+	.4byte	0x6005
 	.uleb128 0x44
-	.4byte	.LVL2065
-	.4byte	0x649e
+	.4byte	.LVL2054
+	.4byte	0x6484
 	.uleb128 0x44
-	.4byte	.LVL2066
-	.4byte	0x399e
+	.4byte	.LVL2055
+	.4byte	0x398b
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xed2
 	.uleb128 0x5c
-	.4byte	.LASF849
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x50
@@ -38381,57 +38309,57 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7594
+	.4byte	0x7505
 	.uleb128 0x54
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST450
+	.4byte	.LLST449
 	.uleb128 0x54
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST451
+	.4byte	.LLST450
 	.uleb128 0x54
-	.4byte	.LASF851
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdba
-	.4byte	.LLST452
+	.4byte	.LLST451
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdba
-	.4byte	.LLST453
+	.4byte	.LLST452
 	.uleb128 0x58
-	.4byte	.LASF852
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1798
+	.4byte	.L1785
 	.uleb128 0x58
-	.4byte	.LASF853
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1800
+	.4byte	.L1787
 	.uleb128 0x44
-	.4byte	.LVL2014
-	.4byte	0x601f
+	.4byte	.LVL2003
+	.4byte	0x6005
 	.uleb128 0x44
-	.4byte	.LVL2015
-	.4byte	0x649e
+	.4byte	.LVL2004
+	.4byte	0x6484
 	.uleb128 0x44
-	.4byte	.LVL2016
-	.4byte	0x6240
+	.4byte	.LVL2005
+	.4byte	0x6226
 	.uleb128 0x44
-	.4byte	.LVL2030
-	.4byte	0x6657
+	.4byte	.LVL2019
+	.4byte	0x663d
 	.uleb128 0x32
-	.4byte	.LVL2031
-	.4byte	0x230c
-	.4byte	0x74e5
+	.4byte	.LVL2020
+	.4byte	0x22fb
+	.4byte	0x7456
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38439,9 +38367,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2032
-	.4byte	0x230c
-	.4byte	0x74f9
+	.4byte	.LVL2021
+	.4byte	0x22fb
+	.4byte	0x746a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38450,9 +38378,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2033
-	.4byte	0x3f2e
-	.4byte	0x750d
+	.4byte	.LVL2022
+	.4byte	0x3f1b
+	.4byte	0x747e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38461,9 +38389,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2037
-	.4byte	0x7594
-	.4byte	0x7526
+	.4byte	.LVL2026
+	.4byte	0x7505
+	.4byte	0x7497
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38477,15 +38405,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2044
-	.4byte	0x7ae5
+	.4byte	.LVL2033
+	.4byte	0x7a56
 	.uleb128 0x44
-	.4byte	.LVL2045
-	.4byte	0x601f
+	.4byte	.LVL2034
+	.4byte	0x6005
 	.uleb128 0x32
-	.4byte	.LVL2048
-	.4byte	0x7594
-	.4byte	0x7551
+	.4byte	.LVL2037
+	.4byte	0x7505
+	.4byte	0x74c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38499,9 +38427,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2051
-	.4byte	0x7594
-	.4byte	0x7564
+	.4byte	.LVL2040
+	.4byte	0x7505
+	.4byte	0x74d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38509,9 +38437,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2055
-	.4byte	0x3f2e
-	.4byte	0x7578
+	.4byte	.LVL2044
+	.4byte	0x3f1b
+	.4byte	0x74e9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38520,17 +38448,17 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2056
-	.4byte	0x5e26
+	.4byte	.LVL2045
+	.4byte	0x5e28
 	.uleb128 0x44
-	.4byte	.LVL2057
-	.4byte	0x4d75
+	.4byte	.LVL2046
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL2058
-	.4byte	0x399e
+	.4byte	.LVL2047
+	.4byte	0x398b
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF854
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x50
@@ -38538,76 +38466,76 @@ __func__.9940:
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7752
+	.4byte	0x76c3
 	.uleb128 0x52
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdba
-	.4byte	.LLST181
+	.4byte	.LLST175
 	.uleb128 0x52
-	.4byte	.LASF855
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdaf
-	.4byte	.LLST182
+	.4byte	.LLST176
 	.uleb128 0x54
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST183
+	.4byte	.LLST177
 	.uleb128 0x54
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST184
+	.4byte	.LLST178
 	.uleb128 0x54
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST185
+	.4byte	.LLST179
 	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST186
+	.4byte	.LLST180
 	.uleb128 0x54
-	.4byte	.LASF856
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdba
-	.4byte	.LLST187
+	.4byte	.LLST181
 	.uleb128 0x54
-	.4byte	.LASF857
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdba
-	.4byte	.LLST188
+	.4byte	.LLST182
 	.uleb128 0x54
-	.4byte	.LASF858
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdba
-	.4byte	.LLST189
+	.4byte	.LLST183
 	.uleb128 0x54
-	.4byte	.LASF859
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdba
-	.4byte	.LLST190
+	.4byte	.LLST184
 	.uleb128 0x58
-	.4byte	.LASF860
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x240
-	.4byte	.L509
+	.4byte	.L496
 	.uleb128 0x32
-	.4byte	.LVL645
-	.4byte	0x2464
-	.4byte	0x7674
+	.4byte	.LVL635
+	.4byte	0x2453
+	.4byte	0x75e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38622,9 +38550,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL653
-	.4byte	0x251a
-	.4byte	0x769a
+	.4byte	.LVL643
+	.4byte	0x2509
+	.4byte	0x760b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38651,9 +38579,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL660
-	.4byte	0x2464
-	.4byte	0x76b4
+	.4byte	.LVL650
+	.4byte	0x2453
+	.4byte	0x7625
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38668,9 +38596,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL662
-	.4byte	0x61f9
-	.4byte	0x76ca
+	.4byte	.LVL652
+	.4byte	0x61df
+	.4byte	0x763b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38681,9 +38609,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL664
-	.4byte	0x7752
-	.4byte	0x76de
+	.4byte	.LVL654
+	.4byte	0x76c3
+	.4byte	0x764f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38692,9 +38620,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL665
-	.4byte	0x682c
-	.4byte	0x76f2
+	.4byte	.LVL655
+	.4byte	0x6812
+	.4byte	0x7663
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38703,12 +38631,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL676
-	.4byte	0x688f
+	.4byte	.LVL666
+	.4byte	0x6875
 	.uleb128 0x32
-	.4byte	.LVL680
-	.4byte	0x61f9
-	.4byte	0x7711
+	.4byte	.LVL670
+	.4byte	0x61df
+	.4byte	0x7682
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38719,9 +38647,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL682
-	.4byte	0x7752
-	.4byte	0x7725
+	.4byte	.LVL672
+	.4byte	0x76c3
+	.4byte	0x7696
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38730,9 +38658,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL683
-	.4byte	0x682c
-	.4byte	0x7739
+	.4byte	.LVL673
+	.4byte	0x6812
+	.4byte	0x76aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38741,11 +38669,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL691
-	.4byte	0x688f
+	.4byte	.LVL681
+	.4byte	0x6875
 	.uleb128 0x34
-	.4byte	.LVL695
-	.4byte	0x5f68
+	.4byte	.LVL685
+	.4byte	0x5fb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38754,37 +38682,37 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF861
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x777c
+	.4byte	0x76ed
 	.uleb128 0x4a
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdba
 	.uleb128 0x4b
-	.4byte	.LASF862
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF863
+	.4byte	.LASF861
 	.byte	0x3
-	.2byte	0x1ec
+	.2byte	0x1ed
 	.4byte	0x50
 	.4byte	.LFB210
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x782c
+	.4byte	0x779d
 	.uleb128 0x32
-	.4byte	.LVL1041
-	.4byte	0x230c
-	.4byte	0x77aa
+	.4byte	.LVL1049
+	.4byte	0x22fb
+	.4byte	0x771b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38793,9 +38721,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1042
-	.4byte	0x230c
-	.4byte	0x77be
+	.4byte	.LVL1050
+	.4byte	0x22fb
+	.4byte	0x772f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38804,9 +38732,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1043
-	.4byte	0x230c
-	.4byte	0x77d2
+	.4byte	.LVL1051
+	.4byte	0x22fb
+	.4byte	0x7743
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38815,15 +38743,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1044
-	.4byte	0x230c
-	.4byte	0x77f5
+	.4byte	.LVL1052
+	.4byte	0x22fb
+	.4byte	0x7766
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR79
+	.4byte	.LANCHOR39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38838,15 +38766,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1045
-	.4byte	0x230c
-	.4byte	0x7819
+	.4byte	.LVL1053
+	.4byte	0x22fb
+	.4byte	0x778a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR83
+	.4byte	.LANCHOR81
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38861,50 +38789,50 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1046
-	.4byte	0x3236
+	.4byte	.LVL1054
+	.4byte	0x3213
 	.uleb128 0x44
-	.4byte	.LVL1047
-	.4byte	0x4780
+	.4byte	.LVL1055
+	.4byte	0x476d
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF864
+	.4byte	.LASF862
 	.byte	0x3
-	.2byte	0x116
+	.2byte	0x117
 	.4byte	0x50
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a89
+	.4byte	0x79fa
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
-	.2byte	0x118
+	.2byte	0x119
 	.4byte	0xdc5
 	.4byte	.LLST194
 	.uleb128 0x54
-	.4byte	.LASF865
+	.4byte	.LASF863
 	.byte	0x3
-	.2byte	0x119
+	.2byte	0x11a
 	.4byte	0xdc5
 	.4byte	.LLST195
 	.uleb128 0x3d
-	.4byte	.LASF574
-	.4byte	0x65dd
+	.4byte	.LASF573
+	.4byte	0x65c3
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.8799
+	.4byte	__func__.8802
 	.uleb128 0x44
-	.4byte	.LVL699
-	.4byte	0x2928
+	.4byte	.LVL707
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL700
-	.4byte	0x2928
+	.4byte	.LVL708
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL702
-	.4byte	0x2928
-	.4byte	0x7899
+	.4byte	.LVL710
+	.4byte	0x2917
+	.4byte	0x780a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38913,9 +38841,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL703
-	.4byte	0x2928
-	.4byte	0x78ad
+	.4byte	.LVL711
+	.4byte	0x2917
+	.4byte	0x781e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38924,9 +38852,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL704
-	.4byte	0x2928
-	.4byte	0x78c1
+	.4byte	.LVL712
+	.4byte	0x2917
+	.4byte	0x7832
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38935,9 +38863,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL705
-	.4byte	0x2928
-	.4byte	0x78d5
+	.4byte	.LVL713
+	.4byte	0x2917
+	.4byte	0x7846
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38946,9 +38874,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL706
-	.4byte	0x2928
-	.4byte	0x78e9
+	.4byte	.LVL714
+	.4byte	0x2917
+	.4byte	0x785a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38957,9 +38885,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL708
-	.4byte	0x2928
-	.4byte	0x78fd
+	.4byte	.LVL716
+	.4byte	0x2917
+	.4byte	0x786e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38968,9 +38896,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL709
-	.4byte	0x2928
-	.4byte	0x7911
+	.4byte	.LVL717
+	.4byte	0x2917
+	.4byte	0x7882
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38979,9 +38907,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL710
-	.4byte	0x2928
-	.4byte	0x7925
+	.4byte	.LVL718
+	.4byte	0x2917
+	.4byte	0x7896
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38990,12 +38918,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL711
-	.4byte	0x2928
+	.4byte	.LVL719
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL712
-	.4byte	0x2928
-	.4byte	0x7942
+	.4byte	.LVL720
+	.4byte	0x2917
+	.4byte	0x78b3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39004,9 +38932,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL713
-	.4byte	0x2928
-	.4byte	0x7956
+	.4byte	.LVL721
+	.4byte	0x2917
+	.4byte	0x78c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39015,12 +38943,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL715
-	.4byte	0x2928
+	.4byte	.LVL723
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL717
-	.4byte	0x2928
-	.4byte	0x7973
+	.4byte	.LVL725
+	.4byte	0x2917
+	.4byte	0x78e4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39029,9 +38957,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL718
-	.4byte	0x2928
-	.4byte	0x7989
+	.4byte	.LVL726
+	.4byte	0x2917
+	.4byte	0x78fa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39042,18 +38970,18 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL719
-	.4byte	0x2928
+	.4byte	.LVL727
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL720
-	.4byte	0x2928
+	.4byte	.LVL728
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL721
-	.4byte	0x2928
+	.4byte	.LVL729
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL724
-	.4byte	0x2928
-	.4byte	0x79b8
+	.4byte	.LVL732
+	.4byte	0x2917
+	.4byte	0x7929
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39062,9 +38990,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL725
-	.4byte	0x2928
-	.4byte	0x79cc
+	.4byte	.LVL733
+	.4byte	0x2917
+	.4byte	0x793d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39073,9 +39001,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL729
-	.4byte	0x2928
-	.4byte	0x79e0
+	.4byte	.LVL737
+	.4byte	0x2917
+	.4byte	0x7951
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39084,9 +39012,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL730
-	.4byte	0x2928
-	.4byte	0x79f4
+	.4byte	.LVL738
+	.4byte	0x2917
+	.4byte	0x7965
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39095,24 +39023,24 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL732
-	.4byte	0x2928
+	.4byte	.LVL740
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL733
-	.4byte	0x2928
+	.4byte	.LVL741
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL734
-	.4byte	0x2928
+	.4byte	.LVL742
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL735
-	.4byte	0x2928
+	.4byte	.LVL743
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL736
-	.4byte	0x2928
+	.4byte	.LVL744
+	.4byte	0x2917
 	.uleb128 0x32
-	.4byte	.LVL737
-	.4byte	0x230c
-	.4byte	0x7a36
+	.4byte	.LVL745
+	.4byte	0x22fb
+	.4byte	0x79a7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39122,32 +39050,32 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL739
-	.4byte	0x2928
+	.4byte	.LVL747
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL742
-	.4byte	0x2928
+	.4byte	.LVL750
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL745
-	.4byte	0x2928
+	.4byte	.LVL753
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL748
-	.4byte	0x2928
+	.4byte	.LVL756
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL751
-	.4byte	0x2928
+	.4byte	.LVL759
+	.4byte	0x2917
 	.uleb128 0x44
-	.4byte	.LVL755
-	.4byte	0x2928
+	.4byte	.LVL763
+	.4byte	0x2917
 	.uleb128 0x34
-	.4byte	.LVL759
-	.4byte	0x928b
+	.4byte	.LVL767
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC82
+	.4byte	.LC85
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39157,34 +39085,34 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF866
+	.4byte	.LASF864
 	.byte	0x3
-	.byte	0xb6
+	.byte	0xb7
 	.4byte	0x50
 	.4byte	.LFB208
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7ae5
+	.4byte	0x7a56
 	.uleb128 0x2c
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
-	.byte	0xb6
-	.4byte	0x7438
+	.byte	0xb7
+	.4byte	0x73a9
 	.4byte	.LLST10
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x3
-	.byte	0xb8
+	.byte	0xb9
 	.4byte	0xdc5
 	.4byte	.LLST11
 	.uleb128 0x44
 	.4byte	.LVL30
-	.4byte	0x7b26
+	.4byte	0x7a97
 	.uleb128 0x32
 	.4byte	.LVL31
-	.4byte	0x7b26
-	.4byte	0x7adb
+	.4byte	0x7a97
+	.4byte	0x7a4c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39194,39 +39122,39 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL35
-	.4byte	0x7ae5
+	.4byte	0x7a56
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF867
+	.4byte	.LASF865
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0x50
 	.4byte	.LFB207
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b0e
+	.4byte	0x7a7f
 	.uleb128 0x2c
-	.4byte	.LASF868
+	.4byte	.LASF866
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0xdba
 	.4byte	.LLST9
 	.byte	0
 	.uleb128 0x66
-	.4byte	.LASF869
+	.4byte	.LASF867
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.byte	0x1
-	.4byte	0x7b26
+	.4byte	0x7a97
 	.uleb128 0x36
-	.4byte	.LASF870
+	.4byte	.LASF868
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF871
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdba
@@ -39234,7 +39162,7 @@ __func__.9940:
 	.4byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b6b
+	.4byte	0x7adc
 	.uleb128 0x2f
 	.ascii	"num\000"
 	.byte	0x3
@@ -39248,14 +39176,14 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST7
 	.uleb128 0x30
-	.4byte	.LASF872
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdc5
 	.4byte	.LLST8
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF873
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x50
@@ -39263,23 +39191,23 @@ __func__.9940:
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7bd9
+	.4byte	0x7b4a
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0x71
 	.4byte	0xf6
-	.4byte	.LLST111
+	.4byte	.LLST102
 	.uleb128 0x3b
 	.ascii	"buf\000"
 	.byte	0x3
 	.byte	0x73
 	.4byte	0xf6
-	.4byte	.LLST112
+	.4byte	.LLST103
 	.uleb128 0x32
-	.4byte	.LVL451
-	.4byte	0x92ad
-	.4byte	0x7bc8
+	.4byte	.LVL439
+	.4byte	0x92d7
+	.4byte	0x7b39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39300,8 +39228,8 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL453
-	.4byte	0x7bd9
+	.4byte	.LVL441
+	.4byte	0x7b4a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39311,7 +39239,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF874
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x50
@@ -39319,39 +39247,39 @@ __func__.9940:
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x842f
+	.4byte	0x83a0
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0xb
 	.4byte	0xf6
-	.4byte	.LLST106
+	.4byte	.LLST97
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x3
 	.byte	0xd
 	.4byte	0x50
-	.4byte	.LLST107
+	.4byte	.LLST98
 	.uleb128 0x3b
 	.ascii	"buf\000"
 	.byte	0x3
 	.byte	0xe
 	.4byte	0xf6
-	.4byte	.LLST108
+	.4byte	.LLST99
 	.uleb128 0x61
-	.4byte	.LBB211
-	.4byte	.LBE211-.LBB211
-	.4byte	0x7c6d
+	.4byte	.LBB225
+	.4byte	.LBE225-.LBB225
+	.4byte	0x7bde
 	.uleb128 0x30
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdba
-	.4byte	.LLST109
+	.4byte	.LLST100
 	.uleb128 0x32
-	.4byte	.LVL437
-	.4byte	0x5b34
-	.4byte	0x7c4d
+	.4byte	.LVL425
+	.4byte	0x5b26
+	.4byte	0x7bbe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39360,8 +39288,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL439
-	.4byte	0x92ad
+	.4byte	.LVL427
+	.4byte	0x92d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39383,18 +39311,18 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LBB212
-	.4byte	.LBE212-.LBB212
-	.4byte	0x7ca6
+	.4byte	.LBB226
+	.4byte	.LBE226-.LBB226
+	.4byte	0x7c17
 	.uleb128 0x30
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdba
-	.4byte	.LLST110
+	.4byte	.LLST101
 	.uleb128 0x34
-	.4byte	.LVL447
-	.4byte	0x92ad
+	.4byte	.LVL435
+	.4byte	0x92d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39416,9 +39344,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL302
-	.4byte	0x92ad
-	.4byte	0x7cc3
+	.4byte	.LVL290
+	.4byte	0x92d7
+	.4byte	0x7c34
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39433,9 +39361,9 @@ __func__.9940:
 	.4byte	.LC2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL304
-	.4byte	0x92ad
-	.4byte	0x7ce0
+	.4byte	.LVL292
+	.4byte	0x92d7
+	.4byte	0x7c51
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39450,9 +39378,9 @@ __func__.9940:
 	.4byte	.LC3
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL306
-	.4byte	0x92ad
-	.4byte	0x7cfd
+	.4byte	.LVL294
+	.4byte	0x92d7
+	.4byte	0x7c6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39467,9 +39395,9 @@ __func__.9940:
 	.4byte	.LC4
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL308
-	.4byte	0x92ad
-	.4byte	0x7d1a
+	.4byte	.LVL296
+	.4byte	0x92d7
+	.4byte	0x7c8b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39484,9 +39412,9 @@ __func__.9940:
 	.4byte	.LC5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL310
-	.4byte	0x92ad
-	.4byte	0x7d37
+	.4byte	.LVL298
+	.4byte	0x92d7
+	.4byte	0x7ca8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39501,9 +39429,9 @@ __func__.9940:
 	.4byte	.LC6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL312
-	.4byte	0x92ad
-	.4byte	0x7d54
+	.4byte	.LVL300
+	.4byte	0x92d7
+	.4byte	0x7cc5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39518,9 +39446,9 @@ __func__.9940:
 	.4byte	.LC7
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL314
-	.4byte	0x92ad
-	.4byte	0x7d71
+	.4byte	.LVL302
+	.4byte	0x92d7
+	.4byte	0x7ce2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39535,9 +39463,9 @@ __func__.9940:
 	.4byte	.LC8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL316
-	.4byte	0x92ad
-	.4byte	0x7d8e
+	.4byte	.LVL304
+	.4byte	0x92d7
+	.4byte	0x7cff
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39552,9 +39480,9 @@ __func__.9940:
 	.4byte	.LC9
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL318
-	.4byte	0x92ad
-	.4byte	0x7dab
+	.4byte	.LVL306
+	.4byte	0x92d7
+	.4byte	0x7d1c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39569,9 +39497,9 @@ __func__.9940:
 	.4byte	.LC10
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL320
-	.4byte	0x92ad
-	.4byte	0x7dc8
+	.4byte	.LVL308
+	.4byte	0x92d7
+	.4byte	0x7d39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39586,9 +39514,9 @@ __func__.9940:
 	.4byte	.LC11
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL322
-	.4byte	0x92ad
-	.4byte	0x7de5
+	.4byte	.LVL310
+	.4byte	0x92d7
+	.4byte	0x7d56
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39603,9 +39531,9 @@ __func__.9940:
 	.4byte	.LC12
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL324
-	.4byte	0x92ad
-	.4byte	0x7e02
+	.4byte	.LVL312
+	.4byte	0x92d7
+	.4byte	0x7d73
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39620,9 +39548,9 @@ __func__.9940:
 	.4byte	.LC13
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL326
-	.4byte	0x92ad
-	.4byte	0x7e1f
+	.4byte	.LVL314
+	.4byte	0x92d7
+	.4byte	0x7d90
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39637,9 +39565,9 @@ __func__.9940:
 	.4byte	.LC14
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL328
-	.4byte	0x92ad
-	.4byte	0x7e3c
+	.4byte	.LVL316
+	.4byte	0x92d7
+	.4byte	0x7dad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39654,9 +39582,9 @@ __func__.9940:
 	.4byte	.LC15
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL330
-	.4byte	0x92ad
-	.4byte	0x7e59
+	.4byte	.LVL318
+	.4byte	0x92d7
+	.4byte	0x7dca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39671,9 +39599,9 @@ __func__.9940:
 	.4byte	.LC16
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL332
-	.4byte	0x92ad
-	.4byte	0x7e76
+	.4byte	.LVL320
+	.4byte	0x92d7
+	.4byte	0x7de7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39688,9 +39616,9 @@ __func__.9940:
 	.4byte	.LC17
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL334
-	.4byte	0x92ad
-	.4byte	0x7e93
+	.4byte	.LVL322
+	.4byte	0x92d7
+	.4byte	0x7e04
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39705,9 +39633,9 @@ __func__.9940:
 	.4byte	.LC18
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL336
-	.4byte	0x92ad
-	.4byte	0x7eb0
+	.4byte	.LVL324
+	.4byte	0x92d7
+	.4byte	0x7e21
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39722,9 +39650,9 @@ __func__.9940:
 	.4byte	.LC19
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL338
-	.4byte	0x92ad
-	.4byte	0x7ecd
+	.4byte	.LVL326
+	.4byte	0x92d7
+	.4byte	0x7e3e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39739,9 +39667,9 @@ __func__.9940:
 	.4byte	.LC20
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL340
-	.4byte	0x92ad
-	.4byte	0x7eea
+	.4byte	.LVL328
+	.4byte	0x92d7
+	.4byte	0x7e5b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39756,9 +39684,9 @@ __func__.9940:
 	.4byte	.LC21
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL342
-	.4byte	0x92ad
-	.4byte	0x7f07
+	.4byte	.LVL330
+	.4byte	0x92d7
+	.4byte	0x7e78
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39773,9 +39701,9 @@ __func__.9940:
 	.4byte	.LC22
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL344
-	.4byte	0x92ad
-	.4byte	0x7f24
+	.4byte	.LVL332
+	.4byte	0x92d7
+	.4byte	0x7e95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39790,9 +39718,9 @@ __func__.9940:
 	.4byte	.LC23
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL346
-	.4byte	0x92ad
-	.4byte	0x7f41
+	.4byte	.LVL334
+	.4byte	0x92d7
+	.4byte	0x7eb2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39807,9 +39735,9 @@ __func__.9940:
 	.4byte	.LC24
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL348
-	.4byte	0x92ad
-	.4byte	0x7f5e
+	.4byte	.LVL336
+	.4byte	0x92d7
+	.4byte	0x7ecf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39824,9 +39752,9 @@ __func__.9940:
 	.4byte	.LC25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL350
-	.4byte	0x92ad
-	.4byte	0x7f7b
+	.4byte	.LVL338
+	.4byte	0x92d7
+	.4byte	0x7eec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39841,9 +39769,9 @@ __func__.9940:
 	.4byte	.LC26
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL352
-	.4byte	0x92ad
-	.4byte	0x7f98
+	.4byte	.LVL340
+	.4byte	0x92d7
+	.4byte	0x7f09
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39858,9 +39786,9 @@ __func__.9940:
 	.4byte	.LC27
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL354
-	.4byte	0x92ad
-	.4byte	0x7fb5
+	.4byte	.LVL342
+	.4byte	0x92d7
+	.4byte	0x7f26
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39875,9 +39803,9 @@ __func__.9940:
 	.4byte	.LC28
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL356
-	.4byte	0x92ad
-	.4byte	0x7fd2
+	.4byte	.LVL344
+	.4byte	0x92d7
+	.4byte	0x7f43
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39892,9 +39820,9 @@ __func__.9940:
 	.4byte	.LC29
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL358
-	.4byte	0x92ad
-	.4byte	0x7fef
+	.4byte	.LVL346
+	.4byte	0x92d7
+	.4byte	0x7f60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39909,9 +39837,9 @@ __func__.9940:
 	.4byte	.LC30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL360
-	.4byte	0x92ad
-	.4byte	0x800c
+	.4byte	.LVL348
+	.4byte	0x92d7
+	.4byte	0x7f7d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39926,9 +39854,9 @@ __func__.9940:
 	.4byte	.LC31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL362
-	.4byte	0x92ad
-	.4byte	0x8029
+	.4byte	.LVL350
+	.4byte	0x92d7
+	.4byte	0x7f9a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39943,9 +39871,9 @@ __func__.9940:
 	.4byte	.LC32
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL364
-	.4byte	0x92ad
-	.4byte	0x8046
+	.4byte	.LVL352
+	.4byte	0x92d7
+	.4byte	0x7fb7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39960,9 +39888,9 @@ __func__.9940:
 	.4byte	.LC33
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL366
-	.4byte	0x92ad
-	.4byte	0x8063
+	.4byte	.LVL354
+	.4byte	0x92d7
+	.4byte	0x7fd4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39977,9 +39905,9 @@ __func__.9940:
 	.4byte	.LC34
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL368
-	.4byte	0x92ad
-	.4byte	0x8080
+	.4byte	.LVL356
+	.4byte	0x92d7
+	.4byte	0x7ff1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39994,9 +39922,9 @@ __func__.9940:
 	.4byte	.LC35
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL370
-	.4byte	0x92ad
-	.4byte	0x809d
+	.4byte	.LVL358
+	.4byte	0x92d7
+	.4byte	0x800e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40011,9 +39939,9 @@ __func__.9940:
 	.4byte	.LC36
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL372
-	.4byte	0x92ad
-	.4byte	0x80ba
+	.4byte	.LVL360
+	.4byte	0x92d7
+	.4byte	0x802b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40028,9 +39956,9 @@ __func__.9940:
 	.4byte	.LC37
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL374
-	.4byte	0x92ad
-	.4byte	0x80d7
+	.4byte	.LVL362
+	.4byte	0x92d7
+	.4byte	0x8048
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40045,9 +39973,9 @@ __func__.9940:
 	.4byte	.LC38
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL376
-	.4byte	0x92ad
-	.4byte	0x80f4
+	.4byte	.LVL364
+	.4byte	0x92d7
+	.4byte	0x8065
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40062,9 +39990,9 @@ __func__.9940:
 	.4byte	.LC39
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL378
-	.4byte	0x92ad
-	.4byte	0x8111
+	.4byte	.LVL366
+	.4byte	0x92d7
+	.4byte	0x8082
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40079,9 +40007,9 @@ __func__.9940:
 	.4byte	.LC40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL380
-	.4byte	0x92ad
-	.4byte	0x812e
+	.4byte	.LVL368
+	.4byte	0x92d7
+	.4byte	0x809f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40096,9 +40024,9 @@ __func__.9940:
 	.4byte	.LC41
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL382
-	.4byte	0x92ad
-	.4byte	0x814b
+	.4byte	.LVL370
+	.4byte	0x92d7
+	.4byte	0x80bc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40113,9 +40041,9 @@ __func__.9940:
 	.4byte	.LC42
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL384
-	.4byte	0x92ad
-	.4byte	0x8168
+	.4byte	.LVL372
+	.4byte	0x92d7
+	.4byte	0x80d9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40130,9 +40058,9 @@ __func__.9940:
 	.4byte	.LC43
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL386
-	.4byte	0x92ad
-	.4byte	0x8185
+	.4byte	.LVL374
+	.4byte	0x92d7
+	.4byte	0x80f6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40147,9 +40075,9 @@ __func__.9940:
 	.4byte	.LC44
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL388
-	.4byte	0x92ad
-	.4byte	0x81a2
+	.4byte	.LVL376
+	.4byte	0x92d7
+	.4byte	0x8113
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40164,9 +40092,9 @@ __func__.9940:
 	.4byte	.LC45
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL390
-	.4byte	0x92ad
-	.4byte	0x81bf
+	.4byte	.LVL378
+	.4byte	0x92d7
+	.4byte	0x8130
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40181,9 +40109,9 @@ __func__.9940:
 	.4byte	.LC46
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL392
-	.4byte	0x92ad
-	.4byte	0x81dc
+	.4byte	.LVL380
+	.4byte	0x92d7
+	.4byte	0x814d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40198,9 +40126,9 @@ __func__.9940:
 	.4byte	.LC47
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL394
-	.4byte	0x92ad
-	.4byte	0x81f9
+	.4byte	.LVL382
+	.4byte	0x92d7
+	.4byte	0x816a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40215,9 +40143,9 @@ __func__.9940:
 	.4byte	.LC48
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL396
-	.4byte	0x92ad
-	.4byte	0x8216
+	.4byte	.LVL384
+	.4byte	0x92d7
+	.4byte	0x8187
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40232,9 +40160,9 @@ __func__.9940:
 	.4byte	.LC49
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL398
-	.4byte	0x92ad
-	.4byte	0x8233
+	.4byte	.LVL386
+	.4byte	0x92d7
+	.4byte	0x81a4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40249,9 +40177,9 @@ __func__.9940:
 	.4byte	.LC50
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL400
-	.4byte	0x92ad
-	.4byte	0x8250
+	.4byte	.LVL388
+	.4byte	0x92d7
+	.4byte	0x81c1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40266,9 +40194,9 @@ __func__.9940:
 	.4byte	.LC51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL402
-	.4byte	0x92ad
-	.4byte	0x826d
+	.4byte	.LVL390
+	.4byte	0x92d7
+	.4byte	0x81de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40283,9 +40211,9 @@ __func__.9940:
 	.4byte	.LC52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL404
-	.4byte	0x92ad
-	.4byte	0x828a
+	.4byte	.LVL392
+	.4byte	0x92d7
+	.4byte	0x81fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40300,9 +40228,9 @@ __func__.9940:
 	.4byte	.LC53
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL406
-	.4byte	0x92ad
-	.4byte	0x82a7
+	.4byte	.LVL394
+	.4byte	0x92d7
+	.4byte	0x8218
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40317,9 +40245,9 @@ __func__.9940:
 	.4byte	.LC54
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL408
-	.4byte	0x92ad
-	.4byte	0x82c4
+	.4byte	.LVL396
+	.4byte	0x92d7
+	.4byte	0x8235
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40334,9 +40262,9 @@ __func__.9940:
 	.4byte	.LC55
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL410
-	.4byte	0x92ad
-	.4byte	0x82e1
+	.4byte	.LVL398
+	.4byte	0x92d7
+	.4byte	0x8252
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40351,9 +40279,9 @@ __func__.9940:
 	.4byte	.LC56
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL412
-	.4byte	0x92ad
-	.4byte	0x82fe
+	.4byte	.LVL400
+	.4byte	0x92d7
+	.4byte	0x826f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40368,9 +40296,9 @@ __func__.9940:
 	.4byte	.LC57
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL414
-	.4byte	0x92ad
-	.4byte	0x831b
+	.4byte	.LVL402
+	.4byte	0x92d7
+	.4byte	0x828c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40385,9 +40313,9 @@ __func__.9940:
 	.4byte	.LC58
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL416
-	.4byte	0x92ad
-	.4byte	0x8338
+	.4byte	.LVL404
+	.4byte	0x92d7
+	.4byte	0x82a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40402,9 +40330,9 @@ __func__.9940:
 	.4byte	.LC59
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL418
-	.4byte	0x92ad
-	.4byte	0x8355
+	.4byte	.LVL406
+	.4byte	0x92d7
+	.4byte	0x82c6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40419,9 +40347,9 @@ __func__.9940:
 	.4byte	.LC60
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL420
-	.4byte	0x92ad
-	.4byte	0x8372
+	.4byte	.LVL408
+	.4byte	0x92d7
+	.4byte	0x82e3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40436,9 +40364,9 @@ __func__.9940:
 	.4byte	.LC61
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL422
-	.4byte	0x92ad
-	.4byte	0x838f
+	.4byte	.LVL410
+	.4byte	0x92d7
+	.4byte	0x8300
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40453,9 +40381,9 @@ __func__.9940:
 	.4byte	.LC62
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL424
-	.4byte	0x92ad
-	.4byte	0x83ac
+	.4byte	.LVL412
+	.4byte	0x92d7
+	.4byte	0x831d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40470,9 +40398,9 @@ __func__.9940:
 	.4byte	.LC63
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL426
-	.4byte	0x92ad
-	.4byte	0x83c9
+	.4byte	.LVL414
+	.4byte	0x92d7
+	.4byte	0x833a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40487,12 +40415,12 @@ __func__.9940:
 	.4byte	.LC64
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL428
-	.4byte	0x38fb
+	.4byte	.LVL416
+	.4byte	0x38e8
 	.uleb128 0x32
-	.4byte	.LVL429
-	.4byte	0x92ad
-	.4byte	0x83ef
+	.4byte	.LVL417
+	.4byte	0x92d7
+	.4byte	0x8360
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40507,12 +40435,12 @@ __func__.9940:
 	.4byte	.LC65
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL431
-	.4byte	0x38a2
+	.4byte	.LVL419
+	.4byte	0x388f
 	.uleb128 0x32
-	.4byte	.LVL432
-	.4byte	0x92ad
-	.4byte	0x8415
+	.4byte	.LVL420
+	.4byte	0x92d7
+	.4byte	0x8386
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40527,8 +40455,8 @@ __func__.9940:
 	.4byte	.LC66
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL435
-	.4byte	0x92ad
+	.4byte	.LVL423
+	.4byte	0x92d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40543,133 +40471,139 @@ __func__.9940:
 	.4byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
-	.4byte	0x27b7
+	.uleb128 0x6d
+	.4byte	0x27a6
 	.4byte	.LFB352
 	.4byte	.LFE352-.LFB352
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8489
+	.4byte	0x83fa
 	.uleb128 0x46
-	.4byte	0x27d2
+	.4byte	0x27c1
 	.4byte	.LLST0
 	.uleb128 0x46
-	.4byte	0x27dd
+	.4byte	0x27cc
 	.4byte	.LLST1
+	.uleb128 0x6e
+	.4byte	0x27b6
 	.uleb128 0x6f
-	.4byte	0x27c7
-	.uleb128 0x70
-	.4byte	0x27e8
+	.4byte	0x27d7
+	.uleb128 0x6f
+	.4byte	0x27e2
 	.uleb128 0x70
-	.4byte	0x27f3
-	.uleb128 0x71
-	.4byte	0x27fe
+	.4byte	0x27ed
 	.4byte	.LLST2
-	.uleb128 0x71
-	.4byte	0x2809
-	.4byte	.LLST3
-	.uleb128 0x71
-	.4byte	0x2814
-	.4byte	.LLST4
 	.uleb128 0x70
-	.4byte	0x281f
+	.4byte	0x27f8
+	.4byte	.LLST3
 	.uleb128 0x70
-	.4byte	0x282a
+	.4byte	0x2803
+	.4byte	.LLST4
+	.uleb128 0x6f
+	.4byte	0x280e
+	.uleb128 0x6f
+	.4byte	0x2819
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4b40
-	.4byte	.LFB359
-	.4byte	.LFE359-.LFB359
+	.uleb128 0x71
+	.4byte	0x4b2d
+	.4byte	.LFB358
+	.4byte	.LFE358-.LFB358
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84b2
+	.4byte	0x8423
 	.uleb128 0x46
-	.4byte	0x4b4d
+	.4byte	0x4b3a
 	.4byte	.LLST5
-	.uleb128 0x73
-	.4byte	0x4b59
+	.uleb128 0x72
+	.4byte	0x4b46
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x7b0e
+	.uleb128 0x71
+	.4byte	0x7a7f
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84cd
-	.uleb128 0x73
-	.4byte	0x7b1a
+	.4byte	0x843e
+	.uleb128 0x72
+	.4byte	0x7a8b
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x7752
+	.uleb128 0x71
+	.4byte	0x76c3
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8505
+	.4byte	0x8476
 	.uleb128 0x46
-	.4byte	0x7763
+	.4byte	0x76d4
 	.4byte	.LLST12
-	.uleb128 0x70
-	.4byte	0x776f
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x6f
-	.4byte	0x7763
-	.uleb128 0x74
+	.4byte	0x76e0
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x70
-	.4byte	0x84e9
+	.uleb128 0x6e
+	.4byte	0x76d4
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x6f
+	.4byte	0x845a
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x75
-	.4byte	0x6824
+	.uleb128 0x74
+	.4byte	0x6e85
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x74
+	.4byte	0x680a
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x75
-	.4byte	0x6013
+	.uleb128 0x74
+	.4byte	0x5ff9
 	.4byte	.LFB241
 	.4byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x75
-	.4byte	0x6007
+	.uleb128 0x74
+	.4byte	0x5fed
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x72
-	.4byte	0x5ddc
+	.uleb128 0x71
+	.4byte	0x5dde
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8599
+	.4byte	0x8519
 	.uleb128 0x46
-	.4byte	0x5de8
-	.4byte	.LLST52
-	.uleb128 0x70
-	.4byte	0x5df3
+	.4byte	0x5dea
+	.4byte	.LLST47
+	.uleb128 0x6f
+	.4byte	0x5df5
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x858f
-	.uleb128 0x6f
-	.4byte	0x5de8
-	.uleb128 0x74
+	.4byte	0x850f
+	.uleb128 0x6e
+	.4byte	0x5dea
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x70
-	.4byte	0x854e
+	.uleb128 0x6f
+	.4byte	0x84ce
 	.uleb128 0x2d
-	.4byte	.LVL144
-	.4byte	0x928b
+	.4byte	.LVL134
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40687,38 +40621,38 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xbd
+	.byte	0xdd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL142
-	.4byte	0x5d4a
+	.4byte	.LVL132
+	.4byte	0x5d3c
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x5e01
+	.uleb128 0x71
+	.4byte	0x5e03
 	.4byte	.LFB247
 	.4byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8600
+	.4byte	0x8580
 	.uleb128 0x46
-	.4byte	0x5e0d
-	.4byte	.LLST58
-	.uleb128 0x70
-	.4byte	0x5e18
+	.4byte	0x5e0f
+	.4byte	.LLST53
+	.uleb128 0x6f
+	.4byte	0x5e1a
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x48
-	.4byte	0x85f6
-	.uleb128 0x6f
-	.4byte	0x5e0d
-	.uleb128 0x74
+	.4byte	0x8576
+	.uleb128 0x6e
+	.4byte	0x5e0f
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x48
-	.uleb128 0x70
-	.4byte	0x85b5
+	.uleb128 0x6f
+	.4byte	0x8535
 	.uleb128 0x2d
-	.4byte	.LVL163
-	.4byte	0x928b
+	.4byte	.LVL153
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40736,76 +40670,74 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xb6
+	.byte	0xd6
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL161
-	.4byte	0x5cd1
+	.4byte	.LVL151
+	.4byte	0x5cc3
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x5ab5
+	.uleb128 0x71
+	.4byte	0x5aa7
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8721
+	.4byte	0x8699
 	.uleb128 0x46
-	.4byte	0x5ac6
-	.4byte	.LLST70
-	.uleb128 0x70
-	.4byte	0x5ad2
-	.uleb128 0x70
-	.4byte	0x5ade
-	.uleb128 0x70
-	.4byte	0x5aea
+	.4byte	0x5ab8
+	.4byte	.LLST65
+	.uleb128 0x6f
+	.4byte	0x5ac4
+	.uleb128 0x6f
+	.4byte	0x5ad0
+	.uleb128 0x6f
+	.4byte	0x5adc
+	.uleb128 0x6f
+	.4byte	0x5ae8
+	.uleb128 0x6f
+	.4byte	0x5af4
+	.uleb128 0x6f
+	.4byte	0x5b00
+	.uleb128 0x6f
+	.4byte	0x5b0c
+	.uleb128 0x6f
+	.4byte	0x5b18
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x46
+	.4byte	0x5ab8
+	.4byte	.LLST66
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x70
-	.4byte	0x5af6
+	.4byte	0x859c
+	.4byte	.LLST67
 	.uleb128 0x70
-	.4byte	0x5b02
+	.4byte	0x85a1
+	.4byte	.LLST68
 	.uleb128 0x70
-	.4byte	0x5b0e
+	.4byte	0x85a6
+	.4byte	.LLST69
 	.uleb128 0x70
-	.4byte	0x5b1a
+	.4byte	0x85ab
+	.4byte	.LLST70
 	.uleb128 0x70
-	.4byte	0x5b26
-	.uleb128 0x69
-	.4byte	.LBB191
-	.4byte	.LBE191-.LBB191
-	.uleb128 0x46
-	.4byte	0x5ac6
+	.4byte	0x85b0
 	.4byte	.LLST71
-	.uleb128 0x69
-	.4byte	.LBB192
-	.4byte	.LBE192-.LBB192
-	.uleb128 0x71
-	.4byte	0x861c
+	.uleb128 0x70
+	.4byte	0x85b5
 	.4byte	.LLST72
-	.uleb128 0x71
-	.4byte	0x8621
-	.4byte	.LLST73
-	.uleb128 0x71
-	.4byte	0x8626
-	.4byte	.LLST74
-	.uleb128 0x71
-	.4byte	0x862b
-	.4byte	.LLST75
-	.uleb128 0x71
-	.4byte	0x8630
-	.4byte	.LLST76
-	.uleb128 0x71
-	.4byte	0x8635
-	.4byte	.LLST77
-	.uleb128 0x71
-	.4byte	0x863a
-	.4byte	.LLST78
 	.uleb128 0x70
-	.4byte	0x863f
+	.4byte	0x85ba
+	.4byte	.LLST73
+	.uleb128 0x6f
+	.4byte	0x85bf
 	.uleb128 0x32
-	.4byte	.LVL206
-	.4byte	0x928b
-	.4byte	0x86ca
+	.4byte	.LVL197
+	.4byte	0x92b5
+	.4byte	0x8642
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40823,18 +40755,18 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1aa
+	.2byte	0x1d6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL213
-	.4byte	0x5c31
-	.4byte	0x86e7
+	.4byte	.LVL205
+	.4byte	0x5c23
+	.4byte	0x865f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR42
+	.4byte	.LANCHOR41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -40843,9 +40775,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL214
-	.4byte	0x928b
-	.4byte	0x870e
+	.4byte	.LVL206
+	.4byte	0x92b5
+	.4byte	0x8686
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40863,11 +40795,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1b3
+	.2byte	0x1e1
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL215
-	.4byte	0x5ddc
+	.4byte	.LVL207
+	.4byte	0x5dde
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40878,231 +40810,310 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x584c
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x87b1
-	.uleb128 0x46
-	.4byte	0x585d
-	.4byte	.LLST79
-	.uleb128 0x71
-	.4byte	0x5869
-	.4byte	.LLST80
 	.uleb128 0x71
-	.4byte	0x5875
-	.4byte	.LLST81
-	.uleb128 0x70
-	.4byte	0x5881
-	.uleb128 0x61
-	.4byte	.LBB195
-	.4byte	.LBE195-.LBB195
-	.4byte	0x87a7
-	.uleb128 0x46
-	.4byte	0x585d
-	.4byte	.LLST82
-	.uleb128 0x69
-	.4byte	.LBB196
-	.4byte	.LBE196-.LBB196
-	.uleb128 0x70
-	.4byte	0x873d
-	.uleb128 0x70
-	.4byte	0x8746
-	.uleb128 0x70
-	.4byte	0x874f
-	.uleb128 0x34
-	.4byte	.LVL220
-	.4byte	0x928b
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR55
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x214
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL222
-	.4byte	0x5e26
-	.byte	0
-	.uleb128 0x72
-	.4byte	0x4fc2
+	.4byte	0x4fb4
 	.4byte	.LFB269
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87ef
+	.4byte	0x86d7
 	.uleb128 0x46
-	.4byte	0x4fcf
-	.4byte	.LLST86
-	.uleb128 0x76
-	.4byte	0x4fdb
+	.4byte	0x4fc1
+	.4byte	.LLST77
+	.uleb128 0x75
+	.4byte	0x4fcd
 	.byte	0
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x73
-	.4byte	0x4fcf
+	.4byte	.Ldebug_ranges0+0x78
+	.uleb128 0x72
+	.4byte	0x4fc1
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x70
-	.4byte	0x87cd
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x78
+	.uleb128 0x6f
+	.4byte	0x86b5
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4b40
+	.uleb128 0x71
+	.4byte	0x4b2d
 	.4byte	.LFB275
 	.4byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8828
+	.4byte	0x8710
 	.uleb128 0x46
-	.4byte	0x4b4d
-	.4byte	.LLST87
+	.4byte	0x4b3a
+	.4byte	.LLST78
 	.uleb128 0x46
-	.4byte	0x4b59
-	.4byte	.LLST88
+	.4byte	0x4b46
+	.4byte	.LLST79
 	.uleb128 0x2d
-	.4byte	.LVL248
-	.4byte	0x8489
+	.4byte	.LVL236
+	.4byte	0x83fa
 	.uleb128 0x3c
-	.4byte	0x4b59
+	.4byte	0x4b46
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4048
+	.uleb128 0x71
+	.4byte	0x4035
 	.4byte	.LFB285
 	.4byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x886e
-	.uleb128 0x73
-	.4byte	0x4055
+	.4byte	0x8756
+	.uleb128 0x72
+	.4byte	0x4042
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x70
-	.4byte	0x4061
-	.uleb128 0x69
-	.4byte	.LBB209
-	.4byte	.LBE209-.LBB209
+	.uleb128 0x6f
+	.4byte	0x404e
+	.uleb128 0x76
+	.4byte	.LBB223
+	.4byte	.LBE223-.LBB223
 	.uleb128 0x46
-	.4byte	0x4055
-	.4byte	.LLST93
-	.uleb128 0x69
-	.4byte	.LBB210
-	.4byte	.LBE210-.LBB210
-	.uleb128 0x71
-	.4byte	0x8842
-	.4byte	.LLST94
+	.4byte	0x4042
+	.4byte	.LLST84
+	.uleb128 0x76
+	.4byte	.LBB224
+	.4byte	.LBE224-.LBB224
+	.uleb128 0x70
+	.4byte	0x872a
+	.4byte	.LLST85
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x37c3
+	.uleb128 0x71
+	.4byte	0x37a0
 	.4byte	.LFB300
 	.4byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88a7
+	.4byte	0x878f
 	.uleb128 0x46
-	.4byte	0x37d4
-	.4byte	.LLST120
-	.uleb128 0x69
-	.4byte	.LBB215
-	.4byte	.LBE215-.LBB215
+	.4byte	0x37b1
+	.4byte	.LLST112
+	.uleb128 0x76
+	.4byte	.LBB229
+	.4byte	.LBE229-.LBB229
 	.uleb128 0x46
-	.4byte	0x37d4
-	.4byte	.LLST121
+	.4byte	0x37b1
+	.4byte	.LLST113
 	.uleb128 0x44
-	.4byte	.LVL487
-	.4byte	0x5e01
+	.4byte	.LVL477
+	.4byte	0x5e03
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2b8f
+	.uleb128 0x71
+	.4byte	0x2b7e
 	.4byte	.LFB319
 	.4byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88cd
+	.4byte	0x87b5
 	.uleb128 0x44
-	.4byte	.LVL547
-	.4byte	0x6189
+	.4byte	.LVL537
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL548
-	.4byte	0x2c26
+	.4byte	.LVL538
+	.4byte	0x2c15
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2ae5
-	.4byte	.LFB321
-	.4byte	.LFE321-.LFB321
+	.uleb128 0x71
+	.4byte	0x5fb2
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x899a
+	.4byte	0x8854
+	.uleb128 0x46
+	.4byte	0x5fbe
+	.4byte	.LLST169
+	.uleb128 0x46
+	.4byte	0x5fc9
+	.4byte	.LLST170
+	.uleb128 0x77
+	.4byte	0x5fed
+	.4byte	.LBB247
+	.4byte	.LBE247-.LBB247
+	.byte	0x2
+	.byte	0x65
 	.uleb128 0x76
-	.4byte	0x2af6
-	.byte	0
+	.4byte	.LBB249
+	.4byte	.LBE249-.LBB249
+	.uleb128 0x46
+	.4byte	0x5fc9
+	.4byte	.LLST171
+	.uleb128 0x46
+	.4byte	0x5fbe
+	.4byte	.LLST172
+	.uleb128 0x76
+	.4byte	.LBB250
+	.4byte	.LBE250-.LBB250
 	.uleb128 0x70
-	.4byte	0x2b02
+	.4byte	0x5fd5
+	.4byte	.LLST173
+	.uleb128 0x76
+	.4byte	.LBB251
+	.4byte	.LBE251-.LBB251
 	.uleb128 0x70
-	.4byte	0x2b0c
+	.4byte	0x5fdf
+	.4byte	.LLST174
+	.uleb128 0x32
+	.4byte	.LVL627
+	.4byte	0x616f
+	.4byte	0x883c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL629
+	.4byte	0x2453
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x71
+	.4byte	0x583e
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x88f7
+	.uleb128 0x46
+	.4byte	0x584f
+	.4byte	.LLST187
 	.uleb128 0x70
-	.4byte	0x2b18
-	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0xb8
-	.4byte	0x897c
+	.4byte	0x585b
+	.4byte	.LLST188
 	.uleb128 0x70
-	.4byte	0x88e0
+	.4byte	0x5867
+	.4byte	.LLST189
+	.uleb128 0x6f
+	.4byte	0x5873
+	.uleb128 0x61
+	.4byte	.LBB260
+	.4byte	.LBE260-.LBB260
+	.4byte	0x88da
+	.uleb128 0x46
+	.4byte	0x584f
+	.4byte	.LLST190
+	.uleb128 0x76
+	.4byte	.LBB261
+	.4byte	.LBE261-.LBB261
+	.uleb128 0x6f
+	.4byte	0x8870
+	.uleb128 0x6f
+	.4byte	0x8879
+	.uleb128 0x6f
+	.4byte	0x8882
+	.uleb128 0x34
+	.4byte	.LVL703
+	.4byte	0x92b5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR116
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x245
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL700
+	.4byte	0x5e28
+	.uleb128 0x34
+	.4byte	.LVL701
+	.4byte	0x92b5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC84
+	.byte	0
+	.byte	0
 	.uleb128 0x71
-	.4byte	0x88e6
+	.4byte	0x2ad4
+	.4byte	.LFB321
+	.4byte	.LFE321-.LFB321
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x89c4
+	.uleb128 0x75
+	.4byte	0x2ae5
+	.byte	0
+	.uleb128 0x6f
+	.4byte	0x2af1
+	.uleb128 0x6f
+	.4byte	0x2afb
+	.uleb128 0x6f
+	.4byte	0x2b07
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x100
+	.4byte	0x89a6
+	.uleb128 0x6f
+	.4byte	0x890a
+	.uleb128 0x70
+	.4byte	0x8910
 	.4byte	.LLST240
-	.uleb128 0x77
-	.4byte	0x88eb
+	.uleb128 0x78
+	.4byte	0x8915
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
-	.uleb128 0x77
-	.4byte	0x88f0
+	.uleb128 0x78
+	.4byte	0x891a
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x61
-	.4byte	.LBB238
-	.4byte	.LBE238-.LBB238
-	.4byte	0x8966
-	.uleb128 0x77
-	.4byte	0x2b29
+	.4byte	.LBB271
+	.4byte	.LBE271-.LBB271
+	.4byte	0x8990
+	.uleb128 0x78
+	.4byte	0x2b18
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
 	.uleb128 0x32
-	.4byte	.LVL920
-	.4byte	0x26b9
-	.4byte	0x8953
+	.4byte	.LVL928
+	.4byte	0x26a8
+	.4byte	0x897d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41121,15 +41132,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL921
-	.4byte	0x6189
+	.4byte	.LVL929
+	.4byte	0x616f
 	.uleb128 0x44
-	.4byte	.LVL922
-	.4byte	0x2c26
+	.4byte	.LVL930
+	.4byte	0x2c15
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL919
-	.4byte	0x5279
+	.4byte	.LVL927
+	.4byte	0x526b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41143,11 +41154,11 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x69
-	.4byte	.LBB241
-	.4byte	.LBE241-.LBB241
-	.uleb128 0x77
-	.4byte	0x2b37
+	.uleb128 0x76
+	.4byte	.LBB274
+	.4byte	.LBE274-.LBB274
+	.uleb128 0x78
+	.4byte	0x2b26
 	.uleb128 0xd
 	.byte	0x40
 	.byte	0x45
@@ -41161,51 +41172,51 @@ __func__.9940:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2410
+	.uleb128 0x71
+	.4byte	0x23ff
 	.4byte	.LFB347
 	.4byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8aa2
+	.4byte	0x8acc
 	.uleb128 0x46
-	.4byte	0x2420
+	.4byte	0x240f
 	.4byte	.LLST282
-	.uleb128 0x76
-	.4byte	0x242b
+	.uleb128 0x75
+	.4byte	0x241a
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2436
-	.uleb128 0x70
-	.4byte	0x2441
-	.uleb128 0x69
-	.4byte	.LBB245
-	.4byte	.LBE245-.LBB245
+	.uleb128 0x6f
+	.4byte	0x2425
+	.uleb128 0x6f
+	.4byte	0x2430
+	.uleb128 0x76
+	.4byte	.LBB278
+	.4byte	.LBE278-.LBB278
 	.uleb128 0x46
-	.4byte	0x2420
+	.4byte	0x240f
 	.4byte	.LLST283
-	.uleb128 0x69
-	.4byte	.LBB246
-	.4byte	.LBE246-.LBB246
-	.uleb128 0x70
-	.4byte	0x89b6
-	.uleb128 0x77
-	.4byte	0x89bc
+	.uleb128 0x76
+	.4byte	.LBB279
+	.4byte	.LBE279-.LBB279
+	.uleb128 0x6f
+	.4byte	0x89e0
+	.uleb128 0x78
+	.4byte	0x89e6
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
-	.uleb128 0x77
-	.4byte	0x89c1
+	.uleb128 0x78
+	.4byte	0x89eb
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x78
-	.4byte	0x244c
+	.uleb128 0x79
+	.4byte	0x243b
 	.4byte	.LDL1
 	.uleb128 0x32
-	.4byte	.LVL1145
-	.4byte	0x230c
-	.4byte	0x8a22
+	.4byte	.LVL1153
+	.4byte	0x22fb
+	.4byte	0x8a4c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41226,9 +41237,9 @@ __func__.9940:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1146
-	.4byte	0x230c
-	.4byte	0x8a41
+	.4byte	.LVL1154
+	.4byte	0x22fb
+	.4byte	0x8a6b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41248,9 +41259,9 @@ __func__.9940:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1147
-	.4byte	0x2464
-	.4byte	0x8a60
+	.4byte	.LVL1155
+	.4byte	0x2453
+	.4byte	0x8a8a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41269,9 +41280,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1148
-	.4byte	0x251a
-	.4byte	0x8a84
+	.4byte	.LVL1156
+	.4byte	0x2509
+	.4byte	0x8aae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41295,8 +41306,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1150
-	.4byte	0x2464
+	.4byte	.LVL1158
+	.4byte	0x2453
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41317,50 +41328,50 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2b45
+	.uleb128 0x71
+	.4byte	0x2b34
 	.4byte	.LFB320
 	.4byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b5b
+	.4byte	0x8b85
 	.uleb128 0x46
-	.4byte	0x2b56
+	.4byte	0x2b45
 	.4byte	.LLST303
-	.uleb128 0x70
-	.4byte	0x2b62
-	.uleb128 0x70
-	.4byte	0x2b6e
-	.uleb128 0x70
-	.4byte	0x2b78
-	.uleb128 0x70
-	.4byte	0x2b82
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0xe8
 	.uleb128 0x6f
-	.4byte	0x2b56
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0xe8
-	.uleb128 0x71
-	.4byte	0x8abe
+	.4byte	0x2b51
+	.uleb128 0x6f
+	.4byte	0x2b5d
+	.uleb128 0x6f
+	.4byte	0x2b67
+	.uleb128 0x6f
+	.4byte	0x2b71
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x130
+	.uleb128 0x6e
+	.4byte	0x2b45
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x130
+	.uleb128 0x70
+	.4byte	0x8ae8
 	.4byte	.LLST304
-	.uleb128 0x71
-	.4byte	0x8ac3
+	.uleb128 0x70
+	.4byte	0x8aed
 	.4byte	.LLST305
-	.uleb128 0x71
-	.4byte	0x8ac8
+	.uleb128 0x70
+	.4byte	0x8af2
 	.4byte	.LLST306
-	.uleb128 0x77
-	.4byte	0x8acd
+	.uleb128 0x78
+	.4byte	0x8af7
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x44
-	.4byte	.LVL1228
-	.4byte	0x2b8f
+	.4byte	.LVL1236
+	.4byte	0x2b7e
 	.uleb128 0x32
-	.4byte	.LVL1230
-	.4byte	0x61f9
-	.4byte	0x8b20
+	.4byte	.LVL1238
+	.4byte	0x61df
+	.4byte	0x8b4a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41369,9 +41380,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1236
-	.4byte	0x928b
-	.4byte	0x8b3b
+	.4byte	.LVL1244
+	.4byte	0x92b5
+	.4byte	0x8b65
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41387,9 +41398,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1237
-	.4byte	0x688f
-	.4byte	0x8b4f
+	.4byte	.LVL1245
+	.4byte	0x6875
+	.4byte	0x8b79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41398,45 +41409,45 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1238
-	.4byte	0x6657
+	.4byte	.LVL1246
+	.4byte	0x663d
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x32fe
+	.uleb128 0x71
+	.4byte	0x32db
 	.4byte	.LFB304
 	.4byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c3b
+	.4byte	0x8c65
 	.uleb128 0x46
-	.4byte	0x330f
+	.4byte	0x32ec
 	.4byte	.LLST307
-	.uleb128 0x70
-	.4byte	0x331b
+	.uleb128 0x6f
+	.4byte	0x32f8
 	.uleb128 0x61
-	.4byte	.LBB261
-	.4byte	.LBE261-.LBB261
-	.4byte	0x8c31
+	.4byte	.LBB294
+	.4byte	.LBE294-.LBB294
+	.4byte	0x8c5b
 	.uleb128 0x46
-	.4byte	0x330f
+	.4byte	0x32ec
 	.4byte	.LLST308
-	.uleb128 0x69
-	.4byte	.LBB262
-	.4byte	.LBE262-.LBB262
-	.uleb128 0x70
-	.4byte	0x8b77
+	.uleb128 0x76
+	.4byte	.LBB295
+	.4byte	.LBE295-.LBB295
+	.uleb128 0x6f
+	.4byte	0x8ba1
 	.uleb128 0x32
-	.4byte	.LVL1248
-	.4byte	0x5c31
-	.4byte	0x8bbd
+	.4byte	.LVL1256
+	.4byte	0x5c23
+	.4byte	0x8be7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR42
+	.4byte	.LANCHOR41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41445,9 +41456,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1249
-	.4byte	0x928b
-	.4byte	0x8be4
+	.4byte	.LVL1257
+	.4byte	0x92b5
+	.4byte	0x8c0e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41459,18 +41470,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR159
+	.4byte	.LANCHOR158
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa88
+	.2byte	0xabb
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1250
-	.4byte	0x37c3
-	.4byte	0x8bf8
+	.4byte	.LVL1258
+	.4byte	0x37a0
+	.4byte	0x8c22
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41479,9 +41490,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1251
-	.4byte	0x2b45
-	.4byte	0x8c0c
+	.4byte	.LVL1259
+	.4byte	0x2b34
+	.4byte	0x8c36
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41490,8 +41501,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1252
-	.4byte	0x928b
+	.4byte	.LVL1260
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41503,52 +41514,52 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR159
+	.4byte	.LANCHOR158
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa8b
+	.2byte	0xabe
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1256
-	.4byte	0x5ab5
+	.4byte	.LVL1264
+	.4byte	0x5aa7
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4edc
+	.uleb128 0x71
+	.4byte	0x4ece
 	.4byte	.LFB271
 	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d13
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x108
-	.uleb128 0x71
-	.4byte	0x4eea
+	.4byte	0x8d3d
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x150
+	.uleb128 0x70
+	.4byte	0x4edc
 	.4byte	.LLST311
-	.uleb128 0x77
-	.4byte	0x4ef6
+	.uleb128 0x78
+	.4byte	0x4ee8
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x71
-	.4byte	0x4f02
+	.uleb128 0x70
+	.4byte	0x4ef4
 	.4byte	.LLST312
-	.uleb128 0x77
-	.4byte	0x4f0e
+	.uleb128 0x78
+	.4byte	0x4f00
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x71
-	.4byte	0x4f1a
+	.uleb128 0x70
+	.4byte	0x4f0c
 	.4byte	.LLST313
 	.uleb128 0x32
-	.4byte	.LVL1269
-	.4byte	0x5279
-	.4byte	0x8c9e
+	.4byte	.LVL1277
+	.4byte	0x526b
+	.4byte	0x8cc8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41569,9 +41580,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1271
-	.4byte	0x26b9
-	.4byte	0x8cbd
+	.4byte	.LVL1279
+	.4byte	0x26a8
+	.4byte	0x8ce7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41591,9 +41602,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1275
-	.4byte	0x230c
-	.4byte	0x8cd1
+	.4byte	.LVL1283
+	.4byte	0x22fb
+	.4byte	0x8cfb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41602,9 +41613,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1277
-	.4byte	0x333e
-	.4byte	0x8ce5
+	.4byte	.LVL1285
+	.4byte	0x331b
+	.4byte	0x8d0f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41613,9 +41624,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1278
-	.4byte	0x251a
-	.4byte	0x8d08
+	.4byte	.LVL1286
+	.4byte	0x2509
+	.4byte	0x8d32
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41639,20 +41650,20 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1279
-	.4byte	0x3259
+	.4byte	.LVL1287
+	.4byte	0x3236
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x3e0a
+	.uleb128 0x71
+	.4byte	0x3df7
 	.4byte	.LFB289
 	.4byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d44
+	.4byte	0x8d6e
 	.uleb128 0x2d
-	.4byte	.LVL1527
-	.4byte	0x5156
+	.4byte	.LVL1534
+	.4byte	0x5148
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41668,20 +41679,20 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR83
+	.4byte	.LANCHOR81
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x4b66
+	.uleb128 0x71
+	.4byte	0x4b53
 	.4byte	.LFB274
 	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d9b
+	.4byte	0x8dc5
 	.uleb128 0x32
-	.4byte	.LVL1553
-	.4byte	0x503e
-	.4byte	0x8d6b
+	.4byte	.LVL1560
+	.4byte	0x5030
+	.4byte	0x8d95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41690,9 +41701,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1554
-	.4byte	0x928b
-	.4byte	0x8d8b
+	.4byte	.LVL1561
+	.4byte	0x92b5
+	.4byte	0x8db5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41704,11 +41715,11 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC100
+	.4byte	.LC103
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1555
-	.4byte	0x230c
+	.4byte	.LVL1562
+	.4byte	0x22fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41716,17 +41727,17 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x2d93
+	.uleb128 0x71
+	.4byte	0x2d79
 	.4byte	.LFB314
 	.4byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8de9
+	.4byte	0x8e13
 	.uleb128 0x32
-	.4byte	.LVL1690
-	.4byte	0x2d9c
-	.4byte	0x8dc2
+	.4byte	.LVL1694
+	.4byte	0x2d82
+	.4byte	0x8dec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41735,9 +41746,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1691
-	.4byte	0x4f28
-	.4byte	0x8dd9
+	.4byte	.LVL1695
+	.4byte	0x4f1a
+	.4byte	0x8e03
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41746,8 +41757,8 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1692
-	.4byte	0x2f42
+	.4byte	.LVL1696
+	.4byte	0x2f28
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41755,103 +41766,103 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x29fd
+	.uleb128 0x71
+	.4byte	0x29ec
 	.4byte	.LFB322
 	.4byte	.LFE322-.LFB322
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9108
+	.4byte	0x9129
 	.uleb128 0x46
-	.4byte	0x2a0e
-	.4byte	.LLST398
+	.4byte	0x29fd
+	.4byte	.LLST397
 	.uleb128 0x46
-	.4byte	0x2a1a
-	.4byte	.LLST399
-	.uleb128 0x76
-	.4byte	0x2a26
+	.4byte	0x2a09
+	.4byte	.LLST398
+	.uleb128 0x75
+	.4byte	0x2a15
 	.byte	0x1
-	.uleb128 0x70
-	.4byte	0x2a32
-	.uleb128 0x70
-	.4byte	0x2a3e
-	.uleb128 0x79
-	.4byte	0x2a4a
+	.uleb128 0x6f
+	.4byte	0x2a21
+	.uleb128 0x6f
+	.4byte	0x2a2d
+	.uleb128 0x7a
+	.4byte	0x2a39
 	.sleb128 -1
-	.uleb128 0x70
-	.4byte	0x2a56
-	.uleb128 0x70
-	.4byte	0x2a62
-	.uleb128 0x70
-	.4byte	0x2a6e
-	.uleb128 0x70
-	.4byte	0x2a7a
-	.uleb128 0x70
-	.4byte	0x2a86
-	.uleb128 0x70
-	.4byte	0x2a92
-	.uleb128 0x70
-	.4byte	0x2aae
+	.uleb128 0x6f
+	.4byte	0x2a45
+	.uleb128 0x6f
+	.4byte	0x2a51
+	.uleb128 0x6f
+	.4byte	0x2a5d
+	.uleb128 0x6f
+	.4byte	0x2a69
+	.uleb128 0x6f
+	.4byte	0x2a75
+	.uleb128 0x6f
+	.4byte	0x2a81
+	.uleb128 0x6f
+	.4byte	0x2a9d
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x158
-	.4byte	0x90f8
+	.4byte	.Ldebug_ranges0+0x1a0
+	.4byte	0x9119
 	.uleb128 0x46
-	.4byte	0x2a1a
-	.4byte	.LLST400
+	.4byte	0x2a09
+	.4byte	.LLST399
 	.uleb128 0x46
-	.4byte	0x2a0e
-	.4byte	.LLST401
-	.uleb128 0x74
-	.4byte	.Ldebug_ranges0+0x158
+	.4byte	0x29fd
+	.4byte	.LLST400
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x1a0
+	.uleb128 0x6f
+	.4byte	0x8e38
 	.uleb128 0x70
-	.4byte	0x8e0e
-	.uleb128 0x71
-	.4byte	0x8e14
-	.4byte	.LLST402
-	.uleb128 0x77
-	.4byte	0x8e19
+	.4byte	0x8e3e
+	.4byte	.LLST401
+	.uleb128 0x78
+	.4byte	0x8e43
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
+	.uleb128 0x6f
+	.4byte	0x8e48
 	.uleb128 0x70
-	.4byte	0x8e1e
-	.uleb128 0x71
-	.4byte	0x8e24
+	.4byte	0x8e4e
+	.4byte	.LLST402
+	.uleb128 0x70
+	.4byte	0x8e53
 	.4byte	.LLST403
-	.uleb128 0x71
-	.4byte	0x8e29
+	.uleb128 0x70
+	.4byte	0x8e58
 	.4byte	.LLST404
-	.uleb128 0x71
-	.4byte	0x8e2e
+	.uleb128 0x70
+	.4byte	0x8e5d
 	.4byte	.LLST405
-	.uleb128 0x71
-	.4byte	0x8e33
+	.uleb128 0x70
+	.4byte	0x8e62
 	.4byte	.LLST406
-	.uleb128 0x71
-	.4byte	0x8e38
-	.4byte	.LLST407
-	.uleb128 0x71
-	.4byte	0x8e3d
-	.4byte	.LLST408
-	.uleb128 0x7a
-	.4byte	0x2a9e
-	.uleb128 0x7a
-	.4byte	0x2aa6
 	.uleb128 0x70
-	.4byte	0x8e42
+	.4byte	0x8e67
+	.4byte	.LLST407
+	.uleb128 0x7b
+	.4byte	0x2a8d
+	.uleb128 0x7b
+	.4byte	0x2a95
+	.uleb128 0x6f
+	.4byte	0x8e6c
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x178
-	.4byte	0x8f2d
-	.uleb128 0x71
-	.4byte	0x2abc
-	.4byte	.LLST409
+	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	0x8f57
+	.uleb128 0x70
+	.4byte	0x2aab
+	.4byte	.LLST408
 	.uleb128 0x44
-	.4byte	.LVL1718
-	.4byte	0x37e1
-	.uleb128 0x32
 	.4byte	.LVL1721
-	.4byte	0x5b34
-	.4byte	0x8ef6
+	.4byte	0x37be
+	.uleb128 0x32
+	.4byte	.LVL1724
+	.4byte	0x5b26
+	.4byte	0x8f20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41860,9 +41871,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1723
-	.4byte	0x5b34
-	.4byte	0x8f0a
+	.4byte	.LVL1726
+	.4byte	0x5b26
+	.4byte	0x8f34
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41871,17 +41882,17 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1726
-	.4byte	0x2b8f
+	.4byte	.LVL1729
+	.4byte	0x2b7e
 	.uleb128 0x34
-	.4byte	.LVL1738
-	.4byte	0x928b
+	.4byte	.LVL1741
+	.4byte	0x92b5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LC104
+	.4byte	.LC107
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41891,12 +41902,12 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1749
-	.4byte	0x3168
+	.4byte	.LVL1752
+	.4byte	0x3145
 	.uleb128 0x32
-	.4byte	.LVL1750
-	.4byte	0x3f2e
-	.4byte	0x8f4a
+	.4byte	.LVL1753
+	.4byte	0x3f1b
+	.4byte	0x8f74
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41905,9 +41916,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1751
-	.4byte	0x5b34
-	.4byte	0x8f5e
+	.4byte	.LVL1754
+	.4byte	0x5b26
+	.4byte	0x8f88
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41916,15 +41927,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1754
-	.4byte	0x2ae5
-	.uleb128 0x44
 	.4byte	.LVL1757
-	.4byte	0x5b34
+	.4byte	0x2ad4
+	.uleb128 0x44
+	.4byte	.LVL1760
+	.4byte	0x5b26
 	.uleb128 0x32
-	.4byte	.LVL1759
-	.4byte	0x3259
-	.4byte	0x8f84
+	.4byte	.LVL1762
+	.4byte	0x3236
+	.4byte	0x8fae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41933,9 +41944,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1764
-	.4byte	0x3168
-	.4byte	0x8f9b
+	.4byte	.LVL1767
+	.4byte	0x3145
+	.4byte	0x8fc5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41946,9 +41957,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1765
-	.4byte	0x3259
-	.4byte	0x8faf
+	.4byte	.LVL1768
+	.4byte	0x3236
+	.4byte	0x8fd9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41957,9 +41968,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1766
-	.4byte	0x928b
-	.4byte	0x8fd6
+	.4byte	.LVL1769
+	.4byte	0x92b5
+	.4byte	0x9000
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41971,18 +41982,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x296
+	.2byte	0x292
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1767
-	.4byte	0x928b
-	.4byte	0x8ffd
+	.4byte	.LVL1770
+	.4byte	0x92b5
+	.4byte	0x9027
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41994,18 +42005,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x297
+	.2byte	0x293
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1768
-	.4byte	0x928b
-	.4byte	0x9024
+	.4byte	.LVL1771
+	.4byte	0x92b5
+	.4byte	0x904e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42017,18 +42028,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x298
+	.2byte	0x294
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1769
-	.4byte	0x3f2e
-	.4byte	0x9038
+	.4byte	.LVL1772
+	.4byte	0x3f1b
+	.4byte	0x9062
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42037,12 +42048,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1770
-	.4byte	0x2ae5
+	.4byte	.LVL1773
+	.4byte	0x2ad4
 	.uleb128 0x32
-	.4byte	.LVL1780
-	.4byte	0x26b9
-	.4byte	0x9057
+	.4byte	.LVL1783
+	.4byte	0x26a8
+	.4byte	0x9081
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -42052,9 +42063,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1789
-	.4byte	0x928b
-	.4byte	0x907e
+	.4byte	.LVL1792
+	.4byte	0x92b5
+	.4byte	0x90a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42066,18 +42077,18 @@ __func__.9940:
 	.byte	0x51
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	.LANCHOR177
+	.4byte	.LANCHOR175
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2bc
+	.2byte	0x2b8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1790
-	.4byte	0x5279
-	.4byte	0x909d
+	.4byte	.LVL1793
+	.4byte	0x526b
+	.4byte	0x90c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42097,12 +42108,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1792
-	.4byte	0x2d0e
+	.4byte	.LVL1795
+	.4byte	0x2cfd
 	.uleb128 0x32
-	.4byte	.LVL1793
-	.4byte	0x319e
-	.4byte	0x90c0
+	.4byte	.LVL1796
+	.4byte	0x317b
+	.4byte	0x90ea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42117,28 +42128,25 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1794
-	.4byte	0x2c6a
-	.uleb128 0x44
-	.4byte	.LVL1799
-	.4byte	0x2c6a
-	.uleb128 0x44
-	.4byte	.LVL1800
-	.4byte	0x32fe
-	.uleb128 0x44
-	.4byte	.LVL1801
-	.4byte	0x6ee0
+	.4byte	.LVL1797
+	.4byte	0x2c59
 	.uleb128 0x44
 	.4byte	.LVL1802
-	.4byte	0x537a
+	.4byte	0x2c59
 	.uleb128 0x44
 	.4byte	.LVL1803
-	.4byte	0x4d75
+	.4byte	0x32db
+	.uleb128 0x44
+	.4byte	.LVL1804
+	.4byte	0x536c
+	.uleb128 0x44
+	.4byte	.LVL1805
+	.4byte	0x4d67
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1732
-	.4byte	0x2f42
+	.4byte	.LVL1735
+	.4byte	0x2f28
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42146,33 +42154,33 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x399e
+	.uleb128 0x71
+	.4byte	0x398b
 	.4byte	.LFB295
 	.4byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9268
-	.uleb128 0x76
-	.4byte	0x39af
+	.4byte	0x9292
+	.uleb128 0x75
+	.4byte	0x399c
 	.byte	0
 	.uleb128 0x61
-	.4byte	.LBB306
-	.4byte	.LBE306-.LBB306
-	.4byte	0x91fe
-	.uleb128 0x70
-	.4byte	0x911b
+	.4byte	.LBB339
+	.4byte	.LBE339-.LBB339
+	.4byte	0x9228
+	.uleb128 0x6f
+	.4byte	0x913c
 	.uleb128 0x3e
-	.4byte	.Ldebug_ranges0+0x1a8
-	.4byte	0x9146
-	.uleb128 0x71
-	.4byte	0x39ba
-	.4byte	.LLST449
+	.4byte	.Ldebug_ranges0+0x1f0
+	.4byte	0x9167
+	.uleb128 0x70
+	.4byte	0x39a7
+	.4byte	.LLST448
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1998
-	.4byte	0x3d16
-	.4byte	0x915a
+	.4byte	.LVL1986
+	.4byte	0x3d03
+	.4byte	0x917b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42181,9 +42189,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1999
-	.4byte	0x3d16
-	.4byte	0x916e
+	.4byte	.LVL1987
+	.4byte	0x3d03
+	.4byte	0x918f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42192,9 +42200,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2001
-	.4byte	0x4f28
-	.4byte	0x9185
+	.4byte	.LVL1989
+	.4byte	0x4f1a
+	.4byte	0x91a6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42203,9 +42211,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2002
-	.4byte	0x4f28
-	.4byte	0x919c
+	.4byte	.LVL1990
+	.4byte	0x4f1a
+	.4byte	0x91bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42214,24 +42222,24 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2003
-	.4byte	0x537a
+	.4byte	.LVL1991
+	.4byte	0x536c
 	.uleb128 0x44
-	.4byte	.LVL2004
-	.4byte	0x4d75
+	.4byte	.LVL1992
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL2005
-	.4byte	0x4d75
+	.4byte	.LVL1993
+	.4byte	0x4d67
 	.uleb128 0x44
-	.4byte	.LVL2009
-	.4byte	0x2c26
+	.4byte	.LVL1994
+	.4byte	0x2c15
 	.uleb128 0x44
-	.4byte	.LVL2010
-	.4byte	0x2c26
+	.4byte	.LVL1995
+	.4byte	0x2c15
 	.uleb128 0x32
-	.4byte	.LVL2011
-	.4byte	0x3430
-	.4byte	0x91e0
+	.4byte	.LVL1996
+	.4byte	0x340d
+	.4byte	0x9201
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42240,9 +42248,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2012
-	.4byte	0x3430
-	.4byte	0x91f4
+	.4byte	.LVL1997
+	.4byte	0x340d
+	.4byte	0x9215
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42251,42 +42259,45 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2013
-	.4byte	0x3bff
+	.4byte	.LVL1998
+	.4byte	0x3bec
+	.uleb128 0x44
+	.4byte	.LVL2002
+	.4byte	0x536c
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1985
-	.4byte	0x601f
+	.4byte	.LVL1973
+	.4byte	0x6005
 	.uleb128 0x44
-	.4byte	.LVL1986
-	.4byte	0x4b73
+	.4byte	.LVL1974
+	.4byte	0x4b60
 	.uleb128 0x44
-	.4byte	.LVL1987
-	.4byte	0x49a7
+	.4byte	.LVL1975
+	.4byte	0x4994
 	.uleb128 0x44
-	.4byte	.LVL1988
-	.4byte	0x4749
+	.4byte	.LVL1976
+	.4byte	0x4736
 	.uleb128 0x44
-	.4byte	.LVL1989
-	.4byte	0x47ca
+	.4byte	.LVL1977
+	.4byte	0x47b7
 	.uleb128 0x44
-	.4byte	.LVL1990
-	.4byte	0x3db9
+	.4byte	.LVL1978
+	.4byte	0x3da6
 	.uleb128 0x44
-	.4byte	.LVL1991
-	.4byte	0x4b66
+	.4byte	.LVL1979
+	.4byte	0x4b53
 	.uleb128 0x44
-	.4byte	.LVL1992
-	.4byte	0x5ee3
+	.4byte	.LVL1980
+	.4byte	0x5f56
 	.uleb128 0x44
-	.4byte	.LVL1993
-	.4byte	0x3e13
+	.4byte	.LVL1981
+	.4byte	0x3e00
 	.uleb128 0x44
-	.4byte	.LVL1994
-	.4byte	0x3fc4
+	.4byte	.LVL1982
+	.4byte	0x3fb1
 	.uleb128 0x34
-	.4byte	.LVL1995
-	.4byte	0x4fc2
+	.4byte	.LVL1983
+	.4byte	0x4fb4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42294,39 +42305,39 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x7b
-	.4byte	.LASF875
-	.4byte	.LASF875
+	.uleb128 0x7c
+	.4byte	.LASF873
+	.4byte	.LASF873
 	.byte	0xb
 	.byte	0x72
-	.uleb128 0x7c
-	.4byte	.LASF876
-	.4byte	.LASF876
+	.uleb128 0x7d
+	.4byte	.LASF874
+	.4byte	.LASF874
 	.byte	0x1c
 	.2byte	0x16d
-	.uleb128 0x7c
-	.4byte	.LASF877
-	.4byte	.LASF877
+	.uleb128 0x7d
+	.4byte	.LASF875
+	.4byte	.LASF875
 	.byte	0x1c
 	.2byte	0x16c
-	.uleb128 0x7b
-	.4byte	.LASF878
-	.4byte	.LASF878
+	.uleb128 0x7c
+	.4byte	.LASF876
+	.4byte	.LASF876
 	.byte	0x1d
 	.byte	0x12
-	.uleb128 0x7b
-	.4byte	.LASF879
-	.4byte	.LASF879
+	.uleb128 0x7c
+	.4byte	.LASF877
+	.4byte	.LASF877
 	.byte	0x6
 	.byte	0x35
-	.uleb128 0x7c
-	.4byte	.LASF880
-	.4byte	.LASF880
+	.uleb128 0x7d
+	.4byte	.LASF878
+	.4byte	.LASF878
 	.byte	0x1c
 	.2byte	0x399
-	.uleb128 0x7b
-	.4byte	.LASF881
-	.4byte	.LASF881
+	.uleb128 0x7c
+	.4byte	.LASF879
+	.4byte	.LASF879
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -43767,18 +43778,16 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x67
-	.uleb128 0x1d
+	.uleb128 0xa
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.uleb128 0x58
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
 	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x3b
 	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
 	.byte	0
 	.byte	0
 	.uleb128 0x68
@@ -43797,15 +43806,6 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x69
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x6
-	.byte	0
-	.byte	0
-	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43824,7 +43824,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43835,7 +43835,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43852,7 +43852,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43877,7 +43877,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x6d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43894,21 +43894,21 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x6e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x6f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43917,7 +43917,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x71
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43934,7 +43934,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x72
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43943,14 +43943,14 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x73
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x75
+	.uleb128 0x74
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43965,7 +43965,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x76
+	.uleb128 0x75
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43974,7 +43974,31 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
+	.uleb128 0x76
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.byte	0
+	.byte	0
 	.uleb128 0x77
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x78
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43983,7 +44007,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x79
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -43992,7 +44016,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x79
+	.uleb128 0x7a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -44001,14 +44025,14 @@ __func__.9940:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x7a
+	.uleb128 0x7b
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x7b
+	.uleb128 0x7c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -44025,7 +44049,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x7c
+	.uleb128 0x7d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -44045,12 +44069,12 @@ __func__.9940:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST455:
-	.4byte	.LVL2071
-	.4byte	.LVL2072-1
+.LLST454:
+	.4byte	.LVL2060
+	.4byte	.LVL2061-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2072-1
+	.4byte	.LVL2061-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44059,12 +44083,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST456:
-	.4byte	.LVL2071
-	.4byte	.LVL2072-1
+.LLST455:
+	.4byte	.LVL2060
+	.4byte	.LVL2061-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL2072-1
+	.4byte	.LVL2061-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44073,12 +44097,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST457:
-	.4byte	.LVL2071
-	.4byte	.LVL2072-1
+.LLST456:
+	.4byte	.LVL2060
+	.4byte	.LVL2061-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2072-1
+	.4byte	.LVL2061-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44088,11 +44112,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST287:
-	.4byte	.LVL1161
-	.4byte	.LVL1162-1
+	.4byte	.LVL1169
+	.4byte	.LVL1170-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1162-1
+	.4byte	.LVL1170-1
 	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
@@ -44102,11 +44126,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST288:
-	.4byte	.LVL1161
-	.4byte	.LVL1162-1
+	.4byte	.LVL1169
+	.4byte	.LVL1170-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1162-1
+	.4byte	.LVL1170-1
 	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
@@ -44116,11 +44140,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST289:
-	.4byte	.LVL1161
-	.4byte	.LVL1162-1
+	.4byte	.LVL1169
+	.4byte	.LVL1170-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1162-1
+	.4byte	.LVL1170-1
 	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
@@ -44130,11 +44154,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST191:
-	.4byte	.LVL697
-	.4byte	.LVL698-1
+	.4byte	.LVL705
+	.4byte	.LVL706-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL698-1
+	.4byte	.LVL706-1
 	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
@@ -44144,11 +44168,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST192:
-	.4byte	.LVL697
-	.4byte	.LVL698-1
+	.4byte	.LVL705
+	.4byte	.LVL706-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL698-1
+	.4byte	.LVL706-1
 	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
@@ -44158,11 +44182,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST193:
-	.4byte	.LVL697
-	.4byte	.LVL698-1
+	.4byte	.LVL705
+	.4byte	.LVL706-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL698-1
+	.4byte	.LVL706-1
 	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
@@ -44172,63 +44196,63 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST284:
-	.4byte	.LVL1152
-	.4byte	.LVL1154-1
+	.4byte	.LVL1160
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1154-1
+	.4byte	.LVL1162-1
 	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST285:
-	.4byte	.LVL1152
-	.4byte	.LVL1153
+	.4byte	.LVL1160
+	.4byte	.LVL1161
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1153
+	.4byte	.LVL1161
 	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST286:
-	.4byte	.LVL1156
-	.4byte	.LVL1157
+	.4byte	.LVL1164
+	.4byte	.LVL1165
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1158
-	.4byte	.LVL1159
+	.4byte	.LVL1166
+	.4byte	.LVL1167
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1159
+	.4byte	.LVL1167
 	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST172:
-	.4byte	.LVL627
-	.4byte	.LVL628
+.LLST164:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST173:
-	.4byte	.LVL627
-	.4byte	.LVL628
+	.4byte	0
+	.4byte	0
+.LLST165:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -44237,34 +44261,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST174:
-	.4byte	.LVL627
-	.4byte	.LVL628
+.LLST166:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST175:
-	.4byte	.LVL631
-	.4byte	.LVL632
+.LLST167:
+	.4byte	.LVL621
+	.4byte	.LVL622
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL633
+	.4byte	.LVL623
 	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST176:
-	.4byte	.LVL627
-	.4byte	.LVL628
+.LLST168:
+	.4byte	.LVL617
+	.4byte	.LVL618
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL628
+	.4byte	.LVL618
 	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -44273,71 +44297,71 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST164:
-	.4byte	.LVL604
-	.4byte	.LVL607
+.LLST156:
+	.4byte	.LVL594
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL608
-	.4byte	.LVL610
+	.4byte	.LVL598
+	.4byte	.LVL600
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL624
+	.4byte	.LVL614
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST165:
-	.4byte	.LVL604
-	.4byte	.LVL607
+.LLST157:
+	.4byte	.LVL594
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL608
-	.4byte	.LVL610
+	.4byte	.LVL598
+	.4byte	.LVL600
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL624
-	.4byte	.LVL626
+	.4byte	.LVL614
+	.4byte	.LVL616
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL626
+	.4byte	.LVL616
 	.4byte	.LFE345
 	.2byte	0x4
 	.byte	0xf3
@@ -44346,128 +44370,128 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST166:
-	.4byte	.LVL604
-	.4byte	.LVL607
+.LLST158:
+	.4byte	.LVL594
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL607
+	.4byte	.LVL597
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST167:
-	.4byte	.LVL604
-	.4byte	.LVL605
+.LLST159:
+	.4byte	.LVL594
+	.4byte	.LVL595
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL605
-	.4byte	.LVL609
+	.4byte	.LVL595
+	.4byte	.LVL599
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL609
-	.4byte	.LVL610
+	.4byte	.LVL599
+	.4byte	.LVL600
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL610
+	.4byte	.LVL600
 	.4byte	.LFE345
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST168:
-	.4byte	.LVL606
-	.4byte	.LVL607
+.LLST160:
+	.4byte	.LVL596
+	.4byte	.LVL597
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL624
+	.4byte	.LVL614
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST169:
-	.4byte	.LVL613
-	.4byte	.LVL614
+.LLST161:
+	.4byte	.LVL603
+	.4byte	.LVL604
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL615
-	.4byte	.LVL617
+	.4byte	.LVL605
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST170:
-	.4byte	.LVL606
-	.4byte	.LVL608
+.LLST162:
+	.4byte	.LVL596
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL624
-	.4byte	.LVL625
+	.4byte	.LVL614
+	.4byte	.LVL615
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST171:
-	.4byte	.LVL606
-	.4byte	.LVL607
+.LLST163:
+	.4byte	.LVL596
+	.4byte	.LVL597
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL597
+	.4byte	.LVL598
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL608
-	.4byte	.LVL610
+	.4byte	.LVL598
+	.4byte	.LVL600
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL610
-	.4byte	.LVL617
+	.4byte	.LVL600
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL617
-	.4byte	.LVL624
+	.4byte	.LVL607
+	.4byte	.LVL614
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL624
+	.4byte	.LVL614
 	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST153:
-	.4byte	.LVL564
-	.4byte	.LVL566
+.LLST145:
+	.4byte	.LVL554
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL566
+	.4byte	.LVL556
 	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
@@ -44476,23 +44500,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST154:
-	.4byte	.LVL564
-	.4byte	.LVL566
+.LLST146:
+	.4byte	.LVL554
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL566
+	.4byte	.LVL556
 	.4byte	.LFE344
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST155:
-	.4byte	.LVL564
-	.4byte	.LVL565
+.LLST147:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL565
+	.4byte	.LVL555
 	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
@@ -44501,239 +44525,239 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST156:
-	.4byte	.LVL570
-	.4byte	.LVL571
+.LLST148:
+	.4byte	.LVL560
+	.4byte	.LVL561
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL571
-	.4byte	.LVL572-1
+	.4byte	.LVL561
+	.4byte	.LVL562-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.4byte	.LVL572
-	.4byte	.LVL573
+	.4byte	.LVL562
+	.4byte	.LVL563
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL573
-	.4byte	.LVL574
+	.4byte	.LVL563
+	.4byte	.LVL564
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST144:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST136:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST145:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST137:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST146:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST138:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST147:
-	.4byte	.LVL553
-	.4byte	.LVL555
+.LLST139:
+	.4byte	.LVL543
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST148:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST140:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST149:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST141:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL557
-	.4byte	.LVL559
+	.4byte	.LVL547
+	.4byte	.LVL549
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL559
-	.4byte	.LVL560
+	.4byte	.LVL549
+	.4byte	.LVL550
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL560
-	.4byte	.LVL561
+	.4byte	.LVL550
+	.4byte	.LVL551
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL561
-	.4byte	.LVL562
+	.4byte	.LVL551
+	.4byte	.LVL552
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL562
+	.4byte	.LVL552
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST150:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST142:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST151:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST143:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST152:
-	.4byte	.LVL554
-	.4byte	.LVL555
+.LLST144:
+	.4byte	.LVL544
+	.4byte	.LVL545
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL555
-	.4byte	.LVL556
+	.4byte	.LVL545
+	.4byte	.LVL546
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL556
-	.4byte	.LVL557
+	.4byte	.LVL546
+	.4byte	.LVL547
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL557
+	.4byte	.LVL547
 	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST143:
-	.4byte	.LVL551
-	.4byte	.LVL552-1
+.LLST135:
+	.4byte	.LVL541
+	.4byte	.LVL542-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL552-1
+	.4byte	.LVL542-1
 	.4byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -44742,12 +44766,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST141:
-	.4byte	.LVL549
-	.4byte	.LVL550-1
+.LLST133:
+	.4byte	.LVL539
+	.4byte	.LVL540-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL550-1
+	.4byte	.LVL540-1
 	.4byte	.LFE340
 	.2byte	0x4
 	.byte	0xf3
@@ -44756,12 +44780,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST142:
-	.4byte	.LVL549
-	.4byte	.LVL550-1
+.LLST134:
+	.4byte	.LVL539
+	.4byte	.LVL540-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL550-1
+	.4byte	.LVL540-1
 	.4byte	.LFE340
 	.2byte	0x4
 	.byte	0xf3
@@ -44770,12 +44794,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST138:
-	.4byte	.LVL536
-	.4byte	.LVL537-1
+.LLST130:
+	.4byte	.LVL526
+	.4byte	.LVL527-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL537-1
+	.4byte	.LVL527-1
 	.4byte	.LFE318
 	.2byte	0x4
 	.byte	0xf3
@@ -44784,43 +44808,43 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST139:
-	.4byte	.LVL540
-	.4byte	.LVL541
+.LLST131:
+	.4byte	.LVL530
+	.4byte	.LVL531
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL541
-	.4byte	.LVL542
+	.4byte	.LVL531
+	.4byte	.LVL532
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL542
-	.4byte	.LVL543
+	.4byte	.LVL532
+	.4byte	.LVL533
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL543
-	.4byte	.LVL544
+	.4byte	.LVL533
+	.4byte	.LVL534
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL544
-	.4byte	.LVL545
+	.4byte	.LVL534
+	.4byte	.LVL535
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST140:
-	.4byte	.LVL538
-	.4byte	.LVL546
+.LLST132:
+	.4byte	.LVL528
+	.4byte	.LVL536
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST137:
-	.4byte	.LVL533
-	.4byte	.LVL534
+.LLST129:
+	.4byte	.LVL523
+	.4byte	.LVL524
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL534
+	.4byte	.LVL524
 	.4byte	.LFE317
 	.2byte	0x4
 	.byte	0xf3
@@ -44829,42 +44853,42 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST396:
-	.4byte	.LVL1699
-	.4byte	.LVL1702
+.LLST395:
+	.4byte	.LVL1703
+	.4byte	.LVL1706
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1707
+	.4byte	.LVL1711
 	.4byte	.LFE316
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST397:
-	.4byte	.LVL1706
-	.4byte	.LVL1707-1
+.LLST396:
+	.4byte	.LVL1710
+	.4byte	.LVL1711-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST271:
-	.4byte	.LVL1098
-	.4byte	.LVL1100-1
+	.4byte	.LVL1106
+	.4byte	.LVL1108-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1100-1
-	.4byte	.LVL1101
+	.4byte	.LVL1108-1
+	.4byte	.LVL1109
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1101
-	.4byte	.LVL1103
+	.4byte	.LVL1109
+	.4byte	.LVL1111
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1103
-	.4byte	.LVL1140
+	.4byte	.LVL1111
+	.4byte	.LVL1148
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1140
+	.4byte	.LVL1148
 	.4byte	.LFE313
 	.2byte	0x4
 	.byte	0xf3
@@ -44874,25 +44898,25 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST272:
-	.4byte	.LVL1098
-	.4byte	.LVL1100-1
+	.4byte	.LVL1106
+	.4byte	.LVL1108-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1100-1
-	.4byte	.LVL1101
+	.4byte	.LVL1108-1
+	.4byte	.LVL1109
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1101
-	.4byte	.LVL1103
+	.4byte	.LVL1109
+	.4byte	.LVL1111
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1103
-	.4byte	.LVL1140
+	.4byte	.LVL1111
+	.4byte	.LVL1148
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1140
+	.4byte	.LVL1148
 	.4byte	.LFE313
 	.2byte	0x2
 	.byte	0x7d
@@ -44900,72 +44924,72 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST273:
-	.4byte	.LVL1114
-	.4byte	.LVL1115
+	.4byte	.LVL1122
+	.4byte	.LVL1123
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1115
-	.4byte	.LVL1120
+	.4byte	.LVL1123
+	.4byte	.LVL1128
 	.2byte	0x2
 	.byte	0x7c
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
 .LLST274:
-	.4byte	.LVL1106
-	.4byte	.LVL1107
+	.4byte	.LVL1114
+	.4byte	.LVL1115
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1107
-	.4byte	.LVL1116
+	.4byte	.LVL1115
+	.4byte	.LVL1124
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1117
-	.4byte	.LVL1126
+	.4byte	.LVL1125
+	.4byte	.LVL1134
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1129
-	.4byte	.LVL1139
+	.4byte	.LVL1137
+	.4byte	.LVL1147
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST275:
-	.4byte	.LVL1109
-	.4byte	.LVL1113
+	.4byte	.LVL1117
+	.4byte	.LVL1121
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1120
-	.4byte	.LVL1123
+	.4byte	.LVL1128
+	.4byte	.LVL1131
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1131
 	.4byte	.LVL1139
+	.4byte	.LVL1147
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST276:
-	.4byte	.LVL1106
-	.4byte	.LVL1107
+	.4byte	.LVL1114
+	.4byte	.LVL1115
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1107
-	.4byte	.LVL1108
+	.4byte	.LVL1115
+	.4byte	.LVL1116
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1108
-	.4byte	.LVL1109-1
+	.4byte	.LVL1116
+	.4byte	.LVL1117-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1113
-	.4byte	.LVL1118
+	.4byte	.LVL1121
+	.4byte	.LVL1126
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1118
-	.4byte	.LVL1119
+	.4byte	.LVL1126
+	.4byte	.LVL1127
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
@@ -44973,134 +44997,134 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST277:
-	.4byte	.LVL1105
-	.4byte	.LVL1109
+	.4byte	.LVL1113
+	.4byte	.LVL1117
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1112
 	.4byte	.LVL1120
+	.4byte	.LVL1128
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1122
-	.4byte	.LVL1127
+	.4byte	.LVL1130
+	.4byte	.LVL1135
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1129
-	.4byte	.LVL1130
+	.4byte	.LVL1137
+	.4byte	.LVL1138
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1132
-	.4byte	.LVL1134
+	.4byte	.LVL1140
+	.4byte	.LVL1142
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1138
-	.4byte	.LVL1139
+	.4byte	.LVL1146
+	.4byte	.LVL1147
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST278:
-	.4byte	.LVL1099
-	.4byte	.LVL1111
+	.4byte	.LVL1107
+	.4byte	.LVL1119
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1112
-	.4byte	.LVL1133
+	.4byte	.LVL1120
+	.4byte	.LVL1141
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1136
-	.4byte	.LVL1138
+	.4byte	.LVL1144
+	.4byte	.LVL1146
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1138
-	.4byte	.LVL1140
+	.4byte	.LVL1146
+	.4byte	.LVL1148
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST279:
-	.4byte	.LVL1121
-	.4byte	.LVL1122-1
+	.4byte	.LVL1129
+	.4byte	.LVL1130-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1122-1
-	.4byte	.LVL1126
+	.4byte	.LVL1130-1
+	.4byte	.LVL1134
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1129
-	.4byte	.LVL1131-1
+	.4byte	.LVL1137
+	.4byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1131-1
-	.4byte	.LVL1138
+	.4byte	.LVL1139-1
+	.4byte	.LVL1146
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
 .LLST280:
-	.4byte	.LVL1098
-	.4byte	.LVL1104
+	.4byte	.LVL1106
+	.4byte	.LVL1112
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1104
-	.4byte	.LVL1110
+	.4byte	.LVL1112
+	.4byte	.LVL1118
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1110
-	.4byte	.LVL1112
+	.4byte	.LVL1118
+	.4byte	.LVL1120
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1112
-	.4byte	.LVL1140
+	.4byte	.LVL1120
+	.4byte	.LVL1148
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST281:
-	.4byte	.LVL1124
-	.4byte	.LVL1125
+	.4byte	.LVL1132
+	.4byte	.LVL1133
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1125
-	.4byte	.LVL1126
+	.4byte	.LVL1133
+	.4byte	.LVL1134
 	.2byte	0x5
 	.byte	0x91
 	.sleb128 -44
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0xc
-	.4byte	.LVL1129
-	.4byte	.LVL1131-1
+	.4byte	.LVL1137
+	.4byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST391:
-	.4byte	.LVL1655
-	.4byte	.LVL1657
+.LLST390:
+	.4byte	.LVL1660
+	.4byte	.LVL1662
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1657
-	.4byte	.LVL1658
+	.4byte	.LVL1662
+	.4byte	.LVL1663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1658
-	.4byte	.LVL1660
+	.4byte	.LVL1663
+	.4byte	.LVL1665
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1660
+	.4byte	.LVL1665
 	.4byte	.LFE311
 	.2byte	0x4
 	.byte	0xf3
@@ -45109,89 +45133,89 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST392:
-	.4byte	.LVL1668
-	.4byte	.LVL1671
+.LLST391:
+	.4byte	.LVL1673
+	.4byte	.LVL1675
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1671
-	.4byte	.LVL1674
+	.4byte	.LVL1675
+	.4byte	.LVL1678
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1677
-	.4byte	.LVL1685
+	.4byte	.LVL1681
+	.4byte	.LVL1689
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1685
-	.4byte	.LVL1686
+	.4byte	.LVL1689
+	.4byte	.LVL1690
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1687
+	.4byte	.LVL1691
 	.4byte	.LFE311
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST393:
-	.4byte	.LVL1661
+.LLST392:
 	.4byte	.LVL1666
+	.4byte	.LVL1671
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1667
-	.4byte	.LVL1668
+	.4byte	.LVL1672
+	.4byte	.LVL1673
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1682
-	.4byte	.LVL1684
+	.4byte	.LVL1686
+	.4byte	.LVL1688
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST394:
-	.4byte	.LVL1656
-	.4byte	.LVL1657
+.LLST393:
+	.4byte	.LVL1661
+	.4byte	.LVL1662
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1658
-	.4byte	.LVL1659
+	.4byte	.LVL1663
+	.4byte	.LVL1664
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1659
-	.4byte	.LVL1661
+	.4byte	.LVL1664
+	.4byte	.LVL1666
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.4byte	.LVL1661
-	.4byte	.LVL1662-1
+	.4byte	.LVL1666
+	.4byte	.LVL1667-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1666
-	.4byte	.LVL1667
+	.4byte	.LVL1671
+	.4byte	.LVL1672
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST395:
-	.4byte	.LVL1678
-	.4byte	.LVL1688
+.LLST394:
+	.4byte	.LVL1682
+	.4byte	.LVL1692
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST132:
-	.4byte	.LVL525
-	.4byte	.LVL526
+.LLST124:
+	.4byte	.LVL515
+	.4byte	.LVL516
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL526
-	.4byte	.LVL532
+	.4byte	.LVL516
+	.4byte	.LVL522
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL532
+	.4byte	.LVL522
 	.4byte	.LFE310
 	.2byte	0x5
 	.byte	0x71
@@ -45201,16 +45225,16 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST133:
-	.4byte	.LVL525
-	.4byte	.LVL527-1
+.LLST125:
+	.4byte	.LVL515
+	.4byte	.LVL517-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL527-1
-	.4byte	.LVL532
+	.4byte	.LVL517-1
+	.4byte	.LVL522
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL532
+	.4byte	.LVL522
 	.4byte	.LFE310
 	.2byte	0x7
 	.byte	0x71
@@ -45222,16 +45246,16 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST134:
-	.4byte	.LVL525
-	.4byte	.LVL527-1
+.LLST126:
+	.4byte	.LVL515
+	.4byte	.LVL517-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL527-1
-	.4byte	.LVL532
+	.4byte	.LVL517-1
+	.4byte	.LVL522
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL532
+	.4byte	.LVL522
 	.4byte	.LFE310
 	.2byte	0x7
 	.byte	0x71
@@ -45243,42 +45267,42 @@ __func__.9940:
 	.uleb128 0x8
 	.4byte	0
 	.4byte	0
-.LLST135:
-	.4byte	.LVL527
-	.4byte	.LVL531
+.LLST127:
+	.4byte	.LVL517
+	.4byte	.LVL521
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST136:
-	.4byte	.LVL527
-	.4byte	.LVL528
+.LLST128:
+	.4byte	.LVL517
+	.4byte	.LVL518
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL529
-	.4byte	.LVL530
+	.4byte	.LVL519
+	.4byte	.LVL520
 	.2byte	0x1
 	.byte	0x5c
 	.4byte	0
 	.4byte	0
-.LLST130:
-	.4byte	.LVL520
-	.4byte	.LVL522
+.LLST122:
+	.4byte	.LVL510
+	.4byte	.LVL512
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL522
-	.4byte	.LVL523
+	.4byte	.LVL512
+	.4byte	.LVL513
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL523
-	.4byte	.LVL524
+	.4byte	.LVL513
+	.4byte	.LVL514
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL524
+	.4byte	.LVL514
 	.4byte	.LFE309
 	.2byte	0x4
 	.byte	0xf3
@@ -45287,109 +45311,109 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST131:
-	.4byte	.LVL520
-	.4byte	.LVL521
+.LLST123:
+	.4byte	.LVL510
+	.4byte	.LVL511
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST128:
-	.4byte	.LVL516
-	.4byte	.LVL517
+.LLST120:
+	.4byte	.LVL506
+	.4byte	.LVL507
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST129:
-	.4byte	.LVL514
-	.4byte	.LVL515
+.LLST121:
+	.4byte	.LVL504
+	.4byte	.LVL505
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL515
-	.4byte	.LVL518
+	.4byte	.LVL505
+	.4byte	.LVL508
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL518
-	.4byte	.LVL519
+	.4byte	.LVL508
+	.4byte	.LVL509
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST126:
-	.4byte	.LVL508
-	.4byte	.LVL509
+.LLST118:
+	.4byte	.LVL498
+	.4byte	.LVL499
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST127:
-	.4byte	.LVL506
-	.4byte	.LVL507
+.LLST119:
+	.4byte	.LVL496
+	.4byte	.LVL497
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL507
-	.4byte	.LVL510
+	.4byte	.LVL497
+	.4byte	.LVL500
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL510
-	.4byte	.LVL511
+	.4byte	.LVL500
+	.4byte	.LVL501
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL512
-	.4byte	.LVL513
+	.4byte	.LVL502
+	.4byte	.LVL503
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL513
+	.4byte	.LVL503
 	.4byte	.LFE307
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST125:
-	.4byte	.LVL499
-	.4byte	.LVL500
+.LLST117:
+	.4byte	.LVL489
+	.4byte	.LVL490
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL501
-	.4byte	.LVL502
+	.4byte	.LVL491
+	.4byte	.LVL492
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL503
-	.4byte	.LVL504
+	.4byte	.LVL493
+	.4byte	.LVL494
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL505
+	.4byte	.LVL495
 	.4byte	.LFE306
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
 .LLST309:
-	.4byte	.LVL1257
-	.4byte	.LVL1258
+	.4byte	.LVL1265
+	.4byte	.LVL1266
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1258
-	.4byte	.LVL1264
+	.4byte	.LVL1266
+	.4byte	.LVL1272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1264
-	.4byte	.LVL1265
+	.4byte	.LVL1272
+	.4byte	.LVL1273
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1265
+	.4byte	.LVL1273
 	.4byte	.LFE305
 	.2byte	0x4
 	.byte	0xf3
@@ -45399,61 +45423,61 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST310:
-	.4byte	.LVL1257
-	.4byte	.LVL1260
+	.4byte	.LVL1265
+	.4byte	.LVL1268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1261
-	.4byte	.LVL1262
+	.4byte	.LVL1269
+	.4byte	.LVL1270
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1264
-	.4byte	.LVL1267
+	.4byte	.LVL1272
+	.4byte	.LVL1275
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1267
+	.4byte	.LVL1275
 	.4byte	.LFE305
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST122:
-	.4byte	.LVL488
-	.4byte	.LVL489
+.LLST114:
+	.4byte	.LVL478
+	.4byte	.LVL479
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL489
+	.4byte	.LVL479
 	.4byte	.LFE303
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST123:
-	.4byte	.LVL493
-	.4byte	.LVL495
+.LLST115:
+	.4byte	.LVL483
+	.4byte	.LVL485
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL497
+	.4byte	.LVL487
 	.4byte	.LFE303
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST124:
-	.4byte	.LVL488
-	.4byte	.LVL494
+.LLST116:
+	.4byte	.LVL478
+	.4byte	.LVL484
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL494
-	.4byte	.LVL497
+	.4byte	.LVL484
+	.4byte	.LVL487
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL497
+	.4byte	.LVL487
 	.4byte	.LFE303
 	.2byte	0x3
 	.byte	0x9
@@ -45461,27 +45485,27 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST376:
-	.4byte	.LVL1592
-	.4byte	.LVL1594
+.LLST381:
+	.4byte	.LVL1626
+	.4byte	.LVL1628
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1594
+	.4byte	.LVL1628
 	.4byte	.LFE302
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST294:
-	.4byte	.LVL1184
-	.4byte	.LVL1185
+	.4byte	.LVL1192
+	.4byte	.LVL1193
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1185
-	.4byte	.LVL1225
+	.4byte	.LVL1193
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1225
+	.4byte	.LVL1233
 	.4byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -45491,61 +45515,61 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST295:
-	.4byte	.LVL1191
-	.4byte	.LVL1196
+	.4byte	.LVL1199
+	.4byte	.LVL1204
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1197
-	.4byte	.LVL1225
+	.4byte	.LVL1205
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST296:
-	.4byte	.LVL1199
-	.4byte	.LVL1212
+	.4byte	.LVL1207
+	.4byte	.LVL1220
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1213
-	.4byte	.LVL1225
+	.4byte	.LVL1221
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST297:
-	.4byte	.LVL1204
-	.4byte	.LVL1205
+	.4byte	.LVL1212
+	.4byte	.LVL1213
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1206
-	.4byte	.LVL1207
+	.4byte	.LVL1214
+	.4byte	.LVL1215
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1207
-	.4byte	.LVL1211
+	.4byte	.LVL1215
+	.4byte	.LVL1219
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1217
-	.4byte	.LVL1221
+	.4byte	.LVL1225
+	.4byte	.LVL1229
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1221
-	.4byte	.LVL1222
+	.4byte	.LVL1229
+	.4byte	.LVL1230
 	.2byte	0x3
 	.byte	0x7a
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1223
-	.4byte	.LVL1225
+	.4byte	.LVL1231
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST298:
-	.4byte	.LVL1219
-	.4byte	.LVL1220-1
+	.4byte	.LVL1227
+	.4byte	.LVL1228-1
 	.2byte	0x6
 	.byte	0x7c
 	.sleb128 4
@@ -45556,210 +45580,235 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST299:
-	.4byte	.LVL1206
-	.4byte	.LVL1207
+	.4byte	.LVL1214
+	.4byte	.LVL1215
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1207
-	.4byte	.LVL1208-1
+	.4byte	.LVL1215
+	.4byte	.LVL1216-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1217
-	.4byte	.LVL1218
+	.4byte	.LVL1225
+	.4byte	.LVL1226
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1218
-	.4byte	.LVL1219
+	.4byte	.LVL1226
+	.4byte	.LVL1227
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1219
-	.4byte	.LVL1220-1
+	.4byte	.LVL1227
+	.4byte	.LVL1228-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1220-1
-	.4byte	.LVL1221
+	.4byte	.LVL1228-1
+	.4byte	.LVL1229
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL1221
-	.4byte	.LVL1223
+	.4byte	.LVL1229
+	.4byte	.LVL1231
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST300:
-	.4byte	.LVL1184
-	.4byte	.LVL1185
+	.4byte	.LVL1192
+	.4byte	.LVL1193
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1188
+	.4byte	.LVL1195
+	.4byte	.LVL1196
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1188
-	.4byte	.LVL1189
+	.4byte	.LVL1196
+	.4byte	.LVL1197
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1189
-	.4byte	.LVL1190-1
+	.4byte	.LVL1197
+	.4byte	.LVL1198-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST301:
-	.4byte	.LVL1214
-	.4byte	.LVL1216
+	.4byte	.LVL1222
+	.4byte	.LVL1224
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST302:
-	.4byte	.LVL1214
-	.4byte	.LVL1216
+	.4byte	.LVL1222
+	.4byte	.LVL1224
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST113:
-	.4byte	.LVL457
-	.4byte	.LVL462
+.LLST104:
+	.4byte	.LVL445
+	.4byte	.LVL450
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL473
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL481
-	.4byte	.LVL483
+	.4byte	.LVL471
+	.4byte	.LVL473
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST114:
-	.4byte	.LVL457
-	.4byte	.LVL462
+.LLST105:
+	.4byte	.LVL445
+	.4byte	.LVL450
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL473
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL474
-	.4byte	.LVL479
+	.4byte	.LVL462
+	.4byte	.LVL467
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST115:
-	.4byte	.LVL457
-	.4byte	.LVL462
+.LLST106:
+	.4byte	.LVL445
+	.4byte	.LVL450
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL463
-	.4byte	.LVL473
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL473
-	.4byte	.LVL477
+	.4byte	.LVL461
+	.4byte	.LVL465
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL479
-	.4byte	.LVL482
+	.4byte	.LVL467
+	.4byte	.LVL472
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL483
+	.4byte	.LVL473
 	.4byte	.LFE299
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST116:
-	.4byte	.LVL473
-	.4byte	.LVL474
+.LLST107:
+	.4byte	.LVL461
+	.4byte	.LVL462
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL479
-	.4byte	.LVL480
+	.4byte	.LVL467
+	.4byte	.LVL470
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL484
+	.4byte	.LVL474
 	.4byte	.LFE299
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST117:
-	.4byte	.LVL471
-	.4byte	.LVL472
+.LLST108:
+	.4byte	.LVL459
+	.4byte	.LVL460
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST118:
-	.4byte	.LVL475
-	.4byte	.LVL479
+.LLST109:
+	.4byte	.LVL463
+	.4byte	.LVL467
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST119:
-	.4byte	.LVL458
-	.4byte	.LVL459
+.LLST110:
+	.4byte	.LVL446
+	.4byte	.LVL447
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL459
-	.4byte	.LVL460-1
+	.4byte	.LVL447
+	.4byte	.LVL448-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL463
-	.4byte	.LVL465
+	.4byte	.LVL451
+	.4byte	.LVL453
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL466
-	.4byte	.LVL467
+	.4byte	.LVL454
+	.4byte	.LVL455
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL455
+	.4byte	.LVL457
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST111:
+	.4byte	.LVL445
+	.4byte	.LVL450
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL451
+	.4byte	.LVL461
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
+	.4byte	.LVL461
+	.4byte	.LVL464-1
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL467
+	.4byte	.LVL468
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL469
+	.4byte	.LFE299
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST102:
-	.4byte	.LVL292
-	.4byte	.LVL293
+.LLST93:
+	.4byte	.LVL280
+	.4byte	.LVL281
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL293
-	.4byte	.LVL296
+	.4byte	.LVL281
+	.4byte	.LVL284
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL297
-	.4byte	.LVL299
+	.4byte	.LVL285
+	.4byte	.LVL287
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL299
+	.4byte	.LVL287
 	.4byte	.LFE298
 	.2byte	0x4
 	.byte	0xf3
@@ -45768,59 +45817,59 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST103:
-	.4byte	.LVL292
-	.4byte	.LVL296
+.LLST94:
+	.4byte	.LVL280
+	.4byte	.LVL284
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL296
-	.4byte	.LVL297
+	.4byte	.LVL284
+	.4byte	.LVL285
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL297
-	.4byte	.LVL299
+	.4byte	.LVL285
+	.4byte	.LVL287
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL299
+	.4byte	.LVL287
 	.4byte	.LFE298
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST104:
-	.4byte	.LVL294
-	.4byte	.LVL298
+.LLST95:
+	.4byte	.LVL282
+	.4byte	.LVL286
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST105:
-	.4byte	.LVL294
-	.4byte	.LVL295
+.LLST96:
+	.4byte	.LVL282
+	.4byte	.LVL283
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
-	.4byte	0
-.LLST101:
-	.4byte	.LVL290
-	.4byte	.LVL291
+	.4byte	0
+.LLST92:
+	.4byte	.LVL278
+	.4byte	.LVL279
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL291
+	.4byte	.LVL279
 	.4byte	.LFE297
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST97:
-	.4byte	.LVL279
-	.4byte	.LVL280
+.LLST88:
+	.4byte	.LVL267
+	.4byte	.LVL268
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL280
+	.4byte	.LVL268
 	.4byte	.LFE296
 	.2byte	0x4
 	.byte	0xf3
@@ -45829,91 +45878,91 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST98:
-	.4byte	.LVL279
-	.4byte	.LVL280
+.LLST89:
+	.4byte	.LVL267
+	.4byte	.LVL268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL280
-	.4byte	.LVL287
+	.4byte	.LVL268
+	.4byte	.LVL275
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL287
-	.4byte	.LVL288
+	.4byte	.LVL275
+	.4byte	.LVL276
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL289
+	.4byte	.LVL277
 	.4byte	.LFE296
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST99:
-	.4byte	.LVL284
-	.4byte	.LVL285-1
+.LLST90:
+	.4byte	.LVL272
+	.4byte	.LVL273-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST100:
-	.4byte	.LVL279
-	.4byte	.LVL280
+.LLST91:
+	.4byte	.LVL267
+	.4byte	.LVL268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL280
-	.4byte	.LVL281
+	.4byte	.LVL268
+	.4byte	.LVL269
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL281
-	.4byte	.LVL282
+	.4byte	.LVL269
+	.4byte	.LVL270
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL282
-	.4byte	.LVL283
+	.4byte	.LVL270
+	.4byte	.LVL271
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 4
-	.4byte	.LVL283
-	.4byte	.LVL286
+	.4byte	.LVL271
+	.4byte	.LVL274
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL287
+	.4byte	.LVL275
 	.4byte	.LFE296
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST239:
-	.4byte	.LVL913
-	.4byte	.LVL915
+	.4byte	.LVL921
+	.4byte	.LVL923
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST266:
-	.4byte	.LVL1076
-	.4byte	.LVL1077
+	.4byte	.LVL1084
+	.4byte	.LVL1085
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1079
-	.4byte	.LVL1082
+	.4byte	.LVL1087
+	.4byte	.LVL1090
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1091
-	.4byte	.LVL1093
+	.4byte	.LVL1099
+	.4byte	.LVL1101
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1093
-	.4byte	.LVL1094
+	.4byte	.LVL1101
+	.4byte	.LVL1102
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1094
+	.4byte	.LVL1102
 	.4byte	.LFE293
 	.2byte	0x3
 	.byte	0x75
@@ -45922,80 +45971,80 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST267:
-	.4byte	.LVL1074
-	.4byte	.LVL1075
+	.4byte	.LVL1082
+	.4byte	.LVL1083
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1086
-	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.4byte	.LVL1099
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST268:
-	.4byte	.LVL1079
-	.4byte	.LVL1081
+	.4byte	.LVL1087
+	.4byte	.LVL1089
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1088
-	.4byte	.LVL1089
+	.4byte	.LVL1096
+	.4byte	.LVL1097
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST269:
-	.4byte	.LVL1072
-	.4byte	.LVL1076
+	.4byte	.LVL1080
+	.4byte	.LVL1084
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1076
-	.4byte	.LVL1079
+	.4byte	.LVL1084
+	.4byte	.LVL1087
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1083
-	.4byte	.LVL1084
+	.4byte	.LVL1091
+	.4byte	.LVL1092
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1084
-	.4byte	.LVL1085
+	.4byte	.LVL1092
+	.4byte	.LVL1093
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1086
-	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.4byte	.LVL1099
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1091
+	.4byte	.LVL1099
 	.4byte	.LFE293
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST270:
-	.4byte	.LVL1078
-	.4byte	.LVL1083
+	.4byte	.LVL1086
+	.4byte	.LVL1091
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST373:
-	.4byte	.LVL1580
-	.4byte	.LVL1581
+.LLST378:
+	.4byte	.LVL1614
+	.4byte	.LVL1615
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1586
-	.4byte	.LVL1590
+	.4byte	.LVL1620
+	.4byte	.LVL1624
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1590
-	.4byte	.LVL1591
+	.4byte	.LVL1624
+	.4byte	.LVL1625
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1591
+	.4byte	.LVL1625
 	.4byte	.LFE292
 	.2byte	0x3
 	.byte	0x76
@@ -46003,145 +46052,133 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST374:
-	.4byte	.LVL1578
-	.4byte	.LVL1579
+.LLST379:
+	.4byte	.LVL1612
+	.4byte	.LVL1613
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1581
-	.4byte	.LVL1586
+	.4byte	.LVL1615
+	.4byte	.LVL1620
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST375:
-	.4byte	.LVL1583
-	.4byte	.LVL1584
+.LLST380:
+	.4byte	.LVL1617
+	.4byte	.LVL1618
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST341:
-	.4byte	.LVL1425
-	.4byte	.LVL1426
+	.4byte	.LVL1433
+	.4byte	.LVL1435
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1426
+	.4byte	.LVL1435
 	.4byte	.LFE291
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST342:
-	.4byte	.LVL1432
-	.4byte	.LVL1433
-	.2byte	0x1
-	.byte	0x51
 	.4byte	.LVL1433
-	.4byte	.LVL1434-1
-	.2byte	0x5
-	.byte	0x3
-	.4byte	p_sys_spare_buf
-	.4byte	0
-	.4byte	0
-.LLST343:
-	.4byte	.LVL1425
-	.4byte	.LVL1426
+	.4byte	.LVL1435
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL1426
-	.4byte	.LVL1427
+	.4byte	.LVL1435
+	.4byte	.LVL1436
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1427
-	.4byte	.LVL1428
+	.4byte	.LVL1436
+	.4byte	.LVL1437
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1428
-	.4byte	.LVL1429
+	.4byte	.LVL1437
+	.4byte	.LVL1438
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1430
+	.4byte	.LVL1439
 	.4byte	.LFE291
 	.2byte	0x3
-	.byte	0x75
+	.byte	0x77
 	.sleb128 -2
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST260:
-	.4byte	.LVL1050
-	.4byte	.LVL1061
+	.4byte	.LVL1058
+	.4byte	.LVL1069
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1061
-	.4byte	.LVL1062
+	.4byte	.LVL1069
+	.4byte	.LVL1070
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1062
-	.4byte	.LVL1063
+	.4byte	.LVL1070
+	.4byte	.LVL1071
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1063
 	.4byte	.LVL1071
+	.4byte	.LVL1079
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST261:
-	.4byte	.LVL1051
-	.4byte	.LVL1052-1
+	.4byte	.LVL1059
+	.4byte	.LVL1060-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1055
-	.4byte	.LVL1056
+	.4byte	.LVL1063
+	.4byte	.LVL1064
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1056
-	.4byte	.LVL1057-1
+	.4byte	.LVL1064
+	.4byte	.LVL1065-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1063
-	.4byte	.LVL1064
+	.4byte	.LVL1071
+	.4byte	.LVL1072
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST262:
-	.4byte	.LVL1052
-	.4byte	.LVL1053-1
+	.4byte	.LVL1060
+	.4byte	.LVL1061-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST263:
-	.4byte	.LVL1051
-	.4byte	.LVL1054
+	.4byte	.LVL1059
+	.4byte	.LVL1062
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1055
-	.4byte	.LVL1057
+	.4byte	.LVL1063
+	.4byte	.LVL1065
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1057
-	.4byte	.LVL1059
+	.4byte	.LVL1065
+	.4byte	.LVL1067
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1059
-	.4byte	.LVL1061-1
+	.4byte	.LVL1067
+	.4byte	.LVL1069-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46152,16 +46189,16 @@ __func__.9940:
 	.byte	0x22
 	.byte	0x23
 	.uleb128 0x4
-	.4byte	.LVL1063
-	.4byte	.LVL1064
+	.4byte	.LVL1071
+	.4byte	.LVL1072
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1064
-	.4byte	.LVL1066
+	.4byte	.LVL1072
+	.4byte	.LVL1074
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1066
-	.4byte	.LVL1068-1
+	.4byte	.LVL1074
+	.4byte	.LVL1076-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46175,50 +46212,50 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST264:
-	.4byte	.LVL1050
-	.4byte	.LVL1065
+	.4byte	.LVL1058
+	.4byte	.LVL1073
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1067
-	.4byte	.LVL1069
+	.4byte	.LVL1075
+	.4byte	.LVL1077
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1069
-	.4byte	.LVL1070-1
+	.4byte	.LVL1077
+	.4byte	.LVL1078-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
 	.4byte	0
 	.4byte	0
 .LLST265:
-	.4byte	.LVL1050
 	.4byte	.LVL1058
+	.4byte	.LVL1066
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1060
-	.4byte	.LVL1071
+	.4byte	.LVL1068
+	.4byte	.LVL1079
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST95:
-	.4byte	.LVL269
-	.4byte	.LVL270
+.LLST86:
+	.4byte	.LVL257
+	.4byte	.LVL258
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL270
+	.4byte	.LVL258
 	.4byte	.LFE287
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST96:
-	.4byte	.LVL272
-	.4byte	.LVL277
+.LLST87:
+	.4byte	.LVL260
+	.4byte	.LVL265
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL277
-	.4byte	.LVL278
+	.4byte	.LVL265
+	.4byte	.LVL266
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
@@ -46226,31 +46263,31 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST315:
-	.4byte	.LVL1287
-	.4byte	.LVL1290
+	.4byte	.LVL1295
+	.4byte	.LVL1298
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1290
-	.4byte	.LVL1292
+	.4byte	.LVL1298
+	.4byte	.LVL1300
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1292
-	.4byte	.LVL1293
+	.4byte	.LVL1300
+	.4byte	.LVL1301
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1293
+	.4byte	.LVL1301
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
 .LLST316:
-	.4byte	.LVL1288
-	.4byte	.LVL1291
+	.4byte	.LVL1296
+	.4byte	.LVL1299
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1292
+	.4byte	.LVL1300
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
@@ -46258,12 +46295,12 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST317:
-	.4byte	.LVL1289
-	.4byte	.LVL1291
+	.4byte	.LVL1297
+	.4byte	.LVL1299
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1292
+	.4byte	.LVL1300
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
@@ -46271,79 +46308,79 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST318:
-	.4byte	.LVL1292
-	.4byte	.LVL1293
+	.4byte	.LVL1300
+	.4byte	.LVL1301
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1294
-	.4byte	.LVL1298
+	.4byte	.LVL1302
+	.4byte	.LVL1306
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1299
-	.4byte	.LVL1300
+	.4byte	.LVL1307
+	.4byte	.LVL1308
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1300
-	.4byte	.LVL1301-1
+	.4byte	.LVL1308
+	.4byte	.LVL1309-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1311
-	.4byte	.LVL1313
+	.4byte	.LVL1319
+	.4byte	.LVL1321
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1313
-	.4byte	.LVL1316
+	.4byte	.LVL1321
+	.4byte	.LVL1324
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1316
-	.4byte	.LVL1321
+	.4byte	.LVL1324
+	.4byte	.LVL1329
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1321
-	.4byte	.LVL1322
+	.4byte	.LVL1329
+	.4byte	.LVL1330
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1339
-	.4byte	.LVL1344
+	.4byte	.LVL1347
+	.4byte	.LVL1352
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1344
-	.4byte	.LVL1345
+	.4byte	.LVL1352
+	.4byte	.LVL1353
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1345
-	.4byte	.LVL1346-1
+	.4byte	.LVL1353
+	.4byte	.LVL1354-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1352
-	.4byte	.LVL1353
+	.4byte	.LVL1360
+	.4byte	.LVL1361
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1353
-	.4byte	.LVL1354-1
+	.4byte	.LVL1361
+	.4byte	.LVL1362-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1359
-	.4byte	.LVL1360
+	.4byte	.LVL1367
+	.4byte	.LVL1368
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1360
-	.4byte	.LVL1362
+	.4byte	.LVL1368
+	.4byte	.LVL1370
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1368
-	.4byte	.LVL1371
+	.4byte	.LVL1376
+	.4byte	.LVL1379
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1371
-	.4byte	.LVL1372
+	.4byte	.LVL1379
+	.4byte	.LVL1380
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -46351,89 +46388,89 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST319:
-	.4byte	.LVL1351
-	.4byte	.LVL1352
+	.4byte	.LVL1359
+	.4byte	.LVL1360
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1374
-	.4byte	.LVL1377
+	.4byte	.LVL1382
+	.4byte	.LVL1385
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1380
-	.4byte	.LVL1383
+	.4byte	.LVL1388
+	.4byte	.LVL1391
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1421
-	.4byte	.LVL1422
+	.4byte	.LVL1429
+	.4byte	.LVL1430
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1424
+	.4byte	.LVL1432
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST320:
-	.4byte	.LVL1337
-	.4byte	.LVL1338
+	.4byte	.LVL1345
+	.4byte	.LVL1346
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1338
-	.4byte	.LVL1348
+	.4byte	.LVL1346
+	.4byte	.LVL1356
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1349
-	.4byte	.LVL1350
+	.4byte	.LVL1357
+	.4byte	.LVL1358
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1351
-	.4byte	.LVL1352
+	.4byte	.LVL1359
+	.4byte	.LVL1360
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1352
-	.4byte	.LVL1357
+	.4byte	.LVL1360
+	.4byte	.LVL1365
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1358
-	.4byte	.LVL1363
+	.4byte	.LVL1366
+	.4byte	.LVL1371
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1363
-	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.4byte	.LVL1376
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1368
+	.4byte	.LVL1376
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST321:
-	.4byte	.LVL1308
-	.4byte	.LVL1311
+	.4byte	.LVL1316
+	.4byte	.LVL1319
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1333
+	.4byte	.LVL1341
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST322:
-	.4byte	.LVL1306
-	.4byte	.LVL1311
+	.4byte	.LVL1314
+	.4byte	.LVL1319
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1329
-	.4byte	.LVL1330
+	.4byte	.LVL1337
+	.4byte	.LVL1338
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1333
+	.4byte	.LVL1341
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
@@ -46441,100 +46478,100 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST323:
-	.4byte	.LVL1293
-	.4byte	.LVL1295-1
+	.4byte	.LVL1301
+	.4byte	.LVL1303-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1311
-	.4byte	.LVL1313
+	.4byte	.LVL1319
+	.4byte	.LVL1321
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1317
-	.4byte	.LVL1318
+	.4byte	.LVL1325
+	.4byte	.LVL1326
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1318
-	.4byte	.LVL1323
+	.4byte	.LVL1326
+	.4byte	.LVL1331
 	.2byte	0x5
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1340
-	.4byte	.LVL1342
+	.4byte	.LVL1348
+	.4byte	.LVL1350
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1342
-	.4byte	.LVL1345
+	.4byte	.LVL1350
+	.4byte	.LVL1353
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -68
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1361
-	.4byte	.LVL1363
+	.4byte	.LVL1369
+	.4byte	.LVL1371
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1369
-	.4byte	.LVL1370
+	.4byte	.LVL1377
+	.4byte	.LVL1378
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1370
-	.4byte	.LVL1373
+	.4byte	.LVL1378
+	.4byte	.LVL1381
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
 .LLST324:
-	.4byte	.LVL1296
-	.4byte	.LVL1297
+	.4byte	.LVL1304
+	.4byte	.LVL1305
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1297
-	.4byte	.LVL1309
+	.4byte	.LVL1305
+	.4byte	.LVL1317
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1313
-	.4byte	.LVL1336
+	.4byte	.LVL1321
+	.4byte	.LVL1344
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST326:
-	.4byte	.LVL1299
-	.4byte	.LVL1309
+	.4byte	.LVL1307
+	.4byte	.LVL1317
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1316
-	.4byte	.LVL1319
+	.4byte	.LVL1324
+	.4byte	.LVL1327
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1320
-	.4byte	.LVL1338
+	.4byte	.LVL1328
+	.4byte	.LVL1346
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1339
-	.4byte	.LVL1341
+	.4byte	.LVL1347
+	.4byte	.LVL1349
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1343
-	.4byte	.LVL1347
+	.4byte	.LVL1351
+	.4byte	.LVL1355
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1352
-	.4byte	.LVL1353
+	.4byte	.LVL1360
+	.4byte	.LVL1361
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1353
-	.4byte	.LVL1363
+	.4byte	.LVL1361
+	.4byte	.LVL1371
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1368
+	.4byte	.LVL1376
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
@@ -46542,25 +46579,25 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST327:
-	.4byte	.LVL1302
-	.4byte	.LVL1304
+	.4byte	.LVL1310
+	.4byte	.LVL1312
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1305
-	.4byte	.LVL1306
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1323
-	.4byte	.LVL1324
+	.4byte	.LVL1313
+	.4byte	.LVL1314
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1324
 	.4byte	.LVL1331
+	.4byte	.LVL1332
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1332
+	.4byte	.LVL1339
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1331
-	.4byte	.LVL1332
+	.4byte	.LVL1339
+	.4byte	.LVL1340
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -46568,28 +46605,28 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST328:
-	.4byte	.LVL1346
-	.4byte	.LVL1347
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
 	.4byte	.LVL1354
 	.4byte	.LVL1355
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1356
+	.4byte	.LVL1362
 	.4byte	.LVL1363
 	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1364
+	.4byte	.LVL1371
+	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1373
-	.4byte	.LVL1379
+	.4byte	.LVL1381
+	.4byte	.LVL1387
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1379
-	.4byte	.LVL1380
+	.4byte	.LVL1387
+	.4byte	.LVL1388
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -46598,7 +46635,7 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1380
+	.4byte	.LVL1388
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
@@ -46606,41 +46643,41 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST329:
-	.4byte	.LVL1385
-	.4byte	.LVL1394
+	.4byte	.LVL1393
+	.4byte	.LVL1402
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1397
-	.4byte	.LVL1419
+	.4byte	.LVL1405
+	.4byte	.LVL1427
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST330:
-	.4byte	.LVL1375
-	.4byte	.LVL1378
+	.4byte	.LVL1383
+	.4byte	.LVL1386
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1380
-	.4byte	.LVL1394
+	.4byte	.LVL1388
+	.4byte	.LVL1402
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1394
-	.4byte	.LVL1395
+	.4byte	.LVL1402
+	.4byte	.LVL1403
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1397
-	.4byte	.LVL1419
+	.4byte	.LVL1405
+	.4byte	.LVL1427
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1421
-	.4byte	.LVL1424
+	.4byte	.LVL1429
+	.4byte	.LVL1432
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46648,30 +46685,30 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST331:
-	.4byte	.LVL1375
-	.4byte	.LVL1378
+	.4byte	.LVL1383
+	.4byte	.LVL1386
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1380
-	.4byte	.LVL1392
+	.4byte	.LVL1388
+	.4byte	.LVL1400
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1397
-	.4byte	.LVL1411
+	.4byte	.LVL1405
+	.4byte	.LVL1419
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1411
-	.4byte	.LVL1413
+	.4byte	.LVL1419
+	.4byte	.LVL1421
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1421
-	.4byte	.LVL1424
+	.4byte	.LVL1429
+	.4byte	.LVL1432
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46679,25 +46716,25 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST332:
-	.4byte	.LVL1302
-	.4byte	.LVL1303
+	.4byte	.LVL1310
+	.4byte	.LVL1311
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1303
 	.4byte	.LVL1311
+	.4byte	.LVL1319
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1323
-	.4byte	.LVL1381
+	.4byte	.LVL1331
+	.4byte	.LVL1389
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1381
-	.4byte	.LVL1382
+	.4byte	.LVL1389
+	.4byte	.LVL1390
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1382
+	.4byte	.LVL1390
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x7d
@@ -46705,98 +46742,98 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST333:
-	.4byte	.LVL1287
-	.4byte	.LVL1290
+	.4byte	.LVL1295
+	.4byte	.LVL1298
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1292
-	.4byte	.LVL1304
+	.4byte	.LVL1300
+	.4byte	.LVL1312
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1311
-	.4byte	.LVL1323
+	.4byte	.LVL1319
+	.4byte	.LVL1331
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1335
-	.4byte	.LVL1350
+	.4byte	.LVL1343
+	.4byte	.LVL1358
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1363
-	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.4byte	.LVL1376
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST334:
-	.4byte	.LVL1325
-	.4byte	.LVL1326
+	.4byte	.LVL1333
+	.4byte	.LVL1334
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1326
-	.4byte	.LVL1328
+	.4byte	.LVL1334
+	.4byte	.LVL1336
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1364
-	.4byte	.LVL1365
+	.4byte	.LVL1372
+	.4byte	.LVL1373
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1365
-	.4byte	.LVL1366
+	.4byte	.LVL1373
+	.4byte	.LVL1374
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1366
-	.4byte	.LVL1367
+	.4byte	.LVL1374
+	.4byte	.LVL1375
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 -8
-	.4byte	.LVL1376
-	.4byte	.LVL1377
+	.4byte	.LVL1384
+	.4byte	.LVL1385
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1380
-	.4byte	.LVL1386
+	.4byte	.LVL1388
+	.4byte	.LVL1394
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1389
-	.4byte	.LVL1392
+	.4byte	.LVL1397
+	.4byte	.LVL1400
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1399
-	.4byte	.LVL1402
+	.4byte	.LVL1407
+	.4byte	.LVL1410
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1402
-	.4byte	.LVL1403-1
+	.4byte	.LVL1410
+	.4byte	.LVL1411-1
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1403-1
-	.4byte	.LVL1409
+	.4byte	.LVL1411-1
+	.4byte	.LVL1417
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1414
-	.4byte	.LVL1419
+	.4byte	.LVL1422
+	.4byte	.LVL1427
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST335:
-	.4byte	.LVL1334
-	.4byte	.LVL1350
+	.4byte	.LVL1342
+	.4byte	.LVL1358
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1363
-	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.4byte	.LVL1376
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46804,8 +46841,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST336:
-	.4byte	.LVL1334
-	.4byte	.LVL1338
+	.4byte	.LVL1342
+	.4byte	.LVL1346
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
@@ -46813,59 +46850,59 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST337:
-	.4byte	.LVL1390
-	.4byte	.LVL1391
+	.4byte	.LVL1398
+	.4byte	.LVL1399
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
-	.4byte	.LVL1399
-	.4byte	.LVL1400-1
+	.4byte	.LVL1407
+	.4byte	.LVL1408-1
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
 	.4byte	0
 	.4byte	0
 .LLST338:
-	.4byte	.LVL1404
-	.4byte	.LVL1407
+	.4byte	.LVL1412
+	.4byte	.LVL1415
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1407
-	.4byte	.LVL1408
+	.4byte	.LVL1415
+	.4byte	.LVL1416
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST339:
-	.4byte	.LVL1412
-	.4byte	.LVL1419
+	.4byte	.LVL1420
+	.4byte	.LVL1427
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST340:
-	.4byte	.LVL1415
-	.4byte	.LVL1416-1
+	.4byte	.LVL1423
+	.4byte	.LVL1424-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 4
-	.4byte	.LVL1416-1
-	.4byte	.LVL1417
+	.4byte	.LVL1424-1
+	.4byte	.LVL1425
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST233:
-	.4byte	.LVL891
-	.4byte	.LVL892
+	.4byte	.LVL899
+	.4byte	.LVL900
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL892
-	.4byte	.LVL908
+	.4byte	.LVL900
+	.4byte	.LVL916
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL908
+	.4byte	.LVL916
 	.4byte	.LFE283
 	.2byte	0x4
 	.byte	0xf3
@@ -46875,78 +46912,78 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST234:
-	.4byte	.LVL891
-	.4byte	.LVL893-1
+	.4byte	.LVL899
+	.4byte	.LVL901-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST235:
-	.4byte	.LVL894
-	.4byte	.LVL895
+	.4byte	.LVL902
+	.4byte	.LVL903
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST236:
-	.4byte	.LVL897
-	.4byte	.LVL899-1
+	.4byte	.LVL905
+	.4byte	.LVL907-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL903
-	.4byte	.LVL905
+	.4byte	.LVL911
+	.4byte	.LVL913
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL905
-	.4byte	.LVL906
+	.4byte	.LVL913
+	.4byte	.LVL914
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST237:
-	.4byte	.LVL897
-	.4byte	.LVL902
+	.4byte	.LVL905
+	.4byte	.LVL910
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL903
-	.4byte	.LVL904
+	.4byte	.LVL911
+	.4byte	.LVL912
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST238:
-	.4byte	.LVL896
-	.4byte	.LVL898
+	.4byte	.LVL904
+	.4byte	.LVL906
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL898
-	.4byte	.LVL899-1
+	.4byte	.LVL906
+	.4byte	.LVL907-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
-	.4byte	.LVL903
-	.4byte	.LVL906
+	.4byte	.LVL911
+	.4byte	.LVL914
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST90:
-	.4byte	.LVL253
-	.4byte	.LVL256
+.LLST81:
+	.4byte	.LVL241
+	.4byte	.LVL244
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL256
-	.4byte	.LVL258
+	.4byte	.LVL244
+	.4byte	.LVL246
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL258
-	.4byte	.LVL261
+	.4byte	.LVL246
+	.4byte	.LVL249
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL261
+	.4byte	.LVL249
 	.4byte	.LFE282
 	.2byte	0x4
 	.byte	0xf3
@@ -46955,12 +46992,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST91:
-	.4byte	.LVL253
-	.4byte	.LVL255
+.LLST82:
+	.4byte	.LVL241
+	.4byte	.LVL243
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL255
+	.4byte	.LVL243
 	.4byte	.LFE282
 	.2byte	0x4
 	.byte	0xf3
@@ -46969,171 +47006,171 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST92:
-	.4byte	.LVL254
-	.4byte	.LVL257
+.LLST83:
+	.4byte	.LVL242
+	.4byte	.LVL245
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL257
-	.4byte	.LVL258
+	.4byte	.LVL245
+	.4byte	.LVL246
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL258
-	.4byte	.LVL259
+	.4byte	.LVL246
+	.4byte	.LVL247
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL260
-	.4byte	.LVL261
+	.4byte	.LVL248
+	.4byte	.LVL249
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL261
-	.4byte	.LVL262
+	.4byte	.LVL249
+	.4byte	.LVL250
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST259:
-	.4byte	.LVL1037
-	.4byte	.LVL1038
+	.4byte	.LVL1045
+	.4byte	.LVL1046
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST251:
-	.4byte	.LVL994
-	.4byte	.LVL997
+	.4byte	.LVL1002
+	.4byte	.LVL1005
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL997
+	.4byte	.LVL1005
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST252:
-	.4byte	.LVL1002
-	.4byte	.LVL1004-1
+	.4byte	.LVL1010
+	.4byte	.LVL1012-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1004-1
-	.4byte	.LVL1007
+	.4byte	.LVL1012-1
+	.4byte	.LVL1015
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1019
-	.4byte	.LVL1020
+	.4byte	.LVL1027
+	.4byte	.LVL1028
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1020
-	.4byte	.LVL1029
+	.4byte	.LVL1028
+	.4byte	.LVL1037
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1029
-	.4byte	.LVL1030
+	.4byte	.LVL1037
+	.4byte	.LVL1038
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1031
+	.4byte	.LVL1039
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST253:
-	.4byte	.LVL1006
-	.4byte	.LVL1007
+	.4byte	.LVL1014
+	.4byte	.LVL1015
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1008
-	.4byte	.LVL1009
+	.4byte	.LVL1016
+	.4byte	.LVL1017
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1014
-	.4byte	.LVL1015
+	.4byte	.LVL1022
+	.4byte	.LVL1023
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1015
-	.4byte	.LVL1017
+	.4byte	.LVL1023
+	.4byte	.LVL1025
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1017
-	.4byte	.LVL1018
+	.4byte	.LVL1025
+	.4byte	.LVL1026
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1022
-	.4byte	.LVL1023
+	.4byte	.LVL1030
+	.4byte	.LVL1031
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1023
-	.4byte	.LVL1024
+	.4byte	.LVL1031
+	.4byte	.LVL1032
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1026
-	.4byte	.LVL1027
+	.4byte	.LVL1034
+	.4byte	.LVL1035
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1028
-	.4byte	.LVL1032
+	.4byte	.LVL1036
+	.4byte	.LVL1040
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1032
-	.4byte	.LVL1033
+	.4byte	.LVL1040
+	.4byte	.LVL1041
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST254:
-	.4byte	.LVL1005
-	.4byte	.LVL1009
+	.4byte	.LVL1013
+	.4byte	.LVL1017
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1014
-	.4byte	.LVL1019
+	.4byte	.LVL1022
+	.4byte	.LVL1027
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST255:
-	.4byte	.LVL1032
-	.4byte	.LVL1034
+	.4byte	.LVL1040
+	.4byte	.LVL1042
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1034
+	.4byte	.LVL1042
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5e
 	.4byte	0
 	.4byte	0
 .LLST256:
-	.4byte	.LVL996
-	.4byte	.LVL1005
+	.4byte	.LVL1004
+	.4byte	.LVL1013
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1019
+	.4byte	.LVL1027
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST257:
-	.4byte	.LVL996
-	.4byte	.LVL997
+	.4byte	.LVL1004
+	.4byte	.LVL1005
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 16
-	.4byte	.LVL997
-	.4byte	.LVL999-1
+	.4byte	.LVL1005
+	.4byte	.LVL1007-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.4byte	.LVL999-1
+	.4byte	.LVL1007-1
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
@@ -47141,39 +47178,39 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST258:
-	.4byte	.LVL998
-	.4byte	.LVL1003
+	.4byte	.LVL1006
+	.4byte	.LVL1011
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1019
+	.4byte	.LVL1027
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST448:
-	.4byte	.LVL1968
-	.4byte	.LVL1971
+.LLST447:
+	.4byte	.LVL1956
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1981
-	.4byte	.LVL1983
+	.4byte	.LVL1969
+	.4byte	.LVL1971
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1984
+	.4byte	.LVL1972
 	.4byte	.LFE277
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST89:
-	.4byte	.LVL251
-	.4byte	.LVL252
+.LLST80:
+	.4byte	.LVL239
+	.4byte	.LVL240
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL252
+	.4byte	.LVL240
 	.4byte	.LFE276
 	.2byte	0x4
 	.byte	0xf3
@@ -47183,242 +47220,242 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST245:
-	.4byte	.LVL943
-	.4byte	.LVL947
+	.4byte	.LVL951
+	.4byte	.LVL955
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL947
-	.4byte	.LVL948
+	.4byte	.LVL955
+	.4byte	.LVL956
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL948
-	.4byte	.LVL949
+	.4byte	.LVL956
+	.4byte	.LVL957
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL951
-	.4byte	.LVL952
+	.4byte	.LVL959
+	.4byte	.LVL960
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL952
 	.4byte	.LVL960
+	.4byte	.LVL969
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL960
-	.4byte	.LVL961
+	.4byte	.LVL969
+	.4byte	.LVL970
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL962
-	.4byte	.LVL983
+	.4byte	.LVL971
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST246:
-	.4byte	.LVL945
-	.4byte	.LVL948
+	.4byte	.LVL953
+	.4byte	.LVL956
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL953
-	.4byte	.LVL983
+	.4byte	.LVL961
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST247:
-	.4byte	.LVL943
-	.4byte	.LVL983
+	.4byte	.LVL951
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST248:
-	.4byte	.LVL966
-	.4byte	.LVL967
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL968
-	.4byte	.LVL969
+	.4byte	.LVL974
+	.4byte	.LVL975
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL975
 	.4byte	.LVL976
+	.4byte	.LVL977
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL977
-	.4byte	.LVL978
+	.4byte	.LVL983
+	.4byte	.LVL984
 	.2byte	0x1
 	.byte	0x51
+	.4byte	.LVL985
 	.4byte	.LVL986
-	.4byte	.LVL990
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL991
-	.4byte	.LVL992
+	.4byte	.LVL994
+	.4byte	.LVL998
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL999
+	.4byte	.LVL1000
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL992
+	.4byte	.LVL1000
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST249:
-	.4byte	.LVL954
-	.4byte	.LVL956
+	.4byte	.LVL962
+	.4byte	.LVL964
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL957
-	.4byte	.LVL958
+	.4byte	.LVL966
+	.4byte	.LVL967
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL958
-	.4byte	.LVL959
+	.4byte	.LVL967
+	.4byte	.LVL968
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL965
-	.4byte	.LVL970
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL971
-	.4byte	.LVL972
+	.4byte	.LVL973
+	.4byte	.LVL978
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL974
 	.4byte	.LVL979
-	.2byte	0x1
-	.byte	0x53
 	.4byte	.LVL980
-	.4byte	.LVL981
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL982
 	.4byte	.LVL987
-	.4byte	.LVL988
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL988
 	.4byte	.LVL989
-	.4byte	.LVL990
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL992
+	.4byte	.LVL995
+	.4byte	.LVL996
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL997
+	.4byte	.LVL998
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1000
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST250:
-	.4byte	.LVL953
-	.4byte	.LVL983
+	.4byte	.LVL961
+	.4byte	.LVL991
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST370:
-	.4byte	.LVL1559
+.LLST369:
 	.4byte	.LVL1566
+	.4byte	.LVL1573
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1568
-	.4byte	.LVL1570
+	.4byte	.LVL1575
+	.4byte	.LVL1577
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST371:
-	.4byte	.LVL1560
-	.4byte	.LVL1576
+.LLST370:
+	.4byte	.LVL1567
+	.4byte	.LVL1583
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST372:
-	.4byte	.LVL1559
+.LLST371:
 	.4byte	.LVL1566
+	.4byte	.LVL1573
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1566
-	.4byte	.LVL1572
+	.4byte	.LVL1573
+	.4byte	.LVL1579
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1573
-	.4byte	.LVL1576
+	.4byte	.LVL1580
+	.4byte	.LVL1583
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST241:
-	.4byte	.LVL927
-	.4byte	.LVL929
+	.4byte	.LVL935
+	.4byte	.LVL937
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL929
-	.4byte	.LVL932
+	.4byte	.LVL937
+	.4byte	.LVL940
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL932
-	.4byte	.LVL933-1
+	.4byte	.LVL940
+	.4byte	.LVL941-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL933-1
-	.4byte	.LVL933
+	.4byte	.LVL941-1
+	.4byte	.LVL941
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL933
-	.4byte	.LVL936
+	.4byte	.LVL941
+	.4byte	.LVL944
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL936
+	.4byte	.LVL944
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST242:
-	.4byte	.LVL928
-	.4byte	.LVL930
+	.4byte	.LVL936
+	.4byte	.LVL938
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL930
-	.4byte	.LVL931-1
+	.4byte	.LVL938
+	.4byte	.LVL939-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
-	.4byte	.LVL933
-	.4byte	.LVL934
+	.4byte	.LVL941
+	.4byte	.LVL942
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL934
-	.4byte	.LVL935-1
+	.4byte	.LVL942
+	.4byte	.LVL943-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
 	.4byte	0
 	.4byte	0
 .LLST243:
-	.4byte	.LVL927
-	.4byte	.LVL929
+	.4byte	.LVL935
+	.4byte	.LVL937
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -47427,8 +47464,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL929
-	.4byte	.LVL931-1
+	.4byte	.LVL937
+	.4byte	.LVL939-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47437,8 +47474,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL933
-	.4byte	.LVL935-1
+	.4byte	.LVL941
+	.4byte	.LVL943-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47447,7 +47484,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL936
+	.4byte	.LVL944
 	.4byte	.LFE270
 	.2byte	0x7
 	.byte	0x70
@@ -47460,34 +47497,34 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST244:
-	.4byte	.LVL927
-	.4byte	.LVL929
+	.4byte	.LVL935
+	.4byte	.LVL937
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL929
-	.4byte	.LVL931-1
+	.4byte	.LVL937
+	.4byte	.LVL939-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL933
-	.4byte	.LVL935-1
+	.4byte	.LVL941
+	.4byte	.LVL943-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL936
+	.4byte	.LVL944
 	.4byte	.LFE270
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
 	.4byte	0
 	.4byte	0
-.LLST360:
-	.4byte	.LVL1528
-	.4byte	.LVL1531
+.LLST359:
+	.4byte	.LVL1535
+	.4byte	.LVL1538
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1531
+	.4byte	.LVL1538
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -47496,125 +47533,125 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST361:
-	.4byte	.LVL1528
-	.4byte	.LVL1529
+.LLST360:
+	.4byte	.LVL1535
+	.4byte	.LVL1536
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.4byte	.LVL1529
-	.4byte	.LVL1530
+	.4byte	.LVL1536
+	.4byte	.LVL1537
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1530
-	.4byte	.LVL1532
+	.4byte	.LVL1537
+	.4byte	.LVL1539
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST362:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST361:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1537
-	.4byte	.LVL1552
+	.4byte	.LVL1544
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST363:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST362:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1537
-	.4byte	.LVL1552
+	.4byte	.LVL1544
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST364:
-	.4byte	.LVL1535
-	.4byte	.LVL1536
+.LLST363:
+	.4byte	.LVL1542
+	.4byte	.LVL1543
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1536
+	.4byte	.LVL1543
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST365:
-	.4byte	.LVL1542
-	.4byte	.LVL1552
+.LLST364:
+	.4byte	.LVL1549
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST366:
-	.4byte	.LVL1542
-	.4byte	.LVL1552
+.LLST365:
+	.4byte	.LVL1549
+	.4byte	.LVL1559
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -128
 	.4byte	0
 	.4byte	0
-.LLST367:
-	.4byte	.LVL1540
-	.4byte	.LVL1541-1
+.LLST366:
+	.4byte	.LVL1547
+	.4byte	.LVL1548-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1541-1
-	.4byte	.LVL1550
+	.4byte	.LVL1548-1
+	.4byte	.LVL1557
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1550
-	.4byte	.LVL1551-1
+	.4byte	.LVL1557
+	.4byte	.LVL1558-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1551-1
-	.4byte	.LVL1552
+	.4byte	.LVL1558-1
+	.4byte	.LVL1559
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST368:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST367:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1537
-	.4byte	.LVL1538
+	.4byte	.LVL1544
+	.4byte	.LVL1545
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1539
-	.4byte	.LVL1552
+	.4byte	.LVL1546
+	.4byte	.LVL1559
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST369:
-	.4byte	.LVL1535
-	.4byte	.LVL1537
+.LLST368:
+	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47627,7 +47664,7 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1552
+	.4byte	.LVL1559
 	.4byte	.LFE267
 	.2byte	0xf
 	.byte	0x70
@@ -47643,135 +47680,135 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST352:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST351:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1506
-	.4byte	.LVL1517
+	.4byte	.LVL1513
+	.4byte	.LVL1524
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1521
-	.4byte	.LVL1526
+	.4byte	.LVL1528
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST353:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST352:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1506
-	.4byte	.LVL1516
+	.4byte	.LVL1513
+	.4byte	.LVL1523
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1521
-	.4byte	.LVL1526
+	.4byte	.LVL1528
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST354:
-	.4byte	.LVL1504
-	.4byte	.LVL1505
+.LLST353:
+	.4byte	.LVL1511
+	.4byte	.LVL1512
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1505
-	.4byte	.LVL1508
+	.4byte	.LVL1512
+	.4byte	.LVL1515
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1508
-	.4byte	.LVL1509
+	.4byte	.LVL1515
+	.4byte	.LVL1516
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -136
-	.4byte	.LVL1509
-	.4byte	.LVL1522
+	.4byte	.LVL1516
+	.4byte	.LVL1529
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1522
-	.4byte	.LVL1523
+	.4byte	.LVL1529
+	.4byte	.LVL1530
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1523
+	.4byte	.LVL1530
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST355:
-	.4byte	.LVL1513
-	.4byte	.LVL1526
+.LLST354:
+	.4byte	.LVL1520
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST356:
-	.4byte	.LVL1512
-	.4byte	.LVL1526
+.LLST355:
+	.4byte	.LVL1519
+	.4byte	.LVL1533
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -132
 	.4byte	0
 	.4byte	0
-.LLST357:
-	.4byte	.LVL1510
-	.4byte	.LVL1511-1
+.LLST356:
+	.4byte	.LVL1517
+	.4byte	.LVL1518-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1511-1
-	.4byte	.LVL1523
+	.4byte	.LVL1518-1
+	.4byte	.LVL1530
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1523
-	.4byte	.LVL1524
+	.4byte	.LVL1530
+	.4byte	.LVL1531
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1524
-	.4byte	.LVL1526
+	.4byte	.LVL1531
+	.4byte	.LVL1533
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST358:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST357:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1507
+	.4byte	.LVL1513
+	.4byte	.LVL1514
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1509
-	.4byte	.LVL1526
+	.4byte	.LVL1516
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST359:
-	.4byte	.LVL1504
-	.4byte	.LVL1506
+.LLST358:
+	.4byte	.LVL1511
+	.4byte	.LVL1513
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47784,29 +47821,29 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1506
-	.4byte	.LVL1507
+	.4byte	.LVL1513
+	.4byte	.LVL1514
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1509
-	.4byte	.LVL1519
+	.4byte	.LVL1516
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1519
-	.4byte	.LVL1520-1
+	.4byte	.LVL1526
+	.4byte	.LVL1527-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1520-1
-	.4byte	.LVL1521
+	.4byte	.LVL1527-1
+	.4byte	.LVL1528
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1521
-	.4byte	.LVL1526
+	.4byte	.LVL1528
+	.4byte	.LVL1533
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1526
+	.4byte	.LVL1533
 	.4byte	.LFE266
 	.2byte	0xf
 	.byte	0x70
@@ -47823,11 +47860,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST229:
-	.4byte	.LVL874
-	.4byte	.LVL879
+	.4byte	.LVL882
+	.4byte	.LVL887
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL879
+	.4byte	.LVL887
 	.4byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -47837,129 +47874,129 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST230:
-	.4byte	.LVL874
-	.4byte	.LVL878
+	.4byte	.LVL882
+	.4byte	.LVL886
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL878
+	.4byte	.LVL886
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST231:
-	.4byte	.LVL874
-	.4byte	.LVL877
+	.4byte	.LVL882
+	.4byte	.LVL885
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL877
+	.4byte	.LVL885
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST232:
-	.4byte	.LVL880
-	.4byte	.LVL881
+	.4byte	.LVL888
+	.4byte	.LVL889
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL882
-	.4byte	.LVL884
+	.4byte	.LVL890
+	.4byte	.LVL892
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL884
-	.4byte	.LVL885-1
+	.4byte	.LVL892
+	.4byte	.LVL893-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL887
-	.4byte	.LVL889
+	.4byte	.LVL895
+	.4byte	.LVL897
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL890
+	.4byte	.LVL898
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST314:
-	.4byte	.LVL1282
-	.4byte	.LVL1283
+	.4byte	.LVL1290
+	.4byte	.LVL1291
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1283
-	.4byte	.LVL1284
+	.4byte	.LVL1291
+	.4byte	.LVL1292
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1284
-	.4byte	.LVL1285-1
+	.4byte	.LVL1292
+	.4byte	.LVL1293-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1285-1
-	.4byte	.LVL1285
+	.4byte	.LVL1293-1
+	.4byte	.LVL1293
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1285
-	.4byte	.LVL1286
+	.4byte	.LVL1293
+	.4byte	.LVL1294
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST83:
-	.4byte	.LVL224
-	.4byte	.LVL225
+.LLST74:
+	.4byte	.LVL212
+	.4byte	.LVL213
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL226
-	.4byte	.LVL227
+	.4byte	.LVL214
+	.4byte	.LVL215
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL227
-	.4byte	.LVL228
+	.4byte	.LVL215
+	.4byte	.LVL216
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL229
-	.4byte	.LVL230
+	.4byte	.LVL217
+	.4byte	.LVL218
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL231
-	.4byte	.LVL234
+	.4byte	.LVL219
+	.4byte	.LVL222
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL234
-	.4byte	.LVL235
+	.4byte	.LVL222
+	.4byte	.LVL223
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL236
-	.4byte	.LVL238
+	.4byte	.LVL224
+	.4byte	.LVL226
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL238
-	.4byte	.LVL239
+	.4byte	.LVL226
+	.4byte	.LVL227
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL239
-	.4byte	.LVL240
+	.4byte	.LVL227
+	.4byte	.LVL228
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL240
-	.4byte	.LVL242
+	.4byte	.LVL228
+	.4byte	.LVL230
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL242
-	.4byte	.LVL243
+	.4byte	.LVL230
+	.4byte	.LVL231
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL243
+	.4byte	.LVL231
 	.4byte	.LFE263
 	.2byte	0x3
 	.byte	0x75
@@ -47967,50 +48004,50 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST84:
-	.4byte	.LVL231
-	.4byte	.LVL234
+.LLST75:
+	.4byte	.LVL219
+	.4byte	.LVL222
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL240
+	.4byte	.LVL228
 	.4byte	.LFE263
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST85:
-	.4byte	.LVL229
-	.4byte	.LVL230
+.LLST76:
+	.4byte	.LVL217
+	.4byte	.LVL218
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL231
-	.4byte	.LVL232
+	.4byte	.LVL219
+	.4byte	.LVL220
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL236
-	.4byte	.LVL237
+	.4byte	.LVL224
+	.4byte	.LVL225
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL238
-	.4byte	.LVL240
+	.4byte	.LVL226
+	.4byte	.LVL228
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL240
-	.4byte	.LVL241
+	.4byte	.LVL228
+	.4byte	.LVL229
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL242
+	.4byte	.LVL230
 	.4byte	.LFE263
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST227:
-	.4byte	.LVL869
-	.4byte	.LVL870
+	.4byte	.LVL877
+	.4byte	.LVL878
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL870
+	.4byte	.LVL878
 	.4byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -48020,8 +48057,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST228:
-	.4byte	.LVL871
-	.4byte	.LVL872
+	.4byte	.LVL879
+	.4byte	.LVL880
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -48031,22 +48068,22 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL872
-	.4byte	.LVL873-1
+	.4byte	.LVL880
+	.4byte	.LVL881-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST214:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL834
-	.4byte	.LVL846
+	.4byte	.LVL842
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL846
+	.4byte	.LVL854
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -48056,15 +48093,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST215:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL834
-	.4byte	.LVL846
+	.4byte	.LVL842
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL846
+	.4byte	.LVL854
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -48074,16 +48111,16 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST216:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL834
-	.4byte	.LVL846
+	.4byte	.LVL842
+	.4byte	.LVL854
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL846
+	.4byte	.LVL854
 	.4byte	.LFE261
 	.2byte	0x2
 	.byte	0x7d
@@ -48091,8 +48128,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST217:
-	.4byte	.LVL838
 	.4byte	.LVL846
+	.4byte	.LVL854
 	.2byte	0x7
 	.byte	0x7a
 	.sleb128 0
@@ -48103,72 +48140,72 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST218:
-	.4byte	.LVL840
-	.4byte	.LVL841
+	.4byte	.LVL848
+	.4byte	.LVL849
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL841
-	.4byte	.LVL842-1
+	.4byte	.LVL849
+	.4byte	.LVL850-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+12
 	.4byte	0
 	.4byte	0
 .LLST219:
-	.4byte	.LVL833
-	.4byte	.LVL834
+	.4byte	.LVL841
+	.4byte	.LVL842
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL834
-	.4byte	.LVL843
+	.4byte	.LVL842
+	.4byte	.LVL851
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL844
-	.4byte	.LVL846
+	.4byte	.LVL852
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST208:
-	.4byte	.LVL810
-	.4byte	.LVL812
+	.4byte	.LVL818
+	.4byte	.LVL820
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL812
-	.4byte	.LVL816
+	.4byte	.LVL820
+	.4byte	.LVL824
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL816
-	.4byte	.LVL818
+	.4byte	.LVL824
+	.4byte	.LVL826
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL818
+	.4byte	.LVL826
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST209:
-	.4byte	.LVL821
-	.4byte	.LVL822
+	.4byte	.LVL829
+	.4byte	.LVL830
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL822
-	.4byte	.LVL824
+	.4byte	.LVL830
+	.4byte	.LVL832
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL824
-	.4byte	.LVL825
+	.4byte	.LVL832
+	.4byte	.LVL833
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL828
-	.4byte	.LVL831
+	.4byte	.LVL836
+	.4byte	.LVL839
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL831
-	.4byte	.LVL832
+	.4byte	.LVL839
+	.4byte	.LVL840
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
@@ -48176,160 +48213,160 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST210:
-	.4byte	.LVL821
-	.4byte	.LVL822
+	.4byte	.LVL829
+	.4byte	.LVL830
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL822
-	.4byte	.LVL823
+	.4byte	.LVL830
+	.4byte	.LVL831
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL828
-	.4byte	.LVL829
+	.4byte	.LVL836
+	.4byte	.LVL837
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL830
+	.4byte	.LVL838
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
 .LLST211:
-	.4byte	.LVL811
-	.4byte	.LVL815
+	.4byte	.LVL819
+	.4byte	.LVL823
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL816
-	.4byte	.LVL817
+	.4byte	.LVL824
+	.4byte	.LVL825
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL817
-	.4byte	.LVL818
+	.4byte	.LVL825
+	.4byte	.LVL826
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 12
-	.4byte	.LVL818
-	.4byte	.LVL821-1
+	.4byte	.LVL826
+	.4byte	.LVL829-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 12
 	.4byte	0
 	.4byte	0
 .LLST212:
-	.4byte	.LVL811
-	.4byte	.LVL812
+	.4byte	.LVL819
+	.4byte	.LVL820
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL812
-	.4byte	.LVL813-1
+	.4byte	.LVL820
+	.4byte	.LVL821-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
-	.4byte	.LVL816
-	.4byte	.LVL818
+	.4byte	.LVL824
+	.4byte	.LVL826
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL818
-	.4byte	.LVL821-1
+	.4byte	.LVL826
+	.4byte	.LVL829-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
 	.4byte	0
 	.4byte	0
 .LLST213:
-	.4byte	.LVL819
-	.4byte	.LVL820
+	.4byte	.LVL827
+	.4byte	.LVL828
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL820
-	.4byte	.LVL821-1
+	.4byte	.LVL828
+	.4byte	.LVL829-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.4byte	0
 	.4byte	0
 .LLST220:
-	.4byte	.LVL847
-	.4byte	.LVL850-1
+	.4byte	.LVL855
+	.4byte	.LVL858-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL850-1
+	.4byte	.LVL858-1
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST221:
-	.4byte	.LVL851
-	.4byte	.LVL857
+	.4byte	.LVL859
+	.4byte	.LVL865
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL860
+	.4byte	.LVL868
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST222:
-	.4byte	.LVL850
-	.4byte	.LVL852
+	.4byte	.LVL858
+	.4byte	.LVL860
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST223:
-	.4byte	.LVL855
-	.4byte	.LVL857
+	.4byte	.LVL863
+	.4byte	.LVL865
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL860
-	.4byte	.LVL865
+	.4byte	.LVL868
+	.4byte	.LVL873
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL865
-	.4byte	.LVL866
+	.4byte	.LVL873
+	.4byte	.LVL874
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL866
-	.4byte	.LVL867
+	.4byte	.LVL874
+	.4byte	.LVL875
 	.2byte	0x3
 	.byte	0x78
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL867
+	.4byte	.LVL875
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST224:
-	.4byte	.LVL848
-	.4byte	.LVL854
+	.4byte	.LVL856
+	.4byte	.LVL862
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST225:
-	.4byte	.LVL849
-	.4byte	.LVL850-1
+	.4byte	.LVL857
+	.4byte	.LVL858-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL850-1
-	.4byte	.LVL859
+	.4byte	.LVL858-1
+	.4byte	.LVL867
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL859
-	.4byte	.LVL860
+	.4byte	.LVL867
+	.4byte	.LVL868
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -40
-	.4byte	.LVL860
+	.4byte	.LVL868
 	.4byte	.LFE259
 	.2byte	0x2
 	.byte	0x7d
@@ -48337,105 +48374,105 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST226:
-	.4byte	.LVL861
-	.4byte	.LVL862
+	.4byte	.LVL869
+	.4byte	.LVL870
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
 	.4byte	0
 	.4byte	0
 .LLST201:
-	.4byte	.LVL786
-	.4byte	.LVL789
+	.4byte	.LVL794
+	.4byte	.LVL797
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL789
+	.4byte	.LVL797
 	.4byte	.LFE257
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST202:
-	.4byte	.LVL788
-	.4byte	.LVL793
+	.4byte	.LVL796
+	.4byte	.LVL801
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL797
-	.4byte	.LVL804
+	.4byte	.LVL805
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST203:
-	.4byte	.LVL798
-	.4byte	.LVL804
+	.4byte	.LVL806
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST204:
-	.4byte	.LVL790
-	.4byte	.LVL791
+	.4byte	.LVL798
+	.4byte	.LVL799
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL791
-	.4byte	.LVL792
+	.4byte	.LVL799
+	.4byte	.LVL800
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL792
-	.4byte	.LVL794
+	.4byte	.LVL800
+	.4byte	.LVL802
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL797
-	.4byte	.LVL799
+	.4byte	.LVL805
+	.4byte	.LVL807
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL799
-	.4byte	.LVL800
+	.4byte	.LVL807
+	.4byte	.LVL808
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL801
-	.4byte	.LVL804
+	.4byte	.LVL809
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST205:
-	.4byte	.LVL792
-	.4byte	.LVL795
+	.4byte	.LVL800
+	.4byte	.LVL803
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL796
-	.4byte	.LVL797
+	.4byte	.LVL804
+	.4byte	.LVL805
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL798
-	.4byte	.LVL802
+	.4byte	.LVL806
+	.4byte	.LVL810
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL802
-	.4byte	.LVL803
+	.4byte	.LVL810
+	.4byte	.LVL811
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL804
-	.4byte	.LVL806
+	.4byte	.LVL812
+	.4byte	.LVL814
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL806
-	.4byte	.LVL808
+	.4byte	.LVL814
+	.4byte	.LVL816
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL808
-	.4byte	.LVL809
+	.4byte	.LVL816
+	.4byte	.LVL817
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL809
+	.4byte	.LVL817
 	.4byte	.LFE257
 	.2byte	0x3
 	.byte	0x77
@@ -48444,39 +48481,39 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST206:
-	.4byte	.LVL792
-	.4byte	.LVL795
+	.4byte	.LVL800
+	.4byte	.LVL803
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL796
-	.4byte	.LVL797
+	.4byte	.LVL804
+	.4byte	.LVL805
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL804
-	.4byte	.LVL807-1
+	.4byte	.LVL812
+	.4byte	.LVL815-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL807-1
-	.4byte	.LVL808
+	.4byte	.LVL815-1
+	.4byte	.LVL816
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST207:
-	.4byte	.LVL792
-	.4byte	.LVL795
+	.4byte	.LVL800
+	.4byte	.LVL803
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST199:
-	.4byte	.LVL773
-	.4byte	.LVL775
+	.4byte	.LVL781
+	.4byte	.LVL783
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL775
+	.4byte	.LVL783
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -48486,11 +48523,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST200:
-	.4byte	.LVL773
-	.4byte	.LVL774
+	.4byte	.LVL781
+	.4byte	.LVL782
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL774
+	.4byte	.LVL782
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -48499,30 +48536,30 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST67:
-	.4byte	.LVL187
-	.4byte	.LVL190
+.LLST62:
+	.4byte	.LVL179
+	.4byte	.LVL182
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL191
-	.4byte	.LVL192
+	.4byte	.LVL183
+	.4byte	.LVL184
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL194
-	.4byte	.LVL196
+	.4byte	.LVL186
+	.4byte	.LVL188
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST68:
+.LLST63:
+	.4byte	.LVL179
 	.4byte	.LVL187
-	.4byte	.LVL195
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL195
-	.4byte	.LVL197
+	.4byte	.LVL187
+	.4byte	.LVL189
 	.2byte	0x8
 	.byte	0x73
 	.sleb128 0
@@ -48534,23 +48571,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST69:
-	.4byte	.LVL188
-	.4byte	.LVL189
+.LLST64:
+	.4byte	.LVL180
+	.4byte	.LVL181
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL193
-	.4byte	.LVL197
+	.4byte	.LVL185
+	.4byte	.LVL189
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST66:
-	.4byte	.LVL185
-	.4byte	.LVL186-1
+.LLST61:
+	.4byte	.LVL177
+	.4byte	.LVL178-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL186-1
+	.4byte	.LVL178-1
 	.4byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48559,23 +48596,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST62:
-	.4byte	.LVL173
-	.4byte	.LVL178-1
+.LLST57:
+	.4byte	.LVL165
+	.4byte	.LVL170-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL178-1
-	.4byte	.LVL179
+	.4byte	.LVL170-1
+	.4byte	.LVL171
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL179
-	.4byte	.LVL184
+	.4byte	.LVL171
+	.4byte	.LVL176
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL184
+	.4byte	.LVL176
 	.4byte	.LFE252
 	.2byte	0x4
 	.byte	0xf3
@@ -48584,33 +48621,33 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST63:
-	.4byte	.LVL173
-	.4byte	.LVL177
+.LLST58:
+	.4byte	.LVL165
+	.4byte	.LVL169
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL179
-	.4byte	.LVL180
+	.4byte	.LVL171
+	.4byte	.LVL172
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL182
+	.4byte	.LVL174
 	.4byte	.LFE252
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST64:
-	.4byte	.LVL173
-	.4byte	.LVL176
+.LLST59:
+	.4byte	.LVL165
+	.4byte	.LVL168
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL176
-	.4byte	.LVL179
+	.4byte	.LVL168
+	.4byte	.LVL171
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL179
+	.4byte	.LVL171
 	.4byte	.LFE252
 	.2byte	0x3
 	.byte	0x9
@@ -48618,34 +48655,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST65:
-	.4byte	.LVL174
-	.4byte	.LVL175
+.LLST60:
+	.4byte	.LVL166
+	.4byte	.LVL167
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL179
-	.4byte	.LVL183
+	.4byte	.LVL171
+	.4byte	.LVL175
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST59:
-	.4byte	.LVL164
-	.4byte	.LVL167
+.LLST54:
+	.4byte	.LVL154
+	.4byte	.LVL157
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL167
+	.4byte	.LVL157
 	.4byte	.LFE251
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST60:
-	.4byte	.LVL164
-	.4byte	.LVL166
+.LLST55:
+	.4byte	.LVL154
+	.4byte	.LVL156
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL166
+	.4byte	.LVL156
 	.4byte	.LFE251
 	.2byte	0x4
 	.byte	0xf3
@@ -48654,23 +48691,55 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST61:
-	.4byte	.LVL170
-	.4byte	.LVL171
+.LLST56:
+	.4byte	.LVL160
+	.4byte	.LVL161
+	.2byte	0x10
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL161
+	.4byte	.LVL162
+	.2byte	0x12
+	.byte	0x74
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL163
+	.4byte	.LVL164
 	.2byte	0xc
-	.byte	0x72
+	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL171
-	.4byte	.LVL172
+	.4byte	.LVL164
+	.4byte	.LFE251
 	.2byte	0xe
 	.byte	0x74
 	.sleb128 2
@@ -48681,55 +48750,55 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST53:
-	.4byte	.LVL145
-	.4byte	.LVL148
+.LLST48:
+	.4byte	.LVL135
+	.4byte	.LVL138
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL148
-	.4byte	.LVL149
+	.4byte	.LVL138
+	.4byte	.LVL139
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL149
+	.4byte	.LVL139
 	.4byte	.LFE250
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST54:
-	.4byte	.LVL146
-	.4byte	.LVL147
+.LLST49:
+	.4byte	.LVL136
+	.4byte	.LVL137
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL149
+	.4byte	.LVL139
 	.4byte	.LFE250
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST55:
-	.4byte	.LVL150
-	.4byte	.LVL151
+.LLST50:
+	.4byte	.LVL140
+	.4byte	.LVL141
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL151
+	.4byte	.LVL141
 	.4byte	.LFE250
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST56:
-	.4byte	.LVL151
-	.4byte	.LVL152
+.LLST51:
+	.4byte	.LVL141
+	.4byte	.LVL142
 	.2byte	0xb
 	.byte	0x72
 	.sleb128 0
@@ -48741,8 +48810,8 @@ __func__.9940:
 	.byte	0x7c
 	.sleb128 0
 	.byte	0x22
-	.4byte	.LVL153
-	.4byte	.LVL155
+	.4byte	.LVL143
+	.4byte	.LVL145
 	.2byte	0xb
 	.byte	0x72
 	.sleb128 0
@@ -48754,8 +48823,8 @@ __func__.9940:
 	.byte	0x7c
 	.sleb128 0
 	.byte	0x22
-	.4byte	.LVL156
-	.4byte	.LVL157
+	.4byte	.LVL146
+	.4byte	.LVL147
 	.2byte	0xb
 	.byte	0x72
 	.sleb128 0
@@ -48769,21 +48838,21 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST57:
-	.4byte	.LVL151
-	.4byte	.LVL153
+.LLST52:
+	.4byte	.LVL141
+	.4byte	.LVL143
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL153
-	.4byte	.LVL156
+	.4byte	.LVL143
+	.4byte	.LVL146
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL156
-	.4byte	.LVL158
+	.4byte	.LVL146
+	.4byte	.LVL148
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL158
-	.4byte	.LVL159
+	.4byte	.LVL148
+	.4byte	.LVL149
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
@@ -48792,182 +48861,194 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST44:
-	.4byte	.LVL111
-	.4byte	.LVL114
+.LLST38:
+	.4byte	.LVL97
+	.4byte	.LVL101
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL114
-	.4byte	.LVL115
+	.4byte	.LVL101
+	.4byte	.LVL102
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL115
+	.4byte	.LVL102
 	.4byte	.LFE249
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST45:
-	.4byte	.LVL112
-	.4byte	.LVL113
+.LLST39:
+	.4byte	.LVL98
+	.4byte	.LVL100
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL115
-	.4byte	.LVL139
+	.4byte	.LVL102
+	.4byte	.LVL129
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL139
+	.4byte	.LVL129
 	.4byte	.LFE249
-	.2byte	0x6
+	.2byte	0x7
 	.byte	0x74
 	.sleb128 0
-	.byte	0x75
-	.sleb128 0
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
 	.byte	0x22
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST46:
-	.4byte	.LVL117
-	.4byte	.LVL120
+.LLST40:
+	.4byte	.LVL105
+	.4byte	.LVL108
 	.2byte	0x1
 	.byte	0x5c
-	.4byte	.LVL120
-	.4byte	.LVL126
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL129
-	.4byte	.LVL134
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL135
-	.4byte	.LVL136
+	.4byte	.LVL108
+	.4byte	.LVL118
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL137
+	.byte	0x52
+	.4byte	.LVL119
 	.4byte	.LFE249
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST47:
-	.4byte	.LVL116
-	.4byte	.LVL118
+.LLST41:
+	.4byte	.LVL103
+	.4byte	.LVL106
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL118
-	.4byte	.LVL124
-	.2byte	0x7
+	.byte	0x56
+	.4byte	.LVL106
+	.4byte	.LVL116
+	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
 	.byte	0x22
-	.4byte	.LVL127
-	.4byte	.LVL129
+	.4byte	.LVL118
+	.4byte	.LVL119
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL129
-	.4byte	.LVL133
-	.2byte	0x7
+	.byte	0x56
+	.4byte	.LVL119
+	.4byte	.LVL123
+	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
 	.byte	0x22
-	.4byte	.LVL135
-	.4byte	.LVL138
-	.2byte	0x7
+	.4byte	.LVL125
+	.4byte	.LVL128
+	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x7e
-	.sleb128 0
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST48:
-	.4byte	.LVL121
-	.4byte	.LVL127
+.LLST42:
+	.4byte	.LVL111
+	.4byte	.LVL114
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL129
-	.4byte	.LFE249
+	.byte	0x55
+	.4byte	.LVL114
+	.4byte	.LVL116
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL119
+	.4byte	.LVL122
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x55
+	.4byte	.LVL122
+	.4byte	.LVL123
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL125
+	.4byte	.LVL126
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST49:
-	.4byte	.LVL116
-	.4byte	.LVL117
+.LLST43:
+	.4byte	.LVL104
+	.4byte	.LVL105
 	.2byte	0xe
-	.byte	0x73
+	.byte	0x76
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x76
+	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL117
-	.4byte	.LVL127
+	.4byte	.LVL105
+	.4byte	.LVL118
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL127
-	.4byte	.LVL128
+	.byte	0x5b
+	.4byte	.LVL118
+	.4byte	.LVL119
 	.2byte	0xe
-	.byte	0x73
-	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
 	.byte	0x76
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x1e
-	.byte	0x9f
-	.4byte	.LVL128
-	.4byte	.LVL129
-	.2byte	0x10
 	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x71
-	.sleb128 4
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL129
+	.4byte	.LVL119
 	.4byte	.LFE249
 	.2byte	0x1
-	.byte	0x56
-	.4byte	0
+	.byte	0x5b
 	.4byte	0
-.LLST50:
-	.4byte	.LVL121
-	.4byte	.LVL122
+	.4byte	0
+.LLST44:
+	.4byte	.LVL112
+	.4byte	.LVL113
 	.2byte	0xe
-	.byte	0x7b
+	.byte	0x75
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -48979,14 +49060,14 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL122
-	.4byte	.LVL123
+	.4byte	.LVL113
+	.4byte	.LVL115
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL129
-	.4byte	.LVL130
+	.4byte	.LVL119
+	.4byte	.LVL120
 	.2byte	0xe
-	.byte	0x7b
+	.byte	0x75
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -48998,15 +49079,15 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL130
-	.4byte	.LVL131
+	.4byte	.LVL120
+	.4byte	.LVL121
 	.2byte	0x10
-	.byte	0x7b
+	.byte	0x75
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x73
+	.byte	0x72
 	.sleb128 4
 	.byte	0x94
 	.byte	0x2
@@ -49015,35 +49096,40 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL131
-	.4byte	.LVL132
+	.4byte	.LVL121
+	.4byte	.LVL122
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST51:
-	.4byte	.LVL119
-	.4byte	.LVL125
+.LLST45:
+	.4byte	.LVL107
+	.4byte	.LVL117
 	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL125
-	.4byte	.LVL127
+	.byte	0x53
+	.4byte	.LVL117
+	.4byte	.LVL118
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
 	.byte	0x75
 	.sleb128 0
 	.byte	0x22
-	.4byte	.LVL129
-	.4byte	.LVL135
+	.4byte	.LVL119
+	.4byte	.LVL124
 	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL135
-	.4byte	.LVL138
+	.byte	0x53
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 2
+	.4byte	.LVL125
+	.4byte	.LVL128
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL138
-	.4byte	.LVL140
+	.4byte	.LVL128
+	.4byte	.LVL130
 	.2byte	0x5
 	.byte	0x74
 	.sleb128 0
@@ -49052,55 +49138,81 @@ __func__.9940:
 	.byte	0x22
 	.4byte	0
 	.4byte	0
-.LLST42:
-	.4byte	.LVL106
+.LLST46:
+	.4byte	.LVL97
+	.4byte	.LVL99
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL102
 	.4byte	.LVL108
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
 	.4byte	.LVL108
 	.4byte	.LVL109
 	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL109
+	.byte	0x56
 	.4byte	.LVL110
+	.4byte	.LVL118
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL118
+	.4byte	.LVL119
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL119
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST185:
+	.4byte	.LVL687
+	.4byte	.LVL688
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL110
+	.4byte	.LVL689
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL695
 	.4byte	.LFE246
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST43:
-	.4byte	.LVL107
-	.4byte	.LVL109
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
+.LLST186:
+	.4byte	.LVL691
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL695
+	.4byte	.LFE246
+	.2byte	0x1
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST39:
-	.4byte	.LVL99
-	.4byte	.LVL102
+.LLST35:
+	.4byte	.LVL90
+	.4byte	.LVL93
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL102
-	.4byte	.LVL103
+	.4byte	.LVL93
+	.4byte	.LVL94
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL103
-	.4byte	.LVL105
+	.4byte	.LVL94
+	.4byte	.LVL96
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL105
+	.4byte	.LVL96
 	.4byte	.LFE245
 	.2byte	0x4
 	.byte	0xf3
@@ -49109,156 +49221,77 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST40:
-	.4byte	.LVL99
-	.4byte	.LVL105
+.LLST36:
+	.4byte	.LVL90
+	.4byte	.LVL96
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL105
+	.4byte	.LVL96
 	.4byte	.LFE245
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST41:
-	.4byte	.LVL100
-	.4byte	.LVL101
+.LLST37:
+	.4byte	.LVL91
+	.4byte	.LVL92
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL103
+	.4byte	.LVL94
 	.4byte	.LFE245
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
 .LLST33:
-	.4byte	.LVL81
 	.4byte	.LVL82
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
 	.4byte	.LVL83
-	.4byte	.LVL84
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL86
-	.4byte	.LVL91
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL95
-	.4byte	.LFE244
+	.byte	0x56
+	.4byte	.LVL83
+	.4byte	.LVL84
 	.2byte	0x1
-	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST34:
+	.byte	0x50
+	.4byte	.LVL85
 	.4byte	.LVL86
-	.4byte	.LVL88
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x50
 	.4byte	.LVL88
-	.4byte	.LVL90
-	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL95
 	.4byte	.LFE244
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST35:
+.LLST34:
 	.4byte	.LVL87
-	.4byte	.LVL88
-	.2byte	0x1
-	.byte	0x5c
-	.4byte	.LVL88
-	.4byte	.LVL97
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL98
-	.4byte	.LFE244
-	.2byte	0x1
-	.byte	0x58
-	.4byte	0
-	.4byte	0
-.LLST36:
-	.4byte	.LVL92
-	.4byte	.LVL94
-	.2byte	0x1
-	.byte	0x51
-	.4byte	0
-	.4byte	0
-.LLST37:
-	.4byte	.LVL85
-	.4byte	.LVL86
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST38:
 	.4byte	.LVL89
-	.4byte	.LVL93
-	.2byte	0x1
-	.byte	0x50
-	.4byte	0
-	.4byte	0
-.LLST177:
-	.4byte	.LVL635
-	.4byte	.LVL637-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL637-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST178:
-	.4byte	.LVL635
-	.4byte	.LVL637-1
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL637-1
-	.4byte	.LFE243
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST179:
-	.4byte	.LVL636
-	.4byte	.LVL641
-	.2byte	0x6
-	.byte	0x3
-	.4byte	gSysFreeQueue
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST180:
-	.4byte	.LVL638
-	.4byte	.LVL640
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x55
+	.4byte	.LVL89
+	.4byte	.LFE244
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
 	.4byte	0
 	.4byte	0
 .LLST198:
-	.4byte	.LVL770
-	.4byte	.LVL771
+	.4byte	.LVL778
+	.4byte	.LVL779
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL771
-	.4byte	.LVL772-1
+	.4byte	.LVL779
+	.4byte	.LVL780-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	gSysFreeQueue
-	.4byte	.LVL772-1
+	.4byte	.LVL780-1
 	.4byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49267,12 +49300,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST159:
-	.4byte	.LVL586
-	.4byte	.LVL587
+.LLST151:
+	.4byte	.LVL576
+	.4byte	.LVL577
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL587
+	.4byte	.LVL577
 	.4byte	.LFE239
 	.2byte	0x4
 	.byte	0xf3
@@ -49281,53 +49314,53 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST160:
-	.4byte	.LVL586
-	.4byte	.LVL588
+.LLST152:
+	.4byte	.LVL576
+	.4byte	.LVL578
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL588
-	.4byte	.LVL593-1
+	.4byte	.LVL578
+	.4byte	.LVL583-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL593-1
+	.4byte	.LVL583-1
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST161:
-	.4byte	.LVL592
-	.4byte	.LVL594
+.LLST153:
+	.4byte	.LVL582
+	.4byte	.LVL584
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL594
-	.4byte	.LVL595
+	.4byte	.LVL584
+	.4byte	.LVL585
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL596
+	.4byte	.LVL586
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST162:
-	.4byte	.LVL597
-	.4byte	.LVL599
+.LLST154:
+	.4byte	.LVL587
+	.4byte	.LVL589
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL599
-	.4byte	.LVL601
+	.4byte	.LVL589
+	.4byte	.LVL591
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL601
-	.4byte	.LVL602
+	.4byte	.LVL591
+	.4byte	.LVL592
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL602
+	.4byte	.LVL592
 	.4byte	.LFE239
 	.2byte	0x3
 	.byte	0x74
@@ -49335,13 +49368,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST163:
-	.4byte	.LVL589
-	.4byte	.LVL590
+.LLST155:
+	.4byte	.LVL579
+	.4byte	.LVL580
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL590
-	.4byte	.LVL591
+	.4byte	.LVL580
+	.4byte	.LVL581
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
@@ -49530,98 +49563,98 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST348:
-	.4byte	.LVL1463
-	.4byte	.LVL1465
+.LLST347:
+	.4byte	.LVL1470
+	.4byte	.LVL1472
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1472
-	.4byte	.LVL1477
+	.4byte	.LVL1479
+	.4byte	.LVL1484
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1477
-	.4byte	.LVL1478
+	.4byte	.LVL1484
+	.4byte	.LVL1485
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1478
-	.4byte	.LVL1496
+	.4byte	.LVL1485
+	.4byte	.LVL1503
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST349:
-	.4byte	.LVL1464
-	.4byte	.LVL1466
+.LLST348:
+	.4byte	.LVL1471
+	.4byte	.LVL1473
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1466
-	.4byte	.LVL1470
+	.4byte	.LVL1473
+	.4byte	.LVL1477
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1471
-	.4byte	.LVL1472
+	.4byte	.LVL1478
+	.4byte	.LVL1479
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1482
-	.4byte	.LVL1492
+	.4byte	.LVL1489
+	.4byte	.LVL1499
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1493
-	.4byte	.LVL1494
+	.4byte	.LVL1500
+	.4byte	.LVL1501
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1494
-	.4byte	.LVL1495-1
+	.4byte	.LVL1501
+	.4byte	.LVL1502-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1495
-	.4byte	.LVL1496
+	.4byte	.LVL1502
+	.4byte	.LVL1503
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1496
-	.4byte	.LVL1497
+	.4byte	.LVL1503
+	.4byte	.LVL1504
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1502
-	.4byte	.LVL1503-1
+	.4byte	.LVL1509
+	.4byte	.LVL1510-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST350:
-	.4byte	.LVL1474
-	.4byte	.LVL1479
+.LLST349:
+	.4byte	.LVL1481
+	.4byte	.LVL1486
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1486
-	.4byte	.LVL1491
+	.4byte	.LVL1493
+	.4byte	.LVL1498
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST351:
-	.4byte	.LVL1473
-	.4byte	.LVL1494
+.LLST350:
+	.4byte	.LVL1480
+	.4byte	.LVL1501
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST157:
-	.4byte	.LVL578
-	.4byte	.LVL584
+.LLST149:
+	.4byte	.LVL568
+	.4byte	.LVL574
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL585
+	.4byte	.LVL575
 	.4byte	.LFE233
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST158:
-	.4byte	.LVL579
-	.4byte	.LVL580
+.LLST150:
+	.4byte	.LVL569
+	.4byte	.LVL570
 	.2byte	0x13
 	.byte	0x73
 	.sleb128 0
@@ -49640,8 +49673,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL580
-	.4byte	.LVL581
+	.4byte	.LVL570
+	.4byte	.LVL571
 	.2byte	0x13
 	.byte	0x72
 	.sleb128 15
@@ -49660,8 +49693,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL581
-	.4byte	.LVL582-1
+	.4byte	.LVL571
+	.4byte	.LVL572-1
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -49684,68 +49717,68 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST344:
-	.4byte	.LVL1449
-	.4byte	.LVL1450
+.LLST343:
+	.4byte	.LVL1456
+	.4byte	.LVL1457
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1457
-	.4byte	.LVL1458
+	.4byte	.LVL1464
+	.4byte	.LVL1465
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1458
-	.4byte	.LVL1459
+	.4byte	.LVL1465
+	.4byte	.LVL1466
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1459
-	.4byte	.LVL1460
+	.4byte	.LVL1466
+	.4byte	.LVL1467
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST345:
-	.4byte	.LVL1438
-	.4byte	.LVL1441
+.LLST344:
+	.4byte	.LVL1445
+	.4byte	.LVL1448
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1450
-	.4byte	.LVL1451
+	.4byte	.LVL1457
+	.4byte	.LVL1458
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1452
-	.4byte	.LVL1453
+	.4byte	.LVL1459
+	.4byte	.LVL1460
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST346:
-	.4byte	.LVL1444
-	.4byte	.LVL1448
+.LLST345:
+	.4byte	.LVL1451
+	.4byte	.LVL1455
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1453
-	.4byte	.LVL1455
+	.4byte	.LVL1460
+	.4byte	.LVL1462
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1456
-	.4byte	.LVL1457
+	.4byte	.LVL1463
+	.4byte	.LVL1464
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST347:
-	.4byte	.LVL1436
-	.4byte	.LVL1447
+.LLST346:
+	.4byte	.LVL1443
+	.4byte	.LVL1454
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1450
 	.4byte	.LVL1457
+	.4byte	.LVL1464
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1460
-	.4byte	.LVL1461
+	.4byte	.LVL1467
+	.4byte	.LVL1468
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -49797,50 +49830,50 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST290:
-	.4byte	.LVL1164
-	.4byte	.LVL1166
+	.4byte	.LVL1172
+	.4byte	.LVL1174
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1176
-	.4byte	.LVL1177
+	.4byte	.LVL1184
+	.4byte	.LVL1185
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1177
-	.4byte	.LVL1178
+	.4byte	.LVL1185
+	.4byte	.LVL1186
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1178
-	.4byte	.LVL1179
+	.4byte	.LVL1186
+	.4byte	.LVL1187
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST291:
-	.4byte	.LVL1163
-	.4byte	.LVL1168
+	.4byte	.LVL1171
+	.4byte	.LVL1176
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1168
 	.4byte	.LVL1176
+	.4byte	.LVL1184
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL1176
-	.4byte	.LVL1179
+	.4byte	.LVL1184
+	.4byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1179
-	.4byte	.LVL1180
+	.4byte	.LVL1187
+	.4byte	.LVL1188
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1180
-	.4byte	.LVL1181
+	.4byte	.LVL1188
+	.4byte	.LVL1189
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49848,8 +49881,8 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1182
-	.4byte	.LVL1183
+	.4byte	.LVL1190
+	.4byte	.LVL1191
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49857,7 +49890,7 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1183
+	.4byte	.LVL1191
 	.4byte	.LFE229
 	.2byte	0x3
 	.byte	0x73
@@ -49866,53 +49899,53 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST292:
-	.4byte	.LVL1165
-	.4byte	.LVL1176
+	.4byte	.LVL1173
+	.4byte	.LVL1184
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1179
-	.4byte	.LVL1183
+	.4byte	.LVL1187
+	.4byte	.LVL1191
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST293:
-	.4byte	.LVL1163
-	.4byte	.LVL1168
+	.4byte	.LVL1171
+	.4byte	.LVL1176
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1168
-	.4byte	.LVL1173
+	.4byte	.LVL1176
+	.4byte	.LVL1181
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1174
-	.4byte	.LVL1176
+	.4byte	.LVL1182
+	.4byte	.LVL1184
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1176
-	.4byte	.LVL1179
+	.4byte	.LVL1184
+	.4byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1179
-	.4byte	.LVL1183
+	.4byte	.LVL1187
+	.4byte	.LVL1191
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST196:
-	.4byte	.LVL763
-	.4byte	.LVL765
+	.4byte	.LVL771
+	.4byte	.LVL773
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL765
-	.4byte	.LVL768
+	.4byte	.LVL773
+	.4byte	.LVL776
 	.2byte	0x4
 	.byte	0x75
 	.sleb128 -1022
 	.byte	0x9f
-	.4byte	.LVL768
+	.4byte	.LVL776
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -49922,15 +49955,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST197:
-	.4byte	.LVL763
-	.4byte	.LVL764
+	.4byte	.LVL771
+	.4byte	.LVL772
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL764
-	.4byte	.LVL768
+	.4byte	.LVL772
+	.4byte	.LVL776
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL768
+	.4byte	.LVL776
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -50099,16 +50132,16 @@ __func__.9940:
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST445:
-	.4byte	.LVL1961
-	.4byte	.LVL1964
+.LLST444:
+	.4byte	.LVL1949
+	.4byte	.LVL1952
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1964
-	.4byte	.LVL1965-1
+	.4byte	.LVL1952
+	.4byte	.LVL1953-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1965-1
+	.4byte	.LVL1953-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50117,16 +50150,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST446:
-	.4byte	.LVL1961
-	.4byte	.LVL1963
+.LLST445:
+	.4byte	.LVL1949
+	.4byte	.LVL1951
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1963
-	.4byte	.LVL1965-1
+	.4byte	.LVL1951
+	.4byte	.LVL1953-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1965-1
+	.4byte	.LVL1953-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50135,16 +50168,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST447:
-	.4byte	.LVL1961
-	.4byte	.LVL1962
+.LLST446:
+	.4byte	.LVL1949
+	.4byte	.LVL1950
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1962
-	.4byte	.LVL1965-1
+	.4byte	.LVL1950
+	.4byte	.LVL1953-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1965-1
+	.4byte	.LVL1953-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50153,16 +50186,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST427:
-	.4byte	.LVL1866
-	.4byte	.LVL1869
+.LLST426:
+	.4byte	.LVL1868
+	.4byte	.LVL1871
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1869
-	.4byte	.LVL1870-1
+	.4byte	.LVL1871
+	.4byte	.LVL1872-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1870-1
+	.4byte	.LVL1872-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50171,16 +50204,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST428:
-	.4byte	.LVL1866
+.LLST427:
 	.4byte	.LVL1868
+	.4byte	.LVL1870
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1868
-	.4byte	.LVL1870-1
+	.4byte	.LVL1870
+	.4byte	.LVL1872-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1870-1
+	.4byte	.LVL1872-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50189,16 +50222,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST429:
-	.4byte	.LVL1866
-	.4byte	.LVL1867
+.LLST428:
+	.4byte	.LVL1868
+	.4byte	.LVL1869
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1867
-	.4byte	.LVL1870-1
+	.4byte	.LVL1869
+	.4byte	.LVL1872-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1870-1
+	.4byte	.LVL1872-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50207,83 +50240,83 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST385:
-	.4byte	.LVL1632
-	.4byte	.LVL1633
+.LLST372:
+	.4byte	.LVL1588
+	.4byte	.LVL1589
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1633
-	.4byte	.LVL1634
+	.4byte	.LVL1589
+	.4byte	.LVL1590
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1634
-	.4byte	.LVL1635-1
+	.4byte	.LVL1590
+	.4byte	.LVL1592-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1635-1
-	.4byte	.LVL1638
+	.4byte	.LVL1592-1
+	.4byte	.LVL1594
 	.2byte	0x1
-	.byte	0x56
-	.4byte	.LVL1638
-	.4byte	.LVL1653
+	.byte	0x57
+	.4byte	.LVL1594
+	.4byte	.LVL1609
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1653
-	.4byte	.LVL1654
+	.4byte	.LVL1609
+	.4byte	.LVL1610
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1654
+	.4byte	.LVL1610
 	.4byte	.LFE221
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST386:
-	.4byte	.LVL1632
-	.4byte	.LVL1633
+.LLST373:
+	.4byte	.LVL1588
+	.4byte	.LVL1589
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1633
-	.4byte	.LVL1634
+	.4byte	.LVL1589
+	.4byte	.LVL1590
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1634
-	.4byte	.LVL1635-1
+	.4byte	.LVL1590
+	.4byte	.LVL1591
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1635-1
-	.4byte	.LVL1653
+	.4byte	.LVL1591
+	.4byte	.LVL1609
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1653
+	.4byte	.LVL1609
 	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST387:
-	.4byte	.LVL1639
-	.4byte	.LVL1644
+.LLST374:
+	.4byte	.LVL1595
+	.4byte	.LVL1600
 	.2byte	0x1
-	.byte	0x56
+	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST388:
-	.4byte	.LVL1640
-	.4byte	.LVL1641
+.LLST375:
+	.4byte	.LVL1596
+	.4byte	.LVL1597
 	.2byte	0x21
 	.byte	0x74
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x76
+	.byte	0x77
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -50310,52 +50343,52 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST389:
-	.4byte	.LVL1637
-	.4byte	.LVL1642
+.LLST376:
+	.4byte	.LVL1593
+	.4byte	.LVL1598
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1642
-	.4byte	.LVL1653
+	.4byte	.LVL1598
+	.4byte	.LVL1609
 	.2byte	0x1
-	.byte	0x57
+	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST390:
-	.4byte	.LVL1649
-	.4byte	.LVL1650-1
+.LLST377:
+	.4byte	.LVL1605
+	.4byte	.LVL1606-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST430:
-	.4byte	.LVL1871
-	.4byte	.LVL1874
+.LLST429:
+	.4byte	.LVL1873
+	.4byte	.LVL1877
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1874
 	.4byte	.LVL1877
+	.4byte	.LVL1879
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1877
 	.4byte	.LVL1879
+	.4byte	.LVL1882
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1879
-	.4byte	.LVL1959
+	.4byte	.LVL1882
+	.4byte	.LVL1947
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1959
-	.4byte	.LVL1960
+	.4byte	.LVL1947
+	.4byte	.LVL1948
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1960
+	.4byte	.LVL1948
 	.4byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50364,186 +50397,140 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST431:
-	.4byte	.LVL1871
+.LLST430:
 	.4byte	.LVL1873
+	.4byte	.LVL1876
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1873
-	.4byte	.LVL1877
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1877
-	.4byte	.LVL1881
+	.4byte	.LVL1876
+	.4byte	.LVL1878-1
 	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1881
-	.4byte	.LVL1906
+	.byte	0x53
+	.4byte	.LVL1878-1
+	.4byte	.LVL1879
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL1879
+	.4byte	.LVL1883
 	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1906
-	.4byte	.LVL1908
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
 	.byte	0x51
-	.byte	0x9f
-	.4byte	.LVL1908
-	.4byte	.LVL1959
-	.2byte	0x1
-	.byte	0x58
-	.4byte	.LVL1959
+	.4byte	.LVL1883
+	.4byte	.LVL1947
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL1947
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST432:
-	.4byte	.LVL1871
-	.4byte	.LVL1872
+.LLST431:
+	.4byte	.LVL1873
+	.4byte	.LVL1874
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1872
-	.4byte	.LVL1877
+	.4byte	.LVL1874
+	.4byte	.LVL1879
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1877
-	.4byte	.LVL1880
+	.sleb128 -84
+	.4byte	.LVL1879
+	.4byte	.LVL1881
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1880
-	.4byte	.LVL1908
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1908
-	.4byte	.LVL1909
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1909
-	.4byte	.LVL1959
+	.4byte	.LVL1881
+	.4byte	.LFE220
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -80
-	.4byte	.LVL1959
-	.4byte	.LFE220
-	.2byte	0x1
-	.byte	0x52
+	.sleb128 -84
 	.4byte	0
 	.4byte	0
-.LLST433:
-	.4byte	.LVL1871
-	.4byte	.LVL1875-1
+.LLST432:
+	.4byte	.LVL1873
+	.4byte	.LVL1875
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1875-1
-	.4byte	.LVL1876
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1876
-	.4byte	.LVL1877
+	.4byte	.LVL1875
+	.4byte	.LVL1878-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1878-1
+	.4byte	.LVL1879
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -96
-	.4byte	.LVL1877
-	.4byte	.LVL1878
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1878
-	.4byte	.LVL1910
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1910
-	.4byte	.LVL1911-1
+	.sleb128 -88
+	.4byte	.LVL1879
+	.4byte	.LVL1880
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1911-1
+	.4byte	.LVL1880
 	.4byte	.LFE220
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	0
-	.4byte	0
-.LLST434:
-	.4byte	.LVL1935
-	.4byte	.LVL1938
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
 	.4byte	0
 	.4byte	0
-.LLST435:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST433:
+	.4byte	.LVL1918
+	.4byte	.LVL1940
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1888
+	.4byte	0
+	.4byte	0
+.LLST434:
 	.4byte	.LVL1891
+	.4byte	.LVL1892
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1892
+	.4byte	.LVL1894
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1912
-	.4byte	.LVL1959
+	.4byte	.LVL1895
+	.4byte	.LVL1942
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST436:
-	.4byte	.LVL1883
-	.4byte	.LVL1884
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL1884
-	.4byte	.LVL1907
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	.LVL1907
-	.4byte	.LVL1910
-	.2byte	0x3
-	.byte	0x7a
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1910
-	.4byte	.LVL1959
-	.2byte	0x1
-	.byte	0x5a
-	.4byte	0
-	.4byte	0
-.LLST437:
+.LLST435:
+	.4byte	.LVL1885
 	.4byte	.LVL1886
-	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1887-1
-	.4byte	.LVL1896
+	.4byte	.LVL1886
+	.4byte	.LVL1947
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -76
-	.4byte	.LVL1896
-	.4byte	.LVL1898
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST436:
+	.4byte	.LVL1888
+	.4byte	.LVL1892
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1898
-	.4byte	.LVL1959
+	.4byte	.LVL1892
+	.4byte	.LVL1947
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST438:
-	.4byte	.LVL1934
-	.4byte	.LVL1936
+.LLST437:
+	.4byte	.LVL1916
+	.4byte	.LVL1917
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1936
-	.4byte	.LVL1937
+	.4byte	.LVL1917
+	.4byte	.LVL1919
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.4byte	.LVL1937
-	.4byte	.LVL1939-1
+	.4byte	.LVL1919
+	.4byte	.LVL1920-1
 	.2byte	0xb
 	.byte	0x3
 	.4byte	req_prgm
@@ -50555,84 +50542,66 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST439:
-	.4byte	.LVL1924
-	.4byte	.LVL1929
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1932
-	.4byte	.LVL1933-1
+.LLST438:
+	.4byte	.LVL1906
+	.4byte	.LVL1911
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1933-1
-	.4byte	.LVL1950
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1950
-	.4byte	.LVL1951
+	.byte	0x5b
+	.4byte	.LVL1914
+	.4byte	.LVL1930
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1951
-	.4byte	.LVL1959
+	.byte	0x5b
+	.4byte	.LVL1930
+	.4byte	.LVL1931
 	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1931
+	.4byte	.LVL1940
+	.2byte	0x1
+	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST440:
-	.4byte	.LVL1886
-	.4byte	.LVL1887-1
+.LLST439:
+	.4byte	.LVL1889
+	.4byte	.LVL1890
 	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1887-1
-	.4byte	.LVL1896
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1896
-	.4byte	.LVL1897
+	.byte	0x53
+	.4byte	.LVL1890
+	.4byte	.LVL1892
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1897
-	.4byte	.LVL1903
+	.4byte	.LVL1892
+	.4byte	.LVL1895
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1903
-	.4byte	.LVL1904
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1905
-	.4byte	.LVL1912
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1912
-	.4byte	.LVL1913
+	.sleb128 -96
+	.4byte	.LVL1895
+	.4byte	.LVL1896
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1913
-	.4byte	.LVL1928
+	.4byte	.LVL1896
+	.4byte	.LVL1910
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
-	.4byte	.LVL1928
-	.4byte	.LVL1929
+	.sleb128 -96
+	.4byte	.LVL1910
+	.4byte	.LVL1911
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1929
-	.4byte	.LVL1959
+	.4byte	.LVL1911
+	.4byte	.LVL1947
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -96
 	.4byte	0
 	.4byte	0
-.LLST441:
-	.4byte	.LVL1920
-	.4byte	.LVL1921
+.LLST440:
+	.4byte	.LVL1902
+	.4byte	.LVL1903
 	.2byte	0x1f
-	.byte	0x74
+	.byte	0x75
 	.sleb128 7
 	.byte	0x94
 	.byte	0x1
@@ -50647,7 +50616,7 @@ __func__.9940:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -96
 	.byte	0x6
 	.byte	0x16
 	.byte	0x14
@@ -50661,125 +50630,108 @@ __func__.9940:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.4byte	.LVL1921
-	.4byte	.LVL1922
+	.4byte	.LVL1903
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1922
-	.4byte	.LVL1925
+	.4byte	.LVL1904
+	.4byte	.LVL1907
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1925
-	.4byte	.LVL1929
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1932
-	.4byte	.LVL1959
+	.4byte	.LVL1907
+	.4byte	.LVL1911
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1914
+	.4byte	.LVL1940
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
 	.4byte	0
 	.4byte	0
-.LLST442:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST441:
+	.4byte	.LVL1891
+	.4byte	.LVL1892
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1900
-	.4byte	.LVL1901
-	.2byte	0x1
-	.byte	0x51
-	.4byte	.LVL1901
-	.4byte	.LVL1903-1
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1940
-	.4byte	.LVL1942
+	.4byte	.LVL1921
+	.4byte	.LVL1923
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1944
-	.4byte	.LVL1945
+	.4byte	.LVL1925
+	.4byte	.LVL1926
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1945
-	.4byte	.LVL1947
+	.4byte	.LVL1926
+	.4byte	.LVL1928
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -72
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.sleb128 -80
+	.4byte	.LVL1932
+	.4byte	.LVL1939
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -72
+	.sleb128 -80
 	.4byte	0
 	.4byte	0
-.LLST443:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST442:
+	.4byte	.LVL1891
+	.4byte	.LVL1892
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1900
-	.4byte	.LVL1904
+	.4byte	.LVL1922
+	.4byte	.LVL1923
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1905
-	.4byte	.LVL1912
+	.4byte	.LVL1926
+	.4byte	.LVL1927
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1941
-	.4byte	.LVL1942
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1945
-	.4byte	.LVL1946
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.4byte	.LVL1932
+	.4byte	.LVL1939
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST444:
-	.4byte	.LVL1887
-	.4byte	.LVL1888
+.LLST443:
+	.4byte	.LVL1891
+	.4byte	.LVL1892
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL1888
-	.4byte	.LVL1889
+	.4byte	.LVL1892
+	.4byte	.LVL1894
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1912
-	.4byte	.LVL1916
+	.byte	0x55
+	.4byte	.LVL1895
+	.4byte	.LVL1898
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1919
-	.4byte	.LVL1931
+	.byte	0x55
+	.4byte	.LVL1901
+	.4byte	.LVL1913
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1932
-	.4byte	.LVL1959
+	.byte	0x55
+	.4byte	.LVL1914
+	.4byte	.LVL1941
 	.2byte	0x1
-	.byte	0x54
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST377:
-	.4byte	.LVL1604
-	.4byte	.LVL1607-1
+.LLST382:
+	.4byte	.LVL1638
+	.4byte	.LVL1641-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1607-1
-	.4byte	.LVL1607
+	.4byte	.LVL1641-1
+	.4byte	.LVL1641
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1607
+	.4byte	.LVL1641
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50788,16 +50740,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST378:
-	.4byte	.LVL1604
-	.4byte	.LVL1607-1
+.LLST383:
+	.4byte	.LVL1638
+	.4byte	.LVL1641-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1607-1
-	.4byte	.LVL1625
+	.4byte	.LVL1641-1
+	.4byte	.LVL1659
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1625
+	.4byte	.LVL1659
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50806,12 +50758,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST379:
-	.4byte	.LVL1604
-	.4byte	.LVL1605
+.LLST384:
+	.4byte	.LVL1638
+	.4byte	.LVL1639
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1605
+	.4byte	.LVL1639
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50820,16 +50772,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST380:
-	.4byte	.LVL1604
-	.4byte	.LVL1606
+.LLST385:
+	.4byte	.LVL1638
+	.4byte	.LVL1640
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1606
-	.4byte	.LVL1625
+	.4byte	.LVL1640
+	.4byte	.LVL1659
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1625
+	.4byte	.LVL1659
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50838,67 +50790,67 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST381:
-	.4byte	.LVL1607
-	.4byte	.LVL1625
+.LLST386:
+	.4byte	.LVL1641
+	.4byte	.LVL1659
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST382:
-	.4byte	.LVL1616
-	.4byte	.LVL1623
+.LLST387:
+	.4byte	.LVL1650
+	.4byte	.LVL1657
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST383:
-	.4byte	.LVL1608
-	.4byte	.LVL1609
+.LLST388:
+	.4byte	.LVL1642
+	.4byte	.LVL1643
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1618
-	.4byte	.LVL1619
+	.4byte	.LVL1652
+	.4byte	.LVL1653
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST384:
-	.4byte	.LVL1615
-	.4byte	.LVL1617-1
+.LLST389:
+	.4byte	.LVL1649
+	.4byte	.LVL1651-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 12
 	.4byte	0
 	.4byte	0
-.LLST410:
-	.4byte	.LVL1815
-	.4byte	.LVL1818
+.LLST409:
+	.4byte	.LVL1817
+	.4byte	.LVL1820
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1818
-	.4byte	.LVL1821
+	.4byte	.LVL1820
+	.4byte	.LVL1823
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1824
+	.4byte	.LVL1823
+	.4byte	.LVL1826
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1824
-	.4byte	.LVL1864
+	.4byte	.LVL1826
+	.4byte	.LVL1866
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1864
-	.4byte	.LVL1865
+	.4byte	.LVL1866
+	.4byte	.LVL1867
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1865
+	.4byte	.LVL1867
 	.4byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50907,118 +50859,118 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST411:
-	.4byte	.LVL1815
+.LLST410:
 	.4byte	.LVL1817
+	.4byte	.LVL1819
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1817
-	.4byte	.LVL1821
+	.4byte	.LVL1819
+	.4byte	.LVL1823
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1821
-	.4byte	.LVL1825-1
+	.4byte	.LVL1823
+	.4byte	.LVL1827
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1825-1
-	.4byte	.LVL1864
+	.4byte	.LVL1827
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST412:
-	.4byte	.LVL1815
-	.4byte	.LVL1816
+.LLST411:
+	.4byte	.LVL1817
+	.4byte	.LVL1818
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1816
-	.4byte	.LVL1821
+	.4byte	.LVL1818
+	.4byte	.LVL1823
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1821
 	.4byte	.LVL1823
+	.4byte	.LVL1825
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1823
+	.4byte	.LVL1825
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST413:
-	.4byte	.LVL1815
-	.4byte	.LVL1819-1
+.LLST412:
+	.4byte	.LVL1817
+	.4byte	.LVL1821-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1819-1
-	.4byte	.LVL1821
+	.4byte	.LVL1821-1
+	.4byte	.LVL1823
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1821
-	.4byte	.LVL1822
+	.4byte	.LVL1823
+	.4byte	.LVL1824
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1822
+	.4byte	.LVL1824
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST414:
-	.4byte	.LVL1815
-	.4byte	.LVL1820
+.LLST413:
+	.4byte	.LVL1817
+	.4byte	.LVL1822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST415:
-	.4byte	.LVL1827
-	.4byte	.LVL1828
+.LLST414:
+	.4byte	.LVL1829
+	.4byte	.LVL1830
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1828
-	.4byte	.LVL1864
+	.4byte	.LVL1830
+	.4byte	.LVL1866
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST416:
-	.4byte	.LVL1830
-	.4byte	.LVL1833
+.LLST415:
+	.4byte	.LVL1832
+	.4byte	.LVL1835
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1833
-	.4byte	.LVL1864
+	.4byte	.LVL1835
+	.4byte	.LVL1866
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST417:
-	.4byte	.LVL1849
-	.4byte	.LVL1850
+.LLST416:
+	.4byte	.LVL1851
+	.4byte	.LVL1852
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1850
-	.4byte	.LVL1851-1
+	.4byte	.LVL1852
+	.4byte	.LVL1853-1
 	.2byte	0x12
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page
@@ -51036,139 +50988,139 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST418:
-	.4byte	.LVL1831
+.LLST417:
 	.4byte	.LVL1833
+	.4byte	.LVL1835
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1833
-	.4byte	.LVL1864
+	.4byte	.LVL1835
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST419:
-	.4byte	.LVL1842
-	.4byte	.LVL1843
+.LLST418:
+	.4byte	.LVL1844
+	.4byte	.LVL1845
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1843
-	.4byte	.LVL1848
+	.4byte	.LVL1845
+	.4byte	.LVL1850
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1861
-	.4byte	.LVL1864
+	.4byte	.LVL1863
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST420:
-	.4byte	.LVL1831
+.LLST419:
 	.4byte	.LVL1833
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1847
+	.4byte	.LVL1835
+	.4byte	.LVL1849
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1848
-	.4byte	.LVL1864
+	.4byte	.LVL1850
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST421:
-	.4byte	.LVL1831
-	.4byte	.LVL1832
+.LLST420:
+	.4byte	.LVL1833
+	.4byte	.LVL1834
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1832
-	.4byte	.LVL1833
+	.4byte	.LVL1834
+	.4byte	.LVL1835
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1833
 	.4byte	.LVL1835
+	.4byte	.LVL1837
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1835
-	.4byte	.LVL1836-1
+	.4byte	.LVL1837
+	.4byte	.LVL1838-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1836-1
-	.4byte	.LVL1839
+	.4byte	.LVL1838-1
+	.4byte	.LVL1841
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1839
-	.4byte	.LVL1840
+	.4byte	.LVL1841
+	.4byte	.LVL1842
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1840
-	.4byte	.LVL1841
+	.4byte	.LVL1842
+	.4byte	.LVL1843
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1841
-	.4byte	.LVL1864
+	.4byte	.LVL1843
+	.4byte	.LVL1866
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
 	.4byte	0
 	.4byte	0
-.LLST422:
-	.4byte	.LVL1815
-	.4byte	.LVL1820
+.LLST421:
+	.4byte	.LVL1817
+	.4byte	.LVL1822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1855
+	.4byte	.LVL1835
+	.4byte	.LVL1857
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1855
-	.4byte	.LVL1858
+	.4byte	.LVL1857
+	.4byte	.LVL1860
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1858
-	.4byte	.LVL1864
+	.4byte	.LVL1860
+	.4byte	.LVL1866
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST423:
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+.LLST422:
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1855
+	.4byte	.LVL1835
+	.4byte	.LVL1857
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1855
-	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.4byte	.LVL1858
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1856
-	.4byte	.LVL1857
+	.4byte	.LVL1858
+	.4byte	.LVL1859
 	.2byte	0x6
 	.byte	0x7b
 	.sleb128 0
@@ -51176,60 +51128,60 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1857
-	.4byte	.LVL1858
+	.4byte	.LVL1859
+	.4byte	.LVL1860
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1858
-	.4byte	.LVL1864
+	.4byte	.LVL1860
+	.4byte	.LVL1866
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST424:
-	.4byte	.LVL1821
-	.4byte	.LVL1833
+.LLST423:
+	.4byte	.LVL1823
+	.4byte	.LVL1835
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1833
-	.4byte	.LVL1864
+	.4byte	.LVL1835
+	.4byte	.LVL1866
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1864
+	.4byte	.LVL1866
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST425:
-	.4byte	.LVL1837
-	.4byte	.LVL1838
+.LLST424:
+	.4byte	.LVL1839
+	.4byte	.LVL1840
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1848
-	.4byte	.LVL1853
+	.4byte	.LVL1850
+	.4byte	.LVL1855
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST426:
-	.4byte	.LVL1862
-	.4byte	.LVL1863-1
+.LLST425:
+	.4byte	.LVL1864
+	.4byte	.LVL1865-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST454:
-	.4byte	.LVL2067
-	.4byte	.LVL2068
+.LLST453:
+	.4byte	.LVL2056
+	.4byte	.LVL2057
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51237,8 +51189,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2068
-	.4byte	.LVL2069
+	.4byte	.LVL2057
+	.4byte	.LVL2058
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51246,8 +51198,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2069
-	.4byte	.LVL2070
+	.4byte	.LVL2058
+	.4byte	.LVL2059
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51257,106 +51209,106 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST450:
-	.4byte	.LVL2021
-	.4byte	.LVL2023
+.LLST449:
+	.4byte	.LVL2010
+	.4byte	.LVL2012
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2025
-	.4byte	.LVL2026
+	.4byte	.LVL2014
+	.4byte	.LVL2015
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2036
-	.4byte	.LVL2038
+	.4byte	.LVL2025
+	.4byte	.LVL2027
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2041
-	.4byte	.LVL2042
+	.4byte	.LVL2030
+	.4byte	.LVL2031
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2046
-	.4byte	.LVL2047
+	.4byte	.LVL2035
+	.4byte	.LVL2036
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2049
-	.4byte	.LVL2050
+	.4byte	.LVL2038
+	.4byte	.LVL2039
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2050
-	.4byte	.LVL2051-1
+	.4byte	.LVL2039
+	.4byte	.LVL2040-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2053
-	.4byte	.LVL2054
+	.4byte	.LVL2042
+	.4byte	.LVL2043
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST451:
-	.4byte	.LVL2025
-	.4byte	.LVL2029
+.LLST450:
+	.4byte	.LVL2014
+	.4byte	.LVL2018
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2050
-	.4byte	.LVL2052
+	.4byte	.LVL2039
+	.4byte	.LVL2041
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2053
-	.4byte	.LVL2054
+	.4byte	.LVL2042
+	.4byte	.LVL2043
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST452:
-	.4byte	.LVL2019
-	.4byte	.LVL2022
+.LLST451:
+	.4byte	.LVL2008
+	.4byte	.LVL2011
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL2022
-	.4byte	.LVL2024
+	.4byte	.LVL2011
+	.4byte	.LVL2013
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2036
-	.4byte	.LVL2039
+	.4byte	.LVL2025
+	.4byte	.LVL2028
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2040
-	.4byte	.LVL2045
+	.4byte	.LVL2029
+	.4byte	.LVL2034
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2045
-	.4byte	.LVL2046
+	.4byte	.LVL2034
+	.4byte	.LVL2035
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST453:
-	.4byte	.LVL2017
-	.4byte	.LVL2018
+.LLST452:
+	.4byte	.LVL2006
+	.4byte	.LVL2007
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2018
-	.4byte	.LVL2020
+	.4byte	.LVL2007
+	.4byte	.LVL2009
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2034
-	.4byte	.LVL2035
+	.4byte	.LVL2023
+	.4byte	.LVL2024
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2035
-	.4byte	.LVL2036
+	.4byte	.LVL2024
+	.4byte	.LVL2025
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST181:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST175:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL644
+	.4byte	.LVL634
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51365,12 +51317,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST182:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST176:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL644
+	.4byte	.LVL634
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51379,270 +51331,270 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST183:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST177:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL671
+	.4byte	.LVL634
+	.4byte	.LVL661
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL672
-	.4byte	.LVL674
+	.4byte	.LVL662
+	.4byte	.LVL664
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL675
-	.4byte	.LVL689
+	.4byte	.LVL665
+	.4byte	.LVL679
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL690
+	.4byte	.LVL680
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST184:
-	.4byte	.LVL642
-	.4byte	.LVL644
+.LLST178:
+	.4byte	.LVL632
+	.4byte	.LVL634
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL649
+	.4byte	.LVL634
+	.4byte	.LVL639
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL649
-	.4byte	.LVL650
+	.4byte	.LVL639
+	.4byte	.LVL640
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL650
-	.4byte	.LVL666
+	.4byte	.LVL640
+	.4byte	.LVL656
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL667
-	.4byte	.LVL684
+	.4byte	.LVL657
+	.4byte	.LVL674
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL685
+	.4byte	.LVL675
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST185:
-	.4byte	.LVL643
-	.4byte	.LVL644
+.LLST179:
+	.4byte	.LVL633
+	.4byte	.LVL634
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
-	.4byte	.LVL645
+	.4byte	.LVL634
+	.4byte	.LVL635
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL645
-	.4byte	.LVL649
+	.4byte	.LVL635
+	.4byte	.LVL639
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL649
-	.4byte	.LVL650
+	.4byte	.LVL639
+	.4byte	.LVL640
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL650
-	.4byte	.LVL651
+	.4byte	.LVL640
+	.4byte	.LVL641
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL651
-	.4byte	.LVL652
+	.4byte	.LVL641
+	.4byte	.LVL642
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL653
-	.4byte	.LVL654
+	.4byte	.LVL643
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL654
-	.4byte	.LVL657
+	.4byte	.LVL644
+	.4byte	.LVL647
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL657
-	.4byte	.LVL659
+	.4byte	.LVL647
+	.4byte	.LVL649
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL659
-	.4byte	.LVL660
+	.4byte	.LVL649
+	.4byte	.LVL650
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL661
-	.4byte	.LVL668
+	.4byte	.LVL651
+	.4byte	.LVL658
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL668
-	.4byte	.LVL669
+	.4byte	.LVL658
+	.4byte	.LVL659
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL670
-	.4byte	.LVL673
+	.4byte	.LVL660
+	.4byte	.LVL663
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL673
-	.4byte	.LVL676
+	.4byte	.LVL663
+	.4byte	.LVL666
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL676
-	.4byte	.LVL677
+	.4byte	.LVL666
+	.4byte	.LVL667
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL678
-	.4byte	.LVL679
+	.4byte	.LVL668
+	.4byte	.LVL669
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL679
-	.4byte	.LVL686
+	.4byte	.LVL669
+	.4byte	.LVL676
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL686
-	.4byte	.LVL687
+	.4byte	.LVL676
+	.4byte	.LVL677
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL688
-	.4byte	.LVL692
+	.4byte	.LVL678
+	.4byte	.LVL682
 	.2byte	0x1
-	.byte	0x57
-	.4byte	.LVL692
-	.4byte	.LVL693
+	.byte	0x57
+	.4byte	.LVL682
+	.4byte	.LVL683
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL694
-	.4byte	.LVL695
+	.4byte	.LVL684
+	.4byte	.LVL685
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL695
-	.4byte	.LVL696
+	.4byte	.LVL685
+	.4byte	.LVL686
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST186:
-	.4byte	.LVL663
-	.4byte	.LVL664-1
+.LLST180:
+	.4byte	.LVL653
+	.4byte	.LVL654-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL681
-	.4byte	.LVL682-1
+	.4byte	.LVL671
+	.4byte	.LVL672-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST187:
-	.4byte	.LVL642
-	.4byte	.LVL647
+.LLST181:
+	.4byte	.LVL632
+	.4byte	.LVL637
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL647
-	.4byte	.LVL648
+	.4byte	.LVL637
+	.4byte	.LVL638
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST188:
-	.4byte	.LVL642
-	.4byte	.LVL649
+.LLST182:
+	.4byte	.LVL632
+	.4byte	.LVL639
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL649
-	.4byte	.LVL655
+	.4byte	.LVL639
+	.4byte	.LVL645
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL656
-	.4byte	.LVL658
+	.4byte	.LVL646
+	.4byte	.LVL648
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL679
-	.4byte	.LVL694
+	.4byte	.LVL669
+	.4byte	.LVL684
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST189:
-	.4byte	.LVL642
-	.4byte	.LVL648
+.LLST183:
+	.4byte	.LVL632
+	.4byte	.LVL638
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST190:
-	.4byte	.LVL642
-	.4byte	.LVL646
+.LLST184:
+	.4byte	.LVL632
+	.4byte	.LVL636
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL646
-	.4byte	.LVL648
+	.4byte	.LVL636
+	.4byte	.LVL638
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL661
-	.4byte	.LVL679
+	.4byte	.LVL651
+	.4byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST194:
-	.4byte	.LVL756
-	.4byte	.LVL757
+	.4byte	.LVL764
+	.4byte	.LVL765
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL757
-	.4byte	.LVL758
+	.4byte	.LVL765
+	.4byte	.LVL766
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL760
-	.4byte	.LVL762
+	.4byte	.LVL768
+	.4byte	.LVL770
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
 .LLST195:
-	.4byte	.LVL701
-	.4byte	.LVL707
+	.4byte	.LVL709
+	.4byte	.LVL715
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL707
-	.4byte	.LVL714
+	.4byte	.LVL715
+	.4byte	.LVL722
 	.2byte	0x7
 	.byte	0x74
 	.sleb128 0
@@ -51650,16 +51602,16 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL716
-	.4byte	.LVL722
+	.4byte	.LVL724
+	.4byte	.LVL730
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL723
-	.4byte	.LVL726
+	.4byte	.LVL731
+	.4byte	.LVL734
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL727
-	.4byte	.LVL728
+	.4byte	.LVL735
+	.4byte	.LVL736
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51667,12 +51619,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL728
-	.4byte	.LVL731
+	.4byte	.LVL736
+	.4byte	.LVL739
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL737
-	.4byte	.LVL738
+	.4byte	.LVL745
+	.4byte	.LVL746
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_map_region_num
@@ -51684,12 +51636,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL738
-	.4byte	.LVL739-1
+	.4byte	.LVL746
+	.4byte	.LVL747-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL740
-	.4byte	.LVL741
+	.4byte	.LVL748
+	.4byte	.LVL749
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51697,12 +51649,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL741
-	.4byte	.LVL742-1
+	.4byte	.LVL749
+	.4byte	.LVL750-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL743
-	.4byte	.LVL744
+	.4byte	.LVL751
+	.4byte	.LVL752
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51714,12 +51666,12 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL744
-	.4byte	.LVL745-1
+	.4byte	.LVL752
+	.4byte	.LVL753-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL746
-	.4byte	.LVL747
+	.4byte	.LVL754
+	.4byte	.LVL755
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51737,12 +51689,12 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL747
-	.4byte	.LVL748-1
+	.4byte	.LVL755
+	.4byte	.LVL756-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL749
-	.4byte	.LVL750
+	.4byte	.LVL757
+	.4byte	.LVL758
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_blk_pre_plane
@@ -51754,12 +51706,12 @@ __func__.9940:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL750
-	.4byte	.LVL751-1
+	.4byte	.LVL758
+	.4byte	.LVL759-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL752
-	.4byte	.LVL753
+	.4byte	.LVL760
+	.4byte	.LVL761
 	.2byte	0x11
 	.byte	0x3
 	.4byte	c_ftl_nand_die_num
@@ -51774,8 +51726,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL753
-	.4byte	.LVL754
+	.4byte	.LVL761
+	.4byte	.LVL762
 	.2byte	0x1e
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -51799,8 +51751,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL754
-	.4byte	.LVL755-1
+	.4byte	.LVL762
+	.4byte	.LVL763-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -51902,16 +51854,16 @@ __func__.9940:
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST111:
-	.4byte	.LVL449
-	.4byte	.LVL451-1
+.LLST102:
+	.4byte	.LVL437
+	.4byte	.LVL439-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL451-1
-	.4byte	.LVL456
+	.4byte	.LVL439-1
+	.4byte	.LVL444
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL456
+	.4byte	.LVL444
 	.4byte	.LFE204
 	.2byte	0x4
 	.byte	0xf3
@@ -51920,21 +51872,21 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST112:
-	.4byte	.LVL450
-	.4byte	.LVL451-1
+.LLST103:
+	.4byte	.LVL438
+	.4byte	.LVL439-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL451-1
-	.4byte	.LVL452
+	.4byte	.LVL439-1
+	.4byte	.LVL440
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL452
-	.4byte	.LVL453
+	.4byte	.LVL440
+	.4byte	.LVL441
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL453
-	.4byte	.LVL454
+	.4byte	.LVL441
+	.4byte	.LVL442
 	.2byte	0x6
 	.byte	0x74
 	.sleb128 0
@@ -51942,94 +51894,94 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL454
-	.4byte	.LVL455
+	.4byte	.LVL442
+	.4byte	.LVL443
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST106:
-	.4byte	.LVL300
-	.4byte	.LVL302-1
+.LLST97:
+	.4byte	.LVL288
+	.4byte	.LVL290-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL302-1
+	.4byte	.LVL290-1
 	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST107:
-	.4byte	.LVL438
-	.4byte	.LVL440
+.LLST98:
+	.4byte	.LVL426
+	.4byte	.LVL428
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL440
-	.4byte	.LVL442
+	.4byte	.LVL428
+	.4byte	.LVL430
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL442
-	.4byte	.LVL444
+	.4byte	.LVL430
+	.4byte	.LVL432
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL445
-	.4byte	.LVL446
+	.4byte	.LVL433
+	.4byte	.LVL434
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL446
-	.4byte	.LVL447-1
+	.4byte	.LVL434
+	.4byte	.LVL435-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL447-1
-	.4byte	.LVL448
+	.4byte	.LVL435-1
+	.4byte	.LVL436
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL448
+	.4byte	.LVL436
 	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST108:
-	.4byte	.LVL301
-	.4byte	.LVL302-1
+.LLST99:
+	.4byte	.LVL289
+	.4byte	.LVL290-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL302-1
-	.4byte	.LVL303
+	.4byte	.LVL290-1
+	.4byte	.LVL291
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL303
-	.4byte	.LVL415
+	.4byte	.LVL291
+	.4byte	.LVL403
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL415
+	.4byte	.LVL403
 	.4byte	.LFE203
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST109:
-	.4byte	.LVL438
-	.4byte	.LVL439-1
+.LLST100:
+	.4byte	.LVL426
+	.4byte	.LVL427-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL442
-	.4byte	.LVL443
+	.4byte	.LVL430
+	.4byte	.LVL431
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST110:
-	.4byte	.LVL445
-	.4byte	.LVL447-1
+.LLST101:
+	.4byte	.LVL433
+	.4byte	.LVL435-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL448
+	.4byte	.LVL436
 	.4byte	.LFE203
 	.2byte	0x9
 	.byte	0x3
@@ -52123,7 +52075,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL13
-	.4byte	.LFE359
+	.4byte	.LFE358
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52156,12 +52108,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST52:
-	.4byte	.LVL141
-	.4byte	.LVL142-1
+.LLST47:
+	.4byte	.LVL131
+	.4byte	.LVL132-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL142-1
+	.4byte	.LVL132-1
 	.4byte	.LFE248
 	.2byte	0x4
 	.byte	0xf3
@@ -52170,12 +52122,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST58:
-	.4byte	.LVL160
-	.4byte	.LVL161-1
+.LLST53:
+	.4byte	.LVL150
+	.4byte	.LVL151-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL161-1
+	.4byte	.LVL151-1
 	.4byte	.LFE247
 	.2byte	0x4
 	.byte	0xf3
@@ -52184,12 +52136,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST70:
-	.4byte	.LVL198
-	.4byte	.LVL204
+.LLST65:
+	.4byte	.LVL190
+	.4byte	.LVL196
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL204
+	.4byte	.LVL196
+	.4byte	.LVL208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL210
 	.4byte	.LFE255
 	.2byte	0x4
 	.byte	0xf3
@@ -52198,13 +52161,24 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST71:
-	.4byte	.LVL199
-	.4byte	.LVL204
+.LLST66:
+	.4byte	.LVL191
+	.4byte	.LVL196
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL204
-	.4byte	.LVL215
+	.4byte	.LVL196
+	.4byte	.LVL207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL210
+	.4byte	.LFE255
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52212,19 +52186,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST72:
-	.4byte	.LVL207
-	.4byte	.LVL208
+.LLST67:
+	.4byte	.LVL198
+	.4byte	.LVL200
 	.2byte	0x5
 	.byte	0x72
 	.sleb128 0
 	.byte	0x36
 	.byte	0x1b
 	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL213-1
+	.4byte	.LVL200
+	.4byte	.LVL205-1
 	.2byte	0xd
-	.byte	0x78
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL210
+	.4byte	.LFE255
+	.2byte	0xd
+	.byte	0x7a
 	.sleb128 2
 	.byte	0x94
 	.byte	0x2
@@ -52238,9 +52227,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST73:
-	.4byte	.LVL201
-	.4byte	.LVL204
+.LLST68:
+	.4byte	.LVL193
+	.4byte	.LVL195
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL195
+	.4byte	.LVL196
 	.2byte	0xb
 	.byte	0x70
 	.sleb128 0
@@ -52250,8 +52243,8 @@ __func__.9940:
 	.4byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
-	.4byte	.LVL204
-	.4byte	.LVL206-1
+	.4byte	.LVL196
+	.4byte	.LVL197-1
 	.2byte	0xb
 	.byte	0x74
 	.sleb128 0
@@ -52261,42 +52254,79 @@ __func__.9940:
 	.4byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
+	.4byte	.LVL208
+	.4byte	.LVL210
+	.2byte	0x1
+	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST74:
-	.4byte	.LVL202
+.LLST69:
+	.4byte	.LVL193
+	.4byte	.LVL194
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL194
 	.4byte	.LVL203
-	.2byte	0x6
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL208
+	.4byte	.LVL209
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x75
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL209
+	.4byte	.LVL210
+	.2byte	0x10
 	.byte	0x72
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x7a
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL203
-	.4byte	.LVL212
+	.4byte	.LVL210
+	.4byte	.LFE255
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST75:
-	.4byte	.LVL207
-	.4byte	.LVL208
-	.2byte	0xd
-	.byte	0x72
-	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
-	.byte	0x31
-	.byte	0x24
-	.byte	0x3
-	.4byte	p_valid_page_count_table
-	.byte	0x6
-	.byte	0x22
-	.4byte	.LVL208
-	.4byte	.LVL213-1
-	.2byte	0x15
-	.byte	0x78
+.LLST70:
+	.4byte	.LVL199
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL204
+	.4byte	.LVL205-1
+	.2byte	0x1c
+	.byte	0x7a
 	.sleb128 2
 	.byte	0x94
 	.byte	0x2
@@ -52305,42 +52335,91 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
+	.byte	0x31
+	.byte	0x26
+	.byte	0x11
+	.sleb128 -1431655765
+	.byte	0x1e
 	.byte	0x31
 	.byte	0x24
 	.byte	0x3
 	.4byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
+	.4byte	.LVL210
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST76:
-	.4byte	.LVL209
+.LLST71:
+	.4byte	.LVL201
+	.4byte	.LVL202
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL202
+	.4byte	.LVL205-1
+	.2byte	0x1
+	.byte	0x53
 	.4byte	.LVL210
-	.2byte	0x6
+	.4byte	.LVL211
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x73
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL211
+	.4byte	.LFE255
+	.2byte	0x10
 	.byte	0x70
 	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL210
-	.4byte	.LVL213-1
-	.2byte	0x1
-	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST77:
-	.4byte	.LVL200
-	.4byte	.LVL215
+.LLST72:
+	.4byte	.LVL192
+	.4byte	.LVL207
 	.2byte	0x1
-	.byte	0x58
+	.byte	0x5a
+	.4byte	.LVL208
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST78:
-	.4byte	.LVL207
-	.4byte	.LVL208
+.LLST73:
+	.4byte	.LVL198
+	.4byte	.LVL200
 	.2byte	0xa
 	.byte	0x3
 	.4byte	p_data_block_list_table
@@ -52349,76 +52428,22 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.4byte	.LVL208
-	.4byte	.LVL213-1
+	.4byte	.LVL200
+	.4byte	.LVL205-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	0
-	.4byte	0
-.LLST79:
-	.4byte	.LVL216
-	.4byte	.LVL219
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL219
-	.4byte	.LVL221
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL221
-	.4byte	.LVL222-1
-	.2byte	0x1
-	.byte	0x50
-	.4byte	.LVL222-1
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL223
-	.4byte	.LFE258
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
-	.byte	0x9f
-	.4byte	0
-	.4byte	0
-.LLST80:
-	.4byte	.LVL216
-	.4byte	.LVL217
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL218
-	.4byte	.LVL223
-	.2byte	0x1
-	.byte	0x55
-	.4byte	0
-	.4byte	0
-.LLST81:
-	.4byte	.LVL216
-	.4byte	.LVL219
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	.LVL221
-	.4byte	.LVL222-1
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 12
-	.4byte	0
-	.4byte	0
-.LLST82:
-	.4byte	.LVL219
-	.4byte	.LVL221
+	.4byte	.LVL210
+	.4byte	.LFE255
 	.2byte	0x1
-	.byte	0x54
-	.4byte	0
+	.byte	0x52
 	.4byte	0
-.LLST86:
-	.4byte	.LVL244
-	.4byte	.LVL245
+	.4byte	0
+.LLST77:
+	.4byte	.LVL232
+	.4byte	.LVL233
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL245
+	.4byte	.LVL233
 	.4byte	.LFE269
 	.2byte	0x4
 	.byte	0xf3
@@ -52427,23 +52452,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST87:
-	.4byte	.LVL247
-	.4byte	.LVL248-1
+.LLST78:
+	.4byte	.LVL235
+	.4byte	.LVL236-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL248-1
-	.4byte	.LVL248
+	.4byte	.LVL236-1
+	.4byte	.LVL236
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL248
-	.4byte	.LVL249
+	.4byte	.LVL236
+	.4byte	.LVL237
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL249
+	.4byte	.LVL237
 	.4byte	.LFE275
 	.2byte	0x4
 	.byte	0xf3
@@ -52452,23 +52477,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST88:
-	.4byte	.LVL247
-	.4byte	.LVL248-1
+.LLST79:
+	.4byte	.LVL235
+	.4byte	.LVL236-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL248-1
-	.4byte	.LVL248
+	.4byte	.LVL236-1
+	.4byte	.LVL236
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL248
-	.4byte	.LVL250
+	.4byte	.LVL236
+	.4byte	.LVL238
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL250
+	.4byte	.LVL238
 	.4byte	.LFE275
 	.2byte	0x4
 	.byte	0xf3
@@ -52477,34 +52502,34 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST93:
-	.4byte	.LVL264
-	.4byte	.LVL266
+.LLST84:
+	.4byte	.LVL252
+	.4byte	.LVL254
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL267
+	.4byte	.LVL255
 	.4byte	.LFE285
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST94:
-	.4byte	.LVL265
-	.4byte	.LVL266
+.LLST85:
+	.4byte	.LVL253
+	.4byte	.LVL254
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL267
+	.4byte	.LVL255
 	.4byte	.LFE285
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST120:
-	.4byte	.LVL485
-	.4byte	.LVL487-1
+.LLST112:
+	.4byte	.LVL475
+	.4byte	.LVL477-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL487-1
+	.4byte	.LVL477-1
 	.4byte	.LFE300
 	.2byte	0x4
 	.byte	0xf3
@@ -52513,13 +52538,103 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST121:
-	.4byte	.LVL486
-	.4byte	.LVL487-1
+.LLST113:
+	.4byte	.LVL476
+	.4byte	.LVL477-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL487-1
-	.4byte	.LVL487
+	.4byte	.LVL477-1
+	.4byte	.LVL477
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST169:
+	.4byte	.LVL625
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL627-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST170:
+	.4byte	.LVL625
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL627-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST171:
+	.4byte	.LVL626
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL627-1
+	.4byte	.LVL631
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST172:
+	.4byte	.LVL626
+	.4byte	.LVL627-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL627-1
+	.4byte	.LVL631
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST173:
+	.4byte	.LVL626
+	.4byte	.LVL631
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST174:
+	.4byte	.LVL628
+	.4byte	.LVL630
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST187:
+	.4byte	.LVL697
+	.4byte	.LVL700-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL700-1
+	.4byte	.LVL704
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL704
+	.4byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52527,9 +52642,36 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
+.LLST188:
+	.4byte	.LVL697
+	.4byte	.LVL698
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL699
+	.4byte	.LVL704
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST189:
+	.4byte	.LVL697
+	.4byte	.LVL700-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST190:
+	.4byte	.LVL702
+	.4byte	.LVL703
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
 .LLST240:
-	.4byte	.LVL918
-	.4byte	.LVL922
+	.4byte	.LVL926
+	.4byte	.LVL930
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52537,8 +52679,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL923
-	.4byte	.LVL924
+	.4byte	.LVL931
+	.4byte	.LVL932
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52546,8 +52688,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL924
-	.4byte	.LVL925
+	.4byte	.LVL932
+	.4byte	.LVL933
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52558,36 +52700,36 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST282:
-	.4byte	.LVL1141
-	.4byte	.LVL1143
+	.4byte	.LVL1149
+	.4byte	.LVL1151
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1143
 	.4byte	.LVL1151
+	.4byte	.LVL1159
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1151
+	.4byte	.LVL1159
 	.4byte	.LFE347
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
 .LLST283:
-	.4byte	.LVL1142
-	.4byte	.LVL1144
+	.4byte	.LVL1150
+	.4byte	.LVL1152
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST303:
-	.4byte	.LVL1226
-	.4byte	.LVL1227
+	.4byte	.LVL1234
+	.4byte	.LVL1235
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1227
+	.4byte	.LVL1235
 	.4byte	.LFE320
 	.2byte	0x4
 	.byte	0xf3
@@ -52597,90 +52739,90 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST304:
-	.4byte	.LVL1227
-	.4byte	.LVL1228
+	.4byte	.LVL1235
+	.4byte	.LVL1236
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1229
-	.4byte	.LVL1233
+	.4byte	.LVL1237
+	.4byte	.LVL1241
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1233
-	.4byte	.LVL1234
+	.4byte	.LVL1241
+	.4byte	.LVL1242
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1235
+	.4byte	.LVL1243
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST305:
-	.4byte	.LVL1232
-	.4byte	.LVL1239
+	.4byte	.LVL1240
+	.4byte	.LVL1247
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1239
-	.4byte	.LVL1240
+	.4byte	.LVL1247
+	.4byte	.LVL1248
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1240
-	.4byte	.LVL1241
+	.4byte	.LVL1248
+	.4byte	.LVL1249
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1242
+	.4byte	.LVL1250
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST306:
-	.4byte	.LVL1238
-	.4byte	.LVL1240
+	.4byte	.LVL1246
+	.4byte	.LVL1248
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1242
-	.4byte	.LVL1243
+	.4byte	.LVL1250
+	.4byte	.LVL1251
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1244
+	.4byte	.LVL1252
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
 .LLST307:
-	.4byte	.LVL1245
-	.4byte	.LVL1247
+	.4byte	.LVL1253
+	.4byte	.LVL1255
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1247
-	.4byte	.LVL1253
+	.4byte	.LVL1255
+	.4byte	.LVL1261
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1253
-	.4byte	.LVL1254
+	.4byte	.LVL1261
+	.4byte	.LVL1262
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1254
-	.4byte	.LVL1255
+	.4byte	.LVL1262
+	.4byte	.LVL1263
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1255
-	.4byte	.LVL1256-1
+	.4byte	.LVL1263
+	.4byte	.LVL1264-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1256-1
+	.4byte	.LVL1264-1
 	.4byte	.LFE304
 	.2byte	0x4
 	.byte	0xf3
@@ -52690,15 +52832,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST308:
-	.4byte	.LVL1246
-	.4byte	.LVL1253
+	.4byte	.LVL1254
+	.4byte	.LVL1261
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
 .LLST311:
-	.4byte	.LVL1268
-	.4byte	.LVL1269-1
+	.4byte	.LVL1276
+	.4byte	.LVL1277-1
 	.2byte	0x9
 	.byte	0x3
 	.4byte	g_MaxLpn
@@ -52706,19 +52848,19 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1269-1
-	.4byte	.LVL1273
+	.4byte	.LVL1277-1
+	.4byte	.LVL1281
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1274
-	.4byte	.LVL1280
+	.4byte	.LVL1282
+	.4byte	.LVL1288
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST312:
-	.4byte	.LVL1268
-	.4byte	.LVL1269-1
+	.4byte	.LVL1276
+	.4byte	.LVL1277-1
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_num
@@ -52730,8 +52872,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1269-1
-	.4byte	.LVL1272
+	.4byte	.LVL1277-1
+	.4byte	.LVL1280
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52741,8 +52883,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1274
-	.4byte	.LVL1276
+	.4byte	.LVL1282
+	.4byte	.LVL1284
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52755,110 +52897,110 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST313:
-	.4byte	.LVL1270
-	.4byte	.LVL1273
+	.4byte	.LVL1278
+	.4byte	.LVL1281
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1274
-	.4byte	.LVL1280
+	.4byte	.LVL1282
+	.4byte	.LVL1288
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST398:
-	.4byte	.LVL1715
-	.4byte	.LVL1716
+.LLST397:
+	.4byte	.LVL1718
+	.4byte	.LVL1719
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1716
-	.4byte	.LVL1730
+	.4byte	.LVL1719
+	.4byte	.LVL1733
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1730
-	.4byte	.LVL1731
+	.4byte	.LVL1733
+	.4byte	.LVL1734
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1731
-	.4byte	.LVL1747
+	.4byte	.LVL1734
+	.4byte	.LVL1750
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1747
-	.4byte	.LVL1752
+	.4byte	.LVL1750
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1752
-	.4byte	.LVL1753
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1753
-	.4byte	.LVL1755
+	.4byte	.LVL1756
+	.4byte	.LVL1758
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1755
-	.4byte	.LVL1756
+	.4byte	.LVL1758
+	.4byte	.LVL1759
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1756
-	.4byte	.LVL1807
+	.4byte	.LVL1759
+	.4byte	.LVL1809
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1807
-	.4byte	.LVL1811
+	.4byte	.LVL1809
+	.4byte	.LVL1813
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1811
-	.4byte	.LVL1812
+	.4byte	.LVL1813
+	.4byte	.LVL1814
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1812
+	.4byte	.LVL1814
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST399:
-	.4byte	.LVL1715
-	.4byte	.LVL1717
+.LLST398:
+	.4byte	.LVL1718
+	.4byte	.LVL1720
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1717
-	.4byte	.LVL1731
+	.4byte	.LVL1720
+	.4byte	.LVL1734
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1731
-	.4byte	.LVL1732-1
+	.4byte	.LVL1734
+	.4byte	.LVL1735-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1732-1
-	.4byte	.LVL1807
+	.4byte	.LVL1735-1
+	.4byte	.LVL1809
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1807
-	.4byte	.LVL1808
+	.4byte	.LVL1809
+	.4byte	.LVL1810
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1808
+	.4byte	.LVL1810
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52867,22 +53009,22 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST400:
-	.4byte	.LVL1717
-	.4byte	.LVL1730
+.LLST399:
+	.4byte	.LVL1720
+	.4byte	.LVL1733
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1733
-	.4byte	.LVL1806
+	.4byte	.LVL1736
+	.4byte	.LVL1808
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1808
+	.4byte	.LVL1810
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52891,76 +53033,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST401:
-	.4byte	.LVL1717
-	.4byte	.LVL1730
+.LLST400:
+	.4byte	.LVL1720
+	.4byte	.LVL1733
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1733
-	.4byte	.LVL1747
+	.4byte	.LVL1736
+	.4byte	.LVL1750
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1747
-	.4byte	.LVL1752
+	.4byte	.LVL1750
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1752
-	.4byte	.LVL1753
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1753
-	.4byte	.LVL1755
+	.4byte	.LVL1756
+	.4byte	.LVL1758
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1755
-	.4byte	.LVL1756
+	.4byte	.LVL1758
+	.4byte	.LVL1759
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1756
-	.4byte	.LVL1806
+	.4byte	.LVL1759
+	.4byte	.LVL1808
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1808
-	.4byte	.LVL1811
+	.4byte	.LVL1810
+	.4byte	.LVL1813
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1811
-	.4byte	.LVL1812
+	.4byte	.LVL1813
+	.4byte	.LVL1814
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1812
+	.4byte	.LVL1814
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST402:
-	.4byte	.LVL1788
+.LLST401:
 	.4byte	.LVL1791
+	.4byte	.LVL1794
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST403:
-	.4byte	.LVL1774
-	.4byte	.LVL1783
+.LLST402:
+	.4byte	.LVL1777
+	.4byte	.LVL1786
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1783
-	.4byte	.LVL1784
+	.4byte	.LVL1786
+	.4byte	.LVL1787
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -52969,40 +53111,40 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1784
-	.4byte	.LVL1806
+	.4byte	.LVL1787
+	.4byte	.LVL1808
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST404:
-	.4byte	.LVL1775
+.LLST403:
 	.4byte	.LVL1778
+	.4byte	.LVL1781
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1778
-	.4byte	.LVL1779
+	.4byte	.LVL1781
+	.4byte	.LVL1782
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1779
-	.4byte	.LVL1780-1
+	.4byte	.LVL1782
+	.4byte	.LVL1783-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1780
-	.4byte	.LVL1781
+	.4byte	.LVL1783
+	.4byte	.LVL1784
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1782
-	.4byte	.LVL1795
+	.4byte	.LVL1785
+	.4byte	.LVL1798
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1796
-	.4byte	.LVL1797
+	.4byte	.LVL1799
+	.4byte	.LVL1800
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -60
@@ -53013,76 +53155,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST405:
-	.4byte	.LVL1775
-	.4byte	.LVL1795
+.LLST404:
+	.4byte	.LVL1778
+	.4byte	.LVL1798
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1796
-	.4byte	.LVL1797
+	.4byte	.LVL1799
+	.4byte	.LVL1800
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST406:
-	.4byte	.LVL1776
-	.4byte	.LVL1777
+.LLST405:
+	.4byte	.LVL1779
+	.4byte	.LVL1780
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1777
-	.4byte	.LVL1779
+	.4byte	.LVL1780
+	.4byte	.LVL1782
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST407:
-	.4byte	.LVL1771
-	.4byte	.LVL1806
+.LLST406:
+	.4byte	.LVL1774
+	.4byte	.LVL1808
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST408:
-	.4byte	.LVL1785
-	.4byte	.LVL1786
+.LLST407:
+	.4byte	.LVL1788
+	.4byte	.LVL1789
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 12
-	.4byte	.LVL1786
-	.4byte	.LVL1787
+	.4byte	.LVL1789
+	.4byte	.LVL1790
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1787
-	.4byte	.LVL1795
+	.4byte	.LVL1790
+	.4byte	.LVL1798
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
 	.4byte	0
 	.4byte	0
-.LLST409:
-	.4byte	.LVL1721
-	.4byte	.LVL1722
+.LLST408:
+	.4byte	.LVL1724
+	.4byte	.LVL1725
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1734
-	.4byte	.LVL1735
+	.4byte	.LVL1737
+	.4byte	.LVL1738
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST449:
-	.4byte	.LVL1999
-	.4byte	.LVL2000
+.LLST448:
+	.4byte	.LVL1987
+	.4byte	.LVL1988
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL2000
-	.4byte	.LVL2006
+	.4byte	.LVL1988
+	.4byte	.LVL1992
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_buffer_superblock
@@ -53099,8 +53241,8 @@ __func__.9940:
 	.2byte	0
 	.4byte	.LFB352
 	.4byte	.LFE352-.LFB352
-	.4byte	.LFB359
-	.4byte	.LFE359-.LFB359
+	.4byte	.LFB358
+	.4byte	.LFE358-.LFB358
 	.4byte	.LFB205
 	.4byte	.LFE205-.LFB205
 	.4byte	.LFB206
@@ -53111,6 +53253,8 @@ __func__.9940:
 	.4byte	.LFE208-.LFB208
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
 	.4byte	.LFB224
 	.4byte	.LFE224-.LFB224
 	.4byte	.LFB225
@@ -53137,8 +53281,6 @@ __func__.9940:
 	.4byte	.LFE244-.LFB244
 	.4byte	.LFB245
 	.4byte	.LFE245-.LFB245
-	.4byte	.LFB246
-	.4byte	.LFE246-.LFB246
 	.4byte	.LFB249
 	.4byte	.LFE249-.LFB249
 	.4byte	.LFB248
@@ -53157,8 +53299,6 @@ __func__.9940:
 	.4byte	.LFE254-.LFB254
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
-	.4byte	.LFB258
-	.4byte	.LFE258-.LFB258
 	.4byte	.LFB263
 	.4byte	.LFE263-.LFB263
 	.4byte	.LFB269
@@ -53225,6 +53365,10 @@ __func__.9940:
 	.4byte	.LFE243-.LFB243
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
 	.4byte	.LFB349
 	.4byte	.LFE349-.LFB349
 	.4byte	.LFB209
@@ -53319,20 +53463,18 @@ __func__.9940:
 	.4byte	.LFE290-.LFB290
 	.4byte	.LFB272
 	.4byte	.LFE272-.LFB272
-	.4byte	.LFB292
-	.4byte	.LFE292-.LFB292
-	.4byte	.LFB302
-	.4byte	.LFE302-.LFB302
-	.4byte	.LFB218
-	.4byte	.LFE218-.LFB218
-	.4byte	.LFB219
-	.4byte	.LFE219-.LFB219
 	.4byte	.LFB215
 	.4byte	.LFE215-.LFB215
 	.4byte	.LFB216
 	.4byte	.LFE216-.LFB216
 	.4byte	.LFB221
 	.4byte	.LFE221-.LFB221
+	.4byte	.LFB292
+	.4byte	.LFE292-.LFB292
+	.4byte	.LFB302
+	.4byte	.LFE302-.LFB302
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
 	.4byte	.LFB311
 	.4byte	.LFE311-.LFB311
 	.4byte	.LFB314
@@ -53369,104 +53511,88 @@ __func__.9940:
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB166
-	.4byte	.LBE166
-	.4byte	.LBB169
-	.4byte	.LBE169
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB170
-	.4byte	.LBE170
-	.4byte	.LBB173
-	.4byte	.LBE173
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB179
-	.4byte	.LBE179
-	.4byte	.LBB182
-	.4byte	.LBE182
-	.4byte	0
-	.4byte	0
 	.4byte	.LBB185
 	.4byte	.LBE185
 	.4byte	.LBB188
 	.4byte	.LBE188
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB199
-	.4byte	.LBE199
+	.4byte	.LBB189
+	.4byte	.LBE189
+	.4byte	.LBB192
+	.4byte	.LBE192
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB195
+	.4byte	.LBE195
+	.4byte	.LBB198
+	.4byte	.LBE198
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB201
+	.4byte	.LBE201
 	.4byte	.LBB204
 	.4byte	.LBE204
-	.4byte	.LBB205
-	.4byte	.LBE205
-	.4byte	.LBB206
-	.4byte	.LBE206
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB223
-	.4byte	.LBE223
-	.4byte	.LBB224
-	.4byte	.LBE224
+	.4byte	.LBB207
+	.4byte	.LBE207
+	.4byte	.LBB210
+	.4byte	.LBE210
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB229
-	.4byte	.LBE229
-	.4byte	.LBB230
-	.4byte	.LBE230
+	.4byte	.LBB213
+	.4byte	.LBE213
+	.4byte	.LBB218
+	.4byte	.LBE218
+	.4byte	.LBB219
+	.4byte	.LBE219
+	.4byte	.LBB220
+	.4byte	.LBE220
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB237
 	.4byte	.LBE237
-	.4byte	.LBB239
-	.4byte	.LBE239
+	.4byte	.LBB238
+	.4byte	.LBE238
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB247
-	.4byte	.LBE247
-	.4byte	.LBB250
-	.4byte	.LBE250
+	.4byte	.LBB252
+	.4byte	.LBE252
+	.4byte	.LBB256
+	.4byte	.LBE256
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB253
-	.4byte	.LBE253
+	.4byte	.LBB255
+	.4byte	.LBE255
 	.4byte	.LBB257
 	.4byte	.LBE257
-	.4byte	.LBB258
-	.4byte	.LBE258
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB267
-	.4byte	.LBE267
-	.4byte	.LBB268
-	.4byte	.LBE268
+	.4byte	.LBB262
+	.4byte	.LBE262
+	.4byte	.LBB263
+	.4byte	.LBE263
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB270
 	.4byte	.LBE270
-	.4byte	.LBB271
-	.4byte	.LBE271
-	.4byte	0
-	.4byte	0
 	.4byte	.LBB272
 	.4byte	.LBE272
-	.4byte	.LBB273
-	.4byte	.LBE273
-	.4byte	.LBB274
-	.4byte	.LBE274
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB291
-	.4byte	.LBE291
-	.4byte	.LBB297
-	.4byte	.LBE297
-	.4byte	.LBB298
-	.4byte	.LBE298
+	.4byte	.LBB280
+	.4byte	.LBE280
+	.4byte	.LBB283
+	.4byte	.LBE283
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB293
-	.4byte	.LBE293
-	.4byte	.LBB294
-	.4byte	.LBE294
+	.4byte	.LBB286
+	.4byte	.LBE286
+	.4byte	.LBB290
+	.4byte	.LBE290
+	.4byte	.LBB291
+	.4byte	.LBE291
 	.4byte	0
 	.4byte	0
 	.4byte	.LBB300
@@ -53475,16 +53601,50 @@ __func__.9940:
 	.4byte	.LBE301
 	.4byte	0
 	.4byte	0
+	.4byte	.LBB303
+	.4byte	.LBE303
+	.4byte	.LBB304
+	.4byte	.LBE304
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB305
+	.4byte	.LBE305
+	.4byte	.LBB306
+	.4byte	.LBE306
 	.4byte	.LBB307
 	.4byte	.LBE307
-	.4byte	.LBB308
-	.4byte	.LBE308
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB324
+	.4byte	.LBE324
+	.4byte	.LBB330
+	.4byte	.LBE330
+	.4byte	.LBB331
+	.4byte	.LBE331
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB326
+	.4byte	.LBE326
+	.4byte	.LBB327
+	.4byte	.LBE327
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB333
+	.4byte	.LBE333
+	.4byte	.LBB334
+	.4byte	.LBE334
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB340
+	.4byte	.LBE340
+	.4byte	.LBB341
+	.4byte	.LBE341
 	.4byte	0
 	.4byte	0
 	.4byte	.LFB352
 	.4byte	.LFE352
-	.4byte	.LFB359
-	.4byte	.LFE359
+	.4byte	.LFB358
+	.4byte	.LFE358
 	.4byte	.LFB205
 	.4byte	.LFE205
 	.4byte	.LFB206
@@ -53495,6 +53655,8 @@ __func__.9940:
 	.4byte	.LFE208
 	.4byte	.LFB211
 	.4byte	.LFE211
+	.4byte	.LFB219
+	.4byte	.LFE219
 	.4byte	.LFB224
 	.4byte	.LFE224
 	.4byte	.LFB225
@@ -53521,8 +53683,6 @@ __func__.9940:
 	.4byte	.LFE244
 	.4byte	.LFB245
 	.4byte	.LFE245
-	.4byte	.LFB246
-	.4byte	.LFE246
 	.4byte	.LFB249
 	.4byte	.LFE249
 	.4byte	.LFB248
@@ -53541,8 +53701,6 @@ __func__.9940:
 	.4byte	.LFE254
 	.4byte	.LFB255
 	.4byte	.LFE255
-	.4byte	.LFB258
-	.4byte	.LFE258
 	.4byte	.LFB263
 	.4byte	.LFE263
 	.4byte	.LFB269
@@ -53609,6 +53767,10 @@ __func__.9940:
 	.4byte	.LFE243
 	.4byte	.LFB212
 	.4byte	.LFE212
+	.4byte	.LFB246
+	.4byte	.LFE246
+	.4byte	.LFB258
+	.4byte	.LFE258
 	.4byte	.LFB349
 	.4byte	.LFE349
 	.4byte	.LFB209
@@ -53703,20 +53865,18 @@ __func__.9940:
 	.4byte	.LFE290
 	.4byte	.LFB272
 	.4byte	.LFE272
-	.4byte	.LFB292
-	.4byte	.LFE292
-	.4byte	.LFB302
-	.4byte	.LFE302
-	.4byte	.LFB218
-	.4byte	.LFE218
-	.4byte	.LFB219
-	.4byte	.LFE219
 	.4byte	.LFB215
 	.4byte	.LFE215
 	.4byte	.LFB216
 	.4byte	.LFE216
 	.4byte	.LFB221
 	.4byte	.LFE221
+	.4byte	.LFB292
+	.4byte	.LFE292
+	.4byte	.LFB302
+	.4byte	.LFE302
+	.4byte	.LFB218
+	.4byte	.LFE218
 	.4byte	.LFB311
 	.4byte	.LFE311
 	.4byte	.LFB314
@@ -53754,37 +53914,37 @@ __func__.9940:
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF728:
+.LASF727:
 	.ascii	"FtlEctTblFlush\000"
-.LASF593:
+.LASF592:
 	.ascii	"gc_page_num\000"
-.LASF609:
+.LASF608:
 	.ascii	"superBlk\000"
-.LASF499:
+.LASF498:
 	.ascii	"g_gc_bad_block_temp_num\000"
 .LASF363:
 	.ascii	"all_blk_used_slc_mode\000"
 .LASF43:
 	.ascii	"reserved\000"
-.LASF508:
+.LASF507:
 	.ascii	"g_totle_read_sector\000"
-.LASF574:
+.LASF573:
 	.ascii	"__func__\000"
 .LASF419:
 	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
-.LASF733:
+.LASF732:
 	.ascii	"nSec\000"
-.LASF729:
+.LASF728:
 	.ascii	"forceFlush\000"
 .LASF107:
 	.ascii	"bootm_headers\000"
-.LASF453:
+.LASF452:
 	.ascii	"p_gc_data_buf\000"
 .LASF125:
 	.ascii	"rd_end\000"
-.LASF492:
+.LASF491:
 	.ascii	"p_gc_blk_tbl\000"
-.LASF788:
+.LASF787:
 	.ascii	"FtlFreeSysBlkQueueOut\000"
 .LASF324:
 	.ascii	"ftl_bbt_blk_header\000"
@@ -53792,33 +53952,33 @@ __func__.9940:
 	.ascii	"eth_device\000"
 .LASF306:
 	.ascii	"sign\000"
-.LASF833:
+.LASF831:
 	.ascii	"sctidx\000"
-.LASF670:
+.LASF669:
 	.ascii	"Ftl_load_ext_data\000"
 .LASF96:
 	.ascii	"ih_comp\000"
-.LASF587:
+.LASF586:
 	.ascii	"block\000"
 .LASF22:
 	.ascii	"_Bool\000"
-.LASF652:
+.LASF651:
 	.ascii	"min_ec\000"
-.LASF604:
+.LASF603:
 	.ascii	"req_read_temp\000"
 .LASF279:
 	.ascii	"p_spare\000"
-.LASF686:
+.LASF685:
 	.ascii	"recovery_cur_page_ver\000"
-.LASF506:
+.LASF505:
 	.ascii	"g_totle_write_page_count\000"
 .LASF245:
 	.ascii	"net_root_path\000"
-.LASF625:
+.LASF624:
 	.ascii	"lookup_ppa\000"
-.LASF818:
+.LASF816:
 	.ascii	"FtlBbmTblFlush\000"
-.LASF612:
+.LASF611:
 	.ascii	"Ftl_get_new_temp_ppa\000"
 .LASF327:
 	.ascii	"ftl_data_blk_header\000"
@@ -53832,73 +53992,73 @@ __func__.9940:
 	.ascii	"des_ppa\000"
 .LASF237:
 	.ascii	"priv\000"
-.LASF778:
+.LASF777:
 	.ascii	"insert_free_list\000"
-.LASF774:
+.LASF773:
 	.ascii	"pHead\000"
 .LASF21:
 	.ascii	"___strtok\000"
 .LASF198:
 	.ascii	"UCLASS_SPI_GENERIC\000"
-.LASF477:
+.LASF476:
 	.ascii	"g_l2p_last_update_region_id\000"
-.LASF699:
+.LASF698:
 	.ascii	"ftl_sb_update_avl_pages\000"
-.LASF572:
+.LASF571:
 	.ascii	"FlashProgPages\000"
-.LASF857:
+.LASF855:
 	.ascii	"test_page_num\000"
-.LASF685:
+.LASF684:
 	.ascii	"lookup_superblock_id\000"
 .LASF420:
 	.ascii	"c_ftl_nand_init_sys_blks_per_plane\000"
-.LASF866:
+.LASF864:
 	.ascii	"FtlConstantsInit\000"
-.LASF596:
+.LASF595:
 	.ascii	"num_io\000"
-.LASF869:
+.LASF867:
 	.ascii	"FtlPrintInfo\000"
-.LASF745:
+.LASF744:
 	.ascii	"l2p_flush\000"
 .LASF378:
 	.ascii	"rear\000"
 .LASF305:
 	.ascii	"ftl_l2p_map_info\000"
-.LASF521:
+.LASF520:
 	.ascii	"g_in_swl_replace\000"
 .LASF404:
 	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
 .LASF243:
 	.ascii	"net_nis_domain\000"
-.LASF765:
+.LASF764:
 	.ascii	"List_update_data_list\000"
-.LASF853:
+.LASF851:
 	.ascii	"create_first_buffer_superblock\000"
-.LASF503:
+.LASF502:
 	.ascii	"g_gc_merge_free_blk_threshold\000"
-.LASF694:
+.LASF693:
 	.ascii	"last_mlc_page_version\000"
-.LASF631:
+.LASF630:
 	.ascii	"IsBlkInGcList\000"
 .LASF235:
 	.ascii	"next\000"
 .LASF312:
 	.ascii	"pBlkVpcTbl\000"
-.LASF698:
+.LASF697:
 	.ascii	"FtlReUsePrevPpa\000"
-.LASF659:
+.LASF658:
 	.ascii	"update_multiplier_value\000"
 .LASF411:
 	.ascii	"c_ftl_nand_totle_phy_blks\000"
-.LASF875:
+.LASF873:
 	.ascii	"memcmp\000"
 .LASF421:
 	.ascii	"c_ftl_nand_max_sys_blks\000"
-.LASF577:
-	.ascii	"PhyBlk\000"
 .LASF576:
+	.ascii	"PhyBlk\000"
+.LASF575:
 	.ascii	"FlashReadPages\000"
-.LASF479:
+.LASF478:
 	.ascii	"p_free_data_block_list_head\000"
 .LASF148:
 	.ascii	"UCLASS_AHCI\000"
@@ -53906,29 +54066,29 @@ __func__.9940:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF263:
 	.ascii	"uclass_id\000"
-.LASF601:
+.LASF600:
 	.ascii	"get_new_gc_superblock\000"
-.LASF623:
+.LASF622:
 	.ascii	"BOPS_EN\000"
 .LASF241:
 	.ascii	"net_netmask\000"
-.LASF850:
+.LASF848:
 	.ascii	"bad_block_cnt\000"
 .LASF424:
 	.ascii	"c_ftl_nand_max_data_blks\000"
-.LASF560:
+.LASF559:
 	.ascii	"pvTo\000"
 .LASF117:
 	.ascii	"fit_noffset_rd\000"
 .LASF192:
 	.ascii	"UCLASS_RTC\000"
-.LASF810:
+.LASF808:
 	.ascii	"pBbtHeader\000"
 .LASF46:
 	.ascii	"bi_memsize\000"
 .LASF47:
 	.ascii	"bi_flashstart\000"
-.LASF762:
+.LASF761:
 	.ascii	"minValidPageCount\000"
 .LASF232:
 	.ascii	"recv\000"
@@ -53938,11 +54098,11 @@ __func__.9940:
 	.ascii	"UCLASS_SYSCON\000"
 .LASF153:
 	.ascii	"UCLASS_DISPLAY\000"
-.LASF519:
+.LASF518:
 	.ascii	"g_max_erase_count\000"
-.LASF568:
+.LASF567:
 	.ascii	"flash_type\000"
-.LASF529:
+.LASF528:
 	.ascii	"g_recovery_ppa_tbl\000"
 .LASF71:
 	.ascii	"IRQ_STACK_START_IN\000"
@@ -53950,23 +54110,23 @@ __func__.9940:
 	.ascii	"bi_dram\000"
 .LASF191:
 	.ascii	"UCLASS_RKNAND\000"
-.LASF581:
+.LASF580:
 	.ascii	"die_index\000"
-.LASF805:
+.LASF803:
 	.ascii	"ver2\000"
 .LASF434:
 	.ascii	"gSysFreeQueue\000"
 .LASF159:
 	.ascii	"UCLASS_I2C_EEPROM\000"
-.LASF533:
+.LASF532:
 	.ascii	"g_nand_phy_info\000"
-.LASF555:
+.LASF554:
 	.ascii	"check_spare_buf\000"
 .LASF144:
 	.ascii	"UCLASS_PCI_EMUL\000"
 .LASF72:
 	.ascii	"fdt_header\000"
-.LASF586:
+.LASF585:
 	.ascii	"ftl_free\000"
 .LASF429:
 	.ascii	"g_MaxLpn\000"
@@ -53974,23 +54134,23 @@ __func__.9940:
 	.ascii	"bufferPageOffset\000"
 .LASF387:
 	.ascii	"reversed\000"
-.LASF507:
+.LASF506:
 	.ascii	"g_totle_write_sector\000"
 .LASF75:
 	.ascii	"off_dt_struct\000"
 .LASF417:
 	.ascii	"c_ftl_nand_max_vendor_blks\000"
-.LASF769:
+.LASF768:
 	.ascii	"prev_valid_page_count\000"
-.LASF874:
+.LASF872:
 	.ascii	"FtlPrintInfo2buf\000"
-.LASF480:
+.LASF479:
 	.ascii	"p_data_block_list_head\000"
 .LASF265:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF807:
+.LASF805:
 	.ascii	"P2V_plane\000"
-.LASF486:
+.LASF485:
 	.ascii	"g_gc_temp_superblock\000"
 .LASF195:
 	.ascii	"UCLASS_SPI\000"
@@ -53998,7 +54158,7 @@ __func__.9940:
 	.ascii	"c_ftl_nand_max_map_blks\000"
 .LASF302:
 	.ascii	"BbtMap\000"
-.LASF744:
+.LASF743:
 	.ascii	"found_lpa\000"
 .LASF209:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
@@ -54006,31 +54166,31 @@ __func__.9940:
 	.ascii	"last_refresh_read_count\000"
 .LASF207:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF616:
+.LASF615:
 	.ascii	"current_ppa\000"
-.LASF852:
+.LASF850:
 	.ascii	"create_first_active_superblock\000"
 .LASF313:
 	.ascii	"pMapPpnTbl\000"
 .LASF269:
 	.ascii	"net_state\000"
-.LASF725:
+.LASF724:
 	.ascii	"num_page\000"
 .LASF425:
 	.ascii	"ftl_gc_temp_power_lost_recovery_flag\000"
-.LASF615:
+.LASF614:
 	.ascii	"totle_num\000"
-.LASF732:
+.LASF731:
 	.ascii	"Index\000"
-.LASF682:
+.LASF681:
 	.ascii	"next_free_active_page\000"
-.LASF607:
+.LASF606:
 	.ascii	"spperBlk\000"
 .LASF65:
 	.ascii	"IRQ_STACK_START\000"
 .LASF132:
 	.ascii	"verify\000"
-.LASF714:
+.LASF713:
 	.ascii	"ftl_set_blk_mode\000"
 .LASF266:
 	.ascii	"NETLOOP_RESTART\000"
@@ -54038,27 +54198,27 @@ __func__.9940:
 	.ascii	"uint8\000"
 .LASF353:
 	.ascii	"write_page_count\000"
-.LASF611:
+.LASF610:
 	.ascii	"Ftl_gc_temp_data_write_back\000"
 .LASF295:
 	.ascii	"erase_blk\000"
-.LASF723:
+.LASF722:
 	.ascii	"re_save_vpndata\000"
-.LASF463:
+.LASF462:
 	.ascii	"p_valid_page_count_check_table\000"
-.LASF502:
+.LASF501:
 	.ascii	"g_gc_free_blk_threshold\000"
-.LASF482:
+.LASF481:
 	.ascii	"g_num_free_superblocks\000"
 .LASF226:
 	.ascii	"s_addr\000"
-.LASF820:
+.LASF818:
 	.ascii	"re_save_bbmdata\000"
 .LASF200:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF628:
+.LASF627:
 	.ascii	"FtlGcUpdatePage\000"
-.LASF812:
+.LASF810:
 	.ascii	"FtlLoadFactoryBbt\000"
 .LASF289:
 	.ascii	"sec_per_blk\000"
@@ -54072,11 +54232,11 @@ __func__.9940:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF407:
 	.ascii	"c_ftl_nand_sec_pre_page_shift\000"
-.LASF789:
+.LASF790:
 	.ascii	"IsInFreeQueue\000"
 .LASF236:
 	.ascii	"index\000"
-.LASF746:
+.LASF745:
 	.ascii	"select_l2p_ram_region\000"
 .LASF335:
 	.ascii	"maxDieNum\000"
@@ -54084,29 +54244,29 @@ __func__.9940:
 	.ascii	"byte_per_sec\000"
 .LASF278:
 	.ascii	"p_data\000"
-.LASF528:
+.LASF527:
 	.ascii	"g_recovery_page_min_ver\000"
-.LASF571:
+.LASF570:
 	.ascii	"block_size\000"
 .LASF90:
 	.ascii	"ih_load\000"
-.LASF836:
+.LASF834:
 	.ascii	"FtlProgPages\000"
-.LASF665:
+.LASF664:
 	.ascii	"error_flag\000"
 .LASF403:
 	.ascii	"c_ftl_nand_page_pre_blk\000"
-.LASF795:
+.LASF789:
 	.ascii	"blk_Id\000"
 .LASF213:
 	.ascii	"UCLASS_KEY\000"
-.LASF876:
+.LASF874:
 	.ascii	"memcpy\000"
 .LASF67:
 	.ascii	"_datarel_start_ofs\000"
 .LASF373:
 	.ascii	"List_Node\000"
-.LASF578:
+.LASF577:
 	.ascii	"p_die\000"
 .LASF314:
 	.ascii	"in_gc_mode\000"
@@ -54118,15 +54278,15 @@ __func__.9940:
 	.ascii	"UCLASS_IRQ\000"
 .LASF5:
 	.ascii	"__u8\000"
-.LASF494:
+.LASF493:
 	.ascii	"g_gc_page_offset\000"
 .LASF240:
 	.ascii	"net_gateway\000"
-.LASF803:
+.LASF801:
 	.ascii	"ftl_cmp_data_ver\000"
 .LASF430:
 	.ascii	"g_VaildLpn\000"
-.LASF471:
+.LASF470:
 	.ascii	"p_vendor_block_valid_page_count\000"
 .LASF262:
 	.ascii	"net_ping_ip\000"
@@ -54134,39 +54294,39 @@ __func__.9940:
 	.ascii	"type\000"
 .LASF40:
 	.ascii	"lmb_region\000"
-.LASF633:
+.LASF632:
 	.ascii	"numREQ\000"
 .LASF34:
 	.ascii	"protect\000"
-.LASF856:
+.LASF854:
 	.ascii	"max_test_page_num\000"
-.LASF705:
+.LASF704:
 	.ascii	"blk_id\000"
 .LASF349:
 	.ascii	"GlobalDataVersion\000"
-.LASF794:
+.LASF793:
 	.ascii	"erase_flag\000"
 .LASF362:
 	.ascii	"last_refresh_data_times\000"
-.LASF708:
+.LASF707:
 	.ascii	"totleBlkNum\000"
-.LASF679:
+.LASF678:
 	.ascii	"saved_active_page\000"
-.LASF777:
+.LASF776:
 	.ascii	"pTmp\000"
-.LASF605:
+.LASF604:
 	.ascii	"add_count\000"
-.LASF547:
+.LASF546:
 	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
 .LASF394:
 	.ascii	"c_ftl_nand_type\000"
-.LASF688:
+.LASF687:
 	.ascii	"recovery_flash_mode\000"
 .LASF138:
 	.ascii	"UCLASS_TEST\000"
-.LASF485:
+.LASF484:
 	.ascii	"g_buffer_superblock\000"
-.LASF650:
+.LASF649:
 	.ascii	"node_id\000"
 .LASF397:
 	.ascii	"c_ftl_nand_blks_per_die\000"
@@ -54178,7 +54338,7 @@ __func__.9940:
 	.ascii	"legacy_hdr_valid\000"
 .LASF203:
 	.ascii	"UCLASS_TPM\000"
-.LASF575:
+.LASF574:
 	.ascii	"read_req\000"
 .LASF432:
 	.ascii	"gBbtInfo\000"
@@ -54188,23 +54348,23 @@ __func__.9940:
 	.ascii	"sector_count\000"
 .LASF406:
 	.ascii	"c_ftl_nand_sec_pre_page\000"
-.LASF591:
+.LASF590:
 	.ascii	"mode\000"
-.LASF814:
+.LASF812:
 	.ascii	"FtlLoadBbt\000"
-.LASF561:
+.LASF560:
 	.ascii	"pvForm\000"
 .LASF323:
 	.ascii	"padding\000"
-.LASF460:
+.LASF459:
 	.ascii	"p_swl_mul_table\000"
-.LASF629:
+.LASF628:
 	.ascii	"src_ppa\000"
-.LASF683:
+.LASF682:
 	.ascii	"detected_active_page\000"
 .LASF389:
 	.ascii	"ftl_gc_page_item\000"
-.LASF549:
+.LASF548:
 	.ascii	"mem_malloc_start\000"
 .LASF210:
 	.ascii	"UCLASS_VIDEO_CRTC\000"
@@ -54212,127 +54372,125 @@ __func__.9940:
 	.ascii	"bi_ethspeed\000"
 .LASF98:
 	.ascii	"image_header_t\000"
-.LASF771:
+.LASF770:
 	.ascii	"pPrev\000"
-.LASF474:
+.LASF473:
 	.ascii	"g_totle_vendor_block\000"
-.LASF624:
+.LASF623:
 	.ascii	"superblock_id\000"
-.LASF595:
+.LASF594:
 	.ascii	"plane\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
 .LASF95:
 	.ascii	"ih_type\000"
-.LASF846:
+.LASF844:
 	.ascii	"sftl_init\000"
 .LASF1:
 	.ascii	"unsigned char\000"
-.LASF613:
+.LASF612:
 	.ascii	"FtlGcScanTempBlk\000"
 .LASF109:
 	.ascii	"legacy_hdr_os_copy\000"
-.LASF761:
+.LASF760:
 	.ascii	"vpcTbl\000"
 .LASF176:
 	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
 .LASF339:
 	.ascii	"activeSuperblockId\000"
-.LASF804:
+.LASF802:
 	.ascii	"ver1\000"
 .LASF280:
 	.ascii	"nand_phy_info\000"
-.LASF760:
+.LASF759:
 	.ascii	"ftl_free_no_use_map_blk\000"
-.LASF806:
+.LASF804:
 	.ascii	"P2V_block_in_plane\000"
-.LASF556:
+.LASF555:
 	.ascii	"str1\000"
-.LASF557:
+.LASF556:
 	.ascii	"str2\000"
-.LASF719:
+.LASF718:
 	.ascii	"pMapHeader\000"
 .LASF140:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF717:
+.LASF716:
 	.ascii	"FtlScanSysBlk\000"
 .LASF52:
 	.ascii	"bi_arm_freq\000"
-.LASF696:
+.LASF695:
 	.ascii	"lookup_ppa_ver\000"
-.LASF753:
+.LASF752:
 	.ascii	"region_num\000"
-.LASF476:
+.LASF475:
 	.ascii	"p_l2p_map_buf\000"
-.LASF488:
+.LASF487:
 	.ascii	"gp_last_act_superblock\000"
-.LASF871:
+.LASF869:
 	.ascii	"Ftl_log2\000"
-.LASF448:
+.LASF447:
 	.ascii	"p_sys_spare_buf\000"
 .LASF165:
 	.ascii	"UCLASS_LED\000"
-.LASF552:
+.LASF551:
 	.ascii	"p_current\000"
-.LASF647:
+.LASF646:
 	.ascii	"get_new_id\000"
 .LASF253:
 	.ascii	"net_rx_packet_len\000"
 .LASF255:
 	.ascii	"net_null_ethaddr\000"
-.LASF543:
+.LASF542:
 	.ascii	"g_ect_tbl_power_up_flush\000"
-.LASF597:
+.LASF596:
 	.ascii	"physical_block\000"
 .LASF32:
 	.ascii	"flash_id\000"
-.LASF839:
+.LASF837:
 	.ascii	"absolute_sector\000"
 .LASF222:
 	.ascii	"load_addr\000"
 .LASF347:
 	.ascii	"PowerLostTimes\000"
-.LASF501:
+.LASF500:
 	.ascii	"g_gc_bad_block_temp_tbl\000"
-.LASF886:
+.LASF884:
 	.ascii	"kfree\000"
-.LASF464:
+.LASF463:
 	.ascii	"p_blk_mode_table\000"
-.LASF776:
+.LASF775:
 	.ascii	"List_remove_node\000"
 .LASF291:
 	.ascii	"reserved_blk\000"
-.LASF734:
+.LASF733:
 	.ascii	"pBuf\000"
-.LASF792:
-	.ascii	"tmp_ec\000"
-.LASF484:
+.LASF483:
 	.ascii	"g_active_superblock\000"
-.LASF690:
+.LASF689:
 	.ascii	"recovery_super_page\000"
 .LASF437:
 	.ascii	"req_sys\000"
 .LASF381:
 	.ascii	"available_pages\000"
-.LASF800:
+.LASF798:
 	.ascii	"high\000"
-.LASF834:
+.LASF832:
 	.ascii	"nscts\000"
 .LASF410:
 	.ascii	"c_ftl_nand_reserved_blks\000"
-.LASF701:
+.LASF700:
 	.ascii	"FtlL2PDataInit\000"
 .LASF230:
 	.ascii	"init\000"
 .LASF215:
 	.ascii	"UCLASS_CHARGE_DISPLAY\000"
-.LASF573:
+.LASF572:
 	.ascii	"check\000"
 .LASF145:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF798:
+.LASF796:
 	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF678:
+.LASF677:
 	.ascii	"FtlRecoverySuperblock\000"
 .LASF396:
 	.ascii	"c_ftl_nand_planes_per_die\000"
@@ -54342,23 +54500,23 @@ __func__.9940:
 	.ascii	"ecc_bits\000"
 .LASF293:
 	.ascii	"nand_ops\000"
-.LASF602:
+.LASF601:
 	.ascii	"tmp_blk\000"
-.LASF523:
+.LASF522:
 	.ascii	"g_gc_head_data_block\000"
-.LASF829:
+.LASF827:
 	.ascii	"FtlWrite\000"
 .LASF182:
 	.ascii	"UCLASS_PINCTRL\000"
-.LASF832:
+.LASF830:
 	.ascii	"num_lpa\000"
-.LASF868:
+.LASF866:
 	.ascii	"blkNum\000"
 .LASF364:
 	.ascii	"SlcPartLbaEndSector\000"
 .LASF84:
 	.ascii	"fdt32_t\000"
-.LASF469:
+.LASF468:
 	.ascii	"g_totle_map_block\000"
 .LASF375:
 	.ascii	"value\000"
@@ -54368,11 +54526,11 @@ __func__.9940:
 	.ascii	"image_len\000"
 .LASF441:
 	.ascii	"req_gc\000"
-.LASF855:
+.LASF853:
 	.ascii	"is_sys_blk\000"
 .LASF42:
 	.ascii	"memory\000"
-.LASF822:
+.LASF820:
 	.ascii	"bitmap\000"
 .LASF319:
 	.ascii	"ftl_ect_tbl_info\000"
@@ -54380,53 +54538,53 @@ __func__.9940:
 	.ascii	"UCLASS_USB_DEV_GENERIC\000"
 .LASF212:
 	.ascii	"UCLASS_FG\000"
-.LASF756:
+.LASF755:
 	.ascii	"lastMapBlk\000"
 .LASF370:
 	.ascii	"totle_write_sector\000"
-.LASF522:
+.LASF521:
 	.ascii	"g_ftl_nand_free_count\000"
-.LASF627:
+.LASF626:
 	.ascii	"p_gc_page\000"
 .LASF20:
 	.ascii	"errno\000"
-.LASF532:
+.LASF531:
 	.ascii	"gNandPhyInfo\000"
-.LASF862:
+.LASF860:
 	.ascii	"ven_blk\000"
 .LASF30:
 	.ascii	"size\000"
 .LASF244:
 	.ascii	"net_hostname\000"
-.LASF773:
+.LASF772:
 	.ascii	"List_pop_head_node\000"
 .LASF308:
 	.ascii	"BlkNum\000"
-.LASF851:
+.LASF849:
 	.ascii	"sys_bad_block_cnt\000"
-.LASF599:
+.LASF598:
 	.ascii	"p_dataHeader\000"
-.LASF781:
+.LASF780:
 	.ascii	"tmp_id\000"
-.LASF603:
+.LASF602:
 	.ascii	"FtlReadRefresh\000"
-.LASF646:
+.LASF645:
 	.ascii	"free_blk_index\000"
-.LASF821:
+.LASF819:
 	.ascii	"FtlBbt2Bitmap\000"
-.LASF663:
+.LASF662:
 	.ascii	"ftl_check_vpc\000"
 .LASF108:
 	.ascii	"legacy_hdr_os\000"
 .LASF100:
 	.ascii	"image_start\000"
-.LASF580:
+.LASF579:
 	.ascii	"page_index\000"
 .LASF18:
 	.ascii	"uint8_t\000"
 .LASF55:
 	.ascii	"bi_bootflags\000"
-.LASF487:
+.LASF486:
 	.ascii	"g_gc_superblock\000"
 .LASF303:
 	.ascii	"ftl_sys_info\000"
@@ -54436,13 +54594,13 @@ __func__.9940:
 	.ascii	"front\000"
 .LASF175:
 	.ascii	"UCLASS_PANEL\000"
-.LASF472:
+.LASF471:
 	.ascii	"p_vendor_block_ver_table\000"
 .LASF204:
 	.ascii	"UCLASS_USB\000"
-.LASF517:
+.LASF516:
 	.ascii	"g_totle_slc_erase_count\000"
-.LASF461:
+.LASF460:
 	.ascii	"g_totle_swl_count\000"
 .LASF139:
 	.ascii	"UCLASS_TEST_FDT\000"
@@ -54452,27 +54610,27 @@ __func__.9940:
 	.ascii	"gcTempSuperblockId\000"
 .LASF238:
 	.ascii	"eth_current\000"
-.LASF767:
+.LASF766:
 	.ascii	"node_valid_page_count\000"
 .LASF53:
 	.ascii	"bi_dsp_freq\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF669:
+.LASF668:
 	.ascii	"pages\000"
 .LASF89:
 	.ascii	"ih_size\000"
-.LASF570:
+.LASF569:
 	.ascii	"addr\000"
 .LASF142:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF864:
+.LASF862:
 	.ascii	"FtlMemInit\000"
-.LASF819:
+.LASF817:
 	.ascii	"write_count\000"
-.LASF664:
+.LASF663:
 	.ascii	"prev_ppa\000"
-.LASF589:
+.LASF588:
 	.ascii	"FlashTestBlk\000"
 .LASF179:
 	.ascii	"UCLASS_PCI_GENERIC\000"
@@ -54480,15 +54638,15 @@ __func__.9940:
 	.ascii	"bi_sramstart\000"
 .LASF66:
 	.ascii	"FIQ_STACK_START\000"
-.LASF873:
+.LASF871:
 	.ascii	"rknand_proc_ftlread\000"
 .LASF228:
 	.ascii	"enetaddr\000"
 .LASF181:
 	.ascii	"UCLASS_PINCONFIG\000"
-.LASF742:
+.LASF741:
 	.ascii	"l2p_region_id\000"
-.LASF554:
+.LASF553:
 	.ascii	"check_buf\000"
 .LASF190:
 	.ascii	"UCLASS_RESET\000"
@@ -54502,47 +54660,49 @@ __func__.9940:
 	.ascii	"slc_erase_count\000"
 .LASF60:
 	.ascii	"bi_busfreq\000"
-.LASF770:
+.LASF769:
 	.ascii	"prev_multiplier_value\000"
-.LASF497:
+.LASF496:
 	.ascii	"g_gc_next_blk\000"
-.LASF516:
+.LASF515:
 	.ascii	"g_min_erase_count\000"
 .LASF149:
 	.ascii	"UCLASS_BLK\000"
-.LASF546:
+.LASF545:
 	.ascii	"gc_discard_updated\000"
-.LASF738:
+.LASF737:
 	.ascii	"FtlVendorPartWrite\000"
-.LASF622:
+.LASF621:
 	.ascii	"FtlGcFreeTempBlock\000"
 .LASF248:
 	.ascii	"net_ip\000"
 .LASF229:
 	.ascii	"iobase\000"
-.LASF658:
+.LASF657:
 	.ascii	"GetFreeBlockMinEraseCount\000"
+.LASF788:
+	.ascii	"remalloc\000"
 .LASF336:
 	.ascii	"activeFlashMode\000"
 .LASF92:
 	.ascii	"ih_dcrc\000"
 .LASF35:
 	.ascii	"flash_info_t\000"
-.LASF656:
+.LASF655:
 	.ascii	"GetFreeBlockMaxEraseCount\000"
-.LASF712:
+.LASF711:
 	.ascii	"sblk\000"
-.LASF755:
+.LASF754:
 	.ascii	"ftl_map_blk_gc\000"
-.LASF878:
+.LASF876:
 	.ascii	"printf\000"
 .LASF59:
 	.ascii	"bi_intfreq\000"
 .LASF223:
 	.ascii	"save_addr\000"
-.LASF538:
+.LASF537:
 	.ascii	"TotleReadBufferCount1\000"
-.LASF567:
+.LASF566:
 	.ascii	"request\000"
 .LASF330:
 	.ascii	"regionId\000"
@@ -54554,35 +54714,35 @@ __func__.9940:
 	.ascii	"gc_page_count\000"
 .LASF49:
 	.ascii	"bi_flashoffset\000"
-.LASF541:
+.LASF540:
 	.ascii	"TotleReadBufferMatchCount\000"
 .LASF438:
 	.ascii	"req_read\000"
-.LASF752:
+.LASF751:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-.LASF466:
+.LASF465:
 	.ascii	"p_map_block_valid_page_count\000"
 .LASF167:
 	.ascii	"UCLASS_MAILBOX\000"
-.LASF793:
+.LASF792:
 	.ascii	"FtlFreeSysBlkQueueIn\000"
 .LASF366:
 	.ascii	"readErrorCount\000"
-.LASF588:
+.LASF587:
 	.ascii	"sftl_gc\000"
-.LASF797:
+.LASF795:
 	.ascii	"FtlFreeSysBlkQueueEmpty\000"
-.LASF763:
+.LASF762:
 	.ascii	"load_l2p_region\000"
-.LASF640:
+.LASF639:
 	.ascii	"p_superblock\000"
 .LASF301:
 	.ascii	"fBbtBlk\000"
 .LASF77:
 	.ascii	"off_mem_rsvmap\000"
-.LASF445:
+.LASF444:
 	.ascii	"p_sys_data_buf\000"
-.LASF885:
+.LASF883:
 	.ascii	"l2p_addr_tran\000"
 .LASF164:
 	.ascii	"UCLASS_KEYBOARD\000"
@@ -54590,69 +54750,69 @@ __func__.9940:
 	.ascii	"page_per_slc_blk\000"
 .LASF398:
 	.ascii	"c_ftl_nand_blks_per_die_shift\000"
-.LASF739:
+.LASF738:
 	.ascii	"log2phys\000"
-.LASF478:
+.LASF477:
 	.ascii	"p_data_block_list_table\000"
 .LASF171:
 	.ascii	"UCLASS_MOD_EXP\000"
-.LASF645:
+.LASF644:
 	.ascii	"num_bad_block\000"
 .LASF85:
 	.ascii	"image_header\000"
-.LASF702:
+.LASF701:
 	.ascii	"FtlLoadVonderInfo\000"
-.LASF614:
+.LASF613:
 	.ascii	"pSuperblock\000"
-.LASF535:
+.LASF534:
 	.ascii	"ftl_temp_buf\000"
 .LASF384:
 	.ascii	"flash_mode\000"
-.LASF514:
+.LASF513:
 	.ascii	"g_totle_mlc_erase_count\000"
 .LASF79:
 	.ascii	"last_comp_version\000"
 .LASF415:
 	.ascii	"c_ftl_nand_map_blks_per_plane\000"
-.LASF811:
+.LASF809:
 	.ascii	"re_try_next_blk\000"
 .LASF56:
 	.ascii	"bi_ip_addr\000"
-.LASF579:
+.LASF578:
 	.ascii	"block_index\000"
 .LASF36:
 	.ascii	"flash_info\000"
-.LASF496:
+.LASF495:
 	.ascii	"g_gc_cur_blk_max_valid_pages\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF764:
+.LASF763:
 	.ascii	"phyAddr\000"
 .LASF73:
 	.ascii	"magic\000"
-.LASF791:
-	.ascii	"tmp_blk_id\000"
-.LASF877:
+.LASF875:
 	.ascii	"memset\000"
 .LASF242:
 	.ascii	"net_dns_server\000"
-.LASF562:
+.LASF561:
 	.ascii	"ftl_memset\000"
-.LASF831:
+.LASF829:
 	.ascii	"end_lpa\000"
-.LASF736:
+.LASF882:
+	.ascii	"/home/ldq/rk-linux/u-boot-debug\000"
+.LASF735:
 	.ascii	"result\000"
-.LASF626:
+.LASF625:
 	.ascii	"scan_page_num\000"
 .LASF267:
 	.ascii	"NETLOOP_SUCCESS\000"
 .LASF27:
 	.ascii	"name\000"
-.LASF512:
+.LASF511:
 	.ascii	"g_totle_cache_write_count\000"
-.LASF768:
+.LASF767:
 	.ascii	"node_multiplier_value\000"
-.LASF759:
+.LASF758:
 	.ascii	"blk_index\000"
 .LASF69:
 	.ascii	"_datarellocal_start_ofs\000"
@@ -54664,31 +54824,31 @@ __func__.9940:
 	.ascii	"fit_hdr_setup\000"
 .LASF150:
 	.ascii	"UCLASS_CLK\000"
-.LASF687:
+.LASF686:
 	.ascii	"detected_error_page\000"
 .LASF129:
 	.ascii	"initrd_end\000"
-.LASF620:
+.LASF619:
 	.ascii	"read_super_page\000"
 .LASF219:
 	.ascii	"monitor_flash_len\000"
-.LASF621:
+.LASF620:
 	.ascii	"FtlGcPageVarInit\000"
-.LASF823:
+.LASF821:
 	.ascii	"FtlBbtInfoPrint\000"
-.LASF530:
+.LASF529:
 	.ascii	"c_mlc_erase_count_value\000"
-.LASF551:
+.LASF550:
 	.ascii	"mem_malloc_brk\000"
-.LASF483:
+.LASF482:
 	.ascii	"g_num_data_superblocks\000"
-.LASF754:
+.LASF753:
 	.ascii	"blkTbl\000"
 .LASF348:
 	.ascii	"mlc_erase_count\000"
 .LASF12:
 	.ascii	"phys_size_t\000"
-.LASF716:
+.LASF715:
 	.ascii	"FtlLoadEctTbl\000"
 .LASF62:
 	.ascii	"bi_boot_params\000"
@@ -54696,11 +54856,11 @@ __func__.9940:
 	.ascii	"UCLASS_RC\000"
 .LASF51:
 	.ascii	"bi_sramsize\000"
-.LASF881:
+.LASF879:
 	.ascii	"sprintf\000"
-.LASF608:
+.LASF607:
 	.ascii	"FtlGcMarkBadPhyBlk\000"
-.LASF642:
+.LASF641:
 	.ascii	"allocate_new_data_superblock\000"
 .LASF13:
 	.ascii	"sizetype\000"
@@ -54712,9 +54872,9 @@ __func__.9940:
 	.ascii	"GlobalSysVersion\000"
 .LASF329:
 	.ascii	"ftl_map_blk_header\000"
-.LASF600:
+.LASF599:
 	.ascii	"gc_next_superblock\000"
-.LASF813:
+.LASF811:
 	.ascii	"blkAddr\000"
 .LASF193:
 	.ascii	"UCLASS_SCSI\000"
@@ -54724,21 +54884,21 @@ __func__.9940:
 	.ascii	"signed char\000"
 .LASF250:
 	.ascii	"net_tx_packet\000"
-.LASF697:
+.LASF696:
 	.ascii	"current_ppa_ver\000"
-.LASF785:
+.LASF784:
 	.ascii	"tmp_multiplier_value\000"
-.LASF566:
+.LASF565:
 	.ascii	"FlashEraseBlocks\000"
 .LASF33:
 	.ascii	"start\000"
-.LASF830:
+.LASF828:
 	.ascii	"start_lpa\000"
-.LASF553:
+.LASF552:
 	.ascii	"current\000"
 .LASF218:
 	.ascii	"LOGF_MAX_CATEGORIES\000"
-.LASF518:
+.LASF517:
 	.ascii	"g_totle_sys_slc_erase_count\000"
 .LASF300:
 	.ascii	"prev_id\000"
@@ -54750,37 +54910,37 @@ __func__.9940:
 	.ascii	"count\000"
 .LASF146:
 	.ascii	"UCLASS_SIMPLE_BUS\000"
-.LASF539:
+.LASF538:
 	.ascii	"TotleReadBufferCount2\000"
-.LASF540:
+.LASF539:
 	.ascii	"TotleReadBufferCount3\000"
-.LASF455:
+.LASF454:
 	.ascii	"c_gc_page_buf_num\000"
-.LASF720:
+.LASF719:
 	.ascii	"FtlVpcTblFlush\000"
 .LASF189:
 	.ascii	"UCLASS_REMOTEPROC\000"
-.LASF743:
+.LASF742:
 	.ascii	"lpn_index\000"
 .LASF118:
 	.ascii	"fit_hdr_fdt\000"
-.LASF632:
+.LASF631:
 	.ascii	"FtlGcBufAlloc\000"
-.LASF569:
+.LASF568:
 	.ascii	"num_req\000"
-.LASF779:
+.LASF778:
 	.ascii	"node_erase_count\000"
 .LASF254:
 	.ascii	"net_bcast_ethaddr\000"
-.LASF737:
+.LASF736:
 	.ascii	"ppn_index\000"
-.LASF796:
+.LASF794:
 	.ascii	"FtlFreeSysBlkQueueFull\000"
 .LASF133:
 	.ascii	"state\000"
 .LASF48:
 	.ascii	"bi_flashsize\000"
-.LASF747:
+.LASF746:
 	.ascii	"target_region\000"
 .LASF19:
 	.ascii	"__be32\000"
@@ -54790,31 +54950,31 @@ __func__.9940:
 	.ascii	"c_ftl_vendor_part_size\000"
 .LASF251:
 	.ascii	"net_rx_packets\000"
-.LASF827:
+.LASF825:
 	.ascii	"sftl_read\000"
-.LASF452:
+.LASF451:
 	.ascii	"p_gc_spare_buf\000"
 .LASF151:
 	.ascii	"UCLASS_CPU\000"
-.LASF467:
+.LASF466:
 	.ascii	"p_map_block_ver_table\000"
-.LASF456:
+.LASF455:
 	.ascii	"g_gc_num_req\000"
-.LASF449:
+.LASF448:
 	.ascii	"p_io_data_buf_0\000"
-.LASF450:
+.LASF449:
 	.ascii	"p_io_data_buf_1\000"
 .LASF68:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF684:
+.LASF683:
 	.ascii	"mlc_detected_active_page\000"
-.LASF854:
+.LASF852:
 	.ascii	"FtlLowFormatEraseBlock\000"
 .LASF317:
 	.ascii	"region_id\000"
 .LASF326:
 	.ascii	"sysBlksPerPlane\000"
-.LASF817:
+.LASF815:
 	.ascii	"FtlBbtMemInit\000"
 .LASF309:
 	.ascii	"maxBlkNum\000"
@@ -54822,25 +54982,25 @@ __func__.9940:
 	.ascii	"c_ftl_nand_die_num\000"
 .LASF286:
 	.ascii	"page_per_blk\000"
-.LASF722:
+.LASF721:
 	.ascii	"prog_error_count\000"
 .LASF372:
 	.ascii	"progErrorCount\000"
 .LASF259:
 	.ascii	"net_boot_file_name\000"
-.LASF495:
+.LASF494:
 	.ascii	"g_gc_cur_blk_valid_pages\000"
 .LASF233:
 	.ascii	"halt\000"
-.LASF654:
+.LASF653:
 	.ascii	"maxFreeBlockEraseCount\000"
 .LASF86:
 	.ascii	"ih_magic\000"
-.LASF582:
+.LASF581:
 	.ascii	"block_in_die\000"
-.LASF457:
+.LASF456:
 	.ascii	"gp_ect_tbl_info\000"
-.LASF655:
+.LASF654:
 	.ascii	"minDataBlockEraseCount\000"
 .LASF17:
 	.ascii	"ulong\000"
@@ -54852,41 +55012,41 @@ __func__.9940:
 	.ascii	"__u32\000"
 .LASF249:
 	.ascii	"net_server_ip\000"
-.LASF786:
+.LASF785:
 	.ascii	"INSERT_DATA_LIST\000"
 .LASF206:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF826:
+.LASF824:
 	.ascii	"sftl_write\000"
-.LASF444:
+.LASF443:
 	.ascii	"p_plane_order_table\000"
-.LASF782:
+.LASF781:
 	.ascii	"insert_data_list\000"
 .LASF70:
 	.ascii	"_datarelro_start_ofs\000"
-.LASF619:
+.LASF618:
 	.ascii	"ReInit\000"
 .LASF172:
 	.ascii	"UCLASS_MTD\000"
 .LASF134:
 	.ascii	"bootm_headers_t\000"
-.LASF730:
+.LASF729:
 	.ascii	"ec_mod_count\000"
-.LASF565:
+.LASF564:
 	.ascii	"spare\000"
-.LASF527:
+.LASF526:
 	.ascii	"g_recovery_page_num\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF668:
+.LASF667:
 	.ascii	"req_temp\000"
 .LASF141:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF883:
+.LASF881:
 	.ascii	"drivers/rkflash/rksftl/rk_sftl.c\000"
-.LASF660:
+.LASF659:
 	.ascii	"FtlSysBlkInit\000"
-.LASF524:
+.LASF523:
 	.ascii	"g_gc_head_data_block_count\000"
 .LASF297:
 	.ascii	"read_page\000"
@@ -54898,73 +55058,73 @@ __func__.9940:
 	.ascii	"UCLASS_DMA\000"
 .LASF426:
 	.ascii	"g_GlobalSysVersion\000"
-.LASF511:
+.LASF510:
 	.ascii	"g_tmp_data_superblock_id\000"
-.LASF872:
+.LASF870:
 	.ascii	"limit\000"
-.LASF661:
+.LASF660:
 	.ascii	"ftl_scan_all_data\000"
 .LASF331:
 	.ascii	"ftl_sys_blk_header\000"
 .LASF393:
 	.ascii	"flag\000"
-.LASF470:
+.LASF469:
 	.ascii	"p_vendor_block_table\000"
-.LASF680:
+.LASF679:
 	.ascii	"saved_active_plane\000"
-.LASF748:
+.LASF747:
 	.ascii	"hit_count\000"
-.LASF715:
+.LASF714:
 	.ascii	"FtlGcReFreshBadBlk\000"
 .LASF380:
 	.ascii	"current_page\000"
 .LASF201:
 	.ascii	"UCLASS_THERMAL\000"
-.LASF815:
+.LASF813:
 	.ascii	"FtlBbtCalcTotleCnt\000"
-.LASF787:
+.LASF786:
 	.ascii	"INSERT_FREE_LIST\000"
-.LASF563:
+.LASF562:
 	.ascii	"FlashGetBadBlockList\000"
-.LASF695:
+.LASF694:
 	.ascii	"prev_ppa_ver\000"
 .LASF246:
 	.ascii	"net_ethaddr\000"
 .LASF225:
 	.ascii	"in_addr\000"
-.LASF845:
+.LASF843:
 	.ascii	"FtlSysFlush\000"
 .LASF99:
 	.ascii	"image_info\000"
 .LASF88:
 	.ascii	"ih_time\000"
-.LASF610:
+.LASF609:
 	.ascii	"FtlGcRefreshBlock\000"
 .LASF334:
 	.ascii	"ftl_sys_save_info\000"
-.LASF772:
+.LASF771:
 	.ascii	"List_get_gc_head_node\000"
 .LASF399:
 	.ascii	"c_ftl_nand_planes_num\000"
-.LASF809:
+.LASF807:
 	.ascii	"FtlMakeBbt\000"
 .LASF37:
 	.ascii	"long double\000"
-.LASF481:
+.LASF480:
 	.ascii	"p_data_block_list_tail\000"
-.LASF493:
+.LASF492:
 	.ascii	"g_gc_blk_num\000"
 .LASF81:
 	.ascii	"size_dt_strings\000"
 .LASF271:
 	.ascii	"uint16\000"
-.LASF606:
+.LASF605:
 	.ascii	"FtlGcFreeBadSuperBlk\000"
 .LASF106:
 	.ascii	"image_info_t\000"
-.LASF704:
+.LASF703:
 	.ascii	"pMapBlockInfo\000"
-.LASF618:
+.LASF617:
 	.ascii	"error_phy_page\000"
 .LASF2:
 	.ascii	"long unsigned int\000"
@@ -54984,17 +55144,17 @@ __func__.9940:
 	.ascii	"net_server_ethaddr\000"
 .LASF208:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
-.LASF692:
+.LASF691:
 	.ascii	"function_exit\000"
 .LASF135:
 	.ascii	"images\000"
-.LASF525:
+.LASF524:
 	.ascii	"g_gc_skip_write_count\000"
-.LASF585:
+.LASF584:
 	.ascii	"rknand_print_hex\000"
-.LASF636:
+.LASF635:
 	.ascii	"FtlGcBufInit\000"
-.LASF446:
+.LASF445:
 	.ascii	"p_sys_data_buf_1\000"
 .LASF14:
 	.ascii	"char\000"
@@ -55002,11 +55162,11 @@ __func__.9940:
 	.ascii	"pBlkTbl\000"
 .LASF113:
 	.ascii	"fit_uname_os\000"
-.LASF500:
+.LASF499:
 	.ascii	"g_gc_bad_block_gc_index\000"
-.LASF693:
+.LASF692:
 	.ascii	"last_page_version\000"
-.LASF802:
+.LASF800:
 	.ascii	"pagePreBlk\000"
 .LASF281:
 	.ascii	"nand_type\000"
@@ -55014,15 +55174,15 @@ __func__.9940:
 	.ascii	"fit_hdr_os\000"
 .LASF283:
 	.ascii	"plane_per_die\000"
-.LASF490:
+.LASF489:
 	.ascii	"g_sys_ext_data\000"
 .LASF272:
 	.ascii	"uint32\000"
-.LASF564:
+.LASF563:
 	.ascii	"table\000"
 .LASF299:
 	.ascii	"page\000"
-.LASF643:
+.LASF642:
 	.ascii	"allocate_data_superblock\000"
 .LASF316:
 	.ascii	"ftl_l2p_ram_map_info\000"
@@ -55032,75 +55192,75 @@ __func__.9940:
 	.ascii	"net_loop_state\000"
 .LASF433:
 	.ascii	"gSysInfo\000"
-.LASF630:
+.LASF629:
 	.ascii	"prev_superblock_id\000"
 .LASF196:
 	.ascii	"UCLASS_SPMI\000"
-.LASF757:
+.LASF756:
 	.ascii	"minValidPageIndex\000"
-.LASF842:
+.LASF840:
 	.ascii	"last_lpa_nscts\000"
 .LASF194:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF710:
+.LASF709:
 	.ascii	"FtlLoadSysInfo\000"
 .LASF440:
 	.ascii	"req_erase\000"
 .LASF320:
 	.ascii	"hash\000"
-.LASF545:
+.LASF544:
 	.ascii	"check_vpc_table\000"
 .LASF180:
 	.ascii	"UCLASS_PHY\000"
 .LASF54:
 	.ascii	"bi_ddr_freq\000"
-.LASF859:
+.LASF857:
 	.ascii	"test_mode\000"
-.LASF828:
+.LASF826:
 	.ascii	"FtlDiscard\000"
-.LASF671:
+.LASF670:
 	.ascii	"FtlGcPageRecovery\000"
 .LASF105:
 	.ascii	"arch\000"
-.LASF510:
+.LASF509:
 	.ascii	"g_totle_read_page_count\000"
-.LASF711:
+.LASF710:
 	.ascii	"ftl_get_blk_mode\000"
-.LASF741:
+.LASF740:
 	.ascii	"ram_region_id\000"
 .LASF435:
 	.ascii	"gL2pMapInfo\000"
 .LASF322:
 	.ascii	"lastEc\000"
-.LASF843:
+.LASF841:
 	.ascii	"sector\000"
-.LASF558:
+.LASF557:
 	.ascii	"ftl_memcmp\000"
-.LASF468:
+.LASF467:
 	.ascii	"p_map_region_ppn_table\000"
 .LASF120:
 	.ascii	"fit_noffset_fdt\000"
-.LASF867:
+.LASF865:
 	.ascii	"FtlSysBlkNumInit\000"
-.LASF672:
+.LASF671:
 	.ascii	"Ftl_save_ext_data\000"
 .LASF116:
 	.ascii	"fit_uname_rd\000"
-.LASF649:
+.LASF648:
 	.ascii	"GetSwlReplaceBlock\000"
 .LASF359:
 	.ascii	"max_erase_count\000"
-.LASF475:
+.LASF474:
 	.ascii	"p_l2p_ram_map\000"
-.LASF634:
+.LASF633:
 	.ascii	"req_num\000"
 .LASF115:
 	.ascii	"fit_hdr_rd\000"
 .LASF268:
 	.ascii	"NETLOOP_FAIL\000"
-.LASF824:
+.LASF822:
 	.ascii	"FtlBbmIsBadBlock\000"
-.LASF667:
+.LASF666:
 	.ascii	"FtlSuperblockPowerLostFix\000"
 .LASF157:
 	.ascii	"UCLASS_FIRMWARE\000"
@@ -55108,13 +55268,13 @@ __func__.9940:
 	.ascii	"fit_noffset_setup\000"
 .LASF401:
 	.ascii	"c_ftl_nand_ext_blk_pre_plane\000"
-.LASF550:
+.LASF549:
 	.ascii	"mem_malloc_end\000"
-.LASF451:
+.LASF450:
 	.ascii	"p_io_spare_buf\000"
 .LASF185:
 	.ascii	"UCLASS_POWER_DOMAIN\000"
-.LASF520:
+.LASF519:
 	.ascii	"g_in_gc_progress\000"
 .LASF168:
 	.ascii	"UCLASS_MASS_STORAGE\000"
@@ -55124,7 +55284,7 @@ __func__.9940:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF422:
 	.ascii	"c_ftl_nand_data_blks_per_plane\000"
-.LASF617:
+.LASF616:
 	.ascii	"page_count\000"
 .LASF298:
 	.ascii	"ftl_bbt_info\000"
@@ -55132,49 +55292,47 @@ __func__.9940:
 	.ascii	"UCLASS_I2C_GENERIC\000"
 .LASF231:
 	.ascii	"send\000"
-.LASF531:
+.LASF530:
 	.ascii	"g_power_lost_recovery_flag\000"
-.LASF592:
+.LASF591:
 	.ascii	"numPages\000"
-.LASF447:
+.LASF446:
 	.ascii	"p_vendor_data_buf\000"
 .LASF354:
 	.ascii	"read_page_count\000"
 .LASF234:
 	.ascii	"write_hwaddr\000"
-.LASF726:
+.LASF725:
 	.ascii	"FtlMapBlkWriteDump_data\000"
-.LASF835:
+.LASF833:
 	.ascii	"FtlCacheWriteBack\000"
-.LASF700:
+.LASF699:
 	.ascii	"FtlLoadMapInfo\000"
-.LASF808:
+.LASF806:
 	.ascii	"V2P_block\000"
-.LASF721:
+.LASF720:
 	.ascii	"pSysHeader\000"
-.LASF673:
+.LASF672:
 	.ascii	"SupperBlkListInit\000"
-.LASF707:
+.LASF706:
 	.ascii	"ppnTbl\000"
-.LASF847:
+.LASF845:
 	.ascii	"pNand\000"
-.LASF559:
+.LASF558:
 	.ascii	"ftl_memcpy\000"
 .LASF346:
 	.ascii	"PowerOnTimes\000"
-.LASF505:
+.LASF504:
 	.ascii	"g_totle_gc_page_count\000"
 .LASF24:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF674:
+.LASF673:
 	.ascii	"num_data_node\000"
 .LASF400:
 	.ascii	"c_ftl_nand_blk_pre_plane\000"
-.LASF884:
-	.ascii	"/home/ldq/rk-linux/u-boot-release\000"
 .LASF64:
 	.ascii	"bd_t\000"
-.LASF706:
+.LASF705:
 	.ascii	"lastWritePage\000"
 .LASF91:
 	.ascii	"ih_ep\000"
@@ -55184,7 +55342,7 @@ __func__.9940:
 	.ascii	"fit_uname_fdt\000"
 .LASF187:
 	.ascii	"UCLASS_RAM\000"
-.LASF675:
+.LASF674:
 	.ascii	"num_free_node\000"
 .LASF379:
 	.ascii	"ftl_superblock_info\000"
@@ -55192,43 +55350,41 @@ __func__.9940:
 	.ascii	"ft_addr\000"
 .LASF357:
 	.ascii	"sys_slc_erase_count\000"
-.LASF513:
+.LASF512:
 	.ascii	"g_totle_l2p_write_count\000"
 .LASF220:
 	.ascii	"__dtb_dt_begin\000"
 .LASF217:
 	.ascii	"UCLASS_INVALID\000"
-.LASF443:
-	.ascii	"g_req_cache\000"
-.LASF594:
+.LASF593:
 	.ascii	"gc_blk\000"
 .LASF277:
 	.ascii	"page_addr\000"
-.LASF865:
+.LASF863:
 	.ascii	"mem_size\000"
-.LASF858:
+.LASF856:
 	.ascii	"test_page_step\000"
-.LASF689:
+.LASF688:
 	.ascii	"read_super_page_end\000"
 .LASF368:
 	.ascii	"refresh_enable_mode\000"
-.LASF848:
+.LASF846:
 	.ascii	"load_bbt\000"
-.LASF861:
+.LASF859:
 	.ascii	"IsBlkInVendorPart\000"
 .LASF402:
 	.ascii	"c_ftl_nand_bbm_buf_size\000"
-.LASF783:
+.LASF782:
 	.ascii	"node_data_count\000"
-.LASF583:
+.LASF582:
 	.ascii	"width\000"
 .LASF39:
 	.ascii	"base\000"
-.LASF887:
+.LASF885:
 	.ascii	"sftl_get_density\000"
-.LASF840:
+.LASF838:
 	.ascii	"first_lpa_sctidx\000"
-.LASF590:
+.LASF589:
 	.ascii	"rk_ftl_garbage_collect\000"
 .LASF328:
 	.ascii	"lastPpa\000"
@@ -55236,19 +55392,19 @@ __func__.9940:
 	.ascii	"fit_uname_cfg\000"
 .LASF344:
 	.ascii	"gcTempPageOffset\000"
-.LASF637:
+.LASF636:
 	.ascii	"decrement_vpc_count\000"
 .LASF386:
 	.ascii	"dump_writed\000"
-.LASF749:
+.LASF748:
 	.ascii	"flush_l2p_region\000"
 .LASF130:
 	.ascii	"cmdline_start\000"
-.LASF536:
+.LASF535:
 	.ascii	"DeviceCapacity\000"
 .LASF355:
 	.ascii	"l2p_write_count\000"
-.LASF548:
+.LASF547:
 	.ascii	"gc_ink_free_return_value\000"
 .LASF358:
 	.ascii	"discard_page_count\000"
@@ -55260,45 +55416,45 @@ __func__.9940:
 	.ascii	"long long unsigned int\000"
 .LASF274:
 	.ascii	"int16\000"
-.LASF849:
+.LASF847:
 	.ascii	"ftl_low_format\000"
-.LASF735:
+.LASF734:
 	.ascii	"offset\000"
-.LASF504:
+.LASF503:
 	.ascii	"g_gc_blk_index\000"
 .LASF439:
 	.ascii	"req_prgm\000"
 .LASF436:
 	.ascii	"gVendorBlkInfo\000"
-.LASF677:
+.LASF676:
 	.ascii	"FtlPowerLostRecovery\000"
-.LASF462:
+.LASF461:
 	.ascii	"p_valid_page_count_table\000"
-.LASF703:
+.LASF702:
 	.ascii	"FtlMapTblRecovery\000"
 .LASF156:
 	.ascii	"UCLASS_GPIO\000"
-.LASF870:
+.LASF868:
 	.ascii	"debug_flag\000"
-.LASF498:
+.LASF497:
 	.ascii	"g_gc_next_blk_1\000"
 .LASF76:
 	.ascii	"off_dt_strings\000"
 .LASF376:
 	.ascii	"sys_blk_queue\000"
-.LASF648:
+.LASF647:
 	.ascii	"free_data_superblock\000"
-.LASF860:
+.LASF858:
 	.ascii	"re_test_next_page\000"
 .LASF61:
 	.ascii	"bi_arch_number\000"
-.LASF750:
+.LASF749:
 	.ascii	"FtlMapWritePage\000"
-.LASF784:
+.LASF783:
 	.ascii	"tmp_data_count\000"
 .LASF26:
 	.ascii	"ide_bus_offset\000"
-.LASF740:
+.LASF739:
 	.ascii	"action\000"
 .LASF408:
 	.ascii	"c_ftl_nand_byte_pre_page\000"
@@ -55306,11 +55462,11 @@ __func__.9940:
 	.ascii	"UCLASS_COUNT\000"
 .LASF174:
 	.ascii	"UCLASS_NVME\000"
-.LASF644:
+.LASF643:
 	.ascii	"new_id\000"
 .LASF345:
 	.ascii	"cache_write_count\000"
-.LASF641:
+.LASF640:
 	.ascii	"new_ppa\000"
 .LASF258:
 	.ascii	"net_restart_wrap\000"
@@ -55330,41 +55486,41 @@ __func__.9940:
 	.ascii	"totleEc\000"
 .LASF38:
 	.ascii	"lmb_property\000"
-.LASF458:
+.LASF457:
 	.ascii	"g_ect_tbl_info_size\000"
 .LASF338:
 	.ascii	"gcTempFlashMode\000"
 .LASF431:
 	.ascii	"g_MaxLbn\000"
-.LASF534:
+.LASF533:
 	.ascii	"g_nand_ops\000"
-.LASF584:
+.LASF583:
 	.ascii	"ftl_malloc\000"
-.LASF841:
+.LASF839:
 	.ascii	"first_lpa_nscts\000"
 .LASF183:
 	.ascii	"UCLASS_PMIC\000"
 .LASF318:
 	.ascii	"L2PMap\000"
-.LASF766:
+.LASF765:
 	.ascii	"prev_node_id\000"
-.LASF454:
+.LASF453:
 	.ascii	"gp_gc_page_buf_info\000"
-.LASF509:
+.LASF508:
 	.ascii	"g_totle_discard_page_count\000"
-.LASF657:
+.LASF656:
 	.ascii	"max_ec\000"
-.LASF537:
+.LASF536:
 	.ascii	"gFtlInitStatus\000"
 .LASF9:
 	.ascii	"long long int\000"
-.LASF459:
+.LASF458:
 	.ascii	"p_erase_count_table\000"
-.LASF825:
+.LASF823:
 	.ascii	"FtlBbmMapBadBlock\000"
 .LASF427:
 	.ascii	"g_GlobalDataVersion\000"
-.LASF718:
+.LASF717:
 	.ascii	"block_in_plane\000"
 .LASF128:
 	.ascii	"initrd_start\000"
@@ -55372,39 +55528,39 @@ __func__.9940:
 	.ascii	"g_MaxLbaSector\000"
 .LASF382:
 	.ascii	"current_plane\000"
-.LASF880:
+.LASF878:
 	.ascii	"free\000"
 .LASF383:
 	.ascii	"num_planes\000"
-.LASF801:
+.LASF799:
 	.ascii	"spareBuf\000"
-.LASF731:
+.LASF730:
 	.ascii	"FtlVendorPartRead\000"
-.LASF724:
+.LASF723:
 	.ascii	"FtlWriteDump_data\000"
 .LASF197:
 	.ascii	"UCLASS_SPI_FLASH\000"
 .LASF202:
 	.ascii	"UCLASS_TIMER\000"
-.LASF799:
+.LASF797:
 	.ascii	"FtlGetLastWrittenPage\000"
-.LASF662:
+.LASF661:
 	.ascii	"pDataHeader\000"
-.LASF542:
+.LASF541:
 	.ascii	"power_up_flag\000"
 .LASF365:
 	.ascii	"inkDie_write_and_check_en\000"
 .LASF413:
 	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF844:
+.LASF842:
 	.ascii	"sftl_deinit\000"
-.LASF816:
+.LASF814:
 	.ascii	"totle_count\000"
 .LASF282:
 	.ascii	"die_num\000"
-.LASF751:
+.LASF750:
 	.ascii	"update_map_block\000"
-.LASF882:
+.LASF880:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
 	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
@@ -55415,9 +55571,9 @@ __func__.9940:
 	.ascii	"common -ffixed-r9\000"
 .LASF307:
 	.ascii	"maxRegion\000"
-.LASF681:
+.LASF680:
 	.ascii	"next_free_active_plane\000"
-.LASF491:
+.LASF490:
 	.ascii	"p_gc_page_info\000"
 .LASF256:
 	.ascii	"net_our_vlan\000"
@@ -55425,29 +55581,29 @@ __func__.9940:
 	.ascii	"totle_power_on_run_times\000"
 .LASF93:
 	.ascii	"ih_os\000"
-.LASF526:
+.LASF525:
 	.ascii	"g_cur_erase_blk\000"
 .LASF184:
 	.ascii	"UCLASS_PWM\000"
-.LASF635:
+.LASF634:
 	.ascii	"FtlGcBufFree\000"
-.LASF775:
+.LASF774:
 	.ascii	"List_pop_index_node\000"
-.LASF691:
+.LASF690:
 	.ascii	"scan_completed\000"
-.LASF638:
+.LASF637:
 	.ascii	"update_vpc_list\000"
 .LASF170:
 	.ascii	"UCLASS_MMC\000"
-.LASF465:
+.LASF464:
 	.ascii	"p_map_block_table\000"
-.LASF544:
+.LASF543:
 	.ascii	"FtlUpdateVaildLpnCount\000"
 .LASF332:
 	.ascii	"res32_0\000"
 .LASF333:
 	.ascii	"res32_1\000"
-.LASF727:
+.LASF726:
 	.ascii	"FtlUpdateVaildLpn\000"
 .LASF390:
 	.ascii	"scr_ppa\000"
@@ -55457,43 +55613,43 @@ __func__.9940:
 	.ascii	"save_size\000"
 .LASF78:
 	.ascii	"version\000"
-.LASF653:
+.LASF652:
 	.ascii	"pNode\000"
-.LASF639:
+.LASF638:
 	.ascii	"get_new_active_ppa\000"
-.LASF879:
+.LASF877:
 	.ascii	"kmalloc\000"
 .LASF25:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF598:
+.LASF597:
 	.ascii	"max_gc_page_num\000"
 .LASF8:
 	.ascii	"unsigned int\000"
-.LASF713:
+.LASF712:
 	.ascii	"FtlSlcSuperblockCheck\000"
-.LASF515:
+.LASF514:
 	.ascii	"g_totle_avg_erase_count\000"
-.LASF837:
+.LASF835:
 	.ascii	"flashType\000"
-.LASF790:
+.LASF791:
 	.ascii	"FtlFreeSysBLkSort\000"
-.LASF780:
+.LASF779:
 	.ascii	"tmp_erase_count\000"
 .LASF83:
 	.ascii	"working_fdt\000"
-.LASF863:
+.LASF861:
 	.ascii	"FtlVariablesInit\000"
 .LASF392:
 	.ascii	"ftl_gc_page_buffer\000"
 .LASF239:
 	.ascii	"push_packet\000"
-.LASF709:
+.LASF708:
 	.ascii	"pMapBlkHeader\000"
 .LASF82:
 	.ascii	"size_dt_struct\000"
-.LASF473:
+.LASF472:
 	.ascii	"p_vendor_region_ppn_table\000"
-.LASF676:
+.LASF675:
 	.ascii	"make_superblock\000"
 .LASF97:
 	.ascii	"ih_name\000"
@@ -55503,11 +55659,11 @@ __func__.9940:
 	.ascii	"bufferFlashMode\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF838:
+.LASF836:
 	.ascii	"FtlRead\000"
 .LASF74:
 	.ascii	"totalsize\000"
-.LASF758:
+.LASF757:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
 .LASF385:
 	.ascii	"check_en\000"
@@ -55517,7 +55673,7 @@ __func__.9940:
 	.ascii	"prev\000"
 .LASF423:
 	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF651:
+.LASF650:
 	.ascii	"min_ec_id\000"
 .LASF388:
 	.ascii	"phyBlk\000"
@@ -55525,7 +55681,7 @@ __func__.9940:
 	.ascii	"net_boot_file_size\000"
 .LASF412:
 	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF666:
+.LASF665:
 	.ascii	"FtlVpcCheckAndModify\000"
 .LASF127:
 	.ascii	"ft_len\000"
@@ -55533,7 +55689,7 @@ __func__.9940:
 	.ascii	"UCLASS_REGULATOR\000"
 .LASF311:
 	.ascii	"pBlkVerTbl\000"
-.LASF489:
+.LASF488:
 	.ascii	"g_sys_save_data\000"
 .LASF124:
 	.ascii	"rd_start\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index a808dd6611..6f23e5bfaa 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:    GPL-2.0
- * date: 2018-07-04
+ * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-07-13
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -67,18 +67,18 @@ l2p_addr_tran.isra.0:
 	.cfi_endproc
 .LFE349:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
-	.section	.text.ftl_set_blk_mode.part.7,"ax",@progbits
+	.section	.text.ftl_set_blk_mode.part.6,"ax",@progbits
 	.align	2
-	.type	ftl_set_blk_mode.part.7, %function
-ftl_set_blk_mode.part.7:
-.LFB356:
+	.type	ftl_set_blk_mode.part.6, %function
+ftl_set_blk_mode.part.6:
+.LFB355:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
-	.loc 2 1346 0
+	.loc 2 1395 0
 	.cfi_startproc
 .LVL10:
-	.loc 2 1346 0
+	.loc 2 1395 0
 	and	w0, w0, 65535
-	.loc 2 1349 0
+	.loc 2 1398 0
 	adrp	x2, .LANCHOR1
 	ubfx	x1, x0, 5, 11
 	ldr	x3, [x2, #:lo12:.LANCHOR1]
@@ -91,8 +91,8 @@ ftl_set_blk_mode.part.7:
 	str	w0, [x3, x1]
 	ret
 	.cfi_endproc
-.LFE356:
-	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+.LFE355:
+	.size	ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
 	.global	Ftl_log2
@@ -139,7 +139,7 @@ Ftl_log2:
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 .LFB203:
-	.loc 3 159 0
+	.loc 3 160 0
 	.cfi_startproc
 .LVL20:
 	ret
@@ -152,41 +152,41 @@ FtlPrintInfo:
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 .LFB204:
-	.loc 3 165 0
+	.loc 3 166 0
 	.cfi_startproc
 .LVL21:
-	.loc 3 165 0
+	.loc 3 166 0
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	.loc 3 169 0
+	.loc 3 170 0
 	adrp	x2, .LANCHOR4
 	csel	w0, w0, w1, cs
 .LVL22:
-	.loc 3 168 0
+	.loc 3 169 0
 	adrp	x1, .LANCHOR2
 	and	w0, w0, 65535
 .LVL23:
 	str	w0, [x1, #:lo12:.LANCHOR2]
-	.loc 3 169 0
+	.loc 3 170 0
 	adrp	x1, .LANCHOR3
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w1, w1, w0
 	str	w1, [x2, #:lo12:.LANCHOR4]
-	.loc 3 170 0
+	.loc 3 171 0
 	adrp	x2, .LANCHOR6
 	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	sub	w0, w2, w0
 .LVL24:
 	adrp	x2, .LANCHOR5
 	strh	w0, [x2, #:lo12:.LANCHOR5]
-	.loc 3 171 0
+	.loc 3 172 0
 	adrp	x0, .LANCHOR8
 	ldr	w0, [x0, #:lo12:.LANCHOR8]
 	sub	w1, w0, w1
 	adrp	x0, .LANCHOR7
 	str	w1, [x0, #:lo12:.LANCHOR7]
-	.loc 3 174 0
+	.loc 3 175 0
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -198,7 +198,7 @@ FtlSysBlkNumInit:
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
 .LFB205:
-	.loc 3 183 0
+	.loc 3 184 0
 	.cfi_startproc
 .LVL25:
 	stp	x29, x30, [sp, -16]!
@@ -206,110 +206,110 @@ FtlConstantsInit:
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	mov	x5, x0
-	.loc 3 190 0
+	.loc 3 191 0
 	adrp	x1, .LANCHOR11
-	.loc 3 183 0
+	.loc 3 184 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 188 0
+	.loc 3 189 0
 	ldrh	w2, [x0]
 	adrp	x0, .LANCHOR9
 .LVL26:
-	.loc 3 189 0
+	.loc 3 190 0
 	ldrh	w4, [x5, 2]
-	.loc 3 188 0
-	strh	w2, [x0, #:lo12:.LANCHOR9]
 	.loc 3 189 0
+	strh	w2, [x0, #:lo12:.LANCHOR9]
+	.loc 3 190 0
 	adrp	x0, .LANCHOR10
 	strh	w4, [x0, #:lo12:.LANCHOR10]
-	.loc 3 190 0
+	.loc 3 191 0
 	ldrh	w0, [x5, 4]
 	strh	w0, [x1, #:lo12:.LANCHOR11]
-	.loc 3 191 0
+	.loc 3 192 0
 	ldrh	w1, [x5, 14]
 	cmp	w1, 4
 	bne	.L10
-	.loc 3 192 0
+	.loc 3 193 0
 	ldrh	w1, [x5, 6]
 	adrp	x3, .LANCHOR6
 	lsr	w1, w1, 1
 	strh	w1, [x3, #:lo12:.LANCHOR6]
-	.loc 3 193 0
+	.loc 3 194 0
 	adrp	x1, .LANCHOR12
 	mov	w3, 8
 	strh	w3, [x1, #:lo12:.LANCHOR12]
 .L10:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	adrp	x3, .LANCHOR13
 	add	x3, x3, :lo12:.LANCHOR13
-	.loc 3 183 0 discriminator 3
+	.loc 3 184 0 discriminator 3
 	mov	x1, 0
 .L11:
 .LVL27:
-	.loc 3 197 0 discriminator 3
+	.loc 3 198 0 discriminator 3
 	strb	w1, [x1, x3]
 .LVL28:
 	add	x1, x1, 1
 .LVL29:
-	.loc 3 196 0 discriminator 3
+	.loc 3 197 0 discriminator 3
 	cmp	x1, 32
 	bne	.L11
-	.loc 3 198 0
+	.loc 3 199 0
 	adrp	x1, .LANCHOR14
 	mov	w3, 5
-	.loc 3 200 0
+	.loc 3 201 0
 	cmp	w2, 1
-	.loc 3 198 0
-	strh	w3, [x1, #:lo12:.LANCHOR14]
 	.loc 3 199 0
+	strh	w3, [x1, #:lo12:.LANCHOR14]
+	.loc 3 200 0
 	adrp	x3, .LANCHOR15
 	strh	wzr, [x3, #:lo12:.LANCHOR15]
-	.loc 3 200 0
-	bne	.L12
 	.loc 3 201 0
+	bne	.L12
+	.loc 3 202 0
 	strh	w2, [x1, #:lo12:.LANCHOR14]
 .L12:
-	.loc 3 202 0
+	.loc 3 203 0
 	adrp	x1, .LANCHOR16
 	mov	w2, 640
-	.loc 3 204 0
+	.loc 3 205 0
 	mul	w4, w4, w0
-	.loc 3 202 0
+	.loc 3 203 0
 	strh	w2, [x1, #:lo12:.LANCHOR16]
-	.loc 3 204 0
+	.loc 3 205 0
 	adrp	x1, .LANCHOR3
 	and	w4, w4, 65535
 	strh	w4, [x1, #:lo12:.LANCHOR3]
-	.loc 3 205 0
+	.loc 3 206 0
 	adrp	x1, .LANCHOR6
 	ldrh	w3, [x1, #:lo12:.LANCHOR6]
 	adrp	x1, .LANCHOR17
 	mul	w0, w0, w3
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR17]
-	.loc 3 206 0
+	.loc 3 207 0
 	bl	Ftl_log2
 .LVL30:
-	.loc 3 207 0
+	.loc 3 208 0
 	ldrh	w7, [x5, 12]
-	.loc 3 206 0
-	adrp	x1, .LANCHOR18
 	.loc 3 207 0
+	adrp	x1, .LANCHOR18
+	.loc 3 208 0
 	adrp	x8, .LANCHOR19
-	.loc 3 206 0
+	.loc 3 207 0
 	strh	w0, [x1, #:lo12:.LANCHOR18]
-	.loc 3 208 0
-	adrp	x0, .LANCHOR20
 	.loc 3 209 0
+	adrp	x0, .LANCHOR20
+	.loc 3 210 0
 	mul	w1, w4, w7
-	.loc 3 207 0
-	strh	w7, [x8, #:lo12:.LANCHOR19]
 	.loc 3 208 0
-	strh	w7, [x0, #:lo12:.LANCHOR20]
+	strh	w7, [x8, #:lo12:.LANCHOR19]
 	.loc 3 209 0
+	strh	w7, [x0, #:lo12:.LANCHOR20]
+	.loc 3 210 0
 	adrp	x0, .LANCHOR21
 	strh	w1, [x0, #:lo12:.LANCHOR21]
-	.loc 3 210 0
+	.loc 3 211 0
 	adrp	x0, .LANCHOR12
 	ldrh	w6, [x0, #:lo12:.LANCHOR12]
 	mov	w0, w6
@@ -317,104 +317,104 @@ FtlConstantsInit:
 .LVL31:
 	and	w1, w0, 65535
 	adrp	x2, .LANCHOR22
-	.loc 3 212 0
+	.loc 3 213 0
 	adrp	x10, .LANCHOR23
-	.loc 3 214 0
+	.loc 3 215 0
 	ldrh	w5, [x5, 20]
 .LVL32:
-	.loc 3 210 0
+	.loc 3 211 0
 	strh	w0, [x2, #:lo12:.LANCHOR22]
-	.loc 3 212 0
+	.loc 3 213 0
 	ubfiz	w0, w6, 9, 7
 	strh	w0, [x10, #:lo12:.LANCHOR23]
-	.loc 3 213 0
+	.loc 3 214 0
 	adrp	x10, .LANCHOR24
 	ubfx	w0, w0, 8, 8
 	strh	w0, [x10, #:lo12:.LANCHOR24]
-	.loc 3 214 0
+	.loc 3 215 0
 	adrp	x0, .LANCHOR25
 	strh	w5, [x0, #:lo12:.LANCHOR25]
-	.loc 3 216 0
+	.loc 3 217 0
 	mul	w0, w4, w3
 	adrp	x5, .LANCHOR8
 	str	w0, [x5, #:lo12:.LANCHOR8]
-	.loc 3 217 0
+	.loc 3 218 0
 	adrp	x5, .LANCHOR26
 	mul	w0, w0, w6
-	.loc 3 218 0
+	.loc 3 219 0
 	mul	w6, w6, w7
-	.loc 3 217 0
+	.loc 3 218 0
 	mul	w0, w0, w7
 	mov	x7, x2
 	asr	w0, w0, 11
 	str	w0, [x5, #:lo12:.LANCHOR26]
-	.loc 3 218 0
+	.loc 3 219 0
 	mov	w0, 5120
 	adrp	x5, .LANCHOR27
 	sdiv	w0, w0, w6
 	and	w0, w0, 65535
-	.loc 3 219 0
+	.loc 3 220 0
 	cmp	w0, 4
 	bls	.L13
 .L19:
-	.loc 3 220 0
-	strh	w0, [x5, #:lo12:.LANCHOR27]
 	.loc 3 221 0
+	strh	w0, [x5, #:lo12:.LANCHOR27]
+	.loc 3 222 0
 	adrp	x2, .LANCHOR28
 	mov	w0, 640
-	.loc 3 223 0
+	.loc 3 224 0
 	lsl	w3, w3, 6
-	.loc 3 221 0
+	.loc 3 222 0
 	asr	w0, w0, w1
 	add	w0, w0, 2
-	.loc 3 223 0
+	.loc 3 224 0
 	add	w1, w1, 9
-	.loc 3 221 0
+	.loc 3 222 0
 	strh	w0, [x2, #:lo12:.LANCHOR28]
-	.loc 3 223 0
+	.loc 3 224 0
 	adrp	x0, .LANCHOR29
-	.loc 3 227 0
+	.loc 3 228 0
 	cmp	w4, 1
-	.loc 3 223 0
-	asr	w3, w3, w1
 	.loc 3 224 0
+	asr	w3, w3, w1
+	.loc 3 225 0
 	adrp	x1, .LANCHOR30
-	.loc 3 223 0
+	.loc 3 224 0
 	strh	w3, [x0, #:lo12:.LANCHOR29]
 	and	w3, w3, 65535
 	adrp	x6, .LANCHOR2
-	.loc 3 224 0
+	.loc 3 225 0
 	mul	w0, w3, w4
-	.loc 3 226 0
+	.loc 3 227 0
 	add	w3, w3, 8
-	.loc 3 224 0
+	.loc 3 225 0
 	str	w0, [x1, #:lo12:.LANCHOR30]
-	.loc 3 226 0
+	.loc 3 227 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	.loc 3 227 0
+	.loc 3 228 0
 	beq	.L15
 .L20:
-	.loc 3 228 0
+	.loc 3 229 0
 	str	w3, [x6, #:lo12:.LANCHOR2]
-	.loc 3 231 0
+	.loc 3 232 0
 	ldrh	w0, [x6, #:lo12:.LANCHOR2]
 	bl	FtlSysBlkNumInit
 .LVL33:
-	.loc 3 232 0
+	.loc 3 233 0
 	ldr	w1, [x6, #:lo12:.LANCHOR2]
 	adrp	x0, .LANCHOR31
-	.loc 3 263 0
+	.loc 3 264 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-	.loc 3 232 0
+	.loc 3 233 0
 	str	w1, [x0, #:lo12:.LANCHOR31]
-	.loc 3 234 0
+	.loc 3 235 0
 	adrp	x0, .LANCHOR7
 	ldrh	w1, [x8, #:lo12:.LANCHOR19]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
@@ -426,31 +426,31 @@ FtlConstantsInit:
 	adrp	x1, .LANCHOR32
 	add	w0, w0, 2
 	strh	w0, [x1, #:lo12:.LANCHOR32]
-	.loc 3 235 0
+	.loc 3 236 0
 	adrp	x0, .LANCHOR33
 	mov	w1, 32
 	strh	w1, [x0, #:lo12:.LANCHOR33]
-	.loc 3 236 0
+	.loc 3 237 0
 	adrp	x0, .LANCHOR34
 	str	wzr, [x0, #:lo12:.LANCHOR34]
-	.loc 3 237 0
+	.loc 3 238 0
 	ldrh	w0, [x5, #:lo12:.LANCHOR27]
 	add	w0, w0, 3
 	strh	w0, [x5, #:lo12:.LANCHOR27]
-	.loc 3 238 0
+	.loc 3 239 0
 	ldr	w0, [x4, #:lo12:.LANCHOR30]
 	add	w0, w0, 3
 	str	w0, [x4, #:lo12:.LANCHOR30]
-	.loc 3 263 0
+	.loc 3 264 0
 	mov	w0, 0
 	ret
 .L13:
 	.cfi_restore_state
-	.loc 3 220 0
+	.loc 3 221 0
 	mov	w0, 4
 	b	.L19
 .L15:
-	.loc 3 228 0
+	.loc 3 229 0
 	add	w3, w3, 4
 	b	.L20
 	.cfi_endproc
@@ -472,8 +472,8 @@ IsBlkInVendorPart:
 	.loc 3 517 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	cbz	w1, .L25
-.LBB166:
-.LBB167:
+.LBB185:
+.LBB186:
 	.loc 3 518 0
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
@@ -488,8 +488,8 @@ IsBlkInVendorPart:
 	bhi	.L24
 .LVL36:
 .L25:
-.LBE167:
-.LBE166:
+.LBE186:
+.LBE185:
 	.loc 3 524 0
 	mov	w0, 0
 .LVL37:
@@ -498,8 +498,8 @@ IsBlkInVendorPart:
 .L24:
 	add	x1, x1, 1
 .LVL39:
-.LBB169:
-.LBB168:
+.LBB188:
+.LBB187:
 	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
@@ -507,22 +507,36 @@ IsBlkInVendorPart:
 	bne	.L23
 	.loc 3 520 0
 	mov	w0, 1
-.LBE168:
-.LBE169:
+.LBE187:
+.LBE188:
 	.loc 3 525 0
 	ret
 	.cfi_endproc
 .LFE208:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB216:
+	.loc 3 952 0
+	.cfi_startproc
+	.loc 3 954 0
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE216:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.sftl_get_density,"ax",@progbits
 	.align	2
 	.global	sftl_get_density
 	.type	sftl_get_density, %function
 sftl_get_density:
 .LFB221:
-	.loc 3 1214 0
+	.loc 3 1178 0
 	.cfi_startproc
-	.loc 3 1216 0
+	.loc 3 1180 0
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	ret
@@ -671,11 +685,11 @@ FtlBbtCalcTotleCnt:
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
 	mul	w6, w6, w0
 	cmp	w4, w6
-	blt	.L42
+	blt	.L43
 	.loc 4 169 0
 	mov	w0, w5
 	ret
-.L42:
+.L43:
 	.loc 4 157 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -683,25 +697,25 @@ FtlBbtCalcTotleCnt:
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.L35:
+.L36:
 	.loc 4 162 0
 	mov	w0, w4
 	bl	FtlBbmIsBadBlock
 .LVL53:
-	cbz	w0, .L34
+	cbz	w0, .L35
 	.loc 4 164 0
 	add	w5, w5, 1
 .LVL54:
 	and	w5, w5, 65535
 .LVL55:
-.L34:
+.L35:
 	.loc 4 160 0 discriminator 2
 	add	w4, w4, 1
 .LVL56:
 	and	w4, w4, 65535
 .LVL57:
 	cmp	w4, w6
-	blt	.L35
+	blt	.L36
 	.loc 4 169 0
 	mov	w0, w5
 	ldp	x29, x30, [sp], 16
@@ -813,7 +827,7 @@ ftl_cmp_data_ver:
 	.loc 2 34 0
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L47
+	bls	.L48
 	.loc 2 36 0
 	sub	w1, w0, w1
 .LVL70:
@@ -822,7 +836,7 @@ ftl_cmp_data_ver:
 .LVL71:
 	ret
 .LVL72:
-.L47:
+.L48:
 	.loc 2 40 0
 	sub	w1, w1, w0
 .LVL73:
@@ -876,146 +890,58 @@ FtlFreeSysBlkQueueFull:
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
 .LFB241:
-	.loc 2 116 0
+	.loc 2 118 0
 	.cfi_startproc
 .LVL75:
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 123 0
-	adrp	x2, .LANCHOR38
-	.loc 2 125 0
-	adrp	x1, .LANCHOR39
-	.loc 2 123 0
-	add	x0, x2, :lo12:.LANCHOR38
-	.loc 2 116 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 125 0
-	ldr	x3, [x1, #:lo12:.LANCHOR39]
-	adrp	x1, .LANCHOR40
-	.loc 2 124 0
-	ldrh	w8, [x0, 2]
-	mov	x4, x2
 	.loc 2 123 0
-	ldrh	w7, [x0, 6]
-	.loc 2 124 0
-	mov	x6, x0
-	.loc 2 125 0
-	ldr	x10, [x1, #:lo12:.LANCHOR40]
-	.loc 2 124 0
-	and	x11, x8, 65535
-	.loc 2 123 0
-	mov	x5, 0
+	adrp	x0, .LANCHOR38
+	add	x1, x0, :lo12:.LANCHOR38
+	ldrh	w2, [x1, 6]
+	cbz	w2, .L52
+	.loc 2 119 0
+	adrp	x2, .LANCHOR39+28
+	ldrh	w3, [x1, 2]
+	mov	w6, 0
+	mov	w4, 0
+	ldrh	w5, [x2, #:lo12:.LANCHOR39+28]
+	ldrh	w2, [x1, 4]
+	and	w5, w5, 31
+.L54:
 .LVL76:
-.L52:
-	.loc 2 123 0 is_stmt 0 discriminator 1
-	cmp	w7, w5, uxth
-	bhi	.L53
-	.loc 2 128 0 is_stmt 1
-	sub	w10, w7, #1
-	.loc 2 139 0
-	add	x2, x4, :lo12:.LANCHOR38
-	mov	w0, 0
+	.loc 2 124 0 discriminator 1
+	cmp	w5, w4
+	bgt	.L55
+	cbz	w6, .L52
+	add	x0, x0, :lo12:.LANCHOR38
+	strh	w3, [x0, 2]
+	strh	w2, [x0, 4]
 .LVL77:
-.L54:
-	.loc 2 128 0 discriminator 1
-	cmp	w0, w10
-	blt	.L59
-	.loc 2 144 0
-	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
+.L52:
 	ret
 .LVL78:
-.L53:
-	.cfi_restore_state
+.L55:
+	.loc 2 125 0 discriminator 3
+	add	x6, x1, x3, sxtw 1
 	.loc 2 124 0 discriminator 3
-	add	x0, x11, x5
-	add	x0, x6, x0, lsl 1
-	ldrh	w0, [x0, 8]
-	bl	P2V_block_in_plane
+	add	w4, w4, 1
 .LVL79:
+	.loc 2 126 0 discriminator 3
+	add	w3, w3, 1
+	.loc 2 124 0 discriminator 3
+	and	w4, w4, 65535
+	.loc 2 126 0 discriminator 3
+	and	w3, w3, 1023
 	.loc 2 125 0 discriminator 3
-	ubfiz	x0, x0, 1, 16
+	ldrh	w7, [x6, 8]
 .LVL80:
-	ldrh	w0, [x10, x0]
-	str	w0, [x3, x5, lsl 2]
-.LVL81:
-	add	x5, x5, 1
-.LVL82:
-	b	.L52
-.LVL83:
-.L59:
-	.loc 2 130 0
-	add	w5, w0, 1
-	mov	w1, w0
-	and	w5, w5, 65535
-.LVL84:
-	mov	w4, w5
-.LVL85:
-.L55:
-	.loc 2 130 0 is_stmt 0 discriminator 1
-	cmp	w4, w7
-	bcc	.L57
-	.loc 2 134 0 is_stmt 1
-	cmp	w0, w1
-	beq	.L58
-	.loc 2 136 0
-	ubfiz	x4, x0, 2, 16
-.LVL86:
-	.loc 2 135 0
-	ubfiz	x6, x1, 2, 32
-	.loc 2 140 0
-	add	w0, w8, w0
-.LVL87:
-	.loc 2 139 0
-	add	w1, w1, w8
-.LVL88:
-	.loc 2 140 0
-	add	x0, x2, x0, sxtw 1
-	.loc 2 139 0
-	add	x1, x2, x1, sxtw 1
-	.loc 2 136 0
-	ldr	w12, [x3, x4]
-	.loc 2 135 0
-	ldr	w11, [x3, x6]
-.LVL89:
-	.loc 2 136 0
-	str	w12, [x3, x6]
-	.loc 2 137 0
-	str	w11, [x3, x4]
-	.loc 2 140 0
-	ldrh	w6, [x0, 8]
-	.loc 2 139 0
-	ldrh	w4, [x1, 8]
-.LVL90:
-	.loc 2 140 0
-	strh	w6, [x1, 8]
-	.loc 2 141 0
-	strh	w4, [x0, 8]
-.LVL91:
-.L58:
-	mov	w0, w5
+	.loc 2 127 0 discriminator 3
+	add	x6, x1, x2, sxtw 1
+	strh	w7, [x6, 8]
+	mov	w6, 1
+	.loc 2 128 0 discriminator 3
+	add	w2, w2, w6
+	and	w2, w2, 1023
 	b	.L54
-.LVL92:
-.L57:
-	.loc 2 131 0
-	ubfiz	x6, x4, 2, 16
-	ldr	w11, [x3, w1, uxtw 2]
-	ldr	w6, [x3, x6]
-	cmp	w11, w6
-	csel	w1, w1, w4, ls
-.LVL93:
-	.loc 2 130 0
-	add	w4, w4, 1
-.LVL94:
-	and	w4, w4, 65535
-.LVL95:
-	b	.L55
 	.cfi_endproc
 .LFE241:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
@@ -1025,294 +951,270 @@ FtlFreeSysBLkSort:
 	.type	IsInFreeQueue, %function
 IsInFreeQueue:
 .LFB242:
-	.loc 2 147 0
+	.loc 2 163 0
 	.cfi_startproc
-.LVL96:
-.LBB170:
-.LBB171:
+.LVL81:
+.LBB189:
+.LBB190:
 	.loc 2 94 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
-.LBE171:
-.LBE170:
-	.loc 2 147 0
+.LBE190:
+.LBE189:
+	.loc 2 163 0
 	and	w0, w0, 65535
-.LBB173:
-.LBB172:
+.LBB192:
+.LBB191:
 	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE172:
-.LBE173:
-	.loc 2 152 0
+.LBE191:
+.LBE192:
+	.loc 2 168 0
 	cmp	w4, 1024
 	beq	.L65
-	.loc 2 155 0
+	.loc 2 171 0
 	ldrh	w5, [x1, 2]
 	mov	w3, 0
 .L63:
-.LVL97:
-	.loc 2 154 0 discriminator 1
+.LVL82:
+	.loc 2 170 0 discriminator 1
 	cmp	w3, w4
 	bcc	.L64
-.LVL98:
+.LVL83:
 .L65:
-	.loc 2 148 0
+	.loc 2 164 0
 	mov	w0, 0
-.LVL99:
+.LVL84:
 	ret
-.LVL100:
+.LVL85:
 .L64:
-	.loc 2 155 0
+	.loc 2 171 0
 	add	w2, w3, w5
 	ubfiz	x2, x2, 1, 10
 	add	x2, x1, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w0
 	beq	.L66
-	.loc 2 154 0 discriminator 2
+	.loc 2 170 0 discriminator 2
 	add	w3, w3, 1
-.LVL101:
+.LVL86:
 	b	.L63
 .L66:
-	.loc 2 156 0
+	.loc 2 172 0
 	mov	w0, 1
-.LVL102:
-	.loc 2 162 0
+.LVL87:
+	.loc 2 178 0
 	ret
 	.cfi_endproc
 .LFE242:
 	.size	IsInFreeQueue, .-IsInFreeQueue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
-	.align	2
-	.global	FtlFreeSysBlkQueueOut
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
-.LFB243:
-	.loc 2 165 0
-	.cfi_startproc
-.LVL103:
-.LBB174:
-.LBB175:
-	.loc 2 89 0
-	adrp	x1, .LANCHOR38
-	add	x1, x1, :lo12:.LANCHOR38
-	ldrh	w3, [x1, 6]
-.LBE175:
-.LBE174:
-	.loc 2 168 0
-	cbz	w3, .L69
-.LVL104:
-.LBB176:
-	.loc 2 170 0
-	ldrh	w2, [x1, 2]
-	.loc 2 171 0
-	sub	w3, w3, #1
-	strh	w3, [x1, 6]
-	.loc 2 170 0
-	add	x0, x1, x2, sxtw 1
-	.loc 2 172 0
-	add	w2, w2, 1
-	and	w2, w2, 1023
-	strh	w2, [x1, 2]
-	.loc 2 170 0
-	ldrh	w0, [x0, 8]
-.LVL105:
-	ret
-.LVL106:
-.L69:
-.LBE176:
-	.loc 2 166 0
-	mov	w0, 65535
-.LVL107:
-	.loc 2 176 0
-	ret
-	.cfi_endproc
-.LFE243:
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
 .LFB246:
-	.loc 2 217 0
+	.loc 2 249 0
 	.cfi_startproc
-.LVL108:
+.LVL88:
+	.loc 2 260 0
+	adrp	x1, .LANCHOR5
+	.loc 2 249 0
 	and	w0, w0, 65535
-	.loc 2 225 0
-	mov	w11, 65535
-	cmp	w0, w11
-	beq	.L84
-	.loc 2 230 0
-	adrp	x1, .LANCHOR41
-	mov	w6, 6
-	ldr	x4, [x1, #:lo12:.LANCHOR41]
-	umull	x13, w0, w6
-	.loc 2 231 0
+	.loc 2 260 0
+	ldrh	w14, [x1, #:lo12:.LANCHOR5]
+	cmp	w14, w0
+	bls	.L83
+	.loc 2 265 0
+	adrp	x1, .LANCHOR40
+	mov	w3, 6
+	ldr	x6, [x1, #:lo12:.LANCHOR40]
+	umull	x13, w0, w3
+	.loc 2 266 0
 	mov	w1, -1
-	.loc 2 230 0
-	add	x3, x4, x13
-.LVL109:
-	.loc 2 231 0
-	strh	w1, [x3, 2]
-	strh	w1, [x4, x13]
-	.loc 2 233 0
-	adrp	x1, .LANCHOR42
+	.loc 2 265 0
+	add	x5, x6, x13
+.LVL89:
+	.loc 2 266 0
+	strh	w1, [x5, 2]
+	strh	w1, [x6, x13]
+	.loc 2 268 0
+	adrp	x1, .LANCHOR41
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR42]
-	cbnz	x12, .L72
-	.loc 2 234 0
-	str	x3, [x1, #:lo12:.LANCHOR42]
-.LVL110:
-.L84:
-	.loc 2 281 0
+	ldr	x12, [x1, #:lo12:.LANCHOR41]
+	cbnz	x12, .L70
+	.loc 2 269 0
+	str	x5, [x1, #:lo12:.LANCHOR41]
+.LVL90:
+.L83:
+	.loc 2 323 0
 	mov	w0, 0
-.LVL111:
+.LVL91:
 	ret
-.LVL112:
-.L72:
-	.loc 2 217 0
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	.loc 2 238 0
-	adrp	x1, .LANCHOR43
+.LVL92:
+.L70:
+	.loc 2 249 0
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 273 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x2, x0, 1, 16
-	.loc 2 244 0
-	mov	x8, -6148914691236517206
-	.loc 2 217 0
+	.loc 2 279 0
+	mov	x4, -6148914691236517206
+	.loc 2 249 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 238 0
-	ldr	x14, [x1, #:lo12:.LANCHOR43]
-	.loc 2 244 0
-	movk	x8, 0xaaab, lsl 0
-	.loc 2 239 0
-	ldrh	w1, [x3, 4]
-	mov	w7, -1
-	.loc 2 247 0
-	mov	w10, w7
-	.loc 2 239 0
-	cmp	w1, 0
-	.loc 2 238 0
-	ldrh	w5, [x14, x2]
-.LVL113:
-	.loc 2 239 0
-	mul	w5, w5, w1
-.LVL114:
-	.loc 2 244 0
-	sub	x1, x12, x4
-.LVL115:
-	asr	x1, x1, 1
-	.loc 2 239 0
-	csel	w5, w5, w7, ne
-.LVL116:
-	.loc 2 267 0
-	mov	w7, w6
-	.loc 2 244 0
-	mul	x1, x1, x8
-	.loc 2 252 0
-	adrp	x8, .LANCHOR40
-	ldr	x16, [x8, #:lo12:.LANCHOR40]
-	.loc 2 244 0
-	and	w1, w1, 65535
-.LVL117:
-	.loc 2 252 0
-	add	x8, x16, x2
-	mov	x2, x12
-.LVL118:
-.L79:
-	.loc 2 246 0
-	ubfiz	x17, x1, 1, 16
-	.loc 2 247 0
-	ldrh	w30, [x2, 4]
-	cmp	w30, 0
-	.loc 2 246 0
-	ldrh	w6, [x14, x17]
-.LVL119:
-	.loc 2 247 0
-	mul	w6, w6, w30
-.LVL120:
-	csel	w6, w6, w10, ne
-.LVL121:
-	.loc 2 251 0
-	cmp	w5, w6
-	bne	.L75
-	.loc 2 252 0
-	ldrh	w17, [x16, x17]
-.LVL122:
-	ldrh	w6, [x8]
-.LVL123:
-	cmp	w17, w6
-	bcc	.L77
-.L76:
-	.loc 2 270 0
-	strh	w1, [x4, x13]
-.LVL124:
 	.loc 2 273 0
-	cmp	x2, x12
-	.loc 2 271 0
-	ldrh	w1, [x2, 2]
-.LVL125:
-	strh	w1, [x3, 2]
+	ldr	x16, [x1, #:lo12:.LANCHOR42]
+	.loc 2 279 0
+	movk	x4, 0xaaab, lsl 0
+	.loc 2 274 0
+	ldrh	w1, [x5, 4]
+	mov	w8, -1
+	.loc 2 289 0
+	mov	w11, w8
+	.loc 2 249 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 274 0
+	cmp	w1, 0
+	.loc 2 301 0
+	mov	w20, 65535
 	.loc 2 273 0
-	bne	.L80
+	ldrh	w7, [x16, x2]
+.LVL93:
 	.loc 2 274 0
-	strh	w0, [x2, 2]
-	.loc 2 275 0
-	str	x3, [x15, #:lo12:.LANCHOR42]
-	b	.L71
-.LVL126:
-.L75:
+	mul	w7, w7, w1
+.LVL94:
+	.loc 2 279 0
+	sub	x1, x12, x6
+.LVL95:
+	asr	x1, x1, 1
+	.loc 2 274 0
+	csel	w7, w7, w8, ne
+.LVL96:
+	.loc 2 309 0
+	mov	w8, w3
+	.loc 2 279 0
+	mul	x1, x1, x4
+	.loc 2 294 0
+	adrp	x4, .LANCHOR43
+	ldr	x17, [x4, #:lo12:.LANCHOR43]
+	.loc 2 279 0
+	and	w1, w1, 65535
+.LVL97:
+	.loc 2 294 0
+	mov	x4, x12
+	add	x10, x17, x2
 	.loc 2 256 0
+	mov	w2, 0
+.LVL98:
+.L78:
+	.loc 2 281 0
+	add	w2, w2, 1
+.LVL99:
+	and	w2, w2, 65535
+.LVL100:
+	.loc 2 282 0
+	cmp	w14, w2
+	bcc	.L69
+	.loc 2 285 0
+	cmp	w1, w0
+	beq	.L69
+	.loc 2 288 0
+	ubfiz	x30, x1, 1, 16
+	.loc 2 289 0
+	ldrh	w19, [x4, 4]
+	cmp	w19, 0
+	.loc 2 288 0
+	ldrh	w3, [x16, x30]
+.LVL101:
+	.loc 2 289 0
+	mul	w3, w3, w19
+.LVL102:
+	csel	w3, w3, w11, ne
+.LVL103:
+	.loc 2 293 0
+	cmp	w7, w3
+	bne	.L74
+	.loc 2 294 0
+	ldrh	w19, [x17, x30]
+	ldrh	w3, [x10]
+.LVL104:
+	cmp	w19, w3
 	bcc	.L76
-.LVL127:
-.L77:
-	.loc 2 259 0
-	ldrh	w6, [x2]
-	cmp	w6, w11
-	bne	.L78
-	.loc 2 260 0
-	strh	w1, [x3, 2]
-.LVL128:
-	.loc 2 261 0
-	strh	w0, [x2]
-	.loc 2 262 0
+.L75:
+	.loc 2 312 0
+	strh	w1, [x6, x13]
+.LVL105:
+	.loc 2 315 0
+	cmp	x4, x12
+	.loc 2 313 0
+	ldrh	w1, [x4, 2]
+.LVL106:
+	strh	w1, [x5, 2]
+	.loc 2 315 0
+	bne	.L79
+	.loc 2 316 0
+	strh	w0, [x4, 2]
+	.loc 2 317 0
+	str	x5, [x15, #:lo12:.LANCHOR41]
+	b	.L69
+.LVL107:
+.L74:
+	.loc 2 298 0
+	bcc	.L75
+.LVL108:
+.L76:
+	.loc 2 301 0
+	ldrh	w3, [x4]
+	cmp	w3, w20
+	bne	.L77
+	.loc 2 302 0
+	strh	w1, [x5, 2]
+.LVL109:
+	.loc 2 303 0
+	strh	w0, [x4]
+	.loc 2 304 0
 	adrp	x0, .LANCHOR44
-	str	x3, [x0, #:lo12:.LANCHOR44]
-.LVL129:
-.L71:
-	.loc 2 281 0
+	str	x5, [x0, #:lo12:.LANCHOR44]
+.LVL110:
+.L69:
+	.loc 2 323 0
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL130:
-.L78:
+.LVL111:
+.L77:
 	.cfi_restore_state
-	.loc 2 267 0
-	umaddl	x2, w6, w7, x4
-.LVL131:
-	.loc 2 246 0
-	mov	w1, w6
-.LVL132:
-	b	.L79
-.LVL133:
-.L80:
-	.loc 2 277 0
-	ldrh	w1, [x2, 2]
-	mov	w3, 6
-.LVL134:
-	umull	x1, w1, w3
-	strh	w0, [x4, x1]
-.LVL135:
-	.loc 2 278 0
-	strh	w0, [x2, 2]
-	b	.L71
+	.loc 2 309 0
+	umaddl	x4, w3, w8, x6
+.LVL112:
+	.loc 2 281 0
+	mov	w1, w3
+	b	.L78
+.LVL113:
+.L79:
+	.loc 2 319 0
+	ldrh	w1, [x4, 2]
+	mov	w2, 6
+.LVL114:
+	umull	x1, w1, w2
+	strh	w0, [x6, x1]
+.LVL115:
+	.loc 2 320 0
+	strh	w0, [x4, 2]
+	b	.L69
 	.cfi_endproc
 .LFE246:
 	.size	insert_data_list, .-insert_data_list
@@ -1322,51 +1224,51 @@ insert_data_list:
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 .LFB245:
-	.loc 2 186 0
+	.loc 2 218 0
 	.cfi_startproc
-.LVL136:
+.LVL116:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 187 0
+	.loc 2 219 0
 	bl	insert_data_list
-.LVL137:
-	.loc 2 188 0
+.LVL117:
+	.loc 2 220 0
 	adrp	x1, .LANCHOR45
 	ldrh	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR45]
-	.loc 2 189 0
+	.loc 2 221 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L86
-.LVL138:
-	.loc 2 190 0
+	bcs	.L85
+.LVL118:
+	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB179:
-.LBB180:
-	.loc 2 189 0
-	mov	w2, 189
+.LBB195:
+.LBB196:
+	.loc 2 221 0
+	mov	w2, 221
 	adrp	x1, .LANCHOR46
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL139:
-.L86:
+.LVL119:
+.L85:
 	.cfi_restore_state
-.LBE180:
-.LBE179:
-	.loc 2 190 0
+.LBE196:
+.LBE195:
+	.loc 2 222 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -1381,117 +1283,117 @@ INSERT_DATA_LIST:
 	.type	insert_free_list, %function
 insert_free_list:
 .LFB247:
-	.loc 2 284 0
+	.loc 2 326 0
 	.cfi_startproc
-.LVL140:
-	.loc 2 284 0
+.LVL120:
+	.loc 2 326 0
 	and	w0, w0, 65535
-	.loc 2 290 0
+	.loc 2 332 0
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L90
-	.loc 2 293 0
-	adrp	x1, .LANCHOR41
+	beq	.L89
+	.loc 2 335 0
+	adrp	x1, .LANCHOR40
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR41]
+	ldr	x3, [x1, #:lo12:.LANCHOR40]
 	umull	x8, w0, w6
-	.loc 2 294 0
+	.loc 2 336 0
 	mov	w1, -1
-	.loc 2 293 0
+	.loc 2 335 0
 	add	x4, x3, x8
-.LVL141:
-	.loc 2 294 0
+.LVL121:
+	.loc 2 336 0
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	.loc 2 296 0
+	.loc 2 338 0
 	adrp	x1, .LANCHOR47
 	mov	x12, x1
 	ldr	x5, [x1, #:lo12:.LANCHOR47]
-	cbnz	x5, .L91
-	.loc 2 297 0
+	cbnz	x5, .L90
+	.loc 2 339 0
 	str	x4, [x1, #:lo12:.LANCHOR47]
-.LVL142:
-.L90:
-	.loc 2 330 0
+.LVL122:
+.L89:
+	.loc 2 372 0
 	mov	w0, 0
-.LVL143:
+.LVL123:
 	ret
-.LVL144:
-.L91:
-	.loc 2 301 0
-	adrp	x1, .LANCHOR40
-	.loc 2 303 0
+.LVL124:
+.L90:
+	.loc 2 343 0
+	adrp	x1, .LANCHOR43
+	.loc 2 345 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 301 0
-	ldr	x11, [x1, #:lo12:.LANCHOR40]
+	.loc 2 343 0
+	ldr	x11, [x1, #:lo12:.LANCHOR43]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
-.LVL145:
-	.loc 2 303 0
+.LVL125:
+	.loc 2 345 0
 	sub	x1, x5, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.LVL146:
-.L94:
-	.loc 2 306 0
+.LVL126:
+.L93:
+	.loc 2 348 0
 	ubfiz	x10, x1, 1, 16
-	.loc 2 307 0
+	.loc 2 349 0
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L92
-	.loc 2 310 0
+	bcs	.L91
+	.loc 2 352 0
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L93
-	.loc 2 311 0
+	bne	.L92
+	.loc 2 353 0
 	strh	w1, [x4, 2]
-.LVL147:
-	.loc 2 312 0
+.LVL127:
+	.loc 2 354 0
 	strh	w0, [x2]
-	.loc 2 313 0
-	b	.L90
-.LVL148:
-.L93:
-	.loc 2 316 0
+	.loc 2 355 0
+	b	.L89
+.LVL128:
+.L92:
+	.loc 2 358 0
 	umaddl	x2, w10, w6, x3
-.LVL149:
-	.loc 2 306 0
+.LVL129:
+	.loc 2 348 0
 	mov	w1, w10
-.LVL150:
-	b	.L94
-.LVL151:
-.L92:
-	.loc 2 319 0
+.LVL130:
+	b	.L93
+.LVL131:
+.L91:
+	.loc 2 361 0
 	ldrh	w6, [x2, 2]
-	.loc 2 322 0
+	.loc 2 364 0
 	cmp	x2, x5
-	.loc 2 319 0
+	.loc 2 361 0
 	strh	w6, [x4, 2]
-.LVL152:
-	.loc 2 320 0
+.LVL132:
+	.loc 2 362 0
 	strh	w1, [x3, x8]
-	.loc 2 322 0
-	bne	.L95
-	.loc 2 323 0
+	.loc 2 364 0
+	bne	.L94
+	.loc 2 365 0
 	strh	w0, [x2, 2]
-	.loc 2 324 0
+	.loc 2 366 0
 	str	x4, [x12, #:lo12:.LANCHOR47]
-	b	.L90
-.L95:
-	.loc 2 326 0
+	b	.L89
+.L94:
+	.loc 2 368 0
 	ldrh	w1, [x2, 2]
-.LVL153:
+.LVL133:
 	mov	w4, 6
-.LVL154:
+.LVL134:
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
-.LVL155:
-	.loc 2 327 0
+.LVL135:
+	.loc 2 369 0
 	strh	w0, [x2, 2]
-	b	.L90
+	b	.L89
 	.cfi_endproc
 .LFE247:
 	.size	insert_free_list, .-insert_free_list
@@ -1501,51 +1403,51 @@ insert_free_list:
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 .LFB244:
-	.loc 2 179 0
+	.loc 2 211 0
 	.cfi_startproc
-.LVL156:
+.LVL136:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 180 0
+	.loc 2 212 0
 	bl	insert_free_list
-.LVL157:
-	.loc 2 181 0
+.LVL137:
+	.loc 2 213 0
 	adrp	x1, .LANCHOR48
 	ldrh	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, #:lo12:.LANCHOR48]
-	.loc 2 182 0
+	.loc 2 214 0
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcs	.L96
-.LVL158:
-	.loc 2 183 0
+	bcs	.L95
+.LVL138:
+	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB183:
-.LBB184:
-	.loc 2 182 0
-	mov	w2, 182
+.LBB199:
+.LBB200:
+	.loc 2 214 0
+	mov	w2, 214
 	adrp	x1, .LANCHOR49
 	adrp	x0, .LC1
 	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC1
 	b	printf
-.LVL159:
-.L96:
+.LVL139:
+.L95:
 	.cfi_restore_state
-.LBE184:
-.LBE183:
-	.loc 2 183 0
+.LBE200:
+.LBE199:
+	.loc 2 215 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -1560,9 +1462,9 @@ INSERT_FREE_LIST:
 	.type	List_remove_node, %function
 List_remove_node:
 .LFB248:
-	.loc 2 333 0
+	.loc 2 375 0
 	.cfi_startproc
-.LVL160:
+.LVL140:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -1573,69 +1475,69 @@ List_remove_node:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 336 0
-	adrp	x20, .LANCHOR41
-	.loc 2 333 0
+	.loc 2 378 0
+	adrp	x20, .LANCHOR40
+	.loc 2 375 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	mov	x22, x0
-	.loc 2 336 0
+	.loc 2 378 0
 	mov	w0, 6
-.LVL161:
-	.loc 2 333 0
+.LVL141:
+	.loc 2 375 0
 	str	x23, [sp, 48]
 	.cfi_offset 23, -16
-	.loc 2 336 0
-	ldr	x23, [x20, #:lo12:.LANCHOR41]
+	.loc 2 378 0
+	ldr	x23, [x20, #:lo12:.LANCHOR40]
 	umull	x21, w1, w0
-	.loc 2 337 0
+	.loc 2 379 0
 	mov	w0, 65535
-	.loc 2 336 0
+	.loc 2 378 0
 	add	x19, x23, x21
-.LVL162:
-	.loc 2 337 0
+.LVL142:
+	.loc 2 379 0
 	ldrh	w1, [x19, 2]
-.LVL163:
+.LVL143:
 	cmp	w1, w0
-	bne	.L100
-	.loc 2 337 0 is_stmt 0 discriminator 1
+	bne	.L99
+	.loc 2 379 0 is_stmt 0 discriminator 1
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L100
-	.loc 2 337 0 discriminator 2
+	beq	.L99
+	.loc 2 379 0 discriminator 2
 	adrp	x1, .LANCHOR50
 	adrp	x0, .LC1
-	mov	w2, 337
+	mov	w2, 379
 	add	x1, x1, :lo12:.LANCHOR50
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL164:
-.L100:
-	.loc 2 339 0 is_stmt 1
+.LVL144:
+.L99:
+	.loc 2 381 0 is_stmt 1
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L101
-	.loc 2 340 0
+	bne	.L100
+	.loc 2 382 0
 	cmp	w0, w1
-	bne	.L102
-	.loc 2 341 0
+	bne	.L101
+	.loc 2 383 0
 	str	xzr, [x22]
-.L103:
-	.loc 2 355 0
+.L102:
+	.loc 2 399 0
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
-	.loc 2 357 0
+	.loc 2 401 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL165:
+.LVL145:
 	ldp	x21, x22, [sp, 32]
-.LVL166:
+.LVL146:
 	ldr	x23, [sp, 48]
-.LVL167:
+.LVL147:
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1647,49 +1549,56 @@ List_remove_node:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL168:
-.L102:
+.LVL148:
+.L101:
 	.cfi_restore_state
-	.loc 2 343 0
-	ldr	x1, [x20, #:lo12:.LANCHOR41]
+	.loc 2 385 0
+	ldr	x1, [x20, #:lo12:.LANCHOR40]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
-	.loc 2 344 0
+	.loc 2 386 0
 	mov	w1, -1
-	.loc 2 343 0
+	.loc 2 385 0
 	str	x0, [x22]
-	.loc 2 344 0
+	.loc 2 386 0
 	strh	w1, [x0, 2]
-	b	.L103
-.L101:
-	.loc 2 346 0
+	b	.L102
+.L100:
+	.loc 2 388 0
 	cmp	w0, w1
-	mov	w2, 6
 	ldrh	w1, [x19, 2]
-	bne	.L104
-.LVL169:
-	.loc 2 347 0
-	umull	x1, w1, w2
-	.loc 2 348 0
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	bne	.L103
+	.loc 2 389 0
+	cmp	w1, w0
+	beq	.L102
+.LVL149:
+	.loc 2 390 0
+	mov	w0, 6
+	.loc 2 391 0
 	mov	w2, -1
+	.loc 2 390 0
+	umull	x1, w1, w0
+.LVL150:
+	.loc 2 391 0
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	strh	w2, [x0, x1]
-	b	.L103
-.LVL170:
-.L104:
-	.loc 2 350 0
-	ldr	x3, [x20, #:lo12:.LANCHOR41]
-.LVL171:
-	.loc 2 351 0
-	umaddl	x4, w0, w2, x3
+	b	.L102
+.LVL151:
+.L103:
+	.loc 2 394 0
+	ldr	x2, [x20, #:lo12:.LANCHOR40]
+.LVL152:
+	mov	w3, 6
+	.loc 2 395 0
+	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
-.LVL172:
-	.loc 2 352 0
+.LVL153:
+	.loc 2 396 0
 	ldrh	w1, [x19, 2]
-	umull	x1, w1, w2
-	.loc 2 353 0
-	strh	w0, [x3, x1]
-	b	.L103
+	umull	x1, w1, w3
+	.loc 2 397 0
+	strh	w0, [x2, x1]
+	b	.L102
 	.cfi_endproc
 .LFE248:
 	.size	List_remove_node, .-List_remove_node
@@ -1699,54 +1608,54 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 .LFB249:
-	.loc 2 360 0
+	.loc 2 404 0
 	.cfi_startproc
-.LVL173:
-	.loc 2 364 0
+.LVL154:
+	.loc 2 408 0
 	ldr	x2, [x0]
-	cbz	x2, .L112
-	.loc 2 360 0
+	cbz	x2, .L111
+	.loc 2 404 0
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 369 0
-	adrp	x3, .LANCHOR41
+	.loc 2 413 0
+	adrp	x3, .LANCHOR40
 	and	w1, w1, 65535
-	.loc 2 368 0
+	.loc 2 412 0
 	mov	w4, 65535
-	.loc 2 360 0
+	.loc 2 404 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 369 0
+	.loc 2 413 0
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR41]
-.LVL174:
-.L108:
-	.loc 2 368 0
-	cbnz	w1, .L109
-.L111:
-	.loc 2 372 0
+	ldr	x19, [x3, #:lo12:.LANCHOR40]
+.LVL155:
+.L107:
+	.loc 2 412 0
+	cbnz	w1, .L108
+.L110:
+	.loc 2 416 0
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
-.LVL175:
+.LVL156:
 	asr	x19, x19, 1
 	movk	x2, 0xaaab, lsl 0
 	mul	x19, x19, x2
 	and	w19, w19, 65535
-.LVL176:
-	.loc 2 373 0
+.LVL157:
+	.loc 2 417 0
 	mov	w1, w19
-.LVL177:
+.LVL158:
 	bl	List_remove_node
-.LVL178:
-	.loc 2 375 0
+.LVL159:
+	.loc 2 419 0
 	mov	w0, w19
-	.loc 2 376 0
+	.loc 2 420 0
 	ldr	x19, [sp, 16]
-.LVL179:
+.LVL160:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -1754,32 +1663,32 @@ List_pop_index_node:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL180:
-.L109:
+.LVL161:
+.L108:
 	.cfi_restore_state
-	.loc 2 368 0 discriminator 1
+	.loc 2 412 0 discriminator 1
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L111
-	.loc 2 370 0
+	beq	.L110
+	.loc 2 414 0
 	sub	w1, w1, #1
-.LVL181:
-	.loc 2 369 0
+.LVL162:
+	.loc 2 413 0
 	umaddl	x2, w3, w5, x19
-.LVL182:
-	.loc 2 370 0
+.LVL163:
+	.loc 2 414 0
 	and	w1, w1, 65535
-.LVL183:
-	b	.L108
-.LVL184:
-.L112:
+.LVL164:
+	b	.L107
+.LVL165:
+.L111:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 29
 	.cfi_restore 30
-	.loc 2 365 0
+	.loc 2 409 0
 	mov	w0, 65535
-.LVL185:
+.LVL166:
 	ret
 	.cfi_endproc
 .LFE249:
@@ -1790,13 +1699,13 @@ List_pop_index_node:
 	.type	List_pop_head_node, %function
 List_pop_head_node:
 .LFB250:
-	.loc 2 379 0
+	.loc 2 423 0
 	.cfi_startproc
-.LVL186:
-	.loc 2 380 0
+.LVL167:
+	.loc 2 424 0
 	mov	w1, 0
 	b	List_pop_index_node
-.LVL187:
+.LVL168:
 	.cfi_endproc
 .LFE250:
 	.size	List_pop_head_node, .-List_pop_head_node
@@ -1806,59 +1715,59 @@ List_pop_head_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 .LFB251:
-	.loc 2 384 0
+	.loc 2 428 0
 	.cfi_startproc
-.LVL188:
-	.loc 2 384 0
+.LVL169:
+	.loc 2 428 0
 	and	w2, w0, 65535
-	.loc 2 388 0
-	adrp	x0, .LANCHOR42
-.LVL189:
-	ldr	x1, [x0, #:lo12:.LANCHOR42]
-	cbz	x1, .L123
-	.loc 2 393 0
+	.loc 2 432 0
 	adrp	x0, .LANCHOR41
+.LVL170:
+	ldr	x1, [x0, #:lo12:.LANCHOR41]
+	cbz	x1, .L122
+	.loc 2 437 0
+	adrp	x0, .LANCHOR40
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR41]
-	.loc 2 392 0
+	ldr	x3, [x0, #:lo12:.LANCHOR40]
+	.loc 2 436 0
 	mov	w0, 65535
-.LVL190:
-.L120:
-	cbz	w2, .L121
-	.loc 2 392 0 is_stmt 0 discriminator 1
+.LVL171:
+.L119:
+	cbz	w2, .L120
+	.loc 2 436 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x1]
-.LVL191:
+.LVL172:
 	cmp	w1, w0
-	bne	.L122
+	bne	.L121
 	ret
-.L122:
-	.loc 2 394 0 is_stmt 1
+.L121:
+	.loc 2 438 0 is_stmt 1
 	sub	w2, w2, #1
-.LVL192:
-	.loc 2 393 0
+.LVL173:
+	.loc 2 437 0
 	umaddl	x1, w1, w4, x3
-.LVL193:
-	.loc 2 394 0
+.LVL174:
+	.loc 2 438 0
 	and	w2, w2, 65535
-.LVL194:
-	b	.L120
-.LVL195:
-.L123:
-	.loc 2 389 0
+.LVL175:
+	b	.L119
+.LVL176:
+.L122:
+	.loc 2 433 0
 	mov	w0, 65535
 	ret
-.LVL196:
-.L121:
-	.loc 2 398 0
+.LVL177:
+.L120:
+	.loc 2 442 0
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
-.LVL197:
+.LVL178:
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	.loc 2 400 0
+	.loc 2 444 0
 	and	w0, w0, 65535
-	.loc 2 401 0
+	.loc 2 445 0
 	ret
 	.cfi_endproc
 .LFE251:
@@ -1869,164 +1778,184 @@ List_get_gc_head_node:
 	.type	List_update_data_list, %function
 List_update_data_list:
 .LFB252:
-	.loc 2 404 0
+	.loc 2 448 0
 	.cfi_startproc
-.LVL198:
-	stp	x29, x30, [sp, -64]!
-	.cfi_def_cfa_offset 64
-	.cfi_offset 29, -64
-	.cfi_offset 30, -56
+.LVL179:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -48
-	.cfi_offset 20, -40
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
 	and	w19, w0, 65535
-	.loc 2 413 0
+	.loc 2 457 0
 	adrp	x0, .LANCHOR51
-.LVL199:
-	.loc 2 404 0
+.LVL180:
+	.loc 2 448 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.cfi_offset 21, -32
-	.cfi_offset 22, -24
-	.cfi_offset 23, -16
-	.cfi_offset 24, -8
-	.loc 2 413 0
+	.loc 2 457 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	.loc 2 448 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 457 0
 	cmp	w0, w19
-	beq	.L126
-	.loc 2 413 0 is_stmt 0 discriminator 1
+	beq	.L125
+	.loc 2 457 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L126
-	.loc 2 413 0 discriminator 2
+	beq	.L125
+	.loc 2 457 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L126
-.LVL200:
-.LBB187:
-.LBB188:
-	.loc 2 416 0 is_stmt 1
-	adrp	x2, .LANCHOR41
-	mov	w1, 6
-	.loc 2 418 0
-	adrp	x0, .LANCHOR42
-	mov	x24, x2
-	.loc 2 416 0
-	umull	x1, w19, w1
-	ldr	x3, [x2, #:lo12:.LANCHOR41]
-	.loc 2 418 0
-	ldr	x4, [x0, #:lo12:.LANCHOR42]
-	mov	x23, x0
-	.loc 2 416 0
-	add	x22, x3, x1
-.LVL201:
-	.loc 2 418 0
-	cmp	x22, x4
-	beq	.L126
-.LVL202:
-	.loc 2 421 0
-	adrp	x0, .LANCHOR43
-	ubfiz	x2, x19, 1, 16
-	mov	x21, x0
-	ldr	x4, [x0, #:lo12:.LANCHOR43]
-	.loc 2 426 0
+	beq	.L125
+.LVL181:
+.LBB203:
+.LBB204:
+	.loc 2 460 0 is_stmt 1
+	adrp	x0, .LANCHOR40
+	mov	w21, 6
+	.loc 2 462 0
+	adrp	x24, .LANCHOR41
+	mov	x26, x0
+	.loc 2 460 0
+	umull	x21, w19, w21
+	ldr	x23, [x0, #:lo12:.LANCHOR40]
+	.loc 2 462 0
+	ldr	x1, [x24, #:lo12:.LANCHOR41]
+	.loc 2 460 0
+	add	x22, x23, x21
+.LVL182:
+	.loc 2 462 0
+	cmp	x22, x1
+	beq	.L125
+	.loc 2 465 0
+	adrp	x1, .LANCHOR42
+	ubfiz	x0, x19, 1, 16
+	mov	x25, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
+	.loc 2 470 0
+	mov	w1, 65535
+	.loc 2 465 0
+	ldrh	w20, [x2, x0]
+.LVL183:
+	.loc 2 466 0
+	ldrh	w0, [x22, 4]
+.LVL184:
+	cmp	w0, 0
+	mul	w20, w20, w0
+.LVL185:
+	.loc 2 470 0
 	ldrh	w0, [x22, 2]
-	.loc 2 422 0
-	ldrh	w20, [x4, x2]
-	ldrh	w2, [x22, 4]
-	mul	w20, w20, w2
-.LVL203:
-	.loc 2 426 0
-	mov	w2, 65535
-	.loc 2 424 0
-	cmp	w20, 0
+.LVL186:
+	.loc 2 466 0
 	csinv	w20, w20, wzr, ne
-.LVL204:
-	.loc 2 426 0
-	cmp	w0, w2
-	bne	.L129
-	ldrh	w1, [x3, x1]
+.LVL187:
+	.loc 2 470 0
+	cmp	w0, w1
+	bne	.L128
+	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L129
+	bne	.L128
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 426
+	mov	w2, 470
+.LVL188:
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL205:
+.LVL189:
+.L128:
+	.loc 2 471 0
+	ldrh	w0, [x22, 2]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L129
+	ldrh	w1, [x23, x21]
+	cmp	w1, w0
+	beq	.L125
 .L129:
-	.loc 2 427 0
-	ldrh	w1, [x22, 2]
-	mov	w0, 6
-	.loc 2 428 0
+	.loc 2 473 0
+	mov	w1, 6
+	.loc 2 474 0
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	.loc 2 427 0
-	umull	x1, w1, w0
-.LVL206:
-	.loc 2 428 0
-	asr	x0, x1, 1
-	mul	x0, x0, x2
-	.loc 2 429 0
-	ldr	x2, [x21, #:lo12:.LANCHOR43]
-	.loc 2 430 0
-	ldrh	w0, [x2, x0, lsl 1]
-	ldr	x2, [x24, #:lo12:.LANCHOR41]
-	add	x1, x2, x1
-.LVL207:
-	ldrh	w1, [x1, 4]
-.LVL208:
-	mul	w0, w0, w1
-.LVL209:
-	.loc 2 432 0
-	cmp	w0, 0
+	.loc 2 473 0
+	umull	x0, w0, w1
+.LVL190:
+	.loc 2 474 0
+	asr	x1, x0, 1
+	mul	x1, x1, x2
+	.loc 2 475 0
+	ldr	x2, [x25, #:lo12:.LANCHOR42]
+	ldrh	w1, [x2, x1, lsl 1]
+.LVL191:
+	.loc 2 476 0
+	ldr	x2, [x26, #:lo12:.LANCHOR40]
+	add	x0, x2, x0
+.LVL192:
+	ldrh	w2, [x0, 4]
+.LVL193:
+	cmp	w2, 0
+	mul	w0, w1, w2
+.LVL194:
 	csinv	w0, w0, wzr, ne
-.LVL210:
-	.loc 2 434 0
+.LVL195:
+	.loc 2 480 0
 	cmp	w20, w0
-	bcs	.L126
-	.loc 2 435 0
+	bcs	.L125
+	.loc 2 481 0
 	adrp	x20, .LANCHOR45
-.LVL211:
+.LVL196:
 	mov	w1, w19
-	add	x0, x23, :lo12:.LANCHOR42
-.LVL212:
+.LVL197:
+	add	x0, x24, :lo12:.LANCHOR41
+.LVL198:
 	bl	List_remove_node
-.LVL213:
+.LVL199:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	cbnz	w0, .L131
 	adrp	x1, .LANCHOR54
 	adrp	x0, .LC1
-	mov	w2, 435
+	mov	w2, 481
 	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL214:
+.LVL200:
 .L131:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 436 0
+	.loc 2 482 0
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL215:
-.L126:
-.LBE188:
-.LBE187:
-	.loc 2 439 0
+.LVL201:
+.L125:
+.LBE204:
+.LBE203:
+	.loc 2 485 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL216:
+.LVL202:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	.cfi_restore 30
 	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
 	.cfi_restore 23
 	.cfi_restore 24
 	.cfi_restore 21
@@ -2038,191 +1967,94 @@ List_update_data_list:
 	.cfi_endproc
 .LFE252:
 	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
-	.align	2
-	.global	ftl_map_blk_alloc_new_blk
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
-.LFB255:
-	.loc 2 516 0
-	.cfi_startproc
-.LVL217:
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-.LVL218:
-	mov	x4, x0
-	.loc 2 520 0
-	mov	w5, 0
-	.loc 2 516 0
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 2 520 0
-	ldrh	w1, [x0, 10]
-	ldr	x0, [x0, 16]
-.LVL219:
-.L134:
-	.loc 2 520 0 is_stmt 0 discriminator 1
-	cmp	w5, w1
-	bne	.L137
-.L138:
-.LVL220:
-.LBB191:
-.LBB192:
-	.loc 2 532 0 is_stmt 1
-	mov	w2, 532
-	adrp	x1, .LANCHOR55
-	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR55
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.LVL221:
-	b	.L139
-.LVL222:
-.L137:
-.LBE192:
-.LBE191:
-	.loc 2 521 0
-	mov	x6, x0
-	ldrh	w2, [x0], 2
-	cbnz	w2, .L135
-	.loc 2 522 0
-	bl	FtlFreeSysBlkQueueOut
-.LVL223:
-	strh	w0, [x6]
-	.loc 2 523 0
-	tst	w0, 65535
-	beq	.L136
-	.loc 2 526 0
-	ldr	w0, [x4, 48]
-	.loc 2 524 0
-	strh	wzr, [x4, 2]
-	.loc 2 526 0
-	add	w0, w0, 1
-	str	w0, [x4, 48]
-	.loc 2 527 0
-	ldrh	w0, [x4, 8]
-	.loc 2 525 0
-	strh	w5, [x4]
-	.loc 2 527 0
-	add	w0, w0, 1
-	strh	w0, [x4, 8]
-.L136:
-	.loc 2 532 0
-	ldrh	w0, [x4, 10]
-	cmp	w0, w5
-	bls	.L138
-.LVL224:
-.L139:
-	.loc 2 534 0
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-.LVL225:
-.L135:
-	.cfi_restore_state
-	.loc 2 520 0 discriminator 2
-	add	w5, w5, 1
-.LVL226:
-	and	w5, w5, 65535
-.LVL227:
-	b	.L134
-	.cfi_endproc
-.LFE255:
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
 	.global	select_l2p_ram_region
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 .LFB260:
-	.loc 2 700 0
+	.loc 2 749 0
 	.cfi_startproc
-.LVL228:
+.LVL203:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 705 0
+	.loc 2 754 0
 	adrp	x0, .LANCHOR33
 	mov	x1, 0
-	.loc 2 706 0
+	.loc 2 755 0
 	mov	w3, 65535
-	.loc 2 700 0
+	.loc 2 749 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 705 0
+	.loc 2 754 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 706 0
-	adrp	x0, .LANCHOR56
-	.loc 2 700 0
+	.loc 2 755 0
+	adrp	x0, .LANCHOR55
+	.loc 2 749 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 706 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-.LVL229:
-.L145:
+	.loc 2 755 0
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+.LVL204:
+.L136:
 	and	w19, w1, 65535
-.LVL230:
-	.loc 2 705 0 discriminator 1
+.LVL205:
+	.loc 2 754 0 discriminator 1
 	cmp	w19, w2
-	bcc	.L147
+	bcc	.L138
 	add	x3, x0, 4
-	.loc 2 705 0 is_stmt 0
+	.loc 2 754 0 is_stmt 0
 	mov	w19, w2
-.LVL231:
+.LVL206:
 	mov	w5, -2147483648
 	mov	w1, 0
-.LVL232:
-.L148:
-	.loc 2 715 0 is_stmt 1 discriminator 1
+.LVL207:
+.L139:
+	.loc 2 764 0 is_stmt 1 discriminator 1
 	cmp	w1, w2
-	bne	.L150
-	.loc 2 724 0
+	bne	.L141
+	.loc 2 773 0
 	cmp	w19, w2
-	bcc	.L146
-	.loc 2 730 0
-	adrp	x1, .LANCHOR57
-.LVL233:
+	bcc	.L137
+	.loc 2 779 0
+	adrp	x1, .LANCHOR56
+.LVL208:
 	mov	w19, w2
-.LVL234:
+.LVL209:
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR57]
+	ldrh	w4, [x1, #:lo12:.LANCHOR56]
 	mov	w1, 0
-.LVL235:
-.L151:
-	.loc 2 729 0 discriminator 1
+.LVL210:
+.L142:
+	.loc 2 778 0 discriminator 1
 	cmp	w1, w2
-	bne	.L153
-	.loc 2 735 0
+	bne	.L144
+	.loc 2 784 0
 	cmp	w19, w1
-	bcc	.L146
-	.loc 2 735 0 is_stmt 0 discriminator 1
-	mov	w2, 735
-	adrp	x1, .LANCHOR58
-.LVL236:
+	bcc	.L137
+	.loc 2 784 0 is_stmt 0 discriminator 1
+	mov	w2, 784
+	adrp	x1, .LANCHOR57
+.LVL211:
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR58
+	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL237:
-	b	.L146
-.LVL238:
-.L147:
+.LVL212:
+	b	.L137
+.LVL213:
+.L138:
 	add	x1, x1, 1
-	.loc 2 706 0 is_stmt 1
+	.loc 2 755 0 is_stmt 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L145
-.LVL239:
-.L146:
-	.loc 2 737 0
+	bne	.L136
+.LVL214:
+.L137:
+	.loc 2 786 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2232,48 +2064,48 @@ select_l2p_ram_region:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL240:
-.L150:
+.LVL215:
+.L141:
 	.cfi_restore_state
-	.loc 2 716 0
+	.loc 2 765 0
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L149
-	.loc 2 717 0
+	tbnz	w4, #31, .L140
+	.loc 2 766 0
 	cmp	w5, w4
-	bls	.L149
+	bls	.L140
 	mov	w5, w4
-.LVL241:
+.LVL216:
 	mov	w19, w1
-.LVL242:
-.L149:
-	.loc 2 715 0 discriminator 2
+.LVL217:
+.L140:
+	.loc 2 764 0 discriminator 2
 	add	w1, w1, 1
-.LVL243:
+.LVL218:
 	add	x3, x3, 16
 	and	w1, w1, 65535
-.LVL244:
-	b	.L148
-.LVL245:
-.L153:
-	.loc 2 730 0
+.LVL219:
+	b	.L139
+.LVL220:
+.L144:
+	.loc 2 779 0
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L152
-	.loc 2 730 0 is_stmt 0 discriminator 1
+	bls	.L143
+	.loc 2 779 0 is_stmt 0 discriminator 1
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
-.LVL246:
+.LVL221:
 	csel	w19, w19, w1, eq
-.LVL247:
-.L152:
-	.loc 2 729 0 is_stmt 1 discriminator 2
+.LVL222:
+.L143:
+	.loc 2 778 0 is_stmt 1 discriminator 2
 	add	w1, w1, 1
-.LVL248:
+.LVL223:
 	add	x0, x0, 16
 	and	w1, w1, 65535
-.LVL249:
-	b	.L151
+.LVL224:
+	b	.L142
 	.cfi_endproc
 .LFE260:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
@@ -2283,78 +2115,78 @@ select_l2p_ram_region:
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 .LFB266:
-	.loc 2 882 0
+	.loc 2 931 0
 	.cfi_startproc
-.LVL250:
-	.loc 2 885 0
-	adrp	x2, .LANCHOR59
+.LVL225:
+	.loc 2 934 0
+	adrp	x2, .LANCHOR58
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR59]
+	ldrh	w1, [x2, #:lo12:.LANCHOR58]
 	cmp	w1, 4
-	bhi	.L156
-	.loc 2 885 0 is_stmt 0 discriminator 1
-	cbnz	w0, .L156
-	.loc 2 885 0
+	bhi	.L147
+	.loc 2 934 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L147
+	.loc 2 934 0
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR59]
-	.loc 2 894 0 is_stmt 1
+	strh	w1, [x2, #:lo12:.LANCHOR58]
+	.loc 2 943 0 is_stmt 1
 	ret
-.L156:
-.LBB195:
-.LBB196:
-	.loc 2 888 0
+.L147:
+.LBB207:
+.LBB208:
+	.loc 2 937 0
 	adrp	x1, .LANCHOR5
-.LBE196:
-.LBE195:
-	.loc 2 887 0
-	adrp	x0, .LANCHOR60
-.LVL251:
-	.loc 2 886 0
-	strh	wzr, [x3, #:lo12:.LANCHOR59]
-.LBB199:
-.LBB197:
-	.loc 2 890 0
+.LBE208:
+.LBE207:
+	.loc 2 936 0
+	adrp	x0, .LANCHOR59
+.LVL226:
+	.loc 2 935 0
+	strh	wzr, [x3, #:lo12:.LANCHOR58]
+.LBB211:
+.LBB209:
+	.loc 2 939 0
 	mov	w2, 0
-	.loc 2 888 0
+	.loc 2 937 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR5]
-	.loc 2 890 0
-	adrp	x1, .LANCHOR43
-.LBE197:
-.LBE199:
-	.loc 2 887 0
-	str	wzr, [x0, #:lo12:.LANCHOR60]
-.LVL252:
-.LBB200:
-.LBB198:
-	.loc 2 890 0
+	.loc 2 939 0
+	adrp	x1, .LANCHOR42
+.LBE209:
+.LBE211:
+	.loc 2 936 0
+	str	wzr, [x0, #:lo12:.LANCHOR59]
+.LVL227:
+.LBB212:
+.LBB210:
+	.loc 2 939 0
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR43]
+	ldr	x6, [x1, #:lo12:.LANCHOR42]
 	mov	w7, 65535
 	mov	x1, 0
-.L157:
-.LVL253:
-	.loc 2 888 0
+.L148:
+.LVL228:
+	.loc 2 937 0
 	cmp	w5, w1, uxth
-	bhi	.L159
-	cbz	w3, .L155
-	str	w2, [x0, #:lo12:.LANCHOR60]
-.L155:
+	bhi	.L150
+	cbz	w3, .L146
+	str	w2, [x0, #:lo12:.LANCHOR59]
+.L146:
 	ret
-.L159:
-	.loc 2 890 0
+.L150:
+	.loc 2 939 0
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L158
-	.loc 2 891 0
+	beq	.L149
+	.loc 2 940 0
 	add	w2, w2, w4
 	mov	w3, 1
-.L158:
-.LVL254:
+.L149:
+.LVL229:
 	add	x1, x1, 1
-.LVL255:
-	b	.L157
-.LBE198:
-.LBE200:
+.LVL230:
+	b	.L148
+.LBE210:
+.LBE212:
 	.cfi_endproc
 .LFE266:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2364,19 +2196,19 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 .LFB272:
-	.loc 2 1347 0
+	.loc 2 1396 0
 	.cfi_startproc
-.LVL256:
-	.loc 2 1347 0
+.LVL231:
+	.loc 2 1396 0
 	and	w0, w0, 65535
-	.loc 2 1348 0
-	cbz	w1, .L166
-	b	ftl_set_blk_mode.part.7
-.LVL257:
-.L166:
-	.loc 2 1351 0
+	.loc 2 1397 0
+	cbz	w1, .L157
+	b	ftl_set_blk_mode.part.6
+.LVL232:
+.L157:
+	.loc 2 1400 0
 	adrp	x1, .LANCHOR1
-.LVL258:
+.LVL233:
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
 	ldr	x3, [x1, #:lo12:.LANCHOR1]
@@ -2395,19 +2227,19 @@ ftl_set_blk_mode:
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 .LFB273:
-	.loc 2 1355 0
+	.loc 2 1404 0
 	.cfi_startproc
-.LVL259:
-	.loc 2 1355 0
+.LVL234:
+	.loc 2 1404 0
 	and	w1, w0, 65535
-	.loc 2 1356 0
+	.loc 2 1405 0
 	adrp	x0, .LANCHOR1
-.LVL260:
+.LVL235:
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	ubfx	x2, x1, 5, 11
 	ldr	w0, [x0, x2, lsl 2]
 	lsr	w0, w0, w1
-	.loc 2 1357 0
+	.loc 2 1406 0
 	and	w0, w0, 1
 	ret
 	.cfi_endproc
@@ -2419,81 +2251,81 @@ ftl_get_blk_mode:
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 .LFB279:
-	.loc 2 1608 0
+	.loc 2 1657 0
 	.cfi_startproc
-.LVL261:
-	.loc 2 1608 0
+.LVL236:
+	.loc 2 1657 0
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	.loc 2 1611 0
+	.loc 2 1660 0
 	adrp	x1, .LANCHOR3
-.LVL262:
+.LVL237:
 	add	x4, x4, 16
-	.loc 2 1610 0
+	.loc 2 1659 0
 	strh	wzr, [x0, 4]
-.LVL263:
+.LVL238:
 	add	x4, x0, x4
-	.loc 2 1611 0
+	.loc 2 1660 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR3]
-	.loc 2 1613 0
+	.loc 2 1662 0
 	mov	w1, 65535
-.LVL264:
-.L169:
-	.loc 2 1611 0 discriminator 1
+.LVL239:
+.L160:
+	.loc 2 1660 0 discriminator 1
 	cmp	w2, w3
-	bcc	.L171
-	.loc 2 1622 0
+	bcc	.L162
+	.loc 2 1671 0
 	adrp	x1, .LANCHOR19
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-.LVL265:
+.LVL240:
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	add	x3, x0, x3
-	.loc 2 1620 0
+	.loc 2 1669 0
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-	.loc 2 1622 0
+	.loc 2 1671 0
 	sub	w1, w1, w6
-.L172:
-	.loc 2 1618 0 discriminator 1
+.L163:
+	.loc 2 1667 0 discriminator 1
 	cmp	x2, x3
-	bne	.L174
-	.loc 2 1625 0
+	bne	.L165
+	.loc 2 1674 0
 	ret
-.LVL266:
-.L171:
-	.loc 2 1613 0
+.LVL241:
+.L162:
+	.loc 2 1662 0
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L170
-	.loc 2 1615 0
+	beq	.L161
+	.loc 2 1664 0
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L170:
-	.loc 2 1611 0 discriminator 2
+.L161:
+	.loc 2 1660 0 discriminator 2
 	add	w2, w2, 1
-.LVL267:
+.LVL242:
 	add	x4, x4, 2
 	and	w2, w2, 65535
-.LVL268:
-	b	.L169
-.LVL269:
-.L174:
-	.loc 2 1620 0
+.LVL243:
+	b	.L160
+.LVL244:
+.L165:
+	.loc 2 1669 0
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L173
-	.loc 2 1622 0
+	beq	.L164
+	.loc 2 1671 0
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L173:
+.L164:
 	add	x2, x2, 2
-	b	.L172
+	b	.L163
 	.cfi_endproc
 .LFE279:
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -2503,62 +2335,62 @@ ftl_sb_update_avl_pages:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 .LFB282:
-	.loc 2 2013 0
+	.loc 2 2062 0
 	.cfi_startproc
-.LVL270:
-	.loc 2 2016 0
+.LVL245:
+	.loc 2 2065 0
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L175
-	.loc 2 2018 0
+	cbz	w1, .L166
+	.loc 2 2067 0
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L175
-.LVL271:
-.LBB203:
-.LBB204:
-	.loc 2 2020 0
+	beq	.L166
+.LVL246:
+.LBB215:
+.LBB216:
+	.loc 2 2069 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
 	ldrh	w3, [x0, x2, lsl 1]
-.LVL272:
-	.loc 2 2023 0
+.LVL247:
+	.loc 2 2072 0
 	adrp	x2, .LANCHOR3
 	ldrh	w4, [x2, #:lo12:.LANCHOR3]
-	.loc 2 2021 0
+	.loc 2 2070 0
 	mov	w2, w1
-.L178:
+.L169:
 	cmp	w3, w2
-	beq	.L180
-.LVL273:
-.L175:
+	beq	.L171
+.LVL248:
+.L166:
 	ret
-.LVL274:
-.L180:
-	.loc 2 2022 0
+.LVL249:
+.L171:
+	.loc 2 2071 0
 	ldrb	w1, [x0, 6]
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x0, 6]
-	.loc 2 2023 0
+	.loc 2 2072 0
 	cmp	w1, w4
-	bne	.L179
-	.loc 2 2024 0
+	bne	.L170
+	.loc 2 2073 0
 	ldrh	w1, [x0, 2]
-	.loc 2 2025 0
+	.loc 2 2074 0
 	strb	wzr, [x0, 6]
-	.loc 2 2024 0
+	.loc 2 2073 0
 	add	w1, w1, 1
 	strh	w1, [x0, 2]
-.L179:
-	.loc 2 2027 0
+.L170:
+	.loc 2 2076 0
 	ldrb	w1, [x0, 6]
 	add	x1, x1, 8
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL275:
-	b	.L178
-.LBE204:
-.LBE203:
+.LVL250:
+	b	.L169
+.LBE216:
+.LBE215:
 	.cfi_endproc
 .LFE282:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -2568,70 +2400,70 @@ FtlSlcSuperblockCheck:
 	.type	make_superblock, %function
 make_superblock:
 .LFB284:
-	.loc 2 2045 0
+	.loc 2 2094 0
 	.cfi_startproc
-.LVL276:
+.LVL251:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 2048 0
+	.loc 2 2097 0
 	ldrh	w1, [x0]
-	.loc 2 2045 0
+	.loc 2 2094 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 2045 0
+	.loc 2 2094 0
 	mov	x19, x0
-	.loc 2 2048 0
+	.loc 2 2097 0
 	adrp	x0, .LANCHOR5
-.LVL277:
+.LVL252:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w1, w0
-	bcc	.L182
-	.loc 2 2048 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR61
+	bcc	.L173
+	.loc 2 2097 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC1
-	mov	w2, 2048
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 2097
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL278:
-.L182:
-	.loc 2 2051 0 is_stmt 1
+.LVL253:
+.L173:
+	.loc 2 2100 0 is_stmt 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2052 0
+	.loc 2 2101 0
 	adrp	x7, .LANCHOR13
 	add	x6, x19, 16
 	add	x7, x7, :lo12:.LANCHOR13
-	.loc 2 2051 0
+	.loc 2 2100 0
 	ldrh	w8, [x0, #:lo12:.LANCHOR3]
 	mov	x5, 0
-	.loc 2 2049 0
+	.loc 2 2098 0
 	strh	wzr, [x19, 4]
-	.loc 2 2053 0
+	.loc 2 2102 0
 	mov	w10, -1
-	.loc 2 2050 0
+	.loc 2 2099 0
 	strb	wzr, [x19, 7]
-.LVL279:
-.L183:
-	.loc 2 2051 0 discriminator 1
+.LVL254:
+.L174:
+	.loc 2 2100 0 discriminator 1
 	cmp	w8, w5, uxth
-	bhi	.L185
-	.loc 2 2061 0
+	bhi	.L176
+	.loc 2 2110 0
 	adrp	x1, .LANCHOR19
 	ldrb	w0, [x19, 7]
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	.loc 2 2062 0
+	.loc 2 2111 0
 	mov	w0, 1
 	strb	w0, [x19, 9]
-	.loc 2 2064 0
+	.loc 2 2113 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL280:
+.LVL255:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -2639,34 +2471,34 @@ make_superblock:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL281:
-.L185:
+.LVL256:
+.L176:
 	.cfi_restore_state
-	.loc 2 2052 0
+	.loc 2 2101 0
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL282:
+.LVL257:
 	mov	w4, w0
-.LVL283:
-	.loc 2 2053 0
+.LVL258:
+	.loc 2 2102 0
 	strh	w10, [x6]
-	.loc 2 2054 0
+	.loc 2 2103 0
 	bl	FtlBbmIsBadBlock
-.LVL284:
-	cbnz	w0, .L184
-	.loc 2 2055 0
+.LVL259:
+	cbnz	w0, .L175
+	.loc 2 2104 0
 	strh	w4, [x6]
-	.loc 2 2056 0
+	.loc 2 2105 0
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L184:
-.LVL285:
+.L175:
+.LVL260:
 	add	x5, x5, 1
-.LVL286:
+.LVL261:
 	add	x6, x6, 2
-	b	.L183
+	b	.L174
 	.cfi_endproc
 .LFE284:
 	.size	make_superblock, .-make_superblock
@@ -2676,110 +2508,110 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 .LFB293:
-	.loc 2 2401 0
+	.loc 2 2454 0
 	.cfi_startproc
-.LVL287:
+.LVL262:
 	and	w6, w0, 65535
-	.loc 2 2405 0
+	.loc 2 2458 0
 	adrp	x0, .LANCHOR3
-.LVL288:
+.LVL263:
 	mov	x7, 0
-	.loc 2 2406 0
+	.loc 2 2459 0
 	adrp	x8, .LANCHOR13
-	.loc 2 2405 0
+	.loc 2 2458 0
 	ldrh	w10, [x0, #:lo12:.LANCHOR3]
-	.loc 2 2408 0
+	.loc 2 2461 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2403 0
+	.loc 2 2456 0
 	mov	w5, 0
-	.loc 2 2406 0
+	.loc 2 2459 0
 	add	x8, x8, :lo12:.LANCHOR13
-.LVL289:
-	.loc 2 2408 0
+.LVL264:
+	.loc 2 2461 0
 	ldrh	w11, [x0, #:lo12:.LANCHOR19]
-	.loc 2 2405 0
+	.loc 2 2458 0
 	cmp	w10, w7, uxth
-	bhi	.L199
-	.loc 2 2410 0
-	cbz	w5, .L197
-	.loc 2 2411 0
+	bhi	.L190
+	.loc 2 2463 0
+	cbz	w5, .L188
+	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL290:
-.L198:
-	.loc 2 2412 0
-	adrp	x0, .LANCHOR41
+.LVL265:
+.L189:
+	.loc 2 2465 0
+	adrp	x0, .LANCHOR40
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-.LVL291:
-	.loc 2 2414 0
+.LVL266:
+	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2412 0
+	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2414 0
+	.loc 2 2467 0
 	ret
-.LVL292:
-.L192:
+.LVL267:
+.L183:
 	.cfi_def_cfa 29, 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	mov	w5, 0
-.LVL293:
-	b	.L191
-.LVL294:
-.L197:
+.LVL268:
+	b	.L182
+.LVL269:
+.L188:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 29
 	.cfi_restore 30
 	mov	w5, 0
-	b	.L198
-.L199:
-	.loc 2 2401 0
+	b	.L189
+.L190:
+	.loc 2 2454 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.L190:
-	.loc 2 2406 0
+.L181:
+	.loc 2 2459 0
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
-.LVL295:
-	.loc 2 2407 0
+.LVL270:
+	.loc 2 2460 0
 	bl	FtlBbmIsBadBlock
-.LVL296:
-	cbnz	w0, .L189
-	.loc 2 2408 0
+.LVL271:
+	cbnz	w0, .L180
+	.loc 2 2461 0
 	add	w5, w5, w11
-.LVL297:
+.LVL272:
 	and	w5, w5, 65535
-.LVL298:
-.L189:
+.LVL273:
+.L180:
 	add	x7, x7, 1
-.LVL299:
-	.loc 2 2405 0 discriminator 2
+.LVL274:
+	.loc 2 2458 0 discriminator 2
 	cmp	w10, w7, uxth
-	bhi	.L190
-	.loc 2 2410 0
-	cbz	w5, .L192
-	.loc 2 2411 0
+	bhi	.L181
+	.loc 2 2463 0
+	cbz	w5, .L183
+	.loc 2 2464 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL300:
-.L191:
-	.loc 2 2412 0
-	adrp	x0, .LANCHOR41
+.LVL275:
+.L182:
+	.loc 2 2465 0
+	adrp	x0, .LANCHOR40
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	umaddl	x6, w6, w1, x0
-	.loc 2 2414 0
+	.loc 2 2467 0
 	mov	w0, 0
-	.loc 2 2412 0
+	.loc 2 2465 0
 	strh	w5, [x6, 4]
-	.loc 2 2414 0
+	.loc 2 2467 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
@@ -2794,33 +2626,33 @@ update_multiplier_value:
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 .LFB294:
-	.loc 2 2417 0
+	.loc 2 2470 0
 	.cfi_startproc
-.LVL301:
-	.loc 2 2420 0
+.LVL276:
+	.loc 2 2473 0
 	adrp	x0, .LANCHOR47
 	ldr	x0, [x0, #:lo12:.LANCHOR47]
-	cbz	x0, .L202
-	.loc 2 2421 0
-	adrp	x1, .LANCHOR41
-	ldr	x1, [x1, #:lo12:.LANCHOR41]
+	cbz	x0, .L193
+	.loc 2 2474 0
+	adrp	x1, .LANCHOR40
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR40
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR43
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
-.LVL302:
+.LVL277:
 	ret
-.LVL303:
-.L202:
-	.loc 2 2418 0
+.LVL278:
+.L193:
+	.loc 2 2471 0
 	mov	w0, 0
-.LVL304:
-	.loc 2 2423 0
+.LVL279:
+	.loc 2 2476 0
 	ret
 	.cfi_endproc
 .LFE294:
@@ -2831,77 +2663,77 @@ GetFreeBlockMinEraseCount:
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 .LFB295:
-	.loc 2 2426 0
+	.loc 2 2479 0
 	.cfi_startproc
-.LVL305:
-	.loc 2 2431 0
+.LVL280:
+	.loc 2 2484 0
 	adrp	x1, .LANCHOR47
-	.loc 2 2426 0
+	.loc 2 2479 0
 	and	w0, w0, 65535
-	.loc 2 2431 0
+	.loc 2 2484 0
 	ldr	x1, [x1, #:lo12:.LANCHOR47]
-	cbz	x1, .L210
-	.loc 2 2432 0
+	cbz	x1, .L201
+	.loc 2 2485 0
 	adrp	x2, .LANCHOR48
 	mov	w3, 7
-	.loc 2 2436 0
+	.loc 2 2489 0
 	mov	w5, 6
 	mov	w6, 65535
-	.loc 2 2432 0
+	.loc 2 2485 0
 	ldrh	w2, [x2, #:lo12:.LANCHOR48]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
-	.loc 2 2433 0
+	.loc 2 2486 0
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-.LVL306:
-	.loc 2 2434 0
-	adrp	x2, .LANCHOR41
-	ldr	x3, [x2, #:lo12:.LANCHOR41]
+.LVL281:
+	.loc 2 2487 0
+	adrp	x2, .LANCHOR40
+	ldr	x3, [x2, #:lo12:.LANCHOR40]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
 	asr	x1, x1, 1
 	mul	x1, x1, x2
-	.loc 2 2435 0
+	.loc 2 2488 0
 	mov	w2, 0
-	.loc 2 2434 0
+	.loc 2 2487 0
 	and	w1, w1, 65535
-.LVL307:
-.L206:
-	.loc 2 2435 0 discriminator 1
+.LVL282:
+.L197:
+	.loc 2 2488 0 discriminator 1
 	cmp	w0, w2
-	beq	.L209
-	.loc 2 2436 0
+	beq	.L200
+	.loc 2 2489 0
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L207
-.L209:
-	.loc 2 2440 0
-	adrp	x0, .LANCHOR40
-.LVL308:
+	bne	.L198
+.L200:
+	.loc 2 2493 0
+	adrp	x0, .LANCHOR43
+.LVL283:
 	ubfiz	x1, x1, 1, 16
-.LVL309:
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
+.LVL284:
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x1]
-.LVL310:
+.LVL285:
 	ret
-.LVL311:
-.L207:
-	.loc 2 2435 0 discriminator 2
+.LVL286:
+.L198:
+	.loc 2 2488 0 discriminator 2
 	add	w2, w2, 1
-.LVL312:
+.LVL287:
 	mov	w1, w4
 	and	w2, w2, 65535
-.LVL313:
-	b	.L206
-.LVL314:
-.L210:
-	.loc 2 2427 0
+.LVL288:
+	b	.L197
+.LVL289:
+.L201:
+	.loc 2 2480 0
 	mov	w0, 0
-.LVL315:
-	.loc 2 2443 0
+.LVL290:
+	.loc 2 2496 0
 	ret
 	.cfi_endproc
 .LFE295:
@@ -2914,7 +2746,7 @@ FtlPrintInfo2buf:
 .LFB200:
 	.loc 3 12 0
 	.cfi_startproc
-.LVL316:
+.LVL291:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -2935,7 +2767,7 @@ FtlPrintInfo2buf:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	mov	x21, x0
-.LVL317:
+.LVL292:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
@@ -2944,7 +2776,7 @@ FtlPrintInfo2buf:
 	.loc 3 12 0
 	stp	x25, x26, [sp, 64]
 	.loc 3 39 0
-	adrp	x22, .LANCHOR79
+	adrp	x22, .LANCHOR39
 	.loc 3 12 0
 	str	x27, [sp, 80]
 	.cfi_offset 25, -32
@@ -2952,9 +2784,9 @@ FtlPrintInfo2buf:
 	.cfi_offset 27, -16
 	.loc 3 16 0
 	bl	sprintf
-.LVL318:
+.LVL293:
 	add	x20, x21, x0, sxtw
-.LVL319:
+.LVL294:
 	.loc 3 17 0
 	adrp	x0, .LANCHOR26
 	adrp	x1, .LC3
@@ -2962,146 +2794,146 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR26]
 	mov	x0, x20
 	.loc 3 39 0
-	add	x22, x22, :lo12:.LANCHOR79
+	add	x22, x22, :lo12:.LANCHOR39
 	.loc 3 50 0
 	adrp	x24, .LANCHOR51
 	.loc 3 67 0
-	adrp	x25, .LANCHOR82
+	adrp	x25, .LANCHOR80
 	.loc 3 17 0
 	bl	sprintf
-.LVL320:
+.LVL295:
 	add	x20, x20, x0, sxtw
-.LVL321:
+.LVL296:
 	.loc 3 18 0
 	mov	x0, x20
 	adrp	x1, .LC4
 	add	x1, x1, :lo12:.LC4
 	bl	sprintf
-.LVL322:
+.LVL297:
 	add	x20, x20, x0, sxtw
-.LVL323:
+.LVL298:
 	.loc 3 19 0
-	adrp	x0, .LANCHOR62
+	adrp	x0, .LANCHOR61
 	adrp	x1, .LC5
 	add	x1, x1, :lo12:.LC5
-	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	ldr	w2, [x0, #:lo12:.LANCHOR61]
 	mov	x0, x20
 	bl	sprintf
-.LVL324:
+.LVL299:
 	add	x20, x20, x0, sxtw
-.LVL325:
+.LVL300:
 	.loc 3 20 0
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	adrp	x1, .LC6
 	add	x1, x1, :lo12:.LC6
-	ldr	w2, [x0, #:lo12:.LANCHOR60]
+	ldr	w2, [x0, #:lo12:.LANCHOR59]
 	mov	x0, x20
 	bl	sprintf
-.LVL326:
+.LVL301:
 	add	x20, x20, x0, sxtw
-.LVL327:
+.LVL302:
 	.loc 3 21 0
-	adrp	x0, .LANCHOR63
+	adrp	x0, .LANCHOR62
 	adrp	x1, .LC7
 	add	x1, x1, :lo12:.LC7
-	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	mov	x0, x20
 	bl	sprintf
-.LVL328:
+.LVL303:
 	add	x20, x20, x0, sxtw
-.LVL329:
+.LVL304:
 	.loc 3 22 0
-	adrp	x0, .LANCHOR64
+	adrp	x0, .LANCHOR63
 	adrp	x1, .LC8
 	add	x1, x1, :lo12:.LC8
-	ldr	w2, [x0, #:lo12:.LANCHOR64]
+	ldr	w2, [x0, #:lo12:.LANCHOR63]
 	mov	x0, x20
 	bl	sprintf
-.LVL330:
+.LVL305:
 	add	x20, x20, x0, sxtw
-.LVL331:
+.LVL306:
 	.loc 3 23 0
-	adrp	x0, .LANCHOR65
+	adrp	x0, .LANCHOR64
 	adrp	x1, .LC9
 	add	x1, x1, :lo12:.LC9
-	ldr	w2, [x0, #:lo12:.LANCHOR65]
+	ldr	w2, [x0, #:lo12:.LANCHOR64]
 	mov	x0, x20
 	bl	sprintf
-.LVL332:
+.LVL307:
 	add	x20, x20, x0, sxtw
-.LVL333:
+.LVL308:
 	.loc 3 24 0
-	adrp	x0, .LANCHOR66
+	adrp	x0, .LANCHOR65
 	adrp	x1, .LC10
 	add	x1, x1, :lo12:.LC10
-	ldr	w2, [x0, #:lo12:.LANCHOR66]
+	ldr	w2, [x0, #:lo12:.LANCHOR65]
 	mov	x0, x20
 	bl	sprintf
-.LVL334:
+.LVL309:
 	add	x20, x20, x0, sxtw
-.LVL335:
+.LVL310:
 	.loc 3 25 0
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR66
 	adrp	x1, .LC11
 	add	x1, x1, :lo12:.LC11
-	ldr	w2, [x0, #:lo12:.LANCHOR67]
+	ldr	w2, [x0, #:lo12:.LANCHOR66]
 	mov	x0, x20
 	bl	sprintf
-.LVL336:
+.LVL311:
 	add	x20, x20, x0, sxtw
-.LVL337:
+.LVL312:
 	.loc 3 26 0
-	adrp	x0, .LANCHOR68
+	adrp	x0, .LANCHOR67
 	adrp	x1, .LC12
 	add	x1, x1, :lo12:.LC12
-	ldr	w2, [x0, #:lo12:.LANCHOR68]
+	ldr	w2, [x0, #:lo12:.LANCHOR67]
 	mov	x0, x20
 	bl	sprintf
-.LVL338:
+.LVL313:
 	add	x20, x20, x0, sxtw
-.LVL339:
+.LVL314:
 	.loc 3 27 0
-	adrp	x0, .LANCHOR69
+	adrp	x0, .LANCHOR68
 	adrp	x1, .LC13
 	add	x1, x1, :lo12:.LC13
-	ldr	w2, [x0, #:lo12:.LANCHOR69]
+	ldr	w2, [x0, #:lo12:.LANCHOR68]
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL340:
+.LVL315:
 	add	x20, x20, x0, sxtw
-.LVL341:
+.LVL316:
 	.loc 3 28 0
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR69
 	adrp	x1, .LC14
 	add	x1, x1, :lo12:.LC14
-	ldr	w2, [x0, #:lo12:.LANCHOR70]
+	ldr	w2, [x0, #:lo12:.LANCHOR69]
 	mov	x0, x20
 	lsr	w2, w2, 11
 	bl	sprintf
-.LVL342:
+.LVL317:
 	add	x20, x20, x0, sxtw
-.LVL343:
+.LVL318:
 	.loc 3 29 0
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR70
 	adrp	x1, .LC15
 	add	x1, x1, :lo12:.LC15
-	ldr	w2, [x0, #:lo12:.LANCHOR71]
+	ldr	w2, [x0, #:lo12:.LANCHOR70]
 	mov	x0, x20
 	bl	sprintf
-.LVL344:
+.LVL319:
 	add	x20, x20, x0, sxtw
-.LVL345:
+.LVL320:
 	.loc 3 30 0
-	adrp	x0, .LANCHOR72
+	adrp	x0, .LANCHOR71
 	adrp	x1, .LC16
 	add	x1, x1, :lo12:.LC16
-	ldr	w2, [x0, #:lo12:.LANCHOR72]
+	ldr	w2, [x0, #:lo12:.LANCHOR71]
 	mov	x0, x20
 	bl	sprintf
-.LVL346:
+.LVL321:
 	add	x20, x20, x0, sxtw
-.LVL347:
+.LVL322:
 	.loc 3 31 0
 	add	x0, x19, :lo12:.LANCHOR37
 	adrp	x1, .LC17
@@ -3109,99 +2941,99 @@ FtlPrintInfo2buf:
 	ldrh	w2, [x0, 6]
 	mov	x0, x20
 	bl	sprintf
-.LVL348:
+.LVL323:
 	add	x20, x20, x0, sxtw
-.LVL349:
+.LVL324:
 	.loc 3 32 0
 	ldrh	w2, [x23, #:lo12:.LANCHOR48]
 	mov	x0, x20
 	adrp	x1, .LC18
 	add	x1, x1, :lo12:.LC18
 	bl	sprintf
-.LVL350:
+.LVL325:
 	add	x20, x20, x0, sxtw
-.LVL351:
+.LVL326:
 	.loc 3 33 0
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR72
 	adrp	x1, .LC19
 	add	x1, x1, :lo12:.LC19
-	ldr	w2, [x0, #:lo12:.LANCHOR73]
+	ldr	w2, [x0, #:lo12:.LANCHOR72]
 	mov	x0, x20
 	bl	sprintf
-.LVL352:
+.LVL327:
 	add	x20, x20, x0, sxtw
-.LVL353:
+.LVL328:
 	.loc 3 34 0
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR73
 	adrp	x1, .LC20
 	add	x1, x1, :lo12:.LC20
-	ldr	w2, [x0, #:lo12:.LANCHOR74]
+	ldr	w2, [x0, #:lo12:.LANCHOR73]
 	mov	x0, x20
 	bl	sprintf
-.LVL354:
+.LVL329:
 	add	x20, x20, x0, sxtw
-.LVL355:
+.LVL330:
 	.loc 3 35 0
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR74
 	adrp	x1, .LC21
 	add	x1, x1, :lo12:.LC21
-	ldr	w2, [x0, #:lo12:.LANCHOR75]
+	ldr	w2, [x0, #:lo12:.LANCHOR74]
 	mov	x0, x20
 	bl	sprintf
-.LVL356:
+.LVL331:
 	add	x20, x20, x0, sxtw
-.LVL357:
+.LVL332:
 	.loc 3 36 0
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR75
 	adrp	x1, .LC22
 	add	x1, x1, :lo12:.LC22
-	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	ldr	w2, [x0, #:lo12:.LANCHOR75]
 	mov	x0, x20
 	bl	sprintf
-.LVL358:
+.LVL333:
 	add	x20, x20, x0, sxtw
-.LVL359:
+.LVL334:
 	.loc 3 37 0
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR76
 	adrp	x1, .LC23
 	add	x1, x1, :lo12:.LC23
-	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	mov	x0, x20
 	bl	sprintf
-.LVL360:
+.LVL335:
 	add	x20, x20, x0, sxtw
-.LVL361:
+.LVL336:
 	.loc 3 38 0
-	adrp	x0, .LANCHOR78
+	adrp	x0, .LANCHOR77
 	adrp	x1, .LC24
 	add	x1, x1, :lo12:.LC24
-	ldr	w2, [x0, #:lo12:.LANCHOR78]
+	ldr	w2, [x0, #:lo12:.LANCHOR77]
 	mov	x0, x20
 	bl	sprintf
-.LVL362:
+.LVL337:
 	add	x20, x20, x0, sxtw
-.LVL363:
+.LVL338:
 	.loc 3 39 0
 	ldrh	w2, [x22, 30]
 	mov	x0, x20
 	adrp	x1, .LC25
 	add	x1, x1, :lo12:.LC25
 	bl	sprintf
-.LVL364:
+.LVL339:
 	add	x20, x20, x0, sxtw
-.LVL365:
+.LVL340:
 	.loc 3 40 0
 	ldrh	w2, [x22, 28]
 	mov	x0, x20
 	adrp	x1, .LC26
 	add	x1, x1, :lo12:.LC26
 	.loc 3 55 0
-	adrp	x22, .LANCHOR43
+	adrp	x22, .LANCHOR42
 	.loc 3 40 0
 	bl	sprintf
-.LVL366:
+.LVL341:
 	add	x20, x20, x0, sxtw
-.LVL367:
+.LVL342:
 	.loc 3 41 0
 	adrp	x0, .LANCHOR34
 	adrp	x1, .LC27
@@ -3209,9 +3041,9 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR34]
 	mov	x0, x20
 	bl	sprintf
-.LVL368:
+.LVL343:
 	add	x20, x20, x0, sxtw
-.LVL369:
+.LVL344:
 	.loc 3 42 0
 	adrp	x0, .LANCHOR31
 	adrp	x1, .LC28
@@ -3219,9 +3051,9 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR31]
 	mov	x0, x20
 	bl	sprintf
-.LVL370:
+.LVL345:
 	add	x20, x20, x0, sxtw
-.LVL371:
+.LVL346:
 	.loc 3 43 0
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LC29
@@ -3229,9 +3061,9 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR2]
 	mov	x0, x20
 	bl	sprintf
-.LVL372:
+.LVL347:
 	add	x20, x20, x0, sxtw
-.LVL373:
+.LVL348:
 	.loc 3 44 0
 	adrp	x0, .LANCHOR38+6
 	adrp	x1, .LC30
@@ -3239,9 +3071,9 @@ FtlPrintInfo2buf:
 	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
 	mov	x0, x20
 	bl	sprintf
-.LVL374:
+.LVL349:
 	add	x20, x20, x0, sxtw
-.LVL375:
+.LVL350:
 	.loc 3 45 0
 	adrp	x0, .LANCHOR5
 	adrp	x1, .LC31
@@ -3249,19 +3081,19 @@ FtlPrintInfo2buf:
 	ldrh	w2, [x0, #:lo12:.LANCHOR5]
 	mov	x0, x20
 	bl	sprintf
-.LVL376:
+.LVL351:
 	add	x20, x20, x0, sxtw
-.LVL377:
+.LVL352:
 	.loc 3 46 0
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR78
 	adrp	x1, .LC32
 	add	x1, x1, :lo12:.LC32
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	ldrh	w2, [x0, #:lo12:.LANCHOR78]
 	mov	x0, x20
 	bl	sprintf
-.LVL378:
+.LVL353:
 	add	x20, x20, x0, sxtw
-.LVL379:
+.LVL354:
 	.loc 3 47 0
 	adrp	x0, .LANCHOR7
 	adrp	x1, .LC33
@@ -3269,19 +3101,19 @@ FtlPrintInfo2buf:
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	mov	x0, x20
 	bl	sprintf
-.LVL380:
+.LVL355:
 	add	x20, x20, x0, sxtw
-.LVL381:
+.LVL356:
 	.loc 3 48 0
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR79
 	adrp	x1, .LC34
 	add	x1, x1, :lo12:.LC34
-	ldrh	w2, [x0, #:lo12:.LANCHOR81]
+	ldrh	w2, [x0, #:lo12:.LANCHOR79]
 	mov	x0, x20
 	bl	sprintf
-.LVL382:
+.LVL357:
 	add	x20, x20, x0, sxtw
-.LVL383:
+.LVL358:
 	.loc 3 49 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR37]
 	.loc 3 50 0
@@ -3291,60 +3123,60 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC35
 	add	x1, x1, :lo12:.LC35
 	bl	sprintf
-.LVL384:
+.LVL359:
 	add	x20, x20, x0, sxtw
-.LVL385:
+.LVL360:
 	.loc 3 50 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC36
 	add	x1, x1, :lo12:.LC36
 	bl	sprintf
-.LVL386:
+.LVL361:
 	add	x20, x20, x0, sxtw
-.LVL387:
+.LVL362:
 	.loc 3 51 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC37
 	add	x1, x1, :lo12:.LC37
 	bl	sprintf
-.LVL388:
+.LVL363:
 	add	x20, x20, x0, sxtw
-.LVL389:
+.LVL364:
 	.loc 3 52 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR51]
 	mov	x0, x20
 	adrp	x1, .LC38
 	add	x1, x1, :lo12:.LC38
 	bl	sprintf
-.LVL390:
+.LVL365:
 	add	x20, x20, x0, sxtw
-.LVL391:
+.LVL366:
 	.loc 3 53 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC39
 	add	x1, x1, :lo12:.LC39
 	bl	sprintf
-.LVL392:
+.LVL367:
 	add	x20, x20, x0, sxtw
-.LVL393:
+.LVL368:
 	.loc 3 54 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC40
 	add	x1, x1, :lo12:.LC40
 	bl	sprintf
-.LVL394:
+.LVL369:
 	add	x20, x20, x0, sxtw
-.LVL395:
+.LVL370:
 	.loc 3 55 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR51]
 	.loc 3 56 0
 	adrp	x24, .LANCHOR52
 	.loc 3 55 0
-	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	.loc 3 56 0
 	add	x19, x24, :lo12:.LANCHOR52
 	.loc 3 55 0
@@ -3353,60 +3185,60 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC41
 	add	x1, x1, :lo12:.LC41
 	bl	sprintf
-.LVL396:
+.LVL371:
 	add	x20, x20, x0, sxtw
-.LVL397:
+.LVL372:
 	.loc 3 56 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC42
 	add	x1, x1, :lo12:.LC42
 	bl	sprintf
-.LVL398:
+.LVL373:
 	add	x20, x20, x0, sxtw
-.LVL399:
+.LVL374:
 	.loc 3 57 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC43
 	add	x1, x1, :lo12:.LC43
 	bl	sprintf
-.LVL400:
+.LVL375:
 	add	x20, x20, x0, sxtw
-.LVL401:
+.LVL376:
 	.loc 3 58 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR52]
 	mov	x0, x20
 	adrp	x1, .LC44
 	add	x1, x1, :lo12:.LC44
 	bl	sprintf
-.LVL402:
+.LVL377:
 	add	x20, x20, x0, sxtw
-.LVL403:
+.LVL378:
 	.loc 3 59 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC45
 	add	x1, x1, :lo12:.LC45
 	bl	sprintf
-.LVL404:
+.LVL379:
 	add	x20, x20, x0, sxtw
-.LVL405:
+.LVL380:
 	.loc 3 60 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC46
 	add	x1, x1, :lo12:.LC46
 	bl	sprintf
-.LVL406:
+.LVL381:
 	add	x20, x20, x0, sxtw
-.LVL407:
+.LVL382:
 	.loc 3 61 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR52]
 	.loc 3 62 0
 	adrp	x24, .LANCHOR53
 	.loc 3 61 0
-	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	ldr	x0, [x22, #:lo12:.LANCHOR42]
 	.loc 3 62 0
 	add	x19, x24, :lo12:.LANCHOR53
 	.loc 3 61 0
@@ -3415,106 +3247,106 @@ FtlPrintInfo2buf:
 	adrp	x1, .LC47
 	add	x1, x1, :lo12:.LC47
 	bl	sprintf
-.LVL408:
+.LVL383:
 	add	x20, x20, x0, sxtw
-.LVL409:
+.LVL384:
 	.loc 3 62 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC48
 	add	x1, x1, :lo12:.LC48
 	bl	sprintf
-.LVL410:
+.LVL385:
 	add	x20, x20, x0, sxtw
-.LVL411:
+.LVL386:
 	.loc 3 63 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC49
 	add	x1, x1, :lo12:.LC49
 	bl	sprintf
-.LVL412:
+.LVL387:
 	add	x20, x20, x0, sxtw
-.LVL413:
+.LVL388:
 	.loc 3 64 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR53]
 	mov	x0, x20
 	adrp	x1, .LC50
 	add	x1, x1, :lo12:.LC50
 	.loc 3 72 0
-	adrp	x24, .LANCHOR83
-	add	x24, x24, :lo12:.LANCHOR83
+	adrp	x24, .LANCHOR81
+	add	x24, x24, :lo12:.LANCHOR81
 	.loc 3 64 0
 	bl	sprintf
-.LVL414:
+.LVL389:
 	add	x20, x20, x0, sxtw
-.LVL415:
+.LVL390:
 	.loc 3 65 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC51
 	add	x1, x1, :lo12:.LC51
 	bl	sprintf
-.LVL416:
+.LVL391:
 	add	x20, x20, x0, sxtw
-.LVL417:
+.LVL392:
 	.loc 3 66 0
 	ldrh	w2, [x19, 4]
 	.loc 3 67 0
-	add	x19, x25, :lo12:.LANCHOR82
+	add	x19, x25, :lo12:.LANCHOR80
 	.loc 3 66 0
 	mov	x0, x20
 	adrp	x1, .LC52
 	add	x1, x1, :lo12:.LC52
 	bl	sprintf
-.LVL418:
+.LVL393:
 	add	x20, x20, x0, sxtw
-.LVL419:
+.LVL394:
 	.loc 3 67 0
 	ldrh	w2, [x19, 2]
 	mov	x0, x20
 	adrp	x1, .LC53
 	add	x1, x1, :lo12:.LC53
 	bl	sprintf
-.LVL420:
+.LVL395:
 	add	x20, x20, x0, sxtw
-.LVL421:
+.LVL396:
 	.loc 3 68 0
 	ldrb	w2, [x19, 6]
 	mov	x0, x20
 	adrp	x1, .LC54
 	add	x1, x1, :lo12:.LC54
 	bl	sprintf
-.LVL422:
+.LVL397:
 	add	x20, x20, x0, sxtw
-.LVL423:
+.LVL398:
 	.loc 3 69 0
-	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mov	x0, x20
 	adrp	x1, .LC55
 	add	x1, x1, :lo12:.LC55
 	bl	sprintf
-.LVL424:
+.LVL399:
 	add	x20, x20, x0, sxtw
-.LVL425:
+.LVL400:
 	.loc 3 70 0
 	ldrb	w2, [x19, 8]
 	mov	x0, x20
 	adrp	x1, .LC56
 	add	x1, x1, :lo12:.LC56
 	bl	sprintf
-.LVL426:
+.LVL401:
 	add	x20, x20, x0, sxtw
-.LVL427:
+.LVL402:
 	.loc 3 71 0
 	ldrh	w2, [x19, 4]
 	mov	x0, x20
 	adrp	x1, .LC57
 	add	x1, x1, :lo12:.LC57
 	bl	sprintf
-.LVL428:
+.LVL403:
 	add	x20, x20, x0, sxtw
-.LVL429:
+.LVL404:
 	.loc 3 72 0
 	ldp	w4, w2, [x24, 76]
 	adrp	x1, .LC58
@@ -3522,104 +3354,104 @@ FtlPrintInfo2buf:
 	add	x1, x1, :lo12:.LC58
 	mov	x0, x20
 	bl	sprintf
-.LVL430:
+.LVL405:
 	add	x19, x20, x0, sxtw
-.LVL431:
+.LVL406:
 	.loc 3 73 0
 	ldr	w2, [x24, 72]
 	mov	x0, x19
 	adrp	x1, .LC59
 	add	x1, x1, :lo12:.LC59
 	bl	sprintf
-.LVL432:
+.LVL407:
 	add	x19, x19, x0, sxtw
-.LVL433:
+.LVL408:
 	.loc 3 74 0
 	ldr	w2, [x24, 96]
 	mov	x0, x19
 	adrp	x1, .LC60
 	add	x1, x1, :lo12:.LC60
 	bl	sprintf
-.LVL434:
+.LVL409:
 	add	x19, x19, x0, sxtw
-.LVL435:
+.LVL410:
 	.loc 3 75 0
-	adrp	x0, .LANCHOR84
+	adrp	x0, .LANCHOR82
 	adrp	x1, .LC61
 	add	x1, x1, :lo12:.LC61
-	ldrh	w2, [x0, #:lo12:.LANCHOR84]
+	ldrh	w2, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
 	bl	sprintf
-.LVL436:
+.LVL411:
 	add	x19, x19, x0, sxtw
-.LVL437:
+.LVL412:
 	.loc 3 76 0
-	adrp	x0, .LANCHOR85
+	adrp	x0, .LANCHOR83
 	adrp	x1, .LC62
 	add	x1, x1, :lo12:.LC62
-	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
 	mov	x0, x19
 	bl	sprintf
-.LVL438:
+.LVL413:
 	add	x19, x19, x0, sxtw
-.LVL439:
+.LVL414:
 	.loc 3 77 0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR84
 	adrp	x1, .LC63
 	add	x1, x1, :lo12:.LC63
-	ldr	w2, [x0, #:lo12:.LANCHOR86]
+	ldr	w2, [x0, #:lo12:.LANCHOR84]
 	mov	x0, x19
 	bl	sprintf
-.LVL440:
+.LVL415:
 	add	x19, x19, x0, sxtw
-.LVL441:
+.LVL416:
 	.loc 3 78 0
-	adrp	x0, .LANCHOR87
+	adrp	x0, .LANCHOR85
 	adrp	x1, .LC64
 	add	x1, x1, :lo12:.LC64
-	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	sprintf
-.LVL442:
+.LVL417:
 	add	x19, x19, x0, sxtw
-.LVL443:
+.LVL418:
 	.loc 3 79 0
 	bl	GetFreeBlockMinEraseCount
-.LVL444:
+.LVL419:
 	and	w2, w0, 65535
 	adrp	x1, .LC65
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC65
 	bl	sprintf
-.LVL445:
+.LVL420:
 	add	x19, x19, x0, sxtw
-.LVL446:
+.LVL421:
 	.loc 3 80 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	bl	GetFreeBlockMaxEraseCount
-.LVL447:
+.LVL422:
 	and	w2, w0, 65535
 	adrp	x1, .LC66
 	mov	x0, x19
 	add	x1, x1, :lo12:.LC66
 	bl	sprintf
-.LVL448:
+.LVL423:
 	add	x19, x19, x0, sxtw
-.LVL449:
+.LVL424:
 	.loc 3 81 0
-	adrp	x0, .LANCHOR88
-	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, 1
-	beq	.L212
-.L217:
+	beq	.L203
+.L208:
 	.loc 3 104 0
 	sub	w0, w19, w21
 	.loc 3 105 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL450:
+.LVL425:
 	ldp	x21, x22, [sp, 32]
-.LVL451:
+.LVL426:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
@@ -3637,58 +3469,58 @@ FtlPrintInfo2buf:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL452:
-.L212:
+.LVL427:
+.L203:
 	.cfi_restore_state
 	.loc 3 84 0
-	ldrh	w0, [x25, #:lo12:.LANCHOR82]
+	ldrh	w0, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L214
+	beq	.L205
 	.loc 3 85 0
-	ldr	x1, [x22, #:lo12:.LANCHOR43]
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	ldrh	w2, [x1, x0]
 	mov	x0, x19
 	adrp	x1, .LC67
 	add	x1, x1, :lo12:.LC67
 	bl	sprintf
-.LVL453:
+.LVL428:
 	add	x19, x19, x0, sxtw
-.LVL454:
-.L214:
-.LBB205:
+.LVL429:
+.L205:
+.LBB217:
 	.loc 3 87 0
 	mov	w0, 0
 	.loc 3 91 0
 	adrp	x24, .LC68
 	.loc 3 87 0
 	bl	List_get_gc_head_node
-.LVL455:
+.LVL430:
 	.loc 3 91 0
 	add	x24, x24, :lo12:.LC68
 	.loc 3 87 0
 	and	w3, w0, 65535
-.LVL456:
+.LVL431:
 	.loc 3 88 0
 	mov	w23, 0
 	.loc 3 89 0
 	mov	w27, 65535
-	adrp	x20, .LANCHOR41
+	adrp	x20, .LANCHOR40
 	.loc 3 91 0
 	mov	w26, 6
-.LVL457:
-.L216:
+.LVL432:
+.L207:
 	.loc 3 89 0
 	cmp	w3, w27
-	beq	.L215
+	beq	.L206
 	.loc 3 91 0 discriminator 2
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR43
 	umull	x25, w3, w26
-	ldr	x2, [x22, #:lo12:.LANCHOR43]
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
 	ubfiz	x1, x3, 1, 16
-	ldr	x4, [x0, #:lo12:.LANCHOR40]
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	add	x0, x0, x25
 	ldrh	w6, [x4, x1]
 	ldrh	w4, [x2, x1]
@@ -3698,42 +3530,42 @@ FtlPrintInfo2buf:
 	mov	x0, x19
 	.loc 3 88 0 discriminator 2
 	add	w23, w23, 1
-.LVL458:
+.LVL433:
 	.loc 3 91 0 discriminator 2
 	bl	sprintf
-.LVL459:
+.LVL434:
 	add	x19, x19, x0, sxtw
-.LVL460:
+.LVL435:
 	.loc 3 92 0 discriminator 2
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	.loc 3 88 0 discriminator 2
 	cmp	w23, 16
 	.loc 3 92 0 discriminator 2
 	ldrh	w3, [x0, x25]
-.LVL461:
+.LVL436:
 	.loc 3 88 0 discriminator 2
-	bne	.L216
-.L215:
-.LBE205:
-.LBB206:
+	bne	.L207
+.L206:
+.LBE217:
+.LBB218:
 	.loc 3 96 0
 	adrp	x0, .LANCHOR47
 	.loc 3 100 0
 	adrp	x23, .LC69
-.LVL462:
+.LVL437:
 	add	x23, x23, :lo12:.LC69
 	.loc 3 97 0
 	mov	w22, 0
 	.loc 3 96 0
 	ldr	x3, [x0, #:lo12:.LANCHOR47]
-.LVL463:
+.LVL438:
 	.loc 3 98 0
 	mov	w25, 65535
 	.loc 3 96 0
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	.loc 3 100 0
 	mov	w26, 6
-	adrp	x27, .LANCHOR40
+	adrp	x27, .LANCHOR43
 	.loc 3 96 0
 	sub	x3, x3, x0
 	mov	x0, -6148914691236517206
@@ -3741,15 +3573,15 @@ FtlPrintInfo2buf:
 	movk	x0, 0xaaab, lsl 0
 	mul	x3, x3, x0
 	and	w3, w3, 65535
-.LVL464:
-.L218:
+.LVL439:
+.L209:
 	.loc 3 98 0
 	cmp	w3, w25
-	beq	.L217
+	beq	.L208
 	.loc 3 100 0 discriminator 2
 	umull	x24, w3, w26
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
-	ldr	x2, [x27, #:lo12:.LANCHOR40]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
+	ldr	x2, [x27, #:lo12:.LANCHOR43]
 	ubfiz	x1, x3, 1, 16
 	add	x0, x0, x24
 	ldrh	w5, [x2, x1]
@@ -3759,20 +3591,20 @@ FtlPrintInfo2buf:
 	mov	x0, x19
 	.loc 3 97 0 discriminator 2
 	add	w22, w22, 1
-.LVL465:
+.LVL440:
 	.loc 3 100 0 discriminator 2
 	bl	sprintf
-.LVL466:
+.LVL441:
 	add	x19, x19, x0, sxtw
-.LVL467:
+.LVL442:
 	.loc 3 97 0 discriminator 2
 	cmp	w22, 4
-	beq	.L217
+	beq	.L208
 	.loc 3 101 0
-	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x0, [x20, #:lo12:.LANCHOR40]
 	ldrh	w3, [x0, x24]
-	b	.L218
-.LBE206:
+	b	.L209
+.LBE218:
 	.cfi_endproc
 .LFE200:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -3784,7 +3616,7 @@ rknand_proc_ftlread:
 .LFB201:
 	.loc 3 114 0
 	.cfi_startproc
-.LVL468:
+.LVL443:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -3804,23 +3636,23 @@ rknand_proc_ftlread:
 	.cfi_offset 20, -8
 	.loc 3 114 0
 	mov	x20, x0
-.LVL469:
+.LVL444:
 	.loc 3 120 0
 	bl	sprintf
-.LVL470:
+.LVL445:
 	add	x19, x20, x0, sxtw
-.LVL471:
+.LVL446:
 	.loc 3 122 0
 	mov	x0, x19
 	bl	FtlPrintInfo2buf
-.LVL472:
+.LVL447:
 	add	x0, x19, x0, sxtw
-.LVL473:
+.LVL448:
 	.loc 3 124 0
 	sub	w0, w0, w20
-.LVL474:
+.LVL449:
 	ldp	x19, x20, [sp, 16]
-.LVL475:
+.LVL450:
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
 	.cfi_restore 29
@@ -3837,82 +3669,82 @@ rknand_proc_ftlread:
 	.type	GetSwlReplaceBlock, %function
 GetSwlReplaceBlock:
 .LFB296:
-	.loc 2 2447 0
+	.loc 2 2500 0
 	.cfi_startproc
-.LVL476:
+.LVL451:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2456 0
-	adrp	x2, .LANCHOR75
-	adrp	x10, .LANCHOR78
-	.loc 2 2447 0
+	.loc 2 2510 0
+	adrp	x2, .LANCHOR74
+	adrp	x8, .LANCHOR77
+	.loc 2 2500 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 2456 0
-	ldr	w3, [x2, #:lo12:.LANCHOR75]
-	ldr	w7, [x10, #:lo12:.LANCHOR78]
+	.loc 2 2510 0
+	ldr	w3, [x2, #:lo12:.LANCHOR74]
+	ldr	w7, [x8, #:lo12:.LANCHOR77]
 	cmp	w3, w7
-	bcs	.L227
-	.loc 2 2459 0
+	bcs	.L218
+	.loc 2 2513 0
 	adrp	x1, .LANCHOR5
-	.loc 2 2458 0
-	adrp	x0, .LANCHOR73
-	.loc 2 2459 0
+	.loc 2 2512 0
+	adrp	x0, .LANCHOR72
+	.loc 2 2513 0
 	mov	w5, 0
 	mov	w4, 0
 	ldrh	w3, [x1, #:lo12:.LANCHOR5]
-	.loc 2 2460 0
-	adrp	x1, .LANCHOR40
-	.loc 2 2458 0
-	str	wzr, [x0, #:lo12:.LANCHOR73]
-.LVL477:
-	.loc 2 2460 0
-	ldr	x6, [x1, #:lo12:.LANCHOR40]
-	.loc 2 2459 0
+	.loc 2 2514 0
+	adrp	x1, .LANCHOR43
+	.loc 2 2512 0
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+.LVL452:
+	.loc 2 2514 0
+	ldr	x6, [x1, #:lo12:.LANCHOR43]
+	.loc 2 2513 0
 	mov	x1, 0
-.LVL478:
-.L228:
-	.loc 2 2459 0 is_stmt 0 discriminator 1
+.LVL453:
+.L219:
+	.loc 2 2513 0 is_stmt 0 discriminator 1
 	cmp	w3, w1
-	bhi	.L229
-	cbz	w5, .L230
-	str	w4, [x0, #:lo12:.LANCHOR73]
-.L230:
-	.loc 2 2461 0 is_stmt 1
-	ldr	w1, [x0, #:lo12:.LANCHOR73]
-.LVL479:
+	bhi	.L220
+	cbz	w5, .L221
+	str	w4, [x0, #:lo12:.LANCHOR72]
+.L221:
+	.loc 2 2515 0 is_stmt 1
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+.LVL454:
 	udiv	w3, w1, w3
-	str	w3, [x2, #:lo12:.LANCHOR75]
-	.loc 2 2462 0
-	adrp	x3, .LANCHOR74
-	ldr	w3, [x3, #:lo12:.LANCHOR74]
+	str	w3, [x2, #:lo12:.LANCHOR74]
+	.loc 2 2516 0
+	adrp	x3, .LANCHOR73
+	ldr	w3, [x3, #:lo12:.LANCHOR73]
 	sub	w1, w1, w3
 	adrp	x3, .LANCHOR14
 	ldrh	w3, [x3, #:lo12:.LANCHOR14]
 	udiv	w1, w1, w3
-	str	w1, [x0, #:lo12:.LANCHOR73]
-.L231:
-	.loc 2 2468 0
-	ldr	w8, [x2, #:lo12:.LANCHOR75]
+	str	w1, [x0, #:lo12:.LANCHOR72]
+.L222:
+	.loc 2 2522 0
+	ldr	w10, [x2, #:lo12:.LANCHOR74]
 	add	w0, w7, 256
-	cmp	w0, w8
-	bls	.L236
-	.loc 2 2468 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR77
+	cmp	w0, w10
+	bls	.L227
+	.loc 2 2522 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR76
 	add	w0, w7, 768
-	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	cmp	w0, w1
-	bls	.L236
-.LVL480:
-.L239:
-	.loc 2 2469 0 is_stmt 1
+	bls	.L227
+.LVL455:
+.L229:
+	.loc 2 2523 0 is_stmt 1
 	mov	w19, 65535
-.L237:
-	.loc 2 2518 0
+.L228:
+	.loc 2 2569 0
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -3922,189 +3754,197 @@ GetSwlReplaceBlock:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.LVL481:
-.L229:
+.LVL456:
+.L220:
 	.cfi_restore_state
-	.loc 2 2460 0 discriminator 3
+	.loc 2 2514 0 discriminator 3
 	ldrh	w5, [x6, x1, lsl 1]
 	add	x1, x1, 1
-.LVL482:
+.LVL457:
 	add	w4, w4, w5
 	mov	w5, 1
-	b	.L228
-.L227:
-	.loc 2 2463 0
-	adrp	x1, .LANCHOR77
-	ldr	w0, [x1, #:lo12:.LANCHOR77]
+	b	.L219
+.L218:
+	.loc 2 2517 0
+	adrp	x1, .LANCHOR76
+	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	cmp	w3, w0
-	bls	.L231
-	.loc 2 2464 0
+	bls	.L222
+	.loc 2 2518 0
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR77]
-.LVL483:
-	.loc 2 2466 0
-	adrp	x0, .LANCHOR40
-	.loc 2 2465 0
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.LVL458:
+	.loc 2 2520 0
+	adrp	x0, .LANCHOR43
+	.loc 2 2519 0
 	adrp	x1, .LANCHOR5
 	add	x1, x1, :lo12:.LANCHOR5
-	.loc 2 2466 0
-	ldr	x4, [x0, #:lo12:.LANCHOR40]
-	.loc 2 2465 0
+	.loc 2 2520 0
+	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	.loc 2 2519 0
 	mov	w0, 0
-.LVL484:
-.L233:
-	.loc 2 2465 0 is_stmt 0 discriminator 1
+.LVL459:
+.L224:
+	.loc 2 2519 0 is_stmt 0 discriminator 1
 	ldrh	w3, [x1]
 	cmp	w0, w3
-	bcs	.L231
-	.loc 2 2466 0 is_stmt 1 discriminator 3
+	bcs	.L222
+	.loc 2 2520 0 is_stmt 1 discriminator 3
 	ubfiz	x5, x0, 1, 32
-	.loc 2 2465 0 discriminator 3
+	.loc 2 2519 0 discriminator 3
 	add	w0, w0, 1
-.LVL485:
-	.loc 2 2466 0 discriminator 3
+.LVL460:
+	.loc 2 2520 0 discriminator 3
 	ldrh	w3, [x4, x5]
 	add	w3, w3, 1
 	strh	w3, [x4, x5]
-	b	.L233
-.LVL486:
-.L236:
-	.loc 2 2471 0
+	b	.L224
+.LVL461:
+.L227:
+	.loc 2 2525 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	add	w0, w0, w0, lsl 1
 	lsr	w0, w0, 2
 	bl	GetFreeBlockMaxEraseCount
-.LVL487:
+.LVL462:
 	and	w6, w0, 65535
-.LVL488:
-	.loc 2 2472 0
+.LVL463:
+	.loc 2 2526 0
 	add	w0, w7, 64
-.LVL489:
+.LVL464:
 	cmp	w6, w0
-	bcs	.L238
-	.loc 2 2472 0 is_stmt 0 discriminator 1
-	cmp	w7, 30
-	bhi	.L239
-.L238:
-	.loc 2 2476 0 is_stmt 1
-	adrp	x0, .LANCHOR42
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
-	cbz	x0, .L239
-	.loc 2 2483 0
-	adrp	x1, .LANCHOR41
-	.loc 2 2484 0
+	bcc	.L229
+	.loc 2 2529 0
+	adrp	x0, .LANCHOR41
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	cbz	x0, .L229
+	.loc 2 2533 0
+	adrp	x1, .LANCHOR5
+	.loc 2 2537 0
 	mov	w3, 65535
-	.loc 2 2483 0
-	mov	x12, -6148914691236517206
-	.loc 2 2484 0
+	.loc 2 2536 0
+	mov	x14, -6148914691236517206
+	.loc 2 2537 0
 	mov	w2, w3
-	.loc 2 2483 0
-	ldr	x5, [x1, #:lo12:.LANCHOR41]
-	.loc 2 2484 0
+	.loc 2 2533 0
+	ldrh	w13, [x1, #:lo12:.LANCHOR5]
+	.loc 2 2536 0
 	adrp	x1, .LANCHOR40
-	.loc 2 2479 0
-	mov	w11, w3
-	.loc 2 2483 0
-	movk	x12, 0xaaab, lsl 0
-	.loc 2 2484 0
-	ldr	x1, [x1, #:lo12:.LANCHOR40]
-	.loc 2 2495 0
-	mov	w13, 6
-.LVL490:
-.L240:
-	.loc 2 2479 0
-	ldrh	w4, [x0]
-	cmp	w4, w11
-	bne	.L243
+	.loc 2 2531 0
+	mov	w12, w3
+	.loc 2 2536 0
+	movk	x14, 0xaaab, lsl 0
+	ldr	x11, [x1, #:lo12:.LANCHOR40]
+	.loc 2 2537 0
+	adrp	x1, .LANCHOR43
+	.loc 2 2546 0
+	mov	w15, 6
+	.loc 2 2537 0
+	ldr	x4, [x1, #:lo12:.LANCHOR43]
+	mov	w1, 0
+.LVL465:
+.L230:
+	.loc 2 2531 0
+	ldrh	w5, [x0]
+	cmp	w5, w12
+	bne	.L233
 	mov	w19, w2
-.LVL491:
-.L242:
-	.loc 2 2498 0
+.LVL466:
+.L232:
+	.loc 2 2549 0
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L239
-	.loc 2 2500 0
+	beq	.L229
+	.loc 2 2551 0
 	ubfiz	x2, x19, 1, 32
-	ldrh	w5, [x1, x2]
-.LVL492:
-	.loc 2 2501 0
+	ldrh	w5, [x4, x2]
+.LVL467:
+	.loc 2 2552 0
 	cmp	w7, w5
-	bcs	.L244
-	.loc 2 2503 0
+	bcs	.L234
+	.loc 2 2554 0
 	bl	GetFreeBlockMinEraseCount
-.LVL493:
+.LVL468:
 	cmp	w7, w0, uxth
-	bcs	.L244
-	.loc 2 2504 0
-	str	w3, [x10, #:lo12:.LANCHOR78]
-.L244:
-	.loc 2 2506 0
-	cmp	w8, w5
-	bls	.L239
-	.loc 2 2506 0 is_stmt 0 discriminator 1
+	bcs	.L234
+	.loc 2 2555 0
+	str	w3, [x8, #:lo12:.LANCHOR77]
+.L234:
+	.loc 2 2557 0
+	cmp	w10, w5
+	bls	.L229
+	.loc 2 2557 0 is_stmt 0 discriminator 1
 	add	w0, w5, 128
 	cmp	w6, w0
-	ble	.L239
-	.loc 2 2508 0 is_stmt 1
+	ble	.L229
+	.loc 2 2559 0 is_stmt 1
 	add	w0, w5, 256
-	adrp	x1, .LANCHOR77
-	cmp	w8, w0
-	bhi	.L245
-	.loc 2 2508 0 is_stmt 0 discriminator 1
-	ldr	w3, [x1, #:lo12:.LANCHOR77]
-.LVL494:
+	adrp	x1, .LANCHOR76
+	cmp	w10, w0
+	bhi	.L235
+	.loc 2 2559 0 is_stmt 0 discriminator 1
+	ldr	w3, [x1, #:lo12:.LANCHOR76]
+.LVL469:
 	add	w0, w5, 768
 	cmp	w0, w3
-	bcs	.L239
-.L245:
-	.loc 2 2510 0 is_stmt 1
-	adrp	x0, .LANCHOR43
-	ldr	w3, [x1, #:lo12:.LANCHOR77]
+	bcs	.L229
+.L235:
+	.loc 2 2561 0 is_stmt 1
+	adrp	x0, .LANCHOR42
+	ldr	w3, [x1, #:lo12:.LANCHOR76]
 	mov	w1, w19
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w4, [x0, x2]
-	mov	w2, w8
+	mov	w2, w10
 	adrp	x0, .LC72
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.LVL495:
-	.loc 2 2511 0
-	adrp	x0, .LANCHOR89
+.LVL470:
+	.loc 2 2562 0
+	adrp	x0, .LANCHOR87
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR89]
-	.loc 2 2512 0
-	b	.L237
-.LVL496:
-.L243:
-	.loc 2 2481 0
-	ldrh	w14, [x0, 4]
-	cbz	w14, .L241
-	.loc 2 2483 0
-	sub	x0, x0, x5
-.LVL497:
+	str	w1, [x0, #:lo12:.LANCHOR87]
+	.loc 2 2563 0
+	b	.L228
+.LVL471:
+.L233:
+	.loc 2 2532 0
+	add	w1, w1, 1
+.LVL472:
+	and	w1, w1, 65535
+.LVL473:
+	.loc 2 2533 0
+	cmp	w1, w13
+	bhi	.L229
+	.loc 2 2535 0
+	ldrh	w16, [x0, 4]
+	cbz	w16, .L231
+	.loc 2 2536 0
+	sub	x0, x0, x11
+.LVL474:
 	asr	x0, x0, 1
-	mul	x0, x0, x12
+	mul	x0, x0, x14
 	and	w19, w0, 65535
-.LVL498:
-	.loc 2 2484 0
+.LVL475:
+	.loc 2 2537 0
 	and	x0, x0, 65535
-	ldrh	w0, [x1, x0, lsl 1]
+	ldrh	w0, [x4, x0, lsl 1]
 	cmp	w7, w0
-	bcs	.L242
-	.loc 2 2489 0
+	bcs	.L232
+	.loc 2 2541 0
 	cmp	w3, w0
-	bls	.L241
+	bls	.L231
 	mov	w3, w0
-.LVL499:
-	.loc 2 2483 0
+.LVL476:
+	.loc 2 2536 0
 	mov	w2, w19
-.LVL500:
-.L241:
-	.loc 2 2495 0
-	umaddl	x0, w4, w13, x5
-.LVL501:
-	b	.L240
+.LVL477:
+.L231:
+	.loc 2 2546 0
+	umaddl	x0, w5, w15, x11
+.LVL478:
+	b	.L230
 	.cfi_endproc
 .LFE296:
 	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
@@ -4114,49 +3954,49 @@ GetSwlReplaceBlock:
 	.type	free_data_superblock, %function
 free_data_superblock:
 .LFB297:
-	.loc 2 2522 0
+	.loc 2 2573 0
 	.cfi_startproc
-.LVL502:
+.LVL479:
 	and	w0, w0, 65535
-	.loc 2 2523 0
+	.loc 2 2574 0
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L259
-.LVL503:
-	.loc 2 2522 0
+	beq	.L249
+.LVL480:
+	.loc 2 2573 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-.LBB209:
-.LBB210:
-	.loc 2 2525 0
-	adrp	x2, .LANCHOR43
+.LBB221:
+.LBB222:
+	.loc 2 2576 0
+	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
-.LBE210:
-.LBE209:
-	.loc 2 2522 0
+.LBE222:
+.LBE221:
+	.loc 2 2573 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.LBB212:
-.LBB211:
-	.loc 2 2525 0
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+.LBB224:
+.LBB223:
+	.loc 2 2576 0
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	strh	wzr, [x2, x1]
-	.loc 2 2526 0
+	.loc 2 2577 0
 	bl	INSERT_FREE_LIST
-.LVL504:
-.LBE211:
-.LBE212:
-	.loc 2 2528 0
+.LVL481:
+.LBE223:
+.LBE224:
+	.loc 2 2579 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL505:
-.L259:
+.LVL482:
+.L249:
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -4168,9 +4008,9 @@ free_data_superblock:
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
 .LFB300:
-	.loc 2 2655 0
+	.loc 2 2706 0
 	.cfi_startproc
-.LVL506:
+.LVL483:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -4181,128 +4021,128 @@ get_new_active_ppa:
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 2659 0
+	.loc 2 2710 0
 	ldrh	w1, [x0]
 	mov	w0, 65535
-.LVL507:
-	.loc 2 2655 0
+.LVL484:
+	.loc 2 2706 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2659 0
+	.loc 2 2710 0
 	cmp	w1, w0
-	bne	.L263
-	.loc 2 2659 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR90
+	bne	.L253
+	.loc 2 2710 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2659
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2710
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL508:
-.L263:
-	.loc 2 2660 0 is_stmt 1
+.LVL485:
+.L253:
+	.loc 2 2711 0 is_stmt 1
 	adrp	x20, .LANCHOR19
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bne	.L264
-	.loc 2 2660 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR90
+	bne	.L254
+	.loc 2 2711 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2660
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2711
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL509:
-.L264:
-	.loc 2 2661 0 is_stmt 1
+.LVL486:
+.L254:
+	.loc 2 2712 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L265
-	.loc 2 2661 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR90
+	cbnz	w0, .L255
+	.loc 2 2712 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2661
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2712
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL510:
-.L265:
-	.loc 2 2663 0 is_stmt 1
+.LVL487:
+.L255:
+	.loc 2 2714 0 is_stmt 1
 	ldrb	w0, [x19, 6]
-	.loc 2 2666 0
+	.loc 2 2717 0
 	adrp	x1, .LANCHOR3
-	.loc 2 2662 0
+	.loc 2 2713 0
 	strb	wzr, [x19, 10]
-	.loc 2 2663 0
+	.loc 2 2714 0
 	add	x0, x0, 8
-	.loc 2 2666 0
+	.loc 2 2717 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR3]
-	.loc 2 2664 0
+	.loc 2 2715 0
 	mov	w1, 65535
-	.loc 2 2663 0
+	.loc 2 2714 0
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL511:
-.L266:
-	.loc 2 2664 0
+.LVL488:
+.L256:
+	.loc 2 2715 0
 	cmp	w0, w1
-	beq	.L268
-	.loc 2 2672 0
+	beq	.L258
+	.loc 2 2723 0
 	ldrh	w21, [x19, 2]
-	.loc 2 2680 0
+	.loc 2 2731 0
 	mov	w3, 65535
-	.loc 2 2673 0
+	.loc 2 2724 0
 	ldrh	w1, [x19, 4]
-	.loc 2 2672 0
+	.loc 2 2723 0
 	orr	w21, w21, w0, lsl 10
-.LVL512:
+.LVL489:
 	ldrb	w0, [x19, 6]
-.LVL513:
-	.loc 2 2673 0
+.LVL490:
+	.loc 2 2724 0
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	strh	w1, [x19, 4]
-.L270:
-	.loc 2 2675 0
+.L260:
+	.loc 2 2726 0
 	add	w0, w0, 1
 	and	w0, w0, 255
-	.loc 2 2676 0
+	.loc 2 2727 0
 	cmp	w2, w0
-	bne	.L269
-	.loc 2 2677 0
+	bne	.L259
+	.loc 2 2728 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 2678 0
+	.loc 2 2729 0
 	mov	w0, 0
-.L269:
-	.loc 2 2680 0
+.L259:
+	.loc 2 2731 0
 	add	x4, x19, x0, sxtw 1
 	ldrh	w4, [x4, 16]
 	cmp	w4, w3
-	beq	.L270
+	beq	.L260
 	strb	w0, [x19, 6]
-	.loc 2 2682 0
+	.loc 2 2733 0
 	ldrh	w2, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w2, w0
-	bne	.L262
-	.loc 2 2682 0 is_stmt 0 discriminator 1
-	cbz	w1, .L262
-	.loc 2 2682 0 discriminator 2
-	adrp	x1, .LANCHOR90
+	bne	.L252
+	.loc 2 2733 0 is_stmt 0 discriminator 1
+	cbz	w1, .L252
+	.loc 2 2733 0 discriminator 2
+	adrp	x1, .LANCHOR88
 	adrp	x0, .LC1
-	mov	w2, 2682
-	add	x1, x1, :lo12:.LANCHOR90
+	mov	w2, 2733
+	add	x1, x1, :lo12:.LANCHOR88
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL514:
-.L262:
-	.loc 2 2684 0 is_stmt 1
+.LVL491:
+.L252:
+	.loc 2 2735 0 is_stmt 1
 	mov	w0, w21
 	ldr	x21, [sp, 32]
-.LVL515:
+.LVL492:
 	ldp	x19, x20, [sp, 16]
-.LVL516:
+.LVL493:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -4312,32 +4152,32 @@ get_new_active_ppa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL517:
-.L268:
+.LVL494:
+.L258:
 	.cfi_restore_state
-	.loc 2 2665 0
+	.loc 2 2716 0
 	ldrb	w0, [x19, 6]
-.LVL518:
+.LVL495:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
-	.loc 2 2666 0
+	.loc 2 2717 0
 	cmp	w0, w2
-	bne	.L267
-	.loc 2 2667 0
+	bne	.L257
+	.loc 2 2718 0
 	ldrh	w0, [x19, 2]
-	.loc 2 2668 0
+	.loc 2 2719 0
 	strb	wzr, [x19, 6]
-	.loc 2 2667 0
+	.loc 2 2718 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L267:
-	.loc 2 2670 0
+.L257:
+	.loc 2 2721 0
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-.LVL519:
-	b	.L266
+.LVL496:
+	b	.L256
 	.cfi_endproc
 .LFE300:
 	.size	get_new_active_ppa, .-get_new_active_ppa
@@ -4351,20 +4191,20 @@ FtlGcBufInit:
 	.loc 5 22 0
 	.cfi_startproc
 	.loc 5 27 0
-	adrp	x1, .LANCHOR92
+	adrp	x1, .LANCHOR90
 	.loc 5 25 0
-	adrp	x0, .LANCHOR91
+	adrp	x0, .LANCHOR89
 	.loc 5 28 0
-	adrp	x7, .LANCHOR93
+	adrp	x7, .LANCHOR91
 	.loc 5 29 0
-	adrp	x6, .LANCHOR94
+	adrp	x6, .LANCHOR92
 	.loc 5 27 0
-	ldr	x5, [x1, #:lo12:.LANCHOR92]
+	ldr	x5, [x1, #:lo12:.LANCHOR90]
 	.loc 5 28 0
 	adrp	x1, .LANCHOR23
 	.loc 5 25 0
-	str	wzr, [x0, #:lo12:.LANCHOR91]
-.LVL520:
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+.LVL497:
 	.loc 5 26 0
 	adrp	x0, .LANCHOR3
 	.loc 5 28 0
@@ -4377,15 +4217,15 @@ FtlGcBufInit:
 	.loc 5 29 0
 	ldrh	w11, [x1, #:lo12:.LANCHOR24]
 	.loc 5 30 0
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR93
 	.loc 5 28 0
-	ldr	x14, [x7, #:lo12:.LANCHOR93]
+	ldr	x14, [x7, #:lo12:.LANCHOR91]
 	mov	x3, x5
-	ldr	x4, [x1, #:lo12:.LANCHOR95]
+	ldr	x4, [x1, #:lo12:.LANCHOR93]
 	.loc 5 26 0
 	mov	w2, 0
 	.loc 5 29 0
-	ldr	x15, [x6, #:lo12:.LANCHOR94]
+	ldr	x15, [x6, #:lo12:.LANCHOR92]
 	nop // between mem op and mult-accumulate
 	umaddl	x8, w0, w8, x5
 	add	x4, x4, 8
@@ -4393,32 +4233,32 @@ FtlGcBufInit:
 	mov	w1, 0
 	.loc 5 27 0
 	mov	w16, 1
-.LVL521:
-.L278:
+.LVL498:
+.L268:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	.loc 5 26 0 discriminator 1
 	cmp	x3, x8
-	bne	.L279
+	bne	.L269
 	.loc 5 34 0
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR94
 	.loc 5 36 0
-	ldr	x7, [x7, #:lo12:.LANCHOR93]
+	ldr	x7, [x7, #:lo12:.LANCHOR91]
 	.loc 5 37 0
-	ldr	x6, [x6, #:lo12:.LANCHOR94]
+	ldr	x6, [x6, #:lo12:.LANCHOR92]
 	.loc 5 35 0
 	mov	w8, 24
 	.loc 5 34 0
-	ldr	w4, [x1, #:lo12:.LANCHOR96]
-.L280:
-.LVL522:
+	ldr	w4, [x1, #:lo12:.LANCHOR94]
+.L270:
+.LVL499:
 	.loc 5 34 0 is_stmt 0 discriminator 1
 	cmp	w0, w4
-	bcc	.L281
+	bcc	.L271
 	.loc 5 39 0 is_stmt 1
 	ret
-.LVL523:
-.L279:
+.LVL500:
+.L269:
 	.loc 5 28 0 discriminator 3
 	asr	w2, w2, 2
 	.loc 5 29 0 discriminator 3
@@ -4437,9 +4277,9 @@ FtlGcBufInit:
 	add	x4, x4, 32
 	mov	w1, w12
 	mov	w2, w13
-	b	.L278
-.LVL524:
-.L281:
+	b	.L268
+.LVL501:
+.L271:
 	.loc 5 35 0 discriminator 3
 	umull	x3, w0, w8
 	.loc 5 36 0 discriminator 3
@@ -4457,14 +4297,14 @@ FtlGcBufInit:
 	mul	w1, w11, w0
 	.loc 5 34 0 discriminator 3
 	add	w0, w0, 1
-.LVL525:
+.LVL502:
 	and	w0, w0, 65535
-.LVL526:
+.LVL503:
 	.loc 5 37 0 discriminator 3
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L280
+	b	.L270
 	.cfi_endproc
 .LFE303:
 	.size	FtlGcBufInit, .-FtlGcBufInit
@@ -4476,57 +4316,57 @@ FtlGcBufFree:
 .LFB304:
 	.loc 5 42 0
 	.cfi_startproc
-.LVL527:
+.LVL504:
 	.loc 5 47 0
-	adrp	x2, .LANCHOR96
+	adrp	x2, .LANCHOR94
 	.loc 5 46 0
 	mov	w3, 0
 	.loc 5 48 0
 	mov	w8, 24
 	.loc 5 47 0
-	ldr	w7, [x2, #:lo12:.LANCHOR96]
+	ldr	w7, [x2, #:lo12:.LANCHOR94]
 	.loc 5 48 0
-	adrp	x2, .LANCHOR92
-	ldr	x5, [x2, #:lo12:.LANCHOR92]
-.LVL528:
-.L283:
+	adrp	x2, .LANCHOR90
+	ldr	x5, [x2, #:lo12:.LANCHOR90]
+.LVL505:
+.L273:
 	.loc 5 46 0 discriminator 1
 	cmp	w3, w1
-	bcs	.L282
+	bcs	.L272
 	.loc 5 48 0
 	ubfiz	x4, x3, 5, 16
 	mov	w2, 0
 	add	x4, x0, x4
-	b	.L288
-.LVL529:
-.L284:
+	b	.L278
+.LVL506:
+.L274:
 	.loc 5 47 0 discriminator 2
 	add	w2, w2, 1
-.LVL530:
+.LVL507:
 	and	w2, w2, 65535
-.LVL531:
-.L288:
+.LVL508:
+.L278:
 	.loc 5 47 0 is_stmt 0 discriminator 1
 	cmp	w2, w7
-	bcs	.L285
+	bcs	.L275
 	.loc 5 48 0 is_stmt 1
 	umull	x6, w2, w8
 	add	x10, x5, x6
 	ldr	x11, [x5, x6]
 	ldr	x6, [x4, 8]
 	cmp	x11, x6
-	bne	.L284
+	bne	.L274
 	.loc 5 49 0
 	str	wzr, [x10, 16]
-.L285:
+.L275:
 	.loc 5 46 0 discriminator 2
 	add	w3, w3, 1
-.LVL532:
+.LVL509:
 	and	w3, w3, 65535
-.LVL533:
-	b	.L283
-.LVL534:
-.L282:
+.LVL510:
+	b	.L273
+.LVL511:
+.L272:
 	ret
 	.cfi_endproc
 .LFE304:
@@ -4539,9 +4379,9 @@ FtlGcBufAlloc:
 .LFB305:
 	.loc 5 57 0
 	.cfi_startproc
-.LVL535:
+.LVL512:
 	.loc 5 62 0
-	adrp	x2, .LANCHOR96
+	adrp	x2, .LANCHOR94
 	.loc 5 61 0
 	mov	w3, 0
 	.loc 5 63 0
@@ -4549,35 +4389,35 @@ FtlGcBufAlloc:
 	.loc 5 64 0
 	mov	w8, 1
 	.loc 5 62 0
-	ldr	w5, [x2, #:lo12:.LANCHOR96]
+	ldr	w5, [x2, #:lo12:.LANCHOR94]
 	.loc 5 63 0
-	adrp	x2, .LANCHOR92
-	ldr	x6, [x2, #:lo12:.LANCHOR92]
-.LVL536:
-.L290:
+	adrp	x2, .LANCHOR90
+	ldr	x6, [x2, #:lo12:.LANCHOR90]
+.LVL513:
+.L280:
 	.loc 5 61 0 discriminator 1
 	cmp	w3, w1
-	bcs	.L289
+	bcs	.L279
 	mov	w2, 0
-	b	.L295
-.LVL537:
-.L291:
+	b	.L285
+.LVL514:
+.L281:
 	.loc 5 62 0 discriminator 2
 	add	w2, w2, 1
-.LVL538:
+.LVL515:
 	and	w2, w2, 65535
-.LVL539:
-.L295:
+.LVL516:
+.L285:
 	.loc 5 62 0 is_stmt 0 discriminator 1
 	cmp	w2, w5
-	bcs	.L292
+	bcs	.L282
 	.loc 5 63 0 is_stmt 1
 	umaddl	x4, w2, w7, x6
 	ldr	w10, [x4, 16]
-	cbnz	w10, .L291
+	cbnz	w10, .L281
 	.loc 5 65 0
 	ubfiz	x2, x3, 5, 16
-.LVL540:
+.LVL517:
 	ldr	x10, [x4]
 	add	x2, x0, x2
 	.loc 5 64 0
@@ -4585,14 +4425,14 @@ FtlGcBufAlloc:
 	.loc 5 66 0
 	ldr	x4, [x4, 8]
 	stp	x10, x4, [x2, 8]
-.L292:
+.L282:
 	.loc 5 61 0 discriminator 2
 	add	w3, w3, 1
-.LVL541:
+.LVL518:
 	and	w3, w3, 65535
-.LVL542:
-	b	.L290
-.L289:
+.LVL519:
+	b	.L280
+.L279:
 	ret
 	.cfi_endproc
 .LFE305:
@@ -4605,35 +4445,35 @@ IsBlkInGcList:
 .LFB306:
 	.loc 5 74 0
 	.cfi_startproc
-.LVL543:
+.LVL520:
 	.loc 5 77 0
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR95
 	.loc 5 74 0
 	and	w0, w0, 65535
 	.loc 5 77 0
-	ldrh	w2, [x1, #:lo12:.LANCHOR97]
+	ldrh	w2, [x1, #:lo12:.LANCHOR95]
 	.loc 5 78 0
-	adrp	x1, .LANCHOR98
-	ldr	x3, [x1, #:lo12:.LANCHOR98]
+	adrp	x1, .LANCHOR96
+	ldr	x3, [x1, #:lo12:.LANCHOR96]
 	.loc 5 77 0
 	mov	x1, 0
-.LVL544:
-.L297:
+.LVL521:
+.L287:
 	.loc 5 77 0 is_stmt 0 discriminator 1
 	cmp	w2, w1, uxth
-	bhi	.L299
+	bhi	.L289
 	.loc 5 81 0 is_stmt 1
 	mov	w0, 0
-.LVL545:
+.LVL522:
 	ret
-.L299:
+.L289:
 	add	x1, x1, 1
-.LVL546:
+.LVL523:
 	.loc 5 78 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L297
+	bne	.L287
 	.loc 5 79 0
 	mov	w0, 1
 	.loc 5 82 0
@@ -4649,7 +4489,7 @@ FtlGcUpdatePage:
 .LFB307:
 	.loc 5 85 0
 	.cfi_startproc
-.LVL547:
+.LVL524:
 	mov	w6, w0
 	mov	w10, w1
 	mov	w8, w2
@@ -4659,72 +4499,72 @@ FtlGcUpdatePage:
 	.cfi_offset 30, -8
 	.loc 5 88 0
 	lsr	w0, w0, 10
-.LVL548:
+.LVL525:
 	.loc 5 85 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 5 88 0
 	bl	P2V_block_in_plane
-.LVL549:
+.LVL526:
 	and	w7, w0, 65535
-.LVL550:
+.LVL527:
 	.loc 5 91 0
-	adrp	x4, .LANCHOR97
+	adrp	x4, .LANCHOR95
 	.loc 5 92 0
-	adrp	x2, .LANCHOR98
+	adrp	x2, .LANCHOR96
 	.loc 5 91 0
 	mov	x3, 0
-	ldrh	w1, [x4, #:lo12:.LANCHOR97]
+	ldrh	w1, [x4, #:lo12:.LANCHOR95]
 	.loc 5 92 0
-	ldr	x5, [x2, #:lo12:.LANCHOR98]
-.LVL551:
-.L302:
+	ldr	x5, [x2, #:lo12:.LANCHOR96]
+.LVL528:
+.L292:
 	and	w2, w3, 65535
-.LVL552:
+.LVL529:
 	.loc 5 91 0 discriminator 1
 	cmp	w2, w1
-	bcc	.L304
+	bcc	.L294
 	.loc 5 96 0
-	bne	.L303
+	bne	.L293
 	.loc 5 97 0
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	.loc 5 98 0
-	ldrh	w0, [x4, #:lo12:.LANCHOR97]
-.LVL553:
+	ldrh	w0, [x4, #:lo12:.LANCHOR95]
+.LVL530:
 	add	w0, w0, 1
-	strh	w0, [x4, #:lo12:.LANCHOR97]
-.LVL554:
-	b	.L303
-.LVL555:
-.L304:
+	strh	w0, [x4, #:lo12:.LANCHOR95]
+.LVL531:
+	b	.L293
+.LVL532:
+.L294:
 	add	x3, x3, 1
 	.loc 5 92 0
 	add	x2, x5, x3, lsl 1
-.LVL556:
+.LVL533:
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L302
-.LVL557:
-.L303:
+	bne	.L292
+.LVL534:
+.L293:
 	.loc 5 101 0
-	adrp	x4, .LANCHOR99
-	adrp	x1, .LANCHOR100
+	adrp	x4, .LANCHOR97
+	adrp	x1, .LANCHOR98
 	mov	w3, 12
-	ldrh	w0, [x4, #:lo12:.LANCHOR99]
-	ldr	x5, [x1, #:lo12:.LANCHOR100]
+	ldrh	w0, [x4, #:lo12:.LANCHOR97]
+	ldr	x5, [x1, #:lo12:.LANCHOR98]
 	umull	x3, w0, w3
 	.loc 5 107 0
 	add	w0, w0, 1
 	.loc 5 101 0
 	add	x7, x5, x3
-.LVL558:
+.LVL535:
 	.loc 5 102 0
 	stp	w10, w8, [x7, 4]
 	.loc 5 103 0
 	str	w6, [x5, x3]
 	.loc 5 107 0
-	strh	w0, [x4, #:lo12:.LANCHOR99]
+	strh	w0, [x4, #:lo12:.LANCHOR97]
 	.loc 5 108 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -4742,7 +4582,7 @@ FtlGcRefreshBlock:
 .LFB314:
 	.loc 5 345 0
 	.cfi_startproc
-.LVL559:
+.LVL536:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -4756,31 +4596,31 @@ FtlGcRefreshBlock:
 	.loc 5 347 0
 	mov	w1, w19
 	adrp	x0, .LC73
-.LVL560:
+.LVL537:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.LVL561:
+.LVL538:
 	.loc 5 349 0
-	adrp	x3, .LANCHOR101
-	ldrh	w4, [x3, #:lo12:.LANCHOR101]
+	adrp	x3, .LANCHOR99
+	ldrh	w4, [x3, #:lo12:.LANCHOR99]
 	cmp	w19, w4
-	beq	.L307
+	beq	.L297
 	.loc 5 349 0 is_stmt 0 discriminator 1
-	adrp	x0, .LANCHOR102
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR100
+	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w19, w2
-	beq	.L307
+	beq	.L297
 	.loc 5 351 0 is_stmt 1
 	mov	w1, 65535
 	cmp	w4, w1
-	bne	.L308
+	bne	.L298
 	.loc 5 352 0
-	strh	w19, [x3, #:lo12:.LANCHOR101]
-.L307:
+	strh	w19, [x3, #:lo12:.LANCHOR99]
+.L297:
 	.loc 5 356 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
-.LVL562:
+.LVL539:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -4788,14 +4628,14 @@ FtlGcRefreshBlock:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.L308:
+.L298:
 	.cfi_restore_state
 	.loc 5 353 0
 	cmp	w2, w1
-	bne	.L307
+	bne	.L297
 	.loc 5 354 0
-	strh	w19, [x0, #:lo12:.LANCHOR102]
-	b	.L307
+	strh	w19, [x0, #:lo12:.LANCHOR100]
+	b	.L297
 	.cfi_endproc
 .LFE314:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -4807,7 +4647,7 @@ FtlGcMarkBadPhyBlk:
 .LFB315:
 	.loc 5 359 0
 	.cfi_startproc
-.LVL563:
+.LVL540:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -4819,70 +4659,70 @@ FtlGcMarkBadPhyBlk:
 	.cfi_offset 20, -24
 	and	w20, w0, 65535
 	.loc 5 364 0
-	adrp	x19, .LANCHOR103
+	adrp	x19, .LANCHOR101
 	.loc 5 359 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
 	.loc 5 361 0
 	mov	w0, w20
-.LVL564:
+.LVL541:
 	bl	P2V_block_in_plane
-.LVL565:
+.LVL542:
 	.loc 5 364 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	ldrh	w1, [x19, #:lo12:.LANCHOR101]
 	mov	w2, w20
 	.loc 5 361 0
 	mov	w21, w0
-.LVL566:
+.LVL543:
 	.loc 5 364 0
 	adrp	x0, .LC74
-.LVL567:
+.LVL544:
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-.LVL568:
+.LVL545:
 	.loc 5 366 0
 	mov	w0, w21
 	bl	FtlGcRefreshBlock
-.LVL569:
+.LVL546:
 	.loc 5 368 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR103]
+	ldrh	w0, [x19, #:lo12:.LANCHOR101]
 	.loc 5 369 0
-	adrp	x2, .LANCHOR104
-	add	x2, x2, :lo12:.LANCHOR104
+	adrp	x2, .LANCHOR102
+	add	x2, x2, :lo12:.LANCHOR102
 	.loc 5 368 0
 	mov	x1, 0
-.LVL570:
-.L311:
+.LVL547:
+.L301:
 	.loc 5 368 0 is_stmt 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L313
+	bhi	.L303
 	.loc 5 372 0 is_stmt 1
 	cmp	w0, 15
-	bhi	.L312
+	bhi	.L302
 	.loc 5 373 0
 	add	w1, w0, 1
-.LVL571:
-	strh	w1, [x19, #:lo12:.LANCHOR103]
-	adrp	x1, .LANCHOR104
-	add	x1, x1, :lo12:.LANCHOR104
+.LVL548:
+	strh	w1, [x19, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR102
+	add	x1, x1, :lo12:.LANCHOR102
 	strh	w20, [x1, w0, sxtw 1]
-	b	.L312
-.LVL572:
-.L313:
+	b	.L302
+.LVL549:
+.L303:
 	add	x1, x1, 1
-.LVL573:
+.LVL550:
 	.loc 5 369 0
 	add	x3, x2, x1, lsl 1
 	ldrh	w3, [x3, -2]
 	cmp	w3, w20
-	bne	.L311
-.L312:
+	bne	.L301
+.L302:
 	.loc 5 375 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
-.LVL574:
+.LVL551:
 	ldp	x19, x20, [sp, 16]
-.LVL575:
+.LVL552:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -4903,15 +4743,15 @@ FtlGcReFreshBadBlk:
 	.loc 5 379 0
 	.cfi_startproc
 	.loc 5 380 0
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L322
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L312
 	.loc 5 380 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR101
-	ldrh	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR99
+	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L322
+	bne	.L312
 	.loc 5 379 0 is_stmt 1
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
@@ -4922,30 +4762,30 @@ FtlGcReFreshBadBlk:
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
 	.loc 5 381 0
-	adrp	x19, .LANCHOR105
-	ldrh	w1, [x19, #:lo12:.LANCHOR105]
+	adrp	x19, .LANCHOR103
+	ldrh	w1, [x19, #:lo12:.LANCHOR103]
 	cmp	w1, w0
-	bcc	.L317
+	bcc	.L307
 	.loc 5 382 0
-	strh	wzr, [x19, #:lo12:.LANCHOR105]
-.L317:
-.LBB215:
-.LBB216:
+	strh	wzr, [x19, #:lo12:.LANCHOR103]
+.L307:
+.LBB227:
+.LBB228:
 	.loc 5 383 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR104
-	add	x0, x0, :lo12:.LANCHOR104
+	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	ldrh	w0, [x0, x1, lsl 1]
 	bl	P2V_block_in_plane
-.LVL576:
+.LVL553:
 	bl	FtlGcRefreshBlock
-.LVL577:
+.LVL554:
 	.loc 5 384 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR105]
+	ldrh	w0, [x19, #:lo12:.LANCHOR103]
 	add	w0, w0, 1
-	strh	w0, [x19, #:lo12:.LANCHOR105]
-.LBE216:
-.LBE215:
+	strh	w0, [x19, #:lo12:.LANCHOR103]
+.LBE228:
+.LBE227:
 	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -4955,7 +4795,7 @@ FtlGcReFreshBadBlk:
 	.cfi_restore 19
 	.cfi_def_cfa 31, 0
 	ret
-.L322:
+.L312:
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -4969,15 +4809,15 @@ ftl_free:
 .LFB337:
 	.loc 1 24 0
 	.cfi_startproc
-.LVL578:
-.LBB217:
-.LBB218:
+.LVL555:
+.LBB229:
+.LBB230:
 	.file 6 "include/linux/compat.h"
 	.loc 6 80 0
 	b	free
-.LVL579:
-.LBE218:
-.LBE217:
+.LVL556:
+.LBE230:
+.LBE229:
 	.cfi_endproc
 .LFE337:
 	.size	ftl_free, .-ftl_free
@@ -4989,12 +4829,12 @@ ftl_malloc:
 .LFB338:
 	.loc 1 28 0
 	.cfi_startproc
-.LVL580:
+.LVL557:
 	.loc 1 29 0
 	mov	w1, 0
 	sxtw	x0, w0
 	b	kmalloc
-.LVL581:
+.LVL558:
 	.cfi_endproc
 .LFE338:
 	.size	ftl_malloc, .-ftl_malloc
@@ -5006,7 +4846,7 @@ rknand_print_hex:
 .LFB339:
 	.loc 1 33 0
 	.cfi_startproc
-.LVL582:
+.LVL559:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -5017,7 +4857,7 @@ rknand_print_hex:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	mov	x22, x1
-.LVL583:
+.LVL560:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
@@ -5051,27 +4891,27 @@ rknand_print_hex:
 	mov	w20, 0
 	.loc 1 47 0
 	adrp	x26, .LC76
-.LVL584:
-.L328:
+.LVL561:
+.L318:
 	.loc 1 40 0 discriminator 1
 	cmp	w27, w19
-	bhi	.L334
+	bhi	.L324
 	.loc 1 56 0
 	ldp	x19, x20, [sp, 16]
-.LVL585:
+.LVL562:
 	.loc 1 55 0
 	adrp	x0, .LC78
 	.loc 1 56 0
 	ldp	x21, x22, [sp, 32]
-.LVL586:
+.LVL563:
 	.loc 1 55 0
 	add	x0, x0, :lo12:.LC78
 	.loc 1 56 0
 	ldp	x23, x24, [sp, 48]
-.LVL587:
+.LVL564:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL588:
+.LVL565:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5089,61 +4929,61 @@ rknand_print_hex:
 	.cfi_def_cfa 31, 0
 	.loc 1 55 0
 	b	printf
-.LVL589:
-.L334:
+.LVL566:
+.L324:
 	.cfi_restore_state
 	.loc 1 41 0
-	cbnz	w20, .L329
+	cbnz	w20, .L319
 	.loc 1 42 0
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.LVL590:
-.L329:
+.LVL567:
+.L319:
 	.loc 1 44 0
 	cmp	w23, 4
-	bne	.L330
+	bne	.L320
 	.loc 1 45 0
 	ldr	w1, [x22, x19, lsl 2]
-.L337:
+.L327:
 	.loc 1 47 0
 	add	x0, x26, :lo12:.LC76
-.L336:
+.L326:
 	.loc 1 49 0
 	bl	printf
-.LVL591:
+.LVL568:
 	.loc 1 50 0
 	add	w20, w20, 1
-.LVL592:
+.LVL569:
 	cmp	w20, 15
-	bls	.L333
-.LVL593:
+	bls	.L323
+.LVL570:
 	.loc 1 51 0
 	mov	w20, 0
 	.loc 1 52 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.LVL594:
-.L333:
+.LVL571:
+.L323:
 	add	x19, x19, 1
-.LVL595:
+.LVL572:
 	add	w21, w21, w23
-	b	.L328
-.LVL596:
-.L330:
+	b	.L318
+.LVL573:
+.L320:
 	.loc 1 46 0
 	cmp	w23, 2
-	bne	.L332
+	bne	.L322
 	.loc 1 47 0
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L337
-.L332:
+	b	.L327
+.L322:
 	.loc 1 49 0
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L336
+	b	.L326
 	.cfi_endproc
 .LFE339:
 	.size	rknand_print_hex, .-rknand_print_hex
@@ -5155,17 +4995,17 @@ FlashReadPages:
 .LFB341:
 	.loc 1 85 0
 	.cfi_startproc
-.LVL597:
+.LVL574:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
 	.loc 1 87 0
 	adrp	x2, .LANCHOR0
-.LVL598:
+.LVL575:
 	add	x3, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 5, 32
-.LVL599:
+.LVL576:
 	.loc 1 85 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -5173,13 +5013,13 @@ FlashReadPages:
 	.cfi_offset 25, -32
 	.loc 1 87 0
 	ldrh	w25, [x3, 12]
-.LVL600:
+.LVL577:
 	.loc 1 85 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	.loc 1 92 0
-	adrp	x21, .LANCHOR106
+	adrp	x21, .LANCHOR104
 	.loc 1 85 0
 	stp	x23, x24, [sp, 48]
 	.loc 1 92 0
@@ -5194,20 +5034,20 @@ FlashReadPages:
 	mov	x19, x0
 	mov	x23, x2
 	.loc 1 92 0
-	add	x21, x21, :lo12:.LANCHOR106
+	add	x21, x21, :lo12:.LANCHOR104
 	add	x22, x22, :lo12:.LC1
-.LVL601:
-.L339:
+.LVL578:
+.L329:
 	.loc 1 91 0 discriminator 1
 	cmp	x19, x24
-	bne	.L346
+	bne	.L336
 	.loc 1 112 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
-.LVL602:
+.LVL579:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5221,48 +5061,48 @@ FlashReadPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL603:
-.L346:
+.LVL580:
+.L336:
 	.cfi_restore_state
 	.loc 1 92 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L340
+	cbz	x0, .L330
 	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L341
-.L340:
+	cbnz	x0, .L331
+.L330:
 	.loc 1 92 0 discriminator 3
 	mov	w2, 92
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.LVL604:
-.L341:
+.LVL581:
+.L331:
 	.loc 1 93 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	.loc 1 94 0
-	adrp	x20, .LANCHOR107
-	add	x20, x20, :lo12:.LANCHOR107
+	adrp	x20, .LANCHOR105
+	add	x20, x20, :lo12:.LANCHOR105
 	.loc 1 93 0
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL605:
+.LVL582:
 	.loc 1 94 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x20, 24]
 	blr	x4
-.LVL606:
+.LVL583:
 	.loc 1 98 0
 	str	w0, [x19]
 	.loc 1 99 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL607:
+.LVL584:
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L343
+	bne	.L333
 	.loc 1 100 0
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x20, 24]
@@ -5272,32 +5112,32 @@ FlashReadPages:
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL608:
+.LVL585:
 	.loc 1 104 0
 	cmn	w0, #1
-	beq	.L344
+	beq	.L334
 	.loc 1 105 0 discriminator 1
 	ldr	x0, [x19, 16]
-.LVL609:
+.LVL586:
 	.loc 1 104 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L343
+	bne	.L333
 	.loc 1 105 0
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L343
+	bne	.L333
 	.loc 1 106 0
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L343
-.L344:
+	beq	.L333
+.L334:
 	.loc 1 108 0
 	mov	w0, -1
 	str	w0, [x19]
-.L343:
+.L333:
 	add	x19, x19, 32
-	b	.L339
+	b	.L329
 	.cfi_endproc
 .LFE341:
 	.size	FlashReadPages, .-FlashReadPages
@@ -5314,14 +5154,14 @@ FtlLoadFactoryBbt:
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
 	.loc 4 286 0
-	adrp	x2, .LANCHOR39
-	adrp	x0, .LANCHOR108
-	add	x1, x0, :lo12:.LANCHOR108
+	adrp	x2, .LANCHOR107
+	adrp	x0, .LANCHOR106
+	add	x1, x0, :lo12:.LANCHOR106
 	.loc 4 279 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 4 286 0
-	ldr	x2, [x2, #:lo12:.LANCHOR39]
+	ldr	x2, [x2, #:lo12:.LANCHOR107]
 	.loc 4 279 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
@@ -5350,12 +5190,12 @@ FtlLoadFactoryBbt:
 	.loc 4 286 0
 	str	x2, [x1, 8]
 	.loc 4 287 0
-	adrp	x2, .LANCHOR109
+	adrp	x2, .LANCHOR108
 	.loc 4 289 0
 	adrp	x23, .LANCHOR10
 	add	x20, x20, 12
 	.loc 4 287 0
-	ldr	x25, [x2, #:lo12:.LANCHOR109]
+	ldr	x25, [x2, #:lo12:.LANCHOR108]
 	.loc 4 289 0
 	add	x23, x23, :lo12:.LANCHOR10
 	mov	w21, 0
@@ -5363,20 +5203,20 @@ FtlLoadFactoryBbt:
 	mov	w27, -1
 	.loc 4 287 0
 	str	x25, [x1, 16]
-.LVL610:
-.L358:
+.LVL587:
+.L348:
 	.loc 4 289 0 discriminator 1
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L363
+	bcc	.L353
 	.loc 4 314 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL611:
+.LVL588:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL612:
+.LVL589:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
@@ -5394,13 +5234,13 @@ FtlLoadFactoryBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL613:
-.L363:
+.LVL590:
+.L353:
 	.cfi_restore_state
 	.loc 4 291 0
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
 	.loc 4 293 0
-	add	x24, x22, :lo12:.LANCHOR108
+	add	x24, x22, :lo12:.LANCHOR106
 	.loc 4 290 0
 	strh	w27, [x20]
 	.loc 4 301 0
@@ -5408,19 +5248,19 @@ FtlLoadFactoryBbt:
 	.loc 4 291 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL614:
-.L359:
+.LVL591:
+.L349:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L361
+	bgt	.L351
 	.loc 4 292 0 is_stmt 1
 	madd	w0, w0, w21, w19
 	.loc 4 294 0
 	mov	w2, 1
 	str	w3, [x29, 108]
-.LVL615:
+.LVL592:
 	mov	w1, w2
 	.loc 4 292 0
 	lsl	w0, w0, 10
@@ -5429,31 +5269,31 @@ FtlLoadFactoryBbt:
 	.loc 4 294 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL616:
+.LVL593:
 	.loc 4 295 0
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L360
+	beq	.L350
 	.loc 4 301 0
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L360
+	bne	.L350
 	.loc 4 303 0
 	strh	w19, [x20]
-.L361:
+.L351:
 	.loc 4 289 0 discriminator 2
 	add	w21, w21, 1
-.LVL617:
+.LVL594:
 	add	x20, x20, 2
-	b	.L358
-.L360:
+	b	.L348
+.L350:
 	.loc 4 291 0 discriminator 2
 	sub	w19, w19, #1
-.LVL618:
+.LVL595:
 	and	w19, w19, 65535
-.LVL619:
-	b	.L359
+.LVL596:
+	b	.L349
 	.cfi_endproc
 .LFE230:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -5465,7 +5305,7 @@ FtlGetLastWrittenPage:
 .LFB236:
 	.loc 2 47 0
 	.cfi_startproc
-.LVL620:
+.LVL597:
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
 	.cfi_offset 29, -160
@@ -5486,16 +5326,16 @@ FtlGetLastWrittenPage:
 	.cfi_offset 21, -128
 	.cfi_offset 22, -120
 	.loc 2 51 0
-	bne	.L369
+	bne	.L359
 	.loc 2 51 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR20
-.LVL621:
+.LVL598:
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L370:
-.LVL622:
+.L360:
+.LVL599:
 	.loc 2 56 0 is_stmt 1 discriminator 4
 	sub	w19, w19, #1
-.LVL623:
+.LVL600:
 	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
 	.loc 2 56 0 discriminator 4
@@ -5508,7 +5348,7 @@ FtlGetLastWrittenPage:
 	str	x1, [x29, 72]
 	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL624:
+.LVL601:
 	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
 	.loc 2 57 0 discriminator 4
@@ -5517,33 +5357,33 @@ FtlGetLastWrittenPage:
 	mov	w2, w23
 	.loc 2 54 0 discriminator 4
 	str	x1, [x29, 80]
-.LVL625:
+.LVL602:
 	.loc 2 58 0 discriminator 4
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL626:
+.LVL603:
 	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L371
+	bne	.L361
 	mov	w22, 0
 	.loc 2 61 0
 	mov	w24, 2
-.LVL627:
-.L372:
+.LVL604:
+.L362:
 	.loc 2 60 0
 	cmp	w22, w19
-	ble	.L375
-.LVL628:
-.L371:
+	ble	.L365
+.LVL605:
+.L361:
 	.loc 2 73 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL629:
+.LVL606:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL630:
+.LVL607:
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5556,16 +5396,16 @@ FtlGetLastWrittenPage:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL631:
-.L369:
+.LVL608:
+.L359:
 	.cfi_restore_state
 	.loc 2 51 0 discriminator 2
 	adrp	x1, .LANCHOR19
-.LVL632:
+.LVL609:
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L370
-.LVL633:
-.L375:
+	b	.L360
+.LVL610:
+.L365:
 	.loc 2 61 0
 	add	w20, w22, w19
 	.loc 2 63 0
@@ -5573,7 +5413,7 @@ FtlGetLastWrittenPage:
 	mov	w1, 1
 	.loc 2 61 0
 	sdiv	w20, w20, w24
-.LVL634:
+.LVL611:
 	.loc 2 62 0
 	sxth	w0, w20
 	orr	w0, w0, w21
@@ -5581,28 +5421,28 @@ FtlGetLastWrittenPage:
 	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL635:
+.LVL612:
 	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L373
+	bne	.L363
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L373
+	bne	.L363
 	.loc 2 66 0 is_stmt 1
 	sub	w19, w20, #1
-.LVL636:
+.LVL613:
 	sxth	w19, w19
-.LVL637:
-	b	.L372
-.L373:
+.LVL614:
+	b	.L362
+.L363:
 	.loc 2 68 0
 	add	w20, w20, 1
-.LVL638:
+.LVL615:
 	sxth	w22, w20
-.LVL639:
-	b	.L372
+.LVL616:
+	b	.L362
 	.cfi_endproc
 .LFE236:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -5614,13 +5454,13 @@ FlashProgPages:
 .LFB342:
 	.loc 1 115 0
 	.cfi_startproc
-.LVL640:
+.LVL617:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
 	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL641:
+.LVL618:
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
@@ -5630,9 +5470,9 @@ FlashProgPages:
 	mov	w26, w3
 	.loc 1 117 0
 	adrp	x2, .LANCHOR0
-.LVL642:
+.LVL619:
 	add	x3, x2, :lo12:.LANCHOR0
-.LVL643:
+.LVL620:
 	.loc 1 115 0
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
@@ -5646,41 +5486,41 @@ FlashProgPages:
 	mov	x19, x0
 	.loc 1 117 0
 	ldrh	w27, [x3, 12]
-.LVL644:
+.LVL621:
 	.cfi_offset 21, -112
 	.cfi_offset 22, -104
 	.loc 1 122 0
-	adrp	x21, .LANCHOR110
+	adrp	x21, .LANCHOR109
 	.loc 1 115 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -96
 	.cfi_offset 24, -88
 	.loc 1 124 0
-	adrp	x22, .LANCHOR107
+	adrp	x22, .LANCHOR105
 	add	x24, x0, x1
 	mov	x23, x2
 	.loc 1 122 0
-	add	x21, x21, :lo12:.LANCHOR110
+	add	x21, x21, :lo12:.LANCHOR109
 	.loc 1 133 0
-	add	x28, x22, :lo12:.LANCHOR107
-.LVL645:
-.L378:
+	add	x28, x22, :lo12:.LANCHOR105
+.LVL622:
+.L368:
 	.loc 1 121 0 discriminator 1
 	cmp	x19, x24
-	bne	.L386
+	bne	.L376
 	.loc 1 142 0
-	cbnz	w26, .L387
-.LVL646:
-.L405:
+	cbnz	w26, .L377
+.LVL623:
+.L395:
 	.loc 1 172 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL647:
+.LVL624:
 	ldp	x27, x28, [sp, 80]
-.LVL648:
+.LVL625:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5697,49 +5537,49 @@ FlashProgPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL649:
-.L386:
+.LVL626:
+.L376:
 	.cfi_restore_state
 	.loc 1 122 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L379
+	cbz	x0, .L369
 	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L380
-.L379:
+	cbnz	x0, .L370
+.L369:
 	.loc 1 122 0 discriminator 3
 	adrp	x0, .LC1
 	mov	w2, 122
 	mov	x1, x21
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL650:
-.L380:
+.LVL627:
+.L370:
 	.loc 1 123 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
-.LVL651:
+.LVL628:
 	.loc 1 124 0
-	add	x0, x22, :lo12:.LANCHOR107
+	add	x0, x22, :lo12:.LANCHOR105
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x0, 16]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL652:
+.LVL629:
 	.loc 1 129 0
-	cbnz	w0, .L381
+	cbnz	w0, .L371
 	.loc 1 128 0
 	str	wzr, [x19]
-.LVL653:
-.L382:
+.LVL630:
+.L372:
 	.loc 1 132 0
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L384
+	bne	.L374
 	.loc 1 133 0
 	ldrb	w0, [x29, 104]
 	ldr	x4, [x28, 16]
@@ -5749,26 +5589,26 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-.LVL654:
+.LVL631:
 	.loc 1 137 0
-	cbz	w0, .L384
+	cbz	w0, .L374
 	.loc 1 138 0
 	mov	w0, -1
-.LVL655:
+.LVL632:
 	str	w0, [x19]
-.L384:
+.L374:
 	add	x19, x19, 32
-	b	.L378
-.LVL656:
-.L381:
+	b	.L368
+.LVL633:
+.L371:
 	.loc 1 130 0
 	mov	w0, -1
-.LVL657:
+.LVL634:
 	str	w0, [x19]
-	b	.L382
-.LVL658:
-.L391:
-.LBB219:
+	b	.L372
+.LVL635:
+.L381:
+.LBB231:
 	.loc 1 147 0
 	str	wzr, [x22]
 	.loc 1 153 0
@@ -5785,76 +5625,76 @@ FlashProgPages:
 	.loc 1 153 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL659:
+.LVL636:
 	.loc 1 154 0
 	ldr	w26, [x29, 112]
 	cmn	w26, #1
-	bne	.L388
+	bne	.L378
 	.loc 1 155 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.LVL660:
+.LVL637:
 	.loc 1 156 0
 	str	w26, [x20]
-.L388:
+.L378:
 	.loc 1 158 0
 	ldr	x0, [x20, 16]
-	cbz	x0, .L389
+	cbz	x0, .L379
 	.loc 1 159 0
-	ldr	w3, [x23, #:lo12:.LANCHOR111]
+	ldr	w3, [x23, #:lo12:.LANCHOR110]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L389
+	beq	.L379
 	.loc 1 160 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.LVL661:
+.LVL638:
 	.loc 1 161 0
 	mov	w0, -1
 	str	w0, [x20]
-.L389:
+.L379:
 	.loc 1 164 0
 	ldr	x0, [x20, 8]
-	cbz	x0, .L390
+	cbz	x0, .L380
 	.loc 1 165 0
 	ldr	w3, [x21, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L390
+	beq	.L380
 	.loc 1 166 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.LVL662:
+.LVL639:
 	.loc 1 167 0
 	mov	w0, -1
 	str	w0, [x20]
-.L390:
+.L380:
 	add	x20, x20, 32
-.L406:
-.LBE219:
+.L396:
+.LBE231:
 	.loc 1 144 0 discriminator 1
 	cmp	x20, x19
-	bne	.L391
-	b	.L405
-.LVL663:
-.L387:
-.LBB220:
+	bne	.L381
+	b	.L395
+.LVL640:
+.L377:
+.LBB232:
 	.loc 1 147 0 discriminator 1
 	adrp	x21, check_buf
 	.loc 1 148 0 discriminator 1
-	adrp	x23, .LANCHOR111
+	adrp	x23, .LANCHOR110
 	.loc 1 147 0 discriminator 1
 	add	x22, x21, :lo12:check_buf
 	.loc 1 148 0 discriminator 1
-	add	x24, x23, :lo12:.LANCHOR111
-	b	.L406
-.LBE220:
+	add	x24, x23, :lo12:.LANCHOR110
+	b	.L396
+.LBE232:
 	.cfi_endproc
 .LFE342:
 	.size	FlashProgPages, .-FlashProgPages
@@ -5866,17 +5706,17 @@ FlashEraseBlocks:
 .LFB343:
 	.loc 1 175 0
 	.cfi_startproc
-.LVL664:
+.LVL641:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
 	.loc 1 178 0
 	adrp	x1, .LANCHOR0
-.LVL665:
+.LVL642:
 	add	x3, x1, :lo12:.LANCHOR0
 	ubfiz	x2, x2, 5, 32
-.LVL666:
+.LVL643:
 	.loc 1 175 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -5886,7 +5726,7 @@ FlashEraseBlocks:
 	.cfi_offset 24, -24
 	.loc 1 178 0
 	ldrh	w23, [x3, 12]
-.LVL667:
+.LVL644:
 	.loc 1 175 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
@@ -5897,21 +5737,21 @@ FlashEraseBlocks:
 	.cfi_offset 22, -40
 	mov	x20, x1
 	.loc 1 183 0
-	adrp	x21, .LANCHOR107
+	adrp	x21, .LANCHOR105
 	add	x22, x0, x2
 	.loc 1 188 0
-	add	x24, x21, :lo12:.LANCHOR107
-.LVL668:
-.L409:
+	add	x24, x21, :lo12:.LANCHOR105
+.LVL645:
+.L399:
 	.loc 1 181 0 discriminator 1
 	cmp	x19, x22
-	bne	.L415
+	bne	.L405
 	.loc 1 194 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL669:
+.LVL646:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5924,56 +5764,56 @@ FlashEraseBlocks:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL670:
-.L415:
+.LVL647:
+.L405:
 	.cfi_restore_state
 	.loc 1 182 0
 	ldr	w0, [x19]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL671:
+.LVL648:
 	.loc 1 183 0
-	add	x0, x21, :lo12:.LANCHOR107
+	add	x0, x21, :lo12:.LANCHOR105
 	ldr	w1, [x29, 76]
 	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
 	blr	x2
-.LVL672:
+.LVL649:
 	.loc 1 185 0
-	cbnz	w0, .L410
+	cbnz	w0, .L400
 	.loc 1 184 0
 	str	wzr, [x19, -4]
-.LVL673:
-.L411:
+.LVL650:
+.L401:
 	.loc 1 187 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L413
+	bne	.L403
 	.loc 1 188 0
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x24, 8]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL674:
+.LVL651:
 	.loc 1 189 0
-	cbz	w0, .L413
+	cbz	w0, .L403
 	.loc 1 190 0
 	mov	w0, -1
-.LVL675:
+.LVL652:
 	str	w0, [x19, -4]
-.L413:
+.L403:
 	add	x19, x19, 32
-	b	.L409
-.LVL676:
-.L410:
+	b	.L399
+.LVL653:
+.L400:
 	.loc 1 186 0
 	mov	w0, -1
-.LVL677:
+.LVL654:
 	str	w0, [x19, -4]
-	b	.L411
+	b	.L401
 	.cfi_endproc
 .LFE343:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
@@ -5985,94 +5825,100 @@ FtlFreeSysBlkQueueIn:
 .LFB240:
 	.loc 2 98 0
 	.cfi_startproc
-.LVL678:
+.LVL655:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	and	w20, w0, 65535
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	and	w21, w0, 65535
-.LBB221:
-.LBB222:
+	.loc 2 99 0
+	sub	w2, w20, #1
+	mov	w0, 65533
+.LVL656:
+	cmp	w0, w2, uxth
+	bcc	.L410
+.LBB241:
+.LBB242:
 	.loc 2 94 0
 	adrp	x0, .LANCHOR38
-.LVL679:
 	add	x2, x0, :lo12:.LANCHOR38
-.LBE222:
-.LBE221:
-	.loc 2 98 0
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -32
-	.cfi_offset 20, -24
-	.loc 2 99 0
+	mov	x19, x0
+.LBE242:
+.LBE241:
+	.loc 2 101 0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L420
+	beq	.L410
 	and	w1, w1, 65535
-	mov	x19, x0
-.LVL680:
-.LBB223:
-	.loc 2 101 0
-	cbz	w1, .L422
-.LBB224:
-	.loc 2 102 0
-	mov	w0, w21
-	bl	P2V_block_in_plane
-.LVL681:
-	and	w20, w0, 65535
-.LVL682:
+.LVL657:
+.LBB243:
+.LBB244:
 	.loc 2 103 0
-	adrp	x0, .LANCHOR112
-.LVL683:
-	lsl	w1, w21, 10
+	cbz	w1, .L412
+.LBB245:
 	.loc 2 104 0
+	mov	w0, w20
+	bl	P2V_block_in_plane
+.LVL658:
+	and	w21, w0, 65535
+.LVL659:
+	.loc 2 105 0
+	adrp	x0, .LANCHOR111
+.LVL660:
+	lsl	w1, w20, 10
+	.loc 2 106 0
 	mov	w2, 1
-	.loc 2 103 0
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	.loc 2 105 0
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	str	w1, [x0, 4]
-	.loc 2 104 0
+	.loc 2 106 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL684:
-	.loc 2 105 0
-	adrp	x1, .LANCHOR40
-	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR40]
+.LVL661:
+	.loc 2 107 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x21, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 106 0
-	adrp	x1, .LANCHOR76
-	ldr	w0, [x1, #:lo12:.LANCHOR76]
-	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR76]
-.LVL685:
-.L422:
-.LBE224:
 	.loc 2 108 0
+	adrp	x1, .LANCHOR75
+	ldr	w0, [x1, #:lo12:.LANCHOR75]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR75]
+.LVL662:
+.L412:
+.LBE245:
+	.loc 2 110 0
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
-	.loc 2 109 0
+	.loc 2 111 0
 	ldrh	w1, [x0, 4]
 	add	x2, x0, x1, sxtw 1
-	.loc 2 110 0
+	.loc 2 112 0
 	add	w1, w1, 1
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
-	.loc 2 109 0
-	strh	w21, [x2, 8]
-.LVL686:
-.L420:
-.LBE223:
-	.loc 2 113 0
+	.loc 2 111 0
+	strh	w20, [x2, 8]
+.LVL663:
+.L410:
+.LBE244:
+.LBE243:
+	.loc 2 115 0
 	ldp	x19, x20, [sp, 16]
+.LVL664:
 	ldr	x21, [sp, 32]
-.LVL687:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -6092,7 +5938,7 @@ FtlLowFormatEraseBlock:
 .LFB209:
 	.loc 3 528 0
 	.cfi_startproc
-.LVL688:
+.LVL665:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
@@ -6110,20 +5956,20 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 24, -88
 	and	w24, w0, 65535
 	.loc 3 538 0
-	adrp	x0, .LANCHOR113
-.LVL689:
+	adrp	x0, .LANCHOR112
+.LVL666:
 	.loc 3 528 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w23, w1, 255
 	.loc 3 538 0
-	str	w24, [x0, #:lo12:.LANCHOR113]
-.LVL690:
+	str	w24, [x0, #:lo12:.LANCHOR112]
+.LVL667:
 	.loc 3 551 0
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR114
 	.loc 3 550 0
-	adrp	x1, .LANCHOR114
-.LVL691:
+	adrp	x1, .LANCHOR113
+.LVL668:
 	.cfi_offset 19, -128
 	.cfi_offset 20, -120
 	.cfi_offset 21, -112
@@ -6131,18 +5977,18 @@ FtlLowFormatEraseBlock:
 	.loc 3 539 0
 	adrp	x20, .LANCHOR3
 	.loc 3 540 0
-	adrp	x21, .LANCHOR112
+	adrp	x21, .LANCHOR111
 	.loc 3 551 0
-	ldr	x11, [x0, #:lo12:.LANCHOR115]
+	ldr	x11, [x0, #:lo12:.LANCHOR114]
 	adrp	x0, .LANCHOR24
 	.loc 3 539 0
 	ldrh	w8, [x20, #:lo12:.LANCHOR3]
 	.loc 3 540 0
-	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	ldr	x6, [x21, #:lo12:.LANCHOR111]
 	.loc 3 536 0
 	mov	w22, 0
 	.loc 3 550 0
-	ldr	x10, [x1, #:lo12:.LANCHOR114]
+	ldr	x10, [x1, #:lo12:.LANCHOR113]
 	.loc 3 537 0
 	mov	w19, 0
 	.loc 3 551 0
@@ -6155,59 +6001,59 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 27, -64
 	.cfi_offset 28, -56
 	stp	x0, x1, [x29, 120]
-.LVL692:
-.L431:
+.LVL669:
+.L421:
 	.loc 3 539 0 discriminator 1
 	cmp	w8, w5, uxth
-	bhi	.L435
+	bhi	.L425
 	.loc 3 559 0
-	cbz	w22, .L430
+	cbz	w22, .L420
 	.loc 3 562 0
 	mov	w2, w22
 	ubfiz	x22, x22, 5, 16
-.LVL693:
+.LVL670:
 	mov	x25, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.LVL694:
-.L439:
+.LVL671:
+.L429:
 	.loc 3 564 0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L438
+	bne	.L428
 	.loc 3 566 0
 	ldr	w0, [x1, 4]
 	.loc 3 565 0
 	add	w19, w19, 1
-.LVL695:
+.LVL672:
 	and	w19, w19, 65535
-.LVL696:
+.LVL673:
 	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL697:
-.L438:
+.LVL674:
+.L428:
 	add	x25, x25, 32
 	.loc 3 563 0 discriminator 2
 	cmp	x25, x22
-	bne	.L439
+	bne	.L429
 	.loc 3 571 0
-	cbz	w23, .L452
-.LVL698:
+	cbz	w23, .L442
+.LVL675:
 	.loc 3 573 0
 	adrp	x0, .LANCHOR20
 	.loc 3 572 0
 	mov	w25, 1
 	.loc 3 573 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-.LVL699:
+.LVL676:
 	.loc 3 574 0
 	lsr	w28, w26, 2
-.LVL700:
-.L440:
+.LVL677:
+.L430:
 	.loc 3 578 0
 	add	x0, x20, :lo12:.LANCHOR3
 	.loc 3 580 0
@@ -6218,113 +6064,113 @@ FtlLowFormatEraseBlock:
 	.loc 3 580 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 112]
-.LVL701:
-.L448:
+.LVL678:
+.L438:
 	.loc 3 578 0
 	ldr	x0, [x29, 136]
 	mov	x5, 0
 	.loc 3 579 0
-	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	ldr	x6, [x21, #:lo12:.LANCHOR111]
 	.loc 3 577 0
 	mov	w20, 0
 	.loc 3 578 0
 	ldrh	w7, [x0]
 	.loc 3 587 0
-	adrp	x0, .LANCHOR116
-	ldr	x8, [x0, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR115
+	ldr	x8, [x0, #:lo12:.LANCHOR115]
 	.loc 3 588 0
 	ldr	x0, [x29, 128]
-	ldr	x10, [x0, #:lo12:.LANCHOR114]
+	ldr	x10, [x0, #:lo12:.LANCHOR113]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.LVL702:
-.L441:
+.LVL679:
+.L431:
 	.loc 3 578 0 discriminator 1
 	cmp	w7, w5, uxth
-	bhi	.L444
+	bhi	.L434
 	.loc 3 593 0
-	cbz	w20, .L430
+	cbz	w20, .L420
 	.loc 3 596 0
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w25
 	mov	x0, x6
 	bl	FlashProgPages
-.LVL703:
+.LVL680:
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.LVL704:
-.L447:
+.LVL681:
+.L437:
 	.loc 3 598 0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L446
+	cbz	w0, .L436
 	.loc 3 600 0
 	ldr	w0, [x3, 4]
 	.loc 3 599 0
 	add	w19, w19, 1
-.LVL705:
+.LVL682:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL706:
+.LVL683:
 	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL707:
+.LVL684:
 	ldr	x1, [x29, 104]
-.L446:
+.L436:
 	add	x27, x27, 32
 	.loc 3 597 0 discriminator 2
 	cmp	x1, x27
-	bne	.L447
+	bne	.L437
 	.loc 3 604 0
 	add	w22, w22, w28
-.LVL708:
+.LVL685:
 	and	w22, w22, 65535
-.LVL709:
+.LVL686:
 	.loc 3 605 0
 	cmp	w26, w22
-	bhi	.L448
+	bhi	.L438
 	mov	x22, 0
-.LVL710:
-.L450:
+.LVL687:
+.L440:
 	.loc 3 611 0
-	cbz	w23, .L449
+	cbz	w23, .L439
 	.loc 3 611 0 is_stmt 0 discriminator 1
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L449
+	cbnz	w0, .L439
 	.loc 3 612 0 is_stmt 1
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL711:
-.L449:
+.LVL688:
+.L439:
 	add	x22, x22, 32
 	.loc 3 610 0 discriminator 2
 	cmp	x22, x27
-	bne	.L450
+	bne	.L440
 	.loc 3 615 0
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L430
+	beq	.L420
 	.loc 3 616 0
-	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	ldr	x0, [x21, #:lo12:.LANCHOR111]
 	mov	w2, w20
 	mov	w1, w25
 	bl	FlashEraseBlocks
-.LVL712:
-.L430:
+.LVL689:
+.L420:
 	.loc 3 619 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL713:
+.LVL690:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL714:
+.LVL691:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
@@ -6343,8 +6189,8 @@ FtlLowFormatEraseBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL715:
-.L435:
+.LVL692:
+.L425:
 	.cfi_restore_state
 	.loc 3 540 0
 	lsl	x0, x5, 5
@@ -6355,22 +6201,22 @@ FtlLowFormatEraseBlock:
 	.loc 3 541 0
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL716:
+.LVL693:
 	and	w13, w0, 65535
 	mov	w14, w13
-.LVL717:
+.LVL694:
 	.loc 3 543 0
-	cbz	w23, .L432
+	cbz	w23, .L422
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL718:
-	cbnz	w0, .L433
-.L432:
+.LVL695:
+	cbnz	w0, .L423
+.L422:
 	.loc 3 548 0
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-.LVL719:
-	cbnz	w0, .L434
+.LVL696:
+	cbnz	w0, .L424
 	.loc 3 549 0
 	ubfiz	x0, x22, 5, 16
 	.loc 3 551 0
@@ -6379,12 +6225,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 552 0
 	add	w22, w22, 1
-.LVL720:
+.LVL697:
 	and	w22, w22, 65535
-.LVL721:
+.LVL698:
 	.loc 3 549 0
 	lsl	w13, w13, 10
-.LVL722:
+.LVL699:
 	.loc 3 551 0
 	asr	w1, w1, 2
 	add	x1, x11, x1, sxtw 2
@@ -6392,30 +6238,30 @@ FtlLowFormatEraseBlock:
 	str	w13, [x0, 4]
 	.loc 3 551 0
 	stp	x10, x1, [x0, 8]
-.L433:
-.LVL723:
+.L423:
+.LVL700:
 	add	x5, x5, 1
-.LVL724:
-	b	.L431
-.LVL725:
-.L434:
+.LVL701:
+	b	.L421
+.LVL702:
+.L424:
 	.loc 3 554 0
 	add	w19, w19, 1
-.LVL726:
+.LVL703:
 	and	w19, w19, 65535
-.LVL727:
-	b	.L433
-.LVL728:
-.L452:
+.LVL704:
+	b	.L423
+.LVL705:
+.L442:
 	.loc 3 534 0
 	mov	w25, 0
 	.loc 3 533 0
 	mov	w28, 6
 	.loc 3 531 0
 	mov	w26, 1
-	b	.L440
-.LVL729:
-.L444:
+	b	.L430
+.LVL706:
+.L434:
 	.loc 3 579 0
 	lsl	x0, x5, 5
 	.loc 3 580 0
@@ -6426,22 +6272,22 @@ FtlLowFormatEraseBlock:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
-.LVL730:
+.LVL707:
 	and	w12, w0, 65535
 	mov	w13, w12
-.LVL731:
+.LVL708:
 	.loc 3 581 0
-	cbz	w23, .L442
+	cbz	w23, .L432
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL732:
-	cbnz	w0, .L443
-.L442:
+.LVL709:
+	cbnz	w0, .L433
+.L432:
 	.loc 3 585 0
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-.LVL733:
-	cbnz	w0, .L443
+.LVL710:
+	cbnz	w0, .L433
 	.loc 3 586 0
 	ubfiz	x0, x20, 5, 16
 	.loc 3 588 0
@@ -6450,12 +6296,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 589 0
 	add	w20, w20, 1
-.LVL734:
+.LVL711:
 	and	w20, w20, 65535
-.LVL735:
+.LVL712:
 	.loc 3 586 0
 	add	w12, w22, w12, lsl 10
-.LVL736:
+.LVL713:
 	.loc 3 588 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
@@ -6463,14 +6309,284 @@ FtlLowFormatEraseBlock:
 	str	w12, [x0, 4]
 	.loc 3 588 0
 	stp	x8, x1, [x0, 8]
-.L443:
-.LVL737:
+.L433:
+.LVL714:
 	add	x5, x5, 1
-.LVL738:
-	b	.L441
+.LVL715:
+	b	.L431
 	.cfi_endproc
 .LFE209:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB243:
+	.loc 2 181 0
+	.cfi_startproc
+.LVL716:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+.LBB246:
+.LBB247:
+	.loc 2 89 0
+	adrp	x19, .LANCHOR38
+.LBE247:
+.LBE246:
+	.loc 2 181 0
+	stp	x21, x22, [sp, 32]
+.LBB250:
+.LBB248:
+	.loc 2 89 0
+	add	x19, x19, :lo12:.LANCHOR38
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+.LBE248:
+.LBE250:
+.LBB251:
+	.loc 2 195 0
+	adrp	x21, .LANCHOR75
+.LBE251:
+	.loc 2 181 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -16
+.LBB252:
+	.loc 2 195 0
+	add	x21, x21, :lo12:.LANCHOR75
+.LBE252:
+	.loc 2 203 0
+	adrp	x23, .LC83
+	add	x23, x23, :lo12:.LC83
+.LVL717:
+.L464:
+.LBB253:
+.LBB249:
+	.loc 2 89 0
+	ldrh	w1, [x19, 6]
+.LBE249:
+.LBE253:
+	.loc 2 186 0
+	cbz	w1, .L465
+	.loc 2 187 0
+	ldrh	w0, [x19, 2]
+	.loc 2 188 0
+	sub	w1, w1, #1
+	strh	w1, [x19, 6]
+	.loc 2 187 0
+	add	x2, x19, x0, sxtw 1
+	.loc 2 189 0
+	add	w0, w0, 1
+	and	w0, w0, 1023
+	strh	w0, [x19, 2]
+	.loc 2 187 0
+	ldrh	w20, [x2, 8]
+.LVL718:
+.LBB254:
+	.loc 2 191 0
+	mov	w0, w20
+	bl	P2V_block_in_plane
+.LVL719:
+	and	w22, w0, 65535
+.LVL720:
+	.loc 2 192 0
+	adrp	x0, .LANCHOR111
+.LVL721:
+	lsl	w1, w20, 10
+	.loc 2 193 0
+	mov	w2, 1
+	.loc 2 192 0
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	str	w1, [x0, 4]
+	.loc 2 193 0
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL722:
+	.loc 2 194 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x22, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	.loc 2 195 0
+	ldr	w0, [x21]
+.LBE254:
+	.loc 2 202 0
+	sub	w1, w20, #1
+.LBB255:
+	.loc 2 195 0
+	add	w0, w0, 1
+	str	w0, [x21]
+.LBE255:
+	.loc 2 202 0
+	mov	w0, 65533
+	cmp	w0, w1, uxth
+	bcc	.L466
+	.loc 2 208 0
+	mov	w0, w20
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+.LVL723:
+	ldp	x21, x22, [sp, 32]
+.LVL724:
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL725:
+.L465:
+	.cfi_restore_state
+	.loc 2 199 0
+	adrp	x0, .LC82
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC82
+	bl	printf
+.LVL726:
+.L468:
+	b	.L468
+.LVL727:
+.L466:
+	.loc 2 203 0
+	ldrh	w2, [x19, 6]
+	mov	w1, w20
+	mov	x0, x23
+	bl	printf
+.LVL728:
+	.loc 2 205 0
+	b	.L464
+	.cfi_endproc
+.LFE243:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_alloc_new_blk
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB255:
+	.loc 2 562 0
+	.cfi_startproc
+.LVL729:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+.LVL730:
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	.loc 2 566 0
+	ldrh	w1, [x0, 10]
+	mov	w20, 0
+	ldr	x0, [x0, 16]
+.LVL731:
+	.loc 2 562 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+.LVL732:
+.L472:
+	.loc 2 566 0 discriminator 1
+	cmp	w20, w1
+	beq	.L476
+	.loc 2 567 0
+	mov	x21, x0
+	ldrh	w2, [x0], 2
+	cbnz	w2, .L473
+	.loc 2 568 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL733:
+	and	w1, w0, 65535
+	strh	w0, [x21]
+	.loc 2 569 0
+	sub	w2, w1, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcs	.L474
+	.loc 2 570 0
+	adrp	x0, .LANCHOR38+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
+	bl	printf
+.LVL734:
+.L475:
+	b	.L475
+.L474:
+	.loc 2 576 0
+	ldr	w0, [x19, 48]
+	.loc 2 574 0
+	strh	wzr, [x19, 2]
+	.loc 2 576 0
+	add	w0, w0, 1
+	str	w0, [x19, 48]
+	.loc 2 577 0
+	ldrh	w0, [x19, 8]
+	.loc 2 575 0
+	strh	w20, [x19]
+	.loc 2 577 0
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+.L476:
+	.loc 2 581 0
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bhi	.L478
+.LVL735:
+.LBB258:
+.LBB259:
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC1
+	mov	w2, 581
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL736:
+.L478:
+.LBE259:
+.LBE258:
+	.loc 2 583 0
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL737:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL738:
+.L473:
+	.cfi_restore_state
+	.loc 2 566 0 discriminator 2
+	add	w20, w20, 1
+.LVL739:
+	and	w20, w20, 65535
+.LVL740:
+	b	.L472
+	.cfi_endproc
+.LFE255:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.ftl_memset,"ax",@progbits
 	.align	2
 	.global	ftl_memset
@@ -6479,11 +6595,11 @@ ftl_memset:
 .LFB346:
 	.loc 1 242 0
 	.cfi_startproc
-.LVL739:
+.LVL741:
 	.loc 1 243 0
 	uxtw	x2, w2
 	b	memset
-.LVL740:
+.LVL742:
 	.cfi_endproc
 .LFE346:
 	.size	ftl_memset, .-ftl_memset
@@ -6493,552 +6609,552 @@ ftl_memset:
 	.type	FtlMemInit, %function
 FtlMemInit:
 .LFB206:
-	.loc 3 279 0
+	.loc 3 280 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
 	.cfi_offset 30, -200
-	.loc 3 282 0
-	adrp	x0, .LANCHOR71
-	.loc 3 297 0
+	.loc 3 283 0
+	adrp	x0, .LANCHOR70
+	.loc 3 298 0
 	mov	w1, 65535
-	.loc 3 279 0
+	.loc 3 280 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 282 0
-	str	wzr, [x0, #:lo12:.LANCHOR71]
 	.loc 3 283 0
-	adrp	x0, .LANCHOR72
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR70]
+	.loc 3 284 0
+	adrp	x0, .LANCHOR71
+	.loc 3 280 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -192
 	.cfi_offset 20, -184
-	.loc 3 310 0
+	.loc 3 311 0
 	adrp	x19, .LANCHOR21
-	.loc 3 283 0
-	str	wzr, [x0, #:lo12:.LANCHOR72]
 	.loc 3 284 0
-	adrp	x0, .LANCHOR68
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR71]
+	.loc 3 285 0
+	adrp	x0, .LANCHOR67
+	.loc 3 280 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -176
 	.cfi_offset 22, -168
-	.loc 3 312 0
+	.loc 3 313 0
 	adrp	x22, .LANCHOR3
-	.loc 3 284 0
-	str	wzr, [x0, #:lo12:.LANCHOR68]
 	.loc 3 285 0
-	adrp	x0, .LANCHOR65
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR67]
+	.loc 3 286 0
+	adrp	x0, .LANCHOR64
+	.loc 3 280 0
 	stp	x23, x24, [sp, 48]
-	.loc 3 319 0
+	.loc 3 320 0
 	adrp	x21, .LANCHOR23
-	.loc 3 285 0
-	str	wzr, [x0, #:lo12:.LANCHOR65]
 	.loc 3 286 0
-	adrp	x0, .LANCHOR64
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR64]
+	.loc 3 287 0
+	adrp	x0, .LANCHOR63
+	.loc 3 280 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 23, -160
 	.cfi_offset 24, -152
 	.cfi_offset 25, -144
 	.cfi_offset 26, -136
-	.loc 3 330 0
-	adrp	x24, .LANCHOR109
-	.loc 3 286 0
-	str	wzr, [x0, #:lo12:.LANCHOR64]
+	.loc 3 331 0
+	adrp	x24, .LANCHOR108
 	.loc 3 287 0
-	adrp	x0, .LANCHOR66
-	.loc 3 279 0
+	str	wzr, [x0, #:lo12:.LANCHOR63]
+	.loc 3 288 0
+	adrp	x0, .LANCHOR65
+	.loc 3 280 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
-	.loc 3 331 0
-	adrp	x23, .LANCHOR115
-	.loc 3 287 0
-	str	wzr, [x0, #:lo12:.LANCHOR66]
-	.loc 3 288 0
-	adrp	x0, .LANCHOR67
-	.loc 3 349 0
-	adrp	x25, .LANCHOR43
-	.loc 3 351 0
-	adrp	x27, .LANCHOR129
+	.loc 3 332 0
+	adrp	x23, .LANCHOR114
 	.loc 3 288 0
-	str	wzr, [x0, #:lo12:.LANCHOR67]
+	str	wzr, [x0, #:lo12:.LANCHOR65]
 	.loc 3 289 0
-	adrp	x0, .LANCHOR63
+	adrp	x0, .LANCHOR66
+	.loc 3 350 0
+	adrp	x25, .LANCHOR42
 	.loc 3 352 0
-	adrp	x26, .LANCHOR130
+	adrp	x27, .LANCHOR129
 	.loc 3 289 0
-	str	wzr, [x0, #:lo12:.LANCHOR63]
+	str	wzr, [x0, #:lo12:.LANCHOR66]
 	.loc 3 290 0
-	adrp	x0, .LANCHOR73
-	str	wzr, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR62
+	.loc 3 353 0
+	adrp	x26, .LANCHOR130
+	.loc 3 290 0
+	str	wzr, [x0, #:lo12:.LANCHOR62]
 	.loc 3 291 0
-	adrp	x0, .LANCHOR74
-	str	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR72
+	str	wzr, [x0, #:lo12:.LANCHOR72]
 	.loc 3 292 0
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
+	.loc 3 293 0
+	adrp	x0, .LANCHOR75
+	str	wzr, [x0, #:lo12:.LANCHOR75]
+	.loc 3 294 0
 	adrp	x0, .LANCHOR76
 	str	wzr, [x0, #:lo12:.LANCHOR76]
-	.loc 3 293 0
+	.loc 3 295 0
 	adrp	x0, .LANCHOR77
 	str	wzr, [x0, #:lo12:.LANCHOR77]
-	.loc 3 294 0
-	adrp	x0, .LANCHOR78
-	str	wzr, [x0, #:lo12:.LANCHOR78]
-	.loc 3 295 0
+	.loc 3 296 0
 	adrp	x0, .LANCHOR117
 	str	wzr, [x0, #:lo12:.LANCHOR117]
-	.loc 3 296 0
-	adrp	x0, .LANCHOR89
-	str	wzr, [x0, #:lo12:.LANCHOR89]
 	.loc 3 297 0
+	adrp	x0, .LANCHOR87
+	str	wzr, [x0, #:lo12:.LANCHOR87]
+	.loc 3 298 0
 	adrp	x0, .LANCHOR118
 	str	w1, [x0, #:lo12:.LANCHOR118]
-	.loc 3 298 0
+	.loc 3 299 0
 	adrp	x0, .LANCHOR119
-	.loc 3 301 0
-	adrp	x1, .LANCHOR101
-	.loc 3 298 0
-	str	wzr, [x0, #:lo12:.LANCHOR119]
+	.loc 3 302 0
+	adrp	x1, .LANCHOR99
 	.loc 3 299 0
-	adrp	x0, .LANCHOR86
-	str	wzr, [x0, #:lo12:.LANCHOR86]
+	str	wzr, [x0, #:lo12:.LANCHOR119]
 	.loc 3 300 0
-	adrp	x0, .LANCHOR113
-	str	wzr, [x0, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR84
+	str	wzr, [x0, #:lo12:.LANCHOR84]
 	.loc 3 301 0
-	mov	w0, -1
-	strh	w0, [x1, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR112
+	str	wzr, [x0, #:lo12:.LANCHOR112]
 	.loc 3 302 0
-	adrp	x1, .LANCHOR102
-	strh	w0, [x1, #:lo12:.LANCHOR102]
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR99]
 	.loc 3 303 0
-	adrp	x0, .LANCHOR84
-	mov	w1, 32
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR100
+	strh	w0, [x1, #:lo12:.LANCHOR100]
 	.loc 3 304 0
-	adrp	x0, .LANCHOR85
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LANCHOR82
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	.loc 3 305 0
-	adrp	x0, .LANCHOR87
-	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR83
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR83]
 	.loc 3 306 0
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	.loc 3 307 0
+	adrp	x0, .LANCHOR101
+	strh	wzr, [x0, #:lo12:.LANCHOR101]
+	.loc 3 308 0
 	adrp	x0, .LANCHOR103
 	strh	wzr, [x0, #:lo12:.LANCHOR103]
-	.loc 3 307 0
-	adrp	x0, .LANCHOR105
-	strh	wzr, [x0, #:lo12:.LANCHOR105]
-	.loc 3 310 0
+	.loc 3 311 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL741:
-	adrp	x1, .LANCHOR98
-	str	x0, [x1, #:lo12:.LANCHOR98]
-	.loc 3 311 0
+.LVL743:
+	adrp	x1, .LANCHOR96
+	str	x0, [x1, #:lo12:.LANCHOR96]
+	.loc 3 312 0
 	mov	w0, 12
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL742:
-	.loc 3 312 0
+.LVL744:
+	.loc 3 313 0
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
-	.loc 3 311 0
-	adrp	x3, .LANCHOR100
-	str	x3, [x29, 104]
 	.loc 3 312 0
-	lsl	w20, w19, 5
-.LVL743:
+	adrp	x3, .LANCHOR98
+	str	x3, [x29, 104]
 	.loc 3 313 0
+	lsl	w20, w19, 5
+.LVL745:
+	.loc 3 314 0
 	lsl	w19, w19, 7
-	.loc 3 311 0
-	str	x0, [x3, #:lo12:.LANCHOR100]
-	.loc 3 313 0
+	.loc 3 312 0
+	str	x0, [x3, #:lo12:.LANCHOR98]
+	.loc 3 314 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL744:
+.LVL746:
 	adrp	x15, .LANCHOR120
 	str	x15, [x29, 112]
 	str	x0, [x15, #:lo12:.LANCHOR120]
-	.loc 3 314 0
+	.loc 3 315 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL745:
+.LVL747:
 	adrp	x11, .LANCHOR121
 	str	x11, [x29, 120]
 	str	x0, [x11, #:lo12:.LANCHOR121]
-	.loc 3 315 0
+	.loc 3 316 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL746:
+.LVL748:
 	adrp	x14, .LANCHOR122
 	str	x14, [x29, 128]
 	str	x0, [x14, #:lo12:.LANCHOR122]
-	.loc 3 316 0
+	.loc 3 317 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL747:
-	adrp	x13, .LANCHOR112
+.LVL749:
+	adrp	x13, .LANCHOR111
 	str	x13, [x29, 136]
-	str	x0, [x13, #:lo12:.LANCHOR112]
-	.loc 3 317 0
+	str	x0, [x13, #:lo12:.LANCHOR111]
+	.loc 3 318 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL748:
+.LVL750:
+	.loc 3 321 0
+	adrp	x20, .LANCHOR94
+.LVL751:
+	.loc 3 318 0
+	adrp	x12, .LANCHOR93
 	.loc 3 320 0
-	adrp	x20, .LANCHOR96
-.LVL749:
-	.loc 3 317 0
-	adrp	x12, .LANCHOR95
-	.loc 3 319 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-.LVL750:
-	.loc 3 317 0
+.LVL752:
+	.loc 3 318 0
 	str	x12, [x29, 144]
-	str	x0, [x12, #:lo12:.LANCHOR95]
-	.loc 3 320 0
+	str	x0, [x12, #:lo12:.LANCHOR93]
+	.loc 3 321 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
-	str	w0, [x20, #:lo12:.LANCHOR96]
-	.loc 3 321 0
+	str	w0, [x20, #:lo12:.LANCHOR94]
+	.loc 3 322 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL751:
-	adrp	x10, .LANCHOR39
+.LVL753:
+	adrp	x10, .LANCHOR107
 	str	x10, [x29, 152]
-	str	x0, [x10, #:lo12:.LANCHOR39]
-	.loc 3 322 0
+	str	x0, [x10, #:lo12:.LANCHOR107]
+	.loc 3 323 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL752:
+.LVL754:
 	adrp	x8, .LANCHOR123
 	str	x8, [x29, 160]
 	str	x0, [x8, #:lo12:.LANCHOR123]
-	.loc 3 323 0
+	.loc 3 324 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL753:
+.LVL755:
 	adrp	x7, .LANCHOR124
 	str	x7, [x29, 168]
 	str	x0, [x7, #:lo12:.LANCHOR124]
-	.loc 3 324 0
-	ldr	w0, [x20, #:lo12:.LANCHOR96]
+	.loc 3 325 0
+	ldr	w0, [x20, #:lo12:.LANCHOR94]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-.LVL754:
-	adrp	x6, .LANCHOR93
+.LVL756:
+	adrp	x6, .LANCHOR91
 	str	x6, [x29, 176]
-	str	x0, [x6, #:lo12:.LANCHOR93]
-	.loc 3 325 0
+	str	x0, [x6, #:lo12:.LANCHOR91]
+	.loc 3 326 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL755:
-	adrp	x5, .LANCHOR116
+.LVL757:
+	adrp	x5, .LANCHOR115
 	str	x5, [x29, 184]
-	str	x0, [x5, #:lo12:.LANCHOR116]
-	.loc 3 326 0
+	str	x0, [x5, #:lo12:.LANCHOR115]
+	.loc 3 327 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL756:
-	.loc 3 329 0
+.LVL758:
+	.loc 3 330 0
 	adrp	x19, .LANCHOR24
-.LVL757:
-	.loc 3 326 0
-	adrp	x4, .LANCHOR114
+.LVL759:
 	.loc 3 327 0
-	ldr	w2, [x20, #:lo12:.LANCHOR96]
-	.loc 3 326 0
-	str	x4, [x29, 192]
-	str	x0, [x4, #:lo12:.LANCHOR114]
+	adrp	x4, .LANCHOR113
+	.loc 3 328 0
+	ldr	w2, [x20, #:lo12:.LANCHOR94]
 	.loc 3 327 0
+	str	x4, [x29, 192]
+	str	x0, [x4, #:lo12:.LANCHOR113]
+	.loc 3 328 0
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
-.LVL758:
-	.loc 3 329 0
+.LVL760:
+	.loc 3 330 0
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
-	.loc 3 327 0
-	adrp	x1, .LANCHOR92
-	str	x0, [x1, #:lo12:.LANCHOR92]
-	.loc 3 329 0
+	.loc 3 328 0
+	adrp	x1, .LANCHOR90
+	str	x0, [x1, #:lo12:.LANCHOR90]
+	.loc 3 330 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR3]
-	.loc 3 332 0
-	adrp	x22, .LANCHOR94
-	.loc 3 329 0
-	mul	w28, w28, w0
-.LVL759:
+	.loc 3 333 0
+	adrp	x22, .LANCHOR92
 	.loc 3 330 0
+	mul	w28, w28, w0
+.LVL761:
+	.loc 3 331 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL760:
-	str	x0, [x24, #:lo12:.LANCHOR109]
-	.loc 3 331 0
+.LVL762:
+	str	x0, [x24, #:lo12:.LANCHOR108]
+	.loc 3 332 0
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-.LVL761:
-	str	x0, [x23, #:lo12:.LANCHOR115]
-	.loc 3 332 0
+.LVL763:
+	str	x0, [x23, #:lo12:.LANCHOR114]
+	.loc 3 333 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
-	.loc 3 335 0
+	.loc 3 336 0
 	adrp	x28, .LANCHOR125
-.LVL762:
-	.loc 3 332 0
-	ldr	w0, [x20, #:lo12:.LANCHOR96]
-	.loc 3 335 0
+.LVL764:
+	.loc 3 333 0
+	ldr	w0, [x20, #:lo12:.LANCHOR94]
+	.loc 3 336 0
 	adrp	x20, .LANCHOR6
-	.loc 3 332 0
+	.loc 3 333 0
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL763:
-	str	x0, [x22, #:lo12:.LANCHOR94]
-	.loc 3 335 0
+.LVL765:
+	str	x0, [x22, #:lo12:.LANCHOR92]
+	.loc 3 336 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 336 0
+	.loc 3 337 0
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL764:
+.LVL766:
 	adrp	x1, .LANCHOR126
 	str	x0, [x1, #:lo12:.LANCHOR126]
-	.loc 3 337 0
+	.loc 3 338 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR125]
 	add	x0, x0, 547
 	lsr	x0, x0, 9
 	strh	w0, [x28, #:lo12:.LANCHOR125]
-	.loc 3 338 0
+	.loc 3 339 0
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL765:
+.LVL767:
 	adrp	x1, .LANCHOR127
-	.loc 3 345 0
+	.loc 3 346 0
 	ldrh	w28, [x20, #:lo12:.LANCHOR6]
-	.loc 3 338 0
-	str	x0, [x1, #:lo12:.LANCHOR127]
 	.loc 3 339 0
-	adrp	x1, .LANCHOR40
-	.loc 3 345 0
+	str	x0, [x1, #:lo12:.LANCHOR127]
+	.loc 3 340 0
+	adrp	x1, .LANCHOR43
+	.loc 3 346 0
 	lsl	w28, w28, 1
-	.loc 3 339 0
+	.loc 3 340 0
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR40]
-.LVL766:
-	.loc 3 347 0
+	str	x0, [x1, #:lo12:.LANCHOR43]
+.LVL768:
+	.loc 3 348 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL767:
+.LVL769:
 	adrp	x1, .LANCHOR128
 	str	x0, [x1, #:lo12:.LANCHOR128]
-	.loc 3 349 0
-	mov	w0, w28
 	.loc 3 350 0
+	mov	w0, w28
+	.loc 3 351 0
 	adrp	x28, .LANCHOR30
-.LVL768:
-	.loc 3 349 0
-	bl	ftl_malloc
-.LVL769:
-	str	x0, [x25, #:lo12:.LANCHOR43]
 .LVL770:
 	.loc 3 350 0
+	bl	ftl_malloc
+.LVL771:
+	str	x0, [x25, #:lo12:.LANCHOR42]
+.LVL772:
+	.loc 3 351 0
 	ldr	w1, [x28, #:lo12:.LANCHOR30]
 	lsl	w19, w1, 1
-	.loc 3 351 0
+	.loc 3 352 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL771:
+.LVL773:
 	str	x0, [x27, #:lo12:.LANCHOR129]
-	.loc 3 352 0
+	.loc 3 353 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL772:
+.LVL774:
 	str	x0, [x26, #:lo12:.LANCHOR130]
-	.loc 3 353 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR6]
 	.loc 3 354 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	.loc 3 355 0
 	adrp	x19, .LANCHOR27
-	.loc 3 353 0
+	.loc 3 354 0
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL773:
+.LVL775:
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
-	.loc 3 354 0
+	.loc 3 355 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL774:
+.LVL776:
 	adrp	x2, .LANCHOR36
 	str	x0, [x2, #:lo12:.LANCHOR36]
-	.loc 3 355 0
+	.loc 3 356 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL775:
+.LVL777:
 	adrp	x2, .LANCHOR131
 	str	x0, [x2, #:lo12:.LANCHOR131]
-	.loc 3 356 0
+	.loc 3 357 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
-	adrp	x19, .LANCHOR40
+	adrp	x19, .LANCHOR43
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL776:
+.LVL778:
 	adrp	x1, .LANCHOR132
 	str	x0, [x1, #:lo12:.LANCHOR132]
-	.loc 3 357 0
+	.loc 3 358 0
 	adrp	x1, .LANCHOR28
 	str	x1, [x29, 200]
 	ldrh	w0, [x1, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL777:
-	.loc 3 358 0
+.LVL779:
+	.loc 3 359 0
 	ldr	x1, [x29, 200]
-	.loc 3 357 0
+	.loc 3 358 0
 	adrp	x2, .LANCHOR133
 	str	x0, [x2, #:lo12:.LANCHOR133]
-	.loc 3 358 0
+	.loc 3 359 0
 	ldrh	w2, [x1, #:lo12:.LANCHOR28]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL778:
-	.loc 3 360 0
+.LVL780:
+	.loc 3 361 0
 	adrp	x0, .LANCHOR32
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
-	.loc 3 361 0
+	.loc 3 362 0
 	lsl	w0, w0, 2
-.LVL779:
+.LVL781:
 	bl	ftl_malloc
-.LVL780:
+.LVL782:
 	adrp	x1, .LANCHOR134
 	str	x0, [x1, #:lo12:.LANCHOR134]
-.LVL781:
-	.loc 3 362 0
+.LVL783:
+	.loc 3 363 0
 	ldr	w0, [x28, #:lo12:.LANCHOR30]
-	.loc 3 364 0
+	.loc 3 365 0
 	adrp	x28, .LANCHOR33
-	.loc 3 363 0
+	.loc 3 364 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL782:
+.LVL784:
 	adrp	x1, .LANCHOR135
 	str	x0, [x1, #:lo12:.LANCHOR135]
-.LVL783:
-	.loc 3 364 0
-	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+.LVL785:
 	.loc 3 365 0
+	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+	.loc 3 366 0
 	lsl	w0, w0, 4
-.LVL784:
-	bl	ftl_malloc
-.LVL785:
-	adrp	x1, .LANCHOR56
-	str	x0, [x1, #:lo12:.LANCHOR56]
 .LVL786:
-	.loc 3 366 0
+	bl	ftl_malloc
+.LVL787:
+	adrp	x1, .LANCHOR55
+	str	x0, [x1, #:lo12:.LANCHOR55]
+.LVL788:
+	.loc 3 367 0
 	ldrh	w1, [x28, #:lo12:.LANCHOR33]
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
-	.loc 3 371 0
+	.loc 3 372 0
 	adrp	x21, .LANCHOR10
-	.loc 3 367 0
+	.loc 3 368 0
 	mul	w0, w1, w0
-.LVL787:
+.LVL789:
 	bl	ftl_malloc
-.LVL788:
+.LVL790:
 	adrp	x1, .LANCHOR136
 	str	x0, [x1, #:lo12:.LANCHOR136]
-.LVL789:
-	.loc 3 369 0
+.LVL791:
+	.loc 3 370 0
 	mov	w0, 6
-	.loc 3 368 0
+	.loc 3 369 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR6]
-	.loc 3 370 0
+	.loc 3 371 0
 	adrp	x20, .LANCHOR137
-	.loc 3 369 0
+	.loc 3 370 0
 	mul	w0, w1, w0
-.LVL790:
+.LVL792:
 	bl	ftl_malloc
-.LVL791:
-	adrp	x1, .LANCHOR41
-	str	x0, [x1, #:lo12:.LANCHOR41]
-	.loc 3 370 0
-	adrp	x0, .LANCHOR17
+.LVL793:
+	adrp	x1, .LANCHOR40
+	str	x0, [x1, #:lo12:.LANCHOR40]
 	.loc 3 371 0
+	adrp	x0, .LANCHOR17
+	.loc 3 372 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR10]
-	.loc 3 370 0
+	.loc 3 371 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR17]
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x20, #:lo12:.LANCHOR137]
-.LVL792:
-	.loc 3 371 0
-	mul	w0, w1, w0
-.LVL793:
+.LVL794:
 	.loc 3 372 0
+	mul	w0, w1, w0
+.LVL795:
+	.loc 3 373 0
 	lsl	w0, w0, 2
-.LVL794:
+.LVL796:
 	bl	ftl_malloc
-.LVL795:
+.LVL797:
 	ldp	x3, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
-	.loc 3 374 0
+	.loc 3 375 0
 	ldrh	w20, [x20, #:lo12:.LANCHOR137]
-	.loc 3 372 0
+	.loc 3 373 0
 	add	x2, x1, :lo12:.LANCHOR37
 	ldp	x11, x14, [x29, 120]
-	.loc 3 373 0
+	.loc 3 374 0
 	mov	w30, w20
 	ldp	x13, x12, [x29, 136]
 	mov	x16, x3
 	ldp	x10, x8, [x29, 152]
-	.loc 3 372 0
+	.loc 3 373 0
 	str	x0, [x2, 32]
-.LVL796:
+.LVL798:
 	ldp	x7, x6, [x29, 168]
-	adrp	x17, .LANCHOR98
+	adrp	x17, .LANCHOR96
 	ldp	x5, x4, [x29, 184]
-	adrp	x3, .LANCHOR92
-	.loc 3 373 0
+	adrp	x3, .LANCHOR90
+	.loc 3 374 0
 	ldrh	w28, [x21, #:lo12:.LANCHOR10]
 	add	x21, x2, 40
 	mov	x0, 1
 	str	x19, [x29, 200]
-.LVL797:
-.L475:
-	.loc 3 373 0 is_stmt 0 discriminator 1
+.LVL799:
+.L482:
+	.loc 3 374 0 is_stmt 0 discriminator 1
 	cmp	w0, w28
-	bcc	.L476
+	bcc	.L483
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	.loc 3 379 0 is_stmt 1
+	.loc 3 380 0 is_stmt 1
 	add	x1, x1, :lo12:.LANCHOR37
-	.loc 3 373 0
+	.loc 3 374 0
 	mov	x19, 0
-.L477:
+.L484:
 	add	x19, x19, 1
-	.loc 3 377 0 discriminator 1
+	.loc 3 378 0 discriminator 1
 	cmp	x19, x2
-	bne	.L478
-	.loc 3 383 0
+	bne	.L485
+	.loc 3 384 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L479
-.L481:
-	.loc 3 385 0
+	cbnz	x0, .L486
+.L488:
+	.loc 3 386 0
 	adrp	x1, .LANCHOR138
-	adrp	x0, .LC82
+	adrp	x0, .LC85
 	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC82
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.LVL798:
-	.loc 3 386 0
+.LVL800:
+	.loc 3 387 0
 	mov	w0, -1
-.L474:
-	.loc 3 484 0
+.L481:
+	.loc 3 485 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7060,132 +7176,132 @@ FtlMemInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L476:
+.L483:
 	.cfi_restore_state
-	.loc 3 374 0 discriminator 3
+	.loc 3 375 0 discriminator 3
 	ldr	x19, [x2, 32]
-	.loc 3 373 0 discriminator 3
-	add	w0, w0, 1
 	.loc 3 374 0 discriminator 3
+	add	w0, w0, 1
+	.loc 3 375 0 discriminator 3
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
-	b	.L475
-.L478:
-	.loc 3 379 0 discriminator 2
+	b	.L482
+.L485:
+	.loc 3 380 0 discriminator 2
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
-	b	.L477
-.L479:
-	.loc 3 388 0
+	b	.L484
+.L486:
+	.loc 3 389 0
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L481
-	.loc 3 393 0
+	cbz	x0, .L488
+	.loc 3 394 0
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L481
-	.loc 3 398 0
+	cbz	x0, .L488
+	.loc 3 399 0
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L481
-	.loc 3 404 0
-	adrp	x0, .LANCHOR56
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	cbz	x0, .L481
-	.loc 3 409 0
+	cbz	x0, .L488
+	.loc 3 405 0
+	adrp	x0, .LANCHOR55
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
+	cbz	x0, .L488
+	.loc 3 410 0
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L481
-	.loc 3 414 0
-	adrp	x0, .LANCHOR41
-	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L481
-	.loc 3 419 0
+	cbz	x0, .L488
+	.loc 3 415 0
+	adrp	x0, .LANCHOR40
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	cbz	x0, .L488
+	.loc 3 420 0
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L481
-	.loc 3 425 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
-	cbz	x0, .L481
-	.loc 3 430 0
-	ldr	x0, [x17, #:lo12:.LANCHOR98]
-	cbz	x0, .L481
-	.loc 3 430 0 is_stmt 0 discriminator 1
-	ldr	x0, [x16, #:lo12:.LANCHOR100]
-	cbz	x0, .L481
-	.loc 3 435 0 is_stmt 1
+	cbz	x0, .L488
+	.loc 3 426 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
+	cbz	x0, .L488
+	.loc 3 431 0
+	ldr	x0, [x17, #:lo12:.LANCHOR96]
+	cbz	x0, .L488
+	.loc 3 431 0 is_stmt 0 discriminator 1
+	ldr	x0, [x16, #:lo12:.LANCHOR98]
+	cbz	x0, .L488
+	.loc 3 436 0 is_stmt 1
 	ldr	x0, [x15, #:lo12:.LANCHOR120]
-	cbz	x0, .L481
-	.loc 3 435 0 is_stmt 0 discriminator 1
+	cbz	x0, .L488
+	.loc 3 436 0 is_stmt 0 discriminator 1
 	ldr	x0, [x14, #:lo12:.LANCHOR122]
-	cbz	x0, .L481
-	.loc 3 435 0 discriminator 2
-	ldr	x0, [x13, #:lo12:.LANCHOR112]
-	cbz	x0, .L481
-	.loc 3 435 0 discriminator 3
-	ldr	x0, [x12, #:lo12:.LANCHOR95]
-	cbz	x0, .L481
-	.loc 3 435 0 discriminator 4
+	cbz	x0, .L488
+	.loc 3 436 0 discriminator 2
+	ldr	x0, [x13, #:lo12:.LANCHOR111]
+	cbz	x0, .L488
+	.loc 3 436 0 discriminator 3
+	ldr	x0, [x12, #:lo12:.LANCHOR93]
+	cbz	x0, .L488
+	.loc 3 436 0 discriminator 4
 	ldr	x0, [x11, #:lo12:.LANCHOR121]
-	cbz	x0, .L481
-	.loc 3 440 0 is_stmt 1
-	ldr	x0, [x10, #:lo12:.LANCHOR39]
-	cbz	x0, .L481
-	.loc 3 440 0 is_stmt 0 discriminator 1
-	ldr	x0, [x8, #:lo12:.LANCHOR123]
-	cbz	x0, .L481
-	.loc 3 440 0 discriminator 2
-	ldr	x0, [x7, #:lo12:.LANCHOR124]
-	cbz	x0, .L481
-	.loc 3 440 0 discriminator 3
-	ldr	x0, [x6, #:lo12:.LANCHOR93]
-	cbz	x0, .L481
+	cbz	x0, .L488
 	.loc 3 441 0 is_stmt 1
-	ldr	x0, [x5, #:lo12:.LANCHOR116]
-	cbz	x0, .L481
+	ldr	x0, [x10, #:lo12:.LANCHOR107]
+	cbz	x0, .L488
 	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	x0, [x4, #:lo12:.LANCHOR114]
-	cbz	x0, .L481
+	ldr	x0, [x8, #:lo12:.LANCHOR123]
+	cbz	x0, .L488
 	.loc 3 441 0 discriminator 2
-	ldr	x0, [x3, #:lo12:.LANCHOR92]
-	cbz	x0, .L481
-	.loc 3 446 0 is_stmt 1
-	ldr	x0, [x24, #:lo12:.LANCHOR109]
-	cbz	x0, .L481
-	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	cbz	x0, .L481
-	.loc 3 446 0 discriminator 2
-	ldr	x0, [x22, #:lo12:.LANCHOR94]
-	cbz	x0, .L481
-	.loc 3 452 0 is_stmt 1
+	ldr	x0, [x7, #:lo12:.LANCHOR124]
+	cbz	x0, .L488
+	.loc 3 441 0 discriminator 3
+	ldr	x0, [x6, #:lo12:.LANCHOR91]
+	cbz	x0, .L488
+	.loc 3 442 0 is_stmt 1
+	ldr	x0, [x5, #:lo12:.LANCHOR115]
+	cbz	x0, .L488
+	.loc 3 442 0 is_stmt 0 discriminator 1
+	ldr	x0, [x4, #:lo12:.LANCHOR113]
+	cbz	x0, .L488
+	.loc 3 442 0 discriminator 2
+	ldr	x0, [x3, #:lo12:.LANCHOR90]
+	cbz	x0, .L488
+	.loc 3 447 0 is_stmt 1
+	ldr	x0, [x24, #:lo12:.LANCHOR108]
+	cbz	x0, .L488
+	.loc 3 447 0 is_stmt 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR114]
+	cbz	x0, .L488
+	.loc 3 447 0 discriminator 2
+	ldr	x0, [x22, #:lo12:.LANCHOR92]
+	cbz	x0, .L488
+	.loc 3 453 0 is_stmt 1
 	ldr	x0, [x29, 200]
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L481
-	.loc 3 452 0 is_stmt 0 discriminator 1
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	cbz	x0, .L488
+	.loc 3 453 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L481
-	.loc 3 458 0 is_stmt 1
+	cbz	x0, .L488
+	.loc 3 459 0 is_stmt 1
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L481
-	.loc 3 464 0
+	cbz	x0, .L488
+	.loc 3 465 0
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L481
-	.loc 3 470 0
+	cbz	x0, .L488
+	.loc 3 471 0
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L481
-	.loc 3 476 0
+	cbz	x0, .L488
+	.loc 3 477 0
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L481
-	.loc 3 483 0
+	cbz	x0, .L488
+	.loc 3 484 0
 	mov	w0, 0
-	b	.L474
+	b	.L481
 	.cfi_endproc
 .LFE206:
 	.size	FtlMemInit, .-FtlMemInit
@@ -7197,7 +7313,7 @@ FtlBbt2Bitmap:
 .LFB225:
 	.loc 4 66 0
 	.cfi_startproc
-.LVL799:
+.LVL801:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -7210,7 +7326,7 @@ FtlBbt2Bitmap:
 	mov	x22, x0
 	.loc 4 69 0
 	adrp	x0, .LANCHOR137
-.LVL800:
+.LVL802:
 	.loc 4 66 0
 	stp	x23, x24, [sp, 48]
 	.loc 4 74 0
@@ -7236,27 +7352,27 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL801:
+.LVL803:
 	mov	x0, x20
 	bl	ftl_memset
-.LVL802:
-.L579:
+.LVL804:
+.L586:
 	.loc 4 72 0
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L576
+	beq	.L583
 	.loc 4 74 0
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L578
+	bhi	.L585
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL803:
-.L578:
+.LVL805:
+.L585:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
@@ -7271,13 +7387,13 @@ FtlBbt2Bitmap:
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
 	.loc 4 70 0 discriminator 2
-	bne	.L579
-.L576:
+	bne	.L586
+.L583:
 	.loc 4 77 0
 	ldp	x19, x20, [sp, 16]
-.LVL804:
+.LVL806:
 	ldp	x21, x22, [sp, 32]
-.LVL805:
+.LVL807:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	.cfi_restore 30
@@ -7316,7 +7432,7 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	mov	w1, 255
 	b	ftl_memset
-.LVL806:
+.LVL808:
 	.cfi_endproc
 .LFE227:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
@@ -7328,7 +7444,7 @@ FtlFreeSysBlkQueueInit:
 .LFB237:
 	.loc 2 76 0
 	.cfi_startproc
-.LVL807:
+.LVL809:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
@@ -7349,14 +7465,14 @@ FtlFreeSysBlkQueueInit:
 	strh	wzr, [x3, 2]
 	.loc 2 83 0
 	add	x0, x3, 8
-.LVL808:
+.LVL810:
 	.loc 2 80 0
 	strh	wzr, [x3, 4]
 	.loc 2 81 0
 	strh	wzr, [x3, 6]
 	.loc 2 83 0
 	bl	ftl_memset
-.LVL809:
+.LVL811:
 	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -7373,9 +7489,9 @@ FtlFreeSysBlkQueueInit:
 	.type	load_l2p_region, %function
 load_l2p_region:
 .LFB253:
-	.loc 2 442 0
+	.loc 2 488 0
 	.cfi_startproc
-.LVL810:
+.LVL812:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7385,9 +7501,9 @@ load_l2p_region:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
-	.loc 2 446 0
+	.loc 2 492 0
 	adrp	x23, .LANCHOR32
-	.loc 2 442 0
+	.loc 2 488 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
@@ -7399,55 +7515,55 @@ load_l2p_region:
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
-	.loc 2 446 0
+	.loc 2 492 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-.LVL811:
+.LVL813:
 	cmp	w0, w21
-	bcs	.L587
-	.loc 2 446 0 is_stmt 0 discriminator 1
+	bcs	.L594
+	.loc 2 492 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
-.LVL812:
+.LVL814:
 	adrp	x0, .LC1
-	mov	w2, 446
+	mov	w2, 492
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL813:
-.L587:
-	.loc 2 447 0 is_stmt 1
+.LVL815:
+.L594:
+	.loc 2 493 0 is_stmt 1
 	adrp	x26, .LANCHOR134
 	ubfiz	x0, x21, 2, 16
-	adrp	x22, .LANCHOR56
+	adrp	x22, .LANCHOR55
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	ldr	w24, [x1, x0]
-.LVL814:
-	.loc 2 449 0
-	cbnz	w24, .L588
-	.loc 2 450 0
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+.LVL816:
+	.loc 2 495 0
+	cbnz	w24, .L595
+	.loc 2 496 0
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-.LVL815:
+.LVL817:
 	adrp	x1, .LANCHOR23
 	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL816:
-	.loc 2 451 0
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+.LVL818:
+	.loc 2 497 0
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	strh	w21, [x0, x19]
-	.loc 2 452 0
+	.loc 2 498 0
 	str	wzr, [x1, 4]
-.L589:
-	.loc 2 473 0
+.L596:
+	.loc 2 519 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL817:
+.LVL819:
 	ldp	x23, x24, [sp, 48]
-.LVL818:
+.LVL820:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -7463,85 +7579,85 @@ load_l2p_region:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL819:
-.L588:
+.LVL821:
+.L595:
 	.cfi_restore_state
-	.loc 2 456 0
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	.loc 2 502 0
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	lsl	x19, x19, 4
-	.loc 2 455 0
-	adrp	x20, .LANCHOR108
-	add	x20, x20, :lo12:.LANCHOR108
-	.loc 2 456 0
+	.loc 2 501 0
+	adrp	x20, .LANCHOR106
+	add	x20, x20, :lo12:.LANCHOR106
+	.loc 2 502 0
 	add	x0, x0, x19
-	.loc 2 458 0
+	.loc 2 504 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 455 0
+	.loc 2 501 0
 	str	w24, [x20, 4]
-	.loc 2 456 0
+	.loc 2 502 0
 	ldr	x0, [x0, 8]
 	str	x0, [x20, 8]
-	.loc 2 457 0
-	adrp	x0, .LANCHOR109
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	.loc 2 503 0
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 458 0
+	.loc 2 504 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL820:
-	.loc 2 459 0
+.LVL822:
+	.loc 2 505 0
 	ldr	x25, [x20, 16]
-.LVL821:
-	.loc 2 461 0
+.LVL823:
+	.loc 2 507 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L590
-	.loc 2 462 0
+	beq	.L597
+	.loc 2 508 0
 	mov	w2, w24
 	mov	w1, w21
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.LVL822:
-	.loc 2 463 0
+.LVL824:
+	.loc 2 509 0
 	ldr	x1, [x20, 16]
 	mov	w3, 4
-	adrp	x0, .LC84
+	adrp	x0, .LC87
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC84
+	add	x0, x0, :lo12:.LC87
 	bl	rknand_print_hex
-.LVL823:
-	.loc 2 464 0
+.LVL825:
+	.loc 2 510 0
 	ldrh	w3, [x23, #:lo12:.LANCHOR32]
-	adrp	x0, .LC85
+	adrp	x0, .LC88
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC85
+	add	x0, x0, :lo12:.LC88
 	bl	rknand_print_hex
-.LVL824:
-.L590:
-	.loc 2 467 0
+.LVL826:
+.L597:
+	.loc 2 513 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L591
-	.loc 2 467 0 is_stmt 0 discriminator 1
+	beq	.L598
+	.loc 2 513 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
-	mov	w2, 467
+	mov	w2, 513
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL825:
-.L591:
-	.loc 2 470 0 is_stmt 1
-	ldr	x0, [x22, #:lo12:.LANCHOR56]
+.LVL827:
+.L598:
+	.loc 2 516 0 is_stmt 1
+	ldr	x0, [x22, #:lo12:.LANCHOR55]
 	add	x1, x0, x19
 	str	wzr, [x1, 4]
-	.loc 2 471 0
+	.loc 2 517 0
 	strh	w21, [x0, x19]
-	.loc 2 472 0
-	b	.L589
+	.loc 2 518 0
+	b	.L596
 	.cfi_endproc
 .LFE253:
 	.size	load_l2p_region, .-load_l2p_region
@@ -7551,81 +7667,81 @@ load_l2p_region:
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
 .LFB254:
-	.loc 2 476 0
+	.loc 2 522 0
 	.cfi_startproc
-.LVL826:
+.LVL828:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
-	.loc 2 485 0
+	.loc 2 531 0
 	mov	w1, 0
-	.loc 2 476 0
+	.loc 2 522 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 485 0
+	.loc 2 531 0
 	ldrh	w2, [x0, 10]
-	.loc 2 476 0
+	.loc 2 522 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 478 0
+	.loc 2 524 0
 	ldp	x21, x20, [x0, 32]
-	.loc 2 476 0
+	.loc 2 522 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
-	.loc 2 485 0
+	.loc 2 531 0
 	lsl	w2, w2, 1
-	.loc 2 477 0
+	.loc 2 523 0
 	ldr	x23, [x0, 16]
-.LVL827:
-	.loc 2 485 0
+.LVL829:
+	.loc 2 531 0
 	mov	x0, x21
-.LVL828:
+.LVL830:
 	bl	ftl_memset
-.LVL829:
-	.loc 2 486 0
+.LVL831:
+	.loc 2 532 0
 	mov	w0, 0
-.LVL830:
-.L594:
-	.loc 2 486 0 is_stmt 0 discriminator 1
+.LVL832:
+.L601:
+	.loc 2 532 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L598
-	.loc 2 494 0 is_stmt 1
+	bhi	.L605
+	.loc 2 540 0 is_stmt 1
 	ldrh	w26, [x21]
-.LVL831:
-	.loc 2 498 0
+.LVL833:
+	.loc 2 544 0
 	adrp	x24, .LANCHOR20
 	add	x24, x24, :lo12:.LANCHOR20
-	.loc 2 495 0
+	.loc 2 541 0
 	mov	w25, 0
-	.loc 2 497 0
+	.loc 2 543 0
 	mov	w20, 0
-.LVL832:
-.L599:
-	.loc 2 497 0 is_stmt 0 discriminator 1
+.LVL834:
+.L606:
+	.loc 2 543 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L603
-	.loc 2 513 0 is_stmt 1
+	bhi	.L610
+	.loc 2 559 0 is_stmt 1
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL833:
+.LVL835:
 	ldp	x21, x22, [sp, 32]
-.LVL834:
+.LVL836:
 	ldp	x23, x24, [sp, 48]
-.LVL835:
+.LVL837:
 	ldp	x25, x26, [sp, 64]
-.LVL836:
+.LVL838:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -7640,92 +7756,92 @@ ftl_free_no_use_map_blk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL837:
-.L598:
+.LVL839:
+.L605:
 	.cfi_restore_state
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
-	.loc 2 488 0
+	.loc 2 534 0
 	mov	w1, 0
-	.loc 2 487 0
+	.loc 2 533 0
 	ubfx	x2, x2, 10, 16
-.LVL838:
-.L595:
-	.loc 2 488 0 discriminator 1
+.LVL840:
+.L602:
+	.loc 2 534 0 discriminator 1
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L597
-	.loc 2 486 0 discriminator 2
+	bhi	.L604
+	.loc 2 532 0 discriminator 2
 	add	w0, w0, 1
-.LVL839:
+.LVL841:
 	and	w0, w0, 65535
-.LVL840:
-	b	.L594
-.L597:
-	.loc 2 489 0
+.LVL842:
+	b	.L601
+.L604:
+	.loc 2 535 0
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L596
-	.loc 2 490 0
+	bne	.L603
+	.loc 2 536 0
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L596:
-	.loc 2 488 0 discriminator 2
+.L603:
+	.loc 2 534 0 discriminator 2
 	add	w1, w1, 1
-.LVL841:
-	and	w1, w1, 65535
-.LVL842:
-	b	.L595
 .LVL843:
-.L603:
-	.loc 2 498 0
+	and	w1, w1, 65535
+.LVL844:
+	b	.L602
+.LVL845:
+.L610:
+	.loc 2 544 0
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L600
-	.loc 2 498 0 is_stmt 0 discriminator 1
+	bne	.L607
+	.loc 2 544 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L600
-	.loc 2 499 0 is_stmt 1
+	bcs	.L607
+	.loc 2 545 0 is_stmt 1
 	strh	w0, [x21, x22, lsl 1]
-.L600:
-	.loc 2 500 0
+.L607:
+	.loc 2 546 0
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L601
+	bls	.L608
 	mov	w25, w20
-.LVL844:
+.LVL846:
 	mov	w26, w0
-.LVL845:
-.L601:
-	.loc 2 504 0
-	cbnz	w0, .L602
-	.loc 2 504 0 is_stmt 0 discriminator 1
+.LVL847:
+.L608:
+	.loc 2 550 0
+	cbnz	w0, .L609
+	.loc 2 550 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L602
-	.loc 2 506 0 is_stmt 1
+	cbz	w0, .L609
+	.loc 2 552 0 is_stmt 1
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL846:
-	.loc 2 507 0
+.LVL848:
+	.loc 2 553 0
 	strh	wzr, [x23, x22]
-	.loc 2 508 0
+	.loc 2 554 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L602:
-	.loc 2 497 0 discriminator 2
+.L609:
+	.loc 2 543 0 discriminator 2
 	add	w20, w20, 1
-.LVL847:
+.LVL849:
 	and	w20, w20, 65535
-.LVL848:
-	b	.L599
+.LVL850:
+	b	.L606
 	.cfi_endproc
 .LFE254:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -7735,75 +7851,75 @@ ftl_free_no_use_map_blk:
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
 .LFB257:
-	.loc 2 583 0
+	.loc 2 632 0
 	.cfi_startproc
-.LVL849:
+.LVL851:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 591 0
+	.loc 2 640 0
 	mov	w1, 65535
-	.loc 2 583 0
+	.loc 2 632 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
 	mov	x19, x0
-	.loc 2 586 0
+	.loc 2 635 0
 	ldr	x20, [x0, 16]
-.LVL850:
-	.loc 2 583 0
+.LVL852:
+	.loc 2 632 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 591 0
+	.loc 2 640 0
 	ldrh	w0, [x0]
-.LVL851:
-	.loc 2 583 0
+.LVL853:
+	.loc 2 632 0
 	str	x23, [sp, 48]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	.cfi_offset 23, -16
-	.loc 2 591 0
+	.loc 2 640 0
 	cmp	w0, w1
-	bne	.L609
-	.loc 2 592 0
+	bne	.L616
+	.loc 2 641 0
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L610
-	.loc 2 592 0 is_stmt 0 discriminator 1
+	cbz	w0, .L617
+	.loc 2 641 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
-	mov	w2, 592
+	mov	w2, 641
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL852:
-.L610:
-	.loc 2 593 0 is_stmt 1
+.LVL854:
+.L617:
+	.loc 2 642 0 is_stmt 1
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-	.loc 2 594 0
+	.loc 2 643 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL853:
+.LVL855:
 	strh	w0, [x20]
-	.loc 2 597 0
+	.loc 2 646 0
 	ldr	w0, [x19, 48]
-	.loc 2 595 0
+	.loc 2 644 0
 	strh	wzr, [x19, 2]
-	.loc 2 597 0
+	.loc 2 646 0
 	add	w0, w0, 1
-	.loc 2 596 0
+	.loc 2 645 0
 	strh	wzr, [x19]
-	.loc 2 597 0
+	.loc 2 646 0
 	str	w0, [x19, 48]
-.LVL854:
-.L611:
-	.loc 2 628 0
+.LVL856:
+.L618:
+	.loc 2 677 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL855:
+.LVL857:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
@@ -7816,108 +7932,108 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL856:
-.L609:
+.LVL858:
+.L616:
 	.cfi_restore_state
-	.loc 2 601 0
+	.loc 2 650 0
 	ubfiz	x0, x0, 1, 16
-	.loc 2 604 0
-	adrp	x1, .LANCHOR109
-	.loc 2 603 0
-	adrp	x23, .LANCHOR39
-	.loc 2 587 0
+	.loc 2 653 0
+	adrp	x1, .LANCHOR108
+	.loc 2 652 0
+	adrp	x23, .LANCHOR107
+	.loc 2 636 0
 	ldr	x22, [x19, 40]
-	.loc 2 604 0
-	ldr	x1, [x1, #:lo12:.LANCHOR109]
-	.loc 2 601 0
+	.loc 2 653 0
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	.loc 2 650 0
 	ldrh	w21, [x20, x0]
-	.loc 2 602 0
-	adrp	x20, .LANCHOR108
-.LVL857:
+	.loc 2 651 0
+	adrp	x20, .LANCHOR106
+.LVL859:
 	ldrh	w0, [x19, 2]
-	add	x2, x20, :lo12:.LANCHOR108
+	add	x2, x20, :lo12:.LANCHOR106
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	.loc 2 603 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 604 0
+	.loc 2 652 0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	.loc 2 653 0
 	str	x1, [x2, 16]
-.LVL858:
-	.loc 2 603 0
+.LVL860:
+	.loc 2 652 0
 	str	x0, [x2, 8]
-	.loc 2 607 0
+	.loc 2 656 0
 	ldr	w2, [x19, 48]
 	str	w2, [x1, 4]
-	.loc 2 608 0
+	.loc 2 657 0
 	mov	w2, -1291
 	strh	w2, [x1, 8]
-	.loc 2 609 0
+	.loc 2 658 0
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
-	.loc 2 610 0
+	.loc 2 659 0
 	strh	w21, [x1, 2]
-	.loc 2 612 0
+	.loc 2 661 0
 	adrp	x1, .LANCHOR20
-.LVL859:
+.LVL861:
 	ldrh	w2, [x1, #:lo12:.LANCHOR20]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL860:
-	.loc 2 614 0
+.LVL862:
+	.loc 2 663 0
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	.loc 2 617 0
-	ldr	x3, [x23, #:lo12:.LANCHOR39]
-	.loc 2 613 0
+	.loc 2 666 0
+	ldr	x3, [x23, #:lo12:.LANCHOR107]
+	.loc 2 662 0
 	mov	w2, 0
-.LVL861:
-.L612:
-	.loc 2 614 0 discriminator 1
+.LVL863:
+.L619:
+	.loc 2 663 0 discriminator 1
 	cmp	w4, w1, uxth
-	bhi	.L614
-	.loc 2 621 0
+	bhi	.L621
+	.loc 2 670 0
 	mov	w2, 1
-.LVL862:
+.LVL864:
 	mov	w3, 0
 	mov	w1, w2
-.LVL863:
-	add	x0, x20, :lo12:.LANCHOR108
+.LVL865:
+	add	x0, x20, :lo12:.LANCHOR106
 	bl	FlashProgPages
-.LVL864:
-	.loc 2 622 0
+.LVL866:
+	.loc 2 671 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 626 0
+	.loc 2 675 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL865:
-	.loc 2 627 0
-	b	.L611
-.LVL866:
-.L614:
-	.loc 2 615 0
+.LVL867:
+	.loc 2 676 0
+	b	.L618
+.LVL868:
+.L621:
+	.loc 2 664 0
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L613
-	.loc 2 616 0
+	bne	.L620
+	.loc 2 665 0
 	add	w2, w2, 1
-.LVL867:
+.LVL869:
 	and	w2, w2, 65535
-.LVL868:
-	.loc 2 617 0
+.LVL870:
+	.loc 2 666 0
 	ubfiz	x0, x2, 1, 16
 	str	w1, [x3, x0, lsl 2]
-	.loc 2 618 0
+	.loc 2 667 0
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L613:
-.LVL869:
+.L620:
+.LVL871:
 	add	x1, x1, 1
-.LVL870:
-	b	.L612
+.LVL872:
+	b	.L619
 	.cfi_endproc
 .LFE257:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -7927,9 +8043,9 @@ Ftl_write_map_blk_to_last_page:
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
 .LFB258:
-	.loc 2 631 0
+	.loc 2 680 0
 	.cfi_startproc
-.LVL871:
+.LVL873:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -7939,216 +8055,216 @@ FtlMapWritePage:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 637 0
-	adrp	x23, .LANCHOR67
-	.loc 2 631 0
+	.loc 2 686 0
+	adrp	x23, .LANCHOR66
+	.loc 2 680 0
 	stp	x25, x26, [sp, 64]
-	.loc 2 650 0
+	.loc 2 699 0
 	adrp	x24, .LANCHOR142
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 638 0
+	.loc 2 687 0
 	adrp	x26, .LANCHOR20
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x19, x20, [sp, 16]
 	mov	w25, w1
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
 	mov	x19, x0
 	mov	x27, x2
-	.loc 2 637 0
-	add	x23, x23, :lo12:.LANCHOR67
-	.loc 2 650 0
+	.loc 2 686 0
+	add	x23, x23, :lo12:.LANCHOR66
+	.loc 2 699 0
 	add	x24, x24, :lo12:.LANCHOR142
-	.loc 2 671 0
+	.loc 2 720 0
 	add	x28, x26, :lo12:.LANCHOR20
-	.loc 2 631 0
+	.loc 2 680 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 634 0
+	.loc 2 683 0
 	mov	w22, 0
-.LVL872:
-.L620:
-	.loc 2 637 0
+.LVL874:
+.L627:
+	.loc 2 686 0
 	ldr	w0, [x23]
-	.loc 2 638 0
+	.loc 2 687 0
 	ldrh	w1, [x19, 2]
-	.loc 2 637 0
+	.loc 2 686 0
 	add	w0, w0, 1
 	str	w0, [x23]
-	.loc 2 638 0
+	.loc 2 687 0
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L621
-	.loc 2 638 0 is_stmt 0 discriminator 1
+	bge	.L628
+	.loc 2 687 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L622
-.L621:
-	.loc 2 639 0 is_stmt 1
+	bne	.L629
+.L628:
+	.loc 2 688 0 is_stmt 1
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL873:
-.L622:
-	.loc 2 650 0
+.LVL875:
+.L629:
+	.loc 2 699 0
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L623
-	.loc 2 650 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L630
+	.loc 2 699 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 650
+	mov	w2, 699
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL874:
-.L623:
-	.loc 2 651 0 is_stmt 1
+.LVL876:
+.L630:
+	.loc 2 700 0 is_stmt 1
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L624
-	.loc 2 651 0 is_stmt 0 discriminator 1
+	bcc	.L631
+	.loc 2 700 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 651
+	mov	w2, 700
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL875:
-.L624:
-	.loc 2 652 0 is_stmt 1
+.LVL877:
+.L631:
+	.loc 2 701 0 is_stmt 1
 	ldrh	w1, [x19]
-	.loc 2 654 0
-	adrp	x21, .LANCHOR108
-	.loc 2 652 0
+	.loc 2 703 0
+	adrp	x21, .LANCHOR106
+	.loc 2 701 0
 	ldr	x0, [x19, 16]
-	.loc 2 654 0
-	add	x20, x21, :lo12:.LANCHOR108
-	.loc 2 658 0
+	.loc 2 703 0
+	add	x20, x21, :lo12:.LANCHOR106
+	.loc 2 707 0
 	mov	w2, 16
-	.loc 2 652 0
+	.loc 2 701 0
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL876:
-	.loc 2 658 0
+.LVL878:
+	.loc 2 707 0
 	mov	w1, 0
-	.loc 2 654 0
+	.loc 2 703 0
 	ldrh	w0, [x19, 2]
 	str	w3, [x29, 108]
-	.loc 2 655 0
+	.loc 2 704 0
 	str	x27, [x20, 8]
-	.loc 2 654 0
+	.loc 2 703 0
 	orr	w0, w0, w3, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 656 0
-	adrp	x0, .LANCHOR109
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	.loc 2 705 0
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	str	x0, [x20, 16]
-	.loc 2 658 0
+	.loc 2 707 0
 	bl	ftl_memset
-.LVL877:
-	.loc 2 659 0
+.LVL879:
+	.loc 2 708 0
 	ldr	x0, [x20, 16]
-.LVL878:
-	.loc 2 660 0
+.LVL880:
+	.loc 2 709 0
 	ldr	w1, [x19, 48]
-	.loc 2 663 0
+	.loc 2 712 0
 	ldr	w3, [x29, 108]
-	.loc 2 660 0
+	.loc 2 709 0
 	str	w1, [x0, 4]
-	.loc 2 662 0
+	.loc 2 711 0
 	ldrh	w1, [x19, 4]
 	strh	w1, [x0]
-	.loc 2 663 0
+	.loc 2 712 0
 	strh	w3, [x0, 2]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	w3, 1
-	.loc 2 661 0
+	.loc 2 710 0
 	strh	w25, [x0, 8]
-	.loc 2 664 0
+	.loc 2 713 0
 	mov	w1, w3
 	mov	w2, w3
 	mov	x0, x20
-.LVL879:
+.LVL881:
 	bl	FlashProgPages
-.LVL880:
-	.loc 2 665 0
+.LVL882:
+	.loc 2 714 0
 	ldrh	w0, [x19, 2]
-	.loc 2 667 0
-	ldr	w1, [x21, #:lo12:.LANCHOR108]
-	.loc 2 665 0
+	.loc 2 716 0
+	ldr	w1, [x21, #:lo12:.LANCHOR106]
+	.loc 2 714 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 667 0
+	.loc 2 716 0
 	cmn	w1, #1
-	bne	.L625
-	.loc 2 668 0
+	bne	.L632
+	.loc 2 717 0
 	ldr	w1, [x20, 4]
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
-	.loc 2 669 0
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
+	.loc 2 718 0
 	add	w22, w22, 1
-.LVL881:
+.LVL883:
 	and	w22, w22, 65535
-	.loc 2 668 0
+	.loc 2 717 0
 	bl	printf
-.LVL882:
-	.loc 2 670 0
+.LVL884:
+	.loc 2 719 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L626
-	.loc 2 671 0
+	bhi	.L633
+	.loc 2 720 0
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L626:
-	.loc 2 673 0
+.L633:
+	.loc 2 722 0
 	cmp	w22, 3
-	bls	.L627
-	.loc 2 674 0
-	add	x21, x21, :lo12:.LANCHOR108
-	adrp	x0, .LC87
+	bls	.L634
+	.loc 2 723 0
+	add	x21, x21, :lo12:.LANCHOR106
+	adrp	x0, .LC90
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC87
+	add	x0, x0, :lo12:.LC90
 	ldr	w1, [x21, 4]
 	bl	printf
-.LVL883:
-.L628:
-	b	.L628
-.L627:
-	.loc 2 678 0
+.LVL885:
+.L635:
+	b	.L635
+.L634:
+	.loc 2 727 0
 	ldr	w0, [x19, 52]
-	cbz	w0, .L620
-.L637:
-	b	.L637
-.L625:
-	.loc 2 682 0
+	cbz	w0, .L627
+.L644:
+	b	.L644
+.L632:
+	.loc 2 731 0
 	cmp	w0, 1
-	beq	.L620
-	.loc 2 685 0
+	beq	.L627
+	.loc 2 734 0
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
-	.loc 2 687 0
+	.loc 2 736 0
 	ldp	x21, x22, [sp, 32]
-.LVL884:
+.LVL886:
 	ldp	x23, x24, [sp, 48]
 	ldp	x27, x28, [sp, 80]
-.LVL885:
-	.loc 2 685 0
+.LVL887:
+	.loc 2 734 0
 	str	w1, [x0, w25, uxtw 2]
-	.loc 2 687 0
+	.loc 2 736 0
 	ldp	x19, x20, [sp, 16]
-.LVL886:
+.LVL888:
 	mov	w0, 0
 	ldp	x25, x26, [sp, 64]
-.LVL887:
+.LVL889:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -8163,7 +8279,7 @@ FtlMapWritePage:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL888:
+.LVL890:
 	ret
 	.cfi_endproc
 .LFE258:
@@ -8174,9 +8290,9 @@ FtlMapWritePage:
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
 .LFB256:
-	.loc 2 537 0
+	.loc 2 586 0
 	.cfi_startproc
-.LVL889:
+.LVL891:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -8200,94 +8316,94 @@ ftl_map_blk_gc:
 	.cfi_offset 26, -24
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 2 541 0
+	.loc 2 590 0
 	ldr	x20, [x0, 16]
-.LVL890:
-	.loc 2 542 0
+.LVL892:
+	.loc 2 591 0
 	ldr	x24, [x0, 40]
-.LVL891:
-	.loc 2 545 0
+.LVL893:
+	.loc 2 594 0
 	bl	ftl_free_no_use_map_blk
-.LVL892:
-	.loc 2 547 0
+.LVL894:
+	.loc 2 596 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L640
-	.loc 2 548 0
+	blt	.L647
+	.loc 2 597 0
 	ubfiz	x0, x0, 1, 16
-.LVL893:
+.LVL895:
 	ldrh	w21, [x20, x0]
-.LVL894:
-	.loc 2 549 0
-	cbz	w21, .L640
-	.loc 2 549 0 is_stmt 0 discriminator 1
+.LVL896:
+	.loc 2 598 0
+	cbz	w21, .L647
+	.loc 2 598 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L640
-	.loc 2 550 0 is_stmt 1
+	cbnz	w1, .L647
+	.loc 2 599 0 is_stmt 1
 	mov	w1, 1
 	str	w1, [x19, 52]
-	.loc 2 551 0
+	.loc 2 600 0
 	strh	wzr, [x20, x0]
-	.loc 2 552 0
+	.loc 2 601 0
 	ldrh	w0, [x19, 8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	w1, [x19, 2]
-	.loc 2 552 0
+	.loc 2 601 0
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	.loc 2 553 0
+	.loc 2 602 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L641
-	.loc 2 554 0
+	bcc	.L648
+	.loc 2 603 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL895:
-.L641:
-	.loc 2 558 0 discriminator 1
-	adrp	x25, .LANCHOR108
-	.loc 2 564 0 discriminator 1
+.LVL897:
+.L648:
+	.loc 2 607 0 discriminator 1
+	adrp	x25, .LANCHOR106
+	.loc 2 613 0 discriminator 1
 	adrp	x22, .LANCHOR143
-	.loc 2 565 0 discriminator 1
-	add	x26, x25, :lo12:.LANCHOR108
-	.loc 2 564 0 discriminator 1
+	.loc 2 614 0 discriminator 1
+	add	x26, x25, :lo12:.LANCHOR106
+	.loc 2 613 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR143
-	.loc 2 537 0 discriminator 1
+	.loc 2 586 0 discriminator 1
 	mov	w20, 0
-.LVL896:
-.L642:
-	.loc 2 556 0 discriminator 1
+.LVL898:
+.L649:
+	.loc 2 605 0 discriminator 1
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L646
-	.loc 2 572 0
+	bhi	.L653
+	.loc 2 621 0
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
-.LVL897:
-	.loc 2 573 0
+.LVL899:
+	.loc 2 622 0
 	str	wzr, [x19, 52]
-.LVL898:
-.L640:
-	.loc 2 577 0
+.LVL900:
+.L647:
+	.loc 2 626 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L647
-	.loc 2 578 0
+	bcc	.L654
+	.loc 2 627 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL899:
-.L647:
-	.loc 2 580 0
+.LVL901:
+.L654:
+	.loc 2 629 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL900:
+.LVL902:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL901:
+.LVL903:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
@@ -8306,69 +8422,69 @@ ftl_map_blk_gc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL902:
-.L646:
+.LVL904:
+.L653:
 	.cfi_restore_state
-	.loc 2 557 0
+	.loc 2 606 0
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x24, x27]
 	cmp	w21, w1, lsr 10
-	bne	.L643
-	.loc 2 558 0
+	bne	.L650
+	.loc 2 607 0
 	adrp	x2, .LANCHOR123
-	add	x0, x25, :lo12:.LANCHOR108
+	add	x0, x25, :lo12:.LANCHOR106
 	ldr	x2, [x2, #:lo12:.LANCHOR123]
 	str	x2, [x0, 8]
-	.loc 2 559 0
-	adrp	x2, .LANCHOR109
-	.loc 2 560 0
+	.loc 2 608 0
+	adrp	x2, .LANCHOR108
+	.loc 2 609 0
 	str	w1, [x0, 4]
-	.loc 2 559 0
-	ldr	x28, [x2, #:lo12:.LANCHOR109]
-.LVL903:
-	.loc 2 562 0
+	.loc 2 608 0
+	ldr	x28, [x2, #:lo12:.LANCHOR108]
+.LVL905:
+	.loc 2 611 0
 	mov	w2, 1
-	.loc 2 559 0
+	.loc 2 608 0
 	str	x28, [x0, 16]
-	.loc 2 562 0
+	.loc 2 611 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL904:
-	.loc 2 564 0
+.LVL906:
+	.loc 2 613 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L644
-	.loc 2 564 0 is_stmt 0 discriminator 1
+	beq	.L651
+	.loc 2 613 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 564
+	mov	w2, 613
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL905:
-.L644:
-	.loc 2 565 0 is_stmt 1
+.LVL907:
+.L651:
+	.loc 2 614 0 is_stmt 1
 	ldr	w0, [x26]
 	cmn	w0, #1
-	bne	.L645
-	.loc 2 566 0
+	bne	.L652
+	.loc 2 615 0
 	str	wzr, [x24, x27]
-.LVL906:
-.L643:
-	.loc 2 556 0 discriminator 2
-	add	w20, w20, 1
-.LVL907:
-	and	w20, w20, 65535
 .LVL908:
-	b	.L642
+.L650:
+	.loc 2 605 0 discriminator 2
+	add	w20, w20, 1
 .LVL909:
-.L645:
-	.loc 2 568 0
+	and	w20, w20, 65535
+.LVL910:
+	b	.L649
+.LVL911:
+.L652:
+	.loc 2 617 0
 	ldr	x2, [x26, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL910:
-	b	.L643
+.LVL912:
+	b	.L650
 	.cfi_endproc
 .LFE256:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
@@ -8378,9 +8494,9 @@ ftl_map_blk_gc:
 	.type	flush_l2p_region, %function
 flush_l2p_region:
 .LFB259:
-	.loc 2 690 0
+	.loc 2 739 0
 	.cfi_startproc
-.LVL911:
+.LVL913:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -8390,31 +8506,31 @@ flush_l2p_region:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 693 0
-	adrp	x20, .LANCHOR56
+	.loc 2 742 0
+	adrp	x20, .LANCHOR55
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-.LVL912:
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
+.LVL914:
 	add	x1, x0, x19
-.LVL913:
-	.loc 2 694 0
+.LVL915:
+	.loc 2 743 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-.LVL914:
+.LVL916:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapWritePage
-.LVL915:
-	.loc 2 695 0
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
+.LVL917:
+	.loc 2 744 0
+	ldr	x0, [x20, #:lo12:.LANCHOR55]
 	add	x0, x0, x19
-	.loc 2 697 0
+	.loc 2 746 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 695 0
+	.loc 2 744 0
 	ldr	w1, [x0, 4]
 	and	w1, w1, 2147483647
 	str	w1, [x0, 4]
-	.loc 2 697 0
+	.loc 2 746 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 32
 	.cfi_restore 30
@@ -8432,9 +8548,9 @@ flush_l2p_region:
 	.type	log2phys, %function
 log2phys:
 .LFB262:
-	.loc 2 753 0
+	.loc 2 802 0
 	.cfi_startproc
-.LVL916:
+.LVL918:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8445,10 +8561,10 @@ log2phys:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	mov	x23, x1
-	.loc 2 756 0
+	.loc 2 805 0
 	adrp	x1, .LANCHOR22
-.LVL917:
-	.loc 2 753 0
+.LVL919:
+	.loc 2 802 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w24, w2
@@ -8456,131 +8572,131 @@ log2phys:
 	.cfi_offset 20, -56
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 756 0
+	.loc 2 805 0
 	ldrh	w19, [x1, #:lo12:.LANCHOR22]
-	.loc 2 753 0
+	.loc 2 802 0
 	str	x25, [sp, 64]
 	.cfi_offset 25, -16
-	.loc 2 756 0
+	.loc 2 805 0
 	add	w1, w19, 7
-	.loc 2 757 0
+	.loc 2 806 0
 	mov	x19, 1
-	.loc 2 756 0
+	.loc 2 805 0
 	lsr	w22, w0, w1
 	and	w22, w22, 65535
-.LVL918:
-	.loc 2 757 0
+.LVL920:
+	.loc 2 806 0
 	lsl	x19, x19, x1
-	.loc 2 759 0
-	adrp	x1, .LANCHOR62
-	.loc 2 757 0
+	.loc 2 808 0
+	adrp	x1, .LANCHOR61
+	.loc 2 806 0
 	sub	w19, w19, #1
-	.loc 2 759 0
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	.loc 2 757 0
+	.loc 2 808 0
+	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	.loc 2 806 0
 	and	w19, w19, w0
 	and	x19, x19, 65535
-.LVL919:
-	.loc 2 759 0
+.LVL921:
+	.loc 2 808 0
 	cmp	w0, w1
-	bcc	.L655
-	.loc 2 759 0 is_stmt 0 discriminator 1
+	bcc	.L662
+	.loc 2 808 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-.LVL920:
-	mov	w2, 759
-.LVL921:
+.LVL922:
+	mov	w2, 808
+.LVL923:
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL922:
-.L655:
-	.loc 2 762 0 is_stmt 1
-	adrp	x21, .LANCHOR56
-	.loc 2 761 0
+.LVL924:
+.L662:
+	.loc 2 811 0 is_stmt 1
+	adrp	x21, .LANCHOR55
+	.loc 2 810 0
 	adrp	x0, .LANCHOR33
-	.loc 2 762 0
-	ldr	x2, [x21, #:lo12:.LANCHOR56]
-	.loc 2 761 0
+	.loc 2 811 0
+	ldr	x2, [x21, #:lo12:.LANCHOR55]
+	.loc 2 810 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.LVL923:
-.L656:
+.LVL925:
+.L663:
 	and	x20, x0, 65535
-.LVL924:
-	.loc 2 761 0 is_stmt 0 discriminator 1
+.LVL926:
+	.loc 2 810 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
-	bcc	.L661
-	.loc 2 776 0 is_stmt 1
+	bcc	.L668
+	.loc 2 825 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL925:
+.LVL927:
 	and	x20, x0, 65535
-.LVL926:
-	.loc 2 777 0
-	ldr	x2, [x21, #:lo12:.LANCHOR56]
+.LVL928:
+	.loc 2 826 0
+	ldr	x2, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x1, x20, 4, 16
-	.loc 2 776 0
+	.loc 2 825 0
 	mov	w25, w0
-	.loc 2 777 0
+	.loc 2 826 0
 	add	x3, x2, x1
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L662
-	.loc 2 777 0 is_stmt 0 discriminator 1
+	beq	.L669
+	.loc 2 826 0 is_stmt 0 discriminator 1
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L662
-	.loc 2 778 0 is_stmt 1
+	tbz	w1, #31, .L669
+	.loc 2 827 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL927:
-.L662:
-	.loc 2 781 0
+.LVL929:
+.L669:
+	.loc 2 830 0
 	mov	w1, w25
 	mov	w0, w22
 	bl	load_l2p_region
-.LVL928:
-	.loc 2 782 0
-	b	.L657
-.LVL929:
-.L661:
+.LVL930:
+	.loc 2 831 0
+	b	.L664
+.LVL931:
+.L668:
 	add	x0, x0, 1
-	.loc 2 762 0
+	.loc 2 811 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L656
-.LVL930:
-.L657:
-	.loc 2 765 0
-	ldr	x0, [x21, #:lo12:.LANCHOR56]
+	bne	.L663
+.LVL932:
+.L664:
+	.loc 2 814 0
+	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x0, x0, x20, lsl 4
-	.loc 2 764 0
-	cbnz	w24, .L658
-	.loc 2 765 0
+	.loc 2 813 0
+	cbnz	w24, .L665
+	.loc 2 814 0
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x23]
-.L659:
-	.loc 2 771 0
-	ldr	x0, [x21, #:lo12:.LANCHOR56]
+.L666:
+	.loc 2 820 0
+	ldr	x0, [x21, #:lo12:.LANCHOR55]
 	add	x20, x0, x20, lsl 4
-.LVL931:
+.LVL933:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L664
-	.loc 2 772 0
+	beq	.L671
+	.loc 2 821 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L664:
-	.loc 2 783 0
+.L671:
+	.loc 2 832 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL932:
+.LVL934:
 	ldp	x21, x22, [sp, 32]
-.LVL933:
+.LVL935:
 	ldp	x23, x24, [sp, 48]
-.LVL934:
+.LVL936:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -8594,21 +8710,21 @@ log2phys:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL935:
-.L658:
+.LVL937:
+.L665:
 	.cfi_restore_state
-	.loc 2 767 0
+	.loc 2 816 0
 	ldr	x1, [x0, 8]
 	ldr	w2, [x23]
 	str	w2, [x1, x19, lsl 2]
-	.loc 2 768 0
+	.loc 2 817 0
 	ldr	w1, [x0, 4]
 	orr	w1, w1, -2147483648
 	str	w1, [x0, 4]
-	.loc 2 769 0
-	adrp	x0, .LANCHOR57
-	strh	w22, [x0, #:lo12:.LANCHOR57]
-	b	.L659
+	.loc 2 818 0
+	adrp	x0, .LANCHOR56
+	strh	w22, [x0, #:lo12:.LANCHOR56]
+	b	.L666
 	.cfi_endproc
 .LFE262:
 	.size	log2phys, .-log2phys
@@ -8618,9 +8734,9 @@ log2phys:
 	.type	FtlReUsePrevPpa, %function
 FtlReUsePrevPpa:
 .LFB280:
-	.loc 2 1628 0
+	.loc 2 1677 0
 	.cfi_startproc
-.LVL936:
+.LVL938:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8630,110 +8746,110 @@ FtlReUsePrevPpa:
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	.loc 2 1631 0
-	adrp	x22, .LANCHOR43
-	.loc 2 1628 0
+	.loc 2 1680 0
+	adrp	x22, .LANCHOR42
+	.loc 2 1677 0
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
-	.loc 2 1629 0
+	.loc 2 1678 0
 	lsr	w0, w1, 10
-.LVL937:
-	.loc 2 1628 0
+.LVL939:
+	.loc 2 1677 0
 	str	x23, [sp, 48]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.cfi_offset 23, -32
-	.loc 2 1629 0
+	.loc 2 1678 0
 	bl	P2V_block_in_plane
-.LVL938:
-	.loc 2 1631 0
-	ldr	x2, [x22, #:lo12:.LANCHOR43]
-	.loc 2 1629 0
+.LVL940:
+	.loc 2 1680 0
+	ldr	x2, [x22, #:lo12:.LANCHOR42]
+	.loc 2 1678 0
 	and	w3, w0, 65535
-.LVL939:
-	.loc 2 1631 0
+.LVL941:
+	.loc 2 1680 0
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L670
-	.loc 2 1632 0
+	cbnz	w1, .L677
+	.loc 2 1681 0
 	adrp	x0, .LANCHOR47
-.LVL940:
+.LVL942:
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L671
-.LBB225:
-	.loc 2 1636 0
-	adrp	x2, .LANCHOR41
+	cbz	x19, .L678
+.LBB260:
+	.loc 2 1685 0
+	adrp	x2, .LANCHOR40
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	.loc 2 1635 0
+	.loc 2 1684 0
 	adrp	x23, .LANCHOR48
-	.loc 2 1636 0
-	ldr	x2, [x2, #:lo12:.LANCHOR41]
-	.loc 2 1644 0
+	.loc 2 1685 0
+	ldr	x2, [x2, #:lo12:.LANCHOR40]
+	.loc 2 1693 0
 	mov	w6, 65535
-	.loc 2 1635 0
+	.loc 2 1684 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-.LVL941:
-	.loc 2 1636 0
+.LVL943:
+	.loc 2 1685 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
-	.loc 2 1644 0
+	.loc 2 1693 0
 	mov	w5, 6
-	.loc 2 1636 0
+	.loc 2 1685 0
 	and	w19, w19, 65535
-.LVL942:
-.L672:
-	.loc 2 1637 0 discriminator 1
+.LVL944:
+.L679:
+	.loc 2 1686 0 discriminator 1
 	cmp	w1, w4
-	beq	.L671
-	.loc 2 1638 0
+	beq	.L678
+	.loc 2 1687 0
 	cmp	w19, w3
-	bne	.L673
-	.loc 2 1639 0
+	bne	.L680
+	.loc 2 1688 0
 	mov	w1, w19
-.LVL943:
+.LVL945:
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-.LVL944:
+.LVL946:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L674
-	.loc 2 1639 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L681
+	.loc 2 1688 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
-	mov	w2, 1639
+	mov	w2, 1688
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL945:
-.L674:
-	.loc 2 1639 0 discriminator 3
+.LVL947:
+.L681:
+	.loc 2 1688 0 discriminator 3
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
 	strh	w0, [x23, #:lo12:.LANCHOR48]
-	.loc 2 1640 0 is_stmt 1 discriminator 3
+	.loc 2 1689 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL946:
-	.loc 2 1641 0 discriminator 3
-	ldr	x1, [x22, #:lo12:.LANCHOR43]
+.LVL948:
+	.loc 2 1690 0 discriminator 3
+	ldr	x1, [x22, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL947:
-.L671:
-.LBE225:
-	.loc 2 1652 0
+.LVL949:
+.L678:
+.LBE260:
+	.loc 2 1701 0
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
 	bl	log2phys
-.LVL948:
-	.loc 2 1653 0
+.LVL950:
+	.loc 2 1702 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL949:
+.LVL951:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -8746,30 +8862,30 @@ FtlReUsePrevPpa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL950:
-.L673:
+.LVL952:
+.L680:
 	.cfi_restore_state
-.LBB226:
-	.loc 2 1644 0
+.LBB261:
+	.loc 2 1693 0
 	umull	x19, w19, w5
-.LVL951:
+.LVL953:
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L671
-.LVL952:
-	.loc 2 1637 0 discriminator 2
-	add	w1, w1, 1
-.LVL953:
-	and	w1, w1, 65535
+	beq	.L678
 .LVL954:
-	b	.L672
+	.loc 2 1686 0 discriminator 2
+	add	w1, w1, 1
 .LVL955:
-.L670:
-.LBE226:
-	.loc 2 1650 0
+	and	w1, w1, 65535
+.LVL956:
+	b	.L679
+.LVL957:
+.L677:
+.LBE261:
+	.loc 2 1699 0
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L671
+	b	.L678
 	.cfi_endproc
 .LFE280:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
@@ -8779,15 +8895,15 @@ FtlReUsePrevPpa:
 	.type	ftl_scan_all_data, %function
 ftl_scan_all_data:
 .LFB291:
-	.loc 2 2275 0
+	.loc 2 2325 0
 	.cfi_startproc
 	sub	sp, sp, #96
 	.cfi_def_cfa_offset 96
-	.loc 2 2280 0
-	adrp	x0, .LC88
+	.loc 2 2330 0
+	adrp	x0, .LC91
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC88
-	.loc 2 2275 0
+	add	x0, x0, :lo12:.LC91
+	.loc 2 2325 0
 	stp	x29, x30, [sp, 16]
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
@@ -8796,33 +8912,33 @@ ftl_scan_all_data:
 	stp	x19, x20, [sp, 32]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
-	.loc 2 2286 0
-	adrp	x20, .LANCHOR108
-	.loc 2 2275 0
+	.loc 2 2336 0
+	adrp	x20, .LANCHOR106
+	.loc 2 2325 0
 	stp	x21, x22, [sp, 48]
-	.loc 2 2281 0
+	.loc 2 2331 0
 	mov	w19, 0
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
-	adrp	x21, .LANCHOR62
-	.loc 2 2297 0
-	add	x22, x20, :lo12:.LANCHOR108
-	.loc 2 2281 0
-	add	x21, x21, :lo12:.LANCHOR62
-	.loc 2 2275 0
+	adrp	x21, .LANCHOR61
+	.loc 2 2347 0
+	add	x22, x20, :lo12:.LANCHOR106
+	.loc 2 2331 0
+	add	x21, x21, :lo12:.LANCHOR61
+	.loc 2 2325 0
 	str	x23, [sp, 64]
 	.cfi_offset 23, -32
-	.loc 2 2280 0
+	.loc 2 2330 0
 	bl	printf
-.LVL956:
-.L681:
-	.loc 2 2281 0 discriminator 1
+.LVL958:
+.L688:
+	.loc 2 2331 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L687
-	.loc 2 2303 0
+	bcc	.L694
+	.loc 2 2353 0
 	ldp	x19, x20, [sp, 32]
-.LVL957:
+.LVL959:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
@@ -8837,84 +8953,84 @@ ftl_scan_all_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL958:
-.L687:
+.LVL960:
+.L694:
 	.cfi_restore_state
-	.loc 2 2282 0
+	.loc 2 2332 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
-.LVL959:
-	.loc 2 2283 0
+.LVL961:
+	.loc 2 2333 0
 	tst	x19, 2047
-	bne	.L682
-	.loc 2 2284 0
+	bne	.L689
+	.loc 2 2334 0
 	ldr	w2, [x29, 76]
-	adrp	x0, .LC89
+	adrp	x0, .LC92
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC89
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.LVL960:
-.L682:
-	.loc 2 2285 0
+.LVL962:
+.L689:
+	.loc 2 2335 0
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L684
-	.loc 2 2286 0
-	add	x0, x20, :lo12:.LANCHOR108
-	.loc 2 2290 0
-	str	wzr, [x20, #:lo12:.LANCHOR108]
-	.loc 2 2292 0
+	beq	.L691
+	.loc 2 2336 0
+	add	x0, x20, :lo12:.LANCHOR106
+	.loc 2 2340 0
+	str	wzr, [x20, #:lo12:.LANCHOR106]
+	.loc 2 2342 0
 	mov	w2, 0
-	.loc 2 2286 0
+	.loc 2 2336 0
 	str	w1, [x0, 4]
-	.loc 2 2288 0
-	adrp	x1, .LANCHOR39
-	.loc 2 2287 0
+	.loc 2 2338 0
+	adrp	x1, .LANCHOR107
+	.loc 2 2337 0
 	str	w19, [x0, 24]
-	.loc 2 2288 0
-	ldr	x1, [x1, #:lo12:.LANCHOR39]
+	.loc 2 2338 0
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
 	str	x1, [x0, 8]
-	.loc 2 2289 0
-	adrp	x1, .LANCHOR109
-	ldr	x23, [x1, #:lo12:.LANCHOR109]
-.LVL961:
-	.loc 2 2292 0
+	.loc 2 2339 0
+	adrp	x1, .LANCHOR108
+	ldr	x23, [x1, #:lo12:.LANCHOR108]
+.LVL963:
+	.loc 2 2342 0
 	mov	w1, 1
-	.loc 2 2289 0
+	.loc 2 2339 0
 	str	x23, [x0, 16]
-	.loc 2 2292 0
+	.loc 2 2342 0
 	bl	FlashReadPages
-.LVL962:
-	.loc 2 2293 0
-	ldr	w0, [x20, #:lo12:.LANCHOR108]
+.LVL964:
+	.loc 2 2343 0
+	ldr	w0, [x20, #:lo12:.LANCHOR106]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L685
-	.loc 2 2294 0
+	beq	.L692
+	.loc 2 2344 0
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L684
-.L685:
-	.loc 2 2297 0
+	beq	.L691
+.L692:
+	.loc 2 2347 0
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
 	str	w2, [sp]
 	ldr	w2, [x22, 4]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC90
+	adrp	x0, .LC93
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC90
+	add	x0, x0, :lo12:.LC93
 	mov	w1, w19
 	bl	printf
-.LVL963:
-.L684:
-	.loc 2 2281 0 discriminator 2
+.LVL965:
+.L691:
+	.loc 2 2331 0 discriminator 2
 	add	w19, w19, 1
-.LVL964:
-	b	.L681
+.LVL966:
+	b	.L688
 	.cfi_endproc
 .LFE291:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -8926,18 +9042,18 @@ FtlReadRefresh:
 .LFB318:
 	.loc 5 419 0
 	.cfi_startproc
-.LVL965:
+.LVL967:
 	.loc 5 425 0
-	adrp	x1, .LANCHOR83
-	add	x0, x1, :lo12:.LANCHOR83
+	adrp	x1, .LANCHOR81
+	add	x0, x1, :lo12:.LANCHOR81
 	ldr	w2, [x0, 80]
-	cbz	w2, .L690
+	cbz	w2, .L697
 	.loc 5 426 0
-	adrp	x1, .LANCHOR62
+	adrp	x1, .LANCHOR61
 	ldr	w3, [x0, 84]
-	ldr	w2, [x1, #:lo12:.LANCHOR62]
+	ldr	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w3, w2
-	bcs	.L691
+	bcs	.L698
 	.loc 5 419 0
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
@@ -8948,31 +9064,31 @@ FtlReadRefresh:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -144
 	.cfi_offset 20, -136
-.LBB232:
-.LBB233:
+.LBB267:
+.LBB268:
 	.loc 5 428 0
 	mov	x19, x0
-	add	x20, x1, :lo12:.LANCHOR62
-.LBE233:
-.LBE232:
+	add	x20, x1, :lo12:.LANCHOR61
+.LBE268:
+.LBE267:
 	.loc 5 419 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -128
 	mov	w21, 2048
-.L696:
-.LVL966:
-.LBB238:
-.LBB235:
+.L703:
+.LVL968:
+.LBB273:
+.LBB270:
 	.loc 5 428 0
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
-	bcs	.L693
+	bcs	.L700
 	.loc 5 430 0
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL967:
+.LVL969:
 	.loc 5 431 0
 	ldr	w0, [x19, 84]
 	.loc 5 432 0
@@ -8982,8 +9098,8 @@ FtlReadRefresh:
 	str	w0, [x19, 84]
 	.loc 5 432 0
 	cmn	w1, #1
-	beq	.L694
-.LBB234:
+	beq	.L701
+.LBB269:
 	.loc 5 435 0
 	str	w0, [x29, 88]
 	.loc 5 436 0
@@ -9004,29 +9120,29 @@ FtlReadRefresh:
 	str	wzr, [x0, -96]!
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL968:
+.LVL970:
 	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L693
+	bne	.L700
 	.loc 5 442 0
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL969:
+.LVL971:
 	bl	FtlGcRefreshBlock
-.LVL970:
-.L693:
-.LBE234:
-.LBE235:
-.LBE238:
+.LVL972:
+.L700:
+.LBE269:
+.LBE270:
+.LBE273:
 	.loc 5 466 0
 	ldp	x19, x20, [sp, 16]
-.LBB239:
-.LBB236:
+.LBB274:
+.LBB271:
 	mov	w0, -1
-.LBE236:
-.LBE239:
+.LBE271:
+.LBE274:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
@@ -9037,73 +9153,73 @@ FtlReadRefresh:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL971:
-.L694:
+.LVL973:
+.L701:
 	.cfi_restore_state
-.LBB240:
-.LBB237:
+.LBB275:
+.LBB272:
 	.loc 5 427 0
 	subs	w21, w21, #1
-.LVL972:
-	bne	.L696
-	b	.L693
-.LVL973:
-.L691:
+.LVL974:
+	bne	.L703
+	b	.L700
+.LVL975:
+.L698:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_restore 21
 	.cfi_restore 29
 	.cfi_restore 30
-.LBE237:
-.LBE240:
+.LBE272:
+.LBE275:
 	.loc 5 451 0
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR62
 	.loc 5 450 0
 	str	wzr, [x0, 84]
 	.loc 5 451 0
-	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	.loc 5 449 0
 	stp	w1, wzr, [x0, 76]
-.L700:
+.L707:
 	.loc 5 420 0
 	mov	w0, 0
 	.loc 5 465 0
 	ret
-.L690:
-.LVL974:
-.LBB241:
+.L697:
+.LVL976:
+.LBB276:
 	.loc 5 456 0
 	ldr	w4, [x0, 76]
-	adrp	x0, .LANCHOR63
-	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR62
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
 	add	w0, w2, 1048576
 	cmp	w4, w0
-	bhi	.L699
+	bhi	.L706
 	.loc 5 454 0
-	adrp	x0, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	lsr	w3, w0, 10
 	mov	w0, 33554432
 	asr	w0, w0, w3
 	.loc 5 457 0
 	add	w0, w0, w4
 	cmp	w2, w0
-	bhi	.L699
+	bhi	.L706
 	.loc 5 458 0
-	adrp	x0, .LANCHOR79+28
-	ldrb	w0, [x0, #:lo12:.LANCHOR79+28]
-	cbnz	w0, .L700
-.L699:
+	adrp	x0, .LANCHOR39+28
+	ldrb	w0, [x0, #:lo12:.LANCHOR39+28]
+	cbnz	w0, .L707
+.L706:
 	.loc 5 460 0
-	add	x0, x1, :lo12:.LANCHOR83
+	add	x0, x1, :lo12:.LANCHOR81
 	mov	w1, 1
 	.loc 5 461 0
 	str	wzr, [x0, 84]
 	.loc 5 460 0
 	stp	w2, w1, [x0, 76]
-	b	.L700
-.LBE241:
+	b	.L707
+.LBE276:
 	.cfi_endproc
 .LFE318:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9113,80 +9229,80 @@ FtlReadRefresh:
 	.type	FtlMapBlkWriteDump_data, %function
 FtlMapBlkWriteDump_data:
 .LFB267:
-	.loc 2 897 0
+	.loc 2 946 0
 	.cfi_startproc
-.LVL975:
-	.loc 2 903 0
+.LVL977:
+	.loc 2 952 0
 	ldr	w1, [x0, 56]
-	cbz	w1, .L706
-	.loc 2 897 0
+	cbz	w1, .L713
+	.loc 2 946 0
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-.LVL976:
-	.loc 2 907 0
-	adrp	x1, .LANCHOR108
-	.loc 2 908 0
-	adrp	x2, .LANCHOR109
-	.loc 2 897 0
+.LVL978:
+	.loc 2 956 0
+	adrp	x1, .LANCHOR106
+	.loc 2 957 0
+	adrp	x2, .LANCHOR108
+	.loc 2 946 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
 	mov	x19, x0
-	.loc 2 899 0
+	.loc 2 948 0
 	ldrh	w20, [x0, 6]
-	.loc 2 907 0
+	.loc 2 956 0
 	adrp	x0, .LANCHOR123
-.LVL977:
-	.loc 2 908 0
-	ldr	x2, [x2, #:lo12:.LANCHOR109]
-	.loc 2 907 0
+.LVL979:
+	.loc 2 957 0
+	ldr	x2, [x2, #:lo12:.LANCHOR108]
+	.loc 2 956 0
 	ldr	x3, [x0, #:lo12:.LANCHOR123]
-	add	x0, x1, :lo12:.LANCHOR108
-	.loc 2 899 0
+	add	x0, x1, :lo12:.LANCHOR106
+	.loc 2 948 0
 	sub	w20, w20, #1
-	.loc 2 900 0
+	.loc 2 949 0
 	ldr	x4, [x19, 40]
-	.loc 2 899 0
+	.loc 2 948 0
 	and	w20, w20, 65535
-	.loc 2 897 0
+	.loc 2 946 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 908 0
+	.loc 2 957 0
 	stp	x3, x2, [x0, 8]
-	.loc 2 930 0
+	.loc 2 979 0
 	ubfiz	x2, x20, 2, 16
-	.loc 2 905 0
+	.loc 2 954 0
 	str	wzr, [x19, 56]
 	mov	x21, x1
-	.loc 2 930 0
+	.loc 2 979 0
 	ldr	w2, [x4, x2]
-.LVL978:
-	.loc 2 931 0
+.LVL980:
+	.loc 2 980 0
 	str	w2, [x0, 4]
-	.loc 2 932 0
-	cbz	w2, .L708
-	.loc 2 934 0
+	.loc 2 981 0
+	cbz	w2, .L715
+	.loc 2 983 0
 	mov	w2, 1
-.LVL979:
+.LVL981:
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL980:
-.L709:
-	.loc 2 941 0
-	add	x1, x21, :lo12:.LANCHOR108
+.LVL982:
+.L716:
+	.loc 2 990 0
+	add	x1, x21, :lo12:.LANCHOR106
 	mov	x0, x19
-	.loc 2 943 0
+	.loc 2 992 0
 	ldr	x21, [sp, 32]
-	.loc 2 941 0
+	.loc 2 990 0
 	ldr	x2, [x1, 8]
 	mov	w1, w20
-	.loc 2 943 0
+	.loc 2 992 0
 	ldp	x19, x20, [sp, 16]
-.LVL981:
+.LVL983:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -9195,22 +9311,22 @@ FtlMapBlkWriteDump_data:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 2 941 0
+	.loc 2 990 0
 	b	FtlMapWritePage
-.LVL982:
-.L708:
+.LVL984:
+.L715:
 	.cfi_restore_state
-	.loc 2 938 0
+	.loc 2 987 0
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-.LVL983:
+.LVL985:
 	mov	x0, x3
 	bl	ftl_memset
-.LVL984:
-	b	.L709
-.LVL985:
-.L706:
+.LVL986:
+	b	.L716
+.LVL987:
+.L713:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
@@ -9227,636 +9343,632 @@ FtlMapBlkWriteDump_data:
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
 .LFB270:
-	.loc 2 1095 0
+	.loc 2 1144 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -176]!
 	.cfi_def_cfa_offset 176
 	.cfi_offset 29, -176
 	.cfi_offset 30, -168
-	.loc 2 1103 0
+	.loc 2 1152 0
 	mov	w1, 0
-	.loc 2 1095 0
+	.loc 2 1144 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -112
 	.cfi_offset 26, -104
-	.loc 2 1103 0
+	.loc 2 1152 0
 	adrp	x25, .LANCHOR135
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -144
 	.cfi_offset 22, -136
-	.loc 2 1103 0
+	.loc 2 1152 0
 	adrp	x21, .LANCHOR30
 	ldr	x0, [x25, #:lo12:.LANCHOR135]
-	.loc 2 1105 0
+	.loc 2 1154 0
 	adrp	x22, .LANCHOR132
-	.loc 2 1103 0
+	.loc 2 1152 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -160
 	.cfi_offset 20, -152
-	.loc 2 1101 0
+	.loc 2 1150 0
 	adrp	x20, .LANCHOR147
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -128
 	.cfi_offset 24, -120
-	.loc 2 1102 0
+	.loc 2 1151 0
 	adrp	x23, .LANCHOR35
-	.loc 2 1095 0
+	.loc 2 1144 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -96
 	.cfi_offset 28, -88
-	.loc 2 1104 0
+	.loc 2 1153 0
 	adrp	x27, .LANCHOR129
-	.loc 2 1103 0
+	.loc 2 1152 0
 	lsl	w2, w2, 2
-	.loc 2 1101 0
+	.loc 2 1150 0
 	strh	wzr, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1102 0
+	.loc 2 1151 0
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1103 0
+	.loc 2 1152 0
 	bl	ftl_memset
-.LVL986:
-	.loc 2 1104 0
+.LVL988:
+	.loc 2 1153 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1105 0
+	.loc 2 1154 0
 	adrp	x19, .LANCHOR27
-	.loc 2 1106 0
+	.loc 2 1155 0
 	adrp	x28, .LANCHOR36
-	.loc 2 1107 0
-	adrp	x24, .LANCHOR81
-	.loc 2 1104 0
+	.loc 2 1156 0
+	adrp	x24, .LANCHOR79
+	.loc 2 1153 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL987:
-	.loc 2 1105 0
+.LVL989:
+	.loc 2 1154 0
 	ldr	x0, [x22, #:lo12:.LANCHOR132]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL988:
-	.loc 2 1106 0
+.LVL990:
+	.loc 2 1155 0
 	ldr	x0, [x28, #:lo12:.LANCHOR36]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL989:
-	.loc 2 1107 0
+.LVL991:
+	.loc 2 1156 0
 	mov	w2, 12
 	mov	w1, 255
-	add	x0, x24, :lo12:.LANCHOR81
+	add	x0, x24, :lo12:.LANCHOR79
 	bl	ftl_memset
-.LVL990:
-	.loc 2 1109 0
+.LVL992:
+	.loc 2 1158 0
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	str	w0, [x29, 172]
-.LVL991:
+.LVL993:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
-	.loc 2 1152 0
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
+	.loc 2 1201 0
+	adrp	x0, .LANCHOR70
+	add	x0, x0, :lo12:.LANCHOR70
 	str	x0, [x29, 112]
-.L714:
-	.loc 2 1109 0 discriminator 1
+.L721:
+	.loc 2 1158 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L754
-	.loc 2 1113 0 discriminator 1
+	bls	.L761
+	.loc 2 1162 0 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1167 0 discriminator 1
 	adrp	x25, .LANCHOR120
-	.loc 2 1115 0 discriminator 1
+	.loc 2 1164 0 discriminator 1
 	adrp	x6, .LANCHOR13
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1169 0 discriminator 1
 	mov	x5, 0
-	.loc 2 1113 0 discriminator 1
+	.loc 2 1162 0 discriminator 1
 	ldrh	w12, [x0, #:lo12:.LANCHOR3]
-	.loc 2 1119 0 discriminator 1
-	adrp	x0, .LANCHOR93
-	.loc 2 1118 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
+	adrp	x0, .LANCHOR91
+	.loc 2 1167 0 discriminator 1
 	ldr	x7, [x25, #:lo12:.LANCHOR120]
-	.loc 2 1120 0 discriminator 1
+	.loc 2 1169 0 discriminator 1
 	mov	w22, 0
-	.loc 2 1119 0 discriminator 1
-	ldr	x11, [x0, #:lo12:.LANCHOR93]
-	.loc 2 1120 0 discriminator 1
-	adrp	x0, .LANCHOR94
-	.loc 2 1115 0 discriminator 1
+	.loc 2 1168 0 discriminator 1
+	ldr	x11, [x0, #:lo12:.LANCHOR91]
+	.loc 2 1169 0 discriminator 1
+	adrp	x0, .LANCHOR92
+	.loc 2 1164 0 discriminator 1
 	add	x6, x6, :lo12:.LANCHOR13
-	.loc 2 1120 0 discriminator 1
-	ldr	x10, [x0, #:lo12:.LANCHOR94]
+	.loc 2 1169 0 discriminator 1
+	ldr	x10, [x0, #:lo12:.LANCHOR92]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L755
-.LVL992:
-.L716:
-	.loc 2 1115 0
+	b	.L762
+.LVL994:
+.L723:
+	.loc 2 1164 0
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
-.LVL993:
+.LVL995:
 	and	w4, w0, 65535
-.LVL994:
-	.loc 2 1116 0
+.LVL996:
+	.loc 2 1165 0
 	bl	FtlBbmIsBadBlock
-.LVL995:
-	cbnz	w0, .L715
-	.loc 2 1118 0
+.LVL997:
+	cbnz	w0, .L722
+	.loc 2 1167 0
 	ubfiz	x0, x22, 5, 16
-	.loc 2 1120 0
+	.loc 2 1169 0
 	mul	w1, w22, w8
-	.loc 2 1118 0
+	.loc 2 1167 0
 	add	x0, x7, x0
-	.loc 2 1121 0
+	.loc 2 1170 0
 	add	w22, w22, 1
-.LVL996:
+.LVL998:
 	and	w22, w22, 65535
-.LVL997:
-	.loc 2 1118 0
+.LVL999:
+	.loc 2 1167 0
 	lsl	w4, w4, 10
-.LVL998:
-	.loc 2 1120 0
+.LVL1000:
+	.loc 2 1169 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
-	.loc 2 1118 0
+	.loc 2 1167 0
 	str	w4, [x0, 4]
-	.loc 2 1120 0
+	.loc 2 1169 0
 	stp	x11, x1, [x0, 8]
-.L715:
-.LVL999:
+.L722:
+.LVL1001:
 	add	x5, x5, 1
-.LVL1000:
-.L755:
-	.loc 2 1113 0 discriminator 1
+.LVL1002:
+.L762:
+	.loc 2 1162 0 discriminator 1
 	cmp	w12, w5, uxth
-	bhi	.L716
-	.loc 2 1124 0
-	cbnz	w22, .L717
-.LVL1001:
-.L753:
-	.loc 2 1109 0
+	bhi	.L723
+	.loc 2 1173 0
+	cbnz	w22, .L724
+.LVL1003:
+.L760:
+	.loc 2 1158 0
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-.LVL1002:
-	b	.L714
-.LVL1003:
-.L717:
-	.loc 2 1127 0
+.LVL1004:
+	b	.L721
+.LVL1005:
+.L724:
+	.loc 2 1176 0
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
 	bl	FlashReadPages
-.LVL1004:
+.LVL1006:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-.LVL1005:
+.LVL1007:
 	str	x0, [x29, 128]
-.LVL1006:
-	.loc 2 1162 0
+.LVL1008:
+	.loc 2 1211 0
 	adrp	x0, .LANCHOR148
 	add	x0, x0, :lo12:.LANCHOR148
 	str	x0, [x29, 136]
-.L752:
-	.loc 2 1129 0
+.L759:
+	.loc 2 1178 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x1, x0, x22
-	.loc 2 1132 0
+	.loc 2 1181 0
 	ldr	w0, [x0, x22]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ldr	w3, [x1, 4]
-	.loc 2 1132 0
+	.loc 2 1181 0
 	cmn	w0, #1
-	.loc 2 1130 0
+	.loc 2 1179 0
 	ldr	x27, [x1, 16]
-	.loc 2 1129 0
+	.loc 2 1178 0
 	ubfx	x26, x3, 10, 16
-.LVL1007:
-	.loc 2 1132 0
-	bne	.L720
+.LVL1009:
+	.loc 2 1181 0
+	bne	.L727
 	mov	w5, 16
-	.loc 2 1136 0
+	.loc 2 1185 0
 	mov	w7, 65535
-.L722:
-	.loc 2 1134 0
+.L729:
+	.loc 2 1183 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x6, x25, :lo12:.LANCHOR120
-	.loc 2 1135 0
+	.loc 2 1184 0
 	mov	w2, 1
 	str	w7, [x29, 100]
-	.loc 2 1134 0
+	.loc 2 1183 0
 	add	x0, x0, x22
 	str	x6, [x29, 104]
 	str	w5, [x29, 168]
-.LVL1008:
+.LVL1010:
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
-	.loc 2 1135 0
+	.loc 2 1184 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1009:
-	.loc 2 1136 0
+.LVL1011:
+	.loc 2 1185 0
 	ldrh	w0, [x27]
 	ldr	w7, [x29, 100]
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L719
-	.loc 2 1137 0
+	bne	.L726
+	.loc 2 1186 0
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
-	.loc 2 1145 0
+	.loc 2 1194 0
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L720
-.LVL1010:
-.L721:
-	.loc 2 1287 0
-	mov	w1, 1
-	b	.L791
-.LVL1011:
-.L719:
-	.loc 2 1139 0
+	bne	.L727
+.LVL1012:
+.L728:
+	.loc 2 1336 0
+	mov	w1, 0
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+.LVL1013:
+	b	.L732
+.LVL1014:
+.L726:
+	.loc 2 1188 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L720
-.LVL1012:
+	bne	.L727
+.LVL1015:
 	sub	w5, w5, #1
-.LVL1013:
-	.loc 2 1133 0 discriminator 2
+.LVL1016:
+	.loc 2 1182 0 discriminator 2
 	ands	w5, w5, 65535
-	bne	.L722
-	b	.L721
-.L720:
-	.loc 2 1147 0
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	bne	.L729
+	b	.L728
+.L727:
+	.loc 2 1196 0
+	adrp	x0, .LANCHOR70
+	ldr	w1, [x0, #:lo12:.LANCHOR70]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L723
-	.loc 2 1147 0 is_stmt 0 discriminator 1
+	beq	.L730
+	.loc 2 1196 0 is_stmt 0 discriminator 1
 	cmp	w1, w0
-	bhi	.L724
-.L723:
-	.loc 2 1149 0 is_stmt 1
+	bhi	.L731
+.L730:
+	.loc 2 1198 0 is_stmt 1
 	cmn	w0, #1
-	beq	.L724
-	.loc 2 1152 0
+	beq	.L731
+	.loc 2 1201 0
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L724:
-	.loc 2 1157 0
+.L731:
+	.loc 2 1206 0
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L726
-	bhi	.L727
+	beq	.L733
+	bhi	.L734
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L728
-.L725:
-	.loc 2 1128 0 discriminator 2
+	beq	.L735
+.L732:
+	.loc 2 1177 0 discriminator 2
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L752
-	b	.L753
-.L727:
-	.loc 2 1157 0
+	bne	.L759
+	b	.L760
+.L734:
+	.loc 2 1206 0
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L729
+	beq	.L736
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L725
-	.loc 2 1280 0
-	mov	w1, 0
-.L791:
-	.loc 2 1287 0
-	mov	w0, w26
-	bl	FtlFreeSysBlkQueueIn
-.LVL1014:
-	b	.L725
-.L729:
-	.loc 2 1162 0
+	beq	.L728
+	b	.L732
+.L736:
+	.loc 2 1211 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L731
-	.loc 2 1162 0 is_stmt 0 discriminator 1
+	bls	.L738
+	.loc 2 1211 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1162
+	mov	w2, 1211
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1015:
-.L731:
-	.loc 2 1163 0 is_stmt 1
+.LVL1017:
+.L738:
+	.loc 2 1212 0 is_stmt 1
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
-	.loc 2 1165 0
+	.loc 2 1214 0
 	ldr	x3, [x29, 152]
-	.loc 2 1163 0
+	.loc 2 1212 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	and	w2, w6, 65535
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
-.LVL1016:
+.LVL1018:
 	sub	w2, w2, #1
-	.loc 2 1165 0
+	.loc 2 1214 0
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
-	.loc 2 1163 0
+	.loc 2 1212 0
 	sxth	w2, w2
-.L732:
-	.loc 2 1163 0 is_stmt 0 discriminator 1
+.L739:
+	.loc 2 1212 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
-	bgt	.L738
-	.loc 2 1186 0 is_stmt 1
-	tbz	w0, #31, .L772
-	b	.L725
-.L738:
-	.loc 2 1165 0
+	bgt	.L745
+	.loc 2 1235 0 is_stmt 1
+	tbz	w0, #31, .L779
+	b	.L732
+.L745:
+	.loc 2 1214 0
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L733
-	.loc 2 1167 0
+	bls	.L740
+	.loc 2 1216 0
 	ldr	w2, [x5]
-	cbnz	w2, .L734
-	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cbnz	w2, .L741
+	.loc 2 1216 0 is_stmt 0 discriminator 1
 	cmp	w6, w1
-	beq	.L734
-	.loc 2 1172 0 is_stmt 1
+	beq	.L741
+	.loc 2 1221 0 is_stmt 1
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-.L734:
-	.loc 2 1178 0 discriminator 1
+.L741:
+	.loc 2 1227 0 discriminator 1
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L735:
-.LVL1017:
-	.loc 2 1175 0 discriminator 1
+.L742:
+.LVL1019:
+	.loc 2 1224 0 discriminator 1
 	cmp	w1, w0
-	bne	.L736
-	.loc 2 1180 0
+	bne	.L743
+	.loc 2 1229 0
 	ldr	w1, [x27, 4]
-.LVL1018:
+.LVL1020:
 	str	w1, [x10]
-	.loc 2 1181 0
+	.loc 2 1230 0
 	strh	w26, [x6, x8, lsl 1]
-	.loc 2 1186 0
-	tbnz	w0, #31, .L725
-	.loc 2 1193 0
+	.loc 2 1235 0
+	tbnz	w0, #31, .L732
+	.loc 2 1242 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L725
-.L772:
-	.loc 2 1195 0
+	bgt	.L732
+.L779:
+	.loc 2 1244 0
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-	.loc 2 1196 0
+	.loc 2 1245 0
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
-	.loc 2 1197 0
+	.loc 2 1246 0
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L790:
-	.loc 2 1241 0
+.L797:
+	.loc 2 1290 0
 	strh	w26, [x1, x0, lsl 1]
-	b	.L725
-.LVL1019:
-.L736:
-	.loc 2 1177 0 discriminator 3
+	b	.L732
+.LVL1021:
+.L743:
+	.loc 2 1226 0 discriminator 3
 	sxtw	x2, w1
 	add	w1, w1, 1
-.LVL1020:
+.LVL1022:
 	lsl	x7, x2, 2
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	lsl	x2, x2, 1
-	.loc 2 1177 0 discriminator 3
+	.loc 2 1226 0 discriminator 3
 	add	x11, x5, x7
 	sxth	w1, w1
-.LVL1021:
+.LVL1023:
 	ldr	w11, [x11, 4]
 	str	w11, [x5, x7]
-	.loc 2 1178 0 discriminator 3
+	.loc 2 1227 0 discriminator 3
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L735
-.LVL1022:
-.L733:
-	sub	w0, w0, #1
-.LVL1023:
-	sxth	x0, w0
+	b	.L742
 .LVL1024:
-	b	.L732
+.L740:
+	sub	w0, w0, #1
 .LVL1025:
-.L728:
-	.loc 2 1203 0
+	sxth	x0, w0
+.LVL1026:
+	b	.L739
+.LVL1027:
+.L735:
+	.loc 2 1252 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L741
-	.loc 2 1203 0 is_stmt 0 discriminator 1
+	bls	.L748
+	.loc 2 1252 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
-	mov	w2, 1203
+	mov	w2, 1252
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1026:
-.L741:
-	.loc 2 1204 0 is_stmt 1
+.LVL1028:
+.L748:
+	.loc 2 1253 0 is_stmt 1
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
-.LVL1027:
+.LVL1029:
 	sub	w5, w1, w2
-	.loc 2 1206 0
+	.loc 2 1255 0
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L742:
-	.loc 2 1204 0 discriminator 1
+.L749:
+	.loc 2 1253 0 discriminator 1
 	cmp	w0, w5
-	ble	.L747
-	.loc 2 1206 0
+	ble	.L754
+	.loc 2 1255 0
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L743
-	.loc 2 1208 0
+	bls	.L750
+	.loc 2 1257 0
 	ldr	w5, [x1]
-	cbnz	w5, .L744
-	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cbnz	w5, .L751
+	.loc 2 1257 0 is_stmt 0 discriminator 1
 	cmp	w6, w2
-	beq	.L744
-	.loc 2 1216 0 is_stmt 1
+	beq	.L751
+	.loc 2 1265 0 is_stmt 1
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L744:
-	.loc 2 1221 0 discriminator 1
+.L751:
+	.loc 2 1270 0 discriminator 1
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L745:
-.LVL1028:
-	.loc 2 1218 0 discriminator 1
+.L752:
+.LVL1030:
+	.loc 2 1267 0 discriminator 1
 	cmp	w2, w0
-	bne	.L746
-	.loc 2 1223 0
+	bne	.L753
+	.loc 2 1272 0
 	ldr	w2, [x27, 4]
-.LVL1029:
+.LVL1031:
 	str	w2, [x10]
-	.loc 2 1224 0
+	.loc 2 1273 0
 	strh	w26, [x6, x7, lsl 1]
-.L747:
-	.loc 2 1229 0
-	tbnz	w0, #31, .L725
-	.loc 2 1237 0
+.L754:
+	.loc 2 1278 0
+	tbnz	w0, #31, .L732
+	.loc 2 1286 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L725
-	.loc 2 1239 0
+	bgt	.L732
+	.loc 2 1288 0
 	add	w5, w5, 1
-	.loc 2 1240 0
+	.loc 2 1289 0
 	ldr	w2, [x27, 4]
-	.loc 2 1239 0
+	.loc 2 1288 0
 	strh	w5, [x23, #:lo12:.LANCHOR35]
-	.loc 2 1240 0
+	.loc 2 1289 0
 	str	w2, [x1, x0, lsl 2]
-	.loc 2 1241 0
+	.loc 2 1290 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L790
-.LVL1030:
-.L746:
-	.loc 2 1220 0 discriminator 3
+	b	.L797
+.LVL1032:
+.L753:
+	.loc 2 1269 0 discriminator 3
 	sxtw	x5, w2
 	add	w2, w2, 1
-.LVL1031:
+.LVL1033:
 	lsl	x8, x5, 2
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	lsl	x5, x5, 1
-	.loc 2 1220 0 discriminator 3
+	.loc 2 1269 0 discriminator 3
 	add	x11, x1, x8
 	sxth	w2, w2
-.LVL1032:
+.LVL1034:
 	ldr	w11, [x11, 4]
 	str	w11, [x1, x8]
-	.loc 2 1221 0 discriminator 3
+	.loc 2 1270 0 discriminator 3
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L745
-.LVL1033:
-.L743:
-	sub	w0, w0, #1
-.LVL1034:
-	sxth	x0, w0
+	b	.L752
 .LVL1035:
-	b	.L742
+.L750:
+	sub	w0, w0, #1
 .LVL1036:
-.L726:
-	.loc 2 1248 0
-	ldrh	w5, [x24, #:lo12:.LANCHOR81]
+	sxth	x0, w0
+.LVL1037:
+	b	.L749
+.LVL1038:
+.L733:
+	.loc 2 1297 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR79]
 	mov	w1, 65535
-	add	x2, x24, :lo12:.LANCHOR81
+	add	x2, x24, :lo12:.LANCHOR79
 	cmp	w5, w1
-	bne	.L749
-	.loc 2 1250 0
-	strh	w26, [x24, #:lo12:.LANCHOR81]
-	.loc 2 1251 0
+	bne	.L756
+	.loc 2 1299 0
+	strh	w26, [x24, #:lo12:.LANCHOR79]
+	.loc 2 1300 0
 	str	w0, [x2, 8]
-	b	.L725
-.L749:
-	.loc 2 1255 0
+	b	.L732
+.L756:
+	.loc 2 1304 0
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L750
-	.loc 2 1256 0
+	beq	.L757
+	.loc 2 1305 0
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL1037:
-.L750:
-	.loc 2 1257 0
-	add	x0, x24, :lo12:.LANCHOR81
+.LVL1039:
+.L757:
+	.loc 2 1306 0
+	add	x0, x24, :lo12:.LANCHOR79
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L751
-	.loc 2 1259 0
-	ldrh	w2, [x24, #:lo12:.LANCHOR81]
+	bcs	.L758
+	.loc 2 1308 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR79]
 	strh	w2, [x0, 4]
-	.loc 2 1260 0
-	strh	w26, [x24, #:lo12:.LANCHOR81]
-	.loc 2 1261 0
+	.loc 2 1309 0
+	strh	w26, [x24, #:lo12:.LANCHOR79]
+	.loc 2 1310 0
 	str	w1, [x0, 8]
-	b	.L725
-.L751:
-	.loc 2 1265 0
+	b	.L732
+.L758:
+	.loc 2 1314 0
 	strh	w26, [x0, 4]
-	b	.L725
-.LVL1038:
-.L754:
-	.loc 2 1292 0
+	b	.L732
+.LVL1040:
+.L761:
+	.loc 2 1341 0
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L756
-.L759:
-	.loc 2 1310 0
+	cbz	w0, .L763
+.L766:
+	.loc 2 1359 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L757
-.L758:
-	.loc 2 1328 0
+	cbz	w0, .L764
+.L765:
+	.loc 2 1377 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L788
-	.loc 2 1328 0 is_stmt 0 discriminator 1
+	bls	.L795
+	.loc 2 1377 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
-	mov	w2, 1328
+	mov	w2, 1377
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1039:
-.L788:
-	.loc 2 1330 0 is_stmt 1
+.LVL1041:
+.L795:
+	.loc 2 1379 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9878,117 +9990,117 @@ FtlScanSysBlk:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1040:
+.LVL1042:
 	ret
-.LVL1041:
-.L756:
+.LVL1043:
+.L763:
 	.cfi_restore_state
-	.loc 2 1292 0 discriminator 1
+	.loc 2 1341 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR147]
-	cbz	w0, .L759
-	.loc 2 1294 0 discriminator 1
+	cbz	w0, .L766
+	.loc 2 1343 0 discriminator 1
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L760:
-.LVL1042:
+.L767:
+.LVL1044:
 	cmp	w0, w1
-	bcs	.L759
-	.loc 2 1296 0
+	bcs	.L766
+	.loc 2 1345 0
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L761
-	.loc 2 1301 0
+	cbz	w3, .L768
+	.loc 2 1350 0
 	ldr	x1, [x29, 152]
-	.loc 2 1298 0
+	.loc 2 1347 0
 	add	x7, x21, :lo12:.LANCHOR30
-	.loc 2 1301 0
+	.loc 2 1350 0
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L762:
-.LVL1043:
-	.loc 2 1298 0 discriminator 1
+.L769:
+.LVL1045:
+	.loc 2 1347 0 discriminator 1
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L759
-	.loc 2 1300 0 discriminator 3
+	bcs	.L766
+	.loc 2 1349 0 discriminator 3
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
 	sxtw	x3, w3
 	add	w1, w1, 1
-.LVL1044:
-	.loc 2 1301 0 discriminator 3
+.LVL1046:
+	.loc 2 1350 0 discriminator 3
 	ldr	w6, [x4, x6, lsl 2]
 	sxth	w1, w1
-.LVL1045:
-	.loc 2 1300 0 discriminator 3
+.LVL1047:
+	.loc 2 1349 0 discriminator 3
 	ldrh	w8, [x2, x5]
 	strh	w8, [x2, x3, lsl 1]
-	.loc 2 1301 0 discriminator 3
+	.loc 2 1350 0 discriminator 3
 	str	w6, [x4, x3, lsl 2]
-	.loc 2 1302 0 discriminator 3
+	.loc 2 1351 0 discriminator 3
 	strh	wzr, [x2, x5]
-	b	.L762
-.LVL1046:
-.L761:
-	add	w0, w0, 1
-.LVL1047:
-	sxth	w0, w0
+	b	.L769
 .LVL1048:
-	b	.L760
+.L768:
+	add	w0, w0, 1
 .LVL1049:
-.L757:
-	.loc 2 1310 0 discriminator 1
+	sxth	w0, w0
+.LVL1050:
+	b	.L767
+.LVL1051:
+.L764:
+	.loc 2 1359 0 discriminator 1
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L758
-	.loc 2 1312 0 discriminator 1
+	cbz	w0, .L765
+	.loc 2 1361 0 discriminator 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L767:
-.LVL1050:
+.L774:
+.LVL1052:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L758
-	.loc 2 1314 0
+	bge	.L765
+	.loc 2 1363 0
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L768
-	.loc 2 1319 0
+	cbz	w3, .L775
+	.loc 2 1368 0
 	ldr	x2, [x29, 144]
-	.loc 2 1316 0
+	.loc 2 1365 0
 	add	x19, x19, :lo12:.LANCHOR27
-	.loc 2 1319 0
+	.loc 2 1368 0
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.LVL1051:
-.L769:
-	.loc 2 1316 0 discriminator 1
+.LVL1053:
+.L776:
+	.loc 2 1365 0 discriminator 1
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L758
-	.loc 2 1318 0 discriminator 3
+	bge	.L765
+	.loc 2 1367 0 discriminator 3
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
 	sxtw	x2, w2
 	add	w0, w0, 1
-.LVL1052:
-	.loc 2 1319 0 discriminator 3
+.LVL1054:
+	.loc 2 1368 0 discriminator 3
 	ldr	w5, [x3, x5, lsl 2]
 	sxth	w0, w0
-.LVL1053:
-	.loc 2 1318 0 discriminator 3
+.LVL1055:
+	.loc 2 1367 0 discriminator 3
 	ldrh	w7, [x1, x4]
 	strh	w7, [x1, x2, lsl 1]
-	.loc 2 1319 0 discriminator 3
+	.loc 2 1368 0 discriminator 3
 	str	w5, [x3, x2, lsl 2]
-	.loc 2 1320 0 discriminator 3
+	.loc 2 1369 0 discriminator 3
 	strh	wzr, [x1, x4]
-	b	.L769
-.LVL1054:
-.L768:
+	b	.L776
+.LVL1056:
+.L775:
 	add	w0, w0, 1
-.LVL1055:
+.LVL1057:
 	sxth	w0, w0
-.LVL1056:
-	b	.L767
+.LVL1058:
+	b	.L774
 	.cfi_endproc
 .LFE270:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -9998,16 +10110,16 @@ FtlScanSysBlk:
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
 .LFB275:
-	.loc 2 1466 0
+	.loc 2 1515 0
 	.cfi_startproc
-.LVL1057:
+.LVL1059:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
 	.cfi_offset 30, -136
-	.loc 2 1477 0
+	.loc 2 1526 0
 	mov	w1, 0
-	.loc 2 1466 0
+	.loc 2 1515 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -10015,166 +10127,166 @@ FtlMapTblRecovery:
 	.cfi_offset 20, -120
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	.loc 2 1478 0
-	adrp	x20, .LANCHOR108
+	.loc 2 1527 0
+	adrp	x20, .LANCHOR106
 	.cfi_offset 23, -96
 	.cfi_offset 24, -88
-	.loc 2 1473 0
+	.loc 2 1522 0
 	ldrh	w23, [x0, 6]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	adrp	x24, .LANCHOR20
-	.loc 2 1466 0
+	.loc 2 1515 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -112
 	.cfi_offset 22, -104
-	.loc 2 1470 0
+	.loc 2 1519 0
 	ldr	x21, [x0, 40]
-.LVL1058:
-	.loc 2 1471 0
+.LVL1060:
+	.loc 2 1520 0
 	ldr	x22, [x0, 16]
-.LVL1059:
-	.loc 2 1477 0
+.LVL1061:
+	.loc 2 1526 0
 	lsl	w2, w23, 2
-	.loc 2 1472 0
+	.loc 2 1521 0
 	ldr	x0, [x0, 24]
-.LVL1060:
+.LVL1062:
 	str	x0, [x29, 128]
-.LVL1061:
-	.loc 2 1474 0
+.LVL1063:
+	.loc 2 1523 0
 	ldrh	w0, [x19, 8]
-.LVL1062:
-	.loc 2 1466 0
+.LVL1064:
+	.loc 2 1515 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 25, -80
 	.cfi_offset 26, -72
 	.cfi_offset 27, -64
 	.cfi_offset 28, -56
-	.loc 2 1486 0
+	.loc 2 1535 0
 	mov	w27, 0
-	.loc 2 1474 0
+	.loc 2 1523 0
 	str	w0, [x29, 140]
-.LVL1063:
-	.loc 2 1477 0
+.LVL1065:
+	.loc 2 1526 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1064:
+.LVL1066:
 	str	x20, [x29, 120]
-	.loc 2 1478 0
-	adrp	x7, .LANCHOR39
-	add	x3, x20, :lo12:.LANCHOR108
+	.loc 2 1527 0
+	adrp	x7, .LANCHOR107
+	add	x3, x20, :lo12:.LANCHOR106
 	mov	x26, x7
-	.loc 2 1510 0
+	.loc 2 1559 0
 	mov	x20, x3
-	.loc 2 1478 0
-	ldr	x0, [x7, #:lo12:.LANCHOR39]
+	.loc 2 1527 0
+	ldr	x0, [x7, #:lo12:.LANCHOR107]
 	str	x0, [x3, 8]
-	.loc 2 1479 0
-	adrp	x0, .LANCHOR109
-	.loc 2 1483 0
+	.loc 2 1528 0
+	adrp	x0, .LANCHOR108
+	.loc 2 1532 0
 	stp	wzr, wzr, [x19, 48]
-	.loc 2 1479 0
-	ldr	x25, [x0, #:lo12:.LANCHOR109]
-	.loc 2 1481 0
+	.loc 2 1528 0
+	ldr	x25, [x0, #:lo12:.LANCHOR108]
+	.loc 2 1530 0
 	mov	w0, -1
-	.loc 2 1479 0
+	.loc 2 1528 0
 	str	x25, [x3, 16]
-.LVL1065:
-	.loc 2 1481 0
+.LVL1067:
+	.loc 2 1530 0
 	strh	w0, [x19]
-	.loc 2 1482 0
+	.loc 2 1531 0
 	strh	w0, [x19, 2]
-	.loc 2 1485 0
+	.loc 2 1534 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-.LVL1066:
-	.loc 2 1488 0
+.LVL1068:
+	.loc 2 1537 0
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	str	w0, [x29, 136]
-	.loc 2 1530 0
+	.loc 2 1579 0
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.LVL1067:
-.L793:
-	.loc 2 1486 0 discriminator 1
+.LVL1069:
+.L799:
+	.loc 2 1535 0 discriminator 1
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L810
-	.loc 2 1488 0
+	bge	.L816
+	.loc 2 1537 0
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L794
-	.loc 2 1490 0
+	bne	.L800
+	.loc 2 1539 0
 	lsl	x0, x28, 1
 	mov	w1, 1
 	add	x24, x22, x0
 	ldrh	w0, [x22, x0]
-	.loc 2 1494 0
+	.loc 2 1543 0
 	mov	w22, 0
-.LVL1068:
-	.loc 2 1490 0
+.LVL1070:
+	.loc 2 1539 0
 	bl	FtlGetLastWrittenPage
-.LVL1069:
+.LVL1071:
 	sxth	w26, w0
-.LVL1070:
-	.loc 2 1491 0
+.LVL1072:
+	.loc 2 1540 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-	.loc 2 1493 0
+	.loc 2 1542 0
 	ldr	x0, [x29, 128]
-	.loc 2 1492 0
+	.loc 2 1541 0
 	strh	w27, [x19]
-	.loc 2 1493 0
+	.loc 2 1542 0
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.LVL1071:
-	.loc 2 1496 0
+.LVL1073:
+	.loc 2 1545 0
 	ldr	x0, [x29, 120]
-	add	x20, x0, :lo12:.LANCHOR108
-.LVL1072:
-.L795:
-	.loc 2 1494 0 discriminator 1
+	add	x20, x0, :lo12:.LANCHOR106
+.LVL1074:
+.L801:
+	.loc 2 1543 0 discriminator 1
 	cmp	w22, w26
-	ble	.L797
-.LVL1073:
-.L810:
-	.loc 2 1547 0
+	ble	.L803
+.LVL1075:
+.L816:
+	.loc 2 1596 0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-.LVL1074:
-	.loc 2 1548 0
+.LVL1076:
+	.loc 2 1597 0
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L799
-	.loc 2 1550 0
+	bne	.L805
+	.loc 2 1599 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1075:
-.L799:
-	.loc 2 1553 0
+.LVL1077:
+.L805:
+	.loc 2 1602 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1076:
-	.loc 2 1555 0
+.LVL1078:
+	.loc 2 1604 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1077:
-	.loc 2 1557 0
+.LVL1079:
+	.loc 2 1606 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1078:
+.LVL1080:
 	ldp	x21, x22, [sp, 32]
-.LVL1079:
+.LVL1081:
 	ldp	x23, x24, [sp, 48]
-.LVL1080:
+.LVL1082:
 	ldp	x25, x26, [sp, 64]
-.LVL1081:
+.LVL1083:
 	ldp	x27, x28, [sp, 80]
-.LVL1082:
+.LVL1084:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -10190,174 +10302,174 @@ FtlMapTblRecovery:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1083:
+.LVL1085:
 	ret
-.LVL1084:
-.L797:
+.LVL1086:
+.L803:
 	.cfi_restore_state
-	.loc 2 1496 0
+	.loc 2 1545 0
 	ldrh	w0, [x24]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1496 0
+	.loc 2 1545 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1497 0
+	.loc 2 1546 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1085:
-	.loc 2 1500 0
+.LVL1087:
+	.loc 2 1549 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L796
-	.loc 2 1502 0
+	beq	.L802
+	.loc 2 1551 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L796
-	.loc 2 1502 0 is_stmt 0 discriminator 1
+	bls	.L802
+	.loc 2 1551 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L796
-	.loc 2 1504 0 is_stmt 1
+	bne	.L802
+	.loc 2 1553 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L796:
+.L802:
 	add	w22, w22, 1
-.LVL1086:
-	sxth	w22, w22
-.LVL1087:
-	b	.L795
 .LVL1088:
-.L794:
-	.loc 2 1510 0
-	ldr	x0, [x26, #:lo12:.LANCHOR39]
-	.loc 2 1512 0
+	sxth	w22, w22
+.LVL1089:
+	b	.L801
+.LVL1090:
+.L800:
+	.loc 2 1559 0
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	.loc 2 1561 0
 	mov	w2, 1
-	.loc 2 1510 0
+	.loc 2 1559 0
 	str	x0, [x20, 8]
-	.loc 2 1511 0
+	.loc 2 1560 0
 	lsl	x0, x28, 1
 	ldrh	w1, [x24, #:lo12:.LANCHOR20]
 	add	x28, x22, x0
 	ldrh	w0, [x22, x0]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1512 0
+	.loc 2 1561 0
 	mov	w1, w2
-	.loc 2 1511 0
+	.loc 2 1560 0
 	str	w0, [x20, 4]
-	.loc 2 1512 0
+	.loc 2 1561 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1089:
-	.loc 2 1515 0
+.LVL1091:
+	.loc 2 1564 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L812
-	.loc 2 1515 0 is_stmt 0 discriminator 1
+	beq	.L818
+	.loc 2 1564 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L812
-	.loc 2 1515 0 discriminator 2
+	bne	.L818
+	.loc 2 1564 0 discriminator 2
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L801
-.L812:
+	beq	.L807
+.L818:
 	mov	w5, 0
-.L802:
-.LVL1090:
-	.loc 2 1530 0 is_stmt 1 discriminator 1
+.L808:
+.LVL1092:
+	.loc 2 1579 0 is_stmt 1 discriminator 1
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L808
-	.loc 2 1532 0
+	bge	.L814
+	.loc 2 1581 0
 	ldrh	w0, [x28]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	w2, 1
-	.loc 2 1532 0
+	.loc 2 1581 0
 	str	w5, [x29, 108]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	w1, w2
-	.loc 2 1532 0
+	.loc 2 1581 0
 	orr	w0, w5, w0, lsl 10
 	str	w0, [x20, 4]
-	.loc 2 1533 0
+	.loc 2 1582 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1091:
-	.loc 2 1536 0
+.LVL1093:
+	.loc 2 1585 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L806
-	.loc 2 1538 0
+	beq	.L812
+	.loc 2 1587 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L806
-	.loc 2 1538 0 is_stmt 0 discriminator 1
+	bls	.L812
+	.loc 2 1587 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L806
-	.loc 2 1540 0 is_stmt 1
+	bne	.L812
+	.loc 2 1589 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L806:
+.L812:
 	add	w5, w5, 1
 	sxth	w5, w5
-.LVL1092:
-	b	.L802
-.LVL1093:
-.L801:
-	.loc 2 1518 0 discriminator 1
+.LVL1094:
+	b	.L808
+.LVL1095:
+.L807:
+	.loc 2 1567 0 discriminator 1
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
-	.loc 2 1520 0 discriminator 1
+	.loc 2 1569 0 discriminator 1
 	mov	w0, 0
-	ldr	x10, [x26, #:lo12:.LANCHOR39]
-	.loc 2 1518 0 discriminator 1
+	ldr	x10, [x26, #:lo12:.LANCHOR107]
+	.loc 2 1567 0 discriminator 1
 	sub	w5, w5, #1
-.L803:
-.LVL1094:
+.L809:
+.LVL1096:
 	cmp	w0, w5
-	blt	.L805
-.LVL1095:
-.L808:
+	blt	.L811
+.LVL1097:
+.L814:
 	add	w4, w27, 1
 	sxth	w27, w4
-.LVL1096:
-	b	.L793
-.LVL1097:
-.L805:
-	.loc 2 1520 0
+.LVL1098:
+	b	.L799
+.LVL1099:
+.L811:
+	.loc 2 1569 0
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
-.LVL1098:
-	.loc 2 1521 0
+.LVL1100:
+	.loc 2 1570 0
 	cmp	w23, w1
-	bls	.L804
-	.loc 2 1523 0
+	bls	.L810
+	.loc 2 1572 0
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-.LVL1099:
+.LVL1101:
 	ldr	w2, [x10, x2, lsl 2]
-.LVL1100:
+.LVL1102:
 	str	w2, [x21, x1]
-.LVL1101:
-.L804:
+.LVL1103:
+.L810:
 	add	w0, w0, 1
-.LVL1102:
+.LVL1104:
 	sxth	w0, w0
-.LVL1103:
-	b	.L803
+.LVL1105:
+	b	.L809
 	.cfi_endproc
 .LFE275:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -10367,53 +10479,53 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 .LFB276:
-	.loc 2 1560 0
+	.loc 2 1609 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-	.loc 2 1561 0
+	.loc 2 1610 0
 	adrp	x1, .LANCHOR27
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 1560 0
+	.loc 2 1609 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 1561 0
+	.loc 2 1610 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR27]
 	strh	w1, [x0, 10]
-	.loc 2 1562 0
+	.loc 2 1611 0
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	.loc 2 1563 0
+	.loc 2 1612 0
 	adrp	x1, .LANCHOR35
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	strh	w1, [x0, 8]
-	.loc 2 1564 0
+	.loc 2 1613 0
 	adrp	x1, .LANCHOR28
 	ldrh	w1, [x1, #:lo12:.LANCHOR28]
 	strh	w1, [x0, 6]
-	.loc 2 1565 0
+	.loc 2 1614 0
 	adrp	x1, .LANCHOR36
 	ldr	x1, [x1, #:lo12:.LANCHOR36]
 	str	x1, [x0, 16]
-	.loc 2 1566 0
+	.loc 2 1615 0
 	adrp	x1, .LANCHOR132
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	str	x1, [x0, 24]
-	.loc 2 1567 0
+	.loc 2 1616 0
 	adrp	x1, .LANCHOR131
 	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	str	x1, [x0, 32]
-	.loc 2 1568 0
+	.loc 2 1617 0
 	adrp	x1, .LANCHOR133
 	ldr	x1, [x1, #:lo12:.LANCHOR133]
 	str	x1, [x0, 40]
-	.loc 2 1570 0
+	.loc 2 1619 0
 	bl	FtlMapTblRecovery
-.LVL1104:
-	.loc 2 1573 0
+.LVL1106:
+	.loc 2 1622 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -10429,113 +10541,113 @@ FtlLoadVonderInfo:
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
 .LFB277:
-	.loc 2 1576 0
+	.loc 2 1625 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 1578 0
+	.loc 2 1627 0
 	mov	w1, 0
-	.loc 2 1576 0
+	.loc 2 1625 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 1578 0
+	.loc 2 1627 0
 	adrp	x19, .LANCHOR130
 	adrp	x20, .LANCHOR30
-	.loc 2 1576 0
+	.loc 2 1625 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1578 0
+	.loc 2 1627 0
 	ldr	x0, [x19, #:lo12:.LANCHOR130]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
-	.loc 2 1579 0
+	.loc 2 1628 0
 	adrp	x22, .LANCHOR23
-	.loc 2 1578 0
+	.loc 2 1627 0
 	ldr	w2, [x20, #:lo12:.LANCHOR30]
-	.loc 2 1579 0
+	.loc 2 1628 0
 	adrp	x21, .LANCHOR33
-	.loc 2 1576 0
+	.loc 2 1625 0
 	str	x23, [sp, 48]
 	.cfi_offset 23, -16
-	.loc 2 1579 0
+	.loc 2 1628 0
 	adrp	x23, .LANCHOR136
-	.loc 2 1578 0
+	.loc 2 1627 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1105:
-	.loc 2 1579 0
+.LVL1107:
+	.loc 2 1628 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR23]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR136]
 	bl	ftl_memset
-.LVL1106:
-	adrp	x0, .LANCHOR56
+.LVL1108:
+	adrp	x0, .LANCHOR55
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
-	.loc 2 1584 0
+	.loc 2 1633 0
 	ldr	x6, [x23, #:lo12:.LANCHOR136]
-	.loc 2 1580 0
+	.loc 2 1629 0
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldr	x0, [x0, #:lo12:.LANCHOR55]
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.LVL1107:
-.L823:
+.LVL1109:
+.L829:
 	add	x4, x1, x5
-	.loc 2 1580 0 is_stmt 0 discriminator 1
+	.loc 2 1629 0 is_stmt 0 discriminator 1
 	cmp	x0, x3
-	bne	.L824
-	.loc 2 1586 0 is_stmt 1
+	bne	.L830
+	.loc 2 1635 0 is_stmt 1
 	adrp	x1, .LANCHOR144
 	add	x0, x1, :lo12:.LANCHOR144
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldp	x21, x22, [sp, 32]
-	.loc 2 1587 0
+	.loc 2 1636 0
 	strh	w2, [x1, #:lo12:.LANCHOR144]
-	.loc 2 1588 0
+	.loc 2 1637 0
 	ldr	w1, [x20, #:lo12:.LANCHOR30]
 	strh	w1, [x0, 10]
-	.loc 2 1589 0
+	.loc 2 1638 0
 	mov	w1, -3902
 	strh	w1, [x0, 4]
-	.loc 2 1590 0
+	.loc 2 1639 0
 	adrp	x1, .LANCHOR147
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldr	x23, [sp, 48]
-	.loc 2 1586 0
+	.loc 2 1635 0
 	strh	w2, [x0, 2]
-	.loc 2 1590 0
+	.loc 2 1639 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR147]
 	strh	w1, [x0, 8]
-	.loc 2 1591 0
+	.loc 2 1640 0
 	adrp	x1, .LANCHOR32
 	ldrh	w1, [x1, #:lo12:.LANCHOR32]
 	strh	w1, [x0, 6]
-	.loc 2 1592 0
+	.loc 2 1641 0
 	adrp	x1, .LANCHOR129
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
 	str	x1, [x0, 16]
-	.loc 2 1593 0
+	.loc 2 1642 0
 	adrp	x1, .LANCHOR135
 	ldr	x1, [x1, #:lo12:.LANCHOR135]
 	str	x1, [x0, 24]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	ldr	x1, [x19, #:lo12:.LANCHOR130]
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldp	x19, x20, [sp, 16]
-	.loc 2 1594 0
+	.loc 2 1643 0
 	str	x1, [x0, 32]
-	.loc 2 1595 0
+	.loc 2 1644 0
 	adrp	x1, .LANCHOR134
 	ldr	x1, [x1, #:lo12:.LANCHOR134]
 	str	x1, [x0, 40]
-	.loc 2 1596 0
+	.loc 2 1645 0
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
 	.cfi_restore 30
@@ -10547,21 +10659,21 @@ FtlL2PDataInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L824:
+.L830:
 	.cfi_restore_state
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	and	x1, x1, -4
-	.loc 2 1583 0 discriminator 3
+	.loc 2 1632 0 discriminator 3
 	strh	w2, [x0]
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	add	x1, x6, x1
-	.loc 2 1582 0 discriminator 3
+	.loc 2 1631 0 discriminator 3
 	str	wzr, [x0, 4]
-	.loc 2 1584 0 discriminator 3
+	.loc 2 1633 0 discriminator 3
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L823
+	b	.L829
 	.cfi_endproc
 .LFE277:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -10571,7 +10683,7 @@ FtlL2PDataInit:
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
 .LFB278:
-	.loc 2 1599 0
+	.loc 2 1648 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -10579,15 +10691,15 @@ FtlLoadMapInfo:
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 1600 0
+	.loc 2 1649 0
 	bl	FtlL2PDataInit
-.LVL1108:
-	.loc 2 1602 0
+.LVL1110:
+	.loc 2 1651 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapTblRecovery
-.LVL1109:
-	.loc 2 1605 0
+.LVL1111:
+	.loc 2 1654 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -10603,42 +10715,38 @@ FtlLoadMapInfo:
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
 .LFB207:
-	.loc 3 493 0
+	.loc 3 494 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 3 496 0
-	adrp	x0, .LANCHOR150
 	.loc 3 497 0
+	adrp	x0, .LANCHOR150
 	mov	w1, -1
-	.loc 3 493 0
+	.loc 3 494 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 3 496 0
-	str	xzr, [x0, #:lo12:.LANCHOR150]
 	.loc 3 497 0
+	strh	w1, [x0, #:lo12:.LANCHOR150]
+	.loc 3 498 0
 	adrp	x0, .LANCHOR151
-	.loc 3 493 0
+	.loc 3 500 0
+	mov	w1, -1
+	.loc 3 494 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 3 503 0
-	adrp	x19, .LANCHOR6
-	.loc 3 497 0
-	strh	w1, [x0, #:lo12:.LANCHOR151]
 	.loc 3 498 0
+	str	wzr, [x0, #:lo12:.LANCHOR151]
+	.loc 3 499 0
 	adrp	x0, .LANCHOR152
-	.loc 3 500 0
-	mov	w1, -1
-	.loc 3 498 0
-	str	wzr, [x0, #:lo12:.LANCHOR152]
+	.loc 3 503 0
+	adrp	x19, .LANCHOR6
 	.loc 3 499 0
-	adrp	x0, .LANCHOR153
-	str	wzr, [x0, #:lo12:.LANCHOR153]
+	str	wzr, [x0, #:lo12:.LANCHOR152]
 	.loc 3 500 0
-	adrp	x0, .LANCHOR154
-	str	w1, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR153
+	str	w1, [x0, #:lo12:.LANCHOR153]
 	.loc 3 501 0
 	adrp	x0, .LANCHOR35
 	.loc 3 502 0
@@ -10652,15 +10760,15 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1110:
+.LVL1112:
 	.loc 3 503 0
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR43
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1111:
+.LVL1113:
 	.loc 3 504 0
 	adrp	x0, .LANCHOR126
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
@@ -10668,27 +10776,27 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1112:
+.LVL1114:
 	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR79
-	add	x0, x0, :lo12:.LANCHOR79
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
 	bl	ftl_memset
-.LVL1113:
+.LVL1115:
 	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	bl	ftl_memset
-.LVL1114:
+.LVL1116:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1115:
+.LVL1117:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1116:
+.LVL1118:
 	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
@@ -10707,221 +10815,221 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 .LFB285:
-	.loc 2 2067 0
+	.loc 2 2116 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 2 2071 0
+	.loc 2 2120 0
 	adrp	x0, .LANCHOR6
 	mov	w1, 0
-	.loc 2 2067 0
+	.loc 2 2116 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 2071 0
+	.loc 2 2120 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	mov	w0, 6
-	.loc 2 2067 0
+	.loc 2 2116 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 2 2071 0
-	adrp	x24, .LANCHOR41
-	.loc 2 2067 0
+	.loc 2 2120 0
+	adrp	x24, .LANCHOR40
+	.loc 2 2116 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2075 0
+	.loc 2 2124 0
 	adrp	x23, .LANCHOR45
-	.loc 2 2067 0
+	.loc 2 2116 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 2 2076 0
+	.loc 2 2125 0
 	adrp	x22, .LANCHOR48
-	.loc 2 2071 0
+	.loc 2 2120 0
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR41]
-	.loc 2 2067 0
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
+	.loc 2 2116 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
-	.loc 2 2079 0
+	.loc 2 2128 0
 	adrp	x25, .LANCHOR5
-	.loc 2 2067 0
+	.loc 2 2116 0
 	str	x27, [sp, 80]
 	.cfi_offset 27, -16
-	.loc 2 2082 0
+	.loc 2 2131 0
 	adrp	x26, .LANCHOR13
-	.loc 2 2079 0
+	.loc 2 2128 0
 	add	x25, x25, :lo12:.LANCHOR5
-	.loc 2 2082 0
+	.loc 2 2131 0
 	add	x26, x26, :lo12:.LANCHOR13
-	.loc 2 2071 0
+	.loc 2 2120 0
 	bl	ftl_memset
-.LVL1117:
-	.loc 2 2077 0
+.LVL1119:
+	.loc 2 2126 0
 	mov	w21, 0
-	.loc 2 2072 0
+	.loc 2 2121 0
 	adrp	x0, .LANCHOR47
-	.loc 2 2077 0
+	.loc 2 2126 0
 	mov	w20, 0
-	.loc 2 2079 0
+	.loc 2 2128 0
 	mov	w19, 0
-	.loc 2 2075 0
+	.loc 2 2124 0
 	strh	wzr, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2072 0
+	.loc 2 2121 0
 	str	xzr, [x0, #:lo12:.LANCHOR47]
-	.loc 2 2073 0
-	adrp	x0, .LANCHOR42
-	.loc 2 2076 0
+	.loc 2 2122 0
+	adrp	x0, .LANCHOR41
+	.loc 2 2125 0
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
-.LVL1118:
-	.loc 2 2081 0
+.LVL1120:
+	.loc 2 2130 0
 	adrp	x27, .LANCHOR3
-	.loc 2 2073 0
-	str	xzr, [x0, #:lo12:.LANCHOR42]
-	.loc 2 2074 0
+	.loc 2 2122 0
+	str	xzr, [x0, #:lo12:.LANCHOR41]
+	.loc 2 2123 0
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.LVL1119:
-.L831:
-	.loc 2 2079 0 discriminator 1
+.LVL1121:
+.L837:
+	.loc 2 2128 0 discriminator 1
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L837
-	.loc 2 2084 0
+	bcs	.L843
+	.loc 2 2133 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2081 0
+	.loc 2 2130 0
 	ldrh	w8, [x27, #:lo12:.LANCHOR3]
-	.loc 2 2084 0
+	.loc 2 2133 0
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L838
-.LVL1120:
-.L833:
-	.loc 2 2082 0
+	b	.L844
+.LVL1122:
+.L839:
+	.loc 2 2131 0
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
-.LVL1121:
-	.loc 2 2083 0
-	bl	FtlBbmIsBadBlock
-.LVL1122:
-	cbnz	w0, .L832
-	.loc 2 2084 0
-	add	w5, w5, w7
 .LVL1123:
-	and	w5, w5, 65535
+	.loc 2 2132 0
+	bl	FtlBbmIsBadBlock
 .LVL1124:
-.L832:
-	add	x6, x6, 1
+	cbnz	w0, .L838
+	.loc 2 2133 0
+	add	w5, w5, w7
 .LVL1125:
+	and	w5, w5, 65535
+.LVL1126:
 .L838:
-	.loc 2 2081 0 discriminator 1
+	add	x6, x6, 1
+.LVL1127:
+.L844:
+	.loc 2 2130 0 discriminator 1
 	cmp	w8, w6, uxth
-	bhi	.L833
-	.loc 2 2086 0
-	cbz	w5, .L840
-	.loc 2 2087 0
+	bhi	.L839
+	.loc 2 2135 0
+	cbz	w5, .L846
+	.loc 2 2136 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL1126:
-.L834:
-	.loc 2 2088 0
-	ldr	x1, [x24, #:lo12:.LANCHOR41]
+.LVL1128:
+.L840:
+	.loc 2 2137 0
+	ldr	x1, [x24, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	umaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	.loc 2 2090 0
+	.loc 2 2139 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L835
-	.loc 2 2091 0 discriminator 1
+	beq	.L841
+	.loc 2 2140 0 discriminator 1
 	adrp	x0, .LANCHOR52
-	.loc 2 2090 0 discriminator 1
+	.loc 2 2139 0 discriminator 1
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L835
-	.loc 2 2092 0
+	beq	.L841
+	.loc 2 2141 0
 	adrp	x0, .LANCHOR53
-	.loc 2 2091 0
+	.loc 2 2140 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L835
-	.loc 2 2094 0
-	adrp	x1, .LANCHOR43
+	beq	.L841
+	.loc 2 2143 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L836
-	.loc 2 2095 0
+	cbnz	w0, .L842
+	.loc 2 2144 0
 	add	w21, w21, 1
-.LVL1127:
-	.loc 2 2096 0
+.LVL1129:
+	.loc 2 2145 0
 	mov	w0, w19
-	.loc 2 2095 0
+	.loc 2 2144 0
 	and	w21, w21, 65535
-.LVL1128:
-	.loc 2 2096 0
-	bl	INSERT_FREE_LIST
-.LVL1129:
-.L835:
-	.loc 2 2079 0 discriminator 2
-	add	w19, w19, 1
 .LVL1130:
-	and	w19, w19, 65535
+	.loc 2 2145 0
+	bl	INSERT_FREE_LIST
 .LVL1131:
-	b	.L831
+.L841:
+	.loc 2 2128 0 discriminator 2
+	add	w19, w19, 1
 .LVL1132:
-.L840:
-	mov	w5, 0
+	and	w19, w19, 65535
 .LVL1133:
-	b	.L834
+	b	.L837
 .LVL1134:
-.L836:
-	.loc 2 2098 0
-	add	w20, w20, 1
+.L846:
+	mov	w5, 0
 .LVL1135:
-	.loc 2 2099 0
+	b	.L840
+.LVL1136:
+.L842:
+	.loc 2 2147 0
+	add	w20, w20, 1
+.LVL1137:
+	.loc 2 2148 0
 	mov	w0, w19
-	.loc 2 2098 0
+	.loc 2 2147 0
 	and	w20, w20, 65535
-.LVL1136:
-	.loc 2 2099 0
+.LVL1138:
+	.loc 2 2148 0
 	bl	INSERT_DATA_LIST
-.LVL1137:
-	b	.L835
-.L837:
-	.loc 2 2103 0
+.LVL1139:
+	b	.L841
+.L843:
+	.loc 2 2152 0
 	strh	w20, [x23, #:lo12:.LANCHOR45]
-	.loc 2 2105 0
+	.loc 2 2154 0
 	add	w20, w20, w21
-.LVL1138:
-	.loc 2 2104 0
+.LVL1140:
+	.loc 2 2153 0
 	strh	w21, [x22, #:lo12:.LANCHOR48]
-	.loc 2 2105 0
+	.loc 2 2154 0
 	cmp	w20, w0
-	ble	.L839
-	.loc 2 2105 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR155
+	ble	.L845
+	.loc 2 2154 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC1
-	mov	w2, 2105
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 2154
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1139:
-.L839:
-	.loc 2 2107 0 is_stmt 1
+.LVL1141:
+.L845:
+	.loc 2 2156 0 is_stmt 1
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL1140:
+.LVL1142:
 	ldp	x21, x22, [sp, 32]
-.LVL1141:
+.LVL1143:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
@@ -10947,37 +11055,37 @@ SupperBlkListInit:
 	.type	ftl_check_vpc, %function
 ftl_check_vpc:
 .LFB290:
-	.loc 2 2223 0
+	.loc 2 2273 0
 	.cfi_startproc
-.LVL1142:
+.LVL1144:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-	.loc 2 2229 0
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
-	.loc 2 2223 0
+	.loc 2 2279 0
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	.loc 2 2273 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 2232 0
-	adrp	x23, .LANCHOR62
-	add	x23, x23, :lo12:.LANCHOR62
-	.loc 2 2223 0
+	.loc 2 2282 0
+	adrp	x23, .LANCHOR61
+	add	x23, x23, :lo12:.LANCHOR61
+	.loc 2 2273 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 2232 0
+	.loc 2 2282 0
 	mov	w22, 0
-	.loc 2 2223 0
+	.loc 2 2273 0
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	.loc 2 2229 0
-	adrp	x21, .LANCHOR156
-	.loc 2 2223 0
+	.loc 2 2279 0
+	adrp	x21, .LANCHOR155
+	.loc 2 2273 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
@@ -10985,99 +11093,99 @@ ftl_check_vpc:
 	.cfi_offset 26, -40
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 2229 0
-	add	x1, x21, :lo12:.LANCHOR156
-	.loc 2 2231 0
+	.loc 2 2279 0
+	add	x1, x21, :lo12:.LANCHOR155
+	.loc 2 2281 0
 	adrp	x20, check_vpc_table
-	.loc 2 2229 0
+	.loc 2 2279 0
 	bl	printf
-.LVL1143:
-	.loc 2 2231 0
+.LVL1145:
+	.loc 2 2281 0
 	add	x19, x20, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL1144:
-.L843:
-	.loc 2 2232 0 discriminator 1
+.LVL1146:
+.L849:
+	.loc 2 2282 0 discriminator 1
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L845
-	.loc 2 2243 0 discriminator 1
+	bcc	.L851
+	.loc 2 2293 0 discriminator 1
 	adrp	x22, .LANCHOR5
-.LVL1145:
-	.loc 2 2247 0 discriminator 1
-	adrp	x24, .LC92
-	.loc 2 2243 0 discriminator 1
+.LVL1147:
+	.loc 2 2297 0 discriminator 1
+	adrp	x24, .LC95
+	.loc 2 2293 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2245 0 discriminator 1
+	.loc 2 2295 0 discriminator 1
 	add	x26, x20, :lo12:check_vpc_table
-	.loc 2 2247 0 discriminator 1
-	add	x24, x24, :lo12:.LC92
+	.loc 2 2297 0 discriminator 1
+	add	x24, x24, :lo12:.LC95
 	mov	w23, 0
 	mov	w19, 0
-	.loc 2 2245 0 discriminator 1
-	adrp	x25, .LANCHOR43
-.LVL1146:
-.L846:
-	.loc 2 2243 0 discriminator 1
+	.loc 2 2295 0 discriminator 1
+	adrp	x25, .LANCHOR42
+.LVL1148:
+.L852:
+	.loc 2 2293 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L848
-	.loc 2 2255 0
+	bhi	.L854
+	.loc 2 2305 0
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-.LVL1147:
-	cbz	x19, .L849
-.LBB242:
-	.loc 2 2257 0
+.LVL1149:
+	cbz	x19, .L855
+.LBB277:
+	.loc 2 2307 0
 	adrp	x0, .LANCHOR48
-	.loc 2 2263 0
-	adrp	x25, .LC93
+	.loc 2 2313 0
+	adrp	x25, .LC96
 	add	x20, x20, :lo12:check_vpc_table
-	add	x25, x25, :lo12:.LC93
-	.loc 2 2257 0
+	add	x25, x25, :lo12:.LC96
+	.loc 2 2307 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-.LVL1148:
-	.loc 2 2258 0
-	adrp	x0, .LANCHOR41
+.LVL1150:
+	.loc 2 2308 0
+	adrp	x0, .LANCHOR40
 	mov	x24, x0
-	.loc 2 2259 0
+	.loc 2 2309 0
 	mov	w22, 0
-	.loc 2 2258 0
-	ldr	x1, [x0, #:lo12:.LANCHOR41]
-	.loc 2 2261 0
-	adrp	x27, .LANCHOR43
-	.loc 2 2266 0
+	.loc 2 2308 0
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	.loc 2 2311 0
+	adrp	x27, .LANCHOR42
+	.loc 2 2316 0
 	mov	w28, 6
-	.loc 2 2258 0
+	.loc 2 2308 0
 	sub	x19, x19, x1
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.LVL1149:
-.L850:
-	.loc 2 2259 0 discriminator 1
-	cmp	w22, w26
-	bne	.L852
-.LVL1150:
-.L849:
-.LBE242:
-	.loc 2 2271 0
-	cbz	w23, .L842
 .LVL1151:
-	.loc 2 2271 0 is_stmt 0 discriminator 1
+.L856:
+	.loc 2 2309 0 discriminator 1
+	cmp	w22, w26
+	bne	.L858
+.LVL1152:
+.L855:
+.LBE277:
+	.loc 2 2321 0
+	cbz	w23, .L848
+.LVL1153:
+	.loc 2 2321 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
-	mov	w2, 2271
-	add	x1, x21, :lo12:.LANCHOR156
+	mov	w2, 2321
+	add	x1, x21, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1152:
-.L842:
-	.loc 2 2272 0 is_stmt 1
+.LVL1154:
+.L848:
+	.loc 2 2322 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11099,103 +11207,103 @@ ftl_check_vpc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1153:
-.L845:
+.LVL1155:
+.L851:
 	.cfi_restore_state
-	.loc 2 2234 0
+	.loc 2 2284 0
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
-.LVL1154:
-	.loc 2 2235 0
+.LVL1156:
+	.loc 2 2285 0
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L844
-	.loc 2 2237 0
+	beq	.L850
+	.loc 2 2287 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1155:
-	.loc 2 2238 0
+.LVL1157:
+	.loc 2 2288 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.LVL1156:
-.L844:
-	.loc 2 2232 0 discriminator 2
-	add	w22, w22, 1
-.LVL1157:
-	b	.L843
 .LVL1158:
-.L848:
-	.loc 2 2245 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.L850:
+	.loc 2 2282 0 discriminator 2
+	add	w22, w22, 1
+.LVL1159:
+	b	.L849
+.LVL1160:
+.L854:
+	.loc 2 2295 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x28, x19, 1, 16
 	sxtw	x27, w19
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L847
-	.loc 2 2247 0
+	beq	.L853
+	.loc 2 2297 0
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
-.LVL1159:
-	.loc 2 2248 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.LVL1161:
+	.loc 2 2298 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L847
-	.loc 2 2248 0 is_stmt 0 discriminator 1
+	beq	.L853
+	.loc 2 2298 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x26, x27, lsl 1]
-	.loc 2 2250 0 is_stmt 1 discriminator 1
+	.loc 2 2300 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.LVL1160:
-.L847:
-	.loc 2 2243 0 discriminator 2
-	add	w19, w19, 1
-.LVL1161:
-	and	w19, w19, 65535
 .LVL1162:
-	b	.L846
+.L853:
+	.loc 2 2293 0 discriminator 2
+	add	w19, w19, 1
 .LVL1163:
-.L852:
-.LBB243:
-	.loc 2 2261 0
-	ldr	x1, [x27, #:lo12:.LANCHOR43]
+	and	w19, w19, 65535
+.LVL1164:
+	b	.L852
+.LVL1165:
+.L858:
+.LBB278:
+	.loc 2 2311 0
+	ldr	x1, [x27, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L851
-	.loc 2 2263 0
+	cbz	w2, .L857
+	.loc 2 2313 0
 	ldrh	w3, [x20, w19, sxtw 1]
-	.loc 2 2264 0
+	.loc 2 2314 0
 	mov	w23, 1
-.LVL1164:
-	.loc 2 2263 0
+.LVL1166:
+	.loc 2 2313 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.LVL1165:
-.L851:
-	.loc 2 2266 0
-	ldr	x0, [x24, #:lo12:.LANCHOR41]
+.LVL1167:
+.L857:
+	.loc 2 2316 0
+	ldr	x0, [x24, #:lo12:.LANCHOR40]
 	umull	x19, w19, w28
-.LVL1166:
+.LVL1168:
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L849
-.LVL1167:
-	.loc 2 2259 0 discriminator 2
+	beq	.L855
+.LVL1169:
+	.loc 2 2309 0 discriminator 2
 	add	w22, w22, 1
-.LVL1168:
+.LVL1170:
 	and	w22, w22, 65535
-.LVL1169:
-	b	.L850
-.LBE243:
+.LVL1171:
+	b	.L856
+.LBE278:
 	.cfi_endproc
 .LFE290:
 	.size	ftl_check_vpc, .-ftl_check_vpc
@@ -11212,39 +11320,39 @@ FtlGcPageVarInit:
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
 	.loc 5 203 0
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR95
 	.loc 5 205 0
 	mov	w1, 255
 	.loc 5 202 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	.loc 5 203 0
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
 	.loc 5 204 0
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR97
 	.loc 5 202 0
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
 	.loc 5 205 0
 	adrp	x19, .LANCHOR21
 	.loc 5 204 0
-	strh	wzr, [x0, #:lo12:.LANCHOR99]
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
 	.loc 5 205 0
-	adrp	x0, .LANCHOR98
+	adrp	x0, .LANCHOR96
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
-	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1170:
+.LVL1172:
 	.loc 5 206 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR98
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
 	bl	ftl_memset
-.LVL1171:
+.LVL1173:
 	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11254,7 +11362,7 @@ FtlGcPageVarInit:
 	.cfi_def_cfa 31, 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1172:
+.LVL1174:
 	.cfi_endproc
 .LFE309:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -11266,7 +11374,7 @@ FtlGcScanTempBlk:
 .LFB310:
 	.loc 5 211 0
 	.cfi_startproc
-.LVL1173:
+.LVL1175:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -11277,7 +11385,7 @@ FtlGcScanTempBlk:
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
 	.loc 5 220 0
-	adrp	x21, .LANCHOR157
+	adrp	x21, .LANCHOR156
 	.loc 5 211 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -96
@@ -11286,10 +11394,10 @@ FtlGcScanTempBlk:
 	stp	x27, x28, [sp, 80]
 	.loc 5 221 0
 	mov	w0, 65535
-.LVL1174:
+.LVL1176:
 	.loc 5 220 0
-	ldrh	w19, [x21, #:lo12:.LANCHOR157]
-.LVL1175:
+	ldrh	w19, [x21, #:lo12:.LANCHOR156]
+.LVL1177:
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
 	.loc 5 211 0
@@ -11302,27 +11410,27 @@ FtlGcScanTempBlk:
 	.cfi_offset 26, -40
 	.loc 5 221 0
 	cmp	w19, w0
-	beq	.L886
+	beq	.L892
 	.loc 5 223 0
-	cbnz	w19, .L870
-.L871:
+	cbnz	w19, .L876
+.L877:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1176:
-	b	.L872
-.LVL1177:
-.L886:
+.LVL1178:
+	b	.L878
+.LVL1179:
+.L892:
 	.loc 5 222 0
 	mov	w19, 0
-.LVL1178:
-.L870:
+.LVL1180:
+.L876:
 	.loc 5 223 0 discriminator 1
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w28
-	beq	.L871
-.LVL1179:
-.L872:
+	beq	.L877
+.LVL1181:
+.L878:
 	.loc 5 235 0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
@@ -11330,15 +11438,15 @@ FtlGcScanTempBlk:
 	mov	w22, 0
 	.loc 5 228 0
 	mov	w23, 65535
-.LVL1180:
-.L880:
+.LVL1182:
+.L886:
 	ldrh	w0, [x20]
 	.loc 5 226 0
 	strb	wzr, [x20, 8]
-.LVL1181:
+.LVL1183:
 	.loc 5 228 0
 	cmp	w0, w23
-	beq	.L887
+	beq	.L893
 	.loc 5 236 0
 	adrp	x25, .LANCHOR24
 	.loc 5 231 0
@@ -11347,82 +11455,82 @@ FtlGcScanTempBlk:
 	add	x25, x25, :lo12:.LANCHOR24
 	.loc 5 231 0
 	add	x26, x26, :lo12:.LANCHOR3
-.L883:
-.LVL1182:
+.L889:
+.LVL1184:
 	.loc 5 235 0
-	adrp	x1, .LANCHOR93
+	adrp	x1, .LANCHOR91
 	.loc 5 234 0
 	adrp	x24, .LANCHOR120
 	.loc 5 235 0
 	ldrh	w7, [x27]
 	add	x5, x20, 16
-	ldr	x6, [x1, #:lo12:.LANCHOR93]
+	ldr	x6, [x1, #:lo12:.LANCHOR91]
 	.loc 5 236 0
-	adrp	x1, .LANCHOR94
+	adrp	x1, .LANCHOR92
 	.loc 5 234 0
 	ldr	x0, [x24, #:lo12:.LANCHOR120]
 	.loc 5 230 0
 	mov	w3, 0
 	.loc 5 236 0
-	ldr	x8, [x1, #:lo12:.LANCHOR94]
+	ldr	x8, [x1, #:lo12:.LANCHOR92]
 	ldrh	w1, [x26]
 	ldrh	w10, [x25]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.LVL1183:
-.L874:
+.LVL1185:
+.L880:
 	.loc 5 231 0 discriminator 1
 	cmp	x1, x5
-	bne	.L876
+	bne	.L882
 	.loc 5 240 0
 	mov	w1, w3
 	str	w3, [x29, 108]
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1184:
+.LVL1186:
 	ldr	w3, [x29, 108]
 	.loc 5 241 0
 	mov	x11, 0
 	ubfiz	x12, x3, 5, 16
-.LVL1185:
-.L877:
+.LVL1187:
+.L883:
 	.loc 5 241 0 is_stmt 0 discriminator 1
 	cmp	x11, x12
-	bne	.L881
+	bne	.L887
 	.loc 5 264 0 is_stmt 1
 	add	w19, w19, 1
-.LVL1186:
+.LVL1188:
 	.loc 5 266 0
 	add	w22, w22, 1
-.LVL1187:
+.LVL1189:
 	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL1188:
+.LVL1190:
 	.loc 5 268 0
 	cmp	w28, w22
 	adrp	x1, .LANCHOR19
-	bls	.L882
-.L884:
+	bls	.L888
+.L890:
 	.loc 5 274 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bhi	.L883
-.L887:
+	bhi	.L889
+.L893:
 	.loc 5 227 0
 	mov	w2, 0
-	b	.L873
-.LVL1189:
-.L876:
+	b	.L879
+.LVL1191:
+.L882:
 	.loc 5 232 0
 	ldrh	w4, [x5]
-.LVL1190:
+.LVL1192:
 	.loc 5 233 0
 	cmp	w4, w23
-	beq	.L875
+	beq	.L881
 	.loc 5 234 0
 	ubfiz	x2, x3, 5, 16
 	orr	w4, w19, w4, lsl 10
-.LVL1191:
+.LVL1193:
 	add	x2, x0, x2
 	str	w4, [x2, 4]
 	.loc 5 235 0
@@ -11434,49 +11542,49 @@ FtlGcScanTempBlk:
 	mul	w4, w3, w10
 	.loc 5 237 0
 	add	w3, w3, 1
-.LVL1192:
+.LVL1194:
 	and	w3, w3, 65535
-.LVL1193:
+.LVL1195:
 	.loc 5 236 0
 	asr	w4, w4, 2
 	add	x4, x8, x4, sxtw 2
 	str	x4, [x2, 16]
-.L875:
-	add	x5, x5, 2
-.LVL1194:
-	b	.L874
-.LVL1195:
 .L881:
+	add	x5, x5, 2
+.LVL1196:
+	b	.L880
+.LVL1197:
+.L887:
 	.loc 5 242 0
 	ldr	x6, [x24, #:lo12:.LANCHOR120]
 	add	x5, x6, x11
 	ldr	w4, [x5, 4]
-.LVL1196:
+.LVL1198:
 	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL1197:
+.LVL1199:
 	and	w2, w0, 65535
-.LVL1198:
+.LVL1200:
 	.loc 5 245 0
 	ldr	w0, [x6, x11]
-.LVL1199:
-	cbnz	w0, .L878
+.LVL1201:
+	cbnz	w0, .L884
 	.loc 5 247 0
 	ldr	x0, [x5, 16]
-.LVL1200:
+.LVL1202:
 	add	x11, x11, 32
 	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w23
-	bne	.L879
+	bne	.L885
 	.loc 5 249 0
-	adrp	x0, .LANCHOR153
-.LVL1201:
+	adrp	x0, .LANCHOR152
+.LVL1203:
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR153]
-.LVL1202:
-.L873:
+	str	w1, [x0, #:lo12:.LANCHOR152]
+.LVL1204:
+.L879:
 	.loc 5 282 0
 	strh	w19, [x20, 2]
 	.loc 5 281 0
@@ -11486,71 +11594,71 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	w1, w19
 	.loc 5 281 0
-	strh	w0, [x21, #:lo12:.LANCHOR157]
+	strh	w0, [x21, #:lo12:.LANCHOR156]
 	.loc 5 284 0
 	mov	x0, x20
 	bl	ftl_sb_update_avl_pages
-.LVL1203:
+.LVL1205:
 	.loc 5 285 0
-	b	.L885
-.LVL1204:
-.L879:
+	b	.L891
+.LVL1206:
+.L885:
 	.loc 5 252 0
 	ldp	w2, w0, [x0, 8]
-.LVL1205:
+.LVL1207:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL1206:
-	b	.L877
-.LVL1207:
-.L878:
+.LVL1208:
+	b	.L883
+.LVL1209:
+.L884:
 	.loc 5 256 0
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR42
 	ldrh	w1, [x20]
 	.loc 5 259 0
 	mov	w19, 0
-.LVL1208:
+.LVL1210:
 	.loc 5 256 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	strh	wzr, [x0, x1, lsl 1]
 	.loc 5 257 0
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
-.LVL1209:
+.LVL1211:
 	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x20]
-.LVL1210:
+.LVL1212:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1211:
+.LVL1213:
 	.loc 5 261 0
-	b	.L880
-.LVL1212:
-.L882:
+	b	.L886
+.LVL1214:
+.L888:
 	.loc 5 268 0 discriminator 1
-	ldrh	w0, [x21, #:lo12:.LANCHOR157]
+	ldrh	w0, [x21, #:lo12:.LANCHOR156]
 	cmp	w0, w23
-	beq	.L884
+	beq	.L890
 	.loc 5 269 0
 	add	w0, w0, w22
-	strh	w0, [x21, #:lo12:.LANCHOR157]
+	strh	w0, [x21, #:lo12:.LANCHOR156]
 	.loc 5 270 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bls	.L884
-.LVL1213:
-.L885:
+	bls	.L890
+.LVL1215:
+.L891:
 	.loc 5 286 0
 	ldp	x19, x20, [sp, 16]
-.LVL1214:
+.LVL1216:
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
-.LVL1215:
+.LVL1217:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1216:
+.LVL1218:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -11577,7 +11685,7 @@ FlashTestBlk:
 .LFB344:
 	.loc 1 197 0
 	.cfi_startproc
-.LVL1217:
+.LVL1219:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -11591,13 +11699,13 @@ FlashTestBlk:
 	and	w19, w0, 65535
 	.loc 1 202 0
 	cmp	w19, 11
-	bls	.L895
-.LVL1218:
-.LBB246:
-.LBB247:
+	bls	.L901
+.LVL1220:
+.LBB281:
+.LBB282:
 	.loc 1 207 0
 	add	x0, x29, 64
-.LVL1219:
+.LVL1221:
 	.loc 1 208 0
 	mov	w2, 32
 	mov	w1, 165
@@ -11608,16 +11716,16 @@ FlashTestBlk:
 	stp	x20, x0, [x29, 40]
 	.loc 1 208 0
 	bl	ftl_memset
-.LVL1220:
+.LVL1222:
 	.loc 1 210 0
 	lsl	w19, w19, 10
-.LVL1221:
+.LVL1223:
 	.loc 1 209 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL1222:
+.LVL1224:
 	.loc 1 211 0
 	mov	w2, 1
 	.loc 1 210 0
@@ -11626,14 +11734,14 @@ FlashTestBlk:
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL1223:
+.LVL1225:
 	.loc 1 212 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1224:
+.LVL1226:
 	.loc 1 213 0
 	ldr	w0, [x29, 32]
 	.loc 1 219 0
@@ -11646,13 +11754,13 @@ FlashTestBlk:
 	.loc 1 213 0
 	csetm	w19, ne
 .LDL1:
-.LVL1225:
+.LVL1227:
 	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1226:
-.L893:
-.LBE247:
-.LBE246:
+.LVL1228:
+.L899:
+.LBE282:
+.LBE281:
 	.loc 1 221 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -11664,12 +11772,12 @@ FlashTestBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1227:
-.L895:
+.LVL1229:
+.L901:
 	.cfi_restore_state
 	.loc 1 203 0
 	mov	w19, 0
-	b	.L893
+	b	.L899
 	.cfi_endproc
 .LFE344:
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -11681,7 +11789,7 @@ FlashGetBadBlockList:
 .LFB345:
 	.loc 1 224 0
 	.cfi_startproc
-.LVL1228:
+.LVL1230:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -11699,48 +11807,48 @@ FlashGetBadBlockList:
 	mov	w20, w1
 	.loc 1 227 0
 	mov	w1, 255
-.LVL1229:
+.LVL1231:
 	bl	ftl_memset
-.LVL1230:
+.LVL1232:
 	.loc 1 228 0
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR105
 	mov	w1, w20
-	ldr	x2, [x0, #:lo12:.LANCHOR107]
+	ldr	x2, [x0, #:lo12:.LANCHOR105]
 	mov	x0, x19
 	blr	x2
-.LVL1231:
+.LVL1233:
 	and	w0, w0, 65535
-.LVL1232:
+.LVL1234:
 	.loc 1 229 0
 	cmp	w0, 50
-	bls	.L898
+	bls	.L904
 	.loc 1 230 0
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
-.LVL1233:
+.LVL1235:
 	bl	ftl_memset
-.LVL1234:
+.LVL1236:
 	.loc 1 231 0
 	mov	w0, 0
-.LVL1235:
-.L898:
+.LVL1237:
+.L904:
 	.loc 1 233 0
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L902
+	bne	.L908
 	mov	x1, 0
-.L900:
-.LVL1236:
+.L906:
+.LVL1238:
 	.loc 1 234 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L901
-.LVL1237:
-.L902:
+	bhi	.L907
+.LVL1239:
+.L908:
 	.loc 1 239 0
 	ldp	x19, x20, [sp, 16]
-.LVL1238:
+.LVL1240:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -11749,17 +11857,17 @@ FlashGetBadBlockList:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1239:
-.L901:
+.LVL1241:
+.L907:
 	.cfi_restore_state
 	.loc 1 235 0 discriminator 3
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
-.LVL1240:
+.LVL1242:
 	add	x1, x1, 1
-.LVL1241:
-	b	.L900
+.LVL1243:
+	b	.L906
 	.cfi_endproc
 .LFE345:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -11771,11 +11879,11 @@ ftl_memcpy:
 .LFB347:
 	.loc 1 247 0
 	.cfi_startproc
-.LVL1242:
+.LVL1244:
 	.loc 1 248 0
 	uxtw	x2, w2
 	b	memcpy
-.LVL1243:
+.LVL1245:
 	.cfi_endproc
 .LFE347:
 	.size	ftl_memcpy, .-ftl_memcpy
@@ -11787,7 +11895,7 @@ FtlBbmTblFlush:
 .LFB226:
 	.loc 4 80 0
 	.cfi_startproc
-.LVL1244:
+.LVL1246:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -11798,22 +11906,22 @@ FtlBbmTblFlush:
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
 	.loc 4 88 0
-	adrp	x23, .LANCHOR109
+	adrp	x23, .LANCHOR108
 	.loc 4 80 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
 	.loc 4 87 0
-	adrp	x19, .LANCHOR108
+	adrp	x19, .LANCHOR106
 	.loc 4 80 0
 	stp	x21, x22, [sp, 32]
 	.loc 4 87 0
-	add	x20, x19, :lo12:.LANCHOR108
+	add	x20, x19, :lo12:.LANCHOR106
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	adrp	x22, .LANCHOR39
+	adrp	x22, .LANCHOR107
 	.loc 4 88 0
-	ldr	x1, [x23, #:lo12:.LANCHOR109]
+	ldr	x1, [x23, #:lo12:.LANCHOR108]
 	.loc 4 80 0
 	stp	x25, x26, [sp, 64]
 	adrp	x21, .LANCHOR37
@@ -11823,7 +11931,7 @@ FtlBbmTblFlush:
 	.cfi_offset 27, -16
 	add	x25, x21, :lo12:.LANCHOR37
 	.loc 4 87 0
-	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	ldr	x0, [x22, #:lo12:.LANCHOR107]
 	.loc 4 91 0
 	adrp	x26, .LANCHOR10
 	.loc 4 88 0
@@ -11843,29 +11951,29 @@ FtlBbmTblFlush:
 	.loc 4 89 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1245:
-.L906:
+.LVL1247:
+.L912:
 	.loc 4 91 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L907
+	blt	.L913
 	.loc 4 94 0
-	add	x19, x19, :lo12:.LANCHOR108
+	add	x19, x19, :lo12:.LANCHOR106
 	.loc 4 98 0
 	add	x20, x21, :lo12:.LANCHOR37
 	.loc 4 95 0
 	mov	w2, 16
 	mov	w1, 255
 	.loc 4 108 0
-	adrp	x24, .LC94
-.LVL1246:
+	adrp	x24, .LC97
+.LVL1248:
 	.loc 4 110 0
 	adrp	x26, .LANCHOR20
 	.loc 4 94 0
 	ldr	x27, [x19, 16]
-.LVL1247:
+.LVL1249:
 	.loc 4 108 0
-	add	x24, x24, :lo12:.LC94
+	add	x24, x24, :lo12:.LC97
 	.loc 4 110 0
 	add	x26, x26, :lo12:.LANCHOR20
 	.loc 4 82 0
@@ -11873,7 +11981,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	x0, x27
 	bl	ftl_memset
-.LVL1248:
+.LVL1250:
 	.loc 4 97 0
 	mov	w0, -3887
 	strh	w0, [x27]
@@ -11896,8 +12004,8 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.LVL1249:
-.L908:
+.LVL1251:
+.L914:
 	.loc 4 108 0
 	ldrh	w4, [x27, 10]
 	.loc 4 107 0
@@ -11906,10 +12014,10 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	ldrh	w3, [x20, 4]
 	.loc 4 104 0
-	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	ldr	x0, [x22, #:lo12:.LANCHOR107]
 	str	x0, [x19, 8]
 	.loc 4 105 0
-	ldr	x0, [x23, #:lo12:.LANCHOR109]
+	ldr	x0, [x23, #:lo12:.LANCHOR108]
 	str	x0, [x19, 16]
 	.loc 4 107 0
 	orr	w0, w2, w1, lsl 10
@@ -11920,20 +12028,20 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	mov	x0, x24
 	bl	printf
-.LVL1250:
+.LVL1252:
 	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL1251:
+.LVL1253:
 	.loc 4 110 0
 	ldrh	w0, [x26]
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L909
+	blt	.L915
 	.loc 4 113 0
 	ldr	w0, [x20, 8]
 	.loc 4 122 0
@@ -11951,13 +12059,13 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	w0, [x20, 4]
 	.loc 4 121 0
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR111
 	.loc 4 116 0
 	strh	w1, [x20]
 	.loc 4 119 0
 	lsl	w1, w1, 10
 	.loc 4 121 0
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	.loc 4 119 0
 	str	w1, [x19, 4]
 	.loc 4 117 0
@@ -11967,15 +12075,15 @@ FtlBbmTblFlush:
 	.loc 4 122 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1252:
+.LVL1254:
 	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1253:
-.L909:
+.LVL1255:
+.L915:
 	.loc 4 126 0
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
@@ -11983,34 +12091,34 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L910
+	bne	.L916
 	.loc 4 129 0
 	ldr	w1, [x19, 4]
 	.loc 4 130 0
 	add	w21, w21, 1
-.LVL1254:
+.LVL1256:
 	.loc 4 129 0
-	adrp	x0, .LC95
+	adrp	x0, .LC98
 	.loc 4 130 0
 	and	w21, w21, 65535
 	.loc 4 129 0
-	add	x0, x0, :lo12:.LC95
+	add	x0, x0, :lo12:.LC98
 	bl	printf
-.LVL1255:
+.LVL1257:
 	.loc 4 131 0
 	cmp	w21, 3
-	bls	.L908
+	bls	.L914
 	.loc 4 132 0
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC96
+	adrp	x0, .LC99
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC96
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-.LVL1256:
-.L912:
-	b	.L912
-.LVL1257:
-.L907:
+.LVL1258:
+.L918:
+	b	.L918
+.LVL1259:
+.L913:
 	.loc 4 92 0 discriminator 3
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
@@ -12019,31 +12127,31 @@ FtlBbmTblFlush:
 	lsl	w2, w2, 2
 	.loc 4 91 0 discriminator 3
 	add	w24, w24, 1
-.LVL1258:
+.LVL1260:
 	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL1259:
-	b	.L906
-.LVL1260:
-.L913:
-	mov	w25, 1
 .LVL1261:
-	b	.L908
+	b	.L912
 .LVL1262:
-.L910:
+.L919:
+	mov	w25, 1
+.LVL1263:
+	b	.L914
+.LVL1264:
+.L916:
 	.loc 4 139 0
-	cbz	w25, .L913
+	cbz	w25, .L919
 	.loc 4 146 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
-.LVL1263:
+.LVL1265:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1264:
+.LVL1266:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1265:
+.LVL1267:
 	ldp	x29, x30, [sp], 96
 	.cfi_restore 30
 	.cfi_restore 29
@@ -12067,9 +12175,9 @@ FtlBbmTblFlush:
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
 .LFB298:
-	.loc 2 2531 0
+	.loc 2 2582 0
 	.cfi_startproc
-.LVL1266:
+.LVL1268:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -12079,36 +12187,36 @@ allocate_data_superblock:
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 2537 0
+	.loc 2 2588 0
 	adrp	x28, .LANCHOR48
-	.loc 2 2531 0
+	.loc 2 2582 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 2540 0
+	.loc 2 2591 0
 	add	x23, x28, :lo12:.LANCHOR48
-	.loc 2 2531 0
+	.loc 2 2582 0
 	stp	x19, x20, [sp, 16]
-	.loc 2 2537 0
+	.loc 2 2588 0
 	adrp	x27, .LANCHOR45
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
-	.loc 2 2531 0
+	.loc 2 2582 0
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 2537 0
+	.loc 2 2588 0
 	add	x0, x27, :lo12:.LANCHOR45
-.LVL1267:
-	.loc 2 2531 0
+.LVL1269:
+	.loc 2 2582 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-	.loc 2 2537 0
+	.loc 2 2588 0
 	str	x0, [x29, 104]
-.LVL1268:
-.L916:
+.LVL1270:
+.L922:
 	ldr	x1, [x29, 104]
 	adrp	x24, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -12116,414 +12224,414 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L917
-	.loc 2 2537 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	ble	.L923
+	.loc 2 2588 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2537
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2588
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1269:
-.L917:
-	.loc 2 2539 0 is_stmt 1
+.LVL1271:
+.L923:
+	.loc 2 2590 0 is_stmt 1
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L942
-	.loc 2 2540 0
-	adrp	x1, .LANCHOR89
+	bne	.L948
+	.loc 2 2591 0
+	adrp	x1, .LANCHOR87
 	ldrh	w0, [x23]
-	ldr	w1, [x1, #:lo12:.LANCHOR89]
+	ldr	w1, [x1, #:lo12:.LANCHOR87]
 	mul	w1, w0, w1
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-.LVL1270:
-	.loc 2 2544 0
+.LVL1272:
+	.loc 2 2595 0
 	ands	w1, w1, 65535
-	beq	.L918
-	.loc 2 2545 0
+	beq	.L924
+	.loc 2 2596 0
 	sub	w1, w1, #1
-.LVL1271:
+.LVL1273:
 	and	w1, w1, 65535
-.LVL1272:
-.L918:
-	.loc 2 2546 0
+.LVL1274:
+.L924:
+	.loc 2 2597 0
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
-.LVL1273:
+.LVL1275:
 	and	w20, w0, 65535
-.LVL1274:
+.LVL1276:
 	ldrh	w0, [x23]
-	cbnz	w0, .L919
-	.loc 2 2546 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	cbnz	w0, .L925
+	.loc 2 2597 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2546
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2597
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1275:
-.L919:
-	.loc 2 2546 0 discriminator 3
+.LVL1277:
+.L925:
+	.loc 2 2597 0 discriminator 3
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-	.loc 2 2549 0 is_stmt 1 discriminator 3
+	.loc 2 2600 0 is_stmt 1 discriminator 3
 	strh	w20, [x19]
-	.loc 2 2550 0 discriminator 3
+	.loc 2 2601 0 discriminator 3
 	mov	x0, x19
 	bl	make_superblock
-.LVL1276:
-	.loc 2 2551 0 discriminator 3
+.LVL1278:
+	.loc 2 2602 0 discriminator 3
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L920
-	.loc 2 2555 0
-	adrp	x1, .LANCHOR43
+	cbnz	w0, .L926
+	.loc 2 2606 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x20, 1, 16
 	mov	w2, -1
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	strh	w2, [x1, x0]
-	.loc 2 2556 0
+	.loc 2 2607 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1277:
-	.loc 2 2557 0
+.LVL1279:
+	.loc 2 2608 0
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L916
-	.loc 2 2557 0 is_stmt 0 discriminator 1
-	mov	w2, 2557
-	adrp	x1, .LANCHOR158
+	ble	.L922
+	.loc 2 2608 0 is_stmt 0 discriminator 1
+	mov	w2, 2608
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR158
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1278:
-	b	.L916
-.LVL1279:
-.L942:
-	mov	w1, 0
-	b	.L918
 .LVL1280:
-.L920:
-	.loc 2 2560 0 is_stmt 1
+	b	.L922
+.LVL1281:
+.L948:
+	mov	w1, 0
+	b	.L924
+.LVL1282:
+.L926:
+	.loc 2 2611 0 is_stmt 1
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L922
-	.loc 2 2560 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	ble	.L928
+	.loc 2 2611 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2560
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2611
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1281:
-.L922:
-	.loc 2 2563 0 is_stmt 1 discriminator 1
+.LVL1283:
+.L928:
+	.loc 2 2614 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR3
-	.loc 2 2564 0 discriminator 1
-	adrp	x25, .LANCHOR112
+	.loc 2 2615 0 discriminator 1
+	adrp	x25, .LANCHOR111
 	add	x26, x19, 16
 	mov	w21, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	mov	x4, x26
-	ldr	x3, [x25, #:lo12:.LANCHOR112]
-	.loc 2 2566 0 discriminator 1
+	ldr	x3, [x25, #:lo12:.LANCHOR111]
+	.loc 2 2617 0 discriminator 1
 	mov	w6, 65535
 	ubfiz	x0, x0, 5, 16
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L923:
-.LVL1282:
-	.loc 2 2563 0 discriminator 1
+.L929:
+.LVL1284:
+	.loc 2 2614 0 discriminator 1
 	cmp	x0, x1
-	bne	.L925
-	.loc 2 2571 0
-	cbnz	w21, .L926
-	.loc 2 2571 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	bne	.L931
+	.loc 2 2622 0
+	cbnz	w21, .L932
+	.loc 2 2622 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2571
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2622
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1283:
-.L926:
-	.loc 2 2573 0 is_stmt 1
-	adrp	x0, .LANCHOR82
-	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+.LVL1285:
+.L932:
+	.loc 2 2624 0 is_stmt 1
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bne	.L927
-	.loc 2 2573 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR158
+	bne	.L933
+	.loc 2 2624 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2573
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2624
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1284:
-.L927:
-	.loc 2 2574 0 is_stmt 1
+.LVL1286:
+.L933:
+	.loc 2 2625 0 is_stmt 1
 	ldrb	w0, [x19, 8]
 	uxtw	x22, w20
-	adrp	x6, .LANCHOR40
+	adrp	x6, .LANCHOR43
 	adrp	x7, .LANCHOR14
-	adrp	x5, .LANCHOR73
-	adrp	x4, .LANCHOR74
-	cbnz	w0, .L928
-	.loc 2 2575 0
-	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	adrp	x5, .LANCHOR72
+	adrp	x4, .LANCHOR73
+	cbnz	w0, .L934
+	.loc 2 2626 0
+	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L929
-	.loc 2 2576 0
+	cbz	w0, .L935
+	.loc 2 2627 0
 	ldrh	w3, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w3
-.L953:
-	.loc 2 2578 0
+.L959:
+	.loc 2 2629 0
 	strh	w0, [x2, x1]
-	.loc 2 2580 0
+	.loc 2 2631 0
 	mov	w1, 0
-	.loc 2 2579 0
-	ldr	w0, [x5, #:lo12:.LANCHOR73]
+	.loc 2 2630 0
+	ldr	w0, [x5, #:lo12:.LANCHOR72]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR73]
-	.loc 2 2580 0
+	str	w0, [x5, #:lo12:.LANCHOR72]
+	.loc 2 2631 0
 	mov	w0, w20
 	bl	ftl_set_blk_mode
-.LVL1285:
-.L931:
-	.loc 2 2587 0
-	ldr	x0, [x6, #:lo12:.LANCHOR40]
+.LVL1287:
+.L937:
+	.loc 2 2638 0
+	ldr	x0, [x6, #:lo12:.LANCHOR43]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR77
-	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR76
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
 	cmp	w1, w2
-	bls	.L932
-	.loc 2 2588 0
-	str	w1, [x0, #:lo12:.LANCHOR77]
-.L932:
-	.loc 2 2590 0
-	ldr	w2, [x5, #:lo12:.LANCHOR73]
-	ldr	w1, [x4, #:lo12:.LANCHOR74]
+	bls	.L938
+	.loc 2 2639 0
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L938:
+	.loc 2 2641 0
+	ldr	w2, [x5, #:lo12:.LANCHOR72]
+	ldr	w1, [x4, #:lo12:.LANCHOR73]
 	ldrh	w0, [x7, #:lo12:.LANCHOR14]
 	madd	w0, w0, w2, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	str	w0, [x1, #:lo12:.LANCHOR75]
-	.loc 2 2591 0
+	adrp	x1, .LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR74]
+	.loc 2 2642 0
 	adrp	x0, .LANCHOR127
 	ldr	x1, [x0, #:lo12:.LANCHOR127]
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-.LVL1286:
-	.loc 2 2594 0
-	ldr	x0, [x25, #:lo12:.LANCHOR112]
+.LVL1288:
+	.loc 2 2645 0
+	ldr	x0, [x25, #:lo12:.LANCHOR111]
 	ubfiz	x1, x21, 5, 16
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.LVL1287:
-.L933:
-	.loc 2 2593 0 discriminator 1
+.LVL1289:
+.L939:
+	.loc 2 2644 0 discriminator 1
 	cmp	x1, x2
-	bne	.L934
-	.loc 2 2595 0
+	bne	.L940
+	.loc 2 2646 0
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
-	.loc 2 2597 0
+	.loc 2 2648 0
 	mov	x24, 0
-	.loc 2 2595 0
+	.loc 2 2646 0
 	bl	FlashEraseBlocks
-.LVL1288:
-	.loc 2 2596 0
+.LVL1290:
+	.loc 2 2647 0
 	mov	w1, 0
-.LVL1289:
-.L935:
-	.loc 2 2597 0 discriminator 1
+.LVL1291:
+.L941:
+	.loc 2 2648 0 discriminator 1
 	cmp	w21, w24, uxth
-	bhi	.L937
-	.loc 2 2608 0
-	cbz	w1, .L938
-	.loc 2 2609 0
+	bhi	.L943
+	.loc 2 2659 0
+	cbz	w1, .L944
+	.loc 2 2660 0
 	mov	w0, w20
 	bl	update_multiplier_value
-.LVL1290:
-	.loc 2 2610 0
+.LVL1292:
+	.loc 2 2661 0
 	bl	FtlBbmTblFlush
-.LVL1291:
-.L938:
-	.loc 2 2613 0
+.LVL1293:
+.L944:
+	.loc 2 2664 0
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR43
-	cbnz	w0, .L939
-	.loc 2 2615 0
-	ldr	x0, [x2, #:lo12:.LANCHOR43]
+	adrp	x2, .LANCHOR42
+	cbnz	w0, .L945
+	.loc 2 2666 0
+	ldr	x0, [x2, #:lo12:.LANCHOR42]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	.loc 2 2616 0
+	.loc 2 2667 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1292:
+.LVL1294:
+	.loc 2 2668 0
+	b	.L922
+.LVL1295:
+.L931:
 	.loc 2 2617 0
-	b	.L916
-.LVL1293:
-.L925:
-	.loc 2 2566 0
 	ldrh	w2, [x4]
-	.loc 2 2565 0
+	.loc 2 2616 0
 	stp	xzr, xzr, [x1]
-	.loc 2 2566 0
+	.loc 2 2617 0
 	cmp	w2, w6
-	beq	.L924
-	.loc 2 2567 0
+	beq	.L930
+	.loc 2 2618 0
 	ubfiz	x5, x21, 5, 16
-	.loc 2 2568 0
+	.loc 2 2619 0
 	add	w21, w21, 1
-.LVL1294:
-	.loc 2 2567 0
+.LVL1296:
+	.loc 2 2618 0
 	add	x5, x3, x5
-	.loc 2 2568 0
+	.loc 2 2619 0
 	and	w21, w21, 65535
-.LVL1295:
-	.loc 2 2567 0
+.LVL1297:
+	.loc 2 2618 0
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L924:
+.L930:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L923
-.L929:
-	.loc 2 2578 0
+	b	.L929
+.L935:
+	.loc 2 2629 0
 	mov	w0, 2
-	b	.L953
-.L928:
-	.loc 2 2582 0
-	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	b	.L959
+.L934:
+	.loc 2 2633 0
+	ldr	x2, [x6, #:lo12:.LANCHOR43]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	.loc 2 2583 0
-	ldr	w0, [x4, #:lo12:.LANCHOR74]
+	.loc 2 2634 0
+	ldr	w0, [x4, #:lo12:.LANCHOR73]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR74]
-.LVL1296:
-.LBB248:
-.LBB249:
-	mov	w0, w20
-	bl	ftl_set_blk_mode.part.7
-.LVL1297:
-	b	.L931
+	str	w0, [x4, #:lo12:.LANCHOR73]
 .LVL1298:
-.L934:
-.LBE249:
-.LBE248:
-	.loc 2 2594 0 discriminator 3
+.LBB283:
+.LBB284:
+	mov	w0, w20
+	bl	ftl_set_blk_mode.part.6
+.LVL1299:
+	b	.L937
+.LVL1300:
+.L940:
+.LBE284:
+.LBE283:
+	.loc 2 2645 0 discriminator 3
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L933
-.LVL1299:
-.L937:
-	.loc 2 2598 0
-	ldr	x2, [x25, #:lo12:.LANCHOR112]
+	b	.L939
+.LVL1301:
+.L943:
+	.loc 2 2649 0
+	ldr	x2, [x25, #:lo12:.LANCHOR111]
 	lsl	x0, x24, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L936
-	.loc 2 2599 0
+	bne	.L942
+	.loc 2 2650 0
 	add	w1, w1, 1
-.LVL1300:
-	.loc 2 2600 0
+.LVL1302:
+	.loc 2 2651 0
 	ldr	w0, [x3, 4]
-	.loc 2 2599 0
+	.loc 2 2650 0
 	stp	w2, w1, [x29, 96]
-.LVL1301:
-	.loc 2 2601 0
+.LVL1303:
+	.loc 2 2652 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1302:
-	.loc 2 2603 0
+.LVL1304:
+	.loc 2 2654 0
 	ldp	w2, w1, [x29, 96]
-	.loc 2 2602 0
+	.loc 2 2653 0
 	strh	w2, [x26]
-	.loc 2 2603 0
+	.loc 2 2654 0
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.LVL1303:
-.L936:
+.LVL1305:
+.L942:
 	add	x24, x24, 1
-.LVL1304:
+.LVL1306:
 	add	x26, x26, 2
-	b	.L935
-.LVL1305:
-.L939:
-	.loc 2 2620 0
+	b	.L941
+.LVL1307:
+.L945:
+	.loc 2 2671 0
 	adrp	x1, .LANCHOR19
-	.loc 2 2624 0
-	adrp	x3, .LANCHOR71
-	.loc 2 2623 0
+	.loc 2 2675 0
+	adrp	x3, .LANCHOR70
+	.loc 2 2674 0
 	strb	wzr, [x19, 6]
-	.loc 2 2620 0
+	.loc 2 2671 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
-	.loc 2 2622 0
+	.loc 2 2673 0
 	strh	wzr, [x19, 2]
-	.loc 2 2621 0
+	.loc 2 2672 0
 	strh	w20, [x19]
-	.loc 2 2620 0
+	.loc 2 2671 0
 	mul	w0, w0, w1
-	.loc 2 2624 0
-	ldr	w1, [x3, #:lo12:.LANCHOR71]
+	.loc 2 2675 0
+	ldr	w1, [x3, #:lo12:.LANCHOR70]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR71]
-	.loc 2 2625 0
-	ldr	x1, [x2, #:lo12:.LANCHOR43]
-	.loc 2 2620 0
+	str	w1, [x3, #:lo12:.LANCHOR70]
+	.loc 2 2676 0
+	ldr	x1, [x2, #:lo12:.LANCHOR42]
+	.loc 2 2671 0
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
-	.loc 2 2625 0
+	.loc 2 2676 0
 	strh	w0, [x1, x22]
-	.loc 2 2626 0
+	.loc 2 2677 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L940
-	.loc 2 2626 0 is_stmt 0 discriminator 2
+	cbz	w0, .L946
+	.loc 2 2677 0 is_stmt 0 discriminator 2
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L941
-.L940:
-	.loc 2 2626 0 discriminator 3
-	adrp	x1, .LANCHOR158
+	cbnz	w0, .L947
+.L946:
+	.loc 2 2677 0 discriminator 3
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC1
-	mov	w2, 2626
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 2677
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1306:
-.L941:
-	.loc 2 2628 0 is_stmt 1
+.LVL1308:
+.L947:
+	.loc 2 2679 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1307:
+.LVL1309:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1308:
+.LVL1310:
 	ldp	x23, x24, [sp, 48]
-.LVL1309:
+.LVL1311:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
@@ -12552,7 +12660,7 @@ FtlGcFreeBadSuperBlk:
 .LFB317:
 	.loc 5 390 0
 	.cfi_startproc
-.LVL1310:
+.LVL1312:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -12563,15 +12671,15 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	.loc 5 395 0
-	adrp	x21, .LANCHOR103
+	adrp	x21, .LANCHOR101
 	.loc 5 390 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
 	and	w25, w0, 65535
 	.loc 5 395 0
-	ldrh	w0, [x21, #:lo12:.LANCHOR103]
-.LVL1311:
+	ldrh	w0, [x21, #:lo12:.LANCHOR101]
+.LVL1313:
 	.loc 5 390 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
@@ -12582,31 +12690,31 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 24, -40
 	.cfi_offset 27, -16
 	.loc 5 395 0
-	cbz	w0, .L955
-.LBB252:
-.LBB253:
+	cbz	w0, .L961
+.LBB287:
+.LBB288:
 	.loc 5 399 0
-	adrp	x23, .LANCHOR104
+	adrp	x23, .LANCHOR102
 	.loc 5 406 0
-	add	x24, x23, :lo12:.LANCHOR104
-.LBE253:
-.LBE252:
+	add	x24, x23, :lo12:.LANCHOR102
+.LBE288:
+.LBE287:
 	mov	w19, 0
-.L956:
-.LVL1312:
-.LBB256:
-.LBB254:
+.L962:
+.LVL1314:
+.LBB291:
+.LBB289:
 	.loc 5 396 0
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L962
+	bhi	.L968
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1313:
-.L955:
-.LBE254:
-.LBE256:
+.LVL1315:
+.L961:
+.LBE289:
+.LBE291:
 	.loc 5 415 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
@@ -12614,7 +12722,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1314:
+.LVL1316:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12630,55 +12738,55 @@ FtlGcFreeBadSuperBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1315:
-.L962:
+.LVL1317:
+.L968:
 	.cfi_restore_state
-.LBB257:
-.LBB255:
+.LBB292:
+.LBB290:
 	.loc 5 397 0
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
 	mov	w1, w25
 	.loc 5 398 0
-	add	x22, x21, :lo12:.LANCHOR103
+	add	x22, x21, :lo12:.LANCHOR101
 	mov	w20, 0
 	.loc 5 397 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
-.LVL1316:
+.LVL1318:
 	and	w26, w0, 65535
-.LVL1317:
-.L957:
+.LVL1319:
+.L963:
 	.loc 5 398 0
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L961
+	bhi	.L967
 	.loc 5 396 0
 	add	w19, w19, 1
-.LVL1318:
+.LVL1320:
 	and	w19, w19, 65535
-.LVL1319:
-	b	.L956
-.L961:
+.LVL1321:
+	b	.L962
+.L967:
 	.loc 5 399 0
-	add	x0, x23, :lo12:.LANCHOR104
+	add	x0, x23, :lo12:.LANCHOR102
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L958
+	bne	.L964
 	.loc 5 401 0
 	mov	w1, w26
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-.LVL1320:
+.LVL1322:
 	.loc 5 403 0
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
-.LVL1321:
+.LVL1323:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1322:
+.LVL1324:
 	.loc 5 405 0
 	ldrh	w1, [x22]
 	.loc 5 406 0
@@ -12686,32 +12794,32 @@ FtlGcFreeBadSuperBlk:
 	and	x4, x20, 65535
 	.loc 5 405 0
 	mov	x0, 0
-.LVL1323:
-.L959:
+.LVL1325:
+.L965:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L960
+	bhi	.L966
 	.loc 5 407 0
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.LVL1324:
-.L958:
+.LVL1326:
+.L964:
 	.loc 5 398 0
 	and	w20, w27, 65535
-.LVL1325:
-	b	.L957
-.LVL1326:
-.L960:
+.LVL1327:
+	b	.L963
+.LVL1328:
+.L966:
 	.loc 5 406 0
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
-.LVL1327:
+.LVL1329:
 	strh	w5, [x24, x2, lsl 1]
-	b	.L959
-.LBE255:
-.LBE257:
+	b	.L965
+.LBE290:
+.LBE292:
 	.cfi_endproc
 .LFE317:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -12721,70 +12829,70 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 .LFB301:
-	.loc 2 2687 0
+	.loc 2 2738 0
 	.cfi_startproc
-.LVL1328:
+.LVL1330:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2688 0
-	adrp	x1, .LANCHOR43
-	.loc 2 2687 0
+	.loc 2 2739 0
+	adrp	x1, .LANCHOR42
+	.loc 2 2738 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 2687 0
+	.loc 2 2738 0
 	and	w19, w0, 65535
-	.loc 2 2688 0
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	.loc 2 2739 0
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ubfiz	x0, x19, 1, 16
-.LVL1329:
+.LVL1331:
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L968
-	.loc 2 2689 0
-	adrp	x0, .LANCHOR82
-	ldrh	w1, [x0, #:lo12:.LANCHOR82]
+	cbnz	w0, .L974
+	.loc 2 2740 0
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w19
-	bne	.L969
-	.loc 2 2691 0
+	bne	.L975
+	.loc 2 2742 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR82]
-.L970:
-.LVL1330:
-.LBB260:
-.LBB261:
-	.loc 2 2696 0
+	strh	w1, [x0, #:lo12:.LANCHOR80]
+.L976:
+.LVL1332:
+.LBB295:
+.LBB296:
+	.loc 2 2747 0
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
+	adrp	x0, .LANCHOR41
+	add	x0, x0, :lo12:.LANCHOR41
 	bl	List_remove_node
-.LVL1331:
+.LVL1333:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L972
-	adrp	x1, .LANCHOR159
+	cbnz	w0, .L978
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
-	mov	w2, 2696
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 2747
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1332:
-.L972:
+.LVL1334:
+.L978:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
-	.loc 2 2697 0
+	.loc 2 2748 0
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL1333:
-	.loc 2 2698 0
+.LVL1335:
+	.loc 2 2749 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL1334:
-	.loc 2 2699 0
+.LVL1336:
+	.loc 2 2750 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
@@ -12792,43 +12900,43 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L976
-	adrp	x1, .LANCHOR159
+	ble	.L982
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
-	mov	w2, 2699
-	add	x1, x1, :lo12:.LANCHOR159
+	mov	w2, 2750
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1335:
-.L976:
+.LVL1337:
+.L982:
 	mov	w0, 1
-	b	.L967
-.LVL1336:
-.L969:
-.LBE261:
-.LBE260:
-	.loc 2 2692 0
+	b	.L973
+.LVL1338:
+.L975:
+.LBE296:
+.LBE295:
+	.loc 2 2743 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L975
-	.loc 2 2692 0 is_stmt 0 discriminator 1
+	beq	.L981
+	.loc 2 2743 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L975
-	.loc 2 2692 0 discriminator 2
+	beq	.L981
+	.loc 2 2743 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L970
-.L975:
-	.loc 2 2694 0 is_stmt 1
+	bne	.L976
+.L981:
+	.loc 2 2745 0 is_stmt 1
 	mov	w0, 0
-.L967:
-	.loc 2 2705 0
+.L973:
+	.loc 2 2756 0
 	ldp	x19, x20, [sp, 16]
-.LVL1337:
+.LVL1339:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12837,13 +12945,13 @@ update_vpc_list:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L968:
+.L974:
 	.cfi_restore_state
-	.loc 2 2702 0
+	.loc 2 2753 0
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL1338:
-	b	.L975
+.LVL1340:
+	b	.L981
 	.cfi_endproc
 .LFE301:
 	.size	update_vpc_list, .-update_vpc_list
@@ -12853,9 +12961,9 @@ update_vpc_list:
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
 .LFB302:
-	.loc 2 2708 0
+	.loc 2 2759 0
 	.cfi_startproc
-.LVL1339:
+.LVL1341:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -12868,39 +12976,39 @@ decrement_vpc_count:
 	and	w19, w0, 65535
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2711 0
+	.loc 2 2762 0
 	mov	w0, 65535
-.LVL1340:
+.LVL1342:
 	cmp	w19, w0
-	beq	.L979
-	.loc 2 2712 0
-	adrp	x21, .LANCHOR43
+	beq	.L985
+	.loc 2 2763 0
+	adrp	x21, .LANCHOR42
 	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR43]
+	ldr	x1, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L980
-	.loc 2 2713 0
+	cbnz	w0, .L986
+	.loc 2 2764 0
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC98
-	add	x0, x0, :lo12:.LC98
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.LVL1341:
-	.loc 2 2714 0
-	ldr	x0, [x21, #:lo12:.LANCHOR43]
+.LVL1343:
+	.loc 2 2765 0
+	ldr	x0, [x21, #:lo12:.LANCHOR42]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L981
-.L986:
-.LVL1342:
-	.loc 2 2715 0 discriminator 1
+	cbz	w0, .L987
+.L992:
+.LVL1344:
+	.loc 2 2766 0 discriminator 1
 	mov	w20, 0
-.LVL1343:
-.L978:
-	.loc 2 2733 0
+.LVL1345:
+.L984:
+	.loc 2 2784 0
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1344:
+.LVL1346:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12910,73 +13018,73 @@ decrement_vpc_count:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1345:
-.L981:
+.LVL1347:
+.L987:
 	.cfi_restore_state
-	.loc 2 2714 0 discriminator 1
-	mov	w2, 2714
-	adrp	x1, .LANCHOR160
+	.loc 2 2765 0 discriminator 1
+	mov	w2, 2765
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1346:
-	b	.L986
-.L980:
-	.loc 2 2717 0
+.LVL1348:
+	b	.L992
+.L986:
+	.loc 2 2768 0
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L979:
-	.loc 2 2721 0
-	adrp	x21, .LANCHOR151
+.L985:
+	.loc 2 2772 0
+	adrp	x21, .LANCHOR150
 	mov	w1, 65535
-	ldrh	w0, [x21, #:lo12:.LANCHOR151]
+	ldrh	w0, [x21, #:lo12:.LANCHOR150]
 	cmp	w0, w1
-	bne	.L983
-	.loc 2 2722 0
-	strh	w19, [x21, #:lo12:.LANCHOR151]
-	b	.L986
-.L983:
-	.loc 2 2724 0
+	bne	.L989
+	.loc 2 2773 0
+	strh	w19, [x21, #:lo12:.LANCHOR150]
+	b	.L992
+.L989:
+	.loc 2 2775 0
 	cmp	w19, w0
-	beq	.L986
-	.loc 2 2727 0
+	beq	.L992
+	.loc 2 2778 0
 	bl	update_vpc_list
-.LVL1347:
+.LVL1349:
 	cmp	w0, 0
-	.loc 2 2730 0
-	adrp	x1, .LANCHOR41
-	adrp	x0, .LANCHOR42
-	.loc 2 2729 0
-	strh	w19, [x21, #:lo12:.LANCHOR151]
-	.loc 2 2727 0
+	.loc 2 2781 0
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LANCHOR41
+	.loc 2 2780 0
+	strh	w19, [x21, #:lo12:.LANCHOR150]
+	.loc 2 2778 0
 	cset	w20, ne
-.LVL1348:
-	.loc 2 2730 0
-	ldr	x1, [x1, #:lo12:.LANCHOR41]
-	ldr	x0, [x0, #:lo12:.LANCHOR42]
+.LVL1350:
+	.loc 2 2781 0
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR43
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L978
-	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cbnz	w1, .L984
+	.loc 2 2781 0 is_stmt 0 discriminator 1
 	cmp	w19, w0, uxth
-	beq	.L978
-	.loc 2 2730 0 discriminator 2
-	mov	w2, 2730
-	adrp	x1, .LANCHOR160
+	beq	.L984
+	.loc 2 2781 0 discriminator 2
+	mov	w2, 2781
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1349:
-	b	.L978
+.LVL1351:
+	b	.L984
 	.cfi_endproc
 .LFE302:
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -12986,7 +13094,7 @@ decrement_vpc_count:
 	.type	FtlWriteDump_data, %function
 FtlWriteDump_data:
 .LFB268:
-	.loc 2 947 0 is_stmt 1
+	.loc 2 996 0 is_stmt 1
 	.cfi_startproc
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
@@ -12997,113 +13105,113 @@ FtlWriteDump_data:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -112
 	.cfi_offset 20, -104
-	.loc 2 948 0
+	.loc 2 997 0
 	adrp	x19, .LANCHOR51
 	add	x0, x19, :lo12:.LANCHOR51
-	.loc 2 947 0
+	.loc 2 996 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	.loc 2 948 0
+	.loc 2 997 0
 	ldrh	w2, [x0, 4]
-	.loc 2 947 0
+	.loc 2 996 0
 	str	x25, [sp, 64]
 	.cfi_offset 21, -96
 	.cfi_offset 22, -88
 	.cfi_offset 23, -80
 	.cfi_offset 24, -72
 	.cfi_offset 25, -64
-	.loc 2 948 0
-	cbz	w2, .L988
-	.loc 2 948 0 is_stmt 0 discriminator 1
+	.loc 2 997 0
+	cbz	w2, .L994
+	.loc 2 997 0 is_stmt 0 discriminator 1
 	ldrb	w1, [x0, 8]
-	cbnz	w1, .L988
-	.loc 2 949 0 is_stmt 1
+	cbnz	w1, .L994
+	.loc 2 998 0 is_stmt 1
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L988
-.LVL1350:
-.LBB265:
-.LBB266:
-	.loc 2 956 0
+	beq	.L994
+.LVL1352:
+.LBB300:
+.LBB301:
+	.loc 2 1005 0
 	ldrb	w0, [x0, 10]
-	cbnz	w0, .L987
-	.loc 2 951 0
-	adrp	x0, .LANCHOR62
-	.loc 2 958 0
+	cbnz	w0, .L993
+	.loc 2 1000 0
+	adrp	x0, .LANCHOR61
+	.loc 2 1007 0
 	mov	w2, 0
 	add	x1, x29, 92
-	.loc 2 951 0
-	ldr	w21, [x0, #:lo12:.LANCHOR62]
-	.loc 2 953 0
+	.loc 2 1000 0
+	ldr	w21, [x0, #:lo12:.LANCHOR61]
+	.loc 2 1002 0
 	adrp	x0, .LANCHOR3
-	.loc 2 951 0
+	.loc 2 1000 0
 	sub	w21, w21, #1
-	.loc 2 953 0
+	.loc 2 1002 0
 	ldrh	w25, [x0, #:lo12:.LANCHOR3]
-	.loc 2 958 0
+	.loc 2 1007 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1351:
-	.loc 2 964 0
-	adrp	x2, .LANCHOR109
-	.loc 2 963 0
-	adrp	x0, .LANCHOR39
-	.loc 2 961 0
+.LVL1353:
+	.loc 2 1013 0
+	adrp	x2, .LANCHOR108
+	.loc 2 1012 0
+	adrp	x0, .LANCHOR107
+	.loc 2 1010 0
 	ldr	w1, [x29, 92]
-	.loc 2 964 0
-	ldr	x20, [x2, #:lo12:.LANCHOR109]
-	.loc 2 963 0
-	ldr	x0, [x0, #:lo12:.LANCHOR39]
-	.loc 2 967 0
+	.loc 2 1013 0
+	ldr	x20, [x2, #:lo12:.LANCHOR108]
+	.loc 2 1012 0
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	.loc 2 1016 0
 	cmn	w1, #1
-	.loc 2 961 0
+	.loc 2 1010 0
 	str	w1, [x29, 100]
-	.loc 2 964 0
+	.loc 2 1013 0
 	stp	x0, x20, [x29, 104]
-.LVL1352:
-	.loc 2 962 0
+.LVL1354:
+	.loc 2 1011 0
 	str	w21, [x29, 120]
-	.loc 2 966 0
+	.loc 2 1015 0
 	str	wzr, [x20, 4]
-	.loc 2 967 0
-	beq	.L990
-	.loc 2 969 0
+	.loc 2 1016 0
+	beq	.L996
+	.loc 2 1018 0
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1353:
-.L991:
-	.loc 2 987 0
-	adrp	x23, .LANCHOR72
-	.loc 2 953 0
+.LVL1355:
+.L997:
+	.loc 2 1036 0
+	adrp	x23, .LANCHOR71
+	.loc 2 1002 0
 	lsl	w25, w25, 2
-.LVL1354:
-	.loc 2 978 0
+.LVL1356:
+	.loc 2 1027 0
 	add	x22, x19, :lo12:.LANCHOR51
-	.loc 2 987 0
-	add	x23, x23, :lo12:.LANCHOR72
-	.loc 2 975 0
+	.loc 2 1036 0
+	add	x23, x23, :lo12:.LANCHOR71
+	.loc 2 1024 0
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
-.L992:
-	.loc 2 976 0
+.L998:
+	.loc 2 1025 0
 	cmp	w25, w24
-	bne	.L996
-.L993:
-	.loc 2 992 0
+	bne	.L1002
+.L999:
+	.loc 2 1041 0
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.LVL1355:
-.L987:
-.LBE266:
-.LBE265:
-	.loc 2 1000 0
+.LVL1357:
+.L993:
+.LBE301:
+.LBE300:
+	.loc 2 1049 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13121,69 +13229,69 @@ FtlWriteDump_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1356:
-.L990:
+.LVL1358:
+.L996:
 	.cfi_restore_state
-.LBB268:
-.LBB267:
-	.loc 2 973 0
+.LBB303:
+.LBB302:
+	.loc 2 1022 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1357:
-	b	.L991
-.LVL1358:
-.L996:
-	.loc 2 978 0
+.LVL1359:
+	b	.L997
+.LVL1360:
+.L1002:
+	.loc 2 1027 0
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L993
-	.loc 2 983 0
+	cbz	w0, .L999
+	.loc 2 1032 0
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
 	stp	w21, w0, [x20, 8]
-	.loc 2 984 0
+	.loc 2 1033 0
 	ldrh	w0, [x22]
 	strh	w0, [x20, 2]
-	.loc 2 986 0
+	.loc 2 1035 0
 	mov	x0, x22
 	bl	get_new_active_ppa
-.LVL1359:
+.LVL1361:
 	str	w0, [x29, 100]
-	.loc 2 987 0
+	.loc 2 1036 0
 	ldr	w0, [x23]
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w3, 0
-	.loc 2 987 0
+	.loc 2 1036 0
 	str	w0, [x20, 4]
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w2, 0
-	.loc 2 987 0
+	.loc 2 1036 0
 	add	w0, w0, 1
-	.loc 2 988 0
+	.loc 2 1037 0
 	mov	w1, 1
-	.loc 2 987 0
+	.loc 2 1036 0
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
 	str	w0, [x23]
-	.loc 2 988 0
+	.loc 2 1037 0
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1360:
-	.loc 2 990 0
+.LVL1362:
+	.loc 2 1039 0
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-.LVL1361:
-	b	.L992
-.LVL1362:
-.L988:
-.LBE267:
-.LBE268:
-	.loc 2 998 0
+.LVL1363:
+	b	.L998
+.LVL1364:
+.L994:
+.LBE302:
+.LBE303:
+	.loc 2 1047 0
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
-	.loc 2 1000 0
-	b	.L987
+	.loc 2 1049 0
+	b	.L993
 	.cfi_endproc
 .LFE268:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -13193,7 +13301,7 @@ FtlWriteDump_data:
 	.type	l2p_flush, %function
 l2p_flush:
 .LFB261:
-	.loc 2 740 0
+	.loc 2 789 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
@@ -13204,29 +13312,29 @@ l2p_flush:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 746 0
+	.loc 2 795 0
 	adrp	x20, .LANCHOR33
 	add	x20, x20, :lo12:.LANCHOR33
-	.loc 2 740 0
+	.loc 2 789 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 746 0
+	.loc 2 795 0
 	mov	w19, 0
-	.loc 2 747 0
-	adrp	x21, .LANCHOR56
-	.loc 2 744 0
+	.loc 2 796 0
+	adrp	x21, .LANCHOR55
+	.loc 2 793 0
 	bl	FtlWriteDump_data
-.LVL1363:
-.L1006:
-	.loc 2 746 0 discriminator 1
+.LVL1365:
+.L1012:
+	.loc 2 795 0 discriminator 1
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1008
-	.loc 2 750 0
+	bhi	.L1014
+	.loc 2 799 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1364:
+.LVL1366:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -13236,26 +13344,26 @@ l2p_flush:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1365:
-.L1008:
+.LVL1367:
+.L1014:
 	.cfi_restore_state
-	.loc 2 747 0
-	ldr	x1, [x21, #:lo12:.LANCHOR56]
+	.loc 2 796 0
+	ldr	x1, [x21, #:lo12:.LANCHOR55]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1007
-	.loc 2 748 0
+	tbz	w0, #31, .L1013
+	.loc 2 797 0
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1366:
-.L1007:
-	.loc 2 746 0 discriminator 2
+.LVL1368:
+.L1013:
+	.loc 2 795 0 discriminator 2
 	add	w19, w19, 1
-.LVL1367:
+.LVL1369:
 	and	w19, w19, 65535
-.LVL1368:
-	b	.L1006
+.LVL1370:
+	b	.L1012
 	.cfi_endproc
 .LFE261:
 	.size	l2p_flush, .-l2p_flush
@@ -13265,16 +13373,16 @@ l2p_flush:
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
 .LFB281:
-	.loc 2 1656 0
+	.loc 2 1705 0
 	.cfi_startproc
-.LVL1369:
+.LVL1371:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
 	.cfi_offset 30, -184
-	.loc 2 1670 0
+	.loc 2 1719 0
 	mov	w1, 65535
-	.loc 2 1656 0
+	.loc 2 1705 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
@@ -13282,15 +13390,15 @@ FtlRecoverySuperblock:
 	.cfi_offset 20, -168
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	.loc 2 1670 0
+	.loc 2 1719 0
 	ldrh	w0, [x0]
-.LVL1370:
-	.loc 2 1656 0
+.LVL1372:
+	.loc 2 1705 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	.loc 2 1670 0
+	.loc 2 1719 0
 	cmp	w0, w1
-	.loc 2 1656 0
+	.loc 2 1705 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 21, -160
 	.cfi_offset 22, -152
@@ -13300,32 +13408,32 @@ FtlRecoverySuperblock:
 	.cfi_offset 26, -120
 	.cfi_offset 27, -112
 	.cfi_offset 28, -104
-	.loc 2 1670 0
-	beq	.L1134
-	.loc 2 1676 0
+	.loc 2 1719 0
+	beq	.L1140
+	.loc 2 1725 0
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
-	.loc 2 1681 0
+	.loc 2 1730 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1675 0
+	.loc 2 1724 0
 	ldrh	w26, [x19, 2]
-.LVL1371:
+.LVL1373:
 	str	x0, [x29, 128]
-	.loc 2 1681 0
+	.loc 2 1730 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1013
-	.loc 2 1682 0
+	bne	.L1019
+	.loc 2 1731 0
 	strh	wzr, [x19, 4]
-.LVL1372:
-.L1140:
-	.loc 2 1709 0
+.LVL1374:
+.L1146:
+	.loc 2 1758 0
 	strb	wzr, [x19, 6]
-.LVL1373:
-.L1134:
-	.loc 2 2010 0
+.LVL1375:
+.L1140:
+	.loc 2 2059 0
 	ldp	x19, x20, [sp, 16]
-.LVL1374:
+.LVL1376:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13347,54 +13455,54 @@ FtlRecoverySuperblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1375:
-.L1013:
+.LVL1377:
+.L1019:
 	.cfi_restore_state
-	.loc 2 1689 0
+	.loc 2 1738 0
 	ldrh	w0, [x19, 16]
-.LVL1376:
-	.loc 2 1688 0
+.LVL1378:
+	.loc 2 1737 0
 	mov	w20, 0
-.LVL1377:
-.L1014:
-	.loc 2 1690 0
+.LVL1379:
+.L1020:
+	.loc 2 1739 0
 	cmp	w0, w1
-	beq	.L1015
-	.loc 2 1697 0
+	beq	.L1021
+	.loc 2 1746 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1378:
+.LVL1380:
 	mov	w23, w0
-.LVL1379:
-	.loc 2 1705 0
+.LVL1381:
+	.loc 2 1754 0
 	cmn	w0, #1
-	beq	.L1016
-	.loc 2 1721 0
-	adrp	x1, .LANCHOR93
-	.loc 2 1717 0
+	beq	.L1022
+	.loc 2 1770 0
+	adrp	x1, .LANCHOR91
+	.loc 2 1766 0
 	adrp	x2, .LANCHOR3
-	.loc 2 1720 0
+	.loc 2 1769 0
 	adrp	x20, .LANCHOR120
-.LVL1380:
-	.loc 2 1722 0
+.LVL1382:
+	.loc 2 1771 0
 	add	x4, x19, 16
-	.loc 2 1721 0
-	ldr	x5, [x1, #:lo12:.LANCHOR93]
+	.loc 2 1770 0
+	ldr	x5, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR23
-	.loc 2 1720 0
+	.loc 2 1769 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1381:
-	.loc 2 1722 0
+.LVL1383:
+	.loc 2 1771 0
 	mov	w22, 0
-	.loc 2 1721 0
+	.loc 2 1770 0
 	ldrh	w6, [x1, #:lo12:.LANCHOR23]
-	.loc 2 1722 0
-	adrp	x1, .LANCHOR94
-	.loc 2 1719 0
+	.loc 2 1771 0
+	adrp	x1, .LANCHOR92
+	.loc 2 1768 0
 	mov	w10, 65535
 	str	x2, [x29, 152]
-	.loc 2 1722 0
-	ldr	x7, [x1, #:lo12:.LANCHOR94]
+	.loc 2 1771 0
+	ldr	x7, [x1, #:lo12:.LANCHOR92]
 	adrp	x1, .LANCHOR24
 	ldrh	w8, [x1, #:lo12:.LANCHOR24]
 	add	x1, x19, 16
@@ -13402,910 +13510,910 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1017:
-.LVL1382:
-	.loc 2 1717 0 discriminator 1
+.L1023:
+.LVL1384:
+	.loc 2 1766 0 discriminator 1
 	cmp	x4, x1
-	bne	.L1021
-	.loc 2 1727 0
+	bne	.L1027
+	.loc 2 1776 0
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-.LVL1383:
-	.loc 2 1728 0
-	adrp	x0, .LANCHOR72
-	.loc 2 1730 0
+.LVL1385:
+	.loc 2 1777 0
+	adrp	x0, .LANCHOR71
+	.loc 2 1779 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1742 0
+	.loc 2 1791 0
 	and	w10, w23, 65535
-	.loc 2 1733 0
-	add	x7, x0, :lo12:.LANCHOR72
-	.loc 2 1728 0
-	ldr	w21, [x0, #:lo12:.LANCHOR72]
+	.loc 2 1782 0
+	add	x7, x0, :lo12:.LANCHOR71
+	.loc 2 1777 0
+	ldr	w21, [x0, #:lo12:.LANCHOR71]
 	mov	x11, x4
-	.loc 2 1666 0
+	.loc 2 1715 0
 	mov	w6, 65535
-	.loc 2 1729 0
+	.loc 2 1778 0
 	mov	w3, 0
-	.loc 2 1728 0
+	.loc 2 1777 0
 	sub	w21, w21, #1
-.LVL1384:
+.LVL1386:
 	str	x0, [x29, 144]
-.LVL1385:
-.L1022:
-	.loc 2 1729 0 discriminator 1
+.LVL1387:
+.L1028:
+	.loc 2 1778 0 discriminator 1
 	cmp	w22, w3
-	bne	.L1027
-	.loc 2 1747 0
+	bne	.L1033
+	.loc 2 1796 0
 	add	w22, w23, 1
-.LVL1386:
-	.loc 2 1749 0
+.LVL1388:
+	.loc 2 1798 0
 	ldr	w0, [x4, 4]
-	.loc 2 1747 0
+	.loc 2 1796 0
 	and	w22, w22, 65535
-.LVL1387:
-.L1136:
-	.loc 2 1753 0
+.LVL1389:
+.L1142:
+	.loc 2 1802 0
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1388:
+.LVL1390:
 	and	w27, w0, 65535
-.LVL1389:
-	.loc 2 1758 0
+.LVL1391:
+	.loc 2 1807 0
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1029
-	.loc 2 1759 0
+	bne	.L1035
+	.loc 2 1808 0
 	strh	w22, [x19, 2]
-	.loc 2 1760 0
+	.loc 2 1809 0
 	strb	wzr, [x19, 6]
-	.loc 2 1761 0
+	.loc 2 1810 0
 	strh	wzr, [x19, 4]
-.L1029:
-	.loc 2 1764 0
+.L1035:
+	.loc 2 1813 0
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
 	cset	w1, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1030
-.LVL1390:
-.L1141:
-	.loc 2 2004 0
+	beq	.L1036
+.LVL1392:
+.L1147:
+	.loc 2 2053 0
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-.LVL1391:
-	b	.L1134
-.LVL1392:
-.L1015:
-	.loc 2 1691 0
-	add	w20, w20, 1
 .LVL1393:
-	and	w20, w20, 65535
+	b	.L1140
 .LVL1394:
-	.loc 2 1692 0
-	add	x0, x19, x20, sxtw 1
+.L1021:
+	.loc 2 1740 0
+	add	w20, w20, 1
 .LVL1395:
-	ldrh	w0, [x0, 16]
+	and	w20, w20, 65535
 .LVL1396:
-	b	.L1014
+	.loc 2 1741 0
+	add	x0, x19, x20, sxtw 1
 .LVL1397:
-.L1016:
-	.loc 2 1706 0
-	cbz	w26, .L1018
-	.loc 2 1706 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR161
-	adrp	x0, .LC1
+	ldrh	w0, [x0, 16]
 .LVL1398:
-	mov	w2, 1706
-	add	x1, x1, :lo12:.LANCHOR161
+	b	.L1020
+.LVL1399:
+.L1022:
+	.loc 2 1755 0
+	cbz	w26, .L1024
+	.loc 2 1755 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+.LVL1400:
+	mov	w2, 1755
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1399:
-.L1018:
-	.loc 2 1707 0 is_stmt 1
+.LVL1401:
+.L1024:
+	.loc 2 1756 0 is_stmt 1
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1019
-	.loc 2 1707 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR161
+	beq	.L1025
+	.loc 2 1756 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
-	mov	w2, 1707
-	add	x1, x1, :lo12:.LANCHOR161
+	mov	w2, 1756
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1400:
-.L1019:
-	.loc 2 1708 0 is_stmt 1
+.LVL1402:
+.L1025:
+	.loc 2 1757 0 is_stmt 1
 	strh	wzr, [x19, 2]
-	b	.L1140
-.LVL1401:
-.L1021:
-	.loc 2 1718 0
+	b	.L1146
+.LVL1403:
+.L1027:
+	.loc 2 1767 0
 	ldrh	w3, [x4]
-.LVL1402:
-	.loc 2 1719 0
+.LVL1404:
+	.loc 2 1768 0
 	cmp	w3, w10
-	beq	.L1020
-	.loc 2 1720 0
+	beq	.L1026
+	.loc 2 1769 0
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
-.LVL1403:
+.LVL1405:
 	add	x2, x0, x2
 	str	w3, [x2, 4]
-	.loc 2 1721 0
+	.loc 2 1770 0
 	mul	w3, w22, w6
 	asr	w3, w3, 2
 	add	x3, x5, x3, sxtw 2
 	str	x3, [x2, 8]
-	.loc 2 1722 0
+	.loc 2 1771 0
 	mul	w3, w22, w8
-	.loc 2 1723 0
+	.loc 2 1772 0
 	add	w22, w22, 1
-.LVL1404:
+.LVL1406:
 	and	w22, w22, 65535
-.LVL1405:
-	.loc 2 1722 0
+.LVL1407:
+	.loc 2 1771 0
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1020:
+.L1026:
 	add	x4, x4, 2
-.LVL1406:
-	b	.L1017
-.LVL1407:
-.L1027:
-	.loc 2 1730 0
+.LVL1408:
+	b	.L1023
+.LVL1409:
+.L1033:
+	.loc 2 1779 0
 	ldr	w0, [x11]
-	cbnz	w0, .L1023
-	.loc 2 1731 0
+	cbnz	w0, .L1029
+	.loc 2 1780 0
 	ldr	x8, [x11, 16]
-.LVL1408:
-	.loc 2 1732 0
+.LVL1410:
+	.loc 2 1781 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1024
-	.loc 2 1733 0
+	beq	.L1030
+	.loc 2 1782 0
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1409:
-	cbz	w0, .L1024
-	.loc 2 1735 0
+.LVL1411:
+	cbz	w0, .L1030
+	.loc 2 1784 0
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1024:
-	.loc 2 1738 0
+.L1030:
+	.loc 2 1787 0
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1026
-	.loc 2 1753 0
+	bne	.L1032
+	.loc 2 1802 0
 	ubfiz	x3, x3, 5, 16
-.LVL1410:
-	.loc 2 1752 0
+.LVL1412:
+	.loc 2 1801 0
 	and	w22, w23, 65535
-.LVL1411:
-	.loc 2 1753 0
+.LVL1413:
+	.loc 2 1802 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1136
-.LVL1412:
-.L1023:
-	.loc 2 1742 0
+	b	.L1142
+.LVL1414:
+.L1029:
+	.loc 2 1791 0
 	mov	w6, w10
-.LVL1413:
-.L1026:
-	.loc 2 1729 0 discriminator 2
+.LVL1415:
+.L1032:
+	.loc 2 1778 0 discriminator 2
 	add	w3, w3, 1
-.LVL1414:
+.LVL1416:
 	add	x11, x11, 32
 	and	w3, w3, 65535
-.LVL1415:
-	b	.L1022
-.LVL1416:
-.L1030:
-	.loc 2 1770 0
+.LVL1417:
+	b	.L1028
+.LVL1418:
+.L1036:
+	.loc 2 1819 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1031
-	.loc 2 1770 0 is_stmt 0 discriminator 1
+	bne	.L1037
+	.loc 2 1819 0 is_stmt 0 discriminator 1
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1032
-.L1031:
-.LVL1417:
-.LBB269:
-	.loc 2 1775 0 is_stmt 1
-	adrp	x25, .LANCHOR154
-	.loc 2 1774 0
+	cbnz	w0, .L1038
+.L1037:
+.LVL1419:
+.LBB304:
+	.loc 2 1824 0 is_stmt 1
+	adrp	x25, .LANCHOR153
+	.loc 2 1823 0
 	and	w28, w23, 65535
-.LVL1418:
-	.loc 2 1775 0
-	ldr	w0, [x25, #:lo12:.LANCHOR154]
+.LVL1420:
+	.loc 2 1824 0
+	ldr	w0, [x25, #:lo12:.LANCHOR153]
 	cmn	w0, #1
-	bne	.L1033
-	.loc 2 1776 0
-	str	w21, [x25, #:lo12:.LANCHOR154]
-.L1033:
-.LVL1419:
-	.loc 2 1778 0
+	bne	.L1039
+	.loc 2 1825 0
+	str	w21, [x25, #:lo12:.LANCHOR153]
+.L1039:
+.LVL1421:
+	.loc 2 1827 0
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1083
-	.loc 2 1779 0
+	bge	.L1089
+	.loc 2 1828 0
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.LVL1420:
-.L1034:
-	.loc 2 1782 0 discriminator 1
+.LVL1422:
+.L1040:
+	.loc 2 1831 0 discriminator 1
 	ldr	x0, [x29, 152]
-	.loc 2 1784 0 discriminator 1
+	.loc 2 1833 0 discriminator 1
 	mov	w3, 65535
 	mov	w5, 1
-	.loc 2 1782 0 discriminator 1
+	.loc 2 1831 0 discriminator 1
 	add	x4, x0, :lo12:.LANCHOR3
-.LVL1421:
-.L1035:
-	.loc 2 1780 0 discriminator 1
+.LVL1423:
+.L1041:
+	.loc 2 1829 0 discriminator 1
 	cmp	w24, w28
-	bhi	.L1045
+	bhi	.L1051
 	ldrh	w1, [x4]
-	.loc 2 1785 0
+	.loc 2 1834 0
 	mov	w23, 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1046
-.LVL1422:
-.L1083:
+	b	.L1052
+.LVL1424:
+.L1089:
 	mov	w24, w26
-	b	.L1034
-.LVL1423:
-.L1037:
-	.loc 2 1783 0
+	b	.L1040
+.LVL1425:
+.L1043:
+	.loc 2 1832 0
 	ldrh	w6, [x2]
-.LVL1424:
-	.loc 2 1784 0
+.LVL1426:
+	.loc 2 1833 0
 	cmp	w6, w3
-	beq	.L1036
-	.loc 2 1785 0
+	beq	.L1042
+	.loc 2 1834 0
 	ubfiz	x7, x23, 5, 16
-	.loc 2 1786 0
+	.loc 2 1835 0
 	add	w23, w23, 1
-.LVL1425:
-	.loc 2 1785 0
+.LVL1427:
+	.loc 2 1834 0
 	add	x7, x0, x7
-	.loc 2 1786 0
+	.loc 2 1835 0
 	and	w23, w23, 65535
-.LVL1426:
-	.loc 2 1785 0
+.LVL1428:
+	.loc 2 1834 0
 	orr	w6, w24, w6, lsl 10
-.LVL1427:
+.LVL1429:
 	str	w6, [x7, 4]
-.L1036:
+.L1042:
 	add	x2, x2, 2
-.LVL1428:
-.L1046:
-	.loc 2 1782 0 discriminator 1
+.LVL1430:
+.L1052:
+	.loc 2 1831 0 discriminator 1
 	cmp	x2, x1
-	bne	.L1037
-	.loc 2 1789 0
+	bne	.L1043
+	.loc 2 1838 0
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
 	ubfiz	x23, x23, 5, 16
-.LVL1429:
+.LVL1431:
 	str	w3, [x29, 120]
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-.LVL1430:
-	.loc 2 1791 0
+.LVL1432:
+	.loc 2 1840 0
 	ldr	x2, [x20, #:lo12:.LANCHOR120]
-	ldr	w1, [x25, #:lo12:.LANCHOR154]
-	.loc 2 1790 0
+	ldr	w1, [x25, #:lo12:.LANCHOR153]
+	.loc 2 1839 0
 	ldr	w5, [x29, 112]
 	add	x0, x2, 16
 	ldr	w3, [x29, 120]
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.LVL1431:
-.L1038:
-	.loc 2 1790 0 is_stmt 0 discriminator 1
-	cmp	x23, x0
-	bne	.L1043
-	cbz	w2, .L1044
-	str	w1, [x25, #:lo12:.LANCHOR154]
+.LVL1433:
 .L1044:
-	.loc 2 1780 0 is_stmt 1
+	.loc 2 1839 0 is_stmt 0 discriminator 1
+	cmp	x23, x0
+	bne	.L1049
+	cbz	w2, .L1050
+	str	w1, [x25, #:lo12:.LANCHOR153]
+.L1050:
+	.loc 2 1829 0 is_stmt 1
 	add	w24, w24, 1
-.LVL1432:
+.LVL1434:
 	and	w24, w24, 65535
-.LVL1433:
-	b	.L1035
-.L1043:
-	.loc 2 1791 0
+.LVL1435:
+	b	.L1041
+.L1049:
+	.loc 2 1840 0
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1039
-	cbz	w2, .L1032
-	str	w1, [x25, #:lo12:.LANCHOR154]
-.LVL1434:
-.L1032:
-.LBE269:
-	.loc 2 1814 0
+	cbz	w6, .L1045
+	cbz	w2, .L1038
+	str	w1, [x25, #:lo12:.LANCHOR153]
+.LVL1436:
+.L1038:
+.LBE304:
+	.loc 2 1863 0
 	mov	w1, 1
-	adrp	x0, .LANCHOR162
-	.loc 2 1815 0
+	adrp	x0, .LANCHOR161
+	.loc 2 1864 0
 	mov	w23, w26
-	.loc 2 1975 0
-	adrp	x28, .LANCHOR154
-	.loc 2 1814 0
-	strh	w1, [x0, #:lo12:.LANCHOR162]
-	.loc 2 1815 0
+	.loc 2 2024 0
+	adrp	x28, .LANCHOR153
+	.loc 2 1863 0
+	strh	w1, [x0, #:lo12:.LANCHOR161]
+	.loc 2 1864 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1435:
-.LBB270:
-	.loc 2 1897 0
-	add	x0, x28, :lo12:.LANCHOR154
+.LVL1437:
+.LBB305:
+	.loc 2 1946 0
+	add	x0, x28, :lo12:.LANCHOR153
 	str	x0, [x29, 104]
-.LVL1436:
-.L1047:
+.LVL1438:
+.L1053:
 	ldr	x1, [x29, 152]
-.LBE270:
-	.loc 2 1820 0
+.LBE305:
+	.loc 2 1869 0
 	mov	w24, 0
-	.loc 2 1824 0
+	.loc 2 1873 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1823 0
+	.loc 2 1872 0
 	mov	w5, 65535
-	.loc 2 1821 0
+	.loc 2 1870 0
 	ldr	x2, [x29, 168]
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.LVL1437:
-.L1048:
-	.loc 2 1821 0 is_stmt 0 discriminator 1
+.LVL1439:
+.L1054:
+	.loc 2 1870 0 is_stmt 0 discriminator 1
 	cmp	x1, x2
-	bne	.L1050
-	.loc 2 1828 0 is_stmt 1
+	bne	.L1056
+	.loc 2 1877 0 is_stmt 1
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
-.LVL1438:
-	.loc 2 1829 0
+.LVL1440:
+	.loc 2 1878 0
 	mov	x25, 0
 	ubfiz	x0, x24, 5, 16
 	str	x0, [x29, 112]
-	.loc 2 1969 0
-	adrp	x0, .LANCHOR163
-	add	x0, x0, :lo12:.LANCHOR163
+	.loc 2 2018 0
+	adrp	x0, .LANCHOR162
+	add	x0, x0, :lo12:.LANCHOR162
 	str	x0, [x29, 120]
-.LVL1439:
-.L1051:
-	.loc 2 1829 0 discriminator 1
+.LVL1441:
+.L1057:
+	.loc 2 1878 0 discriminator 1
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L1077
-	.loc 2 1983 0
+	bne	.L1083
+	.loc 2 2032 0
 	ldr	x0, [x29, 128]
-	.loc 2 1982 0
+	.loc 2 2031 0
 	add	w23, w23, 1
-.LVL1440:
+.LVL1442:
 	and	w23, w23, 65535
-.LVL1441:
-	.loc 2 1983 0
+.LVL1443:
+	.loc 2 2032 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L1047
-	.loc 2 1986 0
+	bne	.L1053
+	.loc 2 2035 0
 	ldr	x0, [x29, 152]
-	.loc 2 1988 0
+	.loc 2 2037 0
 	mov	w2, 65535
-	.loc 2 1984 0
+	.loc 2 2033 0
 	strh	w23, [x19, 2]
-	.loc 2 1985 0
+	.loc 2 2034 0
 	strh	wzr, [x19, 4]
-.LVL1442:
-	.loc 2 1986 0
+.LVL1444:
+	.loc 2 2035 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.LVL1443:
-.L1078:
-	.loc 2 1986 0 is_stmt 0 discriminator 1
+.LVL1445:
+.L1084:
+	.loc 2 2035 0 is_stmt 0 discriminator 1
 	cmp	w0, w1
-	beq	.L1134
-.LVL1444:
-	.loc 2 1988 0 is_stmt 1
+	beq	.L1140
+.LVL1446:
+	.loc 2 2037 0 is_stmt 1
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
-.LVL1445:
+.LVL1447:
 	cmp	w3, w2
-	beq	.L1079
-	.loc 2 1989 0
+	beq	.L1085
+	.loc 2 2038 0
 	strb	w0, [x19, 6]
-.LVL1446:
-	.loc 2 1990 0
-	b	.L1134
-.LVL1447:
-.L1039:
-.LBB271:
-	.loc 2 1792 0
-	ldr	x6, [x0]
 .LVL1448:
-	.loc 2 1793 0
+	.loc 2 2039 0
+	b	.L1140
+.LVL1449:
+.L1045:
+.LBB306:
+	.loc 2 1841 0
+	ldr	x6, [x0]
+.LVL1450:
+	.loc 2 1842 0
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1042
-	.loc 2 1795 0
+	beq	.L1048
+	.loc 2 1844 0
 	ldr	w6, [x6, 4]
-.LVL1449:
+.LVL1451:
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1042:
+.L1048:
 	add	x0, x0, 32
-.LVL1450:
-	b	.L1038
-.LVL1451:
-.L1045:
-	.loc 2 1809 0
-	mov	w0, -1
-	str	w0, [x25, #:lo12:.LANCHOR154]
-	b	.L1032
 .LVL1452:
-.L1050:
-.LBE271:
-	.loc 2 1822 0
-	ldrh	w3, [x2]
+	b	.L1044
 .LVL1453:
-	.loc 2 1823 0
+.L1051:
+	.loc 2 1858 0
+	mov	w0, -1
+	str	w0, [x25, #:lo12:.LANCHOR153]
+	b	.L1038
+.LVL1454:
+.L1056:
+.LBE306:
+	.loc 2 1871 0
+	ldrh	w3, [x2]
+.LVL1455:
+	.loc 2 1872 0
 	cmp	w3, w5
-	beq	.L1049
-	.loc 2 1824 0
+	beq	.L1055
+	.loc 2 1873 0
 	ubfiz	x4, x24, 5, 16
-	.loc 2 1825 0
+	.loc 2 1874 0
 	add	w24, w24, 1
-.LVL1454:
-	.loc 2 1824 0
+.LVL1456:
+	.loc 2 1873 0
 	add	x4, x0, x4
-	.loc 2 1825 0
+	.loc 2 1874 0
 	and	w24, w24, 65535
-.LVL1455:
-	.loc 2 1824 0
+.LVL1457:
+	.loc 2 1873 0
 	orr	w3, w23, w3, lsl 10
-.LVL1456:
+.LVL1458:
 	str	w3, [x4, 4]
-.L1049:
+.L1055:
 	add	x2, x2, 2
-.LVL1457:
-	b	.L1048
-.LVL1458:
-.L1077:
-	.loc 2 1830 0
+.LVL1459:
+	b	.L1054
+.LVL1460:
+.L1083:
+	.loc 2 1879 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 188]
-	.loc 2 1831 0
+	.loc 2 1880 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1459:
+.LVL1461:
 	and	w0, w0, 65535
-.LVL1460:
-	.loc 2 1833 0
+.LVL1462:
+	.loc 2 1882 0
 	cmp	w23, w26
-	bcc	.L1052
-	.loc 2 1833 0 is_stmt 0 discriminator 1
+	bcc	.L1058
+	.loc 2 1882 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1052
-	.loc 2 1837 0 is_stmt 1
+	bhi	.L1058
+	.loc 2 1886 0 is_stmt 1
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1053
-.LVL1461:
-	.loc 2 1841 0
+	beq	.L1059
+.LVL1463:
+	.loc 2 1890 0
 	ldr	w0, [x4]
-.LVL1462:
+.LVL1464:
 	cmn	w0, #1
-	beq	.L1054
-	.loc 2 1842 0
+	beq	.L1060
+	.loc 2 1891 0
 	ldr	x3, [x4, 16]
-.LVL1463:
-	.loc 2 1843 0
+.LVL1465:
+	.loc 2 1892 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1055
-.LVL1464:
-.L1061:
-.LBB272:
-	.loc 2 1876 0
+	beq	.L1061
+.LVL1466:
+.L1067:
+.LBB307:
+	.loc 2 1925 0
 	ldrh	w0, [x19]
-.LVL1465:
-.L1139:
-.LBE272:
-	.loc 2 1960 0
+.LVL1467:
+.L1145:
+.LBE307:
+	.loc 2 2009 0
 	bl	decrement_vpc_count
-.LVL1466:
-.L1052:
+.LVL1468:
+.L1058:
 	add	x25, x25, 32
-	b	.L1051
-.LVL1467:
-.L1055:
-	.loc 2 1849 0
+	b	.L1057
+.LVL1469:
+.L1061:
+	.loc 2 1898 0
 	ldr	w21, [x3, 4]
-.LVL1468:
-	.loc 2 1850 0
+.LVL1470:
+	.loc 2 1899 0
 	cmn	w21, #1
-	beq	.L1056
-	.loc 2 1851 0 discriminator 1
+	beq	.L1062
+	.loc 2 1900 0 discriminator 1
 	ldr	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1469:
-	.loc 2 1850 0 discriminator 1
-	cbz	w0, .L1056
-	.loc 2 1853 0
+.LVL1471:
+	.loc 2 1899 0 discriminator 1
+	cbz	w0, .L1062
+	.loc 2 1902 0
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR72]
-.L1056:
-	.loc 2 1858 0
+	str	w0, [x1, #:lo12:.LANCHOR71]
+.L1062:
+	.loc 2 1907 0
 	ldp	w24, w0, [x3, 8]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	add	x1, x29, 184
-	.loc 2 1858 0
+	.loc 2 1907 0
 	str	w0, [x29, 180]
-	.loc 2 1859 0
+	.loc 2 1908 0
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-.LVL1470:
-	.loc 2 1860 0
-	ldr	w1, [x28, #:lo12:.LANCHOR154]
+.LVL1472:
+	.loc 2 1909 0
+	ldr	w1, [x28, #:lo12:.LANCHOR153]
 	cmn	w1, #1
-	beq	.L1057
-	.loc 2 1861 0 discriminator 1
+	beq	.L1063
+	.loc 2 1910 0 discriminator 1
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1471:
-	.loc 2 1860 0 discriminator 1
-	cbz	w0, .L1057
-.LBB273:
-	.loc 2 1865 0
+.LVL1473:
+	.loc 2 1909 0 discriminator 1
+	cbz	w0, .L1063
+.LBB308:
+	.loc 2 1914 0
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
-	beq	.L1058
-	.loc 2 1866 0
+	beq	.L1064
+	.loc 2 1915 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	mov	w2, 0
-	.loc 2 1866 0
+	.loc 2 1915 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
-	.loc 2 1867 0
+	.loc 2 1916 0
 	str	w1, [x0, 4]
-	.loc 2 1868 0
+	.loc 2 1917 0
 	mov	w1, 1
-	.loc 2 1866 0
+	.loc 2 1915 0
 	str	x3, [x29, 136]
-.LVL1472:
-	.loc 2 1868 0
+.LVL1474:
+	.loc 2 1917 0
 	bl	FlashReadPages
-.LVL1473:
-	.loc 2 1881 0
+.LVL1475:
+	.loc 2 1930 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	x3, [x29, 136]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1059
-.LVL1474:
-.L1060:
-	.loc 2 1913 0
+	bne	.L1065
+.LVL1476:
+.L1066:
+	.loc 2 1962 0
 	mov	w0, -1
 	str	w0, [x29, 180]
-	.loc 2 1914 0
+	.loc 2 1963 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1475:
-.L1068:
-.LBE273:
-	.loc 2 1954 0
+.LVL1477:
+.L1074:
+.LBE308:
+	.loc 2 2003 0
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1052
-.L1082:
-	.loc 2 1956 0
+	beq	.L1058
+.L1088:
+	.loc 2 2005 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1476:
+.LVL1478:
 	and	w24, w0, 65535
-	.loc 2 1957 0
+	.loc 2 2006 0
 	adrp	x0, .LANCHOR5
-	.loc 2 1956 0
+	.loc 2 2005 0
 	mov	w3, w24
-.LVL1477:
-	.loc 2 1957 0
+.LVL1479:
+	.loc 2 2006 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L1073
-	.loc 2 1957 0 is_stmt 0 discriminator 1
-	mov	w2, 1957
-	adrp	x1, .LANCHOR161
+	bhi	.L1079
+	.loc 2 2006 0 is_stmt 0 discriminator 1
+	mov	w2, 2006
+	adrp	x1, .LANCHOR160
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	str	w24, [x29, 136]
 	bl	printf
-.LVL1478:
+.LVL1480:
 	ldr	w3, [x29, 136]
-.LVL1479:
-.L1073:
-	.loc 2 1958 0 is_stmt 1
-	adrp	x1, .LANCHOR43
+.LVL1481:
+.L1079:
+	.loc 2 2007 0 is_stmt 1
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1074
-	.loc 2 1960 0
+	cbz	w0, .L1080
+	.loc 2 2009 0
 	mov	w0, w3
-	b	.L1139
-.LVL1480:
-.L1058:
-.LBB274:
-	.loc 2 1872 0
+	b	.L1145
+.LVL1482:
+.L1064:
+.LBB309:
+	.loc 2 1921 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1061
-	.loc 2 1873 0
+	bne	.L1067
+	.loc 2 1922 0
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.LVL1481:
-	b	.L1061
-.LVL1482:
-.L1059:
-	.loc 2 1881 0 discriminator 1
+.LVL1483:
+	b	.L1067
+.LVL1484:
+.L1065:
+	.loc 2 1930 0 discriminator 1
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L1060
-	.loc 2 1869 0 discriminator 2
+	bne	.L1066
+	.loc 2 1918 0 discriminator 2
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
-.LVL1483:
+.LVL1485:
 	str	x3, [x29, 96]
-	.loc 2 1882 0 discriminator 2
+	.loc 2 1931 0 discriminator 2
 	uxtw	x1, w0
-	ldr	w0, [x28, #:lo12:.LANCHOR154]
+	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	bl	ftl_cmp_data_ver
-.LVL1484:
-	.loc 2 1881 0 discriminator 2
-	cbz	w0, .L1060
-	.loc 2 1883 0
+.LVL1486:
+	.loc 2 1930 0 discriminator 2
+	cbz	w0, .L1066
+	.loc 2 1932 0
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
 	cmp	w0, w1
-	.loc 2 1885 0
+	.loc 2 1934 0
 	ldr	w1, [x29, 180]
-	.loc 2 1883 0
-	bne	.L1063
-.L1137:
-	.loc 2 1909 0
+	.loc 2 1932 0
+	bne	.L1069
+.L1143:
+	.loc 2 1958 0
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-.LVL1485:
-	b	.L1060
-.L1063:
-	.loc 2 1886 0
+.LVL1487:
+	b	.L1066
+.L1069:
+	.loc 2 1935 0
 	cmp	w0, w1
-	beq	.L1060
-	.loc 2 1887 0
+	beq	.L1066
+	.loc 2 1936 0
 	cmn	w0, #1
-	beq	.L1064
-.LVL1486:
-	.loc 2 1888 0
+	beq	.L1070
+.LVL1488:
+	.loc 2 1937 0
 	ldr	x3, [x4, 16]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	w2, 0
-	.loc 2 1889 0
+	.loc 2 1938 0
 	str	w0, [x4, 4]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	w1, 1
-	.loc 2 1888 0
+	.loc 2 1937 0
 	str	x3, [x29, 96]
-	.loc 2 1890 0
+	.loc 2 1939 0
 	mov	x0, x4
 	bl	FlashReadPages
-.LVL1487:
+.LVL1489:
 	ldr	x3, [x29, 96]
-.LVL1488:
-.L1065:
-	.loc 2 1895 0
+.LVL1490:
+.L1071:
+	.loc 2 1944 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1066
-	.loc 2 1897 0
+	beq	.L1072
+	.loc 2 1946 0
 	ldr	x0, [x29, 104]
-	.loc 2 1896 0
+	.loc 2 1945 0
 	ldr	w3, [x3, 4]
-.LVL1489:
-	.loc 2 1897 0
+.LVL1491:
+	.loc 2 1946 0
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-.LVL1490:
-	cbz	w0, .L1066
-	.loc 2 1898 0
+.LVL1492:
+	cbz	w0, .L1072
+	.loc 2 1947 0
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1491:
-	cbz	w0, .L1060
-.LVL1492:
-.L1066:
-	.loc 2 1909 0
+.LVL1493:
+	cbz	w0, .L1066
+.LVL1494:
+.L1072:
+	.loc 2 1958 0
 	ldr	w1, [x29, 180]
-	b	.L1137
-.L1064:
-	.loc 2 1892 0
+	b	.L1143
+.L1070:
+	.loc 2 1941 0
 	str	w0, [x4]
-	b	.L1065
-.L1057:
-.LBE274:
-	.loc 2 1915 0
+	b	.L1071
+.L1063:
+.LBE309:
+	.loc 2 1964 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1068
-	.loc 2 1917 0
+	beq	.L1074
+	.loc 2 1966 0
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
-.LVL1493:
-	.loc 2 1918 0
+.LVL1495:
+	.loc 2 1967 0
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1068
-	.loc 2 1918 0 is_stmt 0 discriminator 1
+	beq	.L1074
+	.loc 2 1967 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1082
-	.loc 2 1919 0 is_stmt 1
+	beq	.L1088
+	.loc 2 1968 0 is_stmt 1
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1494:
-	.loc 2 1921 0
+.LVL1496:
+	.loc 2 1970 0
 	adrp	x1, .LANCHOR51
-	.loc 2 1919 0
+	.loc 2 1968 0
 	and	w0, w0, 65535
-.LVL1495:
-	.loc 2 1921 0
+.LVL1497:
+	.loc 2 1970 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1072
-	.loc 2 1922 0 discriminator 1
+	beq	.L1078
+	.loc 2 1971 0 discriminator 1
 	adrp	x1, .LANCHOR52
-	.loc 2 1921 0 discriminator 1
+	.loc 2 1970 0 discriminator 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1072
-	.loc 2 1923 0
+	beq	.L1078
+	.loc 2 1972 0
 	adrp	x1, .LANCHOR53
-	.loc 2 1922 0
+	.loc 2 1971 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1068
-.L1072:
-.LVL1496:
-.LBB275:
-	.loc 2 1927 0
+	bne	.L1074
+.L1078:
+.LVL1498:
+.LBB310:
+	.loc 2 1976 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1497:
-	.loc 2 1930 0
+.LVL1499:
+	.loc 2 1979 0
 	mov	w2, 0
 	mov	w1, 1
-	.loc 2 1927 0
+	.loc 2 1976 0
 	ldr	x4, [x0, 16]
-	.loc 2 1929 0
+	.loc 2 1978 0
 	str	w3, [x0, 4]
-	.loc 2 1927 0
+	.loc 2 1976 0
 	str	x4, [x29, 136]
-.LVL1498:
-	.loc 2 1930 0
+.LVL1500:
+	.loc 2 1979 0
 	bl	FlashReadPages
-.LVL1499:
-	.loc 2 1933 0
+.LVL1501:
+	.loc 2 1982 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1068
-	.loc 2 1934 0
+	beq	.L1074
+	.loc 2 1983 0
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-.LVL1500:
-	cbnz	w0, .L1068
-	.loc 2 1941 0
+.LVL1502:
+	cbnz	w0, .L1074
+	.loc 2 1990 0
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-.LVL1501:
-	b	.L1068
-.LVL1502:
-.L1074:
-.LBE275:
-	.loc 2 1962 0
-	mov	w1, w24
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
-	bl	printf
 .LVL1503:
-	b	.L1052
+	b	.L1074
 .LVL1504:
-.L1054:
-	.loc 2 1969 0
+.L1080:
+.LBE310:
+	.loc 2 2011 0
+	mov	w1, w24
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
+	bl	printf
+.LVL1505:
+	b	.L1058
+.LVL1506:
+.L1060:
+	.loc 2 2018 0
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1075
-	.loc 2 1970 0
-	adrp	x1, .LANCHOR164
-	add	x1, x1, :lo12:.LANCHOR164
+	bhi	.L1081
+	.loc 2 2019 0
+	adrp	x1, .LANCHOR163
+	add	x1, x1, :lo12:.LANCHOR163
 	str	w5, [x1, w0, uxtw 2]
-	.loc 2 1971 0
+	.loc 2 2020 0
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1075:
-	.loc 2 1973 0
+.L1081:
+	.loc 2 2022 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1505:
-	.loc 2 1975 0
-	ldr	w0, [x28, #:lo12:.LANCHOR154]
+.LVL1507:
+	.loc 2 2024 0
+	ldr	w0, [x28, #:lo12:.LANCHOR153]
 	cmn	w0, #1
-	bne	.L1076
-.L1138:
-	.loc 2 1978 0
-	str	w21, [x28, #:lo12:.LANCHOR154]
-	b	.L1052
-.L1076:
-	.loc 2 1977 0
+	bne	.L1082
+.L1144:
+	.loc 2 2027 0
+	str	w21, [x28, #:lo12:.LANCHOR153]
+	b	.L1058
+.L1082:
+	.loc 2 2026 0
 	cmp	w21, w0
-	bcs	.L1052
-	b	.L1138
-.LVL1506:
-.L1079:
-	.loc 2 1986 0 discriminator 2
-	add	w0, w0, 1
-.LVL1507:
-	and	w0, w0, 65535
+	bcs	.L1058
+	b	.L1144
 .LVL1508:
-	b	.L1078
+.L1085:
+	.loc 2 2035 0 discriminator 2
+	add	w0, w0, 1
 .LVL1509:
-.L1053:
-	.loc 2 2002 0
+	and	w0, w0, 65535
+.LVL1510:
+	b	.L1084
+.LVL1511:
+.L1059:
+	.loc 2 2051 0
 	strb	w27, [x19, 6]
-	.loc 2 2003 0
+	.loc 2 2052 0
 	strh	w22, [x19, 2]
-	b	.L1141
+	b	.L1147
 	.cfi_endproc
 .LFE281:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -14315,141 +14423,147 @@ FtlRecoverySuperblock:
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
 .LFB288:
-	.loc 2 2156 0
+	.loc 2 2205 0
 	.cfi_startproc
-.LVL1510:
-	stp	x29, x30, [sp, -96]!
-	.cfi_def_cfa_offset 96
-	.cfi_offset 29, -96
-	.cfi_offset 30, -88
+.LVL1512:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 2 2213 0
+	adrp	x1, .LANCHOR108
+	.loc 2 2205 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -80
-	.cfi_offset 20, -72
-	.loc 2 2178 0
-	adrp	x20, .LANCHOR72
-	.loc 2 2156 0
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
 	mov	x19, x0
-	.loc 2 2178 0
-	add	x20, x20, :lo12:.LANCHOR72
-	.loc 2 2156 0
-	stp	x21, x22, [sp, 32]
-	.cfi_offset 21, -64
-	.cfi_offset 22, -56
-	.loc 2 2162 0
-	mov	w21, 7
-	.loc 2 2156 0
-	str	x23, [sp, 48]
-	.cfi_offset 23, -48
-	.loc 2 2168 0
-	mov	w22, -1
-	.loc 2 2169 0
-	adrp	x23, .LANCHOR39
-.LVL1511:
-.L1143:
-	.loc 2 2162 0
-	subs	w21, w21, #1
-.LVL1512:
-	beq	.L1145
+	.loc 2 2211 0
+	mov	w0, -1
 .LVL1513:
-	.loc 2 2163 0
-	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1144
+	.loc 2 2213 0
+	ldr	x20, [x1, #:lo12:.LANCHOR108]
+	.loc 2 2211 0
+	str	w0, [x29, 72]
+	.loc 2 2212 0
+	adrp	x0, .LANCHOR107
+	.loc 2 2205 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 2216 0
+	mov	w1, -3
+	.loc 2 2212 0
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	.loc 2 2229 0
+	adrp	x21, .LANCHOR71
+	.loc 2 2213 0
+	str	x20, [x29, 64]
 .LVL1514:
-.L1145:
-	.loc 2 2183 0
+	.loc 2 2229 0
+	add	x21, x21, :lo12:.LANCHOR71
+	.loc 2 2212 0
+	str	x0, [x29, 56]
+	.loc 2 2223 0
+	mov	w22, 7
+	.loc 2 2216 0
+	str	w1, [x20, 8]
+	.loc 2 2217 0
+	mov	w1, -2
+	str	w1, [x20, 12]
+	.loc 2 2218 0
+	ldrh	w1, [x19]
+	strh	w1, [x20, 2]
+	.loc 2 2219 0
+	strh	wzr, [x20]
+	.loc 2 2220 0
+	mov	w1, 61589
+	str	w1, [x0]
+	.loc 2 2221 0
+	mov	w1, 22136
+	movk	w1, 0x1234, lsl 16
+	str	w1, [x0, 4]
+.LVL1515:
+.L1149:
+	.loc 2 2223 0
+	subs	w22, w22, #1
+.LVL1516:
+	beq	.L1151
+.LVL1517:
+	.loc 2 2224 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1150
+.LVL1518:
+.L1151:
+	.loc 2 2234 0
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR42
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	ldr	x2, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	.loc 2 2184 0
+	.loc 2 2235 0
 	adrp	x0, .LANCHOR19
-	.loc 2 2185 0
+	.loc 2 2236 0
 	strb	wzr, [x19, 6]
-	.loc 2 2186 0
+	.loc 2 2237 0
 	strh	wzr, [x19, 4]
-	.loc 2 2184 0
+	.loc 2 2235 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	strh	w0, [x19, 2]
-	.loc 2 2188 0
+	.loc 2 2238 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1515:
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 96
+.LVL1519:
+	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
 	.cfi_restore 29
-	.cfi_restore 23
 	.cfi_restore 21
 	.cfi_restore 22
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1516:
-.L1144:
+.LVL1520:
+.L1150:
 	.cfi_restore_state
-	.loc 2 2165 0
+	.loc 2 2226 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1517:
-	str	w0, [x29, 68]
-	.loc 2 2166 0
+.LVL1521:
+	str	w0, [x29, 52]
+	.loc 2 2227 0
 	cmn	w0, #1
-	beq	.L1145
-	.loc 2 2169 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 2179 0
+	beq	.L1151
+	.loc 2 2229 0
+	ldr	w0, [x21]
+	.loc 2 2230 0
 	mov	w3, 0
-	.loc 2 2169 0
-	str	x0, [x29, 72]
-	.loc 2 2179 0
+	.loc 2 2229 0
+	str	w0, [x20, 4]
+	.loc 2 2230 0
 	mov	w2, 0
-	.loc 2 2170 0
-	adrp	x0, .LANCHOR109
-	.loc 2 2168 0
-	str	w22, [x29, 88]
-	.loc 2 2170 0
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	str	x1, [x29, 80]
-.LVL1518:
-	.loc 2 2175 0
-	ldrh	w0, [x19]
-	strh	w0, [x1, 2]
-	.loc 2 2178 0
-	ldr	w0, [x20]
-	.loc 2 2173 0
-	stp	w0, w22, [x1, 4]
-	.loc 2 2178 0
+	.loc 2 2229 0
 	add	w0, w0, 1
-	.loc 2 2176 0
-	strh	wzr, [x1]
-	.loc 2 2178 0
+	.loc 2 2230 0
+	mov	w1, 1
+	.loc 2 2229 0
 	cmn	w0, #1
-	.loc 2 2174 0
-	str	w22, [x1, 12]
-	.loc 2 2178 0
 	csel	w0, w0, wzr, ne
-	.loc 2 2179 0
-	mov	w1, 1
-.LVL1519:
-	.loc 2 2178 0
-	str	w0, [x20]
-	.loc 2 2179 0
-	add	x0, x29, 64
+	str	w0, [x21]
+	.loc 2 2230 0
+	add	x0, x29, 48
 	bl	FlashProgPages
-.LVL1520:
-	.loc 2 2180 0
+.LVL1522:
+	.loc 2 2231 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1521:
-	b	.L1143
+.LVL1523:
+	b	.L1149
 	.cfi_endproc
 .LFE288:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -14471,7 +14585,7 @@ FtlLoadBbt:
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
 	.loc 4 180 0
-	adrp	x23, .LANCHOR39
+	adrp	x23, .LANCHOR107
 	.loc 4 173 0
 	stp	x19, x20, [sp, 16]
 	.loc 4 184 0
@@ -14483,9 +14597,9 @@ FtlLoadBbt:
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
 	.loc 4 180 0
-	adrp	x22, .LANCHOR108
-	add	x20, x22, :lo12:.LANCHOR108
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	adrp	x22, .LANCHOR106
+	add	x20, x22, :lo12:.LANCHOR106
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	.loc 4 173 0
 	str	x25, [sp, 64]
 	.cfi_offset 25, -16
@@ -14494,25 +14608,25 @@ FtlLoadBbt:
 	.loc 4 180 0
 	str	x0, [x20, 8]
 	.loc 4 181 0
-	adrp	x0, .LANCHOR109
-	ldr	x21, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR108
+	ldr	x21, [x0, #:lo12:.LANCHOR108]
 	str	x21, [x20, 16]
-.LVL1522:
+.LVL1524:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1523:
+.LVL1525:
 	.loc 4 184 0
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1524:
-.L1155:
+.LVL1526:
+.L1161:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L1158
+	bgt	.L1164
 	.loc 4 185 0 is_stmt 1
 	lsl	w0, w19, 10
 	.loc 4 186 0
@@ -14523,11 +14637,11 @@ FtlLoadBbt:
 	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1525:
+.LVL1527:
 	.loc 4 187 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1156
+	bne	.L1162
 	.loc 4 188 0
 	ldr	w0, [x20, 4]
 	.loc 4 189 0
@@ -14539,16 +14653,16 @@ FtlLoadBbt:
 	.loc 4 189 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1526:
-.L1156:
+.LVL1528:
+.L1162:
 	.loc 4 191 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1157
+	beq	.L1163
 	.loc 4 196 0
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1157
+	bne	.L1163
 	.loc 4 198 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
@@ -14559,21 +14673,21 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1158:
+.L1164:
 	.loc 4 216 0
 	adrp	x19, .LANCHOR37
-.LVL1527:
+.LVL1529:
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L1172
+	beq	.L1178
 	.loc 4 222 0
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1162
+	beq	.L1168
 	.loc 4 224 0
-	add	x0, x22, :lo12:.LANCHOR108
+	add	x0, x22, :lo12:.LANCHOR106
 	lsl	w1, w1, 10
 	.loc 4 225 0
 	mov	w2, 1
@@ -14582,21 +14696,21 @@ FtlLoadBbt:
 	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1528:
+.LVL1530:
 	.loc 4 226 0
-	ldr	w0, [x22, #:lo12:.LANCHOR108]
+	ldr	w0, [x22, #:lo12:.LANCHOR106]
 	cmn	w0, #1
-	beq	.L1162
+	beq	.L1168
 	.loc 4 229 0
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1162
+	bne	.L1168
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1162
+	bls	.L1168
 	.loc 4 231 0 is_stmt 1
 	ldrh	w1, [x20, 4]
 	.loc 4 232 0
@@ -14607,7 +14721,7 @@ FtlLoadBbt:
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	.loc 4 233 0
 	strh	w0, [x20, 4]
-.L1162:
+.L1168:
 	.loc 4 238 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
@@ -14616,26 +14730,26 @@ FtlLoadBbt:
 	mov	w25, 61649
 	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1529:
+.LVL1531:
 	sxth	w20, w0
-.LVL1530:
+.LVL1532:
 	.loc 4 239 0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	.loc 4 243 0
-	add	x24, x22, :lo12:.LANCHOR108
-.L1164:
+	add	x24, x22, :lo12:.LANCHOR106
+.L1170:
 	.loc 4 241 0
-	tbz	w20, #31, .L1167
+	tbz	w20, #31, .L1173
 	.loc 4 254 0
-	adrp	x1, .LANCHOR165
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC1
 	mov	w2, 254
-	add	x1, x1, :lo12:.LANCHOR165
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1531:
-.L1166:
+.LVL1533:
+.L1172:
 	.loc 4 255 0
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
@@ -14644,29 +14758,29 @@ FtlLoadBbt:
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1169
+	beq	.L1175
 	.loc 4 259 0
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L1169
+	beq	.L1175
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1169
+	bcs	.L1175
 	.loc 4 261 0 is_stmt 1
 	cmp	w0, w1
-	bcs	.L1169
+	bcs	.L1175
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1532:
-.L1169:
+.LVL1534:
+.L1175:
 	add	x19, x19, :lo12:.LANCHOR37
 	.loc 4 268 0 discriminator 1
 	adrp	x21, .LANCHOR10
-.LVL1533:
+.LVL1535:
 	.loc 4 269 0 discriminator 1
 	adrp	x23, .LANCHOR137
 	add	x19, x19, 32
@@ -14674,19 +14788,19 @@ FtlLoadBbt:
 	add	x21, x21, :lo12:.LANCHOR10
 	.loc 4 269 0 discriminator 1
 	add	x23, x23, :lo12:.LANCHOR137
-	add	x22, x22, :lo12:.LANCHOR108
+	add	x22, x22, :lo12:.LANCHOR106
 	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1534:
-.L1170:
+.LVL1536:
+.L1176:
 	.loc 4 268 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1171
+	bcc	.L1177
 	.loc 4 275 0
 	mov	w0, 0
-.LVL1535:
-.L1154:
+.LVL1537:
+.L1160:
 	.loc 4 276 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14705,17 +14819,17 @@ FtlLoadBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1536:
-.L1157:
+.LVL1538:
+.L1163:
 	.cfi_restore_state
 	.loc 4 184 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1537:
-	and	w19, w19, 65535
-.LVL1538:
-	b	.L1155
 .LVL1539:
-.L1167:
+	and	w19, w19, 65535
+.LVL1540:
+	b	.L1161
+.LVL1541:
+.L1173:
 	.loc 4 243 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	.loc 4 245 0
@@ -14725,28 +14839,28 @@ FtlLoadBbt:
 	orr	w0, w20, w0, lsl 10
 	str	w0, [x24, 4]
 	.loc 4 244 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x24, 8]
 	.loc 4 245 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL1540:
+.LVL1542:
 	.loc 4 247 0
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1165
+	beq	.L1171
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1166
-.L1165:
+	beq	.L1172
+.L1171:
 	sub	w20, w20, #1
-.LVL1541:
-	sxth	w20, w20
-.LVL1542:
-	b	.L1164
 .LVL1543:
-.L1171:
+	sxth	w20, w20
+.LVL1544:
+	b	.L1170
+.LVL1545:
+.L1177:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
@@ -14754,18 +14868,18 @@ FtlLoadBbt:
 	lsl	w2, w2, 2
 	.loc 4 268 0 discriminator 3
 	add	w20, w20, 1
-.LVL1544:
+.LVL1546:
 	.loc 4 269 0 discriminator 3
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-.LVL1545:
-	b	.L1170
-.LVL1546:
-.L1172:
+.LVL1547:
+	b	.L1176
+.LVL1548:
+.L1178:
 	.loc 4 218 0
 	mov	w0, -1
-	b	.L1154
+	b	.L1160
 	.cfi_endproc
 .LFE229:
 	.size	FtlLoadBbt, .-FtlLoadBbt
@@ -14806,105 +14920,105 @@ FtlMakeBbt:
 	.cfi_offset 28, -40
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1547:
+.LVL1549:
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1548:
+.LVL1550:
 	.loc 4 328 0
-	adrp	x28, .LANCHOR108
+	adrp	x28, .LANCHOR106
 	add	x21, x21, 12
 	.loc 4 356 0
-	add	x25, x28, :lo12:.LANCHOR108
+	add	x25, x28, :lo12:.LANCHOR106
 	.loc 4 327 0
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.LVL1549:
-.L1185:
+.LVL1551:
+.L1191:
 	.loc 4 327 0 is_stmt 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1191
+	bcc	.L1197
 	.loc 4 381 0 is_stmt 1 discriminator 1
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1192:
-.LVL1550:
+.L1198:
+.LVL1552:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1193
+	bhi	.L1199
 	.loc 4 387 0
 	add	x21, x20, :lo12:.LANCHOR37
 	.loc 4 396 0
 	mov	w22, 65535
-.LVL1551:
+.LVL1553:
 	.loc 4 387 0
 	ldrh	w19, [x21, 12]
-.LVL1552:
+.LVL1554:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1553:
-.L1194:
+.LVL1555:
+.L1200:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1198
+	bgt	.L1204
 	.loc 4 389 0 is_stmt 1
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1554:
+.LVL1556:
 	cmp	w0, 1
-	beq	.L1195
+	beq	.L1201
 	.loc 4 391 0
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1555:
-	cbz	w0, .L1196
+.LVL1557:
+	cbz	w0, .L1202
 	.loc 4 393 0
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1556:
-.L1195:
+.LVL1558:
+.L1201:
 	.loc 4 387 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1557:
-	and	w19, w19, 65535
-.LVL1558:
-	b	.L1194
 .LVL1559:
-.L1191:
+	and	w19, w19, 65535
+.LVL1560:
+	b	.L1200
+.LVL1561:
+.L1197:
 	.loc 4 329 0
-	adrp	x2, .LANCHOR109
+	adrp	x2, .LANCHOR108
 	.loc 4 328 0
-	adrp	x0, .LANCHOR39
-	add	x19, x28, :lo12:.LANCHOR108
+	adrp	x0, .LANCHOR107
+	add	x19, x28, :lo12:.LANCHOR106
 	.loc 4 331 0
 	ldrh	w1, [x21]
 	.loc 4 328 0
-	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	.loc 4 331 0
 	mov	w3, 65535
 	.loc 4 329 0
-	ldr	x26, [x2, #:lo12:.LANCHOR109]
+	ldr	x26, [x2, #:lo12:.LANCHOR108]
 	.loc 4 331 0
 	cmp	w1, w3
 	.loc 4 329 0
 	stp	x0, x26, [x19, 8]
-.LVL1560:
+.LVL1562:
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
 	.loc 4 331 0
-	beq	.L1186
+	beq	.L1192
 	.loc 4 333 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	.loc 4 335 0
 	mov	w2, 1
 	.loc 4 333 0
 	madd	w27, w4, w22, w1
-.LVL1561:
+.LVL1563:
 	.loc 4 335 0
 	mov	w1, w2
 	.loc 4 334 0
@@ -14913,7 +15027,7 @@ FtlMakeBbt:
 	.loc 4 335 0
 	mov	x0, x19
 	bl	FlashReadPages
-.LVL1562:
+.LVL1564:
 	.loc 4 336 0
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
@@ -14921,30 +15035,30 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1563:
-.L1187:
+.LVL1565:
+.L1193:
 	.loc 4 376 0 discriminator 2
 	mov	w0, w27
 	.loc 4 327 0 discriminator 2
 	add	w22, w22, 1
-.LVL1564:
+.LVL1566:
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1565:
+.LVL1567:
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1185
-.LVL1566:
-.L1186:
+	b	.L1191
+.LVL1568:
+.L1192:
 	.loc 4 340 0
 	mov	w1, w22
 	bl	FlashGetBadBlockList
-.LVL1567:
+.LVL1569:
 	.loc 4 341 0
 	ldr	x0, [x19, 8]
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-.LVL1568:
+.LVL1570:
 	.loc 4 343 0
 	ldrh	w19, [x23, #:lo12:.LANCHOR17]
 	.loc 4 345 0
@@ -14957,17 +15071,17 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	.loc 4 343 0
 	and	w19, w19, 65535
-.LVL1569:
+.LVL1571:
 	.loc 4 357 0
 	str	x0, [x29, 104]
-.L1188:
+.L1194:
 	.loc 4 345 0
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1570:
+.LVL1572:
 	cmp	w0, 1
-	beq	.L1189
+	beq	.L1195
 	.loc 4 350 0
 	ldr	x0, [x29, 112]
 	mov	w2, 16
@@ -14975,16 +15089,16 @@ FtlMakeBbt:
 	strh	w19, [x21]
 	.loc 4 350 0
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
 	bl	ftl_memset
-.LVL1571:
+.LVL1573:
 	.loc 4 351 0
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR107
 	mov	w2, 4096
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	bl	ftl_memset
-.LVL1572:
+.LVL1574:
 	.loc 4 352 0
 	mov	w0, -3872
 	strh	w0, [x26]
@@ -14999,7 +15113,7 @@ FtlMakeBbt:
 	str	wzr, [x26, 4]
 	.loc 4 355 0
 	madd	w27, w4, w22, w0
-.LVL1573:
+.LVL1575:
 	.loc 4 356 0
 	lsl	w0, w27, 10
 	str	w0, [x25, 4]
@@ -15009,76 +15123,76 @@ FtlMakeBbt:
 	ldr	x0, [x25, 8]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-.LVL1574:
+.LVL1576:
 	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x25
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1575:
+.LVL1577:
 	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x25
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1576:
+.LVL1578:
 	.loc 4 360 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1187
+	bne	.L1193
 	.loc 4 362 0
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-.LVL1577:
+.LVL1579:
 	.loc 4 363 0
-	b	.L1188
-.LVL1578:
-.L1189:
+	b	.L1194
+.LVL1580:
+.L1195:
 	.loc 4 347 0
 	sub	w19, w19, #1
-.LVL1579:
-	and	w19, w19, 65535
-.LVL1580:
-	b	.L1188
 .LVL1581:
-.L1193:
+	and	w19, w19, 65535
+.LVL1582:
+	b	.L1194
+.LVL1583:
+.L1199:
 	.loc 4 383 0 discriminator 3
 	mov	w0, w19
 	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
-.LVL1582:
+.LVL1584:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1583:
+.LVL1585:
 	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1584:
-	b	.L1192
-.LVL1585:
-.L1196:
+.LVL1586:
+	b	.L1198
+.LVL1587:
+.L1202:
 	.loc 4 396 0
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1197
+	bne	.L1203
 	.loc 4 398 0
 	strh	w19, [x21]
-	b	.L1195
-.L1197:
+	b	.L1201
+.L1203:
 	.loc 4 402 0
 	strh	w19, [x21, 4]
-.L1198:
+.L1204:
 	.loc 4 414 0
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR111
 	.loc 4 411 0
 	add	x19, x20, :lo12:.LANCHOR37
-.LVL1586:
+.LVL1588:
 	.loc 4 414 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 416 0
 	mov	w2, 2
 	.loc 4 414 0
-	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
 	.loc 4 413 0
 	str	wzr, [x19, 8]
 	.loc 4 414 0
@@ -15094,18 +15208,18 @@ FtlMakeBbt:
 	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1587:
+.LVL1589:
 	.loc 4 418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
 	bl	FtlBbmMapBadBlock
-.LVL1588:
+.LVL1590:
 	.loc 4 419 0
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
-.LVL1589:
+.LVL1591:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1590:
+.LVL1592:
 	.loc 4 426 0
 	strh	wzr, [x19, 2]
 	.loc 4 422 0
@@ -15117,14 +15231,14 @@ FtlMakeBbt:
 	str	w0, [x19, 8]
 	.loc 4 424 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-.LVL1591:
+.LVL1593:
 	.loc 4 427 0
 	strh	w0, [x19, 4]
 	.loc 4 425 0
 	strh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1592:
+.LVL1594:
 	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -15156,9 +15270,9 @@ FtlMakeBbt:
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
 .LFB263:
-	.loc 2 786 0
+	.loc 2 835 0
 	.cfi_startproc
-.LVL1593:
+.LVL1595:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15170,22 +15284,22 @@ FtlVendorPartWrite:
 	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x27, x28, [sp, 80]
-	.loc 2 794 0
+	.loc 2 843 0
 	add	w1, w0, w1
-.LVL1594:
+.LVL1596:
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
-	.loc 2 786 0
+	.loc 2 835 0
 	mov	w28, w0
-.LVL1595:
-	.loc 2 794 0
+.LVL1597:
+	.loc 2 843 0
 	adrp	x0, .LANCHOR16
-.LVL1596:
-	.loc 2 786 0
+.LVL1598:
+	.loc 2 835 0
 	stp	x21, x22, [sp, 32]
-	.loc 2 794 0
+	.loc 2 843 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 786 0
+	.loc 2 835 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 21, -176
@@ -15194,40 +15308,40 @@ FtlVendorPartWrite:
 	.cfi_offset 24, -152
 	.cfi_offset 25, -144
 	.cfi_offset 26, -136
-	.loc 2 794 0
+	.loc 2 843 0
 	cmp	w1, w0
-	bhi	.L1212
-	.loc 2 791 0
+	bhi	.L1218
+	.loc 2 840 0
 	adrp	x0, .LANCHOR22
-	.loc 2 799 0
+	.loc 2 848 0
 	adrp	x25, .LANCHOR12
-	.loc 2 809 0
+	.loc 2 858 0
 	adrp	x26, .LANCHOR23
 	mov	x24, x2
-	.loc 2 791 0
+	.loc 2 840 0
 	ldrh	w21, [x0, #:lo12:.LANCHOR22]
-	.loc 2 799 0
+	.loc 2 848 0
 	add	x25, x25, :lo12:.LANCHOR12
-	.loc 2 809 0
+	.loc 2 858 0
 	add	x26, x26, :lo12:.LANCHOR23
-	.loc 2 791 0
+	.loc 2 840 0
 	mov	w23, 0
 	lsr	w21, w28, w21
-.LVL1597:
-.L1206:
-	.loc 2 797 0
-	cbnz	w20, .L1211
-.LVL1598:
-.L1204:
-	.loc 2 820 0
+.LVL1599:
+.L1212:
+	.loc 2 846 0
+	cbnz	w20, .L1217
+.LVL1600:
+.L1210:
+	.loc 2 869 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
-.LVL1599:
+.LVL1601:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1600:
+.LVL1602:
 	ldp	x29, x30, [sp], 208
 	.cfi_remember_state
 	.cfi_restore 30
@@ -15244,111 +15358,111 @@ FtlVendorPartWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1601:
-.L1211:
+.LVL1603:
+.L1217:
 	.cfi_restore_state
-	.loc 2 799 0
+	.loc 2 848 0
 	ldrh	w1, [x25]
-	.loc 2 798 0
+	.loc 2 847 0
 	adrp	x0, .LANCHOR133
 	adrp	x27, .LANCHOR124
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	.loc 2 799 0
+	.loc 2 848 0
 	udiv	w22, w28, w1
-	.loc 2 798 0
+	.loc 2 847 0
 	ldr	w2, [x0, w21, uxtw 2]
-.LVL1602:
-	.loc 2 802 0
+.LVL1604:
+	.loc 2 851 0
 	and	w0, w20, 65535
-	.loc 2 799 0
+	.loc 2 848 0
 	msub	w22, w22, w1, w28
-.LVL1603:
-	.loc 2 800 0
+.LVL1605:
+	.loc 2 849 0
 	sub	w19, w1, w22
 	and	w19, w19, 65535
-.LVL1604:
-	.loc 2 802 0
+.LVL1606:
+	.loc 2 851 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1605:
-	.loc 2 803 0
-	cbz	w2, .L1208
-	.loc 2 803 0 is_stmt 0 discriminator 1
+.LVL1607:
+	.loc 2 852 0
+	cbz	w2, .L1214
+	.loc 2 852 0 is_stmt 0 discriminator 1
 	cmp	w19, w1
-	beq	.L1208
-	.loc 2 805 0 is_stmt 1
+	beq	.L1214
+	.loc 2 854 0 is_stmt 1
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 806 0
+	.loc 2 855 0
 	add	x0, x29, 144
-	.loc 2 804 0
+	.loc 2 853 0
 	str	w2, [x29, 116]
-	.loc 2 807 0
+	.loc 2 856 0
 	mov	w2, 1
-.LVL1606:
-	.loc 2 806 0
+.LVL1608:
+	.loc 2 855 0
 	str	x0, [x29, 128]
-	.loc 2 807 0
+	.loc 2 856 0
 	mov	w1, w2
 	add	x0, x29, 112
-.LVL1607:
+.LVL1609:
 	bl	FlashReadPages
-.LVL1608:
-.L1209:
-	.loc 2 811 0
+.LVL1610:
+.L1215:
+	.loc 2 860 0
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	lsl	w22, w22, 7
-.LVL1609:
+.LVL1611:
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-.LVL1610:
-	.loc 2 812 0
+.LVL1612:
+	.loc 2 861 0
 	ldr	x2, [x27, #:lo12:.LANCHOR124]
 	mov	w1, w21
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
-	.loc 2 815 0
+	.loc 2 864 0
 	sub	w20, w20, w19
-.LVL1611:
-	.loc 2 816 0
+.LVL1613:
+	.loc 2 865 0
 	add	w28, w28, w19
-.LVL1612:
-	.loc 2 814 0
+.LVL1614:
+	.loc 2 863 0
 	add	w21, w21, 1
-.LVL1613:
-	.loc 2 812 0
+.LVL1615:
+	.loc 2 861 0
 	bl	FtlMapWritePage
-.LVL1614:
-	.loc 2 813 0
+.LVL1616:
+	.loc 2 862 0
 	cmn	w0, #1
-	.loc 2 817 0
+	.loc 2 866 0
 	ldr	w4, [x29, 108]
-	.loc 2 813 0
+	.loc 2 862 0
 	csinv	w23, w23, wzr, ne
-.LVL1615:
-	.loc 2 817 0
-	add	x24, x24, x4, sxtw
-.LVL1616:
-	b	.L1206
 .LVL1617:
-.L1208:
-	.loc 2 809 0
-	ldrh	w2, [x26]
+	.loc 2 866 0
+	add	x24, x24, x4, sxtw
 .LVL1618:
+	b	.L1212
+.LVL1619:
+.L1214:
+	.loc 2 858 0
+	ldrh	w2, [x26]
+.LVL1620:
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	bl	ftl_memset
-.LVL1619:
-	b	.L1209
-.LVL1620:
-.L1212:
-	.loc 2 795 0
+.LVL1621:
+	b	.L1215
+.LVL1622:
+.L1218:
+	.loc 2 844 0
 	mov	w23, -1
-	b	.L1204
+	b	.L1210
 	.cfi_endproc
 .LFE263:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -15358,81 +15472,81 @@ FtlVendorPartWrite:
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
 .LFB286:
-	.loc 2 2110 0
+	.loc 2 2159 0
 	.cfi_startproc
-	.loc 2 2111 0
-	adrp	x0, .LANCHOR83
-	add	x2, x0, :lo12:.LANCHOR83
-	ldr	w1, [x0, #:lo12:.LANCHOR83]
+	.loc 2 2160 0
+	adrp	x0, .LANCHOR81
+	add	x2, x0, :lo12:.LANCHOR81
+	ldr	w1, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1217
-.LBB278:
-.LBB279:
-	.loc 2 2112 0
-	mov	w0, 64
-	.loc 2 2125 0
+	bne	.L1223
+.LBB313:
+.LBB314:
+	.loc 2 2161 0
+	mov	w0, 68
+	.loc 2 2174 0
 	mov	w1, 1
-	.loc 2 2112 0
+	.loc 2 2161 0
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
-	.loc 2 2113 0
+	.loc 2 2162 0
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	str	w0, [x2, 88]
+	.loc 2 2163 0
 	adrp	x0, .LANCHOR69
 	ldr	w0, [x0, #:lo12:.LANCHOR69]
-	str	w0, [x2, 88]
-	.loc 2 2114 0
-	adrp	x0, .LANCHOR70
-	ldr	w0, [x0, #:lo12:.LANCHOR70]
 	str	w0, [x2, 92]
-	.loc 2 2115 0
-	adrp	x0, .LANCHOR68
-	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	.loc 2 2164 0
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
 	str	w0, [x2, 8]
-	.loc 2 2116 0
-	adrp	x0, .LANCHOR65
-	ldr	w0, [x0, #:lo12:.LANCHOR65]
+	.loc 2 2165 0
+	adrp	x0, .LANCHOR64
+	ldr	w0, [x0, #:lo12:.LANCHOR64]
 	str	w0, [x2, 12]
-	.loc 2 2117 0
-	adrp	x0, .LANCHOR63
-	ldr	w0, [x0, #:lo12:.LANCHOR63]
+	.loc 2 2166 0
+	adrp	x0, .LANCHOR62
+	ldr	w0, [x0, #:lo12:.LANCHOR62]
 	str	w0, [x2, 16]
-	.loc 2 2118 0
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	.loc 2 2167 0
+	adrp	x0, .LANCHOR66
+	ldr	w0, [x0, #:lo12:.LANCHOR66]
 	str	w0, [x2, 20]
-	.loc 2 2119 0
-	adrp	x0, .LANCHOR74
-	ldr	w0, [x0, #:lo12:.LANCHOR74]
+	.loc 2 2168 0
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	str	w0, [x2, 28]
-	.loc 2 2120 0
-	adrp	x0, .LANCHOR76
-	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	.loc 2 2169 0
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
 	str	w0, [x2, 32]
-	.loc 2 2121 0
-	adrp	x0, .LANCHOR64
-	ldr	w0, [x0, #:lo12:.LANCHOR64]
+	.loc 2 2170 0
+	adrp	x0, .LANCHOR63
+	ldr	w0, [x0, #:lo12:.LANCHOR63]
 	str	w0, [x2, 36]
-	.loc 2 2122 0
-	adrp	x0, .LANCHOR66
-	ldr	w0, [x0, #:lo12:.LANCHOR66]
+	.loc 2 2171 0
+	adrp	x0, .LANCHOR65
+	ldr	w0, [x0, #:lo12:.LANCHOR65]
 	str	w0, [x2, 40]
-	.loc 2 2123 0
+	.loc 2 2172 0
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	str	w0, [x2, 44]
+	.loc 2 2173 0
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
-	str	w0, [x2, 44]
-	.loc 2 2124 0
-	adrp	x0, .LANCHOR78
-	ldr	w0, [x0, #:lo12:.LANCHOR78]
 	str	w0, [x2, 48]
-	.loc 2 2125 0
+	.loc 2 2174 0
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.LVL1621:
-.L1217:
+.LVL1623:
+.L1223:
 	ret
-.LBE279:
-.LBE278:
+.LBE314:
+.LBE313:
 	.cfi_endproc
 .LFE286:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -15442,84 +15556,84 @@ Ftl_save_ext_data:
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
 .LFB265:
-	.loc 2 861 0
+	.loc 2 910 0
 	.cfi_startproc
-.LVL1622:
-	.loc 2 864 0
-	adrp	x2, .LANCHOR166
-	ldrh	w1, [x2, #:lo12:.LANCHOR166]
+.LVL1624:
+	.loc 2 913 0
+	adrp	x2, .LANCHOR165
+	ldrh	w1, [x2, #:lo12:.LANCHOR165]
 	cmp	w1, 31
-	bhi	.L1223
-	.loc 2 865 0
+	bhi	.L1229
+	.loc 2 914 0
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR166]
-.LVL1623:
-	.loc 2 866 0
+	strh	w1, [x2, #:lo12:.LANCHOR165]
+.LVL1625:
+	.loc 2 915 0
 	mov	w1, 1
-.LVL1624:
-.L1220:
+.LVL1626:
+.L1226:
 	adrp	x2, .LANCHOR127
-	.loc 2 868 0
-	cbnz	w0, .L1221
-	.loc 2 868 0 is_stmt 0 discriminator 1
+	.loc 2 917 0
+	cbnz	w0, .L1227
+	.loc 2 917 0 is_stmt 0 discriminator 1
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
-.LVL1625:
+.LVL1627:
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
-.LVL1626:
+.LVL1628:
 	cmp	w0, w1
-	bcc	.L1225
-.L1221:
-	.loc 2 861 0 is_stmt 1
+	bcc	.L1231
+.L1227:
+	.loc 2 910 0 is_stmt 1
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 870 0
+	.loc 2 919 0
 	ldr	x2, [x2, #:lo12:.LANCHOR127]
 	ldr	w0, [x2, 16]
 	str	w0, [x2, 20]
-	.loc 2 871 0
+	.loc 2 920 0
 	mov	w0, 17221
-	.loc 2 874 0
+	.loc 2 923 0
 	str	wzr, [x2, 4]
-	.loc 2 871 0
+	.loc 2 920 0
 	movk	w0, 0x4254, lsl 16
 	str	w0, [x2]
-	.loc 2 872 0
+	.loc 2 921 0
 	adrp	x0, .LANCHOR125
 	ldrh	w1, [x0, #:lo12:.LANCHOR125]
 	lsl	w0, w1, 9
 	str	w0, [x2, 12]
-	.loc 2 873 0
+	.loc 2 922 0
 	ldr	w0, [x2, 8]
 	add	w0, w0, 1
 	str	w0, [x2, 8]
-	.loc 2 875 0
+	.loc 2 924 0
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1627:
-	.loc 2 876 0
+.LVL1629:
+	.loc 2 925 0
 	bl	Ftl_save_ext_data
-.LVL1628:
-	.loc 2 878 0
+.LVL1630:
+	.loc 2 927 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1629:
-.L1223:
-	.loc 2 862 0
+.LVL1631:
+.L1229:
+	.loc 2 911 0
 	mov	w1, 32
-	b	.L1220
-.LVL1630:
-.L1225:
-	.loc 2 878 0
+	b	.L1226
+.LVL1632:
+.L1231:
+	.loc 2 927 0
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -15531,9 +15645,9 @@ FtlEctTblFlush:
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
 .LFB264:
-	.loc 2 823 0
+	.loc 2 872 0
 	.cfi_startproc
-.LVL1631:
+.LVL1633:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15545,22 +15659,22 @@ FtlVendorPartRead:
 	.cfi_offset 20, -184
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	.loc 2 832 0
+	.loc 2 881 0
 	add	w1, w0, w1
-.LVL1632:
+.LVL1634:
 	.cfi_offset 21, -176
 	.cfi_offset 22, -168
-	.loc 2 823 0
+	.loc 2 872 0
 	mov	w21, w0
-.LVL1633:
-	.loc 2 832 0
+.LVL1635:
+	.loc 2 881 0
 	adrp	x0, .LANCHOR16
-.LVL1634:
-	.loc 2 823 0
+.LVL1636:
+	.loc 2 872 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 832 0
+	.loc 2 881 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR16]
-	.loc 2 823 0
+	.loc 2 872 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -160
@@ -15569,34 +15683,34 @@ FtlVendorPartRead:
 	.cfi_offset 26, -136
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
-	.loc 2 832 0
+	.loc 2 881 0
 	cmp	w1, w0
-	bhi	.L1235
-	.loc 2 828 0
+	bhi	.L1241
+	.loc 2 877 0
 	adrp	x0, .LANCHOR22
-	.loc 2 836 0
+	.loc 2 885 0
 	adrp	x24, .LANCHOR12
 	mov	x23, x2
 	add	x24, x24, :lo12:.LANCHOR12
-	.loc 2 828 0
+	.loc 2 877 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR22]
 	mov	w22, 0
-	.loc 2 835 0
+	.loc 2 884 0
 	adrp	x25, .LANCHOR133
-	.loc 2 828 0
+	.loc 2 877 0
 	lsr	w26, w21, w3
-.LVL1635:
-.L1229:
-	.loc 2 834 0
-	cbnz	w20, .L1234
-.LVL1636:
-.L1227:
-	.loc 2 857 0
+.LVL1637:
+.L1235:
+	.loc 2 883 0
+	cbnz	w20, .L1240
+.LVL1638:
+.L1233:
+	.loc 2 906 0
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1637:
+.LVL1639:
 	ldp	x21, x22, [sp, 32]
-.LVL1638:
+.LVL1640:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
@@ -15616,105 +15730,105 @@ FtlVendorPartRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1639:
-.L1234:
+.LVL1641:
+.L1240:
 	.cfi_restore_state
-	.loc 2 836 0
+	.loc 2 885 0
 	ldrh	w19, [x24]
-	.loc 2 835 0
+	.loc 2 884 0
 	ldr	x0, [x25, #:lo12:.LANCHOR133]
-	.loc 2 836 0
+	.loc 2 885 0
 	udiv	w27, w21, w19
-	.loc 2 835 0
+	.loc 2 884 0
 	ldr	w1, [x0, w26, uxtw 2]
-.LVL1640:
-	.loc 2 839 0
+.LVL1642:
+	.loc 2 888 0
 	and	w0, w20, 65535
-	.loc 2 836 0
+	.loc 2 885 0
 	msub	w27, w27, w19, w21
-.LVL1641:
-	.loc 2 837 0
+.LVL1643:
+	.loc 2 886 0
 	sub	w19, w19, w27
 	and	w19, w19, 65535
-.LVL1642:
-	.loc 2 839 0
+.LVL1644:
+	.loc 2 888 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1643:
+.LVL1645:
 	lsl	w28, w19, 9
-	.loc 2 840 0
-	cbz	w1, .L1231
-	.loc 2 842 0
+	.loc 2 889 0
+	cbz	w1, .L1237
+	.loc 2 891 0
 	adrp	x4, .LANCHOR124
-	.loc 2 844 0
+	.loc 2 893 0
 	mov	w2, 1
-	.loc 2 842 0
+	.loc 2 891 0
 	str	x4, [x29, 104]
-	.loc 2 847 0
+	.loc 2 896 0
 	lsl	w27, w27, 7
-.LVL1644:
-	.loc 2 842 0
+.LVL1646:
+	.loc 2 891 0
 	ldr	x0, [x4, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
-	.loc 2 843 0
+	.loc 2 892 0
 	add	x0, x29, 144
-	.loc 2 841 0
+	.loc 2 890 0
 	str	w1, [x29, 116]
-	.loc 2 844 0
+	.loc 2 893 0
 	mov	w1, w2
-.LVL1645:
-	.loc 2 843 0
+.LVL1647:
+	.loc 2 892 0
 	str	x0, [x29, 128]
-	.loc 2 844 0
+	.loc 2 893 0
 	add	x0, x29, 112
-.LVL1646:
+.LVL1648:
 	bl	FlashReadPages
-.LVL1647:
-	.loc 2 847 0
+.LVL1649:
+	.loc 2 896 0
 	ldr	x4, [x29, 104]
 	mov	w2, w28
-	.loc 2 846 0
+	.loc 2 895 0
 	ldr	w0, [x29, 112]
 	cmn	w0, #1
-	.loc 2 847 0
+	.loc 2 896 0
 	mov	x0, x23
 	ldr	x1, [x4, #:lo12:.LANCHOR124]
-	.loc 2 846 0
+	.loc 2 895 0
 	csinv	w22, w22, wzr, ne
-.LVL1648:
-	.loc 2 847 0
+.LVL1650:
+	.loc 2 896 0
 	add	x1, x1, x27, sxtw 2
 	bl	ftl_memcpy
-.LVL1649:
-.L1233:
-	.loc 2 851 0
-	add	w26, w26, 1
-.LVL1650:
-	.loc 2 852 0
-	sub	w20, w20, w19
 .LVL1651:
-	.loc 2 853 0
-	add	w21, w21, w19
+.L1239:
+	.loc 2 900 0
+	add	w26, w26, 1
 .LVL1652:
-	.loc 2 854 0
-	add	x23, x23, x28, sxtw
+	.loc 2 901 0
+	sub	w20, w20, w19
 .LVL1653:
-	b	.L1229
+	.loc 2 902 0
+	add	w21, w21, w19
 .LVL1654:
-.L1231:
-	.loc 2 849 0
+	.loc 2 903 0
+	add	x23, x23, x28, sxtw
+.LVL1655:
+	b	.L1235
+.LVL1656:
+.L1237:
+	.loc 2 898 0
 	mov	w2, w28
 	mov	w1, 0
-.LVL1655:
+.LVL1657:
 	mov	x0, x23
 	bl	ftl_memset
-.LVL1656:
-	b	.L1233
-.LVL1657:
-.L1235:
-	.loc 2 833 0
+.LVL1658:
+	b	.L1239
+.LVL1659:
+.L1241:
+	.loc 2 882 0
 	mov	w22, -1
-	b	.L1227
+	b	.L1233
 	.cfi_endproc
 .LFE264:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -15724,54 +15838,54 @@ FtlVendorPartRead:
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
 .LFB271:
-	.loc 2 1334 0
+	.loc 2 1383 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 1335 0
+	.loc 2 1384 0
 	mov	w0, 64
-	.loc 2 1334 0
+	.loc 2 1383 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 2 1335 0
+	.loc 2 1384 0
 	adrp	x19, .LANCHOR127
 	adrp	x20, .LANCHOR125
 	ldr	x2, [x19, #:lo12:.LANCHOR127]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	bl	FtlVendorPartRead
-.LVL1658:
-	.loc 2 1336 0
+.LVL1660:
+	.loc 2 1385 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1238
-.LBB282:
-.LBB283:
-	.loc 2 1338 0
-	adrp	x1, .LC100
+	beq	.L1244
+.LBB317:
+.LBB318:
+	.loc 2 1387 0
+	adrp	x1, .LC103
 	adrp	x0, .LC71
-	add	x1, x1, :lo12:.LC100
+	add	x1, x1, :lo12:.LC103
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL1659:
-	.loc 2 1339 0
+.LVL1661:
+	.loc 2 1388 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1660:
-.L1238:
-.LBE283:
-.LBE282:
-	.loc 2 1344 0
+.LVL1662:
+.L1244:
+.LBE318:
+.LBE317:
+	.loc 2 1393 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15790,113 +15904,113 @@ FtlLoadEctTbl:
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
 .LFB287:
-	.loc 2 2130 0
+	.loc 2 2179 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-	.loc 2 2131 0
+	.loc 2 2180 0
 	mov	w1, 1
 	mov	w0, 0
-	.loc 2 2130 0
+	.loc 2 2179 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 2131 0
-	adrp	x19, .LANCHOR83
-	.loc 2 2130 0
+	.loc 2 2180 0
+	adrp	x19, .LANCHOR81
+	.loc 2 2179 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2131 0
-	add	x21, x19, :lo12:.LANCHOR83
+	.loc 2 2180 0
+	add	x21, x19, :lo12:.LANCHOR81
 	mov	x2, x21
 	bl	FtlVendorPartRead
-.LVL1661:
-	.loc 2 2132 0
-	ldr	w0, [x19, #:lo12:.LANCHOR83]
+.LVL1663:
+	.loc 2 2181 0
+	ldr	w0, [x19, #:lo12:.LANCHOR81]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1241
-	.loc 2 2133 0
+	beq	.L1247
+	.loc 2 2182 0
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1662:
-	.loc 2 2134 0
-	str	w20, [x19, #:lo12:.LANCHOR83]
-.L1241:
-	.loc 2 2137 0
-	ldr	w1, [x19, #:lo12:.LANCHOR83]
-	add	x0, x19, :lo12:.LANCHOR83
+.LVL1664:
+	.loc 2 2183 0
+	str	w20, [x19, #:lo12:.LANCHOR81]
+.L1247:
+	.loc 2 2186 0
+	ldr	w1, [x19, #:lo12:.LANCHOR81]
+	add	x0, x19, :lo12:.LANCHOR81
 	cmp	w1, w20
-	adrp	x1, .LANCHOR74
-	bne	.L1242
-	.loc 2 2138 0
-	adrp	x2, .LANCHOR69
+	adrp	x1, .LANCHOR73
+	bne	.L1248
+	.loc 2 2187 0
+	adrp	x2, .LANCHOR68
 	ldr	w3, [x0, 88]
-	str	w3, [x2, #:lo12:.LANCHOR69]
-	.loc 2 2139 0
-	adrp	x2, .LANCHOR70
+	str	w3, [x2, #:lo12:.LANCHOR68]
+	.loc 2 2188 0
+	adrp	x2, .LANCHOR69
 	ldr	w3, [x0, 92]
-	str	w3, [x2, #:lo12:.LANCHOR70]
-	.loc 2 2140 0
-	adrp	x2, .LANCHOR68
+	str	w3, [x2, #:lo12:.LANCHOR69]
+	.loc 2 2189 0
+	adrp	x2, .LANCHOR67
 	ldr	w3, [x0, 8]
-	str	w3, [x2, #:lo12:.LANCHOR68]
-	.loc 2 2141 0
-	adrp	x2, .LANCHOR65
+	str	w3, [x2, #:lo12:.LANCHOR67]
+	.loc 2 2190 0
+	adrp	x2, .LANCHOR64
 	ldr	w3, [x0, 12]
-	str	w3, [x2, #:lo12:.LANCHOR65]
-	.loc 2 2142 0
-	adrp	x2, .LANCHOR63
+	str	w3, [x2, #:lo12:.LANCHOR64]
+	.loc 2 2191 0
+	adrp	x2, .LANCHOR62
 	ldr	w3, [x0, 16]
-	str	w3, [x2, #:lo12:.LANCHOR63]
-	.loc 2 2143 0
-	adrp	x2, .LANCHOR67
+	str	w3, [x2, #:lo12:.LANCHOR62]
+	.loc 2 2192 0
+	adrp	x2, .LANCHOR66
 	ldr	w3, [x0, 20]
-	str	w3, [x2, #:lo12:.LANCHOR67]
-	.loc 2 2145 0
+	str	w3, [x2, #:lo12:.LANCHOR66]
+	.loc 2 2194 0
 	ldp	w2, w3, [x0, 28]
-	.loc 2 2144 0
-	str	w2, [x1, #:lo12:.LANCHOR74]
-	.loc 2 2145 0
-	adrp	x2, .LANCHOR76
-	str	w3, [x2, #:lo12:.LANCHOR76]
-	.loc 2 2146 0
-	adrp	x2, .LANCHOR64
+	.loc 2 2193 0
+	str	w2, [x1, #:lo12:.LANCHOR73]
+	.loc 2 2194 0
+	adrp	x2, .LANCHOR75
+	str	w3, [x2, #:lo12:.LANCHOR75]
+	.loc 2 2195 0
+	adrp	x2, .LANCHOR63
 	ldr	w3, [x0, 36]
-	str	w3, [x2, #:lo12:.LANCHOR64]
-	.loc 2 2147 0
-	adrp	x2, .LANCHOR66
+	str	w3, [x2, #:lo12:.LANCHOR63]
+	.loc 2 2196 0
+	adrp	x2, .LANCHOR65
 	ldr	w3, [x0, 40]
-	str	w3, [x2, #:lo12:.LANCHOR66]
-	.loc 2 2148 0
-	adrp	x2, .LANCHOR77
+	str	w3, [x2, #:lo12:.LANCHOR65]
+	.loc 2 2197 0
+	adrp	x2, .LANCHOR76
 	ldr	w3, [x0, 44]
-	str	w3, [x2, #:lo12:.LANCHOR77]
-	.loc 2 2149 0
+	str	w3, [x2, #:lo12:.LANCHOR76]
+	.loc 2 2198 0
 	ldr	w2, [x0, 48]
-	adrp	x0, .LANCHOR78
-	str	w2, [x0, #:lo12:.LANCHOR78]
-.L1242:
-	.loc 2 2152 0
+	adrp	x0, .LANCHOR77
+	str	w2, [x0, #:lo12:.LANCHOR77]
+.L1248:
+	.loc 2 2201 0
 	adrp	x0, .LANCHOR14
-	adrp	x2, .LANCHOR73
-	ldr	w1, [x1, #:lo12:.LANCHOR74]
+	adrp	x2, .LANCHOR72
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
 	ldrh	w0, [x0, #:lo12:.LANCHOR14]
-	ldr	w2, [x2, #:lo12:.LANCHOR73]
-	.loc 2 2153 0
+	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	.loc 2 2202 0
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
-	.loc 2 2152 0
+	.loc 2 2201 0
 	madd	w0, w0, w2, w1
 	adrp	x1, .LANCHOR5
-	.loc 2 2153 0
+	.loc 2 2202 0
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -15904,12 +16018,12 @@ Ftl_load_ext_data:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 2 2152 0
+	.loc 2 2201 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	udiv	w0, w0, w1
-	adrp	x1, .LANCHOR75
-	str	w0, [x1, #:lo12:.LANCHOR75]
-	.loc 2 2153 0
+	adrp	x1, .LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR74]
+	.loc 2 2202 0
 	ret
 	.cfi_endproc
 .LFE287:
@@ -15920,184 +16034,184 @@ Ftl_load_ext_data:
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
 .LFB269:
-	.loc 2 1004 0
+	.loc 2 1053 0
 	.cfi_startproc
-.LVL1663:
+.LVL1665:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
 	.cfi_offset 30, -104
-	.loc 2 1013 0
-	adrp	x1, .LANCHOR81
-	.loc 2 1019 0
+	.loc 2 1062 0
+	adrp	x1, .LANCHOR79
+	.loc 2 1068 0
 	mov	w2, 19539
-	.loc 2 1004 0
+	.loc 2 1053 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -48
 	.cfi_offset 26, -40
-	.loc 2 1011 0
-	adrp	x25, .LANCHOR109
-	.loc 2 1004 0
+	.loc 2 1060 0
+	adrp	x25, .LANCHOR108
+	.loc 2 1053 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -80
 	.cfi_offset 22, -72
-	.loc 2 1010 0
-	adrp	x22, .LANCHOR108
-	.loc 2 1004 0
+	.loc 2 1059 0
+	adrp	x22, .LANCHOR106
+	.loc 2 1053 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -64
 	.cfi_offset 24, -56
-	.loc 2 1010 0
-	adrp	x24, .LANCHOR39
-	.loc 2 1004 0
+	.loc 2 1059 0
+	adrp	x24, .LANCHOR107
+	.loc 2 1053 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
-	.loc 2 1010 0
-	add	x28, x22, :lo12:.LANCHOR108
-	.loc 2 1011 0
-	ldr	x21, [x25, #:lo12:.LANCHOR109]
-	.loc 2 1019 0
+	.loc 2 1059 0
+	add	x28, x22, :lo12:.LANCHOR106
+	.loc 2 1060 0
+	ldr	x21, [x25, #:lo12:.LANCHOR108]
+	.loc 2 1068 0
 	movk	w2, 0x4654, lsl 16
-	.loc 2 1004 0
+	.loc 2 1053 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -96
 	.cfi_offset 20, -88
-	.loc 2 1013 0
-	add	x19, x1, :lo12:.LANCHOR81
-	.loc 2 1010 0
-	ldr	x0, [x24, #:lo12:.LANCHOR39]
-	.loc 2 1041 0
-	adrp	x23, .LANCHOR71
-	.loc 2 1013 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR81]
-	.loc 2 1057 0
+	.loc 2 1062 0
+	add	x19, x1, :lo12:.LANCHOR79
+	.loc 2 1059 0
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	.loc 2 1090 0
+	adrp	x23, .LANCHOR70
+	.loc 2 1062 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	.loc 2 1106 0
 	adrp	x27, .LANCHOR20
-	.loc 2 1011 0
+	.loc 2 1060 0
 	stp	x0, x21, [x28, 8]
-.LVL1664:
-	.loc 2 1005 0
+.LVL1666:
+	.loc 2 1054 0
 	mov	w26, 65535
-	.loc 2 1013 0
+	.loc 2 1062 0
 	strh	w1, [x21, 2]
-	.loc 2 1014 0
+	.loc 2 1063 0
 	mov	w1, -3932
 	strh	w1, [x21]
-	.loc 2 1015 0
+	.loc 2 1064 0
 	ldr	w1, [x19, 8]
-	.loc 2 1016 0
+	.loc 2 1065 0
 	stp	w1, wzr, [x21, 4]
-	.loc 2 1019 0
-	adrp	x1, .LANCHOR79
-	add	x20, x1, :lo12:.LANCHOR79
-	.loc 2 1017 0
+	.loc 2 1068 0
+	adrp	x1, .LANCHOR39
+	add	x20, x1, :lo12:.LANCHOR39
+	.loc 2 1066 0
 	str	wzr, [x21, 12]
-	.loc 2 1019 0
-	str	w2, [x1, #:lo12:.LANCHOR79]
-	.loc 2 1020 0
-	mov	w1, 64
+	.loc 2 1068 0
+	str	w2, [x1, #:lo12:.LANCHOR39]
+	.loc 2 1069 0
+	mov	w1, 68
 	movk	w1, 0x5000, lsl 16
 	str	w1, [x20, 4]
-	.loc 2 1021 0
+	.loc 2 1070 0
 	ldrh	w1, [x19, 6]
-	.loc 2 1024 0
+	.loc 2 1073 0
 	adrp	x2, .LANCHOR51
-	.loc 2 1021 0
+	.loc 2 1070 0
 	strh	w1, [x20, 8]
-	.loc 2 1022 0
+	.loc 2 1071 0
 	adrp	x1, .LANCHOR10
 	ldrh	w1, [x1, #:lo12:.LANCHOR10]
 	strb	w1, [x20, 10]
-	.loc 2 1024 0
+	.loc 2 1073 0
 	add	x1, x2, :lo12:.LANCHOR51
 	ldrh	w2, [x2, #:lo12:.LANCHOR51]
 	strh	w2, [x20, 14]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	ldrh	w2, [x1, 2]
 	ldrb	w3, [x1, 6]
-	.loc 2 1026 0
+	.loc 2 1075 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 11]
-	.loc 2 1025 0
+	.loc 2 1074 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 16]
-	.loc 2 1028 0
+	.loc 2 1077 0
 	adrp	x2, .LANCHOR52
 	add	x1, x2, :lo12:.LANCHOR52
 	ldrh	w2, [x2, #:lo12:.LANCHOR52]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1028 0
+	.loc 2 1077 0
 	strh	w2, [x20, 18]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1030 0
+	.loc 2 1079 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 12]
-	.loc 2 1029 0
+	.loc 2 1078 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 20]
-	.loc 2 1032 0
+	.loc 2 1081 0
 	adrp	x2, .LANCHOR53
 	add	x1, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrb	w3, [x1, 6]
-	.loc 2 1032 0
+	.loc 2 1081 0
 	strh	w2, [x20, 22]
-	.loc 2 1033 0
+	.loc 2 1082 0
 	ldrh	w2, [x1, 2]
-	.loc 2 1034 0
+	.loc 2 1083 0
 	ldrb	w1, [x1, 8]
 	strb	w1, [x20, 13]
-	.loc 2 1036 0
-	adrp	x1, .LANCHOR73
-	.loc 2 1033 0
+	.loc 2 1085 0
+	adrp	x1, .LANCHOR72
+	.loc 2 1082 0
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x20, 24]
-	.loc 2 1036 0
-	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	.loc 2 1085 0
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
 	str	w1, [x20, 32]
-	.loc 2 1041 0
-	ldr	w1, [x23, #:lo12:.LANCHOR71]
+	.loc 2 1090 0
+	ldr	w1, [x23, #:lo12:.LANCHOR70]
 	str	w1, [x20, 40]
-	.loc 2 1042 0
-	adrp	x1, .LANCHOR72
-	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	.loc 2 1091 0
+	adrp	x1, .LANCHOR71
+	ldr	w1, [x1, #:lo12:.LANCHOR71]
 	str	w1, [x20, 36]
-	.loc 2 1047 0
+	.loc 2 1096 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1665:
-	.loc 2 1048 0
+.LVL1667:
+	.loc 2 1097 0
 	ldr	x0, [x28, 8]
 	mov	x1, x20
 	mov	w2, 48
-	.loc 2 1049 0
+	.loc 2 1098 0
 	adrp	x20, .LANCHOR5
-	.loc 2 1048 0
+	.loc 2 1097 0
 	bl	ftl_memcpy
-.LVL1666:
-	.loc 2 1049 0
-	adrp	x1, .LANCHOR43
+.LVL1668:
+	.loc 2 1098 0
+	adrp	x1, .LANCHOR42
 	ldrh	w2, [x20, #:lo12:.LANCHOR5]
 	ldr	x0, [x28, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1667:
-	.loc 2 1050 0
+.LVL1669:
+	.loc 2 1099 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
 	ldr	x3, [x28, 8]
-	.loc 2 1007 0
+	.loc 2 1056 0
 	mov	w20, 0
-	.loc 2 1050 0
+	.loc 2 1099 0
 	ldr	x1, [x1, #:lo12:.LANCHOR1]
 	lsr	w2, w0, 3
 	ubfiz	x0, x0, 1, 16
@@ -16106,157 +16220,157 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1668:
-	.loc 2 1051 0
+.LVL1670:
+	.loc 2 1100 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1669:
-	.loc 2 1077 0
+.LVL1671:
+	.loc 2 1126 0
 	add	x0, x27, :lo12:.LANCHOR20
 	str	x0, [x29, 104]
-.LVL1670:
-.L1245:
-	.loc 2 1053 0
-	ldr	x0, [x24, #:lo12:.LANCHOR39]
-	.loc 2 1056 0
+.LVL1672:
+.L1251:
+	.loc 2 1102 0
+	ldr	x0, [x24, #:lo12:.LANCHOR107]
+	.loc 2 1105 0
 	mov	w3, 1
-	.loc 2 1053 0
+	.loc 2 1102 0
 	str	x0, [x28, 8]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	w2, w3
-	.loc 2 1054 0
-	ldr	x0, [x25, #:lo12:.LANCHOR109]
-	.loc 2 1055 0
+	.loc 2 1103 0
+	ldr	x0, [x25, #:lo12:.LANCHOR108]
+	.loc 2 1104 0
 	ldrh	w1, [x19, 2]
-	.loc 2 1054 0
+	.loc 2 1103 0
 	str	x0, [x28, 16]
-	.loc 2 1055 0
+	.loc 2 1104 0
 	ldrh	w0, [x19]
 	orr	w0, w1, w0, lsl 10
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	w1, w3
-	.loc 2 1055 0
+	.loc 2 1104 0
 	str	w0, [x28, 4]
-	.loc 2 1056 0
+	.loc 2 1105 0
 	mov	x0, x28
 	bl	FlashProgPages
-.LVL1671:
-	.loc 2 1057 0
+.LVL1673:
+	.loc 2 1106 0
 	ldrh	w0, [x27, #:lo12:.LANCHOR20]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1246
-	.loc 2 1059 0
+	blt	.L1252
+	.loc 2 1108 0
 	ldrh	w0, [x19]
-	.loc 2 1058 0
+	.loc 2 1107 0
 	ldrh	w26, [x19, 4]
-.LVL1672:
-	.loc 2 1060 0
+.LVL1674:
+	.loc 2 1109 0
 	strh	wzr, [x19, 2]
-	.loc 2 1059 0
+	.loc 2 1108 0
 	strh	w0, [x19, 4]
-	.loc 2 1061 0
+	.loc 2 1110 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1673:
+.LVL1675:
 	strh	w0, [x19]
-	.loc 2 1066 0
-	ldr	w1, [x23, #:lo12:.LANCHOR71]
-	.loc 2 1070 0
+	.loc 2 1115 0
+	ldr	w1, [x23, #:lo12:.LANCHOR70]
+	.loc 2 1119 0
 	mov	w3, 1
-	.loc 2 1066 0
+	.loc 2 1115 0
 	str	w1, [x19, 8]
 	add	w2, w1, 1
-	str	w2, [x23, #:lo12:.LANCHOR71]
-	.loc 2 1067 0
+	str	w2, [x23, #:lo12:.LANCHOR70]
+	.loc 2 1116 0
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
-	.loc 2 1069 0
+	.loc 2 1118 0
 	strh	w0, [x21, 2]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	w2, w3
-	.loc 2 1068 0
+	.loc 2 1117 0
 	str	w1, [x21, 4]
-	.loc 2 1070 0
+	.loc 2 1119 0
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1674:
-.L1246:
-	.loc 2 1072 0
+.LVL1676:
+.L1252:
+	.loc 2 1121 0
 	ldrh	w0, [x19, 2]
-	.loc 2 1073 0
+	.loc 2 1122 0
 	ldr	w1, [x28]
-	.loc 2 1072 0
+	.loc 2 1121 0
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
-	.loc 2 1073 0
+	.loc 2 1122 0
 	cmn	w1, #1
-	bne	.L1247
-	.loc 2 1075 0
+	bne	.L1253
+	.loc 2 1124 0
 	cmp	w0, 1
-	bne	.L1248
-	.loc 2 1075 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR167
+	bne	.L1254
+	.loc 2 1124 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC1
-	mov	w2, 1075
-	add	x1, x1, :lo12:.LANCHOR167
+	mov	w2, 1124
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1675:
-.L1248:
-	.loc 2 1076 0 is_stmt 1
+.LVL1677:
+.L1254:
+	.loc 2 1125 0 is_stmt 1
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1249
-	.loc 2 1077 0
+	bne	.L1255
+	.loc 2 1126 0
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1249:
-	.loc 2 1078 0
+.L1255:
+	.loc 2 1127 0
 	add	w20, w20, 1
-.LVL1676:
+.LVL1678:
 	and	w20, w20, 65535
-.LVL1677:
-	.loc 2 1079 0
+.LVL1679:
+	.loc 2 1128 0
 	cmp	w20, 3
-	bls	.L1245
-	.loc 2 1080 0
-	add	x22, x22, :lo12:.LANCHOR108
-	adrp	x0, .LC101
+	bls	.L1251
+	.loc 2 1129 0
+	add	x22, x22, :lo12:.LANCHOR106
+	adrp	x0, .LC104
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC101
+	add	x0, x0, :lo12:.LC104
 	ldr	w1, [x22, 4]
 	bl	printf
-.LVL1678:
-.L1251:
-	b	.L1251
-.L1247:
-	.loc 2 1086 0
+.LVL1680:
+.L1257:
+	b	.L1257
+.L1253:
+	.loc 2 1135 0
 	cmp	w0, 1
-	beq	.L1245
-	.loc 2 1089 0
+	beq	.L1251
+	.loc 2 1138 0
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1252
-	.loc 2 1090 0
+	beq	.L1258
+	.loc 2 1139 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1679:
-.L1252:
-	.loc 2 1092 0
+.LVL1681:
+.L1258:
+	.loc 2 1141 0
 	ldp	x19, x20, [sp, 16]
-.LVL1680:
+.LVL1682:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1681:
+.LVL1683:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1682:
+.LVL1684:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
@@ -16276,87 +16390,330 @@ FtlVpcTblFlush:
 	.cfi_endproc
 .LFE269:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB212:
+	.loc 3 797 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1685:
+	.loc 3 800 0
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.LVL1686:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1687:
+	.loc 3 803 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE212:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",@progbits
+	.align	2
+	.global	sftl_deinit
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB213:
+	.loc 3 806 0
+	.cfi_startproc
+	.loc 3 807 0
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
+	cmp	w0, 1
+	bne	.L1268
+	.loc 3 806 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1688:
+	.loc 3 810 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.L1268:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE213:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",@progbits
+	.align	2
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB218:
+	.loc 3 1121 0
+	.cfi_startproc
+.LVL1689:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 3 1128 0
+	add	w2, w0, w1
+	.loc 3 1121 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w19, w1
+	.loc 3 1128 0
+	adrp	x1, .LANCHOR34
+.LVL1690:
+	.loc 3 1121 0
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.loc 3 1128 0
+	ldr	w1, [x1, #:lo12:.LANCHOR34]
+	cmp	w2, w1
+	bhi	.L1279
+	.loc 3 1131 0
+	cmp	w19, 31
+	bhi	.L1273
+.LVL1691:
+.L1287:
+	.loc 3 1164 0
+	mov	w0, 0
+.L1271:
+	.loc 3 1165 0
+	ldp	x19, x20, [sp, 16]
+.LVL1692:
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1693:
+.L1273:
+	.cfi_restore_state
+	.loc 3 1136 0
+	adrp	x21, .LANCHOR12
+	ldrh	w1, [x21, #:lo12:.LANCHOR12]
+	udiv	w20, w0, w1
+.LVL1694:
+	.loc 3 1137 0
+	msub	w0, w1, w20, w0
+.LVL1695:
+	.loc 3 1138 0
+	ands	w0, w0, 65535
+	beq	.L1274
+.LVL1696:
+	.loc 3 1139 0
+	sub	w1, w1, w0
+.LVL1697:
+	.loc 3 1140 0
+	add	w20, w20, 1
+.LVL1698:
+	.loc 3 1139 0
+	cmp	w1, w19
+	csel	w1, w1, w19, ls
+	.loc 3 1141 0
+	sub	w19, w19, w1, uxth
+.LVL1699:
+.L1274:
+	.loc 3 1148 0
+	adrp	x22, .LANCHOR167
+	.loc 3 1149 0
+	adrp	x23, .LANCHOR63
+	.loc 3 1148 0
+	add	x22, x22, :lo12:.LANCHOR167
+	.loc 3 1149 0
+	add	x23, x23, :lo12:.LANCHOR63
+	.loc 3 1144 0
+	mov	w0, -1
+.LVL1700:
+	str	w0, [x29, 76]
+.LVL1701:
+.L1275:
+	.loc 3 1145 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR12]
+	cmp	w19, w0
+	bcs	.L1277
+	.loc 3 1158 0
+	adrp	x0, .LANCHOR167
+	ldr	w1, [x0, #:lo12:.LANCHOR167]
+	cmp	w1, 32
+	bls	.L1287
+	.loc 3 1160 0
+	str	wzr, [x0, #:lo12:.LANCHOR167]
+	.loc 3 1161 0
+	bl	l2p_flush
+.LVL1702:
+	.loc 3 1162 0
+	bl	FtlVpcTblFlush
+.LVL1703:
+	b	.L1287
+.L1277:
+	.loc 3 1146 0
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w20
+	bl	log2phys
+.LVL1704:
+	.loc 3 1147 0
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1276
+	.loc 3 1148 0
+	ldr	w0, [x22]
+	.loc 3 1150 0
+	mov	w2, 1
+	add	x1, x29, 76
+	.loc 3 1148 0
+	add	w0, w0, 1
+	str	w0, [x22]
+	.loc 3 1149 0
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	.loc 3 1150 0
+	mov	w0, w20
+	bl	log2phys
+.LVL1705:
+	.loc 3 1151 0
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1706:
+	.loc 3 1152 0
+	bl	decrement_vpc_count
+.LVL1707:
+.L1276:
+	.loc 3 1155 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR12]
+	.loc 3 1154 0
+	add	w20, w20, 1
+.LVL1708:
+	.loc 3 1155 0
+	sub	w19, w19, w0
+.LVL1709:
+	b	.L1275
+.LVL1710:
+.L1279:
+	.loc 3 1129 0
+	mov	w0, -1
+.LVL1711:
+	b	.L1271
+	.cfi_endproc
+.LFE218:
+	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
 	.align	2
 	.global	FtlVpcCheckAndModify
 	.type	FtlVpcCheckAndModify, %function
 FtlVpcCheckAndModify:
 .LFB289:
-	.loc 2 2192 0
+	.loc 2 2242 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 2 2197 0
+	.loc 2 2247 0
 	adrp	x1, .LANCHOR168
-	adrp	x0, .LC91
+	adrp	x0, .LC94
 	add	x1, x1, :lo12:.LANCHOR168
-	.loc 2 2192 0
+	.loc 2 2242 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
-	.loc 2 2197 0
-	add	x0, x0, :lo12:.LC91
-	.loc 2 2192 0
+	.loc 2 2247 0
+	add	x0, x0, :lo12:.LC94
+	.loc 2 2242 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 2 2198 0
+	.loc 2 2248 0
 	adrp	x20, .LANCHOR128
-	.loc 2 2192 0
+	.loc 2 2242 0
 	stp	x23, x24, [sp, 48]
-	.loc 2 2199 0
-	adrp	x21, .LANCHOR62
-	.loc 2 2192 0
+	.loc 2 2249 0
+	adrp	x21, .LANCHOR61
+	.loc 2 2242 0
 	str	x25, [sp, 64]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
 	.cfi_offset 25, -32
-	.loc 2 2197 0
+	.loc 2 2247 0
 	bl	printf
-.LVL1683:
-	.loc 2 2198 0
+.LVL1712:
+	.loc 2 2248 0
 	adrp	x0, .LANCHOR6
-	.loc 2 2199 0
+	.loc 2 2249 0
 	mov	w19, 0
-	add	x21, x21, :lo12:.LANCHOR62
-	.loc 2 2198 0
+	add	x21, x21, :lo12:.LANCHOR61
+	.loc 2 2248 0
 	mov	w1, 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR6]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1684:
-.L1258:
-	.loc 2 2199 0 discriminator 1
+.LVL1713:
+.L1289:
+	.loc 2 2249 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1260
-	.loc 2 2206 0 discriminator 1
+	bcc	.L1291
+	.loc 2 2256 0 discriminator 1
 	adrp	x22, .LANCHOR5
-	.loc 2 2209 0 discriminator 1
-	adrp	x23, .LC102
-	.loc 2 2206 0 discriminator 1
+	.loc 2 2259 0 discriminator 1
+	adrp	x23, .LC105
+	.loc 2 2256 0 discriminator 1
 	add	x22, x22, :lo12:.LANCHOR5
-	.loc 2 2209 0 discriminator 1
-	add	x23, x23, :lo12:.LC102
+	.loc 2 2259 0 discriminator 1
+	add	x23, x23, :lo12:.LC105
 	mov	w19, 0
-.LVL1685:
-	.loc 2 2207 0 discriminator 1
-	adrp	x25, .LANCHOR43
+.LVL1714:
+	.loc 2 2257 0 discriminator 1
+	adrp	x25, .LANCHOR42
 	mov	w24, 65535
-.L1261:
-.LVL1686:
-	.loc 2 2206 0 discriminator 1
+.L1292:
+.LVL1715:
+	.loc 2 2256 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1265
-	.loc 2 2218 0
+	bhi	.L1296
+	.loc 2 2268 0
 	ldp	x19, x20, [sp, 16]
-.LVL1687:
+.LVL1716:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16373,90 +16730,90 @@ FtlVpcCheckAndModify:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1688:
-.L1260:
+.LVL1717:
+.L1291:
 	.cfi_restore_state
-	.loc 2 2200 0
+	.loc 2 2250 0
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
-.LVL1689:
-	.loc 2 2201 0
+.LVL1718:
+	.loc 2 2251 0
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1259
-	.loc 2 2202 0
+	beq	.L1290
+	.loc 2 2252 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1690:
-	.loc 2 2203 0
+.LVL1719:
+	.loc 2 2253 0
 	ldr	x2, [x20, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
-.LVL1691:
+.LVL1720:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1259:
-	.loc 2 2199 0 discriminator 2
+.L1290:
+	.loc 2 2249 0 discriminator 2
 	add	w19, w19, 1
-.LVL1692:
-	b	.L1258
-.LVL1693:
-.L1265:
-	.loc 2 2207 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.LVL1721:
+	b	.L1289
+.LVL1722:
+.L1296:
+	.loc 2 2257 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x21, x19, 1, 16
 	ldrh	w2, [x0, x21]
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1263
-	.loc 2 2207 0 is_stmt 0 discriminator 1
+	beq	.L1294
+	.loc 2 2257 0 is_stmt 0 discriminator 1
 	cmp	w2, w24
-	beq	.L1263
-	.loc 2 2209 0 is_stmt 1
+	beq	.L1294
+	.loc 2 2259 0 is_stmt 1
 	mov	w1, w19
 	mov	x0, x23
 	bl	printf
-.LVL1694:
-	.loc 2 2210 0
+.LVL1723:
+	.loc 2 2260 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1263
-	.loc 2 2210 0 is_stmt 0 discriminator 1
+	beq	.L1294
+	.loc 2 2260 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1263
-	.loc 2 2210 0 discriminator 2
+	beq	.L1294
+	.loc 2 2260 0 discriminator 2
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1263
-	.loc 2 2211 0 is_stmt 1
+	beq	.L1294
+	.loc 2 2261 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w1, [x0, x21]
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	strh	w1, [x0, x21]
-	.loc 2 2212 0
+	.loc 2 2262 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1695:
-	.loc 2 2213 0
+.LVL1724:
+	.loc 2 2263 0
 	bl	l2p_flush
-.LVL1696:
-	.loc 2 2214 0
+.LVL1725:
+	.loc 2 2264 0
 	bl	FtlVpcTblFlush
-.LVL1697:
-.L1263:
-	.loc 2 2206 0 discriminator 2
+.LVL1726:
+.L1294:
+	.loc 2 2256 0 discriminator 2
 	add	w19, w19, 1
-.LVL1698:
+.LVL1727:
 	and	w19, w19, 65535
-.LVL1699:
-	b	.L1261
+.LVL1728:
+	b	.L1292
 	.cfi_endproc
 .LFE289:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -16466,9 +16823,9 @@ FtlVpcCheckAndModify:
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
 .LFB299:
-	.loc 2 2631 0
+	.loc 2 2682 0
 	.cfi_startproc
-.LVL1700:
+.LVL1729:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -16478,93 +16835,93 @@ allocate_new_data_superblock:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
 	.cfi_offset 20, -24
-	.loc 2 2632 0
+	.loc 2 2683 0
 	ldrh	w19, [x0]
-.LVL1701:
-	.loc 2 2631 0
+.LVL1730:
+	.loc 2 2682 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
-	.loc 2 2631 0
+	.loc 2 2682 0
 	mov	x21, x0
-	.loc 2 2633 0
+	.loc 2 2684 0
 	adrp	x0, .LANCHOR5
-.LVL1702:
+.LVL1731:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1271
-	.loc 2 2633 0 is_stmt 0 discriminator 1
+	bcs	.L1302
+	.loc 2 2684 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
-	mov	w2, 2633
+	mov	w2, 2684
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1703:
-.L1271:
-	.loc 2 2635 0 is_stmt 1
+.LVL1732:
+.L1302:
+	.loc 2 2686 0 is_stmt 1
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1272
-	.loc 2 2636 0
-	adrp	x1, .LANCHOR43
+	beq	.L1303
+	.loc 2 2687 0
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x19, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1273
-	.loc 2 2637 0
-	mov	w0, w19
-	bl	INSERT_DATA_LIST
-.LVL1704:
-.L1272:
-	.loc 2 2642 0
-	adrp	x1, .LANCHOR151
-	.loc 2 2641 0
+	cbz	w0, .L1304
+	.loc 2 2688 0
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL1733:
+.L1303:
+	.loc 2 2693 0
+	adrp	x1, .LANCHOR150
+	.loc 2 2692 0
 	mov	w0, 1
 	strb	w0, [x21, 8]
-	.loc 2 2642 0
+	.loc 2 2693 0
 	mov	w2, 65535
-	ldrh	w0, [x1, #:lo12:.LANCHOR151]
+	ldrh	w0, [x1, #:lo12:.LANCHOR150]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1274
-	.loc 2 2643 0
+	beq	.L1305
+	.loc 2 2694 0
 	cmp	w19, w0
-	bne	.L1275
-	.loc 2 2643 0 is_stmt 0 discriminator 1
-	adrp	x2, .LANCHOR43
+	bne	.L1306
+	.loc 2 2694 0 is_stmt 0 discriminator 1
+	adrp	x2, .LANCHOR42
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1276
-.L1275:
-	.loc 2 2644 0 is_stmt 1
+	cbz	w1, .L1307
+.L1306:
+	.loc 2 2695 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1705:
-.L1276:
-	.loc 2 2645 0
+.LVL1734:
+.L1307:
+	.loc 2 2696 0
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR151]
-.L1274:
-	.loc 2 2647 0
+	strh	w0, [x20, #:lo12:.LANCHOR150]
+.L1305:
+	.loc 2 2698 0
 	mov	x0, x21
 	bl	allocate_data_superblock
-.LVL1706:
-	.loc 2 2648 0
+.LVL1735:
+	.loc 2 2699 0
 	bl	l2p_flush
-.LVL1707:
-	.loc 2 2649 0
+.LVL1736:
+	.loc 2 2700 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1708:
-	.loc 2 2650 0
+.LVL1737:
+	.loc 2 2701 0
 	bl	FtlVpcTblFlush
-.LVL1709:
-	.loc 2 2652 0
+.LVL1738:
+	.loc 2 2703 0
 	ldr	x21, [sp, 32]
-.LVL1710:
+.LVL1739:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1711:
+.LVL1740:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -16574,14 +16931,14 @@ allocate_new_data_superblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1712:
-.L1273:
+.LVL1741:
+.L1304:
 	.cfi_restore_state
-	.loc 2 2639 0
+	.loc 2 2690 0
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-.LVL1713:
-	b	.L1272
+.LVL1742:
+	b	.L1303
 	.cfi_endproc
 .LFE299:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
@@ -16593,14 +16950,14 @@ FtlProgPages:
 .LFB215:
 	.loc 3 904 0
 	.cfi_startproc
-.LVL1714:
+.LVL1743:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
 	.loc 3 911 0
 	mov	w2, 0
-.LVL1715:
+.LVL1744:
 	.loc 3 904 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -16624,41 +16981,41 @@ FtlProgPages:
 	adrp	x24, .LANCHOR19
 	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1716:
+.LVL1745:
 	.loc 3 926 0
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR81
 	add	x21, x0, x21
 	.loc 3 918 0
 	add	x24, x24, :lo12:.LANCHOR19
 	.loc 3 926 0
-	add	x23, x23, :lo12:.LANCHOR83
+	add	x23, x23, :lo12:.LANCHOR81
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1717:
-.L1282:
+.LVL1746:
+.L1313:
 	.loc 3 913 0 discriminator 1
 	cmp	x20, x21
-	beq	.L1289
+	beq	.L1320
 	sub	x22, x20, #4
 	.loc 3 917 0
-	adrp	x25, .LANCHOR43
-	b	.L1290
-.L1285:
+	adrp	x25, .LANCHOR42
+	b	.L1321
+.L1316:
 	.loc 3 915 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1718:
+.LVL1747:
 	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1283
+	bne	.L1314
 	.loc 3 917 0
-	ldr	x2, [x25, #:lo12:.LANCHOR43]
+	ldr	x2, [x25, #:lo12:.LANCHOR42]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
-.LVL1719:
+.LVL1748:
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
 	.loc 3 919 0
@@ -16668,15 +17025,15 @@ FtlProgPages:
 	strh	w0, [x19, 2]
 	.loc 3 920 0
 	strh	wzr, [x19, 4]
-.L1283:
+.L1314:
 	.loc 3 922 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1284
+	cbnz	w0, .L1315
 	.loc 3 923 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1720:
-.L1284:
+.LVL1749:
+.L1315:
 	.loc 3 926 0
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
@@ -16685,11 +17042,11 @@ FtlProgPages:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1721:
+.LVL1750:
 	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1722:
+.LVL1751:
 	.loc 3 929 0
 	str	w0, [x20]
 	.loc 3 930 0
@@ -16701,18 +17058,18 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.LVL1723:
-.L1290:
+.LVL1752:
+.L1321:
 	.loc 3 914 0
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1285
+	beq	.L1316
 	.loc 3 933 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1286
+	bcc	.L1317
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16720,8 +17077,8 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1724:
-.L1286:
+.LVL1753:
+.L1317:
 	.loc 3 934 0 is_stmt 1
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
@@ -16732,49 +17089,49 @@ FtlProgPages:
 	.loc 3 935 0
 	ldr	w0, [x22, 24]
 	bl	log2phys
-.LVL1725:
+.LVL1754:
 	.loc 3 937 0
 	ldr	x0, [x22, 16]
 	ldr	w3, [x0, 12]
-.LVL1726:
+.LVL1755:
 	.loc 3 939 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1727:
+.LVL1756:
 	and	w1, w0, 65535
 	mov	w22, w1
-.LVL1728:
+.LVL1757:
 	.loc 3 940 0
 	cmn	w3, #1
-	beq	.L1287
+	beq	.L1318
 	.loc 3 942 0
-	adrp	x2, .LANCHOR43
+	adrp	x2, .LANCHOR42
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1288
+	cbnz	w0, .L1319
 	.loc 3 943 0
-	adrp	x0, .LC103
+	adrp	x0, .LC106
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC103
+	add	x0, x0, :lo12:.LC106
 	bl	printf
-.LVL1729:
-.L1288:
+.LVL1758:
+.L1319:
 	.loc 3 944 0
 	mov	w0, w22
 	bl	decrement_vpc_count
-.LVL1730:
-.L1287:
+.LVL1759:
+.L1318:
 	add	x20, x20, 32
-	b	.L1282
-.LVL1731:
-.L1289:
+	b	.L1313
+.LVL1760:
+.L1320:
 	.loc 3 948 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1281
+	bcc	.L1312
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16782,11 +17139,11 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1732:
-.L1281:
+.LVL1761:
+.L1312:
 	.loc 3 949 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1733:
+.LVL1762:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16805,297 +17162,6 @@ FtlProgPages:
 	.cfi_endproc
 .LFE215:
 	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",@progbits
-	.align	2
-	.global	FtlCacheWriteBack
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-.LFB216:
-	.loc 3 952 0
-	.cfi_startproc
-	stp	x29, x30, [sp, -32]!
-	.cfi_def_cfa_offset 32
-	.cfi_offset 29, -32
-	.cfi_offset 30, -24
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	str	x19, [sp, 16]
-	.cfi_offset 19, -16
-	.loc 3 953 0
-	adrp	x19, .LANCHOR150
-	ldr	x0, [x19, #:lo12:.LANCHOR150]
-	cbz	x0, .L1297
-	.loc 3 954 0
-	adrp	x1, .LANCHOR171
-	mov	w2, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR171]
-	mov	w1, 1
-	bl	FtlProgPages
-.LVL1734:
-	.loc 3 955 0
-	str	xzr, [x19, #:lo12:.LANCHOR150]
-.L1297:
-	.loc 3 958 0
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 19
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE216:
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",@progbits
-	.align	2
-	.global	FtlSysFlush
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-.LFB212:
-	.loc 3 797 0
-	.cfi_startproc
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 798 0
-	bl	FtlCacheWriteBack
-.LVL1735:
-	.loc 3 799 0
-	bl	l2p_flush
-.LVL1736:
-	.loc 3 800 0
-	mov	w0, 1
-	bl	FtlEctTblFlush
-.LVL1737:
-	.loc 3 801 0
-	bl	FtlVpcTblFlush
-.LVL1738:
-	.loc 3 803 0
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-	.cfi_endproc
-.LFE212:
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.sftl_deinit,"ax",@progbits
-	.align	2
-	.global	sftl_deinit
-	.type	sftl_deinit, %function
-sftl_deinit:
-.LFB213:
-	.loc 3 806 0
-	.cfi_startproc
-	.loc 3 807 0
-	adrp	x0, .LANCHOR88
-	ldr	w0, [x0, #:lo12:.LANCHOR88]
-	cmp	w0, 1
-	bne	.L1307
-	.loc 3 806 0
-	stp	x29, x30, [sp, -16]!
-	.cfi_def_cfa_offset 16
-	.cfi_offset 29, -16
-	.cfi_offset 30, -8
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	.loc 3 808 0
-	bl	FtlSysFlush
-.LVL1739:
-	.loc 3 810 0
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_def_cfa 31, 0
-	ret
-.L1307:
-	mov	w0, 0
-	ret
-	.cfi_endproc
-.LFE213:
-	.size	sftl_deinit, .-sftl_deinit
-	.section	.text.FtlDiscard,"ax",@progbits
-	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
-.LFB218:
-	.loc 3 1157 0
-	.cfi_startproc
-.LVL1740:
-	stp	x29, x30, [sp, -80]!
-	.cfi_def_cfa_offset 80
-	.cfi_offset 29, -80
-	.cfi_offset 30, -72
-	add	x29, sp, 0
-	.cfi_def_cfa_register 29
-	stp	x19, x20, [sp, 16]
-	.cfi_offset 19, -64
-	.cfi_offset 20, -56
-	mov	w20, w0
-	mov	w19, w1
-	.loc 3 1164 0
-	add	w1, w0, w1
-.LVL1741:
-	adrp	x0, .LANCHOR34
-.LVL1742:
-	.loc 3 1157 0
-	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	.cfi_offset 21, -48
-	.cfi_offset 22, -40
-	.cfi_offset 23, -32
-	.loc 3 1164 0
-	ldr	w0, [x0, #:lo12:.LANCHOR34]
-	cmp	w1, w0
-	bhi	.L1318
-	.loc 3 1167 0
-	cmp	w19, 31
-	bhi	.L1312
-.LVL1743:
-.L1326:
-	.loc 3 1200 0
-	mov	w0, 0
-.L1310:
-	.loc 3 1201 0
-	ldp	x19, x20, [sp, 16]
-.LVL1744:
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	.cfi_remember_state
-	.cfi_restore 30
-	.cfi_restore 29
-	.cfi_restore 23
-	.cfi_restore 21
-	.cfi_restore 22
-	.cfi_restore 19
-	.cfi_restore 20
-	.cfi_def_cfa 31, 0
-	ret
-.LVL1745:
-.L1312:
-	.cfi_restore_state
-	.loc 3 1172 0
-	adrp	x22, .LANCHOR12
-	.loc 3 1170 0
-	bl	FtlCacheWriteBack
-.LVL1746:
-	.loc 3 1172 0
-	ldrh	w1, [x22, #:lo12:.LANCHOR12]
-	udiv	w21, w20, w1
-.LVL1747:
-	.loc 3 1173 0
-	msub	w20, w1, w21, w20
-.LVL1748:
-	.loc 3 1174 0
-	ands	w20, w20, 65535
-	beq	.L1313
-.LVL1749:
-	.loc 3 1175 0
-	sub	w1, w1, w20
-.LVL1750:
-	.loc 3 1176 0
-	add	w21, w21, 1
-.LVL1751:
-	.loc 3 1175 0
-	cmp	w1, w19
-	csel	w1, w1, w19, ls
-	.loc 3 1177 0
-	sub	w19, w19, w1, uxth
-.LVL1752:
-.L1313:
-	.loc 3 1184 0
-	adrp	x20, .LANCHOR172
-.LVL1753:
-	.loc 3 1185 0
-	adrp	x23, .LANCHOR64
-	.loc 3 1184 0
-	add	x20, x20, :lo12:.LANCHOR172
-	.loc 3 1185 0
-	add	x23, x23, :lo12:.LANCHOR64
-	.loc 3 1180 0
-	mov	w0, -1
-	str	w0, [x29, 76]
-.LVL1754:
-.L1314:
-	.loc 3 1181 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	cmp	w19, w0
-	bcs	.L1316
-	.loc 3 1194 0
-	adrp	x0, .LANCHOR172
-	ldr	w1, [x0, #:lo12:.LANCHOR172]
-	cmp	w1, 32
-	bls	.L1326
-	.loc 3 1196 0
-	str	wzr, [x0, #:lo12:.LANCHOR172]
-	.loc 3 1197 0
-	bl	l2p_flush
-.LVL1755:
-	.loc 3 1198 0
-	bl	FtlVpcTblFlush
-.LVL1756:
-	b	.L1326
-.L1316:
-	.loc 3 1182 0
-	mov	w2, 0
-	add	x1, x29, 72
-	mov	w0, w21
-	bl	log2phys
-.LVL1757:
-	.loc 3 1183 0
-	ldr	w0, [x29, 72]
-	cmn	w0, #1
-	beq	.L1315
-	.loc 3 1184 0
-	ldr	w0, [x20]
-	.loc 3 1186 0
-	mov	w2, 1
-	add	x1, x29, 76
-	.loc 3 1184 0
-	add	w0, w0, 1
-	str	w0, [x20]
-	.loc 3 1185 0
-	ldr	w0, [x23]
-	add	w0, w0, 1
-	str	w0, [x23]
-	.loc 3 1186 0
-	mov	w0, w21
-	bl	log2phys
-.LVL1758:
-	.loc 3 1187 0
-	ldr	w0, [x29, 72]
-	lsr	w0, w0, 10
-	bl	P2V_block_in_plane
-.LVL1759:
-	.loc 3 1188 0
-	bl	decrement_vpc_count
-.LVL1760:
-.L1315:
-	.loc 3 1191 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 1190 0
-	add	w21, w21, 1
-.LVL1761:
-	.loc 3 1191 0
-	sub	w19, w19, w0
-.LVL1762:
-	b	.L1314
-.LVL1763:
-.L1318:
-	.loc 3 1165 0
-	mov	w0, -1
-	b	.L1310
-	.cfi_endproc
-.LFE218:
-	.size	FtlDiscard, .-FtlDiscard
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
@@ -17104,7 +17170,7 @@ FtlGcFreeTempBlock:
 .LFB308:
 	.loc 5 112 0
 	.cfi_startproc
-.LVL1764:
+.LVL1763:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -17141,21 +17207,21 @@ FtlGcFreeTempBlock:
 	.cfi_offset 27, -32
 	.loc 5 115 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-.LVL1765:
+.LVL1764:
 	.loc 5 119 0
 	bne	.L1328
-.LVL1766:
+.LVL1765:
 .L1338:
 	.loc 5 152 0
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR152
 	.loc 5 153 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR53]
-	add	x22, x19, :lo12:.LANCHOR53
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65535
 	.loc 5 152 0
-	str	wzr, [x0, #:lo12:.LANCHOR153]
+	str	wzr, [x0, #:lo12:.LANCHOR152]
 	.loc 5 153 0
-	mov	w0, 65535
-	cmp	w1, w0
+	cmp	w2, w1
+	add	x0, x19, :lo12:.LANCHOR53
 	bne	.L1351
 .L1354:
 	.loc 5 198 0
@@ -17182,36 +17248,36 @@ FtlGcFreeTempBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1767:
+.LVL1766:
 .L1328:
 	.cfi_restore_state
 	.loc 5 121 0
 	cbz	w0, .L1331
-.LVL1768:
+.LVL1767:
 	.loc 5 123 0
-	adrp	x0, .LANCHOR157
-.LVL1769:
-	ldrh	w3, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR156
+.LVL1768:
+	ldrh	w3, [x0, #:lo12:.LANCHOR156]
 	cmp	w3, w2
 	beq	.L1332
 .L1333:
 	.loc 5 122 0
 	mov	w1, 2
-.LVL1770:
+.LVL1769:
 .L1331:
 	.loc 5 131 0
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
-.LVL1771:
+.LVL1770:
 	str	w0, [x29, 108]
 	.loc 5 132 0
 	cmn	w0, #1
 	beq	.L1334
 	.loc 5 135 0
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR43
 	ubfiz	x20, x20, 1, 16
-.LVL1772:
-	ldr	x1, [x0, #:lo12:.LANCHOR40]
+.LVL1771:
+	ldr	x1, [x0, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
 	bls	.L1335
@@ -17221,16 +17287,16 @@ FtlGcFreeTempBlock:
 	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1773:
+.LVL1772:
 .L1335:
 	.loc 5 139 0
-	adrp	x0, .LANCHOR153
+	adrp	x0, .LANCHOR152
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR153]
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
 	cbnz	w1, .L1336
 	.loc 5 140 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
@@ -17238,154 +17304,151 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x29, 108]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1774:
+.LVL1773:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1775:
+.LVL1774:
 .L1336:
 	.loc 5 144 0
-	str	wzr, [x19, #:lo12:.LANCHOR153]
+	str	wzr, [x19, #:lo12:.LANCHOR152]
 .L1347:
 	.loc 5 149 0
 	mov	w0, 1
 	b	.L1327
-.LVL1776:
+.LVL1775:
 .L1332:
 	.loc 5 124 0
-	strh	wzr, [x0, #:lo12:.LANCHOR157]
+	strh	wzr, [x0, #:lo12:.LANCHOR156]
 	.loc 5 125 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
 	bhi	.L1333
 	b	.L1331
-.LVL1777:
+.LVL1776:
 .L1334:
 	.loc 5 148 0
-	adrp	x0, .LANCHOR157
-	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR156
+	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L1347
 	b	.L1338
-.LVL1778:
+.LVL1777:
 .L1351:
-	.loc 5 160 0
-	bl	FtlCacheWriteBack
-.LVL1779:
 	.loc 5 162 0
-	adrp	x20, .LANCHOR99
-	ldrb	w0, [x22, 7]
+	ldrb	w0, [x0, 7]
+	adrp	x20, .LANCHOR97
 	ldrh	w2, [x21, #:lo12:.LANCHOR19]
-	ldrh	w1, [x20, #:lo12:.LANCHOR99]
+	ldrh	w1, [x20, #:lo12:.LANCHOR97]
 	mul	w0, w0, w2
 	cmp	w1, w0
 	beq	.L1339
 	.loc 5 162 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR173
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC1
 	mov	w2, 162
-	add	x1, x1, :lo12:.LANCHOR173
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1780:
+.LVL1778:
 .L1339:
 	.loc 5 163 0 is_stmt 1
 	add	x0, x19, :lo12:.LANCHOR53
-	adrp	x23, .LANCHOR43
+	adrp	x23, .LANCHOR42
 	ldrh	w3, [x21, #:lo12:.LANCHOR19]
 	.loc 5 168 0
-	adrp	x25, .LANCHOR62
+	adrp	x25, .LANCHOR61
 	.loc 5 163 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR53]
 	.loc 5 168 0
-	adrp	x26, .LANCHOR173
+	adrp	x26, .LANCHOR171
 	.loc 5 163 0
 	ldrb	w0, [x0, 7]
 	.loc 5 168 0
-	add	x25, x25, :lo12:.LANCHOR62
+	add	x25, x25, :lo12:.LANCHOR61
 	.loc 5 163 0
-	ldr	x1, [x23, #:lo12:.LANCHOR43]
+	ldr	x1, [x23, #:lo12:.LANCHOR42]
 	.loc 5 168 0
-	add	x26, x26, :lo12:.LANCHOR173
+	add	x26, x26, :lo12:.LANCHOR171
 	.loc 5 165 0
 	mov	w21, 0
 	.loc 5 163 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
 	.loc 5 164 0
-	adrp	x1, .LANCHOR68
-	ldrh	w0, [x20, #:lo12:.LANCHOR99]
-	ldr	w2, [x1, #:lo12:.LANCHOR68]
+	adrp	x1, .LANCHOR67
+	ldrh	w0, [x20, #:lo12:.LANCHOR97]
+	ldr	w2, [x1, #:lo12:.LANCHOR67]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR68]
-.LVL1781:
+	str	w0, [x1, #:lo12:.LANCHOR67]
+.LVL1779:
 .L1340:
 	.loc 5 165 0 discriminator 1
-	ldrh	w0, [x20, #:lo12:.LANCHOR99]
+	ldrh	w0, [x20, #:lo12:.LANCHOR97]
 	cmp	w0, w21
 	bhi	.L1344
 	.loc 5 181 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1782:
+.LVL1780:
 	.loc 5 182 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	ldr	x2, [x23, #:lo12:.LANCHOR43]
+	ldr	x2, [x23, #:lo12:.LANCHOR42]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
 	cbz	w1, .L1345
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1783:
+.LVL1781:
 .L1346:
 	.loc 5 188 0
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR95
 	.loc 5 186 0
 	mov	w21, -1
-.LVL1784:
+.LVL1782:
 	.loc 5 187 0
-	strh	wzr, [x20, #:lo12:.LANCHOR99]
+	strh	wzr, [x20, #:lo12:.LANCHOR97]
 	.loc 5 186 0
 	strh	w21, [x19, #:lo12:.LANCHOR53]
 	.loc 5 188 0
-	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1785:
+.LVL1783:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1786:
+.LVL1784:
 	.loc 5 191 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR78
+	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
 	ble	.L1354
 	.loc 5 192 0
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR80
 	.loc 5 193 0
 	mov	w1, 20
 	.loc 5 192 0
-	strh	w21, [x0, #:lo12:.LANCHOR82]
+	strh	w21, [x0, #:lo12:.LANCHOR80]
 	.loc 5 193 0
-	adrp	x0, .LANCHOR84
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR82
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	b	.L1354
-.LVL1787:
+.LVL1785:
 .L1344:
 	.loc 5 166 0
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR98
 	mov	w24, 12
-	ldr	x27, [x0, #:lo12:.LANCHOR100]
+	ldr	x27, [x0, #:lo12:.LANCHOR98]
 	umull	x24, w21, w24
 	.loc 5 168 0
 	ldr	w0, [x25]
 	.loc 5 166 0
 	add	x22, x27, x24
-.LVL1788:
+.LVL1786:
 	.loc 5 168 0
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
@@ -17396,14 +17459,14 @@ FtlGcFreeTempBlock:
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1789:
+.LVL1787:
 .L1341:
 	.loc 5 169 0 is_stmt 1
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-.LVL1790:
+.LVL1788:
 	.loc 5 170 0
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
@@ -17412,29 +17475,29 @@ FtlGcFreeTempBlock:
 	.loc 5 171 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1791:
+.LVL1789:
 	mov	w24, w0
-.LVL1792:
+.LVL1790:
 	.loc 5 172 0
 	ldr	w0, [x22, 8]
-.LVL1793:
+.LVL1791:
 	mov	w2, 1
 	add	x1, x22, 4
 	bl	log2phys
-.LVL1794:
+.LVL1792:
 	.loc 5 173 0
 	mov	w0, w24
-.LVL1795:
+.LVL1793:
 .L1353:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1796:
+.LVL1794:
 .L1343:
 	.loc 5 165 0 discriminator 2
 	add	w21, w21, 1
-.LVL1797:
+.LVL1795:
 	and	w21, w21, 65535
-.LVL1798:
+.LVL1796:
 	b	.L1340
 .L1342:
 	.loc 5 175 0
@@ -17444,11 +17507,11 @@ FtlGcFreeTempBlock:
 	.loc 5 177 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	b	.L1353
-.LVL1799:
+.LVL1797:
 .L1345:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1800:
+.LVL1798:
 	b	.L1346
 	.cfi_endproc
 .LFE308:
@@ -17477,29 +17540,29 @@ FtlGcPageRecovery:
 	ldrh	w1, [x20, #:lo12:.LANCHOR19]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
-.LVL1801:
+.LVL1799:
 	.loc 5 291 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
 	bcc	.L1355
-.LBB286:
-.LBB287:
+.LBB321:
+.LBB322:
 	.loc 5 293 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1802:
+.LVL1800:
 	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1803:
+.LVL1801:
 	.loc 5 295 0
-	adrp	x0, .LANCHOR153
-	str	wzr, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR152
+	str	wzr, [x0, #:lo12:.LANCHOR152]
 .L1355:
-.LBE287:
-.LBE286:
+.LBE322:
+.LBE321:
 	.loc 5 297 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17518,52 +17581,52 @@ FtlGcPageRecovery:
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
 .LFB283:
-	.loc 2 2032 0
+	.loc 2 2081 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 2 2033 0
-	adrp	x0, .LANCHOR163
-	.loc 2 2032 0
+	.loc 2 2082 0
+	adrp	x0, .LANCHOR162
+	.loc 2 2081 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
-	.loc 2 2035 0
+	.loc 2 2084 0
 	adrp	x19, .LANCHOR51
 	add	x19, x19, :lo12:.LANCHOR51
-	.loc 2 2033 0
-	str	wzr, [x0, #:lo12:.LANCHOR163]
-	.loc 2 2035 0
+	.loc 2 2082 0
+	str	wzr, [x0, #:lo12:.LANCHOR162]
+	.loc 2 2084 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1804:
-	.loc 2 2036 0
+.LVL1802:
+	.loc 2 2085 0
 	mov	x0, x19
-	.loc 2 2037 0
+	.loc 2 2086 0
 	adrp	x19, .LANCHOR52
-	.loc 2 2036 0
+	.loc 2 2085 0
 	bl	FtlSlcSuperblockCheck
-.LVL1805:
-	.loc 2 2037 0
+.LVL1803:
+	.loc 2 2086 0
 	add	x19, x19, :lo12:.LANCHOR52
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1806:
-	.loc 2 2038 0
+.LVL1804:
+	.loc 2 2087 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1807:
-	.loc 2 2039 0
+.LVL1805:
+	.loc 2 2088 0
 	bl	FtlGcPageRecovery
-.LVL1808:
-	.loc 2 2040 0
+.LVL1806:
+	.loc 2 2089 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1809:
-	.loc 2 2042 0
+.LVL1807:
+	.loc 2 2091 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17597,18 +17660,18 @@ Ftl_gc_temp_data_write_back:
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
 	.loc 5 320 0
-	adrp	x19, .LANCHOR91
+	adrp	x19, .LANCHOR89
 	adrp	x20, .LANCHOR121
-	ldr	w1, [x19, #:lo12:.LANCHOR91]
+	ldr	w1, [x19, #:lo12:.LANCHOR89]
 	.loc 5 321 0
-	add	x19, x19, :lo12:.LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR89
 	.loc 5 320 0
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FlashProgPages
-.LVL1810:
+.LVL1808:
 	.loc 5 321 0
 	mov	w11, 0
-.LVL1811:
+.LVL1809:
 .L1361:
 	.loc 5 321 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19]
@@ -17617,7 +17680,7 @@ Ftl_gc_temp_data_write_back:
 	.loc 5 335 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FtlGcBufFree
-.LVL1812:
+.LVL1810:
 	.loc 5 336 0
 	str	wzr, [x19]
 	.loc 5 337 0
@@ -17627,9 +17690,9 @@ Ftl_gc_temp_data_write_back:
 	.loc 5 338 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1813:
+.LVL1811:
 	b	.L1367
-.LVL1814:
+.LVL1812:
 .L1364:
 	.loc 5 322 0
 	ldr	x2, [x20, #:lo12:.LANCHOR121]
@@ -17640,15 +17703,15 @@ Ftl_gc_temp_data_write_back:
 	bne	.L1362
 	.loc 5 323 0
 	adrp	x0, .LANCHOR53
-	adrp	x3, .LANCHOR43
+	adrp	x3, .LANCHOR42
 	ldrh	w4, [x0, #:lo12:.LANCHOR53]
-	ldr	x3, [x3, #:lo12:.LANCHOR43]
+	ldr	x3, [x3, #:lo12:.LANCHOR42]
 	strh	wzr, [x3, x4, lsl 1]
 	.loc 5 324 0
 	strh	w2, [x0, #:lo12:.LANCHOR53]
 	.loc 5 325 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -17656,13 +17719,13 @@ Ftl_gc_temp_data_write_back:
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1815:
+.LVL1813:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1816:
+.LVL1814:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1817:
+.LVL1815:
 .L1367:
 	.loc 5 339 0
 	mov	w0, 1
@@ -17677,25 +17740,25 @@ Ftl_gc_temp_data_write_back:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1818:
+.LVL1816:
 .L1362:
 	.cfi_restore_state
 	.loc 5 331 0 discriminator 2
 	ldr	x0, [x1, 16]
-.LVL1819:
+.LVL1817:
 	.loc 5 332 0 discriminator 2
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1820:
+.LVL1818:
 	bl	FtlGcUpdatePage
-.LVL1821:
+.LVL1819:
 	.loc 5 321 0 discriminator 2
 	add	w11, w11, 1
-.LVL1822:
+.LVL1820:
 	and	w11, w11, 65535
-.LVL1823:
+.LVL1821:
 	b	.L1361
-.LVL1824:
+.LVL1822:
 .L1365:
 	.loc 5 341 0
 	mov	w0, 0
@@ -17733,35 +17796,32 @@ Ftl_get_new_temp_ppa:
 	ldrh	w0, [x1, 4]
 	cbnz	w0, .L1370
 .L1369:
-	.loc 5 302 0 is_stmt 1
-	bl	FtlCacheWriteBack
-.LVL1825:
-	.loc 5 303 0
+	.loc 5 303 0 is_stmt 1
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1826:
+.LVL1823:
 	.loc 5 304 0
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1827:
+.LVL1824:
 	.loc 5 306 0
+	adrp	x0, .LANCHOR95
+	strh	wzr, [x0, #:lo12:.LANCHOR95]
+	.loc 5 307 0
 	adrp	x0, .LANCHOR97
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
-	.loc 5 307 0
-	adrp	x0, .LANCHOR99
-	strh	wzr, [x0, #:lo12:.LANCHOR99]
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1828:
+.LVL1825:
 	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1829:
+.LVL1826:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1830:
+.LVL1827:
 .L1370:
 	.loc 5 312 0
 	add	x0, x19, :lo12:.LANCHOR53
@@ -17774,7 +17834,7 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa 31, 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1831:
+.LVL1828:
 	.cfi_endproc
 .LFE312:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
@@ -17786,7 +17846,7 @@ rk_ftl_garbage_collect:
 .LFB319:
 	.loc 5 470 0
 	.cfi_startproc
-.LVL1832:
+.LVL1829:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
@@ -17802,7 +17862,7 @@ rk_ftl_garbage_collect:
 	stp	x19, x20, [sp, 16]
 	.loc 5 478 0
 	ldr	w1, [x22, #:lo12:.LANCHOR117]
-.LVL1833:
+.LVL1830:
 	.loc 5 470 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
@@ -17824,36 +17884,36 @@ rk_ftl_garbage_collect:
 	bls	.L1444
 	mov	w24, w0
 	.loc 5 485 0
-	adrp	x0, .LANCHOR157
-.LVL1834:
-	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR156
+.LVL1831:
+	ldrh	w1, [x0, #:lo12:.LANCHOR156]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L1374
 .L1377:
-.LVL1835:
-.LBB291:
-.LBB292:
+.LVL1832:
+.LBB326:
+.LBB327:
 	.loc 5 489 0
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR100
 	mov	w3, 65535
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	ldrh	w2, [x0, #:lo12:.LANCHOR100]
 	cmp	w2, w3
 	bne	.L1375
 .L1376:
 	.loc 5 496 0
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR84
 	.loc 5 497 0
-	adrp	x19, .LANCHOR82
+	adrp	x19, .LANCHOR80
 	mov	w20, 65535
 	.loc 5 496 0
-	ldr	w1, [x2, #:lo12:.LANCHOR86]
+	ldr	w1, [x2, #:lo12:.LANCHOR84]
 	.loc 5 497 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	.loc 5 496 0
 	add	w1, w1, 1
 	add	w1, w1, w24, lsl 7
-	str	w1, [x2, #:lo12:.LANCHOR86]
+	str	w1, [x2, #:lo12:.LANCHOR84]
 	.loc 5 497 0
 	cmp	w0, w20
 	bne	.L1378
@@ -17861,8 +17921,8 @@ rk_ftl_garbage_collect:
 	ldrh	w20, [x3, #:lo12:.LANCHOR53]
 	cmp	w20, w0
 	bne	.L1447
-	adrp	x0, .LANCHOR101
-	ldrh	w21, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR99
+	ldrh	w21, [x0, #:lo12:.LANCHOR99]
 	cmp	w21, w20
 	bne	.L1378
 	.loc 5 498 0
@@ -17874,64 +17934,64 @@ rk_ftl_garbage_collect:
 	csel	w0, w0, w3, cc
 	cmp	w1, w0
 	bls	.L1450
-.LBB293:
+.LBB328:
 	.loc 5 502 0
-	adrp	x0, .LANCHOR174
+	adrp	x0, .LANCHOR172
 	.loc 5 501 0
-	str	wzr, [x2, #:lo12:.LANCHOR86]
+	str	wzr, [x2, #:lo12:.LANCHOR84]
 	.loc 5 502 0
-	strh	wzr, [x0, #:lo12:.LANCHOR174]
+	strh	wzr, [x0, #:lo12:.LANCHOR172]
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1836:
+.LVL1833:
 	and	w20, w0, 65535
-.LVL1837:
+.LVL1834:
 	.loc 5 504 0
 	cmp	w20, w21
 	bne	.L1451
 	.loc 5 505 0
-	adrp	x5, .LANCHOR85
+	adrp	x5, .LANCHOR83
 	ldrh	w1, [x23, #:lo12:.LANCHOR48]
-	ldrh	w0, [x5, #:lo12:.LANCHOR85]
-.LVL1838:
+	ldrh	w0, [x5, #:lo12:.LANCHOR83]
+.LVL1835:
 	cmp	w1, w0
 	bcs	.L1381
 	.loc 5 506 0
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1839:
+.LVL1836:
 	and	w0, w0, 65535
-.LVL1840:
+.LVL1837:
 	.loc 5 507 0
 	cmp	w0, w20
 	beq	.L1383
 	.loc 5 508 0
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR42
 	ubfiz	x0, x0, 1, 16
-.LVL1841:
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+.LVL1838:
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
 	bhi	.L1384
 	.loc 5 509 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1842:
+.LVL1839:
 	and	w21, w0, 65535
-.LVL1843:
+.LVL1840:
 	.loc 5 510 0
 	mov	w0, 128
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR83]
 	.loc 5 520 0
 	cmp	w21, w20
 	bne	.L1380
-.LVL1844:
+.LVL1841:
 .L1383:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1845:
+.LVL1842:
 .L1378:
-.LBE293:
+.LBE328:
 	.loc 5 527 0
 	cmp	w24, 0
 	mov	w0, 65535
@@ -17951,12 +18011,12 @@ rk_ftl_garbage_collect:
 	bls	.L1388
 	.loc 5 531 0
 	lsr	w21, w21, 5
-.LVL1846:
+.LVL1843:
 .L1387:
 	.loc 5 539 0
-	adrp	x2, .LANCHOR84
+	adrp	x2, .LANCHOR82
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR84]
+	ldrh	w1, [x2, #:lo12:.LANCHOR82]
 	cmp	w1, w0
 	bcs	.L1391
 	.loc 5 540 0
@@ -17965,37 +18025,37 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
 	bne	.L1392
-	adrp	x1, .LANCHOR101
-	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	cmp	w1, w0
 	bne	.L1392
 	.loc 5 542 0
-	adrp	x0, .LANCHOR174
-	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
 	cbnz	w0, .L1393
-	adrp	x1, .LANCHOR62
-	adrp	x4, .LANCHOR60
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	ldr	w4, [x4, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR61
+	adrp	x4, .LANCHOR59
+	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	ldr	w4, [x4, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
 	bcs	.L1394
 .L1393:
 	.loc 5 543 0
-	adrp	x1, .LANCHOR80
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR78
+	ldrh	w1, [x1, #:lo12:.LANCHOR78]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR84]
+	strh	w1, [x3, #:lo12:.LANCHOR82]
 .L1395:
 	.loc 5 546 0
-	adrp	x1, .LANCHOR89
-	str	wzr, [x1, #:lo12:.LANCHOR89]
-.LVL1847:
+	adrp	x1, .LANCHOR87
+	str	wzr, [x1, #:lo12:.LANCHOR87]
+.LVL1844:
 .L1372:
-.LBE292:
-.LBE291:
-	.loc 5 758 0
+.LBE327:
+.LBE326:
+	.loc 5 754 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18017,7 +18077,7 @@ rk_ftl_garbage_collect:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1848:
+.LVL1845:
 .L1374:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
@@ -18028,183 +18088,183 @@ rk_ftl_garbage_collect:
 	.loc 5 486 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1849:
+.LVL1846:
 	cbz	w0, .L1377
 	.loc 5 487 0
 	mov	w0, 1
 	b	.L1372
-.LVL1850:
+.LVL1847:
 .L1375:
-.LBB296:
-.LBB295:
+.LBB331:
+.LBB330:
 	.loc 5 489 0
-	adrp	x1, .LANCHOR101
-	ldrh	w4, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR99
+	ldrh	w4, [x1, #:lo12:.LANCHOR99]
 	cmp	w4, w3
 	bne	.L1376
 	.loc 5 490 0
-	strh	w2, [x1, #:lo12:.LANCHOR101]
+	strh	w2, [x1, #:lo12:.LANCHOR99]
 	.loc 5 491 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR102]
+	strh	w1, [x0, #:lo12:.LANCHOR100]
 	b	.L1376
-.LVL1851:
+.LVL1848:
 .L1384:
-.LBB294:
+.LBB329:
 	.loc 5 512 0
 	mov	w0, 64
 .L1476:
 	.loc 5 516 0
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR83]
 	b	.L1383
 .L1381:
 	mov	w0, 80
 	b	.L1476
-.LVL1852:
+.LVL1849:
 .L1451:
 	.loc 5 504 0
 	mov	w21, w20
-.LVL1853:
+.LVL1850:
 .L1380:
 	.loc 5 521 0
-	adrp	x1, .LANCHOR40
+	adrp	x1, .LANCHOR43
 	ubfiz	x0, x21, 1, 32
-	adrp	x3, .LANCHOR84
+	adrp	x3, .LANCHOR82
 	mov	w20, w21
-	ldr	x2, [x1, #:lo12:.LANCHOR40]
-	adrp	x1, .LANCHOR43
-	ldrh	w5, [x3, #:lo12:.LANCHOR84]
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR42
+	ldrh	w5, [x3, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w4, [x2, x0]
 	ldrh	w2, [x23, #:lo12:.LANCHOR48]
 	ldrh	w3, [x1, x0]
 	mov	w1, w21
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.LVL1854:
+.LVL1851:
 	b	.L1383
-.LVL1855:
+.LVL1852:
 .L1447:
-.LBE294:
+.LBE329:
 	.loc 5 473 0
 	mov	w20, w0
 	b	.L1378
 .L1450:
 	mov	w20, w21
 	b	.L1378
-.LVL1856:
+.LVL1853:
 .L1388:
 	.loc 5 532 0
 	cmp	w0, 12
 	bls	.L1389
 	.loc 5 533 0
 	lsr	w21, w21, 4
-.LVL1857:
+.LVL1854:
 	b	.L1387
-.LVL1858:
+.LVL1855:
 .L1389:
 	.loc 5 534 0
 	cmp	w0, 8
 	bls	.L1387
 	.loc 5 535 0
 	lsr	w21, w21, 2
-.LVL1859:
+.LVL1856:
 	b	.L1387
-.LVL1860:
+.LVL1857:
 .L1452:
 	.loc 5 529 0
 	mov	w21, 1
 	b	.L1387
-.LVL1861:
+.LVL1858:
 .L1394:
 	.loc 5 545 0
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR84]
+	strh	w1, [x2, #:lo12:.LANCHOR82]
 	b	.L1395
 .L1392:
 	.loc 5 549 0
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR78
+	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR84]
+	strh	w0, [x3, #:lo12:.LANCHOR82]
 .L1391:
 	.loc 5 551 0
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cbz	w0, .L1453
 	.loc 5 552 0
 	add	w21, w21, 32
-.LVL1862:
+.LVL1859:
 	and	w21, w21, 65535
-.LVL1863:
+.LVL1860:
 .L1453:
 	.loc 5 551 0
 	mov	w20, 65535
-.LVL1864:
+.LVL1861:
 .L1397:
-	.loc 5 597 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 595 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 65535
 	cmp	w0, w1
 	bne	.L1406
-	.loc 5 598 0
+	.loc 5 596 0
 	cmp	w20, w0
 	beq	.L1407
-	.loc 5 599 0
-	strh	w20, [x19, #:lo12:.LANCHOR82]
-.LVL1865:
+	.loc 5 597 0
+	strh	w20, [x19, #:lo12:.LANCHOR80]
+.LVL1862:
 .L1408:
-	.loc 5 610 0
-	add	x0, x19, :lo12:.LANCHOR82
-	.loc 5 611 0
+	.loc 5 606 0
+	add	x0, x19, :lo12:.LANCHOR80
+	.loc 5 607 0
 	mov	w1, 65535
-	.loc 5 610 0
+	.loc 5 606 0
 	strb	wzr, [x0, 8]
-	.loc 5 611 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 607 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w1
 	beq	.L1406
-	.loc 5 612 0
+	.loc 5 608 0
 	bl	IsBlkInGcList
-.LVL1866:
+.LVL1863:
 	cbz	w0, .L1411
-	.loc 5 613 0
+	.loc 5 609 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
+	strh	w0, [x19, #:lo12:.LANCHOR80]
 .L1411:
-	.loc 5 615 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 611 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
-	add	x23, x19, :lo12:.LANCHOR82
+	add	x23, x19, :lo12:.LANCHOR80
 	cmp	w1, w0
 	beq	.L1406
-	.loc 5 616 0
+	.loc 5 612 0
 	mov	x0, x23
 	bl	make_superblock
-.LVL1867:
-	.loc 5 619 0
-	adrp	x0, .LANCHOR175
-	.loc 5 620 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
-	.loc 5 617 0
+.LVL1864:
+	.loc 5 615 0
+	adrp	x0, .LANCHOR173
+	.loc 5 616 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	.loc 5 613 0
 	strh	wzr, [x23, 2]
-	.loc 5 619 0
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	.loc 5 620 0
-	adrp	x0, .LANCHOR43
-	.loc 5 618 0
+	.loc 5 615 0
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	.loc 5 616 0
+	adrp	x0, .LANCHOR42
+	.loc 5 614 0
 	strb	wzr, [x23, 6]
-	.loc 5 620 0
-	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	.loc 5 616 0
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR176
-	strh	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR174
+	strh	w1, [x0, #:lo12:.LANCHOR174]
 .L1406:
-	.loc 5 625 0
+	.loc 5 621 0
 	adrp	x0, .LANCHOR51
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	cmp	w2, w1
@@ -18214,132 +18274,132 @@ rk_ftl_garbage_collect:
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w1
 	beq	.L1412
-	.loc 5 635 0
-	adrp	x24, .LANCHOR87
-.LVL1868:
-	.loc 5 657 0
-	add	x0, x24, :lo12:.LANCHOR87
+	.loc 5 631 0
+	adrp	x24, .LANCHOR85
+.LVL1865:
+	.loc 5 653 0
+	add	x0, x24, :lo12:.LANCHOR85
 	str	x0, [x29, 160]
 .L1413:
-	.loc 5 631 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 627 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	mov	w0, 65535
 	cmp	w1, w0
 	bne	.L1414
-	.loc 5 632 0
-	adrp	x0, .LANCHOR89
-	.loc 5 645 0
+	.loc 5 628 0
+	adrp	x0, .LANCHOR87
+	.loc 5 641 0
 	adrp	x25, .LANCHOR19
 	add	x25, x25, :lo12:.LANCHOR19
-	.loc 5 632 0
-	str	wzr, [x0, #:lo12:.LANCHOR89]
+	.loc 5 628 0
+	str	wzr, [x0, #:lo12:.LANCHOR87]
 .L1415:
-	.loc 5 635 0
-	ldrh	w5, [x24, #:lo12:.LANCHOR87]
-	add	x7, x24, :lo12:.LANCHOR87
+	.loc 5 631 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR85]
+	add	x7, x24, :lo12:.LANCHOR85
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1869:
+.LVL1866:
 	and	w6, w0, 65535
-	strh	w6, [x19, #:lo12:.LANCHOR82]
-	.loc 5 636 0
+	strh	w6, [x19, #:lo12:.LANCHOR80]
+	.loc 5 632 0
 	mov	w0, 65535
 	cmp	w6, w0
 	bne	.L1416
-	.loc 5 637 0
+	.loc 5 633 0
 	strh	wzr, [x7]
-	.loc 5 638 0
+	.loc 5 634 0
 	mov	w0, 8
 	b	.L1372
-.LVL1870:
+.LVL1867:
 .L1386:
 	.loc 5 557 0
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
 	bne	.L1456
-	adrp	x0, .LANCHOR101
-	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR99
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	cmp	w0, w1
 	bne	.L1456
 	cmp	w20, w0
 	bne	.L1456
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	cmp	w0, w20
 	beq	.L1398
-.LVL1871:
+.LVL1868:
 .L1456:
 	.loc 5 556 0
 	mov	w21, 1
 	b	.L1397
-.LVL1872:
+.LVL1869:
 .L1398:
 	.loc 5 558 0
-	adrp	x0, .LANCHOR89
+	adrp	x0, .LANCHOR87
 	.loc 5 560 0
 	adrp	x21, .LANCHOR48
-	adrp	x23, .LANCHOR174
+	adrp	x23, .LANCHOR172
 	.loc 5 558 0
-	str	wzr, [x0, #:lo12:.LANCHOR89]
+	str	wzr, [x0, #:lo12:.LANCHOR87]
 	.loc 5 560 0
-	adrp	x0, .LANCHOR84
+	adrp	x0, .LANCHOR82
 	ldrh	w6, [x21, #:lo12:.LANCHOR48]
 	mov	x2, x0
-	ldrh	w1, [x0, #:lo12:.LANCHOR84]
+	ldrh	w1, [x0, #:lo12:.LANCHOR82]
 	cmp	w1, w6
 	.loc 5 561 0
-	ldrh	w1, [x23, #:lo12:.LANCHOR174]
+	ldrh	w1, [x23, #:lo12:.LANCHOR172]
 	.loc 5 560 0
 	bcs	.L1399
 	.loc 5 561 0
 	cbnz	w1, .L1400
-	adrp	x1, .LANCHOR62
-	adrp	x3, .LANCHOR60
-	ldr	w1, [x1, #:lo12:.LANCHOR62]
-	ldr	w3, [x3, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR61
+	adrp	x3, .LANCHOR59
+	ldr	w1, [x1, #:lo12:.LANCHOR61]
+	ldr	w3, [x3, #:lo12:.LANCHOR59]
 	add	w1, w1, w1, lsl 1
 	cmp	w3, w1, lsr 2
 	bcs	.L1401
 .L1400:
 	.loc 5 562 0
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR78
+	ldrh	w0, [x0, #:lo12:.LANCHOR78]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR84]
-.LVL1873:
+	strh	w0, [x2, #:lo12:.LANCHOR82]
+.LVL1870:
 .L1477:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1874:
+.LVL1871:
 	.loc 5 579 0
-	ldrh	w0, [x23, #:lo12:.LANCHOR174]
+	ldrh	w0, [x23, #:lo12:.LANCHOR172]
 	b	.L1372
-.LVL1875:
+.LVL1872:
 .L1401:
 	.loc 5 564 0
 	mov	w1, 18
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	b	.L1477
 .L1399:
 	.loc 5 572 0
 	cbnz	w1, .L1456
 	.loc 5 573 0
-	adrp	x1, .LANCHOR80
-	ldrh	w5, [x1, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR78
+	ldrh	w5, [x1, #:lo12:.LANCHOR78]
 	add	w1, w5, w5, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x0, #:lo12:.LANCHOR84]
+	strh	w1, [x0, #:lo12:.LANCHOR82]
 	.loc 5 574 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1876:
+.LVL1873:
 	.loc 5 575 0
 	ubfiz	x0, x0, 1, 16
-.LVL1877:
-	adrp	x1, .LANCHOR43
+.LVL1874:
+	adrp	x1, .LANCHOR42
 	adrp	x2, .LANCHOR3
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	ldrh	w2, [x2, #:lo12:.LANCHOR3]
 	ldrh	w1, [x1, x0]
 	adrp	x0, .LANCHOR20
@@ -18358,111 +18418,111 @@ rk_ftl_garbage_collect:
 	.loc 5 585 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1878:
+.LVL1875:
 	.loc 5 586 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
 	b	.L1372
-.LVL1879:
+.LVL1876:
 .L1407:
-	.loc 5 600 0
-	adrp	x0, .LANCHOR101
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	.loc 5 598 0
+	adrp	x0, .LANCHOR99
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	cmp	w1, w20
 	beq	.L1408
-	.loc 5 604 0
-	adrp	x2, .LANCHOR43
+	.loc 5 600 0
+	adrp	x2, .LANCHOR42
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldr	x2, [x2, #:lo12:.LANCHOR42]
 	ldrh	w1, [x2, x1]
 	cbnz	w1, .L1409
-	.loc 5 605 0
+	.loc 5 601 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR101]
+	strh	w1, [x0, #:lo12:.LANCHOR99]
 .L1409:
-	.loc 5 606 0
-	ldrh	w1, [x0, #:lo12:.LANCHOR101]
-	strh	w1, [x19, #:lo12:.LANCHOR82]
-	.loc 5 607 0
+	.loc 5 602 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	strh	w1, [x19, #:lo12:.LANCHOR80]
+	.loc 5 603 0
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR101]
+	strh	w1, [x0, #:lo12:.LANCHOR99]
 	b	.L1408
-.LVL1880:
+.LVL1877:
 .L1412:
-	.loc 5 626 0
+	.loc 5 622 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
-.LVL1881:
+	strh	w0, [x19, #:lo12:.LANCHOR80]
+.LVL1878:
 .L1478:
-	.loc 5 734 0
-	adrp	x0, .LANCHOR174
-	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	.loc 5 730 0
+	adrp	x0, .LANCHOR172
+	ldrh	w0, [x0, #:lo12:.LANCHOR172]
 	b	.L1372
-.LVL1882:
+.LVL1879:
 .L1416:
-	.loc 5 640 0
+	.loc 5 636 0
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1883:
+.LVL1880:
 	add	w5, w5, 1
 	cbz	w0, .L1417
-	.loc 5 641 0
-	strh	w5, [x24, #:lo12:.LANCHOR87]
+	.loc 5 637 0
+	strh	w5, [x24, #:lo12:.LANCHOR85]
 	b	.L1415
 .L1417:
-	.loc 5 645 0
-	adrp	x23, .LANCHOR43
+	.loc 5 641 0
+	adrp	x23, .LANCHOR42
 	adrp	x4, .LANCHOR3
 	ldrh	w0, [x25]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x23, #:lo12:.LANCHOR43]
-	.loc 5 644 0
+	ldr	x2, [x23, #:lo12:.LANCHOR42]
+	.loc 5 640 0
 	and	w5, w5, 65535
-	.loc 5 645 0
+	.loc 5 641 0
 	ldrh	w4, [x4, #:lo12:.LANCHOR3]
-	.loc 5 644 0
-	strh	w5, [x24, #:lo12:.LANCHOR87]
-	.loc 5 645 0
+	.loc 5 640 0
+	strh	w5, [x24, #:lo12:.LANCHOR85]
+	.loc 5 641 0
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
 	bgt	.L1419
-	.loc 5 646 0
+	.loc 5 642 0
 	cmp	w5, 48
 	bls	.L1420
 	cmp	w3, 8
 	bls	.L1420
-	adrp	x3, .LANCHOR97
-	ldrh	w3, [x3, #:lo12:.LANCHOR97]
+	adrp	x3, .LANCHOR95
+	ldrh	w3, [x3, #:lo12:.LANCHOR95]
 	cmp	w3, 35
 	bhi	.L1420
 .L1419:
-	.loc 5 647 0
+	.loc 5 643 0
 	ldr	x3, [x29, 160]
 	strh	wzr, [x3]
 .L1420:
-	.loc 5 649 0
+	.loc 5 645 0
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
 	bgt	.L1421
 	mov	w0, 65535
 	cmp	w20, w0
 	bne	.L1421
-	.loc 5 650 0
+	.loc 5 646 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
-	.loc 5 651 0
-	adrp	x0, .LANCHOR87
-	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	strh	w0, [x19, #:lo12:.LANCHOR80]
+	.loc 5 647 0
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	b	.L1478
 .L1421:
-	.loc 5 655 0
+	.loc 5 651 0
 	cbnz	w1, .L1422
-	.loc 5 656 0
+	.loc 5 652 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1884:
-	.loc 5 657 0
+.LVL1881:
+	.loc 5 653 0
 	ldr	x0, [x29, 160]
 	ldr	x1, [x29, 160]
 	ldrh	w0, [x0]
@@ -18470,296 +18530,296 @@ rk_ftl_garbage_collect:
 	strh	w0, [x1]
 	b	.L1415
 .L1422:
-	.loc 5 660 0
-	add	x0, x19, :lo12:.LANCHOR82
+	.loc 5 656 0
+	add	x0, x19, :lo12:.LANCHOR80
 	strb	wzr, [x0, 8]
-	.loc 5 662 0
+	.loc 5 658 0
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
 	bne	.L1423
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 662
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 658
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1885:
+.LVL1882:
 .L1423:
-	.loc 5 663 0
+	.loc 5 659 0
 	ldr	x0, [x29, 128]
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
 	bne	.L1424
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 663
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 659
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1886:
+.LVL1883:
 .L1424:
-	.loc 5 664 0
+	.loc 5 660 0
 	adrp	x0, .LANCHOR53
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
 	bne	.L1425
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	mov	w2, 664
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 660
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1887:
+.LVL1884:
 .L1425:
-	.loc 5 665 0
-	add	x25, x19, :lo12:.LANCHOR82
+	.loc 5 661 0
+	add	x25, x19, :lo12:.LANCHOR80
 	mov	x0, x25
 	bl	make_superblock
-.LVL1888:
-	.loc 5 666 0
-	adrp	x0, .LANCHOR175
-	.loc 5 667 0
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
-	.loc 5 666 0
-	strh	wzr, [x0, #:lo12:.LANCHOR175]
-	.loc 5 667 0
-	ldr	x0, [x23, #:lo12:.LANCHOR43]
+.LVL1885:
+	.loc 5 662 0
+	adrp	x0, .LANCHOR173
+	.loc 5 663 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR80]
+	.loc 5 662 0
+	strh	wzr, [x0, #:lo12:.LANCHOR173]
+	.loc 5 663 0
+	ldr	x0, [x23, #:lo12:.LANCHOR42]
 	ldrh	w1, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR176
-	.loc 5 668 0
+	adrp	x0, .LANCHOR174
+	.loc 5 664 0
 	strh	wzr, [x25, 2]
-	.loc 5 667 0
-	strh	w1, [x0, #:lo12:.LANCHOR176]
-	.loc 5 669 0
+	.loc 5 663 0
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+	.loc 5 665 0
 	strb	wzr, [x25, 6]
 .L1414:
-	.loc 5 675 0
+	.loc 5 671 0
 	bl	FtlReadRefresh
-.LVL1889:
-	.loc 5 679 0
+.LVL1886:
+	.loc 5 675 0
 	adrp	x1, .LANCHOR19
-	.loc 5 678 0
+	.loc 5 674 0
 	mov	w0, 1
 	str	w0, [x22, #:lo12:.LANCHOR117]
-	.loc 5 679 0
+	.loc 5 675 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	str	w0, [x29, 172]
-.LVL1890:
-	.loc 5 680 0
-	add	x0, x19, :lo12:.LANCHOR82
+.LVL1887:
+	.loc 5 676 0
+	add	x0, x19, :lo12:.LANCHOR80
 	str	x1, [x29, 120]
 	ldr	w3, [x29, 172]
 	ldrh	w0, [x0, 2]
 	add	w2, w0, w21
 	cmp	w2, w3
 	ble	.L1426
-	.loc 5 681 0
+	.loc 5 677 0
 	sub	w21, w3, w0
-.LVL1891:
+.LVL1888:
 	and	w21, w21, 65535
-.LVL1892:
+.LVL1889:
 .L1426:
-	.loc 5 704 0
-	adrp	x0, .LANCHOR175
-	.loc 5 693 0
+	.loc 5 700 0
+	adrp	x0, .LANCHOR173
+	.loc 5 689 0
 	mov	w27, 0
-	.loc 5 704 0
-	add	x0, x0, :lo12:.LANCHOR175
+	.loc 5 700 0
+	add	x0, x0, :lo12:.LANCHOR173
 	str	x0, [x29, 152]
-.LVL1893:
+.LVL1890:
 .L1427:
-	.loc 5 683 0
+	.loc 5 679 0
 	cmp	w21, w27, uxth
 	bls	.L1435
-	.loc 5 688 0
-	add	x1, x19, :lo12:.LANCHOR82
-	.loc 5 685 0
+	.loc 5 684 0
+	add	x1, x19, :lo12:.LANCHOR80
+	.loc 5 681 0
 	adrp	x0, .LANCHOR3
-	.loc 5 688 0
-	adrp	x25, .LANCHOR95
+	.loc 5 684 0
+	adrp	x25, .LANCHOR93
 	add	x1, x1, 16
-	.loc 5 685 0
+	.loc 5 681 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR3]
-	.loc 5 688 0
+	.loc 5 684 0
 	mov	w23, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
-	.loc 5 687 0
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
+	.loc 5 683 0
 	mov	w6, 65535
-	.loc 5 688 0
+	.loc 5 684 0
 	add	w4, w4, w27
 	b	.L1436
-.LVL1894:
+.LVL1891:
 .L1429:
-	.loc 5 686 0
+	.loc 5 682 0
 	ldrh	w3, [x1]
-.LVL1895:
-	.loc 5 687 0
+.LVL1892:
+	.loc 5 683 0
 	cmp	w3, w6
 	beq	.L1428
-	.loc 5 688 0
+	.loc 5 684 0
 	ubfiz	x5, x23, 5, 16
-	.loc 5 689 0
+	.loc 5 685 0
 	add	w23, w23, 1
-.LVL1896:
-	.loc 5 688 0
+.LVL1893:
+	.loc 5 684 0
 	add	x5, x0, x5
-	.loc 5 689 0
+	.loc 5 685 0
 	and	w23, w23, 65535
-.LVL1897:
-	.loc 5 688 0
+.LVL1894:
+	.loc 5 684 0
 	orr	w3, w4, w3, lsl 10
-.LVL1898:
+.LVL1895:
 	str	w3, [x5, 4]
 .L1428:
-	.loc 5 685 0
+	.loc 5 681 0
 	add	w2, w2, 1
-.LVL1899:
+.LVL1896:
 	add	x1, x1, 2
-.LVL1900:
+.LVL1897:
 	and	w2, w2, 65535
-.LVL1901:
+.LVL1898:
 .L1436:
 	cmp	w2, w7
 	bne	.L1429
-	.loc 5 693 0
-	add	x1, x19, :lo12:.LANCHOR82
-	.loc 5 705 0
-	adrp	x26, .LANCHOR91
-	add	x26, x26, :lo12:.LANCHOR91
-	.loc 5 693 0
+	.loc 5 689 0
+	add	x1, x19, :lo12:.LANCHOR80
+	.loc 5 701 0
+	adrp	x26, .LANCHOR89
+	add	x26, x26, :lo12:.LANCHOR89
+	.loc 5 689 0
 	ldrb	w2, [x1, 8]
-.LVL1902:
+.LVL1899:
 	mov	w1, w23
 	bl	FlashReadPages
-.LVL1903:
+.LVL1900:
 	ubfiz	x0, x23, 5, 16
 	mov	x23, 0
-.LVL1904:
+.LVL1901:
 	str	x0, [x29, 144]
-.LVL1905:
+.LVL1902:
 .L1430:
-	.loc 5 695 0
+	.loc 5 691 0
 	ldr	x0, [x29, 144]
 	cmp	x0, x23
 	bne	.L1434
-.LVL1906:
+.LVL1903:
 	add	w27, w27, 1
-.LVL1907:
+.LVL1904:
 	b	.L1427
-.LVL1908:
+.LVL1905:
 .L1434:
-	.loc 5 696 0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	.loc 5 692 0
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x1, x0, x23
-.LVL1909:
-	.loc 5 697 0
+.LVL1906:
+	.loc 5 693 0
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
 	beq	.L1431
-	.loc 5 696 0
+	.loc 5 692 0
 	ldr	x28, [x1, 16]
-	.loc 5 697 0
+	.loc 5 693 0
 	mov	w0, 61589
 	ldrh	w1, [x28]
-.LVL1910:
+.LVL1907:
 	cmp	w1, w0
 	bne	.L1431
-	.loc 5 699 0
+	.loc 5 695 0
 	ldr	w4, [x28, 8]
-.LVL1911:
-	.loc 5 700 0
+.LVL1908:
+	.loc 5 696 0
 	cmn	w4, #1
 	bne	.L1432
 	str	w4, [x29, 112]
-	mov	w2, 700
-	adrp	x1, .LANCHOR177
+	mov	w2, 696
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1912:
+.LVL1909:
 	ldr	w4, [x29, 112]
-.LVL1913:
+.LVL1910:
 .L1432:
-	.loc 5 701 0
+	.loc 5 697 0
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-.LVL1914:
-	.loc 5 702 0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
+.LVL1911:
+	.loc 5 698 0
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x23
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
 	bne	.L1431
-	.loc 5 704 0
+	.loc 5 700 0
 	ldr	x1, [x29, 152]
-	.loc 5 705 0
+	.loc 5 701 0
 	adrp	x4, .LANCHOR121
-	.loc 5 704 0
+	.loc 5 700 0
 	ldr	x2, [x29, 152]
-	.loc 5 705 0
+	.loc 5 701 0
 	ldr	w0, [x0, 24]
-	.loc 5 704 0
+	.loc 5 700 0
 	ldrh	w1, [x1]
 	add	w1, w1, 1
 	strh	w1, [x2]
-	.loc 5 705 0
+	.loc 5 701 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
 	ldr	w1, [x26]
 	add	x1, x2, x1, lsl 5
 	stp	x4, x1, [x29, 104]
 	str	w0, [x1, 24]
-	.loc 5 706 0
+	.loc 5 702 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1915:
+.LVL1912:
 	ldp	x4, x1, [x29, 104]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
-	.loc 5 706 0
+	.loc 5 702 0
 	str	w0, [x1, 4]
-	.loc 5 707 0
+	.loc 5 703 0
 	ldr	w1, [x26]
 	ubfiz	x0, x1, 5, 32
-	.loc 5 715 0
+	.loc 5 711 0
 	add	w1, w1, 1
-	.loc 5 707 0
+	.loc 5 703 0
 	add	x2, x2, x0
-	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	ldr	x0, [x25, #:lo12:.LANCHOR93]
 	add	x0, x0, x23
 	ldr	x4, [x0, 8]
 	str	x4, [x2, 8]
-	.loc 5 708 0
+	.loc 5 704 0
 	ldr	x4, [x0, 16]
 	str	x4, [x2, 16]
-	.loc 5 709 0
+	.loc 5 705 0
 	ldr	w2, [x29, 188]
 	str	w2, [x28, 12]
-	.loc 5 710 0
+	.loc 5 706 0
 	adrp	x2, .LANCHOR53
 	add	x11, x2, :lo12:.LANCHOR53
 	ldrh	w2, [x2, #:lo12:.LANCHOR53]
 	strh	w2, [x28, 2]
-	.loc 5 713 0
-	adrp	x2, .LANCHOR72
-	.loc 5 715 0
+	.loc 5 709 0
+	adrp	x2, .LANCHOR71
+	.loc 5 711 0
 	str	w1, [x26]
-	.loc 5 716 0
+	.loc 5 712 0
 	mov	w1, 1
-	.loc 5 713 0
-	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	.loc 5 709 0
+	ldr	w2, [x2, #:lo12:.LANCHOR71]
 	str	w2, [x28, 4]
-	.loc 5 716 0
+	.loc 5 712 0
 	bl	FtlGcBufAlloc
-.LVL1916:
-	.loc 5 717 0
+.LVL1913:
+	.loc 5 713 0
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x26]
 	cmp	w1, w0
@@ -18767,108 +18827,105 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x11, 4]
 	cbnz	w0, .L1431
 .L1433:
-	.loc 5 718 0
+	.loc 5 714 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1917:
+.LVL1914:
 	cbz	w0, .L1431
-.LVL1918:
+.LVL1915:
 .L1479:
-	.loc 5 733 0
+	.loc 5 729 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
 	b	.L1478
-.LVL1919:
+.LVL1916:
 .L1431:
 	add	x23, x23, 32
 	b	.L1430
 .L1435:
-	.loc 5 727 0
-	add	x1, x19, :lo12:.LANCHOR82
+	.loc 5 723 0
+	add	x1, x19, :lo12:.LANCHOR80
 	ldrh	w0, [x1, 2]
 	add	w21, w21, w0
-.LVL1920:
-	.loc 5 729 0
+.LVL1917:
+	.loc 5 725 0
 	ldr	w0, [x29, 172]
-	.loc 5 727 0
+	.loc 5 723 0
 	and	w21, w21, 65535
 	strh	w21, [x1, 2]
-	.loc 5 729 0
+	.loc 5 725 0
 	cmp	w0, w21
 	bls	.L1437
-	adrp	x0, .LANCHOR175
-	ldrh	w1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR176
-	ldrh	w0, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR173
+	ldrh	w1, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LANCHOR174
+	ldrh	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w1, w0
 	bne	.L1438
 .L1437:
-	.loc 5 731 0
-	adrp	x0, .LANCHOR91
-	ldr	w0, [x0, #:lo12:.LANCHOR91]
+	.loc 5 727 0
+	adrp	x0, .LANCHOR89
+	ldr	w0, [x0, #:lo12:.LANCHOR89]
 	cbz	w0, .L1439
-	.loc 5 732 0
+	.loc 5 728 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1921:
+.LVL1918:
 	cbnz	w0, .L1479
 .L1439:
-	.loc 5 737 0
-	adrp	x0, .LANCHOR175
-	ldrh	w0, [x0, #:lo12:.LANCHOR175]
+	.loc 5 733 0
+	adrp	x0, .LANCHOR173
+	ldrh	w0, [x0, #:lo12:.LANCHOR173]
 	cbnz	w0, .L1440
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
-	adrp	x1, .LANCHOR43
-	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
+	adrp	x1, .LANCHOR42
+	ldr	x1, [x1, #:lo12:.LANCHOR42]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	cbz	w2, .L1440
-	.loc 5 739 0
+	.loc 5 735 0
 	strh	wzr, [x1, x0]
-	.loc 5 740 0
-	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 736 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR80]
 	bl	update_vpc_list
-.LVL1922:
-	.loc 5 741 0
-	bl	FtlCacheWriteBack
-.LVL1923:
-	.loc 5 742 0
+.LVL1919:
+	.loc 5 738 0
 	bl	l2p_flush
-.LVL1924:
-	.loc 5 743 0
+.LVL1920:
+	.loc 5 739 0
 	bl	FtlVpcTblFlush
-.LVL1925:
+.LVL1921:
 .L1440:
-	.loc 5 745 0
+	.loc 5 741 0
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR82]
+	strh	w0, [x19, #:lo12:.LANCHOR80]
 .L1438:
-	.loc 5 747 0
+	.loc 5 743 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
 	bhi	.L1441
-	.loc 5 749 0
+	.loc 5 745 0
 	ldr	x0, [x29, 120]
 	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-.LVL1926:
+.LVL1922:
 	b	.L1413
-.LVL1927:
+.LVL1923:
 .L1441:
-	.loc 5 754 0
-	adrp	x1, .LANCHOR174
-	.loc 5 752 0
+	.loc 5 750 0
+	adrp	x1, .LANCHOR172
+	.loc 5 748 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	.loc 5 754 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR174]
-	.loc 5 755 0
+	.loc 5 750 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	.loc 5 751 0
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
 	b	.L1372
-.LVL1928:
+.LVL1924:
 .L1444:
-.LBE295:
-.LBE296:
+.LBE330:
+.LBE331:
 	.loc 5 479 0
 	mov	w0, 0
-.LVL1929:
+.LVL1925:
 	b	.L1372
 	.cfi_endproc
 .LFE319:
@@ -18879,13 +18936,13 @@ rk_ftl_garbage_collect:
 	.type	sftl_gc, %function
 sftl_gc:
 .LFB320:
-	.loc 5 761 0
+	.loc 5 757 0
 	.cfi_startproc
-	.loc 5 762 0
+	.loc 5 758 0
 	mov	w1, 1
 	mov	w0, w1
 	b	rk_ftl_garbage_collect
-.LVL1930:
+.LVL1926:
 	.cfi_endproc
 .LFE320:
 	.size	sftl_gc, .-sftl_gc
@@ -18897,7 +18954,7 @@ FtlRead:
 .LFB214:
 	.loc 3 814 0
 	.cfi_startproc
-.LVL1931:
+.LVL1927:
 	stp	x29, x30, [sp, -176]!
 	.cfi_def_cfa_offset 176
 	.cfi_offset 29, -176
@@ -18930,26 +18987,26 @@ FtlRead:
 	bne	.L1482
 	.loc 3 825 0
 	mov	x2, x3
-.LVL1932:
+.LVL1928:
 	mov	w1, w27
-.LVL1933:
+.LVL1929:
 	add	w0, w19, 256
-.LVL1934:
+.LVL1930:
 	bl	FtlVendorPartRead
-.LVL1935:
+.LVL1931:
 	mov	w21, w0
-.LVL1936:
+.LVL1932:
 .L1481:
 	.loc 3 901 0
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1937:
+.LVL1933:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1938:
+.LVL1934:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1939:
+.LVL1935:
 	ldp	x29, x30, [sp], 176
 	.cfi_remember_state
 	.cfi_restore 30
@@ -18966,7 +19023,7 @@ FtlRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1940:
+.LVL1936:
 .L1482:
 	.cfi_restore_state
 	.loc 3 830 0
@@ -18974,30 +19031,25 @@ FtlRead:
 	str	w0, [x29, 140]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
-.LVL1941:
+.LVL1937:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
 	bhi	.L1502
 	.loc 3 830 0 is_stmt 0 discriminator 1
-	adrp	x0, .LANCHOR88
-	ldr	w21, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR86
+	ldr	w21, [x0, #:lo12:.LANCHOR86]
 	cmn	w21, #1
 	beq	.L1481
 	.loc 3 835 0 is_stmt 1
 	adrp	x22, .LANCHOR12
-	.loc 3 833 0
-	bl	FtlCacheWriteBack
-.LVL1942:
 	.loc 3 836 0
-	add	w1, w19, w27
+	sub	w24, w1, #1
+	.loc 3 841 0
+	adrp	x1, .LANCHOR62
 	.loc 3 840 0
 	mov	w25, 0
 	.loc 3 835 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
-	.loc 3 836 0
-	sub	w24, w1, #1
-	.loc 3 841 0
-	adrp	x1, .LANCHOR63
 	.loc 3 815 0
 	mov	w21, 0
 	.loc 3 851 0
@@ -19006,35 +19058,36 @@ FtlRead:
 	stp	wzr, wzr, [x29, 144]
 	.loc 3 835 0
 	udiv	w26, w19, w0
-.LVL1943:
+.LVL1938:
 	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1944:
+.LVL1939:
 	.loc 3 835 0
 	mov	w20, w26
 	.loc 3 837 0
 	sub	w0, w24, w26
 	add	w0, w0, 1
 	stp	wzr, w0, [x29, 152]
-.LVL1945:
+.LVL1940:
 	.loc 3 841 0
-	ldr	w0, [x1, #:lo12:.LANCHOR63]
-.LVL1946:
+	ldr	w0, [x1, #:lo12:.LANCHOR62]
+.LVL1941:
 	ldr	w2, [x29, 156]
+.LVL1942:
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR63]
+	str	w0, [x1, #:lo12:.LANCHOR62]
 	.loc 3 886 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	str	x0, [x29, 128]
-.LVL1947:
+.LVL1943:
 .L1484:
 	.loc 3 842 0
 	ldr	w0, [x29, 156]
 	cbnz	w0, .L1500
 	.loc 3 898 0
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cbnz	w0, .L1501
 	.loc 3 898 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR48
@@ -19046,7 +19099,7 @@ FtlRead:
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1948:
+.LVL1944:
 	b	.L1481
 .L1500:
 	.loc 3 843 0
@@ -19054,7 +19107,7 @@ FtlRead:
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1949:
+.LVL1945:
 	.loc 3 844 0
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
@@ -19063,21 +19116,21 @@ FtlRead:
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
 .L1486:
-.LVL1950:
+.LVL1946:
 	ldrh	w0, [x5]
 	cmp	w4, w0
 	bcc	.L1488
-.LVL1951:
+.LVL1947:
 .L1489:
 	.loc 3 874 0
 	ldr	w0, [x29, 156]
 	.loc 3 872 0
 	add	w20, w20, 1
-.LVL1952:
+.LVL1948:
 	.loc 3 874 0
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-.LVL1953:
+.LVL1949:
 	beq	.L1493
 	.loc 3 874 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR3
@@ -19092,7 +19145,7 @@ FtlRead:
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1954:
+.LVL1950:
 	.loc 3 883 0
 	ldr	w0, [x29, 144]
 	lsl	w0, w0, 9
@@ -19106,9 +19159,9 @@ FtlRead:
 	str	w0, [x29, 112]
 	ubfiz	x0, x25, 5, 32
 	mov	x25, 0
-.LVL1955:
+.LVL1951:
 	str	x0, [x29, 104]
-.LVL1956:
+.LVL1952:
 	.loc 3 883 0
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
@@ -19121,8 +19174,8 @@ FtlRead:
 	bne	.L1495
 	.loc 3 879 0
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR116
-	ldr	x0, [x0, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR115
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	cmp	x1, x0
 	bne	.L1496
 	.loc 3 880 0
@@ -19133,7 +19186,7 @@ FtlRead:
 .L1513:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1957:
+.LVL1953:
 .L1496:
 	.loc 3 885 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
@@ -19145,28 +19198,28 @@ FtlRead:
 	ldr	x1, [x29, 128]
 	.loc 3 887 0
 	mov	w21, w0
-.LVL1958:
+.LVL1954:
 	.loc 3 886 0
 	ldr	x2, [x29, 128]
 	ldr	w1, [x1, 72]
 	add	w1, w1, 1
 	str	w1, [x2, 72]
-.LVL1959:
+.LVL1955:
 .L1498:
 	.loc 3 877 0 discriminator 2
 	ldr	x0, [x29, 104]
 	add	x25, x25, 32
-.LVL1960:
+.LVL1956:
 	cmp	x0, x25
 	bne	.L1499
 	.loc 3 894 0
 	mov	w25, 0
 	b	.L1484
-.LVL1961:
+.LVL1957:
 .L1488:
 	.loc 3 846 0
 	madd	w0, w20, w0, w4
-.LVL1962:
+.LVL1958:
 	.loc 3 847 0
 	cmp	w19, w0
 	bhi	.L1487
@@ -19176,7 +19229,7 @@ FtlRead:
 	bls	.L1487
 	.loc 3 848 0 is_stmt 1
 	sub	w0, w0, w19
-.LVL1963:
+.LVL1959:
 	str	x5, [x29, 112]
 	lsl	w0, w0, 9
 	str	w4, [x29, 120]
@@ -19184,16 +19237,16 @@ FtlRead:
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1964:
+.LVL1960:
 	ldr	w4, [x29, 120]
 	ldr	x5, [x29, 112]
-.LVL1965:
+.LVL1961:
 .L1487:
 	.loc 3 845 0 discriminator 2
 	add	w4, w4, 1
-.LVL1966:
+.LVL1962:
 	b	.L1486
-.LVL1967:
+.LVL1963:
 .L1485:
 	.loc 3 851 0
 	ldr	x2, [x28, #:lo12:.LANCHOR120]
@@ -19206,42 +19259,42 @@ FtlRead:
 	.loc 3 852 0
 	bne	.L1490
 	.loc 3 853 0
-	adrp	x1, .LANCHOR116
-	ldr	x1, [x1, #:lo12:.LANCHOR116]
+	adrp	x1, .LANCHOR115
+	ldr	x1, [x1, #:lo12:.LANCHOR115]
 	str	x1, [x0, 8]
 	.loc 3 854 0
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
-.LVL1968:
+.LVL1964:
 	.loc 3 855 0
 	sub	w2, w1, w2
-.LVL1969:
+.LVL1965:
 	cmp	w27, w2
 	csel	w2, w27, w2, ls
-.LVL1970:
+.LVL1966:
 	str	w2, [x29, 148]
-.LVL1971:
+.LVL1967:
 	.loc 3 857 0
 	cmp	w1, w2
 	bne	.L1491
 	.loc 3 858 0
 	str	x23, [x0, 8]
-.LVL1972:
+.LVL1968:
 .L1491:
 	.loc 3 867 0
 	adrp	x1, .LANCHOR24
-	adrp	x2, .LANCHOR115
+	adrp	x2, .LANCHOR114
 	.loc 3 868 0
 	str	w20, [x0, 24]
 	.loc 3 867 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	ldr	x2, [x2, #:lo12:.LANCHOR114]
 	mul	w1, w1, w25
 	.loc 3 869 0
 	add	w25, w25, 1
-.LVL1973:
+.LVL1969:
 	.loc 3 867 0
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
@@ -19254,21 +19307,21 @@ FtlRead:
 	.loc 3 861 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	.loc 3 860 0
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR113
 	.loc 3 861 0
 	ldr	w3, [x29, 140]
 	.loc 3 860 0
-	ldr	x1, [x1, #:lo12:.LANCHOR114]
+	ldr	x1, [x1, #:lo12:.LANCHOR113]
 	str	x1, [x0, 8]
 	.loc 3 861 0
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
-.LVL1974:
+.LVL1970:
 	.loc 3 862 0
 	cmp	w2, w3
 	bne	.L1491
-.LVL1975:
+.LVL1971:
 .L1512:
 	.loc 3 865 0
 	sub	w1, w1, w19
@@ -19280,15 +19333,15 @@ FtlRead:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
 	b	.L1512
-.LVL1976:
+.LVL1972:
 .L1495:
 	.loc 3 881 0
 	cmp	w24, w1
 	bne	.L1496
 	.loc 3 882 0
 	ldr	x1, [x0, 8]
-	adrp	x0, .LANCHOR114
-	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR113
+	ldr	x0, [x0, #:lo12:.LANCHOR113]
 	cmp	x1, x0
 	bne	.L1496
 	.loc 3 883 0
@@ -19304,19 +19357,19 @@ FtlRead:
 	.loc 3 889 0
 	cmp	w0, 256
 	bne	.L1498
-.LBB297:
+.LBB332:
 	.loc 3 890 0
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1977:
+.LVL1973:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1978:
+.LVL1974:
 	b	.L1498
-.LVL1979:
+.LVL1975:
 .L1502:
-.LBE297:
+.LBE332:
 	.loc 3 831 0
 	mov	w21, -1
 	b	.L1481
@@ -19329,19 +19382,19 @@ FtlRead:
 	.type	sftl_read, %function
 sftl_read:
 .LFB219:
-	.loc 3 1204 0
+	.loc 3 1168 0
 	.cfi_startproc
-.LVL1980:
-	.loc 3 1205 0
+.LVL1976:
+	.loc 3 1169 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1981:
+.LVL1977:
 	mov	w1, w0
-.LVL1982:
+.LVL1978:
 	mov	w0, 0
-.LVL1983:
+.LVL1979:
 	b	FtlRead
-.LVL1984:
+.LVL1980:
 	.cfi_endproc
 .LFE219:
 	.size	sftl_read, .-sftl_read
@@ -19351,56 +19404,56 @@ sftl_read:
 	.type	FtlWrite, %function
 FtlWrite:
 .LFB217:
-	.loc 3 962 0
+	.loc 3 958 0
 	.cfi_startproc
-.LVL1985:
+.LVL1981:
 	stp	x29, x30, [sp, -240]!
 	.cfi_def_cfa_offset 240
 	.cfi_offset 29, -240
 	.cfi_offset 30, -232
 	and	w0, w0, 255
-	.loc 3 970 0
+	.loc 3 966 0
 	cmp	w0, 16
-	.loc 3 962 0
+	.loc 3 958 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -208
 	.cfi_offset 22, -200
-	mov	w22, w1
-	stp	x23, x24, [sp, 48]
-	.cfi_offset 23, -192
-	.cfi_offset 24, -184
-	mov	w24, w2
+	mov	w21, w1
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -176
 	.cfi_offset 26, -168
-	mov	x25, x3
+	mov	x26, x3
 	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 19, -224
 	.cfi_offset 20, -216
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
 	.cfi_offset 27, -160
 	.cfi_offset 28, -152
-	.loc 3 970 0
+	.loc 3 958 0
+	str	w2, [x29, 176]
+	.loc 3 966 0
 	bne	.L1516
-	.loc 3 971 0
+	.loc 3 967 0
+	add	w0, w1, 256
+.LVL1982:
+	ldr	w1, [x29, 176]
+.LVL1983:
 	mov	x2, x3
-.LVL1986:
-	mov	w1, w24
-.LVL1987:
-	add	w0, w22, 256
-.LVL1988:
+.LVL1984:
 	bl	FtlVendorPartWrite
-.LVL1989:
+.LVL1985:
 .L1515:
-	.loc 3 1153 0
+	.loc 3 1117 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1990:
 	ldp	x25, x26, [sp, 64]
-.LVL1991:
+.LVL1986:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	.cfi_remember_state
@@ -19417,678 +19470,596 @@ FtlWrite:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
+.LVL1987:
 	ret
-.LVL1992:
+.LVL1988:
 .L1516:
 	.cfi_restore_state
-	.loc 3 974 0
+	.loc 3 970 0
+	ldr	w0, [x29, 176]
+	add	w0, w1, w0
+	str	w0, [x29, 168]
 	adrp	x0, .LANCHOR34
-	add	w2, w1, w2
-.LVL1993:
+	ldr	w1, [x29, 168]
+.LVL1989:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
-	cmp	w2, w0
-	bhi	.L1556
-	.loc 3 974 0 is_stmt 0 discriminator 1
-	adrp	x0, .LANCHOR88
-	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w1, w0
+	bhi	.L1551
+	.loc 3 970 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR86
+	ldr	w0, [x0, #:lo12:.LANCHOR86]
 	cmn	w0, #1
 	beq	.L1515
-	.loc 3 977 0 is_stmt 1
-	adrp	x0, .LANCHOR178
-	.loc 3 978 0
-	adrp	x3, .LANCHOR12
-.LVL1994:
-	.loc 3 977 0
+	.loc 3 973 0 is_stmt 1
+	adrp	x0, .LANCHOR176
 	mov	w1, 2048
-.LVL1995:
-	.loc 3 979 0
-	sub	w2, w2, #1
-	.loc 3 977 0
-	str	w1, [x0, #:lo12:.LANCHOR178]
+	.loc 3 974 0
+	adrp	x22, .LANCHOR12
+	.loc 3 973 0
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	.loc 3 975 0
+	ldr	w1, [x29, 168]
+	.loc 3 974 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	.loc 3 975 0
+	sub	w1, w1, #1
+	.loc 3 974 0
+	udiv	w25, w21, w0
+.LVL1990:
+	.loc 3 975 0
+	udiv	w0, w1, w0
 	.loc 3 978 0
-	ldrh	w1, [x3, #:lo12:.LANCHOR12]
-	str	x3, [x29, 176]
-	.loc 3 979 0
-	udiv	w0, w2, w1
-	.loc 3 982 0
-	adrp	x2, .LANCHOR65
+	adrp	x1, .LANCHOR64
+	.loc 3 975 0
+	str	w0, [x29, 156]
+.LVL1991:
+	.loc 3 976 0
+	sub	w0, w0, w25
+.LVL1992:
+	add	w24, w0, 1
+.LVL1993:
+	str	w0, [x29, 152]
 	.loc 3 978 0
-	udiv	w21, w22, w1
-.LVL1996:
-	.loc 3 979 0
-	str	w0, [x29, 168]
-.LVL1997:
-	.loc 3 980 0
-	sub	w23, w0, w21
-	.loc 3 982 0
-	ldr	w0, [x2, #:lo12:.LANCHOR65]
-.LVL1998:
-	.loc 3 980 0
-	add	w26, w23, 1
-.LVL1999:
-	.loc 3 982 0
-	add	w0, w0, w26
-	str	w0, [x2, #:lo12:.LANCHOR65]
-	.loc 3 983 0
-	adrp	x0, .LANCHOR150
-	str	x0, [x29, 120]
-	ldr	x2, [x0, #:lo12:.LANCHOR150]
-	cbz	x2, .L1518
+	ldr	w0, [x1, #:lo12:.LANCHOR64]
+	add	w0, w0, w24
+	str	w0, [x1, #:lo12:.LANCHOR64]
+.LVL1994:
 	.loc 3 984 0
-	ldr	w0, [x2, 24]
-	cmp	w21, w0
-	beq	.L1519
-	.loc 3 985 0
-	bl	FtlCacheWriteBack
-.LVL2000:
-.L1518:
-	.loc 3 1008 0
-	adrp	x0, .LANCHOR179
-	str	x0, [x29, 152]
-	ldr	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR177
+	str	x0, [x29, 160]
+	ldr	w1, [x0, #:lo12:.LANCHOR177]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1521
-	.loc 3 1008 0 is_stmt 0 discriminator 1
+	cbz	w1, .L1518
+	.loc 3 984 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1521
-	.loc 3 1009 0 is_stmt 1
+	cbnz	w0, .L1518
+	.loc 3 985 0 is_stmt 1
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1521:
-	mov	w20, w21
-	.loc 3 1023 0
+.L1518:
+	mov	w20, w25
+	.loc 3 999 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 96]
-.LVL2001:
-.L1522:
-	.loc 3 1011 0
-	cbnz	w26, .L1552
-	.loc 3 1137 0
-	ldr	w0, [x29, 168]
-	sub	w1, w0, w21
+.LVL1995:
+.L1519:
+	.loc 3 987 0
+	cbnz	w24, .L1547
+	.loc 3 1101 0
+	ldr	w1, [x29, 152]
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2002:
-	.loc 3 1139 0
+.LVL1996:
+	.loc 3 1103 0
 	adrp	x0, .LANCHOR48
-	mov	x20, x0
-.LVL2003:
+	mov	x22, x0
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 15
-	bhi	.L1553
-	.loc 3 1141 0
-	adrp	x22, .LANCHOR101
-.LVL2004:
-	.loc 3 1143 0
-	adrp	x21, .LANCHOR85
-.LVL2005:
-	.loc 3 1144 0
-	adrp	x19, .LANCHOR84
-.LVL2006:
-	.loc 3 1141 0
-	add	x22, x22, :lo12:.LANCHOR101
-	.loc 3 1143 0
-	add	x21, x21, :lo12:.LANCHOR85
-	.loc 3 1144 0
-	add	x19, x19, :lo12:.LANCHOR84
-.L1571:
-	.loc 3 1141 0
-	adrp	x0, .LANCHOR82
-	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR82]
-	cmp	w0, w1
-	bne	.L1554
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x22]
-	cmp	w1, w0
-	bne	.L1554
-	.loc 3 1142 0 is_stmt 1
-	mov	w0, 0
-	bl	List_get_gc_head_node
-.LVL2007:
-	bl	FtlGcRefreshBlock
-.LVL2008:
-.L1554:
-	.loc 3 1143 0
-	mov	w0, 128
-	.loc 3 1145 0
-	mov	w1, 1
-	.loc 3 1143 0
-	strh	w0, [x21]
-	.loc 3 1144 0
-	strh	w0, [x19]
-	.loc 3 1145 0
-	mov	w0, w1
-	bl	rk_ftl_garbage_collect
-.LVL2009:
-	.loc 3 1146 0
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.LVL2010:
-	.loc 3 1147 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR48]
-	cmp	w0, 8
-	bls	.L1571
-	b	.L1553
-.LVL2011:
-.L1519:
-	.loc 3 987 0
-	adrp	x3, .LANCHOR66
-	ldr	w0, [x3, #:lo12:.LANCHOR66]
-	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR66]
-	.loc 3 988 0
-	msub	w0, w21, w1, w22
-.LVL2012:
-	.loc 3 992 0
-	ldr	x3, [x2, 8]
-	.loc 3 989 0
-	sub	w1, w1, w0
-.LVL2013:
-	cmp	w24, w1
-	.loc 3 992 0
-	lsl	w0, w0, 9
-.LVL2014:
-	csel	w19, w24, w1, ls
-.LVL2015:
-	add	x0, x3, x0
-	lsl	w20, w19, 9
-	mov	x1, x25
-	mov	w2, w20
-	bl	ftl_memcpy
-.LVL2016:
-	.loc 3 994 0
-	cbnz	w23, .L1520
-.LVL2017:
-.L1553:
-	.loc 3 995 0
+	bls	.L1548
+.LVL1997:
+.L1550:
+	.loc 3 1116 0
 	mov	w0, 0
 	b	.L1515
-.LVL2018:
-.L1520:
-	.loc 3 996 0
-	sub	w24, w24, w19
-.LVL2019:
-	.loc 3 997 0
-	add	w22, w22, w19
-.LVL2020:
-	.loc 3 998 0
-	add	x25, x25, x20
-.LVL2021:
-	.loc 3 999 0
-	add	w21, w21, 1
-.LVL2022:
-	.loc 3 1000 0
-	bl	FtlCacheWriteBack
-.LVL2023:
-	mov	w26, w23
-	b	.L1518
-.LVL2024:
-.L1552:
-	.loc 3 1012 0
+.LVL1998:
+.L1547:
+	.loc 3 988 0
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
-	str	x0, [x29, 128]
+	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1523
-	.loc 3 1012 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+	bcc	.L1520
+	.loc 3 988 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1012
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 988
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2025:
-.L1523:
-	.loc 3 1013 0 is_stmt 1
+.LVL1999:
+.L1520:
+	.loc 3 989 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1524
-	.loc 3 1014 0
-	bl	FtlCacheWriteBack
-.LVL2026:
-	.loc 3 1016 0
+	cbnz	w0, .L1521
+	.loc 3 992 0
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1525
-	.loc 3 1017 0
+	bne	.L1522
+	.loc 3 993 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1526
-	.loc 3 1018 0
+	cbnz	w1, .L1523
+	.loc 3 994 0
 	bl	allocate_new_data_superblock
-.LVL2027:
-	.loc 3 1019 0
-	ldr	x0, [x29, 152]
-	str	wzr, [x0, #:lo12:.LANCHOR179]
-.L1526:
-	.loc 3 1021 0
+.LVL2000:
+	.loc 3 995 0
+	ldr	x0, [x29, 160]
+	str	wzr, [x0, #:lo12:.LANCHOR177]
+.L1523:
+	.loc 3 997 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2028:
+.LVL2001:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2029:
-	.loc 3 1022 0
-	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR179]
-	.loc 3 1023 0
+.LVL2002:
+	.loc 3 998 0
+	ldr	x0, [x29, 160]
+	ldr	w0, [x0, #:lo12:.LANCHOR177]
+	.loc 3 999 0
 	cmp	w0, 0
 	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
-.L1527:
-.LVL2030:
-	.loc 3 1033 0
+.L1524:
+.LVL2003:
+	.loc 3 1009 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1524
-	.loc 3 1034 0
+	cbnz	w0, .L1521
+	.loc 3 1010 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2031:
-.L1524:
-	.loc 3 1043 0
+.LVL2004:
+.L1521:
+	.loc 3 1019 0
 	ldrh	w0, [x19, 4]
-	.loc 3 1041 0
+	.loc 3 1017 0
 	ldrb	w1, [x19, 7]
-	cmp	w0, w26
-	csel	w0, w0, w26, ls
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
 	lsl	w1, w1, 2
-	cmp	w0, w1
-	csel	w0, w0, w1, ls
-	str	w0, [x29, 160]
-.LVL2032:
-	.loc 3 1045 0
-	ldr	x0, [x29, 128]
-.LVL2033:
+	cmp	w1, w0
+	csel	w0, w1, w0, ls
+	str	w0, [x29, 148]
+.LVL2005:
+	.loc 3 1021 0
+	ldr	x0, [x29, 120]
+.LVL2006:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1528
-	.loc 3 1045 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+	bcc	.L1525
+	.loc 3 1021 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1045
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 1021
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2034:
-.L1528:
-	.loc 3 1055 0 is_stmt 1 discriminator 1
+.LVL2007:
+.L1525:
+	.loc 3 1031 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
-	.loc 3 1068 0 discriminator 1
+	.loc 3 1044 0 discriminator 1
 	str	xzr, [x29, 184]
-	.loc 3 1055 0 discriminator 1
+	.loc 3 1031 0 discriminator 1
 	str	x0, [x29, 112]
-	.loc 3 1101 0 discriminator 1
+	.loc 3 1077 0 discriminator 1
 	adrp	x0, .LANCHOR23
 	add	x0, x0, :lo12:.LANCHOR23
 	str	x0, [x29, 104]
-.L1529:
-	.loc 3 1046 0 discriminator 1
-	ldr	w1, [x29, 160]
+.L1526:
+	.loc 3 1022 0 discriminator 1
+	ldr	w1, [x29, 148]
 	adrp	x28, .LANCHOR122
-	ldr	w27, [x29, 184]
-.LVL2035:
-	cmp	w27, w1
-	bcc	.L1550
-	mov	x27, x1
-.L1530:
-.LVL2036:
-	.loc 3 1133 0
+	ldr	w23, [x29, 184]
+.LVL2008:
+	cmp	w23, w1
+	bcc	.L1545
+	mov	x23, x1
+.L1527:
+.LVL2009:
+	.loc 3 1097 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	mov	x3, x19
 	mov	w2, 0
-	mov	w1, w27
+	mov	w1, w23
 	bl	FtlProgPages
-.LVL2037:
-	.loc 3 1134 0
-	cmp	w26, w27
-	bcs	.L1551
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+.LVL2010:
+	.loc 3 1098 0
+	cmp	w24, w23
+	bcs	.L1546
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1134
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 1098
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2038:
-.L1551:
-	.loc 3 1135 0 is_stmt 1
-	sub	w26, w26, w27
-.LVL2039:
-	b	.L1522
-.LVL2040:
-.L1525:
-	.loc 3 1027 0
-	ldr	x1, [x29, 152]
-	str	wzr, [x1, #:lo12:.LANCHOR179]
-	.loc 3 1028 0
+.LVL2011:
+.L1546:
+	.loc 3 1099 0 is_stmt 1
+	sub	w24, w24, w23
+.LVL2012:
+	b	.L1519
+.LVL2013:
+.L1522:
+	.loc 3 1003 0
+	ldr	x1, [x29, 160]
+	str	wzr, [x1, #:lo12:.LANCHOR177]
+	.loc 3 1004 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1561
-	.loc 3 1029 0
+	cbnz	w1, .L1556
+	.loc 3 1005 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2041:
-	b	.L1527
-.L1561:
-	mov	x19, x0
-.LVL2042:
+.LVL2014:
 	b	.L1524
-.LVL2043:
-.L1550:
-	.loc 3 1047 0
+.L1556:
+	mov	x19, x0
+.LVL2015:
+	b	.L1521
+.LVL2016:
+.L1545:
+	.loc 3 1023 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1530
-	.loc 3 1051 0
+	cbz	w0, .L1527
+	.loc 3 1027 0
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2044:
-	.loc 3 1052 0
+.LVL2017:
+	.loc 3 1028 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2045:
+.LVL2018:
 	ldr	x1, [x29, 184]
-	lsl	x23, x1, 5
-	.loc 3 1054 0
+	lsl	x27, x1, 5
+	.loc 3 1030 0
 	ldr	x1, [x28, #:lo12:.LANCHOR122]
-	add	x1, x1, x23
+	add	x1, x1, x27
 	str	w0, [x1, 4]
-	.loc 3 1055 0
+	.loc 3 1031 0
 	ldr	x0, [x29, 112]
-.LVL2046:
-	.loc 3 1056 0
+.LVL2019:
+	.loc 3 1032 0
 	str	w20, [x1, 24]
-	.loc 3 1055 0
+	.loc 3 1031 0
 	ldrh	w2, [x0]
-	mul	w27, w27, w2
-	and	x0, x27, 4294967292
-	str	x0, [x29, 144]
-	adrp	x0, .LANCHOR115
-	ldr	x3, [x29, 144]
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	mul	w23, w23, w2
+	and	x0, x23, 4294967292
 	str	x0, [x29, 136]
-	add	x27, x0, x3
-.LVL2047:
-	str	x27, [x1, 16]
-	.loc 3 1059 0
-	mov	x0, x27
+	adrp	x0, .LANCHOR114
+	ldr	x3, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	str	x0, [x29, 128]
+	add	x23, x0, x3
+.LVL2020:
+	str	x23, [x1, 16]
+	.loc 3 1035 0
+	mov	x0, x23
 	mov	w1, 0
-.LVL2048:
+.LVL2021:
 	bl	ftl_memset
-.LVL2049:
-	.loc 3 1061 0
-	ldr	w0, [x29, 168]
-	cmp	w20, w21
+.LVL2022:
+	.loc 3 1037 0
+	ldr	w0, [x29, 156]
+	cmp	w20, w25
 	ccmp	w20, w0, 4, ne
-	bne	.L1531
-	.loc 3 1062 0
-	cmp	w20, w21
-	bne	.L1532
-	.loc 3 1063 0
-	ldr	x0, [x29, 176]
-	ldrh	w2, [x0, #:lo12:.LANCHOR12]
-	udiv	w0, w22, w2
-	msub	w0, w0, w2, w22
-	str	w0, [x29, 164]
-.LVL2050:
-	.loc 3 1064 0
-	sub	w2, w2, w0
-	cmp	w2, w24
-	csel	w0, w2, w24, ls
-.LVL2051:
+	bne	.L1528
+	.loc 3 1038 0
+	cmp	w20, w25
+	bne	.L1529
+	.loc 3 1039 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	udiv	w0, w21, w2
+	msub	w0, w0, w2, w21
 	str	w0, [x29, 172]
-.LVL2052:
-.L1533:
-	.loc 3 1072 0
-	ldr	x0, [x29, 176]
-	ldr	w1, [x29, 172]
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+.LVL2023:
+	.loc 3 1040 0
+	sub	w2, w2, w0
+	ldr	w0, [x29, 176]
+.LVL2024:
+	cmp	w2, w0
+	csel	w0, w2, w0, ls
+	str	w0, [x29, 180]
+.LVL2025:
+.L1530:
+	.loc 3 1048 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	ldr	w1, [x29, 180]
 	cmp	w1, w0
-	.loc 3 1074 0
+	.loc 3 1050 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1072 0
-	bne	.L1534
-	.loc 3 1074 0
-	add	x23, x0, x23
-	.loc 3 1073 0
-	cmp	w20, w21
-	bne	.L1535
-	.loc 3 1074 0
-	str	x25, [x23, 8]
-.LVL2053:
-.L1536:
-	.loc 3 1119 0
-	ldr	x0, [x29, 128]
+	.loc 3 1048 0
+	bne	.L1531
+	.loc 3 1050 0
+	add	x3, x0, x27
+	.loc 3 1049 0
+	cmp	w20, w25
+	bne	.L1532
+	.loc 3 1050 0
+	str	x26, [x3, 8]
+.LVL2026:
+.L1533:
+	.loc 3 1089 0
+	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1547
-	.loc 3 1119 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
+	bcc	.L1542
+	.loc 3 1089 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	mov	w2, 1119
-	add	x1, x1, :lo12:.LANCHOR180
+	mov	w2, 1089
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2054:
-.L1547:
-	.loc 3 1120 0 is_stmt 1
-	ldp	x1, x2, [x29, 136]
+.LVL2027:
+.L1542:
+	.loc 3 1090 0 is_stmt 1
+	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	.loc 3 1121 0
-	adrp	x1, .LANCHOR72
-	ldr	w0, [x1, #:lo12:.LANCHOR72]
-	.loc 3 1122 0
-	stp	w0, w20, [x27, 4]
-	.loc 3 1125 0
+	.loc 3 1091 0
+	adrp	x1, .LANCHOR71
+	ldr	w0, [x1, #:lo12:.LANCHOR71]
+	.loc 3 1092 0
+	stp	w0, w20, [x23, 4]
+	.loc 3 1095 0
 	add	w20, w20, 1
-.LVL2055:
-	.loc 3 1121 0
+.LVL2028:
+	.loc 3 1091 0
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR72]
-	.loc 3 1123 0
+	str	w0, [x1, #:lo12:.LANCHOR71]
+	.loc 3 1093 0
 	ldr	w0, [x29, 204]
-	str	w0, [x27, 12]
-	.loc 3 1124 0
+	str	w0, [x23, 12]
+	.loc 3 1094 0
 	ldrh	w0, [x19]
-	strh	w0, [x27, 2]
+	strh	w0, [x23, 2]
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1529
-.LVL2056:
-.L1532:
-	.loc 3 1069 0
-	ldr	x0, [x29, 176]
-	add	w2, w22, w24
-	.loc 3 1068 0
-	str	wzr, [x29, 164]
-	.loc 3 1069 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	msub	w2, w20, w0, w2
+	b	.L1526
+.LVL2029:
+.L1529:
+	.loc 3 1045 0
+	ldr	w0, [x29, 168]
+	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	.loc 3 1044 0
+	str	wzr, [x29, 172]
+	.loc 3 1045 0
+	msub	w2, w20, w2, w0
 	and	w0, w2, 65535
-	str	w0, [x29, 172]
-.LVL2057:
-	b	.L1533
-.LVL2058:
-.L1535:
-	.loc 3 1076 0
-	ldr	w0, [x29, 172]
-.LVL2059:
-.L1574:
-	.loc 3 1117 0
+	str	w0, [x29, 180]
+.LVL2030:
+	b	.L1530
+.LVL2031:
+.L1532:
+	.loc 3 1052 0
+	ldr	w0, [x29, 180]
+.LVL2032:
+.L1563:
+	.loc 3 1087 0
 	mul	w0, w0, w20
-	sub	w0, w0, w22
+	sub	w0, w0, w21
 	lsl	w0, w0, 9
-	add	x0, x25, x0
-	str	x0, [x23, 8]
-	b	.L1536
-.LVL2060:
-.L1534:
-	.loc 3 1080 0
-	add	x0, x0, x23
-	.loc 3 1079 0
-	cmp	w20, w21
-	bne	.L1537
-	.loc 3 1080 0
-	adrp	x1, .LANCHOR116
-	ldr	x1, [x1, #:lo12:.LANCHOR116]
-.L1573:
-	.loc 3 1082 0
+	add	x0, x26, x0
+	str	x0, [x3, 8]
+	b	.L1533
+.LVL2033:
+.L1531:
+	.loc 3 1056 0
+	add	x0, x0, x27
+	.loc 3 1055 0
+	cmp	w20, w25
+	bne	.L1534
+	.loc 3 1056 0
+	adrp	x1, .LANCHOR115
+	ldr	x1, [x1, #:lo12:.LANCHOR115]
+.L1562:
+	.loc 3 1058 0
 	str	x1, [x0, 8]
-	.loc 3 1084 0
+	.loc 3 1060 0
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1539
-.LBB298:
-	.loc 3 1086 0
+	beq	.L1536
+.LBB333:
+	.loc 3 1062 0
 	str	w0, [x29, 212]
-	.loc 3 1090 0
+	.loc 3 1066 0
 	mov	w2, 0
-	.loc 3 1088 0
+	.loc 3 1064 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	.loc 3 1087 0
+	.loc 3 1063 0
 	str	w20, [x29, 232]
-	.loc 3 1088 0
-	add	x0, x0, x23
-	.loc 3 1089 0
+	.loc 3 1064 0
+	add	x0, x0, x27
+	.loc 3 1065 0
 	ldp	x1, x0, [x0, 8]
 	stp	x1, x0, [x29, 216]
-	.loc 3 1090 0
+	.loc 3 1066 0
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2061:
-	.loc 3 1091 0
+.LVL2034:
+	.loc 3 1067 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1540
-	.loc 3 1092 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	bne	.L1537
+	.loc 3 1068 0
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1543:
-	ldr	w0, [x29, 172]
-.LBE298:
-	.loc 3 1104 0
-	cmp	w20, w21
+.L1540:
+	ldr	w0, [x29, 180]
+.LBE333:
+	.loc 3 1080 0
+	cmp	w20, w25
 	lsl	w2, w0, 9
-	bne	.L1544
-	.loc 3 1105 0
-	ldr	x1, [x28, #:lo12:.LANCHOR122]
-	ldr	w0, [x29, 164]
-	add	x1, x1, x23
+	bne	.L1541
+	.loc 3 1081 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	mov	x1, x26
+	add	x3, x0, x27
+	ldr	w0, [x29, 172]
+	ldr	x3, [x3, 8]
 	lsl	w0, w0, 9
-	ldr	x3, [x1, 8]
-	mov	x1, x25
 	add	x0, x3, x0
+.L1564:
+	.loc 3 1083 0
 	bl	ftl_memcpy
-.LVL2062:
-	.loc 3 1109 0
-	ldr	w0, [x29, 168]
-	cmp	w20, w0
-	bne	.L1536
-.L1545:
-	.loc 3 1110 0
-	ldrh	w0, [x19, 4]
-	cbz	w0, .L1536
-	.loc 3 1111 0
-	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x23, x0, x23
-	ldr	x0, [x29, 120]
-	str	x23, [x0, #:lo12:.LANCHOR150]
-	.loc 3 1112 0
-	adrp	x0, .LANCHOR171
-	str	x19, [x0, #:lo12:.LANCHOR171]
-	b	.L1536
+.LVL2035:
+	b	.L1533
+.L1534:
+	.loc 3 1058 0
+	adrp	x1, .LANCHOR113
+	ldr	x1, [x1, #:lo12:.LANCHOR113]
+	b	.L1562
 .L1537:
-	.loc 3 1082 0
-	adrp	x1, .LANCHOR114
-	ldr	x1, [x1, #:lo12:.LANCHOR114]
-	b	.L1573
-.L1540:
-.LBB299:
-	.loc 3 1094 0
-	ldr	w1, [x27, 8]
+.LBB334:
+	.loc 3 1070 0
+	ldr	w1, [x23, 8]
 	cmp	w20, w1
-	beq	.L1542
-	.loc 3 1095 0
-	adrp	x0, .LANCHOR83
-	add	x0, x0, :lo12:.LANCHOR83
+	beq	.L1539
+	.loc 3 1071 0
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	.loc 3 1096 0
-	adrp	x0, .LC105
+	.loc 3 1072 0
+	adrp	x0, .LC108
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC108
 	bl	printf
-.LVL2063:
-.L1542:
-	.loc 3 1098 0
-	ldr	w0, [x27, 8]
+.LVL2036:
+.L1539:
+	.loc 3 1074 0
+	ldr	w0, [x23, 8]
 	cmp	w20, w0
-	beq	.L1543
-	.loc 3 1098 0 is_stmt 0 discriminator 1
-	mov	w2, 1098
-	adrp	x1, .LANCHOR180
+	beq	.L1540
+	.loc 3 1074 0 is_stmt 0 discriminator 1
+	mov	w2, 1074
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2064:
-	b	.L1543
-.LVL2065:
-.L1539:
-.LBE299:
-	.loc 3 1101 0 is_stmt 1
+.LVL2037:
+	b	.L1540
+.LVL2038:
+.L1536:
+.LBE334:
+	.loc 3 1077 0 is_stmt 1
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	ldr	x1, [x29, 104]
-	add	x0, x0, x23
+	add	x0, x0, x27
 	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2066:
-	b	.L1543
-.L1544:
-	.loc 3 1107 0
-	ldr	x0, [x29, 176]
-	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+.LVL2039:
+	b	.L1540
+.L1541:
+	.loc 3 1083 0
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x0, x0, x23
+	add	x3, x0, x27
 	mul	w1, w1, w20
-	ldr	x0, [x0, 8]
-	sub	w1, w1, w22
+	sub	w1, w1, w21
+	ldr	x0, [x3, 8]
 	lsl	w1, w1, 9
-	add	x1, x25, x1
-	bl	ftl_memcpy
-.LVL2067:
-	b	.L1545
-.LVL2068:
-.L1531:
-	.loc 3 1117 0
+	add	x1, x26, x1
+	b	.L1564
+.LVL2040:
+.L1528:
+	.loc 3 1087 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	add	x23, x0, x23
-	ldr	x0, [x29, 176]
-	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1574
-.LVL2069:
-.L1556:
-	.loc 3 975 0
+	add	x3, x0, x27
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	b	.L1563
+.LVL2041:
+.L1548:
+	.loc 3 1105 0
+	adrp	x21, .LANCHOR99
+.LVL2042:
+	.loc 3 1107 0
+	adrp	x20, .LANCHOR83
+.LVL2043:
+	.loc 3 1108 0
+	adrp	x19, .LANCHOR82
+.LVL2044:
+	.loc 3 1105 0
+	add	x21, x21, :lo12:.LANCHOR99
+	.loc 3 1107 0
+	add	x20, x20, :lo12:.LANCHOR83
+	.loc 3 1108 0
+	add	x19, x19, :lo12:.LANCHOR82
+.L1560:
+	.loc 3 1105 0
+	adrp	x0, .LANCHOR80
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w1
+	bne	.L1549
+	.loc 3 1105 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x21]
+	cmp	w1, w0
+	bne	.L1549
+	.loc 3 1106 0 is_stmt 1
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL2045:
+	bl	FtlGcRefreshBlock
+.LVL2046:
+.L1549:
+	.loc 3 1107 0
+	mov	w0, 128
+	.loc 3 1109 0
+	mov	w1, 1
+	.loc 3 1107 0
+	strh	w0, [x20]
+	.loc 3 1108 0
+	strh	w0, [x19]
+	.loc 3 1109 0
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+.LVL2047:
+	.loc 3 1110 0
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2048:
+	.loc 3 1111 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
+	cmp	w0, 8
+	bls	.L1560
+	b	.L1550
+.LVL2049:
+.L1551:
+	.loc 3 971 0
 	mov	w0, -1
 	b	.L1515
 	.cfi_endproc
@@ -20100,19 +20071,19 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 .LFB220:
-	.loc 3 1209 0
+	.loc 3 1173 0
 	.cfi_startproc
-.LVL2070:
-	.loc 3 1210 0
+.LVL2050:
+	.loc 3 1174 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2071:
+.LVL2051:
 	mov	w1, w0
-.LVL2072:
+.LVL2052:
 	mov	w0, 0
-.LVL2073:
+.LVL2053:
 	b	FtlWrite
-.LVL2074:
+.LVL2054:
 	.cfi_endproc
 .LFE220:
 	.size	sftl_write, .-sftl_write
@@ -20122,73 +20093,73 @@ sftl_write:
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
 .LFB274:
-	.loc 2 1360 0
+	.loc 2 1409 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 2 1368 0
+	.loc 2 1417 0
 	mov	w1, 0
-	.loc 2 1360 0
+	.loc 2 1409 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
-	.loc 2 1365 0
-	adrp	x19, .LANCHOR108
-	.loc 2 1360 0
+	.loc 2 1414 0
+	adrp	x19, .LANCHOR106
+	.loc 2 1409 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 2 1365 0
-	adrp	x23, .LANCHOR39
-	.loc 2 1360 0
+	.loc 2 1414 0
+	adrp	x23, .LANCHOR107
+	.loc 2 1409 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 2 1365 0
-	add	x21, x19, :lo12:.LANCHOR108
-	.loc 2 1360 0
+	.loc 2 1414 0
+	add	x21, x19, :lo12:.LANCHOR106
+	.loc 2 1409 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 25, -32
 	.cfi_offset 26, -24
-	.loc 2 1366 0
-	adrp	x26, .LANCHOR109
-	.loc 2 1360 0
+	.loc 2 1415 0
+	adrp	x26, .LANCHOR108
+	.loc 2 1409 0
 	stp	x27, x28, [sp, 80]
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 2 1368 0
-	adrp	x25, .LANCHOR43
-	.loc 2 1365 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 1368 0
+	.loc 2 1417 0
+	adrp	x25, .LANCHOR42
+	.loc 2 1414 0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	.loc 2 1417 0
 	adrp	x24, .LANCHOR5
-	.loc 2 1365 0
+	.loc 2 1414 0
 	str	x0, [x21, 8]
-	.loc 2 1369 0
-	adrp	x20, .LANCHOR81
-	.loc 2 1366 0
-	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	.loc 2 1418 0
+	adrp	x20, .LANCHOR79
+	.loc 2 1415 0
+	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	str	x0, [x21, 16]
-	.loc 2 1368 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	.loc 2 1417 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2075:
-	.loc 2 1369 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR81]
+.LVL2055:
+	.loc 2 1418 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1577
-.L1585:
-	.loc 2 1370 0
+	bne	.L1567
+.L1575:
+	.loc 2 1419 0
 	mov	w0, -1
-.L1576:
-	.loc 2 1463 0
+.L1566:
+	.loc 2 1512 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20210,71 +20181,71 @@ FtlLoadSysInfo:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1577:
+.L1567:
 	.cfi_restore_state
-	add	x27, x20, :lo12:.LANCHOR81
-	.loc 2 1372 0
+	add	x27, x20, :lo12:.LANCHOR79
+	.loc 2 1421 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2076:
+.LVL2056:
 	sxth	w22, w0
-.LVL2077:
-	.loc 2 1373 0
+.LVL2057:
+	.loc 2 1422 0
 	add	w0, w0, 1
-	.loc 2 1382 0
+	.loc 2 1431 0
 	mov	w28, 61604
-	.loc 2 1373 0
+	.loc 2 1422 0
 	strh	w0, [x27, 2]
-	.loc 2 1381 0
+	.loc 2 1430 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1579:
-	.loc 2 1375 0
-	tbz	w22, #31, .L1582
-	.loc 2 1388 0
-	adrp	x1, .LANCHOR181
+.L1569:
+	.loc 2 1424 0
+	tbz	w22, #31, .L1572
+	.loc 2 1437 0
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
-	mov	w2, 1388
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1437
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2078:
-.L1581:
-	.loc 2 1390 0
+.LVL2058:
+.L1571:
+	.loc 2 1439 0
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1584
-	.loc 2 1390 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR181
+	bcs	.L1574
+	.loc 2 1439 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
-	mov	w2, 1390
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1439
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2079:
-.L1584:
-	.loc 2 1392 0 is_stmt 1
-	add	x22, x19, :lo12:.LANCHOR108
-.LVL2080:
-	adrp	x19, .LANCHOR79
-	add	x21, x19, :lo12:.LANCHOR79
+.LVL2059:
+.L1574:
+	.loc 2 1441 0 is_stmt 1
+	add	x22, x19, :lo12:.LANCHOR106
+.LVL2060:
+	adrp	x19, .LANCHOR39
+	add	x21, x19, :lo12:.LANCHOR39
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2081:
-	.loc 2 1393 0
-	ldr	x0, [x25, #:lo12:.LANCHOR43]
+.LVL2061:
+	.loc 2 1442 0
+	ldr	x0, [x25, #:lo12:.LANCHOR42]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	ldr	x1, [x22, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2082:
-	.loc 2 1394 0
+.LVL2062:
+	.loc 2 1443 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
 	lsr	w2, w1, 3
@@ -20286,267 +20257,267 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2083:
-	.loc 2 1396 0
-	ldr	w1, [x19, #:lo12:.LANCHOR79]
+.LVL2063:
+	.loc 2 1445 0
+	ldr	w1, [x19, #:lo12:.LANCHOR39]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1585
-	.loc 2 1399 0
-	add	x20, x20, :lo12:.LANCHOR81
-	.loc 2 1400 0
+	bne	.L1575
+	.loc 2 1448 0
+	add	x20, x20, :lo12:.LANCHOR79
+	.loc 2 1449 0
 	adrp	x0, .LANCHOR10
-	.loc 2 1399 0
+	.loc 2 1448 0
 	ldrh	w1, [x21, 8]
-	.loc 2 1400 0
+	.loc 2 1449 0
 	ldrb	w2, [x21, 10]
 	ldrh	w0, [x0, #:lo12:.LANCHOR10]
-	.loc 2 1399 0
+	.loc 2 1448 0
 	strh	w1, [x20, 6]
-	.loc 2 1400 0
+	.loc 2 1449 0
 	cmp	w2, w0
-	bne	.L1585
-	.loc 2 1403 0
-	adrp	x0, .LANCHOR182
-	.loc 2 1404 0
-	adrp	x2, .LANCHOR62
-	.loc 2 1406 0
+	bne	.L1575
+	.loc 2 1452 0
+	adrp	x0, .LANCHOR180
+	.loc 2 1453 0
+	adrp	x2, .LANCHOR61
+	.loc 2 1455 0
 	adrp	x3, .LANCHOR3
-	.loc 2 1403 0
-	str	w1, [x0, #:lo12:.LANCHOR182]
-	.loc 2 1404 0
+	.loc 2 1452 0
+	str	w1, [x0, #:lo12:.LANCHOR180]
+	.loc 2 1453 0
 	adrp	x0, .LANCHOR19
-	.loc 2 1406 0
+	.loc 2 1455 0
 	ldrh	w3, [x3, #:lo12:.LANCHOR3]
-	.loc 2 1404 0
+	.loc 2 1453 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR62]
-	.loc 2 1405 0
+	str	w0, [x2, #:lo12:.LANCHOR61]
+	.loc 2 1454 0
 	adrp	x2, .LANCHOR12
 	ldrh	w2, [x2, #:lo12:.LANCHOR12]
 	mul	w0, w2, w0
 	adrp	x2, .LANCHOR34
 	str	w0, [x2, #:lo12:.LANCHOR34]
-	.loc 2 1406 0
+	.loc 2 1455 0
 	adrp	x0, .LANCHOR7
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	adrp	x0, .LANCHOR37+6
 	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
-	.loc 2 1412 0
+	.loc 2 1461 0
 	cmp	w1, w2
-	.loc 2 1406 0
+	.loc 2 1455 0
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
-	adrp	x3, .LANCHOR80
-	strh	w0, [x3, #:lo12:.LANCHOR80]
-	.loc 2 1412 0
-	bls	.L1586
-	.loc 2 1412 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR181
+	adrp	x3, .LANCHOR78
+	strh	w0, [x3, #:lo12:.LANCHOR78]
+	.loc 2 1461 0
+	bls	.L1576
+	.loc 2 1461 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC1
-	mov	w2, 1412
-	add	x1, x1, :lo12:.LANCHOR181
+	mov	w2, 1461
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2084:
-.L1586:
-	.loc 2 1414 0 is_stmt 1
-	add	x1, x19, :lo12:.LANCHOR79
+.LVL2064:
+.L1576:
+	.loc 2 1463 0 is_stmt 1
+	add	x1, x19, :lo12:.LANCHOR39
 	adrp	x0, .LANCHOR51
 	add	x3, x0, :lo12:.LANCHOR51
-	.loc 2 1419 0
-	adrp	x20, .LANCHOR82
-	.loc 2 1415 0
+	.loc 2 1468 0
+	adrp	x20, .LANCHOR80
+	.loc 2 1464 0
 	ldrh	w2, [x1, 16]
-	.loc 2 1414 0
+	.loc 2 1463 0
 	ldrh	w6, [x1, 14]
 	strh	w6, [x0, #:lo12:.LANCHOR51]
-	.loc 2 1415 0
+	.loc 2 1464 0
 	lsr	w4, w2, 6
-	.loc 2 1416 0
+	.loc 2 1465 0
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
-	.loc 2 1417 0
+	.loc 2 1466 0
 	ldrb	w2, [x1, 11]
 	strb	w2, [x3, 8]
-	.loc 2 1419 0
-	add	x2, x20, :lo12:.LANCHOR82
-	.loc 2 1415 0
+	.loc 2 1468 0
+	add	x2, x20, :lo12:.LANCHOR80
+	.loc 2 1464 0
 	strh	w4, [x3, 2]
-	.loc 2 1419 0
+	.loc 2 1468 0
 	mov	w3, -1
-	strh	w3, [x20, #:lo12:.LANCHOR82]
-	.loc 2 1420 0
+	strh	w3, [x20, #:lo12:.LANCHOR80]
+	.loc 2 1469 0
 	strh	wzr, [x2, 2]
-	.loc 2 1421 0
+	.loc 2 1470 0
 	strb	wzr, [x2, 6]
-	.loc 2 1422 0
+	.loc 2 1471 0
 	strb	wzr, [x2, 8]
-	.loc 2 1424 0
+	.loc 2 1473 0
 	adrp	x2, .LANCHOR52
 	ldrh	w3, [x1, 18]
 	add	x4, x2, :lo12:.LANCHOR52
 	strh	w3, [x2, #:lo12:.LANCHOR52]
 	mov	x21, x2
-	.loc 2 1425 0
+	.loc 2 1474 0
 	ldrh	w3, [x1, 20]
 	lsr	w5, w3, 6
-	.loc 2 1426 0
+	.loc 2 1475 0
 	and	w3, w3, 63
 	strb	w3, [x4, 6]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	ldrb	w3, [x1, 12]
-	.loc 2 1425 0
+	.loc 2 1474 0
 	strh	w5, [x4, 2]
-	.loc 2 1427 0
+	.loc 2 1476 0
 	strb	w3, [x4, 8]
-	.loc 2 1429 0
+	.loc 2 1478 0
 	adrp	x4, .LANCHOR53
 	ldrh	w3, [x1, 22]
 	add	x5, x4, :lo12:.LANCHOR53
 	strh	w3, [x4, #:lo12:.LANCHOR53]
 	mov	x22, x4
-	.loc 2 1430 0
+	.loc 2 1479 0
 	ldrh	w3, [x1, 24]
 	lsr	w7, w3, 6
-	.loc 2 1431 0
+	.loc 2 1480 0
 	and	w3, w3, 63
 	strb	w3, [x5, 6]
-	.loc 2 1432 0
+	.loc 2 1481 0
 	ldrb	w3, [x1, 13]
 	strb	w3, [x5, 8]
-	.loc 2 1434 0
-	adrp	x3, .LANCHOR68
-	.loc 2 1430 0
+	.loc 2 1483 0
+	adrp	x3, .LANCHOR67
+	.loc 2 1479 0
 	strh	w7, [x5, 2]
-	.loc 2 1439 0
+	.loc 2 1488 0
 	ldr	w5, [x1, 32]
-	.loc 2 1434 0
-	str	wzr, [x3, #:lo12:.LANCHOR68]
-	.loc 2 1435 0
-	adrp	x3, .LANCHOR65
-	str	wzr, [x3, #:lo12:.LANCHOR65]
-	.loc 2 1436 0
-	adrp	x3, .LANCHOR63
-	str	wzr, [x3, #:lo12:.LANCHOR63]
-	.loc 2 1437 0
-	adrp	x3, .LANCHOR67
+	.loc 2 1483 0
 	str	wzr, [x3, #:lo12:.LANCHOR67]
-	.loc 2 1439 0
-	adrp	x3, .LANCHOR73
-	str	w5, [x3, #:lo12:.LANCHOR73]
-	.loc 2 1440 0
-	adrp	x3, .LANCHOR74
-	str	wzr, [x3, #:lo12:.LANCHOR74]
-	.loc 2 1441 0
-	adrp	x3, .LANCHOR77
-	str	wzr, [x3, #:lo12:.LANCHOR77]
-	.loc 2 1442 0
+	.loc 2 1484 0
+	adrp	x3, .LANCHOR64
+	str	wzr, [x3, #:lo12:.LANCHOR64]
+	.loc 2 1485 0
+	adrp	x3, .LANCHOR62
+	str	wzr, [x3, #:lo12:.LANCHOR62]
+	.loc 2 1486 0
 	adrp	x3, .LANCHOR66
 	str	wzr, [x3, #:lo12:.LANCHOR66]
-	.loc 2 1444 0
+	.loc 2 1488 0
+	adrp	x3, .LANCHOR72
+	str	w5, [x3, #:lo12:.LANCHOR72]
+	.loc 2 1489 0
+	adrp	x3, .LANCHOR73
+	str	wzr, [x3, #:lo12:.LANCHOR73]
+	.loc 2 1490 0
+	adrp	x3, .LANCHOR76
+	str	wzr, [x3, #:lo12:.LANCHOR76]
+	.loc 2 1491 0
+	adrp	x3, .LANCHOR65
+	str	wzr, [x3, #:lo12:.LANCHOR65]
+	.loc 2 1493 0
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR71
-	ldr	w5, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR70
+	ldr	w5, [x1, #:lo12:.LANCHOR70]
 	cmp	w3, w5
-	bls	.L1587
-	.loc 2 1445 0
-	str	w3, [x1, #:lo12:.LANCHOR71]
-.L1587:
-	.loc 2 1447 0
-	add	x19, x19, :lo12:.LANCHOR79
-	adrp	x1, .LANCHOR72
-	ldr	w3, [x1, #:lo12:.LANCHOR72]
+	bls	.L1577
+	.loc 2 1494 0
+	str	w3, [x1, #:lo12:.LANCHOR70]
+.L1577:
+	.loc 2 1496 0
+	add	x19, x19, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR71
+	ldr	w3, [x1, #:lo12:.LANCHOR71]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1588
-	.loc 2 1448 0
-	str	w2, [x1, #:lo12:.LANCHOR72]
-.L1588:
-	.loc 2 1450 0
+	bls	.L1578
+	.loc 2 1497 0
+	str	w2, [x1, #:lo12:.LANCHOR71]
+.L1578:
+	.loc 2 1499 0
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1589
-	.loc 2 1451 0
+	beq	.L1579
+	.loc 2 1500 0
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2085:
-.L1589:
-	.loc 2 1453 0
+.LVL2065:
+.L1579:
+	.loc 2 1502 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1590
-	.loc 2 1454 0
+	beq	.L1580
+	.loc 2 1503 0
 	bl	make_superblock
-.LVL2086:
-.L1590:
-	.loc 2 1456 0
+.LVL2066:
+.L1580:
+	.loc 2 1505 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1591
-	.loc 2 1457 0
+	beq	.L1581
+	.loc 2 1506 0
 	bl	make_superblock
-.LVL2087:
-.L1591:
-	.loc 2 1459 0
-	ldrh	w2, [x20, #:lo12:.LANCHOR82]
+.LVL2067:
+.L1581:
+	.loc 2 1508 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
 	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR82
+	add	x0, x20, :lo12:.LANCHOR80
 	cmp	w2, w1
-	beq	.L1592
-	.loc 2 1460 0
+	beq	.L1582
+	.loc 2 1509 0
 	bl	make_superblock
-.LVL2088:
-.L1592:
-	.loc 2 1462 0
-	mov	w0, 0
-	b	.L1576
-.LVL2089:
+.LVL2068:
 .L1582:
-	.loc 2 1376 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR81]
-	.loc 2 1378 0
+	.loc 2 1511 0
+	mov	w0, 0
+	b	.L1566
+.LVL2069:
+.L1572:
+	.loc 2 1425 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	.loc 2 1427 0
 	mov	w2, 1
 	mov	w1, w2
-	.loc 2 1376 0
+	.loc 2 1425 0
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x21, 4]
-	.loc 2 1377 0
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 1426 0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
 	str	x0, [x21, 8]
-	.loc 2 1378 0
+	.loc 2 1427 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2090:
-	.loc 2 1381 0
+.LVL2070:
+	.loc 2 1430 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1580
-	.loc 2 1382 0 discriminator 1
-	ldr	x0, [x23, #:lo12:.LANCHOR39]
-	.loc 2 1381 0 discriminator 1
+	beq	.L1570
+	.loc 2 1431 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	.loc 2 1430 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1580
-	.loc 2 1383 0
-	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	bne	.L1570
+	.loc 2 1432 0
+	ldr	x0, [x26, #:lo12:.LANCHOR108]
 	ldrh	w0, [x0]
-	.loc 2 1382 0
+	.loc 2 1431 0
 	cmp	w0, w28
-	beq	.L1581
-.L1580:
+	beq	.L1571
+.L1570:
 	sub	w22, w22, #1
-.LVL2091:
+.LVL2071:
 	sxth	w22, w22
-.LVL2092:
-	b	.L1579
+.LVL2072:
+	b	.L1569
 	.cfi_endproc
 .LFE274:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -20556,51 +20527,51 @@ FtlLoadSysInfo:
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
 .LFB292:
-	.loc 2 2306 0
+	.loc 2 2356 0
 	.cfi_startproc
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
 	.cfi_offset 30, -56
-	.loc 2 2312 0
+	.loc 2 2362 0
 	adrp	x0, .LANCHOR4
-	.loc 2 2306 0
+	.loc 2 2356 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	.loc 2 2312 0
+	.loc 2 2362 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
-	.loc 2 2306 0
+	.loc 2 2356 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -48
 	.cfi_offset 20, -40
-	.loc 2 2310 0
-	adrp	x20, .LANCHOR162
-	.loc 2 2306 0
+	.loc 2 2360 0
+	adrp	x20, .LANCHOR161
+	.loc 2 2356 0
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 21, -32
 	.cfi_offset 22, -24
 	.cfi_offset 23, -16
 	.cfi_offset 24, -8
-	.loc 2 2310 0
-	strh	wzr, [x20, #:lo12:.LANCHOR162]
-	.loc 2 2312 0
+	.loc 2 2360 0
+	strh	wzr, [x20, #:lo12:.LANCHOR161]
+	.loc 2 2362 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2093:
-	.loc 2 2313 0
+.LVL2073:
+	.loc 2 2363 0
 	bl	FtlScanSysBlk
-.LVL2094:
-	.loc 2 2314 0
-	adrp	x0, .LANCHOR81
-	ldrh	w1, [x0, #:lo12:.LANCHOR81]
+.LVL2074:
+	.loc 2 2364 0
+	adrp	x0, .LANCHOR79
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1599
-.L1601:
-	.loc 2 2315 0
+	bne	.L1589
+.L1591:
+	.loc 2 2365 0
 	mov	w23, -1
-.L1598:
-	.loc 2 2398 0
+.L1588:
+	.loc 2 2451 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -20617,201 +20588,204 @@ FtlSysBlkInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1599:
+.L1589:
 	.cfi_restore_state
-	.loc 2 2317 0
+	.loc 2 2367 0
 	bl	FtlLoadSysInfo
-.LVL2095:
+.LVL2075:
 	mov	w23, w0
-	cbnz	w0, .L1601
-	.loc 2 2320 0
+	cbnz	w0, .L1591
+	.loc 2 2370 0
 	bl	FtlLoadMapInfo
-.LVL2096:
-	.loc 2 2321 0
+.LVL2076:
+	.loc 2 2371 0
 	bl	FtlLoadVonderInfo
-.LVL2097:
-	.loc 2 2322 0
+.LVL2077:
+	.loc 2 2372 0
 	bl	Ftl_load_ext_data
-.LVL2098:
-	.loc 2 2324 0
+.LVL2078:
+	.loc 2 2374 0
 	bl	FtlLoadEctTbl
-.LVL2099:
-	.loc 2 2325 0
+.LVL2079:
+	.loc 2 2375 0
 	bl	FtlFreeSysBLkSort
-.LVL2100:
-	.loc 2 2327 0
+.LVL2080:
+	.loc 2 2377 0
 	bl	SupperBlkListInit
-.LVL2101:
-	.loc 2 2328 0
+.LVL2081:
+	.loc 2 2378 0
 	bl	FtlPowerLostRecovery
-.LVL2102:
-	.loc 2 2330 0
+.LVL2082:
+	.loc 2 2380 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2103:
-.LBB303:
-.LBB304:
-	.loc 2 2332 0
+.LVL2083:
+.LBB338:
+.LBB339:
+	.loc 2 2382 0
 	adrp	x0, .LANCHOR33
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
-	.loc 2 2333 0
-	adrp	x0, .LANCHOR56
-	ldr	x1, [x0, #:lo12:.LANCHOR56]
-	.loc 2 2332 0
+	.loc 2 2383 0
+	adrp	x0, .LANCHOR55
+	ldr	x1, [x0, #:lo12:.LANCHOR55]
+	.loc 2 2382 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1602:
-.LVL2104:
+.L1592:
+.LVL2084:
 	cmp	w0, w2
-	bge	.L1607
-	.loc 2 2333 0
+	bge	.L1597
+	.loc 2 2383 0
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1603
-.L1607:
-	.loc 2 2336 0
-	adrp	x19, .LANCHOR79
-	add	x3, x19, :lo12:.LANCHOR79
-	.loc 2 2338 0
+	tbz	w3, #31, .L1593
+.L1597:
+	.loc 2 2386 0
+	adrp	x19, .LANCHOR39
+	add	x3, x19, :lo12:.LANCHOR39
+	.loc 2 2388 0
 	cmp	w0, w2
 	adrp	x22, .LANCHOR51
-	.loc 2 2336 0
+	.loc 2 2386 0
 	ldrh	w1, [x3, 28]
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
-	.loc 2 2338 0
-	bge	.L1613
-.LVL2105:
-.L1604:
-	.loc 2 2339 0
+	.loc 2 2388 0
+	bge	.L1601
+.LVL2085:
+.L1594:
+	.loc 2 2389 0
 	add	x21, x22, :lo12:.LANCHOR51
-	.loc 2 2340 0
+	.loc 2 2390 0
 	adrp	x24, .LANCHOR52
-	.loc 2 2339 0
+	.loc 2 2389 0
 	mov	x0, x21
-	.loc 2 2340 0
+	.loc 2 2390 0
 	add	x20, x24, :lo12:.LANCHOR52
-	.loc 2 2339 0
+	.loc 2 2389 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2106:
-	.loc 2 2340 0
+.LVL2086:
+	.loc 2 2390 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2107:
-.LBB305:
-	.loc 2 2346 0
-	adrp	x0, .LANCHOR43
+.LVL2087:
+.LBB340:
+	.loc 2 2396 0
+	adrp	x0, .LANCHOR42
 	ldrh	w3, [x21, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR43]
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w3
-	.loc 2 2347 0
+	.loc 2 2397 0
 	adrp	x3, .LANCHOR19
-	.loc 2 2346 0
+	.loc 2 2396 0
 	strh	w2, [x1, x0]
-	.loc 2 2348 0
+	.loc 2 2398 0
 	strb	wzr, [x21, 6]
-	.loc 2 2347 0
+	.loc 2 2397 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x21, 2]
-	.loc 2 2352 0
+	.loc 2 2402 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
-	.loc 2 2349 0
+	.loc 2 2399 0
 	strh	wzr, [x21, 4]
-.LVL2108:
-	.loc 2 2352 0
+.LVL2088:
+	.loc 2 2402 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w4
 	strh	w2, [x1, x0]
-	.loc 2 2354 0
+	.loc 2 2404 0
 	strb	wzr, [x20, 6]
-	.loc 2 2353 0
+	.loc 2 2403 0
 	ldrh	w0, [x3, #:lo12:.LANCHOR19]
 	strh	w0, [x20, 2]
-	.loc 2 2355 0
+	.loc 2 2405 0
 	strh	wzr, [x20, 4]
-.LBE305:
-	.loc 2 2359 0
+.LBE340:
+	.loc 2 2409 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2109:
-	.loc 2 2360 0
+.LVL2089:
+	.loc 2 2410 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2110:
-	.loc 2 2372 0
-	add	x1, x19, :lo12:.LANCHOR79
+.LVL2090:
+	.loc 2 2422 0
+	add	x1, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x1, 30]
 	add	w0, w0, 1
 	strh	w0, [x1, 30]
-	.loc 2 2373 0
+	.loc 2 2423 0
 	bl	l2p_flush
-.LVL2111:
-	.loc 2 2374 0
-	bl	FtlVpcTblFlush
-.LVL2112:
-	.loc 2 2375 0
+.LVL2091:
+	.loc 2 2424 0
 	bl	FtlVpcTblFlush
-.LVL2113:
-	b	.L1608
-.LVL2114:
+.LVL2092:
 .L1603:
-	.loc 2 2332 0
-	add	w0, w0, 1
-.LVL2115:
-	b	.L1602
-.L1613:
-	.loc 2 2338 0
-	ldrh	w0, [x20, #:lo12:.LANCHOR162]
-.LVL2116:
-	cbnz	w0, .L1604
-.L1608:
-	.loc 2 2379 0
+	.loc 2 2428 0
+	bl	FtlVpcTblFlush
+.LVL2093:
+	.loc 2 2432 0
+	add	x21, x22, :lo12:.LANCHOR51
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
-	add	x21, x22, :lo12:.LANCHOR51
 	cmp	w0, w1
-	beq	.L1609
+	beq	.L1600
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1609
-	.loc 2 2381 0
+	cbnz	w1, .L1600
+	.loc 2 2434 0
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
-	.loc 2 2380 0
+	.loc 2 2433 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1609
-	.loc 2 2382 0
+	cbnz	w1, .L1600
+	.loc 2 2435 0
 	bl	FtlGcRefreshBlock
-.LVL2117:
-	.loc 2 2383 0
+.LVL2094:
+	.loc 2 2436 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2118:
-	.loc 2 2384 0
+.LVL2095:
+	.loc 2 2437 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2119:
-	.loc 2 2385 0
+.LVL2096:
+	.loc 2 2438 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2120:
-.L1609:
-	.loc 2 2390 0
-	add	x19, x19, :lo12:.LANCHOR79
+.LVL2097:
+.L1600:
+	.loc 2 2443 0
+	add	x19, x19, :lo12:.LANCHOR39
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1598
-	.loc 2 2391 0
+	bne	.L1588
+	.loc 2 2444 0
 	bl	FtlVpcCheckAndModify
-.LVL2121:
-	b	.L1598
-.LBE304:
-.LBE303:
+.LVL2098:
+	b	.L1588
+.LVL2099:
+.L1593:
+	.loc 2 2382 0
+	add	w0, w0, 1
+.LVL2100:
+	b	.L1592
+.L1601:
+	.loc 2 2388 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR161]
+.LVL2101:
+	cbnz	w0, .L1594
+	.loc 2 2427 0
+	bl	l2p_flush
+.LVL2102:
+	b	.L1603
+.LBE339:
+.LBE338:
 	.cfi_endproc
 .LFE292:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -20828,7 +20802,7 @@ ftl_low_format:
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
 	.loc 3 630 0
-	adrp	x0, .LANCHOR72
+	adrp	x0, .LANCHOR71
 	.loc 3 623 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -20838,7 +20812,7 @@ ftl_low_format:
 	.loc 3 631 0
 	adrp	x24, .LANCHOR4
 	.loc 3 630 0
-	str	wzr, [x0, #:lo12:.LANCHOR72]
+	str	wzr, [x0, #:lo12:.LANCHOR71]
 	.loc 3 631 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 623 0
@@ -20846,7 +20820,7 @@ ftl_low_format:
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
 	.loc 3 629 0
-	adrp	x20, .LANCHOR71
+	adrp	x20, .LANCHOR70
 	.loc 3 623 0
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
@@ -20855,22 +20829,22 @@ ftl_low_format:
 	.cfi_offset 25, -16
 	.cfi_offset 26, -8
 	.loc 3 629 0
-	str	wzr, [x20, #:lo12:.LANCHOR71]
+	str	wzr, [x20, #:lo12:.LANCHOR70]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2122:
+.LVL2103:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2123:
-	cbz	w0, .L1616
+.LVL2104:
+	cbz	w0, .L1605
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2124:
-.L1616:
+.LVL2105:
+.L1605:
 	.loc 3 635 0 discriminator 1
 	adrp	x23, .LANCHOR12
 	.loc 3 636 0 discriminator 1
-	adrp	x0, .LANCHOR116
+	adrp	x0, .LANCHOR115
 	.loc 3 637 0 discriminator 1
 	mov	w6, 23752
 	.loc 3 635 0 discriminator 1
@@ -20878,20 +20852,20 @@ ftl_low_format:
 	.loc 3 637 0 discriminator 1
 	movk	w6, 0xa0f, lsl 16
 	.loc 3 636 0 discriminator 1
-	ldr	x4, [x0, #:lo12:.LANCHOR116]
+	ldr	x4, [x0, #:lo12:.LANCHOR115]
 	.loc 3 637 0 discriminator 1
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR113
 	.loc 3 635 0 discriminator 1
 	lsl	w1, w1, 7
 	.loc 3 637 0 discriminator 1
-	ldr	x5, [x0, #:lo12:.LANCHOR114]
+	ldr	x5, [x0, #:lo12:.LANCHOR113]
 	mov	w0, 0
-.L1617:
-.LVL2125:
+.L1606:
+.LVL2106:
 	.loc 3 635 0 discriminator 1
 	cmp	w0, w1
-	blt	.L1618
-.LVL2126:
+	blt	.L1607
+.LVL2107:
 	.loc 3 642 0
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
@@ -20900,94 +20874,94 @@ ftl_low_format:
 	mov	w19, 0
 	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2127:
-.L1619:
+.LVL2108:
+.L1608:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1620
+	bhi	.L1609
 	.loc 3 645 0 is_stmt 1
 	adrp	x25, .LANCHOR3
-.LVL2128:
+.LVL2109:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1621
-.LVL2129:
-.L1625:
+	bgt	.L1610
+.LVL2110:
+.L1614:
 	.loc 3 656 0
 	add	x26, x21, :lo12:.LANCHOR5
 	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1622:
-.LVL2130:
+.L1611:
+.LVL2111:
 	.loc 3 656 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1626
+	bhi	.L1615
 	.loc 3 658 0
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR112
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
 	.loc 3 661 0
 	ldrh	w4, [x25, #:lo12:.LANCHOR3]
 	.loc 3 662 0
-	adrp	x2, .LANCHOR80
+	adrp	x2, .LANCHOR78
 	.loc 3 658 0
-	str	w1, [x0, #:lo12:.LANCHOR113]
+	str	w1, [x0, #:lo12:.LANCHOR112]
 	.loc 3 661 0
 	adrp	x0, .LANCHOR7
-	adrp	x3, .LANCHOR62
+	adrp	x3, .LANCHOR61
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
 	udiv	w5, w1, w4
 	.loc 3 662 0
 	ubfx	x0, x5, 5, 16
 	.loc 3 661 0
-	str	w5, [x3, #:lo12:.LANCHOR62]
+	str	w5, [x3, #:lo12:.LANCHOR61]
 	.loc 3 662 0
 	add	w6, w0, 36
-	strh	w6, [x2, #:lo12:.LANCHOR80]
+	strh	w6, [x2, #:lo12:.LANCHOR78]
 	.loc 3 663 0
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1627
+	ble	.L1616
 	.loc 3 664 0
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
-	str	w1, [x3, #:lo12:.LANCHOR62]
+	str	w1, [x3, #:lo12:.LANCHOR61]
 	.loc 3 665 0
 	lsr	w1, w1, 5
 	add	w1, w1, 24
-	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1627:
+	strh	w1, [x2, #:lo12:.LANCHOR78]
+.L1616:
 	.loc 3 668 0
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1629
+	cbz	w1, .L1618
 	.loc 3 669 0
-	ldrh	w6, [x2, #:lo12:.LANCHOR80]
+	ldrh	w6, [x2, #:lo12:.LANCHOR78]
 	add	w6, w6, w1, lsr 1
-	strh	w6, [x2, #:lo12:.LANCHOR80]
+	strh	w6, [x2, #:lo12:.LANCHOR78]
 	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1629
+	bge	.L1618
 	.loc 3 672 0
 	add	w1, w1, 32
 	.loc 3 671 0
-	str	w5, [x3, #:lo12:.LANCHOR62]
+	str	w5, [x3, #:lo12:.LANCHOR61]
 	.loc 3 672 0
 	add	w1, w0, w1
-	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1629:
+	strh	w1, [x2, #:lo12:.LANCHOR78]
+.L1618:
 	.loc 3 677 0
-	ldrh	w1, [x2, #:lo12:.LANCHOR80]
-	adrp	x25, .LANCHOR182
-	ldr	w0, [x3, #:lo12:.LANCHOR62]
+	ldrh	w1, [x2, #:lo12:.LANCHOR78]
+	adrp	x25, .LANCHOR180
+	ldr	w0, [x3, #:lo12:.LANCHOR61]
 	.loc 3 687 0
-	adrp	x24, .LANCHOR43
-.LVL2131:
+	adrp	x24, .LANCHOR42
+.LVL2112:
 	.loc 3 677 0
 	sub	w0, w0, w1
 	.loc 3 678 0
@@ -20995,13 +20969,13 @@ ftl_low_format:
 	ldrh	w1, [x1, #:lo12:.LANCHOR19]
 	.loc 3 677 0
 	mul	w0, w0, w4
-	str	w0, [x25, #:lo12:.LANCHOR182]
+	str	w0, [x25, #:lo12:.LANCHOR180]
 	.loc 3 678 0
 	mul	w0, w1, w0
 	.loc 3 679 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR12]
 	.loc 3 678 0
-	str	w0, [x3, #:lo12:.LANCHOR62]
+	str	w0, [x3, #:lo12:.LANCHOR61]
 	.loc 3 689 0
 	mov	w23, -1
 	.loc 3 679 0
@@ -21010,25 +20984,25 @@ ftl_low_format:
 	str	w0, [x1, #:lo12:.LANCHOR34]
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2132:
+.LVL2113:
 	.loc 3 687 0
-	ldr	x0, [x24, #:lo12:.LANCHOR43]
+	ldr	x0, [x24, #:lo12:.LANCHOR42]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2133:
+.LVL2114:
 	.loc 3 688 0
-	adrp	x0, .LANCHOR60
+	adrp	x0, .LANCHOR59
 	.loc 3 689 0
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR80
 	.loc 3 698 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR5]
 	.loc 3 688 0
-	str	wzr, [x0, #:lo12:.LANCHOR60]
+	str	wzr, [x0, #:lo12:.LANCHOR59]
 	.loc 3 689 0
-	add	x0, x1, :lo12:.LANCHOR82
-	strh	w23, [x1, #:lo12:.LANCHOR82]
+	add	x0, x1, :lo12:.LANCHOR80
+	strh	w23, [x1, #:lo12:.LANCHOR80]
 	.loc 3 698 0
 	mov	w1, 255
 	lsr	w2, w2, 3
@@ -21041,7 +21015,7 @@ ftl_low_format:
 	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2134:
+.LVL2115:
 	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
 	.loc 3 697 0
@@ -21057,18 +21031,18 @@ ftl_low_format:
 	strb	wzr, [x19, 6]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL2135:
-.L1631:
+.LVL2116:
+.L1620:
 	.loc 3 701 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2136:
+.LVL2117:
 	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1632
+	cbnz	w1, .L1621
 	.loc 3 705 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	.loc 3 706 0
@@ -21076,103 +21050,103 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 707 0
-	b	.L1631
-.LVL2137:
-.L1618:
+	b	.L1620
+.LVL2118:
+.L1607:
 	.loc 3 636 0 discriminator 3
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2138:
+.LVL2119:
 	and	w0, w0, 65535
-.LVL2139:
+.LVL2120:
 	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
 	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1617
-.LVL2140:
-.L1620:
+	b	.L1606
+.LVL2121:
+.L1609:
 	.loc 3 643 0 discriminator 3
 	mov	w0, w25
 	mov	w1, 1
 	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2141:
+.LVL2122:
 	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2142:
+.LVL2123:
 	add	w19, w19, w0
-.LVL2143:
+.LVL2124:
 	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
 	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2144:
-	b	.L1619
-.LVL2145:
-.L1621:
+.LVL2125:
+	b	.L1608
+.LVL2126:
+.L1610:
 	.loc 3 647 0
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2146:
+.LVL2127:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2147:
+.LVL2128:
 	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
 	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2148:
+.LVL2129:
 	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2149:
-.L1623:
+.LVL2130:
+.L1612:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1625
+	bls	.L1614
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2150:
+.LVL2131:
 	.loc 3 651 0 discriminator 3
 	mov	w1, 1
 	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2151:
-	b	.L1623
-.LVL2152:
-.L1626:
+.LVL2132:
+	b	.L1612
+.LVL2133:
+.L1615:
 	.loc 3 657 0 discriminator 3
 	mov	w0, w24
 	mov	w1, 0
 	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2153:
+.LVL2134:
 	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2154:
+.LVL2135:
 	add	w19, w19, w0
-.LVL2155:
+.LVL2136:
 	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
 	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2156:
-	b	.L1622
-.LVL2157:
-.L1632:
+.LVL2137:
+	b	.L1611
+.LVL2138:
+.L1621:
 	.loc 3 709 0
-	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 710 0
 	ubfiz	x0, x0, 1, 16
 	.loc 3 709 0
@@ -21181,9 +21155,9 @@ ftl_low_format:
 	mov	w23, -1
 	.loc 3 709 0
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR71]
+	str	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 710 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
 	.loc 3 712 0
@@ -21205,17 +21179,17 @@ ftl_low_format:
 	strb	wzr, [x0, 6]
 	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1633:
+.L1622:
 	.loc 3 717 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2158:
+.LVL2139:
 	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1634
+	cbnz	w1, .L1623
 	.loc 3 721 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	.loc 3 722 0
@@ -21223,57 +21197,57 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 723 0
-	b	.L1633
-.L1634:
+	b	.L1622
+.L1623:
 	.loc 3 725 0
-	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	ldr	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 726 0
 	ubfiz	x0, x0, 1, 16
 	.loc 3 725 0
 	str	w1, [x19, 12]
-	.loc 3 727 0
-	mov	w4, -1
-	.loc 3 725 0
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR71]
+	str	w1, [x20, #:lo12:.LANCHOR70]
 	.loc 3 726 0
-	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldr	x1, [x24, #:lo12:.LANCHOR42]
 	ldrh	w2, [x19, 4]
+	.loc 3 727 0
+	mov	w19, -1
+	.loc 3 726 0
 	strh	w2, [x1, x0]
 	.loc 3 727 0
 	adrp	x0, .LANCHOR53
-	strh	w4, [x0, #:lo12:.LANCHOR53]
+	strh	w19, [x0, #:lo12:.LANCHOR53]
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2159:
-	adrp	x2, .LANCHOR81
-	add	x1, x2, :lo12:.LANCHOR81
-	strh	w0, [x2, #:lo12:.LANCHOR81]
+.LVL2140:
+	adrp	x2, .LANCHOR79
+	add	x1, x2, :lo12:.LANCHOR79
+	strh	w0, [x2, #:lo12:.LANCHOR79]
 	.loc 3 733 0
-	ldr	w0, [x25, #:lo12:.LANCHOR182]
+	ldr	w0, [x25, #:lo12:.LANCHOR180]
 	strh	w0, [x1, 6]
 	.loc 3 734 0
-	ldr	w0, [x20, #:lo12:.LANCHOR71]
+	ldr	w0, [x20, #:lo12:.LANCHOR70]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	.loc 3 731 0
 	strh	wzr, [x1, 2]
 	.loc 3 732 0
-	strh	w4, [x1, 4]
+	strh	w19, [x1, 4]
 	.loc 3 734 0
-	str	w0, [x20, #:lo12:.LANCHOR71]
+	str	w0, [x20, #:lo12:.LANCHOR70]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2160:
+.LVL2141:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2161:
-	cbnz	w0, .L1635
+.LVL2142:
+	cbnz	w0, .L1624
 	.loc 3 737 0
-	adrp	x0, .LANCHOR88
+	adrp	x0, .LANCHOR86
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR88]
-.L1635:
+	str	w1, [x0, #:lo12:.LANCHOR86]
+.L1624:
 	.loc 3 739 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -21304,7 +21278,7 @@ sftl_init:
 .LFB211:
 	.loc 3 743 0
 	.cfi_startproc
-.LVL2162:
+.LVL2143:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -21320,62 +21294,62 @@ sftl_init:
 	str	x19, [sp, 16]
 	.cfi_offset 19, -16
 	.loc 3 746 0
-	adrp	x19, .LANCHOR88
-	str	w0, [x19, #:lo12:.LANCHOR88]
+	adrp	x19, .LANCHOR86
+	str	w0, [x19, #:lo12:.LANCHOR86]
 	.loc 3 749 0
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2163:
+.LVL2144:
 	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2164:
+.LVL2145:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2165:
+.LVL2146:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2166:
+.LVL2147:
 	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2167:
+.LVL2148:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2168:
-	cbnz	w0, .L1644
+.LVL2149:
+	cbnz	w0, .L1633
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2169:
-	cbnz	w0, .L1644
+.LVL2150:
+	cbnz	w0, .L1633
 	.loc 3 779 0
 	mov	w0, 1
-	str	w0, [x19, #:lo12:.LANCHOR88]
+	str	w0, [x19, #:lo12:.LANCHOR86]
 	.loc 3 783 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1644
+	bhi	.L1633
 	mov	w19, 8129
-.L1643:
-.LVL2170:
-.LBB306:
+.L1632:
+.LVL2151:
+.LBB341:
 	.loc 3 786 0 discriminator 3
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2171:
+.LVL2152:
 	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2172:
-	bne	.L1643
-.LVL2173:
-.L1644:
-.LBE306:
+.LVL2153:
+	bne	.L1632
+.LVL2154:
+.L1633:
+.LBE341:
 	.loc 3 794 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -21396,11 +21370,11 @@ ftl_memcmp:
 .LFB348:
 	.loc 1 252 0
 	.cfi_startproc
-.LVL2174:
+.LVL2155:
 	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2175:
+.LVL2156:
 	.cfi_endproc
 .LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -21502,7 +21476,6 @@ ftl_memcmp:
 	.global	p_sys_data_buf_1
 	.global	p_sys_data_buf
 	.global	p_plane_order_table
-	.global	g_req_cache
 	.global	req_gc_dst
 	.global	req_gc
 	.global	req_erase
@@ -21561,7 +21534,7 @@ DeviceCapacity:
 	.zero	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -21617,7 +21590,7 @@ c_ftl_nand_data_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
@@ -21785,7 +21758,7 @@ c_ftl_vendor_part_size:
 	.zero	2
 	.section	.bss.c_gc_page_buf_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
@@ -21805,7 +21778,7 @@ check_buf:
 	.zero	4096
 	.section	.bss.check_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	check_spare_buf, %object
 	.size	check_spare_buf, 512
 check_spare_buf:
@@ -21818,7 +21791,7 @@ check_vpc_table:
 	.zero	16384
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -21852,7 +21825,7 @@ gSysFreeQueue:
 	.zero	2056
 	.section	.bss.gSysInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
@@ -21866,14 +21839,14 @@ gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -21887,21 +21860,21 @@ g_MaxLbaSector:
 	.zero	4
 	.section	.bss.g_MaxLbn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
@@ -21922,7 +21895,7 @@ g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -21936,70 +21909,70 @@ g_ect_tbl_info_size:
 	.zero	2
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
 	.align	1
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
 	.zero	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.zero	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.zero	2
 	.section	.bss.g_gc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_cur_blk_max_valid_pages, %object
 	.size	g_gc_cur_blk_max_valid_pages, 2
 g_gc_cur_blk_max_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
@@ -22020,49 +21993,49 @@ g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_next_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.zero	2
 	.section	.bss.g_gc_next_blk_1,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.zero	2
 	.section	.bss.g_gc_num_req,"aw",@nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.zero	4
 	.section	.bss.g_gc_page_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
 	.zero	4
 	.section	.bss.g_gc_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
@@ -22083,35 +22056,35 @@ g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.zero	2
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nand_ops,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	g_nand_ops, %object
 	.size	g_nand_ops, 32
 g_nand_ops:
@@ -22139,91 +22112,84 @@ g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
 	.align	1
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
 	.zero	2
 	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.zero	4
 	.section	.bss.g_recovery_page_num,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
 	.zero	4
 	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.zero	128
-	.section	.bss.g_req_cache,"aw",@nobits
-	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 8
-g_req_cache:
-	.zero	8
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.zero	48
 	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.zero	2
 	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -22237,42 +22203,42 @@ g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.zero	4
 	.section	.bss.g_totle_read_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_swl_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -22286,28 +22252,28 @@ g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.zero	4
 	.section	.bss.g_totle_write_sector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
 	.zero	4
 	.section	.bss.gc_discard_updated,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.zero	4
 	.section	.bss.gc_ink_free_return_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	gc_ink_free_return_value, %object
 	.size	gc_ink_free_return_value, 2
 gc_ink_free_return_value:
@@ -22321,14 +22287,13 @@ gp_ect_tbl_info:
 	.zero	8
 	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 8
 gp_gc_page_buf_info:
 	.zero	8
 	.section	.bss.gp_last_act_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR171,. + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 8
 gp_last_act_superblock:
@@ -22342,14 +22307,14 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
@@ -22363,7 +22328,7 @@ p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
@@ -22377,49 +22342,49 @@ p_free_data_block_list_head:
 	.zero	8
 	.section	.bss.p_gc_blk_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 8
 p_gc_blk_tbl:
 	.zero	8
 	.section	.bss.p_gc_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 8
 p_gc_data_buf:
 	.zero	8
 	.section	.bss.p_gc_page_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 8
 p_gc_page_info:
 	.zero	8
 	.section	.bss.p_gc_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 8
 p_gc_spare_buf:
 	.zero	8
 	.section	.bss.p_io_data_buf_0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 8
 p_io_data_buf_0:
 	.zero	8
 	.section	.bss.p_io_data_buf_1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 8
 p_io_data_buf_1:
 	.zero	8
 	.section	.bss.p_io_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 8
 p_io_spare_buf:
@@ -22433,7 +22398,7 @@ p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
@@ -22482,7 +22447,7 @@ p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
@@ -22496,7 +22461,7 @@ p_sys_data_buf_1:
 	.zero	8
 	.section	.bss.p_sys_spare_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 8
 p_sys_spare_buf:
@@ -22510,7 +22475,7 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
@@ -22552,14 +22517,14 @@ p_vendor_region_ppn_table:
 	.zero	8
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
 	.zero	8
 	.section	.bss.req_gc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	req_gc, %object
 	.size	req_gc, 8
 req_gc:
@@ -22587,28 +22552,28 @@ req_read:
 	.zero	8
 	.section	.bss.req_sys,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	req_sys, %object
 	.size	req_sys, 32
 req_sys:
 	.zero	32
 	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
 	.align	1
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
 	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
 ftl_gc_temp_block_bops_scan_page_addr:
 	.hword	-1
 	.section	.data.gFtlInitStatus,"aw",@progbits
 	.align	2
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.data.power_up_flag,"aw",@progbits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	power_up_flag, %object
 	.size	power_up_flag, 4
 power_up_flag:
@@ -22624,14 +22589,19 @@ power_up_flag:
 .LC0:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC94:
+.LC97:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC95:
+.LC98:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC96:
+.LC99:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
+.LC82:
+	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
+.LC83:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
-.LC97:
+.LC100:
 	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
 	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
 .LC74:
@@ -22640,15 +22610,15 @@ power_up_flag:
 .LC73:
 	.string	"FtlGcRefreshBlock  0x%x\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC100:
+.LC103:
 	.string	"no ect"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC86:
+.LC89:
 	.string	"FtlMapWritePage error = %x \n"
-.LC87:
+.LC90:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
-.LC82:
+.LC85:
 	.string	"%s error allocating memory. return -1\n"
 	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
 .LC2:
@@ -22788,19 +22758,19 @@ power_up_flag:
 .LC69:
 	.string	"free %d. [0x%x] 0x%x  0x%x\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC103:
+.LC106:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC99:
+.LC102:
 	.string	"spuer block %x vpn is 0\n "
 	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
-.LC102:
+.LC105:
 	.string	"FtlCheckVpc %x = %x  %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC101:
+.LC104:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
-.LC105:
+.LC108:
 	.string	"FtlWrite: lpa error:%x %x\n"
 	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
 .LC72:
@@ -22808,184 +22778,184 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6104,"a",@progbits
+	.section	.rodata.__func__.6107,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6104, %object
-	.size	__func__.6104, 11
-__func__.6104:
+	.type	__func__.6107, %object
+	.size	__func__.6107, 11
+__func__.6107:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6228,"a",@progbits
+	.section	.rodata.__func__.6231,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6228, %object
-	.size	__func__.6228, 13
-__func__.6228:
+	.type	__func__.6231, %object
+	.size	__func__.6231, 13
+__func__.6231:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6256,"a",@progbits
+	.section	.rodata.__func__.6259,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.6256, %object
-	.size	__func__.6256, 9
-__func__.6256:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.6259, %object
+	.size	__func__.6259, 9
+__func__.6259:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6320,"a",@progbits
+	.section	.rodata.__func__.6323,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6320, %object
-	.size	__func__.6320, 14
-__func__.6320:
+	.type	__func__.6323, %object
+	.size	__func__.6323, 14
+__func__.6323:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6363,"a",@progbits
+	.section	.rodata.__func__.6366,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.6363, %object
-	.size	__func__.6363, 11
-__func__.6363:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.6366, %object
+	.size	__func__.6366, 11
+__func__.6366:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6486,"a",@progbits
+	.section	.rodata.__func__.6483,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6486, %object
-	.size	__func__.6486, 17
-__func__.6486:
+	.type	__func__.6483, %object
+	.size	__func__.6483, 17
+__func__.6483:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6491,"a",@progbits
+	.section	.rodata.__func__.6488,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6491, %object
-	.size	__func__.6491, 17
-__func__.6491:
+	.type	__func__.6488, %object
+	.size	__func__.6488, 17
+__func__.6488:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6521,"a",@progbits
+	.section	.rodata.__func__.6519,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6521, %object
-	.size	__func__.6521, 17
-__func__.6521:
+	.type	__func__.6519, %object
+	.size	__func__.6519, 17
+__func__.6519:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6553,"a",@progbits
+	.section	.rodata.__func__.6551,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6553, %object
-	.size	__func__.6553, 22
-__func__.6553:
+	.type	__func__.6551, %object
+	.size	__func__.6551, 22
+__func__.6551:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6562,"a",@progbits
+	.section	.rodata.__func__.6560,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6562, %object
-	.size	__func__.6562, 16
-__func__.6562:
+	.type	__func__.6560, %object
+	.size	__func__.6560, 16
+__func__.6560:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6594,"a",@progbits
+	.section	.rodata.__func__.6593,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.6594, %object
-	.size	__func__.6594, 26
-__func__.6594:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.6593, %object
+	.size	__func__.6593, 26
+__func__.6593:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6605,"a",@progbits
+	.section	.rodata.__func__.6604,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6605, %object
-	.size	__func__.6605, 15
-__func__.6605:
+	.type	__func__.6604, %object
+	.size	__func__.6604, 15
+__func__.6604:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6619,"a",@progbits
+	.section	.rodata.__func__.6618,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6619, %object
-	.size	__func__.6619, 31
-__func__.6619:
+	.type	__func__.6618, %object
+	.size	__func__.6618, 31
+__func__.6618:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6633,"a",@progbits
+	.section	.rodata.__func__.6632,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6633, %object
-	.size	__func__.6633, 16
-__func__.6633:
+	.type	__func__.6632, %object
+	.size	__func__.6632, 16
+__func__.6632:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6658,"a",@progbits
+	.section	.rodata.__func__.6657,"a",@progbits
 	.align	3
-	.set	.LANCHOR58,. + 0
-	.type	__func__.6658, %object
-	.size	__func__.6658, 22
-__func__.6658:
+	.set	.LANCHOR57,. + 0
+	.type	__func__.6657, %object
+	.size	__func__.6657, 22
+__func__.6657:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6675,"a",@progbits
+	.section	.rodata.__func__.6674,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6675, %object
-	.size	__func__.6675, 9
-__func__.6675:
+	.type	__func__.6674, %object
+	.size	__func__.6674, 9
+__func__.6674:
 	.string	"log2phys"
-	.section	.rodata.__func__.6748,"a",@progbits
+	.section	.rodata.__func__.6747,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
-	.type	__func__.6748, %object
-	.size	__func__.6748, 15
-__func__.6748:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.6747, %object
+	.size	__func__.6747, 15
+__func__.6747:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6770,"a",@progbits
+	.section	.rodata.__func__.6769,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6770, %object
-	.size	__func__.6770, 14
-__func__.6770:
+	.type	__func__.6769, %object
+	.size	__func__.6769, 14
+__func__.6769:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6827,"a",@progbits
+	.section	.rodata.__func__.6826,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.6827, %object
-	.size	__func__.6827, 15
-__func__.6827:
+	.set	.LANCHOR179,. + 0
+	.type	__func__.6826, %object
+	.size	__func__.6826, 15
+__func__.6826:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6890,"a",@progbits
+	.section	.rodata.__func__.6889,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6890, %object
-	.size	__func__.6890, 16
-__func__.6890:
+	.type	__func__.6889, %object
+	.size	__func__.6889, 16
+__func__.6889:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6924,"a",@progbits
+	.section	.rodata.__func__.6923,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.6924, %object
-	.size	__func__.6924, 22
-__func__.6924:
+	.set	.LANCHOR160,. + 0
+	.type	__func__.6923, %object
+	.size	__func__.6923, 22
+__func__.6923:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6981,"a",@progbits
+	.section	.rodata.__func__.6980,"a",@progbits
 	.align	3
-	.set	.LANCHOR61,. + 0
-	.type	__func__.6981, %object
-	.size	__func__.6981, 16
-__func__.6981:
+	.set	.LANCHOR60,. + 0
+	.type	__func__.6980, %object
+	.size	__func__.6980, 16
+__func__.6980:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7002,"a",@progbits
+	.section	.rodata.__func__.7001,"a",@progbits
 	.align	3
-	.set	.LANCHOR155,. + 0
-	.type	__func__.7002, %object
-	.size	__func__.7002, 18
-__func__.7002:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.7001, %object
+	.size	__func__.7001, 18
+__func__.7001:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7027,"a",@progbits
+	.section	.rodata.__func__.7026,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7027, %object
-	.size	__func__.7027, 21
-__func__.7027:
+	.type	__func__.7026, %object
+	.size	__func__.7026, 21
+__func__.7026:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7043,"a",@progbits
+	.section	.rodata.__func__.7042,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.7043, %object
-	.size	__func__.7043, 14
-__func__.7043:
+	.set	.LANCHOR155,. + 0
+	.type	__func__.7042, %object
+	.size	__func__.7042, 14
+__func__.7042:
 	.string	"ftl_check_vpc"
 	.section	.rodata.__func__.7127,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	__func__.7127, %object
 	.size	__func__.7127, 25
 __func__.7127:
@@ -22999,79 +22969,82 @@ __func__.7148:
 	.string	"allocate_new_data_superblock"
 	.section	.rodata.__func__.7155,"a",@progbits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	__func__.7155, %object
 	.size	__func__.7155, 19
 __func__.7155:
 	.string	"get_new_active_ppa"
 	.section	.rodata.__func__.7168,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	__func__.7168, %object
 	.size	__func__.7168, 16
 __func__.7168:
 	.string	"update_vpc_list"
 	.section	.rodata.__func__.7175,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	__func__.7175, %object
 	.size	__func__.7175, 20
 __func__.7175:
 	.string	"decrement_vpc_count"
 	.section	.rodata.__func__.7245,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.7245, %object
 	.size	__func__.7245, 19
 __func__.7245:
 	.string	"FtlGcFreeTempBlock"
 	.section	.rodata.__func__.7351,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	__func__.7351, %object
 	.size	__func__.7351, 23
 __func__.7351:
 	.string	"rk_ftl_garbage_collect"
 	.section	.rodata.__func__.7615,"a",@progbits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	__func__.7615, %object
 	.size	__func__.7615, 15
 __func__.7615:
 	.string	"FlashReadPages"
 	.section	.rodata.__func__.7632,"a",@progbits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	__func__.7632, %object
 	.size	__func__.7632, 15
 __func__.7632:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC98:
+.LC101:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
-.LC91:
+.LC94:
 	.string	"...%s enter...\n"
-.LC92:
+.LC95:
 	.string	"FtlCheckVpc2 %x = %x  %x\n"
-.LC93:
+.LC96:
 	.string	"free blk vpc error %x = %x  %x\n"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
+.LC84:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC88:
+.LC91:
 	.string	"ftl_scan_all_data = %x\n"
-.LC89:
+.LC92:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC90:
+.LC93:
 	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC83:
+.LC86:
 	.string	"region_id = %x phyAddr = %x\n"
-.LC84:
+.LC87:
 	.string	"spare:"
-.LC85:
+.LC88:
 	.string	"map_ppn:"
 	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
-.LC104:
+.LC107:
 	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC75:
@@ -23084,7 +23057,7 @@ __func__.7632:
 	.string	"\n"
 	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
 .LC70:
-	.string	"SFTL version: 5.0.43 20180116"
+	.string	"SFTL version: 5.0.44 20180713"
 .LC71:
 	.string	"%s\n"
 	.text
@@ -23116,16 +23089,16 @@ __func__.7632:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0xa977
+	.4byte	0xa979
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF882
+	.4byte	.LASF880
 	.byte	0xc
-	.4byte	.LASF883
-	.4byte	.LASF884
-	.4byte	.Ldebug_ranges0+0x330
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x3c0
 	.8byte	0
 	.4byte	.Ldebug_line0
 	.uleb128 0x2
@@ -26344,106 +26317,98 @@ __func__.7632:
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	req_gc_dst
-	.uleb128 0x28
-	.4byte	.LASF443
-	.byte	0x1b
-	.byte	0x4d
-	.4byte	0x1abc
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	g_req_cache
 	.uleb128 0xa
 	.4byte	0xdbe
-	.4byte	0x1b3b
+	.4byte	0x1b26
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x28
-	.4byte	.LASF444
+	.4byte	.LASF443
 	.byte	0x1b
-	.byte	0x4f
-	.4byte	0x1b2b
+	.byte	0x4d
+	.4byte	0x1b16
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_plane_order_table
 	.uleb128 0x28
-	.4byte	.LASF445
+	.4byte	.LASF444
 	.byte	0x1b
-	.byte	0x51
+	.byte	0x4f
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_sys_data_buf
 	.uleb128 0x28
-	.4byte	.LASF446
+	.4byte	.LASF445
 	.byte	0x1b
-	.byte	0x52
+	.byte	0x50
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_sys_data_buf_1
 	.uleb128 0x28
-	.4byte	.LASF447
+	.4byte	.LASF446
 	.byte	0x1b
-	.byte	0x53
+	.byte	0x51
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_data_buf
 	.uleb128 0x28
-	.4byte	.LASF448
+	.4byte	.LASF447
 	.byte	0x1b
-	.byte	0x54
+	.byte	0x52
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.uleb128 0x28
-	.4byte	.LASF449
+	.4byte	.LASF448
 	.byte	0x1b
-	.byte	0x55
+	.byte	0x53
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_io_data_buf_0
 	.uleb128 0x28
-	.4byte	.LASF450
+	.4byte	.LASF449
 	.byte	0x1b
-	.byte	0x56
+	.byte	0x54
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_io_data_buf_1
 	.uleb128 0x28
-	.4byte	.LASF451
+	.4byte	.LASF450
 	.byte	0x1b
-	.byte	0x57
+	.byte	0x55
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_io_spare_buf
 	.uleb128 0x28
-	.4byte	.LASF452
+	.4byte	.LASF451
 	.byte	0x1b
-	.byte	0x58
+	.byte	0x56
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_spare_buf
 	.uleb128 0x28
-	.4byte	.LASF453
+	.4byte	.LASF452
 	.byte	0x1b
-	.byte	0x59
+	.byte	0x57
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_data_buf
 	.uleb128 0x28
-	.4byte	.LASF454
+	.4byte	.LASF453
 	.byte	0x1b
-	.byte	0x5a
-	.4byte	0x1c22
+	.byte	0x58
+	.4byte	0x1c0d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gp_gc_page_buf_info
@@ -26451,26 +26416,26 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x16d6
 	.uleb128 0x28
-	.4byte	.LASF455
+	.4byte	.LASF454
 	.byte	0x1b
-	.byte	0x5b
+	.byte	0x59
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	c_gc_page_buf_num
 	.uleb128 0x28
-	.4byte	.LASF456
+	.4byte	.LASF455
 	.byte	0x1b
-	.byte	0x5c
+	.byte	0x5a
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_num_req
 	.uleb128 0x28
-	.4byte	.LASF457
+	.4byte	.LASF456
 	.byte	0x1b
-	.byte	0x5d
-	.4byte	0x1c67
+	.byte	0x5b
+	.4byte	0x1c52
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gp_ect_tbl_info
@@ -26478,146 +26443,146 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x113b
 	.uleb128 0x28
-	.4byte	.LASF458
+	.4byte	.LASF457
 	.byte	0x1b
-	.byte	0x5e
+	.byte	0x5c
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_ect_tbl_info_size
 	.uleb128 0x28
-	.4byte	.LASF459
+	.4byte	.LASF458
 	.byte	0x1b
-	.byte	0x5f
+	.byte	0x5d
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_erase_count_table
 	.uleb128 0x28
-	.4byte	.LASF460
+	.4byte	.LASF459
 	.byte	0x1b
-	.byte	0x61
+	.byte	0x5f
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_swl_mul_table
 	.uleb128 0x28
-	.4byte	.LASF461
+	.4byte	.LASF460
 	.byte	0x1b
-	.byte	0x62
+	.byte	0x60
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_swl_count
 	.uleb128 0x28
-	.4byte	.LASF462
+	.4byte	.LASF461
 	.byte	0x1b
-	.byte	0x63
+	.byte	0x61
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_valid_page_count_table
 	.uleb128 0x28
-	.4byte	.LASF463
+	.4byte	.LASF462
 	.byte	0x1b
-	.byte	0x64
+	.byte	0x62
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_valid_page_count_check_table
 	.uleb128 0x28
-	.4byte	.LASF464
+	.4byte	.LASF463
 	.byte	0x1b
-	.byte	0x65
+	.byte	0x63
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_blk_mode_table
 	.uleb128 0x28
-	.4byte	.LASF465
+	.4byte	.LASF464
 	.byte	0x1b
-	.byte	0x67
+	.byte	0x65
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_block_table
 	.uleb128 0x28
-	.4byte	.LASF466
+	.4byte	.LASF465
 	.byte	0x1b
-	.byte	0x68
+	.byte	0x66
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_block_valid_page_count
 	.uleb128 0x28
-	.4byte	.LASF467
+	.4byte	.LASF466
 	.byte	0x1b
-	.byte	0x69
+	.byte	0x67
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_block_ver_table
 	.uleb128 0x28
-	.4byte	.LASF468
+	.4byte	.LASF467
 	.byte	0x1b
-	.byte	0x6a
+	.byte	0x68
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_map_region_ppn_table
 	.uleb128 0x28
-	.4byte	.LASF469
+	.4byte	.LASF468
 	.byte	0x1b
-	.byte	0x6b
+	.byte	0x69
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_map_block
 	.uleb128 0x28
-	.4byte	.LASF470
+	.4byte	.LASF469
 	.byte	0x1b
-	.byte	0x6d
+	.byte	0x6b
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_block_table
 	.uleb128 0x28
-	.4byte	.LASF471
+	.4byte	.LASF470
 	.byte	0x1b
-	.byte	0x6e
+	.byte	0x6c
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_block_valid_page_count
 	.uleb128 0x28
-	.4byte	.LASF472
+	.4byte	.LASF471
 	.byte	0x1b
-	.byte	0x6f
+	.byte	0x6d
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_block_ver_table
 	.uleb128 0x28
-	.4byte	.LASF473
+	.4byte	.LASF472
 	.byte	0x1b
-	.byte	0x70
+	.byte	0x6e
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_vendor_region_ppn_table
 	.uleb128 0x28
-	.4byte	.LASF474
+	.4byte	.LASF473
 	.byte	0x1b
-	.byte	0x71
+	.byte	0x6f
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_vendor_block
 	.uleb128 0x28
-	.4byte	.LASF475
+	.4byte	.LASF474
 	.byte	0x1b
-	.byte	0x73
-	.4byte	0x1de7
+	.byte	0x71
+	.4byte	0x1dd2
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_l2p_ram_map
@@ -26625,26 +26590,26 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x10fe
 	.uleb128 0x28
-	.4byte	.LASF476
+	.4byte	.LASF475
 	.byte	0x1b
-	.byte	0x74
+	.byte	0x72
 	.4byte	0x1001
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_l2p_map_buf
 	.uleb128 0x28
-	.4byte	.LASF477
+	.4byte	.LASF476
 	.byte	0x1b
-	.byte	0x75
+	.byte	0x73
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_l2p_last_update_region_id
 	.uleb128 0x28
-	.4byte	.LASF478
+	.4byte	.LASF477
 	.byte	0x1b
-	.byte	0x7c
-	.4byte	0x1e2c
+	.byte	0x7a
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_data_block_list_table
@@ -26652,82 +26617,82 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x1573
 	.uleb128 0x28
-	.4byte	.LASF479
+	.4byte	.LASF478
 	.byte	0x1b
-	.byte	0x7d
-	.4byte	0x1e2c
+	.byte	0x7b
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_free_data_block_list_head
 	.uleb128 0x28
-	.4byte	.LASF480
+	.4byte	.LASF479
 	.byte	0x1b
-	.byte	0x7f
-	.4byte	0x1e2c
+	.byte	0x7d
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_data_block_list_head
 	.uleb128 0x28
-	.4byte	.LASF481
+	.4byte	.LASF480
 	.byte	0x1b
-	.byte	0x80
-	.4byte	0x1e2c
+	.byte	0x7e
+	.4byte	0x1e17
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_data_block_list_tail
 	.uleb128 0x28
-	.4byte	.LASF482
+	.4byte	.LASF481
 	.byte	0x1b
-	.byte	0x81
+	.byte	0x7f
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_num_free_superblocks
 	.uleb128 0x28
-	.4byte	.LASF483
+	.4byte	.LASF482
 	.byte	0x1b
-	.byte	0x82
+	.byte	0x80
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_num_data_superblocks
 	.uleb128 0x28
-	.4byte	.LASF484
+	.4byte	.LASF483
 	.byte	0x1b
-	.byte	0x83
+	.byte	0x81
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_active_superblock
 	.uleb128 0x28
-	.4byte	.LASF485
+	.4byte	.LASF484
 	.byte	0x1b
-	.byte	0x84
+	.byte	0x82
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_buffer_superblock
 	.uleb128 0x28
-	.4byte	.LASF486
+	.4byte	.LASF485
 	.byte	0x1b
-	.byte	0x85
+	.byte	0x83
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_temp_superblock
 	.uleb128 0x28
-	.4byte	.LASF487
+	.4byte	.LASF486
 	.byte	0x1b
-	.byte	0x86
+	.byte	0x84
 	.4byte	0x15ff
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_superblock
 	.uleb128 0x28
-	.4byte	.LASF488
+	.4byte	.LASF487
 	.byte	0x1b
-	.byte	0x87
-	.4byte	0x1f04
+	.byte	0x85
+	.4byte	0x1eef
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gp_last_act_superblock
@@ -26735,26 +26700,26 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x15ff
 	.uleb128 0x28
-	.4byte	.LASF489
+	.4byte	.LASF488
 	.byte	0x1b
-	.byte	0x88
+	.byte	0x86
 	.4byte	0x1320
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_sys_save_data
 	.uleb128 0x28
-	.4byte	.LASF490
+	.4byte	.LASF489
 	.byte	0x1b
-	.byte	0x89
+	.byte	0x87
 	.4byte	0x141d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_sys_ext_data
 	.uleb128 0x28
-	.4byte	.LASF491
+	.4byte	.LASF490
 	.byte	0x1b
-	.byte	0x8b
-	.4byte	0x1f49
+	.byte	0x89
+	.4byte	0x1f34
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_page_info
@@ -26762,368 +26727,368 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x16a1
 	.uleb128 0x28
-	.4byte	.LASF492
+	.4byte	.LASF491
 	.byte	0x1b
-	.byte	0x8c
+	.byte	0x8a
 	.4byte	0x10f8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	p_gc_blk_tbl
 	.uleb128 0x28
-	.4byte	.LASF493
+	.4byte	.LASF492
 	.byte	0x1b
-	.byte	0x8d
+	.byte	0x8b
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_blk_num
 	.uleb128 0x28
-	.4byte	.LASF494
+	.4byte	.LASF493
 	.byte	0x1b
-	.byte	0x8e
+	.byte	0x8c
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_page_offset
 	.uleb128 0x28
-	.4byte	.LASF495
+	.4byte	.LASF494
 	.byte	0x1b
-	.byte	0x8f
+	.byte	0x8d
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x28
-	.4byte	.LASF496
+	.4byte	.LASF495
 	.byte	0x1b
-	.byte	0x90
+	.byte	0x8e
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x28
-	.4byte	.LASF497
+	.4byte	.LASF496
 	.byte	0x1b
-	.byte	0x91
+	.byte	0x8f
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_next_blk
 	.uleb128 0x28
-	.4byte	.LASF498
+	.4byte	.LASF497
 	.byte	0x1b
-	.byte	0x92
+	.byte	0x90
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_next_blk_1
 	.uleb128 0x28
-	.4byte	.LASF499
+	.4byte	.LASF498
 	.byte	0x1b
-	.byte	0x93
+	.byte	0x91
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_bad_block_temp_num
 	.uleb128 0x28
-	.4byte	.LASF500
+	.4byte	.LASF499
 	.byte	0x1b
-	.byte	0x94
+	.byte	0x92
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_bad_block_gc_index
 	.uleb128 0xa
 	.4byte	0xdc9
-	.4byte	0x201c
+	.4byte	0x2007
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x10
 	.byte	0
 	.uleb128 0x28
-	.4byte	.LASF501
+	.4byte	.LASF500
 	.byte	0x1b
-	.byte	0x95
-	.4byte	0x200c
+	.byte	0x93
+	.4byte	0x1ff7
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x28
-	.4byte	.LASF502
+	.4byte	.LASF501
 	.byte	0x1b
-	.byte	0x97
+	.byte	0x95
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_free_blk_threshold
 	.uleb128 0x28
-	.4byte	.LASF503
+	.4byte	.LASF502
 	.byte	0x1b
-	.byte	0x98
+	.byte	0x96
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x28
-	.4byte	.LASF504
+	.4byte	.LASF503
 	.byte	0x1b
-	.byte	0x99
+	.byte	0x97
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_blk_index
 	.uleb128 0x28
-	.4byte	.LASF505
+	.4byte	.LASF504
 	.byte	0x1b
-	.byte	0x9b
+	.byte	0x99
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_gc_page_count
 	.uleb128 0x28
-	.4byte	.LASF506
+	.4byte	.LASF505
 	.byte	0x1b
-	.byte	0x9c
+	.byte	0x9a
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_write_page_count
 	.uleb128 0x28
-	.4byte	.LASF507
+	.4byte	.LASF506
 	.byte	0x1b
-	.byte	0x9d
+	.byte	0x9b
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_write_sector
 	.uleb128 0x28
-	.4byte	.LASF508
+	.4byte	.LASF507
 	.byte	0x1b
-	.byte	0x9e
+	.byte	0x9c
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_read_sector
 	.uleb128 0x28
-	.4byte	.LASF509
+	.4byte	.LASF508
 	.byte	0x1b
-	.byte	0xa0
+	.byte	0x9e
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_discard_page_count
 	.uleb128 0x28
-	.4byte	.LASF510
+	.4byte	.LASF509
 	.byte	0x1b
-	.byte	0xa1
+	.byte	0x9f
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_read_page_count
 	.uleb128 0x28
-	.4byte	.LASF511
+	.4byte	.LASF510
 	.byte	0x1b
-	.byte	0xa2
+	.byte	0xa0
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_tmp_data_superblock_id
 	.uleb128 0x28
-	.4byte	.LASF512
+	.4byte	.LASF511
 	.byte	0x1b
-	.byte	0xa3
+	.byte	0xa1
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_cache_write_count
 	.uleb128 0x28
-	.4byte	.LASF513
+	.4byte	.LASF512
 	.byte	0x1b
-	.byte	0xa4
+	.byte	0xa2
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_l2p_write_count
 	.uleb128 0x28
-	.4byte	.LASF514
+	.4byte	.LASF513
 	.byte	0x1b
-	.byte	0xa6
+	.byte	0xa4
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_mlc_erase_count
 	.uleb128 0x28
-	.4byte	.LASF515
+	.4byte	.LASF514
 	.byte	0x1b
-	.byte	0xa7
+	.byte	0xa5
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_avg_erase_count
 	.uleb128 0x28
-	.4byte	.LASF516
+	.4byte	.LASF515
 	.byte	0x1b
-	.byte	0xa8
+	.byte	0xa6
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_min_erase_count
 	.uleb128 0x28
-	.4byte	.LASF517
+	.4byte	.LASF516
 	.byte	0x1b
-	.byte	0xa9
+	.byte	0xa7
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_slc_erase_count
 	.uleb128 0x28
-	.4byte	.LASF518
+	.4byte	.LASF517
 	.byte	0x1b
-	.byte	0xaa
+	.byte	0xa8
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_totle_sys_slc_erase_count
 	.uleb128 0x28
-	.4byte	.LASF519
+	.4byte	.LASF518
 	.byte	0x1b
-	.byte	0xab
+	.byte	0xa9
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_max_erase_count
 	.uleb128 0x28
-	.4byte	.LASF520
+	.4byte	.LASF519
 	.byte	0x1b
-	.byte	0xac
+	.byte	0xaa
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_in_gc_progress
 	.uleb128 0x28
-	.4byte	.LASF521
+	.4byte	.LASF520
 	.byte	0x1b
-	.byte	0xad
+	.byte	0xab
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_in_swl_replace
 	.uleb128 0x28
-	.4byte	.LASF522
+	.4byte	.LASF521
 	.byte	0x1b
-	.byte	0xae
+	.byte	0xac
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_ftl_nand_free_count
 	.uleb128 0x28
-	.4byte	.LASF523
+	.4byte	.LASF522
 	.byte	0x1b
-	.byte	0xaf
+	.byte	0xad
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_head_data_block
 	.uleb128 0x28
-	.4byte	.LASF524
+	.4byte	.LASF523
 	.byte	0x1b
-	.byte	0xb0
+	.byte	0xae
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_head_data_block_count
 	.uleb128 0x28
-	.4byte	.LASF525
+	.4byte	.LASF524
 	.byte	0x1b
-	.byte	0xb1
+	.byte	0xaf
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_gc_skip_write_count
 	.uleb128 0x28
-	.4byte	.LASF526
+	.4byte	.LASF525
 	.byte	0x1b
-	.byte	0xb2
+	.byte	0xb0
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_cur_erase_blk
 	.uleb128 0x28
-	.4byte	.LASF527
+	.4byte	.LASF526
 	.byte	0x1b
-	.byte	0xb4
+	.byte	0xb2
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_recovery_page_num
 	.uleb128 0x28
-	.4byte	.LASF528
+	.4byte	.LASF527
 	.byte	0x1b
-	.byte	0xb5
+	.byte	0xb3
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_recovery_page_min_ver
 	.uleb128 0xa
 	.4byte	0xdd4
-	.4byte	0x2278
+	.4byte	0x2263
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1f
 	.byte	0
 	.uleb128 0x28
-	.4byte	.LASF529
+	.4byte	.LASF528
 	.byte	0x1b
-	.byte	0xb6
-	.4byte	0x2268
+	.byte	0xb4
+	.4byte	0x2253
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_recovery_ppa_tbl
 	.uleb128 0x28
-	.4byte	.LASF530
+	.4byte	.LASF529
 	.byte	0x1b
-	.byte	0xb7
+	.byte	0xb5
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	c_mlc_erase_count_value
 	.uleb128 0x28
-	.4byte	.LASF531
+	.4byte	.LASF530
 	.byte	0x1b
-	.byte	0xb8
+	.byte	0xb6
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_power_lost_recovery_flag
 	.uleb128 0x4
-	.4byte	.LASF532
+	.4byte	.LASF531
 	.byte	0x18
 	.byte	0x14
 	.4byte	0xe44
 	.uleb128 0x4
-	.4byte	.LASF533
+	.4byte	.LASF532
 	.byte	0x18
 	.byte	0x15
 	.4byte	0xe44
 	.uleb128 0x4
-	.4byte	.LASF534
+	.4byte	.LASF533
 	.byte	0x18
 	.byte	0x16
 	.4byte	0xee6
 	.uleb128 0xa
 	.4byte	0xb9
-	.4byte	0x22e9
+	.4byte	0x22d4
 	.uleb128 0x15
 	.4byte	0xda
 	.2byte	0x3ff
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF535
+	.4byte	.LASF534
 	.byte	0x18
 	.byte	0x17
-	.4byte	0x22d8
+	.4byte	0x22c3
 	.uleb128 0x28
-	.4byte	.LASF536
+	.4byte	.LASF535
 	.byte	0x3
 	.byte	0x6
 	.4byte	0xdd4
@@ -27131,7 +27096,7 @@ __func__.7632:
 	.byte	0x3
 	.8byte	DeviceCapacity
 	.uleb128 0x28
-	.4byte	.LASF537
+	.4byte	.LASF536
 	.byte	0x3
 	.byte	0x7
 	.4byte	0xdd4
@@ -27139,74 +27104,74 @@ __func__.7632:
 	.byte	0x3
 	.8byte	gFtlInitStatus
 	.uleb128 0x4
-	.4byte	.LASF538
+	.4byte	.LASF537
 	.byte	0x3
 	.byte	0x6d
 	.4byte	0xdd4
 	.uleb128 0x4
-	.4byte	.LASF539
+	.4byte	.LASF538
 	.byte	0x3
 	.byte	0x6e
 	.4byte	0xdd4
 	.uleb128 0x4
-	.4byte	.LASF540
+	.4byte	.LASF539
 	.byte	0x3
 	.byte	0x6f
 	.4byte	0xdd4
 	.uleb128 0x4
-	.4byte	.LASF541
+	.4byte	.LASF540
 	.byte	0x3
 	.byte	0x70
 	.4byte	0xdd4
 	.uleb128 0x29
-	.4byte	.LASF542
+	.4byte	.LASF541
 	.byte	0x3
-	.2byte	0x3c0
+	.2byte	0x3bc
 	.4byte	0x5b
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	power_up_flag
 	.uleb128 0x2a
-	.4byte	.LASF546
+	.4byte	.LASF545
 	.byte	0x3
-	.2byte	0x483
+	.2byte	0x45f
 	.4byte	0xdd4
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	gc_discard_updated
 	.uleb128 0x29
-	.4byte	.LASF543
+	.4byte	.LASF542
 	.byte	0x2
-	.2byte	0x35b
+	.2byte	0x38c
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_ect_tbl_power_up_flush
 	.uleb128 0x29
-	.4byte	.LASF544
+	.4byte	.LASF543
 	.byte	0x2
-	.2byte	0x370
+	.2byte	0x3a1
 	.4byte	0xdc9
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	FtlUpdateVaildLpnCount
 	.uleb128 0xa
 	.4byte	0xdc9
-	.4byte	0x23b3
+	.4byte	0x239e
 	.uleb128 0x15
 	.4byte	0xda
 	.2byte	0x1fff
 	.byte	0
 	.uleb128 0x29
-	.4byte	.LASF545
+	.4byte	.LASF544
 	.byte	0x2
-	.2byte	0x8ad
-	.4byte	0x23a2
+	.2byte	0x8df
+	.4byte	0x238d
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	check_vpc_table
 	.uleb128 0x2b
-	.4byte	.LASF547
+	.4byte	.LASF546
 	.byte	0x5
 	.byte	0x6d
 	.4byte	0xdc9
@@ -27214,7 +27179,7 @@ __func__.7632:
 	.byte	0x3
 	.8byte	ftl_gc_temp_block_bops_scan_page_addr
 	.uleb128 0x29
-	.4byte	.LASF548
+	.4byte	.LASF547
 	.byte	0x5
 	.2byte	0x1d4
 	.4byte	0xdc9
@@ -27222,26 +27187,26 @@ __func__.7632:
 	.byte	0x3
 	.8byte	gc_ink_free_return_value
 	.uleb128 0xc
-	.4byte	.LASF549
+	.4byte	.LASF548
 	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x10b
 	.uleb128 0xc
-	.4byte	.LASF550
+	.4byte	.LASF549
 	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x10b
 	.uleb128 0xc
-	.4byte	.LASF551
+	.4byte	.LASF550
 	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x10b
 	.uleb128 0xf
-	.4byte	.LASF552
+	.4byte	.LASF551
 	.byte	0x4
 	.byte	0x6
 	.byte	0xc
-	.4byte	0x2431
+	.4byte	0x241c
 	.uleb128 0x16
 	.string	"pid"
 	.byte	0x6
@@ -27250,37 +27215,37 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4
-	.4byte	.LASF553
+	.4byte	.LASF552
 	.byte	0x6
 	.byte	0x10
-	.4byte	0x243c
+	.4byte	0x2427
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x2418
+	.4byte	0x2403
 	.uleb128 0x2c
-	.4byte	0x22c2
+	.4byte	0x22ad
 	.byte	0x1
 	.byte	0x10
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_nand_phy_info
 	.uleb128 0x2c
-	.4byte	0x22cd
+	.4byte	0x22b8
 	.byte	0x1
 	.byte	0x11
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	g_nand_ops
 	.uleb128 0x2b
-	.4byte	.LASF554
+	.4byte	.LASF553
 	.byte	0x1
 	.byte	0x13
-	.4byte	0x22d8
+	.4byte	0x22c3
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	check_buf
 	.uleb128 0x2c
-	.4byte	0x22e9
+	.4byte	0x22d4
 	.byte	0x1
 	.byte	0x14
 	.uleb128 0x9
@@ -27288,21 +27253,21 @@ __func__.7632:
 	.8byte	ftl_temp_buf
 	.uleb128 0xa
 	.4byte	0xb9
-	.4byte	0x249a
+	.4byte	0x2485
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x7f
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF555
+	.4byte	.LASF554
 	.byte	0x1
 	.byte	0x15
-	.4byte	0x248a
+	.4byte	0x2475
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	check_spare_buf
 	.uleb128 0x2d
-	.4byte	.LASF558
+	.4byte	.LASF557
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x5b
@@ -27310,28 +27275,28 @@ __func__.7632:
 	.8byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2527
+	.4byte	0x2512
 	.uleb128 0x2e
-	.4byte	.LASF556
+	.4byte	.LASF555
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST470
+	.4byte	.LLST469
 	.uleb128 0x2e
-	.4byte	.LASF557
+	.4byte	.LASF556
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST471
+	.4byte	.LLST470
 	.uleb128 0x2e
 	.4byte	.LASF325
 	.byte	0x1
 	.byte	0xfb
 	.4byte	0x30
-	.4byte	.LLST472
+	.4byte	.LLST471
 	.uleb128 0x2f
-	.8byte	.LVL2175
-	.4byte	0xa92a
+	.8byte	.LVL2156
+	.4byte	0xa92c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27359,7 +27324,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF559
+	.4byte	.LASF558
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x12c
@@ -27367,28 +27332,28 @@ __func__.7632:
 	.8byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x259f
+	.4byte	0x258a
 	.uleb128 0x2e
-	.4byte	.LASF560
+	.4byte	.LASF559
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x12c
-	.4byte	.LLST305
+	.4byte	.LLST304
 	.uleb128 0x2e
-	.4byte	.LASF561
+	.4byte	.LASF560
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x16f
-	.4byte	.LLST306
+	.4byte	.LLST305
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
 	.byte	0xf6
 	.4byte	0x30
-	.4byte	.LLST307
+	.4byte	.LLST306
 	.uleb128 0x2f
-	.8byte	.LVL1243
-	.4byte	0xa935
+	.8byte	.LVL1245
+	.4byte	0xa937
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27416,7 +27381,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF562
+	.4byte	.LASF561
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x12c
@@ -27424,28 +27389,28 @@ __func__.7632:
 	.8byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2611
+	.4byte	0x25fc
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x12c
-	.4byte	.LLST198
+	.4byte	.LLST197
 	.uleb128 0x31
 	.string	"c"
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x5b
-	.4byte	.LLST199
+	.4byte	.LLST198
 	.uleb128 0x31
 	.string	"n"
 	.byte	0x1
 	.byte	0xf1
 	.4byte	0x30
-	.4byte	.LLST200
+	.4byte	.LLST199
 	.uleb128 0x2f
-	.8byte	.LVL740
-	.4byte	0xa941
+	.8byte	.LVL742
+	.4byte	0xa943
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27473,7 +27438,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF563
+	.4byte	.LASF562
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xae
@@ -27481,35 +27446,35 @@ __func__.7632:
 	.8byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x26cd
+	.4byte	0x26b8
 	.uleb128 0x2e
-	.4byte	.LASF564
+	.4byte	.LASF563
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xf37
-	.4byte	.LLST301
+	.4byte	.LLST300
 	.uleb128 0x31
 	.string	"die"
 	.byte	0x1
 	.byte	0xdf
 	.4byte	0xb9
-	.4byte	.LLST302
+	.4byte	.LLST301
 	.uleb128 0x32
 	.4byte	.LASF325
 	.byte	0x1
 	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST303
+	.4byte	.LLST302
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST304
+	.4byte	.LLST303
 	.uleb128 0x34
-	.8byte	.LVL1230
-	.4byte	0x259f
-	.4byte	0x2691
+	.8byte	.LVL1232
+	.4byte	0x258a
+	.4byte	0x267c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27530,8 +27495,8 @@ __func__.7632:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x35
-	.8byte	.LVL1231
-	.4byte	0x26ab
+	.8byte	.LVL1233
+	.4byte	0x2696
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27546,8 +27511,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1234
-	.4byte	0x259f
+	.8byte	.LVL1236
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27569,14 +27534,14 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LASF589
+	.4byte	.LASF588
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xddf
 	.byte	0x1
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x38
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x1
 	.byte	0xc4
 	.4byte	0xdc9
@@ -27586,10 +27551,10 @@ __func__.7632:
 	.byte	0xc6
 	.4byte	0xddf
 	.uleb128 0x3a
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x1
 	.byte	0xc7
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
@@ -27602,13 +27567,13 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdd4
-	.4byte	0x2721
+	.4byte	0x270c
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xf
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LASF566
+	.4byte	.LASF565
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xae
@@ -27616,31 +27581,31 @@ __func__.7632:
 	.8byte	.LFE343-.LFB343
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x27e7
+	.4byte	0x27d2
 	.uleb128 0x2e
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0xae
 	.4byte	0x12c
-	.4byte	.LLST177
+	.4byte	.LLST168
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST178
+	.4byte	.LLST169
 	.uleb128 0x2e
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST179
+	.4byte	.LLST170
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST180
+	.4byte	.LLST171
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
@@ -27654,9 +27619,9 @@ __func__.7632:
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST181
+	.4byte	.LLST172
 	.uleb128 0x2b
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0xb0
 	.4byte	0xb9
@@ -27668,16 +27633,16 @@ __func__.7632:
 	.byte	0x1
 	.byte	0xb1
 	.4byte	0x1abc
-	.4byte	.LLST182
+	.4byte	.LLST173
 	.uleb128 0x32
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0xb2
 	.4byte	0xb9
-	.4byte	.LLST183
+	.4byte	.LLST174
 	.uleb128 0x36
-	.8byte	.LVL671
-	.4byte	0x973d
+	.8byte	.LVL648
+	.4byte	0x963e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27691,14 +27656,14 @@ __func__.7632:
 	.byte	0x72
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x2aad
+	.4byte	0x2a98
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 -4
 	.byte	0
 	.byte	0
 	.uleb128 0x3c
-	.4byte	.LASF572
+	.4byte	.LASF571
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xae
@@ -27706,37 +27671,37 @@ __func__.7632:
 	.8byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x298f
+	.4byte	0x297a
 	.uleb128 0x2e
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x72
 	.4byte	0x12c
-	.4byte	.LLST169
+	.4byte	.LLST160
 	.uleb128 0x2e
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST170
+	.4byte	.LLST161
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST171
+	.4byte	.LLST162
 	.uleb128 0x2e
-	.4byte	.LASF573
+	.4byte	.LASF572
 	.byte	0x1
 	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST172
+	.4byte	.LLST163
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST173
+	.4byte	.LLST164
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
@@ -27750,9 +27715,9 @@ __func__.7632:
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST174
+	.4byte	.LLST165
 	.uleb128 0x2b
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x74
 	.4byte	0xb9
@@ -27760,28 +27725,28 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x32
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x75
 	.4byte	0xb9
-	.4byte	.LLST175
+	.4byte	.LLST166
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x1
 	.byte	0x76
 	.4byte	0x1abc
-	.4byte	.LLST176
+	.4byte	.LLST167
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7632
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0xd0
-	.4byte	0x2941
+	.4byte	0x292c
 	.uleb128 0x2b
-	.4byte	.LASF575
+	.4byte	.LASF574
 	.byte	0x1
 	.byte	0x91
 	.4byte	0xdf5
@@ -27789,9 +27754,9 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL659
-	.4byte	0x29a4
-	.4byte	0x28e7
+	.8byte	.LVL636
+	.4byte	0x298f
+	.4byte	0x28d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27811,9 +27776,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL660
-	.4byte	0xa94d
-	.4byte	0x2906
+	.8byte	.LVL637
+	.4byte	0xa94f
+	.4byte	0x28f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27822,9 +27787,9 @@ __func__.7632:
 	.8byte	.LC79
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL661
-	.4byte	0xa94d
-	.4byte	0x2925
+	.8byte	.LVL638
+	.4byte	0xa94f
+	.4byte	0x2910
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27833,8 +27798,8 @@ __func__.7632:
 	.8byte	.LC80
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL662
-	.4byte	0xa94d
+	.8byte	.LVL639
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27844,9 +27809,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL650
-	.4byte	0xa94d
-	.4byte	0x296c
+	.8byte	.LVL627
+	.4byte	0xa94f
+	.4byte	0x2957
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27867,8 +27832,8 @@ __func__.7632:
 	.byte	0x7a
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL651
-	.4byte	0x973d
+	.8byte	.LVL628
+	.4byte	0x963e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27882,7 +27847,7 @@ __func__.7632:
 	.byte	0x72
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x2aad
+	.4byte	0x2a98
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
@@ -27890,15 +27855,15 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x299f
+	.4byte	0x298a
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xe
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x298f
+	.4byte	0x297a
 	.uleb128 0x3c
-	.4byte	.LASF576
+	.4byte	.LASF575
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xae
@@ -27906,31 +27871,31 @@ __func__.7632:
 	.8byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2a9d
+	.4byte	0x2a88
 	.uleb128 0x2e
-	.4byte	.LASF567
+	.4byte	.LASF566
 	.byte	0x1
 	.byte	0x54
 	.4byte	0x12c
-	.4byte	.LLST154
+	.4byte	.LLST145
 	.uleb128 0x2e
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST155
+	.4byte	.LLST146
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x1
 	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST156
+	.4byte	.LLST147
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST157
+	.4byte	.LLST148
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
@@ -27944,9 +27909,9 @@ __func__.7632:
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST158
+	.4byte	.LLST149
 	.uleb128 0x2b
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x56
 	.4byte	0xb9
@@ -27954,26 +27919,26 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x32
-	.4byte	.LASF571
+	.4byte	.LASF570
 	.byte	0x1
 	.byte	0x57
 	.4byte	0xb9
-	.4byte	.LLST159
+	.4byte	.LLST150
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
 	.byte	0x58
 	.4byte	0x1abc
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7615
 	.uleb128 0x34
-	.8byte	.LVL604
-	.4byte	0xa94d
-	.4byte	0x2a7a
+	.8byte	.LVL581
+	.4byte	0xa94f
+	.4byte	0x2a65
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27994,8 +27959,8 @@ __func__.7632:
 	.byte	0x5c
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL605
-	.4byte	0x973d
+	.8byte	.LVL582
+	.4byte	0x963e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28009,41 +27974,41 @@ __func__.7632:
 	.byte	0x72
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x2aad
+	.4byte	0x2a98
 	.uleb128 0x2
 	.byte	0x83
 	.sleb128 0
 	.byte	0
 	.byte	0
 	.uleb128 0x41
-	.4byte	.LASF885
+	.4byte	.LASF883
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xb9
 	.byte	0x1
-	.4byte	0x2b1c
+	.4byte	0x2b07
 	.uleb128 0x42
 	.string	"req"
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0x1abc
 	.uleb128 0x38
-	.4byte	.LASF570
+	.4byte	.LASF569
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x38
-	.4byte	.LASF578
+	.4byte	.LASF577
 	.byte	0x1
 	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x3a
-	.4byte	.LASF579
+	.4byte	.LASF578
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0xa3
 	.uleb128 0x3a
-	.4byte	.LASF580
+	.4byte	.LASF579
 	.byte	0x1
 	.byte	0x3c
 	.4byte	0xa3
@@ -28058,7 +28023,7 @@ __func__.7632:
 	.byte	0x3d
 	.4byte	0xa3
 	.uleb128 0x3a
-	.4byte	.LASF581
+	.4byte	.LASF580
 	.byte	0x1
 	.byte	0x3e
 	.4byte	0xb9
@@ -28068,78 +28033,78 @@ __func__.7632:
 	.byte	0x3f
 	.4byte	0xb9
 	.uleb128 0x3a
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x1
 	.byte	0x40
 	.4byte	0xb9
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF585
+	.4byte	.LASF584
 	.byte	0x1
 	.byte	0x20
 	.8byte	.LFB339
 	.8byte	.LFE339-.LFB339
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c25
+	.4byte	0x2c10
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0xfa
-	.4byte	.LLST145
+	.4byte	.LLST136
 	.uleb128 0x31
 	.string	"buf"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x12c
-	.4byte	.LLST146
+	.4byte	.LLST137
 	.uleb128 0x2e
-	.4byte	.LASF583
+	.4byte	.LASF582
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST147
+	.4byte	.LLST138
 	.uleb128 0x31
 	.string	"len"
 	.byte	0x1
 	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST148
+	.4byte	.LLST139
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST149
+	.4byte	.LLST140
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
 	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST150
+	.4byte	.LLST141
 	.uleb128 0x33
 	.string	"p8"
 	.byte	0x1
 	.byte	0x23
 	.4byte	0xfa
-	.4byte	.LLST151
+	.4byte	.LLST142
 	.uleb128 0x33
 	.string	"p16"
 	.byte	0x1
 	.byte	0x24
-	.4byte	0x2c25
-	.4byte	.LLST152
+	.4byte	0x2c10
+	.4byte	.LLST143
 	.uleb128 0x33
 	.string	"p32"
 	.byte	0x1
 	.byte	0x25
 	.4byte	0xe3e
-	.4byte	.LLST153
+	.4byte	.LLST144
 	.uleb128 0x44
-	.8byte	.LVL589
-	.4byte	0xa94d
-	.4byte	0x2bd8
+	.8byte	.LVL566
+	.4byte	0xa94f
+	.4byte	0x2bc3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28148,9 +28113,9 @@ __func__.7632:
 	.8byte	.LC78
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL590
-	.4byte	0xa94d
-	.4byte	0x2bfc
+	.8byte	.LVL567
+	.4byte	0xa94f
+	.4byte	0x2be7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28171,11 +28136,11 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL591
-	.4byte	0xa94d
+	.8byte	.LVL568
+	.4byte	0xa94f
 	.uleb128 0x36
-	.8byte	.LVL594
-	.4byte	0xa94d
+	.8byte	.LVL571
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28188,7 +28153,7 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x74
 	.uleb128 0x2d
-	.4byte	.LASF584
+	.4byte	.LASF583
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x12c
@@ -28196,16 +28161,16 @@ __func__.7632:
 	.8byte	.LFE338-.LFB338
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c7c
+	.4byte	0x2c67
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
 	.byte	0x1b
 	.4byte	0x5b
-	.4byte	.LLST144
+	.4byte	.LLST135
 	.uleb128 0x2f
-	.8byte	.LVL581
-	.4byte	0xa958
+	.8byte	.LVL558
+	.4byte	0xa95a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28227,32 +28192,32 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF586
+	.4byte	.LASF585
 	.byte	0x1
 	.byte	0x17
 	.8byte	.LFB337
 	.8byte	.LFE337-.LFB337
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cdf
+	.4byte	0x2cca
 	.uleb128 0x31
 	.string	"buf"
 	.byte	0x1
 	.byte	0x17
 	.4byte	0x12c
-	.4byte	.LLST142
+	.4byte	.LLST133
 	.uleb128 0x46
-	.4byte	0x2cdf
-	.8byte	.LBB217
-	.8byte	.LBE217-.LBB217
+	.4byte	0x2cca
+	.8byte	.LBB229
+	.8byte	.LBE229-.LBB229
 	.byte	0x1
 	.byte	0x19
 	.uleb128 0x47
-	.4byte	0x2ceb
-	.4byte	.LLST143
+	.4byte	0x2cd6
+	.4byte	.LLST134
 	.uleb128 0x2f
-	.8byte	.LVL579
-	.4byte	0xa963
+	.8byte	.LVL556
+	.4byte	0xa965
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28264,30 +28229,30 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x48
-	.4byte	.LASF886
+	.4byte	.LASF884
 	.byte	0x6
 	.byte	0x4e
 	.byte	0x3
-	.4byte	0x2cf7
+	.4byte	0x2ce2
 	.uleb128 0x38
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x6
 	.byte	0x4e
 	.4byte	0x16f
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF588
+	.4byte	.LASF587
 	.byte	0x5
-	.2byte	0x2f8
+	.2byte	0x2f4
 	.4byte	0xb9
 	.8byte	.LFB320
 	.8byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d32
+	.4byte	0x2d1d
 	.uleb128 0x2f
-	.8byte	.LVL1930
-	.4byte	0x2d32
+	.8byte	.LVL1926
+	.4byte	0x2d1d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28301,24 +28266,24 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF590
+	.4byte	.LASF589
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2dff
+	.4byte	0x2dea
 	.uleb128 0x4b
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
 	.uleb128 0x4b
-	.4byte	.LASF592
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF593
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdc9
@@ -28333,7 +28298,7 @@ __func__.7632:
 	.2byte	0x1d8
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF594
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdc9
@@ -28343,45 +28308,45 @@ __func__.7632:
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF598
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2dff
+	.4byte	0x2dea
 	.uleb128 0x4e
-	.4byte	.LASF600
+	.4byte	.LASF599
 	.byte	0x5
-	.2byte	0x276
+	.2byte	0x272
 	.uleb128 0x4e
-	.4byte	.LASF601
+	.4byte	.LASF600
 	.byte	0x5
-	.2byte	0x279
+	.2byte	0x275
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x2e15
-	.4byte	.LASF590
+	.4byte	.LASF573
+	.4byte	0x2e00
+	.4byte	.LASF589
 	.uleb128 0x50
 	.uleb128 0x4c
-	.4byte	.LASF602
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdc9
@@ -28392,20 +28357,20 @@ __func__.7632:
 	.4byte	0x1238
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x2e15
+	.4byte	0x2e00
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2e05
+	.4byte	0x2df0
 	.uleb128 0x4a
-	.4byte	.LASF603
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2e7a
+	.4byte	0x2e65
 	.uleb128 0x4d
 	.string	"ret"
 	.byte	0x5
@@ -28422,40 +28387,40 @@ __func__.7632:
 	.2byte	0x1a6
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x5
 	.2byte	0x1a7
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x51
-	.4byte	0x2e6b
+	.4byte	0x2e56
 	.uleb128 0x4c
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xdf5
 	.byte	0
 	.uleb128 0x50
 	.uleb128 0x4c
-	.4byte	.LASF605
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdd4
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF606
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2ec4
+	.4byte	0x2eaf
 	.uleb128 0x4b
-	.4byte	.LASF607
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdc9
@@ -28476,13 +28441,13 @@ __func__.7632:
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x52
-	.4byte	.LASF715
+	.4byte	.LASF714
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x5b
 	.byte	0x1
 	.uleb128 0x49
-	.4byte	.LASF608
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x5b
@@ -28490,29 +28455,29 @@ __func__.7632:
 	.8byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2f73
+	.4byte	0x2f5e
 	.uleb128 0x53
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdc9
-	.4byte	.LLST139
+	.4byte	.LLST130
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdc9
-	.4byte	.LLST140
+	.4byte	.LLST131
 	.uleb128 0x55
-	.4byte	.LASF609
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdc9
-	.4byte	.LLST141
+	.4byte	.LLST132
 	.uleb128 0x34
-	.8byte	.LVL565
-	.4byte	0x6d71
-	.4byte	0x2f39
+	.8byte	.LVL542
+	.4byte	0x6d33
+	.4byte	0x2f24
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28521,9 +28486,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL568
-	.4byte	0xa94d
-	.4byte	0x2f5e
+	.8byte	.LVL545
+	.4byte	0xa94f
+	.4byte	0x2f49
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28538,8 +28503,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL569
-	.4byte	0x2f73
+	.8byte	.LVL546
+	.4byte	0x2f5e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28549,7 +28514,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF610
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x5b
@@ -28557,16 +28522,16 @@ __func__.7632:
 	.8byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2fc7
+	.4byte	0x2fb2
 	.uleb128 0x53
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdc9
-	.4byte	.LLST138
+	.4byte	.LLST129
 	.uleb128 0x36
-	.8byte	.LVL561
-	.4byte	0xa94d
+	.8byte	.LVL538
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28582,7 +28547,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF611
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdd4
@@ -28590,23 +28555,23 @@ __func__.7632:
 	.8byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x308d
+	.4byte	0x3078
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdc9
-	.4byte	.LLST411
+	.4byte	.LLST410
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2dff
-	.4byte	.LLST412
+	.4byte	0x2dea
+	.4byte	.LLST411
 	.uleb128 0x34
-	.8byte	.LVL1810
-	.4byte	0x27e7
-	.4byte	0x3023
+	.8byte	.LVL1808
+	.4byte	0x27d2
+	.4byte	0x300e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -28619,9 +28584,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1812
-	.4byte	0x3641
-	.4byte	0x3041
+	.8byte	.LVL1810
+	.4byte	0x3612
+	.4byte	0x302c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28636,9 +28601,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1813
-	.4byte	0x3320
-	.4byte	0x3058
+	.8byte	.LVL1811
+	.4byte	0x32fe
+	.4byte	0x3043
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28646,20 +28611,20 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1815
-	.4byte	0x75ef
+	.8byte	.LVL1813
+	.4byte	0x75b1
 	.uleb128 0x45
-	.8byte	.LVL1816
-	.4byte	0x7342
+	.8byte	.LVL1814
+	.4byte	0x7304
 	.uleb128 0x45
-	.8byte	.LVL1817
-	.4byte	0x32c5
+	.8byte	.LVL1815
+	.4byte	0x32a3
 	.uleb128 0x45
-	.8byte	.LVL1821
-	.4byte	0x3532
+	.8byte	.LVL1819
+	.4byte	0x3503
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF612
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdd4
@@ -28667,14 +28632,11 @@ __func__.7632:
 	.8byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x313f
-	.uleb128 0x45
-	.8byte	.LVL1825
-	.4byte	0x7d59
+	.4byte	0x311d
 	.uleb128 0x34
-	.8byte	.LVL1826
-	.4byte	0x3320
-	.4byte	0x30d3
+	.8byte	.LVL1823
+	.4byte	0x32fe
+	.4byte	0x30b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28682,9 +28644,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1827
-	.4byte	0x3a52
-	.4byte	0x30f2
+	.8byte	.LVL1824
+	.4byte	0x3a23
+	.4byte	0x30d0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28693,12 +28655,12 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1828
-	.4byte	0x5d63
+	.8byte	.LVL1825
+	.4byte	0x5d49
 	.uleb128 0x34
-	.8byte	.LVL1829
-	.4byte	0x5968
-	.4byte	0x3116
+	.8byte	.LVL1826
+	.4byte	0x594e
+	.4byte	0x30f4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28706,11 +28668,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1830
-	.4byte	0x5694
+	.8byte	.LVL1827
+	.4byte	0x567a
 	.uleb128 0x2f
-	.8byte	.LVL1831
-	.4byte	0x3804
+	.8byte	.LVL1828
+	.4byte	0x37d5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28720,12 +28682,12 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x56
-	.4byte	.LASF671
+	.4byte	.LASF670
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF613
+	.4byte	.LASF612
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
@@ -28733,99 +28695,99 @@ __func__.7632:
 	.8byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x32c5
+	.4byte	0x32a3
 	.uleb128 0x2e
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
-	.4byte	0x1f04
-	.4byte	.LLST288
+	.4byte	0x1eef
+	.4byte	.LLST287
 	.uleb128 0x2e
-	.4byte	.LASF615
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
-	.4byte	.LLST289
+	.4byte	.LLST288
 	.uleb128 0x32
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdc9
-	.4byte	.LLST290
+	.4byte	.LLST289
 	.uleb128 0x32
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST291
+	.4byte	.LLST290
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST292
+	.4byte	.LLST291
 	.uleb128 0x32
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST293
+	.4byte	.LLST292
 	.uleb128 0x32
 	.4byte	.LASF382
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST294
+	.4byte	.LLST293
 	.uleb128 0x32
 	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST295
+	.4byte	.LLST294
 	.uleb128 0x32
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdd4
-	.4byte	.LLST296
+	.4byte	.LLST295
 	.uleb128 0x32
-	.4byte	.LASF617
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdd4
-	.4byte	.LLST297
+	.4byte	.LLST296
 	.uleb128 0x57
-	.4byte	.LASF618
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdd4
 	.sleb128 -1
 	.uleb128 0x32
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2dff
-	.4byte	.LLST298
+	.4byte	0x2dea
+	.4byte	.LLST297
 	.uleb128 0x58
-	.4byte	.LASF619
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xe1
 	.uleb128 0x58
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe5
 	.uleb128 0x59
-	.4byte	.LASF689
+	.4byte	.LASF688
 	.byte	0x5
 	.2byte	0x117
-	.8byte	.L873
+	.8byte	.L879
 	.uleb128 0x45
-	.8byte	.LVL1176
-	.4byte	0x32c5
+	.8byte	.LVL1178
+	.4byte	0x32a3
 	.uleb128 0x34
-	.8byte	.LVL1184
-	.4byte	0x29a4
-	.4byte	0x3265
+	.8byte	.LVL1186
+	.4byte	0x298f
+	.4byte	0x3243
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28841,9 +28803,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1197
-	.4byte	0x6db1
-	.4byte	0x327f
+	.8byte	.LVL1199
+	.4byte	0x6d73
+	.4byte	0x325d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28854,9 +28816,9 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1203
-	.4byte	0x4ee3
-	.4byte	0x329d
+	.8byte	.LVL1205
+	.4byte	0x4ec4
+	.4byte	0x327b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28871,28 +28833,28 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1206
-	.4byte	0x3532
-	.uleb128 0x45
-	.8byte	.LVL1209
-	.4byte	0x695b
+	.8byte	.LVL1208
+	.4byte	0x3503
 	.uleb128 0x45
 	.8byte	.LVL1211
-	.4byte	0x32c5
+	.4byte	0x6951
+	.uleb128 0x45
+	.8byte	.LVL1213
+	.4byte	0x32a3
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF621
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xc9
 	.8byte	.LFB309
 	.8byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3320
+	.4byte	0x32fe
 	.uleb128 0x34
-	.8byte	.LVL1170
-	.4byte	0x259f
-	.4byte	0x32fa
+	.8byte	.LVL1172
+	.4byte	0x258a
+	.4byte	0x32d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28901,9 +28863,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1171
-	.4byte	0x259f
-	.4byte	0x3312
+	.8byte	.LVL1173
+	.4byte	0x258a
+	.4byte	0x32f0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28912,11 +28874,11 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x5a
-	.8byte	.LVL1172
-	.4byte	0x3695
+	.8byte	.LVL1174
+	.4byte	0x3666
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF622
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
@@ -28924,27 +28886,27 @@ __func__.7632:
 	.8byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x351d
+	.4byte	0x34ee
 	.uleb128 0x2e
-	.4byte	.LASF623
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
-	.4byte	.LLST406
+	.4byte	.LLST405
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST407
+	.4byte	.LLST406
 	.uleb128 0x32
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST408
+	.4byte	.LLST407
 	.uleb128 0x2b
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdd4
@@ -28952,36 +28914,36 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x32
-	.4byte	.LASF626
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdd4
-	.4byte	.LLST409
+	.4byte	.LLST408
 	.uleb128 0x2b
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0x74
-	.4byte	0x1f04
+	.4byte	0x1eef
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x32
-	.4byte	.LASF627
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x75
-	.4byte	0x1f49
-	.4byte	.LLST410
+	.4byte	0x1f34
+	.4byte	.LLST409
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x352d
+	.4byte	.LASF573
+	.4byte	0x34fe
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7245
 	.uleb128 0x34
-	.8byte	.LVL1771
-	.4byte	0x3148
-	.4byte	0x33e0
+	.8byte	.LVL1770
+	.4byte	0x3126
+	.4byte	0x33be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28990,9 +28952,9 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1773
-	.4byte	0x5968
-	.4byte	0x33f7
+	.8byte	.LVL1772
+	.4byte	0x594e
+	.4byte	0x33d5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29000,18 +28962,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1774
-	.4byte	0x75ef
-	.uleb128 0x45
-	.8byte	.LVL1775
-	.4byte	0x7342
+	.8byte	.LVL1773
+	.4byte	0x75b1
 	.uleb128 0x45
-	.8byte	.LVL1779
-	.4byte	0x7d59
+	.8byte	.LVL1774
+	.4byte	0x7304
 	.uleb128 0x34
-	.8byte	.LVL1780
-	.4byte	0xa94d
-	.4byte	0x3450
+	.8byte	.LVL1778
+	.4byte	0xa94f
+	.4byte	0x3421
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29023,7 +28982,7 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR173
+	.8byte	.LANCHOR171
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -29032,9 +28991,9 @@ __func__.7632:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1782
-	.4byte	0x36c0
-	.4byte	0x3468
+	.8byte	.LVL1780
+	.4byte	0x3691
+	.4byte	0x3439
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29043,18 +29002,18 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1783
-	.4byte	0x6936
+	.8byte	.LVL1781
+	.4byte	0x692c
 	.uleb128 0x45
-	.8byte	.LVL1785
-	.4byte	0x5d63
+	.8byte	.LVL1783
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1786
-	.4byte	0x5694
+	.8byte	.LVL1784
+	.4byte	0x567a
 	.uleb128 0x34
-	.8byte	.LVL1789
-	.4byte	0xa94d
-	.4byte	0x34ba
+	.8byte	.LVL1787
+	.4byte	0xa94f
+	.4byte	0x348b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29075,9 +29034,9 @@ __func__.7632:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1790
-	.4byte	0x5c36
-	.4byte	0x34d8
+	.8byte	.LVL1788
+	.4byte	0x5c1c
+	.4byte	0x34a9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29091,12 +29050,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1791
-	.4byte	0x6d71
+	.8byte	.LVL1789
+	.4byte	0x6d33
 	.uleb128 0x34
-	.8byte	.LVL1794
-	.4byte	0x5c36
-	.4byte	0x3502
+	.8byte	.LVL1792
+	.4byte	0x5c1c
+	.4byte	0x34d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29110,63 +29069,63 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1796
-	.4byte	0x36c0
+	.8byte	.LVL1794
+	.4byte	0x3691
 	.uleb128 0x45
-	.8byte	.LVL1800
-	.4byte	0x695b
+	.8byte	.LVL1798
+	.4byte	0x6951
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x352d
+	.4byte	0x34fe
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x351d
+	.4byte	0x34ee
 	.uleb128 0x43
-	.4byte	.LASF628
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x54
 	.8byte	.LFB307
 	.8byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x35af
+	.4byte	0x3580
 	.uleb128 0x2e
-	.4byte	.LASF629
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
-	.4byte	.LLST133
+	.4byte	.LLST124
 	.uleb128 0x2e
 	.4byte	.LASF391
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
-	.4byte	.LLST134
+	.4byte	.LLST125
 	.uleb128 0x31
 	.string	"lpa"
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
-	.4byte	.LLST135
+	.4byte	.LLST126
 	.uleb128 0x32
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdc9
-	.4byte	.LLST136
+	.4byte	.LLST127
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x57
 	.4byte	0xdc9
-	.4byte	.LLST137
+	.4byte	.LLST128
 	.uleb128 0x36
-	.8byte	.LVL549
-	.4byte	0x6d71
+	.8byte	.LVL526
+	.4byte	0x6d33
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29178,7 +29137,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF631
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdd4
@@ -29186,29 +29145,29 @@ __func__.7632:
 	.8byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x35ed
+	.4byte	0x35be
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdc9
-	.4byte	.LLST131
+	.4byte	.LLST122
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x4b
 	.4byte	0xdc9
-	.4byte	.LLST132
+	.4byte	.LLST123
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF632
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x38
 	.8byte	.LFB305
 	.8byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3641
+	.4byte	0x3612
 	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
@@ -29217,7 +29176,7 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5c
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdd4
@@ -29228,23 +29187,23 @@ __func__.7632:
 	.byte	0x5
 	.byte	0x3a
 	.4byte	0xdc9
-	.4byte	.LLST129
+	.4byte	.LLST120
 	.uleb128 0x32
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdc9
-	.4byte	.LLST130
+	.4byte	.LLST121
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF635
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x29
 	.8byte	.LFB304
 	.8byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3695
+	.4byte	0x3666
 	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
@@ -29253,7 +29212,7 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x5c
-	.4byte	.LASF633
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdd4
@@ -29264,68 +29223,68 @@ __func__.7632:
 	.byte	0x5
 	.byte	0x2b
 	.4byte	0xdc9
-	.4byte	.LLST127
+	.4byte	.LLST118
 	.uleb128 0x32
-	.4byte	.LASF634
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdc9
-	.4byte	.LLST128
+	.4byte	.LLST119
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF636
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x15
 	.8byte	.LFB303
 	.8byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x36c0
+	.4byte	0x3691
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x17
 	.4byte	0xdc9
-	.4byte	.LLST126
+	.4byte	.LLST117
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF637
+	.4byte	.LASF636
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0x5b
 	.8byte	.LFB302
 	.8byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x37af
+	.4byte	0x3780
 	.uleb128 0x53
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa93
+	.2byte	0xac6
 	.4byte	0xdc9
-	.4byte	.LLST325
+	.4byte	.LLST324
 	.uleb128 0x54
 	.string	"ret"
 	.byte	0x2
-	.2byte	0xa95
+	.2byte	0xac8
 	.4byte	0x5b
-	.4byte	.LLST326
+	.4byte	.LLST325
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37bf
+	.4byte	.LASF573
+	.4byte	0x3790
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7175
 	.uleb128 0x34
-	.8byte	.LVL1341
-	.4byte	0xa94d
-	.4byte	0x373f
+	.8byte	.LVL1343
+	.4byte	0xa94f
+	.4byte	0x3710
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC98
+	.8byte	.LC101
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29339,9 +29298,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1346
-	.4byte	0xa94d
-	.4byte	0x3772
+	.8byte	.LVL1348
+	.4byte	0xa94f
+	.4byte	0x3743
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29353,20 +29312,20 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR160
+	.8byte	.LANCHOR159
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa9a
+	.2byte	0xacd
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1347
-	.4byte	0x37c4
-	.uleb128 0x36
 	.8byte	.LVL1349
-	.4byte	0xa94d
+	.4byte	0x3795
+	.uleb128 0x36
+	.8byte	.LVL1351
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29378,88 +29337,88 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR160
+	.8byte	.LANCHOR159
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xaaa
+	.2byte	0xadd
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x37bf
+	.4byte	0x3790
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x37af
+	.4byte	0x3780
 	.uleb128 0x4a
-	.4byte	.LASF638
+	.4byte	.LASF637
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x37ef
+	.4byte	0x37c0
 	.uleb128 0x4b
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa7e
+	.2byte	0xab1
 	.4byte	0xdc9
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x37ff
-	.4byte	.LASF638
+	.4byte	.LASF573
+	.4byte	0x37d0
+	.4byte	.LASF637
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x37ff
+	.4byte	0x37d0
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x37ef
+	.4byte	0x37c0
 	.uleb128 0x49
-	.4byte	.LASF639
+	.4byte	.LASF638
 	.byte	0x2
-	.2byte	0xa5e
+	.2byte	0xa91
 	.4byte	0xdd4
 	.8byte	.LFB300
 	.8byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3932
+	.4byte	0x3903
 	.uleb128 0x53
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa5e
-	.4byte	0x1f04
-	.4byte	.LLST123
+	.2byte	0xa91
+	.4byte	0x1eef
+	.4byte	.LLST114
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0xa60
+	.2byte	0xa93
 	.4byte	0xdc9
-	.4byte	.LLST124
+	.4byte	.LLST115
 	.uleb128 0x55
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x2
-	.2byte	0xa61
+	.2byte	0xa94
 	.4byte	0xdd4
-	.4byte	.LLST125
+	.4byte	.LLST116
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x352d
+	.4byte	.LASF573
+	.4byte	0x34fe
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7155
 	.uleb128 0x34
-	.8byte	.LVL508
-	.4byte	0xa94d
-	.4byte	0x389c
+	.8byte	.LVL485
+	.4byte	0xa94f
+	.4byte	0x386d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29471,18 +29430,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa63
+	.2byte	0xa96
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL509
-	.4byte	0xa94d
-	.4byte	0x38cf
+	.8byte	.LVL486
+	.4byte	0xa94f
+	.4byte	0x38a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29494,18 +29453,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa64
+	.2byte	0xa97
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL510
-	.4byte	0xa94d
-	.4byte	0x3902
+	.8byte	.LVL487
+	.4byte	0xa94f
+	.4byte	0x38d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29517,17 +29476,17 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa65
+	.2byte	0xa98
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL514
-	.4byte	0xa94d
+	.8byte	.LVL491
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29539,47 +29498,47 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR90
+	.8byte	.LANCHOR88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa7a
+	.2byte	0xaad
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF642
+	.4byte	.LASF641
 	.byte	0x2
-	.2byte	0xa46
+	.2byte	0xa79
 	.4byte	0x5b
 	.8byte	.LFB299
 	.8byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a3d
+	.4byte	0x3a0e
 	.uleb128 0x53
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0xa46
-	.4byte	0x1f04
-	.4byte	.LLST391
+	.2byte	0xa79
+	.4byte	0x1eef
+	.4byte	.LLST396
 	.uleb128 0x55
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0xa48
+	.2byte	0xa7b
 	.4byte	0xdc9
-	.4byte	.LLST392
+	.4byte	.LLST397
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x3a4d
+	.4byte	.LASF573
+	.4byte	0x3a1e
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7148
 	.uleb128 0x34
-	.8byte	.LVL1703
-	.4byte	0xa94d
-	.4byte	0x39ba
+	.8byte	.LVL1732
+	.4byte	0xa94f
+	.4byte	0x398b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29597,12 +29556,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa49
+	.2byte	0xa7c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1704
-	.4byte	0x6936
-	.4byte	0x39d2
+	.8byte	.LVL1733
+	.4byte	0x692c
+	.4byte	0x39a3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29611,12 +29570,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1705
-	.4byte	0x37c4
+	.8byte	.LVL1734
+	.4byte	0x3795
 	.uleb128 0x34
-	.8byte	.LVL1706
-	.4byte	0x3a52
-	.4byte	0x39f7
+	.8byte	.LVL1735
+	.4byte	0x3a23
+	.4byte	0x39c8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29625,12 +29584,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1707
-	.4byte	0x5d63
+	.8byte	.LVL1736
+	.4byte	0x5d49
 	.uleb128 0x34
-	.8byte	.LVL1708
-	.4byte	0x5968
-	.4byte	0x3a1b
+	.8byte	.LVL1737
+	.4byte	0x594e
+	.4byte	0x39ec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29638,11 +29597,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1709
-	.4byte	0x5694
+	.8byte	.LVL1738
+	.4byte	0x567a
 	.uleb128 0x36
-	.8byte	.LVL1713
-	.4byte	0x695b
+	.8byte	.LVL1742
+	.4byte	0x6951
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29653,95 +29612,95 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3a4d
+	.4byte	0x3a1e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3a3d
+	.4byte	0x3a0e
 	.uleb128 0x49
-	.4byte	.LASF643
+	.4byte	.LASF642
 	.byte	0x2
-	.2byte	0x9e2
+	.2byte	0xa15
 	.4byte	0x5b
 	.8byte	.LFB298
 	.8byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d7d
+	.4byte	0x3d4e
 	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
-	.2byte	0x9e2
-	.4byte	0x1f04
-	.4byte	.LLST312
+	.2byte	0xa15
+	.4byte	0x1eef
+	.4byte	.LLST311
 	.uleb128 0x55
-	.4byte	.LASF644
+	.4byte	.LASF643
 	.byte	0x2
-	.2byte	0x9e4
+	.2byte	0xa17
 	.4byte	0xdc9
-	.4byte	.LLST313
+	.4byte	.LLST312
 	.uleb128 0x4c
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
-	.4byte	.LLST314
+	.4byte	.LLST313
 	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
-	.4byte	.LLST315
+	.4byte	.LLST314
 	.uleb128 0x4c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x9e5
+	.2byte	0xa18
 	.4byte	0xdc9
 	.uleb128 0x55
-	.4byte	.LASF645
+	.4byte	.LASF644
 	.byte	0x2
-	.2byte	0x9e6
+	.2byte	0xa19
 	.4byte	0x5b
-	.4byte	.LLST316
+	.4byte	.LLST315
 	.uleb128 0x55
-	.4byte	.LASF646
+	.4byte	.LASF645
 	.byte	0x2
-	.2byte	0x9e7
+	.2byte	0xa1a
 	.4byte	0xdc9
-	.4byte	.LLST317
+	.4byte	.LLST316
 	.uleb128 0x4e
-	.4byte	.LASF647
+	.4byte	.LASF646
 	.byte	0x2
-	.2byte	0x9e8
+	.2byte	0xa1b
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x3d8d
+	.4byte	.LASF573
+	.4byte	0x3d5e
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.7127
 	.uleb128 0x5e
-	.4byte	0x5413
-	.8byte	.LBB248
-	.8byte	.LBE248-.LBB248
+	.4byte	0x53f4
+	.8byte	.LBB283
+	.8byte	.LBE283-.LBB283
 	.byte	0x2
-	.2byte	0xa18
-	.4byte	0x3b4d
+	.2byte	0xa4b
+	.4byte	0x3b1e
 	.uleb128 0x47
-	.4byte	0x542c
-	.4byte	.LLST318
+	.4byte	0x540d
+	.4byte	.LLST317
 	.uleb128 0x47
-	.4byte	0x5420
-	.4byte	.LLST319
+	.4byte	0x5401
+	.4byte	.LLST318
 	.uleb128 0x36
-	.8byte	.LVL1297
-	.4byte	0x979f
+	.8byte	.LVL1299
+	.4byte	0x96a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29749,15 +29708,15 @@ __func__.7632:
 	.byte	0x84
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x542c
+	.4byte	0x540d
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1269
-	.4byte	0xa94d
-	.4byte	0x3b80
+	.8byte	.LVL1271
+	.4byte	0xa94f
+	.4byte	0x3b51
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29769,18 +29728,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9e9
+	.2byte	0xa1c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1273
-	.4byte	0x66ea
-	.4byte	0x3b9f
+	.8byte	.LVL1275
+	.4byte	0x66d0
+	.4byte	0x3b70
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29789,9 +29748,9 @@ __func__.7632:
 	.8byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1275
-	.4byte	0xa94d
-	.4byte	0x3bd2
+	.8byte	.LVL1277
+	.4byte	0xa94f
+	.4byte	0x3ba3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29803,18 +29762,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9f2
+	.2byte	0xa25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1276
-	.4byte	0x460e
-	.4byte	0x3bea
+	.8byte	.LVL1278
+	.4byte	0x45ef
+	.4byte	0x3bbb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29823,9 +29782,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1277
-	.4byte	0x6936
-	.4byte	0x3c02
+	.8byte	.LVL1279
+	.4byte	0x692c
+	.4byte	0x3bd3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29834,9 +29793,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1278
-	.4byte	0xa94d
-	.4byte	0x3c35
+	.8byte	.LVL1280
+	.4byte	0xa94f
+	.4byte	0x3c06
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29848,18 +29807,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x9fd
+	.2byte	0xa30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1281
-	.4byte	0xa94d
-	.4byte	0x3c68
+	.8byte	.LVL1283
+	.4byte	0xa94f
+	.4byte	0x3c39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29871,18 +29830,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa00
+	.2byte	0xa33
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1283
-	.4byte	0xa94d
-	.4byte	0x3c9b
+	.8byte	.LVL1285
+	.4byte	0xa94f
+	.4byte	0x3c6c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29894,18 +29853,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0b
+	.2byte	0xa3e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1284
-	.4byte	0xa94d
-	.4byte	0x3cce
+	.8byte	.LVL1286
+	.4byte	0xa94f
+	.4byte	0x3c9f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29917,18 +29876,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa0d
+	.2byte	0xa40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1285
-	.4byte	0x5413
-	.4byte	0x3ceb
+	.8byte	.LVL1287
+	.4byte	0x53f4
+	.4byte	0x3cbc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29942,9 +29901,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1288
-	.4byte	0x2721
-	.4byte	0x3d03
+	.8byte	.LVL1290
+	.4byte	0x270c
+	.4byte	0x3cd4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -29953,9 +29912,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1290
-	.4byte	0x3f10
-	.4byte	0x3d1b
+	.8byte	.LVL1292
+	.4byte	0x3ef1
+	.4byte	0x3cec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29964,12 +29923,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1291
-	.4byte	0x7342
+	.8byte	.LVL1293
+	.4byte	0x7304
 	.uleb128 0x34
-	.8byte	.LVL1292
-	.4byte	0x6936
-	.4byte	0x3d40
+	.8byte	.LVL1294
+	.4byte	0x692c
+	.4byte	0x3d11
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29978,11 +29937,11 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1302
-	.4byte	0x75ef
+	.8byte	.LVL1304
+	.4byte	0x75b1
 	.uleb128 0x36
-	.8byte	.LVL1306
-	.4byte	0xa94d
+	.8byte	.LVL1308
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29994,98 +29953,104 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR158
+	.8byte	.LANCHOR157
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa42
+	.2byte	0xa75
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3d8d
+	.4byte	0x3d5e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3d7d
+	.4byte	0x3d4e
 	.uleb128 0x4a
-	.4byte	.LASF648
+	.4byte	.LASF647
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3db0
+	.4byte	0x3d81
 	.uleb128 0x4b
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x9d9
+	.2byte	0xa0c
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF649
+	.4byte	.LASF648
 	.byte	0x2
-	.2byte	0x98e
+	.2byte	0x9c3
 	.4byte	0xdc9
 	.8byte	.LFB296
 	.8byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e7c
+	.4byte	0x3e5d
+	.uleb128 0x55
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x9c5
+	.4byte	0xdc9
+	.4byte	.LLST104
 	.uleb128 0x55
 	.4byte	.LASF650
 	.byte	0x2
-	.2byte	0x990
+	.2byte	0x9c6
 	.4byte	0xdc9
-	.4byte	.LLST114
+	.4byte	.LLST105
 	.uleb128 0x55
 	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x991
+	.2byte	0x9c7
 	.4byte	0xdc9
-	.4byte	.LLST115
+	.4byte	.LLST106
 	.uleb128 0x55
 	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x992
-	.4byte	0xdc9
-	.4byte	.LLST116
+	.2byte	0x9c8
+	.4byte	0x1e17
+	.4byte	.LLST107
 	.uleb128 0x55
 	.4byte	.LASF653
 	.byte	0x2
-	.2byte	0x993
-	.4byte	0x1e2c
-	.4byte	.LLST117
-	.uleb128 0x55
-	.4byte	.LASF654
-	.byte	0x2
-	.2byte	0x994
+	.2byte	0x9c9
 	.4byte	0xdc9
-	.4byte	.LLST118
+	.4byte	.LLST108
 	.uleb128 0x55
-	.4byte	.LASF655
+	.4byte	.LASF654
 	.byte	0x2
-	.2byte	0x995
+	.2byte	0x9ca
 	.4byte	0xdc9
-	.4byte	.LLST119
+	.4byte	.LLST109
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x996
+	.2byte	0x9cb
 	.4byte	0xdd4
-	.4byte	.LLST120
+	.4byte	.LLST110
+	.uleb128 0x55
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x9cc
+	.4byte	0xdc9
+	.4byte	.LLST111
 	.uleb128 0x45
-	.8byte	.LVL487
-	.4byte	0x3e7c
+	.8byte	.LVL462
+	.4byte	0x3e5d
 	.uleb128 0x45
-	.8byte	.LVL493
-	.4byte	0x3edd
+	.8byte	.LVL468
+	.4byte	0x3ebe
 	.uleb128 0x36
-	.8byte	.LVL495
-	.4byte	0xa94d
+	.8byte	.LVL470
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30101,95 +30066,95 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF656
+	.4byte	.LASF655
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdc9
 	.8byte	.LFB295
 	.8byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3edd
+	.4byte	0x3ebe
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x979
+	.2byte	0x9ae
 	.4byte	0xdc9
-	.4byte	.LLST103
+	.4byte	.LLST93
 	.uleb128 0x55
-	.4byte	.LASF657
+	.4byte	.LASF656
 	.byte	0x2
-	.2byte	0x97b
+	.2byte	0x9b0
 	.4byte	0xdc9
-	.4byte	.LLST104
+	.4byte	.LLST94
 	.uleb128 0x55
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x97c
+	.2byte	0x9b1
 	.4byte	0xdc9
-	.4byte	.LLST105
+	.4byte	.LLST95
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x97d
+	.2byte	0x9b2
 	.4byte	0xdc9
-	.4byte	.LLST106
+	.4byte	.LLST96
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF658
+	.4byte	.LASF657
 	.byte	0x2
-	.2byte	0x970
+	.2byte	0x9a5
 	.4byte	0xdc9
 	.8byte	.LFB294
 	.8byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f10
+	.4byte	0x3ef1
 	.uleb128 0x55
-	.4byte	.LASF652
+	.4byte	.LASF651
 	.byte	0x2
-	.2byte	0x972
+	.2byte	0x9a7
 	.4byte	0xdc9
-	.4byte	.LLST102
+	.4byte	.LLST92
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF659
+	.4byte	.LASF658
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0x5b
 	.8byte	.LFB293
 	.8byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f98
+	.4byte	0x3f79
 	.uleb128 0x53
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x2
-	.2byte	0x960
+	.2byte	0x995
 	.4byte	0xdc9
-	.4byte	.LLST98
+	.4byte	.LLST88
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdc9
-	.4byte	.LLST99
+	.4byte	.LLST89
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x962
+	.2byte	0x997
 	.4byte	0xdc9
-	.4byte	.LLST100
+	.4byte	.LLST90
 	.uleb128 0x55
 	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x963
+	.2byte	0x998
 	.4byte	0xdc9
-	.4byte	.LLST101
+	.4byte	.LLST91
 	.uleb128 0x34
-	.8byte	.LVL295
-	.4byte	0x6e0c
-	.4byte	0x3f8a
+	.8byte	.LVL270
+	.4byte	0x6dce
+	.4byte	0x3f6b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30198,68 +30163,68 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL296
-	.4byte	0x7560
+	.8byte	.LVL271
+	.4byte	0x7522
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF660
+	.4byte	.LASF659
 	.byte	0x2
-	.2byte	0x901
+	.2byte	0x933
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3fc2
+	.4byte	0x3fa3
 	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x903
+	.2byte	0x935
 	.4byte	0x5b
 	.uleb128 0x50
 	.uleb128 0x4c
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x928
-	.4byte	0x1f04
+	.2byte	0x95a
+	.4byte	0x1eef
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF661
+	.4byte	.LASF660
 	.byte	0x2
-	.2byte	0x8e2
+	.2byte	0x914
 	.8byte	.LFB291
 	.8byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x40c6
+	.4byte	0x40a7
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x8e4
+	.2byte	0x916
 	.4byte	0x5b
-	.4byte	.LLST251
+	.4byte	.LLST250
 	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x8e5
+	.2byte	0x917
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF662
+	.4byte	.LASF661
 	.byte	0x2
-	.2byte	0x8e6
-	.4byte	0x2dff
-	.4byte	.LLST252
+	.2byte	0x918
+	.4byte	0x2dea
+	.4byte	.LLST251
 	.uleb128 0x34
-	.8byte	.LVL956
-	.4byte	0xa94d
-	.4byte	0x4032
+	.8byte	.LVL958
+	.4byte	0xa94f
+	.4byte	0x4013
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC88
+	.8byte	.LC91
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30268,9 +30233,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL959
-	.4byte	0x5c36
-	.4byte	0x4056
+	.8byte	.LVL961
+	.4byte	0x5c1c
+	.4byte	0x4037
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30290,15 +30255,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL960
-	.4byte	0xa94d
-	.4byte	0x407b
+	.8byte	.LVL962
+	.4byte	0xa94f
+	.4byte	0x405c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC89
+	.8byte	.LC92
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30307,15 +30272,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL962
-	.4byte	0x29a4
-	.4byte	0x40a4
+	.8byte	.LVL964
+	.4byte	0x298f
+	.4byte	0x4085
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30328,14 +30293,14 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL963
-	.4byte	0xa94d
+	.8byte	.LVL965
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC90
+	.8byte	.LC93
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30345,30 +30310,30 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF663
+	.4byte	.LASF662
 	.byte	0x2
-	.2byte	0x8ae
+	.2byte	0x8e0
 	.8byte	.LFB290
 	.8byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4248
+	.4byte	0x4229
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x8b0
+	.2byte	0x8e2
 	.4byte	0xdc9
-	.4byte	.LLST283
+	.4byte	.LLST282
 	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x8b1
+	.2byte	0x8e3
 	.4byte	0xdd4
-	.4byte	.LLST284
+	.4byte	.LLST283
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x8b2
+	.2byte	0x8e4
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
@@ -30376,33 +30341,33 @@ __func__.7632:
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
-	.2byte	0x8b3
+	.2byte	0x8e5
 	.4byte	0xdc9
-	.4byte	.LLST285
+	.4byte	.LLST284
 	.uleb128 0x55
-	.4byte	.LASF665
+	.4byte	.LASF664
 	.byte	0x2
-	.2byte	0x8b4
+	.2byte	0x8e6
 	.4byte	0xdc9
-	.4byte	.LLST286
+	.4byte	.LLST285
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4258
+	.4byte	.LASF573
+	.4byte	0x4239
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7043
+	.8byte	__func__.7042
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x180
-	.4byte	0x4178
+	.4byte	.Ldebug_ranges0+0x210
+	.4byte	0x4159
 	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x8d1
+	.2byte	0x903
 	.4byte	0xdc9
-	.4byte	.LLST287
+	.4byte	.LLST286
 	.uleb128 0x36
-	.8byte	.LVL1165
-	.4byte	0xa94d
+	.8byte	.LVL1167
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30418,26 +30383,26 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1143
-	.4byte	0xa94d
-	.4byte	0x41a4
+	.8byte	.LVL1145
+	.4byte	0xa94f
+	.4byte	0x4185
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC91
+	.8byte	.LC94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR156
+	.8byte	.LANCHOR155
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1144
-	.4byte	0x259f
-	.4byte	0x41c9
+	.8byte	.LVL1146
+	.4byte	0x258a
+	.4byte	0x41aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30458,9 +30423,9 @@ __func__.7632:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1152
-	.4byte	0xa94d
-	.4byte	0x41fc
+	.8byte	.LVL1154
+	.4byte	0xa94f
+	.4byte	0x41dd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30472,18 +30437,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR156
+	.8byte	.LANCHOR155
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x8df
+	.2byte	0x911
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1154
-	.4byte	0x5c36
-	.4byte	0x4220
+	.8byte	.LVL1156
+	.4byte	0x5c1c
+	.4byte	0x4201
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30503,11 +30468,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1155
-	.4byte	0x6d71
+	.8byte	.LVL1157
+	.4byte	0x6d33
 	.uleb128 0x36
-	.8byte	.LVL1159
-	.4byte	0xa94d
+	.8byte	.LVL1161
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30524,38 +30489,38 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4258
+	.4byte	0x4239
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4248
+	.4byte	0x4229
 	.uleb128 0x5f
-	.4byte	.LASF666
+	.4byte	.LASF665
 	.byte	0x2
-	.2byte	0x88f
+	.2byte	0x8c1
 	.8byte	.LFB289
 	.8byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4391
+	.4byte	0x4372
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x891
+	.2byte	0x8c3
 	.4byte	0xdc9
-	.4byte	.LLST388
+	.4byte	.LLST393
 	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x892
+	.2byte	0x8c4
 	.4byte	0xdd4
-	.4byte	.LLST389
+	.4byte	.LLST394
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x893
+	.2byte	0x8c5
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
@@ -30563,25 +30528,25 @@ __func__.7632:
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
-	.2byte	0x894
+	.2byte	0x8c6
 	.4byte	0xdc9
-	.4byte	.LLST390
+	.4byte	.LLST395
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x43a1
+	.4byte	.LASF573
+	.4byte	0x4382
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7027
+	.8byte	__func__.7026
 	.uleb128 0x34
-	.8byte	.LVL1683
-	.4byte	0xa94d
-	.4byte	0x42f7
+	.8byte	.LVL1712
+	.4byte	0xa94f
+	.4byte	0x42d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC91
+	.8byte	.LC94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30590,9 +30555,9 @@ __func__.7632:
 	.8byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1684
-	.4byte	0x259f
-	.4byte	0x430f
+	.8byte	.LVL1713
+	.4byte	0x258a
+	.4byte	0x42f0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30601,9 +30566,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1689
-	.4byte	0x5c36
-	.4byte	0x4333
+	.8byte	.LVL1718
+	.4byte	0x5c1c
+	.4byte	0x4314
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30623,12 +30588,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1690
-	.4byte	0x6d71
+	.8byte	.LVL1719
+	.4byte	0x6d33
 	.uleb128 0x34
-	.8byte	.LVL1694
-	.4byte	0xa94d
-	.4byte	0x435e
+	.8byte	.LVL1723
+	.4byte	0xa94f
+	.4byte	0x433f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30643,9 +30608,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1695
-	.4byte	0x37c4
-	.4byte	0x4376
+	.8byte	.LVL1724
+	.4byte	0x3795
+	.4byte	0x4357
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30654,66 +30619,66 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1696
-	.4byte	0x5d63
+	.8byte	.LVL1725
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1697
-	.4byte	0x5694
+	.8byte	.LVL1726
+	.4byte	0x567a
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x43a1
+	.4byte	0x4382
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4391
+	.4byte	0x4372
 	.uleb128 0x5f
-	.4byte	.LASF667
+	.4byte	.LASF666
 	.byte	0x2
-	.2byte	0x86b
+	.2byte	0x89c
 	.8byte	.LFB288
 	.8byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x445e
+	.4byte	0x443f
 	.uleb128 0x53
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x86b
-	.4byte	0x1f04
-	.4byte	.LLST356
+	.2byte	0x89c
+	.4byte	0x1eef
+	.4byte	.LLST355
 	.uleb128 0x2a
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x86d
+	.2byte	0x89e
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x86e
-	.4byte	0x2dff
-	.4byte	.LLST357
+	.2byte	0x89f
+	.4byte	0x2dea
+	.4byte	.LLST356
 	.uleb128 0x55
-	.4byte	.LASF669
+	.4byte	.LASF668
 	.byte	0x2
-	.2byte	0x86f
+	.2byte	0x8a0
 	.4byte	0x5b
-	.4byte	.LLST358
+	.4byte	.LLST357
 	.uleb128 0x61
 	.4byte	.LASF384
 	.byte	0x2
-	.2byte	0x870
+	.2byte	0x8a1
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1517
-	.4byte	0x3804
-	.4byte	0x4428
+	.8byte	.LVL1521
+	.4byte	0x37d5
+	.4byte	0x4409
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30722,15 +30687,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1520
-	.4byte	0x27e7
-	.4byte	0x4450
+	.8byte	.LVL1522
+	.4byte	0x27d2
+	.4byte	0x4431
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
 	.byte	0x8f
-	.sleb128 112
+	.sleb128 80
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30748,22 +30713,22 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1521
-	.4byte	0x36c0
+	.8byte	.LVL1523
+	.4byte	0x3691
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF670
+	.4byte	.LASF669
 	.byte	0x2
-	.2byte	0x851
+	.2byte	0x882
 	.8byte	.LFB287
 	.8byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x44bf
+	.4byte	0x44a0
 	.uleb128 0x34
-	.8byte	.LVL1661
-	.4byte	0x59d0
-	.4byte	0x449e
+	.8byte	.LVL1663
+	.4byte	0x59b6
+	.4byte	0x447f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30782,8 +30747,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1662
-	.4byte	0x259f
+	.8byte	.LVL1664
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30804,66 +30769,66 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x56
-	.4byte	.LASF672
+	.4byte	.LASF671
 	.byte	0x2
-	.2byte	0x83d
+	.2byte	0x86e
 	.byte	0x1
 	.uleb128 0x49
-	.4byte	.LASF673
+	.4byte	.LASF672
 	.byte	0x2
-	.2byte	0x812
+	.2byte	0x843
 	.4byte	0x5b
 	.8byte	.LFB285
 	.8byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x45f9
+	.4byte	0x45da
 	.uleb128 0x55
-	.4byte	.LASF650
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x845
+	.4byte	0xdc9
+	.4byte	.LLST276
+	.uleb128 0x55
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdc9
 	.4byte	.LLST277
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdc9
 	.4byte	.LLST278
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF375
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x845
 	.4byte	0xdc9
 	.4byte	.LLST279
 	.uleb128 0x55
-	.4byte	.LASF375
+	.4byte	.LASF673
 	.byte	0x2
-	.2byte	0x814
+	.2byte	0x846
 	.4byte	0xdc9
 	.4byte	.LLST280
 	.uleb128 0x55
 	.4byte	.LASF674
 	.byte	0x2
-	.2byte	0x815
+	.2byte	0x846
 	.4byte	0xdc9
 	.4byte	.LLST281
-	.uleb128 0x55
-	.4byte	.LASF675
-	.byte	0x2
-	.2byte	0x815
-	.4byte	0xdc9
-	.4byte	.LLST282
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4609
+	.4byte	.LASF573
+	.4byte	0x45ea
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7002
+	.8byte	__func__.7001
 	.uleb128 0x34
-	.8byte	.LVL1117
-	.4byte	0x259f
-	.4byte	0x4574
+	.8byte	.LVL1119
+	.4byte	0x258a
+	.4byte	0x4555
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30871,9 +30836,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1121
-	.4byte	0x6e0c
-	.4byte	0x458c
+	.8byte	.LVL1123
+	.4byte	0x6dce
+	.4byte	0x456d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30882,12 +30847,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1122
-	.4byte	0x7560
+	.8byte	.LVL1124
+	.4byte	0x7522
 	.uleb128 0x34
-	.8byte	.LVL1129
-	.4byte	0x695b
-	.4byte	0x45b1
+	.8byte	.LVL1131
+	.4byte	0x6951
+	.4byte	0x4592
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30896,9 +30861,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1137
-	.4byte	0x6936
-	.4byte	0x45c9
+	.8byte	.LVL1139
+	.4byte	0x692c
+	.4byte	0x45aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30907,8 +30872,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1139
-	.4byte	0xa94d
+	.8byte	.LVL1141
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30920,62 +30885,62 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR155
+	.8byte	.LANCHOR154
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x839
+	.2byte	0x86a
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4609
+	.4byte	0x45ea
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x45f9
+	.4byte	0x45da
 	.uleb128 0x49
-	.4byte	.LASF676
+	.4byte	.LASF675
 	.byte	0x2
-	.2byte	0x7fc
+	.2byte	0x82d
 	.4byte	0x5b
 	.8byte	.LFB284
 	.8byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46c6
+	.4byte	0x46a7
 	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
-	.2byte	0x7fc
-	.4byte	0x1f04
-	.4byte	.LLST95
+	.2byte	0x82d
+	.4byte	0x1eef
+	.4byte	.LLST85
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdc9
-	.4byte	.LLST96
+	.4byte	.LLST86
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7fe
+	.2byte	0x82f
 	.4byte	0xdc9
-	.4byte	.LLST97
+	.4byte	.LLST87
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6981
+	.8byte	__func__.6980
 	.uleb128 0x34
-	.8byte	.LVL278
-	.4byte	0xa94d
-	.4byte	0x46a4
+	.8byte	.LVL253
+	.4byte	0xa94f
+	.4byte	0x4685
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30987,20 +30952,20 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR61
+	.8byte	.LANCHOR60
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x800
+	.2byte	0x831
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL282
-	.4byte	0x6e0c
+	.8byte	.LVL257
+	.4byte	0x6dce
 	.uleb128 0x36
-	.8byte	.LVL284
-	.4byte	0x7560
+	.8byte	.LVL259
+	.4byte	0x7522
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31010,19 +30975,19 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF677
+	.4byte	.LASF676
 	.byte	0x2
-	.2byte	0x7ef
+	.2byte	0x820
 	.4byte	0x5b
 	.8byte	.LFB283
 	.8byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x476a
+	.4byte	0x474b
 	.uleb128 0x34
-	.8byte	.LVL1804
-	.4byte	0x4790
-	.4byte	0x4700
+	.8byte	.LVL1802
+	.4byte	0x4771
+	.4byte	0x46e1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31031,9 +30996,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1805
-	.4byte	0x476a
-	.4byte	0x4718
+	.8byte	.LVL1803
+	.4byte	0x474b
+	.4byte	0x46f9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31042,9 +31007,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1806
-	.4byte	0x4790
-	.4byte	0x4730
+	.8byte	.LVL1804
+	.4byte	0x4771
+	.4byte	0x4711
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31053,9 +31018,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1807
-	.4byte	0x476a
-	.4byte	0x4748
+	.8byte	.LVL1805
+	.4byte	0x474b
+	.4byte	0x4729
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31064,11 +31029,11 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1808
-	.4byte	0x313f
+	.8byte	.LVL1806
+	.4byte	0x311d
 	.uleb128 0x36
-	.8byte	.LVL1809
-	.4byte	0x36c0
+	.8byte	.LVL1807
+	.4byte	0x3691
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31078,226 +31043,226 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x62
-	.4byte	.LASF713
+	.4byte	.LASF712
 	.byte	0x2
-	.2byte	0x7dc
+	.2byte	0x80d
 	.byte	0x1
-	.4byte	0x4790
+	.4byte	0x4771
 	.uleb128 0x4b
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x2
-	.2byte	0x7dc
-	.4byte	0x1f04
+	.2byte	0x80d
+	.4byte	0x1eef
 	.uleb128 0x4c
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x7de
+	.2byte	0x80f
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF678
+	.4byte	.LASF677
 	.byte	0x2
-	.2byte	0x677
+	.2byte	0x6a8
 	.4byte	0x5b
 	.8byte	.LFB281
 	.8byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d8d
+	.4byte	0x4d6e
 	.uleb128 0x53
-	.4byte	.LASF614
+	.4byte	.LASF613
+	.byte	0x2
+	.2byte	0x6a8
+	.4byte	0x1eef
+	.4byte	.LLST330
+	.uleb128 0x55
+	.4byte	.LASF678
 	.byte	0x2
-	.2byte	0x677
-	.4byte	0x1f04
+	.2byte	0x6aa
+	.4byte	0xdc9
 	.4byte	.LLST331
 	.uleb128 0x55
 	.4byte	.LASF679
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6aa
 	.4byte	0xdc9
 	.4byte	.LLST332
 	.uleb128 0x55
-	.4byte	.LASF680
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x679
+	.2byte	0x6ab
 	.4byte	0xdc9
 	.4byte	.LLST333
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdc9
 	.4byte	.LLST334
 	.uleb128 0x55
-	.4byte	.LASF382
+	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ab
 	.4byte	0xdc9
 	.4byte	.LLST335
 	.uleb128 0x55
-	.4byte	.LASF380
+	.4byte	.LASF680
 	.byte	0x2
-	.2byte	0x67a
+	.2byte	0x6ac
 	.4byte	0xdc9
 	.4byte	.LLST336
 	.uleb128 0x55
 	.4byte	.LASF681
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ac
 	.4byte	0xdc9
 	.4byte	.LLST337
 	.uleb128 0x55
-	.4byte	.LASF682
+	.4byte	.LASF596
 	.byte	0x2
-	.2byte	0x67b
+	.2byte	0x6ad
 	.4byte	0xdc9
 	.4byte	.LLST338
 	.uleb128 0x55
-	.4byte	.LASF597
+	.4byte	.LASF682
 	.byte	0x2
-	.2byte	0x67c
-	.4byte	0xdc9
+	.2byte	0x6ae
+	.4byte	0x5b
 	.4byte	.LLST339
 	.uleb128 0x55
 	.4byte	.LASF683
 	.byte	0x2
-	.2byte	0x67d
-	.4byte	0x5b
-	.4byte	.LLST340
-	.uleb128 0x55
-	.4byte	.LASF684
-	.byte	0x2
-	.2byte	0x67d
+	.2byte	0x6ae
 	.4byte	0x5b
-	.4byte	.LLST340
+	.4byte	.LLST339
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdc9
-	.4byte	.LLST342
+	.4byte	.LLST341
 	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdc9
-	.4byte	.LLST343
+	.4byte	.LLST342
 	.uleb128 0x54
 	.string	"req"
 	.byte	0x2
-	.2byte	0x67e
+	.2byte	0x6af
 	.4byte	0xdc9
-	.4byte	.LLST344
+	.4byte	.LLST343
 	.uleb128 0x60
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x1
 	.byte	0x68
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -12
 	.uleb128 0x2a
-	.4byte	.LASF625
+	.4byte	.LASF624
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF616
+	.4byte	.LASF615
 	.byte	0x2
-	.2byte	0x67f
+	.2byte	0x6b0
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF630
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x6b1
+	.4byte	0xdc9
+	.4byte	.LLST344
+	.uleb128 0x55
+	.4byte	.LASF684
 	.byte	0x2
-	.2byte	0x680
+	.2byte	0x6b1
 	.4byte	0xdc9
 	.4byte	.LLST345
 	.uleb128 0x55
 	.4byte	.LASF685
 	.byte	0x2
-	.2byte	0x680
-	.4byte	0xdc9
+	.2byte	0x6b2
+	.4byte	0xdd4
 	.4byte	.LLST346
 	.uleb128 0x55
 	.4byte	.LASF686
 	.byte	0x2
-	.2byte	0x681
-	.4byte	0xdd4
+	.2byte	0x6b3
+	.4byte	0xdc9
 	.4byte	.LLST347
 	.uleb128 0x55
-	.4byte	.LASF687
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x682
-	.4byte	0xdc9
+	.2byte	0x6b4
+	.4byte	0x2dea
 	.4byte	.LLST348
-	.uleb128 0x55
-	.4byte	.LASF599
-	.byte	0x2
-	.2byte	0x683
-	.4byte	0x2dff
-	.4byte	.LLST349
 	.uleb128 0x61
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x2
-	.2byte	0x684
+	.2byte	0x6b5
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4d9d
+	.4byte	.LASF573
+	.4byte	0x4d7e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6924
+	.8byte	__func__.6923
 	.uleb128 0x59
-	.4byte	.LASF690
+	.4byte	.LASF689
 	.byte	0x2
-	.2byte	0x713
-	.8byte	.L1032
+	.2byte	0x744
+	.8byte	.L1038
 	.uleb128 0x59
-	.4byte	.LASF620
+	.4byte	.LASF619
 	.byte	0x2
-	.2byte	0x71b
-	.8byte	.L1047
+	.2byte	0x74c
+	.8byte	.L1053
 	.uleb128 0x59
-	.4byte	.LASF691
+	.4byte	.LASF690
 	.byte	0x2
-	.2byte	0x7ce
-	.8byte	.L1053
+	.2byte	0x7ff
+	.8byte	.L1059
 	.uleb128 0x4e
-	.4byte	.LASF692
+	.4byte	.LASF691
 	.byte	0x2
-	.2byte	0x7d8
+	.2byte	0x809
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x220
-	.4byte	0x49b0
+	.4byte	.Ldebug_ranges0+0x2b0
+	.4byte	0x4991
 	.uleb128 0x55
-	.4byte	.LASF693
+	.4byte	.LASF692
 	.byte	0x2
-	.2byte	0x6eb
+	.2byte	0x71c
 	.4byte	0xdd4
-	.4byte	.LLST350
+	.4byte	.LLST349
 	.uleb128 0x55
-	.4byte	.LASF694
+	.4byte	.LASF693
 	.byte	0x2
-	.2byte	0x6ec
+	.2byte	0x71d
 	.4byte	0xdd4
-	.4byte	.LLST351
+	.4byte	.LLST350
 	.uleb128 0x36
-	.8byte	.LVL1430
-	.4byte	0x29a4
+	.8byte	.LVL1432
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -31306,24 +31271,24 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x250
-	.4byte	0x4aab
+	.4byte	.Ldebug_ranges0+0x2e0
+	.4byte	0x4a8c
 	.uleb128 0x55
-	.4byte	.LASF695
+	.4byte	.LASF694
 	.byte	0x2
-	.2byte	0x746
+	.2byte	0x777
 	.4byte	0xdd4
-	.4byte	.LLST352
+	.4byte	.LLST351
 	.uleb128 0x55
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x747
+	.2byte	0x778
 	.4byte	0xdd4
-	.4byte	.LLST353
+	.4byte	.LLST352
 	.uleb128 0x34
-	.8byte	.LVL1473
-	.4byte	0x29a4
-	.4byte	0x49f5
+	.8byte	.LVL1475
+	.4byte	0x298f
+	.4byte	0x49d6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31336,12 +31301,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1475
-	.4byte	0x36c0
+	.8byte	.LVL1477
+	.4byte	0x3691
 	.uleb128 0x34
-	.8byte	.LVL1481
-	.4byte	0x5c36
-	.4byte	0x4a26
+	.8byte	.LVL1483
+	.4byte	0x5c1c
+	.4byte	0x4a07
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31361,9 +31326,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1484
-	.4byte	0x6d22
-	.4byte	0x4a41
+	.8byte	.LVL1486
+	.4byte	0x6ce4
+	.4byte	0x4a22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31374,9 +31339,9 @@ __func__.7632:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1485
-	.4byte	0x4da2
-	.4byte	0x4a59
+	.8byte	.LVL1487
+	.4byte	0x4d83
+	.4byte	0x4a3a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31385,9 +31350,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1487
-	.4byte	0x29a4
-	.4byte	0x4a75
+	.8byte	.LVL1489
+	.4byte	0x298f
+	.4byte	0x4a56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31400,9 +31365,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1490
-	.4byte	0x6d22
-	.4byte	0x4a8d
+	.8byte	.LVL1492
+	.4byte	0x6ce4
+	.4byte	0x4a6e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31411,8 +31376,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1491
-	.4byte	0x6d22
+	.8byte	.LVL1493
+	.4byte	0x6ce4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31430,25 +31395,25 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x63
-	.8byte	.LBB275
-	.8byte	.LBE275-.LBB275
-	.4byte	0x4b35
+	.8byte	.LBB310
+	.8byte	.LBE310-.LBB310
+	.4byte	0x4b16
 	.uleb128 0x55
-	.4byte	.LASF697
+	.4byte	.LASF696
 	.byte	0x2
-	.2byte	0x785
+	.2byte	0x7b6
 	.4byte	0xdd4
-	.4byte	.LLST354
+	.4byte	.LLST353
 	.uleb128 0x55
-	.4byte	.LASF696
+	.4byte	.LASF695
 	.byte	0x2
-	.2byte	0x786
+	.2byte	0x7b7
 	.4byte	0xdd4
-	.4byte	.LLST355
+	.4byte	.LLST354
 	.uleb128 0x34
-	.8byte	.LVL1499
-	.4byte	0x29a4
-	.4byte	0x4afc
+	.8byte	.LVL1501
+	.4byte	0x298f
+	.4byte	0x4add
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31461,9 +31426,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1500
-	.4byte	0x6d22
-	.4byte	0x4b14
+	.8byte	.LVL1502
+	.4byte	0x6ce4
+	.4byte	0x4af5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31472,8 +31437,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1501
-	.4byte	0x5c36
+	.8byte	.LVL1503
+	.4byte	0x5c1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31494,9 +31459,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1378
-	.4byte	0x6c45
-	.4byte	0x4b4c
+	.8byte	.LVL1380
+	.4byte	0x6c07
+	.4byte	0x4b2d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31504,9 +31469,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1383
-	.4byte	0x29a4
-	.4byte	0x4b69
+	.8byte	.LVL1385
+	.4byte	0x298f
+	.4byte	0x4b4a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31520,12 +31485,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1388
-	.4byte	0x6db1
+	.8byte	.LVL1390
+	.4byte	0x6d73
 	.uleb128 0x34
-	.8byte	.LVL1391
-	.4byte	0x4ee3
-	.4byte	0x4b9a
+	.8byte	.LVL1393
+	.4byte	0x4ec4
+	.4byte	0x4b7b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31546,9 +31511,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1399
-	.4byte	0xa94d
-	.4byte	0x4bcd
+	.8byte	.LVL1401
+	.4byte	0xa94f
+	.4byte	0x4bae
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31560,18 +31525,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR161
+	.8byte	.LANCHOR160
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6aa
+	.2byte	0x6db
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1400
-	.4byte	0xa94d
-	.4byte	0x4c00
+	.8byte	.LVL1402
+	.4byte	0xa94f
+	.4byte	0x4be1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31583,18 +31548,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR161
+	.8byte	.LANCHOR160
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x6ab
+	.2byte	0x6dc
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1409
-	.4byte	0x6d22
-	.4byte	0x4c18
+	.8byte	.LVL1411
+	.4byte	0x6ce4
+	.4byte	0x4bf9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31603,9 +31568,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1435
-	.4byte	0x588f
-	.4byte	0x4c37
+	.8byte	.LVL1437
+	.4byte	0x5875
+	.4byte	0x4c18
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31614,9 +31579,9 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1438
-	.4byte	0x29a4
-	.4byte	0x4c54
+	.8byte	.LVL1440
+	.4byte	0x298f
+	.4byte	0x4c35
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31630,9 +31595,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1459
-	.4byte	0x6db1
-	.4byte	0x4c6e
+	.8byte	.LVL1461
+	.4byte	0x6d73
+	.4byte	0x4c4f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31643,12 +31608,12 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1466
-	.4byte	0x36c0
+	.8byte	.LVL1468
+	.4byte	0x3691
 	.uleb128 0x34
-	.8byte	.LVL1469
-	.4byte	0x6d22
-	.4byte	0x4c93
+	.8byte	.LVL1471
+	.4byte	0x6ce4
+	.4byte	0x4c74
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31657,9 +31622,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1470
-	.4byte	0x5c36
-	.4byte	0x4cb7
+	.8byte	.LVL1472
+	.4byte	0x5c1c
+	.4byte	0x4c98
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31679,9 +31644,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1471
-	.4byte	0x6d22
-	.4byte	0x4ccf
+	.8byte	.LVL1473
+	.4byte	0x6ce4
+	.4byte	0x4cb0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31690,9 +31655,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1476
-	.4byte	0x6d71
-	.4byte	0x4ce9
+	.8byte	.LVL1478
+	.4byte	0x6d33
+	.4byte	0x4cca
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31703,9 +31668,9 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1478
-	.4byte	0xa94d
-	.4byte	0x4d1c
+	.8byte	.LVL1480
+	.4byte	0xa94f
+	.4byte	0x4cfd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31717,18 +31682,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR161
+	.8byte	.LANCHOR160
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x7a5
+	.2byte	0x7d6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1493
-	.4byte	0x5c36
-	.4byte	0x4d40
+	.8byte	.LVL1495
+	.4byte	0x5c1c
+	.4byte	0x4d21
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31748,9 +31713,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1494
-	.4byte	0x6d71
-	.4byte	0x4d5a
+	.8byte	.LVL1496
+	.4byte	0x6d33
+	.4byte	0x4d3b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31761,15 +31726,15 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1503
-	.4byte	0xa94d
-	.4byte	0x4d7f
+	.8byte	.LVL1505
+	.4byte	0xa94f
+	.4byte	0x4d60
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC99
+	.8byte	.LC102
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31778,76 +31743,76 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1505
-	.4byte	0x36c0
+	.8byte	.LVL1507
+	.4byte	0x3691
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4d9d
+	.4byte	0x4d7e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4d8d
+	.4byte	0x4d6e
 	.uleb128 0x5f
-	.4byte	.LASF698
+	.4byte	.LASF697
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.8byte	.LFB280
 	.8byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ee3
+	.4byte	0x4ec4
 	.uleb128 0x5d
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdd4
-	.4byte	.LLST245
+	.4byte	.LLST244
 	.uleb128 0x53
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x2
-	.2byte	0x65b
+	.2byte	0x68c
 	.4byte	0xdd4
-	.4byte	.LLST246
+	.4byte	.LLST245
 	.uleb128 0x55
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x2
-	.2byte	0x65d
+	.2byte	0x68e
 	.4byte	0xdc9
-	.4byte	.LLST247
+	.4byte	.LLST246
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6890
+	.8byte	__func__.6889
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x100
-	.4byte	0x4ea7
+	.4byte	.Ldebug_ranges0+0x190
+	.4byte	0x4e88
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x661
+	.2byte	0x692
 	.4byte	0xdc9
-	.4byte	.LLST248
+	.4byte	.LLST247
 	.uleb128 0x55
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
-	.2byte	0x662
+	.2byte	0x693
 	.4byte	0xdc9
-	.4byte	.LLST249
+	.4byte	.LLST248
 	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x663
+	.2byte	0x694
 	.4byte	0xdc9
-	.4byte	.LLST250
+	.4byte	.LLST249
 	.uleb128 0x34
-	.8byte	.LVL944
-	.4byte	0x6761
-	.4byte	0x4e5f
+	.8byte	.LVL946
+	.4byte	0x6747
+	.4byte	0x4e40
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31862,9 +31827,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL945
-	.4byte	0xa94d
-	.4byte	0x4e92
+	.8byte	.LVL947
+	.4byte	0xa94f
+	.4byte	0x4e73
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31882,11 +31847,11 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x667
+	.2byte	0x698
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL946
-	.4byte	0x6936
+	.8byte	.LVL948
+	.4byte	0x692c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31896,9 +31861,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL938
-	.4byte	0x6d71
-	.4byte	0x4ec2
+	.8byte	.LVL940
+	.4byte	0x6d33
+	.4byte	0x4ea3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31910,8 +31875,8 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL948
-	.4byte	0x5c36
+	.8byte	.LVL950
+	.4byte	0x5c1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31932,56 +31897,56 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF699
+	.4byte	.LASF698
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.8byte	.LFB279
 	.8byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f40
+	.4byte	0x4f21
 	.uleb128 0x64
-	.4byte	.LASF614
+	.4byte	.LASF613
 	.byte	0x2
-	.2byte	0x647
-	.4byte	0x1f04
+	.2byte	0x678
+	.4byte	0x1eef
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x53
 	.4byte	.LASF380
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdc9
-	.4byte	.LLST90
+	.4byte	.LLST80
 	.uleb128 0x53
 	.4byte	.LASF382
 	.byte	0x2
-	.2byte	0x647
+	.2byte	0x678
 	.4byte	0xdc9
-	.4byte	.LLST91
+	.4byte	.LLST81
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x649
+	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST92
+	.4byte	.LLST82
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF700
+	.4byte	.LASF699
 	.byte	0x2
-	.2byte	0x63e
+	.2byte	0x66f
 	.4byte	0x5b
 	.8byte	.LFB278
 	.8byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f8b
+	.4byte	0x4f6c
 	.uleb128 0x45
-	.8byte	.LVL1108
-	.4byte	0x4f8b
+	.8byte	.LVL1110
+	.4byte	0x4f6c
 	.uleb128 0x36
-	.8byte	.LVL1109
-	.4byte	0x5023
+	.8byte	.LVL1111
+	.4byte	0x5004
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31991,24 +31956,24 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF701
+	.4byte	.LASF700
 	.byte	0x2
-	.2byte	0x627
+	.2byte	0x658
 	.8byte	.LFB277
 	.8byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fe5
+	.4byte	0x4fc6
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x629
+	.2byte	0x65a
 	.4byte	0xdc9
-	.4byte	.LLST276
+	.4byte	.LLST275
 	.uleb128 0x34
-	.8byte	.LVL1105
-	.4byte	0x259f
-	.4byte	0x4fd0
+	.8byte	.LVL1107
+	.4byte	0x258a
+	.4byte	0x4fb1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32016,8 +31981,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1106
-	.4byte	0x259f
+	.8byte	.LVL1108
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32027,18 +31992,18 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF702
+	.4byte	.LASF701
 	.byte	0x2
-	.2byte	0x617
+	.2byte	0x648
 	.4byte	0x5b
 	.8byte	.LFB276
 	.8byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5023
+	.4byte	0x5004
 	.uleb128 0x36
-	.8byte	.LVL1104
-	.4byte	0x5023
+	.8byte	.LVL1106
+	.4byte	0x5004
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32048,85 +32013,85 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF703
+	.4byte	.LASF702
 	.byte	0x2
-	.2byte	0x5b9
+	.2byte	0x5ea
 	.4byte	0x5b
 	.8byte	.LFB275
 	.8byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x51f5
+	.4byte	0x51d6
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x5b9
-	.4byte	0x51f5
-	.4byte	.LLST265
+	.2byte	0x5ea
+	.4byte	0x51d6
+	.4byte	.LLST264
 	.uleb128 0x55
-	.4byte	.LASF705
+	.4byte	.LASF704
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xdea
-	.4byte	.LLST266
+	.4byte	.LLST265
 	.uleb128 0x55
 	.4byte	.LASF299
 	.byte	0x2
-	.2byte	0x5bb
+	.2byte	0x5ec
 	.4byte	0xdea
-	.4byte	.LLST267
+	.4byte	.LLST266
 	.uleb128 0x55
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x5bc
+	.2byte	0x5ed
 	.4byte	0xdea
-	.4byte	.LLST268
+	.4byte	.LLST267
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x5bd
+	.2byte	0x5ee
 	.4byte	0xdc9
-	.4byte	.LLST269
+	.4byte	.LLST268
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x5be
+	.2byte	0x5ef
 	.4byte	0x1001
-	.4byte	.LLST270
+	.4byte	.LLST269
 	.uleb128 0x55
 	.4byte	.LASF310
 	.byte	0x2
-	.2byte	0x5bf
+	.2byte	0x5f0
 	.4byte	0x10f8
-	.4byte	.LLST271
+	.4byte	.LLST270
 	.uleb128 0x55
 	.4byte	.LASF311
 	.byte	0x2
-	.2byte	0x5c0
+	.2byte	0x5f1
 	.4byte	0x1001
-	.4byte	.LLST272
+	.4byte	.LLST271
 	.uleb128 0x55
 	.4byte	.LASF307
 	.byte	0x2
-	.2byte	0x5c1
+	.2byte	0x5f2
 	.4byte	0xdc9
-	.4byte	.LLST273
+	.4byte	.LLST272
 	.uleb128 0x55
-	.4byte	.LASF708
+	.4byte	.LASF707
 	.byte	0x2
-	.2byte	0x5c2
+	.2byte	0x5f3
 	.4byte	0xdc9
-	.4byte	.LLST274
+	.4byte	.LLST273
 	.uleb128 0x55
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x5c3
-	.4byte	0x51fb
-	.4byte	.LLST275
+	.2byte	0x5f4
+	.4byte	0x51dc
+	.4byte	.LLST274
 	.uleb128 0x34
-	.8byte	.LVL1064
-	.4byte	0x259f
-	.4byte	0x511b
+	.8byte	.LVL1066
+	.4byte	0x258a
+	.4byte	0x50fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32149,9 +32114,9 @@ __func__.7632:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1069
-	.4byte	0x6c45
-	.4byte	0x5132
+	.8byte	.LVL1071
+	.4byte	0x6c07
+	.4byte	0x5113
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32159,9 +32124,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1074
-	.4byte	0x635a
-	.4byte	0x514a
+	.8byte	.LVL1076
+	.4byte	0x6340
+	.4byte	0x512b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32170,9 +32135,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1075
-	.4byte	0x6302
-	.4byte	0x5162
+	.8byte	.LVL1077
+	.4byte	0x62e8
+	.4byte	0x5143
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32181,9 +32146,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1076
-	.4byte	0x6188
-	.4byte	0x517a
+	.8byte	.LVL1078
+	.4byte	0x616e
+	.4byte	0x515b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32192,9 +32157,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1077
-	.4byte	0x6188
-	.4byte	0x5192
+	.8byte	.LVL1079
+	.4byte	0x616e
+	.4byte	0x5173
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32203,9 +32168,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1085
-	.4byte	0x29a4
-	.4byte	0x51b4
+	.8byte	.LVL1087
+	.4byte	0x298f
+	.4byte	0x5195
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32224,9 +32189,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1089
-	.4byte	0x29a4
-	.4byte	0x51d6
+	.8byte	.LVL1091
+	.4byte	0x298f
+	.4byte	0x51b7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32245,8 +32210,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1091
-	.4byte	0x29a4
+	.8byte	.LVL1093
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32272,31 +32237,31 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x1280
 	.uleb128 0x49
-	.4byte	.LASF710
+	.4byte	.LASF709
 	.byte	0x2
-	.2byte	0x54f
+	.2byte	0x580
 	.4byte	0x5b
 	.8byte	.LFB274
 	.8byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x53e0
+	.4byte	0x53c1
 	.uleb128 0x55
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x2
-	.2byte	0x551
+	.2byte	0x582
 	.4byte	0xdea
-	.4byte	.LLST463
+	.4byte	.LLST462
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6827
+	.8byte	__func__.6826
 	.uleb128 0x34
-	.8byte	.LVL2075
-	.4byte	0x259f
-	.4byte	0x525d
+	.8byte	.LVL2055
+	.4byte	0x258a
+	.4byte	0x523e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32304,9 +32269,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2076
-	.4byte	0x6c45
-	.4byte	0x5274
+	.8byte	.LVL2056
+	.4byte	0x6c07
+	.4byte	0x5255
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32314,9 +32279,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2078
-	.4byte	0xa94d
-	.4byte	0x52a7
+	.8byte	.LVL2058
+	.4byte	0xa94f
+	.4byte	0x5288
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32328,18 +32293,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR181
+	.8byte	.LANCHOR179
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56c
+	.2byte	0x59d
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2079
-	.4byte	0xa94d
-	.4byte	0x52da
+	.8byte	.LVL2059
+	.4byte	0xa94f
+	.4byte	0x52bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32351,18 +32316,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR181
+	.8byte	.LANCHOR179
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x56e
+	.2byte	0x59f
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2081
-	.4byte	0x2527
-	.4byte	0x52f8
+	.8byte	.LVL2061
+	.4byte	0x2512
+	.4byte	0x52d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32377,15 +32342,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2082
-	.4byte	0x2527
+	.8byte	.LVL2062
+	.4byte	0x2512
 	.uleb128 0x45
-	.8byte	.LVL2083
-	.4byte	0x2527
+	.8byte	.LVL2063
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL2084
-	.4byte	0xa94d
-	.4byte	0x5345
+	.8byte	.LVL2064
+	.4byte	0xa94f
+	.4byte	0x5326
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32397,18 +32362,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR181
+	.8byte	.LANCHOR179
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x584
+	.2byte	0x5b5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2085
-	.4byte	0x460e
-	.4byte	0x5364
+	.8byte	.LVL2065
+	.4byte	0x45ef
+	.4byte	0x5345
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32417,9 +32382,9 @@ __func__.7632:
 	.8byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2086
-	.4byte	0x460e
-	.4byte	0x5383
+	.8byte	.LVL2066
+	.4byte	0x45ef
+	.4byte	0x5364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32428,9 +32393,9 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0x460e
-	.4byte	0x53a2
+	.8byte	.LVL2067
+	.4byte	0x45ef
+	.4byte	0x5383
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32439,19 +32404,19 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2088
-	.4byte	0x460e
-	.4byte	0x53c1
+	.8byte	.LVL2068
+	.4byte	0x45ef
+	.4byte	0x53a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR82
+	.8byte	.LANCHOR80
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2090
-	.4byte	0x29a4
+	.8byte	.LVL2070
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32471,107 +32436,107 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF711
+	.4byte	.LASF710
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0x5b
 	.8byte	.LFB273
 	.8byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5413
+	.4byte	0x53f4
 	.uleb128 0x53
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x54a
+	.2byte	0x57b
 	.4byte	0xdc9
-	.4byte	.LLST89
+	.4byte	.LLST79
 	.byte	0
 	.uleb128 0x62
-	.4byte	.LASF714
+	.4byte	.LASF713
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.byte	0x1
-	.4byte	0x5439
+	.4byte	0x541a
 	.uleb128 0x4b
-	.4byte	.LASF712
+	.4byte	.LASF711
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0xdc9
 	.uleb128 0x4b
-	.4byte	.LASF591
+	.4byte	.LASF590
 	.byte	0x2
-	.2byte	0x542
+	.2byte	0x573
 	.4byte	0x5b
 	.byte	0
 	.uleb128 0x52
-	.4byte	.LASF716
+	.4byte	.LASF715
 	.byte	0x2
-	.2byte	0x535
+	.2byte	0x566
 	.4byte	0x5b
 	.byte	0x1
 	.uleb128 0x49
-	.4byte	.LASF717
+	.4byte	.LASF716
 	.byte	0x2
-	.2byte	0x446
+	.2byte	0x477
 	.4byte	0x5b
 	.8byte	.LFB270
 	.8byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5694
+	.4byte	0x567a
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdc9
-	.4byte	.LLST258
+	.4byte	.LLST257
 	.uleb128 0x55
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
-	.2byte	0x448
+	.2byte	0x479
 	.4byte	0xdc9
-	.4byte	.LLST259
+	.4byte	.LLST258
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdc9
-	.4byte	.LLST260
+	.4byte	.LLST259
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x2
-	.2byte	0x449
+	.2byte	0x47a
 	.4byte	0xdc9
-	.4byte	.LLST261
+	.4byte	.LLST260
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xdea
-	.4byte	.LLST262
+	.4byte	.LLST261
 	.uleb128 0x54
 	.string	"j"
 	.byte	0x2
-	.2byte	0x44a
+	.2byte	0x47b
 	.4byte	0xdea
-	.4byte	.LLST263
+	.4byte	.LLST262
 	.uleb128 0x55
-	.4byte	.LASF719
+	.4byte	.LASF718
 	.byte	0x2
-	.2byte	0x44b
-	.4byte	0x51fb
-	.4byte	.LLST264
+	.2byte	0x47c
+	.4byte	0x51dc
+	.4byte	.LLST263
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4258
+	.4byte	.LASF573
+	.4byte	0x4239
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6770
+	.8byte	__func__.6769
 	.uleb128 0x34
-	.8byte	.LVL986
-	.4byte	0x259f
-	.4byte	0x54fe
+	.8byte	.LVL988
+	.4byte	0x258a
+	.4byte	0x54df
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32579,9 +32544,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL987
-	.4byte	0x259f
-	.4byte	0x5515
+	.8byte	.LVL989
+	.4byte	0x258a
+	.4byte	0x54f6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32589,9 +32554,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL988
-	.4byte	0x259f
-	.4byte	0x552c
+	.8byte	.LVL990
+	.4byte	0x258a
+	.4byte	0x550d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32599,9 +32564,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL989
-	.4byte	0x259f
-	.4byte	0x5543
+	.8byte	.LVL991
+	.4byte	0x258a
+	.4byte	0x5524
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32609,15 +32574,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL990
-	.4byte	0x259f
-	.4byte	0x556d
+	.8byte	.LVL992
+	.4byte	0x258a
+	.4byte	0x554e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR81
+	.8byte	.LANCHOR79
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32631,9 +32596,9 @@ __func__.7632:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL993
-	.4byte	0x6e0c
-	.4byte	0x5588
+	.8byte	.LVL995
+	.4byte	0x6dce
+	.4byte	0x5569
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32644,9 +32609,9 @@ __func__.7632:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL995
-	.4byte	0x7560
-	.4byte	0x55a0
+	.8byte	.LVL997
+	.4byte	0x7522
+	.4byte	0x5581
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32655,9 +32620,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1004
-	.4byte	0x29a4
-	.4byte	0x55bd
+	.8byte	.LVL1006
+	.4byte	0x298f
+	.4byte	0x559e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32671,9 +32636,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1009
-	.4byte	0x29a4
-	.4byte	0x55d9
+	.8byte	.LVL1011
+	.4byte	0x298f
+	.4byte	0x55ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32686,20 +32651,25 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1014
-	.4byte	0x6afa
-	.4byte	0x55f1
+	.8byte	.LVL1013
+	.4byte	0x6b48
+	.4byte	0x55d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
 	.byte	0x8a
 	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1015
-	.4byte	0xa94d
-	.4byte	0x561f
+	.8byte	.LVL1017
+	.4byte	0xa94f
+	.4byte	0x5605
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32718,12 +32688,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x48a
+	.2byte	0x4bb
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1026
-	.4byte	0xa94d
-	.4byte	0x564d
+	.8byte	.LVL1028
+	.4byte	0xa94f
+	.4byte	0x5633
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32742,12 +32712,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x4b3
+	.2byte	0x4e4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1037
-	.4byte	0x6afa
-	.4byte	0x5664
+	.8byte	.LVL1039
+	.4byte	0x6b48
+	.4byte	0x564a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32755,8 +32725,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1039
-	.4byte	0xa94d
+	.8byte	.LVL1041
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32774,51 +32744,51 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x530
+	.2byte	0x561
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF720
+	.4byte	.LASF719
 	.byte	0x2
-	.2byte	0x3eb
+	.2byte	0x41c
 	.4byte	0x5b
 	.8byte	.LFB269
 	.8byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x583d
+	.4byte	0x5823
 	.uleb128 0x55
 	.4byte	.LASF300
 	.byte	0x2
-	.2byte	0x3ed
+	.2byte	0x41e
 	.4byte	0xdc9
-	.4byte	.LLST385
+	.4byte	.LLST384
 	.uleb128 0x55
-	.4byte	.LASF721
+	.4byte	.LASF720
 	.byte	0x2
-	.2byte	0x3ee
-	.4byte	0x583d
-	.4byte	.LLST386
+	.2byte	0x41f
+	.4byte	0x5823
+	.4byte	.LLST385
 	.uleb128 0x55
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x3ef
+	.2byte	0x420
 	.4byte	0xdc9
-	.4byte	.LLST387
+	.4byte	.LLST386
 	.uleb128 0x4e
-	.4byte	.LASF723
+	.4byte	.LASF722
 	.byte	0x2
-	.2byte	0x41c
+	.2byte	0x44d
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6748
+	.8byte	__func__.6747
 	.uleb128 0x34
-	.8byte	.LVL1665
-	.4byte	0x259f
-	.4byte	0x5719
+	.8byte	.LVL1667
+	.4byte	0x258a
+	.4byte	0x56ff
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32827,15 +32797,15 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1666
-	.4byte	0x2527
-	.4byte	0x573e
+	.8byte	.LVL1668
+	.4byte	0x2512
+	.4byte	0x5724
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR79
+	.8byte	.LANCHOR39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -32844,15 +32814,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1667
-	.4byte	0x2527
+	.8byte	.LVL1669
+	.4byte	0x2512
 	.uleb128 0x45
-	.8byte	.LVL1668
-	.4byte	0x2527
+	.8byte	.LVL1670
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL1669
-	.4byte	0x5944
-	.4byte	0x5770
+	.8byte	.LVL1671
+	.4byte	0x592a
+	.4byte	0x5756
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32861,9 +32831,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1671
-	.4byte	0x27e7
-	.4byte	0x5797
+	.8byte	.LVL1673
+	.4byte	0x27d2
+	.4byte	0x577d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32887,12 +32857,12 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1673
-	.4byte	0x6980
+	.8byte	.LVL1675
+	.4byte	0x6976
 	.uleb128 0x34
-	.8byte	.LVL1674
-	.4byte	0x27e7
-	.4byte	0x57cb
+	.8byte	.LVL1676
+	.4byte	0x27d2
+	.4byte	0x57b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32916,9 +32886,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1675
-	.4byte	0xa94d
-	.4byte	0x57fe
+	.8byte	.LVL1677
+	.4byte	0xa94f
+	.4byte	0x57e4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32930,24 +32900,24 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR167
+	.8byte	.LANCHOR166
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x433
+	.2byte	0x464
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1678
-	.4byte	0xa94d
-	.4byte	0x5823
+	.8byte	.LVL1680
+	.4byte	0xa94f
+	.4byte	0x5809
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC101
+	.8byte	.LC104
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -32956,8 +32926,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1679
-	.4byte	0x6afa
+	.8byte	.LVL1681
+	.4byte	0x6b48
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32975,82 +32945,82 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x12d8
 	.uleb128 0x62
-	.4byte	.LASF724
+	.4byte	.LASF723
 	.byte	0x2
-	.2byte	0x3b2
+	.2byte	0x3e3
 	.byte	0x1
-	.4byte	0x588f
+	.4byte	0x5875
 	.uleb128 0x50
 	.uleb128 0x4d
 	.string	"lpa"
 	.byte	0x2
-	.2byte	0x3b7
+	.2byte	0x3e8
 	.4byte	0xdd4
 	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x3b8
+	.2byte	0x3e9
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF725
+	.4byte	.LASF724
 	.byte	0x2
-	.2byte	0x3b9
+	.2byte	0x3ea
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF668
+	.4byte	.LASF667
 	.byte	0x2
-	.2byte	0x3ba
+	.2byte	0x3eb
 	.4byte	0xdf5
 	.uleb128 0x4c
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x2
-	.2byte	0x3bb
-	.4byte	0x2dff
+	.2byte	0x3ec
+	.4byte	0x2dea
 	.byte	0
 	.byte	0
 	.uleb128 0x5f
-	.4byte	.LASF726
+	.4byte	.LASF725
 	.byte	0x2
-	.2byte	0x380
+	.2byte	0x3b1
 	.8byte	.LFB267
 	.8byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5944
+	.4byte	0x592a
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x380
-	.4byte	0x51f5
-	.4byte	.LLST254
+	.2byte	0x3b1
+	.4byte	0x51d6
+	.4byte	.LLST253
 	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x2
-	.2byte	0x382
+	.2byte	0x3b3
 	.4byte	0xdd4
-	.4byte	.LLST255
+	.4byte	.LLST254
 	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x383
+	.2byte	0x3b4
 	.4byte	0xdc9
-	.4byte	.LLST256
+	.4byte	.LLST255
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x384
+	.2byte	0x3b5
 	.4byte	0x1001
-	.4byte	.LLST257
+	.4byte	.LLST256
 	.uleb128 0x34
-	.8byte	.LVL980
-	.4byte	0x29a4
-	.4byte	0x5916
+	.8byte	.LVL982
+	.4byte	0x298f
+	.4byte	0x58fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33063,9 +33033,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.8byte	.LVL982
-	.4byte	0x5ea6
-	.4byte	0x592f
+	.8byte	.LVL984
+	.4byte	0x5e8c
+	.4byte	0x5915
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33075,8 +33045,8 @@ __func__.7632:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL984
-	.4byte	0x259f
+	.8byte	.LVL986
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33086,48 +33056,48 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x62
-	.4byte	.LASF727
+	.4byte	.LASF726
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.byte	0x1
-	.4byte	0x5968
+	.4byte	0x594e
 	.uleb128 0x4b
 	.4byte	.LASF393
 	.byte	0x2
-	.2byte	0x371
+	.2byte	0x3a2
 	.4byte	0xdd4
 	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
-	.2byte	0x373
+	.2byte	0x3a4
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF728
+	.4byte	.LASF727
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0x5b
 	.8byte	.LFB265
 	.8byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x59d0
+	.4byte	0x59b6
 	.uleb128 0x53
-	.4byte	.LASF729
+	.4byte	.LASF728
 	.byte	0x2
-	.2byte	0x35c
+	.2byte	0x38d
 	.4byte	0xdd4
-	.4byte	.LLST375
+	.4byte	.LLST374
 	.uleb128 0x55
-	.4byte	.LASF730
+	.4byte	.LASF729
 	.byte	0x2
-	.2byte	0x35e
+	.2byte	0x38f
 	.4byte	0xdd4
-	.4byte	.LLST376
+	.4byte	.LLST375
 	.uleb128 0x34
-	.8byte	.LVL1627
-	.4byte	0x5af8
-	.4byte	0x59c2
+	.8byte	.LVL1629
+	.4byte	0x5ade
+	.4byte	0x59a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33136,87 +33106,87 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1628
-	.4byte	0x44bf
+	.8byte	.LVL1630
+	.4byte	0x44a0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF731
+	.4byte	.LASF730
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdd4
 	.8byte	.LFB264
 	.8byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5af2
+	.4byte	0x5ad8
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x367
+	.4byte	0xdd4
+	.4byte	.LLST376
 	.uleb128 0x53
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x336
+	.2byte	0x367
 	.4byte	0xdd4
 	.4byte	.LLST377
 	.uleb128 0x53
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x336
-	.4byte	0xdd4
+	.2byte	0x367
+	.4byte	0x5ad8
 	.4byte	.LLST378
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x336
-	.4byte	0x5af2
-	.4byte	.LLST379
 	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdc9
-	.4byte	.LLST380
+	.4byte	.LLST379
 	.uleb128 0x55
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x338
+	.2byte	0x369
 	.4byte	0xdc9
-	.4byte	.LLST381
+	.4byte	.LLST380
 	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x339
+	.2byte	0x36a
 	.4byte	0xdd4
-	.4byte	.LLST382
+	.4byte	.LLST381
 	.uleb128 0x55
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x33a
+	.2byte	0x36b
 	.4byte	0xdd4
-	.4byte	.LLST383
+	.4byte	.LLST382
 	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
-	.2byte	0x33b
+	.2byte	0x36c
 	.4byte	0xdf5
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x55
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x33c
+	.2byte	0x36d
 	.4byte	0xdd4
-	.4byte	.LLST384
+	.4byte	.LLST383
 	.uleb128 0x2a
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x33d
-	.4byte	0x2711
+	.2byte	0x36e
+	.4byte	0x26fc
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1647
-	.4byte	0x29a4
-	.4byte	0x5ab4
+	.8byte	.LVL1649
+	.4byte	0x298f
+	.4byte	0x5a9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33235,9 +33205,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1649
-	.4byte	0x2527
-	.4byte	0x5ad2
+	.8byte	.LVL1651
+	.4byte	0x2512
+	.4byte	0x5ab8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33252,8 +33222,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1656
-	.4byte	0x259f
+	.8byte	.LVL1658
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33277,83 +33247,83 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0xdbe
 	.uleb128 0x49
-	.4byte	.LASF738
+	.4byte	.LASF737
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdd4
 	.8byte	.LFB263
 	.8byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c36
+	.4byte	0x5c1c
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x342
+	.4byte	0xdd4
+	.4byte	.LLST366
 	.uleb128 0x53
 	.4byte	.LASF732
 	.byte	0x2
-	.2byte	0x311
+	.2byte	0x342
 	.4byte	0xdd4
 	.4byte	.LLST367
 	.uleb128 0x53
 	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x311
-	.4byte	0xdd4
+	.2byte	0x342
+	.4byte	0x5ad8
 	.4byte	.LLST368
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x2
-	.2byte	0x311
-	.4byte	0x5af2
-	.4byte	.LLST369
 	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdc9
-	.4byte	.LLST370
+	.4byte	.LLST369
 	.uleb128 0x55
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x2
-	.2byte	0x313
+	.2byte	0x344
 	.4byte	0xdc9
-	.4byte	.LLST371
+	.4byte	.LLST370
 	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x314
+	.2byte	0x345
 	.4byte	0xdd4
-	.4byte	.LLST372
+	.4byte	.LLST371
 	.uleb128 0x55
-	.4byte	.LASF736
+	.4byte	.LASF735
 	.byte	0x2
-	.2byte	0x315
+	.2byte	0x346
 	.4byte	0xdd4
-	.4byte	.LLST373
+	.4byte	.LLST372
 	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
-	.2byte	0x316
+	.2byte	0x347
 	.4byte	0xdf5
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x55
-	.4byte	.LASF737
+	.4byte	.LASF736
 	.byte	0x2
-	.2byte	0x317
+	.2byte	0x348
 	.4byte	0xdd4
-	.4byte	.LLST374
+	.4byte	.LLST373
 	.uleb128 0x2a
-	.4byte	.LASF565
+	.4byte	.LASF564
 	.byte	0x2
-	.2byte	0x318
-	.4byte	0x2711
+	.2byte	0x349
+	.4byte	0x26fc
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1608
-	.4byte	0x29a4
-	.4byte	0x5bdc
+	.8byte	.LVL1610
+	.4byte	0x298f
+	.4byte	0x5bc2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33372,9 +33342,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1610
-	.4byte	0x2527
-	.4byte	0x5bfd
+	.8byte	.LVL1612
+	.4byte	0x2512
+	.4byte	0x5be3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33391,9 +33361,9 @@ __func__.7632:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1614
-	.4byte	0x5ea6
-	.4byte	0x5c22
+	.8byte	.LVL1616
+	.4byte	0x5e8c
+	.4byte	0x5c08
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33408,8 +33378,8 @@ __func__.7632:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1619
-	.4byte	0x259f
+	.8byte	.LVL1621
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33418,66 +33388,66 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF739
+	.4byte	.LASF738
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x5b
 	.8byte	.LFB262
 	.8byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d4e
+	.4byte	0x5d34
 	.uleb128 0x5d
 	.string	"lpn"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0xdd4
-	.4byte	.LLST239
+	.4byte	.LLST238
 	.uleb128 0x5d
 	.string	"ppn"
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x1001
-	.4byte	.LLST240
+	.4byte	.LLST239
 	.uleb128 0x53
-	.4byte	.LASF740
+	.4byte	.LASF739
 	.byte	0x2
-	.2byte	0x2f0
+	.2byte	0x321
 	.4byte	0x5b
+	.4byte	.LLST240
+	.uleb128 0x55
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x323
+	.4byte	0xdc9
 	.4byte	.LLST241
 	.uleb128 0x55
 	.4byte	.LASF741
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdc9
 	.4byte	.LLST242
 	.uleb128 0x55
 	.4byte	.LASF742
 	.byte	0x2
-	.2byte	0x2f2
+	.2byte	0x323
 	.4byte	0xdc9
 	.4byte	.LLST243
-	.uleb128 0x55
-	.4byte	.LASF743
-	.byte	0x2
-	.2byte	0x2f2
-	.4byte	0xdc9
-	.4byte	.LLST244
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x5d5e
+	.4byte	.LASF573
+	.4byte	0x5d44
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6675
+	.8byte	__func__.6674
 	.uleb128 0x59
-	.4byte	.LASF744
+	.4byte	.LASF743
 	.byte	0x2
-	.2byte	0x2fb
-	.8byte	.L657
+	.2byte	0x32c
+	.8byte	.L664
 	.uleb128 0x34
-	.8byte	.LVL922
-	.4byte	0xa94d
-	.4byte	0x5d0e
+	.8byte	.LVL924
+	.4byte	0xa94f
+	.4byte	0x5cf4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33495,15 +33465,15 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2f7
+	.2byte	0x328
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL925
-	.4byte	0x5db5
-	.uleb128 0x34
 	.8byte	.LVL927
-	.4byte	0x5e48
-	.4byte	0x5d33
+	.4byte	0x5d9b
+	.uleb128 0x34
+	.8byte	.LVL929
+	.4byte	0x5e2e
+	.4byte	0x5d19
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33512,8 +33482,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL928
-	.4byte	0x643d
+	.8byte	.LVL930
+	.4byte	0x6423
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33530,35 +33500,35 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x5d5e
+	.4byte	0x5d44
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5d4e
+	.4byte	0x5d34
 	.uleb128 0x49
-	.4byte	.LASF745
+	.4byte	.LASF744
 	.byte	0x2
-	.2byte	0x2e3
+	.2byte	0x314
 	.4byte	0x5b
 	.8byte	.LFB261
 	.8byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5db5
+	.4byte	0x5d9b
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x2e5
+	.2byte	0x316
 	.4byte	0xdc9
-	.4byte	.LLST330
+	.4byte	.LLST329
 	.uleb128 0x45
-	.8byte	.LVL1363
-	.4byte	0x5843
+	.8byte	.LVL1365
+	.4byte	0x5829
 	.uleb128 0x36
-	.8byte	.LVL1366
-	.4byte	0x5e48
+	.8byte	.LVL1368
+	.4byte	0x5e2e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33568,42 +33538,42 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF746
+	.4byte	.LASF745
 	.byte	0x2
-	.2byte	0x2bb
+	.2byte	0x2ec
 	.4byte	0xdc9
 	.8byte	.LFB260
 	.8byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e48
+	.4byte	0x5e2e
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
-	.2byte	0x2bd
+	.2byte	0x2ee
 	.4byte	0xdc9
-	.4byte	.LLST83
+	.4byte	.LLST73
 	.uleb128 0x55
-	.4byte	.LASF747
+	.4byte	.LASF746
 	.byte	0x2
-	.2byte	0x2be
+	.2byte	0x2ef
 	.4byte	0xdc9
-	.4byte	.LLST84
+	.4byte	.LLST74
 	.uleb128 0x55
-	.4byte	.LASF748
+	.4byte	.LASF747
 	.byte	0x2
-	.2byte	0x2bf
+	.2byte	0x2f0
 	.4byte	0xdd4
-	.4byte	.LLST85
+	.4byte	.LLST75
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4d9d
+	.4byte	.LASF573
+	.4byte	0x4d7e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6658
+	.8byte	__func__.6657
 	.uleb128 0x36
-	.8byte	.LVL237
-	.4byte	0xa94d
+	.8byte	.LVL212
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33615,40 +33585,40 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR58
+	.8byte	.LANCHOR57
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2df
+	.2byte	0x310
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF749
+	.4byte	.LASF748
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0x5b
 	.8byte	.LFB259
 	.8byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ea6
+	.4byte	0x5e8c
 	.uleb128 0x53
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x2b1
+	.2byte	0x2e2
 	.4byte	0xdc9
-	.4byte	.LLST237
+	.4byte	.LLST236
 	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x2b3
+	.2byte	0x2e4
 	.4byte	0xdd4
-	.4byte	.LLST238
+	.4byte	.LLST237
 	.uleb128 0x36
-	.8byte	.LVL915
-	.4byte	0x5ea6
+	.8byte	.LVL917
+	.4byte	0x5e8c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33658,65 +33628,65 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF750
+	.4byte	.LASF749
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x5b
 	.8byte	.LFB258
 	.8byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6037
+	.4byte	0x601d
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x276
-	.4byte	0x51f5
-	.4byte	.LLST224
+	.2byte	0x2a7
+	.4byte	0x51d6
+	.4byte	.LLST223
 	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0xdd4
-	.4byte	.LLST225
+	.4byte	.LLST224
 	.uleb128 0x53
-	.4byte	.LASF734
+	.4byte	.LASF733
 	.byte	0x2
-	.2byte	0x276
+	.2byte	0x2a7
 	.4byte	0x1001
-	.4byte	.LLST226
+	.4byte	.LLST225
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x278
+	.2byte	0x2a9
 	.4byte	0xdd4
-	.4byte	.LLST227
+	.4byte	.LLST226
 	.uleb128 0x55
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x279
-	.4byte	0x51fb
-	.4byte	.LLST228
+	.2byte	0x2aa
+	.4byte	0x51dc
+	.4byte	.LLST227
 	.uleb128 0x55
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x2
-	.2byte	0x27a
+	.2byte	0x2ab
 	.4byte	0xdc9
-	.4byte	.LLST229
+	.4byte	.LLST228
 	.uleb128 0x4e
-	.4byte	.LASF751
+	.4byte	.LASF750
 	.byte	0x2
-	.2byte	0x27c
+	.2byte	0x2ad
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6633
+	.8byte	__func__.6632
 	.uleb128 0x34
-	.8byte	.LVL873
-	.4byte	0x6037
-	.4byte	0x5f5b
+	.8byte	.LVL875
+	.4byte	0x601d
+	.4byte	0x5f41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33725,9 +33695,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL874
-	.4byte	0xa94d
-	.4byte	0x5f87
+	.8byte	.LVL876
+	.4byte	0xa94f
+	.4byte	0x5f6d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33745,12 +33715,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28a
+	.2byte	0x2bb
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL875
-	.4byte	0xa94d
-	.4byte	0x5fb3
+	.8byte	.LVL877
+	.4byte	0xa94f
+	.4byte	0x5f99
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33768,12 +33738,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x28b
+	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL877
-	.4byte	0x259f
-	.4byte	0x5fcf
+	.8byte	.LVL879
+	.4byte	0x258a
+	.4byte	0x5fb5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33786,9 +33756,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL880
-	.4byte	0x27e7
-	.4byte	0x5ff6
+	.8byte	.LVL882
+	.4byte	0x27d2
+	.4byte	0x5fdc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33812,25 +33782,25 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL882
-	.4byte	0xa94d
-	.4byte	0x6015
+	.8byte	.LVL884
+	.4byte	0xa94f
+	.4byte	0x5ffb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC86
+	.8byte	.LC89
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL883
-	.4byte	0xa94d
+	.8byte	.LVL885
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC87
+	.8byte	.LC90
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -33840,66 +33810,66 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF752
+	.4byte	.LASF751
 	.byte	0x2
-	.2byte	0x246
+	.2byte	0x277
 	.4byte	0x5b
 	.8byte	.LFB257
 	.8byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6173
+	.4byte	0x6159
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x246
-	.4byte	0x51f5
-	.4byte	.LLST218
+	.2byte	0x277
+	.4byte	0x51d6
+	.4byte	.LLST217
 	.uleb128 0x4c
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdc9
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x248
+	.2byte	0x279
 	.4byte	0xdc9
-	.4byte	.LLST219
+	.4byte	.LLST218
 	.uleb128 0x55
-	.4byte	.LASF753
+	.4byte	.LASF752
 	.byte	0x2
-	.2byte	0x249
+	.2byte	0x27a
 	.4byte	0xdc9
-	.4byte	.LLST220
+	.4byte	.LLST219
 	.uleb128 0x55
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x24a
+	.2byte	0x27b
 	.4byte	0x10f8
-	.4byte	.LLST221
+	.4byte	.LLST220
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x24b
+	.2byte	0x27c
 	.4byte	0x1001
-	.4byte	.LLST222
+	.4byte	.LLST221
 	.uleb128 0x55
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x24c
-	.4byte	0x51fb
-	.4byte	.LLST223
+	.2byte	0x27d
+	.4byte	0x51dc
+	.4byte	.LLST222
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x6183
+	.4byte	.LASF573
+	.4byte	0x6169
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6619
+	.8byte	__func__.6618
 	.uleb128 0x34
-	.8byte	.LVL852
-	.4byte	0xa94d
-	.4byte	0x610b
+	.8byte	.LVL854
+	.4byte	0xa94f
+	.4byte	0x60f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33917,15 +33887,15 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x250
+	.2byte	0x281
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL853
-	.4byte	0x6980
+	.8byte	.LVL855
+	.4byte	0x6976
 	.uleb128 0x34
-	.8byte	.LVL860
-	.4byte	0x259f
-	.4byte	0x6130
+	.8byte	.LVL862
+	.4byte	0x258a
+	.4byte	0x6116
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33934,15 +33904,15 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL864
-	.4byte	0x27e7
-	.4byte	0x615e
+	.8byte	.LVL866
+	.4byte	0x27d2
+	.4byte	0x6144
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33960,8 +33930,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL865
-	.4byte	0x6188
+	.8byte	.LVL867
+	.4byte	0x616e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33972,75 +33942,75 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6183
+	.4byte	0x6169
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6173
+	.4byte	0x6159
 	.uleb128 0x49
-	.4byte	.LASF755
+	.4byte	.LASF754
 	.byte	0x2
-	.2byte	0x218
+	.2byte	0x249
 	.4byte	0x5b
 	.8byte	.LFB256
 	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6302
+	.4byte	0x62e8
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x249
+	.4byte	0x51d6
+	.4byte	.LLST229
+	.uleb128 0x55
+	.4byte	.LASF755
 	.byte	0x2
-	.2byte	0x218
-	.4byte	0x51f5
+	.2byte	0x24b
+	.4byte	0xdc9
 	.4byte	.LLST230
 	.uleb128 0x55
 	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x21a
+	.2byte	0x24c
 	.4byte	0xdc9
 	.4byte	.LLST231
 	.uleb128 0x55
-	.4byte	.LASF757
+	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x21b
+	.2byte	0x24d
 	.4byte	0xdc9
 	.4byte	.LLST232
 	.uleb128 0x55
-	.4byte	.LASF330
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x21c
-	.4byte	0xdc9
+	.2byte	0x24e
+	.4byte	0x10f8
 	.4byte	.LLST233
 	.uleb128 0x55
-	.4byte	.LASF754
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x21d
-	.4byte	0x10f8
+	.2byte	0x24f
+	.4byte	0x1001
 	.4byte	.LLST234
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x21e
-	.4byte	0x1001
+	.2byte	0x250
+	.4byte	0x51dc
 	.4byte	.LLST235
-	.uleb128 0x55
-	.4byte	.LASF709
-	.byte	0x2
-	.2byte	0x21f
-	.4byte	0x51fb
-	.4byte	.LLST236
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x299f
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6605
+	.8byte	__func__.6604
 	.uleb128 0x34
-	.8byte	.LVL892
-	.4byte	0x635a
-	.4byte	0x6245
+	.8byte	.LVL894
+	.4byte	0x6340
+	.4byte	0x622b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34049,9 +34019,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL895
-	.4byte	0x6302
-	.4byte	0x625d
+	.8byte	.LVL897
+	.4byte	0x62e8
+	.4byte	0x6243
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34060,9 +34030,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL897
-	.4byte	0x6afa
-	.4byte	0x627a
+	.8byte	.LVL899
+	.4byte	0x6b48
+	.4byte	0x6260
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34076,9 +34046,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL899
-	.4byte	0x6302
-	.4byte	0x6292
+	.8byte	.LVL901
+	.4byte	0x62e8
+	.4byte	0x6278
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34087,15 +34057,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL904
-	.4byte	0x29a4
-	.4byte	0x62bb
+	.8byte	.LVL906
+	.4byte	0x298f
+	.4byte	0x62a1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34108,9 +34078,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL905
-	.4byte	0xa94d
-	.4byte	0x62e7
+	.8byte	.LVL907
+	.4byte	0xa94f
+	.4byte	0x62cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34128,11 +34098,11 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x234
+	.2byte	0x265
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL910
-	.4byte	0x5ea6
+	.8byte	.LVL912
+	.4byte	0x5e8c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34148,109 +34118,109 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF758
+	.4byte	.LASF757
 	.byte	0x2
-	.2byte	0x203
+	.2byte	0x231
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x6345
+	.4byte	0x632b
 	.uleb128 0x4b
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x203
-	.4byte	0x51f5
+	.2byte	0x231
+	.4byte	0x51d6
 	.uleb128 0x4c
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x205
+	.2byte	0x233
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x206
+	.2byte	0x234
 	.4byte	0x10f8
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x6355
-	.4byte	.LASF758
+	.4byte	.LASF573
+	.4byte	0x633b
+	.4byte	.LASF757
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6355
+	.4byte	0x633b
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6345
+	.4byte	0x632b
 	.uleb128 0x49
-	.4byte	.LASF760
+	.4byte	.LASF759
 	.byte	0x2
-	.2byte	0x1db
+	.2byte	0x209
 	.4byte	0x5b
 	.8byte	.LFB254
 	.8byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x643d
+	.4byte	0x6423
 	.uleb128 0x53
-	.4byte	.LASF704
+	.4byte	.LASF703
 	.byte	0x2
-	.2byte	0x1db
-	.4byte	0x51f5
-	.4byte	.LLST209
+	.2byte	0x209
+	.4byte	0x51d6
+	.4byte	.LLST208
 	.uleb128 0x55
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x2
-	.2byte	0x1dd
+	.2byte	0x20b
 	.4byte	0x10f8
-	.4byte	.LLST210
+	.4byte	.LLST209
 	.uleb128 0x55
-	.4byte	.LASF707
+	.4byte	.LASF706
 	.byte	0x2
-	.2byte	0x1de
+	.2byte	0x20c
 	.4byte	0x1001
-	.4byte	.LLST211
+	.4byte	.LLST210
 	.uleb128 0x55
-	.4byte	.LASF761
+	.4byte	.LASF760
 	.byte	0x2
-	.2byte	0x1df
+	.2byte	0x20d
 	.4byte	0x10f8
-	.4byte	.LLST212
+	.4byte	.LLST211
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdc9
-	.4byte	.LLST213
+	.4byte	.LLST212
 	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
-	.2byte	0x1e0
+	.2byte	0x20e
 	.4byte	0xdc9
-	.4byte	.LLST214
+	.4byte	.LLST213
 	.uleb128 0x55
-	.4byte	.LASF759
+	.4byte	.LASF758
 	.byte	0x2
-	.2byte	0x1e1
+	.2byte	0x20f
 	.4byte	0xdc9
-	.4byte	.LLST215
+	.4byte	.LLST214
 	.uleb128 0x55
-	.4byte	.LASF762
+	.4byte	.LASF761
 	.byte	0x2
-	.2byte	0x1e2
+	.2byte	0x210
 	.4byte	0xdc9
-	.4byte	.LLST216
+	.4byte	.LLST215
 	.uleb128 0x55
-	.4byte	.LASF757
+	.4byte	.LASF756
 	.byte	0x2
-	.2byte	0x1e3
+	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST217
+	.4byte	.LLST216
 	.uleb128 0x34
-	.8byte	.LVL829
-	.4byte	0x259f
-	.4byte	0x6429
+	.8byte	.LVL831
+	.4byte	0x258a
+	.4byte	0x640f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34264,8 +34234,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL846
-	.4byte	0x6afa
+	.8byte	.LVL848
+	.4byte	0x6b48
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34274,50 +34244,50 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF763
+	.4byte	.LASF762
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0x5b
 	.8byte	.LFB253
 	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65c5
+	.4byte	0x65ab
 	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdc9
-	.4byte	.LLST206
+	.4byte	.LLST205
 	.uleb128 0x53
-	.4byte	.LASF741
+	.4byte	.LASF740
 	.byte	0x2
-	.2byte	0x1b9
+	.2byte	0x1e7
 	.4byte	0xdc9
-	.4byte	.LLST207
+	.4byte	.LLST206
 	.uleb128 0x2a
-	.4byte	.LASF709
+	.4byte	.LASF708
 	.byte	0x2
-	.2byte	0x1bb
-	.4byte	0x51fb
+	.2byte	0x1e9
+	.4byte	0x51dc
 	.uleb128 0x1
 	.byte	0x69
 	.uleb128 0x55
-	.4byte	.LASF764
+	.4byte	.LASF763
 	.byte	0x2
-	.2byte	0x1bc
+	.2byte	0x1ea
 	.4byte	0xdd4
-	.4byte	.LLST208
+	.4byte	.LLST207
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x37ff
+	.4byte	.LASF573
+	.4byte	0x37d0
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6562
+	.8byte	__func__.6560
 	.uleb128 0x34
-	.8byte	.LVL813
-	.4byte	0xa94d
-	.4byte	0x64e3
+	.8byte	.LVL815
+	.4byte	0xa94f
+	.4byte	0x64c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34335,12 +34305,12 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1be
+	.2byte	0x1ec
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL816
-	.4byte	0x259f
-	.4byte	0x64fb
+	.8byte	.LVL818
+	.4byte	0x258a
+	.4byte	0x64e1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34349,9 +34319,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL820
-	.4byte	0x29a4
-	.4byte	0x651d
+	.8byte	.LVL822
+	.4byte	0x298f
+	.4byte	0x6503
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34370,15 +34340,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL822
-	.4byte	0xa94d
-	.4byte	0x6548
+	.8byte	.LVL824
+	.4byte	0xa94f
+	.4byte	0x652e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC83
+	.8byte	.LC86
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34393,15 +34363,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL823
-	.4byte	0x2b1c
-	.4byte	0x6571
+	.8byte	.LVL825
+	.4byte	0x2b07
+	.4byte	0x6557
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC84
+	.8byte	.LC87
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -34414,15 +34384,15 @@ __func__.7632:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL824
-	.4byte	0x2b1c
-	.4byte	0x6595
+	.8byte	.LVL826
+	.4byte	0x2b07
+	.4byte	0x657b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC85
+	.8byte	.LC88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -34430,8 +34400,8 @@ __func__.7632:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL825
-	.4byte	0xa94d
+	.8byte	.LVL827
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34449,109 +34419,109 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1d3
+	.2byte	0x201
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF765
+	.4byte	.LASF764
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x6644
+	.4byte	0x662a
 	.uleb128 0x4b
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x193
+	.2byte	0x1bf
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF766
+	.4byte	.LASF765
 	.byte	0x2
-	.2byte	0x195
+	.2byte	0x1c1
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF767
+	.4byte	.LASF766
 	.byte	0x2
-	.2byte	0x196
+	.2byte	0x1c2
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.2byte	0x197
+	.2byte	0x1c3
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF769
+	.4byte	.LASF768
 	.byte	0x2
-	.2byte	0x199
+	.2byte	0x1c5
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF770
+	.4byte	.LASF769
 	.byte	0x2
-	.2byte	0x19a
+	.2byte	0x1c6
 	.4byte	0xdd4
 	.uleb128 0x4c
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1e2c
+	.2byte	0x1c7
+	.4byte	0x1e17
 	.uleb128 0x4c
-	.4byte	.LASF771
+	.4byte	.LASF770
 	.byte	0x2
-	.2byte	0x19b
-	.4byte	0x1e2c
+	.2byte	0x1c7
+	.4byte	0x1e17
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x4d9d
-	.4byte	.LASF765
+	.4byte	.LASF573
+	.4byte	0x4d7e
+	.4byte	.LASF764
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF772
+	.4byte	.LASF771
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0x5b
 	.8byte	.LFB251
 	.8byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6697
+	.4byte	0x667d
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x17f
+	.2byte	0x1ab
 	.4byte	0xdc9
-	.4byte	.LLST67
+	.4byte	.LLST61
 	.uleb128 0x55
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x181
+	.2byte	0x1ad
 	.4byte	0xdc9
-	.4byte	.LLST68
+	.4byte	.LLST62
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x182
-	.4byte	0x1e2c
-	.4byte	.LLST69
+	.2byte	0x1ae
+	.4byte	0x1e17
+	.4byte	.LLST63
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF773
+	.4byte	.LASF772
 	.byte	0x2
-	.2byte	0x17a
+	.2byte	0x1a6
 	.4byte	0x5b
 	.8byte	.LFB250
 	.8byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x66e4
+	.4byte	0x66ca
 	.uleb128 0x53
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x17a
-	.4byte	0x66e4
-	.4byte	.LLST66
+	.2byte	0x1a6
+	.4byte	0x66ca
+	.4byte	.LLST60
 	.uleb128 0x2f
-	.8byte	.LVL187
-	.4byte	0x66ea
+	.8byte	.LVL168
+	.4byte	0x66d0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34568,44 +34538,44 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
-	.4byte	0x1e2c
+	.4byte	0x1e17
 	.uleb128 0x49
-	.4byte	.LASF775
+	.4byte	.LASF774
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0x5b
 	.8byte	.LFB249
 	.8byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6761
+	.4byte	0x6747
 	.uleb128 0x53
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x167
-	.4byte	0x66e4
-	.4byte	.LLST62
+	.2byte	0x193
+	.4byte	0x66ca
+	.4byte	.LLST56
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
-	.2byte	0x167
+	.2byte	0x193
 	.4byte	0xdc9
-	.4byte	.LLST63
+	.4byte	.LLST57
 	.uleb128 0x55
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x169
+	.2byte	0x195
 	.4byte	0xdc9
-	.4byte	.LLST64
+	.4byte	.LLST58
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x16a
-	.4byte	0x1e2c
-	.4byte	.LLST65
+	.2byte	0x196
+	.4byte	0x1e17
+	.4byte	.LLST59
 	.uleb128 0x36
-	.8byte	.LVL178
-	.4byte	0x6761
+	.8byte	.LVL159
+	.4byte	0x6747
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34615,48 +34585,48 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF776
+	.4byte	.LASF775
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0x5b
 	.8byte	.LFB248
 	.8byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6806
+	.4byte	0x67ec
 	.uleb128 0x53
-	.4byte	.LASF774
+	.4byte	.LASF773
 	.byte	0x2
-	.2byte	0x14c
-	.4byte	0x66e4
-	.4byte	.LLST58
+	.2byte	0x176
+	.4byte	0x66ca
+	.4byte	.LLST52
 	.uleb128 0x53
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x14c
+	.2byte	0x176
 	.4byte	0xdc9
-	.4byte	.LLST59
+	.4byte	.LLST53
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1e2c
-	.4byte	.LLST60
+	.2byte	0x178
+	.4byte	0x1e17
+	.4byte	.LLST54
 	.uleb128 0x55
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x14e
-	.4byte	0x1e2c
-	.4byte	.LLST61
+	.2byte	0x178
+	.4byte	0x1e17
+	.4byte	.LLST55
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x6816
+	.4byte	.LASF573
+	.4byte	0x67fc
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6521
+	.8byte	__func__.6519
 	.uleb128 0x36
-	.8byte	.LVL164
-	.4byte	0xa94d
+	.8byte	.LVL144
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34674,384 +34644,407 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x151
+	.2byte	0x17b
 	.byte	0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6816
+	.4byte	0x67fc
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6806
+	.4byte	0x67ec
 	.uleb128 0x49
-	.4byte	.LASF778
+	.4byte	.LASF777
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0x5b
 	.8byte	.LFB247
 	.8byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x689c
+	.4byte	0x6882
 	.uleb128 0x53
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.2byte	0x11b
+	.2byte	0x145
 	.4byte	0xdc9
-	.4byte	.LLST51
+	.4byte	.LLST45
 	.uleb128 0x55
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1e2c
-	.4byte	.LLST52
+	.2byte	0x147
+	.4byte	0x1e17
+	.4byte	.LLST46
 	.uleb128 0x55
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.2byte	0x11d
-	.4byte	0x1e2c
-	.4byte	.LLST53
+	.2byte	0x147
+	.4byte	0x1e17
+	.4byte	.LLST47
 	.uleb128 0x2a
-	.4byte	.LASF779
+	.4byte	.LASF778
 	.byte	0x2
-	.2byte	0x11e
+	.2byte	0x148
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x5d
 	.uleb128 0x55
-	.4byte	.LASF780
+	.4byte	.LASF779
 	.byte	0x2
-	.2byte	0x11f
+	.2byte	0x149
 	.4byte	0xdc9
-	.4byte	.LLST54
+	.4byte	.LLST48
 	.uleb128 0x55
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.2byte	0x120
+	.2byte	0x14a
 	.4byte	0xdc9
-	.4byte	.LLST55
+	.4byte	.LLST49
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF782
+	.4byte	.LASF781
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0x5b
 	.8byte	.LFB246
 	.8byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6936
+	.4byte	0x692c
 	.uleb128 0x2e
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xd8
+	.byte	0xf8
 	.4byte	0xdc9
-	.4byte	.LLST41
+	.4byte	.LLST34
 	.uleb128 0x32
-	.4byte	.LASF653
+	.4byte	.LASF652
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1e2c
-	.4byte	.LLST42
+	.byte	0xfa
+	.4byte	0x1e17
+	.4byte	.LLST35
 	.uleb128 0x32
-	.4byte	.LASF777
+	.4byte	.LASF776
 	.byte	0x2
-	.byte	0xda
-	.4byte	0x1e2c
-	.4byte	.LLST43
+	.byte	0xfa
+	.4byte	0x1e17
+	.4byte	.LLST36
 	.uleb128 0x32
-	.4byte	.LASF783
+	.4byte	.LASF782
 	.byte	0x2
-	.byte	0xdb
+	.byte	0xfb
 	.4byte	0xdc9
-	.4byte	.LLST44
+	.4byte	.LLST37
 	.uleb128 0x32
-	.4byte	.LASF784
+	.4byte	.LASF783
 	.byte	0x2
-	.byte	0xdc
+	.byte	0xfc
 	.4byte	0xdc9
-	.4byte	.LLST45
+	.4byte	.LLST38
 	.uleb128 0x32
-	.4byte	.LASF768
+	.4byte	.LASF767
 	.byte	0x2
-	.byte	0xdd
+	.byte	0xfd
 	.4byte	0xdd4
-	.4byte	.LLST46
+	.4byte	.LLST39
 	.uleb128 0x32
-	.4byte	.LASF785
+	.4byte	.LASF784
 	.byte	0x2
-	.byte	0xde
+	.byte	0xfe
 	.4byte	0xdd4
-	.4byte	.LLST47
+	.4byte	.LLST40
 	.uleb128 0x32
-	.4byte	.LASF781
+	.4byte	.LASF780
 	.byte	0x2
-	.byte	0xdf
+	.byte	0xff
 	.4byte	0xdc9
-	.4byte	.LLST48
+	.4byte	.LLST41
+	.uleb128 0x55
+	.4byte	.LASF325
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0xdc9
+	.4byte	.LLST42
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF786
+	.4byte	.LASF785
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.byte	0x1
-	.4byte	0x695b
+	.4byte	0x6951
 	.uleb128 0x38
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb9
+	.byte	0xd9
 	.4byte	0xdc9
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x6816
-	.4byte	.LASF786
+	.4byte	.LASF573
+	.4byte	0x67fc
+	.4byte	.LASF785
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF787
+	.4byte	.LASF786
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.byte	0x1
-	.4byte	0x6980
+	.4byte	0x6976
 	.uleb128 0x38
-	.4byte	.LASF650
+	.4byte	.LASF649
 	.byte	0x2
-	.byte	0xb2
+	.byte	0xd2
 	.4byte	0xdc9
 	.uleb128 0x4f
-	.4byte	.LASF574
-	.4byte	0x6816
-	.4byte	.LASF787
+	.4byte	.LASF573
+	.4byte	0x67fc
+	.4byte	.LASF786
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF788
+	.4byte	.LASF787
 	.byte	0x2
-	.byte	0xa4
+	.byte	0xb4
 	.4byte	0xdc9
 	.8byte	.LFB243
 	.8byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x69eb
+	.4byte	0x6a64
 	.uleb128 0x33
 	.string	"tmp"
 	.byte	0x2
-	.byte	0xa6
+	.byte	0xb6
 	.4byte	0xdc9
-	.4byte	.LLST39
-	.uleb128 0x63
-	.8byte	.LBB176
-	.8byte	.LBE176-.LBB176
-	.4byte	0x69d3
-	.uleb128 0x33
+	.4byte	.LLST191
+	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
-	.byte	0xa9
-	.4byte	0x69eb
-	.4byte	.LLST40
-	.byte	0
+	.byte	0xb7
+	.4byte	0x6a64
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
 	.uleb128 0x66
-	.4byte	0x6bcd
-	.8byte	.LBB174
-	.8byte	.LBE174-.LBB174
+	.4byte	.LASF788
 	.byte	0x2
-	.byte	0xa8
+	.byte	0xb9
+	.8byte	.L464
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x140
+	.4byte	0x6a12
+	.uleb128 0x32
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0xbf
+	.4byte	0xdc9
+	.4byte	.LLST192
+	.uleb128 0x34
+	.8byte	.LVL719
+	.4byte	0x6d33
+	.4byte	0x69f9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL722
+	.4byte	0x270c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	0x6b8f
+	.8byte	.LBB246
+	.4byte	.Ldebug_ranges0+0x100
+	.byte	0x2
+	.byte	0xba
+	.uleb128 0x34
+	.8byte	.LVL726
+	.4byte	0xa94f
+	.4byte	0x6a49
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC82
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL728
+	.4byte	0xa94f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x15a4
 	.uleb128 0x2d
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0x5b
 	.8byte	.LFB242
 	.8byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6a65
+	.4byte	0x6ade
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x2
-	.byte	0x92
+	.byte	0xa2
 	.4byte	0xdc9
-	.4byte	.LLST36
+	.4byte	.LLST31
 	.uleb128 0x33
 	.string	"ret"
 	.byte	0x2
-	.byte	0x94
+	.byte	0xa4
 	.4byte	0x5b
-	.4byte	.LLST37
+	.4byte	.LLST32
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x2
-	.byte	0x95
+	.byte	0xa5
 	.4byte	0xdd4
-	.4byte	.LLST38
+	.4byte	.LLST33
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
-	.byte	0x96
-	.4byte	0x69eb
+	.byte	0xa6
+	.4byte	0x6a64
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x67
-	.4byte	0x6bc1
-	.8byte	.LBB170
+	.4byte	0x6b83
+	.8byte	.LBB189
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x2
-	.byte	0x98
+	.byte	0xa8
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
-	.byte	0x73
+	.byte	0x75
 	.8byte	.LFB241
 	.8byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6afa
-	.uleb128 0x33
-	.string	"i"
+	.4byte	0x6b48
+	.uleb128 0x2b
+	.4byte	.LASF325
 	.byte	0x2
-	.byte	0x75
-	.4byte	0xdc9
-	.4byte	.LLST30
-	.uleb128 0x33
-	.string	"tmp"
+	.byte	0x77
+	.4byte	0xddf
+	.uleb128 0x12
+	.byte	0x3
+	.8byte	g_sys_save_data+28
+	.byte	0x94
 	.byte	0x2
-	.byte	0x75
-	.4byte	0xdc9
-	.4byte	.LLST31
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
 	.uleb128 0x33
-	.string	"j"
-	.byte	0x2
-	.byte	0x75
-	.4byte	0xdc9
-	.4byte	.LLST32
-	.uleb128 0x32
-	.4byte	.LASF602
-	.byte	0x2
-	.byte	0x76
-	.4byte	0xdc9
-	.4byte	.LLST33
-	.uleb128 0x32
-	.4byte	.LASF791
+	.string	"i"
 	.byte	0x2
-	.byte	0x77
+	.byte	0x78
 	.4byte	0xdc9
-	.4byte	.LLST34
-	.uleb128 0x32
-	.4byte	.LASF792
+	.4byte	.LLST30
+	.uleb128 0x3d
+	.string	"blk"
 	.byte	0x2
 	.byte	0x78
-	.4byte	0xdd4
-	.4byte	.LLST35
+	.4byte	0xdc9
+	.uleb128 0x1
+	.byte	0x57
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x69eb
+	.4byte	0x6a64
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x45
-	.8byte	.LVL79
-	.4byte	0x6d71
 	.byte	0
-	.uleb128 0x43
-	.4byte	.LASF793
+	.uleb128 0x65
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x61
-	.8byte	.LFB240
-	.8byte	.LFE240-.LFB240
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x6bc1
-	.uleb128 0x31
+	.byte	0x1
+	.4byte	0x6b83
+	.uleb128 0x42
 	.string	"blk"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST184
-	.uleb128 0x2e
-	.4byte	.LASF794
+	.uleb128 0x38
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST185
-	.uleb128 0x63
-	.8byte	.LBB223
-	.8byte	.LBE223-.LBB223
-	.4byte	0x6ba9
-	.uleb128 0x33
+	.uleb128 0x50
+	.uleb128 0x39
 	.string	"Q"
 	.byte	0x2
-	.byte	0x64
-	.4byte	0x69eb
-	.4byte	.LLST186
-	.uleb128 0x68
-	.8byte	.LBB224
-	.8byte	.LBE224-.LBB224
-	.uleb128 0x32
-	.4byte	.LASF795
-	.byte	0x2
 	.byte	0x66
+	.4byte	0x6a64
+	.uleb128 0x50
+	.uleb128 0x3a
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x68
 	.4byte	0xdc9
-	.4byte	.LLST187
-	.uleb128 0x34
-	.8byte	.LVL681
-	.4byte	0x6d71
-	.4byte	0x6b8f
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x2
-	.byte	0x85
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL684
-	.4byte	0x2721
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.4byte	0x6bc1
-	.8byte	.LBB221
-	.8byte	.LBE221-.LBB221
-	.byte	0x2
-	.byte	0x63
 	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF796
+	.uleb128 0x68
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdc9
 	.byte	0x1
-	.uleb128 0x69
-	.4byte	.LASF797
+	.uleb128 0x68
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdc9
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF798
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
@@ -35059,25 +35052,25 @@ __func__.7632:
 	.8byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6c45
+	.4byte	0x6c07
 	.uleb128 0x31
 	.string	"max"
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
-	.4byte	.LLST205
+	.4byte	.LLST204
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x69eb
+	.4byte	0x6a64
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x36
-	.8byte	.LVL809
-	.4byte	0x259f
+	.8byte	.LVL811
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35098,7 +35091,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF799
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
@@ -35106,19 +35099,19 @@ __func__.7632:
 	.8byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d22
+	.4byte	0x6ce4
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdd4
-	.4byte	.LLST163
+	.4byte	.LLST154
 	.uleb128 0x2e
-	.4byte	.LASF568
+	.4byte	.LASF567
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
-	.4byte	.LLST164
+	.4byte	.LLST155
 	.uleb128 0x3d
 	.string	"req"
 	.byte	0x2
@@ -35132,37 +35125,37 @@ __func__.7632:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST165
+	.4byte	.LLST156
 	.uleb128 0x32
-	.4byte	.LASF800
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST166
+	.4byte	.LLST157
 	.uleb128 0x33
 	.string	"mid"
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST167
+	.4byte	.LLST158
 	.uleb128 0x2b
-	.4byte	.LASF801
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x32
-	.4byte	0x2711
+	.4byte	0x26fc
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x32
-	.4byte	.LASF802
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdc9
-	.4byte	.LLST168
+	.4byte	.LLST159
 	.uleb128 0x34
-	.8byte	.LVL626
-	.4byte	0x29a4
-	.4byte	0x6d01
+	.8byte	.LVL603
+	.4byte	0x298f
+	.4byte	0x6cc3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35182,8 +35175,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL635
-	.4byte	0x29a4
+	.8byte	.LVL612
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35204,7 +35197,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF803
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35212,15 +35205,15 @@ __func__.7632:
 	.8byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d71
+	.4byte	0x6d33
 	.uleb128 0x2e
-	.4byte	.LASF804
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
 	.4byte	.LLST27
 	.uleb128 0x2e
-	.4byte	.LASF805
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35233,7 +35226,7 @@ __func__.7632:
 	.4byte	.LLST29
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF806
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
@@ -35241,22 +35234,22 @@ __func__.7632:
 	.8byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6db1
+	.4byte	0x6d73
 	.uleb128 0x2e
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
 	.4byte	.LLST25
 	.uleb128 0x32
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdc9
 	.4byte	.LLST26
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF807
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
@@ -35264,15 +35257,15 @@ __func__.7632:
 	.8byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6e0c
+	.4byte	0x6dce
 	.uleb128 0x2e
-	.4byte	.LASF597
+	.4byte	.LASF596
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
 	.4byte	.LLST24
 	.uleb128 0x2b
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdc9
@@ -35302,7 +35295,7 @@ __func__.7632:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF808
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
@@ -35310,29 +35303,29 @@ __func__.7632:
 	.8byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6e59
+	.4byte	0x6e1b
 	.uleb128 0x2e
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.4byte	.LLST22
 	.uleb128 0x5c
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x32
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdc9
 	.4byte	.LLST23
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF809
+	.4byte	.LASF807
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xddf
@@ -35340,45 +35333,45 @@ __func__.7632:
 	.8byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70a4
+	.4byte	0x7066
 	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdd4
-	.4byte	.LLST363
+	.4byte	.LLST362
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdc9
-	.4byte	.LLST364
+	.4byte	.LLST363
 	.uleb128 0x55
-	.4byte	.LASF577
+	.4byte	.LASF576
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdd4
-	.4byte	.LLST365
+	.4byte	.LLST364
 	.uleb128 0x55
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x70a4
-	.4byte	.LLST366
+	.4byte	0x7066
+	.4byte	.LLST365
 	.uleb128 0x4e
-	.4byte	.LASF811
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x45
-	.8byte	.LVL1547
-	.4byte	0x72fe
+	.8byte	.LVL1549
+	.4byte	0x72c0
 	.uleb128 0x45
-	.8byte	.LVL1548
-	.4byte	0x70aa
+	.8byte	.LVL1550
+	.4byte	0x706c
 	.uleb128 0x34
-	.8byte	.LVL1554
-	.4byte	0x7560
-	.4byte	0x6ef5
+	.8byte	.LVL1556
+	.4byte	0x7522
+	.4byte	0x6eb7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35387,9 +35380,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1555
-	.4byte	0x26cd
-	.4byte	0x6f0d
+	.8byte	.LVL1557
+	.4byte	0x26b8
+	.4byte	0x6ecf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35398,9 +35391,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1556
-	.4byte	0x75ef
-	.4byte	0x6f25
+	.8byte	.LVL1558
+	.4byte	0x75b1
+	.4byte	0x6ee7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35409,9 +35402,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1562
-	.4byte	0x29a4
-	.4byte	0x6f47
+	.8byte	.LVL1564
+	.4byte	0x298f
+	.4byte	0x6f09
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35430,12 +35423,12 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1563
-	.4byte	0x2527
-	.uleb128 0x34
 	.8byte	.LVL1565
-	.4byte	0x75ef
-	.4byte	0x6f6c
+	.4byte	0x2512
+	.uleb128 0x34
+	.8byte	.LVL1567
+	.4byte	0x75b1
+	.4byte	0x6f2e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35444,9 +35437,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1567
-	.4byte	0x2611
-	.4byte	0x6f84
+	.8byte	.LVL1569
+	.4byte	0x25fc
+	.4byte	0x6f46
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35455,15 +35448,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1568
-	.4byte	0x74bc
-	.uleb128 0x45
 	.8byte	.LVL1570
-	.4byte	0x7560
+	.4byte	0x747e
+	.uleb128 0x45
+	.8byte	.LVL1572
+	.4byte	0x7522
 	.uleb128 0x34
-	.8byte	.LVL1571
-	.4byte	0x259f
-	.4byte	0x6fba
+	.8byte	.LVL1573
+	.4byte	0x258a
+	.4byte	0x6f7c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35476,9 +35469,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1572
-	.4byte	0x259f
-	.4byte	0x6fd8
+	.8byte	.LVL1574
+	.4byte	0x258a
+	.4byte	0x6f9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35492,12 +35485,12 @@ __func__.7632:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1574
-	.4byte	0x2527
+	.8byte	.LVL1576
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL1575
-	.4byte	0x2721
-	.4byte	0x7007
+	.8byte	.LVL1577
+	.4byte	0x270c
+	.4byte	0x6fc9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35516,9 +35509,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1576
-	.4byte	0x27e7
-	.4byte	0x702e
+	.8byte	.LVL1578
+	.4byte	0x27d2
+	.4byte	0x6ff0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35542,9 +35535,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1577
-	.4byte	0x75ef
-	.4byte	0x7046
+	.8byte	.LVL1579
+	.4byte	0x75b1
+	.4byte	0x7008
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35553,12 +35546,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1583
-	.4byte	0x75ef
+	.8byte	.LVL1585
+	.4byte	0x75b1
 	.uleb128 0x34
-	.8byte	.LVL1587
-	.4byte	0x2721
-	.4byte	0x706f
+	.8byte	.LVL1589
+	.4byte	0x270c
+	.4byte	0x7031
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35571,23 +35564,23 @@ __func__.7632:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1588
-	.4byte	0x75ef
-	.uleb128 0x45
-	.8byte	.LVL1589
-	.4byte	0x75ef
-	.uleb128 0x45
 	.8byte	.LVL1590
-	.4byte	0x7342
+	.4byte	0x75b1
+	.uleb128 0x45
+	.8byte	.LVL1591
+	.4byte	0x75b1
 	.uleb128 0x45
 	.8byte	.LVL1592
-	.4byte	0x7342
+	.4byte	0x7304
+	.uleb128 0x45
+	.8byte	.LVL1594
+	.4byte	0x7304
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x11c8
 	.uleb128 0x49
-	.4byte	.LASF812
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x5b
@@ -35595,33 +35588,33 @@ __func__.7632:
 	.8byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7127
+	.4byte	0x70e9
 	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x118
 	.4byte	0xdd4
-	.4byte	.LLST160
+	.4byte	.LLST151
 	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdc9
-	.4byte	.LLST161
+	.4byte	.LLST152
 	.uleb128 0x4c
-	.4byte	.LASF813
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdd4
 	.uleb128 0x55
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x70a4
-	.4byte	.LLST162
+	.4byte	0x7066
+	.4byte	.LLST153
 	.uleb128 0x36
-	.8byte	.LVL616
-	.4byte	0x29a4
+	.8byte	.LVL593
+	.4byte	0x298f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35641,7 +35634,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF814
+	.4byte	.LASF812
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x5b
@@ -35649,44 +35642,44 @@ __func__.7632:
 	.8byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7295
+	.4byte	0x7257
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdd4
-	.4byte	.LLST359
+	.4byte	.LLST358
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdc9
-	.4byte	.LLST360
+	.4byte	.LLST359
 	.uleb128 0x32
-	.4byte	.LASF706
+	.4byte	.LASF705
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xdea
-	.4byte	.LLST361
+	.4byte	.LLST360
 	.uleb128 0x32
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x70a4
-	.4byte	.LLST362
+	.4byte	0x7066
+	.4byte	.LLST361
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x72a5
+	.4byte	.LASF573
+	.4byte	0x7267
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6363
+	.8byte	__func__.6366
 	.uleb128 0x45
-	.8byte	.LVL1523
-	.4byte	0x72fe
-	.uleb128 0x34
 	.8byte	.LVL1525
-	.4byte	0x29a4
-	.4byte	0x71c4
+	.4byte	0x72c0
+	.uleb128 0x34
+	.8byte	.LVL1527
+	.4byte	0x298f
+	.4byte	0x7186
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35705,9 +35698,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1526
-	.4byte	0x29a4
-	.4byte	0x71e6
+	.8byte	.LVL1528
+	.4byte	0x298f
+	.4byte	0x71a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35726,15 +35719,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1528
-	.4byte	0x29a4
-	.4byte	0x720f
+	.8byte	.LVL1530
+	.4byte	0x298f
+	.4byte	0x71d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR108
+	.8byte	.LANCHOR106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35747,9 +35740,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1529
-	.4byte	0x6c45
-	.4byte	0x7226
+	.8byte	.LVL1531
+	.4byte	0x6c07
+	.4byte	0x71e8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35757,9 +35750,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1531
-	.4byte	0xa94d
-	.4byte	0x7258
+	.8byte	.LVL1533
+	.4byte	0xa94f
+	.4byte	0x721a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35771,7 +35764,7 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR165
+	.8byte	.LANCHOR164
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -35780,12 +35773,12 @@ __func__.7632:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1532
-	.4byte	0x8b93
+	.8byte	.LVL1534
+	.4byte	0x8a94
 	.uleb128 0x34
-	.8byte	.LVL1540
-	.4byte	0x29a4
-	.4byte	0x7287
+	.8byte	.LVL1542
+	.4byte	0x298f
+	.4byte	0x7249
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35804,20 +35797,20 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1545
-	.4byte	0x2527
+	.8byte	.LVL1547
+	.4byte	0x2512
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x72a5
+	.4byte	0x7267
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7295
+	.4byte	0x7257
 	.uleb128 0x2d
-	.4byte	.LASF815
+	.4byte	.LASF813
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdc9
@@ -35825,7 +35818,7 @@ __func__.7632:
 	.8byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72fe
+	.4byte	0x72c0
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
@@ -35833,14 +35826,14 @@ __func__.7632:
 	.4byte	0xdc9
 	.4byte	.LLST20
 	.uleb128 0x32
-	.4byte	.LASF816
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdc9
 	.4byte	.LLST21
 	.uleb128 0x36
 	.8byte	.LVL53
-	.4byte	0x7560
+	.4byte	0x7522
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35850,17 +35843,17 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF817
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x94
 	.8byte	.LFB227
 	.8byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7342
+	.4byte	0x7304
 	.uleb128 0x2f
-	.8byte	.LVL806
-	.4byte	0x259f
+	.8byte	.LVL808
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35881,7 +35874,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF818
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x5b
@@ -35889,42 +35882,42 @@ __func__.7632:
 	.8byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x74bc
+	.4byte	0x747e
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x5b
-	.4byte	.LLST308
+	.4byte	.LLST307
 	.uleb128 0x32
-	.4byte	.LASF819
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x5b
-	.4byte	.LLST309
+	.4byte	.LLST308
 	.uleb128 0x32
-	.4byte	.LASF810
+	.4byte	.LASF808
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x70a4
-	.4byte	.LLST310
+	.4byte	0x7066
+	.4byte	.LLST309
 	.uleb128 0x32
-	.4byte	.LASF722
+	.4byte	.LASF721
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdc9
-	.4byte	.LLST311
+	.4byte	.LLST310
 	.uleb128 0x58
-	.4byte	.LASF820
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x6a
-	.4byte	.LASF574
-	.4byte	0x299f
+	.uleb128 0x69
+	.4byte	.LASF573
+	.4byte	0x298a
 	.uleb128 0x34
-	.8byte	.LVL1245
-	.4byte	0x259f
-	.4byte	0x73c5
+	.8byte	.LVL1247
+	.4byte	0x258a
+	.4byte	0x7387
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35933,9 +35926,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1248
-	.4byte	0x259f
-	.4byte	0x73e8
+	.8byte	.LVL1250
+	.4byte	0x258a
+	.4byte	0x73aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35955,9 +35948,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1250
-	.4byte	0xa94d
-	.4byte	0x7400
+	.8byte	.LVL1252
+	.4byte	0xa94f
+	.4byte	0x73c2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35966,9 +35959,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1251
-	.4byte	0x27e7
-	.4byte	0x7427
+	.8byte	.LVL1253
+	.4byte	0x27d2
+	.4byte	0x73e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35992,9 +35985,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1252
-	.4byte	0x2721
-	.4byte	0x7443
+	.8byte	.LVL1254
+	.4byte	0x270c
+	.4byte	0x7405
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36007,9 +36000,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1253
-	.4byte	0x27e7
-	.4byte	0x746a
+	.8byte	.LVL1255
+	.4byte	0x27d2
+	.4byte	0x742c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36033,26 +36026,26 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1255
-	.4byte	0xa94d
-	.4byte	0x7489
+	.8byte	.LVL1257
+	.4byte	0xa94f
+	.4byte	0x744b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC95
+	.8byte	.LC98
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1256
-	.4byte	0xa94d
-	.4byte	0x74ae
+	.8byte	.LVL1258
+	.4byte	0xa94f
+	.4byte	0x7470
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC96
+	.8byte	.LC99
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -36061,45 +36054,45 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1259
-	.4byte	0x2527
+	.8byte	.LVL1261
+	.4byte	0x2512
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF821
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x41
 	.8byte	.LFB225
 	.8byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7558
+	.4byte	0x751a
 	.uleb128 0x2e
-	.4byte	.LASF754
+	.4byte	.LASF753
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10f8
-	.4byte	.LLST203
+	.4byte	.LLST202
 	.uleb128 0x2e
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x1001
-	.4byte	.LLST204
+	.4byte	.LLST203
 	.uleb128 0x39
 	.string	"i"
 	.byte	0x4
 	.byte	0x43
 	.4byte	0xdd4
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x4258
+	.4byte	.LASF573
+	.4byte	0x4239
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6320
+	.8byte	__func__.6323
 	.uleb128 0x34
-	.8byte	.LVL802
-	.4byte	0x259f
-	.4byte	0x7530
+	.8byte	.LVL804
+	.4byte	0x258a
+	.4byte	0x74f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36113,8 +36106,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL803
-	.4byte	0xa94d
+	.8byte	.LVL805
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36135,13 +36128,13 @@ __func__.7632:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF823
+	.uleb128 0x6a
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF824
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x5b
@@ -36149,7 +36142,7 @@ __func__.7632:
 	.8byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x75ef
+	.4byte	0x75b1
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36169,7 +36162,7 @@ __func__.7632:
 	.4byte	0xdd4
 	.4byte	.LLST18
 	.uleb128 0x2b
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0x1001
@@ -36199,14 +36192,14 @@ __func__.7632:
 	.8byte	gBbtInfo
 	.byte	0x22
 	.uleb128 0x32
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x1c
 	.4byte	0xdc9
 	.4byte	.LLST19
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF825
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x5b
@@ -36214,7 +36207,7 @@ __func__.7632:
 	.8byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7673
+	.4byte	0x7635
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36228,20 +36221,20 @@ __func__.7632:
 	.4byte	0xdd4
 	.4byte	.LLST13
 	.uleb128 0x32
-	.4byte	.LASF822
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x7
 	.4byte	0x1001
 	.4byte	.LLST14
 	.uleb128 0x32
-	.4byte	.LASF582
+	.4byte	.LASF581
 	.byte	0x4
 	.byte	0x8
 	.4byte	0xdc9
 	.4byte	.LLST15
 	.uleb128 0x36
 	.8byte	.LVL44
-	.4byte	0xa94d
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36260,46 +36253,46 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
-	.4byte	.LASF887
+	.uleb128 0x6b
+	.4byte	.LASF885
 	.byte	0x3
-	.2byte	0x4bd
+	.2byte	0x499
 	.4byte	0xdd4
 	.8byte	.LFB221
 	.8byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
 	.uleb128 0x49
-	.4byte	.LASF826
+	.4byte	.LASF824
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0x5b
 	.8byte	.LFB220
 	.8byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x770c
+	.4byte	0x76ce
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb9
-	.4byte	.LLST460
+	.4byte	.LLST459
 	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b8
+	.2byte	0x494
 	.4byte	0xb9
-	.4byte	.LLST461
+	.4byte	.LLST460
 	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b8
-	.4byte	0x770c
-	.4byte	.LLST462
+	.2byte	0x494
+	.4byte	0x76ce
+	.4byte	.LLST461
 	.uleb128 0x2f
-	.8byte	.LVL2074
-	.4byte	0x78b7
+	.8byte	.LVL2054
+	.4byte	0x786c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36332,36 +36325,36 @@ __func__.7632:
 	.byte	0x8
 	.4byte	0x94
 	.uleb128 0x49
-	.4byte	.LASF827
+	.4byte	.LASF825
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0x5b
 	.8byte	.LFB219
 	.8byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x778d
+	.4byte	0x774f
 	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb9
-	.4byte	.LLST442
+	.4byte	.LLST441
 	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b3
+	.2byte	0x48f
 	.4byte	0xb9
-	.4byte	.LLST443
+	.4byte	.LLST442
 	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b3
-	.4byte	0x770c
-	.4byte	.LLST444
+	.2byte	0x48f
+	.4byte	0x76ce
+	.4byte	.LLST443
 	.uleb128 0x2f
-	.8byte	.LVL1984
-	.4byte	0x7fdd
+	.8byte	.LVL1980
+	.4byte	0x7ef8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36391,85 +36384,82 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF828
+	.4byte	.LASF826
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0x5b
 	.8byte	.LFB218
 	.8byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x78b7
+	.4byte	0x786c
 	.uleb128 0x53
-	.4byte	.LASF732
+	.4byte	.LASF731
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdd4
-	.4byte	.LLST400
+	.4byte	.LLST387
 	.uleb128 0x53
-	.4byte	.LASF733
+	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x484
+	.2byte	0x460
 	.4byte	0xdd4
-	.4byte	.LLST401
+	.4byte	.LLST388
 	.uleb128 0x55
-	.4byte	.LASF735
+	.4byte	.LASF734
 	.byte	0x3
-	.2byte	0x486
+	.2byte	0x462
 	.4byte	0xdc9
-	.4byte	.LLST402
+	.4byte	.LLST389
 	.uleb128 0x54
 	.string	"tmp"
 	.byte	0x3
-	.2byte	0x487
+	.2byte	0x463
 	.4byte	0xdc9
-	.4byte	.LLST403
+	.4byte	.LLST390
 	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
-	.2byte	0x488
+	.2byte	0x464
 	.4byte	0xdd4
-	.4byte	.LLST404
+	.4byte	.LLST391
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF641
+	.4byte	.LASF640
 	.byte	0x3
-	.2byte	0x489
+	.2byte	0x465
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF630
+	.4byte	.LASF629
 	.byte	0x3
-	.2byte	0x48a
+	.2byte	0x466
 	.4byte	0xdc9
-	.4byte	.LLST405
-	.uleb128 0x45
-	.8byte	.LVL1746
-	.4byte	0x7d59
+	.4byte	.LLST392
 	.uleb128 0x45
-	.8byte	.LVL1755
-	.4byte	0x5d63
+	.8byte	.LVL1702
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1756
-	.4byte	0x5694
+	.8byte	.LVL1703
+	.4byte	0x567a
 	.uleb128 0x34
-	.8byte	.LVL1757
-	.4byte	0x5c36
-	.4byte	0x7878
+	.8byte	.LVL1704
+	.4byte	0x5c1c
+	.4byte	0x782d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x84
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36484,14 +36474,14 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1758
-	.4byte	0x5c36
-	.4byte	0x789c
+	.8byte	.LVL1705
+	.4byte	0x5c1c
+	.4byte	0x7851
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x85
+	.byte	0x84
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36506,74 +36496,74 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1759
-	.4byte	0x6d71
+	.8byte	.LVL1706
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL1760
-	.4byte	0x36c0
+	.8byte	.LVL1707
+	.4byte	0x3691
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF829
+	.4byte	.LASF827
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0x5b
 	.8byte	.LFB217
 	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d59
+	.4byte	0x7ca2
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdbe
+	.4byte	.LLST444
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3bd
+	.4byte	0xdd4
 	.4byte	.LLST445
 	.uleb128 0x53
 	.4byte	.LASF732
 	.byte	0x3
-	.2byte	0x3c1
+	.2byte	0x3bd
 	.4byte	0xdd4
 	.4byte	.LLST446
 	.uleb128 0x53
 	.4byte	.LASF733
 	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0xdd4
+	.2byte	0x3bd
+	.4byte	0x5ad8
 	.4byte	.LLST447
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x3c1
-	.4byte	0x5af2
-	.4byte	.LLST448
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
-	.2byte	0x3c3
-	.4byte	0x2dff
-	.4byte	.LLST449
+	.2byte	0x3bf
+	.4byte	0x2dea
+	.4byte	.LLST448
 	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdd4
-	.4byte	.LLST450
+	.4byte	.LLST449
 	.uleb128 0x55
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdd4
-	.4byte	.LLST451
+	.4byte	.LLST450
 	.uleb128 0x55
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
-	.2byte	0x3c4
+	.2byte	0x3c0
 	.4byte	0xdd4
-	.4byte	.LLST452
+	.4byte	.LLST451
 	.uleb128 0x2a
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
@@ -36581,66 +36571,66 @@ __func__.7632:
 	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x3
-	.2byte	0x3c5
+	.2byte	0x3c1
 	.4byte	0xdd4
-	.4byte	.LLST453
+	.4byte	.LLST452
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
+	.4byte	0xdd4
+	.4byte	.LLST453
+	.uleb128 0x55
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c2
 	.4byte	0xdd4
 	.4byte	.LLST454
 	.uleb128 0x55
-	.4byte	.LASF832
+	.4byte	.LASF595
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c2
 	.4byte	0xdd4
 	.4byte	.LLST455
 	.uleb128 0x55
-	.4byte	.LASF596
+	.4byte	.LASF831
 	.byte	0x3
-	.2byte	0x3c6
+	.2byte	0x3c3
 	.4byte	0xdd4
 	.4byte	.LLST456
 	.uleb128 0x55
-	.4byte	.LASF833
+	.4byte	.LASF832
 	.byte	0x3
-	.2byte	0x3c7
+	.2byte	0x3c3
 	.4byte	0xdd4
 	.4byte	.LLST457
 	.uleb128 0x55
-	.4byte	.LASF834
+	.4byte	.LASF639
 	.byte	0x3
-	.2byte	0x3c7
-	.4byte	0xdd4
+	.2byte	0x3c4
+	.4byte	0x1eef
 	.4byte	.LLST458
-	.uleb128 0x55
-	.4byte	.LASF640
-	.byte	0x3
-	.2byte	0x3c8
-	.4byte	0x1f04
-	.4byte	.LLST459
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x5d5e
+	.4byte	.LASF573
+	.4byte	0x5d44
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6256
+	.8byte	__func__.6259
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x300
-	.4byte	0x7a79
+	.4byte	.Ldebug_ranges0+0x390
+	.4byte	0x7a2e
 	.uleb128 0x2a
-	.4byte	.LASF604
+	.4byte	.LASF603
 	.byte	0x3
-	.2byte	0x43d
+	.2byte	0x425
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL2061
-	.4byte	0x29a4
-	.4byte	0x7a24
+	.8byte	.LVL2034
+	.4byte	0x298f
+	.4byte	0x79d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36659,15 +36649,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2063
-	.4byte	0xa94d
-	.4byte	0x7a49
+	.8byte	.LVL2036
+	.4byte	0xa94f
+	.4byte	0x79fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC105
+	.8byte	.LC108
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -36676,8 +36666,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2064
-	.4byte	0xa94d
+	.8byte	.LVL2037
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36689,45 +36679,44 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x44a
+	.2byte	0x432
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1989
-	.4byte	0x5af8
-	.4byte	0x7a9e
+	.8byte	.LVL1985
+	.4byte	0x5ade
+	.4byte	0x7a56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3
-	.byte	0x86
+	.byte	0x85
 	.sleb128 256
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x88
-	.sleb128 0
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 352
+	.byte	0x94
+	.byte	0x4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x89
+	.byte	0x8a
 	.sleb128 0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2000
-	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2002
-	.4byte	0x2d32
-	.4byte	0x7ace
+	.8byte	.LVL1996
+	.4byte	0x2d1d
+	.4byte	0x7a76
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36736,82 +36725,16 @@ __func__.7632:
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x8
+	.uleb128 0x5
 	.byte	0x8f
-	.sleb128 344
+	.sleb128 328
 	.byte	0x94
 	.byte	0x4
-	.byte	0x85
-	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2007
-	.4byte	0x6644
-	.4byte	0x7ae5
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2008
-	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2009
-	.4byte	0x2d32
-	.4byte	0x7b0e
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2010
-	.4byte	0x2d32
-	.4byte	0x7b2a
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2016
-	.4byte	0x2527
-	.4byte	0x7b48
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2023
-	.4byte	0x7d59
-	.uleb128 0x34
-	.8byte	.LVL2025
-	.4byte	0xa94d
-	.4byte	0x7b88
+	.8byte	.LVL1999
+	.4byte	0xa94f
+	.4byte	0x7aa9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36823,21 +36746,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x3f4
+	.2byte	0x3dc
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2026
-	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2027
-	.4byte	0x3932
-	.4byte	0x7bb4
+	.8byte	.LVL2000
+	.4byte	0x3903
+	.4byte	0x7ac8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36846,9 +36766,9 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2029
-	.4byte	0x3932
-	.4byte	0x7bcc
+	.8byte	.LVL2002
+	.4byte	0x3903
+	.4byte	0x7ae0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36857,9 +36777,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2031
-	.4byte	0x3932
-	.4byte	0x7be4
+	.8byte	.LVL2004
+	.4byte	0x3903
+	.4byte	0x7af8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36868,9 +36788,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2034
-	.4byte	0xa94d
-	.4byte	0x7c17
+	.8byte	.LVL2007
+	.4byte	0xa94f
+	.4byte	0x7b2b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36882,23 +36802,23 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x415
+	.2byte	0x3fd
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2037
-	.4byte	0x7d94
-	.4byte	0x7c3a
+	.8byte	.LVL2010
+	.4byte	0x7caf
+	.4byte	0x7b4e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x87
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36913,9 +36833,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2038
-	.4byte	0xa94d
-	.4byte	0x7c6d
+	.8byte	.LVL2011
+	.4byte	0xa94f
+	.4byte	0x7b81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36927,18 +36847,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x46e
+	.2byte	0x44a
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2041
-	.4byte	0x3932
-	.4byte	0x7c85
+	.8byte	.LVL2014
+	.4byte	0x3903
+	.4byte	0x7b99
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36947,9 +36867,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2044
-	.4byte	0x5c36
-	.4byte	0x7ca9
+	.8byte	.LVL2017
+	.4byte	0x5c1c
+	.4byte	0x7bbd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36969,9 +36889,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2045
-	.4byte	0x3804
-	.4byte	0x7cc1
+	.8byte	.LVL2018
+	.4byte	0x37d5
+	.4byte	0x7bd5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36980,14 +36900,14 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2049
-	.4byte	0x259f
-	.4byte	0x7cde
+	.8byte	.LVL2022
+	.4byte	0x258a
+	.4byte	0x7bf2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x2
-	.byte	0x8b
+	.byte	0x87
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36996,9 +36916,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2054
-	.4byte	0xa94d
-	.4byte	0x7d11
+	.8byte	.LVL2027
+	.4byte	0xa94f
+	.4byte	0x7c25
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37010,107 +36930,109 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR180
+	.8byte	.LANCHOR178
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x45f
+	.2byte	0x441
 	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2035
+	.4byte	0x2512
 	.uleb128 0x34
-	.8byte	.LVL2062
-	.4byte	0x2527
-	.4byte	0x7d34
+	.8byte	.LVL2039
+	.4byte	0x258a
+	.4byte	0x7c49
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x89
-	.sleb128 0
-	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x7
-	.byte	0x8f
-	.sleb128 348
-	.byte	0x94
-	.byte	0x4
-	.byte	0x39
-	.byte	0x24
+	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2066
-	.4byte	0x259f
-	.4byte	0x7d4b
+	.8byte	.LVL2045
+	.4byte	0x662a
+	.4byte	0x7c60
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x51
+	.byte	0x50
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2067
-	.4byte	0x2527
-	.byte	0
-	.uleb128 0x49
-	.4byte	.LASF835
-	.byte	0x3
-	.2byte	0x3b7
-	.4byte	0x5b
-	.8byte	.LFB216
-	.8byte	.LFE216-.LFB216
+	.8byte	.LVL2046
+	.4byte	0x2f5e
+	.uleb128 0x34
+	.8byte	.LVL2047
+	.4byte	0x2d1d
+	.4byte	0x7c89
+	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x7d94
-	.uleb128 0x36
-	.8byte	.LVL1734
-	.4byte	0x7d94
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2048
+	.4byte	0x2d1d
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x52
+	.byte	0x50
 	.uleb128 0x1
 	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
 	.byte	0
 	.byte	0
+	.uleb128 0x52
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x5b
+	.byte	0x1
 	.uleb128 0x5f
-	.4byte	.LASF836
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x387
 	.8byte	.LFB215
 	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7fc8
+	.4byte	0x7ee3
 	.uleb128 0x5d
 	.string	"req"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1abc
-	.4byte	.LLST393
+	.4byte	.LLST398
 	.uleb128 0x53
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST394
+	.4byte	.LLST399
 	.uleb128 0x53
-	.4byte	.LASF837
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST395
+	.4byte	.LLST400
 	.uleb128 0x53
-	.4byte	.LASF640
+	.4byte	.LASF639
 	.byte	0x3
 	.2byte	0x387
-	.4byte	0x1f04
-	.4byte	.LLST396
+	.4byte	0x1eef
+	.4byte	.LLST401
 	.uleb128 0x4d
 	.string	"i"
 	.byte	0x3
@@ -37125,39 +37047,39 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x55
-	.4byte	.LASF664
+	.4byte	.LASF663
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdd4
-	.4byte	.LLST397
+	.4byte	.LLST402
 	.uleb128 0x55
-	.4byte	.LASF624
+	.4byte	.LASF623
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdc9
-	.4byte	.LLST398
+	.4byte	.LLST403
 	.uleb128 0x55
-	.4byte	.LASF599
+	.4byte	.LASF598
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2dff
-	.4byte	.LLST399
+	.4byte	0x2dea
+	.4byte	.LLST404
 	.uleb128 0x61
-	.4byte	.LASF688
+	.4byte	.LASF687
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x7fd8
+	.4byte	.LASF573
+	.4byte	0x7ef3
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6228
+	.8byte	__func__.6231
 	.uleb128 0x34
-	.8byte	.LVL1717
-	.4byte	0x27e7
-	.4byte	0x7e7f
+	.8byte	.LVL1746
+	.4byte	0x27d2
+	.4byte	0x7d9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37178,12 +37100,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1718
-	.4byte	0x6d71
+	.8byte	.LVL1747
+	.4byte	0x6d33
 	.uleb128 0x34
-	.8byte	.LVL1720
-	.4byte	0x3932
-	.4byte	0x7ea4
+	.8byte	.LVL1749
+	.4byte	0x3903
+	.4byte	0x7dbf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37192,12 +37114,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1721
-	.4byte	0x2ed1
+	.8byte	.LVL1750
+	.4byte	0x2ebc
 	.uleb128 0x34
-	.8byte	.LVL1722
-	.4byte	0x3804
-	.4byte	0x7ec9
+	.8byte	.LVL1751
+	.4byte	0x37d5
+	.4byte	0x7de4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37206,9 +37128,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1723
-	.4byte	0x27e7
-	.4byte	0x7eeb
+	.8byte	.LVL1752
+	.4byte	0x27d2
+	.4byte	0x7e06
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37227,9 +37149,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1724
-	.4byte	0xa94d
-	.4byte	0x7f1e
+	.8byte	.LVL1753
+	.4byte	0xa94f
+	.4byte	0x7e39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37250,9 +37172,9 @@ __func__.7632:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1725
-	.4byte	0x5c36
-	.4byte	0x7f3c
+	.8byte	.LVL1754
+	.4byte	0x5c1c
+	.4byte	0x7e57
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37266,9 +37188,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1727
-	.4byte	0x6d71
-	.4byte	0x7f56
+	.8byte	.LVL1756
+	.4byte	0x6d33
+	.4byte	0x7e71
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37279,15 +37201,15 @@ __func__.7632:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1729
-	.4byte	0xa94d
-	.4byte	0x7f80
+	.8byte	.LVL1758
+	.4byte	0xa94f
+	.4byte	0x7e9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC103
+	.8byte	.LC106
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37301,9 +37223,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1730
-	.4byte	0x36c0
-	.4byte	0x7f98
+	.8byte	.LVL1759
+	.4byte	0x3691
+	.4byte	0x7eb3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37312,8 +37234,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1732
-	.4byte	0xa94d
+	.8byte	.LVL1761
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37336,15 +37258,15 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x7fd8
+	.4byte	0x7ef3
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7fc8
+	.4byte	0x7ee3
 	.uleb128 0x49
-	.4byte	.LASF838
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x5b
@@ -37352,12 +37274,18 @@ __func__.7632:
 	.8byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8203
+	.4byte	0x8111
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdbe
+	.4byte	.LLST424
+	.uleb128 0x53
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdd4
 	.4byte	.LLST425
 	.uleb128 0x53
 	.4byte	.LASF732
@@ -37369,44 +37297,38 @@ __func__.7632:
 	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0xdd4
+	.4byte	0x5ad8
 	.4byte	.LLST427
-	.uleb128 0x53
-	.4byte	.LASF734
-	.byte	0x3
-	.2byte	0x32d
-	.4byte	0x5af2
-	.4byte	.LLST428
 	.uleb128 0x54
 	.string	"ret"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x5b
-	.4byte	.LLST429
+	.4byte	.LLST428
 	.uleb128 0x55
-	.4byte	.LASF830
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST430
+	.4byte	.LLST429
 	.uleb128 0x55
-	.4byte	.LASF831
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST431
+	.4byte	.LLST430
 	.uleb128 0x55
-	.4byte	.LASF839
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST432
+	.4byte	.LLST431
 	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdd4
-	.4byte	.LLST433
+	.4byte	.LLST432
 	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x3
@@ -37420,64 +37342,64 @@ __func__.7632:
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST434
+	.4byte	.LLST433
 	.uleb128 0x55
-	.4byte	.LASF596
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST435
+	.4byte	.LLST434
 	.uleb128 0x55
-	.4byte	.LASF832
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST436
+	.4byte	.LLST435
 	.uleb128 0x55
-	.4byte	.LASF840
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST437
+	.4byte	.LLST436
 	.uleb128 0x55
-	.4byte	.LASF841
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST438
+	.4byte	.LLST437
 	.uleb128 0x55
-	.4byte	.LASF842
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdd4
-	.4byte	.LLST439
+	.4byte	.LLST438
 	.uleb128 0x55
-	.4byte	.LASF843
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST440
+	.4byte	.LLST439
 	.uleb128 0x63
-	.8byte	.LBB297
-	.8byte	.LBE297-.LBB297
-	.4byte	0x814c
+	.8byte	.LBB332
+	.8byte	.LBE332-.LBB332
+	.4byte	0x8067
 	.uleb128 0x55
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdc9
-	.4byte	.LLST441
+	.4byte	.LLST440
 	.uleb128 0x45
-	.8byte	.LVL1977
-	.4byte	0x6d71
+	.8byte	.LVL1973
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL1978
-	.4byte	0x2f73
+	.8byte	.LVL1974
+	.4byte	0x2f5e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1935
-	.4byte	0x59d0
-	.4byte	0x8171
+	.8byte	.LVL1931
+	.4byte	0x59b6
+	.4byte	0x808c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37497,13 +37419,10 @@ __func__.7632:
 	.byte	0x87
 	.sleb128 0
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL1942
-	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL1948
-	.4byte	0x2d32
-	.4byte	0x819a
+	.8byte	.LVL1944
+	.4byte	0x2d1d
+	.4byte	0x80a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37516,9 +37435,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1949
-	.4byte	0x5c36
-	.4byte	0x81be
+	.8byte	.LVL1945
+	.4byte	0x5c1c
+	.4byte	0x80cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37538,9 +37457,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1954
-	.4byte	0x29a4
-	.4byte	0x81db
+	.8byte	.LVL1950
+	.4byte	0x298f
+	.4byte	0x80e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37554,11 +37473,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1957
-	.4byte	0x2527
+	.8byte	.LVL1953
+	.4byte	0x2512
 	.uleb128 0x36
-	.8byte	.LVL1964
-	.4byte	0x259f
+	.8byte	.LVL1960
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37573,7 +37492,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF844
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x5b
@@ -37581,13 +37500,13 @@ __func__.7632:
 	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8233
+	.4byte	0x8141
 	.uleb128 0x45
-	.8byte	.LVL1739
-	.4byte	0x8233
+	.8byte	.LVL1688
+	.4byte	0x8141
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF845
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x5b
@@ -37595,17 +37514,14 @@ __func__.7632:
 	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8294
-	.uleb128 0x45
-	.8byte	.LVL1735
-	.4byte	0x7d59
+	.4byte	0x8195
 	.uleb128 0x45
-	.8byte	.LVL1736
-	.4byte	0x5d63
+	.8byte	.LVL1685
+	.4byte	0x5d49
 	.uleb128 0x34
-	.8byte	.LVL1737
-	.4byte	0x5968
-	.4byte	0x8286
+	.8byte	.LVL1686
+	.4byte	0x594e
+	.4byte	0x8187
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37613,11 +37529,11 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1738
-	.4byte	0x5694
+	.8byte	.LVL1687
+	.4byte	0x567a
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF846
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x5b
@@ -37625,34 +37541,34 @@ __func__.7632:
 	.8byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x83a6
+	.4byte	0x82a7
 	.uleb128 0x2a
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x83a6
+	.4byte	0x82a7
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_nand_phy_info
 	.byte	0x9f
 	.uleb128 0x59
-	.4byte	.LASF848
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2f3
 	.8byte	.LDL2
 	.uleb128 0x63
-	.8byte	.LBB306
-	.8byte	.LBE306-.LBB306
-	.4byte	0x8319
+	.8byte	.LBB341
+	.8byte	.LBE341-.LBB341
+	.4byte	0x821a
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdd4
-	.4byte	.LLST469
+	.4byte	.LLST468
 	.uleb128 0x36
-	.8byte	.LVL2171
-	.4byte	0x2d32
+	.8byte	.LVL2152
+	.4byte	0x2d1d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37666,9 +37582,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2163
-	.4byte	0xa94d
-	.4byte	0x8345
+	.8byte	.LVL2144
+	.4byte	0xa94f
+	.4byte	0x8246
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37683,9 +37599,9 @@ __func__.7632:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2164
-	.4byte	0x8b23
-	.4byte	0x8364
+	.8byte	.LVL2145
+	.4byte	0x8a24
+	.4byte	0x8265
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37694,26 +37610,26 @@ __func__.7632:
 	.8byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2165
-	.4byte	0x882f
+	.8byte	.LVL2146
+	.4byte	0x8730
 	.uleb128 0x45
-	.8byte	.LVL2166
-	.4byte	0x8758
+	.8byte	.LVL2147
+	.4byte	0x8659
 	.uleb128 0x45
-	.8byte	.LVL2167
-	.4byte	0x6bd9
+	.8byte	.LVL2148
+	.4byte	0x6b9b
 	.uleb128 0x45
-	.8byte	.LVL2168
-	.4byte	0x7127
+	.8byte	.LVL2149
+	.4byte	0x70e9
 	.uleb128 0x45
-	.8byte	.LVL2169
-	.4byte	0x3f98
+	.8byte	.LVL2150
+	.4byte	0x3f79
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0xee1
 	.uleb128 0x49
-	.4byte	.LASF849
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x5b
@@ -37721,57 +37637,57 @@ __func__.7632:
 	.8byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8546
+	.4byte	0x8447
 	.uleb128 0x55
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST465
+	.4byte	.LLST464
 	.uleb128 0x55
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST466
+	.4byte	.LLST465
 	.uleb128 0x55
-	.4byte	.LASF851
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdc9
-	.4byte	.LLST467
+	.4byte	.LLST466
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdc9
-	.4byte	.LLST468
+	.4byte	.LLST467
 	.uleb128 0x59
-	.4byte	.LASF852
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x2bc
-	.8byte	.L1631
+	.8byte	.L1620
 	.uleb128 0x59
-	.4byte	.LASF853
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x2cc
-	.8byte	.L1633
+	.8byte	.L1622
 	.uleb128 0x45
-	.8byte	.LVL2122
-	.4byte	0x6bd9
+	.8byte	.LVL2103
+	.4byte	0x6b9b
 	.uleb128 0x45
-	.8byte	.LVL2123
-	.4byte	0x7127
+	.8byte	.LVL2104
+	.4byte	0x70e9
 	.uleb128 0x45
-	.8byte	.LVL2124
-	.4byte	0x6e59
+	.8byte	.LVL2105
+	.4byte	0x6e1b
 	.uleb128 0x45
-	.8byte	.LVL2132
-	.4byte	0x7342
+	.8byte	.LVL2113
+	.4byte	0x7304
 	.uleb128 0x34
-	.8byte	.LVL2133
-	.4byte	0x259f
-	.4byte	0x8477
+	.8byte	.LVL2114
+	.4byte	0x258a
+	.4byte	0x8378
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37779,9 +37695,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2135
-	.4byte	0x259f
-	.4byte	0x848f
+	.8byte	.LVL2116
+	.4byte	0x258a
+	.4byte	0x8390
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37790,9 +37706,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2136
-	.4byte	0x460e
-	.4byte	0x84a7
+	.8byte	.LVL2117
+	.4byte	0x45ef
+	.4byte	0x83a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37801,9 +37717,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2142
-	.4byte	0x8546
-	.4byte	0x84be
+	.8byte	.LVL2123
+	.4byte	0x8447
+	.4byte	0x83bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37811,15 +37727,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2147
-	.4byte	0x8b93
+	.8byte	.LVL2128
+	.4byte	0x8a94
 	.uleb128 0x45
-	.8byte	.LVL2148
-	.4byte	0x6bd9
+	.8byte	.LVL2129
+	.4byte	0x6b9b
 	.uleb128 0x34
-	.8byte	.LVL2151
-	.4byte	0x8546
-	.4byte	0x84ef
+	.8byte	.LVL2132
+	.4byte	0x8447
+	.4byte	0x83f0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37827,9 +37743,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2154
-	.4byte	0x8546
-	.4byte	0x8506
+	.8byte	.LVL2135
+	.4byte	0x8447
+	.4byte	0x8407
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37837,9 +37753,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2158
-	.4byte	0x460e
-	.4byte	0x851e
+	.8byte	.LVL2139
+	.4byte	0x45ef
+	.4byte	0x841f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37848,17 +37764,17 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2159
-	.4byte	0x6980
+	.8byte	.LVL2140
+	.4byte	0x6976
 	.uleb128 0x45
-	.8byte	.LVL2160
-	.4byte	0x5694
+	.8byte	.LVL2141
+	.4byte	0x567a
 	.uleb128 0x45
-	.8byte	.LVL2161
-	.4byte	0x3f98
+	.8byte	.LVL2142
+	.4byte	0x3f79
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF854
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x5b
@@ -37866,76 +37782,76 @@ __func__.7632:
 	.8byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x872e
+	.4byte	0x862f
 	.uleb128 0x53
-	.4byte	.LASF718
+	.4byte	.LASF717
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdc9
-	.4byte	.LLST188
+	.4byte	.LLST181
 	.uleb128 0x53
-	.4byte	.LASF855
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdbe
-	.4byte	.LLST189
+	.4byte	.LLST182
 	.uleb128 0x55
-	.4byte	.LASF850
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST190
+	.4byte	.LLST183
 	.uleb128 0x55
-	.4byte	.LASF569
+	.4byte	.LASF568
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST191
+	.4byte	.LLST184
 	.uleb128 0x55
-	.4byte	.LASF595
+	.4byte	.LASF594
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST192
+	.4byte	.LLST185
 	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST193
+	.4byte	.LLST186
 	.uleb128 0x55
-	.4byte	.LASF856
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdc9
-	.4byte	.LLST194
+	.4byte	.LLST187
 	.uleb128 0x55
-	.4byte	.LASF857
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdc9
-	.4byte	.LLST195
+	.4byte	.LLST188
 	.uleb128 0x55
-	.4byte	.LASF858
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdc9
-	.4byte	.LLST196
+	.4byte	.LLST189
 	.uleb128 0x55
-	.4byte	.LASF859
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdc9
-	.4byte	.LLST197
+	.4byte	.LLST190
 	.uleb128 0x59
-	.4byte	.LASF860
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x240
-	.8byte	.L440
+	.8byte	.L430
 	.uleb128 0x34
-	.8byte	.LVL694
-	.4byte	0x2721
-	.4byte	0x862f
+	.8byte	.LVL671
+	.4byte	0x270c
+	.4byte	0x8530
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37943,12 +37859,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL697
-	.4byte	0x75ef
+	.8byte	.LVL674
+	.4byte	0x75b1
 	.uleb128 0x34
-	.8byte	.LVL703
-	.4byte	0x27e7
-	.4byte	0x865f
+	.8byte	.LVL680
+	.4byte	0x27d2
+	.4byte	0x8560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37968,12 +37884,12 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL707
-	.4byte	0x75ef
+	.8byte	.LVL684
+	.4byte	0x75b1
 	.uleb128 0x34
-	.8byte	.LVL711
-	.4byte	0x6afa
-	.4byte	0x8683
+	.8byte	.LVL688
+	.4byte	0x6b48
+	.4byte	0x8584
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37981,9 +37897,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL712
-	.4byte	0x2721
-	.4byte	0x86a1
+	.8byte	.LVL689
+	.4byte	0x270c
+	.4byte	0x85a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37998,9 +37914,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL716
-	.4byte	0x6e0c
-	.4byte	0x86b9
+	.8byte	.LVL693
+	.4byte	0x6dce
+	.4byte	0x85ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38009,9 +37925,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL718
-	.4byte	0x872e
-	.4byte	0x86d1
+	.8byte	.LVL695
+	.4byte	0x862f
+	.4byte	0x85d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38020,9 +37936,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL719
-	.4byte	0x7560
-	.4byte	0x86e9
+	.8byte	.LVL696
+	.4byte	0x7522
+	.4byte	0x85ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38031,9 +37947,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL730
-	.4byte	0x6e0c
-	.4byte	0x8701
+	.8byte	.LVL707
+	.4byte	0x6dce
+	.4byte	0x8602
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38042,9 +37958,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL732
-	.4byte	0x872e
-	.4byte	0x8719
+	.8byte	.LVL709
+	.4byte	0x862f
+	.4byte	0x861a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38053,8 +37969,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL733
-	.4byte	0x7560
+	.8byte	.LVL710
+	.4byte	0x7522
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38064,37 +37980,37 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x4a
-	.4byte	.LASF861
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x8758
+	.4byte	0x8659
 	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdc9
 	.uleb128 0x4c
-	.4byte	.LASF862
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF863
+	.4byte	.LASF861
 	.byte	0x3
-	.2byte	0x1ec
+	.2byte	0x1ed
 	.4byte	0x5b
 	.8byte	.LFB207
 	.8byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x882f
+	.4byte	0x8730
 	.uleb128 0x34
-	.8byte	.LVL1110
-	.4byte	0x259f
-	.4byte	0x8791
+	.8byte	.LVL1112
+	.4byte	0x258a
+	.4byte	0x8692
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38102,9 +38018,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1111
-	.4byte	0x259f
-	.4byte	0x87a8
+	.8byte	.LVL1113
+	.4byte	0x258a
+	.4byte	0x86a9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38112,9 +38028,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1112
-	.4byte	0x259f
-	.4byte	0x87bf
+	.8byte	.LVL1114
+	.4byte	0x258a
+	.4byte	0x86c0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38122,15 +38038,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1113
-	.4byte	0x259f
-	.4byte	0x87e9
+	.8byte	.LVL1115
+	.4byte	0x258a
+	.4byte	0x86ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR79
+	.8byte	.LANCHOR39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38144,15 +38060,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1114
-	.4byte	0x259f
-	.4byte	0x8814
+	.8byte	.LVL1116
+	.4byte	0x258a
+	.4byte	0x8715
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR83
+	.8byte	.LANCHOR81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38166,50 +38082,50 @@ __func__.7632:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1115
-	.4byte	0x3695
+	.8byte	.LVL1117
+	.4byte	0x3666
 	.uleb128 0x45
-	.8byte	.LVL1116
-	.4byte	0x4f8b
+	.8byte	.LVL1118
+	.4byte	0x4f6c
 	.byte	0
 	.uleb128 0x49
-	.4byte	.LASF864
+	.4byte	.LASF862
 	.byte	0x3
-	.2byte	0x116
+	.2byte	0x117
 	.4byte	0x5b
 	.8byte	.LFB206
 	.8byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b23
+	.4byte	0x8a24
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
-	.2byte	0x118
+	.2byte	0x119
 	.4byte	0xdd4
-	.4byte	.LLST201
+	.4byte	.LLST200
 	.uleb128 0x55
-	.4byte	.LASF865
+	.4byte	.LASF863
 	.byte	0x3
-	.2byte	0x119
+	.2byte	0x11a
 	.4byte	0xdd4
-	.4byte	.LLST202
+	.4byte	.LLST201
 	.uleb128 0x3f
-	.4byte	.LASF574
-	.4byte	0x72a5
+	.4byte	.LASF573
+	.4byte	0x7267
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6104
+	.8byte	__func__.6107
 	.uleb128 0x45
-	.8byte	.LVL741
-	.4byte	0x2c2b
+	.8byte	.LVL743
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL742
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL744
-	.4byte	0x2c2b
-	.4byte	0x88b4
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL746
+	.4byte	0x2c16
+	.4byte	0x87b5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38218,9 +38134,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL745
-	.4byte	0x2c2b
-	.4byte	0x88cc
+	.8byte	.LVL747
+	.4byte	0x2c16
+	.4byte	0x87cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38229,9 +38145,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL746
-	.4byte	0x2c2b
-	.4byte	0x88e4
+	.8byte	.LVL748
+	.4byte	0x2c16
+	.4byte	0x87e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38240,9 +38156,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL747
-	.4byte	0x2c2b
-	.4byte	0x88fc
+	.8byte	.LVL749
+	.4byte	0x2c16
+	.4byte	0x87fd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38251,9 +38167,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL748
-	.4byte	0x2c2b
-	.4byte	0x8914
+	.8byte	.LVL750
+	.4byte	0x2c16
+	.4byte	0x8815
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38262,9 +38178,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL751
-	.4byte	0x2c2b
-	.4byte	0x892c
+	.8byte	.LVL753
+	.4byte	0x2c16
+	.4byte	0x882d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38273,9 +38189,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL752
-	.4byte	0x2c2b
-	.4byte	0x8944
+	.8byte	.LVL754
+	.4byte	0x2c16
+	.4byte	0x8845
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38284,9 +38200,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL753
-	.4byte	0x2c2b
-	.4byte	0x895c
+	.8byte	.LVL755
+	.4byte	0x2c16
+	.4byte	0x885d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38295,12 +38211,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL754
-	.4byte	0x2c2b
+	.8byte	.LVL756
+	.4byte	0x2c16
 	.uleb128 0x34
-	.8byte	.LVL755
-	.4byte	0x2c2b
-	.4byte	0x8981
+	.8byte	.LVL757
+	.4byte	0x2c16
+	.4byte	0x8882
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38309,9 +38225,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL756
-	.4byte	0x2c2b
-	.4byte	0x8999
+	.8byte	.LVL758
+	.4byte	0x2c16
+	.4byte	0x889a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38320,12 +38236,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL758
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL760
-	.4byte	0x2c2b
-	.4byte	0x89be
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL762
+	.4byte	0x2c16
+	.4byte	0x88bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38334,9 +38250,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL761
-	.4byte	0x2c2b
-	.4byte	0x89d8
+	.8byte	.LVL763
+	.4byte	0x2c16
+	.4byte	0x88d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38347,18 +38263,18 @@ __func__.7632:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL763
-	.4byte	0x2c2b
+	.8byte	.LVL765
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL764
-	.4byte	0x2c2b
+	.8byte	.LVL766
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL765
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL767
-	.4byte	0x2c2b
-	.4byte	0x8a17
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL769
+	.4byte	0x2c16
+	.4byte	0x8918
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38367,12 +38283,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL769
-	.4byte	0x2c2b
-	.uleb128 0x34
 	.8byte	.LVL771
-	.4byte	0x2c2b
-	.4byte	0x8a3c
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL773
+	.4byte	0x2c16
+	.4byte	0x893d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38381,9 +38297,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL772
-	.4byte	0x2c2b
-	.4byte	0x8a54
+	.8byte	.LVL774
+	.4byte	0x2c16
+	.4byte	0x8955
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38392,24 +38308,24 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL773
-	.4byte	0x2c2b
-	.uleb128 0x45
-	.8byte	.LVL774
-	.4byte	0x2c2b
-	.uleb128 0x45
 	.8byte	.LVL775
-	.4byte	0x2c2b
+	.4byte	0x2c16
 	.uleb128 0x45
 	.8byte	.LVL776
-	.4byte	0x2c2b
+	.4byte	0x2c16
 	.uleb128 0x45
 	.8byte	.LVL777
-	.4byte	0x2c2b
-	.uleb128 0x34
+	.4byte	0x2c16
+	.uleb128 0x45
 	.8byte	.LVL778
-	.4byte	0x259f
-	.4byte	0x8aac
+	.4byte	0x2c16
+	.uleb128 0x45
+	.8byte	.LVL779
+	.4byte	0x2c16
+	.uleb128 0x34
+	.8byte	.LVL780
+	.4byte	0x258a
+	.4byte	0x89ad
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38417,32 +38333,32 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL780
-	.4byte	0x2c2b
-	.uleb128 0x45
 	.8byte	.LVL782
-	.4byte	0x2c2b
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL785
-	.4byte	0x2c2b
+	.8byte	.LVL784
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL788
-	.4byte	0x2c2b
+	.8byte	.LVL787
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL791
-	.4byte	0x2c2b
+	.8byte	.LVL790
+	.4byte	0x2c16
 	.uleb128 0x45
-	.8byte	.LVL795
-	.4byte	0x2c2b
+	.8byte	.LVL793
+	.4byte	0x2c16
+	.uleb128 0x45
+	.8byte	.LVL797
+	.4byte	0x2c16
 	.uleb128 0x36
-	.8byte	.LVL798
-	.4byte	0xa94d
+	.8byte	.LVL800
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC82
+	.8byte	.LC85
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38452,34 +38368,34 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF866
+	.4byte	.LASF864
 	.byte	0x3
-	.byte	0xb6
+	.byte	0xb7
 	.4byte	0x5b
 	.8byte	.LFB205
 	.8byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b93
+	.4byte	0x8a94
 	.uleb128 0x2e
-	.4byte	.LASF847
+	.4byte	.LASF845
 	.byte	0x3
-	.byte	0xb6
-	.4byte	0x83a6
+	.byte	0xb7
+	.4byte	0x82a7
 	.4byte	.LLST8
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x3
-	.byte	0xb8
+	.byte	0xb9
 	.4byte	0xdd4
 	.4byte	.LLST9
 	.uleb128 0x45
 	.8byte	.LVL30
-	.4byte	0x8bdc
+	.4byte	0x8add
 	.uleb128 0x34
 	.8byte	.LVL31
-	.4byte	0x8bdc
-	.4byte	0x8b85
+	.4byte	0x8add
+	.4byte	0x8a86
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38489,39 +38405,39 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL33
-	.4byte	0x8b93
+	.4byte	0x8a94
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF867
+	.4byte	.LASF865
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0x5b
 	.8byte	.LFB204
 	.8byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8bc4
+	.4byte	0x8ac5
 	.uleb128 0x2e
-	.4byte	.LASF868
+	.4byte	.LASF866
 	.byte	0x3
-	.byte	0xa4
+	.byte	0xa5
 	.4byte	0xdc9
 	.4byte	.LLST7
 	.byte	0
 	.uleb128 0x65
-	.4byte	.LASF869
+	.4byte	.LASF867
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.byte	0x1
-	.4byte	0x8bdc
+	.4byte	0x8add
 	.uleb128 0x38
-	.4byte	.LASF870
+	.4byte	.LASF868
 	.byte	0x3
-	.byte	0x9e
+	.byte	0x9f
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF871
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdc9
@@ -38529,7 +38445,7 @@ __func__.7632:
 	.8byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c29
+	.4byte	0x8b2a
 	.uleb128 0x31
 	.string	"num"
 	.byte	0x3
@@ -38543,14 +38459,14 @@ __func__.7632:
 	.4byte	0xdc9
 	.4byte	.LLST5
 	.uleb128 0x32
-	.4byte	.LASF872
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdd4
 	.4byte	.LLST6
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF873
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x5b
@@ -38558,23 +38474,23 @@ __func__.7632:
 	.8byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8caf
+	.4byte	0x8bb0
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0x71
 	.4byte	0xfa
-	.4byte	.LLST112
+	.4byte	.LLST102
 	.uleb128 0x33
 	.string	"buf"
 	.byte	0x3
 	.byte	0x73
 	.4byte	0xfa
-	.4byte	.LLST113
+	.4byte	.LLST103
 	.uleb128 0x34
-	.8byte	.LVL470
-	.4byte	0xa96f
-	.4byte	0x8c9a
+	.8byte	.LVL445
+	.4byte	0xa971
+	.4byte	0x8b9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38595,8 +38511,8 @@ __func__.7632:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL472
-	.4byte	0x8caf
+	.8byte	.LVL447
+	.4byte	0x8bb0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38606,7 +38522,7 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF874
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x5b
@@ -38614,39 +38530,39 @@ __func__.7632:
 	.8byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x973d
+	.4byte	0x963e
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
 	.byte	0xb
 	.4byte	0xfa
-	.4byte	.LLST107
+	.4byte	.LLST97
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x3
 	.byte	0xd
 	.4byte	0x5b
-	.4byte	.LLST108
+	.4byte	.LLST98
 	.uleb128 0x33
 	.string	"buf"
 	.byte	0x3
 	.byte	0xe
 	.4byte	0xfa
-	.4byte	.LLST109
+	.4byte	.LLST99
 	.uleb128 0x63
-	.8byte	.LBB205
-	.8byte	.LBE205-.LBB205
-	.4byte	0x8d57
+	.8byte	.LBB217
+	.8byte	.LBE217-.LBB217
+	.4byte	0x8c58
 	.uleb128 0x32
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdc9
-	.4byte	.LLST110
+	.4byte	.LLST100
 	.uleb128 0x34
-	.8byte	.LVL455
-	.4byte	0x6644
-	.4byte	0x8d36
+	.8byte	.LVL430
+	.4byte	0x662a
+	.4byte	0x8c37
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38654,8 +38570,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL459
-	.4byte	0xa96f
+	.8byte	.LVL434
+	.4byte	0xa971
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38677,18 +38593,18 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x63
-	.8byte	.LBB206
-	.8byte	.LBE206-.LBB206
-	.4byte	0x8d9c
+	.8byte	.LBB218
+	.8byte	.LBE218-.LBB218
+	.4byte	0x8c9d
 	.uleb128 0x32
-	.4byte	.LASF587
+	.4byte	.LASF586
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdc9
-	.4byte	.LLST111
+	.4byte	.LLST101
 	.uleb128 0x36
-	.8byte	.LVL466
-	.4byte	0xa96f
+	.8byte	.LVL441
+	.4byte	0xa971
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38710,9 +38626,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL318
-	.4byte	0xa96f
-	.4byte	0x8dc1
+	.8byte	.LVL293
+	.4byte	0xa971
+	.4byte	0x8cc2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38727,9 +38643,9 @@ __func__.7632:
 	.8byte	.LC2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL320
-	.4byte	0xa96f
-	.4byte	0x8de6
+	.8byte	.LVL295
+	.4byte	0xa971
+	.4byte	0x8ce7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38744,9 +38660,9 @@ __func__.7632:
 	.8byte	.LC3
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL322
-	.4byte	0xa96f
-	.4byte	0x8e0b
+	.8byte	.LVL297
+	.4byte	0xa971
+	.4byte	0x8d0c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38761,9 +38677,9 @@ __func__.7632:
 	.8byte	.LC4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL324
-	.4byte	0xa96f
-	.4byte	0x8e30
+	.8byte	.LVL299
+	.4byte	0xa971
+	.4byte	0x8d31
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38778,9 +38694,9 @@ __func__.7632:
 	.8byte	.LC5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL326
-	.4byte	0xa96f
-	.4byte	0x8e55
+	.8byte	.LVL301
+	.4byte	0xa971
+	.4byte	0x8d56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38795,9 +38711,9 @@ __func__.7632:
 	.8byte	.LC6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL328
-	.4byte	0xa96f
-	.4byte	0x8e7a
+	.8byte	.LVL303
+	.4byte	0xa971
+	.4byte	0x8d7b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38812,9 +38728,9 @@ __func__.7632:
 	.8byte	.LC7
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL330
-	.4byte	0xa96f
-	.4byte	0x8e9f
+	.8byte	.LVL305
+	.4byte	0xa971
+	.4byte	0x8da0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38829,9 +38745,9 @@ __func__.7632:
 	.8byte	.LC8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL332
-	.4byte	0xa96f
-	.4byte	0x8ec4
+	.8byte	.LVL307
+	.4byte	0xa971
+	.4byte	0x8dc5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38846,9 +38762,9 @@ __func__.7632:
 	.8byte	.LC9
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL334
-	.4byte	0xa96f
-	.4byte	0x8ee9
+	.8byte	.LVL309
+	.4byte	0xa971
+	.4byte	0x8dea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38863,9 +38779,9 @@ __func__.7632:
 	.8byte	.LC10
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL336
-	.4byte	0xa96f
-	.4byte	0x8f0e
+	.8byte	.LVL311
+	.4byte	0xa971
+	.4byte	0x8e0f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38880,9 +38796,9 @@ __func__.7632:
 	.8byte	.LC11
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL338
-	.4byte	0xa96f
-	.4byte	0x8f33
+	.8byte	.LVL313
+	.4byte	0xa971
+	.4byte	0x8e34
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38897,9 +38813,9 @@ __func__.7632:
 	.8byte	.LC12
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL340
-	.4byte	0xa96f
-	.4byte	0x8f58
+	.8byte	.LVL315
+	.4byte	0xa971
+	.4byte	0x8e59
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38914,9 +38830,9 @@ __func__.7632:
 	.8byte	.LC13
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL342
-	.4byte	0xa96f
-	.4byte	0x8f7d
+	.8byte	.LVL317
+	.4byte	0xa971
+	.4byte	0x8e7e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38931,9 +38847,9 @@ __func__.7632:
 	.8byte	.LC14
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL344
-	.4byte	0xa96f
-	.4byte	0x8fa2
+	.8byte	.LVL319
+	.4byte	0xa971
+	.4byte	0x8ea3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38948,9 +38864,9 @@ __func__.7632:
 	.8byte	.LC15
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL346
-	.4byte	0xa96f
-	.4byte	0x8fc7
+	.8byte	.LVL321
+	.4byte	0xa971
+	.4byte	0x8ec8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38965,9 +38881,9 @@ __func__.7632:
 	.8byte	.LC16
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL348
-	.4byte	0xa96f
-	.4byte	0x8fec
+	.8byte	.LVL323
+	.4byte	0xa971
+	.4byte	0x8eed
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38982,9 +38898,9 @@ __func__.7632:
 	.8byte	.LC17
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL350
-	.4byte	0xa96f
-	.4byte	0x9011
+	.8byte	.LVL325
+	.4byte	0xa971
+	.4byte	0x8f12
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38999,9 +38915,9 @@ __func__.7632:
 	.8byte	.LC18
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL352
-	.4byte	0xa96f
-	.4byte	0x9036
+	.8byte	.LVL327
+	.4byte	0xa971
+	.4byte	0x8f37
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39016,9 +38932,9 @@ __func__.7632:
 	.8byte	.LC19
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL354
-	.4byte	0xa96f
-	.4byte	0x905b
+	.8byte	.LVL329
+	.4byte	0xa971
+	.4byte	0x8f5c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39033,9 +38949,9 @@ __func__.7632:
 	.8byte	.LC20
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL356
-	.4byte	0xa96f
-	.4byte	0x9080
+	.8byte	.LVL331
+	.4byte	0xa971
+	.4byte	0x8f81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39050,9 +38966,9 @@ __func__.7632:
 	.8byte	.LC21
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL358
-	.4byte	0xa96f
-	.4byte	0x90a5
+	.8byte	.LVL333
+	.4byte	0xa971
+	.4byte	0x8fa6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39067,9 +38983,9 @@ __func__.7632:
 	.8byte	.LC22
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL360
-	.4byte	0xa96f
-	.4byte	0x90ca
+	.8byte	.LVL335
+	.4byte	0xa971
+	.4byte	0x8fcb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39084,9 +39000,9 @@ __func__.7632:
 	.8byte	.LC23
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL362
-	.4byte	0xa96f
-	.4byte	0x90ef
+	.8byte	.LVL337
+	.4byte	0xa971
+	.4byte	0x8ff0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39101,9 +39017,9 @@ __func__.7632:
 	.8byte	.LC24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL364
-	.4byte	0xa96f
-	.4byte	0x9114
+	.8byte	.LVL339
+	.4byte	0xa971
+	.4byte	0x9015
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39118,9 +39034,9 @@ __func__.7632:
 	.8byte	.LC25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL366
-	.4byte	0xa96f
-	.4byte	0x9139
+	.8byte	.LVL341
+	.4byte	0xa971
+	.4byte	0x903a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39135,9 +39051,9 @@ __func__.7632:
 	.8byte	.LC26
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL368
-	.4byte	0xa96f
-	.4byte	0x915e
+	.8byte	.LVL343
+	.4byte	0xa971
+	.4byte	0x905f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39152,9 +39068,9 @@ __func__.7632:
 	.8byte	.LC27
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL370
-	.4byte	0xa96f
-	.4byte	0x9183
+	.8byte	.LVL345
+	.4byte	0xa971
+	.4byte	0x9084
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39169,9 +39085,9 @@ __func__.7632:
 	.8byte	.LC28
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL372
-	.4byte	0xa96f
-	.4byte	0x91a8
+	.8byte	.LVL347
+	.4byte	0xa971
+	.4byte	0x90a9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39186,9 +39102,9 @@ __func__.7632:
 	.8byte	.LC29
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL374
-	.4byte	0xa96f
-	.4byte	0x91cd
+	.8byte	.LVL349
+	.4byte	0xa971
+	.4byte	0x90ce
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39203,9 +39119,9 @@ __func__.7632:
 	.8byte	.LC30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL376
-	.4byte	0xa96f
-	.4byte	0x91f2
+	.8byte	.LVL351
+	.4byte	0xa971
+	.4byte	0x90f3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39220,9 +39136,9 @@ __func__.7632:
 	.8byte	.LC31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL378
-	.4byte	0xa96f
-	.4byte	0x9217
+	.8byte	.LVL353
+	.4byte	0xa971
+	.4byte	0x9118
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39237,9 +39153,9 @@ __func__.7632:
 	.8byte	.LC32
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL380
-	.4byte	0xa96f
-	.4byte	0x923c
+	.8byte	.LVL355
+	.4byte	0xa971
+	.4byte	0x913d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39254,9 +39170,9 @@ __func__.7632:
 	.8byte	.LC33
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL382
-	.4byte	0xa96f
-	.4byte	0x9261
+	.8byte	.LVL357
+	.4byte	0xa971
+	.4byte	0x9162
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39271,9 +39187,9 @@ __func__.7632:
 	.8byte	.LC34
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL384
-	.4byte	0xa96f
-	.4byte	0x9286
+	.8byte	.LVL359
+	.4byte	0xa971
+	.4byte	0x9187
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39288,9 +39204,9 @@ __func__.7632:
 	.8byte	.LC35
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL386
-	.4byte	0xa96f
-	.4byte	0x92ab
+	.8byte	.LVL361
+	.4byte	0xa971
+	.4byte	0x91ac
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39305,9 +39221,9 @@ __func__.7632:
 	.8byte	.LC36
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL388
-	.4byte	0xa96f
-	.4byte	0x92d0
+	.8byte	.LVL363
+	.4byte	0xa971
+	.4byte	0x91d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39322,9 +39238,9 @@ __func__.7632:
 	.8byte	.LC37
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL390
-	.4byte	0xa96f
-	.4byte	0x92f5
+	.8byte	.LVL365
+	.4byte	0xa971
+	.4byte	0x91f6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39339,9 +39255,9 @@ __func__.7632:
 	.8byte	.LC38
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL392
-	.4byte	0xa96f
-	.4byte	0x931a
+	.8byte	.LVL367
+	.4byte	0xa971
+	.4byte	0x921b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39356,9 +39272,9 @@ __func__.7632:
 	.8byte	.LC39
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL394
-	.4byte	0xa96f
-	.4byte	0x933f
+	.8byte	.LVL369
+	.4byte	0xa971
+	.4byte	0x9240
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39373,9 +39289,9 @@ __func__.7632:
 	.8byte	.LC40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL396
-	.4byte	0xa96f
-	.4byte	0x9364
+	.8byte	.LVL371
+	.4byte	0xa971
+	.4byte	0x9265
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39390,9 +39306,9 @@ __func__.7632:
 	.8byte	.LC41
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL398
-	.4byte	0xa96f
-	.4byte	0x9389
+	.8byte	.LVL373
+	.4byte	0xa971
+	.4byte	0x928a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39407,9 +39323,9 @@ __func__.7632:
 	.8byte	.LC42
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL400
-	.4byte	0xa96f
-	.4byte	0x93ae
+	.8byte	.LVL375
+	.4byte	0xa971
+	.4byte	0x92af
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39424,9 +39340,9 @@ __func__.7632:
 	.8byte	.LC43
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL402
-	.4byte	0xa96f
-	.4byte	0x93d3
+	.8byte	.LVL377
+	.4byte	0xa971
+	.4byte	0x92d4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39441,9 +39357,9 @@ __func__.7632:
 	.8byte	.LC44
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL404
-	.4byte	0xa96f
-	.4byte	0x93f8
+	.8byte	.LVL379
+	.4byte	0xa971
+	.4byte	0x92f9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39458,9 +39374,9 @@ __func__.7632:
 	.8byte	.LC45
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL406
-	.4byte	0xa96f
-	.4byte	0x941d
+	.8byte	.LVL381
+	.4byte	0xa971
+	.4byte	0x931e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39475,9 +39391,9 @@ __func__.7632:
 	.8byte	.LC46
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL408
-	.4byte	0xa96f
-	.4byte	0x9442
+	.8byte	.LVL383
+	.4byte	0xa971
+	.4byte	0x9343
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39492,9 +39408,9 @@ __func__.7632:
 	.8byte	.LC47
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL410
-	.4byte	0xa96f
-	.4byte	0x9467
+	.8byte	.LVL385
+	.4byte	0xa971
+	.4byte	0x9368
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39509,9 +39425,9 @@ __func__.7632:
 	.8byte	.LC48
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL412
-	.4byte	0xa96f
-	.4byte	0x948c
+	.8byte	.LVL387
+	.4byte	0xa971
+	.4byte	0x938d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39526,9 +39442,9 @@ __func__.7632:
 	.8byte	.LC49
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL414
-	.4byte	0xa96f
-	.4byte	0x94b1
+	.8byte	.LVL389
+	.4byte	0xa971
+	.4byte	0x93b2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39543,9 +39459,9 @@ __func__.7632:
 	.8byte	.LC50
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL416
-	.4byte	0xa96f
-	.4byte	0x94d6
+	.8byte	.LVL391
+	.4byte	0xa971
+	.4byte	0x93d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39560,9 +39476,9 @@ __func__.7632:
 	.8byte	.LC51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL418
-	.4byte	0xa96f
-	.4byte	0x94fb
+	.8byte	.LVL393
+	.4byte	0xa971
+	.4byte	0x93fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39577,9 +39493,9 @@ __func__.7632:
 	.8byte	.LC52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL420
-	.4byte	0xa96f
-	.4byte	0x9520
+	.8byte	.LVL395
+	.4byte	0xa971
+	.4byte	0x9421
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39594,9 +39510,9 @@ __func__.7632:
 	.8byte	.LC53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL422
-	.4byte	0xa96f
-	.4byte	0x9545
+	.8byte	.LVL397
+	.4byte	0xa971
+	.4byte	0x9446
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39611,9 +39527,9 @@ __func__.7632:
 	.8byte	.LC54
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL424
-	.4byte	0xa96f
-	.4byte	0x956a
+	.8byte	.LVL399
+	.4byte	0xa971
+	.4byte	0x946b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39628,9 +39544,9 @@ __func__.7632:
 	.8byte	.LC55
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL426
-	.4byte	0xa96f
-	.4byte	0x958f
+	.8byte	.LVL401
+	.4byte	0xa971
+	.4byte	0x9490
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39645,9 +39561,9 @@ __func__.7632:
 	.8byte	.LC56
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL428
-	.4byte	0xa96f
-	.4byte	0x95b4
+	.8byte	.LVL403
+	.4byte	0xa971
+	.4byte	0x94b5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39662,9 +39578,9 @@ __func__.7632:
 	.8byte	.LC57
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL430
-	.4byte	0xa96f
-	.4byte	0x95d9
+	.8byte	.LVL405
+	.4byte	0xa971
+	.4byte	0x94da
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39679,9 +39595,9 @@ __func__.7632:
 	.8byte	.LC58
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL432
-	.4byte	0xa96f
-	.4byte	0x95fe
+	.8byte	.LVL407
+	.4byte	0xa971
+	.4byte	0x94ff
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39696,9 +39612,9 @@ __func__.7632:
 	.8byte	.LC59
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL434
-	.4byte	0xa96f
-	.4byte	0x9623
+	.8byte	.LVL409
+	.4byte	0xa971
+	.4byte	0x9524
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39713,9 +39629,9 @@ __func__.7632:
 	.8byte	.LC60
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL436
-	.4byte	0xa96f
-	.4byte	0x9648
+	.8byte	.LVL411
+	.4byte	0xa971
+	.4byte	0x9549
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39730,9 +39646,9 @@ __func__.7632:
 	.8byte	.LC61
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL438
-	.4byte	0xa96f
-	.4byte	0x966d
+	.8byte	.LVL413
+	.4byte	0xa971
+	.4byte	0x956e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39747,9 +39663,9 @@ __func__.7632:
 	.8byte	.LC62
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL440
-	.4byte	0xa96f
-	.4byte	0x9692
+	.8byte	.LVL415
+	.4byte	0xa971
+	.4byte	0x9593
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39764,9 +39680,9 @@ __func__.7632:
 	.8byte	.LC63
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL442
-	.4byte	0xa96f
-	.4byte	0x96b7
+	.8byte	.LVL417
+	.4byte	0xa971
+	.4byte	0x95b8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39781,12 +39697,12 @@ __func__.7632:
 	.8byte	.LC64
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL444
-	.4byte	0x3edd
+	.8byte	.LVL419
+	.4byte	0x3ebe
 	.uleb128 0x34
-	.8byte	.LVL445
-	.4byte	0xa96f
-	.4byte	0x96e9
+	.8byte	.LVL420
+	.4byte	0xa971
+	.4byte	0x95ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39801,12 +39717,12 @@ __func__.7632:
 	.8byte	.LC65
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL447
-	.4byte	0x3e7c
+	.8byte	.LVL422
+	.4byte	0x3e5d
 	.uleb128 0x34
-	.8byte	.LVL448
-	.4byte	0xa96f
-	.4byte	0x971b
+	.8byte	.LVL423
+	.4byte	0xa971
+	.4byte	0x961c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39821,8 +39737,8 @@ __func__.7632:
 	.8byte	.LC66
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL453
-	.4byte	0xa96f
+	.8byte	.LVL428
+	.4byte	0xa971
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39837,143 +39753,149 @@ __func__.7632:
 	.8byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2a9d
+	.uleb128 0x6c
+	.4byte	0x2a88
 	.8byte	.LFB349
 	.8byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x979f
-	.uleb128 0x6e
-	.4byte	0x2ab8
+	.4byte	0x96a0
+	.uleb128 0x6d
+	.4byte	0x2aa3
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x6e
-	.4byte	0x2ac3
+	.uleb128 0x6d
+	.4byte	0x2aae
 	.uleb128 0x1
 	.byte	0x52
+	.uleb128 0x6e
+	.4byte	0x2a98
 	.uleb128 0x6f
-	.4byte	0x2aad
-	.uleb128 0x70
-	.4byte	0x2ace
+	.4byte	0x2ab9
 	.4byte	.LLST0
-	.uleb128 0x71
-	.4byte	0x2ad9
 	.uleb128 0x70
-	.4byte	0x2ae4
+	.4byte	0x2ac4
+	.uleb128 0x6f
+	.4byte	0x2acf
 	.4byte	.LLST1
-	.uleb128 0x72
-	.4byte	0x2aef
+	.uleb128 0x71
+	.4byte	0x2ada
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x72
-	.4byte	0x2afa
+	.uleb128 0x71
+	.4byte	0x2ae5
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x70
-	.4byte	0x2b05
+	.uleb128 0x6f
+	.4byte	0x2af0
 	.4byte	.LLST2
-	.uleb128 0x71
-	.4byte	0x2b10
+	.uleb128 0x70
+	.4byte	0x2afb
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5413
-	.8byte	.LFB356
-	.8byte	.LFE356-.LFB356
+	.uleb128 0x6c
+	.4byte	0x53f4
+	.8byte	.LFB355
+	.8byte	.LFE355-.LFB355
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97d0
+	.4byte	0x96d1
 	.uleb128 0x47
-	.4byte	0x5420
+	.4byte	0x5401
 	.4byte	.LLST3
-	.uleb128 0x6e
-	.4byte	0x542c
+	.uleb128 0x6d
+	.4byte	0x540d
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x542c
+	.4byte	0x540d
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x8bc4
+	.uleb128 0x6c
+	.4byte	0x8ac5
 	.8byte	.LFB203
 	.8byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97f3
-	.uleb128 0x6e
-	.4byte	0x8bd0
+	.4byte	0x96f4
+	.uleb128 0x6d
+	.4byte	0x8ad1
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x872e
+	.uleb128 0x6c
+	.4byte	0x862f
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9837
+	.4byte	0x9738
 	.uleb128 0x47
-	.4byte	0x873f
+	.4byte	0x8640
 	.4byte	.LLST10
-	.uleb128 0x71
-	.4byte	0x874b
-	.uleb128 0x73
+	.uleb128 0x70
+	.4byte	0x864c
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6f
-	.4byte	0x873f
-	.uleb128 0x73
+	.uleb128 0x6e
+	.4byte	0x8640
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x70
-	.4byte	0x9817
+	.uleb128 0x6f
+	.4byte	0x9718
 	.4byte	.LLST11
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x74
-	.4byte	0x7558
+	.uleb128 0x73
+	.4byte	0x7ca2
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x73
+	.4byte	0x751a
 	.8byte	.LFB224
 	.8byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x74
-	.4byte	0x6bcd
+	.uleb128 0x73
+	.4byte	0x6b8f
 	.8byte	.LFB238
 	.8byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x74
-	.4byte	0x6bc1
+	.uleb128 0x73
+	.4byte	0x6b83
 	.8byte	.LFB239
 	.8byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x6d
-	.4byte	0x6936
+	.uleb128 0x6c
+	.4byte	0x692c
 	.8byte	.LFB245
 	.8byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x991f
+	.4byte	0x9837
 	.uleb128 0x47
-	.4byte	0x6942
-	.4byte	.LLST49
-	.uleb128 0x71
-	.4byte	0x694d
+	.4byte	0x6938
+	.4byte	.LLST43
+	.uleb128 0x70
+	.4byte	0x6943
 	.uleb128 0x63
-	.8byte	.LBB179
-	.8byte	.LBE179-.LBB179
-	.4byte	0x9909
+	.8byte	.LBB195
+	.8byte	.LBE195-.LBB195
+	.4byte	0x9821
 	.uleb128 0x47
-	.4byte	0x6942
-	.4byte	.LLST50
-	.uleb128 0x68
-	.8byte	.LBB180
-	.8byte	.LBE180-.LBB180
-	.uleb128 0x71
-	.4byte	0x98a0
+	.4byte	0x6938
+	.4byte	.LLST44
+	.uleb128 0x74
+	.8byte	.LBB196
+	.8byte	.LBE196-.LBB196
+	.uleb128 0x70
+	.4byte	0x97b8
 	.uleb128 0x2f
-	.8byte	.LVL139
-	.4byte	0xa94d
+	.8byte	.LVL119
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39991,13 +39913,13 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xbd
+	.byte	0xdd
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL137
-	.4byte	0x689c
+	.8byte	.LVL117
+	.4byte	0x6882
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40007,33 +39929,33 @@ __func__.7632:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x695b
+	.uleb128 0x6c
+	.4byte	0x6951
 	.8byte	.LFB244
 	.8byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x99c2
+	.4byte	0x98da
 	.uleb128 0x47
-	.4byte	0x6967
-	.4byte	.LLST56
-	.uleb128 0x71
-	.4byte	0x6972
+	.4byte	0x695d
+	.4byte	.LLST50
+	.uleb128 0x70
+	.4byte	0x6968
 	.uleb128 0x63
-	.8byte	.LBB183
-	.8byte	.LBE183-.LBB183
-	.4byte	0x99ac
+	.8byte	.LBB199
+	.8byte	.LBE199-.LBB199
+	.4byte	0x98c4
 	.uleb128 0x47
-	.4byte	0x6967
-	.4byte	.LLST57
-	.uleb128 0x68
-	.8byte	.LBB184
-	.8byte	.LBE184-.LBB184
-	.uleb128 0x71
-	.4byte	0x9943
+	.4byte	0x695d
+	.4byte	.LLST51
+	.uleb128 0x74
+	.8byte	.LBB200
+	.8byte	.LBE200-.LBB200
+	.uleb128 0x70
+	.4byte	0x985b
 	.uleb128 0x2f
-	.8byte	.LVL159
-	.4byte	0xa94d
+	.8byte	.LVL139
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40051,13 +39973,13 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0xb6
+	.byte	0xd6
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL157
-	.4byte	0x681b
+	.8byte	.LVL137
+	.4byte	0x6801
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40067,68 +39989,68 @@ __func__.7632:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x65c5
+	.uleb128 0x6c
+	.4byte	0x65ab
 	.8byte	.LFB252
 	.8byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b1f
+	.4byte	0x9a37
 	.uleb128 0x47
-	.4byte	0x65d6
-	.4byte	.LLST70
-	.uleb128 0x71
-	.4byte	0x65e2
-	.uleb128 0x71
-	.4byte	0x65ee
-	.uleb128 0x71
-	.4byte	0x65fa
-	.uleb128 0x71
-	.4byte	0x6606
-	.uleb128 0x71
-	.4byte	0x6612
-	.uleb128 0x71
-	.4byte	0x661e
-	.uleb128 0x71
-	.4byte	0x662a
-	.uleb128 0x71
-	.4byte	0x6636
-	.uleb128 0x68
-	.8byte	.LBB187
-	.8byte	.LBE187-.LBB187
-	.uleb128 0x47
-	.4byte	0x65d6
-	.4byte	.LLST71
-	.uleb128 0x68
-	.8byte	.LBB188
-	.8byte	.LBE188-.LBB188
+	.4byte	0x65bc
+	.4byte	.LLST64
 	.uleb128 0x70
-	.4byte	0x99e6
-	.4byte	.LLST72
+	.4byte	0x65c8
 	.uleb128 0x70
-	.4byte	0x99eb
-	.4byte	.LLST73
+	.4byte	0x65d4
 	.uleb128 0x70
-	.4byte	0x99f0
-	.4byte	.LLST74
+	.4byte	0x65e0
 	.uleb128 0x70
-	.4byte	0x99f5
-	.4byte	.LLST75
+	.4byte	0x65ec
 	.uleb128 0x70
-	.4byte	0x99fa
-	.4byte	.LLST76
+	.4byte	0x65f8
 	.uleb128 0x70
-	.4byte	0x99ff
-	.4byte	.LLST77
+	.4byte	0x6604
 	.uleb128 0x70
-	.4byte	0x9a04
-	.4byte	.LLST78
-	.uleb128 0x71
-	.4byte	0x9a09
+	.4byte	0x6610
+	.uleb128 0x70
+	.4byte	0x661c
+	.uleb128 0x74
+	.8byte	.LBB203
+	.8byte	.LBE203-.LBB203
+	.uleb128 0x47
+	.4byte	0x65bc
+	.4byte	.LLST65
+	.uleb128 0x74
+	.8byte	.LBB204
+	.8byte	.LBE204-.LBB204
+	.uleb128 0x6f
+	.4byte	0x98fe
+	.4byte	.LLST66
+	.uleb128 0x6f
+	.4byte	0x9903
+	.4byte	.LLST67
+	.uleb128 0x6f
+	.4byte	0x9908
+	.4byte	.LLST68
+	.uleb128 0x6f
+	.4byte	0x990d
+	.4byte	.LLST69
+	.uleb128 0x6f
+	.4byte	0x9912
+	.4byte	.LLST70
+	.uleb128 0x6f
+	.4byte	0x9917
+	.4byte	.LLST71
+	.uleb128 0x6f
+	.4byte	0x991c
+	.4byte	.LLST72
+	.uleb128 0x70
+	.4byte	0x9921
 	.uleb128 0x34
-	.8byte	.LVL205
-	.4byte	0xa94d
-	.4byte	0x9ab0
+	.8byte	.LVL189
+	.4byte	0xa94f
+	.4byte	0x99c8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40146,18 +40068,18 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1aa
+	.2byte	0x1d6
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL213
-	.4byte	0x6761
-	.4byte	0x9ad5
+	.8byte	.LVL199
+	.4byte	0x6747
+	.4byte	0x99ed
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR42
+	.8byte	.LANCHOR41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40166,9 +40088,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL214
-	.4byte	0xa94d
-	.4byte	0x9b08
+	.8byte	.LVL200
+	.4byte	0xa94f
+	.4byte	0x9a20
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40186,11 +40108,11 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x1b3
+	.2byte	0x1e1
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL215
-	.4byte	0x6936
+	.8byte	.LVL201
+	.4byte	0x692c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40201,113 +40123,51 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x6302
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
-	.uleb128 0x1
-	.byte	0x9c
-	.4byte	0x9bd7
-	.uleb128 0x47
-	.4byte	0x6313
-	.4byte	.LLST79
-	.uleb128 0x70
-	.4byte	0x631f
-	.4byte	.LLST80
-	.uleb128 0x70
-	.4byte	0x632b
-	.4byte	.LLST81
-	.uleb128 0x71
-	.4byte	0x6337
-	.uleb128 0x63
-	.8byte	.LBB191
-	.8byte	.LBE191-.LBB191
-	.4byte	0x9bc9
-	.uleb128 0x47
-	.4byte	0x6313
-	.4byte	.LLST82
-	.uleb128 0x68
-	.8byte	.LBB192
-	.8byte	.LBE192-.LBB192
-	.uleb128 0x71
-	.4byte	0x9b43
-	.uleb128 0x71
-	.4byte	0x9b4c
-	.uleb128 0x71
-	.4byte	0x9b55
-	.uleb128 0x36
-	.8byte	.LVL221
-	.4byte	0xa94d
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR55
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x214
-	.byte	0
-	.byte	0
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL223
-	.4byte	0x6980
-	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5944
+	.uleb128 0x6c
+	.4byte	0x592a
 	.8byte	.LFB266
 	.8byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c1d
+	.4byte	0x9a7d
 	.uleb128 0x47
-	.4byte	0x5951
-	.4byte	.LLST86
+	.4byte	0x5937
+	.4byte	.LLST76
 	.uleb128 0x75
-	.4byte	0x595d
+	.4byte	0x5943
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6e
-	.4byte	0x5951
+	.uleb128 0x6d
+	.4byte	0x5937
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x73
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x71
-	.4byte	0x9bfb
+	.uleb128 0x70
+	.4byte	0x9a5b
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5413
+	.uleb128 0x6c
+	.4byte	0x53f4
 	.8byte	.LFB272
 	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c69
+	.4byte	0x9ac9
 	.uleb128 0x47
-	.4byte	0x5420
-	.4byte	.LLST87
+	.4byte	0x5401
+	.4byte	.LLST77
 	.uleb128 0x47
-	.4byte	0x542c
-	.4byte	.LLST88
+	.4byte	0x540d
+	.4byte	.LLST78
 	.uleb128 0x2f
-	.8byte	.LVL257
-	.4byte	0x979f
+	.8byte	.LVL232
+	.4byte	0x96a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40316,59 +40176,59 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3e
-	.4byte	0x542c
+	.4byte	0x540d
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x476a
+	.uleb128 0x6c
+	.4byte	0x474b
 	.8byte	.LFB282
 	.8byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9cc7
-	.uleb128 0x6e
-	.4byte	0x4777
+	.4byte	0x9b27
+	.uleb128 0x6d
+	.4byte	0x4758
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x71
-	.4byte	0x4783
-	.uleb128 0x68
-	.8byte	.LBB203
-	.8byte	.LBE203-.LBB203
-	.uleb128 0x47
-	.4byte	0x4777
-	.4byte	.LLST93
-	.uleb128 0x68
-	.8byte	.LBB204
-	.8byte	.LBE204-.LBB204
 	.uleb128 0x70
-	.4byte	0x9c8b
-	.4byte	.LLST94
+	.4byte	0x4764
+	.uleb128 0x74
+	.8byte	.LBB215
+	.8byte	.LBE215-.LBB215
+	.uleb128 0x47
+	.4byte	0x4758
+	.4byte	.LLST83
+	.uleb128 0x74
+	.8byte	.LBB216
+	.8byte	.LBE216-.LBB216
+	.uleb128 0x6f
+	.4byte	0x9aeb
+	.4byte	.LLST84
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x3d92
+	.uleb128 0x6c
+	.4byte	0x3d63
 	.8byte	.LFB297
 	.8byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d10
+	.4byte	0x9b70
 	.uleb128 0x47
-	.4byte	0x3da3
-	.4byte	.LLST121
-	.uleb128 0x73
+	.4byte	0x3d74
+	.4byte	.LLST112
+	.uleb128 0x72
 	.4byte	.Ldebug_ranges0+0xa0
 	.uleb128 0x47
-	.4byte	0x3da3
-	.4byte	.LLST122
+	.4byte	0x3d74
+	.4byte	.LLST113
 	.uleb128 0x36
-	.8byte	.LVL504
-	.4byte	0x695b
+	.8byte	.LVL481
+	.4byte	0x6951
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40379,67 +40239,208 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2ec4
+	.uleb128 0x6c
+	.4byte	0x2eaf
 	.8byte	.LFB316
 	.8byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d46
+	.4byte	0x9ba6
 	.uleb128 0x45
-	.8byte	.LVL576
-	.4byte	0x6d71
+	.8byte	.LVL553
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL577
-	.4byte	0x2f73
+	.8byte	.LVL554
+	.4byte	0x2f5e
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2e1a
+	.uleb128 0x6c
+	.4byte	0x6b48
+	.8byte	.LFB240
+	.8byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9c75
+	.uleb128 0x47
+	.4byte	0x6b54
+	.4byte	.LLST175
+	.uleb128 0x47
+	.4byte	0x6b5f
+	.4byte	.LLST176
+	.uleb128 0x76
+	.4byte	0x6b83
+	.8byte	.LBB241
+	.8byte	.LBE241-.LBB241
+	.byte	0x2
+	.byte	0x65
+	.uleb128 0x74
+	.8byte	.LBB243
+	.8byte	.LBE243-.LBB243
+	.uleb128 0x47
+	.4byte	0x6b5f
+	.4byte	.LLST177
+	.uleb128 0x47
+	.4byte	0x6b54
+	.4byte	.LLST178
+	.uleb128 0x74
+	.8byte	.LBB244
+	.8byte	.LBE244-.LBB244
+	.uleb128 0x6f
+	.4byte	0x6b6b
+	.4byte	.LLST179
+	.uleb128 0x74
+	.8byte	.LBB245
+	.8byte	.LBE245-.LBB245
+	.uleb128 0x6f
+	.4byte	0x6b75
+	.4byte	.LLST180
+	.uleb128 0x34
+	.8byte	.LVL658
+	.4byte	0x6d33
+	.4byte	0x9c59
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL661
+	.4byte	0x270c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.4byte	0x62e8
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9d48
+	.uleb128 0x47
+	.4byte	0x62f9
+	.4byte	.LLST193
+	.uleb128 0x6f
+	.4byte	0x6305
+	.4byte	.LLST194
+	.uleb128 0x6f
+	.4byte	0x6311
+	.4byte	.LLST195
+	.uleb128 0x70
+	.4byte	0x631d
+	.uleb128 0x63
+	.8byte	.LBB258
+	.8byte	.LBE258-.LBB258
+	.4byte	0x9d1f
+	.uleb128 0x47
+	.4byte	0x62f9
+	.4byte	.LLST196
+	.uleb128 0x74
+	.8byte	.LBB259
+	.8byte	.LBE259-.LBB259
+	.uleb128 0x70
+	.4byte	0x9c99
+	.uleb128 0x70
+	.4byte	0x9ca2
+	.uleb128 0x70
+	.4byte	0x9cab
+	.uleb128 0x36
+	.8byte	.LVL736
+	.4byte	0xa94f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR116
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x245
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL733
+	.4byte	0x6976
+	.uleb128 0x36
+	.8byte	.LVL734
+	.4byte	0xa94f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC84
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.4byte	0x2e05
 	.8byte	.LFB318
 	.8byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9e40
+	.4byte	0x9e42
 	.uleb128 0x75
-	.4byte	0x2e2b
+	.4byte	0x2e16
 	.byte	0
-	.uleb128 0x71
-	.4byte	0x2e37
-	.uleb128 0x71
-	.4byte	0x2e41
-	.uleb128 0x71
-	.4byte	0x2e4d
+	.uleb128 0x70
+	.4byte	0x2e22
+	.uleb128 0x70
+	.4byte	0x2e2c
+	.uleb128 0x70
+	.4byte	0x2e38
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x130
-	.4byte	0x9e15
-	.uleb128 0x71
-	.4byte	0x9d61
+	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	0x9e17
 	.uleb128 0x70
-	.4byte	0x9d67
-	.4byte	.LLST253
-	.uleb128 0x72
-	.4byte	0x9d6c
+	.4byte	0x9d63
+	.uleb128 0x6f
+	.4byte	0x9d69
+	.4byte	.LLST252
+	.uleb128 0x71
+	.4byte	0x9d6e
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x72
-	.4byte	0x9d71
+	.uleb128 0x71
+	.4byte	0x9d73
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x63
-	.8byte	.LBB234
-	.8byte	.LBE234-.LBB234
-	.4byte	0x9dfa
-	.uleb128 0x72
-	.4byte	0x2e5e
+	.8byte	.LBB269
+	.8byte	.LBE269-.LBB269
+	.4byte	0x9dfc
+	.uleb128 0x71
+	.4byte	0x2e49
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x34
-	.8byte	.LVL968
-	.4byte	0x29a4
-	.4byte	0x9ddf
+	.8byte	.LVL970
+	.4byte	0x298f
+	.4byte	0x9de1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40458,15 +40459,15 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL969
-	.4byte	0x6d71
+	.8byte	.LVL971
+	.4byte	0x6d33
 	.uleb128 0x45
-	.8byte	.LVL970
-	.4byte	0x2f73
+	.8byte	.LVL972
+	.4byte	0x2f5e
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL967
-	.4byte	0x5c36
+	.8byte	.LVL969
+	.4byte	0x5c1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40480,11 +40481,11 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x68
-	.8byte	.LBB241
-	.8byte	.LBE241-.LBB241
-	.uleb128 0x72
-	.4byte	0x2e6c
+	.uleb128 0x74
+	.8byte	.LBB276
+	.8byte	.LBE276-.LBB276
+	.uleb128 0x71
+	.4byte	0x2e57
 	.uleb128 0x12
 	.byte	0x40
 	.byte	0x45
@@ -40499,51 +40500,51 @@ __func__.7632:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x26cd
+	.uleb128 0x6c
+	.4byte	0x26b8
 	.8byte	.LFB344
 	.8byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9f74
+	.4byte	0x9f76
 	.uleb128 0x47
-	.4byte	0x26dd
-	.4byte	.LLST299
+	.4byte	0x26c8
+	.4byte	.LLST298
 	.uleb128 0x75
-	.4byte	0x26e8
+	.4byte	0x26d3
 	.byte	0
-	.uleb128 0x71
-	.4byte	0x26f3
-	.uleb128 0x71
-	.4byte	0x26fe
-	.uleb128 0x68
-	.8byte	.LBB246
-	.8byte	.LBE246-.LBB246
+	.uleb128 0x70
+	.4byte	0x26de
+	.uleb128 0x70
+	.4byte	0x26e9
+	.uleb128 0x74
+	.8byte	.LBB281
+	.8byte	.LBE281-.LBB281
 	.uleb128 0x47
-	.4byte	0x26dd
-	.4byte	.LLST300
-	.uleb128 0x68
-	.8byte	.LBB247
-	.8byte	.LBE247-.LBB247
+	.4byte	0x26c8
+	.4byte	.LLST299
+	.uleb128 0x74
+	.8byte	.LBB282
+	.8byte	.LBE282-.LBB282
+	.uleb128 0x70
+	.4byte	0x9e66
 	.uleb128 0x71
-	.4byte	0x9e64
-	.uleb128 0x72
-	.4byte	0x9e6a
+	.4byte	0x9e6c
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
-	.uleb128 0x72
-	.4byte	0x9e6f
+	.uleb128 0x71
+	.4byte	0x9e71
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x76
-	.4byte	0x2709
+	.uleb128 0x77
+	.4byte	0x26f4
 	.8byte	.LDL1
 	.uleb128 0x34
-	.8byte	.LVL1220
-	.4byte	0x259f
-	.4byte	0x9ee7
+	.8byte	.LVL1222
+	.4byte	0x258a
+	.4byte	0x9ee9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40564,9 +40565,9 @@ __func__.7632:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1222
-	.4byte	0x259f
-	.4byte	0x9f0a
+	.8byte	.LVL1224
+	.4byte	0x258a
+	.4byte	0x9f0c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40586,9 +40587,9 @@ __func__.7632:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1223
-	.4byte	0x2721
-	.4byte	0x9f2c
+	.8byte	.LVL1225
+	.4byte	0x270c
+	.4byte	0x9f2e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40607,9 +40608,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1224
-	.4byte	0x27e7
-	.4byte	0x9f53
+	.8byte	.LVL1226
+	.4byte	0x27d2
+	.4byte	0x9f55
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40633,8 +40634,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1226
-	.4byte	0x2721
+	.8byte	.LVL1228
+	.4byte	0x270c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40655,51 +40656,51 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2e7a
+	.uleb128 0x6c
+	.4byte	0x2e65
 	.8byte	.LFB317
 	.8byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa04d
+	.4byte	0xa04f
 	.uleb128 0x47
-	.4byte	0x2e8b
-	.4byte	.LLST320
-	.uleb128 0x71
-	.4byte	0x2e97
-	.uleb128 0x71
-	.4byte	0x2ea3
-	.uleb128 0x71
-	.4byte	0x2ead
-	.uleb128 0x71
-	.4byte	0x2eb7
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1b0
-	.uleb128 0x6f
-	.4byte	0x2e8b
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1b0
+	.4byte	0x2e76
+	.4byte	.LLST319
 	.uleb128 0x70
-	.4byte	0x9f98
-	.4byte	.LLST321
+	.4byte	0x2e82
+	.uleb128 0x70
+	.4byte	0x2e8e
+	.uleb128 0x70
+	.4byte	0x2e98
+	.uleb128 0x70
+	.4byte	0x2ea2
 	.uleb128 0x72
-	.4byte	0x9f9d
+	.4byte	.Ldebug_ranges0+0x240
+	.uleb128 0x6e
+	.4byte	0x2e76
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x240
+	.uleb128 0x6f
+	.4byte	0x9f9a
+	.4byte	.LLST320
+	.uleb128 0x71
+	.4byte	0x9f9f
 	.uleb128 0x1
 	.byte	0x64
-	.uleb128 0x70
-	.4byte	0x9fa2
-	.4byte	.LLST322
-	.uleb128 0x72
-	.4byte	0x9fa7
+	.uleb128 0x6f
+	.4byte	0x9fa4
+	.4byte	.LLST321
+	.uleb128 0x71
+	.4byte	0x9fa9
 	.uleb128 0x1
 	.byte	0x6a
 	.uleb128 0x45
-	.8byte	.LVL1313
-	.4byte	0x2ec4
+	.8byte	.LVL1315
+	.4byte	0x2eaf
 	.uleb128 0x34
-	.8byte	.LVL1316
-	.4byte	0x6e0c
-	.4byte	0xa000
+	.8byte	.LVL1318
+	.4byte	0x6dce
+	.4byte	0xa002
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40708,15 +40709,15 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1320
-	.4byte	0xa94d
-	.4byte	0xa025
+	.8byte	.LVL1322
+	.4byte	0xa94f
+	.4byte	0xa027
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC97
+	.8byte	.LC100
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40725,9 +40726,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1321
-	.4byte	0x75ef
-	.4byte	0xa03d
+	.8byte	.LVL1323
+	.4byte	0x75b1
+	.4byte	0xa03f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40736,45 +40737,45 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1322
-	.4byte	0x7342
+	.8byte	.LVL1324
+	.4byte	0x7304
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x37c4
+	.uleb128 0x6c
+	.4byte	0x3795
 	.8byte	.LFB301
 	.8byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa178
+	.4byte	0xa17a
 	.uleb128 0x47
-	.4byte	0x37d5
-	.4byte	.LLST323
-	.uleb128 0x71
-	.4byte	0x37e1
+	.4byte	0x37a6
+	.4byte	.LLST322
+	.uleb128 0x70
+	.4byte	0x37b2
 	.uleb128 0x63
-	.8byte	.LBB260
-	.8byte	.LBE260-.LBB260
-	.4byte	0xa163
+	.8byte	.LBB295
+	.8byte	.LBE295-.LBB295
+	.4byte	0xa165
 	.uleb128 0x47
-	.4byte	0x37d5
-	.4byte	.LLST324
-	.uleb128 0x68
-	.8byte	.LBB261
-	.8byte	.LBE261-.LBB261
-	.uleb128 0x71
-	.4byte	0xa071
+	.4byte	0x37a6
+	.4byte	.LLST323
+	.uleb128 0x74
+	.8byte	.LBB296
+	.8byte	.LBE296-.LBB296
+	.uleb128 0x70
+	.4byte	0xa073
 	.uleb128 0x34
-	.8byte	.LVL1331
-	.4byte	0x6761
-	.4byte	0xa0cf
+	.8byte	.LVL1333
+	.4byte	0x6747
+	.4byte	0xa0d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR42
+	.8byte	.LANCHOR41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40783,9 +40784,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1332
-	.4byte	0xa94d
-	.4byte	0xa102
+	.8byte	.LVL1334
+	.4byte	0xa94f
+	.4byte	0xa104
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40797,18 +40798,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR159
+	.8byte	.LANCHOR158
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa88
+	.2byte	0xabb
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1333
-	.4byte	0x3d92
-	.4byte	0xa11a
+	.8byte	.LVL1335
+	.4byte	0x3d63
+	.4byte	0xa11c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40817,9 +40818,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1334
-	.4byte	0x2e7a
-	.4byte	0xa132
+	.8byte	.LVL1336
+	.4byte	0x2e65
+	.4byte	0xa134
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40828,8 +40829,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1335
-	.4byte	0xa94d
+	.8byte	.LVL1337
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40841,19 +40842,19 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR159
+	.8byte	.LANCHOR158
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0xa8b
+	.2byte	0xabe
 	.byte	0
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1338
-	.4byte	0x65c5
+	.8byte	.LVL1340
+	.4byte	0x65ab
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40862,38 +40863,38 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5843
+	.uleb128 0x6c
+	.4byte	0x5829
 	.8byte	.LFB268
 	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa271
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x1f0
-	.uleb128 0x70
-	.4byte	0x5851
-	.4byte	.LLST327
+	.4byte	0xa273
 	.uleb128 0x72
-	.4byte	0x585d
+	.4byte	.Ldebug_ranges0+0x280
+	.uleb128 0x6f
+	.4byte	0x5837
+	.4byte	.LLST326
+	.uleb128 0x71
+	.4byte	0x5843
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x70
-	.4byte	0x5869
-	.4byte	.LLST328
-	.uleb128 0x72
-	.4byte	0x5875
+	.uleb128 0x6f
+	.4byte	0x584f
+	.4byte	.LLST327
+	.uleb128 0x71
+	.4byte	0x585b
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x70
-	.4byte	0x5881
-	.4byte	.LLST329
+	.uleb128 0x6f
+	.4byte	0x5867
+	.4byte	.LLST328
 	.uleb128 0x34
-	.8byte	.LVL1351
-	.4byte	0x5c36
-	.4byte	0xa1e7
+	.8byte	.LVL1353
+	.4byte	0x5c1c
+	.4byte	0xa1e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40913,9 +40914,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1353
-	.4byte	0x29a4
-	.4byte	0xa20a
+	.8byte	.LVL1355
+	.4byte	0x298f
+	.4byte	0xa20c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40934,9 +40935,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1357
-	.4byte	0x259f
-	.4byte	0xa222
+	.8byte	.LVL1359
+	.4byte	0x258a
+	.4byte	0xa224
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40945,9 +40946,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1359
-	.4byte	0x3804
-	.4byte	0xa23a
+	.8byte	.LVL1361
+	.4byte	0x37d5
+	.4byte	0xa23c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40956,9 +40957,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1360
-	.4byte	0x27e7
-	.4byte	0xa262
+	.8byte	.LVL1362
+	.4byte	0x27d2
+	.4byte	0xa264
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40982,20 +40983,20 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1361
-	.4byte	0x36c0
+	.8byte	.LVL1363
+	.4byte	0x3691
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x44bf
+	.uleb128 0x6c
+	.4byte	0x44a0
 	.8byte	.LFB286
 	.8byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa2b2
+	.4byte	0xa2b4
 	.uleb128 0x2f
-	.8byte	.LVL1621
-	.4byte	0x5af8
+	.8byte	.LVL1623
+	.4byte	0x5ade
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41011,20 +41012,20 @@ __func__.7632:
 	.byte	0x52
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR83
+	.8byte	.LANCHOR81
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x5439
+	.uleb128 0x6c
+	.4byte	0x541a
 	.8byte	.LFB271
 	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa325
+	.4byte	0xa327
 	.uleb128 0x34
-	.8byte	.LVL1658
-	.4byte	0x59d0
-	.4byte	0xa2e5
+	.8byte	.LVL1660
+	.4byte	0x59b6
+	.4byte	0xa2e7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41033,9 +41034,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1659
-	.4byte	0xa94d
-	.4byte	0xa311
+	.8byte	.LVL1661
+	.4byte	0xa94f
+	.4byte	0xa313
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41047,11 +41048,11 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC100
+	.8byte	.LC103
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1660
-	.4byte	0x259f
+	.8byte	.LVL1662
+	.4byte	0x258a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41059,17 +41060,17 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x313f
+	.uleb128 0x6c
+	.4byte	0x311d
 	.8byte	.LFB311
 	.8byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa38b
+	.4byte	0xa38d
 	.uleb128 0x34
-	.8byte	.LVL1801
-	.4byte	0x3148
-	.4byte	0xa358
+	.8byte	.LVL1799
+	.4byte	0x3126
+	.4byte	0xa35a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41078,9 +41079,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1802
-	.4byte	0x588f
-	.4byte	0xa377
+	.8byte	.LVL1800
+	.4byte	0x5875
+	.4byte	0xa379
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41089,8 +41090,8 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1803
-	.4byte	0x3320
+	.8byte	.LVL1801
+	.4byte	0x32fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41098,103 +41099,103 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x2d32
+	.uleb128 0x6c
+	.4byte	0x2d1d
 	.8byte	.LFB319
 	.8byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa74d
+	.4byte	0xa742
 	.uleb128 0x47
-	.4byte	0x2d43
-	.4byte	.LLST413
+	.4byte	0x2d2e
+	.4byte	.LLST412
 	.uleb128 0x47
-	.4byte	0x2d4f
-	.4byte	.LLST414
+	.4byte	0x2d3a
+	.4byte	.LLST413
 	.uleb128 0x75
-	.4byte	0x2d5b
+	.4byte	0x2d46
 	.byte	0x1
-	.uleb128 0x71
-	.4byte	0x2d67
-	.uleb128 0x71
-	.4byte	0x2d73
-	.uleb128 0x77
-	.4byte	0x2d7f
+	.uleb128 0x70
+	.4byte	0x2d52
+	.uleb128 0x70
+	.4byte	0x2d5e
+	.uleb128 0x78
+	.4byte	0x2d6a
 	.sleb128 -1
-	.uleb128 0x71
-	.4byte	0x2d8b
-	.uleb128 0x71
-	.4byte	0x2d97
-	.uleb128 0x71
-	.4byte	0x2da3
-	.uleb128 0x71
-	.4byte	0x2daf
-	.uleb128 0x71
-	.4byte	0x2dbb
-	.uleb128 0x71
-	.4byte	0x2dc7
-	.uleb128 0x71
-	.4byte	0x2de3
+	.uleb128 0x70
+	.4byte	0x2d76
+	.uleb128 0x70
+	.4byte	0x2d82
+	.uleb128 0x70
+	.4byte	0x2d8e
+	.uleb128 0x70
+	.4byte	0x2d9a
+	.uleb128 0x70
+	.4byte	0x2da6
+	.uleb128 0x70
+	.4byte	0x2db2
+	.uleb128 0x70
+	.4byte	0x2dce
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2a0
-	.4byte	0xa739
+	.4byte	.Ldebug_ranges0+0x330
+	.4byte	0xa72e
 	.uleb128 0x47
-	.4byte	0x2d4f
-	.4byte	.LLST415
+	.4byte	0x2d3a
+	.4byte	.LLST414
 	.uleb128 0x47
-	.4byte	0x2d43
+	.4byte	0x2d2e
+	.4byte	.LLST415
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x330
+	.uleb128 0x70
+	.4byte	0xa3ba
+	.uleb128 0x6f
+	.4byte	0xa3c0
 	.4byte	.LLST416
-	.uleb128 0x73
-	.4byte	.Ldebug_ranges0+0x2a0
 	.uleb128 0x71
-	.4byte	0xa3b8
-	.uleb128 0x70
-	.4byte	0xa3be
-	.4byte	.LLST417
-	.uleb128 0x72
-	.4byte	0xa3c3
+	.4byte	0xa3c5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x71
-	.4byte	0xa3c8
 	.uleb128 0x70
-	.4byte	0xa3ce
+	.4byte	0xa3ca
+	.uleb128 0x6f
+	.4byte	0xa3d0
+	.4byte	.LLST417
+	.uleb128 0x6f
+	.4byte	0xa3d5
 	.4byte	.LLST418
-	.uleb128 0x70
-	.4byte	0xa3d3
+	.uleb128 0x6f
+	.4byte	0xa3da
 	.4byte	.LLST419
-	.uleb128 0x70
-	.4byte	0xa3d8
+	.uleb128 0x6f
+	.4byte	0xa3df
 	.4byte	.LLST420
-	.uleb128 0x70
-	.4byte	0xa3dd
+	.uleb128 0x6f
+	.4byte	0xa3e4
 	.4byte	.LLST421
-	.uleb128 0x70
-	.4byte	0xa3e2
+	.uleb128 0x6f
+	.4byte	0xa3e9
 	.4byte	.LLST422
+	.uleb128 0x79
+	.4byte	0x2dbe
+	.uleb128 0x79
+	.4byte	0x2dc6
 	.uleb128 0x70
-	.4byte	0xa3e7
-	.4byte	.LLST423
-	.uleb128 0x78
-	.4byte	0x2dd3
-	.uleb128 0x78
-	.4byte	0x2ddb
-	.uleb128 0x71
-	.4byte	0xa3ec
+	.4byte	0xa3ee
 	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0xa4ee
-	.uleb128 0x70
-	.4byte	0x2df1
-	.4byte	.LLST424
+	.4byte	.Ldebug_ranges0+0x360
+	.4byte	0xa4f0
+	.uleb128 0x6f
+	.4byte	0x2ddc
+	.4byte	.LLST423
 	.uleb128 0x45
-	.8byte	.LVL1836
-	.4byte	0x3db0
+	.8byte	.LVL1833
+	.4byte	0x3d81
 	.uleb128 0x34
-	.8byte	.LVL1839
-	.4byte	0x6644
-	.4byte	0xa4a8
+	.8byte	.LVL1836
+	.4byte	0x662a
+	.4byte	0xa4aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41203,9 +41204,9 @@ __func__.7632:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1842
-	.4byte	0x6644
-	.4byte	0xa4bf
+	.8byte	.LVL1839
+	.4byte	0x662a
+	.4byte	0xa4c1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41213,17 +41214,17 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1845
-	.4byte	0x2ec4
+	.8byte	.LVL1842
+	.4byte	0x2eaf
 	.uleb128 0x36
-	.8byte	.LVL1854
-	.4byte	0xa94d
+	.8byte	.LVL1851
+	.4byte	0xa94f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LC104
+	.8byte	.LC107
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41233,12 +41234,12 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1866
-	.4byte	0x35af
+	.8byte	.LVL1863
+	.4byte	0x3580
 	.uleb128 0x34
-	.8byte	.LVL1867
-	.4byte	0x460e
-	.4byte	0xa513
+	.8byte	.LVL1864
+	.4byte	0x45ef
+	.4byte	0xa515
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41247,9 +41248,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1869
-	.4byte	0x6644
-	.4byte	0xa52b
+	.8byte	.LVL1866
+	.4byte	0x662a
+	.4byte	0xa52d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41258,12 +41259,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1874
-	.4byte	0x2e1a
+	.8byte	.LVL1871
+	.4byte	0x2e05
 	.uleb128 0x34
-	.8byte	.LVL1876
-	.4byte	0x6644
-	.4byte	0xa54f
+	.8byte	.LVL1873
+	.4byte	0x662a
+	.4byte	0xa551
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41271,9 +41272,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1878
-	.4byte	0x36c0
-	.4byte	0xa567
+	.8byte	.LVL1875
+	.4byte	0x3691
+	.4byte	0xa569
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41282,9 +41283,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1883
-	.4byte	0x35af
-	.4byte	0xa57f
+	.8byte	.LVL1880
+	.4byte	0x3580
+	.4byte	0xa581
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41293,9 +41294,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1884
-	.4byte	0x36c0
-	.4byte	0xa597
+	.8byte	.LVL1881
+	.4byte	0x3691
+	.4byte	0xa599
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41304,9 +41305,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1885
-	.4byte	0xa94d
-	.4byte	0xa5ca
+	.8byte	.LVL1882
+	.4byte	0xa94f
+	.4byte	0xa5cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41318,18 +41319,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x296
+	.2byte	0x292
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1886
-	.4byte	0xa94d
-	.4byte	0xa5fd
+	.8byte	.LVL1883
+	.4byte	0xa94f
+	.4byte	0xa5ff
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41341,18 +41342,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x297
+	.2byte	0x293
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1887
-	.4byte	0xa94d
-	.4byte	0xa630
+	.8byte	.LVL1884
+	.4byte	0xa94f
+	.4byte	0xa632
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41364,18 +41365,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x298
+	.2byte	0x294
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1888
-	.4byte	0x460e
-	.4byte	0xa648
+	.8byte	.LVL1885
+	.4byte	0x45ef
+	.4byte	0xa64a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41384,12 +41385,12 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1889
-	.4byte	0x2e1a
+	.8byte	.LVL1886
+	.4byte	0x2e05
 	.uleb128 0x34
-	.8byte	.LVL1903
-	.4byte	0x29a4
-	.4byte	0xa66d
+	.8byte	.LVL1900
+	.4byte	0x298f
+	.4byte	0xa66f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41398,9 +41399,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1912
-	.4byte	0xa94d
-	.4byte	0xa6a0
+	.8byte	.LVL1909
+	.4byte	0xa94f
+	.4byte	0xa6a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41412,18 +41413,18 @@ __func__.7632:
 	.byte	0x51
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	.LANCHOR177
+	.8byte	.LANCHOR175
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x3
 	.byte	0xa
-	.2byte	0x2bc
+	.2byte	0x2b8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1914
-	.4byte	0x5c36
-	.4byte	0xa6be
+	.8byte	.LVL1911
+	.4byte	0x5c1c
+	.4byte	0xa6c0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41437,12 +41438,12 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1915
-	.4byte	0x308d
+	.8byte	.LVL1912
+	.4byte	0x3078
 	.uleb128 0x34
-	.8byte	.LVL1916
-	.4byte	0x35ed
-	.4byte	0xa6e9
+	.8byte	.LVL1913
+	.4byte	0x35be
+	.4byte	0xa6eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41457,28 +41458,25 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1917
-	.4byte	0x2fc7
-	.uleb128 0x45
-	.8byte	.LVL1921
-	.4byte	0x2fc7
+	.8byte	.LVL1914
+	.4byte	0x2fb2
 	.uleb128 0x45
-	.8byte	.LVL1922
-	.4byte	0x37c4
+	.8byte	.LVL1918
+	.4byte	0x2fb2
 	.uleb128 0x45
-	.8byte	.LVL1923
-	.4byte	0x7d59
+	.8byte	.LVL1919
+	.4byte	0x3795
 	.uleb128 0x45
-	.8byte	.LVL1924
-	.4byte	0x5d63
+	.8byte	.LVL1920
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL1925
-	.4byte	0x5694
+	.8byte	.LVL1921
+	.4byte	0x567a
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1849
-	.4byte	0x3320
+	.8byte	.LVL1846
+	.4byte	0x32fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41486,34 +41484,34 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
-	.4byte	0x3f98
+	.uleb128 0x6c
+	.4byte	0x3f79
 	.8byte	.LFB292
 	.8byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa92a
+	.4byte	0xa92c
 	.uleb128 0x75
-	.4byte	0x3fa9
+	.4byte	0x3f8a
 	.byte	0
 	.uleb128 0x63
-	.8byte	.LBB304
-	.8byte	.LBE304-.LBB304
-	.4byte	0xa894
-	.uleb128 0x71
-	.4byte	0xa768
-	.uleb128 0x63
-	.8byte	.LBB305
-	.8byte	.LBE305-.LBB305
-	.4byte	0xa7a7
+	.8byte	.LBB339
+	.8byte	.LBE339-.LBB339
+	.4byte	0xa896
 	.uleb128 0x70
-	.4byte	0x3fb4
-	.4byte	.LLST464
+	.4byte	0xa75d
+	.uleb128 0x63
+	.8byte	.LBB340
+	.8byte	.LBE340-.LBB340
+	.4byte	0xa79c
+	.uleb128 0x6f
+	.4byte	0x3f95
+	.4byte	.LLST463
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2106
-	.4byte	0x43a6
-	.4byte	0xa7bf
+	.8byte	.LVL2086
+	.4byte	0x4387
+	.4byte	0xa7b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41522,9 +41520,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2107
-	.4byte	0x43a6
-	.4byte	0xa7d7
+	.8byte	.LVL2087
+	.4byte	0x4387
+	.4byte	0xa7cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41533,9 +41531,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2109
-	.4byte	0x588f
-	.4byte	0xa7f6
+	.8byte	.LVL2089
+	.4byte	0x5875
+	.4byte	0xa7eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41544,9 +41542,9 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2110
-	.4byte	0x588f
-	.4byte	0xa815
+	.8byte	.LVL2090
+	.4byte	0x5875
+	.4byte	0xa80a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41555,24 +41553,24 @@ __func__.7632:
 	.8byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2111
-	.4byte	0x5d63
+	.8byte	.LVL2091
+	.4byte	0x5d49
 	.uleb128 0x45
-	.8byte	.LVL2112
-	.4byte	0x5694
+	.8byte	.LVL2092
+	.4byte	0x567a
 	.uleb128 0x45
-	.8byte	.LVL2113
-	.4byte	0x5694
+	.8byte	.LVL2093
+	.4byte	0x567a
 	.uleb128 0x45
-	.8byte	.LVL2117
-	.4byte	0x2f73
+	.8byte	.LVL2094
+	.4byte	0x2f5e
 	.uleb128 0x45
-	.8byte	.LVL2118
-	.4byte	0x2f73
+	.8byte	.LVL2095
+	.4byte	0x2f5e
 	.uleb128 0x34
-	.8byte	.LVL2119
-	.4byte	0x3932
-	.4byte	0xa86e
+	.8byte	.LVL2096
+	.4byte	0x3903
+	.4byte	0xa863
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41581,9 +41579,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2120
-	.4byte	0x3932
-	.4byte	0xa886
+	.8byte	.LVL2097
+	.4byte	0x3903
+	.4byte	0xa87b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41592,42 +41590,45 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2121
-	.4byte	0x425d
+	.8byte	.LVL2098
+	.4byte	0x423e
+	.uleb128 0x45
+	.8byte	.LVL2102
+	.4byte	0x5d49
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2093
-	.4byte	0x6bd9
+	.8byte	.LVL2073
+	.4byte	0x6b9b
 	.uleb128 0x45
-	.8byte	.LVL2094
-	.4byte	0x5446
+	.8byte	.LVL2074
+	.4byte	0x5427
 	.uleb128 0x45
-	.8byte	.LVL2095
-	.4byte	0x5201
+	.8byte	.LVL2075
+	.4byte	0x51e2
 	.uleb128 0x45
-	.8byte	.LVL2096
-	.4byte	0x4f40
+	.8byte	.LVL2076
+	.4byte	0x4f21
 	.uleb128 0x45
-	.8byte	.LVL2097
-	.4byte	0x4fe5
+	.8byte	.LVL2077
+	.4byte	0x4fc6
 	.uleb128 0x45
-	.8byte	.LVL2098
-	.4byte	0x445e
+	.8byte	.LVL2078
+	.4byte	0x443f
 	.uleb128 0x45
-	.8byte	.LVL2099
-	.4byte	0x5439
+	.8byte	.LVL2079
+	.4byte	0x541a
 	.uleb128 0x45
-	.8byte	.LVL2100
-	.4byte	0x6a65
+	.8byte	.LVL2080
+	.4byte	0x6ade
 	.uleb128 0x45
-	.8byte	.LVL2101
-	.4byte	0x44c8
+	.8byte	.LVL2081
+	.4byte	0x44a9
 	.uleb128 0x45
-	.8byte	.LVL2102
-	.4byte	0x46c6
+	.8byte	.LVL2082
+	.4byte	0x46a7
 	.uleb128 0x36
-	.8byte	.LVL2103
-	.4byte	0x5944
+	.8byte	.LVL2083
+	.4byte	0x592a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41635,39 +41636,39 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x79
-	.4byte	.LASF875
-	.4byte	.LASF875
+	.uleb128 0x7a
+	.4byte	.LASF873
+	.4byte	.LASF873
 	.byte	0xb
 	.byte	0x72
-	.uleb128 0x7a
-	.4byte	.LASF876
-	.4byte	.LASF876
+	.uleb128 0x7b
+	.4byte	.LASF874
+	.4byte	.LASF874
 	.byte	0x1c
 	.2byte	0x16d
-	.uleb128 0x7a
-	.4byte	.LASF877
-	.4byte	.LASF877
+	.uleb128 0x7b
+	.4byte	.LASF875
+	.4byte	.LASF875
 	.byte	0x1c
 	.2byte	0x16c
-	.uleb128 0x79
-	.4byte	.LASF878
-	.4byte	.LASF878
+	.uleb128 0x7a
+	.4byte	.LASF876
+	.4byte	.LASF876
 	.byte	0x1d
 	.byte	0x12
-	.uleb128 0x79
-	.4byte	.LASF879
-	.4byte	.LASF879
+	.uleb128 0x7a
+	.4byte	.LASF877
+	.4byte	.LASF877
 	.byte	0x6
 	.byte	0x35
-	.uleb128 0x7a
-	.4byte	.LASF880
-	.4byte	.LASF880
+	.uleb128 0x7b
+	.4byte	.LASF878
+	.4byte	.LASF878
 	.byte	0x1c
 	.2byte	0x399
-	.uleb128 0x79
-	.4byte	.LASF881
-	.4byte	.LASF881
+	.uleb128 0x7a
+	.4byte	.LASF879
+	.4byte	.LASF879
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -43077,18 +43078,16 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x66
-	.uleb128 0x1d
+	.uleb128 0xa
 	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.uleb128 0x58
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
 	.uleb128 0xb
-	.uleb128 0x59
+	.uleb128 0x3b
 	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
 	.byte	0
 	.byte	0
 	.uleb128 0x67
@@ -43107,15 +43106,6 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x68
-	.uleb128 0xb
-	.byte	0x1
-	.uleb128 0x11
-	.uleb128 0x1
-	.uleb128 0x12
-	.uleb128 0x7
-	.byte	0
-	.byte	0
-	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43134,7 +43124,7 @@ __func__.7632:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x69
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43145,7 +43135,7 @@ __func__.7632:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43162,7 +43152,7 @@ __func__.7632:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43187,7 +43177,7 @@ __func__.7632:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43204,7 +43194,7 @@ __func__.7632:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x6d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43213,14 +43203,14 @@ __func__.7632:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x6e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x6f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43229,14 +43219,14 @@ __func__.7632:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x71
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43245,14 +43235,14 @@ __func__.7632:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x72
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x73
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43267,6 +43257,15 @@ __func__.7632:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
+	.uleb128 0x74
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
 	.uleb128 0x75
 	.uleb128 0x34
 	.byte	0
@@ -43277,15 +43276,30 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x76
-	.uleb128 0xa
+	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.uleb128 0x11
 	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
 	.byte	0
 	.byte	0
 	.uleb128 0x77
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x78
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43294,14 +43308,14 @@ __func__.7632:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x79
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x79
+	.uleb128 0x7a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43318,7 +43332,7 @@ __func__.7632:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x7a
+	.uleb128 0x7b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43338,12 +43352,12 @@ __func__.7632:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST470:
-	.8byte	.LVL2174
-	.8byte	.LVL2175-1
+.LLST469:
+	.8byte	.LVL2155
+	.8byte	.LVL2156-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2175-1
+	.8byte	.LVL2156-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43352,12 +43366,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST471:
-	.8byte	.LVL2174
-	.8byte	.LVL2175-1
+.LLST470:
+	.8byte	.LVL2155
+	.8byte	.LVL2156-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2175-1
+	.8byte	.LVL2156-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43366,12 +43380,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST472:
-	.8byte	.LVL2174
-	.8byte	.LVL2175-1
+.LLST471:
+	.8byte	.LVL2155
+	.8byte	.LVL2156-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2175-1
+	.8byte	.LVL2156-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43380,12 +43394,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST305:
-	.8byte	.LVL1242
-	.8byte	.LVL1243-1
+.LLST304:
+	.8byte	.LVL1244
+	.8byte	.LVL1245-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1243-1
+	.8byte	.LVL1245-1
 	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
@@ -43394,12 +43408,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST306:
-	.8byte	.LVL1242
-	.8byte	.LVL1243-1
+.LLST305:
+	.8byte	.LVL1244
+	.8byte	.LVL1245-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1243-1
+	.8byte	.LVL1245-1
 	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
@@ -43408,12 +43422,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST307:
-	.8byte	.LVL1242
-	.8byte	.LVL1243-1
+.LLST306:
+	.8byte	.LVL1244
+	.8byte	.LVL1245-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1243-1
+	.8byte	.LVL1245-1
 	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
@@ -43422,12 +43436,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST198:
-	.8byte	.LVL739
-	.8byte	.LVL740-1
+.LLST197:
+	.8byte	.LVL741
+	.8byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL740-1
+	.8byte	.LVL742-1
 	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -43436,12 +43450,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST199:
-	.8byte	.LVL739
-	.8byte	.LVL740-1
+.LLST198:
+	.8byte	.LVL741
+	.8byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL740-1
+	.8byte	.LVL742-1
 	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -43450,12 +43464,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST200:
-	.8byte	.LVL739
-	.8byte	.LVL740-1
+.LLST199:
+	.8byte	.LVL741
+	.8byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL740-1
+	.8byte	.LVL742-1
 	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
@@ -43464,89 +43478,89 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST301:
-	.8byte	.LVL1228
-	.8byte	.LVL1230-1
+.LLST300:
+	.8byte	.LVL1230
+	.8byte	.LVL1232-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1230-1
-	.8byte	.LVL1238
+	.8byte	.LVL1232-1
+	.8byte	.LVL1240
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1238
-	.8byte	.LVL1239
+	.8byte	.LVL1240
+	.8byte	.LVL1241
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1239
+	.8byte	.LVL1241
 	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST302:
-	.8byte	.LVL1228
-	.8byte	.LVL1229
+.LLST301:
+	.8byte	.LVL1230
+	.8byte	.LVL1231
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1229
-	.8byte	.LVL1238
+	.8byte	.LVL1231
+	.8byte	.LVL1240
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1238
-	.8byte	.LVL1239
+	.8byte	.LVL1240
+	.8byte	.LVL1241
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1239
+	.8byte	.LVL1241
 	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST303:
-	.8byte	.LVL1232
-	.8byte	.LVL1233
-	.2byte	0x1
-	.byte	0x50
+.LLST302:
 	.8byte	.LVL1234
 	.8byte	.LVL1235
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1236
+	.8byte	.LVL1237
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1235
+	.8byte	.LVL1237
 	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST304:
-	.8byte	.LVL1236
-	.8byte	.LVL1237
-	.2byte	0x1
-	.byte	0x51
+.LLST303:
+	.8byte	.LVL1238
 	.8byte	.LVL1239
-	.8byte	.LVL1240
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1240
 	.8byte	.LVL1241
+	.8byte	.LVL1242
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1242
+	.8byte	.LVL1243
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST177:
-	.8byte	.LVL664
-	.8byte	.LVL668
+.LLST168:
+	.8byte	.LVL641
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL668
+	.8byte	.LVL645
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43555,12 +43569,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST178:
-	.8byte	.LVL664
-	.8byte	.LVL665
+.LLST169:
+	.8byte	.LVL641
+	.8byte	.LVL642
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL665
+	.8byte	.LVL642
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43569,12 +43583,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST179:
-	.8byte	.LVL664
-	.8byte	.LVL666
+.LLST170:
+	.8byte	.LVL641
+	.8byte	.LVL643
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL666
+	.8byte	.LVL643
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43583,35 +43597,35 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST180:
-	.8byte	.LVL667
-	.8byte	.LVL668
+.LLST171:
+	.8byte	.LVL644
+	.8byte	.LVL645
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST181:
-	.8byte	.LVL672
-	.8byte	.LVL673
+.LLST172:
+	.8byte	.LVL649
+	.8byte	.LVL650
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL674
-	.8byte	.LVL675
+	.8byte	.LVL651
+	.8byte	.LVL652
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL676
-	.8byte	.LVL677
+	.8byte	.LVL653
+	.8byte	.LVL654
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST182:
-	.8byte	.LVL664
-	.8byte	.LVL668
+.LLST173:
+	.8byte	.LVL641
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL668
+	.8byte	.LVL645
 	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
@@ -43620,56 +43634,56 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST183:
-	.8byte	.LVL667
-	.8byte	.LVL669
+.LLST174:
+	.8byte	.LVL644
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL670
+	.8byte	.LVL647
 	.8byte	.LFE343
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST169:
-	.8byte	.LVL640
-	.8byte	.LVL645
+.LLST160:
+	.8byte	.LVL617
+	.8byte	.LVL622
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL645
-	.8byte	.LVL646
+	.8byte	.LVL622
+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL646
-	.8byte	.LVL649
+	.8byte	.LVL623
+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL649
-	.8byte	.LVL658
+	.8byte	.LVL626
+	.8byte	.LVL635
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL658
-	.8byte	.LVL663
+	.8byte	.LVL635
+	.8byte	.LVL640
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL663
+	.8byte	.LVL640
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL640
-	.8byte	.LVL641
+.LLST161:
+	.8byte	.LVL617
+	.8byte	.LVL618
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL641
+	.8byte	.LVL618
 	.8byte	.LFE342
 	.2byte	0x4
 	.byte	0xf3
@@ -43678,134 +43692,134 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST171:
-	.8byte	.LVL640
-	.8byte	.LVL642
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+	.8byte	.LVL617
+	.8byte	.LVL619
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL642
-	.8byte	.LVL647
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+	.8byte	.LVL624
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL647
-	.8byte	.LVL649
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+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL649
+	.8byte	.LVL626
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL640
-	.8byte	.LVL643
+.LLST163:
+	.8byte	.LVL617
+	.8byte	.LVL620
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL643
-	.8byte	.LVL646
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+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL646
-	.8byte	.LVL649
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+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL649
-	.8byte	.LVL658
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+	.8byte	.LVL635
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL658
-	.8byte	.LVL663
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 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL663
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 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL644
-	.8byte	.LVL645
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+	.8byte	.LVL621
+	.8byte	.LVL622
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL652
-	.8byte	.LVL653
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+	.8byte	.LVL629
+	.8byte	.LVL630
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL654
-	.8byte	.LVL655
+	.8byte	.LVL631
+	.8byte	.LVL632
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL656
-	.8byte	.LVL657
+	.8byte	.LVL633
+	.8byte	.LVL634
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL644
-	.8byte	.LVL648
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+	.8byte	.LVL621
+	.8byte	.LVL625
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL649
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 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL644
-	.8byte	.LVL645
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+	.8byte	.LVL621
+	.8byte	.LVL622
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL645
-	.8byte	.LVL646
+	.8byte	.LVL622
+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL646
-	.8byte	.LVL649
+	.8byte	.LVL623
+	.8byte	.LVL626
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL649
-	.8byte	.LVL658
+	.8byte	.LVL626
+	.8byte	.LVL635
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL658
-	.8byte	.LVL663
+	.8byte	.LVL635
+	.8byte	.LVL640
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL663
+	.8byte	.LVL640
 	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL597
-	.8byte	.LVL601
+.LLST145:
+	.8byte	.LVL574
+	.8byte	.LVL578
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL601
+	.8byte	.LVL578
 	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -43814,12 +43828,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST155:
-	.8byte	.LVL597
-	.8byte	.LVL599
+.LLST146:
+	.8byte	.LVL574
+	.8byte	.LVL576
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL599
+	.8byte	.LVL576
 	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -43828,12 +43842,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST156:
-	.8byte	.LVL597
-	.8byte	.LVL598
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+	.8byte	.LVL574
+	.8byte	.LVL575
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL598
+	.8byte	.LVL575
 	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
@@ -43842,252 +43856,252 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST157:
-	.8byte	.LVL600
-	.8byte	.LVL601
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+	.8byte	.LVL577
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 	.2byte	0x2
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 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL606
-	.8byte	.LVL607
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+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL607
-	.8byte	.LVL608-1
+	.8byte	.LVL584
+	.8byte	.LVL585-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 0
-	.8byte	.LVL608
-	.8byte	.LVL609
+	.8byte	.LVL585
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL600
-	.8byte	.LVL602
+.LLST150:
+	.8byte	.LVL577
+	.8byte	.LVL579
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL603
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 	.8byte	.LFE341
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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+	.8byte	.LVL559
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 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL584
-	.8byte	.LVL588
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+	.8byte	.LVL565
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL588
-	.8byte	.LVL589
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 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL589
+	.8byte	.LVL566
 	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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 	.2byte	0x1
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 	.byte	0x66
-	.8byte	.LVL586
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 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
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-	.8byte	.LVL589
+	.8byte	.LVL566
 	.8byte	.LFE339
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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 	.2byte	0x1
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 	.byte	0x67
-	.8byte	.LVL587
-	.8byte	.LVL589
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 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
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-	.8byte	.LVL589
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 	.8byte	.LFE339
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL582
-	.8byte	.LVL584
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 	.2byte	0x1
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 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL589
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 	.8byte	0
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-	.8byte	.LVL583
-	.8byte	.LVL584
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-	.8byte	.LVL585
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-	.8byte	.LVL595
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+	.8byte	.LVL572
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 1
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-	.8byte	.LVL596
+	.8byte	.LVL573
 	.8byte	.LFE339
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL583
-	.8byte	.LVL584
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-	.8byte	.LVL583
-	.8byte	.LVL584
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 	.byte	0xf3
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-	.8byte	.LVL584
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 	.byte	0xf3
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 	.byte	0x9f
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+	.8byte	.LVL566
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL583
-	.8byte	.LVL584
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+	.8byte	.LVL561
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 	.byte	0x51
-	.8byte	.LVL584
-	.8byte	.LVL586
+	.8byte	.LVL561
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 	.byte	0x66
-	.8byte	.LVL586
-	.8byte	.LVL589
+	.8byte	.LVL563
+	.8byte	.LVL566
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL589
+	.8byte	.LVL566
 	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL580
-	.8byte	.LVL581-1
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+	.8byte	.LVL557
+	.8byte	.LVL558-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL581-1
+	.8byte	.LVL558-1
 	.8byte	.LFE338
 	.2byte	0x4
 	.byte	0xf3
@@ -44096,12 +44110,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST142:
-	.8byte	.LVL578
-	.8byte	.LVL579-1
+.LLST133:
+	.8byte	.LVL555
+	.8byte	.LVL556-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL579-1
+	.8byte	.LVL556-1
 	.8byte	.LFE337
 	.2byte	0x4
 	.byte	0xf3
@@ -44110,12 +44124,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL578
-	.8byte	.LVL579-1
+.LLST134:
+	.8byte	.LVL555
+	.8byte	.LVL556-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL579-1
+	.8byte	.LVL556-1
 	.8byte	.LFE337
 	.2byte	0x4
 	.byte	0xf3
@@ -44124,16 +44138,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL563
-	.8byte	.LVL564
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+	.8byte	.LVL540
+	.8byte	.LVL541
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL564
-	.8byte	.LVL575
+	.8byte	.LVL541
+	.8byte	.LVL552
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL575
+	.8byte	.LVL552
 	.8byte	.LFE315
 	.2byte	0x4
 	.byte	0xf3
@@ -44142,47 +44156,47 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL569
-	.8byte	.LVL570
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+	.8byte	.LVL546
+	.8byte	.LVL547
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL570
-	.8byte	.LVL571
+	.8byte	.LVL547
+	.8byte	.LVL548
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL572
-	.8byte	.LVL573
+	.8byte	.LVL549
+	.8byte	.LVL550
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL566
-	.8byte	.LVL567
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+	.8byte	.LVL544
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-	.8byte	.LVL567
-	.8byte	.LVL574
+	.8byte	.LVL544
+	.8byte	.LVL551
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-	.8byte	.LVL559
-	.8byte	.LVL560
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+	.8byte	.LVL537
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 	.2byte	0x1
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-	.8byte	.LVL561-1
-	.8byte	.LVL562
+	.8byte	.LVL538-1
+	.8byte	.LVL539
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL562
+	.8byte	.LVL539
 	.8byte	.LFE314
 	.2byte	0x4
 	.byte	0xf3
@@ -44191,37 +44205,37 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST411:
-	.8byte	.LVL1810
-	.8byte	.LVL1811
+.LLST410:
+	.8byte	.LVL1808
+	.8byte	.LVL1809
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1811
-	.8byte	.LVL1812-1
+	.8byte	.LVL1809
+	.8byte	.LVL1810-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1814
-	.8byte	.LVL1815-1
+	.8byte	.LVL1812
+	.8byte	.LVL1813-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1818
-	.8byte	.LVL1822
+	.8byte	.LVL1816
+	.8byte	.LVL1820
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1823
-	.8byte	.LVL1824
+	.8byte	.LVL1821
+	.8byte	.LVL1822
 	.2byte	0x1
 	.byte	0x5b
 	.8byte	0
 	.8byte	0
-.LLST412:
-	.8byte	.LVL1819
-	.8byte	.LVL1820
+.LLST411:
+	.8byte	.LVL1817
+	.8byte	.LVL1818
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1820
-	.8byte	.LVL1821-1
+	.8byte	.LVL1818
+	.8byte	.LVL1819-1
 	.2byte	0x17
 	.byte	0x7b
 	.sleb128 0
@@ -44238,16 +44252,16 @@ __func__.7632:
 	.uleb128 0x10
 	.8byte	0
 	.8byte	0
-.LLST288:
-	.8byte	.LVL1173
-	.8byte	.LVL1174
+.LLST287:
+	.8byte	.LVL1175
+	.8byte	.LVL1176
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1174
-	.8byte	.LVL1214
+	.8byte	.LVL1176
+	.8byte	.LVL1216
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1214
+	.8byte	.LVL1216
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44256,24 +44270,24 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST289:
-	.8byte	.LVL1173
-	.8byte	.LVL1176-1
+.LLST288:
+	.8byte	.LVL1175
+	.8byte	.LVL1178-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1176-1
-	.8byte	.LVL1177
+	.8byte	.LVL1178-1
+	.8byte	.LVL1179
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1177
 	.8byte	.LVL1179
+	.8byte	.LVL1181
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1179
-	.8byte	.LVL1216
+	.8byte	.LVL1181
+	.8byte	.LVL1218
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1216
+	.8byte	.LVL1218
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44282,188 +44296,188 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST290:
-	.8byte	.LVL1190
-	.8byte	.LVL1191
+.LLST289:
+	.8byte	.LVL1192
+	.8byte	.LVL1193
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1191
-	.8byte	.LVL1194
+	.8byte	.LVL1193
+	.8byte	.LVL1196
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 0
-	.8byte	.LVL1194
-	.8byte	.LVL1195
+	.8byte	.LVL1196
+	.8byte	.LVL1197
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
-.LLST291:
-	.8byte	.LVL1182
-	.8byte	.LVL1183
+.LLST290:
+	.8byte	.LVL1184
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1183
-	.8byte	.LVL1184-1
+	.8byte	.LVL1185
+	.8byte	.LVL1186-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1189
-	.8byte	.LVL1192
+	.8byte	.LVL1191
+	.8byte	.LVL1194
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1193
 	.8byte	.LVL1195
+	.8byte	.LVL1197
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST292:
-	.8byte	.LVL1184
-	.8byte	.LVL1185
+.LLST291:
+	.8byte	.LVL1186
+	.8byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST293:
-	.8byte	.LVL1182
-	.8byte	.LVL1183
+.LLST292:
+	.8byte	.LVL1184
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST294:
-	.8byte	.LVL1181
-	.8byte	.LVL1185
+.LLST293:
+	.8byte	.LVL1183
+	.8byte	.LVL1187
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1188
-	.8byte	.LVL1195
+	.8byte	.LVL1190
+	.8byte	.LVL1197
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1198
-	.8byte	.LVL1199
+	.8byte	.LVL1200
+	.8byte	.LVL1201
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1199
-	.8byte	.LVL1203-1
+	.8byte	.LVL1201
+	.8byte	.LVL1205-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1204
-	.8byte	.LVL1205
+	.8byte	.LVL1206
+	.8byte	.LVL1207
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1207
-	.8byte	.LVL1209-1
+	.8byte	.LVL1209
+	.8byte	.LVL1211-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1212
-	.8byte	.LVL1213
+	.8byte	.LVL1214
+	.8byte	.LVL1215
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST295:
-	.8byte	.LVL1175
-	.8byte	.LVL1186
-	.2byte	0x1
-	.byte	0x63
+.LLST294:
+	.8byte	.LVL1177
 	.8byte	.LVL1188
-	.8byte	.LVL1208
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL1190
 	.8byte	.LVL1210
+	.2byte	0x1
+	.byte	0x63
 	.8byte	.LVL1212
+	.8byte	.LVL1214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1212
 	.8byte	.LVL1214
+	.8byte	.LVL1216
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST296:
-	.8byte	.LVL1196
-	.8byte	.LVL1202
+.LLST295:
+	.8byte	.LVL1198
+	.8byte	.LVL1204
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1204
-	.8byte	.LVL1206-1
+	.8byte	.LVL1206
+	.8byte	.LVL1208-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1207
-	.8byte	.LVL1209-1
+	.8byte	.LVL1209
+	.8byte	.LVL1211-1
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST297:
-	.8byte	.LVL1173
-	.8byte	.LVL1180
+.LLST296:
+	.8byte	.LVL1175
+	.8byte	.LVL1182
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1180
-	.8byte	.LVL1187
+	.8byte	.LVL1182
+	.8byte	.LVL1189
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1187
-	.8byte	.LVL1188
+	.8byte	.LVL1189
+	.8byte	.LVL1190
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1188
-	.8byte	.LVL1215
+	.8byte	.LVL1190
+	.8byte	.LVL1217
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST298:
-	.8byte	.LVL1200
-	.8byte	.LVL1201
+.LLST297:
+	.8byte	.LVL1202
+	.8byte	.LVL1203
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1201
-	.8byte	.LVL1202
+	.8byte	.LVL1203
+	.8byte	.LVL1204
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
-	.8byte	.LVL1204
-	.8byte	.LVL1205
+	.8byte	.LVL1206
+	.8byte	.LVL1207
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1205
-	.8byte	.LVL1206-1
+	.8byte	.LVL1207
+	.8byte	.LVL1208-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST406:
-	.8byte	.LVL1764
-	.8byte	.LVL1766
+.LLST405:
+	.8byte	.LVL1763
+	.8byte	.LVL1765
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1765
 	.8byte	.LVL1766
-	.8byte	.LVL1767
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1767
-	.8byte	.LVL1769
+	.8byte	.LVL1766
+	.8byte	.LVL1768
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1769
+	.8byte	.LVL1768
 	.8byte	.LFE308
 	.2byte	0x4
 	.byte	0xf3
@@ -44472,117 +44486,117 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST407:
-	.8byte	.LVL1778
-	.8byte	.LVL1781
+.LLST406:
+	.8byte	.LVL1777
+	.8byte	.LVL1779
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1781
-	.8byte	.LVL1784
+	.8byte	.LVL1779
+	.8byte	.LVL1782
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1787
-	.8byte	.LVL1797
+	.8byte	.LVL1785
+	.8byte	.LVL1795
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1798
+	.8byte	.LVL1796
 	.8byte	.LFE308
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST408:
-	.8byte	.LVL1770
-	.8byte	.LVL1772
+.LLST407:
+	.8byte	.LVL1769
+	.8byte	.LVL1771
 	.2byte	0x1
 	.byte	0x64
+	.8byte	.LVL1776
 	.8byte	.LVL1777
-	.8byte	.LVL1778
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1792
-	.8byte	.LVL1793
+	.8byte	.LVL1790
+	.8byte	.LVL1791
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1791
 	.8byte	.LVL1793
-	.8byte	.LVL1795
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST409:
+.LLST408:
+	.8byte	.LVL1764
 	.8byte	.LVL1765
-	.8byte	.LVL1766
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL1766
 	.8byte	.LVL1767
-	.8byte	.LVL1768
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1768
-	.8byte	.LVL1770
+	.8byte	.LVL1767
+	.8byte	.LVL1769
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL1770
-	.8byte	.LVL1771-1
+	.8byte	.LVL1769
+	.8byte	.LVL1770-1
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL1775
 	.8byte	.LVL1776
-	.8byte	.LVL1777
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST410:
-	.8byte	.LVL1788
-	.8byte	.LVL1799
+.LLST409:
+	.8byte	.LVL1786
+	.8byte	.LVL1797
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST133:
-	.8byte	.LVL547
-	.8byte	.LVL548
+.LLST124:
+	.8byte	.LVL524
+	.8byte	.LVL525
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL548
+	.8byte	.LVL525
 	.8byte	.LFE307
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST134:
-	.8byte	.LVL547
-	.8byte	.LVL549-1
+.LLST125:
+	.8byte	.LVL524
+	.8byte	.LVL526-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL549-1
+	.8byte	.LVL526-1
 	.8byte	.LFE307
 	.2byte	0x1
 	.byte	0x5a
 	.8byte	0
 	.8byte	0
-.LLST135:
-	.8byte	.LVL547
-	.8byte	.LVL549-1
+.LLST126:
+	.8byte	.LVL524
+	.8byte	.LVL526-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL549-1
+	.8byte	.LVL526-1
 	.8byte	.LFE307
 	.2byte	0x1
 	.byte	0x58
 	.8byte	0
 	.8byte	0
-.LLST136:
-	.8byte	.LVL550
-	.8byte	.LVL553
+.LLST127:
+	.8byte	.LVL527
+	.8byte	.LVL530
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL553
-	.8byte	.LVL554
+	.8byte	.LVL530
+	.8byte	.LVL531
 	.2byte	0x7
 	.byte	0x73
 	.sleb128 0
@@ -44591,38 +44605,38 @@ __func__.7632:
 	.byte	0x75
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL554
-	.8byte	.LVL555
+	.8byte	.LVL531
+	.8byte	.LVL532
 	.2byte	0x1
 	.byte	0x57
-	.8byte	.LVL555
-	.8byte	.LVL557
+	.8byte	.LVL532
+	.8byte	.LVL534
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL557
-	.8byte	.LVL558
+	.8byte	.LVL534
+	.8byte	.LVL535
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST137:
-	.8byte	.LVL550
-	.8byte	.LVL551
+.LLST128:
+	.8byte	.LVL527
+	.8byte	.LVL528
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL552
-	.8byte	.LVL556
+	.8byte	.LVL529
+	.8byte	.LVL533
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST131:
-	.8byte	.LVL543
-	.8byte	.LVL545
+.LLST122:
+	.8byte	.LVL520
+	.8byte	.LVL522
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL545
+	.8byte	.LVL522
 	.8byte	.LFE306
 	.2byte	0x4
 	.byte	0xf3
@@ -44631,102 +44645,102 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST132:
-	.8byte	.LVL543
-	.8byte	.LVL544
+.LLST123:
+	.8byte	.LVL520
+	.8byte	.LVL521
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL544
-	.8byte	.LVL546
+	.8byte	.LVL521
+	.8byte	.LVL523
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST129:
-	.8byte	.LVL537
-	.8byte	.LVL538
+.LLST120:
+	.8byte	.LVL514
+	.8byte	.LVL515
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL539
-	.8byte	.LVL540
+	.8byte	.LVL516
+	.8byte	.LVL517
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST130:
-	.8byte	.LVL535
-	.8byte	.LVL536
+.LLST121:
+	.8byte	.LVL512
+	.8byte	.LVL513
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL536
-	.8byte	.LVL541
+	.8byte	.LVL513
+	.8byte	.LVL518
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL542
+	.8byte	.LVL519
 	.8byte	.LFE305
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST127:
-	.8byte	.LVL529
-	.8byte	.LVL530
+.LLST118:
+	.8byte	.LVL506
+	.8byte	.LVL507
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL531
-	.8byte	.LVL534
+	.8byte	.LVL508
+	.8byte	.LVL511
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST128:
-	.8byte	.LVL527
-	.8byte	.LVL528
+.LLST119:
+	.8byte	.LVL504
+	.8byte	.LVL505
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL528
-	.8byte	.LVL532
+	.8byte	.LVL505
+	.8byte	.LVL509
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL533
+	.8byte	.LVL510
 	.8byte	.LFE304
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST126:
-	.8byte	.LVL520
-	.8byte	.LVL521
+.LLST117:
+	.8byte	.LVL497
+	.8byte	.LVL498
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL522
-	.8byte	.LVL523
+	.8byte	.LVL499
+	.8byte	.LVL500
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL524
-	.8byte	.LVL525
+	.8byte	.LVL501
+	.8byte	.LVL502
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL526
+	.8byte	.LVL503
 	.8byte	.LFE303
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST325:
-	.8byte	.LVL1339
-	.8byte	.LVL1340
+.LLST324:
+	.8byte	.LVL1341
+	.8byte	.LVL1342
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1340
-	.8byte	.LVL1344
+	.8byte	.LVL1342
+	.8byte	.LVL1346
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1344
+	.8byte	.LVL1346
 	.8byte	.LFE302
 	.2byte	0x4
 	.byte	0xf3
@@ -44735,76 +44749,76 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST326:
-	.8byte	.LVL1339
-	.8byte	.LVL1343
+.LLST325:
+	.8byte	.LVL1341
+	.8byte	.LVL1345
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1345
-	.8byte	.LVL1348
+	.8byte	.LVL1347
+	.8byte	.LVL1350
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1348
+	.8byte	.LVL1350
 	.8byte	.LFE302
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST123:
-	.8byte	.LVL506
-	.8byte	.LVL507
+.LLST114:
+	.8byte	.LVL483
+	.8byte	.LVL484
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL507
-	.8byte	.LVL516
+	.8byte	.LVL484
+	.8byte	.LVL493
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL516
-	.8byte	.LVL517
+	.8byte	.LVL493
+	.8byte	.LVL494
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL517
+	.8byte	.LVL494
 	.8byte	.LFE300
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST124:
-	.8byte	.LVL511
-	.8byte	.LVL513
+.LLST115:
+	.8byte	.LVL488
+	.8byte	.LVL490
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL517
-	.8byte	.LVL518
+	.8byte	.LVL494
+	.8byte	.LVL495
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL519
+	.8byte	.LVL496
 	.8byte	.LFE300
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST125:
-	.8byte	.LVL506
-	.8byte	.LVL512
+.LLST116:
+	.8byte	.LVL483
+	.8byte	.LVL489
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL512
-	.8byte	.LVL515
+	.8byte	.LVL489
+	.8byte	.LVL492
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL515
-	.8byte	.LVL517
+	.8byte	.LVL492
+	.8byte	.LVL494
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL517
+	.8byte	.LVL494
 	.8byte	.LFE300
 	.2byte	0x3
 	.byte	0x9
@@ -44812,49 +44826,49 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST391:
-	.8byte	.LVL1700
-	.8byte	.LVL1702
+.LLST396:
+	.8byte	.LVL1729
+	.8byte	.LVL1731
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1702
-	.8byte	.LVL1710
+	.8byte	.LVL1731
+	.8byte	.LVL1739
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1710
-	.8byte	.LVL1712
+	.8byte	.LVL1739
+	.8byte	.LVL1741
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1712
+	.8byte	.LVL1741
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST392:
-	.8byte	.LVL1701
-	.8byte	.LVL1711
+.LLST397:
+	.8byte	.LVL1730
+	.8byte	.LVL1740
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1712
+	.8byte	.LVL1741
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST312:
-	.8byte	.LVL1266
-	.8byte	.LVL1267
+.LLST311:
+	.8byte	.LVL1268
+	.8byte	.LVL1269
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1267
-	.8byte	.LVL1307
+	.8byte	.LVL1269
+	.8byte	.LVL1309
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1307
+	.8byte	.LVL1309
 	.8byte	.LFE298
 	.2byte	0x4
 	.byte	0xf3
@@ -44863,277 +44877,302 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST313:
-	.8byte	.LVL1274
-	.8byte	.LVL1279
+.LLST312:
+	.8byte	.LVL1276
+	.8byte	.LVL1281
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1280
-	.8byte	.LVL1307
+	.8byte	.LVL1282
+	.8byte	.LVL1309
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST314:
-	.8byte	.LVL1282
-	.8byte	.LVL1294
+.LLST313:
+	.8byte	.LVL1284
+	.8byte	.LVL1296
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1295
-	.8byte	.LVL1308
+	.8byte	.LVL1297
+	.8byte	.LVL1310
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST315:
-	.8byte	.LVL1286
-	.8byte	.LVL1287
+.LLST314:
+	.8byte	.LVL1288
+	.8byte	.LVL1289
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1288
-	.8byte	.LVL1289
+	.8byte	.LVL1290
+	.8byte	.LVL1291
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1289
-	.8byte	.LVL1293
+	.8byte	.LVL1291
+	.8byte	.LVL1295
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1299
-	.8byte	.LVL1303
+	.8byte	.LVL1301
+	.8byte	.LVL1305
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1303
-	.8byte	.LVL1304
+	.8byte	.LVL1305
+	.8byte	.LVL1306
 	.2byte	0x3
 	.byte	0x88
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1305
-	.8byte	.LVL1309
+	.8byte	.LVL1307
+	.8byte	.LVL1311
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST316:
-	.8byte	.LVL1288
-	.8byte	.LVL1289
+.LLST315:
+	.8byte	.LVL1290
+	.8byte	.LVL1291
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1289
-	.8byte	.LVL1290-1
+	.8byte	.LVL1291
+	.8byte	.LVL1292-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1299
-	.8byte	.LVL1300
+	.8byte	.LVL1301
+	.8byte	.LVL1302
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1300
-	.8byte	.LVL1301
+	.8byte	.LVL1302
+	.8byte	.LVL1303
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1301
-	.8byte	.LVL1302-1
+	.8byte	.LVL1303
+	.8byte	.LVL1304-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1302-1
-	.8byte	.LVL1303
+	.8byte	.LVL1304-1
+	.8byte	.LVL1305
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 196
-	.8byte	.LVL1303
 	.8byte	.LVL1305
+	.8byte	.LVL1307
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST317:
-	.8byte	.LVL1266
+.LLST316:
 	.8byte	.LVL1268
+	.8byte	.LVL1270
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1270
-	.8byte	.LVL1271
+	.8byte	.LVL1272
+	.8byte	.LVL1273
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1271
-	.8byte	.LVL1272
+	.8byte	.LVL1273
+	.8byte	.LVL1274
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1272
-	.8byte	.LVL1273-1
+	.8byte	.LVL1274
+	.8byte	.LVL1275-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST318:
-	.8byte	.LVL1296
+.LLST317:
 	.8byte	.LVL1298
+	.8byte	.LVL1300
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST319:
-	.8byte	.LVL1296
+.LLST318:
 	.8byte	.LVL1298
+	.8byte	.LVL1300
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST114:
-	.8byte	.LVL476
-	.8byte	.LVL480
+.LLST104:
+	.8byte	.LVL451
+	.8byte	.LVL455
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL481
-	.8byte	.LVL490
+	.8byte	.LVL456
+	.8byte	.LVL465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL498
-	.8byte	.LVL500
+	.8byte	.LVL475
+	.8byte	.LVL477
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST115:
-	.8byte	.LVL476
-	.8byte	.LVL480
+.LLST105:
+	.8byte	.LVL451
+	.8byte	.LVL455
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL481
-	.8byte	.LVL490
+	.8byte	.LVL456
+	.8byte	.LVL465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL490
-	.8byte	.LVL491
+	.8byte	.LVL465
+	.8byte	.LVL466
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL491
-	.8byte	.LVL496
+	.8byte	.LVL466
+	.8byte	.LVL471
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL496
+	.8byte	.LVL471
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST116:
-	.8byte	.LVL476
-	.8byte	.LVL480
+.LLST106:
+	.8byte	.LVL451
+	.8byte	.LVL455
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL481
-	.8byte	.LVL490
+	.8byte	.LVL456
+	.8byte	.LVL465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL490
-	.8byte	.LVL494
+	.8byte	.LVL465
+	.8byte	.LVL469
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL496
-	.8byte	.LVL499
+	.8byte	.LVL471
+	.8byte	.LVL476
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL500
+	.8byte	.LVL477
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST117:
-	.8byte	.LVL490
-	.8byte	.LVL491
+.LLST107:
+	.8byte	.LVL465
+	.8byte	.LVL466
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL496
-	.8byte	.LVL497
+	.8byte	.LVL471
+	.8byte	.LVL474
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL501
+	.8byte	.LVL478
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST118:
-	.8byte	.LVL488
-	.8byte	.LVL489
+.LLST108:
+	.8byte	.LVL463
+	.8byte	.LVL464
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL489
-	.8byte	.LVL495-1
+	.8byte	.LVL464
+	.8byte	.LVL470-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL496
+	.8byte	.LVL471
 	.8byte	.LFE296
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST119:
-	.8byte	.LVL492
-	.8byte	.LVL495-1
+.LLST109:
+	.8byte	.LVL467
+	.8byte	.LVL470-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST120:
-	.8byte	.LVL477
-	.8byte	.LVL478
+.LLST110:
+	.8byte	.LVL452
+	.8byte	.LVL453
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL478
-	.8byte	.LVL479
+	.8byte	.LVL453
+	.8byte	.LVL454
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL481
-	.8byte	.LVL482
+	.8byte	.LVL456
+	.8byte	.LVL457
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL483
-	.8byte	.LVL484
+	.8byte	.LVL458
+	.8byte	.LVL459
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL484
-	.8byte	.LVL486
+	.8byte	.LVL459
+	.8byte	.LVL461
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST103:
-	.8byte	.LVL305
-	.8byte	.LVL306
+.LLST111:
+	.8byte	.LVL451
+	.8byte	.LVL455
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL456
+	.8byte	.LVL465
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL465
+	.8byte	.LVL468-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL471
+	.8byte	.LVL472
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL473
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST93:
+	.8byte	.LVL280
+	.8byte	.LVL281
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL306
-	.8byte	.LVL308
+	.8byte	.LVL281
+	.8byte	.LVL283
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL308
-	.8byte	.LVL311
+	.8byte	.LVL283
+	.8byte	.LVL286
 	.2byte	0x41
 	.byte	0x3
 	.8byte	g_num_free_superblocks
@@ -45181,11 +45220,11 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL311
-	.8byte	.LVL314
+	.8byte	.LVL286
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL314
+	.8byte	.LVL289
 	.8byte	.LFE295
 	.2byte	0x4
 	.byte	0xf3
@@ -45194,80 +45233,80 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST104:
-	.8byte	.LVL305
-	.8byte	.LVL310
+.LLST94:
+	.8byte	.LVL280
+	.8byte	.LVL285
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL310
-	.8byte	.LVL311
+	.8byte	.LVL285
+	.8byte	.LVL286
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL311
-	.8byte	.LVL315
+	.8byte	.LVL286
+	.8byte	.LVL290
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL315
+	.8byte	.LVL290
 	.8byte	.LFE295
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST105:
-	.8byte	.LVL307
-	.8byte	.LVL309
+.LLST95:
+	.8byte	.LVL282
+	.8byte	.LVL284
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL311
-	.8byte	.LVL314
+	.8byte	.LVL286
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST106:
-	.8byte	.LVL307
-	.8byte	.LVL312
+.LLST96:
+	.8byte	.LVL282
+	.8byte	.LVL287
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL313
-	.8byte	.LVL314
+	.8byte	.LVL288
+	.8byte	.LVL289
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST102:
-	.8byte	.LVL301
-	.8byte	.LVL302
+.LLST92:
+	.8byte	.LVL276
+	.8byte	.LVL277
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL302
-	.8byte	.LVL303
+	.8byte	.LVL277
+	.8byte	.LVL278
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL303
-	.8byte	.LVL304
+	.8byte	.LVL278
+	.8byte	.LVL279
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL304
+	.8byte	.LVL279
 	.8byte	.LFE294
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST98:
-	.8byte	.LVL287
-	.8byte	.LVL288
+.LLST88:
+	.8byte	.LVL262
+	.8byte	.LVL263
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL288
-	.8byte	.LVL291
+	.8byte	.LVL263
+	.8byte	.LVL266
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL291
+	.8byte	.LVL266
 	.8byte	.LFE293
 	.2byte	0x4
 	.byte	0xf3
@@ -45276,452 +45315,451 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST99:
-	.8byte	.LVL287
-	.8byte	.LVL289
+.LLST89:
+	.8byte	.LVL262
+	.8byte	.LVL264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL289
-	.8byte	.LVL298
+	.8byte	.LVL264
+	.8byte	.LVL273
 	.2byte	0x1
 	.byte	0x57
-	.8byte	.LVL298
-	.8byte	.LVL299
+	.8byte	.LVL273
+	.8byte	.LVL274
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL299
+	.8byte	.LVL274
 	.8byte	.LFE293
 	.2byte	0x1
 	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST100:
-	.8byte	.LVL295
-	.8byte	.LVL296-1
+.LLST90:
+	.8byte	.LVL270
+	.8byte	.LVL271-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST101:
-	.8byte	.LVL287
-	.8byte	.LVL289
+.LLST91:
+	.8byte	.LVL262
+	.8byte	.LVL264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL289
-	.8byte	.LVL293
+	.8byte	.LVL264
+	.8byte	.LVL268
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL294
-	.8byte	.LVL297
+	.8byte	.LVL269
+	.8byte	.LVL272
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL298
+	.8byte	.LVL273
 	.8byte	.LFE293
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL956
-	.8byte	.LVL957
+.LLST250:
+	.8byte	.LVL958
+	.8byte	.LVL959
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL958
+	.8byte	.LVL960
 	.8byte	.LFE291
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST252:
-	.8byte	.LVL961
+.LLST251:
 	.8byte	.LVL963
+	.8byte	.LVL965
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1146
-	.8byte	.LVL1147
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+	.8byte	.LVL1148
+	.8byte	.LVL1149
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1149
-	.8byte	.LVL1150
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+	.8byte	.LVL1152
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1158
-	.8byte	.LVL1161
+	.8byte	.LVL1160
+	.8byte	.LVL1163
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1162
-	.8byte	.LVL1163
+	.8byte	.LVL1164
+	.8byte	.LVL1165
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1163
-	.8byte	.LVL1168
+	.8byte	.LVL1165
+	.8byte	.LVL1170
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1169
+	.8byte	.LVL1171
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1144
-	.8byte	.LVL1145
+.LLST283:
+	.8byte	.LVL1146
+	.8byte	.LVL1147
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1153
-	.8byte	.LVL1158
+	.8byte	.LVL1155
+	.8byte	.LVL1160
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1149
-	.8byte	.LVL1150
+.LLST284:
+	.8byte	.LVL1151
+	.8byte	.LVL1152
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1155
-	.8byte	.LVL1156
+	.8byte	.LVL1157
+	.8byte	.LVL1158
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1163
-	.8byte	.LVL1166
+	.8byte	.LVL1165
+	.8byte	.LVL1168
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1167
+	.8byte	.LVL1169
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST286:
-	.8byte	.LVL1142
-	.8byte	.LVL1146
+.LLST285:
+	.8byte	.LVL1144
+	.8byte	.LVL1148
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1146
-	.8byte	.LVL1151
+	.8byte	.LVL1148
+	.8byte	.LVL1153
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1151
-	.8byte	.LVL1152
+	.8byte	.LVL1153
+	.8byte	.LVL1154
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1153
-	.8byte	.LVL1158
+	.8byte	.LVL1155
+	.8byte	.LVL1160
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1158
-	.8byte	.LVL1164
+	.8byte	.LVL1160
+	.8byte	.LVL1166
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1165
+	.8byte	.LVL1167
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST287:
-	.8byte	.LVL1148
+.LLST286:
 	.8byte	.LVL1150
+	.8byte	.LVL1152
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1163
+	.8byte	.LVL1165
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST388:
-	.8byte	.LVL1686
-	.8byte	.LVL1687
+.LLST393:
+	.8byte	.LVL1715
+	.8byte	.LVL1716
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1693
-	.8byte	.LVL1698
+	.8byte	.LVL1722
+	.8byte	.LVL1727
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1699
+	.8byte	.LVL1728
 	.8byte	.LFE289
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST389:
-	.8byte	.LVL1684
-	.8byte	.LVL1685
+.LLST394:
+	.8byte	.LVL1713
+	.8byte	.LVL1714
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1688
-	.8byte	.LVL1693
+	.8byte	.LVL1717
+	.8byte	.LVL1722
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST390:
-	.8byte	.LVL1690
-	.8byte	.LVL1691
+.LLST395:
+	.8byte	.LVL1719
+	.8byte	.LVL1720
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST356:
-	.8byte	.LVL1510
-	.8byte	.LVL1511
+.LLST355:
+	.8byte	.LVL1512
+	.8byte	.LVL1513
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1511
-	.8byte	.LVL1515
+	.8byte	.LVL1513
+	.8byte	.LVL1519
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1515
-	.8byte	.LVL1516
+	.8byte	.LVL1519
+	.8byte	.LVL1520
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1516
+	.8byte	.LVL1520
 	.8byte	.LFE288
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST357:
-	.8byte	.LVL1518
+.LLST356:
+	.8byte	.LVL1514
 	.8byte	.LVL1519
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1519
-	.8byte	.LVL1520-1
-	.2byte	0x9
-	.byte	0x3
-	.8byte	p_sys_spare_buf
+	.byte	0x64
+	.8byte	.LVL1520
+	.8byte	.LFE288
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST358:
-	.8byte	.LVL1510
-	.8byte	.LVL1511
+.LLST357:
+	.8byte	.LVL1512
+	.8byte	.LVL1515
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL1511
-	.8byte	.LVL1512
+	.8byte	.LVL1515
+	.8byte	.LVL1516
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1512
-	.8byte	.LVL1513
+	.8byte	.LVL1516
+	.8byte	.LVL1517
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1513
-	.8byte	.LVL1514
+	.8byte	.LVL1517
+	.8byte	.LVL1518
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1516
+	.8byte	.LVL1520
 	.8byte	.LFE288
 	.2byte	0x3
-	.byte	0x85
+	.byte	0x86
 	.sleb128 -2
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST277:
-	.8byte	.LVL1118
-	.8byte	.LVL1119
+.LLST276:
+	.8byte	.LVL1120
+	.8byte	.LVL1121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1119
-	.8byte	.LVL1130
+	.8byte	.LVL1121
+	.8byte	.LVL1132
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1131
-	.8byte	.LVL1140
+	.8byte	.LVL1133
+	.8byte	.LVL1142
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST278:
-	.8byte	.LVL1120
-	.8byte	.LVL1124
+.LLST277:
+	.8byte	.LVL1122
+	.8byte	.LVL1126
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1124
-	.8byte	.LVL1125
+	.8byte	.LVL1126
+	.8byte	.LVL1127
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1125
-	.8byte	.LVL1129-1
+	.8byte	.LVL1127
+	.8byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1132
-	.8byte	.LVL1137-1
+	.8byte	.LVL1134
+	.8byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST279:
-	.8byte	.LVL1121
-	.8byte	.LVL1122-1
+.LLST278:
+	.8byte	.LVL1123
+	.8byte	.LVL1124-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST280:
-	.8byte	.LVL1120
-	.8byte	.LVL1123
+.LLST279:
+	.8byte	.LVL1122
+	.8byte	.LVL1125
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1124
-	.8byte	.LVL1129-1
+	.8byte	.LVL1126
+	.8byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1132
-	.8byte	.LVL1133
+	.8byte	.LVL1134
+	.8byte	.LVL1135
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1134
-	.8byte	.LVL1137-1
+	.8byte	.LVL1136
+	.8byte	.LVL1139-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST281:
-	.8byte	.LVL1118
-	.8byte	.LVL1119
+.LLST280:
+	.8byte	.LVL1120
+	.8byte	.LVL1121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1119
-	.8byte	.LVL1135
+	.8byte	.LVL1121
+	.8byte	.LVL1137
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1136
 	.8byte	.LVL1138
+	.8byte	.LVL1140
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1138
-	.8byte	.LVL1139-1
+	.8byte	.LVL1140
+	.8byte	.LVL1141-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	g_num_data_superblocks
 	.8byte	0
 	.8byte	0
-.LLST282:
-	.8byte	.LVL1118
-	.8byte	.LVL1119
+.LLST281:
+	.8byte	.LVL1120
+	.8byte	.LVL1121
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1119
-	.8byte	.LVL1127
+	.8byte	.LVL1121
+	.8byte	.LVL1129
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1128
-	.8byte	.LVL1141
+	.8byte	.LVL1130
+	.8byte	.LVL1143
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST95:
-	.8byte	.LVL276
-	.8byte	.LVL277
+.LLST85:
+	.8byte	.LVL251
+	.8byte	.LVL252
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL277
-	.8byte	.LVL280
+	.8byte	.LVL252
+	.8byte	.LVL255
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL280
-	.8byte	.LVL281
+	.8byte	.LVL255
+	.8byte	.LVL256
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL281
+	.8byte	.LVL256
 	.8byte	.LFE284
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST96:
-	.8byte	.LVL279
-	.8byte	.LVL285
+.LLST86:
+	.8byte	.LVL254
+	.8byte	.LVL260
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL285
-	.8byte	.LVL286
+	.8byte	.LVL260
+	.8byte	.LVL261
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST97:
-	.8byte	.LVL283
-	.8byte	.LVL284-1
+.LLST87:
+	.8byte	.LVL258
+	.8byte	.LVL259-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL284-1
+	.8byte	.LVL259-1
 	.8byte	.LFE284
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST331:
-	.8byte	.LVL1369
-	.8byte	.LVL1370
+.LLST330:
+	.8byte	.LVL1371
+	.8byte	.LVL1372
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1370
-	.8byte	.LVL1374
+	.8byte	.LVL1372
+	.8byte	.LVL1376
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1374
-	.8byte	.LVL1375
+	.8byte	.LVL1376
+	.8byte	.LVL1377
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1375
+	.8byte	.LVL1377
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST332:
-	.8byte	.LVL1371
+.LLST331:
 	.8byte	.LVL1373
+	.8byte	.LVL1375
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1375
+	.8byte	.LVL1377
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST333:
-	.8byte	.LVL1371
-	.8byte	.LVL1372
+.LLST332:
+	.8byte	.LVL1373
+	.8byte	.LVL1374
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45731,8 +45769,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1372
-	.8byte	.LVL1373
+	.8byte	.LVL1374
+	.8byte	.LVL1375
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45742,8 +45780,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1375
-	.8byte	.LVL1378-1
+	.8byte	.LVL1377
+	.8byte	.LVL1380-1
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45753,8 +45791,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1378-1
-	.8byte	.LVL1392
+	.8byte	.LVL1380-1
+	.8byte	.LVL1394
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45764,8 +45802,8 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1392
-	.8byte	.LVL1397
+	.8byte	.LVL1394
+	.8byte	.LVL1399
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45775,7 +45813,7 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1397
+	.8byte	.LVL1399
 	.8byte	.LFE281
 	.2byte	0x9
 	.byte	0x8f
@@ -45788,51 +45826,51 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST334:
-	.8byte	.LVL1375
+.LLST333:
 	.8byte	.LVL1377
+	.8byte	.LVL1379
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1377
-	.8byte	.LVL1380
+	.8byte	.LVL1379
+	.8byte	.LVL1382
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1392
-	.8byte	.LVL1393
+	.8byte	.LVL1394
+	.8byte	.LVL1395
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1394
-	.8byte	.LVL1401
+	.8byte	.LVL1396
+	.8byte	.LVL1403
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1436
-	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.8byte	.LVL1439
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1442
-	.8byte	.LVL1443
+	.8byte	.LVL1444
+	.8byte	.LVL1445
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1443
-	.8byte	.LVL1447
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1506
-	.8byte	.LVL1507
+	.8byte	.LVL1445
+	.8byte	.LVL1449
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1508
 	.8byte	.LVL1509
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1510
+	.8byte	.LVL1511
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST335:
-	.8byte	.LVL1435
-	.8byte	.LVL1436
+.LLST334:
+	.8byte	.LVL1437
+	.8byte	.LVL1438
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45842,476 +45880,476 @@ __func__.7632:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1460
 	.8byte	.LVL1462
+	.8byte	.LVL1464
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1509
+	.8byte	.LVL1511
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST336:
-	.8byte	.LVL1419
-	.8byte	.LVL1420
-	.2byte	0x1
-	.byte	0x6a
+.LLST335:
 	.8byte	.LVL1421
 	.8byte	.LVL1422
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1422
-	.8byte	.LVL1423
-	.2byte	0x1
 	.byte	0x6a
 	.8byte	.LVL1423
-	.8byte	.LVL1432
+	.8byte	.LVL1424
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1433
+	.8byte	.LVL1424
+	.8byte	.LVL1425
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1425
 	.8byte	.LVL1434
 	.2byte	0x1
 	.byte	0x68
 	.8byte	.LVL1435
 	.8byte	.LVL1436
 	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1436
-	.8byte	.LVL1440
+	.8byte	.LVL1438
+	.8byte	.LVL1442
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1441
-	.8byte	.LVL1447
+	.8byte	.LVL1443
+	.8byte	.LVL1449
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1447
-	.8byte	.LVL1452
+	.8byte	.LVL1449
+	.8byte	.LVL1454
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1452
+	.8byte	.LVL1454
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST337:
-	.8byte	.LVL1389
-	.8byte	.LVL1392
+.LLST336:
+	.8byte	.LVL1391
+	.8byte	.LVL1394
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1416
+	.8byte	.LVL1418
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST338:
-	.8byte	.LVL1387
-	.8byte	.LVL1392
+.LLST337:
+	.8byte	.LVL1389
+	.8byte	.LVL1394
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1411
-	.8byte	.LVL1412
+	.8byte	.LVL1413
+	.8byte	.LVL1414
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1416
+	.8byte	.LVL1418
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST339:
-	.8byte	.LVL1376
-	.8byte	.LVL1378-1
+.LLST338:
+	.8byte	.LVL1378
+	.8byte	.LVL1380-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1392
-	.8byte	.LVL1395
+	.8byte	.LVL1394
+	.8byte	.LVL1397
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1396
-	.8byte	.LVL1397
+	.8byte	.LVL1398
+	.8byte	.LVL1399
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1402
-	.8byte	.LVL1403
+	.8byte	.LVL1404
+	.8byte	.LVL1405
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1403
-	.8byte	.LVL1406
+	.8byte	.LVL1405
+	.8byte	.LVL1408
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.8byte	.LVL1406
-	.8byte	.LVL1407
+	.8byte	.LVL1408
+	.8byte	.LVL1409
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -2
-	.8byte	.LVL1424
-	.8byte	.LVL1427
+	.8byte	.LVL1426
+	.8byte	.LVL1429
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1427
-	.8byte	.LVL1428
+	.8byte	.LVL1429
+	.8byte	.LVL1430
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1444
-	.8byte	.LVL1445
+	.8byte	.LVL1446
+	.8byte	.LVL1447
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 328
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.8byte	.LVL1445
-	.8byte	.LVL1446
+	.8byte	.LVL1447
+	.8byte	.LVL1448
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
-	.8byte	.LVL1453
-	.8byte	.LVL1456
+	.8byte	.LVL1455
+	.8byte	.LVL1458
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1456
-	.8byte	.LVL1457
+	.8byte	.LVL1458
+	.8byte	.LVL1459
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1457
-	.8byte	.LVL1458
+	.8byte	.LVL1459
+	.8byte	.LVL1460
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 -2
-	.8byte	.LVL1506
-	.8byte	.LVL1509
+	.8byte	.LVL1508
+	.8byte	.LVL1511
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
 	.8byte	0
 	.8byte	0
-.LLST340:
-	.8byte	.LVL1379
+.LLST339:
 	.8byte	.LVL1381
+	.8byte	.LVL1383
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1381
-	.8byte	.LVL1390
+	.8byte	.LVL1383
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1397
-	.8byte	.LVL1398
+	.8byte	.LVL1399
+	.8byte	.LVL1400
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1398
-	.8byte	.LVL1421
+	.8byte	.LVL1400
+	.8byte	.LVL1423
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1422
-	.8byte	.LVL1423
+	.8byte	.LVL1424
+	.8byte	.LVL1425
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST342:
-	.8byte	.LVL1382
-	.8byte	.LVL1386
+.LLST341:
+	.8byte	.LVL1384
+	.8byte	.LVL1388
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1401
-	.8byte	.LVL1404
+	.8byte	.LVL1403
+	.8byte	.LVL1406
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1405
-	.8byte	.LVL1411
+	.8byte	.LVL1407
+	.8byte	.LVL1413
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1412
-	.8byte	.LVL1416
+	.8byte	.LVL1414
+	.8byte	.LVL1418
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1423
 	.8byte	.LVL1425
+	.8byte	.LVL1427
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1426
-	.8byte	.LVL1429
+	.8byte	.LVL1428
+	.8byte	.LVL1431
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1436
-	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.8byte	.LVL1439
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1437
 	.8byte	.LVL1439
+	.8byte	.LVL1441
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1452
 	.8byte	.LVL1454
+	.8byte	.LVL1456
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1455
-	.8byte	.LVL1458
+	.8byte	.LVL1457
+	.8byte	.LVL1460
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST343:
-	.8byte	.LVL1384
-	.8byte	.LVL1385
+.LLST342:
+	.8byte	.LVL1386
+	.8byte	.LVL1387
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1385
 	.8byte	.LVL1387
+	.8byte	.LVL1389
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1407
-	.8byte	.LVL1410
+	.8byte	.LVL1409
+	.8byte	.LVL1412
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1412
 	.8byte	.LVL1414
+	.8byte	.LVL1416
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1415
-	.8byte	.LVL1416
+	.8byte	.LVL1417
+	.8byte	.LVL1418
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST344:
-	.8byte	.LVL1430
-	.8byte	.LVL1431
+.LLST343:
+	.8byte	.LVL1432
+	.8byte	.LVL1433
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1438
-	.8byte	.LVL1439
+	.8byte	.LVL1440
+	.8byte	.LVL1441
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST345:
-	.8byte	.LVL1461
-	.8byte	.LVL1465
+.LLST344:
+	.8byte	.LVL1463
+	.8byte	.LVL1467
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1467
-	.8byte	.LVL1477
+	.8byte	.LVL1469
+	.8byte	.LVL1479
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1477
-	.8byte	.LVL1480
+	.8byte	.LVL1479
+	.8byte	.LVL1482
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1480
-	.8byte	.LVL1502
+	.8byte	.LVL1482
+	.8byte	.LVL1504
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1502
 	.8byte	.LVL1504
+	.8byte	.LVL1506
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1504
 	.8byte	.LVL1506
+	.8byte	.LVL1508
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST346:
-	.8byte	.LVL1461
-	.8byte	.LVL1465
+.LLST345:
+	.8byte	.LVL1463
+	.8byte	.LVL1467
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1467
-	.8byte	.LVL1475
+	.8byte	.LVL1469
+	.8byte	.LVL1477
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1480
-	.8byte	.LVL1495
+	.8byte	.LVL1482
+	.8byte	.LVL1497
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1495
 	.8byte	.LVL1497
+	.8byte	.LVL1499
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1504
 	.8byte	.LVL1506
+	.8byte	.LVL1508
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST347:
-	.8byte	.LVL1384
-	.8byte	.LVL1392
+.LLST346:
+	.8byte	.LVL1386
+	.8byte	.LVL1394
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1407
+	.8byte	.LVL1409
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST348:
-	.8byte	.LVL1369
-	.8byte	.LVL1373
+.LLST347:
+	.8byte	.LVL1371
+	.8byte	.LVL1375
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1375
-	.8byte	.LVL1385
+	.8byte	.LVL1377
+	.8byte	.LVL1387
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1385
-	.8byte	.LVL1390
+	.8byte	.LVL1387
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1392
-	.8byte	.LVL1407
+	.8byte	.LVL1394
+	.8byte	.LVL1409
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1407
-	.8byte	.LVL1418
+	.8byte	.LVL1409
+	.8byte	.LVL1420
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1418
-	.8byte	.LVL1434
+	.8byte	.LVL1420
+	.8byte	.LVL1436
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1447
-	.8byte	.LVL1452
+	.8byte	.LVL1449
+	.8byte	.LVL1454
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST349:
-	.8byte	.LVL1408
-	.8byte	.LVL1412
+.LLST348:
+	.8byte	.LVL1410
+	.8byte	.LVL1414
 	.2byte	0x1
 	.byte	0x58
-	.8byte	.LVL1448
-	.8byte	.LVL1449
+	.8byte	.LVL1450
+	.8byte	.LVL1451
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1449
-	.8byte	.LVL1450
+	.8byte	.LVL1451
+	.8byte	.LVL1452
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 0
-	.8byte	.LVL1450
-	.8byte	.LVL1451
+	.8byte	.LVL1452
+	.8byte	.LVL1453
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 -32
-	.8byte	.LVL1463
-	.8byte	.LVL1464
+	.8byte	.LVL1465
+	.8byte	.LVL1466
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1467
-	.8byte	.LVL1470-1
+	.8byte	.LVL1469
+	.8byte	.LVL1472-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1472
-	.8byte	.LVL1473-1
+	.8byte	.LVL1474
+	.8byte	.LVL1475-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1473-1
-	.8byte	.LVL1474
+	.8byte	.LVL1475-1
+	.8byte	.LVL1476
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1482
-	.8byte	.LVL1483
+	.8byte	.LVL1484
+	.8byte	.LVL1485
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1486
-	.8byte	.LVL1487-1
+	.8byte	.LVL1488
+	.8byte	.LVL1489-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.8byte	.LVL1487-1
-	.8byte	.LVL1488
+	.8byte	.LVL1489-1
+	.8byte	.LVL1490
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1498
-	.8byte	.LVL1499-1
+	.8byte	.LVL1500
+	.8byte	.LVL1501-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1499-1
-	.8byte	.LVL1502
+	.8byte	.LVL1501-1
+	.8byte	.LVL1504
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
 	.8byte	0
 	.8byte	0
-.LLST350:
-	.8byte	.LVL1417
-	.8byte	.LVL1434
+.LLST349:
+	.8byte	.LVL1419
+	.8byte	.LVL1436
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1447
-	.8byte	.LVL1452
+	.8byte	.LVL1449
+	.8byte	.LVL1454
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST351:
-	.8byte	.LVL1417
-	.8byte	.LVL1421
+.LLST350:
+	.8byte	.LVL1419
+	.8byte	.LVL1423
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1422
-	.8byte	.LVL1423
+	.8byte	.LVL1424
+	.8byte	.LVL1425
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST352:
-	.8byte	.LVL1473
-	.8byte	.LVL1474
+.LLST351:
+	.8byte	.LVL1475
+	.8byte	.LVL1476
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x4
-	.8byte	.LVL1482
-	.8byte	.LVL1483
+	.8byte	.LVL1484
+	.8byte	.LVL1485
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46320,23 +46358,23 @@ __func__.7632:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST353:
-	.8byte	.LVL1489
-	.8byte	.LVL1492
+.LLST352:
+	.8byte	.LVL1491
+	.8byte	.LVL1494
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST354:
-	.8byte	.LVL1496
-	.8byte	.LVL1502
+.LLST353:
+	.8byte	.LVL1498
+	.8byte	.LVL1504
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST355:
-	.8byte	.LVL1499
-	.8byte	.LVL1500-1
+.LLST354:
+	.8byte	.LVL1501
+	.8byte	.LVL1502-1
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46345,112 +46383,112 @@ __func__.7632:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST245:
-	.8byte	.LVL936
-	.8byte	.LVL937
+.LLST244:
+	.8byte	.LVL938
+	.8byte	.LVL939
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL937
-	.8byte	.LVL949
+	.8byte	.LVL939
+	.8byte	.LVL951
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL949
-	.8byte	.LVL950
+	.8byte	.LVL951
+	.8byte	.LVL952
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL950
+	.8byte	.LVL952
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST246:
-	.8byte	.LVL936
-	.8byte	.LVL938-1
+.LLST245:
+	.8byte	.LVL938
+	.8byte	.LVL940-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST247:
-	.8byte	.LVL939
-	.8byte	.LVL940
+.LLST246:
+	.8byte	.LVL941
+	.8byte	.LVL942
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL940
-	.8byte	.LVL944-1
+	.8byte	.LVL942
+	.8byte	.LVL946-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL950
-	.8byte	.LVL955
+	.8byte	.LVL952
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL955
+	.8byte	.LVL957
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST248:
-	.8byte	.LVL942
-	.8byte	.LVL943
+.LLST247:
+	.8byte	.LVL944
+	.8byte	.LVL945
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL950
-	.8byte	.LVL953
+	.8byte	.LVL952
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL954
-	.8byte	.LVL955
+	.8byte	.LVL956
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST249:
-	.8byte	.LVL942
-	.8byte	.LVL947
+.LLST248:
+	.8byte	.LVL944
+	.8byte	.LVL949
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL950
-	.8byte	.LVL951
+	.8byte	.LVL952
+	.8byte	.LVL953
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL952
-	.8byte	.LVL955
+	.8byte	.LVL954
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST250:
-	.8byte	.LVL941
-	.8byte	.LVL944-1
+.LLST249:
+	.8byte	.LVL943
+	.8byte	.LVL946-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL950
-	.8byte	.LVL955
+	.8byte	.LVL952
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST90:
-	.8byte	.LVL261
-	.8byte	.LVL262
+.LLST80:
+	.8byte	.LVL236
+	.8byte	.LVL237
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL262
+	.8byte	.LVL237
 	.8byte	.LFE279
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST91:
-	.8byte	.LVL261
-	.8byte	.LVL264
+.LLST81:
+	.8byte	.LVL236
+	.8byte	.LVL239
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL264
+	.8byte	.LVL239
 	.8byte	.LFE279
 	.2byte	0x4
 	.byte	0xf3
@@ -46459,125 +46497,125 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST92:
-	.8byte	.LVL263
-	.8byte	.LVL265
+.LLST82:
+	.8byte	.LVL238
+	.8byte	.LVL240
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL266
-	.8byte	.LVL267
+	.8byte	.LVL241
+	.8byte	.LVL242
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL268
-	.8byte	.LVL269
+	.8byte	.LVL243
+	.8byte	.LVL244
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST276:
-	.8byte	.LVL1106
-	.8byte	.LVL1107
+.LLST275:
+	.8byte	.LVL1108
+	.8byte	.LVL1109
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST265:
-	.8byte	.LVL1057
-	.8byte	.LVL1060
+.LLST264:
+	.8byte	.LVL1059
+	.8byte	.LVL1062
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1060
-	.8byte	.LVL1078
+	.8byte	.LVL1062
+	.8byte	.LVL1080
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1078
-	.8byte	.LVL1084
+	.8byte	.LVL1080
+	.8byte	.LVL1086
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST266:
-	.8byte	.LVL1066
-	.8byte	.LVL1067
+.LLST265:
+	.8byte	.LVL1068
+	.8byte	.LVL1069
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1067
-	.8byte	.LVL1082
+	.8byte	.LVL1069
+	.8byte	.LVL1084
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST267:
-	.8byte	.LVL1071
-	.8byte	.LVL1072
+.LLST266:
+	.8byte	.LVL1073
+	.8byte	.LVL1074
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1072
-	.8byte	.LVL1073
+	.8byte	.LVL1074
+	.8byte	.LVL1075
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1084
 	.8byte	.LVL1086
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1087
 	.8byte	.LVL1088
 	.2byte	0x1
 	.byte	0x66
+	.8byte	.LVL1089
 	.8byte	.LVL1090
-	.8byte	.LVL1091-1
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x66
 	.8byte	.LVL1092
-	.8byte	.LVL1093
+	.8byte	.LVL1093-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	.LVL1094
 	.8byte	.LVL1095
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x55
+	.8byte	.LVL1096
 	.8byte	.LVL1097
-	.8byte	.LVL1102
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1103
+	.8byte	.LVL1099
+	.8byte	.LVL1104
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1105
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST268:
-	.8byte	.LVL1070
-	.8byte	.LVL1073
+.LLST267:
+	.8byte	.LVL1072
+	.8byte	.LVL1075
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1084
-	.8byte	.LVL1088
+	.8byte	.LVL1086
+	.8byte	.LVL1090
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST269:
-	.8byte	.LVL1098
-	.8byte	.LVL1099
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL1099
+.LLST268:
 	.8byte	.LVL1100
+	.8byte	.LVL1101
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1101
+	.8byte	.LVL1102
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 -1
@@ -46586,8 +46624,8 @@ __func__.7632:
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL1100
-	.8byte	.LVL1101
+	.8byte	.LVL1102
+	.8byte	.LVL1103
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -46606,200 +46644,196 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST270:
-	.8byte	.LVL1058
-	.8byte	.LVL1079
+.LLST269:
+	.8byte	.LVL1060
+	.8byte	.LVL1081
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST271:
-	.8byte	.LVL1059
-	.8byte	.LVL1068
+.LLST270:
+	.8byte	.LVL1061
+	.8byte	.LVL1070
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1088
+	.8byte	.LVL1090
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST272:
-	.8byte	.LVL1061
-	.8byte	.LVL1062
+.LLST271:
+	.8byte	.LVL1063
+	.8byte	.LVL1064
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1062
-	.8byte	.LVL1064-1
+	.8byte	.LVL1064
+	.8byte	.LVL1066-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 24
-	.8byte	.LVL1064-1
-	.8byte	.LVL1083
+	.8byte	.LVL1066-1
+	.8byte	.LVL1085
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1083
-	.8byte	.LVL1084
+	.8byte	.LVL1085
+	.8byte	.LVL1086
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 112
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
 	.8byte	0
 	.8byte	0
-.LLST273:
-	.8byte	.LVL1061
-	.8byte	.LVL1080
+.LLST272:
+	.8byte	.LVL1063
+	.8byte	.LVL1082
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST274:
-	.8byte	.LVL1063
-	.8byte	.LVL1083
+.LLST273:
+	.8byte	.LVL1065
+	.8byte	.LVL1085
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
-	.8byte	.LVL1083
-	.8byte	.LVL1084
+	.8byte	.LVL1085
+	.8byte	.LVL1086
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 124
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
 	.8byte	0
 	.8byte	0
-.LLST275:
-	.8byte	.LVL1065
-	.8byte	.LVL1081
+.LLST274:
+	.8byte	.LVL1067
+	.8byte	.LVL1083
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1084
+	.8byte	.LVL1086
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST463:
-	.8byte	.LVL2077
-	.8byte	.LVL2080
+.LLST462:
+	.8byte	.LVL2057
+	.8byte	.LVL2060
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2089
-	.8byte	.LVL2091
+	.8byte	.LVL2069
+	.8byte	.LVL2071
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2092
+	.8byte	.LVL2072
 	.8byte	.LFE274
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST89:
-	.8byte	.LVL259
-	.8byte	.LVL260
+.LLST79:
+	.8byte	.LVL234
+	.8byte	.LVL235
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL260
+	.8byte	.LVL235
 	.8byte	.LFE273
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST258:
-	.8byte	.LVL992
-	.8byte	.LVL999
+.LLST257:
+	.8byte	.LVL994
+	.8byte	.LVL1001
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL999
-	.8byte	.LVL1000
+	.8byte	.LVL1001
+	.8byte	.LVL1002
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1000
-	.8byte	.LVL1001
+	.8byte	.LVL1002
+	.8byte	.LVL1003
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1003
-	.8byte	.LVL1004-1
+	.8byte	.LVL1005
+	.8byte	.LVL1006-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1004
 	.8byte	.LVL1006
+	.8byte	.LVL1008
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST259:
-	.8byte	.LVL991
-	.8byte	.LVL1040
+.LLST258:
+	.8byte	.LVL993
+	.8byte	.LVL1042
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
-	.8byte	.LVL1040
-	.8byte	.LVL1041
+	.8byte	.LVL1042
+	.8byte	.LVL1043
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 156
-	.8byte	.LVL1041
+	.8byte	.LVL1043
 	.8byte	.LFE270
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST260:
-	.8byte	.LVL994
-	.8byte	.LVL995-1
+.LLST259:
+	.8byte	.LVL996
+	.8byte	.LVL997-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL995-1
-	.8byte	.LVL998
+	.8byte	.LVL997-1
+	.8byte	.LVL1000
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1007
-	.8byte	.LVL1038
+	.8byte	.LVL1009
+	.8byte	.LVL1040
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST261:
-	.8byte	.LVL992
-	.8byte	.LVL996
+.LLST260:
+	.8byte	.LVL994
+	.8byte	.LVL998
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL997
-	.8byte	.LVL1001
+	.8byte	.LVL999
+	.8byte	.LVL1003
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1003
 	.8byte	.LVL1005
+	.8byte	.LVL1007
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST262:
-	.8byte	.LVL1017
-	.8byte	.LVL1018
-	.2byte	0x1
-	.byte	0x51
+.LLST261:
 	.8byte	.LVL1019
 	.8byte	.LVL1020
 	.2byte	0x1
@@ -46808,10 +46842,10 @@ __func__.7632:
 	.8byte	.LVL1022
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1028
-	.8byte	.LVL1029
+	.8byte	.LVL1023
+	.8byte	.LVL1024
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x51
 	.8byte	.LVL1030
 	.8byte	.LVL1031
 	.2byte	0x1
@@ -46820,11 +46854,11 @@ __func__.7632:
 	.8byte	.LVL1033
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1042
-	.8byte	.LVL1047
+	.8byte	.LVL1034
+	.8byte	.LVL1035
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1048
+	.byte	0x52
+	.8byte	.LVL1044
 	.8byte	.LVL1049
 	.2byte	0x1
 	.byte	0x50
@@ -46832,19 +46866,23 @@ __func__.7632:
 	.8byte	.LVL1051
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1054
-	.8byte	.LVL1055
+	.8byte	.LVL1052
+	.8byte	.LVL1053
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1056
+	.8byte	.LVL1057
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1058
 	.8byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST263:
-	.8byte	.LVL1008
+.LLST262:
 	.8byte	.LVL1010
+	.8byte	.LVL1012
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46853,8 +46891,8 @@ __func__.7632:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1011
-	.8byte	.LVL1012
+	.8byte	.LVL1014
+	.8byte	.LVL1015
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46863,145 +46901,145 @@ __func__.7632:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1012
-	.8byte	.LVL1013
+	.8byte	.LVL1015
+	.8byte	.LVL1016
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x75
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1016
-	.8byte	.LVL1023
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1024
+	.8byte	.LVL1018
 	.8byte	.LVL1025
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1026
 	.8byte	.LVL1027
-	.8byte	.LVL1034
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1035
+	.8byte	.LVL1029
 	.8byte	.LVL1036
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1043
-	.8byte	.LVL1044
+	.8byte	.LVL1037
+	.8byte	.LVL1038
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x50
 	.8byte	.LVL1045
 	.8byte	.LVL1046
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1051
-	.8byte	.LVL1052
+	.8byte	.LVL1047
+	.8byte	.LVL1048
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
 	.8byte	.LVL1053
 	.8byte	.LVL1054
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1055
+	.8byte	.LVL1056
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST264:
-	.8byte	.LVL1007
-	.8byte	.LVL1038
+.LLST263:
+	.8byte	.LVL1009
+	.8byte	.LVL1040
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST385:
-	.8byte	.LVL1663
-	.8byte	.LVL1670
+.LLST384:
+	.8byte	.LVL1665
+	.8byte	.LVL1672
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1670
-	.8byte	.LVL1682
+	.8byte	.LVL1672
+	.8byte	.LVL1684
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST386:
-	.8byte	.LVL1664
-	.8byte	.LVL1681
+.LLST385:
+	.8byte	.LVL1666
+	.8byte	.LVL1683
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST387:
-	.8byte	.LVL1663
-	.8byte	.LVL1670
+.LLST386:
+	.8byte	.LVL1665
+	.8byte	.LVL1672
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1670
-	.8byte	.LVL1676
+	.8byte	.LVL1672
+	.8byte	.LVL1678
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1677
-	.8byte	.LVL1680
+	.8byte	.LVL1679
+	.8byte	.LVL1682
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST254:
-	.8byte	.LVL975
+.LLST253:
 	.8byte	.LVL977
+	.8byte	.LVL979
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL977
-	.8byte	.LVL981
+	.8byte	.LVL979
+	.8byte	.LVL983
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL981
-	.8byte	.LVL982-1
+	.8byte	.LVL983
+	.8byte	.LVL984-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL982-1
-	.8byte	.LVL982
+	.8byte	.LVL984-1
+	.8byte	.LVL984
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL982
-	.8byte	.LVL985
+	.8byte	.LVL984
+	.8byte	.LVL987
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.8byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST255:
-	.8byte	.LVL978
-	.8byte	.LVL979
+.LLST254:
+	.8byte	.LVL980
+	.8byte	.LVL981
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL979
-	.8byte	.LVL980-1
+	.8byte	.LVL981
+	.8byte	.LVL982-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
-	.8byte	.LVL982
-	.8byte	.LVL983
+	.8byte	.LVL984
+	.8byte	.LVL985
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL983
-	.8byte	.LVL984-1
+	.8byte	.LVL985
+	.8byte	.LVL986-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
 	.8byte	0
 	.8byte	0
-.LLST256:
-	.8byte	.LVL975
-	.8byte	.LVL976
+.LLST255:
+	.8byte	.LVL977
+	.8byte	.LVL978
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -47010,7 +47048,7 @@ __func__.7632:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.8byte	.LFE267
 	.2byte	0x7
 	.byte	0x70
@@ -47022,36 +47060,36 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST257:
-	.8byte	.LVL975
-	.8byte	.LVL976
+.LLST256:
+	.8byte	.LVL977
+	.8byte	.LVL978
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.8byte	.LFE267
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
 	.8byte	0
 	.8byte	0
-.LLST375:
-	.8byte	.LVL1622
-	.8byte	.LVL1625
+.LLST374:
+	.8byte	.LVL1624
+	.8byte	.LVL1627
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1625
-	.8byte	.LVL1629
+	.8byte	.LVL1627
+	.8byte	.LVL1631
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1629
-	.8byte	.LVL1630
+	.8byte	.LVL1631
+	.8byte	.LVL1632
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1630
+	.8byte	.LVL1632
 	.8byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -47060,93 +47098,93 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST376:
-	.8byte	.LVL1622
-	.8byte	.LVL1623
+.LLST375:
+	.8byte	.LVL1624
+	.8byte	.LVL1625
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL1623
-	.8byte	.LVL1624
+	.8byte	.LVL1625
+	.8byte	.LVL1626
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1624
 	.8byte	.LVL1626
+	.8byte	.LVL1628
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1629
-	.8byte	.LVL1630
+	.8byte	.LVL1631
+	.8byte	.LVL1632
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST377:
-	.8byte	.LVL1631
-	.8byte	.LVL1634
+.LLST376:
+	.8byte	.LVL1633
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1634
-	.8byte	.LVL1638
+	.8byte	.LVL1636
+	.8byte	.LVL1640
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1639
+	.8byte	.LVL1641
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST378:
-	.8byte	.LVL1631
-	.8byte	.LVL1632
+.LLST377:
+	.8byte	.LVL1633
+	.8byte	.LVL1634
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1632
-	.8byte	.LVL1637
+	.8byte	.LVL1634
+	.8byte	.LVL1639
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1639
+	.8byte	.LVL1641
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST379:
-	.8byte	.LVL1631
-	.8byte	.LVL1635
+.LLST378:
+	.8byte	.LVL1633
+	.8byte	.LVL1637
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1635
-	.8byte	.LVL1636
+	.8byte	.LVL1637
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1639
-	.8byte	.LVL1657
+	.8byte	.LVL1641
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1657
+	.8byte	.LVL1659
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST380:
-	.8byte	.LVL1642
-	.8byte	.LVL1657
+.LLST379:
+	.8byte	.LVL1644
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST381:
-	.8byte	.LVL1641
-	.8byte	.LVL1644
+.LLST380:
+	.8byte	.LVL1643
+	.8byte	.LVL1646
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1644
-	.8byte	.LVL1647-1
+	.8byte	.LVL1646
+	.8byte	.LVL1649-1
 	.2byte	0x28
 	.byte	0x85
 	.sleb128 0
@@ -47173,33 +47211,33 @@ __func__.7632:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1654
-	.8byte	.LVL1657
+	.8byte	.LVL1656
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST382:
-	.8byte	.LVL1640
-	.8byte	.LVL1645
+.LLST381:
+	.8byte	.LVL1642
+	.8byte	.LVL1647
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1645
-	.8byte	.LVL1646
+	.8byte	.LVL1647
+	.8byte	.LVL1648
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1646
-	.8byte	.LVL1647-1
+	.8byte	.LVL1648
+	.8byte	.LVL1649-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1654
-	.8byte	.LVL1655
+	.8byte	.LVL1656
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1655
-	.8byte	.LVL1656-1
+	.8byte	.LVL1657
+	.8byte	.LVL1658-1
 	.2byte	0x16
 	.byte	0x8a
 	.sleb128 0
@@ -47214,30 +47252,30 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST383:
-	.8byte	.LVL1631
-	.8byte	.LVL1635
+.LLST382:
+	.8byte	.LVL1633
+	.8byte	.LVL1637
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1635
-	.8byte	.LVL1636
+	.8byte	.LVL1637
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1639
-	.8byte	.LVL1657
+	.8byte	.LVL1641
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1657
+	.8byte	.LVL1659
 	.8byte	.LFE264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST384:
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+.LLST383:
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47250,8 +47288,8 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1634
-	.8byte	.LVL1635
+	.8byte	.LVL1636
+	.8byte	.LVL1637
 	.2byte	0x13
 	.byte	0x85
 	.sleb128 0
@@ -47264,15 +47302,15 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1635
-	.8byte	.LVL1636
+	.8byte	.LVL1637
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1639
-	.8byte	.LVL1657
+	.8byte	.LVL1641
+	.8byte	.LVL1659
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1657
+	.8byte	.LVL1659
 	.8byte	.LFE264
 	.2byte	0x13
 	.byte	0x85
@@ -47288,102 +47326,102 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST367:
-	.8byte	.LVL1593
-	.8byte	.LVL1596
+.LLST366:
+	.8byte	.LVL1595
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1596
-	.8byte	.LVL1600
+	.8byte	.LVL1598
+	.8byte	.LVL1602
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1601
-	.8byte	.LVL1612
+	.8byte	.LVL1603
+	.8byte	.LVL1614
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1615
+	.8byte	.LVL1617
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST368:
-	.8byte	.LVL1593
-	.8byte	.LVL1594
+.LLST367:
+	.8byte	.LVL1595
+	.8byte	.LVL1596
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1594
-	.8byte	.LVL1599
+	.8byte	.LVL1596
+	.8byte	.LVL1601
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1601
-	.8byte	.LVL1611
+	.8byte	.LVL1603
+	.8byte	.LVL1613
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1615
+	.8byte	.LVL1617
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST369:
-	.8byte	.LVL1593
-	.8byte	.LVL1597
+.LLST368:
+	.8byte	.LVL1595
+	.8byte	.LVL1599
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1597
-	.8byte	.LVL1598
+	.8byte	.LVL1599
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1601
-	.8byte	.LVL1620
+	.8byte	.LVL1603
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1620
+	.8byte	.LVL1622
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST370:
-	.8byte	.LVL1604
-	.8byte	.LVL1620
+.LLST369:
+	.8byte	.LVL1606
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST371:
-	.8byte	.LVL1603
-	.8byte	.LVL1609
+.LLST370:
+	.8byte	.LVL1605
+	.8byte	.LVL1611
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1617
-	.8byte	.LVL1620
+	.8byte	.LVL1619
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST372:
-	.8byte	.LVL1602
-	.8byte	.LVL1606
+.LLST371:
+	.8byte	.LVL1604
+	.8byte	.LVL1608
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1606
-	.8byte	.LVL1607
+	.8byte	.LVL1608
+	.8byte	.LVL1609
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1607
-	.8byte	.LVL1608-1
+	.8byte	.LVL1609
+	.8byte	.LVL1610-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1617
-	.8byte	.LVL1618
+	.8byte	.LVL1619
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1618
-	.8byte	.LVL1619-1
+	.8byte	.LVL1620
+	.8byte	.LVL1621-1
 	.2byte	0x16
 	.byte	0x85
 	.sleb128 0
@@ -47398,30 +47436,30 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST373:
-	.8byte	.LVL1593
-	.8byte	.LVL1597
+.LLST372:
+	.8byte	.LVL1595
+	.8byte	.LVL1599
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1597
-	.8byte	.LVL1598
+	.8byte	.LVL1599
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1601
-	.8byte	.LVL1620
+	.8byte	.LVL1603
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1620
+	.8byte	.LVL1622
 	.8byte	.LFE263
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST374:
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+.LLST373:
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47434,8 +47472,8 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1596
-	.8byte	.LVL1597
+	.8byte	.LVL1598
+	.8byte	.LVL1599
 	.2byte	0x13
 	.byte	0x8c
 	.sleb128 0
@@ -47448,29 +47486,29 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1597
-	.8byte	.LVL1598
+	.8byte	.LVL1599
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1601
-	.8byte	.LVL1613
+	.8byte	.LVL1603
+	.8byte	.LVL1615
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1613
-	.8byte	.LVL1614-1
+	.8byte	.LVL1615
+	.8byte	.LVL1616-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1614-1
-	.8byte	.LVL1615
+	.8byte	.LVL1616-1
+	.8byte	.LVL1617
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1615
-	.8byte	.LVL1620
+	.8byte	.LVL1617
+	.8byte	.LVL1622
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1620
+	.8byte	.LVL1622
 	.8byte	.LFE263
 	.2byte	0x13
 	.byte	0x8c
@@ -47486,12 +47524,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST239:
-	.8byte	.LVL916
-	.8byte	.LVL920
+.LLST238:
+	.8byte	.LVL918
+	.8byte	.LVL922
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL920
+	.8byte	.LVL922
 	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -47500,199 +47538,199 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST240:
-	.8byte	.LVL916
-	.8byte	.LVL917
+.LLST239:
+	.8byte	.LVL918
+	.8byte	.LVL919
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL917
-	.8byte	.LVL934
+	.8byte	.LVL919
+	.8byte	.LVL936
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL934
-	.8byte	.LVL935
+	.8byte	.LVL936
+	.8byte	.LVL937
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST241:
-	.8byte	.LVL916
-	.8byte	.LVL921
+.LLST240:
+	.8byte	.LVL918
+	.8byte	.LVL923
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL921
-	.8byte	.LVL934
+	.8byte	.LVL923
+	.8byte	.LVL936
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL934
-	.8byte	.LVL935
+	.8byte	.LVL936
+	.8byte	.LVL937
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST242:
-	.8byte	.LVL922
-	.8byte	.LVL923
+.LLST241:
+	.8byte	.LVL924
+	.8byte	.LVL925
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL924
 	.8byte	.LVL926
+	.8byte	.LVL928
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL926
-	.8byte	.LVL927-1
+	.8byte	.LVL928
+	.8byte	.LVL929-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL927-1
-	.8byte	.LVL929
+	.8byte	.LVL929-1
+	.8byte	.LVL931
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL929
 	.8byte	.LVL931
+	.8byte	.LVL933
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST243:
-	.8byte	.LVL918
-	.8byte	.LVL933
+.LLST242:
+	.8byte	.LVL920
+	.8byte	.LVL935
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST244:
-	.8byte	.LVL919
-	.8byte	.LVL932
+.LLST243:
+	.8byte	.LVL921
+	.8byte	.LVL934
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL935
+	.8byte	.LVL937
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST330:
-	.8byte	.LVL1363
-	.8byte	.LVL1364
+.LLST329:
+	.8byte	.LVL1365
+	.8byte	.LVL1366
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1365
 	.8byte	.LVL1367
+	.8byte	.LVL1369
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1368
+	.8byte	.LVL1370
 	.8byte	.LFE261
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST83:
-	.8byte	.LVL228
-	.8byte	.LVL229
+.LLST73:
+	.8byte	.LVL203
+	.8byte	.LVL204
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL230
-	.8byte	.LVL231
+	.8byte	.LVL205
+	.8byte	.LVL206
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL231
-	.8byte	.LVL233
+	.8byte	.LVL206
+	.8byte	.LVL208
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL235
-	.8byte	.LVL236
+	.8byte	.LVL210
+	.8byte	.LVL211
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL238
-	.8byte	.LVL239
+	.8byte	.LVL213
+	.8byte	.LVL214
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL240
-	.8byte	.LVL243
+	.8byte	.LVL215
+	.8byte	.LVL218
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL244
-	.8byte	.LVL248
+	.8byte	.LVL219
+	.8byte	.LVL223
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL249
+	.8byte	.LVL224
 	.8byte	.LFE260
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST84:
-	.8byte	.LVL232
-	.8byte	.LVL234
+.LLST74:
+	.8byte	.LVL207
+	.8byte	.LVL209
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL235
-	.8byte	.LVL238
+	.8byte	.LVL210
+	.8byte	.LVL213
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL240
+	.8byte	.LVL215
 	.8byte	.LFE260
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST85:
-	.8byte	.LVL232
-	.8byte	.LVL235
+.LLST75:
+	.8byte	.LVL207
+	.8byte	.LVL210
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL235
-	.8byte	.LVL237-1
+	.8byte	.LVL210
+	.8byte	.LVL212-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL240
-	.8byte	.LVL241
+	.8byte	.LVL215
+	.8byte	.LVL216
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL242
-	.8byte	.LVL245
+	.8byte	.LVL217
+	.8byte	.LVL220
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL245
-	.8byte	.LVL246
+	.8byte	.LVL220
+	.8byte	.LVL221
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL247
+	.8byte	.LVL222
 	.8byte	.LFE260
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST237:
-	.8byte	.LVL911
-	.8byte	.LVL912
+.LLST236:
+	.8byte	.LVL913
+	.8byte	.LVL914
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL912
+	.8byte	.LVL914
 	.8byte	.LFE259
 	.2byte	0x4
 	.byte	0xf3
@@ -47701,9 +47739,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST238:
-	.8byte	.LVL913
-	.8byte	.LVL914
+.LLST237:
+	.8byte	.LVL915
+	.8byte	.LVL916
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -47713,22 +47751,22 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL914
-	.8byte	.LVL915-1
+	.8byte	.LVL916
+	.8byte	.LVL917-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST224:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST223:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL872
-	.8byte	.LVL886
+	.8byte	.LVL874
+	.8byte	.LVL888
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL886
+	.8byte	.LVL888
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47737,16 +47775,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST225:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST224:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL872
-	.8byte	.LVL887
+	.8byte	.LVL874
+	.8byte	.LVL889
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL887
+	.8byte	.LVL889
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47755,16 +47793,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST226:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST225:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL872
-	.8byte	.LVL885
+	.8byte	.LVL874
+	.8byte	.LVL887
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL885
+	.8byte	.LVL887
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47773,9 +47811,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST227:
-	.8byte	.LVL876
-	.8byte	.LVL877-1
+.LLST226:
+	.8byte	.LVL878
+	.8byte	.LVL879-1
 	.2byte	0x7
 	.byte	0x73
 	.sleb128 0
@@ -47783,8 +47821,8 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL877-1
-	.8byte	.LVL888
+	.8byte	.LVL879-1
+	.8byte	.LVL890
 	.2byte	0xa
 	.byte	0x8f
 	.sleb128 204
@@ -47794,7 +47832,7 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL888
+	.8byte	.LVL890
 	.8byte	.LFE258
 	.2byte	0xa
 	.byte	0x8f
@@ -47807,379 +47845,379 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST228:
-	.8byte	.LVL878
-	.8byte	.LVL879
+.LLST227:
+	.8byte	.LVL880
+	.8byte	.LVL881
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL879
-	.8byte	.LVL880-1
+	.8byte	.LVL881
+	.8byte	.LVL882-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+16
 	.8byte	0
 	.8byte	0
-.LLST229:
-	.8byte	.LVL871
-	.8byte	.LVL872
+.LLST228:
+	.8byte	.LVL873
+	.8byte	.LVL874
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL872
-	.8byte	.LVL881
+	.8byte	.LVL874
+	.8byte	.LVL883
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL882
 	.8byte	.LVL884
+	.8byte	.LVL886
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST218:
-	.8byte	.LVL849
+.LLST217:
 	.8byte	.LVL851
+	.8byte	.LVL853
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL851
-	.8byte	.LVL855
+	.8byte	.LVL853
+	.8byte	.LVL857
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL855
-	.8byte	.LVL856
+	.8byte	.LVL857
+	.8byte	.LVL858
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL856
+	.8byte	.LVL858
 	.8byte	.LFE257
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST219:
-	.8byte	.LVL860
-	.8byte	.LVL861
+.LLST218:
+	.8byte	.LVL862
+	.8byte	.LVL863
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL861
 	.8byte	.LVL863
+	.8byte	.LVL865
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL866
-	.8byte	.LVL869
+	.8byte	.LVL868
+	.8byte	.LVL871
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL869
-	.8byte	.LVL870
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST220:
-	.8byte	.LVL860
-	.8byte	.LVL861
+.LLST219:
+	.8byte	.LVL862
+	.8byte	.LVL863
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL861
-	.8byte	.LVL862
+	.8byte	.LVL863
+	.8byte	.LVL864
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL866
-	.8byte	.LVL867
+	.8byte	.LVL868
+	.8byte	.LVL869
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL868
+	.8byte	.LVL870
 	.8byte	.LFE257
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST221:
-	.8byte	.LVL850
-	.8byte	.LVL854
+.LLST220:
+	.8byte	.LVL852
+	.8byte	.LVL856
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL856
-	.8byte	.LVL857
+	.8byte	.LVL858
+	.8byte	.LVL859
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL857
-	.8byte	.LVL860-1
+	.8byte	.LVL859
+	.8byte	.LVL862-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST222:
-	.8byte	.LVL850
-	.8byte	.LVL851
+.LLST221:
+	.8byte	.LVL852
+	.8byte	.LVL853
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
-	.8byte	.LVL851
-	.8byte	.LVL852-1
+	.8byte	.LVL853
+	.8byte	.LVL854-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 40
-	.8byte	.LVL856
-	.8byte	.LVL860-1
+	.8byte	.LVL858
+	.8byte	.LVL862-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 40
 	.8byte	0
 	.8byte	0
-.LLST223:
-	.8byte	.LVL858
-	.8byte	.LVL859
+.LLST222:
+	.8byte	.LVL860
+	.8byte	.LVL861
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL859
-	.8byte	.LVL860-1
+	.8byte	.LVL861
+	.8byte	.LVL862-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.8byte	0
 	.8byte	0
-.LLST230:
-	.8byte	.LVL889
-	.8byte	.LVL892-1
+.LLST229:
+	.8byte	.LVL891
+	.8byte	.LVL894-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL892-1
-	.8byte	.LVL900
+	.8byte	.LVL894-1
+	.8byte	.LVL902
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL900
 	.8byte	.LVL902
+	.8byte	.LVL904
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST231:
-	.8byte	.LVL894
-	.8byte	.LVL898
+.LLST230:
+	.8byte	.LVL896
+	.8byte	.LVL900
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST232:
-	.8byte	.LVL892
-	.8byte	.LVL893
+.LLST231:
+	.8byte	.LVL894
+	.8byte	.LVL895
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST233:
-	.8byte	.LVL896
+.LLST232:
 	.8byte	.LVL898
+	.8byte	.LVL900
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL902
-	.8byte	.LVL907
+	.8byte	.LVL904
+	.8byte	.LVL909
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL908
+	.8byte	.LVL910
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST234:
-	.8byte	.LVL890
-	.8byte	.LVL896
+.LLST233:
+	.8byte	.LVL892
+	.8byte	.LVL898
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST235:
-	.8byte	.LVL891
-	.8byte	.LVL901
+.LLST234:
+	.8byte	.LVL893
+	.8byte	.LVL903
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST236:
-	.8byte	.LVL903
-	.8byte	.LVL906
+.LLST235:
+	.8byte	.LVL905
+	.8byte	.LVL908
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL909
+	.8byte	.LVL911
 	.8byte	.LFE256
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST209:
-	.8byte	.LVL826
+.LLST208:
 	.8byte	.LVL828
+	.8byte	.LVL830
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL828
-	.8byte	.LVL833
+	.8byte	.LVL830
+	.8byte	.LVL835
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL833
-	.8byte	.LVL837
+	.8byte	.LVL835
+	.8byte	.LVL839
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL837
+	.8byte	.LVL839
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL827
-	.8byte	.LVL835
+.LLST209:
+	.8byte	.LVL829
+	.8byte	.LVL837
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL837
+	.8byte	.LVL839
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST211:
-	.8byte	.LVL827
-	.8byte	.LVL832
+.LLST210:
+	.8byte	.LVL829
+	.8byte	.LVL834
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL837
-	.8byte	.LVL843
+	.8byte	.LVL839
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL827
-	.8byte	.LVL834
+.LLST211:
+	.8byte	.LVL829
+	.8byte	.LVL836
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL837
+	.8byte	.LVL839
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST213:
-	.8byte	.LVL838
-	.8byte	.LVL843
+.LLST212:
+	.8byte	.LVL840
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST214:
-	.8byte	.LVL829
-	.8byte	.LVL830
+.LLST213:
+	.8byte	.LVL831
+	.8byte	.LVL832
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL830
 	.8byte	.LVL832
+	.8byte	.LVL834
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL837
 	.8byte	.LVL839
+	.8byte	.LVL841
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL840
-	.8byte	.LVL843
+	.8byte	.LVL842
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST215:
-	.8byte	.LVL831
-	.8byte	.LVL832
+.LLST214:
+	.8byte	.LVL833
+	.8byte	.LVL834
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL832
-	.8byte	.LVL833
+	.8byte	.LVL834
+	.8byte	.LVL835
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL838
-	.8byte	.LVL841
+	.8byte	.LVL840
+	.8byte	.LVL843
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL842
-	.8byte	.LVL843
+	.8byte	.LVL844
+	.8byte	.LVL845
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL843
-	.8byte	.LVL847
+	.8byte	.LVL845
+	.8byte	.LVL849
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL848
+	.8byte	.LVL850
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST216:
-	.8byte	.LVL831
-	.8byte	.LVL836
+.LLST215:
+	.8byte	.LVL833
+	.8byte	.LVL838
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL843
+	.8byte	.LVL845
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST217:
-	.8byte	.LVL831
-	.8byte	.LVL832
+.LLST216:
+	.8byte	.LVL833
+	.8byte	.LVL834
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL832
-	.8byte	.LVL836
+	.8byte	.LVL834
+	.8byte	.LVL838
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL843
-	.8byte	.LVL844
+	.8byte	.LVL845
+	.8byte	.LVL846
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL845
+	.8byte	.LVL847
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST206:
-	.8byte	.LVL810
-	.8byte	.LVL811
+.LLST205:
+	.8byte	.LVL812
+	.8byte	.LVL813
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL811
-	.8byte	.LVL817
+	.8byte	.LVL813
+	.8byte	.LVL819
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL817
+	.8byte	.LVL819
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48188,16 +48226,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST207:
-	.8byte	.LVL810
+.LLST206:
 	.8byte	.LVL812
+	.8byte	.LVL814
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL812
-	.8byte	.LVL815
+	.8byte	.LVL814
+	.8byte	.LVL817
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL815
+	.8byte	.LVL817
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48206,41 +48244,41 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST208:
-	.8byte	.LVL814
-	.8byte	.LVL818
+.LLST207:
+	.8byte	.LVL816
+	.8byte	.LVL820
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL819
+	.8byte	.LVL821
 	.8byte	.LFE253
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST67:
-	.8byte	.LVL188
-	.8byte	.LVL189
+.LLST61:
+	.8byte	.LVL169
+	.8byte	.LVL170
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL189
-	.8byte	.LVL192
+	.8byte	.LVL170
+	.8byte	.LVL173
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL194
+	.8byte	.LVL175
 	.8byte	.LFE251
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST68:
-	.8byte	.LVL188
-	.8byte	.LVL196
+.LLST62:
+	.8byte	.LVL169
+	.8byte	.LVL177
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL196
-	.8byte	.LVL197
+	.8byte	.LVL177
+	.8byte	.LVL178
 	.2byte	0x8
 	.byte	0x71
 	.sleb128 0
@@ -48252,27 +48290,27 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST69:
-	.8byte	.LVL190
-	.8byte	.LVL191
+.LLST63:
+	.8byte	.LVL171
+	.8byte	.LVL172
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL193
-	.8byte	.LVL195
+	.8byte	.LVL174
+	.8byte	.LVL176
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL196
-	.8byte	.LVL197
+	.8byte	.LVL177
+	.8byte	.LVL178
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST66:
-	.8byte	.LVL186
-	.8byte	.LVL187-1
+.LLST60:
+	.8byte	.LVL167
+	.8byte	.LVL168-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL187-1
+	.8byte	.LVL168-1
 	.8byte	.LFE250
 	.2byte	0x4
 	.byte	0xf3
@@ -48281,23 +48319,23 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST62:
-	.8byte	.LVL173
-	.8byte	.LVL178-1
+.LLST56:
+	.8byte	.LVL154
+	.8byte	.LVL159-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL178-1
-	.8byte	.LVL180
+	.8byte	.LVL159-1
+	.8byte	.LVL161
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL180
-	.8byte	.LVL185
+	.8byte	.LVL161
+	.8byte	.LVL166
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL185
+	.8byte	.LVL166
 	.8byte	.LFE249
 	.2byte	0x4
 	.byte	0xf3
@@ -48306,41 +48344,41 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST63:
-	.8byte	.LVL173
-	.8byte	.LVL174
+.LLST57:
+	.8byte	.LVL154
+	.8byte	.LVL155
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL174
-	.8byte	.LVL177
+	.8byte	.LVL155
+	.8byte	.LVL158
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL180
-	.8byte	.LVL181
+	.8byte	.LVL161
+	.8byte	.LVL162
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL183
+	.8byte	.LVL164
 	.8byte	.LFE249
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST64:
-	.8byte	.LVL173
-	.8byte	.LVL176
+.LLST58:
+	.8byte	.LVL154
+	.8byte	.LVL157
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL176
-	.8byte	.LVL179
+	.8byte	.LVL157
+	.8byte	.LVL160
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL179
-	.8byte	.LVL180
+	.8byte	.LVL160
+	.8byte	.LVL161
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL180
+	.8byte	.LVL161
 	.8byte	.LFE249
 	.2byte	0x3
 	.byte	0x9
@@ -48348,45 +48386,45 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST65:
-	.8byte	.LVL174
-	.8byte	.LVL175
+.LLST59:
+	.8byte	.LVL155
+	.8byte	.LVL156
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL180
-	.8byte	.LVL184
+	.8byte	.LVL161
+	.8byte	.LVL165
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST58:
-	.8byte	.LVL160
-	.8byte	.LVL161
+.LLST52:
+	.8byte	.LVL140
+	.8byte	.LVL141
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL161
-	.8byte	.LVL166
+	.8byte	.LVL141
+	.8byte	.LVL146
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL166
-	.8byte	.LVL168
+	.8byte	.LVL146
+	.8byte	.LVL148
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL168
+	.8byte	.LVL148
 	.8byte	.LFE248
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST59:
-	.8byte	.LVL160
-	.8byte	.LVL163
+.LLST53:
+	.8byte	.LVL140
+	.8byte	.LVL143
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL163
+	.8byte	.LVL143
 	.8byte	.LFE248
 	.2byte	0x4
 	.byte	0xf3
@@ -48395,13 +48433,13 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST60:
-	.8byte	.LVL162
-	.8byte	.LVL165
+.LLST54:
+	.8byte	.LVL142
+	.8byte	.LVL145
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL165
-	.8byte	.LVL166
+	.8byte	.LVL145
+	.8byte	.LVL146
 	.2byte	0x6
 	.byte	0x87
 	.sleb128 0
@@ -48409,8 +48447,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL166
-	.8byte	.LVL167
+	.8byte	.LVL146
+	.8byte	.LVL147
 	.2byte	0xd
 	.byte	0xf3
 	.uleb128 0x1
@@ -48424,15 +48462,30 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL168
+	.8byte	.LVL148
 	.8byte	.LFE248
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST61:
-	.8byte	.LVL169
-	.8byte	.LVL170
+.LLST55:
+	.8byte	.LVL149
+	.8byte	.LVL150
+	.2byte	0x14
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL150
+	.8byte	.LVL151
 	.2byte	0x16
 	.byte	0x83
 	.sleb128 2
@@ -48448,8 +48501,8 @@ __func__.7632:
 	.byte	0x6
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL171
-	.8byte	.LVL172
+	.8byte	.LVL152
+	.8byte	.LVL153
 	.2byte	0xc
 	.byte	0x70
 	.sleb128 0
@@ -48458,11 +48511,11 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x73
+	.byte	0x72
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL172
+	.8byte	.LVL153
 	.8byte	.LFE248
 	.2byte	0xe
 	.byte	0x83
@@ -48474,18 +48527,18 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x36
 	.byte	0x1e
-	.byte	0x73
+	.byte	0x72
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST51:
-	.8byte	.LVL140
-	.8byte	.LVL143
+.LLST45:
+	.8byte	.LVL120
+	.8byte	.LVL123
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL143
+	.8byte	.LVL123
 	.8byte	.LFE247
 	.2byte	0x4
 	.byte	0xf3
@@ -48494,16 +48547,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST52:
-	.8byte	.LVL141
-	.8byte	.LVL142
+.LLST46:
+	.8byte	.LVL121
+	.8byte	.LVL122
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL144
-	.8byte	.LVL154
+	.8byte	.LVL124
+	.8byte	.LVL134
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL154
+	.8byte	.LVL134
 	.8byte	.LFE247
 	.2byte	0x6
 	.byte	0x73
@@ -48514,20 +48567,20 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST53:
-	.8byte	.LVL145
-	.8byte	.LVL146
+.LLST47:
+	.8byte	.LVL125
+	.8byte	.LVL126
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL146
+	.8byte	.LVL126
 	.8byte	.LFE247
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST54:
-	.8byte	.LVL146
-	.8byte	.LVL147
+.LLST48:
+	.8byte	.LVL126
+	.8byte	.LVL127
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -48539,8 +48592,8 @@ __func__.7632:
 	.byte	0x7b
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL148
-	.8byte	.LVL150
+	.8byte	.LVL128
+	.8byte	.LVL130
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -48552,8 +48605,8 @@ __func__.7632:
 	.byte	0x7b
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL151
-	.8byte	.LVL152
+	.8byte	.LVL131
+	.8byte	.LVL132
 	.2byte	0xb
 	.byte	0x71
 	.sleb128 0
@@ -48567,21 +48620,21 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST55:
-	.8byte	.LVL146
-	.8byte	.LVL148
+.LLST49:
+	.8byte	.LVL126
+	.8byte	.LVL128
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL148
-	.8byte	.LVL151
+	.8byte	.LVL128
+	.8byte	.LVL131
 	.2byte	0x1
 	.byte	0x5a
-	.8byte	.LVL151
-	.8byte	.LVL153
+	.8byte	.LVL131
+	.8byte	.LVL133
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL153
-	.8byte	.LVL155
+	.8byte	.LVL133
+	.8byte	.LVL135
 	.2byte	0x5
 	.byte	0x73
 	.sleb128 0
@@ -48590,12 +48643,12 @@ __func__.7632:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST41:
-	.8byte	.LVL108
-	.8byte	.LVL111
+.LLST34:
+	.8byte	.LVL88
+	.8byte	.LVL91
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL111
+	.8byte	.LVL91
 	.8byte	.LFE246
 	.2byte	0x4
 	.byte	0xf3
@@ -48604,65 +48657,43 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST42:
-	.8byte	.LVL109
-	.8byte	.LVL110
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL112
-	.8byte	.LVL129
-	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL129
-	.8byte	.LVL130
-	.2byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
-	.8byte	.LVL130
-	.8byte	.LVL134
+.LLST35:
+	.8byte	.LVL89
+	.8byte	.LVL90
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL134
+	.byte	0x55
+	.8byte	.LVL92
 	.8byte	.LFE246
-	.2byte	0x6
-	.byte	0x74
-	.sleb128 0
-	.byte	0x7d
-	.sleb128 0
-	.byte	0x22
-	.byte	0x9f
+	.2byte	0x1
+	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST43:
-	.8byte	.LVL116
-	.8byte	.LVL118
+.LLST36:
+	.8byte	.LVL96
+	.8byte	.LVL98
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL118
+	.8byte	.LVL98
 	.8byte	.LFE246
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST44:
-	.8byte	.LVL113
-	.8byte	.LVL114
+.LLST37:
+	.8byte	.LVL93
+	.8byte	.LVL94
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL114
-	.8byte	.LVL118
+	.byte	0x57
+	.8byte	.LVL94
+	.8byte	.LVL98
 	.2byte	0x5
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x72
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL118
-	.8byte	.LVL124
+	.8byte	.LVL98
+	.8byte	.LVL105
 	.2byte	0xd
 	.byte	0x70
 	.sleb128 0
@@ -48671,11 +48702,11 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0x1fffe
 	.byte	0x1a
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL126
-	.8byte	.LVL128
+	.8byte	.LVL107
+	.8byte	.LVL109
 	.2byte	0xd
 	.byte	0x70
 	.sleb128 0
@@ -48684,11 +48715,11 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0x1fffe
 	.byte	0x1a
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL130
-	.8byte	.LVL133
+	.8byte	.LVL111
+	.8byte	.LVL113
 	.2byte	0xd
 	.byte	0x70
 	.sleb128 0
@@ -48697,78 +48728,47 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0x1fffe
 	.byte	0x1a
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST45:
-	.8byte	.LVL119
-	.8byte	.LVL120
+.LLST38:
+	.8byte	.LVL101
+	.8byte	.LVL102
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL120
-	.8byte	.LVL122
+	.byte	0x53
+	.8byte	.LVL102
+	.8byte	.LVL105
 	.2byte	0x5
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x81
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL122
-	.8byte	.LVL124
-	.2byte	0xd
-	.byte	0x71
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL126
-	.8byte	.LVL127
+	.8byte	.LVL107
+	.8byte	.LVL109
 	.2byte	0x5
-	.byte	0x7e
-	.sleb128 0
-	.byte	0x81
-	.sleb128 0
-	.byte	0x22
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0xd
-	.byte	0x71
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL130
-	.8byte	.LVL132
-	.2byte	0xd
-	.byte	0x71
+	.8byte	.LVL111
+	.8byte	.LVL113
+	.2byte	0x5
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST46:
-	.8byte	.LVL113
-	.8byte	.LVL114
+.LLST39:
+	.8byte	.LVL93
+	.8byte	.LVL94
 	.2byte	0xe
-	.byte	0x75
+	.byte	0x77
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -48780,10 +48780,10 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL114
-	.8byte	.LVL115
+	.8byte	.LVL94
+	.8byte	.LVL95
 	.2byte	0x13
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x72
 	.sleb128 0
@@ -48800,10 +48800,10 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL115
-	.8byte	.LVL116
+	.8byte	.LVL95
+	.8byte	.LVL96
 	.2byte	0x15
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
 	.byte	0x72
 	.sleb128 0
@@ -48813,7 +48813,7 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x73
+	.byte	0x75
 	.sleb128 4
 	.byte	0x94
 	.byte	0x2
@@ -48822,34 +48822,34 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL116
+	.8byte	.LVL96
 	.8byte	.LFE246
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x57
 	.8byte	0
 	.8byte	0
-.LLST47:
-	.8byte	.LVL119
-	.8byte	.LVL120
+.LLST40:
+	.8byte	.LVL101
+	.8byte	.LVL102
 	.2byte	0xe
-	.byte	0x76
+	.byte	0x73
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
+	.byte	0x83
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL120
-	.8byte	.LVL121
+	.8byte	.LVL102
+	.8byte	.LVL103
 	.2byte	0x13
-	.byte	0x7e
+	.byte	0x80
 	.sleb128 0
-	.byte	0x81
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48857,28 +48857,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
+	.byte	0x83
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL121
-	.8byte	.LVL123
+	.8byte	.LVL103
+	.8byte	.LVL104
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL123
-	.8byte	.LVL124
-	.2byte	0x25
-	.byte	0x71
+	.byte	0x53
+	.8byte	.LVL104
+	.8byte	.LVL105
+	.2byte	0x29
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48886,13 +48881,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
-	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8e
+	.byte	0x7b
 	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x8
 	.byte	0x20
 	.byte	0x24
@@ -48903,21 +48908,16 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL126
-	.8byte	.LVL127
+	.8byte	.LVL107
+	.8byte	.LVL108
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL127
-	.8byte	.LVL128
-	.2byte	0x25
-	.byte	0x71
+	.byte	0x53
+	.8byte	.LVL108
+	.8byte	.LVL109
+	.2byte	0x29
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48925,13 +48925,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
-	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8e
+	.byte	0x7b
 	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x8
 	.byte	0x20
 	.byte	0x24
@@ -48942,17 +48952,12 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL130
-	.8byte	.LVL132
-	.2byte	0x25
-	.byte	0x71
+	.8byte	.LVL111
+	.8byte	.LVL112
+	.2byte	0x29
+	.byte	0x80
 	.sleb128 0
-	.byte	0x31
-	.byte	0x24
-	.byte	0xc
-	.4byte	0x1fffe
-	.byte	0x1a
-	.byte	0x7e
+	.byte	0x8e
 	.sleb128 0
 	.byte	0x22
 	.byte	0x94
@@ -48960,13 +48965,23 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x8e
-	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x7a
-	.sleb128 0
-	.byte	0x8e
+	.byte	0x7b
 	.sleb128 0
+	.byte	0x74
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x8
 	.byte	0x20
 	.byte	0x24
@@ -48979,75 +48994,99 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST48:
-	.8byte	.LVL117
-	.8byte	.LVL125
+.LLST41:
+	.8byte	.LVL97
+	.8byte	.LVL106
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL125
-	.8byte	.LVL126
+	.8byte	.LVL106
+	.8byte	.LVL107
 	.2byte	0x5
-	.byte	0x74
+	.byte	0x76
 	.sleb128 0
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL126
-	.8byte	.LVL129
+	.8byte	.LVL107
+	.8byte	.LVL110
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL130
-	.8byte	.LVL133
+	.8byte	.LVL111
+	.8byte	.LVL113
 	.2byte	0x1
-	.byte	0x56
-	.8byte	.LVL133
-	.8byte	.LVL135
+	.byte	0x53
+	.8byte	.LVL113
+	.8byte	.LVL115
 	.2byte	0x5
-	.byte	0x74
+	.byte	0x76
 	.sleb128 0
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST39:
-	.8byte	.LVL103
-	.8byte	.LVL105
-	.2byte	0x3
-	.byte	0x9
-	.byte	0xff
+.LLST42:
+	.8byte	.LVL88
+	.8byte	.LVL98
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL105
-	.8byte	.LVL106
+	.8byte	.LVL98
+	.8byte	.LVL99
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL106
-	.8byte	.LVL107
+	.byte	0x52
+	.8byte	.LVL100
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL111
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST191:
+	.8byte	.LVL716
+	.8byte	.LVL717
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL107
-	.8byte	.LFE243
+	.8byte	.LVL718
+	.8byte	.LVL723
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL723
+	.8byte	.LVL725
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL727
+	.8byte	.LFE243
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST40:
-	.8byte	.LVL104
-	.8byte	.LVL106
-	.2byte	0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.byte	0x9f
+.LLST192:
+	.8byte	.LVL720
+	.8byte	.LVL721
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL721
+	.8byte	.LVL724
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL727
+	.8byte	.LFE243
+	.2byte	0x1
+	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST36:
-	.8byte	.LVL96
-	.8byte	.LVL99
+.LLST31:
+	.8byte	.LVL81
+	.8byte	.LVL84
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL99
+	.8byte	.LVL84
 	.8byte	.LFE242
 	.2byte	0x4
 	.byte	0xf3
@@ -49056,182 +49095,56 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST37:
-	.8byte	.LVL96
-	.8byte	.LVL102
+.LLST32:
+	.8byte	.LVL81
+	.8byte	.LVL87
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL102
+	.8byte	.LVL87
 	.8byte	.LFE242
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST38:
-	.8byte	.LVL97
-	.8byte	.LVL98
+.LLST33:
+	.8byte	.LVL82
+	.8byte	.LVL83
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL100
+	.8byte	.LVL85
 	.8byte	.LFE242
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST30:
-	.8byte	.LVL75
-	.8byte	.LVL76
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
 	.8byte	.LVL76
 	.8byte	.LVL77
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL77
-	.8byte	.LVL78
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL78
-	.8byte	.LVL81
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL81
-	.8byte	.LVL82
-	.2byte	0x3
-	.byte	0x75
-	.sleb128 1
-	.byte	0x9f
-	.8byte	.LVL83
-	.8byte	.LVL87
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL92
-	.8byte	.LFE241
-	.2byte	0x1
-	.byte	0x50
-	.8byte	0
-	.8byte	0
-.LLST31:
-	.8byte	.LVL83
-	.8byte	.LVL85
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL85
-	.8byte	.LVL88
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL92
-	.8byte	.LFE241
-	.2byte	0x1
-	.byte	0x51
-	.8byte	0
-	.8byte	0
-.LLST32:
-	.8byte	.LVL84
-	.8byte	.LVL85
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL85
-	.8byte	.LVL86
-	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL92
-	.8byte	.LVL94
+	.8byte	.LVL78
+	.8byte	.LVL79
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL95
+	.8byte	.LVL80
 	.8byte	.LFE241
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
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-	.8byte	.LVL79
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-	.8byte	.LVL89
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-	.byte	0x5b
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-	.8byte	0
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-	.8byte	.LVL678
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-	.uleb128 0x1
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-	.8byte	.LVL678
-	.8byte	.LVL681-1
-	.2byte	0x1
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-	.8byte	.LVL681-1
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-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x51
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-	.8byte	.LVL680
-	.8byte	.LVL686
-	.2byte	0xa
-	.byte	0x3
-	.8byte	gSysFreeQueue
-	.byte	0x9f
-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL682
-	.8byte	.LVL683
-	.2byte	0x1
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-	.8byte	.LVL685
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-	.8byte	0
-	.8byte	0
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-	.8byte	.LVL807
-	.8byte	.LVL808
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+	.8byte	.LVL809
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 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL808
-	.8byte	.LVL809-1
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 	.2byte	0x9
 	.byte	0x3
 	.8byte	gSysFreeQueue
-	.8byte	.LVL809-1
+	.8byte	.LVL811-1
 	.8byte	.LFE237
 	.2byte	0x4
 	.byte	0xf3
@@ -49240,23 +49153,23 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL620
-	.8byte	.LVL624
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+	.8byte	.LVL597
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-	.8byte	.LVL631
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 	.uleb128 0x1
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 	.byte	0x9f
-	.8byte	.LVL631
-	.8byte	.LVL633
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-	.8byte	.LVL633
+	.8byte	.LVL610
 	.8byte	.LFE236
 	.2byte	0x4
 	.byte	0xf3
@@ -49265,69 +49178,69 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL620
-	.8byte	.LVL621
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-	.8byte	.LVL630
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-	.8byte	.LVL630
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 	.uleb128 0x1
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 	.byte	0x9f
-	.8byte	.LVL631
-	.8byte	.LVL632
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 	.2byte	0x1
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-	.8byte	.LVL632
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-	.8byte	.LVL625
-	.8byte	.LVL627
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+	.8byte	.LVL602
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 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
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-	.8byte	.LVL628
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+	.8byte	.LVL605
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL633
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 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL625
-	.8byte	.LVL629
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+	.8byte	.LVL602
+	.8byte	.LVL606
 	.2byte	0x1
 	.byte	0x63
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-	.8byte	.LVL636
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 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL637
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 	.8byte	.LFE236
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL634
-	.8byte	.LVL638
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+	.8byte	.LVL611
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 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL638
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 	.8byte	.LFE236
 	.2byte	0x3
 	.byte	0x84
@@ -49335,9 +49248,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL622
-	.8byte	.LVL623
+.LLST159:
+	.8byte	.LVL599
+	.8byte	.LVL600
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -49613,179 +49526,179 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1548
-	.8byte	.LVL1549
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 	.sleb128 -1
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-	.8byte	.LVL1585
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-	.8byte	.LVL1537
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-	.8byte	.LVL1534
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-	.8byte	.LVL1533
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 	.2byte	0x1
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-	.8byte	.LVL1543
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-	.8byte	.LVL1546
+	.8byte	.LVL1548
 	.8byte	.LFE229
 	.2byte	0x1
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@@ -49823,102 +49736,102 @@ __func__.7632:
 	.byte	0x55
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 	.sleb128 -1
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 	.sleb128 1
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+	.8byte	.LVL1266
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-	.8byte	.LVL799
-	.8byte	.LVL800
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+	.8byte	.LVL802
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 	.2byte	0x1
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-	.8byte	.LVL805
+	.8byte	.LVL807
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -49927,16 +49840,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL799
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 	.8byte	.LVL801
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 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL801
-	.8byte	.LVL804
+	.8byte	.LVL803
+	.8byte	.LVL806
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL804
+	.8byte	.LVL806
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -50269,16 +50182,16 @@ __func__.7632:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL2070
-	.8byte	.LVL2073
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+	.8byte	.LVL2053
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2073
-	.8byte	.LVL2074-1
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 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2074-1
+	.8byte	.LVL2054-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50287,16 +50200,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL2070
-	.8byte	.LVL2072
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-	.8byte	.LVL2072
-	.8byte	.LVL2074-1
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 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2074-1
+	.8byte	.LVL2054-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50305,16 +50218,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL2070
-	.8byte	.LVL2071
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 	.2byte	0x1
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-	.8byte	.LVL2071
-	.8byte	.LVL2074-1
+	.8byte	.LVL2051
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 	.2byte	0x1
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-	.8byte	.LVL2074-1
+	.8byte	.LVL2054-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50323,16 +50236,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST442:
-	.8byte	.LVL1980
-	.8byte	.LVL1983
+.LLST441:
+	.8byte	.LVL1976
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1983
-	.8byte	.LVL1984-1
+	.8byte	.LVL1979
+	.8byte	.LVL1980-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1984-1
+	.8byte	.LVL1980-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50341,16 +50254,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST443:
-	.8byte	.LVL1980
-	.8byte	.LVL1982
+.LLST442:
+	.8byte	.LVL1976
+	.8byte	.LVL1978
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1982
-	.8byte	.LVL1984-1
+	.8byte	.LVL1978
+	.8byte	.LVL1980-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1984-1
+	.8byte	.LVL1980-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50359,16 +50272,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST444:
-	.8byte	.LVL1980
-	.8byte	.LVL1981
+.LLST443:
+	.8byte	.LVL1976
+	.8byte	.LVL1977
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1981
-	.8byte	.LVL1984-1
+	.8byte	.LVL1977
+	.8byte	.LVL1980-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1984-1
+	.8byte	.LVL1980-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50377,61 +50290,64 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST400:
-	.8byte	.LVL1740
-	.8byte	.LVL1742
+.LLST387:
+	.8byte	.LVL1689
+	.8byte	.LVL1691
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1742
-	.8byte	.LVL1743
-	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1743
-	.8byte	.LVL1745
+	.8byte	.LVL1691
+	.8byte	.LVL1693
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1745
-	.8byte	.LVL1748
+	.8byte	.LVL1693
+	.8byte	.LVL1695
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1748
-	.8byte	.LVL1763
+	.byte	0x50
+	.8byte	.LVL1695
+	.8byte	.LVL1710
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1763
-	.8byte	.LFE218
+	.8byte	.LVL1710
+	.8byte	.LVL1711
 	.2byte	0x1
-	.byte	0x64
+	.byte	0x50
+	.8byte	.LVL1711
+	.8byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST401:
-	.8byte	.LVL1740
-	.8byte	.LVL1741
+.LLST388:
+	.8byte	.LVL1689
+	.8byte	.LVL1690
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1741
-	.8byte	.LVL1744
+	.8byte	.LVL1690
+	.8byte	.LVL1692
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1745
+	.8byte	.LVL1693
 	.8byte	.LFE218
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST402:
-	.8byte	.LVL1748
-	.8byte	.LVL1753
+.LLST389:
+	.8byte	.LVL1695
+	.8byte	.LVL1700
 	.2byte	0x1
-	.byte	0x64
-	.8byte	.LVL1753
-	.8byte	.LVL1754
+	.byte	0x50
+	.8byte	.LVL1700
+	.8byte	.LVL1701
 	.2byte	0x2a
 	.byte	0xf3
 	.uleb128 0x1
@@ -50462,16 +50378,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST403:
-	.8byte	.LVL1749
-	.8byte	.LVL1750
+.LLST390:
+	.8byte	.LVL1696
+	.8byte	.LVL1697
 	.2byte	0x25
 	.byte	0x71
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x84
+	.byte	0x70
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -50494,8 +50410,8 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL1750
-	.8byte	.LVL1752
+	.8byte	.LVL1697
+	.8byte	.LVL1699
 	.2byte	0x2e
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -50504,7 +50420,7 @@ __func__.7632:
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x84
+	.byte	0x70
 	.sleb128 0
 	.byte	0xa
 	.2byte	0xffff
@@ -50529,26 +50445,26 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST404:
-	.8byte	.LVL1747
-	.8byte	.LVL1763
+.LLST391:
+	.8byte	.LVL1694
+	.8byte	.LVL1710
 	.2byte	0x1
-	.byte	0x65
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST405:
-	.8byte	.LVL1759
-	.8byte	.LVL1760-1
+.LLST392:
+	.8byte	.LVL1706
+	.8byte	.LVL1707-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST445:
-	.8byte	.LVL1985
-	.8byte	.LVL1988
+.LLST444:
+	.8byte	.LVL1981
+	.8byte	.LVL1982
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1988
+	.8byte	.LVL1982
 	.8byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50557,196 +50473,211 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST446:
+.LLST445:
+	.8byte	.LVL1981
+	.8byte	.LVL1983
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1983
 	.8byte	.LVL1985
-	.8byte	.LVL1987
 	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1985
+	.8byte	.LVL1988
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
 	.byte	0x51
-	.8byte	.LVL1987
+	.byte	0x9f
+	.8byte	.LVL1988
 	.8byte	.LVL1989
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1992
-	.8byte	.LVL1995
-	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1995
-	.8byte	.LVL2004
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2011
-	.8byte	.LVL2017
+	.8byte	.LVL1989
+	.8byte	.LVL1997
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2018
-	.8byte	.LVL2069
+	.byte	0x65
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL1998
+	.8byte	.LVL2042
 	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL2069
+	.byte	0x65
+	.8byte	.LVL2042
+	.8byte	.LVL2049
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL2049
 	.8byte	.LFE217
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST447:
-	.8byte	.LVL1985
-	.8byte	.LVL1986
+.LLST446:
+	.8byte	.LVL1981
+	.8byte	.LVL1984
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1986
-	.8byte	.LVL1990
-	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1992
-	.8byte	.LVL1993
+	.8byte	.LVL1984
+	.8byte	.LVL1987
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 352
+	.8byte	.LVL1987
+	.8byte	.LVL1988
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 112
+	.8byte	.LVL1988
+	.8byte	.LVL1995
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1993
+	.8byte	.LVL1995
+	.8byte	.LVL2049
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 352
+	.8byte	.LVL2049
 	.8byte	.LFE217
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST448:
-	.8byte	.LVL1985
-	.8byte	.LVL1989-1
+.LLST447:
+	.8byte	.LVL1981
+	.8byte	.LVL1985-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1989-1
-	.8byte	.LVL1991
+	.8byte	.LVL1985-1
+	.8byte	.LVL1986
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1992
-	.8byte	.LVL1994
+	.byte	0x6a
+	.8byte	.LVL1986
+	.8byte	.LVL1988
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL1988
+	.8byte	.LVL1995
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1994
-	.8byte	.LVL2069
+	.8byte	.LVL1995
+	.8byte	.LVL2049
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL2069
+	.byte	0x6a
+	.8byte	.LVL2049
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST449:
-	.8byte	.LVL2047
-	.8byte	.LVL2069
+.LLST448:
+	.8byte	.LVL2020
+	.8byte	.LVL2041
 	.2byte	0x1
-	.byte	0x6b
+	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST450:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
+.LLST449:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
 	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2001
-	.8byte	.LVL2003
+	.byte	0x69
+	.8byte	.LVL1995
+	.8byte	.LVL1997
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL2024
-	.8byte	.LVL2069
+	.8byte	.LVL1998
+	.8byte	.LVL2043
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST451:
-	.8byte	.LVL1996
-	.8byte	.LVL2005
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2011
-	.8byte	.LVL2017
-	.2byte	0x1
-	.byte	0x65
-	.8byte	.LVL2018
-	.8byte	.LVL2069
+.LLST450:
+	.8byte	.LVL1990
+	.8byte	.LVL2049
 	.2byte	0x1
-	.byte	0x65
+	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST452:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST451:
+	.8byte	.LVL1991
+	.8byte	.LVL1992
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1998
-	.8byte	.LVL2069
+	.8byte	.LVL1992
+	.8byte	.LVL2049
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 344
+	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST453:
-	.8byte	.LVL2045
-	.8byte	.LVL2046
+.LLST452:
+	.8byte	.LVL2018
+	.8byte	.LVL2019
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2046
-	.8byte	.LVL2048
+	.8byte	.LVL2019
+	.8byte	.LVL2021
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.8byte	.LVL2048
-	.8byte	.LVL2049-1
+	.8byte	.LVL2021
+	.8byte	.LVL2022-1
 	.2byte	0xf
 	.byte	0x3
 	.8byte	req_prgm
 	.byte	0x6
-	.byte	0x87
+	.byte	0x8b
 	.sleb128 0
 	.byte	0x22
 	.byte	0x23
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST454:
-	.8byte	.LVL2035
-	.8byte	.LVL2040
+.LLST453:
+	.8byte	.LVL2008
+	.8byte	.LVL2013
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2043
-	.8byte	.LVL2055
+	.8byte	.LVL2016
+	.8byte	.LVL2028
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2055
-	.8byte	.LVL2056
+	.8byte	.LVL2028
+	.8byte	.LVL2029
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2056
-	.8byte	.LVL2069
+	.8byte	.LVL2029
+	.8byte	.LVL2041
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
 	.8byte	0
 	.8byte	0
-.LLST455:
-	.8byte	.LVL1999
-	.8byte	.LVL2016
-	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL2016
-	.8byte	.LVL2017
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL2018
-	.8byte	.LVL2024
-	.2byte	0x1
-	.byte	0x67
-	.8byte	.LVL2024
-	.8byte	.LVL2069
+.LLST454:
+	.8byte	.LVL1993
+	.8byte	.LVL2049
 	.2byte	0x1
-	.byte	0x6a
+	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST456:
-	.8byte	.LVL2031
-	.8byte	.LVL2032
+.LLST455:
+	.8byte	.LVL2004
+	.8byte	.LVL2005
 	.2byte	0x21
 	.byte	0x83
 	.sleb128 7
@@ -50761,7 +50692,7 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0xffffffff
 	.byte	0x1a
-	.byte	0x8a
+	.byte	0x88
 	.sleb128 0
 	.byte	0x16
 	.byte	0x14
@@ -50774,155 +50705,122 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL2032
-	.8byte	.LVL2033
+	.8byte	.LVL2005
+	.8byte	.LVL2006
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2033
-	.8byte	.LVL2036
+	.8byte	.LVL2006
+	.8byte	.LVL2009
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 336
-	.8byte	.LVL2036
-	.8byte	.LVL2040
+	.sleb128 324
+	.8byte	.LVL2009
+	.8byte	.LVL2013
 	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL2043
-	.8byte	.LVL2069
+	.byte	0x67
+	.8byte	.LVL2016
+	.8byte	.LVL2041
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 336
+	.sleb128 324
 	.8byte	0
 	.8byte	0
-.LLST457:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
+.LLST456:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2012
-	.8byte	.LVL2014
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2014
-	.8byte	.LVL2016-1
-	.2byte	0x16
-	.byte	0x86
-	.sleb128 0
-	.byte	0x3
-	.8byte	c_ftl_nand_sec_pre_page
-	.byte	0x94
-	.byte	0x2
-	.byte	0xa
-	.2byte	0xffff
-	.byte	0x1a
-	.byte	0x85
-	.sleb128 0
-	.byte	0x1e
-	.byte	0x1c
-	.byte	0x9f
-	.8byte	.LVL2050
-	.8byte	.LVL2051
+	.8byte	.LVL2023
+	.8byte	.LVL2024
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2051
-	.8byte	.LVL2053
+	.8byte	.LVL2024
+	.8byte	.LVL2026
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 340
-	.8byte	.LVL2056
-	.8byte	.LVL2058
+	.sleb128 348
+	.8byte	.LVL2029
+	.8byte	.LVL2031
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2058
-	.8byte	.LVL2059
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 340
-	.8byte	.LVL2060
-	.8byte	.LVL2068
+	.sleb128 348
+	.8byte	.LVL2033
+	.8byte	.LVL2040
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 340
+	.sleb128 348
 	.8byte	0
 	.8byte	0
-.LLST458:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL2013
-	.8byte	.LVL2015
-	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL2015
-	.8byte	.LVL2017
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2018
-	.8byte	.LVL2024
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2052
-	.8byte	.LVL2053
+.LLST457:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2025
+	.8byte	.LVL2026
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2057
-	.8byte	.LVL2058
+	.sleb128 356
+	.8byte	.LVL2030
+	.8byte	.LVL2031
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2058
-	.8byte	.LVL2059
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 348
-	.8byte	.LVL2060
-	.8byte	.LVL2068
+	.sleb128 356
+	.8byte	.LVL2033
+	.8byte	.LVL2040
 	.2byte	0x3
 	.byte	0x8f
-	.sleb128 348
+	.sleb128 356
 	.8byte	0
 	.8byte	0
-.LLST459:
-	.8byte	.LVL2000
-	.8byte	.LVL2001
+.LLST458:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2001
-	.8byte	.LVL2006
+	.8byte	.LVL1995
+	.8byte	.LVL1997
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2024
-	.8byte	.LVL2028
+	.8byte	.LVL1998
+	.8byte	.LVL2001
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2030
-	.8byte	.LVL2042
+	.8byte	.LVL2003
+	.8byte	.LVL2015
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2043
-	.8byte	.LVL2069
+	.8byte	.LVL2016
+	.8byte	.LVL2044
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST393:
-	.8byte	.LVL1714
-	.8byte	.LVL1717-1
+.LLST398:
+	.8byte	.LVL1743
+	.8byte	.LVL1746-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1717-1
-	.8byte	.LVL1717
+	.8byte	.LVL1746-1
+	.8byte	.LVL1746
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -4
 	.byte	0x9f
-	.8byte	.LVL1717
+	.8byte	.LVL1746
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50931,12 +50829,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST394:
-	.8byte	.LVL1714
-	.8byte	.LVL1717-1
+.LLST399:
+	.8byte	.LVL1743
+	.8byte	.LVL1746-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1717-1
+	.8byte	.LVL1746-1
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50945,12 +50843,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST395:
-	.8byte	.LVL1714
-	.8byte	.LVL1715
+.LLST400:
+	.8byte	.LVL1743
+	.8byte	.LVL1744
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1715
+	.8byte	.LVL1744
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50959,16 +50857,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST396:
-	.8byte	.LVL1714
-	.8byte	.LVL1716
+.LLST401:
+	.8byte	.LVL1743
+	.8byte	.LVL1745
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1716
-	.8byte	.LVL1733
+	.8byte	.LVL1745
+	.8byte	.LVL1762
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1733
+	.8byte	.LVL1762
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50977,42 +50875,42 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST397:
-	.8byte	.LVL1726
-	.8byte	.LVL1729-1
+.LLST402:
+	.8byte	.LVL1755
+	.8byte	.LVL1758-1
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST398:
-	.8byte	.LVL1718
-	.8byte	.LVL1719
+.LLST403:
+	.8byte	.LVL1747
+	.8byte	.LVL1748
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1728
-	.8byte	.LVL1729-1
+	.8byte	.LVL1757
+	.8byte	.LVL1758-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1729-1
-	.8byte	.LVL1731
+	.8byte	.LVL1758-1
+	.8byte	.LVL1760
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST399:
-	.8byte	.LVL1725
-	.8byte	.LVL1727-1
+.LLST404:
+	.8byte	.LVL1754
+	.8byte	.LVL1756-1
 	.2byte	0x2
 	.byte	0x86
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST425:
-	.8byte	.LVL1931
-	.8byte	.LVL1934
+.LLST424:
+	.8byte	.LVL1927
+	.8byte	.LVL1930
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1934
+	.8byte	.LVL1930
 	.8byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
@@ -51021,139 +50919,139 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST426:
-	.8byte	.LVL1931
-	.8byte	.LVL1933
+.LLST425:
+	.8byte	.LVL1927
+	.8byte	.LVL1929
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL1929
 	.8byte	.LVL1933
-	.8byte	.LVL1937
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1937
-	.8byte	.LVL1940
+	.8byte	.LVL1933
+	.8byte	.LVL1936
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1941
+	.8byte	.LVL1936
+	.8byte	.LVL1937
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1941
+	.8byte	.LVL1937
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST427:
-	.8byte	.LVL1931
-	.8byte	.LVL1932
+.LLST426:
+	.8byte	.LVL1927
+	.8byte	.LVL1928
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1932
-	.8byte	.LVL1939
+	.8byte	.LVL1928
+	.8byte	.LVL1935
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1939
-	.8byte	.LVL1940
+	.8byte	.LVL1935
+	.8byte	.LVL1936
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1942-1
+	.8byte	.LVL1936
+	.8byte	.LVL1942
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1942-1
-	.8byte	.LVL1979
+	.8byte	.LVL1942
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST428:
-	.8byte	.LVL1931
-	.8byte	.LVL1935-1
+.LLST427:
+	.8byte	.LVL1927
+	.8byte	.LVL1931-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1935-1
-	.8byte	.LVL1938
+	.8byte	.LVL1931-1
+	.8byte	.LVL1934
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1938
-	.8byte	.LVL1940
+	.8byte	.LVL1934
+	.8byte	.LVL1936
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1942-1
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1942-1
-	.8byte	.LVL1979
+	.8byte	.LVL1943
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST429:
-	.8byte	.LVL1931
-	.8byte	.LVL1936
+.LLST428:
+	.8byte	.LVL1927
+	.8byte	.LVL1932
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1958
+	.8byte	.LVL1943
+	.8byte	.LVL1954
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1960
-	.8byte	.LVL1979
+	.8byte	.LVL1956
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST430:
-	.8byte	.LVL1943
-	.8byte	.LVL1979
+.LLST429:
+	.8byte	.LVL1938
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST431:
-	.8byte	.LVL1944
-	.8byte	.LVL1979
+.LLST430:
+	.8byte	.LVL1939
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST432:
-	.8byte	.LVL1962
-	.8byte	.LVL1963
+.LLST431:
+	.8byte	.LVL1958
+	.8byte	.LVL1959
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1963
-	.8byte	.LVL1964-1
+	.8byte	.LVL1959
+	.8byte	.LVL1960-1
 	.2byte	0x16
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -51171,53 +51069,53 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST433:
-	.8byte	.LVL1945
-	.8byte	.LVL1947
+.LLST432:
+	.8byte	.LVL1940
+	.8byte	.LVL1943
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1947
-	.8byte	.LVL1979
+	.8byte	.LVL1943
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST434:
-	.8byte	.LVL1954
-	.8byte	.LVL1956
+.LLST433:
+	.8byte	.LVL1950
+	.8byte	.LVL1952
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST435:
-	.8byte	.LVL1945
-	.8byte	.LVL1947
+.LLST434:
+	.8byte	.LVL1940
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1955
+	.8byte	.LVL1943
+	.8byte	.LVL1951
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1961
-	.8byte	.LVL1976
+	.8byte	.LVL1957
+	.8byte	.LVL1972
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST436:
-	.8byte	.LVL1945
-	.8byte	.LVL1946
+.LLST435:
+	.8byte	.LVL1940
+	.8byte	.LVL1941
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1946
-	.8byte	.LVL1952
+	.8byte	.LVL1941
+	.8byte	.LVL1948
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
-	.8byte	.LVL1952
-	.8byte	.LVL1953
+	.8byte	.LVL1948
+	.8byte	.LVL1949
 	.2byte	0x8
 	.byte	0x8f
 	.sleb128 300
@@ -51226,62 +51124,62 @@ __func__.7632:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1961
-	.8byte	.LVL1976
+	.8byte	.LVL1957
+	.8byte	.LVL1972
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
 	.8byte	0
 	.8byte	0
-.LLST437:
-	.8byte	.LVL1931
-	.8byte	.LVL1936
+.LLST436:
+	.8byte	.LVL1927
+	.8byte	.LVL1932
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1968
+	.8byte	.LVL1943
+	.8byte	.LVL1964
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1968
-	.8byte	.LVL1969
+	.8byte	.LVL1964
+	.8byte	.LVL1965
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1969
-	.8byte	.LVL1979
+	.8byte	.LVL1965
+	.8byte	.LVL1975
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST438:
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+.LLST437:
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1969
+	.8byte	.LVL1943
+	.8byte	.LVL1965
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1969
-	.8byte	.LVL1970
+	.8byte	.LVL1965
+	.8byte	.LVL1966
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1970
-	.8byte	.LVL1971
+	.8byte	.LVL1966
+	.8byte	.LVL1967
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -51291,79 +51189,79 @@ __func__.7632:
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1971
-	.8byte	.LVL1972
+	.8byte	.LVL1967
+	.8byte	.LVL1968
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1972
-	.8byte	.LVL1979
+	.8byte	.LVL1968
+	.8byte	.LVL1975
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST439:
-	.8byte	.LVL1940
-	.8byte	.LVL1947
+.LLST438:
+	.8byte	.LVL1936
+	.8byte	.LVL1943
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1947
-	.8byte	.LVL1974
+	.8byte	.LVL1943
+	.8byte	.LVL1970
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1974
-	.8byte	.LVL1975
+	.8byte	.LVL1970
+	.8byte	.LVL1971
 	.2byte	0x1
 	.byte	0x53
+	.8byte	.LVL1971
 	.8byte	.LVL1975
-	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1979
+	.8byte	.LVL1975
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST440:
-	.8byte	.LVL1950
-	.8byte	.LVL1951
+.LLST439:
+	.8byte	.LVL1946
+	.8byte	.LVL1947
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1961
-	.8byte	.LVL1964-1
+	.8byte	.LVL1957
+	.8byte	.LVL1960-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1964-1
-	.8byte	.LVL1965
+	.8byte	.LVL1960-1
+	.8byte	.LVL1961
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 264
-	.8byte	.LVL1966
-	.8byte	.LVL1967
+	.8byte	.LVL1962
+	.8byte	.LVL1963
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST441:
-	.8byte	.LVL1977
-	.8byte	.LVL1978-1
+.LLST440:
+	.8byte	.LVL1973
+	.8byte	.LVL1974-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST469:
-	.8byte	.LVL2170
-	.8byte	.LVL2171
+.LLST468:
+	.8byte	.LVL2151
+	.8byte	.LVL2152
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51371,8 +51269,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2171
-	.8byte	.LVL2172
+	.8byte	.LVL2152
+	.8byte	.LVL2153
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51380,8 +51278,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2172
-	.8byte	.LVL2173
+	.8byte	.LVL2153
+	.8byte	.LVL2154
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51391,118 +51289,118 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST465:
-	.8byte	.LVL2127
-	.8byte	.LVL2128
+.LLST464:
+	.8byte	.LVL2108
+	.8byte	.LVL2109
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2130
-	.8byte	.LVL2131
+	.8byte	.LVL2111
+	.8byte	.LVL2112
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2140
-	.8byte	.LVL2141
+	.8byte	.LVL2121
+	.8byte	.LVL2122
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2141
-	.8byte	.LVL2142-1
+	.8byte	.LVL2122
+	.8byte	.LVL2123-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2144
-	.8byte	.LVL2145
+	.8byte	.LVL2125
+	.8byte	.LVL2126
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2149
-	.8byte	.LVL2150
+	.8byte	.LVL2130
+	.8byte	.LVL2131
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2150
-	.8byte	.LVL2151-1
+	.8byte	.LVL2131
+	.8byte	.LVL2132-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2151
-	.8byte	.LVL2152
+	.8byte	.LVL2132
+	.8byte	.LVL2133
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2152
-	.8byte	.LVL2153
+	.8byte	.LVL2133
+	.8byte	.LVL2134
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2153
-	.8byte	.LVL2154-1
+	.8byte	.LVL2134
+	.8byte	.LVL2135-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2156
-	.8byte	.LVL2157
+	.8byte	.LVL2137
+	.8byte	.LVL2138
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST466:
-	.8byte	.LVL2130
-	.8byte	.LVL2134
+.LLST465:
+	.8byte	.LVL2111
+	.8byte	.LVL2115
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2152
-	.8byte	.LVL2155
+	.8byte	.LVL2133
+	.8byte	.LVL2136
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2156
-	.8byte	.LVL2157
+	.8byte	.LVL2137
+	.8byte	.LVL2138
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST467:
-	.8byte	.LVL2126
-	.8byte	.LVL2127
+.LLST466:
+	.8byte	.LVL2107
+	.8byte	.LVL2108
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2127
-	.8byte	.LVL2129
+	.8byte	.LVL2108
+	.8byte	.LVL2110
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2140
-	.8byte	.LVL2143
+	.8byte	.LVL2121
+	.8byte	.LVL2124
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2144
-	.8byte	.LVL2146
+	.8byte	.LVL2125
+	.8byte	.LVL2127
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2148
-	.8byte	.LVL2149
+	.8byte	.LVL2129
+	.8byte	.LVL2130
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST468:
-	.8byte	.LVL2125
-	.8byte	.LVL2127
+.LLST467:
+	.8byte	.LVL2106
+	.8byte	.LVL2108
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2137
-	.8byte	.LVL2138
+	.8byte	.LVL2118
+	.8byte	.LVL2119
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2139
-	.8byte	.LVL2140
+	.8byte	.LVL2120
+	.8byte	.LVL2121
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST188:
-	.8byte	.LVL688
-	.8byte	.LVL689
+.LLST181:
+	.8byte	.LVL665
+	.8byte	.LVL666
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL689
-	.8byte	.LVL714
+	.8byte	.LVL666
+	.8byte	.LVL691
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL714
+	.8byte	.LVL691
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51511,16 +51409,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST189:
-	.8byte	.LVL688
-	.8byte	.LVL691
+.LLST182:
+	.8byte	.LVL665
+	.8byte	.LVL668
 	.2byte	0x1
 	.byte	0x51
+	.8byte	.LVL668
 	.8byte	.LVL691
-	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL714
+	.8byte	.LVL691
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51529,256 +51427,256 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST190:
-	.8byte	.LVL688
-	.8byte	.LVL692
+.LLST183:
+	.8byte	.LVL665
+	.8byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL695
+	.8byte	.LVL669
+	.8byte	.LVL672
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL696
-	.8byte	.LVL705
+	.8byte	.LVL673
+	.8byte	.LVL682
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL706
-	.8byte	.LVL713
+	.8byte	.LVL683
+	.8byte	.LVL690
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL715
-	.8byte	.LVL726
+	.8byte	.LVL692
+	.8byte	.LVL703
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL727
+	.8byte	.LVL704
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST191:
-	.8byte	.LVL688
-	.8byte	.LVL692
+.LLST184:
+	.8byte	.LVL665
+	.8byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL693
+	.8byte	.LVL669
+	.8byte	.LVL670
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL701
-	.8byte	.LVL702
+	.8byte	.LVL678
+	.8byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL702
-	.8byte	.LVL712
+	.8byte	.LVL679
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL715
-	.8byte	.LVL720
+	.8byte	.LVL692
+	.8byte	.LVL697
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL721
-	.8byte	.LVL728
+	.8byte	.LVL698
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL729
-	.8byte	.LVL734
+	.8byte	.LVL706
+	.8byte	.LVL711
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL735
+	.8byte	.LVL712
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST192:
-	.8byte	.LVL690
-	.8byte	.LVL692
+.LLST185:
+	.8byte	.LVL667
+	.8byte	.LVL669
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL692
-	.8byte	.LVL694-1
+	.8byte	.LVL669
+	.8byte	.LVL671-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL701
-	.8byte	.LVL702
+	.8byte	.LVL678
+	.8byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL702
-	.8byte	.LVL703-1
+	.8byte	.LVL679
+	.8byte	.LVL680-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL703
-	.8byte	.LVL704
+	.8byte	.LVL680
+	.8byte	.LVL681
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL715
-	.8byte	.LVL723
+	.8byte	.LVL692
+	.8byte	.LVL700
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL723
-	.8byte	.LVL724
+	.8byte	.LVL700
+	.8byte	.LVL701
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL725
-	.8byte	.LVL728
+	.8byte	.LVL702
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL729
-	.8byte	.LVL737
+	.8byte	.LVL706
+	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL737
-	.8byte	.LVL738
+	.8byte	.LVL714
+	.8byte	.LVL715
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST193:
-	.8byte	.LVL717
-	.8byte	.LVL722
+.LLST186:
+	.8byte	.LVL694
+	.8byte	.LVL699
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL722
-	.8byte	.LVL725
+	.8byte	.LVL699
+	.8byte	.LVL702
 	.2byte	0x1
 	.byte	0x5e
-	.8byte	.LVL725
-	.8byte	.LVL728
+	.8byte	.LVL702
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL731
-	.8byte	.LVL736
+	.8byte	.LVL708
+	.8byte	.LVL713
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL736
+	.8byte	.LVL713
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x5d
 	.8byte	0
 	.8byte	0
-.LLST194:
-	.8byte	.LVL688
-	.8byte	.LVL699
+.LLST187:
+	.8byte	.LVL665
+	.8byte	.LVL676
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL700
+	.8byte	.LVL676
+	.8byte	.LVL677
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL701
-	.8byte	.LVL712
+	.8byte	.LVL678
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST195:
-	.8byte	.LVL688
-	.8byte	.LVL701
+.LLST188:
+	.8byte	.LVL665
+	.8byte	.LVL678
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL701
-	.8byte	.LVL708
+	.8byte	.LVL678
+	.8byte	.LVL685
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL709
-	.8byte	.LVL710
+	.8byte	.LVL686
+	.8byte	.LVL687
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST196:
-	.8byte	.LVL688
-	.8byte	.LVL700
+.LLST189:
+	.8byte	.LVL665
+	.8byte	.LVL677
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL701
-	.8byte	.LVL712
+	.8byte	.LVL678
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST197:
-	.8byte	.LVL688
-	.8byte	.LVL698
+.LLST190:
+	.8byte	.LVL665
+	.8byte	.LVL675
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL698
-	.8byte	.LVL700
+	.8byte	.LVL675
+	.8byte	.LVL677
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL701
-	.8byte	.LVL712
+	.8byte	.LVL678
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL715
-	.8byte	.LVL729
+	.8byte	.LVL692
+	.8byte	.LVL706
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL729
+	.8byte	.LVL706
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST201:
-	.8byte	.LVL796
-	.8byte	.LVL797
+.LLST200:
+	.8byte	.LVL798
+	.8byte	.LVL799
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST202:
-	.8byte	.LVL743
-	.8byte	.LVL749
+.LLST201:
+	.8byte	.LVL745
+	.8byte	.LVL751
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL750
-	.8byte	.LVL757
+	.8byte	.LVL752
+	.8byte	.LVL759
 	.2byte	0x7
 	.byte	0x83
 	.sleb128 0
@@ -51786,20 +51684,20 @@ __func__.7632:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL759
-	.8byte	.LVL762
+	.8byte	.LVL761
+	.8byte	.LVL764
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL766
 	.8byte	.LVL768
+	.8byte	.LVL770
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL768
-	.8byte	.LVL769-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL770
 	.8byte	.LVL771-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL772
+	.8byte	.LVL773-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51808,8 +51706,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL778
-	.8byte	.LVL779
+	.8byte	.LVL780
+	.8byte	.LVL781
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_map_region_num
@@ -51821,12 +51719,12 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL779
-	.8byte	.LVL780-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL781
 	.8byte	.LVL782-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL783
+	.8byte	.LVL784-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51835,8 +51733,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL783
-	.8byte	.LVL784
+	.8byte	.LVL785
+	.8byte	.LVL786
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51848,12 +51746,12 @@ __func__.7632:
 	.byte	0x34
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL784
-	.8byte	.LVL785-1
+	.8byte	.LVL786
+	.8byte	.LVL787-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL786
-	.8byte	.LVL787
+	.8byte	.LVL788
+	.8byte	.LVL789
 	.2byte	0x20
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51871,12 +51769,12 @@ __func__.7632:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL787
-	.8byte	.LVL788-1
+	.8byte	.LVL789
+	.8byte	.LVL790-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL789
-	.8byte	.LVL790
+	.8byte	.LVL791
+	.8byte	.LVL792
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_blk_pre_plane
@@ -51888,12 +51786,12 @@ __func__.7632:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL790
-	.8byte	.LVL791-1
+	.8byte	.LVL792
+	.8byte	.LVL793-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL792
-	.8byte	.LVL793
+	.8byte	.LVL794
+	.8byte	.LVL795
 	.2byte	0x15
 	.byte	0x3
 	.8byte	c_ftl_nand_die_num
@@ -51908,8 +51806,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL793
-	.8byte	.LVL794
+	.8byte	.LVL795
+	.8byte	.LVL796
 	.2byte	0x26
 	.byte	0x3
 	.8byte	c_ftl_nand_blks_per_die
@@ -51933,8 +51831,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL794
-	.8byte	.LVL795-1
+	.8byte	.LVL796
+	.8byte	.LVL797-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
@@ -52049,16 +51947,16 @@ __func__.7632:
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST112:
-	.8byte	.LVL468
-	.8byte	.LVL470-1
+.LLST102:
+	.8byte	.LVL443
+	.8byte	.LVL445-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL470-1
-	.8byte	.LVL475
+	.8byte	.LVL445-1
+	.8byte	.LVL450
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL475
+	.8byte	.LVL450
 	.8byte	.LFE201
 	.2byte	0x4
 	.byte	0xf3
@@ -52067,21 +51965,21 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST113:
-	.8byte	.LVL469
-	.8byte	.LVL470-1
+.LLST103:
+	.8byte	.LVL444
+	.8byte	.LVL445-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL470-1
-	.8byte	.LVL471
+	.8byte	.LVL445-1
+	.8byte	.LVL446
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL471
-	.8byte	.LVL472
+	.8byte	.LVL446
+	.8byte	.LVL447
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL472
-	.8byte	.LVL473
+	.8byte	.LVL447
+	.8byte	.LVL448
 	.2byte	0xc
 	.byte	0x70
 	.sleb128 0
@@ -52095,118 +51993,118 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL473
-	.8byte	.LVL474
+	.8byte	.LVL448
+	.8byte	.LVL449
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST107:
-	.8byte	.LVL316
-	.8byte	.LVL318-1
+.LLST97:
+	.8byte	.LVL291
+	.8byte	.LVL293-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL318-1
-	.8byte	.LVL451
+	.8byte	.LVL293-1
+	.8byte	.LVL426
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL451
-	.8byte	.LVL452
+	.8byte	.LVL426
+	.8byte	.LVL427
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL452
+	.8byte	.LVL427
 	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST108:
-	.8byte	.LVL456
-	.8byte	.LVL457
+.LLST98:
+	.8byte	.LVL431
+	.8byte	.LVL432
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL457
-	.8byte	.LVL458
+	.8byte	.LVL432
+	.8byte	.LVL433
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL458
-	.8byte	.LVL459-1
+	.8byte	.LVL433
+	.8byte	.LVL434-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL459-1
-	.8byte	.LVL461
+	.8byte	.LVL434-1
+	.8byte	.LVL436
 	.2byte	0x3
 	.byte	0x87
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL461
-	.8byte	.LVL462
+	.8byte	.LVL436
+	.8byte	.LVL437
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL464
-	.8byte	.LVL465
+	.8byte	.LVL439
+	.8byte	.LVL440
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL465
-	.8byte	.LVL466-1
+	.8byte	.LVL440
+	.8byte	.LVL441-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL466-1
-	.8byte	.LVL467
+	.8byte	.LVL441-1
+	.8byte	.LVL442
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL467
+	.8byte	.LVL442
 	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST109:
-	.8byte	.LVL317
-	.8byte	.LVL318-1
+.LLST99:
+	.8byte	.LVL292
+	.8byte	.LVL293-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL318-1
-	.8byte	.LVL319
+	.8byte	.LVL293-1
+	.8byte	.LVL294
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL319
-	.8byte	.LVL431
+	.8byte	.LVL294
+	.8byte	.LVL406
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL431
-	.8byte	.LVL450
+	.8byte	.LVL406
+	.8byte	.LVL425
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL452
+	.8byte	.LVL427
 	.8byte	.LFE200
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST110:
-	.8byte	.LVL456
-	.8byte	.LVL459-1
+.LLST100:
+	.8byte	.LVL431
+	.8byte	.LVL434-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL461
-	.8byte	.LVL463
+	.8byte	.LVL436
+	.8byte	.LVL438
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST111:
-	.8byte	.LVL464
-	.8byte	.LVL466-1
+.LLST101:
+	.8byte	.LVL439
+	.8byte	.LVL441-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL467
+	.8byte	.LVL442
 	.8byte	.LFE200
 	.2byte	0xd
 	.byte	0x3
@@ -52248,7 +52146,7 @@ __func__.7632:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL11
-	.8byte	.LFE356
+	.8byte	.LFE355
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52281,12 +52179,12 @@ __func__.7632:
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST49:
-	.8byte	.LVL136
-	.8byte	.LVL137-1
+.LLST43:
+	.8byte	.LVL116
+	.8byte	.LVL117-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL137-1
+	.8byte	.LVL117-1
 	.8byte	.LFE245
 	.2byte	0x4
 	.byte	0xf3
@@ -52295,9 +52193,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST50:
-	.8byte	.LVL138
-	.8byte	.LVL139
+.LLST44:
+	.8byte	.LVL118
+	.8byte	.LVL119
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52305,12 +52203,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST56:
-	.8byte	.LVL156
-	.8byte	.LVL157-1
+.LLST50:
+	.8byte	.LVL136
+	.8byte	.LVL137-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL157-1
+	.8byte	.LVL137-1
 	.8byte	.LFE244
 	.2byte	0x4
 	.byte	0xf3
@@ -52319,9 +52217,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST57:
-	.8byte	.LVL158
-	.8byte	.LVL159
+.LLST51:
+	.8byte	.LVL138
+	.8byte	.LVL139
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52329,16 +52227,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST70:
-	.8byte	.LVL198
-	.8byte	.LVL199
+.LLST64:
+	.8byte	.LVL179
+	.8byte	.LVL180
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL199
-	.8byte	.LVL216
+	.8byte	.LVL180
+	.8byte	.LVL202
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL216
+	.8byte	.LVL202
 	.8byte	.LFE252
 	.2byte	0x4
 	.byte	0xf3
@@ -52347,24 +52245,24 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST71:
-	.8byte	.LVL200
-	.8byte	.LVL215
+.LLST65:
+	.8byte	.LVL181
+	.8byte	.LVL201
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST72:
-	.8byte	.LVL206
-	.8byte	.LVL207
+.LLST66:
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0x5
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x36
 	.byte	0x1b
 	.byte	0x9f
-	.8byte	.LVL207
-	.8byte	.LVL213-1
+	.8byte	.LVL192
+	.8byte	.LVL199-1
 	.2byte	0xd
 	.byte	0x86
 	.sleb128 2
@@ -52380,97 +52278,167 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST73:
-	.8byte	.LVL202
-	.8byte	.LVL205-1
-	.2byte	0x13
+.LLST67:
+	.8byte	.LVL183
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL185
+	.8byte	.LVL188
+	.2byte	0xd
 	.byte	0x83
 	.sleb128 0
-	.byte	0xa
-	.2byte	0xffff
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
 	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL188
+	.8byte	.LVL189-1
+	.2byte	0x15
+	.byte	0x83
+	.sleb128 0
 	.byte	0x31
 	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
 	.byte	0x3
 	.8byte	p_valid_page_count_table
 	.byte	0x6
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST74:
-	.8byte	.LVL203
-	.8byte	.LVL211
-	.2byte	0x1
-	.byte	0x64
-	.8byte	0
-	.8byte	0
-.LLST75:
-	.8byte	.LVL206
-	.8byte	.LVL207
-	.2byte	0x11
-	.byte	0x71
+.LLST68:
+	.8byte	.LVL184
+	.8byte	.LVL185
+	.2byte	0xe
+	.byte	0x84
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL185
+	.8byte	.LVL186
+	.2byte	0x1b
+	.byte	0x83
 	.sleb128 0
-	.byte	0x36
-	.byte	0x1b
 	.byte	0x31
 	.byte	0x24
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.byte	0x6
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL207
-	.8byte	.LVL213-1
-	.2byte	0x19
-	.byte	0x86
-	.sleb128 2
 	.byte	0x94
 	.byte	0x2
 	.byte	0xa
 	.2byte	0xffff
 	.byte	0x1a
-	.byte	0x36
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
 	.byte	0x1e
-	.byte	0x36
-	.byte	0x1b
+	.byte	0x9f
+	.8byte	.LVL186
+	.8byte	.LVL187
+	.2byte	0x1d
+	.byte	0x83
+	.sleb128 0
 	.byte	0x31
 	.byte	0x24
-	.byte	0x3
-	.8byte	p_valid_page_count_table
-	.byte	0x6
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
 	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x86
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL187
+	.8byte	.LVL196
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST76:
-	.8byte	.LVL209
-	.8byte	.LVL212
+.LLST69:
+	.8byte	.LVL191
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL193
+	.8byte	.LVL195
+	.2byte	0xe
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL195
+	.8byte	.LVL198
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST77:
+.LLST71:
+	.8byte	.LVL182
 	.8byte	.LVL201
-	.8byte	.LVL215
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST78:
-	.8byte	.LVL206
-	.8byte	.LVL207
+.LLST72:
+	.8byte	.LVL190
+	.8byte	.LVL192
 	.2byte	0xe
 	.byte	0x3
 	.8byte	p_data_block_list_table
 	.byte	0x6
-	.byte	0x71
+	.byte	0x70
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL207
-	.8byte	.LVL208
+	.8byte	.LVL192
+	.8byte	.LVL194
 	.2byte	0x1
-	.byte	0x51
-	.8byte	.LVL208
-	.8byte	.LVL213-1
+	.byte	0x50
+	.8byte	.LVL194
+	.8byte	.LVL199-1
 	.2byte	0x16
 	.byte	0x86
 	.sleb128 2
@@ -52488,78 +52456,88 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST79:
-	.8byte	.LVL217
-	.8byte	.LVL219
+.LLST76:
+	.8byte	.LVL225
+	.8byte	.LVL226
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL219
-	.8byte	.LVL221-1
+	.8byte	.LVL226
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL231
+	.8byte	.LVL232-1
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL221-1
-	.8byte	.LVL222
+	.byte	0x50
+	.8byte	.LVL232-1
+	.8byte	.LFE272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL222
-	.8byte	.LVL224
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL231
+	.8byte	.LVL232-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL232-1
+	.8byte	.LVL232
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL232
+	.8byte	.LVL233
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL224
-	.8byte	.LVL225
+	.byte	0x51
+	.8byte	.LVL233
+	.8byte	.LFE272
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL225
-	.8byte	.LFE255
-	.2byte	0x1
-	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST80:
-	.8byte	.LVL217
-	.8byte	.LVL219
-	.2byte	0x2
-	.byte	0x30
-	.byte	0x9f
-	.8byte	.LVL219
-	.8byte	.LVL221-1
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL222
-	.8byte	.LVL224
-	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL225
-	.8byte	.LVL226
+.LLST83:
+	.8byte	.LVL246
+	.8byte	.LVL248
 	.2byte	0x1
-	.byte	0x55
-	.8byte	.LVL227
-	.8byte	.LFE255
+	.byte	0x50
+	.8byte	.LVL249
+	.8byte	.LFE282
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST81:
-	.8byte	.LVL217
-	.8byte	.LVL218
-	.2byte	0x2
-	.byte	0x70
-	.sleb128 16
+.LLST84:
+	.8byte	.LVL247
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL249
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST82:
-	.8byte	.LVL220
-	.8byte	.LVL221-1
+.LLST112:
+	.8byte	.LVL479
+	.8byte	.LVL481-1
 	.2byte	0x1
-	.byte	0x54
-	.8byte	.LVL221-1
-	.8byte	.LVL222
+	.byte	0x50
+	.8byte	.LVL481-1
+	.8byte	.LFE297
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52567,13 +52545,13 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST86:
-	.8byte	.LVL250
-	.8byte	.LVL251
+.LLST113:
+	.8byte	.LVL480
+	.8byte	.LVL481-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL251
-	.8byte	.LFE266
+	.8byte	.LVL481-1
+	.8byte	.LVL482
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52581,13 +52559,17 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST87:
-	.8byte	.LVL256
-	.8byte	.LVL257-1
+.LLST175:
+	.8byte	.LVL655
+	.8byte	.LVL656
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL257-1
-	.8byte	.LFE272
+	.8byte	.LVL656
+	.8byte	.LVL664
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL664
+	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52595,24 +52577,27 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST88:
-	.8byte	.LVL256
-	.8byte	.LVL257-1
+.LLST176:
+	.8byte	.LVL655
+	.8byte	.LVL658-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL257-1
-	.8byte	.LVL257
+	.8byte	.LVL658-1
+	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL257
-	.8byte	.LVL258
+	.8byte	0
+	.8byte	0
+.LLST177:
+	.8byte	.LVL657
+	.8byte	.LVL658-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL258
-	.8byte	.LFE272
+	.8byte	.LVL658-1
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52620,59 +52605,93 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST93:
-	.8byte	.LVL271
-	.8byte	.LVL273
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL274
-	.8byte	.LFE282
+.LLST178:
+	.8byte	.LVL657
+	.8byte	.LVL663
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST94:
-	.8byte	.LVL272
-	.8byte	.LVL273
+.LLST179:
+	.8byte	.LVL657
+	.8byte	.LVL663
+	.2byte	0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST180:
+	.8byte	.LVL659
+	.8byte	.LVL660
 	.2byte	0x1
-	.byte	0x53
-	.8byte	.LVL274
-	.8byte	.LFE282
+	.byte	0x50
+	.8byte	.LVL660
+	.8byte	.LVL662
 	.2byte	0x1
-	.byte	0x53
+	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST121:
-	.8byte	.LVL502
-	.8byte	.LVL504-1
+.LLST193:
+	.8byte	.LVL729
+	.8byte	.LVL731
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL504-1
-	.8byte	.LFE297
+	.8byte	.LVL731
+	.8byte	.LVL737
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL737
+	.8byte	.LVL738
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
+	.8byte	.LVL738
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST122:
-	.8byte	.LVL503
-	.8byte	.LVL504-1
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL504-1
-	.8byte	.LVL505
-	.2byte	0x4
-	.byte	0xf3
-	.uleb128 0x1
-	.byte	0x50
+.LLST194:
+	.8byte	.LVL729
+	.8byte	.LVL732
+	.2byte	0x2
+	.byte	0x30
 	.byte	0x9f
+	.8byte	.LVL732
+	.8byte	.LVL737
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL738
+	.8byte	.LVL739
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL740
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST253:
-	.8byte	.LVL966
-	.8byte	.LVL970
+.LLST195:
+	.8byte	.LVL729
+	.8byte	.LVL730
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST196:
+	.8byte	.LVL735
+	.8byte	.LVL736
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST252:
+	.8byte	.LVL968
+	.8byte	.LVL972
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52680,8 +52699,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL971
-	.8byte	.LVL972
+	.8byte	.LVL973
+	.8byte	.LVL974
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52689,8 +52708,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL972
-	.8byte	.LVL973
+	.8byte	.LVL974
+	.8byte	.LVL975
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52700,35 +52719,35 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST299:
-	.8byte	.LVL1217
+.LLST298:
 	.8byte	.LVL1219
+	.8byte	.LVL1221
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1219
 	.8byte	.LVL1221
+	.8byte	.LVL1223
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1221
-	.8byte	.LVL1227
+	.8byte	.LVL1223
+	.8byte	.LVL1229
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1227
+	.8byte	.LVL1229
 	.8byte	.LFE344
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST300:
-	.8byte	.LVL1218
-	.8byte	.LVL1221
+.LLST299:
+	.8byte	.LVL1220
+	.8byte	.LVL1223
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1221
-	.8byte	.LVL1226
+	.8byte	.LVL1223
+	.8byte	.LVL1228
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52736,16 +52755,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST320:
-	.8byte	.LVL1310
-	.8byte	.LVL1311
+.LLST319:
+	.8byte	.LVL1312
+	.8byte	.LVL1313
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1311
-	.8byte	.LVL1314
+	.8byte	.LVL1313
+	.8byte	.LVL1316
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1314
+	.8byte	.LVL1316
 	.8byte	.LFE317
 	.2byte	0x4
 	.byte	0xf3
@@ -52754,28 +52773,28 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST321:
-	.8byte	.LVL1312
-	.8byte	.LVL1313
+.LLST320:
+	.8byte	.LVL1314
+	.8byte	.LVL1315
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1315
-	.8byte	.LVL1318
+	.8byte	.LVL1317
+	.8byte	.LVL1320
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1319
+	.8byte	.LVL1321
 	.8byte	.LFE317
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST322:
-	.8byte	.LVL1322
-	.8byte	.LVL1323
+.LLST321:
+	.8byte	.LVL1324
+	.8byte	.LVL1325
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1323
-	.8byte	.LVL1324
+	.8byte	.LVL1325
+	.8byte	.LVL1326
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52783,8 +52802,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL1326
-	.8byte	.LVL1327
+	.8byte	.LVL1328
+	.8byte	.LVL1329
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52794,16 +52813,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST323:
-	.8byte	.LVL1328
-	.8byte	.LVL1329
+.LLST322:
+	.8byte	.LVL1330
+	.8byte	.LVL1331
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1329
-	.8byte	.LVL1337
+	.8byte	.LVL1331
+	.8byte	.LVL1339
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1337
+	.8byte	.LVL1339
 	.8byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -52812,16 +52831,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST324:
-	.8byte	.LVL1330
-	.8byte	.LVL1336
+.LLST323:
+	.8byte	.LVL1332
+	.8byte	.LVL1338
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST327:
-	.8byte	.LVL1350
-	.8byte	.LVL1351-1
+.LLST326:
+	.8byte	.LVL1352
+	.8byte	.LVL1353-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	g_MaxLpn
@@ -52832,9 +52851,9 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST328:
-	.8byte	.LVL1350
-	.8byte	.LVL1351-1
+.LLST327:
+	.8byte	.LVL1352
+	.8byte	.LVL1353-1
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_planes_num
@@ -52846,8 +52865,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1351-1
-	.8byte	.LVL1354
+	.8byte	.LVL1353-1
+	.8byte	.LVL1356
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52857,8 +52876,8 @@ __func__.7632:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1356
 	.8byte	.LVL1358
+	.8byte	.LVL1360
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52870,60 +52889,60 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST329:
-	.8byte	.LVL1352
-	.8byte	.LVL1355
+.LLST328:
+	.8byte	.LVL1354
+	.8byte	.LVL1357
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1356
-	.8byte	.LVL1362
+	.8byte	.LVL1358
+	.8byte	.LVL1364
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST413:
-	.8byte	.LVL1832
-	.8byte	.LVL1834
+.LLST412:
+	.8byte	.LVL1829
+	.8byte	.LVL1831
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1834
-	.8byte	.LVL1847
+	.8byte	.LVL1831
+	.8byte	.LVL1844
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1847
-	.8byte	.LVL1848
+	.8byte	.LVL1844
+	.8byte	.LVL1845
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1848
-	.8byte	.LVL1868
+	.8byte	.LVL1845
+	.8byte	.LVL1865
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1868
-	.8byte	.LVL1870
+	.8byte	.LVL1865
+	.8byte	.LVL1867
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1870
-	.8byte	.LVL1881
+	.8byte	.LVL1867
+	.8byte	.LVL1878
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1881
-	.8byte	.LVL1928
+	.8byte	.LVL1878
+	.8byte	.LVL1924
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1928
-	.8byte	.LVL1929
+	.8byte	.LVL1924
+	.8byte	.LVL1925
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1929
+	.8byte	.LVL1925
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52932,12 +52951,12 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST414:
-	.8byte	.LVL1832
-	.8byte	.LVL1833
+.LLST413:
+	.8byte	.LVL1829
+	.8byte	.LVL1830
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1833
+	.8byte	.LVL1830
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52946,16 +52965,16 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST415:
-	.8byte	.LVL1835
-	.8byte	.LVL1847
+.LLST414:
+	.8byte	.LVL1832
+	.8byte	.LVL1844
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1850
-	.8byte	.LVL1928
+	.8byte	.LVL1847
+	.8byte	.LVL1924
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52963,28 +52982,28 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST416:
-	.8byte	.LVL1835
-	.8byte	.LVL1847
+.LLST415:
+	.8byte	.LVL1832
+	.8byte	.LVL1844
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1850
-	.8byte	.LVL1868
+	.8byte	.LVL1847
+	.8byte	.LVL1865
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1868
-	.8byte	.LVL1870
+	.8byte	.LVL1865
+	.8byte	.LVL1867
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1870
-	.8byte	.LVL1881
+	.8byte	.LVL1867
+	.8byte	.LVL1878
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1881
-	.8byte	.LVL1928
+	.8byte	.LVL1878
+	.8byte	.LVL1924
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52992,120 +53011,120 @@ __func__.7632:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST417:
-	.8byte	.LVL1911
-	.8byte	.LVL1912-1
+.LLST416:
+	.8byte	.LVL1908
+	.8byte	.LVL1909-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1912-1
-	.8byte	.LVL1913
+	.8byte	.LVL1909-1
+	.8byte	.LVL1910
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 272
 	.8byte	0
 	.8byte	0
-.LLST418:
-	.8byte	.LVL1892
-	.8byte	.LVL1893
+.LLST417:
+	.8byte	.LVL1889
+	.8byte	.LVL1890
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1893
-	.8byte	.LVL1906
+	.8byte	.LVL1890
+	.8byte	.LVL1903
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1906
-	.8byte	.LVL1907
+	.8byte	.LVL1903
+	.8byte	.LVL1904
 	.2byte	0x3
 	.byte	0x8b
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1908
-	.8byte	.LVL1928
+	.8byte	.LVL1905
+	.8byte	.LVL1924
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST419:
-	.8byte	.LVL1894
-	.8byte	.LVL1899
+.LLST418:
+	.8byte	.LVL1891
+	.8byte	.LVL1896
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1901
-	.8byte	.LVL1902
+	.8byte	.LVL1898
+	.8byte	.LVL1899
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1903
-	.8byte	.LVL1905
+	.8byte	.LVL1900
+	.8byte	.LVL1902
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST420:
-	.8byte	.LVL1894
-	.8byte	.LVL1896
+.LLST419:
+	.8byte	.LVL1891
+	.8byte	.LVL1893
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1897
-	.8byte	.LVL1904
+	.8byte	.LVL1894
+	.8byte	.LVL1901
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST421:
+.LLST420:
+	.8byte	.LVL1892
 	.8byte	.LVL1895
-	.8byte	.LVL1898
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1898
-	.8byte	.LVL1900
+	.8byte	.LVL1895
+	.8byte	.LVL1897
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
-	.8byte	.LVL1900
-	.8byte	.LVL1901
+	.8byte	.LVL1897
+	.8byte	.LVL1898
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
-.LLST422:
-	.8byte	.LVL1890
-	.8byte	.LVL1928
+.LLST421:
+	.8byte	.LVL1887
+	.8byte	.LVL1924
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST423:
-	.8byte	.LVL1909
-	.8byte	.LVL1910
+.LLST422:
+	.8byte	.LVL1906
+	.8byte	.LVL1907
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 16
-	.8byte	.LVL1910
-	.8byte	.LVL1918
+	.8byte	.LVL1907
+	.8byte	.LVL1915
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST424:
-	.8byte	.LVL1840
-	.8byte	.LVL1841
+.LLST423:
+	.8byte	.LVL1837
+	.8byte	.LVL1838
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST464:
-	.8byte	.LVL2107
-	.8byte	.LVL2108
+.LLST463:
+	.8byte	.LVL2087
+	.8byte	.LVL2088
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2108
-	.8byte	.LVL2114
+	.8byte	.LVL2088
+	.8byte	.LVL2092
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_buffer_superblock
@@ -53122,8 +53141,8 @@ __func__.7632:
 	.2byte	0
 	.8byte	.LFB349
 	.8byte	.LFE349-.LFB349
-	.8byte	.LFB356
-	.8byte	.LFE356-.LFB356
+	.8byte	.LFB355
+	.8byte	.LFE355-.LFB355
 	.8byte	.LFB202
 	.8byte	.LFE202-.LFB202
 	.8byte	.LFB203
@@ -53134,6 +53153,8 @@ __func__.7632:
 	.8byte	.LFE205-.LFB205
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
 	.8byte	.LFB221
 	.8byte	.LFE221-.LFB221
 	.8byte	.LFB222
@@ -53160,8 +53181,6 @@ __func__.7632:
 	.8byte	.LFE241-.LFB241
 	.8byte	.LFB242
 	.8byte	.LFE242-.LFB242
-	.8byte	.LFB243
-	.8byte	.LFE243-.LFB243
 	.8byte	.LFB246
 	.8byte	.LFE246-.LFB246
 	.8byte	.LFB245
@@ -53180,8 +53199,6 @@ __func__.7632:
 	.8byte	.LFE251-.LFB251
 	.8byte	.LFB252
 	.8byte	.LFE252-.LFB252
-	.8byte	.LFB255
-	.8byte	.LFE255-.LFB255
 	.8byte	.LFB260
 	.8byte	.LFE260-.LFB260
 	.8byte	.LFB266
@@ -53248,6 +53265,10 @@ __func__.7632:
 	.8byte	.LFE240-.LFB240
 	.8byte	.LFB209
 	.8byte	.LFE209-.LFB209
+	.8byte	.LFB243
+	.8byte	.LFE243-.LFB243
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
 	.8byte	.LFB346
 	.8byte	.LFE346-.LFB346
 	.8byte	.LFB206
@@ -53342,20 +53363,18 @@ __func__.7632:
 	.8byte	.LFE287-.LFB287
 	.8byte	.LFB269
 	.8byte	.LFE269-.LFB269
-	.8byte	.LFB289
-	.8byte	.LFE289-.LFB289
-	.8byte	.LFB299
-	.8byte	.LFE299-.LFB299
-	.8byte	.LFB215
-	.8byte	.LFE215-.LFB215
-	.8byte	.LFB216
-	.8byte	.LFE216-.LFB216
 	.8byte	.LFB212
 	.8byte	.LFE212-.LFB212
 	.8byte	.LFB213
 	.8byte	.LFE213-.LFB213
 	.8byte	.LFB218
 	.8byte	.LFE218-.LFB218
+	.8byte	.LFB289
+	.8byte	.LFE289-.LFB289
+	.8byte	.LFB299
+	.8byte	.LFE299-.LFB299
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
 	.8byte	.LFB308
 	.8byte	.LFE308-.LFB308
 	.8byte	.LFB311
@@ -53392,112 +53411,130 @@ __func__.7632:
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
-	.8byte	.LBB166
-	.8byte	.LBE166
-	.8byte	.LBB169
-	.8byte	.LBE169
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB170
-	.8byte	.LBE170
-	.8byte	.LBB173
-	.8byte	.LBE173
+	.8byte	.LBB185
+	.8byte	.LBE185
+	.8byte	.LBB188
+	.8byte	.LBE188
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB195
-	.8byte	.LBE195
-	.8byte	.LBB199
-	.8byte	.LBE199
-	.8byte	.LBB200
-	.8byte	.LBE200
+	.8byte	.LBB189
+	.8byte	.LBE189
+	.8byte	.LBB192
+	.8byte	.LBE192
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB209
-	.8byte	.LBE209
+	.8byte	.LBB207
+	.8byte	.LBE207
+	.8byte	.LBB211
+	.8byte	.LBE211
 	.8byte	.LBB212
 	.8byte	.LBE212
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB219
-	.8byte	.LBE219
-	.8byte	.LBB220
-	.8byte	.LBE220
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB225
-	.8byte	.LBE225
-	.8byte	.LBB226
-	.8byte	.LBE226
+	.8byte	.LBB221
+	.8byte	.LBE221
+	.8byte	.LBB224
+	.8byte	.LBE224
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB233
-	.8byte	.LBE233
-	.8byte	.LBB235
-	.8byte	.LBE235
-	.8byte	.LBB236
-	.8byte	.LBE236
-	.8byte	.LBB237
-	.8byte	.LBE237
+	.8byte	.LBB231
+	.8byte	.LBE231
+	.8byte	.LBB232
+	.8byte	.LBE232
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB242
-	.8byte	.LBE242
-	.8byte	.LBB243
-	.8byte	.LBE243
+	.8byte	.LBB246
+	.8byte	.LBE246
+	.8byte	.LBB250
+	.8byte	.LBE250
+	.8byte	.LBB253
+	.8byte	.LBE253
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB251
+	.8byte	.LBE251
 	.8byte	.LBB252
 	.8byte	.LBE252
-	.8byte	.LBB256
-	.8byte	.LBE256
-	.8byte	.LBB257
-	.8byte	.LBE257
-	.8byte	0
+	.8byte	.LBB254
+	.8byte	.LBE254
+	.8byte	.LBB255
+	.8byte	.LBE255
 	.8byte	0
-	.8byte	.LBB266
-	.8byte	.LBE266
-	.8byte	.LBB267
-	.8byte	.LBE267
 	.8byte	0
-	.8byte	0
-	.8byte	.LBB269
-	.8byte	.LBE269
-	.8byte	.LBB271
-	.8byte	.LBE271
+	.8byte	.LBB260
+	.8byte	.LBE260
+	.8byte	.LBB261
+	.8byte	.LBE261
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB268
+	.8byte	.LBE268
 	.8byte	.LBB270
 	.8byte	.LBE270
+	.8byte	.LBB271
+	.8byte	.LBE271
 	.8byte	.LBB272
 	.8byte	.LBE272
-	.8byte	.LBB273
-	.8byte	.LBE273
-	.8byte	.LBB274
-	.8byte	.LBE274
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB277
+	.8byte	.LBE277
+	.8byte	.LBB278
+	.8byte	.LBE278
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB287
+	.8byte	.LBE287
 	.8byte	.LBB291
 	.8byte	.LBE291
-	.8byte	.LBB296
-	.8byte	.LBE296
+	.8byte	.LBB292
+	.8byte	.LBE292
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB301
+	.8byte	.LBE301
+	.8byte	.LBB302
+	.8byte	.LBE302
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB304
+	.8byte	.LBE304
+	.8byte	.LBB306
+	.8byte	.LBE306
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB305
+	.8byte	.LBE305
+	.8byte	.LBB307
+	.8byte	.LBE307
+	.8byte	.LBB308
+	.8byte	.LBE308
+	.8byte	.LBB309
+	.8byte	.LBE309
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB326
+	.8byte	.LBE326
+	.8byte	.LBB331
+	.8byte	.LBE331
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB293
-	.8byte	.LBE293
-	.8byte	.LBB294
-	.8byte	.LBE294
+	.8byte	.LBB328
+	.8byte	.LBE328
+	.8byte	.LBB329
+	.8byte	.LBE329
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB298
-	.8byte	.LBE298
-	.8byte	.LBB299
-	.8byte	.LBE299
+	.8byte	.LBB333
+	.8byte	.LBE333
+	.8byte	.LBB334
+	.8byte	.LBE334
 	.8byte	0
 	.8byte	0
 	.8byte	.LFB349
 	.8byte	.LFE349
-	.8byte	.LFB356
-	.8byte	.LFE356
+	.8byte	.LFB355
+	.8byte	.LFE355
 	.8byte	.LFB202
 	.8byte	.LFE202
 	.8byte	.LFB203
@@ -53508,6 +53545,8 @@ __func__.7632:
 	.8byte	.LFE205
 	.8byte	.LFB208
 	.8byte	.LFE208
+	.8byte	.LFB216
+	.8byte	.LFE216
 	.8byte	.LFB221
 	.8byte	.LFE221
 	.8byte	.LFB222
@@ -53534,8 +53573,6 @@ __func__.7632:
 	.8byte	.LFE241
 	.8byte	.LFB242
 	.8byte	.LFE242
-	.8byte	.LFB243
-	.8byte	.LFE243
 	.8byte	.LFB246
 	.8byte	.LFE246
 	.8byte	.LFB245
@@ -53554,8 +53591,6 @@ __func__.7632:
 	.8byte	.LFE251
 	.8byte	.LFB252
 	.8byte	.LFE252
-	.8byte	.LFB255
-	.8byte	.LFE255
 	.8byte	.LFB260
 	.8byte	.LFE260
 	.8byte	.LFB266
@@ -53622,6 +53657,10 @@ __func__.7632:
 	.8byte	.LFE240
 	.8byte	.LFB209
 	.8byte	.LFE209
+	.8byte	.LFB243
+	.8byte	.LFE243
+	.8byte	.LFB255
+	.8byte	.LFE255
 	.8byte	.LFB346
 	.8byte	.LFE346
 	.8byte	.LFB206
@@ -53716,20 +53755,18 @@ __func__.7632:
 	.8byte	.LFE287
 	.8byte	.LFB269
 	.8byte	.LFE269
-	.8byte	.LFB289
-	.8byte	.LFE289
-	.8byte	.LFB299
-	.8byte	.LFE299
-	.8byte	.LFB215
-	.8byte	.LFE215
-	.8byte	.LFB216
-	.8byte	.LFE216
 	.8byte	.LFB212
 	.8byte	.LFE212
 	.8byte	.LFB213
 	.8byte	.LFE213
 	.8byte	.LFB218
 	.8byte	.LFE218
+	.8byte	.LFB289
+	.8byte	.LFE289
+	.8byte	.LFB299
+	.8byte	.LFE299
+	.8byte	.LFB215
+	.8byte	.LFE215
 	.8byte	.LFB308
 	.8byte	.LFE308
 	.8byte	.LFB311
@@ -53767,37 +53804,37 @@ __func__.7632:
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF728:
+.LASF727:
 	.string	"FtlEctTblFlush"
-.LASF593:
+.LASF592:
 	.string	"gc_page_num"
-.LASF609:
+.LASF608:
 	.string	"superBlk"
-.LASF499:
+.LASF498:
 	.string	"g_gc_bad_block_temp_num"
 .LASF363:
 	.string	"all_blk_used_slc_mode"
 .LASF43:
 	.string	"reserved"
-.LASF508:
+.LASF507:
 	.string	"g_totle_read_sector"
-.LASF574:
+.LASF573:
 	.string	"__func__"
 .LASF419:
 	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF733:
+.LASF732:
 	.string	"nSec"
-.LASF729:
+.LASF728:
 	.string	"forceFlush"
 .LASF107:
 	.string	"bootm_headers"
-.LASF453:
+.LASF452:
 	.string	"p_gc_data_buf"
 .LASF125:
 	.string	"rd_end"
-.LASF492:
+.LASF491:
 	.string	"p_gc_blk_tbl"
-.LASF788:
+.LASF787:
 	.string	"FtlFreeSysBlkQueueOut"
 .LASF324:
 	.string	"ftl_bbt_blk_header"
@@ -53805,33 +53842,33 @@ __func__.7632:
 	.string	"eth_device"
 .LASF306:
 	.string	"sign"
-.LASF833:
+.LASF831:
 	.string	"sctidx"
-.LASF670:
+.LASF669:
 	.string	"Ftl_load_ext_data"
 .LASF96:
 	.string	"ih_comp"
-.LASF587:
+.LASF586:
 	.string	"block"
 .LASF22:
 	.string	"_Bool"
-.LASF652:
+.LASF651:
 	.string	"min_ec"
-.LASF604:
+.LASF603:
 	.string	"req_read_temp"
 .LASF279:
 	.string	"p_spare"
-.LASF686:
+.LASF685:
 	.string	"recovery_cur_page_ver"
-.LASF506:
+.LASF505:
 	.string	"g_totle_write_page_count"
 .LASF245:
 	.string	"net_root_path"
-.LASF625:
+.LASF624:
 	.string	"lookup_ppa"
-.LASF818:
+.LASF816:
 	.string	"FtlBbmTblFlush"
-.LASF612:
+.LASF611:
 	.string	"Ftl_get_new_temp_ppa"
 .LASF327:
 	.string	"ftl_data_blk_header"
@@ -53845,74 +53882,74 @@ __func__.7632:
 	.string	"des_ppa"
 .LASF237:
 	.string	"priv"
-.LASF778:
+.LASF777:
 	.string	"insert_free_list"
-.LASF882:
+.LASF880:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF21:
 	.string	"___strtok"
 .LASF198:
 	.string	"UCLASS_SPI_GENERIC"
-.LASF477:
+.LASF476:
 	.string	"g_l2p_last_update_region_id"
-.LASF699:
+.LASF698:
 	.string	"ftl_sb_update_avl_pages"
-.LASF572:
+.LASF571:
 	.string	"FlashProgPages"
-.LASF857:
+.LASF855:
 	.string	"test_page_num"
-.LASF685:
+.LASF684:
 	.string	"lookup_superblock_id"
 .LASF420:
 	.string	"c_ftl_nand_init_sys_blks_per_plane"
-.LASF866:
+.LASF864:
 	.string	"FtlConstantsInit"
-.LASF596:
+.LASF595:
 	.string	"num_io"
-.LASF869:
+.LASF867:
 	.string	"FtlPrintInfo"
-.LASF745:
+.LASF744:
 	.string	"l2p_flush"
 .LASF378:
 	.string	"rear"
 .LASF305:
 	.string	"ftl_l2p_map_info"
-.LASF521:
+.LASF520:
 	.string	"g_in_swl_replace"
 .LASF404:
 	.string	"c_ftl_nand_page_pre_slc_blk"
 .LASF243:
 	.string	"net_nis_domain"
-.LASF765:
+.LASF764:
 	.string	"List_update_data_list"
-.LASF853:
+.LASF851:
 	.string	"create_first_buffer_superblock"
-.LASF503:
+.LASF502:
 	.string	"g_gc_merge_free_blk_threshold"
-.LASF694:
+.LASF693:
 	.string	"last_mlc_page_version"
-.LASF631:
+.LASF630:
 	.string	"IsBlkInGcList"
 .LASF235:
 	.string	"next"
 .LASF312:
 	.string	"pBlkVpcTbl"
-.LASF698:
+.LASF697:
 	.string	"FtlReUsePrevPpa"
-.LASF659:
+.LASF658:
 	.string	"update_multiplier_value"
 .LASF411:
 	.string	"c_ftl_nand_totle_phy_blks"
-.LASF875:
+.LASF873:
 	.string	"memcmp"
 .LASF421:
 	.string	"c_ftl_nand_max_sys_blks"
-.LASF577:
-	.string	"PhyBlk"
 .LASF576:
+	.string	"PhyBlk"
+.LASF575:
 	.string	"FlashReadPages"
-.LASF479:
+.LASF478:
 	.string	"p_free_data_block_list_head"
 .LASF148:
 	.string	"UCLASS_AHCI"
@@ -53920,29 +53957,29 @@ __func__.7632:
 	.string	"UCLASS_I2C_MUX"
 .LASF263:
 	.string	"uclass_id"
-.LASF601:
+.LASF600:
 	.string	"get_new_gc_superblock"
-.LASF623:
+.LASF622:
 	.string	"BOPS_EN"
 .LASF241:
 	.string	"net_netmask"
-.LASF850:
+.LASF848:
 	.string	"bad_block_cnt"
 .LASF424:
 	.string	"c_ftl_nand_max_data_blks"
-.LASF560:
+.LASF559:
 	.string	"pvTo"
 .LASF117:
 	.string	"fit_noffset_rd"
 .LASF192:
 	.string	"UCLASS_RTC"
-.LASF810:
+.LASF808:
 	.string	"pBbtHeader"
 .LASF46:
 	.string	"bi_memsize"
 .LASF47:
 	.string	"bi_flashstart"
-.LASF762:
+.LASF761:
 	.string	"minValidPageCount"
 .LASF232:
 	.string	"recv"
@@ -53952,11 +53989,11 @@ __func__.7632:
 	.string	"UCLASS_SYSCON"
 .LASF153:
 	.string	"UCLASS_DISPLAY"
-.LASF519:
+.LASF518:
 	.string	"g_max_erase_count"
-.LASF568:
+.LASF567:
 	.string	"flash_type"
-.LASF529:
+.LASF528:
 	.string	"g_recovery_ppa_tbl"
 .LASF71:
 	.string	"IRQ_STACK_START_IN"
@@ -53964,23 +54001,23 @@ __func__.7632:
 	.string	"bi_dram"
 .LASF191:
 	.string	"UCLASS_RKNAND"
-.LASF581:
+.LASF580:
 	.string	"die_index"
-.LASF805:
+.LASF803:
 	.string	"ver2"
 .LASF434:
 	.string	"gSysFreeQueue"
 .LASF159:
 	.string	"UCLASS_I2C_EEPROM"
-.LASF533:
+.LASF532:
 	.string	"g_nand_phy_info"
-.LASF555:
+.LASF554:
 	.string	"check_spare_buf"
 .LASF144:
 	.string	"UCLASS_PCI_EMUL"
 .LASF72:
 	.string	"fdt_header"
-.LASF586:
+.LASF585:
 	.string	"ftl_free"
 .LASF429:
 	.string	"g_MaxLpn"
@@ -53988,23 +54025,23 @@ __func__.7632:
 	.string	"bufferPageOffset"
 .LASF387:
 	.string	"reversed"
-.LASF507:
+.LASF506:
 	.string	"g_totle_write_sector"
 .LASF75:
 	.string	"off_dt_struct"
 .LASF417:
 	.string	"c_ftl_nand_max_vendor_blks"
-.LASF769:
+.LASF768:
 	.string	"prev_valid_page_count"
-.LASF874:
+.LASF872:
 	.string	"FtlPrintInfo2buf"
-.LASF480:
+.LASF479:
 	.string	"p_data_block_list_head"
 .LASF265:
 	.string	"NETLOOP_CONTINUE"
-.LASF807:
+.LASF805:
 	.string	"P2V_plane"
-.LASF486:
+.LASF485:
 	.string	"g_gc_temp_superblock"
 .LASF195:
 	.string	"UCLASS_SPI"
@@ -54012,7 +54049,7 @@ __func__.7632:
 	.string	"c_ftl_nand_max_map_blks"
 .LASF302:
 	.string	"BbtMap"
-.LASF744:
+.LASF743:
 	.string	"found_lpa"
 .LASF209:
 	.string	"UCLASS_VIDEO_CONSOLE"
@@ -54020,31 +54057,31 @@ __func__.7632:
 	.string	"last_refresh_read_count"
 .LASF207:
 	.string	"UCLASS_VIDEO"
-.LASF616:
+.LASF615:
 	.string	"current_ppa"
-.LASF852:
+.LASF850:
 	.string	"create_first_active_superblock"
 .LASF313:
 	.string	"pMapPpnTbl"
 .LASF269:
 	.string	"net_state"
-.LASF725:
+.LASF724:
 	.string	"num_page"
 .LASF425:
 	.string	"ftl_gc_temp_power_lost_recovery_flag"
-.LASF615:
+.LASF614:
 	.string	"totle_num"
-.LASF732:
+.LASF731:
 	.string	"Index"
-.LASF682:
+.LASF681:
 	.string	"next_free_active_page"
-.LASF607:
+.LASF606:
 	.string	"spperBlk"
 .LASF65:
 	.string	"IRQ_STACK_START"
 .LASF132:
 	.string	"verify"
-.LASF714:
+.LASF713:
 	.string	"ftl_set_blk_mode"
 .LASF266:
 	.string	"NETLOOP_RESTART"
@@ -54052,27 +54089,27 @@ __func__.7632:
 	.string	"uint8"
 .LASF353:
 	.string	"write_page_count"
-.LASF611:
+.LASF610:
 	.string	"Ftl_gc_temp_data_write_back"
 .LASF295:
 	.string	"erase_blk"
-.LASF723:
+.LASF722:
 	.string	"re_save_vpndata"
-.LASF463:
+.LASF462:
 	.string	"p_valid_page_count_check_table"
-.LASF502:
+.LASF501:
 	.string	"g_gc_free_blk_threshold"
-.LASF482:
+.LASF481:
 	.string	"g_num_free_superblocks"
 .LASF226:
 	.string	"s_addr"
-.LASF820:
+.LASF818:
 	.string	"re_save_bbmdata"
 .LASF200:
 	.string	"UCLASS_SYSRESET"
-.LASF628:
+.LASF627:
 	.string	"FtlGcUpdatePage"
-.LASF812:
+.LASF810:
 	.string	"FtlLoadFactoryBbt"
 .LASF289:
 	.string	"sec_per_blk"
@@ -54086,11 +54123,11 @@ __func__.7632:
 	.string	"UCLASS_CROS_EC"
 .LASF407:
 	.string	"c_ftl_nand_sec_pre_page_shift"
-.LASF789:
+.LASF790:
 	.string	"IsInFreeQueue"
 .LASF236:
 	.string	"index"
-.LASF746:
+.LASF745:
 	.string	"select_l2p_ram_region"
 .LASF335:
 	.string	"maxDieNum"
@@ -54098,29 +54135,29 @@ __func__.7632:
 	.string	"byte_per_sec"
 .LASF278:
 	.string	"p_data"
-.LASF528:
+.LASF527:
 	.string	"g_recovery_page_min_ver"
-.LASF571:
+.LASF570:
 	.string	"block_size"
 .LASF90:
 	.string	"ih_load"
-.LASF836:
+.LASF834:
 	.string	"FtlProgPages"
-.LASF665:
+.LASF664:
 	.string	"error_flag"
 .LASF403:
 	.string	"c_ftl_nand_page_pre_blk"
-.LASF795:
+.LASF789:
 	.string	"blk_Id"
 .LASF213:
 	.string	"UCLASS_KEY"
-.LASF876:
+.LASF874:
 	.string	"memcpy"
 .LASF67:
 	.string	"_datarel_start_ofs"
 .LASF373:
 	.string	"List_Node"
-.LASF578:
+.LASF577:
 	.string	"p_die"
 .LASF314:
 	.string	"in_gc_mode"
@@ -54132,15 +54169,15 @@ __func__.7632:
 	.string	"UCLASS_IRQ"
 .LASF6:
 	.string	"__u8"
-.LASF494:
+.LASF493:
 	.string	"g_gc_page_offset"
 .LASF240:
 	.string	"net_gateway"
-.LASF803:
+.LASF801:
 	.string	"ftl_cmp_data_ver"
 .LASF430:
 	.string	"g_VaildLpn"
-.LASF471:
+.LASF470:
 	.string	"p_vendor_block_valid_page_count"
 .LASF262:
 	.string	"net_ping_ip"
@@ -54148,41 +54185,41 @@ __func__.7632:
 	.string	"type"
 .LASF40:
 	.string	"lmb_region"
-.LASF633:
+.LASF632:
 	.string	"numREQ"
 .LASF34:
 	.string	"protect"
-.LASF856:
+.LASF854:
 	.string	"max_test_page_num"
-.LASF705:
+.LASF704:
 	.string	"blk_id"
 .LASF349:
 	.string	"GlobalDataVersion"
-.LASF794:
+.LASF793:
 	.string	"erase_flag"
 .LASF362:
 	.string	"last_refresh_data_times"
-.LASF708:
+.LASF707:
 	.string	"totleBlkNum"
-.LASF679:
+.LASF678:
 	.string	"saved_active_page"
-.LASF777:
+.LASF776:
 	.string	"pTmp"
-.LASF605:
+.LASF604:
 	.string	"add_count"
-.LASF547:
+.LASF546:
 	.string	"ftl_gc_temp_block_bops_scan_page_addr"
 .LASF394:
 	.string	"c_ftl_nand_type"
-.LASF774:
+.LASF773:
 	.string	"pHead"
-.LASF688:
+.LASF687:
 	.string	"recovery_flash_mode"
 .LASF138:
 	.string	"UCLASS_TEST"
-.LASF485:
+.LASF484:
 	.string	"g_buffer_superblock"
-.LASF650:
+.LASF649:
 	.string	"node_id"
 .LASF397:
 	.string	"c_ftl_nand_blks_per_die"
@@ -54194,7 +54231,7 @@ __func__.7632:
 	.string	"legacy_hdr_valid"
 .LASF203:
 	.string	"UCLASS_TPM"
-.LASF575:
+.LASF574:
 	.string	"read_req"
 .LASF432:
 	.string	"gBbtInfo"
@@ -54204,23 +54241,23 @@ __func__.7632:
 	.string	"sector_count"
 .LASF406:
 	.string	"c_ftl_nand_sec_pre_page"
-.LASF591:
+.LASF590:
 	.string	"mode"
-.LASF814:
+.LASF812:
 	.string	"FtlLoadBbt"
-.LASF561:
+.LASF560:
 	.string	"pvForm"
 .LASF323:
 	.string	"padding"
-.LASF460:
+.LASF459:
 	.string	"p_swl_mul_table"
-.LASF629:
+.LASF628:
 	.string	"src_ppa"
-.LASF683:
+.LASF682:
 	.string	"detected_active_page"
 .LASF389:
 	.string	"ftl_gc_page_item"
-.LASF549:
+.LASF548:
 	.string	"mem_malloc_start"
 .LASF210:
 	.string	"UCLASS_VIDEO_CRTC"
@@ -54228,127 +54265,125 @@ __func__.7632:
 	.string	"bi_ethspeed"
 .LASF98:
 	.string	"image_header_t"
-.LASF771:
+.LASF770:
 	.string	"pPrev"
-.LASF474:
+.LASF473:
 	.string	"g_totle_vendor_block"
-.LASF624:
+.LASF623:
 	.string	"superblock_id"
-.LASF595:
+.LASF594:
 	.string	"plane"
 .LASF11:
 	.string	"phys_addr_t"
 .LASF95:
 	.string	"ih_type"
-.LASF846:
+.LASF844:
 	.string	"sftl_init"
 .LASF2:
 	.string	"unsigned char"
-.LASF613:
+.LASF612:
 	.string	"FtlGcScanTempBlk"
 .LASF109:
 	.string	"legacy_hdr_os_copy"
-.LASF761:
+.LASF760:
 	.string	"vpcTbl"
 .LASF176:
 	.string	"UCLASS_PANEL_BACKLIGHT"
 .LASF339:
 	.string	"activeSuperblockId"
-.LASF804:
+.LASF802:
 	.string	"ver1"
 .LASF280:
 	.string	"nand_phy_info"
-.LASF760:
+.LASF759:
 	.string	"ftl_free_no_use_map_blk"
-.LASF806:
+.LASF804:
 	.string	"P2V_block_in_plane"
-.LASF556:
+.LASF555:
 	.string	"str1"
-.LASF557:
+.LASF556:
 	.string	"str2"
-.LASF719:
+.LASF718:
 	.string	"pMapHeader"
 .LASF140:
 	.string	"UCLASS_TEST_BUS"
-.LASF717:
+.LASF716:
 	.string	"FtlScanSysBlk"
 .LASF52:
 	.string	"bi_arm_freq"
-.LASF696:
+.LASF695:
 	.string	"lookup_ppa_ver"
-.LASF753:
+.LASF752:
 	.string	"region_num"
-.LASF476:
+.LASF475:
 	.string	"p_l2p_map_buf"
-.LASF488:
+.LASF487:
 	.string	"gp_last_act_superblock"
-.LASF871:
+.LASF869:
 	.string	"Ftl_log2"
-.LASF448:
+.LASF447:
 	.string	"p_sys_spare_buf"
 .LASF165:
 	.string	"UCLASS_LED"
-.LASF552:
+.LASF551:
 	.string	"p_current"
-.LASF647:
+.LASF646:
 	.string	"get_new_id"
 .LASF253:
 	.string	"net_rx_packet_len"
 .LASF255:
 	.string	"net_null_ethaddr"
-.LASF543:
+.LASF542:
 	.string	"g_ect_tbl_power_up_flush"
-.LASF597:
+.LASF596:
 	.string	"physical_block"
 .LASF32:
 	.string	"flash_id"
-.LASF839:
+.LASF837:
 	.string	"absolute_sector"
 .LASF222:
 	.string	"load_addr"
 .LASF347:
 	.string	"PowerLostTimes"
-.LASF501:
+.LASF500:
 	.string	"g_gc_bad_block_temp_tbl"
-.LASF886:
+.LASF884:
 	.string	"kfree"
-.LASF464:
+.LASF463:
 	.string	"p_blk_mode_table"
-.LASF776:
+.LASF775:
 	.string	"List_remove_node"
 .LASF291:
 	.string	"reserved_blk"
-.LASF734:
+.LASF733:
 	.string	"pBuf"
-.LASF792:
-	.string	"tmp_ec"
-.LASF484:
+.LASF483:
 	.string	"g_active_superblock"
-.LASF690:
+.LASF689:
 	.string	"recovery_super_page"
 .LASF437:
 	.string	"req_sys"
 .LASF381:
 	.string	"available_pages"
-.LASF800:
+.LASF798:
 	.string	"high"
-.LASF834:
+.LASF832:
 	.string	"nscts"
 .LASF410:
 	.string	"c_ftl_nand_reserved_blks"
-.LASF701:
+.LASF700:
 	.string	"FtlL2PDataInit"
 .LASF230:
 	.string	"init"
 .LASF215:
 	.string	"UCLASS_CHARGE_DISPLAY"
-.LASF573:
+.LASF572:
 	.string	"check"
 .LASF145:
 	.string	"UCLASS_USB_EMUL"
-.LASF798:
+.LASF796:
 	.string	"FtlFreeSysBlkQueueInit"
-.LASF678:
+.LASF677:
 	.string	"FtlRecoverySuperblock"
 .LASF396:
 	.string	"c_ftl_nand_planes_per_die"
@@ -54358,23 +54393,23 @@ __func__.7632:
 	.string	"ecc_bits"
 .LASF293:
 	.string	"nand_ops"
-.LASF602:
+.LASF601:
 	.string	"tmp_blk"
-.LASF523:
+.LASF522:
 	.string	"g_gc_head_data_block"
-.LASF829:
+.LASF827:
 	.string	"FtlWrite"
 .LASF182:
 	.string	"UCLASS_PINCTRL"
-.LASF832:
+.LASF830:
 	.string	"num_lpa"
-.LASF868:
+.LASF866:
 	.string	"blkNum"
 .LASF364:
 	.string	"SlcPartLbaEndSector"
 .LASF84:
 	.string	"fdt32_t"
-.LASF469:
+.LASF468:
 	.string	"g_totle_map_block"
 .LASF375:
 	.string	"value"
@@ -54384,11 +54419,11 @@ __func__.7632:
 	.string	"image_len"
 .LASF441:
 	.string	"req_gc"
-.LASF855:
+.LASF853:
 	.string	"is_sys_blk"
 .LASF42:
 	.string	"memory"
-.LASF822:
+.LASF820:
 	.string	"bitmap"
 .LASF319:
 	.string	"ftl_ect_tbl_info"
@@ -54396,53 +54431,53 @@ __func__.7632:
 	.string	"UCLASS_USB_DEV_GENERIC"
 .LASF212:
 	.string	"UCLASS_FG"
-.LASF756:
+.LASF755:
 	.string	"lastMapBlk"
 .LASF370:
 	.string	"totle_write_sector"
-.LASF522:
+.LASF521:
 	.string	"g_ftl_nand_free_count"
-.LASF627:
+.LASF626:
 	.string	"p_gc_page"
 .LASF20:
 	.string	"errno"
-.LASF532:
+.LASF531:
 	.string	"gNandPhyInfo"
-.LASF862:
+.LASF860:
 	.string	"ven_blk"
 .LASF30:
 	.string	"size"
 .LASF244:
 	.string	"net_hostname"
-.LASF773:
+.LASF772:
 	.string	"List_pop_head_node"
 .LASF308:
 	.string	"BlkNum"
-.LASF851:
+.LASF849:
 	.string	"sys_bad_block_cnt"
-.LASF599:
+.LASF598:
 	.string	"p_dataHeader"
-.LASF781:
+.LASF780:
 	.string	"tmp_id"
-.LASF603:
+.LASF602:
 	.string	"FtlReadRefresh"
-.LASF646:
+.LASF645:
 	.string	"free_blk_index"
-.LASF821:
+.LASF819:
 	.string	"FtlBbt2Bitmap"
-.LASF663:
+.LASF662:
 	.string	"ftl_check_vpc"
 .LASF108:
 	.string	"legacy_hdr_os"
 .LASF100:
 	.string	"image_start"
-.LASF580:
+.LASF579:
 	.string	"page_index"
 .LASF18:
 	.string	"uint8_t"
 .LASF55:
 	.string	"bi_bootflags"
-.LASF487:
+.LASF486:
 	.string	"g_gc_superblock"
 .LASF303:
 	.string	"ftl_sys_info"
@@ -54452,13 +54487,13 @@ __func__.7632:
 	.string	"front"
 .LASF175:
 	.string	"UCLASS_PANEL"
-.LASF472:
+.LASF471:
 	.string	"p_vendor_block_ver_table"
 .LASF204:
 	.string	"UCLASS_USB"
-.LASF517:
+.LASF516:
 	.string	"g_totle_slc_erase_count"
-.LASF461:
+.LASF460:
 	.string	"g_totle_swl_count"
 .LASF139:
 	.string	"UCLASS_TEST_FDT"
@@ -54468,27 +54503,27 @@ __func__.7632:
 	.string	"gcTempSuperblockId"
 .LASF238:
 	.string	"eth_current"
-.LASF767:
+.LASF766:
 	.string	"node_valid_page_count"
 .LASF53:
 	.string	"bi_dsp_freq"
 .LASF5:
 	.string	"uchar"
-.LASF669:
+.LASF668:
 	.string	"pages"
 .LASF89:
 	.string	"ih_size"
-.LASF570:
+.LASF569:
 	.string	"addr"
 .LASF142:
 	.string	"UCLASS_SPI_EMUL"
-.LASF864:
+.LASF862:
 	.string	"FtlMemInit"
-.LASF819:
+.LASF817:
 	.string	"write_count"
-.LASF664:
+.LASF663:
 	.string	"prev_ppa"
-.LASF589:
+.LASF588:
 	.string	"FlashTestBlk"
 .LASF179:
 	.string	"UCLASS_PCI_GENERIC"
@@ -54496,15 +54531,15 @@ __func__.7632:
 	.string	"bi_sramstart"
 .LASF66:
 	.string	"FIQ_STACK_START"
-.LASF873:
+.LASF871:
 	.string	"rknand_proc_ftlread"
 .LASF228:
 	.string	"enetaddr"
 .LASF181:
 	.string	"UCLASS_PINCONFIG"
-.LASF742:
+.LASF741:
 	.string	"l2p_region_id"
-.LASF554:
+.LASF553:
 	.string	"check_buf"
 .LASF190:
 	.string	"UCLASS_RESET"
@@ -54518,47 +54553,49 @@ __func__.7632:
 	.string	"slc_erase_count"
 .LASF60:
 	.string	"bi_busfreq"
-.LASF770:
+.LASF769:
 	.string	"prev_multiplier_value"
-.LASF497:
+.LASF496:
 	.string	"g_gc_next_blk"
-.LASF516:
+.LASF515:
 	.string	"g_min_erase_count"
 .LASF149:
 	.string	"UCLASS_BLK"
-.LASF546:
+.LASF545:
 	.string	"gc_discard_updated"
-.LASF738:
+.LASF737:
 	.string	"FtlVendorPartWrite"
-.LASF622:
+.LASF621:
 	.string	"FtlGcFreeTempBlock"
 .LASF248:
 	.string	"net_ip"
 .LASF229:
 	.string	"iobase"
-.LASF658:
+.LASF657:
 	.string	"GetFreeBlockMinEraseCount"
+.LASF788:
+	.string	"remalloc"
 .LASF336:
 	.string	"activeFlashMode"
 .LASF92:
 	.string	"ih_dcrc"
 .LASF35:
 	.string	"flash_info_t"
-.LASF656:
+.LASF655:
 	.string	"GetFreeBlockMaxEraseCount"
-.LASF712:
+.LASF711:
 	.string	"sblk"
-.LASF755:
+.LASF754:
 	.string	"ftl_map_blk_gc"
-.LASF878:
+.LASF876:
 	.string	"printf"
 .LASF59:
 	.string	"bi_intfreq"
 .LASF223:
 	.string	"save_addr"
-.LASF538:
+.LASF537:
 	.string	"TotleReadBufferCount1"
-.LASF567:
+.LASF566:
 	.string	"request"
 .LASF330:
 	.string	"regionId"
@@ -54570,35 +54607,35 @@ __func__.7632:
 	.string	"gc_page_count"
 .LASF49:
 	.string	"bi_flashoffset"
-.LASF541:
+.LASF540:
 	.string	"TotleReadBufferMatchCount"
 .LASF438:
 	.string	"req_read"
-.LASF752:
+.LASF751:
 	.string	"Ftl_write_map_blk_to_last_page"
-.LASF466:
+.LASF465:
 	.string	"p_map_block_valid_page_count"
 .LASF167:
 	.string	"UCLASS_MAILBOX"
-.LASF793:
+.LASF792:
 	.string	"FtlFreeSysBlkQueueIn"
 .LASF366:
 	.string	"readErrorCount"
-.LASF588:
+.LASF587:
 	.string	"sftl_gc"
-.LASF797:
+.LASF795:
 	.string	"FtlFreeSysBlkQueueEmpty"
-.LASF763:
+.LASF762:
 	.string	"load_l2p_region"
-.LASF640:
+.LASF639:
 	.string	"p_superblock"
 .LASF301:
 	.string	"fBbtBlk"
 .LASF77:
 	.string	"off_mem_rsvmap"
-.LASF445:
+.LASF444:
 	.string	"p_sys_data_buf"
-.LASF885:
+.LASF883:
 	.string	"l2p_addr_tran"
 .LASF164:
 	.string	"UCLASS_KEYBOARD"
@@ -54606,69 +54643,69 @@ __func__.7632:
 	.string	"page_per_slc_blk"
 .LASF398:
 	.string	"c_ftl_nand_blks_per_die_shift"
-.LASF739:
+.LASF738:
 	.string	"log2phys"
-.LASF478:
+.LASF477:
 	.string	"p_data_block_list_table"
 .LASF171:
 	.string	"UCLASS_MOD_EXP"
-.LASF645:
+.LASF644:
 	.string	"num_bad_block"
 .LASF85:
 	.string	"image_header"
-.LASF702:
+.LASF701:
 	.string	"FtlLoadVonderInfo"
-.LASF614:
+.LASF613:
 	.string	"pSuperblock"
-.LASF535:
+.LASF534:
 	.string	"ftl_temp_buf"
 .LASF384:
 	.string	"flash_mode"
-.LASF514:
+.LASF513:
 	.string	"g_totle_mlc_erase_count"
 .LASF79:
 	.string	"last_comp_version"
 .LASF415:
 	.string	"c_ftl_nand_map_blks_per_plane"
-.LASF811:
+.LASF809:
 	.string	"re_try_next_blk"
 .LASF56:
 	.string	"bi_ip_addr"
-.LASF579:
+.LASF578:
 	.string	"block_index"
 .LASF36:
 	.string	"flash_info"
-.LASF496:
+.LASF495:
 	.string	"g_gc_cur_blk_max_valid_pages"
 .LASF16:
 	.string	"ushort"
-.LASF764:
+.LASF763:
 	.string	"phyAddr"
 .LASF73:
 	.string	"magic"
-.LASF791:
-	.string	"tmp_blk_id"
-.LASF877:
+.LASF875:
 	.string	"memset"
 .LASF242:
 	.string	"net_dns_server"
-.LASF562:
+.LASF561:
 	.string	"ftl_memset"
-.LASF831:
+.LASF829:
 	.string	"end_lpa"
-.LASF736:
+.LASF882:
+	.string	"/home/ldq/rk-linux/u-boot-debug"
+.LASF735:
 	.string	"result"
-.LASF626:
+.LASF625:
 	.string	"scan_page_num"
 .LASF267:
 	.string	"NETLOOP_SUCCESS"
 .LASF27:
 	.string	"name"
-.LASF512:
+.LASF511:
 	.string	"g_totle_cache_write_count"
-.LASF768:
+.LASF767:
 	.string	"node_multiplier_value"
-.LASF759:
+.LASF758:
 	.string	"blk_index"
 .LASF69:
 	.string	"_datarellocal_start_ofs"
@@ -54680,31 +54717,31 @@ __func__.7632:
 	.string	"fit_hdr_setup"
 .LASF150:
 	.string	"UCLASS_CLK"
-.LASF687:
+.LASF686:
 	.string	"detected_error_page"
 .LASF129:
 	.string	"initrd_end"
-.LASF620:
+.LASF619:
 	.string	"read_super_page"
 .LASF219:
 	.string	"monitor_flash_len"
-.LASF621:
+.LASF620:
 	.string	"FtlGcPageVarInit"
-.LASF823:
+.LASF821:
 	.string	"FtlBbtInfoPrint"
-.LASF530:
+.LASF529:
 	.string	"c_mlc_erase_count_value"
-.LASF551:
+.LASF550:
 	.string	"mem_malloc_brk"
-.LASF483:
+.LASF482:
 	.string	"g_num_data_superblocks"
-.LASF754:
+.LASF753:
 	.string	"blkTbl"
 .LASF348:
 	.string	"mlc_erase_count"
 .LASF12:
 	.string	"phys_size_t"
-.LASF716:
+.LASF715:
 	.string	"FtlLoadEctTbl"
 .LASF62:
 	.string	"bi_boot_params"
@@ -54712,11 +54749,11 @@ __func__.7632:
 	.string	"UCLASS_RC"
 .LASF51:
 	.string	"bi_sramsize"
-.LASF881:
+.LASF879:
 	.string	"sprintf"
-.LASF608:
+.LASF607:
 	.string	"FtlGcMarkBadPhyBlk"
-.LASF642:
+.LASF641:
 	.string	"allocate_new_data_superblock"
 .LASF13:
 	.string	"sizetype"
@@ -54728,9 +54765,9 @@ __func__.7632:
 	.string	"GlobalSysVersion"
 .LASF329:
 	.string	"ftl_map_blk_header"
-.LASF600:
+.LASF599:
 	.string	"gc_next_superblock"
-.LASF813:
+.LASF811:
 	.string	"blkAddr"
 .LASF193:
 	.string	"UCLASS_SCSI"
@@ -54740,21 +54777,21 @@ __func__.7632:
 	.string	"signed char"
 .LASF250:
 	.string	"net_tx_packet"
-.LASF697:
+.LASF696:
 	.string	"current_ppa_ver"
-.LASF785:
+.LASF784:
 	.string	"tmp_multiplier_value"
-.LASF566:
+.LASF565:
 	.string	"FlashEraseBlocks"
 .LASF33:
 	.string	"start"
-.LASF830:
+.LASF828:
 	.string	"start_lpa"
-.LASF553:
+.LASF552:
 	.string	"current"
 .LASF218:
 	.string	"LOGF_MAX_CATEGORIES"
-.LASF518:
+.LASF517:
 	.string	"g_totle_sys_slc_erase_count"
 .LASF300:
 	.string	"prev_id"
@@ -54766,37 +54803,37 @@ __func__.7632:
 	.string	"count"
 .LASF146:
 	.string	"UCLASS_SIMPLE_BUS"
-.LASF539:
+.LASF538:
 	.string	"TotleReadBufferCount2"
-.LASF540:
+.LASF539:
 	.string	"TotleReadBufferCount3"
-.LASF455:
+.LASF454:
 	.string	"c_gc_page_buf_num"
-.LASF720:
+.LASF719:
 	.string	"FtlVpcTblFlush"
 .LASF189:
 	.string	"UCLASS_REMOTEPROC"
-.LASF743:
+.LASF742:
 	.string	"lpn_index"
 .LASF118:
 	.string	"fit_hdr_fdt"
-.LASF632:
+.LASF631:
 	.string	"FtlGcBufAlloc"
-.LASF569:
+.LASF568:
 	.string	"num_req"
-.LASF779:
+.LASF778:
 	.string	"node_erase_count"
 .LASF254:
 	.string	"net_bcast_ethaddr"
-.LASF737:
+.LASF736:
 	.string	"ppn_index"
-.LASF796:
+.LASF794:
 	.string	"FtlFreeSysBlkQueueFull"
 .LASF133:
 	.string	"state"
 .LASF48:
 	.string	"bi_flashsize"
-.LASF747:
+.LASF746:
 	.string	"target_region"
 .LASF19:
 	.string	"__be32"
@@ -54806,31 +54843,31 @@ __func__.7632:
 	.string	"c_ftl_vendor_part_size"
 .LASF251:
 	.string	"net_rx_packets"
-.LASF827:
+.LASF825:
 	.string	"sftl_read"
-.LASF452:
+.LASF451:
 	.string	"p_gc_spare_buf"
 .LASF151:
 	.string	"UCLASS_CPU"
-.LASF467:
+.LASF466:
 	.string	"p_map_block_ver_table"
-.LASF456:
+.LASF455:
 	.string	"g_gc_num_req"
-.LASF449:
+.LASF448:
 	.string	"p_io_data_buf_0"
-.LASF450:
+.LASF449:
 	.string	"p_io_data_buf_1"
 .LASF68:
 	.string	"_datarelrolocal_start_ofs"
-.LASF684:
+.LASF683:
 	.string	"mlc_detected_active_page"
-.LASF854:
+.LASF852:
 	.string	"FtlLowFormatEraseBlock"
 .LASF317:
 	.string	"region_id"
 .LASF326:
 	.string	"sysBlksPerPlane"
-.LASF817:
+.LASF815:
 	.string	"FtlBbtMemInit"
 .LASF309:
 	.string	"maxBlkNum"
@@ -54838,25 +54875,25 @@ __func__.7632:
 	.string	"c_ftl_nand_die_num"
 .LASF286:
 	.string	"page_per_blk"
-.LASF722:
+.LASF721:
 	.string	"prog_error_count"
 .LASF372:
 	.string	"progErrorCount"
 .LASF259:
 	.string	"net_boot_file_name"
-.LASF495:
+.LASF494:
 	.string	"g_gc_cur_blk_valid_pages"
 .LASF233:
 	.string	"halt"
-.LASF654:
+.LASF653:
 	.string	"maxFreeBlockEraseCount"
 .LASF86:
 	.string	"ih_magic"
-.LASF582:
+.LASF581:
 	.string	"block_in_die"
-.LASF457:
+.LASF456:
 	.string	"gp_ect_tbl_info"
-.LASF655:
+.LASF654:
 	.string	"minDataBlockEraseCount"
 .LASF17:
 	.string	"ulong"
@@ -54868,41 +54905,41 @@ __func__.7632:
 	.string	"__u32"
 .LASF249:
 	.string	"net_server_ip"
-.LASF786:
+.LASF785:
 	.string	"INSERT_DATA_LIST"
 .LASF206:
 	.string	"UCLASS_USB_HUB"
-.LASF826:
+.LASF824:
 	.string	"sftl_write"
-.LASF444:
+.LASF443:
 	.string	"p_plane_order_table"
-.LASF782:
+.LASF781:
 	.string	"insert_data_list"
 .LASF70:
 	.string	"_datarelro_start_ofs"
-.LASF619:
+.LASF618:
 	.string	"ReInit"
 .LASF172:
 	.string	"UCLASS_MTD"
 .LASF134:
 	.string	"bootm_headers_t"
-.LASF730:
+.LASF729:
 	.string	"ec_mod_count"
-.LASF565:
+.LASF564:
 	.string	"spare"
-.LASF527:
+.LASF526:
 	.string	"g_recovery_page_num"
 .LASF15:
 	.string	"long int"
-.LASF668:
+.LASF667:
 	.string	"req_temp"
 .LASF141:
 	.string	"UCLASS_TEST_PROBE"
-.LASF883:
+.LASF881:
 	.string	"drivers/rkflash/rksftl/rk_sftl.c"
-.LASF660:
+.LASF659:
 	.string	"FtlSysBlkInit"
-.LASF524:
+.LASF523:
 	.string	"g_gc_head_data_block_count"
 .LASF297:
 	.string	"read_page"
@@ -54914,73 +54951,73 @@ __func__.7632:
 	.string	"UCLASS_DMA"
 .LASF426:
 	.string	"g_GlobalSysVersion"
-.LASF511:
+.LASF510:
 	.string	"g_tmp_data_superblock_id"
-.LASF872:
+.LASF870:
 	.string	"limit"
-.LASF661:
+.LASF660:
 	.string	"ftl_scan_all_data"
 .LASF331:
 	.string	"ftl_sys_blk_header"
 .LASF393:
 	.string	"flag"
-.LASF470:
+.LASF469:
 	.string	"p_vendor_block_table"
-.LASF680:
+.LASF679:
 	.string	"saved_active_plane"
-.LASF748:
+.LASF747:
 	.string	"hit_count"
-.LASF715:
+.LASF714:
 	.string	"FtlGcReFreshBadBlk"
 .LASF380:
 	.string	"current_page"
 .LASF201:
 	.string	"UCLASS_THERMAL"
-.LASF815:
+.LASF813:
 	.string	"FtlBbtCalcTotleCnt"
-.LASF787:
+.LASF786:
 	.string	"INSERT_FREE_LIST"
-.LASF563:
+.LASF562:
 	.string	"FlashGetBadBlockList"
-.LASF695:
+.LASF694:
 	.string	"prev_ppa_ver"
 .LASF246:
 	.string	"net_ethaddr"
 .LASF225:
 	.string	"in_addr"
-.LASF845:
+.LASF843:
 	.string	"FtlSysFlush"
 .LASF99:
 	.string	"image_info"
 .LASF88:
 	.string	"ih_time"
-.LASF610:
+.LASF609:
 	.string	"FtlGcRefreshBlock"
 .LASF334:
 	.string	"ftl_sys_save_info"
-.LASF772:
+.LASF771:
 	.string	"List_get_gc_head_node"
 .LASF399:
 	.string	"c_ftl_nand_planes_num"
-.LASF809:
+.LASF807:
 	.string	"FtlMakeBbt"
 .LASF37:
 	.string	"long double"
-.LASF481:
+.LASF480:
 	.string	"p_data_block_list_tail"
-.LASF493:
+.LASF492:
 	.string	"g_gc_blk_num"
 .LASF81:
 	.string	"size_dt_strings"
 .LASF271:
 	.string	"uint16"
-.LASF606:
+.LASF605:
 	.string	"FtlGcFreeBadSuperBlk"
 .LASF106:
 	.string	"image_info_t"
-.LASF704:
+.LASF703:
 	.string	"pMapBlockInfo"
-.LASF618:
+.LASF617:
 	.string	"error_phy_page"
 .LASF3:
 	.string	"long unsigned int"
@@ -55000,17 +55037,17 @@ __func__.7632:
 	.string	"net_server_ethaddr"
 .LASF208:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF692:
+.LASF691:
 	.string	"function_exit"
 .LASF135:
 	.string	"images"
-.LASF525:
+.LASF524:
 	.string	"g_gc_skip_write_count"
-.LASF585:
+.LASF584:
 	.string	"rknand_print_hex"
-.LASF636:
+.LASF635:
 	.string	"FtlGcBufInit"
-.LASF446:
+.LASF445:
 	.string	"p_sys_data_buf_1"
 .LASF14:
 	.string	"char"
@@ -55018,11 +55055,11 @@ __func__.7632:
 	.string	"pBlkTbl"
 .LASF113:
 	.string	"fit_uname_os"
-.LASF500:
+.LASF499:
 	.string	"g_gc_bad_block_gc_index"
-.LASF693:
+.LASF692:
 	.string	"last_page_version"
-.LASF802:
+.LASF800:
 	.string	"pagePreBlk"
 .LASF281:
 	.string	"nand_type"
@@ -55030,15 +55067,15 @@ __func__.7632:
 	.string	"fit_hdr_os"
 .LASF283:
 	.string	"plane_per_die"
-.LASF490:
+.LASF489:
 	.string	"g_sys_ext_data"
 .LASF272:
 	.string	"uint32"
-.LASF564:
+.LASF563:
 	.string	"table"
 .LASF299:
 	.string	"page"
-.LASF643:
+.LASF642:
 	.string	"allocate_data_superblock"
 .LASF316:
 	.string	"ftl_l2p_ram_map_info"
@@ -55048,75 +55085,75 @@ __func__.7632:
 	.string	"net_loop_state"
 .LASF433:
 	.string	"gSysInfo"
-.LASF630:
+.LASF629:
 	.string	"prev_superblock_id"
 .LASF196:
 	.string	"UCLASS_SPMI"
-.LASF757:
+.LASF756:
 	.string	"minValidPageIndex"
-.LASF842:
+.LASF840:
 	.string	"last_lpa_nscts"
 .LASF194:
 	.string	"UCLASS_SERIAL"
-.LASF710:
+.LASF709:
 	.string	"FtlLoadSysInfo"
 .LASF440:
 	.string	"req_erase"
 .LASF320:
 	.string	"hash"
-.LASF545:
+.LASF544:
 	.string	"check_vpc_table"
 .LASF180:
 	.string	"UCLASS_PHY"
 .LASF54:
 	.string	"bi_ddr_freq"
-.LASF859:
+.LASF857:
 	.string	"test_mode"
-.LASF828:
+.LASF826:
 	.string	"FtlDiscard"
-.LASF671:
+.LASF670:
 	.string	"FtlGcPageRecovery"
 .LASF105:
 	.string	"arch"
-.LASF510:
+.LASF509:
 	.string	"g_totle_read_page_count"
-.LASF711:
+.LASF710:
 	.string	"ftl_get_blk_mode"
-.LASF741:
+.LASF740:
 	.string	"ram_region_id"
 .LASF435:
 	.string	"gL2pMapInfo"
 .LASF322:
 	.string	"lastEc"
-.LASF843:
+.LASF841:
 	.string	"sector"
-.LASF558:
+.LASF557:
 	.string	"ftl_memcmp"
-.LASF468:
+.LASF467:
 	.string	"p_map_region_ppn_table"
 .LASF120:
 	.string	"fit_noffset_fdt"
-.LASF867:
+.LASF865:
 	.string	"FtlSysBlkNumInit"
-.LASF672:
+.LASF671:
 	.string	"Ftl_save_ext_data"
 .LASF116:
 	.string	"fit_uname_rd"
-.LASF649:
+.LASF648:
 	.string	"GetSwlReplaceBlock"
 .LASF359:
 	.string	"max_erase_count"
-.LASF475:
+.LASF474:
 	.string	"p_l2p_ram_map"
-.LASF634:
+.LASF633:
 	.string	"req_num"
 .LASF115:
 	.string	"fit_hdr_rd"
 .LASF268:
 	.string	"NETLOOP_FAIL"
-.LASF824:
+.LASF822:
 	.string	"FtlBbmIsBadBlock"
-.LASF667:
+.LASF666:
 	.string	"FtlSuperblockPowerLostFix"
 .LASF157:
 	.string	"UCLASS_FIRMWARE"
@@ -55124,13 +55161,13 @@ __func__.7632:
 	.string	"fit_noffset_setup"
 .LASF401:
 	.string	"c_ftl_nand_ext_blk_pre_plane"
-.LASF550:
+.LASF549:
 	.string	"mem_malloc_end"
-.LASF451:
+.LASF450:
 	.string	"p_io_spare_buf"
 .LASF185:
 	.string	"UCLASS_POWER_DOMAIN"
-.LASF520:
+.LASF519:
 	.string	"g_in_gc_progress"
 .LASF168:
 	.string	"UCLASS_MASS_STORAGE"
@@ -55140,7 +55177,7 @@ __func__.7632:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF422:
 	.string	"c_ftl_nand_data_blks_per_plane"
-.LASF617:
+.LASF616:
 	.string	"page_count"
 .LASF298:
 	.string	"ftl_bbt_info"
@@ -55148,49 +55185,47 @@ __func__.7632:
 	.string	"UCLASS_I2C_GENERIC"
 .LASF231:
 	.string	"send"
-.LASF531:
+.LASF530:
 	.string	"g_power_lost_recovery_flag"
-.LASF592:
+.LASF591:
 	.string	"numPages"
-.LASF447:
+.LASF446:
 	.string	"p_vendor_data_buf"
 .LASF354:
 	.string	"read_page_count"
 .LASF234:
 	.string	"write_hwaddr"
-.LASF726:
+.LASF725:
 	.string	"FtlMapBlkWriteDump_data"
-.LASF835:
+.LASF833:
 	.string	"FtlCacheWriteBack"
-.LASF700:
+.LASF699:
 	.string	"FtlLoadMapInfo"
-.LASF808:
+.LASF806:
 	.string	"V2P_block"
-.LASF721:
+.LASF720:
 	.string	"pSysHeader"
-.LASF673:
+.LASF672:
 	.string	"SupperBlkListInit"
-.LASF707:
+.LASF706:
 	.string	"ppnTbl"
-.LASF847:
+.LASF845:
 	.string	"pNand"
-.LASF559:
+.LASF558:
 	.string	"ftl_memcpy"
 .LASF346:
 	.string	"PowerOnTimes"
-.LASF505:
+.LASF504:
 	.string	"g_totle_gc_page_count"
 .LASF24:
 	.string	"_binary_u_boot_bin_start"
-.LASF674:
+.LASF673:
 	.string	"num_data_node"
 .LASF400:
 	.string	"c_ftl_nand_blk_pre_plane"
-.LASF884:
-	.string	"/home/ldq/rk-linux/u-boot-release"
 .LASF64:
 	.string	"bd_t"
-.LASF706:
+.LASF705:
 	.string	"lastWritePage"
 .LASF91:
 	.string	"ih_ep"
@@ -55200,7 +55235,7 @@ __func__.7632:
 	.string	"fit_uname_fdt"
 .LASF187:
 	.string	"UCLASS_RAM"
-.LASF675:
+.LASF674:
 	.string	"num_free_node"
 .LASF379:
 	.string	"ftl_superblock_info"
@@ -55208,43 +55243,41 @@ __func__.7632:
 	.string	"ft_addr"
 .LASF357:
 	.string	"sys_slc_erase_count"
-.LASF513:
+.LASF512:
 	.string	"g_totle_l2p_write_count"
 .LASF220:
 	.string	"__dtb_dt_begin"
 .LASF217:
 	.string	"UCLASS_INVALID"
-.LASF443:
-	.string	"g_req_cache"
-.LASF594:
+.LASF593:
 	.string	"gc_blk"
 .LASF277:
 	.string	"page_addr"
-.LASF865:
+.LASF863:
 	.string	"mem_size"
-.LASF858:
+.LASF856:
 	.string	"test_page_step"
-.LASF689:
+.LASF688:
 	.string	"read_super_page_end"
 .LASF368:
 	.string	"refresh_enable_mode"
-.LASF848:
+.LASF846:
 	.string	"load_bbt"
-.LASF861:
+.LASF859:
 	.string	"IsBlkInVendorPart"
 .LASF402:
 	.string	"c_ftl_nand_bbm_buf_size"
-.LASF783:
+.LASF782:
 	.string	"node_data_count"
-.LASF583:
+.LASF582:
 	.string	"width"
 .LASF39:
 	.string	"base"
-.LASF887:
+.LASF885:
 	.string	"sftl_get_density"
-.LASF840:
+.LASF838:
 	.string	"first_lpa_sctidx"
-.LASF590:
+.LASF589:
 	.string	"rk_ftl_garbage_collect"
 .LASF328:
 	.string	"lastPpa"
@@ -55252,19 +55285,19 @@ __func__.7632:
 	.string	"fit_uname_cfg"
 .LASF344:
 	.string	"gcTempPageOffset"
-.LASF637:
+.LASF636:
 	.string	"decrement_vpc_count"
 .LASF386:
 	.string	"dump_writed"
-.LASF749:
+.LASF748:
 	.string	"flush_l2p_region"
 .LASF130:
 	.string	"cmdline_start"
-.LASF536:
+.LASF535:
 	.string	"DeviceCapacity"
 .LASF355:
 	.string	"l2p_write_count"
-.LASF548:
+.LASF547:
 	.string	"gc_ink_free_return_value"
 .LASF358:
 	.string	"discard_page_count"
@@ -55276,45 +55309,45 @@ __func__.7632:
 	.string	"long long unsigned int"
 .LASF274:
 	.string	"int16"
-.LASF849:
+.LASF847:
 	.string	"ftl_low_format"
-.LASF735:
+.LASF734:
 	.string	"offset"
-.LASF504:
+.LASF503:
 	.string	"g_gc_blk_index"
 .LASF439:
 	.string	"req_prgm"
 .LASF436:
 	.string	"gVendorBlkInfo"
-.LASF677:
+.LASF676:
 	.string	"FtlPowerLostRecovery"
-.LASF462:
+.LASF461:
 	.string	"p_valid_page_count_table"
-.LASF703:
+.LASF702:
 	.string	"FtlMapTblRecovery"
 .LASF156:
 	.string	"UCLASS_GPIO"
-.LASF870:
+.LASF868:
 	.string	"debug_flag"
-.LASF498:
+.LASF497:
 	.string	"g_gc_next_blk_1"
 .LASF76:
 	.string	"off_dt_strings"
 .LASF376:
 	.string	"sys_blk_queue"
-.LASF648:
+.LASF647:
 	.string	"free_data_superblock"
-.LASF860:
+.LASF858:
 	.string	"re_test_next_page"
 .LASF61:
 	.string	"bi_arch_number"
-.LASF750:
+.LASF749:
 	.string	"FtlMapWritePage"
-.LASF784:
+.LASF783:
 	.string	"tmp_data_count"
 .LASF26:
 	.string	"ide_bus_offset"
-.LASF740:
+.LASF739:
 	.string	"action"
 .LASF408:
 	.string	"c_ftl_nand_byte_pre_page"
@@ -55322,11 +55355,11 @@ __func__.7632:
 	.string	"UCLASS_COUNT"
 .LASF174:
 	.string	"UCLASS_NVME"
-.LASF644:
+.LASF643:
 	.string	"new_id"
 .LASF345:
 	.string	"cache_write_count"
-.LASF641:
+.LASF640:
 	.string	"new_ppa"
 .LASF258:
 	.string	"net_restart_wrap"
@@ -55346,41 +55379,41 @@ __func__.7632:
 	.string	"totleEc"
 .LASF38:
 	.string	"lmb_property"
-.LASF458:
+.LASF457:
 	.string	"g_ect_tbl_info_size"
 .LASF338:
 	.string	"gcTempFlashMode"
 .LASF431:
 	.string	"g_MaxLbn"
-.LASF534:
+.LASF533:
 	.string	"g_nand_ops"
-.LASF584:
+.LASF583:
 	.string	"ftl_malloc"
-.LASF841:
+.LASF839:
 	.string	"first_lpa_nscts"
 .LASF183:
 	.string	"UCLASS_PMIC"
 .LASF318:
 	.string	"L2PMap"
-.LASF766:
+.LASF765:
 	.string	"prev_node_id"
-.LASF454:
+.LASF453:
 	.string	"gp_gc_page_buf_info"
-.LASF509:
+.LASF508:
 	.string	"g_totle_discard_page_count"
-.LASF657:
+.LASF656:
 	.string	"max_ec"
-.LASF537:
+.LASF536:
 	.string	"gFtlInitStatus"
 .LASF9:
 	.string	"long long int"
-.LASF459:
+.LASF458:
 	.string	"p_erase_count_table"
-.LASF825:
+.LASF823:
 	.string	"FtlBbmMapBadBlock"
 .LASF427:
 	.string	"g_GlobalDataVersion"
-.LASF718:
+.LASF717:
 	.string	"block_in_plane"
 .LASF128:
 	.string	"initrd_start"
@@ -55388,43 +55421,43 @@ __func__.7632:
 	.string	"g_MaxLbaSector"
 .LASF382:
 	.string	"current_plane"
-.LASF880:
+.LASF878:
 	.string	"free"
 .LASF383:
 	.string	"num_planes"
-.LASF801:
+.LASF799:
 	.string	"spareBuf"
-.LASF731:
+.LASF730:
 	.string	"FtlVendorPartRead"
-.LASF724:
+.LASF723:
 	.string	"FtlWriteDump_data"
 .LASF197:
 	.string	"UCLASS_SPI_FLASH"
 .LASF202:
 	.string	"UCLASS_TIMER"
-.LASF799:
+.LASF797:
 	.string	"FtlGetLastWrittenPage"
-.LASF662:
+.LASF661:
 	.string	"pDataHeader"
-.LASF542:
+.LASF541:
 	.string	"power_up_flag"
 .LASF365:
 	.string	"inkDie_write_and_check_en"
 .LASF413:
 	.string	"c_ftl_nand_l2pmap_ram_region_num"
-.LASF844:
+.LASF842:
 	.string	"sftl_deinit"
-.LASF816:
+.LASF814:
 	.string	"totle_count"
 .LASF282:
 	.string	"die_num"
-.LASF751:
+.LASF750:
 	.string	"update_map_block"
 .LASF307:
 	.string	"maxRegion"
-.LASF681:
+.LASF680:
 	.string	"next_free_active_plane"
-.LASF491:
+.LASF490:
 	.string	"p_gc_page_info"
 .LASF256:
 	.string	"net_our_vlan"
@@ -55432,29 +55465,29 @@ __func__.7632:
 	.string	"totle_power_on_run_times"
 .LASF93:
 	.string	"ih_os"
-.LASF526:
+.LASF525:
 	.string	"g_cur_erase_blk"
 .LASF184:
 	.string	"UCLASS_PWM"
-.LASF635:
+.LASF634:
 	.string	"FtlGcBufFree"
-.LASF775:
+.LASF774:
 	.string	"List_pop_index_node"
-.LASF691:
+.LASF690:
 	.string	"scan_completed"
-.LASF638:
+.LASF637:
 	.string	"update_vpc_list"
 .LASF170:
 	.string	"UCLASS_MMC"
-.LASF465:
+.LASF464:
 	.string	"p_map_block_table"
-.LASF544:
+.LASF543:
 	.string	"FtlUpdateVaildLpnCount"
 .LASF332:
 	.string	"res32_0"
 .LASF333:
 	.string	"res32_1"
-.LASF727:
+.LASF726:
 	.string	"FtlUpdateVaildLpn"
 .LASF390:
 	.string	"scr_ppa"
@@ -55464,43 +55497,43 @@ __func__.7632:
 	.string	"save_size"
 .LASF78:
 	.string	"version"
-.LASF653:
+.LASF652:
 	.string	"pNode"
-.LASF639:
+.LASF638:
 	.string	"get_new_active_ppa"
-.LASF879:
+.LASF877:
 	.string	"kmalloc"
 .LASF25:
 	.string	"_binary_u_boot_bin_end"
-.LASF598:
+.LASF597:
 	.string	"max_gc_page_num"
 .LASF1:
 	.string	"unsigned int"
-.LASF713:
+.LASF712:
 	.string	"FtlSlcSuperblockCheck"
-.LASF515:
+.LASF514:
 	.string	"g_totle_avg_erase_count"
-.LASF837:
+.LASF835:
 	.string	"flashType"
-.LASF790:
+.LASF791:
 	.string	"FtlFreeSysBLkSort"
-.LASF780:
+.LASF779:
 	.string	"tmp_erase_count"
 .LASF83:
 	.string	"working_fdt"
-.LASF863:
+.LASF861:
 	.string	"FtlVariablesInit"
 .LASF392:
 	.string	"ftl_gc_page_buffer"
 .LASF239:
 	.string	"push_packet"
-.LASF709:
+.LASF708:
 	.string	"pMapBlkHeader"
 .LASF82:
 	.string	"size_dt_struct"
-.LASF473:
+.LASF472:
 	.string	"p_vendor_region_ppn_table"
-.LASF676:
+.LASF675:
 	.string	"make_superblock"
 .LASF97:
 	.string	"ih_name"
@@ -55510,11 +55543,11 @@ __func__.7632:
 	.string	"bufferFlashMode"
 .LASF7:
 	.string	"short int"
-.LASF838:
+.LASF836:
 	.string	"FtlRead"
 .LASF74:
 	.string	"totalsize"
-.LASF758:
+.LASF757:
 	.string	"ftl_map_blk_alloc_new_blk"
 .LASF385:
 	.string	"check_en"
@@ -55524,7 +55557,7 @@ __func__.7632:
 	.string	"prev"
 .LASF423:
 	.string	"c_ftl_nand_data_op_blks_per_plane"
-.LASF651:
+.LASF650:
 	.string	"min_ec_id"
 .LASF388:
 	.string	"phyBlk"
@@ -55532,7 +55565,7 @@ __func__.7632:
 	.string	"net_boot_file_size"
 .LASF412:
 	.string	"c_ftl_nand_map_region_num"
-.LASF666:
+.LASF665:
 	.string	"FtlVpcCheckAndModify"
 .LASF127:
 	.string	"ft_len"
@@ -55540,7 +55573,7 @@ __func__.7632:
 	.string	"UCLASS_REGULATOR"
 .LASF311:
 	.string	"pBlkVerTbl"
-.LASF489:
+.LASF488:
 	.string	"g_sys_save_data"
 .LASF124:
 	.string	"rd_start"

commit bcf9093629cab1bad23d1df024aa508ac0797803
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jun 28 15:27:43 2018 +0800

    drm/rocckhip: fix panic when enable hdmi at uboot
    
    hdmi without panel, so we must confirm panel->func
    and panel_data->panel isn't NULL.
    
    Change-Id: I87abec5d04e26bdab4cb643f7ed5757f3e31c918
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 83f645bda5..fdf1131605 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -575,6 +575,58 @@ static int display_set_plane(struct display_state *state)
 	return 0;
 }
 
+static int display_panel_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->prepare) {
+		printf("%s: failed to find panel prepare funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->prepare(state);
+}
+
+static int display_panel_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->enable) {
+		printf("%s: failed to find panel enable funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->enable(state);
+}
+
+static void display_panel_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
+		printf("%s: failed to find panel unprepare funcs\n", __func__);
+		return;
+	}
+
+	panel->funcs->unprepare(state);
+}
+
+static void display_panel_disable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->disable) {
+		printf("%s: failed to find panel disable funcs\n", __func__);
+		return;
+	}
+
+	panel->funcs->disable(state);
+}
+
 static int display_enable(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -583,9 +635,6 @@ static int display_enable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 	int ret = 0;
 
 	display_init(state);
@@ -608,18 +657,12 @@ static int display_enable(struct display_state *state)
 			goto unprepare_crtc;
 	}
 
-	if (panel_funcs->prepare) {
-		ret = panel_funcs->prepare(state);
-		if (ret) {
-			printf("failed to prepare panel\n");
-			goto unprepare_conn;
-		}
-	}
+	display_panel_prepare(state);
 
 	if (crtc_funcs->enable) {
 		ret = crtc_funcs->enable(state);
 		if (ret)
-			goto unprepare_panel;
+			goto unprepare_conn;
 	}
 
 	if (conn_funcs->enable) {
@@ -628,33 +671,20 @@ static int display_enable(struct display_state *state)
 			goto disable_crtc;
 	}
 
-	if (panel_funcs->enable) {
-		ret = panel_funcs->enable(state);
-		if (ret) {
-			printf("failed to enable panel\n");
-			goto disable_conn;
-		}
-	}
+	display_panel_enable(state);
 
 	state->is_enable = true;
-
 	return 0;
 
-disable_conn:
-	if (conn_funcs->unprepare)
-		conn_funcs->unprepare(state);
 disable_crtc:
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
-unprepare_crtc:
-	if (crtc_funcs->unprepare)
-		crtc_funcs->unprepare(state);
-unprepare_panel:
-	if (panel_funcs->unprepare)
-		panel_funcs->unprepare(state);
 unprepare_conn:
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
+unprepare_crtc:
+	if (crtc_funcs->unprepare)
+		crtc_funcs->unprepare(state);
 	return ret;
 }
 
@@ -666,9 +696,6 @@ static int display_disable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
-	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 
 	if (!state->is_init)
 		return 0;
@@ -676,8 +703,7 @@ static int display_disable(struct display_state *state)
 	if (!state->is_enable)
 		return 0;
 
-	if (panel_funcs->disable)
-		panel_funcs->disable(state);
+	display_panel_disable(state);
 
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
@@ -685,8 +711,7 @@ static int display_disable(struct display_state *state)
 	if (conn_funcs->disable)
 		conn_funcs->disable(state);
 
-	if (panel_funcs->unprepare)
-		panel_funcs->unprepare(state);
+	display_panel_unprepare(state);
 
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);

commit d94724f7476bd65311d31cde7108b47ad84b9114
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 12 20:38:12 2018 +0800

    rockchip: board: do not probe mmc/nand in init_kernel_dtb()
    
    The rkimg_bootdev cmd will do it instead.
    
    Change-Id: Ic4bef6e5d14837e80c185fc2cd1123f34b015054
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4618b4bb4c..a474cf0a5b 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -173,30 +173,12 @@ int board_late_init(void)
 int init_kernel_dtb(void)
 {
 	int ret = 0;
-	struct mmc *mmc;
-	struct udevice *dev;
 	ulong fdt_addr = 0;
 
 	ret = mmc_initialize(gd->bd);
 	if (ret)
-		goto scan_nand;
-	mmc = find_mmc_device(0);
-	if (!mmc) {
-		printf("no mmc device at slot 0\n");
-		goto scan_nand;
-	}
-	ret = mmc_init(mmc);
-	if (!ret)
-		goto init_dtb;
-	printf("%s mmc init fail %d\n", __func__, ret);
-scan_nand:
-	ret = uclass_get_device(UCLASS_RKNAND, 0, &dev);
-	if (ret) {
-		printf("%s: Cannot find rknand device\n", __func__);
-		return -1;
-	}
+		debug("%s mmc initialized fail\n", __func__);
 
-init_dtb:
 	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
 	if (!fdt_addr) {
 		printf("No Found FDT Load Address.\n");

commit af2632579617bf0c6ad9a64e3026ea6ca3a3016f
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jul 4 18:07:12 2018 +0800

    rockchip: rkflash: remove caching last few sectors in ftl_write
    
    1.In ftl_write, if last few sectors are smaller than one page, them'll
    be cached, and join with next ftl ops. When download image in loader
    mode, them wont be download to flash when power off in some cases, and
    it's unacceptable.
    
    Change-Id: I2375a6be8b1fa5b41dfdc962d2c3824d92ba25ef
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index ba840ce85f..466f5ff3fa 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-06-20
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-07-04
  */
 	.arch armv7-a
 	.eabi_attribute 20, 1
@@ -19998,7 +19998,7 @@ FtlWrite:
 	.loc 3 962 0
 	mov	r8, r1
 	str	r2, [sp, #16]
-	str	r3, [sp, #4]
+	str	r3, [sp]
 	.loc 3 970 0
 	bne	.L1676
 	.loc 3 971 0
@@ -20015,261 +20015,138 @@ FtlWrite:
 	add	sp, sp, #64
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
+.LVL1876:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1876:
+.LVL1877:
 .L1676:
 	.cfi_restore_state
 	.loc 3 974 0
 	ldr	r3, [sp, #16]
-.LVL1877:
+.LVL1878:
 	adds	r5, r1, r3
-	ldr	r3, .L1741
+	ldr	r3, .L1736
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L1718
+	bhi	.L1716
 	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1741+4
+	ldr	r3, .L1736+4
 	ldr	r0, [r3]
-.LVL1878:
+.LVL1879:
 	adds	r4, r0, #1
 	beq	.L1675
 	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1741+8
+	ldr	r3, .L1736+8
 	mov	r2, #2048
-.LVL1879:
+.LVL1880:
 	.loc 3 978 0
 	mov	r0, r8
 	.loc 3 977 0
 	str	r2, [r3]
 	.loc 3 978 0
-	ldr	r3, .L1741+12
+	ldr	r3, .L1736+12
 	ldrh	r4, [r3]
 	mov	r1, r4
-.LVL1880:
-	bl	__aeabi_uidiv
 .LVL1881:
+	bl	__aeabi_uidiv
+.LVL1882:
 	.loc 3 979 0
 	mov	r1, r4
 	.loc 3 978 0
-	str	r0, [sp]
-.LVL1882:
+	mov	r10, r0
+.LVL1883:
 	.loc 3 979 0
 	subs	r0, r5, #1
-.LVL1883:
-	bl	__aeabi_uidiv
 .LVL1884:
-	.loc 3 980 0
-	ldr	r2, [sp]
-	.loc 3 979 0
-	str	r0, [sp, #20]
+	bl	__aeabi_uidiv
 .LVL1885:
-	.loc 3 980 0
-	subs	r5, r0, r2
 	.loc 3 982 0
-	ldr	r2, .L1741+16
+	ldr	r2, .L1736+16
 	.loc 3 980 0
+	sub	r5, r0, r10
 	adds	r3, r5, #1
 	.loc 3 982 0
 	adds	r1, r5, #1
 	.loc 3 980 0
-	str	r3, [sp, #8]
-.LVL1886:
+	str	r3, [sp, #12]
 	.loc 3 982 0
 	ldr	r3, [r2]
+	.loc 3 979 0
+	str	r0, [sp, #20]
+.LVL1886:
+	.loc 3 982 0
 	add	r3, r3, r1
 	str	r3, [r2]
 	.loc 3 983 0
-	ldr	r3, .L1741+20
+	ldr	r3, .L1736+20
 	ldr	r7, [r3]
 	cbz	r7, .L1678
 	.loc 3 984 0
 	ldr	r3, [r7, #16]
-	ldr	r2, [sp]
-	cmp	r2, r3
+	cmp	r10, r3
 	beq	.L1679
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
 .LVL1887:
 .L1678:
 	.loc 3 1008 0
-	ldr	r3, .L1741+24
-	ldr	r4, .L1741+28
+	ldr	r3, .L1736+24
+	ldr	r4, .L1736+28
 	ldr	r3, [r3]
 	cbz	r3, .L1681
 	.loc 3 1008 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #4]
 	.loc 3 1009 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1741+32
+	ldr	r3, .L1736+32
 	cmp	r2, #0
 	it	eq
 	moveq	r4, r3
 .L1681:
 	.loc 3 1068 0
-	ldr	r6, [sp]
+	mov	r6, r10
 .LVL1888:
 .L1682:
 	.loc 3 1011 0
-	ldr	r3, [sp, #8]
-	cmp	r3, #0
-	beq	.L1716
-	.loc 3 1012 0
-	ldr	r3, .L1741+36
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1683
-	.loc 3 1012 0 is_stmt 0 discriminator 1
-	mov	r2, #1012
-	ldr	r1, .L1741+40
-	ldr	r0, .L1741+44
-	bl	printf
-.LVL1889:
-.L1683:
-	.loc 3 1013 0 is_stmt 1
-	ldrh	r7, [r4, #4]
-	cbnz	r7, .L1684
-	.loc 3 1014 0
-	bl	FtlCacheWriteBack
-.LVL1890:
-	.loc 3 1016 0
-	ldr	r3, .L1741+28
-	ldr	r5, .L1741+24
-	cmp	r4, r3
-	bne	.L1685
-	.loc 3 1017 0
-	ldr	r0, .L1741+32
-	ldrh	r4, [r0, #4]
-.LVL1891:
-	cbnz	r4, .L1686
-	.loc 3 1018 0
-	bl	allocate_new_data_superblock
-.LVL1892:
-	.loc 3 1019 0
-	str	r4, [r5]
-.L1686:
-	.loc 3 1021 0
-	ldr	r0, .L1741+28
-	bl	allocate_new_data_superblock
-.LVL1893:
-	.loc 3 1023 0
-	ldr	r4, .L1741+28
-	.loc 3 1022 0
-	ldr	r2, [r5]
-	.loc 3 1023 0
-	ldr	r3, .L1741+32
-	cmp	r2, #0
-	it	ne
-	movne	r4, r3
-.L1687:
-.LVL1894:
-	.loc 3 1033 0
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1684
-	.loc 3 1034 0
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.LVL1895:
-.L1684:
-	.loc 3 1041 0
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	.loc 3 1043 0
-	ldrh	r3, [r4, #4]
-	ldr	r1, [sp, #8]
-	.loc 3 1041 0
-	lsls	r2, r2, #2
-	cmp	r3, r1
-	it	cs
-	movcs	r3, r1
-	cmp	r2, r3
-	it	cs
-	movcs	r2, r3
-	.loc 3 1045 0
-	ldr	r3, .L1741+36
-	str	r2, [sp, #36]
-.LVL1896:
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-.LVL1897:
-	ldrh	r3, [r3]
-	cmp	r2, r3
-	bcc	.L1688
-	.loc 3 1045 0 is_stmt 0 discriminator 1
-	movw	r2, #1045
-	ldr	r1, .L1741+40
-	ldr	r0, .L1741+44
-	bl	printf
-.LVL1898:
-.L1688:
-	.loc 3 1054 0 is_stmt 1 discriminator 1
-	ldr	r10, .L1741+80
-	.loc 3 1068 0 discriminator 1
-	mov	fp, #0
-.L1689:
-.LVL1899:
-	.loc 3 1046 0 discriminator 1
-	ldr	r3, [sp, #36]
-	cmp	fp, r3
-	bne	.L1710
-.L1690:
-.LVL1900:
-	.loc 3 1127 0
-	ldr	r3, .L1741+20
-	ldr	r3, [r3]
+	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1711
-.LVL1901:
-	.loc 3 1129 0
-	ldr	r3, [sp, #8]
-	.loc 3 1130 0
-	subs	fp, fp, #1
-.LVL1902:
-	.loc 3 1129 0
-	add	r3, r3, #-1
-	str	r3, [sp, #8]
-.LVL1903:
-	.loc 3 1130 0
-	bne	.L1711
-.LVL1904:
-.L1716:
+	bne	.L1712
 	.loc 3 1137 0
-	ldr	r2, [sp]
-	movs	r0, #0
 	ldr	r3, [sp, #20]
-.LVL1905:
 	.loc 3 1139 0
-	ldr	r4, .L1741+48
-.LVL1906:
+	ldr	r4, .L1736+36
+.LVL1889:
 	.loc 3 1137 0
-	subs	r1, r3, r2
+	ldr	r0, [sp, #12]
+	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
-.LVL1907:
+.LVL1890:
 	.loc 3 1139 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
 	bhi	.L1713
 	.loc 3 1141 0
-	ldr	r5, .L1741+52
-	ldr	r6, .L1741+56
-.LVL1908:
-.L1737:
+	ldr	r5, .L1736+40
+	ldr	r6, .L1736+44
+.LVL1891:
+.L1732:
 	ldrh	r3, [r5]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1717
+	bne	.L1714
 	.loc 3 1141 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	bne	.L1717
+	bne	.L1714
 	.loc 3 1142 0 is_stmt 1
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1909:
+.LVL1892:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1910:
-.L1717:
+.LVL1893:
+.L1714:
 	.loc 3 1143 0
-	ldr	r2, .L1741+60
+	ldr	r2, .L1736+48
 	movs	r3, #128
 	.loc 3 1145 0
 	movs	r1, #1
@@ -20277,38 +20154,37 @@ FtlWrite:
 	.loc 3 1143 0
 	strh	r3, [r2]	@ movhi
 	.loc 3 1144 0
-	ldr	r2, .L1741+64
+	ldr	r2, .L1736+52
 	strh	r3, [r2]	@ movhi
 	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
-.LVL1911:
+.LVL1894:
 	.loc 3 1146 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1912:
+.LVL1895:
 	.loc 3 1147 0
 	ldrh	r3, [r4]
 	cmp	r3, #8
-	bls	.L1737
+	bls	.L1732
 	b	.L1713
-.LVL1913:
+.LVL1896:
 .L1679:
 	.loc 3 987 0
-	ldr	r2, .L1741+68
-.LVL1914:
+	ldr	r2, .L1736+56
 	.loc 3 988 0
 	mov	r1, r4
-.LVL1915:
+.LVL1897:
 	mov	r0, r8
-.LVL1916:
+.LVL1898:
 	.loc 3 987 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
 	.loc 3 988 0
 	bl	__aeabi_uidivmod
-.LVL1917:
+.LVL1899:
 	ldr	r2, [sp, #16]
 	.loc 3 989 0
 	subs	r4, r4, r1
@@ -20316,72 +20192,200 @@ FtlWrite:
 	ldr	r0, [r7, #8]
 	.loc 3 988 0
 	mov	r3, r1
-.LVL1918:
+.LVL1900:
 	.loc 3 992 0
-	ldr	r1, [sp, #4]
-.LVL1919:
+	ldr	r1, [sp]
+.LVL1901:
 	cmp	r4, r2
 	it	cs
 	movcs	r4, r2
-.LVL1920:
+.LVL1902:
 	lsls	r6, r4, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r6
 	bl	ftl_memcpy
-.LVL1921:
+.LVL1903:
 	.loc 3 994 0
 	cbnz	r5, .L1680
-.LVL1922:
+.LVL1904:
 .L1713:
 	.loc 3 995 0
 	movs	r0, #0
 	b	.L1675
-.LVL1923:
+.LVL1905:
 .L1680:
 	.loc 3 996 0
 	ldr	r3, [sp, #16]
 	.loc 3 997 0
 	add	r8, r8, r4
-.LVL1924:
+.LVL1906:
+	.loc 3 999 0
+	add	r10, r10, #1
+.LVL1907:
 	.loc 3 996 0
 	subs	r3, r3, r4
 	str	r3, [sp, #16]
-.LVL1925:
+.LVL1908:
 	.loc 3 998 0
-	ldr	r3, [sp, #4]
-.LVL1926:
-	add	r3, r3, r6
-	str	r3, [sp, #4]
-.LVL1927:
-	.loc 3 999 0
 	ldr	r3, [sp]
-.LVL1928:
-	adds	r3, r3, #1
+.LVL1909:
+	add	r3, r3, r6
 	str	r3, [sp]
-.LVL1929:
+.LVL1910:
 	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1930:
-	str	r5, [sp, #8]
+.LVL1911:
+	str	r5, [sp, #12]
 	b	.L1678
-.LVL1931:
+.LVL1912:
+.L1712:
+	.loc 3 1012 0
+	ldr	r3, .L1736+60
+.LVL1913:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1683
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	mov	r2, #1012
+	ldr	r1, .L1736+64
+	ldr	r0, .L1736+68
+	bl	printf
+.LVL1914:
+.L1683:
+	.loc 3 1013 0 is_stmt 1
+	ldrh	r7, [r4, #4]
+	cbnz	r7, .L1684
+	.loc 3 1014 0
+	bl	FtlCacheWriteBack
+.LVL1915:
+	.loc 3 1016 0
+	ldr	r3, .L1736+28
+	ldr	r5, .L1736+24
+	cmp	r4, r3
+	bne	.L1685
+	.loc 3 1017 0
+	ldr	r0, .L1736+32
+	ldrh	r4, [r0, #4]
+.LVL1916:
+	cbnz	r4, .L1686
+	.loc 3 1018 0
+	bl	allocate_new_data_superblock
+.LVL1917:
+	.loc 3 1019 0
+	str	r4, [r5]
+.L1686:
+	.loc 3 1021 0
+	ldr	r0, .L1736+28
+	bl	allocate_new_data_superblock
+.LVL1918:
+	.loc 3 1023 0
+	ldr	r4, .L1736+28
+	.loc 3 1022 0
+	ldr	r2, [r5]
+	.loc 3 1023 0
+	ldr	r3, .L1736+32
+	cmp	r2, #0
+	it	ne
+	movne	r4, r3
+.L1687:
+.LVL1919:
+	.loc 3 1033 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1684
+	.loc 3 1034 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1920:
+.L1684:
+	.loc 3 1041 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	.loc 3 1043 0
+	ldrh	r3, [r4, #4]
+	ldr	r1, [sp, #12]
+	.loc 3 1041 0
+	lsls	r2, r2, #2
+	cmp	r3, r1
+	it	cs
+	movcs	r3, r1
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	.loc 3 1045 0
+	ldr	r3, .L1736+60
+	str	r2, [sp, #36]
+.LVL1921:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+.LVL1922:
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1688
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	movw	r2, #1045
+	ldr	r1, .L1736+64
+	ldr	r0, .L1736+68
+	bl	printf
+.LVL1923:
+.L1688:
+	.loc 3 1054 0 is_stmt 1 discriminator 1
+	ldr	fp, .L1736+72
+	.loc 3 1068 0 discriminator 1
+	movs	r3, #0
+	str	r3, [sp, #4]
+.L1689:
+.LVL1924:
+	.loc 3 1046 0 discriminator 1
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #36]
+	cmp	r3, r2
+	bne	.L1710
+.L1690:
+.LVL1925:
+	.loc 3 1133 0
+	ldr	r0, .L1736+72
+	mov	r3, r4
+	movs	r2, #0
+	ldr	r1, [sp, #4]
+	ldr	r0, [r0]
+	bl	FtlProgPages
+.LVL1926:
+	.loc 3 1134 0
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #12]
+	cmp	r3, r2
+	bls	.L1711
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	movw	r2, #1134
+	ldr	r1, .L1736+64
+	ldr	r0, .L1736+68
+	bl	printf
+.LVL1927:
+.L1711:
+	.loc 3 1135 0 is_stmt 1
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #4]
+	subs	r3, r3, r2
+	str	r3, [sp, #12]
+.LVL1928:
+	b	.L1682
+.LVL1929:
 .L1685:
 	.loc 3 1028 0
 	ldrh	r2, [r3, #4]
 	.loc 3 1027 0
 	str	r7, [r5]
 	.loc 3 1028 0
-	cbnz	r2, .L1723
+	cbnz	r2, .L1721
 	.loc 3 1029 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1932:
+.LVL1930:
 	b	.L1687
-.L1723:
+.L1721:
 	mov	r4, r3
-.LVL1933:
+.LVL1931:
 	b	.L1684
-.LVL1934:
+.LVL1932:
 .L1710:
 	.loc 3 1047 0
 	ldrh	r2, [r4, #4]
@@ -20393,29 +20397,30 @@ FtlWrite:
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1935:
+.LVL1933:
 	.loc 3 1052 0
 	mov	r0, r4
-	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1936:
-	.loc 3 1055 0
-	ldr	r3, .L1741+72
+.LVL1934:
+	ldr	r3, [sp, #4]
 	.loc 3 1054 0
-	ldr	r1, [r10]
+	ldr	r1, [fp]
+	muls	r7, r3, r7
 	.loc 3 1055 0
+	ldr	r3, .L1736+76
 	ldrh	r2, [r3]
+	ldr	r3, [sp, #4]
 	.loc 3 1054 0
 	add	r1, r1, r7
 	str	r0, [r1, #4]
 	.loc 3 1056 0
 	str	r6, [r1, #16]
-.LVL1937:
+.LVL1935:
 	.loc 3 1055 0
-	mul	r0, r2, fp
-.LVL1938:
+	mul	r0, r2, r3
+.LVL1936:
 	bic	r3, r0, #3
-	ldr	r0, .L1741+76
+	ldr	r0, .L1736+80
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -20425,23 +20430,22 @@ FtlWrite:
 	.loc 3 1059 0
 	mov	r0, r3
 	movs	r1, #0
-.LVL1939:
+.LVL1937:
 	.loc 3 1055 0
-	str	r3, [sp, #12]
-.LVL1940:
+	str	r3, [sp, #8]
+.LVL1938:
 	.loc 3 1059 0
 	bl	ftl_memset
-.LVL1941:
+.LVL1939:
 	.loc 3 1061 0
-	ldr	r3, [sp]
-	ldr	r2, .L1741+12
-	cmp	r6, r3
+	cmp	r6, r10
+	ldr	r2, .L1736+12
 	beq	.L1691
 	.loc 3 1061 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1736
-.LVL1942:
+	bne	.L1731
+.LVL1940:
 	.loc 3 1069 0 is_stmt 1
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #16]
@@ -20453,11 +20457,11 @@ FtlWrite:
 	.loc 3 1069 0
 	subs	r5, r5, r2
 	uxth	r5, r5
-.LVL1943:
+.LVL1941:
 	b	.L1694
-.L1742:
+.L1737:
 	.align	2
-.L1741:
+.L1736:
 	.word	.LANCHOR34
 	.word	.LANCHOR88
 	.word	.LANCHOR178
@@ -20467,59 +20471,56 @@ FtlWrite:
 	.word	.LANCHOR179
 	.word	.LANCHOR51
 	.word	.LANCHOR52
-	.word	.LANCHOR3
-	.word	.LANCHOR180
-	.word	.LC1
 	.word	.LANCHOR48
 	.word	.LANCHOR82
 	.word	.LANCHOR101
 	.word	.LANCHOR85
 	.word	.LANCHOR84
 	.word	.LANCHOR66
+	.word	.LANCHOR3
+	.word	.LANCHOR180
+	.word	.LC1
+	.word	.LANCHOR122
 	.word	.LANCHOR24
 	.word	.LANCHOR115
-	.word	.LANCHOR122
-.LVL1944:
+.LVL1942:
 .L1691:
 	.loc 3 1063 0
 	ldrh	r5, [r2]
 	mov	r0, r8
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL1945:
+.LVL1943:
 	ldr	r3, [sp, #16]
 	.loc 3 1064 0
 	subs	r5, r5, r1
 	.loc 3 1063 0
 	str	r1, [sp, #24]
-.LVL1946:
+.LVL1944:
 	cmp	r5, r3
 	it	cs
 	movcs	r5, r3
-.LVL1947:
+.LVL1945:
 .L1694:
 	.loc 3 1072 0
-	ldr	r2, .L1743
-	.loc 3 1073 0
-	ldr	r3, [sp]
-	.loc 3 1072 0
+	ldr	r2, .L1738
 	ldrh	r2, [r2]
 	cmp	r5, r2
 	.loc 3 1074 0
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	.loc 3 1072 0
 	bne	.L1695
 	.loc 3 1073 0
-	cmp	r6, r3
+	cmp	r6, r10
 	.loc 3 1074 0
 	add	r7, r7, r2
 	.loc 3 1076 0
 	ittet	ne
 	mulne	r5, r5, r6
-.LVL1948:
-	ldrne	r3, [sp, #4]
+.LVL1946:
+	ldrne	r3, [sp]
 	.loc 3 1074 0
-	ldreq	r3, [sp, #4]
+	ldreq	r3, [sp]
 	.loc 3 1076 0
 	subne	r5, r5, r8
 	.loc 3 1074 0
@@ -20528,39 +20529,35 @@ FtlWrite:
 	.loc 3 1076 0
 	addne	r5, r3, r5, lsl #9
 	strne	r5, [r7, #8]
-.LVL1949:
+.LVL1947:
 .L1697:
 	.loc 3 1119 0
-	ldr	r3, .L1743+4
+	ldr	r3, .L1738+4
 	ldrb	r1, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
 	bcc	.L1707
 	.loc 3 1119 0 is_stmt 0 discriminator 1
 	movw	r2, #1119
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
+	ldr	r1, .L1738+8
+	ldr	r0, .L1738+12
 	bl	printf
-.LVL1950:
+.LVL1948:
 .L1707:
 	.loc 3 1120 0 is_stmt 1
 	ldr	r3, [sp, #32]
 	movw	r2, #61589
 	ldr	r1, [sp, #28]
-	.loc 3 1046 0
-	add	fp, fp, #1
-.LVL1951:
-	.loc 3 1120 0
 	strh	r2, [r3, r1]	@ movhi
 	.loc 3 1121 0
-	ldr	r1, .L1743+16
-	ldr	r3, [sp, #12]
+	ldr	r1, .L1738+16
+	ldr	r3, [sp, #8]
 	ldr	r2, [r1]
 	str	r2, [r3, #4]
 	adds	r2, r2, #1
 	adds	r3, r2, #1
 	.loc 3 1122 0
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	.loc 3 1121 0
 	it	eq
 	moveq	r2, #0
@@ -20571,23 +20568,28 @@ FtlWrite:
 	str	r6, [r3, #8]
 	.loc 3 1125 0
 	adds	r6, r6, #1
-.LVL1952:
+.LVL1949:
 	.loc 3 1123 0
 	str	r2, [r3, #12]
 	.loc 3 1124 0
 	ldrh	r2, [r4]
 	strh	r2, [r3, #2]	@ movhi
+	.loc 3 1046 0
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	str	r3, [sp, #4]
+.LVL1950:
 	b	.L1689
-.LVL1953:
+.LVL1951:
 .L1695:
 	.loc 3 1079 0
-	cmp	r6, r3
+	cmp	r6, r10
 	.loc 3 1080 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1743+20
+	ldreq	r1, .L1738+20
 	.loc 3 1082 0
-	ldrne	r1, .L1743+24
+	ldrne	r1, .L1738+24
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	.loc 3 1084 0
@@ -20600,7 +20602,7 @@ FtlWrite:
 	.loc 3 1090 0
 	add	r0, sp, #44
 	.loc 3 1088 0
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	.loc 3 1087 0
 	str	r6, [sp, #60]
 	.loc 3 1088 0
@@ -20617,34 +20619,33 @@ FtlWrite:
 	.loc 3 1090 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1954:
+.LVL1952:
 	.loc 3 1091 0
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
 	bne	.L1701
 	.loc 3 1092 0
-	ldr	r1, .L1743+28
+	ldr	r1, .L1738+28
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
 .L1704:
 .LBE300:
 	.loc 3 1104 0
-	ldr	r3, [sp]
-	lsls	r2, r5, #9
-	cmp	r6, r3
+	cmp	r6, r10
+	lsl	r2, r5, #9
 	bne	.L1705
 	.loc 3 1105 0
-	ldr	r1, [r10]
+	ldr	r1, [fp]
 	ldr	r3, [sp, #24]
 	add	r1, r1, r7
 	ldr	r0, [r1, #8]
-	ldr	r1, [sp, #4]
+	ldr	r1, [sp]
 	add	r0, r0, r3, lsl #9
-.L1739:
+.L1734:
 	.loc 3 1107 0
 	bl	ftl_memcpy
-.LVL1955:
+.LVL1953:
 	.loc 3 1109 0
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
@@ -20654,117 +20655,90 @@ FtlWrite:
 	cmp	r2, #0
 	beq	.L1697
 	.loc 3 1111 0
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	add	r7, r7, r2
-	ldr	r2, .L1743+32
+	ldr	r2, .L1738+32
 	str	r7, [r2]
 	.loc 3 1112 0
-	ldr	r2, .L1743+36
+	ldr	r2, .L1738+36
 	str	r4, [r2]
 	b	.L1697
 .L1701:
 .LBB301:
 	.loc 3 1094 0
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	ldr	r1, [r3, #8]
 	cmp	r6, r1
 	beq	.L1703
 	.loc 3 1095 0
-	ldr	r0, .L1743+28
+	ldr	r0, .L1738+28
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	.loc 3 1096 0
 	mov	r2, r6
-	ldr	r0, .L1743+40
+	ldr	r0, .L1738+40
 	bl	printf
-.LVL1956:
+.LVL1954:
 .L1703:
 	.loc 3 1098 0
-	ldr	r3, [sp, #12]
+	ldr	r3, [sp, #8]
 	ldr	r2, [r3, #8]
 	cmp	r6, r2
 	beq	.L1704
 	.loc 3 1098 0 is_stmt 0 discriminator 1
 	movw	r2, #1098
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
+	ldr	r1, .L1738+8
+	ldr	r0, .L1738+12
 	bl	printf
-.LVL1957:
+.LVL1955:
 	b	.L1704
-.LVL1958:
+.LVL1956:
 .L1700:
 .LBE301:
 	.loc 3 1101 0 is_stmt 1
-	ldr	r2, [r10]
+	ldr	r2, [fp]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1743+44
+	ldr	r2, .L1738+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1959:
+.LVL1957:
 	b	.L1704
 .L1705:
 	.loc 3 1107 0
-	ldr	r1, .L1743
-	ldr	r0, [r10]
-	ldr	r3, [sp, #4]
+	ldr	r1, .L1738
+	ldr	r0, [fp]
+	ldr	r3, [sp]
 	ldrh	r1, [r1]
 	add	r0, r0, r7
 	ldr	r0, [r0, #8]
 	muls	r1, r6, r1
 	sub	r1, r1, r8
 	add	r1, r3, r1, lsl #9
-	b	.L1739
-.LVL1960:
-.L1736:
+	b	.L1734
+.LVL1958:
+.L1731:
 	.loc 3 1117 0
 	ldrh	r2, [r2]
-	ldr	r3, [sp, #4]
-	ldr	r1, [r10]
+	ldr	r3, [sp]
+	ldr	r1, [fp]
 	muls	r2, r6, r2
 	add	r7, r7, r1
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
 	b	.L1697
-.LVL1961:
-.L1711:
-	.loc 3 1133 0
-	ldr	r0, .L1743+48
-	mov	r3, r4
-	movs	r2, #0
-	mov	r1, fp
-	ldr	r0, [r0]
-	bl	FtlProgPages
-.LVL1962:
-	.loc 3 1134 0
-	ldr	r3, [sp, #8]
-	cmp	r3, fp
-	bcs	.L1714
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	movw	r2, #1134
-	ldr	r1, .L1743+8
-	ldr	r0, .L1743+12
-	bl	printf
-.LVL1963:
-.L1714:
-	.loc 3 1135 0 is_stmt 1
-	ldr	r3, [sp, #8]
-	sub	r3, r3, fp
-	str	r3, [sp, #8]
-.LVL1964:
-	b	.L1682
-.LVL1965:
-.L1718:
+.LVL1959:
+.L1716:
 	.loc 3 975 0
 	mov	r0, #-1
-.LVL1966:
+.LVL1960:
 	b	.L1675
-.L1744:
+.L1739:
 	.align	2
-.L1743:
+.L1738:
 	.word	.LANCHOR12
 	.word	.LANCHOR3
 	.word	.LANCHOR180
@@ -20777,7 +20751,6 @@ FtlWrite:
 	.word	.LANCHOR171
 	.word	.LC105
 	.word	.LANCHOR23
-	.word	.LANCHOR122
 	.cfi_endproc
 .LFE220:
 	.size	FtlWrite, .-FtlWrite
@@ -20796,17 +20769,17 @@ sftl_write:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1967:
+.LVL1961:
 	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1968:
+.LVL1962:
 	mov	r1, r0
-.LVL1969:
+.LVL1963:
 	movs	r0, #0
-.LVL1970:
+.LVL1964:
 	b	FtlWrite
-.LVL1971:
+.LVL1965:
 	.cfi_endproc
 .LFE223:
 	.size	sftl_write, .-sftl_write
@@ -20837,21 +20810,21 @@ FtlLoadSysInfo:
 	.loc 2 1368 0
 	movs	r1, #0
 	.loc 2 1365 0
-	ldr	r8, .L1767+136
+	ldr	r8, .L1762+136
 	.loc 2 1368 0
-	ldr	r5, .L1767
+	ldr	r5, .L1762
 	.loc 2 1365 0
 	ldr	r3, [r8]
-	ldr	r4, .L1767+4
+	ldr	r4, .L1762+4
 	.loc 2 1366 0
-	ldr	r10, .L1767+140
+	ldr	r10, .L1762+140
 	.loc 2 1368 0
 	ldrh	r2, [r5]
-	ldr	r7, .L1767+8
+	ldr	r7, .L1762+8
 	.loc 2 1365 0
 	str	r3, [r4, #8]
 	.loc 2 1369 0
-	ldr	r6, .L1767+12
+	ldr	r6, .L1762+12
 	.loc 2 1366 0
 	ldr	r3, [r10]
 	.loc 2 1368 0
@@ -20861,24 +20834,24 @@ FtlLoadSysInfo:
 	str	r3, [r4, #12]
 	.loc 2 1368 0
 	bl	ftl_memset
-.LVL1972:
+.LVL1966:
 	.loc 2 1369 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1747
-.L1755:
+	bne	.L1742
+.L1750:
 	.loc 2 1370 0
 	mov	r0, #-1
-.L1746:
+.L1741:
 	.loc 2 1463 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1747:
+.L1742:
 	.cfi_restore_state
 	.loc 2 1372 0
 	movs	r1, #1
@@ -20886,48 +20859,48 @@ FtlLoadSysInfo:
 	mov	fp, r4
 	.loc 2 1372 0
 	bl	FtlGetLastWrittenPage
-.LVL1973:
+.LVL1967:
 	.loc 2 1381 0
-	ldr	r3, .L1767+16
+	ldr	r3, .L1762+16
 	.loc 2 1372 0
 	sxth	r7, r0
-.LVL1974:
+.LVL1968:
 	.loc 2 1373 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1749:
+.L1744:
 	.loc 2 1375 0
 	cmp	r7, #0
-	bge	.L1752
+	bge	.L1747
 	.loc 2 1388 0
 	movw	r2, #1388
-	ldr	r1, .L1767+20
-	ldr	r0, .L1767+24
+	ldr	r1, .L1762+20
+	ldr	r0, .L1762+24
 	bl	printf
-.LVL1975:
-.L1751:
+.LVL1969:
+.L1746:
 	.loc 2 1390 0
-	ldr	r2, .L1767+28
+	ldr	r2, .L1762+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1754
+	bcs	.L1749
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	movw	r2, #1390
-	ldr	r1, .L1767+20
-	ldr	r0, .L1767+24
+	ldr	r1, .L1762+20
+	ldr	r0, .L1762+24
 	bl	printf
-.LVL1976:
-.L1754:
+.LVL1970:
+.L1749:
 	.loc 2 1392 0 is_stmt 1
-	ldr	r7, .L1767+32
-.LVL1977:
+	ldr	r7, .L1762+32
+.LVL1971:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1978:
+.LVL1972:
 	.loc 2 1393 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
@@ -20936,7 +20909,7 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1979:
+.LVL1973:
 	.loc 2 1394 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
@@ -20947,17 +20920,17 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1767+36
+	ldr	r3, .L1762+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1980:
+.LVL1974:
 	.loc 2 1396 0
 	ldr	r2, [r7]
-	ldr	r3, .L1767+16
+	ldr	r3, .L1762+16
 	cmp	r2, r3
-	bne	.L1755
+	bne	.L1750
 	.loc 2 1400 0
-	ldr	r3, .L1767+40
+	ldr	r3, .L1762+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	.loc 2 1399 0
 	ldrh	r5, [r7, #8]
@@ -20967,56 +20940,56 @@ FtlLoadSysInfo:
 	strh	r5, [r6, #6]	@ movhi
 	.loc 2 1400 0
 	cmp	r2, r3
-	bne	.L1755
+	bne	.L1750
 	.loc 2 1403 0
-	ldr	r3, .L1767+44
+	ldr	r3, .L1762+44
 	.loc 2 1404 0
-	ldr	r2, .L1767+48
+	ldr	r2, .L1762+48
 	.loc 2 1403 0
 	str	r5, [r3]
 	.loc 2 1404 0
-	ldr	r3, .L1767+52
+	ldr	r3, .L1762+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
 	.loc 2 1405 0
-	ldr	r2, .L1767+56
+	ldr	r2, .L1762+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1767+60
+	ldr	r2, .L1762+60
 	str	r3, [r2]
 	.loc 2 1406 0
-	ldr	r3, .L1767+64
+	ldr	r3, .L1762+64
 	ldr	r6, [r3]
-	ldr	r3, .L1767+68
+	ldr	r3, .L1762+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1767+72
+	ldr	r3, .L1762+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1981:
-	ldr	r3, .L1767+76
+.LVL1975:
+	ldr	r3, .L1762+76
 	.loc 2 1412 0
 	cmp	r5, r6
 	.loc 2 1406 0
 	strh	r0, [r3]	@ movhi
 	.loc 2 1412 0
-	bls	.L1756
+	bls	.L1751
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	movw	r2, #1412
-	ldr	r1, .L1767+20
-	ldr	r0, .L1767+24
+	ldr	r1, .L1762+20
+	ldr	r0, .L1762+24
 	bl	printf
-.LVL1982:
-.L1756:
+.LVL1976:
+.L1751:
 	.loc 2 1415 0 is_stmt 1
 	ldrh	r2, [r4, #16]
 	.loc 2 1414 0
-	ldr	r3, .L1767+80
+	ldr	r3, .L1762+80
 	ldrh	ip, [r4, #14]
 	.loc 2 1419 0
-	ldr	r7, .L1767+84
+	ldr	r7, .L1762+84
 	.loc 2 1415 0
 	lsrs	r1, r2, #6
 	.loc 2 1416 0
@@ -21027,7 +21000,7 @@ FtlLoadSysInfo:
 	.loc 2 1415 0
 	strh	r1, [r3, #2]	@ movhi
 	.loc 2 1424 0
-	ldr	r1, .L1767+88
+	ldr	r1, .L1762+88
 	.loc 2 1417 0
 	strb	r2, [r3, #8]
 	.loc 2 1424 0
@@ -21063,7 +21036,7 @@ FtlLoadSysInfo:
 	.loc 2 1427 0
 	strb	r2, [r1, #8]
 	.loc 2 1429 0
-	ldr	r2, .L1767+92
+	ldr	r2, .L1762+92
 	strh	r5, [r2]	@ movhi
 	.loc 2 1430 0
 	ldrh	r5, [r4, #24]
@@ -21080,35 +21053,35 @@ FtlLoadSysInfo:
 	.loc 2 1432 0
 	strb	r5, [r2, #8]
 	.loc 2 1434 0
-	ldr	r5, .L1767+96
+	ldr	r5, .L1762+96
 	str	r3, [r5]
 	.loc 2 1435 0
-	ldr	r5, .L1767+100
+	ldr	r5, .L1762+100
 	str	r3, [r5]
 	.loc 2 1436 0
-	ldr	r5, .L1767+104
+	ldr	r5, .L1762+104
 	str	r3, [r5]
 	.loc 2 1437 0
-	ldr	r5, .L1767+108
+	ldr	r5, .L1762+108
 	str	r3, [r5]
 	.loc 2 1439 0
-	ldr	r5, .L1767+112
+	ldr	r5, .L1762+112
 	str	r6, [r5]
 	mov	r6, r1
 	.loc 2 1440 0
-	ldr	r5, .L1767+116
+	ldr	r5, .L1762+116
 	str	r3, [r5]
 	.loc 2 1441 0
-	ldr	r5, .L1767+120
+	ldr	r5, .L1762+120
 	str	r3, [r5]
 	.loc 2 1442 0
-	ldr	r5, .L1767+124
+	ldr	r5, .L1762+124
 	.loc 2 1444 0
 	ldr	lr, [r4, #40]
 	.loc 2 1442 0
 	str	r3, [r5]
 	.loc 2 1444 0
-	ldr	r3, .L1767+128
+	ldr	r3, .L1762+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
@@ -21116,7 +21089,7 @@ FtlLoadSysInfo:
 	it	hi
 	strhi	lr, [r3]
 	.loc 2 1447 0
-	ldr	r3, .L1767+132
+	ldr	r3, .L1762+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -21126,47 +21099,47 @@ FtlLoadSysInfo:
 	.loc 2 1450 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1759
+	beq	.L1754
 	.loc 2 1451 0
-	ldr	r0, .L1767+80
+	ldr	r0, .L1762+80
 	bl	make_superblock
-.LVL1983:
-.L1759:
+.LVL1977:
+.L1754:
 	.loc 2 1453 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1760
+	beq	.L1755
 	.loc 2 1454 0
-	ldr	r0, .L1767+88
+	ldr	r0, .L1762+88
 	bl	make_superblock
-.LVL1984:
-.L1760:
+.LVL1978:
+.L1755:
 	.loc 2 1456 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1761
+	beq	.L1756
 	.loc 2 1457 0
-	ldr	r0, .L1767+92
+	ldr	r0, .L1762+92
 	bl	make_superblock
-.LVL1985:
-.L1761:
+.LVL1979:
+.L1756:
 	.loc 2 1459 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1762
+	beq	.L1757
 	.loc 2 1460 0
-	ldr	r0, .L1767+84
+	ldr	r0, .L1762+84
 	bl	make_superblock
-.LVL1986:
-.L1762:
+.LVL1980:
+.L1757:
 	.loc 2 1462 0
 	movs	r0, #0
-	b	.L1746
-.LVL1987:
-.L1752:
+	b	.L1741
+.LVL1981:
+.L1747:
 	.loc 2 1376 0
 	ldrh	r2, [r6]
 	.loc 2 1378 0
@@ -21182,34 +21155,34 @@ FtlLoadSysInfo:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1988:
+.LVL1982:
 	.loc 2 1381 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1750
+	beq	.L1745
 	.loc 2 1382 0 discriminator 1
 	ldr	r2, [r8]
 	.loc 2 1381 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1750
+	bne	.L1745
 	.loc 2 1383 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	.loc 2 1382 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1751
-.L1750:
+	beq	.L1746
+.L1745:
 	subs	r7, r7, #1
-.LVL1989:
+.LVL1983:
 	sxth	r7, r7
-.LVL1990:
-	b	.L1749
-.L1768:
+.LVL1984:
+	b	.L1744
+.L1763:
 	.align	2
-.L1767:
+.L1762:
 	.word	.LANCHOR5
 	.word	.LANCHOR108
 	.word	.LANCHOR43
@@ -21273,117 +21246,117 @@ FtlSysBlkInit:
 	.cfi_offset 14, -4
 	.loc 2 2310 0
 	movs	r3, #0
-	ldr	r6, .L1785
+	ldr	r6, .L1780
 	strh	r3, [r6]	@ movhi
 	.loc 2 2312 0
-	ldr	r3, .L1785+4
+	ldr	r3, .L1780+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1991:
+.LVL1985:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL1992:
+.LVL1986:
 	.loc 2 2314 0
-	ldr	r3, .L1785+8
+	ldr	r3, .L1780+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1770
-.L1772:
+	bne	.L1765
+.L1767:
 	.loc 2 2315 0
 	mov	r7, #-1
-.L1769:
+.L1764:
 	.loc 2 2398 0
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1770:
+.L1765:
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL1993:
+.LVL1987:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1772
+	bne	.L1767
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL1994:
+.LVL1988:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL1995:
+.LVL1989:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL1996:
+.LVL1990:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL1997:
+.LVL1991:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL1998:
+.LVL1992:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL1999:
+.LVL1993:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL2000:
+.LVL1994:
 	.loc 2 2330 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL2001:
+.LVL1995:
 .LBB305:
 .LBB306:
 	.loc 2 2332 0
-	ldr	r3, .L1785+12
+	ldr	r3, .L1780+12
 	.loc 2 2333 0
 	movs	r0, #12
 	.loc 2 2332 0
 	ldrh	r1, [r3]
 	.loc 2 2333 0
-	ldr	r3, .L1785+16
+	ldr	r3, .L1780+16
 	ldr	r2, [r3]
 	.loc 2 2332 0
 	mov	r3, r7
-.L1773:
-.LVL2002:
+.L1768:
+.LVL1996:
 	cmp	r3, r1
-	bge	.L1778
+	bge	.L1773
 	.loc 2 2333 0
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1774
-.L1778:
+	bge	.L1769
+.L1773:
 	.loc 2 2336 0
-	ldr	r4, .L1785+20
+	ldr	r4, .L1780+20
 	.loc 2 2338 0
 	cmp	r3, r1
-	ldr	r5, .L1785+24
+	ldr	r5, .L1780+24
 	.loc 2 2336 0
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
 	.loc 2 2338 0
-	bge	.L1784
-.LVL2003:
-.L1775:
+	bge	.L1779
+.LVL1997:
+.L1770:
 	.loc 2 2340 0
-	ldr	r6, .L1785+28
+	ldr	r6, .L1780+28
 	.loc 2 2339 0
-	ldr	r0, .L1785+24
+	ldr	r0, .L1780+24
 	bl	FtlSuperblockPowerLostFix
-.LVL2004:
+.LVL1998:
 	.loc 2 2340 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL2005:
+.LVL1999:
 .LBB307:
 	.loc 2 2346 0
-	ldr	r3, .L1785+32
+	ldr	r3, .L1780+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	.loc 2 2347 0
-	ldr	r0, .L1785+36
+	ldr	r0, .L1780+36
 	.loc 2 2346 0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 2 2352 0
@@ -21399,7 +21372,7 @@ FtlSysBlkInit:
 	strb	r3, [r5, #6]
 	.loc 2 2349 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL2006:
+.LVL2000:
 	.loc 2 2352 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
@@ -21408,7 +21381,7 @@ FtlSysBlkInit:
 	ldrh	r2, [r0]
 .LBE307:
 	.loc 2 2359 0
-	ldr	r0, .L1785+40
+	ldr	r0, .L1780+40
 .LBB308:
 	.loc 2 2354 0
 	strb	r3, [r6, #6]
@@ -21419,77 +21392,77 @@ FtlSysBlkInit:
 .LBE308:
 	.loc 2 2359 0
 	bl	FtlMapBlkWriteDump_data
-.LVL2007:
+.LVL2001:
 	.loc 2 2360 0
-	ldr	r0, .L1785+44
+	ldr	r0, .L1780+44
 	bl	FtlMapBlkWriteDump_data
-.LVL2008:
+.LVL2002:
 	.loc 2 2372 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2009:
+.LVL2003:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2010:
+.LVL2004:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2011:
-	b	.L1779
-.LVL2012:
-.L1774:
+.LVL2005:
+	b	.L1774
+.LVL2006:
+.L1769:
 	.loc 2 2332 0
 	adds	r3, r3, #1
-.LVL2013:
-	b	.L1773
-.L1784:
+.LVL2007:
+	b	.L1768
+.L1779:
 	.loc 2 2338 0
 	ldrh	r3, [r6]
-.LVL2014:
+.LVL2008:
 	cmp	r3, #0
-	bne	.L1775
-.L1779:
+	bne	.L1770
+.L1774:
 	.loc 2 2379 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1780
+	beq	.L1775
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1780
+	cbnz	r3, .L1775
 	.loc 2 2381 0
-	ldr	r5, .L1785+28
+	ldr	r5, .L1780+28
 	.loc 2 2380 0
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1780
+	cbnz	r3, .L1775
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2015:
+.LVL2009:
 	.loc 2 2383 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL2016:
+.LVL2010:
 	.loc 2 2384 0
-	ldr	r0, .L1785+24
+	ldr	r0, .L1780+24
 	bl	allocate_new_data_superblock
-.LVL2017:
+.LVL2011:
 	.loc 2 2385 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL2018:
-.L1780:
+.LVL2012:
+.L1775:
 	.loc 2 2390 0
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1769
+	bne	.L1764
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2019:
-	b	.L1769
-.L1786:
+.LVL2013:
+	b	.L1764
+.L1781:
 	.align	2
-.L1785:
+.L1780:
 	.word	.LANCHOR162
 	.word	.LANCHOR4
 	.word	.LANCHOR81
@@ -21534,11 +21507,11 @@ ftl_low_format:
 	.loc 3 629 0
 	movs	r3, #0
 	.loc 3 631 0
-	ldr	r6, .L1811
+	ldr	r6, .L1806
 	.loc 3 630 0
-	ldr	r2, .L1811+4
+	ldr	r2, .L1806+4
 	.loc 3 629 0
-	ldr	r5, .L1811+8
+	ldr	r5, .L1806+8
 	.loc 3 631 0
 	ldrh	r0, [r6]
 	.loc 3 630 0
@@ -21547,96 +21520,96 @@ ftl_low_format:
 	str	r3, [r5]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2020:
+.LVL2014:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2021:
-	cbz	r0, .L1788
+.LVL2015:
+	cbz	r0, .L1783
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2022:
-.L1788:
+.LVL2016:
+.L1783:
 	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1811+12
+	ldr	r3, .L1806+12
 	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1811+16
+	ldr	r2, .L1806+16
 	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1811+100
+	ldr	ip, .L1806+100
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r3]
 	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
 	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1811+20
+	ldr	r2, .L1806+20
 	str	r3, [sp, #4]
 	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
 	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1789:
-.LVL2023:
+.L1784:
+.LVL2017:
 	.loc 3 635 0 discriminator 1
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2024:
+.LVL2018:
 	cmp	r3, r1
-	blt	.L1790
-.LVL2025:
+	blt	.L1785
+.LVL2019:
 	.loc 3 642 0
-	ldr	r3, .L1811+24
-.LVL2026:
+	ldr	r3, .L1806+24
+.LVL2020:
 	.loc 3 641 0
 	movs	r7, #0
 	.loc 3 642 0
-	ldr	r10, .L1811+104
+	ldr	r10, .L1806+104
 	ldrh	r4, [r3]
-.LVL2027:
+.LVL2021:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2028:
-.L1791:
+.LVL2022:
+.L1786:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1792
+	bhi	.L1787
 	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1811+28
-.LVL2029:
+	ldr	r4, .L1806+28
+.LVL2023:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1793
-.LVL2030:
-.L1797:
+	bgt	.L1788
+.LVL2024:
+.L1792:
 	.loc 3 641 0
 	movs	r6, #0
 	mov	r7, r6
-.L1794:
+.L1789:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2031:
+.LVL2025:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1798
+	bhi	.L1793
 	.loc 3 658 0
 	ldrh	r2, [fp]
-	ldr	r3, .L1811+32
+	ldr	r3, .L1806+32
 	.loc 3 661 0
 	ldrh	r4, [r4]
-	ldr	r6, .L1811+36
+	ldr	r6, .L1806+36
 	.loc 3 658 0
 	str	r2, [r3]
 	.loc 3 661 0
-	ldr	r3, .L1811+40
+	ldr	r3, .L1806+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2032:
+.LVL2026:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2033:
+.LVL2027:
 	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
 	.loc 3 661 0
@@ -21644,21 +21617,21 @@ ftl_low_format:
 	str	r0, [r6]
 	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1811+44
+	ldr	r0, .L1806+44
 	strh	r1, [r0]	@ movhi
 	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1799
+	ble	.L1794
 	.loc 3 664 0
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2034:
+.LVL2028:
 	.loc 3 665 0
 	ldr	r3, [sp]
 	.loc 3 664 0
@@ -21668,13 +21641,13 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1799:
+.L1794:
 	.loc 3 668 0
-	ldr	r2, .L1811+48
+	ldr	r2, .L1806+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1801
+	cbz	r2, .L1796
 	.loc 3 669 0
-	ldr	r1, .L1811+44
+	ldr	r1, .L1806+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -21689,20 +21662,20 @@ ftl_low_format:
 	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1801:
+.L1796:
 	.loc 3 677 0
 	ldr	r3, [sp]
-	ldr	r7, .L1811+52
-.LVL2035:
+	ldr	r7, .L1806+52
+.LVL2029:
 	.loc 3 687 0
-	ldr	r10, .L1811+108
+	ldr	r10, .L1806+108
 	.loc 3 677 0
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
 	.loc 3 678 0
-	ldr	r3, .L1811+56
+	ldr	r3, .L1806+56
 	ldrh	r3, [r3]
 	.loc 3 677 0
 	str	r4, [r7]
@@ -21714,25 +21687,25 @@ ftl_low_format:
 	.loc 3 678 0
 	str	r4, [r6]
 	.loc 3 694 0
-	ldr	r6, .L1811+60
+	ldr	r6, .L1806+60
 	.loc 3 679 0
 	muls	r4, r3, r4
-	ldr	r3, .L1811+64
+	ldr	r3, .L1806+64
 	str	r4, [r3]
 	.loc 3 689 0
 	movw	r4, #65535
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2036:
+.LVL2030:
 	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2037:
+.LVL2031:
 	.loc 3 688 0
-	ldr	r2, .L1811+68
+	ldr	r2, .L1806+68
 	movs	r3, #0
 	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
@@ -21743,7 +21716,7 @@ ftl_low_format:
 	.loc 3 688 0
 	str	r3, [r2]
 	.loc 3 689 0
-	ldr	r2, .L1811+72
+	ldr	r2, .L1806+72
 	.loc 3 696 0
 	strh	r3, [r6]	@ movhi
 	.loc 3 690 0
@@ -21764,21 +21737,21 @@ ftl_low_format:
 	.loc 3 701 0
 	mov	r10, r6
 	.loc 3 698 0
-	ldr	r3, .L1811+76
+	ldr	r3, .L1806+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2038:
-.L1803:
+.LVL2032:
+.L1798:
 	.loc 3 701 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2039:
+.LVL2033:
 	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1804
+	bne	.L1799
 	.loc 3 705 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -21787,92 +21760,92 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
 	.loc 3 707 0
-	b	.L1803
-.LVL2040:
-.L1790:
+	b	.L1798
+.LVL2034:
+.L1785:
 	.loc 3 636 0 discriminator 3
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2041:
-	b	.L1789
-.LVL2042:
-.L1792:
+.LVL2035:
+	b	.L1784
+.LVL2036:
+.L1787:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2043:
+.LVL2037:
 	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2044:
+.LVL2038:
 	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2045:
+.LVL2039:
 	uxth	r7, r7
-.LVL2046:
+.LVL2040:
 	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2047:
-	b	.L1791
-.LVL2048:
-.L1793:
+.LVL2041:
+	b	.L1786
+.LVL2042:
+.L1788:
 	.loc 3 647 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2049:
-	ldr	r3, .L1811+80
+.LVL2043:
+	ldr	r3, .L1806+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2050:
+.LVL2044:
 	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2051:
+.LVL2045:
 	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2052:
-.L1795:
+.LVL2046:
+.L1790:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1797
+	bls	.L1792
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
 	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2053:
+.LVL2047:
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2054:
+.LVL2048:
 	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2055:
-	b	.L1795
-.LVL2056:
-.L1798:
+.LVL2049:
+	b	.L1790
+.LVL2050:
+.L1793:
 	.loc 3 657 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2057:
+.LVL2051:
 	add	r7, r7, r0
-.LVL2058:
+.LVL2052:
 	uxth	r7, r7
-.LVL2059:
-	b	.L1794
-.LVL2060:
-.L1804:
+.LVL2053:
+	b	.L1789
+.LVL2054:
+.L1799:
 	.loc 3 709 0
 	ldr	r3, [r5]
 	.loc 3 710 0
 	ldrh	r1, [r6, #4]
 	.loc 3 712 0
-	ldr	r4, .L1811+84
+	ldr	r4, .L1806+84
 	.loc 3 709 0
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
@@ -21898,15 +21871,15 @@ ftl_low_format:
 	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1805:
+.L1800:
 	.loc 3 717 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2061:
+.LVL2055:
 	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1806
+	cbnz	r3, .L1801
 	.loc 3 721 0
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -21915,8 +21888,8 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	.loc 3 723 0
-	b	.L1805
-.L1806:
+	b	.L1800
+.L1801:
 	.loc 3 725 0
 	ldr	r3, [r5]
 	.loc 3 726 0
@@ -21931,12 +21904,12 @@ ftl_low_format:
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	ldr	r3, .L1811+88
+	ldr	r3, .L1806+88
 	strh	r4, [r3]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2062:
-	ldr	r3, .L1811+92
+.LVL2056:
+	ldr	r3, .L1806+92
 	.loc 3 731 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
@@ -21955,25 +21928,25 @@ ftl_low_format:
 	str	r2, [r5]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2063:
+.LVL2057:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2064:
-	cbnz	r0, .L1807
+.LVL2058:
+	cbnz	r0, .L1802
 	.loc 3 737 0
-	ldr	r3, .L1811+96
+	ldr	r3, .L1806+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1807:
+.L1802:
 	.loc 3 739 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1812:
+.L1807:
 	.align	2
-.L1811:
+.L1806:
 	.word	.LANCHOR4
 	.word	.LANCHOR72
 	.word	.LANCHOR71
@@ -22019,76 +21992,76 @@ sftl_init:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2065:
+.LVL2059:
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1819
+	ldr	r4, .L1814
 	.loc 3 749 0
-	ldr	r1, .L1819+4
-	ldr	r0, .L1819+8
+	ldr	r1, .L1814+4
+	ldr	r0, .L1814+8
 	.loc 3 746 0
 	str	r3, [r4]
 	.loc 3 749 0
 	bl	printf
-.LVL2066:
+.LVL2060:
 	.loc 3 750 0
-	ldr	r0, .L1819+12
+	ldr	r0, .L1814+12
 	bl	FtlConstantsInit
-.LVL2067:
+.LVL2061:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2068:
+.LVL2062:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2069:
+.LVL2063:
 	.loc 3 753 0
-	ldr	r3, .L1819+16
+	ldr	r3, .L1814+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2070:
+.LVL2064:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2071:
-	cbnz	r0, .L1817
+.LVL2065:
+	cbnz	r0, .L1812
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2072:
-	cbnz	r0, .L1817
+.LVL2066:
+	cbnz	r0, .L1812
 	.loc 3 779 0
 	movs	r3, #1
 	str	r3, [r4]
 	.loc 3 783 0
-	ldr	r3, .L1819+20
+	ldr	r3, .L1814+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1817
+	bhi	.L1812
 	movw	r4, #8129
-.L1816:
-.LVL2073:
+.L1811:
+.LVL2067:
 .LBB309:
 	.loc 3 786 0 discriminator 3
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2074:
+.LVL2068:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2075:
-	bne	.L1816
-.LVL2076:
-.L1817:
+.LVL2069:
+	bne	.L1811
+.LVL2070:
+.L1812:
 .LBE309:
 	.loc 3 794 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1820:
+.L1815:
 	.align	2
-.L1819:
+.L1814:
 	.word	.LANCHOR88
 	.word	.LC70
 	.word	.LC71
@@ -22113,10 +22086,10 @@ ftl_memcmp:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2077:
+.LVL2071:
 	.loc 1 253 0
 	b	memcmp
-.LVL2078:
+.LVL2072:
 	.cfi_endproc
 .LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -23800,7 +23773,7 @@ __func__.9940:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x92b3
+	.4byte	0x92b5
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
@@ -28014,8 +27987,8 @@ __func__.9940:
 	.4byte	0x7b
 	.4byte	.LLST457
 	.uleb128 0x2d
-	.4byte	.LVL2078
-	.4byte	0x9266
+	.4byte	.LVL2072
+	.4byte	0x9268
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28069,7 +28042,7 @@ __func__.9940:
 	.4byte	.LLST289
 	.uleb128 0x2d
 	.4byte	.LVL1162
-	.4byte	0x9271
+	.4byte	0x9273
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28123,7 +28096,7 @@ __func__.9940:
 	.4byte	.LLST193
 	.uleb128 0x2d
 	.4byte	.LVL698
-	.4byte	0x927d
+	.4byte	0x927f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28353,7 +28326,7 @@ __func__.9940:
 	.byte	0x58
 	.uleb128 0x34
 	.4byte	.LVL630
-	.4byte	0x842d
+	.4byte	0x842f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28488,7 +28461,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL619
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2620
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28499,7 +28472,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL620
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2637
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28510,7 +28483,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL621
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28521,7 +28494,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL611
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2671
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28544,7 +28517,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL612
-	.4byte	0x842d
+	.4byte	0x842f
 	.4byte	0x2693
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28667,7 +28640,7 @@ __func__.9940:
 	.4byte	__func__.10310
 	.uleb128 0x32
 	.4byte	.LVL568
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2784
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28690,7 +28663,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL569
-	.4byte	0x842d
+	.4byte	0x842f
 	.4byte	0x27a6
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28844,7 +28817,7 @@ __func__.9940:
 	.4byte	.LLST152
 	.uleb128 0x43
 	.4byte	.LVL557
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x28e2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28855,7 +28828,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL558
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2905
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28878,10 +28851,10 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL560
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x34
 	.4byte	.LVL562
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28911,7 +28884,7 @@ __func__.9940:
 	.4byte	.LLST143
 	.uleb128 0x2d
 	.4byte	.LVL552
-	.4byte	0x9294
+	.4byte	0x9296
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28952,7 +28925,7 @@ __func__.9940:
 	.4byte	.LLST142
 	.uleb128 0x2d
 	.4byte	.LVL550
-	.4byte	0x929f
+	.4byte	0x92a1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29222,7 +29195,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL539
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x2c15
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -29266,7 +29239,7 @@ __func__.9940:
 	.4byte	.LLST137
 	.uleb128 0x34
 	.4byte	.LVL535
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29372,7 +29345,7 @@ __func__.9940:
 	.4byte	0x2d93
 	.uleb128 0x44
 	.4byte	.LVL1708
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x32
 	.4byte	.LVL1709
 	.4byte	0x2f42
@@ -29722,10 +29695,10 @@ __func__.9940:
 	.4byte	0x6657
 	.uleb128 0x44
 	.4byte	.LVL1669
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x32
 	.4byte	.LVL1670
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x303b
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -29768,7 +29741,7 @@ __func__.9940:
 	.4byte	0x4d75
 	.uleb128 0x32
 	.4byte	.LVL1679
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3090
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30037,7 +30010,7 @@ __func__.9940:
 	.4byte	__func__.9870
 	.uleb128 0x32
 	.4byte	.LVL1259
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x32bf
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30054,7 +30027,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1263
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x32df
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30144,7 +30117,7 @@ __func__.9940:
 	.4byte	__func__.9850
 	.uleb128 0x32
 	.4byte	.LVL490
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x33be
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30167,7 +30140,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL491
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x33e5
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30190,7 +30163,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL492
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x340c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30213,7 +30186,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL496
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30265,7 +30238,7 @@ __func__.9940:
 	.4byte	__func__.9843
 	.uleb128 0x32
 	.4byte	.LVL1595
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x349e
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30422,7 +30395,7 @@ __func__.9940:
 	.4byte	.LLST302
 	.uleb128 0x34
 	.4byte	.LVL1215
-	.4byte	0x8487
+	.4byte	0x8489
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30437,7 +30410,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1186
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3621
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30471,7 +30444,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1192
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x365f
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30516,7 +30489,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1195
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x36ae
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30539,7 +30512,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1198
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x36d5
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30562,7 +30535,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1200
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x36fc
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30585,7 +30558,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1201
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3723
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30663,7 +30636,7 @@ __func__.9940:
 	.4byte	0x688f
 	.uleb128 0x34
 	.4byte	.LVL1224
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30766,7 +30739,7 @@ __func__.9940:
 	.4byte	0x38fb
 	.uleb128 0x34
 	.4byte	.LVL478
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30947,7 +30920,7 @@ __func__.9940:
 	.4byte	.LLST239
 	.uleb128 0x32
 	.4byte	.LVL909
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3a26
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -30986,7 +30959,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL912
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3a5f
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31024,7 +30997,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL915
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31098,7 +31071,7 @@ __func__.9940:
 	.4byte	.LLST270
 	.uleb128 0x34
 	.4byte	.LVL1080
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31115,7 +31088,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1073
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3b60
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31155,7 +31128,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1085
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3ba8
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31203,7 +31176,7 @@ __func__.9940:
 	.4byte	0x6189
 	.uleb128 0x34
 	.4byte	.LVL1092
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31270,7 +31243,7 @@ __func__.9940:
 	.4byte	__func__.9722
 	.uleb128 0x32
 	.4byte	.LVL1577
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3c81
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31323,7 +31296,7 @@ __func__.9940:
 	.4byte	0x6189
 	.uleb128 0x32
 	.4byte	.LVL1587
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3cda
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31605,7 +31578,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL1070
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31672,7 +31645,7 @@ __func__.9940:
 	.4byte	__func__.9676
 	.uleb128 0x32
 	.4byte	.LVL271
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x3faa
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32242,7 +32215,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1314
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x443b
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32265,7 +32238,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1315
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4462
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32428,7 +32401,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1396
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4567
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32490,7 +32463,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1420
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x45bd
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32591,7 +32564,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL900
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x46ac
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33029,7 +33002,7 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9522
 	.uleb128 0x32
-	.4byte	.LVL1972
+	.4byte	.LVL1966
 	.4byte	0x230c
 	.4byte	0x49f3
 	.uleb128 0x2e
@@ -33039,7 +33012,7 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1973
+	.4byte	.LVL1967
 	.4byte	0x6078
 	.4byte	0x4a06
 	.uleb128 0x2e
@@ -33049,8 +33022,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1975
-	.4byte	0x9289
+	.4byte	.LVL1969
+	.4byte	0x928b
 	.4byte	0x4a2d
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33072,8 +33045,8 @@ __func__.9940:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1976
-	.4byte	0x9289
+	.4byte	.LVL1970
+	.4byte	0x928b
 	.4byte	0x4a54
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33095,7 +33068,7 @@ __func__.9940:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1978
+	.4byte	.LVL1972
 	.4byte	0x22a6
 	.4byte	0x4a6e
 	.uleb128 0x2e
@@ -33112,14 +33085,14 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1979
+	.4byte	.LVL1973
 	.4byte	0x22a6
 	.uleb128 0x44
-	.4byte	.LVL1980
+	.4byte	.LVL1974
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1982
-	.4byte	0x9289
+	.4byte	.LVL1976
+	.4byte	0x928b
 	.4byte	0x4aa7
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33141,7 +33114,7 @@ __func__.9940:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1983
+	.4byte	.LVL1977
 	.4byte	0x3f2e
 	.4byte	0x4abe
 	.uleb128 0x2e
@@ -33152,7 +33125,7 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1984
+	.4byte	.LVL1978
 	.4byte	0x3f2e
 	.4byte	0x4ad2
 	.uleb128 0x2e
@@ -33163,7 +33136,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1985
+	.4byte	.LVL1979
 	.4byte	0x3f2e
 	.4byte	0x4ae6
 	.uleb128 0x2e
@@ -33174,7 +33147,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1986
+	.4byte	.LVL1980
 	.4byte	0x3f2e
 	.4byte	0x4afa
 	.uleb128 0x2e
@@ -33185,7 +33158,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1988
+	.4byte	.LVL1982
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33447,7 +33420,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL964
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4d17
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33470,7 +33443,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL973
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4d3e
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33503,7 +33476,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL984
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33664,7 +33637,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1571
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4ea3
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33687,7 +33660,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1574
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x4ec0
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34227,7 +34200,7 @@ __func__.9940:
 	.4byte	.L741
 	.uleb128 0x32
 	.4byte	.LVL880
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5331
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34347,7 +34320,7 @@ __func__.9940:
 	.4byte	__func__.9353
 	.uleb128 0x34
 	.4byte	.LVL233
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34470,7 +34443,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL836
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x554a
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34493,7 +34466,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL837
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5571
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34557,7 +34530,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL844
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x55c3
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34568,7 +34541,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL845
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34642,7 +34615,7 @@ __func__.9940:
 	.4byte	__func__.9314
 	.uleb128 0x32
 	.4byte	.LVL813
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5699
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34853,7 +34826,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL864
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5835
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35063,7 +35036,7 @@ __func__.9940:
 	.4byte	__func__.9257
 	.uleb128 0x32
 	.4byte	.LVL776
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x59ff
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35118,7 +35091,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL782
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x5a54
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35178,7 +35151,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL785
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35404,7 +35377,7 @@ __func__.9940:
 	.4byte	__func__.9216
 	.uleb128 0x34
 	.4byte	.LVL168
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36488,7 +36461,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1445
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x659c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36511,7 +36484,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL1446
-	.4byte	0x7ae3
+	.4byte	0x7ae5
 	.uleb128 0x32
 	.4byte	.LVL1454
 	.4byte	0x26b9
@@ -36679,7 +36652,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1169
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x6704
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36757,7 +36730,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1174
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x6779
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36768,7 +36741,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1175
-	.4byte	0x9289
+	.4byte	0x928b
 	.4byte	0x6796
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36837,7 +36810,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL767
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36940,7 +36913,7 @@ __func__.9940:
 	.4byte	.LLST16
 	.uleb128 0x34
 	.4byte	.LVL45
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36999,7 +36972,7 @@ __func__.9940:
 	.4byte	0x6989
 	.4byte	.LLST447
 	.uleb128 0x2d
-	.4byte	.LVL1971
+	.4byte	.LVL1965
 	.4byte	0x6b02
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37062,7 +37035,7 @@ __func__.9940:
 	.4byte	.LLST429
 	.uleb128 0x2d
 	.4byte	.LVL1870
-	.4byte	0x7108
+	.4byte	0x710a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37155,7 +37128,7 @@ __func__.9940:
 	.4byte	.LLST390
 	.uleb128 0x44
 	.4byte	.LVL1635
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x44
 	.4byte	.LVL1645
 	.4byte	0x537a
@@ -37222,7 +37195,7 @@ __func__.9940:
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
@@ -37339,7 +37312,7 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL1954
+	.4byte	.LVL1952
 	.4byte	0x26b9
 	.4byte	0x6c5e
 	.uleb128 0x2e
@@ -37360,8 +37333,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1956
-	.4byte	0x9289
+	.4byte	.LVL1954
+	.4byte	0x928b
 	.4byte	0x6c7b
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37377,8 +37350,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1957
-	.4byte	0x9289
+	.4byte	.LVL1955
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37402,7 +37375,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1875
 	.4byte	0x5156
-	.4byte	0x6cc4
+	.4byte	0x6cc3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37419,18 +37392,104 @@ __func__.9940:
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1887
+	.4byte	0x6ee0
+	.uleb128 0x32
+	.4byte	.LVL1890
+	.4byte	0x29fd
+	.4byte	0x6ced
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -92
+	.sleb128 -84
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -76
 	.byte	0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1892
+	.4byte	0x5b34
+	.4byte	0x6d00
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1887
-	.4byte	0x6ede
+	.4byte	.LVL1893
+	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL1889
-	.4byte	0x9289
-	.4byte	0x6cf4
+	.4byte	.LVL1894
+	.4byte	0x29fd
+	.4byte	0x6d21
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1895
+	.4byte	0x29fd
+	.4byte	0x6d39
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1903
+	.4byte	0x22a6
+	.4byte	0x6d54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1911
+	.4byte	0x6ee0
+	.uleb128 0x32
+	.4byte	.LVL1914
+	.4byte	0x928b
+	.4byte	0x6d84
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37451,12 +37510,12 @@ __func__.9940:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1890
-	.4byte	0x6ede
+	.4byte	.LVL1915
+	.4byte	0x6ee0
 	.uleb128 0x32
-	.4byte	.LVL1892
+	.4byte	.LVL1917
 	.4byte	0x3430
-	.4byte	0x6d14
+	.4byte	0x6da4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37465,9 +37524,9 @@ __func__.9940:
 	.4byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1893
+	.4byte	.LVL1918
 	.4byte	0x3430
-	.4byte	0x6d2b
+	.4byte	0x6dbb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37476,9 +37535,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1895
+	.4byte	.LVL1920
 	.4byte	0x3430
-	.4byte	0x6d3f
+	.4byte	0x6dcf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37487,9 +37546,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1898
-	.4byte	0x9289
-	.4byte	0x6d66
+	.4byte	.LVL1923
+	.4byte	0x928b
+	.4byte	0x6df6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37510,94 +37569,55 @@ __func__.9940:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1907
-	.4byte	0x29fd
-	.4byte	0x6d85
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
+	.4byte	.LVL1926
+	.4byte	0x6f0f
+	.4byte	0x6e17
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x8
+	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -76
-	.byte	0x6
-	.byte	0x7d
-	.sleb128 0
+	.sleb128 -92
 	.byte	0x6
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1909
-	.4byte	0x5b34
-	.4byte	0x6d98
 	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x1
 	.byte	0x30
-	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1910
-	.4byte	0x2c26
-	.uleb128 0x32
-	.4byte	.LVL1911
-	.4byte	0x29fd
-	.4byte	0x6db9
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
 	.uleb128 0x2e
 	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1912
-	.4byte	0x29fd
-	.4byte	0x6dd1
+	.4byte	.LVL1927
+	.4byte	0x928b
+	.4byte	0x6e3e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1921
-	.4byte	0x22a6
-	.4byte	0x6ded
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x4
-	.byte	0x91
-	.sleb128 -92
-	.byte	0x6
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x76
-	.sleb128 0
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
 	.byte	0
-	.uleb128 0x44
-	.4byte	.LVL1930
-	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1932
+	.4byte	.LVL1930
 	.4byte	0x3430
-	.4byte	0x6e0a
+	.4byte	0x6e52
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37606,9 +37626,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1935
+	.4byte	.LVL1933
 	.4byte	0x5279
-	.4byte	0x6e29
+	.4byte	0x6e71
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37628,9 +37648,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1936
+	.4byte	.LVL1934
 	.4byte	0x333e
-	.4byte	0x6e3d
+	.4byte	0x6e85
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37639,15 +37659,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1941
+	.4byte	.LVL1939
 	.4byte	0x230c
-	.4byte	0x6e58
+	.4byte	0x6ea0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x4
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -88
 	.byte	0x6
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -37656,9 +37676,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1950
-	.4byte	0x9289
-	.4byte	0x6e7f
+	.4byte	.LVL1948
+	.4byte	0x928b
+	.4byte	0x6ec7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37679,62 +37699,17 @@ __func__.9940:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1955
+	.4byte	.LVL1953
 	.4byte	0x22a6
-	.uleb128 0x32
-	.4byte	.LVL1959
+	.uleb128 0x34
+	.4byte	.LVL1957
 	.4byte	0x230c
-	.4byte	0x6e9b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x1
 	.byte	0x30
 	.byte	0
-	.uleb128 0x32
-	.4byte	.LVL1962
-	.4byte	0x6f0d
-	.4byte	0x6eba
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x7b
-	.sleb128 0
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x74
-	.sleb128 0
-	.byte	0
-	.uleb128 0x34
-	.4byte	.LVL1963
-	.4byte	0x9289
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LC1
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x5
-	.byte	0x3
-	.4byte	.LANCHOR180
-	.uleb128 0x2e
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x46e
-	.byte	0
 	.byte	0
 	.uleb128 0x48
 	.4byte	.LASF835
@@ -37745,10 +37720,10 @@ __func__.9940:
 	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6f0d
+	.4byte	0x6f0f
 	.uleb128 0x34
 	.4byte	.LVL1626
-	.4byte	0x6f0d
+	.4byte	0x6f0f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37769,7 +37744,7 @@ __func__.9940:
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70f3
+	.4byte	0x70f5
 	.uleb128 0x5d
 	.ascii	"req\000"
 	.byte	0x3
@@ -37834,14 +37809,14 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x7103
+	.4byte	0x7105
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8923
 	.uleb128 0x32
 	.4byte	.LVL1607
 	.4byte	0x251a
-	.4byte	0x6fec
+	.4byte	0x6fee
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37867,7 +37842,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1610
 	.4byte	0x3430
-	.4byte	0x7009
+	.4byte	0x700b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37881,7 +37856,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1612
 	.4byte	0x333e
-	.4byte	0x7026
+	.4byte	0x7028
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37892,7 +37867,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1613
 	.4byte	0x251a
-	.4byte	0x7044
+	.4byte	0x7046
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37912,8 +37887,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1614
-	.4byte	0x9289
-	.4byte	0x706b
+	.4byte	0x928b
+	.4byte	0x706d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37936,7 +37911,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1615
 	.4byte	0x5279
-	.4byte	0x7084
+	.4byte	0x7086
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37952,7 +37927,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1617
 	.4byte	0x6189
-	.4byte	0x709e
+	.4byte	0x70a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37968,8 +37943,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1620
-	.4byte	0x9289
-	.4byte	0x70bb
+	.4byte	0x928b
+	.4byte	0x70bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37986,7 +37961,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1621
 	.4byte	0x3259
-	.4byte	0x70cf
+	.4byte	0x70d1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37996,7 +37971,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL1624
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38019,13 +37994,13 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x7103
+	.4byte	0x7105
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x70f3
+	.4byte	0x70f5
 	.uleb128 0x5c
 	.4byte	.LASF838
 	.byte	0x3
@@ -38035,7 +38010,7 @@ __func__.9940:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72fb
+	.4byte	0x72fd
 	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
@@ -38143,7 +38118,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB299
 	.4byte	.LBE299-.LBB299
-	.4byte	0x725f
+	.4byte	0x7261
 	.uleb128 0x54
 	.4byte	.LASF587
 	.byte	0x3
@@ -38160,7 +38135,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1819
 	.4byte	0x503e
-	.4byte	0x7281
+	.4byte	0x7283
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38183,11 +38158,11 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL1825
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x32
 	.4byte	.LVL1834
 	.4byte	0x29fd
-	.4byte	0x72a2
+	.4byte	0x72a4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38202,7 +38177,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1836
 	.4byte	0x5279
-	.4byte	0x72c1
+	.4byte	0x72c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38224,7 +38199,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1842
 	.4byte	0x26b9
-	.4byte	0x72db
+	.4byte	0x72dd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38266,10 +38241,10 @@ __func__.9940:
 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x731f
+	.4byte	0x7321
 	.uleb128 0x44
 	.4byte	.LVL1631
-	.4byte	0x731f
+	.4byte	0x7321
 	.byte	0
 	.uleb128 0x48
 	.4byte	.LASF845
@@ -38280,17 +38255,17 @@ __func__.9940:
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7368
+	.4byte	0x736a
 	.uleb128 0x44
 	.4byte	.LVL1627
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x44
 	.4byte	.LVL1628
 	.4byte	0x537a
 	.uleb128 0x32
 	.4byte	.LVL1629
 	.4byte	0x4fe6
-	.4byte	0x735e
+	.4byte	0x7360
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38310,12 +38285,12 @@ __func__.9940:
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7436
+	.4byte	0x7438
 	.uleb128 0x28
 	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x7436
+	.4byte	0x7438
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_nand_phy_info
@@ -38328,7 +38303,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB309
 	.4byte	.LBE309-.LBB309
-	.4byte	0x73d1
+	.4byte	0x73d3
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
@@ -38336,7 +38311,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST454
 	.uleb128 0x34
-	.4byte	.LVL2074
+	.4byte	.LVL2068
 	.4byte	0x29fd
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -38351,9 +38326,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2066
-	.4byte	0x9289
-	.4byte	0x73f1
+	.4byte	.LVL2060
+	.4byte	0x928b
+	.4byte	0x73f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38368,9 +38343,9 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2067
-	.4byte	0x7a87
-	.4byte	0x7408
+	.4byte	.LVL2061
+	.4byte	0x7a89
+	.4byte	0x740a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38379,19 +38354,19 @@ __func__.9940:
 	.4byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2068
-	.4byte	0x782a
+	.4byte	.LVL2062
+	.4byte	0x782c
 	.uleb128 0x44
-	.4byte	.LVL2069
-	.4byte	0x777a
+	.4byte	.LVL2063
+	.4byte	0x777c
 	.uleb128 0x44
-	.4byte	.LVL2070
+	.4byte	.LVL2064
 	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL2071
+	.4byte	.LVL2065
 	.4byte	0x649e
 	.uleb128 0x44
-	.4byte	.LVL2072
+	.4byte	.LVL2066
 	.4byte	0x399e
 	.byte	0
 	.uleb128 0x8
@@ -38406,7 +38381,7 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7592
+	.4byte	0x7594
 	.uleb128 0x54
 	.4byte	.LASF718
 	.byte	0x3
@@ -38435,28 +38410,28 @@ __func__.9940:
 	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1803
+	.4byte	.L1798
 	.uleb128 0x58
 	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1805
+	.4byte	.L1800
 	.uleb128 0x44
-	.4byte	.LVL2020
+	.4byte	.LVL2014
 	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL2021
+	.4byte	.LVL2015
 	.4byte	0x649e
 	.uleb128 0x44
-	.4byte	.LVL2022
+	.4byte	.LVL2016
 	.4byte	0x6240
 	.uleb128 0x44
-	.4byte	.LVL2036
+	.4byte	.LVL2030
 	.4byte	0x6657
 	.uleb128 0x32
-	.4byte	.LVL2037
+	.4byte	.LVL2031
 	.4byte	0x230c
-	.4byte	0x74e3
+	.4byte	0x74e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38464,9 +38439,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2038
+	.4byte	.LVL2032
 	.4byte	0x230c
-	.4byte	0x74f7
+	.4byte	0x74f9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38475,9 +38450,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2039
+	.4byte	.LVL2033
 	.4byte	0x3f2e
-	.4byte	0x750b
+	.4byte	0x750d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38486,9 +38461,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2043
-	.4byte	0x7592
-	.4byte	0x7524
+	.4byte	.LVL2037
+	.4byte	0x7594
+	.4byte	0x7526
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38502,15 +38477,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2050
-	.4byte	0x7ae3
+	.4byte	.LVL2044
+	.4byte	0x7ae5
 	.uleb128 0x44
-	.4byte	.LVL2051
+	.4byte	.LVL2045
 	.4byte	0x601f
 	.uleb128 0x32
-	.4byte	.LVL2054
-	.4byte	0x7592
-	.4byte	0x754f
+	.4byte	.LVL2048
+	.4byte	0x7594
+	.4byte	0x7551
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38524,9 +38499,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2057
-	.4byte	0x7592
-	.4byte	0x7562
+	.4byte	.LVL2051
+	.4byte	0x7594
+	.4byte	0x7564
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38534,9 +38509,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2061
+	.4byte	.LVL2055
 	.4byte	0x3f2e
-	.4byte	0x7576
+	.4byte	0x7578
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38545,13 +38520,13 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2062
+	.4byte	.LVL2056
 	.4byte	0x5e26
 	.uleb128 0x44
-	.4byte	.LVL2063
+	.4byte	.LVL2057
 	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2064
+	.4byte	.LVL2058
 	.4byte	0x399e
 	.byte	0
 	.uleb128 0x48
@@ -38563,7 +38538,7 @@ __func__.9940:
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7750
+	.4byte	0x7752
 	.uleb128 0x52
 	.4byte	.LASF718
 	.byte	0x3
@@ -38632,7 +38607,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL645
 	.4byte	0x2464
-	.4byte	0x7672
+	.4byte	0x7674
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38649,7 +38624,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL653
 	.4byte	0x251a
-	.4byte	0x7698
+	.4byte	0x769a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38678,7 +38653,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL660
 	.4byte	0x2464
-	.4byte	0x76b2
+	.4byte	0x76b4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38695,7 +38670,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL662
 	.4byte	0x61f9
-	.4byte	0x76c8
+	.4byte	0x76ca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38707,8 +38682,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL664
-	.4byte	0x7750
-	.4byte	0x76dc
+	.4byte	0x7752
+	.4byte	0x76de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38719,7 +38694,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL665
 	.4byte	0x682c
-	.4byte	0x76f0
+	.4byte	0x76f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38733,7 +38708,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL680
 	.4byte	0x61f9
-	.4byte	0x770f
+	.4byte	0x7711
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38745,8 +38720,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL682
-	.4byte	0x7750
-	.4byte	0x7723
+	.4byte	0x7752
+	.4byte	0x7725
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38757,7 +38732,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL683
 	.4byte	0x682c
-	.4byte	0x7737
+	.4byte	0x7739
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38784,7 +38759,7 @@ __func__.9940:
 	.2byte	0x201
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x777a
+	.4byte	0x777c
 	.uleb128 0x4a
 	.4byte	.LASF388
 	.byte	0x3
@@ -38805,11 +38780,11 @@ __func__.9940:
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x782a
+	.4byte	0x782c
 	.uleb128 0x32
 	.4byte	.LVL1041
 	.4byte	0x230c
-	.4byte	0x77a8
+	.4byte	0x77aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38820,7 +38795,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1042
 	.4byte	0x230c
-	.4byte	0x77bc
+	.4byte	0x77be
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38831,7 +38806,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1043
 	.4byte	0x230c
-	.4byte	0x77d0
+	.4byte	0x77d2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38842,7 +38817,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1044
 	.4byte	0x230c
-	.4byte	0x77f3
+	.4byte	0x77f5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38865,7 +38840,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1045
 	.4byte	0x230c
-	.4byte	0x7817
+	.4byte	0x7819
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38901,7 +38876,7 @@ __func__.9940:
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a87
+	.4byte	0x7a89
 	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
@@ -38929,7 +38904,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL702
 	.4byte	0x2928
-	.4byte	0x7897
+	.4byte	0x7899
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38940,7 +38915,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL703
 	.4byte	0x2928
-	.4byte	0x78ab
+	.4byte	0x78ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38951,7 +38926,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL704
 	.4byte	0x2928
-	.4byte	0x78bf
+	.4byte	0x78c1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38962,7 +38937,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL705
 	.4byte	0x2928
-	.4byte	0x78d3
+	.4byte	0x78d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38973,7 +38948,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL706
 	.4byte	0x2928
-	.4byte	0x78e7
+	.4byte	0x78e9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38984,7 +38959,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL708
 	.4byte	0x2928
-	.4byte	0x78fb
+	.4byte	0x78fd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38995,7 +38970,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL709
 	.4byte	0x2928
-	.4byte	0x790f
+	.4byte	0x7911
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39006,7 +38981,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL710
 	.4byte	0x2928
-	.4byte	0x7923
+	.4byte	0x7925
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39020,7 +38995,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL712
 	.4byte	0x2928
-	.4byte	0x7940
+	.4byte	0x7942
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39031,7 +39006,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL713
 	.4byte	0x2928
-	.4byte	0x7954
+	.4byte	0x7956
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,7 +39020,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL717
 	.4byte	0x2928
-	.4byte	0x7971
+	.4byte	0x7973
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39056,7 +39031,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL718
 	.4byte	0x2928
-	.4byte	0x7987
+	.4byte	0x7989
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39078,7 +39053,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL724
 	.4byte	0x2928
-	.4byte	0x79b6
+	.4byte	0x79b8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39089,7 +39064,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL725
 	.4byte	0x2928
-	.4byte	0x79ca
+	.4byte	0x79cc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39100,7 +39075,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL729
 	.4byte	0x2928
-	.4byte	0x79de
+	.4byte	0x79e0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39111,7 +39086,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL730
 	.4byte	0x2928
-	.4byte	0x79f2
+	.4byte	0x79f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39137,7 +39112,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL737
 	.4byte	0x230c
-	.4byte	0x7a34
+	.4byte	0x7a36
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39166,7 +39141,7 @@ __func__.9940:
 	.4byte	0x2928
 	.uleb128 0x34
 	.4byte	.LVL759
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39190,12 +39165,12 @@ __func__.9940:
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7ae3
+	.4byte	0x7ae5
 	.uleb128 0x2c
 	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x7436
+	.4byte	0x7438
 	.4byte	.LLST10
 	.uleb128 0x3b
 	.ascii	"i\000"
@@ -39205,11 +39180,11 @@ __func__.9940:
 	.4byte	.LLST11
 	.uleb128 0x44
 	.4byte	.LVL30
-	.4byte	0x7b24
+	.4byte	0x7b26
 	.uleb128 0x32
 	.4byte	.LVL31
-	.4byte	0x7b24
-	.4byte	0x7ad9
+	.4byte	0x7b26
+	.4byte	0x7adb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39219,7 +39194,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL35
-	.4byte	0x7ae3
+	.4byte	0x7ae5
 	.byte	0
 	.uleb128 0x2b
 	.4byte	.LASF867
@@ -39230,7 +39205,7 @@ __func__.9940:
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b0c
+	.4byte	0x7b0e
 	.uleb128 0x2c
 	.4byte	.LASF868
 	.byte	0x3
@@ -39243,7 +39218,7 @@ __func__.9940:
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x7b24
+	.4byte	0x7b26
 	.uleb128 0x36
 	.4byte	.LASF870
 	.byte	0x3
@@ -39259,7 +39234,7 @@ __func__.9940:
 	.4byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b69
+	.4byte	0x7b6b
 	.uleb128 0x2f
 	.ascii	"num\000"
 	.byte	0x3
@@ -39288,7 +39263,7 @@ __func__.9940:
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7bd7
+	.4byte	0x7bd9
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39303,8 +39278,8 @@ __func__.9940:
 	.4byte	.LLST112
 	.uleb128 0x32
 	.4byte	.LVL451
-	.4byte	0x92ab
-	.4byte	0x7bc6
+	.4byte	0x92ad
+	.4byte	0x7bc8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39326,7 +39301,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL453
-	.4byte	0x7bd7
+	.4byte	0x7bd9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39344,7 +39319,7 @@ __func__.9940:
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x842d
+	.4byte	0x842f
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39366,7 +39341,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB211
 	.4byte	.LBE211-.LBB211
-	.4byte	0x7c6b
+	.4byte	0x7c6d
 	.uleb128 0x30
 	.4byte	.LASF587
 	.byte	0x3
@@ -39376,7 +39351,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL437
 	.4byte	0x5b34
-	.4byte	0x7c4b
+	.4byte	0x7c4d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39386,7 +39361,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL439
-	.4byte	0x92ab
+	.4byte	0x92ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39410,7 +39385,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB212
 	.4byte	.LBE212-.LBB212
-	.4byte	0x7ca4
+	.4byte	0x7ca6
 	.uleb128 0x30
 	.4byte	.LASF587
 	.byte	0x3
@@ -39419,7 +39394,7 @@ __func__.9940:
 	.4byte	.LLST110
 	.uleb128 0x34
 	.4byte	.LVL447
-	.4byte	0x92ab
+	.4byte	0x92ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39442,8 +39417,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL302
-	.4byte	0x92ab
-	.4byte	0x7cc1
+	.4byte	0x92ad
+	.4byte	0x7cc3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39459,8 +39434,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL304
-	.4byte	0x92ab
-	.4byte	0x7cde
+	.4byte	0x92ad
+	.4byte	0x7ce0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39476,8 +39451,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL306
-	.4byte	0x92ab
-	.4byte	0x7cfb
+	.4byte	0x92ad
+	.4byte	0x7cfd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39493,8 +39468,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL308
-	.4byte	0x92ab
-	.4byte	0x7d18
+	.4byte	0x92ad
+	.4byte	0x7d1a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39510,8 +39485,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL310
-	.4byte	0x92ab
-	.4byte	0x7d35
+	.4byte	0x92ad
+	.4byte	0x7d37
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39527,8 +39502,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL312
-	.4byte	0x92ab
-	.4byte	0x7d52
+	.4byte	0x92ad
+	.4byte	0x7d54
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39544,8 +39519,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL314
-	.4byte	0x92ab
-	.4byte	0x7d6f
+	.4byte	0x92ad
+	.4byte	0x7d71
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39561,8 +39536,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL316
-	.4byte	0x92ab
-	.4byte	0x7d8c
+	.4byte	0x92ad
+	.4byte	0x7d8e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39578,8 +39553,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL318
-	.4byte	0x92ab
-	.4byte	0x7da9
+	.4byte	0x92ad
+	.4byte	0x7dab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39595,8 +39570,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL320
-	.4byte	0x92ab
-	.4byte	0x7dc6
+	.4byte	0x92ad
+	.4byte	0x7dc8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39612,8 +39587,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL322
-	.4byte	0x92ab
-	.4byte	0x7de3
+	.4byte	0x92ad
+	.4byte	0x7de5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39629,8 +39604,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL324
-	.4byte	0x92ab
-	.4byte	0x7e00
+	.4byte	0x92ad
+	.4byte	0x7e02
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39646,8 +39621,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL326
-	.4byte	0x92ab
-	.4byte	0x7e1d
+	.4byte	0x92ad
+	.4byte	0x7e1f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39663,8 +39638,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL328
-	.4byte	0x92ab
-	.4byte	0x7e3a
+	.4byte	0x92ad
+	.4byte	0x7e3c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39680,8 +39655,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL330
-	.4byte	0x92ab
-	.4byte	0x7e57
+	.4byte	0x92ad
+	.4byte	0x7e59
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39697,8 +39672,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL332
-	.4byte	0x92ab
-	.4byte	0x7e74
+	.4byte	0x92ad
+	.4byte	0x7e76
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39714,8 +39689,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL334
-	.4byte	0x92ab
-	.4byte	0x7e91
+	.4byte	0x92ad
+	.4byte	0x7e93
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39731,8 +39706,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL336
-	.4byte	0x92ab
-	.4byte	0x7eae
+	.4byte	0x92ad
+	.4byte	0x7eb0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39748,8 +39723,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL338
-	.4byte	0x92ab
-	.4byte	0x7ecb
+	.4byte	0x92ad
+	.4byte	0x7ecd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39765,8 +39740,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL340
-	.4byte	0x92ab
-	.4byte	0x7ee8
+	.4byte	0x92ad
+	.4byte	0x7eea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39782,8 +39757,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL342
-	.4byte	0x92ab
-	.4byte	0x7f05
+	.4byte	0x92ad
+	.4byte	0x7f07
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39799,8 +39774,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL344
-	.4byte	0x92ab
-	.4byte	0x7f22
+	.4byte	0x92ad
+	.4byte	0x7f24
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39816,8 +39791,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL346
-	.4byte	0x92ab
-	.4byte	0x7f3f
+	.4byte	0x92ad
+	.4byte	0x7f41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39833,8 +39808,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL348
-	.4byte	0x92ab
-	.4byte	0x7f5c
+	.4byte	0x92ad
+	.4byte	0x7f5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39850,8 +39825,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL350
-	.4byte	0x92ab
-	.4byte	0x7f79
+	.4byte	0x92ad
+	.4byte	0x7f7b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39867,8 +39842,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL352
-	.4byte	0x92ab
-	.4byte	0x7f96
+	.4byte	0x92ad
+	.4byte	0x7f98
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39884,8 +39859,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL354
-	.4byte	0x92ab
-	.4byte	0x7fb3
+	.4byte	0x92ad
+	.4byte	0x7fb5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39901,8 +39876,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL356
-	.4byte	0x92ab
-	.4byte	0x7fd0
+	.4byte	0x92ad
+	.4byte	0x7fd2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39918,8 +39893,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL358
-	.4byte	0x92ab
-	.4byte	0x7fed
+	.4byte	0x92ad
+	.4byte	0x7fef
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39935,8 +39910,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL360
-	.4byte	0x92ab
-	.4byte	0x800a
+	.4byte	0x92ad
+	.4byte	0x800c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39952,8 +39927,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL362
-	.4byte	0x92ab
-	.4byte	0x8027
+	.4byte	0x92ad
+	.4byte	0x8029
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39969,8 +39944,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL364
-	.4byte	0x92ab
-	.4byte	0x8044
+	.4byte	0x92ad
+	.4byte	0x8046
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39986,8 +39961,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL366
-	.4byte	0x92ab
-	.4byte	0x8061
+	.4byte	0x92ad
+	.4byte	0x8063
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40003,8 +39978,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL368
-	.4byte	0x92ab
-	.4byte	0x807e
+	.4byte	0x92ad
+	.4byte	0x8080
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40020,8 +39995,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL370
-	.4byte	0x92ab
-	.4byte	0x809b
+	.4byte	0x92ad
+	.4byte	0x809d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40037,8 +40012,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL372
-	.4byte	0x92ab
-	.4byte	0x80b8
+	.4byte	0x92ad
+	.4byte	0x80ba
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40054,8 +40029,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL374
-	.4byte	0x92ab
-	.4byte	0x80d5
+	.4byte	0x92ad
+	.4byte	0x80d7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40071,8 +40046,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL376
-	.4byte	0x92ab
-	.4byte	0x80f2
+	.4byte	0x92ad
+	.4byte	0x80f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40088,8 +40063,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL378
-	.4byte	0x92ab
-	.4byte	0x810f
+	.4byte	0x92ad
+	.4byte	0x8111
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40105,8 +40080,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL380
-	.4byte	0x92ab
-	.4byte	0x812c
+	.4byte	0x92ad
+	.4byte	0x812e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40122,8 +40097,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL382
-	.4byte	0x92ab
-	.4byte	0x8149
+	.4byte	0x92ad
+	.4byte	0x814b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40139,8 +40114,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL384
-	.4byte	0x92ab
-	.4byte	0x8166
+	.4byte	0x92ad
+	.4byte	0x8168
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40156,8 +40131,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL386
-	.4byte	0x92ab
-	.4byte	0x8183
+	.4byte	0x92ad
+	.4byte	0x8185
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40173,8 +40148,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL388
-	.4byte	0x92ab
-	.4byte	0x81a0
+	.4byte	0x92ad
+	.4byte	0x81a2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40190,8 +40165,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL390
-	.4byte	0x92ab
-	.4byte	0x81bd
+	.4byte	0x92ad
+	.4byte	0x81bf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40207,8 +40182,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL392
-	.4byte	0x92ab
-	.4byte	0x81da
+	.4byte	0x92ad
+	.4byte	0x81dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40224,8 +40199,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL394
-	.4byte	0x92ab
-	.4byte	0x81f7
+	.4byte	0x92ad
+	.4byte	0x81f9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40241,8 +40216,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL396
-	.4byte	0x92ab
-	.4byte	0x8214
+	.4byte	0x92ad
+	.4byte	0x8216
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40258,8 +40233,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL398
-	.4byte	0x92ab
-	.4byte	0x8231
+	.4byte	0x92ad
+	.4byte	0x8233
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40275,8 +40250,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL400
-	.4byte	0x92ab
-	.4byte	0x824e
+	.4byte	0x92ad
+	.4byte	0x8250
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40292,8 +40267,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL402
-	.4byte	0x92ab
-	.4byte	0x826b
+	.4byte	0x92ad
+	.4byte	0x826d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40309,8 +40284,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL404
-	.4byte	0x92ab
-	.4byte	0x8288
+	.4byte	0x92ad
+	.4byte	0x828a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40326,8 +40301,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL406
-	.4byte	0x92ab
-	.4byte	0x82a5
+	.4byte	0x92ad
+	.4byte	0x82a7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40343,8 +40318,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL408
-	.4byte	0x92ab
-	.4byte	0x82c2
+	.4byte	0x92ad
+	.4byte	0x82c4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40360,8 +40335,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL410
-	.4byte	0x92ab
-	.4byte	0x82df
+	.4byte	0x92ad
+	.4byte	0x82e1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40377,8 +40352,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL412
-	.4byte	0x92ab
-	.4byte	0x82fc
+	.4byte	0x92ad
+	.4byte	0x82fe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40394,8 +40369,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL414
-	.4byte	0x92ab
-	.4byte	0x8319
+	.4byte	0x92ad
+	.4byte	0x831b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40411,8 +40386,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL416
-	.4byte	0x92ab
-	.4byte	0x8336
+	.4byte	0x92ad
+	.4byte	0x8338
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40428,8 +40403,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL418
-	.4byte	0x92ab
-	.4byte	0x8353
+	.4byte	0x92ad
+	.4byte	0x8355
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40445,8 +40420,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL420
-	.4byte	0x92ab
-	.4byte	0x8370
+	.4byte	0x92ad
+	.4byte	0x8372
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40462,8 +40437,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL422
-	.4byte	0x92ab
-	.4byte	0x838d
+	.4byte	0x92ad
+	.4byte	0x838f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40479,8 +40454,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL424
-	.4byte	0x92ab
-	.4byte	0x83aa
+	.4byte	0x92ad
+	.4byte	0x83ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40496,8 +40471,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL426
-	.4byte	0x92ab
-	.4byte	0x83c7
+	.4byte	0x92ad
+	.4byte	0x83c9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40516,8 +40491,8 @@ __func__.9940:
 	.4byte	0x38fb
 	.uleb128 0x32
 	.4byte	.LVL429
-	.4byte	0x92ab
-	.4byte	0x83ed
+	.4byte	0x92ad
+	.4byte	0x83ef
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40536,8 +40511,8 @@ __func__.9940:
 	.4byte	0x38a2
 	.uleb128 0x32
 	.4byte	.LVL432
-	.4byte	0x92ab
-	.4byte	0x8413
+	.4byte	0x92ad
+	.4byte	0x8415
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40553,7 +40528,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL435
-	.4byte	0x92ab
+	.4byte	0x92ad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40574,7 +40549,7 @@ __func__.9940:
 	.4byte	.LFE352-.LFB352
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8487
+	.4byte	0x8489
 	.uleb128 0x46
 	.4byte	0x27d2
 	.4byte	.LLST0
@@ -40607,7 +40582,7 @@ __func__.9940:
 	.4byte	.LFE359-.LFB359
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84b0
+	.4byte	0x84b2
 	.uleb128 0x46
 	.4byte	0x4b4d
 	.4byte	.LLST5
@@ -40619,37 +40594,37 @@ __func__.9940:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x72
-	.4byte	0x7b0c
+	.4byte	0x7b0e
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84cb
+	.4byte	0x84cd
 	.uleb128 0x73
-	.4byte	0x7b18
+	.4byte	0x7b1a
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
 	.uleb128 0x72
-	.4byte	0x7750
+	.4byte	0x7752
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8503
+	.4byte	0x8505
 	.uleb128 0x46
-	.4byte	0x7761
+	.4byte	0x7763
 	.4byte	.LLST12
 	.uleb128 0x70
-	.4byte	0x776d
+	.4byte	0x776f
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x6f
-	.4byte	0x7761
+	.4byte	0x7763
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x70
-	.4byte	0x84e7
+	.4byte	0x84e9
 	.byte	0
 	.byte	0
 	.byte	0
@@ -40677,7 +40652,7 @@ __func__.9940:
 	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8597
+	.4byte	0x8599
 	.uleb128 0x46
 	.4byte	0x5de8
 	.4byte	.LLST52
@@ -40685,16 +40660,16 @@ __func__.9940:
 	.4byte	0x5df3
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x858d
+	.4byte	0x858f
 	.uleb128 0x6f
 	.4byte	0x5de8
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x30
 	.uleb128 0x70
-	.4byte	0x854c
+	.4byte	0x854e
 	.uleb128 0x2d
 	.4byte	.LVL144
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40726,7 +40701,7 @@ __func__.9940:
 	.4byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x85fe
+	.4byte	0x8600
 	.uleb128 0x46
 	.4byte	0x5e0d
 	.4byte	.LLST58
@@ -40734,16 +40709,16 @@ __func__.9940:
 	.4byte	0x5e18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x48
-	.4byte	0x85f4
+	.4byte	0x85f6
 	.uleb128 0x6f
 	.4byte	0x5e0d
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x48
 	.uleb128 0x70
-	.4byte	0x85b3
+	.4byte	0x85b5
 	.uleb128 0x2d
 	.4byte	.LVL163
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40775,7 +40750,7 @@ __func__.9940:
 	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x871f
+	.4byte	0x8721
 	.uleb128 0x46
 	.4byte	0x5ac6
 	.4byte	.LLST70
@@ -40805,32 +40780,32 @@ __func__.9940:
 	.4byte	.LBB192
 	.4byte	.LBE192-.LBB192
 	.uleb128 0x71
-	.4byte	0x861a
+	.4byte	0x861c
 	.4byte	.LLST72
 	.uleb128 0x71
-	.4byte	0x861f
+	.4byte	0x8621
 	.4byte	.LLST73
 	.uleb128 0x71
-	.4byte	0x8624
+	.4byte	0x8626
 	.4byte	.LLST74
 	.uleb128 0x71
-	.4byte	0x8629
+	.4byte	0x862b
 	.4byte	.LLST75
 	.uleb128 0x71
-	.4byte	0x862e
+	.4byte	0x8630
 	.4byte	.LLST76
 	.uleb128 0x71
-	.4byte	0x8633
+	.4byte	0x8635
 	.4byte	.LLST77
 	.uleb128 0x71
-	.4byte	0x8638
+	.4byte	0x863a
 	.4byte	.LLST78
 	.uleb128 0x70
-	.4byte	0x863d
+	.4byte	0x863f
 	.uleb128 0x32
 	.4byte	.LVL206
-	.4byte	0x9289
-	.4byte	0x86c8
+	.4byte	0x928b
+	.4byte	0x86ca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40853,7 +40828,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL213
 	.4byte	0x5c31
-	.4byte	0x86e5
+	.4byte	0x86e7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40869,8 +40844,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL214
-	.4byte	0x9289
-	.4byte	0x870c
+	.4byte	0x928b
+	.4byte	0x870e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40909,7 +40884,7 @@ __func__.9940:
 	.4byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87af
+	.4byte	0x87b1
 	.uleb128 0x46
 	.4byte	0x585d
 	.4byte	.LLST79
@@ -40924,7 +40899,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB195
 	.4byte	.LBE195-.LBB195
-	.4byte	0x87a5
+	.4byte	0x87a7
 	.uleb128 0x46
 	.4byte	0x585d
 	.4byte	.LLST82
@@ -40932,14 +40907,14 @@ __func__.9940:
 	.4byte	.LBB196
 	.4byte	.LBE196-.LBB196
 	.uleb128 0x70
-	.4byte	0x873b
+	.4byte	0x873d
 	.uleb128 0x70
-	.4byte	0x8744
+	.4byte	0x8746
 	.uleb128 0x70
-	.4byte	0x874d
+	.4byte	0x874f
 	.uleb128 0x34
 	.4byte	.LVL220
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40971,7 +40946,7 @@ __func__.9940:
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87ed
+	.4byte	0x87ef
 	.uleb128 0x46
 	.4byte	0x4fcf
 	.4byte	.LLST86
@@ -40990,7 +40965,7 @@ __func__.9940:
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x70
-	.4byte	0x87cb
+	.4byte	0x87cd
 	.byte	0
 	.byte	0
 	.byte	0
@@ -41000,7 +40975,7 @@ __func__.9940:
 	.4byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8826
+	.4byte	0x8828
 	.uleb128 0x46
 	.4byte	0x4b4d
 	.4byte	.LLST87
@@ -41009,7 +40984,7 @@ __func__.9940:
 	.4byte	.LLST88
 	.uleb128 0x2d
 	.4byte	.LVL248
-	.4byte	0x8487
+	.4byte	0x8489
 	.uleb128 0x3c
 	.4byte	0x4b59
 	.uleb128 0x3
@@ -41024,7 +40999,7 @@ __func__.9940:
 	.4byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x886c
+	.4byte	0x886e
 	.uleb128 0x73
 	.4byte	0x4055
 	.uleb128 0x1
@@ -41041,7 +41016,7 @@ __func__.9940:
 	.4byte	.LBB210
 	.4byte	.LBE210-.LBB210
 	.uleb128 0x71
-	.4byte	0x8840
+	.4byte	0x8842
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
@@ -41052,7 +41027,7 @@ __func__.9940:
 	.4byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88a5
+	.4byte	0x88a7
 	.uleb128 0x46
 	.4byte	0x37d4
 	.4byte	.LLST120
@@ -41073,7 +41048,7 @@ __func__.9940:
 	.4byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x88cb
+	.4byte	0x88cd
 	.uleb128 0x44
 	.4byte	.LVL547
 	.4byte	0x6189
@@ -41087,7 +41062,7 @@ __func__.9940:
 	.4byte	.LFE321-.LFB321
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8998
+	.4byte	0x899a
 	.uleb128 0x76
 	.4byte	0x2af6
 	.byte	0
@@ -41099,26 +41074,26 @@ __func__.9940:
 	.4byte	0x2b18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0xb8
-	.4byte	0x897a
+	.4byte	0x897c
 	.uleb128 0x70
-	.4byte	0x88de
+	.4byte	0x88e0
 	.uleb128 0x71
-	.4byte	0x88e4
+	.4byte	0x88e6
 	.4byte	.LLST240
 	.uleb128 0x77
-	.4byte	0x88e9
+	.4byte	0x88eb
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
 	.uleb128 0x77
-	.4byte	0x88ee
+	.4byte	0x88f0
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x61
 	.4byte	.LBB238
 	.4byte	.LBE238-.LBB238
-	.4byte	0x8964
+	.4byte	0x8966
 	.uleb128 0x77
 	.4byte	0x2b29
 	.uleb128 0x3
@@ -41127,7 +41102,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL920
 	.4byte	0x26b9
-	.4byte	0x8951
+	.4byte	0x8953
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41192,7 +41167,7 @@ __func__.9940:
 	.4byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8aa0
+	.4byte	0x8aa2
 	.uleb128 0x46
 	.4byte	0x2420
 	.4byte	.LLST282
@@ -41213,14 +41188,14 @@ __func__.9940:
 	.4byte	.LBB246
 	.4byte	.LBE246-.LBB246
 	.uleb128 0x70
-	.4byte	0x89b4
+	.4byte	0x89b6
 	.uleb128 0x77
-	.4byte	0x89ba
+	.4byte	0x89bc
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
 	.uleb128 0x77
-	.4byte	0x89bf
+	.4byte	0x89c1
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
@@ -41230,7 +41205,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1145
 	.4byte	0x230c
-	.4byte	0x8a20
+	.4byte	0x8a22
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41253,7 +41228,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1146
 	.4byte	0x230c
-	.4byte	0x8a3f
+	.4byte	0x8a41
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41275,7 +41250,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1147
 	.4byte	0x2464
-	.4byte	0x8a5e
+	.4byte	0x8a60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41296,7 +41271,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1148
 	.4byte	0x251a
-	.4byte	0x8a82
+	.4byte	0x8a84
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41348,7 +41323,7 @@ __func__.9940:
 	.4byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b59
+	.4byte	0x8b5b
 	.uleb128 0x46
 	.4byte	0x2b56
 	.4byte	.LLST303
@@ -41367,16 +41342,16 @@ __func__.9940:
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0xe8
 	.uleb128 0x71
-	.4byte	0x8abc
+	.4byte	0x8abe
 	.4byte	.LLST304
 	.uleb128 0x71
-	.4byte	0x8ac1
+	.4byte	0x8ac3
 	.4byte	.LLST305
 	.uleb128 0x71
-	.4byte	0x8ac6
+	.4byte	0x8ac8
 	.4byte	.LLST306
 	.uleb128 0x77
-	.4byte	0x8acb
+	.4byte	0x8acd
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x44
@@ -41385,7 +41360,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1230
 	.4byte	0x61f9
-	.4byte	0x8b1e
+	.4byte	0x8b20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41395,8 +41370,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1236
-	.4byte	0x9289
-	.4byte	0x8b39
+	.4byte	0x928b
+	.4byte	0x8b3b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41414,7 +41389,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1237
 	.4byte	0x688f
-	.4byte	0x8b4d
+	.4byte	0x8b4f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41434,7 +41409,7 @@ __func__.9940:
 	.4byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c39
+	.4byte	0x8c3b
 	.uleb128 0x46
 	.4byte	0x330f
 	.4byte	.LLST307
@@ -41443,7 +41418,7 @@ __func__.9940:
 	.uleb128 0x61
 	.4byte	.LBB261
 	.4byte	.LBE261-.LBB261
-	.4byte	0x8c2f
+	.4byte	0x8c31
 	.uleb128 0x46
 	.4byte	0x330f
 	.4byte	.LLST308
@@ -41451,11 +41426,11 @@ __func__.9940:
 	.4byte	.LBB262
 	.4byte	.LBE262-.LBB262
 	.uleb128 0x70
-	.4byte	0x8b75
+	.4byte	0x8b77
 	.uleb128 0x32
 	.4byte	.LVL1248
 	.4byte	0x5c31
-	.4byte	0x8bbb
+	.4byte	0x8bbd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41471,8 +41446,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1249
-	.4byte	0x9289
-	.4byte	0x8be2
+	.4byte	0x928b
+	.4byte	0x8be4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41495,7 +41470,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1250
 	.4byte	0x37c3
-	.4byte	0x8bf6
+	.4byte	0x8bf8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41506,7 +41481,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1251
 	.4byte	0x2b45
-	.4byte	0x8c0a
+	.4byte	0x8c0c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41516,7 +41491,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL1252
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41548,7 +41523,7 @@ __func__.9940:
 	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d11
+	.4byte	0x8d13
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x108
 	.uleb128 0x71
@@ -41573,7 +41548,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1269
 	.4byte	0x5279
-	.4byte	0x8c9c
+	.4byte	0x8c9e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41596,7 +41571,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1271
 	.4byte	0x26b9
-	.4byte	0x8cbb
+	.4byte	0x8cbd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41618,7 +41593,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1275
 	.4byte	0x230c
-	.4byte	0x8ccf
+	.4byte	0x8cd1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41629,7 +41604,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1277
 	.4byte	0x333e
-	.4byte	0x8ce3
+	.4byte	0x8ce5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41640,7 +41615,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1278
 	.4byte	0x251a
-	.4byte	0x8d06
+	.4byte	0x8d08
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41674,7 +41649,7 @@ __func__.9940:
 	.4byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d42
+	.4byte	0x8d44
 	.uleb128 0x2d
 	.4byte	.LVL1527
 	.4byte	0x5156
@@ -41702,11 +41677,11 @@ __func__.9940:
 	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d99
+	.4byte	0x8d9b
 	.uleb128 0x32
 	.4byte	.LVL1553
 	.4byte	0x503e
-	.4byte	0x8d69
+	.4byte	0x8d6b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41716,8 +41691,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1554
-	.4byte	0x9289
-	.4byte	0x8d89
+	.4byte	0x928b
+	.4byte	0x8d8b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41747,11 +41722,11 @@ __func__.9940:
 	.4byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8de7
+	.4byte	0x8de9
 	.uleb128 0x32
 	.4byte	.LVL1690
 	.4byte	0x2d9c
-	.4byte	0x8dc0
+	.4byte	0x8dc2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41762,7 +41737,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1691
 	.4byte	0x4f28
-	.4byte	0x8dd7
+	.4byte	0x8dd9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41786,7 +41761,7 @@ __func__.9940:
 	.4byte	.LFE322-.LFB322
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9106
+	.4byte	0x9108
 	.uleb128 0x46
 	.4byte	0x2a0e
 	.4byte	.LLST398
@@ -41819,7 +41794,7 @@ __func__.9940:
 	.4byte	0x2aae
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x158
-	.4byte	0x90f6
+	.4byte	0x90f8
 	.uleb128 0x46
 	.4byte	0x2a1a
 	.4byte	.LLST400
@@ -41829,44 +41804,44 @@ __func__.9940:
 	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x158
 	.uleb128 0x70
-	.4byte	0x8e0c
+	.4byte	0x8e0e
 	.uleb128 0x71
-	.4byte	0x8e12
+	.4byte	0x8e14
 	.4byte	.LLST402
 	.uleb128 0x77
-	.4byte	0x8e17
+	.4byte	0x8e19
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x70
-	.4byte	0x8e1c
+	.4byte	0x8e1e
 	.uleb128 0x71
-	.4byte	0x8e22
+	.4byte	0x8e24
 	.4byte	.LLST403
 	.uleb128 0x71
-	.4byte	0x8e27
+	.4byte	0x8e29
 	.4byte	.LLST404
 	.uleb128 0x71
-	.4byte	0x8e2c
+	.4byte	0x8e2e
 	.4byte	.LLST405
 	.uleb128 0x71
-	.4byte	0x8e31
+	.4byte	0x8e33
 	.4byte	.LLST406
 	.uleb128 0x71
-	.4byte	0x8e36
+	.4byte	0x8e38
 	.4byte	.LLST407
 	.uleb128 0x71
-	.4byte	0x8e3b
+	.4byte	0x8e3d
 	.4byte	.LLST408
 	.uleb128 0x7a
 	.4byte	0x2a9e
 	.uleb128 0x7a
 	.4byte	0x2aa6
 	.uleb128 0x70
-	.4byte	0x8e40
+	.4byte	0x8e42
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x178
-	.4byte	0x8f2b
+	.4byte	0x8f2d
 	.uleb128 0x71
 	.4byte	0x2abc
 	.4byte	.LLST409
@@ -41876,7 +41851,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1721
 	.4byte	0x5b34
-	.4byte	0x8ef4
+	.4byte	0x8ef6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41887,7 +41862,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1723
 	.4byte	0x5b34
-	.4byte	0x8f08
+	.4byte	0x8f0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41900,7 +41875,7 @@ __func__.9940:
 	.4byte	0x2b8f
 	.uleb128 0x34
 	.4byte	.LVL1738
-	.4byte	0x9289
+	.4byte	0x928b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41921,7 +41896,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1750
 	.4byte	0x3f2e
-	.4byte	0x8f48
+	.4byte	0x8f4a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41932,7 +41907,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1751
 	.4byte	0x5b34
-	.4byte	0x8f5c
+	.4byte	0x8f5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41949,7 +41924,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1759
 	.4byte	0x3259
-	.4byte	0x8f82
+	.4byte	0x8f84
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41960,7 +41935,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1764
 	.4byte	0x3168
-	.4byte	0x8f99
+	.4byte	0x8f9b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41973,7 +41948,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1765
 	.4byte	0x3259
-	.4byte	0x8fad
+	.4byte	0x8faf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41983,8 +41958,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1766
-	.4byte	0x9289
-	.4byte	0x8fd4
+	.4byte	0x928b
+	.4byte	0x8fd6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42006,8 +41981,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1767
-	.4byte	0x9289
-	.4byte	0x8ffb
+	.4byte	0x928b
+	.4byte	0x8ffd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42029,8 +42004,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1768
-	.4byte	0x9289
-	.4byte	0x9022
+	.4byte	0x928b
+	.4byte	0x9024
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42053,7 +42028,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1769
 	.4byte	0x3f2e
-	.4byte	0x9036
+	.4byte	0x9038
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42067,7 +42042,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1780
 	.4byte	0x26b9
-	.4byte	0x9055
+	.4byte	0x9057
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -42078,8 +42053,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL1789
-	.4byte	0x9289
-	.4byte	0x907c
+	.4byte	0x928b
+	.4byte	0x907e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42102,7 +42077,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1790
 	.4byte	0x5279
-	.4byte	0x909b
+	.4byte	0x909d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42127,7 +42102,7 @@ __func__.9940:
 	.uleb128 0x32
 	.4byte	.LVL1793
 	.4byte	0x319e
-	.4byte	0x90be
+	.4byte	0x90c0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42152,7 +42127,7 @@ __func__.9940:
 	.4byte	0x32fe
 	.uleb128 0x44
 	.4byte	.LVL1801
-	.4byte	0x6ede
+	.4byte	0x6ee0
 	.uleb128 0x44
 	.4byte	.LVL1802
 	.4byte	0x537a
@@ -42177,27 +42152,27 @@ __func__.9940:
 	.4byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9266
+	.4byte	0x9268
 	.uleb128 0x76
 	.4byte	0x39af
 	.byte	0
 	.uleb128 0x61
 	.4byte	.LBB306
 	.4byte	.LBE306-.LBB306
-	.4byte	0x91fc
+	.4byte	0x91fe
 	.uleb128 0x70
-	.4byte	0x9119
+	.4byte	0x911b
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x1a8
-	.4byte	0x9144
+	.4byte	0x9146
 	.uleb128 0x71
 	.4byte	0x39ba
 	.4byte	.LLST449
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2004
+	.4byte	.LVL1998
 	.4byte	0x3d16
-	.4byte	0x9158
+	.4byte	0x915a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42206,9 +42181,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2005
+	.4byte	.LVL1999
 	.4byte	0x3d16
-	.4byte	0x916c
+	.4byte	0x916e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42217,9 +42192,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2007
+	.4byte	.LVL2001
 	.4byte	0x4f28
-	.4byte	0x9183
+	.4byte	0x9185
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42228,9 +42203,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2008
+	.4byte	.LVL2002
 	.4byte	0x4f28
-	.4byte	0x919a
+	.4byte	0x919c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42239,24 +42214,24 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2009
+	.4byte	.LVL2003
 	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL2010
+	.4byte	.LVL2004
 	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2011
+	.4byte	.LVL2005
 	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2015
+	.4byte	.LVL2009
 	.4byte	0x2c26
 	.uleb128 0x44
-	.4byte	.LVL2016
+	.4byte	.LVL2010
 	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL2017
+	.4byte	.LVL2011
 	.4byte	0x3430
-	.4byte	0x91de
+	.4byte	0x91e0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42265,9 +42240,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2018
+	.4byte	.LVL2012
 	.4byte	0x3430
-	.4byte	0x91f2
+	.4byte	0x91f4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42276,41 +42251,41 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2019
+	.4byte	.LVL2013
 	.4byte	0x3bff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1991
+	.4byte	.LVL1985
 	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL1992
+	.4byte	.LVL1986
 	.4byte	0x4b73
 	.uleb128 0x44
-	.4byte	.LVL1993
+	.4byte	.LVL1987
 	.4byte	0x49a7
 	.uleb128 0x44
-	.4byte	.LVL1994
+	.4byte	.LVL1988
 	.4byte	0x4749
 	.uleb128 0x44
-	.4byte	.LVL1995
+	.4byte	.LVL1989
 	.4byte	0x47ca
 	.uleb128 0x44
-	.4byte	.LVL1996
+	.4byte	.LVL1990
 	.4byte	0x3db9
 	.uleb128 0x44
-	.4byte	.LVL1997
+	.4byte	.LVL1991
 	.4byte	0x4b66
 	.uleb128 0x44
-	.4byte	.LVL1998
+	.4byte	.LVL1992
 	.4byte	0x5ee3
 	.uleb128 0x44
-	.4byte	.LVL1999
+	.4byte	.LVL1993
 	.4byte	0x3e13
 	.uleb128 0x44
-	.4byte	.LVL2000
+	.4byte	.LVL1994
 	.4byte	0x3fc4
 	.uleb128 0x34
-	.4byte	.LVL2001
+	.4byte	.LVL1995
 	.4byte	0x4fc2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -44071,11 +44046,11 @@ __func__.9940:
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
 .LLST455:
-	.4byte	.LVL2077
-	.4byte	.LVL2078-1
+	.4byte	.LVL2071
+	.4byte	.LVL2072-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2078-1
+	.4byte	.LVL2072-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44085,11 +44060,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST456:
-	.4byte	.LVL2077
-	.4byte	.LVL2078-1
+	.4byte	.LVL2071
+	.4byte	.LVL2072-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL2078-1
+	.4byte	.LVL2072-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -44099,11 +44074,11 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST457:
-	.4byte	.LVL2077
-	.4byte	.LVL2078-1
+	.4byte	.LVL2071
+	.4byte	.LVL2072-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2078-1
+	.4byte	.LVL2072-1
 	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
@@ -47179,15 +47154,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST448:
-	.4byte	.LVL1974
-	.4byte	.LVL1977
+	.4byte	.LVL1968
+	.4byte	.LVL1971
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1987
-	.4byte	.LVL1989
+	.4byte	.LVL1981
+	.4byte	.LVL1983
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1990
+	.4byte	.LVL1984
 	.4byte	.LFE277
 	.2byte	0x1
 	.byte	0x57
@@ -50125,15 +50100,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST445:
-	.4byte	.LVL1967
-	.4byte	.LVL1970
+	.4byte	.LVL1961
+	.4byte	.LVL1964
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1970
-	.4byte	.LVL1971-1
+	.4byte	.LVL1964
+	.4byte	.LVL1965-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1971-1
+	.4byte	.LVL1965-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50143,15 +50118,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST446:
-	.4byte	.LVL1967
-	.4byte	.LVL1969
+	.4byte	.LVL1961
+	.4byte	.LVL1963
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1969
-	.4byte	.LVL1971-1
+	.4byte	.LVL1963
+	.4byte	.LVL1965-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1971-1
+	.4byte	.LVL1965-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50161,15 +50136,15 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST447:
-	.4byte	.LVL1967
-	.4byte	.LVL1968
+	.4byte	.LVL1961
+	.4byte	.LVL1962
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1968
-	.4byte	.LVL1971-1
+	.4byte	.LVL1962
+	.4byte	.LVL1965-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1971-1
+	.4byte	.LVL1965-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50359,28 +50334,28 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL1874
-	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1876
-	.4byte	.LVL1878
+	.4byte	.LVL1877
+	.4byte	.LVL1879
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1878
-	.4byte	.LVL1965
+	.4byte	.LVL1879
+	.4byte	.LVL1959
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1965
-	.4byte	.LVL1966
+	.4byte	.LVL1959
+	.4byte	.LVL1960
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1966
+	.4byte	.LVL1960
 	.4byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50395,29 +50370,29 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL1873
-	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1876
-	.4byte	.LVL1880
+	.4byte	.LVL1877
+	.4byte	.LVL1881
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1880
-	.4byte	.LVL1924
+	.4byte	.LVL1881
+	.4byte	.LVL1906
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1924
-	.4byte	.LVL1925
+	.4byte	.LVL1906
+	.4byte	.LVL1908
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1925
-	.4byte	.LVL1965
+	.4byte	.LVL1908
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1965
+	.4byte	.LVL1959
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x51
@@ -50429,29 +50404,29 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x52
 	.4byte	.LVL1872
-	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1876
-	.4byte	.LVL1879
+	.4byte	.LVL1877
+	.4byte	.LVL1880
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1879
-	.4byte	.LVL1925
+	.4byte	.LVL1880
+	.4byte	.LVL1908
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1925
-	.4byte	.LVL1926
+	.4byte	.LVL1908
+	.4byte	.LVL1909
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1926
-	.4byte	.LVL1965
+	.4byte	.LVL1909
+	.4byte	.LVL1959
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1965
+	.4byte	.LVL1959
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x52
@@ -50464,116 +50439,111 @@ __func__.9940:
 	.byte	0x53
 	.4byte	.LVL1875-1
 	.4byte	.LVL1876
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1876
+	.sleb128 -96
 	.4byte	.LVL1877
+	.4byte	.LVL1878
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1877
-	.4byte	.LVL1927
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
-	.4byte	.LVL1927
-	.4byte	.LVL1928
+	.4byte	.LVL1878
+	.4byte	.LVL1910
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1910
+	.4byte	.LVL1911-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1928
+	.4byte	.LVL1911-1
 	.4byte	.LFE220
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -92
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
 	.4byte	0
 	.4byte	0
 .LLST434:
-	.4byte	.LVL1937
-	.4byte	.LVL1940
+	.4byte	.LVL1935
+	.4byte	.LVL1938
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -84
+	.sleb128 -88
 	.4byte	0
 	.4byte	0
 .LLST435:
 	.4byte	.LVL1887
 	.4byte	.LVL1888
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
+	.2byte	0x1
+	.byte	0x5a
 	.4byte	.LVL1888
-	.4byte	.LVL1908
+	.4byte	.LVL1891
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1931
-	.4byte	.LVL1965
+	.4byte	.LVL1912
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST436:
-	.4byte	.LVL1882
 	.4byte	.LVL1883
+	.4byte	.LVL1884
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1883
-	.4byte	.LVL1913
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1913
-	.4byte	.LVL1914
+	.4byte	.LVL1884
+	.4byte	.LVL1907
 	.2byte	0x1
-	.byte	0x52
-	.4byte	.LVL1914
-	.4byte	.LVL1929
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
-	.4byte	.LVL1929
-	.4byte	.LVL1930-1
+	.byte	0x5a
+	.4byte	.LVL1907
+	.4byte	.LVL1910
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1910
+	.4byte	.LVL1959
 	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1930-1
-	.4byte	.LVL1965
-	.2byte	0x2
-	.byte	0x7d
-	.sleb128 0
+	.byte	0x5a
 	.4byte	0
 	.4byte	0
 .LLST437:
-	.4byte	.LVL1885
+	.4byte	.LVL1886
 	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL1887-1
-	.4byte	.LVL1913
+	.4byte	.LVL1896
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1913
-	.4byte	.LVL1916
+	.4byte	.LVL1896
+	.4byte	.LVL1898
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1916
-	.4byte	.LVL1965
+	.4byte	.LVL1898
+	.4byte	.LVL1959
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
 .LLST438:
+	.4byte	.LVL1934
 	.4byte	.LVL1936
-	.4byte	.LVL1938
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1938
-	.4byte	.LVL1939
+	.4byte	.LVL1936
+	.4byte	.LVL1937
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.4byte	.LVL1939
-	.4byte	.LVL1941-1
+	.4byte	.LVL1937
+	.4byte	.LVL1939-1
 	.2byte	0xb
 	.byte	0x3
 	.4byte	req_prgm
@@ -50586,30 +50556,29 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST439:
-	.4byte	.LVL1899
-	.4byte	.LVL1902
+	.4byte	.LVL1924
+	.4byte	.LVL1929
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1932
+	.4byte	.LVL1933-1
 	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1902
-	.4byte	.LVL1904
+	.byte	0x53
+	.4byte	.LVL1933-1
+	.4byte	.LVL1950
 	.2byte	0x3
-	.byte	0x7b
-	.sleb128 1
-	.byte	0x9f
-	.4byte	.LVL1934
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1950
 	.4byte	.LVL1951
 	.2byte	0x1
-	.byte	0x5b
+	.byte	0x53
 	.4byte	.LVL1951
-	.4byte	.LVL1952
+	.4byte	.LVL1959
 	.2byte	0x3
-	.byte	0x7b
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1952
-	.4byte	.LVL1961
-	.2byte	0x1
-	.byte	0x5b
+	.byte	0x91
+	.sleb128 -92
 	.4byte	0
 	.4byte	0
 .LLST440:
@@ -50618,50 +50587,50 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL1887-1
-	.4byte	.LVL1903
-	.2byte	0x3
-	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1903
-	.4byte	.LVL1905
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL1905
-	.4byte	.LVL1913
+	.4byte	.LVL1896
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1913
-	.4byte	.LVL1915
+	.sleb128 -84
+	.4byte	.LVL1896
+	.4byte	.LVL1897
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1915
-	.4byte	.LVL1921
+	.4byte	.LVL1897
+	.4byte	.LVL1903
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1921
-	.4byte	.LVL1922
+	.sleb128 -84
+	.4byte	.LVL1903
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1923
-	.4byte	.LVL1931
+	.4byte	.LVL1905
+	.4byte	.LVL1912
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1931
-	.4byte	.LVL1964
+	.4byte	.LVL1912
+	.4byte	.LVL1913
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1913
+	.4byte	.LVL1928
 	.2byte	0x3
 	.byte	0x91
-	.sleb128 -88
-	.4byte	.LVL1964
-	.4byte	.LVL1965
+	.sleb128 -84
+	.4byte	.LVL1928
+	.4byte	.LVL1929
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1929
+	.4byte	.LVL1959
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
 	.4byte	0
 	.4byte	0
 .LLST441:
-	.4byte	.LVL1895
-	.4byte	.LVL1896
+	.4byte	.LVL1920
+	.4byte	.LVL1921
 	.2byte	0x1f
 	.byte	0x74
 	.sleb128 7
@@ -50678,7 +50647,7 @@ __func__.9940:
 	.byte	0x24
 	.byte	0x22
 	.byte	0x91
-	.sleb128 -88
+	.sleb128 -84
 	.byte	0x6
 	.byte	0x16
 	.byte	0x14
@@ -50692,38 +50661,25 @@ __func__.9940:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.4byte	.LVL1896
-	.4byte	.LVL1897
+	.4byte	.LVL1921
+	.4byte	.LVL1922
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1897
-	.4byte	.LVL1900
+	.4byte	.LVL1922
+	.4byte	.LVL1925
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1900
-	.4byte	.LVL1901
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1901
-	.4byte	.LVL1902
+	.4byte	.LVL1925
+	.4byte	.LVL1929
 	.2byte	0x3
-	.byte	0x7b
-	.sleb128 -1
-	.byte	0x9f
-	.4byte	.LVL1902
-	.4byte	.LVL1904
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL1934
-	.4byte	.LVL1961
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1932
+	.4byte	.LVL1959
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1961
-	.4byte	.LVL1965
-	.2byte	0x1
-	.byte	0x5b
 	.4byte	0
 	.4byte	0
 .LLST442:
@@ -50732,30 +50688,30 @@ __func__.9940:
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1918
-	.4byte	.LVL1919
+	.4byte	.LVL1900
+	.4byte	.LVL1901
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1919
-	.4byte	.LVL1921-1
+	.4byte	.LVL1901
+	.4byte	.LVL1903-1
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL1940
 	.4byte	.LVL1942
-	.4byte	.LVL1944
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1946
-	.4byte	.LVL1947
+	.4byte	.LVL1944
+	.4byte	.LVL1945
 	.2byte	0x1
 	.byte	0x51
+	.4byte	.LVL1945
 	.4byte	.LVL1947
-	.4byte	.LVL1949
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1953
-	.4byte	.LVL1960
+	.4byte	.LVL1951
+	.4byte	.LVL1958
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
@@ -50767,24 +50723,24 @@ __func__.9940:
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1918
-	.4byte	.LVL1922
+	.4byte	.LVL1900
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1923
-	.4byte	.LVL1931
+	.4byte	.LVL1905
+	.4byte	.LVL1912
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1943
-	.4byte	.LVL1944
+	.4byte	.LVL1941
+	.4byte	.LVL1942
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1947
-	.4byte	.LVL1948
+	.4byte	.LVL1945
+	.4byte	.LVL1946
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1953
-	.4byte	.LVL1960
+	.4byte	.LVL1951
+	.4byte	.LVL1958
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
@@ -50797,19 +50753,19 @@ __func__.9940:
 	.4byte	g_active_superblock
 	.byte	0x9f
 	.4byte	.LVL1888
-	.4byte	.LVL1891
+	.4byte	.LVL1889
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1894
-	.4byte	.LVL1906
+	.4byte	.LVL1912
+	.4byte	.LVL1916
 	.2byte	0x1
 	.byte	0x54
+	.4byte	.LVL1919
 	.4byte	.LVL1931
-	.4byte	.LVL1933
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1934
-	.4byte	.LVL1965
+	.4byte	.LVL1932
+	.4byte	.LVL1959
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
@@ -51272,8 +51228,8 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST454:
-	.4byte	.LVL2073
-	.4byte	.LVL2074
+	.4byte	.LVL2067
+	.4byte	.LVL2068
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51281,8 +51237,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2074
-	.4byte	.LVL2075
+	.4byte	.LVL2068
+	.4byte	.LVL2069
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51290,8 +51246,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2075
-	.4byte	.LVL2076
+	.4byte	.LVL2069
+	.4byte	.LVL2070
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51302,95 +51258,95 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST450:
-	.4byte	.LVL2027
-	.4byte	.LVL2029
+	.4byte	.LVL2021
+	.4byte	.LVL2023
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2031
-	.4byte	.LVL2032
+	.4byte	.LVL2025
+	.4byte	.LVL2026
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2042
-	.4byte	.LVL2044
+	.4byte	.LVL2036
+	.4byte	.LVL2038
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2047
-	.4byte	.LVL2048
+	.4byte	.LVL2041
+	.4byte	.LVL2042
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2052
-	.4byte	.LVL2053
+	.4byte	.LVL2046
+	.4byte	.LVL2047
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2055
-	.4byte	.LVL2056
+	.4byte	.LVL2049
+	.4byte	.LVL2050
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2056
-	.4byte	.LVL2057-1
+	.4byte	.LVL2050
+	.4byte	.LVL2051-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2059
-	.4byte	.LVL2060
+	.4byte	.LVL2053
+	.4byte	.LVL2054
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
 .LLST451:
-	.4byte	.LVL2031
-	.4byte	.LVL2035
+	.4byte	.LVL2025
+	.4byte	.LVL2029
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2056
-	.4byte	.LVL2058
+	.4byte	.LVL2050
+	.4byte	.LVL2052
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2059
-	.4byte	.LVL2060
+	.4byte	.LVL2053
+	.4byte	.LVL2054
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
 .LLST452:
-	.4byte	.LVL2025
-	.4byte	.LVL2028
+	.4byte	.LVL2019
+	.4byte	.LVL2022
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL2028
-	.4byte	.LVL2030
+	.4byte	.LVL2022
+	.4byte	.LVL2024
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2042
-	.4byte	.LVL2045
+	.4byte	.LVL2036
+	.4byte	.LVL2039
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2046
-	.4byte	.LVL2051
+	.4byte	.LVL2040
+	.4byte	.LVL2045
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2051
-	.4byte	.LVL2052
+	.4byte	.LVL2045
+	.4byte	.LVL2046
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
 .LLST453:
-	.4byte	.LVL2023
-	.4byte	.LVL2024
+	.4byte	.LVL2017
+	.4byte	.LVL2018
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2024
-	.4byte	.LVL2026
+	.4byte	.LVL2018
+	.4byte	.LVL2020
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2040
-	.4byte	.LVL2041
+	.4byte	.LVL2034
+	.4byte	.LVL2035
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2041
-	.4byte	.LVL2042
+	.4byte	.LVL2035
+	.4byte	.LVL2036
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
@@ -53119,14 +53075,14 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 .LLST449:
-	.4byte	.LVL2005
-	.4byte	.LVL2006
+	.4byte	.LVL1999
+	.4byte	.LVL2000
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
+	.4byte	.LVL2000
 	.4byte	.LVL2006
-	.4byte	.LVL2012
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_buffer_superblock
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index c2d0171805..a808dd6611 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier:	GPL-2.0
- * date: 2018-06-20
+ * SPDX-License-Identifier:    GPL-2.0
+ * date: 2018-07-04
  */
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
@@ -19364,22 +19364,22 @@ FtlWrite:
 	.loc 3 962 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-	stp	x25, x26, [sp, 64]
-	.cfi_offset 25, -176
-	.cfi_offset 26, -168
-	mov	w25, w2
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
-	stp	x19, x20, [sp, 16]
 	.cfi_offset 21, -208
 	.cfi_offset 22, -200
-	.cfi_offset 19, -224
-	.cfi_offset 20, -216
 	mov	w22, w1
 	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
 	.cfi_offset 23, -192
 	.cfi_offset 24, -184
+	mov	w24, w2
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+	mov	x25, x3
+	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
 	.cfi_offset 27, -160
 	.cfi_offset 28, -152
 	.loc 3 970 0
@@ -19387,7 +19387,7 @@ FtlWrite:
 	.loc 3 971 0
 	mov	x2, x3
 .LVL1986:
-	mov	w1, w25
+	mov	w1, w24
 .LVL1987:
 	add	w0, w22, 256
 .LVL1988:
@@ -19398,8 +19398,9 @@ FtlWrite:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 .LVL1990:
+	ldp	x25, x26, [sp, 64]
+.LVL1991:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	.cfi_remember_state
@@ -19417,16 +19418,16 @@ FtlWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1991:
+.LVL1992:
 .L1516:
 	.cfi_restore_state
 	.loc 3 974 0
 	adrp	x0, .LANCHOR34
 	add	w2, w1, w2
-.LVL1992:
+.LVL1993:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, w0
-	bhi	.L1558
+	bhi	.L1556
 	.loc 3 974 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR88
 	ldr	w0, [x0, #:lo12:.LANCHOR88]
@@ -19436,10 +19437,10 @@ FtlWrite:
 	adrp	x0, .LANCHOR178
 	.loc 3 978 0
 	adrp	x3, .LANCHOR12
-.LVL1993:
+.LVL1994:
 	.loc 3 977 0
 	mov	w1, 2048
-.LVL1994:
+.LVL1995:
 	.loc 3 979 0
 	sub	w2, w2, #1
 	.loc 3 977 0
@@ -19453,24 +19454,24 @@ FtlWrite:
 	adrp	x2, .LANCHOR65
 	.loc 3 978 0
 	udiv	w21, w22, w1
-.LVL1995:
+.LVL1996:
 	.loc 3 979 0
 	str	w0, [x29, 168]
-.LVL1996:
+.LVL1997:
 	.loc 3 980 0
 	sub	w23, w0, w21
 	.loc 3 982 0
 	ldr	w0, [x2, #:lo12:.LANCHOR65]
-.LVL1997:
-	.loc 3 980 0
-	add	w24, w23, 1
 .LVL1998:
+	.loc 3 980 0
+	add	w26, w23, 1
+.LVL1999:
 	.loc 3 982 0
-	add	w0, w0, w24
+	add	w0, w0, w26
 	str	w0, [x2, #:lo12:.LANCHOR65]
 	.loc 3 983 0
 	adrp	x0, .LANCHOR150
-	str	x0, [x29, 128]
+	str	x0, [x29, 120]
 	ldr	x2, [x0, #:lo12:.LANCHOR150]
 	cbz	x2, .L1518
 	.loc 3 984 0
@@ -19479,7 +19480,7 @@ FtlWrite:
 	beq	.L1519
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1999:
+.LVL2000:
 .L1518:
 	.loc 3 1008 0
 	adrp	x0, .LANCHOR179
@@ -19499,15 +19500,138 @@ FtlWrite:
 	.loc 3 1023 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
-	str	x0, [x29, 104]
-.LVL2000:
+	str	x0, [x29, 96]
+.LVL2001:
 .L1522:
 	.loc 3 1011 0
-	cbz	w24, .L1556
+	cbnz	w26, .L1552
+	.loc 3 1137 0
+	ldr	w0, [x29, 168]
+	sub	w1, w0, w21
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2002:
+	.loc 3 1139 0
+	adrp	x0, .LANCHOR48
+	mov	x20, x0
+.LVL2003:
+	ldrh	w1, [x0, #:lo12:.LANCHOR48]
+	cmp	w1, 15
+	bhi	.L1553
+	.loc 3 1141 0
+	adrp	x22, .LANCHOR101
+.LVL2004:
+	.loc 3 1143 0
+	adrp	x21, .LANCHOR85
+.LVL2005:
+	.loc 3 1144 0
+	adrp	x19, .LANCHOR84
+.LVL2006:
+	.loc 3 1141 0
+	add	x22, x22, :lo12:.LANCHOR101
+	.loc 3 1143 0
+	add	x21, x21, :lo12:.LANCHOR85
+	.loc 3 1144 0
+	add	x19, x19, :lo12:.LANCHOR84
+.L1571:
+	.loc 3 1141 0
+	adrp	x0, .LANCHOR82
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+	cmp	w0, w1
+	bne	.L1554
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x22]
+	cmp	w1, w0
+	bne	.L1554
+	.loc 3 1142 0 is_stmt 1
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL2007:
+	bl	FtlGcRefreshBlock
+.LVL2008:
+.L1554:
+	.loc 3 1143 0
+	mov	w0, 128
+	.loc 3 1145 0
+	mov	w1, 1
+	.loc 3 1143 0
+	strh	w0, [x21]
+	.loc 3 1144 0
+	strh	w0, [x19]
+	.loc 3 1145 0
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+.LVL2009:
+	.loc 3 1146 0
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2010:
+	.loc 3 1147 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR48]
+	cmp	w0, 8
+	bls	.L1571
+	b	.L1553
+.LVL2011:
+.L1519:
+	.loc 3 987 0
+	adrp	x3, .LANCHOR66
+	ldr	w0, [x3, #:lo12:.LANCHOR66]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR66]
+	.loc 3 988 0
+	msub	w0, w21, w1, w22
+.LVL2012:
+	.loc 3 992 0
+	ldr	x3, [x2, 8]
+	.loc 3 989 0
+	sub	w1, w1, w0
+.LVL2013:
+	cmp	w24, w1
+	.loc 3 992 0
+	lsl	w0, w0, 9
+.LVL2014:
+	csel	w19, w24, w1, ls
+.LVL2015:
+	add	x0, x3, x0
+	lsl	w20, w19, 9
+	mov	x1, x25
+	mov	w2, w20
+	bl	ftl_memcpy
+.LVL2016:
+	.loc 3 994 0
+	cbnz	w23, .L1520
+.LVL2017:
+.L1553:
+	.loc 3 995 0
+	mov	w0, 0
+	b	.L1515
+.LVL2018:
+.L1520:
+	.loc 3 996 0
+	sub	w24, w24, w19
+.LVL2019:
+	.loc 3 997 0
+	add	w22, w22, w19
+.LVL2020:
+	.loc 3 998 0
+	add	x25, x25, x20
+.LVL2021:
+	.loc 3 999 0
+	add	w21, w21, 1
+.LVL2022:
+	.loc 3 1000 0
+	bl	FtlCacheWriteBack
+.LVL2023:
+	mov	w26, w23
+	b	.L1518
+.LVL2024:
+.L1552:
 	.loc 3 1012 0
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
-	str	x0, [x29, 120]
+	str	x0, [x29, 128]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
 	bcc	.L1523
@@ -19518,14 +19642,14 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2001:
+.LVL2025:
 .L1523:
 	.loc 3 1013 0 is_stmt 1
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L1524
 	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL2002:
+.LVL2026:
 	.loc 3 1016 0
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
@@ -19538,7 +19662,7 @@ FtlWrite:
 	cbnz	w1, .L1526
 	.loc 3 1018 0
 	bl	allocate_new_data_superblock
-.LVL2003:
+.LVL2027:
 	.loc 3 1019 0
 	ldr	x0, [x29, 152]
 	str	wzr, [x0, #:lo12:.LANCHOR179]
@@ -19546,41 +19670,41 @@ FtlWrite:
 	.loc 3 1021 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2004:
+.LVL2028:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2005:
+.LVL2029:
 	.loc 3 1022 0
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR179]
 	.loc 3 1023 0
 	cmp	w0, 0
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 96]
 	csel	x19, x0, x19, ne
 .L1527:
-.LVL2006:
+.LVL2030:
 	.loc 3 1033 0
 	ldrh	w0, [x19, 4]
 	cbnz	w0, .L1524
 	.loc 3 1034 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2007:
+.LVL2031:
 .L1524:
 	.loc 3 1043 0
 	ldrh	w0, [x19, 4]
 	.loc 3 1041 0
 	ldrb	w1, [x19, 7]
-	cmp	w0, w24
-	csel	w0, w0, w24, ls
+	cmp	w0, w26
+	csel	w0, w0, w26, ls
 	lsl	w1, w1, 2
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
 	str	w0, [x29, 160]
-.LVL2008:
+.LVL2032:
 	.loc 3 1045 0
-	ldr	x0, [x29, 120]
-.LVL2009:
+	ldr	x0, [x29, 128]
+.LVL2033:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
@@ -19592,179 +19716,71 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2010:
+.LVL2034:
 .L1528:
 	.loc 3 1055 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR24
-	adrp	x28, .LANCHOR122
 	add	x0, x0, :lo12:.LANCHOR24
 	.loc 3 1068 0 discriminator 1
 	str	xzr, [x29, 184]
 	.loc 3 1055 0 discriminator 1
 	str	x0, [x29, 112]
+	.loc 3 1101 0 discriminator 1
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	str	x0, [x29, 104]
 .L1529:
 	.loc 3 1046 0 discriminator 1
 	ldr	w1, [x29, 160]
+	adrp	x28, .LANCHOR122
 	ldr	w27, [x29, 184]
-.LVL2011:
+.LVL2035:
 	cmp	w27, w1
 	bcc	.L1550
 	mov	x27, x1
 .L1530:
-.LVL2012:
-	.loc 3 1127 0
-	ldr	x0, [x29, 128]
-	ldr	x0, [x0, #:lo12:.LANCHOR150]
-	cbz	x0, .L1551
-.LVL2013:
-	.loc 3 1129 0
-	sub	w24, w24, #1
-.LVL2014:
-	.loc 3 1130 0
-	subs	w27, w27, #1
-.LVL2015:
-	bne	.L1551
-.LVL2016:
-.L1556:
-	.loc 3 1137 0
-	ldr	w0, [x29, 168]
-	sub	w1, w0, w21
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.LVL2017:
-	.loc 3 1139 0
-	adrp	x0, .LANCHOR48
-	mov	x22, x0
-.LVL2018:
-	ldrh	w1, [x0, #:lo12:.LANCHOR48]
-	cmp	w1, 15
-	bhi	.L1553
-	.loc 3 1141 0
-	adrp	x21, .LANCHOR101
-.LVL2019:
-	.loc 3 1143 0
-	adrp	x20, .LANCHOR85
-.LVL2020:
-	.loc 3 1144 0
-	adrp	x19, .LANCHOR84
-.LVL2021:
-	.loc 3 1141 0
-	add	x21, x21, :lo12:.LANCHOR101
-	.loc 3 1143 0
-	add	x20, x20, :lo12:.LANCHOR85
-	.loc 3 1144 0
-	add	x19, x19, :lo12:.LANCHOR84
-.L1576:
-	.loc 3 1141 0
-	adrp	x0, .LANCHOR82
-	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR82]
-	cmp	w0, w1
-	bne	.L1557
-	.loc 3 1141 0 is_stmt 0 discriminator 1
-	ldrh	w1, [x21]
-	cmp	w1, w0
-	bne	.L1557
-	.loc 3 1142 0 is_stmt 1
-	mov	w0, 0
-	bl	List_get_gc_head_node
-.LVL2022:
-	bl	FtlGcRefreshBlock
-.LVL2023:
-.L1557:
-	.loc 3 1143 0
-	mov	w0, 128
-	.loc 3 1145 0
-	mov	w1, 1
-	.loc 3 1143 0
-	strh	w0, [x20]
-	.loc 3 1144 0
-	strh	w0, [x19]
-	.loc 3 1145 0
-	mov	w0, w1
-	bl	rk_ftl_garbage_collect
-.LVL2024:
-	.loc 3 1146 0
-	mov	w1, 1
-	mov	w0, 0
-	bl	rk_ftl_garbage_collect
-.LVL2025:
-	.loc 3 1147 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR48]
-	cmp	w0, 8
-	bls	.L1576
-	b	.L1553
-.LVL2026:
-.L1519:
-	.loc 3 987 0
-	adrp	x3, .LANCHOR66
-	ldr	w0, [x3, #:lo12:.LANCHOR66]
-	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR66]
-	.loc 3 988 0
-	msub	w0, w21, w1, w22
-.LVL2027:
-	.loc 3 992 0
-	ldr	x3, [x2, 8]
-	.loc 3 989 0
-	sub	w1, w1, w0
-.LVL2028:
-	cmp	w25, w1
-	.loc 3 992 0
-	lsl	w0, w0, 9
-.LVL2029:
-	csel	w19, w25, w1, ls
-.LVL2030:
-	add	x0, x3, x0
-	lsl	w20, w19, 9
-	mov	x1, x26
-	mov	w2, w20
-	bl	ftl_memcpy
-.LVL2031:
-	.loc 3 994 0
-	cbnz	w23, .L1520
-.LVL2032:
-.L1553:
-	.loc 3 995 0
-	mov	w0, 0
-	b	.L1515
-.LVL2033:
-.L1520:
-	.loc 3 996 0
-	sub	w25, w25, w19
-.LVL2034:
-	.loc 3 997 0
-	add	w22, w22, w19
-.LVL2035:
-	.loc 3 998 0
-	add	x26, x26, x20
 .LVL2036:
-	.loc 3 999 0
-	add	w21, w21, 1
+	.loc 3 1133 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	mov	x3, x19
+	mov	w2, 0
+	mov	w1, w27
+	bl	FtlProgPages
 .LVL2037:
-	.loc 3 1000 0
-	bl	FtlCacheWriteBack
+	.loc 3 1134 0
+	cmp	w26, w27
+	bcs	.L1551
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1134
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
 .LVL2038:
-	mov	w24, w23
-	b	.L1518
+.L1551:
+	.loc 3 1135 0 is_stmt 1
+	sub	w26, w26, w27
 .LVL2039:
+	b	.L1522
+.LVL2040:
 .L1525:
 	.loc 3 1027 0
 	ldr	x1, [x29, 152]
 	str	wzr, [x1, #:lo12:.LANCHOR179]
 	.loc 3 1028 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1563
+	cbnz	w1, .L1561
 	.loc 3 1029 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2040:
+.LVL2041:
 	b	.L1527
-.L1563:
+.L1561:
 	mov	x19, x0
-.LVL2041:
-	b	.L1524
 .LVL2042:
+	b	.L1524
+.LVL2043:
 .L1550:
 	.loc 3 1047 0
 	ldrh	w0, [x19, 4]
@@ -19774,21 +19790,20 @@ FtlWrite:
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2043:
+.LVL2044:
 	.loc 3 1052 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2044:
+.LVL2045:
 	ldr	x1, [x29, 184]
 	lsl	x23, x1, 5
 	.loc 3 1054 0
-	adrp	x1, .LANCHOR122
-	ldr	x1, [x1, #:lo12:.LANCHOR122]
+	ldr	x1, [x28, #:lo12:.LANCHOR122]
 	add	x1, x1, x23
 	str	w0, [x1, 4]
 	.loc 3 1055 0
 	ldr	x0, [x29, 112]
-.LVL2045:
+.LVL2046:
 	.loc 3 1056 0
 	str	w20, [x1, 24]
 	.loc 3 1055 0
@@ -19801,14 +19816,14 @@ FtlWrite:
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	str	x0, [x29, 136]
 	add	x27, x0, x3
-.LVL2046:
+.LVL2047:
 	str	x27, [x1, 16]
 	.loc 3 1059 0
 	mov	x0, x27
 	mov	w1, 0
-.LVL2047:
-	bl	ftl_memset
 .LVL2048:
+	bl	ftl_memset
+.LVL2049:
 	.loc 3 1061 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w21
@@ -19823,14 +19838,14 @@ FtlWrite:
 	udiv	w0, w22, w2
 	msub	w0, w0, w2, w22
 	str	w0, [x29, 164]
-.LVL2049:
+.LVL2050:
 	.loc 3 1064 0
 	sub	w2, w2, w0
-	cmp	w2, w25
-	csel	w0, w2, w25, ls
-.LVL2050:
-	str	w0, [x29, 172]
+	cmp	w2, w24
+	csel	w0, w2, w24, ls
 .LVL2051:
+	str	w0, [x29, 172]
+.LVL2052:
 .L1533:
 	.loc 3 1072 0
 	ldr	x0, [x29, 176]
@@ -19847,11 +19862,11 @@ FtlWrite:
 	cmp	w20, w21
 	bne	.L1535
 	.loc 3 1074 0
-	str	x26, [x23, 8]
-.LVL2052:
+	str	x25, [x23, 8]
+.LVL2053:
 .L1536:
 	.loc 3 1119 0
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 128]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
@@ -19863,7 +19878,7 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2053:
+.LVL2054:
 .L1547:
 	.loc 3 1120 0 is_stmt 1
 	ldp	x1, x2, [x29, 136]
@@ -19876,7 +19891,7 @@ FtlWrite:
 	stp	w0, w20, [x27, 4]
 	.loc 3 1125 0
 	add	w20, w20, 1
-.LVL2054:
+.LVL2055:
 	.loc 3 1121 0
 	add	w0, w0, 1
 	cmn	w0, #1
@@ -19892,11 +19907,11 @@ FtlWrite:
 	add	x0, x0, 1
 	str	x0, [x29, 184]
 	b	.L1529
-.LVL2055:
+.LVL2056:
 .L1532:
 	.loc 3 1069 0
 	ldr	x0, [x29, 176]
-	add	w2, w22, w25
+	add	w2, w22, w24
 	.loc 3 1068 0
 	str	wzr, [x29, 164]
 	.loc 3 1069 0
@@ -19904,22 +19919,22 @@ FtlWrite:
 	msub	w2, w20, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 172]
-.LVL2056:
-	b	.L1533
 .LVL2057:
+	b	.L1533
+.LVL2058:
 .L1535:
 	.loc 3 1076 0
 	ldr	w0, [x29, 172]
-.LVL2058:
-.L1579:
+.LVL2059:
+.L1574:
 	.loc 3 1117 0
 	mul	w0, w0, w20
 	sub	w0, w0, w22
 	lsl	w0, w0, 9
-	add	x0, x26, x0
+	add	x0, x25, x0
 	str	x0, [x23, 8]
 	b	.L1536
-.LVL2059:
+.LVL2060:
 .L1534:
 	.loc 3 1080 0
 	add	x0, x0, x23
@@ -19929,7 +19944,7 @@ FtlWrite:
 	.loc 3 1080 0
 	adrp	x1, .LANCHOR116
 	ldr	x1, [x1, #:lo12:.LANCHOR116]
-.L1578:
+.L1573:
 	.loc 3 1082 0
 	str	x1, [x0, 8]
 	.loc 3 1084 0
@@ -19954,7 +19969,7 @@ FtlWrite:
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2060:
+.LVL2061:
 	.loc 3 1091 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
@@ -19977,11 +19992,11 @@ FtlWrite:
 	ldr	w0, [x29, 164]
 	add	x1, x1, x23
 	lsl	w0, w0, 9
-	ldr	x4, [x1, 8]
-	mov	x1, x26
-	add	x0, x4, x0
+	ldr	x3, [x1, 8]
+	mov	x1, x25
+	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL2061:
+.LVL2062:
 	.loc 3 1109 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w0
@@ -19993,7 +20008,7 @@ FtlWrite:
 	.loc 3 1111 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
-	ldr	x0, [x29, 128]
+	ldr	x0, [x29, 120]
 	str	x23, [x0, #:lo12:.LANCHOR150]
 	.loc 3 1112 0
 	adrp	x0, .LANCHOR171
@@ -20003,7 +20018,7 @@ FtlWrite:
 	.loc 3 1082 0
 	adrp	x1, .LANCHOR114
 	ldr	x1, [x1, #:lo12:.LANCHOR114]
-	b	.L1578
+	b	.L1573
 .L1540:
 .LBB299:
 	.loc 3 1094 0
@@ -20021,7 +20036,7 @@ FtlWrite:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.LVL2062:
+.LVL2063:
 .L1542:
 	.loc 3 1098 0
 	ldr	w0, [x27, 8]
@@ -20034,20 +20049,20 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2063:
-	b	.L1543
 .LVL2064:
+	b	.L1543
+.LVL2065:
 .L1539:
 .LBE299:
 	.loc 3 1101 0 is_stmt 1
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
-	adrp	x1, .LANCHOR23
+	ldr	x1, [x29, 104]
 	add	x0, x0, x23
-	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	ldrh	w2, [x1]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2065:
+.LVL2066:
 	b	.L1543
 .L1544:
 	.loc 3 1107 0
@@ -20059,47 +20074,20 @@ FtlWrite:
 	ldr	x0, [x0, 8]
 	sub	w1, w1, w22
 	lsl	w1, w1, 9
-	add	x1, x26, x1
+	add	x1, x25, x1
 	bl	ftl_memcpy
-.LVL2066:
-	b	.L1545
 .LVL2067:
+	b	.L1545
+.LVL2068:
 .L1531:
 	.loc 3 1117 0
-	adrp	x0, .LANCHOR122
-	ldr	x0, [x0, #:lo12:.LANCHOR122]
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1579
-.LVL2068:
-.L1551:
-	.loc 3 1133 0
-	adrp	x0, .LANCHOR122
-	mov	x3, x19
-	mov	w2, 0
-	mov	w1, w27
-	ldr	x0, [x0, #:lo12:.LANCHOR122]
-	bl	FtlProgPages
+	b	.L1574
 .LVL2069:
-	.loc 3 1134 0
-	cmp	w24, w27
-	bcs	.L1554
-	.loc 3 1134 0 is_stmt 0 discriminator 1
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC1
-	mov	w2, 1134
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC1
-	bl	printf
-.LVL2070:
-.L1554:
-	.loc 3 1135 0 is_stmt 1
-	sub	w24, w24, w27
-.LVL2071:
-	b	.L1522
-.LVL2072:
-.L1558:
+.L1556:
 	.loc 3 975 0
 	mov	w0, -1
 	b	.L1515
@@ -20114,17 +20102,17 @@ sftl_write:
 .LFB220:
 	.loc 3 1209 0
 	.cfi_startproc
-.LVL2073:
+.LVL2070:
 	.loc 3 1210 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2074:
+.LVL2071:
 	mov	w1, w0
-.LVL2075:
+.LVL2072:
 	mov	w0, 0
-.LVL2076:
+.LVL2073:
 	b	FtlWrite
-.LVL2077:
+.LVL2074:
 	.cfi_endproc
 .LFE220:
 	.size	sftl_write, .-sftl_write
@@ -20190,16 +20178,16 @@ FtlLoadSysInfo:
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2078:
+.LVL2075:
 	.loc 2 1369 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1582
-.L1590:
+	bne	.L1577
+.L1585:
 	.loc 2 1370 0
 	mov	w0, -1
-.L1581:
+.L1576:
 	.loc 2 1463 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -20222,15 +20210,15 @@ FtlLoadSysInfo:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1582:
+.L1577:
 	.cfi_restore_state
 	add	x27, x20, :lo12:.LANCHOR81
 	.loc 2 1372 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2079:
+.LVL2076:
 	sxth	w22, w0
-.LVL2080:
+.LVL2077:
 	.loc 2 1373 0
 	add	w0, w0, 1
 	.loc 2 1382 0
@@ -20240,9 +20228,9 @@ FtlLoadSysInfo:
 	.loc 2 1381 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1584:
+.L1579:
 	.loc 2 1375 0
-	tbz	w22, #31, .L1587
+	tbz	w22, #31, .L1582
 	.loc 2 1388 0
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20250,15 +20238,15 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2081:
-.L1586:
+.LVL2078:
+.L1581:
 	.loc 2 1390 0
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1589
+	bcs	.L1584
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20266,18 +20254,18 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2082:
-.L1589:
+.LVL2079:
+.L1584:
 	.loc 2 1392 0 is_stmt 1
 	add	x22, x19, :lo12:.LANCHOR108
-.LVL2083:
+.LVL2080:
 	adrp	x19, .LANCHOR79
 	add	x21, x19, :lo12:.LANCHOR79
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2084:
+.LVL2081:
 	.loc 2 1393 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
@@ -20285,7 +20273,7 @@ FtlLoadSysInfo:
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2085:
+.LVL2082:
 	.loc 2 1394 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
@@ -20298,13 +20286,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2086:
+.LVL2083:
 	.loc 2 1396 0
 	ldr	w1, [x19, #:lo12:.LANCHOR79]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1590
+	bne	.L1585
 	.loc 2 1399 0
 	add	x20, x20, :lo12:.LANCHOR81
 	.loc 2 1400 0
@@ -20318,7 +20306,7 @@ FtlLoadSysInfo:
 	strh	w1, [x20, 6]
 	.loc 2 1400 0
 	cmp	w2, w0
-	bne	.L1590
+	bne	.L1585
 	.loc 2 1403 0
 	adrp	x0, .LANCHOR182
 	.loc 2 1404 0
@@ -20355,7 +20343,7 @@ FtlLoadSysInfo:
 	adrp	x3, .LANCHOR80
 	strh	w0, [x3, #:lo12:.LANCHOR80]
 	.loc 2 1412 0
-	bls	.L1591
+	bls	.L1586
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20363,8 +20351,8 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2087:
-.L1591:
+.LVL2084:
+.L1586:
 	.loc 2 1414 0 is_stmt 1
 	add	x1, x19, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR51
@@ -20464,64 +20452,64 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR71
 	ldr	w5, [x1, #:lo12:.LANCHOR71]
 	cmp	w3, w5
-	bls	.L1592
+	bls	.L1587
 	.loc 2 1445 0
 	str	w3, [x1, #:lo12:.LANCHOR71]
-.L1592:
+.L1587:
 	.loc 2 1447 0
 	add	x19, x19, :lo12:.LANCHOR79
 	adrp	x1, .LANCHOR72
 	ldr	w3, [x1, #:lo12:.LANCHOR72]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1593
+	bls	.L1588
 	.loc 2 1448 0
 	str	w2, [x1, #:lo12:.LANCHOR72]
-.L1593:
+.L1588:
 	.loc 2 1450 0
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1594
+	beq	.L1589
 	.loc 2 1451 0
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2088:
-.L1594:
+.LVL2085:
+.L1589:
 	.loc 2 1453 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1595
+	beq	.L1590
 	.loc 2 1454 0
 	bl	make_superblock
-.LVL2089:
-.L1595:
+.LVL2086:
+.L1590:
 	.loc 2 1456 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1596
+	beq	.L1591
 	.loc 2 1457 0
 	bl	make_superblock
-.LVL2090:
-.L1596:
+.LVL2087:
+.L1591:
 	.loc 2 1459 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR82]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR82
 	cmp	w2, w1
-	beq	.L1597
+	beq	.L1592
 	.loc 2 1460 0
 	bl	make_superblock
-.LVL2091:
-.L1597:
+.LVL2088:
+.L1592:
 	.loc 2 1462 0
 	mov	w0, 0
-	b	.L1581
-.LVL2092:
-.L1587:
+	b	.L1576
+.LVL2089:
+.L1582:
 	.loc 2 1376 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	.loc 2 1378 0
@@ -20536,29 +20524,29 @@ FtlLoadSysInfo:
 	.loc 2 1378 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2093:
+.LVL2090:
 	.loc 2 1381 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1585
+	beq	.L1580
 	.loc 2 1382 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 1381 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1585
+	bne	.L1580
 	.loc 2 1383 0
 	ldr	x0, [x26, #:lo12:.LANCHOR109]
 	ldrh	w0, [x0]
 	.loc 2 1382 0
 	cmp	w0, w28
-	beq	.L1586
-.L1585:
+	beq	.L1581
+.L1580:
 	sub	w22, w22, #1
-.LVL2094:
+.LVL2091:
 	sxth	w22, w22
-.LVL2095:
-	b	.L1584
+.LVL2092:
+	b	.L1579
 	.cfi_endproc
 .LFE274:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -20598,20 +20586,20 @@ FtlSysBlkInit:
 	strh	wzr, [x20, #:lo12:.LANCHOR162]
 	.loc 2 2312 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2096:
+.LVL2093:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL2097:
+.LVL2094:
 	.loc 2 2314 0
 	adrp	x0, .LANCHOR81
 	ldrh	w1, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1604
-.L1606:
+	bne	.L1599
+.L1601:
 	.loc 2 2315 0
 	mov	w23, -1
-.L1603:
+.L1598:
 	.loc 2 2398 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
@@ -20629,38 +20617,38 @@ FtlSysBlkInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1604:
+.L1599:
 	.cfi_restore_state
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL2098:
+.LVL2095:
 	mov	w23, w0
-	cbnz	w0, .L1606
+	cbnz	w0, .L1601
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL2099:
+.LVL2096:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL2100:
+.LVL2097:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL2101:
+.LVL2098:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL2102:
+.LVL2099:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL2103:
+.LVL2100:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL2104:
+.LVL2101:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL2105:
+.LVL2102:
 	.loc 2 2330 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2106:
+.LVL2103:
 .LBB303:
 .LBB304:
 	.loc 2 2332 0
@@ -20672,14 +20660,14 @@ FtlSysBlkInit:
 	.loc 2 2332 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1607:
-.LVL2107:
+.L1602:
+.LVL2104:
 	cmp	w0, w2
-	bge	.L1612
+	bge	.L1607
 	.loc 2 2333 0
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1608
-.L1612:
+	tbz	w3, #31, .L1603
+.L1607:
 	.loc 2 2336 0
 	adrp	x19, .LANCHOR79
 	add	x3, x19, :lo12:.LANCHOR79
@@ -20691,9 +20679,9 @@ FtlSysBlkInit:
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
 	.loc 2 2338 0
-	bge	.L1618
-.LVL2108:
-.L1609:
+	bge	.L1613
+.LVL2105:
+.L1604:
 	.loc 2 2339 0
 	add	x21, x22, :lo12:.LANCHOR51
 	.loc 2 2340 0
@@ -20704,11 +20692,11 @@ FtlSysBlkInit:
 	add	x20, x24, :lo12:.LANCHOR52
 	.loc 2 2339 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2109:
+.LVL2106:
 	.loc 2 2340 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2110:
+.LVL2107:
 .LBB305:
 	.loc 2 2346 0
 	adrp	x0, .LANCHOR43
@@ -20731,7 +20719,7 @@ FtlSysBlkInit:
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
 	.loc 2 2349 0
 	strh	wzr, [x21, 4]
-.LVL2111:
+.LVL2108:
 	.loc 2 2352 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
@@ -20750,12 +20738,12 @@ FtlSysBlkInit:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2112:
+.LVL2109:
 	.loc 2 2360 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2113:
+.LVL2110:
 	.loc 2 2372 0
 	add	x1, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x1, 30]
@@ -20763,65 +20751,65 @@ FtlSysBlkInit:
 	strh	w0, [x1, 30]
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2114:
+.LVL2111:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2115:
+.LVL2112:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2116:
-	b	.L1613
-.LVL2117:
-.L1608:
+.LVL2113:
+	b	.L1608
+.LVL2114:
+.L1603:
 	.loc 2 2332 0
 	add	w0, w0, 1
-.LVL2118:
-	b	.L1607
-.L1618:
+.LVL2115:
+	b	.L1602
+.L1613:
 	.loc 2 2338 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR162]
-.LVL2119:
-	cbnz	w0, .L1609
-.L1613:
+.LVL2116:
+	cbnz	w0, .L1604
+.L1608:
 	.loc 2 2379 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	add	x21, x22, :lo12:.LANCHOR51
 	cmp	w0, w1
-	beq	.L1614
+	beq	.L1609
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1614
+	cbnz	w1, .L1609
 	.loc 2 2381 0
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
 	.loc 2 2380 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1614
+	cbnz	w1, .L1609
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2120:
+.LVL2117:
 	.loc 2 2383 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2121:
+.LVL2118:
 	.loc 2 2384 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2122:
+.LVL2119:
 	.loc 2 2385 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2123:
-.L1614:
+.LVL2120:
+.L1609:
 	.loc 2 2390 0
 	add	x19, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1603
+	bne	.L1598
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2124:
-	b	.L1603
+.LVL2121:
+	b	.L1598
 .LBE304:
 .LBE303:
 	.cfi_endproc
@@ -20870,15 +20858,15 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR71]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2125:
+.LVL2122:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2126:
-	cbz	w0, .L1621
+.LVL2123:
+	cbz	w0, .L1616
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2127:
-.L1621:
+.LVL2124:
+.L1616:
 	.loc 3 635 0 discriminator 1
 	adrp	x23, .LANCHOR12
 	.loc 3 636 0 discriminator 1
@@ -20898,12 +20886,12 @@ ftl_low_format:
 	.loc 3 637 0 discriminator 1
 	ldr	x5, [x0, #:lo12:.LANCHOR114]
 	mov	w0, 0
-.L1622:
-.LVL2128:
+.L1617:
+.LVL2125:
 	.loc 3 635 0 discriminator 1
 	cmp	w0, w1
-	blt	.L1623
-.LVL2129:
+	blt	.L1618
+.LVL2126:
 	.loc 3 642 0
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
@@ -20912,32 +20900,32 @@ ftl_low_format:
 	mov	w19, 0
 	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2130:
-.L1624:
+.LVL2127:
+.L1619:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1625
+	bhi	.L1620
 	.loc 3 645 0 is_stmt 1
 	adrp	x25, .LANCHOR3
-.LVL2131:
+.LVL2128:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1626
-.LVL2132:
-.L1630:
+	bgt	.L1621
+.LVL2129:
+.L1625:
 	.loc 3 656 0
 	add	x26, x21, :lo12:.LANCHOR5
 	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1627:
-.LVL2133:
+.L1622:
+.LVL2130:
 	.loc 3 656 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1631
+	bhi	.L1626
 	.loc 3 658 0
 	adrp	x0, .LANCHOR113
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
@@ -20963,7 +20951,7 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1632
+	ble	.L1627
 	.loc 3 664 0
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
@@ -20972,11 +20960,11 @@ ftl_low_format:
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1632:
+.L1627:
 	.loc 3 668 0
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1634
+	cbz	w1, .L1629
 	.loc 3 669 0
 	ldrh	w6, [x2, #:lo12:.LANCHOR80]
 	add	w6, w6, w1, lsr 1
@@ -20984,7 +20972,7 @@ ftl_low_format:
 	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1634
+	bge	.L1629
 	.loc 3 672 0
 	add	w1, w1, 32
 	.loc 3 671 0
@@ -20992,14 +20980,14 @@ ftl_low_format:
 	.loc 3 672 0
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1634:
+.L1629:
 	.loc 3 677 0
 	ldrh	w1, [x2, #:lo12:.LANCHOR80]
 	adrp	x25, .LANCHOR182
 	ldr	w0, [x3, #:lo12:.LANCHOR62]
 	.loc 3 687 0
 	adrp	x24, .LANCHOR43
-.LVL2134:
+.LVL2131:
 	.loc 3 677 0
 	sub	w0, w0, w1
 	.loc 3 678 0
@@ -21022,14 +21010,14 @@ ftl_low_format:
 	str	w0, [x1, #:lo12:.LANCHOR34]
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2135:
+.LVL2132:
 	.loc 3 687 0
 	ldr	x0, [x24, #:lo12:.LANCHOR43]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2136:
+.LVL2133:
 	.loc 3 688 0
 	adrp	x0, .LANCHOR60
 	.loc 3 689 0
@@ -21053,7 +21041,7 @@ ftl_low_format:
 	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2137:
+.LVL2134:
 	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
 	.loc 3 697 0
@@ -21069,16 +21057,16 @@ ftl_low_format:
 	strb	wzr, [x19, 6]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL2138:
-.L1636:
+.LVL2135:
+.L1631:
 	.loc 3 701 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2139:
+.LVL2136:
 	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1637
+	cbnz	w1, .L1632
 	.loc 3 705 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21088,101 +21076,101 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 707 0
-	b	.L1636
-.LVL2140:
-.L1623:
+	b	.L1631
+.LVL2137:
+.L1618:
 	.loc 3 636 0 discriminator 3
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2141:
+.LVL2138:
 	and	w0, w0, 65535
-.LVL2142:
+.LVL2139:
 	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
 	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1622
-.LVL2143:
-.L1625:
+	b	.L1617
+.LVL2140:
+.L1620:
 	.loc 3 643 0 discriminator 3
 	mov	w0, w25
 	mov	w1, 1
 	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2144:
+.LVL2141:
 	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2145:
+.LVL2142:
 	add	w19, w19, w0
-.LVL2146:
+.LVL2143:
 	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
 	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2147:
-	b	.L1624
-.LVL2148:
-.L1626:
+.LVL2144:
+	b	.L1619
+.LVL2145:
+.L1621:
 	.loc 3 647 0
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2149:
+.LVL2146:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2150:
+.LVL2147:
 	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
 	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2151:
+.LVL2148:
 	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2152:
-.L1628:
+.LVL2149:
+.L1623:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1630
+	bls	.L1625
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2153:
+.LVL2150:
 	.loc 3 651 0 discriminator 3
 	mov	w1, 1
 	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2154:
-	b	.L1628
-.LVL2155:
-.L1631:
+.LVL2151:
+	b	.L1623
+.LVL2152:
+.L1626:
 	.loc 3 657 0 discriminator 3
 	mov	w0, w24
 	mov	w1, 0
 	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2156:
+.LVL2153:
 	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2157:
+.LVL2154:
 	add	w19, w19, w0
-.LVL2158:
+.LVL2155:
 	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
 	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2159:
-	b	.L1627
-.LVL2160:
-.L1637:
+.LVL2156:
+	b	.L1622
+.LVL2157:
+.L1632:
 	.loc 3 709 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 710 0
@@ -21217,15 +21205,15 @@ ftl_low_format:
 	strb	wzr, [x0, 6]
 	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1638:
+.L1633:
 	.loc 3 717 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2161:
+.LVL2158:
 	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1639
+	cbnz	w1, .L1634
 	.loc 3 721 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21235,8 +21223,8 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 723 0
-	b	.L1638
-.L1639:
+	b	.L1633
+.L1634:
 	.loc 3 725 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 726 0
@@ -21257,7 +21245,7 @@ ftl_low_format:
 	strh	w4, [x0, #:lo12:.LANCHOR53]
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2162:
+.LVL2159:
 	adrp	x2, .LANCHOR81
 	add	x1, x2, :lo12:.LANCHOR81
 	strh	w0, [x2, #:lo12:.LANCHOR81]
@@ -21276,16 +21264,16 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR71]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2163:
+.LVL2160:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2164:
-	cbnz	w0, .L1640
+.LVL2161:
+	cbnz	w0, .L1635
 	.loc 3 737 0
 	adrp	x0, .LANCHOR88
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR88]
-.L1640:
+.L1635:
 	.loc 3 739 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -21316,7 +21304,7 @@ sftl_init:
 .LFB211:
 	.loc 3 743 0
 	.cfi_startproc
-.LVL2165:
+.LVL2162:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -21338,32 +21326,32 @@ sftl_init:
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2166:
+.LVL2163:
 	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2167:
+.LVL2164:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2168:
+.LVL2165:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2169:
+.LVL2166:
 	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2170:
+.LVL2167:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2171:
-	cbnz	w0, .L1649
+.LVL2168:
+	cbnz	w0, .L1644
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2172:
-	cbnz	w0, .L1649
+.LVL2169:
+	cbnz	w0, .L1644
 	.loc 3 779 0
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR88]
@@ -21371,22 +21359,22 @@ sftl_init:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1649
+	bhi	.L1644
 	mov	w19, 8129
-.L1648:
-.LVL2173:
+.L1643:
+.LVL2170:
 .LBB306:
 	.loc 3 786 0 discriminator 3
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2174:
+.LVL2171:
 	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2175:
-	bne	.L1648
-.LVL2176:
-.L1649:
+.LVL2172:
+	bne	.L1643
+.LVL2173:
+.L1644:
 .LBE306:
 	.loc 3 794 0
 	mov	w0, 0
@@ -21408,11 +21396,11 @@ ftl_memcmp:
 .LFB348:
 	.loc 1 252 0
 	.cfi_startproc
-.LVL2177:
+.LVL2174:
 	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2178:
+.LVL2175:
 	.cfi_endproc
 .LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
@@ -23128,7 +23116,7 @@ __func__.7632:
 	.file 31 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0xa973
+	.4byte	0xa977
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
@@ -27342,8 +27330,8 @@ __func__.7632:
 	.4byte	0x30
 	.4byte	.LLST472
 	.uleb128 0x2f
-	.8byte	.LVL2178
-	.4byte	0xa926
+	.8byte	.LVL2175
+	.4byte	0xa92a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27400,7 +27388,7 @@ __func__.7632:
 	.4byte	.LLST307
 	.uleb128 0x2f
 	.8byte	.LVL1243
-	.4byte	0xa931
+	.4byte	0xa935
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27457,7 +27445,7 @@ __func__.7632:
 	.4byte	.LLST200
 	.uleb128 0x2f
 	.8byte	.LVL740
-	.4byte	0xa93d
+	.4byte	0xa941
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27689,7 +27677,7 @@ __func__.7632:
 	.4byte	.LLST183
 	.uleb128 0x36
 	.8byte	.LVL671
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27824,7 +27812,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL660
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2906
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27835,7 +27823,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL661
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2925
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27846,7 +27834,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL662
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27857,7 +27845,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL650
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x296c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27880,7 +27868,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL651
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27984,7 +27972,7 @@ __func__.7632:
 	.8byte	__func__.7615
 	.uleb128 0x34
 	.8byte	.LVL604
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2a7a
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28007,7 +27995,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL605
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28150,7 +28138,7 @@ __func__.7632:
 	.4byte	.LLST153
 	.uleb128 0x44
 	.8byte	.LVL589
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2bd8
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28161,7 +28149,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL590
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2bfc
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28184,10 +28172,10 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL591
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x36
 	.8byte	.LVL594
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28217,7 +28205,7 @@ __func__.7632:
 	.4byte	.LLST144
 	.uleb128 0x2f
 	.8byte	.LVL581
-	.4byte	0xa954
+	.4byte	0xa958
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28264,7 +28252,7 @@ __func__.7632:
 	.4byte	.LLST143
 	.uleb128 0x2f
 	.8byte	.LVL579
-	.4byte	0xa95f
+	.4byte	0xa963
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28534,7 +28522,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL568
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x2f5e
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28578,7 +28566,7 @@ __func__.7632:
 	.4byte	.LLST138
 	.uleb128 0x36
 	.8byte	.LVL561
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28682,7 +28670,7 @@ __func__.7632:
 	.4byte	0x313f
 	.uleb128 0x45
 	.8byte	.LVL1825
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x34
 	.8byte	.LVL1826
 	.4byte	0x3320
@@ -29019,10 +29007,10 @@ __func__.7632:
 	.4byte	0x7342
 	.uleb128 0x45
 	.8byte	.LVL1779
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x34
 	.8byte	.LVL1780
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3450
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29065,7 +29053,7 @@ __func__.7632:
 	.4byte	0x5694
 	.uleb128 0x34
 	.8byte	.LVL1789
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x34ba
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29330,7 +29318,7 @@ __func__.7632:
 	.8byte	__func__.7175
 	.uleb128 0x34
 	.8byte	.LVL1341
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x373f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29352,7 +29340,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1346
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3772
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29378,7 +29366,7 @@ __func__.7632:
 	.4byte	0x37c4
 	.uleb128 0x36
 	.8byte	.LVL1349
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29470,7 +29458,7 @@ __func__.7632:
 	.8byte	__func__.7155
 	.uleb128 0x34
 	.8byte	.LVL508
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x389c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29493,7 +29481,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL509
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x38cf
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29516,7 +29504,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL510
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3902
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29539,7 +29527,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL514
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29590,7 +29578,7 @@ __func__.7632:
 	.8byte	__func__.7148
 	.uleb128 0x34
 	.8byte	.LVL1703
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x39ba
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29753,7 +29741,7 @@ __func__.7632:
 	.4byte	.LLST319
 	.uleb128 0x36
 	.8byte	.LVL1297
-	.4byte	0x979b
+	.4byte	0x979f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29768,7 +29756,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1269
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3b80
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29802,7 +29790,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1275
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3bd2
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29847,7 +29835,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1278
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3c35
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29870,7 +29858,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1281
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3c68
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29893,7 +29881,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1283
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3c9b
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29916,7 +29904,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1284
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x3cce
 	.uleb128 0x30
 	.uleb128 0x1
@@ -29994,7 +29982,7 @@ __func__.7632:
 	.4byte	0x75ef
 	.uleb128 0x36
 	.8byte	.LVL1306
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30097,7 +30085,7 @@ __func__.7632:
 	.4byte	0x3edd
 	.uleb128 0x36
 	.8byte	.LVL495
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30264,7 +30252,7 @@ __func__.7632:
 	.4byte	.LLST252
 	.uleb128 0x34
 	.8byte	.LVL956
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4032
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30303,7 +30291,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL960
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x407b
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30341,7 +30329,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL963
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30414,7 +30402,7 @@ __func__.7632:
 	.4byte	.LLST287
 	.uleb128 0x36
 	.8byte	.LVL1165
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30431,7 +30419,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1143
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x41a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30471,7 +30459,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1152
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x41fc
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30519,7 +30507,7 @@ __func__.7632:
 	.4byte	0x6d71
 	.uleb128 0x36
 	.8byte	.LVL1159
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30586,7 +30574,7 @@ __func__.7632:
 	.8byte	__func__.7027
 	.uleb128 0x34
 	.8byte	.LVL1683
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x42f7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30639,7 +30627,7 @@ __func__.7632:
 	.4byte	0x6d71
 	.uleb128 0x34
 	.8byte	.LVL1694
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x435e
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30920,7 +30908,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1139
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30986,7 +30974,7 @@ __func__.7632:
 	.8byte	__func__.6981
 	.uleb128 0x34
 	.8byte	.LVL278
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x46a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31559,7 +31547,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1399
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4bcd
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31582,7 +31570,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1400
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4c00
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31716,7 +31704,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1478
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4d1c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31774,7 +31762,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1503
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4d7f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31875,7 +31863,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL945
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x4e92
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32306,7 +32294,7 @@ __func__.7632:
 	.byte	0x3
 	.8byte	__func__.6827
 	.uleb128 0x34
-	.8byte	.LVL2078
+	.8byte	.LVL2075
 	.4byte	0x259f
 	.4byte	0x525d
 	.uleb128 0x30
@@ -32316,7 +32304,7 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2079
+	.8byte	.LVL2076
 	.4byte	0x6c45
 	.4byte	0x5274
 	.uleb128 0x30
@@ -32326,8 +32314,8 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2081
-	.4byte	0xa949
+	.8byte	.LVL2078
+	.4byte	0xa94d
 	.4byte	0x52a7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32349,8 +32337,8 @@ __func__.7632:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2082
-	.4byte	0xa949
+	.8byte	.LVL2079
+	.4byte	0xa94d
 	.4byte	0x52da
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32372,7 +32360,7 @@ __func__.7632:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2084
+	.8byte	.LVL2081
 	.4byte	0x2527
 	.4byte	0x52f8
 	.uleb128 0x30
@@ -32389,14 +32377,14 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2085
+	.8byte	.LVL2082
 	.4byte	0x2527
 	.uleb128 0x45
-	.8byte	.LVL2086
+	.8byte	.LVL2083
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0xa949
+	.8byte	.LVL2084
+	.4byte	0xa94d
 	.4byte	0x5345
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32418,7 +32406,7 @@ __func__.7632:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2088
+	.8byte	.LVL2085
 	.4byte	0x460e
 	.4byte	0x5364
 	.uleb128 0x30
@@ -32429,7 +32417,7 @@ __func__.7632:
 	.8byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2089
+	.8byte	.LVL2086
 	.4byte	0x460e
 	.4byte	0x5383
 	.uleb128 0x30
@@ -32440,7 +32428,7 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2090
+	.8byte	.LVL2087
 	.4byte	0x460e
 	.4byte	0x53a2
 	.uleb128 0x30
@@ -32451,7 +32439,7 @@ __func__.7632:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2091
+	.8byte	.LVL2088
 	.4byte	0x460e
 	.4byte	0x53c1
 	.uleb128 0x30
@@ -32462,7 +32450,7 @@ __func__.7632:
 	.8byte	.LANCHOR82
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2093
+	.8byte	.LVL2090
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32710,7 +32698,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1015
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x561f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32734,7 +32722,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1026
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x564d
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32768,7 +32756,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1039
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32929,7 +32917,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1675
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x57fe
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32952,7 +32940,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1678
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5823
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33488,7 +33476,7 @@ __func__.7632:
 	.8byte	.L657
 	.uleb128 0x34
 	.8byte	.LVL922
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5d0e
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33615,7 +33603,7 @@ __func__.7632:
 	.8byte	__func__.6658
 	.uleb128 0x36
 	.8byte	.LVL237
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33738,7 +33726,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL874
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5f87
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33761,7 +33749,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL875
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x5fb3
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33825,7 +33813,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL882
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x6015
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33836,7 +33824,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL883
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33910,7 +33898,7 @@ __func__.7632:
 	.8byte	__func__.6619
 	.uleb128 0x34
 	.8byte	.LVL852
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x610b
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34121,7 +34109,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL905
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x62e7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34328,7 +34316,7 @@ __func__.7632:
 	.8byte	__func__.6562
 	.uleb128 0x34
 	.8byte	.LVL813
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x64e3
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34383,7 +34371,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL822
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x6548
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34443,7 +34431,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL825
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34668,7 +34656,7 @@ __func__.7632:
 	.8byte	__func__.6521
 	.uleb128 0x36
 	.8byte	.LVL164
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35770,7 +35758,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1531
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x7258
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35793,7 +35781,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL1532
-	.4byte	0x8b8f
+	.4byte	0x8b93
 	.uleb128 0x34
 	.8byte	.LVL1540
 	.4byte	0x29a4
@@ -35968,7 +35956,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1250
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x7400
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36046,7 +36034,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1255
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x7489
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36057,7 +36045,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1256
-	.4byte	0xa949
+	.4byte	0xa94d
 	.4byte	0x74ae
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36126,7 +36114,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL803
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36253,7 +36241,7 @@ __func__.7632:
 	.4byte	.LLST15
 	.uleb128 0x36
 	.8byte	.LVL44
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36310,7 +36298,7 @@ __func__.7632:
 	.4byte	0x770c
 	.4byte	.LLST462
 	.uleb128 0x2f
-	.8byte	.LVL2077
+	.8byte	.LVL2074
 	.4byte	0x78b7
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36373,7 +36361,7 @@ __func__.7632:
 	.4byte	.LLST444
 	.uleb128 0x2f
 	.8byte	.LVL1984
-	.4byte	0x7fd9
+	.4byte	0x7fdd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36466,7 +36454,7 @@ __func__.7632:
 	.4byte	.LLST405
 	.uleb128 0x45
 	.8byte	.LVL1746
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x45
 	.8byte	.LVL1755
 	.4byte	0x5d63
@@ -36533,7 +36521,7 @@ __func__.7632:
 	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
@@ -36650,7 +36638,7 @@ __func__.7632:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL2060
+	.8byte	.LVL2061
 	.4byte	0x29a4
 	.4byte	0x7a24
 	.uleb128 0x30
@@ -36671,8 +36659,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2062
-	.4byte	0xa949
+	.8byte	.LVL2063
+	.4byte	0xa94d
 	.4byte	0x7a49
 	.uleb128 0x30
 	.uleb128 0x1
@@ -36688,8 +36676,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2063
-	.4byte	0xa949
+	.8byte	.LVL2064
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36724,22 +36712,106 @@ __func__.7632:
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2000
+	.4byte	0x7d59
+	.uleb128 0x34
+	.8byte	.LVL2002
+	.4byte	0x2d32
+	.4byte	0x7ace
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 344
+	.byte	0x94
+	.byte	0x4
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2007
+	.4byte	0x6644
+	.4byte	0x7ae5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2008
+	.4byte	0x2f73
+	.uleb128 0x34
+	.8byte	.LVL2009
+	.4byte	0x2d32
+	.4byte	0x7b0e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2010
+	.4byte	0x2d32
+	.4byte	0x7b2a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2016
+	.4byte	0x2527
+	.4byte	0x7b48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
 	.byte	0x89
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x84
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1999
-	.4byte	0x7d55
+	.8byte	.LVL2023
+	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2001
-	.4byte	0xa949
-	.4byte	0x7ade
+	.8byte	.LVL2025
+	.4byte	0xa94d
+	.4byte	0x7b88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36760,12 +36832,12 @@ __func__.7632:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2002
-	.4byte	0x7d55
+	.8byte	.LVL2026
+	.4byte	0x7d59
 	.uleb128 0x34
-	.8byte	.LVL2003
+	.8byte	.LVL2027
 	.4byte	0x3932
-	.4byte	0x7b0a
+	.4byte	0x7bb4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36774,9 +36846,9 @@ __func__.7632:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2005
+	.8byte	.LVL2029
 	.4byte	0x3932
-	.4byte	0x7b22
+	.4byte	0x7bcc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36785,9 +36857,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2007
+	.8byte	.LVL2031
 	.4byte	0x3932
-	.4byte	0x7b3a
+	.4byte	0x7be4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36796,9 +36868,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2010
-	.4byte	0xa949
-	.4byte	0x7b6d
+	.8byte	.LVL2034
+	.4byte	0xa94d
+	.4byte	0x7c17
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36819,93 +36891,54 @@ __func__.7632:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2017
-	.4byte	0x2d32
-	.4byte	0x7b90
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
+	.8byte	.LVL2037
+	.4byte	0x7d94
+	.4byte	0x7c3a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x8
-	.byte	0x8f
-	.sleb128 344
-	.byte	0x94
-	.byte	0x4
-	.byte	0x85
+	.uleb128 0x2
+	.byte	0x8b
 	.sleb128 0
-	.byte	0x1c
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2022
-	.4byte	0x6644
-	.4byte	0x7ba7
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x50
+	.byte	0x52
 	.uleb128 0x1
 	.byte	0x30
-	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2023
-	.4byte	0x2f73
-	.uleb128 0x34
-	.8byte	.LVL2024
-	.4byte	0x2d32
-	.4byte	0x7bd0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x1
-	.byte	0x31
 	.uleb128 0x30
 	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2025
-	.4byte	0x2d32
-	.4byte	0x7bec
+	.8byte	.LVL2038
+	.4byte	0xa94d
+	.4byte	0x7c6d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x1
-	.byte	0x31
-	.byte	0
-	.uleb128 0x34
-	.8byte	.LVL2031
-	.4byte	0x2527
-	.4byte	0x7c0a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8a
-	.sleb128 0
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x2
-	.byte	0x84
-	.sleb128 0
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
 	.byte	0
-	.uleb128 0x45
-	.8byte	.LVL2038
-	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL2040
+	.8byte	.LVL2041
 	.4byte	0x3932
-	.4byte	0x7c2f
+	.4byte	0x7c85
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36914,9 +36947,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2043
+	.8byte	.LVL2044
 	.4byte	0x5c36
-	.4byte	0x7c53
+	.4byte	0x7ca9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36936,9 +36969,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2044
+	.8byte	.LVL2045
 	.4byte	0x3804
-	.4byte	0x7c6b
+	.4byte	0x7cc1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36947,9 +36980,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2048
+	.8byte	.LVL2049
 	.4byte	0x259f
-	.4byte	0x7c88
+	.4byte	0x7cde
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36963,9 +36996,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2053
-	.4byte	0xa949
-	.4byte	0x7cbb
+	.8byte	.LVL2054
+	.4byte	0xa94d
+	.4byte	0x7d11
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36986,14 +37019,14 @@ __func__.7632:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2061
+	.8byte	.LVL2062
 	.4byte	0x2527
-	.4byte	0x7cde
+	.4byte	0x7d34
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x2
-	.byte	0x8a
+	.byte	0x89
 	.sleb128 0
 	.uleb128 0x30
 	.uleb128 0x1
@@ -37007,9 +37040,9 @@ __func__.7632:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2065
+	.8byte	.LVL2066
 	.4byte	0x259f
-	.4byte	0x7cf5
+	.4byte	0x7d4b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37017,52 +37050,8 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2066
+	.8byte	.LVL2067
 	.4byte	0x2527
-	.uleb128 0x34
-	.8byte	.LVL2069
-	.4byte	0x7d90
-	.4byte	0x7d25
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x2
-	.byte	0x8b
-	.sleb128 0
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x1
-	.byte	0x30
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x53
-	.uleb128 0x2
-	.byte	0x83
-	.sleb128 0
-	.byte	0
-	.uleb128 0x36
-	.8byte	.LVL2070
-	.4byte	0xa949
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x50
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LC1
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x51
-	.uleb128 0x9
-	.byte	0x3
-	.8byte	.LANCHOR180
-	.uleb128 0x30
-	.uleb128 0x1
-	.byte	0x52
-	.uleb128 0x3
-	.byte	0xa
-	.2byte	0x46e
-	.byte	0
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF835
@@ -37073,10 +37062,10 @@ __func__.7632:
 	.8byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d90
+	.4byte	0x7d94
 	.uleb128 0x36
 	.8byte	.LVL1734
-	.4byte	0x7d90
+	.4byte	0x7d94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37097,7 +37086,7 @@ __func__.7632:
 	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7fc4
+	.4byte	0x7fc8
 	.uleb128 0x5d
 	.string	"req"
 	.byte	0x3
@@ -37161,14 +37150,14 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x7fd4
+	.4byte	0x7fd8
 	.uleb128 0x9
 	.byte	0x3
 	.8byte	__func__.6228
 	.uleb128 0x34
 	.8byte	.LVL1717
 	.4byte	0x27e7
-	.4byte	0x7e7b
+	.4byte	0x7e7f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37194,7 +37183,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1720
 	.4byte	0x3932
-	.4byte	0x7ea0
+	.4byte	0x7ea4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37208,7 +37197,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1722
 	.4byte	0x3804
-	.4byte	0x7ec5
+	.4byte	0x7ec9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37219,7 +37208,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1723
 	.4byte	0x27e7
-	.4byte	0x7ee7
+	.4byte	0x7eeb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37239,8 +37228,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1724
-	.4byte	0xa949
-	.4byte	0x7f1a
+	.4byte	0xa94d
+	.4byte	0x7f1e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37263,7 +37252,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1725
 	.4byte	0x5c36
-	.4byte	0x7f38
+	.4byte	0x7f3c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37279,7 +37268,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1727
 	.4byte	0x6d71
-	.4byte	0x7f52
+	.4byte	0x7f56
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37291,8 +37280,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1729
-	.4byte	0xa949
-	.4byte	0x7f7c
+	.4byte	0xa94d
+	.4byte	0x7f80
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37314,7 +37303,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1730
 	.4byte	0x36c0
-	.4byte	0x7f94
+	.4byte	0x7f98
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37324,7 +37313,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1732
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37347,13 +37336,13 @@ __func__.7632:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x7fd4
+	.4byte	0x7fd8
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7fc4
+	.4byte	0x7fc8
 	.uleb128 0x49
 	.4byte	.LASF838
 	.byte	0x3
@@ -37363,7 +37352,7 @@ __func__.7632:
 	.8byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x81ff
+	.4byte	0x8203
 	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
@@ -37471,7 +37460,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB297
 	.8byte	.LBE297-.LBB297
-	.4byte	0x8148
+	.4byte	0x814c
 	.uleb128 0x55
 	.4byte	.LASF587
 	.byte	0x3
@@ -37488,7 +37477,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1935
 	.4byte	0x59d0
-	.4byte	0x816d
+	.4byte	0x8171
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37510,11 +37499,11 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL1942
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x34
 	.8byte	.LVL1948
 	.4byte	0x2d32
-	.4byte	0x8196
+	.4byte	0x819a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37529,7 +37518,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1949
 	.4byte	0x5c36
-	.4byte	0x81ba
+	.4byte	0x81be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37551,7 +37540,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1954
 	.4byte	0x29a4
-	.4byte	0x81d7
+	.4byte	0x81db
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37592,10 +37581,10 @@ __func__.7632:
 	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x822f
+	.4byte	0x8233
 	.uleb128 0x45
 	.8byte	.LVL1739
-	.4byte	0x822f
+	.4byte	0x8233
 	.byte	0
 	.uleb128 0x49
 	.4byte	.LASF845
@@ -37606,17 +37595,17 @@ __func__.7632:
 	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8290
+	.4byte	0x8294
 	.uleb128 0x45
 	.8byte	.LVL1735
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x45
 	.8byte	.LVL1736
 	.4byte	0x5d63
 	.uleb128 0x34
 	.8byte	.LVL1737
 	.4byte	0x5968
-	.4byte	0x8282
+	.4byte	0x8286
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37636,12 +37625,12 @@ __func__.7632:
 	.8byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x83a2
+	.4byte	0x83a6
 	.uleb128 0x2a
 	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x83a2
+	.4byte	0x83a6
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_nand_phy_info
@@ -37654,7 +37643,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB306
 	.8byte	.LBE306-.LBB306
-	.4byte	0x8315
+	.4byte	0x8319
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
@@ -37662,7 +37651,7 @@ __func__.7632:
 	.4byte	0xdd4
 	.4byte	.LLST469
 	.uleb128 0x36
-	.8byte	.LVL2174
+	.8byte	.LVL2171
 	.4byte	0x2d32
 	.uleb128 0x30
 	.uleb128 0x1
@@ -37677,9 +37666,9 @@ __func__.7632:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2166
-	.4byte	0xa949
-	.4byte	0x8341
+	.8byte	.LVL2163
+	.4byte	0xa94d
+	.4byte	0x8345
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37694,9 +37683,9 @@ __func__.7632:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2167
-	.4byte	0x8b1f
-	.4byte	0x8360
+	.8byte	.LVL2164
+	.4byte	0x8b23
+	.4byte	0x8364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37705,19 +37694,19 @@ __func__.7632:
 	.8byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2168
-	.4byte	0x882b
+	.8byte	.LVL2165
+	.4byte	0x882f
 	.uleb128 0x45
-	.8byte	.LVL2169
-	.4byte	0x8754
+	.8byte	.LVL2166
+	.4byte	0x8758
 	.uleb128 0x45
-	.8byte	.LVL2170
+	.8byte	.LVL2167
 	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2171
+	.8byte	.LVL2168
 	.4byte	0x7127
 	.uleb128 0x45
-	.8byte	.LVL2172
+	.8byte	.LVL2169
 	.4byte	0x3f98
 	.byte	0
 	.uleb128 0x8
@@ -37732,7 +37721,7 @@ __func__.7632:
 	.8byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8542
+	.4byte	0x8546
 	.uleb128 0x55
 	.4byte	.LASF718
 	.byte	0x3
@@ -37761,28 +37750,28 @@ __func__.7632:
 	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.8byte	.L1636
+	.8byte	.L1631
 	.uleb128 0x59
 	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.8byte	.L1638
+	.8byte	.L1633
 	.uleb128 0x45
-	.8byte	.LVL2125
+	.8byte	.LVL2122
 	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2126
+	.8byte	.LVL2123
 	.4byte	0x7127
 	.uleb128 0x45
-	.8byte	.LVL2127
+	.8byte	.LVL2124
 	.4byte	0x6e59
 	.uleb128 0x45
-	.8byte	.LVL2135
+	.8byte	.LVL2132
 	.4byte	0x7342
 	.uleb128 0x34
-	.8byte	.LVL2136
+	.8byte	.LVL2133
 	.4byte	0x259f
-	.4byte	0x8473
+	.4byte	0x8477
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37790,9 +37779,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2138
+	.8byte	.LVL2135
 	.4byte	0x259f
-	.4byte	0x848b
+	.4byte	0x848f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37801,9 +37790,9 @@ __func__.7632:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2139
+	.8byte	.LVL2136
 	.4byte	0x460e
-	.4byte	0x84a3
+	.4byte	0x84a7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37812,9 +37801,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2145
-	.4byte	0x8542
-	.4byte	0x84ba
+	.8byte	.LVL2142
+	.4byte	0x8546
+	.4byte	0x84be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37822,15 +37811,15 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2150
-	.4byte	0x8b8f
+	.8byte	.LVL2147
+	.4byte	0x8b93
 	.uleb128 0x45
-	.8byte	.LVL2151
+	.8byte	.LVL2148
 	.4byte	0x6bd9
 	.uleb128 0x34
-	.8byte	.LVL2154
-	.4byte	0x8542
-	.4byte	0x84eb
+	.8byte	.LVL2151
+	.4byte	0x8546
+	.4byte	0x84ef
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37838,9 +37827,9 @@ __func__.7632:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2157
-	.4byte	0x8542
-	.4byte	0x8502
+	.8byte	.LVL2154
+	.4byte	0x8546
+	.4byte	0x8506
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37848,9 +37837,9 @@ __func__.7632:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2161
+	.8byte	.LVL2158
 	.4byte	0x460e
-	.4byte	0x851a
+	.4byte	0x851e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37859,13 +37848,13 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2162
+	.8byte	.LVL2159
 	.4byte	0x6980
 	.uleb128 0x45
-	.8byte	.LVL2163
+	.8byte	.LVL2160
 	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2164
+	.8byte	.LVL2161
 	.4byte	0x3f98
 	.byte	0
 	.uleb128 0x49
@@ -37877,7 +37866,7 @@ __func__.7632:
 	.8byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x872a
+	.4byte	0x872e
 	.uleb128 0x53
 	.4byte	.LASF718
 	.byte	0x3
@@ -37946,7 +37935,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL694
 	.4byte	0x2721
-	.4byte	0x862b
+	.4byte	0x862f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37959,7 +37948,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL703
 	.4byte	0x27e7
-	.4byte	0x865b
+	.4byte	0x865f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37984,7 +37973,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL711
 	.4byte	0x6afa
-	.4byte	0x867f
+	.4byte	0x8683
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37994,7 +37983,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL712
 	.4byte	0x2721
-	.4byte	0x869d
+	.4byte	0x86a1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38011,7 +38000,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL716
 	.4byte	0x6e0c
-	.4byte	0x86b5
+	.4byte	0x86b9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38021,8 +38010,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL718
-	.4byte	0x872a
-	.4byte	0x86cd
+	.4byte	0x872e
+	.4byte	0x86d1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38033,7 +38022,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL719
 	.4byte	0x7560
-	.4byte	0x86e5
+	.4byte	0x86e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38044,7 +38033,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL730
 	.4byte	0x6e0c
-	.4byte	0x86fd
+	.4byte	0x8701
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38054,8 +38043,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL732
-	.4byte	0x872a
-	.4byte	0x8715
+	.4byte	0x872e
+	.4byte	0x8719
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38080,7 +38069,7 @@ __func__.7632:
 	.2byte	0x201
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x8754
+	.4byte	0x8758
 	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x3
@@ -38101,11 +38090,11 @@ __func__.7632:
 	.8byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x882b
+	.4byte	0x882f
 	.uleb128 0x34
 	.8byte	.LVL1110
 	.4byte	0x259f
-	.4byte	0x878d
+	.4byte	0x8791
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38115,7 +38104,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1111
 	.4byte	0x259f
-	.4byte	0x87a4
+	.4byte	0x87a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38125,7 +38114,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1112
 	.4byte	0x259f
-	.4byte	0x87bb
+	.4byte	0x87bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38135,7 +38124,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1113
 	.4byte	0x259f
-	.4byte	0x87e5
+	.4byte	0x87e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38157,7 +38146,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1114
 	.4byte	0x259f
-	.4byte	0x8810
+	.4byte	0x8814
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38192,7 +38181,7 @@ __func__.7632:
 	.8byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b1f
+	.4byte	0x8b23
 	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
@@ -38220,7 +38209,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL744
 	.4byte	0x2c2b
-	.4byte	0x88b0
+	.4byte	0x88b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38231,7 +38220,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL745
 	.4byte	0x2c2b
-	.4byte	0x88c8
+	.4byte	0x88cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38242,7 +38231,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL746
 	.4byte	0x2c2b
-	.4byte	0x88e0
+	.4byte	0x88e4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38253,7 +38242,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL747
 	.4byte	0x2c2b
-	.4byte	0x88f8
+	.4byte	0x88fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38264,7 +38253,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL748
 	.4byte	0x2c2b
-	.4byte	0x8910
+	.4byte	0x8914
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38275,7 +38264,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL751
 	.4byte	0x2c2b
-	.4byte	0x8928
+	.4byte	0x892c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38286,7 +38275,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL752
 	.4byte	0x2c2b
-	.4byte	0x8940
+	.4byte	0x8944
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38297,7 +38286,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL753
 	.4byte	0x2c2b
-	.4byte	0x8958
+	.4byte	0x895c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38311,7 +38300,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL755
 	.4byte	0x2c2b
-	.4byte	0x897d
+	.4byte	0x8981
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38322,7 +38311,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL756
 	.4byte	0x2c2b
-	.4byte	0x8995
+	.4byte	0x8999
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38336,7 +38325,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL760
 	.4byte	0x2c2b
-	.4byte	0x89ba
+	.4byte	0x89be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38347,7 +38336,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL761
 	.4byte	0x2c2b
-	.4byte	0x89d4
+	.4byte	0x89d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38369,7 +38358,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL767
 	.4byte	0x2c2b
-	.4byte	0x8a13
+	.4byte	0x8a17
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38383,7 +38372,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL771
 	.4byte	0x2c2b
-	.4byte	0x8a38
+	.4byte	0x8a3c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38394,7 +38383,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL772
 	.4byte	0x2c2b
-	.4byte	0x8a50
+	.4byte	0x8a54
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38420,7 +38409,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL778
 	.4byte	0x259f
-	.4byte	0x8aa8
+	.4byte	0x8aac
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38447,7 +38436,7 @@ __func__.7632:
 	.4byte	0x2c2b
 	.uleb128 0x36
 	.8byte	.LVL798
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38471,12 +38460,12 @@ __func__.7632:
 	.8byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b8f
+	.4byte	0x8b93
 	.uleb128 0x2e
 	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x83a2
+	.4byte	0x83a6
 	.4byte	.LLST8
 	.uleb128 0x33
 	.string	"i"
@@ -38486,11 +38475,11 @@ __func__.7632:
 	.4byte	.LLST9
 	.uleb128 0x45
 	.8byte	.LVL30
-	.4byte	0x8bd8
+	.4byte	0x8bdc
 	.uleb128 0x34
 	.8byte	.LVL31
-	.4byte	0x8bd8
-	.4byte	0x8b81
+	.4byte	0x8bdc
+	.4byte	0x8b85
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38500,7 +38489,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL33
-	.4byte	0x8b8f
+	.4byte	0x8b93
 	.byte	0
 	.uleb128 0x2d
 	.4byte	.LASF867
@@ -38511,7 +38500,7 @@ __func__.7632:
 	.8byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8bc0
+	.4byte	0x8bc4
 	.uleb128 0x2e
 	.4byte	.LASF868
 	.byte	0x3
@@ -38524,7 +38513,7 @@ __func__.7632:
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x8bd8
+	.4byte	0x8bdc
 	.uleb128 0x38
 	.4byte	.LASF870
 	.byte	0x3
@@ -38540,7 +38529,7 @@ __func__.7632:
 	.8byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c25
+	.4byte	0x8c29
 	.uleb128 0x31
 	.string	"num"
 	.byte	0x3
@@ -38569,7 +38558,7 @@ __func__.7632:
 	.8byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8cab
+	.4byte	0x8caf
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38584,8 +38573,8 @@ __func__.7632:
 	.4byte	.LLST113
 	.uleb128 0x34
 	.8byte	.LVL470
-	.4byte	0xa96b
-	.4byte	0x8c96
+	.4byte	0xa96f
+	.4byte	0x8c9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38607,7 +38596,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL472
-	.4byte	0x8cab
+	.4byte	0x8caf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38625,7 +38614,7 @@ __func__.7632:
 	.8byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9739
+	.4byte	0x973d
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38647,7 +38636,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB205
 	.8byte	.LBE205-.LBB205
-	.4byte	0x8d53
+	.4byte	0x8d57
 	.uleb128 0x32
 	.4byte	.LASF587
 	.byte	0x3
@@ -38657,7 +38646,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL455
 	.4byte	0x6644
-	.4byte	0x8d32
+	.4byte	0x8d36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38666,7 +38655,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL459
-	.4byte	0xa96b
+	.4byte	0xa96f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38690,7 +38679,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB206
 	.8byte	.LBE206-.LBB206
-	.4byte	0x8d98
+	.4byte	0x8d9c
 	.uleb128 0x32
 	.4byte	.LASF587
 	.byte	0x3
@@ -38699,7 +38688,7 @@ __func__.7632:
 	.4byte	.LLST111
 	.uleb128 0x36
 	.8byte	.LVL466
-	.4byte	0xa96b
+	.4byte	0xa96f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38722,8 +38711,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL318
-	.4byte	0xa96b
-	.4byte	0x8dbd
+	.4byte	0xa96f
+	.4byte	0x8dc1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38739,8 +38728,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL320
-	.4byte	0xa96b
-	.4byte	0x8de2
+	.4byte	0xa96f
+	.4byte	0x8de6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38756,8 +38745,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL322
-	.4byte	0xa96b
-	.4byte	0x8e07
+	.4byte	0xa96f
+	.4byte	0x8e0b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38773,8 +38762,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL324
-	.4byte	0xa96b
-	.4byte	0x8e2c
+	.4byte	0xa96f
+	.4byte	0x8e30
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38790,8 +38779,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL326
-	.4byte	0xa96b
-	.4byte	0x8e51
+	.4byte	0xa96f
+	.4byte	0x8e55
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38807,8 +38796,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL328
-	.4byte	0xa96b
-	.4byte	0x8e76
+	.4byte	0xa96f
+	.4byte	0x8e7a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38824,8 +38813,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL330
-	.4byte	0xa96b
-	.4byte	0x8e9b
+	.4byte	0xa96f
+	.4byte	0x8e9f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38841,8 +38830,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL332
-	.4byte	0xa96b
-	.4byte	0x8ec0
+	.4byte	0xa96f
+	.4byte	0x8ec4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38858,8 +38847,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL334
-	.4byte	0xa96b
-	.4byte	0x8ee5
+	.4byte	0xa96f
+	.4byte	0x8ee9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38875,8 +38864,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL336
-	.4byte	0xa96b
-	.4byte	0x8f0a
+	.4byte	0xa96f
+	.4byte	0x8f0e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38892,8 +38881,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL338
-	.4byte	0xa96b
-	.4byte	0x8f2f
+	.4byte	0xa96f
+	.4byte	0x8f33
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38909,8 +38898,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL340
-	.4byte	0xa96b
-	.4byte	0x8f54
+	.4byte	0xa96f
+	.4byte	0x8f58
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38926,8 +38915,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL342
-	.4byte	0xa96b
-	.4byte	0x8f79
+	.4byte	0xa96f
+	.4byte	0x8f7d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38943,8 +38932,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL344
-	.4byte	0xa96b
-	.4byte	0x8f9e
+	.4byte	0xa96f
+	.4byte	0x8fa2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38960,8 +38949,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL346
-	.4byte	0xa96b
-	.4byte	0x8fc3
+	.4byte	0xa96f
+	.4byte	0x8fc7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38977,8 +38966,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL348
-	.4byte	0xa96b
-	.4byte	0x8fe8
+	.4byte	0xa96f
+	.4byte	0x8fec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38994,8 +38983,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL350
-	.4byte	0xa96b
-	.4byte	0x900d
+	.4byte	0xa96f
+	.4byte	0x9011
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39011,8 +39000,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL352
-	.4byte	0xa96b
-	.4byte	0x9032
+	.4byte	0xa96f
+	.4byte	0x9036
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39028,8 +39017,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL354
-	.4byte	0xa96b
-	.4byte	0x9057
+	.4byte	0xa96f
+	.4byte	0x905b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,8 +39034,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL356
-	.4byte	0xa96b
-	.4byte	0x907c
+	.4byte	0xa96f
+	.4byte	0x9080
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39062,8 +39051,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL358
-	.4byte	0xa96b
-	.4byte	0x90a1
+	.4byte	0xa96f
+	.4byte	0x90a5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39079,8 +39068,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL360
-	.4byte	0xa96b
-	.4byte	0x90c6
+	.4byte	0xa96f
+	.4byte	0x90ca
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39096,8 +39085,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL362
-	.4byte	0xa96b
-	.4byte	0x90eb
+	.4byte	0xa96f
+	.4byte	0x90ef
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39113,8 +39102,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL364
-	.4byte	0xa96b
-	.4byte	0x9110
+	.4byte	0xa96f
+	.4byte	0x9114
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39130,8 +39119,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL366
-	.4byte	0xa96b
-	.4byte	0x9135
+	.4byte	0xa96f
+	.4byte	0x9139
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39147,8 +39136,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL368
-	.4byte	0xa96b
-	.4byte	0x915a
+	.4byte	0xa96f
+	.4byte	0x915e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39164,8 +39153,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL370
-	.4byte	0xa96b
-	.4byte	0x917f
+	.4byte	0xa96f
+	.4byte	0x9183
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39181,8 +39170,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL372
-	.4byte	0xa96b
-	.4byte	0x91a4
+	.4byte	0xa96f
+	.4byte	0x91a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39198,8 +39187,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL374
-	.4byte	0xa96b
-	.4byte	0x91c9
+	.4byte	0xa96f
+	.4byte	0x91cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39215,8 +39204,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL376
-	.4byte	0xa96b
-	.4byte	0x91ee
+	.4byte	0xa96f
+	.4byte	0x91f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39232,8 +39221,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL378
-	.4byte	0xa96b
-	.4byte	0x9213
+	.4byte	0xa96f
+	.4byte	0x9217
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39249,8 +39238,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL380
-	.4byte	0xa96b
-	.4byte	0x9238
+	.4byte	0xa96f
+	.4byte	0x923c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39266,8 +39255,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL382
-	.4byte	0xa96b
-	.4byte	0x925d
+	.4byte	0xa96f
+	.4byte	0x9261
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39283,8 +39272,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL384
-	.4byte	0xa96b
-	.4byte	0x9282
+	.4byte	0xa96f
+	.4byte	0x9286
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39300,8 +39289,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL386
-	.4byte	0xa96b
-	.4byte	0x92a7
+	.4byte	0xa96f
+	.4byte	0x92ab
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39317,8 +39306,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL388
-	.4byte	0xa96b
-	.4byte	0x92cc
+	.4byte	0xa96f
+	.4byte	0x92d0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39334,8 +39323,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL390
-	.4byte	0xa96b
-	.4byte	0x92f1
+	.4byte	0xa96f
+	.4byte	0x92f5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39351,8 +39340,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL392
-	.4byte	0xa96b
-	.4byte	0x9316
+	.4byte	0xa96f
+	.4byte	0x931a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39368,8 +39357,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL394
-	.4byte	0xa96b
-	.4byte	0x933b
+	.4byte	0xa96f
+	.4byte	0x933f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39385,8 +39374,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL396
-	.4byte	0xa96b
-	.4byte	0x9360
+	.4byte	0xa96f
+	.4byte	0x9364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39402,8 +39391,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL398
-	.4byte	0xa96b
-	.4byte	0x9385
+	.4byte	0xa96f
+	.4byte	0x9389
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39419,8 +39408,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL400
-	.4byte	0xa96b
-	.4byte	0x93aa
+	.4byte	0xa96f
+	.4byte	0x93ae
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39436,8 +39425,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL402
-	.4byte	0xa96b
-	.4byte	0x93cf
+	.4byte	0xa96f
+	.4byte	0x93d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39453,8 +39442,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL404
-	.4byte	0xa96b
-	.4byte	0x93f4
+	.4byte	0xa96f
+	.4byte	0x93f8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39470,8 +39459,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL406
-	.4byte	0xa96b
-	.4byte	0x9419
+	.4byte	0xa96f
+	.4byte	0x941d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39487,8 +39476,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL408
-	.4byte	0xa96b
-	.4byte	0x943e
+	.4byte	0xa96f
+	.4byte	0x9442
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39504,8 +39493,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL410
-	.4byte	0xa96b
-	.4byte	0x9463
+	.4byte	0xa96f
+	.4byte	0x9467
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39521,8 +39510,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL412
-	.4byte	0xa96b
-	.4byte	0x9488
+	.4byte	0xa96f
+	.4byte	0x948c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39538,8 +39527,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL414
-	.4byte	0xa96b
-	.4byte	0x94ad
+	.4byte	0xa96f
+	.4byte	0x94b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39555,8 +39544,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL416
-	.4byte	0xa96b
-	.4byte	0x94d2
+	.4byte	0xa96f
+	.4byte	0x94d6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39572,8 +39561,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL418
-	.4byte	0xa96b
-	.4byte	0x94f7
+	.4byte	0xa96f
+	.4byte	0x94fb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39589,8 +39578,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL420
-	.4byte	0xa96b
-	.4byte	0x951c
+	.4byte	0xa96f
+	.4byte	0x9520
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39606,8 +39595,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL422
-	.4byte	0xa96b
-	.4byte	0x9541
+	.4byte	0xa96f
+	.4byte	0x9545
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39623,8 +39612,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL424
-	.4byte	0xa96b
-	.4byte	0x9566
+	.4byte	0xa96f
+	.4byte	0x956a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39640,8 +39629,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL426
-	.4byte	0xa96b
-	.4byte	0x958b
+	.4byte	0xa96f
+	.4byte	0x958f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39657,8 +39646,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL428
-	.4byte	0xa96b
-	.4byte	0x95b0
+	.4byte	0xa96f
+	.4byte	0x95b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39674,8 +39663,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL430
-	.4byte	0xa96b
-	.4byte	0x95d5
+	.4byte	0xa96f
+	.4byte	0x95d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39691,8 +39680,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL432
-	.4byte	0xa96b
-	.4byte	0x95fa
+	.4byte	0xa96f
+	.4byte	0x95fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39708,8 +39697,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL434
-	.4byte	0xa96b
-	.4byte	0x961f
+	.4byte	0xa96f
+	.4byte	0x9623
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39725,8 +39714,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL436
-	.4byte	0xa96b
-	.4byte	0x9644
+	.4byte	0xa96f
+	.4byte	0x9648
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39742,8 +39731,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL438
-	.4byte	0xa96b
-	.4byte	0x9669
+	.4byte	0xa96f
+	.4byte	0x966d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39759,8 +39748,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL440
-	.4byte	0xa96b
-	.4byte	0x968e
+	.4byte	0xa96f
+	.4byte	0x9692
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39776,8 +39765,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL442
-	.4byte	0xa96b
-	.4byte	0x96b3
+	.4byte	0xa96f
+	.4byte	0x96b7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39796,8 +39785,8 @@ __func__.7632:
 	.4byte	0x3edd
 	.uleb128 0x34
 	.8byte	.LVL445
-	.4byte	0xa96b
-	.4byte	0x96e5
+	.4byte	0xa96f
+	.4byte	0x96e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39816,8 +39805,8 @@ __func__.7632:
 	.4byte	0x3e7c
 	.uleb128 0x34
 	.8byte	.LVL448
-	.4byte	0xa96b
-	.4byte	0x9717
+	.4byte	0xa96f
+	.4byte	0x971b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39833,7 +39822,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL453
-	.4byte	0xa96b
+	.4byte	0xa96f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39854,7 +39843,7 @@ __func__.7632:
 	.8byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x979b
+	.4byte	0x979f
 	.uleb128 0x6e
 	.4byte	0x2ab8
 	.uleb128 0x1
@@ -39893,7 +39882,7 @@ __func__.7632:
 	.8byte	.LFE356-.LFB356
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97cc
+	.4byte	0x97d0
 	.uleb128 0x47
 	.4byte	0x5420
 	.4byte	.LLST3
@@ -39905,37 +39894,37 @@ __func__.7632:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x6d
-	.4byte	0x8bc0
+	.4byte	0x8bc4
 	.8byte	.LFB203
 	.8byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97ef
+	.4byte	0x97f3
 	.uleb128 0x6e
-	.4byte	0x8bcc
+	.4byte	0x8bd0
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
 	.uleb128 0x6d
-	.4byte	0x872a
+	.4byte	0x872e
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9833
+	.4byte	0x9837
 	.uleb128 0x47
-	.4byte	0x873b
+	.4byte	0x873f
 	.4byte	.LLST10
 	.uleb128 0x71
-	.4byte	0x8747
+	.4byte	0x874b
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x6f
-	.4byte	0x873b
+	.4byte	0x873f
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
 	.uleb128 0x70
-	.4byte	0x9813
+	.4byte	0x9817
 	.4byte	.LLST11
 	.byte	0
 	.byte	0
@@ -39964,7 +39953,7 @@ __func__.7632:
 	.8byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x991b
+	.4byte	0x991f
 	.uleb128 0x47
 	.4byte	0x6942
 	.4byte	.LLST49
@@ -39973,7 +39962,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB179
 	.8byte	.LBE179-.LBB179
-	.4byte	0x9905
+	.4byte	0x9909
 	.uleb128 0x47
 	.4byte	0x6942
 	.4byte	.LLST50
@@ -39981,10 +39970,10 @@ __func__.7632:
 	.8byte	.LBB180
 	.8byte	.LBE180-.LBB180
 	.uleb128 0x71
-	.4byte	0x989c
+	.4byte	0x98a0
 	.uleb128 0x2f
 	.8byte	.LVL139
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40024,7 +40013,7 @@ __func__.7632:
 	.8byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x99be
+	.4byte	0x99c2
 	.uleb128 0x47
 	.4byte	0x6967
 	.4byte	.LLST56
@@ -40033,7 +40022,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB183
 	.8byte	.LBE183-.LBB183
-	.4byte	0x99a8
+	.4byte	0x99ac
 	.uleb128 0x47
 	.4byte	0x6967
 	.4byte	.LLST57
@@ -40041,10 +40030,10 @@ __func__.7632:
 	.8byte	.LBB184
 	.8byte	.LBE184-.LBB184
 	.uleb128 0x71
-	.4byte	0x993f
+	.4byte	0x9943
 	.uleb128 0x2f
 	.8byte	.LVL159
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40084,7 +40073,7 @@ __func__.7632:
 	.8byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b1b
+	.4byte	0x9b1f
 	.uleb128 0x47
 	.4byte	0x65d6
 	.4byte	.LLST70
@@ -40114,32 +40103,32 @@ __func__.7632:
 	.8byte	.LBB188
 	.8byte	.LBE188-.LBB188
 	.uleb128 0x70
-	.4byte	0x99e2
+	.4byte	0x99e6
 	.4byte	.LLST72
 	.uleb128 0x70
-	.4byte	0x99e7
+	.4byte	0x99eb
 	.4byte	.LLST73
 	.uleb128 0x70
-	.4byte	0x99ec
+	.4byte	0x99f0
 	.4byte	.LLST74
 	.uleb128 0x70
-	.4byte	0x99f1
+	.4byte	0x99f5
 	.4byte	.LLST75
 	.uleb128 0x70
-	.4byte	0x99f6
+	.4byte	0x99fa
 	.4byte	.LLST76
 	.uleb128 0x70
-	.4byte	0x99fb
+	.4byte	0x99ff
 	.4byte	.LLST77
 	.uleb128 0x70
-	.4byte	0x9a00
+	.4byte	0x9a04
 	.4byte	.LLST78
 	.uleb128 0x71
-	.4byte	0x9a05
+	.4byte	0x9a09
 	.uleb128 0x34
 	.8byte	.LVL205
-	.4byte	0xa949
-	.4byte	0x9aac
+	.4byte	0xa94d
+	.4byte	0x9ab0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40162,7 +40151,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL213
 	.4byte	0x6761
-	.4byte	0x9ad1
+	.4byte	0x9ad5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40178,8 +40167,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL214
-	.4byte	0xa949
-	.4byte	0x9b04
+	.4byte	0xa94d
+	.4byte	0x9b08
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40218,7 +40207,7 @@ __func__.7632:
 	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9bd3
+	.4byte	0x9bd7
 	.uleb128 0x47
 	.4byte	0x6313
 	.4byte	.LLST79
@@ -40233,7 +40222,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB191
 	.8byte	.LBE191-.LBB191
-	.4byte	0x9bc5
+	.4byte	0x9bc9
 	.uleb128 0x47
 	.4byte	0x6313
 	.4byte	.LLST82
@@ -40241,14 +40230,14 @@ __func__.7632:
 	.8byte	.LBB192
 	.8byte	.LBE192-.LBB192
 	.uleb128 0x71
-	.4byte	0x9b3f
+	.4byte	0x9b43
 	.uleb128 0x71
-	.4byte	0x9b48
+	.4byte	0x9b4c
 	.uleb128 0x71
-	.4byte	0x9b51
+	.4byte	0x9b55
 	.uleb128 0x36
 	.8byte	.LVL221
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40280,7 +40269,7 @@ __func__.7632:
 	.8byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c19
+	.4byte	0x9c1d
 	.uleb128 0x47
 	.4byte	0x5951
 	.4byte	.LLST86
@@ -40299,7 +40288,7 @@ __func__.7632:
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x60
 	.uleb128 0x71
-	.4byte	0x9bf7
+	.4byte	0x9bfb
 	.byte	0
 	.byte	0
 	.byte	0
@@ -40309,7 +40298,7 @@ __func__.7632:
 	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c65
+	.4byte	0x9c69
 	.uleb128 0x47
 	.4byte	0x5420
 	.4byte	.LLST87
@@ -40318,7 +40307,7 @@ __func__.7632:
 	.4byte	.LLST88
 	.uleb128 0x2f
 	.8byte	.LVL257
-	.4byte	0x979b
+	.4byte	0x979f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40340,7 +40329,7 @@ __func__.7632:
 	.8byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9cc3
+	.4byte	0x9cc7
 	.uleb128 0x6e
 	.4byte	0x4777
 	.uleb128 0x1
@@ -40357,7 +40346,7 @@ __func__.7632:
 	.8byte	.LBB204
 	.8byte	.LBE204-.LBB204
 	.uleb128 0x70
-	.4byte	0x9c87
+	.4byte	0x9c8b
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
@@ -40368,7 +40357,7 @@ __func__.7632:
 	.8byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d0c
+	.4byte	0x9d10
 	.uleb128 0x47
 	.4byte	0x3da3
 	.4byte	.LLST121
@@ -40396,7 +40385,7 @@ __func__.7632:
 	.8byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9d42
+	.4byte	0x9d46
 	.uleb128 0x45
 	.8byte	.LVL576
 	.4byte	0x6d71
@@ -40410,7 +40399,7 @@ __func__.7632:
 	.8byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9e3c
+	.4byte	0x9e40
 	.uleb128 0x75
 	.4byte	0x2e2b
 	.byte	0
@@ -40422,26 +40411,26 @@ __func__.7632:
 	.4byte	0x2e4d
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x130
-	.4byte	0x9e11
+	.4byte	0x9e15
 	.uleb128 0x71
-	.4byte	0x9d5d
+	.4byte	0x9d61
 	.uleb128 0x70
-	.4byte	0x9d63
+	.4byte	0x9d67
 	.4byte	.LLST253
 	.uleb128 0x72
-	.4byte	0x9d68
+	.4byte	0x9d6c
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
 	.uleb128 0x72
-	.4byte	0x9d6d
+	.4byte	0x9d71
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x63
 	.8byte	.LBB234
 	.8byte	.LBE234-.LBB234
-	.4byte	0x9df6
+	.4byte	0x9dfa
 	.uleb128 0x72
 	.4byte	0x2e5e
 	.uleb128 0x3
@@ -40450,7 +40439,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL968
 	.4byte	0x29a4
-	.4byte	0x9ddb
+	.4byte	0x9ddf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40516,7 +40505,7 @@ __func__.7632:
 	.8byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9f70
+	.4byte	0x9f74
 	.uleb128 0x47
 	.4byte	0x26dd
 	.4byte	.LLST299
@@ -40537,14 +40526,14 @@ __func__.7632:
 	.8byte	.LBB247
 	.8byte	.LBE247-.LBB247
 	.uleb128 0x71
-	.4byte	0x9e60
+	.4byte	0x9e64
 	.uleb128 0x72
-	.4byte	0x9e66
+	.4byte	0x9e6a
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x72
-	.4byte	0x9e6b
+	.4byte	0x9e6f
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
@@ -40554,7 +40543,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1220
 	.4byte	0x259f
-	.4byte	0x9ee3
+	.4byte	0x9ee7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40577,7 +40566,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1222
 	.4byte	0x259f
-	.4byte	0x9f06
+	.4byte	0x9f0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40599,7 +40588,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1223
 	.4byte	0x2721
-	.4byte	0x9f28
+	.4byte	0x9f2c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40620,7 +40609,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1224
 	.4byte	0x27e7
-	.4byte	0x9f4f
+	.4byte	0x9f53
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40672,7 +40661,7 @@ __func__.7632:
 	.8byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa049
+	.4byte	0xa04d
 	.uleb128 0x47
 	.4byte	0x2e8b
 	.4byte	.LLST320
@@ -40691,17 +40680,17 @@ __func__.7632:
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1b0
 	.uleb128 0x70
-	.4byte	0x9f94
+	.4byte	0x9f98
 	.4byte	.LLST321
 	.uleb128 0x72
-	.4byte	0x9f99
+	.4byte	0x9f9d
 	.uleb128 0x1
 	.byte	0x64
 	.uleb128 0x70
-	.4byte	0x9f9e
+	.4byte	0x9fa2
 	.4byte	.LLST322
 	.uleb128 0x72
-	.4byte	0x9fa3
+	.4byte	0x9fa7
 	.uleb128 0x1
 	.byte	0x6a
 	.uleb128 0x45
@@ -40710,7 +40699,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1316
 	.4byte	0x6e0c
-	.4byte	0x9ffc
+	.4byte	0xa000
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40720,8 +40709,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1320
-	.4byte	0xa949
-	.4byte	0xa021
+	.4byte	0xa94d
+	.4byte	0xa025
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40738,7 +40727,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1321
 	.4byte	0x75ef
-	.4byte	0xa039
+	.4byte	0xa03d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40758,7 +40747,7 @@ __func__.7632:
 	.8byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa174
+	.4byte	0xa178
 	.uleb128 0x47
 	.4byte	0x37d5
 	.4byte	.LLST323
@@ -40767,7 +40756,7 @@ __func__.7632:
 	.uleb128 0x63
 	.8byte	.LBB260
 	.8byte	.LBE260-.LBB260
-	.4byte	0xa15f
+	.4byte	0xa163
 	.uleb128 0x47
 	.4byte	0x37d5
 	.4byte	.LLST324
@@ -40775,11 +40764,11 @@ __func__.7632:
 	.8byte	.LBB261
 	.8byte	.LBE261-.LBB261
 	.uleb128 0x71
-	.4byte	0xa06d
+	.4byte	0xa071
 	.uleb128 0x34
 	.8byte	.LVL1331
 	.4byte	0x6761
-	.4byte	0xa0cb
+	.4byte	0xa0cf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40795,8 +40784,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1332
-	.4byte	0xa949
-	.4byte	0xa0fe
+	.4byte	0xa94d
+	.4byte	0xa102
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40819,7 +40808,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1333
 	.4byte	0x3d92
-	.4byte	0xa116
+	.4byte	0xa11a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40830,7 +40819,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1334
 	.4byte	0x2e7a
-	.4byte	0xa12e
+	.4byte	0xa132
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40840,7 +40829,7 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL1335
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40879,7 +40868,7 @@ __func__.7632:
 	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa26d
+	.4byte	0xa271
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1f0
 	.uleb128 0x70
@@ -40904,7 +40893,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1351
 	.4byte	0x5c36
-	.4byte	0xa1e3
+	.4byte	0xa1e7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40926,7 +40915,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1353
 	.4byte	0x29a4
-	.4byte	0xa206
+	.4byte	0xa20a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40947,7 +40936,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1357
 	.4byte	0x259f
-	.4byte	0xa21e
+	.4byte	0xa222
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40958,7 +40947,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1359
 	.4byte	0x3804
-	.4byte	0xa236
+	.4byte	0xa23a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40969,7 +40958,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1360
 	.4byte	0x27e7
-	.4byte	0xa25e
+	.4byte	0xa262
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41003,7 +40992,7 @@ __func__.7632:
 	.8byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa2ae
+	.4byte	0xa2b2
 	.uleb128 0x2f
 	.8byte	.LVL1621
 	.4byte	0x5af8
@@ -41031,11 +41020,11 @@ __func__.7632:
 	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa321
+	.4byte	0xa325
 	.uleb128 0x34
 	.8byte	.LVL1658
 	.4byte	0x59d0
-	.4byte	0xa2e1
+	.4byte	0xa2e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41045,8 +41034,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1659
-	.4byte	0xa949
-	.4byte	0xa30d
+	.4byte	0xa94d
+	.4byte	0xa311
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41076,11 +41065,11 @@ __func__.7632:
 	.8byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa387
+	.4byte	0xa38b
 	.uleb128 0x34
 	.8byte	.LVL1801
 	.4byte	0x3148
-	.4byte	0xa354
+	.4byte	0xa358
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41091,7 +41080,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1802
 	.4byte	0x588f
-	.4byte	0xa373
+	.4byte	0xa377
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41115,7 +41104,7 @@ __func__.7632:
 	.8byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa749
+	.4byte	0xa74d
 	.uleb128 0x47
 	.4byte	0x2d43
 	.4byte	.LLST413
@@ -41148,7 +41137,7 @@ __func__.7632:
 	.4byte	0x2de3
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2a0
-	.4byte	0xa735
+	.4byte	0xa739
 	.uleb128 0x47
 	.4byte	0x2d4f
 	.4byte	.LLST415
@@ -41158,44 +41147,44 @@ __func__.7632:
 	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x2a0
 	.uleb128 0x71
-	.4byte	0xa3b4
+	.4byte	0xa3b8
 	.uleb128 0x70
-	.4byte	0xa3ba
+	.4byte	0xa3be
 	.4byte	.LLST417
 	.uleb128 0x72
-	.4byte	0xa3bf
+	.4byte	0xa3c3
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x71
-	.4byte	0xa3c4
+	.4byte	0xa3c8
 	.uleb128 0x70
-	.4byte	0xa3ca
+	.4byte	0xa3ce
 	.4byte	.LLST418
 	.uleb128 0x70
-	.4byte	0xa3cf
+	.4byte	0xa3d3
 	.4byte	.LLST419
 	.uleb128 0x70
-	.4byte	0xa3d4
+	.4byte	0xa3d8
 	.4byte	.LLST420
 	.uleb128 0x70
-	.4byte	0xa3d9
+	.4byte	0xa3dd
 	.4byte	.LLST421
 	.uleb128 0x70
-	.4byte	0xa3de
+	.4byte	0xa3e2
 	.4byte	.LLST422
 	.uleb128 0x70
-	.4byte	0xa3e3
+	.4byte	0xa3e7
 	.4byte	.LLST423
 	.uleb128 0x78
 	.4byte	0x2dd3
 	.uleb128 0x78
 	.4byte	0x2ddb
 	.uleb128 0x71
-	.4byte	0xa3e8
+	.4byte	0xa3ec
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0xa4ea
+	.4byte	0xa4ee
 	.uleb128 0x70
 	.4byte	0x2df1
 	.4byte	.LLST424
@@ -41205,7 +41194,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1839
 	.4byte	0x6644
-	.4byte	0xa4a4
+	.4byte	0xa4a8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41216,7 +41205,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1842
 	.4byte	0x6644
-	.4byte	0xa4bb
+	.4byte	0xa4bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41228,7 +41217,7 @@ __func__.7632:
 	.4byte	0x2ec4
 	.uleb128 0x36
 	.8byte	.LVL1854
-	.4byte	0xa949
+	.4byte	0xa94d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41249,7 +41238,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1867
 	.4byte	0x460e
-	.4byte	0xa50f
+	.4byte	0xa513
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41260,7 +41249,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1869
 	.4byte	0x6644
-	.4byte	0xa527
+	.4byte	0xa52b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41274,7 +41263,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1876
 	.4byte	0x6644
-	.4byte	0xa54b
+	.4byte	0xa54f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41284,7 +41273,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1878
 	.4byte	0x36c0
-	.4byte	0xa563
+	.4byte	0xa567
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41295,7 +41284,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1883
 	.4byte	0x35af
-	.4byte	0xa57b
+	.4byte	0xa57f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41306,7 +41295,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1884
 	.4byte	0x36c0
-	.4byte	0xa593
+	.4byte	0xa597
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41316,8 +41305,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1885
-	.4byte	0xa949
-	.4byte	0xa5c6
+	.4byte	0xa94d
+	.4byte	0xa5ca
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41339,8 +41328,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1886
-	.4byte	0xa949
-	.4byte	0xa5f9
+	.4byte	0xa94d
+	.4byte	0xa5fd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41362,8 +41351,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1887
-	.4byte	0xa949
-	.4byte	0xa62c
+	.4byte	0xa94d
+	.4byte	0xa630
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41386,7 +41375,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1888
 	.4byte	0x460e
-	.4byte	0xa644
+	.4byte	0xa648
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41400,7 +41389,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1903
 	.4byte	0x29a4
-	.4byte	0xa669
+	.4byte	0xa66d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41410,8 +41399,8 @@ __func__.7632:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL1912
-	.4byte	0xa949
-	.4byte	0xa69c
+	.4byte	0xa94d
+	.4byte	0xa6a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41434,7 +41423,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1914
 	.4byte	0x5c36
-	.4byte	0xa6ba
+	.4byte	0xa6be
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41453,7 +41442,7 @@ __func__.7632:
 	.uleb128 0x34
 	.8byte	.LVL1916
 	.4byte	0x35ed
-	.4byte	0xa6e5
+	.4byte	0xa6e9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41478,7 +41467,7 @@ __func__.7632:
 	.4byte	0x37c4
 	.uleb128 0x45
 	.8byte	.LVL1923
-	.4byte	0x7d55
+	.4byte	0x7d59
 	.uleb128 0x45
 	.8byte	.LVL1924
 	.4byte	0x5d63
@@ -41503,28 +41492,28 @@ __func__.7632:
 	.8byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa926
+	.4byte	0xa92a
 	.uleb128 0x75
 	.4byte	0x3fa9
 	.byte	0
 	.uleb128 0x63
 	.8byte	.LBB304
 	.8byte	.LBE304-.LBB304
-	.4byte	0xa890
+	.4byte	0xa894
 	.uleb128 0x71
-	.4byte	0xa764
+	.4byte	0xa768
 	.uleb128 0x63
 	.8byte	.LBB305
 	.8byte	.LBE305-.LBB305
-	.4byte	0xa7a3
+	.4byte	0xa7a7
 	.uleb128 0x70
 	.4byte	0x3fb4
 	.4byte	.LLST464
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2109
+	.8byte	.LVL2106
 	.4byte	0x43a6
-	.4byte	0xa7bb
+	.4byte	0xa7bf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41533,9 +41522,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2110
+	.8byte	.LVL2107
 	.4byte	0x43a6
-	.4byte	0xa7d3
+	.4byte	0xa7d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41544,9 +41533,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2112
+	.8byte	.LVL2109
 	.4byte	0x588f
-	.4byte	0xa7f2
+	.4byte	0xa7f6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41555,9 +41544,9 @@ __func__.7632:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2113
+	.8byte	.LVL2110
 	.4byte	0x588f
-	.4byte	0xa811
+	.4byte	0xa815
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41566,24 +41555,24 @@ __func__.7632:
 	.8byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2114
+	.8byte	.LVL2111
 	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL2115
+	.8byte	.LVL2112
 	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2116
+	.8byte	.LVL2113
 	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2120
+	.8byte	.LVL2117
 	.4byte	0x2f73
 	.uleb128 0x45
-	.8byte	.LVL2121
+	.8byte	.LVL2118
 	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2122
+	.8byte	.LVL2119
 	.4byte	0x3932
-	.4byte	0xa86a
+	.4byte	0xa86e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41592,9 +41581,9 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2123
+	.8byte	.LVL2120
 	.4byte	0x3932
-	.4byte	0xa882
+	.4byte	0xa886
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41603,41 +41592,41 @@ __func__.7632:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2124
+	.8byte	.LVL2121
 	.4byte	0x425d
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2096
+	.8byte	.LVL2093
 	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2097
+	.8byte	.LVL2094
 	.4byte	0x5446
 	.uleb128 0x45
-	.8byte	.LVL2098
+	.8byte	.LVL2095
 	.4byte	0x5201
 	.uleb128 0x45
-	.8byte	.LVL2099
+	.8byte	.LVL2096
 	.4byte	0x4f40
 	.uleb128 0x45
-	.8byte	.LVL2100
+	.8byte	.LVL2097
 	.4byte	0x4fe5
 	.uleb128 0x45
-	.8byte	.LVL2101
+	.8byte	.LVL2098
 	.4byte	0x445e
 	.uleb128 0x45
-	.8byte	.LVL2102
+	.8byte	.LVL2099
 	.4byte	0x5439
 	.uleb128 0x45
-	.8byte	.LVL2103
+	.8byte	.LVL2100
 	.4byte	0x6a65
 	.uleb128 0x45
-	.8byte	.LVL2104
+	.8byte	.LVL2101
 	.4byte	0x44c8
 	.uleb128 0x45
-	.8byte	.LVL2105
+	.8byte	.LVL2102
 	.4byte	0x46c6
 	.uleb128 0x36
-	.8byte	.LVL2106
+	.8byte	.LVL2103
 	.4byte	0x5944
 	.uleb128 0x30
 	.uleb128 0x1
@@ -43350,11 +43339,11 @@ __func__.7632:
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
 .LLST470:
-	.8byte	.LVL2177
-	.8byte	.LVL2178-1
+	.8byte	.LVL2174
+	.8byte	.LVL2175-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2178-1
+	.8byte	.LVL2175-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43364,11 +43353,11 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST471:
-	.8byte	.LVL2177
-	.8byte	.LVL2178-1
+	.8byte	.LVL2174
+	.8byte	.LVL2175-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2178-1
+	.8byte	.LVL2175-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -43378,11 +43367,11 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST472:
-	.8byte	.LVL2177
-	.8byte	.LVL2178-1
+	.8byte	.LVL2174
+	.8byte	.LVL2175-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2178-1
+	.8byte	.LVL2175-1
 	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
@@ -46707,15 +46696,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST463:
+	.8byte	.LVL2077
 	.8byte	.LVL2080
-	.8byte	.LVL2083
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2092
-	.8byte	.LVL2094
+	.8byte	.LVL2089
+	.8byte	.LVL2091
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2095
+	.8byte	.LVL2092
 	.8byte	.LFE274
 	.2byte	0x1
 	.byte	0x66
@@ -50281,15 +50270,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST460:
+	.8byte	.LVL2070
 	.8byte	.LVL2073
-	.8byte	.LVL2076
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2076
-	.8byte	.LVL2077-1
+	.8byte	.LVL2073
+	.8byte	.LVL2074-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2077-1
+	.8byte	.LVL2074-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50299,15 +50288,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST461:
-	.8byte	.LVL2073
-	.8byte	.LVL2075
+	.8byte	.LVL2070
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2075
-	.8byte	.LVL2077-1
+	.8byte	.LVL2072
+	.8byte	.LVL2074-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2077-1
+	.8byte	.LVL2074-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50317,15 +50306,15 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST462:
-	.8byte	.LVL2073
-	.8byte	.LVL2074
+	.8byte	.LVL2070
+	.8byte	.LVL2071
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2074
-	.8byte	.LVL2077-1
+	.8byte	.LVL2071
+	.8byte	.LVL2074-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL2077-1
+	.8byte	.LVL2074-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50577,23 +50566,23 @@ __func__.7632:
 	.8byte	.LVL1989
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1991
-	.8byte	.LVL1994
+	.8byte	.LVL1992
+	.8byte	.LVL1995
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1994
-	.8byte	.LVL2018
+	.8byte	.LVL1995
+	.8byte	.LVL2004
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2026
-	.8byte	.LVL2032
+	.8byte	.LVL2011
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2033
-	.8byte	.LVL2072
+	.8byte	.LVL2018
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2072
+	.8byte	.LVL2069
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
@@ -50607,15 +50596,15 @@ __func__.7632:
 	.8byte	.LVL1986
 	.8byte	.LVL1990
 	.2byte	0x1
-	.byte	0x69
-	.8byte	.LVL1991
+	.byte	0x68
 	.8byte	.LVL1992
+	.8byte	.LVL1993
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1992
+	.8byte	.LVL1993
 	.8byte	.LFE217
 	.2byte	0x1
-	.byte	0x69
+	.byte	0x68
 	.8byte	0
 	.8byte	0
 .LLST448:
@@ -50624,84 +50613,84 @@ __func__.7632:
 	.2byte	0x1
 	.byte	0x53
 	.8byte	.LVL1989-1
-	.8byte	.LVL1990
-	.2byte	0x1
-	.byte	0x6a
 	.8byte	.LVL1991
-	.8byte	.LVL1993
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1992
+	.8byte	.LVL1994
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1993
-	.8byte	.LVL2072
+	.8byte	.LVL1994
+	.8byte	.LVL2069
 	.2byte	0x1
-	.byte	0x6a
-	.8byte	.LVL2072
+	.byte	0x69
+	.8byte	.LVL2069
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
 .LLST449:
-	.8byte	.LVL2046
-	.8byte	.LVL2068
+	.8byte	.LVL2047
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
 .LLST450:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2000
-	.8byte	.LVL2020
+	.8byte	.LVL2001
+	.8byte	.LVL2003
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL2039
-	.8byte	.LVL2072
+	.8byte	.LVL2024
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
 .LLST451:
-	.8byte	.LVL1995
-	.8byte	.LVL2019
+	.8byte	.LVL1996
+	.8byte	.LVL2005
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2026
-	.8byte	.LVL2032
+	.8byte	.LVL2011
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2033
-	.8byte	.LVL2072
+	.8byte	.LVL2018
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
 .LLST452:
-	.8byte	.LVL1996
 	.8byte	.LVL1997
+	.8byte	.LVL1998
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1997
-	.8byte	.LVL2072
+	.8byte	.LVL1998
+	.8byte	.LVL2069
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 344
 	.8byte	0
 	.8byte	0
 .LLST453:
-	.8byte	.LVL2044
 	.8byte	.LVL2045
+	.8byte	.LVL2046
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2045
-	.8byte	.LVL2047
+	.8byte	.LVL2046
+	.8byte	.LVL2048
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.8byte	.LVL2047
-	.8byte	.LVL2048-1
+	.8byte	.LVL2048
+	.8byte	.LVL2049-1
 	.2byte	0xf
 	.byte	0x3
 	.8byte	req_prgm
@@ -50714,50 +50703,50 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST454:
-	.8byte	.LVL2011
-	.8byte	.LVL2016
+	.8byte	.LVL2035
+	.8byte	.LVL2040
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2042
-	.8byte	.LVL2054
+	.8byte	.LVL2043
+	.8byte	.LVL2055
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2054
 	.8byte	.LVL2055
+	.8byte	.LVL2056
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2055
-	.8byte	.LVL2072
+	.8byte	.LVL2056
+	.8byte	.LVL2069
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
 	.8byte	0
 	.8byte	0
 .LLST455:
-	.8byte	.LVL1998
-	.8byte	.LVL2031
+	.8byte	.LVL1999
+	.8byte	.LVL2016
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL2031
-	.8byte	.LVL2032
+	.byte	0x6a
+	.8byte	.LVL2016
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2033
-	.8byte	.LVL2039
+	.8byte	.LVL2018
+	.8byte	.LVL2024
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2039
-	.8byte	.LVL2072
+	.8byte	.LVL2024
+	.8byte	.LVL2069
 	.2byte	0x1
-	.byte	0x68
+	.byte	0x6a
 	.8byte	0
 	.8byte	0
 .LLST456:
-	.8byte	.LVL2007
-	.8byte	.LVL2008
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x21
 	.byte	0x83
 	.sleb128 7
@@ -50772,7 +50761,7 @@ __func__.7632:
 	.byte	0xc
 	.4byte	0xffffffff
 	.byte	0x1a
-	.byte	0x88
+	.byte	0x8a
 	.sleb128 0
 	.byte	0x16
 	.byte	0x14
@@ -50785,52 +50774,38 @@ __func__.7632:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL2008
-	.8byte	.LVL2009
+	.8byte	.LVL2032
+	.8byte	.LVL2033
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2009
-	.8byte	.LVL2012
+	.8byte	.LVL2033
+	.8byte	.LVL2036
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2012
-	.8byte	.LVL2013
-	.2byte	0x1
-	.byte	0x6b
-	.8byte	.LVL2013
-	.8byte	.LVL2015
-	.2byte	0x3
-	.byte	0x8b
-	.sleb128 -1
-	.byte	0x9f
-	.8byte	.LVL2015
-	.8byte	.LVL2016
+	.8byte	.LVL2036
+	.8byte	.LVL2040
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL2042
-	.8byte	.LVL2068
+	.8byte	.LVL2043
+	.8byte	.LVL2069
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2068
-	.8byte	.LVL2072
-	.2byte	0x1
-	.byte	0x6b
 	.8byte	0
 	.8byte	0
 .LLST457:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2027
-	.8byte	.LVL2029
+	.8byte	.LVL2012
+	.8byte	.LVL2014
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2029
-	.8byte	.LVL2031-1
+	.8byte	.LVL2014
+	.8byte	.LVL2016-1
 	.2byte	0x16
 	.byte	0x86
 	.sleb128 0
@@ -50846,92 +50821,92 @@ __func__.7632:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2049
 	.8byte	.LVL2050
+	.8byte	.LVL2051
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2050
-	.8byte	.LVL2052
+	.8byte	.LVL2051
+	.8byte	.LVL2053
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2055
-	.8byte	.LVL2057
+	.8byte	.LVL2056
+	.8byte	.LVL2058
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2057
 	.8byte	.LVL2058
+	.8byte	.LVL2059
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2059
-	.8byte	.LVL2067
+	.8byte	.LVL2060
+	.8byte	.LVL2068
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
 	.8byte	0
 	.8byte	0
 .LLST458:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2028
-	.8byte	.LVL2030
+	.8byte	.LVL2013
+	.8byte	.LVL2015
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2030
-	.8byte	.LVL2032
+	.8byte	.LVL2015
+	.8byte	.LVL2017
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2033
-	.8byte	.LVL2039
+	.8byte	.LVL2018
+	.8byte	.LVL2024
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2051
 	.8byte	.LVL2052
+	.8byte	.LVL2053
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2056
 	.8byte	.LVL2057
+	.8byte	.LVL2058
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2057
 	.8byte	.LVL2058
+	.8byte	.LVL2059
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2059
-	.8byte	.LVL2067
+	.8byte	.LVL2060
+	.8byte	.LVL2068
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
 	.8byte	0
 	.8byte	0
 .LLST459:
-	.8byte	.LVL1999
 	.8byte	.LVL2000
+	.8byte	.LVL2001
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2000
-	.8byte	.LVL2004
-	.2byte	0x1
-	.byte	0x63
+	.8byte	.LVL2001
 	.8byte	.LVL2006
-	.8byte	.LVL2021
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2039
-	.8byte	.LVL2041
+	.8byte	.LVL2024
+	.8byte	.LVL2028
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL2030
 	.8byte	.LVL2042
-	.8byte	.LVL2072
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2043
+	.8byte	.LVL2069
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -51387,8 +51362,8 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST469:
-	.8byte	.LVL2173
-	.8byte	.LVL2174
+	.8byte	.LVL2170
+	.8byte	.LVL2171
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51396,8 +51371,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2174
-	.8byte	.LVL2175
+	.8byte	.LVL2171
+	.8byte	.LVL2172
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51405,8 +51380,8 @@ __func__.7632:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2175
-	.8byte	.LVL2176
+	.8byte	.LVL2172
+	.8byte	.LVL2173
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51417,103 +51392,103 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST465:
-	.8byte	.LVL2130
-	.8byte	.LVL2131
+	.8byte	.LVL2127
+	.8byte	.LVL2128
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2133
-	.8byte	.LVL2134
+	.8byte	.LVL2130
+	.8byte	.LVL2131
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2143
-	.8byte	.LVL2144
+	.8byte	.LVL2140
+	.8byte	.LVL2141
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2144
-	.8byte	.LVL2145-1
+	.8byte	.LVL2141
+	.8byte	.LVL2142-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2147
-	.8byte	.LVL2148
+	.8byte	.LVL2144
+	.8byte	.LVL2145
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2152
-	.8byte	.LVL2153
+	.8byte	.LVL2149
+	.8byte	.LVL2150
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2153
-	.8byte	.LVL2154-1
+	.8byte	.LVL2150
+	.8byte	.LVL2151-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2154
-	.8byte	.LVL2155
+	.8byte	.LVL2151
+	.8byte	.LVL2152
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2155
-	.8byte	.LVL2156
+	.8byte	.LVL2152
+	.8byte	.LVL2153
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2156
-	.8byte	.LVL2157-1
+	.8byte	.LVL2153
+	.8byte	.LVL2154-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2159
-	.8byte	.LVL2160
+	.8byte	.LVL2156
+	.8byte	.LVL2157
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
 .LLST466:
-	.8byte	.LVL2133
-	.8byte	.LVL2137
+	.8byte	.LVL2130
+	.8byte	.LVL2134
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL2152
 	.8byte	.LVL2155
-	.8byte	.LVL2158
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2159
-	.8byte	.LVL2160
+	.8byte	.LVL2156
+	.8byte	.LVL2157
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
 .LLST467:
-	.8byte	.LVL2129
-	.8byte	.LVL2130
+	.8byte	.LVL2126
+	.8byte	.LVL2127
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2130
-	.8byte	.LVL2132
+	.8byte	.LVL2127
+	.8byte	.LVL2129
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL2140
 	.8byte	.LVL2143
-	.8byte	.LVL2146
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2147
-	.8byte	.LVL2149
+	.8byte	.LVL2144
+	.8byte	.LVL2146
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2151
-	.8byte	.LVL2152
+	.8byte	.LVL2148
+	.8byte	.LVL2149
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
 .LLST468:
-	.8byte	.LVL2128
-	.8byte	.LVL2130
+	.8byte	.LVL2125
+	.8byte	.LVL2127
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2140
-	.8byte	.LVL2141
+	.8byte	.LVL2137
+	.8byte	.LVL2138
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2142
-	.8byte	.LVL2143
+	.8byte	.LVL2139
+	.8byte	.LVL2140
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
@@ -53123,14 +53098,14 @@ __func__.7632:
 	.8byte	0
 	.8byte	0
 .LLST464:
-	.8byte	.LVL2110
-	.8byte	.LVL2111
+	.8byte	.LVL2107
+	.8byte	.LVL2108
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2111
-	.8byte	.LVL2117
+	.8byte	.LVL2108
+	.8byte	.LVL2114
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_buffer_superblock

commit 08eb34f0b422ef51e12ba982bb74ca8079c4aa04
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 13 17:41:19 2018 +0800

    rockchip: dts: rk3308: enable sfc node
    
    Change-Id: I333d21506492afd9a3515fb803f477d26f4dc201
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 60bad75b5d..f1ee370846 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -29,6 +29,11 @@
 	status = "okay";
 };
 
+&sfc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;

commit b88d7442a3a9c93f71688bdeea0d85795e8ccbec
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 13 17:37:22 2018 +0800

    rockchip: configs: rk3308: change to sftl and enable sfc devices
    
    Change-Id: I7d835f10d65aed321d578bf93486cee62f37d07a
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 956d8385d7..6a67a31103 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -42,7 +42,10 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_RKSFC_NAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 7a39aeb5cd9ccf6a9fae5d1f81f1270ec988e2a0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jun 26 10:54:48 2018 +0800

    rockchip: rk3399: update doc for u-boot.itb write position
    
    u-boot.itb will use the same position as uboot.img
    
    Change-Id: I839c947a0221d347e5810d1fc8bbae655aba429b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README
index 7da7c848bd..1b9a6ff09b 100644
--- a/board/rockchip/evb_rk3399/README
+++ b/board/rockchip/evb_rk3399/README
@@ -99,7 +99,7 @@ Flash the image with U-Boot SPL(option 1)
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
   > rkdeveloptool wl 64 u-boot/idbspl.img
-  > rkdeveloptool wl 512 u-boot/u-boot.itb
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
   > rkdeveloptool rd
 
 Flash the image with Rockchip miniloader(option 2)

commit 7070f875d9a30c6679578cffafe6c355d54c3030
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 15:30:43 2018 +0800

    make.sh: support hex prefix with "0x" or "0X" for <addr> subcmd
    
    Command:
            ./make.sh <addr>
    
    Change-Id: Iea2cf4009ed39989796a15556490db70b12696fc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 1d1dce90e7..4b84bfd446 100755
--- a/make.sh
+++ b/make.sh
@@ -136,7 +136,7 @@ prepare()
 
 		*)
 		#Func address is valid ?
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ]; then
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ]; then
 			return
 		elif [ ! -f configs/${BOARD}_defconfig ]; then
 			echo
@@ -245,7 +245,13 @@ sub_commands()
 
 		*)
 		# Search function and code position of address
-		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ] && [ ${FUNCADDR} ]; then
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F,x,X]//g') ] && [ ${FUNCADDR} ]; then
+			# With prefix: '0x' or '0X'
+			if [ `echo ${FUNCADDR} | sed -n "/0[x,X]/p" | wc -l` -ne 0 ]; then
+				FUNCADDR=`echo $FUNCADDR | awk '{ print strtonum($0) }'`
+				FUNCADDR=`echo "obase=16;${FUNCADDR}"|bc |tr '[A-Z]' '[a-z]'`
+			fi
+
 			echo
 			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym
 			${TOOLCHAIN_ADDR2LINE} -e ${OUTDIR}/u-boot ${FUNCADDR}

commit 6a7642592aeb7ed15f259e5d89ddf2c21d158f0b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 15:22:12 2018 +0800

    make.sh: update help info
    
    Change-Id: Ia3a56c4173184a1871ab765c661726fb1fc66d2c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 1a72d3effe..1d1dce90e7 100755
--- a/make.sh
+++ b/make.sh
@@ -47,29 +47,36 @@ PLATFORM_AARCH32=
 help()
 {
 	echo
-	echo "Usage: ./make.sh [board|subcmd] [O=<dir>]"
+	echo "Usage:"
+	echo "	./make.sh [board|subcmd] [O=<dir>]"
+	echo
+	echo "	 - board: board name of defconfig"
+	echo "	 - subcmd: loader|loader-all|trust|uboot|elf|map|sym|<addr>|"
+	echo "	 - O=<dir>: assigned output directory"
 	echo
 	echo "Example:"
 	echo
-	echo "1. Build:"
-	echo "	./make.sh evb-rk3399     	---- build for evb-rk3399_defconfig"
+	echo "1. Build board:"
+	echo "	./make.sh evb-rk3399            ---- build for evb-rk3399_defconfig"
 	echo "	./make.sh evb-rk3399 O=rockdev  ---- build for evb-rk3399_defconfig with output dir "./rockdev""
-	echo "	./make.sh firefly-rk3288 	---- build for firefly-rk3288_defconfig"
-	echo "	./make.sh			---- build with exist .config"
+	echo "	./make.sh firefly-rk3288        ---- build for firefly-rk3288_defconfig"
+	echo "	./make.sh                       ---- build with exist .config"
 	echo
 	echo "	After build, images of uboot, loader and trust are all generated."
 	echo
-	echo "2. Subcmd helper:"
-	echo "	./make.sh trust		--- pack trust.img without rebuild project"
-	echo "	./make.sh loader	--- pack loader bin without rebuild project"
-	echo "	./make.sh uboot		--- pack uboot.img without rebuild project"
+	echo "2. Pack helper:"
+	echo "	./make.sh trust         --- pack trust.img"
+	echo "	./make.sh uboot         --- pack uboot.img"
+	echo "	./make.sh loader        --- pack loader bin"
+	echo "	./make.sh loader-all	--- pack loader bin (all supported loaders)"
 	echo
 	echo "3. Debug helper:"
-	echo "	./make.sh elf		--- dump elf file with -D(default)"
-	echo "	./make.sh elf-S		--- dump elf file with -S"
-	echo "	./make.sh <addr>	--- dump function name and code position of address"
-	echo "	./make.sh map		--- cat u-boot.map"
-	echo "	./make.sh sym		--- cat u-boot.sym"
+	echo "	./make.sh elf           --- dump elf file with -D(default)"
+	echo "	./make.sh elf-S         --- dump elf file with -S"
+	echo "	./make.sh elf-d         --- dump elf file with -d"
+	echo "	./make.sh <addr>        --- dump function symbol and code position of address"
+	echo "	./make.sh map           --- cat u-boot.map"
+	echo "	./make.sh sym           --- cat u-boot.sym"
 }
 
 prepare()

commit 5c75ab41e7fc7f81e8c09c68b23c40a5c039aecd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 10 15:18:43 2018 +0800

    make.sh: support pack all loaders
    
    Command:
            ./make.sh loader-all
    
    Change-Id: I458c30f6505eaace52858254277905e163255fa2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 247c40fe03..1a72d3effe 100755
--- a/make.sh
+++ b/make.sh
@@ -84,7 +84,7 @@ prepare()
 	else
 		case $BOARD in
 			# Parse from exit .config
-			''|elf*|trust|loader|uboot|map|sym)
+			''|elf*|loader*|trust|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
 			# Good, find only one .config
@@ -124,7 +124,7 @@ prepare()
 		;;
 
 		#Subcmd
-		''|elf*|trust|loader|uboot|map|sym)
+		''|elf*|loader*|trust|uboot|map|sym)
 		;;
 
 		*)
@@ -194,7 +194,7 @@ select_toolchain()
 
 sub_commands()
 {
-	local cmd=${SUBCMD%-*} elfopt=${SUBCMD#*-}
+	local cmd=${SUBCMD%-*} opt=${SUBCMD#*-}
 
 	case $cmd in
 		elf)
@@ -203,10 +203,10 @@ sub_commands()
 			exit 1
 		else
 			# default 'cmd' without option, use '-D'
-			if [ "${cmd}" = 'elf' -a "${elfopt}" = 'elf' ]; then
-				elfopt=D
+			if [ "${cmd}" = 'elf' -a "${opt}" = 'elf' ]; then
+				opt=D
 			fi
-			${TOOLCHAIN_OBJDUMP} -${elfopt} ${OUTDIR}/u-boot | less
+			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
 		;;
@@ -227,7 +227,7 @@ sub_commands()
 		;;
 
 		loader)
-		pack_loader_image
+		pack_loader_image ${opt}
 		exit 0
 		;;
 
@@ -330,7 +330,7 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	local files ini
+	local mode=$1 files ini
 
 	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
 		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
@@ -338,14 +338,20 @@ pack_loader_image()
 	fi
 
 	cd ${RKBIN}
-	files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
-	for ini in $files
-	do
-		if [ -f "$ini" ]; then
-			${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
-			echo "pack loader okay! Input: $ini"
-		fi
-	done
+
+	if [ "${mode}" = 'all' ]; then
+		files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
+		for ini in $files
+		do
+			if [ -f "$ini" ]; then
+				${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
+				echo "pack loader okay! Input: $ini"
+			fi
+		done
+	else
+		${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+		echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	fi
 
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
 }

commit b8654f90c4b59f1e8eb9edb71e6cd19fac5fd167
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 6 15:11:00 2018 +0800

    arm: dts: rockchip: update display node default status
    
    if you want to enable display at uboot you need to set
    the following node status to okay:
    
    1. display_subsystem
    2. route_rgb
    3. vop
    4. rgb
    5. backlight
    6. pwm1[depend on your hardware]
    7. panel[update timing and init cmd]
    
    Change-Id: I18b8857d49350ee870522599c9986d749b51bca0
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 3ee81a23f4..87012226ba 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -131,6 +131,7 @@
 		rockchip,data-mapping = "vesa";
 		rockchip,data-width = <18>;
 		rockchip,output = "rgb";
+		rgb-mode = "p666";
 		status = "disabled";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi_init_cmd>;
@@ -269,6 +270,10 @@
 
 };
 
+&display_subsystem {
+	status = "disabled";
+};
+
 &emmc {
 	cap-mmc-highspeed;
 	mmc-hs200-1_8v;
@@ -282,6 +287,10 @@
 	status = "okay";
 };
 
+&pwm1 {
+	status = "disabled";
+};
+
 &saradc {
 	status = "okay";
 };
@@ -310,10 +319,6 @@
 	status = "okay";
 };
 
-&rgb {
-	status = "disabled";
-};
-
 &route_rgb {
 	status = "disabled";
 };

commit 67b9012c2960b8752d1c1ddade2c04626ebbb0e1
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 6 15:25:36 2018 +0800

    drm/rockchip: add support mcu screen
    
    the mcu screen need send init command through crtc, so we add
    the function display_send_mcu_cmd() from panel to crtc.
    
    Change-Id: Ide4a6043dff0a7b0040bf62b1aa1814f3c365235
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 44a5012461..27bd7a6c03 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -21,6 +21,7 @@ struct rockchip_crtc_funcs {
 	int (*disable)(struct display_state *state);
 	void (*unprepare)(struct display_state *state);
 	int (*fixup_dts)(struct display_state *state, void *blob);
+	int (*send_mcu_cmd)(struct display_state *state, u32 type, u32 value);
 };
 
 struct vop_data;
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index f9d1919918..83f645bda5 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -537,6 +537,25 @@ deinit:
 	return ret;
 }
 
+int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret;
+
+	if (!state->is_init)
+		return -EINVAL;
+
+	if (crtc_funcs->send_mcu_cmd) {
+		ret = crtc_funcs->send_mcu_cmd(state, type, val);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int display_set_plane(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -764,6 +783,37 @@ err:
 	return 0;
 }
 
+static int get_crtc_mcu_mode(struct crtc_state *crtc_state)
+{
+	ofnode mcu_node;
+	int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
+
+	mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
+
+#define FDT_GET_MCU_INT(val, name) \
+	do { \
+		val = ofnode_read_s32_default(mcu_node, name, -1); \
+		if (val < 0) { \
+			printf("Can't get %s\n", name); \
+			return -ENXIO; \
+		} \
+	} while (0)
+
+	FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
+	FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
+	FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
+	FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
+	FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
+
+	crtc_state->mcu_timing.mcu_pix_total = total_pixel;
+	crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
+	crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
+	crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
+	crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
+
+	return 0;
+}
+
 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 {
 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
@@ -1084,6 +1134,7 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.crtc = crtc;
 		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
 		s->node = node;
+		get_crtc_mcu_mode(&s->crtc_state);
 
 		if (connector_panel_init(s)) {
 			printf("Warn: Failed to init panel drivers\n");
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 0f216f9b98..bd11805fe7 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -35,6 +35,12 @@ enum rockchip_cmd_type {
 	CMD_TYPE_MCU
 };
 
+enum rockchip_mcu_cmd {
+	MCU_WRCMD = 0,
+	MCU_WRDATA,
+	MCU_SETBYPASS,
+};
+
 /*
  * display output interface supported by rockchip lcdc
  */
@@ -47,6 +53,15 @@ enum rockchip_cmd_type {
 /* for use special outface */
 #define ROCKCHIP_OUT_MODE_AAAA	15
 
+struct rockchip_mcu_timing {
+	int mcu_pix_total;
+	int mcu_cs_pst;
+	int mcu_cs_pend;
+	int mcu_rw_pst;
+	int mcu_rw_pend;
+	int mcu_hold_mode;
+};
+
 struct crtc_state {
 	struct udevice *dev;
 	const struct rockchip_crtc *crtc;
@@ -67,6 +82,7 @@ struct crtc_state {
 	int crtc_y;
 	int crtc_w;
 	int crtc_h;
+	struct rockchip_mcu_timing mcu_timing;
 };
 
 struct panel_state {
@@ -152,5 +168,6 @@ struct display_state {
 };
 
 int drm_mode_vrefresh(const struct drm_display_mode *mode);
+int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val);
 
 #endif
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 6605b4ef93..10cd29384c 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -156,6 +156,30 @@ static void rockchip_panel_write_spi_cmds(struct rockchip_panel_priv *priv,
 	dm_gpio_set_value(&priv->spi_cs_gpio, 1);
 }
 
+static int rockchip_panel_send_mcu_cmds(struct display_state *state,
+					struct rockchip_panel_cmds *cmds)
+{
+	int i;
+
+	if (!cmds)
+		return -EINVAL;
+
+	display_send_mcu_cmd(state, MCU_SETBYPASS, 1);
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+		int value = 0;
+
+		value = desc->payload[0];
+		display_send_mcu_cmd(state, desc->header.data_type, value);
+
+		if (desc->header.delay_ms)
+			mdelay(desc->header.delay_ms);
+	}
+	display_send_mcu_cmd(state, MCU_SETBYPASS, 0);
+
+	return 0;
+}
+
 static int rockchip_panel_send_spi_cmds(struct display_state *state,
 					struct rockchip_panel_cmds *cmds)
 {
@@ -259,6 +283,8 @@ static int rockchip_panel_prepare(struct display_state *state)
 		if (priv->cmd_type == CMD_TYPE_SPI)
 			ret = rockchip_panel_send_spi_cmds(state,
 							   plat->on_cmds);
+		else if (priv->cmd_type == CMD_TYPE_MCU)
+			ret = rockchip_panel_send_mcu_cmds(state, plat->on_cmds);
 		else
 			ret = rockchip_panel_send_dsi_cmds(state,
 							   plat->on_cmds);
@@ -285,6 +311,9 @@ static void rockchip_panel_unprepare(struct display_state *state)
 		if (priv->cmd_type == CMD_TYPE_SPI)
 			ret = rockchip_panel_send_spi_cmds(state,
 							   plat->off_cmds);
+		else if (priv->cmd_type == CMD_TYPE_MCU)
+			ret = rockchip_panel_send_mcu_cmds(state,
+							   plat->off_cmds);
 		else
 			ret = rockchip_panel_send_dsi_cmds(state,
 							   plat->off_cmds);
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 201fd20082..28dc622fbd 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -178,6 +178,21 @@ static void vop_post_config(struct display_state *state, struct vop *vop)
 	}
 }
 
+static void vop_mcu_mode(struct display_state *state, struct vop *vop)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+
+	VOP_CTRL_SET(vop, mcu_clk_sel, 1);
+	VOP_CTRL_SET(vop, mcu_type, 1);
+
+	VOP_CTRL_SET(vop, mcu_hold_mode, 1);
+	VOP_CTRL_SET(vop, mcu_pix_total, crtc_state->mcu_timing.mcu_pix_total);
+	VOP_CTRL_SET(vop, mcu_cs_pst, crtc_state->mcu_timing.mcu_cs_pst);
+	VOP_CTRL_SET(vop, mcu_cs_pend, crtc_state->mcu_timing.mcu_cs_pend);
+	VOP_CTRL_SET(vop, mcu_rw_pst, crtc_state->mcu_timing.mcu_rw_pst);
+	VOP_CTRL_SET(vop, mcu_rw_pend, crtc_state->mcu_timing.mcu_rw_pend);
+}
+
 static int rockchip_vop_init(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -421,10 +436,11 @@ static int rockchip_vop_init(struct display_state *state)
 	VOP_CTRL_SET(vop, core_dclk_div,
 		     !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 
-	VOP_CTRL_SET(vop, standby, 1);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[0], act_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
 			  act_end - us_to_vertical_line(mode, 1000));
+	if (state->crtc_state.mcu_timing.mcu_pix_total > 0)
+		vop_mcu_mode(state, vop);
 	vop_cfg_done(vop);
 
 	return 0;
@@ -632,6 +648,8 @@ static int rockchip_vop_enable(struct display_state *state)
 
 	VOP_CTRL_SET(vop, standby, 0);
 	vop_cfg_done(vop);
+	if (crtc_state->mcu_timing.mcu_pix_total > 0)
+		VOP_CTRL_SET(vop, mcu_hold_mode, 0);
 
 	return 0;
 }
@@ -688,6 +706,34 @@ static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
 	return 0;
 }
 
+static int rockchip_vop_send_mcu_cmd(struct display_state *state,
+				     u32 type, u32 value)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct vop *vop = crtc_state->private;
+
+	if (vop) {
+		switch (type) {
+		case MCU_WRCMD:
+			VOP_CTRL_SET(vop, mcu_rs, 0);
+			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
+			VOP_CTRL_SET(vop, mcu_rs, 1);
+			break;
+		case MCU_WRDATA:
+			VOP_CTRL_SET(vop, mcu_rs, 1);
+			VOP_CTRL_SET(vop, mcu_rw_bypass_port, value);
+			break;
+		case MCU_SETBYPASS:
+			VOP_CTRL_SET(vop, mcu_bypass, value ? 1 : 0);
+			break;
+		default:
+			break;
+		}
+	}
+
+	return 0;
+}
+
 const struct rockchip_crtc_funcs rockchip_vop_funcs = {
 	.init = rockchip_vop_init,
 	.set_plane = rockchip_vop_set_plane,
@@ -695,4 +741,5 @@ const struct rockchip_crtc_funcs rockchip_vop_funcs = {
 	.enable = rockchip_vop_enable,
 	.disable = rockchip_vop_disable,
 	.fixup_dts = rockchip_vop_fixup_dts,
+	.send_mcu_cmd = rockchip_vop_send_mcu_cmd,
 };

commit 937d9ddabdce8054236aeacd8c601fff26c947f5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jul 6 15:25:02 2018 +0800

    drm/rockchip: px30 vop: add mcu register config
    
    Change-Id: I77d571233abd4fd3998b1916ff1576c01c1e90d4
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 8dee6129e1..66c9713e26 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -506,6 +506,20 @@ static const struct vop_ctrl px30_ctrl_data = {
 	.cabc_stage_down = VOP_REG(PX30_CABC_CTRL2, 0xff, 0),
 	.cabc_global_dn = VOP_REG(PX30_CABC_CTRL3, 0xff, 0),
 	.cabc_global_dn_limit_en = VOP_REG(PX30_CABC_CTRL3, 0x1, 8),
+
+	.mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0),
+	.mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6),
+	.mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10),
+	.mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16),
+	.mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20),
+	.mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26),
+	.mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27),
+	.mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28),
+	.mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29),
+	.mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30),
+	.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
+	.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
+				      0xffffffff, 0),
 };
 
 static const struct vop_line_flag rk3366_vop_lite_line_flag = {

commit 3afe53975c4c28ebab9d7845b6e8bad3b4a57667
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jul 10 14:43:00 2018 +0800

    clk: rockchip: rk3288: add PLL_LIMIT_FREQ
    
    npll is for dclk, add PLL_LIMIT_FREQ for better jitter.
    
    Change-Id: I6ac09e9bdbd1bef0eddb37835100be782b772d54
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index c18d7819bc..44ecb71958 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -223,6 +223,7 @@ static int rkclk_configure_ddr(struct rk3288_cru *cru, struct rk3288_grf *grf,
 #define VCO_MIN_KHZ	440000
 #define FREF_MAX_KHZ	2200000
 #define FREF_MIN_KHZ	269
+#define PLL_LIMIT_FREQ	600000000
 
 static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 {
@@ -241,7 +242,7 @@ static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 
 	no = DIV_ROUND_UP(VCO_MIN_KHZ, freq_khz);
 	if (ext_div) {
-		*ext_div = DIV_ROUND_UP(no, max_no);
+		*ext_div = DIV_ROUND_UP(PLL_LIMIT_FREQ, freq_hz);
 		no = DIV_ROUND_UP(no, *ext_div);
 	}
 

commit 426b906c9427503d8b30a2c2c2527327fd0dbce1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 15:43:26 2018 +0800

    rockchip: vendor: fix compile warning
    
    error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
    
    Change-Id: I4773ec9983f2b4302832ad78671168b6529b1ac2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 4963bb6748..4b7e7140ea 100755
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -452,8 +452,8 @@ void vendor_test_reset(void)
 	vendor_info.hdr->version = 1;
 	vendor_info.hdr->tag = VENDOR_TAG;
 	/* data field length */
-	vendor_info.hdr->free_size =
-		((u32)vendor_info.hash - (u32)vendor_info.data);
+	vendor_info.hdr->free_size = (unsigned long)vendor_info.hash -
+				     (unsigned long)vendor_info.data;
 	*(vendor_info.version2) = vendor_info.hdr->version;
 	/* write to flash. */
 	for (i = 0; i < VENDOR_PART_NUM; i++)
@@ -481,14 +481,16 @@ int vendor_storage_test(void)
 	switch (bootdev_type) {
 	case IF_TYPE_MMC:
 		item_num = EMMC_VENDOR_ITEM_NUM;
-		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		total_size = (unsigned long)vendor_info.hash -
+			     (unsigned long)vendor_info.data;
 		size = total_size/item_num;
 		break;
 	case IF_TYPE_RKNAND:
 	case IF_TYPE_SPINOR:
 	case IF_TYPE_SPINAND:
 		item_num = FLASH_VENDOR_ITEM_NUM;
-		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		total_size = (unsigned long)vendor_info.hash -
+			     (unsigned long)vendor_info.data;
 		size = total_size/item_num;
 		break;
 	default:

commit 0d889c3a8dec6f562895fe516b5a285679b14b7b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jul 3 11:27:58 2018 +0800

    tools: env: make fw_printenv statically linked
    
    this makes sure fw_printenv works normally on most
    platforms without care about C library.
    
    Change-Id: If3b942d2fadb293eeeb00695a10b708847a827ad
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/tools/env/Makefile b/tools/env/Makefile
index 95b28c0b3a..6a61bfaba4 100644
--- a/tools/env/Makefile
+++ b/tools/env/Makefile
@@ -16,6 +16,8 @@ HOST_EXTRACFLAGS  = $(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE)))
 		-DUSE_HOSTCC \
 		-DTEXT_BASE=$(TEXT_BASE)
 
+HOSTLDFLAGS = -static
+
 ifeq ($(MTD_VERSION),old)
 HOST_EXTRACFLAGS += -DMTD_OLD
 endif

commit 53ea579188c07b09d7f73701a69b238f2eabfab3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 6 20:34:33 2018 +0800

    make.sh: support get function symbol and addr2line
    
    Command:
            ./make.sh [func address]
    
    Example:
            >> ./make.sh 000000000024fb1c
    
            >> 000000000024fb1c l     F .text  000000000000004c spi_child_pre_probe
            >> /home/guest/u-boot/drivers/spi/spi-uclass.c:153
    
    Change-Id: I6f413631fad6c51a79a35d3794d636fec6beef5b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d6a53dc066..247c40fe03 100755
--- a/make.sh
+++ b/make.sh
@@ -2,6 +2,7 @@
 set -e
 BOARD=$1
 SUBCMD=$1
+FUNCADDR=$1
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -10,6 +11,8 @@ SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 RKBIN_TOOLS=../rkbin/tools
 
 # User's GCC toolchain and relative path
+ADDR2LINE_ARM32=arm-linux-gnueabihf-addr2line
+ADDR2LINE_ARM64=aarch64-linux-gnu-addr2line
 OBJ_ARM32=arm-linux-gnueabihf-objdump
 OBJ_ARM64=aarch64-linux-gnu-objdump
 GCC_ARM32=arm-linux-gnueabihf-
@@ -28,6 +31,7 @@ RKBIN=
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
 TOOLCHAIN_GCC=
 TOOLCHAIN_OBJDUMP=
+TOOLCHAIN_ADDR2LINE=
 
 # Declare global default output dir and cmd, update in prepare()
 OUTDIR=$2
@@ -63,6 +67,7 @@ help()
 	echo "3. Debug helper:"
 	echo "	./make.sh elf		--- dump elf file with -D(default)"
 	echo "	./make.sh elf-S		--- dump elf file with -S"
+	echo "	./make.sh <addr>	--- dump function name and code position of address"
 	echo "	./make.sh map		--- cat u-boot.map"
 	echo "	./make.sh sym		--- cat u-boot.sym"
 }
@@ -71,19 +76,22 @@ prepare()
 {
 	local absolute_path cmd dir count
 
-	# Parse output directory
+	# Parse output directory 'O=<dir>'
 	cmd=${OUTDIR%=*}
 	if [ "${cmd}" = 'O' ]; then
 		OUTDIR=${OUTDIR#*=}
 		OUTOPT=O=${OUTDIR}
 	else
 		case $BOARD in
+			# Parse from exit .config
 			''|elf*|trust|loader|uboot|map|sym)
 			count=`find -name .config | wc -l`
 			dir=`find -name .config`
+			# Good, find only one .config
 			if [ $count -eq 1 ]; then
 				dir=${dir%/*}
 				OUTDIR=${dir#*/}
+				# Set OUTOPT if not current directory
 				if [ $OUTDIR != '.' ]; then
 					OUTOPT=O=${OUTDIR}
 				fi
@@ -109,17 +117,21 @@ prepare()
 
 	# Parse help and make defconfig
 	case $BOARD in
-		#help
+		#Help
 		--help|-help|help|--h|-h)
 		help
 		exit 0
 		;;
-		#subcmd
+
+		#Subcmd
 		''|elf*|trust|loader|uboot|map|sym)
 		;;
 
 		*)
-		if [ ! -f configs/${BOARD}_defconfig ]; then
+		#Func address is valid ?
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ]; then
+			return
+		elif [ ! -f configs/${BOARD}_defconfig ]; then
 			echo
 			echo "Can't find: configs/${BOARD}_defconfig"
 			echo
@@ -160,6 +172,7 @@ select_toolchain()
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
+			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM64}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_ARM64}"
 			exit 1
@@ -169,13 +182,14 @@ select_toolchain()
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
+			TOOLCHAIN_ADDR2LINE=${absolute_path}/bin/${ADDR2LINE_ARM32}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_ARM32}"
 			exit 1
 		fi
 	fi
 
-	echo "toolchain: ${TOOLCHAIN_GCC}"
+	# echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
 sub_commands()
@@ -223,6 +237,13 @@ sub_commands()
 		;;
 
 		*)
+		# Search function and code position of address
+		if [ -z $(echo ${FUNCADDR} | sed 's/[0-9,a-f,A-F]//g') ] && [ ${FUNCADDR} ]; then
+			echo
+			sed -n "/${FUNCADDR}/p" ${OUTDIR}/u-boot.sym
+			${TOOLCHAIN_ADDR2LINE} -e ${OUTDIR}/u-boot ${FUNCADDR}
+			exit 0
+		fi
 		;;
 	esac
 }

commit 4ffb5e6c045ffa9c36397aef8677a5b4b4e52176
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 13 18:35:13 2018 +0800

    clk: rockchip: rk3308: Modify the print format of clk
    
    Change-Id: Idb56e8c662fafe443e8f271046d8b6298b1ca5ec
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 6d2c6818fe..93e4e7d6fb 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -1152,7 +1152,7 @@ int soc_clk_dump(void)
 		return ret;
 	}
 
-	printf("CLK:");
+	printf("CLK:\n");
 	for (i = 0; i < clk_count; i++) {
 		clk_dump = &clks_dump[i];
 		if (clk_dump->name) {
@@ -1165,18 +1165,18 @@ int soc_clk_dump(void)
 			clk_free(&clk);
 			if (i == 0) {
 				if (rate < 0)
-					printf("%10s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%10s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			} else {
 				if (rate < 0)
-					printf("%14s%20s\n", clk_dump->name,
+					printf("%s %s\n", clk_dump->name,
 					       "unknown");
 				else
-					printf("%14s%20lu Hz\n", clk_dump->name,
-					       rate);
+					printf("%s %lu KHz\n", clk_dump->name,
+					       rate / 1000);
 			}
 		}
 	}

commit e27c054accf03ff4aba0a25d12c0e6a69d197d11
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Jul 6 18:35:21 2018 +0800

    rockchip: clk: rk3308: Correct clock divisor range assertions
    
    Change-Id: I97e8b1b5c454d9cea4126a302491a63f1d57b430
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index de0f32459d..6d2c6818fe 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -313,7 +313,7 @@ static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 	u32 src_clk_div, con_id;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk->id) {
 	case SCLK_I2C0:
@@ -433,7 +433,7 @@ static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
-	assert(src_clk_div - 1 < 2047);
+	assert(src_clk_div - 1 <= 2047);
 
 	rk_clrsetreg(&cru->clksel_con[34],
 		     CLK_SARADC_DIV_CON_MASK,
@@ -476,7 +476,7 @@ static ulong rk3308_spi_set_clk(struct clk *clk, uint hz)
 	u32 src_clk_div, con_id;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk->id) {
 	case SCLK_SPI0:
@@ -520,7 +520,7 @@ static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	rk_clrsetreg(&cru->clksel_con[29],
 		     CLK_PWM_PLL_SEL_MASK | CLK_PWM_DIV_CON_MASK,
@@ -653,7 +653,7 @@ static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select dpll as pd_bus bus clock source and
@@ -716,7 +716,7 @@ static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select dpll as pd_peri bus clock source and
@@ -775,7 +775,7 @@ static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select vpll0 as audio bus clock source and

commit cb981eea7f8bf4140582e538792b59c1b282eef4
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Jul 6 18:33:18 2018 +0800

    rockchip: clk: px30: Correct clock divisor range assertions
    
    Change-Id: Ie187ca603b47bfedaa33041ce85e78be7d4b5b23
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 87705cf542..087664a419 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -323,7 +323,7 @@ static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_I2C0:
@@ -382,7 +382,7 @@ static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
 	/* Select nandc source from GPLL by default */
 	/* nandc clock defaulg div 2 internal, need provide double in cru */
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	rk_clrsetreg(&cru->clksel_con[15],
 		     NANDC_CLK_SEL_MASK | NANDC_PLL_MASK |
@@ -495,7 +495,7 @@ static ulong px30_pwm_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_PWM0:
@@ -537,7 +537,7 @@ static ulong px30_saradc_set_clk(struct px30_clk_priv *priv, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
-	assert(src_clk_div - 1 < 2047);
+	assert(src_clk_div - 1 <= 2047);
 
 	rk_clrsetreg(&cru->clksel_con[55],
 		     CLK_SARADC_DIV_CON_MASK,
@@ -574,7 +574,7 @@ static ulong px30_spi_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_SPI0:
@@ -628,7 +628,7 @@ static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	switch (clk_id) {
 	case ACLK_VOPB:
@@ -700,7 +700,7 @@ static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	switch (clk_id) {
 	case ACLK_BUS_PRE:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[23],
 			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
 			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
@@ -708,7 +708,7 @@ static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 		break;
 	case HCLK_BUS_PRE:
 		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-		assert(src_clk_div - 1 < 31);
+		assert(src_clk_div - 1 <= 31);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PLL_SEL_MASK | BUS_HCLK_DIV_MASK,
 			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
@@ -717,7 +717,7 @@ static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	case PCLK_BUS_PRE:
 		src_clk_div =
 			DIV_ROUND_UP(px30_bus_get_clk(priv, ACLK_BUS_PRE), hz);
-		assert(src_clk_div - 1 < 3);
+		assert(src_clk_div - 1 <= 3);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PCLK_DIV_MASK,
 			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
@@ -760,7 +760,7 @@ static ulong px30_peri_set_clk(struct px30_clk_priv *priv, ulong clk_id,
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	/*
 	 * select gpll as pd_peri bus clock source and
@@ -1219,7 +1219,7 @@ static ulong px30_pclk_pmu_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
-	assert(src_clk_div - 1 < 31);
+	assert(src_clk_div - 1 <= 31);
 
 	rk_clrsetreg(&pmucru->pmu_clksel_con[0],
 		     CLK_PMU_PCLK_DIV_MASK,

commit 6944022d144469efd258f42e8b2af7af1f76a3cc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Jul 9 14:17:56 2018 +0800

    clk: rockchip: rk3399: remove pll init
    
    use the dts node to set rate by:
    assigned-clocks = <&cru PLL_GPLL>;
    assigned-clock-rates = <800000000>;
    
    Change-Id: I2a674213509308fcd5ad27239bdf261c428d8027
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f7683ab33b..8ece6e9578 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -50,9 +50,6 @@ struct pll_div {
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
-static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
-static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 2, 2);
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
@@ -1158,11 +1155,6 @@ static void rkclk_init(struct rk3399_cru *cru)
 	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
 	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
 
-	/* configure gpll cpll */
-	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
-	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
-	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
-
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
 	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);

commit 6e4c159cf46cc2d683b6f3a058c6a225b055d40f
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 10:59:19 2018 +0800

    usb: dwc3: get rid of debug compile error
    
    When enable debug option to compile, it will give the
    following error, this patch is used to get rid of it.
    
    error: ‘flags’ is used uninitialized in this function [-Werror=uninitialized]
    
    Change-Id: Iba4cd59ab28eb7a48490e45842541f0418239e17
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index e61d98046f..4f32ceb271 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -217,7 +217,7 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 	struct dwc3			*dwc = dep->dwc;
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 
 	int				ret;
 
@@ -284,7 +284,7 @@ int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
 
 int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
 {
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	spin_lock_irqsave(&dwc->lock, flags);
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index e065c5aeb3..af71b62a5d 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -594,7 +594,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 		const struct usb_endpoint_descriptor *desc)
 {
 	struct dwc3_ep			*dep;
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
@@ -642,7 +642,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 static int dwc3_gadget_ep_disable(struct usb_ep *ep)
 {
 	struct dwc3_ep			*dep;
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	if (!ep) {
@@ -1064,7 +1064,7 @@ static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
 	struct dwc3_request		*req = to_dwc3_request(request);
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 
 	int				ret;
 
@@ -1103,7 +1103,7 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 	struct dwc3			*dwc = dep->dwc;
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret = 0;
 
 	spin_lock_irqsave(&dwc->lock, flags);
@@ -1185,7 +1185,7 @@ static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
 {
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
 
-	unsigned long			flags;
+	unsigned long			flags = 0;
 
 	int				ret;
 
@@ -1199,7 +1199,7 @@ static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
 static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
 {
 	struct dwc3_ep			*dep = to_dwc3_ep(ep);
-	unsigned long			flags;
+	unsigned long			flags = 0;
 	int				ret;
 
 	spin_lock_irqsave(&dwc->lock, flags);
@@ -1260,7 +1260,7 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g)
 	struct dwc3		*dwc = gadget_to_dwc(g);
 
 	unsigned long		timeout;
-	unsigned long		flags;
+	unsigned long		flags = 0;
 
 	u32			reg;
 
@@ -1339,7 +1339,7 @@ static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
 		int is_selfpowered)
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
-	unsigned long		flags;
+	unsigned long		flags = 0;
 
 	spin_lock_irqsave(&dwc->lock, flags);
 	dwc->is_selfpowered = !!is_selfpowered;
@@ -1405,7 +1405,7 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
-	unsigned long		flags;
+	unsigned long		flags = 0;
 	int			ret;
 
 	is_on = !!is_on;
@@ -1446,7 +1446,7 @@ static int dwc3_gadget_start(struct usb_gadget *g,
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
 	struct dwc3_ep		*dep;
-	unsigned long		flags;
+	unsigned long		flags = 0;
 	int			ret = 0;
 	u32			reg;
 
@@ -1545,7 +1545,7 @@ err1:
 static int dwc3_gadget_stop(struct usb_gadget *g)
 {
 	struct dwc3		*dwc = gadget_to_dwc(g);
-	unsigned long		flags;
+	unsigned long		flags = 0;
 
 	spin_lock_irqsave(&dwc->lock, flags);
 
@@ -2490,7 +2490,7 @@ static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf)
 static irqreturn_t dwc3_thread_interrupt(int irq, void *_dwc)
 {
 	struct dwc3 *dwc = _dwc;
-	unsigned long flags;
+	unsigned long flags = 0;
 	irqreturn_t ret = IRQ_NONE;
 	int i;
 

commit e7b5bb3cc9527752c2c01acb4325fc0721fb75aa
Author: William Wu <william.wu@rock-chips.com>
Date:   Mon Jul 9 08:55:21 2018 +0800

    rockchip: usb: dwc2: support rk3288 usb with kernel dtb
    
    Whit kernel dtb support, we need to get rk3288 dwc2 otg
    node by compatible "rockchip,rk3288_usb20_otg" rather than
    "snps,dwc2", because rk3288 dwc2 otg uses rockchip legacy
    dwc2 driver "dwc_otg_310".
    
    Change-Id: Ib7b536e554776f1dd09d34d0a2ac1754df9c753e
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index aea9dc2d64..4618b4bb4c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -320,9 +320,21 @@ int board_usb_init(int index, enum usb_init_type init)
 		node = fdt_node_offset_by_compatible(blob, node,
 					"snps,dwc2");
 	}
+
 	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
+		/*
+		 * With kernel dtb support, rk3288 dwc2 otg node
+		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
+		 * with the compatible "rockchip,rk3288_usb20_otg".
+		 */
+		node = fdt_node_offset_by_compatible(blob, -1,
+				"rockchip,rk3288_usb20_otg");
+		if (node > 0) {
+			matched = true;
+		} else {
+			pr_err("Not found usb_otg device\n");
+			return -ENODEV;
+		}
 	}
 
 	reg = fdt_getprop(blob, node, "reg", NULL);
diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index 720014a6ce..133664b380 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -87,8 +87,19 @@ static int otg_phy_parse(struct dwc2_udc *dev)
 	}
 
 	if (!matched) {
-		pr_err("Not found usb_otg device\n");
-		return -ENODEV;
+		/*
+		 * With kernel dtb support, rk3288 dwc2 otg node
+		 * use the rockchip legacy dwc2 driver "dwc_otg_310"
+		 * with the compatible "rockchip,rk3288_usb20_otg".
+		 */
+		node = fdt_node_offset_by_compatible(blob, -1,
+				"rockchip,rk3288_usb20_otg");
+		if (node > 0) {
+			matched = true;
+		} else {
+			pr_err("Not found usb_otg device\n");
+			return -ENODEV;
+		}
 	}
 
 	/* Find the usb phy node */

commit 00129fb35e18b7c7c58d07e31fc9451558acb1a1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jul 4 16:38:46 2018 +0800

    env: add env_update_filter()
    
    provide ignore option to filter unused key words from a
    list of new string which is ready to be appended.
    
    Change-Id: I82d61ee21ec658e73549de42ad94ed259582cb7a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index c063abfd2e..96a4fab1c7 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -401,7 +401,8 @@ static int env_replace(const char *varname, const char *substr,
 
 #define ARGS_ITEM_NUM	50
 
-int env_update(const char *varname, const char *varvalue)
+int env_update_filter(const char *varname, const char *varvalue,
+		      const char *ignore)
 {
 	/* 'a_' means "varargs_'; 'v_' means 'varvalue_' */
 	char *varargs;
@@ -421,6 +422,8 @@ int env_update(const char *varname, const char *varvalue)
 	varargs = env_get(varname);
 	if (!varargs) {
 		env_set(varname, varvalue);
+		if (ignore && strstr(varvalue, ignore))
+			env_delete(varname, ignore);
 		return 0;
 	}
 
@@ -455,6 +458,13 @@ int env_update(const char *varname, const char *varvalue)
 	v_item = strtok(v_string_tok, " ");
 	while (v_item && j < ARGS_ITEM_NUM) {
 		debug("%s: <v_item %d>: %s\n", __func__, j, v_item);
+
+		/* filter ignore string */
+		if (ignore && strstr(v_item, ignore)) {
+			v_item = strtok(NULL, " ");
+			continue;
+		}
+
 		if (strstr(v_item, "="))
 			v_items[j++] = v_item;
 		else
@@ -517,6 +527,11 @@ int env_update(const char *varname, const char *varvalue)
 	return 0;
 }
 
+int env_update(const char *varname, const char *varvalue)
+{
+	return env_update_filter(varname, varvalue, NULL);
+}
+
 int env_exist(const char *varname, const char *varvalue)
 {
 	char *value;
diff --git a/include/common.h b/include/common.h
index 8230914d7a..a53559a3e5 100644
--- a/include/common.h
+++ b/include/common.h
@@ -329,6 +329,19 @@ int env_get_yesno(const char *var);
  */
 int env_set(const char *varname, const char *value);
 
+/**
+ * env_update() - update sub value of an environment variable
+ *
+ * This add/append/replace the sub value of an environment variable.
+ *
+ * @varname: Variable to adjust
+ * @valude: Value to append/replace
+ * @ignore: Value to be ignore if in varvalue
+ * @return 0 if OK, 1 on error
+ */
+int env_update_filter(const char *varname, const char *varvalue,
+		      const char *ignore);
+
 /**
  * env_update() - update sub value of an environment variable
  *

commit c204540bc37e824ff67199d56bcc291c3c5e4347
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 9 10:40:03 2018 +0800

    regulator: rk8xx: remove REG_DCDC_UV_ACT setting
    
    no special reason to remove, just to keep the same setting
    with rkdevelop which is stable.
    
    Change-Id: I3fe810d7080e29525cdf24c4475b0acb5380a9c5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 5fe2fdef16..69b1515c3f 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -322,10 +322,6 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 					      0, 3 << (buck * 2));
 			if (ret)
 				return ret;
-			ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT,
-					      1 << buck, 0);
-			if (ret)
-				return ret;
 		}
 		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
 				      enable ? mask : 0);

commit 537b230e8fb44493edfd55a2a0735b4475e2485e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jul 6 16:51:00 2018 +0800

    regulator: pwm: support "rockchip,pwm_voltage" init voltage
    
    1. add this property to compabile legacy pwm regulator driver
       on rkdevelop;
    2. give default init voltage 1.1v;
    
    Change-Id: I7b1f989c28d91edd6e467ae1ba94299c6d695afb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 6cc6efa49d..7710e7960b 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -105,7 +105,14 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 
 	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
-		debug("Cannot find regulator pwm init_voltage\n");
+		debug("Cannot find 'regulator-init-microvolt'\n");
+
+		/*
+		 * 1. Compatible legacy pwm-regulator driver on rkdevelop;
+		 * 2. Give pwm-regulator default init voltage 1.1v;
+		 */
+		priv->init_voltage = dev_read_u32_default(dev, "rockchip,pwm_voltage",
+							  1100000);
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);
@@ -129,8 +136,11 @@ static int pwm_regulator_probe(struct udevice *dev)
 	priv->max_voltage = uc_pdata->max_uV;
 	priv->min_voltage = uc_pdata->min_uV;
 
-	if (priv->init_voltage)
+	if (priv->init_voltage > 0) {
+		printf("pwm-regulator(%s): init %d uV\n",
+		       dev->name, priv->init_voltage);
 		pwm_regulator_set_voltage(dev, priv->init_voltage);
+	}
 
 	return 0;
 }

commit a538876eebaf41333f49422a77885ed6f3fcac59
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 9 10:29:11 2018 +0800

    dm: regulator: print init voltage
    
    Change-Id: I266a76f43485eac8770e51787985b93992ef0668
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 4f50945f2f..145e7a5572 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -249,8 +249,13 @@ int regulator_autoset(struct udevice *dev)
 
 	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
 		ret = regulator_set_value(dev, uc_pdata->min_uV);
-	if (uc_pdata->init_uV > 0)
+	if (uc_pdata->init_uV > 0) {
 		ret = regulator_set_value(dev, uc_pdata->init_uV);
+		if (!ret)
+			printf("regulator(%s) init %d uV\n",
+			       dev->name, uc_pdata->init_uV);
+	}
+
 	if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA))
 		ret = regulator_set_current(dev, uc_pdata->min_uA);
 

commit fe9a00a2067c67e587f4db6cb05f3220e89c31d0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Wed Jul 4 18:07:34 2018 +0800

    drivers: rknand: zftl fix 2cs 3d mlc nand gc fail issue
    
    bug:
    1ppa = 2212a00, status = 0, 2d1db 2bc05 spare: 3a20ea 2d1dc 22bc05 0
    1ppa = 2212a00, status = 1, 3b8ef 25fe52 spare: 3a6bfa 3c5d6 5fe53 2
    1ppa = 2212a00, status = 0, 2d1db 2bc05 spare: 3a20ea 2d1dc 22bc05 0
    1ppa = 2212a00, status = 1, 3b8ef 25fe52 spare: 3a6bfa 3c5d6 5fe53 2
    
    Change-Id: I30c0789a8629ec76ab126b1ac7a49fe6bf7ff061
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index b85cec9848..6cf6fd60b1 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-06-15
+ * date: 2018-07-04
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -3288,7 +3288,7 @@ gc_write_completed:
 	bl	printf
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 539
+	mov	w2, 544
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -3327,7 +3327,7 @@ gc_write_completed:
 	beq	.L614
 	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
-	mov	w2, 546
+	mov	w2, 551
 	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -4905,7 +4905,7 @@ gc_free_src_blk:
 .L872:
 	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 793
+	mov	w2, 798
 	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -7544,10 +7544,9 @@ gc_static_wearleveling:
 	cmp	w2, w0
 	ble	.L1254
 	ldr	w0, [x4, x3]
-	add	w2, w21, 2
 	ubfx	x0, x0, 11, 8
-	cmp	w0, w2
-	ble	.L1255
+	cmp	w0, w21
+	bls	.L1255
 	cbz	w1, .L1254
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
@@ -7605,13 +7604,13 @@ gc_static_wearleveling:
 	cmp	w0, w2
 	ble	.L1254
 	ldrh	w0, [x4, x3]
-	add	w2, w20, 2
+	add	w2, w20, 8
 	and	w0, w0, 2047
 	cmp	w0, w2
 	ble	.L1256
 	cbz	w1, .L1254
 	ldr	w0, [x4, x3]
-	add	w1, w21, 2
+	add	w1, w21, 4
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
 	bgt	.L1254
@@ -11776,154 +11775,6 @@ sblk_read_page:
 	bl	queue_remove_completed_req
 	b	.L2017
 	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.gc_check_data_one_wl,"ax",@progbits
-	.align	2
-	.global	gc_check_data_one_wl
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	sub	sp, sp, #112
-	adrp	x0, .LANCHOR10
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR62
-	add	x20, x19, :lo12:.LANCHOR62
-	stp	x21, x22, [sp, 48]
-	ldr	x21, [x0, #:lo12:.LANCHOR10]
-	stp	x23, x24, [sp, 64]
-	ldr	x0, [x20, 8]
-	stp	x25, x26, [sp, 80]
-	str	x27, [sp, 96]
-	cbnz	x0, .L2032
-	mov	w0, 1
-	bl	buf_alloc
-	str	x0, [x20, 8]
-.L2032:
-	add	x0, x19, :lo12:.LANCHOR62
-	ldr	x20, [x0, 8]
-	cbnz	x20, .L2033
-	adrp	x1, .LANCHOR167
-	adrp	x0, .LC0
-	mov	w2, 366
-	add	x1, x1, :lo12:.LANCHOR167
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2033:
-	adrp	x26, .LANCHOR105
-	adrp	x27, .LANCHOR68
-	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR105
-	add	x27, x27, :lo12:.LANCHOR68
-	mov	w24, 0
-.L2034:
-	ldrb	w0, [x21, 89]
-	cmp	w24, w0
-	bge	.L2043
-	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR62
-	b	.L2044
-.L2042:
-	ldrh	w0, [x25]
-	ldrh	w1, [x26]
-	ldrb	w2, [x27]
-	cmp	w2, 3
-	mul	w1, w0, w1
-	ldrh	w0, [x22, 16]
-	bne	.L2035
-	add	w0, w0, w1
-	orr	w0, w0, w23, lsl 24
-.L2055:
-	str	w0, [x20, 40]
-	mov	w1, 1
-	mov	x0, x20
-	bl	sblk_read_page
-	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR147
-	cmn	w2, #1
-	beq	.L2038
-	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR147]
-	ldr	x3, [x20, 24]
-	lsl	x0, x0, 2
-	ldr	w5, [x4, x0]
-	ldr	w4, [x3, 4]
-	cmp	w5, w4
-	bne	.L2038
-	adrp	x4, .LANCHOR148
-	ldr	x4, [x4, #:lo12:.LANCHOR148]
-	ldr	w4, [x4, x0]
-	ldr	w0, [x3, 8]
-	cmp	w4, w0
-	beq	.L2039
-.L2038:
-	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR147]
-	lsl	x0, x0, 2
-	ldr	w3, [x1, x0]
-	cmn	w3, #1
-	beq	.L2039
-	adrp	x1, .LANCHOR14
-	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 10, .L2040
-	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR148
-	ldr	x4, [x4, #:lo12:.LANCHOR148]
-	ldr	w5, [x1, 12]
-	str	w5, [sp]
-	ldr	w4, [x4, x0]
-	adrp	x0, .LC120
-	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC120
-	ldr	w7, [x1, 8]
-	ldr	w1, [x20, 40]
-	bl	printf
-.L2040:
-	adrp	x0, .LANCHOR9
-	ldrh	w1, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
-	strh	wzr, [x0, x1, lsl 1]
-	mov	w0, -1
-.L2031:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x29, x30, [sp, 16]
-	ldr	x27, [sp, 96]
-	add	sp, sp, 112
-	ret
-.L2035:
-	cmp	w2, 2
-	bne	.L2037
-	sub	w0, w0, #1
-	add	w1, w23, w1
-	add	w0, w0, w1
-	orr	w0, w0, 33554432
-	b	.L2055
-.L2037:
-	add	w0, w0, w1
-	b	.L2055
-.L2039:
-	ldrh	w0, [x22, 22]
-	add	w23, w23, 1
-	add	w0, w0, 1
-	strh	w0, [x22, 22]
-.L2044:
-	ldrh	w0, [x22, 20]
-	cmp	w23, w0
-	ble	.L2042
-	add	w24, w24, 1
-	add	x25, x25, 2
-	b	.L2034
-.L2043:
-.L2041:
-	add	x19, x19, :lo12:.LANCHOR62
-	ldrh	w0, [x19, 16]
-	add	w0, w0, 1
-	strh	w0, [x19, 16]
-	mov	w0, 0
-	b	.L2031
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
 	.global	flash_prog_page
@@ -11949,22 +11800,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L2057
-	adrp	x0, .LC121
+	tbz	x0, 4, .L2032
+	adrp	x0, .LC120
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L2057:
+.L2032:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L2058
+	cbnz	w28, .L2033
 	bl	zftl_flash_enter_slc_mode
-.L2059:
+.L2034:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11993,15 +11844,15 @@ flash_prog_page:
 	mov	w2, w0
 	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L2056
+	tbz	x2, 2, .L2031
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2056
-	adrp	x0, .LC122
+	tbz	x0, 12, .L2031
+	adrp	x0, .LC121
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC122
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L2056:
+.L2031:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12010,9 +11861,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2058:
+.L2033:
 	bl	zftl_flash_exit_slc_mode
-	b	.L2059
+	b	.L2034
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -12026,12 +11877,12 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L2072
-	adrp	x0, .LANCHOR168
-	ldrb	w0, [x0, #:lo12:.LANCHOR168]
+	bne	.L2047
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	cmp	w0, w19
-	bhi	.L2076
-.L2072:
+	bhi	.L2051
+.L2047:
 	adrp	x22, .LANCHOR160
 	adrp	x23, .LANCHOR161
 	mov	w2, 32
@@ -12049,7 +11900,7 @@ flash_test_blk:
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2049
 	adrp	x19, .LANCHOR34
 	add	x19, x19, :lo12:.LANCHOR34
 	ldr	x3, [x22, #:lo12:.LANCHOR160]
@@ -12059,7 +11910,7 @@ flash_test_blk:
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2049
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
 	ldr	x3, [x22, #:lo12:.LANCHOR160]
@@ -12068,35 +11919,35 @@ flash_test_blk:
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L2074
+	beq	.L2049
 	ldr	x0, [x23, #:lo12:.LANCHOR161]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L2074
+	bne	.L2049
 	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L2075
-.L2074:
+	beq	.L2050
+.L2049:
 	mov	w19, -1
-.L2075:
+.L2050:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L2071:
+.L2046:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2076:
+.L2051:
 	mov	w0, 0
-	b	.L2071
+	b	.L2046
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -12107,45 +11958,45 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR169
+	adrp	x0, .LANCHOR168
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR169]
+	ldrb	w0, [x0, #:lo12:.LANCHOR168]
 	str	x25, [sp, 64]
-	cbnz	w0, .L2087
+	cbnz	w0, .L2062
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L2087
+	bhi	.L2062
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L2087
+	tbz	x0, 0, .L2062
 	adrp	x21, .LANCHOR133
 	mov	w23, w1
 	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
 	adrp	x24, .LANCHOR151
-.L2089:
+.L2064:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L2090
-.L2087:
+	bhi	.L2065
+.L2062:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2090:
+.L2065:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L2087
+	bne	.L2062
 	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
@@ -12158,7 +12009,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L2089
+	b	.L2064
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -12175,16 +12026,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L2093
+	bls	.L2068
 	cmp	w1, 575
-	bhi	.L2094
-	adrp	x0, .LANCHOR170
+	bhi	.L2069
+	adrp	x0, .LANCHOR169
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR170]
+	str	w2, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, idb_buf
-	bhi	.L2095
+	bhi	.L2070
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -12192,9 +12043,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2171:
+.L2146:
 	bl	ftl_memcpy
-.L2150:
+.L2125:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12203,7 +12054,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L2095:
+.L2070:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -12213,14 +12064,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2171
-.L2093:
+	b	.L2146
+.L2068:
 	cmp	w1, 575
-	bls	.L2150
-.L2094:
-	adrp	x0, .LANCHOR170
-	ldr	w0, [x0, #:lo12:.LANCHOR170]
-	cbz	w0, .L2150
+	bls	.L2125
+.L2069:
+	adrp	x0, .LANCHOR169
+	ldr	w0, [x0, #:lo12:.LANCHOR169]
+	cbz	w0, .L2125
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
@@ -12242,9 +12093,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L2100:
+.L2075:
 	ldr	w5, [x1]
-	cbnz	w5, .L2098
+	cbnz	w5, .L2073
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -12252,19 +12103,19 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L2100
-.L2098:
+	bne	.L2075
+.L2073:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2134:
+.L2109:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -12277,7 +12128,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L2101
+	beq	.L2076
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
@@ -12297,11 +12148,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2140
+	bne	.L2115
 	adrp	x0, .LANCHOR27
 	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2140
+	bne	.L2115
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -12337,19 +12188,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L2102:
+.L2077:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR169
+	adrp	x28, .LANCHOR168
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR169
+	add	x0, x28, :lo12:.LANCHOR168
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2104:
+.L2079:
 	cmp	w27, w20
-	bhi	.L2115
+	bhi	.L2090
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR45
 	strb	wzr, [x19, #:lo12:.LANCHOR45]
@@ -12375,10 +12226,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2116:
+.L2091:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2130
+	bcc	.L2105
 	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -12387,21 +12238,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2131:
+.L2106:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2132
+	bcc	.L2107
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L2101
-	b	.L2136
-.L2140:
+	bls	.L2076
+	b	.L2111
+.L2115:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L2102
-.L2115:
+	b	.L2077
+.L2090:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -12409,30 +12260,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2106
+	cbz	w2, .L2081
 	adrp	x0, .LANCHOR1
 	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2106:
+.L2081:
 	adrp	x1, .LANCHOR27
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2108
-.L2169:
+	bne	.L2083
+.L2144:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2110
+	cbnz	w2, .L2085
 	mov	w5, w0
-.L2111:
+.L2086:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR43
 	adrp	x0, .LANCHOR17
-	cbnz	x6, .L2112
+	cbnz	x6, .L2087
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12452,31 +12303,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR169]
+	ldrb	w0, [x28, #:lo12:.LANCHOR168]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2113
+	cbnz	w0, .L2088
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2113:
+.L2088:
 	add	x22, x22, 2048
-.L2114:
+.L2089:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2104
-.L2108:
+	b	.L2079
+.L2083:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2169
-.L2110:
+	b	.L2144
+.L2085:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2111
-.L2112:
+	b	.L2086
+.L2087:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR43]
@@ -12495,21 +12346,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2114
-.L2130:
+	b	.L2089
+.L2105:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR169
+	adrp	x1, .LANCHOR168
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR169]
+	ldrb	w1, [x1, #:lo12:.LANCHOR168]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2117
+	cbnz	w1, .L2092
 	mov	w19, w0
-.L2118:
+.L2093:
 	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR17]
@@ -12529,7 +12380,7 @@ idb_write_data:
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2119:
+.L2094:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12538,32 +12389,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2120
+	bne	.L2095
 	ldrb	w6, [x25]
-	cbnz	w6, .L2121
-.L2124:
+	cbnz	w6, .L2096
+.L2099:
 	adrp	x0, .LANCHOR156
 	ldr	x6, [x0, #:lo12:.LANCHOR156]
-	cbnz	x6, .L2122
-.L2123:
+	cbnz	x6, .L2097
+.L2098:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2120
+	cbz	w0, .L2095
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2170
-.L2117:
+	b	.L2145
+.L2092:
 	adrp	x0, .LANCHOR1
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2118
-.L2121:
+	b	.L2093
+.L2096:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12577,21 +12428,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2124
-.L2170:
+	beq	.L2099
+.L2145:
 	mov	w5, w0
-.L2120:
+.L2095:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2126
+	beq	.L2101
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2119
-.L2122:
+	b	.L2094
+.L2097:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12601,9 +12452,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2123
-	b	.L2170
-.L2126:
+	beq	.L2098
+	b	.L2145
+.L2101:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12613,62 +12464,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2128
+	bne	.L2103
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2128
+	cbnz	w0, .L2103
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2128
+	bne	.L2103
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2129:
+.L2104:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2116
-.L2128:
+	b	.L2091
+.L2103:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2129
-.L2132:
+	b	.L2104
+.L2107:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2131
+	beq	.L2106
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L2101:
+.L2076:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2134
+	bne	.L2109
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2136
-	adrp	x0, .LC125
+	cbnz	w0, .L2111
+	adrp	x0, .LC124
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L2136:
-	adrp	x0, .LANCHOR170
-	str	wzr, [x0, #:lo12:.LANCHOR170]
-	b	.L2150
+.L2111:
+	adrp	x0, .LANCHOR169
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+	b	.L2125
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12691,14 +12542,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2173
-	adrp	x1, .LANCHOR171
+	bhi	.L2148
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR171
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2173:
+.L2148:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w4, [x0, w19, sxtw]
@@ -12706,12 +12557,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2174
+	cbz	w25, .L2149
 	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2174:
+.L2149:
 	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
 	add	x19, x19, x4
@@ -12811,21 +12662,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2182:
+.L2157:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2183
+	cbnz	w0, .L2158
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2183:
+.L2158:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2182
+	b	.L2157
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12842,13 +12693,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2186:
+.L2161:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2187
+	cbnz	w0, .L2162
 	cmp	w24, 2
-	bne	.L2188
+	bne	.L2163
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12928,21 +12779,21 @@ sblk_xlc_prog_pages:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2189:
+.L2164:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2187:
+.L2162:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2186
-.L2188:
+	b	.L2161
+.L2163:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2189
+	b	.L2164
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12965,40 +12816,40 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2192
-	adrp	x1, .LANCHOR172
+	bhi	.L2167
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 699
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2192:
+.L2167:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR13
 	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2193
+	cbnz	w0, .L2168
 	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2194
+	bne	.L2169
 	bl	nandc_wait_flash_ready
-.L2193:
+.L2168:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2195
+	cbnz	w22, .L2170
 	mov	w0, w20
 	bl	slc_phy_page_address_calc
 	mov	w20, w0
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2196
+	cbz	w0, .L2171
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L2196:
+.L2171:
 	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
 	add	x19, x19, x21
@@ -13028,16 +12879,16 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs.constprop.29
-.L2194:
+.L2169:
 	mov	w2, 64
 	mov	w1, w20
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L2193
-.L2195:
+	b	.L2168
+.L2170:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2196
+	b	.L2171
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -13056,23 +12907,23 @@ queue_prog_cmd:
 	ldr	w3, [x19, 40]
 	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2202
+	beq	.L2177
 	adrp	x2, .LANCHOR49
 	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2204:
+.L2179:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2203
+	bne	.L2178
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2203
+	bne	.L2178
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2202:
+.L2177:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -13084,12 +12935,12 @@ queue_prog_cmd:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2203:
+.L2178:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2204
-	b	.L2202
+	bne	.L2179
+	b	.L2177
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -13106,25 +12957,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2211
+	cbz	w0, .L2186
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2211
+	tbz	x0, 8, .L2186
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC126
+	adrp	x0, .LC125
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2211:
+.L2186:
 	adrp	x25, .LANCHOR38
 	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
 	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2212:
-	cbnz	w20, .L2223
-.L2236:
+.L2187:
+	cbnz	w20, .L2198
+.L2211:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13133,49 +12984,49 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2223:
+.L2198:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2213:
+.L2188:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2214
+	cbnz	w0, .L2189
 	cmp	w20, 1
-	beq	.L2215
+	beq	.L2190
 	ldrb	w0, [x25]
-	cbnz	w0, .L2216
-.L2215:
+	cbnz	w0, .L2191
+.L2190:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2217:
+.L2192:
 	subs	w20, w20, #1
-	beq	.L2236
+	beq	.L2211
 	ubfiz	x19, x26, 6, 8
 	add	x19, x23, x19
-	b	.L2212
-.L2214:
+	b	.L2187
+.L2189:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2213
-.L2216:
+	b	.L2188
+.L2191:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2218
-	adrp	x1, .LANCHOR173
+	bne	.L2193
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR173
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2218:
+.L2193:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2219
+	bne	.L2194
 	adrp	x0, .LANCHOR99
 	ldrh	w2, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR98
@@ -13198,9 +13049,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2219
+	bne	.L2194
 	cmp	w21, w3
-	beq	.L2219
+	beq	.L2194
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -13216,12 +13067,12 @@ sblk_prog_page:
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2217
-.L2219:
+	b	.L2192
+.L2194:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2217
+	b	.L2192
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -13234,17 +13085,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR174
-	cbz	w1, .L2239
-	ldrb	w2, [x20, #:lo12:.LANCHOR174]
+	adrp	x20, .LANCHOR173
+	cbz	w1, .L2214
+	ldrb	w2, [x20, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2239:
+.L2214:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR119]
-	strb	w0, [x20, #:lo12:.LANCHOR174]
+	strb	w0, [x20, #:lo12:.LANCHOR173]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -13273,43 +13124,43 @@ flash_prog_page_en:
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2245
-	adrp	x1, .LANCHOR175
+	bhi	.L2220
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2245:
+.L2220:
 	adrp	x0, .LANCHOR29
 	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2255
+	cbnz	w19, .L2230
 	adrp	x0, .LANCHOR0
 	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LANCHOR1
-	cbz	w1, .L2247
+	cbz	w1, .L2222
 	ldrb	w1, [x0, #:lo12:.LANCHOR1]
-	cbz	w1, .L2255
-.L2247:
+	cbz	w1, .L2230
+.L2222:
 	adrp	x1, .LANCHOR2
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2248
+	cbz	w0, .L2223
 	add	w19, w19, w1, lsl 1
-.L2246:
+.L2221:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 4, .L2249
-	adrp	x0, .LC127
+	tbz	x0, 4, .L2224
+	adrp	x0, .LC126
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC127
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2249:
+.L2224:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -13317,7 +13168,7 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2250
+	cbz	w21, .L2225
 	adrp	x26, .LANCHOR160
 	adrp	x21, .LANCHOR161
 	mov	w4, w25
@@ -13328,57 +13179,57 @@ flash_prog_page_en:
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2251
+	beq	.L2226
 	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2251
+	bne	.L2226
 	ldr	x0, [x26, #:lo12:.LANCHOR160]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2250
-.L2251:
+	beq	.L2225
+.L2226:
 	ldr	x1, [x26, #:lo12:.LANCHOR160]
 	mov	w3, 4
-	adrp	x0, .LC128
+	adrp	x0, .LC127
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC128
+	add	x0, x0, :lo12:.LC127
 	bl	rknand_print_hex
 	ldr	x1, [x21, #:lo12:.LANCHOR161]
 	mov	w3, 4
-	adrp	x0, .LC129
+	adrp	x0, .LC128
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
-.L2252:
+.L2227:
 	mov	w1, w20
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR175
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2253
-.L2248:
+	b	.L2228
+.L2223:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2246
-.L2255:
+	b	.L2221
+.L2230:
 	mov	w19, w20
-	b	.L2246
-.L2250:
+	b	.L2221
+.L2225:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2252
-.L2253:
+	beq	.L2227
+.L2228:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13396,7 +13247,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR176
+	adrp	x25, .LANCHOR175
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
@@ -13409,45 +13260,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR98
-	str	wzr, [x25, #:lo12:.LANCHOR176]
+	str	wzr, [x25, #:lo12:.LANCHOR175]
 	str	x0, [x29, 96]
-.L2267:
+.L2242:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2277
+	bls	.L2252
 	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2278
-.L2276:
+	b	.L2253
+.L2251:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2268
-	adrp	x0, .LC131
+	tbz	x0, 12, .L2243
+	adrp	x0, .LC130
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2268:
+.L2243:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2269
+	cbnz	w20, .L2244
 	adrp	x0, .LANCHOR26
 	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2270
-.L2269:
+	bcs	.L2245
+.L2244:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2270
+	cbnz	w0, .L2245
 	adrp	x0, .LANCHOR105
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR105]
@@ -13455,62 +13306,62 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2271
+	cbz	w0, .L2246
 	adrp	x0, .LANCHOR68
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2293
+	bne	.L2268
 	adrp	x0, .LANCHOR0
 	ldrb	w0, [x0, #:lo12:.LANCHOR0]
-	cbz	w0, .L2293
+	cbz	w0, .L2268
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2293
-.L2275:
+	cbnz	w0, .L2268
+.L2250:
 	adrp	x0, .LANCHOR68
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2274:
+.L2249:
 	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR176
+	add	x3, x25, :lo12:.LANCHOR175
 	add	x2, x24, :lo12:ftl_tmp_buffer
 	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2270
-.L2293:
+	cbz	w0, .L2245
+.L2268:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2270:
+.L2245:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2278:
+.L2253:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2276
+	bhi	.L2251
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2267
-.L2271:
-	cbz	w23, .L2274
-	b	.L2275
-.L2277:
-	cbz	w23, .L2279
-	adrp	x0, .LANCHOR7
+	b	.L2242
+.L2246:
+	cbz	w23, .L2249
+	b	.L2250
+.L2252:
+	cbz	w23, .L2254
+	adrp	x0, .LANCHOR7
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x21, x0, x21, uxth 2
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2279:
+.L2254:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13545,18 +13396,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2294
+	bne	.L2269
 	mov	w2, 2151
-	adrp	x1, .LANCHOR177
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR177
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC130
+	adrp	x0, .LC129
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2294:
+.L2269:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13575,24 +13426,24 @@ ftl_info_flush:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR179
+	adrp	x22, .LANCHOR178
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
 	ldrb	w2, [x21, #:lo12:.LANCHOR121]
-	add	x25, x22, :lo12:.LANCHOR179
+	add	x25, x22, :lo12:.LANCHOR178
 	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR178
+	adrp	x20, .LANCHOR177
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR178
+	add	x0, x20, :lo12:.LANCHOR177
 	bl	ftl_memset
-.L2298:
-	add	x0, x22, :lo12:.LANCHOR179
-	ldrb	w6, [x22, #:lo12:.LANCHOR179]
+.L2273:
+	add	x0, x22, :lo12:.LANCHOR178
+	ldrb	w6, [x22, #:lo12:.LANCHOR178]
 	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
 	adrp	x0, .LANCHOR97
@@ -13600,41 +13451,41 @@ ftl_info_flush:
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR178
-	str	w27, [x20, #:lo12:.LANCHOR178]
+	add	x0, x20, :lo12:.LANCHOR177
+	str	w27, [x20, #:lo12:.LANCHOR177]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2299
+	tbz	x0, 12, .L2274
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC132
+	adrp	x0, .LC131
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC131
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2299:
+.L2274:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2300
-	adrp	x19, .LANCHOR180
+	bhi	.L2275
+	adrp	x19, .LANCHOR179
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR180
+	add	x19, x19, :lo12:.LANCHOR179
 	add	x3, x3, :lo12:.LC0
-.L2307:
+.L2282:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2301
+	bls	.L2276
 	mov	x0, 0
-.L2306:
+.L2281:
 	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -13643,24 +13494,24 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2302
+	bhi	.L2277
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2305:
+.L2280:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2301:
+.L2276:
 	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2307
+	beq	.L2282
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
@@ -13668,7 +13519,7 @@ ftl_info_flush:
 	bl	flash_erase_block
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR178
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13676,53 +13527,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2308:
+.L2283:
 	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR178
+	add	x3, x20, :lo12:.LANCHOR177
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR181
+	adrp	x0, .LANCHOR180
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2309
-	ldrb	w1, [x0, #:lo12:.LANCHOR181]
-	cbz	w1, .L2310
-.L2309:
-	strb	wzr, [x0, #:lo12:.LANCHOR181]
-	b	.L2298
-.L2302:
+	beq	.L2284
+	ldrb	w1, [x0, #:lo12:.LANCHOR180]
+	cbz	w1, .L2285
+.L2284:
+	strb	wzr, [x0, #:lo12:.LANCHOR180]
+	b	.L2273
+.L2277:
 	cmp	w2, 255
-	bne	.L2305
+	bne	.L2280
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2306
+	bne	.L2281
 	mov	w24, w0
-	b	.L2305
-.L2300:
+	b	.L2280
+.L2275:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2308
+	cbnz	w0, .L2283
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2308
-.L2310:
-	cbnz	w24, .L2311
-.L2319:
-	adrp	x0, .LANCHOR179
-	ldrb	w0, [x0, #:lo12:.LANCHOR179]
+	b	.L2283
+.L2285:
+	cbnz	w24, .L2286
+.L2294:
+	adrp	x0, .LANCHOR178
+	ldrb	w0, [x0, #:lo12:.LANCHOR178]
 	cmp	w0, 255
-	bne	.L2313
-	adrp	x1, .LANCHOR180
+	bne	.L2288
+	adrp	x1, .LANCHOR179
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR180
+	add	x1, x1, :lo12:.LANCHOR179
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2313:
+.L2288:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13731,17 +13582,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2311:
+.L2286:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR180
+	adrp	x20, .LANCHOR179
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR180
+	add	x20, x20, :lo12:.LANCHOR179
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR26
-.L2314:
+.L2289:
 	cmp	w19, 7
-	bhi	.L2319
+	bhi	.L2294
 	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -13749,24 +13600,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2315
+	bhi	.L2290
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2316:
+.L2291:
 	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2317
-.L2315:
+	b	.L2292
+.L2290:
 	cmp	w23, 255
-	bne	.L2316
-.L2317:
+	bne	.L2291
+.L2292:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2314
+	b	.L2289
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13774,17 +13625,17 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR182
-	adrp	x1, .LANCHOR181
+	adrp	x0, .LANCHOR181
+	adrp	x1, .LANCHOR180
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR182]
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR181]
-	adrp	x1, .LANCHOR183
+	strb	w0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR182
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR183]
+	strb	w0, [x1, #:lo12:.LANCHOR182]
 	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
@@ -13793,7 +13644,7 @@ ftl_info_blk_init:
 	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
-	adrp	x21, .LANCHOR179
+	adrp	x21, .LANCHOR178
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
@@ -13809,7 +13660,7 @@ ftl_info_blk_init:
 	bl	ftl_memset
 	adrp	x25, .LANCHOR121
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
-	add	x0, x21, :lo12:.LANCHOR179
+	add	x0, x21, :lo12:.LANCHOR178
 	mov	w27, 21574
 	add	x26, x26, :lo12:.LANCHOR105
 	add	x25, x25, :lo12:.LANCHOR121
@@ -13817,9 +13668,9 @@ ftl_info_blk_init:
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR179]
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strh	wzr, [x0, 2]
-.L2335:
+.L2310:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -13827,26 +13678,26 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2334
-.L2339:
+	bne	.L2309
+.L2314:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2335
+	bne	.L2310
 	mov	w24, 0
-.L2336:
+.L2311:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2340
+	tbz	x0, 12, .L2315
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L2340:
+.L2315:
 	cmn	w19, #1
-	bne	.L2341
+	bne	.L2316
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
@@ -13855,11 +13706,11 @@ ftl_info_blk_init:
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
-	mov	w1, 8
+	mov	w1, 9
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2333:
+.L2308:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13867,12 +13718,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2334:
+.L2309:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR178
-	add	x7, x7, :lo12:.LANCHOR178
+	adrp	x7, .LANCHOR177
+	add	x7, x7, :lo12:.LANCHOR177
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13885,7 +13736,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2337
+	bne	.L2312
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13893,30 +13744,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2337:
+.L2312:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2338
+	tbz	x0, 12, .L2313
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2338:
+.L2313:
 	cmn	w5, #1
-	beq	.L2339
+	beq	.L2314
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2339
+	bne	.L2314
 	mov	w19, w24
-	b	.L2336
-.L2341:
+	b	.L2311
+.L2316:
 	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
@@ -13928,11 +13779,11 @@ ftl_info_blk_init:
 	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR179
-	strb	w1, [x21, #:lo12:.LANCHOR179]
+	add	x0, x21, :lo12:.LANCHOR178
+	strb	w1, [x21, #:lo12:.LANCHOR178]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR178
-	add	x24, x24, :lo12:.LANCHOR178
+	adrp	x24, .LANCHOR177
+	add	x24, x24, :lo12:.LANCHOR177
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -13940,11 +13791,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR105
-	ldrb	w25, [x21, #:lo12:.LANCHOR179]
+	ldrb	w25, [x21, #:lo12:.LANCHOR178]
 	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2343:
-	tbnz	w23, #31, .L2346
+.L2318:
+	tbnz	w23, #31, .L2321
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13952,13 +13803,13 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2344
+	beq	.L2319
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2344
-.L2346:
-	add	x21, x21, :lo12:.LANCHOR179
+	bne	.L2319
+.L2321:
+	add	x21, x21, :lo12:.LANCHOR178
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
@@ -13970,12 +13821,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2333
-.L2344:
+	b	.L2308
+.L2319:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2343
+	b	.L2318
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13992,21 +13843,21 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2362
+	cbz	w1, .L2337
 	str	wzr, [x0, 520]
-.L2362:
+.L2337:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR184
+	adrp	x22, .LANCHOR183
 	adrp	x21, .LANCHOR99
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR184
+	add	x22, x22, :lo12:.LANCHOR183
 	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2363:
+.L2338:
 	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2366:
+.L2341:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
@@ -14014,26 +13865,26 @@ ftl_ext_info_flush:
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2364
+	bcc	.L2339
 	bl	ftl_ext_alloc_new_blk
-.L2364:
+.L2339:
 	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2365
+	bne	.L2340
 	adrp	x0, .LC0
 	mov	w2, 1747
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2365:
+.L2340:
 	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
 	adrp	x26, .LANCHOR121
-	adrp	x27, .LANCHOR178
-	add	x25, x27, :lo12:.LANCHOR178
+	adrp	x27, .LANCHOR177
+	add	x25, x27, :lo12:.LANCHOR177
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -14055,7 +13906,7 @@ ftl_ext_info_flush:
 	mov	w1, w19
 	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR178]
+	str	wzr, [x27, #:lo12:.LANCHOR177]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
@@ -14068,16 +13919,16 @@ ftl_ext_info_flush:
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2366
+	beq	.L2341
 	cmn	w0, #1
-	adrp	x0, .LANCHOR183
-	beq	.L2367
-	ldrb	w1, [x0, #:lo12:.LANCHOR183]
-	cbz	w1, .L2368
-.L2367:
-	strb	wzr, [x0, #:lo12:.LANCHOR183]
-	b	.L2363
-.L2368:
+	adrp	x0, .LANCHOR182
+	beq	.L2342
+	ldrb	w1, [x0, #:lo12:.LANCHOR182]
+	cbz	w1, .L2343
+.L2342:
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
+	b	.L2338
+.L2343:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14104,11 +13955,11 @@ ftl_ext_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR178
+	adrp	x24, .LANCHOR177
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x3, x24, :lo12:.LANCHOR178
+	add	x3, x24, :lo12:.LANCHOR177
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	adrp	x25, ftl_ext_info_data_buffer
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
@@ -14125,18 +13976,18 @@ ftl_ext_info_init:
 	sxth	w22, w0
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2379
+	tbz	x0, 12, .L2354
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR185
+	adrp	x1, .LANCHOR184
 	and	w4, w21, 65535
 	mov	w3, w22
 	mov	w2, 1791
-	add	x1, x1, :lo12:.LANCHOR185
+	add	x1, x1, :lo12:.LANCHOR184
 	ldrh	w5, [x0, 130]
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2379:
+.L2354:
 	adrp	x26, .LANCHOR121
 	adrp	x28, .LANCHOR105
 	mov	w5, 20038
@@ -14144,14 +13995,14 @@ ftl_ext_info_init:
 	add	x28, x28, :lo12:.LANCHOR105
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2380:
+.L2355:
 	and	w21, w22, 65535
 	sub	w0, w21, w23
-	tbnz	x0, 15, .L2385
+	tbnz	x0, 15, .L2360
 	ldrh	w0, [x28]
 	sub	w1, w22, w23
 	ldrb	w4, [x26]
-	add	x3, x24, :lo12:.LANCHOR178
+	add	x3, x24, :lo12:.LANCHOR177
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -14160,22 +14011,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2381
+	beq	.L2356
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2381
-.L2385:
+	bne	.L2356
+.L2360:
 	bl	zftl_sblk_list_init
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2383
+	bgt	.L2358
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2383:
+.L2358:
 	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -14196,9 +14047,9 @@ ftl_ext_info_init:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2381:
+.L2356:
 	add	w23, w23, 1
-	b	.L2380
+	b	.L2355
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -14231,14 +14082,14 @@ ftl_low_format_data_init:
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2394
-	adrp	x1, .LANCHOR186
+	bcs	.L2369
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
 	mov	w2, 1974
-	add	x1, x1, :lo12:.LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2394:
+.L2369:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
@@ -14262,8 +14113,8 @@ ftl_low_format_data_init:
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR187
-	ldrh	w1, [x1, #:lo12:.LANCHOR187]
+	adrp	x1, .LANCHOR186
+	ldrh	w1, [x1, #:lo12:.LANCHOR186]
 	strh	w1, [x0, 698]
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
@@ -14330,13 +14181,13 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR188
+	adrp	x20, .LANCHOR187
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR188
+	add	x20, x20, :lo12:.LANCHOR187
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR26
 	mov	x25, x22
@@ -14344,30 +14195,30 @@ ftl_low_format:
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2399:
+.L2374:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2397
+	bhi	.L2372
 	mov	w2, 2028
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2397:
+.L2372:
 	cmp	w21, 255
-	beq	.L2398
+	beq	.L2373
 	adrp	x0, .LANCHOR105
 	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2398:
+.L2373:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2399
+	bne	.L2374
 	bl	sblk_init
 	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
@@ -14381,9 +14232,9 @@ ftl_low_format:
 	mov	w3, 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2400:
+.L2375:
 	cmp	x0, x2
-	bne	.L2401
+	bne	.L2376
 	adrp	x21, .LANCHOR97
 	mov	w1, 21574
 	adrp	x24, .LANCHOR59
@@ -14394,11 +14245,11 @@ ftl_low_format:
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2402:
+.L2377:
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2410
+	bhi	.L2385
 	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
 	ldrb	w2, [x23, #:lo12:.LANCHOR98]
@@ -14417,7 +14268,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2413:
+.L2388:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -14426,7 +14277,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2413
+	bne	.L2388
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
@@ -14438,14 +14289,14 @@ ftl_low_format:
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2414
-	adrp	x0, .LC137
+	tbz	x0, 12, .L2389
+	adrp	x0, .LC136
 	mov	w3, w20
 	mov	w2, 128
 	mov	w1, 2074
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC136
 	bl	printf
-.L2414:
+.L2389:
 	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
@@ -14468,9 +14319,9 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2415:
+.L2390:
 	cmp	w20, w12
-	bcc	.L2421
+	bcc	.L2396
 	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
@@ -14486,14 +14337,14 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2401:
+.L2376:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2400
-.L2410:
+	b	.L2375
+.L2385:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
@@ -14507,16 +14358,16 @@ ftl_low_format:
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2403:
+.L2378:
 	cmp	w8, w14
-	bcs	.L2407
+	bcs	.L2382
 	add	w15, w11, w7
-	b	.L2408
-.L2406:
+	b	.L2383
+.L2381:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2404
+	cbz	w0, .L2379
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14524,29 +14375,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2405:
+.L2380:
 	add	w7, w7, 1
-.L2408:
+.L2383:
 	cmp	w7, w15
-	bne	.L2406
+	bne	.L2381
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2403
-.L2404:
+	b	.L2378
+.L2379:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2405
-.L2407:
-	cbnz	w10, .L2409
+	b	.L2380
+.L2382:
+	cbnz	w10, .L2384
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2409:
+.L2384:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2402
-.L2421:
+	b	.L2377
+.L2396:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14554,48 +14405,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2416:
+.L2391:
 	cmp	w5, w15
-	bcc	.L2423
+	bcc	.L2398
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2415
-.L2419:
+	b	.L2390
+.L2394:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2417
+	tbnz	x11, 0, .L2392
 	cmp	w13, 1
-	bls	.L2422
+	bls	.L2397
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2418:
+.L2393:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2417:
+.L2392:
 	add	x7, x7, 1
-.L2420:
+.L2395:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2419
+	bcc	.L2394
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2416
-.L2422:
+	b	.L2391
+.L2397:
 	mov	w0, w1
-	b	.L2418
-.L2423:
+	b	.L2393
+.L2398:
 	mov	x7, 0
-	b	.L2420
+	b	.L2395
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14604,8 +14455,8 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
@@ -14622,9 +14473,9 @@ ftl_re_low_format:
 	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2434:
+.L2409:
 	cmp	w1, w7
-	bcc	.L2438
+	bcc	.L2413
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14635,29 +14486,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2438:
+.L2413:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2435
+	bne	.L2410
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2436:
+.L2411:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2434
-.L2435:
+	b	.L2409
+.L2410:
 	cmp	w6, 16
-	bne	.L2437
+	bne	.L2412
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2436
-.L2437:
+	b	.L2411
+.L2412:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2436
+	b	.L2411
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14679,7 +14530,7 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2443
+	bne	.L2418
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
@@ -14691,15 +14542,15 @@ ftl_write_last_log_page:
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2444
+	beq	.L2419
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR176
+	adrp	x0, .LANCHOR175
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR176
+	add	x6, x0, :lo12:.LANCHOR175
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR176]
+	str	w1, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR73
@@ -14716,13 +14567,13 @@ ftl_write_last_log_page:
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2444:
+.L2419:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2443:
+.L2418:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14742,41 +14593,41 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2450
+	tbz	x0, 12, .L2425
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2450:
+.L2425:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2451
+	tbz	x0, 12, .L2426
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2451:
+.L2426:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2452
+	tbz	x0, 12, .L2427
 	ldrh	w1, [x28]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2452:
+.L2427:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2453
+	tbz	x0, 12, .L2428
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC142
+	adrp	x0, .LC141
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC142
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2453:
+.L2428:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
 	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2449
+	bcs	.L2424
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
@@ -14787,11 +14638,11 @@ ftl_open_sblk_recovery:
 	add	x0, x26, :lo12:.LANCHOR121
 	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2456:
+.L2431:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2469
-.L2459:
+	bhi	.L2444
+.L2434:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -14801,22 +14652,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2470
-	adrp	x1, .LANCHOR189
+	beq	.L2445
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1473
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2470:
+.L2445:
 	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
 	ldr	x5, [x21, #:lo12:.LANCHOR111]
-.L2471:
+.L2446:
 	cmp	w1, w3
-	bcc	.L2473
+	bcc	.L2448
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR9
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -14824,32 +14675,32 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2474
+	tbz	x0, 12, .L2449
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC143
+	adrp	x0, .LC142
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2474:
+.L2449:
 	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR73
-	adrp	x26, .LC144
+	adrp	x26, .LC143
 	add	x24, x24, :lo12:.LANCHOR73
 	add	x25, x25, :lo12:.LANCHOR121
-	add	x26, x26, :lo12:.LC144
+	add	x26, x26, :lo12:.LC143
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2475:
+.L2450:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2478
+	bcc	.L2453
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
@@ -14859,17 +14710,17 @@ ftl_open_sblk_recovery:
 	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2479
-	adrp	x1, .LANCHOR189
+	beq	.L2454
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1503
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2479:
+.L2454:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2449
+	bne	.L2424
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14878,25 +14729,25 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2469:
+.L2444:
 	ldrb	w20, [x28, 5]
 	adrp	x24, .LANCHOR105
 	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2457:
+.L2432:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2468
+	bhi	.L2443
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2456
-.L2468:
+	b	.L2431
+.L2443:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2458
+	beq	.L2433
 	ldr	x1, [x29, 136]
 	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
@@ -14906,36 +14757,36 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2459
+	beq	.L2434
 	cmn	w0, #1
-	beq	.L2460
+	beq	.L2435
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2460
+	bne	.L2435
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2460
+	bne	.L2435
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2459
-.L2460:
-	adrp	x0, .LANCHOR182
+	beq	.L2434
+.L2435:
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR182]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2461
-	adrp	x1, .LANCHOR189
+	beq	.L2436
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2461:
+.L2436:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -14943,28 +14794,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2462
-	adrp	x1, .LANCHOR189
+	beq	.L2437
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
 	mov	w2, 1397
-	add	x1, x1, :lo12:.LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2462:
+.L2437:
 	cmn	w24, #1
-	beq	.L2464
+	beq	.L2439
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2464
+	beq	.L2439
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2466
+	cbz	x25, .L2441
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2466
+	beq	.L2441
 	cmn	w0, #1
-	beq	.L2466
+	beq	.L2441
 	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
@@ -14979,11 +14830,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2466
+	bne	.L2441
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR178
+	adrp	x8, .LANCHOR177
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR178
+	add	x2, x8, :lo12:.LANCHOR177
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14992,13 +14843,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR178]
+	ldr	w0, [x8, #:lo12:.LANCHOR177]
 	cmp	w10, w0
-	bhi	.L2466
+	bhi	.L2441
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2464
+	beq	.L2439
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
 	ldrh	w1, [x6, #:lo12:.LANCHOR99]
@@ -15010,7 +14861,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2464:
+.L2439:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -15018,37 +14869,37 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2458:
+.L2433:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2457
-.L2473:
+	b	.L2432
+.L2448:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2472
+	beq	.L2447
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2472:
+.L2447:
 	add	w1, w1, 1
-	b	.L2471
-.L2478:
-	cbz	w27, .L2476
+	b	.L2446
+.L2453:
+	cbz	w27, .L2451
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2476
+	bls	.L2451
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2477
+	tbz	x0, 12, .L2452
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2477:
+.L2452:
 	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
@@ -15064,37 +14915,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2476:
+.L2451:
 	add	w20, w20, 1
-	b	.L2475
-.L2466:
+	b	.L2450
+.L2441:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR118
 	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2464
+	bcs	.L2439
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2464
+	bge	.L2439
 	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
 	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2467
+	bls	.L2442
 	str	w1, [x0, 8]
-.L2467:
+.L2442:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2464
-.L2449:
+	b	.L2439
+.L2424:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15124,7 +14975,7 @@ pm_write_page:
 	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2529:
+.L2504:
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
@@ -15132,37 +14983,37 @@ pm_write_page:
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2530
+	bcs	.L2505
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2531
-.L2530:
+	bne	.L2506
+.L2505:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2531:
+.L2506:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2532
-	adrp	x1, .LANCHOR190
+	bne	.L2507
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR190
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2532:
+.L2507:
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR191
+	adrp	x27, .LANCHOR190
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR191]
+	ldr	x0, [x27, #:lo12:.LANCHOR190]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR191]
+	ldr	x3, [x27, #:lo12:.LANCHOR190]
 	mov	x2, x25
 	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
@@ -15179,28 +15030,28 @@ pm_write_page:
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR192
-	beq	.L2533
-	ldrb	w3, [x1, #:lo12:.LANCHOR192]
-	cbz	w3, .L2534
-.L2533:
-	strb	wzr, [x1, #:lo12:.LANCHOR192]
-	b	.L2529
-.L2534:
+	adrp	x1, .LANCHOR191
+	beq	.L2508
+	ldrb	w3, [x1, #:lo12:.LANCHOR191]
+	cbz	w3, .L2509
+.L2508:
+	strb	wzr, [x1, #:lo12:.LANCHOR191]
+	b	.L2504
+.L2509:
 	cmn	w0, #1
-	bne	.L2536
+	bne	.L2511
 	mov	w1, w26
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	printf
-	b	.L2529
-.L2536:
+	b	.L2504
+.L2511:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2537
+	bcs	.L2512
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2537:
+.L2512:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -15224,14 +15075,14 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2543
-	adrp	x2, .LANCHOR193
+	tbz	x0, 12, .L2518
+	adrp	x2, .LANCHOR192
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR193
+	add	x2, x2, :lo12:.LANCHOR192
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2543:
+.L2518:
 	adrp	x23, .LANCHOR158
 	adrp	x20, .LANCHOR26
 	mov	w2, 64
@@ -15239,18 +15090,18 @@ flash_info_flush:
 	ldr	x0, [x23, #:lo12:.LANCHOR158]
 	adrp	x21, .LANCHOR159
 	adrp	x22, .LANCHOR2
-	adrp	x24, .LC147
+	adrp	x24, .LC146
 	adrp	x25, .LANCHOR135
 	add	x22, x22, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LC147
+	add	x24, x24, :lo12:.LC146
 	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
 	add	x27, x21, :lo12:.LANCHOR159
 	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	mov	w26, 0
 	bl	rknand_print_hex
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
@@ -15258,7 +15109,7 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2544:
+.L2519:
 	add	x28, x21, :lo12:.LANCHOR159
 	ldrb	w4, [x21, #:lo12:.LANCHOR159]
 	ldrh	w19, [x22]
@@ -15273,7 +15124,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2545
+	blt	.L2520
 	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -15292,18 +15143,18 @@ flash_info_flush:
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2554:
+.L2529:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2546
-.L2549:
+	b	.L2521
+.L2524:
 	mov	w26, 1
-	b	.L2544
-.L2545:
+	b	.L2519
+.L2520:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2554
-.L2546:
+	cbz	w1, .L2529
+.L2521:
 	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
 	ldr	x3, [x23, #:lo12:.LANCHOR158]
@@ -15320,14 +15171,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2547
+	bne	.L2522
 	mov	w1, w19
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	printf
-	b	.L2544
-.L2547:
-	cbz	w26, .L2549
+	b	.L2519
+.L2522:
+	cbz	w26, .L2524
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -15352,14 +15203,14 @@ nand_flash_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2556
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2531
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2209
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2556:
+.L2531:
 	mov	x0, x19
 	adrp	x23, .LANCHOR16
 	bl	nandc_init
@@ -15387,20 +15238,20 @@ nand_flash_init:
 	adrp	x0, .LANCHOR136
 	add	x0, x0, :lo12:.LANCHOR136
 	bl	ftl_memset
-.L2562:
+.L2537:
 	mov	x1, x24
 	mov	w0, w22
 	bl	flash_read_id
 	strb	w27, [x22, x25]
-	cbnz	x22, .L2557
+	cbnz	x22, .L2532
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2558
-.L2560:
+	bls	.L2533
+.L2535:
 	mov	w19, -2
-.L2555:
+.L2530:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -15409,55 +15260,55 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2558:
+.L2533:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2560
-.L2557:
+	beq	.L2535
+.L2532:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2561
+	bne	.L2536
 	strb	w28, [x24]
-.L2561:
+.L2536:
 	add	x22, x22, 1
 	add	x24, x24, 8
 	cmp	x22, 4
-	bne	.L2562
-	adrp	x0, .LANCHOR195
-	add	x8, x0, :lo12:.LANCHOR195
+	bne	.L2537
+	adrp	x0, .LANCHOR194
+	add	x8, x0, :lo12:.LANCHOR194
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x20, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2565:
+.L2540:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2563
-	add	x0, x7, :lo12:.LANCHOR195
+	cbnz	w0, .L2538
+	add	x0, x7, :lo12:.LANCHOR194
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR196
-	add	x4, x1, :lo12:.LANCHOR196
+	adrp	x1, .LANCHOR195
+	add	x4, x1, :lo12:.LANCHOR195
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2564:
+.L2539:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2566
+	beq	.L2541
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2564
+	bne	.L2539
 	mov	w2, w0
-.L2566:
+.L2541:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR196
+	add	x1, x1, :lo12:.LANCHOR195
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR19
@@ -15471,33 +15322,33 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2567
+	bhi	.L2542
 	ldrb	w1, [x22, 20]
 	cmp	w1, 60
-	bls	.L2568
+	bls	.L2543
 	mov	w1, 60
 	strb	w1, [x22, 20]
-.L2568:
+.L2543:
 	cmp	w0, 8
-	bne	.L2567
+	bne	.L2542
 	ldrb	w0, [x20, #:lo12:.LANCHOR41]
 	cmp	w0, 44
-	bne	.L2567
+	bne	.L2542
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2567
+	bne	.L2542
 	strb	wzr, [x0, 28]
-.L2567:
+.L2542:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2569
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2544
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2233
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2569:
+.L2544:
 	mov	w0, 16384
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR161
@@ -15523,8 +15374,8 @@ nand_flash_init:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR158
 	str	x0, [x1, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR168
-	strb	wzr, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR167
+	strb	wzr, [x0, #:lo12:.LANCHOR167]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
@@ -15560,65 +15411,65 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR17]
 	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2570
+	bne	.L2545
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR17]
-.L2570:
+.L2545:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR169
+	adrp	x1, .LANCHOR168
 	adrp	x25, .LANCHOR23
-	strb	w0, [x1, #:lo12:.LANCHOR169]
+	strb	w0, [x1, #:lo12:.LANCHOR168]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR23]
-	tbz	x1, 6, .L2572
+	tbz	x1, 6, .L2547
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2573
+	bhi	.L2548
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
 	str	x1, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 19
 	adrp	x0, .LANCHOR154
-	beq	.L2574
+	beq	.L2549
 	mov	w1, 7
-.L2618:
+.L2593:
 	strb	w1, [x0, #:lo12:.LANCHOR154]
-	b	.L2572
-.L2563:
+	b	.L2547
+.L2538:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2565
-	b	.L2560
-.L2574:
+	bne	.L2540
+	b	.L2535
+.L2549:
 	mov	w1, 15
-	b	.L2618
-.L2573:
+	b	.L2593
+.L2548:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2576
+	bhi	.L2551
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR25
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2620:
+.L2595:
 	mov	w1, 7
 	adrp	x0, .LANCHOR154
-	b	.L2618
-.L2576:
+	b	.L2593
+.L2551:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2577
+	bhi	.L2552
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
 	str	x2, [x20, #:lo12:.LANCHOR156]
@@ -15626,87 +15477,87 @@ nand_flash_init:
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
 	adrp	x0, .LANCHOR154
-	beq	.L2578
+	beq	.L2553
 	mov	w2, 7
-.L2617:
+.L2592:
 	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR25
-	bhi	.L2580
+	bhi	.L2555
 	mov	w1, 4
-.L2619:
+.L2594:
 	strb	w1, [x0, #:lo12:.LANCHOR25]
-.L2572:
+.L2547:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2581
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2556
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2281
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2581:
+.L2556:
 	adrp	x24, .LANCHOR20
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
 	strb	wzr, [x24, #:lo12:.LANCHOR20]
-	tbz	x0, 0, .L2582
+	tbz	x0, 0, .L2557
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2621:
+.L2596:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2584
+	bne	.L2559
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2585
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2560
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2301
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2585:
+.L2560:
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w1, 17
 	strb	w1, [x0, 32]
-	b	.L2555
-.L2578:
+	b	.L2530
+.L2553:
 	mov	w2, 17
-	b	.L2617
-.L2580:
+	b	.L2592
+.L2555:
 	mov	w1, 5
-	b	.L2619
-.L2577:
+	b	.L2594
+.L2552:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2572
+	bhi	.L2547
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-	b	.L2620
-.L2582:
+	b	.L2595
+.L2557:
 	mov	w0, 4
-	b	.L2621
-.L2584:
+	b	.L2596
+.L2559:
 	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2586
+	bhi	.L2561
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
 	str	x0, [x20, #:lo12:.LANCHOR156]
-.L2586:
+.L2561:
 	ldrb	w0, [x23, #:lo12:.LANCHOR42]
-	tbz	x0, 2, .L2588
+	tbz	x0, 2, .L2563
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2588
+	cbz	w0, .L2563
 	adrp	x0, .LANCHOR159
 	ldrb	w1, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR2
@@ -15715,23 +15566,23 @@ nand_flash_init:
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR20]
-	cbnz	w0, .L2588
+	cbnz	w0, .L2563
 	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2588:
+.L2563:
 	ldr	w0, [x21, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2590
-	adrp	x2, .LANCHOR194
+	tbz	x0, 12, .L2565
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR194
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 2356
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2590:
+.L2565:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2555
+	b	.L2530
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15759,20 +15610,20 @@ ftl_sysblk_dump:
 	add	x27, x27, :lo12:.LANCHOR105
 	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2623:
+.L2598:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2625
+	bhi	.L2600
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2626
-	adrp	x1, .LANCHOR197
+	cbz	w20, .L2601
+	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
 	mov	w2, 1339
-	add	x1, x1, :lo12:.LANCHOR197
+	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2626:
+.L2601:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15782,7 +15633,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2625:
+.L2600:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15811,19 +15662,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2623
+	b	.L2598
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15834,32 +15685,32 @@ dump_ftl_info:
 	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
 	ldrb	w1, [x0, #:lo12:.LANCHOR51]
-	adrp	x0, .LC151
+	adrp	x0, .LC150
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC151
+	add	x0, x0, :lo12:.LC150
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR10
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR6
-	adrp	x0, .LANCHOR179
-	add	x1, x0, :lo12:.LANCHOR179
+	adrp	x0, .LANCHOR178
+	add	x1, x0, :lo12:.LANCHOR178
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR179]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	ldrb	w1, [x0, #:lo12:.LANCHOR178]
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -15867,8 +15718,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -15877,8 +15728,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR10]
 	adrp	x19, .LANCHOR73
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -15891,21 +15742,21 @@ dump_ftl_info:
 	mul	w3, w3, w0
 	adrp	x0, .LANCHOR111
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC157
+	adrp	x0, .LC156
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC157
+	add	x0, x0, :lo12:.LC156
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR9
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -15913,15 +15764,15 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR7]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
 	adrp	x1, .LANCHOR110
-	adrp	x0, .LC160
+	adrp	x0, .LC159
 	add	x1, x1, :lo12:.LANCHOR110
-	add	x0, x0, :lo12:.LC160
+	add	x0, x0, :lo12:.LC159
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
@@ -15933,8 +15784,8 @@ dump_ftl_info:
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15961,20 +15812,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2637
+	bne	.L2612
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2637:
+.L2612:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15990,42 +15841,42 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2643
-	adrp	x1, .LANCHOR198
+	bls	.L2618
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2643:
+.L2618:
 	adrp	x22, .LANCHOR97
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2644
+	bcs	.L2619
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR198
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR198]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2646
+	bcs	.L2621
 	mov	w2, 35
-.L2651:
-	adrp	x1, .LANCHOR198
+.L2626:
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2646
-.L2644:
+	b	.L2621
+.L2619:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
@@ -16034,69 +15885,69 @@ load_l2p_region:
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2647
+	cbnz	w21, .L2622
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
-	adrp	x0, .LANCHOR199
+	adrp	x0, .LANCHOR198
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR199]
+	ldrh	w2, [x0, #:lo12:.LANCHOR198]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2646:
+.L2621:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2647:
-	adrp	x20, .LANCHOR191
+.L2622:
+	adrp	x20, .LANCHOR190
 	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	ldr	x2, [x20, #:lo12:.LANCHOR190]
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2648
+	beq	.L2623
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	printf
 	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
 	ldrb	w3, [x24, #:lo12:.LANCHOR121]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR191]
-	adrp	x0, .LC168
+	ldr	x1, [x20, #:lo12:.LANCHOR190]
+	adrp	x0, .LC167
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC167
 	bl	rknand_print_hex
-.L2648:
-	ldr	x0, [x20, #:lo12:.LANCHOR191]
+.L2623:
+	ldr	x0, [x20, #:lo12:.LANCHOR190]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2646
+	beq	.L2621
 	mov	w2, 59
-	b	.L2651
+	b	.L2626
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -16116,21 +15967,21 @@ pm_gc:
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2654
+	blt	.L2629
 	bl	pm_free_sblk
 	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2654
+	blt	.L2629
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2656
-	adrp	x1, .LANCHOR200
-	add	x1, x1, :lo12:.LANCHOR200
+	bne	.L2631
+	adrp	x1, .LANCHOR199
+	add	x1, x1, :lo12:.LANCHOR199
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
@@ -16139,7 +15990,7 @@ pm_gc:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2656:
+.L2631:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
 	adrp	x1, .LANCHOR130
@@ -16151,28 +16002,28 @@ pm_gc:
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2657
+	beq	.L2632
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2657
+	cbz	x1, .L2632
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2657
+	tbz	w2, #31, .L2632
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2657:
+.L2632:
 	add	x1, x23, :lo12:.LANCHOR130
 	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2658:
+.L2633:
 	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2660
+	bhi	.L2635
 	bl	pm_free_sblk
-.L2654:
+.L2629:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -16180,7 +16031,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2660:
+.L2635:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -16195,7 +16046,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2659
+	bne	.L2634
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -16204,10 +16055,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2659:
+.L2634:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2658
+	b	.L2633
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -16229,10 +16080,10 @@ pm_flush_id:
 	strh	w0, [x19, 2]
 	adrp	x19, .LANCHOR128
 	ldr	w0, [x19, #:lo12:.LANCHOR128]
-	cbz	w0, .L2666
+	cbz	w0, .L2641
 	bl	pm_gc
 	str	wzr, [x19, #:lo12:.LANCHOR128]
-.L2666:
+.L2641:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16250,17 +16101,17 @@ pm_flush:
 	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2673:
+.L2648:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2672
+	tbz	w0, #31, .L2647
 	mov	w0, w20
 	bl	pm_flush_id
-.L2672:
+.L2647:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2673
+	bne	.L2648
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -16314,35 +16165,35 @@ pm_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x20, .LANCHOR130
 	str	wzr, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR192
+	adrp	x0, .LANCHOR191
 	stp	x25, x26, [sp, 64]
 	add	x19, x20, :lo12:.LANCHOR130
-	strb	w1, [x0, #:lo12:.LANCHOR192]
+	strb	w1, [x0, #:lo12:.LANCHOR191]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR191
+	adrp	x1, .LANCHOR190
 	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
 	add	x22, x22, :lo12:.LANCHOR121
-	str	x0, [x1, #:lo12:.LANCHOR191]
+	str	x0, [x1, #:lo12:.LANCHOR190]
 	mov	w25, -1
-.L2683:
+.L2658:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2682
+	cbz	w24, .L2657
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2682:
+.L2657:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2683
+	bne	.L2658
 	add	x0, x20, :lo12:.LANCHOR130
 	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR191]
+	ldr	x24, [x21, #:lo12:.LANCHOR190]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
@@ -16356,11 +16207,11 @@ pm_init:
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2684
+	bgt	.L2659
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	adrp	x27, .LANCHOR105
 	adrp	x28, .LANCHOR121
 	add	x27, x27, :lo12:.LANCHOR105
@@ -16368,14 +16219,14 @@ pm_init:
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2685:
+.L2660:
 	cmp	w21, w26
-	ble	.L2687
-	adrp	x0, .LANCHOR182
+	ble	.L2662
+	adrp	x0, .LANCHOR181
 	mov	w1, 1
 	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR182]
+	strb	w1, [x0, #:lo12:.LANCHOR181]
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
@@ -16385,7 +16236,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2684:
+.L2659:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -16396,7 +16247,7 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2687:
+.L2662:
 	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
@@ -16415,25 +16266,25 @@ pm_init:
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2686
+	beq	.L2661
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2686
+	bcs	.L2661
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2686:
+.L2661:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2685
+	b	.L2660
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -16458,51 +16309,51 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2697
+	bcc	.L2672
 	mov	w1, w0
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	bl	printf
 	mov	w0, -1
-.L2696:
+.L2671:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2697:
+.L2672:
 	adrp	x24, .LANCHOR130
 	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2703:
+.L2678:
 	ldr	x1, [x0]
-	cbz	x1, .L2699
+	cbz	x1, .L2674
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2699
-.L2700:
-	cbnz	w23, .L2701
+	bne	.L2674
+.L2675:
+	cbnz	w23, .L2676
 	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2702:
+.L2677:
 	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2705
+	beq	.L2680
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2705:
+.L2680:
 	mov	w0, 0
-	b	.L2696
-.L2701:
+	b	.L2671
+.L2676:
 	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
@@ -16513,13 +16364,13 @@ pm_log2phys:
 	strh	w1, [x0, 2]
 	adrp	x0, .LANCHOR131
 	strb	w21, [x0, #:lo12:.LANCHOR131]
-	b	.L2702
-.L2699:
+	b	.L2677
+.L2674:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2703
+	bne	.L2678
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
@@ -16529,17 +16380,17 @@ pm_log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2704
+	beq	.L2679
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2704
+	tbz	w1, #31, .L2679
 	bl	pm_flush_id
-.L2704:
-	adrp	x0, .LANCHOR201
+.L2679:
+	adrp	x0, .LANCHOR200
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR201]
+	strb	w19, [x0, #:lo12:.LANCHOR200]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2700
+	b	.L2675
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -16567,7 +16418,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
-	beq	.L2712
+	beq	.L2687
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16587,29 +16438,29 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2713
+	bne	.L2688
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2757:
+.L2732:
 	str	w0, [x25, 40]
-.L2714:
+.L2689:
 	mov	w1, 1
 	mov	x0, x25
 	bl	sblk_read_page
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2715
+	beq	.L2690
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2716
-.L2715:
+	beq	.L2691
+.L2690:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x1, [x25, 24]
@@ -16622,13 +16473,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC172
+	adrp	x0, .LC171
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC172
+	add	x0, x0, :lo12:.LC171
 	ldr	w1, [x25, 40]
 	ldr	w2, [x25, 52]
 	bl	printf
-.L2761:
+.L2736:
 	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w28, 0
@@ -16637,11 +16488,11 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2717:
+.L2692:
 	ldrh	w1, [x20, 80]
 	mov	w2, w28
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -16651,9 +16502,9 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2744
+	beq	.L2719
 	bl	ftl_free_sblk
-.L2744:
+.L2719:
 	adrp	x0, .LANCHOR97
 	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
@@ -16662,7 +16513,7 @@ gc_recovery:
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2711:
+.L2686:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16671,16 +16522,16 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2713:
+.L2688:
 	cmp	w0, 2
-	bne	.L2714
+	bne	.L2689
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2757
-.L2716:
+	b	.L2732
+.L2691:
 	adrp	x19, .LANCHOR72
 	adrp	x22, .LANCHOR73
 	adrp	x23, .LANCHOR147
@@ -16706,29 +16557,29 @@ gc_recovery:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2718
-.L2758:
+	beq	.L2693
+.L2733:
 	str	w0, [x29, 184]
-	adrp	x26, .LC173
+	adrp	x26, .LC172
 	ldr	x0, [x29, 152]
 	mov	w22, 0
 	mov	w28, 0
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
-	add	x0, x26, :lo12:.LC173
+	add	x0, x26, :lo12:.LC172
 	str	x0, [x29, 120]
-.L2720:
+.L2695:
 	sub	w0, w22, #1
 	str	w0, [x29, 188]
 	cmp	w22, w14
-	beq	.L2729
+	beq	.L2704
 	mov	x27, 0
-	b	.L2730
-.L2718:
+	b	.L2705
+.L2693:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2758
-.L2726:
+	b	.L2733
+.L2701:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16738,10 +16589,10 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2721
+	bne	.L2696
 	add	w0, w22, w0
 	orr	w0, w0, w26, lsl 24
-.L2759:
+.L2734:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
@@ -16753,13 +16604,13 @@ gc_recovery:
 	ldr	x0, [x25, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2724
+	bne	.L2699
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, x19]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2725
-.L2724:
+	beq	.L2700
+.L2699:
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
@@ -16775,35 +16626,35 @@ gc_recovery:
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x19]
 	cmn	w0, #1
-	beq	.L2725
+	beq	.L2700
 	mov	x0, x25
 	bl	buf_free
-	b	.L2761
-.L2721:
+	b	.L2736
+.L2696:
 	cmp	w1, 2
-	bne	.L2723
+	bne	.L2698
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w26
 	orr	w0, w0, 33554432
-	b	.L2759
-.L2723:
+	b	.L2734
+.L2698:
 	add	w0, w22, w0
-	b	.L2759
-.L2725:
+	b	.L2734
+.L2700:
 	add	w28, w28, 1
 	add	w26, w26, 1
 	add	x19, x19, 4
-.L2728:
+.L2703:
 	ldr	w0, [x29, 184]
 	cmp	w0, w26
-	bcs	.L2726
+	bcs	.L2701
 	add	x27, x27, 1
-.L2730:
+.L2705:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w27
-	ble	.L2727
+	ble	.L2702
 	add	x0, x20, x27, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
@@ -16811,11 +16662,11 @@ gc_recovery:
 	mov	w26, 1
 	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2728
-.L2727:
+	b	.L2703
+.L2702:
 	add	w22, w22, 1
-	b	.L2720
-.L2729:
+	b	.L2695
+.L2704:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x3, [x29, 144]
@@ -16834,20 +16685,20 @@ gc_recovery:
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2731:
+.L2706:
 	sub	w0, w27, #1
 	str	w0, [x29, 136]
 	cmp	w22, w27
-	beq	.L2742
+	beq	.L2717
 	mov	x26, 0
-	b	.L2743
-.L2739:
+	b	.L2718
+.L2714:
 	ldr	w0, [x29, 188]
 	ldr	x1, [x23, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
 	ldr	w6, [x1, x0]
 	cmn	w6, #1
-	beq	.L2732
+	beq	.L2707
 	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	str	w6, [x29, 108]
 	ldr	w0, [x1, x0]
@@ -16857,14 +16708,14 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
-	bne	.L2733
+	bne	.L2708
 	mov	w0, w6
 	str	w6, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w6, [x29, 108]
-.L2733:
+.L2708:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
@@ -16873,10 +16724,10 @@ gc_recovery:
 	ldr	x1, [x29, 168]
 	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2734
+	bne	.L2709
 	add	w0, w27, w0
 	orr	w0, w0, w25, lsl 24
-.L2760:
+.L2735:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16894,14 +16745,14 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2737
+	bne	.L2712
 	add	x1, x29, 200
 	mov	w0, w6
 	bl	pm_log2phys
 	add	w28, w28, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2738:
+.L2713:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
@@ -16910,66 +16761,66 @@ gc_recovery:
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2732
+	bne	.L2707
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2732
+	cbz	w1, .L2707
 	strh	wzr, [x0, x19]
-.L2732:
+.L2707:
 	add	w25, w25, 1
-.L2741:
+.L2716:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2739
+	bcs	.L2714
 	add	x26, x26, 1
-.L2743:
+.L2718:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2740
+	ble	.L2715
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
 	adrp	x0, .LANCHOR98
 	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2741
-.L2734:
+	b	.L2716
+.L2709:
 	cmp	w1, 2
-	bne	.L2736
+	bne	.L2711
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2760
-.L2736:
+	b	.L2735
+.L2711:
 	add	w0, w27, w0
-	b	.L2760
-.L2737:
+	b	.L2735
+.L2712:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w28, w28, eq
-	b	.L2738
-.L2740:
+	b	.L2713
+.L2715:
 	add	w27, w27, 1
-	b	.L2731
-.L2742:
+	b	.L2706
+.L2717:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w28, [x0, x1, lsl 1]
-	b	.L2717
-.L2712:
+	b	.L2692
+.L2687:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2711
+	beq	.L2686
 	adrp	x19, .LANCHOR97
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2746
+	bne	.L2721
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
@@ -16979,11 +16830,11 @@ gc_recovery:
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2746:
+.L2721:
 	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2711
+	b	.L2686
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -17005,21 +16856,21 @@ zftl_init:
 	strb	w0, [x1, #:lo12:.LANCHOR124]
 	adrp	x1, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	adrp	x20, .LANCHOR199
+	adrp	x20, .LANCHOR198
 	strb	wzr, [x1, #:lo12:.LANCHOR125]
-	adrp	x1, .LANCHOR174
+	adrp	x1, .LANCHOR173
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR6
-	strb	w0, [x1, #:lo12:.LANCHOR174]
+	strb	w0, [x1, #:lo12:.LANCHOR173]
 	adrp	x0, .LANCHOR119
 	mov	w1, -1
 	stp	x27, x28, [sp, 80]
 	strb	wzr, [x0, #:lo12:.LANCHOR119]
-	adrp	x0, .LANCHOR202
-	str	w1, [x0, #:lo12:.LANCHOR202]
-	adrp	x1, .LC175
+	adrp	x0, .LANCHOR201
+	str	w1, [x0, #:lo12:.LANCHOR201]
+	adrp	x1, .LC174
 	adrp	x0, .LC91
-	add	x1, x1, :lo12:.LC175
+	add	x1, x1, :lo12:.LC174
 	add	x0, x0, :lo12:.LC91
 	bl	printf
 	adrp	x1, .LANCHOR34
@@ -17050,14 +16901,14 @@ zftl_init:
 	strh	w8, [x22, #:lo12:.LANCHOR80]
 	mul	w6, w6, w3
 	strh	w4, [x1, #:lo12:.LANCHOR105]
-	strh	w10, [x20, #:lo12:.LANCHOR199]
+	strh	w10, [x20, #:lo12:.LANCHOR198]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
 	strb	w6, [x21, #:lo12:.LANCHOR73]
-.L2763:
+.L2738:
 	cmp	w4, w3
-	bcs	.L2764
+	bcs	.L2739
 	mul	w2, w0, w2
 	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
@@ -17066,9 +16917,9 @@ zftl_init:
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2765:
+.L2740:
 	cmp	w11, w1
-	bcs	.L2766
+	bcs	.L2741
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
@@ -17076,9 +16927,9 @@ zftl_init:
 	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR187
+	adrp	x24, .LANCHOR186
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR204
+	adrp	x27, .LANCHOR203
 	mul	w2, w2, w6
 	adrp	x26, .LANCHOR141
 	lsl	w1, w1, w4
@@ -17086,10 +16937,10 @@ zftl_init:
 	sub	w2, w2, #1
 	adrp	x25, .LANCHOR84
 	str	w1, [x4, #:lo12:.LANCHOR58]
-	adrp	x4, .LANCHOR203
-	str	w3, [x4, #:lo12:.LANCHOR203]
+	adrp	x4, .LANCHOR202
+	str	w3, [x4, #:lo12:.LANCHOR202]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR204]
+	str	w3, [x27, #:lo12:.LANCHOR203]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
 	adrp	x2, .LANCHOR101
@@ -17097,7 +16948,7 @@ zftl_init:
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR187]
+	strh	w0, [x24, #:lo12:.LANCHOR186]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
 	adrp	x8, .LANCHOR88
@@ -17110,10 +16961,10 @@ zftl_init:
 	lsr	w0, w7, 4
 	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2767
+	bhi	.L2742
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR84]
-.L2767:
+.L2742:
 	adrp	x7, .LANCHOR102
 	mov	w0, 2000
 	adrp	x3, .LANCHOR100
@@ -17130,11 +16981,11 @@ zftl_init:
 	mov	w8, 32
 	cmp	w5, 2
 	strh	w8, [x0, #:lo12:.LANCHOR8]
-	beq	.L2768
+	beq	.L2743
 	adrp	x5, .LANCHOR70
 	ldrb	w5, [x5, #:lo12:.LANCHOR70]
-	cbz	w5, .L2769
-.L2768:
+	cbz	w5, .L2744
+.L2743:
 	mov	w5, 150
 	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
@@ -17143,80 +16994,80 @@ zftl_init:
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	adrp	x2, .LANCHOR0
 	ldrb	w2, [x2, #:lo12:.LANCHOR0]
-	cbnz	w2, .L2769
+	cbnz	w2, .L2744
 	mov	w2, 4
 	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
 	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
 	strh	w0, [x6, #:lo12:.LANCHOR140]
-.L2769:
+.L2744:
 	adrp	x19, .LANCHOR14
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2771
+	tbz	x0, 12, .L2746
 	str	x4, [x29, 96]
+	adrp	x0, .LC175
+	add	x0, x0, :lo12:.LC175
+	bl	printf
+	ldr	x4, [x29, 96]
+.L2746:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2747
+	ldr	w1, [x4, #:lo12:.LANCHOR202]
 	adrp	x0, .LC176
 	add	x0, x0, :lo12:.LC176
 	bl	printf
-	ldr	x4, [x29, 96]
-.L2771:
+.L2747:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2772
-	ldr	w1, [x4, #:lo12:.LANCHOR203]
+	tbz	x0, 12, .L2748
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2772:
+.L2748:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2773
-	ldr	w1, [x28, #:lo12:.LANCHOR118]
+	tbz	x0, 12, .L2749
+	ldr	w1, [x27, #:lo12:.LANCHOR203]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2773:
+.L2749:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2774
-	ldr	w1, [x27, #:lo12:.LANCHOR204]
+	tbz	x0, 12, .L2750
+	ldrh	w1, [x24, #:lo12:.LANCHOR186]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2774:
+.L2750:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2775
-	ldrh	w1, [x24, #:lo12:.LANCHOR187]
+	tbz	x0, 12, .L2751
+	ldrh	w1, [x20, #:lo12:.LANCHOR198]
 	adrp	x0, .LC180
 	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2775:
+.L2751:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2776
-	ldrh	w1, [x20, #:lo12:.LANCHOR199]
+	tbz	x0, 12, .L2752
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2776:
+.L2752:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2777
-	ldrh	w1, [x26, #:lo12:.LANCHOR141]
+	tbz	x0, 12, .L2753
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
 	adrp	x0, .LC182
 	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L2777:
-	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2778
-	ldrh	w1, [x25, #:lo12:.LANCHOR84]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
-	bl	printf
-.L2778:
+.L2753:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2779
+	tbz	x0, 12, .L2754
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LC184
-	add	x0, x0, :lo12:.LC184
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2779:
+.L2754:
 	bl	buf_init
 	adrp	x25, .LANCHOR10
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
@@ -17248,15 +17099,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR10]
-	tbz	x0, 12, .L2780
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	tbz	x0, 12, .L2755
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2780:
+.L2755:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR73]
 	ldrh	w1, [x23, #:lo12:.LANCHOR6]
-	ldrh	w22, [x24, #:lo12:.LANCHOR187]
+	ldrh	w22, [x24, #:lo12:.LANCHOR186]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
@@ -17265,37 +17116,37 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2781
-	ldrh	w3, [x20, #:lo12:.LANCHOR199]
-	adrp	x0, .LC186
+	tbz	x0, 12, .L2756
+	ldrh	w3, [x20, #:lo12:.LANCHOR198]
+	adrp	x0, .LC185
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2781:
-	ldrh	w0, [x20, #:lo12:.LANCHOR199]
+.L2756:
+	ldrh	w0, [x20, #:lo12:.LANCHOR198]
 	cmp	w21, w0
-	bhi	.L2782
+	bhi	.L2757
 	cmp	w22, w0
-	bls	.L2783
-.L2782:
-.L2826:
-	b	.L2826
-.L2764:
+	bls	.L2758
+.L2757:
+.L2801:
+	b	.L2801
+.L2739:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2763
-.L2766:
+	b	.L2738
+.L2741:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2765
-.L2783:
+	b	.L2740
+.L2758:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2762
+	beq	.L2737
 	bl	ftl_ext_info_init
 	adrp	x19, .LANCHOR97
 	mov	w0, 1
@@ -17326,20 +17177,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR182
-	ldrb	w0, [x0, #:lo12:.LANCHOR182]
-	cbz	w0, .L2785
+	adrp	x0, .LANCHOR181
+	ldrb	w0, [x0, #:lo12:.LANCHOR181]
+	cbz	w0, .L2760
 	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2785:
+.L2760:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2762:
+.L2737:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17357,14 +17208,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2830
+	cbnz	w0, .L2805
 	bl	zftl_init
-.L2830:
+.L2805:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC186
+	add	x0, x0, :lo12:.LC186
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -17393,12 +17244,12 @@ gc_update_l2p_map_new:
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
 	ldr	w1, [x24, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L2833
+	tbz	x1, 8, .L2808
 	ldrh	w1, [x21, 80]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
-.L2833:
+.L2808:
 	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
@@ -17409,12 +17260,12 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR121
 	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2834:
+.L2809:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2844
+	bhi	.L2819
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2845
+	tbz	x0, 8, .L2820
 	ldr	x0, [x29, 128]
 	mov	w3, w25
 	ldr	x1, [x23, #:lo12:.LANCHOR9]
@@ -17422,22 +17273,22 @@ gc_update_l2p_map_new:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	bl	printf
-.L2845:
+.L2820:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2846
-	adrp	x1, .LANCHOR205
+	beq	.L2821
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC0
-	mov	w2, 483
-	add	x1, x1, :lo12:.LANCHOR205
+	mov	w2, 488
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2846:
+.L2821:
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
@@ -17450,13 +17301,13 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2844:
+.L2819:
 	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2835
+	beq	.L2810
 	adrp	x0, .LANCHOR121
 	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
@@ -17464,42 +17315,42 @@ gc_update_l2p_map_new:
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2836
+	tbz	x0, 8, .L2811
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC189
+	adrp	x0, .LC188
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC189
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2836:
+.L2811:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
 	str	x0, [x29, 144]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR99
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2837:
+.L2812:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2843
-.L2835:
+	bne	.L2818
+.L2810:
 	add	x22, x22, 1
-	b	.L2834
-.L2843:
+	b	.L2809
+.L2818:
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2838
+	beq	.L2813
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2838
+	bne	.L2813
 	adrp	x0, .LANCHOR148
 	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
@@ -17507,15 +17358,15 @@ gc_update_l2p_map_new:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2839
+	bne	.L2814
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2839:
+.L2814:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2840
+	bne	.L2815
 	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
@@ -17537,25 +17388,25 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2866:
+.L2841:
 	bl	ftl_vpn_decrement
 	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2838:
+.L2813:
 	add	x19, x19, 4
-	b	.L2837
-.L2840:
+	b	.L2812
+.L2815:
 	ldr	w0, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2842
+	tbz	x0, 8, .L2817
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2842:
+.L2817:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2866
+	b	.L2841
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17579,17 +17430,17 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR73
 	ldrb	w4, [x2, #:lo12:.LANCHOR73]
 	ldrh	w2, [x1, 2]
-.L2868:
+.L2843:
 	cmp	w3, w7
-	beq	.L2870
-	cbz	w6, .L2871
+	beq	.L2845
+	cbz	w6, .L2846
 	add	x1, x19, :lo12:.LANCHOR62
 	strb	w0, [x1, 4]
-.L2871:
-	cbz	w5, .L2872
+.L2846:
+	cbz	w5, .L2847
 	add	x0, x19, :lo12:.LANCHOR62
 	strh	w2, [x0, 2]
-.L2872:
+.L2847:
 	adrp	x0, .LANCHOR105
 	ldrh	w22, [x0, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR68
@@ -17597,25 +17448,25 @@ gc_scan_src_blk_one_page:
 	ldrb	w1, [x0, #:lo12:.LANCHOR68]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2873
+	bne	.L2848
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2873
+	cbnz	w1, .L2848
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2874:
+.L2849:
 	add	x1, x19, :lo12:.LANCHOR62
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2875
+	bne	.L2850
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2875:
+.L2850:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR62
 	bl	buf_alloc
@@ -17623,15 +17474,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR65
-.L2885:
+.L2860:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2876
-	cbz	w20, .L2877
-.L2876:
+	bne	.L2851
+	cbz	w20, .L2852
+.L2851:
 	cmp	w0, w20
-	bgt	.L2878
-.L2886:
+	bgt	.L2853
+.L2861:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -17640,33 +17491,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2870:
+.L2845:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2869
+	bne	.L2844
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2869:
+.L2844:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2868
-.L2873:
+	b	.L2843
+.L2848:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2874
-.L2878:
+	b	.L2849
+.L2853:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2879
-	cbnz	w0, .L2879
+	bne	.L2854
+	cbnz	w0, .L2854
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2899:
+.L2874:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -17674,40 +17525,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2882
+	beq	.L2857
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2883
+	bne	.L2858
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2883:
+.L2858:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2882
+	bne	.L2857
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR65]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2882:
+.L2857:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2877:
+.L2852:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2885
-	b	.L2886
-.L2879:
+	bne	.L2860
+	b	.L2861
+.L2854:
 	orr	w0, w22, w20, lsl 24
-	b	.L2899
+	b	.L2874
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17724,42 +17575,42 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2901
-	adrp	x1, .LANCHOR206
+	bne	.L2876
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 920
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 925
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2901:
+.L2876:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2921
+	beq	.L2896
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L2903
+	tbz	x0, 8, .L2878
 	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC192
-	add	x0, x0, :lo12:.LC192
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2903:
+.L2878:
 	ldrh	w0, [x19, #:lo12:.LANCHOR62]
 	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2904
+	cbnz	w1, .L2879
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR62]
-.L2921:
+.L2896:
 	mov	w0, 0
-	b	.L2900
-.L2904:
+	b	.L2875
+.L2879:
 	adrp	x4, .LANCHOR7
 	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
@@ -17769,59 +17620,59 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2905
+	beq	.L2880
 	cmp	w1, 224
-	beq	.L2905
-	cbz	w1, .L2906
+	beq	.L2880
+	cbz	w1, .L2881
 	adrp	x1, .LANCHOR10
 	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2905
+	beq	.L2880
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2905
+	beq	.L2880
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2935
-.L2905:
+	bne	.L2910
+.L2880:
 	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2921
-.L2906:
+	b	.L2896
+.L2881:
 	adrp	x0, .LANCHOR9
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2908
-	adrp	x1, .LANCHOR206
+	cbz	w1, .L2883
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 940
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 945
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2908:
+.L2883:
 	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2905
-.L2935:
+	b	.L2880
+.L2910:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2909
-	adrp	x1, .LANCHOR206
+	bne	.L2884
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR206
+	mov	w2, 953
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2909:
+.L2884:
 	adrp	x1, .LANCHOR105
 	ldr	x3, [x22, #:lo12:.LANCHOR7]
 	adrp	x2, .LANCHOR80
@@ -17837,14 +17688,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2922
+	bne	.L2897
 	adrp	x1, .LANCHOR68
 	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2911
+	beq	.L2886
 	and	w21, w21, 65535
-.L2910:
+.L2885:
 	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17870,41 +17721,41 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2912
-.L2937:
+	bne	.L2887
+.L2912:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2900:
+.L2875:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2911:
+.L2886:
 	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2910
-.L2922:
+	b	.L2885
+.L2897:
 	mov	w21, 1
-	b	.L2910
-.L2912:
+	b	.L2885
+.L2887:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2913
-	mov	w2, 980
-	adrp	x1, .LANCHOR206
+	beq	.L2888
+	mov	w2, 985
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2937
-.L2913:
+	b	.L2912
+.L2888:
 	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	adrp	x22, .LANCHOR99
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -17916,9 +17767,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2914:
+.L2889:
 	cmp	w21, w26
-	bgt	.L2919
+	bgt	.L2894
 	mov	x0, x25
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -17930,11 +17781,11 @@ gc_scan_src_blk:
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2920
-	adrp	x0, .LC193
-	add	x0, x0, :lo12:.LC193
+	beq	.L2895
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2920:
+.L2895:
 	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	ldr	x1, [x20, #:lo12:.LANCHOR9]
@@ -17942,20 +17793,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2900
-.L2919:
+	b	.L2875
+.L2894:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2916
+	beq	.L2891
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2917
+	bne	.L2892
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2917:
+.L2892:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17970,16 +17821,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2916
+	bne	.L2891
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2916:
+.L2891:
 	add	x26, x26, 1
-	b	.L2914
+	b	.L2889
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17995,13 +17846,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2939
-	adrp	x21, .LANCHOR207
+	beq	.L2914
+	adrp	x21, .LANCHOR206
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR207
+	add	x21, x21, :lo12:.LANCHOR206
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2947:
+.L2922:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -18009,7 +17860,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2940
+	beq	.L2915
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -18019,7 +17870,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2941
+	bne	.L2916
 	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -18035,21 +17886,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2941:
+.L2916:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2942
-	mov	w2, 1419
+	beq	.L2917
+	mov	w2, 1424
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2942:
+.L2917:
 	mov	x0, x23
 	bl	buf_free
-.L2940:
+.L2915:
 	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	adrp	x2, .LANCHOR118
 	ldr	w2, [x2, #:lo12:.LANCHOR118]
@@ -18057,7 +17908,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2943
+	bcc	.L2918
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -18068,42 +17919,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2938:
+.L2913:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2943:
+.L2918:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2938
+	bne	.L2913
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2947
-	b	.L2938
-.L2939:
+	bne	.L2922
+	b	.L2913
+.L2914:
 	ldr	w1, [x0, 536]
 	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2949
+	bhi	.L2924
 	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2938
-.L2949:
+	bls	.L2913
+.L2924:
 	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2938
+	b	.L2913
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -18129,29 +17980,29 @@ ftl_sblk_dump:
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ldrh	w4, [x0, x23]
-	adrp	x0, .LC194
+	adrp	x0, .LC193
 	ubfx	x5, x5, 11, 8
-	add	x0, x0, :lo12:.LC194
+	add	x0, x0, :lo12:.LC193
 	ubfx	x3, x2, 3, 2
 	and	w4, w4, 2047
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2976
+	beq	.L2951
 	adrp	x0, .LANCHOR6
 	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2976
+	bls	.L2951
 	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2977
+	bne	.L2952
 	adrp	x0, .LANCHOR68
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
-.L2957:
+.L2932:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	mov	w0, w21
@@ -18167,11 +18018,11 @@ ftl_sblk_dump:
 	strb	wzr, [x29, 197]
 	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC195
+	adrp	x0, .LC194
 	mul	w1, w1, w2
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC195
+	add	x0, x0, :lo12:.LC194
 	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
@@ -18186,36 +18037,36 @@ ftl_sblk_dump:
 	adrp	x0, .LANCHOR105
 	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2958:
+.L2933:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2973
+	bls	.L2948
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	str	x0, [x29, 120]
-	b	.L2974
-.L2977:
+	b	.L2949
+.L2952:
 	mov	w25, 1
-	b	.L2957
-.L2970:
+	b	.L2932
+.L2945:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2959
+	beq	.L2934
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2960
+	bne	.L2935
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2961:
+.L2936:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -18257,22 +18108,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2959
+	beq	.L2934
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2964
+	bne	.L2939
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2964:
+.L2939:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2965
+	bne	.L2940
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -18280,81 +18131,81 @@ ftl_sblk_dump:
 	ldr	x0, [x26, 24]
 	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
+	adrp	x0, .LC195
+	add	x0, x0, :lo12:.LC195
 	bl	printf
-.L2965:
+.L2940:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2967
+	cbz	x0, .L2942
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2968
+	beq	.L2943
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L2968
-	adrp	x0, .LC197
+	tbz	x0, 12, .L2943
+	adrp	x0, .LC196
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC197
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2968:
+.L2943:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2967
+	beq	.L2942
 	cmn	w0, #1
-	beq	.L2967
-	adrp	x1, .LANCHOR208
+	beq	.L2942
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
 	mov	w2, 1300
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2967:
+.L2942:
 	add	w27, w27, 1
-.L2959:
+.L2934:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2972:
+.L2947:
 	cmp	w25, w22
-	bcs	.L2970
+	bcs	.L2945
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2974:
+.L2949:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2971
+	bls	.L2946
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2972
-.L2960:
+	b	.L2947
+.L2935:
 	cmp	w25, 2
-	bne	.L2962
+	bne	.L2937
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2961
-.L2962:
+	b	.L2936
+.L2937:
 	add	w19, w20, w19
-	b	.L2961
-.L2971:
+	b	.L2936
+.L2946:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2958
-.L2973:
+	b	.L2933
+.L2948:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR9
@@ -18363,11 +18214,11 @@ ftl_sblk_dump:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2955:
+.L2930:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18376,9 +18227,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2976:
+.L2951:
 	mov	w0, 0
-	b	.L2955
+	b	.L2930
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -18398,22 +18249,22 @@ zftl_read:
 	stp	x23, x24, [sp, 48]
 	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2988
+	tbz	x0, 12, .L2963
 	mov	w3, w2
-	adrp	x0, .LC199
+	adrp	x0, .LC198
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC199
+	add	x0, x0, :lo12:.LC198
 	mov	w1, w20
 	bl	printf
-.L2988:
-	cbnz	w20, .L2989
+.L2963:
+	cbnz	w20, .L2964
 	adrp	x0, .LANCHOR58
 	mov	w20, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L2990:
+.L2965:
 	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L3018
+	bcc	.L2993
 	adrp	x1, .LANCHOR97
 	add	w20, w20, w19
 	add	w3, w26, w20
@@ -18435,10 +18286,10 @@ zftl_read:
 	sub	w25, w2, w27
 	str	w2, [x29, 156]
 	add	w25, w25, 1
-.L2992:
-	cbnz	w25, .L3016
+.L2967:
+	cbnz	w25, .L2991
 	ldr	w0, [x29, 164]
-.L2987:
+.L2962:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18446,22 +18297,22 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2989:
+.L2964:
 	cmp	w20, 3
-	bhi	.L3018
+	bhi	.L2993
 	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2990
-.L3016:
+	b	.L2965
+.L2991:
 	ldr	x0, [x29, 168]
 	cmp	w21, w27
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
 	ccmp	w21, w0, 4, ne
-	bne	.L3019
-	cmp	w21, w27
 	bne	.L2994
+	cmp	w21, w27
+	bne	.L2969
 	udiv	w24, w20, w1
 	and	w0, w26, 65535
 	msub	w1, w24, w1, w20
@@ -18470,17 +18321,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2993:
+.L2968:
 	adrp	x23, .LANCHOR49
 	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2997:
+.L2972:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2995
+	bne	.L2970
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2995
+	tbz	x2, 3, .L2970
 	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
 	add	x0, x1, x0
@@ -18492,87 +18343,87 @@ zftl_read:
 	add	x22, x22, x19
 	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2996:
+.L2971:
 	add	w21, w21, 1
 	sub	w25, w25, #1
-.L3003:
+.L2978:
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 2
-	bls	.L3004
-	cbnz	w25, .L2992
-.L3004:
+	bls	.L2979
+	cbnz	w25, .L2967
+.L2979:
 	adrp	x0, .LANCHOR125
 	ldrb	w1, [x0, #:lo12:.LANCHOR125]
-	cbz	w1, .L2992
+	cbz	w1, .L2967
 	adrp	x24, .LANCHOR124
 	add	x0, x23, :lo12:.LANCHOR49
 	ldrb	w2, [x24, #:lo12:.LANCHOR124]
 	add	x0, x0, x2, lsl 6
 	bl	sblk_read_page
-	adrp	x0, .LANCHOR209
-	add	x0, x0, :lo12:.LANCHOR209
+	adrp	x0, .LANCHOR208
+	add	x0, x0, :lo12:.LANCHOR208
 	str	x0, [x29, 136]
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	str	x0, [x29, 128]
-.L3006:
+.L2981:
 	ldrb	w0, [x28]
-	cbnz	w0, .L3015
+	cbnz	w0, .L2990
 	mov	w0, -1
 	strb	wzr, [x28]
 	strb	w0, [x24, #:lo12:.LANCHOR124]
-	b	.L2992
-.L2994:
+	b	.L2967
+.L2969:
 	ldr	w0, [x29, 160]
 	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L3019:
+.L2994:
 	mov	w24, 0
-	b	.L2993
-.L2995:
+	b	.L2968
+.L2970:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2997
+	bne	.L2972
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2998
+	bne	.L2973
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w21
 	bl	pm_log2phys
-.L2998:
+.L2973:
 	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2999
+	bne	.L2974
 	ldr	x0, [x29, 168]
 	mov	w19, 0
 	add	x24, x0, :lo12:.LANCHOR121
-.L3000:
+.L2975:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2996
+	bcs	.L2971
 	madd	w0, w21, w0, w19
 	cmp	w20, w0
-	bhi	.L3001
+	bhi	.L2976
 	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L3001
+	bls	.L2976
 	mov	x0, x22
 	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L3001:
+.L2976:
 	add	w19, w19, 1
-	b	.L3000
-.L2999:
+	b	.L2975
+.L2974:
 	mov	w0, 0
 	bl	buf_alloc
-	cbz	x0, .L3003
+	cbz	x0, .L2978
 	ldr	x2, [x29, 120]
 	ldr	x3, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x3, 40]
@@ -18587,15 +18438,15 @@ zftl_read:
 	stp	w21, w2, [x0, 36]
 	str	w2, [x0, 44]
 	bl	zftl_add_read_buf
-	b	.L2996
-.L3015:
+	b	.L2971
+.L2990:
 	ldrb	w0, [x24, #:lo12:.LANCHOR124]
 	cmp	w0, 255
-	bne	.L3007
+	bne	.L2982
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1064
 	bl	printf
-.L3007:
+.L2982:
 	ldrb	w19, [x24, #:lo12:.LANCHOR124]
 	add	x0, x23, :lo12:.LANCHOR49
 	ubfiz	x1, x19, 6, 8
@@ -18607,21 +18458,21 @@ zftl_read:
 	strb	w0, [x24, #:lo12:.LANCHOR124]
 	ldr	w8, [x1, 52]
 	cmn	w8, #1
-	bne	.L3008
+	bne	.L2983
 	adrp	x0, .LANCHOR10
 	str	w8, [x29, 164]
 	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L3009:
+.L2984:
 	add	x10, x23, :lo12:.LANCHOR49
 	add	x10, x10, x19, lsl 6
 	ldr	x0, [x10, 24]
 	ldr	w2, [x10, 36]
 	ldr	w1, [x0, 4]
 	cmp	w1, w2
-	beq	.L3010
+	beq	.L2985
 	adrp	x1, .LANCHOR10
 	str	w8, [x29, 152]
 	str	x10, [x29, 112]
@@ -18632,9 +18483,9 @@ zftl_read:
 	ldrb	w1, [x10, 1]
 	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	adrp	x0, .LC201
+	adrp	x0, .LC200
 	ldr	w3, [x10, 40]
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC200
 	bl	printf
 	ldr	x10, [x29, 112]
 	adrp	x0, .LANCHOR99
@@ -18653,28 +18504,28 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w8, [x29, 152]
-.L3010:
+.L2985:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x0, x0, x19, lsl 6
 	ldr	x1, [x0, 24]
 	ldr	w0, [x0, 36]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	bne	.L3011
+	bne	.L2986
 	cmn	w8, #1
-	bne	.L3012
-.L3011:
+	bne	.L2987
+.L2986:
 	ldp	x0, x1, [x29, 128]
 	mov	w2, 1085
 	bl	printf
-.L3012:
+.L2987:
 	add	x0, x23, :lo12:.LANCHOR49
 	add	x19, x0, x19, lsl 6
 	ldr	x0, [x29, 168]
 	ldrb	w2, [x19, 56]
 	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	cmp	w0, w2
-	bls	.L3013
+	bls	.L2988
 	ldrb	w0, [x19, 57]
 	lsl	w2, w2, 9
 	ldr	x1, [x19, 8]
@@ -18682,7 +18533,7 @@ zftl_read:
 	add	x1, x1, x0
 	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L3014:
+.L2989:
 	ldr	x1, [x29, 144]
 	adrp	x0, .LANCHOR127
 	add	x0, x0, :lo12:.LANCHOR127
@@ -18692,10 +18543,10 @@ zftl_read:
 	ldrb	w0, [x28]
 	sub	w0, w0, #1
 	strb	w0, [x28]
-	b	.L3006
-.L3008:
+	b	.L2981
+.L2983:
 	cmp	w8, 256
-	bne	.L3009
+	bne	.L2984
 	adrp	x0, .LANCHOR99
 	mov	w4, 21
 	ldp	w2, w3, [x1, 36]
@@ -18710,8 +18561,8 @@ zftl_read:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
-	adrp	x0, .LC200
-	add	x0, x0, :lo12:.LC200
+	adrp	x0, .LC199
+	add	x0, x0, :lo12:.LC199
 	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
 	bl	printf
@@ -18722,15 +18573,15 @@ zftl_read:
 	mov	w1, w5
 	bl	gc_add_sblk
 	ldr	w8, [x29, 108]
-	b	.L3009
-.L3013:
+	b	.L2984
+.L2988:
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
-	b	.L3014
-.L3018:
+	b	.L2989
+.L2993:
 	mov	w0, -1
-	b	.L2987
+	b	.L2962
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18795,102 +18646,286 @@ ftl_read:
 	and	w0, w0, 255
 	b	zftl_read
 	.size	ftl_read, .-ftl_read
-	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
-	.global	ftl_update_l2p_map
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR80
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR80]
-	ldrb	w0, [x22, 9]
-	ldrh	w19, [x22, 12]
-	mul	w23, w23, w0
-	adrp	x0, .LANCHOR111
-	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	add	x19, x1, x19, lsl 2
-	add	x1, x19, x23, sxtw 2
-	ldr	w1, [x1, -4]
-	cmn	w1, #1
-	beq	.L3041
-	adrp	x1, .LANCHOR210
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #128
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR62
+	stp	x21, x22, [sp, 48]
+	add	x22, x19, :lo12:.LANCHOR62
+	adrp	x20, .LANCHOR10
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	ldr	x0, [x22, 8]
+	stp	x27, x28, [sp, 96]
+	ldr	x21, [x20, #:lo12:.LANCHOR10]
+	cbnz	x0, .L3016
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x22, 8]
+.L3016:
+	add	x0, x19, :lo12:.LANCHOR62
+	ldr	x22, [x0, 8]
+	cbnz	x22, .L3017
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 1576
-	add	x1, x1, :lo12:.LANCHOR210
+	mov	w2, 366
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3041:
-	adrp	x27, .LANCHOR121
-	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR121
-	mov	w21, 0
-	str	x0, [x29, 96]
-.L3042:
-	cmp	w24, w23
-	blt	.L3048
-	adrp	x0, .LANCHOR14
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3049
-	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR9]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC205
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC205
-	bl	printf
-.L3049:
-	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR9]
-	ldp	x23, x24, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x25, x26, [sp, 64]
-	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L3048:
-	ldr	w2, [x19, x24, lsl 2]
-	cmn	w2, #1
-	beq	.L3043
-	ldrb	w20, [x27, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR14
-	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w20, w20, 65535
-	tbz	x0, 12, .L3044
-	adrp	x0, .LC202
-	mov	w3, w24
-	mov	w1, w20
+.L3017:
+	adrp	x2, .LANCHOR105
+	add	x28, x21, 96
+	add	x27, x21, 80
+	add	x2, x2, :lo12:.LANCHOR105
+	mov	w26, 0
+.L3018:
+	ldrb	w0, [x27, 9]
+	cmp	w26, w0
+	bge	.L3027
+	adrp	x25, .LANCHOR68
+	mov	w24, 1
+	add	x23, x19, :lo12:.LANCHOR62
+	add	x25, x25, :lo12:.LANCHOR68
+	b	.L3028
+.L3026:
+	ldrh	w0, [x28]
+	ldrh	w1, [x2]
+	ldrb	w3, [x25]
+	cmp	w3, 3
+	mul	w1, w0, w1
+	ldrh	w0, [x23, 16]
+	bne	.L3019
+	add	w0, w0, w1
+	orr	w0, w0, w24, lsl 24
+.L3040:
+	str	w0, [x22, 40]
+	mov	w1, 1
+	str	x2, [x29, 104]
+	mov	x0, x22
+	bl	sblk_read_page
+	ldr	w0, [x22, 52]
+	adrp	x1, .LANCHOR147
+	ldr	x2, [x29, 104]
+	cmn	w0, #1
+	beq	.L3022
+	ldrh	w0, [x23, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR147]
+	ldr	x3, [x22, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L3022
+	adrp	x4, .LANCHOR148
+	ldr	x4, [x4, #:lo12:.LANCHOR148]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L3023
+.L3022:
+	add	x4, x1, :lo12:.LANCHOR147
+	ldrh	w0, [x23, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR147]
+	ldr	w0, [x1, x0, lsl 2]
+	cmn	w0, #1
+	beq	.L3023
+	adrp	x19, .LANCHOR72
+	ldrb	w3, [x27, 9]
+	str	x4, [x29, 104]
+	mov	w2, 4
+	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	mul	w3, w3, w0
+	adrp	x0, .LC201
+	add	x0, x0, :lo12:.LC201
+	bl	rknand_print_hex
+	ldrh	w0, [x19, #:lo12:.LANCHOR72]
+	adrp	x19, .LANCHOR148
+	ldrb	w3, [x27, 9]
+	mov	w2, 4
+	ldr	x1, [x19, #:lo12:.LANCHOR148]
+	mul	w3, w3, w0
+	adrp	x0, .LC202
 	add	x0, x0, :lo12:.LC202
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR14
+	ldr	x4, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L3024
+	ldr	x1, [x22, 24]
+	ldrh	w0, [x23, 22]
+	ldr	x2, [x4]
+	ldr	x3, [x19, #:lo12:.LANCHOR148]
+	lsl	x0, x0, 2
+	ldr	w4, [x1, 12]
+	str	w4, [sp]
+	ldr	w4, [x3, x0]
+	ldp	w5, w6, [x1]
+	ldr	w3, [x2, x0]
+	adrp	x0, .LC203
+	ldr	w7, [x1, 8]
+	add	x0, x0, :lo12:.LC203
+	ldr	w1, [x22, 40]
+	ldr	w2, [x22, 52]
 	bl	printf
-.L3044:
+.L3024:
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
+	mov	x1, 0
+	ldrh	w0, [x0, 80]
+	bl	ftl_sblk_dump
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	strh	wzr, [x0, x1, lsl 1]
+	mov	w0, -1
+.L3015:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 128
+	ret
+.L3019:
+	cmp	w3, 2
+	bne	.L3021
+	sub	w0, w0, #1
+	add	w1, w24, w1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L3040
+.L3021:
+	add	w0, w0, w1
+	b	.L3040
+.L3023:
+	ldrh	w0, [x23, 22]
+	add	w24, w24, 1
+	add	w0, w0, 1
+	strh	w0, [x23, 22]
+.L3028:
+	ldrh	w0, [x23, 20]
+	cmp	w24, w0
+	ble	.L3026
+	add	w26, w26, 1
+	add	x28, x28, 2
+	b	.L3018
+.L3027:
+	add	x19, x19, :lo12:.LANCHOR62
+	ldrh	w0, [x19, 16]
+	add	w1, w0, 1
+	strh	w1, [x19, 16]
+	adrp	x1, .LANCHOR104
+	ldrb	w1, [x1, #:lo12:.LANCHOR104]
+	cbz	w1, .L3029
+	add	w0, w0, 2
+	strh	w0, [x19, 16]
+.L3029:
+.L3025:
+	mov	w0, 0
+	b	.L3015
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR80
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR80]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	mul	w23, w23, w0
+	adrp	x0, .LANCHOR111
+	str	x0, [x29, 104]
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	add	x19, x1, x19, lsl 2
+	add	x1, x19, x23, sxtw 2
+	ldr	w1, [x1, -4]
+	cmn	w1, #1
+	beq	.L3042
+	adrp	x1, .LANCHOR210
+	adrp	x0, .LC0
+	mov	w2, 1576
+	add	x1, x1, :lo12:.LANCHOR210
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3042:
+	adrp	x27, .LANCHOR121
+	mov	x24, 0
+	add	x0, x27, :lo12:.LANCHOR121
+	mov	w21, 0
+	str	x0, [x29, 96]
+.L3043:
+	cmp	w24, w23
+	blt	.L3049
+	adrp	x0, .LANCHOR14
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3050
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC207
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC207
+	bl	printf
+.L3050:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
+	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L3049:
+	ldr	w2, [x19, x24, lsl 2]
+	cmn	w2, #1
+	beq	.L3044
+	ldrb	w20, [x27, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L3045
+	adrp	x0, .LC204
+	mov	w3, w24
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC204
+	bl	printf
+.L3045:
 	adrp	x25, .LANCHOR105
-	adrp	x26, .LC203
+	adrp	x26, .LC205
 	mov	x28, x24
 	add	x25, x25, :lo12:.LANCHOR105
-	add	x26, x26, :lo12:.LC203
-.L3047:
+	add	x26, x26, :lo12:.LC205
+.L3048:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L3045
+	beq	.L3046
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L3045
+	bne	.L3046
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18902,15 +18937,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L3046
+	cbz	w0, .L3047
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LC204
-	add	x0, x0, :lo12:.LC204
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
-.L3046:
+.L3047:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18919,13 +18954,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L3045:
+.L3046:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L3047
-.L3043:
+	bgt	.L3048
+.L3044:
 	add	x24, x24, 1
-	b	.L3042
+	b	.L3043
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18941,9 +18976,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3071
+	beq	.L3072
 	bl	zftl_insert_data_list
-.L3071:
+.L3072:
 	adrp	x0, .LANCHOR10
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
@@ -18975,10 +19010,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L3076:
+.L3077:
 	adrp	x2, .LANCHOR57
 	ldrb	w1, [x2, #:lo12:.LANCHOR57]
-	cbz	w1, .L3078
+	cbz	w1, .L3079
 	adrp	x3, .LANCHOR56
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
@@ -18997,24 +19032,24 @@ ftl_write_commit:
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L3080
+	bcc	.L3081
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
 	mov	w2, 495
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3080:
+.L3081:
 	ldr	x0, [x29, 112]
 	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L3081
+	bcc	.L3082
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L3075:
+.L3076:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19022,7 +19057,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L3081:
+.L3082:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x26, [x0, 8]
@@ -19030,17 +19065,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
 	ldrb	w1, [x0, #:lo12:.LANCHOR119]
-	cbz	w1, .L3083
-	adrp	x0, .LANCHOR174
-	ldrb	w1, [x0, #:lo12:.LANCHOR174]
+	cbz	w1, .L3084
+	adrp	x0, .LANCHOR173
+	ldrb	w1, [x0, #:lo12:.LANCHOR173]
 	add	x1, x23, x1, lsl 6
-.L3084:
+.L3085:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L3085
+	bne	.L3086
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L3083
+	bne	.L3084
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -19049,33 +19084,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L3076
-.L3085:
+	b	.L3077
+.L3086:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L3084
-.L3083:
+	b	.L3085
+.L3084:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L3087
+	bne	.L3088
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L3087:
+.L3088:
 	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3090:
+.L3091:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L3088
+	bne	.L3089
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L3088
+	tbz	x2, 3, .L3089
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -19083,50 +19118,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L3089:
+.L3090:
 	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
 	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3114
+	bcs	.L3115
 	add	w20, w21, w20
-	cbz	x24, .L3092
-	cbz	w21, .L3093
+	cbz	x24, .L3093
+	cbz	w21, .L3094
 	lsl	w2, w21, 9
 	mov	x1, x24
 	mov	x0, x26
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3093:
+.L3094:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3094
+	bcc	.L3095
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3114:
+.L3115:
 	mov	w24, 0
-	b	.L3091
-.L3088:
+	b	.L3092
+.L3089:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L3090
+	bne	.L3091
 	mov	x24, 0
-	b	.L3089
-.L3094:
+	b	.L3090
+.L3095:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3114
-.L3092:
+	b	.L3115
+.L3093:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L3095
+	beq	.L3096
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -19139,11 +19174,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L3096
+	bne	.L3097
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3097
-.L3096:
+	bne	.L3098
+.L3097:
 	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -19151,53 +19186,53 @@ ftl_write_commit:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	adrp	x0, .LC208
+	add	x0, x0, :lo12:.LC208
 	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC168
+	adrp	x0, .LC167
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC168
+	add	x0, x0, :lo12:.LC167
 	bl	rknand_print_hex
-.L3097:
+.L3098:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L3098
+	bne	.L3099
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L3099
-.L3098:
+	bne	.L3100
+.L3099:
 	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
 	mov	w2, 566
 	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3099:
-	cbz	w21, .L3100
+.L3100:
+	cbz	w21, .L3101
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L3101
+	beq	.L3102
 	ldr	x1, [x27, 8]
 	mov	x0, x26
 	bl	ftl_memcpy
-.L3102:
+.L3103:
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L3100:
+.L3101:
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L3103
-	bls	.L3104
+	bcc	.L3104
+	bls	.L3105
 	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3104:
-	cbz	x27, .L3091
+.L3105:
+	cbz	x27, .L3092
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -19207,17 +19242,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L3091:
+.L3092:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3106
+	cbnz	w0, .L3107
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3106:
+.L3107:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR174
+	adrp	x20, .LANCHOR173
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -19238,7 +19273,7 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR174
+	add	x0, x20, :lo12:.LANCHOR173
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
 	ldrb	w2, [x0, #:lo12:.LANCHOR119]
@@ -19249,22 +19284,22 @@ ftl_write_commit:
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR212]
 	ldrh	w0, [x19, 6]
-	bhi	.L3107
+	bhi	.L3108
 	cmp	w0, 1
-	bne	.L3079
-.L3107:
+	bne	.L3080
+.L3108:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR174]
+	ldrb	w0, [x20, #:lo12:.LANCHOR173]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3111:
+.L3112:
 	cmp	w1, w4
-	bne	.L3112
-	strb	w3, [x20, #:lo12:.LANCHOR174]
+	bne	.L3113
+	strb	w3, [x20, #:lo12:.LANCHOR173]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
@@ -19274,58 +19309,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L3079
+	bne	.L3080
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3079:
+.L3080:
 	adrp	x0, .LANCHOR57
 	ldrb	w0, [x0, #:lo12:.LANCHOR57]
-	cbnz	w0, .L3076
-.L3078:
+	cbnz	w0, .L3077
+.L3079:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L3075
-.L3103:
+	b	.L3076
+.L3104:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3105
+	beq	.L3106
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3104
-.L3105:
+	b	.L3105
+.L3106:
 	mov	w1, 0
 	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3104
-.L3112:
+	b	.L3105
+.L3113:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3111
-.L3113:
+	b	.L3112
+.L3114:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L3101:
+.L3102:
 	mov	w1, 0
 	mov	x0, x26
 	bl	ftl_memset
-	b	.L3102
-.L3095:
-	cbnz	w21, .L3113
+	b	.L3103
+.L3096:
+	cbnz	w21, .L3114
 	mov	w24, 0
 	mov	x27, 0
-	b	.L3100
+	b	.L3101
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -19342,10 +19377,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3137
+	cbnz	w0, .L3138
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3136
+	cbz	x0, .L3137
 	adrp	x20, .LANCHOR62
 	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
@@ -19361,52 +19396,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3139
+	bne	.L3140
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 595
+	mov	w2, 600
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3139:
+.L3140:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3140
+	bne	.L3141
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3140:
+.L3141:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3141
+	bne	.L3142
 	adrp	x0, .LANCHOR49
 	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3144:
+.L3145:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3142
+	bne	.L3143
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3142
+	tbz	x2, 1, .L3143
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3136
+	tbz	x0, 8, .L3137
 	add	x20, x20, :lo12:.LANCHOR62
-	adrp	x0, .LC207
+	adrp	x0, .LC209
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC209
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3136:
+.L3137:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19415,10 +19450,10 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3142:
+.L3143:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3144
+	bne	.L3145
 	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
@@ -19433,19 +19468,19 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3145
+	tbz	x0, 8, .L3146
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC208
+	adrp	x0, .LC210
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC210
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3145:
+.L3146:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
@@ -19458,27 +19493,27 @@ gc_do_copy_back:
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3136
-.L3141:
+	b	.L3137
+.L3142:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3146
+	tbz	x0, 8, .L3147
 	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC208
+	adrp	x0, .LC210
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L3146:
+.L3147:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3136
-.L3137:
+	b	.L3137
+.L3138:
 	adrp	x1, .LANCHOR10
 	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
@@ -19487,10 +19522,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3147
+	bne	.L3148
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cbz	w0, .L3148
+	cbz	w0, .L3149
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19499,7 +19534,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3149:
+.L3150:
 	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR62
@@ -19511,13 +19546,13 @@ gc_do_copy_back:
 	adrp	x0, .LANCHOR148
 	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3152:
+.L3153:
 	cmp	w2, w8
-	blt	.L3154
-.L3181:
+	blt	.L3155
+.L3182:
 	mov	w23, 1
-	b	.L3150
-.L3148:
+	b	.L3151
+.L3149:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -19533,12 +19568,12 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3149
-.L3150:
+	beq	.L3150
+.L3151:
 	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3155
+	tbz	x1, 8, .L3156
 	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
@@ -19546,18 +19581,18 @@ gc_do_copy_back:
 	ldr	x2, [x0, #:lo12:.LANCHOR148]
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC209
+	adrp	x0, .LC211
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC211
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3155:
+.L3156:
 	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3156:
+.L3157:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19565,27 +19600,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3168
+	blt	.L3169
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3169
+	beq	.L3170
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3170:
+.L3171:
 	cmp	w2, w3
-	blt	.L3176
+	blt	.L3177
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3175
-.L3147:
+	b	.L3176
+.L3148:
 	adrp	x0, .LANCHOR104
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3151
+	cbnz	w0, .L3152
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19593,8 +19628,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3149
-.L3151:
+	b	.L3150
+.L3152:
 	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19602,28 +19637,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3149
-.L3154:
+	b	.L3150
+.L3155:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3181
+	beq	.L3182
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3153
+	bne	.L3154
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3136
+	bcs	.L3137
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3153:
+.L3154:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3152
-.L3168:
+	b	.L3153
+.L3169:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19632,11 +19667,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3157
+	bne	.L3158
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3158
+	cbnz	x0, .L3159
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19644,8 +19679,8 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3136
-.L3158:
+	cbz	x0, .L3137
+.L3159:
 	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR72
@@ -19665,7 +19700,7 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3159
+	bne	.L3160
 	adrp	x0, .LANCHOR147
 	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
@@ -19711,7 +19746,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3157:
+.L3158:
 	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
@@ -19730,7 +19765,7 @@ gc_do_copy_back:
 	strb	w23, [x3, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3163
+	bne	.L3164
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR105
 	ldrh	w6, [x6, #:lo12:.LANCHOR105]
@@ -19748,10 +19783,10 @@ gc_do_copy_back:
 	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3164:
+.L3165:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3167
+	tbz	x0, 8, .L3168
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
@@ -19765,19 +19800,19 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3167:
+.L3168:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3156
-.L3159:
+	b	.L3157
+.L3160:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
 	ldr	x0, [x6, #:lo12:.LANCHOR148]
@@ -19790,7 +19825,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3161
+	bne	.L3162
 	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR99]
@@ -19809,30 +19844,30 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3161
+	bne	.L3162
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3161
+	bne	.L3162
 	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
-	mov	w2, 710
+	mov	w2, 715
 	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3161:
+.L3162:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR118
 	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3162
+	bcc	.L3163
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3162:
+.L3163:
 	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
@@ -19840,32 +19875,32 @@ gc_do_copy_back:
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3157
-.L3163:
+	b	.L3158
+.L3164:
 	cmp	w0, 2
-	bne	.L3165
+	bne	.L3166
 	adrp	x0, .LANCHOR104
 	adrp	x1, .LANCHOR105
 	ldrb	w0, [x0, #:lo12:.LANCHOR104]
-	cbnz	w0, .L3166
+	cbnz	w0, .L3167
 	ldr	w0, [x29, 156]
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3224:
+.L3225:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3165:
+.L3166:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
 	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3164
-.L3166:
+	b	.L3165
+.L3167:
 	add	w0, w19, w26, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
@@ -19873,32 +19908,32 @@ gc_do_copy_back:
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3224
-.L3169:
+	b	.L3225
+.L3170:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3171
-.L3174:
+	cbz	w3, .L3172
+.L3175:
 	strb	wzr, [x1, 60]
-	b	.L3172
-.L3171:
+	b	.L3173
+.L3172:
 	cmp	w23, 1
-	bne	.L3173
+	bne	.L3174
 	mov	w3, 9
-.L3223:
+.L3224:
 	strb	w3, [x1, 60]
-.L3172:
+.L3173:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3175:
+.L3176:
 	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3177
+	cbz	w1, .L3178
 	add	w0, w0, w0, lsl 1
-.L3178:
+.L3179:
 	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR62
 	ldr	x1, [x1, #:lo12:.LANCHOR97]
@@ -19913,34 +19948,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3179
+	blt	.L3180
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3179:
+.L3180:
 	bl	gc_write_completed
-	b	.L3136
-.L3173:
+	b	.L3137
+.L3174:
 	cmp	w23, 2
-	bne	.L3174
+	bne	.L3175
 	mov	w3, 13
-	b	.L3223
-.L3176:
+	b	.L3224
+.L3177:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3170
-.L3177:
+	b	.L3171
+.L3178:
 	adrp	x1, .LANCHOR104
 	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3178
+	b	.L3179
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -19965,35 +20000,35 @@ zftl_do_gc:
 	stp	x27, x28, [sp, 96]
 	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3330
+	bhi	.L3333
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3228
-	add	x0, x0, :lo12:.L3228
+	adrp	x0, .L3229
+	add	x0, x0, :lo12:.L3229
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3228
+	adr	x1, .Lrtx3229
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3228:
+.Lrtx3229:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3228:
-	.2byte	(.L3227 - .Lrtx3228) / 4
-	.2byte	(.L3229 - .Lrtx3228) / 4
-	.2byte	(.L3230 - .Lrtx3228) / 4
-	.2byte	(.L3231 - .Lrtx3228) / 4
-	.2byte	(.L3232 - .Lrtx3228) / 4
-	.2byte	(.L3233 - .Lrtx3228) / 4
-	.2byte	(.L3234 - .Lrtx3228) / 4
+.L3229:
+	.2byte	(.L3228 - .Lrtx3229) / 4
+	.2byte	(.L3230 - .Lrtx3229) / 4
+	.2byte	(.L3231 - .Lrtx3229) / 4
+	.2byte	(.L3232 - .Lrtx3229) / 4
+	.2byte	(.L3233 - .Lrtx3229) / 4
+	.2byte	(.L3234 - .Lrtx3229) / 4
+	.2byte	(.L3235 - .Lrtx3229) / 4
 	.section	.text.zftl_do_gc
-.L3233:
+.L3234:
 	adrp	x20, .LANCHOR62
 	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3235:
+.L3236:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3326
+	cbz	w0, .L3329
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20010,8 +20045,8 @@ zftl_do_gc:
 	bl	buf_free
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3394
-.L3227:
+	b	.L3397
+.L3228:
 	adrp	x0, .LANCHOR92
 	adrp	x28, .LANCHOR85
 	adrp	x27, .LANCHOR83
@@ -20025,16 +20060,16 @@ zftl_do_gc:
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3236
-	cbnz	w26, .L3237
+	beq	.L3237
+	cbnz	w26, .L3238
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3237
-.L3330:
+	blt	.L3238
+.L3333:
 	mov	w20, 16
-	b	.L3225
-.L3237:
+	b	.L3226
+.L3238:
 	adrp	x5, .LANCHOR82
 	mov	w1, 5
 	adrp	x26, .LANCHOR71
@@ -20046,7 +20081,7 @@ zftl_do_gc:
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3238
+	beq	.L3239
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20059,120 +20094,120 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3239
+	bcs	.L3240
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3238
+	bls	.L3239
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3238
-.L3239:
+	bls	.L3239
+.L3240:
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3240
+	cbz	w0, .L3241
 	mov	w0, 1
 	str	wzr, [x20, #:lo12:.LANCHOR146]
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3238:
+	b	.L3333
+.L3239:
 	strh	wzr, [x5, #:lo12:.LANCHOR82]
-.L3240:
+.L3241:
 	cmp	w22, 15
-	bls	.L3332
+	bls	.L3335
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3332
+	bhi	.L3335
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3241:
+.L3242:
 	adrp	x0, .LANCHOR14
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 8, .L3242
+	tbz	x0, 8, .L3243
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
 	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
-	mov	w1, 1848
+	mov	w1, 1853
 	ldrh	w7, [x0, 122]
 	ldrh	w6, [x0, 120]
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC211
-	add	x0, x0, :lo12:.LC211
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3242:
+.L3243:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3243
-.L3244:
+	ble	.L3244
+.L3245:
 	mov	w0, 1
-.L3396:
+.L3399:
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3332:
+	b	.L3333
+.L3335:
 	mov	w20, 2
-	b	.L3241
-.L3243:
+	b	.L3242
+.L3244:
 	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3244
-	b	.L3330
-.L3236:
+	bgt	.L3245
+	b	.L3333
+.L3237:
 	cmp	w26, 1
-	bne	.L3246
+	bne	.L3247
 	bl	gc_scan_static_data
 	adrp	x24, .LANCHOR71
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3247
-.L3248:
+	cbz	w0, .L3248
+.L3249:
 	mov	w0, 1
 	strb	w0, [x24, #:lo12:.LANCHOR71]
-	b	.L3396
-.L3247:
+	b	.L3399
+.L3248:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3248
-	cbnz	w22, .L3249
-.L3253:
+	cbnz	w0, .L3249
+	cbnz	w22, .L3250
+.L3254:
 	mov	w20, 16
-.L3250:
+.L3251:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
 	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3258
+	cbz	w5, .L3259
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3225
+	tbz	x1, 8, .L3226
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC212
+	adrp	x0, .LC214
 	mov	w2, 0
-	mov	w1, 1946
-	add	x0, x0, :lo12:.LC212
+	mov	w1, 1951
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3225:
+.L3226:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -20182,25 +20217,25 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3249:
+.L3250:
 	cmp	w21, w25
 	adrp	x1, .LANCHOR87
 	adrp	x2, .LANCHOR84
-	bcs	.L3251
+	bcs	.L3252
 	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3252
-.L3251:
+	blt	.L3253
+.L3252:
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3252
+	blt	.L3253
 	adrp	x0, .LANCHOR88
 	ldrh	w2, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3253
-.L3252:
+	bcc	.L3254
+.L3253:
 	adrp	x5, .LANCHOR146
 	adrp	x2, .LANCHOR6
 	mov	w6, 1
@@ -20210,17 +20245,17 @@ zftl_do_gc:
 	add	w0, w0, 1
 	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3254
+	bls	.L3255
 	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3254
+	bls	.L3255
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3253
+	beq	.L3254
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20231,82 +20266,82 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3253
+	bgt	.L3254
 	mov	w0, w6
 	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3384:
+.L3387:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3253
-	b	.L3244
-.L3254:
+	cbz	w0, .L3254
+	b	.L3245
+.L3255:
 	adrp	x0, .LANCHOR88
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3256
+	bcc	.L3257
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3384
-.L3256:
+	b	.L3387
+.L3257:
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
-	cbnz	w0, .L3257
+	cbnz	w0, .L3258
 	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3250
-.L3257:
+	bls	.L3251
+.L3258:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3384
-.L3246:
+	b	.L3387
+.L3247:
 	adrp	x0, .LANCHOR74
 	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3330
-	b	.L3253
-.L3258:
+	bcc	.L3333
+	b	.L3254
+.L3259:
 	adrp	x2, .LANCHOR74
 	mov	x24, x2
 	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3259
-	cbz	w22, .L3260
+	bcs	.L3260
+	cbz	w22, .L3261
 	cmp	w22, 16
-	bls	.L3261
+	bls	.L3262
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3261
+	bhi	.L3262
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3262
+	bne	.L3263
 	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3386:
+.L3389:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
+.L3264:
+	cbnz	w0, .L3266
+	b	.L3226
 .L3263:
-	cbnz	w0, .L3265
-	b	.L3225
-.L3262:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3265
+	beq	.L3266
 	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
 	adrp	x1, .LANCHOR146
@@ -20319,16 +20354,16 @@ zftl_do_gc:
 	adrp	x4, .LANCHOR80
 	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3266
+	bcs	.L3267
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3265
+	bls	.L3266
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3265
-.L3266:
+	bls	.L3266
+.L3267:
 	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
@@ -20336,67 +20371,67 @@ zftl_do_gc:
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3265:
+.L3266:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
-	b	.L3225
-.L3261:
+	b	.L3226
+.L3262:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3393:
+.L3396:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3265
+	bne	.L3266
 	mov	w2, 2
-.L3389:
+.L3392:
 	mov	w1, 3
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
-	b	.L3386
-.L3260:
+	b	.L3389
+.L3261:
 	adrp	x1, .LANCHOR14
 	strb	wzr, [x3, #:lo12:.LANCHOR71]
 	ldr	w1, [x1, #:lo12:.LANCHOR14]
-	tbz	x1, 8, .L3268
+	tbz	x1, 8, .L3269
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC212
+	adrp	x0, .LC214
 	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1976
-	add	x0, x0, :lo12:.LC212
+	mov	w1, 1981
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3268:
+.L3269:
 	cmp	w21, 16
-	bls	.L3269
+	bls	.L3270
 	mov	w2, 4
-	b	.L3389
-.L3269:
+	b	.L3392
+.L3270:
 	mov	w2, 1
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3393
-.L3259:
+	b	.L3396
+.L3260:
 	cmp	w26, 1
-	bne	.L3225
+	bne	.L3226
 	cmp	w21, w4, lsl 1
-	bge	.L3270
+	bge	.L3271
 	cmp	w25, w22, lsr 1
-	bcs	.L3271
+	bcs	.L3272
 	adrp	x0, .LANCHOR87
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcs	.L3271
+	bcs	.L3272
 	adrp	x0, .LANCHOR84
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3225
-.L3271:
+	b	.L3226
+.L3272:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -20404,21 +20439,21 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3272
-.L3277:
+	bne	.L3273
+.L3278:
 	cmp	w22, 1
-	bhi	.L3273
-.L3274:
+	bhi	.L3274
+.L3275:
 	cmp	w21, w25
 	adrp	x21, .LANCHOR84
-	bcs	.L3281
+	bcs	.L3282
 	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
 	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3281
+	beq	.L3282
 	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
 	adrp	x2, .LANCHOR73
@@ -20429,13 +20464,13 @@ zftl_do_gc:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3283
-.L3281:
+	ble	.L3284
+.L3282:
 	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3225
-.L3272:
+	b	.L3226
+.L3273:
 	adrp	x2, .LANCHOR146
 	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
@@ -20445,14 +20480,14 @@ zftl_do_gc:
 	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
 	adrp	x4, .LANCHOR9
-	bls	.L3275
+	bls	.L3276
 	ldr	x1, [x4, #:lo12:.LANCHOR9]
 	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
 	adrp	x1, .LANCHOR86
 	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3275
+	bcs	.L3276
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20460,167 +20495,167 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3265
-.L3275:
+	cbnz	w0, .L3266
+.L3276:
 	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3276
+	bhi	.L3277
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3265
-.L3276:
+	b	.L3266
+.L3277:
 	ldrh	w2, [x27, #:lo12:.LANCHOR83]
 	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
 	adrp	x2, .LANCHOR84
 	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3277
+	ble	.L3278
 	adrp	x0, .LANCHOR86
 	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3274
-	b	.L3277
-.L3273:
+	bcc	.L3275
+	b	.L3278
+.L3274:
 	mov	w1, 1
 	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3278
+	bls	.L3279
 	adrp	x0, .LANCHOR87
 	ldrh	w2, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LANCHOR88
 	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3278
+	bhi	.L3279
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3279
+	bne	.L3280
 	mov	w2, 4
-.L3385:
+.L3388:
 	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3279:
+.L3280:
 	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	bls	.L3387
+	bls	.L3390
 	lsr	w1, w1, 2
-.L3388:
+.L3391:
 	strh	w1, [x24, #:lo12:.LANCHOR74]
-	b	.L3263
-.L3278:
+	b	.L3264
+.L3279:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3279
+	bne	.L3280
 	mov	w2, 2
-	b	.L3385
-.L3283:
+	b	.L3388
+.L3284:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
 	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3387:
+.L3390:
 	lsr	w1, w1, 1
-	b	.L3388
-.L3270:
+	b	.L3391
+.L3271:
 	adrp	x0, .LANCHOR84
 	mov	w20, 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR74]
-	b	.L3225
-.L3229:
+	b	.L3226
+.L3230:
 	adrp	x7, .LANCHOR62
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3284
+	bne	.L3285
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR62]
-.L3284:
+.L3285:
 	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3395
+	beq	.L3398
 	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3286
+	cbz	w5, .L3287
 	add	x1, x1, 58
 	mov	w0, 0
-.L3288:
+.L3289:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3287
-.L3292:
+	bne	.L3288
+.L3293:
 	adrp	x0, .LANCHOR62
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR62]
-	b	.L3330
-.L3287:
+	b	.L3333
+.L3288:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3288
-.L3286:
+	bne	.L3289
+.L3287:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3289
+	beq	.L3290
 	tst	w0, 192
-	bne	.L3290
-.L3289:
+	bne	.L3291
+.L3290:
 	adrp	x0, .LANCHOR9
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3292
-	mov	w2, 2209
+	cbz	w0, .L3293
+	mov	w2, 2214
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3292
-.L3290:
+	b	.L3293
+.L3291:
 	mov	w0, 2
-	b	.L3396
-.L3230:
+	b	.L3399
+.L3231:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3293
+	bne	.L3294
 	mov	w0, 3
-	b	.L3396
-.L3293:
+	b	.L3399
+.L3294:
 	adrp	x20, .LANCHOR62
 	mov	w2, 65535
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3244
+	beq	.L3245
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3294
+	cbz	w2, .L3295
 	mov	w1, 4
 	strh	wzr, [x0, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3294:
+	b	.L3333
+.L3295:
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR9
@@ -20628,14 +20663,14 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3295
+	cbz	w1, .L3296
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2237
+	mov	w2, 2242
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3295:
+.L3296:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20646,70 +20681,70 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3296
+	bhi	.L3297
 	strh	w0, [x21, 30]
-	b	.L3292
-.L3296:
+	b	.L3293
+.L3297:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3292
-.L3231:
+	b	.L3293
+.L3232:
 	adrp	x20, .LANCHOR62
 	adrp	x23, .LANCHOR80
 	add	x22, x20, :lo12:.LANCHOR62
 	add	x23, x23, :lo12:.LANCHOR80
-.L3365:
+.L3368:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3298
+	bcs	.L3299
 	cmp	w21, 7
-	bls	.L3365
-	b	.L3330
-.L3298:
+	bls	.L3368
+	b	.L3333
+.L3299:
 	ldrh	w3, [x22, 24]
 	adrp	x0, .LANCHOR14
-	cbz	w3, .L3299
+	cbz	w3, .L3300
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
 	strb	w1, [x19, #:lo12:.LANCHOR145]
 	adrp	x19, .LANCHOR9
-	tbz	x0, 8, .L3300
+	tbz	x0, 8, .L3301
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3300:
+.L3301:
 	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	add	x0, x20, :lo12:.LANCHOR62
 	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3301
+	beq	.L3302
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2271
+	mov	w2, 2276
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3301:
+.L3302:
 	add	x0, x20, :lo12:.LANCHOR62
 	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3330
-.L3299:
+	b	.L3333
+.L3300:
 	adrp	x2, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
@@ -20717,27 +20752,27 @@ zftl_do_gc:
 	mov	w2, 1
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3302
+	tbz	x0, 8, .L3303
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3302:
+.L3303:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3303
+	beq	.L3304
 	tst	w0, 192
-	bne	.L3304
-.L3303:
+	bne	.L3305
+.L3304:
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2281
+	mov	w2, 2286
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3304:
+.L3305:
 	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
@@ -20747,56 +20782,56 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3305
+	bhi	.L3306
 	strh	w0, [x19, 30]
-	b	.L3330
-.L3305:
+	b	.L3333
+.L3306:
 	strh	wzr, [x19, 30]
-.L3394:
+.L3397:
 	bl	flt_sys_flush
-	b	.L3330
-.L3232:
+	b	.L3333
+.L3233:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3306
+	bne	.L3307
 	adrp	x0, .LANCHOR71
 	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3306
+	bne	.L3307
 	bl	ftl_flush
 	adrp	x0, .LANCHOR62
 	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3307
+	cbz	w1, .L3308
 	mov	w0, w22
 	mov	w1, 5
-.L3391:
+.L3394:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3309
+	beq	.L3310
 	adrp	x0, .LANCHOR7
 	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3310
+	beq	.L3311
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2310
+	mov	w2, 2315
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3310:
+.L3311:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3329:
+.L3332:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20859,12 +20894,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3330
-.L3307:
+	b	.L3333
+.L3308:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3391
-.L3306:
+	b	.L3394
+.L3307:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20877,24 +20912,24 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR71
 	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3313:
+.L3314:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3330
+	beq	.L3333
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3314
+	cbnz	w0, .L3315
 	adrp	x0, .LANCHOR51
 	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3315
+	bhi	.L3316
 	bl	ftl_write_commit
-.L3315:
+.L3316:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3313
+	bcc	.L3314
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
@@ -20904,35 +20939,35 @@ zftl_do_gc:
 	mov	x19, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3317
+	cbz	w1, .L3318
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	mov	w2, 2385
+	mov	w2, 2390
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3317:
+.L3318:
 	ldrh	w0, [x21, #:lo12:.LANCHOR62]
 	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3318
+	cbnz	w1, .L3319
 	bl	ftl_free_sblk
-	b	.L3292
-.L3318:
+	b	.L3293
+.L3319:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3292
-.L3314:
+	b	.L3293
+.L3315:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3319
+	cbz	w0, .L3320
 	ldr	w0, [x20, 324]
 	strh	wzr, [x20, 320]
 	cmn	w0, #1
-	beq	.L3320
+	beq	.L3321
 	bl	ftl_mask_bad_block
-.L3320:
+.L3321:
 	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
@@ -20947,28 +20982,28 @@ zftl_do_gc:
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3321
+	cbz	x0, .L3322
 	bl	buf_free
-.L3321:
+.L3322:
 	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2421
+	mov	w2, 2426
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3330
-.L3319:
+	b	.L3333
+.L3320:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3322
+	bls	.L3323
 	cmp	w1, w0
-	bcc	.L3313
+	bcc	.L3314
 	mov	w0, 1
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
@@ -20979,12 +21014,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3330
-.L3322:
+	b	.L3333
+.L3323:
 	mov	w2, 5
 	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3323
+	bcc	.L3324
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20993,7 +21028,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3323:
+.L3324:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -21011,37 +21046,40 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3324
+	bne	.L3326
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
+	adrp	x1, .LANCHOR104
+	ldrb	w1, [x1, #:lo12:.LANCHOR104]
+	cbnz	w1, .L3326
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3324:
+.L3326:
 	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3330
-.L3326:
+	b	.L3333
+.L3329:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3327
+	bcc	.L3330
 	mov	w0, 6
 	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3330
-.L3327:
+	b	.L3333
+.L3330:
 	cmp	w21, 15
-	bls	.L3235
+	bls	.L3236
 	cmp	w26, 1
-	bne	.L3330
+	bne	.L3333
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3235
-	b	.L3330
-.L3234:
+	bls	.L3236
+	b	.L3333
+.L3235:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -21054,17 +21092,17 @@ zftl_do_gc:
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3395:
+.L3398:
 	strb	wzr, [x19, #:lo12:.LANCHOR145]
-	b	.L3330
-.L3309:
-	mov	w2, 2316
+	b	.L3333
+.L3310:
+	mov	w2, 2321
 	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3329
+	b	.L3332
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -21084,22 +21122,22 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3398
+	tbz	x0, 12, .L3401
 	mov	w3, w2
-	adrp	x0, .LC215
+	adrp	x0, .LC217
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC217
 	mov	w1, w27
 	bl	printf
-.L3398:
-	cbnz	w27, .L3399
+.L3401:
+	cbnz	w27, .L3402
 	adrp	x0, .LANCHOR58
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR58]
-.L3400:
+.L3403:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3414
+	bcc	.L3417
 	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
@@ -21114,8 +21152,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3402:
-	cbnz	w21, .L3410
+.L3405:
+	cbnz	w21, .L3413
 	adrp	x20, .LANCHOR90
 	adrp	x19, .LANCHOR94
 	add	x20, x20, :lo12:.LANCHOR90
@@ -21125,14 +21163,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3411:
+.L3414:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3412
+	ble	.L3415
 	mov	w0, 0
-.L3397:
+.L3400:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21140,28 +21178,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3399:
+.L3402:
 	cmp	w27, 3
-	bhi	.L3414
+	bhi	.L3417
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3400
-.L3410:
+	b	.L3403
+.L3413:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3403
+	cbnz	x0, .L3406
 	bl	ftl_write_commit
-	b	.L3402
-.L3403:
+	b	.L3405
+.L3406:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3406
+	bne	.L3409
 	cmp	w26, w22
-	bne	.L3407
+	bne	.L3410
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -21170,9 +21208,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3419:
+.L3422:
 	strb	w3, [x28, 56]
-.L3406:
+.L3409:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -21194,19 +21232,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3402
-.L3407:
+	b	.L3405
+.L3410:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3419
-.L3412:
+	b	.L3422
+.L3415:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3411
-.L3414:
+	b	.L3414
+.L3417:
 	mov	w0, -1
-	b	.L3397
+	b	.L3400
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -21265,12 +21303,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3425
+	bne	.L3428
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3425:
+.L3428:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -21297,7 +21335,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3448
+	bcc	.L3451
 	adrp	x24, .LANCHOR216
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR14
@@ -21306,14 +21344,14 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR216]
-	tbz	x2, 12, .L3429
-	adrp	x0, .LC216
+	tbz	x2, 12, .L3432
+	adrp	x0, .LC218
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC216
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3429:
+.L3432:
 	adrp	x23, .LANCHOR97
 	adrp	x26, .LANCHOR121
 	ldr	x0, [x23, #:lo12:.LANCHOR97]
@@ -21325,7 +21363,7 @@ zftl_discard:
 	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3430
+	cbz	w25, .L3433
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -21333,20 +21371,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3431
+	bne	.L3434
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3431:
+.L3434:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3433
+	beq	.L3436
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3433
+	cbz	x0, .L3436
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -21365,53 +21403,53 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3433:
+.L3436:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3430:
-	cbz	w19, .L3435
+.L3433:
+	cbz	w19, .L3438
 	bl	ftl_flush
-.L3435:
+.L3438:
 	adrp	x25, .LANCHOR99
 	add	x21, x26, :lo12:.LANCHOR121
 	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3436:
+.L3439:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3441
-	cbz	w19, .L3443
+	bcs	.L3444
+	cbz	w19, .L3446
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3444
+	bne	.L3447
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3444:
+.L3447:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3443
+	beq	.L3446
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3443
+	cbz	x0, .L3446
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
 	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3446
+	bcc	.L3449
 	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
 	mov	w2, 1235
 	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3446:
+.L3449:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -21423,38 +21461,38 @@ zftl_discard:
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3443:
+.L3446:
 	ldr	w1, [x24, #:lo12:.LANCHOR216]
 	cmp	w1, 8192
-	bls	.L3449
+	bls	.L3452
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR14]
-	tbz	x0, 12, .L3447
-	adrp	x0, .LC216
+	tbz	x0, 12, .L3450
+	adrp	x0, .LC218
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC216
+	add	x0, x0, :lo12:.LC218
 	bl	printf
-.L3447:
+.L3450:
 	str	wzr, [x24, #:lo12:.LANCHOR216]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR116
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR116]
-.L3449:
+.L3452:
 	mov	w0, 0
-	b	.L3427
-.L3441:
+	b	.L3430
+.L3444:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3437
+	beq	.L3440
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3439
+	cbz	x0, .L3442
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21466,24 +21504,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3475:
+.L3478:
 	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3439:
+.L3442:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3436
-.L3437:
+	b	.L3439
+.L3440:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3439
+	beq	.L3442
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21501,10 +21539,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3475
-.L3448:
+	b	.L3478
+.L3451:
 	mov	w0, -1
-.L3427:
+.L3430:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21706,7 +21744,7 @@ _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR198,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21757,7 +21795,7 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
@@ -21812,7 +21850,7 @@ _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -21826,7 +21864,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR203,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -21933,7 +21971,7 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -21953,7 +21991,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -21966,7 +22004,7 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
@@ -22007,7 +22045,7 @@ ftl_sblk_vpn:
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -22020,7 +22058,7 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
@@ -22112,7 +22150,7 @@ g_flash_multi_page_read_en:
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -22159,7 +22197,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -22178,7 +22216,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -22249,7 +22287,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -22507,7 +22545,7 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
@@ -22557,7 +22595,7 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
@@ -22570,7 +22608,7 @@ pm_first_write:
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR201,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
@@ -22590,7 +22628,7 @@ pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
@@ -22664,7 +22702,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -22753,7 +22791,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -23598,7 +23636,7 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR194,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -24458,7 +24496,7 @@ __func__.10066:
 	.string	"_list_update_data_list"
 	.section	.rodata.__func__.10174,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	__func__.10174, %object
 	.size	__func__.10174, 15
 __func__.10174:
@@ -24486,21 +24524,21 @@ __func__.10257:
 	.string	"ftl_free_sys_blk"
 	.section	.rodata.__func__.10292,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	__func__.10292, %object
 	.size	__func__.10292, 14
 __func__.10292:
 	.string	"ftl_sblk_dump"
 	.section	.rodata.__func__.10316,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	__func__.10316, %object
 	.size	__func__.10316, 16
 __func__.10316:
 	.string	"ftl_sysblk_dump"
 	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	__func__.10335, %object
 	.size	__func__.10335, 23
 __func__.10335:
@@ -24535,35 +24573,35 @@ __func__.10411:
 	.string	"ftl_ext_alloc_new_blk"
 	.section	.rodata.__func__.10436,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	__func__.10436, %object
 	.size	__func__.10436, 19
 __func__.10436:
 	.string	"ftl_ext_info_flush"
 	.section	.rodata.__func__.10448,"a",@progbits
 	.align	3
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	__func__.10448, %object
 	.size	__func__.10448, 18
 __func__.10448:
 	.string	"ftl_ext_info_init"
 	.section	.rodata.__func__.10485,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	__func__.10485, %object
 	.size	__func__.10485, 25
 __func__.10485:
 	.string	"ftl_low_format_data_init"
 	.section	.rodata.__func__.10500,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	__func__.10500, %object
 	.size	__func__.10500, 15
 __func__.10500:
 	.string	"ftl_low_format"
 	.section	.rodata.__func__.10548,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	__func__.10548, %object
 	.size	__func__.10548, 14
 __func__.10548:
@@ -24577,7 +24615,7 @@ __func__.10665:
 	.string	"queue_wait_first_req_completed"
 	.section	.rodata.__func__.10718,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	__func__.10718, %object
 	.size	__func__.10718, 15
 __func__.10718:
@@ -24591,7 +24629,7 @@ __func__.10745:
 	.string	"sblk_read_page"
 	.section	.rodata.__func__.10784,"a",@progbits
 	.align	3
-	.set	.LANCHOR198,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	__func__.10784, %object
 	.size	__func__.10784, 16
 __func__.10784:
@@ -24605,7 +24643,7 @@ __func__.10798:
 	.string	"pm_free_sblk"
 	.section	.rodata.__func__.10818,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	__func__.10818, %object
 	.size	__func__.10818, 6
 __func__.10818:
@@ -24619,7 +24657,7 @@ __func__.10834:
 	.string	"pm_alloc_new_blk"
 	.section	.rodata.__func__.10844,"a",@progbits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	__func__.10844, %object
 	.size	__func__.10844, 14
 __func__.10844:
@@ -24640,7 +24678,7 @@ __func__.8511:
 	.string	"flash_read_page_en"
 	.section	.rodata.__func__.8540,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	__func__.8540, %object
 	.size	__func__.8540, 19
 __func__.8540:
@@ -24668,14 +24706,14 @@ __func__.8580:
 	.string	"flash_wait_device_ready_raw"
 	.section	.rodata.__func__.8604,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	__func__.8604, %object
 	.size	__func__.8604, 26
 __func__.8604:
 	.string	"flash_start_tlc_page_prog"
 	.section	.rodata.__func__.8622,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	__func__.8622, %object
 	.size	__func__.8622, 22
 __func__.8622:
@@ -24724,7 +24762,7 @@ __func__.8992:
 	.string	"nand_flash_print_info"
 	.section	.rodata.__func__.9036,"a",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	__func__.9036, %object
 	.size	__func__.9036, 16
 __func__.9036:
@@ -24773,7 +24811,7 @@ __func__.9269:
 	.string	"flash_into_data_init"
 	.section	.rodata.__func__.9291,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	__func__.9291, %object
 	.size	__func__.9291, 17
 __func__.9291:
@@ -24808,7 +24846,7 @@ __func__.9476:
 	.string	"zftl_add_read_buf"
 	.section	.rodata.__func__.9509,"a",@progbits
 	.align	3
-	.set	.LANCHOR209,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	__func__.9509, %object
 	.size	__func__.9509, 10
 __func__.9509:
@@ -24829,14 +24867,14 @@ __func__.9659:
 	.string	"gc_add_sblk"
 	.section	.rodata.__func__.9680,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR209,. + 0
 	.type	__func__.9680, %object
 	.size	__func__.9680, 21
 __func__.9680:
 	.string	"gc_check_data_one_wl"
 	.section	.rodata.__func__.9714,"a",@progbits
 	.align	3
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	__func__.9714, %object
 	.size	__func__.9714, 22
 __func__.9714:
@@ -24864,14 +24902,14 @@ __func__.9778:
 	.string	"gc_free_src_blk"
 	.section	.rodata.__func__.9823,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	__func__.9823, %object
 	.size	__func__.9823, 16
 __func__.9823:
 	.string	"gc_scan_src_blk"
 	.section	.rodata.__func__.9881,"a",@progbits
 	.align	3
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR206,. + 0
 	.type	__func__.9881, %object
 	.size	__func__.9881, 20
 __func__.9881:
@@ -24887,27 +24925,27 @@ __func__.9948:
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC151:
+.LC150:
 	.string	"free_buf_count: %d\n"
-.LC152:
+.LC151:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC153:
+.LC152:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC154:
+.LC153:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC155:
+.LC154:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC156:
+.LC155:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC157:
+.LC156:
 	.string	"lpa:"
-.LC158:
+.LC157:
 	.string	"vpn:"
-.LC159:
+.LC158:
 	.string	"sblk:"
-.LC160:
+.LC159:
 	.string	"lpa_hash:"
-.LC161:
+.LC160:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -24946,11 +24984,11 @@ __func__.9948:
 .LC116:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC146:
+.LC145:
 	.string	"finfo:"
-.LC147:
+.LC146:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC148:
+.LC147:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
 .LC84:
@@ -24959,18 +24997,18 @@ __func__.9948:
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC121:
+.LC120:
 	.string	"flash_prog_page %x %x %x\n"
-.LC122:
+.LC121:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC127:
+.LC126:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC128:
+.LC127:
 	.string	"spare"
-.LC129:
+.LC128:
 	.string	"data"
-.LC130:
+.LC129:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -24992,7 +25030,7 @@ __func__.9948:
 .LC67:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
-.LC135:
+.LC134:
 	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
@@ -25000,70 +25038,70 @@ __func__.9948:
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC133:
+.LC132:
 	.string	"%d %x @%d %x\n"
-.LC134:
+.LC133:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC132:
+.LC131:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC136:
+.LC135:
 	.string	"ftl_low_format %d\n"
-.LC137:
+.LC136:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC139:
+.LC138:
 	.string	"saved_active_page  = %x\n"
-.LC140:
+.LC139:
 	.string	"saved_active_plane = %x\n"
-.LC141:
+.LC140:
 	.string	"sblk = %x\n"
-.LC142:
+.LC141:
 	.string	"phy_blk = %x %x\n"
-.LC143:
+.LC142:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC144:
+.LC143:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC138:
+.LC137:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC194:
+.LC193:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
-.LC195:
+.LC194:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC196:
+.LC195:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC197:
+.LC196:
 	.string	"index= %x, lpa=%x\n"
-.LC198:
+.LC197:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC149:
+.LC148:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC150:
+.LC149:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC131:
+.LC130:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC202:
+.LC204:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC203:
+.LC205:
 	.string	"ftl_update_l2p_map"
-.LC204:
+.LC206:
 	.string	"lpa_tbl:"
-.LC205:
+.LC207:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC206:
+.LC208:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -25074,16 +25112,20 @@ __func__.9948:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC120:
-	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+.LC201:
+	.string	"gc_lpa:"
+.LC202:
+	.string	"gc_ppa:"
+.LC203:
+	.string	"err: ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC207:
+.LC209:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC208:
+.LC210:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC209:
+.LC211:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC210:
+.LC212:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -25094,16 +25136,16 @@ __func__.9948:
 .LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC172:
+.LC171:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC173:
+.LC172:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC174:
+.LC173:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC192:
+.LC191:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC193:
+.LC192:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
 .LC47:
@@ -25130,13 +25172,13 @@ __func__.9948:
 .LC81:
 	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC188:
+.LC187:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC189:
+.LC188:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC190:
+.LC189:
 	.string	"lpa: %x %x %x\n"
-.LC191:
+.LC190:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
 .LC43:
@@ -25152,24 +25194,24 @@ __func__.9948:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC123:
+.LC122:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC124:
+.LC123:
 	.string	"write_idblock check fail! %x\n"
-.LC125:
+.LC124:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC163:
+.LC162:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC164:
+.LC163:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC165:
+.LC164:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC166:
+.LC165:
 	.string	"pm_ppa:"
-.LC167:
+.LC166:
 	.string	"data:"
-.LC168:
+.LC167:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
@@ -25274,18 +25316,18 @@ __func__.9948:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC169:
+.LC168:
 	.string	"pm_init posr %x %x %x\n"
-.LC170:
+.LC169:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC171:
+.LC170:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC162:
+.LC161:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC145:
+.LC144:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -25446,7 +25488,7 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC187:
+.LC186:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
 .LC88:
@@ -25461,7 +25503,7 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC126:
+.LC125:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
@@ -26059,16 +26101,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC216:
+.LC218:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC211:
+.LC213:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC212:
+.LC214:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC213:
+.LC215:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC214:
+.LC216:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -26081,41 +26123,41 @@ toshiba_ref_value:
 .LC52:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
+.LC174:
+	.string	"FTL version: 6.0.9 20180704"
 .LC175:
-	.string	"FTL version: 6.0.8 20180615"
-.LC176:
 	.string	"_c_user_data_density := %d\n"
-.LC177:
+.LC176:
 	.string	"_c_totle_phy_density := %d\n"
-.LC178:
+.LC177:
 	.string	"_c_totle_log_page := %d\n"
-.LC179:
+.LC178:
 	.string	"_c_totle_data_density := %d\n"
-.LC180:
+.LC179:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC181:
+.LC180:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC182:
+.LC181:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC183:
+.LC182:
 	.string	"_min_slc_super_block := %d\n"
-.LC184:
+.LC183:
 	.string	"_max_xlc_super_block := %d\n"
-.LC185:
+.LC184:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC186:
+.LC185:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC199:
+.LC198:
 	.string	"ftl_read %x %x %x\n"
-.LC200:
+.LC199:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
-.LC201:
+.LC200:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC215:
+.LC217:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 6651d4c0fb8433da6f9737983230f0dd687b8fb1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 3 19:22:24 2018 +0800

    dev_desc: judge dev_desc whether NULL or not before use it
    
    Change-Id: I9d0e2d207a143a02949fbdff2d9ad39f154e4f3e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
old mode 100644
new mode 100755
index faa85d022a..1d972941bf
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -180,6 +180,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!hdr) {
 		printf("%s out of memory!\n", __func__);
@@ -323,6 +327,10 @@ int rockchip_read_resource_file(void *buf, const char *name,
 		len = file->f_size;
 	blks = DIV_ROUND_UP(len, RK_BLK_SIZE);
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
 			blks, buf);
 	if (ret != blks)
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
old mode 100644
new mode 100755
index cef6e5254d..4963bb6748
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -111,6 +111,10 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 	int ret = 0;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	/* Get the offset address according to the device type */
 	switch (dev_desc->if_type) {
 	case IF_TYPE_MMC:
diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
old mode 100644
new mode 100755
index c97e44f4db..fd104f4874
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -24,6 +24,10 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	int i = 0;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 
 #ifdef CONFIG_OPTEE_CLIENT
 	disk_partition_t misc_part_info;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
old mode 100644
new mode 100755
index 0252924c59..4de48926ea
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -221,6 +221,11 @@ static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
 	disk_partition_t part_info;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
+
 	int ret = part_get_info_by_name(dev_desc, PART_MISC,
 			&part_info);
 	if (ret < 0) {
@@ -253,6 +258,11 @@ void board_run_recovery_wipe_data(void)
 
 	printf("Rebooting into recovery to do wipe_data\n");
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
+
 	int ret;
 
 	ret = part_get_info_by_name(dev_desc, PART_MISC,
@@ -310,6 +320,10 @@ int rockchip_get_boot_mode(void)
 		return boot_mode;
 
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -ENODEV;
+	}
 	ret = part_get_info_by_name(dev_desc, PART_MISC,
 			&part_info);
 	if (ret < 0) {
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
old mode 100644
new mode 100755
index 48ec1cf0d9..4fdafabe53
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -301,6 +301,10 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 #endif
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
 #else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 #endif
@@ -412,6 +416,10 @@ void fb_mmc_erase(const char *cmd, char *response)
 
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
 #else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 #endif
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 6570aef9b2..b6edd661e9 100755
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1232,6 +1232,10 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		struct blk_desc *dev_desc;
 		disk_partition_t part_info;
 		dev_desc = rockchip_get_bootdev();
+		if (!dev_desc) {
+			printf("%s: dev_desc is NULL!\n", __func__);
+			return;
+		}
 		int ret = part_get_info_by_name(dev_desc, "userdata",
 				&part_info);
 		if (ret < 0) {
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
old mode 100644
new mode 100755
index e5400a2ed6..8c7c3dc1b7
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -23,6 +23,10 @@ void test_optee(void)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -132,6 +136,10 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	debug("testmm start\n");
@@ -216,6 +224,10 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	uint8_t hs[9];
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	OpteeClientApiLibInitialize();
@@ -299,6 +311,10 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -378,6 +394,10 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -458,6 +478,10 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -537,6 +561,10 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -617,6 +645,10 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -697,6 +729,10 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -780,6 +816,10 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("read_from_keymaster start\n");
 	OpteeClientApiLibInitialize();
@@ -863,6 +903,10 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("write_to_keymaster\n");
 	OpteeClientApiLibInitialize();
@@ -1302,6 +1346,10 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -1380,6 +1428,10 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
@@ -1462,6 +1514,10 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	OpteeClientApiLibInitialize();
 
@@ -1531,6 +1587,10 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	OpteeClientApiLibInitialize();
 
@@ -1607,6 +1667,10 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	OpteeClientApiLibInitialize();
 
@@ -1685,6 +1749,10 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 	TEEC_Operation TeecOperation = {0};
 	struct blk_desc *dev_desc;
 	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: dev_desc is NULL!\n", __func__);
+		return -TEEC_ERROR_GENERIC;
+	}
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 

commit 94685712a7e743bebac51d4f67256e0175709796
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Jul 3 18:15:49 2018 +0800

    rockchip: common: fix scan mmc 1 bug
    
    Set detect mmc 1 and rkimgtest mmc 1 at the same
    level. If not, the devtype will be set as default
    when run rkimgtest mmc 1 fail but not scan other
    storge devices.
    
    Change-Id: I971ea5a8e70f17641483f00b8d467ac5757ca533
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 4c8220e8bd..4df4e0ef1e 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -86,9 +86,8 @@
 
 #define RKIMG_DET_BOOTDEV \
 	"rkimg_bootdev=" \
-	"if mmc dev 1; then " \
-		"if rkimgtest mmc 1; then " \
-		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard; fi;" \
+	"if mmc dev 1 && rkimgtest mmc 1; then " \
+		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard;" \
 	"elif mmc dev 0; then " \
 		"setenv devtype mmc; setenv devnum 0;" \
 	"elif rknand dev 0; then " \

commit 05f86d2dcb32d8c1c687b81446fb940dfe6b1e55
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Jun 28 19:30:48 2018 +0800

    rockchip: configs: evb-aarch-rk3308: enable rkflash driver for aarch32 evb
    
    1.Change to slc ftl for rk Slc Nand Flash devices;
    2.Enabel spi nand, spi nor drivers.
    
    Change-Id: I3314b4dfcfff356a37d50934b1235d8304b738fa
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
index 80d7028268..bfb681e62c 100644
--- a/configs/evb-aarch32-rk3308_defconfig
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -43,7 +43,10 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_RKNAND=y
+CONFIG_RKFLASH=y
+CONFIG_RKNANDC_NAND=y
+CONFIG_RKSFC_NOR=y
+CONFIG_RKSFC_NAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 4aae031371b0f968793a0b7b290ca5239592516d
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Jun 29 14:13:10 2018 +0800

    fuel gauge: rk817: fix the fuel gauge error
    
    The GAS_GUAGE_Q_INIT was written to the wrong value causing the fuel gauge to fail.
    
    Change-Id: Idbafc110deef6f6ce93dac9a0ad81974d1f112a9
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index c6e4b3bfef..78b3113ea7 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -812,7 +812,7 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 		battery->remain_cap = rk817_bat_get_capacity_uah(battery);
 		battery->rsoc = rk817_bat_get_rsoc(battery);
 		pre_soc = battery->rsoc;
-		pre_cap = battery->remain_cap;
+		pre_cap = battery->remain_cap / 1000;
 		goto finish;
 	}
 finish:

commit 04d4208bc859b5627fe5079144a82e35f5d3451e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jul 2 11:14:14 2018 +0800

    regulator: rk8xx: fix LDO 'config_reg' missing
    
    1. use 'NA' to indicate not unsed or not exist configure;
    2. there is not configure register for ldo, so define it as NA;
    
    Change-Id: Ic87e5c9fe6128c14a47a306a8726c487d5b96664
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index f3f9620280..5fe2fdef16 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -20,6 +20,9 @@
 #define ENABLE_DRIVER
 #endif
 
+/* Not used or exisit register and configure */
+#define NA			-1
+
 /* Field Definitions */
 #define RK808_BUCK_VSEL_MASK	0x3f
 #define RK808_BUCK4_VSEL_MASK	0xf
@@ -89,7 +92,7 @@ struct rk8xx_reg_info {
 static const struct rk8xx_reg_info rk808_buck[] = {
 	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },
 	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
 	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
 };
 
@@ -103,17 +106,17 @@ static const struct rk8xx_reg_info rk816_buck[] = {
 	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
 	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 3 */
-	{ 712500, 12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */
 	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk809_buck5[] = {
 	/* buck 5 */
-	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x01, },
-	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x04, },
-	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x06, },
+	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x01, },
+	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x04, },
+	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA, RK809_BUCK5_VSEL_MASK, 0x06, },
 };
 
 static const struct rk8xx_reg_info rk817_buck[] = {
@@ -138,70 +141,70 @@ static const struct rk8xx_reg_info rk817_buck[] = {
 static const struct rk8xx_reg_info rk818_buck[] = {
 	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },
 	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, NA,		      NA,		  REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
 	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 #ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info rk808_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK808_BUCK4_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_ldo[] = {
-	{ 800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk817_ldo[] = {
 	/* ldo1 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo2 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo3 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo4 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo5 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo6 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo7 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo8 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), NA, RK817_LDO_VSEL_MASK, 0x70, },
 	/* ldo9 */
-	{  600000, 25000, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x00, },
-	{ 3400000,     0, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x70, },
+	{  600000, 25000, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), NA, RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), NA, RK817_LDO_VSEL_MASK, 0x70, },
 };
 
 static const struct rk8xx_reg_info rk818_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO3_ON_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK818_LDO3_ON_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
 };
 #endif
 
@@ -275,7 +278,7 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)	/* Fixed voltage */
@@ -358,7 +361,7 @@ static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_sleep_reg == -1)
+	if (info->vsel_sleep_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)
@@ -421,7 +424,7 @@ static int _buck_set_ramp_delay(struct udevice *pmic, int buck, u32 ramp_delay)
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 	u32 ramp_value, ramp_mask;
 
-	if (info->config_reg == -1)
+	if (info->config_reg == NA)
 		return -ENOSYS;
 
 	switch (priv->variant) {
@@ -698,7 +701,7 @@ static int buck_get_value(struct udevice *dev)
 	int mask = info->vsel_mask;
 	int ret, val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 
 	ret = pmic_reg_read(dev->parent, info->vsel_reg);
@@ -758,7 +761,7 @@ static int ldo_get_value(struct udevice *dev)
 	int mask = info->vsel_mask;
 	int ret, val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 	ret = pmic_reg_read(dev->parent, info->vsel_reg);
 	if (ret < 0)
@@ -775,7 +778,7 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_reg == -1)
+	if (info->vsel_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)
@@ -796,7 +799,7 @@ static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
 	int mask = info->vsel_mask;
 	int val;
 
-	if (info->vsel_sleep_reg == -1)
+	if (info->vsel_sleep_reg == NA)
 		return -ENOSYS;
 
 	if (info->step_uv == 0)

commit d9d90a730437e3fae3b6e92c5a07b7406e1009ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 28 16:04:57 2018 +0800

    make.sh: pack all loader image for target platform
    
    mainly for rk3399 ini files:
            RK3399MINIALL.ini
            RK3399MINIALL_SPINOR.ini
    
    Change-Id: I025c98c2cb0a4e8d6070efe1999797c90b113036
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index aeb808b098..d6a53dc066 100755
--- a/make.sh
+++ b/make.sh
@@ -309,15 +309,24 @@ pack_uboot_image()
 
 pack_loader_image()
 {
+	local files ini
+
 	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
 		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	files=`ls ${RKBIN}/RKBOOT/${RKCHIP}MINIALL*.ini`
+	for ini in $files
+	do
+		if [ -f "$ini" ]; then
+			${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ $ini
+			echo "pack loader okay! Input: $ini"
+		fi
+	done
+
 	cd - && mv ${RKBIN}/*_loader_*.bin ./
-	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
 pack_trust_image()

commit b62551987d806134802370b59fc0d63317f4058c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 28 15:13:15 2018 +0800

    make.sh: clean up
    
    1. improve help description;
    2. support subcmd without [board] option;
    3. imporve 'O=<dir>' support;
    4. imporve code format;
    
    Change-Id: I7bb0d6176ce856750cfbcd234edfb8b237ea424a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0569f4851d..aeb808b098 100755
--- a/make.sh
+++ b/make.sh
@@ -1,9 +1,9 @@
 #!/bin/sh
 set -e
 BOARD=$1
-SUBCMD=$2
+SUBCMD=$1
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
-SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
+SUPPORT_LIST=`ls configs/*[r,p][x,v,k][0-9][0-9]*_defconfig`
 
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
@@ -30,7 +30,7 @@ TOOLCHAIN_GCC=
 TOOLCHAIN_OBJDUMP=
 
 # Declare global default output dir and cmd, update in prepare()
-OUTDIR=
+OUTDIR=$2
 OUTOPT=
 
 # Declare global plaform configure, updated in fixup_platform_configure()
@@ -40,40 +40,101 @@ PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 PLATFORM_AARCH32=
 #########################################################################################################
+help()
+{
+	echo
+	echo "Usage: ./make.sh [board|subcmd] [O=<dir>]"
+	echo
+	echo "Example:"
+	echo
+	echo "1. Build:"
+	echo "	./make.sh evb-rk3399     	---- build for evb-rk3399_defconfig"
+	echo "	./make.sh evb-rk3399 O=rockdev  ---- build for evb-rk3399_defconfig with output dir "./rockdev""
+	echo "	./make.sh firefly-rk3288 	---- build for firefly-rk3288_defconfig"
+	echo "	./make.sh			---- build with exist .config"
+	echo
+	echo "	After build, images of uboot, loader and trust are all generated."
+	echo
+	echo "2. Subcmd helper:"
+	echo "	./make.sh trust		--- pack trust.img without rebuild project"
+	echo "	./make.sh loader	--- pack loader bin without rebuild project"
+	echo "	./make.sh uboot		--- pack uboot.img without rebuild project"
+	echo
+	echo "3. Debug helper:"
+	echo "	./make.sh elf		--- dump elf file with -D(default)"
+	echo "	./make.sh elf-S		--- dump elf file with -S"
+	echo "	./make.sh map		--- cat u-boot.map"
+	echo "	./make.sh sym		--- cat u-boot.sym"
+}
 
 prepare()
 {
-	local absolute_path cmd
+	local absolute_path cmd dir count
 
-	# Assign output directory
-	cmd=${SUBCMD%=*}
+	# Parse output directory
+	cmd=${OUTDIR%=*}
 	if [ "${cmd}" = 'O' ]; then
-		OUTDIR=${SUBCMD#*=}
+		OUTDIR=${OUTDIR#*=}
 		OUTOPT=O=${OUTDIR}
 	else
-		OUTDIR=.
-	fi
+		case $BOARD in
+			''|elf*|trust|loader|uboot|map|sym)
+			count=`find -name .config | wc -l`
+			dir=`find -name .config`
+			if [ $count -eq 1 ]; then
+				dir=${dir%/*}
+				OUTDIR=${dir#*/}
+				if [ $OUTDIR != '.' ]; then
+					OUTOPT=O=${OUTDIR}
+				fi
+			elif [ $count -eq 0 ]; then
+				echo
+				echo "Build failed, Can't find .config"
+				help
+				exit 1
+			else
+				echo
+				echo "Build failed, find $count '.config': "
+				echo "$dir"
+				echo "Please leave only one of them"
+				exit 1
+			fi
+			;;
 
-	# Check invalid args and help
-	if [ "$BOARD" = '--help' -o "$BOARD" = '-help' -o "$BOARD" = 'help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
-		echo
-		echo "Usage: ./make.sh [board]"
-		echo "Example:"
-		echo "./make.sh		 ---- build with exist .config"
-		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
-		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
-		exit 1
-	elif [ $BOARD ] && [ ! -f configs/${BOARD}_defconfig ]; then
-		echo
-		echo "Can't find: configs/${BOARD}_defconfig"
-		echo
-		echo "******** Rockchip Support List *************"
-		echo "${SUPPORT_LIST}"
-		echo "********************************************"
-		echo
-		exit 1
+			*)
+			OUTDIR=.
+			;;
+		esac
 	fi
 
+	# Parse help and make defconfig
+	case $BOARD in
+		#help
+		--help|-help|help|--h|-h)
+		help
+		exit 0
+		;;
+		#subcmd
+		''|elf*|trust|loader|uboot|map|sym)
+		;;
+
+		*)
+		if [ ! -f configs/${BOARD}_defconfig ]; then
+			echo
+			echo "Can't find: configs/${BOARD}_defconfig"
+			echo
+			echo "******** Rockchip Support List *************"
+			echo "${SUPPORT_LIST}"
+			echo "********************************************"
+			echo
+			exit 1
+		else
+			echo "make for ${BOARD}_defconfig by -j${JOB}"
+			make ${BOARD}_defconfig ${OUTOPT}
+		fi
+		;;
+	esac
+
 	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
@@ -90,14 +151,6 @@ prepare()
 	fi
 }
 
-make_defconfig()
-{
-	if [ $BOARD ]; then
-		echo "make for ${BOARD}_defconfig by -j${JOB}"
-		make ${BOARD}_defconfig ${OUTOPT}
-	fi
-}
-
 select_toolchain()
 {
 	local absolute_path
@@ -125,39 +178,53 @@ select_toolchain()
 	echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
-# Support subcmd:
-#	./make.sh evb-rk3288 elf	--- dump elf file with -D(default)
-#	./make.sh evb-rk3288 elf-S	--- dump elf file with -S
-#	./make.sh evb-rk3288 trust	--- pack trust.img without compile u-boot
-#	./make.sh evb-rk3288 loader	--- pack loader bin without compile u-boot
-#	./make.sh evb-rk3288 uboot	--- pack uboot.img without compile u-boot
 sub_commands()
 {
-	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
+	local cmd=${SUBCMD%-*} elfopt=${SUBCMD#*-}
 
-	if [ "$elf" = 'elf' ]; then
+	case $cmd in
+		elf)
 		if [ ! -f ${OUTDIR}/u-boot ]; then
 			echo "Can't find elf file: ${OUTDIR}/u-boot"
 			exit 1
 		else
-			# default 'elf' without option, use '-D'
-			if [ "${elf}" = 'elf' -a "${opt}" = 'elf' ]; then
-				opt=D
+			# default 'cmd' without option, use '-D'
+			if [ "${cmd}" = 'elf' -a "${elfopt}" = 'elf' ]; then
+				elfopt=D
 			fi
-
-			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
+			${TOOLCHAIN_OBJDUMP} -${elfopt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
-	elif [ "$SUBCMD" = 'trust' ]; then
+		;;
+
+		map)
+		cat ${OUTDIR}/u-boot.map | less
+		exit 0
+		;;
+
+		sym)
+		cat ${OUTDIR}/u-boot.sym | less
+		exit 0
+		;;
+
+		trust)
 		pack_trust_image
 		exit 0
-	elif [ "$SUBCMD" = 'loader' ]; then
+		;;
+
+		loader)
 		pack_loader_image
 		exit 0
-	elif [ "$SUBCMD" = 'uboot' ]; then
+		;;
+
+		uboot)
 		pack_uboot_image
 		exit 0
-	fi
+		;;
+
+		*)
+		;;
+	esac
 }
 
 # Support platform special configure
@@ -321,7 +388,6 @@ finish()
 }
 
 prepare
-make_defconfig
 select_toolchain
 fixup_platform_configure
 sub_commands

commit 312bdeaca51588802c22e640a8ab8bc60cd2bf54
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 22 21:22:48 2018 +0800

    configs: rockchip: rk3288_defconfig
    
    Change-Id: I4c1bec92a5a2452e4afe5d3b0a1ff2694ceaccff
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3288_defconfig b/configs/rk3288_defconfig
new file mode 100644
index 0000000000..c7ddda3cc2
--- /dev/null
+++ b/configs/rk3288_defconfig
@@ -0,0 +1,92 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_TARGET_EVB_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 5b0c392267d45861a502496a4983fd5739a6fea1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 09:47:43 2018 +0800

    configs: rk3399: enable more configure
    
    Change-Id: Iaccea12ffa788a2ff07bd33601c3712d50e5b0d9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index 93039bff52..6d318ec834 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
@@ -47,6 +48,10 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_GPIO_KEY=y
+CONFIG_RK_KEY=y
 CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
@@ -58,11 +63,15 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK818=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
@@ -103,3 +112,4 @@ CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit f98160cbddbe17305948e3073b8c7aa610b5845a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 29 10:09:29 2018 +0800

    dm: regulator: verbose more regulator configure message
    
    regulator_show() is used as an debug way, so its verbose
    message should be detail enough, this helps a lot.
    
    Change-Id: Iabe5fc65e8b6ff27b9c92bc3f0b6948e1013a9c8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 88f0cf54a7..4f50945f2f 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -267,13 +267,19 @@ static void regulator_show(struct udevice *dev, int ret)
 	uc_pdata = dev_get_uclass_platdata(dev);
 
 	printf("%s@%s: ", dev->name, uc_pdata->name);
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
-		printf("set %d uV", uc_pdata->min_uV);
-	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA)
-		printf("; set %d uA", uc_pdata->min_uA);
-	printf("; enabling");
+	printf("%duV <-> %duV, set %duV, %s",
+	       uc_pdata->min_uV, uc_pdata->max_uV, uc_pdata->min_uV,
+	       (uc_pdata->always_on || uc_pdata->boot_on) ?
+	       "enabling" : "not enabling");
 	if (ret)
 		printf(" (ret: %d)", ret);
+
+	printf("; supsend %duV, %s",
+	       uc_pdata->suspend_uV,
+	       uc_pdata->suspend_on ? "enabling" : "not enabling");
+	if (uc_pdata->init_uV != -ENODATA)
+		printf("; init %duV", uc_pdata->init_uV);
+
 	printf("\n");
 }
 
@@ -435,10 +441,8 @@ int regulators_enable_boot_on(bool verbose)
 	     dev;
 	     uclass_next_device(&dev)) {
 		ret = regulator_autoset(dev);
-		if (ret == -EMEDIUMTYPE) {
+		if (ret == -EMEDIUMTYPE)
 			ret = 0;
-			continue;
-		}
 		if (verbose)
 			regulator_show(dev, ret);
 		if (ret == -ENOSYS)

commit 34483cf7020bb195dfb6d239f73edde86fcd812e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 28 09:56:50 2018 +0800

    dm: regulator: make suspend and normal configure non relative
    
    suspend configure result should not influence normal configure
    
    Change-Id: I7107ad5f3303d1f1456ada5949deced5fa8e4ec2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index b4e91251de..88f0cf54a7 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -234,9 +234,15 @@ int regulator_autoset(struct udevice *dev)
 	if (uc_pdata->ramp_delay != -ENODATA)
 		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
 
+	/*
+	 * Suspend configure is not necessary and should not influence normal
+	 * configure, so that we set "ret=0" even failed here.
+	 */
 	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
 	if (!ret && uc_pdata->suspend_on)
-		ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+		regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+	else
+		ret = 0;
 
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;

commit 7dc573239eaf3d56689b68a919435e61e960fd25
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:33:57 2018 +0800

    fuel gauge: rk818: clean up
    
    this is a initial version porting from rkdevelop
    commit: 64f6c0e.
    
    Change-Id: Iadc46282e0782d0cd985cb0ee9d317cb5d94f41e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
index b05a2100da..34b1cbbe69 100644
--- a/drivers/power/fuel_gauge/fg_rk818.c
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -12,6 +12,9 @@
 #include <asm/gpio.h>
 #include <common.h>
 #include <power/pmic.h>
+#include <dm/uclass-internal.h>
+#include <power/charge_display.h>
+#include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
@@ -33,7 +36,6 @@ static int dbg_enable = 0;
 
 /* THERMAL_REG */
 #define TEMP_105C		(0x02 << 2)
-#define TEMP_115C		(0x03 << 2)
 #define FB_TEMP_MSK		0x0c
 
 /* CHRG_CTRL_REG2 */
@@ -73,7 +75,11 @@ static int dbg_enable = 0;
 /* CHRG_USB_CTRL */
 #define CHRG_EN			(1 << 7)
 
+/* ADC_CTRL_REG */
 #define ADC_TS2_EN		(1 << 4)
+#define ADC_TS1_EN		(1 << 5)
+
+/* TS_CTRL_REG */
 #define TS2_ADC_MODE		(1 << 5)
 
 /* SUP_STS_REG */
@@ -99,6 +105,7 @@ static int dbg_enable = 0;
 #define FINISH_CALI_CURR	1500
 #define TERM_CALI_CURR		600
 #define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_CUR	1000
 #define	VIRTUAL_POWER_SOC	66
 #define SECONDS(n)		((n) * 1000)
 
@@ -133,18 +140,30 @@ static int dbg_enable = 0;
 #define TS2_VOL_MULTI		0
 #define TS2_CHECK_CNT		5
 
-#define DIV(x)			((x) ? (x) : 1)
+#define ADC_CUR_MSK		0x03
+#define ADC_CUR_20UA		0x00
+#define ADC_CUR_40UA		0x01
+#define ADC_CUR_60UA		0x02
+#define ADC_CUR_80UA		0x03
 
-/* charger type definition */
-enum charger_type {
-	NO_CHARGER = 0,
-	USB_CHARGER,
-	AC_CHARGER,
-	DC_CHARGER,
-	UNDEF_CHARGER,
-};
+#define NTC_CALC_FACTOR_80UA	7
+#define NTC_CALC_FACTOR_60UA	9
+#define NTC_CALC_FACTOR_40UA	13
+#define NTC_CALC_FACTOR_20UA	27
+#define NTC_80UA_MAX_MEASURE	27500
+#define NTC_60UA_MAX_MEASURE	36666
+#define NTC_40UA_MAX_MEASURE	55000
+#define NTC_20UA_MAX_MEASURE	110000
+
+#define ZERO_MIN_VOLTAGE	3800
+
+#define TS1_NOT_READY		0xabcdabcd
 
-struct battery_info {
+#define DIV(x)			((x) ? (x) : 1)
+
+/***********************************************************/
+struct battery_priv {
+	struct udevice *dev;
 	int		chrg_type;
 	int		poffset;
 	int		bat_res;
@@ -162,6 +181,12 @@ struct battery_info {
 	int		nac;
 	u32		*ocv_table;
 	u32		ocv_size;
+	u32		*ntc_table;
+	u32		ntc_size;
+	u32		ntc_factor;
+	u32		ntc_uA;
+	int		ntc_degree_from;
+	int		temperature;
 	int		virtual_power;
 	int		ts2_vol_multi;
 	int		pwroff_min;
@@ -187,7 +212,7 @@ struct battery_info {
 	int		sm_meet_soc;
 	u8		halt_cnt;
 	u8		dc_active_level;
-	bool		dc_is_valid;
+	u8		dc_is_valid;
 	bool		is_halt;
 	bool		is_ocv_calib;
 	bool		is_max_soc_offset;
@@ -198,10 +223,13 @@ struct battery_info {
 	int		pwr_vol;
 };
 
-static struct udevice *g_pmic_dev;
-
-/* TODO */
-#define CONFIG_SCREEN_ON_VOL_THRESD	3400
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
 
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
@@ -215,101 +243,106 @@ static const u32 CHRG_CUR_INPUT[] = {
 	450, 800, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000
 };
 
-static int rk818_bat_read(u8 reg)
+static int rk818_bat_read(struct battery_priv *di, u8 reg)
 {
-	return pmic_reg_read(g_pmic_dev, reg);
+	return pmic_reg_read(di->dev->parent, reg);
 }
 
-static void rk818_bat_write(u8 reg, u8 buf)
+static void rk818_bat_write(struct battery_priv *di, u8 reg, u8 buf)
 {
-	pmic_reg_write(g_pmic_dev, reg, buf);
+	pmic_reg_write(di->dev->parent, reg, buf);
 }
 
 static int rk818_bat_dwc_otg_check_dpdm(void)
 {
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
 	return rockchip_chg_get_type();
+#else
+	debug("rockchip_chg_get_type() is not implement\n");
+	return NO_CHARGER;
+#endif
 }
 
-static int rk818_bat_get_rsoc(struct battery_info *di)
+static int rk818_bat_get_rsoc(struct battery_priv *di)
 {
 	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
 }
 
-static int rk818_bat_get_dsoc(struct  battery_info *di)
+static int rk818_bat_get_dsoc(struct  battery_priv *di)
 {
-	return rk818_bat_read(SOC_REG);
+	return rk818_bat_read(di, SOC_REG);
 }
 
-static void rk818_bat_enable_gauge(struct battery_info *di)
+static void rk818_bat_enable_gauge(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk818_bat_read(TS_CTRL_REG);
+	val = rk818_bat_read(di, TS_CTRL_REG);
 	val |= GG_EN;
-	rk818_bat_write(TS_CTRL_REG, val);
+	rk818_bat_write(di, TS_CTRL_REG, val);
 }
 
-static int rk818_bat_get_vcalib0(struct battery_info *di)
+static int rk818_bat_get_vcalib0(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(VCALIB0_REGL) << 0;
-	val |= rk818_bat_read(VCALIB0_REGH) << 8;
+	val |= rk818_bat_read(di, VCALIB0_REGL) << 0;
+	val |= rk818_bat_read(di, VCALIB0_REGH) << 8;
 
 	return val;
 }
 
-static int rk818_bat_get_vcalib1(struct battery_info *di)
+static int rk818_bat_get_vcalib1(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(VCALIB1_REGL) << 0;
-	val |= rk818_bat_read(VCALIB1_REGH) << 8;
+	val |= rk818_bat_read(di, VCALIB1_REGL) << 0;
+	val |= rk818_bat_read(di, VCALIB1_REGH) << 8;
 
 	return val;
 }
 
-static int rk818_bat_get_coffset(struct battery_info *di)
+static int rk818_bat_get_ioffset(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(CAL_OFFSET_REGL) << 0;
-	val |= rk818_bat_read(CAL_OFFSET_REGH) << 8;
+	val |= rk818_bat_read(di, IOFFSET_REGL) << 0;
+	val |= rk818_bat_read(di, IOFFSET_REGH) << 8;
 
-	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	DBG("<%s>. ioffset: 0x%x\n", __func__, val);
 	return val;
 }
 
-static void rk818_bat_set_coffset(struct battery_info *di, int val)
+static int rk818_bat_get_coffset(struct battery_priv *di)
 {
-	u8 buf;
+	int val = 0;
 
-	buf = (val >> 0) & 0xff;
-	rk818_bat_write(CAL_OFFSET_REGL, buf);
-	buf = (val >> 8) & 0xff;
-	rk818_bat_write(CAL_OFFSET_REGH, buf);
+	val |= rk818_bat_read(di, CAL_OFFSET_REGL) << 0;
+	val |= rk818_bat_read(di, CAL_OFFSET_REGH) << 8;
 
-	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	return val;
 }
 
-static int rk818_bat_get_ioffset(struct battery_info *di)
+static void rk818_bat_set_coffset(struct battery_priv *di, int val)
 {
-	int val = 0;
+	u8 buf;
 
-	val |= rk818_bat_read(IOFFSET_REGL) << 0;
-	val |= rk818_bat_read(IOFFSET_REGH) << 8;
+	buf = (val >> 0) & 0xff;
+	rk818_bat_write(di, CAL_OFFSET_REGL, buf);
+	buf = (val >> 8) & 0xff;
+	rk818_bat_write(di, CAL_OFFSET_REGH, buf);
 
-	DBG("<%s>. ioffset: 0x%x\n", __func__, val);
-	return val;
+	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
 }
 
-static void rk818_bat_init_coffset(struct battery_info *di)
+static void rk818_bat_init_coffset(struct battery_priv *di)
 {
 	int ioffset, coffset;
 
 	ioffset = rk818_bat_get_ioffset(di);
 
-	di->poffset = rk818_bat_read(POFFSET_REG);
+	di->poffset = rk818_bat_read(di, POFFSET_REG);
 	if (!di->poffset)
 		di->poffset = DEFAULT_POFFSET;
 
@@ -320,7 +353,7 @@ static void rk818_bat_init_coffset(struct battery_info *di)
 	rk818_bat_set_coffset(di, coffset);
 }
 
-static void rk818_bat_init_voltage_kb(struct battery_info *di)
+static void rk818_bat_init_voltage_kb(struct battery_priv *di)
 {
 	int vcalib0, vcalib1;
 
@@ -331,23 +364,23 @@ static void rk818_bat_init_voltage_kb(struct battery_info *di)
 	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
 }
 
-static int rk818_bat_get_ocv_voltage(struct battery_info *di)
+static int rk818_bat_get_ocv_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk818_bat_read(BAT_OCV_REGL) << 0;
-	val |= rk818_bat_read(BAT_OCV_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_OCV_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_OCV_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 
 	return vol;
 }
 
-static int rk818_bat_get_avg_current(struct battery_info *di)
+static int rk818_bat_get_avg_current(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 
 	if (val & 0x800)
 		val -= 4096;
@@ -356,29 +389,63 @@ static int rk818_bat_get_avg_current(struct battery_info *di)
 	return val;
 }
 
-static int rk818_bat_get_avg_voltage(struct battery_info *di)
+static int rk818_bat_get_avg_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk818_bat_read(BAT_VOL_REGL) << 0;
-	val |= rk818_bat_read(BAT_VOL_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_VOL_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_VOL_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 
 	return vol;
 }
 
-static int rk818_bat_get_est_voltage(struct battery_info *di)
+static int rk818_bat_get_est_voltage(struct battery_priv *di)
 {
+	struct charge_animation_pdata *pdata = NULL;
+	struct udevice *dev;
 	int est_vol, vol, curr;
+	int plugin, timeout = 0;
+	int low_power_voltage = 0;
+
+	uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	pdata = dev_get_platdata(dev);
+	low_power_voltage = pdata->low_power_voltage;
 
 	vol = rk818_bat_get_avg_voltage(di);
 	curr = rk818_bat_get_avg_current(di);
+	plugin = rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS ? 1 : 0;
+	if (di->is_first_power_on || (!plugin && curr >= 0) || (plugin && curr <= 0)) {
+		DBG("%s: curr=%d, plugin=%d, first_on=%d\n",
+		    __func__, curr, plugin, di->is_first_power_on);
+		curr = 0;
+	}
 	est_vol = vol - (di->bat_res * curr / 1000);
 
-	return (est_vol > 2800) ? est_vol : vol;
+	while ((est_vol <= low_power_voltage) &&
+	       (vol <= low_power_voltage)) {
+		mdelay(100);
+
+		/* Update */
+		vol = rk818_bat_get_avg_voltage(di);
+		curr = rk818_bat_get_avg_current(di);
+		plugin = rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS;
+		if (di->is_first_power_on || (!plugin && curr >= 0) || (plugin && curr <= 0)) {
+			DBG("%s: while curr=%d, plugin=%d, first_on=%d\n",
+			    __func__, curr, plugin, di->is_first_power_on);
+			curr = 0;
+		}
+		est_vol = vol - (di->bat_res * curr / 1000);
+
+		timeout++;
+		if (timeout >= 5)
+			break;
+	}
+
+	return (est_vol >= low_power_voltage) ? est_vol : vol;
 }
 
-static u8 rk818_bat_finish_ma(struct battery_info *di, int fcc)
+static u8 rk818_bat_finish_ma(struct battery_priv *di, int fcc)
 {
 	u8 ma;
 
@@ -396,7 +463,7 @@ static u8 rk818_bat_finish_ma(struct battery_info *di, int fcc)
 	return ma;
 }
 
-static void rk818_bat_select_chrg_cv(struct battery_info *di)
+static void rk818_bat_select_chrg_cv(struct battery_priv *di)
 {
 	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
 
@@ -432,7 +499,7 @@ static void rk818_bat_select_chrg_cv(struct battery_info *di)
 	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
 }
 
-static void rk818_bat_init_chrg_config(struct battery_info *di)
+static void rk818_bat_init_chrg_config(struct battery_priv *di)
 {
 	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
 	u8 sup_sts, ggcon, thermal, finish_ma;
@@ -440,12 +507,12 @@ static void rk818_bat_init_chrg_config(struct battery_info *di)
 	rk818_bat_select_chrg_cv(di);
 	finish_ma = rk818_bat_finish_ma(di, di->fcc);
 
-	ggcon = rk818_bat_read(GGCON_REG);
-	sup_sts = rk818_bat_read(SUP_STS_REG);
-	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
-	thermal = rk818_bat_read(THERMAL_REG);
-	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk818_bat_read(di, GGCON_REG);
+	sup_sts = rk818_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(di, USB_CTRL_REG);
+	thermal = rk818_bat_read(di, THERMAL_REG);
+	chrg_ctrl2 = rk818_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(di, CHRG_CTRL_REG3);
 
 	/* set charge current and voltage */
 	usb_ctrl &= ~INPUT_CUR_MSK;
@@ -473,13 +540,13 @@ static void rk818_bat_init_chrg_config(struct battery_info *di)
 	/* adc current mode */
 	ggcon |= ADC_CUR_MODE;
 
-	rk818_bat_write(GGCON_REG, ggcon);
-	rk818_bat_write(SUP_STS_REG, sup_sts);
-	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
-	rk818_bat_write(THERMAL_REG, thermal);
-	rk818_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
-	rk818_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
-	rk818_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+	rk818_bat_write(di, GGCON_REG, ggcon);
+	rk818_bat_write(di, SUP_STS_REG, sup_sts);
+	rk818_bat_write(di, USB_CTRL_REG, usb_ctrl);
+	rk818_bat_write(di, THERMAL_REG, thermal);
+	rk818_bat_write(di, CHRG_CTRL_REG1, chrg_ctrl1);
+	rk818_bat_write(di, CHRG_CTRL_REG2, chrg_ctrl2);
+	rk818_bat_write(di, CHRG_CTRL_REG3, chrg_ctrl3);
 }
 
 static u32 interpolate(int value, u32 *table, int size)
@@ -529,7 +596,7 @@ static int32_t ab_div_c(u32 a, u32 b, u32 c)
 	return ans;
 }
 
-static int rk818_bat_vol_to_cap(struct battery_info *di, int voltage)
+static int rk818_bat_vol_to_cap(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_cap;
@@ -542,7 +609,7 @@ static int rk818_bat_vol_to_cap(struct battery_info *di, int voltage)
 	return ocv_cap;
 }
 
-static int rk818_bat_vol_to_soc(struct battery_info *di, int voltage)
+static int rk818_bat_vol_to_soc(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_soc;
@@ -555,40 +622,40 @@ static int rk818_bat_vol_to_soc(struct battery_info *di, int voltage)
 	return ocv_soc;
 }
 
-static int rk818_bat_get_prev_cap(struct battery_info *di)
+static int rk818_bat_get_prev_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(REMAIN_CAP_REG3) << 24;
-	val |= rk818_bat_read(REMAIN_CAP_REG2) << 16;
-	val |= rk818_bat_read(REMAIN_CAP_REG1) << 8;
-	val |= rk818_bat_read(REMAIN_CAP_REG0) << 0;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG3) << 24;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG2) << 16;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG1) << 8;
+	val |= rk818_bat_read(di, REMAIN_CAP_REG0) << 0;
 
 	return val;
 }
 
-static void rk818_bat_save_fcc(struct battery_info *di, u32 cap)
+static void rk818_bat_save_fcc(struct battery_priv *di, u32 cap)
 {
 	u8 buf;
 
 	buf = (cap >> 24) & 0xff;
-	rk818_bat_write(NEW_FCC_REG3, buf);
+	rk818_bat_write(di, NEW_FCC_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk818_bat_write(NEW_FCC_REG2, buf);
+	rk818_bat_write(di, NEW_FCC_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk818_bat_write(NEW_FCC_REG1, buf);
+	rk818_bat_write(di, NEW_FCC_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk818_bat_write(NEW_FCC_REG0, buf);
+	rk818_bat_write(di, NEW_FCC_REG0, buf);
 }
 
-static int rk818_bat_get_fcc(struct battery_info *di)
+static int rk818_bat_get_fcc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(NEW_FCC_REG3) << 24;
-	val |= rk818_bat_read(NEW_FCC_REG2) << 16;
-	val |= rk818_bat_read(NEW_FCC_REG1) << 8;
-	val |= rk818_bat_read(NEW_FCC_REG0) << 0;
+	val |= rk818_bat_read(di, NEW_FCC_REG3) << 24;
+	val |= rk818_bat_read(di, NEW_FCC_REG2) << 16;
+	val |= rk818_bat_read(di, NEW_FCC_REG1) << 8;
+	val |= rk818_bat_read(di, NEW_FCC_REG0) << 0;
 
 	if (val < MIN_FCC)
 		val = di->design_cap;
@@ -598,31 +665,53 @@ static int rk818_bat_get_fcc(struct battery_info *di)
 	return val;
 }
 
-static int rk818_bat_get_pwroff_min(struct battery_info *di)
+static int rk818_bat_get_pwroff_min(struct battery_priv *di)
 {
 	u8 cur, last;
 
-	cur = rk818_bat_read(NON_ACT_TIMER_CNT_REG);
-	last = rk818_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
-	rk818_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+	cur = rk818_bat_read(di, NON_ACT_TIMER_CNT_REG);
+	last = rk818_bat_read(di, NON_ACT_TIMER_CNT_SAVE_REG);
+	rk818_bat_write(di, NON_ACT_TIMER_CNT_SAVE_REG, cur);
 
 	return (cur != last) ? cur : 0;
 }
 
-static int rk818_bat_get_coulomb_cap(struct battery_info *di)
+static int rk818_bat_get_coulomb_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(GASCNT_REG3) << 24;
-	val |= rk818_bat_read(GASCNT_REG2) << 16;
-	val |= rk818_bat_read(GASCNT_REG1) << 8;
-	val |= rk818_bat_read(GASCNT_REG0) << 0;
+	val |= rk818_bat_read(di, GASCNT_REG3) << 24;
+	val |= rk818_bat_read(di, GASCNT_REG2) << 16;
+	val |= rk818_bat_read(di, GASCNT_REG1) << 8;
+	val |= rk818_bat_read(di, GASCNT_REG0) << 0;
 	val /= 2390;
 
 	return val * di->res_div;
 }
 
-static void rk818_bat_init_capacity(struct battery_info *di, u32 capacity)
+static void rk818_bat_save_cap(struct battery_priv *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(di, REMAIN_CAP_REG0, buf);
+}
+
+static void rk818_bat_init_capacity(struct battery_priv *di, u32 capacity)
 {
 	u8 buf;
 	u32 cap;
@@ -634,30 +723,31 @@ static void rk818_bat_init_capacity(struct battery_info *di, u32 capacity)
 
 	cap = capacity * 2390 / di->res_div;
 	buf = (cap >> 24) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG3, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG2, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG1, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk818_bat_write(GASCNT_CAL_REG0, buf);
+	rk818_bat_write(di, GASCNT_CAL_REG0, buf);
 
 	di->remain_cap = rk818_bat_get_coulomb_cap(di);
 	di->rsoc = rk818_bat_get_rsoc(di);
+	rk818_bat_save_cap(di, di->remain_cap);
 }
 
-static bool is_rk818_bat_ocv_valid(struct battery_info *di)
+static bool is_rk818_bat_ocv_valid(struct battery_priv *di)
 {
 	return di->pwroff_min >= 30 ? true : false;
 }
 
-static int rk818_bat_get_usb_state(struct battery_info *di)
+static int rk818_bat_get_usb_state(struct battery_priv *di)
 {
 	int charger_type;
 
 	switch (rk818_bat_dwc_otg_check_dpdm()) {
 	case 0:
-		if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+		if ((rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
 		else
 			charger_type = NO_CHARGER;
@@ -676,63 +766,81 @@ static int rk818_bat_get_usb_state(struct battery_info *di)
 	return charger_type;
 }
 
-static void rk818_bat_clr_initialized_state(struct battery_info *di)
+static void rk818_bat_clr_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk818_bat_read(MISC_MARK_REG);
+	val = rk818_bat_read(di, MISC_MARK_REG);
 	val &= ~FG_INIT;
-	rk818_bat_write(MISC_MARK_REG, val);
+	rk818_bat_write(di, MISC_MARK_REG, val);
 }
 
-static bool rk818_bat_is_initialized(struct battery_info *di)
+static bool rk818_bat_is_initialized(struct battery_priv *di)
 {
-	return (rk818_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+	return (rk818_bat_read(di, MISC_MARK_REG) & FG_INIT) ? true : false;
 }
 
-static void rk818_bat_set_initialized_state(struct battery_info *di)
+static void rk818_bat_set_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk818_bat_read(MISC_MARK_REG);
+	val = rk818_bat_read(di, MISC_MARK_REG);
 	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
 		val |= FG_INIT;
-		rk818_bat_write(MISC_MARK_REG, val);
-		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
+		rk818_bat_write(di, MISC_MARK_REG, val);
+		BAT_INFO("initialized... estv=%d, ch=%d\n",
 			 rk818_bat_get_est_voltage(di),
 			 rk818_bat_get_usb_state(di));
 	}
 }
 
-static void rk818_bat_first_pwron(struct battery_info *di)
+static void rk818_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
 {
-	int ocv_vol;
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk818_bat_write(di, SOC_REG, save_soc);
+	}
+}
+
+static void rk818_bat_first_pwron(struct battery_priv *di)
+{
+	int ocv_vol, vol, curr;
 
 	rk818_bat_save_fcc(di, di->design_cap);
 	ocv_vol = rk818_bat_get_ocv_voltage(di);
+	curr = rk818_bat_get_avg_current(di);
 	di->fcc = rk818_bat_get_fcc(di);
 	di->nac = rk818_bat_vol_to_cap(di, ocv_vol);
 	di->rsoc = rk818_bat_vol_to_soc(di, ocv_vol);
 	di->dsoc = di->rsoc;
+	vol = rk818_bat_get_avg_voltage(di);
+	if (ocv_vol < vol) {
+		BAT_INFO("%s: ocv voltage %d\n", __func__, ocv_vol);
+		ocv_vol = vol;
+	}
+	rk818_bat_save_dsoc(di, di->dsoc);
 	rk818_bat_init_capacity(di, di->nac);
 	rk818_bat_set_initialized_state(di);
-	BAT_INFO("first power on: soc=%d\n", di->dsoc);
+	BAT_INFO("first power on: soc=%d, Vavg=%d, Vocv=%d, c=%d, ch=%d, fcc=%d\n",
+		 di->dsoc, vol, ocv_vol, curr, rk818_bat_get_usb_state(di), di->fcc);
 }
 
-static u8 rk818_bat_get_halt_cnt(struct battery_info *di)
+static u8 rk818_bat_get_halt_cnt(struct battery_priv *di)
 {
-	return rk818_bat_read(HALT_CNT_REG);
+	return rk818_bat_read(di, HALT_CNT_REG);
 }
 
-static void rk818_bat_inc_halt_cnt(struct battery_info *di)
+static void rk818_bat_inc_halt_cnt(struct battery_priv *di)
 {
 	u8 cnt;
 
-	cnt = rk818_bat_read(HALT_CNT_REG);
-	rk818_bat_write(HALT_CNT_REG, ++cnt);
+	cnt = rk818_bat_read(di, HALT_CNT_REG);
+	rk818_bat_write(di, HALT_CNT_REG, ++cnt);
 }
 
-static bool is_rk818_bat_last_halt(struct battery_info *di)
+static bool is_rk818_bat_last_halt(struct battery_priv *di)
 {
 	int pre_cap = rk818_bat_get_prev_cap(di);
 	int now_cap = rk818_bat_get_coulomb_cap(di);
@@ -746,14 +854,16 @@ static bool is_rk818_bat_last_halt(struct battery_info *di)
 	}
 }
 
-static void rk818_bat_not_first_pwron(struct battery_info *di)
+static void rk818_bat_not_first_pwron(struct battery_priv *di)
 {
-	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
+	int pre_soc, pre_cap, ocv_cap = 0, ocv_soc = 0, ocv_vol, now_cap;
+	int voltage;
 
 	di->fcc = rk818_bat_get_fcc(di);
 	pre_soc = rk818_bat_get_dsoc(di);
 	pre_cap = rk818_bat_get_prev_cap(di);
 	now_cap = rk818_bat_get_coulomb_cap(di);
+	voltage = rk818_bat_get_est_voltage(di);
 	di->pwr_dsoc = pre_soc;
 	di->pwr_rsoc = (now_cap + di->fcc / 200) * 100 / DIV(di->fcc);
 	di->is_halt = is_rk818_bat_last_halt(di);
@@ -783,44 +893,52 @@ static void rk818_bat_not_first_pwron(struct battery_info *di)
 			di->is_max_soc_offset = true;
 		}
 		BAT_INFO("OCV calib: cap=%d, rsoc=%d\n", ocv_cap, ocv_soc);
+	} else if ((pre_soc == 0) && (voltage >= ZERO_MIN_VOLTAGE)) {
+		if (now_cap < 0)
+			now_cap = 0;
+		rk818_bat_init_capacity(di, now_cap);
+		pre_cap = di->remain_cap;
+		pre_soc = di->rsoc;
+		BAT_INFO("zero calib: voltage=%d\n", voltage);
 	}
 finish:
 	di->dsoc = pre_soc;
 	di->nac = pre_cap;
 	rk818_bat_init_capacity(di, di->nac);
+	rk818_bat_save_dsoc(di, di->dsoc);
 	rk818_bat_set_initialized_state(di);
-	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d Ver=%s\n",
+	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d fcc=%d, Ver=%s\n",
 		 di->dsoc, di->rsoc, di->remain_cap, di->pwroff_min,
 		 rk818_bat_get_avg_voltage(di), rk818_bat_get_ocv_voltage(di),
 		 rk818_bat_get_avg_current(di), rk818_bat_get_dsoc(di),
-		 rk818_bat_get_usb_state(di), DRIVER_VERSION
+		 rk818_bat_get_usb_state(di), di->fcc, DRIVER_VERSION
 		 );
 }
 
-static bool is_rk818_bat_first_poweron(struct battery_info *di)
+static bool is_rk818_bat_first_poweron(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk818_bat_read(GGSTS_REG);
+	buf = rk818_bat_read(di, GGSTS_REG);
 	if (buf & BAT_CON) {
 		buf &= ~BAT_CON;
-		rk818_bat_write(GGSTS_REG, buf);
+		rk818_bat_write(di, GGSTS_REG, buf);
 		return true;
 	}
 
 	return false;
 }
 
-static bool rk818_bat_ocv_sw_reset(struct battery_info *di)
+static bool rk818_bat_ocv_sw_reset(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk818_bat_read(MISC_MARK_REG);
+	buf = rk818_bat_read(di, MISC_MARK_REG);
 	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
 	    (buf & FG_RESET_NOW)) {
 		buf &= ~FG_RESET_LATE;
 		buf &= ~FG_RESET_NOW;
-		rk818_bat_write(MISC_MARK_REG, buf);
+		rk818_bat_write(di, MISC_MARK_REG, buf);
 		BAT_INFO("manual reset fuel gauge\n");
 		return true;
 	} else {
@@ -828,10 +946,42 @@ static bool rk818_bat_ocv_sw_reset(struct battery_info *di)
 	}
 }
 
-void rk818_bat_init_rsoc(struct battery_info *di)
+static void rk818_bat_init_rsoc(struct battery_priv *di)
 {
-	di->pwroff_min = rk818_bat_get_pwroff_min(di);
+	int charger, voltage, initialize = 0;
+	struct charge_animation_pdata *pdata;
+	struct udevice *dev;
+
+	uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	pdata = dev_get_platdata(dev);
+
+	charger = rk818_bat_get_usb_state(di);
+	voltage = rk818_bat_get_est_voltage(di);
 	di->is_first_power_on = is_rk818_bat_first_poweron(di);
+
+	/*
+	 * Do rsoc initialization only when:
+	 *
+	 * 1. first power on;
+	 * 2. charger online + voltage lower than low_power_voltage;
+	 * 3. charger online + uboot_charge enabled.
+	 * 4. dsoc is 0 but voltage high, obvious wrong.
+	 */
+	if (di->is_first_power_on) {
+		initialize = 1;
+	} else if ((di->dsoc == 0) && (voltage >= ZERO_MIN_VOLTAGE)) {
+		initialize = 1;
+	} else if (charger != NO_CHARGER) {
+		if (voltage < pdata->low_power_voltage + 50)
+			initialize = 1;
+		else if (pdata->uboot_charge)
+			initialize = 1;
+	}
+
+	if (!initialize)
+		return;
+
+	di->pwroff_min = rk818_bat_get_pwroff_min(di);
 	di->is_sw_reset = rk818_bat_ocv_sw_reset(di);
 
 	if (di->is_first_power_on || di->is_sw_reset)
@@ -840,7 +990,7 @@ void rk818_bat_init_rsoc(struct battery_info *di)
 		rk818_bat_not_first_pwron(di);
 }
 
-static int rk818_bat_calc_linek(struct battery_info *di)
+static int rk818_bat_calc_linek(struct battery_priv *di)
 {
 	int linek, diff, delta;
 
@@ -869,7 +1019,44 @@ static int rk818_bat_calc_linek(struct battery_info *di)
 	return linek;
 }
 
-static void rk818_bat_init_ts2(struct battery_info *di)
+static void rk818_bat_init_ts1(struct battery_priv *di)
+{
+	u8 buf;
+	u32 *ntc_table = di->ntc_table;
+
+	if (!di->ntc_size)
+		return;
+
+	/* select uA */
+	buf = rk818_bat_read(di, TS_CTRL_REG);
+	buf &= ~ADC_CUR_MSK;
+	/* chose suitable UA for temperature detect */
+	if (ntc_table[0] < NTC_80UA_MAX_MEASURE) {
+		di->ntc_factor = NTC_CALC_FACTOR_80UA;
+		di->ntc_uA = 80;
+		buf |= ADC_CUR_80UA;
+	} else if (ntc_table[0] < NTC_60UA_MAX_MEASURE) {
+		di->ntc_factor = NTC_CALC_FACTOR_60UA;
+		di->ntc_uA = 60;
+		buf |= ADC_CUR_60UA;
+	} else if (ntc_table[0] < NTC_40UA_MAX_MEASURE) {
+		di->ntc_factor = NTC_CALC_FACTOR_40UA;
+		di->ntc_uA = 40;
+		buf |= ADC_CUR_40UA;
+	} else {
+		di->ntc_factor = NTC_CALC_FACTOR_20UA;
+		di->ntc_uA = 20;
+		buf |= ADC_CUR_20UA;
+	}
+	rk818_bat_write(di, TS_CTRL_REG, buf);
+
+	/* ADC_TS1_EN */
+	buf = rk818_bat_read(di, ADC_CTRL_REG);
+	buf |= ADC_TS1_EN;
+	rk818_bat_write(di, ADC_CTRL_REG, buf);
+}
+
+static void rk818_bat_init_ts2(struct battery_priv *di)
 {
 	u8 buf;
 
@@ -877,37 +1064,32 @@ static void rk818_bat_init_ts2(struct battery_info *di)
 		return;
 
 	/* TS2 adc mode */
-	buf = rk818_bat_read(TS_CTRL_REG);
+	buf = rk818_bat_read(di, TS_CTRL_REG);
 	buf |= TS2_ADC_MODE;
-	rk818_bat_write(TS_CTRL_REG, buf);
+	rk818_bat_write(di, TS_CTRL_REG, buf);
 
 	/* TS2 adc enable */
-	buf = rk818_bat_read(ADC_CTRL_REG);
+	buf = rk818_bat_read(di, ADC_CTRL_REG);
 	buf |= ADC_TS2_EN;
-	rk818_bat_write(ADC_CTRL_REG, buf);
+	rk818_bat_write(di, ADC_CTRL_REG, buf);
 }
 
-static int rk818_fg_init(struct battery_info *di)
+static int rk818_fg_init(struct battery_priv *di)
 {
+	int cap;
+
 	rk818_bat_enable_gauge(di);
 	rk818_bat_init_voltage_kb(di);
 	rk818_bat_init_coffset(di);
+	rk818_bat_init_ts1(di);
 	rk818_bat_init_ts2(di);
 	rk818_bat_clr_initialized_state(di);
+	cap = rk818_bat_get_coulomb_cap(di);
 	di->dsoc = rk818_bat_get_dsoc(di);
+	di->rsoc = (cap + di->fcc / 200) * 100 / DIV(di->fcc);
 
-	/*
-	 * it's better to init fg in kernel,
-	 * so avoid init in uboot as far as possible
-	 */
-	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
-		if (rk818_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
-			rk818_bat_init_rsoc(di);
-#ifdef CONFIG_UBOOT_CHARGE
-		else
-			rk818_bat_init_rsoc(di);
-#endif
-	}
+	/* dsoc and rsoc maybe initialized here */
+	rk818_bat_init_rsoc(di);
 
 	rk818_bat_init_chrg_config(di);
 	di->voltage_avg = rk818_bat_get_avg_voltage(di);
@@ -918,30 +1100,34 @@ static int rk818_fg_init(struct battery_info *di)
 	di->term_sig_base = get_timer(0);
 	di->pwr_vol = di->voltage_avg;
 
+	DBG("%s: dsoc=%d, rsoc=%d, v=%d, ov=%d, c=%d, estv=%d\n",
+	    __func__, di->dsoc, di->rsoc, di->voltage_avg, di->voltage_ocv,
+	    di->current_avg, rk818_bat_get_est_voltage(di));
+
 	return 0;
 }
 
-static bool is_rk818_bat_exist(struct  battery_info *di)
+static bool is_rk818_bat_exist(struct  battery_priv *di)
 {
-	return (rk818_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+	return (rk818_bat_read(di, SUP_STS_REG) & BAT_EXS) ? true : false;
 }
 
-static void rk818_bat_set_current(int input_current)
+static void rk818_bat_set_current(struct battery_priv *di, int input_current)
 {
 	u8 usb_ctrl;
 
-	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	usb_ctrl = rk818_bat_read(di, USB_CTRL_REG);
 	usb_ctrl &= ~INPUT_CUR_MSK;
 	usb_ctrl |= (input_current);
-	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk818_bat_write(di, USB_CTRL_REG, usb_ctrl);
 }
 
-static int rk818_bat_get_ts2_voltage(struct battery_info *di)
+static int rk818_bat_get_ts2_voltage(struct battery_priv *di)
 {
 	u32 val = 0;
 
-	val |= rk818_bat_read(RK818_TS2_ADC_REGL) << 0;
-	val |= rk818_bat_read(RK818_TS2_ADC_REGH) << 8;
+	val |= rk818_bat_read(di, RK818_TS2_ADC_REGL) << 0;
+	val |= rk818_bat_read(di, RK818_TS2_ADC_REGH) << 8;
 
 	/* refer voltage 2.2V, 12bit adc accuracy */
 	val = val * 2200 * di->ts2_vol_multi / 4095;
@@ -950,11 +1136,11 @@ static int rk818_bat_get_ts2_voltage(struct battery_info *di)
 	return val;
 }
 
-static void rk818_bat_ts2_update_current(struct battery_info *di)
+static void rk818_bat_ts2_update_current(struct battery_priv *di)
 {
 	int ts2_vol, input_current, invalid_cnt = 0, confirm_cnt = 0;
 
-	rk818_bat_set_current(ILIM_450MA);
+	rk818_bat_set_current(di, ILIM_450MA);
 	input_current = ILIM_850MA;
 	while (input_current < di->chrg_cur_input) {
 		mdelay(100);
@@ -970,7 +1156,7 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 
 			/* if fail, set max input current as default */
 			input_current = di->chrg_cur_input;
-			rk818_bat_set_current(input_current);
+			rk818_bat_set_current(di, input_current);
 			break;
 		}
 
@@ -978,7 +1164,7 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 		if (ts2_vol >= TS2_THRESHOLD_VOL) {
 			/* update input current */
 			input_current++;
-			rk818_bat_set_current(input_current);
+			rk818_bat_set_current(di, input_current);
 			DBG("********* input=%d\n",
 			    CHRG_CUR_INPUT[input_current & 0x0f]);
 		} else {
@@ -995,7 +1181,7 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 			if (input_current == ILIM_80MA ||
 			    input_current < 0)
 				input_current = ILIM_450MA;
-			rk818_bat_set_current(input_current);
+			rk818_bat_set_current(di, input_current);
 			break;
 		}
 	}
@@ -1004,31 +1190,34 @@ static void rk818_bat_ts2_update_current(struct battery_info *di)
 		 CHRG_CUR_INPUT[input_current]);
 }
 
-static void rk818_bat_charger_setting(struct battery_info *di, int charger)
+static void rk818_bat_charger_setting(struct battery_priv *di, int charger)
 {
 	static u8 old_charger = UNDEF_CHARGER;
+	struct charge_animation_pdata *pdata;
+	struct udevice *dev;
+	int low_power_voltage = 0;
+
+	uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	pdata = dev_get_platdata(dev);
+	low_power_voltage = pdata->low_power_voltage;
 
 	/* charger changed */
 	if (old_charger != charger) {
 		if (charger == NO_CHARGER) {
 			BAT_INFO("NO_CHARGER\n");
-			rk818_bat_set_current(ILIM_450MA);
+			rk818_bat_set_current(di, ILIM_450MA);
 		} else if (charger == USB_CHARGER) {
 			BAT_INFO("USB_CHARGER\n");
-			rk818_bat_set_current(ILIM_450MA);
+			rk818_bat_set_current(di, ILIM_450MA);
 		} else if (charger == DC_CHARGER || charger == AC_CHARGER) {
-#ifdef CONFIG_UBOOT_CHARGE
-			if (di->ts2_vol_multi) {
-#else
-			if ((rk818_bat_get_est_voltage(di) <
-			     CONFIG_SCREEN_ON_VOL_THRESD) &&
-			    (di->ts2_vol_multi)) {
-#endif
+			if (pdata->uboot_charge && di->ts2_vol_multi) {
+				rk818_bat_ts2_update_current(di);
+			} else if ((rk818_bat_get_est_voltage(di) < low_power_voltage) &&
+				   (di->ts2_vol_multi)) {
 				rk818_bat_ts2_update_current(di);
 			} else {
-				rk818_bat_set_current(di->chrg_cur_input);
-				BAT_INFO("DC_CHARGER charge_cur_input=%d\n",
-					 CHRG_CUR_INPUT[di->chrg_cur_input]);
+				rk818_bat_set_current(di, di->chrg_cur_input);
+				BAT_INFO("DC_CHARGER\n");
 			}
 		} else {
 			BAT_INFO("charger setting error %d\n", charger);
@@ -1038,7 +1227,7 @@ static void rk818_bat_charger_setting(struct battery_info *di, int charger)
 	}
 }
 
-static int rk818_bat_get_dc_state(struct battery_info *di)
+static int rk818_bat_get_dc_state(struct battery_priv *di)
 {
 	if (!di->dc_is_valid)
 		return NO_CHARGER;
@@ -1046,12 +1235,12 @@ static int rk818_bat_get_dc_state(struct battery_info *di)
 	return dm_gpio_get_value(di->dc_det) ? DC_CHARGER : NO_CHARGER;
 }
 
-static int rk818_bat_get_charger_type(struct battery_info *di)
+static int rk818_bat_get_charger_type(struct battery_priv *di)
 {
 	int charger_type = NO_CHARGER;
 
 	/* check by ic hardware: this check make check work safer */
-	if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+	if ((rk818_bat_read(di, VB_MON_REG) & PLUG_IN_STS) == 0)
 		return NO_CHARGER;
 
 	/* virtual or bat not exist */
@@ -1067,43 +1256,11 @@ static int rk818_bat_get_charger_type(struct battery_info *di)
 	return rk818_bat_get_usb_state(di);
 }
 
-static void rk818_bat_save_dsoc(struct battery_info *di, u8 save_soc)
-{
-	static int old_soc = -1;
-
-	if (old_soc != save_soc) {
-		old_soc = save_soc;
-		rk818_bat_write(SOC_REG, save_soc);
-	}
-}
-
-static void rk818_bat_save_cap(struct battery_info *di, int cap)
-{
-	u8 buf;
-	static int old_cap;
-
-	if (old_cap == cap)
-		return;
-
-	if (cap >= di->qmax)
-		cap = di->qmax;
-
-	old_cap = cap;
-	buf = (cap >> 24) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG3, buf);
-	buf = (cap >> 16) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG2, buf);
-	buf = (cap >> 8) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG1, buf);
-	buf = (cap >> 0) & 0xff;
-	rk818_bat_write(REMAIN_CAP_REG0, buf);
-}
-
-static u8 rk818_bat_get_chrg_status(struct battery_info *di)
+static u8 rk818_bat_get_chrg_status(struct battery_priv *di)
 {
 	u8 status;
 
-	status = rk818_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	status = rk818_bat_read(di, SUP_STS_REG) & BAT_STATUS_MSK;
 	switch (status) {
 	case CHARGE_OFF:
 		DBG("CHARGE-OFF...\n");
@@ -1142,7 +1299,7 @@ static u8 rk818_bat_get_chrg_status(struct battery_info *di)
 	return status;
 }
 
-static void rk818_bat_finish_chrg(struct battery_info *di)
+static void rk818_bat_finish_chrg(struct battery_priv *di)
 {
 	u32 tgt_sec = 0;
 
@@ -1157,7 +1314,7 @@ static void rk818_bat_finish_chrg(struct battery_info *di)
 	    get_timer(di->finish_chrg_base));
 }
 
-static void rk818_bat_debug_info(struct battery_info *di)
+static void rk818_bat_debug_info(struct battery_priv *di)
 {
 	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
 	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
@@ -1165,17 +1322,17 @@ static void rk818_bat_debug_info(struct battery_info *di)
 
 	if (!dbg_enable)
 		return;
-	ggcon = rk818_bat_read(GGCON_REG);
-	ggsts = rk818_bat_read(GGSTS_REG);
-	sup_sts = rk818_bat_read(SUP_STS_REG);
-	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
-	thermal = rk818_bat_read(THERMAL_REG);
-	vb_mod = rk818_bat_read(VB_MON_REG);
-	misc = rk818_bat_read(MISC_MARK_REG);
-	rtc = rk818_bat_read(SECONDS_REG);
-	chrg_ctrl1 = rk818_bat_read(CHRG_CTRL_REG1);
-	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk818_bat_read(di, GGCON_REG);
+	ggsts = rk818_bat_read(di, GGSTS_REG);
+	sup_sts = rk818_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(di, USB_CTRL_REG);
+	thermal = rk818_bat_read(di, THERMAL_REG);
+	vb_mod = rk818_bat_read(di, VB_MON_REG);
+	misc = rk818_bat_read(di, MISC_MARK_REG);
+	rtc = rk818_bat_read(di, SECONDS_REG);
+	chrg_ctrl1 = rk818_bat_read(di, CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk818_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(di, CHRG_CTRL_REG3);
 
 	DBG("\n---------------------- DEBUG REGS ------------------------\n"
 	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
@@ -1189,7 +1346,7 @@ static void rk818_bat_debug_info(struct battery_info *di)
 	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d\n"
 	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d\n"
 	    "off: i=0x%x, c=0x%x, max=%d, ocv_c=%d, halt: st=%d, cnt=%d\n"
-	    "pwr: dsoc=%d, rsoc=%d, vol=%d, Res=%d, exist=%d\n",
+	    "pwr: dsoc=%d, rsoc=%d, vol=%d, Res=%d, mode=%s, T=%d'C\n",
 	    di->dsoc, rk818_bat_get_rsoc(di), rk818_bat_get_avg_voltage(di),
 	    rk818_bat_get_avg_current(di), di->remain_cap, di->fcc,
 	    di->rsoc - di->dsoc,
@@ -1201,13 +1358,15 @@ static void rk818_bat_debug_info(struct battery_info *di)
 	    rk818_bat_get_ocv_voltage(di), rk818_bat_get_ioffset(di),
 	    rk818_bat_get_coffset(di), di->is_max_soc_offset,
 	    di->is_ocv_calib, di->is_halt, di->halt_cnt, di->pwr_dsoc,
-	    di->pwr_rsoc, di->pwr_vol, di->sample_res, is_rk818_bat_exist(di)
+	    di->pwr_rsoc, di->pwr_vol, di->sample_res,
+	    di->virtual_power ? "VIRTUAL" : "BAT",
+	    di->temperature
 	    );
 	rk818_bat_get_chrg_status(di);
 	DBG("###########################################################\n");
 }
 
-static void rk818_bat_linek_algorithm(struct battery_info *di)
+static void rk818_bat_linek_algorithm(struct battery_priv *di)
 {
 	int delta_cap, ydsoc, tmp;
 	u8 chg_st = rk818_bat_get_chrg_status(di);
@@ -1245,31 +1404,31 @@ static void rk818_bat_linek_algorithm(struct battery_info *di)
 	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
 }
 
-static void rk818_bat_set_term_mode(struct battery_info *di, int mode)
+static void rk818_bat_set_term_mode(struct battery_priv *di, int mode)
 {
 	u8 buf;
 
-	buf = rk818_bat_read(CHRG_CTRL_REG3);
+	buf = rk818_bat_read(di, CHRG_CTRL_REG3);
 	buf &= ~CHRG_TERM_SIG_MSK;
 	buf |= mode;
-	rk818_bat_write(CHRG_CTRL_REG3, buf);
+	rk818_bat_write(di, CHRG_CTRL_REG3, buf);
 
 	DBG("set charge to %s term mode\n", mode ? "digital" : "analog");
 }
 
-static int rk818_bat_get_iadc(struct battery_info *di)
+static int rk818_bat_get_iadc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 	if (val > 2047)
 		val -= 4096;
 
 	return val;
 }
 
-static bool rk818_bat_adc_calib(struct battery_info *di)
+static bool rk818_bat_adc_calib(struct battery_priv *di)
 {
 	int i, ioffset, coffset, adc;
 
@@ -1286,7 +1445,7 @@ static bool rk818_bat_adc_calib(struct battery_info *di)
 			coffset = rk818_bat_get_coffset(di);
 			ioffset = rk818_bat_get_ioffset(di);
 			di->poffset = coffset - ioffset;
-			rk818_bat_write(POFFSET_REG, di->poffset);
+			rk818_bat_write(di, POFFSET_REG, di->poffset);
 			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
 				 coffset, ioffset, di->poffset);
 			return true;
@@ -1300,12 +1459,13 @@ static bool rk818_bat_adc_calib(struct battery_info *di)
 	return false;
 }
 
-static void rk818_bat_smooth_charge(struct battery_info *di)
+static void rk818_bat_smooth_charge(struct battery_priv *di)
 {
 	u8 chg_st = rk818_bat_get_chrg_status(di);
 
 	/* set terminal charge mode */
 	if (di->term_sig_base && get_timer(di->term_sig_base) > SECONDS(1)) {
+		DBG("%s: terminal signal finish mode\n", __func__);
 		rk818_bat_set_term_mode(di, CHRG_TERM_DIG_SIGNAL);
 		di->term_sig_base = 0;
 	}
@@ -1324,17 +1484,18 @@ static void rk818_bat_smooth_charge(struct battery_info *di)
 	if (di->remain_cap > di->fcc) {
 		di->sm_old_cap -= (di->remain_cap - di->fcc);
 		rk818_bat_init_capacity(di, di->fcc);
+		DBG("%s: init capacity: %d\n", __func__, di->fcc);
 	}
 
 	/* finish charge step */
 	if (chg_st == CHARGE_FINISH) {
-		DBG("finish charge step...\n");
+		DBG("%s: finish charge step...\n", __func__);
 		if (di->adc_allow_update)
 			di->adc_allow_update = !rk818_bat_adc_calib(di);
 		rk818_bat_finish_chrg(di);
 		rk818_bat_init_capacity(di, di->fcc);
 	} else {
-		DBG("smooth charge step...\n");
+		DBG("%s: smooth charge step...\n", __func__);
 		di->adc_allow_update = true;
 		di->finish_chrg_base = get_timer(0);
 		rk818_bat_linek_algorithm(di);
@@ -1346,16 +1507,169 @@ static void rk818_bat_smooth_charge(struct battery_info *di)
 	else if (di->dsoc < 0)
 		di->dsoc = 0;
 
+	DBG("%s: save dsoc=%d and rsoc=%d\n",
+	    __func__, di->dsoc, rk818_bat_get_rsoc(di));
+
 	rk818_bat_save_dsoc(di, di->dsoc);
 	rk818_bat_save_cap(di, di->remain_cap);
 out:
 	rk818_bat_debug_info(di);
 }
 
-static int rk818_bat_update_get_soc(struct udevice *dev)
+/*
+ * Due to hardware design issue, Vdelta = "(R_sample + R_other) * I_avg" will be
+ * included into TS1 adc value. We must subtract it to get correct adc value.
+ * The solution:
+ *
+ * (1) calculate Vdelta:
+ *
+ *   adc1 - Vdelta    ua1			  (adc2 * ua1) - (adc1 * ua2)
+ *   ------------- = -----  ==> equals: Vdelta = -----------------------------
+ *   adc2 - Vdelta    ua2				ua1 - ua2
+ *
+ *
+ * (2) calculate correct ADC value:
+ *
+ *     charging: ADC = adc1 - abs(Vdelta);
+ *  discharging: ADC = adc1 + abs(Vdelta);
+ */
+static int rk818_bat_get_ntc_res(struct battery_priv *di)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	static int adc1 = 0, adc2 = 0, ua1 = 0, ua2 = 0;
+	static int adc1_update = 0, first_in = 1;
 	static ulong seconds;
+	int v_delta, val, res;
+	u8 buf;
+
+	/* hold adc1 and wait 1s for adc2 updated */
+	if (!adc1_update) {
+		/* update flag and init adc1,adc2 !! */
+		adc1_update = 1;
+		seconds = get_timer(0);
+		adc1 = 0;
+		adc2 = 0;
+
+		/* read sample ua1 */
+		buf = rk818_bat_read(di, TS_CTRL_REG);
+		DBG("<%s>. read adc1, sample uA=%d\n",
+		    __func__, ((buf & 0x03) + 1) * 20);
+
+		/* read adc adc1 */
+		ua1 = di->ntc_uA;
+		adc1 |= rk818_bat_read(di, TS_ADC_REGL) << 0;
+		adc1 |= rk818_bat_read(di, TS_ADC_REGH) << 8;
+
+		/* chose reference UA for adc2 */
+		ua2 = (ua1 != 20) ? 20 : 40;
+		buf = rk818_bat_read(di, TS_CTRL_REG);
+		buf &= ~ADC_CUR_MSK;
+		buf |= ((ua2 - 20) / 20);
+		rk818_bat_write(di, TS_CTRL_REG, buf);
+	}
+
+	/* wait 1s for adc2 updated */
+	if (get_timer(seconds) < SECONDS(1)) {
+		if (first_in)
+			first_in = 0;
+		else
+			return TS1_NOT_READY;
+	}
+
+	/* update flags ! */
+	adc1_update = 0;
+
+	/* read sample ua2 */
+	buf = rk818_bat_read(di, TS_CTRL_REG);
+	DBG("<%s>. read adc2, sample uA=%d\n",
+	    __func__, ((buf & 0x03) + 1) * 20);
+
+	/* read adc adc2 */
+	adc2 |= rk818_bat_read(di, TS_ADC_REGL) << 0;
+	adc2 |= rk818_bat_read(di, TS_ADC_REGH) << 8;
+
+	DBG("<%s>. ua1=%d, ua2=%d, adc1=%d, adc2=%d\n",
+	    __func__, ua1, ua2, adc1, adc2);
+
+	/* calculate delta voltage */
+	if (adc2 != adc1)
+		v_delta = abs((adc2 * ua1 - adc1 * ua2) / (ua2 - ua1));
+	else
+		v_delta = 0;
+
+	/* considering current avg direction, calcuate real adc value */
+	val = (di->current_avg >= 0) ? (adc1 - v_delta) : (adc1 + v_delta);
+
+	DBG("<%s>. Iavg=%d, Vdelta=%d, Vadc=%d\n",
+	    __func__, di->current_avg, v_delta, val);
+
+	res = val * di->ntc_factor;
+
+	DBG("<%s>. val=%d, ntc_res=%d, ntc_factor=%d\n",
+	    __func__, val, res, di->ntc_factor);
+
+	DBG("<%s>. t=[%d'C(%d) ~ %dC(%d)]\n", __func__,
+	    di->ntc_degree_from, di->ntc_table[0],
+	    di->ntc_degree_from + di->ntc_size - 1,
+	    di->ntc_table[di->ntc_size - 1]);
+
+	rk818_bat_init_ts1(di);
+
+	return res;
+}
+
+static int rk818_bat_update_temperature(struct battery_priv *di)
+{
+	static int first_time = 1, old_temperature = 25;
+	u32 ntc_size, *ntc_table;
+	int i, res, temp;
+
+	ntc_table = di->ntc_table;
+	ntc_size = di->ntc_size;
+
+	if (ntc_size) {
+		res = rk818_bat_get_ntc_res(di);
+		if (res == TS1_NOT_READY) {
+			di->temperature = old_temperature;
+			return TS1_NOT_READY;
+		}
+
+		if (res < ntc_table[ntc_size - 1]) {
+			di->temperature = di->ntc_degree_from;
+			old_temperature = di->ntc_degree_from;
+			printf("bat ntc upper max degree: R=%d\n", res);
+		} else if (res > ntc_table[0]) {
+			di->temperature = di->ntc_degree_from + di->ntc_size - 1;
+			old_temperature = di->ntc_degree_from + di->ntc_size - 1;
+			printf("bat ntc lower min degree: R=%d\n", res);
+		} else {
+			for (i = 0; i < ntc_size; i++) {
+				if (res >= ntc_table[i])
+					break;
+			}
+
+			/* if first in, init old_temperature */
+			temp = (i + di->ntc_degree_from);
+			if (first_time) {
+				di->temperature = temp;
+				old_temperature = temp;
+				first_time = 0;
+			}
+
+			old_temperature = temp;
+			di->temperature = temp;
+		}
+	}
+
+	DBG("temperature=%d\n", di->temperature);
+
+	return 0;
+}
+
+static int rk818_bat_update_get_soc(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+	static ulong seconds, ts1_seconds;
+	int wait;
 
 	/* set charge current */
 	di->chrg_type =
@@ -1363,9 +1677,21 @@ static int rk818_bat_update_get_soc(struct udevice *dev)
 	rk818_bat_charger_setting(di, di->chrg_type);
 
 	/* fg calc every 5 seconds */
-	if (!seconds)
+	if (!seconds || !ts1_seconds) {
 		seconds = get_timer(0);
+		ts1_seconds = get_timer(0);
+	}
+
+	/* temperature calc every 5 seconds */
+	if (get_timer(ts1_seconds) >= SECONDS(5)) {
+		DBG("%s: update temperature\n", __func__);
+		wait = rk818_bat_update_temperature(di);
+		if (!wait)
+			ts1_seconds = get_timer(0);
+	}
+
 	if (get_timer(seconds) >= SECONDS(5)) {
+		DBG("%s: smooth charge\n", __func__);
 		seconds = get_timer(0);
 		rk818_bat_smooth_charge(di);
 	}
@@ -1377,9 +1703,19 @@ static int rk818_bat_update_get_soc(struct udevice *dev)
 		return VIRTUAL_POWER_SOC;
 }
 
+static int rk818_bat_update_get_current(struct udevice *dev)
+{
+	struct battery_priv *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk818_bat_get_avg_current(di);
+	else
+		return VIRTUAL_POWER_CUR;
+}
+
 static int rk818_bat_update_get_voltage(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	if (!di->virtual_power && di->voltage_k)
 		return rk818_bat_get_est_voltage(di);
@@ -1389,39 +1725,36 @@ static int rk818_bat_update_get_voltage(struct udevice *dev)
 
 static bool rk818_bat_update_get_chrg_online(struct udevice *dev)
 {
-	return rk818_bat_dwc_otg_check_dpdm();
+	struct battery_priv *di = dev_get_priv(dev);
+
+	return rk818_bat_get_charger_type(di);
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {
 	.get_soc = rk818_bat_update_get_soc,
 	.get_voltage = rk818_bat_update_get_voltage,
+	.get_current = rk818_bat_update_get_current,
 	.get_chrg_online = rk818_bat_update_get_chrg_online,
 };
 
-static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
+static int rk818_fg_ofdata_to_platdata(struct udevice *dev)
 {
-	int node, parent, len, err;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
+	u32 sign, degree_from[2];
 	const char *prop;
+	int len, ret;
 
-	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk818");
-	if (parent < 0) {
-		printf("can't find rockchip,rk818 node\n");
-		return -ENODEV;
-	}
-
-	if (!fdtdec_get_is_enabled(blob, parent)) {
-		DBG("rk818 node disabled\n");
-		return -ENODEV;
-	}
-
-	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
-	if (node < 0) {
-		printf("can't find battery node\n");
-		di->chrg_cur_input = ILIM_2000MA;
+	if (rk8xx->variant != 0x8180) {
+		debug("%s: Not support pmic variant: rk%x\n",
+		      __func__, rk8xx->variant);
 		return -EINVAL;
+	} else {
+		di->dev = dev;
 	}
 
-	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	/* Parse ocv table */
+	prop = dev_read_prop(dev, "ocv_table", &len);
 	if (!prop) {
 		printf("can't find ocv_table prop\n");
 		return -EINVAL;
@@ -1434,43 +1767,95 @@ static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
 	}
 
 	di->ocv_size = len / 4;
-	err = fdtdec_get_int_array(blob, node, "ocv_table",
-				   di->ocv_table, di->ocv_size);
-	if (err < 0) {
-		printf("read ocv_table error\n");
+	if (dev_read_u32_array(dev, "ocv_table",
+			       di->ocv_table, di->ocv_size)) {
+		printf("can't read ocv_table\n");
 		free(di->ocv_table);
 		return -EINVAL;
 	}
 
-	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	/* Parse neccessay */
+	di->design_cap = dev_read_u32_default(dev, "design_capacity", -1);
 	if (di->design_cap < 0) {
-		printf("read design_capacity error\n");
+		printf("can't read design_capacity\n");
 		return -EINVAL;
 	}
 
-	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	di->qmax = dev_read_u32_default(dev, "design_qmax", -1);
 	if (di->qmax < 0) {
-		printf("read design_qmax error\n");
+		printf("can't read design_qmax\n");
 		return -EINVAL;
 	}
 
-	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
-	di->dts_cur_input = fdtdec_get_int(blob, node,
-					   "max_input_current", 2000);
-	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
-	di->sample_res = fdtdec_get_int(blob, node, "sample_res",
-					SAMPLE_RES_20mR);
+	/* Parse un-neccessay */
+	di->dts_vol_sel = dev_read_u32_default(dev, "max_chrg_voltage", 4200);
+	if (di->dts_vol_sel < 0)
+		di->dts_vol_sel = dev_read_u32_default(dev,
+						"max_charge_voltagemV", 4200);
+
+	di->dts_cur_input = dev_read_u32_default(dev, "max_input_current", 2000);
+	if (di->dts_cur_input < 0)
+		di->dts_cur_input = dev_read_u32_default(dev,
+						"max_input_currentmA", 2000);
+
+	di->dts_cur_sel = dev_read_u32_default(dev, "max_chrg_current", 1200);
+	if (di->dts_cur_sel < 0)
+		di->dts_cur_sel = dev_read_u32_default(dev,
+						"max_chrg_currentmA", 1400);
+
+	di->max_soc_offset = dev_read_u32_default(dev, "max_soc_offset", 70);
+	di->virtual_power = dev_read_u32_default(dev, "virtual_power", 0);
+	di->bat_res = dev_read_u32_default(dev, "bat_res", 135);
+	di->sample_res = dev_read_u32_default(dev, "sample_res", SAMPLE_RES_20mR);
+	di->ts2_vol_multi = dev_read_u32_default(dev, "ts2_vol_multi", 0);
+
 	di->res_div = (di->sample_res == SAMPLE_RES_20mR) ?
-		       SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
-	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
-	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
-	di->ts2_vol_multi = fdtdec_get_int(blob, node, "ts2_vol_multi", 0);
-	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
-	if (!gpio_request_by_name_nodev(offset_to_ofnode(node), "dc_det_gpio",
-					0, di->dc_det, GPIOD_IS_IN)) {
-		di->dc_is_valid = true;
+				SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
+
+	ret = gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
+					 0, di->dc_det, GPIOD_IS_IN);
+	if (!ret) {
+		di->dc_is_valid = 1;
+		debug("DC is valid\n");
+	} else {
+		debug("DC is invalid, ret=%d\n", ret);
 	}
 
+	prop = dev_read_prop(dev, "ntc_table", &len);
+	if (!prop) {
+		di->ntc_size = 0;
+	} else {
+		ret = dev_read_u32_array(dev, "ntc_degree_from",
+					 degree_from, ARRAY_SIZE(degree_from));
+		if (ret < 0) {
+			printf("invalid ntc_degree_from\n");
+			return -EINVAL;
+		}
+
+		sign = degree_from[0];
+		di->ntc_degree_from = degree_from[1];
+		if (sign)
+			di->ntc_degree_from = -di->ntc_degree_from;
+
+		di->ntc_size = len / sizeof(u32);
+	}
+
+	if (di->ntc_size) {
+		di->ntc_table = calloc(len, 1);
+		if (!di->ntc_table) {
+			printf("calloc ocv_table fail\n");
+			return -ENOMEM;
+		}
+
+		ret = dev_read_u32_array(dev, "ntc_table",
+					 di->ntc_table, di->ntc_size);
+		if (ret < 0) {
+			printf("read ntc_table array failed\n");
+			return ret;
+		}
+	}
+
+	/* Is battery attached */
 	if (!is_rk818_bat_exist(di))
 		di->virtual_power = 1;
 
@@ -1482,26 +1867,26 @@ static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
 	DBG("design_qmax:%d\n", di->qmax);
 	DBG("max_soc_offset:%d\n", di->max_soc_offset);
 	DBG("sample_res:%d\n", di->sample_res);
+	DBG("virtual_power:%d\n", di->virtual_power);
+	DBG("ts2_vol_multi:%d\n", di->ts2_vol_multi);
+	DBG("dc det: %d\n", di->dc_is_valid);
+	DBG("ntc_size:%d\n", di->ntc_size);
+	DBG("ntc_degree_from:%d\n", di->ntc_degree_from);
+	DBG("ntc_degree_to:%d\n", di->ntc_degree_from + di->ntc_size - 1);
 
 	return 0;
 }
 
 static int rk818_fg_probe(struct udevice *dev)
 {
-	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
-	struct battery_info *di = dev_get_priv(dev);
-	int ret;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
 
-	if (priv->variant != 0x8180) {
-		debug("Not support pmic variant: rk%x\n", priv->variant);
+	if (rk8xx->variant != 0x8180) {
+		printf("Not support pmic variant: rk%x\n", rk8xx->variant);
 		return -EINVAL;
 	}
 
-	g_pmic_dev = dev->parent;
-	ret = rk818_bat_parse_dt(di, gd->fdt_blob);
-	if (ret)
-		return ret;
-
 	return rk818_fg_init(di);
 }
 
@@ -1510,5 +1895,6 @@ U_BOOT_DRIVER(rk818_fg) = {
 	.id = UCLASS_FG,
 	.probe = rk818_fg_probe,
 	.ops = &fg_ops,
-	.priv_auto_alloc_size = sizeof(struct battery_info),
+	.ofdata_to_platdata = rk818_fg_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct battery_priv),
 };

commit 3476b70682dd46083e03689eec7675878f9f9814
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 18:57:21 2018 +0800

    include: rk_timer_irq: add rk3399 TIMER_CTRL definition
    
    Change-Id: I2e88b19b722a7f6a9171c5f1bbfbd7592c525f8c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
index 315761efff..d44277bacf 100644
--- a/include/rk_timer_irq.h
+++ b/include/rk_timer_irq.h
@@ -9,9 +9,14 @@
 
 #include <irq-platform.h>
 
+#ifdef CONFIG_ROCKCHIP_RK3399
+#define TIMER_CTRL		0x1c
+#else
+#define TIMER_CTRL		0x10
+#endif
+
 #define TIMER_LOAD_COUNT0	0x00
 #define TIMER_LOAD_COUNT1	0x04
-#define TIMER_CTRL		0x10
 #define TIMER_INTSTATUS		0x18
 
 #define TIMER_EN		BIT(0)

commit cf49f6adf1fb0dfee3536a201ec79e371ac594b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:47:02 2018 +0800

    power: charge animation: add debug message
    
    Change-Id: Ib96ab67e9e2657385f19c9e2ab2ed518da0ad2f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 2b374f2364..519a3a81c9 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -331,7 +331,7 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* If there is preboot command, exit */
 	if (preboot) {
-		debug("preboot: %s\n", preboot);
+		debug("exit charge, due to preboot: %s\n", preboot);
 		return 0;
 	}
 
@@ -347,8 +347,10 @@ static int charge_animation_show(struct udevice *dev)
 
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
-	if (charging <= 0)
+	if (charging <= 0) {
+		debug("exit charge, due to charger offline\n");
 		return 0;
+	}
 
 	/* Enter android charge, set property for kernel */
 	if (pdata->android_charge) {
@@ -357,8 +359,10 @@ static int charge_animation_show(struct udevice *dev)
 	}
 
 	/* Not enable U-Boot charge, exit */
-	if (!pdata->uboot_charge)
+	if (!pdata->uboot_charge) {
+		debug("exit charge, due to not enable uboot charge\n");
 		return 0;
+	}
 
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0) {
@@ -616,7 +620,10 @@ static int charge_animation_probe(struct udevice *dev)
 	/* Get PMIC: used for power off system  */
 	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
 	if (ret) {
-		printf("Get UCLASS PMIC failed: %d\n", ret);
+		if (ret == -ENODEV)
+			printf("Can't find PMIC\n");
+		else
+			printf("Get UCLASS PMIC failed: %d\n", ret);
 		return ret;
 	}
 	priv->pmic = pmic;
@@ -624,7 +631,10 @@ static int charge_animation_probe(struct udevice *dev)
 	/* Get fuel gauge: used for charging */
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {
-		printf("Get UCLASS FG failed: %d\n", ret);
+		if (ret == -ENODEV)
+			printf("Can't find FG\n");
+		else
+			printf("Get UCLASS FG failed: %d\n", ret);
 		return ret;
 	}
 	priv->fg = fg;

commit eeb3338caa2195b79978366268a139a3a882880b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:46:25 2018 +0800

    rockchip: board: print debug when not find charge display driver
    
    Change-Id: Ie75068bed96ef146e4dd949bd698ae64317a16b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 05c5ae668f..aea9dc2d64 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -117,6 +117,8 @@ static int charge_display(void)
 		if (ret != -ENODEV) {
 			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
 			return ret;
+		} else {
+			debug("Can't find charge display driver\n");
 		}
 		return 0;
 	}

commit b609c2e80d6aa607831d080bf3fa953a2553c58c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:30:55 2018 +0800

    fuel gauge: Kconfig: remove defaut y for rk816
    
    Change-Id: I37534b0128e596a005c318e39e4b54382752b273
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index ef0ea6a4ed..c61b911884 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -26,6 +26,5 @@ config POWER_FG_RK817
 config POWER_FG_RK816
 	bool "RK816 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
-	default y
 	help
 	  This adds support for RK816 fuel gauge support.

commit fb6848b7497e63b454482b90ec552992c62e0fe3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:24:15 2018 +0800

    input: Kconfig: add rk817 help descripiton for RK8XX_PWRKEY
    
    Change-Id: Ic5e0265cb046c5c5796542f6f12d1f588b7fa05c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 6a88c7918e..7d48cfe526 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -46,10 +46,10 @@ config I8042_KEYB
 	  handled by the keyboard itself.
 
 config RK8XX_PWRKEY
-	bool "Enable RK805/816 pwrkey support"
+	bool "Enable RK805/816/817 pwrkey support"
 	depends on DM_KEY && PMIC_RK8XX
 	help
-	  This adds a driver for the RK805/816 pwrkey support.
+	  This adds a driver for the RK805/816/817 pwrkey support.
 
 config ADC_KEY
 	bool "Enable adc keys support"

commit a0ad9ed1292b91ee52adef957f943a7efc9cb389
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:15:06 2018 +0800

    input: rk key: fix compile warning
    
    Change-Id: I357db633bbd904d00757a909665f8f624ef2b50d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index bc127c6841..cf5e7a865a 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -136,7 +136,7 @@ static int rk_keys_read(struct udevice *dev, int code)
 	struct rk_key_priv *priv = dev_get_priv(dev);
 	struct input_key *key = dev_get_platdata(dev);
 	int report = KEY_NOT_EXIST;
-	int max, min, i = 0;
+	int i = 0;
 	unsigned int adcval;
 
 	for (i = 0; i < priv->key_nr; i++) {
@@ -149,10 +149,10 @@ static int rk_keys_read(struct udevice *dev, int code)
 				printf("%s: failed to read saradc\n",
 				       key[i].name);
 			} else {
-				report = key_parse_adc_event(key[i], adcval);
+				report = key_parse_adc_event(&key[i], adcval);
 			}
 		} else {
-			report = key_parse_gpio_event(key[i]);
+			report = key_parse_gpio_event(&key[i]);
 		}
 		break;
 	}

commit 7b0adbaa7dd44e658135de06e194bfaf83ff6eeb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 11:14:49 2018 +0800

    input: gpio key: fix compile warning
    
    Change-Id: I897c625d623365a7f9bc49fb4ceb1ed9057cd103
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index 9bf124d0f2..d41fef6eda 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -110,7 +110,7 @@ static int gpio_key_read(struct udevice *dev, int code)
 	for (i = 0; i < priv->key_nr; i++) {
 		if (key[i].code != code)
 			continue;
-		report = key_parse_gpio_event(key[i]);
+		report = key_parse_gpio_event(&key[i]);
 		break;
 	}
 

commit 917ec9ee71575c5dad706a2d766dbe12e2a29645
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 22 21:25:14 2018 +0800

    power: pwm regulator: make message from printf to debug
    
    Change-Id: I7e9b2a6bcfe437f01bb318281110935aaf029619
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index ffa26a1c6c..6cc6efa49d 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -105,7 +105,7 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 
 	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
-		printf("Cannot find regulator pwm init_voltage\n");
+		debug("Cannot find regulator pwm init_voltage\n");
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);

commit a38e17c3f42c5c5553f69c263667937ffe27383b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 21 18:59:53 2018 +0800

    rockchip: board: add message when using kernel dtb
    
    Change-Id: Iace236ec6244a0239868de2fa063b0747eec76c3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index fe40897830..05c5ae668f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -213,6 +213,8 @@ init_dtb:
 
 	gd->fdt_blob = (void *)fdt_addr;
 
+	printf("Using kernel dtb\n");
+
 	return 0;
 }
 #endif

commit 012251d262bef02b2e6e8ef89a969bff5df7ee45
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Thu Jun 28 20:01:14 2018 +0800

    config: evb-px30: enable CONFIG_RKPARM_PARTITION
    
    sync from evb-rk3326_deconfig
    
    Change-Id: Ic417542064801bc8b5ab585c49cbe27cd8b5beb3
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
old mode 100644
new mode 100755
index 35803f05b9..1b9c740d50
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 11277c78078c3767d1758fa2d040be70951c5b9a
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 18:50:15 2018 +0800

    rockchip: dts: rk3399: use u-boot,dm-pre-reloc for dwc3
    
    We use dt-spl.dtb for dwc3 xhci when CONFIG_USING_KERNEL_DTB is
    enabled, so set the dwc3 on rk3399 boards as u-boot,dm-pre-reloc
    to make sure it will builtin dt-spl.dtb.
    
    Change-Id: Ibdceebd819bee0b102180f1f0e65fd963af380c0
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 7bd104fb3f..8000614357 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -53,6 +53,14 @@
 	u-boot,dm-pre-reloc;
 };
 
+&dwc3_typec0 {
+	u-boot,dm-pre-reloc;
+};
+
+&dwc3_typec1 {
+	u-boot,dm-pre-reloc;
+};
+
 &emmc_phy {
 	u-boot,dm-pre-reloc;
 };

commit 0a3a50d644f6912e34f70b806727e6624497dff1
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 18:06:22 2018 +0800

    rockchip: clk: rk3399: add phy 480MHz clks for usb Host0/1
    
    In kernel dtb, the rk3399 usb Host0/1 use SCLK_USBPHY0/1_480M_SRC
    in addition to HCLK_HOST0/1 and HCLK_HOST0/1_ARB. This patch adds
    the phy 480MHz clks for usb Host0/1 to ensure the generic ehci-driver
    (ehci-generic.c) to enable the clocks successfully.
    
    Change-Id: I0790e949bca0d7bdc4179f3232b29aa58436593f
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 6bd7092dbb..f7683ab33b 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1121,8 +1121,10 @@ static int rk3399_clk_enable(struct clk *clk)
 	switch (clk->id) {
 	case HCLK_HOST0:
 	case HCLK_HOST0_ARB:
+	case SCLK_USBPHY0_480M_SRC:
 	case HCLK_HOST1:
 	case HCLK_HOST1_ARB:
+	case SCLK_USBPHY1_480M_SRC:
 		return 0;
 	}
 

commit 6bfdfc4f06129283b7d3c9caa66fc89e97fc5189
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Jun 25 15:55:48 2018 +0800

    clk: rockchip: rk3399: support dual pll for vop
    
    set the vop's parent just vpll and cpll,
    set vop parent in dts node,the same as kernel setting.
    i.e:
    &vopb {
            status = "okay";
            assigned-clocks = <&cru DCLK_VOP0_DIV>;
            assigned-clock-parents = <&cru PLL_VPLL>;
    };
    &vopl {
            status = "okay";
            assigned-clocks = <&cru DCLK_VOP1_DIV>;
            assigned-clock-parents = <&cru PLL_CPLL>;
    };
    
    Change-Id: I07ab4e2837cf7fc0860e8b4d14adb8936f5cb27a
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 045b481ca0..9c4104845d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -71,8 +71,9 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define KHz		1000
 #define OSC_HZ		(24*MHz)
 #define APLL_HZ		(600*MHz)
-#define GPLL_HZ		(594*MHz)
+#define GPLL_HZ		(800 * MHz)
 #define CPLL_HZ		(384*MHz)
+#define NPLL_HZ		(600 * MHz)
 #define PPLL_HZ		(676*MHz)
 
 #define PMU_PCLK_HZ	(48*MHz)
@@ -104,4 +105,18 @@ enum cpu_cluster {
 	CPU_CLUSTER_BIG,
 };
 
+enum rk3399_pll_id {
+	APLLL_ID = 0,
+	APLLB_ID,
+	DPLL_ID,
+	CPLL_ID,
+	GPLL_ID,
+	NPLL_ID,
+	VPLL_ID,
+
+	PPLL_ID,
+
+	END_PLL_ID
+};
+
 #endif	/* __ASM_ARCH_CRU_RK3399_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index c19912ab69..6bd7092dbb 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -50,8 +50,9 @@ struct pll_div {
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
+static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 2, 2);
 #if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
@@ -195,6 +196,7 @@ enum {
 	ACLK_VOP_PLL_SEL_SHIFT		= 6,
 	ACLK_VOP_PLL_SEL_MASK		= 0x3 << ACLK_VOP_PLL_SEL_SHIFT,
 	ACLK_VOP_PLL_SEL_CPLL		= 0x1,
+	ACLK_VOP_PLL_SEL_GPLL		= 0x2,
 	ACLK_VOP_DIV_CON_SHIFT		= 0,
 	ACLK_VOP_DIV_CON_MASK		= 0x1f << ACLK_VOP_DIV_CON_SHIFT,
 
@@ -205,6 +207,7 @@ enum {
 	DCLK_VOP_PLL_SEL_SHIFT          = 8,
 	DCLK_VOP_PLL_SEL_MASK           = 3 << DCLK_VOP_PLL_SEL_SHIFT,
 	DCLK_VOP_PLL_SEL_VPLL           = 0,
+	DCLK_VOP_PLL_SEL_CPLL           = 1,
 	DCLK_VOP_DIV_CON_MASK           = 0xff,
 	DCLK_VOP_DIV_CON_SHIFT          = 0,
 
@@ -290,6 +293,31 @@ enum {
  * FBDIV = Integer value programmed into feedback divide
  *
  */
+
+static uint32_t rkclk_pll_get_rate(u32 *pll_con)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+
+	con = readl(&pll_con[3]);
+	switch ((con & PLL_MODE_MASK) >> PLL_MODE_SHIFT) {
+	case PLL_MODE_SLOW:
+		return OSC_HZ;
+	case PLL_MODE_NORM:
+		/* normal mode */
+		con = readl(&pll_con[0]);
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll_con[1]);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case PLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
 static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div)
 {
 	/* All 8 PLLs have same VCO and output frequency range restrictions. */
@@ -333,6 +361,42 @@ static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div)
 		     PLL_MODE_NORM << PLL_MODE_SHIFT);
 }
 
+static ulong rk3399_pll_get_rate(struct rk3399_clk_priv *priv,
+				 enum rk3399_pll_id pll_id)
+{
+	struct rk3399_cru *cru = priv->cru;
+	u32 *pll_con;
+
+	switch (pll_id) {
+	case PLL_APLLL:
+		pll_con = &cru->apll_l_con[0];
+		break;
+	case PLL_APLLB:
+		pll_con = &cru->apll_b_con[0];
+		break;
+	case PLL_DPLL:
+		pll_con = &cru->dpll_con[0];
+		break;
+	case PLL_CPLL:
+		pll_con = &cru->cpll_con[0];
+		break;
+	case PLL_GPLL:
+		pll_con = &cru->gpll_con[0];
+		break;
+	case PLL_NPLL:
+		pll_con = &cru->npll_con[0];
+		break;
+	case PLL_VPLL:
+		pll_con = &cru->vpll_con[0];
+		break;
+	default:
+		pll_con = &cru->vpll_con[0];
+		break;
+	}
+
+	return rkclk_pll_get_rate(pll_con);
+}
+
 static int pll_para_config(u32 freq_hz, struct pll_div *div)
 {
 	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
@@ -635,12 +699,15 @@ static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 	return rk3399_spi_get_clk(cru, clk_id);
 }
 
+#define RK3399_LIMIT_PLL_DCLK_VOP	(600 * 1000000)
+#define RK3399_LIMIT_PLL_ACLK_VOP	(400 * 1000000)
+
 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 {
-	struct pll_div vpll_config = {0};
-	int aclk_vop = 198*MHz;
+	struct pll_div vpll_config = {0}, cpll_config = {0};
+	int aclk_vop = RK3399_LIMIT_PLL_ACLK_VOP;
 	void *aclkreg_addr, *dclkreg_addr;
-	u32 div;
+	u32 div = 1;
 
 	switch (clk_id) {
 	case DCLK_VOP0:
@@ -655,26 +722,30 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 		return -EINVAL;
 	}
 	/* vop aclk source clk: cpll */
-	div = CPLL_HZ / aclk_vop;
+	div = GPLL_HZ / aclk_vop;
 	assert(div - 1 <= 31);
 
 	rk_clrsetreg(aclkreg_addr,
 		     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
-		     ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT |
+		     ACLK_VOP_PLL_SEL_GPLL << ACLK_VOP_PLL_SEL_SHIFT |
 		     (div - 1) << ACLK_VOP_DIV_CON_SHIFT);
 
-	/* vop dclk source from vpll, and equals to vpll(means div == 1) */
-	if (pll_para_config(hz, &vpll_config))
-		return -1;
+	div = DIV_ROUND_UP(RK3399_LIMIT_PLL_DCLK_VOP, hz);
 
-	rkclk_set_pll(&cru->vpll_con[0], &vpll_config);
+	if (readl(dclkreg_addr) & DCLK_VOP_PLL_SEL_MASK) {
+		if (pll_para_config(div * hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(&cru->cpll_con[0], &cpll_config);
+	} else {
+		if (pll_para_config(div * hz, &vpll_config))
+			return -1;
+		rkclk_set_pll(&cru->vpll_con[0], &vpll_config);
+	}
 
 	rk_clrsetreg(dclkreg_addr,
-		     DCLK_VOP_DCLK_SEL_MASK | DCLK_VOP_PLL_SEL_MASK|
-		     DCLK_VOP_DIV_CON_MASK,
+		     DCLK_VOP_DCLK_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
 		     DCLK_VOP_DCLK_SEL_DIVOUT << DCLK_VOP_DCLK_SEL_SHIFT |
-		     DCLK_VOP_PLL_SEL_VPLL << DCLK_VOP_PLL_SEL_SHIFT |
-		     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		     (div - 1) << DCLK_VOP_DIV_CON_SHIFT);
 
 	return hz;
 }
@@ -853,8 +924,15 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 	ulong rate = 0;
 
 	switch (clk->id) {
-	case 0 ... 63:
-		return 0;
+	case PLL_APLLL:
+	case PLL_APLLB:
+	case PLL_DPLL:
+	case PLL_CPLL:
+	case PLL_GPLL:
+	case PLL_NPLL:
+	case PLL_VPLL:
+		rate = rk3399_pll_get_rate(priv, clk->id - 1);
+		break;
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
@@ -997,11 +1075,41 @@ static int __maybe_unused rk3399_gmac_set_parent(struct clk *clk, struct clk *pa
 	return -EINVAL;
 }
 
+static int __maybe_unused rk3399_dclk_vop_set_parent(struct clk *clk,
+						     struct clk *parent)
+{
+	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
+	void *dclkreg_addr;
+
+	switch (clk->id) {
+	case DCLK_VOP0_DIV:
+		dclkreg_addr = &priv->cru->clksel_con[49];
+		break;
+	case DCLK_VOP1_DIV:
+		dclkreg_addr = &priv->cru->clksel_con[50];
+		break;
+	default:
+		return -EINVAL;
+	}
+	if (parent->id == PLL_CPLL) {
+		rk_clrsetreg(dclkreg_addr, DCLK_VOP_PLL_SEL_MASK,
+			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_PLL_SEL_SHIFT);
+	} else {
+		rk_clrsetreg(dclkreg_addr, DCLK_VOP_PLL_SEL_MASK,
+			     DCLK_VOP_PLL_SEL_VPLL << DCLK_VOP_PLL_SEL_SHIFT);
+	}
+
+	return 0;
+}
+
 static int __maybe_unused rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_RMII_SRC:
 		return rk3399_gmac_set_parent(clk, parent);
+	case DCLK_VOP0_DIV:
+	case DCLK_VOP1_DIV:
+		return rk3399_dclk_vop_set_parent(clk, parent);
 	}
 
 	debug("%s: unsupported clk %ld\n", __func__, clk->id);
@@ -1051,6 +1159,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	/* configure gpll cpll */
 	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
 	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
+	rkclk_set_pll(&cru->npll_con[0], &npll_init_cfg);
 
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
diff --git a/include/dt-bindings/clock/rk3399-cru.h b/include/dt-bindings/clock/rk3399-cru.h
index d4bdcc663f..e479e0f47a 100644
--- a/include/dt-bindings/clock/rk3399-cru.h
+++ b/include/dt-bindings/clock/rk3399-cru.h
@@ -7,6 +7,8 @@
 #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
 #define _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
 
+#define RK3399_TWO_PLL_FOR_VOP
+
 /* core clocks */
 #define PLL_APLLL			1
 #define PLL_APLLB			2

commit 051c625387506ec6c338ba88c1f192b93b1b4f04
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 25 16:21:42 2018 +0800

    android: fix android_bootloader_message_write bug
    
    Acording to rockchip, the bootloader message is storaged
    in the misc, and the offset address is BOOTLOADER_MESSAGE_BLK_OFFSET
    blocks. But the offset address is zero in the normal state.
    So add the CONFIG_RKIMG_BOOTLOADER to seperate it.
    
    Change-Id: Ie4cd473ff9a32f578fe901b48689e60c7a28012a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 272dc450b4..add6003397 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -85,8 +85,13 @@ static int android_bootloader_message_write(
 	const disk_partition_t *part_info,
 	struct android_bootloader_message *message)
 {
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	ulong message_blocks = sizeof(struct android_bootloader_message) /
+	    part_info->blksz + BOOTLOADER_MESSAGE_BLK_OFFSET;
+#else
 	ulong message_blocks = sizeof(struct android_bootloader_message) /
 	    part_info->blksz;
+#endif
 	if (message_blocks > part_info->size) {
 		printf("misc partition too small.\n");
 		return -1;

commit 8e652a339fad93ed73eae33979d213b5aae422d5
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 17:31:16 2018 +0800

    rockchip: dts: rk3399-evb: fix the vcc5v0_host regulator
    
    The vcc5v0_host regulator is used for USB Host Vbus control
    on rk3399-evb. Set both the "regulator-min-microvolt" and
    "regulator-max-microvolt" to 5000000 for the vcc5v0_host,
    and enable it when boot.
    
    Change-Id: Ia77e99b1b2dfa9876d7c5739f683952a8fc44c09
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index a4ddd0075e..1a9e87c342 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -61,6 +61,10 @@
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_host";
 		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
 	};
 
 	vcc5v0_typec0: vcc5v0-typec0-en {

commit f13b6e2815f862dc0eaba3e6f84349c94310afa4
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 17:17:07 2018 +0800

    rockchip: config: enable ohci support for rk3399
    
    We have added OHCI nodes in rk3399 device-tree, so let's
    enable OHCI config to support USB 1.1/1.0 in rk3399 boards.
    
    Change-Id: I0a2af0e404b281c6bec627dc7871471043b8a65a
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 2a907019bd..305f0a405d 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -78,6 +78,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
index f84e81afef..93039bff52 100644
--- a/configs/rk3399_defconfig
+++ b/configs/rk3399_defconfig
@@ -77,6 +77,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 20dfd2d71f..bf5f445011 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -77,4 +77,8 @@
 
 /* enable usb config for usb ether */
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
 #endif

commit 2878d5a3aa974f0ba8f7c78842eb5ddf2c55cd93
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Jun 27 16:28:51 2018 +0800

    usb: dwc3: init phy utmi width in platform data
    
    On rk3399 board, we need to configure phy interface UTMI+ width
    to 16 bits via the property "snps,phyif-utmi-bits" of dwc3 node.
    But we can't the get the property from kernel dtb. So this patch
    initialize the phy interface UTMI+ width in dwc3 platform data,
    and not dependent on the property in dtb.
    
    Change-Id: I3f6b05e0d72806242a128c85f82b260f61ac4f95
    Signed-off-by: William Wu <william.wu@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index c2b6d83d5c..b6f730852a 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -194,6 +194,7 @@ static struct dwc3_device dwc3_device_data = {
 	.dr_mode = USB_DR_MODE_PERIPHERAL,
 	.index = 0,
 	.dis_u2_susphy_quirk = 1,
+	.usb2_phyif_utmi_width = 16,
 };
 
 int usb_gadget_handle_interrupts(void)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 1cbf17967a..d073f30cf0 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -694,6 +694,9 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 
 	dwc->index = dwc3_dev->index;
 
+	if (dwc3_dev->usb2_phyif_utmi_width)
+		dwc->usb2_phyif_utmi_width = dwc3_dev->usb2_phyif_utmi_width;
+
 	node = fdt_node_offset_by_compatible(blob, -1,
 			"rockchip,rk3399-xhci");
 	if (node < 0)
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
index 7af2ad11e4..cc9ffe8825 100644
--- a/include/dwc3-uboot.h
+++ b/include/dwc3-uboot.h
@@ -33,6 +33,7 @@ struct dwc3_device {
 	unsigned dis_u2_susphy_quirk;
 	unsigned tx_de_emphasis_quirk;
 	unsigned tx_de_emphasis;
+	unsigned usb2_phyif_utmi_width;
 	int index;
 };
 

commit 6281205a07d87a6722d342cddc8a4dfd33eafa20
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 27 11:49:21 2018 +0800

    rockchip: rkflash: update spi nand ECC strategy
    
    1.Read ECC status according to each flash's identify Internal ECC;
    2.Refresh data before reach ECC Flipping Bits.
    
    Change-Id: I346167d4c252261813ff0a6bb670a64bec6026dd
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
index 2bfd63b331..51edb6fcb0 100644
--- a/drivers/rkflash/sfc_nand.c
+++ b/drivers/rkflash/sfc_nand.c
@@ -16,29 +16,31 @@
 
 static struct nand_info spi_nand_tbl[] = {
 	/* TC58CVG0S0HxAIx */
-	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8},
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8, NULL},
 	/* TC58CVG1S0HxAIx */
-	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8},
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8, NULL},
 	/* MX35LF1GE4AB */
-	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* MX35LF2GE4AB */
-	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
 	/* GD5F1GQ4UAYIG */
-	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F2GQ40BY2GR */
-	{0xC8D2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, NULL},
 	/* MT29F1G01ZAC */
-	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F1GQ4U */
-	{0xC8B1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
-	/* GD5F2GQ4U */
-	{0xC8B2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp1},
+	/* GD5F2GQ40BY2GR */
+	{0xC8D2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* GD5F1GQ4U */
-	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 8, 0xB0, 0, 4, 8, &sfc_nand_ecc_status_sp3},
 	/* IS37SML01G1 */
-	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12},
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12, &sfc_nand_ecc_status_sp1},
 	/* W25N01GV */
-	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20},
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20, &sfc_nand_ecc_status_sp1},
+	/* HYF2GQ4UAACAE */
+	{0xC952, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 14, 0xB0, 0, 4, 36, NULL},
+	/* HYF2GQ4UDACAE */
+	{0xC922, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 4, 0xB0, 0, 4, 20, NULL},
+	/* HYF1GQ4UDACAE */
+	{0xC921, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 4, 0xB0, 0, 4, 20, NULL},
 };
 
 static u8 id_byte[8];
@@ -141,6 +143,122 @@ static int sfc_nand_wait_busy(u8 *data, int timeout)
 	return -1;
 }
 
+/*
+ * ecc default:
+ * 0, No bit errors were detected
+ * 1, Bit errors were detected and corrected.
+ * 2, Multiple bit errors were detected and not corrected.
+ * 3, Bits errors were detected and corrected, bit error count
+ *	exceed the bit flip detection threshold
+ */
+static u32 sfc_nand_ecc_status(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+
+	if (ecc <= 1)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 2)
+		ret = SFC_NAND_ECC_ERROR;
+	else
+		ret = SFC_NAND_ECC_REFRESH;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type1:
+ * 0x00, No bit errors were detected;
+ * 0x01, Bits errors were detected and corrected, bit error count
+ *	may reach the bit flip detection threshold;
+ * 0x10, Multiple bit errors were detected and not corrected;
+ * 0x11, Reserved.
+ */
+u32 sfc_nand_ecc_status_sp1(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+
+	if (ecc == 0)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 1)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
+/*
+ * ecc spectial type3:
+ * [0x0000, 0x0011], No bit errors were detected;
+ * [0x0100, 0x0111], Bit errors were detected and corrected. Not
+ *	reach Flipping Bits;
+ * [0x1000, 0x1011], Multiple bit errors were detected and
+ *	not corrected.
+ * [0x1100, 0x1111], Bit error count equals the bit flip
+ *	detectionthreshold
+ */
+u32 sfc_nand_ecc_status_sp3(void)
+{
+	int ret;
+	u32 i;
+	u8 ecc;
+	u8 status, status1;
+	u32 timeout = 1000 * 1000;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		ret = sfc_nand_read_feature(0xF0, &status1);
+		if (ret != SFC_OK)
+			return SFC_NAND_ECC_ERROR;
+		if (!(status & (1 << 0)))
+			break;
+		sfc_delay(1);
+	}
+
+	ecc = (status >> 4) & 0x03;
+	ecc = (ecc << 2) | ((status1 >> 4) & 0x03);
+	if (ecc < 7)
+		ret = SFC_NAND_ECC_OK;
+	else if (ecc == 7 || ecc >= 12)
+		ret = SFC_NAND_ECC_REFRESH;
+	else
+		ret = SFC_NAND_ECC_ERROR;
+
+	return ret;
+}
+
 static u32 sfc_nand_erase_block(u8 cs, u32 addr)
 {
 	int ret;
@@ -210,8 +328,7 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	int ret;
 	union SFCCMD_DATA sfcmd;
 	union SFCCTRL_DATA sfctrl;
-	u8 status;
-	u8 ecc;
+	u32 ecc_result;
 	u32 data_sz = 2048;
 	u32 spare_offs_1 = p_nand_info->spare_offs_1;
 	u32 spare_offs_2 = p_nand_info->spare_offs_2;
@@ -222,8 +339,11 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	sfcmd.b.addrbits = SFC_ADDR_24BITS;
 	sfc_request(sfcmd.d32, 0, addr, p_data);
 
-	sfc_nand_wait_busy(&status, 1000 * 1000);
-	ecc = (status >> 4) & 0x03;
+	if (p_nand_info->ecc_status)
+		ecc_result = p_nand_info->ecc_status();
+	else
+		ecc_result = sfc_nand_ecc_status();
+
 	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
 	    p_nand_info->QE_address == 0xFF &&
 	    sfc_get_version() != SFC_VER_3)
@@ -245,41 +365,14 @@ static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
 	if (ret != SFC_OK)
 		return SFC_NAND_ECC_ERROR;
 
-	/*
-	 * ecc status:
-	 * 0, No bit errors were detected
-	 * 1, Bit errors were detected and corrected. If max_ecc_bits equals 1,
-	 *	Bit error count exceed the bit flip detection threshold.
-	 * 2, Multiple bit errors were detected and not corrected.
-	 * 3, If max_ecc_bits equals 1, reserved, else bit errors were detected
-	 *	and corrected, bit error count exceed the bit flip detection
-	 *	threshold
-	 */
-
-	if (ecc == 0) {
-		ret = SFC_NAND_ECC_OK;
-	} else if (ecc == 1) {
-		if (p_nand_info->max_ecc_bits == 1)
-			ret = SFC_NAND_ECC_REFRESH;
-		else
-			ret = SFC_NAND_ECC_OK;
-	} else if (ecc == 2) {
-		ret = SFC_NAND_ECC_ERROR;
-	} else {
-		if (p_nand_info->max_ecc_bits == 1)
-			ret = SFC_NAND_ECC_ERROR;
-		else
-			ret = SFC_NAND_ECC_REFRESH;
-	}
-
-	if (ret != SFC_NAND_ECC_OK) {
-		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ret);
+	if (ecc_result != SFC_NAND_ECC_OK) {
+		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ecc_result);
 		if (p_data)
 			PRINT_SFC_HEX("data:", p_data, 4, 8);
 		if (p_spare)
 			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
 	}
-	return ret;
+	return ecc_result;
 }
 
 static int sfc_nand_read_id_raw(u8 *data)
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
old mode 100644
new mode 100755
index 4b96d5b9f2..d5f0086ac7
--- a/drivers/rkflash/sfc_nand.h
+++ b/drivers/rkflash/sfc_nand.h
@@ -114,9 +114,12 @@ struct nand_info {
 
 	u8 spare_offs_1;
 	u8 spare_offs_2;
+	u32 (*ecc_status)(void);
 };
 
 u32 sfc_nand_init(void);
 int sfc_nand_read_id(u8 *buf);
+u32 sfc_nand_ecc_status_sp1(void);
+u32 sfc_nand_ecc_status_sp3(void);
 
 #endif

commit dbd4fb93593a946586bb62292b428b4eb371b341
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 27 10:09:03 2018 +0800

    configs: evb-px30: sync configure from evb-rk3326
    
    Change-Id: Ic86230e31828f6216dc8ec3b12ab0db84089d4e3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 421784c4ba..35803f05b9 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -49,6 +49,7 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
@@ -85,3 +86,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit d443b7d532035de255d35965824fefc965ef385e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 25 14:49:06 2018 +0800

    make.sh: parse RKCHIP from .config
    
    this makes RKCHIP non relative about build command,
    but we have to do special fixup for rk3326 and rk3126
    board defconfig, because they contain px30 and rk3128
    in the .config file.
    
    Change-Id: Ia1974f2c8961b0a698d32f45effa4ddfe4177b0b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 5a4772fbea..0569f4851d 100755
--- a/make.sh
+++ b/make.sh
@@ -2,8 +2,6 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKCHIP=$(echo ${BOARD##*-} | tr '[a-z]' '[A-Z]')
-ORG_RKCHIP=$RKCHIP
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -20,6 +18,9 @@ TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_a
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 
 ########################################### User not touch #############################################
+# Declare global INI file searching index name for every chip, update in fixup_platform_configure()
+RKCHIP=
+
 # Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
 RKTOOLS=
 RKBIN=
@@ -42,7 +43,7 @@ PLATFORM_AARCH32=
 
 prepare()
 {
-	local absolute_path cmd count
+	local absolute_path cmd
 
 	# Assign output directory
 	cmd=${SUBCMD%=*}
@@ -73,23 +74,6 @@ prepare()
 		exit 1
 	fi
 
-	# Get RKCHIP from exist .config file
-	if [ "$RKCHIP" = '' ]; then
-		count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
-		RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
-		if [ $count -gt 1 ]; then
-			echo "Find $count SoC in .config file:"
-			echo "$RKCHIP"
-			echo
-			echo "I'm confused, please compile with [board], like: ./make.sh [board]"
-			exit 1
-		else
-			RKCHIP=${RKCHIP%=*}
-			RKCHIP=${RKCHIP##*_}
-			ORG_RKCHIP=$RKCHIP
-		fi
-	fi
-
 	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
@@ -183,9 +167,29 @@ sub_commands()
 #	4. fixup ARM64 cpu boot with AArch32
 fixup_platform_configure()
 {
-# <1> Fixup chip name for searching trust/loader ini files
-	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
-		RKCHIP=RK322X
+	local count plat
+
+# <1> Get RKCHIP for searching trust/loader ini files
+	count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+	RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+
+	if [ $count -eq 1 ]; then
+		RKCHIP=${RKCHIP%=*}
+		RKCHIP=${RKCHIP##*_}
+	elif [ $count -gt 1 ]; then
+		# Is RK3126 ?
+		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3126=y/p"`
+		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3126=y' ]; then
+			RKCHIP=RK3126
+		fi
+		# Is RK3326 ?
+		plat=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config | sed -n "/CONFIG_ROCKCHIP_RK3326=y/p"`
+		if [ "$plat" = 'CONFIG_ROCKCHIP_RK3326=y' ]; then
+			RKCHIP=RK3326
+		fi
+	else
+		echo "Can't get Rockchip SoC definition in .config"
+		exit 1
 	fi
 
 # <2> Fixup rsa/sha pack mode for platforms
@@ -310,9 +314,9 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
 	else
-		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 

commit dda95de75171f2bc385b904940b757feca810912
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 20 17:26:23 2018 +0800

    rockchip: rkflash: move ftl_free to ftl lib
    
    1.Move ftl_free to .S code to avoid compile redefinition error;
    2.Add ftl code date.
    
    Change-Id: I098e5a1b3185d2e21dcbc68ae316819eb748494f
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
index e383c55612..ba840ce85f 100644
--- a/drivers/rkflash/rk_sftl_arm_v7.S
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -2,8 +2,8 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-06-20
  */
-
 	.arch armv7-a
 	.eabi_attribute 20, 1
 	.eabi_attribute 21, 1
@@ -27,9 +27,9 @@
 	.fpu softvfp
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB351:
-	.file 1 "drivers/rkflash/sftl_flash.c"
-	.loc 1 54 0
+.LFB352:
+	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
+	.loc 1 58 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
@@ -44,58 +44,58 @@ l2p_addr_tran.isra.0:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 1 70 0
+	.loc 1 74 0
 	lsrs	r7, r0, #10
-	.loc 1 62 0
+	.loc 1 66 0
 	ldr	r3, .L3
-	.loc 1 54 0
+	.loc 1 58 0
 	mov	r8, r1
 	mov	r6, r0
-	.loc 1 71 0
+	.loc 1 75 0
 	uxth	r0, r7
-	.loc 1 54 0
+	.loc 1 58 0
 	mov	r10, r2
-	.loc 1 72 0
+	.loc 1 76 0
 	uxth	r7, r7
-	.loc 1 62 0
+	.loc 1 66 0
 	ldrh	r4, [r3, #8]
 .LVL1:
-	.loc 1 74 0
+	.loc 1 78 0
 	ubfx	r6, r6, #0, #10
-	.loc 1 63 0
+	.loc 1 67 0
 	ldrh	r5, [r3, #10]
 .LVL2:
-	.loc 1 64 0
+	.loc 1 68 0
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	.loc 1 65 0
+	.loc 1 69 0
 	itt	eq
 	lsreq	r4, r4, #1
 .LVL3:
-	.loc 1 66 0
+	.loc 1 70 0
 	lsleq	r5, r5, #1
 .LVL4:
-	.loc 1 71 0
+	.loc 1 75 0
 	mov	r1, r4
 .LVL5:
-	.loc 1 66 0
+	.loc 1 70 0
 	it	eq
 	uxtheq	r5, r5
 .LVL6:
-	.loc 1 71 0
+	.loc 1 75 0
 	bl	__aeabi_uidiv
 .LVL7:
 	uxth	r0, r0
 .LVL8:
-	.loc 1 72 0
+	.loc 1 76 0
 	mls	r4, r0, r4, r7
 .LVL9:
-	.loc 1 74 0
+	.loc 1 78 0
 	mla	r4, r5, r4, r6
 	str	r4, [r8]
-	.loc 1 75 0
+	.loc 1 79 0
 	str	r0, [r10]
-	.loc 1 78 0
+	.loc 1 82 0
 	movs	r0, #0
 .LVL10:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
@@ -105,7 +105,7 @@ l2p_addr_tran.isra.0:
 .L3:
 	.word	.LANCHOR0
 	.cfi_endproc
-.LFE351:
+.LFE352:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.7,"ax",%progbits
 	.align	1
@@ -115,8 +115,8 @@ l2p_addr_tran.isra.0:
 	.fpu softvfp
 	.type	ftl_set_blk_mode.part.7, %function
 ftl_set_blk_mode.part.7:
-.LFB358:
-	.file 2 "drivers/rkflash/sftl_sys.c"
+.LFB359:
+	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
 	.loc 2 1346 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -140,7 +140,7 @@ ftl_set_blk_mode.part.7:
 .L6:
 	.word	.LANCHOR1
 	.cfi_endproc
-.LFE358:
+.LFE359:
 	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -152,7 +152,7 @@ ftl_set_blk_mode.part.7:
 	.type	Ftl_log2, %function
 Ftl_log2:
 .LFB205:
-	.file 3 "drivers/rkflash/sftl_plat.c"
+	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
 	.loc 3 128 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -596,8 +596,8 @@ IsBlkInVendorPart:
 	ldr	r3, .L34
 	ldrh	r3, [r3]
 	cbz	r3, .L33
-.LBB164:
-.LBB165:
+.LBB166:
+.LBB167:
 	.loc 3 519 0
 	ldr	r3, .L34+4
 	.loc 3 518 0
@@ -611,16 +611,16 @@ IsBlkInVendorPart:
 	cmp	r3, r2
 	bne	.L30
 .L33:
-.LBE165:
-.LBE164:
+.LBE167:
+.LBE166:
 	.loc 3 524 0
 	movs	r0, #0
 .LVL37:
 	bx	lr
 .LVL38:
 .L30:
-.LBB167:
-.LBB166:
+.LBB169:
+.LBB168:
 	.loc 3 519 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
@@ -628,8 +628,8 @@ IsBlkInVendorPart:
 	.loc 3 520 0
 	movs	r0, #1
 .LVL39:
-.LBE166:
-.LBE167:
+.LBE168:
+.LBE169:
 	.loc 3 525 0
 	bx	lr
 .L35:
@@ -678,7 +678,7 @@ sftl_get_density:
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
 .LFB225:
-	.file 4 "drivers/rkflash/sftl_bbm.c"
+	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
 	.loc 4 5 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
@@ -1317,24 +1317,24 @@ IsInFreeQueue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 .LVL99:
-.LBB168:
-.LBB169:
+.LBB170:
+.LBB171:
 	.loc 2 94 0
 	ldr	r3, .L90
-.LBE169:
-.LBE168:
+.LBE171:
+.LBE170:
 	.loc 2 147 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-.LBB171:
-.LBB170:
+.LBB173:
+.LBB172:
 	.loc 2 94 0
 	ldrh	r4, [r3, #6]
-.LBE170:
-.LBE171:
+.LBE172:
+.LBE173:
 	.loc 2 152 0
 	cmp	r4, #1024
 	beq	.L88
@@ -1394,17 +1394,17 @@ FtlFreeSysBlkQueueOut:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 .LVL106:
-.LBB172:
-.LBB173:
+.LBB174:
+.LBB175:
 	.loc 2 89 0
 	ldr	r2, .L95
 	ldrh	r1, [r2, #6]
-.LBE173:
-.LBE172:
+.LBE175:
+.LBE174:
 	.loc 2 168 0
 	cbz	r1, .L94
 .LVL107:
-.LBB174:
+.LBB176:
 	.loc 2 170 0
 	ldrh	r3, [r2, #2]
 	.loc 2 171 0
@@ -1423,7 +1423,7 @@ FtlFreeSysBlkQueueOut:
 	bx	lr
 .LVL109:
 .L94:
-.LBE174:
+.LBE176:
 	.loc 2 166 0
 	movw	r0, #65535
 .LVL110:
@@ -1673,21 +1673,21 @@ INSERT_DATA_LIST:
 	cmp	r2, r3
 	bcs	.L113
 .LVL143:
-.LBB177:
-.LBB178:
+.LBB179:
+.LBB180:
 	movs	r2, #189
 	ldr	r1, .L115+8
 	ldr	r0, .L115+12
-.LBE178:
-.LBE177:
+.LBE180:
+.LBE179:
 	.loc 2 190 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB180:
-.LBB179:
+.LBB182:
+.LBB181:
 	.loc 2 189 0
 	b	printf
 .LVL144:
@@ -1701,8 +1701,8 @@ INSERT_DATA_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR46
 	.word	.LC1
-.LBE179:
-.LBE180:
+.LBE181:
+.LBE182:
 	.cfi_endproc
 .LFE248:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -1883,21 +1883,21 @@ INSERT_FREE_LIST:
 	cmp	r2, r3
 	bcs	.L126
 .LVL162:
-.LBB183:
-.LBB184:
+.LBB185:
+.LBB186:
 	movs	r2, #182
 	ldr	r1, .L128+8
 	ldr	r0, .L128+12
-.LBE184:
-.LBE183:
+.LBE186:
+.LBE185:
 	.loc 2 183 0
 	pop	{r3, lr}
 	.cfi_remember_state
 	.cfi_restore 14
 	.cfi_restore 3
 	.cfi_def_cfa_offset 0
-.LBB186:
-.LBB185:
+.LBB188:
+.LBB187:
 	.loc 2 182 0
 	b	printf
 .LVL163:
@@ -1911,8 +1911,8 @@ INSERT_FREE_LIST:
 	.word	.LANCHOR5
 	.word	.LANCHOR49
 	.word	.LC1
-.LBE185:
-.LBE186:
+.LBE187:
+.LBE188:
 	.cfi_endproc
 .LFE247:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -2256,8 +2256,8 @@ List_update_data_list:
 	cmp	r3, r0
 	beq	.L159
 .LVL199:
-.LBB189:
-.LBB190:
+.LBB191:
+.LBB192:
 	.loc 2 416 0 is_stmt 1
 	ldr	r6, .L165+12
 	movs	r3, #6
@@ -2359,8 +2359,8 @@ List_update_data_list:
 	bl	INSERT_DATA_LIST
 .LVL215:
 .L159:
-.LBE190:
-.LBE189:
+.LBE192:
+.LBE191:
 	.loc 2 439 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
@@ -2420,8 +2420,8 @@ ftl_map_blk_alloc_new_blk:
 	bcc	.L170
 .LVL219:
 .L171:
-.LBB193:
-.LBB194:
+.LBB195:
+.LBB196:
 	.loc 2 532 0 is_stmt 1
 	mov	r2, #532
 	ldr	r1, .L177
@@ -2431,8 +2431,8 @@ ftl_map_blk_alloc_new_blk:
 	b	.L172
 .LVL221:
 .L170:
-.LBE194:
-.LBE193:
+.LBE196:
+.LBE195:
 	.loc 2 521 0
 	mov	r7, r2
 	adds	r3, r3, #1
@@ -2658,39 +2658,39 @@ FtlUpdateVaildLpn:
 .L192:
 	.loc 2 886 0
 	movs	r3, #0
-.LBB197:
-.LBB198:
+.LBB199:
+.LBB200:
 	.loc 2 888 0
 	ldr	r0, .L201+4
 .LVL245:
-.LBE198:
-.LBE197:
+.LBE200:
+.LBE199:
 	.loc 2 886 0
 	strh	r3, [r1]	@ movhi
-.LBB202:
-.LBB199:
+.LBB204:
+.LBB201:
 	.loc 2 890 0
 	movw	r6, #65535
 	ldr	r1, .L201+8
 	ldrh	r4, [r0]
 	mov	r0, r3
-.LBE199:
-.LBE202:
+.LBE201:
+.LBE204:
 	.loc 2 887 0
 	ldr	r2, .L201+12
-.LBB203:
-.LBB200:
+.LBB205:
+.LBB202:
 	.loc 2 890 0
 	ldr	r1, [r1]
-.LBE200:
-.LBE203:
+.LBE202:
+.LBE205:
 	.loc 2 887 0
 	str	r3, [r2]
 .LVL246:
 	add	r4, r1, r4, lsl #1
 .L193:
-.LBB204:
-.LBB201:
+.LBB206:
+.LBB203:
 	.loc 2 888 0
 	cmp	r1, r4
 	bne	.L195
@@ -2714,8 +2714,8 @@ FtlUpdateVaildLpn:
 	.word	.LANCHOR5
 	.word	.LANCHOR43
 	.word	.LANCHOR60
-.LBE201:
-.LBE204:
+.LBE203:
+.LBE206:
 	.cfi_endproc
 .LFE269:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2924,8 +2924,8 @@ FtlSlcSuperblockCheck:
 	cmp	r2, r3
 	beq	.L219
 .LVL264:
-.LBB207:
-.LBB208:
+.LBB209:
+.LBB210:
 	.loc 2 2020 0
 	ldrb	r2, [r0, #6]	@ zero_extendqisi2
 	.loc 2 2025 0
@@ -2973,8 +2973,8 @@ FtlSlcSuperblockCheck:
 	.align	2
 .L225:
 	.word	.LANCHOR3
-.LBE208:
-.LBE207:
+.LBE210:
+.LBE209:
 	.cfi_endproc
 .LFE285:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -4147,7 +4147,7 @@ FtlPrintInfo2buf:
 	add	r4, r4, r0
 .LVL436:
 .L260:
-.LBB209:
+.LBB211:
 	.loc 3 87 0
 	movs	r0, #0
 	ldr	r5, .L272+68
@@ -4199,8 +4199,8 @@ FtlPrintInfo2buf:
 	.loc 3 88 0 discriminator 2
 	bne	.L262
 .L261:
-.LBE209:
-.LBB210:
+.LBE211:
+.LBB212:
 	.loc 3 96 0
 	ldr	r3, .L272+76
 .LVL443:
@@ -4283,7 +4283,7 @@ FtlPrintInfo2buf:
 	.word	-1431655765
 	.word	.LANCHOR40
 	.word	.LC69
-.LBE210:
+.LBE212:
 	.cfi_endproc
 .LFE203:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -4665,8 +4665,8 @@ free_data_superblock:
 	cmp	r0, r2
 	beq	.L309
 .LVL486:
-.LBB213:
-.LBB214:
+.LBB215:
+.LBB216:
 	.loc 2 2525 0
 	ldr	r2, .L310
 	movs	r1, #0
@@ -4676,8 +4676,8 @@ free_data_superblock:
 	bl	INSERT_FREE_LIST
 .LVL487:
 .L309:
-.LBE214:
-.LBE213:
+.LBE216:
+.LBE215:
 	.loc 2 2528 0
 	movs	r0, #0
 	pop	{r3, pc}
@@ -4867,7 +4867,7 @@ get_new_active_ppa:
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
 .LFB306:
-	.file 5 "drivers/rkflash/sftl_gc.c"
+	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
 	.loc 5 22 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
@@ -5541,8 +5541,8 @@ FtlGcReFreshBadBlk:
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-.LBB217:
-.LBB218:
+.LBB219:
+.LBB220:
 	.loc 5 383 0
 	ldr	r3, .L383+12
 	ldrh	r2, [r4]
@@ -5556,8 +5556,8 @@ FtlGcReFreshBadBlk:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 .L378:
-.LBE218:
-.LBE217:
+.LBE220:
+.LBE219:
 	.loc 5 387 0
 	movs	r0, #0
 	pop	{r4, pc}
@@ -5571,6 +5571,33 @@ FtlGcReFreshBadBlk:
 	.cfi_endproc
 .LFE319:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+.LFB340:
+	.loc 1 24 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL549:
+.LBB221:
+.LBB222:
+	.file 6 "include/linux/compat.h"
+	.loc 6 80 0
+	b	free
+.LVL550:
+.LBE222:
+.LBE221:
+	.cfi_endproc
+.LFE340:
+	.size	ftl_free, .-ftl_free
 	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
 	.global	ftl_malloc
@@ -5580,19 +5607,19 @@ FtlGcReFreshBadBlk:
 	.fpu softvfp
 	.type	ftl_malloc, %function
 ftl_malloc:
-.LFB340:
-	.loc 1 24 0
+.LFB341:
+	.loc 1 28 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL549:
-	.loc 1 25 0
+.LVL551:
+	.loc 1 29 0
 	movs	r1, #0
 	b	kmalloc
-.LVL550:
+.LVL552:
 	.cfi_endproc
-.LFE340:
+.LFE341:
 	.size	ftl_malloc, .-ftl_malloc
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -5603,12 +5630,12 @@ ftl_malloc:
 	.fpu softvfp
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB341:
-	.loc 1 29 0
+.LFB342:
+	.loc 1 33 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL551:
+.LVL553:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -5619,26 +5646,26 @@ rknand_print_hex:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 1 36 0
+	.loc 1 40 0
 	movs	r6, #0
-	.loc 1 29 0
+	.loc 1 33 0
 	mov	fp, r0
 	mov	r7, r1
-.LVL552:
+.LVL554:
 	mov	r8, r2
 	mov	r10, r3
-	.loc 1 35 0
+	.loc 1 39 0
 	mov	r5, r6
-	.loc 1 36 0
+	.loc 1 40 0
 	mov	r4, r6
-.LVL553:
-.L387:
-	.loc 1 36 0 is_stmt 0 discriminator 1
+.LVL555:
+.L388:
+	.loc 1 40 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
-	bcc	.L393
-	.loc 1 51 0 is_stmt 1
-	ldr	r0, .L396
-	.loc 1 52 0
+	bcc	.L394
+	.loc 1 55 0 is_stmt 1
+	ldr	r0, .L397
+	.loc 1 56 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_remember_state
 	.cfi_restore 14
@@ -5650,73 +5677,73 @@ rknand_print_hex:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL554:
-	.loc 1 51 0
+.LVL556:
+	.loc 1 55 0
 	b	printf
-.LVL555:
-.L393:
+.LVL557:
+.L394:
 	.cfi_restore_state
-	.loc 1 37 0
-	cbnz	r5, .L388
-	.loc 1 38 0
+	.loc 1 41 0
+	cbnz	r5, .L389
+	.loc 1 42 0
 	mov	r2, r6
 	mov	r1, fp
-	ldr	r0, .L396+4
+	ldr	r0, .L397+4
 	bl	printf
-.LVL556:
-.L388:
-	.loc 1 40 0
+.LVL558:
+.L389:
+	.loc 1 44 0
 	cmp	r8, #4
-	bne	.L389
-	.loc 1 41 0
+	bne	.L390
+	.loc 1 45 0
 	ldr	r1, [r7, r4, lsl #2]
+.L396:
+	.loc 1 47 0
+	ldr	r0, .L397+8
 .L395:
-	.loc 1 43 0
-	ldr	r0, .L396+8
-.L394:
-	.loc 1 46 0
+	.loc 1 50 0
 	adds	r5, r5, #1
-.LVL557:
-	.loc 1 45 0
+.LVL559:
+	.loc 1 49 0
 	bl	printf
-.LVL558:
-	.loc 1 46 0
+.LVL560:
+	.loc 1 50 0
 	cmp	r5, #15
-	bls	.L392
-.LVL559:
-	.loc 1 47 0
+	bls	.L393
+.LVL561:
+	.loc 1 51 0
 	movs	r5, #0
-	.loc 1 48 0
-	ldr	r0, .L396
+	.loc 1 52 0
+	ldr	r0, .L397
 	bl	printf
-.LVL560:
-.L392:
-	.loc 1 36 0 discriminator 2
+.LVL562:
+.L393:
+	.loc 1 40 0 discriminator 2
 	adds	r4, r4, #1
-.LVL561:
+.LVL563:
 	add	r6, r6, r8
-	b	.L387
-.L389:
-	.loc 1 42 0
+	b	.L388
+.L390:
+	.loc 1 46 0
 	cmp	r8, #2
-	bne	.L391
-	.loc 1 43 0
+	bne	.L392
+	.loc 1 47 0
 	ldrsh	r1, [r7, r4, lsl #1]
-	b	.L395
-.L391:
-	.loc 1 45 0
+	b	.L396
+.L392:
+	.loc 1 49 0
 	ldrb	r1, [r7, r4]	@ zero_extendqisi2
-	ldr	r0, .L396+12
-	b	.L394
-.L397:
+	ldr	r0, .L397+12
+	b	.L395
+.L398:
 	.align	2
-.L396:
+.L397:
 	.word	.LC78
 	.word	.LC75
 	.word	.LC76
 	.word	.LC77
 	.cfi_endproc
-.LFE341:
+.LFE342:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
@@ -5727,12 +5754,12 @@ rknand_print_hex:
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB343:
-	.loc 1 81 0
+.LFB344:
+	.loc 1 85 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL562:
+.LVL564:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -5743,75 +5770,75 @@ FlashReadPages:
 	.cfi_offset 10, -12
 	.cfi_offset 11, -8
 	.cfi_offset 14, -4
-	.loc 1 81 0
+	.loc 1 85 0
 	mov	r8, r1
-	.loc 1 83 0
-	ldr	r3, .L416
-	mov	r4, r0
 	.loc 1 87 0
+	ldr	r3, .L417
+	mov	r4, r0
+	.loc 1 91 0
 	movs	r5, #0
-	.loc 1 88 0
-	ldr	fp, .L416+12
-	.loc 1 83 0
+	.loc 1 92 0
+	ldr	fp, .L417+12
+	.loc 1 87 0
 	ldrh	r2, [r3, #12]
-.LVL563:
+.LVL565:
 	mov	r10, r3
 	str	r2, [sp, #4]
-.LVL564:
-.L399:
-	.loc 1 87 0 discriminator 1
+.LVL566:
+.L400:
+	.loc 1 91 0 discriminator 1
 	cmp	r5, r8
-	bne	.L406
-	.loc 1 108 0
+	bne	.L407
+	.loc 1 112 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL565:
-.L406:
+.LVL567:
+.L407:
 	.cfi_restore_state
-	.loc 1 88 0
+	.loc 1 92 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L400
-	.loc 1 88 0 is_stmt 0 discriminator 2
+	cbz	r3, .L401
+	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	r3, [r4, #12]
-	cbnz	r3, .L401
-.L400:
-	.loc 1 88 0 discriminator 3
-	movs	r2, #88
-	ldr	r1, .L416+4
+	cbnz	r3, .L402
+.L401:
+	.loc 1 92 0 discriminator 3
+	movs	r2, #92
+	ldr	r1, .L417+4
 	mov	r0, fp
 	bl	printf
-.LVL566:
-.L401:
-	.loc 1 90 0 is_stmt 1
-	ldr	r6, .L416+8
-	.loc 1 89 0
+.LVL568:
+.L402:
+	.loc 1 94 0 is_stmt 1
+	ldr	r6, .L417+8
+	.loc 1 93 0
 	add	r2, sp, #8
 	add	r1, sp, #12
 	ldr	r0, [r4, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL567:
-	.loc 1 90 0
+.LVL569:
+	.loc 1 94 0
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	ldr	r7, [r6, #12]
 	blx	r7
-.LVL568:
-	.loc 1 95 0
+.LVL570:
+	.loc 1 99 0
 	ldrh	r3, [r10, #14]
-	.loc 1 94 0
+	.loc 1 98 0
 	str	r0, [r4]
-	.loc 1 95 0
+	.loc 1 99 0
 	cmp	r3, #4
-	bne	.L403
-	.loc 1 96 0
+	bne	.L404
+	.loc 1 100 0
 	ldr	r0, [sp, #4]
-.LVL569:
+.LVL571:
 	ldr	r3, [r4, #12]
 	ldr	r2, [r4, #8]
 	ldr	r1, [sp, #12]
@@ -5821,45 +5848,45 @@ FlashReadPages:
 	add	r1, r1, r0
 	ldrb	r0, [sp, #8]	@ zero_extendqisi2
 	blx	r6
-.LVL570:
-	.loc 1 100 0
+.LVL572:
+	.loc 1 104 0
 	adds	r0, r0, #1
-.LVL571:
-	beq	.L404
-	.loc 1 101 0 discriminator 1
+.LVL573:
+	beq	.L405
+	.loc 1 105 0 discriminator 1
 	ldr	r3, [r4, #12]
-	.loc 1 100 0 discriminator 1
+	.loc 1 104 0 discriminator 1
 	ldr	r2, [r3, #12]
 	adds	r2, r2, #1
-	bne	.L403
-	.loc 1 101 0
+	bne	.L404
+	.loc 1 105 0
 	ldr	r2, [r3, #8]
 	adds	r2, r2, #1
-	bne	.L403
-	.loc 1 102 0
+	bne	.L404
+	.loc 1 106 0
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L403
-.L404:
-	.loc 1 104 0
+	beq	.L404
+.L405:
+	.loc 1 108 0
 	mov	r3, #-1
 	str	r3, [r4]
-.LVL572:
-.L403:
-	.loc 1 87 0 discriminator 2
+.LVL574:
+.L404:
+	.loc 1 91 0 discriminator 2
 	adds	r5, r5, #1
-.LVL573:
+.LVL575:
 	adds	r4, r4, #20
-	b	.L399
-.L417:
+	b	.L400
+.L418:
 	.align	2
-.L416:
+.L417:
 	.word	.LANCHOR0
 	.word	.LANCHOR106
 	.word	.LANCHOR107
 	.word	.LC1
 	.cfi_endproc
-.LFE343:
+.LFE344:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -5876,7 +5903,7 @@ FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 4 286 0
-	ldr	r3, .L428
+	ldr	r3, .L429
 	.loc 4 279 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -5891,54 +5918,54 @@ FtlLoadFactoryBbt:
 	.loc 4 289 0
 	movs	r6, #0
 	.loc 4 286 0
-	ldr	r5, .L428+4
+	ldr	r5, .L429+4
 	ldr	r3, [r3]
-	ldr	r7, .L428+8
+	ldr	r7, .L429+8
 	.loc 4 291 0
-	ldr	r10, .L428+20
+	ldr	r10, .L429+20
 	.loc 4 286 0
 	str	r3, [r5, #8]
 	.loc 4 287 0
-	ldr	r3, .L428+12
+	ldr	r3, .L429+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
-.LVL574:
-.L419:
+.LVL576:
+.L420:
 	.loc 4 289 0 discriminator 1
-	ldr	r3, .L428+16
+	ldr	r3, .L429+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L424
+	bcc	.L425
 	.loc 4 314 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL575:
-.L424:
+.LVL577:
+.L425:
 	.loc 4 291 0
 	ldrh	r4, [r10]
 	.loc 4 290 0
 	movw	r3, #65535
 	.loc 4 294 0
-	ldr	fp, .L428+4
+	ldr	fp, .L429+4
 	.loc 4 290 0
 	strh	r3, [r7, #2]!	@ movhi
 	.loc 4 291 0
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL576:
-.L420:
+.LVL578:
+.L421:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
-	bgt	.L422
-.LVL577:
+	bgt	.L423
+.LVL579:
 	.loc 4 292 0 is_stmt 1
 	mla	r3, r6, r3, r4
-.LVL578:
+.LVL580:
 	.loc 4 294 0
 	movs	r2, #1
-.LVL579:
+.LVL581:
 	mov	r1, r2
 	mov	r0, fp
 	.loc 4 292 0
@@ -5947,33 +5974,33 @@ FtlLoadFactoryBbt:
 	str	r3, [r5, #4]
 	.loc 4 294 0
 	bl	FlashReadPages
-.LVL580:
+.LVL582:
 	.loc 4 295 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L421
+	beq	.L422
 	.loc 4 301 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
-	bne	.L421
+	bne	.L422
 	.loc 4 303 0
 	strh	r4, [r7]	@ movhi
-.L422:
+.L423:
 	.loc 4 289 0 discriminator 2
 	adds	r6, r6, #1
-.LVL581:
-	b	.L419
-.L421:
+.LVL583:
+	b	.L420
+.L422:
 	.loc 4 291 0 discriminator 2
 	subs	r4, r4, #1
-.LVL582:
+.LVL584:
 	uxth	r4, r4
-.LVL583:
-	b	.L420
-.L429:
+.LVL585:
+	b	.L421
+.L430:
 	.align	2
-.L428:
+.L429:
 	.word	.LANCHOR39
 	.word	.LANCHOR108
 	.word	.LANCHOR37+10
@@ -5997,7 +6024,7 @@ FtlGetLastWrittenPage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL584:
+.LVL586:
 	.loc 2 51 0
 	cmp	r1, #1
 	.loc 2 47 0
@@ -6011,7 +6038,7 @@ FtlGetLastWrittenPage:
 	.cfi_offset 14, -4
 	.loc 2 51 0
 	it	eq
-	ldreq	r3, .L439
+	ldreq	r3, .L440
 	.loc 2 47 0
 	sub	sp, sp, #88
 	.cfi_def_cfa_offset 112
@@ -6021,48 +6048,48 @@ FtlGetLastWrittenPage:
 	mov	r2, r1
 	.loc 2 51 0
 	it	ne
-	ldrne	r3, .L439+4
+	ldrne	r3, .L440+4
 	.loc 2 47 0
 	mov	r6, r1
 	.loc 2 58 0
 	add	r0, sp, #4
-.LVL585:
+.LVL587:
 	movs	r1, #1
-.LVL586:
+.LVL588:
 	.loc 2 51 0
 	ldrh	r5, [r3]
-.LVL587:
+.LVL589:
 	.loc 2 53 0
-	ldr	r3, .L439+8
+	ldr	r3, .L440+8
 	.loc 2 56 0
 	subs	r5, r5, #1
-.LVL588:
+.LVL590:
 	sxth	r5, r5
-.LVL589:
+.LVL591:
 	.loc 2 53 0
 	str	r3, [sp, #12]
 	.loc 2 54 0
 	add	r3, sp, #24
 	str	r3, [sp, #16]
-.LVL590:
+.LVL592:
 	.loc 2 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
 	.loc 2 58 0
 	bl	FlashReadPages
-.LVL591:
+.LVL593:
 	.loc 2 59 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L433
+	bne	.L434
 	mov	r8, #0
-.LVL592:
-.L434:
+.LVL594:
+.L435:
 	.loc 2 60 0
 	cmp	r8, r5
-	ble	.L437
-.LVL593:
-.L433:
+	ble	.L438
+.LVL595:
+.L434:
 	.loc 2 73 0
 	mov	r0, r5
 	add	sp, sp, #88
@@ -6070,8 +6097,8 @@ FtlGetLastWrittenPage:
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL594:
-.L437:
+.LVL596:
+.L438:
 	.cfi_restore_state
 	.loc 2 61 0
 	add	r3, r8, r5
@@ -6084,39 +6111,39 @@ FtlGetLastWrittenPage:
 	add	r0, sp, #4
 	.loc 2 61 0
 	asrs	r4, r3, #1
-.LVL595:
+.LVL597:
 	.loc 2 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
 	.loc 2 63 0
 	bl	FlashReadPages
-.LVL596:
+.LVL598:
 	.loc 2 65 0
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	bne	.L435
+	bne	.L436
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	bne	.L435
+	bne	.L436
 	.loc 2 66 0 is_stmt 1
 	subs	r4, r4, #1
-.LVL597:
-	sxth	r5, r4
-.LVL598:
-	b	.L434
 .LVL599:
-.L435:
+	sxth	r5, r4
+.LVL600:
+	b	.L435
+.LVL601:
+.L436:
 	.loc 2 68 0
 	adds	r4, r4, #1
-.LVL600:
+.LVL602:
 	sxth	r8, r4
-.LVL601:
-	b	.L434
-.L440:
+.LVL603:
+	b	.L435
+.L441:
 	.align	2
-.L439:
+.L440:
 	.word	.LANCHOR20
 	.word	.LANCHOR19
 	.word	ftl_temp_buf
@@ -6132,12 +6159,12 @@ FtlGetLastWrittenPage:
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB344:
-	.loc 1 111 0
+.LFB345:
+	.loc 1 115 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL602:
+.LVL604:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -32
@@ -6150,84 +6177,84 @@ FlashProgPages:
 	.cfi_offset 14, -4
 	sub	sp, sp, #40
 	.cfi_def_cfa_offset 72
-	.loc 1 111 0
+	.loc 1 115 0
 	str	r3, [sp]
 	mov	r10, r1
 	mov	r7, r2
 	mov	r4, r0
-	.loc 1 113 0
-	ldr	r3, .L471
-.LVL603:
 	.loc 1 117 0
+	ldr	r3, .L472
+.LVL605:
+	.loc 1 121 0
 	mov	r5, r0
 	movs	r6, #0
-	.loc 1 113 0
+	.loc 1 117 0
 	ldrh	r8, [r3, #12]
-.LVL604:
+.LVL606:
 	str	r3, [sp, #4]
-.LVL605:
-.L442:
-	.loc 1 117 0 discriminator 1
+.LVL607:
+.L443:
+	.loc 1 121 0 discriminator 1
 	cmp	r6, r10
-	bne	.L450
-	.loc 1 138 0
+	bne	.L451
+	.loc 1 142 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	bne	.L457
-.LVL606:
-.L470:
-	.loc 1 168 0
+	bne	.L458
+.LVL608:
+.L471:
+	.loc 1 172 0
 	movs	r0, #0
 	add	sp, sp, #40
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL607:
+.LVL609:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL608:
-.L450:
+.LVL610:
+.L451:
 	.cfi_restore_state
-	.loc 1 118 0
+	.loc 1 122 0
 	ldr	r3, [r5, #8]
-	cbz	r3, .L443
-	.loc 1 118 0 is_stmt 0 discriminator 2
+	cbz	r3, .L444
+	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	r3, [r5, #12]
-	cbnz	r3, .L444
-.L443:
-	.loc 1 118 0 discriminator 3
-	movs	r2, #118
-	ldr	r1, .L471+4
-	ldr	r0, .L471+8
-	bl	printf
-.LVL609:
+	cbnz	r3, .L445
 .L444:
-	.loc 1 119 0 is_stmt 1
+	.loc 1 122 0 discriminator 3
+	movs	r2, #122
+	ldr	r1, .L472+4
+	ldr	r0, .L472+8
+	bl	printf
+.LVL611:
+.L445:
+	.loc 1 123 0 is_stmt 1
 	add	r2, sp, #12
 	add	r1, sp, #16
 	ldr	r0, [r5, #4]
 	bl	l2p_addr_tran.isra.0
-.LVL610:
-	.loc 1 120 0
-	ldr	r3, .L471+12
+.LVL612:
+	.loc 1 124 0
+	ldr	r3, .L472+12
 	ldr	r2, [r5, #8]
 	ldr	r1, [sp, #16]
 	ldr	fp, [r3, #8]
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
 	ldr	r3, [r5, #12]
 	blx	fp
-.LVL611:
-	.loc 1 125 0
-	cbnz	r0, .L445
-	.loc 1 124 0
-	str	r0, [r5]
-.L446:
+.LVL613:
+	.loc 1 129 0
+	cbnz	r0, .L446
 	.loc 1 128 0
+	str	r0, [r5]
+.L447:
+	.loc 1 132 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L448
-	.loc 1 129 0
-	ldr	r1, .L471+12
+	bne	.L449
+	.loc 1 133 0
+	ldr	r1, .L472+12
 	ldr	r3, [r5, #12]
 	ldr	r2, [r5, #8]
 	ldr	fp, [r1, #8]
@@ -6235,123 +6262,123 @@ FlashProgPages:
 	adds	r3, r3, #8
 	add	r2, r2, #2048
 	ldrb	r0, [sp, #12]	@ zero_extendqisi2
-.LVL612:
+.LVL614:
 	add	r1, r1, r8
 	blx	fp
-.LVL613:
-	.loc 1 133 0
-	cbz	r0, .L448
-	.loc 1 134 0
+.LVL615:
+	.loc 1 137 0
+	cbz	r0, .L449
+	.loc 1 138 0
 	mov	r3, #-1
 	str	r3, [r5]
-.L448:
-	.loc 1 117 0 discriminator 2
+.L449:
+	.loc 1 121 0 discriminator 2
 	adds	r6, r6, #1
-.LVL614:
+.LVL616:
 	adds	r5, r5, #20
-	b	.L442
-.L445:
-	.loc 1 126 0
+	b	.L443
+.L446:
+	.loc 1 130 0
 	mov	r3, #-1
 	str	r3, [r5]
-	b	.L446
-.LVL615:
-.L455:
-.LBB219:
-	.loc 1 143 0
+	b	.L447
+.LVL617:
+.L456:
+.LBB223:
+	.loc 1 147 0
 	movs	r3, #0
-	.loc 1 149 0
+	.loc 1 153 0
 	mov	r2, r7
-	.loc 1 143 0
+	.loc 1 147 0
 	str	r3, [r8]
-	.loc 1 149 0
+	.loc 1 153 0
 	movs	r1, #1
-	.loc 1 144 0
+	.loc 1 148 0
 	str	r3, [r10]
-	.loc 1 149 0
+	.loc 1 153 0
 	add	r0, sp, #20
-	.loc 1 145 0
+	.loc 1 149 0
 	ldr	r3, [r4, #4]
-	.loc 1 146 0
+	.loc 1 150 0
 	str	r8, [sp, #28]
-	.loc 1 147 0
+	.loc 1 151 0
 	str	r10, [sp, #32]
-	.loc 1 145 0
-	str	r3, [sp, #24]
 	.loc 1 149 0
+	str	r3, [sp, #24]
+	.loc 1 153 0
 	bl	FlashReadPages
-.LVL616:
-	.loc 1 150 0
+.LVL618:
+	.loc 1 154 0
 	ldr	fp, [sp, #20]
 	cmp	fp, #-1
-	bne	.L452
-	.loc 1 151 0
+	bne	.L453
+	.loc 1 155 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L471+16
+	ldr	r0, .L472+16
 	bl	printf
-.LVL617:
-	.loc 1 152 0
+.LVL619:
+	.loc 1 156 0
 	str	fp, [r4]
-.L452:
-	.loc 1 154 0
+.L453:
+	.loc 1 158 0
 	ldr	r3, [r4, #12]
-	cbz	r3, .L453
-	.loc 1 155 0
+	cbz	r3, .L454
+	.loc 1 159 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	cmp	r2, r3
-	beq	.L453
-	.loc 1 156 0
+	beq	.L454
+	.loc 1 160 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L471+20
+	ldr	r0, .L472+20
 	bl	printf
-.LVL618:
-	.loc 1 157 0
+.LVL620:
+	.loc 1 161 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L453:
-	.loc 1 160 0
+.L454:
+	.loc 1 164 0
 	ldr	r3, [r4, #8]
-	cbz	r3, .L454
-	.loc 1 161 0
+	cbz	r3, .L455
+	.loc 1 165 0
 	ldr	r2, [r3]
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L454
-	.loc 1 162 0
+	beq	.L455
+	.loc 1 166 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L471+24
+	ldr	r0, .L472+24
 	bl	printf
-.LVL619:
-	.loc 1 163 0
+.LVL621:
+	.loc 1 167 0
 	mov	r3, #-1
 	str	r3, [r4]
-.L454:
-.LBE219:
-	.loc 1 140 0 discriminator 2
+.L455:
+.LBE223:
+	.loc 1 144 0 discriminator 2
 	adds	r5, r5, #1
-.LVL620:
-	adds	r4, r4, #20
-.LVL621:
-.L451:
-	.loc 1 140 0 is_stmt 0 discriminator 1
-	cmp	r6, r5
-	bne	.L455
-	b	.L470
 .LVL622:
-.L457:
-	movs	r5, #0
-.LBB220:
-	.loc 1 143 0 is_stmt 1
-	ldr	r8, .L471+28
+	adds	r4, r4, #20
 .LVL623:
-	.loc 1 144 0
-	ldr	r10, .L471+32
+.L452:
+	.loc 1 144 0 is_stmt 0 discriminator 1
+	cmp	r6, r5
+	bne	.L456
+	b	.L471
 .LVL624:
-	b	.L451
-.L472:
+.L458:
+	movs	r5, #0
+.LBB224:
+	.loc 1 147 0 is_stmt 1
+	ldr	r8, .L472+28
+.LVL625:
+	.loc 1 148 0
+	ldr	r10, .L472+32
+.LVL626:
+	b	.L452
+.L473:
 	.align	2
-.L471:
+.L472:
 	.word	.LANCHOR0
 	.word	.LANCHOR110
 	.word	.LC1
@@ -6361,9 +6388,9 @@ FlashProgPages:
 	.word	.LC81
 	.word	check_buf
 	.word	.LANCHOR111
-.LBE220:
+.LBE224:
 	.cfi_endproc
-.LFE344:
+.LFE345:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -6374,12 +6401,12 @@ FlashProgPages:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB345:
-	.loc 1 171 0
+.LFB346:
+	.loc 1 175 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL625:
+.LVL627:
 	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -28
@@ -6389,84 +6416,84 @@ FlashEraseBlocks:
 	.cfi_offset 8, -12
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
-	.loc 1 171 0
+	.loc 1 175 0
 	mov	r7, r2
-	.loc 1 174 0
-	ldr	r5, .L484
+	.loc 1 178 0
+	ldr	r5, .L485
 	adds	r4, r0, #4
-	.loc 1 177 0
+	.loc 1 181 0
 	movs	r6, #0
-	.loc 1 179 0
-	ldr	r10, .L484+4
-	.loc 1 174 0
+	.loc 1 183 0
+	ldr	r10, .L485+4
+	.loc 1 178 0
 	ldrh	r8, [r5, #12]
-.LVL626:
-.L474:
-	.loc 1 177 0 discriminator 1
+.LVL628:
+.L475:
+	.loc 1 181 0 discriminator 1
 	cmp	r6, r7
-	bne	.L480
-	.loc 1 190 0
+	bne	.L481
+	.loc 1 194 0
 	movs	r0, #0
 	add	sp, sp, #12
 	.cfi_remember_state
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL627:
-.L480:
+.LVL629:
+.L481:
 	.cfi_restore_state
-	.loc 1 178 0
+	.loc 1 182 0
 	add	r1, sp, #4
 	mov	r2, sp
 	ldr	r0, [r4]
 	bl	l2p_addr_tran.isra.0
-.LVL628:
-	.loc 1 179 0
+.LVL630:
+	.loc 1 183 0
 	ldr	r3, [r10, #4]
 	ldr	r1, [sp, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
 	blx	r3
-.LVL629:
-	.loc 1 181 0
-	cbnz	r0, .L475
-	.loc 1 180 0
+.LVL631:
+	.loc 1 185 0
+	cbnz	r0, .L476
+	.loc 1 184 0
 	str	r0, [r4, #-4]
-.L476:
-	.loc 1 183 0
+.L477:
+	.loc 1 187 0
 	ldrh	r3, [r5, #14]
 	cmp	r3, #4
-	bne	.L478
-	.loc 1 184 0
+	bne	.L479
+	.loc 1 188 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r10, #4]
 	ldrb	r0, [sp]	@ zero_extendqisi2
-.LVL630:
+.LVL632:
 	add	r1, r1, r8
 	blx	r3
-.LVL631:
-	.loc 1 185 0
-	cbz	r0, .L478
-	.loc 1 186 0
+.LVL633:
+	.loc 1 189 0
+	cbz	r0, .L479
+	.loc 1 190 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-.L478:
-	.loc 1 177 0 discriminator 2
+.L479:
+	.loc 1 181 0 discriminator 2
 	adds	r6, r6, #1
-.LVL632:
+.LVL634:
 	adds	r4, r4, #20
-	b	.L474
-.L475:
-	.loc 1 182 0
+	b	.L475
+.L476:
+	.loc 1 186 0
 	mov	r3, #-1
 	str	r3, [r4, #-4]
-	b	.L476
-.L485:
+	b	.L477
+.L486:
 	.align	2
-.L484:
+.L485:
 	.word	.LANCHOR0
 	.word	.LANCHOR107
 	.cfi_endproc
-.LFE345:
+.LFE346:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -6482,7 +6509,7 @@ FtlFreeSysBlkQueueIn:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL633:
+.LVL635:
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 4, -16
@@ -6491,29 +6518,29 @@ FtlFreeSysBlkQueueIn:
 	.cfi_offset 14, -4
 	.loc 2 98 0
 	mov	r5, r0
-.LBB221:
-.LBB222:
+.LBB225:
+.LBB226:
 	.loc 2 94 0
-	ldr	r4, .L495
-.LBE222:
-.LBE221:
+	ldr	r4, .L496
+.LBE226:
+.LBE225:
 	.loc 2 99 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L486
-.LVL634:
-.LBB223:
+	beq	.L487
+.LVL636:
+.LBB227:
 	.loc 2 101 0
-	cbz	r1, .L488
-.LBB224:
+	cbz	r1, .L489
+.LBB228:
 	.loc 2 102 0
 	bl	P2V_block_in_plane
-.LVL635:
+.LVL637:
 	.loc 2 103 0
-	ldr	r3, .L495+4
+	ldr	r3, .L496+4
 	.loc 2 102 0
 	mov	r6, r0
-.LVL636:
+.LVL638:
 	.loc 2 104 0
 	movs	r2, #1
 	mov	r1, r2
@@ -6523,21 +6550,21 @@ FtlFreeSysBlkQueueIn:
 	str	r3, [r0, #4]
 	.loc 2 104 0
 	bl	FlashEraseBlocks
-.LVL637:
+.LVL639:
 	.loc 2 105 0
-	ldr	r3, .L495+8
+	ldr	r3, .L496+8
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
 	.loc 2 106 0
-	ldr	r2, .L495+12
+	ldr	r2, .L496+12
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.LVL638:
-.L488:
-.LBE224:
+.LVL640:
+.L489:
+.LBE228:
 	.loc 2 108 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
@@ -6552,17 +6579,17 @@ FtlFreeSysBlkQueueIn:
 	strh	r5, [r4, r2, lsl #1]	@ movhi
 	.loc 2 110 0
 	strh	r3, [r4, #4]	@ movhi
-.LVL639:
-.L486:
+.LVL641:
+.L487:
 	pop	{r4, r5, r6, pc}
-.L496:
+.L497:
 	.align	2
-.L495:
+.L496:
 	.word	.LANCHOR38
 	.word	.LANCHOR112
 	.word	.LANCHOR40
 	.word	.LANCHOR76
-.LBE223:
+.LBE227:
 	.cfi_endproc
 .LFE243:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
@@ -6580,9 +6607,9 @@ FtlLowFormatEraseBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL640:
+.LVL642:
 	.loc 3 538 0
-	ldr	r3, .L540
+	ldr	r3, .L541
 	.loc 3 528 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -6597,7 +6624,7 @@ FtlLowFormatEraseBlock:
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
 	.loc 3 540 0
-	ldr	r6, .L540+4
+	ldr	r6, .L541+4
 	.loc 3 539 0
 	mov	fp, #0
 	.loc 3 536 0
@@ -6606,11 +6633,11 @@ FtlLowFormatEraseBlock:
 	mov	r4, fp
 	.loc 3 538 0
 	str	r0, [r3]
-.LVL641:
+.LVL643:
 	.loc 3 540 0
 	mov	r10, #20
 	.loc 3 539 0
-	ldr	r3, .L540+8
+	ldr	r3, .L541+8
 	.loc 3 540 0
 	ldr	r8, [r6]
 	.loc 3 528 0
@@ -6622,26 +6649,26 @@ FtlLowFormatEraseBlock:
 	.loc 3 539 0
 	str	r3, [sp, #8]
 	.loc 3 550 0
-	ldr	r3, .L540+12
+	ldr	r3, .L541+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
 	.loc 3 551 0
-	ldr	r3, .L540+16
+	ldr	r3, .L541+16
 	ldr	r3, [r3]
 	str	r3, [sp, #16]
-	ldr	r3, .L540+20
+	ldr	r3, .L541+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #20]
-.LVL642:
-.L498:
+.LVL644:
+.L499:
 	.loc 3 539 0 discriminator 1
 	ldr	r3, [sp, #8]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L502
+	bhi	.L503
 	.loc 3 559 0
 	cmp	r5, #0
-	beq	.L497
+	beq	.L498
 	.loc 3 562 0
 	mov	r0, r8
 	.loc 3 563 0
@@ -6652,34 +6679,34 @@ FtlLowFormatEraseBlock:
 	mov	r2, r5
 	movs	r1, #0
 	bl	FlashEraseBlocks
-.LVL643:
-.L505:
+.LVL645:
+.L506:
 	.loc 3 563 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
-	bhi	.L507
+	bhi	.L508
 	.loc 3 571 0
 	ldr	r3, [sp]
 	cmp	r3, #0
-	beq	.L523
-.LVL644:
+	beq	.L524
+.LVL646:
 	.loc 3 573 0
-	ldr	r3, .L540+24
+	ldr	r3, .L541+24
 	.loc 3 572 0
 	mov	r8, #1
 	.loc 3 573 0
 	ldrh	r10, [r3]
-.LVL645:
+.LVL647:
 	.loc 3 574 0
 	lsr	r3, r10, #2
 	str	r3, [sp, #12]
-.LVL646:
-.L508:
+.LVL648:
+.L509:
 	movs	r6, #0
-.LVL647:
-.L517:
+.LVL649:
+.L518:
 	.loc 3 578 0
-	ldr	r3, .L540+8
+	ldr	r3, .L541+8
 	mov	fp, #0
 	.loc 3 577 0
 	mov	r5, fp
@@ -6687,88 +6714,88 @@ FtlLowFormatEraseBlock:
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 3 579 0
-	ldr	r3, .L540+4
+	ldr	r3, .L541+4
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
 	.loc 3 587 0
-	ldr	r3, .L540+28
+	ldr	r3, .L541+28
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
 	.loc 3 588 0
-	ldr	r3, .L540+12
+	ldr	r3, .L541+12
 	ldr	r3, [r3]
 	str	r3, [sp, #24]
-	ldr	r3, .L540+20
+	ldr	r3, .L541+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL648:
-.L509:
+.LVL650:
+.L510:
 	.loc 3 578 0 discriminator 1
 	ldr	r3, [sp, #16]
 	uxth	r2, fp
 	cmp	r3, r2
-	bhi	.L512
+	bhi	.L513
 	.loc 3 593 0
-	cbz	r5, .L497
+	cbz	r5, .L498
 	.loc 3 598 0
-	ldr	fp, .L540+4
-.LVL649:
+	ldr	fp, .L541+4
+.LVL651:
 	.loc 3 596 0
 	movs	r3, #1
 	mov	r2, r8
-.LVL650:
+.LVL652:
 	mov	r1, r5
 	ldr	r0, [sp, #8]
 	.loc 3 597 0
 	movs	r7, #0
 	.loc 3 596 0
 	bl	FlashProgPages
-.LVL651:
+.LVL653:
 	.loc 3 598 0
 	movs	r3, #20
-.LVL652:
-.L514:
+.LVL654:
+.L515:
 	.loc 3 597 0 discriminator 1
 	uxth	r2, r7
 	cmp	r5, r2
-	bhi	.L516
+	bhi	.L517
 	.loc 3 604 0
 	ldr	r3, [sp, #12]
 	add	r6, r6, r3
-.LVL653:
+.LVL655:
 	uxth	r6, r6
-.LVL654:
+.LVL656:
 	.loc 3 605 0
 	cmp	r10, r6
-	bhi	.L517
+	bhi	.L518
 	.loc 3 611 0 discriminator 1
-	ldr	r7, .L540+4
-.LVL655:
+	ldr	r7, .L541+4
+.LVL657:
 	movs	r6, #0
-.LVL656:
+.LVL658:
 	mov	r10, #20
-.LVL657:
-.L518:
+.LVL659:
+.L519:
 	.loc 3 610 0 discriminator 1
 	uxth	r3, r6
 	cmp	r5, r3
-	bhi	.L520
+	bhi	.L521
 	.loc 3 615 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #63
-	bls	.L521
+	bls	.L522
 	.loc 3 615 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp]
-	cbz	r3, .L497
-.L521:
+	cbz	r3, .L498
+.L522:
 	.loc 3 616 0 is_stmt 1
-	ldr	r3, .L540+4
+	ldr	r3, .L541+4
 	mov	r2, r5
 	mov	r1, r8
 	ldr	r0, [r3]
 	bl	FlashEraseBlocks
-.LVL658:
-.L497:
+.LVL660:
+.L498:
 	.loc 3 619 0
 	mov	r0, r4
 	add	sp, sp, #32
@@ -6776,8 +6803,8 @@ FtlLowFormatEraseBlock:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL659:
-.L502:
+.LVL661:
+.L503:
 	.cfi_restore_state
 	.loc 3 540 0
 	mul	r2, r10, fp
@@ -6787,27 +6814,27 @@ FtlLowFormatEraseBlock:
 	.loc 3 540 0
 	str	r3, [r8, r2]
 	.loc 3 541 0
-	ldr	r3, .L540+32
+	ldr	r3, .L541+32
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL660:
+.LVL662:
 	.loc 3 543 0
 	ldr	r3, [sp]
 	.loc 3 541 0
 	mov	r7, r0
-.LVL661:
+.LVL663:
 	.loc 3 543 0
-	cbz	r3, .L499
+	cbz	r3, .L500
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL662:
-	cbnz	r0, .L500
-.L499:
+.LVL664:
+	cbnz	r0, .L501
+.L500:
 	.loc 3 548 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL663:
-	cbnz	r0, .L501
+.LVL665:
+	cbnz	r0, .L502
 	.loc 3 549 0
 	mla	r1, r10, r5, r8
 	.loc 3 550 0
@@ -6825,52 +6852,52 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #16]
 	.loc 3 552 0
 	adds	r5, r5, #1
-.LVL664:
+.LVL666:
 	uxth	r5, r5
-.LVL665:
+.LVL667:
 	.loc 3 551 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L500:
-.LVL666:
-	add	fp, fp, #1
-.LVL667:
-	b	.L498
-.LVL668:
 .L501:
-	.loc 3 554 0
-	adds	r4, r4, #1
+.LVL668:
+	add	fp, fp, #1
 .LVL669:
-	uxth	r4, r4
+	b	.L499
 .LVL670:
-	b	.L500
+.L502:
+	.loc 3 554 0
+	adds	r4, r4, #1
 .LVL671:
-.L507:
+	uxth	r4, r4
+.LVL672:
+	b	.L501
+.LVL673:
+.L508:
 	.loc 3 564 0
 	mul	r3, r8, r7
 	ldr	r2, [r6]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	bne	.L506
+	bne	.L507
 	.loc 3 566 0
 	ldr	r0, [r1, #4]
 	.loc 3 565 0
 	adds	r4, r4, #1
-.LVL672:
+.LVL674:
 	uxth	r4, r4
-.LVL673:
+.LVL675:
 	.loc 3 566 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL674:
-.L506:
-	adds	r7, r7, #1
-.LVL675:
-	b	.L505
 .LVL676:
-.L523:
+.L507:
+	adds	r7, r7, #1
+.LVL677:
+	b	.L506
+.LVL678:
+.L524:
 	.loc 3 533 0
 	movs	r3, #6
 	.loc 3 534 0
@@ -6879,9 +6906,9 @@ FtlLowFormatEraseBlock:
 	str	r3, [sp, #12]
 	.loc 3 531 0
 	mov	r10, #1
-	b	.L508
-.LVL677:
-.L512:
+	b	.L509
+.LVL679:
+.L513:
 	.loc 3 579 0
 	movs	r3, #20
 	mul	r2, r3, fp
@@ -6890,28 +6917,28 @@ FtlLowFormatEraseBlock:
 	movs	r3, #0
 	str	r3, [r1, r2]
 	.loc 3 580 0
-	ldr	r3, .L540+32
+	ldr	r3, .L541+32
 	ldr	r1, [sp, #4]
 	ldrb	r0, [r3, fp]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL678:
+.LVL680:
 	.loc 3 581 0
 	ldr	r3, [sp]
 	.loc 3 580 0
 	mov	r7, r0
-.LVL679:
+.LVL681:
 	.loc 3 581 0
-	cbz	r3, .L510
+	cbz	r3, .L511
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL680:
-	cbnz	r0, .L511
-.L510:
+.LVL682:
+	cbnz	r0, .L512
+.L511:
 	.loc 3 585 0
 	mov	r0, r7
 	bl	FtlBbmIsBadBlock
-.LVL681:
-	cbnz	r0, .L511
+.LVL683:
+	cbnz	r0, .L512
 	.loc 3 586 0
 	ldr	r3, [sp, #8]
 	movs	r2, #20
@@ -6929,68 +6956,68 @@ FtlLowFormatEraseBlock:
 	ldr	r3, [sp, #24]
 	.loc 3 589 0
 	adds	r5, r5, #1
-.LVL682:
+.LVL684:
 	uxth	r5, r5
-.LVL683:
+.LVL685:
 	.loc 3 588 0
 	bic	r2, r2, #3
 	add	r2, r2, r3
 	str	r2, [r1, #12]
-.L511:
-.LVL684:
-	add	fp, fp, #1
-.LVL685:
-	b	.L509
+.L512:
 .LVL686:
-.L516:
+	add	fp, fp, #1
+.LVL687:
+	b	.L510
+.LVL688:
+.L517:
 	.loc 3 598 0
 	mul	r2, r3, r7
 	ldr	r1, [fp]
 	adds	r0, r1, r2
 	ldr	r2, [r1, r2]
-	cbz	r2, .L515
+	cbz	r2, .L516
 	.loc 3 600 0
 	ldr	r0, [r0, #4]
 	.loc 3 599 0
 	adds	r4, r4, #1
-.LVL687:
+.LVL689:
 	str	r3, [sp, #8]
 	uxth	r4, r4
-.LVL688:
+.LVL690:
 	.loc 3 600 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-.LVL689:
-	ldr	r3, [sp, #8]
-.L515:
-.LVL690:
-	adds	r7, r7, #1
 .LVL691:
-	b	.L514
+	ldr	r3, [sp, #8]
+.L516:
 .LVL692:
-.L520:
+	adds	r7, r7, #1
+.LVL693:
+	b	.L515
+.LVL694:
+.L521:
 	.loc 3 611 0
 	ldr	r3, [sp]
-	cbz	r3, .L519
+	cbz	r3, .L520
 	.loc 3 611 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r6
 	ldr	r2, [r7]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
-	cbnz	r3, .L519
+	cbnz	r3, .L520
 	.loc 3 612 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.LVL693:
-.L519:
+.LVL695:
+.L520:
 	adds	r6, r6, #1
-.LVL694:
-	b	.L518
-.L541:
+.LVL696:
+	b	.L519
+.L542:
 	.align	2
-.L540:
+.L541:
 	.word	.LANCHOR113
 	.word	.LANCHOR112
 	.word	.LANCHOR3
@@ -7012,18 +7039,18 @@ FtlLowFormatEraseBlock:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB348:
-	.loc 1 238 0
+.LFB349:
+	.loc 1 242 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL695:
-	.loc 1 239 0
+.LVL697:
+	.loc 1 243 0
 	b	memset
-.LVL696:
+.LVL698:
 	.cfi_endproc
-.LFE348:
+.LFE349:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
@@ -7051,114 +7078,114 @@ FtlMemInit:
 	.cfi_offset 14, -4
 	.loc 3 282 0
 	movs	r1, #0
-	ldr	r3, .L644
+	ldr	r3, .L645
 	.loc 3 311 0
 	mov	r8, #12
 	.loc 3 297 0
-	ldr	r2, .L644+4
+	ldr	r2, .L645+4
 	.loc 3 282 0
 	str	r1, [r3]
 	.loc 3 283 0
-	ldr	r3, .L644+8
+	ldr	r3, .L645+8
 	.loc 3 310 0
-	ldr	r4, .L644+12
+	ldr	r4, .L645+12
 	.loc 3 307 0
 	str	r1, [sp, #4]
 	.loc 3 283 0
 	str	r1, [r3]
 	.loc 3 284 0
-	ldr	r3, .L644+16
+	ldr	r3, .L645+16
 	.loc 3 310 0
 	ldrh	r0, [r4]
 	.loc 3 312 0
-	ldr	fp, .L644+288
+	ldr	fp, .L645+288
 	.loc 3 284 0
 	str	r1, [r3]
 	.loc 3 285 0
-	ldr	r3, .L644+20
+	ldr	r3, .L645+20
 	.loc 3 310 0
 	lsls	r0, r0, #1
 	.loc 3 316 0
-	ldr	r10, .L644+292
+	ldr	r10, .L645+292
 	.loc 3 320 0
-	ldr	r5, .L644+24
+	ldr	r5, .L645+24
 	.loc 3 285 0
 	str	r1, [r3]
 	.loc 3 286 0
-	ldr	r3, .L644+28
+	ldr	r3, .L645+28
 	.loc 3 323 0
-	ldr	r7, .L644+32
+	ldr	r7, .L645+32
 	.loc 3 286 0
 	str	r1, [r3]
 	.loc 3 287 0
-	ldr	r3, .L644+36
+	ldr	r3, .L645+36
 	str	r1, [r3]
 	.loc 3 288 0
-	ldr	r3, .L644+40
+	ldr	r3, .L645+40
 	str	r1, [r3]
 	.loc 3 289 0
-	ldr	r3, .L644+44
+	ldr	r3, .L645+44
 	str	r1, [r3]
 	.loc 3 290 0
-	ldr	r3, .L644+48
+	ldr	r3, .L645+48
 	str	r1, [r3]
 	.loc 3 291 0
-	ldr	r3, .L644+52
+	ldr	r3, .L645+52
 	str	r1, [r3]
 	.loc 3 292 0
-	ldr	r3, .L644+56
+	ldr	r3, .L645+56
 	str	r1, [r3]
 	.loc 3 293 0
-	ldr	r3, .L644+60
+	ldr	r3, .L645+60
 	str	r1, [r3]
 	.loc 3 294 0
-	ldr	r3, .L644+64
+	ldr	r3, .L645+64
 	str	r1, [r3]
 	.loc 3 295 0
-	ldr	r3, .L644+68
+	ldr	r3, .L645+68
 	str	r1, [r3]
 	.loc 3 296 0
-	ldr	r3, .L644+72
+	ldr	r3, .L645+72
 	str	r1, [r3]
 	.loc 3 297 0
 	movw	r3, #65535
 	str	r3, [r2]
 	.loc 3 298 0
-	ldr	r2, .L644+76
+	ldr	r2, .L645+76
 	str	r1, [r2]
 	.loc 3 299 0
-	ldr	r2, .L644+80
+	ldr	r2, .L645+80
 	str	r1, [r2]
 	.loc 3 300 0
-	ldr	r2, .L644+84
+	ldr	r2, .L645+84
 	str	r1, [r2]
 	.loc 3 301 0
-	ldr	r2, .L644+88
+	ldr	r2, .L645+88
 	strh	r3, [r2]	@ movhi
 	.loc 3 302 0
-	ldr	r2, .L644+92
+	ldr	r2, .L645+92
 	strh	r3, [r2]	@ movhi
 	.loc 3 303 0
 	movs	r2, #32
-	ldr	r3, .L644+96
+	ldr	r3, .L645+96
 	strh	r2, [r3]	@ movhi
 	.loc 3 304 0
 	movs	r2, #128
-	ldr	r3, .L644+100
+	ldr	r3, .L645+100
 	strh	r2, [r3]	@ movhi
 	.loc 3 305 0
-	ldr	r3, .L644+104
+	ldr	r3, .L645+104
 	strh	r1, [r3]	@ movhi
 	.loc 3 306 0
-	ldr	r3, .L644+108
+	ldr	r3, .L645+108
 	strh	r1, [r3]	@ movhi
 	.loc 3 307 0
-	ldr	r3, .L644+112
+	ldr	r3, .L645+112
 	strh	r1, [r3]	@ movhi
 	.loc 3 310 0
 	bl	ftl_malloc
-.LVL697:
-	ldr	r3, .L644+116
+.LVL699:
+	ldr	r3, .L645+116
 	str	r0, [r3]
 	.loc 3 311 0
 	ldrh	r0, [r4]
@@ -7167,107 +7194,107 @@ FtlMemInit:
 	.loc 3 311 0
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL698:
+.LVL700:
 	.loc 3 312 0
 	ldrh	r2, [fp]
 	.loc 3 311 0
-	ldr	r3, .L644+120
+	ldr	r3, .L645+120
 	.loc 3 312 0
 	muls	r4, r2, r4
-.LVL699:
+.LVL701:
 	.loc 3 311 0
 	str	r0, [r3]
 	.loc 3 313 0
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL700:
-	ldr	r3, .L644+124
+.LVL702:
+	ldr	r3, .L645+124
 	str	r0, [r3]
 	.loc 3 314 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL701:
-	ldr	r3, .L644+128
+.LVL703:
+	ldr	r3, .L645+128
 	str	r0, [r3]
 	.loc 3 315 0
 	mov	r0, r6
 	bl	ftl_malloc
-.LVL702:
-	ldr	r3, .L644+132
+.LVL704:
+	ldr	r3, .L645+132
 	.loc 3 324 0
-	ldr	r6, .L644+136
+	ldr	r6, .L645+136
 	.loc 3 315 0
 	str	r0, [r3]
 	.loc 3 316 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL703:
+.LVL705:
 	str	r0, [r10]
 	.loc 3 317 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL704:
-	ldr	r3, .L644+140
+.LVL706:
+	ldr	r3, .L645+140
 	.loc 3 320 0
 	ldrh	r2, [fp]
 	.loc 3 317 0
 	str	r0, [r3]
 	.loc 3 319 0
-	ldr	r3, .L644+144
+	ldr	r3, .L645+144
 	.loc 3 320 0
 	lsls	r2, r2, #1
 	.loc 3 319 0
 	ldrh	r4, [r3]
-.LVL705:
+.LVL707:
 	.loc 3 320 0
 	adds	r2, r2, #1
 	str	r2, [r5]
 	.loc 3 321 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL706:
-	ldr	r3, .L644+148
+.LVL708:
+	ldr	r3, .L645+148
 	str	r0, [r3]
 	.loc 3 322 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL707:
-	ldr	r3, .L644+152
+.LVL709:
+	ldr	r3, .L645+152
 	str	r0, [r3]
 	.loc 3 323 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL708:
+.LVL710:
 	str	r0, [r7]
 	.loc 3 324 0
 	ldr	r0, [r5]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-.LVL709:
+.LVL711:
 	str	r0, [r6]
 	.loc 3 325 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL710:
-	ldr	r2, .L644+156
+.LVL712:
+	ldr	r2, .L645+156
 	str	r0, [r2]
 	.loc 3 326 0
 	mov	r0, r4
 	bl	ftl_malloc
-.LVL711:
-	ldr	r2, .L644+160
+.LVL713:
+	ldr	r2, .L645+160
 	.loc 3 329 0
-	ldr	r4, .L644+164
-.LVL712:
+	ldr	r4, .L645+164
+.LVL714:
 	.loc 3 326 0
 	str	r0, [r2]
 	.loc 3 327 0
 	ldr	r0, [r5]
 	mul	r0, r8, r0
 	bl	ftl_malloc
-.LVL713:
-	ldr	r2, .L644+168
+.LVL715:
+	ldr	r2, .L645+168
 	.loc 3 329 0
 	ldrh	r3, [fp]
 	.loc 3 327 0
@@ -7275,30 +7302,30 @@ FtlMemInit:
 	.loc 3 329 0
 	ldrh	r2, [r4]
 	mul	fp, r3, r2
-.LVL714:
+.LVL716:
 	.loc 3 330 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL715:
-	ldr	r2, .L644+172
+.LVL717:
+	ldr	r2, .L645+172
 	str	r0, [r2]
 	.loc 3 331 0
 	lsl	r0, fp, #2
 	bl	ftl_malloc
-.LVL716:
-	ldr	r3, .L644+176
+.LVL718:
+	ldr	r3, .L645+176
 	str	r0, [r3]
 	.loc 3 332 0
 	ldrh	r3, [r4]
 	ldr	r0, [r5]
 	.loc 3 335 0
-	ldr	r4, .L644+180
-	ldr	r5, .L644+184
+	ldr	r4, .L645+180
+	ldr	r5, .L645+184
 	.loc 3 332 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
-.LVL717:
-	ldr	r3, .L644+188
+.LVL719:
+	ldr	r3, .L645+188
 	str	r0, [r3]
 	.loc 3 335 0
 	ldrh	r0, [r4]
@@ -7307,13 +7334,13 @@ FtlMemInit:
 	strh	r0, [r5]	@ movhi
 	.loc 3 336 0
 	bl	ftl_malloc
-.LVL718:
-	ldr	r3, .L644+192
+.LVL720:
+	ldr	r3, .L645+192
 	str	r0, [r3]
 	.loc 3 337 0
 	ldrh	r3, [r5]
 	.loc 3 338 0
-	ldr	r0, .L644+196
+	ldr	r0, .L645+196
 	.loc 3 337 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
@@ -7323,55 +7350,55 @@ FtlMemInit:
 	strh	r3, [r5]	@ movhi
 	.loc 3 338 0
 	bl	ftl_malloc
-.LVL719:
+.LVL721:
 	.loc 3 345 0
 	ldrh	fp, [r4]
-.LVL720:
+.LVL722:
 	.loc 3 338 0
-	ldr	r3, .L644+200
+	ldr	r3, .L645+200
 	str	r0, [r3]
 	.loc 3 345 0
 	lsl	fp, fp, #1
 	.loc 3 339 0
-	ldr	r3, .L644+204
+	ldr	r3, .L645+204
 	adds	r0, r0, #32
 	str	r0, [r3]
-.LVL721:
+.LVL723:
 	.loc 3 347 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL722:
-	ldr	r3, .L644+208
+.LVL724:
+	ldr	r3, .L645+208
 	str	r0, [r3]
 	.loc 3 349 0
 	mov	r0, fp
 	bl	ftl_malloc
-.LVL723:
+.LVL725:
 	.loc 3 350 0
-	ldr	fp, .L644+296
-.LVL724:
+	ldr	fp, .L645+296
+.LVL726:
 	.loc 3 349 0
-	ldr	r3, .L644+212
+	ldr	r3, .L645+212
 	str	r0, [r3]
-.LVL725:
+.LVL727:
 	.loc 3 350 0
 	ldr	r3, [fp]
 	lsls	r5, r3, #1
-.LVL726:
+.LVL728:
 	.loc 3 351 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL727:
-	ldr	r2, .L644+216
+.LVL729:
+	ldr	r2, .L645+216
 	str	r0, [r2]
 	.loc 3 352 0
 	mov	r0, r5
 	bl	ftl_malloc
-.LVL728:
-	ldr	r3, .L644+220
+.LVL730:
+	ldr	r3, .L645+220
 	.loc 3 354 0
-	ldr	r5, .L644+224
-.LVL729:
+	ldr	r5, .L645+224
+.LVL731:
 	.loc 3 352 0
 	str	r0, [r3]
 	.loc 3 353 0
@@ -7379,42 +7406,42 @@ FtlMemInit:
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-.LVL730:
-	ldr	r3, .L644+228
+.LVL732:
+	ldr	r3, .L645+228
 	str	r0, [r3]
 	.loc 3 354 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL731:
-	ldr	r2, .L644+232
+.LVL733:
+	ldr	r2, .L645+232
 	str	r0, [r2]
 	.loc 3 355 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-.LVL732:
-	ldr	r2, .L644+236
+.LVL734:
+	ldr	r2, .L645+236
 	str	r0, [r2]
 	.loc 3 356 0
 	ldrh	r0, [r5]
-	ldr	r5, .L644+120
+	ldr	r5, .L645+120
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL733:
-	ldr	r3, .L644+240
+.LVL735:
+	ldr	r3, .L645+240
 	str	r0, [r3]
 	.loc 3 357 0
-	ldr	r3, .L644+244
+	ldr	r3, .L645+244
 	ldrh	r0, [r3]
 	str	r3, [sp]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-.LVL734:
+.LVL736:
 	.loc 3 358 0
 	ldr	r3, [sp]
 	.loc 3 357 0
-	ldr	r2, .L644+248
+	ldr	r2, .L645+248
 	.loc 3 358 0
 	ldr	r1, [sp, #4]
 	.loc 3 357 0
@@ -7423,73 +7450,73 @@ FtlMemInit:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL735:
+.LVL737:
 	.loc 3 360 0
-	ldr	r3, .L644+252
+	ldr	r3, .L645+252
 	ldrh	r0, [r3]
 	.loc 3 361 0
 	lsls	r0, r0, #2
-.LVL736:
+.LVL738:
 	bl	ftl_malloc
-.LVL737:
-	ldr	r3, .L644+256
+.LVL739:
+	ldr	r3, .L645+256
 	str	r0, [r3]
-.LVL738:
+.LVL740:
 	.loc 3 362 0
 	ldr	r0, [fp]
 	.loc 3 364 0
-	ldr	fp, .L644+300
+	ldr	fp, .L645+300
 	.loc 3 363 0
 	lsls	r0, r0, #2
-.LVL739:
+.LVL741:
 	bl	ftl_malloc
-.LVL740:
-	ldr	r3, .L644+260
+.LVL742:
+	ldr	r3, .L645+260
 	str	r0, [r3]
-.LVL741:
+.LVL743:
 	.loc 3 364 0
 	ldrh	r0, [fp]
 	.loc 3 365 0
 	mul	r0, r8, r0
-.LVL742:
+.LVL744:
 	.loc 3 371 0
-	ldr	r8, .L644+304
+	ldr	r8, .L645+304
 	.loc 3 365 0
 	bl	ftl_malloc
-.LVL743:
+.LVL745:
 	.loc 3 366 0
-	ldr	r2, .L644+144
+	ldr	r2, .L645+144
 	.loc 3 365 0
-	ldr	r3, .L644+264
+	ldr	r3, .L645+264
 	str	r0, [r3]
-.LVL744:
+.LVL746:
 	.loc 3 366 0
 	ldrh	r0, [r2]
 	ldrh	r3, [fp]
-	ldr	fp, .L644+132
+	ldr	fp, .L645+132
 	.loc 3 367 0
 	muls	r0, r3, r0
-.LVL745:
+.LVL747:
 	bl	ftl_malloc
-.LVL746:
-	ldr	r3, .L644+268
+.LVL748:
+	ldr	r3, .L645+268
 	str	r0, [r3]
-.LVL747:
+.LVL749:
 	.loc 3 369 0
 	movs	r0, #6
 	.loc 3 368 0
 	ldrh	r3, [r4]
 	.loc 3 370 0
-	ldr	r4, .L644+272
+	ldr	r4, .L645+272
 	.loc 3 369 0
 	muls	r0, r3, r0
-.LVL748:
+.LVL750:
 	bl	ftl_malloc
-.LVL749:
-	ldr	r3, .L644+276
+.LVL751:
+	ldr	r3, .L645+276
 	str	r0, [r3]
 	.loc 3 370 0
-	ldr	r3, .L644+280
+	ldr	r3, .L645+280
 	ldrh	r0, [r3]
 	.loc 3 371 0
 	ldrh	r3, [r8]
@@ -7497,32 +7524,32 @@ FtlMemInit:
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r4]	@ movhi
-.LVL750:
+.LVL752:
 	.loc 3 371 0
 	muls	r0, r3, r0
-.LVL751:
+.LVL753:
 	.loc 3 372 0
 	lsls	r0, r0, #2
-.LVL752:
+.LVL754:
 	bl	ftl_malloc
-.LVL753:
-	ldr	r2, .L644+284
+.LVL755:
+	ldr	r2, .L645+284
 	str	r5, [sp, #4]
-	ldr	r5, .L644+124
+	ldr	r5, .L645+124
 	mov	r1, r2
 	.loc 3 373 0
 	ldrh	r3, [r8]
 	.loc 3 372 0
 	str	r0, [r1, #28]!
-.LVL754:
+.LVL756:
 	.loc 3 374 0
 	ldrh	r0, [r4]
-	ldr	r8, .L644+140
-	ldr	lr, .L644+148
-	b	.L645
-.L646:
+	ldr	r8, .L645+140
+	ldr	lr, .L645+148
+	b	.L646
+.L647:
 	.align	2
-.L644:
+.L645:
 	.word	.LANCHOR71
 	.word	.LANCHOR118
 	.word	.LANCHOR72
@@ -7600,223 +7627,223 @@ FtlMemInit:
 	.word	.LANCHOR30
 	.word	.LANCHOR33
 	.word	.LANCHOR10
-.L645:
-	ldr	ip, .L647+100
+.L646:
+	ldr	ip, .L648+100
 	lsls	r0, r0, #2
 	str	r5, [sp, #8]
-	ldr	r5, .L647
+	ldr	r5, .L648
 	.loc 3 373 0
 	str	r3, [sp]
 	mov	r4, r0
 	movs	r3, #1
 	str	r5, [sp, #12]
-.LVL755:
-.L544:
+.LVL757:
+.L545:
 	.loc 3 373 0 is_stmt 0 discriminator 1
 	ldr	r5, [sp]
 	cmp	r3, r5
-	bcc	.L545
+	bcc	.L546
 	add	r3, r2, r3, lsl #2
-.LVL756:
-	ldr	r1, .L647+4
+.LVL758:
+	ldr	r1, .L648+4
 	.loc 3 379 0 is_stmt 1
 	movs	r0, #0
 	adds	r3, r3, #24
-.L546:
+.L547:
 	.loc 3 377 0 discriminator 1
 	cmp	r1, r3
-	bne	.L547
+	bne	.L548
 	.loc 3 383 0
-	ldr	r3, .L647+8
+	ldr	r3, .L648+8
 	ldr	r3, [r3]
-	cbnz	r3, .L548
-.L550:
+	cbnz	r3, .L549
+.L551:
 	.loc 3 385 0
-	ldr	r1, .L647+12
-	ldr	r0, .L647+16
+	ldr	r1, .L648+12
+	ldr	r0, .L648+16
 	bl	printf
-.LVL757:
+.LVL759:
 	.loc 3 386 0
 	mov	r0, #-1
-.L543:
+.L544:
 	.loc 3 484 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL758:
-.L545:
+.LVL760:
+.L546:
 	.cfi_restore_state
 	.loc 3 374 0 discriminator 3
 	ldr	r5, [r2, #28]
 	.loc 3 373 0 discriminator 3
 	adds	r3, r3, #1
-.LVL759:
+.LVL761:
 	.loc 3 374 0 discriminator 3
 	add	r5, r5, r4
 	add	r4, r4, r0
 	str	r5, [r1, #4]!
-	b	.L544
-.LVL760:
-.L547:
+	b	.L545
+.LVL762:
+.L548:
 	.loc 3 379 0 discriminator 2
 	str	r0, [r3, #4]!
-	b	.L546
-.L548:
+	b	.L547
+.L549:
 	.loc 3 388 0
-	ldr	r3, .L647+20
+	ldr	r3, .L648+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 393 0
-	ldr	r3, .L647+24
+	ldr	r3, .L648+24
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 398 0
-	ldr	r3, .L647+28
+	ldr	r3, .L648+28
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 404 0
-	ldr	r3, .L647+32
+	ldr	r3, .L648+32
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 409 0
-	ldr	r3, .L647+36
+	ldr	r3, .L648+36
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 414 0
-	ldr	r3, .L647+40
+	ldr	r3, .L648+40
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 419 0
 	ldr	r3, [r2, #28]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 425 0
-	ldr	r3, .L647+44
+	ldr	r3, .L648+44
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 430 0
-	ldr	r3, .L647+48
+	ldr	r3, .L648+48
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 430 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 is_stmt 0 discriminator 1
 	ldr	r3, [fp]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 discriminator 2
 	ldr	r3, [r10]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 discriminator 3
 	ldr	r3, [r8]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 435 0 discriminator 4
 	ldr	r3, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 is_stmt 1
 	ldr	r3, [lr]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 is_stmt 0 discriminator 1
 	ldr	r3, [ip]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 discriminator 2
 	ldr	r3, [r7]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 440 0 discriminator 3
 	ldr	r3, [r6]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 441 0 is_stmt 1
-	ldr	r3, .L647+52
+	ldr	r3, .L648+52
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 441 0 is_stmt 0 discriminator 1
-	ldr	r3, .L647+56
+	ldr	r3, .L648+56
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 441 0 discriminator 2
-	ldr	r3, .L647+60
+	ldr	r3, .L648+60
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 446 0 is_stmt 1
-	ldr	r3, .L647+64
+	ldr	r3, .L648+64
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 446 0 is_stmt 0 discriminator 1
-	ldr	r3, .L647+68
+	ldr	r3, .L648+68
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 446 0 discriminator 2
-	ldr	r3, .L647+72
+	ldr	r3, .L648+72
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 452 0 is_stmt 1
-	ldr	r3, .L647+76
+	ldr	r3, .L648+76
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 452 0 is_stmt 0 discriminator 1
-	ldr	r3, .L647+80
+	ldr	r3, .L648+80
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 458 0 is_stmt 1
-	ldr	r3, .L647+84
+	ldr	r3, .L648+84
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 464 0
-	ldr	r3, .L647+88
+	ldr	r3, .L648+88
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 470 0
-	ldr	r3, .L647+92
+	ldr	r3, .L648+92
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 476 0
-	ldr	r3, .L647+96
+	ldr	r3, .L648+96
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L550
+	beq	.L551
 	.loc 3 483 0
 	movs	r0, #0
-	b	.L543
-.L648:
+	b	.L544
+.L649:
 	.align	2
-.L647:
+.L648:
 	.word	.LANCHOR121
 	.word	.LANCHOR37+56
 	.word	.LANCHOR129
@@ -7860,9 +7887,9 @@ FtlBbt2Bitmap:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL761:
+.LVL763:
 	.loc 4 69 0
-	ldr	r3, .L655
+	ldr	r3, .L656
 	.loc 4 66 0
 	push	{r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 24
@@ -7875,7 +7902,7 @@ FtlBbt2Bitmap:
 	.loc 4 66 0
 	mov	r5, r0
 	.loc 4 74 0
-	ldr	r7, .L655+4
+	ldr	r7, .L656+4
 	.loc 4 66 0
 	mov	r6, r1
 	subs	r4, r5, #2
@@ -7883,32 +7910,32 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-.LVL762:
+.LVL764:
 	.loc 4 74 0
-	ldr	r8, .L655+12
+	ldr	r8, .L656+12
 	.loc 4 69 0
 	mov	r0, r6
-.LVL763:
+.LVL765:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.LVL764:
-.L652:
+.LVL766:
+.L653:
 	.loc 4 72 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L649
+	beq	.L650
 	.loc 4 74 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L651
+	bhi	.L652
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	movs	r2, #74
 	mov	r1, r8
-	ldr	r0, .L655+8
+	ldr	r0, .L656+8
 	bl	printf
-.LVL765:
-.L651:
+.LVL767:
+.L652:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
@@ -7922,13 +7949,13 @@ FtlBbt2Bitmap:
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
 	.loc 4 70 0 discriminator 2
-	bne	.L652
-.L649:
+	bne	.L653
+.L650:
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL766:
-.L656:
+.LVL768:
+.L657:
 	.align	2
-.L655:
+.L656:
 	.word	.LANCHOR137
 	.word	.LANCHOR17
 	.word	.LC1
@@ -7952,7 +7979,7 @@ FtlBbtMemInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 4 150 0
-	ldr	r0, .L658
+	ldr	r0, .L659
 	movw	r3, #65535
 	.loc 4 152 0
 	movs	r2, #16
@@ -7965,10 +7992,10 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.LVL767:
-.L659:
+.LVL769:
+.L660:
 	.align	2
-.L658:
+.L659:
 	.word	.LANCHOR37
 	.cfi_endproc
 .LFE230:
@@ -7987,9 +8014,9 @@ FtlFreeSysBlkQueueInit:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL768:
+.LVL770:
 	.loc 2 79 0
-	ldr	r3, .L661
+	ldr	r3, .L662
 	.loc 2 83 0
 	mov	r2, #2048
 	.loc 2 76 0
@@ -8011,15 +8038,15 @@ FtlFreeSysBlkQueueInit:
 	strh	r0, [r3], #8	@ movhi
 	.loc 2 83 0
 	mov	r0, r3
-.LVL769:
+.LVL771:
 	bl	ftl_memset
-.LVL770:
+.LVL772:
 	.loc 2 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L662:
+.L663:
 	.align	2
-.L661:
+.L662:
 	.word	.LANCHOR38
 	.cfi_endproc
 .LFE240:
@@ -8038,9 +8065,9 @@ load_l2p_region:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL771:
+.LVL773:
 	.loc 2 446 0
-	ldr	r3, .L669
+	ldr	r3, .L670
 	.loc 2 442 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
@@ -8059,43 +8086,43 @@ load_l2p_region:
 	ldrh	r2, [r3]
 	str	r3, [sp, #4]
 	cmp	r2, r0
-	bcs	.L664
+	bcs	.L665
 	.loc 2 446 0 is_stmt 0 discriminator 1
 	mov	r2, #446
-	ldr	r1, .L669+4
-.LVL772:
-	ldr	r0, .L669+8
-.LVL773:
-	bl	printf
+	ldr	r1, .L670+4
 .LVL774:
-.L664:
+	ldr	r0, .L670+8
+.LVL775:
+	bl	printf
+.LVL776:
+.L665:
 	.loc 2 447 0 is_stmt 1
-	ldr	fp, .L669+40
+	ldr	fp, .L670+40
 	movs	r4, #12
-	ldr	r7, .L669+12
+	ldr	r7, .L670+12
 	ldr	r3, [fp]
 	ldr	r8, [r3, r5, lsl #2]
-.LVL775:
+.LVL777:
 	.loc 2 449 0
 	cmp	r8, #0
-	bne	.L665
+	bne	.L666
 	.loc 2 450 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	movs	r1, #255
 	adds	r0, r2, r4
-	ldr	r2, .L669+16
+	ldr	r2, .L670+16
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL776:
+.LVL778:
 	.loc 2 451 0
 	ldr	r2, [r7]
 	adds	r1, r2, r4
 	strh	r5, [r2, r4]	@ movhi
 	.loc 2 452 0
 	str	r8, [r1, #4]
-.L666:
+.L667:
 	.loc 2 473 0
 	movs	r0, #0
 	add	sp, sp, #8
@@ -8103,14 +8130,14 @@ load_l2p_region:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL777:
-.L665:
+.LVL779:
+.L666:
 	.cfi_restore_state
 	.loc 2 456 0
 	mul	r4, r4, r10
 	ldr	r2, [r7]
 	.loc 2 455 0
-	ldr	r6, .L669+20
+	ldr	r6, .L670+20
 	.loc 2 456 0
 	add	r2, r2, r4
 	.loc 2 458 0
@@ -8122,54 +8149,54 @@ load_l2p_region:
 	.loc 2 456 0
 	str	r2, [r6, #8]
 	.loc 2 457 0
-	ldr	r2, .L669+24
+	ldr	r2, .L670+24
 	ldr	r2, [r2]
 	str	r2, [r6, #12]
 	.loc 2 458 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL778:
+.LVL780:
 	.loc 2 459 0
 	ldr	r10, [r6, #12]
-.LVL779:
+.LVL781:
 	.loc 2 461 0
 	ldrh	r2, [r10, #8]
 	cmp	r2, r5
-	beq	.L667
+	beq	.L668
 	.loc 2 462 0
 	mov	r2, r8
 	mov	r1, r5
-	ldr	r0, .L669+28
+	ldr	r0, .L670+28
 	bl	printf
-.LVL780:
+.LVL782:
 	.loc 2 463 0
 	movs	r3, #4
 	ldr	r1, [r6, #12]
 	mov	r2, r3
-	ldr	r0, .L669+32
+	ldr	r0, .L670+32
 	bl	rknand_print_hex
-.LVL781:
+.LVL783:
 	.loc 2 464 0
 	ldr	r3, [sp, #4]
 	movs	r2, #4
 	ldr	r1, [fp]
-	ldr	r0, .L669+36
+	ldr	r0, .L670+36
 	ldrh	r3, [r3]
 	bl	rknand_print_hex
-.LVL782:
-.L667:
+.LVL784:
+.L668:
 	.loc 2 467 0
 	ldrh	r3, [r10, #8]
 	cmp	r3, r5
-	beq	.L668
+	beq	.L669
 	.loc 2 467 0 is_stmt 0 discriminator 1
 	movw	r2, #467
-	ldr	r1, .L669+4
-	ldr	r0, .L669+8
+	ldr	r1, .L670+4
+	ldr	r0, .L670+8
 	bl	printf
-.LVL783:
-.L668:
+.LVL785:
+.L669:
 	.loc 2 470 0 is_stmt 1
 	ldr	r3, [r7]
 	movs	r1, #0
@@ -8178,10 +8205,10 @@ load_l2p_region:
 	.loc 2 471 0
 	strh	r5, [r3, r4]	@ movhi
 	.loc 2 472 0
-	b	.L666
-.L670:
+	b	.L667
+.L671:
 	.align	2
-.L669:
+.L670:
 	.word	.LANCHOR32
 	.word	.LANCHOR140
 	.word	.LC1
@@ -8210,7 +8237,7 @@ ftl_free_no_use_map_blk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL784:
+.LVL786:
 	.loc 2 485 0
 	ldrh	r2, [r0, #10]
 	.loc 2 476 0
@@ -8232,45 +8259,45 @@ ftl_free_no_use_map_blk:
 	movs	r1, #0
 	.loc 2 477 0
 	ldr	r10, [r0, #12]
-.LVL785:
+.LVL787:
 	.loc 2 485 0
 	lsls	r2, r2, #1
 	.loc 2 478 0
 	ldr	r6, [r0, #24]
-.LVL786:
+.LVL788:
 	.loc 2 485 0
 	mov	r0, r5
-.LVL787:
+.LVL789:
 	bl	ftl_memset
-.LVL788:
+.LVL790:
 	.loc 2 486 0
 	movs	r3, #0
-.LVL789:
-.L672:
+.LVL791:
+.L673:
 	.loc 2 486 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L676
+	bhi	.L677
 	.loc 2 494 0 is_stmt 1
 	ldrh	r3, [r5]
-.LVL790:
+.LVL792:
 	.loc 2 497 0
 	movs	r6, #0
-.LVL791:
+.LVL793:
 	.loc 2 498 0
-	ldr	r2, .L685
-.LVL792:
+	ldr	r2, .L686
+.LVL794:
 	.loc 2 495 0
 	mov	fp, r6
-.LVL793:
-.L677:
+.LVL795:
+.L678:
 	.loc 2 497 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
-.LVL794:
+.LVL796:
 	cmp	r0, r1
-	bhi	.L681
+	bhi	.L682
 	.loc 2 513 0
 	mov	r0, fp
 	add	sp, sp, #8
@@ -8278,8 +8305,8 @@ ftl_free_no_use_map_blk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL795:
-.L676:
+.LVL797:
+.L677:
 	.cfi_restore_state
 	.loc 2 487 0
 	uxth	r2, r3
@@ -8288,23 +8315,23 @@ ftl_free_no_use_map_blk:
 	movs	r2, #0
 	.loc 2 487 0
 	ubfx	r1, r1, #10, #16
-.LVL796:
-.L673:
+.LVL798:
+.L674:
 	.loc 2 488 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L675
-.LVL797:
-	adds	r3, r3, #1
-.LVL798:
-	b	.L672
+	bhi	.L676
 .LVL799:
-.L675:
+	adds	r3, r3, #1
+.LVL800:
+	b	.L673
+.LVL801:
+.L676:
 	.loc 2 489 0
 	uxth	r0, r2
 	adds	r2, r2, #1
-.LVL800:
+.LVL802:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
 	.loc 2 490 0
@@ -8312,15 +8339,15 @@ ftl_free_no_use_map_blk:
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-.LVL801:
-	b	.L673
-.LVL802:
-.L681:
+.LVL803:
+	b	.L674
+.LVL804:
+.L682:
 	.loc 2 498 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L678
+	bne	.L679
 	.loc 2 498 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
@@ -8328,27 +8355,27 @@ ftl_free_no_use_map_blk:
 	.loc 2 499 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L678:
+.L679:
 	.loc 2 500 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
-.LVL803:
+.LVL805:
 	.loc 2 504 0
 	cmp	r8, #0
-	bne	.L680
+	bne	.L681
 	.loc 2 504 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L680
+	cbz	r0, .L681
 	.loc 2 506 0 is_stmt 1
 	movs	r1, #1
-.LVL804:
+.LVL806:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
-.LVL805:
+.LVL807:
 	.loc 2 507 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
 	.loc 2 508 0
@@ -8357,14 +8384,14 @@ ftl_free_no_use_map_blk:
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.LVL806:
-.L680:
+.LVL808:
+.L681:
 	adds	r6, r6, #1
-.LVL807:
-	b	.L677
-.L686:
+.LVL809:
+	b	.L678
+.L687:
 	.align	2
-.L685:
+.L686:
 	.word	.LANCHOR20
 	.cfi_endproc
 .LFE257:
@@ -8383,7 +8410,7 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL808:
+.LVL810:
 	push	{r3, r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 24
 	.cfi_offset 3, -24
@@ -8399,28 +8426,28 @@ Ftl_write_map_blk_to_last_page:
 	mov	r4, r0
 	.loc 2 586 0
 	ldr	r5, [r0, #12]
-.LVL809:
+.LVL811:
 	.loc 2 591 0
 	cmp	r3, r2
-	bne	.L688
+	bne	.L689
 	.loc 2 592 0
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L689
+	cbz	r3, .L690
 	.loc 2 592 0 is_stmt 0 discriminator 1
 	mov	r2, #592
-	ldr	r1, .L697
-	ldr	r0, .L697+4
-.LVL810:
+	ldr	r1, .L698
+	ldr	r0, .L698+4
+.LVL812:
 	bl	printf
-.LVL811:
-.L689:
+.LVL813:
+.L690:
 	.loc 2 593 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 	.loc 2 594 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL812:
+.LVL814:
 	.loc 2 595 0
 	movs	r3, #0
 	.loc 2 594 0
@@ -8433,40 +8460,40 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-.LVL813:
-.L690:
+.LVL815:
+.L691:
 	.loc 2 628 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.LVL814:
-.L688:
+.LVL816:
+.L689:
 	.loc 2 601 0
 	ldrh	r5, [r5, r3, lsl #1]
-.LVL815:
+.LVL817:
 	.loc 2 612 0
 	movs	r1, #255
 	.loc 2 602 0
 	ldrh	r3, [r0, #2]
-	ldr	r2, .L697+8
+	ldr	r2, .L698+8
 	.loc 2 603 0
-	ldr	r7, .L697+12
+	ldr	r7, .L698+12
 	.loc 2 587 0
 	ldr	r6, [r0, #24]
 	.loc 2 602 0
 	orr	r3, r3, r5, lsl #10
 	.loc 2 603 0
 	ldr	r0, [r7]
-.LVL816:
+.LVL818:
 	.loc 2 602 0
 	str	r3, [r2, #4]
 	.loc 2 604 0
-	ldr	r3, .L697+16
+	ldr	r3, .L698+16
 	.loc 2 603 0
 	str	r0, [r2, #8]
 	.loc 2 604 0
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-.LVL817:
+.LVL819:
 	.loc 2 607 0
 	ldr	r2, [r4, #28]
 	str	r2, [r3, #4]
@@ -8480,12 +8507,12 @@ Ftl_write_map_blk_to_last_page:
 	.loc 2 609 0
 	strh	r2, [r3]	@ movhi
 	.loc 2 612 0
-	ldr	r3, .L697+20
-.LVL818:
+	ldr	r3, .L698+20
+.LVL820:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-.LVL819:
+.LVL821:
 	.loc 2 614 0
 	ldrh	ip, [r4, #6]
 	movs	r3, #0
@@ -8493,22 +8520,22 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r7]
 	.loc 2 613 0
 	mov	r2, r3
-.LVL820:
-.L691:
+.LVL822:
+.L692:
 	.loc 2 614 0 discriminator 1
 	uxth	r0, r3
 	cmp	ip, r0
-	bhi	.L693
+	bhi	.L694
 	.loc 2 621 0
 	movs	r2, #1
-.LVL821:
+.LVL823:
 	movs	r3, #0
-.LVL822:
+.LVL824:
 	mov	r1, r2
-	ldr	r0, .L697+8
-.LVL823:
+	ldr	r0, .L698+8
+.LVL825:
 	bl	FlashProgPages
-.LVL824:
+.LVL826:
 	.loc 2 622 0
 	ldrh	r3, [r4, #2]
 	.loc 2 626 0
@@ -8518,34 +8545,34 @@ Ftl_write_map_blk_to_last_page:
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 626 0
 	bl	ftl_map_blk_gc
-.LVL825:
+.LVL827:
 	.loc 2 627 0
-	b	.L690
-.LVL826:
-.L693:
+	b	.L691
+.LVL828:
+.L694:
 	.loc 2 615 0
 	ldr	r0, [r6, r3, lsl #2]
 	cmp	r5, r0, lsr #10
-	bne	.L692
+	bne	.L693
 	.loc 2 616 0
 	adds	r2, r2, #1
-.LVL827:
+.LVL829:
 	uxth	r2, r2
-.LVL828:
+.LVL830:
 	.loc 2 617 0
 	str	r3, [r1, r2, lsl #3]
 	.loc 2 618 0
 	add	r7, r1, r2, lsl #3
 	ldr	r0, [r6, r3, lsl #2]
 	str	r0, [r7, #4]
-.L692:
-.LVL829:
+.L693:
+.LVL831:
 	adds	r3, r3, #1
-.LVL830:
-	b	.L691
-.L698:
+.LVL832:
+	b	.L692
+.L699:
 	.align	2
-.L697:
+.L698:
 	.word	.LANCHOR141
 	.word	.LC1
 	.word	.LANCHOR108
@@ -8569,7 +8596,7 @@ FtlMapWritePage:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL831:
+.LVL833:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -8583,7 +8610,7 @@ FtlMapWritePage:
 	.loc 2 631 0
 	mov	r4, r0
 	.loc 2 638 0
-	ldr	r8, .L718+28
+	ldr	r8, .L719+28
 	.loc 2 631 0
 	mov	r7, r1
 	.loc 2 634 0
@@ -8591,10 +8618,10 @@ FtlMapWritePage:
 	.loc 2 631 0
 	str	r2, [sp, #4]
 	mov	fp, r8
-.LVL832:
-.L700:
+.LVL834:
+.L701:
 	.loc 2 637 0
-	ldr	r2, .L718
+	ldr	r2, .L719
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
@@ -8603,42 +8630,42 @@ FtlMapWritePage:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L701
+	bge	.L702
 	.loc 2 638 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L702
-.L701:
+	bne	.L703
+.L702:
 	.loc 2 639 0 is_stmt 1
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.LVL833:
-.L702:
+.LVL835:
+.L703:
 	.loc 2 650 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L703
+	cbnz	r3, .L704
 	.loc 2 650 0 is_stmt 0 discriminator 1
 	movw	r2, #650
-	ldr	r1, .L718+4
-	ldr	r0, .L718+8
+	ldr	r1, .L719+4
+	ldr	r0, .L719+8
 	bl	printf
-.LVL834:
-.L703:
+.LVL836:
+.L704:
 	.loc 2 651 0 is_stmt 1
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L704
+	bcc	.L705
 	.loc 2 651 0 is_stmt 0 discriminator 1
 	movw	r2, #651
-	ldr	r1, .L718+4
-	ldr	r0, .L718+8
+	ldr	r1, .L719+4
+	ldr	r0, .L719+8
 	bl	printf
-.LVL835:
-.L704:
+.LVL837:
+.L705:
 	.loc 2 652 0 is_stmt 1
 	ldrh	r2, [r4]
 	.loc 2 658 0
@@ -8646,10 +8673,10 @@ FtlMapWritePage:
 	.loc 2 652 0
 	ldr	r3, [r4, #12]
 	.loc 2 654 0
-	ldr	r5, .L718+12
+	ldr	r5, .L719+12
 	.loc 2 652 0
 	ldrh	r10, [r3, r2, lsl #1]
-.LVL836:
+.LVL838:
 	.loc 2 654 0
 	ldrh	r2, [r4, #2]
 	.loc 2 655 0
@@ -8661,7 +8688,7 @@ FtlMapWritePage:
 	.loc 2 654 0
 	str	r2, [r5, #4]
 	.loc 2 656 0
-	ldr	r2, .L718+16
+	ldr	r2, .L719+16
 	ldr	r0, [r2]
 	.loc 2 658 0
 	movs	r2, #16
@@ -8669,10 +8696,10 @@ FtlMapWritePage:
 	str	r0, [r5, #12]
 	.loc 2 658 0
 	bl	ftl_memset
-.LVL837:
+.LVL839:
 	.loc 2 659 0
 	ldr	r2, [r5, #12]
-.LVL838:
+.LVL840:
 	.loc 2 664 0
 	movs	r3, #1
 	.loc 2 660 0
@@ -8691,10 +8718,10 @@ FtlMapWritePage:
 	strh	r1, [r2]	@ movhi
 	.loc 2 664 0
 	mov	r2, r3
-.LVL839:
+.LVL841:
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL840:
+.LVL842:
 	.loc 2 665 0
 	ldrh	r2, [r4, #2]
 	.loc 2 667 0
@@ -8707,19 +8734,19 @@ FtlMapWritePage:
 	.loc 2 665 0
 	strh	r2, [r4, #2]	@ movhi
 	.loc 2 667 0
-	bne	.L705
+	bne	.L706
 	.loc 2 668 0
 	ldr	r1, [r5, #4]
 	.loc 2 669 0
 	adds	r6, r6, #1
-.LVL841:
+.LVL843:
 	.loc 2 668 0
-	ldr	r0, .L718+20
+	ldr	r0, .L719+20
 	.loc 2 669 0
 	uxth	r6, r6
 	.loc 2 668 0
 	bl	printf
-.LVL842:
+.LVL844:
 	.loc 2 670 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
@@ -8730,26 +8757,26 @@ FtlMapWritePage:
 	strhls	r2, [r4, #2]	@ movhi
 	.loc 2 673 0
 	cmp	r6, #3
-	bls	.L707
+	bls	.L708
 	.loc 2 674 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L718+24
+	ldr	r0, .L719+24
 	bl	printf
-.LVL843:
+.LVL845:
+.L709:
+	b	.L709
 .L708:
-	b	.L708
-.L707:
 	.loc 2 678 0
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	beq	.L700
-.L717:
-	b	.L717
-.L705:
+	beq	.L701
+.L718:
+	b	.L718
+.L706:
 	.loc 2 682 0
 	cmp	r2, #1
-	beq	.L700
+	beq	.L701
 	.loc 2 685 0
 	ldr	r2, [r5, #4]
 	.loc 2 687 0
@@ -8762,10 +8789,10 @@ FtlMapWritePage:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL844:
-.L719:
+.LVL846:
+.L720:
 	.align	2
-.L718:
+.L719:
 	.word	.LANCHOR67
 	.word	.LANCHOR142
 	.word	.LC1
@@ -8791,7 +8818,7 @@ ftl_map_blk_gc:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL845:
+.LVL847:
 	.loc 2 542 0
 	ldr	r3, [r0, #24]
 	.loc 2 537 0
@@ -8809,28 +8836,28 @@ ftl_map_blk_gc:
 	mov	r4, r0
 	.loc 2 541 0
 	ldr	r5, [r0, #12]
-.LVL846:
+.LVL848:
 	.loc 2 542 0
 	str	r3, [sp]
-.LVL847:
+.LVL849:
 	.loc 2 545 0
 	bl	ftl_free_no_use_map_blk
-.LVL848:
+.LVL850:
 	.loc 2 547 0
 	ldrh	r3, [r4, #10]
 	ldrh	r2, [r4, #8]
 	subs	r3, r3, #4
 	cmp	r2, r3
-	blt	.L721
+	blt	.L722
 	.loc 2 548 0
 	uxth	r0, r0
 	ldrh	r7, [r5, r0, lsl #1]
-.LVL849:
+.LVL851:
 	.loc 2 549 0
-	cbz	r7, .L721
+	cbz	r7, .L722
 	.loc 2 549 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
-	cbnz	r3, .L721
+	cbnz	r3, .L722
 	.loc 2 550 0 is_stmt 1
 	movs	r2, #1
 	str	r2, [r4, #32]
@@ -8844,125 +8871,125 @@ ftl_map_blk_gc:
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
 	.loc 2 553 0
-	ldr	r3, .L732
+	ldr	r3, .L733
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L722
+	bcc	.L723
 	.loc 2 554 0
 	mov	r0, r4
-.LVL850:
+.LVL852:
 	bl	ftl_map_blk_alloc_new_blk
-.LVL851:
-.L722:
+.LVL853:
+.L723:
 	.loc 2 558 0 discriminator 1
-	ldr	r5, .L732+4
-.LVL852:
+	ldr	r5, .L733+4
+.LVL854:
 	.loc 2 537 0 discriminator 1
 	movs	r6, #0
 	.loc 2 558 0 discriminator 1
-	ldr	fp, .L732+20
-.L723:
+	ldr	fp, .L733+20
+.L724:
 	.loc 2 556 0 discriminator 1
 	ldrh	r3, [r4, #6]
 	uxth	r10, r6
-.LVL853:
+.LVL855:
 	cmp	r3, r10
-	bhi	.L727
+	bhi	.L728
 	.loc 2 572 0
 	movs	r1, #1
 	mov	r0, r7
 	bl	FtlFreeSysBlkQueueIn
-.LVL854:
+.LVL856:
 	.loc 2 573 0
 	movs	r3, #0
 	str	r3, [r4, #32]
-.LVL855:
-.L721:
+.LVL857:
+.L722:
 	.loc 2 577 0
-	ldr	r3, .L732
+	ldr	r3, .L733
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L728
+	bcc	.L729
 	.loc 2 578 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL856:
-.L728:
+.LVL858:
+.L729:
 	.loc 2 580 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL857:
+.LVL859:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL858:
-.L727:
+.LVL860:
+.L728:
 	.cfi_restore_state
 	.loc 2 557 0
 	ldr	r3, [sp]
 	uxth	r8, r6
 	ldr	r2, [r3, r8, lsl #2]
 	cmp	r7, r2, lsr #10
-	bne	.L724
+	bne	.L725
 	.loc 2 558 0
 	ldr	r3, [fp]
 	.loc 2 560 0
 	str	r2, [r5, #4]
-.LVL859:
+.LVL861:
 	.loc 2 562 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L732+4
+	ldr	r0, .L733+4
 	.loc 2 558 0
 	str	r3, [r5, #8]
 	.loc 2 559 0
-	ldr	r3, .L732+8
+	ldr	r3, .L733+8
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
 	str	r3, [sp, #4]
-.LVL860:
+.LVL862:
 	.loc 2 562 0
 	bl	FlashReadPages
-.LVL861:
+.LVL863:
 	.loc 2 564 0
 	ldr	r3, [sp, #4]
 	ldrh	r3, [r3, #8]
 	cmp	r3, r10
-	beq	.L725
+	beq	.L726
 	.loc 2 564 0 is_stmt 0 discriminator 1
 	mov	r2, #564
-	ldr	r1, .L732+12
-	ldr	r0, .L732+16
+	ldr	r1, .L733+12
+	ldr	r0, .L733+16
 	bl	printf
-.LVL862:
-.L725:
+.LVL864:
+.L726:
 	.loc 2 565 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L726
+	bne	.L727
 	.loc 2 566 0
 	ldr	r2, [sp]
 	movs	r3, #0
 	str	r3, [r2, r8, lsl #2]
-.L724:
-.LVL863:
-	adds	r6, r6, #1
-.LVL864:
-	b	.L723
+.L725:
 .LVL865:
-.L726:
+	adds	r6, r6, #1
+.LVL866:
+	b	.L724
+.LVL867:
+.L727:
 	.loc 2 568 0
 	ldr	r2, [r5, #8]
 	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
-.LVL866:
-	b	.L724
-.L733:
+.LVL868:
+	b	.L725
+.L734:
 	.align	2
-.L732:
+.L733:
 	.word	.LANCHOR20
 	.word	.LANCHOR108
 	.word	.LANCHOR109
@@ -8986,7 +9013,7 @@ flush_l2p_region:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL867:
+.LVL869:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -8995,21 +9022,21 @@ flush_l2p_region:
 	.cfi_offset 14, -4
 	.loc 2 693 0
 	movs	r4, #12
-	ldr	r5, .L735
+	ldr	r5, .L736
 	muls	r4, r0, r4
 	.loc 2 694 0
-	ldr	r0, .L735+4
-.LVL868:
+	ldr	r0, .L736+4
+.LVL870:
 	.loc 2 693 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
-.LVL869:
+.LVL871:
 	.loc 2 694 0
 	ldrh	r1, [r3, r4]
-.LVL870:
+.LVL872:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
-.LVL871:
+.LVL873:
 	.loc 2 695 0
 	ldr	r3, [r5]
 	.loc 2 697 0
@@ -9021,9 +9048,9 @@ flush_l2p_region:
 	str	r3, [r4, #4]
 	.loc 2 697 0
 	pop	{r3, r4, r5, pc}
-.L736:
+.L737:
 	.align	2
-.L735:
+.L736:
 	.word	.LANCHOR56
 	.word	.LANCHOR144
 	.cfi_endproc
@@ -9043,9 +9070,9 @@ log2phys:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL872:
+.LVL874:
 	.loc 2 756 0
-	ldr	r3, .L751
+	ldr	r3, .L752
 	.loc 2 753 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -9070,118 +9097,118 @@ log2phys:
 	.loc 2 757 0
 	lsls	r4, r4, r3
 	.loc 2 759 0
-	ldr	r3, .L751+4
+	ldr	r3, .L752+4
 	.loc 2 757 0
 	subs	r4, r4, #1
 	.loc 2 756 0
 	uxth	r8, r8
-.LVL873:
+.LVL875:
 	.loc 2 757 0
 	ands	r4, r4, r0
 	.loc 2 759 0
 	ldr	r3, [r3]
 	.loc 2 757 0
 	uxth	r4, r4
-.LVL874:
+.LVL876:
 	.loc 2 759 0
 	cmp	r0, r3
-	bcc	.L738
+	bcc	.L739
 	.loc 2 759 0 is_stmt 0 discriminator 1
 	movw	r2, #759
-.LVL875:
-	ldr	r1, .L751+8
-.LVL876:
-	ldr	r0, .L751+12
 .LVL877:
-	bl	printf
+	ldr	r1, .L752+8
 .LVL878:
-.L738:
+	ldr	r0, .L752+12
+.LVL879:
+	bl	printf
+.LVL880:
+.L739:
 	.loc 2 762 0 is_stmt 1
-	ldr	r6, .L751+16
+	ldr	r6, .L752+16
 	mov	fp, #12
 	.loc 2 761 0
-	ldr	r3, .L751+20
+	ldr	r3, .L752+20
 	.loc 2 762 0
 	ldr	r1, [r6]
 	.loc 2 761 0
 	ldrh	r2, [r3]
 	movs	r3, #0
-.LVL879:
-.L739:
+.LVL881:
+.L740:
 	uxth	r5, r3
-.LVL880:
+.LVL882:
 	.loc 2 761 0 is_stmt 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L744
+	bcc	.L745
 	.loc 2 776 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL881:
+.LVL883:
 	.loc 2 777 0
 	mul	fp, fp, r0
 	ldr	r3, [r6]
 	.loc 2 776 0
 	mov	r5, r0
-.LVL882:
+.LVL884:
 	.loc 2 777 0
 	ldrh	r1, [r3, fp]
 	add	r2, r3, fp
 	movw	r3, #65535
 	cmp	r1, r3
-	beq	.L745
+	beq	.L746
 	.loc 2 777 0 is_stmt 0 discriminator 1
 	ldr	r3, [r2, #4]
 	cmp	r3, #0
-	bge	.L745
+	bge	.L746
 	.loc 2 778 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL883:
-.L745:
+.LVL885:
+.L746:
 	.loc 2 781 0
 	mov	r1, r5
 	mov	r0, r8
 	bl	load_l2p_region
-.LVL884:
+.LVL886:
 	.loc 2 782 0
-	b	.L740
-.LVL885:
-.L744:
+	b	.L741
+.LVL887:
+.L745:
 	adds	r3, r3, #1
 	.loc 2 762 0
 	mla	r0, fp, r3, r1
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r8
-	bne	.L739
-.LVL886:
-.L740:
+	bne	.L740
+.LVL888:
+.L741:
 	.loc 2 765 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r3, r3, r5, r2
 	.loc 2 764 0
 	cmp	r10, #0
-	bne	.L741
+	bne	.L742
 	.loc 2 765 0
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r4, lsl #2]
 	str	r3, [r7]
-.L742:
+.L743:
 	.loc 2 771 0
 	ldr	r2, [r6]
 	movs	r3, #12
 	mla	r5, r3, r5, r2
-.LVL887:
+.LVL889:
 	ldr	r3, [r5, #4]
 	adds	r2, r3, #1
-	beq	.L748
+	beq	.L749
 	.loc 2 772 0
 	adds	r3, r3, #1
 	str	r3, [r5, #4]
-.L748:
+.L749:
 	.loc 2 783 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL888:
-.L741:
+.LVL890:
+.L742:
 	.loc 2 767 0
 	ldr	r1, [r7]
 	ldr	r2, [r3, #8]
@@ -9191,12 +9218,12 @@ log2phys:
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
 	.loc 2 769 0
-	ldr	r3, .L751+24
+	ldr	r3, .L752+24
 	strh	r8, [r3]	@ movhi
-	b	.L742
-.L752:
+	b	.L743
+.L753:
 	.align	2
-.L751:
+.L752:
 	.word	.LANCHOR22
 	.word	.LANCHOR62
 	.word	.LANCHOR145
@@ -9221,7 +9248,7 @@ FtlReUsePrevPpa:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL889:
+.LVL891:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	.cfi_def_cfa_offset 32
 	.cfi_offset 4, -24
@@ -9233,43 +9260,43 @@ FtlReUsePrevPpa:
 	.loc 2 1628 0
 	mov	r6, r0
 	.loc 2 1631 0
-	ldr	r5, .L763
+	ldr	r5, .L764
 	.loc 2 1629 0
 	ubfx	r0, r1, #10, #16
-.LVL890:
+.LVL892:
 	.loc 2 1628 0
 	str	r1, [sp, #4]
 	.loc 2 1629 0
 	bl	P2V_block_in_plane
-.LVL891:
+.LVL893:
 	.loc 2 1631 0
 	ldr	r2, [r5]
 	.loc 2 1629 0
 	mov	r7, r0
-.LVL892:
+.LVL894:
 	.loc 2 1631 0
 	ldrh	r3, [r2, r0, lsl #1]
-	cbnz	r3, .L754
+	cbnz	r3, .L755
 	.loc 2 1632 0
-	ldr	r2, .L763+4
+	ldr	r2, .L764+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L755
-.LBB225:
+	beq	.L756
+.LBB229:
 	.loc 2 1636 0
-	ldr	r2, .L763+8
+	ldr	r2, .L764+8
 	.loc 2 1644 0
 	movw	lr, #65535
 	.loc 2 1636 0
-	ldr	ip, .L763+24
+	ldr	ip, .L764+24
 	.loc 2 1635 0
-	ldr	r0, .L763+12
-.LVL893:
+	ldr	r0, .L764+12
+.LVL895:
 	.loc 2 1636 0
 	ldr	r2, [r2]
 	.loc 2 1635 0
 	ldrh	r1, [r0]
-.LVL894:
+.LVL896:
 	mov	r8, r0
 	.loc 2 1636 0
 	subs	r4, r4, r2
@@ -9279,30 +9306,30 @@ FtlReUsePrevPpa:
 	mov	ip, #6
 	.loc 2 1636 0
 	uxth	r4, r4
-.LVL895:
-.L756:
+.LVL897:
+.L757:
 	.loc 2 1637 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L755
+	bls	.L756
 	.loc 2 1638 0
 	cmp	r4, r7
-	bne	.L757
+	bne	.L758
 	.loc 2 1639 0
 	mov	r1, r4
-.LVL896:
-	ldr	r0, .L763+4
+.LVL898:
+	ldr	r0, .L764+4
 	bl	List_remove_node
-.LVL897:
+.LVL899:
 	ldrh	r3, [r8]
-	cbnz	r3, .L758
+	cbnz	r3, .L759
 	.loc 2 1639 0 is_stmt 0 discriminator 1
 	movw	r2, #1639
-	ldr	r1, .L763+16
-	ldr	r0, .L763+20
+	ldr	r1, .L764+16
+	ldr	r0, .L764+20
 	bl	printf
-.LVL898:
-.L758:
+.LVL900:
+.L759:
 	.loc 2 1639 0 discriminator 3
 	ldrh	r3, [r8]
 	.loc 2 1640 0 is_stmt 1 discriminator 3
@@ -9312,46 +9339,46 @@ FtlReUsePrevPpa:
 	strh	r3, [r8]	@ movhi
 	.loc 2 1640 0 discriminator 3
 	bl	INSERT_DATA_LIST
-.LVL899:
+.LVL901:
 	.loc 2 1641 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.LVL900:
-.L754:
-.LBE225:
+.LVL902:
+.L755:
+.LBE229:
 	.loc 2 1650 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L755
-.LVL901:
-.L757:
-.LBB226:
+	b	.L756
+.LVL903:
+.L758:
+.LBB230:
 	.loc 2 1644 0
 	mul	r4, ip, r4
-.LVL902:
+.LVL904:
 	adds	r3, r3, #1
-.LVL903:
+.LVL905:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L756
-.LVL904:
-.L755:
-.LBE226:
+	bne	.L757
+.LVL906:
+.L756:
+.LBE230:
 	.loc 2 1652 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
-.LVL905:
+.LVL907:
 	.loc 2 1653 0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL906:
-.L764:
+.LVL908:
+.L765:
 	.align	2
-.L763:
+.L764:
 	.word	.LANCHOR43
 	.word	.LANCHOR47
 	.word	.LANCHOR41
@@ -9386,54 +9413,54 @@ ftl_scan_all_data:
 	.cfi_offset 14, -4
 	.loc 2 2281 0
 	movs	r5, #0
-	ldr	r7, .L779
+	ldr	r7, .L780
 	.loc 2 2275 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 56
 	.loc 2 2280 0
 	movs	r1, #0
 	.loc 2 2284 0
-	ldr	r8, .L779+24
+	ldr	r8, .L780+24
 	.loc 2 2280 0
-	ldr	r0, .L779+4
+	ldr	r0, .L780+4
 	bl	printf
-.LVL907:
-.L766:
+.LVL909:
+.L767:
 	.loc 2 2281 0 discriminator 1
 	ldr	r3, [r7]
 	cmp	r5, r3
-	bcc	.L772
+	bcc	.L773
 	.loc 2 2303 0
 	add	sp, sp, #32
 	.cfi_remember_state
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL908:
-.L772:
+.LVL910:
+.L773:
 	.cfi_restore_state
 	.loc 2 2282 0
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r5
 	bl	log2phys
-.LVL909:
+.LVL911:
 	.loc 2 2283 0
 	ubfx	r3, r5, #0, #11
-	cbnz	r3, .L767
+	cbnz	r3, .L768
 	.loc 2 2284 0
 	ldr	r2, [sp, #28]
 	mov	r1, r5
 	mov	r0, r8
 	bl	printf
-.LVL910:
-.L767:
+.LVL912:
+.L768:
 	.loc 2 2285 0
 	ldr	r3, [sp, #28]
 	adds	r2, r3, #1
-	beq	.L769
+	beq	.L770
 	.loc 2 2286 0
-	ldr	r4, .L779+8
+	ldr	r4, .L780+8
 	.loc 2 2290 0
 	movs	r2, #0
 	.loc 2 2292 0
@@ -9443,7 +9470,7 @@ ftl_scan_all_data:
 	.loc 2 2292 0
 	mov	r0, r4
 	.loc 2 2288 0
-	ldr	r3, .L779+12
+	ldr	r3, .L780+12
 	.loc 2 2287 0
 	str	r5, [r4, #16]
 	.loc 2 2290 0
@@ -9452,29 +9479,29 @@ ftl_scan_all_data:
 	ldr	r3, [r3]
 	str	r3, [r4, #8]
 	.loc 2 2289 0
-	ldr	r3, .L779+16
+	ldr	r3, .L780+16
 	ldr	r6, [r3]
-.LVL911:
+.LVL913:
 	str	r6, [r4, #12]
 	.loc 2 2292 0
 	bl	FlashReadPages
-.LVL912:
+.LVL914:
 	.loc 2 2293 0
 	ldr	r3, [r4]
 	cmp	r3, #256
-	beq	.L770
+	beq	.L771
 	.loc 2 2293 0 is_stmt 0 discriminator 1
 	adds	r3, r3, #1
-	beq	.L770
+	beq	.L771
 	.loc 2 2294 0 is_stmt 1
 	ldr	r3, [r6, #8]
 	cmp	r5, r3
-	beq	.L769
-.L770:
+	beq	.L770
+.L771:
 	.loc 2 2297 0
 	ldr	r2, [r4, #8]
 	ldr	r3, [r4, #12]
-	ldr	r0, .L779+20
+	ldr	r0, .L780+20
 	ldr	r1, [r2, #4]
 	str	r1, [sp, #16]
 	mov	r1, r5
@@ -9489,15 +9516,15 @@ ftl_scan_all_data:
 	ldr	r2, [r4, #4]
 	ldr	r3, [r3]
 	bl	printf
-.LVL913:
-.L769:
+.LVL915:
+.L770:
 	.loc 2 2281 0 discriminator 2
 	adds	r5, r5, #1
-.LVL914:
-	b	.L766
-.L780:
+.LVL916:
+	b	.L767
+.L781:
 	.align	2
-.L779:
+.L780:
 	.word	.LANCHOR62
 	.word	.LC88
 	.word	.LANCHOR108
@@ -9522,9 +9549,9 @@ FtlReadRefresh:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL915:
+.LVL917:
 	.loc 5 425 0
-	ldr	r3, .L794
+	ldr	r3, .L795
 	.loc 5 419 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -9538,28 +9565,28 @@ FtlReadRefresh:
 	.loc 5 425 0
 	ldr	r0, [r3, #80]
 	cmp	r0, #0
-	beq	.L782
+	beq	.L783
 	.loc 5 426 0
-	ldr	r6, .L794+4
+	ldr	r6, .L795+4
 	ldr	r0, [r3, #84]
 	ldr	r1, [r6]
 	cmp	r0, r1
-	bcs	.L783
+	bcs	.L784
 	mov	r5, #2048
-.L788:
-.LVL916:
-.LBB232:
-.LBB233:
+.L789:
+.LVL918:
+.LBB236:
+.LBB237:
 	.loc 5 428 0
 	ldr	r0, [r4, #84]
 	ldr	r3, [r6]
 	cmp	r0, r3
-	bcs	.L785
+	bcs	.L786
 	.loc 5 430 0
 	movs	r2, #0
 	mov	r1, sp
 	bl	log2phys
-.LVL917:
+.LVL919:
 	.loc 5 432 0
 	ldr	r2, [sp]
 	.loc 5 431 0
@@ -9570,14 +9597,14 @@ FtlReadRefresh:
 	add	r3, r3, #1
 	str	r3, [r4, #84]
 	.loc 5 432 0
-	beq	.L786
-.LBB234:
+	beq	.L787
+.LBB238:
 	.loc 5 435 0
 	str	r3, [sp, #20]
 	.loc 5 438 0
 	add	r0, sp, #88
 	.loc 5 436 0
-	ldr	r3, .L794+8
+	ldr	r3, .L795+8
 	.loc 5 439 0
 	movs	r1, #1
 	.loc 5 434 0
@@ -9592,46 +9619,46 @@ FtlReadRefresh:
 	str	r3, [sp, #16]
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL918:
+.LVL920:
 	.loc 5 440 0
 	ldr	r3, [sp, #4]
 	cmp	r3, #256
-	bne	.L785
+	bne	.L786
 	.loc 5 442 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL919:
+.LVL921:
 	bl	FtlGcRefreshBlock
-.LVL920:
-.L785:
-.LBE234:
+.LVL922:
+.L786:
+.LBE238:
 	mov	r0, #-1
-.L781:
-.LBE233:
-.LBE232:
+.L782:
+.LBE237:
+.LBE236:
 	.loc 5 466 0
 	add	sp, sp, #88
 	.cfi_remember_state
 	.cfi_def_cfa_offset 16
 	@ sp needed
 	pop	{r4, r5, r6, pc}
-.LVL921:
-.L786:
+.LVL923:
+.L787:
 	.cfi_restore_state
-.LBB236:
-.LBB235:
+.LBB240:
+.LBB239:
 	.loc 5 427 0
 	subs	r5, r5, #1
-.LVL922:
-	bne	.L788
-	b	.L785
-.LVL923:
-.L783:
-.LBE235:
-.LBE236:
+.LVL924:
+	bne	.L789
+	b	.L786
+.LVL925:
+.L784:
+.LBE239:
+.LBE240:
 	.loc 5 451 0
-	ldr	r2, .L794+12
+	ldr	r2, .L795+12
 	.loc 5 449 0
 	movs	r0, #0
 	str	r0, [r3, #80]
@@ -9640,19 +9667,19 @@ FtlReadRefresh:
 	.loc 5 451 0
 	ldr	r2, [r2]
 	str	r2, [r3, #76]
-	b	.L781
-.L782:
-.LVL924:
-.LBB237:
+	b	.L782
+.L783:
+.LVL926:
+.LBB241:
 	.loc 5 456 0
 	ldr	r1, [r3, #76]
-	ldr	r3, .L794+12
+	ldr	r3, .L795+12
 	ldr	r5, [r3]
 	add	r3, r5, #1048576
 	cmp	r1, r3
-	bhi	.L791
+	bhi	.L792
 	.loc 5 454 0
-	ldr	r3, .L794+16
+	ldr	r3, .L795+16
 	ldr	r2, [r3]
 	mov	r3, #33554432
 	lsrs	r2, r2, #10
@@ -9660,13 +9687,13 @@ FtlReadRefresh:
 	.loc 5 457 0
 	add	r3, r3, r1
 	cmp	r5, r3
-	bhi	.L791
+	bhi	.L792
 	.loc 5 458 0
-	ldr	r3, .L794+20
+	ldr	r3, .L795+20
 	ldrb	r3, [r3, #28]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L781
-.L791:
+	bne	.L782
+.L792:
 	.loc 5 460 0
 	movs	r3, #1
 	.loc 5 461 0
@@ -9677,17 +9704,17 @@ FtlReadRefresh:
 	str	r0, [r4, #84]
 	.loc 5 462 0
 	str	r5, [r4, #76]
-	b	.L781
-.L795:
+	b	.L782
+.L796:
 	.align	2
-.L794:
+.L795:
 	.word	.LANCHOR83
 	.word	.LANCHOR62
 	.word	ftl_temp_buf
 	.word	.LANCHOR63
 	.word	.LANCHOR77
 	.word	.LANCHOR79
-.LBE237:
+.LBE241:
 	.cfi_endproc
 .LFE321:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9705,7 +9732,7 @@ FtlMapBlkWriteDump_data:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL925:
+.LVL927:
 	.loc 2 903 0
 	ldr	r3, [r0, #36]
 	.loc 2 897 0
@@ -9718,7 +9745,7 @@ FtlMapBlkWriteDump_data:
 	.loc 2 897 0
 	mov	r6, r0
 	.loc 2 903 0
-	cbz	r3, .L796
+	cbz	r3, .L797
 	.loc 2 899 0
 	ldrh	r5, [r0, #6]
 	.loc 2 905 0
@@ -9730,19 +9757,19 @@ FtlMapBlkWriteDump_data:
 	.loc 2 899 0
 	subs	r5, r5, #1
 	.loc 2 907 0
-	ldr	r3, .L800
+	ldr	r3, .L801
 	.loc 2 908 0
-	ldr	r1, .L800+4
+	ldr	r1, .L801+4
 	.loc 2 930 0
 	uxth	r5, r5
 	.loc 2 907 0
-	ldr	r4, .L800+8
+	ldr	r4, .L801+8
 	.loc 2 930 0
 	ldr	r2, [r2, r5, lsl #2]
-.LVL926:
+.LVL928:
 	.loc 2 907 0
 	ldr	r0, [r3]
-.LVL927:
+.LVL929:
 	.loc 2 908 0
 	ldr	r1, [r1]
 	.loc 2 931 0
@@ -9752,15 +9779,15 @@ FtlMapBlkWriteDump_data:
 	.loc 2 908 0
 	str	r1, [r4, #12]
 	.loc 2 932 0
-	cbz	r2, .L798
+	cbz	r2, .L799
 	.loc 2 934 0
 	movs	r2, #1
-.LVL928:
+.LVL930:
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL929:
-.L799:
+.LVL931:
+.L800:
 	.loc 2 941 0
 	ldr	r2, [r4, #8]
 	mov	r1, r5
@@ -9773,26 +9800,26 @@ FtlMapBlkWriteDump_data:
 	.cfi_restore 5
 	.cfi_restore 4
 	.cfi_def_cfa_offset 0
-.LVL930:
+.LVL932:
 	.loc 2 941 0
 	b	FtlMapWritePage
-.LVL931:
-.L798:
+.LVL933:
+.L799:
 	.cfi_restore_state
 	.loc 2 938 0
-	ldr	r3, .L800+12
+	ldr	r3, .L801+12
 	movs	r1, #255
 	ldrh	r2, [r3]
-.LVL932:
-	bl	ftl_memset
-.LVL933:
-	b	.L799
 .LVL934:
-.L796:
+	bl	ftl_memset
+.LVL935:
+	b	.L800
+.LVL936:
+.L797:
 	pop	{r4, r5, r6, pc}
-.L801:
+.L802:
 	.align	2
-.L800:
+.L801:
 	.word	.LANCHOR123
 	.word	.LANCHOR109
 	.word	.LANCHOR108
@@ -9827,119 +9854,119 @@ FtlScanSysBlk:
 	.loc 2 1101 0
 	movs	r4, #0
 	.loc 2 1103 0
-	ldr	r5, .L883
+	ldr	r5, .L884
 	.loc 2 1095 0
 	sub	sp, sp, #32
 	.cfi_def_cfa_offset 64
 	.loc 2 1103 0
 	mov	r1, r4
 	.loc 2 1102 0
-	ldr	r3, .L883+4
+	ldr	r3, .L884+4
 	.loc 2 1103 0
 	ldr	r2, [r5]
 	.loc 2 1101 0
-	ldr	r6, .L883+8
+	ldr	r6, .L884+8
 	.loc 2 1102 0
 	strh	r4, [r3]	@ movhi
 	.loc 2 1103 0
-	ldr	r3, .L883+12
+	ldr	r3, .L884+12
 	lsls	r2, r2, #2
 	.loc 2 1101 0
 	strh	r4, [r6]	@ movhi
 	.loc 2 1105 0
-	ldr	r7, .L883+16
+	ldr	r7, .L884+16
 	.loc 2 1103 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL935:
+.LVL937:
 	.loc 2 1104 0
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L883+20
+	ldr	r3, .L884+20
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL936:
+.LVL938:
 	.loc 2 1105 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L883+24
+	ldr	r3, .L884+24
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL937:
+.LVL939:
 	.loc 2 1106 0
 	ldrh	r2, [r7]
 	mov	r1, r4
-	ldr	r3, .L883+28
+	ldr	r3, .L884+28
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL938:
+.LVL940:
 	.loc 2 1107 0
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L883+32
+	ldr	r0, .L884+32
 	bl	ftl_memset
-.LVL939:
+.LVL941:
 	.loc 2 1109 0
-	ldr	r3, .L883+36
+	ldr	r3, .L884+36
 	str	r6, [sp, #12]
 	str	r5, [sp, #16]
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
-.LVL940:
-.L803:
+.LVL942:
+.L804:
 	.loc 2 1109 0 is_stmt 0 discriminator 1
-	ldr	r3, .L883+40
+	ldr	r3, .L884+40
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L844
+	bls	.L845
 	.loc 2 1113 0 is_stmt 1 discriminator 1
-	ldr	r3, .L883+44
+	ldr	r3, .L884+44
 	.loc 2 1120 0 discriminator 1
 	movs	r5, #0
-	ldr	r1, .L883+48
+	ldr	r1, .L884+48
 	mov	fp, r5
 	.loc 2 1118 0 discriminator 1
 	movs	r7, #20
 	.loc 2 1113 0 discriminator 1
 	ldrh	r8, [r3]
 	.loc 2 1118 0 discriminator 1
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	.loc 2 1120 0 discriminator 1
 	ldr	r2, [r1]
-	ldr	r1, .L883+56
+	ldr	r1, .L884+56
 	.loc 2 1118 0 discriminator 1
 	ldr	r6, [r3]
 	.loc 2 1119 0 discriminator 1
-	ldr	r3, .L883+60
+	ldr	r3, .L884+60
 	.loc 2 1120 0 discriminator 1
 	str	r2, [sp, #8]
 	ldrh	r10, [r1]
 	.loc 2 1119 0 discriminator 1
 	ldr	r3, [r3]
 	.loc 2 1115 0 discriminator 1
-	ldr	r2, .L883+64
-	b	.L845
-.LVL941:
-.L805:
+	ldr	r2, .L884+64
+	b	.L846
+.LVL943:
+.L806:
 	.loc 2 1115 0 is_stmt 0
 	ldrb	r0, [r2, r5]	@ zero_extendqisi2
 	ldr	r1, [sp, #4]
 	str	r3, [sp, #28]
 	str	r2, [sp, #24]
 	bl	V2P_block
-.LVL942:
+.LVL944:
 	str	r0, [sp, #20]
-.LVL943:
+.LVL945:
 	.loc 2 1116 0 is_stmt 1
 	bl	FtlBbmIsBadBlock
-.LVL944:
+.LVL946:
 	ldr	r2, [sp, #24]
 	ldr	r3, [sp, #28]
-	cbnz	r0, .L804
+	cbnz	r0, .L805
 	.loc 2 1118 0
 	ldr	r1, [sp, #20]
 	mla	r0, r7, fp, r6
@@ -9959,29 +9986,29 @@ FtlScanSysBlk:
 	.loc 2 1121 0
 	add	r1, fp, #1
 	uxth	fp, r1
-.LVL945:
-.L804:
+.LVL947:
+.L805:
 	adds	r5, r5, #1
-.LVL946:
-.L845:
+.LVL948:
+.L846:
 	.loc 2 1113 0 discriminator 1
 	uxth	r1, r5
 	cmp	r8, r1
-	bhi	.L805
+	bhi	.L806
 	.loc 2 1124 0
 	cmp	fp, #0
-	bne	.L806
-.LVL947:
-.L843:
+	bne	.L807
+.LVL949:
+.L844:
 	.loc 2 1109 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r3, [sp, #4]
-.LVL948:
-	b	.L803
-.LVL949:
-.L806:
+.LVL950:
+	b	.L804
+.LVL951:
+.L807:
 	.loc 2 1128 0
 	movs	r7, #0
 	.loc 2 1127 0
@@ -9989,14 +10016,14 @@ FtlScanSysBlk:
 	mov	r1, fp
 	mov	r0, r6
 	bl	FlashReadPages
-.LVL950:
-.L807:
+.LVL952:
+.L808:
 	.loc 2 1128 0 discriminator 1
 	uxth	r3, r7
 	cmp	fp, r3
-	bls	.L843
+	bls	.L844
 	.loc 2 1129 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	mov	r8, #20
 	mul	r8, r8, r7
 	ldr	r3, [r3]
@@ -10011,14 +10038,14 @@ FtlScanSysBlk:
 	adds	r3, r3, #1
 	.loc 2 1129 0
 	ubfx	r5, r5, #10, #16
-.LVL951:
+.LVL953:
 	.loc 2 1132 0
-	bne	.L810
+	bne	.L811
 	mov	r10, #16
-.L812:
-.LVL952:
+.L813:
+.LVL954:
 	.loc 2 1134 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	.loc 2 1135 0
 	movs	r2, #1
 	mov	r1, r2
@@ -10030,115 +10057,115 @@ FtlScanSysBlk:
 	str	r3, [r0, #4]
 	.loc 2 1135 0
 	bl	FlashReadPages
-.LVL953:
+.LVL955:
 	.loc 2 1136 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
 	.loc 2 1137 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	ldr	r3, [r3]
 	.loc 2 1136 0
-	bne	.L809
+	bne	.L810
 	.loc 2 1137 0
 	mov	r2, #-1
 	str	r2, [r3, r8]
 	.loc 2 1145 0
-	ldr	r3, .L883+52
+	ldr	r3, .L884+52
 	ldr	r3, [r3]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	bne	.L810
-.LVL954:
-.L811:
+	bne	.L811
+.LVL956:
+.L812:
 	.loc 2 1287 0
 	movs	r1, #1
-	b	.L882
-.LVL955:
-.L809:
+	b	.L883
+.LVL957:
+.L810:
 	.loc 2 1139 0
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L810
-.LVL956:
+	bne	.L811
+.LVL958:
 	add	r10, r10, #-1
-.LVL957:
+.LVL959:
 	uxth	r10, r10
 	.loc 2 1133 0 discriminator 2
 	cmp	r10, #0
-	bne	.L812
-	b	.L811
-.L810:
+	bne	.L813
+	b	.L812
+.L811:
 	.loc 2 1147 0
-	ldr	r3, .L883+68
+	ldr	r3, .L884+68
 	ldr	r2, [r3]
 	ldr	r3, [r6, #4]
 	adds	r1, r2, #1
-	beq	.L813
+	beq	.L814
 	.loc 2 1147 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L814
-.L813:
+	bhi	.L815
+.L814:
 	.loc 2 1149 0 is_stmt 1
 	adds	r2, r3, #1
 	.loc 2 1152 0
 	ittt	ne
-	ldrne	r1, .L883+68
+	ldrne	r1, .L884+68
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L814:
+.L815:
 	.loc 2 1157 0
 	ldrh	r2, [r6]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L816
-	bhi	.L817
+	beq	.L817
+	bhi	.L818
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L818
-.L815:
-.LVL958:
-	adds	r7, r7, #1
-.LVL959:
-	b	.L807
+	beq	.L819
+.L816:
 .LVL960:
-.L817:
+	adds	r7, r7, #1
+.LVL961:
+	b	.L808
+.LVL962:
+.L818:
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L819
+	beq	.L820
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L815
+	bne	.L816
 	.loc 2 1280 0
 	movs	r1, #0
-.L882:
+.L883:
 	.loc 2 1287 0
 	mov	r0, r5
 	bl	FtlFreeSysBlkQueueIn
-.LVL961:
-	b	.L815
-.L819:
+.LVL963:
+	b	.L816
+.L820:
 	.loc 2 1162 0
-	ldr	r3, .L883+8
+	ldr	r3, .L884+8
 	ldrh	r2, [r3]
-	ldr	r3, .L883
+	ldr	r3, .L884
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L821
+	bls	.L822
 	.loc 2 1162 0 is_stmt 0 discriminator 1
 	movw	r2, #1162
-	ldr	r1, .L883+72
-	ldr	r0, .L883+76
+	ldr	r1, .L884+72
+	ldr	r0, .L884+76
 	bl	printf
-.LVL962:
-.L821:
+.LVL964:
+.L822:
 	.loc 2 1163 0 is_stmt 1
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r1, [r3]
 	ldrh	r0, [r2]
 	.loc 2 1165 0
-	ldr	r2, .L883+12
+	ldr	r2, .L884+12
 	.loc 2 1163 0
 	uxth	r10, r1
 	.loc 2 1165 0
@@ -10148,48 +10175,48 @@ FtlScanSysBlk:
 	sub	r10, r10, r0
 	add	r10, r10, #-1
 	sxth	r3, r3
-.LVL963:
+.LVL965:
 	sxth	r10, r10
-.L822:
+.L823:
 	.loc 2 1163 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	bgt	.L828
+	bgt	.L829
 	.loc 2 1186 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L860
-	b	.L815
-.L828:
+	bge	.L861
+	b	.L816
+.L829:
 	.loc 2 1165 0
 	ldr	r2, [ip, r3, lsl #2]
 	add	r8, ip, r3, lsl #2
 	ldr	r4, [r6, #4]
 	cmp	r4, r2
-	bls	.L823
+	bls	.L824
 	.loc 2 1167 0
 	ldr	r2, [ip]
-	cbnz	r2, .L824
+	cbnz	r2, .L825
 	.loc 2 1167 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
 	.loc 2 1172 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L883+8
+	ldrne	r2, .L884+8
 	addne	r0, r0, #1
 	strhne	r0, [r2]	@ movhi
-.L824:
+.L825:
 	.loc 2 1178 0 discriminator 1
-	ldr	r2, .L883+20
+	ldr	r2, .L884+20
 	.loc 2 1175 0 discriminator 1
 	uxth	r10, r3
 	.loc 2 1178 0 discriminator 1
 	ldr	r0, [r2]
 	movs	r2, #0
-.L825:
+.L826:
 	.loc 2 1175 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL964:
+.LVL966:
 	cmp	r10, lr
-	bhi	.L826
+	bhi	.L827
 	.loc 2 1180 0
 	ldr	r2, [r6, #4]
 	.loc 2 1186 0
@@ -10199,35 +10226,35 @@ FtlScanSysBlk:
 	.loc 2 1181 0
 	strh	r5, [r0, r3, lsl #1]	@ movhi
 	.loc 2 1186 0
-	blt	.L815
+	blt	.L816
 	.loc 2 1193 0
-	ldr	r2, .L883+8
+	ldr	r2, .L884+8
 	ldrh	r0, [r2]
-	ldr	r2, .L883
+	ldr	r2, .L884
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L815
-.LVL965:
-.L860:
+	bgt	.L816
+.LVL967:
+.L861:
 	.loc 2 1195 0
-	ldr	r2, .L883+8
+	ldr	r2, .L884+8
 	adds	r0, r0, #1
 	strh	r0, [r2]	@ movhi
 	.loc 2 1196 0
 	ldr	r2, [r6, #4]
 	str	r2, [ip, r3, lsl #2]
 	.loc 2 1197 0
-	ldr	r2, .L883+20
-.L880:
+	ldr	r2, .L884+20
+.L881:
 	.loc 2 1241 0
 	ldr	r2, [r2]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L815
-.LVL966:
-.L826:
+	b	.L816
+.LVL968:
+.L827:
 	.loc 2 1177 0 discriminator 3
 	add	lr, ip, r1, lsl #2
 	adds	r2, r2, #1
@@ -10239,17 +10266,17 @@ FtlScanSysBlk:
 	str	r4, [ip, r1, lsl #2]
 	.loc 2 1178 0 discriminator 3
 	strh	lr, [r0, r1, lsl #1]	@ movhi
-.LVL967:
-	b	.L825
-.L823:
+.LVL969:
+	b	.L826
+.L824:
 	subs	r3, r3, #1
-.LVL968:
+.LVL970:
 	sxth	r3, r3
-.LVL969:
-	b	.L822
-.L884:
+.LVL971:
+	b	.L823
+.L885:
 	.align	2
-.L883:
+.L884:
 	.word	.LANCHOR30
 	.word	.LANCHOR35
 	.word	.LANCHOR147
@@ -10270,24 +10297,24 @@ FtlScanSysBlk:
 	.word	.LANCHOR71
 	.word	.LANCHOR148
 	.word	.LC1
-.LVL970:
-.L818:
+.LVL972:
+.L819:
 	.loc 2 1203 0
-	ldr	r8, .L885+12
-	ldr	r10, .L885+20
+	ldr	r8, .L886+12
+	ldr	r10, .L886+20
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bls	.L831
+	bls	.L832
 	.loc 2 1203 0 is_stmt 0 discriminator 1
 	movw	r2, #1203
-	ldr	r1, .L885
-	ldr	r0, .L885+4
+	ldr	r1, .L886
+	ldr	r0, .L886+4
 	bl	printf
-.LVL971:
-.L831:
+.LVL973:
+.L832:
 	.loc 2 1206 0 is_stmt 1
-	ldr	r2, .L885+8
+	ldr	r2, .L886+8
 	.loc 2 1204 0
 	ldrh	lr, [r10]
 	ldrh	ip, [r8]
@@ -10296,63 +10323,63 @@ FtlScanSysBlk:
 	.loc 2 1204 0
 	add	r10, lr, #-1
 	sxth	r3, r10
-.LVL972:
+.LVL974:
 	sub	r10, r10, ip
-.L832:
+.L833:
 	.loc 2 1204 0 is_stmt 0 discriminator 1
 	cmp	r3, r10
-	ble	.L837
+	ble	.L838
 	.loc 2 1206 0 is_stmt 1
 	ldr	r1, [r6, #4]
 	add	r8, r0, r3, lsl #2
 	ldr	r2, [r0, r3, lsl #2]
 	cmp	r1, r2
-	bls	.L833
+	bls	.L834
 	.loc 2 1208 0
 	ldr	r2, [r0]
-	cbnz	r2, .L834
+	cbnz	r2, .L835
 	.loc 2 1208 0 is_stmt 0 discriminator 1
 	cmp	lr, ip
 	.loc 2 1216 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L885+12
+	ldrne	r2, .L886+12
 	addne	ip, ip, #1
 	strhne	ip, [r2]	@ movhi
-.L834:
+.L835:
 	.loc 2 1221 0 discriminator 1
-	ldr	r2, .L885+16
+	ldr	r2, .L886+16
 	.loc 2 1218 0 discriminator 1
 	uxth	r10, r3
 	.loc 2 1221 0 discriminator 1
 	ldr	ip, [r2]
 	movs	r2, #0
-.L835:
+.L836:
 	.loc 2 1218 0 discriminator 1
 	uxth	lr, r2
 	sxth	r1, r2
-.LVL973:
+.LVL975:
 	cmp	r10, lr
-	bhi	.L836
+	bhi	.L837
 	.loc 2 1223 0
 	ldr	r2, [r6, #4]
 	str	r2, [r8]
 	.loc 2 1224 0
 	strh	r5, [ip, r3, lsl #1]	@ movhi
-.LVL974:
-.L837:
+.LVL976:
+.L838:
 	.loc 2 1229 0
 	cmp	r3, #0
-	blt	.L815
+	blt	.L816
 	.loc 2 1237 0
-	ldr	r2, .L885+20
-	ldr	ip, .L885+12
+	ldr	r2, .L886+20
+	ldr	ip, .L886+12
 	ldrh	r2, [r2]
 	ldrh	r1, [ip]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L815
+	bgt	.L816
 	.loc 2 1240 0
 	ldr	r2, [r6, #4]
 	.loc 2 1239 0
@@ -10361,10 +10388,10 @@ FtlScanSysBlk:
 	.loc 2 1240 0
 	str	r2, [r0, r3, lsl #2]
 	.loc 2 1241 0
-	ldr	r2, .L885+16
-	b	.L880
-.LVL975:
-.L836:
+	ldr	r2, .L886+16
+	b	.L881
+.LVL977:
+.L837:
 	.loc 2 1220 0 discriminator 3
 	add	lr, r0, r1, lsl #2
 	adds	r2, r2, #1
@@ -10376,80 +10403,80 @@ FtlScanSysBlk:
 	str	r4, [r0, r1, lsl #2]
 	.loc 2 1221 0 discriminator 3
 	strh	lr, [ip, r1, lsl #1]	@ movhi
-.LVL976:
-	b	.L835
-.L833:
-	subs	r3, r3, #1
-.LVL977:
-	sxth	r3, r3
 .LVL978:
-	b	.L832
+	b	.L836
+.L834:
+	subs	r3, r3, #1
 .LVL979:
-.L816:
+	sxth	r3, r3
+.LVL980:
+	b	.L833
+.LVL981:
+.L817:
 	.loc 2 1248 0
-	ldr	r8, .L885+40
+	ldr	r8, .L886+40
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L839
-.L881:
+	bne	.L840
+.L882:
 	.loc 2 1260 0
 	strh	r5, [r8]	@ movhi
 	.loc 2 1261 0
 	str	r3, [r8, #8]
-	b	.L815
-.L839:
+	b	.L816
+.L840:
 	.loc 2 1255 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L840
+	beq	.L841
 	.loc 2 1256 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.LVL980:
-.L840:
+.LVL982:
+.L841:
 	.loc 2 1257 0
 	ldr	r3, [r6, #4]
 	ldr	r2, [r8, #8]
 	cmp	r2, r3
-	bcs	.L841
+	bcs	.L842
 	.loc 2 1259 0
 	ldrh	r2, [r8]
 	strh	r2, [r8, #4]	@ movhi
-	b	.L881
-.L841:
+	b	.L882
+.L842:
 	.loc 2 1265 0
 	strh	r5, [r8, #4]	@ movhi
-	b	.L815
-.LVL981:
-.L844:
+	b	.L816
+.LVL983:
+.L845:
 	.loc 2 1292 0
-	ldr	r3, .L885+24
+	ldr	r3, .L886+24
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L846
-.L849:
+	cbz	r3, .L847
+.L850:
 	.loc 2 1310 0
-	ldr	r3, .L885+16
+	ldr	r3, .L886+16
 	ldr	r4, [r3]
 	ldrh	r2, [r4]
 	cmp	r2, #0
-	beq	.L847
-.L848:
+	beq	.L848
+.L849:
 	.loc 2 1328 0
-	ldr	r3, .L885+28
+	ldr	r3, .L886+28
 	ldrh	r2, [r3]
-	ldr	r3, .L885+32
+	ldr	r3, .L886+32
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L879
+	bls	.L880
 	.loc 2 1328 0 is_stmt 0 discriminator 1
 	mov	r2, #1328
-	ldr	r1, .L885
-	ldr	r0, .L885+4
+	ldr	r1, .L886
+	ldr	r0, .L886+4
 	bl	printf
-.LVL982:
-.L879:
+.LVL984:
+.L880:
 	.loc 2 1330 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #32
@@ -10457,40 +10484,40 @@ FtlScanSysBlk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL983:
-.L846:
+.LVL985:
+.L847:
 	.cfi_restore_state
 	.loc 2 1292 0 discriminator 1
-	ldr	r1, .L885+28
+	ldr	r1, .L886+28
 	ldrh	r1, [r1]
 	cmp	r1, #0
-	beq	.L849
+	beq	.L850
 	.loc 2 1294 0 discriminator 1
-	ldr	r5, .L885+32
+	ldr	r5, .L886+32
 	ldr	r0, [r5]
-.L850:
+.L851:
 	sxth	r1, r3
-.LVL984:
+.LVL986:
 	cmp	r1, r0
-	bcs	.L849
+	bcs	.L850
 	.loc 2 1296 0
 	ldrh	r4, [r2, r1, lsl #1]
 	adds	r3, r3, #1
 	cmp	r4, #0
-	beq	.L850
+	beq	.L851
 	.loc 2 1301 0
-	ldr	r3, .L885+36
+	ldr	r3, .L886+36
 	.loc 2 1302 0
 	movs	r6, #0
 	.loc 2 1301 0
 	ldr	r0, [r3]
 	mov	r3, r1
-.L851:
-.LVL985:
+.L852:
+.LVL987:
 	.loc 2 1298 0 discriminator 1
 	ldr	r4, [r5]
 	cmp	r3, r4
-	bcs	.L849
+	bcs	.L850
 	.loc 2 1300 0 discriminator 3
 	ldrh	r7, [r2, r3, lsl #1]
 	subs	r4, r3, r1
@@ -10501,43 +10528,43 @@ FtlScanSysBlk:
 	.loc 2 1302 0 discriminator 3
 	strh	r6, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-.LVL986:
-	sxth	r3, r3
-.LVL987:
-	b	.L851
 .LVL988:
-.L847:
+	sxth	r3, r3
+.LVL989:
+	b	.L852
+.LVL990:
+.L848:
 	.loc 2 1310 0 discriminator 1
-	ldr	r3, .L885+12
+	ldr	r3, .L886+12
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L848
+	beq	.L849
 	.loc 2 1312 0 discriminator 1
-	ldr	r5, .L885+20
+	ldr	r5, .L886+20
 	ldrh	r1, [r5]
-.L856:
+.L857:
 	sxth	r3, r2
-.LVL989:
+.LVL991:
 	cmp	r3, r1
 	mov	r6, r3
-	bge	.L848
+	bge	.L849
 	.loc 2 1314 0
 	ldrh	r0, [r4, r3, lsl #1]
 	adds	r2, r2, #1
 	cmp	r0, #0
-	beq	.L856
+	beq	.L857
 	.loc 2 1319 0
-	ldr	r2, .L885+8
+	ldr	r2, .L886+8
 	.loc 2 1320 0
 	movs	r0, #0
 	.loc 2 1319 0
 	ldr	r2, [r2]
-.LVL990:
-.L857:
+.LVL992:
+.L858:
 	.loc 2 1316 0 discriminator 1
 	ldrh	r1, [r5]
 	cmp	r3, r1
-	bge	.L848
+	bge	.L849
 	.loc 2 1318 0 discriminator 3
 	ldrh	r7, [r4, r3, lsl #1]
 	subs	r1, r3, r6
@@ -10549,11 +10576,11 @@ FtlScanSysBlk:
 	.loc 2 1320 0 discriminator 3
 	strh	r0, [r4, r3, lsl #1]	@ movhi
 	sxth	r3, r1
-.LVL991:
-	b	.L857
-.L886:
+.LVL993:
+	b	.L858
+.L887:
 	.align	2
-.L885:
+.L886:
 	.word	.LANCHOR148
 	.word	.LC1
 	.word	.LANCHOR132
@@ -10582,7 +10609,7 @@ FtlMapTblRecovery:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL992:
+.LVL994:
 	.loc 2 1472 0
 	ldr	r3, [r0, #16]
 	.loc 2 1477 0
@@ -10608,7 +10635,7 @@ FtlMapTblRecovery:
 	movs	r6, #0
 	.loc 2 1470 0
 	ldr	r8, [r0, #24]
-.LVL993:
+.LVL995:
 	.loc 2 1472 0
 	str	r3, [sp, #12]
 	.loc 2 1474 0
@@ -10617,20 +10644,20 @@ FtlMapTblRecovery:
 	lsl	r2, fp, #2
 	.loc 2 1471 0
 	ldr	r10, [r0, #12]
-.LVL994:
+.LVL996:
 	.loc 2 1477 0
 	mov	r0, r8
-.LVL995:
+.LVL997:
 	.loc 2 1478 0
-	ldr	r5, .L914
+	ldr	r5, .L915
 	.loc 2 1474 0
 	str	r3, [sp, #4]
-.LVL996:
+.LVL998:
 	.loc 2 1477 0
 	bl	ftl_memset
-.LVL997:
+.LVL999:
 	.loc 2 1478 0
-	ldr	r3, .L914+4
+	ldr	r3, .L915+4
 	.loc 2 1483 0
 	str	r6, [r4, #32]
 	.loc 2 1484 0
@@ -10642,13 +10669,13 @@ FtlMapTblRecovery:
 	.loc 2 1478 0
 	str	r2, [r5, #8]
 	.loc 2 1479 0
-	ldr	r2, .L914+8
+	ldr	r2, .L915+8
 	ldr	r7, [r2]
 	.loc 2 1481 0
 	movw	r2, #65535
 	.loc 2 1479 0
 	str	r7, [r5, #12]
-.LVL998:
+.LVL1000:
 	.loc 2 1481 0
 	strh	r2, [r4]	@ movhi
 	.loc 2 1482 0
@@ -10656,33 +10683,33 @@ FtlMapTblRecovery:
 	.loc 2 1485 0
 	movs	r2, #1
 	str	r2, [r4, #36]
-.LVL999:
-.L888:
+.LVL1001:
+.L889:
 	.loc 2 1486 0 discriminator 1
 	ldr	r2, [sp, #4]
 	sxth	r3, r6
-.LVL1000:
+.LVL1002:
 	cmp	r3, r2
-	bge	.L905
+	bge	.L906
 	.loc 2 1488 0
 	ldr	r2, [sp, #4]
 	subs	r2, r2, #1
 	cmp	r3, r2
 	lsl	r2, r3, #1
-	bne	.L889
+	bne	.L890
 	.loc 2 1490 0
 	ldrh	r0, [r10, r3, lsl #1]
 	movs	r1, #1
 	add	r5, r10, r2
 	str	r3, [sp, #4]
-.LVL1001:
+.LVL1003:
 	bl	FtlGetLastWrittenPage
-.LVL1002:
+.LVL1004:
 	.loc 2 1493 0
 	ldr	r3, [sp, #12]
 	.loc 2 1490 0
 	sxth	r10, r0
-.LVL1003:
+.LVL1005:
 	.loc 2 1492 0
 	strh	r6, [r4]	@ movhi
 	.loc 2 1494 0
@@ -10697,41 +10724,41 @@ FtlMapTblRecovery:
 	.loc 2 1493 0
 	ldr	r3, [r2, r3, lsl #2]
 	str	r3, [r4, #28]
-.LVL1004:
+.LVL1006:
 	.loc 2 1496 0
-	ldr	r3, .L914
-.LVL1005:
-.L890:
+	ldr	r3, .L915
+.LVL1007:
+.L891:
 	sxth	r2, r6
-.LVL1006:
+.LVL1008:
 	.loc 2 1494 0 discriminator 1
 	cmp	r2, r10
-	ble	.L892
-.LVL1007:
-.L905:
+	ble	.L893
+.LVL1009:
+.L906:
 	.loc 2 1547 0
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-.LVL1008:
+.LVL1010:
 	.loc 2 1548 0
-	ldr	r3, .L914+12
+	ldr	r3, .L915+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L894
+	bne	.L895
 	.loc 2 1550 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1009:
-.L894:
+.LVL1011:
+.L895:
 	.loc 2 1553 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1010:
+.LVL1012:
 	.loc 2 1555 0
 	mov	r0, r4
 	bl	ftl_map_blk_gc
-.LVL1011:
+.LVL1013:
 	.loc 2 1557 0
 	movs	r0, #0
 	add	sp, sp, #24
@@ -10739,32 +10766,32 @@ FtlMapTblRecovery:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1012:
-.L892:
+.LVL1014:
+.L893:
 	.cfi_restore_state
 	.loc 2 1496 0
 	ldrh	r1, [r5]
 	.loc 2 1497 0
-	ldr	r0, .L914
+	ldr	r0, .L915
 	.loc 2 1496 0
 	str	r3, [sp, #4]
 	orr	r2, r2, r1, lsl #10
-.LVL1013:
+.LVL1015:
 	str	r2, [r3, #4]
 	.loc 2 1497 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1014:
+.LVL1016:
 	.loc 2 1500 0
 	ldr	r3, [sp, #4]
 	ldr	r2, [r3]
 	adds	r2, r2, #1
-	beq	.L891
+	beq	.L892
 	.loc 2 1502 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L891
+	bls	.L892
 	.loc 2 1502 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
@@ -10773,27 +10800,27 @@ FtlMapTblRecovery:
 	itt	eq
 	ldreq	r1, [r3, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L891:
-.LVL1015:
-	adds	r6, r6, #1
-.LVL1016:
-	b	.L890
+.L892:
 .LVL1017:
-.L889:
+	adds	r6, r6, #1
+.LVL1018:
+	b	.L891
+.LVL1019:
+.L890:
 	.loc 2 1510 0
 	ldr	r1, [sp, #8]
 	.loc 2 1511 0
 	add	r2, r10, r2
 	str	r2, [sp, #16]
 	.loc 2 1512 0
-	ldr	r0, .L914
+	ldr	r0, .L915
 	.loc 2 1510 0
 	ldr	r1, [r1]
 	str	r1, [r5, #8]
 	.loc 2 1511 0
 	ldrh	r1, [r10, r3, lsl #1]
-	ldr	r3, .L914+12
-.LVL1018:
+	ldr	r3, .L915+12
+.LVL1020:
 	ldrh	r2, [r3]
 	str	r3, [sp, #20]
 	subs	r2, r2, #1
@@ -10803,57 +10830,57 @@ FtlMapTblRecovery:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1019:
+.LVL1021:
 	.loc 2 1515 0
 	ldr	r2, [r5]
 	adds	r2, r2, #1
-	beq	.L907
+	beq	.L908
 	.loc 2 1515 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r7]
 	ldrh	r2, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r1, r2
-	bne	.L907
+	bne	.L908
 	.loc 2 1515 0 discriminator 2
 	ldrh	r1, [r7, #8]
 	movw	r2, #64245
 	cmp	r1, r2
-	beq	.L896
-.L907:
+	beq	.L897
+.L908:
 	movs	r3, #0
-.L897:
-.LVL1020:
+.L898:
+.LVL1022:
 	.loc 2 1530 0 is_stmt 1 discriminator 1
-	ldr	r1, .L914+12
+	ldr	r1, .L915+12
 	sxth	r2, r3
 	ldrh	r1, [r1]
 	cmp	r2, r1
-	bge	.L903
+	bge	.L904
 	str	r3, [sp, #20]
 	.loc 2 1532 0
 	ldr	r3, [sp, #16]
-.LVL1021:
+.LVL1023:
 	.loc 2 1533 0
-	ldr	r0, .L914
+	ldr	r0, .L915
 	.loc 2 1532 0
 	ldrh	r1, [r3]
 	orr	r2, r2, r1, lsl #10
-.LVL1022:
+.LVL1024:
 	str	r2, [r5, #4]
 	.loc 2 1533 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1023:
+.LVL1025:
 	.loc 2 1536 0
 	ldr	r2, [r5]
 	ldr	r3, [sp, #20]
 	adds	r2, r2, #1
-	beq	.L901
+	beq	.L902
 	.loc 2 1538 0
 	ldrh	r2, [r7, #8]
 	cmp	fp, r2
-	bls	.L901
+	bls	.L902
 	.loc 2 1538 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r7]
@@ -10862,12 +10889,12 @@ FtlMapTblRecovery:
 	itt	eq
 	ldreq	r1, [r5, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L901:
-.LVL1024:
+.L902:
+.LVL1026:
 	adds	r3, r3, #1
-.LVL1025:
-	b	.L897
-.L896:
+.LVL1027:
+	b	.L898
+.L897:
 	.loc 2 1518 0 discriminator 1
 	ldrh	r2, [r3]
 	.loc 2 1520 0 discriminator 1
@@ -10877,25 +10904,25 @@ FtlMapTblRecovery:
 	subs	r2, r2, #1
 	.loc 2 1520 0 discriminator 1
 	ldr	ip, [r3]
-.L898:
+.L899:
 	sxth	r3, r1
-.LVL1026:
+.LVL1028:
 	.loc 2 1518 0 discriminator 1
 	cmp	r3, r2
-	blt	.L900
-.L903:
-.LVL1027:
-	adds	r6, r6, #1
-.LVL1028:
-	b	.L888
+	blt	.L901
+.L904:
 .LVL1029:
-.L900:
+	adds	r6, r6, #1
+.LVL1030:
+	b	.L889
+.LVL1031:
+.L901:
 	.loc 2 1520 0
 	lsls	r0, r3, #3
 	ldr	r3, [ip, r3, lsl #3]
-.LVL1030:
+.LVL1032:
 	adds	r1, r1, #1
-.LVL1031:
+.LVL1033:
 	.loc 2 1521 0
 	uxth	lr, r3
 	cmp	fp, lr
@@ -10903,13 +10930,13 @@ FtlMapTblRecovery:
 	itttt	hi
 	addhi	r0, r0, ip
 	movhi	r3, lr
-.LVL1032:
+.LVL1034:
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r8, r3, lsl #2]
-	b	.L898
-.L915:
+	b	.L899
+.L916:
 	.align	2
-.L914:
+.L915:
 	.word	.LANCHOR108
 	.word	.LANCHOR39
 	.word	.LANCHOR109
@@ -10936,46 +10963,46 @@ FtlLoadVonderInfo:
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
 	.loc 2 1561 0
-	ldr	r3, .L917
-	ldr	r0, .L917+4
+	ldr	r3, .L918
+	ldr	r0, .L918+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
 	.loc 2 1562 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
 	.loc 2 1563 0
-	ldr	r3, .L917+8
+	ldr	r3, .L918+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
 	.loc 2 1564 0
-	ldr	r3, .L917+12
+	ldr	r3, .L918+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
 	.loc 2 1565 0
-	ldr	r3, .L917+16
+	ldr	r3, .L918+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
 	.loc 2 1566 0
-	ldr	r3, .L917+20
+	ldr	r3, .L918+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
 	.loc 2 1567 0
-	ldr	r3, .L917+24
+	ldr	r3, .L918+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
 	.loc 2 1568 0
-	ldr	r3, .L917+28
+	ldr	r3, .L918+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
 	.loc 2 1570 0
 	bl	FtlMapTblRecovery
-.LVL1033:
+.LVL1035:
 	.loc 2 1573 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L918:
+.L919:
 	.align	2
-.L917:
+.L918:
 	.word	.LANCHOR27
 	.word	.LANCHOR149
 	.word	.LANCHOR35
@@ -11011,20 +11038,20 @@ FtlL2PDataInit:
 	.cfi_offset 14, -4
 	.loc 2 1578 0
 	movs	r1, #0
-	ldr	r5, .L922
-	ldr	r4, .L922+4
+	ldr	r5, .L923
+	ldr	r4, .L923+4
 	ldr	r2, [r5]
 	.loc 2 1579 0
-	ldr	r7, .L922+8
-	ldr	r6, .L922+12
+	ldr	r7, .L923+8
+	ldr	r6, .L923+12
 	.loc 2 1578 0
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	.loc 2 1579 0
-	ldr	r8, .L922+44
+	ldr	r8, .L923+44
 	.loc 2 1578 0
 	bl	ftl_memset
-.LVL1034:
+.LVL1036:
 	.loc 2 1579 0
 	ldrh	r3, [r7]
 	movs	r1, #255
@@ -11032,8 +11059,8 @@ FtlL2PDataInit:
 	ldr	r0, [r8]
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1035:
-	ldr	r3, .L922+16
+.LVL1037:
+	ldr	r3, .L923+16
 	movw	r0, #65535
 	ldrh	r1, [r6]
 	.loc 2 1584 0
@@ -11047,15 +11074,15 @@ FtlL2PDataInit:
 	movs	r3, #0
 	.loc 2 1582 0
 	mov	lr, r3
-.LVL1036:
-.L920:
+.LVL1038:
+.L921:
 	adds	r2, r2, #12
 	adds	r6, r3, r7
 	.loc 2 1580 0 discriminator 1
 	cmp	r2, r1
-	bne	.L921
+	bne	.L922
 	.loc 2 1586 0
-	ldr	r3, .L922+20
+	ldr	r3, .L923+20
 	.loc 2 1588 0
 	ldr	r2, [r5]
 	.loc 2 1586 0
@@ -11066,33 +11093,33 @@ FtlL2PDataInit:
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
 	.loc 2 1590 0
-	ldr	r2, .L922+24
+	ldr	r2, .L923+24
 	.loc 2 1587 0
 	strh	r0, [r3]	@ movhi
 	.loc 2 1590 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
 	.loc 2 1591 0
-	ldr	r2, .L922+28
+	ldr	r2, .L923+28
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
 	.loc 2 1592 0
-	ldr	r2, .L922+32
+	ldr	r2, .L923+32
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
 	.loc 2 1593 0
-	ldr	r2, .L922+36
+	ldr	r2, .L923+36
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
 	.loc 2 1594 0
 	ldr	r2, [r4]
 	str	r2, [r3, #20]
 	.loc 2 1595 0
-	ldr	r2, .L922+40
+	ldr	r2, .L923+40
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L921:
+.L922:
 	.loc 2 1584 0 discriminator 3
 	bic	r3, r3, #3
 	.loc 2 1582 0 discriminator 3
@@ -11104,10 +11131,10 @@ FtlL2PDataInit:
 	.loc 2 1584 0 discriminator 3
 	str	r3, [r2, #-4]
 	mov	r3, r6
-	b	.L920
-.L923:
+	b	.L921
+.L924:
 	.align	2
-.L922:
+.L923:
 	.word	.LANCHOR30
 	.word	.LANCHOR130
 	.word	.LANCHOR23
@@ -11143,17 +11170,17 @@ FtlLoadMapInfo:
 	.cfi_offset 14, -4
 	.loc 2 1600 0
 	bl	FtlL2PDataInit
-.LVL1037:
+.LVL1039:
 	.loc 2 1602 0
-	ldr	r0, .L925
+	ldr	r0, .L926
 	bl	FtlMapTblRecovery
-.LVL1038:
+.LVL1040:
 	.loc 2 1605 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L926:
+.L927:
 	.align	2
-.L925:
+.L926:
 	.word	.LANCHOR144
 	.cfi_endproc
 .LFE281:
@@ -11180,80 +11207,80 @@ FtlVariablesInit:
 	.cfi_offset 14, -4
 	.loc 3 496 0
 	movs	r4, #0
-	ldr	r3, .L928
+	ldr	r3, .L929
 	.loc 3 497 0
 	movw	r2, #65535
 	.loc 3 502 0
 	mov	r1, r4
 	.loc 3 503 0
-	ldr	r5, .L928+4
+	ldr	r5, .L929+4
 	.loc 3 496 0
 	str	r4, [r3]
 	.loc 3 497 0
-	ldr	r3, .L928+8
+	ldr	r3, .L929+8
 	strh	r2, [r3]	@ movhi
 	.loc 3 500 0
 	mov	r2, #-1
 	.loc 3 498 0
-	ldr	r3, .L928+12
+	ldr	r3, .L929+12
 	str	r4, [r3]
 	.loc 3 499 0
-	ldr	r3, .L928+16
+	ldr	r3, .L929+16
 	str	r4, [r3]
 	.loc 3 500 0
-	ldr	r3, .L928+20
+	ldr	r3, .L929+20
 	str	r2, [r3]
 	.loc 3 501 0
-	ldr	r3, .L928+24
+	ldr	r3, .L929+24
 	strh	r4, [r3]	@ movhi
 	.loc 3 502 0
-	ldr	r3, .L928+28
+	ldr	r3, .L929+28
 	ldrh	r2, [r3]
-	ldr	r3, .L928+32
+	ldr	r3, .L929+32
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1039:
+.LVL1041:
 	.loc 3 503 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L928+36
+	ldr	r3, .L929+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1040:
+.LVL1042:
 	.loc 3 504 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L928+40
+	ldr	r3, .L929+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1041:
+.LVL1043:
 	.loc 3 505 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L928+44
+	ldr	r0, .L929+44
 	bl	ftl_memset
-.LVL1042:
+.LVL1044:
 	.loc 3 506 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L928+48
+	ldr	r0, .L929+48
 	bl	ftl_memset
-.LVL1043:
+.LVL1045:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1044:
+.LVL1046:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1045:
+.LVL1047:
 	.loc 3 510 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L929:
+.L930:
 	.align	2
-.L928:
+.L929:
 	.word	.LANCHOR150
 	.word	.LANCHOR6
 	.word	.LANCHOR151
@@ -11296,12 +11323,12 @@ SupperBlkListInit:
 	.cfi_offset 14, -4
 	.loc 2 2071 0
 	movs	r2, #6
-	ldr	r3, .L941
+	ldr	r3, .L942
 	movs	r1, #0
 	.loc 2 2072 0
 	movs	r4, #0
 	.loc 2 2071 0
-	ldr	r5, .L941+4
+	ldr	r5, .L942+4
 	.loc 2 2077 0
 	mov	r8, r4
 	.loc 2 2071 0
@@ -11313,84 +11340,84 @@ SupperBlkListInit:
 	mov	r10, r5
 	muls	r2, r3, r2
 	bl	ftl_memset
-.LVL1046:
+.LVL1048:
 	.loc 2 2072 0
-	ldr	r3, .L941+8
+	ldr	r3, .L942+8
 	.loc 2 2075 0
-	ldr	r2, .L941+12
+	ldr	r2, .L942+12
 	.loc 2 2072 0
 	str	r4, [r3]
 	.loc 2 2073 0
-	ldr	r3, .L941+16
+	ldr	r3, .L942+16
 	.loc 2 2075 0
 	strh	r4, [r2]	@ movhi
 	str	r2, [sp, #4]
 	.loc 2 2073 0
 	str	r4, [r3]
 	.loc 2 2074 0
-	ldr	r3, .L941+20
+	ldr	r3, .L942+20
 	str	r4, [r3]
 	.loc 2 2076 0
-	ldr	r3, .L941+24
+	ldr	r3, .L942+24
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.LVL1047:
-.L931:
+.LVL1049:
+.L932:
 	.loc 2 2079 0 discriminator 1
-	ldr	r3, .L941+28
+	ldr	r3, .L942+28
 	uxth	r7, r4
-.LVL1048:
+.LVL1050:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcs	.L937
+	bcs	.L938
 	.loc 2 2081 0
-	ldr	r3, .L941+32
+	ldr	r3, .L942+32
 	ldrh	r2, [r3]
 	.loc 2 2084 0
-	ldr	r3, .L941+36
+	ldr	r3, .L942+36
 	ldrh	r3, [r3]
 	str	r3, [sp]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L938
-.LVL1049:
-.L933:
+	b	.L939
+.LVL1051:
+.L934:
 	str	r2, [sp, #12]
 	.loc 2 2082 0
 	mov	r1, r7
-	ldr	r2, .L941+40
+	ldr	r2, .L942+40
 	str	r3, [sp, #8]
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1050:
+.LVL1052:
 	.loc 2 2083 0
 	bl	FtlBbmIsBadBlock
-.LVL1051:
+.LVL1053:
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cbnz	r0, .L932
+	cbnz	r0, .L933
 	.loc 2 2084 0
 	ldr	r1, [sp]
 	add	r5, r5, r1
-.LVL1052:
+.LVL1054:
 	uxth	r5, r5
-.LVL1053:
-.L932:
+.LVL1055:
+.L933:
 	adds	r3, r3, #1
-.LVL1054:
-.L938:
+.LVL1056:
+.L939:
 	.loc 2 2081 0 discriminator 1
 	uxth	r1, r3
 	cmp	r2, r1
-	bhi	.L933
+	bhi	.L934
 	.loc 2 2086 0
-	cbz	r5, .L940
+	cbz	r5, .L941
 	.loc 2 2087 0
 	mov	r1, r5
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.LVL1055:
-.L934:
+.LVL1057:
+.L935:
 	.loc 2 2088 0
 	ldr	r1, [r10]
 	uxth	r2, r4
@@ -11398,63 +11425,63 @@ SupperBlkListInit:
 	mla	r3, r3, r2, r1
 	strh	r0, [r3, #4]	@ movhi
 	.loc 2 2090 0
-	ldr	r3, .L941+44
+	ldr	r3, .L942+44
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L935
+	beq	.L936
 	.loc 2 2091 0 discriminator 1
-	ldr	r3, .L941+48
+	ldr	r3, .L942+48
 	.loc 2 2090 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L935
+	beq	.L936
 	.loc 2 2092 0
-	ldr	r3, .L941+52
+	ldr	r3, .L942+52
 	.loc 2 2091 0
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	beq	.L935
+	beq	.L936
 	.loc 2 2094 0
-	ldr	r3, .L941+56
+	ldr	r3, .L942+56
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L936
+	cbnz	r3, .L937
 	.loc 2 2095 0
 	add	r8, r8, #1
-.LVL1056:
+.LVL1058:
 	.loc 2 2096 0
 	mov	r0, r7
-.LVL1057:
+.LVL1059:
 	.loc 2 2095 0
 	uxth	r8, r8
-.LVL1058:
+.LVL1060:
 	.loc 2 2096 0
 	bl	INSERT_FREE_LIST
-.LVL1059:
-.L935:
-	adds	r4, r4, #1
-.LVL1060:
-	b	.L931
 .LVL1061:
-.L940:
-	mov	r0, r5
-	b	.L934
-.LVL1062:
 .L936:
+	adds	r4, r4, #1
+.LVL1062:
+	b	.L932
+.LVL1063:
+.L941:
+	mov	r0, r5
+	b	.L935
+.LVL1064:
+.L937:
 	.loc 2 2098 0
 	adds	r6, r6, #1
-.LVL1063:
+.LVL1065:
 	.loc 2 2099 0
 	mov	r0, r7
-.LVL1064:
+.LVL1066:
 	.loc 2 2098 0
 	uxth	r6, r6
-.LVL1065:
+.LVL1067:
 	.loc 2 2099 0
 	bl	INSERT_DATA_LIST
-.LVL1066:
-	b	.L935
-.L937:
+.LVL1068:
+	b	.L936
+.L938:
 	.loc 2 2103 0
 	ldr	r2, [sp, #4]
 	.loc 2 2104 0
@@ -11463,26 +11490,26 @@ SupperBlkListInit:
 	strh	r6, [r2]	@ movhi
 	.loc 2 2105 0
 	add	r6, r6, r8
-.LVL1067:
+.LVL1069:
 	cmp	r6, r3
-	ble	.L939
+	ble	.L940
 	.loc 2 2105 0 is_stmt 0 discriminator 1
 	movw	r2, #2105
-	ldr	r1, .L941+60
-	ldr	r0, .L941+64
+	ldr	r1, .L942+60
+	ldr	r0, .L942+64
 	bl	printf
-.LVL1068:
-.L939:
+.LVL1070:
+.L940:
 	.loc 2 2107 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1069:
-.L942:
+.LVL1071:
+.L943:
 	.align	2
-.L941:
+.L942:
 	.word	.LANCHOR6
 	.word	.LANCHOR41
 	.word	.LANCHOR47
@@ -11517,7 +11544,7 @@ ftl_check_vpc:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1070:
+.LVL1072:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -11530,177 +11557,177 @@ ftl_check_vpc:
 	.cfi_offset 14, -4
 	.loc 2 2232 0
 	movs	r4, #0
-	ldr	r6, .L967
+	ldr	r6, .L968
 	.loc 2 2238 0
-	ldr	r5, .L967+4
+	ldr	r5, .L968+4
 	.loc 2 2229 0
-	ldr	r1, .L967+8
-	ldr	r0, .L967+12
+	ldr	r1, .L968+8
+	ldr	r0, .L968+12
 	bl	printf
-.LVL1071:
+.LVL1073:
 	.loc 2 2231 0
 	mov	r2, #8192
 	movs	r1, #0
-	ldr	r0, .L967+4
+	ldr	r0, .L968+4
 	bl	ftl_memset
-.LVL1072:
-.L944:
+.LVL1074:
+.L945:
 	.loc 2 2232 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r4, r3
-	bcc	.L946
+	bcc	.L947
 	.loc 2 2243 0 discriminator 1
-	ldr	r10, .L967+48
+	ldr	r10, .L968+48
 	movs	r4, #0
-.LVL1073:
+.LVL1075:
 	.loc 2 2245 0 discriminator 1
-	ldr	r7, .L967+16
+	ldr	r7, .L968+16
 	mov	r6, r4
-.LVL1074:
-.L947:
+.LVL1076:
+.L948:
 	.loc 2 2243 0 discriminator 1
 	ldrh	r2, [r10]
 	uxth	r3, r4
 	cmp	r2, r3
-	bhi	.L949
+	bhi	.L950
 	.loc 2 2255 0
-	ldr	r3, .L967+20
+	ldr	r3, .L968+20
 	ldr	r4, [r3]
-.LVL1075:
-	cbz	r4, .L950
-.LBB238:
+.LVL1077:
+	cbz	r4, .L951
+.LBB242:
 	.loc 2 2257 0
-	ldr	r3, .L967+24
+	ldr	r3, .L968+24
 	.loc 2 2259 0
 	mov	r8, #0
 	.loc 2 2258 0
-	ldr	r5, .L967+28
+	ldr	r5, .L968+28
 	.loc 2 2261 0
-	ldr	r10, .L967+16
+	ldr	r10, .L968+16
 	.loc 2 2257 0
 	ldrh	r7, [r3]
-.LVL1076:
+.LVL1078:
 	.loc 2 2258 0
 	ldr	r3, [r5]
 	.loc 2 2263 0
-	ldr	fp, .L967+4
+	ldr	fp, .L968+4
 	.loc 2 2258 0
 	subs	r4, r4, r3
-	ldr	r3, .L967+32
+	ldr	r3, .L968+32
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
-.LVL1077:
-.L951:
+.LVL1079:
+.L952:
 	.loc 2 2259 0 discriminator 1
 	uxth	r3, r8
 	cmp	r7, r3
-	bls	.L950
+	bls	.L951
 	.loc 2 2261 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r4, lsl #1]
-	cbz	r2, .L952
+	cbz	r2, .L953
 	.loc 2 2264 0
 	movs	r6, #1
 	.loc 2 2263 0
 	ldrh	r3, [fp, r4, lsl #1]
 	mov	r1, r4
-	ldr	r0, .L967+36
+	ldr	r0, .L968+36
 	bl	printf
-.LVL1078:
-.L952:
+.LVL1080:
+.L953:
 	.loc 2 2266 0
 	movs	r3, #6
 	ldr	r2, [r5]
 	muls	r4, r3, r4
-.LVL1079:
+.LVL1081:
 	movw	r3, #65535
 	add	r8, r8, #1
-.LVL1080:
+.LVL1082:
 	ldrh	r4, [r2, r4]
 	cmp	r4, r3
-	bne	.L951
-.LVL1081:
-.L950:
-.LBE238:
+	bne	.L952
+.LVL1083:
+.L951:
+.LBE242:
 	.loc 2 2271 0
-	cbz	r6, .L943
-.LVL1082:
+	cbz	r6, .L944
+.LVL1084:
 	.loc 2 2271 0 is_stmt 0 discriminator 1
 	movw	r2, #2271
-	ldr	r1, .L967+8
-	ldr	r0, .L967+40
+	ldr	r1, .L968+8
+	ldr	r0, .L968+40
 	bl	printf
-.LVL1083:
-.L943:
+.LVL1085:
+.L944:
 	.loc 2 2272 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1084:
-.L946:
+.LVL1086:
+.L947:
 	.cfi_restore_state
 	.loc 2 2234 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r4
 	bl	log2phys
-.LVL1085:
+.LVL1087:
 	.loc 2 2235 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L945
+	beq	.L946
 	.loc 2 2237 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1086:
+.LVL1088:
 	.loc 2 2238 0
 	ldrh	r3, [r5, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r5, r0, lsl #1]	@ movhi
-.LVL1087:
-.L945:
+.LVL1089:
+.L946:
 	.loc 2 2232 0 discriminator 2
 	adds	r4, r4, #1
-.LVL1088:
-	b	.L944
-.LVL1089:
-.L949:
+.LVL1090:
+	b	.L945
+.LVL1091:
+.L950:
 	.loc 2 2245 0
 	ldr	r3, [r7]
 	uxth	r5, r4
-	ldr	r8, .L967+4
+	ldr	r8, .L968+4
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r3, [r8, r5, lsl #1]
 	cmp	r2, r3
-	beq	.L948
+	beq	.L949
 	.loc 2 2247 0
 	mov	r1, r5
-	ldr	r0, .L967+44
+	ldr	r0, .L968+44
 	bl	printf
-.LVL1090:
+.LVL1092:
 	.loc 2 2248 0
 	ldr	r3, [r7]
 	movw	r2, #65535
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, r2
-	beq	.L948
+	beq	.L949
 	.loc 2 2248 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r8, r5, lsl #1]
 	.loc 2 2250 0 is_stmt 1 discriminator 1
 	cmp	r2, r3
 	it	hi
 	movhi	r6, #1
-.LVL1091:
-.L948:
+.LVL1093:
+.L949:
 	adds	r4, r4, #1
-.LVL1092:
-	b	.L947
-.L968:
+.LVL1094:
+	b	.L948
+.L969:
 	.align	2
-.L967:
+.L968:
 	.word	.LANCHOR62
 	.word	check_vpc_table
 	.word	.LANCHOR156
@@ -11732,7 +11759,7 @@ FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	.loc 5 203 0
-	ldr	r2, .L970
+	ldr	r2, .L971
 	movs	r3, #0
 	.loc 5 202 0
 	push	{r4, lr}
@@ -11741,28 +11768,28 @@ FtlGcPageVarInit:
 	.cfi_offset 14, -4
 	.loc 5 205 0
 	movs	r1, #255
-	ldr	r4, .L970+4
+	ldr	r4, .L971+4
 	.loc 5 203 0
 	strh	r3, [r2]	@ movhi
 	.loc 5 204 0
-	ldr	r2, .L970+8
+	ldr	r2, .L971+8
 	strh	r3, [r2]	@ movhi
 	.loc 5 205 0
 	ldrh	r2, [r4]
-	ldr	r3, .L970+12
+	ldr	r3, .L971+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1093:
+.LVL1095:
 	.loc 5 206 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L970+16
+	ldr	r3, .L971+16
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1094:
+.LVL1096:
 	.loc 5 208 0
 	pop	{r4, lr}
 	.cfi_restore 14
@@ -11770,10 +11797,10 @@ FtlGcPageVarInit:
 	.cfi_def_cfa_offset 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1095:
-.L971:
+.LVL1097:
+.L972:
 	.align	2
-.L970:
+.L971:
 	.word	.LANCHOR98
 	.word	.LANCHOR21
 	.word	.LANCHOR99
@@ -11796,9 +11823,9 @@ FtlGcScanTempBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1096:
+.LVL1098:
 	.loc 5 220 0
-	ldr	r3, .L995
+	ldr	r3, .L996
 	.loc 5 211 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -11817,50 +11844,50 @@ FtlGcScanTempBlk:
 	str	r1, [sp, #8]
 	.loc 5 220 0
 	ldrh	r4, [r3]
-.LVL1097:
+.LVL1099:
 	.loc 5 221 0
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L989
+	beq	.L990
 	.loc 5 223 0
-	cbnz	r4, .L973
-.L974:
+	cbnz	r4, .L974
+.L975:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1098:
-	b	.L975
-.LVL1099:
-.L989:
+.LVL1100:
+	b	.L976
+.LVL1101:
+.L990:
 	.loc 5 222 0
 	movs	r4, #0
-.LVL1100:
-.L973:
+.LVL1102:
+.L974:
 	.loc 5 223 0 discriminator 1
-	ldr	r3, .L995+4
+	ldr	r3, .L996+4
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	beq	.L974
-.LVL1101:
-.L975:
+	beq	.L975
+.LVL1103:
+.L976:
 	.loc 5 222 0
 	movs	r7, #0
-.LVL1102:
-.L983:
+.LVL1104:
+.L984:
 	.loc 5 228 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	.loc 5 226 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
-.LVL1103:
+.LVL1105:
 	.loc 5 228 0
 	cmp	r2, r3
-	beq	.L976
-.L986:
-.LVL1104:
+	beq	.L977
+.L987:
+.LVL1106:
 	.loc 5 231 0
-	ldr	r3, .L995+8
+	ldr	r3, .L996+8
 	movs	r2, #0
 	add	ip, r5, #16
 	.loc 5 230 0
@@ -11872,78 +11899,78 @@ FtlGcScanTempBlk:
 	.loc 5 231 0
 	ldrh	fp, [r3]
 	.loc 5 234 0
-	ldr	r3, .L995+12
+	ldr	r3, .L996+12
 	ldr	r3, [r3]
 	str	r3, [sp, #4]
 	.loc 5 235 0
-	ldr	r3, .L995+16
+	ldr	r3, .L996+16
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L995+20
+	ldr	r3, .L996+20
 	ldrh	r3, [r3]
 	str	r3, [sp, #16]
 	.loc 5 236 0
-	ldr	r3, .L995+24
+	ldr	r3, .L996+24
 	ldr	r3, [r3]
 	str	r3, [sp, #20]
-	ldr	r3, .L995+28
+	ldr	r3, .L996+28
 	ldrh	r10, [r3]
-.LVL1105:
-.L977:
+.LVL1107:
+.L978:
 	.loc 5 231 0 discriminator 1
 	uxth	r3, r2
 	cmp	fp, r3
-	bhi	.L979
+	bhi	.L980
 	.loc 5 241 0
 	mov	r8, #0
 	.loc 5 242 0
 	mov	fp, #20
 	.loc 5 240 0
 	movs	r2, #0
-.LVL1106:
+.LVL1108:
 	mov	r1, r6
 	ldr	r0, [sp, #4]
 	bl	FlashReadPages
-.LVL1107:
-.L980:
+.LVL1109:
+.L981:
 	.loc 5 241 0 discriminator 1
 	uxth	r3, r8
 	cmp	r6, r3
-	bhi	.L984
+	bhi	.L985
 	.loc 5 268 0
 	ldr	r3, [sp, #8]
 	.loc 5 266 0
 	adds	r7, r7, #1
-.LVL1108:
+.LVL1110:
 	.loc 5 264 0
 	adds	r4, r4, #1
-.LVL1109:
-	ldr	r2, .L995+4
+.LVL1111:
+	ldr	r2, .L996+4
 	uxth	r4, r4
-.LVL1110:
+.LVL1112:
 	.loc 5 268 0
 	cmp	r3, r7
-	bls	.L985
-.L987:
+	bls	.L986
+.L988:
 	.loc 5 274 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bhi	.L986
+	bhi	.L987
 	.loc 5 265 0
 	movs	r0, #0
-	b	.L976
-.LVL1111:
-.L979:
+	b	.L977
+.LVL1113:
+.L980:
 	.loc 5 232 0
 	ldrh	r3, [ip], #2
-.LVL1112:
+.LVL1114:
 	.loc 5 233 0
 	cmp	r3, lr
-	beq	.L978
+	beq	.L979
 	.loc 5 234 0
 	ldr	r1, [sp, #4]
 	orr	r3, r4, r3, lsl #10
-.LVL1113:
+.LVL1115:
 	.loc 5 235 0
 	ldr	r0, [sp, #12]
 	.loc 5 234 0
@@ -11962,61 +11989,61 @@ FtlGcScanTempBlk:
 	mul	r3, r10, r6
 	.loc 5 237 0
 	adds	r6, r6, #1
-.LVL1114:
+.LVL1116:
 	uxth	r6, r6
-.LVL1115:
+.LVL1117:
 	.loc 5 236 0
 	bic	r3, r3, #3
 	add	r3, r3, r0
 	str	r3, [r1, #12]
-.L978:
-.LVL1116:
-	adds	r2, r2, #1
-.LVL1117:
-	b	.L977
+.L979:
 .LVL1118:
-.L984:
+	adds	r2, r2, #1
+.LVL1119:
+	b	.L978
+.LVL1120:
+.L985:
 	.loc 5 242 0
-	ldr	r3, .L995+12
+	ldr	r3, .L996+12
 	mul	r10, fp, r8
 	ldr	r2, [r3]
 	add	r3, r2, r10
 	str	r2, [sp, #16]
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
-.LVL1119:
+.LVL1121:
 	.loc 5 243 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
-.LVL1120:
+.LVL1122:
 	.loc 5 245 0
 	ldr	r2, [sp, #16]
 	ldr	r2, [r2, r10]
-	cbnz	r2, .L981
+	cbnz	r2, .L982
 	.loc 5 247 0
 	ldr	r3, [sp, #12]
 	.loc 5 248 0
 	movw	r2, #65535
 	add	r8, r8, #1
-.LVL1121:
+.LVL1123:
 	ldr	r1, [sp, #4]
 	.loc 5 247 0
 	ldr	r3, [r3, #12]
-.LVL1122:
+.LVL1124:
 	.loc 5 248 0
 	ldrh	ip, [r3]
 	cmp	ip, r2
-	bne	.L982
+	bne	.L983
 	.loc 5 249 0
-	ldr	r3, .L995+32
-.LVL1123:
+	ldr	r3, .L996+32
+.LVL1125:
 	movs	r2, #1
 	str	r2, [r3]
-.LVL1124:
-.L976:
+.LVL1126:
+.L977:
 	.loc 5 281 0
-	ldr	r3, .L995
+	ldr	r3, .L996
 	movw	r2, #65535
 	.loc 5 283 0
 	strb	r0, [r5, #6]
@@ -12029,70 +12056,70 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	r2, r0
 	mov	r0, r5
-.LVL1125:
+.LVL1127:
 	bl	ftl_sb_update_avl_pages
-.LVL1126:
+.LVL1128:
 	.loc 5 285 0
-	b	.L988
-.LVL1127:
-.L982:
+	b	.L989
+.LVL1129:
+.L983:
 	.loc 5 252 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
-.LVL1128:
-	bl	FtlGcUpdatePage
-.LVL1129:
-	b	.L980
 .LVL1130:
-.L981:
+	bl	FtlGcUpdatePage
+.LVL1131:
+	b	.L981
+.LVL1132:
+.L982:
 	.loc 5 256 0
-	ldr	r3, .L995+36
+	ldr	r3, .L996+36
 	movs	r4, #0
-.LVL1131:
+.LVL1133:
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
 	.loc 5 257 0
 	ldrh	r0, [r5]
-.LVL1132:
+.LVL1134:
 	bl	INSERT_FREE_LIST
-.LVL1133:
+.LVL1135:
 	.loc 5 258 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.LVL1134:
+.LVL1136:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1135:
+.LVL1137:
 	.loc 5 261 0
-	b	.L983
-.LVL1136:
-.L985:
+	b	.L984
+.LVL1138:
+.L986:
 	.loc 5 268 0 discriminator 1
-	ldr	r1, .L995
+	ldr	r1, .L996
 	movw	r0, #65535
 	ldrh	r3, [r1]
 	cmp	r3, r0
-	beq	.L987
+	beq	.L988
 	.loc 5 269 0
 	add	r3, r3, r7
 	strh	r3, [r1]	@ movhi
 	.loc 5 270 0
 	ldrh	r3, [r2]
 	cmp	r3, r4
-	bls	.L987
-.LVL1137:
-.L988:
+	bls	.L988
+.LVL1139:
+.L989:
 	.loc 5 286 0
 	mov	r0, #-1
 	add	sp, sp, #24
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1138:
-.L996:
+.LVL1140:
+.L997:
 	.align	2
-.L995:
+.L996:
 	.word	.LANCHOR157
 	.word	.LANCHOR19
 	.word	.LANCHOR3
@@ -12115,15 +12142,15 @@ FtlGcScanTempBlk:
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB346:
-	.loc 1 193 0
+.LFB347:
+	.loc 1 197 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1139:
-	.loc 1 198 0
+.LVL1141:
+	.loc 1 202 0
 	cmp	r0, #11
-	.loc 1 193 0
+	.loc 1 197 0
 	push	{r4, r5, lr}
 	.cfi_def_cfa_offset 12
 	.cfi_offset 4, -12
@@ -12132,89 +12159,89 @@ FlashTestBlk:
 	mov	r4, r0
 	sub	sp, sp, #92
 	.cfi_def_cfa_offset 104
-	.loc 1 198 0
-	bls	.L999
-.LVL1140:
-.LBB241:
-.LBB242:
 	.loc 1 202 0
-	ldr	r5, .L1000
-	.loc 1 203 0
+	bls	.L1000
+.LVL1142:
+.LBB245:
+.LBB246:
+	.loc 1 206 0
+	ldr	r5, .L1001
+	.loc 1 207 0
 	add	r0, sp, #24
-.LVL1141:
-	.loc 1 204 0
+.LVL1143:
+	.loc 1 208 0
 	movs	r2, #32
 	movs	r1, #165
-	.loc 1 203 0
+	.loc 1 207 0
 	str	r0, [sp, #16]
-	.loc 1 206 0
+	.loc 1 210 0
 	lsls	r4, r4, #10
-.LVL1142:
-	.loc 1 202 0
+.LVL1144:
+	.loc 1 206 0
 	str	r5, [sp, #12]
-	.loc 1 204 0
+	.loc 1 208 0
 	bl	ftl_memset
-.LVL1143:
-	.loc 1 205 0
+.LVL1145:
+	.loc 1 209 0
 	movs	r2, #8
 	movs	r1, #90
 	mov	r0, r5
 	bl	ftl_memset
-.LVL1144:
-	.loc 1 207 0
+.LVL1146:
+	.loc 1 211 0
 	movs	r2, #1
 	add	r0, sp, #4
 	mov	r1, r2
-	.loc 1 206 0
+	.loc 1 210 0
 	str	r4, [sp, #8]
-	.loc 1 207 0
+	.loc 1 211 0
 	bl	FlashEraseBlocks
-.LVL1145:
-	.loc 1 208 0
+.LVL1147:
+	.loc 1 212 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1146:
-	.loc 1 209 0
+.LVL1148:
+	.loc 1 213 0
 	ldr	r4, [sp, #4]
-	.loc 1 215 0
+	.loc 1 219 0
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
-	.loc 1 209 0
+	.loc 1 213 0
 	adds	r4, r4, #0
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
 .LDL1:
-.LVL1147:
-	.loc 1 215 0
+.LVL1149:
+	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1148:
-.L997:
-.LBE242:
-.LBE241:
-	.loc 1 217 0
+.LVL1150:
+.L998:
+.LBE246:
+.LBE245:
+	.loc 1 221 0
 	mov	r0, r4
 	add	sp, sp, #92
 	.cfi_remember_state
 	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
-.LVL1149:
-.L999:
+.LVL1151:
+.L1000:
 	.cfi_restore_state
-	.loc 1 199 0
+	.loc 1 203 0
 	movs	r4, #0
-	b	.L997
-.L1001:
+	b	.L998
+.L1002:
 	.align	2
-.L1000:
+.L1001:
 	.word	ftl_temp_buf
 	.cfi_endproc
-.LFE346:
+.LFE347:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -12225,81 +12252,81 @@ FlashTestBlk:
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB347:
-	.loc 1 220 0
+.LFB348:
+	.loc 1 224 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1150:
+.LVL1152:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
 	.cfi_offset 4, -12
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
-	.loc 1 223 0
+	.loc 1 227 0
 	mov	r2, #256
-	.loc 1 220 0
+	.loc 1 224 0
 	mov	r5, r1
-	.loc 1 223 0
+	.loc 1 227 0
 	movs	r1, #255
-.LVL1151:
-	.loc 1 220 0
+.LVL1153:
+	.loc 1 224 0
 	mov	r4, r0
-	.loc 1 223 0
+	.loc 1 227 0
 	bl	ftl_memset
-.LVL1152:
-	.loc 1 224 0
-	ldr	r3, .L1009
+.LVL1154:
+	.loc 1 228 0
+	ldr	r3, .L1010
 	mov	r1, r5
 	mov	r0, r4
 	ldr	r3, [r3]
 	blx	r3
-.LVL1153:
+.LVL1155:
 	uxth	r0, r0
-.LVL1154:
-	.loc 1 225 0
+.LVL1156:
+	.loc 1 229 0
 	cmp	r0, #50
-	bls	.L1003
-	.loc 1 226 0
+	bls	.L1004
+	.loc 1 230 0
 	mov	r2, #256
 	movs	r1, #255
 	mov	r0, r4
-.LVL1155:
+.LVL1157:
 	bl	ftl_memset
-.LVL1156:
-	.loc 1 227 0
+.LVL1158:
+	.loc 1 231 0
 	movs	r0, #0
-.LVL1157:
-.L1003:
-	.loc 1 229 0
-	ldr	r3, .L1009+4
+.LVL1159:
+.L1004:
+	.loc 1 233 0
+	ldr	r3, .L1010+4
 	ldrh	r3, [r3, #14]
 	cmp	r3, #4
-	bne	.L1008
+	bne	.L1009
 	add	r1, r4, r0, lsl #1
 	mov	r3, r4
-.L1005:
-	.loc 1 230 0 discriminator 1
+.L1006:
+	.loc 1 234 0 discriminator 1
 	cmp	r3, r1
-	bne	.L1006
-.L1008:
-	.loc 1 235 0
+	bne	.L1007
+.L1009:
+	.loc 1 239 0
 	pop	{r3, r4, r5, pc}
-.LVL1158:
-.L1006:
-	.loc 1 231 0 discriminator 3
+.LVL1160:
+.L1007:
+	.loc 1 235 0 discriminator 3
 	ldrh	r2, [r3]
 	lsrs	r2, r2, #1
 	strh	r2, [r3], #2	@ movhi
-	b	.L1005
-.L1010:
+	b	.L1006
+.L1011:
 	.align	2
-.L1009:
+.L1010:
 	.word	.LANCHOR107
 	.word	.LANCHOR0
 	.cfi_endproc
-.LFE347:
+.LFE348:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -12310,18 +12337,18 @@ FlashGetBadBlockList:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB349:
-	.loc 1 243 0
+.LFB350:
+	.loc 1 247 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1159:
-	.loc 1 244 0
+.LVL1161:
+	.loc 1 248 0
 	b	memcpy
-.LVL1160:
+.LVL1162:
 	.cfi_endproc
-.LFE349:
+.LFE350:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -12337,7 +12364,7 @@ FtlBbmTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1161:
+.LVL1163:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12351,25 +12378,25 @@ FtlBbmTblFlush:
 	.loc 4 91 0
 	movs	r4, #0
 	.loc 4 88 0
-	ldr	r7, .L1021
+	ldr	r7, .L1022
 	.loc 4 89 0
 	movs	r1, #0
 	.loc 4 87 0
-	ldr	r5, .L1021+4
+	ldr	r5, .L1022+4
 	.loc 4 88 0
 	ldr	r3, [r7]
 	mov	fp, r7
 	.loc 4 87 0
-	ldr	r8, .L1021+48
-	ldr	r6, .L1021+8
+	ldr	r8, .L1022+48
+	ldr	r6, .L1022+8
 	.loc 4 88 0
 	str	r3, [r5, #12]
 	.loc 4 91 0
-	ldr	r7, .L1021+12
+	ldr	r7, .L1022+12
 	.loc 4 89 0
-	ldr	r3, .L1021+16
+	ldr	r3, .L1022+16
 	.loc 4 92 0
-	ldr	r10, .L1021+52
+	ldr	r10, .L1022+52
 	.loc 4 87 0
 	ldr	r0, [r8]
 	.loc 4 89 0
@@ -12378,20 +12405,20 @@ FtlBbmTblFlush:
 	str	r0, [r5, #8]
 	.loc 4 89 0
 	bl	ftl_memset
-.LVL1162:
-.L1013:
+.LVL1164:
+.L1014:
 	.loc 4 91 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r4, r3
-	blt	.L1014
+	blt	.L1015
 	.loc 4 94 0
 	ldr	r6, [r5, #12]
-.LVL1163:
+.LVL1165:
 	.loc 4 95 0
 	movs	r2, #16
 	.loc 4 98 0
-	ldr	r4, .L1021+20
-.LVL1164:
+	ldr	r4, .L1022+20
+.LVL1166:
 	.loc 4 95 0
 	movs	r1, #255
 	.loc 4 84 0
@@ -12399,7 +12426,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	r0, r6
 	bl	ftl_memset
-.LVL1165:
+.LVL1167:
 	.loc 4 97 0
 	movw	r3, #61649
 	mov	r10, r4
@@ -12420,11 +12447,11 @@ FtlBbmTblFlush:
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
 	.loc 4 102 0
-	ldr	r3, .L1021+24
+	ldr	r3, .L1022+24
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
-.LVL1166:
-.L1015:
+.LVL1168:
+.L1016:
 	.loc 4 104 0
 	ldr	r3, [r8]
 	.loc 4 107 0
@@ -12447,23 +12474,23 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
-	ldr	r0, .L1021+28
+	ldr	r0, .L1022+28
 	bl	printf
-.LVL1167:
+.LVL1169:
 	.loc 4 109 0
 	movs	r3, #1
-	ldr	r0, .L1021+4
+	ldr	r0, .L1022+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1168:
+.LVL1170:
 	.loc 4 110 0
-	ldr	r3, .L1021+32
+	ldr	r3, .L1022+32
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1016
+	blt	.L1017
 	.loc 4 113 0
 	ldr	r3, [r4, #8]
 	.loc 4 117 0
@@ -12484,7 +12511,7 @@ FtlBbmTblFlush:
 	.loc 4 118 0
 	strh	r2, [r4, #4]	@ movhi
 	.loc 4 121 0
-	ldr	r2, .L1021+36
+	ldr	r2, .L1022+36
 	.loc 4 116 0
 	strh	r3, [r4]	@ movhi
 	.loc 4 119 0
@@ -12501,15 +12528,15 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	.loc 4 122 0
 	bl	FlashEraseBlocks
-.LVL1169:
+.LVL1171:
 	.loc 4 123 0
 	movs	r3, #1
-	ldr	r0, .L1021+4
+	ldr	r0, .L1022+4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1170:
-.L1016:
+.LVL1172:
+.L1017:
 	.loc 4 126 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
@@ -12517,31 +12544,31 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	bne	.L1017
+	bne	.L1018
 	.loc 4 130 0
 	adds	r7, r7, #1
-.LVL1171:
+.LVL1173:
 	.loc 4 129 0
 	ldr	r1, [r5, #4]
 	.loc 4 130 0
 	uxth	r7, r7
 	.loc 4 129 0
-	ldr	r0, .L1021+40
+	ldr	r0, .L1022+40
 	bl	printf
-.LVL1172:
+.LVL1174:
 	.loc 4 131 0
 	cmp	r7, #3
-	bls	.L1015
+	bls	.L1016
 	.loc 4 132 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1021+44
+	ldr	r0, .L1022+44
 	bl	printf
-.LVL1173:
-.L1019:
-	b	.L1019
-.LVL1174:
-.L1014:
+.LVL1175:
+.L1020:
+	b	.L1020
+.LVL1176:
+.L1015:
 	.loc 4 92 0 discriminator 3
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
@@ -12550,35 +12577,35 @@ FtlBbmTblFlush:
 	lsls	r2, r2, #2
 	.loc 4 91 0 discriminator 3
 	adds	r4, r4, #1
-.LVL1175:
+.LVL1177:
 	.loc 4 92 0 discriminator 3
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
-.LVL1176:
-	b	.L1013
-.LVL1177:
-.L1020:
-	movs	r3, #1
 .LVL1178:
-	str	r3, [sp, #12]
+	b	.L1014
 .LVL1179:
-	b	.L1015
+.L1021:
+	movs	r3, #1
 .LVL1180:
-.L1017:
+	str	r3, [sp, #12]
+.LVL1181:
+	b	.L1016
+.LVL1182:
+.L1018:
 	.loc 4 139 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1020
+	beq	.L1021
 	.loc 4 146 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1181:
-.L1022:
+.LVL1183:
+.L1023:
 	.align	2
-.L1021:
+.L1022:
 	.word	.LANCHOR109
 	.word	.LANCHOR108
 	.word	.LANCHOR37+24
@@ -12610,7 +12637,7 @@ allocate_data_superblock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1182:
+.LVL1184:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -12623,32 +12650,32 @@ allocate_data_superblock:
 	.cfi_offset 14, -4
 	.loc 2 2531 0
 	mov	r4, r0
-	ldr	r8, .L1061
-.LVL1183:
-.L1024:
+	ldr	r8, .L1062
+.LVL1185:
+.L1025:
 	.loc 2 2537 0
-	ldr	r3, .L1061
-	ldr	r6, .L1061+4
-	ldr	fp, .L1061+76
+	ldr	r3, .L1062
+	ldr	r6, .L1062+4
+	ldr	fp, .L1062+76
 	ldrh	r3, [r3]
 	ldrh	r2, [r6]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1025
+	ble	.L1026
 	.loc 2 2537 0 is_stmt 0 discriminator 1
 	movw	r2, #2537
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1184:
-.L1025:
+.LVL1186:
+.L1026:
 	.loc 2 2539 0 is_stmt 1
-	ldr	r3, .L1061+16
+	ldr	r3, .L1062+16
 	cmp	r4, r3
-	bne	.L1050
+	bne	.L1051
 	.loc 2 2540 0
-	ldr	r2, .L1061+20
+	ldr	r2, .L1062+20
 	ldrh	r3, [r8]
 	ldr	r2, [r2]
 	lsrs	r1, r3, #1
@@ -12656,31 +12683,31 @@ allocate_data_superblock:
 	adds	r1, r1, #1
 	add	r1, r1, r2, lsr #2
 	uxth	r1, r1
-.LVL1185:
+.LVL1187:
 	.loc 2 2544 0
-	cbz	r1, .L1026
+	cbz	r1, .L1027
 	.loc 2 2545 0
 	subs	r1, r1, #1
-.LVL1186:
+.LVL1188:
 	uxth	r1, r1
-.LVL1187:
-.L1026:
+.LVL1189:
+.L1027:
 	.loc 2 2546 0
-	ldr	r0, .L1061+24
+	ldr	r0, .L1062+24
 	bl	List_pop_index_node
-.LVL1188:
+.LVL1190:
 	ldrh	r3, [r8]
 	mov	r5, r0
 	uxth	r7, r0
-.LVL1189:
-	cbnz	r3, .L1027
+.LVL1191:
+	cbnz	r3, .L1028
 	.loc 2 2546 0 is_stmt 0 discriminator 1
 	movw	r2, #2546
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1190:
-.L1027:
+.LVL1192:
+.L1028:
 	.loc 2 2546 0 discriminator 3
 	ldrh	r3, [r8]
 	.loc 2 2550 0 is_stmt 1 discriminator 3
@@ -12692,12 +12719,12 @@ allocate_data_superblock:
 	strh	r7, [r4]	@ movhi
 	.loc 2 2550 0 discriminator 3
 	bl	make_superblock
-.LVL1191:
+.LVL1193:
 	.loc 2 2551 0 discriminator 3
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1028
+	cbnz	r3, .L1029
 	.loc 2 2555 0
-	ldr	r3, .L1061+28
+	ldr	r3, .L1062+28
 	uxth	r5, r5
 	movw	r2, #65535
 	.loc 2 2556 0
@@ -12707,46 +12734,46 @@ allocate_data_superblock:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	.loc 2 2556 0
 	bl	INSERT_DATA_LIST
-.LVL1192:
+.LVL1194:
 	.loc 2 2557 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1024
+	ble	.L1025
 	.loc 2 2557 0 is_stmt 0 discriminator 1
 	movw	r2, #2557
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1193:
-	b	.L1024
-.LVL1194:
-.L1050:
-	movs	r1, #0
-	b	.L1026
 .LVL1195:
-.L1028:
+	b	.L1025
+.LVL1196:
+.L1051:
+	movs	r1, #0
+	b	.L1027
+.LVL1197:
+.L1029:
 	.loc 2 2560 0 is_stmt 1
 	ldrh	r2, [r6]
 	ldrh	r3, [r8]
 	add	r3, r3, r2
 	ldrh	r2, [fp]
 	cmp	r3, r2
-	ble	.L1030
+	ble	.L1031
 	.loc 2 2560 0 is_stmt 0 discriminator 1
 	mov	r2, #2560
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1196:
-.L1030:
+.LVL1198:
+.L1031:
 	.loc 2 2564 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1061+32
+	ldr	r3, .L1062+32
 	movs	r6, #0
 	.loc 2 2563 0 discriminator 1
-	ldr	r2, .L1061+36
+	ldr	r2, .L1062+36
 	add	ip, r4, #16
 	.loc 2 2564 0 discriminator 1
 	mov	lr, r6
@@ -12761,51 +12788,51 @@ allocate_data_superblock:
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
-.L1031:
-.LVL1197:
+.L1032:
+.LVL1199:
 	.loc 2 2563 0 discriminator 1
 	ldr	r2, [sp]
 	cmp	r2, r3
-	bne	.L1033
+	bne	.L1034
 	.loc 2 2571 0
-	cbnz	r6, .L1034
+	cbnz	r6, .L1035
 	.loc 2 2571 0 is_stmt 0 discriminator 1
 	movw	r2, #2571
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1198:
-.L1034:
+.LVL1200:
+.L1035:
 	.loc 2 2573 0 is_stmt 1
-	ldr	r3, .L1061+40
+	ldr	r3, .L1062+40
 	ldrh	r3, [r3]
 	cmp	r3, r7
-	bne	.L1035
+	bne	.L1036
 	.loc 2 2573 0 is_stmt 0 discriminator 1
 	movw	r2, #2573
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1199:
-.L1035:
+.LVL1201:
+.L1036:
 	.loc 2 2574 0 is_stmt 1
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	uxth	r5, r5
-	ldr	r2, .L1061+44
-	ldr	r3, .L1061+48
-	ldr	r10, .L1061+80
+	ldr	r2, .L1062+44
+	ldr	r3, .L1062+48
+	ldr	r10, .L1062+80
 	cmp	r1, #0
-	bne	.L1036
+	bne	.L1037
 	.loc 2 2575 0
 	ldr	r0, [r2]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
-	beq	.L1037
+	beq	.L1038
 	.loc 2 2576 0
-	ldr	r1, .L1061+52
+	ldr	r1, .L1062+52
 	ldrh	ip, [r1]
 	add	r1, lr, ip
-.L1060:
+.L1061:
 	.loc 2 2578 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
 	.loc 2 2580 0
@@ -12819,16 +12846,16 @@ allocate_data_superblock:
 	.loc 2 2580 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
-.LVL1200:
+.LVL1202:
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
-.L1039:
+.L1040:
 	.loc 2 2587 0
 	ldr	r2, [r2]
 	lsls	r1, r5, #1
 	str	r1, [sp]
 	ldrh	r0, [r2, r5, lsl #1]
-	ldr	r2, .L1061+56
+	ldr	r2, .L1062+56
 	ldr	r1, [r2]
 	cmp	r0, r1
 	.loc 2 2590 0
@@ -12837,38 +12864,38 @@ allocate_data_superblock:
 	it	hi
 	strhi	r0, [r2]
 	.loc 2 2590 0
-	ldr	r2, .L1061+52
+	ldr	r2, .L1062+52
 	ldr	r0, [r3]
 	ldr	r3, [r10]
 	ldrh	r2, [r2]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-.LVL1201:
-	ldr	r3, .L1061+60
+.LVL1203:
+	ldr	r3, .L1062+60
 	.loc 2 2594 0
-	ldr	ip, .L1061+84
+	ldr	ip, .L1062+84
 	.loc 2 2590 0
 	str	r0, [r3]
 	.loc 2 2591 0
-	ldr	r3, .L1061+64
+	ldr	r3, .L1062+64
 	ldr	r2, [r3]
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
-.LVL1202:
+.LVL1204:
 	movs	r2, #20
 	.loc 2 2594 0
-	ldr	r3, .L1061+32
+	ldr	r3, .L1062+32
 	ldr	r0, [r3]
 	adds	r3, r0, #4
 	mla	r2, r2, r6, r0
 	adds	r2, r2, #24
-.LVL1203:
-.L1041:
+.LVL1205:
+.L1042:
 	adds	r3, r3, #20
 	.loc 2 2593 0 discriminator 1
 	cmp	r2, r3
-	bne	.L1042
+	bne	.L1043
 	.loc 2 2595 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
@@ -12876,32 +12903,32 @@ allocate_data_superblock:
 	mov	r10, #0
 	.loc 2 2595 0
 	bl	FlashEraseBlocks
-.LVL1204:
+.LVL1206:
 	.loc 2 2596 0
 	mov	r3, r10
 	.loc 2 2598 0
 	movs	r1, #20
-.LVL1205:
-.L1043:
+.LVL1207:
+.L1044:
 	.loc 2 2597 0 discriminator 1
 	uxth	r2, r10
 	cmp	r6, r2
-	bhi	.L1045
+	bhi	.L1046
 	.loc 2 2608 0
-	cbz	r3, .L1046
+	cbz	r3, .L1047
 	.loc 2 2609 0
 	mov	r0, r7
 	bl	update_multiplier_value
-.LVL1206:
+.LVL1208:
 	.loc 2 2610 0
 	bl	FtlBbmTblFlush
-.LVL1207:
-.L1046:
+.LVL1209:
+.L1047:
 	.loc 2 2613 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r1, .L1061+28
+	ldr	r1, .L1062+28
 	cmp	r2, #0
-	bne	.L1047
+	bne	.L1048
 	.loc 2 2615 0
 	ldr	r3, [r1]
 	movw	r2, #65535
@@ -12911,11 +12938,11 @@ allocate_data_superblock:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	.loc 2 2616 0
 	bl	INSERT_DATA_LIST
-.LVL1208:
+.LVL1210:
 	.loc 2 2617 0
-	b	.L1024
-.LVL1209:
-.L1033:
+	b	.L1025
+.LVL1211:
+.L1034:
 	.loc 2 2566 0
 	ldrh	r1, [ip], #2
 	.loc 2 2564 0
@@ -12924,26 +12951,26 @@ allocate_data_superblock:
 	str	lr, [r3, #12]
 	.loc 2 2566 0
 	cmp	r1, r10
-	beq	.L1032
+	beq	.L1033
 	.loc 2 2567 0
 	ldr	r2, [sp, #4]
 	lsls	r1, r1, #10
 	mla	r2, r2, r6, r0
 	.loc 2 2568 0
 	adds	r6, r6, #1
-.LVL1210:
+.LVL1212:
 	uxth	r6, r6
-.LVL1211:
+.LVL1213:
 	.loc 2 2567 0
 	str	r1, [r2, #4]
-.L1032:
+.L1033:
 	adds	r3, r3, #20
-	b	.L1031
-.L1037:
+	b	.L1032
+.L1038:
 	.loc 2 2578 0
 	movs	r1, #2
-	b	.L1060
-.L1036:
+	b	.L1061
+.L1037:
 	.loc 2 2582 0
 	ldr	r0, [r2]
 	str	r3, [sp, #4]
@@ -12951,56 +12978,56 @@ allocate_data_superblock:
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
-.LBB243:
-.LBB244:
+.LBB247:
+.LBB248:
 	mov	r0, r7
-.LBE244:
-.LBE243:
+.LBE248:
+.LBE247:
 	.loc 2 2583 0
 	ldr	r1, [r10]
 	adds	r1, r1, #1
 	str	r1, [r10]
-.LVL1212:
-.LBB246:
-.LBB245:
+.LVL1214:
+.LBB250:
+.LBB249:
 	bl	ftl_set_blk_mode.part.7
-.LVL1213:
+.LVL1215:
 	ldm	sp, {r2, r3}
-	b	.L1039
-.LVL1214:
-.L1042:
-.LBE245:
-.LBE246:
+	b	.L1040
+.LVL1216:
+.L1043:
+.LBE249:
+.LBE250:
 	.loc 2 2594 0 discriminator 3
 	ldr	r1, [r3, #-20]
 	and	r1, r1, ip
 	str	r1, [r3, #-20]
-	b	.L1041
-.LVL1215:
-.L1045:
+	b	.L1042
+.LVL1217:
+.L1046:
 	.loc 2 2598 0
-	ldr	r0, .L1061+32
+	ldr	r0, .L1062+32
 	mul	r2, r1, r10
 	ldr	r0, [r0]
 	add	ip, r0, r2
 	ldr	r2, [r0, r2]
 	adds	r0, r2, #1
-	bne	.L1044
+	bne	.L1045
 	.loc 2 2600 0
 	ldr	r0, [ip, #4]
 	.loc 2 2599 0
 	adds	r3, r3, #1
-.LVL1216:
+.LVL1218:
 	str	r1, [sp, #12]
 	str	r2, [sp, #8]
 	.loc 2 2601 0
 	ubfx	r0, r0, #10, #16
 	.loc 2 2599 0
 	str	r3, [sp, #4]
-.LVL1217:
+.LVL1219:
 	.loc 2 2601 0
 	bl	FtlBbmMapBadBlock
-.LVL1218:
+.LVL1220:
 	.loc 2 2602 0
 	ldr	r2, [sp, #8]
 	add	r0, r4, r10, lsl #1
@@ -13013,17 +13040,17 @@ allocate_data_superblock:
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	subs	r2, r2, #1
 	strb	r2, [r4, #7]
-.LVL1219:
-.L1044:
-	add	r10, r10, #1
-.LVL1220:
-	b	.L1043
 .LVL1221:
-.L1047:
+.L1045:
+	add	r10, r10, #1
+.LVL1222:
+	b	.L1044
+.LVL1223:
+.L1048:
 	.loc 2 2620 0
-	ldr	r3, .L1061+68
+	ldr	r3, .L1062+68
 	.loc 2 2624 0
-	ldr	r0, .L1061+72
+	ldr	r0, .L1062+72
 	.loc 2 2620 0
 	ldrh	r3, [r3]
 	.loc 2 2621 0
@@ -13050,28 +13077,28 @@ allocate_data_superblock:
 	strh	r3, [r2, r1]	@ movhi
 	.loc 2 2626 0
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1048
+	cbz	r3, .L1049
 	.loc 2 2626 0 is_stmt 0 discriminator 2
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1049
-.L1048:
+	cbnz	r3, .L1050
+.L1049:
 	.loc 2 2626 0 discriminator 3
 	movw	r2, #2626
-	ldr	r1, .L1061+8
-	ldr	r0, .L1061+12
+	ldr	r1, .L1062+8
+	ldr	r0, .L1062+12
 	bl	printf
-.LVL1222:
-.L1049:
+.LVL1224:
+.L1050:
 	.loc 2 2628 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1223:
-.L1062:
+.LVL1225:
+.L1063:
 	.align	2
-.L1061:
+.L1062:
 	.word	.LANCHOR48
 	.word	.LANCHOR45
 	.word	.LANCHOR158
@@ -13111,7 +13138,7 @@ FtlGcFreeBadSuperBlk:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1224:
+.LVL1226:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -13125,32 +13152,32 @@ FtlGcFreeBadSuperBlk:
 	.loc 5 390 0
 	mov	r10, r0
 	.loc 5 395 0
-	ldr	r4, .L1075
+	ldr	r4, .L1076
 	ldrh	r3, [r4]
-	cbz	r3, .L1064
-.LBB249:
-.LBB250:
+	cbz	r3, .L1065
+.LBB253:
+.LBB254:
 	.loc 5 399 0
-	ldr	r8, .L1075+16
-.LBE250:
-.LBE249:
+	ldr	r8, .L1076+16
+.LBE254:
+.LBE253:
 	movs	r6, #0
-.LVL1225:
-.L1065:
-.LBB253:
-.LBB251:
+.LVL1227:
+.L1066:
+.LBB257:
+.LBB255:
 	.loc 5 396 0
-	ldr	r3, .L1075+4
+	ldr	r3, .L1076+4
 	ldrh	r2, [r3]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1071
+	bhi	.L1072
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1226:
-.L1064:
-.LBE251:
-.LBE253:
+.LVL1228:
+.L1065:
+.LBE255:
+.LBE257:
 	.loc 5 415 0
 	movs	r0, #0
 	add	sp, sp, #8
@@ -13158,95 +13185,95 @@ FtlGcFreeBadSuperBlk:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1227:
-.L1071:
+.LVL1229:
+.L1072:
 	.cfi_restore_state
-.LBB254:
-.LBB252:
+.LBB258:
+.LBB256:
 	.loc 5 397 0
-	ldr	r2, .L1075+8
+	ldr	r2, .L1076+8
 	uxth	r3, r6
 	mov	r1, r10
 	movs	r7, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
-.LVL1228:
+.LVL1230:
 	.loc 5 401 0
-	ldr	r2, .L1075+12
+	ldr	r2, .L1076+12
 	.loc 5 397 0
 	mov	fp, r0
-.LVL1229:
-.L1066:
+.LVL1231:
+.L1067:
 	.loc 5 398 0
 	ldrh	r3, [r4]
 	uxth	r5, r7
-.LVL1230:
-	cmp	r3, r5
-	bhi	.L1070
-.LVL1231:
-	adds	r6, r6, #1
 .LVL1232:
-	b	.L1065
+	cmp	r3, r5
+	bhi	.L1071
 .LVL1233:
-.L1070:
+	adds	r6, r6, #1
+.LVL1234:
+	b	.L1066
+.LVL1235:
+.L1071:
 	.loc 5 399 0
 	uxth	r3, r7
 	ldrh	r1, [r8, r3, lsl #1]
 	cmp	r1, fp
-	bne	.L1067
+	bne	.L1068
 	.loc 5 401 0
 	mov	r1, fp
 	mov	r0, r2
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	bl	printf
-.LVL1234:
+.LVL1236:
 	.loc 5 403 0
 	mov	r0, fp
 	bl	FtlBbmMapBadBlock
-.LVL1235:
+.LVL1237:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1236:
+.LVL1238:
 	ldr	r3, [sp, #4]
 	.loc 5 405 0
 	ldrh	r1, [r4]
 	ldr	r2, [sp]
 	add	r3, r8, r3, lsl #1
-.LVL1237:
-.L1068:
+.LVL1239:
+.L1069:
 	cmp	r5, r1
-	bcc	.L1069
+	bcc	.L1070
 	.loc 5 407 0
 	subs	r1, r1, #1
 	strh	r1, [r4]	@ movhi
-.LVL1238:
-.L1067:
-	adds	r7, r7, #1
-.LVL1239:
-	b	.L1066
 .LVL1240:
-.L1069:
+.L1068:
+	adds	r7, r7, #1
+.LVL1241:
+	b	.L1067
+.LVL1242:
+.L1070:
 	.loc 5 406 0
 	ldrh	r0, [r3, #2]!
 	.loc 5 405 0
 	adds	r5, r5, #1
-.LVL1241:
+.LVL1243:
 	uxth	r5, r5
-.LVL1242:
+.LVL1244:
 	.loc 5 406 0
 	strh	r0, [r3, #-2]	@ movhi
-	b	.L1068
-.L1076:
+	b	.L1069
+.L1077:
 	.align	2
-.L1075:
+.L1076:
 	.word	.LANCHOR103
 	.word	.LANCHOR3
 	.word	.LANCHOR13
 	.word	.LC97
 	.word	.LANCHOR104
-.LBE252:
-.LBE254:
+.LBE256:
+.LBE258:
 	.cfi_endproc
 .LFE320:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -13264,7 +13291,7 @@ update_vpc_list:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1243:
+.LVL1245:
 	push	{r3, r4, r5, lr}
 	.cfi_def_cfa_offset 16
 	.cfi_offset 3, -16
@@ -13274,38 +13301,38 @@ update_vpc_list:
 	.loc 2 2687 0
 	mov	r4, r0
 	.loc 2 2688 0
-	ldr	r3, .L1087
+	ldr	r3, .L1088
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1078
+	bne	.L1079
 	.loc 2 2689 0
-	ldr	r2, .L1087+4
+	ldr	r2, .L1088+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
-	bne	.L1079
+	bne	.L1080
 	.loc 2 2691 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L1080:
-.LVL1244:
-.LBB257:
-.LBB258:
+.L1081:
+.LVL1246:
+.LBB261:
+.LBB262:
 	.loc 2 2696 0
-	ldr	r5, .L1087+8
+	ldr	r5, .L1088+8
 	mov	r1, r4
-	ldr	r0, .L1087+12
-.LVL1245:
+	ldr	r0, .L1088+12
+.LVL1247:
 	bl	List_remove_node
-.LVL1246:
+.LVL1248:
 	ldrh	r3, [r5]
-	cbnz	r3, .L1082
+	cbnz	r3, .L1083
 	movw	r2, #2696
-	ldr	r1, .L1087+16
-	ldr	r0, .L1087+20
+	ldr	r1, .L1088+16
+	ldr	r0, .L1088+20
 	bl	printf
-.LVL1247:
-.L1082:
+.LVL1249:
+.L1083:
 	ldrh	r3, [r5]
 	.loc 2 2697 0
 	mov	r0, r4
@@ -13314,63 +13341,63 @@ update_vpc_list:
 	strh	r3, [r5]	@ movhi
 	.loc 2 2697 0
 	bl	free_data_superblock
-.LVL1248:
+.LVL1250:
 	.loc 2 2698 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-.LVL1249:
+.LVL1251:
 	.loc 2 2699 0
-	ldr	r3, .L1087+24
+	ldr	r3, .L1088+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	add	r3, r3, r2
-	ldr	r2, .L1087+28
+	ldr	r2, .L1088+28
 	ldrh	r2, [r2]
 	cmp	r3, r2
-	ble	.L1086
+	ble	.L1087
 	movw	r2, #2699
-	ldr	r1, .L1087+16
-	ldr	r0, .L1087+20
+	ldr	r1, .L1088+16
+	ldr	r0, .L1088+20
 	bl	printf
-.LVL1250:
-.L1086:
+.LVL1252:
+.L1087:
 	movs	r3, #1
-	b	.L1077
-.LVL1251:
-.L1079:
-.LBE258:
-.LBE257:
+	b	.L1078
+.LVL1253:
+.L1080:
+.LBE262:
+.LBE261:
 	.loc 2 2692 0
-	ldr	r2, .L1087+32
+	ldr	r2, .L1088+32
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1077
+	beq	.L1078
 	.loc 2 2692 0 is_stmt 0 discriminator 1
-	ldr	r2, .L1087+36
+	ldr	r2, .L1088+36
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	beq	.L1077
+	beq	.L1078
 	.loc 2 2692 0 discriminator 2
-	ldr	r2, .L1087+40
+	ldr	r2, .L1088+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
-	bne	.L1080
-.LVL1252:
-.L1077:
+	bne	.L1081
+.LVL1254:
+.L1078:
 	.loc 2 2705 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.LVL1253:
-.L1078:
+.LVL1255:
+.L1079:
 	.loc 2 2702 0
 	bl	List_update_data_list
-.LVL1254:
+.LVL1256:
 	.loc 2 2704 0
 	movs	r3, #0
-	b	.L1077
-.L1088:
+	b	.L1078
+.L1089:
 	.align	2
-.L1087:
+.L1088:
 	.word	.LANCHOR43
 	.word	.LANCHOR82
 	.word	.LANCHOR45
@@ -13399,7 +13426,7 @@ decrement_vpc_count:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1255:
+.LVL1257:
 	.loc 2 2711 0
 	movw	r3, #65535
 	.loc 2 2708 0
@@ -13414,75 +13441,75 @@ decrement_vpc_count:
 	.loc 2 2708 0
 	mov	r4, r0
 	.loc 2 2711 0
-	beq	.L1090
+	beq	.L1091
 	.loc 2 2712 0
-	ldr	r5, .L1098
+	ldr	r5, .L1099
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1091
+	cbnz	r2, .L1092
 	.loc 2 2713 0
 	mov	r1, r0
-	ldr	r0, .L1098+4
-.LVL1256:
+	ldr	r0, .L1099+4
+.LVL1258:
 	bl	printf
-.LVL1257:
+.LVL1259:
 	.loc 2 2714 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
-	cbz	r5, .L1092
-.L1096:
+	cbz	r5, .L1093
+.L1097:
 	.loc 2 2723 0
 	movs	r5, #0
-.LVL1258:
-.L1089:
+.LVL1260:
+.L1090:
 	.loc 2 2733 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.LVL1259:
-.L1092:
+.LVL1261:
+.L1093:
 	.loc 2 2714 0 discriminator 1
 	movw	r2, #2714
-.LVL1260:
-.L1097:
+.LVL1262:
+.L1098:
 	.loc 2 2730 0 discriminator 2
-	ldr	r1, .L1098+8
-	ldr	r0, .L1098+12
+	ldr	r1, .L1099+8
+	ldr	r0, .L1099+12
 	bl	printf
-.LVL1261:
-	b	.L1089
-.LVL1262:
-.L1091:
+.LVL1263:
+	b	.L1090
+.LVL1264:
+.L1092:
 	.loc 2 2717 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
-.L1090:
+.L1091:
 	.loc 2 2721 0
-	ldr	r6, .L1098+16
+	ldr	r6, .L1099+16
 	movw	r3, #65535
 	ldrh	r0, [r6]
-.LVL1263:
+.LVL1265:
 	cmp	r0, r3
-	bne	.L1094
+	bne	.L1095
 	.loc 2 2722 0
 	strh	r4, [r6]	@ movhi
-	b	.L1096
-.L1094:
+	b	.L1097
+.L1095:
 	.loc 2 2724 0
 	cmp	r4, r0
-	beq	.L1096
+	beq	.L1097
 	.loc 2 2727 0
 	bl	update_vpc_list
-.LVL1264:
+.LVL1266:
 	.loc 2 2730 0
-	ldr	r3, .L1098+20
+	ldr	r3, .L1099+20
 	.loc 2 2727 0
 	adds	r5, r0, #0
 	.loc 2 2730 0
-	ldr	r2, .L1098+24
+	ldr	r2, .L1099+24
 	.loc 2 2727 0
 	it	ne
 	movne	r5, #1
-.LVL1265:
+.LVL1267:
 	.loc 2 2729 0
 	strh	r4, [r6]	@ movhi
 	.loc 2 2730 0
@@ -13490,23 +13517,23 @@ decrement_vpc_count:
 	ldr	r2, [r2]
 	subs	r3, r3, r2
 	asrs	r2, r3, #1
-	ldr	r3, .L1098+28
+	ldr	r3, .L1099+28
 	muls	r3, r2, r3
-	ldr	r2, .L1098
+	ldr	r2, .L1099
 	ldr	r2, [r2]
 	uxth	r1, r3
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
-	bne	.L1089
+	bne	.L1090
 	.loc 2 2730 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
-	beq	.L1089
+	beq	.L1090
 	.loc 2 2730 0 discriminator 2
 	movw	r2, #2730
-	b	.L1097
-.L1099:
+	b	.L1098
+.L1100:
 	.align	2
-.L1098:
+.L1099:
 	.word	.LANCHOR43
 	.word	.LC98
 	.word	.LANCHOR160
@@ -13545,36 +13572,36 @@ FtlWriteDump_data:
 	sub	sp, sp, #24
 	.cfi_def_cfa_offset 56
 	.loc 2 948 0
-	ldr	r4, .L1119
+	ldr	r4, .L1120
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1101
+	beq	.L1102
 	.loc 2 948 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1101
+	bne	.L1102
 	.loc 2 949 0 is_stmt 1
-	ldr	r3, .L1119+4
+	ldr	r3, .L1120+4
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1101
-.LVL1266:
-.LBB262:
-.LBB263:
+	beq	.L1102
+.LVL1268:
+.LBB266:
+.LBB267:
 	.loc 2 956 0
 	ldrb	r7, [r4, #10]	@ zero_extendqisi2
-	cbnz	r7, .L1100
+	cbnz	r7, .L1101
 	.loc 2 951 0
-	ldr	r3, .L1119+8
+	ldr	r3, .L1120+8
 	.loc 2 958 0
 	mov	r2, r7
 	mov	r1, sp
 	.loc 2 951 0
 	ldr	r6, [r3]
 	.loc 2 953 0
-	ldr	r3, .L1119+12
+	ldr	r3, .L1120+12
 	.loc 2 951 0
 	subs	r6, r6, #1
 	.loc 2 958 0
@@ -13583,9 +13610,9 @@ FtlWriteDump_data:
 	ldrh	r8, [r3]
 	.loc 2 958 0
 	bl	log2phys
-.LVL1267:
+.LVL1269:
 	.loc 2 963 0
-	ldr	r2, .L1119+16
+	ldr	r2, .L1120+16
 	.loc 2 961 0
 	ldr	r3, [sp]
 	.loc 2 962 0
@@ -13593,7 +13620,7 @@ FtlWriteDump_data:
 	.loc 2 963 0
 	ldr	r0, [r2]
 	.loc 2 964 0
-	ldr	r2, .L1119+20
+	ldr	r2, .L1120+20
 	.loc 2 961 0
 	str	r3, [sp, #8]
 	.loc 2 967 0
@@ -13603,67 +13630,67 @@ FtlWriteDump_data:
 	.loc 2 964 0
 	ldr	r5, [r2]
 	str	r5, [sp, #16]
-.LVL1268:
+.LVL1270:
 	.loc 2 966 0
 	str	r7, [r5, #4]
 	.loc 2 967 0
-	beq	.L1103
+	beq	.L1104
 	.loc 2 969 0
 	mov	r2, r7
 	movs	r1, #1
 	add	r0, sp, #4
 	bl	FlashReadPages
-.LVL1269:
-.L1104:
+.LVL1271:
+.L1105:
 	.loc 2 986 0
-	ldr	fp, .L1119
+	ldr	fp, .L1120
 	.loc 2 953 0
 	lsl	r8, r8, #2
-.LVL1270:
+.LVL1272:
 	.loc 2 987 0
-	ldr	r10, .L1119+28
+	ldr	r10, .L1120+28
 	.loc 2 975 0
 	movs	r7, #0
 	movw	r3, #61589
 	strh	r3, [r5]	@ movhi
-.L1105:
+.L1106:
 	.loc 2 976 0
 	cmp	r8, r7
-	bne	.L1109
-.L1106:
+	bne	.L1110
+.L1107:
 	.loc 2 992 0
 	movs	r3, #1
-.LVL1271:
-.L1118:
-.LBE263:
-.LBE262:
+.LVL1273:
+.L1119:
+.LBE267:
+.LBE266:
 	.loc 2 998 0
 	strb	r3, [r4, #10]
-.L1100:
+.L1101:
 	.loc 2 1000 0
 	add	sp, sp, #24
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1272:
-.L1103:
+.LVL1274:
+.L1104:
 	.cfi_restore_state
-.LBB265:
-.LBB264:
+.LBB269:
+.LBB268:
 	.loc 2 973 0
-	ldr	r3, .L1119+24
+	ldr	r3, .L1120+24
 	movs	r1, #255
 	ldrh	r2, [r3]
 	bl	ftl_memset
-.LVL1273:
-	b	.L1104
-.LVL1274:
-.L1109:
+.LVL1275:
+	b	.L1105
+.LVL1276:
+.L1110:
 	.loc 2 978 0
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	beq	.L1106
+	beq	.L1107
 	.loc 2 983 0
 	ldr	r3, [sp, #8]
 	.loc 2 986 0
@@ -13678,7 +13705,7 @@ FtlWriteDump_data:
 	strh	r3, [r5, #2]	@ movhi
 	.loc 2 986 0
 	bl	get_new_active_ppa
-.LVL1275:
+.LVL1277:
 	.loc 2 987 0
 	ldr	r3, [r10]
 	.loc 2 988 0
@@ -13698,22 +13725,22 @@ FtlWriteDump_data:
 	movs	r3, #0
 	mov	r2, r3
 	bl	FlashProgPages
-.LVL1276:
+.LVL1278:
 	.loc 2 990 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1277:
-	b	.L1105
-.LVL1278:
-.L1101:
-.LBE264:
-.LBE265:
+.LVL1279:
+	b	.L1106
+.LVL1280:
+.L1102:
+.LBE268:
+.LBE269:
 	.loc 2 998 0
 	movs	r3, #0
-	b	.L1118
-.L1120:
+	b	.L1119
+.L1121:
 	.align	2
-.L1119:
+.L1120:
 	.word	.LANCHOR51
 	.word	.LANCHOR19
 	.word	.LANCHOR62
@@ -13747,25 +13774,25 @@ l2p_flush:
 	.cfi_offset 14, -4
 	.loc 2 746 0
 	movs	r4, #0
-	ldr	r5, .L1125
+	ldr	r5, .L1126
 	.loc 2 747 0
-	ldr	r6, .L1125+4
+	ldr	r6, .L1126+4
 	.loc 2 744 0
 	bl	FtlWriteDump_data
-.LVL1279:
-.L1122:
+.LVL1281:
+.L1123:
 	.loc 2 746 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1280:
+.LVL1282:
 	cmp	r3, r0
-	bhi	.L1124
+	bhi	.L1125
 	.loc 2 750 0
 	movs	r0, #0
-.LVL1281:
+.LVL1283:
 	pop	{r4, r5, r6, pc}
-.LVL1282:
-.L1124:
+.LVL1284:
+.L1125:
 	.loc 2 747 0
 	ldr	r2, [r6]
 	uxth	r3, r4
@@ -13773,17 +13800,17 @@ l2p_flush:
 	mla	r3, r1, r3, r2
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1123
+	bge	.L1124
 	.loc 2 748 0
 	bl	flush_l2p_region
-.LVL1283:
-.L1123:
+.LVL1285:
+.L1124:
 	adds	r4, r4, #1
-.LVL1284:
-	b	.L1122
-.L1126:
+.LVL1286:
+	b	.L1123
+.L1127:
 	.align	2
-.L1125:
+.L1126:
 	.word	.LANCHOR33
 	.word	.LANCHOR56
 	.cfi_endproc
@@ -13803,7 +13830,7 @@ FtlRecoverySuperblock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1285:
+.LVL1287:
 	.loc 2 1670 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
@@ -13823,32 +13850,32 @@ FtlRecoverySuperblock:
 	.cfi_def_cfa_offset 80
 	.loc 2 1670 0
 	cmp	r3, r2
-	beq	.L1256
+	beq	.L1257
 	.loc 2 1675 0
 	ldrh	r3, [r0, #2]
 	str	r3, [sp, #4]
-.LVL1286:
+.LVL1288:
 	.loc 2 1676 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	.loc 2 1681 0
 	ldr	r1, [sp, #4]
 	.loc 2 1676 0
 	str	r3, [sp, #20]
-.LVL1287:
+.LVL1289:
 	.loc 2 1681 0
-	ldr	r3, .L1264
+	ldr	r3, .L1265
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L1130
+	bne	.L1131
 	.loc 2 1682 0
 	strh	r3, [r0, #4]	@ movhi
-.LVL1288:
-.L1262:
+.LVL1290:
+.L1263:
 	.loc 2 1989 0
 	strb	r3, [r8, #6]
-.LVL1289:
-.L1256:
+.LVL1291:
+.L1257:
 	.loc 2 2010 0
 	movs	r0, #0
 	add	sp, sp, #48
@@ -13856,35 +13883,35 @@ FtlRecoverySuperblock:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1290:
-.L1130:
+.LVL1292:
+.L1131:
 	.cfi_restore_state
 	.loc 2 1689 0
 	ldrh	r0, [r0, #16]
-.LVL1291:
-.L1131:
+.LVL1293:
+.L1132:
 	.loc 2 1690 0
 	cmp	r0, r2
 	uxth	r5, r3
-.LVL1292:
+.LVL1294:
 	add	r3, r3, #1
-	beq	.L1132
+	beq	.L1133
 	.loc 2 1697 0
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
-.LVL1293:
+.LVL1295:
 	mov	r4, r0
-.LVL1294:
+.LVL1296:
 	.loc 2 1705 0
 	adds	r0, r0, #1
-.LVL1295:
-	beq	.L1133
+.LVL1297:
+	beq	.L1134
 	.loc 2 1717 0
-	ldr	r3, .L1264+4
+	ldr	r3, .L1265+4
 	.loc 2 1722 0
 	movs	r2, #0
 	mov	r5, r2
-.LVL1296:
+.LVL1298:
 	.loc 2 1719 0
 	movw	fp, #65535
 	.loc 2 1720 0
@@ -13892,37 +13919,37 @@ FtlRecoverySuperblock:
 	.loc 2 1717 0
 	ldrh	ip, [r3]
 	.loc 2 1720 0
-	ldr	r3, .L1264+8
+	ldr	r3, .L1265+8
 	ldr	r0, [r3]
 	.loc 2 1721 0
-	ldr	r3, .L1264+12
+	ldr	r3, .L1265+12
 	ldr	r3, [r3]
 	str	r3, [sp, #8]
-	ldr	r3, .L1264+16
+	ldr	r3, .L1265+16
 	ldrh	r7, [r3]
 	.loc 2 1722 0
-	ldr	r3, .L1264+20
+	ldr	r3, .L1265+20
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L1264+24
+	ldr	r3, .L1265+24
 	ldrh	lr, [r3]
 	add	r3, r8, #16
 	str	r3, [sp, #16]
 	str	r3, [sp]
-.L1134:
-.LVL1297:
+.L1135:
+.LVL1299:
 	.loc 2 1717 0 discriminator 1
 	uxth	r3, r2
 	cmp	ip, r3
-	bhi	.L1138
+	bhi	.L1139
 	.loc 2 1727 0
 	movs	r2, #0
-.LVL1298:
+.LVL1300:
 	mov	r1, r5
 	bl	FlashReadPages
-.LVL1299:
+.LVL1301:
 	.loc 2 1728 0
-	ldr	r2, .L1264+28
+	ldr	r2, .L1265+28
 	.loc 2 1742 0
 	uxth	r1, r4
 	.loc 2 1666 0
@@ -13933,44 +13960,44 @@ FtlRecoverySuperblock:
 	ldr	r3, [r2]
 	subs	r3, r3, #1
 	str	r3, [sp]
-.LVL1300:
+.LVL1302:
 	.loc 2 1730 0
-	ldr	r3, .L1264+8
-.LVL1301:
+	ldr	r3, .L1265+8
+.LVL1303:
 	ldr	r10, [r3]
 	.loc 2 1729 0
 	movs	r3, #0
 	mov	r7, r10
-.LVL1302:
-.L1139:
+.LVL1304:
+.L1140:
 	uxth	r1, r3
-.LVL1303:
+.LVL1305:
 	.loc 2 1729 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bhi	.L1144
+	bhi	.L1145
 	.loc 2 1745 0 is_stmt 1
-	bne	.L1142
+	bne	.L1143
 	.loc 2 1747 0
 	adds	r3, r4, #1
 	uxth	r3, r3
 	str	r3, [sp, #8]
-.LVL1304:
-.L1257:
+.LVL1306:
+.L1258:
 	.loc 2 1753 0
 	ldr	r0, [r10, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-.LVL1305:
+.LVL1307:
 	.loc 2 1758 0
-	ldr	r3, .L1264
+	ldr	r3, .L1265
 	.loc 2 1753 0
 	mov	r10, r0
-.LVL1306:
+.LVL1308:
 	.loc 2 1758 0
 	ldr	r2, [sp, #8]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1146
+	bne	.L1147
 	.loc 2 1759 0
 	ldrh	r3, [sp, #8]
 	strh	r3, [r8, #2]	@ movhi
@@ -13979,65 +14006,65 @@ FtlRecoverySuperblock:
 	strb	r3, [r8, #6]
 	.loc 2 1761 0
 	strh	r3, [r8, #4]	@ movhi
-.L1146:
+.L1147:
 	.loc 2 1764 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #4]
 	cmp	r3, r2
-	bne	.L1147
+	bne	.L1148
 	.loc 2 1764 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r10, r3
-	bne	.L1147
+	bne	.L1148
 	.loc 2 1765 0 is_stmt 1
 	ldr	r1, [sp, #8]
 	mov	r2, r10
-.LVL1307:
-.L1263:
+.LVL1309:
+.L1264:
 	.loc 2 2004 0
 	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-.LVL1308:
-	b	.L1256
-.LVL1309:
-.L1132:
+.LVL1310:
+	b	.L1257
+.LVL1311:
+.L1133:
 	.loc 2 1692 0
 	uxth	r1, r3
 	adds	r1, r1, #8
 	ldrh	r0, [r8, r1, lsl #1]
-.LVL1310:
-	b	.L1131
-.LVL1311:
-.L1133:
+.LVL1312:
+	b	.L1132
+.LVL1313:
+.L1134:
 	.loc 2 1706 0
 	ldr	r3, [sp, #4]
-	cbz	r3, .L1135
+	cbz	r3, .L1136
 	.loc 2 1706 0 is_stmt 0 discriminator 1
 	movw	r2, #1706
-	ldr	r1, .L1264+32
-	ldr	r0, .L1264+36
+	ldr	r1, .L1265+32
+	ldr	r0, .L1265+36
 	bl	printf
-.LVL1312:
-.L1135:
+.LVL1314:
+.L1136:
 	.loc 2 1707 0 is_stmt 1
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1136
+	cbz	r3, .L1137
 	.loc 2 1707 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L1136
+	beq	.L1137
 	.loc 2 1707 0 discriminator 2
 	movw	r2, #1707
-	ldr	r1, .L1264+32
-	ldr	r0, .L1264+36
+	ldr	r1, .L1265+32
+	ldr	r0, .L1265+36
 	bl	printf
-.LVL1313:
-.L1136:
+.LVL1315:
+.L1137:
 	.loc 2 1708 0 is_stmt 1
 	movs	r3, #0
 	strh	r3, [r8, #2]	@ movhi
-	b	.L1262
-.LVL1314:
-.L1138:
+	b	.L1263
+.LVL1316:
+.L1139:
 	.loc 2 1718 0
 	ldr	r1, [sp]
 	ldrh	r3, [r1], #2
@@ -14045,16 +14072,16 @@ FtlRecoverySuperblock:
 	cmp	r3, fp
 	.loc 2 1718 0
 	str	r1, [sp]
-.LVL1315:
+.LVL1317:
 	.loc 2 1719 0
-	beq	.L1137
+	beq	.L1138
 	.loc 2 1720 0
 	mla	r1, r10, r5, r0
 	.loc 2 1721 0
 	ldr	r6, [sp, #8]
 	.loc 2 1720 0
 	orr	r3, r4, r3, lsl #10
-.LVL1316:
+.LVL1318:
 	str	r3, [r1, #4]
 	.loc 2 1721 0
 	mul	r3, r7, r5
@@ -14068,96 +14095,96 @@ FtlRecoverySuperblock:
 	mul	r3, lr, r5
 	.loc 2 1723 0
 	adds	r5, r5, #1
-.LVL1317:
+.LVL1319:
 	uxth	r5, r5
-.LVL1318:
+.LVL1320:
 	.loc 2 1722 0
 	bic	r3, r3, #3
 	add	r3, r3, r6
 	str	r3, [r1, #12]
-.L1137:
-.LVL1319:
-	adds	r2, r2, #1
-.LVL1320:
-	b	.L1134
+.L1138:
 .LVL1321:
-.L1144:
+	adds	r2, r2, #1
+.LVL1322:
+	b	.L1135
+.LVL1323:
+.L1145:
 	.loc 2 1730 0
 	ldr	r1, [r7]
-.LVL1322:
-	cbnz	r1, .L1140
+.LVL1324:
+	cbnz	r1, .L1141
 	.loc 2 1731 0
 	ldr	r1, [r7, #12]
 	.loc 2 1732 0
 	ldr	r6, [r1, #4]
 	.loc 2 1731 0
 	str	r1, [sp, #8]
-.LVL1323:
+.LVL1325:
 	.loc 2 1732 0
 	adds	r1, r6, #1
-.LVL1324:
-	beq	.L1141
+.LVL1326:
+	beq	.L1142
 	.loc 2 1733 0
 	ldr	r1, [r2]
 	mov	r0, r6
 	bl	ftl_cmp_data_ver
-.LVL1325:
-	cbz	r0, .L1141
+.LVL1327:
+	cbz	r0, .L1142
 	.loc 2 1735 0
 	adds	r6, r6, #1
 	str	r6, [r2]
-.L1141:
+.L1142:
 	.loc 2 1738 0
 	ldr	r1, [sp, #8]
 	ldr	r1, [r1]
 	adds	r1, r1, #1
-	bne	.L1143
-.LVL1326:
-.L1142:
+	bne	.L1144
+.LVL1328:
+.L1143:
 	.loc 2 1752 0
 	uxth	r2, r4
 	.loc 2 1753 0
 	uxth	r3, r3
 	.loc 2 1752 0
 	str	r2, [sp, #8]
-.LVL1327:
+.LVL1329:
 	.loc 2 1753 0
 	movs	r2, #20
 	mla	r10, r2, r3, r10
-	b	.L1257
-.LVL1328:
-.L1140:
+	b	.L1258
+.LVL1330:
+.L1141:
 	.loc 2 1742 0
 	ldr	fp, [sp, #12]
-.LVL1329:
-.L1143:
+.LVL1331:
+.L1144:
 	adds	r3, r3, #1
-.LVL1330:
+.LVL1332:
 	adds	r7, r7, #20
-	b	.L1139
-.LVL1331:
-.L1147:
+	b	.L1140
+.LVL1333:
+.L1148:
 	.loc 2 1770 0
 	movw	r3, #65535
 	cmp	fp, r3
-	bne	.L1148
+	bne	.L1149
 	.loc 2 1770 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8, #8]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1149
-.L1148:
-.LVL1332:
-.LBB266:
+	bne	.L1150
+.L1149:
+.LVL1334:
+.LBB270:
 	.loc 2 1775 0 is_stmt 1
-	ldr	r3, .L1264+40
+	ldr	r3, .L1265+40
 	.loc 2 1774 0
 	uxth	r6, r4
-.LVL1333:
+.LVL1335:
 	.loc 2 1778 0
 	uxth	r4, r4
-.LVL1334:
+.LVL1336:
 	.loc 2 1785 0
-	ldr	r7, .L1264+8
+	ldr	r7, .L1265+8
 	.loc 2 1775 0
 	ldr	r2, [r3]
 	adds	r2, r2, #1
@@ -14165,7 +14192,7 @@ FtlRecoverySuperblock:
 	itt	eq
 	ldreq	r2, [sp]
 	streq	r2, [r3]
-.LVL1335:
+.LVL1337:
 	.loc 2 1778 0
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #7
@@ -14175,13 +14202,13 @@ FtlRecoverySuperblock:
 	subgt	r4, r6, #7
 	ldrle	r4, [sp, #4]
 	uxthgt	r4, r4
-.LVL1336:
-.L1152:
+.LVL1338:
+.L1153:
 	.loc 2 1780 0 discriminator 1
 	cmp	r4, r6
-	bhi	.L1162
+	bhi	.L1163
 	.loc 2 1782 0
-	ldr	r3, .L1264+4
+	ldr	r3, .L1265+4
 	.loc 2 1784 0
 	movw	lr, #65535
 	.loc 2 1785 0
@@ -14194,9 +14221,9 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #12]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L1163
-.LVL1337:
-.L1154:
+	b	.L1164
+.LVL1339:
+.L1155:
 	.loc 2 1783 0
 	ldr	r1, [sp, #12]
 	ldrh	r2, [r1], #2
@@ -14204,37 +14231,37 @@ FtlRecoverySuperblock:
 	cmp	r2, lr
 	.loc 2 1783 0
 	str	r1, [sp, #12]
-.LVL1338:
+.LVL1340:
 	.loc 2 1784 0
-	beq	.L1153
+	beq	.L1154
 	.loc 2 1785 0
 	mla	r1, ip, r5, r0
 	.loc 2 1786 0
 	adds	r5, r5, #1
-.LVL1339:
+.LVL1341:
 	.loc 2 1785 0
 	orr	r2, r4, r2, lsl #10
-.LVL1340:
+.LVL1342:
 	.loc 2 1786 0
 	uxth	r5, r5
-.LVL1341:
+.LVL1343:
 	.loc 2 1785 0
 	str	r2, [r1, #4]
-.L1153:
-.LVL1342:
+.L1154:
+.LVL1344:
 	adds	r3, r3, #1
-.LVL1343:
-.L1163:
+.LVL1345:
+.L1164:
 	.loc 2 1782 0 discriminator 1
 	uxth	r2, r3
 	cmp	fp, r2
-	bhi	.L1154
+	bhi	.L1155
 	.loc 2 1789 0
 	mov	r1, r5
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1344:
-	ldr	r3, .L1264+40
+.LVL1346:
+	ldr	r3, .L1265+40
 	movs	r1, #20
 	.loc 2 1790 0
 	movs	r0, #0
@@ -14243,24 +14270,24 @@ FtlRecoverySuperblock:
 	ldr	r2, [r3]
 	ldr	r3, [r7]
 	mla	r5, r1, r5, r3
-.LVL1345:
-.L1155:
+.LVL1347:
+.L1156:
 	.loc 2 1790 0 discriminator 1
 	cmp	r3, r5
-	bne	.L1160
-	cbz	r0, .L1161
-	ldr	r3, .L1264+40
+	bne	.L1161
+	cbz	r0, .L1162
+	ldr	r3, .L1265+40
 	str	r2, [r3]
-.L1161:
+.L1162:
 	.loc 2 1780 0
 	adds	r4, r4, #1
-.LVL1346:
+.LVL1348:
 	uxth	r4, r4
-.LVL1347:
-	b	.L1152
-.L1265:
+.LVL1349:
+	b	.L1153
+.L1266:
 	.align	2
-.L1264:
+.L1265:
 	.word	.LANCHOR19
 	.word	.LANCHOR3
 	.word	.LANCHOR120
@@ -14272,36 +14299,36 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR161
 	.word	.LC1
 	.word	.LANCHOR154
-.L1160:
+.L1161:
 	.loc 2 1791 0
 	ldr	r1, [r3]
 	cmp	r1, #0
-	beq	.L1156
-	cbz	r0, .L1149
-.L1258:
+	beq	.L1157
+	cbz	r0, .L1150
+.L1259:
 	.loc 2 1809 0
-	ldr	r3, .L1266
+	ldr	r3, .L1267
 	str	r2, [r3]
-.LVL1348:
-.L1149:
-.LBE266:
+.LVL1350:
+.L1150:
+.LBE270:
 	.loc 2 1814 0
-	ldr	r3, .L1266+4
+	ldr	r3, .L1267+4
 	movs	r2, #1
 	.loc 2 1815 0
-	ldr	r0, .L1266+8
+	ldr	r0, .L1267+8
 	.loc 2 1824 0
-	ldr	r6, .L1266+12
+	ldr	r6, .L1267+12
 	.loc 2 1814 0
 	strh	r2, [r3]	@ movhi
 	.loc 2 1815 0
 	bl	FtlMapBlkWriteDump_data
-.LVL1349:
+.LVL1351:
 	ldr	fp, [sp, #4]
-.LVL1350:
-.L1164:
+.LVL1352:
+.L1165:
 	.loc 2 1821 0
-	ldr	r3, .L1266+16
+	ldr	r3, .L1267+16
 	.loc 2 1823 0
 	movw	lr, #65535
 	.loc 2 1824 0
@@ -14313,41 +14340,41 @@ FtlRecoverySuperblock:
 	movs	r3, #0
 	.loc 2 1820 0
 	str	r3, [sp, #12]
-.LVL1351:
-.L1165:
+.LVL1353:
+.L1166:
 	.loc 2 1821 0 discriminator 1
 	uxth	r2, r3
 	cmp	r2, r4
-	bcc	.L1167
+	bcc	.L1168
 	.loc 2 1828 0
 	movs	r2, #0
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1352:
+.LVL1354:
 	.loc 2 1829 0
 	movs	r3, #0
-.LVL1353:
-.L1261:
+.LVL1355:
+.L1262:
 	str	r3, [sp, #24]
-.LVL1354:
+.LVL1356:
 	.loc 2 1829 0 is_stmt 0 discriminator 2
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #24]
 	cmp	r2, r3
-	bhi	.L1196
+	bhi	.L1197
 	.loc 2 1983 0 is_stmt 1
-	ldr	r3, .L1266+20
+	ldr	r3, .L1267+20
 	.loc 2 1982 0
 	add	fp, fp, #1
-.LVL1355:
+.LVL1357:
 	uxth	fp, fp
-.LVL1356:
+.LVL1358:
 	.loc 2 1983 0
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L1164
+	bne	.L1165
 	.loc 2 1986 0
-	ldr	r2, .L1266+16
+	ldr	r2, .L1267+16
 	.loc 2 1988 0
 	movw	r0, #65535
 	.loc 2 1985 0
@@ -14356,15 +14383,15 @@ FtlRecoverySuperblock:
 	strh	fp, [r8, #2]	@ movhi
 	.loc 2 1985 0
 	strh	r3, [r8, #4]	@ movhi
-.LVL1357:
+.LVL1359:
 	.loc 2 1986 0
 	ldrh	r2, [r2]
-.LVL1358:
-.L1197:
+.LVL1360:
+.L1198:
 	.loc 2 1986 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L1256
+	bcs	.L1257
 	.loc 2 1987 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	ldrh	r4, [r1], #2
@@ -14372,52 +14399,52 @@ FtlRecoverySuperblock:
 	cmp	r4, r0
 	.loc 2 1987 0
 	str	r1, [sp, #16]
-.LVL1359:
+.LVL1361:
 	add	r1, r3, #1
 	.loc 2 1988 0
-	bne	.L1262
+	bne	.L1263
 	mov	r3, r1
-.LVL1360:
-	b	.L1197
-.LVL1361:
-.L1156:
-.LBB267:
+.LVL1362:
+	b	.L1198
+.LVL1363:
+.L1157:
+.LBB271:
 	.loc 2 1792 0
 	ldr	r1, [r3, #12]
-.LVL1362:
+.LVL1364:
 	.loc 2 1793 0
 	ldrh	lr, [r1]
 	cmp	lr, ip
-	beq	.L1159
+	beq	.L1160
 	.loc 2 1795 0
 	ldr	r1, [r1, #4]
-.LVL1363:
+.LVL1365:
 	cmp	r1, #-1
 	itt	ne
 	movne	r2, r1
 	movne	r0, #1
-.L1159:
+.L1160:
 	adds	r3, r3, #20
-.LVL1364:
-	b	.L1155
-.LVL1365:
-.L1162:
+.LVL1366:
+	b	.L1156
+.LVL1367:
+.L1163:
 	.loc 2 1809 0
 	mov	r2, #-1
-	b	.L1258
-.LVL1366:
-.L1167:
-.LBE267:
+	b	.L1259
+.LVL1368:
+.L1168:
+.LBE271:
 	.loc 2 1822 0
 	ldrh	r2, [r1], #2
-.LVL1367:
+.LVL1369:
 	.loc 2 1823 0
 	cmp	r2, lr
-	beq	.L1166
+	beq	.L1167
 	.loc 2 1824 0
 	ldr	r5, [sp, #12]
 	orr	r2, fp, r2, lsl #10
-.LVL1368:
+.LVL1370:
 	mla	ip, r7, r5, r0
 	str	r2, [ip, #4]
 	.loc 2 1825 0
@@ -14425,13 +14452,13 @@ FtlRecoverySuperblock:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1369:
-.L1166:
-	adds	r3, r3, #1
-.LVL1370:
-	b	.L1165
 .LVL1371:
-.L1196:
+.L1167:
+	adds	r3, r3, #1
+.LVL1372:
+	b	.L1166
+.LVL1373:
+.L1197:
 	ldr	r3, [sp, #24]
 	movs	r5, #20
 	muls	r5, r3, r5
@@ -14446,87 +14473,87 @@ FtlRecoverySuperblock:
 	str	r4, [sp, #44]
 	.loc 2 1831 0
 	bl	P2V_plane
-.LVL1372:
+.LVL1374:
 	.loc 2 1833 0
 	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bcc	.L1169
+	bcc	.L1170
 	.loc 2 1833 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
-	bne	.L1170
+	bne	.L1171
 	.loc 2 1834 0 is_stmt 1
 	ldr	r2, [sp, #20]
 	cmp	r2, r0
-	bhi	.L1169
-.L1170:
+	bhi	.L1170
+.L1171:
 	.loc 2 1837 0
 	ldr	r2, [sp, #8]
 	cmp	fp, r2
-	bne	.L1171
+	bne	.L1172
 	.loc 2 1837 0 is_stmt 0 discriminator 1
 	cmp	r10, r0
-	beq	.L1172
-.L1171:
-.LVL1373:
+	beq	.L1173
+.L1172:
+.LVL1375:
 	.loc 2 1841 0 is_stmt 1
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1173
+	beq	.L1174
 	.loc 2 1842 0
 	ldr	r3, [r7, #12]
-.LVL1374:
+.LVL1376:
 	.loc 2 1843 0
 	movw	r2, #61589
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L1174
-.LVL1375:
-.L1180:
-.LBB268:
+	beq	.L1175
+.LVL1377:
+.L1181:
+.LBB272:
 	.loc 2 1876 0
 	ldrh	r0, [r8]
-.LVL1376:
-.L1260:
-.LBE268:
+.LVL1378:
+.L1261:
+.LBE272:
 	.loc 2 1960 0
 	bl	decrement_vpc_count
-.LVL1377:
-.L1169:
+.LVL1379:
+.L1170:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1261
-.LVL1378:
-.L1174:
+	b	.L1262
+.LVL1380:
+.L1175:
 	.loc 2 1849 0
 	ldr	r2, [r3, #4]
 	str	r2, [sp]
-.LVL1379:
+.LVL1381:
 	.loc 2 1850 0
 	adds	r2, r2, #1
-.LVL1380:
-	beq	.L1175
+.LVL1382:
+	beq	.L1176
 	.loc 2 1851 0 discriminator 1
-	ldr	r2, .L1266+24
+	ldr	r2, .L1267+24
 	ldr	r0, [sp]
-.LVL1381:
+.LVL1383:
 	ldr	r1, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1382:
+.LVL1384:
 	.loc 2 1850 0 discriminator 1
-	cbz	r0, .L1175
+	cbz	r0, .L1176
 	.loc 2 1853 0
 	ldr	r1, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
-.L1175:
+.L1176:
 	.loc 2 1857 0
 	ldr	r4, [r3, #8]
-.LVL1383:
+.LVL1385:
 	.loc 2 1859 0
 	add	r1, sp, #40
 	.loc 2 1858 0
 	ldr	r3, [r3, #12]
-.LVL1384:
+.LVL1386:
 	.loc 2 1859 0
 	movs	r2, #0
 	mov	r0, r4
@@ -14534,24 +14561,24 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #36]
 	.loc 2 1859 0
 	bl	log2phys
-.LVL1385:
+.LVL1387:
 	.loc 2 1860 0
-	ldr	r3, .L1266
+	ldr	r3, .L1267
 	ldr	r1, [r3]
 	adds	r3, r1, #1
-	beq	.L1176
+	beq	.L1177
 	.loc 2 1861 0 discriminator 1
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1386:
+.LVL1388:
 	.loc 2 1860 0 discriminator 1
 	cmp	r0, #0
-	beq	.L1176
-.LBB269:
+	beq	.L1177
+.LBB273:
 	.loc 2 1865 0
 	ldr	r3, [sp, #36]
 	adds	r7, r3, #1
-	beq	.L1177
+	beq	.L1178
 	.loc 2 1866 0
 	ldr	r0, [r6]
 	.loc 2 1868 0
@@ -14563,18 +14590,18 @@ FtlRecoverySuperblock:
 	str	r3, [r0, #4]
 	.loc 2 1866 0
 	ldr	r7, [r0, #12]
-.LVL1387:
+.LVL1389:
 	.loc 2 1868 0
 	bl	FlashReadPages
-.LVL1388:
+.LVL1390:
 	.loc 2 1881 0
 	ldr	r2, [r6]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L1178
-.LVL1389:
-.L1179:
+	bne	.L1179
+.LVL1391:
+.L1180:
 	.loc 2 1913 0
 	mov	r3, #-1
 	.loc 2 1914 0
@@ -14583,67 +14610,67 @@ FtlRecoverySuperblock:
 	str	r3, [sp, #36]
 	.loc 2 1914 0
 	bl	decrement_vpc_count
-.LVL1390:
-.L1187:
-.LBE269:
+.LVL1392:
+.L1188:
+.LBE273:
 	.loc 2 1954 0
 	ldr	r7, [sp, #36]
 	adds	r0, r7, #1
-	beq	.L1169
-.L1200:
+	beq	.L1170
+.L1201:
 	.loc 2 1956 0
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1391:
+.LVL1393:
 	.loc 2 1957 0
-	ldr	r3, .L1266+28
+	ldr	r3, .L1267+28
 	.loc 2 1956 0
 	mov	r4, r0
-.LVL1392:
+.LVL1394:
 	.loc 2 1957 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L1192
+	bhi	.L1193
 	.loc 2 1957 0 is_stmt 0 discriminator 1
 	movw	r2, #1957
-	ldr	r1, .L1266+32
-	ldr	r0, .L1266+36
-.LVL1393:
+	ldr	r1, .L1267+32
+	ldr	r0, .L1267+36
+.LVL1395:
 	bl	printf
-.LVL1394:
-.L1192:
+.LVL1396:
+.L1193:
 	.loc 2 1958 0 is_stmt 1
-	ldr	r3, .L1266+40
+	ldr	r3, .L1267+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L1193
+	beq	.L1194
 	.loc 2 1960 0
 	mov	r0, r4
-	b	.L1260
-.LVL1395:
-.L1177:
-.LBB270:
+	b	.L1261
+.LVL1397:
+.L1178:
+.LBB274:
 	.loc 2 1872 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	bne	.L1180
+	bne	.L1181
 	.loc 2 1873 0
 	movs	r2, #1
 	add	r1, sp, #36
 	mov	r0, r4
 	bl	log2phys
-.LVL1396:
-	b	.L1180
-.LVL1397:
-.L1178:
+.LVL1398:
+	b	.L1181
+.LVL1399:
+.L1179:
 	.loc 2 1881 0 discriminator 1
 	ldr	r1, [r7, #8]
 	cmp	r4, r1
-	bne	.L1179
+	bne	.L1180
 	.loc 2 1882 0 discriminator 2
-	ldr	r0, .L1266
+	ldr	r0, .L1267
 	.loc 2 1869 0 discriminator 2
 	ldr	r1, [r7, #4]
 	.loc 2 1882 0 discriminator 2
@@ -14652,31 +14679,31 @@ FtlRecoverySuperblock:
 	str	r1, [sp, #28]
 	.loc 2 1882 0 discriminator 2
 	bl	ftl_cmp_data_ver
-.LVL1398:
+.LVL1400:
 	.loc 2 1881 0 discriminator 2
 	cmp	r0, #0
-	beq	.L1179
+	beq	.L1180
 	.loc 2 1883 0
 	ldr	r1, [sp, #40]
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	bne	.L1182
-.L1185:
+	bne	.L1183
+.L1186:
 	.loc 2 1909 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-.LVL1399:
-	b	.L1179
-.L1182:
+.LVL1401:
+	b	.L1180
+.L1183:
 	.loc 2 1886 0
 	ldr	r0, [sp, #36]
 	cmp	r1, r0
-	beq	.L1179
+	beq	.L1180
 	.loc 2 1887 0
 	adds	r0, r1, #1
-	beq	.L1183
-.LVL1400:
+	beq	.L1184
+.LVL1402:
 	.loc 2 1889 0
 	str	r1, [r3, #4]
 	.loc 2 1890 0
@@ -14687,41 +14714,41 @@ FtlRecoverySuperblock:
 	ldr	r7, [r3, #12]
 	.loc 2 1890 0
 	bl	FlashReadPages
-.LVL1401:
-.L1184:
+.LVL1403:
+.L1185:
 	.loc 2 1895 0
 	ldr	r3, [r6]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L1185
+	beq	.L1186
 	.loc 2 1896 0
 	ldr	r3, [r7, #4]
-.LVL1402:
+.LVL1404:
 	.loc 2 1897 0
-	ldr	r2, .L1266
+	ldr	r2, .L1267
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
-.LVL1403:
+.LVL1405:
 	cmp	r0, #0
-	beq	.L1185
+	beq	.L1186
 	.loc 2 1898 0
 	mov	r1, r3
 	ldr	r0, [sp, #28]
 	bl	ftl_cmp_data_ver
-.LVL1404:
-	cmp	r0, #0
-	beq	.L1179
-.LVL1405:
-	b	.L1185
 .LVL1406:
-.L1183:
+	cmp	r0, #0
+	beq	.L1180
+.LVL1407:
+	b	.L1186
+.LVL1408:
+.L1184:
 	.loc 2 1892 0
 	str	r1, [r2, r5]
-	b	.L1184
-.L1267:
+	b	.L1185
+.L1268:
 	.align	2
-.L1266:
+.L1267:
 	.word	.LANCHOR154
 	.word	.LANCHOR162
 	.word	.LANCHOR144
@@ -14733,55 +14760,55 @@ FtlRecoverySuperblock:
 	.word	.LANCHOR161
 	.word	.LC1
 	.word	.LANCHOR43
-.LVL1407:
-.L1176:
-.LBE270:
+.LVL1409:
+.L1177:
+.LBE274:
 	.loc 2 1915 0
 	ldr	r3, [sp, #44]
 	ldr	r2, [sp, #40]
 	cmp	r2, r3
-	beq	.L1187
+	beq	.L1188
 	.loc 2 1917 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-.LVL1408:
+.LVL1410:
 	.loc 2 1918 0
 	ldr	r7, [sp, #40]
 	adds	r5, r7, #1
-	beq	.L1187
+	beq	.L1188
 	.loc 2 1918 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r7, r3
-	beq	.L1200
+	beq	.L1201
 	.loc 2 1919 0 is_stmt 1
 	ubfx	r0, r7, #10, #16
 	bl	P2V_block_in_plane
-.LVL1409:
+.LVL1411:
 	.loc 2 1921 0
-	ldr	r3, .L1268
+	ldr	r3, .L1269
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1191
+	beq	.L1192
 	.loc 2 1922 0 discriminator 1
-	ldr	r3, .L1268+4
+	ldr	r3, .L1269+4
 	.loc 2 1921 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L1191
+	beq	.L1192
 	.loc 2 1923 0
-	ldr	r3, .L1268+8
+	ldr	r3, .L1269+8
 	.loc 2 1922 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1187
-.L1191:
-.LVL1410:
-.LBB271:
+	bne	.L1188
+.L1192:
+.LVL1412:
+.LBB275:
 	.loc 2 1927 0
 	ldr	r0, [r6]
-.LVL1411:
+.LVL1413:
 	.loc 2 1930 0
 	movs	r2, #0
 	movs	r1, #1
@@ -14789,80 +14816,80 @@ FtlRecoverySuperblock:
 	str	r7, [r0, #4]
 	.loc 2 1927 0
 	ldr	r5, [r0, #12]
-.LVL1412:
+.LVL1414:
 	.loc 2 1930 0
 	bl	FlashReadPages
-.LVL1413:
+.LVL1415:
 	.loc 2 1933 0
 	ldr	r3, [r6]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L1187
+	beq	.L1188
 	.loc 2 1934 0
 	ldr	r1, [r5, #4]
 	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
-.LVL1414:
+.LVL1416:
 	cmp	r0, #0
-	bne	.L1187
+	bne	.L1188
 	.loc 2 1941 0
 	movs	r2, #1
 	add	r1, sp, #40
-.LVL1415:
+.LVL1417:
 	mov	r0, r4
 	bl	log2phys
-.LVL1416:
-	b	.L1187
-.LVL1417:
-.L1193:
-.LBE271:
+.LVL1418:
+	b	.L1188
+.LVL1419:
+.L1194:
+.LBE275:
 	.loc 2 1962 0
 	mov	r1, r4
-	ldr	r0, .L1268+12
+	ldr	r0, .L1269+12
 	bl	printf
-.LVL1418:
-	b	.L1169
-.LVL1419:
-.L1173:
+.LVL1420:
+	b	.L1170
+.LVL1421:
+.L1174:
 	.loc 2 1969 0
-	ldr	r3, .L1268+16
+	ldr	r3, .L1269+16
 	ldr	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1194
+	bhi	.L1195
 	.loc 2 1970 0
-	ldr	r2, .L1268+20
+	ldr	r2, .L1269+20
 	str	r4, [r2, r3, lsl #2]
 	.loc 2 1971 0
 	adds	r3, r3, #1
-	ldr	r2, .L1268+16
+	ldr	r2, .L1269+16
 	str	r3, [r2]
-.L1194:
+.L1195:
 	.loc 2 1973 0
 	ldrh	r0, [r8]
-.LVL1420:
+.LVL1422:
 	bl	decrement_vpc_count
-.LVL1421:
+.LVL1423:
 	.loc 2 1975 0
-	ldr	r3, .L1268+24
+	ldr	r3, .L1269+24
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L1195
+	bne	.L1196
 	.loc 2 1976 0
 	ldr	r2, [sp]
-.L1259:
+.L1260:
 	.loc 2 1978 0
 	str	r2, [r3]
-	b	.L1169
-.L1195:
+	b	.L1170
+.L1196:
 	.loc 2 1977 0
 	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L1169
+	bcs	.L1170
 	.loc 2 1978 0
 	mov	r2, r1
-	b	.L1259
-.LVL1422:
-.L1172:
+	b	.L1260
+.LVL1424:
+.L1173:
 	.loc 2 2002 0
 	strb	r10, [r8, #6]
 	.loc 2 2004 0
@@ -14871,10 +14898,10 @@ FtlRecoverySuperblock:
 	strh	fp, [r8, #2]	@ movhi
 	.loc 2 2004 0
 	mov	r1, fp
-	b	.L1263
-.L1269:
+	b	.L1264
+.L1270:
 	.align	2
-.L1268:
+.L1269:
 	.word	.LANCHOR51
 	.word	.LANCHOR52
 	.word	.LANCHOR53
@@ -14899,7 +14926,7 @@ FtlSuperblockPowerLostFix:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1423:
+.LVL1425:
 	push	{r4, r5, r6, r7, lr}
 	.cfi_def_cfa_offset 20
 	.cfi_offset 4, -20
@@ -14909,28 +14936,28 @@ FtlSuperblockPowerLostFix:
 	.cfi_offset 14, -4
 	mov	r4, r0
 	.loc 2 2169 0
-	ldr	r6, .L1281
+	ldr	r6, .L1282
 	.loc 2 2156 0
 	sub	sp, sp, #28
 	.cfi_def_cfa_offset 48
 	.loc 2 2162 0
 	movs	r5, #7
 	.loc 2 2170 0
-	ldr	r7, .L1281+4
-.LVL1424:
-.L1271:
+	ldr	r7, .L1282+4
+.LVL1426:
+.L1272:
 	.loc 2 2162 0
 	subs	r5, r5, #1
-.LVL1425:
-	beq	.L1273
-.LVL1426:
+.LVL1427:
+	beq	.L1274
+.LVL1428:
 	.loc 2 2163 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1272
-.LVL1427:
-.L1273:
+	cbnz	r3, .L1273
+.LVL1429:
+.L1274:
 	.loc 2 2183 0
-	ldr	r3, .L1281+8
+	ldr	r3, .L1282+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
 	ldr	r2, [r3]
@@ -14938,7 +14965,7 @@ FtlSuperblockPowerLostFix:
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 2 2184 0
-	ldr	r3, .L1281+12
+	ldr	r3, .L1282+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 2185 0
@@ -14952,17 +14979,17 @@ FtlSuperblockPowerLostFix:
 	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.LVL1428:
-.L1272:
+.LVL1430:
+.L1273:
 	.cfi_restore_state
 	.loc 2 2165 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1429:
+.LVL1431:
 	str	r0, [sp, #8]
 	.loc 2 2166 0
 	adds	r0, r0, #1
-	beq	.L1273
+	beq	.L1274
 	.loc 2 2170 0
 	ldr	r1, [r7]
 	.loc 2 2168 0
@@ -14970,12 +14997,12 @@ FtlSuperblockPowerLostFix:
 	.loc 2 2169 0
 	ldr	r2, [r6]
 	.loc 2 2178 0
-	ldr	r0, .L1281+16
+	ldr	r0, .L1282+16
 	.loc 2 2168 0
 	str	r3, [sp, #20]
 	.loc 2 2170 0
 	str	r1, [sp, #16]
-.LVL1430:
+.LVL1432:
 	.loc 2 2169 0
 	str	r2, [sp, #12]
 	.loc 2 2174 0
@@ -14996,7 +15023,7 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r1]	@ movhi
 	.loc 2 2178 0
 	adds	r1, r2, #1
-.LVL1431:
+.LVL1433:
 	it	eq
 	moveq	r2, r3
 	.loc 2 2179 0
@@ -15007,15 +15034,15 @@ FtlSuperblockPowerLostFix:
 	mov	r2, r3
 	add	r0, sp, #4
 	bl	FlashProgPages
-.LVL1432:
+.LVL1434:
 	.loc 2 2180 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
-.LVL1433:
-	b	.L1271
-.L1282:
+.LVL1435:
+	b	.L1272
+.L1283:
 	.align	2
-.L1281:
+.L1282:
 	.word	.LANCHOR39
 	.word	.LANCHOR109
 	.word	.LANCHOR43
@@ -15049,34 +15076,34 @@ FtlLoadBbt:
 	.cfi_offset 10, -8
 	.cfi_offset 14, -4
 	.loc 4 180 0
-	ldr	r8, .L1312+40
-	ldr	r4, .L1312
+	ldr	r8, .L1313+40
+	ldr	r4, .L1313
 	ldr	r3, [r8]
 	.loc 4 184 0
-	ldr	r7, .L1312+4
+	ldr	r7, .L1313+4
 	.loc 4 186 0
 	mov	r10, r4
 	.loc 4 180 0
 	str	r3, [r4, #8]
 	.loc 4 181 0
-	ldr	r3, .L1312+8
+	ldr	r3, .L1313+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
-.LVL1434:
+.LVL1436:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1435:
+.LVL1437:
 	.loc 4 184 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1436:
-.L1284:
+.LVL1438:
+.L1285:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #15
 	cmp	r3, r5
-	bgt	.L1287
+	bgt	.L1288
 	.loc 4 185 0 is_stmt 1
 	lsls	r3, r5, #10
 	.loc 4 186 0
@@ -15087,11 +15114,11 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 186 0
 	bl	FlashReadPages
-.LVL1437:
+.LVL1439:
 	.loc 4 187 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L1285
+	bne	.L1286
 	.loc 4 188 0
 	ldr	r3, [r4, #4]
 	.loc 4 189 0
@@ -15103,19 +15130,19 @@ FtlLoadBbt:
 	str	r3, [r4, #4]
 	.loc 4 189 0
 	bl	FlashReadPages
-.LVL1438:
-.L1285:
+.LVL1440:
+.L1286:
 	.loc 4 191 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1286
+	beq	.L1287
 	.loc 4 196 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1286
+	bne	.L1287
 	.loc 4 198 0
-	ldr	r3, .L1312+12
+	ldr	r3, .L1313+12
 	.loc 4 199 0
 	ldr	r2, [r6, #4]
 	.loc 4 198 0
@@ -15125,43 +15152,43 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
-.L1287:
+.L1288:
 	.loc 4 216 0
-	ldr	r5, .L1312+12
-.LVL1439:
+	ldr	r5, .L1313+12
+.LVL1441:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
-	beq	.L1301
+	beq	.L1302
 	.loc 4 222 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
-	beq	.L1291
+	beq	.L1292
 	.loc 4 224 0
 	lsls	r3, r3, #10
 	.loc 4 225 0
 	movs	r2, #1
 	mov	r1, r2
-	ldr	r0, .L1312
+	ldr	r0, .L1313
 	.loc 4 224 0
 	str	r3, [r4, #4]
 	.loc 4 225 0
 	bl	FlashReadPages
-.LVL1440:
+.LVL1442:
 	.loc 4 226 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1291
+	beq	.L1292
 	.loc 4 229 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1291
+	bne	.L1292
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1291
+	bls	.L1292
 	.loc 4 231 0 is_stmt 1
 	ldrh	r2, [r5, #4]
 	.loc 4 232 0
@@ -15172,30 +15199,30 @@ FtlLoadBbt:
 	strh	r2, [r5]	@ movhi
 	.loc 4 233 0
 	strh	r3, [r5, #4]	@ movhi
-.L1291:
+.L1292:
 	.loc 4 245 0
-	ldr	r10, .L1312
+	ldr	r10, .L1313
 	.loc 4 238 0
 	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
-.LVL1441:
+.LVL1443:
 	sxth	r7, r0
-.LVL1442:
+.LVL1444:
 	.loc 4 239 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L1293:
+.L1294:
 	.loc 4 241 0
 	cmp	r7, #0
-	bge	.L1296
+	bge	.L1297
 	.loc 4 254 0
 	movs	r2, #254
-	ldr	r1, .L1312+16
-	ldr	r0, .L1312+20
+	ldr	r1, .L1313+16
+	ldr	r0, .L1313+20
 	bl	printf
-.LVL1443:
-.L1295:
+.LVL1445:
+.L1296:
 	.loc 4 255 0
 	ldrh	r3, [r6, #10]
 	.loc 4 257 0
@@ -15205,53 +15232,53 @@ FtlLoadBbt:
 	.loc 4 257 0
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1298
+	beq	.L1299
 	.loc 4 259 0
-	ldr	r3, .L1312+24
+	ldr	r3, .L1313+24
 	ldr	r2, [r3]
 	cmp	r0, r2
-	beq	.L1298
+	beq	.L1299
 	.loc 4 259 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1312+28
+	ldr	r3, .L1313+28
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1298
+	bcs	.L1299
 	.loc 4 261 0 is_stmt 1
 	cmp	r0, r3
-	bcs	.L1298
+	bcs	.L1299
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1444:
-.L1298:
-	ldr	r6, .L1312+32
-.LVL1445:
+.LVL1446:
+.L1299:
+	ldr	r6, .L1313+32
+.LVL1447:
 	.loc 4 173 0 discriminator 1
 	movs	r5, #0
 	.loc 4 268 0 discriminator 1
-	ldr	r7, .L1312+36
-.LVL1446:
+	ldr	r7, .L1313+36
+.LVL1448:
 	.loc 4 269 0 discriminator 1
-	ldr	r8, .L1312+44
-.L1299:
-.LVL1447:
+	ldr	r8, .L1313+44
+.L1300:
+.LVL1449:
 	.loc 4 268 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
-	bcc	.L1300
+	bcc	.L1301
 	.loc 4 275 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1448:
-.L1286:
+.LVL1450:
+.L1287:
 	.loc 4 184 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1449:
-	uxth	r5, r5
-.LVL1450:
-	b	.L1284
 .LVL1451:
-.L1296:
+	uxth	r5, r5
+.LVL1452:
+	b	.L1285
+.LVL1453:
+.L1297:
 	.loc 4 243 0
 	ldrh	r3, [r5]
 	.loc 4 245 0
@@ -15266,24 +15293,24 @@ FtlLoadBbt:
 	str	r3, [r4, #8]
 	.loc 4 245 0
 	bl	FlashReadPages
-.LVL1452:
+.LVL1454:
 	.loc 4 247 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	beq	.L1294
+	beq	.L1295
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
-	beq	.L1295
-.L1294:
+	beq	.L1296
+.L1295:
 	subs	r7, r7, #1
-.LVL1453:
-	sxth	r7, r7
-.LVL1454:
-	b	.L1293
 .LVL1455:
-.L1300:
+	sxth	r7, r7
+.LVL1456:
+	b	.L1294
+.LVL1457:
+.L1301:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
@@ -15292,20 +15319,20 @@ FtlLoadBbt:
 	mla	r1, r5, r2, r1
 	.loc 4 268 0 discriminator 3
 	adds	r5, r5, #1
-.LVL1456:
+.LVL1458:
 	.loc 4 269 0 discriminator 3
 	bl	ftl_memcpy
-.LVL1457:
-	b	.L1299
-.LVL1458:
-.L1301:
+.LVL1459:
+	b	.L1300
+.LVL1460:
+.L1302:
 	.loc 4 218 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.LVL1459:
-.L1313:
+.LVL1461:
+.L1314:
 	.align	2
-.L1312:
+.L1313:
 	.word	.LANCHOR108
 	.word	.LANCHOR17
 	.word	.LANCHOR109
@@ -15347,79 +15374,79 @@ FtlMakeBbt:
 	.cfi_offset 14, -4
 	.loc 4 327 0
 	movs	r6, #0
-	ldr	r7, .L1333
+	ldr	r7, .L1334
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1460:
+.LVL1462:
 	sub	r8, r7, #18
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1461:
-.L1315:
+.LVL1463:
+.L1316:
 	.loc 4 327 0 discriminator 1
-	ldr	r3, .L1333+4
+	ldr	r3, .L1334+4
 	ldrh	r3, [r3]
 	cmp	r6, r3
-	bcc	.L1321
+	bcc	.L1322
 	.loc 4 381 0 discriminator 1
-	ldr	r5, .L1333+8
+	ldr	r5, .L1334+8
 	movs	r4, #0
-.L1322:
+.L1323:
 	ldrh	r3, [r5]
 	uxth	r0, r4
-.LVL1462:
+.LVL1464:
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L1323
+	bhi	.L1324
 	.loc 4 387 0
-	ldr	r4, .L1333+12
+	ldr	r4, .L1334+12
 	.loc 4 396 0
 	movw	r6, #65535
-.LVL1463:
+.LVL1465:
 	.loc 4 387 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.LVL1464:
-.L1324:
+.LVL1466:
+.L1325:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L1328
+	bgt	.L1329
 	.loc 4 389 0 is_stmt 1
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
-.LVL1465:
+.LVL1467:
 	cmp	r0, #1
-	beq	.L1325
+	beq	.L1326
 	.loc 4 391 0
 	mov	r0, r5
 	bl	FlashTestBlk
-.LVL1466:
+.LVL1468:
 	cmp	r0, #0
-	beq	.L1326
+	beq	.L1327
 	.loc 4 393 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1467:
-.L1325:
+.LVL1469:
+.L1326:
 	.loc 4 387 0 discriminator 2
 	subs	r5, r5, #1
-.LVL1468:
-	uxth	r5, r5
-.LVL1469:
-	b	.L1324
 .LVL1470:
-.L1321:
+	uxth	r5, r5
+.LVL1471:
+	b	.L1325
+.LVL1472:
+.L1322:
 	.loc 4 328 0
-	ldr	r3, .L1333+16
+	ldr	r3, .L1334+16
 	.loc 4 329 0
-	ldr	r5, .L1333+20
+	ldr	r5, .L1334+20
 	.loc 4 331 0
 	ldrh	r2, [r8, #2]!
 	.loc 4 328 0
-	ldr	r4, .L1333+24
+	ldr	r4, .L1334+24
 	ldr	r0, [r3]
 	.loc 4 331 0
 	movw	r3, #65535
@@ -15428,14 +15455,14 @@ FtlMakeBbt:
 	.loc 4 331 0
 	cmp	r2, r3
 	mov	fp, r4
-	ldr	r3, .L1333+28
+	ldr	r3, .L1334+28
 	.loc 4 328 0
 	str	r0, [r4, #8]
 	.loc 4 329 0
 	str	r10, [r4, #12]
-.LVL1471:
+.LVL1473:
 	.loc 4 331 0
-	beq	.L1316
+	beq	.L1317
 	.loc 4 333 0
 	ldrh	r5, [r3]
 	.loc 4 335 0
@@ -15443,7 +15470,7 @@ FtlMakeBbt:
 	.loc 4 333 0
 	str	r3, [sp]
 	mla	r5, r6, r5, r2
-.LVL1472:
+.LVL1474:
 	.loc 4 334 0
 	lsls	r2, r5, #10
 	str	r2, [r4, #4]
@@ -15451,7 +15478,7 @@ FtlMakeBbt:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1473:
+.LVL1475:
 	.loc 4 336 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
@@ -15460,30 +15487,30 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.LVL1474:
-.L1317:
+.LVL1476:
+.L1318:
 	.loc 4 376 0 discriminator 2
 	uxth	r0, r5
 	.loc 4 327 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1475:
+.LVL1477:
 	adds	r7, r7, #4
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1476:
-	b	.L1315
-.LVL1477:
-.L1316:
+.LVL1478:
+	b	.L1316
+.LVL1479:
+.L1317:
 	.loc 4 340 0
 	mov	r1, r6
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
-.LVL1478:
+.LVL1480:
 	.loc 4 341 0
 	ldr	r0, [r4, #8]
 	ldr	r1, [r7]
 	bl	FtlBbt2Bitmap
-.LVL1479:
+.LVL1481:
 	.loc 4 343 0
 	ldr	r3, [sp]
 	.loc 4 350 0
@@ -15492,17 +15519,17 @@ FtlMakeBbt:
 	ldrh	r4, [r3]
 	subs	r4, r4, #1
 	uxth	r4, r4
-.LVL1480:
-.L1318:
+.LVL1482:
+.L1319:
 	.loc 4 345 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r6, r4
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
-.LVL1481:
+.LVL1483:
 	cmp	r0, #1
-	beq	.L1319
+	beq	.L1320
 	.loc 4 350 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
@@ -15512,14 +15539,14 @@ FtlMakeBbt:
 	.loc 4 350 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1482:
+.LVL1484:
 	.loc 4 351 0
-	ldr	r3, .L1333+16
+	ldr	r3, .L1334+16
 	mov	r2, #4096
 	movs	r1, #0
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL1483:
+.LVL1485:
 	.loc 4 355 0
 	ldr	r2, [sp]
 	.loc 4 352 0
@@ -15539,71 +15566,71 @@ FtlMakeBbt:
 	strh	r3, [r10, #2]	@ movhi
 	.loc 4 355 0
 	mla	r5, r6, r5, r3
-.LVL1484:
+.LVL1486:
 	.loc 4 356 0
 	lsls	r3, r5, #10
 	str	r3, [fp, #4]
 	.loc 4 357 0
-	ldr	r3, .L1333+32
+	ldr	r3, .L1334+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
-.LVL1485:
+.LVL1487:
 	.loc 4 358 0
 	movs	r2, #1
-	ldr	r0, .L1333+24
+	ldr	r0, .L1334+24
 	mov	r1, r2
 	bl	FlashEraseBlocks
-.LVL1486:
+.LVL1488:
 	.loc 4 359 0
 	movs	r3, #1
-	ldr	r0, .L1333+24
+	ldr	r0, .L1334+24
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1487:
+.LVL1489:
 	.loc 4 360 0
 	ldr	r3, [fp]
 	adds	r3, r3, #1
-	bne	.L1317
+	bne	.L1318
 	.loc 4 362 0
 	uxth	r0, r5
 	bl	FtlBbmMapBadBlock
-.LVL1488:
+.LVL1490:
 	.loc 4 363 0
-	b	.L1318
-.LVL1489:
-.L1319:
+	b	.L1319
+.LVL1491:
+.L1320:
 	.loc 4 347 0
 	subs	r4, r4, #1
-.LVL1490:
-	uxth	r4, r4
-.LVL1491:
-	b	.L1318
 .LVL1492:
-.L1323:
-	.loc 4 383 0 discriminator 3
-	bl	FtlBbmMapBadBlock
+	uxth	r4, r4
 .LVL1493:
-	b	.L1322
+	b	.L1319
 .LVL1494:
-.L1326:
+.L1324:
+	.loc 4 383 0 discriminator 3
+	bl	FtlBbmMapBadBlock
+.LVL1495:
+	b	.L1323
+.LVL1496:
+.L1327:
 	.loc 4 396 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L1327
+	bne	.L1328
 	.loc 4 398 0
 	strh	r5, [r4]	@ movhi
-	b	.L1325
-.L1327:
+	b	.L1326
+.L1328:
 	.loc 4 402 0
 	strh	r5, [r4, #4]	@ movhi
-.L1328:
+.L1329:
 	.loc 4 414 0
-	ldr	r3, .L1333+36
+	ldr	r3, .L1334+36
 	.loc 4 411 0
 	movs	r5, #0
-.LVL1495:
+.LVL1497:
 	.loc 4 413 0
 	str	r5, [r4, #8]
 	.loc 4 416 0
@@ -15622,18 +15649,18 @@ FtlMakeBbt:
 	str	r3, [r0, #24]
 	.loc 4 416 0
 	bl	FlashEraseBlocks
-.LVL1496:
+.LVL1498:
 	.loc 4 418 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
-.LVL1497:
+.LVL1499:
 	.loc 4 419 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
-.LVL1498:
+.LVL1500:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1499:
+.LVL1501:
 	.loc 4 422 0
 	ldr	r3, [r4, #8]
 	.loc 4 425 0
@@ -15645,23 +15672,23 @@ FtlMakeBbt:
 	str	r3, [r4, #8]
 	.loc 4 424 0
 	ldrh	r3, [r4]
-.LVL1500:
+.LVL1502:
 	.loc 4 425 0
 	strh	r2, [r4]	@ movhi
 	.loc 4 427 0
 	strh	r3, [r4, #4]	@ movhi
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1501:
+.LVL1503:
 	.loc 4 432 0
 	mov	r0, r5
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1334:
+.L1335:
 	.align	2
-.L1333:
+.L1334:
 	.word	.LANCHOR37+28
 	.word	.LANCHOR10
 	.word	.LANCHOR25
@@ -15689,9 +15716,9 @@ FtlVendorPartWrite:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1502:
+.LVL1504:
 	.loc 2 794 0
-	ldr	r3, .L1347
+	ldr	r3, .L1348
 	.loc 2 786 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -15709,78 +15736,78 @@ FtlVendorPartWrite:
 	str	r2, [sp]
 	.loc 2 794 0
 	adds	r2, r0, r1
-.LVL1503:
+.LVL1505:
 	.loc 2 786 0
 	mov	r7, r0
 	mov	r5, r1
 	.loc 2 794 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1343
+	bhi	.L1344
 	.loc 2 791 0
-	ldr	r3, .L1347+4
+	ldr	r3, .L1348+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.LVL1504:
-.L1337:
+.LVL1506:
+.L1338:
 	.loc 2 797 0
-	cbnz	r5, .L1342
-.LVL1505:
-.L1335:
+	cbnz	r5, .L1343
+.LVL1507:
+.L1336:
 	.loc 2 820 0
 	mov	r0, r8
 	add	sp, sp, #104
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
-.LVL1506:
+.LVL1508:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1507:
-.L1342:
+.LVL1509:
+.L1343:
 	.cfi_restore_state
 	.loc 2 798 0
-	ldr	r3, .L1347+8
+	ldr	r3, .L1348+8
 	.loc 2 799 0
 	mov	r0, r7
-	ldr	r10, .L1347+24
+	ldr	r10, .L1348+24
 	.loc 2 798 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
 	.loc 2 799 0
-	ldr	r3, .L1347+12
+	ldr	r3, .L1348+12
 	.loc 2 798 0
 	str	r2, [sp, #12]
-.LVL1508:
+.LVL1510:
 	.loc 2 799 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
-.LVL1509:
+.LVL1511:
 	.loc 2 800 0
 	ldr	r3, [sp, #8]
 	.loc 2 801 0
 	ldr	r2, [sp, #12]
 	.loc 2 799 0
 	str	r1, [sp, #4]
-.LVL1510:
+.LVL1512:
 	.loc 2 800 0
 	subs	r4, r3, r1
 	uxth	r4, r4
-.LVL1511:
+.LVL1513:
 	.loc 2 801 0
 	cmp	r5, r4
 	.loc 2 802 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1512:
+.LVL1514:
 	.loc 2 803 0
-	cbz	r2, .L1339
+	cbz	r2, .L1340
 	.loc 2 803 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
-	beq	.L1339
+	beq	.L1340
 	.loc 2 805 0 is_stmt 1
 	ldr	r3, [r10]
 	.loc 2 807 0
@@ -15797,69 +15824,69 @@ FtlVendorPartWrite:
 	str	r3, [sp, #32]
 	.loc 2 807 0
 	bl	FlashReadPages
-.LVL1513:
-.L1340:
+.LVL1515:
+.L1341:
 	.loc 2 811 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
 	.loc 2 815 0
 	subs	r5, r5, r4
-.LVL1514:
+.LVL1516:
 	.loc 2 811 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
 	.loc 2 816 0
 	add	r7, r7, r4
-.LVL1515:
+.LVL1517:
 	add	fp, fp, #4
 	.loc 2 811 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1516:
+.LVL1518:
 	.loc 2 812 0
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L1347+16
+	ldr	r0, .L1348+16
 	.loc 2 814 0
 	adds	r6, r6, #1
-.LVL1517:
+.LVL1519:
 	.loc 2 812 0
 	bl	FtlMapWritePage
-.LVL1518:
+.LVL1520:
 	.loc 2 817 0
 	ldr	r3, [sp]
 	.loc 2 813 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
-.LVL1519:
+.LVL1521:
 	.loc 2 817 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-.LVL1520:
-	b	.L1337
-.LVL1521:
-.L1339:
+.LVL1522:
+	b	.L1338
+.LVL1523:
+.L1340:
 	.loc 2 809 0
-	ldr	r3, .L1347+20
+	ldr	r3, .L1348+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
-.LVL1522:
-	bl	ftl_memset
-.LVL1523:
-	b	.L1340
 .LVL1524:
-.L1343:
+	bl	ftl_memset
+.LVL1525:
+	b	.L1341
+.LVL1526:
+.L1344:
 	.loc 2 795 0
 	mov	r8, #-1
-	b	.L1335
-.L1348:
+	b	.L1336
+.L1349:
 	.align	2
-.L1347:
+.L1348:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -15886,76 +15913,76 @@ Ftl_save_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	.loc 2 2111 0
-	ldr	r2, .L1351
-	ldr	r3, .L1351+4
+	ldr	r2, .L1352
+	ldr	r3, .L1352+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L1349
-.LBB274:
-.LBB275:
+	bne	.L1350
+.LBB278:
+.LBB279:
 	.loc 2 2112 0
-	ldr	r3, .L1351+8
+	ldr	r3, .L1352+8
 	.loc 2 2125 0
 	movs	r1, #1
 	movs	r0, #0
 	.loc 2 2112 0
 	str	r3, [r2, #4]
 	.loc 2 2113 0
-	ldr	r3, .L1351+12
+	ldr	r3, .L1352+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
 	.loc 2 2114 0
-	ldr	r3, .L1351+16
+	ldr	r3, .L1352+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
 	.loc 2 2115 0
-	ldr	r3, .L1351+20
+	ldr	r3, .L1352+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
 	.loc 2 2116 0
-	ldr	r3, .L1351+24
+	ldr	r3, .L1352+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
 	.loc 2 2117 0
-	ldr	r3, .L1351+28
+	ldr	r3, .L1352+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
 	.loc 2 2118 0
-	ldr	r3, .L1351+32
+	ldr	r3, .L1352+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
 	.loc 2 2119 0
-	ldr	r3, .L1351+36
+	ldr	r3, .L1352+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
 	.loc 2 2120 0
-	ldr	r3, .L1351+40
+	ldr	r3, .L1352+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
 	.loc 2 2121 0
-	ldr	r3, .L1351+44
+	ldr	r3, .L1352+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
 	.loc 2 2122 0
-	ldr	r3, .L1351+48
+	ldr	r3, .L1352+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
 	.loc 2 2123 0
-	ldr	r3, .L1351+52
+	ldr	r3, .L1352+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
 	.loc 2 2124 0
-	ldr	r3, .L1351+56
+	ldr	r3, .L1352+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
 	.loc 2 2125 0
 	b	FtlVendorPartWrite
-.LVL1525:
-.L1349:
+.LVL1527:
+.L1350:
 	bx	lr
-.L1352:
+.L1353:
 	.align	2
-.L1351:
+.L1352:
 	.word	.LANCHOR83
 	.word	1179929683
 	.word	1342177344
@@ -15971,8 +15998,8 @@ Ftl_save_ext_data:
 	.word	.LANCHOR66
 	.word	.LANCHOR77
 	.word	.LANCHOR78
-.LBE275:
-.LBE274:
+.LBE279:
+.LBE278:
 	.cfi_endproc
 .LFE289:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -15990,9 +16017,9 @@ FtlEctTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1526:
+.LVL1528:
 	.loc 2 864 0
-	ldr	r2, .L1358
+	ldr	r2, .L1359
 	.loc 2 861 0
 	push	{r3, lr}
 	.cfi_def_cfa_offset 8
@@ -16008,23 +16035,23 @@ FtlEctTblFlush:
 	movhi	r3, #32
 	.loc 2 865 0
 	strhls	r3, [r2]	@ movhi
-.LVL1527:
+.LVL1529:
 	.loc 2 866 0
 	movls	r3, #1
-.LVL1528:
-	ldr	r2, .L1358+4
+.LVL1530:
+	ldr	r2, .L1359+4
 	.loc 2 868 0
-	cbnz	r0, .L1355
+	cbnz	r0, .L1356
 	.loc 2 868 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
-.LVL1529:
+.LVL1531:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
-.LVL1530:
+.LVL1532:
 	cmp	r1, r3
-	bcc	.L1356
-.L1355:
+	bcc	.L1357
+.L1356:
 	.loc 2 870 0 is_stmt 1
 	ldr	r2, [r2]
 	.loc 2 875 0
@@ -16033,10 +16060,10 @@ FtlEctTblFlush:
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
 	.loc 2 871 0
-	ldr	r3, .L1358+8
+	ldr	r3, .L1359+8
 	str	r3, [r2]
 	.loc 2 872 0
-	ldr	r3, .L1358+12
+	ldr	r3, .L1359+12
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -16049,17 +16076,17 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	.loc 2 875 0
 	bl	FtlVendorPartWrite
-.LVL1531:
+.LVL1533:
 	.loc 2 876 0
 	bl	Ftl_save_ext_data
-.LVL1532:
-.L1356:
+.LVL1534:
+.L1357:
 	.loc 2 878 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1359:
+.L1360:
 	.align	2
-.L1358:
+.L1359:
 	.word	.LANCHOR166
 	.word	.LANCHOR127
 	.word	1112818501
@@ -16081,9 +16108,9 @@ FtlVendorPartRead:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1533:
+.LVL1535:
 	.loc 2 832 0
-	ldr	r3, .L1369
+	ldr	r3, .L1370
 	.loc 2 823 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -16098,7 +16125,7 @@ FtlVendorPartRead:
 	mov	r8, r2
 	.loc 2 832 0
 	adds	r2, r0, r1
-.LVL1534:
+.LVL1536:
 	.loc 2 823 0
 	sub	sp, sp, #104
 	.cfi_def_cfa_offset 136
@@ -16108,23 +16135,23 @@ FtlVendorPartRead:
 	.loc 2 832 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1368
+	bhi	.L1369
 	.loc 2 828 0
-	ldr	r3, .L1369+4
+	ldr	r3, .L1370+4
 	movs	r7, #0
 	.loc 2 842 0
-	ldr	fp, .L1369+16
+	ldr	fp, .L1370+16
 	.loc 2 828 0
 	ldrh	r3, [r3]
 	lsr	r3, r0, r3
 	lsls	r3, r3, #2
 	str	r3, [sp, #4]
-.LVL1535:
-.L1362:
+.LVL1537:
+.L1363:
 	.loc 2 834 0
-	cbnz	r5, .L1367
-.LVL1536:
-.L1360:
+	cbnz	r5, .L1368
+.LVL1538:
+.L1361:
 	.loc 2 857 0
 	mov	r0, r7
 	add	sp, sp, #104
@@ -16132,11 +16159,11 @@ FtlVendorPartRead:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1537:
-.L1367:
+.LVL1539:
+.L1368:
 	.cfi_restore_state
 	.loc 2 835 0
-	ldr	r3, .L1369+8
+	ldr	r3, .L1370+8
 	.loc 2 836 0
 	mov	r0, r6
 	.loc 2 835 0
@@ -16144,15 +16171,15 @@ FtlVendorPartRead:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
 	.loc 2 836 0
-	ldr	r2, .L1369+12
+	ldr	r2, .L1370+12
 	.loc 2 835 0
 	str	r3, [sp, #12]
-.LVL1538:
+.LVL1540:
 	.loc 2 836 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
-.LVL1539:
+.LVL1541:
 	.loc 2 837 0
 	subs	r4, r4, r1
 	.loc 2 838 0
@@ -16161,16 +16188,16 @@ FtlVendorPartRead:
 	uxth	r4, r4
 	.loc 2 836 0
 	str	r1, [sp, #8]
-.LVL1540:
+.LVL1542:
 	.loc 2 838 0
 	cmp	r5, r4
 	.loc 2 839 0
 	it	cc
 	uxthcc	r4, r5
-.LVL1541:
+.LVL1543:
 	lsl	r10, r4, #9
 	.loc 2 840 0
-	cbz	r3, .L1364
+	cbz	r3, .L1365
 	.loc 2 841 0
 	str	r3, [sp, #24]
 	.loc 2 844 0
@@ -16187,7 +16214,7 @@ FtlVendorPartRead:
 	str	r3, [sp, #32]
 	.loc 2 844 0
 	bl	FlashReadPages
-.LVL1542:
+.LVL1544:
 	.loc 2 845 0
 	ldr	r3, [sp, #20]
 	.loc 2 847 0
@@ -16201,42 +16228,42 @@ FtlVendorPartRead:
 	.loc 2 846 0
 	it	eq
 	moveq	r7, #-1
-.LVL1543:
+.LVL1545:
 	.loc 2 847 0
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.LVL1544:
-.L1366:
+.LVL1546:
+.L1367:
 	ldr	r3, [sp, #4]
 	.loc 2 852 0
 	subs	r5, r5, r4
-.LVL1545:
+.LVL1547:
 	.loc 2 853 0
 	add	r6, r6, r4
-.LVL1546:
+.LVL1548:
 	.loc 2 854 0
 	add	r8, r8, r10
-.LVL1547:
+.LVL1549:
 	adds	r3, r3, #4
 	str	r3, [sp, #4]
-	b	.L1362
-.LVL1548:
-.L1364:
+	b	.L1363
+.LVL1550:
+.L1365:
 	.loc 2 849 0
 	mov	r2, r10
 	mov	r1, r3
 	mov	r0, r8
 	bl	ftl_memset
-.LVL1549:
-	b	.L1366
-.LVL1550:
-.L1368:
+.LVL1551:
+	b	.L1367
+.LVL1552:
+.L1369:
 	.loc 2 833 0
 	mov	r7, #-1
-	b	.L1360
-.L1370:
+	b	.L1361
+.L1371:
 	.align	2
-.L1369:
+.L1370:
 	.word	.LANCHOR16
 	.word	.LANCHOR22
 	.word	.LANCHOR133
@@ -16267,41 +16294,41 @@ FtlLoadEctTbl:
 	.cfi_offset 14, -4
 	.loc 2 1335 0
 	movs	r0, #64
-	ldr	r4, .L1373
-	ldr	r5, .L1373+4
+	ldr	r4, .L1374
+	ldr	r5, .L1374+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
-.LVL1551:
+.LVL1553:
 	.loc 2 1336 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L1373+8
+	ldr	r3, .L1374+8
 	cmp	r2, r3
-	beq	.L1372
-.LBB278:
-.LBB279:
+	beq	.L1373
+.LBB282:
+.LBB283:
 	.loc 2 1338 0
-	ldr	r1, .L1373+12
-	ldr	r0, .L1373+16
+	ldr	r1, .L1374+12
+	ldr	r0, .L1374+16
 	bl	printf
-.LVL1552:
+.LVL1554:
 	.loc 2 1339 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.LVL1553:
-.L1372:
-.LBE279:
-.LBE278:
+.LVL1555:
+.L1373:
+.LBE283:
+.LBE282:
 	.loc 2 1344 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1374:
+.L1375:
 	.align	2
-.L1373:
+.L1374:
 	.word	.LANCHOR127
 	.word	.LANCHOR125
 	.word	1112818501
@@ -16332,55 +16359,55 @@ Ftl_load_ext_data:
 	.cfi_offset 14, -4
 	.loc 2 2131 0
 	movs	r1, #1
-	ldr	r4, .L1378
+	ldr	r4, .L1379
 	movs	r0, #0
 	.loc 2 2132 0
-	ldr	r5, .L1378+4
+	ldr	r5, .L1379+4
 	.loc 2 2131 0
 	mov	r2, r4
 	bl	FtlVendorPartRead
-.LVL1554:
+.LVL1556:
 	.loc 2 2132 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L1376
+	beq	.L1377
 	.loc 2 2133 0
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
-.LVL1555:
+.LVL1557:
 	.loc 2 2134 0
 	str	r5, [r4]
-.L1376:
+.L1377:
 	.loc 2 2137 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r3, .L1378+8
-	bne	.L1377
+	ldr	r3, .L1379+8
+	bne	.L1378
 	.loc 2 2138 0
 	ldr	r1, [r4, #88]
-	ldr	r2, .L1378+12
+	ldr	r2, .L1379+12
 	str	r1, [r2]
 	.loc 2 2139 0
 	ldr	r1, [r4, #92]
-	ldr	r2, .L1378+16
+	ldr	r2, .L1379+16
 	str	r1, [r2]
 	.loc 2 2140 0
 	ldr	r1, [r4, #8]
-	ldr	r2, .L1378+20
+	ldr	r2, .L1379+20
 	str	r1, [r2]
 	.loc 2 2141 0
 	ldr	r1, [r4, #12]
-	ldr	r2, .L1378+24
+	ldr	r2, .L1379+24
 	str	r1, [r2]
 	.loc 2 2142 0
 	ldr	r1, [r4, #16]
-	ldr	r2, .L1378+28
+	ldr	r2, .L1379+28
 	str	r1, [r2]
 	.loc 2 2143 0
 	ldr	r1, [r4, #20]
-	ldr	r2, .L1378+32
+	ldr	r2, .L1379+32
 	str	r1, [r2]
 	.loc 2 2144 0
 	ldr	r2, [r4, #28]
@@ -16389,42 +16416,42 @@ Ftl_load_ext_data:
 	.loc 2 2144 0
 	str	r2, [r3]
 	.loc 2 2145 0
-	ldr	r2, .L1378+36
+	ldr	r2, .L1379+36
 	str	r1, [r2]
 	.loc 2 2146 0
 	ldr	r1, [r4, #36]
-	ldr	r2, .L1378+40
+	ldr	r2, .L1379+40
 	str	r1, [r2]
 	.loc 2 2147 0
 	ldr	r1, [r4, #40]
-	ldr	r2, .L1378+44
+	ldr	r2, .L1379+44
 	str	r1, [r2]
 	.loc 2 2148 0
 	ldr	r1, [r4, #44]
-	ldr	r2, .L1378+48
+	ldr	r2, .L1379+48
 	str	r1, [r2]
 	.loc 2 2149 0
 	ldr	r1, [r4, #48]
-	ldr	r2, .L1378+52
+	ldr	r2, .L1379+52
 	str	r1, [r2]
-.L1377:
+.L1378:
 	.loc 2 2152 0
-	ldr	r1, .L1378+56
-	ldr	r2, .L1378+60
+	ldr	r1, .L1379+56
+	ldr	r2, .L1379+60
 	ldr	r3, [r3]
 	ldr	r0, [r1]
 	ldrh	r2, [r2]
-	ldr	r1, .L1378+64
+	ldr	r1, .L1379+64
 	mla	r0, r0, r2, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
-.LVL1556:
-	ldr	r3, .L1378+68
+.LVL1558:
+	ldr	r3, .L1379+68
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L1379:
+.L1380:
 	.align	2
-.L1378:
+.L1379:
 	.word	.LANCHOR83
 	.word	1179929683
 	.word	.LANCHOR74
@@ -16460,7 +16487,7 @@ FtlVpcTblFlush:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1557:
+.LVL1559:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -16474,13 +16501,13 @@ FtlVpcTblFlush:
 	.loc 2 1016 0
 	movs	r6, #0
 	.loc 2 1013 0
-	ldr	r3, .L1392
+	ldr	r3, .L1393
 	.loc 2 1005 0
 	movw	fp, #65535
 	.loc 2 1010 0
-	ldr	r8, .L1392+80
+	ldr	r8, .L1393+80
 	.loc 2 1011 0
-	ldr	r10, .L1392+84
+	ldr	r10, .L1393+84
 	.loc 2 1013 0
 	ldrh	r2, [r3]
 	.loc 2 1010 0
@@ -16488,16 +16515,16 @@ FtlVpcTblFlush:
 	.loc 2 1011 0
 	ldr	r7, [r10]
 	.loc 2 1010 0
-	ldr	r5, .L1392+4
+	ldr	r5, .L1393+4
 	.loc 2 1019 0
-	ldr	r4, .L1392+8
+	ldr	r4, .L1393+8
 	.loc 2 1020 0
-	ldr	r1, .L1392+12
+	ldr	r1, .L1393+12
 	.loc 2 1010 0
 	str	r0, [r5, #8]
 	.loc 2 1011 0
 	str	r7, [r5, #12]
-.LVL1558:
+.LVL1560:
 	.loc 2 1013 0
 	strh	r2, [r7, #2]	@ movhi
 	.loc 2 1014 0
@@ -16512,7 +16539,7 @@ FtlVpcTblFlush:
 	.loc 2 1015 0
 	str	r2, [r7, #4]
 	.loc 2 1020 0
-	ldr	r2, .L1392+16
+	ldr	r2, .L1393+16
 	.loc 2 1021 0
 	str	r3, [sp, #4]
 	.loc 2 1020 0
@@ -16521,11 +16548,11 @@ FtlVpcTblFlush:
 	ldrh	r2, [r3, #6]
 	strh	r2, [r4, #8]	@ movhi
 	.loc 2 1022 0
-	ldr	r2, .L1392+20
+	ldr	r2, .L1393+20
 	ldrh	r2, [r2]
 	strb	r2, [r4, #10]
 	.loc 2 1024 0
-	ldr	r2, .L1392+24
+	ldr	r2, .L1393+24
 	ldrh	r1, [r2]
 	.loc 2 1025 0
 	ldrh	ip, [r2, #2]
@@ -16539,7 +16566,7 @@ FtlVpcTblFlush:
 	.loc 2 1025 0
 	orr	r1, r1, ip, lsl #6
 	.loc 2 1028 0
-	ldr	r2, .L1392+28
+	ldr	r2, .L1393+28
 	.loc 2 1025 0
 	strh	r1, [r4, #16]	@ movhi
 	.loc 2 1028 0
@@ -16558,7 +16585,7 @@ FtlVpcTblFlush:
 	.loc 2 1030 0
 	strb	r2, [r4, #12]
 	.loc 2 1032 0
-	ldr	r2, .L1392+32
+	ldr	r2, .L1393+32
 	ldrh	r1, [r2]
 	.loc 2 1033 0
 	ldrh	ip, [r2, #2]
@@ -16572,7 +16599,7 @@ FtlVpcTblFlush:
 	.loc 2 1033 0
 	orr	r1, r1, ip, lsl #6
 	.loc 2 1036 0
-	ldr	r2, .L1392+36
+	ldr	r2, .L1393+36
 	.loc 2 1033 0
 	strh	r1, [r4, #24]	@ movhi
 	.loc 2 1047 0
@@ -16581,39 +16608,39 @@ FtlVpcTblFlush:
 	ldr	r2, [r2]
 	str	r2, [r4, #32]
 	.loc 2 1041 0
-	ldr	r2, .L1392+40
+	ldr	r2, .L1393+40
 	ldr	r2, [r2]
 	str	r2, [r4, #40]
 	.loc 2 1042 0
-	ldr	r2, .L1392+44
+	ldr	r2, .L1393+44
 	ldr	r2, [r2]
 	str	r2, [r4, #36]
 	.loc 2 1047 0
-	ldr	r2, .L1392+48
+	ldr	r2, .L1393+48
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1559:
+.LVL1561:
 	.loc 2 1048 0
 	mov	r1, r4
 	.loc 2 1049 0
-	ldr	r4, .L1392+52
+	ldr	r4, .L1393+52
 	.loc 2 1048 0
 	movs	r2, #48
 	ldr	r0, [r5, #8]
 	bl	ftl_memcpy
-.LVL1560:
+.LVL1562:
 	.loc 2 1049 0
 	ldrh	r2, [r4]
 	ldr	r0, [r5, #8]
-	ldr	r1, .L1392+56
+	ldr	r1, .L1393+56
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	ldr	r1, [r1]
 	bl	ftl_memcpy
-.LVL1561:
+.LVL1563:
 	.loc 2 1050 0
 	ldrh	r0, [r4]
-	ldr	r1, .L1392+60
+	ldr	r1, .L1393+60
 	ldr	r4, [r5, #8]
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
@@ -16623,21 +16650,21 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r4
 	bl	ftl_memcpy
-.LVL1562:
+.LVL1564:
 	.loc 2 1051 0
 	mov	r0, r6
 	bl	FtlUpdateVaildLpn
-.LVL1563:
+.LVL1565:
 	ldr	r3, [sp, #4]
 	mov	r4, r3
-.LVL1564:
-.L1381:
+.LVL1566:
+.L1382:
 	.loc 2 1053 0
 	ldr	r3, [r8]
 	.loc 2 1055 0
 	ldrh	r2, [r4]
 	.loc 2 1056 0
-	ldr	r0, .L1392+4
+	ldr	r0, .L1393+4
 	.loc 2 1053 0
 	str	r3, [r5, #8]
 	.loc 2 1054 0
@@ -16652,19 +16679,19 @@ FtlVpcTblFlush:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-.LVL1565:
+.LVL1567:
 	.loc 2 1057 0
-	ldr	r3, .L1392+64
+	ldr	r3, .L1393+64
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1382
+	blt	.L1383
 	.loc 2 1059 0
 	ldrh	r3, [r4]
 	.loc 2 1058 0
 	ldrh	fp, [r4, #4]
-.LVL1566:
+.LVL1568:
 	.loc 2 1059 0
 	strh	r3, [r4, #4]	@ movhi
 	.loc 2 1060 0
@@ -16672,9 +16699,9 @@ FtlVpcTblFlush:
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 1061 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1567:
+.LVL1569:
 	.loc 2 1066 0
-	ldr	r2, .L1392+40
+	ldr	r2, .L1393+40
 	.loc 2 1061 0
 	strh	r0, [r4]	@ movhi
 	.loc 2 1066 0
@@ -16694,10 +16721,10 @@ FtlVpcTblFlush:
 	.loc 2 1070 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1392+4
+	ldr	r0, .L1393+4
 	bl	FlashProgPages
-.LVL1568:
-.L1382:
+.LVL1570:
+.L1383:
 	.loc 2 1072 0
 	ldrh	r3, [r4, #2]
 	.loc 2 1073 0
@@ -16710,67 +16737,67 @@ FtlVpcTblFlush:
 	.loc 2 1072 0
 	strh	r3, [r4, #2]	@ movhi
 	.loc 2 1073 0
-	bne	.L1383
+	bne	.L1384
 	.loc 2 1075 0
 	cmp	r3, #1
-	bne	.L1384
+	bne	.L1385
 	.loc 2 1075 0 is_stmt 0 discriminator 1
 	movw	r2, #1075
-	ldr	r1, .L1392+68
-	ldr	r0, .L1392+72
+	ldr	r1, .L1393+68
+	ldr	r0, .L1393+72
 	bl	printf
-.LVL1569:
-.L1384:
+.LVL1571:
+.L1385:
 	.loc 2 1076 0 is_stmt 1
 	ldrh	r3, [r4, #2]
 	.loc 2 1078 0
 	adds	r6, r6, #1
-.LVL1570:
+.LVL1572:
 	uxth	r6, r6
-.LVL1571:
+.LVL1573:
 	.loc 2 1076 0
 	cmp	r3, #1
 	.loc 2 1077 0
 	itttt	eq
-	ldreq	r3, .L1392+64
+	ldreq	r3, .L1393+64
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r4, #2]	@ movhi
 	.loc 2 1079 0
 	cmp	r6, #3
-	bls	.L1381
+	bls	.L1382
 	.loc 2 1080 0
 	mov	r2, r6
 	ldr	r1, [r5, #4]
-	ldr	r0, .L1392+76
+	ldr	r0, .L1393+76
 	bl	printf
-.LVL1572:
-.L1387:
-	b	.L1387
-.L1383:
+.LVL1574:
+.L1388:
+	b	.L1388
+.L1384:
 	.loc 2 1086 0
 	cmp	r3, #1
-	beq	.L1381
+	beq	.L1382
 	.loc 2 1089 0
 	movw	r3, #65535
 	cmp	fp, r3
-	beq	.L1388
+	beq	.L1389
 	.loc 2 1090 0
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
-.LVL1573:
-.L1388:
+.LVL1575:
+.L1389:
 	.loc 2 1092 0
 	movs	r0, #0
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1574:
-.L1393:
+.LVL1576:
+.L1394:
 	.align	2
-.L1392:
+.L1393:
 	.word	.LANCHOR81
 	.word	.LANCHOR108
 	.word	.LANCHOR79
@@ -16822,76 +16849,76 @@ FtlVpcCheckAndModify:
 	.loc 2 2199 0
 	movs	r5, #0
 	.loc 2 2197 0
-	ldr	r1, .L1406
-	ldr	r0, .L1406+4
+	ldr	r1, .L1407
+	ldr	r0, .L1407+4
 	bl	printf
-.LVL1575:
+.LVL1577:
 	.loc 2 2198 0
-	ldr	r3, .L1406+8
+	ldr	r3, .L1407+8
 	movs	r1, #0
-	ldr	r4, .L1406+12
+	ldr	r4, .L1407+12
 	.loc 2 2199 0
-	ldr	r6, .L1406+16
+	ldr	r6, .L1407+16
 	.loc 2 2198 0
 	ldrh	r2, [r3]
 	ldr	r0, [r4]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL1576:
-.L1395:
+.LVL1578:
+.L1396:
 	.loc 2 2199 0 discriminator 1
 	ldr	r3, [r6]
 	cmp	r5, r3
-	bcc	.L1397
+	bcc	.L1398
 	.loc 2 2206 0 discriminator 1
-	ldr	r10, .L1406+36
+	ldr	r10, .L1407+36
 	movs	r7, #0
 	.loc 2 2207 0 discriminator 1
-	ldr	r8, .L1406+40
-.LVL1577:
-.L1398:
+	ldr	r8, .L1407+40
+.LVL1579:
+.L1399:
 	.loc 2 2206 0 discriminator 1
 	ldrh	r3, [r10]
 	uxth	r5, r7
-.LVL1578:
+.LVL1580:
 	cmp	r3, r5
-	bhi	.L1402
+	bhi	.L1403
 	.loc 2 2218 0
 	add	sp, sp, #12
 	.cfi_remember_state
 	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.LVL1579:
-.L1397:
+.LVL1581:
+.L1398:
 	.cfi_restore_state
 	.loc 2 2200 0
 	movs	r2, #0
 	add	r1, sp, #4
 	mov	r0, r5
 	bl	log2phys
-.LVL1580:
+.LVL1582:
 	.loc 2 2201 0
 	ldr	r0, [sp, #4]
 	adds	r3, r0, #1
-	beq	.L1396
+	beq	.L1397
 	.loc 2 2202 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1581:
+.LVL1583:
 	.loc 2 2203 0
 	ldr	r2, [r4]
 	ldrh	r3, [r2, r0, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r0, lsl #1]	@ movhi
-.LVL1582:
-.L1396:
+.LVL1584:
+.L1397:
 	.loc 2 2199 0 discriminator 2
 	adds	r5, r5, #1
-.LVL1583:
-	b	.L1395
-.LVL1584:
-.L1402:
+.LVL1585:
+	b	.L1396
+.LVL1586:
+.L1403:
 	.loc 2 2207 0
 	ldr	r3, [r8]
 	uxth	r6, r7
@@ -16899,31 +16926,31 @@ FtlVpcCheckAndModify:
 	ldr	r3, [r4]
 	ldrh	r3, [r3, r6, lsl #1]
 	cmp	r2, r3
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2207 0 is_stmt 0 discriminator 1
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2209 0 is_stmt 1
 	mov	r1, r6
-	ldr	r0, .L1406+20
+	ldr	r0, .L1407+20
 	bl	printf
-.LVL1585:
+.LVL1587:
 	.loc 2 2210 0
-	ldr	r3, .L1406+24
+	ldr	r3, .L1407+24
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2210 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1406+28
+	ldr	r3, .L1407+28
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2210 0 discriminator 2
-	ldr	r3, .L1406+32
+	ldr	r3, .L1407+32
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	beq	.L1400
+	beq	.L1401
 	.loc 2 2211 0 is_stmt 1
 	ldr	r3, [r4]
 	.loc 2 2212 0
@@ -16934,20 +16961,20 @@ FtlVpcCheckAndModify:
 	strh	r2, [r3, r6, lsl #1]	@ movhi
 	.loc 2 2212 0
 	bl	update_vpc_list
-.LVL1586:
+.LVL1588:
 	.loc 2 2213 0
 	bl	l2p_flush
-.LVL1587:
+.LVL1589:
 	.loc 2 2214 0
 	bl	FtlVpcTblFlush
-.LVL1588:
-.L1400:
+.LVL1590:
+.L1401:
 	adds	r7, r7, #1
-.LVL1589:
-	b	.L1398
-.L1407:
+.LVL1591:
+	b	.L1399
+.L1408:
 	.align	2
-.L1406:
+.L1407:
 	.word	.LANCHOR168
 	.word	.LC91
 	.word	.LANCHOR6
@@ -16976,9 +17003,9 @@ allocate_new_data_superblock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1590:
+.LVL1592:
 	.loc 2 2633 0
-	ldr	r3, .L1418
+	ldr	r3, .L1419
 	.loc 2 2631 0
 	push	{r4, r5, r6, lr}
 	.cfi_def_cfa_offset 16
@@ -16990,37 +17017,37 @@ allocate_new_data_superblock:
 	mov	r6, r0
 	.loc 2 2632 0
 	ldrh	r4, [r0]
-.LVL1591:
+.LVL1593:
 	.loc 2 2633 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bcs	.L1409
+	bcs	.L1410
 	.loc 2 2633 0 is_stmt 0 discriminator 1
 	movw	r2, #2633
-	ldr	r1, .L1418+4
-	ldr	r0, .L1418+8
-.LVL1592:
+	ldr	r1, .L1419+4
+	ldr	r0, .L1419+8
+.LVL1594:
 	bl	printf
-.LVL1593:
-.L1409:
+.LVL1595:
+.L1410:
 	.loc 2 2635 0 is_stmt 1
 	movw	r3, #65535
 	cmp	r4, r3
-	beq	.L1410
+	beq	.L1411
 	.loc 2 2636 0
-	ldr	r3, .L1418+12
+	ldr	r3, .L1419+12
 	.loc 2 2637 0
 	mov	r0, r4
 	.loc 2 2636 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbz	r3, .L1411
+	cbz	r3, .L1412
 	.loc 2 2637 0
 	bl	INSERT_DATA_LIST
-.LVL1594:
-.L1410:
+.LVL1596:
+.L1411:
 	.loc 2 2642 0
-	ldr	r5, .L1418+16
+	ldr	r5, .L1419+16
 	movw	r2, #65535
 	.loc 2 2641 0
 	movs	r3, #1
@@ -17028,50 +17055,50 @@ allocate_new_data_superblock:
 	.loc 2 2642 0
 	ldrh	r0, [r5]
 	cmp	r0, r2
-	beq	.L1412
+	beq	.L1413
 	.loc 2 2643 0
 	cmp	r4, r0
-	bne	.L1413
+	bne	.L1414
 	.loc 2 2643 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1418+12
+	ldr	r3, .L1419+12
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1414
-.L1413:
+	cbz	r3, .L1415
+.L1414:
 	.loc 2 2644 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1595:
-.L1414:
+.LVL1597:
+.L1415:
 	.loc 2 2645 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L1412:
+.L1413:
 	.loc 2 2647 0
 	mov	r0, r6
 	bl	allocate_data_superblock
-.LVL1596:
+.LVL1598:
 	.loc 2 2648 0
 	bl	l2p_flush
-.LVL1597:
+.LVL1599:
 	.loc 2 2649 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
-.LVL1598:
+.LVL1600:
 	.loc 2 2650 0
 	bl	FtlVpcTblFlush
-.LVL1599:
+.LVL1601:
 	.loc 2 2652 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.LVL1600:
-.L1411:
+.LVL1602:
+.L1412:
 	.loc 2 2639 0
 	bl	INSERT_FREE_LIST
-.LVL1601:
-	b	.L1410
-.L1419:
+.LVL1603:
+	b	.L1411
+.L1420:
 	.align	2
-.L1418:
+.L1419:
 	.word	.LANCHOR5
 	.word	.LANCHOR169
 	.word	.LC1
@@ -17094,7 +17121,7 @@ FtlProgPages:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1602:
+.LVL1604:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 40
 	.cfi_offset 4, -32
@@ -17108,43 +17135,43 @@ FtlProgPages:
 	.loc 3 913 0
 	movs	r6, #0
 	.loc 3 917 0
-	ldr	r8, .L1434+24
+	ldr	r8, .L1435+24
 	.loc 3 904 0
 	mov	r4, r3
 	.loc 3 911 0
 	movs	r2, #0
-.LVL1603:
+.LVL1605:
 	.loc 3 904 0
 	mov	r5, r0
 	.loc 3 911 0
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-.LVL1604:
+.LVL1606:
 	.loc 3 904 0
 	mov	r10, r1
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1605:
-.L1421:
+.LVL1607:
+.L1422:
 	.loc 3 913 0 discriminator 1
 	cmp	r6, r10
-	beq	.L1428
+	beq	.L1429
 	.loc 3 918 0
-	ldr	r7, .L1434
-	b	.L1429
-.L1424:
+	ldr	r7, .L1435
+	b	.L1430
+.L1425:
 	.loc 3 915 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1606:
+.LVL1608:
 	.loc 3 916 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L1422
+	bne	.L1423
 	.loc 3 917 0
 	ldr	r1, [r8]
 	ldrh	r0, [r4, #4]
-.LVL1607:
+.LVL1609:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
@@ -17156,17 +17183,17 @@ FtlProgPages:
 	strb	r3, [r4, #6]
 	.loc 3 920 0
 	strh	r3, [r4, #4]	@ movhi
-.L1422:
+.L1423:
 	.loc 3 922 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1423
+	cbnz	r3, .L1424
 	.loc 3 923 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1608:
-.L1423:
+.LVL1610:
+.L1424:
 	.loc 3 926 0
-	ldr	r2, .L1434+4
+	ldr	r2, .L1435+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
@@ -17174,11 +17201,11 @@ FtlProgPages:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
-.LVL1609:
+.LVL1611:
 	.loc 3 928 0
 	mov	r0, r4
 	bl	get_new_active_ppa
-.LVL1610:
+.LVL1612:
 	.loc 3 930 0
 	movs	r2, #0
 	.loc 3 929 0
@@ -17190,25 +17217,25 @@ FtlProgPages:
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.LVL1611:
-.L1429:
+.LVL1613:
+.L1430:
 	.loc 3 914 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L1424
+	beq	.L1425
 	.loc 3 933 0
-	ldr	r3, .L1434+8
+	ldr	r3, .L1435+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1425
+	bcc	.L1426
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	movw	r2, #933
-	ldr	r1, .L1434+12
-	ldr	r0, .L1434+16
+	ldr	r1, .L1435+12
+	ldr	r0, .L1435+16
 	bl	printf
-.LVL1612:
-.L1425:
+.LVL1614:
+.L1426:
 	.loc 3 934 0 is_stmt 1
 	ldr	r3, [r5, #4]
 	add	r1, sp, #8
@@ -17219,67 +17246,67 @@ FtlProgPages:
 	str	r3, [r1, #-4]!
 	.loc 3 935 0
 	bl	log2phys
-.LVL1613:
+.LVL1615:
 	.loc 3 937 0
 	ldr	r3, [r5, #12]
 	ldr	fp, [r3, #12]
-.LVL1614:
+.LVL1616:
 	.loc 3 939 0
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-.LVL1615:
+.LVL1617:
 	.loc 3 940 0
 	cmp	fp, #-1
 	.loc 3 939 0
 	mov	r7, r0
-.LVL1616:
+.LVL1618:
 	.loc 3 940 0
-	beq	.L1426
+	beq	.L1427
 	.loc 3 942 0
 	ldr	r3, [r8]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L1427
+	cbnz	r2, .L1428
 	.loc 3 943 0
 	mov	r1, r0
-	ldr	r0, .L1434+20
-.LVL1617:
+	ldr	r0, .L1435+20
+.LVL1619:
 	bl	printf
-.LVL1618:
-.L1427:
+.LVL1620:
+.L1428:
 	.loc 3 944 0
 	mov	r0, r7
 	bl	decrement_vpc_count
-.LVL1619:
-.L1426:
+.LVL1621:
+.L1427:
 	.loc 3 913 0 discriminator 2
 	adds	r6, r6, #1
-.LVL1620:
+.LVL1622:
 	adds	r5, r5, #20
-	b	.L1421
-.LVL1621:
-.L1428:
+	b	.L1422
+.LVL1623:
+.L1429:
 	.loc 3 948 0
-	ldr	r3, .L1434+8
+	ldr	r3, .L1435+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1420
+	bcc	.L1421
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	mov	r2, #948
-	ldr	r1, .L1434+12
-	ldr	r0, .L1434+16
+	ldr	r1, .L1435+12
+	ldr	r0, .L1435+16
 	bl	printf
-.LVL1622:
-.L1420:
+.LVL1624:
+.L1421:
 	.loc 3 949 0 is_stmt 1
 	add	sp, sp, #8
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1623:
-.L1435:
+.LVL1625:
+.L1436:
 	.align	2
-.L1434:
+.L1435:
 	.word	.LANCHOR19
 	.word	.LANCHOR83
 	.word	.LANCHOR3
@@ -17309,26 +17336,26 @@ FtlCacheWriteBack:
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 953 0
-	ldr	r4, .L1441
+	ldr	r4, .L1442
 	ldr	r0, [r4]
-	cbz	r0, .L1437
+	cbz	r0, .L1438
 	.loc 3 954 0
-	ldr	r3, .L1441+4
+	ldr	r3, .L1442+4
 	movs	r2, #0
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
-.LVL1624:
+.LVL1626:
 	.loc 3 955 0
 	movs	r3, #0
 	str	r3, [r4]
-.L1437:
+.L1438:
 	.loc 3 958 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1442:
+.L1443:
 	.align	2
-.L1441:
+.L1442:
 	.word	.LANCHOR150
 	.word	.LANCHOR171
 	.cfi_endproc
@@ -17354,17 +17381,17 @@ FtlSysFlush:
 	.cfi_offset 14, -4
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1625:
+.LVL1627:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1626:
+.LVL1628:
 	.loc 3 800 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
-.LVL1627:
+.LVL1629:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1628:
+.LVL1630:
 	.loc 3 803 0
 	movs	r0, #0
 	pop	{r3, pc}
@@ -17390,20 +17417,20 @@ sftl_deinit:
 	.cfi_offset 3, -8
 	.cfi_offset 14, -4
 	.loc 3 807 0
-	ldr	r3, .L1446
+	ldr	r3, .L1447
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L1445
+	bne	.L1446
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1629:
-.L1445:
+.LVL1631:
+.L1446:
 	.loc 3 810 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L1447:
+.L1448:
 	.align	2
-.L1446:
+.L1447:
 	.word	.LANCHOR88
 	.cfi_endproc
 .LFE216:
@@ -17422,9 +17449,9 @@ FtlDiscard:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1630:
+.LVL1632:
 	.loc 3 1164 0
-	ldr	r3, .L1463
+	ldr	r3, .L1464
 	adds	r2, r0, r1
 	.loc 3 1157 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
@@ -17441,54 +17468,54 @@ FtlDiscard:
 	.loc 3 1164 0
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1456
+	bhi	.L1457
 	.loc 3 1167 0
 	cmp	r1, #31
-	bhi	.L1450
-.LVL1631:
-.L1455:
+	bhi	.L1451
+.LVL1633:
+.L1456:
 	.loc 3 1168 0
 	movs	r0, #0
-.L1448:
+.L1449:
 	.loc 3 1201 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.LVL1632:
-.L1450:
+.LVL1634:
+.L1451:
 	.cfi_restore_state
 	.loc 3 1172 0
-	ldr	r8, .L1463+12
+	ldr	r8, .L1464+12
 	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1633:
+.LVL1635:
 	.loc 3 1172 0
 	mov	r0, r6
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL1634:
+.LVL1636:
 	.loc 3 1173 0
 	smulbb	r3, r0, r4
 	.loc 3 1172 0
 	mov	r7, r0
-.LVL1635:
+.LVL1637:
 	.loc 3 1173 0
 	subs	r6, r6, r3
-.LVL1636:
+.LVL1638:
 	uxth	r6, r6
-.LVL1637:
+.LVL1639:
 	.loc 3 1174 0
-	cbz	r6, .L1451
-.LVL1638:
+	cbz	r6, .L1452
+.LVL1640:
 	.loc 3 1175 0
 	subs	r4, r4, r6
-.LVL1639:
+.LVL1641:
 	.loc 3 1176 0
 	adds	r7, r7, #1
-.LVL1640:
+.LVL1642:
 	.loc 3 1175 0
 	cmp	r4, r5
 	it	cs
@@ -17496,48 +17523,48 @@ FtlDiscard:
 	uxth	r4, r4
 	.loc 3 1177 0
 	subs	r5, r5, r4
-.LVL1641:
-.L1451:
+.LVL1643:
+.L1452:
 	.loc 3 1184 0
-	ldr	r4, .L1463+4
+	ldr	r4, .L1464+4
 	.loc 3 1180 0
 	mov	r3, #-1
 	.loc 3 1185 0
-	ldr	r6, .L1463+8
-.LVL1642:
+	ldr	r6, .L1464+8
+.LVL1644:
 	.loc 3 1180 0
 	str	r3, [sp, #4]
-.L1452:
+.L1453:
 	.loc 3 1181 0
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L1454
+	bcs	.L1455
 	.loc 3 1194 0
-	ldr	r3, .L1463+4
+	ldr	r3, .L1464+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L1455
+	bls	.L1456
 	.loc 3 1196 0
 	movs	r4, #0
 	str	r4, [r3]
 	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1643:
+.LVL1645:
 	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1644:
-	b	.L1455
-.L1454:
+.LVL1646:
+	b	.L1456
+.L1455:
 	.loc 3 1182 0
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
-.LVL1645:
+.LVL1647:
 	.loc 3 1183 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L1453
+	beq	.L1454
 	.loc 3 1184 0
 	ldr	r3, [r4]
 	.loc 3 1186 0
@@ -17553,34 +17580,34 @@ FtlDiscard:
 	str	r3, [r6]
 	.loc 3 1186 0
 	bl	log2phys
-.LVL1646:
+.LVL1648:
 	.loc 3 1187 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1647:
+.LVL1649:
 	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1648:
-.L1453:
+.LVL1650:
+.L1454:
 	.loc 3 1191 0
 	ldrh	r3, [r8]
 	.loc 3 1190 0
 	adds	r7, r7, #1
-.LVL1649:
+.LVL1651:
 	.loc 3 1191 0
 	subs	r5, r5, r3
-.LVL1650:
-	b	.L1452
-.LVL1651:
-.L1456:
+.LVL1652:
+	b	.L1453
+.LVL1653:
+.L1457:
 	.loc 3 1165 0
 	mov	r0, #-1
-.LVL1652:
-	b	.L1448
-.L1464:
+.LVL1654:
+	b	.L1449
+.L1465:
 	.align	2
-.L1463:
+.L1464:
 	.word	.LANCHOR34
 	.word	.LANCHOR172
 	.word	.LANCHOR64
@@ -17602,7 +17629,7 @@ FtlGcFreeTempBlock:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1653:
+.LVL1655:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 48
 	.cfi_offset 4, -32
@@ -17615,69 +17642,69 @@ FtlGcFreeTempBlock:
 	.cfi_offset 14, -4
 	.loc 5 119 0
 	movw	r2, #65535
-	ldr	r4, .L1491
+	ldr	r4, .L1492
 	.loc 5 115 0
-	ldr	r6, .L1491+4
+	ldr	r6, .L1492+4
 	.loc 5 119 0
 	ldrh	r5, [r4]
 	.loc 5 115 0
 	ldrh	r1, [r6]
-.LVL1654:
+.LVL1656:
 	.loc 5 119 0
 	cmp	r5, r2
-	bne	.L1466
-.LVL1655:
-.L1476:
+	bne	.L1467
+.LVL1657:
+.L1477:
 	.loc 5 152 0
-	ldr	r3, .L1491+8
+	ldr	r3, .L1492+8
 	movs	r2, #0
 	str	r2, [r3]
 	.loc 5 153 0
 	movw	r3, #65535
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	bne	.L1489
-.L1467:
+	bne	.L1490
+.L1468:
 	.loc 5 154 0
 	movs	r0, #0
-.L1465:
+.L1466:
 	.loc 5 199 0
 	add	sp, sp, #16
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1656:
-.L1466:
+.LVL1658:
+.L1467:
 	.cfi_restore_state
 	.loc 5 121 0
-	cbz	r0, .L1469
-.LVL1657:
+	cbz	r0, .L1470
+.LVL1659:
 	.loc 5 123 0
-	ldr	r3, .L1491+12
+	ldr	r3, .L1492+12
 	ldrh	r0, [r3]
-.LVL1658:
+.LVL1660:
 	cmp	r0, r2
-	beq	.L1470
-.L1471:
+	beq	.L1471
+.L1472:
 	.loc 5 122 0
 	movs	r1, #2
-.LVL1659:
-.L1469:
+.LVL1661:
+.L1470:
 	.loc 5 131 0
-	ldr	r0, .L1491
+	ldr	r0, .L1492
 	bl	FtlGcScanTempBlk
-.LVL1660:
+.LVL1662:
 	str	r0, [sp, #12]
 	.loc 5 132 0
 	adds	r0, r0, #1
-	beq	.L1472
+	beq	.L1473
 	.loc 5 135 0
-	ldr	r3, .L1491+16
+	ldr	r3, .L1492+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #4
-	bls	.L1473
+	bls	.L1474
 	.loc 5 136 0
 	subs	r3, r3, #5
 	.loc 5 137 0
@@ -17686,14 +17713,14 @@ FtlGcFreeTempBlock:
 	strh	r3, [r2, r5, lsl #1]	@ movhi
 	.loc 5 137 0
 	bl	FtlEctTblFlush
-.LVL1661:
-.L1473:
+.LVL1663:
+.L1474:
 	.loc 5 139 0
-	ldr	r4, .L1491+8
+	ldr	r4, .L1492+8
 	ldr	r2, [r4]
-	cbnz	r2, .L1474
+	cbnz	r2, .L1475
 	.loc 5 140 0
-	ldr	r2, .L1491+20
+	ldr	r2, .L1492+20
 	.loc 5 141 0
 	ldr	r0, [sp, #12]
 	.loc 5 140 0
@@ -17705,65 +17732,65 @@ FtlGcFreeTempBlock:
 	str	r3, [r2, #96]
 	.loc 5 141 0
 	bl	FtlBbmMapBadBlock
-.LVL1662:
+.LVL1664:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1663:
-.L1474:
+.LVL1665:
+.L1475:
 	.loc 5 144 0
 	movs	r3, #0
 	str	r3, [r4]
-.L1485:
+.L1486:
 	.loc 5 149 0
 	movs	r0, #1
-	b	.L1465
-.LVL1664:
-.L1470:
+	b	.L1466
+.LVL1666:
+.L1471:
 	.loc 5 124 0
 	movs	r2, #0
 	strh	r2, [r3]	@ movhi
 	.loc 5 125 0
-	ldr	r3, .L1491+24
+	ldr	r3, .L1492+24
 	ldrh	r3, [r3]
 	cmp	r3, #17
-	bhi	.L1471
-	b	.L1469
-.LVL1665:
-.L1472:
+	bhi	.L1472
+	b	.L1470
+.LVL1667:
+.L1473:
 	.loc 5 148 0
-	ldr	r3, .L1491+12
+	ldr	r3, .L1492+12
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1485
-	b	.L1476
-.LVL1666:
-.L1489:
+	bne	.L1486
+	b	.L1477
+.LVL1668:
+.L1490:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1667:
+.LVL1669:
 	.loc 5 162 0
 	ldrb	r1, [r4, #7]	@ zero_extendqisi2
 	ldrh	r3, [r6]
-	ldr	r5, .L1491+28
+	ldr	r5, .L1492+28
 	muls	r3, r1, r3
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	beq	.L1477
+	beq	.L1478
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	movs	r2, #162
-	ldr	r1, .L1491+32
-	ldr	r0, .L1491+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1668:
-.L1477:
+.LVL1670:
+.L1478:
 	.loc 5 163 0 is_stmt 1
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L1491+40
+	ldr	r2, .L1492+40
 	ldrh	r0, [r4]
 	.loc 5 168 0
-	ldr	fp, .L1491+68
+	ldr	fp, .L1492+68
 	.loc 5 163 0
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
@@ -17773,38 +17800,38 @@ FtlGcFreeTempBlock:
 	.loc 5 163 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
 	.loc 5 164 0
-	ldr	r1, .L1491+44
+	ldr	r1, .L1492+44
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.LVL1669:
-.L1478:
+.LVL1671:
+.L1479:
 	.loc 5 165 0 discriminator 1
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L1482
+	bhi	.L1483
 	.loc 5 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1670:
+.LVL1672:
 	.loc 5 182 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1483
+	beq	.L1484
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1671:
-.L1484:
+.LVL1673:
+.L1485:
 	.loc 5 188 0
-	ldr	r3, .L1491+48
+	ldr	r3, .L1492+48
 	.loc 5 186 0
 	movw	r6, #65535
-.LVL1672:
+.LVL1674:
 	strh	r6, [r4]	@ movhi
 	.loc 5 187 0
 	movs	r4, #0
@@ -17813,30 +17840,30 @@ FtlGcFreeTempBlock:
 	strh	r4, [r3]	@ movhi
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1673:
+.LVL1675:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1674:
+.LVL1676:
 	.loc 5 191 0
-	ldr	r3, .L1491+24
+	ldr	r3, .L1492+24
 	ldrh	r2, [r3]
-	ldr	r3, .L1491+52
+	ldr	r3, .L1492+52
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L1467
+	ble	.L1468
 	.loc 5 192 0
-	ldr	r3, .L1491+56
+	ldr	r3, .L1492+56
 	.loc 5 193 0
 	movs	r2, #20
 	.loc 5 192 0
 	strh	r6, [r3]	@ movhi
 	.loc 5 193 0
-	ldr	r3, .L1491+60
+	ldr	r3, .L1492+60
 	strh	r2, [r3]	@ movhi
-	b	.L1467
-.LVL1675:
-.L1482:
+	b	.L1468
+.LVL1677:
+.L1483:
 	.loc 5 166 0
 	uxth	r3, r6
 	movs	r7, #12
@@ -17844,75 +17871,75 @@ FtlGcFreeTempBlock:
 	ldr	r2, [fp]
 	.loc 5 166 0
 	muls	r7, r3, r7
-	ldr	r3, .L1491+64
+	ldr	r3, .L1492+64
 	ldr	r8, [r3]
 	add	r10, r8, r7
-.LVL1676:
+.LVL1678:
 	.loc 5 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L1479
+	bcc	.L1480
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	movs	r2, #168
-	ldr	r1, .L1491+32
-	ldr	r0, .L1491+36
+	ldr	r1, .L1492+32
+	ldr	r0, .L1492+36
 	bl	printf
-.LVL1677:
-.L1479:
+.LVL1679:
+.L1480:
 	.loc 5 169 0 is_stmt 1
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1678:
+.LVL1680:
 	.loc 5 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L1480
+	bne	.L1481
 	.loc 5 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1679:
+.LVL1681:
 	.loc 5 172 0
 	movs	r2, #1
 	.loc 5 171 0
 	mov	r7, r0
-.LVL1680:
+.LVL1682:
 	.loc 5 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
-.LVL1681:
+.LVL1683:
 	.loc 5 173 0
 	mov	r0, r7
-.LVL1682:
-.L1490:
+.LVL1684:
+.L1491:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1683:
-.L1481:
-	adds	r6, r6, #1
-.LVL1684:
-	b	.L1478
 .LVL1685:
-.L1480:
+.L1482:
+	adds	r6, r6, #1
+.LVL1686:
+	b	.L1479
+.LVL1687:
+.L1481:
 	.loc 5 175 0
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L1481
+	beq	.L1482
 	.loc 5 177 0
 	ldrh	r0, [r4]
-	b	.L1490
-.LVL1686:
-.L1483:
+	b	.L1491
+.LVL1688:
+.L1484:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1687:
-	b	.L1484
-.L1492:
+.LVL1689:
+	b	.L1485
+.L1493:
 	.align	2
-.L1491:
+.L1492:
 	.word	.LANCHOR53
 	.word	.LANCHOR19
 	.word	.LANCHOR153
@@ -17955,42 +17982,42 @@ FtlGcPageRecovery:
 	.cfi_offset 5, -8
 	.cfi_offset 14, -4
 	.loc 5 290 0
-	ldr	r4, .L1495
-	ldr	r5, .L1495+4
+	ldr	r4, .L1496
+	ldr	r5, .L1496+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
-.LVL1688:
+.LVL1690:
 	.loc 5 291 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L1493
-.LBB282:
-.LBB283:
+	bcc	.L1494
+.LBB286:
+.LBB287:
 	.loc 5 293 0
-	ldr	r0, .L1495+8
+	ldr	r0, .L1496+8
 	bl	FtlMapBlkWriteDump_data
-.LVL1689:
+.LVL1691:
 	.loc 5 294 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-.LVL1690:
+.LVL1692:
 	.loc 5 295 0
-	ldr	r3, .L1495+12
+	ldr	r3, .L1496+12
 	movs	r2, #0
 	str	r2, [r3]
-.L1493:
+.L1494:
 	pop	{r3, r4, r5, pc}
-.L1496:
+.L1497:
 	.align	2
-.L1495:
+.L1496:
 	.word	.LANCHOR19
 	.word	.LANCHOR53
 	.word	.LANCHOR144
 	.word	.LANCHOR153
-.LBE283:
-.LBE282:
+.LBE287:
+.LBE286:
 	.cfi_endproc
 .LFE314:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
@@ -18017,44 +18044,44 @@ FtlPowerLostRecovery:
 	.loc 2 2033 0
 	movs	r4, #0
 	.loc 2 2035 0
-	ldr	r5, .L1498
+	ldr	r5, .L1499
 	.loc 2 2033 0
-	ldr	r3, .L1498+4
+	ldr	r3, .L1499+4
 	.loc 2 2035 0
 	mov	r0, r5
 	.loc 2 2033 0
 	str	r4, [r3]
 	.loc 2 2035 0
 	bl	FtlRecoverySuperblock
-.LVL1691:
+.LVL1693:
 	.loc 2 2036 0
 	mov	r0, r5
 	.loc 2 2037 0
-	ldr	r5, .L1498+8
+	ldr	r5, .L1499+8
 	.loc 2 2036 0
 	bl	FtlSlcSuperblockCheck
-.LVL1692:
+.LVL1694:
 	.loc 2 2037 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
-.LVL1693:
+.LVL1695:
 	.loc 2 2038 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
-.LVL1694:
+.LVL1696:
 	.loc 2 2039 0
 	bl	FtlGcPageRecovery
-.LVL1695:
+.LVL1697:
 	.loc 2 2040 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1696:
+.LVL1698:
 	.loc 2 2042 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1499:
+.L1500:
 	.align	2
-.L1498:
+.L1499:
 	.word	.LANCHOR51
 	.word	.LANCHOR163
 	.word	.LANCHOR52
@@ -18085,62 +18112,62 @@ Ftl_gc_temp_data_write_back:
 	.cfi_offset 14, -4
 	.loc 5 320 0
 	movs	r3, #0
-	ldr	r4, .L1507
+	ldr	r4, .L1508
 	.loc 5 321 0
 	movs	r6, #0
 	.loc 5 322 0
 	movs	r7, #20
 	.loc 5 320 0
 	mov	r2, r3
-	ldr	r5, .L1507+4
+	ldr	r5, .L1508+4
 	ldr	r1, [r4]
 	ldr	r0, [r5]
 	bl	FlashProgPages
-.LVL1697:
-.L1501:
+.LVL1699:
+.L1502:
 	.loc 5 321 0 discriminator 1
 	ldr	r1, [r4]
 	uxth	r3, r6
 	cmp	r1, r3
-	bhi	.L1504
+	bhi	.L1505
 	.loc 5 335 0
 	ldr	r0, [r5]
 	bl	FtlGcBufFree
-.LVL1698:
+.LVL1700:
 	.loc 5 337 0
-	ldr	r3, .L1507+8
+	ldr	r3, .L1508+8
 	.loc 5 336 0
 	movs	r0, #0
 	str	r0, [r4]
 	.loc 5 337 0
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1500
+	cbnz	r3, .L1501
 	.loc 5 338 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1699:
-	b	.L1506
-.L1504:
+.LVL1701:
+	b	.L1507
+.L1505:
 	.loc 5 322 0
 	muls	r3, r7, r3
 	ldr	r2, [r5]
 	adds	r6, r6, #1
-.LVL1700:
+.LVL1702:
 	adds	r1, r2, r3
 	ldr	r2, [r2, r3]
 	adds	r3, r2, #1
-	bne	.L1502
+	bne	.L1503
 	.loc 5 323 0
-	ldr	r3, .L1507+8
+	ldr	r3, .L1508+8
 	movs	r5, #0
-	ldr	r0, .L1507+12
+	ldr	r0, .L1508+12
 	ldrh	r4, [r3]
 	ldr	r0, [r0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	.loc 5 324 0
 	strh	r2, [r3]	@ movhi
 	.loc 5 325 0
-	ldr	r2, .L1507+16
+	ldr	r2, .L1508+16
 	.loc 5 326 0
 	ldr	r0, [r1, #4]
 	.loc 5 325 0
@@ -18152,33 +18179,33 @@ Ftl_gc_temp_data_write_back:
 	str	r3, [r2, #96]
 	.loc 5 326 0
 	bl	FtlBbmMapBadBlock
-.LVL1701:
+.LVL1703:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1702:
+.LVL1704:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1703:
-.L1506:
+.LVL1705:
+.L1507:
 	.loc 5 339 0
 	movs	r0, #1
-.L1500:
+.L1501:
 	.loc 5 342 0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1502:
+.L1503:
 	.loc 5 331 0 discriminator 2
 	ldr	r3, [r1, #12]
-.LVL1704:
+.LVL1706:
 	.loc 5 332 0 discriminator 2
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-.LVL1705:
-	b	.L1501
-.L1508:
+.LVL1707:
+	b	.L1502
+.L1509:
 	.align	2
-.L1507:
+.L1508:
 	.word	.LANCHOR91
 	.word	.LANCHOR121
 	.word	.LANCHOR53
@@ -18209,50 +18236,50 @@ Ftl_get_new_temp_ppa:
 	.cfi_offset 14, -4
 	.loc 5 301 0
 	movw	r3, #65535
-	ldr	r4, .L1512
+	ldr	r4, .L1513
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L1510
+	beq	.L1511
 	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1511
-.L1510:
+	cbnz	r3, .L1512
+.L1511:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1706:
+.LVL1708:
 	.loc 5 303 0
 	movs	r0, #0
 	.loc 5 304 0
 	movs	r5, #0
 	.loc 5 303 0
 	bl	FtlGcFreeTempBlock
-.LVL1707:
+.LVL1709:
 	.loc 5 305 0
-	ldr	r0, .L1512
+	ldr	r0, .L1513
 	.loc 5 304 0
 	strb	r5, [r4, #8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1708:
+.LVL1710:
 	.loc 5 306 0
-	ldr	r3, .L1512+4
+	ldr	r3, .L1513+4
 	strh	r5, [r3]	@ movhi
 	.loc 5 307 0
-	ldr	r3, .L1512+8
+	ldr	r3, .L1513+8
 	strh	r5, [r3]	@ movhi
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1709:
+.LVL1711:
 	.loc 5 309 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
-.LVL1710:
+.LVL1712:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1711:
-.L1511:
+.LVL1713:
+.L1512:
 	.loc 5 312 0
-	ldr	r0, .L1512
+	ldr	r0, .L1513
 	.loc 5 313 0
 	pop	{r3, r4, r5, lr}
 	.cfi_restore 14
@@ -18262,10 +18289,10 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa_offset 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1712:
-.L1513:
+.LVL1714:
+.L1514:
 	.align	2
-.L1512:
+.L1513:
 	.word	.LANCHOR53
 	.word	.LANCHOR98
 	.word	.LANCHOR99
@@ -18286,9 +18313,9 @@ rk_ftl_garbage_collect:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1713:
+.LVL1715:
 	.loc 5 478 0
-	ldr	r3, .L1632
+	ldr	r3, .L1633
 	.loc 5 470 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	.cfi_def_cfa_offset 32
@@ -18305,36 +18332,36 @@ rk_ftl_garbage_collect:
 	.cfi_def_cfa_offset 80
 	.loc 5 478 0
 	ldr	r0, [r3]
-.LVL1714:
+.LVL1716:
 	cmp	r0, #0
-	bne	.L1589
+	bne	.L1590
 	.loc 5 481 0
-	ldr	r3, .L1632+4
+	ldr	r3, .L1633+4
 	ldrh	r3, [r3]
 	cmp	r3, #47
-	bls	.L1514
+	bls	.L1515
 	.loc 5 485 0
-	ldr	r3, .L1632+8
+	ldr	r3, .L1633+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1516
-.LVL1715:
-.L1519:
-.LBB287:
-.LBB288:
+	bne	.L1517
+.LVL1717:
+.L1520:
+.LBB291:
+.LBB292:
 	.loc 5 489 0
-	ldr	r3, .L1632+12
+	ldr	r3, .L1633+12
 	movw	r4, #65535
 	ldrh	r0, [r3]
 	cmp	r0, r4
-	bne	.L1517
-.L1518:
+	bne	.L1518
+.L1519:
 	.loc 5 496 0
-	ldr	r2, .L1632+16
+	ldr	r2, .L1633+16
 	.loc 5 497 0
 	movw	r5, #65535
-	ldr	r6, .L1632+20
+	ldr	r6, .L1633+20
 	.loc 5 496 0
 	ldr	r3, [r2]
 	.loc 5 497 0
@@ -18347,17 +18374,17 @@ rk_ftl_garbage_collect:
 	.loc 5 496 0
 	str	r3, [r2]
 	.loc 5 497 0
-	bne	.L1520
-	ldr	r1, .L1632+24
+	bne	.L1521
+	ldr	r1, .L1633+24
 	ldrh	r1, [r1]
 	cmp	r1, r0
-	bne	.L1521
-	ldr	r0, .L1632+28
+	bne	.L1522
+	ldr	r0, .L1633+28
 	ldrh	r10, [r0]
 	cmp	r10, r1
-	bne	.L1522
+	bne	.L1523
 	.loc 5 498 0
-	ldr	r1, .L1632+32
+	ldr	r1, .L1633+32
 	ldrh	r0, [r1]
 	mov	r8, r1
 	cmp	r0, #24
@@ -18365,10 +18392,10 @@ rk_ftl_garbage_collect:
 	movcc	r1, #5120
 	movcs	r1, #1024
 	cmp	r3, r1
-	bls	.L1522
-.LBB289:
+	bls	.L1523
+.LBB293:
 	.loc 5 502 0
-	ldr	r3, .L1632+36
+	ldr	r3, .L1633+36
 	.loc 5 501 0
 	movs	r4, #0
 	str	r4, [r2]
@@ -18376,152 +18403,152 @@ rk_ftl_garbage_collect:
 	strh	r4, [r3]	@ movhi
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1716:
+.LVL1718:
 	.loc 5 504 0
 	cmp	r0, r10
 	.loc 5 503 0
 	mov	r5, r0
-.LVL1717:
+.LVL1719:
 	.loc 5 504 0
-	bne	.L1593
+	bne	.L1594
 	.loc 5 505 0
-	ldr	r10, .L1632+96
+	ldr	r10, .L1633+96
 	ldrh	r2, [r8]
 	ldrh	r3, [r10]
 	cmp	r2, r3
-	bcs	.L1525
+	bcs	.L1526
 	.loc 5 506 0
 	movs	r0, #64
-.LVL1718:
+.LVL1720:
 	bl	List_get_gc_head_node
-.LVL1719:
+.LVL1721:
 	.loc 5 507 0
 	uxth	r3, r0
 	cmp	r3, r5
-	beq	.L1527
+	beq	.L1528
 	.loc 5 508 0
 	mov	r0, r3
-	ldr	r3, .L1632+40
+	ldr	r3, .L1633+40
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #7
-	bhi	.L1528
+	bhi	.L1529
 	.loc 5 509 0
 	mov	r0, r4
-.LVL1720:
+.LVL1722:
 	bl	List_get_gc_head_node
-.LVL1721:
+.LVL1723:
 	uxth	r4, r0
-.LVL1722:
+.LVL1724:
 	.loc 5 510 0
 	movs	r3, #128
 	strh	r3, [r10]	@ movhi
 	.loc 5 520 0
 	cmp	r4, r5
-	bne	.L1524
-.LVL1723:
-.L1527:
+	bne	.L1525
+.LVL1725:
+.L1528:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1724:
-.LBE289:
+.LVL1726:
+.LBE293:
 	.loc 5 527 0
 	cmp	r7, #0
-	bne	.L1530
+	bne	.L1531
 	movw	r3, #65535
 	cmp	r5, r3
-	bne	.L1530
-.LVL1725:
-.L1587:
+	bne	.L1531
+.LVL1727:
+.L1588:
 	.loc 5 528 0
-	ldr	r3, .L1632+32
+	ldr	r3, .L1633+32
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L1594
-	ldr	r2, .L1632+44
+	bhi	.L1595
+	ldr	r2, .L1633+44
 	.loc 5 530 0
 	cmp	r3, #16
 	.loc 5 531 0
 	ldrh	r4, [r2]
 	.loc 5 530 0
-	bls	.L1532
+	bls	.L1533
 	.loc 5 531 0
 	lsrs	r4, r4, #5
-.LVL1726:
-.L1531:
+.LVL1728:
+.L1532:
 	.loc 5 539 0
-	ldr	r2, .L1632+48
+	ldr	r2, .L1633+48
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1535
+	bcs	.L1536
 	.loc 5 540 0
-	ldr	r3, .L1632+24
+	ldr	r3, .L1633+24
 	movw	r0, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L1536
-	ldr	r0, .L1632+28
+	bne	.L1537
+	ldr	r0, .L1633+28
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L1536
+	bne	.L1537
 	.loc 5 542 0
-	ldr	r3, .L1632+36
+	ldr	r3, .L1633+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L1537
-	ldr	r3, .L1632+52
-	ldr	r4, .L1632+56
-.LVL1727:
+	cbnz	r0, .L1538
+	ldr	r3, .L1633+52
+	ldr	r4, .L1633+56
+.LVL1729:
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L1538
-.L1537:
+	bcs	.L1539
+.L1538:
 	.loc 5 543 0
-	ldr	r3, .L1632+60
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1539:
+.L1540:
 	.loc 5 546 0
-	ldr	r3, .L1632+64
+	ldr	r3, .L1633+64
 	movs	r2, #0
 	str	r2, [r3]
-.LVL1728:
-.L1514:
-.LBE288:
-.LBE287:
+.LVL1730:
+.L1515:
+.LBE292:
+.LBE291:
 	.loc 5 758 0
 	add	sp, sp, #48
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1729:
-.L1516:
+.LVL1731:
+.L1517:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
-	ldr	r2, .L1632+24
+	ldr	r2, .L1633+24
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1519
+	beq	.L1520
 	.loc 5 486 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.LVL1730:
+.LVL1732:
 	cmp	r0, #0
-	beq	.L1519
+	beq	.L1520
 	.loc 5 487 0
 	movs	r0, #1
-	b	.L1514
-.LVL1731:
-.L1517:
-.LBB293:
-.LBB291:
+	b	.L1515
+.LVL1733:
+.L1518:
+.LBB297:
+.LBB295:
 	.loc 5 489 0
-	ldr	r1, .L1632+28
+	ldr	r1, .L1633+28
 	ldrh	r2, [r1]
 	cmp	r2, r4
 	.loc 5 490 0
@@ -18529,108 +18556,108 @@ rk_ftl_garbage_collect:
 	strheq	r0, [r1]	@ movhi
 	.loc 5 491 0
 	strheq	r2, [r3]	@ movhi
-	b	.L1518
-.LVL1732:
-.L1528:
-.LBB290:
+	b	.L1519
+.LVL1734:
+.L1529:
+.LBB294:
 	.loc 5 512 0
 	movs	r3, #64
-.LVL1733:
-.L1626:
+.LVL1735:
+.L1627:
 	.loc 5 516 0
 	strh	r3, [r10]	@ movhi
-	b	.L1527
-.LVL1734:
-.L1525:
+	b	.L1528
+.LVL1736:
+.L1526:
 	movs	r3, #80
-	b	.L1626
-.L1593:
+	b	.L1627
+.L1594:
 	.loc 5 504 0
 	mov	r4, r0
-.LVL1735:
-.L1524:
+.LVL1737:
+.L1525:
 	.loc 5 521 0
-	ldr	r3, .L1632+40
+	ldr	r3, .L1633+40
 	mov	r5, r4
-	ldr	r1, .L1632+48
+	ldr	r1, .L1633+48
 	ldrh	r2, [r8]
 	ldr	r3, [r3]
 	ldrh	r1, [r1]
-	ldr	r0, .L1632+68
+	ldr	r0, .L1633+68
 	ldrh	r3, [r3, r4, lsl #1]
 	str	r1, [sp, #4]
-	ldr	r1, .L1632+72
+	ldr	r1, .L1633+72
 	ldr	r1, [r1]
 	ldrh	r1, [r1, r4, lsl #1]
 	str	r1, [sp]
 	mov	r1, r4
 	bl	printf
-.LVL1736:
-	b	.L1527
-.LVL1737:
-.L1532:
-.LBE290:
+.LVL1738:
+	b	.L1528
+.LVL1739:
+.L1533:
+.LBE294:
 	.loc 5 532 0
 	cmp	r3, #12
-	bls	.L1533
+	bls	.L1534
 	.loc 5 533 0
 	lsrs	r4, r4, #4
-.LVL1738:
-	b	.L1531
-.LVL1739:
-.L1533:
+.LVL1740:
+	b	.L1532
+.LVL1741:
+.L1534:
 	.loc 5 534 0
 	cmp	r3, #8
-	bls	.L1531
+	bls	.L1532
 	.loc 5 535 0
 	lsrs	r4, r4, #2
-.LVL1740:
-	b	.L1531
-.LVL1741:
-.L1594:
+.LVL1742:
+	b	.L1532
+.LVL1743:
+.L1595:
 	.loc 5 529 0
 	movs	r4, #1
-	b	.L1531
-.L1538:
+	b	.L1532
+.L1539:
 	.loc 5 545 0
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L1539
-.LVL1742:
-.L1536:
+	b	.L1540
+.LVL1744:
+.L1537:
 	.loc 5 549 0
-	ldr	r3, .L1632+60
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L1535:
+.L1536:
 	.loc 5 551 0
-	ldr	r3, .L1632+76
+	ldr	r3, .L1633+76
 	ldrh	r3, [r3]
-	cbz	r3, .L1595
+	cbz	r3, .L1596
 	.loc 5 552 0
 	adds	r4, r4, #32
-.LVL1743:
+.LVL1745:
 	uxth	r4, r4
-.LVL1744:
-.L1595:
+.LVL1746:
+.L1596:
 	.loc 5 551 0
 	movw	r5, #65535
-.LVL1745:
-.L1541:
+.LVL1747:
+.L1542:
 	.loc 5 597 0
 	ldrh	r3, [r6]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1550
+	bne	.L1551
 	.loc 5 598 0
 	cmp	r5, r3
-	beq	.L1551
+	beq	.L1552
 	.loc 5 599 0
 	strh	r5, [r6]	@ movhi
-.LVL1746:
-.L1552:
+.LVL1748:
+.L1553:
 	.loc 5 611 0
 	ldrh	r0, [r6]
 	movw	r7, #65535
@@ -18639,25 +18666,25 @@ rk_ftl_garbage_collect:
 	strb	r3, [r6, #8]
 	.loc 5 611 0
 	cmp	r0, r7
-	beq	.L1550
+	beq	.L1551
 	.loc 5 612 0
 	bl	IsBlkInGcList
-.LVL1747:
-	cbz	r0, .L1555
+.LVL1749:
+	cbz	r0, .L1556
 	.loc 5 613 0
 	strh	r7, [r6]	@ movhi
-.L1555:
+.L1556:
 	.loc 5 615 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1550
+	beq	.L1551
 	.loc 5 616 0
-	ldr	r0, .L1632+20
+	ldr	r0, .L1633+20
 	bl	make_superblock
-.LVL1748:
+.LVL1750:
 	.loc 5 619 0
-	ldr	r2, .L1632+80
+	ldr	r2, .L1633+80
 	.loc 5 617 0
 	movs	r3, #0
 	strh	r3, [r6, #2]	@ movhi
@@ -18666,43 +18693,43 @@ rk_ftl_garbage_collect:
 	.loc 5 619 0
 	strh	r3, [r2]	@ movhi
 	.loc 5 620 0
-	ldr	r3, .L1632+40
+	ldr	r3, .L1633+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1632+84
+	ldr	r3, .L1633+84
 	strh	r2, [r3]	@ movhi
-.L1550:
+.L1551:
 	.loc 5 625 0
-	ldr	r2, .L1632+88
+	ldr	r2, .L1633+88
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1556
-	ldr	r2, .L1632+92
+	beq	.L1557
+	ldr	r2, .L1633+92
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L1556
+	beq	.L1557
 	.loc 5 631 0
-	ldr	r6, .L1632+20
+	ldr	r6, .L1633+20
 	mov	fp, r6
-.L1557:
+.L1558:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1558
+	bne	.L1559
 	.loc 5 635 0
-	ldr	r8, .L1632+100
+	ldr	r8, .L1633+100
 	.loc 5 632 0
 	movs	r2, #0
-	ldr	r3, .L1632+64
+	ldr	r3, .L1633+64
 	str	r2, [r3]
-.L1559:
+.L1560:
 	.loc 5 635 0
 	ldrh	r7, [r8]
 	mov	r0, r7
 	bl	List_get_gc_head_node
-.LVL1749:
+.LVL1751:
 	uxth	r3, r0
 	.loc 5 636 0
 	movw	r1, #65535
@@ -18710,59 +18737,59 @@ rk_ftl_garbage_collect:
 	.loc 5 635 0
 	strh	r3, [fp]	@ movhi
 	.loc 5 636 0
-	bne	.L1560
+	bne	.L1561
 	.loc 5 637 0
 	movs	r3, #0
 	.loc 5 638 0
 	movs	r0, #8
 	.loc 5 637 0
 	strh	r3, [r8]	@ movhi
-	b	.L1514
-.LVL1750:
-.L1542:
+	b	.L1515
+.LVL1752:
+.L1543:
 	.loc 5 558 0
-	ldr	r3, .L1632+64
+	ldr	r3, .L1633+64
 	movs	r2, #0
 	.loc 5 560 0
-	ldr	r1, .L1632+48
-	ldr	r4, .L1632+32
+	ldr	r1, .L1633+48
+	ldr	r4, .L1633+32
 	.loc 5 558 0
 	str	r2, [r3]
 	.loc 5 560 0
 	ldrh	r3, [r1]
 	mov	r2, r1
 	ldrh	r8, [r4]
-	ldr	r5, .L1632+36
+	ldr	r5, .L1633+36
 	cmp	r3, r8
-	bcs	.L1543
+	bcs	.L1544
 	.loc 5 561 0
 	ldrh	r3, [r5]
-	cbnz	r3, .L1544
-	ldr	r3, .L1632+52
-	ldr	r0, .L1632+56
+	cbnz	r3, .L1545
+	ldr	r3, .L1633+52
+	ldr	r0, .L1633+56
 	ldr	r3, [r3]
 	ldr	r0, [r0]
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcs	.L1545
-.L1544:
+	bcs	.L1546
+.L1545:
 	.loc 5 562 0
-	ldr	r3, .L1632+60
+	ldr	r3, .L1633+60
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-.LVL1751:
-.L1629:
+.LVL1753:
+.L1630:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1752:
+.LVL1754:
 	.loc 5 579 0
 	ldrh	r0, [r5]
-	b	.L1514
-.L1633:
+	b	.L1515
+.L1634:
 	.align	2
-.L1632:
+.L1633:
 	.word	.LANCHOR117
 	.word	.LANCHOR45
 	.word	.LANCHOR157
@@ -18789,115 +18816,115 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR52
 	.word	.LANCHOR85
 	.word	.LANCHOR87
-.LVL1753:
-.L1545:
+.LVL1755:
+.L1546:
 	.loc 5 564 0
 	movs	r3, #18
 	strh	r3, [r1]	@ movhi
-	b	.L1629
-.L1543:
+	b	.L1630
+.L1544:
 	.loc 5 572 0
 	ldrh	r0, [r5]
 	cmp	r0, #0
-	bne	.L1547
+	bne	.L1548
 	.loc 5 573 0
-	ldr	r3, .L1634
+	ldr	r3, .L1635
 	ldrh	r7, [r3]
-.LVL1754:
+.LVL1756:
 	add	r2, r7, r7, lsl #1
 	asrs	r2, r2, #2
 	strh	r2, [r1]	@ movhi
 	.loc 5 574 0
 	bl	List_get_gc_head_node
-.LVL1755:
+.LVL1757:
 	.loc 5 575 0
-	ldr	r3, .L1634+4
+	ldr	r3, .L1635+4
 	uxth	r0, r0
-	ldr	r2, .L1634+8
+	ldr	r2, .L1635+8
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	ldrh	r1, [r3, r0, lsl #1]
-	ldr	r3, .L1634+12
+	ldr	r3, .L1635+12
 	ldrh	r3, [r3]
 	muls	r2, r3, r2
 	cmp	r1, r2, asr #1
-	ble	.L1548
+	ble	.L1549
 	.loc 5 576 0
 	subs	r3, r7, #1
 	.loc 5 575 0
 	cmp	r8, r3
-	bge	.L1629
-.L1548:
+	bge	.L1630
+.L1549:
 	.loc 5 584 0
 	cmp	r1, #0
-	bne	.L1547
+	bne	.L1548
 	.loc 5 585 0
 	movw	r0, #65535
-.LVL1756:
+.LVL1758:
 	bl	decrement_vpc_count
-.LVL1757:
+.LVL1759:
 	.loc 5 586 0
 	ldrh	r0, [r4]
 	adds	r0, r0, #1
-	b	.L1514
-.LVL1758:
-.L1551:
+	b	.L1515
+.LVL1760:
+.L1552:
 	.loc 5 600 0
-	ldr	r3, .L1634+16
+	ldr	r3, .L1635+16
 	ldrh	r2, [r3]
 	cmp	r2, r5
-	beq	.L1552
+	beq	.L1553
 	.loc 5 604 0
-	ldr	r1, .L1634+4
+	ldr	r1, .L1635+4
 	ldr	r1, [r1]
 	ldrh	r2, [r1, r2, lsl #1]
-	cbnz	r2, .L1553
+	cbnz	r2, .L1554
 	.loc 5 605 0
 	strh	r5, [r3]	@ movhi
-.L1553:
+.L1554:
 	.loc 5 606 0
 	ldrh	r2, [r3]
 	strh	r2, [r6]	@ movhi
 	.loc 5 607 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-	b	.L1552
-.LVL1759:
-.L1556:
+	b	.L1553
+.LVL1761:
+.L1557:
 	.loc 5 626 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.LVL1760:
-.L1630:
+.LVL1762:
+.L1631:
 	.loc 5 652 0
-	ldr	r3, .L1634+20
+	ldr	r3, .L1635+20
 	ldrh	r0, [r3]
-	b	.L1514
-.LVL1761:
-.L1560:
+	b	.L1515
+.LVL1763:
+.L1561:
 	str	r0, [sp, #16]
 	.loc 5 640 0
 	mov	r0, r3
 	str	r3, [sp, #12]
 	adds	r7, r7, #1
 	bl	IsBlkInGcList
-.LVL1762:
+.LVL1764:
 	ldr	r3, [sp, #12]
 	ldr	r2, [sp, #16]
-	cbz	r0, .L1561
+	cbz	r0, .L1562
 	.loc 5 641 0
 	strh	r7, [r8]	@ movhi
-	b	.L1559
-.L1561:
+	b	.L1560
+.L1562:
 	.loc 5 645 0
 	uxth	r0, r2
-	ldr	r2, .L1634+24
-	ldr	r10, .L1634+4
+	ldr	r2, .L1635+24
+	ldr	r10, .L1635+4
 	.loc 5 644 0
 	uxth	r7, r7
 	.loc 5 645 0
 	ldrh	lr, [r2]
-	ldr	r2, .L1634+8
+	ldr	r2, .L1635+8
 	ldr	r1, [r10]
 	.loc 5 644 0
 	strh	r7, [r8]	@ movhi
@@ -18906,96 +18933,96 @@ rk_ftl_garbage_collect:
 	ldrh	ip, [r1, r0, lsl #1]
 	mul	lr, r2, lr
 	cmp	ip, lr, asr #1
-	bgt	.L1563
+	bgt	.L1564
 	.loc 5 646 0
 	cmp	r7, #48
-	bls	.L1564
+	bls	.L1565
 	cmp	ip, #8
-	bls	.L1564
-	ldr	r7, .L1634+28
+	bls	.L1565
+	ldr	r7, .L1635+28
 	ldrh	r7, [r7]
 	cmp	r7, #35
-	bhi	.L1564
-.L1563:
+	bhi	.L1565
+.L1564:
 	.loc 5 647 0
-	ldr	r2, .L1634+32
+	ldr	r2, .L1635+32
 	movs	r7, #0
 	strh	r7, [r2]	@ movhi
-.L1564:
+.L1565:
 	.loc 5 649 0
 	ldrh	r1, [r1, r0, lsl #1]
 	cmp	lr, r1
-	bgt	.L1565
+	bgt	.L1566
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L1565
+	bne	.L1566
 	.loc 5 651 0
-	ldr	r2, .L1634+32
+	ldr	r2, .L1635+32
 	movs	r3, #0
 	.loc 5 650 0
 	strh	r5, [fp]	@ movhi
 	.loc 5 651 0
 	strh	r3, [r2]	@ movhi
-	b	.L1630
-.L1565:
+	b	.L1631
+.L1566:
 	.loc 5 655 0
-	cbnz	r1, .L1566
+	cbnz	r1, .L1567
 	.loc 5 656 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-.LVL1763:
+.LVL1765:
 	.loc 5 657 0
-	ldr	r3, .L1634+32
-	ldr	r2, .L1634+32
+	ldr	r3, .L1635+32
+	ldr	r2, .L1635+32
 	ldrh	r3, [r3]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	b	.L1559
-.L1566:
+	b	.L1560
+.L1567:
 	.loc 5 660 0
 	movs	r2, #0
 	strb	r2, [fp, #8]
 	.loc 5 662 0
-	ldr	r2, .L1634+36
+	ldr	r2, .L1635+36
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bne	.L1567
+	bne	.L1568
 	movw	r2, #662
-	ldr	r1, .L1634+40
-	ldr	r0, .L1634+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1764:
-.L1567:
+.LVL1766:
+.L1568:
 	.loc 5 663 0
-	ldr	r3, .L1634+48
+	ldr	r3, .L1635+48
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1568
+	bne	.L1569
 	movw	r2, #663
-	ldr	r1, .L1634+40
-	ldr	r0, .L1634+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1765:
-.L1568:
+.LVL1767:
+.L1569:
 	.loc 5 664 0
-	ldr	r3, .L1634+52
+	ldr	r3, .L1635+52
 	ldrh	r2, [fp]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1569
+	bne	.L1570
 	mov	r2, #664
-	ldr	r1, .L1634+40
-	ldr	r0, .L1634+44
+	ldr	r1, .L1635+40
+	ldr	r0, .L1635+44
 	bl	printf
-.LVL1766:
-.L1569:
+.LVL1768:
+.L1570:
 	.loc 5 665 0
 	mov	r0, r6
 	bl	make_superblock
-.LVL1767:
+.LVL1769:
 	.loc 5 666 0
-	ldr	r2, .L1634+56
+	ldr	r2, .L1635+56
 	movs	r3, #0
 	.loc 5 667 0
 	ldrh	r1, [fp]
@@ -19004,26 +19031,26 @@ rk_ftl_garbage_collect:
 	.loc 5 667 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L1634+60
+	ldr	r2, .L1635+60
 	.loc 5 668 0
 	strh	r3, [fp, #2]	@ movhi
 	.loc 5 669 0
 	strb	r3, [fp, #6]
 	.loc 5 667 0
 	strh	r1, [r2]	@ movhi
-.L1558:
+.L1559:
 	.loc 5 675 0
 	bl	FtlReadRefresh
-.LVL1768:
+.LVL1770:
 	.loc 5 678 0
-	ldr	r3, .L1634+64
+	ldr	r3, .L1635+64
 	movs	r2, #1
 	str	r2, [r3]
 	.loc 5 679 0
-	ldr	r3, .L1634+24
+	ldr	r3, .L1635+24
 	ldrh	r3, [r3]
 	str	r3, [sp, #28]
-.LVL1769:
+.LVL1771:
 	.loc 5 680 0
 	ldrh	r3, [fp, #2]
 	ldr	r1, [sp, #28]
@@ -19033,50 +19060,50 @@ rk_ftl_garbage_collect:
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
-.LVL1770:
+.LVL1772:
 	.loc 5 693 0
 	mov	r3, #0
 	.loc 5 681 0
 	it	gt
 	uxthgt	r4, r4
-.LVL1771:
-.L1628:
+.LVL1773:
+.L1629:
 	str	r3, [sp, #24]
-.LVL1772:
+.LVL1774:
 	.loc 5 683 0
 	ldrh	r3, [sp, #24]
 	cmp	r4, r3
-	bls	.L1579
+	bls	.L1580
 	.loc 5 685 0
-	ldr	r3, .L1634+8
+	ldr	r3, .L1635+8
 	.loc 5 687 0
 	movw	r10, #65535
 	.loc 5 688 0
 	ldrh	r8, [r6, #2]
-	ldr	r1, .L1634+68
+	ldr	r1, .L1635+68
 	.loc 5 685 0
 	ldrh	ip, [r3]
 	.loc 5 688 0
-	ldr	r3, .L1634+72
+	ldr	r3, .L1635+72
 	ldr	r0, [r3]
 	ldr	r3, [sp, #24]
 	add	r8, r8, r3
 	movs	r3, #0
 	str	r3, [sp, #12]
-	b	.L1580
-.LVL1773:
-.L1573:
+	b	.L1581
+.LVL1775:
+.L1574:
 	.loc 5 686 0
 	ldrh	r2, [r1, #2]!
-.LVL1774:
+.LVL1776:
 	.loc 5 687 0
 	cmp	r2, r10
-	beq	.L1572
+	beq	.L1573
 	.loc 5 688 0
 	ldr	r7, [sp, #12]
 	mov	lr, #20
 	orr	r2, r8, r2, lsl #10
-.LVL1775:
+.LVL1777:
 	mla	lr, lr, r7, r0
 	str	r2, [lr, #4]
 	.loc 5 689 0
@@ -19084,37 +19111,37 @@ rk_ftl_garbage_collect:
 	adds	r2, r2, #1
 	uxth	r2, r2
 	str	r2, [sp, #12]
-.LVL1776:
-.L1572:
+.LVL1778:
+.L1573:
 	adds	r3, r3, #1
-.LVL1777:
-.L1580:
+.LVL1779:
+.L1581:
 	.loc 5 685 0
 	uxth	r2, r3
 	cmp	ip, r2
-	bhi	.L1573
+	bhi	.L1574
 	.loc 5 693 0
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
 	ldr	r1, [sp, #12]
 	bl	FlashReadPages
-.LVL1778:
+.LVL1780:
 	movs	r3, #0
-.LVL1779:
-.L1627:
+.LVL1781:
+.L1628:
 	str	r3, [sp, #20]
-.LVL1780:
+.LVL1782:
 	.loc 5 695 0
 	ldr	r2, [sp, #12]
 	ldrh	r3, [sp, #20]
 	cmp	r2, r3
-	bhi	.L1578
-.LVL1781:
+	bhi	.L1579
+.LVL1783:
 	ldr	r3, [sp, #24]
 	adds	r3, r3, #1
-	b	.L1628
-.L1635:
+	b	.L1629
+.L1636:
 	.align	2
-.L1634:
+.L1635:
 	.word	.LANCHOR80
 	.word	.LANCHOR43
 	.word	.LANCHOR3
@@ -19134,72 +19161,72 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR117
 	.word	.LANCHOR82+14
 	.word	.LANCHOR95
-.LVL1782:
-.L1578:
+.LVL1784:
+.L1579:
 	ldr	r3, [sp, #20]
 	movs	r7, #20
 	muls	r7, r3, r7
 	.loc 5 696 0
-	ldr	r3, .L1636
+	ldr	r3, .L1637
 	ldr	r3, [r3]
 	adds	r2, r3, r7
-.LVL1783:
+.LVL1785:
 	.loc 5 697 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L1575
+	beq	.L1576
 	.loc 5 696 0
 	ldr	r3, [r2, #12]
 	.loc 5 697 0
 	ldrh	r2, [r3]
-.LVL1784:
+.LVL1786:
 	.loc 5 696 0
 	str	r3, [sp, #16]
 	.loc 5 697 0
 	movw	r3, #61589
-.LVL1785:
+.LVL1787:
 	cmp	r2, r3
-	bne	.L1575
+	bne	.L1576
 	.loc 5 699 0
 	ldr	r3, [sp, #16]
 	ldr	r8, [r3, #8]
-.LVL1786:
+.LVL1788:
 	.loc 5 700 0
 	cmp	r8, #-1
-	bne	.L1576
+	bne	.L1577
 	mov	r2, #700
-	ldr	r1, .L1636+4
-	ldr	r0, .L1636+8
+	ldr	r1, .L1637+4
+	ldr	r0, .L1637+8
 	bl	printf
-.LVL1787:
-.L1576:
+.LVL1789:
+.L1577:
 	.loc 5 701 0
 	movs	r2, #0
 	add	r1, sp, #44
 	mov	r0, r8
 	bl	log2phys
-.LVL1788:
+.LVL1790:
 	.loc 5 702 0
-	ldr	r3, .L1636
+	ldr	r3, .L1637
 	ldr	r1, [r3]
 	ldr	r3, [sp, #44]
 	add	r1, r1, r7
 	ldr	r2, [r1, #4]
 	cmp	r2, r3
-	bne	.L1575
+	bne	.L1576
 	.loc 5 704 0
-	ldr	r2, .L1636+12
+	ldr	r2, .L1637+12
 	.loc 5 705 0
 	mov	r10, #20
-	ldr	r8, .L1636+36
-.LVL1789:
+	ldr	r8, .L1637+36
+.LVL1791:
 	ldr	r1, [r1, #16]
 	.loc 5 704 0
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
 	.loc 5 705 0
-	ldr	r2, .L1636+16
+	ldr	r2, .L1637+16
 	ldr	r3, [r8]
 	ldr	r0, [r2]
 	str	r2, [sp, #36]
@@ -19208,7 +19235,7 @@ rk_ftl_garbage_collect:
 	str	r3, [sp, #32]
 	.loc 5 706 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1790:
+.LVL1792:
 	ldr	r3, [sp, #32]
 	.loc 5 707 0
 	ldr	r2, [sp, #36]
@@ -19220,14 +19247,14 @@ rk_ftl_garbage_collect:
 	ldr	r2, [r2]
 	ldr	r3, [r8]
 	mla	r10, r10, r3, r2
-	ldr	r2, .L1636
+	ldr	r2, .L1637
 	.loc 5 715 0
 	adds	r3, r3, #1
 	.loc 5 707 0
 	ldr	r0, [r2]
 	add	r0, r0, r7
 	.loc 5 710 0
-	ldr	r7, .L1636+20
+	ldr	r7, .L1637+20
 	.loc 5 707 0
 	ldr	r2, [r0, #8]
 	str	r2, [r10, #8]
@@ -19241,7 +19268,7 @@ rk_ftl_garbage_collect:
 	ldrh	r2, [r7]
 	strh	r2, [r1, #2]	@ movhi
 	.loc 5 713 0
-	ldr	r2, .L1636+24
+	ldr	r2, .L1637+24
 	.loc 5 715 0
 	str	r3, [r8]
 	.loc 5 713 0
@@ -19250,37 +19277,37 @@ rk_ftl_garbage_collect:
 	.loc 5 716 0
 	movs	r1, #1
 	bl	FtlGcBufAlloc
-.LVL1791:
+.LVL1793:
 	.loc 5 717 0
 	ldrb	r2, [r7, #7]	@ zero_extendqisi2
 	ldr	r3, [r8]
 	cmp	r2, r3
-	beq	.L1577
+	beq	.L1578
 	ldrh	r3, [r7, #4]
-	cbnz	r3, .L1575
-.L1577:
+	cbnz	r3, .L1576
+.L1578:
 	.loc 5 718 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1792:
-	cbz	r0, .L1575
-.LVL1793:
-.L1631:
+.LVL1794:
+	cbz	r0, .L1576
+.LVL1795:
+.L1632:
 	.loc 5 733 0
-	ldr	r3, .L1636+28
+	ldr	r3, .L1637+28
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L1630
-.LVL1794:
-.L1575:
+	b	.L1631
+.LVL1796:
+.L1576:
 	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1627
-.LVL1795:
-.L1579:
+	b	.L1628
+.LVL1797:
+.L1580:
 	.loc 5 727 0
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-.LVL1796:
+.LVL1798:
 	.loc 5 729 0
 	ldr	r3, [sp, #28]
 	.loc 5 727 0
@@ -19290,134 +19317,134 @@ rk_ftl_garbage_collect:
 	.loc 5 727 0
 	strh	r4, [r6, #2]	@ movhi
 	.loc 5 729 0
-	bls	.L1581
-	ldr	r3, .L1636+12
+	bls	.L1582
+	ldr	r3, .L1637+12
 	ldrh	r2, [r3]
-	ldr	r3, .L1636+32
+	ldr	r3, .L1637+32
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L1582
-.L1581:
+	bne	.L1583
+.L1582:
 	.loc 5 731 0
-	ldr	r3, .L1636+36
+	ldr	r3, .L1637+36
 	ldr	r3, [r3]
-	cbz	r3, .L1583
+	cbz	r3, .L1584
 	.loc 5 732 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1797:
+.LVL1799:
 	cmp	r0, #0
-	bne	.L1631
-.L1583:
+	bne	.L1632
+.L1584:
 	.loc 5 737 0
-	ldr	r3, .L1636+12
+	ldr	r3, .L1637+12
 	ldrh	r1, [r3]
-	cbnz	r1, .L1584
-	ldr	r3, .L1636+40
+	cbnz	r1, .L1585
+	ldr	r3, .L1637+40
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L1584
+	cbz	r0, .L1585
 	.loc 5 739 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 5 740 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
-.LVL1798:
+.LVL1800:
 	.loc 5 741 0
 	bl	FtlCacheWriteBack
-.LVL1799:
+.LVL1801:
 	.loc 5 742 0
 	bl	l2p_flush
-.LVL1800:
+.LVL1802:
 	.loc 5 743 0
 	bl	FtlVpcTblFlush
-.LVL1801:
-.L1584:
+.LVL1803:
+.L1585:
 	.loc 5 745 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L1582:
+.L1583:
 	.loc 5 747 0
-	ldr	r3, .L1636+44
+	ldr	r3, .L1637+44
 	ldrh	r3, [r3]
 	cmp	r3, #2
-	bhi	.L1585
+	bhi	.L1586
 	.loc 5 749 0
-	ldr	r3, .L1636+48
+	ldr	r3, .L1637+48
 	ldrh	r4, [r3]
-.LVL1802:
-	b	.L1557
-.LVL1803:
-.L1585:
+.LVL1804:
+	b	.L1558
+.LVL1805:
+.L1586:
 	.loc 5 752 0
-	ldr	r2, .L1636+28
+	ldr	r2, .L1637+28
 	movs	r1, #0
 	str	r1, [r2]
 	.loc 5 754 0
-	ldr	r2, .L1636+52
+	ldr	r2, .L1637+52
 	ldrh	r0, [r2]
 	cmp	r0, #0
-	bne	.L1514
+	bne	.L1515
 	.loc 5 757 0
 	adds	r0, r3, #1
-.LVL1804:
-	b	.L1514
-.LVL1805:
-.L1589:
-.LBE291:
-.LBE293:
+.LVL1806:
+	b	.L1515
+.LVL1807:
+.L1590:
+.LBE295:
+.LBE297:
 	.loc 5 479 0
 	movs	r0, #0
-	b	.L1514
-.LVL1806:
-.L1520:
-.LBB294:
-.LBB292:
+	b	.L1515
+.LVL1808:
+.L1521:
+.LBB298:
+.LBB296:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1587
-.LVL1807:
-.L1530:
+	beq	.L1588
+.LVL1809:
+.L1531:
 	.loc 5 557 0
-	ldr	r3, .L1636+20
+	ldr	r3, .L1637+20
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1598
-.LVL1808:
-.L1588:
-	ldr	r3, .L1636+56
+	bne	.L1599
+.LVL1810:
+.L1589:
+	ldr	r3, .L1637+56
 	movw	r2, #65535
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bne	.L1598
+	bne	.L1599
 	cmp	r5, r3
-	bne	.L1598
+	bne	.L1599
 	ldrh	r3, [r6]
 	cmp	r3, r5
-	beq	.L1542
-.LVL1809:
-.L1547:
+	beq	.L1543
+.LVL1811:
+.L1548:
 	.loc 5 556 0
 	movw	r5, #65535
-.L1598:
+.L1599:
 	movs	r4, #1
-	b	.L1541
-.LVL1810:
-.L1522:
+	b	.L1542
+.LVL1812:
+.L1523:
 	.loc 5 527 0
 	cmp	r7, #0
-	beq	.L1587
+	beq	.L1588
 	movw	r5, #65535
-	b	.L1588
-.LVL1811:
-.L1521:
+	b	.L1589
+.LVL1813:
+.L1522:
 	cmp	r7, #0
-	bne	.L1547
-	b	.L1587
-.L1637:
+	bne	.L1548
+	b	.L1588
+.L1638:
 	.align	2
-.L1636:
+.L1637:
 	.word	.LANCHOR95
 	.word	.LANCHOR177
 	.word	.LC1
@@ -19433,8 +19460,8 @@ rk_ftl_garbage_collect:
 	.word	.LANCHOR19
 	.word	.LANCHOR174
 	.word	.LANCHOR101
-.LBE292:
-.LBE294:
+.LBE296:
+.LBE298:
 	.cfi_endproc
 .LFE322:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -19457,7 +19484,7 @@ sftl_gc:
 	movs	r1, #1
 	mov	r0, r1
 	b	rk_ftl_garbage_collect
-.LVL1812:
+.LVL1814:
 	.cfi_endproc
 .LFE323:
 	.size	sftl_gc, .-sftl_gc
@@ -19475,7 +19502,7 @@ FtlRead:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1813:
+.LVL1815:
 	.loc 3 824 0
 	cmp	r0, #16
 	.loc 3 814 0
@@ -19496,19 +19523,19 @@ FtlRead:
 	mov	r8, r3
 	str	r2, [sp, #32]
 	.loc 3 824 0
-	bne	.L1640
+	bne	.L1641
 	.loc 3 825 0
 	mov	r2, r3
-.LVL1814:
+.LVL1816:
 	ldr	r1, [sp, #32]
-.LVL1815:
+.LVL1817:
 	add	r0, r6, #256
-.LVL1816:
+.LVL1818:
 	bl	FtlVendorPartRead
-.LVL1817:
+.LVL1819:
 	str	r0, [sp, #4]
-.LVL1818:
-.L1639:
+.LVL1820:
+.L1640:
 	.loc 3 901 0
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
@@ -19516,31 +19543,31 @@ FtlRead:
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1819:
-.L1640:
+.LVL1821:
+.L1641:
 	.cfi_restore_state
 	.loc 3 830 0
 	ldr	r3, [sp, #32]
-.LVL1820:
+.LVL1822:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L1671
+	ldr	r3, .L1672
 	ldr	r2, [sp, #12]
-.LVL1821:
+.LVL1823:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L1660
+	bhi	.L1661
 	.loc 3 830 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1671+4
+	ldr	r3, .L1672+4
 	ldr	r3, [r3]
 	adds	r0, r3, #1
-.LVL1822:
-	beq	.L1661
+.LVL1824:
+	beq	.L1662
 	.loc 3 833 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1823:
+.LVL1825:
 	.loc 3 835 0
-	ldr	r3, .L1671+8
+	ldr	r3, .L1672+8
 	mov	r0, r6
 	.loc 3 828 0
 	movs	r7, #0
@@ -19550,40 +19577,40 @@ FtlRead:
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-.LVL1824:
+.LVL1826:
 	.loc 3 836 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
 	.loc 3 835 0
 	str	r0, [sp, #16]
-.LVL1825:
+.LVL1827:
 	.loc 3 836 0
 	subs	r0, r3, #1
-.LVL1826:
+.LVL1828:
 	bl	__aeabi_uidiv
-.LVL1827:
+.LVL1829:
 	.loc 3 837 0
 	ldr	r3, [sp, #16]
 	.loc 3 841 0
-	ldr	r2, .L1671+12
+	ldr	r2, .L1672+12
 	.loc 3 835 0
 	ldr	r4, [sp, #16]
 	.loc 3 837 0
 	rsb	r3, r3, #1
 	.loc 3 836 0
 	str	r0, [sp, #20]
-.LVL1828:
+.LVL1830:
 	.loc 3 837 0
 	add	r3, r3, r0
 	.loc 3 828 0
 	str	r7, [sp, #28]
 	.loc 3 837 0
 	str	r3, [sp, #8]
-.LVL1829:
+.LVL1831:
 	.loc 3 841 0
 	ldr	r1, [sp, #8]
 	ldr	r3, [r2]
-.LVL1830:
+.LVL1832:
 	.loc 3 820 0
 	str	r7, [sp, #24]
 	.loc 3 815 0
@@ -19591,71 +19618,71 @@ FtlRead:
 	.loc 3 841 0
 	add	r3, r3, r1
 	str	r3, [r2]
-.LVL1831:
-.L1642:
+.LVL1833:
+.L1643:
 	.loc 3 842 0
 	ldr	r3, [sp, #8]
-	cbnz	r3, .L1658
+	cbnz	r3, .L1659
 	.loc 3 898 0
-	ldr	r3, .L1671+16
+	ldr	r3, .L1672+16
 	ldrh	r3, [r3]
-	cbnz	r3, .L1659
+	cbnz	r3, .L1660
 	.loc 3 898 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1671+20
+	ldr	r3, .L1672+20
 	ldrh	r3, [r3]
 	cmp	r3, #31
-	bhi	.L1639
-.L1659:
+	bhi	.L1640
+.L1660:
 	.loc 3 899 0 is_stmt 1
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1832:
-	b	.L1639
-.LVL1833:
-.L1658:
+.LVL1834:
+	b	.L1640
+.LVL1835:
+.L1659:
 	.loc 3 843 0
 	add	r1, sp, #52
 	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
-.LVL1834:
+.LVL1836:
 	.loc 3 844 0
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	bne	.L1643
+	bne	.L1644
 	.loc 3 845 0 discriminator 1
-	ldr	fp, .L1671+8
+	ldr	fp, .L1672+8
 	mov	r10, #0
-.L1644:
-.LVL1835:
+.L1645:
+.LVL1837:
 	ldrh	r0, [fp]
 	cmp	r10, r0
-	bcc	.L1646
-.LVL1836:
-.L1647:
+	bcc	.L1647
+.LVL1838:
+.L1648:
 	.loc 3 874 0
 	ldr	r3, [sp, #8]
 	.loc 3 872 0
 	adds	r4, r4, #1
-.LVL1837:
+.LVL1839:
 	.loc 3 874 0
 	subs	r3, r3, #1
-.LVL1838:
+.LVL1840:
 	str	r3, [sp, #8]
-	beq	.L1651
+	beq	.L1652
 	.loc 3 874 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1671+24
-.LVL1839:
+	ldr	r3, .L1672+24
+.LVL1841:
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L1642
-.L1651:
+	bne	.L1643
+.L1652:
 	.loc 3 875 0 is_stmt 1
 	cmp	r5, #0
-	beq	.L1642
+	beq	.L1643
 	.loc 3 876 0
-	ldr	r3, .L1671+28
+	ldr	r3, .L1672+28
 	movs	r2, #0
 	mov	r1, r5
 	.loc 3 877 0
@@ -19663,7 +19690,7 @@ FtlRead:
 	.loc 3 876 0
 	ldr	r0, [r3]
 	bl	FlashReadPages
-.LVL1840:
+.LVL1842:
 	.loc 3 883 0
 	lsls	r3, r7, #9
 	str	r3, [sp, #44]
@@ -19674,89 +19701,89 @@ FtlRead:
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.LVL1841:
-.L1657:
+.LVL1843:
+.L1658:
 	movs	r3, #20
 	mul	fp, r3, r10
 	.loc 3 878 0
-	ldr	r3, .L1671+28
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [sp, #16]
 	add	r2, r2, fp
 	ldr	r1, [r2, #16]
 	cmp	r3, r1
-	bne	.L1653
+	bne	.L1654
 	.loc 3 879 0
 	ldr	r1, [r2, #8]
-	ldr	r2, .L1671+32
+	ldr	r2, .L1672+32
 	ldr	r2, [r2]
 	cmp	r1, r2
-	bne	.L1654
+	bne	.L1655
 	.loc 3 880 0
 	ldr	r3, [sp, #36]
 	mov	r0, r8
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L1670:
+.L1671:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1842:
-.L1654:
+.LVL1844:
+.L1655:
 	.loc 3 885 0
-	ldr	r3, .L1671+28
+	ldr	r3, .L1672+28
 	ldr	r2, [r3]
 	ldr	r3, [r2, fp]
 	add	r1, r2, fp
 	adds	r2, r3, #1
-	bne	.L1655
+	bne	.L1656
 	.loc 3 886 0
-	ldr	r1, .L1671+36
+	ldr	r1, .L1672+36
 	.loc 3 887 0
 	str	r3, [sp, #4]
 	.loc 3 886 0
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.LVL1843:
-.L1656:
+.LVL1845:
+.L1657:
 	.loc 3 877 0 discriminator 2
 	add	r10, r10, #1
-.LVL1844:
+.LVL1846:
 	cmp	r5, r10
-	bne	.L1657
+	bne	.L1658
 	.loc 3 894 0
 	movs	r5, #0
-.LVL1845:
-	b	.L1642
-.LVL1846:
-.L1646:
+.LVL1847:
+	b	.L1643
+.LVL1848:
+.L1647:
 	.loc 3 846 0
 	mla	r0, r0, r4, r10
-.LVL1847:
+.LVL1849:
 	.loc 3 847 0
 	cmp	r6, r0
-	bhi	.L1645
+	bhi	.L1646
 	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L1645
+	bls	.L1646
 	.loc 3 848 0 is_stmt 1
 	subs	r0, r0, r6
-.LVL1848:
+.LVL1850:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r8, r0, lsl #9
 	bl	ftl_memset
-.LVL1849:
-.L1645:
+.LVL1851:
+.L1646:
 	.loc 3 845 0 discriminator 2
 	add	r10, r10, #1
-.LVL1850:
-	b	.L1644
-.LVL1851:
-.L1643:
+.LVL1852:
+	b	.L1645
+.LVL1853:
+.L1644:
 	.loc 3 851 0
-	ldr	r2, .L1671+28
+	ldr	r2, .L1672+28
 	mov	r10, #20
 	ldr	r2, [r2]
 	mla	r10, r10, r5, r2
@@ -19764,10 +19791,10 @@ FtlRead:
 	.loc 3 852 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L1671+8
-	bne	.L1648
+	ldr	r3, .L1672+8
+	bne	.L1649
 	.loc 3 853 0
-	ldr	r2, .L1671+32
+	ldr	r2, .L1672+32
 	.loc 3 854 0
 	mov	r0, r6
 	ldrh	fp, [r3]
@@ -19779,29 +19806,29 @@ FtlRead:
 	str	r2, [r10, #8]
 	.loc 3 854 0
 	bl	__aeabi_uidivmod
-.LVL1852:
+.LVL1854:
 	ldr	r2, [sp, #32]
 	.loc 3 855 0
 	sub	r3, fp, r1
 	.loc 3 854 0
 	str	r1, [sp, #24]
-.LVL1853:
+.LVL1855:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-.LVL1854:
+.LVL1856:
 	.loc 3 857 0
 	cmp	fp, r3
 	str	r3, [sp, #28]
-.LVL1855:
-	bne	.L1649
+.LVL1857:
+	bne	.L1650
 	.loc 3 858 0
 	str	r8, [r10, #8]
-.LVL1856:
-.L1649:
+.LVL1858:
+.L1650:
 	.loc 3 867 0
-	ldr	r3, .L1671+40
-	ldr	r2, .L1671+44
+	ldr	r3, .L1672+40
+	ldr	r2, .L1672+44
 	.loc 3 868 0
 	str	r4, [r10, #16]
 	.loc 3 867 0
@@ -19810,19 +19837,19 @@ FtlRead:
 	muls	r3, r5, r3
 	.loc 3 869 0
 	adds	r5, r5, #1
-.LVL1857:
+.LVL1859:
 	.loc 3 867 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
 	str	r3, [r10, #12]
-	b	.L1647
-.L1648:
+	b	.L1648
+.L1649:
 	.loc 3 859 0
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L1650
+	bne	.L1651
 	.loc 3 860 0
-	ldr	r2, .L1671+48
+	ldr	r2, .L1672+48
 	.loc 3 861 0
 	ldr	r1, [sp, #12]
 	.loc 3 860 0
@@ -19832,67 +19859,67 @@ FtlRead:
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r7, r1, r3
-.LVL1858:
+.LVL1860:
 	.loc 3 862 0
 	cmp	r2, r7
-	bne	.L1649
-.L1669:
+	bne	.L1650
+.L1670:
 	.loc 3 865 0
 	subs	r3, r3, r6
 	add	r3, r8, r3, lsl #9
 	str	r3, [r10, #8]
-	b	.L1649
-.L1650:
+	b	.L1650
+.L1651:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L1669
-.LVL1859:
-.L1653:
+	b	.L1670
+.LVL1861:
+.L1654:
 	.loc 3 881 0
 	ldr	r3, [sp, #20]
 	cmp	r3, r1
-	bne	.L1654
+	bne	.L1655
 	.loc 3 882 0
-	ldr	r3, .L1671+48
+	ldr	r3, .L1672+48
 	ldr	r1, [r2, #8]
 	ldr	r2, [r3]
 	cmp	r1, r2
-	bne	.L1654
+	bne	.L1655
 	.loc 3 883 0
-	ldr	r2, .L1671+8
+	ldr	r2, .L1672+8
 	ldr	r3, [sp, #20]
 	ldrh	r0, [r2]
 	ldr	r2, [sp, #44]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r8, r0, lsl #9
-	b	.L1670
-.L1655:
+	b	.L1671
+.L1656:
 	.loc 3 889 0
 	cmp	r3, #256
-	bne	.L1656
-.LBB295:
+	bne	.L1657
+.LBB299:
 	.loc 3 890 0
 	ldr	r0, [r1, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-.LVL1860:
+.LVL1862:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1861:
-	b	.L1656
-.LVL1862:
-.L1660:
-.LBE295:
-	.loc 3 831 0
-	mov	r3, #-1
 .LVL1863:
+	b	.L1657
+.LVL1864:
 .L1661:
+.LBE299:
+	.loc 3 831 0
+	mov	r3, #-1
+.LVL1865:
+.L1662:
 	str	r3, [sp, #4]
-	b	.L1639
-.L1672:
+	b	.L1640
+.L1673:
 	.align	2
-.L1671:
+.L1672:
 	.word	.LANCHOR34
 	.word	.LANCHOR88
 	.word	.LANCHOR12
@@ -19924,17 +19951,17 @@ sftl_read:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1864:
+.LVL1866:
 	.loc 3 1205 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1865:
+.LVL1867:
 	mov	r1, r0
-.LVL1866:
+.LVL1868:
 	movs	r0, #0
-.LVL1867:
+.LVL1869:
 	b	FtlRead
-.LVL1868:
+.LVL1870:
 	.cfi_endproc
 .LFE222:
 	.size	sftl_read, .-sftl_read
@@ -19952,7 +19979,7 @@ FtlWrite:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL1869:
+.LVL1871:
 	.loc 3 970 0
 	cmp	r0, #16
 	.loc 3 962 0
@@ -19973,177 +20000,177 @@ FtlWrite:
 	str	r2, [sp, #16]
 	str	r3, [sp, #4]
 	.loc 3 970 0
-	bne	.L1675
+	bne	.L1676
 	.loc 3 971 0
 	mov	r2, r3
-.LVL1870:
+.LVL1872:
 	ldr	r1, [sp, #16]
-.LVL1871:
+.LVL1873:
 	add	r0, r8, #256
-.LVL1872:
+.LVL1874:
 	bl	FtlVendorPartWrite
-.LVL1873:
-.L1674:
+.LVL1875:
+.L1675:
 	.loc 3 1153 0
 	add	sp, sp, #64
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.LVL1874:
-.L1675:
+.LVL1876:
+.L1676:
 	.cfi_restore_state
 	.loc 3 974 0
 	ldr	r3, [sp, #16]
-.LVL1875:
+.LVL1877:
 	adds	r5, r1, r3
-	ldr	r3, .L1740
+	ldr	r3, .L1741
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L1717
+	bhi	.L1718
 	.loc 3 974 0 is_stmt 0 discriminator 1
-	ldr	r3, .L1740+4
+	ldr	r3, .L1741+4
 	ldr	r0, [r3]
-.LVL1876:
+.LVL1878:
 	adds	r4, r0, #1
-	beq	.L1674
+	beq	.L1675
 	.loc 3 977 0 is_stmt 1
-	ldr	r3, .L1740+8
+	ldr	r3, .L1741+8
 	mov	r2, #2048
-.LVL1877:
+.LVL1879:
 	.loc 3 978 0
 	mov	r0, r8
 	.loc 3 977 0
 	str	r2, [r3]
 	.loc 3 978 0
-	ldr	r3, .L1740+12
+	ldr	r3, .L1741+12
 	ldrh	r4, [r3]
 	mov	r1, r4
-.LVL1878:
+.LVL1880:
 	bl	__aeabi_uidiv
-.LVL1879:
+.LVL1881:
 	.loc 3 979 0
 	mov	r1, r4
 	.loc 3 978 0
 	str	r0, [sp]
-.LVL1880:
+.LVL1882:
 	.loc 3 979 0
 	subs	r0, r5, #1
-.LVL1881:
+.LVL1883:
 	bl	__aeabi_uidiv
-.LVL1882:
+.LVL1884:
 	.loc 3 980 0
 	ldr	r2, [sp]
 	.loc 3 979 0
 	str	r0, [sp, #20]
-.LVL1883:
+.LVL1885:
 	.loc 3 980 0
 	subs	r5, r0, r2
 	.loc 3 982 0
-	ldr	r2, .L1740+16
+	ldr	r2, .L1741+16
 	.loc 3 980 0
 	adds	r3, r5, #1
 	.loc 3 982 0
 	adds	r1, r5, #1
 	.loc 3 980 0
 	str	r3, [sp, #8]
-.LVL1884:
+.LVL1886:
 	.loc 3 982 0
 	ldr	r3, [r2]
 	add	r3, r3, r1
 	str	r3, [r2]
 	.loc 3 983 0
-	ldr	r3, .L1740+20
+	ldr	r3, .L1741+20
 	ldr	r7, [r3]
-	cbz	r7, .L1677
+	cbz	r7, .L1678
 	.loc 3 984 0
 	ldr	r3, [r7, #16]
 	ldr	r2, [sp]
 	cmp	r2, r3
-	beq	.L1678
+	beq	.L1679
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1885:
-.L1677:
+.LVL1887:
+.L1678:
 	.loc 3 1008 0
-	ldr	r3, .L1740+24
-	ldr	r4, .L1740+28
+	ldr	r3, .L1741+24
+	ldr	r4, .L1741+28
 	ldr	r3, [r3]
-	cbz	r3, .L1680
+	cbz	r3, .L1681
 	.loc 3 1008 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #4]
 	.loc 3 1009 0 is_stmt 1 discriminator 1
-	ldr	r3, .L1740+32
+	ldr	r3, .L1741+32
 	cmp	r2, #0
 	it	eq
 	moveq	r4, r3
-.L1680:
+.L1681:
 	.loc 3 1068 0
 	ldr	r6, [sp]
-.LVL1886:
-.L1681:
+.LVL1888:
+.L1682:
 	.loc 3 1011 0
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L1715
+	beq	.L1716
 	.loc 3 1012 0
-	ldr	r3, .L1740+36
+	ldr	r3, .L1741+36
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1682
+	bcc	.L1683
 	.loc 3 1012 0 is_stmt 0 discriminator 1
 	mov	r2, #1012
-	ldr	r1, .L1740+40
-	ldr	r0, .L1740+44
+	ldr	r1, .L1741+40
+	ldr	r0, .L1741+44
 	bl	printf
-.LVL1887:
-.L1682:
+.LVL1889:
+.L1683:
 	.loc 3 1013 0 is_stmt 1
 	ldrh	r7, [r4, #4]
-	cbnz	r7, .L1683
+	cbnz	r7, .L1684
 	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL1888:
+.LVL1890:
 	.loc 3 1016 0
-	ldr	r3, .L1740+28
-	ldr	r5, .L1740+24
+	ldr	r3, .L1741+28
+	ldr	r5, .L1741+24
 	cmp	r4, r3
-	bne	.L1684
+	bne	.L1685
 	.loc 3 1017 0
-	ldr	r0, .L1740+32
+	ldr	r0, .L1741+32
 	ldrh	r4, [r0, #4]
-.LVL1889:
-	cbnz	r4, .L1685
+.LVL1891:
+	cbnz	r4, .L1686
 	.loc 3 1018 0
 	bl	allocate_new_data_superblock
-.LVL1890:
+.LVL1892:
 	.loc 3 1019 0
 	str	r4, [r5]
-.L1685:
+.L1686:
 	.loc 3 1021 0
-	ldr	r0, .L1740+28
+	ldr	r0, .L1741+28
 	bl	allocate_new_data_superblock
-.LVL1891:
+.LVL1893:
 	.loc 3 1023 0
-	ldr	r4, .L1740+28
+	ldr	r4, .L1741+28
 	.loc 3 1022 0
 	ldr	r2, [r5]
 	.loc 3 1023 0
-	ldr	r3, .L1740+32
+	ldr	r3, .L1741+32
 	cmp	r2, #0
 	it	ne
 	movne	r4, r3
-.L1686:
-.LVL1892:
+.L1687:
+.LVL1894:
 	.loc 3 1033 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1683
+	cbnz	r3, .L1684
 	.loc 3 1034 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1893:
-.L1683:
+.LVL1895:
+.L1684:
 	.loc 3 1041 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	.loc 3 1043 0
@@ -20158,91 +20185,91 @@ FtlWrite:
 	it	cs
 	movcs	r2, r3
 	.loc 3 1045 0
-	ldr	r3, .L1740+36
+	ldr	r3, .L1741+36
 	str	r2, [sp, #36]
-.LVL1894:
+.LVL1896:
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-.LVL1895:
+.LVL1897:
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L1687
+	bcc	.L1688
 	.loc 3 1045 0 is_stmt 0 discriminator 1
 	movw	r2, #1045
-	ldr	r1, .L1740+40
-	ldr	r0, .L1740+44
+	ldr	r1, .L1741+40
+	ldr	r0, .L1741+44
 	bl	printf
-.LVL1896:
-.L1687:
+.LVL1898:
+.L1688:
 	.loc 3 1054 0 is_stmt 1 discriminator 1
-	ldr	r10, .L1740+80
+	ldr	r10, .L1741+80
 	.loc 3 1068 0 discriminator 1
 	mov	fp, #0
-.L1688:
-.LVL1897:
+.L1689:
+.LVL1899:
 	.loc 3 1046 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	fp, r3
-	bne	.L1709
-.L1689:
-.LVL1898:
+	bne	.L1710
+.L1690:
+.LVL1900:
 	.loc 3 1127 0
-	ldr	r3, .L1740+20
+	ldr	r3, .L1741+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L1710
-.LVL1899:
+	beq	.L1711
+.LVL1901:
 	.loc 3 1129 0
 	ldr	r3, [sp, #8]
 	.loc 3 1130 0
 	subs	fp, fp, #1
-.LVL1900:
+.LVL1902:
 	.loc 3 1129 0
 	add	r3, r3, #-1
 	str	r3, [sp, #8]
-.LVL1901:
+.LVL1903:
 	.loc 3 1130 0
-	bne	.L1710
-.LVL1902:
-.L1715:
+	bne	.L1711
+.LVL1904:
+.L1716:
 	.loc 3 1137 0
 	ldr	r2, [sp]
 	movs	r0, #0
 	ldr	r3, [sp, #20]
-.LVL1903:
+.LVL1905:
 	.loc 3 1139 0
-	ldr	r4, .L1740+48
-.LVL1904:
+	ldr	r4, .L1741+48
+.LVL1906:
 	.loc 3 1137 0
 	subs	r1, r3, r2
 	bl	rk_ftl_garbage_collect
-.LVL1905:
+.LVL1907:
 	.loc 3 1139 0
 	ldrh	r2, [r4]
 	cmp	r2, #15
-	bhi	.L1712
+	bhi	.L1713
 	.loc 3 1141 0
-	ldr	r5, .L1740+52
-	ldr	r6, .L1740+56
-.LVL1906:
-.L1736:
+	ldr	r5, .L1741+52
+	ldr	r6, .L1741+56
+.LVL1908:
+.L1737:
 	ldrh	r3, [r5]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1716
+	bne	.L1717
 	.loc 3 1141 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	cmp	r2, r3
-	bne	.L1716
+	bne	.L1717
 	.loc 3 1142 0 is_stmt 1
 	movs	r0, #0
 	bl	List_get_gc_head_node
-.LVL1907:
+.LVL1909:
 	uxth	r0, r0
 	bl	FtlGcRefreshBlock
-.LVL1908:
-.L1716:
+.LVL1910:
+.L1717:
 	.loc 3 1143 0
-	ldr	r2, .L1740+60
+	ldr	r2, .L1741+60
 	movs	r3, #128
 	.loc 3 1145 0
 	movs	r1, #1
@@ -20250,38 +20277,38 @@ FtlWrite:
 	.loc 3 1143 0
 	strh	r3, [r2]	@ movhi
 	.loc 3 1144 0
-	ldr	r2, .L1740+64
+	ldr	r2, .L1741+64
 	strh	r3, [r2]	@ movhi
 	.loc 3 1145 0
 	bl	rk_ftl_garbage_collect
-.LVL1909:
+.LVL1911:
 	.loc 3 1146 0
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL1910:
+.LVL1912:
 	.loc 3 1147 0
 	ldrh	r3, [r4]
 	cmp	r3, #8
-	bls	.L1736
-	b	.L1712
-.LVL1911:
-.L1678:
+	bls	.L1737
+	b	.L1713
+.LVL1913:
+.L1679:
 	.loc 3 987 0
-	ldr	r2, .L1740+68
-.LVL1912:
+	ldr	r2, .L1741+68
+.LVL1914:
 	.loc 3 988 0
 	mov	r1, r4
-.LVL1913:
+.LVL1915:
 	mov	r0, r8
-.LVL1914:
+.LVL1916:
 	.loc 3 987 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
 	.loc 3 988 0
 	bl	__aeabi_uidivmod
-.LVL1915:
+.LVL1917:
 	ldr	r2, [sp, #16]
 	.loc 3 989 0
 	subs	r4, r4, r1
@@ -20289,91 +20316,91 @@ FtlWrite:
 	ldr	r0, [r7, #8]
 	.loc 3 988 0
 	mov	r3, r1
-.LVL1916:
+.LVL1918:
 	.loc 3 992 0
 	ldr	r1, [sp, #4]
-.LVL1917:
+.LVL1919:
 	cmp	r4, r2
 	it	cs
 	movcs	r4, r2
-.LVL1918:
+.LVL1920:
 	lsls	r6, r4, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r6
 	bl	ftl_memcpy
-.LVL1919:
+.LVL1921:
 	.loc 3 994 0
-	cbnz	r5, .L1679
-.LVL1920:
-.L1712:
+	cbnz	r5, .L1680
+.LVL1922:
+.L1713:
 	.loc 3 995 0
 	movs	r0, #0
-	b	.L1674
-.LVL1921:
-.L1679:
+	b	.L1675
+.LVL1923:
+.L1680:
 	.loc 3 996 0
 	ldr	r3, [sp, #16]
 	.loc 3 997 0
 	add	r8, r8, r4
-.LVL1922:
+.LVL1924:
 	.loc 3 996 0
 	subs	r3, r3, r4
 	str	r3, [sp, #16]
-.LVL1923:
+.LVL1925:
 	.loc 3 998 0
 	ldr	r3, [sp, #4]
-.LVL1924:
+.LVL1926:
 	add	r3, r3, r6
 	str	r3, [sp, #4]
-.LVL1925:
+.LVL1927:
 	.loc 3 999 0
 	ldr	r3, [sp]
-.LVL1926:
+.LVL1928:
 	adds	r3, r3, #1
 	str	r3, [sp]
-.LVL1927:
+.LVL1929:
 	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL1928:
+.LVL1930:
 	str	r5, [sp, #8]
-	b	.L1677
-.LVL1929:
-.L1684:
+	b	.L1678
+.LVL1931:
+.L1685:
 	.loc 3 1028 0
 	ldrh	r2, [r3, #4]
 	.loc 3 1027 0
 	str	r7, [r5]
 	.loc 3 1028 0
-	cbnz	r2, .L1722
+	cbnz	r2, .L1723
 	.loc 3 1029 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.LVL1930:
-	b	.L1686
-.L1722:
-	mov	r4, r3
-.LVL1931:
-	b	.L1683
 .LVL1932:
-.L1709:
+	b	.L1687
+.L1723:
+	mov	r4, r3
+.LVL1933:
+	b	.L1684
+.LVL1934:
+.L1710:
 	.loc 3 1047 0
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1689
+	beq	.L1690
 	.loc 3 1051 0
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r6
 	movs	r7, #20
 	bl	log2phys
-.LVL1933:
+.LVL1935:
 	.loc 3 1052 0
 	mov	r0, r4
 	mul	r7, r7, fp
 	bl	get_new_active_ppa
-.LVL1934:
+.LVL1936:
 	.loc 3 1055 0
-	ldr	r3, .L1740+72
+	ldr	r3, .L1741+72
 	.loc 3 1054 0
 	ldr	r1, [r10]
 	.loc 3 1055 0
@@ -20383,12 +20410,12 @@ FtlWrite:
 	str	r0, [r1, #4]
 	.loc 3 1056 0
 	str	r6, [r1, #16]
-.LVL1935:
+.LVL1937:
 	.loc 3 1055 0
 	mul	r0, r2, fp
-.LVL1936:
+.LVL1938:
 	bic	r3, r0, #3
-	ldr	r0, .L1740+76
+	ldr	r0, .L1741+76
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
@@ -20398,23 +20425,23 @@ FtlWrite:
 	.loc 3 1059 0
 	mov	r0, r3
 	movs	r1, #0
-.LVL1937:
+.LVL1939:
 	.loc 3 1055 0
 	str	r3, [sp, #12]
-.LVL1938:
+.LVL1940:
 	.loc 3 1059 0
 	bl	ftl_memset
-.LVL1939:
+.LVL1941:
 	.loc 3 1061 0
 	ldr	r3, [sp]
-	ldr	r2, .L1740+12
+	ldr	r2, .L1741+12
 	cmp	r6, r3
-	beq	.L1690
+	beq	.L1691
 	.loc 3 1061 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1735
-.LVL1940:
+	bne	.L1736
+.LVL1942:
 	.loc 3 1069 0 is_stmt 1
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #16]
@@ -20426,11 +20453,11 @@ FtlWrite:
 	.loc 3 1069 0
 	subs	r5, r5, r2
 	uxth	r5, r5
-.LVL1941:
-	b	.L1693
-.L1741:
+.LVL1943:
+	b	.L1694
+.L1742:
 	.align	2
-.L1740:
+.L1741:
 	.word	.LANCHOR34
 	.word	.LANCHOR88
 	.word	.LANCHOR178
@@ -20452,27 +20479,27 @@ FtlWrite:
 	.word	.LANCHOR24
 	.word	.LANCHOR115
 	.word	.LANCHOR122
-.LVL1942:
-.L1690:
+.LVL1944:
+.L1691:
 	.loc 3 1063 0
 	ldrh	r5, [r2]
 	mov	r0, r8
 	mov	r1, r5
 	bl	__aeabi_uidivmod
-.LVL1943:
+.LVL1945:
 	ldr	r3, [sp, #16]
 	.loc 3 1064 0
 	subs	r5, r5, r1
 	.loc 3 1063 0
 	str	r1, [sp, #24]
-.LVL1944:
+.LVL1946:
 	cmp	r5, r3
 	it	cs
 	movcs	r5, r3
-.LVL1945:
-.L1693:
+.LVL1947:
+.L1694:
 	.loc 3 1072 0
-	ldr	r2, .L1742
+	ldr	r2, .L1743
 	.loc 3 1073 0
 	ldr	r3, [sp]
 	.loc 3 1072 0
@@ -20481,7 +20508,7 @@ FtlWrite:
 	.loc 3 1074 0
 	ldr	r2, [r10]
 	.loc 3 1072 0
-	bne	.L1694
+	bne	.L1695
 	.loc 3 1073 0
 	cmp	r6, r3
 	.loc 3 1074 0
@@ -20489,7 +20516,7 @@ FtlWrite:
 	.loc 3 1076 0
 	ittet	ne
 	mulne	r5, r5, r6
-.LVL1946:
+.LVL1948:
 	ldrne	r3, [sp, #4]
 	.loc 3 1074 0
 	ldreq	r3, [sp, #4]
@@ -20501,32 +20528,32 @@ FtlWrite:
 	.loc 3 1076 0
 	addne	r5, r3, r5, lsl #9
 	strne	r5, [r7, #8]
-.LVL1947:
-.L1696:
+.LVL1949:
+.L1697:
 	.loc 3 1119 0
-	ldr	r3, .L1742+4
+	ldr	r3, .L1743+4
 	ldrb	r1, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r3]
 	cmp	r1, r2
-	bcc	.L1706
+	bcc	.L1707
 	.loc 3 1119 0 is_stmt 0 discriminator 1
 	movw	r2, #1119
-	ldr	r1, .L1742+8
-	ldr	r0, .L1742+12
+	ldr	r1, .L1743+8
+	ldr	r0, .L1743+12
 	bl	printf
-.LVL1948:
-.L1706:
+.LVL1950:
+.L1707:
 	.loc 3 1120 0 is_stmt 1
 	ldr	r3, [sp, #32]
 	movw	r2, #61589
 	ldr	r1, [sp, #28]
 	.loc 3 1046 0
 	add	fp, fp, #1
-.LVL1949:
+.LVL1951:
 	.loc 3 1120 0
 	strh	r2, [r3, r1]	@ movhi
 	.loc 3 1121 0
-	ldr	r1, .L1742+16
+	ldr	r1, .L1743+16
 	ldr	r3, [sp, #12]
 	ldr	r2, [r1]
 	str	r2, [r3, #4]
@@ -20544,30 +20571,30 @@ FtlWrite:
 	str	r6, [r3, #8]
 	.loc 3 1125 0
 	adds	r6, r6, #1
-.LVL1950:
+.LVL1952:
 	.loc 3 1123 0
 	str	r2, [r3, #12]
 	.loc 3 1124 0
 	ldrh	r2, [r4]
 	strh	r2, [r3, #2]	@ movhi
-	b	.L1688
-.LVL1951:
-.L1694:
+	b	.L1689
+.LVL1953:
+.L1695:
 	.loc 3 1079 0
 	cmp	r6, r3
 	.loc 3 1080 0
 	add	r2, r2, r7
 	ite	eq
-	ldreq	r1, .L1742+20
+	ldreq	r1, .L1743+20
 	.loc 3 1082 0
-	ldrne	r1, .L1742+24
+	ldrne	r1, .L1743+24
 	ldr	r1, [r1]
 	str	r1, [r2, #8]
 	.loc 3 1084 0
 	ldr	r2, [sp, #40]
 	adds	r1, r2, #1
-	beq	.L1699
-.LBB296:
+	beq	.L1700
+.LBB300:
 	.loc 3 1086 0
 	str	r2, [sp, #48]
 	.loc 3 1090 0
@@ -20590,23 +20617,23 @@ FtlWrite:
 	.loc 3 1090 0
 	movs	r2, #0
 	bl	FlashReadPages
-.LVL1952:
+.LVL1954:
 	.loc 3 1091 0
 	ldr	r2, [sp, #44]
 	adds	r2, r2, #1
-	bne	.L1700
+	bne	.L1701
 	.loc 3 1092 0
-	ldr	r1, .L1742+28
+	ldr	r1, .L1743+28
 	ldr	r2, [r1, #72]
 	adds	r2, r2, #1
 	str	r2, [r1, #72]
-.L1703:
-.LBE296:
+.L1704:
+.LBE300:
 	.loc 3 1104 0
 	ldr	r3, [sp]
 	lsls	r2, r5, #9
 	cmp	r6, r3
-	bne	.L1704
+	bne	.L1705
 	.loc 3 1105 0
 	ldr	r1, [r10]
 	ldr	r3, [sp, #24]
@@ -20614,73 +20641,73 @@ FtlWrite:
 	ldr	r0, [r1, #8]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-.L1738:
+.L1739:
 	.loc 3 1107 0
 	bl	ftl_memcpy
-.LVL1953:
+.LVL1955:
 	.loc 3 1109 0
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1696
+	bne	.L1697
 	.loc 3 1110 0
 	ldrh	r2, [r4, #4]
 	cmp	r2, #0
-	beq	.L1696
+	beq	.L1697
 	.loc 3 1111 0
 	ldr	r2, [r10]
 	add	r7, r7, r2
-	ldr	r2, .L1742+32
+	ldr	r2, .L1743+32
 	str	r7, [r2]
 	.loc 3 1112 0
-	ldr	r2, .L1742+36
+	ldr	r2, .L1743+36
 	str	r4, [r2]
-	b	.L1696
-.L1700:
-.LBB297:
+	b	.L1697
+.L1701:
+.LBB301:
 	.loc 3 1094 0
 	ldr	r3, [sp, #12]
 	ldr	r1, [r3, #8]
 	cmp	r6, r1
-	beq	.L1702
+	beq	.L1703
 	.loc 3 1095 0
-	ldr	r0, .L1742+28
+	ldr	r0, .L1743+28
 	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
 	str	r2, [r0, #72]
 	.loc 3 1096 0
 	mov	r2, r6
-	ldr	r0, .L1742+40
+	ldr	r0, .L1743+40
 	bl	printf
-.LVL1954:
-.L1702:
+.LVL1956:
+.L1703:
 	.loc 3 1098 0
 	ldr	r3, [sp, #12]
 	ldr	r2, [r3, #8]
 	cmp	r6, r2
-	beq	.L1703
+	beq	.L1704
 	.loc 3 1098 0 is_stmt 0 discriminator 1
 	movw	r2, #1098
-	ldr	r1, .L1742+8
-	ldr	r0, .L1742+12
+	ldr	r1, .L1743+8
+	ldr	r0, .L1743+12
 	bl	printf
-.LVL1955:
-	b	.L1703
-.LVL1956:
-.L1699:
-.LBE297:
+.LVL1957:
+	b	.L1704
+.LVL1958:
+.L1700:
+.LBE301:
 	.loc 3 1101 0 is_stmt 1
 	ldr	r2, [r10]
 	movs	r1, #0
 	adds	r0, r2, r7
-	ldr	r2, .L1742+44
+	ldr	r2, .L1743+44
 	ldr	r0, [r0, #8]
 	ldrh	r2, [r2]
 	bl	ftl_memset
-.LVL1957:
-	b	.L1703
-.L1704:
+.LVL1959:
+	b	.L1704
+.L1705:
 	.loc 3 1107 0
-	ldr	r1, .L1742
+	ldr	r1, .L1743
 	ldr	r0, [r10]
 	ldr	r3, [sp, #4]
 	ldrh	r1, [r1]
@@ -20689,9 +20716,9 @@ FtlWrite:
 	muls	r1, r6, r1
 	sub	r1, r1, r8
 	add	r1, r3, r1, lsl #9
-	b	.L1738
-.LVL1958:
-.L1735:
+	b	.L1739
+.LVL1960:
+.L1736:
 	.loc 3 1117 0
 	ldrh	r2, [r2]
 	ldr	r3, [sp, #4]
@@ -20701,43 +20728,43 @@ FtlWrite:
 	sub	r2, r2, r8
 	add	r2, r3, r2, lsl #9
 	str	r2, [r7, #8]
-	b	.L1696
-.LVL1959:
-.L1710:
+	b	.L1697
+.LVL1961:
+.L1711:
 	.loc 3 1133 0
-	ldr	r0, .L1742+48
+	ldr	r0, .L1743+48
 	mov	r3, r4
 	movs	r2, #0
 	mov	r1, fp
 	ldr	r0, [r0]
 	bl	FtlProgPages
-.LVL1960:
+.LVL1962:
 	.loc 3 1134 0
 	ldr	r3, [sp, #8]
 	cmp	r3, fp
-	bcs	.L1713
+	bcs	.L1714
 	.loc 3 1134 0 is_stmt 0 discriminator 1
 	movw	r2, #1134
-	ldr	r1, .L1742+8
-	ldr	r0, .L1742+12
+	ldr	r1, .L1743+8
+	ldr	r0, .L1743+12
 	bl	printf
-.LVL1961:
-.L1713:
+.LVL1963:
+.L1714:
 	.loc 3 1135 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	sub	r3, r3, fp
 	str	r3, [sp, #8]
-.LVL1962:
-	b	.L1681
-.LVL1963:
-.L1717:
+.LVL1964:
+	b	.L1682
+.LVL1965:
+.L1718:
 	.loc 3 975 0
 	mov	r0, #-1
-.LVL1964:
-	b	.L1674
-.L1743:
+.LVL1966:
+	b	.L1675
+.L1744:
 	.align	2
-.L1742:
+.L1743:
 	.word	.LANCHOR12
 	.word	.LANCHOR3
 	.word	.LANCHOR180
@@ -20769,17 +20796,17 @@ sftl_write:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL1965:
+.LVL1967:
 	.loc 3 1210 0
 	mov	r3, r2
 	mov	r2, r1
-.LVL1966:
+.LVL1968:
 	mov	r1, r0
-.LVL1967:
+.LVL1969:
 	movs	r0, #0
-.LVL1968:
+.LVL1970:
 	b	FtlWrite
-.LVL1969:
+.LVL1971:
 	.cfi_endproc
 .LFE223:
 	.size	sftl_write, .-sftl_write
@@ -20810,21 +20837,21 @@ FtlLoadSysInfo:
 	.loc 2 1368 0
 	movs	r1, #0
 	.loc 2 1365 0
-	ldr	r8, .L1766+136
+	ldr	r8, .L1767+136
 	.loc 2 1368 0
-	ldr	r5, .L1766
+	ldr	r5, .L1767
 	.loc 2 1365 0
 	ldr	r3, [r8]
-	ldr	r4, .L1766+4
+	ldr	r4, .L1767+4
 	.loc 2 1366 0
-	ldr	r10, .L1766+140
+	ldr	r10, .L1767+140
 	.loc 2 1368 0
 	ldrh	r2, [r5]
-	ldr	r7, .L1766+8
+	ldr	r7, .L1767+8
 	.loc 2 1365 0
 	str	r3, [r4, #8]
 	.loc 2 1369 0
-	ldr	r6, .L1766+12
+	ldr	r6, .L1767+12
 	.loc 2 1366 0
 	ldr	r3, [r10]
 	.loc 2 1368 0
@@ -20834,24 +20861,24 @@ FtlLoadSysInfo:
 	str	r3, [r4, #12]
 	.loc 2 1368 0
 	bl	ftl_memset
-.LVL1970:
+.LVL1972:
 	.loc 2 1369 0
 	ldrh	r0, [r6]
 	movw	r3, #65535
 	str	r7, [sp]
 	cmp	r0, r3
-	bne	.L1746
-.L1754:
+	bne	.L1747
+.L1755:
 	.loc 2 1370 0
 	mov	r0, #-1
-.L1745:
+.L1746:
 	.loc 2 1463 0
 	add	sp, sp, #8
 	.cfi_remember_state
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1746:
+.L1747:
 	.cfi_restore_state
 	.loc 2 1372 0
 	movs	r1, #1
@@ -20859,48 +20886,48 @@ FtlLoadSysInfo:
 	mov	fp, r4
 	.loc 2 1372 0
 	bl	FtlGetLastWrittenPage
-.LVL1971:
+.LVL1973:
 	.loc 2 1381 0
-	ldr	r3, .L1766+16
+	ldr	r3, .L1767+16
 	.loc 2 1372 0
 	sxth	r7, r0
-.LVL1972:
+.LVL1974:
 	.loc 2 1373 0
 	adds	r0, r0, #1
 	strh	r0, [r6, #2]	@ movhi
-.L1748:
+.L1749:
 	.loc 2 1375 0
 	cmp	r7, #0
-	bge	.L1751
+	bge	.L1752
 	.loc 2 1388 0
 	movw	r2, #1388
-	ldr	r1, .L1766+20
-	ldr	r0, .L1766+24
+	ldr	r1, .L1767+20
+	ldr	r0, .L1767+24
 	bl	printf
-.LVL1973:
-.L1750:
+.LVL1975:
+.L1751:
 	.loc 2 1390 0
-	ldr	r2, .L1766+28
+	ldr	r2, .L1767+28
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L1753
+	bcs	.L1754
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	movw	r2, #1390
-	ldr	r1, .L1766+20
-	ldr	r0, .L1766+24
+	ldr	r1, .L1767+20
+	ldr	r0, .L1767+24
 	bl	printf
-.LVL1974:
-.L1753:
+.LVL1976:
+.L1754:
 	.loc 2 1392 0 is_stmt 1
-	ldr	r7, .L1766+32
-.LVL1975:
+	ldr	r7, .L1767+32
+.LVL1977:
 	movs	r2, #48
 	ldr	r1, [r4, #8]
 	mov	r0, r7
 	bl	ftl_memcpy
-.LVL1976:
+.LVL1978:
 	.loc 2 1393 0
 	ldrh	r2, [r5]
 	ldr	r1, [r4, #8]
@@ -20909,7 +20936,7 @@ FtlLoadSysInfo:
 	adds	r1, r1, #48
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1977:
+.LVL1979:
 	.loc 2 1394 0
 	ldrh	r1, [r5]
 	ldr	r3, [r4, #8]
@@ -20920,17 +20947,17 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L1766+36
+	ldr	r3, .L1767+36
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.LVL1978:
+.LVL1980:
 	.loc 2 1396 0
 	ldr	r2, [r7]
-	ldr	r3, .L1766+16
+	ldr	r3, .L1767+16
 	cmp	r2, r3
-	bne	.L1754
+	bne	.L1755
 	.loc 2 1400 0
-	ldr	r3, .L1766+40
+	ldr	r3, .L1767+40
 	ldrb	r2, [r7, #10]	@ zero_extendqisi2
 	.loc 2 1399 0
 	ldrh	r5, [r7, #8]
@@ -20940,56 +20967,56 @@ FtlLoadSysInfo:
 	strh	r5, [r6, #6]	@ movhi
 	.loc 2 1400 0
 	cmp	r2, r3
-	bne	.L1754
+	bne	.L1755
 	.loc 2 1403 0
-	ldr	r3, .L1766+44
+	ldr	r3, .L1767+44
 	.loc 2 1404 0
-	ldr	r2, .L1766+48
+	ldr	r2, .L1767+48
 	.loc 2 1403 0
 	str	r5, [r3]
 	.loc 2 1404 0
-	ldr	r3, .L1766+52
+	ldr	r3, .L1767+52
 	ldrh	r3, [r3]
 	muls	r3, r5, r3
 	str	r3, [r2]
 	.loc 2 1405 0
-	ldr	r2, .L1766+56
+	ldr	r2, .L1767+56
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L1766+60
+	ldr	r2, .L1767+60
 	str	r3, [r2]
 	.loc 2 1406 0
-	ldr	r3, .L1766+64
+	ldr	r3, .L1767+64
 	ldr	r6, [r3]
-	ldr	r3, .L1766+68
+	ldr	r3, .L1767+68
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1766+72
+	ldr	r3, .L1767+72
 	subs	r0, r6, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r5
 	bl	__aeabi_uidiv
-.LVL1979:
-	ldr	r3, .L1766+76
+.LVL1981:
+	ldr	r3, .L1767+76
 	.loc 2 1412 0
 	cmp	r5, r6
 	.loc 2 1406 0
 	strh	r0, [r3]	@ movhi
 	.loc 2 1412 0
-	bls	.L1755
+	bls	.L1756
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	movw	r2, #1412
-	ldr	r1, .L1766+20
-	ldr	r0, .L1766+24
+	ldr	r1, .L1767+20
+	ldr	r0, .L1767+24
 	bl	printf
-.LVL1980:
-.L1755:
+.LVL1982:
+.L1756:
 	.loc 2 1415 0 is_stmt 1
 	ldrh	r2, [r4, #16]
 	.loc 2 1414 0
-	ldr	r3, .L1766+80
+	ldr	r3, .L1767+80
 	ldrh	ip, [r4, #14]
 	.loc 2 1419 0
-	ldr	r7, .L1766+84
+	ldr	r7, .L1767+84
 	.loc 2 1415 0
 	lsrs	r1, r2, #6
 	.loc 2 1416 0
@@ -21000,7 +21027,7 @@ FtlLoadSysInfo:
 	.loc 2 1415 0
 	strh	r1, [r3, #2]	@ movhi
 	.loc 2 1424 0
-	ldr	r1, .L1766+88
+	ldr	r1, .L1767+88
 	.loc 2 1417 0
 	strb	r2, [r3, #8]
 	.loc 2 1424 0
@@ -21036,7 +21063,7 @@ FtlLoadSysInfo:
 	.loc 2 1427 0
 	strb	r2, [r1, #8]
 	.loc 2 1429 0
-	ldr	r2, .L1766+92
+	ldr	r2, .L1767+92
 	strh	r5, [r2]	@ movhi
 	.loc 2 1430 0
 	ldrh	r5, [r4, #24]
@@ -21053,35 +21080,35 @@ FtlLoadSysInfo:
 	.loc 2 1432 0
 	strb	r5, [r2, #8]
 	.loc 2 1434 0
-	ldr	r5, .L1766+96
+	ldr	r5, .L1767+96
 	str	r3, [r5]
 	.loc 2 1435 0
-	ldr	r5, .L1766+100
+	ldr	r5, .L1767+100
 	str	r3, [r5]
 	.loc 2 1436 0
-	ldr	r5, .L1766+104
+	ldr	r5, .L1767+104
 	str	r3, [r5]
 	.loc 2 1437 0
-	ldr	r5, .L1766+108
+	ldr	r5, .L1767+108
 	str	r3, [r5]
 	.loc 2 1439 0
-	ldr	r5, .L1766+112
+	ldr	r5, .L1767+112
 	str	r6, [r5]
 	mov	r6, r1
 	.loc 2 1440 0
-	ldr	r5, .L1766+116
+	ldr	r5, .L1767+116
 	str	r3, [r5]
 	.loc 2 1441 0
-	ldr	r5, .L1766+120
+	ldr	r5, .L1767+120
 	str	r3, [r5]
 	.loc 2 1442 0
-	ldr	r5, .L1766+124
+	ldr	r5, .L1767+124
 	.loc 2 1444 0
 	ldr	lr, [r4, #40]
 	.loc 2 1442 0
 	str	r3, [r5]
 	.loc 2 1444 0
-	ldr	r3, .L1766+128
+	ldr	r3, .L1767+128
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
@@ -21089,7 +21116,7 @@ FtlLoadSysInfo:
 	it	hi
 	strhi	lr, [r3]
 	.loc 2 1447 0
-	ldr	r3, .L1766+132
+	ldr	r3, .L1767+132
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
@@ -21099,47 +21126,47 @@ FtlLoadSysInfo:
 	.loc 2 1450 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L1758
+	beq	.L1759
 	.loc 2 1451 0
-	ldr	r0, .L1766+80
+	ldr	r0, .L1767+80
 	bl	make_superblock
-.LVL1981:
-.L1758:
+.LVL1983:
+.L1759:
 	.loc 2 1453 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1759
+	beq	.L1760
 	.loc 2 1454 0
-	ldr	r0, .L1766+88
+	ldr	r0, .L1767+88
 	bl	make_superblock
-.LVL1982:
-.L1759:
+.LVL1984:
+.L1760:
 	.loc 2 1456 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1760
+	beq	.L1761
 	.loc 2 1457 0
-	ldr	r0, .L1766+92
+	ldr	r0, .L1767+92
 	bl	make_superblock
-.LVL1983:
-.L1760:
+.LVL1985:
+.L1761:
 	.loc 2 1459 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1761
+	beq	.L1762
 	.loc 2 1460 0
-	ldr	r0, .L1766+84
+	ldr	r0, .L1767+84
 	bl	make_superblock
-.LVL1984:
-.L1761:
+.LVL1986:
+.L1762:
 	.loc 2 1462 0
 	movs	r0, #0
-	b	.L1745
-.LVL1985:
-.L1751:
+	b	.L1746
+.LVL1987:
+.L1752:
 	.loc 2 1376 0
 	ldrh	r2, [r6]
 	.loc 2 1378 0
@@ -21155,34 +21182,34 @@ FtlLoadSysInfo:
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
-.LVL1986:
+.LVL1988:
 	.loc 2 1381 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1749
+	beq	.L1750
 	.loc 2 1382 0 discriminator 1
 	ldr	r2, [r8]
 	.loc 2 1381 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L1749
+	bne	.L1750
 	.loc 2 1383 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
 	.loc 2 1382 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1750
-.L1749:
+	beq	.L1751
+.L1750:
 	subs	r7, r7, #1
-.LVL1987:
+.LVL1989:
 	sxth	r7, r7
-.LVL1988:
-	b	.L1748
-.L1767:
+.LVL1990:
+	b	.L1749
+.L1768:
 	.align	2
-.L1766:
+.L1767:
 	.word	.LANCHOR5
 	.word	.LANCHOR108
 	.word	.LANCHOR43
@@ -21246,117 +21273,117 @@ FtlSysBlkInit:
 	.cfi_offset 14, -4
 	.loc 2 2310 0
 	movs	r3, #0
-	ldr	r6, .L1784
+	ldr	r6, .L1785
 	strh	r3, [r6]	@ movhi
 	.loc 2 2312 0
-	ldr	r3, .L1784+4
+	ldr	r3, .L1785+4
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL1989:
+.LVL1991:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL1990:
+.LVL1992:
 	.loc 2 2314 0
-	ldr	r3, .L1784+8
+	ldr	r3, .L1785+8
 	ldrh	r2, [r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1769
-.L1771:
+	bne	.L1770
+.L1772:
 	.loc 2 2315 0
 	mov	r7, #-1
-.L1768:
+.L1769:
 	.loc 2 2398 0
 	mov	r0, r7
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1769:
+.L1770:
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL1991:
+.LVL1993:
 	mov	r7, r0
 	cmp	r0, #0
-	bne	.L1771
+	bne	.L1772
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL1992:
+.LVL1994:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL1993:
+.LVL1995:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL1994:
+.LVL1996:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL1995:
+.LVL1997:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL1996:
+.LVL1998:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL1997:
+.LVL1999:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL1998:
+.LVL2000:
 	.loc 2 2330 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-.LVL1999:
-.LBB301:
-.LBB302:
+.LVL2001:
+.LBB305:
+.LBB306:
 	.loc 2 2332 0
-	ldr	r3, .L1784+12
+	ldr	r3, .L1785+12
 	.loc 2 2333 0
 	movs	r0, #12
 	.loc 2 2332 0
 	ldrh	r1, [r3]
 	.loc 2 2333 0
-	ldr	r3, .L1784+16
+	ldr	r3, .L1785+16
 	ldr	r2, [r3]
 	.loc 2 2332 0
 	mov	r3, r7
-.L1772:
-.LVL2000:
+.L1773:
+.LVL2002:
 	cmp	r3, r1
-	bge	.L1777
+	bge	.L1778
 	.loc 2 2333 0
 	mla	r4, r0, r3, r2
 	ldr	r4, [r4, #4]
 	cmp	r4, #0
-	bge	.L1773
-.L1777:
+	bge	.L1774
+.L1778:
 	.loc 2 2336 0
-	ldr	r4, .L1784+20
+	ldr	r4, .L1785+20
 	.loc 2 2338 0
 	cmp	r3, r1
-	ldr	r5, .L1784+24
+	ldr	r5, .L1785+24
 	.loc 2 2336 0
 	ldrh	r2, [r4, #28]
 	add	r2, r2, #1
 	strh	r2, [r4, #28]	@ movhi
 	.loc 2 2338 0
-	bge	.L1783
-.LVL2001:
-.L1774:
+	bge	.L1784
+.LVL2003:
+.L1775:
 	.loc 2 2340 0
-	ldr	r6, .L1784+28
+	ldr	r6, .L1785+28
 	.loc 2 2339 0
-	ldr	r0, .L1784+24
+	ldr	r0, .L1785+24
 	bl	FtlSuperblockPowerLostFix
-.LVL2002:
+.LVL2004:
 	.loc 2 2340 0
 	mov	r0, r6
 	bl	FtlSuperblockPowerLostFix
-.LVL2003:
-.LBB303:
+.LVL2005:
+.LBB307:
 	.loc 2 2346 0
-	ldr	r3, .L1784+32
+	ldr	r3, .L1785+32
 	ldrh	r1, [r5]
 	ldrh	r0, [r5, #4]
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	.loc 2 2347 0
-	ldr	r0, .L1784+36
+	ldr	r0, .L1785+36
 	.loc 2 2346 0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
 	.loc 2 2352 0
@@ -21372,97 +21399,97 @@ FtlSysBlkInit:
 	strb	r3, [r5, #6]
 	.loc 2 2349 0
 	strh	r3, [r5, #4]	@ movhi
-.LVL2004:
+.LVL2006:
 	.loc 2 2352 0
 	ldrh	r1, [r2, ip, lsl #1]
 	sub	r1, r1, lr
 	strh	r1, [r2, ip, lsl #1]	@ movhi
 	.loc 2 2353 0
 	ldrh	r2, [r0]
-.LBE303:
+.LBE307:
 	.loc 2 2359 0
-	ldr	r0, .L1784+40
-.LBB304:
+	ldr	r0, .L1785+40
+.LBB308:
 	.loc 2 2354 0
 	strb	r3, [r6, #6]
 	.loc 2 2353 0
 	strh	r2, [r6, #2]	@ movhi
 	.loc 2 2355 0
 	strh	r3, [r6, #4]	@ movhi
-.LBE304:
+.LBE308:
 	.loc 2 2359 0
 	bl	FtlMapBlkWriteDump_data
-.LVL2005:
+.LVL2007:
 	.loc 2 2360 0
-	ldr	r0, .L1784+44
+	ldr	r0, .L1785+44
 	bl	FtlMapBlkWriteDump_data
-.LVL2006:
+.LVL2008:
 	.loc 2 2372 0
 	ldrh	r3, [r4, #30]
 	adds	r3, r3, #1
 	strh	r3, [r4, #30]	@ movhi
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2007:
+.LVL2009:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2008:
+.LVL2010:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2009:
-	b	.L1778
-.LVL2010:
-.L1773:
+.LVL2011:
+	b	.L1779
+.LVL2012:
+.L1774:
 	.loc 2 2332 0
 	adds	r3, r3, #1
-.LVL2011:
-	b	.L1772
-.L1783:
+.LVL2013:
+	b	.L1773
+.L1784:
 	.loc 2 2338 0
 	ldrh	r3, [r6]
-.LVL2012:
+.LVL2014:
 	cmp	r3, #0
-	bne	.L1774
-.L1778:
+	bne	.L1775
+.L1779:
 	.loc 2 2379 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1779
+	beq	.L1780
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1779
+	cbnz	r3, .L1780
 	.loc 2 2381 0
-	ldr	r5, .L1784+28
+	ldr	r5, .L1785+28
 	.loc 2 2380 0
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1779
+	cbnz	r3, .L1780
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2013:
+.LVL2015:
 	.loc 2 2383 0
 	ldrh	r0, [r5]
 	bl	FtlGcRefreshBlock
-.LVL2014:
+.LVL2016:
 	.loc 2 2384 0
-	ldr	r0, .L1784+24
+	ldr	r0, .L1785+24
 	bl	allocate_new_data_superblock
-.LVL2015:
+.LVL2017:
 	.loc 2 2385 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.LVL2016:
-.L1779:
+.LVL2018:
+.L1780:
 	.loc 2 2390 0
 	ldrh	r3, [r4, #28]
 	lsls	r3, r3, #27
-	bne	.L1768
+	bne	.L1769
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2017:
-	b	.L1768
-.L1785:
+.LVL2019:
+	b	.L1769
+.L1786:
 	.align	2
-.L1784:
+.L1785:
 	.word	.LANCHOR162
 	.word	.LANCHOR4
 	.word	.LANCHOR81
@@ -21475,8 +21502,8 @@ FtlSysBlkInit:
 	.word	.LANCHOR19
 	.word	.LANCHOR144
 	.word	.LANCHOR149
-.LBE302:
-.LBE301:
+.LBE306:
+.LBE305:
 	.cfi_endproc
 .LFE295:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -21507,11 +21534,11 @@ ftl_low_format:
 	.loc 3 629 0
 	movs	r3, #0
 	.loc 3 631 0
-	ldr	r6, .L1810
+	ldr	r6, .L1811
 	.loc 3 630 0
-	ldr	r2, .L1810+4
+	ldr	r2, .L1811+4
 	.loc 3 629 0
-	ldr	r5, .L1810+8
+	ldr	r5, .L1811+8
 	.loc 3 631 0
 	ldrh	r0, [r6]
 	.loc 3 630 0
@@ -21520,96 +21547,96 @@ ftl_low_format:
 	str	r3, [r5]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2018:
+.LVL2020:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2019:
-	cbz	r0, .L1787
+.LVL2021:
+	cbz	r0, .L1788
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2020:
-.L1787:
+.LVL2022:
+.L1788:
 	.loc 3 635 0 discriminator 1
-	ldr	r3, .L1810+12
+	ldr	r3, .L1811+12
 	.loc 3 636 0 discriminator 1
-	ldr	r2, .L1810+16
+	ldr	r2, .L1811+16
 	.loc 3 637 0 discriminator 1
-	ldr	ip, .L1810+100
+	ldr	ip, .L1811+100
 	.loc 3 635 0 discriminator 1
 	ldrh	r1, [r3]
 	.loc 3 636 0 discriminator 1
 	ldr	r4, [r2]
 	.loc 3 637 0 discriminator 1
-	ldr	r2, .L1810+20
+	ldr	r2, .L1811+20
 	str	r3, [sp, #4]
 	.loc 3 635 0 discriminator 1
 	lsls	r1, r1, #7
 	.loc 3 637 0 discriminator 1
 	ldr	r7, [r2]
 	movs	r2, #0
-.L1788:
-.LVL2021:
+.L1789:
+.LVL2023:
 	.loc 3 635 0 discriminator 1
 	uxth	r3, r2
 	adds	r2, r2, #1
-.LVL2022:
+.LVL2024:
 	cmp	r3, r1
-	blt	.L1789
-.LVL2023:
+	blt	.L1790
+.LVL2025:
 	.loc 3 642 0
-	ldr	r3, .L1810+24
-.LVL2024:
+	ldr	r3, .L1811+24
+.LVL2026:
 	.loc 3 641 0
 	movs	r7, #0
 	.loc 3 642 0
-	ldr	r10, .L1810+104
+	ldr	r10, .L1811+104
 	ldrh	r4, [r3]
-.LVL2025:
+.LVL2027:
 	mov	r8, r3
 	mov	fp, r10
-.LVL2026:
-.L1790:
+.LVL2028:
+.L1791:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r4
-	bhi	.L1791
+	bhi	.L1792
 	.loc 3 645 0 is_stmt 1
-	ldr	r4, .L1810+28
-.LVL2027:
+	ldr	r4, .L1811+28
+.LVL2029:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L1792
-.LVL2028:
-.L1796:
+	bgt	.L1793
+.LVL2030:
+.L1797:
 	.loc 3 641 0
 	movs	r6, #0
 	mov	r7, r6
-.L1793:
+.L1794:
 	.loc 3 656 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r6
-.LVL2029:
+.LVL2031:
 	adds	r6, r6, #1
 	cmp	r3, r0
-	bhi	.L1797
+	bhi	.L1798
 	.loc 3 658 0
 	ldrh	r2, [fp]
-	ldr	r3, .L1810+32
+	ldr	r3, .L1811+32
 	.loc 3 661 0
 	ldrh	r4, [r4]
-	ldr	r6, .L1810+36
+	ldr	r6, .L1811+36
 	.loc 3 658 0
 	str	r2, [r3]
 	.loc 3 661 0
-	ldr	r3, .L1810+40
+	ldr	r3, .L1811+40
 	mov	r1, r4
 	ldr	r2, [r3]
 	mov	r0, r2
-.LVL2030:
+.LVL2032:
 	str	r2, [sp, #12]
 	bl	__aeabi_uidiv
-.LVL2031:
+.LVL2033:
 	.loc 3 662 0
 	ubfx	r10, r0, #5, #16
 	.loc 3 661 0
@@ -21617,21 +21644,21 @@ ftl_low_format:
 	str	r0, [r6]
 	.loc 3 662 0
 	add	r1, r10, #36
-	ldr	r0, .L1810+44
+	ldr	r0, .L1811+44
 	strh	r1, [r0]	@ movhi
 	.loc 3 663 0
 	movs	r1, #24
 	muls	r1, r4, r1
 	str	r0, [sp]
 	cmp	r7, r1
-	ble	.L1798
+	ble	.L1799
 	.loc 3 664 0
 	ldr	r2, [sp, #12]
 	mov	r1, r4
 	str	r3, [sp, #8]
 	subs	r0, r2, r7
 	bl	__aeabi_uidiv
-.LVL2032:
+.LVL2034:
 	.loc 3 665 0
 	ldr	r3, [sp]
 	.loc 3 664 0
@@ -21641,13 +21668,13 @@ ftl_low_format:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 	ldr	r3, [sp, #8]
-.L1798:
+.L1799:
 	.loc 3 668 0
-	ldr	r2, .L1810+48
+	ldr	r2, .L1811+48
 	ldrh	r2, [r2]
-	cbz	r2, .L1800
+	cbz	r2, .L1801
 	.loc 3 669 0
-	ldr	r1, .L1810+44
+	ldr	r1, .L1811+44
 	ldrh	r0, [r1]
 	add	r0, r0, r2, lsr #1
 	strh	r0, [r1]	@ movhi
@@ -21662,20 +21689,20 @@ ftl_low_format:
 	.loc 3 672 0
 	addlt	r2, r2, r10
 	strhlt	r2, [r1]	@ movhi
-.L1800:
+.L1801:
 	.loc 3 677 0
 	ldr	r3, [sp]
-	ldr	r7, .L1810+52
-.LVL2033:
+	ldr	r7, .L1811+52
+.LVL2035:
 	.loc 3 687 0
-	ldr	r10, .L1810+108
+	ldr	r10, .L1811+108
 	.loc 3 677 0
 	ldrh	r2, [r3]
 	ldr	r3, [r6]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
 	.loc 3 678 0
-	ldr	r3, .L1810+56
+	ldr	r3, .L1811+56
 	ldrh	r3, [r3]
 	.loc 3 677 0
 	str	r4, [r7]
@@ -21687,25 +21714,25 @@ ftl_low_format:
 	.loc 3 678 0
 	str	r4, [r6]
 	.loc 3 694 0
-	ldr	r6, .L1810+60
+	ldr	r6, .L1811+60
 	.loc 3 679 0
 	muls	r4, r3, r4
-	ldr	r3, .L1810+64
+	ldr	r3, .L1811+64
 	str	r4, [r3]
 	.loc 3 689 0
 	movw	r4, #65535
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2034:
+.LVL2036:
 	.loc 3 687 0
 	ldrh	r2, [fp]
 	movs	r1, #0
 	ldr	r0, [r10]
 	lsls	r2, r2, #1
 	bl	ftl_memset
-.LVL2035:
+.LVL2037:
 	.loc 3 688 0
-	ldr	r2, .L1810+68
+	ldr	r2, .L1811+68
 	movs	r3, #0
 	.loc 3 694 0
 	strh	r3, [r6, #2]	@ movhi
@@ -21716,7 +21743,7 @@ ftl_low_format:
 	.loc 3 688 0
 	str	r3, [r2]
 	.loc 3 689 0
-	ldr	r2, .L1810+72
+	ldr	r2, .L1811+72
 	.loc 3 696 0
 	strh	r3, [r6]	@ movhi
 	.loc 3 690 0
@@ -21737,21 +21764,21 @@ ftl_low_format:
 	.loc 3 701 0
 	mov	r10, r6
 	.loc 3 698 0
-	ldr	r3, .L1810+76
+	ldr	r3, .L1811+76
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.LVL2036:
-.L1802:
+.LVL2038:
+.L1803:
 	.loc 3 701 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2037:
+.LVL2039:
 	.loc 3 702 0
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
 	cmp	r3, #0
-	bne	.L1803
+	bne	.L1804
 	.loc 3 705 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
@@ -21760,92 +21787,92 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r6]	@ movhi
 	.loc 3 707 0
-	b	.L1802
-.LVL2038:
-.L1789:
+	b	.L1803
+.LVL2040:
+.L1790:
 	.loc 3 636 0 discriminator 3
 	mvns	r0, r3
 	orr	r0, r3, r0, lsl #16
 	str	r0, [r4, r3, lsl #2]
 	.loc 3 637 0 discriminator 3
 	str	ip, [r7, r3, lsl #2]
-.LVL2039:
-	b	.L1788
-.LVL2040:
-.L1791:
+.LVL2041:
+	b	.L1789
+.LVL2042:
+.L1792:
 	.loc 3 643 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
-.LVL2041:
+.LVL2043:
 	.loc 3 642 0 discriminator 3
 	adds	r4, r4, #1
-.LVL2042:
+.LVL2044:
 	.loc 3 643 0 discriminator 3
 	add	r7, r7, r0
-.LVL2043:
+.LVL2045:
 	uxth	r7, r7
-.LVL2044:
+.LVL2046:
 	.loc 3 642 0 discriminator 3
 	uxth	r4, r4
-.LVL2045:
-	b	.L1790
-.LVL2046:
-.L1792:
+.LVL2047:
+	b	.L1791
+.LVL2048:
+.L1793:
 	.loc 3 647 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-.LVL2047:
-	ldr	r3, .L1810+80
+.LVL2049:
+	ldr	r3, .L1811+80
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-.LVL2048:
+.LVL2050:
 	.loc 3 648 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2049:
+.LVL2051:
 	.loc 3 650 0
 	ldrh	r6, [r8]
-.LVL2050:
-.L1794:
+.LVL2052:
+.L1795:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r6
-	bls	.L1796
+	bls	.L1797
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
 	.loc 3 650 0 discriminator 3
 	adds	r6, r6, #1
-.LVL2051:
+.LVL2053:
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2052:
+.LVL2054:
 	.loc 3 650 0 discriminator 3
 	uxth	r6, r6
-.LVL2053:
-	b	.L1794
-.LVL2054:
-.L1797:
+.LVL2055:
+	b	.L1795
+.LVL2056:
+.L1798:
 	.loc 3 657 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
-.LVL2055:
-	add	r7, r7, r0
-.LVL2056:
-	uxth	r7, r7
 .LVL2057:
-	b	.L1793
+	add	r7, r7, r0
 .LVL2058:
-.L1803:
+	uxth	r7, r7
+.LVL2059:
+	b	.L1794
+.LVL2060:
+.L1804:
 	.loc 3 709 0
 	ldr	r3, [r5]
 	.loc 3 710 0
 	ldrh	r1, [r6, #4]
 	.loc 3 712 0
-	ldr	r4, .L1810+84
+	ldr	r4, .L1811+84
 	.loc 3 709 0
 	str	r3, [r6, #12]
 	adds	r3, r3, #1
@@ -21871,15 +21898,15 @@ ftl_low_format:
 	.loc 3 715 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L1804:
+.L1805:
 	.loc 3 717 0
 	mov	r0, r10
 	bl	make_superblock
-.LVL2059:
+.LVL2061:
 	.loc 3 718 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L1805
+	cbnz	r3, .L1806
 	.loc 3 721 0
 	ldr	r3, [r8]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
@@ -21888,8 +21915,8 @@ ftl_low_format:
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	.loc 3 723 0
-	b	.L1804
-.L1805:
+	b	.L1805
+.L1806:
 	.loc 3 725 0
 	ldr	r3, [r5]
 	.loc 3 726 0
@@ -21904,12 +21931,12 @@ ftl_low_format:
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
 	.loc 3 727 0
-	ldr	r3, .L1810+88
+	ldr	r3, .L1811+88
 	strh	r4, [r3]	@ movhi
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2060:
-	ldr	r3, .L1810+92
+.LVL2062:
+	ldr	r3, .L1811+92
 	.loc 3 731 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
@@ -21928,25 +21955,25 @@ ftl_low_format:
 	str	r2, [r5]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2061:
+.LVL2063:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2062:
-	cbnz	r0, .L1806
+.LVL2064:
+	cbnz	r0, .L1807
 	.loc 3 737 0
-	ldr	r3, .L1810+96
+	ldr	r3, .L1811+96
 	movs	r2, #1
 	str	r2, [r3]
-.L1806:
+.L1807:
 	.loc 3 739 0
 	movs	r0, #0
 	add	sp, sp, #16
 	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1811:
+.L1812:
 	.align	2
-.L1810:
+.L1811:
 	.word	.LANCHOR4
 	.word	.LANCHOR72
 	.word	.LANCHOR71
@@ -21992,76 +22019,76 @@ sftl_init:
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.LVL2063:
+.LVL2065:
 	push	{r4, lr}
 	.cfi_def_cfa_offset 8
 	.cfi_offset 4, -8
 	.cfi_offset 14, -4
 	.loc 3 746 0
 	mov	r3, #-1
-	ldr	r4, .L1818
+	ldr	r4, .L1819
 	.loc 3 749 0
-	ldr	r1, .L1818+4
-	ldr	r0, .L1818+8
+	ldr	r1, .L1819+4
+	ldr	r0, .L1819+8
 	.loc 3 746 0
 	str	r3, [r4]
 	.loc 3 749 0
 	bl	printf
-.LVL2064:
+.LVL2066:
 	.loc 3 750 0
-	ldr	r0, .L1818+12
+	ldr	r0, .L1819+12
 	bl	FtlConstantsInit
-.LVL2065:
+.LVL2067:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2066:
+.LVL2068:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2067:
+.LVL2069:
 	.loc 3 753 0
-	ldr	r3, .L1818+16
+	ldr	r3, .L1819+16
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2068:
+.LVL2070:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2069:
-	cbnz	r0, .L1816
+.LVL2071:
+	cbnz	r0, .L1817
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2070:
-	cbnz	r0, .L1816
+.LVL2072:
+	cbnz	r0, .L1817
 	.loc 3 779 0
 	movs	r3, #1
 	str	r3, [r4]
 	.loc 3 783 0
-	ldr	r3, .L1818+20
+	ldr	r3, .L1819+20
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L1816
+	bhi	.L1817
 	movw	r4, #8129
-.L1815:
-.LVL2071:
-.LBB305:
+.L1816:
+.LVL2073:
+.LBB309:
 	.loc 3 786 0 discriminator 3
 	movs	r1, #1
 	movs	r0, #0
 	bl	rk_ftl_garbage_collect
-.LVL2072:
+.LVL2074:
 	.loc 3 785 0 discriminator 3
 	subs	r4, r4, #1
-.LVL2073:
-	bne	.L1815
-.LVL2074:
-.L1816:
-.LBE305:
+.LVL2075:
+	bne	.L1816
+.LVL2076:
+.L1817:
+.LBE309:
 	.loc 3 794 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L1819:
+.L1820:
 	.align	2
-.L1818:
+.L1819:
 	.word	.LANCHOR88
 	.word	.LC70
 	.word	.LC71
@@ -22080,18 +22107,18 @@ sftl_init:
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB350:
-	.loc 1 248 0
+.LFB351:
+	.loc 1 252 0
 	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-.LVL2075:
-	.loc 1 249 0
+.LVL2077:
+	.loc 1 253 0
 	b	memcmp
-.LVL2076:
+.LVL2078:
 	.cfi_endproc
-.LFE350:
+.LFE351:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -23504,17 +23531,17 @@ power_up_flag:
 	.size	__func__.10046, 23
 __func__.10046:
 	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.rodata.__func__.10307,"a",%progbits
+	.section	.rodata.__func__.10310,"a",%progbits
 	.set	.LANCHOR106,. + 0
-	.type	__func__.10307, %object
-	.size	__func__.10307, 15
-__func__.10307:
+	.type	__func__.10310, %object
+	.size	__func__.10310, 15
+__func__.10310:
 	.ascii	"FlashReadPages\000"
-	.section	.rodata.__func__.10324,"a",%progbits
+	.section	.rodata.__func__.10327,"a",%progbits
 	.set	.LANCHOR110,. + 0
-	.type	__func__.10324, %object
-	.size	__func__.10324, 15
-__func__.10324:
+	.type	__func__.10327, %object
+	.size	__func__.10327, 15
+__func__.10327:
 	.ascii	"FlashProgPages\000"
 	.section	.rodata.__func__.8799,"a",%progbits
 	.set	.LANCHOR138,. + 0
@@ -23746,43 +23773,42 @@ __func__.9940:
 	.ascii	"%s\012\000"
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/ide.h"
-	.file 13 "include/part.h"
-	.file 14 "include/flash.h"
-	.file 15 "include/lmb.h"
-	.file 16 "include/asm-generic/u-boot.h"
-	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 19 "include/libfdt_env.h"
-	.file 20 "include/image.h"
-	.file 21 "include/net.h"
-	.file 22 "include/dm/uclass-id.h"
-	.file 23 "drivers/rkflash/sftl_inc.h"
-	.file 24 "drivers/rkflash/flash_com.h"
-	.file 25 "drivers/rkflash/sftl_struct.h"
-	.file 26 "drivers/rkflash/sftl_global.h"
-	.file 27 "include/malloc.h"
-	.file 28 "include/linux/compat.h"
+	.file 7 "include/common.h"
+	.file 8 "./arch/arm/include/asm/types.h"
+	.file 9 "include/linux/types.h"
+	.file 10 "include/errno.h"
+	.file 11 "include/linux/string.h"
+	.file 12 "include/efi.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 20 "include/libfdt_env.h"
+	.file 21 "include/image.h"
+	.file 22 "include/net.h"
+	.file 23 "include/dm/uclass-id.h"
+	.file 24 "drivers/rkflash/rksftl/sftl_inc.h"
+	.file 25 "drivers/rkflash/rksftl/flash_com.h"
+	.file 26 "drivers/rkflash/rksftl/sftl_struct.h"
+	.file 27 "drivers/rkflash/rksftl/sftl_global.h"
+	.file 28 "include/malloc.h"
 	.file 29 "include/stdio.h"
 	.file 30 "include/vsprintf.h"
 	.file 31 "include/log.h"
 	.section	.debug_info,"",%progbits
 .Ldebug_info0:
-	.4byte	0x9240
+	.4byte	0x92b3
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x4
 	.uleb128 0x1
-	.4byte	.LASF880
-	.byte	0xc
-	.4byte	.LASF881
 	.4byte	.LASF882
+	.byte	0xc
+	.4byte	.LASF883
+	.4byte	.LASF884
 	.4byte	.Ldebug_ranges0+0x1c0
 	.4byte	0
 	.4byte	.Ldebug_line0
@@ -23792,7 +23818,7 @@ __func__.9940:
 	.4byte	.LASF0
 	.uleb128 0x3
 	.4byte	.LASF4
-	.byte	0x6
+	.byte	0x7
 	.byte	0xd
 	.4byte	0x37
 	.uleb128 0x2
@@ -23805,7 +23831,7 @@ __func__.9940:
 	.4byte	.LASF2
 	.uleb128 0x4
 	.4byte	.LASF20
-	.byte	0x9
+	.byte	0xa
 	.byte	0xc
 	.4byte	0x50
 	.uleb128 0x5
@@ -23818,7 +23844,7 @@ __func__.9940:
 	.4byte	.LASF3
 	.uleb128 0x3
 	.4byte	.LASF5
-	.byte	0x7
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x37
 	.uleb128 0x2
@@ -23827,7 +23853,7 @@ __func__.9940:
 	.4byte	.LASF6
 	.uleb128 0x3
 	.4byte	.LASF7
-	.byte	0x7
+	.byte	0x8
 	.byte	0x12
 	.4byte	0x7b
 	.uleb128 0x2
@@ -23844,34 +23870,34 @@ __func__.9940:
 	.4byte	.LASF10
 	.uleb128 0x6
 	.ascii	"u8\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x1f
 	.4byte	0x37
 	.uleb128 0x7
 	.4byte	0x90
 	.uleb128 0x6
 	.ascii	"u16\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x22
 	.4byte	0x25
 	.uleb128 0x6
 	.ascii	"s32\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x24
 	.4byte	0x50
 	.uleb128 0x6
 	.ascii	"u32\000"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x25
 	.4byte	0x7b
 	.uleb128 0x3
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x8
 	.byte	0x35
 	.4byte	0x3e
 	.uleb128 0x3
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x8
 	.byte	0x36
 	.4byte	0x3e
 	.uleb128 0x2
@@ -23896,29 +23922,29 @@ __func__.9940:
 	.4byte	0xe3
 	.uleb128 0x3
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x9
 	.byte	0x59
 	.4byte	0x25
 	.uleb128 0x3
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x9
 	.byte	0x5b
 	.4byte	0x3e
 	.uleb128 0x3
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x9
 	.byte	0x69
 	.4byte	0x5e
 	.uleb128 0x3
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x9
 	.byte	0x97
 	.4byte	0x70
 	.uleb128 0x9
 	.byte	0x4
 	.uleb128 0x4
 	.4byte	.LASF21
-	.byte	0xa
+	.byte	0xb
 	.byte	0xb
 	.4byte	0xf6
 	.uleb128 0x2
@@ -23932,17 +23958,17 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF23
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x140
 	.4byte	0x13c
 	.uleb128 0xc
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x13c
 	.uleb128 0xc
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x13c
 	.uleb128 0x8
@@ -23956,7 +23982,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF26
-	.byte	0xc
+	.byte	0xd
 	.byte	0x10
 	.4byte	0x172
 	.uleb128 0xa
@@ -23969,18 +23995,18 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF29
 	.byte	0x8
-	.byte	0xd
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x1bd
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0xd
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xf6
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF28
-	.byte	0xd
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x1d6
 	.byte	0x4
@@ -24007,41 +24033,41 @@ __func__.9940:
 	.4byte	0x1dc
 	.uleb128 0x4
 	.4byte	.LASF29
-	.byte	0xd
+	.byte	0xe
 	.byte	0xcd
 	.4byte	0x1e7
 	.uleb128 0x13
 	.2byte	0xa0c
-	.byte	0xe
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x23e
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xe
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x107
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF31
-	.byte	0xe
+	.byte	0xf
 	.byte	0x15
 	.4byte	0xfc
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF32
-	.byte	0xe
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x107
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0xe
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x23e
 	.byte	0xc
 	.uleb128 0x14
 	.4byte	.LASF34
-	.byte	0xe
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x24f
 	.2byte	0x80c
@@ -24062,7 +24088,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF35
-	.byte	0xe
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x1f7
 	.uleb128 0xa
@@ -24072,7 +24098,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF36
-	.byte	0xe
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x26b
 	.uleb128 0x2
@@ -24082,18 +24108,18 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF38
 	.byte	0x8
-	.byte	0xf
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x2ad
 	.uleb128 0x10
 	.4byte	.LASF39
-	.byte	0xf
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xc0
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xcb
 	.byte	0x4
@@ -24101,24 +24127,24 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF40
 	.byte	0x50
-	.byte	0xf
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x2de
 	.uleb128 0x16
 	.ascii	"cnt\000"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x3e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xcb
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF41
-	.byte	0xf
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x2de
 	.byte	0x8
@@ -24133,41 +24159,41 @@ __func__.9940:
 	.uleb128 0x17
 	.ascii	"lmb\000"
 	.byte	0xa0
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x313
 	.uleb128 0x10
 	.4byte	.LASF42
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x2ad
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x2ad
 	.byte	0x50
 	.byte	0
 	.uleb128 0x18
 	.ascii	"lmb\000"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x2ee
 	.uleb128 0x19
 	.byte	0x8
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x33f
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xc0
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xcb
 	.byte	0x4
@@ -24175,120 +24201,120 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF44
 	.byte	0x58
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x430
 	.uleb128 0x10
 	.4byte	.LASF45
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x3e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF46
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xcb
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF47
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x3e
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF48
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x3e
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF49
-	.byte	0x10
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x3e
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF50
-	.byte	0x10
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x3e
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x3e
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x3e
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x3e
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x3e
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x3e
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x3e
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x188
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF58
-	.byte	0x10
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x25
 	.byte	0x36
 	.uleb128 0x10
 	.4byte	.LASF59
-	.byte	0x10
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x3e
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF60
-	.byte	0x10
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x3e
 	.byte	0x3c
 	.uleb128 0x10
 	.4byte	.LASF61
-	.byte	0x10
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x107
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF62
-	.byte	0x10
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x107
 	.byte	0x44
 	.uleb128 0x10
 	.4byte	.LASF63
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x430
 	.byte	0x48
@@ -24302,114 +24328,114 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF64
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x33f
 	.uleb128 0x4
 	.4byte	.LASF65
-	.byte	0x11
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF66
-	.byte	0x11
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF67
-	.byte	0x11
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF68
-	.byte	0x11
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF69
-	.byte	0x11
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF70
-	.byte	0x11
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF71
-	.byte	0x11
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x107
 	.uleb128 0xf
 	.4byte	.LASF72
 	.byte	0x28
-	.byte	0x12
+	.byte	0x13
 	.byte	0x39
 	.4byte	0x51d
 	.uleb128 0x10
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3a
 	.4byte	0x52e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3b
 	.4byte	0x52e
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3c
 	.4byte	0x52e
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3d
 	.4byte	0x52e
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3e
 	.4byte	0x52e
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3f
 	.4byte	0x52e
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x13
 	.byte	0x40
 	.4byte	0x52e
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x13
 	.byte	0x43
 	.4byte	0x52e
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x13
 	.byte	0x46
 	.4byte	0x52e
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x13
 	.byte	0x49
 	.4byte	0x52e
 	.byte	0x24
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF83
-	.byte	0x13
+	.byte	0x14
 	.byte	0xf
 	.4byte	0x528
 	.uleb128 0x8
@@ -24417,84 +24443,84 @@ __func__.9940:
 	.4byte	0x498
 	.uleb128 0x3
 	.4byte	.LASF84
-	.byte	0x13
+	.byte	0x14
 	.byte	0x12
 	.4byte	0x11d
 	.uleb128 0x1a
 	.4byte	.LASF85
 	.byte	0x40
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x133
 	.4byte	0x5e3
 	.uleb128 0x1b
 	.4byte	.LASF86
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x134
 	.4byte	0x11d
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF87
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x135
 	.4byte	0x11d
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF88
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x136
 	.4byte	0x11d
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF89
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x137
 	.4byte	0x11d
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF90
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x138
 	.4byte	0x11d
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF91
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x139
 	.4byte	0x11d
 	.byte	0x14
 	.uleb128 0x1b
 	.4byte	.LASF92
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13a
 	.4byte	0x11d
 	.byte	0x18
 	.uleb128 0x1b
 	.4byte	.LASF93
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13b
 	.4byte	0x112
 	.byte	0x1c
 	.uleb128 0x1b
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13c
 	.4byte	0x112
 	.byte	0x1d
 	.uleb128 0x1b
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13d
 	.4byte	0x112
 	.byte	0x1e
 	.uleb128 0x1b
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13e
 	.4byte	0x112
 	.byte	0x1f
 	.uleb128 0x1b
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13f
 	.4byte	0x5e3
 	.byte	0x20
@@ -24508,258 +24534,258 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x140
 	.4byte	0x539
 	.uleb128 0x1a
 	.4byte	.LASF99
 	.byte	0x18
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x142
 	.4byte	0x681
 	.uleb128 0x1b
 	.4byte	.LASF33
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x107
 	.byte	0
 	.uleb128 0x1d
 	.ascii	"end\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x107
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF100
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x107
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF101
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x107
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF102
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x145
 	.4byte	0x107
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF103
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x112
 	.byte	0x14
 	.uleb128 0x1b
 	.4byte	.LASF104
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x112
 	.byte	0x15
 	.uleb128 0x1d
 	.ascii	"os\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x112
 	.byte	0x16
 	.uleb128 0x1b
 	.4byte	.LASF105
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x147
 	.4byte	0x112
 	.byte	0x17
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF106
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x148
 	.4byte	0x5ff
 	.uleb128 0x1e
 	.4byte	.LASF107
 	.2byte	0x164
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x14e
 	.4byte	0x820
 	.uleb128 0x1b
 	.4byte	.LASF108
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x154
 	.4byte	0x820
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF109
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x155
 	.4byte	0x5f3
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF110
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x156
 	.4byte	0x107
 	.byte	0x44
 	.uleb128 0x1b
 	.4byte	.LASF111
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x159
 	.4byte	0xdd
 	.byte	0x48
 	.uleb128 0x1b
 	.4byte	.LASF112
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15b
 	.4byte	0x128
 	.byte	0x4c
 	.uleb128 0x1b
 	.4byte	.LASF113
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15c
 	.4byte	0xdd
 	.byte	0x50
 	.uleb128 0x1b
 	.4byte	.LASF114
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15d
 	.4byte	0x50
 	.byte	0x54
 	.uleb128 0x1b
 	.4byte	.LASF115
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15f
 	.4byte	0x128
 	.byte	0x58
 	.uleb128 0x1b
 	.4byte	.LASF116
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x160
 	.4byte	0xdd
 	.byte	0x5c
 	.uleb128 0x1b
 	.4byte	.LASF117
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x161
 	.4byte	0x50
 	.byte	0x60
 	.uleb128 0x1b
 	.4byte	.LASF118
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x163
 	.4byte	0x128
 	.byte	0x64
 	.uleb128 0x1b
 	.4byte	.LASF119
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x164
 	.4byte	0xdd
 	.byte	0x68
 	.uleb128 0x1b
 	.4byte	.LASF120
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x165
 	.4byte	0x50
 	.byte	0x6c
 	.uleb128 0x1b
 	.4byte	.LASF121
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x167
 	.4byte	0x128
 	.byte	0x70
 	.uleb128 0x1b
 	.4byte	.LASF122
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x168
 	.4byte	0xdd
 	.byte	0x74
 	.uleb128 0x1b
 	.4byte	.LASF123
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x169
 	.4byte	0x50
 	.byte	0x78
 	.uleb128 0x1d
 	.ascii	"os\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16d
 	.4byte	0x681
 	.byte	0x7c
 	.uleb128 0x1d
 	.ascii	"ep\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16e
 	.4byte	0x107
 	.byte	0x94
 	.uleb128 0x1b
 	.4byte	.LASF124
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x107
 	.byte	0x98
 	.uleb128 0x1b
 	.4byte	.LASF125
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x107
 	.byte	0x9c
 	.uleb128 0x1b
 	.4byte	.LASF126
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x172
 	.4byte	0xf6
 	.byte	0xa0
 	.uleb128 0x1b
 	.4byte	.LASF127
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x173
 	.4byte	0x107
 	.byte	0xa4
 	.uleb128 0x1b
 	.4byte	.LASF128
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x175
 	.4byte	0x107
 	.byte	0xa8
 	.uleb128 0x1b
 	.4byte	.LASF129
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x176
 	.4byte	0x107
 	.byte	0xac
 	.uleb128 0x1b
 	.4byte	.LASF130
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x177
 	.4byte	0x107
 	.byte	0xb0
 	.uleb128 0x1b
 	.4byte	.LASF131
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x178
 	.4byte	0x107
 	.byte	0xb4
 	.uleb128 0x1d
 	.ascii	"kbd\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x179
 	.4byte	0x826
 	.byte	0xb8
 	.uleb128 0x1b
 	.4byte	.LASF132
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x17c
 	.4byte	0x50
 	.byte	0xbc
 	.uleb128 0x1b
 	.4byte	.LASF133
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x189
 	.4byte	0x50
 	.byte	0xc0
 	.uleb128 0x1d
 	.ascii	"lmb\000"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18c
 	.4byte	0x2ee
 	.byte	0xc4
@@ -24772,19 +24798,19 @@ __func__.9940:
 	.4byte	0x440
 	.uleb128 0x1c
 	.4byte	.LASF134
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18e
 	.4byte	0x68d
 	.uleb128 0xc
 	.4byte	.LASF135
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x190
 	.4byte	0x82c
 	.uleb128 0x1f
 	.4byte	.LASF263
 	.byte	0x4
 	.4byte	0x50
-	.byte	0x16
+	.byte	0x17
 	.byte	0xe
 	.4byte	0xa41
 	.uleb128 0x20
@@ -25053,7 +25079,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF219
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa6
 	.4byte	0x107
 	.uleb128 0xa
@@ -25063,38 +25089,38 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF220
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa8
 	.4byte	0xa6f
 	.uleb128 0x4
 	.4byte	.LASF221
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa9
 	.4byte	0xa6f
 	.uleb128 0x4
 	.4byte	.LASF222
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf7
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF223
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf8
 	.4byte	0x107
 	.uleb128 0x4
 	.4byte	.LASF224
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf9
 	.4byte	0x107
 	.uleb128 0xf
 	.4byte	.LASF225
 	.byte	0x4
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2e
 	.4byte	0xaca
 	.uleb128 0x10
 	.4byte	.LASF226
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2f
 	.4byte	0x11d
 	.byte	0
@@ -25105,78 +25131,78 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF227
 	.byte	0x40
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa6
 	.4byte	0xb6d
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa8
 	.4byte	0xb6d
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF228
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa9
 	.4byte	0x188
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF229
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaa
 	.4byte	0xc0
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF133
-	.byte	0x15
+	.byte	0x16
 	.byte	0xab
 	.4byte	0x50
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF230
-	.byte	0x15
+	.byte	0x16
 	.byte	0xad
 	.4byte	0xb97
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF231
-	.byte	0x15
+	.byte	0x16
 	.byte	0xae
 	.4byte	0xbb6
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF232
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaf
 	.4byte	0xbcb
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF233
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb0
 	.4byte	0xbdc
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF234
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb4
 	.4byte	0xbcb
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb5
 	.4byte	0xb91
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb6
 	.4byte	0x50
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF237
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb7
 	.4byte	0x128
 	.byte	0x3c
@@ -25234,7 +25260,7 @@ __func__.9940:
 	.4byte	0xbd1
 	.uleb128 0x4
 	.4byte	.LASF238
-	.byte	0x15
+	.byte	0x16
 	.byte	0xbd
 	.4byte	0xb91
 	.uleb128 0x23
@@ -25246,7 +25272,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF239
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x11e
 	.4byte	0xc09
 	.uleb128 0x8
@@ -25261,27 +25287,27 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF240
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fd
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF241
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fe
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF242
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x200
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF243
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x205
 	.4byte	0xa54
 	.uleb128 0xc
 	.4byte	.LASF244
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x206
 	.4byte	0xa54
 	.uleb128 0xa
@@ -25293,32 +25319,32 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF245
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x207
 	.4byte	0xc5b
 	.uleb128 0xc
 	.4byte	.LASF246
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x209
 	.4byte	0xc0f
 	.uleb128 0xc
 	.4byte	.LASF247
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20a
 	.4byte	0xc0f
 	.uleb128 0xc
 	.4byte	.LASF248
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20b
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF249
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20c
 	.4byte	0xab1
 	.uleb128 0xc
 	.4byte	.LASF250
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20d
 	.4byte	0xaca
 	.uleb128 0xa
@@ -25330,17 +25356,17 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF251
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20e
 	.4byte	0xcb3
 	.uleb128 0xc
 	.4byte	.LASF252
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20f
 	.4byte	0xaca
 	.uleb128 0xc
 	.4byte	.LASF253
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x210
 	.4byte	0x50
 	.uleb128 0xa
@@ -25354,27 +25380,27 @@ __func__.9940:
 	.4byte	0xce7
 	.uleb128 0xc
 	.4byte	.LASF254
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x211
 	.4byte	0xcf7
 	.uleb128 0xc
 	.4byte	.LASF255
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x212
 	.4byte	0xcf7
 	.uleb128 0xc
 	.4byte	.LASF256
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x216
 	.4byte	0xfc
 	.uleb128 0xc
 	.4byte	.LASF257
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x217
 	.4byte	0xfc
 	.uleb128 0xc
 	.4byte	.LASF258
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x219
 	.4byte	0x50
 	.uleb128 0xa
@@ -25386,29 +25412,29 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF259
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x220
 	.4byte	0xd38
 	.uleb128 0xc
 	.4byte	.LASF260
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x222
 	.4byte	0xb5
 	.uleb128 0xc
 	.4byte	.LASF261
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x224
 	.4byte	0xb5
 	.uleb128 0xc
 	.4byte	.LASF262
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x230
 	.4byte	0xab1
 	.uleb128 0x24
 	.4byte	.LASF264
 	.byte	0x4
 	.4byte	0x7b
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x286
 	.4byte	0xda3
 	.uleb128 0x20
@@ -25426,68 +25452,68 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF269
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x28c
 	.4byte	0xd79
 	.uleb128 0x3
 	.4byte	.LASF270
-	.byte	0x17
+	.byte	0x18
 	.byte	0x9
 	.4byte	0x37
 	.uleb128 0x3
 	.4byte	.LASF271
-	.byte	0x17
+	.byte	0x18
 	.byte	0xa
 	.4byte	0x25
 	.uleb128 0x3
 	.4byte	.LASF272
-	.byte	0x17
+	.byte	0x18
 	.byte	0xb
 	.4byte	0x7b
 	.uleb128 0x3
 	.4byte	.LASF273
-	.byte	0x17
+	.byte	0x18
 	.byte	0xc
 	.4byte	0x50
 	.uleb128 0x3
 	.4byte	.LASF274
-	.byte	0x17
+	.byte	0x18
 	.byte	0xd
 	.4byte	0x69
 	.uleb128 0xf
 	.4byte	.LASF275
 	.byte	0x14
-	.byte	0x18
-	.byte	0x27
+	.byte	0x19
+	.byte	0x24
 	.4byte	0xe2f
 	.uleb128 0x10
 	.4byte	.LASF276
-	.byte	0x18
-	.byte	0x28
+	.byte	0x19
+	.byte	0x25
 	.4byte	0xb5
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF277
-	.byte	0x18
-	.byte	0x29
+	.byte	0x19
+	.byte	0x26
 	.4byte	0xb5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF278
-	.byte	0x18
-	.byte	0x2a
+	.byte	0x19
+	.byte	0x27
 	.4byte	0xe2f
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF279
-	.byte	0x18
-	.byte	0x2b
+	.byte	0x19
+	.byte	0x28
 	.4byte	0xe2f
 	.byte	0xc
 	.uleb128 0x16
 	.ascii	"lpa\000"
-	.byte	0x18
-	.byte	0x2c
+	.byte	0x19
+	.byte	0x29
 	.4byte	0xb5
 	.byte	0x10
 	.byte	0
@@ -25497,79 +25523,79 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF280
 	.byte	0x18
-	.byte	0x18
-	.byte	0x2f
+	.byte	0x19
+	.byte	0x2c
 	.4byte	0xed2
 	.uleb128 0x10
 	.4byte	.LASF281
-	.byte	0x18
-	.byte	0x30
+	.byte	0x19
+	.byte	0x2d
 	.4byte	0x9f
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF282
-	.byte	0x18
-	.byte	0x31
+	.byte	0x19
+	.byte	0x2e
 	.4byte	0x9f
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF283
-	.byte	0x18
-	.byte	0x32
+	.byte	0x19
+	.byte	0x2f
 	.4byte	0x9f
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF284
-	.byte	0x18
-	.byte	0x33
+	.byte	0x19
+	.byte	0x30
 	.4byte	0x9f
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF285
-	.byte	0x18
-	.byte	0x34
+	.byte	0x19
+	.byte	0x31
 	.4byte	0x9f
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF286
-	.byte	0x18
-	.byte	0x35
+	.byte	0x19
+	.byte	0x32
 	.4byte	0x9f
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF287
-	.byte	0x18
-	.byte	0x36
+	.byte	0x19
+	.byte	0x33
 	.4byte	0x9f
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF288
-	.byte	0x18
-	.byte	0x37
+	.byte	0x19
+	.byte	0x34
 	.4byte	0x9f
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF289
-	.byte	0x18
-	.byte	0x38
+	.byte	0x19
+	.byte	0x35
 	.4byte	0x9f
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF290
-	.byte	0x18
-	.byte	0x39
+	.byte	0x19
+	.byte	0x36
 	.4byte	0x9f
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF291
-	.byte	0x18
-	.byte	0x3a
+	.byte	0x19
+	.byte	0x37
 	.4byte	0x9f
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF292
-	.byte	0x18
-	.byte	0x3b
+	.byte	0x19
+	.byte	0x38
 	.4byte	0x90
 	.byte	0x16
 	.byte	0
@@ -25578,31 +25604,31 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF293
 	.byte	0x10
-	.byte	0x18
-	.byte	0x3e
+	.byte	0x19
+	.byte	0x3b
 	.4byte	0xf14
 	.uleb128 0x10
 	.4byte	.LASF294
-	.byte	0x18
-	.byte	0x3f
+	.byte	0x19
+	.byte	0x3c
 	.4byte	0xf2e
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF295
-	.byte	0x18
-	.byte	0x40
+	.byte	0x19
+	.byte	0x3d
 	.4byte	0xf48
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF296
-	.byte	0x18
-	.byte	0x41
+	.byte	0x19
+	.byte	0x3e
 	.4byte	0xf6c
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF297
-	.byte	0x18
-	.byte	0x42
+	.byte	0x19
+	.byte	0x3f
 	.4byte	0xf6c
 	.byte	0xc
 	.byte	0
@@ -25649,48 +25675,48 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF298
 	.byte	0x3c
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2b
 	.4byte	0xfd2
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2d
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2e
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2f
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x16
 	.ascii	"cnt\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x30
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x31
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF301
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x32
 	.4byte	0xfd2
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF302
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x33
 	.4byte	0xfe2
 	.byte	0x1c
@@ -25715,36 +25741,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF303
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x3f
 	.4byte	0x1040
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x41
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x42
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x43
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x44
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x45
 	.4byte	0xdc5
 	.byte	0x8
@@ -25752,84 +25778,84 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF305
 	.byte	0x28
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x48
 	.4byte	0x10e9
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4a
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4b
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4d
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF307
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4e
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF308
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x50
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF309
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x51
 	.4byte	0xdba
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF310
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x53
 	.4byte	0x10e9
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF311
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x54
 	.4byte	0xff2
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF312
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x55
 	.4byte	0x10e9
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF313
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x56
 	.4byte	0xff2
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x58
 	.4byte	0xdc5
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF314
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x59
 	.4byte	0xdc5
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF315
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5a
 	.4byte	0xdc5
 	.byte	0x24
@@ -25840,30 +25866,30 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF316
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5d
 	.4byte	0x112c
 	.uleb128 0x10
 	.4byte	.LASF317
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5f
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x60
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x16
 	.ascii	"hit\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x61
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF318
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x62
 	.4byte	0xff2
 	.byte	0x8
@@ -25871,54 +25897,54 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF319
 	.byte	0x24
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x65
 	.4byte	0x1199
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x67
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF320
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x68
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x69
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x16
 	.ascii	"len\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6a
 	.4byte	0xdc5
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF321
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6b
 	.4byte	0xdc5
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF322
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6c
 	.4byte	0xdc5
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6d
 	.4byte	0x1199
 	.byte	0x18
 	.uleb128 0x16
 	.ascii	"tbl\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6e
 	.4byte	0x11a9
 	.byte	0x20
@@ -25940,48 +25966,48 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF324
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x72
 	.4byte	0x1219
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x74
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x75
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x76
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x77
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x78
 	.4byte	0xdba
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF326
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x79
 	.4byte	0xdba
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7a
 	.4byte	0x1219
 	.byte	0xe
@@ -25996,36 +26022,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF327
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x1271
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7f
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x80
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x81
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x16
 	.ascii	"lpa\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x82
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF328
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x83
 	.4byte	0xdc5
 	.byte	0xc
@@ -26033,36 +26059,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF329
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x8f
 	.4byte	0x12b9
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x91
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x92
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x93
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF330
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x94
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x95
 	.4byte	0x12b9
 	.byte	0xa
@@ -26077,36 +26103,36 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF331
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x98
 	.4byte	0x1311
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9a
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9b
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9c
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF332
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9d
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF333
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9e
 	.4byte	0xdc5
 	.byte	0xc
@@ -26114,126 +26140,126 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF334
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa1
 	.4byte	0x140e
 	.uleb128 0x16
 	.ascii	"tag\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa3
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x16
 	.ascii	"ver\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa4
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa6
 	.4byte	0xdba
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF335
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa7
 	.4byte	0xdaf
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF336
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa8
 	.4byte	0xdaf
 	.byte	0xb
 	.uleb128 0x10
 	.4byte	.LASF337
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa9
 	.4byte	0xdaf
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF338
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaa
 	.4byte	0xdaf
 	.byte	0xd
 	.uleb128 0x10
 	.4byte	.LASF339
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xab
 	.4byte	0xdba
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF340
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xad
 	.4byte	0xdba
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF341
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xae
 	.4byte	0xdba
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF342
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaf
 	.4byte	0xdba
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF343
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb0
 	.4byte	0xdba
 	.byte	0x16
 	.uleb128 0x10
 	.4byte	.LASF344
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb2
 	.4byte	0xdba
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb3
 	.4byte	0xdba
 	.byte	0x1a
 	.uleb128 0x10
 	.4byte	.LASF346
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb4
 	.4byte	0xdba
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF347
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb5
 	.4byte	0xdba
 	.byte	0x1e
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb7
 	.4byte	0xdc5
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF349
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb8
 	.4byte	0xdc5
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF350
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb9
 	.4byte	0xdc5
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xba
 	.4byte	0x11a9
 	.byte	0x2c
@@ -26241,162 +26267,162 @@ __func__.9940:
 	.uleb128 0x25
 	.4byte	.LASF351
 	.2byte	0x200
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xbe
 	.4byte	0x1554
 	.uleb128 0x16
 	.ascii	"tag\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc0
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x16
 	.ascii	"ver\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc1
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF352
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc3
 	.4byte	0xdc5
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF353
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc4
 	.4byte	0xdc5
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF354
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc5
 	.4byte	0xdc5
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF355
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc6
 	.4byte	0xdc5
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc8
 	.4byte	0xdc5
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF356
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc9
 	.4byte	0xdc5
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF357
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xca
 	.4byte	0xdc5
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF358
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcb
 	.4byte	0xdc5
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcd
 	.4byte	0xdc5
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF359
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xce
 	.4byte	0xdc5
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF360
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcf
 	.4byte	0xdc5
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF361
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd0
 	.4byte	0xdc5
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF362
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd2
 	.4byte	0xdc5
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF363
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd3
 	.4byte	0xdc5
 	.byte	0x3c
 	.uleb128 0x10
 	.4byte	.LASF364
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd4
 	.4byte	0xdc5
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF365
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd5
 	.4byte	0xdc5
 	.byte	0x44
 	.uleb128 0x10
 	.4byte	.LASF366
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd7
 	.4byte	0xdc5
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF367
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd8
 	.4byte	0xdc5
 	.byte	0x4c
 	.uleb128 0x10
 	.4byte	.LASF368
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd9
 	.4byte	0xdc5
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF369
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xda
 	.4byte	0xdc5
 	.byte	0x54
 	.uleb128 0x10
 	.4byte	.LASF370
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdc
 	.4byte	0xdc5
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF371
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdd
 	.4byte	0xdc5
 	.byte	0x5c
 	.uleb128 0x10
 	.4byte	.LASF372
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xde
 	.4byte	0xdc5
 	.byte	0x60
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe0
 	.4byte	0x1554
 	.byte	0x64
@@ -26411,24 +26437,24 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF373
 	.byte	0x6
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe4
 	.4byte	0x1595
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe6
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF374
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe7
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF375
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe8
 	.4byte	0xdba
 	.byte	0x4
@@ -26436,36 +26462,36 @@ __func__.9940:
 	.uleb128 0x25
 	.4byte	.LASF376
 	.2byte	0x808
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xeb
 	.4byte	0x15df
 	.uleb128 0x16
 	.ascii	"max\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xed
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF377
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xee
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF378
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xef
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf0
 	.4byte	0xdba
 	.byte	0x6
 	.uleb128 0x16
 	.ascii	"arr\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf1
 	.4byte	0x15df
 	.byte	0x8
@@ -26480,72 +26506,72 @@ __func__.9940:
 	.uleb128 0xf
 	.4byte	.LASF379
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf5
 	.4byte	0x1682
 	.uleb128 0x16
 	.ascii	"id\000"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf7
 	.4byte	0xdba
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF380
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf8
 	.4byte	0xdba
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF381
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf9
 	.4byte	0xdba
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF382
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfa
 	.4byte	0xdaf
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF383
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfb
 	.4byte	0xdaf
 	.byte	0x7
 	.uleb128 0x10
 	.4byte	.LASF384
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfc
 	.4byte	0xdaf
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF385
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfd
 	.4byte	0xdaf
 	.byte	0x9
 	.uleb128 0x10
 	.4byte	.LASF386
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfe
 	.4byte	0xdaf
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF387
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xff
 	.4byte	0xdaf
 	.byte	0xb
 	.uleb128 0x1b
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x100
 	.4byte	0xdc5
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF388
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x101
 	.4byte	0x1682
 	.byte	0x10
@@ -26560,24 +26586,24 @@ __func__.9940:
 	.uleb128 0x1a
 	.4byte	.LASF389
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x105
 	.4byte	0x16c7
 	.uleb128 0x1b
 	.4byte	.LASF390
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x107
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF391
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x108
 	.4byte	0xdc5
 	.byte	0x4
 	.uleb128 0x1d
 	.ascii	"lpa\000"
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x109
 	.4byte	0xdc5
 	.byte	0x8
@@ -26585,31 +26611,31 @@ __func__.9940:
 	.uleb128 0x1a
 	.4byte	.LASF392
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10c
 	.4byte	0x16fc
 	.uleb128 0x1b
 	.4byte	.LASF278
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10e
 	.4byte	0xff2
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF279
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10f
 	.4byte	0xff2
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF393
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x110
 	.4byte	0xdc5
 	.byte	0x8
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF394
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x12
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26617,7 +26643,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_type
 	.uleb128 0x26
 	.4byte	.LASF395
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x13
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26625,7 +26651,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_die_num
 	.uleb128 0x26
 	.4byte	.LASF396
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x14
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26633,7 +26659,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_planes_per_die
 	.uleb128 0x26
 	.4byte	.LASF397
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x15
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26641,7 +26667,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_blks_per_die
 	.uleb128 0x26
 	.4byte	.LASF398
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x16
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26649,7 +26675,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_blks_per_die_shift
 	.uleb128 0x26
 	.4byte	.LASF399
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x17
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26657,7 +26683,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_planes_num
 	.uleb128 0x26
 	.4byte	.LASF400
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x18
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26665,7 +26691,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_blk_pre_plane
 	.uleb128 0x26
 	.4byte	.LASF401
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x19
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26673,7 +26699,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_ext_blk_pre_plane
 	.uleb128 0x26
 	.4byte	.LASF402
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1a
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26681,7 +26707,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_bbm_buf_size
 	.uleb128 0x26
 	.4byte	.LASF403
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1c
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26689,7 +26715,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_page_pre_blk
 	.uleb128 0x26
 	.4byte	.LASF404
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1d
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26697,7 +26723,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_page_pre_slc_blk
 	.uleb128 0x26
 	.4byte	.LASF405
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26705,7 +26731,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_page_pre_super_blk
 	.uleb128 0x26
 	.4byte	.LASF406
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1f
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26713,7 +26739,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_sec_pre_page
 	.uleb128 0x26
 	.4byte	.LASF407
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x20
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26721,7 +26747,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_sec_pre_page_shift
 	.uleb128 0x26
 	.4byte	.LASF408
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x24
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26729,7 +26755,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_byte_pre_page
 	.uleb128 0x26
 	.4byte	.LASF409
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x25
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26737,7 +26763,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_byte_pre_oob
 	.uleb128 0x26
 	.4byte	.LASF410
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x26
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26745,7 +26771,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_reserved_blks
 	.uleb128 0x26
 	.4byte	.LASF411
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x27
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26753,7 +26779,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_totle_phy_blks
 	.uleb128 0x26
 	.4byte	.LASF412
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x29
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26761,7 +26787,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_map_region_num
 	.uleb128 0x26
 	.4byte	.LASF413
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2a
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26769,7 +26795,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
 	.uleb128 0x26
 	.4byte	.LASF414
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2c
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26777,7 +26803,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_vendor_region_num
 	.uleb128 0x26
 	.4byte	.LASF415
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26785,7 +26811,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_map_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF416
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2f
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26793,7 +26819,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_map_blks
 	.uleb128 0x26
 	.4byte	.LASF417
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x30
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26801,7 +26827,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_vendor_blks
 	.uleb128 0x26
 	.4byte	.LASF418
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x31
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26809,7 +26835,7 @@ __func__.9940:
 	.4byte	c_ftl_vendor_part_size
 	.uleb128 0x26
 	.4byte	.LASF419
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x32
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26817,7 +26843,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_sys_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF420
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x33
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26825,7 +26851,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_init_sys_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF421
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x34
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26833,7 +26859,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_sys_blks
 	.uleb128 0x26
 	.4byte	.LASF422
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x35
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26841,7 +26867,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_data_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF423
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x36
 	.4byte	0xdba
 	.uleb128 0x5
@@ -26849,7 +26875,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_data_op_blks_per_plane
 	.uleb128 0x26
 	.4byte	.LASF424
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x37
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26857,7 +26883,7 @@ __func__.9940:
 	.4byte	c_ftl_nand_max_data_blks
 	.uleb128 0x26
 	.4byte	.LASF425
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x38
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26865,7 +26891,7 @@ __func__.9940:
 	.4byte	ftl_gc_temp_power_lost_recovery_flag
 	.uleb128 0x26
 	.4byte	.LASF426
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3a
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26873,7 +26899,7 @@ __func__.9940:
 	.4byte	g_GlobalSysVersion
 	.uleb128 0x26
 	.4byte	.LASF427
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3b
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26881,7 +26907,7 @@ __func__.9940:
 	.4byte	g_GlobalDataVersion
 	.uleb128 0x26
 	.4byte	.LASF428
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3c
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26889,7 +26915,7 @@ __func__.9940:
 	.4byte	g_MaxLbaSector
 	.uleb128 0x26
 	.4byte	.LASF429
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3d
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26897,7 +26923,7 @@ __func__.9940:
 	.4byte	g_MaxLpn
 	.uleb128 0x26
 	.4byte	.LASF430
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3e
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26905,7 +26931,7 @@ __func__.9940:
 	.4byte	g_VaildLpn
 	.uleb128 0x26
 	.4byte	.LASF431
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3f
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -26913,7 +26939,7 @@ __func__.9940:
 	.4byte	g_MaxLbn
 	.uleb128 0x26
 	.4byte	.LASF432
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x41
 	.4byte	0xf72
 	.uleb128 0x5
@@ -26921,7 +26947,7 @@ __func__.9940:
 	.4byte	gBbtInfo
 	.uleb128 0x26
 	.4byte	.LASF433
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x42
 	.4byte	0xff8
 	.uleb128 0x5
@@ -26929,7 +26955,7 @@ __func__.9940:
 	.4byte	gSysInfo
 	.uleb128 0x26
 	.4byte	.LASF434
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x43
 	.4byte	0x1595
 	.uleb128 0x5
@@ -26937,7 +26963,7 @@ __func__.9940:
 	.4byte	gSysFreeQueue
 	.uleb128 0x26
 	.4byte	.LASF435
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x44
 	.4byte	0x1040
 	.uleb128 0x5
@@ -26945,7 +26971,7 @@ __func__.9940:
 	.4byte	gL2pMapInfo
 	.uleb128 0x26
 	.4byte	.LASF436
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x45
 	.4byte	0x1040
 	.uleb128 0x5
@@ -26953,7 +26979,7 @@ __func__.9940:
 	.4byte	gVendorBlkInfo
 	.uleb128 0x26
 	.4byte	.LASF437
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x46
 	.4byte	0xde6
 	.uleb128 0x5
@@ -26961,7 +26987,7 @@ __func__.9940:
 	.4byte	req_sys
 	.uleb128 0x26
 	.4byte	.LASF438
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x47
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26972,7 +26998,7 @@ __func__.9940:
 	.4byte	0xde6
 	.uleb128 0x26
 	.4byte	.LASF439
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x48
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26980,7 +27006,7 @@ __func__.9940:
 	.4byte	req_prgm
 	.uleb128 0x26
 	.4byte	.LASF440
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x49
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26988,7 +27014,7 @@ __func__.9940:
 	.4byte	req_erase
 	.uleb128 0x26
 	.4byte	.LASF441
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4a
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -26996,7 +27022,7 @@ __func__.9940:
 	.4byte	req_gc
 	.uleb128 0x26
 	.4byte	.LASF442
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4b
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -27004,7 +27030,7 @@ __func__.9940:
 	.4byte	req_gc_dst
 	.uleb128 0x26
 	.4byte	.LASF443
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4d
 	.4byte	0x19f9
 	.uleb128 0x5
@@ -27019,7 +27045,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF444
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4f
 	.4byte	0x1a54
 	.uleb128 0x5
@@ -27027,7 +27053,7 @@ __func__.9940:
 	.4byte	p_plane_order_table
 	.uleb128 0x26
 	.4byte	.LASF445
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x51
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27035,7 +27061,7 @@ __func__.9940:
 	.4byte	p_sys_data_buf
 	.uleb128 0x26
 	.4byte	.LASF446
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x52
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27043,7 +27069,7 @@ __func__.9940:
 	.4byte	p_sys_data_buf_1
 	.uleb128 0x26
 	.4byte	.LASF447
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x53
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27051,7 +27077,7 @@ __func__.9940:
 	.4byte	p_vendor_data_buf
 	.uleb128 0x26
 	.4byte	.LASF448
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x54
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27059,7 +27085,7 @@ __func__.9940:
 	.4byte	p_sys_spare_buf
 	.uleb128 0x26
 	.4byte	.LASF449
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x55
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27067,7 +27093,7 @@ __func__.9940:
 	.4byte	p_io_data_buf_0
 	.uleb128 0x26
 	.4byte	.LASF450
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x56
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27075,7 +27101,7 @@ __func__.9940:
 	.4byte	p_io_data_buf_1
 	.uleb128 0x26
 	.4byte	.LASF451
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x57
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27083,7 +27109,7 @@ __func__.9940:
 	.4byte	p_io_spare_buf
 	.uleb128 0x26
 	.4byte	.LASF452
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x58
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27091,7 +27117,7 @@ __func__.9940:
 	.4byte	p_gc_spare_buf
 	.uleb128 0x26
 	.4byte	.LASF453
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x59
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27099,7 +27125,7 @@ __func__.9940:
 	.4byte	p_gc_data_buf
 	.uleb128 0x26
 	.4byte	.LASF454
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5a
 	.4byte	0x1b1f
 	.uleb128 0x5
@@ -27110,7 +27136,7 @@ __func__.9940:
 	.4byte	0x16c7
 	.uleb128 0x26
 	.4byte	.LASF455
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5b
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27118,7 +27144,7 @@ __func__.9940:
 	.4byte	c_gc_page_buf_num
 	.uleb128 0x26
 	.4byte	.LASF456
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5c
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27126,7 +27152,7 @@ __func__.9940:
 	.4byte	g_gc_num_req
 	.uleb128 0x26
 	.4byte	.LASF457
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5d
 	.4byte	0x1b58
 	.uleb128 0x5
@@ -27137,7 +27163,7 @@ __func__.9940:
 	.4byte	0x112c
 	.uleb128 0x26
 	.4byte	.LASF458
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27145,7 +27171,7 @@ __func__.9940:
 	.4byte	g_ect_tbl_info_size
 	.uleb128 0x26
 	.4byte	.LASF459
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5f
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27153,7 +27179,7 @@ __func__.9940:
 	.4byte	p_erase_count_table
 	.uleb128 0x26
 	.4byte	.LASF460
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x61
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27161,7 +27187,7 @@ __func__.9940:
 	.4byte	p_swl_mul_table
 	.uleb128 0x26
 	.4byte	.LASF461
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x62
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27169,7 +27195,7 @@ __func__.9940:
 	.4byte	g_totle_swl_count
 	.uleb128 0x26
 	.4byte	.LASF462
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x63
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27177,7 +27203,7 @@ __func__.9940:
 	.4byte	p_valid_page_count_table
 	.uleb128 0x26
 	.4byte	.LASF463
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x64
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27185,7 +27211,7 @@ __func__.9940:
 	.4byte	p_valid_page_count_check_table
 	.uleb128 0x26
 	.4byte	.LASF464
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x65
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27193,7 +27219,7 @@ __func__.9940:
 	.4byte	p_blk_mode_table
 	.uleb128 0x26
 	.4byte	.LASF465
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x67
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27201,7 +27227,7 @@ __func__.9940:
 	.4byte	p_map_block_table
 	.uleb128 0x26
 	.4byte	.LASF466
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x68
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27209,7 +27235,7 @@ __func__.9940:
 	.4byte	p_map_block_valid_page_count
 	.uleb128 0x26
 	.4byte	.LASF467
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x69
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27217,7 +27243,7 @@ __func__.9940:
 	.4byte	p_map_block_ver_table
 	.uleb128 0x26
 	.4byte	.LASF468
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6a
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27225,7 +27251,7 @@ __func__.9940:
 	.4byte	p_map_region_ppn_table
 	.uleb128 0x26
 	.4byte	.LASF469
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6b
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27233,7 +27259,7 @@ __func__.9940:
 	.4byte	g_totle_map_block
 	.uleb128 0x26
 	.4byte	.LASF470
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6d
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27241,7 +27267,7 @@ __func__.9940:
 	.4byte	p_vendor_block_table
 	.uleb128 0x26
 	.4byte	.LASF471
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6e
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27249,7 +27275,7 @@ __func__.9940:
 	.4byte	p_vendor_block_valid_page_count
 	.uleb128 0x26
 	.4byte	.LASF472
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6f
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27257,7 +27283,7 @@ __func__.9940:
 	.4byte	p_vendor_block_ver_table
 	.uleb128 0x26
 	.4byte	.LASF473
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x70
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27265,7 +27291,7 @@ __func__.9940:
 	.4byte	p_vendor_region_ppn_table
 	.uleb128 0x26
 	.4byte	.LASF474
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x71
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27273,7 +27299,7 @@ __func__.9940:
 	.4byte	g_totle_vendor_block
 	.uleb128 0x26
 	.4byte	.LASF475
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x73
 	.4byte	0x1c90
 	.uleb128 0x5
@@ -27284,7 +27310,7 @@ __func__.9940:
 	.4byte	0x10ef
 	.uleb128 0x26
 	.4byte	.LASF476
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x74
 	.4byte	0xff2
 	.uleb128 0x5
@@ -27292,7 +27318,7 @@ __func__.9940:
 	.4byte	p_l2p_map_buf
 	.uleb128 0x26
 	.4byte	.LASF477
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x75
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27300,7 +27326,7 @@ __func__.9940:
 	.4byte	g_l2p_last_update_region_id
 	.uleb128 0x26
 	.4byte	.LASF478
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7c
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27311,7 +27337,7 @@ __func__.9940:
 	.4byte	0x1564
 	.uleb128 0x26
 	.4byte	.LASF479
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7d
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27319,7 +27345,7 @@ __func__.9940:
 	.4byte	p_free_data_block_list_head
 	.uleb128 0x26
 	.4byte	.LASF480
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7f
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27327,7 +27353,7 @@ __func__.9940:
 	.4byte	p_data_block_list_head
 	.uleb128 0x26
 	.4byte	.LASF481
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x80
 	.4byte	0x1cc9
 	.uleb128 0x5
@@ -27335,7 +27361,7 @@ __func__.9940:
 	.4byte	p_data_block_list_tail
 	.uleb128 0x26
 	.4byte	.LASF482
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x81
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27343,7 +27369,7 @@ __func__.9940:
 	.4byte	g_num_free_superblocks
 	.uleb128 0x26
 	.4byte	.LASF483
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x82
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27351,7 +27377,7 @@ __func__.9940:
 	.4byte	g_num_data_superblocks
 	.uleb128 0x26
 	.4byte	.LASF484
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x83
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27359,7 +27385,7 @@ __func__.9940:
 	.4byte	g_active_superblock
 	.uleb128 0x26
 	.4byte	.LASF485
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x84
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27367,7 +27393,7 @@ __func__.9940:
 	.4byte	g_buffer_superblock
 	.uleb128 0x26
 	.4byte	.LASF486
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x85
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27375,7 +27401,7 @@ __func__.9940:
 	.4byte	g_gc_temp_superblock
 	.uleb128 0x26
 	.4byte	.LASF487
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x86
 	.4byte	0x15f0
 	.uleb128 0x5
@@ -27383,7 +27409,7 @@ __func__.9940:
 	.4byte	g_gc_superblock
 	.uleb128 0x26
 	.4byte	.LASF488
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x87
 	.4byte	0x1d79
 	.uleb128 0x5
@@ -27394,7 +27420,7 @@ __func__.9940:
 	.4byte	0x15f0
 	.uleb128 0x26
 	.4byte	.LASF489
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x88
 	.4byte	0x1311
 	.uleb128 0x5
@@ -27402,7 +27428,7 @@ __func__.9940:
 	.4byte	g_sys_save_data
 	.uleb128 0x26
 	.4byte	.LASF490
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x89
 	.4byte	0x140e
 	.uleb128 0x5
@@ -27410,7 +27436,7 @@ __func__.9940:
 	.4byte	g_sys_ext_data
 	.uleb128 0x26
 	.4byte	.LASF491
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8b
 	.4byte	0x1db2
 	.uleb128 0x5
@@ -27421,7 +27447,7 @@ __func__.9940:
 	.4byte	0x1692
 	.uleb128 0x26
 	.4byte	.LASF492
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8c
 	.4byte	0x10e9
 	.uleb128 0x5
@@ -27429,7 +27455,7 @@ __func__.9940:
 	.4byte	p_gc_blk_tbl
 	.uleb128 0x26
 	.4byte	.LASF493
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8d
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27437,7 +27463,7 @@ __func__.9940:
 	.4byte	g_gc_blk_num
 	.uleb128 0x26
 	.4byte	.LASF494
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8e
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27445,7 +27471,7 @@ __func__.9940:
 	.4byte	g_gc_page_offset
 	.uleb128 0x26
 	.4byte	.LASF495
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8f
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27453,7 +27479,7 @@ __func__.9940:
 	.4byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x26
 	.4byte	.LASF496
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x90
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27461,7 +27487,7 @@ __func__.9940:
 	.4byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x26
 	.4byte	.LASF497
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x91
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27469,7 +27495,7 @@ __func__.9940:
 	.4byte	g_gc_next_blk
 	.uleb128 0x26
 	.4byte	.LASF498
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x92
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27477,7 +27503,7 @@ __func__.9940:
 	.4byte	g_gc_next_blk_1
 	.uleb128 0x26
 	.4byte	.LASF499
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x93
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27485,7 +27511,7 @@ __func__.9940:
 	.4byte	g_gc_bad_block_temp_num
 	.uleb128 0x26
 	.4byte	.LASF500
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x94
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27500,7 +27526,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF501
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x95
 	.4byte	0x1e51
 	.uleb128 0x5
@@ -27508,7 +27534,7 @@ __func__.9940:
 	.4byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x26
 	.4byte	.LASF502
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x97
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27516,7 +27542,7 @@ __func__.9940:
 	.4byte	g_gc_free_blk_threshold
 	.uleb128 0x26
 	.4byte	.LASF503
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x98
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27524,7 +27550,7 @@ __func__.9940:
 	.4byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x26
 	.4byte	.LASF504
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x99
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27532,7 +27558,7 @@ __func__.9940:
 	.4byte	g_gc_blk_index
 	.uleb128 0x26
 	.4byte	.LASF505
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9b
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27540,7 +27566,7 @@ __func__.9940:
 	.4byte	g_totle_gc_page_count
 	.uleb128 0x26
 	.4byte	.LASF506
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9c
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27548,7 +27574,7 @@ __func__.9940:
 	.4byte	g_totle_write_page_count
 	.uleb128 0x26
 	.4byte	.LASF507
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9d
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27556,7 +27582,7 @@ __func__.9940:
 	.4byte	g_totle_write_sector
 	.uleb128 0x26
 	.4byte	.LASF508
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9e
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27564,7 +27590,7 @@ __func__.9940:
 	.4byte	g_totle_read_sector
 	.uleb128 0x26
 	.4byte	.LASF509
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa0
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27572,7 +27598,7 @@ __func__.9940:
 	.4byte	g_totle_discard_page_count
 	.uleb128 0x26
 	.4byte	.LASF510
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa1
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27580,7 +27606,7 @@ __func__.9940:
 	.4byte	g_totle_read_page_count
 	.uleb128 0x26
 	.4byte	.LASF511
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa2
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27588,7 +27614,7 @@ __func__.9940:
 	.4byte	g_tmp_data_superblock_id
 	.uleb128 0x26
 	.4byte	.LASF512
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa3
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27596,7 +27622,7 @@ __func__.9940:
 	.4byte	g_totle_cache_write_count
 	.uleb128 0x26
 	.4byte	.LASF513
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa4
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27604,7 +27630,7 @@ __func__.9940:
 	.4byte	g_totle_l2p_write_count
 	.uleb128 0x26
 	.4byte	.LASF514
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa6
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27612,7 +27638,7 @@ __func__.9940:
 	.4byte	g_totle_mlc_erase_count
 	.uleb128 0x26
 	.4byte	.LASF515
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa7
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27620,7 +27646,7 @@ __func__.9940:
 	.4byte	g_totle_avg_erase_count
 	.uleb128 0x26
 	.4byte	.LASF516
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa8
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27628,7 +27654,7 @@ __func__.9940:
 	.4byte	g_min_erase_count
 	.uleb128 0x26
 	.4byte	.LASF517
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa9
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27636,7 +27662,7 @@ __func__.9940:
 	.4byte	g_totle_slc_erase_count
 	.uleb128 0x26
 	.4byte	.LASF518
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaa
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27644,7 +27670,7 @@ __func__.9940:
 	.4byte	g_totle_sys_slc_erase_count
 	.uleb128 0x26
 	.4byte	.LASF519
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xab
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27652,7 +27678,7 @@ __func__.9940:
 	.4byte	g_max_erase_count
 	.uleb128 0x26
 	.4byte	.LASF520
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xac
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27660,7 +27686,7 @@ __func__.9940:
 	.4byte	g_in_gc_progress
 	.uleb128 0x26
 	.4byte	.LASF521
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xad
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27668,7 +27694,7 @@ __func__.9940:
 	.4byte	g_in_swl_replace
 	.uleb128 0x26
 	.4byte	.LASF522
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xae
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27676,7 +27702,7 @@ __func__.9940:
 	.4byte	g_ftl_nand_free_count
 	.uleb128 0x26
 	.4byte	.LASF523
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaf
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27684,7 +27710,7 @@ __func__.9940:
 	.4byte	g_gc_head_data_block
 	.uleb128 0x26
 	.4byte	.LASF524
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb0
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27692,7 +27718,7 @@ __func__.9940:
 	.4byte	g_gc_head_data_block_count
 	.uleb128 0x26
 	.4byte	.LASF525
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb1
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27700,7 +27726,7 @@ __func__.9940:
 	.4byte	g_gc_skip_write_count
 	.uleb128 0x26
 	.4byte	.LASF526
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb2
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27708,7 +27734,7 @@ __func__.9940:
 	.4byte	g_cur_erase_blk
 	.uleb128 0x26
 	.4byte	.LASF527
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb4
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27716,7 +27742,7 @@ __func__.9940:
 	.4byte	g_recovery_page_num
 	.uleb128 0x26
 	.4byte	.LASF528
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb5
 	.4byte	0xdc5
 	.uleb128 0x5
@@ -27731,7 +27757,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x26
 	.4byte	.LASF529
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb6
 	.4byte	0x203d
 	.uleb128 0x5
@@ -27739,7 +27765,7 @@ __func__.9940:
 	.4byte	g_recovery_ppa_tbl
 	.uleb128 0x26
 	.4byte	.LASF530
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb7
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27747,7 +27773,7 @@ __func__.9940:
 	.4byte	c_mlc_erase_count_value
 	.uleb128 0x26
 	.4byte	.LASF531
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb8
 	.4byte	0xdba
 	.uleb128 0x5
@@ -27755,17 +27781,17 @@ __func__.9940:
 	.4byte	g_power_lost_recovery_flag
 	.uleb128 0x4
 	.4byte	.LASF532
-	.byte	0x17
+	.byte	0x18
 	.byte	0x14
 	.4byte	0xe35
 	.uleb128 0x4
 	.4byte	.LASF533
-	.byte	0x17
+	.byte	0x18
 	.byte	0x15
 	.4byte	0xe35
 	.uleb128 0x4
 	.4byte	.LASF534
-	.byte	0x17
+	.byte	0x18
 	.byte	0x16
 	.4byte	0xed7
 	.uleb128 0xa
@@ -27777,7 +27803,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF535
-	.byte	0x17
+	.byte	0x18
 	.byte	0x17
 	.4byte	0x20a1
 	.uleb128 0x26
@@ -27881,35 +27907,35 @@ __func__.9940:
 	.4byte	gc_ink_free_return_value
 	.uleb128 0xc
 	.4byte	.LASF549
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x107
 	.uleb128 0xc
 	.4byte	.LASF550
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x107
 	.uleb128 0xc
 	.4byte	.LASF551
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x107
 	.uleb128 0xf
 	.4byte	.LASF552
 	.byte	0x4
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x21d6
 	.uleb128 0x16
 	.ascii	"pid\000"
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xd
 	.4byte	0x50
 	.byte	0
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF553
-	.byte	0x1c
+	.byte	0x6
 	.byte	0x10
 	.4byte	0x21e1
 	.uleb128 0x8
@@ -27962,34 +27988,34 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF558
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x50
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
+	.4byte	.LFB351
+	.4byte	.LFE351-.LFB351
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x22a6
 	.uleb128 0x2c
 	.4byte	.LASF556
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST453
+	.4byte	.LLST455
 	.uleb128 0x2c
 	.4byte	.LASF557
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x128
-	.4byte	.LLST454
+	.4byte	.LLST456
 	.uleb128 0x2c
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x7b
-	.4byte	.LLST455
+	.4byte	.LLST457
 	.uleb128 0x2d
-	.4byte	.LVL2076
-	.4byte	0x91ff
+	.4byte	.LVL2078
+	.4byte	0x9266
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28016,34 +28042,34 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF559
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x128
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x230c
 	.uleb128 0x2c
 	.4byte	.LASF560
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x128
-	.4byte	.LLST285
+	.4byte	.LLST287
 	.uleb128 0x2c
 	.4byte	.LASF561
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x16b
-	.4byte	.LLST286
+	.4byte	.LLST288
 	.uleb128 0x2c
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x7b
-	.4byte	.LLST287
+	.4byte	.LLST289
 	.uleb128 0x2d
-	.4byte	.LVL1160
-	.4byte	0x920a
+	.4byte	.LVL1162
+	.4byte	0x9271
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28070,34 +28096,34 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF562
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x128
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x236c
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x128
-	.4byte	.LLST189
+	.4byte	.LLST191
 	.uleb128 0x2f
 	.ascii	"c\000"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x50
-	.4byte	.LLST190
+	.4byte	.LLST192
 	.uleb128 0x2f
 	.ascii	"n\000"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x7b
-	.4byte	.LLST191
+	.4byte	.LLST193
 	.uleb128 0x2d
-	.4byte	.LVL696
-	.4byte	0x9216
+	.4byte	.LVL698
+	.4byte	0x927d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28124,38 +28150,38 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF563
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xaa
-	.4byte	.LFB347
-	.4byte	.LFE347-.LFB347
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2410
 	.uleb128 0x2c
 	.4byte	.LASF564
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xf28
-	.4byte	.LLST282
+	.4byte	.LLST284
 	.uleb128 0x2f
 	.ascii	"die\000"
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xb5
-	.4byte	.LLST283
+	.4byte	.LLST285
 	.uleb128 0x30
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0x9f
-	.4byte	.LLST284
+	.4byte	.LLST286
 	.uleb128 0x31
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0x9f
 	.uleb128 0x32
-	.4byte	.LVL1152
+	.4byte	.LVL1154
 	.4byte	0x230c
 	.4byte	0x23dc
 	.uleb128 0x2e
@@ -28178,7 +28204,7 @@ __func__.9940:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x33
-	.4byte	.LVL1153
+	.4byte	.LVL1155
 	.4byte	0x23f2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28194,7 +28220,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1156
+	.4byte	.LVL1158
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28217,36 +28243,36 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x35
-	.4byte	.LASF586
+	.4byte	.LASF589
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xdd0
 	.byte	0x1
 	.4byte	0x2454
 	.uleb128 0x36
 	.4byte	.LASF577
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xdba
 	.uleb128 0x31
 	.ascii	"sts\000"
 	.byte	0x1
-	.byte	0xc2
+	.byte	0xc6
 	.4byte	0xdd0
 	.uleb128 0x37
 	.4byte	.LASF565
 	.byte	0x1
-	.byte	0xc3
+	.byte	0xc7
 	.4byte	0x2454
 	.uleb128 0x31
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0xc4
+	.byte	0xc8
 	.4byte	0xde6
 	.uleb128 0x38
 	.ascii	"out\000"
 	.byte	0x1
-	.byte	0xd6
+	.byte	0xda
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdc5
@@ -28258,42 +28284,42 @@ __func__.9940:
 	.uleb128 0x39
 	.4byte	.LASF566
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xaa
-	.4byte	.LFB345
-	.4byte	.LFE345-.LFB345
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x251a
 	.uleb128 0x2c
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0x128
-	.4byte	.LLST170
+	.4byte	.LLST172
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST171
+	.4byte	.LLST173
 	.uleb128 0x2c
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb5
-	.4byte	.LLST172
+	.4byte	.LLST174
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x56
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28301,13 +28327,13 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
-	.4byte	.LLST173
+	.4byte	.LLST175
 	.uleb128 0x29
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28315,19 +28341,19 @@ __func__.9940:
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0xad
+	.byte	0xb1
 	.4byte	0x19f9
-	.4byte	.LLST174
+	.4byte	.LLST176
 	.uleb128 0x29
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0xae
+	.byte	0xb2
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL628
-	.4byte	0x83c6
+	.4byte	.LVL630
+	.4byte	0x842d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -28350,47 +28376,47 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF572
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xaa
-	.4byte	.LFB344
-	.4byte	.LFE344-.LFB344
+	.4byte	.LFB345
+	.4byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x26a4
 	.uleb128 0x2c
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0x128
-	.4byte	.LLST162
+	.4byte	.LLST164
 	.uleb128 0x2c
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST163
+	.4byte	.LLST165
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST164
+	.4byte	.LLST166
 	.uleb128 0x2c
 	.4byte	.LASF573
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb5
-	.4byte	.LLST165
+	.4byte	.LLST167
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST166
+	.4byte	.LLST168
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28398,13 +28424,13 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
-	.4byte	.LLST167
+	.4byte	.LLST169
 	.uleb128 0x29
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28412,34 +28438,34 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x71
+	.byte	0x75
 	.4byte	0xb5
-	.4byte	.LLST168
+	.4byte	.LLST170
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0x72
+	.byte	0x76
 	.4byte	0x19f9
-	.4byte	.LLST169
+	.4byte	.LLST171
 	.uleb128 0x3d
 	.4byte	.LASF574
 	.4byte	0x26b4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.10324
+	.4byte	__func__.10327
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x88
 	.4byte	0x264b
 	.uleb128 0x29
 	.4byte	.LASF575
 	.byte	0x1
-	.byte	0x8d
+	.byte	0x91
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL616
+	.4byte	.LVL618
 	.4byte	0x26b9
 	.4byte	0x2609
 	.uleb128 0x2e
@@ -28461,8 +28487,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL617
-	.4byte	0x9222
+	.4byte	.LVL619
+	.4byte	0x9289
 	.4byte	0x2620
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28472,8 +28498,8 @@ __func__.9940:
 	.4byte	.LC79
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL618
-	.4byte	0x9222
+	.4byte	.LVL620
+	.4byte	0x9289
 	.4byte	0x2637
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28483,8 +28509,8 @@ __func__.9940:
 	.4byte	.LC80
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL619
-	.4byte	0x9222
+	.4byte	.LVL621
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28494,8 +28520,8 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL609
-	.4byte	0x9222
+	.4byte	.LVL611
+	.4byte	0x9289
 	.4byte	0x2671
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28514,11 +28540,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x76
+	.byte	0x7a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL610
-	.4byte	0x83c6
+	.4byte	.LVL612
+	.4byte	0x842d
 	.4byte	0x2693
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28539,12 +28565,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL611
+	.4byte	.LVL613
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL613
+	.4byte	.LVL615
 	.uleb128 0x2
 	.byte	0x7b
 	.sleb128 0
@@ -28561,42 +28587,42 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF576
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xaa
-	.4byte	.LFB343
-	.4byte	.LFE343-.LFB343
+	.4byte	.LFB344
+	.4byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x27b7
 	.uleb128 0x2c
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0x128
-	.4byte	.LLST151
+	.4byte	.LLST153
 	.uleb128 0x2c
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST152
+	.4byte	.LLST154
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb5
-	.4byte	.LLST153
+	.4byte	.LLST155
 	.uleb128 0x3a
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
 	.uleb128 0x1
 	.byte	0x55
 	.uleb128 0x3a
 	.ascii	"cs\000"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28604,13 +28630,13 @@ __func__.9940:
 	.uleb128 0x30
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
-	.4byte	.LLST154
+	.4byte	.LLST156
 	.uleb128 0x29
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28618,7 +28644,7 @@ __func__.9940:
 	.uleb128 0x29
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x53
+	.byte	0x57
 	.4byte	0xb5
 	.uleb128 0x2
 	.byte	0x91
@@ -28626,7 +28652,7 @@ __func__.9940:
 	.uleb128 0x3a
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0x54
+	.byte	0x58
 	.4byte	0x19f9
 	.uleb128 0x4
 	.byte	0xf3
@@ -28638,10 +28664,10 @@ __func__.9940:
 	.4byte	0x26b4
 	.uleb128 0x5
 	.byte	0x3
-	.4byte	__func__.10307
+	.4byte	__func__.10310
 	.uleb128 0x32
-	.4byte	.LVL566
-	.4byte	0x9222
+	.4byte	.LVL568
+	.4byte	0x9289
 	.4byte	0x2784
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28660,11 +28686,11 @@ __func__.9940:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x58
+	.byte	0x5c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL567
-	.4byte	0x83c6
+	.4byte	.LVL569
+	.4byte	0x842d
 	.4byte	0x27a6
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28685,140 +28711,140 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x3f
-	.4byte	.LVL568
+	.4byte	.LVL570
 	.uleb128 0x2
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3f
-	.4byte	.LVL570
+	.4byte	.LVL572
 	.uleb128 0x2
 	.byte	0x76
 	.sleb128 0
 	.byte	0
 	.uleb128 0x40
-	.4byte	.LASF883
+	.4byte	.LASF885
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xb5
 	.byte	0x1
 	.4byte	0x2836
 	.uleb128 0x41
 	.ascii	"req\000"
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0x19f9
 	.uleb128 0x36
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x36
 	.4byte	.LASF578
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe2f
 	.uleb128 0x37
 	.4byte	.LASF579
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF580
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF285
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF286
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0x9f
 	.uleb128 0x37
 	.4byte	.LASF581
 	.byte	0x1
-	.byte	0x3a
+	.byte	0x3e
 	.4byte	0xb5
 	.uleb128 0x37
 	.4byte	.LASF277
 	.byte	0x1
-	.byte	0x3b
+	.byte	0x3f
 	.4byte	0xb5
 	.uleb128 0x37
 	.4byte	.LASF582
 	.byte	0x1
-	.byte	0x3c
+	.byte	0x40
 	.4byte	0xb5
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF619
+	.4byte	.LASF585
 	.byte	0x1
-	.byte	0x1c
-	.4byte	.LFB341
-	.4byte	.LFE341-.LFB341
+	.byte	0x20
+	.4byte	.LFB342
+	.4byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2922
 	.uleb128 0x2f
 	.ascii	"s\000"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0xf6
-	.4byte	.LLST142
+	.4byte	.LLST144
 	.uleb128 0x2f
 	.ascii	"buf\000"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x128
-	.4byte	.LLST143
+	.4byte	.LLST145
 	.uleb128 0x2c
 	.4byte	.LASF583
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST144
+	.4byte	.LLST146
 	.uleb128 0x2f
 	.ascii	"len\000"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x50
-	.4byte	.LLST145
+	.4byte	.LLST147
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST146
+	.4byte	.LLST148
 	.uleb128 0x3b
 	.ascii	"j\000"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb5
-	.4byte	.LLST147
+	.4byte	.LLST149
 	.uleb128 0x3b
 	.ascii	"p8\000"
 	.byte	0x1
-	.byte	0x1f
+	.byte	0x23
 	.4byte	0xf6
-	.4byte	.LLST148
+	.4byte	.LLST150
 	.uleb128 0x3b
 	.ascii	"p16\000"
 	.byte	0x1
-	.byte	0x20
+	.byte	0x24
 	.4byte	0x2922
-	.4byte	.LLST149
+	.4byte	.LLST151
 	.uleb128 0x3b
 	.ascii	"p32\000"
 	.byte	0x1
-	.byte	0x21
+	.byte	0x25
 	.4byte	0xe2f
-	.4byte	.LLST150
+	.4byte	.LLST152
 	.uleb128 0x43
-	.4byte	.LVL555
-	.4byte	0x9222
+	.4byte	.LVL557
+	.4byte	0x9289
 	.4byte	0x28e2
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28828,8 +28854,8 @@ __func__.9940:
 	.4byte	.LC78
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL556
-	.4byte	0x9222
+	.4byte	.LVL558
+	.4byte	0x9289
 	.4byte	0x2905
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -28851,11 +28877,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL558
-	.4byte	0x9222
-	.uleb128 0x34
 	.4byte	.LVL560
-	.4byte	0x9222
+	.4byte	0x9289
+	.uleb128 0x34
+	.4byte	.LVL562
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28870,22 +28896,22 @@ __func__.9940:
 	.uleb128 0x2b
 	.4byte	.LASF584
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x128
-	.4byte	.LFB340
-	.4byte	.LFE340-.LFB340
+	.4byte	.LFB341
+	.4byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2967
 	.uleb128 0x2c
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x50
-	.4byte	.LLST141
+	.4byte	.LLST143
 	.uleb128 0x2d
-	.4byte	.LVL550
-	.4byte	0x922d
+	.4byte	.LVL552
+	.4byte	0x9294
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28900,8 +28926,57 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF586
+	.byte	0x1
+	.byte	0x17
+	.4byte	.LFB340
+	.4byte	.LFE340-.LFB340
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x29b6
+	.uleb128 0x2f
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x128
+	.4byte	.LLST141
 	.uleb128 0x45
-	.4byte	.LASF585
+	.4byte	0x29b6
+	.4byte	.LBB221
+	.4byte	.LBE221-.LBB221
+	.byte	0x1
+	.byte	0x19
+	.uleb128 0x46
+	.4byte	0x29c2
+	.4byte	.LLST142
+	.uleb128 0x2d
+	.4byte	.LVL550
+	.4byte	0x929f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF886
+	.byte	0x6
+	.byte	0x4e
+	.byte	0x3
+	.4byte	0x29ce
+	.uleb128 0x36
+	.4byte	.LASF587
+	.byte	0x6
+	.byte	0x4e
+	.4byte	0x16b
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF588
 	.byte	0x5
 	.2byte	0x2f8
 	.4byte	0xb5
@@ -28909,10 +28984,10 @@ __func__.9940:
 	.4byte	.LFE323-.LFB323
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2996
+	.4byte	0x29fd
 	.uleb128 0x2d
-	.4byte	.LVL1812
-	.4byte	0x2996
+	.4byte	.LVL1814
+	.4byte	0x29fd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -28925,88 +29000,88 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF587
+	.uleb128 0x49
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2a63
-	.uleb128 0x47
-	.4byte	.LASF588
+	.4byte	0x2aca
+	.uleb128 0x4a
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
-	.uleb128 0x47
-	.4byte	.LASF589
+	.uleb128 0x4a
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF590
+	.uleb128 0x4b
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdba
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"lpa\000"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdc5
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF591
+	.uleb128 0x4b
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdba
-	.uleb128 0x48
+	.uleb128 0x4b
 	.4byte	.LASF299
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF592
+	.uleb128 0x4b
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF593
+	.uleb128 0x4b
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF594
+	.uleb128 0x4b
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF595
+	.uleb128 0x4b
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF596
+	.uleb128 0x4b
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2a63
-	.uleb128 0x4a
-	.4byte	.LASF597
+	.4byte	0x2aca
+	.uleb128 0x4d
+	.4byte	.LASF600
 	.byte	0x5
 	.2byte	0x276
-	.uleb128 0x4a
-	.4byte	.LASF598
+	.uleb128 0x4d
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x279
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x2a79
-	.4byte	.LASF587
-	.uleb128 0x4c
-	.uleb128 0x48
-	.4byte	.LASF599
+	.4byte	0x2ae0
+	.4byte	.LASF590
+	.uleb128 0x4f
+	.uleb128 0x4b
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdba
@@ -29017,97 +29092,97 @@ __func__.9940:
 	.4byte	0x1229
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x2a79
+	.4byte	0x2ae0
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2a69
-	.uleb128 0x46
-	.4byte	.LASF600
+	.4byte	0x2ad0
+	.uleb128 0x49
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2ade
-	.uleb128 0x49
+	.4byte	0x2b45
+	.uleb128 0x4c
 	.ascii	"ret\000"
 	.byte	0x5
 	.2byte	0x1a4
 	.4byte	0x50
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x1a5
 	.4byte	0x50
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x5
 	.2byte	0x1a6
 	.4byte	0xdc5
-	.uleb128 0x48
+	.uleb128 0x4b
 	.4byte	.LASF565
 	.byte	0x5
 	.2byte	0x1a7
 	.4byte	0x2454
-	.uleb128 0x4d
-	.4byte	0x2acf
-	.uleb128 0x48
-	.4byte	.LASF601
+	.uleb128 0x50
+	.4byte	0x2b36
+	.uleb128 0x4b
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xde6
 	.byte	0
-	.uleb128 0x4c
-	.uleb128 0x48
-	.4byte	.LASF602
+	.uleb128 0x4f
+	.uleb128 0x4b
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdc5
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF603
+	.uleb128 0x49
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x2b28
-	.uleb128 0x47
-	.4byte	.LASF604
+	.4byte	0x2b8f
+	.uleb128 0x4a
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF592
+	.uleb128 0x4b
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdba
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdba
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"j\000"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdba
-	.uleb128 0x48
+	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x189
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF714
+	.uleb128 0x51
+	.4byte	.LASF715
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x50
 	.byte	0x1
-	.uleb128 0x45
-	.4byte	.LASF605
+	.uleb128 0x48
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x50
@@ -29115,29 +29190,29 @@ __func__.9940:
 	.4byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2bbf
-	.uleb128 0x4f
+	.4byte	0x2c26
+	.uleb128 0x52
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdba
 	.4byte	.LLST138
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdba
 	.4byte	.LLST139
-	.uleb128 0x51
-	.4byte	.LASF606
+	.uleb128 0x54
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdba
 	.4byte	.LLST140
 	.uleb128 0x32
 	.4byte	.LVL537
-	.4byte	0x6122
-	.4byte	0x2b91
+	.4byte	0x6189
+	.4byte	0x2bf8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29147,8 +29222,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL539
-	.4byte	0x9222
-	.4byte	0x2bae
+	.4byte	0x9289
+	.4byte	0x2c15
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29164,7 +29239,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL540
-	.4byte	0x2bbf
+	.4byte	0x2c26
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29173,8 +29248,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF607
+	.uleb128 0x48
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x50
@@ -29182,16 +29257,16 @@ __func__.9940:
 	.4byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2c03
-	.uleb128 0x4f
-	.4byte	.LASF608
+	.4byte	0x2c6a
+	.uleb128 0x52
+	.4byte	.LASF587
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdba
 	.4byte	.LLST137
 	.uleb128 0x34
 	.4byte	.LVL535
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29206,8 +29281,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF609
+	.uleb128 0x48
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdc5
@@ -29215,23 +29290,23 @@ __func__.9940:
 	.4byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2ca7
-	.uleb128 0x50
+	.4byte	0x2d0e
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdba
-	.4byte	.LLST394
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	.LLST396
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2a63
-	.4byte	.LLST395
+	.4byte	0x2aca
+	.4byte	.LLST397
 	.uleb128 0x32
-	.4byte	.LVL1697
+	.4byte	.LVL1699
 	.4byte	0x251a
-	.4byte	0x2c55
+	.4byte	0x2cbc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -29246,9 +29321,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1698
-	.4byte	0x3183
-	.4byte	0x2c6f
+	.4byte	.LVL1700
+	.4byte	0x31ea
+	.4byte	0x2cd6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29263,9 +29338,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1699
-	.4byte	0x2edb
-	.4byte	0x2c82
+	.4byte	.LVL1701
+	.4byte	0x2f42
+	.4byte	0x2ce9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29273,20 +29348,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1701
-	.4byte	0x6828
-	.uleb128 0x44
-	.4byte	.LVL1702
-	.4byte	0x65f0
-	.uleb128 0x44
 	.4byte	.LVL1703
-	.4byte	0x2e94
+	.4byte	0x688f
+	.uleb128 0x44
+	.4byte	.LVL1704
+	.4byte	0x6657
 	.uleb128 0x44
 	.4byte	.LVL1705
-	.4byte	0x308c
+	.4byte	0x2efb
+	.uleb128 0x44
+	.4byte	.LVL1707
+	.4byte	0x30f3
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF610
+	.uleb128 0x48
+	.4byte	.LASF612
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdc5
@@ -29294,14 +29369,14 @@ __func__.9940:
 	.4byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2d2c
+	.4byte	0x2d93
 	.uleb128 0x44
-	.4byte	.LVL1706
-	.4byte	0x6e77
+	.4byte	.LVL1708
+	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1707
-	.4byte	0x2edb
-	.4byte	0x2cde
+	.4byte	.LVL1709
+	.4byte	0x2f42
+	.4byte	0x2d45
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29310,9 +29385,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1708
-	.4byte	0x34ac
-	.4byte	0x2cf2
+	.4byte	.LVL1710
+	.4byte	0x3513
+	.4byte	0x2d59
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29321,12 +29396,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1709
-	.4byte	0x5313
+	.4byte	.LVL1711
+	.4byte	0x537a
 	.uleb128 0x32
-	.4byte	.LVL1710
-	.4byte	0x4f7f
-	.4byte	0x2d0f
+	.4byte	.LVL1712
+	.4byte	0x4fe6
+	.4byte	0x2d76
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29335,11 +29410,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1711
-	.4byte	0x4d0e
+	.4byte	.LVL1713
+	.4byte	0x4d75
 	.uleb128 0x2d
-	.4byte	.LVL1712
-	.4byte	0x32d7
+	.4byte	.LVL1714
+	.4byte	0x333e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29348,13 +29423,13 @@ __func__.9940:
 	.4byte	.LANCHOR53
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF670
+	.uleb128 0x55
+	.4byte	.LASF671
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF611
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
@@ -29362,99 +29437,99 @@ __func__.9940:
 	.4byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2e94
+	.4byte	0x2efb
 	.uleb128 0x2c
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x1d79
-	.4byte	.LLST269
+	.4byte	.LLST271
 	.uleb128 0x2c
-	.4byte	.LASF613
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdc5
-	.4byte	.LLST270
+	.4byte	.LLST272
 	.uleb128 0x30
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdba
-	.4byte	.LLST271
+	.4byte	.LLST273
 	.uleb128 0x30
 	.4byte	.LASF569
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdba
-	.4byte	.LLST272
+	.4byte	.LLST274
 	.uleb128 0x3b
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdba
-	.4byte	.LLST273
+	.4byte	.LLST275
 	.uleb128 0x30
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
-	.4byte	.LLST274
+	.4byte	.LLST276
 	.uleb128 0x30
 	.4byte	.LASF382
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
-	.4byte	.LLST275
+	.4byte	.LLST277
 	.uleb128 0x30
 	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdba
-	.4byte	.LLST276
+	.4byte	.LLST278
 	.uleb128 0x30
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdc5
-	.4byte	.LLST277
+	.4byte	.LLST279
 	.uleb128 0x30
-	.4byte	.LASF615
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdc5
-	.4byte	.LLST278
-	.uleb128 0x53
-	.4byte	.LASF616
+	.4byte	.LLST280
+	.uleb128 0x56
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdc5
 	.sleb128 -1
 	.uleb128 0x30
-	.4byte	.LASF596
+	.4byte	.LASF599
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2a63
-	.4byte	.LLST279
-	.uleb128 0x54
-	.4byte	.LASF617
+	.4byte	0x2aca
+	.4byte	.LLST281
+	.uleb128 0x57
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe1
-	.uleb128 0x54
-	.4byte	.LASF618
+	.uleb128 0x57
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xe5
-	.uleb128 0x55
-	.4byte	.LASF688
+	.uleb128 0x58
+	.4byte	.LASF689
 	.byte	0x5
 	.2byte	0x117
-	.4byte	.L976
+	.4byte	.L977
 	.uleb128 0x44
-	.4byte	.LVL1098
-	.4byte	0x2e94
+	.4byte	.LVL1100
+	.4byte	0x2efb
 	.uleb128 0x32
-	.4byte	.LVL1107
+	.4byte	.LVL1109
 	.4byte	0x26b9
-	.4byte	0x2e43
+	.4byte	0x2eaa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29476,9 +29551,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1120
-	.4byte	0x615a
-	.4byte	0x2e5e
+	.4byte	.LVL1122
+	.4byte	0x61c1
+	.4byte	0x2ec5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29494,9 +29569,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1126
-	.4byte	0x468d
-	.4byte	0x2e78
+	.4byte	.LVL1128
+	.4byte	0x46f4
+	.4byte	0x2edf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29511,28 +29586,28 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1129
-	.4byte	0x308c
-	.uleb128 0x44
-	.4byte	.LVL1133
-	.4byte	0x5d9a
+	.4byte	.LVL1131
+	.4byte	0x30f3
 	.uleb128 0x44
 	.4byte	.LVL1135
-	.4byte	0x2e94
+	.4byte	0x5e01
+	.uleb128 0x44
+	.4byte	.LVL1137
+	.4byte	0x2efb
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF620
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0xc9
 	.4byte	.LFB312
 	.4byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2edb
+	.4byte	0x2f42
 	.uleb128 0x32
-	.4byte	.LVL1093
+	.4byte	.LVL1095
 	.4byte	0x230c
-	.4byte	0x2ebd
+	.4byte	0x2f24
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29541,9 +29616,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1094
+	.4byte	.LVL1096
 	.4byte	0x230c
-	.4byte	0x2ed1
+	.4byte	0x2f38
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29551,12 +29626,12 @@ __func__.9940:
 	.byte	0x8
 	.byte	0xff
 	.byte	0
-	.uleb128 0x56
-	.4byte	.LVL1095
-	.4byte	0x31cf
+	.uleb128 0x59
+	.4byte	.LVL1097
+	.4byte	0x3236
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF621
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
@@ -29564,27 +29639,27 @@ __func__.9940:
 	.4byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3077
+	.4byte	0x30de
 	.uleb128 0x2c
-	.4byte	.LASF622
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x50
-	.4byte	.LLST389
+	.4byte	.LLST391
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST390
+	.4byte	.LLST392
 	.uleb128 0x30
-	.4byte	.LASF623
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdba
-	.4byte	.LLST391
+	.4byte	.LLST393
 	.uleb128 0x29
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdc5
@@ -29592,13 +29667,13 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -36
 	.uleb128 0x30
-	.4byte	.LASF625
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdc5
-	.4byte	.LLST392
+	.4byte	.LLST394
 	.uleb128 0x29
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0x74
 	.4byte	0x1d79
@@ -29607,21 +29682,21 @@ __func__.9940:
 	.4byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x30
-	.4byte	.LASF626
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x75
 	.4byte	0x1db2
-	.4byte	.LLST393
+	.4byte	.LLST395
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3087
+	.4byte	0x30ee
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9940
 	.uleb128 0x32
-	.4byte	.LVL1660
-	.4byte	0x2d35
-	.4byte	0x2f80
+	.4byte	.LVL1662
+	.4byte	0x2d9c
+	.4byte	0x2fe7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29630,9 +29705,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1661
-	.4byte	0x4f7f
-	.4byte	0x2f93
+	.4byte	.LVL1663
+	.4byte	0x4fe6
+	.4byte	0x2ffa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29640,18 +29715,18 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1662
-	.4byte	0x6828
+	.4byte	.LVL1664
+	.4byte	0x688f
 	.uleb128 0x44
-	.4byte	.LVL1663
-	.4byte	0x65f0
+	.4byte	.LVL1665
+	.4byte	0x6657
 	.uleb128 0x44
-	.4byte	.LVL1667
-	.4byte	0x6e77
+	.4byte	.LVL1669
+	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1668
-	.4byte	0x9222
-	.4byte	0x2fd4
+	.4byte	.LVL1670
+	.4byte	0x9289
+	.4byte	0x303b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29672,9 +29747,9 @@ __func__.9940:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1670
-	.4byte	0x31f2
-	.4byte	0x2fe8
+	.4byte	.LVL1672
+	.4byte	0x3259
+	.4byte	0x304f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29683,18 +29758,18 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1671
-	.4byte	0x5d75
-	.uleb128 0x44
 	.4byte	.LVL1673
-	.4byte	0x5313
+	.4byte	0x5ddc
 	.uleb128 0x44
-	.4byte	.LVL1674
-	.4byte	0x4d0e
+	.4byte	.LVL1675
+	.4byte	0x537a
+	.uleb128 0x44
+	.4byte	.LVL1676
+	.4byte	0x4d75
 	.uleb128 0x32
-	.4byte	.LVL1677
-	.4byte	0x9222
-	.4byte	0x3029
+	.4byte	.LVL1679
+	.4byte	0x9289
+	.4byte	0x3090
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29715,9 +29790,9 @@ __func__.9940:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1678
-	.4byte	0x5212
-	.4byte	0x3042
+	.4byte	.LVL1680
+	.4byte	0x5279
+	.4byte	0x30a9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29731,12 +29806,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1679
-	.4byte	0x6122
-	.uleb128 0x32
 	.4byte	.LVL1681
-	.4byte	0x5212
-	.4byte	0x3064
+	.4byte	0x6189
+	.uleb128 0x32
+	.4byte	.LVL1683
+	.4byte	0x5279
+	.4byte	0x30cb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -29750,32 +29825,32 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1683
-	.4byte	0x31f2
+	.4byte	.LVL1685
+	.4byte	0x3259
 	.uleb128 0x44
-	.4byte	.LVL1687
-	.4byte	0x5d9a
+	.4byte	.LVL1689
+	.4byte	0x5e01
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3087
+	.4byte	0x30ee
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3077
+	.4byte	0x30de
 	.uleb128 0x42
-	.4byte	.LASF627
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.4byte	.LFB310
 	.4byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3101
+	.4byte	0x3168
 	.uleb128 0x2c
-	.4byte	.LASF628
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdc5
@@ -29793,7 +29868,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST134
 	.uleb128 0x30
-	.4byte	.LASF629
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdba
@@ -29806,7 +29881,7 @@ __func__.9940:
 	.4byte	.LLST136
 	.uleb128 0x34
 	.4byte	.LVL527
-	.4byte	0x6122
+	.4byte	0x6189
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29822,7 +29897,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF630
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdc5
@@ -29830,7 +29905,7 @@ __func__.9940:
 	.4byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3137
+	.4byte	0x319e
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x5
@@ -29845,23 +29920,23 @@ __func__.9940:
 	.4byte	.LLST131
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF631
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.4byte	.LFB308
 	.4byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3183
-	.uleb128 0x57
+	.4byte	0x31ea
+	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x38
 	.4byte	0x19f9
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x58
-	.4byte	.LASF632
+	.uleb128 0x5b
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdc5
@@ -29874,30 +29949,30 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST128
 	.uleb128 0x30
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdba
 	.4byte	.LLST129
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF634
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x29
 	.4byte	.LFB307
 	.4byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31cf
-	.uleb128 0x57
+	.4byte	0x3236
+	.uleb128 0x5a
 	.ascii	"req\000"
 	.byte	0x5
 	.byte	0x29
 	.4byte	0x19f9
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x58
-	.4byte	.LASF632
+	.uleb128 0x5b
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdc5
@@ -29910,21 +29985,21 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST126
 	.uleb128 0x30
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdba
 	.4byte	.LLST127
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF635
+	.4byte	.LASF636
 	.byte	0x5
 	.byte	0x15
 	.4byte	.LFB306
 	.4byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x31f2
+	.4byte	0x3259
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x5
@@ -29932,8 +30007,8 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST125
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF636
+	.uleb128 0x48
+	.4byte	.LASF637
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0x50
@@ -29941,29 +30016,29 @@ __func__.9940:
 	.4byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3282
-	.uleb128 0x4f
-	.4byte	.LASF623
+	.4byte	0x32e9
+	.uleb128 0x52
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0xdba
-	.4byte	.LLST307
-	.uleb128 0x50
+	.4byte	.LLST309
+	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x2
 	.2byte	0xa95
 	.4byte	0x50
-	.4byte	.LLST308
+	.4byte	.LLST310
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3292
+	.4byte	0x32f9
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9870
 	.uleb128 0x32
-	.4byte	.LVL1257
-	.4byte	0x9222
-	.4byte	0x3258
+	.4byte	.LVL1259
+	.4byte	0x9289
+	.4byte	0x32bf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29978,9 +30053,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1261
-	.4byte	0x9222
-	.4byte	0x3278
+	.4byte	.LVL1263
+	.4byte	0x9289
+	.4byte	0x32df
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -29995,46 +30070,46 @@ __func__.9940:
 	.4byte	.LANCHOR160
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1264
-	.4byte	0x3297
+	.4byte	.LVL1266
+	.4byte	0x32fe
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3292
+	.4byte	0x32f9
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3282
-	.uleb128 0x46
-	.4byte	.LASF637
+	.4byte	0x32e9
+	.uleb128 0x49
+	.4byte	.LASF638
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x32c2
-	.uleb128 0x47
-	.4byte	.LASF623
+	.4byte	0x3329
+	.uleb128 0x4a
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0xdba
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x32d2
-	.4byte	.LASF637
+	.4byte	0x3339
+	.4byte	.LASF638
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x32c2
-	.uleb128 0x45
-	.4byte	.LASF638
+	.4byte	0x3329
+	.uleb128 0x48
+	.4byte	.LASF639
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0xdc5
@@ -30042,35 +30117,35 @@ __func__.9940:
 	.4byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x33c9
-	.uleb128 0x4f
-	.4byte	.LASF639
+	.4byte	0x3430
+	.uleb128 0x52
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0x1d79
 	.4byte	.LLST122
-	.uleb128 0x51
-	.4byte	.LASF594
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0xa60
 	.4byte	0xdba
 	.4byte	.LLST123
-	.uleb128 0x51
-	.4byte	.LASF640
+	.uleb128 0x54
+	.4byte	.LASF641
 	.byte	0x2
 	.2byte	0xa61
 	.4byte	0xdc5
 	.4byte	.LLST124
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3087
+	.4byte	0x30ee
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9850
 	.uleb128 0x32
 	.4byte	.LVL490
-	.4byte	0x9222
-	.4byte	0x3357
+	.4byte	0x9289
+	.4byte	0x33be
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30092,8 +30167,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL491
-	.4byte	0x9222
-	.4byte	0x337e
+	.4byte	0x9289
+	.4byte	0x33e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30115,8 +30190,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL492
-	.4byte	0x9222
-	.4byte	0x33a5
+	.4byte	0x9289
+	.4byte	0x340c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30138,7 +30213,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL496
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30159,8 +30234,8 @@ __func__.9940:
 	.2byte	0xa7a
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF641
+	.uleb128 0x48
+	.4byte	.LASF642
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x50
@@ -30168,15 +30243,15 @@ __func__.9940:
 	.4byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3497
-	.uleb128 0x4f
-	.4byte	.LASF639
+	.4byte	0x34fe
+	.uleb128 0x52
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x1d79
-	.4byte	.LLST374
+	.4byte	.LLST376
 	.uleb128 0x28
-	.4byte	.LASF623
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa48
 	.4byte	0xdba
@@ -30184,14 +30259,14 @@ __func__.9940:
 	.byte	0x54
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x34a7
+	.4byte	0x350e
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9843
 	.uleb128 0x32
-	.4byte	.LVL1593
-	.4byte	0x9222
-	.4byte	0x3437
+	.4byte	.LVL1595
+	.4byte	0x9289
+	.4byte	0x349e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30212,9 +30287,9 @@ __func__.9940:
 	.2byte	0xa49
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1594
-	.4byte	0x5d75
-	.4byte	0x344b
+	.4byte	.LVL1596
+	.4byte	0x5ddc
+	.4byte	0x34b2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30223,12 +30298,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1595
-	.4byte	0x3297
+	.4byte	.LVL1597
+	.4byte	0x32fe
 	.uleb128 0x32
-	.4byte	.LVL1596
-	.4byte	0x34ac
-	.4byte	0x3468
+	.4byte	.LVL1598
+	.4byte	0x3513
+	.4byte	0x34cf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30237,12 +30312,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1597
-	.4byte	0x5313
+	.4byte	.LVL1599
+	.4byte	0x537a
 	.uleb128 0x32
-	.4byte	.LVL1598
-	.4byte	0x4f7f
-	.4byte	0x3484
+	.4byte	.LVL1600
+	.4byte	0x4fe6
+	.4byte	0x34eb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30250,23 +30325,23 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1599
-	.4byte	0x4d0e
-	.uleb128 0x44
 	.4byte	.LVL1601
-	.4byte	0x5d9a
+	.4byte	0x4d75
+	.uleb128 0x44
+	.4byte	.LVL1603
+	.4byte	0x5e01
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x34a7
+	.4byte	0x350e
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3497
-	.uleb128 0x59
-	.4byte	.LASF642
+	.4byte	0x34fe
+	.uleb128 0x5c
+	.4byte	.LASF643
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x50
@@ -30274,80 +30349,80 @@ __func__.9940:
 	.4byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3747
-	.uleb128 0x5a
+	.4byte	0x37ae
+	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x1d79
-	.4byte	.LLST292
-	.uleb128 0x51
-	.4byte	.LASF643
+	.4byte	.LLST294
+	.uleb128 0x54
+	.4byte	.LASF644
 	.byte	0x2
 	.2byte	0x9e4
 	.4byte	0xdba
-	.4byte	.LLST293
-	.uleb128 0x48
-	.4byte	.LASF592
+	.4byte	.LLST295
+	.uleb128 0x4b
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.4byte	.LLST294
-	.uleb128 0x50
+	.4byte	.LLST296
+	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.4byte	.LLST295
-	.uleb128 0x51
-	.4byte	.LASF594
+	.4byte	.LLST297
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdba
-	.4byte	.LLST296
-	.uleb128 0x51
-	.4byte	.LASF644
+	.4byte	.LLST298
+	.uleb128 0x54
+	.4byte	.LASF645
 	.byte	0x2
 	.2byte	0x9e6
 	.4byte	0x50
-	.4byte	.LLST297
-	.uleb128 0x51
-	.4byte	.LASF645
+	.4byte	.LLST299
+	.uleb128 0x54
+	.4byte	.LASF646
 	.byte	0x2
 	.2byte	0x9e7
 	.4byte	0xdba
-	.4byte	.LLST298
-	.uleb128 0x4a
-	.4byte	.LASF646
+	.4byte	.LLST300
+	.uleb128 0x4d
+	.4byte	.LASF647
 	.byte	0x2
 	.2byte	0x9e8
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3757
+	.4byte	0x37be
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9822
-	.uleb128 0x5b
-	.4byte	0x4ad9
-	.4byte	.LBB243
+	.uleb128 0x5e
+	.4byte	0x4b40
+	.4byte	.LBB247
 	.4byte	.Ldebug_ranges0+0xd0
 	.byte	0x2
 	.2byte	0xa18
-	.4byte	0x3593
-	.uleb128 0x5c
-	.4byte	0x4af2
-	.4byte	.LLST299
-	.uleb128 0x5c
-	.4byte	0x4ae6
-	.4byte	.LLST300
+	.4byte	0x35fa
+	.uleb128 0x46
+	.4byte	0x4b59
+	.4byte	.LLST301
+	.uleb128 0x46
+	.4byte	0x4b4d
+	.4byte	.LLST302
 	.uleb128 0x34
-	.4byte	.LVL1213
-	.4byte	0x8420
+	.4byte	.LVL1215
+	.4byte	0x8487
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30355,15 +30430,15 @@ __func__.9940:
 	.byte	0x77
 	.sleb128 0
 	.uleb128 0x3c
-	.4byte	0x4af2
+	.4byte	0x4b59
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1184
-	.4byte	0x9222
-	.4byte	0x35ba
+	.4byte	.LVL1186
+	.4byte	0x9289
+	.4byte	0x3621
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30384,9 +30459,9 @@ __func__.9940:
 	.2byte	0x9e9
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1188
-	.4byte	0x5b5f
-	.4byte	0x35d1
+	.4byte	.LVL1190
+	.4byte	0x5bc6
+	.4byte	0x3638
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30395,9 +30470,9 @@ __func__.9940:
 	.4byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1190
-	.4byte	0x9222
-	.4byte	0x35f8
+	.4byte	.LVL1192
+	.4byte	0x9289
+	.4byte	0x365f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30418,9 +30493,9 @@ __func__.9940:
 	.2byte	0x9f2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1191
-	.4byte	0x3ec7
-	.4byte	0x360c
+	.4byte	.LVL1193
+	.4byte	0x3f2e
+	.4byte	0x3673
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30429,9 +30504,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1192
-	.4byte	0x5d75
-	.4byte	0x3620
+	.4byte	.LVL1194
+	.4byte	0x5ddc
+	.4byte	0x3687
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30440,9 +30515,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1193
-	.4byte	0x9222
-	.4byte	0x3647
+	.4byte	.LVL1195
+	.4byte	0x9289
+	.4byte	0x36ae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30463,9 +30538,9 @@ __func__.9940:
 	.2byte	0x9fd
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1196
-	.4byte	0x9222
-	.4byte	0x366e
+	.4byte	.LVL1198
+	.4byte	0x9289
+	.4byte	0x36d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30486,9 +30561,9 @@ __func__.9940:
 	.2byte	0xa00
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1198
-	.4byte	0x9222
-	.4byte	0x3695
+	.4byte	.LVL1200
+	.4byte	0x9289
+	.4byte	0x36fc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30509,9 +30584,9 @@ __func__.9940:
 	.2byte	0xa0b
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1199
-	.4byte	0x9222
-	.4byte	0x36bc
+	.4byte	.LVL1201
+	.4byte	0x9289
+	.4byte	0x3723
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30532,9 +30607,9 @@ __func__.9940:
 	.2byte	0xa0d
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1200
-	.4byte	0x4ad9
-	.4byte	0x36d5
+	.4byte	.LVL1202
+	.4byte	0x4b40
+	.4byte	0x373c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30548,9 +30623,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1204
+	.4byte	.LVL1206
 	.4byte	0x2464
-	.4byte	0x36e9
+	.4byte	0x3750
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x52
@@ -30559,9 +30634,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1206
-	.4byte	0x38bf
-	.4byte	0x36fd
+	.4byte	.LVL1208
+	.4byte	0x3926
+	.4byte	0x3764
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30570,12 +30645,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1207
-	.4byte	0x65f0
+	.4byte	.LVL1209
+	.4byte	0x6657
 	.uleb128 0x32
-	.4byte	.LVL1208
-	.4byte	0x5d75
-	.4byte	0x371a
+	.4byte	.LVL1210
+	.4byte	0x5ddc
+	.4byte	0x3781
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30584,11 +30659,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1218
-	.4byte	0x6828
+	.4byte	.LVL1220
+	.4byte	0x688f
 	.uleb128 0x34
-	.4byte	.LVL1222
-	.4byte	0x9222
+	.4byte	.LVL1224
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30611,28 +30686,28 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3757
+	.4byte	0x37be
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3747
-	.uleb128 0x46
-	.4byte	.LASF647
+	.4byte	0x37ae
+	.uleb128 0x49
+	.4byte	.LASF648
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x377a
-	.uleb128 0x47
-	.4byte	.LASF623
+	.4byte	0x37e1
+	.uleb128 0x4a
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF648
+	.uleb128 0x5c
+	.4byte	.LASF649
 	.byte	0x2
 	.2byte	0x98e
 	.4byte	0xdba
@@ -30640,44 +30715,44 @@ __func__.9940:
 	.4byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x383b
-	.uleb128 0x51
-	.4byte	.LASF649
+	.4byte	0x38a2
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x990
 	.4byte	0xdba
 	.4byte	.LLST113
-	.uleb128 0x51
-	.4byte	.LASF650
+	.uleb128 0x54
+	.4byte	.LASF651
 	.byte	0x2
 	.2byte	0x991
 	.4byte	0xdba
 	.4byte	.LLST114
-	.uleb128 0x51
-	.4byte	.LASF651
+	.uleb128 0x54
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x992
 	.4byte	0xdba
 	.4byte	.LLST115
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x993
 	.4byte	0x1cc9
 	.4byte	.LLST116
-	.uleb128 0x51
-	.4byte	.LASF653
+	.uleb128 0x54
+	.4byte	.LASF654
 	.byte	0x2
 	.2byte	0x994
 	.4byte	0xdba
 	.4byte	.LLST117
-	.uleb128 0x51
-	.4byte	.LASF654
+	.uleb128 0x54
+	.4byte	.LASF655
 	.byte	0x2
 	.2byte	0x995
 	.4byte	0xdba
 	.4byte	.LLST118
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x996
@@ -30685,13 +30760,13 @@ __func__.9940:
 	.4byte	.LLST119
 	.uleb128 0x44
 	.4byte	.LVL470
-	.4byte	0x383b
+	.4byte	0x38a2
 	.uleb128 0x44
 	.4byte	.LVL476
-	.4byte	0x3894
+	.4byte	0x38fb
 	.uleb128 0x34
 	.4byte	.LVL478
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30719,8 +30794,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF655
+	.uleb128 0x48
+	.4byte	.LASF656
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdba
@@ -30728,34 +30803,34 @@ __func__.9940:
 	.4byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3894
-	.uleb128 0x4f
+	.4byte	0x38fb
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdba
 	.4byte	.LLST102
-	.uleb128 0x51
-	.4byte	.LASF656
+	.uleb128 0x54
+	.4byte	.LASF657
 	.byte	0x2
 	.2byte	0x97b
 	.4byte	0xdba
 	.4byte	.LLST103
-	.uleb128 0x51
-	.4byte	.LASF608
+	.uleb128 0x54
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x97c
 	.4byte	0xdba
 	.4byte	.LLST104
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x97d
 	.4byte	0xdba
 	.4byte	.LLST105
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF657
+	.uleb128 0x48
+	.4byte	.LASF658
 	.byte	0x2
 	.2byte	0x970
 	.4byte	0xdba
@@ -30763,16 +30838,16 @@ __func__.9940:
 	.4byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38bf
-	.uleb128 0x51
-	.4byte	.LASF651
+	.4byte	0x3926
+	.uleb128 0x54
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x972
 	.4byte	0xdba
 	.4byte	.LLST101
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF658
+	.uleb128 0x5c
+	.4byte	.LASF659
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0x50
@@ -30780,26 +30855,26 @@ __func__.9940:
 	.4byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3937
-	.uleb128 0x4f
-	.4byte	.LASF623
+	.4byte	0x399e
+	.uleb128 0x52
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0xdba
 	.4byte	.LLST97
-	.uleb128 0x51
-	.4byte	.LASF592
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdba
 	.4byte	.LLST98
-	.uleb128 0x51
-	.4byte	.LASF594
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdba
 	.4byte	.LLST99
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x963
@@ -30807,8 +30882,8 @@ __func__.9940:
 	.4byte	.LLST100
 	.uleb128 0x32
 	.4byte	.LVL284
-	.4byte	0x6192
-	.4byte	0x392d
+	.4byte	0x61f9
+	.4byte	0x3994
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -30818,45 +30893,45 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL285
-	.4byte	0x67c5
+	.4byte	0x682c
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF659
+	.uleb128 0x49
+	.4byte	.LASF660
 	.byte	0x2
 	.2byte	0x901
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x3961
-	.uleb128 0x49
+	.4byte	0x39c8
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x903
 	.4byte	0x50
-	.uleb128 0x4c
-	.uleb128 0x48
-	.4byte	.LASF612
+	.uleb128 0x4f
+	.uleb128 0x4b
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x928
 	.4byte	0x1d79
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF660
+	.uleb128 0x5f
+	.4byte	.LASF661
 	.byte	0x2
 	.2byte	0x8e2
 	.4byte	.LFB294
 	.4byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3a30
-	.uleb128 0x5e
+	.4byte	0x3a97
+	.uleb128 0x60
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x8e4
 	.4byte	0x50
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x5e
+	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x8e5
@@ -30864,16 +30939,16 @@ __func__.9940:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
-	.uleb128 0x51
-	.4byte	.LASF661
+	.uleb128 0x54
+	.4byte	.LASF662
 	.byte	0x2
 	.2byte	0x8e6
-	.4byte	0x2a63
-	.4byte	.LLST237
+	.4byte	0x2aca
+	.4byte	.LLST239
 	.uleb128 0x32
-	.4byte	.LVL907
-	.4byte	0x9222
-	.4byte	0x39bf
+	.4byte	.LVL909
+	.4byte	0x9289
+	.4byte	0x3a26
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30888,9 +30963,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL909
-	.4byte	0x5212
-	.4byte	0x39de
+	.4byte	.LVL911
+	.4byte	0x5279
+	.4byte	0x3a45
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30910,9 +30985,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL910
-	.4byte	0x9222
-	.4byte	0x39f8
+	.4byte	.LVL912
+	.4byte	0x9289
+	.4byte	0x3a5f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30927,9 +31002,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL912
+	.4byte	.LVL914
 	.4byte	0x26b9
-	.4byte	0x3a16
+	.4byte	0x3a7d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30948,8 +31023,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL913
-	.4byte	0x9222
+	.4byte	.LVL915
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -30964,66 +31039,66 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF662
+	.uleb128 0x5f
+	.4byte	.LASF663
 	.byte	0x2
 	.2byte	0x8ae
 	.4byte	.LFB293
 	.4byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3b83
-	.uleb128 0x50
+	.4byte	0x3bea
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x8b0
 	.4byte	0xdba
-	.4byte	.LLST264
-	.uleb128 0x50
+	.4byte	.LLST266
+	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x8b1
 	.4byte	0xdc5
-	.4byte	.LLST265
+	.4byte	.LLST267
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x8b2
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
 	.2byte	0x8b3
 	.4byte	0xdba
-	.4byte	.LLST266
-	.uleb128 0x51
-	.4byte	.LASF664
+	.4byte	.LLST268
+	.uleb128 0x54
+	.4byte	.LASF665
 	.byte	0x2
 	.2byte	0x8b4
 	.4byte	0xdba
-	.4byte	.LLST267
+	.4byte	.LLST269
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9738
-	.uleb128 0x5f
-	.4byte	.LBB238
-	.4byte	.LBE238-.LBB238
-	.4byte	0x3ad9
-	.uleb128 0x51
+	.uleb128 0x61
+	.4byte	.LBB242
+	.4byte	.LBE242-.LBB242
+	.4byte	0x3b40
+	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x8d1
 	.4byte	0xdba
-	.4byte	.LLST268
+	.4byte	.LLST270
 	.uleb128 0x34
-	.4byte	.LVL1078
-	.4byte	0x9222
+	.4byte	.LVL1080
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31039,9 +31114,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1071
-	.4byte	0x9222
-	.4byte	0x3af9
+	.4byte	.LVL1073
+	.4byte	0x9289
+	.4byte	0x3b60
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31056,9 +31131,9 @@ __func__.9940:
 	.4byte	.LANCHOR156
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1072
+	.4byte	.LVL1074
 	.4byte	0x230c
-	.4byte	0x3b1a
+	.4byte	0x3b81
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31079,9 +31154,9 @@ __func__.9940:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1083
-	.4byte	0x9222
-	.4byte	0x3b41
+	.4byte	.LVL1085
+	.4byte	0x9289
+	.4byte	0x3ba8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31102,9 +31177,9 @@ __func__.9940:
 	.2byte	0x8df
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1085
-	.4byte	0x5212
-	.4byte	0x3b60
+	.4byte	.LVL1087
+	.4byte	0x5279
+	.4byte	0x3bc7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31124,11 +31199,11 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1086
-	.4byte	0x6122
+	.4byte	.LVL1088
+	.4byte	0x6189
 	.uleb128 0x34
-	.4byte	.LVL1090
-	.4byte	0x9222
+	.4byte	.LVL1092
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31145,58 +31220,58 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3b83
-	.uleb128 0x5d
-	.4byte	.LASF665
+	.4byte	0x3bea
+	.uleb128 0x5f
+	.4byte	.LASF666
 	.byte	0x2
 	.2byte	0x88f
 	.4byte	.LFB292
 	.4byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3c9a
-	.uleb128 0x50
+	.4byte	0x3d01
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x891
 	.4byte	0xdba
-	.4byte	.LLST371
-	.uleb128 0x50
+	.4byte	.LLST373
+	.uleb128 0x53
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x892
 	.4byte	0xdc5
-	.4byte	.LLST372
+	.4byte	.LLST374
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x893
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x2
 	.2byte	0x894
 	.4byte	0xdba
-	.4byte	.LLST373
+	.4byte	.LLST375
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3caa
+	.4byte	0x3d11
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9722
 	.uleb128 0x32
-	.4byte	.LVL1575
-	.4byte	0x9222
-	.4byte	0x3c1a
+	.4byte	.LVL1577
+	.4byte	0x9289
+	.4byte	0x3c81
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31211,9 +31286,9 @@ __func__.9940:
 	.4byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1576
+	.4byte	.LVL1578
 	.4byte	0x230c
-	.4byte	0x3c2e
+	.4byte	0x3c95
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31222,9 +31297,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1580
-	.4byte	0x5212
-	.4byte	0x3c4d
+	.4byte	.LVL1582
+	.4byte	0x5279
+	.4byte	0x3cb4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31244,12 +31319,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1581
-	.4byte	0x6122
+	.4byte	.LVL1583
+	.4byte	0x6189
 	.uleb128 0x32
-	.4byte	.LVL1585
-	.4byte	0x9222
-	.4byte	0x3c73
+	.4byte	.LVL1587
+	.4byte	0x9289
+	.4byte	0x3cda
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31264,9 +31339,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1586
-	.4byte	0x3297
-	.4byte	0x3c87
+	.4byte	.LVL1588
+	.4byte	0x32fe
+	.4byte	0x3cee
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31275,66 +31350,66 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1587
-	.4byte	0x5313
+	.4byte	.LVL1589
+	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL1588
-	.4byte	0x4d0e
+	.4byte	.LVL1590
+	.4byte	0x4d75
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3caa
+	.4byte	0x3d11
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3c9a
-	.uleb128 0x5d
-	.4byte	.LASF666
+	.4byte	0x3d01
+	.uleb128 0x5f
+	.4byte	.LASF667
 	.byte	0x2
 	.2byte	0x86b
 	.4byte	.LFB291
 	.4byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d52
-	.uleb128 0x4f
-	.4byte	.LASF612
+	.4byte	0x3db9
+	.uleb128 0x52
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x86b
 	.4byte	0x1d79
-	.4byte	.LLST339
+	.4byte	.LLST341
 	.uleb128 0x28
-	.4byte	.LASF667
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x86d
 	.4byte	0xde6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -44
-	.uleb128 0x51
-	.4byte	.LASF596
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x86e
-	.4byte	0x2a63
-	.4byte	.LLST340
-	.uleb128 0x51
-	.4byte	.LASF668
+	.4byte	0x2aca
+	.4byte	.LLST342
+	.uleb128 0x54
+	.4byte	.LASF669
 	.byte	0x2
 	.2byte	0x86f
 	.4byte	0x50
-	.4byte	.LLST341
-	.uleb128 0x60
+	.4byte	.LLST343
+	.uleb128 0x62
 	.4byte	.LASF384
 	.byte	0x2
 	.2byte	0x870
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1429
-	.4byte	0x32d7
-	.4byte	0x3d25
+	.4byte	.LVL1431
+	.4byte	0x333e
+	.4byte	0x3d8c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31343,9 +31418,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1432
+	.4byte	.LVL1434
 	.4byte	0x251a
-	.4byte	0x3d48
+	.4byte	0x3daf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31369,22 +31444,22 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1433
-	.4byte	0x31f2
+	.4byte	.LVL1435
+	.4byte	0x3259
 	.byte	0
-	.uleb128 0x61
-	.4byte	.LASF669
+	.uleb128 0x63
+	.4byte	.LASF670
 	.byte	0x2
 	.2byte	0x851
 	.4byte	.LFB290
 	.4byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3da3
+	.4byte	0x3e0a
 	.uleb128 0x32
-	.4byte	.LVL1554
-	.4byte	0x4fd7
-	.4byte	0x3d86
+	.4byte	.LVL1556
+	.4byte	0x503e
+	.4byte	0x3ded
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31403,7 +31478,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1555
+	.4byte	.LVL1557
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31424,13 +31499,13 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x52
-	.4byte	.LASF671
+	.uleb128 0x55
+	.4byte	.LASF672
 	.byte	0x2
 	.2byte	0x83d
 	.byte	0x1
-	.uleb128 0x59
-	.4byte	.LASF672
+	.uleb128 0x5c
+	.4byte	.LASF673
 	.byte	0x2
 	.2byte	0x812
 	.4byte	0x50
@@ -31438,53 +31513,53 @@ __func__.9940:
 	.4byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3eb2
-	.uleb128 0x51
-	.4byte	.LASF649
+	.4byte	0x3f19
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST258
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	.LLST260
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST259
-	.uleb128 0x51
-	.4byte	.LASF594
+	.4byte	.LLST261
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST260
-	.uleb128 0x51
+	.4byte	.LLST262
+	.uleb128 0x54
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdba
-	.4byte	.LLST261
-	.uleb128 0x51
-	.4byte	.LASF673
+	.4byte	.LLST263
+	.uleb128 0x54
+	.4byte	.LASF674
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdba
-	.4byte	.LLST262
-	.uleb128 0x51
-	.4byte	.LASF674
+	.4byte	.LLST264
+	.uleb128 0x54
+	.4byte	.LASF675
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdba
-	.4byte	.LLST263
+	.4byte	.LLST265
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3ec2
+	.4byte	0x3f29
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9697
 	.uleb128 0x32
-	.4byte	.LVL1046
+	.4byte	.LVL1048
 	.4byte	0x230c
-	.4byte	0x3e49
+	.4byte	0x3eb0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31493,9 +31568,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1050
-	.4byte	0x6192
-	.4byte	0x3e5d
+	.4byte	.LVL1052
+	.4byte	0x61f9
+	.4byte	0x3ec4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31504,12 +31579,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1051
-	.4byte	0x67c5
+	.4byte	.LVL1053
+	.4byte	0x682c
 	.uleb128 0x32
-	.4byte	.LVL1059
-	.4byte	0x5d9a
-	.4byte	0x3e7a
+	.4byte	.LVL1061
+	.4byte	0x5e01
+	.4byte	0x3ee1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31518,9 +31593,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1066
-	.4byte	0x5d75
-	.4byte	0x3e8e
+	.4byte	.LVL1068
+	.4byte	0x5ddc
+	.4byte	0x3ef5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31529,8 +31604,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1068
-	.4byte	0x9222
+	.4byte	.LVL1070
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31553,15 +31628,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x3ec2
+	.4byte	0x3f29
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3eb2
-	.uleb128 0x45
-	.4byte	.LASF675
+	.4byte	0x3f19
+	.uleb128 0x48
+	.4byte	.LASF676
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x50
@@ -31569,21 +31644,21 @@ __func__.9940:
 	.4byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f5d
-	.uleb128 0x5a
+	.4byte	0x3fc4
+	.uleb128 0x5d
 	.ascii	"p\000"
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x1d79
 	.4byte	.LLST95
-	.uleb128 0x51
-	.4byte	.LASF592
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdba
 	.4byte	.LLST96
 	.uleb128 0x28
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdba
@@ -31591,14 +31666,14 @@ __func__.9940:
 	.byte	0x5b
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9676
 	.uleb128 0x32
 	.4byte	.LVL271
-	.4byte	0x9222
-	.4byte	0x3f43
+	.4byte	0x9289
+	.4byte	0x3faa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31620,10 +31695,10 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL274
-	.4byte	0x6192
+	.4byte	0x61f9
 	.uleb128 0x34
 	.4byte	.LVL276
-	.4byte	0x67c5
+	.4byte	0x682c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31632,8 +31707,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF676
+	.uleb128 0x48
+	.4byte	.LASF677
 	.byte	0x2
 	.2byte	0x7ef
 	.4byte	0x50
@@ -31641,11 +31716,11 @@ __func__.9940:
 	.4byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3fe1
+	.4byte	0x4048
 	.uleb128 0x32
-	.4byte	.LVL1691
-	.4byte	0x4007
-	.4byte	0x3f8b
+	.4byte	.LVL1693
+	.4byte	0x406e
+	.4byte	0x3ff2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31654,9 +31729,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1692
-	.4byte	0x3fe1
-	.4byte	0x3f9f
+	.4byte	.LVL1694
+	.4byte	0x4048
+	.4byte	0x4006
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31665,9 +31740,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1693
-	.4byte	0x4007
-	.4byte	0x3fb3
+	.4byte	.LVL1695
+	.4byte	0x406e
+	.4byte	0x401a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31676,9 +31751,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1694
-	.4byte	0x3fe1
-	.4byte	0x3fc7
+	.4byte	.LVL1696
+	.4byte	0x4048
+	.4byte	0x402e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31687,11 +31762,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1695
-	.4byte	0x2d2c
+	.4byte	.LVL1697
+	.4byte	0x2d93
 	.uleb128 0x34
-	.4byte	.LVL1696
-	.4byte	0x31f2
+	.4byte	.LVL1698
+	.4byte	0x3259
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31700,25 +31775,25 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF712
+	.uleb128 0x64
+	.4byte	.LASF713
 	.byte	0x2
 	.2byte	0x7dc
 	.byte	0x1
-	.4byte	0x4007
-	.uleb128 0x47
-	.4byte	.LASF639
+	.4byte	0x406e
+	.uleb128 0x4a
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0x7dc
 	.4byte	0x1d79
-	.uleb128 0x48
-	.4byte	.LASF594
+	.uleb128 0x4b
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7de
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF677
+	.uleb128 0x48
+	.4byte	.LASF678
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x50
@@ -31726,99 +31801,99 @@ __func__.9940:
 	.4byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4560
-	.uleb128 0x4f
-	.4byte	.LASF612
+	.4byte	0x45c7
+	.uleb128 0x52
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x1d79
-	.4byte	.LLST313
-	.uleb128 0x51
-	.4byte	.LASF678
+	.4byte	.LLST315
+	.uleb128 0x54
+	.4byte	.LASF679
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdba
-	.4byte	.LLST314
-	.uleb128 0x51
-	.4byte	.LASF679
+	.4byte	.LLST316
+	.uleb128 0x54
+	.4byte	.LASF680
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdba
-	.4byte	.LLST315
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	.LLST317
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST316
-	.uleb128 0x51
+	.4byte	.LLST318
+	.uleb128 0x54
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST317
-	.uleb128 0x51
+	.4byte	.LLST319
+	.uleb128 0x54
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdba
-	.4byte	.LLST318
-	.uleb128 0x51
-	.4byte	.LASF680
+	.4byte	.LLST320
+	.uleb128 0x54
+	.4byte	.LASF681
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdba
-	.4byte	.LLST319
-	.uleb128 0x51
-	.4byte	.LASF681
+	.4byte	.LLST321
+	.uleb128 0x54
+	.4byte	.LASF682
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdba
-	.4byte	.LLST320
-	.uleb128 0x51
-	.4byte	.LASF594
+	.4byte	.LLST322
+	.uleb128 0x54
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x67c
 	.4byte	0xdba
-	.4byte	.LLST321
-	.uleb128 0x51
-	.4byte	.LASF682
+	.4byte	.LLST323
+	.uleb128 0x54
+	.4byte	.LASF683
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x50
-	.4byte	.LLST322
-	.uleb128 0x51
-	.4byte	.LASF683
+	.4byte	.LLST324
+	.uleb128 0x54
+	.4byte	.LASF684
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x50
-	.4byte	.LLST322
-	.uleb128 0x51
+	.4byte	.LLST324
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdba
-	.4byte	.LLST324
-	.uleb128 0x50
+	.4byte	.LLST326
+	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdba
-	.4byte	.LLST325
-	.uleb128 0x50
+	.4byte	.LLST327
+	.uleb128 0x53
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdba
-	.4byte	.LLST326
-	.uleb128 0x50
+	.4byte	.LLST328
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
-	.4byte	.LLST327
+	.4byte	.LLST329
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
@@ -31826,7 +31901,7 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -44
 	.uleb128 0x28
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
@@ -31834,91 +31909,91 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -40
 	.uleb128 0x28
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x51
-	.4byte	.LASF629
+	.uleb128 0x54
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdba
-	.4byte	.LLST328
-	.uleb128 0x51
-	.4byte	.LASF684
+	.4byte	.LLST330
+	.uleb128 0x54
+	.4byte	.LASF685
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdba
-	.4byte	.LLST329
-	.uleb128 0x51
-	.4byte	.LASF685
+	.4byte	.LLST331
+	.uleb128 0x54
+	.4byte	.LASF686
 	.byte	0x2
 	.2byte	0x681
 	.4byte	0xdc5
-	.4byte	.LLST330
-	.uleb128 0x51
-	.4byte	.LASF686
+	.4byte	.LLST332
+	.uleb128 0x54
+	.4byte	.LASF687
 	.byte	0x2
 	.2byte	0x682
 	.4byte	0xdba
-	.4byte	.LLST331
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	.LLST333
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x683
-	.4byte	0x2a63
-	.4byte	.LLST332
-	.uleb128 0x60
-	.4byte	.LASF687
+	.4byte	0x2aca
+	.4byte	.LLST334
+	.uleb128 0x62
+	.4byte	.LASF688
 	.byte	0x2
 	.2byte	0x684
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x4570
+	.4byte	0x45d7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9619
-	.uleb128 0x55
-	.4byte	.LASF689
+	.uleb128 0x58
+	.4byte	.LASF690
 	.byte	0x2
 	.2byte	0x713
-	.4byte	.L1149
-	.uleb128 0x55
-	.4byte	.LASF618
+	.4byte	.L1150
+	.uleb128 0x58
+	.4byte	.LASF620
 	.byte	0x2
 	.2byte	0x71b
-	.4byte	.L1164
-	.uleb128 0x55
-	.4byte	.LASF690
+	.4byte	.L1165
+	.uleb128 0x58
+	.4byte	.LASF691
 	.byte	0x2
 	.2byte	0x7ce
-	.4byte	.L1172
-	.uleb128 0x4a
-	.4byte	.LASF691
+	.4byte	.L1173
+	.uleb128 0x4d
+	.4byte	.LASF692
 	.byte	0x2
 	.2byte	0x7d8
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x120
-	.4byte	0x4213
-	.uleb128 0x51
-	.4byte	.LASF692
+	.4byte	0x427a
+	.uleb128 0x54
+	.4byte	.LASF693
 	.byte	0x2
 	.2byte	0x6eb
 	.4byte	0xdc5
-	.4byte	.LLST333
-	.uleb128 0x51
-	.4byte	.LASF693
+	.4byte	.LLST335
+	.uleb128 0x54
+	.4byte	.LASF694
 	.byte	0x2
 	.2byte	0x6ec
 	.4byte	0xdc5
-	.4byte	.LLST334
+	.4byte	.LLST336
 	.uleb128 0x34
-	.4byte	.LVL1344
+	.4byte	.LVL1346
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -31935,23 +32010,23 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x138
-	.4byte	0x42e8
-	.uleb128 0x51
-	.4byte	.LASF694
+	.4byte	0x434f
+	.uleb128 0x54
+	.4byte	.LASF695
 	.byte	0x2
 	.2byte	0x746
 	.4byte	0xdc5
-	.4byte	.LLST335
-	.uleb128 0x51
-	.4byte	.LASF695
+	.4byte	.LLST337
+	.uleb128 0x54
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x747
 	.4byte	0xdc5
-	.4byte	.LLST336
+	.4byte	.LLST338
 	.uleb128 0x32
-	.4byte	.LVL1388
+	.4byte	.LVL1390
 	.4byte	0x26b9
-	.4byte	0x4254
+	.4byte	0x42bb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -31964,12 +32039,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1390
-	.4byte	0x31f2
+	.4byte	.LVL1392
+	.4byte	0x3259
 	.uleb128 0x32
-	.4byte	.LVL1396
-	.4byte	0x5212
-	.4byte	0x427c
+	.4byte	.LVL1398
+	.4byte	0x5279
+	.4byte	0x42e3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -31989,9 +32064,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1398
-	.4byte	0x60dd
-	.4byte	0x4290
+	.4byte	.LVL1400
+	.4byte	0x6144
+	.4byte	0x42f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32000,9 +32075,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1399
-	.4byte	0x4575
-	.4byte	0x42a4
+	.4byte	.LVL1401
+	.4byte	0x45dc
+	.4byte	0x430b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32011,9 +32086,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1401
+	.4byte	.LVL1403
 	.4byte	0x26b9
-	.4byte	0x42bc
+	.4byte	0x4323
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32026,9 +32101,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1403
-	.4byte	0x60dd
-	.4byte	0x42d0
+	.4byte	.LVL1405
+	.4byte	0x6144
+	.4byte	0x4337
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32037,8 +32112,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1404
-	.4byte	0x60dd
+	.4byte	.LVL1406
+	.4byte	0x6144
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32054,26 +32129,26 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
-	.4byte	.LBB271
-	.4byte	.LBE271-.LBB271
-	.4byte	0x4364
-	.uleb128 0x51
-	.4byte	.LASF696
+	.uleb128 0x61
+	.4byte	.LBB275
+	.4byte	.LBE275-.LBB275
+	.4byte	0x43cb
+	.uleb128 0x54
+	.4byte	.LASF697
 	.byte	0x2
 	.2byte	0x785
 	.4byte	0xdc5
-	.4byte	.LLST337
-	.uleb128 0x51
-	.4byte	.LASF695
+	.4byte	.LLST339
+	.uleb128 0x54
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x786
 	.4byte	0xdc5
-	.4byte	.LLST338
+	.4byte	.LLST340
 	.uleb128 0x32
-	.4byte	.LVL1413
+	.4byte	.LVL1415
 	.4byte	0x26b9
-	.4byte	0x432d
+	.4byte	0x4394
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32086,9 +32161,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1414
-	.4byte	0x60dd
-	.4byte	0x4348
+	.4byte	.LVL1416
+	.4byte	0x6144
+	.4byte	0x43af
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32104,8 +32179,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1416
-	.4byte	0x5212
+	.4byte	.LVL1418
+	.4byte	0x5279
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32126,9 +32201,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1293
-	.4byte	0x6011
-	.4byte	0x4377
+	.4byte	.LVL1295
+	.4byte	0x6078
+	.4byte	0x43de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32136,9 +32211,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1299
+	.4byte	.LVL1301
 	.4byte	0x26b9
-	.4byte	0x4390
+	.4byte	0x43f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32152,12 +32227,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1305
-	.4byte	0x615a
+	.4byte	.LVL1307
+	.4byte	0x61c1
 	.uleb128 0x32
-	.4byte	.LVL1308
-	.4byte	0x468d
-	.4byte	0x43ad
+	.4byte	.LVL1310
+	.4byte	0x46f4
+	.4byte	0x4414
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32166,9 +32241,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1312
-	.4byte	0x9222
-	.4byte	0x43d4
+	.4byte	.LVL1314
+	.4byte	0x9289
+	.4byte	0x443b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32189,9 +32264,9 @@ __func__.9940:
 	.2byte	0x6aa
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1313
-	.4byte	0x9222
-	.4byte	0x43fb
+	.4byte	.LVL1315
+	.4byte	0x9289
+	.4byte	0x4462
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32212,9 +32287,9 @@ __func__.9940:
 	.2byte	0x6ab
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1325
-	.4byte	0x60dd
-	.4byte	0x4415
+	.4byte	.LVL1327
+	.4byte	0x6144
+	.4byte	0x447c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32229,9 +32304,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1349
-	.4byte	0x4ec1
-	.4byte	0x442c
+	.4byte	.LVL1351
+	.4byte	0x4f28
+	.4byte	0x4493
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32240,9 +32315,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1352
+	.4byte	.LVL1354
 	.4byte	0x26b9
-	.4byte	0x4447
+	.4byte	0x44ae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32257,9 +32332,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1372
-	.4byte	0x615a
-	.4byte	0x4461
+	.4byte	.LVL1374
+	.4byte	0x61c1
+	.4byte	0x44c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32274,12 +32349,12 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1377
-	.4byte	0x31f2
+	.4byte	.LVL1379
+	.4byte	0x3259
 	.uleb128 0x32
-	.4byte	.LVL1382
-	.4byte	0x60dd
-	.4byte	0x4485
+	.4byte	.LVL1384
+	.4byte	0x6144
+	.4byte	0x44ec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32295,9 +32370,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1385
-	.4byte	0x5212
-	.4byte	0x44a4
+	.4byte	.LVL1387
+	.4byte	0x5279
+	.4byte	0x450b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32317,9 +32392,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1386
-	.4byte	0x60dd
-	.4byte	0x44bf
+	.4byte	.LVL1388
+	.4byte	0x6144
+	.4byte	0x4526
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32335,9 +32410,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1391
-	.4byte	0x6122
-	.4byte	0x44d9
+	.4byte	.LVL1393
+	.4byte	0x6189
+	.4byte	0x4540
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32352,9 +32427,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1394
-	.4byte	0x9222
-	.4byte	0x4500
+	.4byte	.LVL1396
+	.4byte	0x9289
+	.4byte	0x4567
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32375,9 +32450,9 @@ __func__.9940:
 	.2byte	0x7a5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1408
-	.4byte	0x5212
-	.4byte	0x451f
+	.4byte	.LVL1410
+	.4byte	0x5279
+	.4byte	0x4586
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32397,9 +32472,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1409
-	.4byte	0x6122
-	.4byte	0x4539
+	.4byte	.LVL1411
+	.4byte	0x6189
+	.4byte	0x45a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32414,9 +32489,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1418
-	.4byte	0x9222
-	.4byte	0x4556
+	.4byte	.LVL1420
+	.4byte	0x9289
+	.4byte	0x45bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32431,76 +32506,76 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1421
-	.4byte	0x31f2
+	.4byte	.LVL1423
+	.4byte	0x3259
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x4570
+	.4byte	0x45d7
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4560
-	.uleb128 0x5d
-	.4byte	.LASF697
+	.4byte	0x45c7
+	.uleb128 0x5f
+	.4byte	.LASF698
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	.LFB283
 	.4byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x468d
-	.uleb128 0x5a
+	.4byte	0x46f4
+	.uleb128 0x5d
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdc5
-	.4byte	.LLST231
-	.uleb128 0x4f
-	.4byte	.LASF663
+	.4byte	.LLST233
+	.uleb128 0x52
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdc5
-	.4byte	.LLST232
-	.uleb128 0x51
-	.4byte	.LASF629
+	.4byte	.LLST234
+	.uleb128 0x54
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x65d
 	.4byte	0xdba
-	.4byte	.LLST233
+	.4byte	.LLST235
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9585
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0xa0
-	.4byte	0x4656
-	.uleb128 0x50
+	.4byte	0x46bd
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x661
 	.4byte	0xdba
-	.4byte	.LLST234
-	.uleb128 0x51
-	.4byte	.LASF608
+	.4byte	.LLST236
+	.uleb128 0x54
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x662
 	.4byte	0xdba
-	.4byte	.LLST235
-	.uleb128 0x51
+	.4byte	.LLST237
+	.uleb128 0x54
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x663
 	.4byte	0xdba
-	.4byte	.LLST236
+	.4byte	.LLST238
 	.uleb128 0x32
-	.4byte	.LVL897
-	.4byte	0x5bca
-	.4byte	0x461e
+	.4byte	.LVL899
+	.4byte	0x5c31
+	.4byte	0x4685
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32515,9 +32590,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL898
-	.4byte	0x9222
-	.4byte	0x4645
+	.4byte	.LVL900
+	.4byte	0x9289
+	.4byte	0x46ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32538,8 +32613,8 @@ __func__.9940:
 	.2byte	0x667
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL899
-	.4byte	0x5d75
+	.4byte	.LVL901
+	.4byte	0x5ddc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32549,9 +32624,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL891
-	.4byte	0x6122
-	.4byte	0x4671
+	.4byte	.LVL893
+	.4byte	0x6189
+	.4byte	0x46d8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32567,8 +32642,8 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL905
-	.4byte	0x5212
+	.4byte	.LVL907
+	.4byte	0x5279
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32588,43 +32663,43 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF698
+	.uleb128 0x5f
+	.4byte	.LASF699
 	.byte	0x2
 	.2byte	0x647
 	.4byte	.LFB282
 	.4byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46e2
-	.uleb128 0x63
-	.4byte	.LASF612
+	.4byte	0x4749
+	.uleb128 0x65
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0x1d79
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x4f
+	.uleb128 0x52
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdba
 	.4byte	.LLST90
-	.uleb128 0x4f
+	.uleb128 0x52
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdba
 	.4byte	.LLST91
-	.uleb128 0x51
-	.4byte	.LASF592
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x649
 	.4byte	0xdba
 	.4byte	.LLST92
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF699
+	.uleb128 0x48
+	.4byte	.LASF700
 	.byte	0x2
 	.2byte	0x63e
 	.4byte	0x50
@@ -32632,13 +32707,13 @@ __func__.9940:
 	.4byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4719
+	.4byte	0x4780
 	.uleb128 0x44
-	.4byte	.LVL1037
-	.4byte	0x4719
+	.4byte	.LVL1039
+	.4byte	0x4780
 	.uleb128 0x34
-	.4byte	.LVL1038
-	.4byte	0x4791
+	.4byte	.LVL1040
+	.4byte	0x47f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32647,25 +32722,25 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF700
+	.uleb128 0x5f
+	.4byte	.LASF701
 	.byte	0x2
 	.2byte	0x627
 	.4byte	.LFB280
 	.4byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4763
-	.uleb128 0x51
+	.4byte	0x47ca
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x629
 	.4byte	0xdba
-	.4byte	.LLST257
+	.4byte	.LLST259
 	.uleb128 0x32
-	.4byte	.LVL1034
+	.4byte	.LVL1036
 	.4byte	0x230c
-	.4byte	0x4752
+	.4byte	0x47b9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32673,7 +32748,7 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1035
+	.4byte	.LVL1037
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32683,8 +32758,8 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF701
+	.uleb128 0x48
+	.4byte	.LASF702
 	.byte	0x2
 	.2byte	0x617
 	.4byte	0x50
@@ -32692,10 +32767,10 @@ __func__.9940:
 	.4byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4791
+	.4byte	0x47f8
 	.uleb128 0x34
-	.4byte	.LVL1033
-	.4byte	0x4791
+	.4byte	.LVL1035
+	.4byte	0x47f8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32704,8 +32779,8 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF702
+	.uleb128 0x48
+	.4byte	.LASF703
 	.byte	0x2
 	.2byte	0x5b9
 	.4byte	0x50
@@ -32713,56 +32788,56 @@ __func__.9940:
 	.4byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4934
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x499b
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x5b9
-	.4byte	0x4934
-	.4byte	.LLST249
-	.uleb128 0x51
-	.4byte	.LASF704
+	.4byte	0x499b
+	.4byte	.LLST251
+	.uleb128 0x54
+	.4byte	.LASF705
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xddb
-	.4byte	.LLST250
-	.uleb128 0x51
-	.4byte	.LASF299
+	.4byte	.LLST252
+	.uleb128 0x54
+	.4byte	.LASF299
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xddb
-	.4byte	.LLST251
-	.uleb128 0x51
-	.4byte	.LASF705
+	.4byte	.LLST253
+	.uleb128 0x54
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x5bc
 	.4byte	0xddb
-	.4byte	.LLST252
-	.uleb128 0x51
+	.4byte	.LLST254
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x5bd
 	.4byte	0xdba
-	.4byte	.LLST253
+	.4byte	.LLST255
 	.uleb128 0x28
-	.4byte	.LASF706
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x5be
 	.4byte	0xff2
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF310
 	.byte	0x2
 	.2byte	0x5bf
 	.4byte	0x10e9
-	.4byte	.LLST254
-	.uleb128 0x51
+	.4byte	.LLST256
+	.uleb128 0x54
 	.4byte	.LASF311
 	.byte	0x2
 	.2byte	0x5c0
 	.4byte	0xff2
-	.4byte	.LLST255
+	.4byte	.LLST257
 	.uleb128 0x28
 	.4byte	.LASF307
 	.byte	0x2
@@ -32770,23 +32845,23 @@ __func__.9940:
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x5b
-	.uleb128 0x51
-	.4byte	.LASF707
+	.uleb128 0x54
+	.4byte	.LASF708
 	.byte	0x2
 	.2byte	0x5c2
 	.4byte	0xdba
-	.4byte	.LLST256
+	.4byte	.LLST258
 	.uleb128 0x28
-	.4byte	.LASF708
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x5c3
-	.4byte	0x493a
+	.4byte	0x49a1
 	.uleb128 0x1
 	.byte	0x57
 	.uleb128 0x32
-	.4byte	.LVL997
+	.4byte	.LVL999
 	.4byte	0x230c
-	.4byte	0x4877
+	.4byte	0x48de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32809,9 +32884,9 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1002
-	.4byte	0x6011
-	.4byte	0x488a
+	.4byte	.LVL1004
+	.4byte	0x6078
+	.4byte	0x48f1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32819,9 +32894,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1008
-	.4byte	0x583d
-	.4byte	0x489e
+	.4byte	.LVL1010
+	.4byte	0x58a4
+	.4byte	0x4905
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32830,9 +32905,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1009
-	.4byte	0x57e5
-	.4byte	0x48b2
+	.4byte	.LVL1011
+	.4byte	0x584c
+	.4byte	0x4919
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32841,9 +32916,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1010
-	.4byte	0x569b
-	.4byte	0x48c6
+	.4byte	.LVL1012
+	.4byte	0x5702
+	.4byte	0x492d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32852,9 +32927,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1011
-	.4byte	0x569b
-	.4byte	0x48da
+	.4byte	.LVL1013
+	.4byte	0x5702
+	.4byte	0x4941
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32863,9 +32938,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1014
+	.4byte	.LVL1016
 	.4byte	0x26b9
-	.4byte	0x48fb
+	.4byte	0x4962
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32884,9 +32959,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1019
+	.4byte	.LVL1021
 	.4byte	0x26b9
-	.4byte	0x4919
+	.4byte	0x4980
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32905,7 +32980,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1023
+	.4byte	.LVL1025
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -32931,8 +33006,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x1271
-	.uleb128 0x59
-	.4byte	.LASF709
+	.uleb128 0x5c
+	.4byte	.LASF710
 	.byte	0x2
 	.2byte	0x54f
 	.4byte	0x50
@@ -32940,13 +33015,13 @@ __func__.9940:
 	.4byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4aae
-	.uleb128 0x51
-	.4byte	.LASF705
+	.4byte	0x4b15
+	.uleb128 0x54
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x551
 	.4byte	0xddb
-	.4byte	.LLST446
+	.4byte	.LLST448
 	.uleb128 0x3d
 	.4byte	.LASF574
 	.4byte	0x26b4
@@ -32954,9 +33029,9 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9522
 	.uleb128 0x32
-	.4byte	.LVL1970
+	.4byte	.LVL1972
 	.4byte	0x230c
-	.4byte	0x498c
+	.4byte	0x49f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32964,9 +33039,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1971
-	.4byte	0x6011
-	.4byte	0x499f
+	.4byte	.LVL1973
+	.4byte	0x6078
+	.4byte	0x4a06
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -32974,9 +33049,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1973
-	.4byte	0x9222
-	.4byte	0x49c6
+	.4byte	.LVL1975
+	.4byte	0x9289
+	.4byte	0x4a2d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -32997,9 +33072,9 @@ __func__.9940:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1974
-	.4byte	0x9222
-	.4byte	0x49ed
+	.4byte	.LVL1976
+	.4byte	0x9289
+	.4byte	0x4a54
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33020,9 +33095,9 @@ __func__.9940:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1976
+	.4byte	.LVL1978
 	.4byte	0x22a6
-	.4byte	0x4a07
+	.4byte	0x4a6e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33037,15 +33112,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1977
+	.4byte	.LVL1979
 	.4byte	0x22a6
 	.uleb128 0x44
-	.4byte	.LVL1978
+	.4byte	.LVL1980
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1980
-	.4byte	0x9222
-	.4byte	0x4a40
+	.4byte	.LVL1982
+	.4byte	0x9289
+	.4byte	0x4aa7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33066,9 +33141,9 @@ __func__.9940:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1981
-	.4byte	0x3ec7
-	.4byte	0x4a57
+	.4byte	.LVL1983
+	.4byte	0x3f2e
+	.4byte	0x4abe
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33077,9 +33152,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1982
-	.4byte	0x3ec7
-	.4byte	0x4a6b
+	.4byte	.LVL1984
+	.4byte	0x3f2e
+	.4byte	0x4ad2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33088,9 +33163,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1983
-	.4byte	0x3ec7
-	.4byte	0x4a7f
+	.4byte	.LVL1985
+	.4byte	0x3f2e
+	.4byte	0x4ae6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33099,9 +33174,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1984
-	.4byte	0x3ec7
-	.4byte	0x4a93
+	.4byte	.LVL1986
+	.4byte	0x3f2e
+	.4byte	0x4afa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33110,7 +33185,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1986
+	.4byte	.LVL1988
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33130,8 +33205,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF710
+	.uleb128 0x48
+	.4byte	.LASF711
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0x50
@@ -33139,39 +33214,39 @@ __func__.9940:
 	.4byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ad9
-	.uleb128 0x4f
-	.4byte	.LASF711
+	.4byte	0x4b40
+	.uleb128 0x52
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0xdba
 	.4byte	.LLST89
 	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF713
+	.uleb128 0x64
+	.4byte	.LASF714
 	.byte	0x2
 	.2byte	0x542
 	.byte	0x1
-	.4byte	0x4aff
-	.uleb128 0x47
-	.4byte	.LASF711
+	.4byte	0x4b66
+	.uleb128 0x4a
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0xdba
-	.uleb128 0x47
-	.4byte	.LASF588
+	.uleb128 0x4a
+	.4byte	.LASF591
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0x50
 	.byte	0
-	.uleb128 0x4e
-	.4byte	.LASF715
+	.uleb128 0x51
+	.4byte	.LASF716
 	.byte	0x2
 	.2byte	0x535
 	.4byte	0x50
 	.byte	0x1
-	.uleb128 0x45
-	.4byte	.LASF716
+	.uleb128 0x48
+	.4byte	.LASF717
 	.byte	0x2
 	.2byte	0x446
 	.4byte	0x50
@@ -33179,61 +33254,61 @@ __func__.9940:
 	.4byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d0e
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	0x4d75
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdba
-	.4byte	.LLST243
+	.4byte	.LLST245
 	.uleb128 0x28
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdba
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -60
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdba
-	.4byte	.LLST244
-	.uleb128 0x51
+	.4byte	.LLST246
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdba
-	.4byte	.LLST245
-	.uleb128 0x50
+	.4byte	.LLST247
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xddb
-	.4byte	.LLST246
-	.uleb128 0x50
+	.4byte	.LLST248
+	.uleb128 0x53
 	.ascii	"j\000"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xddb
-	.4byte	.LLST247
-	.uleb128 0x51
-	.4byte	.LASF718
+	.4byte	.LLST249
+	.uleb128 0x54
+	.4byte	.LASF719
 	.byte	0x2
 	.2byte	0x44b
-	.4byte	0x493a
-	.4byte	.LLST248
+	.4byte	0x49a1
+	.4byte	.LLST250
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9465
 	.uleb128 0x32
-	.4byte	.LVL935
+	.4byte	.LVL937
 	.4byte	0x230c
-	.4byte	0x4bb4
+	.4byte	0x4c1b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33242,9 +33317,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL936
+	.4byte	.LVL938
 	.4byte	0x230c
-	.4byte	0x4bc8
+	.4byte	0x4c2f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33253,9 +33328,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL937
+	.4byte	.LVL939
 	.4byte	0x230c
-	.4byte	0x4bdc
+	.4byte	0x4c43
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33264,9 +33339,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL938
+	.4byte	.LVL940
 	.4byte	0x230c
-	.4byte	0x4bf0
+	.4byte	0x4c57
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33275,9 +33350,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL939
+	.4byte	.LVL941
 	.4byte	0x230c
-	.4byte	0x4c12
+	.4byte	0x4c79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33297,9 +33372,9 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL942
-	.4byte	0x6192
-	.4byte	0x4c28
+	.4byte	.LVL944
+	.4byte	0x61f9
+	.4byte	0x4c8f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33310,9 +33385,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL944
-	.4byte	0x67c5
-	.4byte	0x4c3e
+	.4byte	.LVL946
+	.4byte	0x682c
+	.4byte	0x4ca5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33323,9 +33398,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL950
+	.4byte	.LVL952
 	.4byte	0x26b9
-	.4byte	0x4c5d
+	.4byte	0x4cc4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33345,9 +33420,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL953
+	.4byte	.LVL955
 	.4byte	0x26b9
-	.4byte	0x4c75
+	.4byte	0x4cdc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33360,9 +33435,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL961
-	.4byte	0x5f01
-	.4byte	0x4c89
+	.4byte	.LVL963
+	.4byte	0x5f68
+	.4byte	0x4cf0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33371,9 +33446,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL962
-	.4byte	0x9222
-	.4byte	0x4cb0
+	.4byte	.LVL964
+	.4byte	0x9289
+	.4byte	0x4d17
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33394,9 +33469,9 @@ __func__.9940:
 	.2byte	0x48a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL971
-	.4byte	0x9222
-	.4byte	0x4cd7
+	.4byte	.LVL973
+	.4byte	0x9289
+	.4byte	0x4d3e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33417,9 +33492,9 @@ __func__.9940:
 	.2byte	0x4b3
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL980
-	.4byte	0x5f01
-	.4byte	0x4cea
+	.4byte	.LVL982
+	.4byte	0x5f68
+	.4byte	0x4d51
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33427,8 +33502,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL982
-	.4byte	0x9222
+	.4byte	.LVL984
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33449,8 +33524,8 @@ __func__.9940:
 	.2byte	0x530
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF719
+	.uleb128 0x48
+	.4byte	.LASF720
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x50
@@ -33458,27 +33533,27 @@ __func__.9940:
 	.4byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4e6f
-	.uleb128 0x51
+	.4byte	0x4ed6
+	.uleb128 0x54
 	.4byte	.LASF300
 	.byte	0x2
 	.2byte	0x3ed
 	.4byte	0xdba
-	.4byte	.LLST368
-	.uleb128 0x51
-	.4byte	.LASF720
+	.4byte	.LLST370
+	.uleb128 0x54
+	.4byte	.LASF721
 	.byte	0x2
 	.2byte	0x3ee
-	.4byte	0x4e6f
-	.4byte	.LLST369
-	.uleb128 0x51
-	.4byte	.LASF721
+	.4byte	0x4ed6
+	.4byte	.LLST371
+	.uleb128 0x54
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x3ef
 	.4byte	0xdba
-	.4byte	.LLST370
-	.uleb128 0x4a
-	.4byte	.LASF722
+	.4byte	.LLST372
+	.uleb128 0x4d
+	.4byte	.LASF723
 	.byte	0x2
 	.2byte	0x41c
 	.uleb128 0x3d
@@ -33488,9 +33563,9 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9443
 	.uleb128 0x32
-	.4byte	.LVL1559
+	.4byte	.LVL1561
 	.4byte	0x230c
-	.4byte	0x4d83
+	.4byte	0x4dea
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33499,9 +33574,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1560
+	.4byte	.LVL1562
 	.4byte	0x22a6
-	.4byte	0x4da0
+	.4byte	0x4e07
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -33516,15 +33591,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1561
+	.4byte	.LVL1563
 	.4byte	0x22a6
 	.uleb128 0x44
-	.4byte	.LVL1562
+	.4byte	.LVL1564
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1563
-	.4byte	0x4f5b
-	.4byte	0x4dc6
+	.4byte	.LVL1565
+	.4byte	0x4fc2
+	.4byte	0x4e2d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33533,9 +33608,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1565
+	.4byte	.LVL1567
 	.4byte	0x251a
-	.4byte	0x4de9
+	.4byte	0x4e50
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33559,12 +33634,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1567
-	.4byte	0x5dbf
+	.4byte	.LVL1569
+	.4byte	0x5e26
 	.uleb128 0x32
-	.4byte	.LVL1568
+	.4byte	.LVL1570
 	.4byte	0x251a
-	.4byte	0x4e15
+	.4byte	0x4e7c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33588,9 +33663,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1569
-	.4byte	0x9222
-	.4byte	0x4e3c
+	.4byte	.LVL1571
+	.4byte	0x9289
+	.4byte	0x4ea3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33611,9 +33686,9 @@ __func__.9940:
 	.2byte	0x433
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1572
-	.4byte	0x9222
-	.4byte	0x4e59
+	.4byte	.LVL1574
+	.4byte	0x9289
+	.4byte	0x4ec0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33628,8 +33703,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1573
-	.4byte	0x5f01
+	.4byte	.LVL1575
+	.4byte	0x5f68
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33646,77 +33721,77 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x12c9
-	.uleb128 0x62
-	.4byte	.LASF723
+	.uleb128 0x64
+	.4byte	.LASF724
 	.byte	0x2
 	.2byte	0x3b2
 	.byte	0x1
-	.4byte	0x4ec1
+	.4byte	0x4f28
+	.uleb128 0x4f
 	.uleb128 0x4c
-	.uleb128 0x49
 	.ascii	"lpa\000"
 	.byte	0x2
 	.2byte	0x3b7
 	.4byte	0xdc5
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x3b8
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF724
+	.uleb128 0x4b
+	.4byte	.LASF725
 	.byte	0x2
 	.2byte	0x3b9
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF667
+	.uleb128 0x4b
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x3ba
 	.4byte	0xde6
-	.uleb128 0x48
-	.4byte	.LASF596
+	.uleb128 0x4b
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x3bb
-	.4byte	0x2a63
+	.4byte	0x2aca
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF725
+	.uleb128 0x5f
+	.4byte	.LASF726
 	.byte	0x2
 	.2byte	0x380
 	.4byte	.LFB270
 	.4byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f5b
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x4fc2
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x380
-	.4byte	0x4934
-	.4byte	.LLST239
-	.uleb128 0x50
+	.4byte	0x499b
+	.4byte	.LLST241
+	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x2
 	.2byte	0x382
 	.4byte	0xdc5
-	.4byte	.LLST240
-	.uleb128 0x51
+	.4byte	.LLST242
+	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x383
 	.4byte	0xdba
-	.4byte	.LLST241
-	.uleb128 0x51
-	.4byte	.LASF706
+	.4byte	.LLST243
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x384
 	.4byte	0xff2
-	.4byte	.LLST242
+	.4byte	.LLST244
 	.uleb128 0x32
-	.4byte	.LVL929
+	.4byte	.LVL931
 	.4byte	0x26b9
-	.4byte	0x4f35
+	.4byte	0x4f9c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33735,9 +33810,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LVL931
-	.4byte	0x5417
-	.4byte	0x4f4a
+	.4byte	.LVL933
+	.4byte	0x547e
+	.4byte	0x4fb1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33747,7 +33822,7 @@ __func__.9940:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL933
+	.4byte	.LVL935
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33757,25 +33832,25 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x62
-	.4byte	.LASF726
+	.uleb128 0x64
+	.4byte	.LASF727
 	.byte	0x2
 	.2byte	0x371
 	.byte	0x1
-	.4byte	0x4f7f
-	.uleb128 0x47
+	.4byte	0x4fe6
+	.uleb128 0x4a
 	.4byte	.LASF393
 	.byte	0x2
 	.2byte	0x371
 	.4byte	0xdc5
-	.uleb128 0x49
+	.uleb128 0x4c
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x373
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF727
+	.uleb128 0x48
+	.4byte	.LASF728
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0x50
@@ -33783,23 +33858,23 @@ __func__.9940:
 	.4byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fd7
-	.uleb128 0x4f
-	.4byte	.LASF728
+	.4byte	0x503e
+	.uleb128 0x52
+	.4byte	.LASF729
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0xdc5
-	.4byte	.LLST358
-	.uleb128 0x51
-	.4byte	.LASF729
+	.4byte	.LLST360
+	.uleb128 0x54
+	.4byte	.LASF730
 	.byte	0x2
 	.2byte	0x35e
 	.4byte	0xdc5
-	.4byte	.LLST359
+	.4byte	.LLST361
 	.uleb128 0x32
-	.4byte	.LVL1531
-	.4byte	0x50ef
-	.4byte	0x4fcd
+	.4byte	.LVL1533
+	.4byte	0x5156
+	.4byte	0x5034
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33808,11 +33883,11 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1532
-	.4byte	0x3da3
+	.4byte	.LVL1534
+	.4byte	0x3e0a
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF730
+	.uleb128 0x5c
+	.4byte	.LASF731
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdc5
@@ -33820,50 +33895,50 @@ __func__.9940:
 	.4byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x50e9
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	0x5150
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST360
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST362
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST361
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST363
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x336
-	.4byte	0x50e9
-	.4byte	.LLST362
-	.uleb128 0x50
+	.4byte	0x5150
+	.4byte	.LLST364
+	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdba
-	.4byte	.LLST363
-	.uleb128 0x51
-	.4byte	.LASF734
+	.4byte	.LLST365
+	.uleb128 0x54
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdba
-	.4byte	.LLST364
-	.uleb128 0x50
+	.4byte	.LLST366
+	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x339
 	.4byte	0xdc5
-	.4byte	.LLST365
-	.uleb128 0x51
-	.4byte	.LASF735
+	.4byte	.LLST367
+	.uleb128 0x54
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x33a
 	.4byte	0xdc5
-	.4byte	.LLST366
-	.uleb128 0x5e
+	.4byte	.LLST368
+	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x33b
@@ -33871,12 +33946,12 @@ __func__.9940:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
-	.uleb128 0x51
-	.4byte	.LASF736
+	.uleb128 0x54
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x33c
 	.4byte	0xdc5
-	.4byte	.LLST367
+	.4byte	.LLST369
 	.uleb128 0x28
 	.4byte	.LASF565
 	.byte	0x2
@@ -33886,9 +33961,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1542
+	.4byte	.LVL1544
 	.4byte	0x26b9
-	.4byte	0x50b0
+	.4byte	0x5117
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33907,9 +33982,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1544
+	.4byte	.LVL1546
 	.4byte	0x22a6
-	.4byte	0x50ca
+	.4byte	0x5131
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -33924,7 +33999,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1549
+	.4byte	.LVL1551
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -33950,8 +34025,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xdaf
-	.uleb128 0x59
-	.4byte	.LASF737
+	.uleb128 0x5c
+	.4byte	.LASF738
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdc5
@@ -33959,50 +34034,50 @@ __func__.9940:
 	.4byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5212
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	0x5279
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdc5
-	.4byte	.LLST350
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST352
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdc5
-	.4byte	.LLST351
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST353
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x311
-	.4byte	0x50e9
-	.4byte	.LLST352
-	.uleb128 0x50
+	.4byte	0x5150
+	.4byte	.LLST354
+	.uleb128 0x53
 	.ascii	"len\000"
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdba
-	.4byte	.LLST353
-	.uleb128 0x51
-	.4byte	.LASF734
+	.4byte	.LLST355
+	.uleb128 0x54
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdba
-	.4byte	.LLST354
-	.uleb128 0x50
+	.4byte	.LLST356
+	.uleb128 0x53
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x314
 	.4byte	0xdc5
-	.4byte	.LLST355
-	.uleb128 0x51
-	.4byte	.LASF735
+	.4byte	.LLST357
+	.uleb128 0x54
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x315
 	.4byte	0xdc5
-	.4byte	.LLST356
-	.uleb128 0x5e
+	.4byte	.LLST358
+	.uleb128 0x60
 	.ascii	"req\000"
 	.byte	0x2
 	.2byte	0x316
@@ -34010,12 +34085,12 @@ __func__.9940:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -116
-	.uleb128 0x51
-	.4byte	.LASF736
+	.uleb128 0x54
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x317
 	.4byte	0xdc5
-	.4byte	.LLST357
+	.4byte	.LLST359
 	.uleb128 0x28
 	.4byte	.LASF565
 	.byte	0x2
@@ -34025,9 +34100,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x32
-	.4byte	.LVL1513
+	.4byte	.LVL1515
 	.4byte	0x26b9
-	.4byte	0x51c8
+	.4byte	0x522f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34046,9 +34121,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1516
+	.4byte	.LVL1518
 	.4byte	0x22a6
-	.4byte	0x51e5
+	.4byte	0x524c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34065,9 +34140,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1518
-	.4byte	0x5417
-	.4byte	0x5202
+	.4byte	.LVL1520
+	.4byte	0x547e
+	.4byte	0x5269
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34082,7 +34157,7 @@ __func__.9940:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1523
+	.4byte	.LVL1525
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -34091,8 +34166,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF738
+	.uleb128 0x48
+	.4byte	.LASF739
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x50
@@ -34100,40 +34175,40 @@ __func__.9940:
 	.4byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x52fe
-	.uleb128 0x5a
+	.4byte	0x5365
+	.uleb128 0x5d
 	.ascii	"lpn\000"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0xdc5
-	.4byte	.LLST227
-	.uleb128 0x5a
+	.4byte	.LLST229
+	.uleb128 0x5d
 	.ascii	"ppn\000"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0xff2
-	.4byte	.LLST228
-	.uleb128 0x4f
-	.4byte	.LASF739
+	.4byte	.LLST230
+	.uleb128 0x52
+	.4byte	.LASF740
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x50
-	.4byte	.LLST229
-	.uleb128 0x51
-	.4byte	.LASF740
+	.4byte	.LLST231
+	.uleb128 0x54
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdba
-	.4byte	.LLST230
+	.4byte	.LLST232
 	.uleb128 0x28
-	.4byte	.LASF741
+	.4byte	.LASF742
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x28
-	.4byte	.LASF742
+	.4byte	.LASF743
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdba
@@ -34141,19 +34216,19 @@ __func__.9940:
 	.byte	0x54
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x530e
+	.4byte	0x5375
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9370
-	.uleb128 0x55
-	.4byte	.LASF743
+	.uleb128 0x58
+	.4byte	.LASF744
 	.byte	0x2
 	.2byte	0x2fb
-	.4byte	.L740
+	.4byte	.L741
 	.uleb128 0x32
-	.4byte	.LVL878
-	.4byte	0x9222
-	.4byte	0x52ca
+	.4byte	.LVL880
+	.4byte	0x9289
+	.4byte	0x5331
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34174,12 +34249,12 @@ __func__.9940:
 	.2byte	0x2f7
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL881
-	.4byte	0x534e
-	.uleb128 0x32
 	.4byte	.LVL883
-	.4byte	0x53c9
-	.4byte	0x52e7
+	.4byte	0x53b5
+	.uleb128 0x32
+	.4byte	.LVL885
+	.4byte	0x5430
+	.4byte	0x534e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34188,8 +34263,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL884
-	.4byte	0x590c
+	.4byte	.LVL886
+	.4byte	0x5973
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34206,15 +34281,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x530e
+	.4byte	0x5375
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x52fe
-	.uleb128 0x45
-	.4byte	.LASF744
+	.4byte	0x5365
+	.uleb128 0x48
+	.4byte	.LASF745
 	.byte	0x2
 	.2byte	0x2e3
 	.4byte	0x50
@@ -34222,22 +34297,22 @@ __func__.9940:
 	.4byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x534e
-	.uleb128 0x50
+	.4byte	0x53b5
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x2e5
 	.4byte	0xdba
-	.4byte	.LLST312
+	.4byte	.LLST314
 	.uleb128 0x44
-	.4byte	.LVL1279
-	.4byte	0x4e75
+	.4byte	.LVL1281
+	.4byte	0x4edc
 	.uleb128 0x44
-	.4byte	.LVL1283
-	.4byte	0x53c9
+	.4byte	.LVL1285
+	.4byte	0x5430
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF745
+	.uleb128 0x48
+	.4byte	.LASF746
 	.byte	0x2
 	.2byte	0x2bb
 	.4byte	0xdba
@@ -34245,34 +34320,34 @@ __func__.9940:
 	.4byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x53c9
-	.uleb128 0x50
+	.4byte	0x5430
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x2
 	.2byte	0x2bd
 	.4byte	0xdba
 	.4byte	.LLST83
-	.uleb128 0x51
-	.4byte	.LASF746
+	.uleb128 0x54
+	.4byte	.LASF747
 	.byte	0x2
 	.2byte	0x2be
 	.4byte	0xdba
 	.4byte	.LLST84
-	.uleb128 0x51
-	.4byte	.LASF747
+	.uleb128 0x54
+	.4byte	.LASF748
 	.byte	0x2
 	.2byte	0x2bf
 	.4byte	0xdc5
 	.4byte	.LLST85
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x4570
+	.4byte	0x45d7
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9353
 	.uleb128 0x34
 	.4byte	.LVL233
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34293,8 +34368,8 @@ __func__.9940:
 	.2byte	0x2df
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF748
+	.uleb128 0x48
+	.4byte	.LASF749
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0x50
@@ -34302,22 +34377,22 @@ __func__.9940:
 	.4byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5417
-	.uleb128 0x4f
-	.4byte	.LASF740
+	.4byte	0x547e
+	.uleb128 0x52
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0xdba
-	.4byte	.LLST225
-	.uleb128 0x51
+	.4byte	.LLST227
+	.uleb128 0x54
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x2b3
 	.4byte	0xdc5
-	.4byte	.LLST226
+	.4byte	.LLST228
 	.uleb128 0x34
-	.4byte	.LVL871
-	.4byte	0x5417
+	.4byte	.LVL873
+	.4byte	0x547e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34326,8 +34401,8 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF749
+	.uleb128 0x48
+	.4byte	.LASF750
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0x50
@@ -34335,57 +34410,57 @@ __func__.9940:
 	.4byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5576
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x55dd
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x276
-	.4byte	0x4934
-	.4byte	.LLST212
-	.uleb128 0x4f
+	.4byte	0x499b
+	.4byte	.LLST214
+	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0xdc5
-	.4byte	.LLST213
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST215
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0xff2
-	.4byte	.LLST214
-	.uleb128 0x51
+	.4byte	.LLST216
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x278
 	.4byte	0xdc5
-	.4byte	.LLST215
-	.uleb128 0x51
-	.4byte	.LASF708
+	.4byte	.LLST217
+	.uleb128 0x54
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x279
-	.4byte	0x493a
-	.4byte	.LLST216
-	.uleb128 0x51
-	.4byte	.LASF721
+	.4byte	0x49a1
+	.4byte	.LLST218
+	.uleb128 0x54
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x27a
 	.4byte	0xdba
-	.4byte	.LLST217
-	.uleb128 0x4a
-	.4byte	.LASF750
+	.4byte	.LLST219
+	.uleb128 0x4d
+	.4byte	.LASF751
 	.byte	0x2
 	.2byte	0x27c
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9328
 	.uleb128 0x32
-	.4byte	.LVL833
-	.4byte	0x5576
-	.4byte	0x54bc
+	.4byte	.LVL835
+	.4byte	0x55dd
+	.4byte	0x5523
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34394,9 +34469,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL834
-	.4byte	0x9222
-	.4byte	0x54e3
+	.4byte	.LVL836
+	.4byte	0x9289
+	.4byte	0x554a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34417,9 +34492,9 @@ __func__.9940:
 	.2byte	0x28a
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL835
-	.4byte	0x9222
-	.4byte	0x550a
+	.4byte	.LVL837
+	.4byte	0x9289
+	.4byte	0x5571
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34440,9 +34515,9 @@ __func__.9940:
 	.2byte	0x28b
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL837
+	.4byte	.LVL839
 	.4byte	0x230c
-	.4byte	0x5522
+	.4byte	0x5589
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34455,9 +34530,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL840
+	.4byte	.LVL842
 	.4byte	0x251a
-	.4byte	0x5545
+	.4byte	0x55ac
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34481,9 +34556,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL842
-	.4byte	0x9222
-	.4byte	0x555c
+	.4byte	.LVL844
+	.4byte	0x9289
+	.4byte	0x55c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34492,8 +34567,8 @@ __func__.9940:
 	.4byte	.LC86
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL843
-	.4byte	0x9222
+	.4byte	.LVL845
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34508,8 +34583,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF751
+	.uleb128 0x48
+	.4byte	.LASF752
 	.byte	0x2
 	.2byte	0x246
 	.4byte	0x50
@@ -34517,58 +34592,58 @@ __func__.9940:
 	.4byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5686
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x56ed
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x246
-	.4byte	0x4934
-	.4byte	.LLST206
-	.uleb128 0x48
+	.4byte	0x499b
+	.4byte	.LLST208
+	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdba
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdba
-	.4byte	.LLST207
-	.uleb128 0x51
-	.4byte	.LASF752
+	.4byte	.LLST209
+	.uleb128 0x54
+	.4byte	.LASF753
 	.byte	0x2
 	.2byte	0x249
 	.4byte	0xdba
-	.4byte	.LLST208
-	.uleb128 0x51
-	.4byte	.LASF753
+	.4byte	.LLST210
+	.uleb128 0x54
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x24a
 	.4byte	0x10e9
-	.4byte	.LLST209
-	.uleb128 0x51
-	.4byte	.LASF706
+	.4byte	.LLST211
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x24b
 	.4byte	0xff2
-	.4byte	.LLST210
-	.uleb128 0x51
-	.4byte	.LASF708
+	.4byte	.LLST212
+	.uleb128 0x54
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x24c
-	.4byte	0x493a
-	.4byte	.LLST211
+	.4byte	0x49a1
+	.4byte	.LLST213
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x5696
+	.4byte	0x56fd
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9314
 	.uleb128 0x32
-	.4byte	.LVL811
-	.4byte	0x9222
-	.4byte	0x5632
+	.4byte	.LVL813
+	.4byte	0x9289
+	.4byte	0x5699
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34589,12 +34664,12 @@ __func__.9940:
 	.2byte	0x250
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL812
-	.4byte	0x5dbf
+	.4byte	.LVL814
+	.4byte	0x5e26
 	.uleb128 0x32
-	.4byte	.LVL819
+	.4byte	.LVL821
 	.4byte	0x230c
-	.4byte	0x564f
+	.4byte	0x56b6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34603,9 +34678,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL824
+	.4byte	.LVL826
 	.4byte	0x251a
-	.4byte	0x5675
+	.4byte	0x56dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34629,8 +34704,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL825
-	.4byte	0x569b
+	.4byte	.LVL827
+	.4byte	0x5702
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34641,15 +34716,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5696
+	.4byte	0x56fd
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5686
-	.uleb128 0x45
-	.4byte	.LASF754
+	.4byte	0x56ed
+	.uleb128 0x48
+	.4byte	.LASF755
 	.byte	0x2
 	.2byte	0x218
 	.4byte	0x50
@@ -34657,49 +34732,49 @@ __func__.9940:
 	.4byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x57e5
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x584c
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x218
-	.4byte	0x4934
-	.4byte	.LLST218
-	.uleb128 0x51
-	.4byte	.LASF755
+	.4byte	0x499b
+	.4byte	.LLST220
+	.uleb128 0x54
+	.4byte	.LASF756
 	.byte	0x2
 	.2byte	0x21a
 	.4byte	0xdba
-	.4byte	.LLST219
-	.uleb128 0x51
-	.4byte	.LASF756
+	.4byte	.LLST221
+	.uleb128 0x54
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x21b
 	.4byte	0xdba
-	.4byte	.LLST220
-	.uleb128 0x51
+	.4byte	.LLST222
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x21c
 	.4byte	0xdba
-	.4byte	.LLST221
-	.uleb128 0x51
-	.4byte	.LASF753
+	.4byte	.LLST223
+	.uleb128 0x54
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x21d
 	.4byte	0x10e9
-	.4byte	.LLST222
-	.uleb128 0x51
-	.4byte	.LASF706
+	.4byte	.LLST224
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x21e
 	.4byte	0xff2
-	.4byte	.LLST223
-	.uleb128 0x51
-	.4byte	.LASF708
+	.4byte	.LLST225
+	.uleb128 0x54
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x21f
-	.4byte	0x493a
-	.4byte	.LLST224
+	.4byte	0x49a1
+	.4byte	.LLST226
 	.uleb128 0x3d
 	.4byte	.LASF574
 	.4byte	0x26b4
@@ -34707,9 +34782,9 @@ __func__.9940:
 	.byte	0x3
 	.4byte	__func__.9300
 	.uleb128 0x32
-	.4byte	.LVL848
-	.4byte	0x583d
-	.4byte	0x5748
+	.4byte	.LVL850
+	.4byte	0x58a4
+	.4byte	0x57af
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34718,9 +34793,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL851
-	.4byte	0x57e5
-	.4byte	0x575c
+	.4byte	.LVL853
+	.4byte	0x584c
+	.4byte	0x57c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34729,9 +34804,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL854
-	.4byte	0x5f01
-	.4byte	0x5775
+	.4byte	.LVL856
+	.4byte	0x5f68
+	.4byte	0x57dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34745,9 +34820,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL856
-	.4byte	0x57e5
-	.4byte	0x5789
+	.4byte	.LVL858
+	.4byte	0x584c
+	.4byte	0x57f0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34756,9 +34831,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL861
+	.4byte	.LVL863
 	.4byte	0x26b9
-	.4byte	0x57a7
+	.4byte	0x580e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34777,9 +34852,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL862
-	.4byte	0x9222
-	.4byte	0x57ce
+	.4byte	.LVL864
+	.4byte	0x9289
+	.4byte	0x5835
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34800,8 +34875,8 @@ __func__.9940:
 	.2byte	0x234
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL866
-	.4byte	0x5417
+	.4byte	.LVL868
+	.4byte	0x547e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34816,44 +34891,44 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF757
+	.uleb128 0x49
+	.4byte	.LASF758
 	.byte	0x2
 	.2byte	0x203
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x5828
-	.uleb128 0x47
-	.4byte	.LASF703
+	.4byte	0x588f
+	.uleb128 0x4a
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x203
-	.4byte	0x4934
-	.uleb128 0x48
-	.4byte	.LASF758
+	.4byte	0x499b
+	.uleb128 0x4b
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x205
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF753
+	.uleb128 0x4b
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x206
 	.4byte	0x10e9
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x5838
-	.4byte	.LASF757
+	.4byte	0x589f
+	.4byte	.LASF758
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5838
+	.4byte	0x589f
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5828
-	.uleb128 0x45
-	.4byte	.LASF759
+	.4byte	0x588f
+	.uleb128 0x48
+	.4byte	.LASF760
 	.byte	0x2
 	.2byte	0x1db
 	.4byte	0x50
@@ -34861,67 +34936,67 @@ __func__.9940:
 	.4byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x590c
-	.uleb128 0x4f
-	.4byte	.LASF703
+	.4byte	0x5973
+	.uleb128 0x52
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x1db
-	.4byte	0x4934
-	.4byte	.LLST199
+	.4byte	0x499b
+	.4byte	.LLST201
 	.uleb128 0x28
-	.4byte	.LASF753
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x1dd
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x5a
-	.uleb128 0x51
-	.4byte	.LASF706
+	.uleb128 0x54
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x1de
 	.4byte	0xff2
-	.4byte	.LLST200
+	.4byte	.LLST202
 	.uleb128 0x28
-	.4byte	.LASF760
+	.4byte	.LASF761
 	.byte	0x2
 	.2byte	0x1df
 	.4byte	0x10e9
 	.uleb128 0x1
 	.byte	0x55
-	.uleb128 0x51
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdba
-	.4byte	.LLST201
-	.uleb128 0x51
+	.4byte	.LLST203
+	.uleb128 0x54
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdba
-	.4byte	.LLST202
-	.uleb128 0x51
-	.4byte	.LASF758
+	.4byte	.LLST204
+	.uleb128 0x54
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x1e1
 	.4byte	0xdba
-	.4byte	.LLST203
-	.uleb128 0x51
-	.4byte	.LASF761
+	.4byte	.LLST205
+	.uleb128 0x54
+	.4byte	.LASF762
 	.byte	0x2
 	.2byte	0x1e2
 	.4byte	0xdba
-	.4byte	.LLST204
-	.uleb128 0x51
-	.4byte	.LASF756
+	.4byte	.LLST206
+	.uleb128 0x54
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x1e3
 	.4byte	0xdba
-	.4byte	.LLST205
+	.4byte	.LLST207
 	.uleb128 0x32
-	.4byte	.LVL788
+	.4byte	.LVL790
 	.4byte	0x230c
-	.4byte	0x58fc
+	.4byte	0x5963
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -34935,8 +35010,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL805
-	.4byte	0x5f01
+	.4byte	.LVL807
+	.4byte	0x5f68
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -34944,8 +35019,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF762
+	.uleb128 0x48
+	.4byte	.LASF763
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0x50
@@ -34953,28 +35028,28 @@ __func__.9940:
 	.4byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5a4e
-	.uleb128 0x4f
+	.4byte	0x5ab5
+	.uleb128 0x52
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdba
-	.4byte	.LLST197
-	.uleb128 0x4f
-	.4byte	.LASF740
+	.4byte	.LLST199
+	.uleb128 0x52
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdba
-	.4byte	.LLST198
+	.4byte	.LLST200
 	.uleb128 0x28
-	.4byte	.LASF708
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x1bb
-	.4byte	0x493a
+	.4byte	0x49a1
 	.uleb128 0x1
 	.byte	0x5a
 	.uleb128 0x28
-	.4byte	.LASF763
+	.4byte	.LASF764
 	.byte	0x2
 	.2byte	0x1bc
 	.4byte	0xdc5
@@ -34982,14 +35057,14 @@ __func__.9940:
 	.byte	0x58
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x32d2
+	.4byte	0x3339
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9257
 	.uleb128 0x32
-	.4byte	.LVL774
-	.4byte	0x9222
-	.4byte	0x5998
+	.4byte	.LVL776
+	.4byte	0x9289
+	.4byte	0x59ff
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35010,9 +35085,9 @@ __func__.9940:
 	.2byte	0x1be
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL776
+	.4byte	.LVL778
 	.4byte	0x230c
-	.4byte	0x59ac
+	.4byte	0x5a13
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35021,9 +35096,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL778
+	.4byte	.LVL780
 	.4byte	0x26b9
-	.4byte	0x59ca
+	.4byte	0x5a31
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35042,9 +35117,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL780
-	.4byte	0x9222
-	.4byte	0x59ed
+	.4byte	.LVL782
+	.4byte	0x9289
+	.4byte	0x5a54
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35065,9 +35140,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL781
+	.4byte	.LVL783
 	.4byte	0x2836
-	.4byte	0x5a0e
+	.4byte	0x5a75
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35086,9 +35161,9 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL782
+	.4byte	.LVL784
 	.4byte	0x2836
-	.4byte	0x5a2a
+	.4byte	0x5a91
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35102,8 +35177,8 @@ __func__.9940:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL783
-	.4byte	0x9222
+	.4byte	.LVL785
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35124,60 +35199,60 @@ __func__.9940:
 	.2byte	0x1d3
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF764
+	.uleb128 0x49
+	.4byte	.LASF765
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x5acd
-	.uleb128 0x47
-	.4byte	.LASF649
+	.4byte	0x5b34
+	.uleb128 0x4a
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF765
+	.uleb128 0x4b
+	.4byte	.LASF766
 	.byte	0x2
 	.2byte	0x195
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF766
+	.uleb128 0x4b
+	.4byte	.LASF767
 	.byte	0x2
 	.2byte	0x196
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF767
+	.uleb128 0x4b
+	.4byte	.LASF768
 	.byte	0x2
 	.2byte	0x197
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF768
+	.uleb128 0x4b
+	.4byte	.LASF769
 	.byte	0x2
 	.2byte	0x199
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF769
+	.uleb128 0x4b
+	.4byte	.LASF770
 	.byte	0x2
 	.2byte	0x19a
 	.4byte	0xdc5
-	.uleb128 0x48
-	.4byte	.LASF652
+	.uleb128 0x4b
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1cc9
-	.uleb128 0x48
-	.4byte	.LASF770
+	.uleb128 0x4b
+	.4byte	.LASF771
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1cc9
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x4570
-	.4byte	.LASF764
+	.4byte	0x45d7
+	.4byte	.LASF765
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF771
+	.uleb128 0x48
+	.4byte	.LASF772
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0x50
@@ -35185,28 +35260,28 @@ __func__.9940:
 	.4byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5b18
-	.uleb128 0x4f
+	.4byte	0x5b7f
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0xdba
 	.4byte	.LLST67
-	.uleb128 0x51
-	.4byte	.LASF649
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x181
 	.4byte	0xdba
 	.4byte	.LLST68
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x182
 	.4byte	0x1cc9
 	.4byte	.LLST69
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF772
+	.uleb128 0x48
+	.4byte	.LASF773
 	.byte	0x2
 	.2byte	0x17a
 	.4byte	0x50
@@ -35214,16 +35289,16 @@ __func__.9940:
 	.4byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5b59
-	.uleb128 0x4f
-	.4byte	.LASF773
+	.4byte	0x5bc0
+	.uleb128 0x52
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x17a
-	.4byte	0x5b59
+	.4byte	0x5bc0
 	.4byte	.LLST66
 	.uleb128 0x2d
 	.4byte	.LVL186
-	.4byte	0x5b5f
+	.4byte	0x5bc6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35241,8 +35316,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x1cc9
-	.uleb128 0x45
-	.4byte	.LASF774
+	.uleb128 0x48
+	.4byte	.LASF775
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0x50
@@ -35250,34 +35325,34 @@ __func__.9940:
 	.4byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5bca
-	.uleb128 0x4f
-	.4byte	.LASF773
+	.4byte	0x5c31
+	.uleb128 0x52
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x167
-	.4byte	0x5b59
+	.4byte	0x5bc0
 	.4byte	.LLST62
-	.uleb128 0x4f
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0xdba
 	.4byte	.LLST63
-	.uleb128 0x51
-	.4byte	.LASF649
+	.uleb128 0x54
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x169
 	.4byte	0xdba
 	.4byte	.LLST64
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x16a
 	.4byte	0x1cc9
 	.4byte	.LLST65
 	.uleb128 0x34
 	.4byte	.LVL178
-	.4byte	0x5bca
+	.4byte	0x5c31
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -35286,8 +35361,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF775
+	.uleb128 0x48
+	.4byte	.LASF776
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0x50
@@ -35295,41 +35370,41 @@ __func__.9940:
 	.4byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5c55
-	.uleb128 0x4f
-	.4byte	.LASF773
+	.4byte	0x5cbc
+	.uleb128 0x52
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x14c
-	.4byte	0x5b59
+	.4byte	0x5bc0
 	.4byte	.LLST59
-	.uleb128 0x4f
-	.4byte	.LASF649
+	.uleb128 0x52
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0xdba
 	.4byte	.LLST60
 	.uleb128 0x28
-	.4byte	.LASF652
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1cc9
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x51
-	.4byte	.LASF776
+	.uleb128 0x54
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1cc9
 	.4byte	.LLST61
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x5c65
+	.4byte	0x5ccc
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9216
 	.uleb128 0x34
 	.4byte	.LVL168
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35352,15 +35427,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x5c65
+	.4byte	0x5ccc
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5c55
-	.uleb128 0x45
-	.4byte	.LASF777
+	.4byte	0x5cbc
+	.uleb128 0x48
+	.4byte	.LASF778
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0x50
@@ -35368,47 +35443,47 @@ __func__.9940:
 	.4byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5ce3
-	.uleb128 0x4f
-	.4byte	.LASF649
+	.4byte	0x5d4a
+	.uleb128 0x52
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0xdba
 	.4byte	.LLST53
-	.uleb128 0x51
-	.4byte	.LASF652
+	.uleb128 0x54
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1cc9
 	.4byte	.LLST54
-	.uleb128 0x51
-	.4byte	.LASF776
+	.uleb128 0x54
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1cc9
 	.4byte	.LLST55
 	.uleb128 0x28
-	.4byte	.LASF778
+	.4byte	.LASF779
 	.byte	0x2
 	.2byte	0x11e
 	.4byte	0xdba
 	.uleb128 0x1
 	.byte	0x58
-	.uleb128 0x51
-	.4byte	.LASF779
+	.uleb128 0x54
+	.4byte	.LASF780
 	.byte	0x2
 	.2byte	0x11f
 	.4byte	0xdba
 	.4byte	.LLST56
-	.uleb128 0x51
-	.4byte	.LASF780
+	.uleb128 0x54
+	.4byte	.LASF781
 	.byte	0x2
 	.2byte	0x120
 	.4byte	0xdba
 	.4byte	.LLST57
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF781
+	.4byte	.LASF782
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0x50
@@ -35416,90 +35491,90 @@ __func__.9940:
 	.4byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d75
+	.4byte	0x5ddc
 	.uleb128 0x2c
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0xdba
 	.4byte	.LLST44
 	.uleb128 0x30
-	.4byte	.LASF652
+	.4byte	.LASF653
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1cc9
 	.4byte	.LLST45
 	.uleb128 0x30
-	.4byte	.LASF776
+	.4byte	.LASF777
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1cc9
 	.4byte	.LLST46
 	.uleb128 0x30
-	.4byte	.LASF782
+	.4byte	.LASF783
 	.byte	0x2
 	.byte	0xdb
 	.4byte	0xdba
 	.4byte	.LLST47
 	.uleb128 0x30
-	.4byte	.LASF783
+	.4byte	.LASF784
 	.byte	0x2
 	.byte	0xdc
 	.4byte	0xdba
 	.4byte	.LLST48
 	.uleb128 0x30
-	.4byte	.LASF767
+	.4byte	.LASF768
 	.byte	0x2
 	.byte	0xdd
 	.4byte	0xdc5
 	.4byte	.LLST49
 	.uleb128 0x30
-	.4byte	.LASF784
+	.4byte	.LASF785
 	.byte	0x2
 	.byte	0xde
 	.4byte	0xdc5
 	.4byte	.LLST50
 	.uleb128 0x30
-	.4byte	.LASF780
+	.4byte	.LASF781
 	.byte	0x2
 	.byte	0xdf
 	.4byte	0xdba
 	.4byte	.LLST51
 	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF785
+	.uleb128 0x66
+	.4byte	.LASF786
 	.byte	0x2
 	.byte	0xb9
 	.byte	0x1
-	.4byte	0x5d9a
+	.4byte	0x5e01
 	.uleb128 0x36
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb9
 	.4byte	0xdba
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x5c65
-	.4byte	.LASF785
-	.byte	0
-	.uleb128 0x64
+	.4byte	0x5ccc
 	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x66
+	.4byte	.LASF787
 	.byte	0x2
 	.byte	0xb2
 	.byte	0x1
-	.4byte	0x5dbf
+	.4byte	0x5e26
 	.uleb128 0x36
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb2
 	.4byte	0xdba
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.4byte	.LASF574
-	.4byte	0x5c65
-	.4byte	.LASF786
+	.4byte	0x5ccc
+	.4byte	.LASF787
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF787
+	.4byte	.LASF788
 	.byte	0x2
 	.byte	0xa4
 	.4byte	0xdba
@@ -35507,28 +35582,28 @@ __func__.9940:
 	.4byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x3b
 	.ascii	"tmp\000"
 	.byte	0x2
 	.byte	0xa6
 	.4byte	0xdba
 	.4byte	.LLST42
-	.uleb128 0x5f
-	.4byte	.LBB174
-	.4byte	.LBE174-.LBB174
-	.4byte	0x5e02
+	.uleb128 0x61
+	.4byte	.LBB176
+	.4byte	.LBE176-.LBB176
+	.4byte	0x5e69
 	.uleb128 0x3b
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0xa9
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.4byte	.LLST43
 	.byte	0
-	.uleb128 0x65
-	.4byte	0x5fac
-	.4byte	.LBB172
-	.4byte	.LBE172-.LBB172
+	.uleb128 0x67
+	.4byte	0x6013
+	.4byte	.LBB174
+	.4byte	.LBE174-.LBB174
 	.byte	0x2
 	.byte	0xa8
 	.byte	0
@@ -35536,7 +35611,7 @@ __func__.9940:
 	.byte	0x4
 	.4byte	0x1595
 	.uleb128 0x2b
-	.4byte	.LASF788
+	.4byte	.LASF789
 	.byte	0x2
 	.byte	0x92
 	.4byte	0x50
@@ -35544,7 +35619,7 @@ __func__.9940:
 	.4byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e7c
+	.4byte	0x5ee3
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x2
@@ -35567,27 +35642,27 @@ __func__.9940:
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x96
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x66
-	.4byte	0x5fa0
-	.4byte	.LBB168
+	.uleb128 0x68
+	.4byte	0x6007
+	.4byte	.LBB170
 	.4byte	.Ldebug_ranges0+0x18
 	.byte	0x2
 	.byte	0x98
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
 	.byte	0x73
 	.4byte	.LFB244
 	.4byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5f01
+	.4byte	0x5f68
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x2
@@ -35607,19 +35682,19 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST35
 	.uleb128 0x30
-	.4byte	.LASF599
+	.4byte	.LASF602
 	.byte	0x2
 	.byte	0x76
 	.4byte	0xdba
 	.4byte	.LLST36
 	.uleb128 0x30
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
 	.byte	0x77
 	.4byte	0xdba
 	.4byte	.LLST37
 	.uleb128 0x30
-	.4byte	.LASF791
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x78
 	.4byte	0xdc5
@@ -35628,59 +35703,59 @@ __func__.9940:
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x44
 	.4byte	.LVL85
-	.4byte	0x6122
+	.4byte	0x6189
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF792
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5fa0
+	.4byte	0x6007
 	.uleb128 0x2f
 	.ascii	"blk\000"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST175
+	.4byte	.LLST177
 	.uleb128 0x2c
-	.4byte	.LASF793
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdba
-	.4byte	.LLST176
-	.uleb128 0x5f
-	.4byte	.LBB223
-	.4byte	.LBE223-.LBB223
-	.4byte	0x5f90
+	.4byte	.LLST178
+	.uleb128 0x61
+	.4byte	.LBB227
+	.4byte	.LBE227-.LBB227
+	.4byte	0x5ff7
 	.uleb128 0x3b
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x64
-	.4byte	0x5e12
-	.4byte	.LLST177
-	.uleb128 0x67
-	.4byte	.LBB224
-	.4byte	.LBE224-.LBB224
+	.4byte	0x5e79
+	.4byte	.LLST179
+	.uleb128 0x69
+	.4byte	.LBB228
+	.4byte	.LBE228-.LBB228
 	.uleb128 0x30
-	.4byte	.LASF794
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x66
 	.4byte	0xdba
-	.4byte	.LLST178
+	.4byte	.LLST180
 	.uleb128 0x32
-	.4byte	.LVL635
-	.4byte	0x6122
-	.4byte	0x5f7a
+	.4byte	.LVL637
+	.4byte	0x6189
+	.4byte	0x5fe1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35689,7 +35764,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL637
+	.4byte	.LVL639
 	.4byte	0x2464
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35704,27 +35779,27 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x65
-	.4byte	0x5fa0
-	.4byte	.LBB221
-	.4byte	.LBE221-.LBB221
+	.uleb128 0x67
+	.4byte	0x6007
+	.4byte	.LBB225
+	.4byte	.LBE225-.LBB225
 	.byte	0x2
 	.byte	0x63
 	.byte	0
-	.uleb128 0x68
-	.4byte	.LASF795
+	.uleb128 0x6a
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdba
 	.byte	0x1
-	.uleb128 0x68
-	.4byte	.LASF796
+	.uleb128 0x6a
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdba
 	.byte	0x1
 	.uleb128 0x2b
-	.4byte	.LASF797
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdba
@@ -35732,24 +35807,24 @@ __func__.9940:
 	.4byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6011
+	.4byte	0x6078
 	.uleb128 0x2f
 	.ascii	"max\000"
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdba
-	.4byte	.LLST196
+	.4byte	.LLST198
 	.uleb128 0x3a
 	.ascii	"Q\000"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x5e12
+	.4byte	0x5e79
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x34
-	.4byte	.LVL770
+	.4byte	.LVL772
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35772,7 +35847,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF798
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
@@ -35780,19 +35855,19 @@ __func__.9940:
 	.4byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x60dd
+	.4byte	0x6144
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdc5
-	.4byte	.LLST157
+	.4byte	.LLST159
 	.uleb128 0x2c
 	.4byte	.LASF568
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x50
-	.4byte	.LLST158
+	.4byte	.LLST160
 	.uleb128 0x3a
 	.ascii	"req\000"
 	.byte	0x2
@@ -35806,9 +35881,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST159
+	.4byte	.LLST161
 	.uleb128 0x29
-	.4byte	.LASF799
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
@@ -35819,9 +35894,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xddb
-	.4byte	.LLST160
+	.4byte	.LLST162
 	.uleb128 0x29
-	.4byte	.LASF800
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x32
 	.4byte	0x2454
@@ -35829,15 +35904,15 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -88
 	.uleb128 0x30
-	.4byte	.LASF801
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdba
-	.4byte	.LLST161
+	.4byte	.LLST163
 	.uleb128 0x32
-	.4byte	.LVL591
+	.4byte	.LVL593
 	.4byte	0x26b9
-	.4byte	0x60c0
+	.4byte	0x6127
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -35857,7 +35932,7 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL596
+	.4byte	.LVL598
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -35879,7 +35954,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF802
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35887,15 +35962,15 @@ __func__.9940:
 	.4byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6122
+	.4byte	0x6189
 	.uleb128 0x2c
-	.4byte	.LASF803
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
 	.4byte	.LLST31
-	.uleb128 0x58
-	.4byte	.LASF804
+	.uleb128 0x5b
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdc5
@@ -35909,7 +35984,7 @@ __func__.9940:
 	.4byte	.LLST32
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF805
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
@@ -35917,22 +35992,22 @@ __func__.9940:
 	.4byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x615a
+	.4byte	0x61c1
 	.uleb128 0x2c
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdba
 	.4byte	.LLST29
 	.uleb128 0x30
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdba
 	.4byte	.LLST30
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF806
+	.4byte	.LASF807
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
@@ -35940,22 +36015,22 @@ __func__.9940:
 	.4byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6192
+	.4byte	0x61f9
 	.uleb128 0x2c
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdba
 	.4byte	.LLST27
 	.uleb128 0x30
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdba
 	.4byte	.LLST28
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF807
+	.4byte	.LASF808
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
@@ -35963,28 +36038,28 @@ __func__.9940:
 	.4byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x61d9
+	.4byte	0x6240
 	.uleb128 0x2c
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST24
 	.uleb128 0x2c
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdba
 	.4byte	.LLST25
 	.uleb128 0x30
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdba
 	.4byte	.LLST26
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF808
+	.uleb128 0x48
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xdd0
@@ -35992,45 +36067,45 @@ __func__.9940:
 	.4byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x63c0
-	.uleb128 0x50
+	.4byte	0x6427
+	.uleb128 0x53
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdc5
-	.4byte	.LLST346
-	.uleb128 0x50
+	.4byte	.LLST348
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdba
-	.4byte	.LLST347
-	.uleb128 0x51
+	.4byte	.LLST349
+	.uleb128 0x54
 	.4byte	.LASF577
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdc5
-	.4byte	.LLST348
-	.uleb128 0x51
-	.4byte	.LASF809
+	.4byte	.LLST350
+	.uleb128 0x54
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x63c0
-	.4byte	.LLST349
-	.uleb128 0x4a
-	.4byte	.LASF810
+	.4byte	0x6427
+	.4byte	.LLST351
+	.uleb128 0x4d
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x44
-	.4byte	.LVL1460
-	.4byte	0x65bc
+	.4byte	.LVL1462
+	.4byte	0x6623
 	.uleb128 0x44
-	.4byte	.LVL1461
-	.4byte	0x63c6
+	.4byte	.LVL1463
+	.4byte	0x642d
 	.uleb128 0x32
-	.4byte	.LVL1465
-	.4byte	0x67c5
-	.4byte	0x6261
+	.4byte	.LVL1467
+	.4byte	0x682c
+	.4byte	0x62c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36039,9 +36114,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1466
+	.4byte	.LVL1468
 	.4byte	0x2410
-	.4byte	0x6275
+	.4byte	0x62dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36050,9 +36125,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1467
-	.4byte	0x6828
-	.4byte	0x6289
+	.4byte	.LVL1469
+	.4byte	0x688f
+	.4byte	0x62f0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36061,9 +36136,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1473
+	.4byte	.LVL1475
 	.4byte	0x26b9
-	.4byte	0x62a7
+	.4byte	0x630e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36082,12 +36157,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1474
+	.4byte	.LVL1476
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1476
-	.4byte	0x6828
-	.4byte	0x62c4
+	.4byte	.LVL1478
+	.4byte	0x688f
+	.4byte	0x632b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36096,9 +36171,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1478
+	.4byte	.LVL1480
 	.4byte	0x236c
-	.4byte	0x62d8
+	.4byte	0x633f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36107,15 +36182,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1479
-	.4byte	0x6739
-	.uleb128 0x44
 	.4byte	.LVL1481
-	.4byte	0x67c5
+	.4byte	0x67a0
+	.uleb128 0x44
+	.4byte	.LVL1483
+	.4byte	0x682c
 	.uleb128 0x32
-	.4byte	.LVL1482
+	.4byte	.LVL1484
 	.4byte	0x230c
-	.4byte	0x6302
+	.4byte	0x6369
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36128,9 +36203,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1483
+	.4byte	.LVL1485
 	.4byte	0x230c
-	.4byte	0x631c
+	.4byte	0x6383
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36144,12 +36219,12 @@ __func__.9940:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1485
+	.4byte	.LVL1487
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1486
+	.4byte	.LVL1488
 	.4byte	0x2464
-	.4byte	0x6343
+	.4byte	0x63aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36168,9 +36243,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1487
+	.4byte	.LVL1489
 	.4byte	0x251a
-	.4byte	0x6366
+	.4byte	0x63cd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36194,9 +36269,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1488
-	.4byte	0x6828
-	.4byte	0x637a
+	.4byte	.LVL1490
+	.4byte	0x688f
+	.4byte	0x63e1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36205,12 +36280,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1493
-	.4byte	0x6828
+	.4byte	.LVL1495
+	.4byte	0x688f
 	.uleb128 0x32
-	.4byte	.LVL1496
+	.4byte	.LVL1498
 	.4byte	0x2464
-	.4byte	0x639b
+	.4byte	0x6402
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36223,23 +36298,23 @@ __func__.9940:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1497
-	.4byte	0x6828
-	.uleb128 0x44
-	.4byte	.LVL1498
-	.4byte	0x6828
-	.uleb128 0x44
 	.4byte	.LVL1499
-	.4byte	0x65f0
+	.4byte	0x688f
+	.uleb128 0x44
+	.4byte	.LVL1500
+	.4byte	0x688f
 	.uleb128 0x44
 	.4byte	.LVL1501
-	.4byte	0x65f0
+	.4byte	0x6657
+	.uleb128 0x44
+	.4byte	.LVL1503
+	.4byte	0x6657
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x11b9
-	.uleb128 0x45
-	.4byte	.LASF811
+	.uleb128 0x48
+	.4byte	.LASF812
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x50
@@ -36247,35 +36322,35 @@ __func__.9940:
 	.4byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6437
-	.uleb128 0x5e
+	.4byte	0x649e
+	.uleb128 0x60
 	.ascii	"die\000"
 	.byte	0x4
 	.2byte	0x118
 	.4byte	0xdc5
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"blk\000"
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdba
-	.4byte	.LLST155
-	.uleb128 0x51
-	.4byte	.LASF812
+	.4byte	.LLST157
+	.uleb128 0x54
+	.4byte	.LASF813
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdc5
-	.4byte	.LLST156
+	.4byte	.LLST158
 	.uleb128 0x28
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x63c0
+	.4byte	0x6427
 	.uleb128 0x1
 	.byte	0x58
 	.uleb128 0x34
-	.4byte	.LVL580
+	.4byte	.LVL582
 	.4byte	0x26b9
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36296,7 +36371,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF813
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x50
@@ -36304,44 +36379,44 @@ __func__.9940:
 	.4byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6566
+	.4byte	0x65cd
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdc5
-	.4byte	.LLST342
+	.4byte	.LLST344
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdba
-	.4byte	.LLST343
+	.4byte	.LLST345
 	.uleb128 0x30
-	.4byte	.LASF705
+	.4byte	.LASF706
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xddb
-	.4byte	.LLST344
+	.4byte	.LLST346
 	.uleb128 0x30
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x63c0
-	.4byte	.LLST345
+	.4byte	0x6427
+	.4byte	.LLST347
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x6576
+	.4byte	0x65dd
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9058
 	.uleb128 0x44
-	.4byte	.LVL1435
-	.4byte	0x65bc
-	.uleb128 0x32
 	.4byte	.LVL1437
+	.4byte	0x6623
+	.uleb128 0x32
+	.4byte	.LVL1439
 	.4byte	0x26b9
-	.4byte	0x64c0
+	.4byte	0x6527
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36360,9 +36435,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1438
+	.4byte	.LVL1440
 	.4byte	0x26b9
-	.4byte	0x64de
+	.4byte	0x6545
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36381,9 +36456,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1440
+	.4byte	.LVL1442
 	.4byte	0x26b9
-	.4byte	0x64fc
+	.4byte	0x6563
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36402,9 +36477,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1441
-	.4byte	0x6011
-	.4byte	0x650f
+	.4byte	.LVL1443
+	.4byte	0x6078
+	.4byte	0x6576
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36412,9 +36487,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1443
-	.4byte	0x9222
-	.4byte	0x6535
+	.4byte	.LVL1445
+	.4byte	0x9289
+	.4byte	0x659c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36435,12 +36510,12 @@ __func__.9940:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1444
-	.4byte	0x7a7c
+	.4byte	.LVL1446
+	.4byte	0x7ae3
 	.uleb128 0x32
-	.4byte	.LVL1452
+	.4byte	.LVL1454
 	.4byte	0x26b9
-	.4byte	0x655c
+	.4byte	0x65c3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36459,20 +36534,20 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1457
+	.4byte	.LVL1459
 	.4byte	0x22a6
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x6576
+	.4byte	0x65dd
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x6566
+	.4byte	0x65cd
 	.uleb128 0x2b
-	.4byte	.LASF814
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdba
@@ -36480,7 +36555,7 @@ __func__.9940:
 	.4byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65bc
+	.4byte	0x6623
 	.uleb128 0x3b
 	.ascii	"blk\000"
 	.byte	0x4
@@ -36488,26 +36563,26 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST22
 	.uleb128 0x30
-	.4byte	.LASF815
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdba
 	.4byte	.LLST23
 	.uleb128 0x44
 	.4byte	.LVL59
-	.4byte	0x67c5
+	.4byte	0x682c
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF816
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x94
 	.4byte	.LFB230
 	.4byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x65f0
+	.4byte	0x6657
 	.uleb128 0x2d
-	.4byte	.LVL767
+	.4byte	.LVL769
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -36529,7 +36604,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF817
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x50
@@ -36537,42 +36612,42 @@ __func__.9940:
 	.4byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6739
+	.4byte	0x67a0
 	.uleb128 0x3b
 	.ascii	"i\000"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x50
-	.4byte	.LLST288
+	.4byte	.LLST290
 	.uleb128 0x30
-	.4byte	.LASF818
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x50
-	.4byte	.LLST289
+	.4byte	.LLST291
 	.uleb128 0x30
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x63c0
-	.4byte	.LLST290
+	.4byte	0x6427
+	.4byte	.LLST292
 	.uleb128 0x30
-	.4byte	.LASF721
+	.4byte	.LASF722
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdba
-	.4byte	.LLST291
-	.uleb128 0x54
-	.4byte	.LASF819
+	.4byte	.LLST293
+	.uleb128 0x57
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x69
+	.uleb128 0x6b
 	.4byte	.LASF574
 	.4byte	0x26b4
 	.uleb128 0x32
-	.4byte	.LVL1162
+	.4byte	.LVL1164
 	.4byte	0x230c
-	.4byte	0x6667
+	.4byte	0x66ce
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36581,9 +36656,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1165
+	.4byte	.LVL1167
 	.4byte	0x230c
-	.4byte	0x6686
+	.4byte	0x66ed
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36603,9 +36678,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1167
-	.4byte	0x9222
-	.4byte	0x669d
+	.4byte	.LVL1169
+	.4byte	0x9289
+	.4byte	0x6704
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36614,9 +36689,9 @@ __func__.9940:
 	.4byte	.LC94
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1168
+	.4byte	.LVL1170
 	.4byte	0x251a
-	.4byte	0x66c0
+	.4byte	0x6727
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36640,9 +36715,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1169
+	.4byte	.LVL1171
 	.4byte	0x2464
-	.4byte	0x66d8
+	.4byte	0x673f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -36655,9 +36730,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1170
+	.4byte	.LVL1172
 	.4byte	0x251a
-	.4byte	0x66fb
+	.4byte	0x6762
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36681,9 +36756,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1172
-	.4byte	0x9222
-	.4byte	0x6712
+	.4byte	.LVL1174
+	.4byte	0x9289
+	.4byte	0x6779
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36692,9 +36767,9 @@ __func__.9940:
 	.4byte	.LC95
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1173
-	.4byte	0x9222
-	.4byte	0x672f
+	.4byte	.LVL1175
+	.4byte	0x9289
+	.4byte	0x6796
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36709,30 +36784,30 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1176
+	.4byte	.LVL1178
 	.4byte	0x22a6
 	.byte	0
 	.uleb128 0x42
-	.4byte	.LASF820
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x41
 	.4byte	.LFB228
 	.4byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x67bd
+	.4byte	0x6824
 	.uleb128 0x2c
-	.4byte	.LASF753
+	.4byte	.LASF754
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10e9
-	.4byte	.LLST194
+	.4byte	.LLST196
 	.uleb128 0x2c
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x41
 	.4byte	0xff2
-	.4byte	.LLST195
+	.4byte	.LLST197
 	.uleb128 0x31
 	.ascii	"i\000"
 	.byte	0x4
@@ -36740,14 +36815,14 @@ __func__.9940:
 	.4byte	0xdc5
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x3b93
+	.4byte	0x3bfa
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.9015
 	.uleb128 0x32
-	.4byte	.LVL764
+	.4byte	.LVL766
 	.4byte	0x230c
-	.4byte	0x679d
+	.4byte	0x6804
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36761,8 +36836,8 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL765
-	.4byte	0x9222
+	.4byte	.LVL767
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36783,13 +36858,13 @@ __func__.9940:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
-	.4byte	.LASF822
+	.uleb128 0x6c
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x39
-	.4byte	.LASF823
+	.4byte	.LASF824
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x50
@@ -36797,7 +36872,7 @@ __func__.9940:
 	.4byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6828
+	.4byte	0x688f
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36817,7 +36892,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST19
 	.uleb128 0x30
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0xff2
@@ -36830,7 +36905,7 @@ __func__.9940:
 	.4byte	.LLST21
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF824
+	.4byte	.LASF825
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x50
@@ -36838,7 +36913,7 @@ __func__.9940:
 	.4byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x689d
+	.4byte	0x6904
 	.uleb128 0x2c
 	.4byte	.LASF388
 	.byte	0x4
@@ -36852,7 +36927,7 @@ __func__.9940:
 	.4byte	0xdc5
 	.4byte	.LLST14
 	.uleb128 0x30
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x7
 	.4byte	0xff2
@@ -36865,7 +36940,7 @@ __func__.9940:
 	.4byte	.LLST16
 	.uleb128 0x34
 	.4byte	.LVL45
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36886,8 +36961,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	.LASF884
+	.uleb128 0x6d
+	.4byte	.LASF887
 	.byte	0x3
 	.2byte	0x4bd
 	.4byte	0xdc5
@@ -36895,8 +36970,8 @@ __func__.9940:
 	.4byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x45
-	.4byte	.LASF825
+	.uleb128 0x48
+	.4byte	.LASF826
 	.byte	0x3
 	.2byte	0x4b8
 	.4byte	0x50
@@ -36904,28 +36979,28 @@ __func__.9940:
 	.4byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6922
-	.uleb128 0x4f
+	.4byte	0x6989
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
 	.2byte	0x4b8
 	.4byte	0xb5
-	.4byte	.LLST443
-	.uleb128 0x4f
+	.4byte	.LLST445
+	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
 	.2byte	0x4b8
 	.4byte	0xb5
-	.4byte	.LLST444
-	.uleb128 0x5a
+	.4byte	.LLST446
+	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
 	.2byte	0x4b8
-	.4byte	0x6922
-	.4byte	.LLST445
+	.4byte	0x6989
+	.4byte	.LLST447
 	.uleb128 0x2d
-	.4byte	.LVL1969
-	.4byte	0x6a9b
+	.4byte	.LVL1971
+	.4byte	0x6b02
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -36957,8 +37032,8 @@ __func__.9940:
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0x90
-	.uleb128 0x45
-	.4byte	.LASF826
+	.uleb128 0x48
+	.4byte	.LASF827
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0x50
@@ -36966,28 +37041,28 @@ __func__.9940:
 	.4byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6997
-	.uleb128 0x4f
+	.4byte	0x69fe
+	.uleb128 0x52
 	.4byte	.LASF236
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb5
-	.4byte	.LLST425
-	.uleb128 0x4f
+	.4byte	.LLST427
+	.uleb128 0x52
 	.4byte	.LASF325
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb5
-	.4byte	.LLST426
-	.uleb128 0x5a
+	.4byte	.LLST428
+	.uleb128 0x5d
 	.ascii	"buf\000"
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x6922
-	.4byte	.LLST427
+	.4byte	0x6989
+	.4byte	.LLST429
 	.uleb128 0x2d
-	.4byte	.LVL1868
-	.4byte	0x70a1
+	.4byte	.LVL1870
+	.4byte	0x7108
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37016,8 +37091,8 @@ __func__.9940:
 	.byte	0x52
 	.byte	0
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF827
+	.uleb128 0x5c
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0x50
@@ -37025,39 +37100,39 @@ __func__.9940:
 	.4byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6a9b
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	0x6b02
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdc5
-	.4byte	.LLST383
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST385
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdc5
-	.4byte	.LLST384
-	.uleb128 0x51
-	.4byte	.LASF734
+	.4byte	.LLST386
+	.uleb128 0x54
+	.4byte	.LASF735
 	.byte	0x3
 	.2byte	0x486
 	.4byte	0xdba
-	.4byte	.LLST385
-	.uleb128 0x50
+	.4byte	.LLST387
+	.uleb128 0x53
 	.ascii	"tmp\000"
 	.byte	0x3
 	.2byte	0x487
 	.4byte	0xdba
-	.4byte	.LLST386
-	.uleb128 0x50
+	.4byte	.LLST388
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x488
 	.4byte	0xdc5
-	.4byte	.LLST387
+	.4byte	.LLST389
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdc5
@@ -37065,32 +37140,32 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x28
-	.4byte	.LASF640
+	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -28
-	.uleb128 0x51
-	.4byte	.LASF629
+	.uleb128 0x54
+	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x48a
 	.4byte	0xdba
-	.4byte	.LLST388
+	.4byte	.LLST390
 	.uleb128 0x44
-	.4byte	.LVL1633
-	.4byte	0x6e77
+	.4byte	.LVL1635
+	.4byte	0x6ede
 	.uleb128 0x44
-	.4byte	.LVL1643
-	.4byte	0x5313
+	.4byte	.LVL1645
+	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL1644
-	.4byte	0x4d0e
+	.4byte	.LVL1646
+	.4byte	0x4d75
 	.uleb128 0x32
-	.4byte	.LVL1645
-	.4byte	0x5212
-	.4byte	0x6a69
+	.4byte	.LVL1647
+	.4byte	0x5279
+	.4byte	0x6ad0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37110,9 +37185,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1646
-	.4byte	0x5212
-	.4byte	0x6a88
+	.4byte	.LVL1648
+	.4byte	0x5279
+	.4byte	0x6aef
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37132,14 +37207,14 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1647
-	.4byte	0x6122
+	.4byte	.LVL1649
+	.4byte	0x6189
 	.uleb128 0x44
-	.4byte	.LVL1648
-	.4byte	0x31f2
+	.4byte	.LVL1650
+	.4byte	0x3259
 	.byte	0
-	.uleb128 0x59
-	.4byte	.LASF828
+	.uleb128 0x5c
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0x50
@@ -37147,116 +37222,116 @@ __func__.9940:
 	.4byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6e77
-	.uleb128 0x5a
+	.4byte	0x6ede
+	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdaf
-	.4byte	.LLST428
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	.LLST430
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdc5
-	.4byte	.LLST429
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST431
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdc5
-	.4byte	.LLST430
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST432
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x50e9
-	.4byte	.LLST431
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	0x5150
+	.4byte	.LLST433
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x3c3
-	.4byte	0x2a63
-	.4byte	.LLST432
-	.uleb128 0x50
+	.4byte	0x2aca
+	.4byte	.LLST434
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdc5
-	.4byte	.LLST433
-	.uleb128 0x51
-	.4byte	.LASF829
+	.4byte	.LLST435
+	.uleb128 0x54
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdc5
-	.4byte	.LLST434
-	.uleb128 0x51
-	.4byte	.LASF830
+	.4byte	.LLST436
+	.uleb128 0x54
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdc5
-	.4byte	.LLST435
+	.4byte	.LLST437
 	.uleb128 0x28
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdc5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdc5
-	.4byte	.LLST436
-	.uleb128 0x50
+	.4byte	.LLST438
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdc5
-	.4byte	.LLST437
-	.uleb128 0x51
-	.4byte	.LASF831
+	.4byte	.LLST439
+	.uleb128 0x54
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdc5
-	.4byte	.LLST438
-	.uleb128 0x51
-	.4byte	.LASF593
+	.4byte	.LLST440
+	.uleb128 0x54
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdc5
-	.4byte	.LLST439
-	.uleb128 0x51
-	.4byte	.LASF832
+	.4byte	.LLST441
+	.uleb128 0x54
+	.4byte	.LASF833
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdc5
-	.4byte	.LLST440
-	.uleb128 0x51
-	.4byte	.LASF833
+	.4byte	.LLST442
+	.uleb128 0x54
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdc5
-	.4byte	.LLST441
-	.uleb128 0x51
-	.4byte	.LASF639
+	.4byte	.LLST443
+	.uleb128 0x54
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x3c8
 	.4byte	0x1d79
-	.4byte	.LLST442
+	.4byte	.LLST444
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x530e
+	.4byte	0x5375
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8951
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x190
-	.4byte	0x6c38
+	.4byte	0x6c9f
 	.uleb128 0x28
-	.4byte	.LASF601
+	.4byte	.LASF604
 	.byte	0x3
 	.2byte	0x43d
 	.4byte	0xde6
@@ -37264,9 +37339,9 @@ __func__.9940:
 	.byte	0x91
 	.sleb128 -52
 	.uleb128 0x32
-	.4byte	.LVL1952
+	.4byte	.LVL1954
 	.4byte	0x26b9
-	.4byte	0x6bf7
+	.4byte	0x6c5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37285,9 +37360,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1954
-	.4byte	0x9222
-	.4byte	0x6c14
+	.4byte	.LVL1956
+	.4byte	0x9289
+	.4byte	0x6c7b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37302,8 +37377,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1955
-	.4byte	0x9222
+	.4byte	.LVL1957
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37325,9 +37400,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1873
-	.4byte	0x50ef
-	.4byte	0x6c5d
+	.4byte	.LVL1875
+	.4byte	0x5156
+	.4byte	0x6cc4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37350,12 +37425,12 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1885
-	.4byte	0x6e77
-	.uleb128 0x32
 	.4byte	.LVL1887
-	.4byte	0x9222
-	.4byte	0x6c8d
+	.4byte	0x6ede
+	.uleb128 0x32
+	.4byte	.LVL1889
+	.4byte	0x9289
+	.4byte	0x6cf4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37376,12 +37451,12 @@ __func__.9940:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1888
-	.4byte	0x6e77
-	.uleb128 0x32
 	.4byte	.LVL1890
-	.4byte	0x33c9
-	.4byte	0x6cad
+	.4byte	0x6ede
+	.uleb128 0x32
+	.4byte	.LVL1892
+	.4byte	0x3430
+	.4byte	0x6d14
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37390,9 +37465,9 @@ __func__.9940:
 	.4byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1891
-	.4byte	0x33c9
-	.4byte	0x6cc4
+	.4byte	.LVL1893
+	.4byte	0x3430
+	.4byte	0x6d2b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37401,9 +37476,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1893
-	.4byte	0x33c9
-	.4byte	0x6cd8
+	.4byte	.LVL1895
+	.4byte	0x3430
+	.4byte	0x6d3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37412,9 +37487,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1896
-	.4byte	0x9222
-	.4byte	0x6cff
+	.4byte	.LVL1898
+	.4byte	0x9289
+	.4byte	0x6d66
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37435,9 +37510,9 @@ __func__.9940:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1905
-	.4byte	0x2996
-	.4byte	0x6d1e
+	.4byte	.LVL1907
+	.4byte	0x29fd
+	.4byte	0x6d85
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37456,9 +37531,9 @@ __func__.9940:
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1907
-	.4byte	0x5acd
-	.4byte	0x6d31
+	.4byte	.LVL1909
+	.4byte	0x5b34
+	.4byte	0x6d98
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37466,12 +37541,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1908
-	.4byte	0x2bbf
+	.4byte	.LVL1910
+	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL1909
-	.4byte	0x2996
-	.4byte	0x6d52
+	.4byte	.LVL1911
+	.4byte	0x29fd
+	.4byte	0x6db9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37484,9 +37559,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1910
-	.4byte	0x2996
-	.4byte	0x6d6a
+	.4byte	.LVL1912
+	.4byte	0x29fd
+	.4byte	0x6dd1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37499,9 +37574,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1919
+	.4byte	.LVL1921
 	.4byte	0x22a6
-	.4byte	0x6d86
+	.4byte	0x6ded
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37517,12 +37592,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1928
-	.4byte	0x6e77
-	.uleb128 0x32
 	.4byte	.LVL1930
-	.4byte	0x33c9
-	.4byte	0x6da3
+	.4byte	0x6ede
+	.uleb128 0x32
+	.4byte	.LVL1932
+	.4byte	0x3430
+	.4byte	0x6e0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37531,9 +37606,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1933
-	.4byte	0x5212
-	.4byte	0x6dc2
+	.4byte	.LVL1935
+	.4byte	0x5279
+	.4byte	0x6e29
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37553,9 +37628,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1934
-	.4byte	0x32d7
-	.4byte	0x6dd6
+	.4byte	.LVL1936
+	.4byte	0x333e
+	.4byte	0x6e3d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37564,9 +37639,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1939
+	.4byte	.LVL1941
 	.4byte	0x230c
-	.4byte	0x6df1
+	.4byte	0x6e58
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37581,9 +37656,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1948
-	.4byte	0x9222
-	.4byte	0x6e18
+	.4byte	.LVL1950
+	.4byte	0x9289
+	.4byte	0x6e7f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37604,12 +37679,12 @@ __func__.9940:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1953
+	.4byte	.LVL1955
 	.4byte	0x22a6
 	.uleb128 0x32
-	.4byte	.LVL1957
+	.4byte	.LVL1959
 	.4byte	0x230c
-	.4byte	0x6e34
+	.4byte	0x6e9b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37617,9 +37692,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1960
-	.4byte	0x6ea6
-	.4byte	0x6e53
+	.4byte	.LVL1962
+	.4byte	0x6f0d
+	.4byte	0x6eba
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37639,8 +37714,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1961
-	.4byte	0x9222
+	.4byte	.LVL1963
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37661,8 +37736,8 @@ __func__.9940:
 	.2byte	0x46e
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF834
+	.uleb128 0x48
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x3b7
 	.4byte	0x50
@@ -37670,10 +37745,10 @@ __func__.9940:
 	.4byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ea6
+	.4byte	0x6f0d
 	.uleb128 0x34
-	.4byte	.LVL1624
-	.4byte	0x6ea6
+	.4byte	.LVL1626
+	.4byte	0x6f0d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37686,46 +37761,46 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF835
+	.uleb128 0x5f
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x387
 	.4byte	.LFB218
 	.4byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x708c
-	.uleb128 0x5a
+	.4byte	0x70f3
+	.uleb128 0x5d
 	.ascii	"req\000"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x19f9
-	.4byte	.LLST375
-	.uleb128 0x4f
-	.4byte	.LASF593
+	.4byte	.LLST377
+	.uleb128 0x52
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST376
-	.uleb128 0x4f
-	.4byte	.LASF836
+	.4byte	.LLST378
+	.uleb128 0x52
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdc5
-	.4byte	.LLST377
-	.uleb128 0x4f
-	.4byte	.LASF639
+	.4byte	.LLST379
+	.uleb128 0x52
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1d79
-	.4byte	.LLST378
-	.uleb128 0x50
+	.4byte	.LLST380
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x389
 	.4byte	0xdc5
-	.4byte	.LLST379
-	.uleb128 0x5e
+	.4byte	.LLST381
+	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x38a
@@ -37733,40 +37808,40 @@ __func__.9940:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x51
-	.4byte	.LASF663
+	.uleb128 0x54
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdc5
-	.4byte	.LLST380
-	.uleb128 0x51
-	.4byte	.LASF623
+	.4byte	.LLST382
+	.uleb128 0x54
+	.4byte	.LASF624
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdba
-	.4byte	.LLST381
-	.uleb128 0x51
-	.4byte	.LASF596
+	.4byte	.LLST383
+	.uleb128 0x54
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2a63
-	.4byte	.LLST382
-	.uleb128 0x60
-	.4byte	.LASF687
+	.4byte	0x2aca
+	.4byte	.LLST384
+	.uleb128 0x62
+	.4byte	.LASF688
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x709c
+	.4byte	0x7103
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8923
 	.uleb128 0x32
-	.4byte	.LVL1605
+	.4byte	.LVL1607
 	.4byte	0x251a
-	.4byte	0x6f85
+	.4byte	0x6fec
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37787,12 +37862,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1606
-	.4byte	0x6122
-	.uleb128 0x32
 	.4byte	.LVL1608
-	.4byte	0x33c9
-	.4byte	0x6fa2
+	.4byte	0x6189
+	.uleb128 0x32
+	.4byte	.LVL1610
+	.4byte	0x3430
+	.4byte	0x7009
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37801,12 +37876,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1609
-	.4byte	0x2b35
+	.4byte	.LVL1611
+	.4byte	0x2b9c
 	.uleb128 0x32
-	.4byte	.LVL1610
-	.4byte	0x32d7
-	.4byte	0x6fbf
+	.4byte	.LVL1612
+	.4byte	0x333e
+	.4byte	0x7026
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37815,9 +37890,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1611
+	.4byte	.LVL1613
 	.4byte	0x251a
-	.4byte	0x6fdd
+	.4byte	0x7044
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37836,9 +37911,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1612
-	.4byte	0x9222
-	.4byte	0x7004
+	.4byte	.LVL1614
+	.4byte	0x9289
+	.4byte	0x706b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37859,9 +37934,9 @@ __func__.9940:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1613
-	.4byte	0x5212
-	.4byte	0x701d
+	.4byte	.LVL1615
+	.4byte	0x5279
+	.4byte	0x7084
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -37875,9 +37950,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1615
-	.4byte	0x6122
-	.4byte	0x7037
+	.4byte	.LVL1617
+	.4byte	0x6189
+	.4byte	0x709e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37892,9 +37967,9 @@ __func__.9940:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1618
-	.4byte	0x9222
-	.4byte	0x7054
+	.4byte	.LVL1620
+	.4byte	0x9289
+	.4byte	0x70bb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37909,9 +37984,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1619
-	.4byte	0x31f2
-	.4byte	0x7068
+	.4byte	.LVL1621
+	.4byte	0x3259
+	.4byte	0x70cf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37920,8 +37995,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1622
-	.4byte	0x9222
+	.4byte	.LVL1624
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -37944,15 +38019,15 @@ __func__.9940:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xea
-	.4byte	0x709c
+	.4byte	0x7103
 	.uleb128 0xe
 	.4byte	0xd6
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x708c
-	.uleb128 0x59
-	.4byte	.LASF837
+	.4byte	0x70f3
+	.uleb128 0x5c
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x50
@@ -37960,62 +38035,62 @@ __func__.9940:
 	.4byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7294
-	.uleb128 0x5a
+	.4byte	0x72fb
+	.uleb128 0x5d
 	.ascii	"LUN\000"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdaf
-	.4byte	.LLST408
-	.uleb128 0x4f
-	.4byte	.LASF731
+	.4byte	.LLST410
+	.uleb128 0x52
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdc5
-	.4byte	.LLST409
-	.uleb128 0x4f
-	.4byte	.LASF732
+	.4byte	.LLST411
+	.uleb128 0x52
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdc5
-	.4byte	.LLST410
-	.uleb128 0x4f
-	.4byte	.LASF733
+	.4byte	.LLST412
+	.uleb128 0x52
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x50e9
-	.4byte	.LLST411
-	.uleb128 0x50
+	.4byte	0x5150
+	.4byte	.LLST413
+	.uleb128 0x53
 	.ascii	"ret\000"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x50
-	.4byte	.LLST412
-	.uleb128 0x51
-	.4byte	.LASF829
+	.4byte	.LLST414
+	.uleb128 0x54
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST413
-	.uleb128 0x51
-	.4byte	.LASF830
+	.4byte	.LLST415
+	.uleb128 0x54
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST414
-	.uleb128 0x51
-	.4byte	.LASF838
+	.4byte	.LLST416
+	.uleb128 0x54
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdc5
-	.4byte	.LLST415
-	.uleb128 0x50
+	.4byte	.LLST417
+	.uleb128 0x53
 	.ascii	"lpa\000"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdc5
-	.4byte	.LLST416
-	.uleb128 0x5e
+	.4byte	.LLST418
+	.uleb128 0x60
 	.ascii	"ppa\000"
 	.byte	0x3
 	.2byte	0x331
@@ -38023,69 +38098,69 @@ __func__.9940:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x50
+	.uleb128 0x53
 	.ascii	"n\000"
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST417
-	.uleb128 0x51
-	.4byte	.LASF593
+	.4byte	.LLST419
+	.uleb128 0x54
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST418
-	.uleb128 0x51
-	.4byte	.LASF831
+	.4byte	.LLST420
+	.uleb128 0x54
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdc5
-	.4byte	.LLST419
-	.uleb128 0x51
-	.4byte	.LASF839
+	.4byte	.LLST421
+	.uleb128 0x54
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST420
-	.uleb128 0x51
-	.4byte	.LASF840
+	.4byte	.LLST422
+	.uleb128 0x54
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdc5
-	.4byte	.LLST421
-	.uleb128 0x51
-	.4byte	.LASF841
+	.4byte	.LLST423
+	.uleb128 0x54
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdc5
-	.4byte	.LLST422
-	.uleb128 0x51
-	.4byte	.LASF842
+	.4byte	.LLST424
+	.uleb128 0x54
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdc5
-	.4byte	.LLST423
-	.uleb128 0x5f
-	.4byte	.LBB295
-	.4byte	.LBE295-.LBB295
-	.4byte	0x71f8
-	.uleb128 0x51
-	.4byte	.LASF608
+	.4byte	.LLST425
+	.uleb128 0x61
+	.4byte	.LBB299
+	.4byte	.LBE299-.LBB299
+	.4byte	0x725f
+	.uleb128 0x54
+	.4byte	.LASF587
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdba
-	.4byte	.LLST424
+	.4byte	.LLST426
 	.uleb128 0x44
-	.4byte	.LVL1860
-	.4byte	0x6122
+	.4byte	.LVL1862
+	.4byte	0x6189
 	.uleb128 0x44
-	.4byte	.LVL1861
-	.4byte	0x2bbf
+	.4byte	.LVL1863
+	.4byte	0x2c26
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1817
-	.4byte	0x4fd7
-	.4byte	0x721a
+	.4byte	.LVL1819
+	.4byte	0x503e
+	.4byte	0x7281
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38107,12 +38182,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1823
-	.4byte	0x6e77
+	.4byte	.LVL1825
+	.4byte	0x6ede
 	.uleb128 0x32
-	.4byte	.LVL1832
-	.4byte	0x2996
-	.4byte	0x723b
+	.4byte	.LVL1834
+	.4byte	0x29fd
+	.4byte	0x72a2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38125,9 +38200,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1834
-	.4byte	0x5212
-	.4byte	0x725a
+	.4byte	.LVL1836
+	.4byte	0x5279
+	.4byte	0x72c1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38147,9 +38222,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1840
+	.4byte	.LVL1842
 	.4byte	0x26b9
-	.4byte	0x7274
+	.4byte	0x72db
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38164,10 +38239,10 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1842
+	.4byte	.LVL1844
 	.4byte	0x22a6
 	.uleb128 0x34
-	.4byte	.LVL1849
+	.4byte	.LVL1851
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -38182,8 +38257,8 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF843
+	.uleb128 0x48
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x50
@@ -38191,13 +38266,13 @@ __func__.9940:
 	.4byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72b8
+	.4byte	0x731f
 	.uleb128 0x44
-	.4byte	.LVL1629
-	.4byte	0x72b8
+	.4byte	.LVL1631
+	.4byte	0x731f
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF844
+	.uleb128 0x48
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x50
@@ -38205,17 +38280,17 @@ __func__.9940:
 	.4byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7301
+	.4byte	0x7368
 	.uleb128 0x44
-	.4byte	.LVL1625
-	.4byte	0x6e77
+	.4byte	.LVL1627
+	.4byte	0x6ede
 	.uleb128 0x44
-	.4byte	.LVL1626
-	.4byte	0x5313
+	.4byte	.LVL1628
+	.4byte	0x537a
 	.uleb128 0x32
-	.4byte	.LVL1627
-	.4byte	0x4f7f
-	.4byte	0x72f7
+	.4byte	.LVL1629
+	.4byte	0x4fe6
+	.4byte	0x735e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38223,11 +38298,11 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1628
-	.4byte	0x4d0e
+	.4byte	.LVL1630
+	.4byte	0x4d75
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF845
+	.uleb128 0x48
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x50
@@ -38235,34 +38310,34 @@ __func__.9940:
 	.4byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x73cf
+	.4byte	0x7436
 	.uleb128 0x28
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x73cf
+	.4byte	0x7436
 	.uleb128 0x6
 	.byte	0x3
 	.4byte	g_nand_phy_info
 	.byte	0x9f
-	.uleb128 0x55
-	.4byte	.LASF847
+	.uleb128 0x58
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x2f3
 	.4byte	.LDL2
-	.uleb128 0x5f
-	.4byte	.LBB305
-	.4byte	.LBE305-.LBB305
-	.4byte	0x736a
-	.uleb128 0x50
+	.uleb128 0x61
+	.4byte	.LBB309
+	.4byte	.LBE309-.LBB309
+	.4byte	0x73d1
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdc5
-	.4byte	.LLST452
+	.4byte	.LLST454
 	.uleb128 0x34
-	.4byte	.LVL2072
-	.4byte	0x2996
+	.4byte	.LVL2074
+	.4byte	0x29fd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38276,9 +38351,9 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2064
-	.4byte	0x9222
-	.4byte	0x738a
+	.4byte	.LVL2066
+	.4byte	0x9289
+	.4byte	0x73f1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38293,9 +38368,9 @@ __func__.9940:
 	.4byte	.LC70
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2065
-	.4byte	0x7a20
-	.4byte	0x73a1
+	.4byte	.LVL2067
+	.4byte	0x7a87
+	.4byte	0x7408
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38304,26 +38379,26 @@ __func__.9940:
 	.4byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2066
-	.4byte	0x77c3
-	.uleb128 0x44
-	.4byte	.LVL2067
-	.4byte	0x7713
-	.uleb128 0x44
 	.4byte	.LVL2068
-	.4byte	0x5fb8
+	.4byte	0x782a
 	.uleb128 0x44
 	.4byte	.LVL2069
-	.4byte	0x6437
+	.4byte	0x777a
 	.uleb128 0x44
 	.4byte	.LVL2070
-	.4byte	0x3937
+	.4byte	0x601f
+	.uleb128 0x44
+	.4byte	.LVL2071
+	.4byte	0x649e
+	.uleb128 0x44
+	.4byte	.LVL2072
+	.4byte	0x399e
 	.byte	0
 	.uleb128 0x8
 	.byte	0x4
 	.4byte	0xed2
-	.uleb128 0x59
-	.4byte	.LASF848
+	.uleb128 0x5c
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x50
@@ -38331,57 +38406,57 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x752b
-	.uleb128 0x51
-	.4byte	.LASF717
+	.4byte	0x7592
+	.uleb128 0x54
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST448
-	.uleb128 0x51
-	.4byte	.LASF849
+	.4byte	.LLST450
+	.uleb128 0x54
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdba
-	.4byte	.LLST449
-	.uleb128 0x51
-	.4byte	.LASF850
+	.4byte	.LLST451
+	.uleb128 0x54
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdba
-	.4byte	.LLST450
-	.uleb128 0x50
+	.4byte	.LLST452
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdba
-	.4byte	.LLST451
-	.uleb128 0x55
-	.4byte	.LASF851
+	.4byte	.LLST453
+	.uleb128 0x58
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.4byte	.L1802
-	.uleb128 0x55
-	.4byte	.LASF852
+	.4byte	.L1803
+	.uleb128 0x58
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.4byte	.L1804
+	.4byte	.L1805
 	.uleb128 0x44
-	.4byte	.LVL2018
-	.4byte	0x5fb8
+	.4byte	.LVL2020
+	.4byte	0x601f
 	.uleb128 0x44
-	.4byte	.LVL2019
-	.4byte	0x6437
+	.4byte	.LVL2021
+	.4byte	0x649e
 	.uleb128 0x44
-	.4byte	.LVL2020
-	.4byte	0x61d9
+	.4byte	.LVL2022
+	.4byte	0x6240
 	.uleb128 0x44
-	.4byte	.LVL2034
-	.4byte	0x65f0
+	.4byte	.LVL2036
+	.4byte	0x6657
 	.uleb128 0x32
-	.4byte	.LVL2035
+	.4byte	.LVL2037
 	.4byte	0x230c
-	.4byte	0x747c
+	.4byte	0x74e3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38389,9 +38464,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2036
+	.4byte	.LVL2038
 	.4byte	0x230c
-	.4byte	0x7490
+	.4byte	0x74f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38400,9 +38475,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2037
-	.4byte	0x3ec7
-	.4byte	0x74a4
+	.4byte	.LVL2039
+	.4byte	0x3f2e
+	.4byte	0x750b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38411,9 +38486,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2041
-	.4byte	0x752b
-	.4byte	0x74bd
+	.4byte	.LVL2043
+	.4byte	0x7592
+	.4byte	0x7524
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38427,15 +38502,15 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2048
-	.4byte	0x7a7c
+	.4byte	.LVL2050
+	.4byte	0x7ae3
 	.uleb128 0x44
-	.4byte	.LVL2049
-	.4byte	0x5fb8
+	.4byte	.LVL2051
+	.4byte	0x601f
 	.uleb128 0x32
-	.4byte	.LVL2052
-	.4byte	0x752b
-	.4byte	0x74e8
+	.4byte	.LVL2054
+	.4byte	0x7592
+	.4byte	0x754f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38449,9 +38524,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2055
-	.4byte	0x752b
-	.4byte	0x74fb
+	.4byte	.LVL2057
+	.4byte	0x7592
+	.4byte	0x7562
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38459,9 +38534,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2059
-	.4byte	0x3ec7
-	.4byte	0x750f
+	.4byte	.LVL2061
+	.4byte	0x3f2e
+	.4byte	0x7576
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38470,17 +38545,17 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2060
-	.4byte	0x5dbf
+	.4byte	.LVL2062
+	.4byte	0x5e26
 	.uleb128 0x44
-	.4byte	.LVL2061
-	.4byte	0x4d0e
+	.4byte	.LVL2063
+	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2062
-	.4byte	0x3937
+	.4byte	.LVL2064
+	.4byte	0x399e
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF853
+	.uleb128 0x48
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x50
@@ -38488,76 +38563,76 @@ __func__.9940:
 	.4byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x76e9
-	.uleb128 0x4f
-	.4byte	.LASF717
+	.4byte	0x7750
+	.uleb128 0x52
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdba
-	.4byte	.LLST179
-	.uleb128 0x4f
-	.4byte	.LASF854
+	.4byte	.LLST181
+	.uleb128 0x52
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdaf
-	.4byte	.LLST180
-	.uleb128 0x51
-	.4byte	.LASF849
+	.4byte	.LLST182
+	.uleb128 0x54
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST181
-	.uleb128 0x51
+	.4byte	.LLST183
+	.uleb128 0x54
 	.4byte	.LASF569
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdba
-	.4byte	.LLST182
-	.uleb128 0x51
-	.4byte	.LASF592
+	.4byte	.LLST184
+	.uleb128 0x54
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST183
-	.uleb128 0x51
+	.4byte	.LLST185
+	.uleb128 0x54
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdba
-	.4byte	.LLST184
-	.uleb128 0x51
-	.4byte	.LASF855
+	.4byte	.LLST186
+	.uleb128 0x54
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdba
-	.4byte	.LLST185
-	.uleb128 0x51
-	.4byte	.LASF856
+	.4byte	.LLST187
+	.uleb128 0x54
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdba
-	.4byte	.LLST186
-	.uleb128 0x51
-	.4byte	.LASF857
+	.4byte	.LLST188
+	.uleb128 0x54
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdba
-	.4byte	.LLST187
-	.uleb128 0x51
-	.4byte	.LASF858
+	.4byte	.LLST189
+	.uleb128 0x54
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdba
-	.4byte	.LLST188
-	.uleb128 0x55
-	.4byte	.LASF859
+	.4byte	.LLST190
+	.uleb128 0x58
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x240
-	.4byte	.L508
+	.4byte	.L509
 	.uleb128 0x32
-	.4byte	.LVL643
+	.4byte	.LVL645
 	.4byte	0x2464
-	.4byte	0x760b
+	.4byte	0x7672
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38572,9 +38647,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL651
+	.4byte	.LVL653
 	.4byte	0x251a
-	.4byte	0x7631
+	.4byte	0x7698
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38601,9 +38676,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL658
+	.4byte	.LVL660
 	.4byte	0x2464
-	.4byte	0x764b
+	.4byte	0x76b2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38618,9 +38693,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL660
-	.4byte	0x6192
-	.4byte	0x7661
+	.4byte	.LVL662
+	.4byte	0x61f9
+	.4byte	0x76c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38631,9 +38706,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL662
-	.4byte	0x76e9
-	.4byte	0x7675
+	.4byte	.LVL664
+	.4byte	0x7750
+	.4byte	0x76dc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38642,9 +38717,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL663
-	.4byte	0x67c5
-	.4byte	0x7689
+	.4byte	.LVL665
+	.4byte	0x682c
+	.4byte	0x76f0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38653,12 +38728,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL674
-	.4byte	0x6828
+	.4byte	.LVL676
+	.4byte	0x688f
 	.uleb128 0x32
-	.4byte	.LVL678
-	.4byte	0x6192
-	.4byte	0x76a8
+	.4byte	.LVL680
+	.4byte	0x61f9
+	.4byte	0x770f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38669,9 +38744,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL680
-	.4byte	0x76e9
-	.4byte	0x76bc
+	.4byte	.LVL682
+	.4byte	0x7750
+	.4byte	0x7723
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38680,9 +38755,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL681
-	.4byte	0x67c5
-	.4byte	0x76d0
+	.4byte	.LVL683
+	.4byte	0x682c
+	.4byte	0x7737
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38691,11 +38766,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL689
-	.4byte	0x6828
+	.4byte	.LVL691
+	.4byte	0x688f
 	.uleb128 0x34
-	.4byte	.LVL693
-	.4byte	0x5f01
+	.4byte	.LVL695
+	.4byte	0x5f68
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38703,26 +38778,26 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF860
+	.uleb128 0x49
+	.4byte	.LASF861
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x50
 	.byte	0x1
-	.4byte	0x7713
-	.uleb128 0x47
+	.4byte	0x777a
+	.uleb128 0x4a
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdba
-	.uleb128 0x48
-	.4byte	.LASF861
+	.uleb128 0x4b
+	.4byte	.LASF862
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdba
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF862
+	.uleb128 0x48
+	.4byte	.LASF863
 	.byte	0x3
 	.2byte	0x1ec
 	.4byte	0x50
@@ -38730,11 +38805,11 @@ __func__.9940:
 	.4byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x77c3
+	.4byte	0x782a
 	.uleb128 0x32
-	.4byte	.LVL1039
+	.4byte	.LVL1041
 	.4byte	0x230c
-	.4byte	0x7741
+	.4byte	0x77a8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38743,9 +38818,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1040
+	.4byte	.LVL1042
 	.4byte	0x230c
-	.4byte	0x7755
+	.4byte	0x77bc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38754,9 +38829,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1041
+	.4byte	.LVL1043
 	.4byte	0x230c
-	.4byte	0x7769
+	.4byte	0x77d0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -38765,9 +38840,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1042
+	.4byte	.LVL1044
 	.4byte	0x230c
-	.4byte	0x778c
+	.4byte	0x77f3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38788,9 +38863,9 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1043
+	.4byte	.LVL1045
 	.4byte	0x230c
-	.4byte	0x77b0
+	.4byte	0x7817
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38811,14 +38886,14 @@ __func__.9940:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1044
-	.4byte	0x31cf
+	.4byte	.LVL1046
+	.4byte	0x3236
 	.uleb128 0x44
-	.4byte	.LVL1045
-	.4byte	0x4719
+	.4byte	.LVL1047
+	.4byte	0x4780
 	.byte	0
-	.uleb128 0x45
-	.4byte	.LASF863
+	.uleb128 0x48
+	.4byte	.LASF864
 	.byte	0x3
 	.2byte	0x116
 	.4byte	0x50
@@ -38826,35 +38901,35 @@ __func__.9940:
 	.4byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a20
-	.uleb128 0x50
+	.4byte	0x7a87
+	.uleb128 0x53
 	.ascii	"i\000"
 	.byte	0x3
 	.2byte	0x118
 	.4byte	0xdc5
-	.4byte	.LLST192
-	.uleb128 0x51
-	.4byte	.LASF864
+	.4byte	.LLST194
+	.uleb128 0x54
+	.4byte	.LASF865
 	.byte	0x3
 	.2byte	0x119
 	.4byte	0xdc5
-	.4byte	.LLST193
+	.4byte	.LLST195
 	.uleb128 0x3d
 	.4byte	.LASF574
-	.4byte	0x6576
+	.4byte	0x65dd
 	.uleb128 0x5
 	.byte	0x3
 	.4byte	__func__.8799
 	.uleb128 0x44
-	.4byte	.LVL697
+	.4byte	.LVL699
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL698
+	.4byte	.LVL700
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL700
+	.4byte	.LVL702
 	.4byte	0x2928
-	.4byte	0x7830
+	.4byte	0x7897
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38863,9 +38938,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL701
+	.4byte	.LVL703
 	.4byte	0x2928
-	.4byte	0x7844
+	.4byte	0x78ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38874,9 +38949,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL702
+	.4byte	.LVL704
 	.4byte	0x2928
-	.4byte	0x7858
+	.4byte	0x78bf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38885,9 +38960,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL703
+	.4byte	.LVL705
 	.4byte	0x2928
-	.4byte	0x786c
+	.4byte	0x78d3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38896,9 +38971,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL704
+	.4byte	.LVL706
 	.4byte	0x2928
-	.4byte	0x7880
+	.4byte	0x78e7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38907,9 +38982,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL706
+	.4byte	.LVL708
 	.4byte	0x2928
-	.4byte	0x7894
+	.4byte	0x78fb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38918,9 +38993,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL707
+	.4byte	.LVL709
 	.4byte	0x2928
-	.4byte	0x78a8
+	.4byte	0x790f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38929,9 +39004,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL708
+	.4byte	.LVL710
 	.4byte	0x2928
-	.4byte	0x78bc
+	.4byte	0x7923
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38940,12 +39015,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL709
+	.4byte	.LVL711
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL710
+	.4byte	.LVL712
 	.4byte	0x2928
-	.4byte	0x78d9
+	.4byte	0x7940
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38954,9 +39029,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL711
+	.4byte	.LVL713
 	.4byte	0x2928
-	.4byte	0x78ed
+	.4byte	0x7954
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38965,12 +39040,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL713
+	.4byte	.LVL715
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL715
+	.4byte	.LVL717
 	.4byte	0x2928
-	.4byte	0x790a
+	.4byte	0x7971
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38979,9 +39054,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL716
+	.4byte	.LVL718
 	.4byte	0x2928
-	.4byte	0x7920
+	.4byte	0x7987
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -38992,18 +39067,18 @@ __func__.9940:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL717
+	.4byte	.LVL719
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL718
+	.4byte	.LVL720
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL719
+	.4byte	.LVL721
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL722
+	.4byte	.LVL724
 	.4byte	0x2928
-	.4byte	0x794f
+	.4byte	0x79b6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39012,9 +39087,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL723
+	.4byte	.LVL725
 	.4byte	0x2928
-	.4byte	0x7963
+	.4byte	0x79ca
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39023,9 +39098,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL727
+	.4byte	.LVL729
 	.4byte	0x2928
-	.4byte	0x7977
+	.4byte	0x79de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39034,9 +39109,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL728
+	.4byte	.LVL730
 	.4byte	0x2928
-	.4byte	0x798b
+	.4byte	0x79f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,24 +39120,24 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL730
+	.4byte	.LVL732
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL731
+	.4byte	.LVL733
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL732
+	.4byte	.LVL734
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL733
+	.4byte	.LVL735
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL734
+	.4byte	.LVL736
 	.4byte	0x2928
 	.uleb128 0x32
-	.4byte	.LVL735
+	.4byte	.LVL737
 	.4byte	0x230c
-	.4byte	0x79cd
+	.4byte	0x7a34
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -39072,26 +39147,26 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL737
+	.4byte	.LVL739
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL740
+	.4byte	.LVL742
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL743
+	.4byte	.LVL745
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL746
+	.4byte	.LVL748
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL749
+	.4byte	.LVL751
 	.4byte	0x2928
 	.uleb128 0x44
-	.4byte	.LVL753
+	.4byte	.LVL755
 	.4byte	0x2928
 	.uleb128 0x34
-	.4byte	.LVL757
-	.4byte	0x9222
+	.4byte	.LVL759
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39107,7 +39182,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x39
-	.4byte	.LASF865
+	.4byte	.LASF866
 	.byte	0x3
 	.byte	0xb6
 	.4byte	0x50
@@ -39115,12 +39190,12 @@ __func__.9940:
 	.4byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7a7c
+	.4byte	0x7ae3
 	.uleb128 0x2c
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x73cf
+	.4byte	0x7436
 	.4byte	.LLST10
 	.uleb128 0x3b
 	.ascii	"i\000"
@@ -39130,11 +39205,11 @@ __func__.9940:
 	.4byte	.LLST11
 	.uleb128 0x44
 	.4byte	.LVL30
-	.4byte	0x7abd
+	.4byte	0x7b24
 	.uleb128 0x32
 	.4byte	.LVL31
-	.4byte	0x7abd
-	.4byte	0x7a72
+	.4byte	0x7b24
+	.4byte	0x7ad9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39144,10 +39219,10 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL35
-	.4byte	0x7a7c
+	.4byte	0x7ae3
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF866
+	.4byte	.LASF867
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x50
@@ -39155,28 +39230,28 @@ __func__.9940:
 	.4byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7aa5
+	.4byte	0x7b0c
 	.uleb128 0x2c
-	.4byte	.LASF867
+	.4byte	.LASF868
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0xdba
 	.4byte	.LLST9
 	.byte	0
-	.uleb128 0x64
-	.4byte	.LASF868
+	.uleb128 0x66
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x7abd
+	.4byte	0x7b24
 	.uleb128 0x36
-	.4byte	.LASF869
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x9e
 	.4byte	0xdc5
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF870
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdba
@@ -39184,7 +39259,7 @@ __func__.9940:
 	.4byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b02
+	.4byte	0x7b69
 	.uleb128 0x2f
 	.ascii	"num\000"
 	.byte	0x3
@@ -39198,14 +39273,14 @@ __func__.9940:
 	.4byte	0xdba
 	.4byte	.LLST7
 	.uleb128 0x30
-	.4byte	.LASF871
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdc5
 	.4byte	.LLST8
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF872
+	.4byte	.LASF873
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x50
@@ -39213,7 +39288,7 @@ __func__.9940:
 	.4byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7b70
+	.4byte	0x7bd7
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39228,8 +39303,8 @@ __func__.9940:
 	.4byte	.LLST112
 	.uleb128 0x32
 	.4byte	.LVL451
-	.4byte	0x9238
-	.4byte	0x7b5f
+	.4byte	0x92ab
+	.4byte	0x7bc6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39251,7 +39326,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL453
-	.4byte	0x7b70
+	.4byte	0x7bd7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39261,7 +39336,7 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x2b
-	.4byte	.LASF873
+	.4byte	.LASF874
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x50
@@ -39269,7 +39344,7 @@ __func__.9940:
 	.4byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x83c6
+	.4byte	0x842d
 	.uleb128 0x2c
 	.4byte	.LASF299
 	.byte	0x3
@@ -39288,20 +39363,20 @@ __func__.9940:
 	.byte	0xe
 	.4byte	0xf6
 	.4byte	.LLST108
-	.uleb128 0x5f
-	.4byte	.LBB209
-	.4byte	.LBE209-.LBB209
-	.4byte	0x7c04
+	.uleb128 0x61
+	.4byte	.LBB211
+	.4byte	.LBE211-.LBB211
+	.4byte	0x7c6b
 	.uleb128 0x30
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdba
 	.4byte	.LLST109
 	.uleb128 0x32
 	.4byte	.LVL437
-	.4byte	0x5acd
-	.4byte	0x7be4
+	.4byte	0x5b34
+	.4byte	0x7c4b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39311,7 +39386,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL439
-	.4byte	0x9238
+	.4byte	0x92ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39332,19 +39407,19 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
-	.4byte	.LBB210
-	.4byte	.LBE210-.LBB210
-	.4byte	0x7c3d
+	.uleb128 0x61
+	.4byte	.LBB212
+	.4byte	.LBE212-.LBB212
+	.4byte	0x7ca4
 	.uleb128 0x30
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdba
 	.4byte	.LLST110
 	.uleb128 0x34
 	.4byte	.LVL447
-	.4byte	0x9238
+	.4byte	0x92ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39367,8 +39442,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL302
-	.4byte	0x9238
-	.4byte	0x7c5a
+	.4byte	0x92ab
+	.4byte	0x7cc1
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39384,8 +39459,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL304
-	.4byte	0x9238
-	.4byte	0x7c77
+	.4byte	0x92ab
+	.4byte	0x7cde
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39401,8 +39476,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL306
-	.4byte	0x9238
-	.4byte	0x7c94
+	.4byte	0x92ab
+	.4byte	0x7cfb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39418,8 +39493,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL308
-	.4byte	0x9238
-	.4byte	0x7cb1
+	.4byte	0x92ab
+	.4byte	0x7d18
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39435,8 +39510,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL310
-	.4byte	0x9238
-	.4byte	0x7cce
+	.4byte	0x92ab
+	.4byte	0x7d35
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39452,8 +39527,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL312
-	.4byte	0x9238
-	.4byte	0x7ceb
+	.4byte	0x92ab
+	.4byte	0x7d52
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39469,8 +39544,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL314
-	.4byte	0x9238
-	.4byte	0x7d08
+	.4byte	0x92ab
+	.4byte	0x7d6f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39486,8 +39561,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL316
-	.4byte	0x9238
-	.4byte	0x7d25
+	.4byte	0x92ab
+	.4byte	0x7d8c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39503,8 +39578,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL318
-	.4byte	0x9238
-	.4byte	0x7d42
+	.4byte	0x92ab
+	.4byte	0x7da9
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39520,8 +39595,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL320
-	.4byte	0x9238
-	.4byte	0x7d5f
+	.4byte	0x92ab
+	.4byte	0x7dc6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39537,8 +39612,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL322
-	.4byte	0x9238
-	.4byte	0x7d7c
+	.4byte	0x92ab
+	.4byte	0x7de3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39554,8 +39629,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL324
-	.4byte	0x9238
-	.4byte	0x7d99
+	.4byte	0x92ab
+	.4byte	0x7e00
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39571,8 +39646,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL326
-	.4byte	0x9238
-	.4byte	0x7db6
+	.4byte	0x92ab
+	.4byte	0x7e1d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39588,8 +39663,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL328
-	.4byte	0x9238
-	.4byte	0x7dd3
+	.4byte	0x92ab
+	.4byte	0x7e3a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39605,8 +39680,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL330
-	.4byte	0x9238
-	.4byte	0x7df0
+	.4byte	0x92ab
+	.4byte	0x7e57
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39622,8 +39697,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL332
-	.4byte	0x9238
-	.4byte	0x7e0d
+	.4byte	0x92ab
+	.4byte	0x7e74
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39639,8 +39714,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL334
-	.4byte	0x9238
-	.4byte	0x7e2a
+	.4byte	0x92ab
+	.4byte	0x7e91
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39656,8 +39731,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL336
-	.4byte	0x9238
-	.4byte	0x7e47
+	.4byte	0x92ab
+	.4byte	0x7eae
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39673,8 +39748,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL338
-	.4byte	0x9238
-	.4byte	0x7e64
+	.4byte	0x92ab
+	.4byte	0x7ecb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39690,8 +39765,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL340
-	.4byte	0x9238
-	.4byte	0x7e81
+	.4byte	0x92ab
+	.4byte	0x7ee8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39707,8 +39782,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL342
-	.4byte	0x9238
-	.4byte	0x7e9e
+	.4byte	0x92ab
+	.4byte	0x7f05
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39724,8 +39799,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL344
-	.4byte	0x9238
-	.4byte	0x7ebb
+	.4byte	0x92ab
+	.4byte	0x7f22
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39741,8 +39816,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL346
-	.4byte	0x9238
-	.4byte	0x7ed8
+	.4byte	0x92ab
+	.4byte	0x7f3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39758,8 +39833,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL348
-	.4byte	0x9238
-	.4byte	0x7ef5
+	.4byte	0x92ab
+	.4byte	0x7f5c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39775,8 +39850,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL350
-	.4byte	0x9238
-	.4byte	0x7f12
+	.4byte	0x92ab
+	.4byte	0x7f79
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39792,8 +39867,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL352
-	.4byte	0x9238
-	.4byte	0x7f2f
+	.4byte	0x92ab
+	.4byte	0x7f96
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39809,8 +39884,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL354
-	.4byte	0x9238
-	.4byte	0x7f4c
+	.4byte	0x92ab
+	.4byte	0x7fb3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39826,8 +39901,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL356
-	.4byte	0x9238
-	.4byte	0x7f69
+	.4byte	0x92ab
+	.4byte	0x7fd0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39843,8 +39918,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL358
-	.4byte	0x9238
-	.4byte	0x7f86
+	.4byte	0x92ab
+	.4byte	0x7fed
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39860,8 +39935,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL360
-	.4byte	0x9238
-	.4byte	0x7fa3
+	.4byte	0x92ab
+	.4byte	0x800a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39877,8 +39952,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL362
-	.4byte	0x9238
-	.4byte	0x7fc0
+	.4byte	0x92ab
+	.4byte	0x8027
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39894,8 +39969,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL364
-	.4byte	0x9238
-	.4byte	0x7fdd
+	.4byte	0x92ab
+	.4byte	0x8044
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39911,8 +39986,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL366
-	.4byte	0x9238
-	.4byte	0x7ffa
+	.4byte	0x92ab
+	.4byte	0x8061
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39928,8 +40003,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL368
-	.4byte	0x9238
-	.4byte	0x8017
+	.4byte	0x92ab
+	.4byte	0x807e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39945,8 +40020,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL370
-	.4byte	0x9238
-	.4byte	0x8034
+	.4byte	0x92ab
+	.4byte	0x809b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39962,8 +40037,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL372
-	.4byte	0x9238
-	.4byte	0x8051
+	.4byte	0x92ab
+	.4byte	0x80b8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39979,8 +40054,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL374
-	.4byte	0x9238
-	.4byte	0x806e
+	.4byte	0x92ab
+	.4byte	0x80d5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -39996,8 +40071,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL376
-	.4byte	0x9238
-	.4byte	0x808b
+	.4byte	0x92ab
+	.4byte	0x80f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40013,8 +40088,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL378
-	.4byte	0x9238
-	.4byte	0x80a8
+	.4byte	0x92ab
+	.4byte	0x810f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40030,8 +40105,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL380
-	.4byte	0x9238
-	.4byte	0x80c5
+	.4byte	0x92ab
+	.4byte	0x812c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40047,8 +40122,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL382
-	.4byte	0x9238
-	.4byte	0x80e2
+	.4byte	0x92ab
+	.4byte	0x8149
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40064,8 +40139,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL384
-	.4byte	0x9238
-	.4byte	0x80ff
+	.4byte	0x92ab
+	.4byte	0x8166
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40081,8 +40156,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL386
-	.4byte	0x9238
-	.4byte	0x811c
+	.4byte	0x92ab
+	.4byte	0x8183
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40098,8 +40173,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL388
-	.4byte	0x9238
-	.4byte	0x8139
+	.4byte	0x92ab
+	.4byte	0x81a0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40115,8 +40190,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL390
-	.4byte	0x9238
-	.4byte	0x8156
+	.4byte	0x92ab
+	.4byte	0x81bd
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40132,8 +40207,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL392
-	.4byte	0x9238
-	.4byte	0x8173
+	.4byte	0x92ab
+	.4byte	0x81da
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40149,8 +40224,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL394
-	.4byte	0x9238
-	.4byte	0x8190
+	.4byte	0x92ab
+	.4byte	0x81f7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40166,8 +40241,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL396
-	.4byte	0x9238
-	.4byte	0x81ad
+	.4byte	0x92ab
+	.4byte	0x8214
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40183,8 +40258,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL398
-	.4byte	0x9238
-	.4byte	0x81ca
+	.4byte	0x92ab
+	.4byte	0x8231
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40200,8 +40275,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL400
-	.4byte	0x9238
-	.4byte	0x81e7
+	.4byte	0x92ab
+	.4byte	0x824e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40217,8 +40292,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL402
-	.4byte	0x9238
-	.4byte	0x8204
+	.4byte	0x92ab
+	.4byte	0x826b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40234,8 +40309,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL404
-	.4byte	0x9238
-	.4byte	0x8221
+	.4byte	0x92ab
+	.4byte	0x8288
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40251,8 +40326,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL406
-	.4byte	0x9238
-	.4byte	0x823e
+	.4byte	0x92ab
+	.4byte	0x82a5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40268,8 +40343,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL408
-	.4byte	0x9238
-	.4byte	0x825b
+	.4byte	0x92ab
+	.4byte	0x82c2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40285,8 +40360,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL410
-	.4byte	0x9238
-	.4byte	0x8278
+	.4byte	0x92ab
+	.4byte	0x82df
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40302,8 +40377,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL412
-	.4byte	0x9238
-	.4byte	0x8295
+	.4byte	0x92ab
+	.4byte	0x82fc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40319,8 +40394,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL414
-	.4byte	0x9238
-	.4byte	0x82b2
+	.4byte	0x92ab
+	.4byte	0x8319
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40336,8 +40411,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL416
-	.4byte	0x9238
-	.4byte	0x82cf
+	.4byte	0x92ab
+	.4byte	0x8336
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40353,8 +40428,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL418
-	.4byte	0x9238
-	.4byte	0x82ec
+	.4byte	0x92ab
+	.4byte	0x8353
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40370,8 +40445,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL420
-	.4byte	0x9238
-	.4byte	0x8309
+	.4byte	0x92ab
+	.4byte	0x8370
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40387,8 +40462,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL422
-	.4byte	0x9238
-	.4byte	0x8326
+	.4byte	0x92ab
+	.4byte	0x838d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40404,8 +40479,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL424
-	.4byte	0x9238
-	.4byte	0x8343
+	.4byte	0x92ab
+	.4byte	0x83aa
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40421,8 +40496,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL426
-	.4byte	0x9238
-	.4byte	0x8360
+	.4byte	0x92ab
+	.4byte	0x83c7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40438,11 +40513,11 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL428
-	.4byte	0x3894
+	.4byte	0x38fb
 	.uleb128 0x32
 	.4byte	.LVL429
-	.4byte	0x9238
-	.4byte	0x8386
+	.4byte	0x92ab
+	.4byte	0x83ed
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40458,11 +40533,11 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL431
-	.4byte	0x383b
+	.4byte	0x38a2
 	.uleb128 0x32
 	.4byte	.LVL432
-	.4byte	0x9238
-	.4byte	0x83ac
+	.4byte	0x92ab
+	.4byte	0x8413
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40478,7 +40553,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL435
-	.4byte	0x9238
+	.4byte	0x92ab
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40493,133 +40568,133 @@ __func__.9940:
 	.4byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.4byte	0x27b7
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
+	.4byte	.LFB352
+	.4byte	.LFE352-.LFB352
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8420
-	.uleb128 0x5c
+	.4byte	0x8487
+	.uleb128 0x46
 	.4byte	0x27d2
 	.4byte	.LLST0
-	.uleb128 0x5c
+	.uleb128 0x46
 	.4byte	0x27dd
 	.4byte	.LLST1
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.4byte	0x27c7
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x27e8
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x27f3
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x27fe
 	.4byte	.LLST2
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2809
 	.4byte	.LLST3
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2814
 	.4byte	.LLST4
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x281f
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x282a
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4ad9
-	.4byte	.LFB358
-	.4byte	.LFE358-.LFB358
+	.uleb128 0x72
+	.4byte	0x4b40
+	.4byte	.LFB359
+	.4byte	.LFE359-.LFB359
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8449
-	.uleb128 0x5c
-	.4byte	0x4ae6
+	.4byte	0x84b0
+	.uleb128 0x46
+	.4byte	0x4b4d
 	.4byte	.LLST5
-	.uleb128 0x71
-	.4byte	0x4af2
+	.uleb128 0x73
+	.4byte	0x4b59
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x4af2
+	.4byte	0x4b59
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x7aa5
+	.uleb128 0x72
+	.4byte	0x7b0c
 	.4byte	.LFB206
 	.4byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8464
-	.uleb128 0x71
-	.4byte	0x7ab1
+	.4byte	0x84cb
+	.uleb128 0x73
+	.4byte	0x7b18
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x76e9
+	.uleb128 0x72
+	.4byte	0x7750
 	.4byte	.LFB211
 	.4byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x849c
-	.uleb128 0x5c
-	.4byte	0x76fa
+	.4byte	0x8503
+	.uleb128 0x46
+	.4byte	0x7761
 	.4byte	.LLST12
-	.uleb128 0x6e
-	.4byte	0x7706
-	.uleb128 0x72
+	.uleb128 0x70
+	.4byte	0x776d
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6d
-	.4byte	0x76fa
-	.uleb128 0x72
+	.uleb128 0x6f
+	.4byte	0x7761
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6e
-	.4byte	0x8480
+	.uleb128 0x70
+	.4byte	0x84e7
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x73
-	.4byte	0x67bd
+	.uleb128 0x75
+	.4byte	0x6824
 	.4byte	.LFB227
 	.4byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x73
-	.4byte	0x5fac
+	.uleb128 0x75
+	.4byte	0x6013
 	.4byte	.LFB241
 	.4byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x73
-	.4byte	0x5fa0
+	.uleb128 0x75
+	.4byte	0x6007
 	.4byte	.LFB242
 	.4byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x70
-	.4byte	0x5d75
+	.uleb128 0x72
+	.4byte	0x5ddc
 	.4byte	.LFB248
 	.4byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8530
-	.uleb128 0x5c
-	.4byte	0x5d81
+	.4byte	0x8597
+	.uleb128 0x46
+	.4byte	0x5de8
 	.4byte	.LLST52
-	.uleb128 0x6e
-	.4byte	0x5d8c
+	.uleb128 0x70
+	.4byte	0x5df3
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x30
-	.4byte	0x8526
-	.uleb128 0x6d
-	.4byte	0x5d81
-	.uleb128 0x72
+	.4byte	0x858d
+	.uleb128 0x6f
+	.4byte	0x5de8
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x30
-	.uleb128 0x6e
-	.4byte	0x84e5
+	.uleb128 0x70
+	.4byte	0x854c
 	.uleb128 0x2d
 	.4byte	.LVL144
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40643,32 +40718,32 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL142
-	.4byte	0x5ce3
+	.4byte	0x5d4a
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x5d9a
+	.uleb128 0x72
+	.4byte	0x5e01
 	.4byte	.LFB247
 	.4byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8597
-	.uleb128 0x5c
-	.4byte	0x5da6
+	.4byte	0x85fe
+	.uleb128 0x46
+	.4byte	0x5e0d
 	.4byte	.LLST58
-	.uleb128 0x6e
-	.4byte	0x5db1
+	.uleb128 0x70
+	.4byte	0x5e18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x48
-	.4byte	0x858d
-	.uleb128 0x6d
-	.4byte	0x5da6
-	.uleb128 0x72
+	.4byte	0x85f4
+	.uleb128 0x6f
+	.4byte	0x5e0d
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x48
-	.uleb128 0x6e
-	.4byte	0x854c
+	.uleb128 0x70
+	.4byte	0x85b3
 	.uleb128 0x2d
 	.4byte	.LVL163
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40692,70 +40767,70 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL161
-	.4byte	0x5c6a
+	.4byte	0x5cd1
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x5a4e
+	.uleb128 0x72
+	.4byte	0x5ab5
 	.4byte	.LFB255
 	.4byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x86b8
-	.uleb128 0x5c
-	.4byte	0x5a5f
+	.4byte	0x871f
+	.uleb128 0x46
+	.4byte	0x5ac6
 	.4byte	.LLST70
-	.uleb128 0x6e
-	.4byte	0x5a6b
-	.uleb128 0x6e
-	.4byte	0x5a77
-	.uleb128 0x6e
-	.4byte	0x5a83
-	.uleb128 0x6e
-	.4byte	0x5a8f
-	.uleb128 0x6e
-	.4byte	0x5a9b
-	.uleb128 0x6e
-	.4byte	0x5aa7
-	.uleb128 0x6e
-	.4byte	0x5ab3
-	.uleb128 0x6e
-	.4byte	0x5abf
-	.uleb128 0x67
-	.4byte	.LBB189
-	.4byte	.LBE189-.LBB189
-	.uleb128 0x5c
-	.4byte	0x5a5f
+	.uleb128 0x70
+	.4byte	0x5ad2
+	.uleb128 0x70
+	.4byte	0x5ade
+	.uleb128 0x70
+	.4byte	0x5aea
+	.uleb128 0x70
+	.4byte	0x5af6
+	.uleb128 0x70
+	.4byte	0x5b02
+	.uleb128 0x70
+	.4byte	0x5b0e
+	.uleb128 0x70
+	.4byte	0x5b1a
+	.uleb128 0x70
+	.4byte	0x5b26
+	.uleb128 0x69
+	.4byte	.LBB191
+	.4byte	.LBE191-.LBB191
+	.uleb128 0x46
+	.4byte	0x5ac6
 	.4byte	.LLST71
-	.uleb128 0x67
-	.4byte	.LBB190
-	.4byte	.LBE190-.LBB190
-	.uleb128 0x6f
-	.4byte	0x85b3
+	.uleb128 0x69
+	.4byte	.LBB192
+	.4byte	.LBE192-.LBB192
+	.uleb128 0x71
+	.4byte	0x861a
 	.4byte	.LLST72
-	.uleb128 0x6f
-	.4byte	0x85b8
+	.uleb128 0x71
+	.4byte	0x861f
 	.4byte	.LLST73
-	.uleb128 0x6f
-	.4byte	0x85bd
+	.uleb128 0x71
+	.4byte	0x8624
 	.4byte	.LLST74
-	.uleb128 0x6f
-	.4byte	0x85c2
+	.uleb128 0x71
+	.4byte	0x8629
 	.4byte	.LLST75
-	.uleb128 0x6f
-	.4byte	0x85c7
+	.uleb128 0x71
+	.4byte	0x862e
 	.4byte	.LLST76
-	.uleb128 0x6f
-	.4byte	0x85cc
+	.uleb128 0x71
+	.4byte	0x8633
 	.4byte	.LLST77
-	.uleb128 0x6f
-	.4byte	0x85d1
+	.uleb128 0x71
+	.4byte	0x8638
 	.4byte	.LLST78
-	.uleb128 0x6e
-	.4byte	0x85d6
+	.uleb128 0x70
+	.4byte	0x863d
 	.uleb128 0x32
 	.4byte	.LVL206
-	.4byte	0x9222
-	.4byte	0x8661
+	.4byte	0x9289
+	.4byte	0x86c8
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40777,8 +40852,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL213
-	.4byte	0x5bca
-	.4byte	0x867e
+	.4byte	0x5c31
+	.4byte	0x86e5
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40794,8 +40869,8 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x32
 	.4byte	.LVL214
-	.4byte	0x9222
-	.4byte	0x86a5
+	.4byte	0x9289
+	.4byte	0x870c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40817,7 +40892,7 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x34
 	.4byte	.LVL215
-	.4byte	0x5d75
+	.4byte	0x5ddc
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40828,43 +40903,43 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x57e5
+	.uleb128 0x72
+	.4byte	0x584c
 	.4byte	.LFB258
 	.4byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8748
-	.uleb128 0x5c
-	.4byte	0x57f6
+	.4byte	0x87af
+	.uleb128 0x46
+	.4byte	0x585d
 	.4byte	.LLST79
-	.uleb128 0x6f
-	.4byte	0x5802
+	.uleb128 0x71
+	.4byte	0x5869
 	.4byte	.LLST80
-	.uleb128 0x6f
-	.4byte	0x580e
+	.uleb128 0x71
+	.4byte	0x5875
 	.4byte	.LLST81
-	.uleb128 0x6e
-	.4byte	0x581a
-	.uleb128 0x5f
-	.4byte	.LBB193
-	.4byte	.LBE193-.LBB193
-	.4byte	0x873e
-	.uleb128 0x5c
-	.4byte	0x57f6
+	.uleb128 0x70
+	.4byte	0x5881
+	.uleb128 0x61
+	.4byte	.LBB195
+	.4byte	.LBE195-.LBB195
+	.4byte	0x87a5
+	.uleb128 0x46
+	.4byte	0x585d
 	.4byte	.LLST82
-	.uleb128 0x67
-	.4byte	.LBB194
-	.4byte	.LBE194-.LBB194
-	.uleb128 0x6e
-	.4byte	0x86d4
-	.uleb128 0x6e
-	.4byte	0x86dd
-	.uleb128 0x6e
-	.4byte	0x86e6
+	.uleb128 0x69
+	.4byte	.LBB196
+	.4byte	.LBE196-.LBB196
+	.uleb128 0x70
+	.4byte	0x873b
+	.uleb128 0x70
+	.4byte	0x8744
+	.uleb128 0x70
+	.4byte	0x874d
 	.uleb128 0x34
 	.4byte	.LVL220
-	.4byte	0x9222
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -40888,171 +40963,171 @@ __func__.9940:
 	.byte	0
 	.uleb128 0x44
 	.4byte	.LVL222
-	.4byte	0x5dbf
+	.4byte	0x5e26
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4f5b
+	.uleb128 0x72
+	.4byte	0x4fc2
 	.4byte	.LFB269
 	.4byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8786
-	.uleb128 0x5c
-	.4byte	0x4f68
+	.4byte	0x87ed
+	.uleb128 0x46
+	.4byte	0x4fcf
 	.4byte	.LLST86
-	.uleb128 0x74
-	.4byte	0x4f74
+	.uleb128 0x76
+	.4byte	0x4fdb
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x71
-	.4byte	0x4f68
+	.uleb128 0x73
+	.4byte	0x4fcf
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x72
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6e
-	.4byte	0x8764
+	.uleb128 0x70
+	.4byte	0x87cb
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4ad9
+	.uleb128 0x72
+	.4byte	0x4b40
 	.4byte	.LFB275
 	.4byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87bf
-	.uleb128 0x5c
-	.4byte	0x4ae6
+	.4byte	0x8826
+	.uleb128 0x46
+	.4byte	0x4b4d
 	.4byte	.LLST87
-	.uleb128 0x5c
-	.4byte	0x4af2
+	.uleb128 0x46
+	.4byte	0x4b59
 	.4byte	.LLST88
 	.uleb128 0x2d
 	.4byte	.LVL248
-	.4byte	0x8420
+	.4byte	0x8487
 	.uleb128 0x3c
-	.4byte	0x4af2
+	.4byte	0x4b59
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3fe1
+	.uleb128 0x72
+	.4byte	0x4048
 	.4byte	.LFB285
 	.4byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8805
-	.uleb128 0x71
-	.4byte	0x3fee
+	.4byte	0x886c
+	.uleb128 0x73
+	.4byte	0x4055
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x6e
-	.4byte	0x3ffa
-	.uleb128 0x67
-	.4byte	.LBB207
-	.4byte	.LBE207-.LBB207
-	.uleb128 0x5c
-	.4byte	0x3fee
+	.uleb128 0x70
+	.4byte	0x4061
+	.uleb128 0x69
+	.4byte	.LBB209
+	.4byte	.LBE209-.LBB209
+	.uleb128 0x46
+	.4byte	0x4055
 	.4byte	.LLST93
-	.uleb128 0x67
-	.4byte	.LBB208
-	.4byte	.LBE208-.LBB208
-	.uleb128 0x6f
-	.4byte	0x87d9
+	.uleb128 0x69
+	.4byte	.LBB210
+	.4byte	.LBE210-.LBB210
+	.uleb128 0x71
+	.4byte	0x8840
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x375c
+	.uleb128 0x72
+	.4byte	0x37c3
 	.4byte	.LFB300
 	.4byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x883e
-	.uleb128 0x5c
-	.4byte	0x376d
+	.4byte	0x88a5
+	.uleb128 0x46
+	.4byte	0x37d4
 	.4byte	.LLST120
-	.uleb128 0x67
-	.4byte	.LBB213
-	.4byte	.LBE213-.LBB213
-	.uleb128 0x5c
-	.4byte	0x376d
+	.uleb128 0x69
+	.4byte	.LBB215
+	.4byte	.LBE215-.LBB215
+	.uleb128 0x46
+	.4byte	0x37d4
 	.4byte	.LLST121
 	.uleb128 0x44
 	.4byte	.LVL487
-	.4byte	0x5d9a
+	.4byte	0x5e01
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2b28
+	.uleb128 0x72
+	.4byte	0x2b8f
 	.4byte	.LFB319
 	.4byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8864
+	.4byte	0x88cb
 	.uleb128 0x44
 	.4byte	.LVL547
-	.4byte	0x6122
+	.4byte	0x6189
 	.uleb128 0x44
 	.4byte	.LVL548
-	.4byte	0x2bbf
+	.4byte	0x2c26
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2a7e
+	.uleb128 0x72
+	.4byte	0x2ae5
 	.4byte	.LFB321
 	.4byte	.LFE321-.LFB321
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8931
-	.uleb128 0x74
-	.4byte	0x2a8f
+	.4byte	0x8998
+	.uleb128 0x76
+	.4byte	0x2af6
 	.byte	0
-	.uleb128 0x6e
-	.4byte	0x2a9b
-	.uleb128 0x6e
-	.4byte	0x2aa5
-	.uleb128 0x6e
-	.4byte	0x2ab1
+	.uleb128 0x70
+	.4byte	0x2b02
+	.uleb128 0x70
+	.4byte	0x2b0c
+	.uleb128 0x70
+	.4byte	0x2b18
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0xb8
-	.4byte	0x8913
-	.uleb128 0x6e
-	.4byte	0x8877
-	.uleb128 0x6f
-	.4byte	0x887d
-	.4byte	.LLST238
-	.uleb128 0x75
-	.4byte	0x8882
+	.4byte	0x897a
+	.uleb128 0x70
+	.4byte	0x88de
+	.uleb128 0x71
+	.4byte	0x88e4
+	.4byte	.LLST240
+	.uleb128 0x77
+	.4byte	0x88e9
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -104
-	.uleb128 0x75
-	.4byte	0x8887
+	.uleb128 0x77
+	.4byte	0x88ee
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
-	.uleb128 0x5f
-	.4byte	.LBB234
-	.4byte	.LBE234-.LBB234
-	.4byte	0x88fd
-	.uleb128 0x75
-	.4byte	0x2ac2
+	.uleb128 0x61
+	.4byte	.LBB238
+	.4byte	.LBE238-.LBB238
+	.4byte	0x8964
+	.uleb128 0x77
+	.4byte	0x2b29
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
 	.uleb128 0x32
-	.4byte	.LVL918
+	.4byte	.LVL920
 	.4byte	0x26b9
-	.4byte	0x88ea
+	.4byte	0x8951
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41071,15 +41146,15 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL919
-	.4byte	0x6122
+	.4byte	.LVL921
+	.4byte	0x6189
 	.uleb128 0x44
-	.4byte	.LVL920
-	.4byte	0x2bbf
+	.4byte	.LVL922
+	.4byte	0x2c26
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL917
-	.4byte	0x5212
+	.4byte	.LVL919
+	.4byte	0x5279
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41093,11 +41168,11 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x67
-	.4byte	.LBB237
-	.4byte	.LBE237-.LBB237
-	.uleb128 0x75
-	.4byte	0x2ad0
+	.uleb128 0x69
+	.4byte	.LBB241
+	.4byte	.LBE241-.LBB241
+	.uleb128 0x77
+	.4byte	0x2b37
 	.uleb128 0xd
 	.byte	0x40
 	.byte	0x45
@@ -41111,51 +41186,51 @@ __func__.9940:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x72
 	.4byte	0x2410
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
+	.4byte	.LFB347
+	.4byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8a39
-	.uleb128 0x5c
+	.4byte	0x8aa0
+	.uleb128 0x46
 	.4byte	0x2420
-	.4byte	.LLST280
-	.uleb128 0x74
+	.4byte	.LLST282
+	.uleb128 0x76
 	.4byte	0x242b
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2436
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2441
-	.uleb128 0x67
-	.4byte	.LBB241
-	.4byte	.LBE241-.LBB241
-	.uleb128 0x5c
+	.uleb128 0x69
+	.4byte	.LBB245
+	.4byte	.LBE245-.LBB245
+	.uleb128 0x46
 	.4byte	0x2420
-	.4byte	.LLST281
-	.uleb128 0x67
-	.4byte	.LBB242
-	.4byte	.LBE242-.LBB242
-	.uleb128 0x6e
-	.4byte	0x894d
-	.uleb128 0x75
-	.4byte	0x8953
+	.4byte	.LLST283
+	.uleb128 0x69
+	.4byte	.LBB246
+	.4byte	.LBE246-.LBB246
+	.uleb128 0x70
+	.4byte	0x89b4
+	.uleb128 0x77
+	.4byte	0x89ba
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -80
-	.uleb128 0x75
-	.4byte	0x8958
+	.uleb128 0x77
+	.4byte	0x89bf
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x76
+	.uleb128 0x78
 	.4byte	0x244c
 	.4byte	.LDL1
 	.uleb128 0x32
-	.4byte	.LVL1143
+	.4byte	.LVL1145
 	.4byte	0x230c
-	.4byte	0x89b9
+	.4byte	0x8a20
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41176,9 +41251,9 @@ __func__.9940:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1144
+	.4byte	.LVL1146
 	.4byte	0x230c
-	.4byte	0x89d8
+	.4byte	0x8a3f
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41198,9 +41273,9 @@ __func__.9940:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1145
+	.4byte	.LVL1147
 	.4byte	0x2464
-	.4byte	0x89f7
+	.4byte	0x8a5e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41219,9 +41294,9 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1146
+	.4byte	.LVL1148
 	.4byte	0x251a
-	.4byte	0x8a1b
+	.4byte	0x8a82
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41245,7 +41320,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1148
+	.4byte	.LVL1150
 	.4byte	0x2464
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -41267,50 +41342,50 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2ade
+	.uleb128 0x72
+	.4byte	0x2b45
 	.4byte	.LFB320
 	.4byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8af2
-	.uleb128 0x5c
-	.4byte	0x2aef
-	.4byte	.LLST301
-	.uleb128 0x6e
-	.4byte	0x2afb
-	.uleb128 0x6e
-	.4byte	0x2b07
-	.uleb128 0x6e
-	.4byte	0x2b11
-	.uleb128 0x6e
-	.4byte	0x2b1b
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0xe8
-	.uleb128 0x6d
-	.4byte	0x2aef
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0xe8
-	.uleb128 0x6f
-	.4byte	0x8a55
-	.4byte	.LLST302
-	.uleb128 0x6f
-	.4byte	0x8a5a
+	.4byte	0x8b59
+	.uleb128 0x46
+	.4byte	0x2b56
 	.4byte	.LLST303
+	.uleb128 0x70
+	.4byte	0x2b62
+	.uleb128 0x70
+	.4byte	0x2b6e
+	.uleb128 0x70
+	.4byte	0x2b78
+	.uleb128 0x70
+	.4byte	0x2b82
+	.uleb128 0x74
+	.4byte	.Ldebug_ranges0+0xe8
 	.uleb128 0x6f
-	.4byte	0x8a5f
+	.4byte	0x2b56
+	.uleb128 0x74
+	.4byte	.Ldebug_ranges0+0xe8
+	.uleb128 0x71
+	.4byte	0x8abc
 	.4byte	.LLST304
-	.uleb128 0x75
-	.4byte	0x8a64
+	.uleb128 0x71
+	.4byte	0x8ac1
+	.4byte	.LLST305
+	.uleb128 0x71
+	.4byte	0x8ac6
+	.4byte	.LLST306
+	.uleb128 0x77
+	.4byte	0x8acb
 	.uleb128 0x1
 	.byte	0x5b
 	.uleb128 0x44
-	.4byte	.LVL1226
-	.4byte	0x2b28
-	.uleb128 0x32
 	.4byte	.LVL1228
-	.4byte	0x6192
-	.4byte	0x8ab7
+	.4byte	0x2b8f
+	.uleb128 0x32
+	.4byte	.LVL1230
+	.4byte	0x61f9
+	.4byte	0x8b1e
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41319,9 +41394,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1234
-	.4byte	0x9222
-	.4byte	0x8ad2
+	.4byte	.LVL1236
+	.4byte	0x9289
+	.4byte	0x8b39
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41337,9 +41412,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1235
-	.4byte	0x6828
-	.4byte	0x8ae6
+	.4byte	.LVL1237
+	.4byte	0x688f
+	.4byte	0x8b4d
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41348,39 +41423,39 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1236
-	.4byte	0x65f0
+	.4byte	.LVL1238
+	.4byte	0x6657
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3297
+	.uleb128 0x72
+	.4byte	0x32fe
 	.4byte	.LFB304
 	.4byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8bd2
-	.uleb128 0x5c
-	.4byte	0x32a8
-	.4byte	.LLST305
-	.uleb128 0x6e
-	.4byte	0x32b4
-	.uleb128 0x5f
-	.4byte	.LBB257
-	.4byte	.LBE257-.LBB257
-	.4byte	0x8bc8
-	.uleb128 0x5c
-	.4byte	0x32a8
-	.4byte	.LLST306
-	.uleb128 0x67
-	.4byte	.LBB258
-	.4byte	.LBE258-.LBB258
-	.uleb128 0x6e
-	.4byte	0x8b0e
+	.4byte	0x8c39
+	.uleb128 0x46
+	.4byte	0x330f
+	.4byte	.LLST307
+	.uleb128 0x70
+	.4byte	0x331b
+	.uleb128 0x61
+	.4byte	.LBB261
+	.4byte	.LBE261-.LBB261
+	.4byte	0x8c2f
+	.uleb128 0x46
+	.4byte	0x330f
+	.4byte	.LLST308
+	.uleb128 0x69
+	.4byte	.LBB262
+	.4byte	.LBE262-.LBB262
+	.uleb128 0x70
+	.4byte	0x8b75
 	.uleb128 0x32
-	.4byte	.LVL1246
-	.4byte	0x5bca
-	.4byte	0x8b54
+	.4byte	.LVL1248
+	.4byte	0x5c31
+	.4byte	0x8bbb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41395,9 +41470,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1247
-	.4byte	0x9222
-	.4byte	0x8b7b
+	.4byte	.LVL1249
+	.4byte	0x9289
+	.4byte	0x8be2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41418,9 +41493,9 @@ __func__.9940:
 	.2byte	0xa88
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1248
-	.4byte	0x375c
-	.4byte	0x8b8f
+	.4byte	.LVL1250
+	.4byte	0x37c3
+	.4byte	0x8bf6
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41429,9 +41504,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1249
-	.4byte	0x2ade
-	.4byte	0x8ba3
+	.4byte	.LVL1251
+	.4byte	0x2b45
+	.4byte	0x8c0a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41440,8 +41515,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1250
-	.4byte	0x9222
+	.4byte	.LVL1252
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41464,41 +41539,41 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1254
-	.4byte	0x5a4e
+	.4byte	.LVL1256
+	.4byte	0x5ab5
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4e75
+	.uleb128 0x72
+	.4byte	0x4edc
 	.4byte	.LFB271
 	.4byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8caa
-	.uleb128 0x72
+	.4byte	0x8d11
+	.uleb128 0x74
 	.4byte	.Ldebug_ranges0+0x108
-	.uleb128 0x6f
-	.4byte	0x4e83
-	.4byte	.LLST309
-	.uleb128 0x75
-	.4byte	0x4e8f
+	.uleb128 0x71
+	.4byte	0x4eea
+	.4byte	.LLST311
+	.uleb128 0x77
+	.4byte	0x4ef6
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -56
-	.uleb128 0x6f
-	.4byte	0x4e9b
-	.4byte	.LLST310
-	.uleb128 0x75
-	.4byte	0x4ea7
+	.uleb128 0x71
+	.4byte	0x4f02
+	.4byte	.LLST312
+	.uleb128 0x77
+	.4byte	0x4f0e
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -52
-	.uleb128 0x6f
-	.4byte	0x4eb3
-	.4byte	.LLST311
+	.uleb128 0x71
+	.4byte	0x4f1a
+	.4byte	.LLST313
 	.uleb128 0x32
-	.4byte	.LVL1267
-	.4byte	0x5212
-	.4byte	0x8c35
+	.4byte	.LVL1269
+	.4byte	0x5279
+	.4byte	0x8c9c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41519,9 +41594,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1269
+	.4byte	.LVL1271
 	.4byte	0x26b9
-	.4byte	0x8c54
+	.4byte	0x8cbb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41541,9 +41616,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1273
+	.4byte	.LVL1275
 	.4byte	0x230c
-	.4byte	0x8c68
+	.4byte	0x8ccf
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -41552,9 +41627,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1275
-	.4byte	0x32d7
-	.4byte	0x8c7c
+	.4byte	.LVL1277
+	.4byte	0x333e
+	.4byte	0x8ce3
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41563,9 +41638,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1276
+	.4byte	.LVL1278
 	.4byte	0x251a
-	.4byte	0x8c9f
+	.4byte	0x8d06
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41589,20 +41664,20 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1277
-	.4byte	0x31f2
+	.4byte	.LVL1279
+	.4byte	0x3259
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3da3
+	.uleb128 0x72
+	.4byte	0x3e0a
 	.4byte	.LFB289
 	.4byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8cdb
+	.4byte	0x8d42
 	.uleb128 0x2d
-	.4byte	.LVL1525
-	.4byte	0x50ef
+	.4byte	.LVL1527
+	.4byte	0x5156
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41621,17 +41696,17 @@ __func__.9940:
 	.4byte	.LANCHOR83
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x4aff
+	.uleb128 0x72
+	.4byte	0x4b66
 	.4byte	.LFB274
 	.4byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d32
+	.4byte	0x8d99
 	.uleb128 0x32
-	.4byte	.LVL1551
-	.4byte	0x4fd7
-	.4byte	0x8d02
+	.4byte	.LVL1553
+	.4byte	0x503e
+	.4byte	0x8d69
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41640,9 +41715,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1552
-	.4byte	0x9222
-	.4byte	0x8d22
+	.4byte	.LVL1554
+	.4byte	0x9289
+	.4byte	0x8d89
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41657,7 +41732,7 @@ __func__.9940:
 	.4byte	.LC100
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1553
+	.4byte	.LVL1555
 	.4byte	0x230c
 	.uleb128 0x2e
 	.uleb128 0x1
@@ -41666,17 +41741,17 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2d2c
+	.uleb128 0x72
+	.4byte	0x2d93
 	.4byte	.LFB314
 	.4byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8d80
+	.4byte	0x8de7
 	.uleb128 0x32
-	.4byte	.LVL1688
-	.4byte	0x2d35
-	.4byte	0x8d59
+	.4byte	.LVL1690
+	.4byte	0x2d9c
+	.4byte	0x8dc0
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41685,9 +41760,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1689
-	.4byte	0x4ec1
-	.4byte	0x8d70
+	.4byte	.LVL1691
+	.4byte	0x4f28
+	.4byte	0x8dd7
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41696,8 +41771,8 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1690
-	.4byte	0x2edb
+	.4byte	.LVL1692
+	.4byte	0x2f42
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41705,103 +41780,103 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x2996
+	.uleb128 0x72
+	.4byte	0x29fd
 	.4byte	.LFB322
 	.4byte	.LFE322-.LFB322
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x909f
-	.uleb128 0x5c
-	.4byte	0x29a7
-	.4byte	.LLST396
-	.uleb128 0x5c
-	.4byte	0x29b3
-	.4byte	.LLST397
-	.uleb128 0x74
-	.4byte	0x29bf
+	.4byte	0x9106
+	.uleb128 0x46
+	.4byte	0x2a0e
+	.4byte	.LLST398
+	.uleb128 0x46
+	.4byte	0x2a1a
+	.4byte	.LLST399
+	.uleb128 0x76
+	.4byte	0x2a26
 	.byte	0x1
-	.uleb128 0x6e
-	.4byte	0x29cb
-	.uleb128 0x6e
-	.4byte	0x29d7
-	.uleb128 0x77
-	.4byte	0x29e3
+	.uleb128 0x70
+	.4byte	0x2a32
+	.uleb128 0x70
+	.4byte	0x2a3e
+	.uleb128 0x79
+	.4byte	0x2a4a
 	.sleb128 -1
-	.uleb128 0x6e
-	.4byte	0x29ef
-	.uleb128 0x6e
-	.4byte	0x29fb
-	.uleb128 0x6e
-	.4byte	0x2a07
-	.uleb128 0x6e
-	.4byte	0x2a13
-	.uleb128 0x6e
-	.4byte	0x2a1f
-	.uleb128 0x6e
-	.4byte	0x2a2b
-	.uleb128 0x6e
-	.4byte	0x2a47
+	.uleb128 0x70
+	.4byte	0x2a56
+	.uleb128 0x70
+	.4byte	0x2a62
+	.uleb128 0x70
+	.4byte	0x2a6e
+	.uleb128 0x70
+	.4byte	0x2a7a
+	.uleb128 0x70
+	.4byte	0x2a86
+	.uleb128 0x70
+	.4byte	0x2a92
+	.uleb128 0x70
+	.4byte	0x2aae
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x158
-	.4byte	0x908f
-	.uleb128 0x5c
-	.4byte	0x29b3
-	.4byte	.LLST398
-	.uleb128 0x5c
-	.4byte	0x29a7
-	.4byte	.LLST399
-	.uleb128 0x72
-	.4byte	.Ldebug_ranges0+0x158
-	.uleb128 0x6e
-	.4byte	0x8da5
-	.uleb128 0x6f
-	.4byte	0x8dab
+	.4byte	0x90f6
+	.uleb128 0x46
+	.4byte	0x2a1a
 	.4byte	.LLST400
-	.uleb128 0x75
-	.4byte	0x8db0
+	.uleb128 0x46
+	.4byte	0x2a0e
+	.4byte	.LLST401
+	.uleb128 0x74
+	.4byte	.Ldebug_ranges0+0x158
+	.uleb128 0x70
+	.4byte	0x8e0c
+	.uleb128 0x71
+	.4byte	0x8e12
+	.4byte	.LLST402
+	.uleb128 0x77
+	.4byte	0x8e17
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x6e
-	.4byte	0x8db5
-	.uleb128 0x6f
-	.4byte	0x8dbb
-	.4byte	.LLST401
-	.uleb128 0x6f
-	.4byte	0x8dc0
-	.4byte	.LLST402
-	.uleb128 0x6f
-	.4byte	0x8dc5
+	.uleb128 0x70
+	.4byte	0x8e1c
+	.uleb128 0x71
+	.4byte	0x8e22
 	.4byte	.LLST403
-	.uleb128 0x6f
-	.4byte	0x8dca
+	.uleb128 0x71
+	.4byte	0x8e27
 	.4byte	.LLST404
-	.uleb128 0x6f
-	.4byte	0x8dcf
+	.uleb128 0x71
+	.4byte	0x8e2c
 	.4byte	.LLST405
-	.uleb128 0x6f
-	.4byte	0x8dd4
+	.uleb128 0x71
+	.4byte	0x8e31
 	.4byte	.LLST406
-	.uleb128 0x78
-	.4byte	0x2a37
-	.uleb128 0x78
-	.4byte	0x2a3f
-	.uleb128 0x6e
-	.4byte	0x8dd9
+	.uleb128 0x71
+	.4byte	0x8e36
+	.4byte	.LLST407
+	.uleb128 0x71
+	.4byte	0x8e3b
+	.4byte	.LLST408
+	.uleb128 0x7a
+	.4byte	0x2a9e
+	.uleb128 0x7a
+	.4byte	0x2aa6
+	.uleb128 0x70
+	.4byte	0x8e40
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x178
-	.4byte	0x8ec4
-	.uleb128 0x6f
-	.4byte	0x2a55
-	.4byte	.LLST407
+	.4byte	0x8f2b
+	.uleb128 0x71
+	.4byte	0x2abc
+	.4byte	.LLST409
 	.uleb128 0x44
-	.4byte	.LVL1716
-	.4byte	0x377a
+	.4byte	.LVL1718
+	.4byte	0x37e1
 	.uleb128 0x32
-	.4byte	.LVL1719
-	.4byte	0x5acd
-	.4byte	0x8e8d
+	.4byte	.LVL1721
+	.4byte	0x5b34
+	.4byte	0x8ef4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41810,9 +41885,9 @@ __func__.9940:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1721
-	.4byte	0x5acd
-	.4byte	0x8ea1
+	.4byte	.LVL1723
+	.4byte	0x5b34
+	.4byte	0x8f08
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41821,11 +41896,11 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1724
-	.4byte	0x2b28
+	.4byte	.LVL1726
+	.4byte	0x2b8f
 	.uleb128 0x34
-	.4byte	.LVL1736
-	.4byte	0x9222
+	.4byte	.LVL1738
+	.4byte	0x9289
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41841,12 +41916,12 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1747
-	.4byte	0x3101
+	.4byte	.LVL1749
+	.4byte	0x3168
 	.uleb128 0x32
-	.4byte	.LVL1748
-	.4byte	0x3ec7
-	.4byte	0x8ee1
+	.4byte	.LVL1750
+	.4byte	0x3f2e
+	.4byte	0x8f48
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41855,9 +41930,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1749
-	.4byte	0x5acd
-	.4byte	0x8ef5
+	.4byte	.LVL1751
+	.4byte	0x5b34
+	.4byte	0x8f5c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41866,15 +41941,15 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1752
-	.4byte	0x2a7e
+	.4byte	.LVL1754
+	.4byte	0x2ae5
 	.uleb128 0x44
-	.4byte	.LVL1755
-	.4byte	0x5acd
-	.uleb128 0x32
 	.4byte	.LVL1757
-	.4byte	0x31f2
-	.4byte	0x8f1b
+	.4byte	0x5b34
+	.uleb128 0x32
+	.4byte	.LVL1759
+	.4byte	0x3259
+	.4byte	0x8f82
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41883,9 +41958,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1762
-	.4byte	0x3101
-	.4byte	0x8f32
+	.4byte	.LVL1764
+	.4byte	0x3168
+	.4byte	0x8f99
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41896,9 +41971,9 @@ __func__.9940:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1763
-	.4byte	0x31f2
-	.4byte	0x8f46
+	.4byte	.LVL1765
+	.4byte	0x3259
+	.4byte	0x8fad
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41907,9 +41982,9 @@ __func__.9940:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1764
-	.4byte	0x9222
-	.4byte	0x8f6d
+	.4byte	.LVL1766
+	.4byte	0x9289
+	.4byte	0x8fd4
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41930,9 +42005,9 @@ __func__.9940:
 	.2byte	0x296
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1765
-	.4byte	0x9222
-	.4byte	0x8f94
+	.4byte	.LVL1767
+	.4byte	0x9289
+	.4byte	0x8ffb
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41953,9 +42028,9 @@ __func__.9940:
 	.2byte	0x297
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1766
-	.4byte	0x9222
-	.4byte	0x8fbb
+	.4byte	.LVL1768
+	.4byte	0x9289
+	.4byte	0x9022
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41976,9 +42051,9 @@ __func__.9940:
 	.2byte	0x298
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1767
-	.4byte	0x3ec7
-	.4byte	0x8fcf
+	.4byte	.LVL1769
+	.4byte	0x3f2e
+	.4byte	0x9036
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -41987,12 +42062,12 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1768
-	.4byte	0x2a7e
+	.4byte	.LVL1770
+	.4byte	0x2ae5
 	.uleb128 0x32
-	.4byte	.LVL1778
+	.4byte	.LVL1780
 	.4byte	0x26b9
-	.4byte	0x8fee
+	.4byte	0x9055
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x51
@@ -42002,9 +42077,9 @@ __func__.9940:
 	.byte	0x6
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1787
-	.4byte	0x9222
-	.4byte	0x9015
+	.4byte	.LVL1789
+	.4byte	0x9289
+	.4byte	0x907c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42025,9 +42100,9 @@ __func__.9940:
 	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL1788
-	.4byte	0x5212
-	.4byte	0x9034
+	.4byte	.LVL1790
+	.4byte	0x5279
+	.4byte	0x909b
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42047,12 +42122,12 @@ __func__.9940:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1790
-	.4byte	0x2ca7
+	.4byte	.LVL1792
+	.4byte	0x2d0e
 	.uleb128 0x32
-	.4byte	.LVL1791
-	.4byte	0x3137
-	.4byte	0x9057
+	.4byte	.LVL1793
+	.4byte	0x319e
+	.4byte	0x90be
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42067,28 +42142,28 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1792
-	.4byte	0x2c03
-	.uleb128 0x44
-	.4byte	.LVL1797
-	.4byte	0x2c03
-	.uleb128 0x44
-	.4byte	.LVL1798
-	.4byte	0x3297
+	.4byte	.LVL1794
+	.4byte	0x2c6a
 	.uleb128 0x44
 	.4byte	.LVL1799
-	.4byte	0x6e77
+	.4byte	0x2c6a
 	.uleb128 0x44
 	.4byte	.LVL1800
-	.4byte	0x5313
+	.4byte	0x32fe
 	.uleb128 0x44
 	.4byte	.LVL1801
-	.4byte	0x4d0e
+	.4byte	0x6ede
+	.uleb128 0x44
+	.4byte	.LVL1802
+	.4byte	0x537a
+	.uleb128 0x44
+	.4byte	.LVL1803
+	.4byte	0x4d75
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.4byte	.LVL1730
-	.4byte	0x2edb
+	.4byte	.LVL1732
+	.4byte	0x2f42
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42096,33 +42171,33 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x70
-	.4byte	0x3937
+	.uleb128 0x72
+	.4byte	0x399e
 	.4byte	.LFB295
 	.4byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x91ff
-	.uleb128 0x74
-	.4byte	0x3948
+	.4byte	0x9266
+	.uleb128 0x76
+	.4byte	0x39af
 	.byte	0
-	.uleb128 0x5f
-	.4byte	.LBB302
-	.4byte	.LBE302-.LBB302
-	.4byte	0x9195
-	.uleb128 0x6e
-	.4byte	0x90b2
+	.uleb128 0x61
+	.4byte	.LBB306
+	.4byte	.LBE306-.LBB306
+	.4byte	0x91fc
+	.uleb128 0x70
+	.4byte	0x9119
 	.uleb128 0x3e
 	.4byte	.Ldebug_ranges0+0x1a8
-	.4byte	0x90dd
-	.uleb128 0x6f
-	.4byte	0x3953
-	.4byte	.LLST447
+	.4byte	0x9144
+	.uleb128 0x71
+	.4byte	0x39ba
+	.4byte	.LLST449
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2002
-	.4byte	0x3caf
-	.4byte	0x90f1
+	.4byte	.LVL2004
+	.4byte	0x3d16
+	.4byte	0x9158
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42131,9 +42206,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2003
-	.4byte	0x3caf
-	.4byte	0x9105
+	.4byte	.LVL2005
+	.4byte	0x3d16
+	.4byte	0x916c
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42142,9 +42217,9 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2005
-	.4byte	0x4ec1
-	.4byte	0x911c
+	.4byte	.LVL2007
+	.4byte	0x4f28
+	.4byte	0x9183
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42153,9 +42228,9 @@ __func__.9940:
 	.4byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2006
-	.4byte	0x4ec1
-	.4byte	0x9133
+	.4byte	.LVL2008
+	.4byte	0x4f28
+	.4byte	0x919a
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42164,24 +42239,24 @@ __func__.9940:
 	.4byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2007
-	.4byte	0x5313
+	.4byte	.LVL2009
+	.4byte	0x537a
 	.uleb128 0x44
-	.4byte	.LVL2008
-	.4byte	0x4d0e
+	.4byte	.LVL2010
+	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2009
-	.4byte	0x4d0e
+	.4byte	.LVL2011
+	.4byte	0x4d75
 	.uleb128 0x44
-	.4byte	.LVL2013
-	.4byte	0x2bbf
+	.4byte	.LVL2015
+	.4byte	0x2c26
 	.uleb128 0x44
-	.4byte	.LVL2014
-	.4byte	0x2bbf
+	.4byte	.LVL2016
+	.4byte	0x2c26
 	.uleb128 0x32
-	.4byte	.LVL2015
-	.4byte	0x33c9
-	.4byte	0x9177
+	.4byte	.LVL2017
+	.4byte	0x3430
+	.4byte	0x91de
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42190,9 +42265,9 @@ __func__.9940:
 	.4byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x32
-	.4byte	.LVL2016
-	.4byte	0x33c9
-	.4byte	0x918b
+	.4byte	.LVL2018
+	.4byte	0x3430
+	.4byte	0x91f2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42201,42 +42276,42 @@ __func__.9940:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL2017
-	.4byte	0x3b98
+	.4byte	.LVL2019
+	.4byte	0x3bff
 	.byte	0
 	.uleb128 0x44
-	.4byte	.LVL1989
-	.4byte	0x5fb8
-	.uleb128 0x44
-	.4byte	.LVL1990
-	.4byte	0x4b0c
-	.uleb128 0x44
 	.4byte	.LVL1991
-	.4byte	0x4940
+	.4byte	0x601f
 	.uleb128 0x44
 	.4byte	.LVL1992
-	.4byte	0x46e2
+	.4byte	0x4b73
 	.uleb128 0x44
 	.4byte	.LVL1993
-	.4byte	0x4763
+	.4byte	0x49a7
 	.uleb128 0x44
 	.4byte	.LVL1994
-	.4byte	0x3d52
+	.4byte	0x4749
 	.uleb128 0x44
 	.4byte	.LVL1995
-	.4byte	0x4aff
+	.4byte	0x47ca
 	.uleb128 0x44
 	.4byte	.LVL1996
-	.4byte	0x5e7c
+	.4byte	0x3db9
 	.uleb128 0x44
 	.4byte	.LVL1997
-	.4byte	0x3dac
+	.4byte	0x4b66
 	.uleb128 0x44
 	.4byte	.LVL1998
-	.4byte	0x3f5d
-	.uleb128 0x34
+	.4byte	0x5ee3
+	.uleb128 0x44
 	.4byte	.LVL1999
-	.4byte	0x4f5b
+	.4byte	0x3e13
+	.uleb128 0x44
+	.4byte	.LVL2000
+	.4byte	0x3fc4
+	.uleb128 0x34
+	.4byte	.LVL2001
+	.4byte	0x4fc2
 	.uleb128 0x2e
 	.uleb128 0x1
 	.byte	0x50
@@ -42244,34 +42319,39 @@ __func__.9940:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x79
-	.4byte	.LASF874
-	.4byte	.LASF874
-	.byte	0xa
-	.byte	0x72
-	.uleb128 0x7a
+	.uleb128 0x7b
 	.4byte	.LASF875
 	.4byte	.LASF875
-	.byte	0x1b
-	.2byte	0x16d
-	.uleb128 0x7a
+	.byte	0xb
+	.byte	0x72
+	.uleb128 0x7c
 	.4byte	.LASF876
 	.4byte	.LASF876
-	.byte	0x1b
-	.2byte	0x16c
-	.uleb128 0x79
+	.byte	0x1c
+	.2byte	0x16d
+	.uleb128 0x7c
 	.4byte	.LASF877
 	.4byte	.LASF877
-	.byte	0x1d
-	.byte	0x12
-	.uleb128 0x79
+	.byte	0x1c
+	.2byte	0x16c
+	.uleb128 0x7b
 	.4byte	.LASF878
 	.4byte	.LASF878
-	.byte	0x1c
-	.byte	0x35
-	.uleb128 0x79
+	.byte	0x1d
+	.byte	0x12
+	.uleb128 0x7b
 	.4byte	.LASF879
 	.4byte	.LASF879
+	.byte	0x6
+	.byte	0x35
+	.uleb128 0x7c
+	.4byte	.LASF880
+	.4byte	.LASF880
+	.byte	0x1c
+	.2byte	0x399
+	.uleb128 0x7b
+	.4byte	.LASF881
+	.4byte	.LASF881
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -43184,6 +43264,47 @@ __func__.9940:
 	.byte	0
 	.byte	0
 	.uleb128 0x45
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x48
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43210,7 +43331,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x46
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43231,7 +43352,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x4a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43244,7 +43365,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x4b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43257,7 +43378,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43270,7 +43391,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -43281,7 +43402,7 @@ __func__.9940:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43294,19 +43415,19 @@ __func__.9940:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x50
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x51
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43325,7 +43446,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x52
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43340,7 +43461,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x53
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43355,7 +43476,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43370,7 +43491,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x55
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43387,7 +43508,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x56
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43402,7 +43523,7 @@ __func__.9940:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x57
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -43413,7 +43534,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x58
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -43426,7 +43547,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x59
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -43437,7 +43558,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x5a
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43452,7 +43573,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x5b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43467,7 +43588,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5c
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43494,7 +43615,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43509,7 +43630,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -43526,16 +43647,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43560,7 +43672,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x60
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43575,7 +43687,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x61
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -43586,7 +43698,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x62
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43601,7 +43713,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43626,7 +43738,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43645,7 +43757,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -43660,7 +43772,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -43679,7 +43791,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x67
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -43694,7 +43806,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x68
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -43709,7 +43821,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x69
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -43718,7 +43830,7 @@ __func__.9940:
 	.uleb128 0x6
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x6a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43737,7 +43849,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x6b
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43748,7 +43860,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43765,7 +43877,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43790,7 +43902,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43807,21 +43919,21 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43830,7 +43942,7 @@ __func__.9940:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x72
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43847,7 +43959,7 @@ __func__.9940:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x73
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43856,14 +43968,14 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x74
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x75
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43878,7 +43990,7 @@ __func__.9940:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x76
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43887,7 +43999,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x75
+	.uleb128 0x77
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43896,7 +44008,7 @@ __func__.9940:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x76
+	.uleb128 0x78
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -43905,7 +44017,7 @@ __func__.9940:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x77
+	.uleb128 0x79
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43914,14 +44026,14 @@ __func__.9940:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x7a
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x79
+	.uleb128 0x7b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43938,7 +44050,7 @@ __func__.9940:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x7a
+	.uleb128 0x7c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43958,13 +44070,13 @@ __func__.9940:
 	.byte	0
 	.section	.debug_loc,"",%progbits
 .Ldebug_loc0:
-.LLST453:
-	.4byte	.LVL2075
-	.4byte	.LVL2076-1
+.LLST455:
+	.4byte	.LVL2077
+	.4byte	.LVL2078-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2076-1
-	.4byte	.LFE350
+	.4byte	.LVL2078-1
+	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43972,13 +44084,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST454:
-	.4byte	.LVL2075
-	.4byte	.LVL2076-1
+.LLST456:
+	.4byte	.LVL2077
+	.4byte	.LVL2078-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL2076-1
-	.4byte	.LFE350
+	.4byte	.LVL2078-1
+	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43986,13 +44098,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST455:
-	.4byte	.LVL2075
-	.4byte	.LVL2076-1
+.LLST457:
+	.4byte	.LVL2077
+	.4byte	.LVL2078-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2076-1
-	.4byte	.LFE350
+	.4byte	.LVL2078-1
+	.4byte	.LFE351
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44000,13 +44112,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST285:
-	.4byte	.LVL1159
-	.4byte	.LVL1160-1
+.LLST287:
+	.4byte	.LVL1161
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1160-1
-	.4byte	.LFE349
+	.4byte	.LVL1162-1
+	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44014,13 +44126,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST286:
-	.4byte	.LVL1159
-	.4byte	.LVL1160-1
+.LLST288:
+	.4byte	.LVL1161
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1160-1
-	.4byte	.LFE349
+	.4byte	.LVL1162-1
+	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44028,13 +44140,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST287:
-	.4byte	.LVL1159
-	.4byte	.LVL1160-1
+.LLST289:
+	.4byte	.LVL1161
+	.4byte	.LVL1162-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1160-1
-	.4byte	.LFE349
+	.4byte	.LVL1162-1
+	.4byte	.LFE350
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44042,13 +44154,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST189:
-	.4byte	.LVL695
-	.4byte	.LVL696-1
+.LLST191:
+	.4byte	.LVL697
+	.4byte	.LVL698-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL696-1
-	.4byte	.LFE348
+	.4byte	.LVL698-1
+	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44056,13 +44168,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST190:
-	.4byte	.LVL695
-	.4byte	.LVL696-1
+.LLST192:
+	.4byte	.LVL697
+	.4byte	.LVL698-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL696-1
-	.4byte	.LFE348
+	.4byte	.LVL698-1
+	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44070,13 +44182,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST191:
-	.4byte	.LVL695
-	.4byte	.LVL696-1
+.LLST193:
+	.4byte	.LVL697
+	.4byte	.LVL698-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL696-1
-	.4byte	.LFE348
+	.4byte	.LVL698-1
+	.4byte	.LFE349
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44084,51 +44196,51 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST282:
-	.4byte	.LVL1150
-	.4byte	.LVL1152-1
+.LLST284:
+	.4byte	.LVL1152
+	.4byte	.LVL1154-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1152-1
-	.4byte	.LFE347
+	.4byte	.LVL1154-1
+	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST283:
-	.4byte	.LVL1150
-	.4byte	.LVL1151
+.LLST285:
+	.4byte	.LVL1152
+	.4byte	.LVL1153
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1151
-	.4byte	.LFE347
+	.4byte	.LVL1153
+	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST284:
-	.4byte	.LVL1154
-	.4byte	.LVL1155
-	.2byte	0x1
-	.byte	0x50
+.LLST286:
 	.4byte	.LVL1156
 	.4byte	.LVL1157
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1158
+	.4byte	.LVL1159
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1157
-	.4byte	.LFE347
+	.4byte	.LVL1159
+	.4byte	.LFE348
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST170:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST172:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44136,13 +44248,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST171:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST173:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44150,35 +44262,35 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST172:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST174:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST173:
-	.4byte	.LVL629
-	.4byte	.LVL630
+.LLST175:
+	.4byte	.LVL631
+	.4byte	.LVL632
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL631
-	.4byte	.LFE345
+	.4byte	.LVL633
+	.4byte	.LFE346
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST174:
-	.4byte	.LVL625
-	.4byte	.LVL626
+.LLST176:
+	.4byte	.LVL627
+	.4byte	.LVL628
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL626
-	.4byte	.LFE345
+	.4byte	.LVL628
+	.4byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44186,72 +44298,72 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST162:
-	.4byte	.LVL602
-	.4byte	.LVL605
+.LLST164:
+	.4byte	.LVL604
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL606
 	.4byte	.LVL608
+	.4byte	.LVL610
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL622
-	.4byte	.LFE344
+	.4byte	.LVL624
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST163:
-	.4byte	.LVL602
-	.4byte	.LVL605
+.LLST165:
+	.4byte	.LVL604
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL606
 	.4byte	.LVL608
+	.4byte	.LVL610
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL622
 	.4byte	.LVL624
+	.4byte	.LVL626
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL624
-	.4byte	.LFE344
+	.4byte	.LVL626
+	.4byte	.LFE345
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44259,129 +44371,129 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST164:
-	.4byte	.LVL602
-	.4byte	.LVL605
+.LLST166:
+	.4byte	.LVL604
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL605
-	.4byte	.LFE344
+	.4byte	.LVL607
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST165:
-	.4byte	.LVL602
-	.4byte	.LVL603
+.LLST167:
+	.4byte	.LVL604
+	.4byte	.LVL605
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL603
-	.4byte	.LVL607
+	.4byte	.LVL605
+	.4byte	.LVL609
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL607
-	.4byte	.LVL608
+	.4byte	.LVL609
+	.4byte	.LVL610
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL608
-	.4byte	.LFE344
+	.4byte	.LVL610
+	.4byte	.LFE345
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST166:
-	.4byte	.LVL604
-	.4byte	.LVL605
+.LLST168:
+	.4byte	.LVL606
+	.4byte	.LVL607
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL622
-	.4byte	.LFE344
+	.4byte	.LVL624
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST167:
-	.4byte	.LVL611
-	.4byte	.LVL612
+.LLST169:
+	.4byte	.LVL613
+	.4byte	.LVL614
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL613
 	.4byte	.LVL615
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST168:
-	.4byte	.LVL604
+.LLST170:
 	.4byte	.LVL606
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL622
-	.4byte	.LVL623
+	.4byte	.LVL624
+	.4byte	.LVL625
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST169:
-	.4byte	.LVL604
-	.4byte	.LVL605
+.LLST171:
+	.4byte	.LVL606
+	.4byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL605
-	.4byte	.LVL606
+	.4byte	.LVL607
+	.4byte	.LVL608
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL606
 	.4byte	.LVL608
+	.4byte	.LVL610
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL608
-	.4byte	.LVL615
+	.4byte	.LVL610
+	.4byte	.LVL617
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL615
-	.4byte	.LVL622
+	.4byte	.LVL617
+	.4byte	.LVL624
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL622
-	.4byte	.LFE344
+	.4byte	.LVL624
+	.4byte	.LFE345
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST151:
-	.4byte	.LVL562
+.LLST153:
 	.4byte	.LVL564
+	.4byte	.LVL566
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL564
-	.4byte	.LFE343
+	.4byte	.LVL566
+	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44389,24 +44501,24 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST152:
-	.4byte	.LVL562
+.LLST154:
 	.4byte	.LVL564
+	.4byte	.LVL566
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL564
-	.4byte	.LFE343
+	.4byte	.LVL566
+	.4byte	.LFE344
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST153:
-	.4byte	.LVL562
-	.4byte	.LVL563
+.LLST155:
+	.4byte	.LVL564
+	.4byte	.LVL565
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL563
-	.4byte	.LFE343
+	.4byte	.LVL565
+	.4byte	.LFE344
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -44414,233 +44526,247 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST154:
-	.4byte	.LVL568
-	.4byte	.LVL569
+.LLST156:
+	.4byte	.LVL570
+	.4byte	.LVL571
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL569
-	.4byte	.LVL570-1
+	.4byte	.LVL571
+	.4byte	.LVL572-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.4byte	.LVL570
-	.4byte	.LVL571
+	.4byte	.LVL572
+	.4byte	.LVL573
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL571
-	.4byte	.LVL572
+	.4byte	.LVL573
+	.4byte	.LVL574
 	.2byte	0x3
 	.byte	0x70
 	.sleb128 -1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST142:
-	.4byte	.LVL551
+.LLST144:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST143:
-	.4byte	.LVL551
+.LLST145:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST144:
-	.4byte	.LVL551
+.LLST146:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST145:
-	.4byte	.LVL551
+.LLST147:
 	.4byte	.LVL553
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST146:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST148:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST147:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST149:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL555
 	.4byte	.LVL557
+	.4byte	.LVL559
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL557
-	.4byte	.LVL558
+	.4byte	.LVL559
+	.4byte	.LVL560
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL558
-	.4byte	.LVL559
+	.4byte	.LVL560
+	.4byte	.LVL561
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL559
-	.4byte	.LVL560
+	.4byte	.LVL561
+	.4byte	.LVL562
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL560
-	.4byte	.LFE341
+	.4byte	.LVL562
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST148:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST150:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST149:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST151:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST150:
-	.4byte	.LVL552
-	.4byte	.LVL553
+.LLST152:
+	.4byte	.LVL554
+	.4byte	.LVL555
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL553
-	.4byte	.LVL554
+	.4byte	.LVL555
+	.4byte	.LVL556
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL554
-	.4byte	.LVL555
+	.4byte	.LVL556
+	.4byte	.LVL557
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL555
-	.4byte	.LFE341
+	.4byte	.LVL557
+	.4byte	.LFE342
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
+.LLST143:
+	.4byte	.LVL551
+	.4byte	.LVL552-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL552-1
+	.4byte	.LFE341
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
 .LLST141:
 	.4byte	.LVL549
 	.4byte	.LVL550-1
@@ -44655,6 +44781,20 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
+.LLST142:
+	.4byte	.LVL549
+	.4byte	.LVL550-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL550-1
+	.4byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
 .LLST138:
 	.4byte	.LVL536
 	.4byte	.LVL537-1
@@ -44714,42 +44854,42 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST394:
-	.4byte	.LVL1697
-	.4byte	.LVL1700
+.LLST396:
+	.4byte	.LVL1699
+	.4byte	.LVL1702
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1705
+	.4byte	.LVL1707
 	.4byte	.LFE316
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST395:
-	.4byte	.LVL1704
-	.4byte	.LVL1705-1
+.LLST397:
+	.4byte	.LVL1706
+	.4byte	.LVL1707-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST269:
-	.4byte	.LVL1096
-	.4byte	.LVL1098-1
+.LLST271:
+	.4byte	.LVL1098
+	.4byte	.LVL1100-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1098-1
-	.4byte	.LVL1099
+	.4byte	.LVL1100-1
+	.4byte	.LVL1101
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1099
 	.4byte	.LVL1101
+	.4byte	.LVL1103
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1101
-	.4byte	.LVL1138
+	.4byte	.LVL1103
+	.4byte	.LVL1140
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1138
+	.4byte	.LVL1140
 	.4byte	.LFE313
 	.2byte	0x4
 	.byte	0xf3
@@ -44758,234 +44898,234 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST270:
-	.4byte	.LVL1096
-	.4byte	.LVL1098-1
+.LLST272:
+	.4byte	.LVL1098
+	.4byte	.LVL1100-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1098-1
-	.4byte	.LVL1099
+	.4byte	.LVL1100-1
+	.4byte	.LVL1101
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1099
 	.4byte	.LVL1101
+	.4byte	.LVL1103
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1101
-	.4byte	.LVL1138
+	.4byte	.LVL1103
+	.4byte	.LVL1140
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -48
-	.4byte	.LVL1138
+	.4byte	.LVL1140
 	.4byte	.LFE313
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 -48
 	.4byte	0
 	.4byte	0
-.LLST271:
-	.4byte	.LVL1112
-	.4byte	.LVL1113
+.LLST273:
+	.4byte	.LVL1114
+	.4byte	.LVL1115
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1113
-	.4byte	.LVL1118
+	.4byte	.LVL1115
+	.4byte	.LVL1120
 	.2byte	0x2
 	.byte	0x7c
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
-.LLST272:
-	.4byte	.LVL1104
-	.4byte	.LVL1105
+.LLST274:
+	.4byte	.LVL1106
+	.4byte	.LVL1107
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1105
-	.4byte	.LVL1114
+	.4byte	.LVL1107
+	.4byte	.LVL1116
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1115
-	.4byte	.LVL1124
+	.4byte	.LVL1117
+	.4byte	.LVL1126
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1127
-	.4byte	.LVL1137
+	.4byte	.LVL1129
+	.4byte	.LVL1139
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST273:
-	.4byte	.LVL1107
-	.4byte	.LVL1111
+.LLST275:
+	.4byte	.LVL1109
+	.4byte	.LVL1113
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1118
-	.4byte	.LVL1121
+	.4byte	.LVL1120
+	.4byte	.LVL1123
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1129
-	.4byte	.LVL1137
+	.4byte	.LVL1131
+	.4byte	.LVL1139
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST274:
-	.4byte	.LVL1104
-	.4byte	.LVL1105
+.LLST276:
+	.4byte	.LVL1106
+	.4byte	.LVL1107
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1105
-	.4byte	.LVL1106
+	.4byte	.LVL1107
+	.4byte	.LVL1108
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1106
-	.4byte	.LVL1107-1
+	.4byte	.LVL1108
+	.4byte	.LVL1109-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1111
-	.4byte	.LVL1116
+	.4byte	.LVL1113
+	.4byte	.LVL1118
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1116
-	.4byte	.LVL1117
+	.4byte	.LVL1118
+	.4byte	.LVL1119
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST275:
-	.4byte	.LVL1103
-	.4byte	.LVL1107
+.LLST277:
+	.4byte	.LVL1105
+	.4byte	.LVL1109
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1110
-	.4byte	.LVL1118
+	.4byte	.LVL1112
+	.4byte	.LVL1120
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1120
-	.4byte	.LVL1125
-	.2byte	0x1
-	.byte	0x50
+	.4byte	.LVL1122
 	.4byte	.LVL1127
-	.4byte	.LVL1128
 	.2byte	0x1
 	.byte	0x50
+	.4byte	.LVL1129
 	.4byte	.LVL1130
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL1132
+	.4byte	.LVL1134
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1136
-	.4byte	.LVL1137
+	.4byte	.LVL1138
+	.4byte	.LVL1139
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST276:
-	.4byte	.LVL1097
-	.4byte	.LVL1109
+.LLST278:
+	.4byte	.LVL1099
+	.4byte	.LVL1111
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1110
-	.4byte	.LVL1131
+	.4byte	.LVL1112
+	.4byte	.LVL1133
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1134
 	.4byte	.LVL1136
+	.4byte	.LVL1138
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1136
 	.4byte	.LVL1138
+	.4byte	.LVL1140
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST277:
-	.4byte	.LVL1119
-	.4byte	.LVL1120-1
+.LLST279:
+	.4byte	.LVL1121
+	.4byte	.LVL1122-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1120-1
-	.4byte	.LVL1124
+	.4byte	.LVL1122-1
+	.4byte	.LVL1126
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1127
-	.4byte	.LVL1129-1
+	.4byte	.LVL1129
+	.4byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1129-1
-	.4byte	.LVL1136
+	.4byte	.LVL1131-1
+	.4byte	.LVL1138
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST278:
-	.4byte	.LVL1096
-	.4byte	.LVL1102
+.LLST280:
+	.4byte	.LVL1098
+	.4byte	.LVL1104
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1102
-	.4byte	.LVL1108
+	.4byte	.LVL1104
+	.4byte	.LVL1110
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1108
 	.4byte	.LVL1110
+	.4byte	.LVL1112
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1110
-	.4byte	.LVL1138
+	.4byte	.LVL1112
+	.4byte	.LVL1140
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST279:
-	.4byte	.LVL1122
-	.4byte	.LVL1123
+.LLST281:
+	.4byte	.LVL1124
+	.4byte	.LVL1125
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1123
-	.4byte	.LVL1124
+	.4byte	.LVL1125
+	.4byte	.LVL1126
 	.2byte	0x5
 	.byte	0x91
 	.sleb128 -44
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0xc
-	.4byte	.LVL1127
-	.4byte	.LVL1129-1
+	.4byte	.LVL1129
+	.4byte	.LVL1131-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST389:
-	.4byte	.LVL1653
+.LLST391:
 	.4byte	.LVL1655
+	.4byte	.LVL1657
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1655
-	.4byte	.LVL1656
+	.4byte	.LVL1657
+	.4byte	.LVL1658
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1656
 	.4byte	.LVL1658
+	.4byte	.LVL1660
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1658
+	.4byte	.LVL1660
 	.4byte	.LFE311
 	.2byte	0x4
 	.byte	0xf3
@@ -44994,75 +45134,75 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST390:
-	.4byte	.LVL1666
-	.4byte	.LVL1669
+.LLST392:
+	.4byte	.LVL1668
+	.4byte	.LVL1671
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1669
-	.4byte	.LVL1672
+	.4byte	.LVL1671
+	.4byte	.LVL1674
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1675
-	.4byte	.LVL1683
+	.4byte	.LVL1677
+	.4byte	.LVL1685
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1683
-	.4byte	.LVL1684
+	.4byte	.LVL1685
+	.4byte	.LVL1686
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1685
+	.4byte	.LVL1687
 	.4byte	.LFE311
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST391:
-	.4byte	.LVL1659
-	.4byte	.LVL1664
+.LLST393:
+	.4byte	.LVL1661
+	.4byte	.LVL1666
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1665
-	.4byte	.LVL1666
+	.4byte	.LVL1667
+	.4byte	.LVL1668
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1680
 	.4byte	.LVL1682
+	.4byte	.LVL1684
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST392:
-	.4byte	.LVL1654
-	.4byte	.LVL1655
-	.2byte	0x1
-	.byte	0x51
+.LLST394:
 	.4byte	.LVL1656
 	.4byte	.LVL1657
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1657
+	.4byte	.LVL1658
+	.4byte	.LVL1659
+	.2byte	0x1
+	.byte	0x51
 	.4byte	.LVL1659
+	.4byte	.LVL1661
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.4byte	.LVL1659
-	.4byte	.LVL1660-1
+	.4byte	.LVL1661
+	.4byte	.LVL1662-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1664
-	.4byte	.LVL1665
+	.4byte	.LVL1666
+	.4byte	.LVL1667
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST393:
-	.4byte	.LVL1676
-	.4byte	.LVL1686
+.LLST395:
+	.4byte	.LVL1678
+	.4byte	.LVL1688
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
@@ -45258,23 +45398,23 @@ __func__.9940:
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST307:
-	.4byte	.LVL1255
-	.4byte	.LVL1256
+.LLST309:
+	.4byte	.LVL1257
+	.4byte	.LVL1258
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1256
-	.4byte	.LVL1262
+	.4byte	.LVL1258
+	.4byte	.LVL1264
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1262
-	.4byte	.LVL1263
+	.4byte	.LVL1264
+	.4byte	.LVL1265
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1263
+	.4byte	.LVL1265
 	.4byte	.LFE305
 	.2byte	0x4
 	.byte	0xf3
@@ -45283,23 +45423,23 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST308:
-	.4byte	.LVL1255
-	.4byte	.LVL1258
+.LLST310:
+	.4byte	.LVL1257
+	.4byte	.LVL1260
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1259
-	.4byte	.LVL1260
+	.4byte	.LVL1261
+	.4byte	.LVL1262
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1262
-	.4byte	.LVL1265
+	.4byte	.LVL1264
+	.4byte	.LVL1267
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1265
+	.4byte	.LVL1267
 	.4byte	.LFE305
 	.2byte	0x1
 	.byte	0x55
@@ -45346,27 +45486,27 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST374:
-	.4byte	.LVL1590
+.LLST376:
 	.4byte	.LVL1592
+	.4byte	.LVL1594
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1592
+	.4byte	.LVL1594
 	.4byte	.LFE302
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST292:
-	.4byte	.LVL1182
-	.4byte	.LVL1183
+.LLST294:
+	.4byte	.LVL1184
+	.4byte	.LVL1185
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1183
-	.4byte	.LVL1223
+	.4byte	.LVL1185
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1223
+	.4byte	.LVL1225
 	.4byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -45375,62 +45515,62 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST293:
-	.4byte	.LVL1189
-	.4byte	.LVL1194
+.LLST295:
+	.4byte	.LVL1191
+	.4byte	.LVL1196
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1195
-	.4byte	.LVL1223
+	.4byte	.LVL1197
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST294:
-	.4byte	.LVL1197
-	.4byte	.LVL1210
+.LLST296:
+	.4byte	.LVL1199
+	.4byte	.LVL1212
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1211
-	.4byte	.LVL1223
+	.4byte	.LVL1213
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST295:
-	.4byte	.LVL1202
-	.4byte	.LVL1203
+.LLST297:
+	.4byte	.LVL1204
+	.4byte	.LVL1205
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1204
-	.4byte	.LVL1205
+	.4byte	.LVL1206
+	.4byte	.LVL1207
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1205
-	.4byte	.LVL1209
+	.4byte	.LVL1207
+	.4byte	.LVL1211
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1215
-	.4byte	.LVL1219
+	.4byte	.LVL1217
+	.4byte	.LVL1221
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1219
-	.4byte	.LVL1220
+	.4byte	.LVL1221
+	.4byte	.LVL1222
 	.2byte	0x3
 	.byte	0x7a
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1221
 	.4byte	.LVL1223
+	.4byte	.LVL1225
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST296:
-	.4byte	.LVL1217
-	.4byte	.LVL1218-1
+.LLST298:
+	.4byte	.LVL1219
+	.4byte	.LVL1220-1
 	.2byte	0x6
 	.byte	0x7c
 	.sleb128 4
@@ -45440,74 +45580,74 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST297:
-	.4byte	.LVL1204
-	.4byte	.LVL1205
+.LLST299:
+	.4byte	.LVL1206
+	.4byte	.LVL1207
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1205
-	.4byte	.LVL1206-1
+	.4byte	.LVL1207
+	.4byte	.LVL1208-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1215
-	.4byte	.LVL1216
+	.4byte	.LVL1217
+	.4byte	.LVL1218
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1216
-	.4byte	.LVL1217
+	.4byte	.LVL1218
+	.4byte	.LVL1219
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1217
-	.4byte	.LVL1218-1
+	.4byte	.LVL1219
+	.4byte	.LVL1220-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1218-1
-	.4byte	.LVL1219
+	.4byte	.LVL1220-1
+	.4byte	.LVL1221
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL1219
 	.4byte	.LVL1221
+	.4byte	.LVL1223
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST298:
-	.4byte	.LVL1182
-	.4byte	.LVL1183
+.LLST300:
+	.4byte	.LVL1184
+	.4byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1185
-	.4byte	.LVL1186
+	.4byte	.LVL1187
+	.4byte	.LVL1188
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1186
-	.4byte	.LVL1187
+	.4byte	.LVL1188
+	.4byte	.LVL1189
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1187
-	.4byte	.LVL1188-1
+	.4byte	.LVL1189
+	.4byte	.LVL1190-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST299:
-	.4byte	.LVL1212
+.LLST301:
 	.4byte	.LVL1214
+	.4byte	.LVL1216
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST300:
-	.4byte	.LVL1212
+.LLST302:
 	.4byte	.LVL1214
+	.4byte	.LVL1216
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
@@ -45772,33 +45912,33 @@ __func__.9940:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST237:
-	.4byte	.LVL911
+.LLST239:
 	.4byte	.LVL913
+	.4byte	.LVL915
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST264:
-	.4byte	.LVL1074
-	.4byte	.LVL1075
+.LLST266:
+	.4byte	.LVL1076
+	.4byte	.LVL1077
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1077
-	.4byte	.LVL1080
+	.4byte	.LVL1079
+	.4byte	.LVL1082
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1089
 	.4byte	.LVL1091
+	.4byte	.LVL1093
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1091
-	.4byte	.LVL1092
+	.4byte	.LVL1093
+	.4byte	.LVL1094
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1092
+	.4byte	.LVL1094
 	.4byte	.LFE293
 	.2byte	0x3
 	.byte	0x75
@@ -45806,81 +45946,81 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST265:
-	.4byte	.LVL1072
-	.4byte	.LVL1073
+.LLST267:
+	.4byte	.LVL1074
+	.4byte	.LVL1075
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1084
-	.4byte	.LVL1089
+	.4byte	.LVL1086
+	.4byte	.LVL1091
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST266:
-	.4byte	.LVL1077
+.LLST268:
 	.4byte	.LVL1079
+	.4byte	.LVL1081
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1086
-	.4byte	.LVL1087
+	.4byte	.LVL1088
+	.4byte	.LVL1089
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST267:
-	.4byte	.LVL1070
-	.4byte	.LVL1074
+.LLST269:
+	.4byte	.LVL1072
+	.4byte	.LVL1076
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1074
-	.4byte	.LVL1077
+	.4byte	.LVL1076
+	.4byte	.LVL1079
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1081
-	.4byte	.LVL1082
+	.4byte	.LVL1083
+	.4byte	.LVL1084
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1082
-	.4byte	.LVL1083
+	.4byte	.LVL1084
+	.4byte	.LVL1085
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1084
-	.4byte	.LVL1089
+	.4byte	.LVL1086
+	.4byte	.LVL1091
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1089
+	.4byte	.LVL1091
 	.4byte	.LFE293
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST268:
-	.4byte	.LVL1076
-	.4byte	.LVL1081
+.LLST270:
+	.4byte	.LVL1078
+	.4byte	.LVL1083
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST371:
-	.4byte	.LVL1578
-	.4byte	.LVL1579
+.LLST373:
+	.4byte	.LVL1580
+	.4byte	.LVL1581
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1584
-	.4byte	.LVL1588
+	.4byte	.LVL1586
+	.4byte	.LVL1590
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1588
-	.4byte	.LVL1589
+	.4byte	.LVL1590
+	.4byte	.LVL1591
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1589
+	.4byte	.LVL1591
 	.4byte	.LFE292
 	.2byte	0x3
 	.byte	0x76
@@ -45888,72 +46028,72 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST372:
-	.4byte	.LVL1576
-	.4byte	.LVL1577
+.LLST374:
+	.4byte	.LVL1578
+	.4byte	.LVL1579
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1579
-	.4byte	.LVL1584
+	.4byte	.LVL1581
+	.4byte	.LVL1586
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST373:
-	.4byte	.LVL1581
-	.4byte	.LVL1582
+.LLST375:
+	.4byte	.LVL1583
+	.4byte	.LVL1584
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST339:
-	.4byte	.LVL1423
-	.4byte	.LVL1424
+.LLST341:
+	.4byte	.LVL1425
+	.4byte	.LVL1426
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1424
+	.4byte	.LVL1426
 	.4byte	.LFE291
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST340:
-	.4byte	.LVL1430
-	.4byte	.LVL1431
+.LLST342:
+	.4byte	.LVL1432
+	.4byte	.LVL1433
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1431
-	.4byte	.LVL1432-1
+	.4byte	.LVL1433
+	.4byte	.LVL1434-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.4byte	0
 	.4byte	0
-.LLST341:
-	.4byte	.LVL1423
-	.4byte	.LVL1424
+.LLST343:
+	.4byte	.LVL1425
+	.4byte	.LVL1426
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL1424
-	.4byte	.LVL1425
+	.4byte	.LVL1426
+	.4byte	.LVL1427
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1425
-	.4byte	.LVL1426
+	.4byte	.LVL1427
+	.4byte	.LVL1428
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1426
-	.4byte	.LVL1427
+	.4byte	.LVL1428
+	.4byte	.LVL1429
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -2
 	.byte	0x9f
-	.4byte	.LVL1428
+	.4byte	.LVL1430
 	.4byte	.LFE291
 	.2byte	0x3
 	.byte	0x75
@@ -45961,72 +46101,72 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST258:
-	.4byte	.LVL1048
-	.4byte	.LVL1059
+.LLST260:
+	.4byte	.LVL1050
+	.4byte	.LVL1061
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1059
-	.4byte	.LVL1060
+	.4byte	.LVL1061
+	.4byte	.LVL1062
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1060
-	.4byte	.LVL1061
+	.4byte	.LVL1062
+	.4byte	.LVL1063
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1061
-	.4byte	.LVL1069
+	.4byte	.LVL1063
+	.4byte	.LVL1071
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST259:
-	.4byte	.LVL1049
-	.4byte	.LVL1050-1
+.LLST261:
+	.4byte	.LVL1051
+	.4byte	.LVL1052-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1053
-	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.4byte	.LVL1056
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1054
-	.4byte	.LVL1055-1
+	.4byte	.LVL1056
+	.4byte	.LVL1057-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1061
-	.4byte	.LVL1062
+	.4byte	.LVL1063
+	.4byte	.LVL1064
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST260:
-	.4byte	.LVL1050
-	.4byte	.LVL1051-1
+.LLST262:
+	.4byte	.LVL1052
+	.4byte	.LVL1053-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST261:
-	.4byte	.LVL1049
-	.4byte	.LVL1052
+.LLST263:
+	.4byte	.LVL1051
+	.4byte	.LVL1054
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1053
 	.4byte	.LVL1055
+	.4byte	.LVL1057
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1055
 	.4byte	.LVL1057
+	.4byte	.LVL1059
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1057
-	.4byte	.LVL1059-1
+	.4byte	.LVL1059
+	.4byte	.LVL1061-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46037,16 +46177,16 @@ __func__.9940:
 	.byte	0x22
 	.byte	0x23
 	.uleb128 0x4
-	.4byte	.LVL1061
-	.4byte	.LVL1062
+	.4byte	.LVL1063
+	.4byte	.LVL1064
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1062
 	.4byte	.LVL1064
+	.4byte	.LVL1066
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1064
-	.4byte	.LVL1066-1
+	.4byte	.LVL1066
+	.4byte	.LVL1068-1
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -46059,29 +46199,29 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST262:
-	.4byte	.LVL1048
-	.4byte	.LVL1063
+.LLST264:
+	.4byte	.LVL1050
+	.4byte	.LVL1065
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1065
 	.4byte	.LVL1067
+	.4byte	.LVL1069
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1067
-	.4byte	.LVL1068-1
+	.4byte	.LVL1069
+	.4byte	.LVL1070-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_data_superblocks
 	.4byte	0
 	.4byte	0
-.LLST263:
-	.4byte	.LVL1048
-	.4byte	.LVL1056
+.LLST265:
+	.4byte	.LVL1050
+	.4byte	.LVL1058
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1058
-	.4byte	.LVL1069
+	.4byte	.LVL1060
+	.4byte	.LVL1071
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
@@ -46110,371 +46250,371 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST313:
-	.4byte	.LVL1285
-	.4byte	.LVL1288
+.LLST315:
+	.4byte	.LVL1287
+	.4byte	.LVL1290
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1288
 	.4byte	.LVL1290
+	.4byte	.LVL1292
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1290
-	.4byte	.LVL1291
+	.4byte	.LVL1292
+	.4byte	.LVL1293
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1291
+	.4byte	.LVL1293
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST314:
-	.4byte	.LVL1286
-	.4byte	.LVL1289
+.LLST316:
+	.4byte	.LVL1288
+	.4byte	.LVL1291
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1290
+	.4byte	.LVL1292
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST315:
-	.4byte	.LVL1287
+.LLST317:
 	.4byte	.LVL1289
+	.4byte	.LVL1291
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1290
+	.4byte	.LVL1292
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
 	.4byte	0
 	.4byte	0
-.LLST316:
-	.4byte	.LVL1290
-	.4byte	.LVL1291
+.LLST318:
+	.4byte	.LVL1292
+	.4byte	.LVL1293
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1292
-	.4byte	.LVL1296
+	.4byte	.LVL1294
+	.4byte	.LVL1298
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1297
-	.4byte	.LVL1298
+	.4byte	.LVL1299
+	.4byte	.LVL1300
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1298
-	.4byte	.LVL1299-1
+	.4byte	.LVL1300
+	.4byte	.LVL1301-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1309
 	.4byte	.LVL1311
+	.4byte	.LVL1313
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1311
-	.4byte	.LVL1314
+	.4byte	.LVL1313
+	.4byte	.LVL1316
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1314
-	.4byte	.LVL1319
+	.4byte	.LVL1316
+	.4byte	.LVL1321
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1319
-	.4byte	.LVL1320
+	.4byte	.LVL1321
+	.4byte	.LVL1322
 	.2byte	0x3
 	.byte	0x72
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1337
-	.4byte	.LVL1342
+	.4byte	.LVL1339
+	.4byte	.LVL1344
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1342
-	.4byte	.LVL1343
+	.4byte	.LVL1344
+	.4byte	.LVL1345
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1343
-	.4byte	.LVL1344-1
+	.4byte	.LVL1345
+	.4byte	.LVL1346-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1350
-	.4byte	.LVL1351
+	.4byte	.LVL1352
+	.4byte	.LVL1353
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1351
-	.4byte	.LVL1352-1
+	.4byte	.LVL1353
+	.4byte	.LVL1354-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1357
-	.4byte	.LVL1358
+	.4byte	.LVL1359
+	.4byte	.LVL1360
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1358
 	.4byte	.LVL1360
+	.4byte	.LVL1362
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1366
-	.4byte	.LVL1369
+	.4byte	.LVL1368
+	.4byte	.LVL1371
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1369
-	.4byte	.LVL1370
+	.4byte	.LVL1371
+	.4byte	.LVL1372
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST317:
-	.4byte	.LVL1349
-	.4byte	.LVL1350
+.LLST319:
+	.4byte	.LVL1351
+	.4byte	.LVL1352
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1372
-	.4byte	.LVL1375
+	.4byte	.LVL1374
+	.4byte	.LVL1377
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1378
-	.4byte	.LVL1381
+	.4byte	.LVL1380
+	.4byte	.LVL1383
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1419
-	.4byte	.LVL1420
+	.4byte	.LVL1421
+	.4byte	.LVL1422
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1422
+	.4byte	.LVL1424
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST318:
-	.4byte	.LVL1335
-	.4byte	.LVL1336
+.LLST320:
+	.4byte	.LVL1337
+	.4byte	.LVL1338
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1336
-	.4byte	.LVL1346
-	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1347
+	.4byte	.LVL1338
 	.4byte	.LVL1348
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL1349
 	.4byte	.LVL1350
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1351
+	.4byte	.LVL1352
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1350
-	.4byte	.LVL1355
+	.4byte	.LVL1352
+	.4byte	.LVL1357
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1356
-	.4byte	.LVL1361
+	.4byte	.LVL1358
+	.4byte	.LVL1363
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1361
-	.4byte	.LVL1366
+	.4byte	.LVL1363
+	.4byte	.LVL1368
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1366
+	.4byte	.LVL1368
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST319:
-	.4byte	.LVL1306
-	.4byte	.LVL1309
+.LLST321:
+	.4byte	.LVL1308
+	.4byte	.LVL1311
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1331
+	.4byte	.LVL1333
 	.4byte	.LFE284
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST320:
-	.4byte	.LVL1304
-	.4byte	.LVL1309
+.LLST322:
+	.4byte	.LVL1306
+	.4byte	.LVL1311
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1327
-	.4byte	.LVL1328
+	.4byte	.LVL1329
+	.4byte	.LVL1330
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1331
+	.4byte	.LVL1333
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST321:
-	.4byte	.LVL1291
-	.4byte	.LVL1293-1
+.LLST323:
+	.4byte	.LVL1293
+	.4byte	.LVL1295-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1309
 	.4byte	.LVL1311
+	.4byte	.LVL1313
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1315
-	.4byte	.LVL1316
+	.4byte	.LVL1317
+	.4byte	.LVL1318
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1316
-	.4byte	.LVL1321
+	.4byte	.LVL1318
+	.4byte	.LVL1323
 	.2byte	0x5
 	.byte	0x7d
 	.sleb128 0
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1338
 	.4byte	.LVL1340
+	.4byte	.LVL1342
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1340
-	.4byte	.LVL1343
+	.4byte	.LVL1342
+	.4byte	.LVL1345
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -68
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.4byte	.LVL1359
 	.4byte	.LVL1361
+	.4byte	.LVL1363
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1367
-	.4byte	.LVL1368
+	.4byte	.LVL1369
+	.4byte	.LVL1370
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1368
-	.4byte	.LVL1371
+	.4byte	.LVL1370
+	.4byte	.LVL1373
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.4byte	0
 	.4byte	0
-.LLST322:
-	.4byte	.LVL1294
-	.4byte	.LVL1295
+.LLST324:
+	.4byte	.LVL1296
+	.4byte	.LVL1297
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1295
-	.4byte	.LVL1307
+	.4byte	.LVL1297
+	.4byte	.LVL1309
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1311
-	.4byte	.LVL1334
+	.4byte	.LVL1313
+	.4byte	.LVL1336
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST324:
-	.4byte	.LVL1297
-	.4byte	.LVL1307
+.LLST326:
+	.4byte	.LVL1299
+	.4byte	.LVL1309
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1314
-	.4byte	.LVL1317
+	.4byte	.LVL1316
+	.4byte	.LVL1319
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1318
-	.4byte	.LVL1336
+	.4byte	.LVL1320
+	.4byte	.LVL1338
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1337
 	.4byte	.LVL1339
+	.4byte	.LVL1341
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1341
-	.4byte	.LVL1345
+	.4byte	.LVL1343
+	.4byte	.LVL1347
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1350
-	.4byte	.LVL1351
+	.4byte	.LVL1352
+	.4byte	.LVL1353
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1351
-	.4byte	.LVL1361
+	.4byte	.LVL1353
+	.4byte	.LVL1363
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1366
+	.4byte	.LVL1368
 	.4byte	.LFE284
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST325:
-	.4byte	.LVL1300
+.LLST327:
 	.4byte	.LVL1302
+	.4byte	.LVL1304
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1303
-	.4byte	.LVL1304
+	.4byte	.LVL1305
+	.4byte	.LVL1306
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1321
-	.4byte	.LVL1322
+	.4byte	.LVL1323
+	.4byte	.LVL1324
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1322
-	.4byte	.LVL1329
+	.4byte	.LVL1324
+	.4byte	.LVL1331
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1329
-	.4byte	.LVL1330
+	.4byte	.LVL1331
+	.4byte	.LVL1332
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST326:
-	.4byte	.LVL1344
-	.4byte	.LVL1345
+.LLST328:
+	.4byte	.LVL1346
+	.4byte	.LVL1347
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1352
-	.4byte	.LVL1353
+	.4byte	.LVL1354
+	.4byte	.LVL1355
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1354
-	.4byte	.LVL1361
+	.4byte	.LVL1356
+	.4byte	.LVL1363
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1371
-	.4byte	.LVL1377
+	.4byte	.LVL1373
+	.4byte	.LVL1379
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1377
-	.4byte	.LVL1378
+	.4byte	.LVL1379
+	.4byte	.LVL1380
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -46483,274 +46623,274 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1378
+	.4byte	.LVL1380
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST327:
-	.4byte	.LVL1383
-	.4byte	.LVL1392
+.LLST329:
+	.4byte	.LVL1385
+	.4byte	.LVL1394
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1395
-	.4byte	.LVL1417
+	.4byte	.LVL1397
+	.4byte	.LVL1419
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST328:
-	.4byte	.LVL1373
-	.4byte	.LVL1376
+.LLST330:
+	.4byte	.LVL1375
+	.4byte	.LVL1378
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1378
-	.4byte	.LVL1392
+	.4byte	.LVL1380
+	.4byte	.LVL1394
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1392
-	.4byte	.LVL1393
+	.4byte	.LVL1394
+	.4byte	.LVL1395
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1395
-	.4byte	.LVL1417
+	.4byte	.LVL1397
+	.4byte	.LVL1419
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1419
-	.4byte	.LVL1422
+	.4byte	.LVL1421
+	.4byte	.LVL1424
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST329:
-	.4byte	.LVL1373
-	.4byte	.LVL1376
+.LLST331:
+	.4byte	.LVL1375
+	.4byte	.LVL1378
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1378
-	.4byte	.LVL1390
+	.4byte	.LVL1380
+	.4byte	.LVL1392
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1395
-	.4byte	.LVL1409
+	.4byte	.LVL1397
+	.4byte	.LVL1411
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1409
 	.4byte	.LVL1411
+	.4byte	.LVL1413
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1419
-	.4byte	.LVL1422
+	.4byte	.LVL1421
+	.4byte	.LVL1424
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST330:
-	.4byte	.LVL1300
-	.4byte	.LVL1301
+.LLST332:
+	.4byte	.LVL1302
+	.4byte	.LVL1303
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1301
-	.4byte	.LVL1309
+	.4byte	.LVL1303
+	.4byte	.LVL1311
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1321
-	.4byte	.LVL1379
+	.4byte	.LVL1323
+	.4byte	.LVL1381
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1379
-	.4byte	.LVL1380
+	.4byte	.LVL1381
+	.4byte	.LVL1382
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1380
+	.4byte	.LVL1382
 	.4byte	.LFE284
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST331:
-	.4byte	.LVL1285
-	.4byte	.LVL1288
+.LLST333:
+	.4byte	.LVL1287
+	.4byte	.LVL1290
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1290
-	.4byte	.LVL1302
+	.4byte	.LVL1292
+	.4byte	.LVL1304
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1309
-	.4byte	.LVL1321
+	.4byte	.LVL1311
+	.4byte	.LVL1323
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1333
-	.4byte	.LVL1348
+	.4byte	.LVL1335
+	.4byte	.LVL1350
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1361
-	.4byte	.LVL1366
+	.4byte	.LVL1363
+	.4byte	.LVL1368
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST332:
-	.4byte	.LVL1323
-	.4byte	.LVL1324
+.LLST334:
+	.4byte	.LVL1325
+	.4byte	.LVL1326
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1324
 	.4byte	.LVL1326
+	.4byte	.LVL1328
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1362
-	.4byte	.LVL1363
+	.4byte	.LVL1364
+	.4byte	.LVL1365
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1363
-	.4byte	.LVL1364
+	.4byte	.LVL1365
+	.4byte	.LVL1366
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1364
-	.4byte	.LVL1365
+	.4byte	.LVL1366
+	.4byte	.LVL1367
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 -8
-	.4byte	.LVL1374
-	.4byte	.LVL1375
+	.4byte	.LVL1376
+	.4byte	.LVL1377
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1378
-	.4byte	.LVL1384
+	.4byte	.LVL1380
+	.4byte	.LVL1386
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1387
-	.4byte	.LVL1390
+	.4byte	.LVL1389
+	.4byte	.LVL1392
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1397
-	.4byte	.LVL1400
+	.4byte	.LVL1399
+	.4byte	.LVL1402
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1400
-	.4byte	.LVL1401-1
+	.4byte	.LVL1402
+	.4byte	.LVL1403-1
 	.2byte	0x2
 	.byte	0x73
 	.sleb128 12
-	.4byte	.LVL1401-1
-	.4byte	.LVL1407
+	.4byte	.LVL1403-1
+	.4byte	.LVL1409
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1412
-	.4byte	.LVL1417
+	.4byte	.LVL1414
+	.4byte	.LVL1419
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST333:
-	.4byte	.LVL1332
-	.4byte	.LVL1348
+.LLST335:
+	.4byte	.LVL1334
+	.4byte	.LVL1350
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1361
-	.4byte	.LVL1366
+	.4byte	.LVL1363
+	.4byte	.LVL1368
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST334:
-	.4byte	.LVL1332
-	.4byte	.LVL1336
+.LLST336:
+	.4byte	.LVL1334
+	.4byte	.LVL1338
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST335:
-	.4byte	.LVL1388
-	.4byte	.LVL1389
+.LLST337:
+	.4byte	.LVL1390
+	.4byte	.LVL1391
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
-	.4byte	.LVL1397
-	.4byte	.LVL1398-1
+	.4byte	.LVL1399
+	.4byte	.LVL1400-1
 	.2byte	0x2
 	.byte	0x77
 	.sleb128 4
 	.4byte	0
 	.4byte	0
-.LLST336:
-	.4byte	.LVL1402
-	.4byte	.LVL1405
+.LLST338:
+	.4byte	.LVL1404
+	.4byte	.LVL1407
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1405
-	.4byte	.LVL1406
+	.4byte	.LVL1407
+	.4byte	.LVL1408
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST337:
-	.4byte	.LVL1410
-	.4byte	.LVL1417
+.LLST339:
+	.4byte	.LVL1412
+	.4byte	.LVL1419
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST338:
-	.4byte	.LVL1413
-	.4byte	.LVL1414-1
+.LLST340:
+	.4byte	.LVL1415
+	.4byte	.LVL1416-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 4
-	.4byte	.LVL1414-1
-	.4byte	.LVL1415
+	.4byte	.LVL1416-1
+	.4byte	.LVL1417
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST231:
-	.4byte	.LVL889
-	.4byte	.LVL890
+.LLST233:
+	.4byte	.LVL891
+	.4byte	.LVL892
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL890
-	.4byte	.LVL906
+	.4byte	.LVL892
+	.4byte	.LVL908
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL906
+	.4byte	.LVL908
 	.4byte	.LFE283
 	.2byte	0x4
 	.byte	0xf3
@@ -46759,58 +46899,58 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST232:
-	.4byte	.LVL889
-	.4byte	.LVL891-1
+.LLST234:
+	.4byte	.LVL891
+	.4byte	.LVL893-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST233:
-	.4byte	.LVL892
-	.4byte	.LVL893
+.LLST235:
+	.4byte	.LVL894
+	.4byte	.LVL895
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST234:
-	.4byte	.LVL895
-	.4byte	.LVL897-1
+.LLST236:
+	.4byte	.LVL897
+	.4byte	.LVL899-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL901
 	.4byte	.LVL903
+	.4byte	.LVL905
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL903
-	.4byte	.LVL904
+	.4byte	.LVL905
+	.4byte	.LVL906
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST235:
-	.4byte	.LVL895
-	.4byte	.LVL900
+.LLST237:
+	.4byte	.LVL897
+	.4byte	.LVL902
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL901
-	.4byte	.LVL902
+	.4byte	.LVL903
+	.4byte	.LVL904
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST236:
-	.4byte	.LVL894
+.LLST238:
 	.4byte	.LVL896
+	.4byte	.LVL898
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL896
-	.4byte	.LVL897-1
+	.4byte	.LVL898
+	.4byte	.LVL899-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	g_num_free_superblocks
-	.4byte	.LVL901
-	.4byte	.LVL904
+	.4byte	.LVL903
+	.4byte	.LVL906
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
@@ -46877,177 +47017,177 @@ __func__.9940:
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST257:
-	.4byte	.LVL1035
-	.4byte	.LVL1036
+.LLST259:
+	.4byte	.LVL1037
+	.4byte	.LVL1038
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST249:
-	.4byte	.LVL992
-	.4byte	.LVL995
+.LLST251:
+	.4byte	.LVL994
+	.4byte	.LVL997
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL995
+	.4byte	.LVL997
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST250:
-	.4byte	.LVL1000
-	.4byte	.LVL1002-1
+.LLST252:
+	.4byte	.LVL1002
+	.4byte	.LVL1004-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1002-1
-	.4byte	.LVL1005
+	.4byte	.LVL1004-1
+	.4byte	.LVL1007
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1017
-	.4byte	.LVL1018
+	.4byte	.LVL1019
+	.4byte	.LVL1020
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1018
-	.4byte	.LVL1027
+	.4byte	.LVL1020
+	.4byte	.LVL1029
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1027
-	.4byte	.LVL1028
+	.4byte	.LVL1029
+	.4byte	.LVL1030
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1029
+	.4byte	.LVL1031
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST251:
-	.4byte	.LVL1004
-	.4byte	.LVL1005
+.LLST253:
+	.4byte	.LVL1006
+	.4byte	.LVL1007
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1006
-	.4byte	.LVL1007
+	.4byte	.LVL1008
+	.4byte	.LVL1009
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1012
-	.4byte	.LVL1013
+	.4byte	.LVL1014
+	.4byte	.LVL1015
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1013
 	.4byte	.LVL1015
+	.4byte	.LVL1017
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1015
-	.4byte	.LVL1016
+	.4byte	.LVL1017
+	.4byte	.LVL1018
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1020
-	.4byte	.LVL1021
+	.4byte	.LVL1022
+	.4byte	.LVL1023
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1021
-	.4byte	.LVL1022
+	.4byte	.LVL1023
+	.4byte	.LVL1024
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1024
-	.4byte	.LVL1025
+	.4byte	.LVL1026
+	.4byte	.LVL1027
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1026
-	.4byte	.LVL1030
+	.4byte	.LVL1028
+	.4byte	.LVL1032
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1030
-	.4byte	.LVL1031
+	.4byte	.LVL1032
+	.4byte	.LVL1033
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST252:
-	.4byte	.LVL1003
-	.4byte	.LVL1007
+.LLST254:
+	.4byte	.LVL1005
+	.4byte	.LVL1009
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1012
-	.4byte	.LVL1017
+	.4byte	.LVL1014
+	.4byte	.LVL1019
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST253:
-	.4byte	.LVL1030
+.LLST255:
 	.4byte	.LVL1032
+	.4byte	.LVL1034
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1032
+	.4byte	.LVL1034
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5e
 	.4byte	0
 	.4byte	0
-.LLST254:
-	.4byte	.LVL994
-	.4byte	.LVL1003
+.LLST256:
+	.4byte	.LVL996
+	.4byte	.LVL1005
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1017
+	.4byte	.LVL1019
 	.4byte	.LFE278
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST255:
-	.4byte	.LVL994
-	.4byte	.LVL995
+.LLST257:
+	.4byte	.LVL996
+	.4byte	.LVL997
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 16
-	.4byte	.LVL995
-	.4byte	.LVL997-1
+	.4byte	.LVL997
+	.4byte	.LVL999-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.4byte	.LVL997-1
+	.4byte	.LVL999-1
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
 	.4byte	0
 	.4byte	0
-.LLST256:
-	.4byte	.LVL996
-	.4byte	.LVL1001
+.LLST258:
+	.4byte	.LVL998
+	.4byte	.LVL1003
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
-	.4byte	.LVL1017
+	.4byte	.LVL1019
 	.4byte	.LFE278
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST446:
-	.4byte	.LVL1972
-	.4byte	.LVL1975
+.LLST448:
+	.4byte	.LVL1974
+	.4byte	.LVL1977
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1985
 	.4byte	.LVL1987
+	.4byte	.LVL1989
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1988
+	.4byte	.LVL1990
 	.4byte	.LFE277
 	.2byte	0x1
 	.byte	0x57
@@ -47067,243 +47207,243 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST243:
-	.4byte	.LVL941
-	.4byte	.LVL945
+.LLST245:
+	.4byte	.LVL943
+	.4byte	.LVL947
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL945
-	.4byte	.LVL946
+	.4byte	.LVL947
+	.4byte	.LVL948
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL946
-	.4byte	.LVL947
+	.4byte	.LVL948
+	.4byte	.LVL949
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL949
-	.4byte	.LVL950
+	.4byte	.LVL951
+	.4byte	.LVL952
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL950
-	.4byte	.LVL958
+	.4byte	.LVL952
+	.4byte	.LVL960
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL958
-	.4byte	.LVL959
+	.4byte	.LVL960
+	.4byte	.LVL961
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL960
-	.4byte	.LVL981
+	.4byte	.LVL962
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST244:
-	.4byte	.LVL943
-	.4byte	.LVL946
+.LLST246:
+	.4byte	.LVL945
+	.4byte	.LVL948
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -44
-	.4byte	.LVL951
-	.4byte	.LVL981
+	.4byte	.LVL953
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST245:
-	.4byte	.LVL941
-	.4byte	.LVL981
+.LLST247:
+	.4byte	.LVL943
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST246:
-	.4byte	.LVL964
-	.4byte	.LVL965
-	.2byte	0x1
-	.byte	0x51
+.LLST248:
 	.4byte	.LVL966
 	.4byte	.LVL967
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL973
-	.4byte	.LVL974
+	.4byte	.LVL968
+	.4byte	.LVL969
 	.2byte	0x1
 	.byte	0x51
 	.4byte	.LVL975
 	.4byte	.LVL976
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL984
-	.4byte	.LVL988
+	.4byte	.LVL977
+	.4byte	.LVL978
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL989
+	.4byte	.LVL986
 	.4byte	.LVL990
 	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL991
+	.4byte	.LVL992
+	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL990
+	.4byte	.LVL992
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST247:
-	.4byte	.LVL952
+.LLST249:
 	.4byte	.LVL954
+	.4byte	.LVL956
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL955
-	.4byte	.LVL956
+	.4byte	.LVL957
+	.4byte	.LVL958
 	.2byte	0x5
 	.byte	0x40
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL956
-	.4byte	.LVL957
+	.4byte	.LVL958
+	.4byte	.LVL959
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL963
-	.4byte	.LVL968
-	.2byte	0x1
-	.byte	0x53
-	.4byte	.LVL969
+	.4byte	.LVL965
 	.4byte	.LVL970
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL971
 	.4byte	.LVL972
-	.4byte	.LVL977
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL978
+	.4byte	.LVL974
 	.4byte	.LVL979
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL985
-	.4byte	.LVL986
+	.4byte	.LVL980
+	.4byte	.LVL981
 	.2byte	0x1
 	.byte	0x53
 	.4byte	.LVL987
 	.4byte	.LVL988
 	.2byte	0x1
 	.byte	0x53
+	.4byte	.LVL989
 	.4byte	.LVL990
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL992
 	.4byte	.LFE273
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST248:
-	.4byte	.LVL951
-	.4byte	.LVL981
+.LLST250:
+	.4byte	.LVL953
+	.4byte	.LVL983
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST368:
-	.4byte	.LVL1557
-	.4byte	.LVL1564
+.LLST370:
+	.4byte	.LVL1559
+	.4byte	.LVL1566
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.4byte	.LVL1566
 	.4byte	.LVL1568
+	.4byte	.LVL1570
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST369:
-	.4byte	.LVL1558
-	.4byte	.LVL1574
+.LLST371:
+	.4byte	.LVL1560
+	.4byte	.LVL1576
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST370:
-	.4byte	.LVL1557
-	.4byte	.LVL1564
+.LLST372:
+	.4byte	.LVL1559
+	.4byte	.LVL1566
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1564
-	.4byte	.LVL1570
+	.4byte	.LVL1566
+	.4byte	.LVL1572
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1571
-	.4byte	.LVL1574
+	.4byte	.LVL1573
+	.4byte	.LVL1576
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST239:
-	.4byte	.LVL925
+.LLST241:
 	.4byte	.LVL927
+	.4byte	.LVL929
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL927
-	.4byte	.LVL930
+	.4byte	.LVL929
+	.4byte	.LVL932
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL930
-	.4byte	.LVL931-1
+	.4byte	.LVL932
+	.4byte	.LVL933-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL931-1
-	.4byte	.LVL931
+	.4byte	.LVL933-1
+	.4byte	.LVL933
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL931
-	.4byte	.LVL934
+	.4byte	.LVL933
+	.4byte	.LVL936
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL934
+	.4byte	.LVL936
 	.4byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST240:
-	.4byte	.LVL926
+.LLST242:
 	.4byte	.LVL928
+	.4byte	.LVL930
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL928
-	.4byte	.LVL929-1
+	.4byte	.LVL930
+	.4byte	.LVL931-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
-	.4byte	.LVL931
-	.4byte	.LVL932
+	.4byte	.LVL933
+	.4byte	.LVL934
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL932
-	.4byte	.LVL933-1
+	.4byte	.LVL934
+	.4byte	.LVL935-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+4
 	.4byte	0
 	.4byte	0
-.LLST241:
-	.4byte	.LVL925
+.LLST243:
 	.4byte	.LVL927
+	.4byte	.LVL929
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -47312,8 +47452,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL927
-	.4byte	.LVL929-1
+	.4byte	.LVL929
+	.4byte	.LVL931-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47322,8 +47462,8 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL931
-	.4byte	.LVL933-1
+	.4byte	.LVL933
+	.4byte	.LVL935-1
 	.2byte	0x7
 	.byte	0x76
 	.sleb128 6
@@ -47332,7 +47472,7 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL934
+	.4byte	.LVL936
 	.4byte	.LFE270
 	.2byte	0x7
 	.byte	0x70
@@ -47344,35 +47484,35 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST242:
-	.4byte	.LVL925
+.LLST244:
 	.4byte	.LVL927
+	.4byte	.LVL929
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL927
-	.4byte	.LVL929-1
+	.4byte	.LVL929
+	.4byte	.LVL931-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL931
-	.4byte	.LVL933-1
+	.4byte	.LVL933
+	.4byte	.LVL935-1
 	.2byte	0x2
 	.byte	0x76
 	.sleb128 24
-	.4byte	.LVL934
+	.4byte	.LVL936
 	.4byte	.LFE270
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
 	.4byte	0
 	.4byte	0
-.LLST358:
-	.4byte	.LVL1526
-	.4byte	.LVL1529
+.LLST360:
+	.4byte	.LVL1528
+	.4byte	.LVL1531
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1529
+	.4byte	.LVL1531
 	.4byte	.LFE268
 	.2byte	0x4
 	.byte	0xf3
@@ -47381,125 +47521,125 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST359:
-	.4byte	.LVL1526
-	.4byte	.LVL1527
+.LLST361:
+	.4byte	.LVL1528
+	.4byte	.LVL1529
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.4byte	.LVL1527
-	.4byte	.LVL1528
+	.4byte	.LVL1529
+	.4byte	.LVL1530
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL1528
 	.4byte	.LVL1530
+	.4byte	.LVL1532
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST360:
-	.4byte	.LVL1533
+.LLST362:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1535
-	.4byte	.LVL1550
+	.4byte	.LVL1537
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST361:
-	.4byte	.LVL1533
+.LLST363:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1535
-	.4byte	.LVL1550
+	.4byte	.LVL1537
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST362:
-	.4byte	.LVL1533
-	.4byte	.LVL1534
+.LLST364:
+	.4byte	.LVL1535
+	.4byte	.LVL1536
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1534
+	.4byte	.LVL1536
 	.4byte	.LFE267
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST363:
-	.4byte	.LVL1540
-	.4byte	.LVL1550
+.LLST365:
+	.4byte	.LVL1542
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST364:
-	.4byte	.LVL1540
-	.4byte	.LVL1550
+.LLST366:
+	.4byte	.LVL1542
+	.4byte	.LVL1552
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -128
 	.4byte	0
 	.4byte	0
-.LLST365:
-	.4byte	.LVL1538
-	.4byte	.LVL1539-1
+.LLST367:
+	.4byte	.LVL1540
+	.4byte	.LVL1541-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1539-1
-	.4byte	.LVL1548
+	.4byte	.LVL1541-1
+	.4byte	.LVL1550
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1548
-	.4byte	.LVL1549-1
+	.4byte	.LVL1550
+	.4byte	.LVL1551-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1549-1
-	.4byte	.LVL1550
+	.4byte	.LVL1551-1
+	.4byte	.LVL1552
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST366:
-	.4byte	.LVL1533
+.LLST368:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1535
-	.4byte	.LVL1536
+	.4byte	.LVL1537
+	.4byte	.LVL1538
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1537
-	.4byte	.LVL1550
+	.4byte	.LVL1539
+	.4byte	.LVL1552
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST367:
-	.4byte	.LVL1533
+.LLST369:
 	.4byte	.LVL1535
+	.4byte	.LVL1537
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47512,7 +47652,7 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1550
+	.4byte	.LVL1552
 	.4byte	.LFE267
 	.2byte	0xf
 	.byte	0x70
@@ -47528,135 +47668,135 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST350:
-	.4byte	.LVL1502
+.LLST352:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1504
-	.4byte	.LVL1515
+	.4byte	.LVL1506
+	.4byte	.LVL1517
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1519
-	.4byte	.LVL1524
+	.4byte	.LVL1521
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST351:
-	.4byte	.LVL1502
+.LLST353:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1504
-	.4byte	.LVL1514
+	.4byte	.LVL1506
+	.4byte	.LVL1516
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1519
-	.4byte	.LVL1524
+	.4byte	.LVL1521
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST352:
-	.4byte	.LVL1502
-	.4byte	.LVL1503
+.LLST354:
+	.4byte	.LVL1504
+	.4byte	.LVL1505
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1503
-	.4byte	.LVL1506
+	.4byte	.LVL1505
+	.4byte	.LVL1508
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1506
-	.4byte	.LVL1507
+	.4byte	.LVL1508
+	.4byte	.LVL1509
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -136
-	.4byte	.LVL1507
-	.4byte	.LVL1520
+	.4byte	.LVL1509
+	.4byte	.LVL1522
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1520
-	.4byte	.LVL1521
+	.4byte	.LVL1522
+	.4byte	.LVL1523
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1521
+	.4byte	.LVL1523
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST353:
-	.4byte	.LVL1511
-	.4byte	.LVL1524
+.LLST355:
+	.4byte	.LVL1513
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST354:
-	.4byte	.LVL1510
-	.4byte	.LVL1524
+.LLST356:
+	.4byte	.LVL1512
+	.4byte	.LVL1526
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -132
 	.4byte	0
 	.4byte	0
-.LLST355:
-	.4byte	.LVL1508
-	.4byte	.LVL1509-1
+.LLST357:
+	.4byte	.LVL1510
+	.4byte	.LVL1511-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1509-1
-	.4byte	.LVL1521
+	.4byte	.LVL1511-1
+	.4byte	.LVL1523
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
-	.4byte	.LVL1521
-	.4byte	.LVL1522
+	.4byte	.LVL1523
+	.4byte	.LVL1524
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1522
 	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -124
 	.4byte	0
 	.4byte	0
-.LLST356:
-	.4byte	.LVL1502
+.LLST358:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1504
-	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.4byte	.LVL1507
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1507
-	.4byte	.LVL1524
+	.4byte	.LVL1509
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST357:
-	.4byte	.LVL1502
+.LLST359:
 	.4byte	.LVL1504
+	.4byte	.LVL1506
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -47669,29 +47809,29 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.4byte	.LVL1504
-	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.4byte	.LVL1507
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1507
-	.4byte	.LVL1517
+	.4byte	.LVL1509
+	.4byte	.LVL1519
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1517
-	.4byte	.LVL1518-1
+	.4byte	.LVL1519
+	.4byte	.LVL1520-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1518-1
-	.4byte	.LVL1519
+	.4byte	.LVL1520-1
+	.4byte	.LVL1521
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1519
-	.4byte	.LVL1524
+	.4byte	.LVL1521
+	.4byte	.LVL1526
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1524
+	.4byte	.LVL1526
 	.4byte	.LFE266
 	.2byte	0xf
 	.byte	0x70
@@ -47707,12 +47847,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST227:
-	.4byte	.LVL872
-	.4byte	.LVL877
+.LLST229:
+	.4byte	.LVL874
+	.4byte	.LVL879
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL877
+	.4byte	.LVL879
 	.4byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -47721,71 +47861,71 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST228:
-	.4byte	.LVL872
-	.4byte	.LVL876
+.LLST230:
+	.4byte	.LVL874
+	.4byte	.LVL878
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL876
+	.4byte	.LVL878
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST229:
-	.4byte	.LVL872
-	.4byte	.LVL875
+.LLST231:
+	.4byte	.LVL874
+	.4byte	.LVL877
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL875
+	.4byte	.LVL877
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST230:
-	.4byte	.LVL878
-	.4byte	.LVL879
+.LLST232:
+	.4byte	.LVL880
+	.4byte	.LVL881
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL880
 	.4byte	.LVL882
+	.4byte	.LVL884
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL882
-	.4byte	.LVL883-1
+	.4byte	.LVL884
+	.4byte	.LVL885-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL885
 	.4byte	.LVL887
+	.4byte	.LVL889
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL888
+	.4byte	.LVL890
 	.4byte	.LFE265
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST312:
-	.4byte	.LVL1280
-	.4byte	.LVL1281
+.LLST314:
+	.4byte	.LVL1282
+	.4byte	.LVL1283
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1281
-	.4byte	.LVL1282
+	.4byte	.LVL1283
+	.4byte	.LVL1284
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1282
-	.4byte	.LVL1283-1
+	.4byte	.LVL1284
+	.4byte	.LVL1285-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1283-1
-	.4byte	.LVL1283
+	.4byte	.LVL1285-1
+	.4byte	.LVL1285
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1283
-	.4byte	.LVL1284
+	.4byte	.LVL1285
+	.4byte	.LVL1286
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
@@ -47890,12 +48030,12 @@ __func__.9940:
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST225:
-	.4byte	.LVL867
-	.4byte	.LVL868
+.LLST227:
+	.4byte	.LVL869
+	.4byte	.LVL870
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL868
+	.4byte	.LVL870
 	.4byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -47904,9 +48044,9 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST226:
-	.4byte	.LVL869
-	.4byte	.LVL870
+.LLST228:
+	.4byte	.LVL871
+	.4byte	.LVL872
 	.2byte	0x9
 	.byte	0x72
 	.sleb128 0
@@ -47916,22 +48056,22 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL870
-	.4byte	.LVL871-1
+	.4byte	.LVL872
+	.4byte	.LVL873-1
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST212:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST214:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL832
-	.4byte	.LVL844
+	.4byte	.LVL834
+	.4byte	.LVL846
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL844
+	.4byte	.LVL846
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -47940,16 +48080,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST213:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST215:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL832
-	.4byte	.LVL844
+	.4byte	.LVL834
+	.4byte	.LVL846
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL844
+	.4byte	.LVL846
 	.4byte	.LFE261
 	.2byte	0x4
 	.byte	0xf3
@@ -47958,26 +48098,26 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST214:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST216:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL832
-	.4byte	.LVL844
+	.4byte	.LVL834
+	.4byte	.LVL846
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL844
+	.4byte	.LVL846
 	.4byte	.LFE261
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 -36
 	.4byte	0
 	.4byte	0
-.LLST215:
-	.4byte	.LVL836
-	.4byte	.LVL844
+.LLST217:
+	.4byte	.LVL838
+	.4byte	.LVL846
 	.2byte	0x7
 	.byte	0x7a
 	.sleb128 0
@@ -47987,340 +48127,340 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST216:
-	.4byte	.LVL838
-	.4byte	.LVL839
+.LLST218:
+	.4byte	.LVL840
+	.4byte	.LVL841
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL839
-	.4byte	.LVL840-1
+	.4byte	.LVL841
+	.4byte	.LVL842-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	req_sys+12
 	.4byte	0
 	.4byte	0
-.LLST217:
-	.4byte	.LVL831
-	.4byte	.LVL832
+.LLST219:
+	.4byte	.LVL833
+	.4byte	.LVL834
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL832
-	.4byte	.LVL841
+	.4byte	.LVL834
+	.4byte	.LVL843
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL842
 	.4byte	.LVL844
+	.4byte	.LVL846
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST206:
-	.4byte	.LVL808
+.LLST208:
 	.4byte	.LVL810
+	.4byte	.LVL812
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL810
-	.4byte	.LVL814
+	.4byte	.LVL812
+	.4byte	.LVL816
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL814
 	.4byte	.LVL816
+	.4byte	.LVL818
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL816
+	.4byte	.LVL818
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST207:
-	.4byte	.LVL819
-	.4byte	.LVL820
+.LLST209:
+	.4byte	.LVL821
+	.4byte	.LVL822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL820
 	.4byte	.LVL822
+	.4byte	.LVL824
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL822
-	.4byte	.LVL823
+	.4byte	.LVL824
+	.4byte	.LVL825
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL826
-	.4byte	.LVL829
+	.4byte	.LVL828
+	.4byte	.LVL831
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL829
-	.4byte	.LVL830
+	.4byte	.LVL831
+	.4byte	.LVL832
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST208:
-	.4byte	.LVL819
-	.4byte	.LVL820
+.LLST210:
+	.4byte	.LVL821
+	.4byte	.LVL822
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL820
-	.4byte	.LVL821
+	.4byte	.LVL822
+	.4byte	.LVL823
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL826
-	.4byte	.LVL827
+	.4byte	.LVL828
+	.4byte	.LVL829
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL828
+	.4byte	.LVL830
 	.4byte	.LFE260
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST209:
-	.4byte	.LVL809
-	.4byte	.LVL813
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL814
+.LLST211:
+	.4byte	.LVL811
 	.4byte	.LVL815
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL815
 	.4byte	.LVL816
+	.4byte	.LVL817
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL817
+	.4byte	.LVL818
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 12
-	.4byte	.LVL816
-	.4byte	.LVL819-1
+	.4byte	.LVL818
+	.4byte	.LVL821-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 12
 	.4byte	0
 	.4byte	0
-.LLST210:
-	.4byte	.LVL809
-	.4byte	.LVL810
+.LLST212:
+	.4byte	.LVL811
+	.4byte	.LVL812
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL810
-	.4byte	.LVL811-1
+	.4byte	.LVL812
+	.4byte	.LVL813-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
-	.4byte	.LVL814
 	.4byte	.LVL816
+	.4byte	.LVL818
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 24
-	.4byte	.LVL816
-	.4byte	.LVL819-1
+	.4byte	.LVL818
+	.4byte	.LVL821-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 24
 	.4byte	0
 	.4byte	0
-.LLST211:
-	.4byte	.LVL817
-	.4byte	.LVL818
+.LLST213:
+	.4byte	.LVL819
+	.4byte	.LVL820
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL818
-	.4byte	.LVL819-1
+	.4byte	.LVL820
+	.4byte	.LVL821-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	p_sys_spare_buf
 	.4byte	0
 	.4byte	0
-.LLST218:
-	.4byte	.LVL845
-	.4byte	.LVL848-1
+.LLST220:
+	.4byte	.LVL847
+	.4byte	.LVL850-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL848-1
+	.4byte	.LVL850-1
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST219:
-	.4byte	.LVL849
-	.4byte	.LVL855
+.LLST221:
+	.4byte	.LVL851
+	.4byte	.LVL857
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL858
+	.4byte	.LVL860
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST220:
-	.4byte	.LVL848
+.LLST222:
 	.4byte	.LVL850
+	.4byte	.LVL852
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST221:
-	.4byte	.LVL853
+.LLST223:
 	.4byte	.LVL855
+	.4byte	.LVL857
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL858
-	.4byte	.LVL863
+	.4byte	.LVL860
+	.4byte	.LVL865
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL863
-	.4byte	.LVL864
+	.4byte	.LVL865
+	.4byte	.LVL866
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL864
-	.4byte	.LVL865
+	.4byte	.LVL866
+	.4byte	.LVL867
 	.2byte	0x3
 	.byte	0x78
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL865
+	.4byte	.LVL867
 	.4byte	.LFE259
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST222:
-	.4byte	.LVL846
-	.4byte	.LVL852
+.LLST224:
+	.4byte	.LVL848
+	.4byte	.LVL854
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST223:
-	.4byte	.LVL847
-	.4byte	.LVL848-1
+.LLST225:
+	.4byte	.LVL849
+	.4byte	.LVL850-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL848-1
-	.4byte	.LVL857
+	.4byte	.LVL850-1
+	.4byte	.LVL859
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL857
-	.4byte	.LVL858
+	.4byte	.LVL859
+	.4byte	.LVL860
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -40
-	.4byte	.LVL858
+	.4byte	.LVL860
 	.4byte	.LFE259
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST224:
-	.4byte	.LVL859
-	.4byte	.LVL860
+.LLST226:
+	.4byte	.LVL861
+	.4byte	.LVL862
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
 	.4byte	0
 	.4byte	0
-.LLST199:
-	.4byte	.LVL784
-	.4byte	.LVL787
+.LLST201:
+	.4byte	.LVL786
+	.4byte	.LVL789
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL787
+	.4byte	.LVL789
 	.4byte	.LFE257
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST200:
-	.4byte	.LVL786
-	.4byte	.LVL791
+.LLST202:
+	.4byte	.LVL788
+	.4byte	.LVL793
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL795
-	.4byte	.LVL802
+	.4byte	.LVL797
+	.4byte	.LVL804
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST201:
-	.4byte	.LVL796
-	.4byte	.LVL802
+.LLST203:
+	.4byte	.LVL798
+	.4byte	.LVL804
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST202:
-	.4byte	.LVL788
-	.4byte	.LVL789
+.LLST204:
+	.4byte	.LVL790
+	.4byte	.LVL791
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL789
-	.4byte	.LVL790
+	.4byte	.LVL791
+	.4byte	.LVL792
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL790
 	.4byte	.LVL792
+	.4byte	.LVL794
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL795
 	.4byte	.LVL797
+	.4byte	.LVL799
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL797
-	.4byte	.LVL798
+	.4byte	.LVL799
+	.4byte	.LVL800
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL799
-	.4byte	.LVL802
+	.4byte	.LVL801
+	.4byte	.LVL804
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST203:
-	.4byte	.LVL790
-	.4byte	.LVL793
+.LLST205:
+	.4byte	.LVL792
+	.4byte	.LVL795
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL794
-	.4byte	.LVL795
+	.4byte	.LVL796
+	.4byte	.LVL797
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL796
-	.4byte	.LVL800
+	.4byte	.LVL798
+	.4byte	.LVL802
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL800
-	.4byte	.LVL801
+	.4byte	.LVL802
+	.4byte	.LVL803
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL802
 	.4byte	.LVL804
+	.4byte	.LVL806
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL804
 	.4byte	.LVL806
+	.4byte	.LVL808
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL806
-	.4byte	.LVL807
+	.4byte	.LVL808
+	.4byte	.LVL809
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL807
+	.4byte	.LVL809
 	.4byte	.LFE257
 	.2byte	0x3
 	.byte	0x77
@@ -48328,40 +48468,40 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST204:
-	.4byte	.LVL790
-	.4byte	.LVL793
+.LLST206:
+	.4byte	.LVL792
+	.4byte	.LVL795
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL794
-	.4byte	.LVL795
+	.4byte	.LVL796
+	.4byte	.LVL797
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL802
-	.4byte	.LVL805-1
+	.4byte	.LVL804
+	.4byte	.LVL807-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL805-1
-	.4byte	.LVL806
+	.4byte	.LVL807-1
+	.4byte	.LVL808
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST205:
-	.4byte	.LVL790
-	.4byte	.LVL793
+.LLST207:
+	.4byte	.LVL792
+	.4byte	.LVL795
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST197:
-	.4byte	.LVL771
+.LLST199:
 	.4byte	.LVL773
+	.4byte	.LVL775
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL773
+	.4byte	.LVL775
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -48370,12 +48510,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST198:
-	.4byte	.LVL771
-	.4byte	.LVL772
+.LLST200:
+	.4byte	.LVL773
+	.4byte	.LVL774
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL772
+	.4byte	.LVL774
 	.4byte	.LFE256
 	.2byte	0x4
 	.byte	0xf3
@@ -49089,12 +49229,12 @@ __func__.9940:
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST175:
-	.4byte	.LVL633
-	.4byte	.LVL635-1
+.LLST177:
+	.4byte	.LVL635
+	.4byte	.LVL637-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL635-1
+	.4byte	.LVL637-1
 	.4byte	.LFE243
 	.2byte	0x4
 	.byte	0xf3
@@ -49103,12 +49243,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST176:
-	.4byte	.LVL633
-	.4byte	.LVL635-1
+.LLST178:
+	.4byte	.LVL635
+	.4byte	.LVL637-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL635-1
+	.4byte	.LVL637-1
 	.4byte	.LFE243
 	.2byte	0x4
 	.byte	0xf3
@@ -49117,33 +49257,33 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST177:
-	.4byte	.LVL634
-	.4byte	.LVL639
+.LLST179:
+	.4byte	.LVL636
+	.4byte	.LVL641
 	.2byte	0x6
 	.byte	0x3
 	.4byte	gSysFreeQueue
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST178:
-	.4byte	.LVL636
+.LLST180:
 	.4byte	.LVL638
+	.4byte	.LVL640
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST196:
-	.4byte	.LVL768
-	.4byte	.LVL769
+.LLST198:
+	.4byte	.LVL770
+	.4byte	.LVL771
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL769
-	.4byte	.LVL770-1
+	.4byte	.LVL771
+	.4byte	.LVL772-1
 	.2byte	0x5
 	.byte	0x3
 	.4byte	gSysFreeQueue
-	.4byte	.LVL770-1
+	.4byte	.LVL772-1
 	.4byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49152,12 +49292,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST157:
-	.4byte	.LVL584
-	.4byte	.LVL585
+.LLST159:
+	.4byte	.LVL586
+	.4byte	.LVL587
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL585
+	.4byte	.LVL587
 	.4byte	.LFE239
 	.2byte	0x4
 	.byte	0xf3
@@ -49166,53 +49306,53 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST158:
-	.4byte	.LVL584
+.LLST160:
 	.4byte	.LVL586
+	.4byte	.LVL588
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL586
-	.4byte	.LVL591-1
+	.4byte	.LVL588
+	.4byte	.LVL593-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL591-1
+	.4byte	.LVL593-1
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST159:
-	.4byte	.LVL590
+.LLST161:
 	.4byte	.LVL592
+	.4byte	.LVL594
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL592
-	.4byte	.LVL593
+	.4byte	.LVL594
+	.4byte	.LVL595
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL594
+	.4byte	.LVL596
 	.4byte	.LFE239
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST160:
-	.4byte	.LVL595
+.LLST162:
 	.4byte	.LVL597
+	.4byte	.LVL599
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL597
 	.4byte	.LVL599
+	.4byte	.LVL601
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL599
-	.4byte	.LVL600
+	.4byte	.LVL601
+	.4byte	.LVL602
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL600
+	.4byte	.LVL602
 	.4byte	.LFE239
 	.2byte	0x3
 	.byte	0x74
@@ -49220,13 +49360,13 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST161:
-	.4byte	.LVL587
-	.4byte	.LVL588
+.LLST163:
+	.4byte	.LVL589
+	.4byte	.LVL590
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL588
-	.4byte	.LVL589
+	.4byte	.LVL590
+	.4byte	.LVL591
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
@@ -49415,98 +49555,98 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST346:
-	.4byte	.LVL1461
+.LLST348:
 	.4byte	.LVL1463
+	.4byte	.LVL1465
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1470
-	.4byte	.LVL1475
+	.4byte	.LVL1472
+	.4byte	.LVL1477
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1475
-	.4byte	.LVL1476
+	.4byte	.LVL1477
+	.4byte	.LVL1478
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1476
-	.4byte	.LVL1494
+	.4byte	.LVL1478
+	.4byte	.LVL1496
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST347:
-	.4byte	.LVL1462
+.LLST349:
 	.4byte	.LVL1464
+	.4byte	.LVL1466
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1464
-	.4byte	.LVL1468
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1469
+	.4byte	.LVL1466
 	.4byte	.LVL1470
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1480
-	.4byte	.LVL1490
+	.4byte	.LVL1471
+	.4byte	.LVL1472
 	.2byte	0x1
-	.byte	0x54
-	.4byte	.LVL1491
+	.byte	0x55
+	.4byte	.LVL1482
 	.4byte	.LVL1492
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1492
-	.4byte	.LVL1493-1
-	.2byte	0x1
-	.byte	0x50
 	.4byte	.LVL1493
 	.4byte	.LVL1494
 	.2byte	0x1
 	.byte	0x54
 	.4byte	.LVL1494
+	.4byte	.LVL1495-1
+	.2byte	0x1
+	.byte	0x50
 	.4byte	.LVL1495
+	.4byte	.LVL1496
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1496
+	.4byte	.LVL1497
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1500
-	.4byte	.LVL1501-1
+	.4byte	.LVL1502
+	.4byte	.LVL1503-1
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST348:
-	.4byte	.LVL1472
-	.4byte	.LVL1477
+.LLST350:
+	.4byte	.LVL1474
+	.4byte	.LVL1479
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1484
-	.4byte	.LVL1489
+	.4byte	.LVL1486
+	.4byte	.LVL1491
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST349:
-	.4byte	.LVL1471
-	.4byte	.LVL1492
+.LLST351:
+	.4byte	.LVL1473
+	.4byte	.LVL1494
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST155:
-	.4byte	.LVL576
-	.4byte	.LVL582
+.LLST157:
+	.4byte	.LVL578
+	.4byte	.LVL584
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL583
+	.4byte	.LVL585
 	.4byte	.LFE233
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST156:
-	.4byte	.LVL577
-	.4byte	.LVL578
+.LLST158:
+	.4byte	.LVL579
+	.4byte	.LVL580
 	.2byte	0x13
 	.byte	0x73
 	.sleb128 0
@@ -49525,8 +49665,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL578
-	.4byte	.LVL579
+	.4byte	.LVL580
+	.4byte	.LVL581
 	.2byte	0x13
 	.byte	0x72
 	.sleb128 15
@@ -49545,8 +49685,8 @@ __func__.9940:
 	.byte	0x3a
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL579
-	.4byte	.LVL580-1
+	.4byte	.LVL581
+	.4byte	.LVL582-1
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -49569,68 +49709,68 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST342:
-	.4byte	.LVL1447
-	.4byte	.LVL1448
+.LLST344:
+	.4byte	.LVL1449
+	.4byte	.LVL1450
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1455
-	.4byte	.LVL1456
+	.4byte	.LVL1457
+	.4byte	.LVL1458
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1456
-	.4byte	.LVL1457
+	.4byte	.LVL1458
+	.4byte	.LVL1459
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1457
-	.4byte	.LVL1458
+	.4byte	.LVL1459
+	.4byte	.LVL1460
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST343:
-	.4byte	.LVL1436
-	.4byte	.LVL1439
-	.2byte	0x1
-	.byte	0x55
-	.4byte	.LVL1448
-	.4byte	.LVL1449
+.LLST345:
+	.4byte	.LVL1438
+	.4byte	.LVL1441
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL1450
 	.4byte	.LVL1451
 	.2byte	0x1
 	.byte	0x55
+	.4byte	.LVL1452
+	.4byte	.LVL1453
+	.2byte	0x1
+	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST344:
-	.4byte	.LVL1442
-	.4byte	.LVL1446
+.LLST346:
+	.4byte	.LVL1444
+	.4byte	.LVL1448
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1451
 	.4byte	.LVL1453
+	.4byte	.LVL1455
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1454
-	.4byte	.LVL1455
+	.4byte	.LVL1456
+	.4byte	.LVL1457
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST345:
-	.4byte	.LVL1434
-	.4byte	.LVL1445
+.LLST347:
+	.4byte	.LVL1436
+	.4byte	.LVL1447
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1448
-	.4byte	.LVL1455
+	.4byte	.LVL1450
+	.4byte	.LVL1457
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1458
-	.4byte	.LVL1459
+	.4byte	.LVL1460
+	.4byte	.LVL1461
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
@@ -49681,51 +49821,51 @@ __func__.9940:
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST288:
-	.4byte	.LVL1162
+.LLST290:
 	.4byte	.LVL1164
+	.4byte	.LVL1166
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1174
-	.4byte	.LVL1175
+	.4byte	.LVL1176
+	.4byte	.LVL1177
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1175
-	.4byte	.LVL1176
+	.4byte	.LVL1177
+	.4byte	.LVL1178
 	.2byte	0x3
 	.byte	0x74
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1176
-	.4byte	.LVL1177
+	.4byte	.LVL1178
+	.4byte	.LVL1179
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST289:
-	.4byte	.LVL1161
-	.4byte	.LVL1166
+.LLST291:
+	.4byte	.LVL1163
+	.4byte	.LVL1168
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1166
-	.4byte	.LVL1174
+	.4byte	.LVL1168
+	.4byte	.LVL1176
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -36
-	.4byte	.LVL1174
-	.4byte	.LVL1177
+	.4byte	.LVL1176
+	.4byte	.LVL1179
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1177
-	.4byte	.LVL1178
+	.4byte	.LVL1179
+	.4byte	.LVL1180
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1178
-	.4byte	.LVL1179
+	.4byte	.LVL1180
+	.4byte	.LVL1181
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49733,8 +49873,8 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1180
-	.4byte	.LVL1181
+	.4byte	.LVL1182
+	.4byte	.LVL1183
 	.2byte	0x6
 	.byte	0x91
 	.sleb128 -36
@@ -49742,7 +49882,7 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1181
+	.4byte	.LVL1183
 	.4byte	.LFE229
 	.2byte	0x3
 	.byte	0x73
@@ -49750,54 +49890,54 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST290:
-	.4byte	.LVL1163
-	.4byte	.LVL1174
+.LLST292:
+	.4byte	.LVL1165
+	.4byte	.LVL1176
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1177
-	.4byte	.LVL1181
+	.4byte	.LVL1179
+	.4byte	.LVL1183
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST291:
-	.4byte	.LVL1161
-	.4byte	.LVL1166
+.LLST293:
+	.4byte	.LVL1163
+	.4byte	.LVL1168
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1166
-	.4byte	.LVL1171
+	.4byte	.LVL1168
+	.4byte	.LVL1173
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1172
 	.4byte	.LVL1174
+	.4byte	.LVL1176
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1174
-	.4byte	.LVL1177
+	.4byte	.LVL1176
+	.4byte	.LVL1179
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1177
-	.4byte	.LVL1181
+	.4byte	.LVL1179
+	.4byte	.LVL1183
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST194:
-	.4byte	.LVL761
+.LLST196:
 	.4byte	.LVL763
+	.4byte	.LVL765
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL763
-	.4byte	.LVL766
+	.4byte	.LVL765
+	.4byte	.LVL768
 	.2byte	0x4
 	.byte	0x75
 	.sleb128 -1022
 	.byte	0x9f
-	.4byte	.LVL766
+	.4byte	.LVL768
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -49806,16 +49946,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST195:
-	.4byte	.LVL761
-	.4byte	.LVL762
+.LLST197:
+	.4byte	.LVL763
+	.4byte	.LVL764
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL762
-	.4byte	.LVL766
+	.4byte	.LVL764
+	.4byte	.LVL768
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL766
+	.4byte	.LVL768
 	.4byte	.LFE228
 	.2byte	0x4
 	.byte	0xf3
@@ -49982,18 +50122,18 @@ __func__.9940:
 	.4byte	.LVL45-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	0
-	.4byte	0
-.LLST443:
-	.4byte	.LVL1965
-	.4byte	.LVL1968
+	.4byte	0
+	.4byte	0
+.LLST445:
+	.4byte	.LVL1967
+	.4byte	.LVL1970
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1968
-	.4byte	.LVL1969-1
+	.4byte	.LVL1970
+	.4byte	.LVL1971-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1969-1
+	.4byte	.LVL1971-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50002,16 +50142,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST444:
-	.4byte	.LVL1965
+.LLST446:
 	.4byte	.LVL1967
+	.4byte	.LVL1969
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1967
-	.4byte	.LVL1969-1
+	.4byte	.LVL1969
+	.4byte	.LVL1971-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1969-1
+	.4byte	.LVL1971-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50020,16 +50160,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST445:
-	.4byte	.LVL1965
-	.4byte	.LVL1966
+.LLST447:
+	.4byte	.LVL1967
+	.4byte	.LVL1968
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1966
-	.4byte	.LVL1969-1
+	.4byte	.LVL1968
+	.4byte	.LVL1971-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1969-1
+	.4byte	.LVL1971-1
 	.4byte	.LFE223
 	.2byte	0x4
 	.byte	0xf3
@@ -50038,16 +50178,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST425:
-	.4byte	.LVL1864
-	.4byte	.LVL1867
+.LLST427:
+	.4byte	.LVL1866
+	.4byte	.LVL1869
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1867
-	.4byte	.LVL1868-1
+	.4byte	.LVL1869
+	.4byte	.LVL1870-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1868-1
+	.4byte	.LVL1870-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50056,16 +50196,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST426:
-	.4byte	.LVL1864
+.LLST428:
 	.4byte	.LVL1866
+	.4byte	.LVL1868
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1866
-	.4byte	.LVL1868-1
+	.4byte	.LVL1868
+	.4byte	.LVL1870-1
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1868-1
+	.4byte	.LVL1870-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50074,16 +50214,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST427:
-	.4byte	.LVL1864
-	.4byte	.LVL1865
+.LLST429:
+	.4byte	.LVL1866
+	.4byte	.LVL1867
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1865
-	.4byte	.LVL1868-1
+	.4byte	.LVL1867
+	.4byte	.LVL1870-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1868-1
+	.4byte	.LVL1870-1
 	.4byte	.LFE222
 	.2byte	0x4
 	.byte	0xf3
@@ -50092,76 +50232,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST383:
-	.4byte	.LVL1630
-	.4byte	.LVL1631
+.LLST385:
+	.4byte	.LVL1632
+	.4byte	.LVL1633
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1631
-	.4byte	.LVL1632
+	.4byte	.LVL1633
+	.4byte	.LVL1634
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1632
-	.4byte	.LVL1633-1
+	.4byte	.LVL1634
+	.4byte	.LVL1635-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1633-1
-	.4byte	.LVL1636
+	.4byte	.LVL1635-1
+	.4byte	.LVL1638
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1636
-	.4byte	.LVL1651
+	.4byte	.LVL1638
+	.4byte	.LVL1653
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1651
-	.4byte	.LVL1652
+	.4byte	.LVL1653
+	.4byte	.LVL1654
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1652
+	.4byte	.LVL1654
 	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST384:
-	.4byte	.LVL1630
-	.4byte	.LVL1631
+.LLST386:
+	.4byte	.LVL1632
+	.4byte	.LVL1633
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1631
-	.4byte	.LVL1632
+	.4byte	.LVL1633
+	.4byte	.LVL1634
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1632
-	.4byte	.LVL1633-1
+	.4byte	.LVL1634
+	.4byte	.LVL1635-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1633-1
-	.4byte	.LVL1651
+	.4byte	.LVL1635-1
+	.4byte	.LVL1653
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1651
+	.4byte	.LVL1653
 	.4byte	.LFE221
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST385:
-	.4byte	.LVL1637
-	.4byte	.LVL1642
+.LLST387:
+	.4byte	.LVL1639
+	.4byte	.LVL1644
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST386:
-	.4byte	.LVL1638
-	.4byte	.LVL1639
+.LLST388:
+	.4byte	.LVL1640
+	.4byte	.LVL1641
 	.2byte	0x21
 	.byte	0x74
 	.sleb128 0
@@ -50195,52 +50335,52 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST387:
-	.4byte	.LVL1635
-	.4byte	.LVL1640
+.LLST389:
+	.4byte	.LVL1637
+	.4byte	.LVL1642
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1640
-	.4byte	.LVL1651
+	.4byte	.LVL1642
+	.4byte	.LVL1653
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST388:
-	.4byte	.LVL1647
-	.4byte	.LVL1648-1
+.LLST390:
+	.4byte	.LVL1649
+	.4byte	.LVL1650-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST428:
-	.4byte	.LVL1869
-	.4byte	.LVL1872
+.LLST430:
+	.4byte	.LVL1871
+	.4byte	.LVL1874
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1872
 	.4byte	.LVL1874
+	.4byte	.LVL1876
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1874
 	.4byte	.LVL1876
+	.4byte	.LVL1878
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1876
-	.4byte	.LVL1963
+	.4byte	.LVL1878
+	.4byte	.LVL1965
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1963
-	.4byte	.LVL1964
+	.4byte	.LVL1965
+	.4byte	.LVL1966
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1964
+	.4byte	.LVL1966
 	.4byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50249,191 +50389,191 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST429:
-	.4byte	.LVL1869
+.LLST431:
 	.4byte	.LVL1871
+	.4byte	.LVL1873
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1871
-	.4byte	.LVL1874
+	.4byte	.LVL1873
+	.4byte	.LVL1876
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1874
-	.4byte	.LVL1878
+	.4byte	.LVL1876
+	.4byte	.LVL1880
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1878
-	.4byte	.LVL1922
+	.4byte	.LVL1880
+	.4byte	.LVL1924
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1922
-	.4byte	.LVL1923
+	.4byte	.LVL1924
+	.4byte	.LVL1925
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1923
-	.4byte	.LVL1963
+	.4byte	.LVL1925
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1963
+	.4byte	.LVL1965
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST430:
-	.4byte	.LVL1869
-	.4byte	.LVL1870
+.LLST432:
+	.4byte	.LVL1871
+	.4byte	.LVL1872
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1870
-	.4byte	.LVL1874
+	.4byte	.LVL1872
+	.4byte	.LVL1876
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1874
-	.4byte	.LVL1877
+	.4byte	.LVL1876
+	.4byte	.LVL1879
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1877
-	.4byte	.LVL1923
+	.4byte	.LVL1879
+	.4byte	.LVL1925
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1923
-	.4byte	.LVL1924
+	.4byte	.LVL1925
+	.4byte	.LVL1926
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1924
-	.4byte	.LVL1963
+	.4byte	.LVL1926
+	.4byte	.LVL1965
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1963
+	.4byte	.LVL1965
 	.4byte	.LFE220
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST431:
-	.4byte	.LVL1869
-	.4byte	.LVL1873-1
+.LLST433:
+	.4byte	.LVL1871
+	.4byte	.LVL1875-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1873-1
-	.4byte	.LVL1874
+	.4byte	.LVL1875-1
+	.4byte	.LVL1876
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -92
-	.4byte	.LVL1874
-	.4byte	.LVL1875
+	.4byte	.LVL1876
+	.4byte	.LVL1877
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1875
-	.4byte	.LVL1925
+	.4byte	.LVL1877
+	.4byte	.LVL1927
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -92
-	.4byte	.LVL1925
-	.4byte	.LVL1926
+	.4byte	.LVL1927
+	.4byte	.LVL1928
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1926
+	.4byte	.LVL1928
 	.4byte	.LFE220
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -92
 	.4byte	0
 	.4byte	0
-.LLST432:
-	.4byte	.LVL1935
-	.4byte	.LVL1938
+.LLST434:
+	.4byte	.LVL1937
+	.4byte	.LVL1940
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -84
 	.4byte	0
 	.4byte	0
-.LLST433:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST435:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1886
-	.4byte	.LVL1906
+	.4byte	.LVL1888
+	.4byte	.LVL1908
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1929
-	.4byte	.LVL1963
+	.4byte	.LVL1931
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST434:
-	.4byte	.LVL1880
-	.4byte	.LVL1881
+.LLST436:
+	.4byte	.LVL1882
+	.4byte	.LVL1883
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1881
-	.4byte	.LVL1911
+	.4byte	.LVL1883
+	.4byte	.LVL1913
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1911
-	.4byte	.LVL1912
+	.4byte	.LVL1913
+	.4byte	.LVL1914
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1912
-	.4byte	.LVL1927
+	.4byte	.LVL1914
+	.4byte	.LVL1929
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
-	.4byte	.LVL1927
-	.4byte	.LVL1928-1
+	.4byte	.LVL1929
+	.4byte	.LVL1930-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1928-1
-	.4byte	.LVL1963
+	.4byte	.LVL1930-1
+	.4byte	.LVL1965
 	.2byte	0x2
 	.byte	0x7d
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST435:
-	.4byte	.LVL1883
-	.4byte	.LVL1885-1
+.LLST437:
+	.4byte	.LVL1885
+	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1885-1
-	.4byte	.LVL1911
+	.4byte	.LVL1887-1
+	.4byte	.LVL1913
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
-	.4byte	.LVL1911
-	.4byte	.LVL1914
+	.4byte	.LVL1913
+	.4byte	.LVL1916
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1914
-	.4byte	.LVL1963
+	.4byte	.LVL1916
+	.4byte	.LVL1965
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -76
 	.4byte	0
 	.4byte	0
-.LLST436:
-	.4byte	.LVL1934
+.LLST438:
 	.4byte	.LVL1936
+	.4byte	.LVL1938
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1936
-	.4byte	.LVL1937
+	.4byte	.LVL1938
+	.4byte	.LVL1939
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.4byte	.LVL1937
-	.4byte	.LVL1939-1
+	.4byte	.LVL1939
+	.4byte	.LVL1941-1
 	.2byte	0xb
 	.byte	0x3
 	.4byte	req_prgm
@@ -50445,83 +50585,83 @@ __func__.9940:
 	.uleb128 0x4
 	.4byte	0
 	.4byte	0
-.LLST437:
-	.4byte	.LVL1897
-	.4byte	.LVL1900
+.LLST439:
+	.4byte	.LVL1899
+	.4byte	.LVL1902
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1900
 	.4byte	.LVL1902
+	.4byte	.LVL1904
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1932
-	.4byte	.LVL1949
+	.4byte	.LVL1934
+	.4byte	.LVL1951
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1949
-	.4byte	.LVL1950
+	.4byte	.LVL1951
+	.4byte	.LVL1952
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1950
-	.4byte	.LVL1959
+	.4byte	.LVL1952
+	.4byte	.LVL1961
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST438:
-	.4byte	.LVL1884
-	.4byte	.LVL1885-1
+.LLST440:
+	.4byte	.LVL1886
+	.4byte	.LVL1887-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1885-1
-	.4byte	.LVL1901
+	.4byte	.LVL1887-1
+	.4byte	.LVL1903
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1901
 	.4byte	.LVL1903
+	.4byte	.LVL1905
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1903
-	.4byte	.LVL1911
+	.4byte	.LVL1905
+	.4byte	.LVL1913
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1911
 	.4byte	.LVL1913
+	.4byte	.LVL1915
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1913
-	.4byte	.LVL1919
+	.4byte	.LVL1915
+	.4byte	.LVL1921
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1919
-	.4byte	.LVL1920
+	.4byte	.LVL1921
+	.4byte	.LVL1922
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1921
-	.4byte	.LVL1929
+	.4byte	.LVL1923
+	.4byte	.LVL1931
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1929
-	.4byte	.LVL1962
+	.4byte	.LVL1931
+	.4byte	.LVL1964
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -88
-	.4byte	.LVL1962
-	.4byte	.LVL1963
+	.4byte	.LVL1964
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST439:
-	.4byte	.LVL1893
-	.4byte	.LVL1894
+.LLST441:
+	.4byte	.LVL1895
+	.4byte	.LVL1896
 	.2byte	0x1f
 	.byte	0x74
 	.sleb128 7
@@ -50552,138 +50692,138 @@ __func__.9940:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.4byte	.LVL1894
-	.4byte	.LVL1895
+	.4byte	.LVL1896
+	.4byte	.LVL1897
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1895
-	.4byte	.LVL1898
+	.4byte	.LVL1897
+	.4byte	.LVL1900
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1898
-	.4byte	.LVL1899
+	.4byte	.LVL1900
+	.4byte	.LVL1901
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1899
-	.4byte	.LVL1900
+	.4byte	.LVL1901
+	.4byte	.LVL1902
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1900
 	.4byte	.LVL1902
+	.4byte	.LVL1904
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL1932
-	.4byte	.LVL1959
+	.4byte	.LVL1934
+	.4byte	.LVL1961
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1959
-	.4byte	.LVL1963
+	.4byte	.LVL1961
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST440:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST442:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1916
-	.4byte	.LVL1917
+	.4byte	.LVL1918
+	.4byte	.LVL1919
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1917
-	.4byte	.LVL1919-1
+	.4byte	.LVL1919
+	.4byte	.LVL1921-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1940
 	.4byte	.LVL1942
+	.4byte	.LVL1944
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1944
-	.4byte	.LVL1945
+	.4byte	.LVL1946
+	.4byte	.LVL1947
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1945
 	.4byte	.LVL1947
+	.4byte	.LVL1949
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.4byte	.LVL1953
+	.4byte	.LVL1960
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST441:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST443:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1916
-	.4byte	.LVL1920
+	.4byte	.LVL1918
+	.4byte	.LVL1922
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1921
-	.4byte	.LVL1929
+	.4byte	.LVL1923
+	.4byte	.LVL1931
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1941
-	.4byte	.LVL1942
+	.4byte	.LVL1943
+	.4byte	.LVL1944
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1945
-	.4byte	.LVL1946
+	.4byte	.LVL1947
+	.4byte	.LVL1948
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1951
-	.4byte	.LVL1958
+	.4byte	.LVL1953
+	.4byte	.LVL1960
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST442:
-	.4byte	.LVL1885
-	.4byte	.LVL1886
+.LLST444:
+	.4byte	.LVL1887
+	.4byte	.LVL1888
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL1886
-	.4byte	.LVL1889
+	.4byte	.LVL1888
+	.4byte	.LVL1891
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1892
-	.4byte	.LVL1904
+	.4byte	.LVL1894
+	.4byte	.LVL1906
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1929
 	.4byte	.LVL1931
+	.4byte	.LVL1933
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1932
-	.4byte	.LVL1963
+	.4byte	.LVL1934
+	.4byte	.LVL1965
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST375:
-	.4byte	.LVL1602
-	.4byte	.LVL1605-1
+.LLST377:
+	.4byte	.LVL1604
+	.4byte	.LVL1607-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1605-1
-	.4byte	.LVL1605
+	.4byte	.LVL1607-1
+	.4byte	.LVL1607
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1605
+	.4byte	.LVL1607
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50692,16 +50832,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST376:
-	.4byte	.LVL1602
-	.4byte	.LVL1605-1
+.LLST378:
+	.4byte	.LVL1604
+	.4byte	.LVL1607-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1605-1
-	.4byte	.LVL1623
+	.4byte	.LVL1607-1
+	.4byte	.LVL1625
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1623
+	.4byte	.LVL1625
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50710,12 +50850,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST377:
-	.4byte	.LVL1602
-	.4byte	.LVL1603
+.LLST379:
+	.4byte	.LVL1604
+	.4byte	.LVL1605
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1603
+	.4byte	.LVL1605
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50724,16 +50864,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST378:
-	.4byte	.LVL1602
+.LLST380:
 	.4byte	.LVL1604
+	.4byte	.LVL1606
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1604
-	.4byte	.LVL1623
+	.4byte	.LVL1606
+	.4byte	.LVL1625
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL1623
+	.4byte	.LVL1625
 	.4byte	.LFE218
 	.2byte	0x4
 	.byte	0xf3
@@ -50742,67 +50882,67 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST379:
-	.4byte	.LVL1605
-	.4byte	.LVL1623
+.LLST381:
+	.4byte	.LVL1607
+	.4byte	.LVL1625
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST380:
-	.4byte	.LVL1614
-	.4byte	.LVL1621
+.LLST382:
+	.4byte	.LVL1616
+	.4byte	.LVL1623
 	.2byte	0x1
 	.byte	0x5b
 	.4byte	0
 	.4byte	0
-.LLST381:
-	.4byte	.LVL1606
-	.4byte	.LVL1607
+.LLST383:
+	.4byte	.LVL1608
+	.4byte	.LVL1609
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1616
-	.4byte	.LVL1617
+	.4byte	.LVL1618
+	.4byte	.LVL1619
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST382:
-	.4byte	.LVL1613
-	.4byte	.LVL1615-1
+.LLST384:
+	.4byte	.LVL1615
+	.4byte	.LVL1617-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 12
 	.4byte	0
 	.4byte	0
-.LLST408:
-	.4byte	.LVL1813
-	.4byte	.LVL1816
+.LLST410:
+	.4byte	.LVL1815
+	.4byte	.LVL1818
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1816
-	.4byte	.LVL1819
+	.4byte	.LVL1818
+	.4byte	.LVL1821
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1822
+	.4byte	.LVL1821
+	.4byte	.LVL1824
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1822
-	.4byte	.LVL1862
+	.4byte	.LVL1824
+	.4byte	.LVL1864
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1862
-	.4byte	.LVL1863
+	.4byte	.LVL1864
+	.4byte	.LVL1865
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1863
+	.4byte	.LVL1865
 	.4byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50811,118 +50951,118 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST409:
-	.4byte	.LVL1813
+.LLST411:
 	.4byte	.LVL1815
+	.4byte	.LVL1817
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1815
-	.4byte	.LVL1819
+	.4byte	.LVL1817
+	.4byte	.LVL1821
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1819
-	.4byte	.LVL1823-1
+	.4byte	.LVL1821
+	.4byte	.LVL1825-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1823-1
-	.4byte	.LVL1862
+	.4byte	.LVL1825-1
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
 	.4byte	0
 	.4byte	0
-.LLST410:
-	.4byte	.LVL1813
-	.4byte	.LVL1814
+.LLST412:
+	.4byte	.LVL1815
+	.4byte	.LVL1816
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1814
-	.4byte	.LVL1819
+	.4byte	.LVL1816
+	.4byte	.LVL1821
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1819
 	.4byte	.LVL1821
+	.4byte	.LVL1823
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1821
+	.4byte	.LVL1823
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST411:
-	.4byte	.LVL1813
-	.4byte	.LVL1817-1
+.LLST413:
+	.4byte	.LVL1815
+	.4byte	.LVL1819-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1817-1
-	.4byte	.LVL1819
+	.4byte	.LVL1819-1
+	.4byte	.LVL1821
 	.2byte	0x1
 	.byte	0x58
-	.4byte	.LVL1819
-	.4byte	.LVL1820
+	.4byte	.LVL1821
+	.4byte	.LVL1822
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1820
+	.4byte	.LVL1822
 	.4byte	.LFE217
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST412:
-	.4byte	.LVL1813
-	.4byte	.LVL1818
+.LLST414:
+	.4byte	.LVL1815
+	.4byte	.LVL1820
 	.2byte	0x2
 	.byte	0x30
-	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST413:
-	.4byte	.LVL1825
-	.4byte	.LVL1826
+.LLST415:
+	.4byte	.LVL1827
+	.4byte	.LVL1828
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1826
-	.4byte	.LVL1862
+	.4byte	.LVL1828
+	.4byte	.LVL1864
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
 	.4byte	0
 	.4byte	0
-.LLST414:
-	.4byte	.LVL1828
-	.4byte	.LVL1831
+.LLST416:
+	.4byte	.LVL1830
+	.4byte	.LVL1833
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1831
-	.4byte	.LVL1862
+	.4byte	.LVL1833
+	.4byte	.LVL1864
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST415:
-	.4byte	.LVL1847
-	.4byte	.LVL1848
+.LLST417:
+	.4byte	.LVL1849
+	.4byte	.LVL1850
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1848
-	.4byte	.LVL1849-1
+	.4byte	.LVL1850
+	.4byte	.LVL1851-1
 	.2byte	0x12
 	.byte	0x3
 	.4byte	c_ftl_nand_sec_pre_page
@@ -50940,139 +51080,139 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST416:
-	.4byte	.LVL1829
+.LLST418:
 	.4byte	.LVL1831
+	.4byte	.LVL1833
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -72
-	.4byte	.LVL1831
-	.4byte	.LVL1862
+	.4byte	.LVL1833
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST417:
-	.4byte	.LVL1840
-	.4byte	.LVL1841
+.LLST419:
+	.4byte	.LVL1842
+	.4byte	.LVL1843
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1841
-	.4byte	.LVL1846
+	.4byte	.LVL1843
+	.4byte	.LVL1848
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1859
-	.4byte	.LVL1862
+	.4byte	.LVL1861
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST418:
-	.4byte	.LVL1829
+.LLST420:
 	.4byte	.LVL1831
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1845
+	.4byte	.LVL1833
+	.4byte	.LVL1847
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1846
-	.4byte	.LVL1862
+	.4byte	.LVL1848
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST419:
-	.4byte	.LVL1829
-	.4byte	.LVL1830
+.LLST421:
+	.4byte	.LVL1831
+	.4byte	.LVL1832
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1830
-	.4byte	.LVL1831
+	.4byte	.LVL1832
+	.4byte	.LVL1833
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1831
 	.4byte	.LVL1833
+	.4byte	.LVL1835
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1833
-	.4byte	.LVL1834-1
+	.4byte	.LVL1835
+	.4byte	.LVL1836-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1834-1
-	.4byte	.LVL1837
+	.4byte	.LVL1836-1
+	.4byte	.LVL1839
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
-	.4byte	.LVL1837
-	.4byte	.LVL1838
+	.4byte	.LVL1839
+	.4byte	.LVL1840
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 -1
 	.byte	0x9f
-	.4byte	.LVL1838
-	.4byte	.LVL1839
+	.4byte	.LVL1840
+	.4byte	.LVL1841
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1839
-	.4byte	.LVL1862
+	.4byte	.LVL1841
+	.4byte	.LVL1864
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -80
 	.4byte	0
 	.4byte	0
-.LLST420:
-	.4byte	.LVL1813
-	.4byte	.LVL1818
+.LLST422:
+	.4byte	.LVL1815
+	.4byte	.LVL1820
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1853
+	.4byte	.LVL1833
+	.4byte	.LVL1855
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1853
-	.4byte	.LVL1856
+	.4byte	.LVL1855
+	.4byte	.LVL1858
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1856
-	.4byte	.LVL1862
+	.4byte	.LVL1858
+	.4byte	.LVL1864
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST421:
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+.LLST423:
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1853
+	.4byte	.LVL1833
+	.4byte	.LVL1855
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1853
-	.4byte	.LVL1854
+	.4byte	.LVL1855
+	.4byte	.LVL1856
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1854
-	.4byte	.LVL1855
+	.4byte	.LVL1856
+	.4byte	.LVL1857
 	.2byte	0x6
 	.byte	0x7b
 	.sleb128 0
@@ -51080,60 +51220,60 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1855
-	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.4byte	.LVL1858
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1856
-	.4byte	.LVL1862
+	.4byte	.LVL1858
+	.4byte	.LVL1864
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST422:
-	.4byte	.LVL1819
-	.4byte	.LVL1831
+.LLST424:
+	.4byte	.LVL1821
+	.4byte	.LVL1833
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1831
-	.4byte	.LVL1862
+	.4byte	.LVL1833
+	.4byte	.LVL1864
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1862
+	.4byte	.LVL1864
 	.4byte	.LFE217
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST423:
-	.4byte	.LVL1835
-	.4byte	.LVL1836
+.LLST425:
+	.4byte	.LVL1837
+	.4byte	.LVL1838
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL1846
-	.4byte	.LVL1851
+	.4byte	.LVL1848
+	.4byte	.LVL1853
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	0
 	.4byte	0
-.LLST424:
-	.4byte	.LVL1860
-	.4byte	.LVL1861-1
+.LLST426:
+	.4byte	.LVL1862
+	.4byte	.LVL1863-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST452:
-	.4byte	.LVL2071
-	.4byte	.LVL2072
+.LLST454:
+	.4byte	.LVL2073
+	.4byte	.LVL2074
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51141,8 +51281,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2072
-	.4byte	.LVL2073
+	.4byte	.LVL2074
+	.4byte	.LVL2075
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51150,8 +51290,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL2073
-	.4byte	.LVL2074
+	.4byte	.LVL2075
+	.4byte	.LVL2076
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51161,106 +51301,106 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST448:
-	.4byte	.LVL2025
+.LLST450:
 	.4byte	.LVL2027
+	.4byte	.LVL2029
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2029
-	.4byte	.LVL2030
+	.4byte	.LVL2031
+	.4byte	.LVL2032
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2040
 	.4byte	.LVL2042
+	.4byte	.LVL2044
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2045
-	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.4byte	.LVL2048
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL2050
-	.4byte	.LVL2051
+	.4byte	.LVL2052
+	.4byte	.LVL2053
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2053
-	.4byte	.LVL2054
+	.4byte	.LVL2055
+	.4byte	.LVL2056
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL2054
-	.4byte	.LVL2055-1
+	.4byte	.LVL2056
+	.4byte	.LVL2057-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL2057
-	.4byte	.LVL2058
+	.4byte	.LVL2059
+	.4byte	.LVL2060
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST449:
-	.4byte	.LVL2029
-	.4byte	.LVL2033
+.LLST451:
+	.4byte	.LVL2031
+	.4byte	.LVL2035
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2054
 	.4byte	.LVL2056
+	.4byte	.LVL2058
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2057
-	.4byte	.LVL2058
+	.4byte	.LVL2059
+	.4byte	.LVL2060
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST450:
-	.4byte	.LVL2023
-	.4byte	.LVL2026
+.LLST452:
+	.4byte	.LVL2025
+	.4byte	.LVL2028
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL2026
 	.4byte	.LVL2028
+	.4byte	.LVL2030
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2040
-	.4byte	.LVL2043
+	.4byte	.LVL2042
+	.4byte	.LVL2045
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2044
-	.4byte	.LVL2049
+	.4byte	.LVL2046
+	.4byte	.LVL2051
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL2049
-	.4byte	.LVL2050
+	.4byte	.LVL2051
+	.4byte	.LVL2052
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST451:
-	.4byte	.LVL2021
-	.4byte	.LVL2022
+.LLST453:
+	.4byte	.LVL2023
+	.4byte	.LVL2024
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL2022
 	.4byte	.LVL2024
+	.4byte	.LVL2026
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2038
-	.4byte	.LVL2039
+	.4byte	.LVL2040
+	.4byte	.LVL2041
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL2039
-	.4byte	.LVL2040
+	.4byte	.LVL2041
+	.4byte	.LVL2042
 	.2byte	0x1
 	.byte	0x52
 	.4byte	0
 	.4byte	0
-.LLST179:
-	.4byte	.LVL640
+.LLST181:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL642
+	.4byte	.LVL644
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51269,12 +51409,12 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST180:
-	.4byte	.LVL640
+.LLST182:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL642
+	.4byte	.LVL644
 	.4byte	.LFE212
 	.2byte	0x4
 	.byte	0xf3
@@ -51283,270 +51423,270 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST181:
-	.4byte	.LVL640
+.LLST183:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL669
+	.4byte	.LVL644
+	.4byte	.LVL671
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL670
 	.4byte	.LVL672
+	.4byte	.LVL674
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL673
-	.4byte	.LVL687
+	.4byte	.LVL675
+	.4byte	.LVL689
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL688
+	.4byte	.LVL690
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST182:
-	.4byte	.LVL640
+.LLST184:
 	.4byte	.LVL642
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL647
+	.4byte	.LVL644
+	.4byte	.LVL649
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL647
-	.4byte	.LVL648
+	.4byte	.LVL649
+	.4byte	.LVL650
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL648
-	.4byte	.LVL664
+	.4byte	.LVL650
+	.4byte	.LVL666
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL665
-	.4byte	.LVL682
+	.4byte	.LVL667
+	.4byte	.LVL684
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL683
+	.4byte	.LVL685
 	.4byte	.LFE212
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST183:
-	.4byte	.LVL641
-	.4byte	.LVL642
+.LLST185:
+	.4byte	.LVL643
+	.4byte	.LVL644
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL642
-	.4byte	.LVL643
+	.4byte	.LVL644
+	.4byte	.LVL645
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL643
-	.4byte	.LVL647
+	.4byte	.LVL645
+	.4byte	.LVL649
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL647
-	.4byte	.LVL648
+	.4byte	.LVL649
+	.4byte	.LVL650
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL648
-	.4byte	.LVL649
-	.2byte	0x1
-	.byte	0x5b
-	.4byte	.LVL649
 	.4byte	.LVL650
+	.4byte	.LVL651
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x5b
 	.4byte	.LVL651
 	.4byte	.LVL652
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL653
+	.4byte	.LVL654
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL652
-	.4byte	.LVL655
+	.4byte	.LVL654
+	.4byte	.LVL657
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL655
 	.4byte	.LVL657
+	.4byte	.LVL659
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL657
-	.4byte	.LVL658
+	.4byte	.LVL659
+	.4byte	.LVL660
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL659
-	.4byte	.LVL666
+	.4byte	.LVL661
+	.4byte	.LVL668
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL666
-	.4byte	.LVL667
+	.4byte	.LVL668
+	.4byte	.LVL669
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL668
-	.4byte	.LVL671
+	.4byte	.LVL670
+	.4byte	.LVL673
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL671
-	.4byte	.LVL674
+	.4byte	.LVL673
+	.4byte	.LVL676
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL674
-	.4byte	.LVL675
+	.4byte	.LVL676
+	.4byte	.LVL677
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL676
-	.4byte	.LVL677
+	.4byte	.LVL678
+	.4byte	.LVL679
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL677
-	.4byte	.LVL684
+	.4byte	.LVL679
+	.4byte	.LVL686
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL684
-	.4byte	.LVL685
+	.4byte	.LVL686
+	.4byte	.LVL687
 	.2byte	0x3
 	.byte	0x7b
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL686
-	.4byte	.LVL690
+	.4byte	.LVL688
+	.4byte	.LVL692
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL690
-	.4byte	.LVL691
+	.4byte	.LVL692
+	.4byte	.LVL693
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL692
-	.4byte	.LVL693
+	.4byte	.LVL694
+	.4byte	.LVL695
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL693
-	.4byte	.LVL694
+	.4byte	.LVL695
+	.4byte	.LVL696
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST184:
-	.4byte	.LVL661
-	.4byte	.LVL662-1
+.LLST186:
+	.4byte	.LVL663
+	.4byte	.LVL664-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL679
-	.4byte	.LVL680-1
+	.4byte	.LVL681
+	.4byte	.LVL682-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST185:
-	.4byte	.LVL640
-	.4byte	.LVL645
+.LLST187:
+	.4byte	.LVL642
+	.4byte	.LVL647
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL645
-	.4byte	.LVL646
+	.4byte	.LVL647
+	.4byte	.LVL648
 	.2byte	0x1
 	.byte	0x5a
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST186:
-	.4byte	.LVL640
-	.4byte	.LVL647
+.LLST188:
+	.4byte	.LVL642
+	.4byte	.LVL649
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL647
-	.4byte	.LVL653
+	.4byte	.LVL649
+	.4byte	.LVL655
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL654
 	.4byte	.LVL656
+	.4byte	.LVL658
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL677
-	.4byte	.LVL692
+	.4byte	.LVL679
+	.4byte	.LVL694
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST187:
-	.4byte	.LVL640
-	.4byte	.LVL646
+.LLST189:
+	.4byte	.LVL642
+	.4byte	.LVL648
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST188:
-	.4byte	.LVL640
-	.4byte	.LVL644
+.LLST190:
+	.4byte	.LVL642
+	.4byte	.LVL646
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL644
 	.4byte	.LVL646
+	.4byte	.LVL648
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL659
-	.4byte	.LVL677
+	.4byte	.LVL661
+	.4byte	.LVL679
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST192:
-	.4byte	.LVL754
-	.4byte	.LVL755
+.LLST194:
+	.4byte	.LVL756
+	.4byte	.LVL757
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.4byte	.LVL755
-	.4byte	.LVL756
+	.4byte	.LVL757
+	.4byte	.LVL758
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL758
 	.4byte	.LVL760
+	.4byte	.LVL762
 	.2byte	0x1
 	.byte	0x53
 	.4byte	0
 	.4byte	0
-.LLST193:
-	.4byte	.LVL699
-	.4byte	.LVL705
+.LLST195:
+	.4byte	.LVL701
+	.4byte	.LVL707
 	.2byte	0x1
 	.byte	0x54
-	.4byte	.LVL705
-	.4byte	.LVL712
+	.4byte	.LVL707
+	.4byte	.LVL714
 	.2byte	0x7
 	.byte	0x74
 	.sleb128 0
@@ -51554,16 +51694,16 @@ __func__.9940:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.4byte	.LVL714
-	.4byte	.LVL720
+	.4byte	.LVL716
+	.4byte	.LVL722
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL721
-	.4byte	.LVL724
+	.4byte	.LVL723
+	.4byte	.LVL726
 	.2byte	0x1
 	.byte	0x5b
-	.4byte	.LVL725
-	.4byte	.LVL726
+	.4byte	.LVL727
+	.4byte	.LVL728
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51571,12 +51711,12 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL726
-	.4byte	.LVL729
+	.4byte	.LVL728
+	.4byte	.LVL731
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL735
-	.4byte	.LVL736
+	.4byte	.LVL737
+	.4byte	.LVL738
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_map_region_num
@@ -51588,12 +51728,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL736
-	.4byte	.LVL737-1
+	.4byte	.LVL738
+	.4byte	.LVL739-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL738
-	.4byte	.LVL739
+	.4byte	.LVL740
+	.4byte	.LVL741
 	.2byte	0x9
 	.byte	0x3
 	.4byte	c_ftl_nand_max_map_blks
@@ -51601,12 +51741,12 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL739
-	.4byte	.LVL740-1
+	.4byte	.LVL741
+	.4byte	.LVL742-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL741
-	.4byte	.LVL742
+	.4byte	.LVL743
+	.4byte	.LVL744
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51618,12 +51758,12 @@ __func__.9940:
 	.byte	0x3c
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL742
-	.4byte	.LVL743-1
+	.4byte	.LVL744
+	.4byte	.LVL745-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL744
-	.4byte	.LVL745
+	.4byte	.LVL746
+	.4byte	.LVL747
 	.2byte	0x18
 	.byte	0x3
 	.4byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51641,12 +51781,12 @@ __func__.9940:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL745
-	.4byte	.LVL746-1
+	.4byte	.LVL747
+	.4byte	.LVL748-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL747
-	.4byte	.LVL748
+	.4byte	.LVL749
+	.4byte	.LVL750
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_blk_pre_plane
@@ -51658,12 +51798,12 @@ __func__.9940:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.4byte	.LVL748
-	.4byte	.LVL749-1
+	.4byte	.LVL750
+	.4byte	.LVL751-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL750
-	.4byte	.LVL751
+	.4byte	.LVL752
+	.4byte	.LVL753
 	.2byte	0x11
 	.byte	0x3
 	.4byte	c_ftl_nand_die_num
@@ -51678,8 +51818,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL751
-	.4byte	.LVL752
+	.4byte	.LVL753
+	.4byte	.LVL754
 	.2byte	0x1e
 	.byte	0x3
 	.4byte	c_ftl_nand_blks_per_die
@@ -51703,8 +51843,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL752
-	.4byte	.LVL753-1
+	.4byte	.LVL754
+	.4byte	.LVL755-1
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
@@ -51954,7 +52094,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x58
 	.4byte	.LVL11
-	.4byte	.LFE351
+	.4byte	.LFE352
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -51972,7 +52112,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x5a
 	.4byte	.LVL11
-	.4byte	.LFE351
+	.4byte	.LFE352
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52014,7 +52154,7 @@ __func__.9940:
 	.byte	0x7a
 	.sleb128 0
 	.4byte	.LVL11
-	.4byte	.LFE351
+	.4byte	.LFE352
 	.2byte	0x3
 	.byte	0xf3
 	.uleb128 0x1
@@ -52027,7 +52167,7 @@ __func__.9940:
 	.2byte	0x1
 	.byte	0x50
 	.4byte	.LVL13
-	.4byte	.LFE358
+	.4byte	.LFE359
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52431,9 +52571,9 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST238:
-	.4byte	.LVL916
-	.4byte	.LVL920
+.LLST240:
+	.4byte	.LVL918
+	.4byte	.LVL922
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52441,8 +52581,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL921
-	.4byte	.LVL922
+	.4byte	.LVL923
+	.4byte	.LVL924
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52450,8 +52590,8 @@ __func__.9940:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL922
-	.4byte	.LVL923
+	.4byte	.LVL924
+	.4byte	.LVL925
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52461,37 +52601,37 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST280:
-	.4byte	.LVL1139
+.LLST282:
 	.4byte	.LVL1141
+	.4byte	.LVL1143
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1141
-	.4byte	.LVL1149
+	.4byte	.LVL1143
+	.4byte	.LVL1151
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1149
-	.4byte	.LFE346
+	.4byte	.LVL1151
+	.4byte	.LFE347
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST281:
-	.4byte	.LVL1140
+.LLST283:
 	.4byte	.LVL1142
+	.4byte	.LVL1144
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST301:
-	.4byte	.LVL1224
-	.4byte	.LVL1225
+.LLST303:
+	.4byte	.LVL1226
+	.4byte	.LVL1227
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1225
+	.4byte	.LVL1227
 	.4byte	.LFE320
 	.2byte	0x4
 	.byte	0xf3
@@ -52500,91 +52640,91 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST302:
-	.4byte	.LVL1225
-	.4byte	.LVL1226
+.LLST304:
+	.4byte	.LVL1227
+	.4byte	.LVL1228
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1227
-	.4byte	.LVL1231
+	.4byte	.LVL1229
+	.4byte	.LVL1233
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1231
-	.4byte	.LVL1232
+	.4byte	.LVL1233
+	.4byte	.LVL1234
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1233
+	.4byte	.LVL1235
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST303:
-	.4byte	.LVL1230
-	.4byte	.LVL1237
+.LLST305:
+	.4byte	.LVL1232
+	.4byte	.LVL1239
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1237
-	.4byte	.LVL1238
+	.4byte	.LVL1239
+	.4byte	.LVL1240
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1238
-	.4byte	.LVL1239
+	.4byte	.LVL1240
+	.4byte	.LVL1241
 	.2byte	0x3
 	.byte	0x77
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1240
+	.4byte	.LVL1242
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST304:
-	.4byte	.LVL1236
+.LLST306:
 	.4byte	.LVL1238
-	.2byte	0x1
-	.byte	0x55
 	.4byte	.LVL1240
-	.4byte	.LVL1241
 	.2byte	0x1
 	.byte	0x55
 	.4byte	.LVL1242
+	.4byte	.LVL1243
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1244
 	.4byte	.LFE320
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST305:
-	.4byte	.LVL1243
+.LLST307:
 	.4byte	.LVL1245
+	.4byte	.LVL1247
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1245
-	.4byte	.LVL1251
+	.4byte	.LVL1247
+	.4byte	.LVL1253
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1251
-	.4byte	.LVL1252
+	.4byte	.LVL1253
+	.4byte	.LVL1254
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1252
-	.4byte	.LVL1253
+	.4byte	.LVL1254
+	.4byte	.LVL1255
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1253
-	.4byte	.LVL1254-1
+	.4byte	.LVL1255
+	.4byte	.LVL1256-1
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1254-1
+	.4byte	.LVL1256-1
 	.4byte	.LFE304
 	.2byte	0x4
 	.byte	0xf3
@@ -52593,16 +52733,16 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST306:
-	.4byte	.LVL1244
-	.4byte	.LVL1251
+.LLST308:
+	.4byte	.LVL1246
+	.4byte	.LVL1253
 	.2byte	0x1
 	.byte	0x54
 	.4byte	0
 	.4byte	0
-.LLST309:
-	.4byte	.LVL1266
-	.4byte	.LVL1267-1
+.LLST311:
+	.4byte	.LVL1268
+	.4byte	.LVL1269-1
 	.2byte	0x9
 	.byte	0x3
 	.4byte	g_MaxLpn
@@ -52610,19 +52750,19 @@ __func__.9940:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.4byte	.LVL1267-1
-	.4byte	.LVL1271
+	.4byte	.LVL1269-1
+	.4byte	.LVL1273
 	.2byte	0x1
 	.byte	0x56
-	.4byte	.LVL1272
-	.4byte	.LVL1278
+	.4byte	.LVL1274
+	.4byte	.LVL1280
 	.2byte	0x1
 	.byte	0x56
 	.4byte	0
 	.4byte	0
-.LLST310:
-	.4byte	.LVL1266
-	.4byte	.LVL1267-1
+.LLST312:
+	.4byte	.LVL1268
+	.4byte	.LVL1269-1
 	.2byte	0xe
 	.byte	0x3
 	.4byte	c_ftl_nand_planes_num
@@ -52634,8 +52774,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1267-1
-	.4byte	.LVL1270
+	.4byte	.LVL1269-1
+	.4byte	.LVL1272
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52645,8 +52785,8 @@ __func__.9940:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.4byte	.LVL1272
 	.4byte	.LVL1274
+	.4byte	.LVL1276
 	.2byte	0x9
 	.byte	0x78
 	.sleb128 0
@@ -52658,111 +52798,111 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST311:
-	.4byte	.LVL1268
-	.4byte	.LVL1271
+.LLST313:
+	.4byte	.LVL1270
+	.4byte	.LVL1273
 	.2byte	0x1
 	.byte	0x55
-	.4byte	.LVL1272
-	.4byte	.LVL1278
+	.4byte	.LVL1274
+	.4byte	.LVL1280
 	.2byte	0x1
 	.byte	0x55
 	.4byte	0
 	.4byte	0
-.LLST396:
-	.4byte	.LVL1713
-	.4byte	.LVL1714
+.LLST398:
+	.4byte	.LVL1715
+	.4byte	.LVL1716
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1714
-	.4byte	.LVL1728
+	.4byte	.LVL1716
+	.4byte	.LVL1730
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1728
-	.4byte	.LVL1729
+	.4byte	.LVL1730
+	.4byte	.LVL1731
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1729
-	.4byte	.LVL1745
+	.4byte	.LVL1731
+	.4byte	.LVL1747
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1745
-	.4byte	.LVL1750
+	.4byte	.LVL1747
+	.4byte	.LVL1752
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1750
-	.4byte	.LVL1751
+	.4byte	.LVL1752
+	.4byte	.LVL1753
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1751
 	.4byte	.LVL1753
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1753
-	.4byte	.LVL1754
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1754
-	.4byte	.LVL1805
+	.4byte	.LVL1756
+	.4byte	.LVL1807
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1805
-	.4byte	.LVL1809
+	.4byte	.LVL1807
+	.4byte	.LVL1811
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1809
-	.4byte	.LVL1810
+	.4byte	.LVL1811
+	.4byte	.LVL1812
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1810
+	.4byte	.LVL1812
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST397:
-	.4byte	.LVL1713
+.LLST399:
 	.4byte	.LVL1715
+	.4byte	.LVL1717
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1715
-	.4byte	.LVL1729
+	.4byte	.LVL1717
+	.4byte	.LVL1731
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1729
-	.4byte	.LVL1730-1
+	.4byte	.LVL1731
+	.4byte	.LVL1732-1
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1730-1
-	.4byte	.LVL1805
+	.4byte	.LVL1732-1
+	.4byte	.LVL1807
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1805
-	.4byte	.LVL1806
+	.4byte	.LVL1807
+	.4byte	.LVL1808
 	.2byte	0x1
 	.byte	0x51
-	.4byte	.LVL1806
+	.4byte	.LVL1808
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52771,22 +52911,22 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST398:
-	.4byte	.LVL1715
-	.4byte	.LVL1728
+.LLST400:
+	.4byte	.LVL1717
+	.4byte	.LVL1730
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1731
-	.4byte	.LVL1804
+	.4byte	.LVL1733
+	.4byte	.LVL1806
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.4byte	.LVL1806
+	.4byte	.LVL1808
 	.4byte	.LFE322
 	.2byte	0x4
 	.byte	0xf3
@@ -52795,76 +52935,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST399:
-	.4byte	.LVL1715
-	.4byte	.LVL1728
+.LLST401:
+	.4byte	.LVL1717
+	.4byte	.LVL1730
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1731
-	.4byte	.LVL1745
+	.4byte	.LVL1733
+	.4byte	.LVL1747
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1745
-	.4byte	.LVL1750
+	.4byte	.LVL1747
+	.4byte	.LVL1752
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1750
-	.4byte	.LVL1751
+	.4byte	.LVL1752
+	.4byte	.LVL1753
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1751
 	.4byte	.LVL1753
+	.4byte	.LVL1755
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1753
-	.4byte	.LVL1754
+	.4byte	.LVL1755
+	.4byte	.LVL1756
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1754
-	.4byte	.LVL1804
+	.4byte	.LVL1756
+	.4byte	.LVL1806
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1806
-	.4byte	.LVL1809
+	.4byte	.LVL1808
+	.4byte	.LVL1811
 	.2byte	0x1
 	.byte	0x57
-	.4byte	.LVL1809
-	.4byte	.LVL1810
+	.4byte	.LVL1811
+	.4byte	.LVL1812
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.4byte	.LVL1810
+	.4byte	.LVL1812
 	.4byte	.LFE322
 	.2byte	0x1
 	.byte	0x57
 	.4byte	0
 	.4byte	0
-.LLST400:
-	.4byte	.LVL1786
-	.4byte	.LVL1789
+.LLST402:
+	.4byte	.LVL1788
+	.4byte	.LVL1791
 	.2byte	0x1
 	.byte	0x58
 	.4byte	0
 	.4byte	0
-.LLST401:
-	.4byte	.LVL1772
-	.4byte	.LVL1781
+.LLST403:
+	.4byte	.LVL1774
+	.4byte	.LVL1783
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
-	.4byte	.LVL1781
-	.4byte	.LVL1782
+	.4byte	.LVL1783
+	.4byte	.LVL1784
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -56
@@ -52873,40 +53013,40 @@ __func__.9940:
 	.byte	0x23
 	.uleb128 0x1
 	.byte	0x9f
-	.4byte	.LVL1782
-	.4byte	.LVL1804
+	.4byte	.LVL1784
+	.4byte	.LVL1806
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -56
 	.4byte	0
 	.4byte	0
-.LLST402:
-	.4byte	.LVL1773
-	.4byte	.LVL1776
+.LLST404:
+	.4byte	.LVL1775
+	.4byte	.LVL1778
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1776
-	.4byte	.LVL1777
+	.4byte	.LVL1778
+	.4byte	.LVL1779
 	.2byte	0x3
 	.byte	0x73
 	.sleb128 1
 	.byte	0x9f
-	.4byte	.LVL1777
-	.4byte	.LVL1778-1
+	.4byte	.LVL1779
+	.4byte	.LVL1780-1
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1778
-	.4byte	.LVL1779
+	.4byte	.LVL1780
+	.4byte	.LVL1781
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.4byte	.LVL1780
-	.4byte	.LVL1793
+	.4byte	.LVL1782
+	.4byte	.LVL1795
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -60
-	.4byte	.LVL1794
-	.4byte	.LVL1795
+	.4byte	.LVL1796
+	.4byte	.LVL1797
 	.2byte	0x7
 	.byte	0x91
 	.sleb128 -60
@@ -52917,76 +53057,76 @@ __func__.9940:
 	.byte	0x9f
 	.4byte	0
 	.4byte	0
-.LLST403:
-	.4byte	.LVL1773
-	.4byte	.LVL1793
+.LLST405:
+	.4byte	.LVL1775
+	.4byte	.LVL1795
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
-	.4byte	.LVL1794
-	.4byte	.LVL1795
+	.4byte	.LVL1796
+	.4byte	.LVL1797
 	.2byte	0x3
 	.byte	0x91
 	.sleb128 -68
 	.4byte	0
 	.4byte	0
-.LLST404:
-	.4byte	.LVL1774
-	.4byte	.LVL1775
+.LLST406:
+	.4byte	.LVL1776
+	.4byte	.LVL1777
 	.2byte	0x1
 	.byte	0x52
-	.4byte	.LVL1775
 	.4byte	.LVL1777
+	.4byte	.LVL1779
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
 	.4byte	0
 	.4byte	0
-.LLST405:
-	.4byte	.LVL1769
-	.4byte	.LVL1804
+.LLST407:
+	.4byte	.LVL1771
+	.4byte	.LVL1806
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -52
 	.4byte	0
 	.4byte	0
-.LLST406:
-	.4byte	.LVL1783
-	.4byte	.LVL1784
+.LLST408:
+	.4byte	.LVL1785
+	.4byte	.LVL1786
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 12
-	.4byte	.LVL1784
-	.4byte	.LVL1785
+	.4byte	.LVL1786
+	.4byte	.LVL1787
 	.2byte	0x1
 	.byte	0x53
-	.4byte	.LVL1785
-	.4byte	.LVL1793
+	.4byte	.LVL1787
+	.4byte	.LVL1795
 	.2byte	0x2
 	.byte	0x91
 	.sleb128 -64
 	.4byte	0
 	.4byte	0
-.LLST407:
-	.4byte	.LVL1719
-	.4byte	.LVL1720
+.LLST409:
+	.4byte	.LVL1721
+	.4byte	.LVL1722
 	.2byte	0x1
 	.byte	0x50
-	.4byte	.LVL1732
-	.4byte	.LVL1733
+	.4byte	.LVL1734
+	.4byte	.LVL1735
 	.2byte	0x1
 	.byte	0x50
 	.4byte	0
 	.4byte	0
-.LLST447:
-	.4byte	.LVL2003
-	.4byte	.LVL2004
+.LLST449:
+	.4byte	.LVL2005
+	.4byte	.LVL2006
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_active_superblock
 	.byte	0x9f
-	.4byte	.LVL2004
-	.4byte	.LVL2010
+	.4byte	.LVL2006
+	.4byte	.LVL2012
 	.2byte	0x6
 	.byte	0x3
 	.4byte	g_buffer_superblock
@@ -52994,17 +53134,17 @@ __func__.9940:
 	.4byte	0
 	.4byte	0
 	.section	.debug_aranges,"",%progbits
-	.4byte	0x43c
+	.4byte	0x444
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x4
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.4byte	.LFB351
-	.4byte	.LFE351-.LFB351
-	.4byte	.LFB358
-	.4byte	.LFE358-.LFB358
+	.4byte	.LFB352
+	.4byte	.LFE352-.LFB352
+	.4byte	.LFB359
+	.4byte	.LFE359-.LFB359
 	.4byte	.LFB205
 	.4byte	.LFE205-.LFB205
 	.4byte	.LFB206
@@ -53113,22 +53253,24 @@ __func__.9940:
 	.4byte	.LFE340-.LFB340
 	.4byte	.LFB341
 	.4byte	.LFE341-.LFB341
-	.4byte	.LFB343
-	.4byte	.LFE343-.LFB343
+	.4byte	.LFB342
+	.4byte	.LFE342-.LFB342
+	.4byte	.LFB344
+	.4byte	.LFE344-.LFB344
 	.4byte	.LFB233
 	.4byte	.LFE233-.LFB233
 	.4byte	.LFB239
 	.4byte	.LFE239-.LFB239
-	.4byte	.LFB344
-	.4byte	.LFE344-.LFB344
 	.4byte	.LFB345
 	.4byte	.LFE345-.LFB345
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
 	.4byte	.LFB243
 	.4byte	.LFE243-.LFB243
 	.4byte	.LFB212
 	.4byte	.LFE212-.LFB212
-	.4byte	.LFB348
-	.4byte	.LFE348-.LFB348
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
 	.4byte	.LFB209
 	.4byte	.LFE209-.LFB209
 	.4byte	.LFB228
@@ -53179,12 +53321,12 @@ __func__.9940:
 	.4byte	.LFE312-.LFB312
 	.4byte	.LFB313
 	.4byte	.LFE313-.LFB313
-	.4byte	.LFB346
-	.4byte	.LFE346-.LFB346
 	.4byte	.LFB347
 	.4byte	.LFE347-.LFB347
-	.4byte	.LFB349
-	.4byte	.LFE349-.LFB349
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
 	.4byte	.LFB229
 	.4byte	.LFE229-.LFB229
 	.4byte	.LFB301
@@ -53265,128 +53407,128 @@ __func__.9940:
 	.4byte	.LFE213-.LFB213
 	.4byte	.LFB214
 	.4byte	.LFE214-.LFB214
-	.4byte	.LFB350
-	.4byte	.LFE350-.LFB350
+	.4byte	.LFB351
+	.4byte	.LFE351-.LFB351
 	.4byte	0
 	.4byte	0
 	.section	.debug_ranges,"",%progbits
 .Ldebug_ranges0:
-	.4byte	.LBB164
-	.4byte	.LBE164
-	.4byte	.LBB167
-	.4byte	.LBE167
+	.4byte	.LBB166
+	.4byte	.LBE166
+	.4byte	.LBB169
+	.4byte	.LBE169
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB168
-	.4byte	.LBE168
-	.4byte	.LBB171
-	.4byte	.LBE171
+	.4byte	.LBB170
+	.4byte	.LBE170
+	.4byte	.LBB173
+	.4byte	.LBE173
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB177
-	.4byte	.LBE177
-	.4byte	.LBB180
-	.4byte	.LBE180
+	.4byte	.LBB179
+	.4byte	.LBE179
+	.4byte	.LBB182
+	.4byte	.LBE182
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB183
-	.4byte	.LBE183
-	.4byte	.LBB186
-	.4byte	.LBE186
+	.4byte	.LBB185
+	.4byte	.LBE185
+	.4byte	.LBB188
+	.4byte	.LBE188
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB197
-	.4byte	.LBE197
-	.4byte	.LBB202
-	.4byte	.LBE202
-	.4byte	.LBB203
-	.4byte	.LBE203
+	.4byte	.LBB199
+	.4byte	.LBE199
 	.4byte	.LBB204
 	.4byte	.LBE204
+	.4byte	.LBB205
+	.4byte	.LBE205
+	.4byte	.LBB206
+	.4byte	.LBE206
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB219
-	.4byte	.LBE219
-	.4byte	.LBB220
-	.4byte	.LBE220
+	.4byte	.LBB223
+	.4byte	.LBE223
+	.4byte	.LBB224
+	.4byte	.LBE224
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB225
-	.4byte	.LBE225
-	.4byte	.LBB226
-	.4byte	.LBE226
+	.4byte	.LBB229
+	.4byte	.LBE229
+	.4byte	.LBB230
+	.4byte	.LBE230
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB233
-	.4byte	.LBE233
-	.4byte	.LBB235
-	.4byte	.LBE235
+	.4byte	.LBB237
+	.4byte	.LBE237
+	.4byte	.LBB239
+	.4byte	.LBE239
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB243
-	.4byte	.LBE243
-	.4byte	.LBB246
-	.4byte	.LBE246
+	.4byte	.LBB247
+	.4byte	.LBE247
+	.4byte	.LBB250
+	.4byte	.LBE250
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB249
-	.4byte	.LBE249
 	.4byte	.LBB253
 	.4byte	.LBE253
-	.4byte	.LBB254
-	.4byte	.LBE254
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB263
-	.4byte	.LBE263
-	.4byte	.LBB264
-	.4byte	.LBE264
+	.4byte	.LBB257
+	.4byte	.LBE257
+	.4byte	.LBB258
+	.4byte	.LBE258
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB266
-	.4byte	.LBE266
 	.4byte	.LBB267
 	.4byte	.LBE267
-	.4byte	0
-	.4byte	0
 	.4byte	.LBB268
 	.4byte	.LBE268
-	.4byte	.LBB269
-	.4byte	.LBE269
+	.4byte	0
+	.4byte	0
 	.4byte	.LBB270
 	.4byte	.LBE270
+	.4byte	.LBB271
+	.4byte	.LBE271
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB272
+	.4byte	.LBE272
+	.4byte	.LBB273
+	.4byte	.LBE273
+	.4byte	.LBB274
+	.4byte	.LBE274
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB291
+	.4byte	.LBE291
+	.4byte	.LBB297
+	.4byte	.LBE297
+	.4byte	.LBB298
+	.4byte	.LBE298
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB287
-	.4byte	.LBE287
 	.4byte	.LBB293
 	.4byte	.LBE293
 	.4byte	.LBB294
 	.4byte	.LBE294
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB289
-	.4byte	.LBE289
-	.4byte	.LBB290
-	.4byte	.LBE290
-	.4byte	0
-	.4byte	0
-	.4byte	.LBB296
-	.4byte	.LBE296
-	.4byte	.LBB297
-	.4byte	.LBE297
+	.4byte	.LBB300
+	.4byte	.LBE300
+	.4byte	.LBB301
+	.4byte	.LBE301
 	.4byte	0
 	.4byte	0
-	.4byte	.LBB303
-	.4byte	.LBE303
-	.4byte	.LBB304
-	.4byte	.LBE304
+	.4byte	.LBB307
+	.4byte	.LBE307
+	.4byte	.LBB308
+	.4byte	.LBE308
 	.4byte	0
 	.4byte	0
-	.4byte	.LFB351
-	.4byte	.LFE351
-	.4byte	.LFB358
-	.4byte	.LFE358
+	.4byte	.LFB352
+	.4byte	.LFE352
+	.4byte	.LFB359
+	.4byte	.LFE359
 	.4byte	.LFB205
 	.4byte	.LFE205
 	.4byte	.LFB206
@@ -53495,22 +53637,24 @@ __func__.9940:
 	.4byte	.LFE340
 	.4byte	.LFB341
 	.4byte	.LFE341
-	.4byte	.LFB343
-	.4byte	.LFE343
+	.4byte	.LFB342
+	.4byte	.LFE342
+	.4byte	.LFB344
+	.4byte	.LFE344
 	.4byte	.LFB233
 	.4byte	.LFE233
 	.4byte	.LFB239
 	.4byte	.LFE239
-	.4byte	.LFB344
-	.4byte	.LFE344
 	.4byte	.LFB345
 	.4byte	.LFE345
+	.4byte	.LFB346
+	.4byte	.LFE346
 	.4byte	.LFB243
 	.4byte	.LFE243
 	.4byte	.LFB212
 	.4byte	.LFE212
-	.4byte	.LFB348
-	.4byte	.LFE348
+	.4byte	.LFB349
+	.4byte	.LFE349
 	.4byte	.LFB209
 	.4byte	.LFE209
 	.4byte	.LFB228
@@ -53561,12 +53705,12 @@ __func__.9940:
 	.4byte	.LFE312
 	.4byte	.LFB313
 	.4byte	.LFE313
-	.4byte	.LFB346
-	.4byte	.LFE346
 	.4byte	.LFB347
 	.4byte	.LFE347
-	.4byte	.LFB349
-	.4byte	.LFE349
+	.4byte	.LFB348
+	.4byte	.LFE348
+	.4byte	.LFB350
+	.4byte	.LFE350
 	.4byte	.LFB229
 	.4byte	.LFE229
 	.4byte	.LFB301
@@ -53647,18 +53791,18 @@ __func__.9940:
 	.4byte	.LFE213
 	.4byte	.LFB214
 	.4byte	.LFE214
-	.4byte	.LFB350
-	.4byte	.LFE350
+	.4byte	.LFB351
+	.4byte	.LFE351
 	.4byte	0
 	.4byte	0
 	.section	.debug_line,"",%progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",%progbits,1
-.LASF727:
+.LASF728:
 	.ascii	"FtlEctTblFlush\000"
-.LASF590:
+.LASF593:
 	.ascii	"gc_page_num\000"
-.LASF606:
+.LASF609:
 	.ascii	"superBlk\000"
 .LASF499:
 	.ascii	"g_gc_bad_block_temp_num\000"
@@ -53672,9 +53816,9 @@ __func__.9940:
 	.ascii	"__func__\000"
 .LASF419:
 	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
-.LASF732:
+.LASF733:
 	.ascii	"nSec\000"
-.LASF728:
+.LASF729:
 	.ascii	"forceFlush\000"
 .LASF107:
 	.ascii	"bootm_headers\000"
@@ -53684,7 +53828,7 @@ __func__.9940:
 	.ascii	"rd_end\000"
 .LASF492:
 	.ascii	"p_gc_blk_tbl\000"
-.LASF787:
+.LASF788:
 	.ascii	"FtlFreeSysBlkQueueOut\000"
 .LASF324:
 	.ascii	"ftl_bbt_blk_header\000"
@@ -53692,33 +53836,33 @@ __func__.9940:
 	.ascii	"eth_device\000"
 .LASF306:
 	.ascii	"sign\000"
-.LASF832:
+.LASF833:
 	.ascii	"sctidx\000"
-.LASF669:
+.LASF670:
 	.ascii	"Ftl_load_ext_data\000"
 .LASF96:
 	.ascii	"ih_comp\000"
-.LASF608:
+.LASF587:
 	.ascii	"block\000"
 .LASF22:
 	.ascii	"_Bool\000"
-.LASF651:
+.LASF652:
 	.ascii	"min_ec\000"
-.LASF601:
+.LASF604:
 	.ascii	"req_read_temp\000"
 .LASF279:
 	.ascii	"p_spare\000"
-.LASF685:
+.LASF686:
 	.ascii	"recovery_cur_page_ver\000"
 .LASF506:
 	.ascii	"g_totle_write_page_count\000"
 .LASF245:
 	.ascii	"net_root_path\000"
-.LASF624:
+.LASF625:
 	.ascii	"lookup_ppa\000"
-.LASF817:
+.LASF818:
 	.ascii	"FtlBbmTblFlush\000"
-.LASF610:
+.LASF612:
 	.ascii	"Ftl_get_new_temp_ppa\000"
 .LASF327:
 	.ascii	"ftl_data_blk_header\000"
@@ -53732,9 +53876,9 @@ __func__.9940:
 	.ascii	"des_ppa\000"
 .LASF237:
 	.ascii	"priv\000"
-.LASF777:
+.LASF778:
 	.ascii	"insert_free_list\000"
-.LASF773:
+.LASF774:
 	.ascii	"pHead\000"
 .LASF21:
 	.ascii	"___strtok\000"
@@ -53742,23 +53886,23 @@ __func__.9940:
 	.ascii	"UCLASS_SPI_GENERIC\000"
 .LASF477:
 	.ascii	"g_l2p_last_update_region_id\000"
-.LASF698:
+.LASF699:
 	.ascii	"ftl_sb_update_avl_pages\000"
 .LASF572:
 	.ascii	"FlashProgPages\000"
-.LASF856:
+.LASF857:
 	.ascii	"test_page_num\000"
-.LASF684:
+.LASF685:
 	.ascii	"lookup_superblock_id\000"
 .LASF420:
 	.ascii	"c_ftl_nand_init_sys_blks_per_plane\000"
-.LASF865:
+.LASF866:
 	.ascii	"FtlConstantsInit\000"
-.LASF593:
+.LASF596:
 	.ascii	"num_io\000"
-.LASF868:
+.LASF869:
 	.ascii	"FtlPrintInfo\000"
-.LASF744:
+.LASF745:
 	.ascii	"l2p_flush\000"
 .LASF378:
 	.ascii	"rear\000"
@@ -53770,27 +53914,27 @@ __func__.9940:
 	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
 .LASF243:
 	.ascii	"net_nis_domain\000"
-.LASF764:
+.LASF765:
 	.ascii	"List_update_data_list\000"
-.LASF852:
+.LASF853:
 	.ascii	"create_first_buffer_superblock\000"
 .LASF503:
 	.ascii	"g_gc_merge_free_blk_threshold\000"
-.LASF693:
+.LASF694:
 	.ascii	"last_mlc_page_version\000"
-.LASF630:
+.LASF631:
 	.ascii	"IsBlkInGcList\000"
 .LASF235:
 	.ascii	"next\000"
 .LASF312:
 	.ascii	"pBlkVpcTbl\000"
-.LASF697:
+.LASF698:
 	.ascii	"FtlReUsePrevPpa\000"
-.LASF658:
+.LASF659:
 	.ascii	"update_multiplier_value\000"
 .LASF411:
 	.ascii	"c_ftl_nand_totle_phy_blks\000"
-.LASF874:
+.LASF875:
 	.ascii	"memcmp\000"
 .LASF421:
 	.ascii	"c_ftl_nand_max_sys_blks\000"
@@ -53806,13 +53950,13 @@ __func__.9940:
 	.ascii	"UCLASS_I2C_MUX\000"
 .LASF263:
 	.ascii	"uclass_id\000"
-.LASF598:
+.LASF601:
 	.ascii	"get_new_gc_superblock\000"
-.LASF622:
+.LASF623:
 	.ascii	"BOPS_EN\000"
 .LASF241:
 	.ascii	"net_netmask\000"
-.LASF849:
+.LASF850:
 	.ascii	"bad_block_cnt\000"
 .LASF424:
 	.ascii	"c_ftl_nand_max_data_blks\000"
@@ -53822,13 +53966,13 @@ __func__.9940:
 	.ascii	"fit_noffset_rd\000"
 .LASF192:
 	.ascii	"UCLASS_RTC\000"
-.LASF809:
+.LASF810:
 	.ascii	"pBbtHeader\000"
 .LASF46:
 	.ascii	"bi_memsize\000"
 .LASF47:
 	.ascii	"bi_flashstart\000"
-.LASF761:
+.LASF762:
 	.ascii	"minValidPageCount\000"
 .LASF232:
 	.ascii	"recv\000"
@@ -53852,7 +53996,7 @@ __func__.9940:
 	.ascii	"UCLASS_RKNAND\000"
 .LASF581:
 	.ascii	"die_index\000"
-.LASF804:
+.LASF805:
 	.ascii	"ver2\000"
 .LASF434:
 	.ascii	"gSysFreeQueue\000"
@@ -53866,6 +54010,8 @@ __func__.9940:
 	.ascii	"UCLASS_PCI_EMUL\000"
 .LASF72:
 	.ascii	"fdt_header\000"
+.LASF586:
+	.ascii	"ftl_free\000"
 .LASF429:
 	.ascii	"g_MaxLpn\000"
 .LASF342:
@@ -53878,15 +54024,15 @@ __func__.9940:
 	.ascii	"off_dt_struct\000"
 .LASF417:
 	.ascii	"c_ftl_nand_max_vendor_blks\000"
-.LASF768:
+.LASF769:
 	.ascii	"prev_valid_page_count\000"
-.LASF873:
+.LASF874:
 	.ascii	"FtlPrintInfo2buf\000"
 .LASF480:
 	.ascii	"p_data_block_list_head\000"
 .LASF265:
 	.ascii	"NETLOOP_CONTINUE\000"
-.LASF806:
+.LASF807:
 	.ascii	"P2V_plane\000"
 .LASF486:
 	.ascii	"g_gc_temp_superblock\000"
@@ -53896,7 +54042,7 @@ __func__.9940:
 	.ascii	"c_ftl_nand_max_map_blks\000"
 .LASF302:
 	.ascii	"BbtMap\000"
-.LASF743:
+.LASF744:
 	.ascii	"found_lpa\000"
 .LASF209:
 	.ascii	"UCLASS_VIDEO_CONSOLE\000"
@@ -53904,31 +54050,31 @@ __func__.9940:
 	.ascii	"last_refresh_read_count\000"
 .LASF207:
 	.ascii	"UCLASS_VIDEO\000"
-.LASF614:
+.LASF616:
 	.ascii	"current_ppa\000"
-.LASF851:
+.LASF852:
 	.ascii	"create_first_active_superblock\000"
 .LASF313:
 	.ascii	"pMapPpnTbl\000"
 .LASF269:
 	.ascii	"net_state\000"
-.LASF724:
+.LASF725:
 	.ascii	"num_page\000"
 .LASF425:
 	.ascii	"ftl_gc_temp_power_lost_recovery_flag\000"
-.LASF613:
+.LASF615:
 	.ascii	"totle_num\000"
-.LASF731:
+.LASF732:
 	.ascii	"Index\000"
-.LASF681:
+.LASF682:
 	.ascii	"next_free_active_page\000"
-.LASF604:
+.LASF607:
 	.ascii	"spperBlk\000"
 .LASF65:
 	.ascii	"IRQ_STACK_START\000"
 .LASF132:
 	.ascii	"verify\000"
-.LASF713:
+.LASF714:
 	.ascii	"ftl_set_blk_mode\000"
 .LASF266:
 	.ascii	"NETLOOP_RESTART\000"
@@ -53936,11 +54082,11 @@ __func__.9940:
 	.ascii	"uint8\000"
 .LASF353:
 	.ascii	"write_page_count\000"
-.LASF609:
+.LASF611:
 	.ascii	"Ftl_gc_temp_data_write_back\000"
 .LASF295:
 	.ascii	"erase_blk\000"
-.LASF722:
+.LASF723:
 	.ascii	"re_save_vpndata\000"
 .LASF463:
 	.ascii	"p_valid_page_count_check_table\000"
@@ -53950,13 +54096,13 @@ __func__.9940:
 	.ascii	"g_num_free_superblocks\000"
 .LASF226:
 	.ascii	"s_addr\000"
-.LASF819:
+.LASF820:
 	.ascii	"re_save_bbmdata\000"
 .LASF200:
 	.ascii	"UCLASS_SYSRESET\000"
-.LASF627:
+.LASF628:
 	.ascii	"FtlGcUpdatePage\000"
-.LASF811:
+.LASF812:
 	.ascii	"FtlLoadFactoryBbt\000"
 .LASF289:
 	.ascii	"sec_per_blk\000"
@@ -53970,11 +54116,11 @@ __func__.9940:
 	.ascii	"UCLASS_CROS_EC\000"
 .LASF407:
 	.ascii	"c_ftl_nand_sec_pre_page_shift\000"
-.LASF788:
+.LASF789:
 	.ascii	"IsInFreeQueue\000"
 .LASF236:
 	.ascii	"index\000"
-.LASF745:
+.LASF746:
 	.ascii	"select_l2p_ram_region\000"
 .LASF335:
 	.ascii	"maxDieNum\000"
@@ -53988,17 +54134,17 @@ __func__.9940:
 	.ascii	"block_size\000"
 .LASF90:
 	.ascii	"ih_load\000"
-.LASF835:
+.LASF836:
 	.ascii	"FtlProgPages\000"
-.LASF664:
+.LASF665:
 	.ascii	"error_flag\000"
 .LASF403:
 	.ascii	"c_ftl_nand_page_pre_blk\000"
-.LASF794:
+.LASF795:
 	.ascii	"blk_Id\000"
 .LASF213:
 	.ascii	"UCLASS_KEY\000"
-.LASF875:
+.LASF876:
 	.ascii	"memcpy\000"
 .LASF67:
 	.ascii	"_datarel_start_ofs\000"
@@ -54020,7 +54166,7 @@ __func__.9940:
 	.ascii	"g_gc_page_offset\000"
 .LASF240:
 	.ascii	"net_gateway\000"
-.LASF802:
+.LASF803:
 	.ascii	"ftl_cmp_data_ver\000"
 .LASF430:
 	.ascii	"g_VaildLpn\000"
@@ -54032,39 +54178,39 @@ __func__.9940:
 	.ascii	"type\000"
 .LASF40:
 	.ascii	"lmb_region\000"
-.LASF632:
+.LASF633:
 	.ascii	"numREQ\000"
 .LASF34:
 	.ascii	"protect\000"
-.LASF855:
+.LASF856:
 	.ascii	"max_test_page_num\000"
-.LASF704:
+.LASF705:
 	.ascii	"blk_id\000"
 .LASF349:
 	.ascii	"GlobalDataVersion\000"
-.LASF793:
+.LASF794:
 	.ascii	"erase_flag\000"
 .LASF362:
 	.ascii	"last_refresh_data_times\000"
-.LASF707:
+.LASF708:
 	.ascii	"totleBlkNum\000"
-.LASF678:
+.LASF679:
 	.ascii	"saved_active_page\000"
-.LASF776:
+.LASF777:
 	.ascii	"pTmp\000"
-.LASF602:
+.LASF605:
 	.ascii	"add_count\000"
 .LASF547:
 	.ascii	"ftl_gc_temp_block_bops_scan_page_addr\000"
 .LASF394:
 	.ascii	"c_ftl_nand_type\000"
-.LASF687:
+.LASF688:
 	.ascii	"recovery_flash_mode\000"
 .LASF138:
 	.ascii	"UCLASS_TEST\000"
 .LASF485:
 	.ascii	"g_buffer_superblock\000"
-.LASF649:
+.LASF650:
 	.ascii	"node_id\000"
 .LASF397:
 	.ascii	"c_ftl_nand_blks_per_die\000"
@@ -54086,9 +54232,9 @@ __func__.9940:
 	.ascii	"sector_count\000"
 .LASF406:
 	.ascii	"c_ftl_nand_sec_pre_page\000"
-.LASF588:
+.LASF591:
 	.ascii	"mode\000"
-.LASF813:
+.LASF814:
 	.ascii	"FtlLoadBbt\000"
 .LASF561:
 	.ascii	"pvForm\000"
@@ -54096,9 +54242,9 @@ __func__.9940:
 	.ascii	"padding\000"
 .LASF460:
 	.ascii	"p_swl_mul_table\000"
-.LASF628:
+.LASF629:
 	.ascii	"src_ppa\000"
-.LASF682:
+.LASF683:
 	.ascii	"detected_active_page\000"
 .LASF389:
 	.ascii	"ftl_gc_page_item\000"
@@ -54110,61 +54256,61 @@ __func__.9940:
 	.ascii	"bi_ethspeed\000"
 .LASF98:
 	.ascii	"image_header_t\000"
-.LASF770:
+.LASF771:
 	.ascii	"pPrev\000"
 .LASF474:
 	.ascii	"g_totle_vendor_block\000"
-.LASF623:
+.LASF624:
 	.ascii	"superblock_id\000"
-.LASF592:
+.LASF595:
 	.ascii	"plane\000"
 .LASF11:
 	.ascii	"phys_addr_t\000"
 .LASF95:
 	.ascii	"ih_type\000"
-.LASF845:
+.LASF846:
 	.ascii	"sftl_init\000"
 .LASF1:
 	.ascii	"unsigned char\000"
-.LASF611:
+.LASF613:
 	.ascii	"FtlGcScanTempBlk\000"
 .LASF109:
 	.ascii	"legacy_hdr_os_copy\000"
-.LASF760:
+.LASF761:
 	.ascii	"vpcTbl\000"
 .LASF176:
 	.ascii	"UCLASS_PANEL_BACKLIGHT\000"
 .LASF339:
 	.ascii	"activeSuperblockId\000"
-.LASF803:
+.LASF804:
 	.ascii	"ver1\000"
 .LASF280:
 	.ascii	"nand_phy_info\000"
-.LASF759:
+.LASF760:
 	.ascii	"ftl_free_no_use_map_blk\000"
-.LASF805:
+.LASF806:
 	.ascii	"P2V_block_in_plane\000"
 .LASF556:
 	.ascii	"str1\000"
 .LASF557:
 	.ascii	"str2\000"
-.LASF718:
+.LASF719:
 	.ascii	"pMapHeader\000"
 .LASF140:
 	.ascii	"UCLASS_TEST_BUS\000"
-.LASF716:
+.LASF717:
 	.ascii	"FtlScanSysBlk\000"
 .LASF52:
 	.ascii	"bi_arm_freq\000"
-.LASF695:
+.LASF696:
 	.ascii	"lookup_ppa_ver\000"
-.LASF752:
+.LASF753:
 	.ascii	"region_num\000"
 .LASF476:
 	.ascii	"p_l2p_map_buf\000"
 .LASF488:
 	.ascii	"gp_last_act_superblock\000"
-.LASF870:
+.LASF871:
 	.ascii	"Ftl_log2\000"
 .LASF448:
 	.ascii	"p_sys_spare_buf\000"
@@ -54172,7 +54318,7 @@ __func__.9940:
 	.ascii	"UCLASS_LED\000"
 .LASF552:
 	.ascii	"p_current\000"
-.LASF646:
+.LASF647:
 	.ascii	"get_new_id\000"
 .LASF253:
 	.ascii	"net_rx_packet_len\000"
@@ -54180,11 +54326,11 @@ __func__.9940:
 	.ascii	"net_null_ethaddr\000"
 .LASF543:
 	.ascii	"g_ect_tbl_power_up_flush\000"
-.LASF594:
+.LASF597:
 	.ascii	"physical_block\000"
 .LASF32:
 	.ascii	"flash_id\000"
-.LASF838:
+.LASF839:
 	.ascii	"absolute_sector\000"
 .LASF222:
 	.ascii	"load_addr\000"
@@ -54192,31 +54338,33 @@ __func__.9940:
 	.ascii	"PowerLostTimes\000"
 .LASF501:
 	.ascii	"g_gc_bad_block_temp_tbl\000"
+.LASF886:
+	.ascii	"kfree\000"
 .LASF464:
 	.ascii	"p_blk_mode_table\000"
-.LASF775:
+.LASF776:
 	.ascii	"List_remove_node\000"
 .LASF291:
 	.ascii	"reserved_blk\000"
-.LASF733:
+.LASF734:
 	.ascii	"pBuf\000"
-.LASF791:
+.LASF792:
 	.ascii	"tmp_ec\000"
 .LASF484:
 	.ascii	"g_active_superblock\000"
-.LASF689:
+.LASF690:
 	.ascii	"recovery_super_page\000"
 .LASF437:
 	.ascii	"req_sys\000"
 .LASF381:
 	.ascii	"available_pages\000"
-.LASF799:
+.LASF800:
 	.ascii	"high\000"
-.LASF833:
+.LASF834:
 	.ascii	"nscts\000"
 .LASF410:
 	.ascii	"c_ftl_nand_reserved_blks\000"
-.LASF700:
+.LASF701:
 	.ascii	"FtlL2PDataInit\000"
 .LASF230:
 	.ascii	"init\000"
@@ -54226,9 +54374,9 @@ __func__.9940:
 	.ascii	"check\000"
 .LASF145:
 	.ascii	"UCLASS_USB_EMUL\000"
-.LASF797:
+.LASF798:
 	.ascii	"FtlFreeSysBlkQueueInit\000"
-.LASF677:
+.LASF678:
 	.ascii	"FtlRecoverySuperblock\000"
 .LASF396:
 	.ascii	"c_ftl_nand_planes_per_die\000"
@@ -54238,17 +54386,17 @@ __func__.9940:
 	.ascii	"ecc_bits\000"
 .LASF293:
 	.ascii	"nand_ops\000"
-.LASF599:
+.LASF602:
 	.ascii	"tmp_blk\000"
 .LASF523:
 	.ascii	"g_gc_head_data_block\000"
-.LASF828:
+.LASF829:
 	.ascii	"FtlWrite\000"
 .LASF182:
 	.ascii	"UCLASS_PINCTRL\000"
-.LASF831:
+.LASF832:
 	.ascii	"num_lpa\000"
-.LASF867:
+.LASF868:
 	.ascii	"blkNum\000"
 .LASF364:
 	.ascii	"SlcPartLbaEndSector\000"
@@ -54264,11 +54412,11 @@ __func__.9940:
 	.ascii	"image_len\000"
 .LASF441:
 	.ascii	"req_gc\000"
-.LASF854:
+.LASF855:
 	.ascii	"is_sys_blk\000"
 .LASF42:
 	.ascii	"memory\000"
-.LASF821:
+.LASF822:
 	.ascii	"bitmap\000"
 .LASF319:
 	.ascii	"ftl_ect_tbl_info\000"
@@ -54276,41 +54424,41 @@ __func__.9940:
 	.ascii	"UCLASS_USB_DEV_GENERIC\000"
 .LASF212:
 	.ascii	"UCLASS_FG\000"
-.LASF755:
+.LASF756:
 	.ascii	"lastMapBlk\000"
 .LASF370:
 	.ascii	"totle_write_sector\000"
 .LASF522:
 	.ascii	"g_ftl_nand_free_count\000"
-.LASF626:
+.LASF627:
 	.ascii	"p_gc_page\000"
 .LASF20:
 	.ascii	"errno\000"
 .LASF532:
 	.ascii	"gNandPhyInfo\000"
-.LASF861:
+.LASF862:
 	.ascii	"ven_blk\000"
 .LASF30:
 	.ascii	"size\000"
 .LASF244:
 	.ascii	"net_hostname\000"
-.LASF772:
+.LASF773:
 	.ascii	"List_pop_head_node\000"
 .LASF308:
 	.ascii	"BlkNum\000"
-.LASF850:
+.LASF851:
 	.ascii	"sys_bad_block_cnt\000"
-.LASF596:
+.LASF599:
 	.ascii	"p_dataHeader\000"
-.LASF780:
+.LASF781:
 	.ascii	"tmp_id\000"
-.LASF600:
+.LASF603:
 	.ascii	"FtlReadRefresh\000"
-.LASF645:
+.LASF646:
 	.ascii	"free_blk_index\000"
-.LASF820:
+.LASF821:
 	.ascii	"FtlBbt2Bitmap\000"
-.LASF662:
+.LASF663:
 	.ascii	"ftl_check_vpc\000"
 .LASF108:
 	.ascii	"legacy_hdr_os\000"
@@ -54348,13 +54496,13 @@ __func__.9940:
 	.ascii	"gcTempSuperblockId\000"
 .LASF238:
 	.ascii	"eth_current\000"
-.LASF766:
+.LASF767:
 	.ascii	"node_valid_page_count\000"
 .LASF53:
 	.ascii	"bi_dsp_freq\000"
 .LASF4:
 	.ascii	"uchar\000"
-.LASF668:
+.LASF669:
 	.ascii	"pages\000"
 .LASF89:
 	.ascii	"ih_size\000"
@@ -54362,13 +54510,13 @@ __func__.9940:
 	.ascii	"addr\000"
 .LASF142:
 	.ascii	"UCLASS_SPI_EMUL\000"
-.LASF863:
+.LASF864:
 	.ascii	"FtlMemInit\000"
-.LASF818:
+.LASF819:
 	.ascii	"write_count\000"
-.LASF663:
+.LASF664:
 	.ascii	"prev_ppa\000"
-.LASF586:
+.LASF589:
 	.ascii	"FlashTestBlk\000"
 .LASF179:
 	.ascii	"UCLASS_PCI_GENERIC\000"
@@ -54376,15 +54524,13 @@ __func__.9940:
 	.ascii	"bi_sramstart\000"
 .LASF66:
 	.ascii	"FIQ_STACK_START\000"
-.LASF882:
-	.ascii	"/home/ldq/rk-linux/u-boot-test\000"
-.LASF872:
+.LASF873:
 	.ascii	"rknand_proc_ftlread\000"
 .LASF228:
 	.ascii	"enetaddr\000"
-.LASF881:
-	.ascii	"drivers/rkflash/rk_sftl.c\000"
-.LASF741:
+.LASF181:
+	.ascii	"UCLASS_PINCONFIG\000"
+.LASF742:
 	.ascii	"l2p_region_id\000"
 .LASF554:
 	.ascii	"check_buf\000"
@@ -54400,7 +54546,7 @@ __func__.9940:
 	.ascii	"slc_erase_count\000"
 .LASF60:
 	.ascii	"bi_busfreq\000"
-.LASF769:
+.LASF770:
 	.ascii	"prev_multiplier_value\000"
 .LASF497:
 	.ascii	"g_gc_next_blk\000"
@@ -54410,15 +54556,15 @@ __func__.9940:
 	.ascii	"UCLASS_BLK\000"
 .LASF546:
 	.ascii	"gc_discard_updated\000"
-.LASF737:
+.LASF738:
 	.ascii	"FtlVendorPartWrite\000"
-.LASF621:
+.LASF622:
 	.ascii	"FtlGcFreeTempBlock\000"
 .LASF248:
 	.ascii	"net_ip\000"
 .LASF229:
 	.ascii	"iobase\000"
-.LASF657:
+.LASF658:
 	.ascii	"GetFreeBlockMinEraseCount\000"
 .LASF336:
 	.ascii	"activeFlashMode\000"
@@ -54426,13 +54572,13 @@ __func__.9940:
 	.ascii	"ih_dcrc\000"
 .LASF35:
 	.ascii	"flash_info_t\000"
-.LASF655:
+.LASF656:
 	.ascii	"GetFreeBlockMaxEraseCount\000"
-.LASF711:
+.LASF712:
 	.ascii	"sblk\000"
-.LASF754:
+.LASF755:
 	.ascii	"ftl_map_blk_gc\000"
-.LASF877:
+.LASF878:
 	.ascii	"printf\000"
 .LASF59:
 	.ascii	"bi_intfreq\000"
@@ -54456,23 +54602,23 @@ __func__.9940:
 	.ascii	"TotleReadBufferMatchCount\000"
 .LASF438:
 	.ascii	"req_read\000"
-.LASF751:
+.LASF752:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
 .LASF466:
 	.ascii	"p_map_block_valid_page_count\000"
 .LASF167:
 	.ascii	"UCLASS_MAILBOX\000"
-.LASF792:
+.LASF793:
 	.ascii	"FtlFreeSysBlkQueueIn\000"
 .LASF366:
 	.ascii	"readErrorCount\000"
-.LASF585:
+.LASF588:
 	.ascii	"sftl_gc\000"
-.LASF796:
+.LASF797:
 	.ascii	"FtlFreeSysBlkQueueEmpty\000"
-.LASF762:
+.LASF763:
 	.ascii	"load_l2p_region\000"
-.LASF639:
+.LASF640:
 	.ascii	"p_superblock\000"
 .LASF301:
 	.ascii	"fBbtBlk\000"
@@ -54480,7 +54626,7 @@ __func__.9940:
 	.ascii	"off_mem_rsvmap\000"
 .LASF445:
 	.ascii	"p_sys_data_buf\000"
-.LASF883:
+.LASF885:
 	.ascii	"l2p_addr_tran\000"
 .LASF164:
 	.ascii	"UCLASS_KEYBOARD\000"
@@ -54488,19 +54634,19 @@ __func__.9940:
 	.ascii	"page_per_slc_blk\000"
 .LASF398:
 	.ascii	"c_ftl_nand_blks_per_die_shift\000"
-.LASF738:
+.LASF739:
 	.ascii	"log2phys\000"
 .LASF478:
 	.ascii	"p_data_block_list_table\000"
 .LASF171:
 	.ascii	"UCLASS_MOD_EXP\000"
-.LASF644:
+.LASF645:
 	.ascii	"num_bad_block\000"
 .LASF85:
 	.ascii	"image_header\000"
-.LASF701:
+.LASF702:
 	.ascii	"FtlLoadVonderInfo\000"
-.LASF612:
+.LASF614:
 	.ascii	"pSuperblock\000"
 .LASF535:
 	.ascii	"ftl_temp_buf\000"
@@ -54512,7 +54658,7 @@ __func__.9940:
 	.ascii	"last_comp_version\000"
 .LASF415:
 	.ascii	"c_ftl_nand_map_blks_per_plane\000"
-.LASF810:
+.LASF811:
 	.ascii	"re_try_next_blk\000"
 .LASF56:
 	.ascii	"bi_ip_addr\000"
@@ -54524,23 +54670,23 @@ __func__.9940:
 	.ascii	"g_gc_cur_blk_max_valid_pages\000"
 .LASF16:
 	.ascii	"ushort\000"
-.LASF763:
+.LASF764:
 	.ascii	"phyAddr\000"
 .LASF73:
 	.ascii	"magic\000"
-.LASF790:
+.LASF791:
 	.ascii	"tmp_blk_id\000"
-.LASF876:
+.LASF877:
 	.ascii	"memset\000"
 .LASF242:
 	.ascii	"net_dns_server\000"
 .LASF562:
 	.ascii	"ftl_memset\000"
-.LASF830:
+.LASF831:
 	.ascii	"end_lpa\000"
-.LASF735:
+.LASF736:
 	.ascii	"result\000"
-.LASF625:
+.LASF626:
 	.ascii	"scan_page_num\000"
 .LASF267:
 	.ascii	"NETLOOP_SUCCESS\000"
@@ -54548,9 +54694,9 @@ __func__.9940:
 	.ascii	"name\000"
 .LASF512:
 	.ascii	"g_totle_cache_write_count\000"
-.LASF767:
+.LASF768:
 	.ascii	"node_multiplier_value\000"
-.LASF758:
+.LASF759:
 	.ascii	"blk_index\000"
 .LASF69:
 	.ascii	"_datarellocal_start_ofs\000"
@@ -54562,17 +54708,17 @@ __func__.9940:
 	.ascii	"fit_hdr_setup\000"
 .LASF150:
 	.ascii	"UCLASS_CLK\000"
-.LASF686:
+.LASF687:
 	.ascii	"detected_error_page\000"
 .LASF129:
 	.ascii	"initrd_end\000"
-.LASF618:
+.LASF620:
 	.ascii	"read_super_page\000"
 .LASF219:
 	.ascii	"monitor_flash_len\000"
-.LASF620:
+.LASF621:
 	.ascii	"FtlGcPageVarInit\000"
-.LASF822:
+.LASF823:
 	.ascii	"FtlBbtInfoPrint\000"
 .LASF530:
 	.ascii	"c_mlc_erase_count_value\000"
@@ -54580,13 +54726,13 @@ __func__.9940:
 	.ascii	"mem_malloc_brk\000"
 .LASF483:
 	.ascii	"g_num_data_superblocks\000"
-.LASF753:
+.LASF754:
 	.ascii	"blkTbl\000"
 .LASF348:
 	.ascii	"mlc_erase_count\000"
 .LASF12:
 	.ascii	"phys_size_t\000"
-.LASF715:
+.LASF716:
 	.ascii	"FtlLoadEctTbl\000"
 .LASF62:
 	.ascii	"bi_boot_params\000"
@@ -54594,11 +54740,11 @@ __func__.9940:
 	.ascii	"UCLASS_RC\000"
 .LASF51:
 	.ascii	"bi_sramsize\000"
-.LASF879:
+.LASF881:
 	.ascii	"sprintf\000"
-.LASF605:
+.LASF608:
 	.ascii	"FtlGcMarkBadPhyBlk\000"
-.LASF641:
+.LASF642:
 	.ascii	"allocate_new_data_superblock\000"
 .LASF13:
 	.ascii	"sizetype\000"
@@ -54610,9 +54756,9 @@ __func__.9940:
 	.ascii	"GlobalSysVersion\000"
 .LASF329:
 	.ascii	"ftl_map_blk_header\000"
-.LASF597:
+.LASF600:
 	.ascii	"gc_next_superblock\000"
-.LASF812:
+.LASF813:
 	.ascii	"blkAddr\000"
 .LASF193:
 	.ascii	"UCLASS_SCSI\000"
@@ -54622,15 +54768,15 @@ __func__.9940:
 	.ascii	"signed char\000"
 .LASF250:
 	.ascii	"net_tx_packet\000"
-.LASF696:
+.LASF697:
 	.ascii	"current_ppa_ver\000"
-.LASF784:
+.LASF785:
 	.ascii	"tmp_multiplier_value\000"
 .LASF566:
 	.ascii	"FlashEraseBlocks\000"
 .LASF33:
 	.ascii	"start\000"
-.LASF829:
+.LASF830:
 	.ascii	"start_lpa\000"
 .LASF553:
 	.ascii	"current\000"
@@ -54654,31 +54800,31 @@ __func__.9940:
 	.ascii	"TotleReadBufferCount3\000"
 .LASF455:
 	.ascii	"c_gc_page_buf_num\000"
-.LASF719:
+.LASF720:
 	.ascii	"FtlVpcTblFlush\000"
 .LASF189:
 	.ascii	"UCLASS_REMOTEPROC\000"
-.LASF742:
+.LASF743:
 	.ascii	"lpn_index\000"
 .LASF118:
 	.ascii	"fit_hdr_fdt\000"
-.LASF631:
+.LASF632:
 	.ascii	"FtlGcBufAlloc\000"
 .LASF569:
 	.ascii	"num_req\000"
-.LASF778:
+.LASF779:
 	.ascii	"node_erase_count\000"
 .LASF254:
 	.ascii	"net_bcast_ethaddr\000"
-.LASF736:
+.LASF737:
 	.ascii	"ppn_index\000"
-.LASF795:
+.LASF796:
 	.ascii	"FtlFreeSysBlkQueueFull\000"
 .LASF133:
 	.ascii	"state\000"
 .LASF48:
 	.ascii	"bi_flashsize\000"
-.LASF746:
+.LASF747:
 	.ascii	"target_region\000"
 .LASF19:
 	.ascii	"__be32\000"
@@ -54688,7 +54834,7 @@ __func__.9940:
 	.ascii	"c_ftl_vendor_part_size\000"
 .LASF251:
 	.ascii	"net_rx_packets\000"
-.LASF826:
+.LASF827:
 	.ascii	"sftl_read\000"
 .LASF452:
 	.ascii	"p_gc_spare_buf\000"
@@ -54704,15 +54850,15 @@ __func__.9940:
 	.ascii	"p_io_data_buf_1\000"
 .LASF68:
 	.ascii	"_datarelrolocal_start_ofs\000"
-.LASF683:
+.LASF684:
 	.ascii	"mlc_detected_active_page\000"
-.LASF853:
+.LASF854:
 	.ascii	"FtlLowFormatEraseBlock\000"
 .LASF317:
 	.ascii	"region_id\000"
 .LASF326:
 	.ascii	"sysBlksPerPlane\000"
-.LASF816:
+.LASF817:
 	.ascii	"FtlBbtMemInit\000"
 .LASF309:
 	.ascii	"maxBlkNum\000"
@@ -54720,7 +54866,7 @@ __func__.9940:
 	.ascii	"c_ftl_nand_die_num\000"
 .LASF286:
 	.ascii	"page_per_blk\000"
-.LASF721:
+.LASF722:
 	.ascii	"prog_error_count\000"
 .LASF372:
 	.ascii	"progErrorCount\000"
@@ -54730,7 +54876,7 @@ __func__.9940:
 	.ascii	"g_gc_cur_blk_valid_pages\000"
 .LASF233:
 	.ascii	"halt\000"
-.LASF653:
+.LASF654:
 	.ascii	"maxFreeBlockEraseCount\000"
 .LASF86:
 	.ascii	"ih_magic\000"
@@ -54738,7 +54884,7 @@ __func__.9940:
 	.ascii	"block_in_die\000"
 .LASF457:
 	.ascii	"gp_ect_tbl_info\000"
-.LASF654:
+.LASF655:
 	.ascii	"minDataBlockEraseCount\000"
 .LASF17:
 	.ascii	"ulong\000"
@@ -54750,25 +54896,25 @@ __func__.9940:
 	.ascii	"__u32\000"
 .LASF249:
 	.ascii	"net_server_ip\000"
-.LASF785:
+.LASF786:
 	.ascii	"INSERT_DATA_LIST\000"
 .LASF206:
 	.ascii	"UCLASS_USB_HUB\000"
-.LASF825:
+.LASF826:
 	.ascii	"sftl_write\000"
 .LASF444:
 	.ascii	"p_plane_order_table\000"
-.LASF781:
+.LASF782:
 	.ascii	"insert_data_list\000"
 .LASF70:
 	.ascii	"_datarelro_start_ofs\000"
-.LASF617:
+.LASF619:
 	.ascii	"ReInit\000"
 .LASF172:
 	.ascii	"UCLASS_MTD\000"
 .LASF134:
 	.ascii	"bootm_headers_t\000"
-.LASF729:
+.LASF730:
 	.ascii	"ec_mod_count\000"
 .LASF565:
 	.ascii	"spare\000"
@@ -54776,11 +54922,13 @@ __func__.9940:
 	.ascii	"g_recovery_page_num\000"
 .LASF15:
 	.ascii	"long int\000"
-.LASF667:
+.LASF668:
 	.ascii	"req_temp\000"
 .LASF141:
 	.ascii	"UCLASS_TEST_PROBE\000"
-.LASF659:
+.LASF883:
+	.ascii	"drivers/rkflash/rksftl/rk_sftl.c\000"
+.LASF660:
 	.ascii	"FtlSysBlkInit\000"
 .LASF524:
 	.ascii	"g_gc_head_data_block_count\000"
@@ -54796,9 +54944,9 @@ __func__.9940:
 	.ascii	"g_GlobalSysVersion\000"
 .LASF511:
 	.ascii	"g_tmp_data_superblock_id\000"
-.LASF871:
+.LASF872:
 	.ascii	"limit\000"
-.LASF660:
+.LASF661:
 	.ascii	"ftl_scan_all_data\000"
 .LASF331:
 	.ascii	"ftl_sys_blk_header\000"
@@ -54806,43 +54954,43 @@ __func__.9940:
 	.ascii	"flag\000"
 .LASF470:
 	.ascii	"p_vendor_block_table\000"
-.LASF679:
+.LASF680:
 	.ascii	"saved_active_plane\000"
-.LASF747:
+.LASF748:
 	.ascii	"hit_count\000"
-.LASF714:
+.LASF715:
 	.ascii	"FtlGcReFreshBadBlk\000"
 .LASF380:
 	.ascii	"current_page\000"
 .LASF201:
 	.ascii	"UCLASS_THERMAL\000"
-.LASF814:
+.LASF815:
 	.ascii	"FtlBbtCalcTotleCnt\000"
-.LASF786:
+.LASF787:
 	.ascii	"INSERT_FREE_LIST\000"
 .LASF563:
 	.ascii	"FlashGetBadBlockList\000"
-.LASF694:
+.LASF695:
 	.ascii	"prev_ppa_ver\000"
 .LASF246:
 	.ascii	"net_ethaddr\000"
 .LASF225:
 	.ascii	"in_addr\000"
-.LASF844:
+.LASF845:
 	.ascii	"FtlSysFlush\000"
 .LASF99:
 	.ascii	"image_info\000"
 .LASF88:
 	.ascii	"ih_time\000"
-.LASF607:
+.LASF610:
 	.ascii	"FtlGcRefreshBlock\000"
 .LASF334:
 	.ascii	"ftl_sys_save_info\000"
-.LASF771:
+.LASF772:
 	.ascii	"List_get_gc_head_node\000"
 .LASF399:
 	.ascii	"c_ftl_nand_planes_num\000"
-.LASF808:
+.LASF809:
 	.ascii	"FtlMakeBbt\000"
 .LASF37:
 	.ascii	"long double\000"
@@ -54854,13 +55002,13 @@ __func__.9940:
 	.ascii	"size_dt_strings\000"
 .LASF271:
 	.ascii	"uint16\000"
-.LASF603:
+.LASF606:
 	.ascii	"FtlGcFreeBadSuperBlk\000"
 .LASF106:
 	.ascii	"image_info_t\000"
-.LASF703:
+.LASF704:
 	.ascii	"pMapBlockInfo\000"
-.LASF616:
+.LASF618:
 	.ascii	"error_phy_page\000"
 .LASF2:
 	.ascii	"long unsigned int\000"
@@ -54880,15 +55028,15 @@ __func__.9940:
 	.ascii	"net_server_ethaddr\000"
 .LASF208:
 	.ascii	"UCLASS_VIDEO_BRIDGE\000"
-.LASF691:
+.LASF692:
 	.ascii	"function_exit\000"
 .LASF135:
 	.ascii	"images\000"
 .LASF525:
 	.ascii	"g_gc_skip_write_count\000"
-.LASF619:
+.LASF585:
 	.ascii	"rknand_print_hex\000"
-.LASF635:
+.LASF636:
 	.ascii	"FtlGcBufInit\000"
 .LASF446:
 	.ascii	"p_sys_data_buf_1\000"
@@ -54900,9 +55048,9 @@ __func__.9940:
 	.ascii	"fit_uname_os\000"
 .LASF500:
 	.ascii	"g_gc_bad_block_gc_index\000"
-.LASF692:
+.LASF693:
 	.ascii	"last_page_version\000"
-.LASF801:
+.LASF802:
 	.ascii	"pagePreBlk\000"
 .LASF281:
 	.ascii	"nand_type\000"
@@ -54918,7 +55066,7 @@ __func__.9940:
 	.ascii	"table\000"
 .LASF299:
 	.ascii	"page\000"
-.LASF642:
+.LASF643:
 	.ascii	"allocate_data_superblock\000"
 .LASF316:
 	.ascii	"ftl_l2p_ram_map_info\000"
@@ -54928,17 +55076,17 @@ __func__.9940:
 	.ascii	"net_loop_state\000"
 .LASF433:
 	.ascii	"gSysInfo\000"
-.LASF629:
+.LASF630:
 	.ascii	"prev_superblock_id\000"
 .LASF196:
 	.ascii	"UCLASS_SPMI\000"
-.LASF756:
+.LASF757:
 	.ascii	"minValidPageIndex\000"
-.LASF841:
+.LASF842:
 	.ascii	"last_lpa_nscts\000"
 .LASF194:
 	.ascii	"UCLASS_SERIAL\000"
-.LASF709:
+.LASF710:
 	.ascii	"FtlLoadSysInfo\000"
 .LASF440:
 	.ascii	"req_erase\000"
@@ -54950,25 +55098,25 @@ __func__.9940:
 	.ascii	"UCLASS_PHY\000"
 .LASF54:
 	.ascii	"bi_ddr_freq\000"
-.LASF858:
+.LASF859:
 	.ascii	"test_mode\000"
-.LASF827:
+.LASF828:
 	.ascii	"FtlDiscard\000"
-.LASF670:
+.LASF671:
 	.ascii	"FtlGcPageRecovery\000"
 .LASF105:
 	.ascii	"arch\000"
 .LASF510:
 	.ascii	"g_totle_read_page_count\000"
-.LASF710:
+.LASF711:
 	.ascii	"ftl_get_blk_mode\000"
-.LASF740:
+.LASF741:
 	.ascii	"ram_region_id\000"
 .LASF435:
 	.ascii	"gL2pMapInfo\000"
 .LASF322:
 	.ascii	"lastEc\000"
-.LASF842:
+.LASF843:
 	.ascii	"sector\000"
 .LASF558:
 	.ascii	"ftl_memcmp\000"
@@ -54976,27 +55124,27 @@ __func__.9940:
 	.ascii	"p_map_region_ppn_table\000"
 .LASF120:
 	.ascii	"fit_noffset_fdt\000"
-.LASF866:
+.LASF867:
 	.ascii	"FtlSysBlkNumInit\000"
-.LASF671:
+.LASF672:
 	.ascii	"Ftl_save_ext_data\000"
 .LASF116:
 	.ascii	"fit_uname_rd\000"
-.LASF648:
+.LASF649:
 	.ascii	"GetSwlReplaceBlock\000"
 .LASF359:
 	.ascii	"max_erase_count\000"
 .LASF475:
 	.ascii	"p_l2p_ram_map\000"
-.LASF633:
+.LASF634:
 	.ascii	"req_num\000"
 .LASF115:
 	.ascii	"fit_hdr_rd\000"
 .LASF268:
 	.ascii	"NETLOOP_FAIL\000"
-.LASF823:
+.LASF824:
 	.ascii	"FtlBbmIsBadBlock\000"
-.LASF666:
+.LASF667:
 	.ascii	"FtlSuperblockPowerLostFix\000"
 .LASF157:
 	.ascii	"UCLASS_FIRMWARE\000"
@@ -55020,7 +55168,7 @@ __func__.9940:
 	.ascii	"UCLASS_NORTHBRIDGE\000"
 .LASF422:
 	.ascii	"c_ftl_nand_data_blks_per_plane\000"
-.LASF615:
+.LASF617:
 	.ascii	"page_count\000"
 .LASF298:
 	.ascii	"ftl_bbt_info\000"
@@ -55030,7 +55178,7 @@ __func__.9940:
 	.ascii	"send\000"
 .LASF531:
 	.ascii	"g_power_lost_recovery_flag\000"
-.LASF589:
+.LASF592:
 	.ascii	"numPages\000"
 .LASF447:
 	.ascii	"p_vendor_data_buf\000"
@@ -55038,21 +55186,21 @@ __func__.9940:
 	.ascii	"read_page_count\000"
 .LASF234:
 	.ascii	"write_hwaddr\000"
-.LASF725:
+.LASF726:
 	.ascii	"FtlMapBlkWriteDump_data\000"
-.LASF834:
+.LASF835:
 	.ascii	"FtlCacheWriteBack\000"
-.LASF699:
+.LASF700:
 	.ascii	"FtlLoadMapInfo\000"
-.LASF807:
+.LASF808:
 	.ascii	"V2P_block\000"
-.LASF720:
+.LASF721:
 	.ascii	"pSysHeader\000"
-.LASF672:
+.LASF673:
 	.ascii	"SupperBlkListInit\000"
-.LASF706:
+.LASF707:
 	.ascii	"ppnTbl\000"
-.LASF846:
+.LASF847:
 	.ascii	"pNand\000"
 .LASF559:
 	.ascii	"ftl_memcpy\000"
@@ -55062,13 +55210,15 @@ __func__.9940:
 	.ascii	"g_totle_gc_page_count\000"
 .LASF24:
 	.ascii	"_binary_u_boot_bin_start\000"
-.LASF673:
+.LASF674:
 	.ascii	"num_data_node\000"
 .LASF400:
 	.ascii	"c_ftl_nand_blk_pre_plane\000"
+.LASF884:
+	.ascii	"/home/ldq/rk-linux/u-boot-release\000"
 .LASF64:
 	.ascii	"bd_t\000"
-.LASF705:
+.LASF706:
 	.ascii	"lastWritePage\000"
 .LASF91:
 	.ascii	"ih_ep\000"
@@ -55078,7 +55228,7 @@ __func__.9940:
 	.ascii	"fit_uname_fdt\000"
 .LASF187:
 	.ascii	"UCLASS_RAM\000"
-.LASF674:
+.LASF675:
 	.ascii	"num_free_node\000"
 .LASF379:
 	.ascii	"ftl_superblock_info\000"
@@ -55094,37 +55244,35 @@ __func__.9940:
 	.ascii	"UCLASS_INVALID\000"
 .LASF443:
 	.ascii	"g_req_cache\000"
-.LASF591:
+.LASF594:
 	.ascii	"gc_blk\000"
 .LASF277:
 	.ascii	"page_addr\000"
-.LASF864:
+.LASF865:
 	.ascii	"mem_size\000"
-.LASF857:
+.LASF858:
 	.ascii	"test_page_step\000"
-.LASF688:
+.LASF689:
 	.ascii	"read_super_page_end\000"
 .LASF368:
 	.ascii	"refresh_enable_mode\000"
-.LASF847:
+.LASF848:
 	.ascii	"load_bbt\000"
-.LASF860:
+.LASF861:
 	.ascii	"IsBlkInVendorPart\000"
 .LASF402:
 	.ascii	"c_ftl_nand_bbm_buf_size\000"
-.LASF782:
+.LASF783:
 	.ascii	"node_data_count\000"
 .LASF583:
 	.ascii	"width\000"
 .LASF39:
 	.ascii	"base\000"
-.LASF884:
+.LASF887:
 	.ascii	"sftl_get_density\000"
-.LASF181:
-	.ascii	"UCLASS_PINCONFIG\000"
-.LASF839:
+.LASF840:
 	.ascii	"first_lpa_sctidx\000"
-.LASF587:
+.LASF590:
 	.ascii	"rk_ftl_garbage_collect\000"
 .LASF328:
 	.ascii	"lastPpa\000"
@@ -55132,11 +55280,11 @@ __func__.9940:
 	.ascii	"fit_uname_cfg\000"
 .LASF344:
 	.ascii	"gcTempPageOffset\000"
-.LASF636:
+.LASF637:
 	.ascii	"decrement_vpc_count\000"
 .LASF386:
 	.ascii	"dump_writed\000"
-.LASF748:
+.LASF749:
 	.ascii	"flush_l2p_region\000"
 .LASF130:
 	.ascii	"cmdline_start\000"
@@ -55156,9 +55304,9 @@ __func__.9940:
 	.ascii	"long long unsigned int\000"
 .LASF274:
 	.ascii	"int16\000"
-.LASF848:
+.LASF849:
 	.ascii	"ftl_low_format\000"
-.LASF734:
+.LASF735:
 	.ascii	"offset\000"
 .LASF504:
 	.ascii	"g_gc_blk_index\000"
@@ -55166,15 +55314,15 @@ __func__.9940:
 	.ascii	"req_prgm\000"
 .LASF436:
 	.ascii	"gVendorBlkInfo\000"
-.LASF676:
+.LASF677:
 	.ascii	"FtlPowerLostRecovery\000"
 .LASF462:
 	.ascii	"p_valid_page_count_table\000"
-.LASF702:
+.LASF703:
 	.ascii	"FtlMapTblRecovery\000"
 .LASF156:
 	.ascii	"UCLASS_GPIO\000"
-.LASF869:
+.LASF870:
 	.ascii	"debug_flag\000"
 .LASF498:
 	.ascii	"g_gc_next_blk_1\000"
@@ -55182,19 +55330,19 @@ __func__.9940:
 	.ascii	"off_dt_strings\000"
 .LASF376:
 	.ascii	"sys_blk_queue\000"
-.LASF647:
+.LASF648:
 	.ascii	"free_data_superblock\000"
-.LASF859:
+.LASF860:
 	.ascii	"re_test_next_page\000"
 .LASF61:
 	.ascii	"bi_arch_number\000"
-.LASF749:
+.LASF750:
 	.ascii	"FtlMapWritePage\000"
-.LASF783:
+.LASF784:
 	.ascii	"tmp_data_count\000"
 .LASF26:
 	.ascii	"ide_bus_offset\000"
-.LASF739:
+.LASF740:
 	.ascii	"action\000"
 .LASF408:
 	.ascii	"c_ftl_nand_byte_pre_page\000"
@@ -55202,11 +55350,11 @@ __func__.9940:
 	.ascii	"UCLASS_COUNT\000"
 .LASF174:
 	.ascii	"UCLASS_NVME\000"
-.LASF643:
+.LASF644:
 	.ascii	"new_id\000"
 .LASF345:
 	.ascii	"cache_write_count\000"
-.LASF640:
+.LASF641:
 	.ascii	"new_ppa\000"
 .LASF258:
 	.ascii	"net_restart_wrap\000"
@@ -55236,19 +55384,19 @@ __func__.9940:
 	.ascii	"g_nand_ops\000"
 .LASF584:
 	.ascii	"ftl_malloc\000"
-.LASF840:
+.LASF841:
 	.ascii	"first_lpa_nscts\000"
 .LASF183:
 	.ascii	"UCLASS_PMIC\000"
 .LASF318:
 	.ascii	"L2PMap\000"
-.LASF765:
+.LASF766:
 	.ascii	"prev_node_id\000"
 .LASF454:
 	.ascii	"gp_gc_page_buf_info\000"
 .LASF509:
 	.ascii	"g_totle_discard_page_count\000"
-.LASF656:
+.LASF657:
 	.ascii	"max_ec\000"
 .LASF537:
 	.ascii	"gFtlInitStatus\000"
@@ -55256,11 +55404,11 @@ __func__.9940:
 	.ascii	"long long int\000"
 .LASF459:
 	.ascii	"p_erase_count_table\000"
-.LASF824:
+.LASF825:
 	.ascii	"FtlBbmMapBadBlock\000"
 .LASF427:
 	.ascii	"g_GlobalDataVersion\000"
-.LASF717:
+.LASF718:
 	.ascii	"block_in_plane\000"
 .LASF128:
 	.ascii	"initrd_start\000"
@@ -55268,21 +55416,23 @@ __func__.9940:
 	.ascii	"g_MaxLbaSector\000"
 .LASF382:
 	.ascii	"current_plane\000"
+.LASF880:
+	.ascii	"free\000"
 .LASF383:
 	.ascii	"num_planes\000"
-.LASF800:
+.LASF801:
 	.ascii	"spareBuf\000"
-.LASF730:
+.LASF731:
 	.ascii	"FtlVendorPartRead\000"
-.LASF723:
+.LASF724:
 	.ascii	"FtlWriteDump_data\000"
 .LASF197:
 	.ascii	"UCLASS_SPI_FLASH\000"
 .LASF202:
 	.ascii	"UCLASS_TIMER\000"
-.LASF798:
+.LASF799:
 	.ascii	"FtlGetLastWrittenPage\000"
-.LASF661:
+.LASF662:
 	.ascii	"pDataHeader\000"
 .LASF542:
 	.ascii	"power_up_flag\000"
@@ -55290,15 +55440,15 @@ __func__.9940:
 	.ascii	"inkDie_write_and_check_en\000"
 .LASF413:
 	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
-.LASF843:
+.LASF844:
 	.ascii	"sftl_deinit\000"
-.LASF815:
+.LASF816:
 	.ascii	"totle_count\000"
 .LASF282:
 	.ascii	"die_num\000"
-.LASF750:
+.LASF751:
 	.ascii	"update_map_block\000"
-.LASF880:
+.LASF882:
 	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
 	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
 	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
@@ -55309,7 +55459,7 @@ __func__.9940:
 	.ascii	"common -ffixed-r9\000"
 .LASF307:
 	.ascii	"maxRegion\000"
-.LASF680:
+.LASF681:
 	.ascii	"next_free_active_plane\000"
 .LASF491:
 	.ascii	"p_gc_page_info\000"
@@ -55323,13 +55473,13 @@ __func__.9940:
 	.ascii	"g_cur_erase_blk\000"
 .LASF184:
 	.ascii	"UCLASS_PWM\000"
-.LASF634:
+.LASF635:
 	.ascii	"FtlGcBufFree\000"
-.LASF774:
+.LASF775:
 	.ascii	"List_pop_index_node\000"
-.LASF690:
+.LASF691:
 	.ascii	"scan_completed\000"
-.LASF637:
+.LASF638:
 	.ascii	"update_vpc_list\000"
 .LASF170:
 	.ascii	"UCLASS_MMC\000"
@@ -55341,7 +55491,7 @@ __func__.9940:
 	.ascii	"res32_0\000"
 .LASF333:
 	.ascii	"res32_1\000"
-.LASF726:
+.LASF727:
 	.ascii	"FtlUpdateVaildLpn\000"
 .LASF390:
 	.ascii	"scr_ppa\000"
@@ -55351,43 +55501,43 @@ __func__.9940:
 	.ascii	"save_size\000"
 .LASF78:
 	.ascii	"version\000"
-.LASF652:
+.LASF653:
 	.ascii	"pNode\000"
-.LASF638:
+.LASF639:
 	.ascii	"get_new_active_ppa\000"
-.LASF878:
+.LASF879:
 	.ascii	"kmalloc\000"
 .LASF25:
 	.ascii	"_binary_u_boot_bin_end\000"
-.LASF595:
+.LASF598:
 	.ascii	"max_gc_page_num\000"
 .LASF8:
 	.ascii	"unsigned int\000"
-.LASF712:
+.LASF713:
 	.ascii	"FtlSlcSuperblockCheck\000"
 .LASF515:
 	.ascii	"g_totle_avg_erase_count\000"
-.LASF836:
+.LASF837:
 	.ascii	"flashType\000"
-.LASF789:
+.LASF790:
 	.ascii	"FtlFreeSysBLkSort\000"
-.LASF779:
+.LASF780:
 	.ascii	"tmp_erase_count\000"
 .LASF83:
 	.ascii	"working_fdt\000"
-.LASF862:
+.LASF863:
 	.ascii	"FtlVariablesInit\000"
 .LASF392:
 	.ascii	"ftl_gc_page_buffer\000"
 .LASF239:
 	.ascii	"push_packet\000"
-.LASF708:
+.LASF709:
 	.ascii	"pMapBlkHeader\000"
 .LASF82:
 	.ascii	"size_dt_struct\000"
 .LASF473:
 	.ascii	"p_vendor_region_ppn_table\000"
-.LASF675:
+.LASF676:
 	.ascii	"make_superblock\000"
 .LASF97:
 	.ascii	"ih_name\000"
@@ -55397,11 +55547,11 @@ __func__.9940:
 	.ascii	"bufferFlashMode\000"
 .LASF6:
 	.ascii	"short int\000"
-.LASF837:
+.LASF838:
 	.ascii	"FtlRead\000"
 .LASF74:
 	.ascii	"totalsize\000"
-.LASF757:
+.LASF758:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
 .LASF385:
 	.ascii	"check_en\000"
@@ -55411,7 +55561,7 @@ __func__.9940:
 	.ascii	"prev\000"
 .LASF423:
 	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
-.LASF650:
+.LASF651:
 	.ascii	"min_ec_id\000"
 .LASF388:
 	.ascii	"phyBlk\000"
@@ -55419,7 +55569,7 @@ __func__.9940:
 	.ascii	"net_boot_file_size\000"
 .LASF412:
 	.ascii	"c_ftl_nand_map_region_num\000"
-.LASF665:
+.LASF666:
 	.ascii	"FtlVpcCheckAndModify\000"
 .LASF127:
 	.ascii	"ft_len\000"
@@ -55431,3 +55581,4 @@ __func__.9940:
 	.ascii	"g_sys_save_data\000"
 .LASF124:
 	.ascii	"rd_start\000"
+	.hidden	free
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
index ada1fa1a49..c2d0171805 100644
--- a/drivers/rkflash/rk_sftl_arm_v8.S
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -2,8 +2,8 @@
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:	GPL-2.0
+ * date: 2018-06-20
  */
-
 	.arch armv8-a+nosimd
 	.file	"rk_sftl.c"
 	.text
@@ -13,65 +13,65 @@
 	.align	2
 	.type	l2p_addr_tran.isra.0, %function
 l2p_addr_tran.isra.0:
-.LFB348:
+.LFB349:
 	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
-	.loc 1 54 0
+	.loc 1 58 0
 	.cfi_startproc
 .LVL0:
-	.loc 1 62 0
+	.loc 1 66 0
 	adrp	x4, .LANCHOR0
 	add	x4, x4, :lo12:.LANCHOR0
 	ldrh	w3, [x4, 8]
 .LVL1:
-	.loc 1 63 0
+	.loc 1 67 0
 	ldrh	w6, [x4, 10]
 .LVL2:
-	.loc 1 64 0
+	.loc 1 68 0
 	ldrh	w4, [x4, 14]
 	cmp	w4, 4
 	bne	.L2
-	.loc 1 65 0
+	.loc 1 69 0
 	lsr	w3, w3, 1
 .LVL3:
-	.loc 1 66 0
+	.loc 1 70 0
 	ubfiz	w6, w6, 1, 15
 .LVL4:
 .L2:
-	.loc 1 70 0
+	.loc 1 74 0
 	lsr	w5, w0, 10
 .LVL5:
-	.loc 1 74 0
+	.loc 1 78 0
 	and	w0, w0, 1023
 .LVL6:
-	.loc 1 71 0
+	.loc 1 75 0
 	and	w4, w5, 65535
-	.loc 1 72 0
+	.loc 1 76 0
 	and	w5, w5, 65535
 .LVL7:
-	.loc 1 71 0
+	.loc 1 75 0
 	udiv	w4, w4, w3
 .LVL8:
-	.loc 1 72 0
+	.loc 1 76 0
 	msub	w3, w3, w4, w5
 .LVL9:
-	.loc 1 74 0
-	madd	w3, w3, w6, w0
 	.loc 1 78 0
+	madd	w3, w3, w6, w0
+	.loc 1 82 0
 	mov	w0, 0
-	.loc 1 74 0
+	.loc 1 78 0
 	str	w3, [x1]
-	.loc 1 75 0
+	.loc 1 79 0
 	str	w4, [x2]
-	.loc 1 78 0
+	.loc 1 82 0
 	ret
 	.cfi_endproc
-.LFE348:
+.LFE349:
 	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
 	.section	.text.ftl_set_blk_mode.part.7,"ax",@progbits
 	.align	2
 	.type	ftl_set_blk_mode.part.7, %function
 ftl_set_blk_mode.part.7:
-.LFB355:
+.LFB356:
 	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
 	.loc 2 1346 0
 	.cfi_startproc
@@ -91,7 +91,7 @@ ftl_set_blk_mode.part.7:
 	str	w0, [x3, x1]
 	ret
 	.cfi_endproc
-.LFE355:
+.LFE356:
 	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -472,8 +472,8 @@ IsBlkInVendorPart:
 	.loc 3 517 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR35]
 	cbz	w1, .L25
-.LBB164:
-.LBB165:
+.LBB166:
+.LBB167:
 	.loc 3 518 0
 	adrp	x1, .LANCHOR27
 	ldrh	w2, [x1, #:lo12:.LANCHOR27]
@@ -488,8 +488,8 @@ IsBlkInVendorPart:
 	bhi	.L24
 .LVL36:
 .L25:
-.LBE165:
-.LBE164:
+.LBE167:
+.LBE166:
 	.loc 3 524 0
 	mov	w0, 0
 .LVL37:
@@ -498,8 +498,8 @@ IsBlkInVendorPart:
 .L24:
 	add	x1, x1, 1
 .LVL39:
-.LBB167:
-.LBB166:
+.LBB169:
+.LBB168:
 	.loc 3 519 0
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
@@ -507,8 +507,8 @@ IsBlkInVendorPart:
 	bne	.L23
 	.loc 3 520 0
 	mov	w0, 1
-.LBE166:
-.LBE167:
+.LBE168:
+.LBE169:
 	.loc 3 525 0
 	ret
 	.cfi_endproc
@@ -520,9 +520,9 @@ IsBlkInVendorPart:
 	.type	sftl_get_density, %function
 sftl_get_density:
 .LFB221:
-	.loc 3 1215 0
+	.loc 3 1214 0
 	.cfi_startproc
-	.loc 3 1217 0
+	.loc 3 1216 0
 	adrp	x0, .LANCHOR34
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	ret
@@ -1028,21 +1028,21 @@ IsInFreeQueue:
 	.loc 2 147 0
 	.cfi_startproc
 .LVL96:
-.LBB168:
-.LBB169:
+.LBB170:
+.LBB171:
 	.loc 2 94 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
-.LBE169:
-.LBE168:
+.LBE171:
+.LBE170:
 	.loc 2 147 0
 	and	w0, w0, 65535
-.LBB171:
-.LBB170:
+.LBB173:
+.LBB172:
 	.loc 2 94 0
 	ldrh	w4, [x1, 6]
-.LBE170:
-.LBE171:
+.LBE172:
+.LBE173:
 	.loc 2 152 0
 	cmp	w4, 1024
 	beq	.L65
@@ -1091,18 +1091,18 @@ FtlFreeSysBlkQueueOut:
 	.loc 2 165 0
 	.cfi_startproc
 .LVL103:
-.LBB172:
-.LBB173:
+.LBB174:
+.LBB175:
 	.loc 2 89 0
 	adrp	x1, .LANCHOR38
 	add	x1, x1, :lo12:.LANCHOR38
 	ldrh	w3, [x1, 6]
-.LBE173:
-.LBE172:
+.LBE175:
+.LBE174:
 	.loc 2 168 0
 	cbz	w3, .L69
 .LVL104:
-.LBB174:
+.LBB176:
 	.loc 2 170 0
 	ldrh	w2, [x1, 2]
 	.loc 2 171 0
@@ -1120,7 +1120,7 @@ FtlFreeSysBlkQueueOut:
 	ret
 .LVL106:
 .L69:
-.LBE174:
+.LBE176:
 	.loc 2 166 0
 	mov	w0, 65535
 .LVL107:
@@ -1352,8 +1352,8 @@ INSERT_DATA_LIST:
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB177:
-.LBB178:
+.LBB179:
+.LBB180:
 	.loc 2 189 0
 	mov	w2, 189
 	adrp	x1, .LANCHOR46
@@ -1364,8 +1364,8 @@ INSERT_DATA_LIST:
 .LVL139:
 .L86:
 	.cfi_restore_state
-.LBE178:
-.LBE177:
+.LBE180:
+.LBE179:
 	.loc 2 190 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -1531,8 +1531,8 @@ INSERT_FREE_LIST:
 	.cfi_restore 30
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
-.LBB181:
-.LBB182:
+.LBB183:
+.LBB184:
 	.loc 2 182 0
 	mov	w2, 182
 	adrp	x1, .LANCHOR49
@@ -1543,8 +1543,8 @@ INSERT_FREE_LIST:
 .LVL159:
 .L96:
 	.cfi_restore_state
-.LBE182:
-.LBE181:
+.LBE184:
+.LBE183:
 	.loc 2 183 0
 	ldp	x29, x30, [sp], 16
 	.cfi_restore 30
@@ -1907,8 +1907,8 @@ List_update_data_list:
 	cmp	w0, w19
 	beq	.L126
 .LVL200:
-.LBB185:
-.LBB186:
+.LBB187:
+.LBB188:
 	.loc 2 416 0 is_stmt 1
 	adrp	x2, .LANCHOR41
 	mov	w1, 6
@@ -2016,8 +2016,8 @@ List_update_data_list:
 	bl	INSERT_DATA_LIST
 .LVL215:
 .L126:
-.LBE186:
-.LBE185:
+.LBE188:
+.LBE187:
 	.loc 2 439 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -2068,8 +2068,8 @@ ftl_map_blk_alloc_new_blk:
 	bne	.L137
 .L138:
 .LVL220:
-.LBB189:
-.LBB190:
+.LBB191:
+.LBB192:
 	.loc 2 532 0 is_stmt 1
 	mov	w2, 532
 	adrp	x1, .LANCHOR55
@@ -2081,8 +2081,8 @@ ftl_map_blk_alloc_new_blk:
 	b	.L139
 .LVL222:
 .L137:
-.LBE190:
-.LBE189:
+.LBE192:
+.LBE191:
 	.loc 2 521 0
 	mov	x6, x0
 	ldrh	w2, [x0], 2
@@ -2300,32 +2300,32 @@ FtlUpdateVaildLpn:
 	.loc 2 894 0 is_stmt 1
 	ret
 .L156:
-.LBB193:
-.LBB194:
+.LBB195:
+.LBB196:
 	.loc 2 888 0
 	adrp	x1, .LANCHOR5
-.LBE194:
-.LBE193:
+.LBE196:
+.LBE195:
 	.loc 2 887 0
 	adrp	x0, .LANCHOR60
 .LVL251:
 	.loc 2 886 0
 	strh	wzr, [x3, #:lo12:.LANCHOR59]
+.LBB199:
 .LBB197:
-.LBB195:
 	.loc 2 890 0
 	mov	w2, 0
 	.loc 2 888 0
 	ldrh	w5, [x1, #:lo12:.LANCHOR5]
 	.loc 2 890 0
 	adrp	x1, .LANCHOR43
-.LBE195:
 .LBE197:
+.LBE199:
 	.loc 2 887 0
 	str	wzr, [x0, #:lo12:.LANCHOR60]
 .LVL252:
+.LBB200:
 .LBB198:
-.LBB196:
 	.loc 2 890 0
 	mov	w3, 0
 	ldr	x6, [x1, #:lo12:.LANCHOR43]
@@ -2353,8 +2353,8 @@ FtlUpdateVaildLpn:
 	add	x1, x1, 1
 .LVL255:
 	b	.L157
-.LBE196:
 .LBE198:
+.LBE200:
 	.cfi_endproc
 .LFE266:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
@@ -2515,8 +2515,8 @@ FtlSlcSuperblockCheck:
 	cmp	w2, w1
 	beq	.L175
 .LVL271:
-.LBB201:
-.LBB202:
+.LBB203:
+.LBB204:
 	.loc 2 2020 0
 	ldrb	w2, [x0, 6]
 	add	x2, x2, 8
@@ -2557,8 +2557,8 @@ FtlSlcSuperblockCheck:
 	ldrh	w3, [x0, x1, lsl 1]
 .LVL275:
 	b	.L178
-.LBE202:
-.LBE201:
+.LBE204:
+.LBE203:
 	.cfi_endproc
 .LFE282:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -3657,7 +3657,7 @@ FtlPrintInfo2buf:
 	add	x19, x19, x0, sxtw
 .LVL454:
 .L214:
-.LBB203:
+.LBB205:
 	.loc 3 87 0
 	mov	w0, 0
 	.loc 3 91 0
@@ -3714,8 +3714,8 @@ FtlPrintInfo2buf:
 	.loc 3 88 0 discriminator 2
 	bne	.L216
 .L215:
-.LBE203:
-.LBB204:
+.LBE205:
+.LBB206:
 	.loc 3 96 0
 	adrp	x0, .LANCHOR47
 	.loc 3 100 0
@@ -3772,7 +3772,7 @@ FtlPrintInfo2buf:
 	ldr	x0, [x20, #:lo12:.LANCHOR41]
 	ldrh	w3, [x0, x24]
 	b	.L218
-.LBE204:
+.LBE206:
 	.cfi_endproc
 .LFE200:
 	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
@@ -4128,26 +4128,26 @@ free_data_superblock:
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
 	.cfi_offset 30, -8
-.LBB207:
-.LBB208:
+.LBB209:
+.LBB210:
 	.loc 2 2525 0
 	adrp	x2, .LANCHOR43
 	ubfiz	x1, x0, 1, 16
-.LBE208:
-.LBE207:
+.LBE210:
+.LBE209:
 	.loc 2 2522 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
-.LBB210:
-.LBB209:
+.LBB212:
+.LBB211:
 	.loc 2 2525 0
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	strh	wzr, [x2, x1]
 	.loc 2 2526 0
 	bl	INSERT_FREE_LIST
 .LVL504:
-.LBE209:
-.LBE210:
+.LBE211:
+.LBE212:
 	.loc 2 2528 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -4929,8 +4929,8 @@ FtlGcReFreshBadBlk:
 	.loc 5 382 0
 	strh	wzr, [x19, #:lo12:.LANCHOR105]
 .L317:
-.LBB213:
-.LBB214:
+.LBB215:
+.LBB216:
 	.loc 5 383 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR105]
 	adrp	x0, .LANCHOR104
@@ -4944,8 +4944,8 @@ FtlGcReFreshBadBlk:
 	ldrh	w0, [x19, #:lo12:.LANCHOR105]
 	add	w0, w0, 1
 	strh	w0, [x19, #:lo12:.LANCHOR105]
-.LBE214:
-.LBE213:
+.LBE216:
+.LBE215:
 	.loc 5 387 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -4961,32 +4961,52 @@ FtlGcReFreshBadBlk:
 	.cfi_endproc
 .LFE316:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+.LFB337:
+	.loc 1 24 0
+	.cfi_startproc
+.LVL578:
+.LBB217:
+.LBB218:
+	.file 6 "include/linux/compat.h"
+	.loc 6 80 0
+	b	free
+.LVL579:
+.LBE218:
+.LBE217:
+	.cfi_endproc
+.LFE337:
+	.size	ftl_free, .-ftl_free
 	.section	.text.ftl_malloc,"ax",@progbits
 	.align	2
 	.global	ftl_malloc
 	.type	ftl_malloc, %function
 ftl_malloc:
-.LFB337:
-	.loc 1 24 0
+.LFB338:
+	.loc 1 28 0
 	.cfi_startproc
-.LVL578:
-	.loc 1 25 0
+.LVL580:
+	.loc 1 29 0
 	mov	w1, 0
 	sxtw	x0, w0
 	b	kmalloc
-.LVL579:
+.LVL581:
 	.cfi_endproc
-.LFE337:
+.LFE338:
 	.size	ftl_malloc, .-ftl_malloc
 	.section	.text.rknand_print_hex,"ax",@progbits
 	.align	2
 	.global	rknand_print_hex
 	.type	rknand_print_hex, %function
 rknand_print_hex:
-.LFB338:
-	.loc 1 29 0
+.LFB339:
+	.loc 1 33 0
 	.cfi_startproc
-.LVL580:
+.LVL582:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -4997,13 +5017,13 @@ rknand_print_hex:
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
 	mov	x22, x1
-.LVL581:
+.LVL583:
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
-	.loc 1 38 0
+	.loc 1 42 0
 	adrp	x24, .LC75
-	.loc 1 29 0
+	.loc 1 33 0
 	stp	x25, x26, [sp, 64]
 	mov	w23, w2
 	stp	x27, x28, [sp, 80]
@@ -5011,47 +5031,47 @@ rknand_print_hex:
 	.cfi_offset 26, -24
 	.cfi_offset 27, -16
 	.cfi_offset 28, -8
-	.loc 1 45 0
+	.loc 1 49 0
 	adrp	x25, .LC77
-	.loc 1 29 0
+	.loc 1 33 0
 	mov	x28, x0
 	mov	w27, w3
-	.loc 1 38 0
+	.loc 1 42 0
 	add	x24, x24, :lo12:.LC75
-	.loc 1 45 0
+	.loc 1 49 0
 	add	x25, x25, :lo12:.LC77
-	.loc 1 29 0
+	.loc 1 33 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -80
 	.cfi_offset 20, -72
-	.loc 1 36 0
+	.loc 1 40 0
 	mov	w21, 0
 	mov	x19, 0
-	.loc 1 35 0
+	.loc 1 39 0
 	mov	w20, 0
-	.loc 1 43 0
+	.loc 1 47 0
 	adrp	x26, .LC76
-.LVL582:
-.L327:
-	.loc 1 36 0 discriminator 1
+.LVL584:
+.L328:
+	.loc 1 40 0 discriminator 1
 	cmp	w27, w19
-	bhi	.L333
-	.loc 1 52 0
+	bhi	.L334
+	.loc 1 56 0
 	ldp	x19, x20, [sp, 16]
-.LVL583:
-	.loc 1 51 0
+.LVL585:
+	.loc 1 55 0
 	adrp	x0, .LC78
-	.loc 1 52 0
+	.loc 1 56 0
 	ldp	x21, x22, [sp, 32]
-.LVL584:
-	.loc 1 51 0
+.LVL586:
+	.loc 1 55 0
 	add	x0, x0, :lo12:.LC78
-	.loc 1 52 0
+	.loc 1 56 0
 	ldp	x23, x24, [sp, 48]
-.LVL585:
+.LVL587:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL586:
+.LVL588:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5067,104 +5087,104 @@ rknand_print_hex:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-	.loc 1 51 0
+	.loc 1 55 0
 	b	printf
-.LVL587:
-.L333:
+.LVL589:
+.L334:
 	.cfi_restore_state
-	.loc 1 37 0
-	cbnz	w20, .L328
-	.loc 1 38 0
+	.loc 1 41 0
+	cbnz	w20, .L329
+	.loc 1 42 0
 	mov	w2, w21
 	mov	x1, x28
 	mov	x0, x24
 	bl	printf
-.LVL588:
-.L328:
-	.loc 1 40 0
+.LVL590:
+.L329:
+	.loc 1 44 0
 	cmp	w23, 4
-	bne	.L329
-	.loc 1 41 0
+	bne	.L330
+	.loc 1 45 0
 	ldr	w1, [x22, x19, lsl 2]
-.L336:
-	.loc 1 43 0
+.L337:
+	.loc 1 47 0
 	add	x0, x26, :lo12:.LC76
-.L335:
-	.loc 1 45 0
+.L336:
+	.loc 1 49 0
 	bl	printf
-.LVL589:
-	.loc 1 46 0
+.LVL591:
+	.loc 1 50 0
 	add	w20, w20, 1
-.LVL590:
+.LVL592:
 	cmp	w20, 15
-	bls	.L332
-.LVL591:
-	.loc 1 47 0
+	bls	.L333
+.LVL593:
+	.loc 1 51 0
 	mov	w20, 0
-	.loc 1 48 0
+	.loc 1 52 0
 	adrp	x0, .LC78
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.LVL592:
-.L332:
+.LVL594:
+.L333:
 	add	x19, x19, 1
-.LVL593:
+.LVL595:
 	add	w21, w21, w23
-	b	.L327
-.LVL594:
-.L329:
-	.loc 1 42 0
+	b	.L328
+.LVL596:
+.L330:
+	.loc 1 46 0
 	cmp	w23, 2
-	bne	.L331
-	.loc 1 43 0
+	bne	.L332
+	.loc 1 47 0
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L336
-.L331:
-	.loc 1 45 0
+	b	.L337
+.L332:
+	.loc 1 49 0
 	ldrb	w1, [x22, x19]
 	mov	x0, x25
-	b	.L335
+	b	.L336
 	.cfi_endproc
-.LFE338:
+.LFE339:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
 	.global	FlashReadPages
 	.type	FlashReadPages, %function
 FlashReadPages:
-.LFB340:
-	.loc 1 81 0
+.LFB341:
+	.loc 1 85 0
 	.cfi_startproc
-.LVL595:
+.LVL597:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
-	.loc 1 83 0
+	.loc 1 87 0
 	adrp	x2, .LANCHOR0
-.LVL596:
+.LVL598:
 	add	x3, x2, :lo12:.LANCHOR0
 	ubfiz	x1, x1, 5, 32
-.LVL597:
-	.loc 1 81 0
+.LVL599:
+	.loc 1 85 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	str	x25, [sp, 64]
 	.cfi_offset 25, -32
-	.loc 1 83 0
+	.loc 1 87 0
 	ldrh	w25, [x3, 12]
-.LVL598:
-	.loc 1 81 0
+.LVL600:
+	.loc 1 85 0
 	stp	x21, x22, [sp, 32]
 	.cfi_offset 21, -64
 	.cfi_offset 22, -56
-	.loc 1 88 0
+	.loc 1 92 0
 	adrp	x21, .LANCHOR106
-	.loc 1 81 0
+	.loc 1 85 0
 	stp	x23, x24, [sp, 48]
-	.loc 1 88 0
+	.loc 1 92 0
 	adrp	x22, .LC1
-	.loc 1 81 0
+	.loc 1 85 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 23, -48
 	.cfi_offset 24, -40
@@ -5173,21 +5193,21 @@ FlashReadPages:
 	add	x24, x0, x1
 	mov	x19, x0
 	mov	x23, x2
-	.loc 1 88 0
+	.loc 1 92 0
 	add	x21, x21, :lo12:.LANCHOR106
 	add	x22, x22, :lo12:.LC1
-.LVL599:
-.L338:
-	.loc 1 87 0 discriminator 1
+.LVL601:
+.L339:
+	.loc 1 91 0 discriminator 1
 	cmp	x19, x24
-	bne	.L345
-	.loc 1 108 0
+	bne	.L346
+	.loc 1 112 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
-.LVL600:
+.LVL602:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5201,49 +5221,49 @@ FlashReadPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL601:
-.L345:
+.LVL603:
+.L346:
 	.cfi_restore_state
-	.loc 1 88 0
+	.loc 1 92 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L339
-	.loc 1 88 0 is_stmt 0 discriminator 2
+	cbz	x0, .L340
+	.loc 1 92 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L340
-.L339:
-	.loc 1 88 0 discriminator 3
-	mov	w2, 88
+	cbnz	x0, .L341
+.L340:
+	.loc 1 92 0 discriminator 3
+	mov	w2, 92
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.LVL602:
-.L340:
-	.loc 1 89 0 is_stmt 1
+.LVL604:
+.L341:
+	.loc 1 93 0 is_stmt 1
 	ldr	w0, [x19, 4]
-	.loc 1 90 0
+	.loc 1 94 0
 	adrp	x20, .LANCHOR107
 	add	x20, x20, :lo12:.LANCHOR107
-	.loc 1 89 0
+	.loc 1 93 0
 	add	x2, x29, 88
 	add	x1, x29, 92
 	bl	l2p_addr_tran.isra.0
-.LVL603:
-	.loc 1 90 0
+.LVL605:
+	.loc 1 94 0
 	ldrb	w0, [x29, 88]
 	ldr	w1, [x29, 92]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x20, 24]
 	blr	x4
-.LVL604:
-	.loc 1 94 0
+.LVL606:
+	.loc 1 98 0
 	str	w0, [x19]
-	.loc 1 95 0
+	.loc 1 99 0
 	add	x0, x23, :lo12:.LANCHOR0
-.LVL605:
+.LVL607:
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L342
-	.loc 1 96 0
+	bne	.L343
+	.loc 1 100 0
 	ldrb	w0, [x29, 88]
 	ldr	x4, [x20, 24]
 	ldp	x2, x3, [x19, 8]
@@ -5252,34 +5272,34 @@ FlashReadPages:
 	add	x2, x2, 2048
 	add	w1, w25, w1
 	blr	x4
-.LVL606:
-	.loc 1 100 0
+.LVL608:
+	.loc 1 104 0
 	cmn	w0, #1
-	beq	.L343
-	.loc 1 101 0 discriminator 1
+	beq	.L344
+	.loc 1 105 0 discriminator 1
 	ldr	x0, [x19, 16]
-.LVL607:
-	.loc 1 100 0 discriminator 1
+.LVL609:
+	.loc 1 104 0 discriminator 1
 	ldr	w1, [x0, 12]
 	cmn	w1, #1
-	bne	.L342
-	.loc 1 101 0
+	bne	.L343
+	.loc 1 105 0
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L342
-	.loc 1 102 0
+	bne	.L343
+	.loc 1 106 0
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L342
-.L343:
-	.loc 1 104 0
+	beq	.L343
+.L344:
+	.loc 1 108 0
 	mov	w0, -1
 	str	w0, [x19]
-.L342:
+.L343:
 	add	x19, x19, 32
-	b	.L338
+	b	.L339
 	.cfi_endproc
-.LFE340:
+.LFE341:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -5343,20 +5363,20 @@ FtlLoadFactoryBbt:
 	mov	w27, -1
 	.loc 4 287 0
 	str	x25, [x1, 16]
-.LVL608:
-.L357:
+.LVL610:
+.L358:
 	.loc 4 289 0 discriminator 1
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L362
+	bcc	.L363
 	.loc 4 314 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL609:
+.LVL611:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL610:
+.LVL612:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_remember_state
@@ -5374,8 +5394,8 @@ FtlLoadFactoryBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL611:
-.L362:
+.LVL613:
+.L363:
 	.cfi_restore_state
 	.loc 4 291 0
 	ldrh	w19, [x26, #:lo12:.LANCHOR17]
@@ -5388,19 +5408,19 @@ FtlLoadFactoryBbt:
 	.loc 4 291 0
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL612:
-.L358:
+.LVL614:
+.L359:
 	.loc 4 291 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L360
+	bgt	.L361
 	.loc 4 292 0 is_stmt 1
 	madd	w0, w0, w21, w19
 	.loc 4 294 0
 	mov	w2, 1
 	str	w3, [x29, 108]
-.LVL613:
+.LVL615:
 	mov	w1, w2
 	.loc 4 292 0
 	lsl	w0, w0, 10
@@ -5409,31 +5429,31 @@ FtlLoadFactoryBbt:
 	.loc 4 294 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL614:
+.LVL616:
 	.loc 4 295 0
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L359
+	beq	.L360
 	.loc 4 301 0
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L359
+	bne	.L360
 	.loc 4 303 0
 	strh	w19, [x20]
-.L360:
+.L361:
 	.loc 4 289 0 discriminator 2
 	add	w21, w21, 1
-.LVL615:
+.LVL617:
 	add	x20, x20, 2
-	b	.L357
-.L359:
+	b	.L358
+.L360:
 	.loc 4 291 0 discriminator 2
 	sub	w19, w19, #1
-.LVL616:
+.LVL618:
 	and	w19, w19, 65535
-.LVL617:
-	b	.L358
+.LVL619:
+	b	.L359
 	.cfi_endproc
 .LFE230:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -5445,7 +5465,7 @@ FtlGetLastWrittenPage:
 .LFB236:
 	.loc 2 47 0
 	.cfi_startproc
-.LVL618:
+.LVL620:
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
 	.cfi_offset 29, -160
@@ -5466,16 +5486,16 @@ FtlGetLastWrittenPage:
 	.cfi_offset 21, -128
 	.cfi_offset 22, -120
 	.loc 2 51 0
-	bne	.L368
+	bne	.L369
 	.loc 2 51 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR20
-.LVL619:
+.LVL621:
 	ldrh	w19, [x1, #:lo12:.LANCHOR20]
-.L369:
-.LVL620:
+.L370:
+.LVL622:
 	.loc 2 56 0 is_stmt 1 discriminator 4
 	sub	w19, w19, #1
-.LVL621:
+.LVL623:
 	.loc 2 53 0 discriminator 4
 	adrp	x1, ftl_temp_buf
 	.loc 2 56 0 discriminator 4
@@ -5488,7 +5508,7 @@ FtlGetLastWrittenPage:
 	str	x1, [x29, 72]
 	.loc 2 57 0 discriminator 4
 	orr	w0, w19, w21
-.LVL622:
+.LVL624:
 	.loc 2 54 0 discriminator 4
 	add	x1, x29, 96
 	.loc 2 57 0 discriminator 4
@@ -5497,33 +5517,33 @@ FtlGetLastWrittenPage:
 	mov	w2, w23
 	.loc 2 54 0 discriminator 4
 	str	x1, [x29, 80]
-.LVL623:
+.LVL625:
 	.loc 2 58 0 discriminator 4
 	add	x0, x29, 64
 	mov	w1, 1
 	bl	FlashReadPages
-.LVL624:
+.LVL626:
 	.loc 2 59 0 discriminator 4
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L370
+	bne	.L371
 	mov	w22, 0
 	.loc 2 61 0
 	mov	w24, 2
-.LVL625:
-.L371:
+.LVL627:
+.L372:
 	.loc 2 60 0
 	cmp	w22, w19
-	ble	.L374
-.LVL626:
-.L370:
+	ble	.L375
+.LVL628:
+.L371:
 	.loc 2 73 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL627:
+.LVL629:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL628:
+.LVL630:
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5536,16 +5556,16 @@ FtlGetLastWrittenPage:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL629:
-.L368:
+.LVL631:
+.L369:
 	.cfi_restore_state
 	.loc 2 51 0 discriminator 2
 	adrp	x1, .LANCHOR19
-.LVL630:
+.LVL632:
 	ldrh	w19, [x1, #:lo12:.LANCHOR19]
-	b	.L369
-.LVL631:
-.L374:
+	b	.L370
+.LVL633:
+.L375:
 	.loc 2 61 0
 	add	w20, w22, w19
 	.loc 2 63 0
@@ -5553,7 +5573,7 @@ FtlGetLastWrittenPage:
 	mov	w1, 1
 	.loc 2 61 0
 	sdiv	w20, w20, w24
-.LVL632:
+.LVL634:
 	.loc 2 62 0
 	sxth	w0, w20
 	orr	w0, w0, w21
@@ -5561,28 +5581,28 @@ FtlGetLastWrittenPage:
 	.loc 2 63 0
 	add	x0, x29, 64
 	bl	FlashReadPages
-.LVL633:
+.LVL635:
 	.loc 2 65 0
 	ldr	w0, [x29, 96]
 	cmn	w0, #1
-	bne	.L372
+	bne	.L373
 	.loc 2 65 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 100]
 	cmn	w0, #1
-	bne	.L372
+	bne	.L373
 	.loc 2 66 0 is_stmt 1
 	sub	w19, w20, #1
-.LVL634:
+.LVL636:
 	sxth	w19, w19
-.LVL635:
-	b	.L371
-.L372:
+.LVL637:
+	b	.L372
+.L373:
 	.loc 2 68 0
 	add	w20, w20, 1
-.LVL636:
+.LVL638:
 	sxth	w22, w20
-.LVL637:
-	b	.L371
+.LVL639:
+	b	.L372
 	.cfi_endproc
 .LFE236:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -5591,16 +5611,16 @@ FtlGetLastWrittenPage:
 	.global	FlashProgPages
 	.type	FlashProgPages, %function
 FlashProgPages:
-.LFB341:
-	.loc 1 111 0
+.LFB342:
+	.loc 1 115 0
 	.cfi_startproc
-.LVL638:
+.LVL640:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
 	.cfi_offset 30, -136
 	ubfiz	x1, x1, 5, 32
-.LVL639:
+.LVL641:
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x25, x26, [sp, 64]
@@ -5608,12 +5628,12 @@ FlashProgPages:
 	.cfi_offset 26, -72
 	mov	w25, w2
 	mov	w26, w3
-	.loc 1 113 0
+	.loc 1 117 0
 	adrp	x2, .LANCHOR0
-.LVL640:
+.LVL642:
 	add	x3, x2, :lo12:.LANCHOR0
-.LVL641:
-	.loc 1 111 0
+.LVL643:
+	.loc 1 115 0
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 27, -64
@@ -5622,45 +5642,45 @@ FlashProgPages:
 	.cfi_offset 20, -120
 	mov	x20, x0
 	stp	x21, x22, [sp, 32]
-	.loc 1 117 0
+	.loc 1 121 0
 	mov	x19, x0
-	.loc 1 113 0
+	.loc 1 117 0
 	ldrh	w27, [x3, 12]
-.LVL642:
+.LVL644:
 	.cfi_offset 21, -112
 	.cfi_offset 22, -104
-	.loc 1 118 0
+	.loc 1 122 0
 	adrp	x21, .LANCHOR110
-	.loc 1 111 0
+	.loc 1 115 0
 	stp	x23, x24, [sp, 48]
 	.cfi_offset 23, -96
 	.cfi_offset 24, -88
-	.loc 1 120 0
+	.loc 1 124 0
 	adrp	x22, .LANCHOR107
 	add	x24, x0, x1
 	mov	x23, x2
-	.loc 1 118 0
+	.loc 1 122 0
 	add	x21, x21, :lo12:.LANCHOR110
-	.loc 1 129 0
+	.loc 1 133 0
 	add	x28, x22, :lo12:.LANCHOR107
-.LVL643:
-.L377:
-	.loc 1 117 0 discriminator 1
+.LVL645:
+.L378:
+	.loc 1 121 0 discriminator 1
 	cmp	x19, x24
-	bne	.L385
-	.loc 1 138 0
-	cbnz	w26, .L386
-.LVL644:
-.L404:
-	.loc 1 168 0
+	bne	.L386
+	.loc 1 142 0
+	cbnz	w26, .L387
+.LVL646:
+.L405:
+	.loc 1 172 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL645:
+.LVL647:
 	ldp	x27, x28, [sp, 80]
-.LVL646:
+.LVL648:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5677,50 +5697,50 @@ FlashProgPages:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL647:
-.L385:
+.LVL649:
+.L386:
 	.cfi_restore_state
-	.loc 1 118 0
+	.loc 1 122 0
 	ldr	x0, [x19, 8]
-	cbz	x0, .L378
-	.loc 1 118 0 is_stmt 0 discriminator 2
+	cbz	x0, .L379
+	.loc 1 122 0 is_stmt 0 discriminator 2
 	ldr	x0, [x19, 16]
-	cbnz	x0, .L379
-.L378:
-	.loc 1 118 0 discriminator 3
+	cbnz	x0, .L380
+.L379:
+	.loc 1 122 0 discriminator 3
 	adrp	x0, .LC1
-	mov	w2, 118
+	mov	w2, 122
 	mov	x1, x21
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL648:
-.L379:
-	.loc 1 119 0 is_stmt 1
+.LVL650:
+.L380:
+	.loc 1 123 0 is_stmt 1
 	ldr	w0, [x19, 4]
 	add	x2, x29, 104
 	add	x1, x29, 108
 	bl	l2p_addr_tran.isra.0
-.LVL649:
-	.loc 1 120 0
+.LVL651:
+	.loc 1 124 0
 	add	x0, x22, :lo12:.LANCHOR107
 	ldr	w1, [x29, 108]
 	ldp	x2, x3, [x19, 8]
 	ldr	x4, [x0, 16]
 	ldrb	w0, [x29, 104]
 	blr	x4
-.LVL650:
-	.loc 1 125 0
-	cbnz	w0, .L380
-	.loc 1 124 0
-	str	wzr, [x19]
-.LVL651:
-.L381:
+.LVL652:
+	.loc 1 129 0
+	cbnz	w0, .L381
 	.loc 1 128 0
+	str	wzr, [x19]
+.LVL653:
+.L382:
+	.loc 1 132 0
 	add	x0, x23, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L383
-	.loc 1 129 0
+	bne	.L384
+	.loc 1 133 0
 	ldrb	w0, [x29, 104]
 	ldr	x4, [x28, 16]
 	ldp	x2, x3, [x19, 8]
@@ -5729,145 +5749,145 @@ FlashProgPages:
 	add	x2, x2, 2048
 	add	w1, w27, w1
 	blr	x4
-.LVL652:
-	.loc 1 133 0
-	cbz	w0, .L383
-	.loc 1 134 0
-	mov	w0, -1
-.LVL653:
-	str	w0, [x19]
-.L383:
-	add	x19, x19, 32
-	b	.L377
 .LVL654:
-.L380:
-	.loc 1 126 0
+	.loc 1 137 0
+	cbz	w0, .L384
+	.loc 1 138 0
 	mov	w0, -1
 .LVL655:
 	str	w0, [x19]
-	b	.L381
+.L384:
+	add	x19, x19, 32
+	b	.L378
 .LVL656:
-.L390:
-.LBB215:
-	.loc 1 143 0
+.L381:
+	.loc 1 130 0
+	mov	w0, -1
+.LVL657:
+	str	w0, [x19]
+	b	.L382
+.LVL658:
+.L391:
+.LBB219:
+	.loc 1 147 0
 	str	wzr, [x22]
-	.loc 1 149 0
+	.loc 1 153 0
 	mov	w2, w25
-	.loc 1 144 0
+	.loc 1 148 0
 	str	wzr, [x24]
-	.loc 1 149 0
+	.loc 1 153 0
 	mov	w1, 1
-	.loc 1 147 0
+	.loc 1 151 0
 	stp	x22, x24, [x29, 120]
-	.loc 1 145 0
+	.loc 1 149 0
 	ldr	w0, [x20, 4]
 	str	w0, [x29, 116]
-	.loc 1 149 0
+	.loc 1 153 0
 	add	x0, x29, 112
 	bl	FlashReadPages
-.LVL657:
-	.loc 1 150 0
+.LVL659:
+	.loc 1 154 0
 	ldr	w26, [x29, 112]
 	cmn	w26, #1
-	bne	.L387
-	.loc 1 151 0
+	bne	.L388
+	.loc 1 155 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.LVL658:
-	.loc 1 152 0
+.LVL660:
+	.loc 1 156 0
 	str	w26, [x20]
-.L387:
-	.loc 1 154 0
+.L388:
+	.loc 1 158 0
 	ldr	x0, [x20, 16]
-	cbz	x0, .L388
-	.loc 1 155 0
+	cbz	x0, .L389
+	.loc 1 159 0
 	ldr	w3, [x23, #:lo12:.LANCHOR111]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L388
-	.loc 1 156 0
+	beq	.L389
+	.loc 1 160 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.LVL659:
-	.loc 1 157 0
+.LVL661:
+	.loc 1 161 0
 	mov	w0, -1
 	str	w0, [x20]
-.L388:
-	.loc 1 160 0
+.L389:
+	.loc 1 164 0
 	ldr	x0, [x20, 8]
-	cbz	x0, .L389
-	.loc 1 161 0
+	cbz	x0, .L390
+	.loc 1 165 0
 	ldr	w3, [x21, #:lo12:check_buf]
 	ldr	w2, [x0]
 	cmp	w2, w3
-	beq	.L389
-	.loc 1 162 0
+	beq	.L390
+	.loc 1 166 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC81
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.LVL660:
-	.loc 1 163 0
+.LVL662:
+	.loc 1 167 0
 	mov	w0, -1
 	str	w0, [x20]
-.L389:
+.L390:
 	add	x20, x20, 32
-.L405:
-.LBE215:
-	.loc 1 140 0 discriminator 1
+.L406:
+.LBE219:
+	.loc 1 144 0 discriminator 1
 	cmp	x20, x19
-	bne	.L390
-	b	.L404
-.LVL661:
-.L386:
-.LBB216:
-	.loc 1 143 0 discriminator 1
+	bne	.L391
+	b	.L405
+.LVL663:
+.L387:
+.LBB220:
+	.loc 1 147 0 discriminator 1
 	adrp	x21, check_buf
-	.loc 1 144 0 discriminator 1
+	.loc 1 148 0 discriminator 1
 	adrp	x23, .LANCHOR111
-	.loc 1 143 0 discriminator 1
+	.loc 1 147 0 discriminator 1
 	add	x22, x21, :lo12:check_buf
-	.loc 1 144 0 discriminator 1
+	.loc 1 148 0 discriminator 1
 	add	x24, x23, :lo12:.LANCHOR111
-	b	.L405
-.LBE216:
+	b	.L406
+.LBE220:
 	.cfi_endproc
-.LFE341:
+.LFE342:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashEraseBlocks,"ax",@progbits
 	.align	2
 	.global	FlashEraseBlocks
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
-.LFB342:
-	.loc 1 171 0
+.LFB343:
+	.loc 1 175 0
 	.cfi_startproc
-.LVL662:
+.LVL664:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
 	.cfi_offset 30, -72
-	.loc 1 174 0
+	.loc 1 178 0
 	adrp	x1, .LANCHOR0
-.LVL663:
+.LVL665:
 	add	x3, x1, :lo12:.LANCHOR0
 	ubfiz	x2, x2, 5, 32
-.LVL664:
-	.loc 1 171 0
+.LVL666:
+	.loc 1 175 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x23, x24, [sp, 48]
 	add	x2, x2, 4
 	.cfi_offset 23, -32
 	.cfi_offset 24, -24
-	.loc 1 174 0
+	.loc 1 178 0
 	ldrh	w23, [x3, 12]
-.LVL665:
-	.loc 1 171 0
+.LVL667:
+	.loc 1 175 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -64
 	.cfi_offset 20, -56
@@ -5876,22 +5896,22 @@ FlashEraseBlocks:
 	.cfi_offset 21, -48
 	.cfi_offset 22, -40
 	mov	x20, x1
-	.loc 1 179 0
+	.loc 1 183 0
 	adrp	x21, .LANCHOR107
 	add	x22, x0, x2
-	.loc 1 184 0
+	.loc 1 188 0
 	add	x24, x21, :lo12:.LANCHOR107
-.LVL666:
-.L408:
-	.loc 1 177 0 discriminator 1
+.LVL668:
+.L409:
+	.loc 1 181 0 discriminator 1
 	cmp	x19, x22
-	bne	.L414
-	.loc 1 190 0
+	bne	.L415
+	.loc 1 194 0
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL667:
+.LVL669:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -5904,58 +5924,58 @@ FlashEraseBlocks:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL668:
-.L414:
+.LVL670:
+.L415:
 	.cfi_restore_state
-	.loc 1 178 0
+	.loc 1 182 0
 	ldr	w0, [x19]
 	add	x2, x29, 72
 	add	x1, x29, 76
 	bl	l2p_addr_tran.isra.0
-.LVL669:
-	.loc 1 179 0
+.LVL671:
+	.loc 1 183 0
 	add	x0, x21, :lo12:.LANCHOR107
 	ldr	w1, [x29, 76]
 	ldr	x2, [x0, 8]
 	ldrb	w0, [x29, 72]
 	blr	x2
-.LVL670:
-	.loc 1 181 0
-	cbnz	w0, .L409
-	.loc 1 180 0
+.LVL672:
+	.loc 1 185 0
+	cbnz	w0, .L410
+	.loc 1 184 0
 	str	wzr, [x19, -4]
-.LVL671:
-.L410:
-	.loc 1 183 0
+.LVL673:
+.L411:
+	.loc 1 187 0
 	add	x0, x20, :lo12:.LANCHOR0
 	ldrh	w0, [x0, 14]
 	cmp	w0, 4
-	bne	.L412
-	.loc 1 184 0
+	bne	.L413
+	.loc 1 188 0
 	ldrb	w0, [x29, 72]
 	ldr	x2, [x24, 8]
 	ldr	w1, [x29, 76]
 	add	w1, w23, w1
 	blr	x2
-.LVL672:
-	.loc 1 185 0
-	cbz	w0, .L412
-	.loc 1 186 0
+.LVL674:
+	.loc 1 189 0
+	cbz	w0, .L413
+	.loc 1 190 0
 	mov	w0, -1
-.LVL673:
+.LVL675:
 	str	w0, [x19, -4]
-.L412:
+.L413:
 	add	x19, x19, 32
-	b	.L408
-.LVL674:
-.L409:
-	.loc 1 182 0
+	b	.L409
+.LVL676:
+.L410:
+	.loc 1 186 0
 	mov	w0, -1
-.LVL675:
+.LVL677:
 	str	w0, [x19, -4]
-	b	.L410
+	b	.L411
 	.cfi_endproc
-.LFE342:
+.LFE343:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
 	.align	2
@@ -5965,7 +5985,7 @@ FtlFreeSysBlkQueueIn:
 .LFB240:
 	.loc 2 98 0
 	.cfi_startproc
-.LVL676:
+.LVL678:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -5975,14 +5995,14 @@ FtlFreeSysBlkQueueIn:
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
 	and	w21, w0, 65535
-.LBB217:
-.LBB218:
+.LBB221:
+.LBB222:
 	.loc 2 94 0
 	adrp	x0, .LANCHOR38
-.LVL677:
+.LVL679:
 	add	x2, x0, :lo12:.LANCHOR38
-.LBE218:
-.LBE217:
+.LBE222:
+.LBE221:
 	.loc 2 98 0
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -32
@@ -5990,23 +6010,23 @@ FtlFreeSysBlkQueueIn:
 	.loc 2 99 0
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L419
+	beq	.L420
 	and	w1, w1, 65535
 	mov	x19, x0
-.LVL678:
-.LBB219:
+.LVL680:
+.LBB223:
 	.loc 2 101 0
-	cbz	w1, .L421
-.LBB220:
+	cbz	w1, .L422
+.LBB224:
 	.loc 2 102 0
 	mov	w0, w21
 	bl	P2V_block_in_plane
-.LVL679:
+.LVL681:
 	and	w20, w0, 65535
-.LVL680:
+.LVL682:
 	.loc 2 103 0
 	adrp	x0, .LANCHOR112
-.LVL681:
+.LVL683:
 	lsl	w1, w21, 10
 	.loc 2 104 0
 	mov	w2, 1
@@ -6016,7 +6036,7 @@ FtlFreeSysBlkQueueIn:
 	.loc 2 104 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL682:
+.LVL684:
 	.loc 2 105 0
 	adrp	x1, .LANCHOR40
 	ubfiz	x0, x20, 1, 16
@@ -6029,9 +6049,9 @@ FtlFreeSysBlkQueueIn:
 	ldr	w0, [x1, #:lo12:.LANCHOR76]
 	add	w0, w0, 1
 	str	w0, [x1, #:lo12:.LANCHOR76]
-.LVL683:
-.L421:
-.LBE220:
+.LVL685:
+.L422:
+.LBE224:
 	.loc 2 108 0
 	add	x0, x19, :lo12:.LANCHOR38
 	ldrh	w1, [x0, 6]
@@ -6046,13 +6066,13 @@ FtlFreeSysBlkQueueIn:
 	strh	w1, [x0, 4]
 	.loc 2 109 0
 	strh	w21, [x2, 8]
-.LVL684:
-.L419:
-.LBE219:
+.LVL686:
+.L420:
+.LBE223:
 	.loc 2 113 0
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
-.LVL685:
+.LVL687:
 	ldp	x29, x30, [sp], 48
 	.cfi_restore 30
 	.cfi_restore 29
@@ -6072,7 +6092,7 @@ FtlLowFormatEraseBlock:
 .LFB209:
 	.loc 3 528 0
 	.cfi_startproc
-.LVL686:
+.LVL688:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
@@ -6091,19 +6111,19 @@ FtlLowFormatEraseBlock:
 	and	w24, w0, 65535
 	.loc 3 538 0
 	adrp	x0, .LANCHOR113
-.LVL687:
+.LVL689:
 	.loc 3 528 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w23, w1, 255
 	.loc 3 538 0
 	str	w24, [x0, #:lo12:.LANCHOR113]
-.LVL688:
+.LVL690:
 	.loc 3 551 0
 	adrp	x0, .LANCHOR115
 	.loc 3 550 0
 	adrp	x1, .LANCHOR114
-.LVL689:
+.LVL691:
 	.cfi_offset 19, -128
 	.cfi_offset 20, -120
 	.cfi_offset 21, -112
@@ -6135,59 +6155,59 @@ FtlLowFormatEraseBlock:
 	.cfi_offset 27, -64
 	.cfi_offset 28, -56
 	stp	x0, x1, [x29, 120]
-.LVL690:
-.L430:
+.LVL692:
+.L431:
 	.loc 3 539 0 discriminator 1
 	cmp	w8, w5, uxth
-	bhi	.L434
+	bhi	.L435
 	.loc 3 559 0
-	cbz	w22, .L429
+	cbz	w22, .L430
 	.loc 3 562 0
 	mov	w2, w22
 	ubfiz	x22, x22, 5, 16
-.LVL691:
+.LVL693:
 	mov	x25, 0
 	mov	w1, 0
 	mov	x0, x6
 	bl	FlashEraseBlocks
-.LVL692:
-.L438:
+.LVL694:
+.L439:
 	.loc 3 564 0
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L437
+	bne	.L438
 	.loc 3 566 0
 	ldr	w0, [x1, 4]
 	.loc 3 565 0
 	add	w19, w19, 1
-.LVL693:
+.LVL695:
 	and	w19, w19, 65535
-.LVL694:
+.LVL696:
 	.loc 3 566 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL695:
-.L437:
+.LVL697:
+.L438:
 	add	x25, x25, 32
 	.loc 3 563 0 discriminator 2
 	cmp	x25, x22
-	bne	.L438
+	bne	.L439
 	.loc 3 571 0
-	cbz	w23, .L451
-.LVL696:
+	cbz	w23, .L452
+.LVL698:
 	.loc 3 573 0
 	adrp	x0, .LANCHOR20
 	.loc 3 572 0
 	mov	w25, 1
 	.loc 3 573 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR20]
-.LVL697:
+.LVL699:
 	.loc 3 574 0
 	lsr	w28, w26, 2
-.LVL698:
-.L439:
+.LVL700:
+.L440:
 	.loc 3 578 0
 	add	x0, x20, :lo12:.LANCHOR3
 	.loc 3 580 0
@@ -6198,8 +6218,8 @@ FtlLowFormatEraseBlock:
 	.loc 3 580 0
 	add	x0, x27, :lo12:.LANCHOR13
 	str	x0, [x29, 112]
-.LVL699:
-.L447:
+.LVL701:
+.L448:
 	.loc 3 578 0
 	ldr	x0, [x29, 136]
 	mov	x5, 0
@@ -6217,94 +6237,94 @@ FtlLowFormatEraseBlock:
 	ldr	x10, [x0, #:lo12:.LANCHOR114]
 	ldr	x0, [x29, 120]
 	ldrh	w11, [x0, #:lo12:.LANCHOR24]
-.LVL700:
-.L440:
+.LVL702:
+.L441:
 	.loc 3 578 0 discriminator 1
 	cmp	w7, w5, uxth
-	bhi	.L443
+	bhi	.L444
 	.loc 3 593 0
-	cbz	w20, .L429
+	cbz	w20, .L430
 	.loc 3 596 0
 	mov	w1, w20
 	mov	w3, 1
 	mov	w2, w25
 	mov	x0, x6
 	bl	FlashProgPages
-.LVL701:
+.LVL703:
 	mov	x27, 0
 	ubfiz	x1, x20, 5, 16
-.LVL702:
-.L446:
+.LVL704:
+.L447:
 	.loc 3 598 0
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	add	x3, x0, x27
 	ldr	w0, [x0, x27]
-	cbz	w0, .L445
+	cbz	w0, .L446
 	.loc 3 600 0
 	ldr	w0, [x3, 4]
 	.loc 3 599 0
 	add	w19, w19, 1
-.LVL703:
+.LVL705:
 	str	x1, [x29, 104]
 	and	w19, w19, 65535
-.LVL704:
+.LVL706:
 	.loc 3 600 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL705:
+.LVL707:
 	ldr	x1, [x29, 104]
-.L445:
+.L446:
 	add	x27, x27, 32
 	.loc 3 597 0 discriminator 2
 	cmp	x1, x27
-	bne	.L446
+	bne	.L447
 	.loc 3 604 0
 	add	w22, w22, w28
-.LVL706:
+.LVL708:
 	and	w22, w22, 65535
-.LVL707:
+.LVL709:
 	.loc 3 605 0
 	cmp	w26, w22
-	bhi	.L447
+	bhi	.L448
 	mov	x22, 0
-.LVL708:
-.L449:
+.LVL710:
+.L450:
 	.loc 3 611 0
-	cbz	w23, .L448
+	cbz	w23, .L449
 	.loc 3 611 0 is_stmt 0 discriminator 1
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
-	cbnz	w0, .L448
+	cbnz	w0, .L449
 	.loc 3 612 0 is_stmt 1
 	ldr	w0, [x1, 4]
 	mov	w1, 1
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.LVL709:
-.L448:
+.LVL711:
+.L449:
 	add	x22, x22, 32
 	.loc 3 610 0 discriminator 2
 	cmp	x22, x27
-	bne	.L449
+	bne	.L450
 	.loc 3 615 0
 	cmp	w24, 63
 	ccmp	w23, 0, 0, hi
-	beq	.L429
+	beq	.L430
 	.loc 3 616 0
 	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	mov	w2, w20
 	mov	w1, w25
 	bl	FlashEraseBlocks
-.LVL710:
-.L429:
+.LVL712:
+.L430:
 	.loc 3 619 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
-.LVL711:
+.LVL713:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL712:
+.LVL714:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
@@ -6323,8 +6343,8 @@ FtlLowFormatEraseBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL713:
-.L434:
+.LVL715:
+.L435:
 	.cfi_restore_state
 	.loc 3 540 0
 	lsl	x0, x5, 5
@@ -6335,22 +6355,22 @@ FtlLowFormatEraseBlock:
 	.loc 3 541 0
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
-.LVL714:
+.LVL716:
 	and	w13, w0, 65535
 	mov	w14, w13
-.LVL715:
+.LVL717:
 	.loc 3 543 0
-	cbz	w23, .L431
+	cbz	w23, .L432
 	.loc 3 544 0
 	bl	IsBlkInVendorPart
-.LVL716:
-	cbnz	w0, .L432
-.L431:
+.LVL718:
+	cbnz	w0, .L433
+.L432:
 	.loc 3 548 0
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-.LVL717:
-	cbnz	w0, .L433
+.LVL719:
+	cbnz	w0, .L434
 	.loc 3 549 0
 	ubfiz	x0, x22, 5, 16
 	.loc 3 551 0
@@ -6359,12 +6379,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 552 0
 	add	w22, w22, 1
-.LVL718:
+.LVL720:
 	and	w22, w22, 65535
-.LVL719:
+.LVL721:
 	.loc 3 549 0
 	lsl	w13, w13, 10
-.LVL720:
+.LVL722:
 	.loc 3 551 0
 	asr	w1, w1, 2
 	add	x1, x11, x1, sxtw 2
@@ -6372,30 +6392,30 @@ FtlLowFormatEraseBlock:
 	str	w13, [x0, 4]
 	.loc 3 551 0
 	stp	x10, x1, [x0, 8]
-.L432:
-.LVL721:
-	add	x5, x5, 1
-.LVL722:
-	b	.L430
-.LVL723:
 .L433:
-	.loc 3 554 0
-	add	w19, w19, 1
+.LVL723:
+	add	x5, x5, 1
 .LVL724:
-	and	w19, w19, 65535
+	b	.L431
 .LVL725:
-	b	.L432
+.L434:
+	.loc 3 554 0
+	add	w19, w19, 1
 .LVL726:
-.L451:
+	and	w19, w19, 65535
+.LVL727:
+	b	.L433
+.LVL728:
+.L452:
 	.loc 3 534 0
 	mov	w25, 0
 	.loc 3 533 0
 	mov	w28, 6
 	.loc 3 531 0
 	mov	w26, 1
-	b	.L439
-.LVL727:
-.L443:
+	b	.L440
+.LVL729:
+.L444:
 	.loc 3 579 0
 	lsl	x0, x5, 5
 	.loc 3 580 0
@@ -6406,22 +6426,22 @@ FtlLowFormatEraseBlock:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
-.LVL728:
+.LVL730:
 	and	w12, w0, 65535
 	mov	w13, w12
-.LVL729:
+.LVL731:
 	.loc 3 581 0
-	cbz	w23, .L441
+	cbz	w23, .L442
 	.loc 3 582 0
 	bl	IsBlkInVendorPart
-.LVL730:
-	cbnz	w0, .L442
-.L441:
+.LVL732:
+	cbnz	w0, .L443
+.L442:
 	.loc 3 585 0
 	mov	w0, w13
 	bl	FtlBbmIsBadBlock
-.LVL731:
-	cbnz	w0, .L442
+.LVL733:
+	cbnz	w0, .L443
 	.loc 3 586 0
 	ubfiz	x0, x20, 5, 16
 	.loc 3 588 0
@@ -6430,12 +6450,12 @@ FtlLowFormatEraseBlock:
 	add	x0, x6, x0
 	.loc 3 589 0
 	add	w20, w20, 1
-.LVL732:
+.LVL734:
 	and	w20, w20, 65535
-.LVL733:
+.LVL735:
 	.loc 3 586 0
 	add	w12, w22, w12, lsl 10
-.LVL734:
+.LVL736:
 	.loc 3 588 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
@@ -6443,11 +6463,11 @@ FtlLowFormatEraseBlock:
 	str	w12, [x0, 4]
 	.loc 3 588 0
 	stp	x8, x1, [x0, 8]
-.L442:
-.LVL735:
+.L443:
+.LVL737:
 	add	x5, x5, 1
-.LVL736:
-	b	.L440
+.LVL738:
+	b	.L441
 	.cfi_endproc
 .LFE209:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
@@ -6456,16 +6476,16 @@ FtlLowFormatEraseBlock:
 	.global	ftl_memset
 	.type	ftl_memset, %function
 ftl_memset:
-.LFB345:
-	.loc 1 238 0
+.LFB346:
+	.loc 1 242 0
 	.cfi_startproc
-.LVL737:
-	.loc 1 239 0
+.LVL739:
+	.loc 1 243 0
 	uxtw	x2, w2
 	b	memset
-.LVL738:
+.LVL740:
 	.cfi_endproc
-.LFE345:
+.LFE346:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.FtlMemInit,"ax",@progbits
 	.align	2
@@ -6615,7 +6635,7 @@ FtlMemInit:
 	ldrh	w0, [x19, #:lo12:.LANCHOR21]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL739:
+.LVL741:
 	adrp	x1, .LANCHOR98
 	str	x0, [x1, #:lo12:.LANCHOR98]
 	.loc 3 311 0
@@ -6623,7 +6643,7 @@ FtlMemInit:
 	ldrh	w1, [x19, #:lo12:.LANCHOR21]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL740:
+.LVL742:
 	.loc 3 312 0
 	ldrh	w19, [x22, #:lo12:.LANCHOR3]
 	.loc 3 311 0
@@ -6631,7 +6651,7 @@ FtlMemInit:
 	str	x3, [x29, 104]
 	.loc 3 312 0
 	lsl	w20, w19, 5
-.LVL741:
+.LVL743:
 	.loc 3 313 0
 	lsl	w19, w19, 7
 	.loc 3 311 0
@@ -6639,43 +6659,43 @@ FtlMemInit:
 	.loc 3 313 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL742:
+.LVL744:
 	adrp	x15, .LANCHOR120
 	str	x15, [x29, 112]
 	str	x0, [x15, #:lo12:.LANCHOR120]
 	.loc 3 314 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL743:
+.LVL745:
 	adrp	x11, .LANCHOR121
 	str	x11, [x29, 120]
 	str	x0, [x11, #:lo12:.LANCHOR121]
 	.loc 3 315 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL744:
+.LVL746:
 	adrp	x14, .LANCHOR122
 	str	x14, [x29, 128]
 	str	x0, [x14, #:lo12:.LANCHOR122]
 	.loc 3 316 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL745:
+.LVL747:
 	adrp	x13, .LANCHOR112
 	str	x13, [x29, 136]
 	str	x0, [x13, #:lo12:.LANCHOR112]
 	.loc 3 317 0
 	mov	w0, w20
 	bl	ftl_malloc
-.LVL746:
+.LVL748:
 	.loc 3 320 0
 	adrp	x20, .LANCHOR96
-.LVL747:
+.LVL749:
 	.loc 3 317 0
 	adrp	x12, .LANCHOR95
 	.loc 3 319 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR23]
-.LVL748:
+.LVL750:
 	.loc 3 317 0
 	str	x12, [x29, 144]
 	str	x0, [x12, #:lo12:.LANCHOR95]
@@ -6687,21 +6707,21 @@ FtlMemInit:
 	.loc 3 321 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL749:
+.LVL751:
 	adrp	x10, .LANCHOR39
 	str	x10, [x29, 152]
 	str	x0, [x10, #:lo12:.LANCHOR39]
 	.loc 3 322 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL750:
+.LVL752:
 	adrp	x8, .LANCHOR123
 	str	x8, [x29, 160]
 	str	x0, [x8, #:lo12:.LANCHOR123]
 	.loc 3 323 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL751:
+.LVL753:
 	adrp	x7, .LANCHOR124
 	str	x7, [x29, 168]
 	str	x0, [x7, #:lo12:.LANCHOR124]
@@ -6709,24 +6729,24 @@ FtlMemInit:
 	ldr	w0, [x20, #:lo12:.LANCHOR96]
 	mul	w0, w19, w0
 	bl	ftl_malloc
-.LVL752:
+.LVL754:
 	adrp	x6, .LANCHOR93
 	str	x6, [x29, 176]
 	str	x0, [x6, #:lo12:.LANCHOR93]
 	.loc 3 325 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL753:
+.LVL755:
 	adrp	x5, .LANCHOR116
 	str	x5, [x29, 184]
 	str	x0, [x5, #:lo12:.LANCHOR116]
 	.loc 3 326 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL754:
+.LVL756:
 	.loc 3 329 0
 	adrp	x19, .LANCHOR24
-.LVL755:
+.LVL757:
 	.loc 3 326 0
 	adrp	x4, .LANCHOR114
 	.loc 3 327 0
@@ -6738,7 +6758,7 @@ FtlMemInit:
 	mov	w0, 24
 	mul	w0, w2, w0
 	bl	ftl_malloc
-.LVL756:
+.LVL758:
 	.loc 3 329 0
 	ldrh	w28, [x19, #:lo12:.LANCHOR24]
 	.loc 3 327 0
@@ -6750,22 +6770,22 @@ FtlMemInit:
 	adrp	x22, .LANCHOR94
 	.loc 3 329 0
 	mul	w28, w28, w0
-.LVL757:
+.LVL759:
 	.loc 3 330 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL758:
+.LVL760:
 	str	x0, [x24, #:lo12:.LANCHOR109]
 	.loc 3 331 0
 	lsl	w0, w28, 2
 	bl	ftl_malloc
-.LVL759:
+.LVL761:
 	str	x0, [x23, #:lo12:.LANCHOR115]
 	.loc 3 332 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR24]
 	.loc 3 335 0
 	adrp	x28, .LANCHOR125
-.LVL760:
+.LVL762:
 	.loc 3 332 0
 	ldr	w0, [x20, #:lo12:.LANCHOR96]
 	.loc 3 335 0
@@ -6773,7 +6793,7 @@ FtlMemInit:
 	.loc 3 332 0
 	mul	w0, w1, w0
 	bl	ftl_malloc
-.LVL761:
+.LVL763:
 	str	x0, [x22, #:lo12:.LANCHOR94]
 	.loc 3 335 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
@@ -6782,7 +6802,7 @@ FtlMemInit:
 	.loc 3 336 0
 	and	w0, w0, 65534
 	bl	ftl_malloc
-.LVL762:
+.LVL764:
 	adrp	x1, .LANCHOR126
 	str	x0, [x1, #:lo12:.LANCHOR126]
 	.loc 3 337 0
@@ -6793,7 +6813,7 @@ FtlMemInit:
 	.loc 3 338 0
 	lsl	w0, w0, 9
 	bl	ftl_malloc
-.LVL763:
+.LVL765:
 	adrp	x1, .LANCHOR127
 	.loc 3 345 0
 	ldrh	w28, [x20, #:lo12:.LANCHOR6]
@@ -6806,35 +6826,35 @@ FtlMemInit:
 	.loc 3 339 0
 	add	x0, x0, 32
 	str	x0, [x1, #:lo12:.LANCHOR40]
-.LVL764:
+.LVL766:
 	.loc 3 347 0
 	mov	w0, w28
 	bl	ftl_malloc
-.LVL765:
+.LVL767:
 	adrp	x1, .LANCHOR128
 	str	x0, [x1, #:lo12:.LANCHOR128]
 	.loc 3 349 0
 	mov	w0, w28
 	.loc 3 350 0
 	adrp	x28, .LANCHOR30
-.LVL766:
+.LVL768:
 	.loc 3 349 0
 	bl	ftl_malloc
-.LVL767:
+.LVL769:
 	str	x0, [x25, #:lo12:.LANCHOR43]
-.LVL768:
+.LVL770:
 	.loc 3 350 0
 	ldr	w1, [x28, #:lo12:.LANCHOR30]
 	lsl	w19, w1, 1
 	.loc 3 351 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL769:
+.LVL771:
 	str	x0, [x27, #:lo12:.LANCHOR129]
 	.loc 3 352 0
 	mov	w0, w19
 	bl	ftl_malloc
-.LVL770:
+.LVL772:
 	str	x0, [x26, #:lo12:.LANCHOR130]
 	.loc 3 353 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR6]
@@ -6844,21 +6864,21 @@ FtlMemInit:
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
-.LVL771:
+.LVL773:
 	adrp	x1, .LANCHOR1
 	str	x0, [x1, #:lo12:.LANCHOR1]
 	.loc 3 354 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL772:
+.LVL774:
 	adrp	x2, .LANCHOR36
 	str	x0, [x2, #:lo12:.LANCHOR36]
 	.loc 3 355 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-.LVL773:
+.LVL775:
 	adrp	x2, .LANCHOR131
 	str	x0, [x2, #:lo12:.LANCHOR131]
 	.loc 3 356 0
@@ -6866,7 +6886,7 @@ FtlMemInit:
 	adrp	x19, .LANCHOR40
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL774:
+.LVL776:
 	adrp	x1, .LANCHOR132
 	str	x0, [x1, #:lo12:.LANCHOR132]
 	.loc 3 357 0
@@ -6875,7 +6895,7 @@ FtlMemInit:
 	ldrh	w0, [x1, #:lo12:.LANCHOR28]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL775:
+.LVL777:
 	.loc 3 358 0
 	ldr	x1, [x29, 200]
 	.loc 3 357 0
@@ -6886,18 +6906,18 @@ FtlMemInit:
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL776:
+.LVL778:
 	.loc 3 360 0
 	adrp	x0, .LANCHOR32
 	ldrh	w0, [x0, #:lo12:.LANCHOR32]
 	.loc 3 361 0
 	lsl	w0, w0, 2
-.LVL777:
+.LVL779:
 	bl	ftl_malloc
-.LVL778:
+.LVL780:
 	adrp	x1, .LANCHOR134
 	str	x0, [x1, #:lo12:.LANCHOR134]
-.LVL779:
+.LVL781:
 	.loc 3 362 0
 	ldr	w0, [x28, #:lo12:.LANCHOR30]
 	.loc 3 364 0
@@ -6905,20 +6925,20 @@ FtlMemInit:
 	.loc 3 363 0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-.LVL780:
+.LVL782:
 	adrp	x1, .LANCHOR135
 	str	x0, [x1, #:lo12:.LANCHOR135]
-.LVL781:
+.LVL783:
 	.loc 3 364 0
 	ldrh	w0, [x28, #:lo12:.LANCHOR33]
 	.loc 3 365 0
 	lsl	w0, w0, 4
-.LVL782:
+.LVL784:
 	bl	ftl_malloc
-.LVL783:
+.LVL785:
 	adrp	x1, .LANCHOR56
 	str	x0, [x1, #:lo12:.LANCHOR56]
-.LVL784:
+.LVL786:
 	.loc 3 366 0
 	ldrh	w1, [x28, #:lo12:.LANCHOR33]
 	ldrh	w0, [x21, #:lo12:.LANCHOR23]
@@ -6926,12 +6946,12 @@ FtlMemInit:
 	adrp	x21, .LANCHOR10
 	.loc 3 367 0
 	mul	w0, w1, w0
-.LVL785:
+.LVL787:
 	bl	ftl_malloc
-.LVL786:
+.LVL788:
 	adrp	x1, .LANCHOR136
 	str	x0, [x1, #:lo12:.LANCHOR136]
-.LVL787:
+.LVL789:
 	.loc 3 369 0
 	mov	w0, 6
 	.loc 3 368 0
@@ -6940,9 +6960,9 @@ FtlMemInit:
 	adrp	x20, .LANCHOR137
 	.loc 3 369 0
 	mul	w0, w1, w0
-.LVL788:
+.LVL790:
 	bl	ftl_malloc
-.LVL789:
+.LVL791:
 	adrp	x1, .LANCHOR41
 	str	x0, [x1, #:lo12:.LANCHOR41]
 	.loc 3 370 0
@@ -6954,15 +6974,15 @@ FtlMemInit:
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x20, #:lo12:.LANCHOR137]
-.LVL790:
+.LVL792:
 	.loc 3 371 0
 	mul	w0, w1, w0
-.LVL791:
+.LVL793:
 	.loc 3 372 0
 	lsl	w0, w0, 2
-.LVL792:
+.LVL794:
 	bl	ftl_malloc
-.LVL793:
+.LVL795:
 	ldp	x3, x15, [x29, 104]
 	adrp	x1, .LANCHOR37
 	.loc 3 374 0
@@ -6977,7 +6997,7 @@ FtlMemInit:
 	ldp	x10, x8, [x29, 152]
 	.loc 3 372 0
 	str	x0, [x2, 32]
-.LVL794:
+.LVL796:
 	ldp	x7, x6, [x29, 168]
 	adrp	x17, .LANCHOR98
 	ldp	x5, x4, [x29, 184]
@@ -6987,11 +7007,11 @@ FtlMemInit:
 	add	x21, x2, 40
 	mov	x0, 1
 	str	x19, [x29, 200]
-.LVL795:
-.L474:
+.LVL797:
+.L475:
 	.loc 3 373 0 is_stmt 0 discriminator 1
 	cmp	w0, w28
-	bcc	.L475
+	bcc	.L476
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
@@ -6999,25 +7019,25 @@ FtlMemInit:
 	add	x1, x1, :lo12:.LANCHOR37
 	.loc 3 373 0
 	mov	x19, 0
-.L476:
+.L477:
 	add	x19, x19, 1
 	.loc 3 377 0 discriminator 1
 	cmp	x19, x2
-	bne	.L477
+	bne	.L478
 	.loc 3 383 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
-	cbnz	x0, .L478
-.L480:
+	cbnz	x0, .L479
+.L481:
 	.loc 3 385 0
 	adrp	x1, .LANCHOR138
 	adrp	x0, .LC82
 	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC82
 	bl	printf
-.LVL796:
+.LVL798:
 	.loc 3 386 0
 	mov	w0, -1
-.L473:
+.L474:
 	.loc 3 484 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7040,7 +7060,7 @@ FtlMemInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L475:
+.L476:
 	.cfi_restore_state
 	.loc 3 374 0 discriminator 3
 	ldr	x19, [x2, 32]
@@ -7050,122 +7070,122 @@ FtlMemInit:
 	add	x19, x19, x30, uxtw 2
 	add	w30, w30, w20
 	str	x19, [x21], 8
-	b	.L474
-.L477:
+	b	.L475
+.L478:
 	.loc 3 379 0 discriminator 2
 	add	x20, x0, x19
 	add	x20, x1, x20, lsl 3
 	str	xzr, [x20, 24]
-	b	.L476
-.L478:
+	b	.L477
+.L479:
 	.loc 3 388 0
 	ldr	x0, [x26, #:lo12:.LANCHOR130]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 393 0
 	adrp	x0, .LANCHOR134
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 398 0
 	adrp	x0, .LANCHOR135
 	ldr	x0, [x0, #:lo12:.LANCHOR135]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 404 0
 	adrp	x0, .LANCHOR56
 	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 409 0
 	adrp	x0, .LANCHOR136
 	ldr	x0, [x0, #:lo12:.LANCHOR136]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 414 0
 	adrp	x0, .LANCHOR41
 	ldr	x0, [x0, #:lo12:.LANCHOR41]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 419 0
 	adrp	x0, .LANCHOR37+32
 	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 425 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 430 0
 	ldr	x0, [x17, #:lo12:.LANCHOR98]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 430 0 is_stmt 0 discriminator 1
 	ldr	x0, [x16, #:lo12:.LANCHOR100]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 is_stmt 1
 	ldr	x0, [x15, #:lo12:.LANCHOR120]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 is_stmt 0 discriminator 1
 	ldr	x0, [x14, #:lo12:.LANCHOR122]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 discriminator 2
 	ldr	x0, [x13, #:lo12:.LANCHOR112]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 discriminator 3
 	ldr	x0, [x12, #:lo12:.LANCHOR95]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 435 0 discriminator 4
 	ldr	x0, [x11, #:lo12:.LANCHOR121]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 is_stmt 1
 	ldr	x0, [x10, #:lo12:.LANCHOR39]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 is_stmt 0 discriminator 1
 	ldr	x0, [x8, #:lo12:.LANCHOR123]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 discriminator 2
 	ldr	x0, [x7, #:lo12:.LANCHOR124]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 440 0 discriminator 3
 	ldr	x0, [x6, #:lo12:.LANCHOR93]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 441 0 is_stmt 1
 	ldr	x0, [x5, #:lo12:.LANCHOR116]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 441 0 is_stmt 0 discriminator 1
 	ldr	x0, [x4, #:lo12:.LANCHOR114]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 441 0 discriminator 2
 	ldr	x0, [x3, #:lo12:.LANCHOR92]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 446 0 is_stmt 1
 	ldr	x0, [x24, #:lo12:.LANCHOR109]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 446 0 is_stmt 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR115]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 446 0 discriminator 2
 	ldr	x0, [x22, #:lo12:.LANCHOR94]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 452 0 is_stmt 1
 	ldr	x0, [x29, 200]
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 452 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR126
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 458 0 is_stmt 1
 	adrp	x0, .LANCHOR36
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 464 0
 	adrp	x0, .LANCHOR131
 	ldr	x0, [x0, #:lo12:.LANCHOR131]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 470 0
 	adrp	x0, .LANCHOR132
 	ldr	x0, [x0, #:lo12:.LANCHOR132]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 476 0
 	adrp	x0, .LANCHOR133
 	ldr	x0, [x0, #:lo12:.LANCHOR133]
-	cbz	x0, .L480
+	cbz	x0, .L481
 	.loc 3 483 0
 	mov	w0, 0
-	b	.L473
+	b	.L474
 	.cfi_endproc
 .LFE206:
 	.size	FtlMemInit, .-FtlMemInit
@@ -7177,7 +7197,7 @@ FtlBbt2Bitmap:
 .LFB225:
 	.loc 4 66 0
 	.cfi_startproc
-.LVL797:
+.LVL799:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -7190,7 +7210,7 @@ FtlBbt2Bitmap:
 	mov	x22, x0
 	.loc 4 69 0
 	adrp	x0, .LANCHOR137
-.LVL798:
+.LVL800:
 	.loc 4 66 0
 	stp	x23, x24, [sp, 48]
 	.loc 4 74 0
@@ -7216,27 +7236,27 @@ FtlBbt2Bitmap:
 	.loc 4 69 0
 	lsl	w2, w2, 2
 	mov	w1, 0
-.LVL799:
+.LVL801:
 	mov	x0, x20
 	bl	ftl_memset
-.LVL800:
-.L578:
+.LVL802:
+.L579:
 	.loc 4 72 0
 	ldrh	w0, [x22, x19]
 	cmp	w0, w24
-	beq	.L575
+	beq	.L576
 	.loc 4 74 0
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bhi	.L577
+	bhi	.L578
 	.loc 4 74 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 74
 	mov	x1, x23
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL801:
-.L577:
+.LVL803:
+.L578:
 	.loc 4 75 0 is_stmt 1 discriminator 2
 	ldrh	w2, [x22, x19]
 	mov	w1, 1
@@ -7251,13 +7271,13 @@ FtlBbt2Bitmap:
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
 	.loc 4 70 0 discriminator 2
-	bne	.L578
-.L575:
+	bne	.L579
+.L576:
 	.loc 4 77 0
 	ldp	x19, x20, [sp, 16]
-.LVL802:
+.LVL804:
 	ldp	x21, x22, [sp, 32]
-.LVL803:
+.LVL805:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	.cfi_restore 30
@@ -7296,7 +7316,7 @@ FtlBbtMemInit:
 	.loc 4 152 0
 	mov	w1, 255
 	b	ftl_memset
-.LVL804:
+.LVL806:
 	.cfi_endproc
 .LFE227:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
@@ -7308,7 +7328,7 @@ FtlFreeSysBlkQueueInit:
 .LFB237:
 	.loc 2 76 0
 	.cfi_startproc
-.LVL805:
+.LVL807:
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
 	.cfi_offset 29, -16
@@ -7329,14 +7349,14 @@ FtlFreeSysBlkQueueInit:
 	strh	wzr, [x3, 2]
 	.loc 2 83 0
 	add	x0, x3, 8
-.LVL806:
+.LVL808:
 	.loc 2 80 0
 	strh	wzr, [x3, 4]
 	.loc 2 81 0
 	strh	wzr, [x3, 6]
 	.loc 2 83 0
 	bl	ftl_memset
-.LVL807:
+.LVL809:
 	.loc 2 85 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -7355,7 +7375,7 @@ load_l2p_region:
 .LFB253:
 	.loc 2 442 0
 	.cfi_startproc
-.LVL808:
+.LVL810:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7381,53 +7401,53 @@ load_l2p_region:
 	.cfi_offset 26, -8
 	.loc 2 446 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR32]
-.LVL809:
+.LVL811:
 	cmp	w0, w21
-	bcs	.L586
+	bcs	.L587
 	.loc 2 446 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
-.LVL810:
+.LVL812:
 	adrp	x0, .LC1
 	mov	w2, 446
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL811:
-.L586:
+.LVL813:
+.L587:
 	.loc 2 447 0 is_stmt 1
 	adrp	x26, .LANCHOR134
 	ubfiz	x0, x21, 2, 16
 	adrp	x22, .LANCHOR56
 	ldr	x1, [x26, #:lo12:.LANCHOR134]
 	ldr	w24, [x1, x0]
-.LVL812:
+.LVL814:
 	.loc 2 449 0
-	cbnz	w24, .L587
+	cbnz	w24, .L588
 	.loc 2 450 0
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
 	lsl	x19, x19, 4
-.LVL813:
+.LVL815:
 	adrp	x1, .LANCHOR23
 	add	x0, x0, x19
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL814:
+.LVL816:
 	.loc 2 451 0
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
 	add	x1, x0, x19
 	strh	w21, [x0, x19]
 	.loc 2 452 0
 	str	wzr, [x1, 4]
-.L588:
+.L589:
 	.loc 2 473 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL815:
+.LVL817:
 	ldp	x23, x24, [sp, 48]
-.LVL816:
+.LVL818:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -7443,8 +7463,8 @@ load_l2p_region:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL817:
-.L587:
+.LVL819:
+.L588:
 	.cfi_restore_state
 	.loc 2 456 0
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
@@ -7469,21 +7489,21 @@ load_l2p_region:
 	.loc 2 458 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL818:
+.LVL820:
 	.loc 2 459 0
 	ldr	x25, [x20, 16]
-.LVL819:
+.LVL821:
 	.loc 2 461 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L589
+	beq	.L590
 	.loc 2 462 0
 	mov	w2, w24
 	mov	w1, w21
 	adrp	x0, .LC83
 	add	x0, x0, :lo12:.LC83
 	bl	printf
-.LVL820:
+.LVL822:
 	.loc 2 463 0
 	ldr	x1, [x20, 16]
 	mov	w3, 4
@@ -7491,7 +7511,7 @@ load_l2p_region:
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC84
 	bl	rknand_print_hex
-.LVL821:
+.LVL823:
 	.loc 2 464 0
 	ldrh	w3, [x23, #:lo12:.LANCHOR32]
 	adrp	x0, .LC85
@@ -7499,12 +7519,12 @@ load_l2p_region:
 	mov	w2, 4
 	add	x0, x0, :lo12:.LC85
 	bl	rknand_print_hex
-.LVL822:
-.L589:
+.LVL824:
+.L590:
 	.loc 2 467 0
 	ldrh	w0, [x25, 8]
 	cmp	w0, w21
-	beq	.L590
+	beq	.L591
 	.loc 2 467 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR140
 	adrp	x0, .LC1
@@ -7512,8 +7532,8 @@ load_l2p_region:
 	add	x1, x1, :lo12:.LANCHOR140
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL823:
-.L590:
+.LVL825:
+.L591:
 	.loc 2 470 0 is_stmt 1
 	ldr	x0, [x22, #:lo12:.LANCHOR56]
 	add	x1, x0, x19
@@ -7521,7 +7541,7 @@ load_l2p_region:
 	.loc 2 471 0
 	strh	w21, [x0, x19]
 	.loc 2 472 0
-	b	.L588
+	b	.L589
 	.cfi_endproc
 .LFE253:
 	.size	load_l2p_region, .-load_l2p_region
@@ -7533,7 +7553,7 @@ ftl_free_no_use_map_blk:
 .LFB254:
 	.loc 2 476 0
 	.cfi_startproc
-.LVL824:
+.LVL826:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -7566,23 +7586,23 @@ ftl_free_no_use_map_blk:
 	lsl	w2, w2, 1
 	.loc 2 477 0
 	ldr	x23, [x0, 16]
-.LVL825:
+.LVL827:
 	.loc 2 485 0
 	mov	x0, x21
-.LVL826:
+.LVL828:
 	bl	ftl_memset
-.LVL827:
+.LVL829:
 	.loc 2 486 0
 	mov	w0, 0
-.LVL828:
-.L593:
+.LVL830:
+.L594:
 	.loc 2 486 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L597
+	bhi	.L598
 	.loc 2 494 0 is_stmt 1
 	ldrh	w26, [x21]
-.LVL829:
+.LVL831:
 	.loc 2 498 0
 	adrp	x24, .LANCHOR20
 	add	x24, x24, :lo12:.LANCHOR20
@@ -7590,22 +7610,22 @@ ftl_free_no_use_map_blk:
 	mov	w25, 0
 	.loc 2 497 0
 	mov	w20, 0
-.LVL830:
-.L598:
+.LVL832:
+.L599:
 	.loc 2 497 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L602
+	bhi	.L603
 	.loc 2 513 0 is_stmt 1
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
-.LVL831:
+.LVL833:
 	ldp	x21, x22, [sp, 32]
-.LVL832:
+.LVL834:
 	ldp	x23, x24, [sp, 48]
-.LVL833:
+.LVL835:
 	ldp	x25, x26, [sp, 64]
-.LVL834:
+.LVL836:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -7620,8 +7640,8 @@ ftl_free_no_use_map_blk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL835:
-.L597:
+.LVL837:
+.L598:
 	.cfi_restore_state
 	.loc 2 487 0
 	ubfiz	x1, x0, 2, 16
@@ -7630,82 +7650,82 @@ ftl_free_no_use_map_blk:
 	mov	w1, 0
 	.loc 2 487 0
 	ubfx	x2, x2, 10, 16
-.LVL836:
-.L594:
+.LVL838:
+.L595:
 	.loc 2 488 0 discriminator 1
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L596
+	bhi	.L597
 	.loc 2 486 0 discriminator 2
 	add	w0, w0, 1
-.LVL837:
+.LVL839:
 	and	w0, w0, 65535
-.LVL838:
-	b	.L593
-.L596:
+.LVL840:
+	b	.L594
+.L597:
 	.loc 2 489 0
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L595
+	bne	.L596
 	.loc 2 490 0
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L595:
+.L596:
 	.loc 2 488 0 discriminator 2
 	add	w1, w1, 1
-.LVL839:
-	and	w1, w1, 65535
-.LVL840:
-	b	.L594
 .LVL841:
-.L602:
+	and	w1, w1, 65535
+.LVL842:
+	b	.L595
+.LVL843:
+.L603:
 	.loc 2 498 0
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L599
+	bne	.L600
 	.loc 2 498 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L599
+	bcs	.L600
 	.loc 2 499 0 is_stmt 1
 	strh	w0, [x21, x22, lsl 1]
-.L599:
+.L600:
 	.loc 2 500 0
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L600
+	bls	.L601
 	mov	w25, w20
-.LVL842:
+.LVL844:
 	mov	w26, w0
-.LVL843:
-.L600:
+.LVL845:
+.L601:
 	.loc 2 504 0
-	cbnz	w0, .L601
+	cbnz	w0, .L602
 	.loc 2 504 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L601
+	cbz	w0, .L602
 	.loc 2 506 0 is_stmt 1
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL844:
+.LVL846:
 	.loc 2 507 0
 	strh	wzr, [x23, x22]
 	.loc 2 508 0
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L601:
+.L602:
 	.loc 2 497 0 discriminator 2
 	add	w20, w20, 1
-.LVL845:
+.LVL847:
 	and	w20, w20, 65535
-.LVL846:
-	b	.L598
+.LVL848:
+	b	.L599
 	.cfi_endproc
 .LFE254:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -7717,7 +7737,7 @@ Ftl_write_map_blk_to_last_page:
 .LFB257:
 	.loc 2 583 0
 	.cfi_startproc
-.LVL847:
+.LVL849:
 	stp	x29, x30, [sp, -64]!
 	.cfi_def_cfa_offset 64
 	.cfi_offset 29, -64
@@ -7733,12 +7753,12 @@ Ftl_write_map_blk_to_last_page:
 	mov	x19, x0
 	.loc 2 586 0
 	ldr	x20, [x0, 16]
-.LVL848:
+.LVL850:
 	.loc 2 583 0
 	stp	x21, x22, [sp, 32]
 	.loc 2 591 0
 	ldrh	w0, [x0]
-.LVL849:
+.LVL851:
 	.loc 2 583 0
 	str	x23, [sp, 48]
 	.cfi_offset 21, -32
@@ -7746,10 +7766,10 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_offset 23, -16
 	.loc 2 591 0
 	cmp	w0, w1
-	bne	.L608
+	bne	.L609
 	.loc 2 592 0
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L609
+	cbz	w0, .L610
 	.loc 2 592 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR141
 	adrp	x0, .LC1
@@ -7757,15 +7777,15 @@ Ftl_write_map_blk_to_last_page:
 	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL850:
-.L609:
+.LVL852:
+.L610:
 	.loc 2 593 0 is_stmt 1
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
 	.loc 2 594 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL851:
+.LVL853:
 	strh	w0, [x20]
 	.loc 2 597 0
 	ldr	w0, [x19, 48]
@@ -7777,13 +7797,13 @@ Ftl_write_map_blk_to_last_page:
 	strh	wzr, [x19]
 	.loc 2 597 0
 	str	w0, [x19, 48]
-.LVL852:
-.L610:
+.LVL854:
+.L611:
 	.loc 2 628 0
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-.LVL853:
+.LVL855:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	.cfi_remember_state
@@ -7796,8 +7816,8 @@ Ftl_write_map_blk_to_last_page:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL854:
-.L608:
+.LVL856:
+.L609:
 	.cfi_restore_state
 	.loc 2 601 0
 	ubfiz	x0, x0, 1, 16
@@ -7813,7 +7833,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w21, [x20, x0]
 	.loc 2 602 0
 	adrp	x20, .LANCHOR108
-.LVL855:
+.LVL857:
 	ldrh	w0, [x19, 2]
 	add	x2, x20, :lo12:.LANCHOR108
 	orr	w0, w0, w21, lsl 10
@@ -7822,7 +7842,7 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 604 0
 	str	x1, [x2, 16]
-.LVL856:
+.LVL858:
 	.loc 2 603 0
 	str	x0, [x2, 8]
 	.loc 2 607 0
@@ -7838,12 +7858,12 @@ Ftl_write_map_blk_to_last_page:
 	strh	w21, [x1, 2]
 	.loc 2 612 0
 	adrp	x1, .LANCHOR20
-.LVL857:
+.LVL859:
 	ldrh	w2, [x1, #:lo12:.LANCHOR20]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
-.LVL858:
+.LVL860:
 	.loc 2 614 0
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
@@ -7851,20 +7871,20 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x3, [x23, #:lo12:.LANCHOR39]
 	.loc 2 613 0
 	mov	w2, 0
-.LVL859:
-.L611:
+.LVL861:
+.L612:
 	.loc 2 614 0 discriminator 1
 	cmp	w4, w1, uxth
-	bhi	.L613
+	bhi	.L614
 	.loc 2 621 0
 	mov	w2, 1
-.LVL860:
+.LVL862:
 	mov	w3, 0
 	mov	w1, w2
-.LVL861:
+.LVL863:
 	add	x0, x20, :lo12:.LANCHOR108
 	bl	FlashProgPages
-.LVL862:
+.LVL864:
 	.loc 2 622 0
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
@@ -7872,20 +7892,20 @@ Ftl_write_map_blk_to_last_page:
 	.loc 2 626 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL863:
+.LVL865:
 	.loc 2 627 0
-	b	.L610
-.LVL864:
-.L613:
+	b	.L611
+.LVL866:
+.L614:
 	.loc 2 615 0
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L612
+	bne	.L613
 	.loc 2 616 0
 	add	w2, w2, 1
-.LVL865:
+.LVL867:
 	and	w2, w2, 65535
-.LVL866:
+.LVL868:
 	.loc 2 617 0
 	ubfiz	x0, x2, 1, 16
 	str	w1, [x3, x0, lsl 2]
@@ -7893,11 +7913,11 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L612:
-.LVL867:
+.L613:
+.LVL869:
 	add	x1, x1, 1
-.LVL868:
-	b	.L611
+.LVL870:
+	b	.L612
 	.cfi_endproc
 .LFE257:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -7909,7 +7929,7 @@ FtlMapWritePage:
 .LFB258:
 	.loc 2 631 0
 	.cfi_startproc
-.LVL869:
+.LVL871:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -7952,8 +7972,8 @@ FtlMapWritePage:
 	.cfi_offset 22, -72
 	.loc 2 634 0
 	mov	w22, 0
-.LVL870:
-.L619:
+.LVL872:
+.L620:
 	.loc 2 637 0
 	ldr	w0, [x23]
 	.loc 2 638 0
@@ -7965,44 +7985,44 @@ FtlMapWritePage:
 	ldrh	w0, [x26, #:lo12:.LANCHOR20]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L620
+	bge	.L621
 	.loc 2 638 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L621
-.L620:
+	bne	.L622
+.L621:
 	.loc 2 639 0 is_stmt 1
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.LVL871:
-.L621:
+.LVL873:
+.L622:
 	.loc 2 650 0
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L622
+	cbnz	w0, .L623
 	.loc 2 650 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 650
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL872:
-.L622:
+.LVL874:
+.L623:
 	.loc 2 651 0 is_stmt 1
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L623
+	bcc	.L624
 	.loc 2 651 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 651
 	mov	x1, x24
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL873:
-.L623:
+.LVL875:
+.L624:
 	.loc 2 652 0 is_stmt 1
 	ldrh	w1, [x19]
 	.loc 2 654 0
@@ -8015,7 +8035,7 @@ FtlMapWritePage:
 	mov	w2, 16
 	.loc 2 652 0
 	ldrh	w3, [x0, x1, lsl 1]
-.LVL874:
+.LVL876:
 	.loc 2 658 0
 	mov	w1, 0
 	.loc 2 654 0
@@ -8032,10 +8052,10 @@ FtlMapWritePage:
 	str	x0, [x20, 16]
 	.loc 2 658 0
 	bl	ftl_memset
-.LVL875:
+.LVL877:
 	.loc 2 659 0
 	ldr	x0, [x20, 16]
-.LVL876:
+.LVL878:
 	.loc 2 660 0
 	ldr	w1, [x19, 48]
 	.loc 2 663 0
@@ -8055,9 +8075,9 @@ FtlMapWritePage:
 	mov	w1, w3
 	mov	w2, w3
 	mov	x0, x20
-.LVL877:
+.LVL879:
 	bl	FlashProgPages
-.LVL878:
+.LVL880:
 	.loc 2 665 0
 	ldrh	w0, [x19, 2]
 	.loc 2 667 0
@@ -8068,30 +8088,30 @@ FtlMapWritePage:
 	strh	w0, [x19, 2]
 	.loc 2 667 0
 	cmn	w1, #1
-	bne	.L624
+	bne	.L625
 	.loc 2 668 0
 	ldr	w1, [x20, 4]
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	.loc 2 669 0
 	add	w22, w22, 1
-.LVL879:
+.LVL881:
 	and	w22, w22, 65535
 	.loc 2 668 0
 	bl	printf
-.LVL880:
+.LVL882:
 	.loc 2 670 0
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L625
+	bhi	.L626
 	.loc 2 671 0
 	ldrh	w0, [x28]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L625:
+.L626:
 	.loc 2 673 0
 	cmp	w22, 3
-	bls	.L626
+	bls	.L627
 	.loc 2 674 0
 	add	x21, x21, :lo12:.LANCHOR108
 	adrp	x0, .LC87
@@ -8099,36 +8119,36 @@ FtlMapWritePage:
 	add	x0, x0, :lo12:.LC87
 	ldr	w1, [x21, 4]
 	bl	printf
-.LVL881:
+.LVL883:
+.L628:
+	b	.L628
 .L627:
-	b	.L627
-.L626:
 	.loc 2 678 0
 	ldr	w0, [x19, 52]
-	cbz	w0, .L619
-.L636:
-	b	.L636
-.L624:
+	cbz	w0, .L620
+.L637:
+	b	.L637
+.L625:
 	.loc 2 682 0
 	cmp	w0, 1
-	beq	.L619
+	beq	.L620
 	.loc 2 685 0
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	.loc 2 687 0
 	ldp	x21, x22, [sp, 32]
-.LVL882:
+.LVL884:
 	ldp	x23, x24, [sp, 48]
 	ldp	x27, x28, [sp, 80]
-.LVL883:
+.LVL885:
 	.loc 2 685 0
 	str	w1, [x0, w25, uxtw 2]
 	.loc 2 687 0
 	ldp	x19, x20, [sp, 16]
-.LVL884:
+.LVL886:
 	mov	w0, 0
 	ldp	x25, x26, [sp, 64]
-.LVL885:
+.LVL887:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -8143,7 +8163,7 @@ FtlMapWritePage:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL886:
+.LVL888:
 	ret
 	.cfi_endproc
 .LFE258:
@@ -8156,7 +8176,7 @@ ftl_map_blk_gc:
 .LFB256:
 	.loc 2 537 0
 	.cfi_startproc
-.LVL887:
+.LVL889:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -8182,29 +8202,29 @@ ftl_map_blk_gc:
 	.cfi_offset 28, -8
 	.loc 2 541 0
 	ldr	x20, [x0, 16]
-.LVL888:
+.LVL890:
 	.loc 2 542 0
 	ldr	x24, [x0, 40]
-.LVL889:
+.LVL891:
 	.loc 2 545 0
 	bl	ftl_free_no_use_map_blk
-.LVL890:
+.LVL892:
 	.loc 2 547 0
 	ldrh	w1, [x19, 10]
 	ldrh	w2, [x19, 8]
 	sub	w1, w1, #4
 	cmp	w2, w1
-	blt	.L639
+	blt	.L640
 	.loc 2 548 0
 	ubfiz	x0, x0, 1, 16
-.LVL891:
+.LVL893:
 	ldrh	w21, [x20, x0]
-.LVL892:
+.LVL894:
 	.loc 2 549 0
-	cbz	w21, .L639
+	cbz	w21, .L640
 	.loc 2 549 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L639
+	cbnz	w1, .L640
 	.loc 2 550 0 is_stmt 1
 	mov	w1, 1
 	str	w1, [x19, 52]
@@ -8220,12 +8240,12 @@ ftl_map_blk_gc:
 	.loc 2 553 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L640
+	bcc	.L641
 	.loc 2 554 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL893:
-.L640:
+.LVL895:
+.L641:
 	.loc 2 558 0 discriminator 1
 	adrp	x25, .LANCHOR108
 	.loc 2 564 0 discriminator 1
@@ -8236,38 +8256,38 @@ ftl_map_blk_gc:
 	add	x22, x22, :lo12:.LANCHOR143
 	.loc 2 537 0 discriminator 1
 	mov	w20, 0
-.LVL894:
-.L641:
+.LVL896:
+.L642:
 	.loc 2 556 0 discriminator 1
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L645
+	bhi	.L646
 	.loc 2 572 0
 	mov	w1, 1
 	mov	w0, w21
 	bl	FtlFreeSysBlkQueueIn
-.LVL895:
+.LVL897:
 	.loc 2 573 0
 	str	wzr, [x19, 52]
-.LVL896:
-.L639:
+.LVL898:
+.L640:
 	.loc 2 577 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bcc	.L646
+	bcc	.L647
 	.loc 2 578 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL897:
-.L646:
+.LVL899:
+.L647:
 	.loc 2 580 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL898:
+.LVL900:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL899:
+.LVL901:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
@@ -8286,14 +8306,14 @@ ftl_map_blk_gc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL900:
-.L645:
+.LVL902:
+.L646:
 	.cfi_restore_state
 	.loc 2 557 0
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x24, x27]
 	cmp	w21, w1, lsr 10
-	bne	.L642
+	bne	.L643
 	.loc 2 558 0
 	adrp	x2, .LANCHOR123
 	add	x0, x25, :lo12:.LANCHOR108
@@ -8305,7 +8325,7 @@ ftl_map_blk_gc:
 	str	w1, [x0, 4]
 	.loc 2 559 0
 	ldr	x28, [x2, #:lo12:.LANCHOR109]
-.LVL901:
+.LVL903:
 	.loc 2 562 0
 	mov	w2, 1
 	.loc 2 559 0
@@ -8313,42 +8333,42 @@ ftl_map_blk_gc:
 	.loc 2 562 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL902:
+.LVL904:
 	.loc 2 564 0
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L643
+	beq	.L644
 	.loc 2 564 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 564
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL903:
-.L643:
+.LVL905:
+.L644:
 	.loc 2 565 0 is_stmt 1
 	ldr	w0, [x26]
 	cmn	w0, #1
-	bne	.L644
+	bne	.L645
 	.loc 2 566 0
 	str	wzr, [x24, x27]
-.LVL904:
-.L642:
+.LVL906:
+.L643:
 	.loc 2 556 0 discriminator 2
 	add	w20, w20, 1
-.LVL905:
-	and	w20, w20, 65535
-.LVL906:
-	b	.L641
 .LVL907:
-.L644:
+	and	w20, w20, 65535
+.LVL908:
+	b	.L642
+.LVL909:
+.L645:
 	.loc 2 568 0
 	ldr	x2, [x26, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-.LVL908:
-	b	.L642
+.LVL910:
+	b	.L643
 	.cfi_endproc
 .LFE256:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
@@ -8360,7 +8380,7 @@ flush_l2p_region:
 .LFB259:
 	.loc 2 690 0
 	.cfi_startproc
-.LVL909:
+.LVL911:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -8374,17 +8394,17 @@ flush_l2p_region:
 	adrp	x20, .LANCHOR56
 	ubfiz	x19, x0, 4, 16
 	ldr	x0, [x20, #:lo12:.LANCHOR56]
-.LVL910:
+.LVL912:
 	add	x1, x0, x19
-.LVL911:
+.LVL913:
 	.loc 2 694 0
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
-.LVL912:
+.LVL914:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapWritePage
-.LVL913:
+.LVL915:
 	.loc 2 695 0
 	ldr	x0, [x20, #:lo12:.LANCHOR56]
 	add	x0, x0, x19
@@ -8414,7 +8434,7 @@ log2phys:
 .LFB262:
 	.loc 2 753 0
 	.cfi_startproc
-.LVL914:
+.LVL916:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8427,7 +8447,7 @@ log2phys:
 	mov	x23, x1
 	.loc 2 756 0
 	adrp	x1, .LANCHOR22
-.LVL915:
+.LVL917:
 	.loc 2 753 0
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
@@ -8448,7 +8468,7 @@ log2phys:
 	.loc 2 756 0
 	lsr	w22, w0, w1
 	and	w22, w22, 65535
-.LVL916:
+.LVL918:
 	.loc 2 757 0
 	lsl	x19, x19, x1
 	.loc 2 759 0
@@ -8460,21 +8480,21 @@ log2phys:
 	.loc 2 757 0
 	and	w19, w19, w0
 	and	x19, x19, 65535
-.LVL917:
+.LVL919:
 	.loc 2 759 0
 	cmp	w0, w1
-	bcc	.L654
+	bcc	.L655
 	.loc 2 759 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR145
 	adrp	x0, .LC1
-.LVL918:
+.LVL920:
 	mov	w2, 759
-.LVL919:
+.LVL921:
 	add	x1, x1, :lo12:.LANCHOR145
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL920:
-.L654:
+.LVL922:
+.L655:
 	.loc 2 762 0 is_stmt 1
 	adrp	x21, .LANCHOR56
 	.loc 2 761 0
@@ -8484,18 +8504,18 @@ log2phys:
 	.loc 2 761 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR33]
 	mov	x0, 0
-.LVL921:
-.L655:
+.LVL923:
+.L656:
 	and	x20, x0, 65535
-.LVL922:
+.LVL924:
 	.loc 2 761 0 is_stmt 0 discriminator 1
 	cmp	w20, w1
-	bcc	.L660
+	bcc	.L661
 	.loc 2 776 0 is_stmt 1
 	bl	select_l2p_ram_region
-.LVL923:
+.LVL925:
 	and	x20, x0, 65535
-.LVL924:
+.LVL926:
 	.loc 2 777 0
 	ldr	x2, [x21, #:lo12:.LANCHOR56]
 	ubfiz	x1, x20, 4, 16
@@ -8506,61 +8526,61 @@ log2phys:
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L661
+	beq	.L662
 	.loc 2 777 0 is_stmt 0 discriminator 1
 	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L661
+	tbz	w1, #31, .L662
 	.loc 2 778 0 is_stmt 1
 	bl	flush_l2p_region
-.LVL925:
-.L661:
+.LVL927:
+.L662:
 	.loc 2 781 0
 	mov	w1, w25
 	mov	w0, w22
 	bl	load_l2p_region
-.LVL926:
+.LVL928:
 	.loc 2 782 0
-	b	.L656
-.LVL927:
-.L660:
+	b	.L657
+.LVL929:
+.L661:
 	add	x0, x0, 1
 	.loc 2 762 0
 	add	x3, x2, x0, lsl 4
 	ldrh	w3, [x3, -16]
 	cmp	w3, w22
-	bne	.L655
-.LVL928:
-.L656:
+	bne	.L656
+.LVL930:
+.L657:
 	.loc 2 765 0
 	ldr	x0, [x21, #:lo12:.LANCHOR56]
 	add	x0, x0, x20, lsl 4
 	.loc 2 764 0
-	cbnz	w24, .L657
+	cbnz	w24, .L658
 	.loc 2 765 0
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x19, lsl 2]
 	str	w0, [x23]
-.L658:
+.L659:
 	.loc 2 771 0
 	ldr	x0, [x21, #:lo12:.LANCHOR56]
 	add	x20, x0, x20, lsl 4
-.LVL929:
+.LVL931:
 	ldr	w0, [x20, 4]
 	cmn	w0, #1
-	beq	.L663
+	beq	.L664
 	.loc 2 772 0
 	add	w0, w0, 1
 	str	w0, [x20, 4]
-.L663:
+.L664:
 	.loc 2 783 0
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-.LVL930:
+.LVL932:
 	ldp	x21, x22, [sp, 32]
-.LVL931:
+.LVL933:
 	ldp	x23, x24, [sp, 48]
-.LVL932:
+.LVL934:
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
 	.cfi_restore 30
@@ -8574,8 +8594,8 @@ log2phys:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL933:
-.L657:
+.LVL935:
+.L658:
 	.cfi_restore_state
 	.loc 2 767 0
 	ldr	x1, [x0, 8]
@@ -8588,7 +8608,7 @@ log2phys:
 	.loc 2 769 0
 	adrp	x0, .LANCHOR57
 	strh	w22, [x0, #:lo12:.LANCHOR57]
-	b	.L658
+	b	.L659
 	.cfi_endproc
 .LFE262:
 	.size	log2phys, .-log2phys
@@ -8600,7 +8620,7 @@ FtlReUsePrevPpa:
 .LFB280:
 	.loc 2 1628 0
 	.cfi_startproc
-.LVL934:
+.LVL936:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -8618,7 +8638,7 @@ FtlReUsePrevPpa:
 	str	w1, [x29, 76]
 	.loc 2 1629 0
 	lsr	w0, w1, 10
-.LVL935:
+.LVL937:
 	.loc 2 1628 0
 	str	x23, [sp, 48]
 	.cfi_offset 19, -64
@@ -8626,22 +8646,22 @@ FtlReUsePrevPpa:
 	.cfi_offset 23, -32
 	.loc 2 1629 0
 	bl	P2V_block_in_plane
-.LVL936:
+.LVL938:
 	.loc 2 1631 0
 	ldr	x2, [x22, #:lo12:.LANCHOR43]
 	.loc 2 1629 0
 	and	w3, w0, 65535
-.LVL937:
+.LVL939:
 	.loc 2 1631 0
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L669
+	cbnz	w1, .L670
 	.loc 2 1632 0
 	adrp	x0, .LANCHOR47
-.LVL938:
+.LVL940:
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-	cbz	x19, .L670
-.LBB221:
+	cbz	x19, .L671
+.LBB225:
 	.loc 2 1636 0
 	adrp	x2, .LANCHOR41
 	mov	x5, -6148914691236517206
@@ -8654,7 +8674,7 @@ FtlReUsePrevPpa:
 	mov	w6, 65535
 	.loc 2 1635 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR48]
-.LVL939:
+.LVL941:
 	.loc 2 1636 0
 	sub	x19, x19, x2
 	asr	x19, x19, 1
@@ -8663,22 +8683,22 @@ FtlReUsePrevPpa:
 	mov	w5, 6
 	.loc 2 1636 0
 	and	w19, w19, 65535
-.LVL940:
-.L671:
+.LVL942:
+.L672:
 	.loc 2 1637 0 discriminator 1
 	cmp	w1, w4
-	beq	.L670
+	beq	.L671
 	.loc 2 1638 0
 	cmp	w19, w3
-	bne	.L672
+	bne	.L673
 	.loc 2 1639 0
 	mov	w1, w19
-.LVL941:
+.LVL943:
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_remove_node
-.LVL942:
+.LVL944:
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
-	cbnz	w0, .L673
+	cbnz	w0, .L674
 	.loc 2 1639 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR146
 	adrp	x0, .LC1
@@ -8686,8 +8706,8 @@ FtlReUsePrevPpa:
 	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL943:
-.L673:
+.LVL945:
+.L674:
 	.loc 2 1639 0 discriminator 3
 	ldrh	w0, [x23, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
@@ -8695,25 +8715,25 @@ FtlReUsePrevPpa:
 	.loc 2 1640 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL944:
+.LVL946:
 	.loc 2 1641 0 discriminator 3
 	ldr	x1, [x22, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.LVL945:
-.L670:
-.LBE221:
+.LVL947:
+.L671:
+.LBE225:
 	.loc 2 1652 0
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
 	bl	log2phys
-.LVL946:
+.LVL948:
 	.loc 2 1653 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL947:
+.LVL949:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	.cfi_remember_state
@@ -8726,30 +8746,30 @@ FtlReUsePrevPpa:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL948:
-.L672:
+.LVL950:
+.L673:
 	.cfi_restore_state
-.LBB222:
+.LBB226:
 	.loc 2 1644 0
 	umull	x19, w19, w5
-.LVL949:
+.LVL951:
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L670
-.LVL950:
+	beq	.L671
+.LVL952:
 	.loc 2 1637 0 discriminator 2
 	add	w1, w1, 1
-.LVL951:
-	and	w1, w1, 65535
-.LVL952:
-	b	.L671
 .LVL953:
-.L669:
-.LBE222:
+	and	w1, w1, 65535
+.LVL954:
+	b	.L672
+.LVL955:
+.L670:
+.LBE226:
 	.loc 2 1650 0
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L670
+	b	.L671
 	.cfi_endproc
 .LFE280:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
@@ -8794,15 +8814,15 @@ ftl_scan_all_data:
 	.cfi_offset 23, -32
 	.loc 2 2280 0
 	bl	printf
-.LVL954:
-.L680:
+.LVL956:
+.L681:
 	.loc 2 2281 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L686
+	bcc	.L687
 	.loc 2 2303 0
 	ldp	x19, x20, [sp, 32]
-.LVL955:
+.LVL957:
 	ldp	x21, x22, [sp, 48]
 	ldp	x29, x30, [sp, 16]
 	ldr	x23, [sp, 64]
@@ -8817,30 +8837,30 @@ ftl_scan_all_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL956:
-.L686:
+.LVL958:
+.L687:
 	.cfi_restore_state
 	.loc 2 2282 0
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w19
 	bl	log2phys
-.LVL957:
+.LVL959:
 	.loc 2 2283 0
 	tst	x19, 2047
-	bne	.L681
+	bne	.L682
 	.loc 2 2284 0
 	ldr	w2, [x29, 76]
 	adrp	x0, .LC89
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC89
 	bl	printf
-.LVL958:
-.L681:
+.LVL960:
+.L682:
 	.loc 2 2285 0
 	ldr	w1, [x29, 76]
 	cmn	w1, #1
-	beq	.L683
+	beq	.L684
 	.loc 2 2286 0
 	add	x0, x20, :lo12:.LANCHOR108
 	.loc 2 2290 0
@@ -8859,24 +8879,24 @@ ftl_scan_all_data:
 	.loc 2 2289 0
 	adrp	x1, .LANCHOR109
 	ldr	x23, [x1, #:lo12:.LANCHOR109]
-.LVL959:
+.LVL961:
 	.loc 2 2292 0
 	mov	w1, 1
 	.loc 2 2289 0
 	str	x23, [x0, 16]
 	.loc 2 2292 0
 	bl	FlashReadPages
-.LVL960:
+.LVL962:
 	.loc 2 2293 0
 	ldr	w0, [x20, #:lo12:.LANCHOR108]
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
-	beq	.L684
+	beq	.L685
 	.loc 2 2294 0
 	ldr	w0, [x23, 8]
 	cmp	w19, w0
-	beq	.L683
-.L684:
+	beq	.L684
+.L685:
 	.loc 2 2297 0
 	ldp	x1, x0, [x22, 8]
 	ldr	w2, [x1, 4]
@@ -8889,12 +8909,12 @@ ftl_scan_all_data:
 	add	x0, x0, :lo12:.LC90
 	mov	w1, w19
 	bl	printf
-.LVL961:
-.L683:
+.LVL963:
+.L684:
 	.loc 2 2281 0 discriminator 2
 	add	w19, w19, 1
-.LVL962:
-	b	.L680
+.LVL964:
+	b	.L681
 	.cfi_endproc
 .LFE291:
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
@@ -8906,18 +8926,18 @@ FtlReadRefresh:
 .LFB318:
 	.loc 5 419 0
 	.cfi_startproc
-.LVL963:
+.LVL965:
 	.loc 5 425 0
 	adrp	x1, .LANCHOR83
 	add	x0, x1, :lo12:.LANCHOR83
 	ldr	w2, [x0, 80]
-	cbz	w2, .L689
+	cbz	w2, .L690
 	.loc 5 426 0
 	adrp	x1, .LANCHOR62
 	ldr	w3, [x0, 84]
 	ldr	w2, [x1, #:lo12:.LANCHOR62]
 	cmp	w3, w2
-	bcs	.L690
+	bcs	.L691
 	.loc 5 419 0
 	stp	x29, x30, [sp, -160]!
 	.cfi_def_cfa_offset 160
@@ -8928,31 +8948,31 @@ FtlReadRefresh:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -144
 	.cfi_offset 20, -136
-.LBB228:
-.LBB229:
+.LBB232:
+.LBB233:
 	.loc 5 428 0
 	mov	x19, x0
 	add	x20, x1, :lo12:.LANCHOR62
-.LBE229:
-.LBE228:
+.LBE233:
+.LBE232:
 	.loc 5 419 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -128
 	mov	w21, 2048
-.L695:
-.LVL964:
-.LBB234:
-.LBB231:
+.L696:
+.LVL966:
+.LBB238:
+.LBB235:
 	.loc 5 428 0
 	ldr	w0, [x19, 84]
 	ldr	w1, [x20]
 	cmp	w0, w1
-	bcs	.L692
+	bcs	.L693
 	.loc 5 430 0
 	add	x1, x29, 60
 	mov	w2, 0
 	bl	log2phys
-.LVL965:
+.LVL967:
 	.loc 5 431 0
 	ldr	w0, [x19, 84]
 	.loc 5 432 0
@@ -8962,8 +8982,8 @@ FtlReadRefresh:
 	str	w0, [x19, 84]
 	.loc 5 432 0
 	cmn	w1, #1
-	beq	.L693
-.LBB230:
+	beq	.L694
+.LBB234:
 	.loc 5 435 0
 	str	w0, [x29, 88]
 	.loc 5 436 0
@@ -8984,29 +9004,29 @@ FtlReadRefresh:
 	str	wzr, [x0, -96]!
 	.loc 5 439 0
 	bl	FlashReadPages
-.LVL966:
+.LVL968:
 	.loc 5 440 0
 	ldr	w0, [x29, 64]
 	cmp	w0, 256
-	bne	.L692
+	bne	.L693
 	.loc 5 442 0
 	ldr	w0, [x29, 60]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL967:
+.LVL969:
 	bl	FtlGcRefreshBlock
-.LVL968:
-.L692:
-.LBE230:
-.LBE231:
+.LVL970:
+.L693:
 .LBE234:
+.LBE235:
+.LBE238:
 	.loc 5 466 0
 	ldp	x19, x20, [sp, 16]
-.LBB235:
-.LBB232:
+.LBB239:
+.LBB236:
 	mov	w0, -1
-.LBE232:
-.LBE235:
+.LBE236:
+.LBE239:
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 160
 	.cfi_remember_state
@@ -9017,26 +9037,26 @@ FtlReadRefresh:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL969:
-.L693:
+.LVL971:
+.L694:
 	.cfi_restore_state
-.LBB236:
-.LBB233:
+.LBB240:
+.LBB237:
 	.loc 5 427 0
 	subs	w21, w21, #1
-.LVL970:
-	bne	.L695
-	b	.L692
-.LVL971:
-.L690:
+.LVL972:
+	bne	.L696
+	b	.L693
+.LVL973:
+.L691:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_restore 21
 	.cfi_restore 29
 	.cfi_restore 30
-.LBE233:
-.LBE236:
+.LBE237:
+.LBE240:
 	.loc 5 451 0
 	adrp	x1, .LANCHOR63
 	.loc 5 450 0
@@ -9045,21 +9065,21 @@ FtlReadRefresh:
 	ldr	w1, [x1, #:lo12:.LANCHOR63]
 	.loc 5 449 0
 	stp	w1, wzr, [x0, 76]
-.L699:
+.L700:
 	.loc 5 420 0
 	mov	w0, 0
 	.loc 5 465 0
 	ret
-.L689:
-.LVL972:
-.LBB237:
+.L690:
+.LVL974:
+.LBB241:
 	.loc 5 456 0
 	ldr	w4, [x0, 76]
 	adrp	x0, .LANCHOR63
 	ldr	w2, [x0, #:lo12:.LANCHOR63]
 	add	w0, w2, 1048576
 	cmp	w4, w0
-	bhi	.L698
+	bhi	.L699
 	.loc 5 454 0
 	adrp	x0, .LANCHOR77
 	ldr	w0, [x0, #:lo12:.LANCHOR77]
@@ -9069,12 +9089,12 @@ FtlReadRefresh:
 	.loc 5 457 0
 	add	w0, w0, w4
 	cmp	w2, w0
-	bhi	.L698
+	bhi	.L699
 	.loc 5 458 0
 	adrp	x0, .LANCHOR79+28
 	ldrb	w0, [x0, #:lo12:.LANCHOR79+28]
-	cbnz	w0, .L699
-.L698:
+	cbnz	w0, .L700
+.L699:
 	.loc 5 460 0
 	add	x0, x1, :lo12:.LANCHOR83
 	mov	w1, 1
@@ -9082,8 +9102,8 @@ FtlReadRefresh:
 	str	wzr, [x0, 84]
 	.loc 5 460 0
 	stp	w2, w1, [x0, 76]
-	b	.L699
-.LBE237:
+	b	.L700
+.LBE241:
 	.cfi_endproc
 .LFE318:
 	.size	FtlReadRefresh, .-FtlReadRefresh
@@ -9095,16 +9115,16 @@ FtlMapBlkWriteDump_data:
 .LFB267:
 	.loc 2 897 0
 	.cfi_startproc
-.LVL973:
+.LVL975:
 	.loc 2 903 0
 	ldr	w1, [x0, 56]
-	cbz	w1, .L705
+	cbz	w1, .L706
 	.loc 2 897 0
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
 	.cfi_offset 30, -40
-.LVL974:
+.LVL976:
 	.loc 2 907 0
 	adrp	x1, .LANCHOR108
 	.loc 2 908 0
@@ -9120,7 +9140,7 @@ FtlMapBlkWriteDump_data:
 	ldrh	w20, [x0, 6]
 	.loc 2 907 0
 	adrp	x0, .LANCHOR123
-.LVL975:
+.LVL977:
 	.loc 2 908 0
 	ldr	x2, [x2, #:lo12:.LANCHOR109]
 	.loc 2 907 0
@@ -9144,18 +9164,18 @@ FtlMapBlkWriteDump_data:
 	mov	x21, x1
 	.loc 2 930 0
 	ldr	w2, [x4, x2]
-.LVL976:
+.LVL978:
 	.loc 2 931 0
 	str	w2, [x0, 4]
 	.loc 2 932 0
-	cbz	w2, .L707
+	cbz	w2, .L708
 	.loc 2 934 0
 	mov	w2, 1
-.LVL977:
+.LVL979:
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL978:
-.L708:
+.LVL980:
+.L709:
 	.loc 2 941 0
 	add	x1, x21, :lo12:.LANCHOR108
 	mov	x0, x19
@@ -9166,7 +9186,7 @@ FtlMapBlkWriteDump_data:
 	mov	w1, w20
 	.loc 2 943 0
 	ldp	x19, x20, [sp, 16]
-.LVL979:
+.LVL981:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -9177,20 +9197,20 @@ FtlMapBlkWriteDump_data:
 	.cfi_def_cfa 31, 0
 	.loc 2 941 0
 	b	FtlMapWritePage
-.LVL980:
-.L707:
+.LVL982:
+.L708:
 	.cfi_restore_state
 	.loc 2 938 0
 	adrp	x0, .LANCHOR23
 	mov	w1, 255
 	ldrh	w2, [x0, #:lo12:.LANCHOR23]
-.LVL981:
+.LVL983:
 	mov	x0, x3
 	bl	ftl_memset
-.LVL982:
-	b	.L708
-.LVL983:
-.L705:
+.LVL984:
+	b	.L709
+.LVL985:
+.L706:
 	.cfi_def_cfa 31, 0
 	.cfi_restore 19
 	.cfi_restore 20
@@ -9260,7 +9280,7 @@ FtlScanSysBlk:
 	strh	wzr, [x23, #:lo12:.LANCHOR35]
 	.loc 2 1103 0
 	bl	ftl_memset
-.LVL984:
+.LVL986:
 	.loc 2 1104 0
 	ldr	x0, [x27, #:lo12:.LANCHOR129]
 	mov	w1, 0
@@ -9274,34 +9294,34 @@ FtlScanSysBlk:
 	.loc 2 1104 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL985:
+.LVL987:
 	.loc 2 1105 0
 	ldr	x0, [x22, #:lo12:.LANCHOR132]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-.LVL986:
+.LVL988:
 	.loc 2 1106 0
 	ldr	x0, [x28, #:lo12:.LANCHOR36]
 	mov	w1, 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL987:
+.LVL989:
 	.loc 2 1107 0
 	mov	w2, 12
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR81
 	bl	ftl_memset
-.LVL988:
+.LVL990:
 	.loc 2 1109 0
 	adrp	x0, .LANCHOR5
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	str	w0, [x29, 172]
-.LVL989:
+.LVL991:
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 120]
@@ -9309,13 +9329,13 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR71
 	add	x0, x0, :lo12:.LANCHOR71
 	str	x0, [x29, 112]
-.L713:
+.L714:
 	.loc 2 1109 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L753
+	bls	.L754
 	.loc 2 1113 0 discriminator 1
 	adrp	x0, .LANCHOR3
 	.loc 2 1118 0 discriminator 1
@@ -9342,20 +9362,20 @@ FtlScanSysBlk:
 	ldr	x10, [x0, #:lo12:.LANCHOR94]
 	adrp	x0, .LANCHOR24
 	ldrh	w8, [x0, #:lo12:.LANCHOR24]
-	b	.L754
-.LVL990:
-.L715:
+	b	.L755
+.LVL992:
+.L716:
 	.loc 2 1115 0
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
-.LVL991:
+.LVL993:
 	and	w4, w0, 65535
-.LVL992:
+.LVL994:
 	.loc 2 1116 0
 	bl	FtlBbmIsBadBlock
-.LVL993:
-	cbnz	w0, .L714
+.LVL995:
+	cbnz	w0, .L715
 	.loc 2 1118 0
 	ubfiz	x0, x22, 5, 16
 	.loc 2 1120 0
@@ -9364,12 +9384,12 @@ FtlScanSysBlk:
 	add	x0, x7, x0
 	.loc 2 1121 0
 	add	w22, w22, 1
-.LVL994:
+.LVL996:
 	and	w22, w22, 65535
-.LVL995:
+.LVL997:
 	.loc 2 1118 0
 	lsl	w4, w4, 10
-.LVL996:
+.LVL998:
 	.loc 2 1120 0
 	asr	w1, w1, 2
 	add	x1, x10, x1, sxtw 2
@@ -9377,43 +9397,43 @@ FtlScanSysBlk:
 	str	w4, [x0, 4]
 	.loc 2 1120 0
 	stp	x11, x1, [x0, 8]
-.L714:
-.LVL997:
+.L715:
+.LVL999:
 	add	x5, x5, 1
-.LVL998:
-.L754:
+.LVL1000:
+.L755:
 	.loc 2 1113 0 discriminator 1
 	cmp	w12, w5, uxth
-	bhi	.L715
+	bhi	.L716
 	.loc 2 1124 0
-	cbnz	w22, .L716
-.LVL999:
-.L752:
+	cbnz	w22, .L717
+.LVL1001:
+.L753:
 	.loc 2 1109 0
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-.LVL1000:
-	b	.L713
-.LVL1001:
-.L716:
+.LVL1002:
+	b	.L714
+.LVL1003:
+.L717:
 	.loc 2 1127 0
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
 	bl	FlashReadPages
-.LVL1002:
+.LVL1004:
 	ubfiz	x0, x22, 5, 16
 	mov	x22, 0
-.LVL1003:
+.LVL1005:
 	str	x0, [x29, 128]
-.LVL1004:
+.LVL1006:
 	.loc 2 1162 0
 	adrp	x0, .LANCHOR148
 	add	x0, x0, :lo12:.LANCHOR148
 	str	x0, [x29, 136]
-.L751:
+.L752:
 	.loc 2 1129 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x1, x0, x22
@@ -9427,13 +9447,13 @@ FtlScanSysBlk:
 	ldr	x27, [x1, 16]
 	.loc 2 1129 0
 	ubfx	x26, x3, 10, 16
-.LVL1005:
+.LVL1007:
 	.loc 2 1132 0
-	bne	.L719
+	bne	.L720
 	mov	w5, 16
 	.loc 2 1136 0
 	mov	w7, 65535
-.L721:
+.L722:
 	.loc 2 1134 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	add	x6, x25, :lo12:.LANCHOR120
@@ -9444,21 +9464,21 @@ FtlScanSysBlk:
 	add	x0, x0, x22
 	str	x6, [x29, 104]
 	str	w5, [x29, 168]
-.LVL1006:
+.LVL1008:
 	ldr	w1, [x0, 4]
 	add	w1, w1, 1
 	str	w1, [x0, 4]
 	.loc 2 1135 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1007:
+.LVL1009:
 	.loc 2 1136 0
 	ldrh	w0, [x27]
 	ldr	w7, [x29, 100]
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L718
+	bne	.L719
 	.loc 2 1137 0
 	ldr	x0, [x6]
 	mov	w1, -1
@@ -9467,91 +9487,91 @@ FtlScanSysBlk:
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	bne	.L719
-.LVL1008:
-.L720:
+	bne	.L720
+.LVL1010:
+.L721:
 	.loc 2 1287 0
 	mov	w1, 1
-	b	.L790
-.LVL1009:
-.L718:
+	b	.L791
+.LVL1011:
+.L719:
 	.loc 2 1139 0
 	ldr	x0, [x25, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L719
-.LVL1010:
+	bne	.L720
+.LVL1012:
 	sub	w5, w5, #1
-.LVL1011:
+.LVL1013:
 	.loc 2 1133 0 discriminator 2
 	ands	w5, w5, 65535
-	bne	.L721
-	b	.L720
-.L719:
+	bne	.L722
+	b	.L721
+.L720:
 	.loc 2 1147 0
 	adrp	x0, .LANCHOR71
 	ldr	w1, [x0, #:lo12:.LANCHOR71]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L722
+	beq	.L723
 	.loc 2 1147 0 is_stmt 0 discriminator 1
 	cmp	w1, w0
-	bhi	.L723
-.L722:
+	bhi	.L724
+.L723:
 	.loc 2 1149 0 is_stmt 1
 	cmn	w0, #1
-	beq	.L723
+	beq	.L724
 	.loc 2 1152 0
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L723:
+.L724:
 	.loc 2 1157 0
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L725
-	bhi	.L726
+	beq	.L726
+	bhi	.L727
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L727
-.L724:
+	beq	.L728
+.L725:
 	.loc 2 1128 0 discriminator 2
 	ldr	x0, [x29, 128]
 	add	x22, x22, 32
 	cmp	x0, x22
-	bne	.L751
-	b	.L752
-.L726:
+	bne	.L752
+	b	.L753
+.L727:
 	.loc 2 1157 0
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L728
+	beq	.L729
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L724
+	bne	.L725
 	.loc 2 1280 0
 	mov	w1, 0
-.L790:
+.L791:
 	.loc 2 1287 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1012:
-	b	.L724
-.L728:
+.LVL1014:
+	b	.L725
+.L729:
 	.loc 2 1162 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L730
+	bls	.L731
 	.loc 2 1162 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1162
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1013:
-.L730:
+.LVL1015:
+.L731:
 	.loc 2 1163 0 is_stmt 1
 	ldr	w6, [x21, #:lo12:.LANCHOR30]
 	.loc 2 1165 0
@@ -9562,20 +9582,20 @@ FtlScanSysBlk:
 	sub	w0, w2, #1
 	sub	w2, w2, w1
 	sxth	x0, w0
-.LVL1014:
+.LVL1016:
 	sub	w2, w2, #1
 	.loc 2 1165 0
 	ldr	x5, [x3, #:lo12:.LANCHOR135]
 	.loc 2 1163 0
 	sxth	w2, w2
-.L731:
+.L732:
 	.loc 2 1163 0 is_stmt 0 discriminator 1
 	cmp	w0, w2
-	bgt	.L737
+	bgt	.L738
 	.loc 2 1186 0 is_stmt 1
-	tbz	w0, #31, .L771
-	b	.L724
-.L737:
+	tbz	w0, #31, .L772
+	b	.L725
+.L738:
 	.loc 2 1165 0
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
@@ -9583,42 +9603,42 @@ FtlScanSysBlk:
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L732
+	bls	.L733
 	.loc 2 1167 0
 	ldr	w2, [x5]
-	cbnz	w2, .L733
+	cbnz	w2, .L734
 	.loc 2 1167 0 is_stmt 0 discriminator 1
 	cmp	w6, w1
-	beq	.L733
+	beq	.L734
 	.loc 2 1172 0 is_stmt 1
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
-.L733:
+.L734:
 	.loc 2 1178 0 discriminator 1
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR129]
 	mov	w1, 0
-.L734:
-.LVL1015:
+.L735:
+.LVL1017:
 	.loc 2 1175 0 discriminator 1
 	cmp	w1, w0
-	bne	.L735
+	bne	.L736
 	.loc 2 1180 0
 	ldr	w1, [x27, 4]
-.LVL1016:
+.LVL1018:
 	str	w1, [x10]
 	.loc 2 1181 0
 	strh	w26, [x6, x8, lsl 1]
 	.loc 2 1186 0
-	tbnz	w0, #31, .L724
+	tbnz	w0, #31, .L725
 	.loc 2 1193 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w2, [x21, #:lo12:.LANCHOR30]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L724
-.L771:
+	bgt	.L725
+.L772:
 	.loc 2 1195 0
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR147]
@@ -9628,66 +9648,66 @@ FtlScanSysBlk:
 	.loc 2 1197 0
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR129]
-.L789:
+.L790:
 	.loc 2 1241 0
 	strh	w26, [x1, x0, lsl 1]
-	b	.L724
-.LVL1017:
-.L735:
+	b	.L725
+.LVL1019:
+.L736:
 	.loc 2 1177 0 discriminator 3
 	sxtw	x2, w1
 	add	w1, w1, 1
-.LVL1018:
+.LVL1020:
 	lsl	x7, x2, 2
 	.loc 2 1178 0 discriminator 3
 	lsl	x2, x2, 1
 	.loc 2 1177 0 discriminator 3
 	add	x11, x5, x7
 	sxth	w1, w1
-.LVL1019:
+.LVL1021:
 	ldr	w11, [x11, 4]
 	str	w11, [x5, x7]
 	.loc 2 1178 0 discriminator 3
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L734
-.LVL1020:
-.L732:
-	sub	w0, w0, #1
-.LVL1021:
-	sxth	x0, w0
+	b	.L735
 .LVL1022:
-	b	.L731
+.L733:
+	sub	w0, w0, #1
 .LVL1023:
-.L727:
+	sxth	x0, w0
+.LVL1024:
+	b	.L732
+.LVL1025:
+.L728:
 	.loc 2 1203 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR35]
 	ldrh	w0, [x19, #:lo12:.LANCHOR27]
 	cmp	w1, w0
-	bls	.L740
+	bls	.L741
 	.loc 2 1203 0 is_stmt 0 discriminator 1
 	ldr	x1, [x29, 136]
 	adrp	x0, .LC1
 	mov	w2, 1203
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1024:
-.L740:
+.LVL1026:
+.L741:
 	.loc 2 1204 0 is_stmt 1
 	ldrh	w6, [x19, #:lo12:.LANCHOR27]
 	ldrh	w2, [x23, #:lo12:.LANCHOR35]
 	sub	w1, w6, #1
 	sxth	x0, w1
-.LVL1025:
+.LVL1027:
 	sub	w5, w1, w2
 	.loc 2 1206 0
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR132]
-.L741:
+.L742:
 	.loc 2 1204 0 discriminator 1
 	cmp	w0, w5
-	ble	.L746
+	ble	.L747
 	.loc 2 1206 0
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
@@ -9695,41 +9715,41 @@ FtlScanSysBlk:
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L742
+	bls	.L743
 	.loc 2 1208 0
 	ldr	w5, [x1]
-	cbnz	w5, .L743
+	cbnz	w5, .L744
 	.loc 2 1208 0 is_stmt 0 discriminator 1
 	cmp	w6, w2
-	beq	.L743
+	beq	.L744
 	.loc 2 1216 0 is_stmt 1
 	add	w2, w2, 1
 	strh	w2, [x23, #:lo12:.LANCHOR35]
-.L743:
+.L744:
 	.loc 2 1221 0 discriminator 1
 	ldr	x6, [x28, #:lo12:.LANCHOR36]
 	mov	w2, 0
-.L744:
-.LVL1026:
+.L745:
+.LVL1028:
 	.loc 2 1218 0 discriminator 1
 	cmp	w2, w0
-	bne	.L745
+	bne	.L746
 	.loc 2 1223 0
 	ldr	w2, [x27, 4]
-.LVL1027:
+.LVL1029:
 	str	w2, [x10]
 	.loc 2 1224 0
 	strh	w26, [x6, x7, lsl 1]
-.L746:
+.L747:
 	.loc 2 1229 0
-	tbnz	w0, #31, .L724
+	tbnz	w0, #31, .L725
 	.loc 2 1237 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	ldrh	w5, [x23, #:lo12:.LANCHOR35]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L724
+	bgt	.L725
 	.loc 2 1239 0
 	add	w5, w5, 1
 	.loc 2 1240 0
@@ -9740,63 +9760,63 @@ FtlScanSysBlk:
 	str	w2, [x1, x0, lsl 2]
 	.loc 2 1241 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
-	b	.L789
-.LVL1028:
-.L745:
+	b	.L790
+.LVL1030:
+.L746:
 	.loc 2 1220 0 discriminator 3
 	sxtw	x5, w2
 	add	w2, w2, 1
-.LVL1029:
+.LVL1031:
 	lsl	x8, x5, 2
 	.loc 2 1221 0 discriminator 3
 	lsl	x5, x5, 1
 	.loc 2 1220 0 discriminator 3
 	add	x11, x1, x8
 	sxth	w2, w2
-.LVL1030:
+.LVL1032:
 	ldr	w11, [x11, 4]
 	str	w11, [x1, x8]
 	.loc 2 1221 0 discriminator 3
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L744
-.LVL1031:
-.L742:
-	sub	w0, w0, #1
-.LVL1032:
-	sxth	x0, w0
+	b	.L745
 .LVL1033:
-	b	.L741
+.L743:
+	sub	w0, w0, #1
 .LVL1034:
-.L725:
+	sxth	x0, w0
+.LVL1035:
+	b	.L742
+.LVL1036:
+.L726:
 	.loc 2 1248 0
 	ldrh	w5, [x24, #:lo12:.LANCHOR81]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR81
 	cmp	w5, w1
-	bne	.L748
+	bne	.L749
 	.loc 2 1250 0
 	strh	w26, [x24, #:lo12:.LANCHOR81]
 	.loc 2 1251 0
 	str	w0, [x2, 8]
-	b	.L724
-.L748:
+	b	.L725
+.L749:
 	.loc 2 1255 0
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L749
+	beq	.L750
 	.loc 2 1256 0
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.LVL1035:
-.L749:
+.LVL1037:
+.L750:
 	.loc 2 1257 0
 	add	x0, x24, :lo12:.LANCHOR81
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L750
+	bcs	.L751
 	.loc 2 1259 0
 	ldrh	w2, [x24, #:lo12:.LANCHOR81]
 	strh	w2, [x0, 4]
@@ -9804,29 +9824,29 @@ FtlScanSysBlk:
 	strh	w26, [x24, #:lo12:.LANCHOR81]
 	.loc 2 1261 0
 	str	w1, [x0, 8]
-	b	.L724
-.L750:
+	b	.L725
+.L751:
 	.loc 2 1265 0
 	strh	w26, [x0, 4]
-	b	.L724
-.LVL1036:
-.L753:
+	b	.L725
+.LVL1038:
+.L754:
 	.loc 2 1292 0
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
 	ldrh	w0, [x2]
-	cbz	w0, .L755
-.L758:
+	cbz	w0, .L756
+.L759:
 	.loc 2 1310 0
 	ldr	x1, [x28, #:lo12:.LANCHOR36]
 	ldrh	w0, [x1]
-	cbz	w0, .L756
-.L757:
+	cbz	w0, .L757
+.L758:
 	.loc 2 1328 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR147]
 	ldr	w0, [x21, #:lo12:.LANCHOR30]
 	cmp	w1, w0
-	bls	.L787
+	bls	.L788
 	.loc 2 1328 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR148
 	adrp	x0, .LC1
@@ -9834,8 +9854,8 @@ FtlScanSysBlk:
 	add	x1, x1, :lo12:.LANCHOR148
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1037:
-.L787:
+.LVL1039:
+.L788:
 	.loc 2 1330 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
@@ -9858,24 +9878,24 @@ FtlScanSysBlk:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1038:
+.LVL1040:
 	ret
-.LVL1039:
-.L755:
+.LVL1041:
+.L756:
 	.cfi_restore_state
 	.loc 2 1292 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR147]
-	cbz	w0, .L758
+	cbz	w0, .L759
 	.loc 2 1294 0 discriminator 1
 	ldr	w1, [x21, #:lo12:.LANCHOR30]
 	mov	w0, 0
-.L759:
-.LVL1040:
+.L760:
+.LVL1042:
 	cmp	w0, w1
-	bcs	.L758
+	bcs	.L759
 	.loc 2 1296 0
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L760
+	cbz	w3, .L761
 	.loc 2 1301 0
 	ldr	x1, [x29, 152]
 	.loc 2 1298 0
@@ -9883,23 +9903,23 @@ FtlScanSysBlk:
 	.loc 2 1301 0
 	ldr	x4, [x1, #:lo12:.LANCHOR135]
 	mov	w1, w0
-.L761:
-.LVL1041:
+.L762:
+.LVL1043:
 	.loc 2 1298 0 discriminator 1
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L758
+	bcs	.L759
 	.loc 2 1300 0 discriminator 3
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
 	sxtw	x3, w3
 	add	w1, w1, 1
-.LVL1042:
+.LVL1044:
 	.loc 2 1301 0 discriminator 3
 	ldr	w6, [x4, x6, lsl 2]
 	sxth	w1, w1
-.LVL1043:
+.LVL1045:
 	.loc 2 1300 0 discriminator 3
 	ldrh	w8, [x2, x5]
 	strh	w8, [x2, x3, lsl 1]
@@ -9907,53 +9927,53 @@ FtlScanSysBlk:
 	str	w6, [x4, x3, lsl 2]
 	.loc 2 1302 0 discriminator 3
 	strh	wzr, [x2, x5]
-	b	.L761
-.LVL1044:
-.L760:
-	add	w0, w0, 1
-.LVL1045:
-	sxth	w0, w0
+	b	.L762
 .LVL1046:
-	b	.L759
+.L761:
+	add	w0, w0, 1
 .LVL1047:
-.L756:
+	sxth	w0, w0
+.LVL1048:
+	b	.L760
+.LVL1049:
+.L757:
 	.loc 2 1310 0 discriminator 1
 	ldrh	w0, [x23, #:lo12:.LANCHOR35]
-	cbz	w0, .L757
+	cbz	w0, .L758
 	.loc 2 1312 0 discriminator 1
 	ldrh	w2, [x19, #:lo12:.LANCHOR27]
 	mov	w0, 0
-.L766:
-.LVL1048:
+.L767:
+.LVL1050:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L757
+	bge	.L758
 	.loc 2 1314 0
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L767
+	cbz	w3, .L768
 	.loc 2 1319 0
 	ldr	x2, [x29, 144]
 	.loc 2 1316 0
 	add	x19, x19, :lo12:.LANCHOR27
 	.loc 2 1319 0
 	ldr	x3, [x2, #:lo12:.LANCHOR132]
-.LVL1049:
-.L768:
+.LVL1051:
+.L769:
 	.loc 2 1316 0 discriminator 1
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L757
+	bge	.L758
 	.loc 2 1318 0 discriminator 3
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
 	sxtw	x2, w2
 	add	w0, w0, 1
-.LVL1050:
+.LVL1052:
 	.loc 2 1319 0 discriminator 3
 	ldr	w5, [x3, x5, lsl 2]
 	sxth	w0, w0
-.LVL1051:
+.LVL1053:
 	.loc 2 1318 0 discriminator 3
 	ldrh	w7, [x1, x4]
 	strh	w7, [x1, x2, lsl 1]
@@ -9961,14 +9981,14 @@ FtlScanSysBlk:
 	str	w5, [x3, x2, lsl 2]
 	.loc 2 1320 0 discriminator 3
 	strh	wzr, [x1, x4]
-	b	.L768
-.LVL1052:
-.L767:
+	b	.L769
+.LVL1054:
+.L768:
 	add	w0, w0, 1
-.LVL1053:
+.LVL1055:
 	sxth	w0, w0
-.LVL1054:
-	b	.L766
+.LVL1056:
+	b	.L767
 	.cfi_endproc
 .LFE270:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
@@ -9980,7 +10000,7 @@ FtlMapTblRecovery:
 .LFB275:
 	.loc 2 1466 0
 	.cfi_startproc
-.LVL1055:
+.LVL1057:
 	stp	x29, x30, [sp, -144]!
 	.cfi_def_cfa_offset 144
 	.cfi_offset 29, -144
@@ -10009,20 +10029,20 @@ FtlMapTblRecovery:
 	.cfi_offset 22, -104
 	.loc 2 1470 0
 	ldr	x21, [x0, 40]
-.LVL1056:
+.LVL1058:
 	.loc 2 1471 0
 	ldr	x22, [x0, 16]
-.LVL1057:
+.LVL1059:
 	.loc 2 1477 0
 	lsl	w2, w23, 2
 	.loc 2 1472 0
 	ldr	x0, [x0, 24]
-.LVL1058:
+.LVL1060:
 	str	x0, [x29, 128]
-.LVL1059:
+.LVL1061:
 	.loc 2 1474 0
 	ldrh	w0, [x19, 8]
-.LVL1060:
+.LVL1062:
 	.loc 2 1466 0
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
@@ -10034,11 +10054,11 @@ FtlMapTblRecovery:
 	mov	w27, 0
 	.loc 2 1474 0
 	str	w0, [x29, 140]
-.LVL1061:
+.LVL1063:
 	.loc 2 1477 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1062:
+.LVL1064:
 	str	x20, [x29, 120]
 	.loc 2 1478 0
 	adrp	x7, .LANCHOR39
@@ -10059,7 +10079,7 @@ FtlMapTblRecovery:
 	mov	w0, -1
 	.loc 2 1479 0
 	str	x25, [x3, 16]
-.LVL1063:
+.LVL1065:
 	.loc 2 1481 0
 	strh	w0, [x19]
 	.loc 2 1482 0
@@ -10067,7 +10087,7 @@ FtlMapTblRecovery:
 	.loc 2 1485 0
 	mov	w0, 1
 	str	w0, [x19, 56]
-.LVL1064:
+.LVL1066:
 	.loc 2 1488 0
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
@@ -10075,17 +10095,17 @@ FtlMapTblRecovery:
 	.loc 2 1530 0
 	add	x0, x24, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.LVL1065:
-.L792:
+.LVL1067:
+.L793:
 	.loc 2 1486 0 discriminator 1
 	ldr	w0, [x29, 140]
 	cmp	w27, w0
-	bge	.L809
+	bge	.L810
 	.loc 2 1488 0
 	ldr	w0, [x29, 136]
 	sxtw	x28, w27
 	cmp	w27, w0
-	bne	.L793
+	bne	.L794
 	.loc 2 1490 0
 	lsl	x0, x28, 1
 	mov	w1, 1
@@ -10093,12 +10113,12 @@ FtlMapTblRecovery:
 	ldrh	w0, [x22, x0]
 	.loc 2 1494 0
 	mov	w22, 0
-.LVL1066:
+.LVL1068:
 	.loc 2 1490 0
 	bl	FtlGetLastWrittenPage
-.LVL1067:
+.LVL1069:
 	sxth	w26, w0
-.LVL1068:
+.LVL1070:
 	.loc 2 1491 0
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
@@ -10109,52 +10129,52 @@ FtlMapTblRecovery:
 	.loc 2 1493 0
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.LVL1069:
+.LVL1071:
 	.loc 2 1496 0
 	ldr	x0, [x29, 120]
 	add	x20, x0, :lo12:.LANCHOR108
-.LVL1070:
-.L794:
+.LVL1072:
+.L795:
 	.loc 2 1494 0 discriminator 1
 	cmp	w22, w26
-	ble	.L796
-.LVL1071:
-.L809:
+	ble	.L797
+.LVL1073:
+.L810:
 	.loc 2 1547 0
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-.LVL1072:
+.LVL1074:
 	.loc 2 1548 0
 	adrp	x0, .LANCHOR20
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	cmp	w1, w0
-	bne	.L798
+	bne	.L799
 	.loc 2 1550 0
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.LVL1073:
-.L798:
+.LVL1075:
+.L799:
 	.loc 2 1553 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1074:
+.LVL1076:
 	.loc 2 1555 0
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-.LVL1075:
+.LVL1077:
 	.loc 2 1557 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1076:
+.LVL1078:
 	ldp	x21, x22, [sp, 32]
-.LVL1077:
+.LVL1079:
 	ldp	x23, x24, [sp, 48]
-.LVL1078:
+.LVL1080:
 	ldp	x25, x26, [sp, 64]
-.LVL1079:
+.LVL1081:
 	ldp	x27, x28, [sp, 80]
-.LVL1080:
+.LVL1082:
 	ldp	x29, x30, [sp], 144
 	.cfi_remember_state
 	.cfi_restore 30
@@ -10170,10 +10190,10 @@ FtlMapTblRecovery:
 	.cfi_restore 19
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
-.LVL1081:
+.LVL1083:
 	ret
-.LVL1082:
-.L796:
+.LVL1084:
+.L797:
 	.cfi_restore_state
 	.loc 2 1496 0
 	ldrh	w0, [x24]
@@ -10186,32 +10206,32 @@ FtlMapTblRecovery:
 	.loc 2 1497 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1083:
+.LVL1085:
 	.loc 2 1500 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L795
+	beq	.L796
 	.loc 2 1502 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L795
+	bls	.L796
 	.loc 2 1502 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L795
+	bne	.L796
 	.loc 2 1504 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L795:
+.L796:
 	add	w22, w22, 1
-.LVL1084:
-	sxth	w22, w22
-.LVL1085:
-	b	.L794
 .LVL1086:
-.L793:
+	sxth	w22, w22
+.LVL1087:
+	b	.L795
+.LVL1088:
+.L794:
 	.loc 2 1510 0
 	ldr	x0, [x26, #:lo12:.LANCHOR39]
 	.loc 2 1512 0
@@ -10232,30 +10252,30 @@ FtlMapTblRecovery:
 	.loc 2 1512 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1087:
+.LVL1089:
 	.loc 2 1515 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L811
+	beq	.L812
 	.loc 2 1515 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x25]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L811
+	bne	.L812
 	.loc 2 1515 0 discriminator 2
 	ldrh	w1, [x25, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L800
-.L811:
+	beq	.L801
+.L812:
 	mov	w5, 0
-.L801:
-.LVL1088:
+.L802:
+.LVL1090:
 	.loc 2 1530 0 is_stmt 1 discriminator 1
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w5, w0
-	bge	.L807
+	bge	.L808
 	.loc 2 1532 0
 	ldrh	w0, [x28]
 	.loc 2 1533 0
@@ -10270,32 +10290,32 @@ FtlMapTblRecovery:
 	.loc 2 1533 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1089:
+.LVL1091:
 	.loc 2 1536 0
 	ldr	w0, [x20]
 	ldr	w5, [x29, 108]
 	cmn	w0, #1
-	beq	.L805
+	beq	.L806
 	.loc 2 1538 0
 	ldrh	w0, [x25, 8]
 	cmp	w23, w0
-	bls	.L805
+	bls	.L806
 	.loc 2 1538 0 is_stmt 0 discriminator 1
 	ldrh	w2, [x25]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L805
+	bne	.L806
 	.loc 2 1540 0 is_stmt 1
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x20, 4]
 	str	w1, [x21, x0]
-.L805:
+.L806:
 	add	w5, w5, 1
 	sxth	w5, w5
-.LVL1090:
-	b	.L801
-.LVL1091:
-.L800:
+.LVL1092:
+	b	.L802
+.LVL1093:
+.L801:
 	.loc 2 1518 0 discriminator 1
 	ldrh	w5, [x24, #:lo12:.LANCHOR20]
 	.loc 2 1520 0 discriminator 1
@@ -10303,41 +10323,41 @@ FtlMapTblRecovery:
 	ldr	x10, [x26, #:lo12:.LANCHOR39]
 	.loc 2 1518 0 discriminator 1
 	sub	w5, w5, #1
-.L802:
-.LVL1092:
+.L803:
+.LVL1094:
 	cmp	w0, w5
-	blt	.L804
-.LVL1093:
-.L807:
+	blt	.L805
+.LVL1095:
+.L808:
 	add	w4, w27, 1
 	sxth	w27, w4
-.LVL1094:
-	b	.L792
-.LVL1095:
-.L804:
+.LVL1096:
+	b	.L793
+.LVL1097:
+.L805:
 	.loc 2 1520 0
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
-.LVL1096:
+.LVL1098:
 	.loc 2 1521 0
 	cmp	w23, w1
-	bls	.L803
+	bls	.L804
 	.loc 2 1523 0
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
-.LVL1097:
+.LVL1099:
 	ldr	w2, [x10, x2, lsl 2]
-.LVL1098:
+.LVL1100:
 	str	w2, [x21, x1]
-.LVL1099:
-.L803:
+.LVL1101:
+.L804:
 	add	w0, w0, 1
-.LVL1100:
+.LVL1102:
 	sxth	w0, w0
-.LVL1101:
-	b	.L802
+.LVL1103:
+	b	.L803
 	.cfi_endproc
 .LFE275:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -10392,7 +10412,7 @@ FtlLoadVonderInfo:
 	str	x1, [x0, 40]
 	.loc 2 1570 0
 	bl	FtlMapTblRecovery
-.LVL1102:
+.LVL1104:
 	.loc 2 1573 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -10446,7 +10466,7 @@ FtlL2PDataInit:
 	.loc 2 1578 0
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1103:
+.LVL1105:
 	.loc 2 1579 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR33]
 	mov	w1, 255
@@ -10454,7 +10474,7 @@ FtlL2PDataInit:
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR136]
 	bl	ftl_memset
-.LVL1104:
+.LVL1106:
 	adrp	x0, .LANCHOR56
 	ldrh	w3, [x21, #:lo12:.LANCHOR33]
 	.loc 2 1584 0
@@ -10465,12 +10485,12 @@ FtlL2PDataInit:
 	mov	w2, -1
 	ldrh	w5, [x22, #:lo12:.LANCHOR23]
 	add	x3, x0, x3, lsl 4
-.LVL1105:
-.L822:
+.LVL1107:
+.L823:
 	add	x4, x1, x5
 	.loc 2 1580 0 is_stmt 0 discriminator 1
 	cmp	x0, x3
-	bne	.L823
+	bne	.L824
 	.loc 2 1586 0 is_stmt 1
 	adrp	x1, .LANCHOR144
 	add	x0, x1, :lo12:.LANCHOR144
@@ -10527,7 +10547,7 @@ FtlL2PDataInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L823:
+.L824:
 	.cfi_restore_state
 	.loc 2 1584 0 discriminator 3
 	and	x1, x1, -4
@@ -10541,7 +10561,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L822
+	b	.L823
 	.cfi_endproc
 .LFE277:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
@@ -10561,12 +10581,12 @@ FtlLoadMapInfo:
 	.cfi_def_cfa_register 29
 	.loc 2 1600 0
 	bl	FtlL2PDataInit
-.LVL1106:
+.LVL1108:
 	.loc 2 1602 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapTblRecovery
-.LVL1107:
+.LVL1109:
 	.loc 2 1605 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -10632,7 +10652,7 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR36]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1108:
+.LVL1110:
 	.loc 3 503 0
 	adrp	x0, .LANCHOR40
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
@@ -10640,7 +10660,7 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1109:
+.LVL1111:
 	.loc 3 504 0
 	adrp	x0, .LANCHOR126
 	ldrh	w2, [x19, #:lo12:.LANCHOR6]
@@ -10648,27 +10668,27 @@ FtlVariablesInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR126]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1110:
+.LVL1112:
 	.loc 3 505 0
 	mov	w2, 48
 	mov	w1, 0
 	adrp	x0, .LANCHOR79
 	add	x0, x0, :lo12:.LANCHOR79
 	bl	ftl_memset
-.LVL1111:
+.LVL1113:
 	.loc 3 506 0
 	mov	w2, 512
 	mov	w1, 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	bl	ftl_memset
-.LVL1112:
+.LVL1114:
 	.loc 3 507 0
 	bl	FtlGcBufInit
-.LVL1113:
+.LVL1115:
 	.loc 3 508 0
 	bl	FtlL2PDataInit
-.LVL1114:
+.LVL1116:
 	.loc 3 510 0
 	ldr	x19, [sp, 16]
 	mov	w0, 0
@@ -10740,7 +10760,7 @@ SupperBlkListInit:
 	add	x26, x26, :lo12:.LANCHOR13
 	.loc 2 2071 0
 	bl	ftl_memset
-.LVL1115:
+.LVL1117:
 	.loc 2 2077 0
 	mov	w21, 0
 	.loc 2 2072 0
@@ -10757,7 +10777,7 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR42
 	.loc 2 2076 0
 	strh	wzr, [x22, #:lo12:.LANCHOR48]
-.LVL1116:
+.LVL1118:
 	.loc 2 2081 0
 	adrp	x27, .LANCHOR3
 	.loc 2 2073 0
@@ -10765,12 +10785,12 @@ SupperBlkListInit:
 	.loc 2 2074 0
 	adrp	x0, .LANCHOR44
 	str	xzr, [x0, #:lo12:.LANCHOR44]
-.LVL1117:
-.L830:
+.LVL1119:
+.L831:
 	.loc 2 2079 0 discriminator 1
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bcs	.L836
+	bcs	.L837
 	.loc 2 2084 0
 	adrp	x0, .LANCHOR19
 	.loc 2 2081 0
@@ -10779,37 +10799,37 @@ SupperBlkListInit:
 	mov	x6, 0
 	mov	w5, 0
 	ldrh	w7, [x0, #:lo12:.LANCHOR19]
-	b	.L837
-.LVL1118:
-.L832:
+	b	.L838
+.LVL1120:
+.L833:
 	.loc 2 2082 0
 	ldrb	w0, [x26, x6]
 	mov	w1, w19
 	bl	V2P_block
-.LVL1119:
+.LVL1121:
 	.loc 2 2083 0
 	bl	FtlBbmIsBadBlock
-.LVL1120:
-	cbnz	w0, .L831
+.LVL1122:
+	cbnz	w0, .L832
 	.loc 2 2084 0
 	add	w5, w5, w7
-.LVL1121:
+.LVL1123:
 	and	w5, w5, 65535
-.LVL1122:
-.L831:
+.LVL1124:
+.L832:
 	add	x6, x6, 1
-.LVL1123:
-.L837:
+.LVL1125:
+.L838:
 	.loc 2 2081 0 discriminator 1
 	cmp	w8, w6, uxth
-	bhi	.L832
+	bhi	.L833
 	.loc 2 2086 0
-	cbz	w5, .L839
+	cbz	w5, .L840
 	.loc 2 2087 0
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.LVL1124:
-.L833:
+.LVL1126:
+.L834:
 	.loc 2 2088 0
 	ldr	x1, [x24, #:lo12:.LANCHOR41]
 	mov	w0, 6
@@ -10819,73 +10839,73 @@ SupperBlkListInit:
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L834
+	beq	.L835
 	.loc 2 2091 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	.loc 2 2090 0 discriminator 1
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L834
+	beq	.L835
 	.loc 2 2092 0
 	adrp	x0, .LANCHOR53
 	.loc 2 2091 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L834
+	beq	.L835
 	.loc 2 2094 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L835
+	cbnz	w0, .L836
 	.loc 2 2095 0
 	add	w21, w21, 1
-.LVL1125:
+.LVL1127:
 	.loc 2 2096 0
 	mov	w0, w19
 	.loc 2 2095 0
 	and	w21, w21, 65535
-.LVL1126:
+.LVL1128:
 	.loc 2 2096 0
 	bl	INSERT_FREE_LIST
-.LVL1127:
-.L834:
+.LVL1129:
+.L835:
 	.loc 2 2079 0 discriminator 2
 	add	w19, w19, 1
-.LVL1128:
-	and	w19, w19, 65535
-.LVL1129:
-	b	.L830
 .LVL1130:
-.L839:
-	mov	w5, 0
+	and	w19, w19, 65535
 .LVL1131:
-	b	.L833
+	b	.L831
 .LVL1132:
-.L835:
+.L840:
+	mov	w5, 0
+.LVL1133:
+	b	.L834
+.LVL1134:
+.L836:
 	.loc 2 2098 0
 	add	w20, w20, 1
-.LVL1133:
+.LVL1135:
 	.loc 2 2099 0
 	mov	w0, w19
 	.loc 2 2098 0
 	and	w20, w20, 65535
-.LVL1134:
+.LVL1136:
 	.loc 2 2099 0
 	bl	INSERT_DATA_LIST
-.LVL1135:
-	b	.L834
-.L836:
+.LVL1137:
+	b	.L835
+.L837:
 	.loc 2 2103 0
 	strh	w20, [x23, #:lo12:.LANCHOR45]
 	.loc 2 2105 0
 	add	w20, w20, w21
-.LVL1136:
+.LVL1138:
 	.loc 2 2104 0
 	strh	w21, [x22, #:lo12:.LANCHOR48]
 	.loc 2 2105 0
 	cmp	w20, w0
-	ble	.L838
+	ble	.L839
 	.loc 2 2105 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR155
 	adrp	x0, .LC1
@@ -10893,15 +10913,15 @@ SupperBlkListInit:
 	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1137:
-.L838:
+.LVL1139:
+.L839:
 	.loc 2 2107 0 is_stmt 1
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-.LVL1138:
+.LVL1140:
 	ldp	x21, x22, [sp, 32]
-.LVL1139:
+.LVL1141:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
@@ -10929,7 +10949,7 @@ ftl_check_vpc:
 .LFB290:
 	.loc 2 2223 0
 	.cfi_startproc
-.LVL1140:
+.LVL1142:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -10971,22 +10991,22 @@ ftl_check_vpc:
 	adrp	x20, check_vpc_table
 	.loc 2 2229 0
 	bl	printf
-.LVL1141:
+.LVL1143:
 	.loc 2 2231 0
 	add	x19, x20, :lo12:check_vpc_table
 	mov	w2, 8192
 	mov	w1, 0
 	mov	x0, x19
 	bl	ftl_memset
-.LVL1142:
-.L842:
+.LVL1144:
+.L843:
 	.loc 2 2232 0 discriminator 1
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L844
+	bcc	.L845
 	.loc 2 2243 0 discriminator 1
 	adrp	x22, .LANCHOR5
-.LVL1143:
+.LVL1145:
 	.loc 2 2247 0 discriminator 1
 	adrp	x24, .LC92
 	.loc 2 2243 0 discriminator 1
@@ -10999,18 +11019,18 @@ ftl_check_vpc:
 	mov	w19, 0
 	.loc 2 2245 0 discriminator 1
 	adrp	x25, .LANCHOR43
-.LVL1144:
-.L845:
+.LVL1146:
+.L846:
 	.loc 2 2243 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L847
+	bhi	.L848
 	.loc 2 2255 0
 	adrp	x0, .LANCHOR47
 	ldr	x19, [x0, #:lo12:.LANCHOR47]
-.LVL1145:
-	cbz	x19, .L848
-.LBB238:
+.LVL1147:
+	cbz	x19, .L849
+.LBB242:
 	.loc 2 2257 0
 	adrp	x0, .LANCHOR48
 	.loc 2 2263 0
@@ -11019,7 +11039,7 @@ ftl_check_vpc:
 	add	x25, x25, :lo12:.LC93
 	.loc 2 2257 0
 	ldrh	w26, [x0, #:lo12:.LANCHOR48]
-.LVL1146:
+.LVL1148:
 	.loc 2 2258 0
 	adrp	x0, .LANCHOR41
 	mov	x24, x0
@@ -11038,25 +11058,25 @@ ftl_check_vpc:
 	movk	x1, 0xaaab, lsl 0
 	mul	x19, x19, x1
 	and	w19, w19, 65535
-.LVL1147:
-.L849:
+.LVL1149:
+.L850:
 	.loc 2 2259 0 discriminator 1
 	cmp	w22, w26
-	bne	.L851
-.LVL1148:
-.L848:
-.LBE238:
+	bne	.L852
+.LVL1150:
+.L849:
+.LBE242:
 	.loc 2 2271 0
-	cbz	w23, .L841
-.LVL1149:
+	cbz	w23, .L842
+.LVL1151:
 	.loc 2 2271 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 2271
 	add	x1, x21, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1150:
-.L841:
+.LVL1152:
+.L842:
 	.loc 2 2272 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11079,36 +11099,36 @@ ftl_check_vpc:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1151:
-.L844:
+.LVL1153:
+.L845:
 	.cfi_restore_state
 	.loc 2 2234 0
 	mov	w2, 0
 	add	x1, x29, 108
 	mov	w0, w22
 	bl	log2phys
-.LVL1152:
+.LVL1154:
 	.loc 2 2235 0
 	ldr	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L843
+	beq	.L844
 	.loc 2 2237 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1153:
+.LVL1155:
 	.loc 2 2238 0
 	and	x0, x0, 65535
 	ldrh	w1, [x19, x0, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x19, x0, lsl 1]
-.LVL1154:
-.L843:
+.LVL1156:
+.L844:
 	.loc 2 2232 0 discriminator 2
 	add	w22, w22, 1
-.LVL1155:
-	b	.L842
-.LVL1156:
-.L847:
+.LVL1157:
+	b	.L843
+.LVL1158:
+.L848:
 	.loc 2 2245 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ubfiz	x28, x19, 1, 16
@@ -11116,66 +11136,66 @@ ftl_check_vpc:
 	ldrh	w2, [x0, x28]
 	ldrh	w3, [x26, x27, lsl 1]
 	cmp	w2, w3
-	beq	.L846
+	beq	.L847
 	.loc 2 2247 0
 	mov	w1, w19
 	mov	x0, x24
 	bl	printf
-.LVL1157:
+.LVL1159:
 	.loc 2 2248 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	mov	w1, 65535
 	ldrh	w0, [x0, x28]
 	cmp	w0, w1
-	beq	.L846
+	beq	.L847
 	.loc 2 2248 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x26, x27, lsl 1]
 	.loc 2 2250 0 is_stmt 1 discriminator 1
 	cmp	w1, w0
 	csinc	w23, w23, wzr, ls
-.LVL1158:
-.L846:
+.LVL1160:
+.L847:
 	.loc 2 2243 0 discriminator 2
 	add	w19, w19, 1
-.LVL1159:
-	and	w19, w19, 65535
-.LVL1160:
-	b	.L845
 .LVL1161:
-.L851:
-.LBB239:
+	and	w19, w19, 65535
+.LVL1162:
+	b	.L846
+.LVL1163:
+.L852:
+.LBB243:
 	.loc 2 2261 0
 	ldr	x1, [x27, #:lo12:.LANCHOR43]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L850
+	cbz	w2, .L851
 	.loc 2 2263 0
 	ldrh	w3, [x20, w19, sxtw 1]
 	.loc 2 2264 0
 	mov	w23, 1
-.LVL1162:
+.LVL1164:
 	.loc 2 2263 0
 	mov	w1, w19
 	mov	x0, x25
 	bl	printf
-.LVL1163:
-.L850:
+.LVL1165:
+.L851:
 	.loc 2 2266 0
 	ldr	x0, [x24, #:lo12:.LANCHOR41]
 	umull	x19, w19, w28
-.LVL1164:
+.LVL1166:
 	ldrh	w19, [x0, x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L848
-.LVL1165:
+	beq	.L849
+.LVL1167:
 	.loc 2 2259 0 discriminator 2
 	add	w22, w22, 1
-.LVL1166:
+.LVL1168:
 	and	w22, w22, 65535
-.LVL1167:
-	b	.L849
-.LBE239:
+.LVL1169:
+	b	.L850
+.LBE243:
 	.cfi_endproc
 .LFE290:
 	.size	ftl_check_vpc, .-ftl_check_vpc
@@ -11215,7 +11235,7 @@ FtlGcPageVarInit:
 	ldr	x0, [x0, #:lo12:.LANCHOR98]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1168:
+.LVL1170:
 	.loc 5 206 0
 	ldrh	w2, [x19, #:lo12:.LANCHOR21]
 	mov	w0, 12
@@ -11224,7 +11244,7 @@ FtlGcPageVarInit:
 	adrp	x0, .LANCHOR100
 	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	bl	ftl_memset
-.LVL1169:
+.LVL1171:
 	.loc 5 208 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -11234,7 +11254,7 @@ FtlGcPageVarInit:
 	.cfi_def_cfa 31, 0
 	.loc 5 207 0
 	b	FtlGcBufInit
-.LVL1170:
+.LVL1172:
 	.cfi_endproc
 .LFE309:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
@@ -11246,7 +11266,7 @@ FtlGcScanTempBlk:
 .LFB310:
 	.loc 5 211 0
 	.cfi_startproc
-.LVL1171:
+.LVL1173:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -11266,10 +11286,10 @@ FtlGcScanTempBlk:
 	stp	x27, x28, [sp, 80]
 	.loc 5 221 0
 	mov	w0, 65535
-.LVL1172:
+.LVL1174:
 	.loc 5 220 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR157]
-.LVL1173:
+.LVL1175:
 	.cfi_offset 27, -32
 	.cfi_offset 28, -24
 	.loc 5 211 0
@@ -11282,27 +11302,27 @@ FtlGcScanTempBlk:
 	.cfi_offset 26, -40
 	.loc 5 221 0
 	cmp	w19, w0
-	beq	.L885
+	beq	.L886
 	.loc 5 223 0
-	cbnz	w19, .L869
-.L870:
+	cbnz	w19, .L870
+.L871:
 	.loc 5 224 0
 	bl	FtlGcPageVarInit
-.LVL1174:
-	b	.L871
-.LVL1175:
-.L885:
+.LVL1176:
+	b	.L872
+.LVL1177:
+.L886:
 	.loc 5 222 0
 	mov	w19, 0
-.LVL1176:
-.L869:
+.LVL1178:
+.L870:
 	.loc 5 223 0 discriminator 1
 	adrp	x0, .LANCHOR19
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w28
-	beq	.L870
-.LVL1177:
-.L871:
+	beq	.L871
+.LVL1179:
+.L872:
 	.loc 5 235 0
 	adrp	x27, .LANCHOR23
 	add	x27, x27, :lo12:.LANCHOR23
@@ -11310,15 +11330,15 @@ FtlGcScanTempBlk:
 	mov	w22, 0
 	.loc 5 228 0
 	mov	w23, 65535
-.LVL1178:
-.L879:
+.LVL1180:
+.L880:
 	ldrh	w0, [x20]
 	.loc 5 226 0
 	strb	wzr, [x20, 8]
-.LVL1179:
+.LVL1181:
 	.loc 5 228 0
 	cmp	w0, w23
-	beq	.L886
+	beq	.L887
 	.loc 5 236 0
 	adrp	x25, .LANCHOR24
 	.loc 5 231 0
@@ -11327,8 +11347,8 @@ FtlGcScanTempBlk:
 	add	x25, x25, :lo12:.LANCHOR24
 	.loc 5 231 0
 	add	x26, x26, :lo12:.LANCHOR3
-.L882:
-.LVL1180:
+.L883:
+.LVL1182:
 	.loc 5 235 0
 	adrp	x1, .LANCHOR93
 	.loc 5 234 0
@@ -11349,60 +11369,60 @@ FtlGcScanTempBlk:
 	ldrh	w10, [x25]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.LVL1181:
-.L873:
+.LVL1183:
+.L874:
 	.loc 5 231 0 discriminator 1
 	cmp	x1, x5
-	bne	.L875
+	bne	.L876
 	.loc 5 240 0
 	mov	w1, w3
 	str	w3, [x29, 108]
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1182:
+.LVL1184:
 	ldr	w3, [x29, 108]
 	.loc 5 241 0
 	mov	x11, 0
 	ubfiz	x12, x3, 5, 16
-.LVL1183:
-.L876:
+.LVL1185:
+.L877:
 	.loc 5 241 0 is_stmt 0 discriminator 1
 	cmp	x11, x12
-	bne	.L880
+	bne	.L881
 	.loc 5 264 0 is_stmt 1
 	add	w19, w19, 1
-.LVL1184:
+.LVL1186:
 	.loc 5 266 0
 	add	w22, w22, 1
-.LVL1185:
+.LVL1187:
 	.loc 5 264 0
 	and	w19, w19, 65535
-.LVL1186:
+.LVL1188:
 	.loc 5 268 0
 	cmp	w28, w22
 	adrp	x1, .LANCHOR19
-	bls	.L881
-.L883:
+	bls	.L882
+.L884:
 	.loc 5 274 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bhi	.L882
-.L886:
+	bhi	.L883
+.L887:
 	.loc 5 227 0
 	mov	w2, 0
-	b	.L872
-.LVL1187:
-.L875:
+	b	.L873
+.LVL1189:
+.L876:
 	.loc 5 232 0
 	ldrh	w4, [x5]
-.LVL1188:
+.LVL1190:
 	.loc 5 233 0
 	cmp	w4, w23
-	beq	.L874
+	beq	.L875
 	.loc 5 234 0
 	ubfiz	x2, x3, 5, 16
 	orr	w4, w19, w4, lsl 10
-.LVL1189:
+.LVL1191:
 	add	x2, x0, x2
 	str	w4, [x2, 4]
 	.loc 5 235 0
@@ -11414,49 +11434,49 @@ FtlGcScanTempBlk:
 	mul	w4, w3, w10
 	.loc 5 237 0
 	add	w3, w3, 1
-.LVL1190:
+.LVL1192:
 	and	w3, w3, 65535
-.LVL1191:
+.LVL1193:
 	.loc 5 236 0
 	asr	w4, w4, 2
 	add	x4, x8, x4, sxtw 2
 	str	x4, [x2, 16]
-.L874:
+.L875:
 	add	x5, x5, 2
-.LVL1192:
-	b	.L873
-.LVL1193:
-.L880:
+.LVL1194:
+	b	.L874
+.LVL1195:
+.L881:
 	.loc 5 242 0
 	ldr	x6, [x24, #:lo12:.LANCHOR120]
 	add	x5, x6, x11
 	ldr	w4, [x5, 4]
-.LVL1194:
+.LVL1196:
 	.loc 5 243 0
 	lsr	w0, w4, 10
 	bl	P2V_plane
-.LVL1195:
+.LVL1197:
 	and	w2, w0, 65535
-.LVL1196:
+.LVL1198:
 	.loc 5 245 0
 	ldr	w0, [x6, x11]
-.LVL1197:
-	cbnz	w0, .L877
+.LVL1199:
+	cbnz	w0, .L878
 	.loc 5 247 0
 	ldr	x0, [x5, 16]
-.LVL1198:
+.LVL1200:
 	add	x11, x11, 32
 	.loc 5 248 0
 	ldrh	w1, [x0]
 	cmp	w1, w23
-	bne	.L878
+	bne	.L879
 	.loc 5 249 0
 	adrp	x0, .LANCHOR153
-.LVL1199:
+.LVL1201:
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR153]
-.LVL1200:
-.L872:
+.LVL1202:
+.L873:
 	.loc 5 282 0
 	strh	w19, [x20, 2]
 	.loc 5 281 0
@@ -11470,67 +11490,67 @@ FtlGcScanTempBlk:
 	.loc 5 284 0
 	mov	x0, x20
 	bl	ftl_sb_update_avl_pages
-.LVL1201:
+.LVL1203:
 	.loc 5 285 0
-	b	.L884
-.LVL1202:
-.L878:
+	b	.L885
+.LVL1204:
+.L879:
 	.loc 5 252 0
 	ldp	w2, w0, [x0, 8]
-.LVL1203:
+.LVL1205:
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-.LVL1204:
-	b	.L876
-.LVL1205:
-.L877:
+.LVL1206:
+	b	.L877
+.LVL1207:
+.L878:
 	.loc 5 256 0
 	adrp	x0, .LANCHOR43
 	ldrh	w1, [x20]
 	.loc 5 259 0
 	mov	w19, 0
-.LVL1206:
+.LVL1208:
 	.loc 5 256 0
 	ldr	x0, [x0, #:lo12:.LANCHOR43]
 	strh	wzr, [x0, x1, lsl 1]
 	.loc 5 257 0
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
-.LVL1207:
+.LVL1209:
 	.loc 5 258 0
 	mov	w0, -1
 	strh	w0, [x20]
-.LVL1208:
+.LVL1210:
 	.loc 5 260 0
 	bl	FtlGcPageVarInit
-.LVL1209:
+.LVL1211:
 	.loc 5 261 0
-	b	.L879
-.LVL1210:
-.L881:
+	b	.L880
+.LVL1212:
+.L882:
 	.loc 5 268 0 discriminator 1
 	ldrh	w0, [x21, #:lo12:.LANCHOR157]
 	cmp	w0, w23
-	beq	.L883
+	beq	.L884
 	.loc 5 269 0
 	add	w0, w0, w22
 	strh	w0, [x21, #:lo12:.LANCHOR157]
 	.loc 5 270 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	cmp	w0, w19
-	bls	.L883
-.LVL1211:
-.L884:
+	bls	.L884
+.LVL1213:
+.L885:
 	.loc 5 286 0
 	ldp	x19, x20, [sp, 16]
-.LVL1212:
+.LVL1214:
 	mov	w0, -1
 	ldp	x21, x22, [sp, 32]
-.LVL1213:
+.LVL1215:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1214:
+.LVL1216:
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
 	.cfi_restore 29
@@ -11554,10 +11574,10 @@ FtlGcScanTempBlk:
 	.global	FlashTestBlk
 	.type	FlashTestBlk, %function
 FlashTestBlk:
-.LFB343:
-	.loc 1 193 0
+.LFB344:
+	.loc 1 197 0
 	.cfi_startproc
-.LVL1215:
+.LVL1217:
 	stp	x29, x30, [sp, -128]!
 	.cfi_def_cfa_offset 128
 	.cfi_offset 29, -128
@@ -11567,73 +11587,73 @@ FlashTestBlk:
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -112
 	.cfi_offset 20, -104
-	.loc 1 193 0
+	.loc 1 197 0
 	and	w19, w0, 65535
-	.loc 1 198 0
+	.loc 1 202 0
 	cmp	w19, 11
-	bls	.L894
-.LVL1216:
-.LBB242:
-.LBB243:
-	.loc 1 203 0
+	bls	.L895
+.LVL1218:
+.LBB246:
+.LBB247:
+	.loc 1 207 0
 	add	x0, x29, 64
-.LVL1217:
-	.loc 1 204 0
+.LVL1219:
+	.loc 1 208 0
 	mov	w2, 32
 	mov	w1, 165
-	.loc 1 202 0
+	.loc 1 206 0
 	adrp	x20, ftl_temp_buf
 	add	x20, x20, :lo12:ftl_temp_buf
-	.loc 1 203 0
+	.loc 1 207 0
 	stp	x20, x0, [x29, 40]
-	.loc 1 204 0
+	.loc 1 208 0
 	bl	ftl_memset
-.LVL1218:
-	.loc 1 206 0
+.LVL1220:
+	.loc 1 210 0
 	lsl	w19, w19, 10
-.LVL1219:
-	.loc 1 205 0
+.LVL1221:
+	.loc 1 209 0
 	mov	w2, 8
 	mov	w1, 90
 	mov	x0, x20
 	bl	ftl_memset
-.LVL1220:
-	.loc 1 207 0
+.LVL1222:
+	.loc 1 211 0
 	mov	w2, 1
-	.loc 1 206 0
+	.loc 1 210 0
 	str	w19, [x29, 36]
-	.loc 1 207 0
+	.loc 1 211 0
 	mov	w1, w2
 	add	x0, x29, 32
 	bl	FlashEraseBlocks
-.LVL1221:
-	.loc 1 208 0
+.LVL1223:
+	.loc 1 212 0
 	mov	w3, 1
 	add	x0, x29, 32
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1222:
-	.loc 1 209 0
+.LVL1224:
+	.loc 1 213 0
 	ldr	w0, [x29, 32]
-	.loc 1 215 0
+	.loc 1 219 0
 	mov	w2, 1
 	mov	w1, 0
-	.loc 1 209 0
+	.loc 1 213 0
 	cmp	w0, 0
-	.loc 1 215 0
+	.loc 1 219 0
 	add	x0, x29, 32
-	.loc 1 209 0
+	.loc 1 213 0
 	csetm	w19, ne
 .LDL1:
-.LVL1223:
-	.loc 1 215 0
+.LVL1225:
+	.loc 1 219 0
 	bl	FlashEraseBlocks
-.LVL1224:
-.L892:
-.LBE243:
-.LBE242:
-	.loc 1 217 0
+.LVL1226:
+.L893:
+.LBE247:
+.LBE246:
+	.loc 1 221 0
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 128
@@ -11644,83 +11664,83 @@ FlashTestBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1225:
-.L894:
+.LVL1227:
+.L895:
 	.cfi_restore_state
-	.loc 1 199 0
+	.loc 1 203 0
 	mov	w19, 0
-	b	.L892
+	b	.L893
 	.cfi_endproc
-.LFE343:
+.LFE344:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
 	.global	FlashGetBadBlockList
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
-.LFB344:
-	.loc 1 220 0
+.LFB345:
+	.loc 1 224 0
 	.cfi_startproc
-.LVL1226:
+.LVL1228:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
 	.cfi_offset 30, -24
-	.loc 1 223 0
+	.loc 1 227 0
 	mov	w2, 256
-	.loc 1 220 0
+	.loc 1 224 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
 	stp	x19, x20, [sp, 16]
 	.cfi_offset 19, -16
 	.cfi_offset 20, -8
-	.loc 1 220 0
+	.loc 1 224 0
 	mov	x19, x0
 	mov	w20, w1
-	.loc 1 223 0
+	.loc 1 227 0
 	mov	w1, 255
-.LVL1227:
+.LVL1229:
 	bl	ftl_memset
-.LVL1228:
-	.loc 1 224 0
+.LVL1230:
+	.loc 1 228 0
 	adrp	x0, .LANCHOR107
 	mov	w1, w20
 	ldr	x2, [x0, #:lo12:.LANCHOR107]
 	mov	x0, x19
 	blr	x2
-.LVL1229:
+.LVL1231:
 	and	w0, w0, 65535
-.LVL1230:
-	.loc 1 225 0
+.LVL1232:
+	.loc 1 229 0
 	cmp	w0, 50
-	bls	.L897
-	.loc 1 226 0
+	bls	.L898
+	.loc 1 230 0
 	mov	w2, 256
 	mov	w1, 255
 	mov	x0, x19
-.LVL1231:
+.LVL1233:
 	bl	ftl_memset
-.LVL1232:
-	.loc 1 227 0
+.LVL1234:
+	.loc 1 231 0
 	mov	w0, 0
-.LVL1233:
-.L897:
-	.loc 1 229 0
+.LVL1235:
+.L898:
+	.loc 1 233 0
 	adrp	x1, .LANCHOR0+14
 	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
 	cmp	w1, 4
-	bne	.L901
+	bne	.L902
 	mov	x1, 0
-.L899:
-.LVL1234:
-	.loc 1 230 0 discriminator 1
+.L900:
+.LVL1236:
+	.loc 1 234 0 discriminator 1
 	cmp	w0, w1, uxth
-	bhi	.L900
-.LVL1235:
-.L901:
-	.loc 1 235 0
+	bhi	.L901
+.LVL1237:
+.L902:
+	.loc 1 239 0
 	ldp	x19, x20, [sp, 16]
-.LVL1236:
+.LVL1238:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -11729,35 +11749,35 @@ FlashGetBadBlockList:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1237:
-.L900:
+.LVL1239:
+.L901:
 	.cfi_restore_state
-	.loc 1 231 0 discriminator 3
+	.loc 1 235 0 discriminator 3
 	ldrh	w2, [x19, x1, lsl 1]
 	lsr	w2, w2, 1
 	strh	w2, [x19, x1, lsl 1]
-.LVL1238:
+.LVL1240:
 	add	x1, x1, 1
-.LVL1239:
-	b	.L899
+.LVL1241:
+	b	.L900
 	.cfi_endproc
-.LFE344:
+.LFE345:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
 	.type	ftl_memcpy, %function
 ftl_memcpy:
-.LFB346:
-	.loc 1 243 0
+.LFB347:
+	.loc 1 247 0
 	.cfi_startproc
-.LVL1240:
-	.loc 1 244 0
+.LVL1242:
+	.loc 1 248 0
 	uxtw	x2, w2
 	b	memcpy
-.LVL1241:
+.LVL1243:
 	.cfi_endproc
-.LFE346:
+.LFE347:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -11767,7 +11787,7 @@ FtlBbmTblFlush:
 .LFB226:
 	.loc 4 80 0
 	.cfi_startproc
-.LVL1242:
+.LVL1244:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -11823,12 +11843,12 @@ FtlBbmTblFlush:
 	.loc 4 89 0
 	mov	w1, 0
 	bl	ftl_memset
-.LVL1243:
-.L905:
+.LVL1245:
+.L906:
 	.loc 4 91 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w24, w0
-	blt	.L906
+	blt	.L907
 	.loc 4 94 0
 	add	x19, x19, :lo12:.LANCHOR108
 	.loc 4 98 0
@@ -11838,12 +11858,12 @@ FtlBbmTblFlush:
 	mov	w1, 255
 	.loc 4 108 0
 	adrp	x24, .LC94
-.LVL1244:
+.LVL1246:
 	.loc 4 110 0
 	adrp	x26, .LANCHOR20
 	.loc 4 94 0
 	ldr	x27, [x19, 16]
-.LVL1245:
+.LVL1247:
 	.loc 4 108 0
 	add	x24, x24, :lo12:.LC94
 	.loc 4 110 0
@@ -11853,7 +11873,7 @@ FtlBbmTblFlush:
 	.loc 4 95 0
 	mov	x0, x27
 	bl	ftl_memset
-.LVL1246:
+.LVL1248:
 	.loc 4 97 0
 	mov	w0, -3887
 	strh	w0, [x27]
@@ -11876,8 +11896,8 @@ FtlBbmTblFlush:
 	adrp	x0, .LANCHOR2
 	ldr	w0, [x0, #:lo12:.LANCHOR2]
 	strh	w0, [x27, 12]
-.LVL1247:
-.L907:
+.LVL1249:
+.L908:
 	.loc 4 108 0
 	ldrh	w4, [x27, 10]
 	.loc 4 107 0
@@ -11900,20 +11920,20 @@ FtlBbmTblFlush:
 	.loc 4 108 0
 	mov	x0, x24
 	bl	printf
-.LVL1248:
+.LVL1250:
 	.loc 4 109 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w1, w3
 	mov	w2, w3
 	bl	FlashProgPages
-.LVL1249:
+.LVL1251:
 	.loc 4 110 0
 	ldrh	w0, [x26]
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L908
+	blt	.L909
 	.loc 4 113 0
 	ldr	w0, [x20, 8]
 	.loc 4 122 0
@@ -11947,15 +11967,15 @@ FtlBbmTblFlush:
 	.loc 4 122 0
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1250:
+.LVL1252:
 	.loc 4 123 0
 	mov	w3, 1
 	mov	x0, x19
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1251:
-.L908:
+.LVL1253:
+.L909:
 	.loc 4 126 0
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
@@ -11963,12 +11983,12 @@ FtlBbmTblFlush:
 	.loc 4 127 0
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L909
+	bne	.L910
 	.loc 4 129 0
 	ldr	w1, [x19, 4]
 	.loc 4 130 0
 	add	w21, w21, 1
-.LVL1252:
+.LVL1254:
 	.loc 4 129 0
 	adrp	x0, .LC95
 	.loc 4 130 0
@@ -11976,21 +11996,21 @@ FtlBbmTblFlush:
 	.loc 4 129 0
 	add	x0, x0, :lo12:.LC95
 	bl	printf
-.LVL1253:
+.LVL1255:
 	.loc 4 131 0
 	cmp	w21, 3
-	bls	.L907
+	bls	.L908
 	.loc 4 132 0
 	ldr	w1, [x19, 4]
 	adrp	x0, .LC96
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC96
 	bl	printf
-.LVL1254:
-.L911:
-	b	.L911
-.LVL1255:
-.L906:
+.LVL1256:
+.L912:
+	b	.L912
+.LVL1257:
+.L907:
 	.loc 4 92 0 discriminator 3
 	ldrh	w2, [x27]
 	ldr	x1, [x25], 8
@@ -11999,31 +12019,31 @@ FtlBbmTblFlush:
 	lsl	w2, w2, 2
 	.loc 4 91 0 discriminator 3
 	add	w24, w24, 1
-.LVL1256:
+.LVL1258:
 	.loc 4 92 0 discriminator 3
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-.LVL1257:
-	b	.L905
-.LVL1258:
-.L912:
-	mov	w25, 1
 .LVL1259:
-	b	.L907
+	b	.L906
 .LVL1260:
-.L909:
+.L913:
+	mov	w25, 1
+.LVL1261:
+	b	.L908
+.LVL1262:
+.L910:
 	.loc 4 139 0
-	cbz	w25, .L912
+	cbz	w25, .L913
 	.loc 4 146 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
-.LVL1261:
+.LVL1263:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-.LVL1262:
+.LVL1264:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1263:
+.LVL1265:
 	ldp	x29, x30, [sp], 96
 	.cfi_restore 30
 	.cfi_restore 29
@@ -12049,7 +12069,7 @@ allocate_data_superblock:
 .LFB298:
 	.loc 2 2531 0
 	.cfi_startproc
-.LVL1264:
+.LVL1266:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -12078,7 +12098,7 @@ allocate_data_superblock:
 	stp	x21, x22, [sp, 32]
 	.loc 2 2537 0
 	add	x0, x27, :lo12:.LANCHOR45
-.LVL1265:
+.LVL1267:
 	.loc 2 2531 0
 	stp	x25, x26, [sp, 64]
 	.cfi_offset 21, -80
@@ -12087,8 +12107,8 @@ allocate_data_superblock:
 	.cfi_offset 26, -40
 	.loc 2 2537 0
 	str	x0, [x29, 104]
-.LVL1266:
-.L915:
+.LVL1268:
+.L916:
 	ldr	x1, [x29, 104]
 	adrp	x24, .LANCHOR5
 	ldrh	w0, [x28, #:lo12:.LANCHOR48]
@@ -12096,7 +12116,7 @@ allocate_data_superblock:
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L916
+	ble	.L917
 	.loc 2 2537 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12104,13 +12124,13 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1267:
-.L916:
+.LVL1269:
+.L917:
 	.loc 2 2539 0 is_stmt 1
 	adrp	x0, .LANCHOR53
 	add	x0, x0, :lo12:.LANCHOR53
 	cmp	x19, x0
-	bne	.L941
+	bne	.L942
 	.loc 2 2540 0
 	adrp	x1, .LANCHOR89
 	ldrh	w0, [x23]
@@ -12119,25 +12139,25 @@ allocate_data_superblock:
 	lsr	w0, w0, 1
 	add	w0, w0, 1
 	add	w1, w0, w1, lsr 2
-.LVL1268:
+.LVL1270:
 	.loc 2 2544 0
 	ands	w1, w1, 65535
-	beq	.L917
+	beq	.L918
 	.loc 2 2545 0
 	sub	w1, w1, #1
-.LVL1269:
+.LVL1271:
 	and	w1, w1, 65535
-.LVL1270:
-.L917:
+.LVL1272:
+.L918:
 	.loc 2 2546 0
 	adrp	x0, .LANCHOR47
 	add	x0, x0, :lo12:.LANCHOR47
 	bl	List_pop_index_node
-.LVL1271:
+.LVL1273:
 	and	w20, w0, 65535
-.LVL1272:
+.LVL1274:
 	ldrh	w0, [x23]
-	cbnz	w0, .L918
+	cbnz	w0, .L919
 	.loc 2 2546 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12145,8 +12165,8 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1273:
-.L918:
+.LVL1275:
+.L919:
 	.loc 2 2546 0 discriminator 3
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
@@ -12156,10 +12176,10 @@ allocate_data_superblock:
 	.loc 2 2550 0 discriminator 3
 	mov	x0, x19
 	bl	make_superblock
-.LVL1274:
+.LVL1276:
 	.loc 2 2551 0 discriminator 3
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L919
+	cbnz	w0, .L920
 	.loc 2 2555 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x20, 1, 16
@@ -12169,14 +12189,14 @@ allocate_data_superblock:
 	.loc 2 2556 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1275:
+.LVL1277:
 	.loc 2 2557 0
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L915
+	ble	.L916
 	.loc 2 2557 0 is_stmt 0 discriminator 1
 	mov	w2, 2557
 	adrp	x1, .LANCHOR158
@@ -12184,21 +12204,21 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1276:
-	b	.L915
-.LVL1277:
-.L941:
-	mov	w1, 0
-	b	.L917
 .LVL1278:
-.L919:
+	b	.L916
+.LVL1279:
+.L942:
+	mov	w1, 0
+	b	.L918
+.LVL1280:
+.L920:
 	.loc 2 2560 0 is_stmt 1
 	ldrh	w1, [x27, #:lo12:.LANCHOR45]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L921
+	ble	.L922
 	.loc 2 2560 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12206,8 +12226,8 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1279:
-.L921:
+.LVL1281:
+.L922:
 	.loc 2 2563 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR3
 	.loc 2 2564 0 discriminator 1
@@ -12223,13 +12243,13 @@ allocate_data_superblock:
 	add	x1, x3, 8
 	add	x0, x0, 8
 	add	x0, x3, x0
-.L922:
-.LVL1280:
+.L923:
+.LVL1282:
 	.loc 2 2563 0 discriminator 1
 	cmp	x0, x1
-	bne	.L924
+	bne	.L925
 	.loc 2 2571 0
-	cbnz	w21, .L925
+	cbnz	w21, .L926
 	.loc 2 2571 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12237,13 +12257,13 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1281:
-.L925:
+.LVL1283:
+.L926:
 	.loc 2 2573 0 is_stmt 1
 	adrp	x0, .LANCHOR82
 	ldrh	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, w20
-	bne	.L926
+	bne	.L927
 	.loc 2 2573 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12251,8 +12271,8 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1282:
-.L926:
+.LVL1284:
+.L927:
 	.loc 2 2574 0 is_stmt 1
 	ldrb	w0, [x19, 8]
 	uxtw	x22, w20
@@ -12260,16 +12280,16 @@ allocate_data_superblock:
 	adrp	x7, .LANCHOR14
 	adrp	x5, .LANCHOR73
 	adrp	x4, .LANCHOR74
-	cbnz	w0, .L927
+	cbnz	w0, .L928
 	.loc 2 2575 0
 	ldr	x2, [x6, #:lo12:.LANCHOR40]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L928
+	cbz	w0, .L929
 	.loc 2 2576 0
 	ldrh	w3, [x7, #:lo12:.LANCHOR14]
 	add	w0, w0, w3
-.L952:
+.L953:
 	.loc 2 2578 0
 	strh	w0, [x2, x1]
 	.loc 2 2580 0
@@ -12281,8 +12301,8 @@ allocate_data_superblock:
 	.loc 2 2580 0
 	mov	w0, w20
 	bl	ftl_set_blk_mode
-.LVL1283:
-.L930:
+.LVL1285:
+.L931:
 	.loc 2 2587 0
 	ldr	x0, [x6, #:lo12:.LANCHOR40]
 	lsl	x22, x22, 1
@@ -12290,10 +12310,10 @@ allocate_data_superblock:
 	adrp	x0, .LANCHOR77
 	ldr	w2, [x0, #:lo12:.LANCHOR77]
 	cmp	w1, w2
-	bls	.L931
+	bls	.L932
 	.loc 2 2588 0
 	str	w1, [x0, #:lo12:.LANCHOR77]
-.L931:
+.L932:
 	.loc 2 2590 0
 	ldr	w2, [x5, #:lo12:.LANCHOR73]
 	ldr	w1, [x4, #:lo12:.LANCHOR74]
@@ -12309,18 +12329,18 @@ allocate_data_superblock:
 	ldr	w0, [x1, 16]
 	add	w0, w0, 1
 	str	w0, [x1, 16]
-.LVL1284:
+.LVL1286:
 	.loc 2 2594 0
 	ldr	x0, [x25, #:lo12:.LANCHOR112]
 	ubfiz	x1, x21, 5, 16
 	add	x1, x1, 4
 	add	x2, x0, 4
 	add	x1, x0, x1
-.LVL1285:
-.L932:
+.LVL1287:
+.L933:
 	.loc 2 2593 0 discriminator 1
 	cmp	x1, x2
-	bne	.L933
+	bne	.L934
 	.loc 2 2595 0
 	ldrb	w1, [x19, 8]
 	mov	w2, w21
@@ -12328,28 +12348,28 @@ allocate_data_superblock:
 	mov	x24, 0
 	.loc 2 2595 0
 	bl	FlashEraseBlocks
-.LVL1286:
+.LVL1288:
 	.loc 2 2596 0
 	mov	w1, 0
-.LVL1287:
-.L934:
+.LVL1289:
+.L935:
 	.loc 2 2597 0 discriminator 1
 	cmp	w21, w24, uxth
-	bhi	.L936
+	bhi	.L937
 	.loc 2 2608 0
-	cbz	w1, .L937
+	cbz	w1, .L938
 	.loc 2 2609 0
 	mov	w0, w20
 	bl	update_multiplier_value
-.LVL1288:
+.LVL1290:
 	.loc 2 2610 0
 	bl	FtlBbmTblFlush
-.LVL1289:
-.L937:
+.LVL1291:
+.L938:
 	.loc 2 2613 0
 	ldrb	w0, [x19, 7]
 	adrp	x2, .LANCHOR43
-	cbnz	w0, .L938
+	cbnz	w0, .L939
 	.loc 2 2615 0
 	ldr	x0, [x2, #:lo12:.LANCHOR43]
 	mov	w1, -1
@@ -12357,40 +12377,40 @@ allocate_data_superblock:
 	.loc 2 2616 0
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.LVL1290:
+.LVL1292:
 	.loc 2 2617 0
-	b	.L915
-.LVL1291:
-.L924:
+	b	.L916
+.LVL1293:
+.L925:
 	.loc 2 2566 0
 	ldrh	w2, [x4]
 	.loc 2 2565 0
 	stp	xzr, xzr, [x1]
 	.loc 2 2566 0
 	cmp	w2, w6
-	beq	.L923
+	beq	.L924
 	.loc 2 2567 0
 	ubfiz	x5, x21, 5, 16
 	.loc 2 2568 0
 	add	w21, w21, 1
-.LVL1292:
+.LVL1294:
 	.loc 2 2567 0
 	add	x5, x3, x5
 	.loc 2 2568 0
 	and	w21, w21, 65535
-.LVL1293:
+.LVL1295:
 	.loc 2 2567 0
 	lsl	w2, w2, 10
 	str	w2, [x5, 4]
-.L923:
+.L924:
 	add	x1, x1, 32
 	add	x4, x4, 2
-	b	.L922
-.L928:
+	b	.L923
+.L929:
 	.loc 2 2578 0
 	mov	w0, 2
-	b	.L952
-.L927:
+	b	.L953
+.L928:
 	.loc 2 2582 0
 	ldr	x2, [x6, #:lo12:.LANCHOR40]
 	lsl	x0, x22, 1
@@ -12401,43 +12421,43 @@ allocate_data_superblock:
 	ldr	w0, [x4, #:lo12:.LANCHOR74]
 	add	w0, w0, 1
 	str	w0, [x4, #:lo12:.LANCHOR74]
-.LVL1294:
-.LBB244:
-.LBB245:
+.LVL1296:
+.LBB248:
+.LBB249:
 	mov	w0, w20
 	bl	ftl_set_blk_mode.part.7
-.LVL1295:
-	b	.L930
-.LVL1296:
-.L933:
-.LBE245:
-.LBE244:
+.LVL1297:
+	b	.L931
+.LVL1298:
+.L934:
+.LBE249:
+.LBE248:
 	.loc 2 2594 0 discriminator 3
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 32
-	b	.L932
-.LVL1297:
-.L936:
+	b	.L933
+.LVL1299:
+.L937:
 	.loc 2 2598 0
 	ldr	x2, [x25, #:lo12:.LANCHOR112]
 	lsl	x0, x24, 5
 	add	x3, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L935
+	bne	.L936
 	.loc 2 2599 0
 	add	w1, w1, 1
-.LVL1298:
+.LVL1300:
 	.loc 2 2600 0
 	ldr	w0, [x3, 4]
 	.loc 2 2599 0
 	stp	w2, w1, [x29, 96]
-.LVL1299:
+.LVL1301:
 	.loc 2 2601 0
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1300:
+.LVL1302:
 	.loc 2 2603 0
 	ldp	w2, w1, [x29, 96]
 	.loc 2 2602 0
@@ -12446,14 +12466,14 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.LVL1301:
-.L935:
+.LVL1303:
+.L936:
 	add	x24, x24, 1
-.LVL1302:
+.LVL1304:
 	add	x26, x26, 2
-	b	.L934
-.LVL1303:
-.L938:
+	b	.L935
+.LVL1305:
+.L939:
 	.loc 2 2620 0
 	adrp	x1, .LANCHOR19
 	.loc 2 2624 0
@@ -12482,11 +12502,11 @@ allocate_data_superblock:
 	strh	w0, [x1, x22]
 	.loc 2 2626 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L939
+	cbz	w0, .L940
 	.loc 2 2626 0 is_stmt 0 discriminator 2
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L940
-.L939:
+	cbnz	w0, .L941
+.L940:
 	.loc 2 2626 0 discriminator 3
 	adrp	x1, .LANCHOR158
 	adrp	x0, .LC1
@@ -12494,16 +12514,16 @@ allocate_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1304:
-.L940:
+.LVL1306:
+.L941:
 	.loc 2 2628 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1305:
+.LVL1307:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1306:
+.LVL1308:
 	ldp	x23, x24, [sp, 48]
-.LVL1307:
+.LVL1309:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
@@ -12532,7 +12552,7 @@ FtlGcFreeBadSuperBlk:
 .LFB317:
 	.loc 5 390 0
 	.cfi_startproc
-.LVL1308:
+.LVL1310:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -12551,7 +12571,7 @@ FtlGcFreeBadSuperBlk:
 	and	w25, w0, 65535
 	.loc 5 395 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR103]
-.LVL1309:
+.LVL1311:
 	.loc 5 390 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
@@ -12562,31 +12582,31 @@ FtlGcFreeBadSuperBlk:
 	.cfi_offset 24, -40
 	.cfi_offset 27, -16
 	.loc 5 395 0
-	cbz	w0, .L954
-.LBB248:
-.LBB249:
+	cbz	w0, .L955
+.LBB252:
+.LBB253:
 	.loc 5 399 0
 	adrp	x23, .LANCHOR104
 	.loc 5 406 0
 	add	x24, x23, :lo12:.LANCHOR104
-.LBE249:
-.LBE248:
+.LBE253:
+.LBE252:
 	mov	w19, 0
-.L955:
-.LVL1310:
-.LBB252:
-.LBB250:
+.L956:
+.LVL1312:
+.LBB256:
+.LBB254:
 	.loc 5 396 0
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w0, w19
-	bhi	.L961
+	bhi	.L962
 	.loc 5 412 0
 	bl	FtlGcReFreshBadBlk
-.LVL1311:
-.L954:
-.LBE250:
-.LBE252:
+.LVL1313:
+.L955:
+.LBE254:
+.LBE256:
 	.loc 5 415 0
 	mov	w0, 0
 	ldr	x27, [sp, 80]
@@ -12594,7 +12614,7 @@ FtlGcFreeBadSuperBlk:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1312:
+.LVL1314:
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12610,11 +12630,11 @@ FtlGcFreeBadSuperBlk:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1313:
-.L961:
+.LVL1315:
+.L962:
 	.cfi_restore_state
-.LBB253:
-.LBB251:
+.LBB257:
+.LBB255:
 	.loc 5 397 0
 	adrp	x0, .LANCHOR13
 	add	x0, x0, :lo12:.LANCHOR13
@@ -12625,40 +12645,40 @@ FtlGcFreeBadSuperBlk:
 	.loc 5 397 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
-.LVL1314:
+.LVL1316:
 	and	w26, w0, 65535
-.LVL1315:
-.L956:
+.LVL1317:
+.L957:
 	.loc 5 398 0
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L960
+	bhi	.L961
 	.loc 5 396 0
 	add	w19, w19, 1
-.LVL1316:
+.LVL1318:
 	and	w19, w19, 65535
-.LVL1317:
-	b	.L955
-.L960:
+.LVL1319:
+	b	.L956
+.L961:
 	.loc 5 399 0
 	add	x0, x23, :lo12:.LANCHOR104
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L957
+	bne	.L958
 	.loc 5 401 0
 	mov	w1, w26
 	adrp	x0, .LC97
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.LVL1318:
+.LVL1320:
 	.loc 5 403 0
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
-.LVL1319:
+.LVL1321:
 	.loc 5 404 0
 	bl	FtlBbmTblFlush
-.LVL1320:
+.LVL1322:
 	.loc 5 405 0
 	ldrh	w1, [x22]
 	.loc 5 406 0
@@ -12666,32 +12686,32 @@ FtlGcFreeBadSuperBlk:
 	and	x4, x20, 65535
 	.loc 5 405 0
 	mov	x0, 0
-.LVL1321:
-.L958:
+.LVL1323:
+.L959:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L959
+	bhi	.L960
 	.loc 5 407 0
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.LVL1322:
-.L957:
+.LVL1324:
+.L958:
 	.loc 5 398 0
 	and	w20, w27, 65535
-.LVL1323:
-	b	.L956
-.LVL1324:
-.L959:
+.LVL1325:
+	b	.L957
+.LVL1326:
+.L960:
 	.loc 5 406 0
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
-.LVL1325:
+.LVL1327:
 	strh	w5, [x24, x2, lsl 1]
-	b	.L958
-.LBE251:
-.LBE253:
+	b	.L959
+.LBE255:
+.LBE257:
 	.cfi_endproc
 .LFE317:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
@@ -12703,7 +12723,7 @@ update_vpc_list:
 .LFB301:
 	.loc 2 2687 0
 	.cfi_startproc
-.LVL1326:
+.LVL1328:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -12721,49 +12741,49 @@ update_vpc_list:
 	.loc 2 2688 0
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ubfiz	x0, x19, 1, 16
-.LVL1327:
+.LVL1329:
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L967
+	cbnz	w0, .L968
 	.loc 2 2689 0
 	adrp	x0, .LANCHOR82
 	ldrh	w1, [x0, #:lo12:.LANCHOR82]
 	cmp	w1, w19
-	bne	.L968
+	bne	.L969
 	.loc 2 2691 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR82]
-.L969:
-.LVL1328:
-.LBB256:
-.LBB257:
+.L970:
+.LVL1330:
+.LBB260:
+.LBB261:
 	.loc 2 2696 0
 	adrp	x20, .LANCHOR45
 	mov	w1, w19
 	adrp	x0, .LANCHOR42
 	add	x0, x0, :lo12:.LANCHOR42
 	bl	List_remove_node
-.LVL1329:
+.LVL1331:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
-	cbnz	w0, .L971
+	cbnz	w0, .L972
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	mov	w2, 2696
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1330:
-.L971:
+.LVL1332:
+.L972:
 	ldrh	w0, [x20, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
 	strh	w0, [x20, #:lo12:.LANCHOR45]
 	.loc 2 2697 0
 	mov	w0, w19
 	bl	free_data_superblock
-.LVL1331:
+.LVL1333:
 	.loc 2 2698 0
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-.LVL1332:
+.LVL1334:
 	.loc 2 2699 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x20, #:lo12:.LANCHOR45]
@@ -12772,43 +12792,43 @@ update_vpc_list:
 	adrp	x1, .LANCHOR5
 	ldrh	w1, [x1, #:lo12:.LANCHOR5]
 	cmp	w0, w1
-	ble	.L975
+	ble	.L976
 	adrp	x1, .LANCHOR159
 	adrp	x0, .LC1
 	mov	w2, 2699
 	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1333:
-.L975:
+.LVL1335:
+.L976:
 	mov	w0, 1
-	b	.L966
-.LVL1334:
-.L968:
-.LBE257:
-.LBE256:
+	b	.L967
+.LVL1336:
+.L969:
+.LBE261:
+.LBE260:
 	.loc 2 2692 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L974
+	beq	.L975
 	.loc 2 2692 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L974
+	beq	.L975
 	.loc 2 2692 0 discriminator 2
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	bne	.L969
-.L974:
+	bne	.L970
+.L975:
 	.loc 2 2694 0 is_stmt 1
 	mov	w0, 0
-.L966:
+.L967:
 	.loc 2 2705 0
 	ldp	x19, x20, [sp, 16]
-.LVL1335:
+.LVL1337:
 	ldp	x29, x30, [sp], 32
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12817,13 +12837,13 @@ update_vpc_list:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L967:
+.L968:
 	.cfi_restore_state
 	.loc 2 2702 0
 	mov	w0, w19
 	bl	List_update_data_list
-.LVL1336:
-	b	.L974
+.LVL1338:
+	b	.L975
 	.cfi_endproc
 .LFE301:
 	.size	update_vpc_list, .-update_vpc_list
@@ -12835,7 +12855,7 @@ decrement_vpc_count:
 .LFB302:
 	.loc 2 2708 0
 	.cfi_startproc
-.LVL1337:
+.LVL1339:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -12850,37 +12870,37 @@ decrement_vpc_count:
 	.cfi_offset 21, -16
 	.loc 2 2711 0
 	mov	w0, 65535
-.LVL1338:
+.LVL1340:
 	cmp	w19, w0
-	beq	.L978
+	beq	.L979
 	.loc 2 2712 0
 	adrp	x21, .LANCHOR43
 	ubfiz	x20, x19, 1, 16
 	ldr	x1, [x21, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L979
+	cbnz	w0, .L980
 	.loc 2 2713 0
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC98
 	add	x0, x0, :lo12:.LC98
 	bl	printf
-.LVL1339:
+.LVL1341:
 	.loc 2 2714 0
 	ldr	x0, [x21, #:lo12:.LANCHOR43]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L980
-.L985:
-.LVL1340:
+	cbz	w0, .L981
+.L986:
+.LVL1342:
 	.loc 2 2715 0 discriminator 1
 	mov	w20, 0
-.LVL1341:
-.L977:
+.LVL1343:
+.L978:
 	.loc 2 2733 0
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1342:
+.LVL1344:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -12890,8 +12910,8 @@ decrement_vpc_count:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1343:
-.L980:
+.LVL1345:
+.L981:
 	.cfi_restore_state
 	.loc 2 2714 0 discriminator 1
 	mov	w2, 2714
@@ -12900,29 +12920,29 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1344:
-	b	.L985
-.L979:
+.LVL1346:
+	b	.L986
+.L980:
 	.loc 2 2717 0
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L978:
+.L979:
 	.loc 2 2721 0
 	adrp	x21, .LANCHOR151
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR151]
 	cmp	w0, w1
-	bne	.L982
+	bne	.L983
 	.loc 2 2722 0
 	strh	w19, [x21, #:lo12:.LANCHOR151]
-	b	.L985
-.L982:
+	b	.L986
+.L983:
 	.loc 2 2724 0
 	cmp	w19, w0
-	beq	.L985
+	beq	.L986
 	.loc 2 2727 0
 	bl	update_vpc_list
-.LVL1345:
+.LVL1347:
 	cmp	w0, 0
 	.loc 2 2730 0
 	adrp	x1, .LANCHOR41
@@ -12931,7 +12951,7 @@ decrement_vpc_count:
 	strh	w19, [x21, #:lo12:.LANCHOR151]
 	.loc 2 2727 0
 	cset	w20, ne
-.LVL1346:
+.LVL1348:
 	.loc 2 2730 0
 	ldr	x1, [x1, #:lo12:.LANCHOR41]
 	ldr	x0, [x0, #:lo12:.LANCHOR42]
@@ -12944,10 +12964,10 @@ decrement_vpc_count:
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L977
+	cbnz	w1, .L978
 	.loc 2 2730 0 is_stmt 0 discriminator 1
 	cmp	w19, w0, uxth
-	beq	.L977
+	beq	.L978
 	.loc 2 2730 0 discriminator 2
 	mov	w2, 2730
 	adrp	x1, .LANCHOR160
@@ -12955,8 +12975,8 @@ decrement_vpc_count:
 	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1347:
-	b	.L977
+.LVL1349:
+	b	.L978
 	.cfi_endproc
 .LFE302:
 	.size	decrement_vpc_count, .-decrement_vpc_count
@@ -12993,23 +13013,23 @@ FtlWriteDump_data:
 	.cfi_offset 24, -72
 	.cfi_offset 25, -64
 	.loc 2 948 0
-	cbz	w2, .L987
+	cbz	w2, .L988
 	.loc 2 948 0 is_stmt 0 discriminator 1
 	ldrb	w1, [x0, 8]
-	cbnz	w1, .L987
+	cbnz	w1, .L988
 	.loc 2 949 0 is_stmt 1
 	adrp	x3, .LANCHOR19
 	ldrb	w1, [x0, 7]
 	ldrh	w3, [x3, #:lo12:.LANCHOR19]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L987
-.LVL1348:
-.LBB261:
-.LBB262:
+	beq	.L988
+.LVL1350:
+.LBB265:
+.LBB266:
 	.loc 2 956 0
 	ldrb	w0, [x0, 10]
-	cbnz	w0, .L986
+	cbnz	w0, .L987
 	.loc 2 951 0
 	adrp	x0, .LANCHOR62
 	.loc 2 958 0
@@ -13026,7 +13046,7 @@ FtlWriteDump_data:
 	.loc 2 958 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1349:
+.LVL1351:
 	.loc 2 964 0
 	adrp	x2, .LANCHOR109
 	.loc 2 963 0
@@ -13043,25 +13063,25 @@ FtlWriteDump_data:
 	str	w1, [x29, 100]
 	.loc 2 964 0
 	stp	x0, x20, [x29, 104]
-.LVL1350:
+.LVL1352:
 	.loc 2 962 0
 	str	w21, [x29, 120]
 	.loc 2 966 0
 	str	wzr, [x20, 4]
 	.loc 2 967 0
-	beq	.L989
+	beq	.L990
 	.loc 2 969 0
 	mov	w2, 0
 	mov	w1, 1
 	add	x0, x29, 96
 	bl	FlashReadPages
-.LVL1351:
-.L990:
+.LVL1353:
+.L991:
 	.loc 2 987 0
 	adrp	x23, .LANCHOR72
 	.loc 2 953 0
 	lsl	w25, w25, 2
-.LVL1352:
+.LVL1354:
 	.loc 2 978 0
 	add	x22, x19, :lo12:.LANCHOR51
 	.loc 2 987 0
@@ -13070,19 +13090,19 @@ FtlWriteDump_data:
 	mov	w0, -3947
 	mov	w24, 0
 	strh	w0, [x20]
-.L991:
+.L992:
 	.loc 2 976 0
 	cmp	w25, w24
-	bne	.L995
-.L992:
+	bne	.L996
+.L993:
 	.loc 2 992 0
 	add	x19, x19, :lo12:.LANCHOR51
 	mov	w0, 1
 	strb	w0, [x19, 10]
-.LVL1353:
-.L986:
-.LBE262:
-.LBE261:
+.LVL1355:
+.L987:
+.LBE266:
+.LBE265:
 	.loc 2 1000 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13101,23 +13121,23 @@ FtlWriteDump_data:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1354:
-.L989:
+.LVL1356:
+.L990:
 	.cfi_restore_state
-.LBB264:
-.LBB263:
+.LBB268:
+.LBB267:
 	.loc 2 973 0
 	adrp	x1, .LANCHOR23
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1355:
-	b	.L990
-.LVL1356:
-.L995:
+.LVL1357:
+	b	.L991
+.LVL1358:
+.L996:
 	.loc 2 978 0
 	ldrh	w0, [x22, 4]
-	cbz	w0, .L992
+	cbz	w0, .L993
 	.loc 2 983 0
 	ldr	w0, [x29, 100]
 	add	w24, w24, 1
@@ -13128,7 +13148,7 @@ FtlWriteDump_data:
 	.loc 2 986 0
 	mov	x0, x22
 	bl	get_new_active_ppa
-.LVL1357:
+.LVL1359:
 	str	w0, [x29, 100]
 	.loc 2 987 0
 	ldr	w0, [x23]
@@ -13149,21 +13169,21 @@ FtlWriteDump_data:
 	.loc 2 988 0
 	add	x0, x29, 96
 	bl	FlashProgPages
-.LVL1358:
+.LVL1360:
 	.loc 2 990 0
 	ldrh	w0, [x22]
 	bl	decrement_vpc_count
-.LVL1359:
-	b	.L991
-.LVL1360:
-.L987:
-.LBE263:
-.LBE264:
+.LVL1361:
+	b	.L992
+.LVL1362:
+.L988:
+.LBE267:
+.LBE268:
 	.loc 2 998 0
 	add	x19, x19, :lo12:.LANCHOR51
 	strb	wzr, [x19, 10]
 	.loc 2 1000 0
-	b	.L986
+	b	.L987
 	.cfi_endproc
 .LFE268:
 	.size	FtlWriteDump_data, .-FtlWriteDump_data
@@ -13196,17 +13216,17 @@ l2p_flush:
 	adrp	x21, .LANCHOR56
 	.loc 2 744 0
 	bl	FtlWriteDump_data
-.LVL1361:
-.L1005:
+.LVL1363:
+.L1006:
 	.loc 2 746 0 discriminator 1
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1007
+	bhi	.L1008
 	.loc 2 750 0
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1362:
+.LVL1364:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -13216,26 +13236,26 @@ l2p_flush:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1363:
-.L1007:
+.LVL1365:
+.L1008:
 	.cfi_restore_state
 	.loc 2 747 0
 	ldr	x1, [x21, #:lo12:.LANCHOR56]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1006
+	tbz	w0, #31, .L1007
 	.loc 2 748 0
 	mov	w0, w19
 	bl	flush_l2p_region
-.LVL1364:
-.L1006:
+.LVL1366:
+.L1007:
 	.loc 2 746 0 discriminator 2
 	add	w19, w19, 1
-.LVL1365:
+.LVL1367:
 	and	w19, w19, 65535
-.LVL1366:
-	b	.L1005
+.LVL1368:
+	b	.L1006
 	.cfi_endproc
 .LFE261:
 	.size	l2p_flush, .-l2p_flush
@@ -13247,7 +13267,7 @@ FtlRecoverySuperblock:
 .LFB281:
 	.loc 2 1656 0
 	.cfi_startproc
-.LVL1367:
+.LVL1369:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
@@ -13264,7 +13284,7 @@ FtlRecoverySuperblock:
 	stp	x21, x22, [sp, 32]
 	.loc 2 1670 0
 	ldrh	w0, [x0]
-.LVL1368:
+.LVL1370:
 	.loc 2 1656 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
@@ -13281,7 +13301,7 @@ FtlRecoverySuperblock:
 	.cfi_offset 27, -112
 	.cfi_offset 28, -104
 	.loc 2 1670 0
-	beq	.L1133
+	beq	.L1134
 	.loc 2 1676 0
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 164]
@@ -13289,23 +13309,23 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR19
 	.loc 2 1675 0
 	ldrh	w26, [x19, 2]
-.LVL1369:
+.LVL1371:
 	str	x0, [x29, 128]
 	.loc 2 1681 0
 	ldrh	w2, [x0, #:lo12:.LANCHOR19]
 	cmp	w2, w26
-	bne	.L1012
+	bne	.L1013
 	.loc 2 1682 0
 	strh	wzr, [x19, 4]
-.LVL1370:
-.L1139:
+.LVL1372:
+.L1140:
 	.loc 2 1709 0
 	strb	wzr, [x19, 6]
-.LVL1371:
-.L1133:
+.LVL1373:
+.L1134:
 	.loc 2 2010 0
 	ldp	x19, x20, [sp, 16]
-.LVL1372:
+.LVL1374:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13327,35 +13347,35 @@ FtlRecoverySuperblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1373:
-.L1012:
+.LVL1375:
+.L1013:
 	.cfi_restore_state
 	.loc 2 1689 0
 	ldrh	w0, [x19, 16]
-.LVL1374:
+.LVL1376:
 	.loc 2 1688 0
 	mov	w20, 0
-.LVL1375:
-.L1013:
+.LVL1377:
+.L1014:
 	.loc 2 1690 0
 	cmp	w0, w1
-	beq	.L1014
+	beq	.L1015
 	.loc 2 1697 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL1376:
+.LVL1378:
 	mov	w23, w0
-.LVL1377:
+.LVL1379:
 	.loc 2 1705 0
 	cmn	w0, #1
-	beq	.L1015
+	beq	.L1016
 	.loc 2 1721 0
 	adrp	x1, .LANCHOR93
 	.loc 2 1717 0
 	adrp	x2, .LANCHOR3
 	.loc 2 1720 0
 	adrp	x20, .LANCHOR120
-.LVL1378:
+.LVL1380:
 	.loc 2 1722 0
 	add	x4, x19, 16
 	.loc 2 1721 0
@@ -13363,7 +13383,7 @@ FtlRecoverySuperblock:
 	adrp	x1, .LANCHOR23
 	.loc 2 1720 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1379:
+.LVL1381:
 	.loc 2 1722 0
 	mov	w22, 0
 	.loc 2 1721 0
@@ -13382,16 +13402,16 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x2, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L1016:
-.LVL1380:
+.L1017:
+.LVL1382:
 	.loc 2 1717 0 discriminator 1
 	cmp	x4, x1
-	bne	.L1020
+	bne	.L1021
 	.loc 2 1727 0
 	mov	w2, 0
 	mov	w1, w22
 	bl	FlashReadPages
-.LVL1381:
+.LVL1383:
 	.loc 2 1728 0
 	adrp	x0, .LANCHOR72
 	.loc 2 1730 0
@@ -13409,40 +13429,40 @@ FtlRecoverySuperblock:
 	mov	w3, 0
 	.loc 2 1728 0
 	sub	w21, w21, #1
-.LVL1382:
+.LVL1384:
 	str	x0, [x29, 144]
-.LVL1383:
-.L1021:
+.LVL1385:
+.L1022:
 	.loc 2 1729 0 discriminator 1
 	cmp	w22, w3
-	bne	.L1026
+	bne	.L1027
 	.loc 2 1747 0
 	add	w22, w23, 1
-.LVL1384:
+.LVL1386:
 	.loc 2 1749 0
 	ldr	w0, [x4, 4]
 	.loc 2 1747 0
 	and	w22, w22, 65535
-.LVL1385:
-.L1135:
+.LVL1387:
+.L1136:
 	.loc 2 1753 0
 	lsr	w0, w0, 10
 	bl	P2V_plane
-.LVL1386:
+.LVL1388:
 	and	w27, w0, 65535
-.LVL1387:
+.LVL1389:
 	.loc 2 1758 0
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w22
-	bne	.L1028
+	bne	.L1029
 	.loc 2 1759 0
 	strh	w22, [x19, 2]
 	.loc 2 1760 0
 	strb	wzr, [x19, 6]
 	.loc 2 1761 0
 	strh	wzr, [x19, 4]
-.L1028:
+.L1029:
 	.loc 2 1764 0
 	ldr	w0, [x29, 164]
 	cmp	w22, w26
@@ -13450,48 +13470,48 @@ FtlRecoverySuperblock:
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w1, w0
-	beq	.L1029
-.LVL1388:
-.L1140:
+	beq	.L1030
+.LVL1390:
+.L1141:
 	.loc 2 2004 0
 	mov	w2, w27
 	mov	w1, w22
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-.LVL1389:
-	b	.L1133
-.LVL1390:
-.L1014:
+.LVL1391:
+	b	.L1134
+.LVL1392:
+.L1015:
 	.loc 2 1691 0
 	add	w20, w20, 1
-.LVL1391:
+.LVL1393:
 	and	w20, w20, 65535
-.LVL1392:
+.LVL1394:
 	.loc 2 1692 0
 	add	x0, x19, x20, sxtw 1
-.LVL1393:
-	ldrh	w0, [x0, 16]
-.LVL1394:
-	b	.L1013
 .LVL1395:
-.L1015:
+	ldrh	w0, [x0, 16]
+.LVL1396:
+	b	.L1014
+.LVL1397:
+.L1016:
 	.loc 2 1706 0
-	cbz	w26, .L1017
+	cbz	w26, .L1018
 	.loc 2 1706 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC1
-.LVL1396:
+.LVL1398:
 	mov	w2, 1706
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1397:
-.L1017:
+.LVL1399:
+.L1018:
 	.loc 2 1707 0 is_stmt 1
 	ldr	w0, [x29, 164]
 	cmp	w0, 0
 	ccmp	w20, w0, 4, ne
-	beq	.L1018
+	beq	.L1019
 	.loc 2 1707 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR161
 	adrp	x0, .LC1
@@ -13499,23 +13519,23 @@ FtlRecoverySuperblock:
 	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1398:
-.L1018:
+.LVL1400:
+.L1019:
 	.loc 2 1708 0 is_stmt 1
 	strh	wzr, [x19, 2]
-	b	.L1139
-.LVL1399:
-.L1020:
+	b	.L1140
+.LVL1401:
+.L1021:
 	.loc 2 1718 0
 	ldrh	w3, [x4]
-.LVL1400:
+.LVL1402:
 	.loc 2 1719 0
 	cmp	w3, w10
-	beq	.L1019
+	beq	.L1020
 	.loc 2 1720 0
 	ubfiz	x2, x22, 5, 16
 	orr	w3, w23, w3, lsl 10
-.LVL1401:
+.LVL1403:
 	add	x2, x0, x2
 	str	w3, [x2, 4]
 	.loc 2 1721 0
@@ -13527,100 +13547,100 @@ FtlRecoverySuperblock:
 	mul	w3, w22, w8
 	.loc 2 1723 0
 	add	w22, w22, 1
-.LVL1402:
+.LVL1404:
 	and	w22, w22, 65535
-.LVL1403:
+.LVL1405:
 	.loc 2 1722 0
 	asr	w3, w3, 2
 	add	x3, x7, x3, sxtw 2
 	str	x3, [x2, 16]
-.L1019:
+.L1020:
 	add	x4, x4, 2
-.LVL1404:
-	b	.L1016
-.LVL1405:
-.L1026:
+.LVL1406:
+	b	.L1017
+.LVL1407:
+.L1027:
 	.loc 2 1730 0
 	ldr	w0, [x11]
-	cbnz	w0, .L1022
+	cbnz	w0, .L1023
 	.loc 2 1731 0
 	ldr	x8, [x11, 16]
-.LVL1406:
+.LVL1408:
 	.loc 2 1732 0
 	ldr	w5, [x8, 4]
 	cmn	w5, #1
-	beq	.L1023
+	beq	.L1024
 	.loc 2 1733 0
 	ldr	w1, [x7]
 	mov	w0, w5
 	bl	ftl_cmp_data_ver
-.LVL1407:
-	cbz	w0, .L1023
+.LVL1409:
+	cbz	w0, .L1024
 	.loc 2 1735 0
 	add	w5, w5, 1
 	str	w5, [x7]
-.L1023:
+.L1024:
 	.loc 2 1738 0
 	ldr	w0, [x8]
 	cmn	w0, #1
-	bne	.L1025
+	bne	.L1026
 	.loc 2 1753 0
 	ubfiz	x3, x3, 5, 16
-.LVL1408:
+.LVL1410:
 	.loc 2 1752 0
 	and	w22, w23, 65535
-.LVL1409:
+.LVL1411:
 	.loc 2 1753 0
 	add	x3, x4, x3
 	ldr	w0, [x3, 4]
-	b	.L1135
-.LVL1410:
-.L1022:
+	b	.L1136
+.LVL1412:
+.L1023:
 	.loc 2 1742 0
 	mov	w6, w10
-.LVL1411:
-.L1025:
+.LVL1413:
+.L1026:
 	.loc 2 1729 0 discriminator 2
 	add	w3, w3, 1
-.LVL1412:
+.LVL1414:
 	add	x11, x11, 32
 	and	w3, w3, 65535
-.LVL1413:
-	b	.L1021
-.LVL1414:
-.L1029:
+.LVL1415:
+	b	.L1022
+.LVL1416:
+.L1030:
 	.loc 2 1770 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1030
+	bne	.L1031
 	.loc 2 1770 0 is_stmt 0 discriminator 1
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L1031
-.L1030:
-.LVL1415:
-.LBB265:
+	cbnz	w0, .L1032
+.L1031:
+.LVL1417:
+.LBB269:
 	.loc 2 1775 0 is_stmt 1
 	adrp	x25, .LANCHOR154
 	.loc 2 1774 0
 	and	w28, w23, 65535
-.LVL1416:
+.LVL1418:
 	.loc 2 1775 0
 	ldr	w0, [x25, #:lo12:.LANCHOR154]
 	cmn	w0, #1
-	bne	.L1032
+	bne	.L1033
 	.loc 2 1776 0
 	str	w21, [x25, #:lo12:.LANCHOR154]
-.L1032:
-.LVL1417:
+.L1033:
+.LVL1419:
 	.loc 2 1778 0
 	add	w0, w26, 7
 	cmp	w0, w23, uxth
-	bge	.L1082
+	bge	.L1083
 	.loc 2 1779 0
 	sub	w24, w28, #7
 	and	w24, w24, 65535
-.LVL1418:
-.L1033:
+.LVL1420:
+.L1034:
 	.loc 2 1782 0 discriminator 1
 	ldr	x0, [x29, 152]
 	.loc 2 1784 0 discriminator 1
@@ -13628,11 +13648,11 @@ FtlRecoverySuperblock:
 	mov	w5, 1
 	.loc 2 1782 0 discriminator 1
 	add	x4, x0, :lo12:.LANCHOR3
-.LVL1419:
-.L1034:
+.LVL1421:
+.L1035:
 	.loc 2 1780 0 discriminator 1
 	cmp	w24, w28
-	bhi	.L1044
+	bhi	.L1045
 	ldrh	w1, [x4]
 	.loc 2 1785 0
 	mov	w23, 0
@@ -13640,51 +13660,51 @@ FtlRecoverySuperblock:
 	add	x1, x1, 8
 	ldr	x2, [x29, 168]
 	add	x1, x19, x1, lsl 1
-	b	.L1045
-.LVL1420:
-.L1082:
+	b	.L1046
+.LVL1422:
+.L1083:
 	mov	w24, w26
-	b	.L1033
-.LVL1421:
-.L1036:
+	b	.L1034
+.LVL1423:
+.L1037:
 	.loc 2 1783 0
 	ldrh	w6, [x2]
-.LVL1422:
+.LVL1424:
 	.loc 2 1784 0
 	cmp	w6, w3
-	beq	.L1035
+	beq	.L1036
 	.loc 2 1785 0
 	ubfiz	x7, x23, 5, 16
 	.loc 2 1786 0
 	add	w23, w23, 1
-.LVL1423:
+.LVL1425:
 	.loc 2 1785 0
 	add	x7, x0, x7
 	.loc 2 1786 0
 	and	w23, w23, 65535
-.LVL1424:
+.LVL1426:
 	.loc 2 1785 0
 	orr	w6, w24, w6, lsl 10
-.LVL1425:
+.LVL1427:
 	str	w6, [x7, 4]
-.L1035:
+.L1036:
 	add	x2, x2, 2
-.LVL1426:
-.L1045:
+.LVL1428:
+.L1046:
 	.loc 2 1782 0 discriminator 1
 	cmp	x2, x1
-	bne	.L1036
+	bne	.L1037
 	.loc 2 1789 0
 	mov	w1, w23
 	mov	w2, 0
 	str	w5, [x29, 112]
 	ubfiz	x23, x23, 5, 16
-.LVL1427:
+.LVL1429:
 	str	w3, [x29, 120]
 	add	x23, x23, 16
 	str	x4, [x29, 136]
 	bl	FlashReadPages
-.LVL1428:
+.LVL1430:
 	.loc 2 1791 0
 	ldr	x2, [x20, #:lo12:.LANCHOR120]
 	ldr	w1, [x25, #:lo12:.LANCHOR154]
@@ -13695,29 +13715,29 @@ FtlRecoverySuperblock:
 	add	x23, x2, x23
 	ldr	x4, [x29, 136]
 	mov	w2, 0
-.LVL1429:
-.L1037:
+.LVL1431:
+.L1038:
 	.loc 2 1790 0 is_stmt 0 discriminator 1
 	cmp	x23, x0
-	bne	.L1042
-	cbz	w2, .L1043
+	bne	.L1043
+	cbz	w2, .L1044
 	str	w1, [x25, #:lo12:.LANCHOR154]
-.L1043:
+.L1044:
 	.loc 2 1780 0 is_stmt 1
 	add	w24, w24, 1
-.LVL1430:
+.LVL1432:
 	and	w24, w24, 65535
-.LVL1431:
-	b	.L1034
-.L1042:
+.LVL1433:
+	b	.L1035
+.L1043:
 	.loc 2 1791 0
 	ldr	w6, [x0, -16]
-	cbz	w6, .L1038
-	cbz	w2, .L1031
+	cbz	w6, .L1039
+	cbz	w2, .L1032
 	str	w1, [x25, #:lo12:.LANCHOR154]
-.LVL1432:
-.L1031:
-.LBE265:
+.LVL1434:
+.L1032:
+.LBE269:
 	.loc 2 1814 0
 	mov	w1, 1
 	adrp	x0, .LANCHOR162
@@ -13731,15 +13751,15 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1433:
-.LBB266:
+.LVL1435:
+.LBB270:
 	.loc 2 1897 0
 	add	x0, x28, :lo12:.LANCHOR154
 	str	x0, [x29, 104]
-.LVL1434:
-.L1046:
+.LVL1436:
+.L1047:
 	ldr	x1, [x29, 152]
-.LBE266:
+.LBE270:
 	.loc 2 1820 0
 	mov	w24, 0
 	.loc 2 1824 0
@@ -13751,16 +13771,16 @@ FtlRecoverySuperblock:
 	ldrh	w1, [x1, #:lo12:.LANCHOR3]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.LVL1435:
-.L1047:
+.LVL1437:
+.L1048:
 	.loc 2 1821 0 is_stmt 0 discriminator 1
 	cmp	x1, x2
-	bne	.L1049
+	bne	.L1050
 	.loc 2 1828 0 is_stmt 1
 	mov	w2, 0
 	mov	w1, w24
 	bl	FlashReadPages
-.LVL1436:
+.LVL1438:
 	.loc 2 1829 0
 	mov	x25, 0
 	ubfiz	x0, x24, 5, 16
@@ -13769,23 +13789,23 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR163
 	add	x0, x0, :lo12:.LANCHOR163
 	str	x0, [x29, 120]
-.LVL1437:
-.L1050:
+.LVL1439:
+.L1051:
 	.loc 2 1829 0 discriminator 1
 	ldr	x0, [x29, 112]
 	cmp	x25, x0
-	bne	.L1076
+	bne	.L1077
 	.loc 2 1983 0
 	ldr	x0, [x29, 128]
 	.loc 2 1982 0
 	add	w23, w23, 1
-.LVL1438:
+.LVL1440:
 	and	w23, w23, 65535
-.LVL1439:
+.LVL1441:
 	.loc 2 1983 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, w23
-	bne	.L1046
+	bne	.L1047
 	.loc 2 1986 0
 	ldr	x0, [x29, 152]
 	.loc 2 1988 0
@@ -13794,83 +13814,83 @@ FtlRecoverySuperblock:
 	strh	w23, [x19, 2]
 	.loc 2 1985 0
 	strh	wzr, [x19, 4]
-.LVL1440:
+.LVL1442:
 	.loc 2 1986 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.LVL1441:
-.L1077:
+.LVL1443:
+.L1078:
 	.loc 2 1986 0 is_stmt 0 discriminator 1
 	cmp	w0, w1
-	beq	.L1133
-.LVL1442:
+	beq	.L1134
+.LVL1444:
 	.loc 2 1988 0 is_stmt 1
 	ldr	x4, [x29, 168]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 168]
-.LVL1443:
+.LVL1445:
 	cmp	w3, w2
-	beq	.L1078
+	beq	.L1079
 	.loc 2 1989 0
 	strb	w0, [x19, 6]
-.LVL1444:
+.LVL1446:
 	.loc 2 1990 0
-	b	.L1133
-.LVL1445:
-.L1038:
-.LBB267:
+	b	.L1134
+.LVL1447:
+.L1039:
+.LBB271:
 	.loc 2 1792 0
 	ldr	x6, [x0]
-.LVL1446:
+.LVL1448:
 	.loc 2 1793 0
 	ldrh	w7, [x6]
 	cmp	w7, w3
-	beq	.L1041
+	beq	.L1042
 	.loc 2 1795 0
 	ldr	w6, [x6, 4]
-.LVL1447:
+.LVL1449:
 	cmn	w6, #1
 	csel	w1, w1, w6, eq
 	csel	w2, w2, w5, eq
-.L1041:
+.L1042:
 	add	x0, x0, 32
-.LVL1448:
-	b	.L1037
-.LVL1449:
-.L1044:
+.LVL1450:
+	b	.L1038
+.LVL1451:
+.L1045:
 	.loc 2 1809 0
 	mov	w0, -1
 	str	w0, [x25, #:lo12:.LANCHOR154]
-	b	.L1031
-.LVL1450:
-.L1049:
-.LBE267:
+	b	.L1032
+.LVL1452:
+.L1050:
+.LBE271:
 	.loc 2 1822 0
 	ldrh	w3, [x2]
-.LVL1451:
+.LVL1453:
 	.loc 2 1823 0
 	cmp	w3, w5
-	beq	.L1048
+	beq	.L1049
 	.loc 2 1824 0
 	ubfiz	x4, x24, 5, 16
 	.loc 2 1825 0
 	add	w24, w24, 1
-.LVL1452:
+.LVL1454:
 	.loc 2 1824 0
 	add	x4, x0, x4
 	.loc 2 1825 0
 	and	w24, w24, 65535
-.LVL1453:
+.LVL1455:
 	.loc 2 1824 0
 	orr	w3, w23, w3, lsl 10
-.LVL1454:
+.LVL1456:
 	str	w3, [x4, 4]
-.L1048:
+.L1049:
 	add	x2, x2, 2
-.LVL1455:
-	b	.L1047
-.LVL1456:
-.L1076:
+.LVL1457:
+	b	.L1048
+.LVL1458:
+.L1077:
 	.loc 2 1830 0
 	ldr	x4, [x20, #:lo12:.LANCHOR120]
 	add	x4, x4, x25
@@ -13879,69 +13899,69 @@ FtlRecoverySuperblock:
 	.loc 2 1831 0
 	lsr	w0, w5, 10
 	bl	P2V_plane
-.LVL1457:
+.LVL1459:
 	and	w0, w0, 65535
-.LVL1458:
+.LVL1460:
 	.loc 2 1833 0
 	cmp	w23, w26
-	bcc	.L1051
+	bcc	.L1052
 	.loc 2 1833 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 164]
 	ccmp	w1, w0, 0, eq
-	bhi	.L1051
+	bhi	.L1052
 	.loc 2 1837 0 is_stmt 1
 	cmp	w23, w22
 	ccmp	w27, w0, 0, eq
-	beq	.L1052
-.LVL1459:
+	beq	.L1053
+.LVL1461:
 	.loc 2 1841 0
 	ldr	w0, [x4]
-.LVL1460:
+.LVL1462:
 	cmn	w0, #1
-	beq	.L1053
+	beq	.L1054
 	.loc 2 1842 0
 	ldr	x3, [x4, 16]
-.LVL1461:
+.LVL1463:
 	.loc 2 1843 0
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L1054
-.LVL1462:
-.L1060:
-.LBB268:
+	beq	.L1055
+.LVL1464:
+.L1061:
+.LBB272:
 	.loc 2 1876 0
 	ldrh	w0, [x19]
-.LVL1463:
-.L1138:
-.LBE268:
+.LVL1465:
+.L1139:
+.LBE272:
 	.loc 2 1960 0
 	bl	decrement_vpc_count
-.LVL1464:
-.L1051:
+.LVL1466:
+.L1052:
 	add	x25, x25, 32
-	b	.L1050
-.LVL1465:
-.L1054:
+	b	.L1051
+.LVL1467:
+.L1055:
 	.loc 2 1849 0
 	ldr	w21, [x3, 4]
-.LVL1466:
+.LVL1468:
 	.loc 2 1850 0
 	cmn	w21, #1
-	beq	.L1055
+	beq	.L1056
 	.loc 2 1851 0 discriminator 1
 	ldr	x0, [x29, 144]
 	ldr	w1, [x0, #:lo12:.LANCHOR72]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1467:
+.LVL1469:
 	.loc 2 1850 0 discriminator 1
-	cbz	w0, .L1055
+	cbz	w0, .L1056
 	.loc 2 1853 0
 	ldr	x1, [x29, 144]
 	add	w0, w21, 1
 	str	w0, [x1, #:lo12:.LANCHOR72]
-.L1055:
+.L1056:
 	.loc 2 1858 0
 	ldp	w24, w0, [x3, 8]
 	.loc 2 1859 0
@@ -13952,22 +13972,22 @@ FtlRecoverySuperblock:
 	mov	w2, 0
 	mov	w0, w24
 	bl	log2phys
-.LVL1468:
+.LVL1470:
 	.loc 2 1860 0
 	ldr	w1, [x28, #:lo12:.LANCHOR154]
 	cmn	w1, #1
-	beq	.L1056
+	beq	.L1057
 	.loc 2 1861 0 discriminator 1
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-.LVL1469:
+.LVL1471:
 	.loc 2 1860 0 discriminator 1
-	cbz	w0, .L1056
-.LBB269:
+	cbz	w0, .L1057
+.LBB273:
 	.loc 2 1865 0
 	ldr	w1, [x29, 180]
 	cmn	w1, #1
-	beq	.L1057
+	beq	.L1058
 	.loc 2 1866 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	.loc 2 1868 0
@@ -13981,47 +14001,47 @@ FtlRecoverySuperblock:
 	mov	w1, 1
 	.loc 2 1866 0
 	str	x3, [x29, 136]
-.LVL1470:
+.LVL1472:
 	.loc 2 1868 0
 	bl	FlashReadPages
-.LVL1471:
+.LVL1473:
 	.loc 2 1881 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	x3, [x29, 136]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1058
-.LVL1472:
-.L1059:
+	bne	.L1059
+.LVL1474:
+.L1060:
 	.loc 2 1913 0
 	mov	w0, -1
 	str	w0, [x29, 180]
 	.loc 2 1914 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1473:
-.L1067:
-.LBE269:
+.LVL1475:
+.L1068:
+.LBE273:
 	.loc 2 1954 0
 	ldr	w3, [x29, 180]
 	cmn	w3, #1
-	beq	.L1051
-.L1081:
+	beq	.L1052
+.L1082:
 	.loc 2 1956 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1474:
+.LVL1476:
 	and	w24, w0, 65535
 	.loc 2 1957 0
 	adrp	x0, .LANCHOR5
 	.loc 2 1956 0
 	mov	w3, w24
-.LVL1475:
+.LVL1477:
 	.loc 2 1957 0
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w24
-	bhi	.L1072
+	bhi	.L1073
 	.loc 2 1957 0 is_stmt 0 discriminator 1
 	mov	w2, 1957
 	adrp	x1, .LANCHOR161
@@ -14030,51 +14050,51 @@ FtlRecoverySuperblock:
 	add	x0, x0, :lo12:.LC1
 	str	w24, [x29, 136]
 	bl	printf
-.LVL1476:
+.LVL1478:
 	ldr	w3, [x29, 136]
-.LVL1477:
-.L1072:
+.LVL1479:
+.L1073:
 	.loc 2 1958 0 is_stmt 1
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x24, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1073
+	cbz	w0, .L1074
 	.loc 2 1960 0
 	mov	w0, w3
-	b	.L1138
-.LVL1478:
-.L1057:
-.LBB270:
+	b	.L1139
+.LVL1480:
+.L1058:
+.LBB274:
 	.loc 2 1872 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	bne	.L1060
+	bne	.L1061
 	.loc 2 1873 0
 	mov	w2, 1
 	add	x1, x29, 180
 	mov	w0, w24
 	bl	log2phys
-.LVL1479:
-	b	.L1060
-.LVL1480:
-.L1058:
+.LVL1481:
+	b	.L1061
+.LVL1482:
+.L1059:
 	.loc 2 1881 0 discriminator 1
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L1059
+	bne	.L1060
 	.loc 2 1869 0 discriminator 2
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 136]
-.LVL1481:
+.LVL1483:
 	str	x3, [x29, 96]
 	.loc 2 1882 0 discriminator 2
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR154]
 	bl	ftl_cmp_data_ver
-.LVL1482:
+.LVL1484:
 	.loc 2 1881 0 discriminator 2
-	cbz	w0, .L1059
+	cbz	w0, .L1060
 	.loc 2 1883 0
 	ldp	w0, w1, [x29, 184]
 	ldr	x3, [x29, 96]
@@ -14082,21 +14102,21 @@ FtlRecoverySuperblock:
 	.loc 2 1885 0
 	ldr	w1, [x29, 180]
 	.loc 2 1883 0
-	bne	.L1062
-.L1136:
+	bne	.L1063
+.L1137:
 	.loc 2 1909 0
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-.LVL1483:
-	b	.L1059
-.L1062:
+.LVL1485:
+	b	.L1060
+.L1063:
 	.loc 2 1886 0
 	cmp	w0, w1
-	beq	.L1059
+	beq	.L1060
 	.loc 2 1887 0
 	cmn	w0, #1
-	beq	.L1063
-.LVL1484:
+	beq	.L1064
+.LVL1486:
 	.loc 2 1888 0
 	ldr	x3, [x4, 16]
 	.loc 2 1890 0
@@ -14110,92 +14130,92 @@ FtlRecoverySuperblock:
 	.loc 2 1890 0
 	mov	x0, x4
 	bl	FlashReadPages
-.LVL1485:
+.LVL1487:
 	ldr	x3, [x29, 96]
-.LVL1486:
-.L1064:
+.LVL1488:
+.L1065:
 	.loc 2 1895 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L1065
+	beq	.L1066
 	.loc 2 1897 0
 	ldr	x0, [x29, 104]
 	.loc 2 1896 0
 	ldr	w3, [x3, 4]
-.LVL1487:
+.LVL1489:
 	.loc 2 1897 0
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-.LVL1488:
-	cbz	w0, .L1065
+.LVL1490:
+	cbz	w0, .L1066
 	.loc 2 1898 0
 	ldr	w0, [x29, 136]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-.LVL1489:
-	cbz	w0, .L1059
-.LVL1490:
-.L1065:
+.LVL1491:
+	cbz	w0, .L1060
+.LVL1492:
+.L1066:
 	.loc 2 1909 0
 	ldr	w1, [x29, 180]
-	b	.L1136
-.L1063:
+	b	.L1137
+.L1064:
 	.loc 2 1892 0
 	str	w0, [x4]
-	b	.L1064
-.L1056:
-.LBE270:
+	b	.L1065
+.L1057:
+.LBE274:
 	.loc 2 1915 0
 	ldp	w1, w0, [x29, 184]
 	cmp	w1, w0
-	beq	.L1067
+	beq	.L1068
 	.loc 2 1917 0
 	mov	w2, 1
 	add	x1, x29, 188
 	mov	w0, w24
 	bl	log2phys
-.LVL1491:
+.LVL1493:
 	.loc 2 1918 0
 	ldr	w3, [x29, 184]
 	cmn	w3, #1
-	beq	.L1067
+	beq	.L1068
 	.loc 2 1918 0 is_stmt 0 discriminator 1
 	ldr	w0, [x29, 180]
 	cmp	w3, w0
-	beq	.L1081
+	beq	.L1082
 	.loc 2 1919 0 is_stmt 1
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1492:
+.LVL1494:
 	.loc 2 1921 0
 	adrp	x1, .LANCHOR51
 	.loc 2 1919 0
 	and	w0, w0, 65535
-.LVL1493:
+.LVL1495:
 	.loc 2 1921 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, w0
-	beq	.L1071
+	beq	.L1072
 	.loc 2 1922 0 discriminator 1
 	adrp	x1, .LANCHOR52
 	.loc 2 1921 0 discriminator 1
 	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	beq	.L1071
+	beq	.L1072
 	.loc 2 1923 0
 	adrp	x1, .LANCHOR53
 	.loc 2 1922 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1067
-.L1071:
-.LVL1494:
-.LBB271:
+	bne	.L1068
+.L1072:
+.LVL1496:
+.LBB275:
 	.loc 2 1927 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
-.LVL1495:
+.LVL1497:
 	.loc 2 1930 0
 	mov	w2, 0
 	mov	w1, 1
@@ -14205,46 +14225,46 @@ FtlRecoverySuperblock:
 	str	w3, [x0, 4]
 	.loc 2 1927 0
 	str	x4, [x29, 136]
-.LVL1496:
+.LVL1498:
 	.loc 2 1930 0
 	bl	FlashReadPages
-.LVL1497:
+.LVL1499:
 	.loc 2 1933 0
 	ldr	x0, [x20, #:lo12:.LANCHOR120]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1067
+	beq	.L1068
 	.loc 2 1934 0
 	ldr	x4, [x29, 136]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-.LVL1498:
-	cbnz	w0, .L1067
+.LVL1500:
+	cbnz	w0, .L1068
 	.loc 2 1941 0
 	mov	w2, 1
 	add	x1, x29, 184
 	mov	w0, w24
 	bl	log2phys
-.LVL1499:
-	b	.L1067
-.LVL1500:
-.L1073:
-.LBE271:
+.LVL1501:
+	b	.L1068
+.LVL1502:
+.L1074:
+.LBE275:
 	.loc 2 1962 0
 	mov	w1, w24
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
 	bl	printf
-.LVL1501:
-	b	.L1051
-.LVL1502:
-.L1053:
+.LVL1503:
+	b	.L1052
+.LVL1504:
+.L1054:
 	.loc 2 1969 0
 	ldr	x0, [x29, 120]
 	ldr	w0, [x0]
 	cmp	w0, 31
-	bhi	.L1074
+	bhi	.L1075
 	.loc 2 1970 0
 	adrp	x1, .LANCHOR164
 	add	x1, x1, :lo12:.LANCHOR164
@@ -14253,39 +14273,39 @@ FtlRecoverySuperblock:
 	add	w0, w0, 1
 	ldr	x1, [x29, 120]
 	str	w0, [x1]
-.L1074:
+.L1075:
 	.loc 2 1973 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1503:
+.LVL1505:
 	.loc 2 1975 0
 	ldr	w0, [x28, #:lo12:.LANCHOR154]
 	cmn	w0, #1
-	bne	.L1075
-.L1137:
+	bne	.L1076
+.L1138:
 	.loc 2 1978 0
 	str	w21, [x28, #:lo12:.LANCHOR154]
-	b	.L1051
-.L1075:
+	b	.L1052
+.L1076:
 	.loc 2 1977 0
 	cmp	w21, w0
-	bcs	.L1051
-	b	.L1137
-.LVL1504:
-.L1078:
+	bcs	.L1052
+	b	.L1138
+.LVL1506:
+.L1079:
 	.loc 2 1986 0 discriminator 2
 	add	w0, w0, 1
-.LVL1505:
-	and	w0, w0, 65535
-.LVL1506:
-	b	.L1077
 .LVL1507:
-.L1052:
+	and	w0, w0, 65535
+.LVL1508:
+	b	.L1078
+.LVL1509:
+.L1053:
 	.loc 2 2002 0
 	strb	w27, [x19, 6]
 	.loc 2 2003 0
 	strh	w22, [x19, 2]
-	b	.L1140
+	b	.L1141
 	.cfi_endproc
 .LFE281:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -14297,7 +14317,7 @@ FtlSuperblockPowerLostFix:
 .LFB288:
 	.loc 2 2156 0
 	.cfi_startproc
-.LVL1508:
+.LVL1510:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
@@ -14326,18 +14346,18 @@ FtlSuperblockPowerLostFix:
 	mov	w22, -1
 	.loc 2 2169 0
 	adrp	x23, .LANCHOR39
-.LVL1509:
-.L1142:
+.LVL1511:
+.L1143:
 	.loc 2 2162 0
 	subs	w21, w21, #1
-.LVL1510:
-	beq	.L1144
-.LVL1511:
+.LVL1512:
+	beq	.L1145
+.LVL1513:
 	.loc 2 2163 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1143
-.LVL1512:
-.L1144:
+	cbnz	w0, .L1144
+.LVL1514:
+.L1145:
 	.loc 2 2183 0
 	ldrh	w0, [x19]
 	adrp	x1, .LANCHOR43
@@ -14359,7 +14379,7 @@ FtlSuperblockPowerLostFix:
 	.loc 2 2188 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-.LVL1513:
+.LVL1515:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	.cfi_remember_state
@@ -14372,17 +14392,17 @@ FtlSuperblockPowerLostFix:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1514:
-.L1143:
+.LVL1516:
+.L1144:
 	.cfi_restore_state
 	.loc 2 2165 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1515:
+.LVL1517:
 	str	w0, [x29, 68]
 	.loc 2 2166 0
 	cmn	w0, #1
-	beq	.L1144
+	beq	.L1145
 	.loc 2 2169 0
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 2179 0
@@ -14398,7 +14418,7 @@ FtlSuperblockPowerLostFix:
 	.loc 2 2170 0
 	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	str	x1, [x29, 80]
-.LVL1516:
+.LVL1518:
 	.loc 2 2175 0
 	ldrh	w0, [x19]
 	strh	w0, [x1, 2]
@@ -14418,18 +14438,18 @@ FtlSuperblockPowerLostFix:
 	csel	w0, w0, wzr, ne
 	.loc 2 2179 0
 	mov	w1, 1
-.LVL1517:
+.LVL1519:
 	.loc 2 2178 0
 	str	w0, [x20]
 	.loc 2 2179 0
 	add	x0, x29, 64
 	bl	FlashProgPages
-.LVL1518:
+.LVL1520:
 	.loc 2 2180 0
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.LVL1519:
-	b	.L1142
+.LVL1521:
+	b	.L1143
 	.cfi_endproc
 .LFE288:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -14477,22 +14497,22 @@ FtlLoadBbt:
 	adrp	x0, .LANCHOR109
 	ldr	x21, [x0, #:lo12:.LANCHOR109]
 	str	x21, [x20, 16]
-.LVL1520:
+.LVL1522:
 	.loc 4 183 0
 	bl	FtlBbtMemInit
-.LVL1521:
+.LVL1523:
 	.loc 4 184 0
 	ldrh	w19, [x24, #:lo12:.LANCHOR17]
 	add	x24, x24, :lo12:.LANCHOR17
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1522:
-.L1154:
+.LVL1524:
+.L1155:
 	.loc 4 184 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	sub	w0, w0, #15
 	cmp	w0, w19
-	bgt	.L1157
+	bgt	.L1158
 	.loc 4 185 0 is_stmt 1
 	lsl	w0, w19, 10
 	.loc 4 186 0
@@ -14503,11 +14523,11 @@ FtlLoadBbt:
 	mov	w1, w2
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1523:
+.LVL1525:
 	.loc 4 187 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1155
+	bne	.L1156
 	.loc 4 188 0
 	ldr	w0, [x20, 4]
 	.loc 4 189 0
@@ -14519,16 +14539,16 @@ FtlLoadBbt:
 	.loc 4 189 0
 	mov	x0, x20
 	bl	FlashReadPages
-.LVL1524:
-.L1155:
+.LVL1526:
+.L1156:
 	.loc 4 191 0
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1156
+	beq	.L1157
 	.loc 4 196 0
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	bne	.L1156
+	bne	.L1157
 	.loc 4 198 0
 	adrp	x1, .LANCHOR37
 	add	x0, x1, :lo12:.LANCHOR37
@@ -14539,19 +14559,19 @@ FtlLoadBbt:
 	.loc 4 200 0
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1157:
+.L1158:
 	.loc 4 216 0
 	adrp	x19, .LANCHOR37
-.LVL1525:
+.LVL1527:
 	mov	w0, 65535
 	add	x20, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x19, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	beq	.L1171
+	beq	.L1172
 	.loc 4 222 0
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1161
+	beq	.L1162
 	.loc 4 224 0
 	add	x0, x22, :lo12:.LANCHOR108
 	lsl	w1, w1, 10
@@ -14562,21 +14582,21 @@ FtlLoadBbt:
 	.loc 4 225 0
 	mov	w1, w2
 	bl	FlashReadPages
-.LVL1526:
+.LVL1528:
 	.loc 4 226 0
 	ldr	w0, [x22, #:lo12:.LANCHOR108]
 	cmn	w0, #1
-	beq	.L1161
+	beq	.L1162
 	.loc 4 229 0
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1161
+	bne	.L1162
 	.loc 4 229 0 is_stmt 0 discriminator 1
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1161
+	bls	.L1162
 	.loc 4 231 0 is_stmt 1
 	ldrh	w1, [x20, 4]
 	.loc 4 232 0
@@ -14587,7 +14607,7 @@ FtlLoadBbt:
 	strh	w1, [x19, #:lo12:.LANCHOR37]
 	.loc 4 233 0
 	strh	w0, [x20, 4]
-.L1161:
+.L1162:
 	.loc 4 238 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	add	x24, x19, :lo12:.LANCHOR37
@@ -14596,17 +14616,17 @@ FtlLoadBbt:
 	mov	w25, 61649
 	.loc 4 238 0
 	bl	FtlGetLastWrittenPage
-.LVL1527:
+.LVL1529:
 	sxth	w20, w0
-.LVL1528:
+.LVL1530:
 	.loc 4 239 0
 	add	w0, w0, 1
 	strh	w0, [x24, 2]
 	.loc 4 243 0
 	add	x24, x22, :lo12:.LANCHOR108
-.L1163:
+.L1164:
 	.loc 4 241 0
-	tbz	w20, #31, .L1166
+	tbz	w20, #31, .L1167
 	.loc 4 254 0
 	adrp	x1, .LANCHOR165
 	adrp	x0, .LC1
@@ -14614,8 +14634,8 @@ FtlLoadBbt:
 	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1529:
-.L1165:
+.LVL1531:
+.L1166:
 	.loc 4 255 0
 	add	x0, x19, :lo12:.LANCHOR37
 	ldrh	w1, [x21, 10]
@@ -14624,29 +14644,29 @@ FtlLoadBbt:
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1168
+	beq	.L1169
 	.loc 4 259 0
 	adrp	x1, .LANCHOR2
 	ldr	w2, [x1, #:lo12:.LANCHOR2]
 	cmp	w0, w2
-	beq	.L1168
+	beq	.L1169
 	.loc 4 259 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR6
 	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1168
+	bcs	.L1169
 	.loc 4 261 0 is_stmt 1
 	cmp	w0, w1
-	bcs	.L1168
+	bcs	.L1169
 	.loc 4 263 0
 	bl	FtlSysBlkNumInit
-.LVL1530:
-.L1168:
+.LVL1532:
+.L1169:
 	add	x19, x19, :lo12:.LANCHOR37
 	.loc 4 268 0 discriminator 1
 	adrp	x21, .LANCHOR10
-.LVL1531:
+.LVL1533:
 	.loc 4 269 0 discriminator 1
 	adrp	x23, .LANCHOR137
 	add	x19, x19, 32
@@ -14657,16 +14677,16 @@ FtlLoadBbt:
 	add	x22, x22, :lo12:.LANCHOR108
 	.loc 4 173 0 discriminator 1
 	mov	w20, 0
-.LVL1532:
-.L1169:
+.LVL1534:
+.L1170:
 	.loc 4 268 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1170
+	bcc	.L1171
 	.loc 4 275 0
 	mov	w0, 0
-.LVL1533:
-.L1153:
+.LVL1535:
+.L1154:
 	.loc 4 276 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14685,17 +14705,17 @@ FtlLoadBbt:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1534:
-.L1156:
+.LVL1536:
+.L1157:
 	.cfi_restore_state
 	.loc 4 184 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1535:
-	and	w19, w19, 65535
-.LVL1536:
-	b	.L1154
 .LVL1537:
-.L1166:
+	and	w19, w19, 65535
+.LVL1538:
+	b	.L1155
+.LVL1539:
+.L1167:
 	.loc 4 243 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR37]
 	.loc 4 245 0
@@ -14710,23 +14730,23 @@ FtlLoadBbt:
 	.loc 4 245 0
 	mov	x0, x24
 	bl	FlashReadPages
-.LVL1538:
+.LVL1540:
 	.loc 4 247 0
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1164
+	beq	.L1165
 	.loc 4 247 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1165
-.L1164:
+	beq	.L1166
+.L1165:
 	sub	w20, w20, #1
-.LVL1539:
-	sxth	w20, w20
-.LVL1540:
-	b	.L1163
 .LVL1541:
-.L1170:
+	sxth	w20, w20
+.LVL1542:
+	b	.L1164
+.LVL1543:
+.L1171:
 	.loc 4 269 0 is_stmt 1 discriminator 3
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
@@ -14734,18 +14754,18 @@ FtlLoadBbt:
 	lsl	w2, w2, 2
 	.loc 4 268 0 discriminator 3
 	add	w20, w20, 1
-.LVL1542:
+.LVL1544:
 	.loc 4 269 0 discriminator 3
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-.LVL1543:
-	b	.L1169
-.LVL1544:
-.L1171:
+.LVL1545:
+	b	.L1170
+.LVL1546:
+.L1172:
 	.loc 4 218 0
 	mov	w0, -1
-	b	.L1153
+	b	.L1154
 	.cfi_endproc
 .LFE229:
 	.size	FtlLoadBbt, .-FtlLoadBbt
@@ -14786,10 +14806,10 @@ FtlMakeBbt:
 	.cfi_offset 28, -40
 	.loc 4 325 0
 	bl	FtlBbtMemInit
-.LVL1545:
+.LVL1547:
 	.loc 4 326 0
 	bl	FtlLoadFactoryBbt
-.LVL1546:
+.LVL1548:
 	.loc 4 328 0
 	adrp	x28, .LANCHOR108
 	add	x21, x21, 12
@@ -14799,63 +14819,63 @@ FtlMakeBbt:
 	adrp	x0, .LANCHOR10
 	add	x0, x0, :lo12:.LANCHOR10
 	str	x0, [x29, 120]
-.LVL1547:
-.L1184:
+.LVL1549:
+.L1185:
 	.loc 4 327 0 is_stmt 0 discriminator 1
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L1190
+	bcc	.L1191
 	.loc 4 381 0 is_stmt 1 discriminator 1
 	adrp	x21, .LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR25
 	mov	w19, 0
-.L1191:
-.LVL1548:
+.L1192:
+.LVL1550:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L1192
+	bhi	.L1193
 	.loc 4 387 0
 	add	x21, x20, :lo12:.LANCHOR37
 	.loc 4 396 0
 	mov	w22, 65535
-.LVL1549:
+.LVL1551:
 	.loc 4 387 0
 	ldrh	w19, [x21, 12]
-.LVL1550:
+.LVL1552:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.LVL1551:
-.L1193:
+.LVL1553:
+.L1194:
 	.loc 4 387 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1197
+	bgt	.L1198
 	.loc 4 389 0 is_stmt 1
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1552:
+.LVL1554:
 	cmp	w0, 1
-	beq	.L1194
+	beq	.L1195
 	.loc 4 391 0
 	mov	w0, w19
 	bl	FlashTestBlk
-.LVL1553:
-	cbz	w0, .L1195
+.LVL1555:
+	cbz	w0, .L1196
 	.loc 4 393 0
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.LVL1554:
-.L1194:
+.LVL1556:
+.L1195:
 	.loc 4 387 0 discriminator 2
 	sub	w19, w19, #1
-.LVL1555:
-	and	w19, w19, 65535
-.LVL1556:
-	b	.L1193
 .LVL1557:
-.L1190:
+	and	w19, w19, 65535
+.LVL1558:
+	b	.L1194
+.LVL1559:
+.L1191:
 	.loc 4 329 0
 	adrp	x2, .LANCHOR109
 	.loc 4 328 0
@@ -14873,18 +14893,18 @@ FtlMakeBbt:
 	cmp	w1, w3
 	.loc 4 329 0
 	stp	x0, x26, [x19, 8]
-.LVL1558:
+.LVL1560:
 	adrp	x23, .LANCHOR17
 	str	x2, [x29, 112]
 	.loc 4 331 0
-	beq	.L1185
+	beq	.L1186
 	.loc 4 333 0
 	ldrh	w4, [x23, #:lo12:.LANCHOR17]
 	.loc 4 335 0
 	mov	w2, 1
 	.loc 4 333 0
 	madd	w27, w4, w22, w1
-.LVL1559:
+.LVL1561:
 	.loc 4 335 0
 	mov	w1, w2
 	.loc 4 334 0
@@ -14893,7 +14913,7 @@ FtlMakeBbt:
 	.loc 4 335 0
 	mov	x0, x19
 	bl	FlashReadPages
-.LVL1560:
+.LVL1562:
 	.loc 4 336 0
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
@@ -14901,30 +14921,30 @@ FtlMakeBbt:
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.LVL1561:
-.L1186:
+.LVL1563:
+.L1187:
 	.loc 4 376 0 discriminator 2
 	mov	w0, w27
 	.loc 4 327 0 discriminator 2
 	add	w22, w22, 1
-.LVL1562:
+.LVL1564:
 	.loc 4 376 0 discriminator 2
 	bl	FtlBbmMapBadBlock
-.LVL1563:
+.LVL1565:
 	add	x24, x24, 8
 	add	x21, x21, 2
-	b	.L1184
-.LVL1564:
-.L1185:
+	b	.L1185
+.LVL1566:
+.L1186:
 	.loc 4 340 0
 	mov	w1, w22
 	bl	FlashGetBadBlockList
-.LVL1565:
+.LVL1567:
 	.loc 4 341 0
 	ldr	x0, [x19, 8]
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-.LVL1566:
+.LVL1568:
 	.loc 4 343 0
 	ldrh	w19, [x23, #:lo12:.LANCHOR17]
 	.loc 4 345 0
@@ -14937,17 +14957,17 @@ FtlMakeBbt:
 	add	x0, x0, :lo12:.LANCHOR137
 	.loc 4 343 0
 	and	w19, w19, 65535
-.LVL1567:
+.LVL1569:
 	.loc 4 357 0
 	str	x0, [x29, 104]
-.L1187:
+.L1188:
 	.loc 4 345 0
 	ldrh	w0, [x23]
 	madd	w0, w22, w0, w19
 	bl	FtlBbmIsBadBlock
-.LVL1568:
+.LVL1570:
 	cmp	w0, 1
-	beq	.L1188
+	beq	.L1189
 	.loc 4 350 0
 	ldr	x0, [x29, 112]
 	mov	w2, 16
@@ -14957,14 +14977,14 @@ FtlMakeBbt:
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	bl	ftl_memset
-.LVL1569:
+.LVL1571:
 	.loc 4 351 0
 	adrp	x0, .LANCHOR39
 	mov	w2, 4096
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR39]
 	bl	ftl_memset
-.LVL1570:
+.LVL1572:
 	.loc 4 352 0
 	mov	w0, -3872
 	strh	w0, [x26]
@@ -14979,7 +14999,7 @@ FtlMakeBbt:
 	str	wzr, [x26, 4]
 	.loc 4 355 0
 	madd	w27, w4, w22, w0
-.LVL1571:
+.LVL1573:
 	.loc 4 356 0
 	lsl	w0, w27, 10
 	str	w0, [x25, 4]
@@ -14989,70 +15009,70 @@ FtlMakeBbt:
 	ldr	x0, [x25, 8]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-.LVL1572:
+.LVL1574:
 	.loc 4 358 0
 	mov	w2, 1
 	mov	x0, x25
 	mov	w1, w2
 	bl	FlashEraseBlocks
-.LVL1573:
+.LVL1575:
 	.loc 4 359 0
 	mov	w3, 1
 	mov	x0, x25
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1574:
+.LVL1576:
 	.loc 4 360 0
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L1186
+	bne	.L1187
 	.loc 4 362 0
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-.LVL1575:
+.LVL1577:
 	.loc 4 363 0
-	b	.L1187
-.LVL1576:
-.L1188:
+	b	.L1188
+.LVL1578:
+.L1189:
 	.loc 4 347 0
 	sub	w19, w19, #1
-.LVL1577:
-	and	w19, w19, 65535
-.LVL1578:
-	b	.L1187
 .LVL1579:
-.L1192:
+	and	w19, w19, 65535
+.LVL1580:
+	b	.L1188
+.LVL1581:
+.L1193:
 	.loc 4 383 0 discriminator 3
 	mov	w0, w19
 	.loc 4 381 0 discriminator 3
 	add	w19, w19, 1
-.LVL1580:
+.LVL1582:
 	.loc 4 383 0 discriminator 3
 	bl	FtlBbmMapBadBlock
-.LVL1581:
+.LVL1583:
 	.loc 4 381 0 discriminator 3
 	and	w19, w19, 65535
-.LVL1582:
-	b	.L1191
-.LVL1583:
-.L1195:
+.LVL1584:
+	b	.L1192
+.LVL1585:
+.L1196:
 	.loc 4 396 0
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L1196
+	bne	.L1197
 	.loc 4 398 0
 	strh	w19, [x21]
-	b	.L1194
-.L1196:
+	b	.L1195
+.L1197:
 	.loc 4 402 0
 	strh	w19, [x21, 4]
-.L1197:
+.L1198:
 	.loc 4 414 0
 	adrp	x0, .LANCHOR112
 	.loc 4 411 0
 	add	x19, x20, :lo12:.LANCHOR37
-.LVL1584:
+.LVL1586:
 	.loc 4 414 0
 	ldrh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 416 0
@@ -15074,18 +15094,18 @@ FtlMakeBbt:
 	.loc 4 416 0
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.LVL1585:
+.LVL1587:
 	.loc 4 418 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
 	bl	FtlBbmMapBadBlock
-.LVL1586:
+.LVL1588:
 	.loc 4 419 0
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
-.LVL1587:
+.LVL1589:
 	.loc 4 421 0
 	bl	FtlBbmTblFlush
-.LVL1588:
+.LVL1590:
 	.loc 4 426 0
 	strh	wzr, [x19, 2]
 	.loc 4 422 0
@@ -15097,14 +15117,14 @@ FtlMakeBbt:
 	str	w0, [x19, 8]
 	.loc 4 424 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR37]
-.LVL1589:
+.LVL1591:
 	.loc 4 427 0
 	strh	w0, [x19, 4]
 	.loc 4 425 0
 	strh	w1, [x20, #:lo12:.LANCHOR37]
 	.loc 4 429 0
 	bl	FtlBbmTblFlush
-.LVL1590:
+.LVL1592:
 	.loc 4 432 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -15138,7 +15158,7 @@ FtlVendorPartWrite:
 .LFB263:
 	.loc 2 786 0
 	.cfi_startproc
-.LVL1591:
+.LVL1593:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15152,15 +15172,15 @@ FtlVendorPartWrite:
 	stp	x27, x28, [sp, 80]
 	.loc 2 794 0
 	add	w1, w0, w1
-.LVL1592:
+.LVL1594:
 	.cfi_offset 27, -128
 	.cfi_offset 28, -120
 	.loc 2 786 0
 	mov	w28, w0
-.LVL1593:
+.LVL1595:
 	.loc 2 794 0
 	adrp	x0, .LANCHOR16
-.LVL1594:
+.LVL1596:
 	.loc 2 786 0
 	stp	x21, x22, [sp, 32]
 	.loc 2 794 0
@@ -15176,7 +15196,7 @@ FtlVendorPartWrite:
 	.cfi_offset 26, -136
 	.loc 2 794 0
 	cmp	w1, w0
-	bhi	.L1211
+	bhi	.L1212
 	.loc 2 791 0
 	adrp	x0, .LANCHOR22
 	.loc 2 799 0
@@ -15193,21 +15213,21 @@ FtlVendorPartWrite:
 	.loc 2 791 0
 	mov	w23, 0
 	lsr	w21, w28, w21
-.LVL1595:
-.L1205:
+.LVL1597:
+.L1206:
 	.loc 2 797 0
-	cbnz	w20, .L1210
-.LVL1596:
-.L1203:
+	cbnz	w20, .L1211
+.LVL1598:
+.L1204:
 	.loc 2 820 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
-.LVL1597:
+.LVL1599:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1598:
+.LVL1600:
 	ldp	x29, x30, [sp], 208
 	.cfi_remember_state
 	.cfi_restore 30
@@ -15224,8 +15244,8 @@ FtlVendorPartWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1599:
-.L1210:
+.LVL1601:
+.L1211:
 	.cfi_restore_state
 	.loc 2 799 0
 	ldrh	w1, [x25]
@@ -15237,25 +15257,25 @@ FtlVendorPartWrite:
 	udiv	w22, w28, w1
 	.loc 2 798 0
 	ldr	w2, [x0, w21, uxtw 2]
-.LVL1600:
+.LVL1602:
 	.loc 2 802 0
 	and	w0, w20, 65535
 	.loc 2 799 0
 	msub	w22, w22, w1, w28
-.LVL1601:
+.LVL1603:
 	.loc 2 800 0
 	sub	w19, w1, w22
 	and	w19, w19, 65535
-.LVL1602:
+.LVL1604:
 	.loc 2 802 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1603:
+.LVL1605:
 	.loc 2 803 0
-	cbz	w2, .L1207
+	cbz	w2, .L1208
 	.loc 2 803 0 is_stmt 0 discriminator 1
 	cmp	w19, w1
-	beq	.L1207
+	beq	.L1208
 	.loc 2 805 0 is_stmt 1
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
@@ -15265,27 +15285,27 @@ FtlVendorPartWrite:
 	str	w2, [x29, 116]
 	.loc 2 807 0
 	mov	w2, 1
-.LVL1604:
+.LVL1606:
 	.loc 2 806 0
 	str	x0, [x29, 128]
 	.loc 2 807 0
 	mov	w1, w2
 	add	x0, x29, 112
-.LVL1605:
+.LVL1607:
 	bl	FlashReadPages
-.LVL1606:
-.L1208:
+.LVL1608:
+.L1209:
 	.loc 2 811 0
 	lsl	w4, w19, 9
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	lsl	w22, w22, 7
-.LVL1607:
+.LVL1609:
 	mov	w2, w4
 	mov	x1, x24
 	str	w4, [x29, 108]
 	add	x0, x0, x22, sxtw 2
 	bl	ftl_memcpy
-.LVL1608:
+.LVL1610:
 	.loc 2 812 0
 	ldr	x2, [x27, #:lo12:.LANCHOR124]
 	mov	w1, w21
@@ -15293,42 +15313,42 @@ FtlVendorPartWrite:
 	add	x0, x0, :lo12:.LANCHOR149
 	.loc 2 815 0
 	sub	w20, w20, w19
-.LVL1609:
+.LVL1611:
 	.loc 2 816 0
 	add	w28, w28, w19
-.LVL1610:
+.LVL1612:
 	.loc 2 814 0
 	add	w21, w21, 1
-.LVL1611:
+.LVL1613:
 	.loc 2 812 0
 	bl	FtlMapWritePage
-.LVL1612:
+.LVL1614:
 	.loc 2 813 0
 	cmn	w0, #1
 	.loc 2 817 0
 	ldr	w4, [x29, 108]
 	.loc 2 813 0
 	csinv	w23, w23, wzr, ne
-.LVL1613:
+.LVL1615:
 	.loc 2 817 0
 	add	x24, x24, x4, sxtw
-.LVL1614:
-	b	.L1205
-.LVL1615:
-.L1207:
+.LVL1616:
+	b	.L1206
+.LVL1617:
+.L1208:
 	.loc 2 809 0
 	ldrh	w2, [x26]
-.LVL1616:
+.LVL1618:
 	mov	w1, 0
 	ldr	x0, [x27, #:lo12:.LANCHOR124]
 	bl	ftl_memset
-.LVL1617:
-	b	.L1208
-.LVL1618:
-.L1211:
+.LVL1619:
+	b	.L1209
+.LVL1620:
+.L1212:
 	.loc 2 795 0
 	mov	w23, -1
-	b	.L1203
+	b	.L1204
 	.cfi_endproc
 .LFE263:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
@@ -15347,9 +15367,9 @@ Ftl_save_ext_data:
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1216
-.LBB274:
-.LBB275:
+	bne	.L1217
+.LBB278:
+.LBB279:
 	.loc 2 2112 0
 	mov	w0, 64
 	.loc 2 2125 0
@@ -15408,11 +15428,11 @@ Ftl_save_ext_data:
 	.loc 2 2125 0
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.LVL1619:
-.L1216:
+.LVL1621:
+.L1217:
 	ret
-.LBE275:
-.LBE274:
+.LBE279:
+.LBE278:
 	.cfi_endproc
 .LFE286:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
@@ -15424,33 +15444,33 @@ FtlEctTblFlush:
 .LFB265:
 	.loc 2 861 0
 	.cfi_startproc
-.LVL1620:
+.LVL1622:
 	.loc 2 864 0
 	adrp	x2, .LANCHOR166
 	ldrh	w1, [x2, #:lo12:.LANCHOR166]
 	cmp	w1, 31
-	bhi	.L1222
+	bhi	.L1223
 	.loc 2 865 0
 	add	w1, w1, 1
 	strh	w1, [x2, #:lo12:.LANCHOR166]
-.LVL1621:
+.LVL1623:
 	.loc 2 866 0
 	mov	w1, 1
-.LVL1622:
-.L1219:
+.LVL1624:
+.L1220:
 	adrp	x2, .LANCHOR127
 	.loc 2 868 0
-	cbnz	w0, .L1220
+	cbnz	w0, .L1221
 	.loc 2 868 0 is_stmt 0 discriminator 1
 	ldr	x0, [x2, #:lo12:.LANCHOR127]
-.LVL1623:
+.LVL1625:
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
-.LVL1624:
+.LVL1626:
 	cmp	w0, w1
-	bcc	.L1224
-.L1220:
+	bcc	.L1225
+.L1221:
 	.loc 2 861 0 is_stmt 1
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -15481,10 +15501,10 @@ FtlEctTblFlush:
 	.loc 2 875 0
 	mov	w0, 64
 	bl	FtlVendorPartWrite
-.LVL1625:
+.LVL1627:
 	.loc 2 876 0
 	bl	Ftl_save_ext_data
-.LVL1626:
+.LVL1628:
 	.loc 2 878 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -15492,13 +15512,13 @@ FtlEctTblFlush:
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1627:
-.L1222:
+.LVL1629:
+.L1223:
 	.loc 2 862 0
 	mov	w1, 32
-	b	.L1219
-.LVL1628:
-.L1224:
+	b	.L1220
+.LVL1630:
+.L1225:
 	.loc 2 878 0
 	mov	w0, 0
 	ret
@@ -15513,7 +15533,7 @@ FtlVendorPartRead:
 .LFB264:
 	.loc 2 823 0
 	.cfi_startproc
-.LVL1629:
+.LVL1631:
 	stp	x29, x30, [sp, -208]!
 	.cfi_def_cfa_offset 208
 	.cfi_offset 29, -208
@@ -15527,15 +15547,15 @@ FtlVendorPartRead:
 	stp	x21, x22, [sp, 32]
 	.loc 2 832 0
 	add	w1, w0, w1
-.LVL1630:
+.LVL1632:
 	.cfi_offset 21, -176
 	.cfi_offset 22, -168
 	.loc 2 823 0
 	mov	w21, w0
-.LVL1631:
+.LVL1633:
 	.loc 2 832 0
 	adrp	x0, .LANCHOR16
-.LVL1632:
+.LVL1634:
 	.loc 2 823 0
 	stp	x23, x24, [sp, 48]
 	.loc 2 832 0
@@ -15551,7 +15571,7 @@ FtlVendorPartRead:
 	.cfi_offset 28, -120
 	.loc 2 832 0
 	cmp	w1, w0
-	bhi	.L1234
+	bhi	.L1235
 	.loc 2 828 0
 	adrp	x0, .LANCHOR22
 	.loc 2 836 0
@@ -15565,18 +15585,18 @@ FtlVendorPartRead:
 	adrp	x25, .LANCHOR133
 	.loc 2 828 0
 	lsr	w26, w21, w3
-.LVL1633:
-.L1228:
+.LVL1635:
+.L1229:
 	.loc 2 834 0
-	cbnz	w20, .L1233
-.LVL1634:
-.L1226:
+	cbnz	w20, .L1234
+.LVL1636:
+.L1227:
 	.loc 2 857 0
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
-.LVL1635:
+.LVL1637:
 	ldp	x21, x22, [sp, 32]
-.LVL1636:
+.LVL1638:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
@@ -15596,8 +15616,8 @@ FtlVendorPartRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1637:
-.L1233:
+.LVL1639:
+.L1234:
 	.cfi_restore_state
 	.loc 2 836 0
 	ldrh	w19, [x24]
@@ -15607,23 +15627,23 @@ FtlVendorPartRead:
 	udiv	w27, w21, w19
 	.loc 2 835 0
 	ldr	w1, [x0, w26, uxtw 2]
-.LVL1638:
+.LVL1640:
 	.loc 2 839 0
 	and	w0, w20, 65535
 	.loc 2 836 0
 	msub	w27, w27, w19, w21
-.LVL1639:
+.LVL1641:
 	.loc 2 837 0
 	sub	w19, w19, w27
 	and	w19, w19, 65535
-.LVL1640:
+.LVL1642:
 	.loc 2 839 0
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-.LVL1641:
+.LVL1643:
 	lsl	w28, w19, 9
 	.loc 2 840 0
-	cbz	w1, .L1230
+	cbz	w1, .L1231
 	.loc 2 842 0
 	adrp	x4, .LANCHOR124
 	.loc 2 844 0
@@ -15632,7 +15652,7 @@ FtlVendorPartRead:
 	str	x4, [x29, 104]
 	.loc 2 847 0
 	lsl	w27, w27, 7
-.LVL1642:
+.LVL1644:
 	.loc 2 842 0
 	ldr	x0, [x4, #:lo12:.LANCHOR124]
 	str	x0, [x29, 120]
@@ -15642,14 +15662,14 @@ FtlVendorPartRead:
 	str	w1, [x29, 116]
 	.loc 2 844 0
 	mov	w1, w2
-.LVL1643:
+.LVL1645:
 	.loc 2 843 0
 	str	x0, [x29, 128]
 	.loc 2 844 0
 	add	x0, x29, 112
-.LVL1644:
+.LVL1646:
 	bl	FlashReadPages
-.LVL1645:
+.LVL1647:
 	.loc 2 847 0
 	ldr	x4, [x29, 104]
 	mov	w2, w28
@@ -15661,40 +15681,40 @@ FtlVendorPartRead:
 	ldr	x1, [x4, #:lo12:.LANCHOR124]
 	.loc 2 846 0
 	csinv	w22, w22, wzr, ne
-.LVL1646:
+.LVL1648:
 	.loc 2 847 0
 	add	x1, x1, x27, sxtw 2
 	bl	ftl_memcpy
-.LVL1647:
-.L1232:
+.LVL1649:
+.L1233:
 	.loc 2 851 0
 	add	w26, w26, 1
-.LVL1648:
+.LVL1650:
 	.loc 2 852 0
 	sub	w20, w20, w19
-.LVL1649:
+.LVL1651:
 	.loc 2 853 0
 	add	w21, w21, w19
-.LVL1650:
+.LVL1652:
 	.loc 2 854 0
 	add	x23, x23, x28, sxtw
-.LVL1651:
-	b	.L1228
-.LVL1652:
-.L1230:
+.LVL1653:
+	b	.L1229
+.LVL1654:
+.L1231:
 	.loc 2 849 0
 	mov	w2, w28
 	mov	w1, 0
-.LVL1653:
+.LVL1655:
 	mov	x0, x23
 	bl	ftl_memset
-.LVL1654:
-	b	.L1232
-.LVL1655:
-.L1234:
+.LVL1656:
+	b	.L1233
+.LVL1657:
+.L1235:
 	.loc 2 833 0
 	mov	w22, -1
-	b	.L1226
+	b	.L1227
 	.cfi_endproc
 .LFE264:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
@@ -15724,33 +15744,33 @@ FtlLoadEctTbl:
 	ldr	x2, [x19, #:lo12:.LANCHOR127]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	bl	FtlVendorPartRead
-.LVL1656:
+.LVL1658:
 	.loc 2 1336 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	ldr	w1, [x0]
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1237
-.LBB278:
-.LBB279:
+	beq	.L1238
+.LBB282:
+.LBB283:
 	.loc 2 1338 0
 	adrp	x1, .LC100
 	adrp	x0, .LC71
 	add	x1, x1, :lo12:.LC100
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL1657:
+.LVL1659:
 	.loc 2 1339 0
 	ldr	x0, [x19, #:lo12:.LANCHOR127]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR125]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.LVL1658:
-.L1237:
-.LBE279:
-.LBE278:
+.LVL1660:
+.L1238:
+.LBE283:
+.LBE282:
 	.loc 2 1344 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -15794,28 +15814,28 @@ Ftl_load_ext_data:
 	add	x21, x19, :lo12:.LANCHOR83
 	mov	x2, x21
 	bl	FtlVendorPartRead
-.LVL1659:
+.LVL1661:
 	.loc 2 2132 0
 	ldr	w0, [x19, #:lo12:.LANCHOR83]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1240
+	beq	.L1241
 	.loc 2 2133 0
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-.LVL1660:
+.LVL1662:
 	.loc 2 2134 0
 	str	w20, [x19, #:lo12:.LANCHOR83]
-.L1240:
+.L1241:
 	.loc 2 2137 0
 	ldr	w1, [x19, #:lo12:.LANCHOR83]
 	add	x0, x19, :lo12:.LANCHOR83
 	cmp	w1, w20
 	adrp	x1, .LANCHOR74
-	bne	.L1241
+	bne	.L1242
 	.loc 2 2138 0
 	adrp	x2, .LANCHOR69
 	ldr	w3, [x0, 88]
@@ -15863,7 +15883,7 @@ Ftl_load_ext_data:
 	ldr	w2, [x0, 48]
 	adrp	x0, .LANCHOR78
 	str	w2, [x0, #:lo12:.LANCHOR78]
-.L1241:
+.L1242:
 	.loc 2 2152 0
 	adrp	x0, .LANCHOR14
 	adrp	x2, .LANCHOR73
@@ -15902,7 +15922,7 @@ FtlVpcTblFlush:
 .LFB269:
 	.loc 2 1004 0
 	.cfi_startproc
-.LVL1661:
+.LVL1663:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -15957,7 +15977,7 @@ FtlVpcTblFlush:
 	adrp	x27, .LANCHOR20
 	.loc 2 1011 0
 	stp	x0, x21, [x28, 8]
-.LVL1662:
+.LVL1664:
 	.loc 2 1005 0
 	mov	w26, 65535
 	.loc 2 1013 0
@@ -16052,7 +16072,7 @@ FtlVpcTblFlush:
 	ldrh	w2, [x1, #:lo12:.LANCHOR23]
 	mov	w1, 255
 	bl	ftl_memset
-.LVL1663:
+.LVL1665:
 	.loc 2 1048 0
 	ldr	x0, [x28, 8]
 	mov	x1, x20
@@ -16061,7 +16081,7 @@ FtlVpcTblFlush:
 	adrp	x20, .LANCHOR5
 	.loc 2 1048 0
 	bl	ftl_memcpy
-.LVL1664:
+.LVL1666:
 	.loc 2 1049 0
 	adrp	x1, .LANCHOR43
 	ldrh	w2, [x20, #:lo12:.LANCHOR5]
@@ -16070,7 +16090,7 @@ FtlVpcTblFlush:
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-.LVL1665:
+.LVL1667:
 	.loc 2 1050 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR1
@@ -16086,16 +16106,16 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.LVL1666:
+.LVL1668:
 	.loc 2 1051 0
 	mov	w0, 0
 	bl	FtlUpdateVaildLpn
-.LVL1667:
+.LVL1669:
 	.loc 2 1077 0
 	add	x0, x27, :lo12:.LANCHOR20
 	str	x0, [x29, 104]
-.LVL1668:
-.L1244:
+.LVL1670:
+.L1245:
 	.loc 2 1053 0
 	ldr	x0, [x24, #:lo12:.LANCHOR39]
 	.loc 2 1056 0
@@ -16120,25 +16140,25 @@ FtlVpcTblFlush:
 	.loc 2 1056 0
 	mov	x0, x28
 	bl	FlashProgPages
-.LVL1669:
+.LVL1671:
 	.loc 2 1057 0
 	ldrh	w0, [x27, #:lo12:.LANCHOR20]
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1245
+	blt	.L1246
 	.loc 2 1059 0
 	ldrh	w0, [x19]
 	.loc 2 1058 0
 	ldrh	w26, [x19, 4]
-.LVL1670:
+.LVL1672:
 	.loc 2 1060 0
 	strh	wzr, [x19, 2]
 	.loc 2 1059 0
 	strh	w0, [x19, 4]
 	.loc 2 1061 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL1671:
+.LVL1673:
 	strh	w0, [x19]
 	.loc 2 1066 0
 	ldr	w1, [x23, #:lo12:.LANCHOR71]
@@ -16161,8 +16181,8 @@ FtlVpcTblFlush:
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.LVL1672:
-.L1245:
+.LVL1674:
+.L1246:
 	.loc 2 1072 0
 	ldrh	w0, [x19, 2]
 	.loc 2 1073 0
@@ -16173,10 +16193,10 @@ FtlVpcTblFlush:
 	strh	w0, [x19, 2]
 	.loc 2 1073 0
 	cmn	w1, #1
-	bne	.L1246
+	bne	.L1247
 	.loc 2 1075 0
 	cmp	w0, 1
-	bne	.L1247
+	bne	.L1248
 	.loc 2 1075 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR167
 	adrp	x0, .LC1
@@ -16184,26 +16204,26 @@ FtlVpcTblFlush:
 	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1673:
-.L1247:
+.LVL1675:
+.L1248:
 	.loc 2 1076 0 is_stmt 1
 	ldrh	w0, [x19, 2]
 	cmp	w0, 1
-	bne	.L1248
+	bne	.L1249
 	.loc 2 1077 0
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1248:
+.L1249:
 	.loc 2 1078 0
 	add	w20, w20, 1
-.LVL1674:
+.LVL1676:
 	and	w20, w20, 65535
-.LVL1675:
+.LVL1677:
 	.loc 2 1079 0
 	cmp	w20, 3
-	bls	.L1244
+	bls	.L1245
 	.loc 2 1080 0
 	add	x22, x22, :lo12:.LANCHOR108
 	adrp	x0, .LC101
@@ -16211,32 +16231,32 @@ FtlVpcTblFlush:
 	add	x0, x0, :lo12:.LC101
 	ldr	w1, [x22, 4]
 	bl	printf
-.LVL1676:
-.L1250:
-	b	.L1250
-.L1246:
+.LVL1678:
+.L1251:
+	b	.L1251
+.L1247:
 	.loc 2 1086 0
 	cmp	w0, 1
-	beq	.L1244
+	beq	.L1245
 	.loc 2 1089 0
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1251
+	beq	.L1252
 	.loc 2 1090 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-.LVL1677:
-.L1251:
+.LVL1679:
+.L1252:
 	.loc 2 1092 0
 	ldp	x19, x20, [sp, 16]
-.LVL1678:
+.LVL1680:
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-.LVL1679:
+.LVL1681:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1680:
+.LVL1682:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	.cfi_restore 30
@@ -16297,7 +16317,7 @@ FtlVpcCheckAndModify:
 	.cfi_offset 25, -32
 	.loc 2 2197 0
 	bl	printf
-.LVL1681:
+.LVL1683:
 	.loc 2 2198 0
 	adrp	x0, .LANCHOR6
 	.loc 2 2199 0
@@ -16309,12 +16329,12 @@ FtlVpcCheckAndModify:
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL1682:
-.L1257:
+.LVL1684:
+.L1258:
 	.loc 2 2199 0 discriminator 1
 	ldr	w0, [x21]
 	cmp	w19, w0
-	bcc	.L1259
+	bcc	.L1260
 	.loc 2 2206 0 discriminator 1
 	adrp	x22, .LANCHOR5
 	.loc 2 2209 0 discriminator 1
@@ -16324,19 +16344,19 @@ FtlVpcCheckAndModify:
 	.loc 2 2209 0 discriminator 1
 	add	x23, x23, :lo12:.LC102
 	mov	w19, 0
-.LVL1683:
+.LVL1685:
 	.loc 2 2207 0 discriminator 1
 	adrp	x25, .LANCHOR43
 	mov	w24, 65535
-.L1260:
-.LVL1684:
+.L1261:
+.LVL1686:
 	.loc 2 2206 0 discriminator 1
 	ldrh	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1264
+	bhi	.L1265
 	.loc 2 2218 0
 	ldp	x19, x20, [sp, 16]
-.LVL1685:
+.LVL1687:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16353,37 +16373,37 @@ FtlVpcCheckAndModify:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1686:
-.L1259:
+.LVL1688:
+.L1260:
 	.cfi_restore_state
 	.loc 2 2200 0
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w19
 	bl	log2phys
-.LVL1687:
+.LVL1689:
 	.loc 2 2201 0
 	ldr	w0, [x29, 92]
 	cmn	w0, #1
-	beq	.L1258
+	beq	.L1259
 	.loc 2 2202 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1688:
+.LVL1690:
 	.loc 2 2203 0
 	ldr	x2, [x20, #:lo12:.LANCHOR128]
 	ubfiz	x0, x0, 1, 16
-.LVL1689:
+.LVL1691:
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-.L1258:
+.L1259:
 	.loc 2 2199 0 discriminator 2
 	add	w19, w19, 1
-.LVL1690:
-	b	.L1257
-.LVL1691:
-.L1264:
+.LVL1692:
+	b	.L1258
+.LVL1693:
+.L1265:
 	.loc 2 2207 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ubfiz	x21, x19, 1, 16
@@ -16391,30 +16411,30 @@ FtlVpcCheckAndModify:
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w3, [x0, x21]
 	cmp	w2, w3
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2207 0 is_stmt 0 discriminator 1
 	cmp	w2, w24
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2209 0 is_stmt 1
 	mov	w1, w19
 	mov	x0, x23
 	bl	printf
-.LVL1692:
+.LVL1694:
 	.loc 2 2210 0
 	adrp	x0, .LANCHOR51
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w19
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2210 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR53
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w19
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2210 0 discriminator 2
 	adrp	x0, .LANCHOR52
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	beq	.L1262
+	beq	.L1263
 	.loc 2 2211 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR128]
 	ldrh	w1, [x0, x21]
@@ -16423,20 +16443,20 @@ FtlVpcCheckAndModify:
 	.loc 2 2212 0
 	mov	w0, w19
 	bl	update_vpc_list
-.LVL1693:
+.LVL1695:
 	.loc 2 2213 0
 	bl	l2p_flush
-.LVL1694:
+.LVL1696:
 	.loc 2 2214 0
 	bl	FtlVpcTblFlush
-.LVL1695:
-.L1262:
+.LVL1697:
+.L1263:
 	.loc 2 2206 0 discriminator 2
 	add	w19, w19, 1
-.LVL1696:
+.LVL1698:
 	and	w19, w19, 65535
-.LVL1697:
-	b	.L1260
+.LVL1699:
+	b	.L1261
 	.cfi_endproc
 .LFE289:
 	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
@@ -16448,7 +16468,7 @@ allocate_new_data_superblock:
 .LFB299:
 	.loc 2 2631 0
 	.cfi_startproc
-.LVL1698:
+.LVL1700:
 	stp	x29, x30, [sp, -48]!
 	.cfi_def_cfa_offset 48
 	.cfi_offset 29, -48
@@ -16460,7 +16480,7 @@ allocate_new_data_superblock:
 	.cfi_offset 20, -24
 	.loc 2 2632 0
 	ldrh	w19, [x0]
-.LVL1699:
+.LVL1701:
 	.loc 2 2631 0
 	str	x21, [sp, 32]
 	.cfi_offset 21, -16
@@ -16468,10 +16488,10 @@ allocate_new_data_superblock:
 	mov	x21, x0
 	.loc 2 2633 0
 	adrp	x0, .LANCHOR5
-.LVL1700:
+.LVL1702:
 	ldrh	w0, [x0, #:lo12:.LANCHOR5]
 	cmp	w0, w19
-	bcs	.L1270
+	bcs	.L1271
 	.loc 2 2633 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR169
 	adrp	x0, .LC1
@@ -16479,23 +16499,23 @@ allocate_new_data_superblock:
 	add	x1, x1, :lo12:.LANCHOR169
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1701:
-.L1270:
+.LVL1703:
+.L1271:
 	.loc 2 2635 0 is_stmt 1
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1271
+	beq	.L1272
 	.loc 2 2636 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x19, 1, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1272
+	cbz	w0, .L1273
 	.loc 2 2637 0
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.LVL1702:
-.L1271:
+.LVL1704:
+.L1272:
 	.loc 2 2642 0
 	adrp	x1, .LANCHOR151
 	.loc 2 2641 0
@@ -16506,45 +16526,45 @@ allocate_new_data_superblock:
 	ldrh	w0, [x1, #:lo12:.LANCHOR151]
 	mov	x20, x1
 	cmp	w0, w2
-	beq	.L1273
+	beq	.L1274
 	.loc 2 2643 0
 	cmp	w19, w0
-	bne	.L1274
+	bne	.L1275
 	.loc 2 2643 0 is_stmt 0 discriminator 1
 	adrp	x2, .LANCHOR43
 	ubfiz	x1, x0, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1275
-.L1274:
+	cbz	w1, .L1276
+.L1275:
 	.loc 2 2644 0 is_stmt 1
 	bl	update_vpc_list
-.LVL1703:
-.L1275:
+.LVL1705:
+.L1276:
 	.loc 2 2645 0
 	mov	w0, -1
 	strh	w0, [x20, #:lo12:.LANCHOR151]
-.L1273:
+.L1274:
 	.loc 2 2647 0
 	mov	x0, x21
 	bl	allocate_data_superblock
-.LVL1704:
+.LVL1706:
 	.loc 2 2648 0
 	bl	l2p_flush
-.LVL1705:
+.LVL1707:
 	.loc 2 2649 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1706:
+.LVL1708:
 	.loc 2 2650 0
 	bl	FtlVpcTblFlush
-.LVL1707:
+.LVL1709:
 	.loc 2 2652 0
 	ldr	x21, [sp, 32]
-.LVL1708:
+.LVL1710:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-.LVL1709:
+.LVL1711:
 	ldp	x29, x30, [sp], 48
 	.cfi_remember_state
 	.cfi_restore 30
@@ -16554,14 +16574,14 @@ allocate_new_data_superblock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1710:
-.L1272:
+.LVL1712:
+.L1273:
 	.cfi_restore_state
 	.loc 2 2639 0
 	mov	w0, w19
 	bl	INSERT_FREE_LIST
-.LVL1711:
-	b	.L1271
+.LVL1713:
+	b	.L1272
 	.cfi_endproc
 .LFE299:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
@@ -16573,14 +16593,14 @@ FtlProgPages:
 .LFB215:
 	.loc 3 904 0
 	.cfi_startproc
-.LVL1712:
+.LVL1714:
 	stp	x29, x30, [sp, -96]!
 	.cfi_def_cfa_offset 96
 	.cfi_offset 29, -96
 	.cfi_offset 30, -88
 	.loc 3 911 0
 	mov	w2, 0
-.LVL1713:
+.LVL1715:
 	.loc 3 904 0
 	add	x29, sp, 0
 	.cfi_def_cfa_register 29
@@ -16604,7 +16624,7 @@ FtlProgPages:
 	adrp	x24, .LANCHOR19
 	.loc 3 911 0
 	ldrb	w3, [x3, 9]
-.LVL1714:
+.LVL1716:
 	.loc 3 926 0
 	adrp	x23, .LANCHOR83
 	add	x21, x0, x21
@@ -16614,31 +16634,31 @@ FtlProgPages:
 	add	x23, x23, :lo12:.LANCHOR83
 	.loc 3 911 0
 	bl	FlashProgPages
-.LVL1715:
-.L1281:
+.LVL1717:
+.L1282:
 	.loc 3 913 0 discriminator 1
 	cmp	x20, x21
-	beq	.L1288
+	beq	.L1289
 	sub	x22, x20, #4
 	.loc 3 917 0
 	adrp	x25, .LANCHOR43
-	b	.L1289
-.L1284:
+	b	.L1290
+.L1285:
 	.loc 3 915 0
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1716:
+.LVL1718:
 	.loc 3 916 0
 	ldrh	w1, [x19]
 	cmp	w1, w0, uxth
-	bne	.L1282
+	bne	.L1283
 	.loc 3 917 0
 	ldr	x2, [x25, #:lo12:.LANCHOR43]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w3, [x19, 4]
 	ldrh	w0, [x2, x1]
-.LVL1717:
+.LVL1719:
 	sub	w0, w0, w3
 	strh	w0, [x2, x1]
 	.loc 3 919 0
@@ -16648,15 +16668,15 @@ FtlProgPages:
 	strh	w0, [x19, 2]
 	.loc 3 920 0
 	strh	wzr, [x19, 4]
-.L1282:
+.L1283:
 	.loc 3 922 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1283
+	cbnz	w0, .L1284
 	.loc 3 923 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL1718:
-.L1283:
+.LVL1720:
+.L1284:
 	.loc 3 926 0
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
@@ -16665,11 +16685,11 @@ FtlProgPages:
 	ldr	w0, [x20]
 	lsr	w0, w0, 10
 	bl	FtlGcMarkBadPhyBlk
-.LVL1719:
+.LVL1721:
 	.loc 3 928 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL1720:
+.LVL1722:
 	.loc 3 929 0
 	str	w0, [x20]
 	.loc 3 930 0
@@ -16681,18 +16701,18 @@ FtlProgPages:
 	ldrb	w3, [x19, 9]
 	mov	x0, x22
 	bl	FlashProgPages
-.LVL1721:
-.L1289:
+.LVL1723:
+.L1290:
 	.loc 3 914 0
 	ldr	w0, [x20, -4]
 	cmn	w0, #1
-	beq	.L1284
+	beq	.L1285
 	.loc 3 933 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1285
+	bcc	.L1286
 	.loc 3 933 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16700,8 +16720,8 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1722:
-.L1285:
+.LVL1724:
+.L1286:
 	.loc 3 934 0 is_stmt 1
 	add	x1, x29, 96
 	ldr	w0, [x22, 4]
@@ -16712,49 +16732,49 @@ FtlProgPages:
 	.loc 3 935 0
 	ldr	w0, [x22, 24]
 	bl	log2phys
-.LVL1723:
+.LVL1725:
 	.loc 3 937 0
 	ldr	x0, [x22, 16]
 	ldr	w3, [x0, 12]
-.LVL1724:
+.LVL1726:
 	.loc 3 939 0
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-.LVL1725:
+.LVL1727:
 	and	w1, w0, 65535
 	mov	w22, w1
-.LVL1726:
+.LVL1728:
 	.loc 3 940 0
 	cmn	w3, #1
-	beq	.L1286
+	beq	.L1287
 	.loc 3 942 0
 	adrp	x2, .LANCHOR43
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1287
+	cbnz	w0, .L1288
 	.loc 3 943 0
 	adrp	x0, .LC103
 	mov	w2, 0
 	add	x0, x0, :lo12:.LC103
 	bl	printf
-.LVL1727:
-.L1287:
+.LVL1729:
+.L1288:
 	.loc 3 944 0
 	mov	w0, w22
 	bl	decrement_vpc_count
-.LVL1728:
-.L1286:
+.LVL1730:
+.L1287:
 	add	x20, x20, 32
-	b	.L1281
-.LVL1729:
-.L1288:
+	b	.L1282
+.LVL1731:
+.L1289:
 	.loc 3 948 0
 	adrp	x0, .LANCHOR3
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1280
+	bcc	.L1281
 	.loc 3 948 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR170
 	adrp	x0, .LC1
@@ -16762,11 +16782,11 @@ FtlProgPages:
 	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1730:
-.L1280:
+.LVL1732:
+.L1281:
 	.loc 3 949 0 is_stmt 1
 	ldp	x19, x20, [sp, 16]
-.LVL1731:
+.LVL1733:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
@@ -16804,17 +16824,17 @@ FtlCacheWriteBack:
 	.loc 3 953 0
 	adrp	x19, .LANCHOR150
 	ldr	x0, [x19, #:lo12:.LANCHOR150]
-	cbz	x0, .L1296
+	cbz	x0, .L1297
 	.loc 3 954 0
 	adrp	x1, .LANCHOR171
 	mov	w2, 0
 	ldr	x3, [x1, #:lo12:.LANCHOR171]
 	mov	w1, 1
 	bl	FtlProgPages
-.LVL1732:
+.LVL1734:
 	.loc 3 955 0
 	str	xzr, [x19, #:lo12:.LANCHOR150]
-.L1296:
+.L1297:
 	.loc 3 958 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -16843,17 +16863,17 @@ FtlSysFlush:
 	.cfi_def_cfa_register 29
 	.loc 3 798 0
 	bl	FtlCacheWriteBack
-.LVL1733:
+.LVL1735:
 	.loc 3 799 0
 	bl	l2p_flush
-.LVL1734:
+.LVL1736:
 	.loc 3 800 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1735:
+.LVL1737:
 	.loc 3 801 0
 	bl	FtlVpcTblFlush
-.LVL1736:
+.LVL1738:
 	.loc 3 803 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -16876,7 +16896,7 @@ sftl_deinit:
 	adrp	x0, .LANCHOR88
 	ldr	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 1
-	bne	.L1306
+	bne	.L1307
 	.loc 3 806 0
 	stp	x29, x30, [sp, -16]!
 	.cfi_def_cfa_offset 16
@@ -16886,7 +16906,7 @@ sftl_deinit:
 	.cfi_def_cfa_register 29
 	.loc 3 808 0
 	bl	FtlSysFlush
-.LVL1737:
+.LVL1739:
 	.loc 3 810 0
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
@@ -16894,7 +16914,7 @@ sftl_deinit:
 	.cfi_restore 29
 	.cfi_def_cfa 31, 0
 	ret
-.L1306:
+.L1307:
 	mov	w0, 0
 	ret
 	.cfi_endproc
@@ -16908,7 +16928,7 @@ FtlDiscard:
 .LFB218:
 	.loc 3 1157 0
 	.cfi_startproc
-.LVL1738:
+.LVL1740:
 	stp	x29, x30, [sp, -80]!
 	.cfi_def_cfa_offset 80
 	.cfi_offset 29, -80
@@ -16922,9 +16942,9 @@ FtlDiscard:
 	mov	w19, w1
 	.loc 3 1164 0
 	add	w1, w0, w1
-.LVL1739:
+.LVL1741:
 	adrp	x0, .LANCHOR34
-.LVL1740:
+.LVL1742:
 	.loc 3 1157 0
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
@@ -16934,18 +16954,18 @@ FtlDiscard:
 	.loc 3 1164 0
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1317
+	bhi	.L1318
 	.loc 3 1167 0
 	cmp	w19, 31
-	bhi	.L1311
-.LVL1741:
-.L1325:
+	bhi	.L1312
+.LVL1743:
+.L1326:
 	.loc 3 1200 0
 	mov	w0, 0
-.L1309:
+.L1310:
 	.loc 3 1201 0
 	ldp	x19, x20, [sp, 16]
-.LVL1742:
+.LVL1744:
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
@@ -16959,41 +16979,41 @@ FtlDiscard:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1743:
-.L1311:
+.LVL1745:
+.L1312:
 	.cfi_restore_state
 	.loc 3 1172 0
 	adrp	x22, .LANCHOR12
 	.loc 3 1170 0
 	bl	FtlCacheWriteBack
-.LVL1744:
+.LVL1746:
 	.loc 3 1172 0
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	udiv	w21, w20, w1
-.LVL1745:
+.LVL1747:
 	.loc 3 1173 0
 	msub	w20, w1, w21, w20
-.LVL1746:
+.LVL1748:
 	.loc 3 1174 0
 	ands	w20, w20, 65535
-	beq	.L1312
-.LVL1747:
+	beq	.L1313
+.LVL1749:
 	.loc 3 1175 0
 	sub	w1, w1, w20
-.LVL1748:
+.LVL1750:
 	.loc 3 1176 0
 	add	w21, w21, 1
-.LVL1749:
+.LVL1751:
 	.loc 3 1175 0
 	cmp	w1, w19
 	csel	w1, w1, w19, ls
 	.loc 3 1177 0
 	sub	w19, w19, w1, uxth
-.LVL1750:
-.L1312:
+.LVL1752:
+.L1313:
 	.loc 3 1184 0
 	adrp	x20, .LANCHOR172
-.LVL1751:
+.LVL1753:
 	.loc 3 1185 0
 	adrp	x23, .LANCHOR64
 	.loc 3 1184 0
@@ -17003,37 +17023,37 @@ FtlDiscard:
 	.loc 3 1180 0
 	mov	w0, -1
 	str	w0, [x29, 76]
-.LVL1752:
-.L1313:
+.LVL1754:
+.L1314:
 	.loc 3 1181 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	cmp	w19, w0
-	bcs	.L1315
+	bcs	.L1316
 	.loc 3 1194 0
 	adrp	x0, .LANCHOR172
 	ldr	w1, [x0, #:lo12:.LANCHOR172]
 	cmp	w1, 32
-	bls	.L1325
+	bls	.L1326
 	.loc 3 1196 0
 	str	wzr, [x0, #:lo12:.LANCHOR172]
 	.loc 3 1197 0
 	bl	l2p_flush
-.LVL1753:
+.LVL1755:
 	.loc 3 1198 0
 	bl	FtlVpcTblFlush
-.LVL1754:
-	b	.L1325
-.L1315:
+.LVL1756:
+	b	.L1326
+.L1316:
 	.loc 3 1182 0
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
-.LVL1755:
+.LVL1757:
 	.loc 3 1183 0
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1314
+	beq	.L1315
 	.loc 3 1184 0
 	ldr	w0, [x20]
 	.loc 3 1186 0
@@ -17049,30 +17069,30 @@ FtlDiscard:
 	.loc 3 1186 0
 	mov	w0, w21
 	bl	log2phys
-.LVL1756:
+.LVL1758:
 	.loc 3 1187 0
 	ldr	w0, [x29, 72]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1757:
+.LVL1759:
 	.loc 3 1188 0
 	bl	decrement_vpc_count
-.LVL1758:
-.L1314:
+.LVL1760:
+.L1315:
 	.loc 3 1191 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR12]
 	.loc 3 1190 0
 	add	w21, w21, 1
-.LVL1759:
+.LVL1761:
 	.loc 3 1191 0
 	sub	w19, w19, w0
-.LVL1760:
-	b	.L1313
-.LVL1761:
-.L1317:
+.LVL1762:
+	b	.L1314
+.LVL1763:
+.L1318:
 	.loc 3 1165 0
 	mov	w0, -1
-	b	.L1309
+	b	.L1310
 	.cfi_endproc
 .LFE218:
 	.size	FtlDiscard, .-FtlDiscard
@@ -17084,7 +17104,7 @@ FtlGcFreeTempBlock:
 .LFB308:
 	.loc 5 112 0
 	.cfi_startproc
-.LVL1762:
+.LVL1764:
 	stp	x29, x30, [sp, -112]!
 	.cfi_def_cfa_offset 112
 	.cfi_offset 29, -112
@@ -17121,11 +17141,11 @@ FtlGcFreeTempBlock:
 	.cfi_offset 27, -32
 	.loc 5 115 0
 	ldrh	w1, [x21, #:lo12:.LANCHOR19]
-.LVL1763:
+.LVL1765:
 	.loc 5 119 0
-	bne	.L1327
-.LVL1764:
-.L1337:
+	bne	.L1328
+.LVL1766:
+.L1338:
 	.loc 5 152 0
 	adrp	x0, .LANCHOR153
 	.loc 5 153 0
@@ -17136,11 +17156,11 @@ FtlGcFreeTempBlock:
 	.loc 5 153 0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1350
-.L1353:
+	bne	.L1351
+.L1354:
 	.loc 5 198 0
 	mov	w0, 0
-.L1326:
+.L1327:
 	.loc 5 199 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17162,52 +17182,52 @@ FtlGcFreeTempBlock:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1765:
-.L1327:
+.LVL1767:
+.L1328:
 	.cfi_restore_state
 	.loc 5 121 0
-	cbz	w0, .L1330
-.LVL1766:
+	cbz	w0, .L1331
+.LVL1768:
 	.loc 5 123 0
 	adrp	x0, .LANCHOR157
-.LVL1767:
+.LVL1769:
 	ldrh	w3, [x0, #:lo12:.LANCHOR157]
 	cmp	w3, w2
-	beq	.L1331
-.L1332:
+	beq	.L1332
+.L1333:
 	.loc 5 122 0
 	mov	w1, 2
-.LVL1768:
-.L1330:
+.LVL1770:
+.L1331:
 	.loc 5 131 0
 	add	x0, x19, :lo12:.LANCHOR53
 	bl	FtlGcScanTempBlk
-.LVL1769:
+.LVL1771:
 	str	w0, [x29, 108]
 	.loc 5 132 0
 	cmn	w0, #1
-	beq	.L1333
+	beq	.L1334
 	.loc 5 135 0
 	adrp	x0, .LANCHOR40
 	ubfiz	x20, x20, 1, 16
-.LVL1770:
+.LVL1772:
 	ldr	x1, [x0, #:lo12:.LANCHOR40]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L1334
+	bls	.L1335
 	.loc 5 136 0
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	.loc 5 137 0
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.LVL1771:
-.L1334:
+.LVL1773:
+.L1335:
 	.loc 5 139 0
 	adrp	x0, .LANCHOR153
 	mov	x19, x0
 	ldr	w1, [x0, #:lo12:.LANCHOR153]
-	cbnz	w1, .L1335
+	cbnz	w1, .L1336
 	.loc 5 140 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
@@ -17218,41 +17238,41 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x29, 108]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1772:
+.LVL1774:
 	.loc 5 142 0
 	bl	FtlBbmTblFlush
-.LVL1773:
-.L1335:
+.LVL1775:
+.L1336:
 	.loc 5 144 0
 	str	wzr, [x19, #:lo12:.LANCHOR153]
-.L1346:
+.L1347:
 	.loc 5 149 0
 	mov	w0, 1
-	b	.L1326
-.LVL1774:
-.L1331:
+	b	.L1327
+.LVL1776:
+.L1332:
 	.loc 5 124 0
 	strh	wzr, [x0, #:lo12:.LANCHOR157]
 	.loc 5 125 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 17
-	bhi	.L1332
-	b	.L1330
-.LVL1775:
-.L1333:
+	bhi	.L1333
+	b	.L1331
+.LVL1777:
+.L1334:
 	.loc 5 148 0
 	adrp	x0, .LANCHOR157
 	ldrh	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1346
-	b	.L1337
-.LVL1776:
-.L1350:
+	bne	.L1347
+	b	.L1338
+.LVL1778:
+.L1351:
 	.loc 5 160 0
 	bl	FtlCacheWriteBack
-.LVL1777:
+.LVL1779:
 	.loc 5 162 0
 	adrp	x20, .LANCHOR99
 	ldrb	w0, [x22, 7]
@@ -17260,7 +17280,7 @@ FtlGcFreeTempBlock:
 	ldrh	w1, [x20, #:lo12:.LANCHOR99]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1338
+	beq	.L1339
 	.loc 5 162 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR173
 	adrp	x0, .LC1
@@ -17268,8 +17288,8 @@ FtlGcFreeTempBlock:
 	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1778:
-.L1338:
+.LVL1780:
+.L1339:
 	.loc 5 163 0 is_stmt 1
 	add	x0, x19, :lo12:.LANCHOR53
 	adrp	x23, .LANCHOR43
@@ -17299,31 +17319,31 @@ FtlGcFreeTempBlock:
 	ldr	w2, [x1, #:lo12:.LANCHOR68]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR68]
-.LVL1779:
-.L1339:
+.LVL1781:
+.L1340:
 	.loc 5 165 0 discriminator 1
 	ldrh	w0, [x20, #:lo12:.LANCHOR99]
 	cmp	w0, w21
-	bhi	.L1343
+	bhi	.L1344
 	.loc 5 181 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1780:
+.LVL1782:
 	.loc 5 182 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
 	ldr	x2, [x23, #:lo12:.LANCHOR43]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1344
+	cbz	w1, .L1345
 	.loc 5 183 0
 	bl	INSERT_DATA_LIST
-.LVL1781:
-.L1345:
+.LVL1783:
+.L1346:
 	.loc 5 188 0
 	adrp	x0, .LANCHOR97
 	.loc 5 186 0
 	mov	w21, -1
-.LVL1782:
+.LVL1784:
 	.loc 5 187 0
 	strh	wzr, [x20, #:lo12:.LANCHOR99]
 	.loc 5 186 0
@@ -17332,10 +17352,10 @@ FtlGcFreeTempBlock:
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
 	.loc 5 189 0
 	bl	l2p_flush
-.LVL1783:
+.LVL1785:
 	.loc 5 190 0
 	bl	FtlVpcTblFlush
-.LVL1784:
+.LVL1786:
 	.loc 5 191 0
 	adrp	x0, .LANCHOR48
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
@@ -17343,7 +17363,7 @@ FtlGcFreeTempBlock:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L1353
+	ble	.L1354
 	.loc 5 192 0
 	adrp	x0, .LANCHOR82
 	.loc 5 193 0
@@ -17353,9 +17373,9 @@ FtlGcFreeTempBlock:
 	.loc 5 193 0
 	adrp	x0, .LANCHOR84
 	strh	w1, [x0, #:lo12:.LANCHOR84]
-	b	.L1353
-.LVL1785:
-.L1343:
+	b	.L1354
+.LVL1787:
+.L1344:
 	.loc 5 166 0
 	adrp	x0, .LANCHOR100
 	mov	w24, 12
@@ -17365,71 +17385,71 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x25]
 	.loc 5 166 0
 	add	x22, x27, x24
-.LVL1786:
+.LVL1788:
 	.loc 5 168 0
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L1340
+	bcc	.L1341
 	.loc 5 168 0 is_stmt 0 discriminator 1
 	adrp	x0, .LC1
 	mov	w2, 168
 	mov	x1, x26
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1787:
-.L1340:
+.LVL1789:
+.L1341:
 	.loc 5 169 0 is_stmt 1
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
 	bl	log2phys
-.LVL1788:
+.LVL1790:
 	.loc 5 170 0
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L1341
+	bne	.L1342
 	.loc 5 171 0
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1789:
+.LVL1791:
 	mov	w24, w0
-.LVL1790:
+.LVL1792:
 	.loc 5 172 0
 	ldr	w0, [x22, 8]
-.LVL1791:
+.LVL1793:
 	mov	w2, 1
 	add	x1, x22, 4
 	bl	log2phys
-.LVL1792:
+.LVL1794:
 	.loc 5 173 0
 	mov	w0, w24
-.LVL1793:
-.L1352:
+.LVL1795:
+.L1353:
 	.loc 5 177 0
 	bl	decrement_vpc_count
-.LVL1794:
-.L1342:
+.LVL1796:
+.L1343:
 	.loc 5 165 0 discriminator 2
 	add	w21, w21, 1
-.LVL1795:
+.LVL1797:
 	and	w21, w21, 65535
-.LVL1796:
-	b	.L1339
-.L1341:
+.LVL1798:
+	b	.L1340
+.L1342:
 	.loc 5 175 0
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L1342
+	beq	.L1343
 	.loc 5 177 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR53]
-	b	.L1352
-.LVL1797:
-.L1344:
+	b	.L1353
+.LVL1799:
+.L1345:
 	.loc 5 185 0
 	bl	INSERT_FREE_LIST
-.LVL1798:
-	b	.L1345
+.LVL1800:
+	b	.L1346
 	.cfi_endproc
 .LFE308:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
@@ -17457,29 +17477,29 @@ FtlGcPageRecovery:
 	ldrh	w1, [x20, #:lo12:.LANCHOR19]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
-.LVL1799:
+.LVL1801:
 	.loc 5 291 0
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x20, #:lo12:.LANCHOR19]
 	cmp	w1, w0
-	bcc	.L1354
-.LBB282:
-.LBB283:
+	bcc	.L1355
+.LBB286:
+.LBB287:
 	.loc 5 293 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL1800:
+.LVL1802:
 	.loc 5 294 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1801:
+.LVL1803:
 	.loc 5 295 0
 	adrp	x0, .LANCHOR153
 	str	wzr, [x0, #:lo12:.LANCHOR153]
-.L1354:
-.LBE283:
-.LBE282:
+.L1355:
+.LBE287:
+.LBE286:
 	.loc 5 297 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17519,30 +17539,30 @@ FtlPowerLostRecovery:
 	.loc 2 2035 0
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1802:
+.LVL1804:
 	.loc 2 2036 0
 	mov	x0, x19
 	.loc 2 2037 0
 	adrp	x19, .LANCHOR52
 	.loc 2 2036 0
 	bl	FtlSlcSuperblockCheck
-.LVL1803:
+.LVL1805:
 	.loc 2 2037 0
 	add	x19, x19, :lo12:.LANCHOR52
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
-.LVL1804:
+.LVL1806:
 	.loc 2 2038 0
 	mov	x0, x19
 	bl	FtlSlcSuperblockCheck
-.LVL1805:
+.LVL1807:
 	.loc 2 2039 0
 	bl	FtlGcPageRecovery
-.LVL1806:
+.LVL1808:
 	.loc 2 2040 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1807:
+.LVL1809:
 	.loc 2 2042 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -17585,39 +17605,39 @@ Ftl_gc_temp_data_write_back:
 	.loc 5 320 0
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FlashProgPages
-.LVL1808:
+.LVL1810:
 	.loc 5 321 0
 	mov	w11, 0
-.LVL1809:
-.L1360:
+.LVL1811:
+.L1361:
 	.loc 5 321 0 is_stmt 0 discriminator 1
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L1363
+	bcc	.L1364
 	.loc 5 335 0 is_stmt 1
 	ldr	x0, [x20, #:lo12:.LANCHOR121]
 	bl	FtlGcBufFree
-.LVL1810:
+.LVL1812:
 	.loc 5 336 0
 	str	wzr, [x19]
 	.loc 5 337 0
 	adrp	x0, .LANCHOR53+4
 	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
-	cbnz	w0, .L1364
+	cbnz	w0, .L1365
 	.loc 5 338 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1811:
-	b	.L1366
-.LVL1812:
-.L1363:
+.LVL1813:
+	b	.L1367
+.LVL1814:
+.L1364:
 	.loc 5 322 0
 	ldr	x2, [x20, #:lo12:.LANCHOR121]
 	ubfiz	x0, x11, 5, 16
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1361
+	bne	.L1362
 	.loc 5 323 0
 	adrp	x0, .LANCHOR53
 	adrp	x3, .LANCHOR43
@@ -17636,17 +17656,17 @@ Ftl_gc_temp_data_write_back:
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.LVL1813:
+.LVL1815:
 	.loc 5 327 0
 	bl	FtlBbmTblFlush
-.LVL1814:
+.LVL1816:
 	.loc 5 328 0
 	bl	FtlGcPageVarInit
-.LVL1815:
-.L1366:
+.LVL1817:
+.L1367:
 	.loc 5 339 0
 	mov	w0, 1
-.L1359:
+.L1360:
 	.loc 5 342 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -17657,29 +17677,29 @@ Ftl_gc_temp_data_write_back:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1816:
-.L1361:
+.LVL1818:
+.L1362:
 	.cfi_restore_state
 	.loc 5 331 0 discriminator 2
 	ldr	x0, [x1, 16]
-.LVL1817:
+.LVL1819:
 	.loc 5 332 0 discriminator 2
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
-.LVL1818:
+.LVL1820:
 	bl	FtlGcUpdatePage
-.LVL1819:
+.LVL1821:
 	.loc 5 321 0 discriminator 2
 	add	w11, w11, 1
-.LVL1820:
-	and	w11, w11, 65535
-.LVL1821:
-	b	.L1360
 .LVL1822:
-.L1364:
+	and	w11, w11, 65535
+.LVL1823:
+	b	.L1361
+.LVL1824:
+.L1365:
 	.loc 5 341 0
 	mov	w0, 0
-	b	.L1359
+	b	.L1360
 	.cfi_endproc
 .LFE313:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
@@ -17707,25 +17727,25 @@ Ftl_get_new_temp_ppa:
 	.loc 5 301 0
 	ldrh	w3, [x0, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	beq	.L1368
+	beq	.L1369
 	add	x1, x0, :lo12:.LANCHOR53
 	.loc 5 301 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L1369
-.L1368:
+	cbnz	w0, .L1370
+.L1369:
 	.loc 5 302 0 is_stmt 1
 	bl	FtlCacheWriteBack
-.LVL1823:
+.LVL1825:
 	.loc 5 303 0
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-.LVL1824:
+.LVL1826:
 	.loc 5 304 0
 	add	x0, x19, :lo12:.LANCHOR53
 	strb	wzr, [x0, 8]
 	.loc 5 305 0
 	bl	allocate_data_superblock
-.LVL1825:
+.LVL1827:
 	.loc 5 306 0
 	adrp	x0, .LANCHOR97
 	strh	wzr, [x0, #:lo12:.LANCHOR97]
@@ -17734,15 +17754,15 @@ Ftl_get_new_temp_ppa:
 	strh	wzr, [x0, #:lo12:.LANCHOR99]
 	.loc 5 308 0
 	bl	l2p_flush
-.LVL1826:
+.LVL1828:
 	.loc 5 309 0
 	mov	w0, 0
 	bl	FtlEctTblFlush
-.LVL1827:
+.LVL1829:
 	.loc 5 310 0
 	bl	FtlVpcTblFlush
-.LVL1828:
-.L1369:
+.LVL1830:
+.L1370:
 	.loc 5 312 0
 	add	x0, x19, :lo12:.LANCHOR53
 	.loc 5 313 0
@@ -17754,7 +17774,7 @@ Ftl_get_new_temp_ppa:
 	.cfi_def_cfa 31, 0
 	.loc 5 312 0
 	b	get_new_active_ppa
-.LVL1829:
+.LVL1831:
 	.cfi_endproc
 .LFE312:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
@@ -17766,7 +17786,7 @@ rk_ftl_garbage_collect:
 .LFB319:
 	.loc 5 470 0
 	.cfi_startproc
-.LVL1830:
+.LVL1832:
 	stp	x29, x30, [sp, -192]!
 	.cfi_def_cfa_offset 192
 	.cfi_offset 29, -192
@@ -17782,7 +17802,7 @@ rk_ftl_garbage_collect:
 	stp	x19, x20, [sp, 16]
 	.loc 5 478 0
 	ldr	w1, [x22, #:lo12:.LANCHOR117]
-.LVL1831:
+.LVL1833:
 	.loc 5 470 0
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
@@ -17796,31 +17816,31 @@ rk_ftl_garbage_collect:
 	.cfi_offset 27, -112
 	.cfi_offset 28, -104
 	.loc 5 478 0
-	cbnz	w1, .L1443
+	cbnz	w1, .L1444
 	.loc 5 481 0
 	adrp	x1, .LANCHOR45
 	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 47
-	bls	.L1443
+	bls	.L1444
 	mov	w24, w0
 	.loc 5 485 0
 	adrp	x0, .LANCHOR157
-.LVL1832:
+.LVL1834:
 	ldrh	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1373
-.L1376:
-.LVL1833:
-.LBB287:
-.LBB288:
+	bne	.L1374
+.L1377:
+.LVL1835:
+.LBB291:
+.LBB292:
 	.loc 5 489 0
 	adrp	x0, .LANCHOR102
 	mov	w3, 65535
 	ldrh	w2, [x0, #:lo12:.LANCHOR102]
 	cmp	w2, w3
-	bne	.L1374
-.L1375:
+	bne	.L1375
+.L1376:
 	.loc 5 496 0
 	adrp	x2, .LANCHOR86
 	.loc 5 497 0
@@ -17836,15 +17856,15 @@ rk_ftl_garbage_collect:
 	str	w1, [x2, #:lo12:.LANCHOR86]
 	.loc 5 497 0
 	cmp	w0, w20
-	bne	.L1377
+	bne	.L1378
 	adrp	x3, .LANCHOR53
 	ldrh	w20, [x3, #:lo12:.LANCHOR53]
 	cmp	w20, w0
-	bne	.L1446
+	bne	.L1447
 	adrp	x0, .LANCHOR101
 	ldrh	w21, [x0, #:lo12:.LANCHOR101]
 	cmp	w21, w20
-	bne	.L1377
+	bne	.L1378
 	.loc 5 498 0
 	adrp	x23, .LANCHOR48
 	mov	w3, 1024
@@ -17853,8 +17873,8 @@ rk_ftl_garbage_collect:
 	mov	w0, 5120
 	csel	w0, w0, w3, cc
 	cmp	w1, w0
-	bls	.L1449
-.LBB289:
+	bls	.L1450
+.LBB293:
 	.loc 5 502 0
 	adrp	x0, .LANCHOR174
 	.loc 5 501 0
@@ -17863,118 +17883,118 @@ rk_ftl_garbage_collect:
 	strh	wzr, [x0, #:lo12:.LANCHOR174]
 	.loc 5 503 0
 	bl	GetSwlReplaceBlock
-.LVL1834:
+.LVL1836:
 	and	w20, w0, 65535
-.LVL1835:
+.LVL1837:
 	.loc 5 504 0
 	cmp	w20, w21
-	bne	.L1450
+	bne	.L1451
 	.loc 5 505 0
 	adrp	x5, .LANCHOR85
 	ldrh	w1, [x23, #:lo12:.LANCHOR48]
 	ldrh	w0, [x5, #:lo12:.LANCHOR85]
-.LVL1836:
+.LVL1838:
 	cmp	w1, w0
-	bcs	.L1380
+	bcs	.L1381
 	.loc 5 506 0
 	mov	w0, 64
 	bl	List_get_gc_head_node
-.LVL1837:
+.LVL1839:
 	and	w0, w0, 65535
-.LVL1838:
+.LVL1840:
 	.loc 5 507 0
 	cmp	w0, w20
-	beq	.L1382
+	beq	.L1383
 	.loc 5 508 0
 	adrp	x1, .LANCHOR43
 	ubfiz	x0, x0, 1, 16
-.LVL1839:
+.LVL1841:
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	ldrh	w0, [x1, x0]
 	cmp	w0, 7
-	bhi	.L1383
+	bhi	.L1384
 	.loc 5 509 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1840:
+.LVL1842:
 	and	w21, w0, 65535
-.LVL1841:
+.LVL1843:
 	.loc 5 510 0
 	mov	w0, 128
 	strh	w0, [x5, #:lo12:.LANCHOR85]
 	.loc 5 520 0
 	cmp	w21, w20
-	bne	.L1379
-.LVL1842:
-.L1382:
+	bne	.L1380
+.LVL1844:
+.L1383:
 	.loc 5 523 0
 	bl	FtlGcReFreshBadBlk
-.LVL1843:
-.L1377:
-.LBE289:
+.LVL1845:
+.L1378:
+.LBE293:
 	.loc 5 527 0
 	cmp	w24, 0
 	mov	w0, 65535
 	ccmp	w20, w0, 0, eq
-	bne	.L1385
+	bne	.L1386
 	.loc 5 528 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 24
-	bhi	.L1451
+	bhi	.L1452
 	adrp	x1, .LANCHOR19
 	.loc 5 530 0
 	cmp	w0, 16
 	.loc 5 531 0
 	ldrh	w21, [x1, #:lo12:.LANCHOR19]
 	.loc 5 530 0
-	bls	.L1387
+	bls	.L1388
 	.loc 5 531 0
 	lsr	w21, w21, 5
-.LVL1844:
-.L1386:
+.LVL1846:
+.L1387:
 	.loc 5 539 0
 	adrp	x2, .LANCHOR84
 	mov	x3, x2
 	ldrh	w1, [x2, #:lo12:.LANCHOR84]
 	cmp	w1, w0
-	bcs	.L1390
+	bcs	.L1391
 	.loc 5 540 0
 	adrp	x0, .LANCHOR53
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bne	.L1391
+	bne	.L1392
 	adrp	x1, .LANCHOR101
 	ldrh	w1, [x1, #:lo12:.LANCHOR101]
 	cmp	w1, w0
-	bne	.L1391
+	bne	.L1392
 	.loc 5 542 0
 	adrp	x0, .LANCHOR174
 	ldrh	w0, [x0, #:lo12:.LANCHOR174]
-	cbnz	w0, .L1392
+	cbnz	w0, .L1393
 	adrp	x1, .LANCHOR62
 	adrp	x4, .LANCHOR60
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	ldr	w4, [x4, #:lo12:.LANCHOR60]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L1393
-.L1392:
+	bcs	.L1394
+.L1393:
 	.loc 5 543 0
 	adrp	x1, .LANCHOR80
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
 	strh	w1, [x3, #:lo12:.LANCHOR84]
-.L1394:
+.L1395:
 	.loc 5 546 0
 	adrp	x1, .LANCHOR89
 	str	wzr, [x1, #:lo12:.LANCHOR89]
-.LVL1845:
-.L1371:
-.LBE288:
-.LBE287:
+.LVL1847:
+.L1372:
+.LBE292:
+.LBE291:
 	.loc 5 758 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -17997,55 +18017,55 @@ rk_ftl_garbage_collect:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1846:
-.L1373:
+.LVL1848:
+.L1374:
 	.cfi_restore_state
 	.loc 5 485 0 discriminator 1
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	beq	.L1376
+	beq	.L1377
 	.loc 5 486 0
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-.LVL1847:
-	cbz	w0, .L1376
+.LVL1849:
+	cbz	w0, .L1377
 	.loc 5 487 0
 	mov	w0, 1
-	b	.L1371
-.LVL1848:
-.L1374:
-.LBB292:
-.LBB291:
+	b	.L1372
+.LVL1850:
+.L1375:
+.LBB296:
+.LBB295:
 	.loc 5 489 0
 	adrp	x1, .LANCHOR101
 	ldrh	w4, [x1, #:lo12:.LANCHOR101]
 	cmp	w4, w3
-	bne	.L1375
+	bne	.L1376
 	.loc 5 490 0
 	strh	w2, [x1, #:lo12:.LANCHOR101]
 	.loc 5 491 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR102]
-	b	.L1375
-.LVL1849:
-.L1383:
-.LBB290:
+	b	.L1376
+.LVL1851:
+.L1384:
+.LBB294:
 	.loc 5 512 0
 	mov	w0, 64
-.L1475:
+.L1476:
 	.loc 5 516 0
 	strh	w0, [x5, #:lo12:.LANCHOR85]
-	b	.L1382
-.L1380:
+	b	.L1383
+.L1381:
 	mov	w0, 80
-	b	.L1475
-.LVL1850:
-.L1450:
+	b	.L1476
+.LVL1852:
+.L1451:
 	.loc 5 504 0
 	mov	w21, w20
-.LVL1851:
-.L1379:
+.LVL1853:
+.L1380:
 	.loc 5 521 0
 	adrp	x1, .LANCHOR40
 	ubfiz	x0, x21, 1, 32
@@ -18062,80 +18082,80 @@ rk_ftl_garbage_collect:
 	adrp	x0, .LC104
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.LVL1852:
-	b	.L1382
-.LVL1853:
-.L1446:
-.LBE290:
+.LVL1854:
+	b	.L1383
+.LVL1855:
+.L1447:
+.LBE294:
 	.loc 5 473 0
 	mov	w20, w0
-	b	.L1377
-.L1449:
+	b	.L1378
+.L1450:
 	mov	w20, w21
-	b	.L1377
-.LVL1854:
-.L1387:
+	b	.L1378
+.LVL1856:
+.L1388:
 	.loc 5 532 0
 	cmp	w0, 12
-	bls	.L1388
+	bls	.L1389
 	.loc 5 533 0
 	lsr	w21, w21, 4
-.LVL1855:
-	b	.L1386
-.LVL1856:
-.L1388:
+.LVL1857:
+	b	.L1387
+.LVL1858:
+.L1389:
 	.loc 5 534 0
 	cmp	w0, 8
-	bls	.L1386
+	bls	.L1387
 	.loc 5 535 0
 	lsr	w21, w21, 2
-.LVL1857:
-	b	.L1386
-.LVL1858:
-.L1451:
+.LVL1859:
+	b	.L1387
+.LVL1860:
+.L1452:
 	.loc 5 529 0
 	mov	w21, 1
-	b	.L1386
-.LVL1859:
-.L1393:
+	b	.L1387
+.LVL1861:
+.L1394:
 	.loc 5 545 0
 	mov	w1, 18
 	strh	w1, [x2, #:lo12:.LANCHOR84]
-	b	.L1394
-.L1391:
+	b	.L1395
+.L1392:
 	.loc 5 549 0
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x3, #:lo12:.LANCHOR84]
-.L1390:
+.L1391:
 	.loc 5 551 0
 	adrp	x0, .LANCHOR103
 	ldrh	w0, [x0, #:lo12:.LANCHOR103]
-	cbz	w0, .L1452
+	cbz	w0, .L1453
 	.loc 5 552 0
 	add	w21, w21, 32
-.LVL1860:
+.LVL1862:
 	and	w21, w21, 65535
-.LVL1861:
-.L1452:
+.LVL1863:
+.L1453:
 	.loc 5 551 0
 	mov	w20, 65535
-.LVL1862:
-.L1396:
+.LVL1864:
+.L1397:
 	.loc 5 597 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1405
+	bne	.L1406
 	.loc 5 598 0
 	cmp	w20, w0
-	beq	.L1406
+	beq	.L1407
 	.loc 5 599 0
 	strh	w20, [x19, #:lo12:.LANCHOR82]
-.LVL1863:
-.L1407:
+.LVL1865:
+.L1408:
 	.loc 5 610 0
 	add	x0, x19, :lo12:.LANCHOR82
 	.loc 5 611 0
@@ -18145,25 +18165,25 @@ rk_ftl_garbage_collect:
 	.loc 5 611 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	cmp	w0, w1
-	beq	.L1405
+	beq	.L1406
 	.loc 5 612 0
 	bl	IsBlkInGcList
-.LVL1864:
-	cbz	w0, .L1410
+.LVL1866:
+	cbz	w0, .L1411
 	.loc 5 613 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
-.L1410:
+.L1411:
 	.loc 5 615 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	mov	w0, 65535
 	add	x23, x19, :lo12:.LANCHOR82
 	cmp	w1, w0
-	beq	.L1405
+	beq	.L1406
 	.loc 5 616 0
 	mov	x0, x23
 	bl	make_superblock
-.LVL1865:
+.LVL1867:
 	.loc 5 619 0
 	adrp	x0, .LANCHOR175
 	.loc 5 620 0
@@ -18181,31 +18201,31 @@ rk_ftl_garbage_collect:
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR176
 	strh	w1, [x0, #:lo12:.LANCHOR176]
-.L1405:
+.L1406:
 	.loc 5 625 0
 	adrp	x0, .LANCHOR51
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	str	x0, [x29, 136]
 	ldrh	w2, [x0, #:lo12:.LANCHOR51]
 	cmp	w2, w1
-	beq	.L1411
+	beq	.L1412
 	adrp	x0, .LANCHOR52
 	str	x0, [x29, 128]
 	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w1
-	beq	.L1411
+	beq	.L1412
 	.loc 5 635 0
 	adrp	x24, .LANCHOR87
-.LVL1866:
+.LVL1868:
 	.loc 5 657 0
 	add	x0, x24, :lo12:.LANCHOR87
 	str	x0, [x29, 160]
-.L1412:
+.L1413:
 	.loc 5 631 0
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1413
+	bne	.L1414
 	.loc 5 632 0
 	adrp	x0, .LANCHOR89
 	.loc 5 645 0
@@ -18213,47 +18233,47 @@ rk_ftl_garbage_collect:
 	add	x25, x25, :lo12:.LANCHOR19
 	.loc 5 632 0
 	str	wzr, [x0, #:lo12:.LANCHOR89]
-.L1414:
+.L1415:
 	.loc 5 635 0
 	ldrh	w5, [x24, #:lo12:.LANCHOR87]
 	add	x7, x24, :lo12:.LANCHOR87
 	mov	w0, w5
 	bl	List_get_gc_head_node
-.LVL1867:
+.LVL1869:
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR82]
 	.loc 5 636 0
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L1415
+	bne	.L1416
 	.loc 5 637 0
 	strh	wzr, [x7]
 	.loc 5 638 0
 	mov	w0, 8
-	b	.L1371
-.LVL1868:
-.L1385:
+	b	.L1372
+.LVL1870:
+.L1386:
 	.loc 5 557 0
 	adrp	x1, .LANCHOR53
 	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1455
+	bne	.L1456
 	adrp	x0, .LANCHOR101
 	ldrh	w0, [x0, #:lo12:.LANCHOR101]
 	cmp	w0, w1
-	bne	.L1455
+	bne	.L1456
 	cmp	w20, w0
-	bne	.L1455
+	bne	.L1456
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	cmp	w0, w20
-	beq	.L1397
-.LVL1869:
-.L1455:
+	beq	.L1398
+.LVL1871:
+.L1456:
 	.loc 5 556 0
 	mov	w21, 1
-	b	.L1396
-.LVL1870:
-.L1397:
+	b	.L1397
+.LVL1872:
+.L1398:
 	.loc 5 558 0
 	adrp	x0, .LANCHOR89
 	.loc 5 560 0
@@ -18270,40 +18290,40 @@ rk_ftl_garbage_collect:
 	.loc 5 561 0
 	ldrh	w1, [x23, #:lo12:.LANCHOR174]
 	.loc 5 560 0
-	bcs	.L1398
+	bcs	.L1399
 	.loc 5 561 0
-	cbnz	w1, .L1399
+	cbnz	w1, .L1400
 	adrp	x1, .LANCHOR62
 	adrp	x3, .LANCHOR60
 	ldr	w1, [x1, #:lo12:.LANCHOR62]
 	ldr	w3, [x3, #:lo12:.LANCHOR60]
 	add	w1, w1, w1, lsl 1
 	cmp	w3, w1, lsr 2
-	bcs	.L1400
-.L1399:
+	bcs	.L1401
+.L1400:
 	.loc 5 562 0
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
 	strh	w0, [x2, #:lo12:.LANCHOR84]
-.LVL1871:
-.L1476:
+.LVL1873:
+.L1477:
 	.loc 5 578 0
 	bl	FtlReadRefresh
-.LVL1872:
+.LVL1874:
 	.loc 5 579 0
 	ldrh	w0, [x23, #:lo12:.LANCHOR174]
-	b	.L1371
-.LVL1873:
-.L1400:
+	b	.L1372
+.LVL1875:
+.L1401:
 	.loc 5 564 0
 	mov	w1, 18
 	strh	w1, [x0, #:lo12:.LANCHOR84]
-	b	.L1476
-.L1398:
+	b	.L1477
+.L1399:
 	.loc 5 572 0
-	cbnz	w1, .L1455
+	cbnz	w1, .L1456
 	.loc 5 573 0
 	adrp	x1, .LANCHOR80
 	ldrh	w5, [x1, #:lo12:.LANCHOR80]
@@ -18313,10 +18333,10 @@ rk_ftl_garbage_collect:
 	.loc 5 574 0
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL1874:
+.LVL1876:
 	.loc 5 575 0
 	ubfiz	x0, x0, 1, 16
-.LVL1875:
+.LVL1877:
 	adrp	x1, .LANCHOR43
 	adrp	x2, .LANCHOR3
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
@@ -18326,70 +18346,70 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, #:lo12:.LANCHOR20]
 	mul	w0, w0, w2
 	cmp	w1, w0, asr 1
-	ble	.L1403
+	ble	.L1404
 	.loc 5 576 0
 	sub	w5, w5, #1
 	.loc 5 575 0
 	cmp	w6, w5
-	bge	.L1476
-.L1403:
+	bge	.L1477
+.L1404:
 	.loc 5 584 0
-	cbnz	w1, .L1455
+	cbnz	w1, .L1456
 	.loc 5 585 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1876:
+.LVL1878:
 	.loc 5 586 0
 	ldrh	w0, [x21, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	b	.L1371
-.LVL1877:
-.L1406:
+	b	.L1372
+.LVL1879:
+.L1407:
 	.loc 5 600 0
 	adrp	x0, .LANCHOR101
 	ldrh	w1, [x0, #:lo12:.LANCHOR101]
 	cmp	w1, w20
-	beq	.L1407
+	beq	.L1408
 	.loc 5 604 0
 	adrp	x2, .LANCHOR43
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR43]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L1408
+	cbnz	w1, .L1409
 	.loc 5 605 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR101]
-.L1408:
+.L1409:
 	.loc 5 606 0
 	ldrh	w1, [x0, #:lo12:.LANCHOR101]
 	strh	w1, [x19, #:lo12:.LANCHOR82]
 	.loc 5 607 0
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR101]
-	b	.L1407
-.LVL1878:
-.L1411:
+	b	.L1408
+.LVL1880:
+.L1412:
 	.loc 5 626 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
-.LVL1879:
-.L1477:
+.LVL1881:
+.L1478:
 	.loc 5 734 0
 	adrp	x0, .LANCHOR174
 	ldrh	w0, [x0, #:lo12:.LANCHOR174]
-	b	.L1371
-.LVL1880:
-.L1415:
+	b	.L1372
+.LVL1882:
+.L1416:
 	.loc 5 640 0
 	mov	w0, w6
 	bl	IsBlkInGcList
-.LVL1881:
+.LVL1883:
 	add	w5, w5, 1
-	cbz	w0, .L1416
+	cbz	w0, .L1417
 	.loc 5 641 0
 	strh	w5, [x24, #:lo12:.LANCHOR87]
-	b	.L1414
-.L1416:
+	b	.L1415
+.L1417:
 	.loc 5 645 0
 	adrp	x23, .LANCHOR43
 	adrp	x4, .LANCHOR3
@@ -18406,50 +18426,50 @@ rk_ftl_garbage_collect:
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L1418
+	bgt	.L1419
 	.loc 5 646 0
 	cmp	w5, 48
-	bls	.L1419
+	bls	.L1420
 	cmp	w3, 8
-	bls	.L1419
+	bls	.L1420
 	adrp	x3, .LANCHOR97
 	ldrh	w3, [x3, #:lo12:.LANCHOR97]
 	cmp	w3, 35
-	bhi	.L1419
-.L1418:
+	bhi	.L1420
+.L1419:
 	.loc 5 647 0
 	ldr	x3, [x29, 160]
 	strh	wzr, [x3]
-.L1419:
+.L1420:
 	.loc 5 649 0
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L1420
+	bgt	.L1421
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L1420
+	bne	.L1421
 	.loc 5 650 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
 	.loc 5 651 0
 	adrp	x0, .LANCHOR87
 	strh	wzr, [x0, #:lo12:.LANCHOR87]
-	b	.L1477
-.L1420:
+	b	.L1478
+.L1421:
 	.loc 5 655 0
-	cbnz	w1, .L1421
+	cbnz	w1, .L1422
 	.loc 5 656 0
 	mov	w0, -1
 	bl	decrement_vpc_count
-.LVL1882:
+.LVL1884:
 	.loc 5 657 0
 	ldr	x0, [x29, 160]
 	ldr	x1, [x29, 160]
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L1414
-.L1421:
+	b	.L1415
+.L1422:
 	.loc 5 660 0
 	add	x0, x19, :lo12:.LANCHOR82
 	strb	wzr, [x0, 8]
@@ -18457,48 +18477,48 @@ rk_ftl_garbage_collect:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, w6
-	bne	.L1422
+	bne	.L1423
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	mov	w2, 662
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1883:
-.L1422:
+.LVL1885:
+.L1423:
 	.loc 5 663 0
 	ldr	x0, [x29, 128]
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1423
+	bne	.L1424
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	mov	w2, 663
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1884:
-.L1423:
+.LVL1886:
+.L1424:
 	.loc 5 664 0
 	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, #:lo12:.LANCHOR82]
 	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L1424
+	bne	.L1425
 	adrp	x1, .LANCHOR177
 	adrp	x0, .LC1
 	mov	w2, 664
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1885:
-.L1424:
+.LVL1887:
+.L1425:
 	.loc 5 665 0
 	add	x25, x19, :lo12:.LANCHOR82
 	mov	x0, x25
 	bl	make_superblock
-.LVL1886:
+.LVL1888:
 	.loc 5 666 0
 	adrp	x0, .LANCHOR175
 	.loc 5 667 0
@@ -18515,10 +18535,10 @@ rk_ftl_garbage_collect:
 	strh	w1, [x0, #:lo12:.LANCHOR176]
 	.loc 5 669 0
 	strb	wzr, [x25, 6]
-.L1413:
+.L1414:
 	.loc 5 675 0
 	bl	FtlReadRefresh
-.LVL1887:
+.LVL1889:
 	.loc 5 679 0
 	adrp	x1, .LANCHOR19
 	.loc 5 678 0
@@ -18527,7 +18547,7 @@ rk_ftl_garbage_collect:
 	.loc 5 679 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR19]
 	str	w0, [x29, 172]
-.LVL1888:
+.LVL1890:
 	.loc 5 680 0
 	add	x0, x19, :lo12:.LANCHOR82
 	str	x1, [x29, 120]
@@ -18535,13 +18555,13 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0, 2]
 	add	w2, w0, w21
 	cmp	w2, w3
-	ble	.L1425
+	ble	.L1426
 	.loc 5 681 0
 	sub	w21, w3, w0
-.LVL1889:
+.LVL1891:
 	and	w21, w21, 65535
-.LVL1890:
-.L1425:
+.LVL1892:
+.L1426:
 	.loc 5 704 0
 	adrp	x0, .LANCHOR175
 	.loc 5 693 0
@@ -18549,11 +18569,11 @@ rk_ftl_garbage_collect:
 	.loc 5 704 0
 	add	x0, x0, :lo12:.LANCHOR175
 	str	x0, [x29, 152]
-.LVL1891:
-.L1426:
+.LVL1893:
+.L1427:
 	.loc 5 683 0
 	cmp	w21, w27, uxth
-	bls	.L1434
+	bls	.L1435
 	.loc 5 688 0
 	add	x1, x19, :lo12:.LANCHOR82
 	.loc 5 685 0
@@ -18572,40 +18592,40 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	.loc 5 688 0
 	add	w4, w4, w27
-	b	.L1435
-.LVL1892:
-.L1428:
+	b	.L1436
+.LVL1894:
+.L1429:
 	.loc 5 686 0
 	ldrh	w3, [x1]
-.LVL1893:
+.LVL1895:
 	.loc 5 687 0
 	cmp	w3, w6
-	beq	.L1427
+	beq	.L1428
 	.loc 5 688 0
 	ubfiz	x5, x23, 5, 16
 	.loc 5 689 0
 	add	w23, w23, 1
-.LVL1894:
+.LVL1896:
 	.loc 5 688 0
 	add	x5, x0, x5
 	.loc 5 689 0
 	and	w23, w23, 65535
-.LVL1895:
+.LVL1897:
 	.loc 5 688 0
 	orr	w3, w4, w3, lsl 10
-.LVL1896:
+.LVL1898:
 	str	w3, [x5, 4]
-.L1427:
+.L1428:
 	.loc 5 685 0
 	add	w2, w2, 1
-.LVL1897:
+.LVL1899:
 	add	x1, x1, 2
-.LVL1898:
+.LVL1900:
 	and	w2, w2, 65535
-.LVL1899:
-.L1435:
+.LVL1901:
+.L1436:
 	cmp	w2, w7
-	bne	.L1428
+	bne	.L1429
 	.loc 5 693 0
 	add	x1, x19, :lo12:.LANCHOR82
 	.loc 5 705 0
@@ -18613,48 +18633,48 @@ rk_ftl_garbage_collect:
 	add	x26, x26, :lo12:.LANCHOR91
 	.loc 5 693 0
 	ldrb	w2, [x1, 8]
-.LVL1900:
+.LVL1902:
 	mov	w1, w23
 	bl	FlashReadPages
-.LVL1901:
+.LVL1903:
 	ubfiz	x0, x23, 5, 16
 	mov	x23, 0
-.LVL1902:
+.LVL1904:
 	str	x0, [x29, 144]
-.LVL1903:
-.L1429:
+.LVL1905:
+.L1430:
 	.loc 5 695 0
 	ldr	x0, [x29, 144]
 	cmp	x0, x23
-	bne	.L1433
-.LVL1904:
-	add	w27, w27, 1
-.LVL1905:
-	b	.L1426
+	bne	.L1434
 .LVL1906:
-.L1433:
+	add	w27, w27, 1
+.LVL1907:
+	b	.L1427
+.LVL1908:
+.L1434:
 	.loc 5 696 0
 	ldr	x0, [x25, #:lo12:.LANCHOR95]
 	add	x1, x0, x23
-.LVL1907:
+.LVL1909:
 	.loc 5 697 0
 	ldr	w0, [x0, x23]
 	cmn	w0, #1
-	beq	.L1430
+	beq	.L1431
 	.loc 5 696 0
 	ldr	x28, [x1, 16]
 	.loc 5 697 0
 	mov	w0, 61589
 	ldrh	w1, [x28]
-.LVL1908:
+.LVL1910:
 	cmp	w1, w0
-	bne	.L1430
+	bne	.L1431
 	.loc 5 699 0
 	ldr	w4, [x28, 8]
-.LVL1909:
+.LVL1911:
 	.loc 5 700 0
 	cmn	w4, #1
-	bne	.L1431
+	bne	.L1432
 	str	w4, [x29, 112]
 	mov	w2, 700
 	adrp	x1, .LANCHOR177
@@ -18662,23 +18682,23 @@ rk_ftl_garbage_collect:
 	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1910:
+.LVL1912:
 	ldr	w4, [x29, 112]
-.LVL1911:
-.L1431:
+.LVL1913:
+.L1432:
 	.loc 5 701 0
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
 	bl	log2phys
-.LVL1912:
+.LVL1914:
 	.loc 5 702 0
 	ldr	x0, [x25, #:lo12:.LANCHOR95]
 	ldr	w1, [x29, 188]
 	add	x0, x0, x23
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bne	.L1430
+	bne	.L1431
 	.loc 5 704 0
 	ldr	x1, [x29, 152]
 	.loc 5 705 0
@@ -18699,7 +18719,7 @@ rk_ftl_garbage_collect:
 	str	w0, [x1, 24]
 	.loc 5 706 0
 	bl	Ftl_get_new_temp_ppa
-.LVL1913:
+.LVL1915:
 	ldp	x4, x1, [x29, 104]
 	.loc 5 707 0
 	ldr	x2, [x4, #:lo12:.LANCHOR121]
@@ -18738,34 +18758,34 @@ rk_ftl_garbage_collect:
 	str	w2, [x28, 4]
 	.loc 5 716 0
 	bl	FtlGcBufAlloc
-.LVL1914:
+.LVL1916:
 	.loc 5 717 0
 	ldrb	w1, [x11, 7]
 	ldr	w0, [x26]
 	cmp	w1, w0
-	beq	.L1432
+	beq	.L1433
 	ldrh	w0, [x11, 4]
-	cbnz	w0, .L1430
-.L1432:
+	cbnz	w0, .L1431
+.L1433:
 	.loc 5 718 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1915:
-	cbz	w0, .L1430
-.LVL1916:
-.L1478:
+.LVL1917:
+	cbz	w0, .L1431
+.LVL1918:
+.L1479:
 	.loc 5 733 0
 	str	wzr, [x22, #:lo12:.LANCHOR117]
-	b	.L1477
-.LVL1917:
-.L1430:
+	b	.L1478
+.LVL1919:
+.L1431:
 	add	x23, x23, 32
-	b	.L1429
-.L1434:
+	b	.L1430
+.L1435:
 	.loc 5 727 0
 	add	x1, x19, :lo12:.LANCHOR82
 	ldrh	w0, [x1, 2]
 	add	w21, w21, w0
-.LVL1918:
+.LVL1920:
 	.loc 5 729 0
 	ldr	w0, [x29, 172]
 	.loc 5 727 0
@@ -18773,65 +18793,65 @@ rk_ftl_garbage_collect:
 	strh	w21, [x1, 2]
 	.loc 5 729 0
 	cmp	w0, w21
-	bls	.L1436
+	bls	.L1437
 	adrp	x0, .LANCHOR175
 	ldrh	w1, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR176
 	ldrh	w0, [x0, #:lo12:.LANCHOR176]
 	cmp	w1, w0
-	bne	.L1437
-.L1436:
+	bne	.L1438
+.L1437:
 	.loc 5 731 0
 	adrp	x0, .LANCHOR91
 	ldr	w0, [x0, #:lo12:.LANCHOR91]
-	cbz	w0, .L1438
+	cbz	w0, .L1439
 	.loc 5 732 0
 	bl	Ftl_gc_temp_data_write_back
-.LVL1919:
-	cbnz	w0, .L1478
-.L1438:
+.LVL1921:
+	cbnz	w0, .L1479
+.L1439:
 	.loc 5 737 0
 	adrp	x0, .LANCHOR175
 	ldrh	w0, [x0, #:lo12:.LANCHOR175]
-	cbnz	w0, .L1439
+	cbnz	w0, .L1440
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	adrp	x1, .LANCHOR43
 	ldr	x1, [x1, #:lo12:.LANCHOR43]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L1439
+	cbz	w2, .L1440
 	.loc 5 739 0
 	strh	wzr, [x1, x0]
 	.loc 5 740 0
 	ldrh	w0, [x19, #:lo12:.LANCHOR82]
 	bl	update_vpc_list
-.LVL1920:
+.LVL1922:
 	.loc 5 741 0
 	bl	FtlCacheWriteBack
-.LVL1921:
+.LVL1923:
 	.loc 5 742 0
 	bl	l2p_flush
-.LVL1922:
+.LVL1924:
 	.loc 5 743 0
 	bl	FtlVpcTblFlush
-.LVL1923:
-.L1439:
+.LVL1925:
+.L1440:
 	.loc 5 745 0
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR82]
-.L1437:
+.L1438:
 	.loc 5 747 0
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 2
-	bhi	.L1440
+	bhi	.L1441
 	.loc 5 749 0
 	ldr	x0, [x29, 120]
 	ldrh	w21, [x0, #:lo12:.LANCHOR19]
-.LVL1924:
-	b	.L1412
-.LVL1925:
-.L1440:
+.LVL1926:
+	b	.L1413
+.LVL1927:
+.L1441:
 	.loc 5 754 0
 	adrp	x1, .LANCHOR174
 	.loc 5 752 0
@@ -18841,15 +18861,15 @@ rk_ftl_garbage_collect:
 	.loc 5 755 0
 	cmp	w1, 0
 	csinc	w0, w1, w0, ne
-	b	.L1371
-.LVL1926:
-.L1443:
-.LBE291:
-.LBE292:
+	b	.L1372
+.LVL1928:
+.L1444:
+.LBE295:
+.LBE296:
 	.loc 5 479 0
 	mov	w0, 0
-.LVL1927:
-	b	.L1371
+.LVL1929:
+	b	.L1372
 	.cfi_endproc
 .LFE319:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -18865,7 +18885,7 @@ sftl_gc:
 	mov	w1, 1
 	mov	w0, w1
 	b	rk_ftl_garbage_collect
-.LVL1928:
+.LVL1930:
 	.cfi_endproc
 .LFE320:
 	.size	sftl_gc, .-sftl_gc
@@ -18877,7 +18897,7 @@ FtlRead:
 .LFB214:
 	.loc 3 814 0
 	.cfi_startproc
-.LVL1929:
+.LVL1931:
 	stp	x29, x30, [sp, -176]!
 	.cfi_def_cfa_offset 176
 	.cfi_offset 29, -176
@@ -18907,29 +18927,29 @@ FtlRead:
 	.cfi_offset 25, -112
 	.cfi_offset 26, -104
 	.loc 3 824 0
-	bne	.L1481
+	bne	.L1482
 	.loc 3 825 0
 	mov	x2, x3
-.LVL1930:
+.LVL1932:
 	mov	w1, w27
-.LVL1931:
+.LVL1933:
 	add	w0, w19, 256
-.LVL1932:
+.LVL1934:
 	bl	FtlVendorPartRead
-.LVL1933:
+.LVL1935:
 	mov	w21, w0
-.LVL1934:
-.L1480:
+.LVL1936:
+.L1481:
 	.loc 3 901 0
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
-.LVL1935:
+.LVL1937:
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-.LVL1936:
+.LVL1938:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-.LVL1937:
+.LVL1939:
 	ldp	x29, x30, [sp], 176
 	.cfi_remember_state
 	.cfi_restore 30
@@ -18946,28 +18966,28 @@ FtlRead:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1938:
-.L1481:
+.LVL1940:
+.L1482:
 	.cfi_restore_state
 	.loc 3 830 0
 	add	w0, w1, w2
 	str	w0, [x29, 140]
 	adrp	x0, .LANCHOR34
 	add	w1, w1, w2
-.LVL1939:
+.LVL1941:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w1, w0
-	bhi	.L1501
+	bhi	.L1502
 	.loc 3 830 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR88
 	ldr	w21, [x0, #:lo12:.LANCHOR88]
 	cmn	w21, #1
-	beq	.L1480
+	beq	.L1481
 	.loc 3 835 0 is_stmt 1
 	adrp	x22, .LANCHOR12
 	.loc 3 833 0
 	bl	FtlCacheWriteBack
-.LVL1940:
+.LVL1942:
 	.loc 3 836 0
 	add	w1, w19, w27
 	.loc 3 840 0
@@ -18986,20 +19006,20 @@ FtlRead:
 	stp	wzr, wzr, [x29, 144]
 	.loc 3 835 0
 	udiv	w26, w19, w0
-.LVL1941:
+.LVL1943:
 	.loc 3 836 0
 	udiv	w24, w24, w0
-.LVL1942:
+.LVL1944:
 	.loc 3 835 0
 	mov	w20, w26
 	.loc 3 837 0
 	sub	w0, w24, w26
 	add	w0, w0, 1
 	stp	wzr, w0, [x29, 152]
-.LVL1943:
+.LVL1945:
 	.loc 3 841 0
 	ldr	w0, [x1, #:lo12:.LANCHOR63]
-.LVL1944:
+.LVL1946:
 	ldr	w2, [x29, 156]
 	add	w0, w0, w2
 	str	w0, [x1, #:lo12:.LANCHOR63]
@@ -19007,72 +19027,72 @@ FtlRead:
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	str	x0, [x29, 128]
-.LVL1945:
-.L1483:
+.LVL1947:
+.L1484:
 	.loc 3 842 0
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L1499
+	cbnz	w0, .L1500
 	.loc 3 898 0
 	adrp	x0, .LANCHOR103
 	ldrh	w0, [x0, #:lo12:.LANCHOR103]
-	cbnz	w0, .L1500
+	cbnz	w0, .L1501
 	.loc 3 898 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 31
-	bhi	.L1480
-.L1500:
+	bhi	.L1481
+.L1501:
 	.loc 3 899 0 is_stmt 1
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL1946:
-	b	.L1480
-.L1499:
+.LVL1948:
+	b	.L1481
+.L1500:
 	.loc 3 843 0
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL1947:
+.LVL1949:
 	.loc 3 844 0
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1484
+	bne	.L1485
 	.loc 3 845 0 discriminator 1
 	add	x5, x22, :lo12:.LANCHOR12
 	mov	w4, 0
-.L1485:
-.LVL1948:
+.L1486:
+.LVL1950:
 	ldrh	w0, [x5]
 	cmp	w4, w0
-	bcc	.L1487
-.LVL1949:
-.L1488:
+	bcc	.L1488
+.LVL1951:
+.L1489:
 	.loc 3 874 0
 	ldr	w0, [x29, 156]
 	.loc 3 872 0
 	add	w20, w20, 1
-.LVL1950:
+.LVL1952:
 	.loc 3 874 0
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-.LVL1951:
-	beq	.L1492
+.LVL1953:
+	beq	.L1493
 	.loc 3 874 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR3
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w25, w0, lsl 2
-	bne	.L1483
-.L1492:
+	bne	.L1484
+.L1493:
 	.loc 3 875 0 is_stmt 1
-	cbz	w25, .L1483
+	cbz	w25, .L1484
 	.loc 3 876 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
-.LVL1952:
+.LVL1954:
 	.loc 3 883 0
 	ldr	w0, [x29, 144]
 	lsl	w0, w0, 9
@@ -19086,77 +19106,77 @@ FtlRead:
 	str	w0, [x29, 112]
 	ubfiz	x0, x25, 5, 32
 	mov	x25, 0
-.LVL1953:
+.LVL1955:
 	str	x0, [x29, 104]
-.LVL1954:
+.LVL1956:
 	.loc 3 883 0
 	add	x0, x22, :lo12:.LANCHOR12
 	str	x0, [x29, 96]
-.L1498:
+.L1499:
 	.loc 3 878 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x0, x0, x25
 	ldr	w1, [x0, 24]
 	cmp	w26, w1
-	bne	.L1494
+	bne	.L1495
 	.loc 3 879 0
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR116
 	ldr	x0, [x0, #:lo12:.LANCHOR116]
 	cmp	x1, x0
-	bne	.L1495
+	bne	.L1496
 	.loc 3 880 0
 	ldr	x0, [x29, 120]
 	ldr	w2, [x29, 112]
 	add	x1, x1, x0
 	mov	x0, x23
-.L1512:
+.L1513:
 	.loc 3 883 0
 	bl	ftl_memcpy
-.LVL1955:
-.L1495:
+.LVL1957:
+.L1496:
 	.loc 3 885 0
 	ldr	x0, [x28, #:lo12:.LANCHOR120]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L1496
+	bne	.L1497
 	.loc 3 886 0
 	ldr	x1, [x29, 128]
 	.loc 3 887 0
 	mov	w21, w0
-.LVL1956:
+.LVL1958:
 	.loc 3 886 0
 	ldr	x2, [x29, 128]
 	ldr	w1, [x1, 72]
 	add	w1, w1, 1
 	str	w1, [x2, 72]
-.LVL1957:
-.L1497:
+.LVL1959:
+.L1498:
 	.loc 3 877 0 discriminator 2
 	ldr	x0, [x29, 104]
 	add	x25, x25, 32
-.LVL1958:
+.LVL1960:
 	cmp	x0, x25
-	bne	.L1498
+	bne	.L1499
 	.loc 3 894 0
 	mov	w25, 0
-	b	.L1483
-.LVL1959:
-.L1487:
+	b	.L1484
+.LVL1961:
+.L1488:
 	.loc 3 846 0
 	madd	w0, w20, w0, w4
-.LVL1960:
+.LVL1962:
 	.loc 3 847 0
 	cmp	w19, w0
-	bhi	.L1486
+	bhi	.L1487
 	.loc 3 847 0 is_stmt 0 discriminator 1
 	ldr	w1, [x29, 140]
 	cmp	w1, w0
-	bls	.L1486
+	bls	.L1487
 	.loc 3 848 0 is_stmt 1
 	sub	w0, w0, w19
-.LVL1961:
+.LVL1963:
 	str	x5, [x29, 112]
 	lsl	w0, w0, 9
 	str	w4, [x29, 120]
@@ -19164,17 +19184,17 @@ FtlRead:
 	mov	w1, 0
 	add	x0, x23, x0
 	bl	ftl_memset
-.LVL1962:
+.LVL1964:
 	ldr	w4, [x29, 120]
 	ldr	x5, [x29, 112]
-.LVL1963:
-.L1486:
+.LVL1965:
+.L1487:
 	.loc 3 845 0 discriminator 2
 	add	w4, w4, 1
-.LVL1964:
-	b	.L1485
-.LVL1965:
-.L1484:
+.LVL1966:
+	b	.L1486
+.LVL1967:
+.L1485:
 	.loc 3 851 0
 	ldr	x2, [x28, #:lo12:.LANCHOR120]
 	ubfiz	x0, x25, 5, 32
@@ -19184,7 +19204,7 @@ FtlRead:
 	add	x0, x2, x0
 	str	w1, [x0, 4]
 	.loc 3 852 0
-	bne	.L1489
+	bne	.L1490
 	.loc 3 853 0
 	adrp	x1, .LANCHOR116
 	ldr	x1, [x1, #:lo12:.LANCHOR116]
@@ -19194,22 +19214,22 @@ FtlRead:
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 152]
-.LVL1966:
+.LVL1968:
 	.loc 3 855 0
 	sub	w2, w1, w2
-.LVL1967:
+.LVL1969:
 	cmp	w27, w2
 	csel	w2, w27, w2, ls
-.LVL1968:
+.LVL1970:
 	str	w2, [x29, 148]
-.LVL1969:
+.LVL1971:
 	.loc 3 857 0
 	cmp	w1, w2
-	bne	.L1490
+	bne	.L1491
 	.loc 3 858 0
 	str	x23, [x0, 8]
-.LVL1970:
-.L1490:
+.LVL1972:
+.L1491:
 	.loc 3 867 0
 	adrp	x1, .LANCHOR24
 	adrp	x2, .LANCHOR115
@@ -19221,16 +19241,16 @@ FtlRead:
 	mul	w1, w1, w25
 	.loc 3 869 0
 	add	w25, w25, 1
-.LVL1971:
+.LVL1973:
 	.loc 3 867 0
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L1488
-.L1489:
+	b	.L1489
+.L1490:
 	.loc 3 859 0
 	cmp	w20, w24
-	bne	.L1491
+	bne	.L1492
 	.loc 3 861 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR12]
 	.loc 3 860 0
@@ -19244,33 +19264,33 @@ FtlRead:
 	mul	w1, w20, w2
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
-.LVL1972:
+.LVL1974:
 	.loc 3 862 0
 	cmp	w2, w3
-	bne	.L1490
-.LVL1973:
-.L1511:
+	bne	.L1491
+.LVL1975:
+.L1512:
 	.loc 3 865 0
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L1490
-.L1491:
+	b	.L1491
+.L1492:
 	ldrh	w1, [x22, #:lo12:.LANCHOR12]
 	mul	w1, w1, w20
-	b	.L1511
-.LVL1974:
-.L1494:
+	b	.L1512
+.LVL1976:
+.L1495:
 	.loc 3 881 0
 	cmp	w24, w1
-	bne	.L1495
+	bne	.L1496
 	.loc 3 882 0
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR114
 	ldr	x0, [x0, #:lo12:.LANCHOR114]
 	cmp	x1, x0
-	bne	.L1495
+	bne	.L1496
 	.loc 3 883 0
 	ldr	x0, [x29, 96]
 	ldr	w2, [x29, 136]
@@ -19279,27 +19299,27 @@ FtlRead:
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L1512
-.L1496:
+	b	.L1513
+.L1497:
 	.loc 3 889 0
 	cmp	w0, 256
-	bne	.L1497
-.LBB293:
+	bne	.L1498
+.LBB297:
 	.loc 3 890 0
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
-.LVL1975:
+.LVL1977:
 	.loc 3 891 0
 	bl	FtlGcRefreshBlock
-.LVL1976:
-	b	.L1497
-.LVL1977:
-.L1501:
-.LBE293:
+.LVL1978:
+	b	.L1498
+.LVL1979:
+.L1502:
+.LBE297:
 	.loc 3 831 0
 	mov	w21, -1
-	b	.L1480
+	b	.L1481
 	.cfi_endproc
 .LFE214:
 	.size	FtlRead, .-FtlRead
@@ -19311,17 +19331,17 @@ sftl_read:
 .LFB219:
 	.loc 3 1204 0
 	.cfi_startproc
-.LVL1978:
+.LVL1980:
 	.loc 3 1205 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL1979:
+.LVL1981:
 	mov	w1, w0
-.LVL1980:
+.LVL1982:
 	mov	w0, 0
-.LVL1981:
+.LVL1983:
 	b	FtlRead
-.LVL1982:
+.LVL1984:
 	.cfi_endproc
 .LFE219:
 	.size	sftl_read, .-sftl_read
@@ -19333,7 +19353,7 @@ FtlWrite:
 .LFB217:
 	.loc 3 962 0
 	.cfi_startproc
-.LVL1983:
+.LVL1985:
 	stp	x29, x30, [sp, -240]!
 	.cfi_def_cfa_offset 240
 	.cfi_offset 29, -240
@@ -19363,23 +19383,23 @@ FtlWrite:
 	.cfi_offset 27, -160
 	.cfi_offset 28, -152
 	.loc 3 970 0
-	bne	.L1515
+	bne	.L1516
 	.loc 3 971 0
 	mov	x2, x3
-.LVL1984:
+.LVL1986:
 	mov	w1, w25
-.LVL1985:
+.LVL1987:
 	add	w0, w22, 256
-.LVL1986:
+.LVL1988:
 	bl	FtlVendorPartWrite
-.LVL1987:
-.L1514:
+.LVL1989:
+.L1515:
 	.loc 3 1153 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-.LVL1988:
+.LVL1990:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	.cfi_remember_state
@@ -19397,29 +19417,29 @@ FtlWrite:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.LVL1989:
-.L1515:
+.LVL1991:
+.L1516:
 	.cfi_restore_state
 	.loc 3 974 0
 	adrp	x0, .LANCHOR34
 	add	w2, w1, w2
-.LVL1990:
+.LVL1992:
 	ldr	w0, [x0, #:lo12:.LANCHOR34]
 	cmp	w2, w0
-	bhi	.L1557
+	bhi	.L1558
 	.loc 3 974 0 is_stmt 0 discriminator 1
 	adrp	x0, .LANCHOR88
 	ldr	w0, [x0, #:lo12:.LANCHOR88]
 	cmn	w0, #1
-	beq	.L1514
+	beq	.L1515
 	.loc 3 977 0 is_stmt 1
 	adrp	x0, .LANCHOR178
 	.loc 3 978 0
 	adrp	x3, .LANCHOR12
-.LVL1991:
+.LVL1993:
 	.loc 3 977 0
 	mov	w1, 2048
-.LVL1992:
+.LVL1994:
 	.loc 3 979 0
 	sub	w2, w2, #1
 	.loc 3 977 0
@@ -19433,18 +19453,18 @@ FtlWrite:
 	adrp	x2, .LANCHOR65
 	.loc 3 978 0
 	udiv	w21, w22, w1
-.LVL1993:
+.LVL1995:
 	.loc 3 979 0
 	str	w0, [x29, 168]
-.LVL1994:
+.LVL1996:
 	.loc 3 980 0
 	sub	w23, w0, w21
 	.loc 3 982 0
 	ldr	w0, [x2, #:lo12:.LANCHOR65]
-.LVL1995:
+.LVL1997:
 	.loc 3 980 0
 	add	w24, w23, 1
-.LVL1996:
+.LVL1998:
 	.loc 3 982 0
 	add	w0, w0, w24
 	str	w0, [x2, #:lo12:.LANCHOR65]
@@ -19452,45 +19472,45 @@ FtlWrite:
 	adrp	x0, .LANCHOR150
 	str	x0, [x29, 128]
 	ldr	x2, [x0, #:lo12:.LANCHOR150]
-	cbz	x2, .L1517
+	cbz	x2, .L1518
 	.loc 3 984 0
 	ldr	w0, [x2, 24]
 	cmp	w21, w0
-	beq	.L1518
+	beq	.L1519
 	.loc 3 985 0
 	bl	FtlCacheWriteBack
-.LVL1997:
-.L1517:
+.LVL1999:
+.L1518:
 	.loc 3 1008 0
 	adrp	x0, .LANCHOR179
 	str	x0, [x29, 152]
 	ldr	w1, [x0, #:lo12:.LANCHOR179]
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-	cbz	w1, .L1520
+	cbz	w1, .L1521
 	.loc 3 1008 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1520
+	cbnz	w0, .L1521
 	.loc 3 1009 0 is_stmt 1
 	adrp	x19, .LANCHOR52
 	add	x19, x19, :lo12:.LANCHOR52
-.L1520:
+.L1521:
 	mov	w20, w21
 	.loc 3 1023 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	str	x0, [x29, 104]
-.LVL1998:
-.L1521:
+.LVL2000:
+.L1522:
 	.loc 3 1011 0
-	cbz	w24, .L1555
+	cbz	w24, .L1556
 	.loc 3 1012 0
 	adrp	x0, .LANCHOR3
 	ldrb	w2, [x19, 6]
 	str	x0, [x29, 120]
 	ldrh	w1, [x0, #:lo12:.LANCHOR3]
 	cmp	w2, w1
-	bcc	.L1522
+	bcc	.L1523
 	.loc 3 1012 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -19498,38 +19518,38 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL1999:
-.L1522:
+.LVL2001:
+.L1523:
 	.loc 3 1013 0 is_stmt 1
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1524
 	.loc 3 1014 0
 	bl	FtlCacheWriteBack
-.LVL2000:
+.LVL2002:
 	.loc 3 1016 0
 	adrp	x0, .LANCHOR51
 	add	x0, x0, :lo12:.LANCHOR51
 	cmp	x19, x0
-	bne	.L1524
+	bne	.L1525
 	.loc 3 1017 0
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1525
+	cbnz	w1, .L1526
 	.loc 3 1018 0
 	bl	allocate_new_data_superblock
-.LVL2001:
+.LVL2003:
 	.loc 3 1019 0
 	ldr	x0, [x29, 152]
 	str	wzr, [x0, #:lo12:.LANCHOR179]
-.L1525:
+.L1526:
 	.loc 3 1021 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2002:
+.LVL2004:
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2003:
+.LVL2005:
 	.loc 3 1022 0
 	ldr	x0, [x29, 152]
 	ldr	w0, [x0, #:lo12:.LANCHOR179]
@@ -19537,16 +19557,16 @@ FtlWrite:
 	cmp	w0, 0
 	ldr	x0, [x29, 104]
 	csel	x19, x0, x19, ne
-.L1526:
-.LVL2004:
+.L1527:
+.LVL2006:
 	.loc 3 1033 0
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1523
+	cbnz	w0, .L1524
 	.loc 3 1034 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2005:
-.L1523:
+.LVL2007:
+.L1524:
 	.loc 3 1043 0
 	ldrh	w0, [x19, 4]
 	.loc 3 1041 0
@@ -19557,14 +19577,14 @@ FtlWrite:
 	cmp	w0, w1
 	csel	w0, w0, w1, ls
 	str	w0, [x29, 160]
-.LVL2006:
+.LVL2008:
 	.loc 3 1045 0
 	ldr	x0, [x29, 120]
-.LVL2007:
+.LVL2009:
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1527
+	bcc	.L1528
 	.loc 3 1045 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -19572,8 +19592,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2008:
-.L1527:
+.LVL2010:
+.L1528:
 	.loc 3 1055 0 is_stmt 1 discriminator 1
 	adrp	x0, .LANCHOR24
 	adrp	x28, .LANCHOR122
@@ -19582,76 +19602,76 @@ FtlWrite:
 	str	xzr, [x29, 184]
 	.loc 3 1055 0 discriminator 1
 	str	x0, [x29, 112]
-.L1528:
+.L1529:
 	.loc 3 1046 0 discriminator 1
 	ldr	w1, [x29, 160]
 	ldr	w27, [x29, 184]
-.LVL2009:
+.LVL2011:
 	cmp	w27, w1
-	bcc	.L1549
+	bcc	.L1550
 	mov	x27, x1
-.L1529:
-.LVL2010:
+.L1530:
+.LVL2012:
 	.loc 3 1127 0
 	ldr	x0, [x29, 128]
 	ldr	x0, [x0, #:lo12:.LANCHOR150]
-	cbz	x0, .L1550
-.LVL2011:
+	cbz	x0, .L1551
+.LVL2013:
 	.loc 3 1129 0
 	sub	w24, w24, #1
-.LVL2012:
+.LVL2014:
 	.loc 3 1130 0
 	subs	w27, w27, #1
-.LVL2013:
-	bne	.L1550
-.LVL2014:
-.L1555:
+.LVL2015:
+	bne	.L1551
+.LVL2016:
+.L1556:
 	.loc 3 1137 0
 	ldr	w0, [x29, 168]
 	sub	w1, w0, w21
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2015:
+.LVL2017:
 	.loc 3 1139 0
 	adrp	x0, .LANCHOR48
 	mov	x22, x0
-.LVL2016:
+.LVL2018:
 	ldrh	w1, [x0, #:lo12:.LANCHOR48]
 	cmp	w1, 15
-	bhi	.L1552
+	bhi	.L1553
 	.loc 3 1141 0
 	adrp	x21, .LANCHOR101
-.LVL2017:
+.LVL2019:
 	.loc 3 1143 0
 	adrp	x20, .LANCHOR85
-.LVL2018:
+.LVL2020:
 	.loc 3 1144 0
 	adrp	x19, .LANCHOR84
-.LVL2019:
+.LVL2021:
 	.loc 3 1141 0
 	add	x21, x21, :lo12:.LANCHOR101
 	.loc 3 1143 0
 	add	x20, x20, :lo12:.LANCHOR85
 	.loc 3 1144 0
 	add	x19, x19, :lo12:.LANCHOR84
-.L1575:
+.L1576:
 	.loc 3 1141 0
 	adrp	x0, .LANCHOR82
 	mov	w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR82]
 	cmp	w0, w1
-	bne	.L1556
+	bne	.L1557
 	.loc 3 1141 0 is_stmt 0 discriminator 1
 	ldrh	w1, [x21]
 	cmp	w1, w0
-	bne	.L1556
+	bne	.L1557
 	.loc 3 1142 0 is_stmt 1
 	mov	w0, 0
 	bl	List_get_gc_head_node
-.LVL2020:
+.LVL2022:
 	bl	FtlGcRefreshBlock
-.LVL2021:
-.L1556:
+.LVL2023:
+.L1557:
 	.loc 3 1143 0
 	mov	w0, 128
 	.loc 3 1145 0
@@ -19663,19 +19683,19 @@ FtlWrite:
 	.loc 3 1145 0
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-.LVL2022:
+.LVL2024:
 	.loc 3 1146 0
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2023:
+.LVL2025:
 	.loc 3 1147 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR48]
 	cmp	w0, 8
-	bls	.L1575
-	b	.L1552
-.LVL2024:
-.L1518:
+	bls	.L1576
+	b	.L1553
+.LVL2026:
+.L1519:
 	.loc 3 987 0
 	adrp	x3, .LANCHOR66
 	ldr	w0, [x3, #:lo12:.LANCHOR66]
@@ -19683,82 +19703,82 @@ FtlWrite:
 	str	w0, [x3, #:lo12:.LANCHOR66]
 	.loc 3 988 0
 	msub	w0, w21, w1, w22
-.LVL2025:
+.LVL2027:
 	.loc 3 992 0
 	ldr	x3, [x2, 8]
 	.loc 3 989 0
 	sub	w1, w1, w0
-.LVL2026:
+.LVL2028:
 	cmp	w25, w1
 	.loc 3 992 0
 	lsl	w0, w0, 9
-.LVL2027:
+.LVL2029:
 	csel	w19, w25, w1, ls
-.LVL2028:
+.LVL2030:
 	add	x0, x3, x0
 	lsl	w20, w19, 9
 	mov	x1, x26
 	mov	w2, w20
 	bl	ftl_memcpy
-.LVL2029:
+.LVL2031:
 	.loc 3 994 0
-	cbnz	w23, .L1519
-.LVL2030:
-.L1552:
+	cbnz	w23, .L1520
+.LVL2032:
+.L1553:
 	.loc 3 995 0
 	mov	w0, 0
-	b	.L1514
-.LVL2031:
-.L1519:
+	b	.L1515
+.LVL2033:
+.L1520:
 	.loc 3 996 0
 	sub	w25, w25, w19
-.LVL2032:
+.LVL2034:
 	.loc 3 997 0
 	add	w22, w22, w19
-.LVL2033:
+.LVL2035:
 	.loc 3 998 0
 	add	x26, x26, x20
-.LVL2034:
+.LVL2036:
 	.loc 3 999 0
 	add	w21, w21, 1
-.LVL2035:
+.LVL2037:
 	.loc 3 1000 0
 	bl	FtlCacheWriteBack
-.LVL2036:
+.LVL2038:
 	mov	w24, w23
-	b	.L1517
-.LVL2037:
-.L1524:
+	b	.L1518
+.LVL2039:
+.L1525:
 	.loc 3 1027 0
 	ldr	x1, [x29, 152]
 	str	wzr, [x1, #:lo12:.LANCHOR179]
 	.loc 3 1028 0
 	ldrh	w1, [x0, 4]
-	cbnz	w1, .L1562
+	cbnz	w1, .L1563
 	.loc 3 1029 0
 	mov	x0, x19
 	bl	allocate_new_data_superblock
-.LVL2038:
-	b	.L1526
-.L1562:
-	mov	x19, x0
-.LVL2039:
-	b	.L1523
 .LVL2040:
-.L1549:
+	b	.L1527
+.L1563:
+	mov	x19, x0
+.LVL2041:
+	b	.L1524
+.LVL2042:
+.L1550:
 	.loc 3 1047 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1529
+	cbz	w0, .L1530
 	.loc 3 1051 0
 	add	x1, x29, 204
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
-.LVL2041:
+.LVL2043:
 	.loc 3 1052 0
 	mov	x0, x19
 	bl	get_new_active_ppa
-.LVL2042:
+.LVL2044:
 	ldr	x1, [x29, 184]
 	lsl	x23, x1, 5
 	.loc 3 1054 0
@@ -19768,7 +19788,7 @@ FtlWrite:
 	str	w0, [x1, 4]
 	.loc 3 1055 0
 	ldr	x0, [x29, 112]
-.LVL2043:
+.LVL2045:
 	.loc 3 1056 0
 	str	w20, [x1, 24]
 	.loc 3 1055 0
@@ -19781,37 +19801,37 @@ FtlWrite:
 	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	str	x0, [x29, 136]
 	add	x27, x0, x3
-.LVL2044:
+.LVL2046:
 	str	x27, [x1, 16]
 	.loc 3 1059 0
 	mov	x0, x27
 	mov	w1, 0
-.LVL2045:
+.LVL2047:
 	bl	ftl_memset
-.LVL2046:
+.LVL2048:
 	.loc 3 1061 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w21
 	ccmp	w20, w0, 4, ne
-	bne	.L1530
+	bne	.L1531
 	.loc 3 1062 0
 	cmp	w20, w21
-	bne	.L1531
+	bne	.L1532
 	.loc 3 1063 0
 	ldr	x0, [x29, 176]
 	ldrh	w2, [x0, #:lo12:.LANCHOR12]
 	udiv	w0, w22, w2
 	msub	w0, w0, w2, w22
 	str	w0, [x29, 164]
-.LVL2047:
+.LVL2049:
 	.loc 3 1064 0
 	sub	w2, w2, w0
 	cmp	w2, w25
 	csel	w0, w2, w25, ls
-.LVL2048:
+.LVL2050:
 	str	w0, [x29, 172]
-.LVL2049:
-.L1532:
+.LVL2051:
+.L1533:
 	.loc 3 1072 0
 	ldr	x0, [x29, 176]
 	ldr	w1, [x29, 172]
@@ -19820,22 +19840,22 @@ FtlWrite:
 	.loc 3 1074 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	.loc 3 1072 0
-	bne	.L1533
+	bne	.L1534
 	.loc 3 1074 0
 	add	x23, x0, x23
 	.loc 3 1073 0
 	cmp	w20, w21
-	bne	.L1534
+	bne	.L1535
 	.loc 3 1074 0
 	str	x26, [x23, 8]
-.LVL2050:
-.L1535:
+.LVL2052:
+.L1536:
 	.loc 3 1119 0
 	ldr	x0, [x29, 120]
 	ldrb	w1, [x19, 6]
 	ldrh	w0, [x0, #:lo12:.LANCHOR3]
 	cmp	w1, w0
-	bcc	.L1546
+	bcc	.L1547
 	.loc 3 1119 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -19843,8 +19863,8 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2051:
-.L1546:
+.LVL2053:
+.L1547:
 	.loc 3 1120 0 is_stmt 1
 	ldp	x1, x2, [x29, 136]
 	mov	w0, -3947
@@ -19856,7 +19876,7 @@ FtlWrite:
 	stp	w0, w20, [x27, 4]
 	.loc 3 1125 0
 	add	w20, w20, 1
-.LVL2052:
+.LVL2054:
 	.loc 3 1121 0
 	add	w0, w0, 1
 	cmn	w0, #1
@@ -19871,9 +19891,9 @@ FtlWrite:
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-	b	.L1528
-.LVL2053:
-.L1531:
+	b	.L1529
+.LVL2055:
+.L1532:
 	.loc 3 1069 0
 	ldr	x0, [x29, 176]
 	add	w2, w22, w25
@@ -19884,39 +19904,39 @@ FtlWrite:
 	msub	w2, w20, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 172]
-.LVL2054:
-	b	.L1532
-.LVL2055:
-.L1534:
+.LVL2056:
+	b	.L1533
+.LVL2057:
+.L1535:
 	.loc 3 1076 0
 	ldr	w0, [x29, 172]
-.LVL2056:
-.L1578:
+.LVL2058:
+.L1579:
 	.loc 3 1117 0
 	mul	w0, w0, w20
 	sub	w0, w0, w22
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x23, 8]
-	b	.L1535
-.LVL2057:
-.L1533:
+	b	.L1536
+.LVL2059:
+.L1534:
 	.loc 3 1080 0
 	add	x0, x0, x23
 	.loc 3 1079 0
 	cmp	w20, w21
-	bne	.L1536
+	bne	.L1537
 	.loc 3 1080 0
 	adrp	x1, .LANCHOR116
 	ldr	x1, [x1, #:lo12:.LANCHOR116]
-.L1577:
+.L1578:
 	.loc 3 1082 0
 	str	x1, [x0, 8]
 	.loc 3 1084 0
 	ldr	w0, [x29, 204]
 	cmn	w0, #1
-	beq	.L1538
-.LBB294:
+	beq	.L1539
+.LBB298:
 	.loc 3 1086 0
 	str	w0, [x29, 212]
 	.loc 3 1090 0
@@ -19934,24 +19954,24 @@ FtlWrite:
 	mov	w1, 1
 	add	x0, x29, 208
 	bl	FlashReadPages
-.LVL2058:
+.LVL2060:
 	.loc 3 1091 0
 	ldr	w0, [x29, 208]
 	cmn	w0, #1
-	bne	.L1539
+	bne	.L1540
 	.loc 3 1092 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L1542:
+.L1543:
 	ldr	w0, [x29, 172]
-.LBE294:
+.LBE298:
 	.loc 3 1104 0
 	cmp	w20, w21
 	lsl	w2, w0, 9
-	bne	.L1543
+	bne	.L1544
 	.loc 3 1105 0
 	ldr	x1, [x28, #:lo12:.LANCHOR122]
 	ldr	w0, [x29, 164]
@@ -19961,15 +19981,15 @@ FtlWrite:
 	mov	x1, x26
 	add	x0, x4, x0
 	bl	ftl_memcpy
-.LVL2059:
+.LVL2061:
 	.loc 3 1109 0
 	ldr	w0, [x29, 168]
 	cmp	w20, w0
-	bne	.L1535
-.L1544:
+	bne	.L1536
+.L1545:
 	.loc 3 1110 0
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1535
+	cbz	w0, .L1536
 	.loc 3 1111 0
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
@@ -19978,18 +19998,18 @@ FtlWrite:
 	.loc 3 1112 0
 	adrp	x0, .LANCHOR171
 	str	x19, [x0, #:lo12:.LANCHOR171]
-	b	.L1535
-.L1536:
+	b	.L1536
+.L1537:
 	.loc 3 1082 0
 	adrp	x1, .LANCHOR114
 	ldr	x1, [x1, #:lo12:.LANCHOR114]
-	b	.L1577
-.L1539:
-.LBB295:
+	b	.L1578
+.L1540:
+.LBB299:
 	.loc 3 1094 0
 	ldr	w1, [x27, 8]
 	cmp	w20, w1
-	beq	.L1541
+	beq	.L1542
 	.loc 3 1095 0
 	adrp	x0, .LANCHOR83
 	add	x0, x0, :lo12:.LANCHOR83
@@ -20001,12 +20021,12 @@ FtlWrite:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-.LVL2060:
-.L1541:
+.LVL2062:
+.L1542:
 	.loc 3 1098 0
 	ldr	w0, [x27, 8]
 	cmp	w20, w0
-	beq	.L1542
+	beq	.L1543
 	.loc 3 1098 0 is_stmt 0 discriminator 1
 	mov	w2, 1098
 	adrp	x1, .LANCHOR180
@@ -20014,11 +20034,11 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2061:
-	b	.L1542
-.LVL2062:
-.L1538:
-.LBE295:
+.LVL2063:
+	b	.L1543
+.LVL2064:
+.L1539:
+.LBE299:
 	.loc 3 1101 0 is_stmt 1
 	ldr	x0, [x28, #:lo12:.LANCHOR122]
 	adrp	x1, .LANCHOR23
@@ -20027,9 +20047,9 @@ FtlWrite:
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-.LVL2063:
-	b	.L1542
-.L1543:
+.LVL2065:
+	b	.L1543
+.L1544:
 	.loc 3 1107 0
 	ldr	x0, [x29, 176]
 	ldrh	w1, [x0, #:lo12:.LANCHOR12]
@@ -20041,19 +20061,19 @@ FtlWrite:
 	lsl	w1, w1, 9
 	add	x1, x26, x1
 	bl	ftl_memcpy
-.LVL2064:
-	b	.L1544
-.LVL2065:
-.L1530:
+.LVL2066:
+	b	.L1545
+.LVL2067:
+.L1531:
 	.loc 3 1117 0
 	adrp	x0, .LANCHOR122
 	ldr	x0, [x0, #:lo12:.LANCHOR122]
 	add	x23, x0, x23
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0, #:lo12:.LANCHOR12]
-	b	.L1578
-.LVL2066:
-.L1550:
+	b	.L1579
+.LVL2068:
+.L1551:
 	.loc 3 1133 0
 	adrp	x0, .LANCHOR122
 	mov	x3, x19
@@ -20061,10 +20081,10 @@ FtlWrite:
 	mov	w1, w27
 	ldr	x0, [x0, #:lo12:.LANCHOR122]
 	bl	FtlProgPages
-.LVL2067:
+.LVL2069:
 	.loc 3 1134 0
 	cmp	w24, w27
-	bcs	.L1553
+	bcs	.L1554
 	.loc 3 1134 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR180
 	adrp	x0, .LC1
@@ -20072,17 +20092,17 @@ FtlWrite:
 	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2068:
-.L1553:
+.LVL2070:
+.L1554:
 	.loc 3 1135 0 is_stmt 1
 	sub	w24, w24, w27
-.LVL2069:
-	b	.L1521
-.LVL2070:
-.L1557:
+.LVL2071:
+	b	.L1522
+.LVL2072:
+.L1558:
 	.loc 3 975 0
 	mov	w0, -1
-	b	.L1514
+	b	.L1515
 	.cfi_endproc
 .LFE217:
 	.size	FtlWrite, .-FtlWrite
@@ -20092,19 +20112,19 @@ FtlWrite:
 	.type	sftl_write, %function
 sftl_write:
 .LFB220:
-	.loc 3 1210 0
+	.loc 3 1209 0
 	.cfi_startproc
-.LVL2071:
-	.loc 3 1211 0
+.LVL2073:
+	.loc 3 1210 0
 	mov	x3, x2
 	mov	w2, w1
-.LVL2072:
+.LVL2074:
 	mov	w1, w0
-.LVL2073:
+.LVL2075:
 	mov	w0, 0
-.LVL2074:
+.LVL2076:
 	b	FtlWrite
-.LVL2075:
+.LVL2077:
 	.cfi_endproc
 .LFE220:
 	.size	sftl_write, .-sftl_write
@@ -20170,16 +20190,16 @@ FtlLoadSysInfo:
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2076:
+.LVL2078:
 	.loc 2 1369 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L1581
-.L1589:
+	bne	.L1582
+.L1590:
 	.loc 2 1370 0
 	mov	w0, -1
-.L1580:
+.L1581:
 	.loc 2 1463 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -20202,15 +20222,15 @@ FtlLoadSysInfo:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1581:
+.L1582:
 	.cfi_restore_state
 	add	x27, x20, :lo12:.LANCHOR81
 	.loc 2 1372 0
 	mov	w1, 1
 	bl	FtlGetLastWrittenPage
-.LVL2077:
+.LVL2079:
 	sxth	w22, w0
-.LVL2078:
+.LVL2080:
 	.loc 2 1373 0
 	add	w0, w0, 1
 	.loc 2 1382 0
@@ -20220,9 +20240,9 @@ FtlLoadSysInfo:
 	.loc 2 1381 0
 	mov	w27, 19539
 	movk	w27, 0x4654, lsl 16
-.L1583:
+.L1584:
 	.loc 2 1375 0
-	tbz	w22, #31, .L1586
+	tbz	w22, #31, .L1587
 	.loc 2 1388 0
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20230,15 +20250,15 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2079:
-.L1585:
+.LVL2081:
+.L1586:
 	.loc 2 1390 0
 	adrp	x1, .LANCHOR23
 	ldrh	w0, [x24, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L1588
+	bcs	.L1589
 	.loc 2 1390 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20246,18 +20266,18 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2080:
-.L1588:
+.LVL2082:
+.L1589:
 	.loc 2 1392 0 is_stmt 1
 	add	x22, x19, :lo12:.LANCHOR108
-.LVL2081:
+.LVL2083:
 	adrp	x19, .LANCHOR79
 	add	x21, x19, :lo12:.LANCHOR79
 	mov	w2, 48
 	mov	x0, x21
 	ldr	x1, [x22, 8]
 	bl	ftl_memcpy
-.LVL2082:
+.LVL2084:
 	.loc 2 1393 0
 	ldr	x0, [x25, #:lo12:.LANCHOR43]
 	ldrh	w2, [x24, #:lo12:.LANCHOR5]
@@ -20265,7 +20285,7 @@ FtlLoadSysInfo:
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-.LVL2083:
+.LVL2085:
 	.loc 2 1394 0
 	ldrh	w1, [x24, #:lo12:.LANCHOR5]
 	ldr	x0, [x22, 8]
@@ -20278,13 +20298,13 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR1
 	ldr	x0, [x0, #:lo12:.LANCHOR1]
 	bl	ftl_memcpy
-.LVL2084:
+.LVL2086:
 	.loc 2 1396 0
 	ldr	w1, [x19, #:lo12:.LANCHOR79]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1589
+	bne	.L1590
 	.loc 2 1399 0
 	add	x20, x20, :lo12:.LANCHOR81
 	.loc 2 1400 0
@@ -20298,7 +20318,7 @@ FtlLoadSysInfo:
 	strh	w1, [x20, 6]
 	.loc 2 1400 0
 	cmp	w2, w0
-	bne	.L1589
+	bne	.L1590
 	.loc 2 1403 0
 	adrp	x0, .LANCHOR182
 	.loc 2 1404 0
@@ -20335,7 +20355,7 @@ FtlLoadSysInfo:
 	adrp	x3, .LANCHOR80
 	strh	w0, [x3, #:lo12:.LANCHOR80]
 	.loc 2 1412 0
-	bls	.L1590
+	bls	.L1591
 	.loc 2 1412 0 is_stmt 0 discriminator 1
 	adrp	x1, .LANCHOR181
 	adrp	x0, .LC1
@@ -20343,8 +20363,8 @@ FtlLoadSysInfo:
 	add	x1, x1, :lo12:.LANCHOR181
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.LVL2085:
-.L1590:
+.LVL2087:
+.L1591:
 	.loc 2 1414 0 is_stmt 1
 	add	x1, x19, :lo12:.LANCHOR79
 	adrp	x0, .LANCHOR51
@@ -20444,64 +20464,64 @@ FtlLoadSysInfo:
 	adrp	x1, .LANCHOR71
 	ldr	w5, [x1, #:lo12:.LANCHOR71]
 	cmp	w3, w5
-	bls	.L1591
+	bls	.L1592
 	.loc 2 1445 0
 	str	w3, [x1, #:lo12:.LANCHOR71]
-.L1591:
+.L1592:
 	.loc 2 1447 0
 	add	x19, x19, :lo12:.LANCHOR79
 	adrp	x1, .LANCHOR72
 	ldr	w3, [x1, #:lo12:.LANCHOR72]
 	ldr	w2, [x19, 36]
 	cmp	w2, w3
-	bls	.L1592
+	bls	.L1593
 	.loc 2 1448 0
 	str	w2, [x1, #:lo12:.LANCHOR72]
-.L1592:
+.L1593:
 	.loc 2 1450 0
 	mov	w1, 65535
 	cmp	w6, w1
-	beq	.L1593
+	beq	.L1594
 	.loc 2 1451 0
 	add	x0, x0, :lo12:.LANCHOR51
 	bl	make_superblock
-.LVL2086:
-.L1593:
+.LVL2088:
+.L1594:
 	.loc 2 1453 0
 	ldrh	w2, [x21, #:lo12:.LANCHOR52]
 	mov	w1, 65535
 	add	x0, x21, :lo12:.LANCHOR52
 	cmp	w2, w1
-	beq	.L1594
+	beq	.L1595
 	.loc 2 1454 0
 	bl	make_superblock
-.LVL2087:
-.L1594:
+.LVL2089:
+.L1595:
 	.loc 2 1456 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR53]
 	mov	w1, 65535
 	add	x0, x22, :lo12:.LANCHOR53
 	cmp	w2, w1
-	beq	.L1595
+	beq	.L1596
 	.loc 2 1457 0
 	bl	make_superblock
-.LVL2088:
-.L1595:
+.LVL2090:
+.L1596:
 	.loc 2 1459 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR82]
 	mov	w1, 65535
 	add	x0, x20, :lo12:.LANCHOR82
 	cmp	w2, w1
-	beq	.L1596
+	beq	.L1597
 	.loc 2 1460 0
 	bl	make_superblock
-.LVL2089:
-.L1596:
+.LVL2091:
+.L1597:
 	.loc 2 1462 0
 	mov	w0, 0
-	b	.L1580
-.LVL2090:
-.L1586:
+	b	.L1581
+.LVL2092:
+.L1587:
 	.loc 2 1376 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR81]
 	.loc 2 1378 0
@@ -20516,29 +20536,29 @@ FtlLoadSysInfo:
 	.loc 2 1378 0
 	mov	x0, x21
 	bl	FlashReadPages
-.LVL2091:
+.LVL2093:
 	.loc 2 1381 0
 	ldr	w0, [x21]
 	cmn	w0, #1
-	beq	.L1584
+	beq	.L1585
 	.loc 2 1382 0 discriminator 1
 	ldr	x0, [x23, #:lo12:.LANCHOR39]
 	.loc 2 1381 0 discriminator 1
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1584
+	bne	.L1585
 	.loc 2 1383 0
 	ldr	x0, [x26, #:lo12:.LANCHOR109]
 	ldrh	w0, [x0]
 	.loc 2 1382 0
 	cmp	w0, w28
-	beq	.L1585
-.L1584:
+	beq	.L1586
+.L1585:
 	sub	w22, w22, #1
-.LVL2092:
+.LVL2094:
 	sxth	w22, w22
-.LVL2093:
-	b	.L1583
+.LVL2095:
+	b	.L1584
 	.cfi_endproc
 .LFE274:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
@@ -20578,20 +20598,20 @@ FtlSysBlkInit:
 	strh	wzr, [x20, #:lo12:.LANCHOR162]
 	.loc 2 2312 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2094:
+.LVL2096:
 	.loc 2 2313 0
 	bl	FtlScanSysBlk
-.LVL2095:
+.LVL2097:
 	.loc 2 2314 0
 	adrp	x0, .LANCHOR81
 	ldrh	w1, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1603
-.L1605:
+	bne	.L1604
+.L1606:
 	.loc 2 2315 0
 	mov	w23, -1
-.L1602:
+.L1603:
 	.loc 2 2398 0
 	mov	w0, w23
 	ldp	x19, x20, [sp, 16]
@@ -20609,40 +20629,40 @@ FtlSysBlkInit:
 	.cfi_restore 20
 	.cfi_def_cfa 31, 0
 	ret
-.L1603:
+.L1604:
 	.cfi_restore_state
 	.loc 2 2317 0
 	bl	FtlLoadSysInfo
-.LVL2096:
+.LVL2098:
 	mov	w23, w0
-	cbnz	w0, .L1605
+	cbnz	w0, .L1606
 	.loc 2 2320 0
 	bl	FtlLoadMapInfo
-.LVL2097:
+.LVL2099:
 	.loc 2 2321 0
 	bl	FtlLoadVonderInfo
-.LVL2098:
+.LVL2100:
 	.loc 2 2322 0
 	bl	Ftl_load_ext_data
-.LVL2099:
+.LVL2101:
 	.loc 2 2324 0
 	bl	FtlLoadEctTbl
-.LVL2100:
+.LVL2102:
 	.loc 2 2325 0
 	bl	FtlFreeSysBLkSort
-.LVL2101:
+.LVL2103:
 	.loc 2 2327 0
 	bl	SupperBlkListInit
-.LVL2102:
+.LVL2104:
 	.loc 2 2328 0
 	bl	FtlPowerLostRecovery
-.LVL2103:
+.LVL2105:
 	.loc 2 2330 0
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-.LVL2104:
-.LBB299:
-.LBB300:
+.LVL2106:
+.LBB303:
+.LBB304:
 	.loc 2 2332 0
 	adrp	x0, .LANCHOR33
 	ldrh	w2, [x0, #:lo12:.LANCHOR33]
@@ -20652,14 +20672,14 @@ FtlSysBlkInit:
 	.loc 2 2332 0
 	mov	w0, 0
 	add	x1, x1, 4
-.L1606:
-.LVL2105:
+.L1607:
+.LVL2107:
 	cmp	w0, w2
-	bge	.L1611
+	bge	.L1612
 	.loc 2 2333 0
 	ldr	w3, [x1], 16
-	tbz	w3, #31, .L1607
-.L1611:
+	tbz	w3, #31, .L1608
+.L1612:
 	.loc 2 2336 0
 	adrp	x19, .LANCHOR79
 	add	x3, x19, :lo12:.LANCHOR79
@@ -20671,9 +20691,9 @@ FtlSysBlkInit:
 	add	w1, w1, 1
 	strh	w1, [x3, 28]
 	.loc 2 2338 0
-	bge	.L1617
-.LVL2106:
-.L1608:
+	bge	.L1618
+.LVL2108:
+.L1609:
 	.loc 2 2339 0
 	add	x21, x22, :lo12:.LANCHOR51
 	.loc 2 2340 0
@@ -20684,12 +20704,12 @@ FtlSysBlkInit:
 	add	x20, x24, :lo12:.LANCHOR52
 	.loc 2 2339 0
 	bl	FtlSuperblockPowerLostFix
-.LVL2107:
+.LVL2109:
 	.loc 2 2340 0
 	mov	x0, x20
 	bl	FtlSuperblockPowerLostFix
-.LVL2108:
-.LBB301:
+.LVL2110:
+.LBB305:
 	.loc 2 2346 0
 	adrp	x0, .LANCHOR43
 	ldrh	w3, [x21, 4]
@@ -20711,7 +20731,7 @@ FtlSysBlkInit:
 	ldrh	w0, [x24, #:lo12:.LANCHOR52]
 	.loc 2 2349 0
 	strh	wzr, [x21, 4]
-.LVL2109:
+.LVL2111:
 	.loc 2 2352 0
 	ldrh	w4, [x20, 4]
 	lsl	x0, x0, 1
@@ -20725,17 +20745,17 @@ FtlSysBlkInit:
 	strh	w0, [x20, 2]
 	.loc 2 2355 0
 	strh	wzr, [x20, 4]
-.LBE301:
+.LBE305:
 	.loc 2 2359 0
 	adrp	x0, .LANCHOR144
 	add	x0, x0, :lo12:.LANCHOR144
 	bl	FtlMapBlkWriteDump_data
-.LVL2110:
+.LVL2112:
 	.loc 2 2360 0
 	adrp	x0, .LANCHOR149
 	add	x0, x0, :lo12:.LANCHOR149
 	bl	FtlMapBlkWriteDump_data
-.LVL2111:
+.LVL2113:
 	.loc 2 2372 0
 	add	x1, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x1, 30]
@@ -20743,67 +20763,67 @@ FtlSysBlkInit:
 	strh	w0, [x1, 30]
 	.loc 2 2373 0
 	bl	l2p_flush
-.LVL2112:
+.LVL2114:
 	.loc 2 2374 0
 	bl	FtlVpcTblFlush
-.LVL2113:
+.LVL2115:
 	.loc 2 2375 0
 	bl	FtlVpcTblFlush
-.LVL2114:
-	b	.L1612
-.LVL2115:
-.L1607:
+.LVL2116:
+	b	.L1613
+.LVL2117:
+.L1608:
 	.loc 2 2332 0
 	add	w0, w0, 1
-.LVL2116:
-	b	.L1606
-.L1617:
+.LVL2118:
+	b	.L1607
+.L1618:
 	.loc 2 2338 0
 	ldrh	w0, [x20, #:lo12:.LANCHOR162]
-.LVL2117:
-	cbnz	w0, .L1608
-.L1612:
+.LVL2119:
+	cbnz	w0, .L1609
+.L1613:
 	.loc 2 2379 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR51]
 	mov	w1, 65535
 	add	x21, x22, :lo12:.LANCHOR51
 	cmp	w0, w1
-	beq	.L1613
+	beq	.L1614
 	ldrh	w1, [x21, 4]
-	cbnz	w1, .L1613
+	cbnz	w1, .L1614
 	.loc 2 2381 0
 	adrp	x22, .LANCHOR52
 	add	x20, x22, :lo12:.LANCHOR52
 	.loc 2 2380 0
 	ldrh	w1, [x20, 4]
-	cbnz	w1, .L1613
+	cbnz	w1, .L1614
 	.loc 2 2382 0
 	bl	FtlGcRefreshBlock
-.LVL2118:
+.LVL2120:
 	.loc 2 2383 0
 	ldrh	w0, [x22, #:lo12:.LANCHOR52]
 	bl	FtlGcRefreshBlock
-.LVL2119:
+.LVL2121:
 	.loc 2 2384 0
 	mov	x0, x21
 	bl	allocate_new_data_superblock
-.LVL2120:
+.LVL2122:
 	.loc 2 2385 0
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.LVL2121:
-.L1613:
+.LVL2123:
+.L1614:
 	.loc 2 2390 0
 	add	x19, x19, :lo12:.LANCHOR79
 	ldrh	w0, [x19, 28]
 	tst	x0, 31
-	bne	.L1602
+	bne	.L1603
 	.loc 2 2391 0
 	bl	FtlVpcCheckAndModify
-.LVL2122:
-	b	.L1602
-.LBE300:
-.LBE299:
+.LVL2124:
+	b	.L1603
+.LBE304:
+.LBE303:
 	.cfi_endproc
 .LFE292:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
@@ -20850,15 +20870,15 @@ ftl_low_format:
 	str	wzr, [x20, #:lo12:.LANCHOR71]
 	.loc 3 631 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2123:
+.LVL2125:
 	.loc 3 632 0
 	bl	FtlLoadBbt
-.LVL2124:
-	cbz	w0, .L1620
+.LVL2126:
+	cbz	w0, .L1621
 	.loc 3 633 0
 	bl	FtlMakeBbt
-.LVL2125:
-.L1620:
+.LVL2127:
+.L1621:
 	.loc 3 635 0 discriminator 1
 	adrp	x23, .LANCHOR12
 	.loc 3 636 0 discriminator 1
@@ -20878,12 +20898,12 @@ ftl_low_format:
 	.loc 3 637 0 discriminator 1
 	ldr	x5, [x0, #:lo12:.LANCHOR114]
 	mov	w0, 0
-.L1621:
-.LVL2126:
+.L1622:
+.LVL2128:
 	.loc 3 635 0 discriminator 1
 	cmp	w0, w1
-	blt	.L1622
-.LVL2127:
+	blt	.L1623
+.LVL2129:
 	.loc 3 642 0
 	adrp	x21, .LANCHOR5
 	adrp	x22, .LANCHOR6
@@ -20892,32 +20912,32 @@ ftl_low_format:
 	mov	w19, 0
 	.loc 3 642 0
 	ldrh	w25, [x21, #:lo12:.LANCHOR5]
-.LVL2128:
-.L1623:
+.LVL2130:
+.L1624:
 	.loc 3 642 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L1624
+	bhi	.L1625
 	.loc 3 645 0 is_stmt 1
 	adrp	x25, .LANCHOR3
-.LVL2129:
+.LVL2131:
 	sub	w1, w19, #2
 	ldrh	w0, [x25, #:lo12:.LANCHOR3]
 	cmp	w1, w0, lsl 1
-	bgt	.L1625
-.LVL2130:
-.L1629:
+	bgt	.L1626
+.LVL2132:
+.L1630:
 	.loc 3 656 0
 	add	x26, x21, :lo12:.LANCHOR5
 	.loc 3 641 0
 	mov	w19, 0
 	mov	w24, 0
-.L1626:
-.LVL2131:
+.L1627:
+.LVL2133:
 	.loc 3 656 0 discriminator 1
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1630
+	bhi	.L1631
 	.loc 3 658 0
 	adrp	x0, .LANCHOR113
 	ldrh	w1, [x22, #:lo12:.LANCHOR6]
@@ -20943,7 +20963,7 @@ ftl_low_format:
 	mov	w6, 24
 	mul	w6, w4, w6
 	cmp	w19, w6
-	ble	.L1631
+	ble	.L1632
 	.loc 3 664 0
 	sub	w1, w1, w19
 	udiv	w1, w1, w4
@@ -20952,11 +20972,11 @@ ftl_low_format:
 	lsr	w1, w1, 5
 	add	w1, w1, 24
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1631:
+.L1632:
 	.loc 3 668 0
 	adrp	x1, .LANCHOR15
 	ldrh	w1, [x1, #:lo12:.LANCHOR15]
-	cbz	w1, .L1633
+	cbz	w1, .L1634
 	.loc 3 669 0
 	ldrh	w6, [x2, #:lo12:.LANCHOR80]
 	add	w6, w6, w1, lsr 1
@@ -20964,7 +20984,7 @@ ftl_low_format:
 	.loc 3 670 0
 	mul	w6, w1, w4
 	cmp	w19, w6
-	bge	.L1633
+	bge	.L1634
 	.loc 3 672 0
 	add	w1, w1, 32
 	.loc 3 671 0
@@ -20972,14 +20992,14 @@ ftl_low_format:
 	.loc 3 672 0
 	add	w1, w0, w1
 	strh	w1, [x2, #:lo12:.LANCHOR80]
-.L1633:
+.L1634:
 	.loc 3 677 0
 	ldrh	w1, [x2, #:lo12:.LANCHOR80]
 	adrp	x25, .LANCHOR182
 	ldr	w0, [x3, #:lo12:.LANCHOR62]
 	.loc 3 687 0
 	adrp	x24, .LANCHOR43
-.LVL2132:
+.LVL2134:
 	.loc 3 677 0
 	sub	w0, w0, w1
 	.loc 3 678 0
@@ -21002,14 +21022,14 @@ ftl_low_format:
 	str	w0, [x1, #:lo12:.LANCHOR34]
 	.loc 3 684 0
 	bl	FtlBbmTblFlush
-.LVL2133:
+.LVL2135:
 	.loc 3 687 0
 	ldr	x0, [x24, #:lo12:.LANCHOR43]
 	mov	w1, 0
 	ldrh	w2, [x22, #:lo12:.LANCHOR6]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-.LVL2134:
+.LVL2136:
 	.loc 3 688 0
 	adrp	x0, .LANCHOR60
 	.loc 3 689 0
@@ -21033,7 +21053,7 @@ ftl_low_format:
 	.loc 3 694 0
 	adrp	x0, .LANCHOR51
 	add	x19, x0, :lo12:.LANCHOR51
-.LVL2135:
+.LVL2137:
 	.loc 3 696 0
 	strh	wzr, [x0, #:lo12:.LANCHOR51]
 	.loc 3 697 0
@@ -21049,16 +21069,16 @@ ftl_low_format:
 	strb	wzr, [x19, 6]
 	.loc 3 698 0
 	bl	ftl_memset
-.LVL2136:
-.L1635:
+.LVL2138:
+.L1636:
 	.loc 3 701 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2137:
+.LVL2139:
 	.loc 3 702 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1636
+	cbnz	w1, .L1637
 	.loc 3 705 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21068,101 +21088,101 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 707 0
-	b	.L1635
-.LVL2138:
-.L1622:
+	b	.L1636
+.LVL2140:
+.L1623:
 	.loc 3 636 0 discriminator 3
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
 	.loc 3 635 0 discriminator 3
 	add	w0, w0, 1
-.LVL2139:
+.LVL2141:
 	and	w0, w0, 65535
-.LVL2140:
+.LVL2142:
 	.loc 3 636 0 discriminator 3
 	str	w2, [x4, x3]
 	.loc 3 637 0 discriminator 3
 	str	w6, [x5, x3]
-	b	.L1621
-.LVL2141:
-.L1624:
+	b	.L1622
+.LVL2143:
+.L1625:
 	.loc 3 643 0 discriminator 3
 	mov	w0, w25
 	mov	w1, 1
 	.loc 3 642 0 discriminator 3
 	add	w25, w25, 1
-.LVL2142:
+.LVL2144:
 	.loc 3 643 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2143:
+.LVL2145:
 	add	w19, w19, w0
-.LVL2144:
+.LVL2146:
 	.loc 3 642 0 discriminator 3
 	and	w25, w25, 65535
 	.loc 3 643 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2145:
-	b	.L1623
-.LVL2146:
-.L1625:
+.LVL2147:
+	b	.L1624
+.LVL2148:
+.L1626:
 	.loc 3 647 0
 	udiv	w0, w19, w0
 	adrp	x1, .LANCHOR31
 	ldr	w19, [x1, #:lo12:.LANCHOR31]
-.LVL2147:
+.LVL2149:
 	add	w0, w0, w19
 	bl	FtlSysBlkNumInit
-.LVL2148:
+.LVL2150:
 	.loc 3 648 0
 	ldrh	w0, [x24, #:lo12:.LANCHOR4]
 	.loc 3 650 0
 	add	x24, x22, :lo12:.LANCHOR6
 	.loc 3 648 0
 	bl	FtlFreeSysBlkQueueInit
-.LVL2149:
+.LVL2151:
 	.loc 3 650 0
 	ldrh	w19, [x21, #:lo12:.LANCHOR5]
-.LVL2150:
-.L1627:
+.LVL2152:
+.L1628:
 	.loc 3 650 0 is_stmt 0 discriminator 1
 	ldrh	w0, [x24]
 	cmp	w0, w19
-	bls	.L1629
+	bls	.L1630
 	.loc 3 651 0 is_stmt 1 discriminator 3
 	mov	w0, w19
 	.loc 3 650 0 discriminator 3
 	add	w19, w19, 1
-.LVL2151:
+.LVL2153:
 	.loc 3 651 0 discriminator 3
 	mov	w1, 1
 	.loc 3 650 0 discriminator 3
 	and	w19, w19, 65535
 	.loc 3 651 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2152:
-	b	.L1627
-.LVL2153:
-.L1630:
+.LVL2154:
+	b	.L1628
+.LVL2155:
+.L1631:
 	.loc 3 657 0 discriminator 3
 	mov	w0, w24
 	mov	w1, 0
 	.loc 3 656 0 discriminator 3
 	add	w24, w24, 1
-.LVL2154:
+.LVL2156:
 	.loc 3 657 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
-.LVL2155:
+.LVL2157:
 	add	w19, w19, w0
-.LVL2156:
+.LVL2158:
 	.loc 3 656 0 discriminator 3
 	and	w24, w24, 65535
 	.loc 3 657 0 discriminator 3
 	and	w19, w19, 65535
-.LVL2157:
-	b	.L1626
-.LVL2158:
-.L1636:
+.LVL2159:
+	b	.L1627
+.LVL2160:
+.L1637:
 	.loc 3 709 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 710 0
@@ -21197,15 +21217,15 @@ ftl_low_format:
 	strb	wzr, [x0, 6]
 	.loc 3 715 0
 	strb	w1, [x0, 8]
-.L1637:
+.L1638:
 	.loc 3 717 0
 	mov	x0, x19
 	bl	make_superblock
-.LVL2159:
+.LVL2161:
 	.loc 3 718 0
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L1638
+	cbnz	w1, .L1639
 	.loc 3 721 0
 	ldr	x1, [x24, #:lo12:.LANCHOR43]
 	ubfiz	x0, x0, 1, 16
@@ -21215,8 +21235,8 @@ ftl_low_format:
 	add	w0, w0, 1
 	strh	w0, [x19]
 	.loc 3 723 0
-	b	.L1637
-.L1638:
+	b	.L1638
+.L1639:
 	.loc 3 725 0
 	ldr	w1, [x20, #:lo12:.LANCHOR71]
 	.loc 3 726 0
@@ -21237,7 +21257,7 @@ ftl_low_format:
 	strh	w4, [x0, #:lo12:.LANCHOR53]
 	.loc 3 730 0
 	bl	FtlFreeSysBlkQueueOut
-.LVL2160:
+.LVL2162:
 	adrp	x2, .LANCHOR81
 	add	x1, x2, :lo12:.LANCHOR81
 	strh	w0, [x2, #:lo12:.LANCHOR81]
@@ -21256,16 +21276,16 @@ ftl_low_format:
 	str	w0, [x20, #:lo12:.LANCHOR71]
 	.loc 3 735 0
 	bl	FtlVpcTblFlush
-.LVL2161:
+.LVL2163:
 	.loc 3 736 0
 	bl	FtlSysBlkInit
-.LVL2162:
-	cbnz	w0, .L1639
+.LVL2164:
+	cbnz	w0, .L1640
 	.loc 3 737 0
 	adrp	x0, .LANCHOR88
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR88]
-.L1639:
+.L1640:
 	.loc 3 739 0
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
@@ -21296,7 +21316,7 @@ sftl_init:
 .LFB211:
 	.loc 3 743 0
 	.cfi_startproc
-.LVL2163:
+.LVL2165:
 	stp	x29, x30, [sp, -32]!
 	.cfi_def_cfa_offset 32
 	.cfi_offset 29, -32
@@ -21318,32 +21338,32 @@ sftl_init:
 	adrp	x0, .LC71
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.LVL2164:
+.LVL2166:
 	.loc 3 750 0
 	adrp	x0, .LANCHOR0
 	add	x0, x0, :lo12:.LANCHOR0
 	bl	FtlConstantsInit
-.LVL2165:
+.LVL2167:
 	.loc 3 751 0
 	bl	FtlMemInit
-.LVL2166:
+.LVL2168:
 	.loc 3 752 0
 	bl	FtlVariablesInit
-.LVL2167:
+.LVL2169:
 	.loc 3 753 0
 	adrp	x0, .LANCHOR4
 	ldrh	w0, [x0, #:lo12:.LANCHOR4]
 	bl	FtlFreeSysBlkQueueInit
-.LVL2168:
+.LVL2170:
 .LDL2:
 	.loc 3 756 0
 	bl	FtlLoadBbt
-.LVL2169:
-	cbnz	w0, .L1648
+.LVL2171:
+	cbnz	w0, .L1649
 	.loc 3 767 0
 	bl	FtlSysBlkInit
-.LVL2170:
-	cbnz	w0, .L1648
+.LVL2172:
+	cbnz	w0, .L1649
 	.loc 3 779 0
 	mov	w0, 1
 	str	w0, [x19, #:lo12:.LANCHOR88]
@@ -21351,23 +21371,23 @@ sftl_init:
 	adrp	x0, .LANCHOR48
 	ldrh	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 15
-	bhi	.L1648
+	bhi	.L1649
 	mov	w19, 8129
-.L1647:
-.LVL2171:
-.LBB302:
+.L1648:
+.LVL2173:
+.LBB306:
 	.loc 3 786 0 discriminator 3
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.LVL2172:
+.LVL2174:
 	.loc 3 785 0 discriminator 3
 	subs	w19, w19, #1
-.LVL2173:
-	bne	.L1647
-.LVL2174:
-.L1648:
-.LBE302:
+.LVL2175:
+	bne	.L1648
+.LVL2176:
+.L1649:
+.LBE306:
 	.loc 3 794 0
 	mov	w0, 0
 	ldr	x19, [sp, 16]
@@ -21385,16 +21405,16 @@ sftl_init:
 	.global	ftl_memcmp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
-.LFB347:
-	.loc 1 248 0
+.LFB348:
+	.loc 1 252 0
 	.cfi_startproc
-.LVL2175:
-	.loc 1 249 0
+.LVL2177:
+	.loc 1 253 0
 	uxtw	x2, w2
 	b	memcmp
-.LVL2176:
+.LVL2178:
 	.cfi_endproc
-.LFE347:
+.LFE348:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.global	ftl_temp_buf
 	.global	g_nand_ops
@@ -22800,243 +22820,243 @@ power_up_flag:
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-	.section	.rodata.__func__.6105,"a",@progbits
+	.section	.rodata.__func__.6104,"a",@progbits
 	.align	3
 	.set	.LANCHOR138,. + 0
-	.type	__func__.6105, %object
-	.size	__func__.6105, 11
-__func__.6105:
+	.type	__func__.6104, %object
+	.size	__func__.6104, 11
+__func__.6104:
 	.string	"FtlMemInit"
-	.section	.rodata.__func__.6229,"a",@progbits
+	.section	.rodata.__func__.6228,"a",@progbits
 	.align	3
 	.set	.LANCHOR170,. + 0
-	.type	__func__.6229, %object
-	.size	__func__.6229, 13
-__func__.6229:
+	.type	__func__.6228, %object
+	.size	__func__.6228, 13
+__func__.6228:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.6257,"a",@progbits
+	.section	.rodata.__func__.6256,"a",@progbits
 	.align	3
 	.set	.LANCHOR180,. + 0
-	.type	__func__.6257, %object
-	.size	__func__.6257, 9
-__func__.6257:
+	.type	__func__.6256, %object
+	.size	__func__.6256, 9
+__func__.6256:
 	.string	"FtlWrite"
-	.section	.rodata.__func__.6321,"a",@progbits
+	.section	.rodata.__func__.6320,"a",@progbits
 	.align	3
 	.set	.LANCHOR139,. + 0
-	.type	__func__.6321, %object
-	.size	__func__.6321, 14
-__func__.6321:
+	.type	__func__.6320, %object
+	.size	__func__.6320, 14
+__func__.6320:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.6364,"a",@progbits
+	.section	.rodata.__func__.6363,"a",@progbits
 	.align	3
 	.set	.LANCHOR165,. + 0
-	.type	__func__.6364, %object
-	.size	__func__.6364, 11
-__func__.6364:
+	.type	__func__.6363, %object
+	.size	__func__.6363, 11
+__func__.6363:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.6487,"a",@progbits
+	.section	.rodata.__func__.6486,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.6487, %object
-	.size	__func__.6487, 17
-__func__.6487:
+	.type	__func__.6486, %object
+	.size	__func__.6486, 17
+__func__.6486:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.6492,"a",@progbits
+	.section	.rodata.__func__.6491,"a",@progbits
 	.align	3
 	.set	.LANCHOR46,. + 0
-	.type	__func__.6492, %object
-	.size	__func__.6492, 17
-__func__.6492:
+	.type	__func__.6491, %object
+	.size	__func__.6491, 17
+__func__.6491:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.6522,"a",@progbits
+	.section	.rodata.__func__.6521,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.6522, %object
-	.size	__func__.6522, 17
-__func__.6522:
+	.type	__func__.6521, %object
+	.size	__func__.6521, 17
+__func__.6521:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.6554,"a",@progbits
+	.section	.rodata.__func__.6553,"a",@progbits
 	.align	3
 	.set	.LANCHOR54,. + 0
-	.type	__func__.6554, %object
-	.size	__func__.6554, 22
-__func__.6554:
+	.type	__func__.6553, %object
+	.size	__func__.6553, 22
+__func__.6553:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.6563,"a",@progbits
+	.section	.rodata.__func__.6562,"a",@progbits
 	.align	3
 	.set	.LANCHOR140,. + 0
-	.type	__func__.6563, %object
-	.size	__func__.6563, 16
-__func__.6563:
+	.type	__func__.6562, %object
+	.size	__func__.6562, 16
+__func__.6562:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.6595,"a",@progbits
+	.section	.rodata.__func__.6594,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.6595, %object
-	.size	__func__.6595, 26
-__func__.6595:
+	.type	__func__.6594, %object
+	.size	__func__.6594, 26
+__func__.6594:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.6606,"a",@progbits
+	.section	.rodata.__func__.6605,"a",@progbits
 	.align	3
 	.set	.LANCHOR143,. + 0
-	.type	__func__.6606, %object
-	.size	__func__.6606, 15
-__func__.6606:
+	.type	__func__.6605, %object
+	.size	__func__.6605, 15
+__func__.6605:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.6620,"a",@progbits
+	.section	.rodata.__func__.6619,"a",@progbits
 	.align	3
 	.set	.LANCHOR141,. + 0
-	.type	__func__.6620, %object
-	.size	__func__.6620, 31
-__func__.6620:
+	.type	__func__.6619, %object
+	.size	__func__.6619, 31
+__func__.6619:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.6634,"a",@progbits
+	.section	.rodata.__func__.6633,"a",@progbits
 	.align	3
 	.set	.LANCHOR142,. + 0
-	.type	__func__.6634, %object
-	.size	__func__.6634, 16
-__func__.6634:
+	.type	__func__.6633, %object
+	.size	__func__.6633, 16
+__func__.6633:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.6659,"a",@progbits
+	.section	.rodata.__func__.6658,"a",@progbits
 	.align	3
 	.set	.LANCHOR58,. + 0
-	.type	__func__.6659, %object
-	.size	__func__.6659, 22
-__func__.6659:
+	.type	__func__.6658, %object
+	.size	__func__.6658, 22
+__func__.6658:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.6676,"a",@progbits
+	.section	.rodata.__func__.6675,"a",@progbits
 	.align	3
 	.set	.LANCHOR145,. + 0
-	.type	__func__.6676, %object
-	.size	__func__.6676, 9
-__func__.6676:
+	.type	__func__.6675, %object
+	.size	__func__.6675, 9
+__func__.6675:
 	.string	"log2phys"
-	.section	.rodata.__func__.6749,"a",@progbits
+	.section	.rodata.__func__.6748,"a",@progbits
 	.align	3
 	.set	.LANCHOR167,. + 0
-	.type	__func__.6749, %object
-	.size	__func__.6749, 15
-__func__.6749:
+	.type	__func__.6748, %object
+	.size	__func__.6748, 15
+__func__.6748:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.6771,"a",@progbits
+	.section	.rodata.__func__.6770,"a",@progbits
 	.align	3
 	.set	.LANCHOR148,. + 0
-	.type	__func__.6771, %object
-	.size	__func__.6771, 14
-__func__.6771:
+	.type	__func__.6770, %object
+	.size	__func__.6770, 14
+__func__.6770:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.6828,"a",@progbits
+	.section	.rodata.__func__.6827,"a",@progbits
 	.align	3
 	.set	.LANCHOR181,. + 0
-	.type	__func__.6828, %object
-	.size	__func__.6828, 15
-__func__.6828:
+	.type	__func__.6827, %object
+	.size	__func__.6827, 15
+__func__.6827:
 	.string	"FtlLoadSysInfo"
-	.section	.rodata.__func__.6891,"a",@progbits
+	.section	.rodata.__func__.6890,"a",@progbits
 	.align	3
 	.set	.LANCHOR146,. + 0
-	.type	__func__.6891, %object
-	.size	__func__.6891, 16
-__func__.6891:
+	.type	__func__.6890, %object
+	.size	__func__.6890, 16
+__func__.6890:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.6925,"a",@progbits
+	.section	.rodata.__func__.6924,"a",@progbits
 	.align	3
 	.set	.LANCHOR161,. + 0
-	.type	__func__.6925, %object
-	.size	__func__.6925, 22
-__func__.6925:
+	.type	__func__.6924, %object
+	.size	__func__.6924, 22
+__func__.6924:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.6982,"a",@progbits
+	.section	.rodata.__func__.6981,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.6982, %object
-	.size	__func__.6982, 16
-__func__.6982:
+	.type	__func__.6981, %object
+	.size	__func__.6981, 16
+__func__.6981:
 	.string	"make_superblock"
-	.section	.rodata.__func__.7003,"a",@progbits
+	.section	.rodata.__func__.7002,"a",@progbits
 	.align	3
 	.set	.LANCHOR155,. + 0
-	.type	__func__.7003, %object
-	.size	__func__.7003, 18
-__func__.7003:
+	.type	__func__.7002, %object
+	.size	__func__.7002, 18
+__func__.7002:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.7028,"a",@progbits
+	.section	.rodata.__func__.7027,"a",@progbits
 	.align	3
 	.set	.LANCHOR168,. + 0
-	.type	__func__.7028, %object
-	.size	__func__.7028, 21
-__func__.7028:
+	.type	__func__.7027, %object
+	.size	__func__.7027, 21
+__func__.7027:
 	.string	"FtlVpcCheckAndModify"
-	.section	.rodata.__func__.7044,"a",@progbits
+	.section	.rodata.__func__.7043,"a",@progbits
 	.align	3
 	.set	.LANCHOR156,. + 0
-	.type	__func__.7044, %object
-	.size	__func__.7044, 14
-__func__.7044:
+	.type	__func__.7043, %object
+	.size	__func__.7043, 14
+__func__.7043:
 	.string	"ftl_check_vpc"
-	.section	.rodata.__func__.7128,"a",@progbits
+	.section	.rodata.__func__.7127,"a",@progbits
 	.align	3
 	.set	.LANCHOR158,. + 0
-	.type	__func__.7128, %object
-	.size	__func__.7128, 25
-__func__.7128:
+	.type	__func__.7127, %object
+	.size	__func__.7127, 25
+__func__.7127:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.7149,"a",@progbits
+	.section	.rodata.__func__.7148,"a",@progbits
 	.align	3
 	.set	.LANCHOR169,. + 0
-	.type	__func__.7149, %object
-	.size	__func__.7149, 29
-__func__.7149:
+	.type	__func__.7148, %object
+	.size	__func__.7148, 29
+__func__.7148:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.7156,"a",@progbits
+	.section	.rodata.__func__.7155,"a",@progbits
 	.align	3
 	.set	.LANCHOR90,. + 0
-	.type	__func__.7156, %object
-	.size	__func__.7156, 19
-__func__.7156:
+	.type	__func__.7155, %object
+	.size	__func__.7155, 19
+__func__.7155:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.7169,"a",@progbits
+	.section	.rodata.__func__.7168,"a",@progbits
 	.align	3
 	.set	.LANCHOR159,. + 0
-	.type	__func__.7169, %object
-	.size	__func__.7169, 16
-__func__.7169:
+	.type	__func__.7168, %object
+	.size	__func__.7168, 16
+__func__.7168:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.7176,"a",@progbits
+	.section	.rodata.__func__.7175,"a",@progbits
 	.align	3
 	.set	.LANCHOR160,. + 0
-	.type	__func__.7176, %object
-	.size	__func__.7176, 20
-__func__.7176:
+	.type	__func__.7175, %object
+	.size	__func__.7175, 20
+__func__.7175:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.7246,"a",@progbits
+	.section	.rodata.__func__.7245,"a",@progbits
 	.align	3
 	.set	.LANCHOR173,. + 0
-	.type	__func__.7246, %object
-	.size	__func__.7246, 19
-__func__.7246:
+	.type	__func__.7245, %object
+	.size	__func__.7245, 19
+__func__.7245:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.7352,"a",@progbits
+	.section	.rodata.__func__.7351,"a",@progbits
 	.align	3
 	.set	.LANCHOR177,. + 0
-	.type	__func__.7352, %object
-	.size	__func__.7352, 23
-__func__.7352:
+	.type	__func__.7351, %object
+	.size	__func__.7351, 23
+__func__.7351:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.7613,"a",@progbits
+	.section	.rodata.__func__.7615,"a",@progbits
 	.align	3
 	.set	.LANCHOR106,. + 0
-	.type	__func__.7613, %object
-	.size	__func__.7613, 15
-__func__.7613:
+	.type	__func__.7615, %object
+	.size	__func__.7615, 15
+__func__.7615:
 	.string	"FlashReadPages"
-	.section	.rodata.__func__.7630,"a",@progbits
+	.section	.rodata.__func__.7632,"a",@progbits
 	.align	3
 	.set	.LANCHOR110,. + 0
-	.type	__func__.7630, %object
-	.size	__func__.7630, 15
-__func__.7630:
+	.type	__func__.7632, %object
+	.size	__func__.7632, 15
+__func__.7632:
 	.string	"FlashProgPages"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
 .LC98:
@@ -23081,43 +23101,42 @@ __func__.7630:
 	.string	"%s\n"
 	.text
 .Letext0:
-	.file 6 "include/common.h"
-	.file 7 "./arch/arm/include/asm/types.h"
-	.file 8 "include/linux/types.h"
-	.file 9 "include/errno.h"
-	.file 10 "include/linux/string.h"
-	.file 11 "include/efi.h"
-	.file 12 "include/ide.h"
-	.file 13 "include/part.h"
-	.file 14 "include/flash.h"
-	.file 15 "include/lmb.h"
-	.file 16 "include/asm-generic/u-boot.h"
-	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
-	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
-	.file 19 "include/libfdt_env.h"
-	.file 20 "include/image.h"
-	.file 21 "include/net.h"
-	.file 22 "include/dm/uclass-id.h"
-	.file 23 "drivers/rkflash/rksftl/sftl_inc.h"
-	.file 24 "drivers/rkflash/rksftl/flash_com.h"
-	.file 25 "drivers/rkflash/rksftl/sftl_struct.h"
-	.file 26 "drivers/rkflash/rksftl/sftl_global.h"
-	.file 27 "include/malloc.h"
-	.file 28 "include/linux/compat.h"
+	.file 7 "include/common.h"
+	.file 8 "./arch/arm/include/asm/types.h"
+	.file 9 "include/linux/types.h"
+	.file 10 "include/errno.h"
+	.file 11 "include/linux/string.h"
+	.file 12 "include/efi.h"
+	.file 13 "include/ide.h"
+	.file 14 "include/part.h"
+	.file 15 "include/flash.h"
+	.file 16 "include/lmb.h"
+	.file 17 "include/asm-generic/u-boot.h"
+	.file 18 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 19 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 20 "include/libfdt_env.h"
+	.file 21 "include/image.h"
+	.file 22 "include/net.h"
+	.file 23 "include/dm/uclass-id.h"
+	.file 24 "drivers/rkflash/rksftl/sftl_inc.h"
+	.file 25 "drivers/rkflash/rksftl/flash_com.h"
+	.file 26 "drivers/rkflash/rksftl/sftl_struct.h"
+	.file 27 "drivers/rkflash/rksftl/sftl_global.h"
+	.file 28 "include/malloc.h"
 	.file 29 "include/stdio.h"
 	.file 30 "include/vsprintf.h"
 	.file 31 "include/log.h"
 	.section	.debug_info,"",@progbits
 .Ldebug_info0:
-	.4byte	0xa8ec
+	.4byte	0xa973
 	.2byte	0x4
 	.4byte	.Ldebug_abbrev0
 	.byte	0x8
 	.uleb128 0x1
-	.4byte	.LASF880
-	.byte	0xc
-	.4byte	.LASF881
 	.4byte	.LASF882
+	.byte	0xc
+	.4byte	.LASF883
+	.4byte	.LASF884
 	.4byte	.Ldebug_ranges0+0x330
 	.8byte	0
 	.4byte	.Ldebug_line0
@@ -23131,7 +23150,7 @@ __func__.7630:
 	.4byte	.LASF1
 	.uleb128 0x3
 	.4byte	.LASF5
-	.byte	0x6
+	.byte	0x7
 	.byte	0xd
 	.4byte	0x42
 	.uleb128 0x2
@@ -23144,7 +23163,7 @@ __func__.7630:
 	.4byte	.LASF3
 	.uleb128 0x4
 	.4byte	.LASF20
-	.byte	0x9
+	.byte	0xa
 	.byte	0xc
 	.4byte	0x5b
 	.uleb128 0x5
@@ -23157,7 +23176,7 @@ __func__.7630:
 	.4byte	.LASF4
 	.uleb128 0x3
 	.4byte	.LASF6
-	.byte	0x7
+	.byte	0x8
 	.byte	0xc
 	.4byte	0x42
 	.uleb128 0x2
@@ -23166,7 +23185,7 @@ __func__.7630:
 	.4byte	.LASF7
 	.uleb128 0x3
 	.4byte	.LASF8
-	.byte	0x7
+	.byte	0x8
 	.byte	0x12
 	.4byte	0x30
 	.uleb128 0x2
@@ -23179,34 +23198,34 @@ __func__.7630:
 	.4byte	.LASF10
 	.uleb128 0x6
 	.string	"u8"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x1f
 	.4byte	0x42
 	.uleb128 0x7
 	.4byte	0x94
 	.uleb128 0x6
 	.string	"u16"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x22
 	.4byte	0x29
 	.uleb128 0x6
 	.string	"s32"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x24
 	.4byte	0x5b
 	.uleb128 0x6
 	.string	"u32"
-	.byte	0x7
+	.byte	0x8
 	.byte	0x25
 	.4byte	0x30
 	.uleb128 0x3
 	.4byte	.LASF11
-	.byte	0x7
+	.byte	0x8
 	.byte	0x31
 	.4byte	0x8d
 	.uleb128 0x3
 	.4byte	.LASF12
-	.byte	0x7
+	.byte	0x8
 	.byte	0x32
 	.4byte	0x8d
 	.uleb128 0x2
@@ -23231,29 +23250,29 @@ __func__.7630:
 	.4byte	0xe7
 	.uleb128 0x3
 	.4byte	.LASF16
-	.byte	0x8
+	.byte	0x9
 	.byte	0x59
 	.4byte	0x29
 	.uleb128 0x3
 	.4byte	.LASF17
-	.byte	0x8
+	.byte	0x9
 	.byte	0x5b
 	.4byte	0x49
 	.uleb128 0x3
 	.4byte	.LASF18
-	.byte	0x8
+	.byte	0x9
 	.byte	0x69
 	.4byte	0x69
 	.uleb128 0x3
 	.4byte	.LASF19
-	.byte	0x8
+	.byte	0x9
 	.byte	0x97
 	.4byte	0x7b
 	.uleb128 0x9
 	.byte	0x8
 	.uleb128 0x4
 	.4byte	.LASF21
-	.byte	0xa
+	.byte	0xb
 	.byte	0xb
 	.4byte	0xfa
 	.uleb128 0x2
@@ -23267,17 +23286,17 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF23
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x140
 	.4byte	0x140
 	.uleb128 0xc
 	.4byte	.LASF24
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x140
 	.uleb128 0xc
 	.4byte	.LASF25
-	.byte	0xb
+	.byte	0xc
 	.2byte	0x143
 	.4byte	0x140
 	.uleb128 0x8
@@ -23291,7 +23310,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF26
-	.byte	0xc
+	.byte	0xd
 	.byte	0x10
 	.4byte	0x176
 	.uleb128 0xa
@@ -23304,18 +23323,18 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF29
 	.byte	0x10
-	.byte	0xd
+	.byte	0xe
 	.byte	0xf
 	.4byte	0x1c1
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0xd
+	.byte	0xe
 	.byte	0x10
 	.4byte	0xfa
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF28
-	.byte	0xd
+	.byte	0xe
 	.byte	0x11
 	.4byte	0x1da
 	.byte	0x8
@@ -23342,41 +23361,41 @@ __func__.7630:
 	.4byte	0x1e0
 	.uleb128 0x4
 	.4byte	.LASF29
-	.byte	0xd
+	.byte	0xe
 	.byte	0xcd
 	.4byte	0x1eb
 	.uleb128 0x13
 	.2byte	0x1218
-	.byte	0xe
+	.byte	0xf
 	.byte	0x13
 	.4byte	0x242
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xe
+	.byte	0xf
 	.byte	0x14
 	.4byte	0x10b
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF31
-	.byte	0xe
+	.byte	0xf
 	.byte	0x15
 	.4byte	0x100
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF32
-	.byte	0xe
+	.byte	0xf
 	.byte	0x16
 	.4byte	0x10b
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0xe
+	.byte	0xf
 	.byte	0x17
 	.4byte	0x242
 	.byte	0x18
 	.uleb128 0x14
 	.4byte	.LASF34
-	.byte	0xe
+	.byte	0xf
 	.byte	0x18
 	.4byte	0x253
 	.2byte	0x1018
@@ -23397,7 +23416,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF35
-	.byte	0xe
+	.byte	0xf
 	.byte	0x32
 	.4byte	0x1fb
 	.uleb128 0xa
@@ -23407,7 +23426,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF36
-	.byte	0xe
+	.byte	0xf
 	.byte	0x34
 	.4byte	0x26f
 	.uleb128 0x2
@@ -23417,18 +23436,18 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF38
 	.byte	0x10
-	.byte	0xf
+	.byte	0x10
 	.byte	0x10
 	.4byte	0x2b1
 	.uleb128 0x10
 	.4byte	.LASF39
-	.byte	0xf
+	.byte	0x10
 	.byte	0x11
 	.4byte	0xc4
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x12
 	.4byte	0xcf
 	.byte	0x8
@@ -23436,24 +23455,24 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF40
 	.byte	0xa0
-	.byte	0xf
+	.byte	0x10
 	.byte	0x15
 	.4byte	0x2e2
 	.uleb128 0x16
 	.string	"cnt"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x16
 	.4byte	0x49
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0xf
+	.byte	0x10
 	.byte	0x17
 	.4byte	0xcf
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF41
-	.byte	0xf
+	.byte	0x10
 	.byte	0x18
 	.4byte	0x2e2
 	.byte	0x10
@@ -23468,41 +23487,41 @@ __func__.7630:
 	.uleb128 0x17
 	.string	"lmb"
 	.2byte	0x140
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1b
 	.4byte	0x318
 	.uleb128 0x10
 	.4byte	.LASF42
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1c
 	.4byte	0x2b1
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0xf
+	.byte	0x10
 	.byte	0x1d
 	.4byte	0x2b1
 	.byte	0xa0
 	.byte	0
 	.uleb128 0x18
 	.string	"lmb"
-	.byte	0xf
+	.byte	0x10
 	.byte	0x20
 	.4byte	0x2f2
 	.uleb128 0x19
 	.byte	0x10
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5a
 	.4byte	0x344
 	.uleb128 0x10
 	.4byte	.LASF33
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5b
 	.4byte	0xc4
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF30
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5c
 	.4byte	0xcf
 	.byte	0x8
@@ -23510,120 +23529,120 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF44
 	.byte	0xa8
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1b
 	.4byte	0x435
 	.uleb128 0x10
 	.4byte	.LASF45
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1c
 	.4byte	0x49
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF46
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1d
 	.4byte	0xcf
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF47
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1e
 	.4byte	0x49
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF48
-	.byte	0x10
+	.byte	0x11
 	.byte	0x1f
 	.4byte	0x49
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF49
-	.byte	0x10
+	.byte	0x11
 	.byte	0x20
 	.4byte	0x49
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF50
-	.byte	0x10
+	.byte	0x11
 	.byte	0x21
 	.4byte	0x49
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF51
-	.byte	0x10
+	.byte	0x11
 	.byte	0x22
 	.4byte	0x49
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF52
-	.byte	0x10
+	.byte	0x11
 	.byte	0x24
 	.4byte	0x49
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF53
-	.byte	0x10
+	.byte	0x11
 	.byte	0x25
 	.4byte	0x49
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF54
-	.byte	0x10
+	.byte	0x11
 	.byte	0x26
 	.4byte	0x49
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF55
-	.byte	0x10
+	.byte	0x11
 	.byte	0x31
 	.4byte	0x49
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF56
-	.byte	0x10
+	.byte	0x11
 	.byte	0x32
 	.4byte	0x49
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF57
-	.byte	0x10
+	.byte	0x11
 	.byte	0x33
 	.4byte	0x18c
 	.byte	0x60
 	.uleb128 0x10
 	.4byte	.LASF58
-	.byte	0x10
+	.byte	0x11
 	.byte	0x34
 	.4byte	0x29
 	.byte	0x66
 	.uleb128 0x10
 	.4byte	.LASF59
-	.byte	0x10
+	.byte	0x11
 	.byte	0x35
 	.4byte	0x49
 	.byte	0x68
 	.uleb128 0x10
 	.4byte	.LASF60
-	.byte	0x10
+	.byte	0x11
 	.byte	0x36
 	.4byte	0x49
 	.byte	0x70
 	.uleb128 0x10
 	.4byte	.LASF61
-	.byte	0x10
+	.byte	0x11
 	.byte	0x57
 	.4byte	0x10b
 	.byte	0x78
 	.uleb128 0x10
 	.4byte	.LASF62
-	.byte	0x10
+	.byte	0x11
 	.byte	0x58
 	.4byte	0x10b
 	.byte	0x80
 	.uleb128 0x10
 	.4byte	.LASF63
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5d
 	.4byte	0x435
 	.byte	0x88
@@ -23637,114 +23656,114 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x3
 	.4byte	.LASF64
-	.byte	0x10
+	.byte	0x11
 	.byte	0x5f
 	.4byte	0x344
 	.uleb128 0x4
 	.4byte	.LASF65
-	.byte	0x11
+	.byte	0x12
 	.byte	0x13
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF66
-	.byte	0x11
+	.byte	0x12
 	.byte	0x14
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF67
-	.byte	0x11
+	.byte	0x12
 	.byte	0x15
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF68
-	.byte	0x11
+	.byte	0x12
 	.byte	0x16
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF69
-	.byte	0x11
+	.byte	0x12
 	.byte	0x17
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF70
-	.byte	0x11
+	.byte	0x12
 	.byte	0x18
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF71
-	.byte	0x11
+	.byte	0x12
 	.byte	0x19
 	.4byte	0x10b
 	.uleb128 0xf
 	.4byte	.LASF72
 	.byte	0x28
-	.byte	0x12
+	.byte	0x13
 	.byte	0x39
 	.4byte	0x522
 	.uleb128 0x10
 	.4byte	.LASF73
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3a
 	.4byte	0x533
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF74
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3b
 	.4byte	0x533
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF75
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3c
 	.4byte	0x533
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF76
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3d
 	.4byte	0x533
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF77
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3e
 	.4byte	0x533
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x12
+	.byte	0x13
 	.byte	0x3f
 	.4byte	0x533
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF79
-	.byte	0x12
+	.byte	0x13
 	.byte	0x40
 	.4byte	0x533
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF80
-	.byte	0x12
+	.byte	0x13
 	.byte	0x43
 	.4byte	0x533
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF81
-	.byte	0x12
+	.byte	0x13
 	.byte	0x46
 	.4byte	0x533
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF82
-	.byte	0x12
+	.byte	0x13
 	.byte	0x49
 	.4byte	0x533
 	.byte	0x24
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF83
-	.byte	0x13
+	.byte	0x14
 	.byte	0xf
 	.4byte	0x52d
 	.uleb128 0x8
@@ -23752,84 +23771,84 @@ __func__.7630:
 	.4byte	0x49d
 	.uleb128 0x3
 	.4byte	.LASF84
-	.byte	0x13
+	.byte	0x14
 	.byte	0x12
 	.4byte	0x121
 	.uleb128 0x1a
 	.4byte	.LASF85
 	.byte	0x40
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x133
 	.4byte	0x5e8
 	.uleb128 0x1b
 	.4byte	.LASF86
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x134
 	.4byte	0x121
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF87
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x135
 	.4byte	0x121
 	.byte	0x4
 	.uleb128 0x1b
 	.4byte	.LASF88
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x136
 	.4byte	0x121
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF89
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x137
 	.4byte	0x121
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF90
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x138
 	.4byte	0x121
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF91
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x139
 	.4byte	0x121
 	.byte	0x14
 	.uleb128 0x1b
 	.4byte	.LASF92
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13a
 	.4byte	0x121
 	.byte	0x18
 	.uleb128 0x1b
 	.4byte	.LASF93
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13b
 	.4byte	0x116
 	.byte	0x1c
 	.uleb128 0x1b
 	.4byte	.LASF94
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13c
 	.4byte	0x116
 	.byte	0x1d
 	.uleb128 0x1b
 	.4byte	.LASF95
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13d
 	.4byte	0x116
 	.byte	0x1e
 	.uleb128 0x1b
 	.4byte	.LASF96
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13e
 	.4byte	0x116
 	.byte	0x1f
 	.uleb128 0x1b
 	.4byte	.LASF97
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x13f
 	.4byte	0x5e8
 	.byte	0x20
@@ -23843,258 +23862,258 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF98
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x140
 	.4byte	0x53e
 	.uleb128 0x1a
 	.4byte	.LASF99
 	.byte	0x30
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x142
 	.4byte	0x686
 	.uleb128 0x1b
 	.4byte	.LASF33
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x10b
 	.byte	0
 	.uleb128 0x1d
 	.string	"end"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x143
 	.4byte	0x10b
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF100
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x10b
 	.byte	0x10
 	.uleb128 0x1b
 	.4byte	.LASF101
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x144
 	.4byte	0x10b
 	.byte	0x18
 	.uleb128 0x1b
 	.4byte	.LASF102
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x145
 	.4byte	0x10b
 	.byte	0x20
 	.uleb128 0x1b
 	.4byte	.LASF103
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x116
 	.byte	0x28
 	.uleb128 0x1b
 	.4byte	.LASF104
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x116
 	.byte	0x29
 	.uleb128 0x1d
 	.string	"os"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x146
 	.4byte	0x116
 	.byte	0x2a
 	.uleb128 0x1b
 	.4byte	.LASF105
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x147
 	.4byte	0x116
 	.byte	0x2b
 	.byte	0
 	.uleb128 0x1c
 	.4byte	.LASF106
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x148
 	.4byte	0x604
 	.uleb128 0x1e
 	.4byte	.LASF107
 	.2byte	0x280
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x14e
 	.4byte	0x82f
 	.uleb128 0x1b
 	.4byte	.LASF108
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x154
 	.4byte	0x82f
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF109
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x155
 	.4byte	0x5f8
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF110
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x156
 	.4byte	0x10b
 	.byte	0x48
 	.uleb128 0x1b
 	.4byte	.LASF111
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x159
 	.4byte	0xe1
 	.byte	0x50
 	.uleb128 0x1b
 	.4byte	.LASF112
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15b
 	.4byte	0x12c
 	.byte	0x58
 	.uleb128 0x1b
 	.4byte	.LASF113
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15c
 	.4byte	0xe1
 	.byte	0x60
 	.uleb128 0x1b
 	.4byte	.LASF114
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15d
 	.4byte	0x5b
 	.byte	0x68
 	.uleb128 0x1b
 	.4byte	.LASF115
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x15f
 	.4byte	0x12c
 	.byte	0x70
 	.uleb128 0x1b
 	.4byte	.LASF116
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x160
 	.4byte	0xe1
 	.byte	0x78
 	.uleb128 0x1b
 	.4byte	.LASF117
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x161
 	.4byte	0x5b
 	.byte	0x80
 	.uleb128 0x1b
 	.4byte	.LASF118
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x163
 	.4byte	0x12c
 	.byte	0x88
 	.uleb128 0x1b
 	.4byte	.LASF119
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x164
 	.4byte	0xe1
 	.byte	0x90
 	.uleb128 0x1b
 	.4byte	.LASF120
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x165
 	.4byte	0x5b
 	.byte	0x98
 	.uleb128 0x1b
 	.4byte	.LASF121
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x167
 	.4byte	0x12c
 	.byte	0xa0
 	.uleb128 0x1b
 	.4byte	.LASF122
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x168
 	.4byte	0xe1
 	.byte	0xa8
 	.uleb128 0x1b
 	.4byte	.LASF123
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x169
 	.4byte	0x5b
 	.byte	0xb0
 	.uleb128 0x1d
 	.string	"os"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16d
 	.4byte	0x686
 	.byte	0xb8
 	.uleb128 0x1d
 	.string	"ep"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x16e
 	.4byte	0x10b
 	.byte	0xe8
 	.uleb128 0x1b
 	.4byte	.LASF124
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x10b
 	.byte	0xf0
 	.uleb128 0x1b
 	.4byte	.LASF125
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x170
 	.4byte	0x10b
 	.byte	0xf8
 	.uleb128 0x1f
 	.4byte	.LASF126
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x172
 	.4byte	0xfa
 	.2byte	0x100
 	.uleb128 0x1f
 	.4byte	.LASF127
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x173
 	.4byte	0x10b
 	.2byte	0x108
 	.uleb128 0x1f
 	.4byte	.LASF128
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x175
 	.4byte	0x10b
 	.2byte	0x110
 	.uleb128 0x1f
 	.4byte	.LASF129
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x176
 	.4byte	0x10b
 	.2byte	0x118
 	.uleb128 0x1f
 	.4byte	.LASF130
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x177
 	.4byte	0x10b
 	.2byte	0x120
 	.uleb128 0x1f
 	.4byte	.LASF131
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x178
 	.4byte	0x10b
 	.2byte	0x128
 	.uleb128 0x20
 	.string	"kbd"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x179
 	.4byte	0x835
 	.2byte	0x130
 	.uleb128 0x1f
 	.4byte	.LASF132
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x17c
 	.4byte	0x5b
 	.2byte	0x138
 	.uleb128 0x1f
 	.4byte	.LASF133
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x189
 	.4byte	0x5b
 	.2byte	0x13c
 	.uleb128 0x20
 	.string	"lmb"
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18c
 	.4byte	0x2f2
 	.2byte	0x140
@@ -24107,19 +24126,19 @@ __func__.7630:
 	.4byte	0x445
 	.uleb128 0x1c
 	.4byte	.LASF134
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x18e
 	.4byte	0x692
 	.uleb128 0xc
 	.4byte	.LASF135
-	.byte	0x14
+	.byte	0x15
 	.2byte	0x190
 	.4byte	0x83b
 	.uleb128 0x21
 	.4byte	.LASF263
 	.byte	0x4
 	.4byte	0x5b
-	.byte	0x16
+	.byte	0x17
 	.byte	0xe
 	.4byte	0xa50
 	.uleb128 0x22
@@ -24388,7 +24407,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF219
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa6
 	.4byte	0x10b
 	.uleb128 0xa
@@ -24398,38 +24417,38 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF220
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa8
 	.4byte	0xa7e
 	.uleb128 0x4
 	.4byte	.LASF221
-	.byte	0x6
+	.byte	0x7
 	.byte	0xa9
 	.4byte	0xa7e
 	.uleb128 0x4
 	.4byte	.LASF222
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf7
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF223
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf8
 	.4byte	0x10b
 	.uleb128 0x4
 	.4byte	.LASF224
-	.byte	0x6
+	.byte	0x7
 	.byte	0xf9
 	.4byte	0x10b
 	.uleb128 0xf
 	.4byte	.LASF225
 	.byte	0x4
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2e
 	.4byte	0xad9
 	.uleb128 0x10
 	.4byte	.LASF226
-	.byte	0x15
+	.byte	0x16
 	.byte	0x2f
 	.4byte	0x121
 	.byte	0
@@ -24440,78 +24459,78 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF227
 	.byte	0x68
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa6
 	.4byte	0xb7c
 	.uleb128 0x10
 	.4byte	.LASF27
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa8
 	.4byte	0xb7c
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF228
-	.byte	0x15
+	.byte	0x16
 	.byte	0xa9
 	.4byte	0x18c
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF229
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaa
 	.4byte	0xc4
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF133
-	.byte	0x15
+	.byte	0x16
 	.byte	0xab
 	.4byte	0x5b
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF230
-	.byte	0x15
+	.byte	0x16
 	.byte	0xad
 	.4byte	0xba6
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF231
-	.byte	0x15
+	.byte	0x16
 	.byte	0xae
 	.4byte	0xbc5
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF232
-	.byte	0x15
+	.byte	0x16
 	.byte	0xaf
 	.4byte	0xbda
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF233
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb0
 	.4byte	0xbeb
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF234
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb4
 	.4byte	0xbda
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb5
 	.4byte	0xba0
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb6
 	.4byte	0x5b
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF237
-	.byte	0x15
+	.byte	0x16
 	.byte	0xb7
 	.4byte	0x12c
 	.byte	0x60
@@ -24569,7 +24588,7 @@ __func__.7630:
 	.4byte	0xbe0
 	.uleb128 0x4
 	.4byte	.LASF238
-	.byte	0x15
+	.byte	0x16
 	.byte	0xbd
 	.4byte	0xba0
 	.uleb128 0x25
@@ -24581,7 +24600,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF239
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x11e
 	.4byte	0xc18
 	.uleb128 0x8
@@ -24596,27 +24615,27 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF240
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fd
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF241
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x1fe
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF242
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x200
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF243
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x205
 	.4byte	0xa63
 	.uleb128 0xc
 	.4byte	.LASF244
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x206
 	.4byte	0xa63
 	.uleb128 0xa
@@ -24628,32 +24647,32 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF245
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x207
 	.4byte	0xc6a
 	.uleb128 0xc
 	.4byte	.LASF246
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x209
 	.4byte	0xc1e
 	.uleb128 0xc
 	.4byte	.LASF247
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20a
 	.4byte	0xc1e
 	.uleb128 0xc
 	.4byte	.LASF248
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20b
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF249
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20c
 	.4byte	0xac0
 	.uleb128 0xc
 	.4byte	.LASF250
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20d
 	.4byte	0xad9
 	.uleb128 0xa
@@ -24665,17 +24684,17 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF251
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20e
 	.4byte	0xcc2
 	.uleb128 0xc
 	.4byte	.LASF252
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x20f
 	.4byte	0xad9
 	.uleb128 0xc
 	.4byte	.LASF253
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x210
 	.4byte	0x5b
 	.uleb128 0xa
@@ -24689,27 +24708,27 @@ __func__.7630:
 	.4byte	0xcf6
 	.uleb128 0xc
 	.4byte	.LASF254
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x211
 	.4byte	0xd06
 	.uleb128 0xc
 	.4byte	.LASF255
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x212
 	.4byte	0xd06
 	.uleb128 0xc
 	.4byte	.LASF256
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x216
 	.4byte	0x100
 	.uleb128 0xc
 	.4byte	.LASF257
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x217
 	.4byte	0x100
 	.uleb128 0xc
 	.4byte	.LASF258
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x219
 	.4byte	0x5b
 	.uleb128 0xa
@@ -24721,29 +24740,29 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF259
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x220
 	.4byte	0xd47
 	.uleb128 0xc
 	.4byte	.LASF260
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x222
 	.4byte	0xb9
 	.uleb128 0xc
 	.4byte	.LASF261
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x224
 	.4byte	0xb9
 	.uleb128 0xc
 	.4byte	.LASF262
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x230
 	.4byte	0xac0
 	.uleb128 0x26
 	.4byte	.LASF264
 	.byte	0x4
 	.4byte	0x30
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x286
 	.4byte	0xdb2
 	.uleb128 0x22
@@ -24761,68 +24780,68 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xc
 	.4byte	.LASF269
-	.byte	0x15
+	.byte	0x16
 	.2byte	0x28c
 	.4byte	0xd88
 	.uleb128 0x3
 	.4byte	.LASF270
-	.byte	0x17
+	.byte	0x18
 	.byte	0x9
 	.4byte	0x42
 	.uleb128 0x3
 	.4byte	.LASF271
-	.byte	0x17
+	.byte	0x18
 	.byte	0xa
 	.4byte	0x29
 	.uleb128 0x3
 	.4byte	.LASF272
-	.byte	0x17
+	.byte	0x18
 	.byte	0xb
 	.4byte	0x30
 	.uleb128 0x3
 	.4byte	.LASF273
-	.byte	0x17
+	.byte	0x18
 	.byte	0xc
 	.4byte	0x5b
 	.uleb128 0x3
 	.4byte	.LASF274
-	.byte	0x17
+	.byte	0x18
 	.byte	0xd
 	.4byte	0x74
 	.uleb128 0xf
 	.4byte	.LASF275
 	.byte	0x20
-	.byte	0x18
-	.byte	0x27
+	.byte	0x19
+	.byte	0x24
 	.4byte	0xe3e
 	.uleb128 0x10
 	.4byte	.LASF276
-	.byte	0x18
-	.byte	0x28
+	.byte	0x19
+	.byte	0x25
 	.4byte	0xb9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF277
-	.byte	0x18
-	.byte	0x29
+	.byte	0x19
+	.byte	0x26
 	.4byte	0xb9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF278
-	.byte	0x18
-	.byte	0x2a
+	.byte	0x19
+	.byte	0x27
 	.4byte	0xe3e
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF279
-	.byte	0x18
-	.byte	0x2b
+	.byte	0x19
+	.byte	0x28
 	.4byte	0xe3e
 	.byte	0x10
 	.uleb128 0x16
 	.string	"lpa"
-	.byte	0x18
-	.byte	0x2c
+	.byte	0x19
+	.byte	0x29
 	.4byte	0xb9
 	.byte	0x18
 	.byte	0
@@ -24832,79 +24851,79 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF280
 	.byte	0x18
-	.byte	0x18
-	.byte	0x2f
+	.byte	0x19
+	.byte	0x2c
 	.4byte	0xee1
 	.uleb128 0x10
 	.4byte	.LASF281
-	.byte	0x18
-	.byte	0x30
+	.byte	0x19
+	.byte	0x2d
 	.4byte	0xa3
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF282
-	.byte	0x18
-	.byte	0x31
+	.byte	0x19
+	.byte	0x2e
 	.4byte	0xa3
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF283
-	.byte	0x18
-	.byte	0x32
+	.byte	0x19
+	.byte	0x2f
 	.4byte	0xa3
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF284
-	.byte	0x18
-	.byte	0x33
+	.byte	0x19
+	.byte	0x30
 	.4byte	0xa3
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF285
-	.byte	0x18
-	.byte	0x34
+	.byte	0x19
+	.byte	0x31
 	.4byte	0xa3
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF286
-	.byte	0x18
-	.byte	0x35
+	.byte	0x19
+	.byte	0x32
 	.4byte	0xa3
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF287
-	.byte	0x18
-	.byte	0x36
+	.byte	0x19
+	.byte	0x33
 	.4byte	0xa3
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF288
-	.byte	0x18
-	.byte	0x37
+	.byte	0x19
+	.byte	0x34
 	.4byte	0xa3
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF289
-	.byte	0x18
-	.byte	0x38
+	.byte	0x19
+	.byte	0x35
 	.4byte	0xa3
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF290
-	.byte	0x18
-	.byte	0x39
+	.byte	0x19
+	.byte	0x36
 	.4byte	0xa3
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF291
-	.byte	0x18
-	.byte	0x3a
+	.byte	0x19
+	.byte	0x37
 	.4byte	0xa3
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF292
-	.byte	0x18
-	.byte	0x3b
+	.byte	0x19
+	.byte	0x38
 	.4byte	0x94
 	.byte	0x16
 	.byte	0
@@ -24913,31 +24932,31 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF293
 	.byte	0x20
-	.byte	0x18
-	.byte	0x3e
+	.byte	0x19
+	.byte	0x3b
 	.4byte	0xf23
 	.uleb128 0x10
 	.4byte	.LASF294
-	.byte	0x18
-	.byte	0x3f
+	.byte	0x19
+	.byte	0x3c
 	.4byte	0xf3d
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF295
-	.byte	0x18
-	.byte	0x40
+	.byte	0x19
+	.byte	0x3d
 	.4byte	0xf57
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF296
-	.byte	0x18
-	.byte	0x41
+	.byte	0x19
+	.byte	0x3e
 	.4byte	0xf7b
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF297
-	.byte	0x18
-	.byte	0x42
+	.byte	0x19
+	.byte	0x3f
 	.4byte	0xf7b
 	.byte	0x18
 	.byte	0
@@ -24984,48 +25003,48 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF298
 	.byte	0x60
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2b
 	.4byte	0xfe1
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2d
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2e
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x2f
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x16
 	.string	"cnt"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x30
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x31
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF301
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x32
 	.4byte	0xfe1
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF302
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x33
 	.4byte	0xff1
 	.byte	0x20
@@ -25050,36 +25069,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF303
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x3f
 	.4byte	0x104f
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x41
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x42
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x43
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x44
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x45
 	.4byte	0xdd4
 	.byte	0x8
@@ -25087,84 +25106,84 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF305
 	.byte	0x40
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x48
 	.4byte	0x10f8
 	.uleb128 0x10
 	.4byte	.LASF236
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4a
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF299
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4b
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4d
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF307
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x4e
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF308
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x50
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF309
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x51
 	.4byte	0xdc9
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF310
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x53
 	.4byte	0x10f8
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF311
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x54
 	.4byte	0x1001
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF312
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x55
 	.4byte	0x10f8
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF313
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x56
 	.4byte	0x1001
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x58
 	.4byte	0xdd4
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF314
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x59
 	.4byte	0xdd4
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF315
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5a
 	.4byte	0xdd4
 	.byte	0x38
@@ -25175,30 +25194,30 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF316
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5d
 	.4byte	0x113b
 	.uleb128 0x10
 	.4byte	.LASF317
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x5f
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF43
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x60
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x16
 	.string	"hit"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x61
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF318
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x62
 	.4byte	0x1001
 	.byte	0x8
@@ -25206,54 +25225,54 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF319
 	.byte	0x24
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x65
 	.4byte	0x11a8
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x67
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF320
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x68
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x69
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x16
 	.string	"len"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6a
 	.4byte	0xdd4
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF321
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6b
 	.4byte	0xdd4
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF322
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6c
 	.4byte	0xdd4
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6d
 	.4byte	0x11a8
 	.byte	0x18
 	.uleb128 0x16
 	.string	"tbl"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x6e
 	.4byte	0x11b8
 	.byte	0x20
@@ -25275,48 +25294,48 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF324
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x72
 	.4byte	0x1228
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x74
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x75
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x76
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF300
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x77
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x78
 	.4byte	0xdc9
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF326
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x79
 	.4byte	0xdc9
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7a
 	.4byte	0x1228
 	.byte	0xe
@@ -25331,36 +25350,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF327
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7d
 	.4byte	0x1280
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x7f
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x80
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x81
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x16
 	.string	"lpa"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x82
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF328
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x83
 	.4byte	0xdd4
 	.byte	0xc
@@ -25368,36 +25387,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF329
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x8f
 	.4byte	0x12c8
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x91
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x92
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x93
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF330
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x94
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x95
 	.4byte	0x12c8
 	.byte	0xa
@@ -25412,36 +25431,36 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF331
 	.byte	0x10
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x98
 	.4byte	0x1320
 	.uleb128 0x10
 	.4byte	.LASF306
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9a
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9b
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9c
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF332
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9d
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF333
-	.byte	0x19
+	.byte	0x1a
 	.byte	0x9e
 	.4byte	0xdd4
 	.byte	0xc
@@ -25449,126 +25468,126 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF334
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa1
 	.4byte	0x141d
 	.uleb128 0x16
 	.string	"tag"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa3
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x16
 	.string	"ver"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa4
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF304
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa6
 	.4byte	0xdc9
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF335
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa7
 	.4byte	0xdbe
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF336
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa8
 	.4byte	0xdbe
 	.byte	0xb
 	.uleb128 0x10
 	.4byte	.LASF337
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xa9
 	.4byte	0xdbe
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF338
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaa
 	.4byte	0xdbe
 	.byte	0xd
 	.uleb128 0x10
 	.4byte	.LASF339
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xab
 	.4byte	0xdc9
 	.byte	0xe
 	.uleb128 0x10
 	.4byte	.LASF340
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xad
 	.4byte	0xdc9
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF341
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xae
 	.4byte	0xdc9
 	.byte	0x12
 	.uleb128 0x10
 	.4byte	.LASF342
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xaf
 	.4byte	0xdc9
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF343
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb0
 	.4byte	0xdc9
 	.byte	0x16
 	.uleb128 0x10
 	.4byte	.LASF344
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb2
 	.4byte	0xdc9
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb3
 	.4byte	0xdc9
 	.byte	0x1a
 	.uleb128 0x10
 	.4byte	.LASF346
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb4
 	.4byte	0xdc9
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF347
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb5
 	.4byte	0xdc9
 	.byte	0x1e
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb7
 	.4byte	0xdd4
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF349
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb8
 	.4byte	0xdd4
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF350
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xb9
 	.4byte	0xdd4
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xba
 	.4byte	0x11b8
 	.byte	0x2c
@@ -25576,162 +25595,162 @@ __func__.7630:
 	.uleb128 0x27
 	.4byte	.LASF351
 	.2byte	0x200
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xbe
 	.4byte	0x1563
 	.uleb128 0x16
 	.string	"tag"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc0
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x16
 	.string	"ver"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc1
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF352
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc3
 	.4byte	0xdd4
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF353
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc4
 	.4byte	0xdd4
 	.byte	0xc
 	.uleb128 0x10
 	.4byte	.LASF354
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc5
 	.4byte	0xdd4
 	.byte	0x10
 	.uleb128 0x10
 	.4byte	.LASF355
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc6
 	.4byte	0xdd4
 	.byte	0x14
 	.uleb128 0x10
 	.4byte	.LASF348
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc8
 	.4byte	0xdd4
 	.byte	0x18
 	.uleb128 0x10
 	.4byte	.LASF356
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xc9
 	.4byte	0xdd4
 	.byte	0x1c
 	.uleb128 0x10
 	.4byte	.LASF357
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xca
 	.4byte	0xdd4
 	.byte	0x20
 	.uleb128 0x10
 	.4byte	.LASF358
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcb
 	.4byte	0xdd4
 	.byte	0x24
 	.uleb128 0x10
 	.4byte	.LASF345
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcd
 	.4byte	0xdd4
 	.byte	0x28
 	.uleb128 0x10
 	.4byte	.LASF359
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xce
 	.4byte	0xdd4
 	.byte	0x2c
 	.uleb128 0x10
 	.4byte	.LASF360
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xcf
 	.4byte	0xdd4
 	.byte	0x30
 	.uleb128 0x10
 	.4byte	.LASF361
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd0
 	.4byte	0xdd4
 	.byte	0x34
 	.uleb128 0x10
 	.4byte	.LASF362
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd2
 	.4byte	0xdd4
 	.byte	0x38
 	.uleb128 0x10
 	.4byte	.LASF363
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd3
 	.4byte	0xdd4
 	.byte	0x3c
 	.uleb128 0x10
 	.4byte	.LASF364
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd4
 	.4byte	0xdd4
 	.byte	0x40
 	.uleb128 0x10
 	.4byte	.LASF365
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd5
 	.4byte	0xdd4
 	.byte	0x44
 	.uleb128 0x10
 	.4byte	.LASF366
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd7
 	.4byte	0xdd4
 	.byte	0x48
 	.uleb128 0x10
 	.4byte	.LASF367
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd8
 	.4byte	0xdd4
 	.byte	0x4c
 	.uleb128 0x10
 	.4byte	.LASF368
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xd9
 	.4byte	0xdd4
 	.byte	0x50
 	.uleb128 0x10
 	.4byte	.LASF369
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xda
 	.4byte	0xdd4
 	.byte	0x54
 	.uleb128 0x10
 	.4byte	.LASF370
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdc
 	.4byte	0xdd4
 	.byte	0x58
 	.uleb128 0x10
 	.4byte	.LASF371
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xdd
 	.4byte	0xdd4
 	.byte	0x5c
 	.uleb128 0x10
 	.4byte	.LASF372
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xde
 	.4byte	0xdd4
 	.byte	0x60
 	.uleb128 0x10
 	.4byte	.LASF323
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe0
 	.4byte	0x1563
 	.byte	0x64
@@ -25746,24 +25765,24 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF373
 	.byte	0x6
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe4
 	.4byte	0x15a4
 	.uleb128 0x10
 	.4byte	.LASF235
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe6
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF374
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe7
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF375
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xe8
 	.4byte	0xdc9
 	.byte	0x4
@@ -25771,36 +25790,36 @@ __func__.7630:
 	.uleb128 0x27
 	.4byte	.LASF376
 	.2byte	0x808
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xeb
 	.4byte	0x15ee
 	.uleb128 0x16
 	.string	"max"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xed
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF377
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xee
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF378
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xef
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF325
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf0
 	.4byte	0xdc9
 	.byte	0x6
 	.uleb128 0x16
 	.string	"arr"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf1
 	.4byte	0x15ee
 	.byte	0x8
@@ -25815,72 +25834,72 @@ __func__.7630:
 	.uleb128 0xf
 	.4byte	.LASF379
 	.byte	0x30
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf5
 	.4byte	0x1691
 	.uleb128 0x16
 	.string	"id"
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf7
 	.4byte	0xdc9
 	.byte	0
 	.uleb128 0x10
 	.4byte	.LASF380
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf8
 	.4byte	0xdc9
 	.byte	0x2
 	.uleb128 0x10
 	.4byte	.LASF381
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xf9
 	.4byte	0xdc9
 	.byte	0x4
 	.uleb128 0x10
 	.4byte	.LASF382
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfa
 	.4byte	0xdbe
 	.byte	0x6
 	.uleb128 0x10
 	.4byte	.LASF383
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfb
 	.4byte	0xdbe
 	.byte	0x7
 	.uleb128 0x10
 	.4byte	.LASF384
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfc
 	.4byte	0xdbe
 	.byte	0x8
 	.uleb128 0x10
 	.4byte	.LASF385
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfd
 	.4byte	0xdbe
 	.byte	0x9
 	.uleb128 0x10
 	.4byte	.LASF386
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xfe
 	.4byte	0xdbe
 	.byte	0xa
 	.uleb128 0x10
 	.4byte	.LASF387
-	.byte	0x19
+	.byte	0x1a
 	.byte	0xff
 	.4byte	0xdbe
 	.byte	0xb
 	.uleb128 0x1b
 	.4byte	.LASF78
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x100
 	.4byte	0xdd4
 	.byte	0xc
 	.uleb128 0x1b
 	.4byte	.LASF388
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x101
 	.4byte	0x1691
 	.byte	0x10
@@ -25895,24 +25914,24 @@ __func__.7630:
 	.uleb128 0x1a
 	.4byte	.LASF389
 	.byte	0xc
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x105
 	.4byte	0x16d6
 	.uleb128 0x1b
 	.4byte	.LASF390
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x107
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF391
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x108
 	.4byte	0xdd4
 	.byte	0x4
 	.uleb128 0x1d
 	.string	"lpa"
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x109
 	.4byte	0xdd4
 	.byte	0x8
@@ -25920,31 +25939,31 @@ __func__.7630:
 	.uleb128 0x1a
 	.4byte	.LASF392
 	.byte	0x18
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10c
 	.4byte	0x170b
 	.uleb128 0x1b
 	.4byte	.LASF278
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10e
 	.4byte	0x1001
 	.byte	0
 	.uleb128 0x1b
 	.4byte	.LASF279
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x10f
 	.4byte	0x1001
 	.byte	0x8
 	.uleb128 0x1b
 	.4byte	.LASF393
-	.byte	0x19
+	.byte	0x1a
 	.2byte	0x110
 	.4byte	0xdd4
 	.byte	0x10
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF394
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x12
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25952,7 +25971,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_type
 	.uleb128 0x28
 	.4byte	.LASF395
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x13
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25960,7 +25979,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_die_num
 	.uleb128 0x28
 	.4byte	.LASF396
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x14
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25968,7 +25987,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_planes_per_die
 	.uleb128 0x28
 	.4byte	.LASF397
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x15
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25976,7 +25995,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_blks_per_die
 	.uleb128 0x28
 	.4byte	.LASF398
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x16
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25984,7 +26003,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_blks_per_die_shift
 	.uleb128 0x28
 	.4byte	.LASF399
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x17
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -25992,7 +26011,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_planes_num
 	.uleb128 0x28
 	.4byte	.LASF400
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x18
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26000,7 +26019,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_blk_pre_plane
 	.uleb128 0x28
 	.4byte	.LASF401
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x19
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26008,7 +26027,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_ext_blk_pre_plane
 	.uleb128 0x28
 	.4byte	.LASF402
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1a
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26016,7 +26035,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_bbm_buf_size
 	.uleb128 0x28
 	.4byte	.LASF403
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1c
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26024,7 +26043,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_page_pre_blk
 	.uleb128 0x28
 	.4byte	.LASF404
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1d
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26032,7 +26051,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_page_pre_slc_blk
 	.uleb128 0x28
 	.4byte	.LASF405
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26040,7 +26059,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_page_pre_super_blk
 	.uleb128 0x28
 	.4byte	.LASF406
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x1f
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26048,7 +26067,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_sec_pre_page
 	.uleb128 0x28
 	.4byte	.LASF407
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x20
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26056,7 +26075,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_sec_pre_page_shift
 	.uleb128 0x28
 	.4byte	.LASF408
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x24
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26064,7 +26083,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_byte_pre_page
 	.uleb128 0x28
 	.4byte	.LASF409
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x25
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26072,7 +26091,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_byte_pre_oob
 	.uleb128 0x28
 	.4byte	.LASF410
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x26
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26080,7 +26099,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_reserved_blks
 	.uleb128 0x28
 	.4byte	.LASF411
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x27
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26088,7 +26107,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_totle_phy_blks
 	.uleb128 0x28
 	.4byte	.LASF412
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x29
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26096,7 +26115,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_map_region_num
 	.uleb128 0x28
 	.4byte	.LASF413
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2a
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26104,7 +26123,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
 	.uleb128 0x28
 	.4byte	.LASF414
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2c
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26112,7 +26131,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_vendor_region_num
 	.uleb128 0x28
 	.4byte	.LASF415
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26120,7 +26139,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_map_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF416
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x2f
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26128,7 +26147,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_map_blks
 	.uleb128 0x28
 	.4byte	.LASF417
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x30
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26136,7 +26155,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_vendor_blks
 	.uleb128 0x28
 	.4byte	.LASF418
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x31
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26144,7 +26163,7 @@ __func__.7630:
 	.8byte	c_ftl_vendor_part_size
 	.uleb128 0x28
 	.4byte	.LASF419
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x32
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26152,7 +26171,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_sys_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF420
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x33
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26160,7 +26179,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_init_sys_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF421
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x34
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26168,7 +26187,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_sys_blks
 	.uleb128 0x28
 	.4byte	.LASF422
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x35
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26176,7 +26195,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_data_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF423
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x36
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26184,7 +26203,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_data_op_blks_per_plane
 	.uleb128 0x28
 	.4byte	.LASF424
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x37
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26192,7 +26211,7 @@ __func__.7630:
 	.8byte	c_ftl_nand_max_data_blks
 	.uleb128 0x28
 	.4byte	.LASF425
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x38
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26200,7 +26219,7 @@ __func__.7630:
 	.8byte	ftl_gc_temp_power_lost_recovery_flag
 	.uleb128 0x28
 	.4byte	.LASF426
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3a
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26208,7 +26227,7 @@ __func__.7630:
 	.8byte	g_GlobalSysVersion
 	.uleb128 0x28
 	.4byte	.LASF427
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3b
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26216,7 +26235,7 @@ __func__.7630:
 	.8byte	g_GlobalDataVersion
 	.uleb128 0x28
 	.4byte	.LASF428
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3c
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26224,7 +26243,7 @@ __func__.7630:
 	.8byte	g_MaxLbaSector
 	.uleb128 0x28
 	.4byte	.LASF429
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3d
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26232,7 +26251,7 @@ __func__.7630:
 	.8byte	g_MaxLpn
 	.uleb128 0x28
 	.4byte	.LASF430
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3e
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26240,7 +26259,7 @@ __func__.7630:
 	.8byte	g_VaildLpn
 	.uleb128 0x28
 	.4byte	.LASF431
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x3f
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26248,7 +26267,7 @@ __func__.7630:
 	.8byte	g_MaxLbn
 	.uleb128 0x28
 	.4byte	.LASF432
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x41
 	.4byte	0xf81
 	.uleb128 0x9
@@ -26256,7 +26275,7 @@ __func__.7630:
 	.8byte	gBbtInfo
 	.uleb128 0x28
 	.4byte	.LASF433
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x42
 	.4byte	0x1007
 	.uleb128 0x9
@@ -26264,7 +26283,7 @@ __func__.7630:
 	.8byte	gSysInfo
 	.uleb128 0x28
 	.4byte	.LASF434
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x43
 	.4byte	0x15a4
 	.uleb128 0x9
@@ -26272,7 +26291,7 @@ __func__.7630:
 	.8byte	gSysFreeQueue
 	.uleb128 0x28
 	.4byte	.LASF435
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x44
 	.4byte	0x104f
 	.uleb128 0x9
@@ -26280,7 +26299,7 @@ __func__.7630:
 	.8byte	gL2pMapInfo
 	.uleb128 0x28
 	.4byte	.LASF436
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x45
 	.4byte	0x104f
 	.uleb128 0x9
@@ -26288,7 +26307,7 @@ __func__.7630:
 	.8byte	gVendorBlkInfo
 	.uleb128 0x28
 	.4byte	.LASF437
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x46
 	.4byte	0xdf5
 	.uleb128 0x9
@@ -26296,7 +26315,7 @@ __func__.7630:
 	.8byte	req_sys
 	.uleb128 0x28
 	.4byte	.LASF438
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x47
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26307,7 +26326,7 @@ __func__.7630:
 	.4byte	0xdf5
 	.uleb128 0x28
 	.4byte	.LASF439
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x48
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26315,7 +26334,7 @@ __func__.7630:
 	.8byte	req_prgm
 	.uleb128 0x28
 	.4byte	.LASF440
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x49
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26323,7 +26342,7 @@ __func__.7630:
 	.8byte	req_erase
 	.uleb128 0x28
 	.4byte	.LASF441
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4a
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26331,7 +26350,7 @@ __func__.7630:
 	.8byte	req_gc
 	.uleb128 0x28
 	.4byte	.LASF442
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4b
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26339,7 +26358,7 @@ __func__.7630:
 	.8byte	req_gc_dst
 	.uleb128 0x28
 	.4byte	.LASF443
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4d
 	.4byte	0x1abc
 	.uleb128 0x9
@@ -26354,7 +26373,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF444
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x4f
 	.4byte	0x1b2b
 	.uleb128 0x9
@@ -26362,7 +26381,7 @@ __func__.7630:
 	.8byte	p_plane_order_table
 	.uleb128 0x28
 	.4byte	.LASF445
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x51
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26370,7 +26389,7 @@ __func__.7630:
 	.8byte	p_sys_data_buf
 	.uleb128 0x28
 	.4byte	.LASF446
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x52
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26378,7 +26397,7 @@ __func__.7630:
 	.8byte	p_sys_data_buf_1
 	.uleb128 0x28
 	.4byte	.LASF447
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x53
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26386,7 +26405,7 @@ __func__.7630:
 	.8byte	p_vendor_data_buf
 	.uleb128 0x28
 	.4byte	.LASF448
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x54
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26394,7 +26413,7 @@ __func__.7630:
 	.8byte	p_sys_spare_buf
 	.uleb128 0x28
 	.4byte	.LASF449
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x55
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26402,7 +26421,7 @@ __func__.7630:
 	.8byte	p_io_data_buf_0
 	.uleb128 0x28
 	.4byte	.LASF450
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x56
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26410,7 +26429,7 @@ __func__.7630:
 	.8byte	p_io_data_buf_1
 	.uleb128 0x28
 	.4byte	.LASF451
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x57
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26418,7 +26437,7 @@ __func__.7630:
 	.8byte	p_io_spare_buf
 	.uleb128 0x28
 	.4byte	.LASF452
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x58
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26426,7 +26445,7 @@ __func__.7630:
 	.8byte	p_gc_spare_buf
 	.uleb128 0x28
 	.4byte	.LASF453
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x59
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26434,7 +26453,7 @@ __func__.7630:
 	.8byte	p_gc_data_buf
 	.uleb128 0x28
 	.4byte	.LASF454
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5a
 	.4byte	0x1c22
 	.uleb128 0x9
@@ -26445,7 +26464,7 @@ __func__.7630:
 	.4byte	0x16d6
 	.uleb128 0x28
 	.4byte	.LASF455
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5b
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26453,7 +26472,7 @@ __func__.7630:
 	.8byte	c_gc_page_buf_num
 	.uleb128 0x28
 	.4byte	.LASF456
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5c
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26461,7 +26480,7 @@ __func__.7630:
 	.8byte	g_gc_num_req
 	.uleb128 0x28
 	.4byte	.LASF457
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5d
 	.4byte	0x1c67
 	.uleb128 0x9
@@ -26472,7 +26491,7 @@ __func__.7630:
 	.4byte	0x113b
 	.uleb128 0x28
 	.4byte	.LASF458
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26480,7 +26499,7 @@ __func__.7630:
 	.8byte	g_ect_tbl_info_size
 	.uleb128 0x28
 	.4byte	.LASF459
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x5f
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26488,7 +26507,7 @@ __func__.7630:
 	.8byte	p_erase_count_table
 	.uleb128 0x28
 	.4byte	.LASF460
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x61
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26496,7 +26515,7 @@ __func__.7630:
 	.8byte	p_swl_mul_table
 	.uleb128 0x28
 	.4byte	.LASF461
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x62
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26504,7 +26523,7 @@ __func__.7630:
 	.8byte	g_totle_swl_count
 	.uleb128 0x28
 	.4byte	.LASF462
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x63
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26512,7 +26531,7 @@ __func__.7630:
 	.8byte	p_valid_page_count_table
 	.uleb128 0x28
 	.4byte	.LASF463
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x64
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26520,7 +26539,7 @@ __func__.7630:
 	.8byte	p_valid_page_count_check_table
 	.uleb128 0x28
 	.4byte	.LASF464
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x65
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26528,7 +26547,7 @@ __func__.7630:
 	.8byte	p_blk_mode_table
 	.uleb128 0x28
 	.4byte	.LASF465
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x67
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26536,7 +26555,7 @@ __func__.7630:
 	.8byte	p_map_block_table
 	.uleb128 0x28
 	.4byte	.LASF466
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x68
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26544,7 +26563,7 @@ __func__.7630:
 	.8byte	p_map_block_valid_page_count
 	.uleb128 0x28
 	.4byte	.LASF467
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x69
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26552,7 +26571,7 @@ __func__.7630:
 	.8byte	p_map_block_ver_table
 	.uleb128 0x28
 	.4byte	.LASF468
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6a
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26560,7 +26579,7 @@ __func__.7630:
 	.8byte	p_map_region_ppn_table
 	.uleb128 0x28
 	.4byte	.LASF469
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6b
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26568,7 +26587,7 @@ __func__.7630:
 	.8byte	g_totle_map_block
 	.uleb128 0x28
 	.4byte	.LASF470
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6d
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26576,7 +26595,7 @@ __func__.7630:
 	.8byte	p_vendor_block_table
 	.uleb128 0x28
 	.4byte	.LASF471
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6e
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26584,7 +26603,7 @@ __func__.7630:
 	.8byte	p_vendor_block_valid_page_count
 	.uleb128 0x28
 	.4byte	.LASF472
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x6f
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26592,7 +26611,7 @@ __func__.7630:
 	.8byte	p_vendor_block_ver_table
 	.uleb128 0x28
 	.4byte	.LASF473
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x70
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26600,7 +26619,7 @@ __func__.7630:
 	.8byte	p_vendor_region_ppn_table
 	.uleb128 0x28
 	.4byte	.LASF474
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x71
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26608,7 +26627,7 @@ __func__.7630:
 	.8byte	g_totle_vendor_block
 	.uleb128 0x28
 	.4byte	.LASF475
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x73
 	.4byte	0x1de7
 	.uleb128 0x9
@@ -26619,7 +26638,7 @@ __func__.7630:
 	.4byte	0x10fe
 	.uleb128 0x28
 	.4byte	.LASF476
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x74
 	.4byte	0x1001
 	.uleb128 0x9
@@ -26627,7 +26646,7 @@ __func__.7630:
 	.8byte	p_l2p_map_buf
 	.uleb128 0x28
 	.4byte	.LASF477
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x75
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26635,7 +26654,7 @@ __func__.7630:
 	.8byte	g_l2p_last_update_region_id
 	.uleb128 0x28
 	.4byte	.LASF478
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7c
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26646,7 +26665,7 @@ __func__.7630:
 	.4byte	0x1573
 	.uleb128 0x28
 	.4byte	.LASF479
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7d
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26654,7 +26673,7 @@ __func__.7630:
 	.8byte	p_free_data_block_list_head
 	.uleb128 0x28
 	.4byte	.LASF480
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x7f
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26662,7 +26681,7 @@ __func__.7630:
 	.8byte	p_data_block_list_head
 	.uleb128 0x28
 	.4byte	.LASF481
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x80
 	.4byte	0x1e2c
 	.uleb128 0x9
@@ -26670,7 +26689,7 @@ __func__.7630:
 	.8byte	p_data_block_list_tail
 	.uleb128 0x28
 	.4byte	.LASF482
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x81
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26678,7 +26697,7 @@ __func__.7630:
 	.8byte	g_num_free_superblocks
 	.uleb128 0x28
 	.4byte	.LASF483
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x82
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26686,7 +26705,7 @@ __func__.7630:
 	.8byte	g_num_data_superblocks
 	.uleb128 0x28
 	.4byte	.LASF484
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x83
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26694,7 +26713,7 @@ __func__.7630:
 	.8byte	g_active_superblock
 	.uleb128 0x28
 	.4byte	.LASF485
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x84
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26702,7 +26721,7 @@ __func__.7630:
 	.8byte	g_buffer_superblock
 	.uleb128 0x28
 	.4byte	.LASF486
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x85
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26710,7 +26729,7 @@ __func__.7630:
 	.8byte	g_gc_temp_superblock
 	.uleb128 0x28
 	.4byte	.LASF487
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x86
 	.4byte	0x15ff
 	.uleb128 0x9
@@ -26718,7 +26737,7 @@ __func__.7630:
 	.8byte	g_gc_superblock
 	.uleb128 0x28
 	.4byte	.LASF488
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x87
 	.4byte	0x1f04
 	.uleb128 0x9
@@ -26729,7 +26748,7 @@ __func__.7630:
 	.4byte	0x15ff
 	.uleb128 0x28
 	.4byte	.LASF489
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x88
 	.4byte	0x1320
 	.uleb128 0x9
@@ -26737,7 +26756,7 @@ __func__.7630:
 	.8byte	g_sys_save_data
 	.uleb128 0x28
 	.4byte	.LASF490
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x89
 	.4byte	0x141d
 	.uleb128 0x9
@@ -26745,7 +26764,7 @@ __func__.7630:
 	.8byte	g_sys_ext_data
 	.uleb128 0x28
 	.4byte	.LASF491
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8b
 	.4byte	0x1f49
 	.uleb128 0x9
@@ -26756,7 +26775,7 @@ __func__.7630:
 	.4byte	0x16a1
 	.uleb128 0x28
 	.4byte	.LASF492
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8c
 	.4byte	0x10f8
 	.uleb128 0x9
@@ -26764,7 +26783,7 @@ __func__.7630:
 	.8byte	p_gc_blk_tbl
 	.uleb128 0x28
 	.4byte	.LASF493
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8d
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26772,7 +26791,7 @@ __func__.7630:
 	.8byte	g_gc_blk_num
 	.uleb128 0x28
 	.4byte	.LASF494
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8e
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26780,7 +26799,7 @@ __func__.7630:
 	.8byte	g_gc_page_offset
 	.uleb128 0x28
 	.4byte	.LASF495
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x8f
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26788,7 +26807,7 @@ __func__.7630:
 	.8byte	g_gc_cur_blk_valid_pages
 	.uleb128 0x28
 	.4byte	.LASF496
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x90
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26796,7 +26815,7 @@ __func__.7630:
 	.8byte	g_gc_cur_blk_max_valid_pages
 	.uleb128 0x28
 	.4byte	.LASF497
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x91
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26804,7 +26823,7 @@ __func__.7630:
 	.8byte	g_gc_next_blk
 	.uleb128 0x28
 	.4byte	.LASF498
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x92
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26812,7 +26831,7 @@ __func__.7630:
 	.8byte	g_gc_next_blk_1
 	.uleb128 0x28
 	.4byte	.LASF499
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x93
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26820,7 +26839,7 @@ __func__.7630:
 	.8byte	g_gc_bad_block_temp_num
 	.uleb128 0x28
 	.4byte	.LASF500
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x94
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26835,7 +26854,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF501
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x95
 	.4byte	0x200c
 	.uleb128 0x9
@@ -26843,7 +26862,7 @@ __func__.7630:
 	.8byte	g_gc_bad_block_temp_tbl
 	.uleb128 0x28
 	.4byte	.LASF502
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x97
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26851,7 +26870,7 @@ __func__.7630:
 	.8byte	g_gc_free_blk_threshold
 	.uleb128 0x28
 	.4byte	.LASF503
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x98
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26859,7 +26878,7 @@ __func__.7630:
 	.8byte	g_gc_merge_free_blk_threshold
 	.uleb128 0x28
 	.4byte	.LASF504
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x99
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26867,7 +26886,7 @@ __func__.7630:
 	.8byte	g_gc_blk_index
 	.uleb128 0x28
 	.4byte	.LASF505
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9b
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26875,7 +26894,7 @@ __func__.7630:
 	.8byte	g_totle_gc_page_count
 	.uleb128 0x28
 	.4byte	.LASF506
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9c
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26883,7 +26902,7 @@ __func__.7630:
 	.8byte	g_totle_write_page_count
 	.uleb128 0x28
 	.4byte	.LASF507
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9d
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26891,7 +26910,7 @@ __func__.7630:
 	.8byte	g_totle_write_sector
 	.uleb128 0x28
 	.4byte	.LASF508
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0x9e
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26899,7 +26918,7 @@ __func__.7630:
 	.8byte	g_totle_read_sector
 	.uleb128 0x28
 	.4byte	.LASF509
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa0
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26907,7 +26926,7 @@ __func__.7630:
 	.8byte	g_totle_discard_page_count
 	.uleb128 0x28
 	.4byte	.LASF510
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa1
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26915,7 +26934,7 @@ __func__.7630:
 	.8byte	g_totle_read_page_count
 	.uleb128 0x28
 	.4byte	.LASF511
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa2
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -26923,7 +26942,7 @@ __func__.7630:
 	.8byte	g_tmp_data_superblock_id
 	.uleb128 0x28
 	.4byte	.LASF512
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa3
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26931,7 +26950,7 @@ __func__.7630:
 	.8byte	g_totle_cache_write_count
 	.uleb128 0x28
 	.4byte	.LASF513
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa4
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26939,7 +26958,7 @@ __func__.7630:
 	.8byte	g_totle_l2p_write_count
 	.uleb128 0x28
 	.4byte	.LASF514
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa6
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26947,7 +26966,7 @@ __func__.7630:
 	.8byte	g_totle_mlc_erase_count
 	.uleb128 0x28
 	.4byte	.LASF515
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa7
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26955,7 +26974,7 @@ __func__.7630:
 	.8byte	g_totle_avg_erase_count
 	.uleb128 0x28
 	.4byte	.LASF516
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa8
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26963,7 +26982,7 @@ __func__.7630:
 	.8byte	g_min_erase_count
 	.uleb128 0x28
 	.4byte	.LASF517
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xa9
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26971,7 +26990,7 @@ __func__.7630:
 	.8byte	g_totle_slc_erase_count
 	.uleb128 0x28
 	.4byte	.LASF518
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaa
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26979,7 +26998,7 @@ __func__.7630:
 	.8byte	g_totle_sys_slc_erase_count
 	.uleb128 0x28
 	.4byte	.LASF519
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xab
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26987,7 +27006,7 @@ __func__.7630:
 	.8byte	g_max_erase_count
 	.uleb128 0x28
 	.4byte	.LASF520
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xac
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -26995,7 +27014,7 @@ __func__.7630:
 	.8byte	g_in_gc_progress
 	.uleb128 0x28
 	.4byte	.LASF521
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xad
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27003,7 +27022,7 @@ __func__.7630:
 	.8byte	g_in_swl_replace
 	.uleb128 0x28
 	.4byte	.LASF522
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xae
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27011,7 +27030,7 @@ __func__.7630:
 	.8byte	g_ftl_nand_free_count
 	.uleb128 0x28
 	.4byte	.LASF523
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xaf
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27019,7 +27038,7 @@ __func__.7630:
 	.8byte	g_gc_head_data_block
 	.uleb128 0x28
 	.4byte	.LASF524
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb0
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27027,7 +27046,7 @@ __func__.7630:
 	.8byte	g_gc_head_data_block_count
 	.uleb128 0x28
 	.4byte	.LASF525
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb1
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27035,7 +27054,7 @@ __func__.7630:
 	.8byte	g_gc_skip_write_count
 	.uleb128 0x28
 	.4byte	.LASF526
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb2
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27043,7 +27062,7 @@ __func__.7630:
 	.8byte	g_cur_erase_blk
 	.uleb128 0x28
 	.4byte	.LASF527
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb4
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27051,7 +27070,7 @@ __func__.7630:
 	.8byte	g_recovery_page_num
 	.uleb128 0x28
 	.4byte	.LASF528
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb5
 	.4byte	0xdd4
 	.uleb128 0x9
@@ -27066,7 +27085,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x28
 	.4byte	.LASF529
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb6
 	.4byte	0x2268
 	.uleb128 0x9
@@ -27074,7 +27093,7 @@ __func__.7630:
 	.8byte	g_recovery_ppa_tbl
 	.uleb128 0x28
 	.4byte	.LASF530
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb7
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -27082,7 +27101,7 @@ __func__.7630:
 	.8byte	c_mlc_erase_count_value
 	.uleb128 0x28
 	.4byte	.LASF531
-	.byte	0x1a
+	.byte	0x1b
 	.byte	0xb8
 	.4byte	0xdc9
 	.uleb128 0x9
@@ -27090,17 +27109,17 @@ __func__.7630:
 	.8byte	g_power_lost_recovery_flag
 	.uleb128 0x4
 	.4byte	.LASF532
-	.byte	0x17
+	.byte	0x18
 	.byte	0x14
 	.4byte	0xe44
 	.uleb128 0x4
 	.4byte	.LASF533
-	.byte	0x17
+	.byte	0x18
 	.byte	0x15
 	.4byte	0xe44
 	.uleb128 0x4
 	.4byte	.LASF534
-	.byte	0x17
+	.byte	0x18
 	.byte	0x16
 	.4byte	0xee6
 	.uleb128 0xa
@@ -27112,7 +27131,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF535
-	.byte	0x17
+	.byte	0x18
 	.byte	0x17
 	.4byte	0x22d8
 	.uleb128 0x28
@@ -27216,35 +27235,35 @@ __func__.7630:
 	.8byte	gc_ink_free_return_value
 	.uleb128 0xc
 	.4byte	.LASF549
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3ba
 	.4byte	0x10b
 	.uleb128 0xc
 	.4byte	.LASF550
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bb
 	.4byte	0x10b
 	.uleb128 0xc
 	.4byte	.LASF551
-	.byte	0x1b
+	.byte	0x1c
 	.2byte	0x3bc
 	.4byte	0x10b
 	.uleb128 0xf
 	.4byte	.LASF552
 	.byte	0x4
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xc
 	.4byte	0x2431
 	.uleb128 0x16
 	.string	"pid"
-	.byte	0x1c
+	.byte	0x6
 	.byte	0xd
 	.4byte	0x5b
 	.byte	0
 	.byte	0
 	.uleb128 0x4
 	.4byte	.LASF553
-	.byte	0x1c
+	.byte	0x6
 	.byte	0x10
 	.4byte	0x243c
 	.uleb128 0x8
@@ -27297,34 +27316,34 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF558
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x5b
-	.8byte	.LFB347
-	.8byte	.LFE347-.LFB347
+	.8byte	.LFB348
+	.8byte	.LFE348-.LFB348
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2527
 	.uleb128 0x2e
 	.4byte	.LASF556
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST468
+	.4byte	.LLST470
 	.uleb128 0x2e
 	.4byte	.LASF557
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x12c
-	.4byte	.LLST469
+	.4byte	.LLST471
 	.uleb128 0x2e
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xf7
+	.byte	0xfb
 	.4byte	0x30
-	.4byte	.LLST470
+	.4byte	.LLST472
 	.uleb128 0x2f
-	.8byte	.LVL2176
-	.4byte	0xa8ab
+	.8byte	.LVL2178
+	.4byte	0xa926
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27354,34 +27373,34 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF559
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x12c
-	.8byte	.LFB346
-	.8byte	.LFE346-.LFB346
+	.8byte	.LFB347
+	.8byte	.LFE347-.LFB347
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x259f
 	.uleb128 0x2e
 	.4byte	.LASF560
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x12c
-	.4byte	.LLST303
+	.4byte	.LLST305
 	.uleb128 0x2e
 	.4byte	.LASF561
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x16f
-	.4byte	.LLST304
+	.4byte	.LLST306
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0xf2
+	.byte	0xf6
 	.4byte	0x30
-	.4byte	.LLST305
+	.4byte	.LLST307
 	.uleb128 0x2f
-	.8byte	.LVL1241
-	.4byte	0xa8b6
+	.8byte	.LVL1243
+	.4byte	0xa931
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27411,34 +27430,34 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF562
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x12c
-	.8byte	.LFB345
-	.8byte	.LFE345-.LFB345
+	.8byte	.LFB346
+	.8byte	.LFE346-.LFB346
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2611
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x12c
-	.4byte	.LLST196
+	.4byte	.LLST198
 	.uleb128 0x31
 	.string	"c"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x5b
-	.4byte	.LLST197
+	.4byte	.LLST199
 	.uleb128 0x31
 	.string	"n"
 	.byte	0x1
-	.byte	0xed
+	.byte	0xf1
 	.4byte	0x30
-	.4byte	.LLST198
+	.4byte	.LLST200
 	.uleb128 0x2f
-	.8byte	.LVL738
-	.4byte	0xa8c2
+	.8byte	.LVL740
+	.4byte	0xa93d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27468,39 +27487,39 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF563
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xae
-	.8byte	.LFB344
-	.8byte	.LFE344-.LFB344
+	.8byte	.LFB345
+	.8byte	.LFE345-.LFB345
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x26cd
 	.uleb128 0x2e
 	.4byte	.LASF564
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xf37
-	.4byte	.LLST299
+	.4byte	.LLST301
 	.uleb128 0x31
 	.string	"die"
 	.byte	0x1
-	.byte	0xdb
+	.byte	0xdf
 	.4byte	0xb9
-	.4byte	.LLST300
+	.4byte	.LLST302
 	.uleb128 0x32
 	.4byte	.LASF325
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST301
+	.4byte	.LLST303
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0xdd
+	.byte	0xe1
 	.4byte	0xa3
-	.4byte	.LLST302
+	.4byte	.LLST304
 	.uleb128 0x34
-	.8byte	.LVL1228
+	.8byte	.LVL1230
 	.4byte	0x259f
 	.4byte	0x2691
 	.uleb128 0x30
@@ -27523,7 +27542,7 @@ __func__.7630:
 	.2byte	0x100
 	.byte	0
 	.uleb128 0x35
-	.8byte	.LVL1229
+	.8byte	.LVL1231
 	.4byte	0x26ab
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27539,7 +27558,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1232
+	.8byte	.LVL1234
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27562,36 +27581,36 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x37
-	.4byte	.LASF586
+	.4byte	.LASF589
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xddf
 	.byte	0x1
 	.4byte	0x2711
 	.uleb128 0x38
 	.4byte	.LASF577
 	.byte	0x1
-	.byte	0xc0
+	.byte	0xc4
 	.4byte	0xdc9
 	.uleb128 0x39
 	.string	"sts"
 	.byte	0x1
-	.byte	0xc2
+	.byte	0xc6
 	.4byte	0xddf
 	.uleb128 0x3a
 	.4byte	.LASF565
 	.byte	0x1
-	.byte	0xc3
+	.byte	0xc7
 	.4byte	0x2711
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
-	.byte	0xc4
+	.byte	0xc8
 	.4byte	0xdf5
 	.uleb128 0x3b
 	.string	"out"
 	.byte	0x1
-	.byte	0xd6
+	.byte	0xda
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xdd4
@@ -27603,41 +27622,41 @@ __func__.7630:
 	.uleb128 0x3c
 	.4byte	.LASF566
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xae
-	.8byte	.LFB342
-	.8byte	.LFE342-.LFB342
+	.8byte	.LFB343
+	.8byte	.LFE343-.LFB343
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x27e7
 	.uleb128 0x2e
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0x12c
-	.4byte	.LLST175
+	.4byte	.LLST177
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST176
+	.4byte	.LLST178
 	.uleb128 0x2e
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0xaa
+	.byte	0xae
 	.4byte	0xb9
-	.4byte	.LLST177
+	.4byte	.LLST179
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST178
+	.4byte	.LLST180
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27645,13 +27664,13 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
-	.4byte	.LLST179
+	.4byte	.LLST181
 	.uleb128 0x2b
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0xac
+	.byte	0xb0
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27659,18 +27678,18 @@ __func__.7630:
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x1
-	.byte	0xad
+	.byte	0xb1
 	.4byte	0x1abc
-	.4byte	.LLST180
+	.4byte	.LLST182
 	.uleb128 0x32
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0xae
+	.byte	0xb2
 	.4byte	0xb9
-	.4byte	.LLST181
+	.4byte	.LLST183
 	.uleb128 0x36
-	.8byte	.LVL669
-	.4byte	0x96be
+	.8byte	.LVL671
+	.4byte	0x9739
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27693,47 +27712,47 @@ __func__.7630:
 	.uleb128 0x3c
 	.4byte	.LASF572
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xae
-	.8byte	.LFB341
-	.8byte	.LFE341-.LFB341
+	.8byte	.LFB342
+	.8byte	.LFE342-.LFB342
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x298f
 	.uleb128 0x2e
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0x12c
-	.4byte	.LLST167
+	.4byte	.LLST169
 	.uleb128 0x2e
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST168
+	.4byte	.LLST170
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST169
+	.4byte	.LLST171
 	.uleb128 0x2e
 	.4byte	.LASF573
 	.byte	0x1
-	.byte	0x6e
+	.byte	0x72
 	.4byte	0xb9
-	.4byte	.LLST170
+	.4byte	.LLST172
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST171
+	.4byte	.LLST173
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27741,13 +27760,13 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
-	.4byte	.LLST172
+	.4byte	.LLST174
 	.uleb128 0x2b
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x70
+	.byte	0x74
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27755,34 +27774,34 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x71
+	.byte	0x75
 	.4byte	0xb9
-	.4byte	.LLST173
+	.4byte	.LLST175
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x1
-	.byte	0x72
+	.byte	0x76
 	.4byte	0x1abc
-	.4byte	.LLST174
+	.4byte	.LLST176
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7630
+	.8byte	__func__.7632
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0xd0
 	.4byte	0x2941
 	.uleb128 0x2b
 	.4byte	.LASF575
 	.byte	0x1
-	.byte	0x8d
+	.byte	0x91
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL657
+	.8byte	.LVL659
 	.4byte	0x29a4
 	.4byte	0x28e7
 	.uleb128 0x30
@@ -27804,8 +27823,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL658
-	.4byte	0xa8ce
+	.8byte	.LVL660
+	.4byte	0xa949
 	.4byte	0x2906
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27815,8 +27834,8 @@ __func__.7630:
 	.8byte	.LC79
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL659
-	.4byte	0xa8ce
+	.8byte	.LVL661
+	.4byte	0xa949
 	.4byte	0x2925
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27826,8 +27845,8 @@ __func__.7630:
 	.8byte	.LC80
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL660
-	.4byte	0xa8ce
+	.8byte	.LVL662
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -27837,8 +27856,8 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL648
-	.4byte	0xa8ce
+	.8byte	.LVL650
+	.4byte	0xa949
 	.4byte	0x296c
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27857,11 +27876,11 @@ __func__.7630:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x76
+	.byte	0x7a
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL649
-	.4byte	0x96be
+	.8byte	.LVL651
+	.4byte	0x9739
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -27893,41 +27912,41 @@ __func__.7630:
 	.uleb128 0x3c
 	.4byte	.LASF576
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xae
-	.8byte	.LFB340
-	.8byte	.LFE340-.LFB340
+	.8byte	.LFB341
+	.8byte	.LFE341-.LFB341
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2a9d
 	.uleb128 0x2e
 	.4byte	.LASF567
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0x12c
-	.4byte	.LLST152
+	.4byte	.LLST154
 	.uleb128 0x2e
 	.4byte	.LASF569
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST153
+	.4byte	.LLST155
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x1
-	.byte	0x50
+	.byte	0x54
 	.4byte	0xb9
-	.4byte	.LLST154
+	.4byte	.LLST156
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST155
+	.4byte	.LLST157
 	.uleb128 0x3d
 	.string	"cs"
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27935,13 +27954,13 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF276
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
-	.4byte	.LLST156
+	.4byte	.LLST158
 	.uleb128 0x2b
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x52
+	.byte	0x56
 	.4byte	0xb9
 	.uleb128 0x2
 	.byte	0x91
@@ -27949,23 +27968,23 @@ __func__.7630:
 	.uleb128 0x32
 	.4byte	.LASF571
 	.byte	0x1
-	.byte	0x53
+	.byte	0x57
 	.4byte	0xb9
-	.4byte	.LLST157
+	.4byte	.LLST159
 	.uleb128 0x39
 	.string	"req"
 	.byte	0x1
-	.byte	0x54
+	.byte	0x58
 	.4byte	0x1abc
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7613
+	.8byte	__func__.7615
 	.uleb128 0x34
-	.8byte	.LVL602
-	.4byte	0xa8ce
+	.8byte	.LVL604
+	.4byte	0xa949
 	.4byte	0x2a7a
 	.uleb128 0x30
 	.uleb128 0x1
@@ -27984,11 +28003,11 @@ __func__.7630:
 	.byte	0x52
 	.uleb128 0x2
 	.byte	0x8
-	.byte	0x58
+	.byte	0x5c
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL603
-	.4byte	0x96be
+	.8byte	.LVL605
+	.4byte	0x9739
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28009,129 +28028,129 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x41
-	.4byte	.LASF883
+	.4byte	.LASF885
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xb9
 	.byte	0x1
 	.4byte	0x2b1c
 	.uleb128 0x42
 	.string	"req"
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0x1abc
 	.uleb128 0x38
 	.4byte	.LASF570
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x38
 	.4byte	.LASF578
 	.byte	0x1
-	.byte	0x36
+	.byte	0x3a
 	.4byte	0xe3e
 	.uleb128 0x3a
 	.4byte	.LASF579
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF580
 	.byte	0x1
-	.byte	0x38
+	.byte	0x3c
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF285
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF286
 	.byte	0x1
-	.byte	0x39
+	.byte	0x3d
 	.4byte	0xa3
 	.uleb128 0x3a
 	.4byte	.LASF581
 	.byte	0x1
-	.byte	0x3a
+	.byte	0x3e
 	.4byte	0xb9
 	.uleb128 0x3a
 	.4byte	.LASF277
 	.byte	0x1
-	.byte	0x3b
+	.byte	0x3f
 	.4byte	0xb9
 	.uleb128 0x3a
 	.4byte	.LASF582
 	.byte	0x1
-	.byte	0x3c
+	.byte	0x40
 	.4byte	0xb9
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF619
+	.4byte	.LASF585
 	.byte	0x1
-	.byte	0x1c
-	.8byte	.LFB338
-	.8byte	.LFE338-.LFB338
+	.byte	0x20
+	.8byte	.LFB339
+	.8byte	.LFE339-.LFB339
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2c25
 	.uleb128 0x31
 	.string	"s"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0xfa
-	.4byte	.LLST143
+	.4byte	.LLST145
 	.uleb128 0x31
 	.string	"buf"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x12c
-	.4byte	.LLST144
+	.4byte	.LLST146
 	.uleb128 0x2e
 	.4byte	.LASF583
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST145
+	.4byte	.LLST147
 	.uleb128 0x31
 	.string	"len"
 	.byte	0x1
-	.byte	0x1c
+	.byte	0x20
 	.4byte	0x5b
-	.4byte	.LLST146
+	.4byte	.LLST148
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST147
+	.4byte	.LLST149
 	.uleb128 0x33
 	.string	"j"
 	.byte	0x1
-	.byte	0x1e
+	.byte	0x22
 	.4byte	0xb9
-	.4byte	.LLST148
+	.4byte	.LLST150
 	.uleb128 0x33
 	.string	"p8"
 	.byte	0x1
-	.byte	0x1f
+	.byte	0x23
 	.4byte	0xfa
-	.4byte	.LLST149
+	.4byte	.LLST151
 	.uleb128 0x33
 	.string	"p16"
 	.byte	0x1
-	.byte	0x20
+	.byte	0x24
 	.4byte	0x2c25
-	.4byte	.LLST150
+	.4byte	.LLST152
 	.uleb128 0x33
 	.string	"p32"
 	.byte	0x1
-	.byte	0x21
+	.byte	0x25
 	.4byte	0xe3e
-	.4byte	.LLST151
+	.4byte	.LLST153
 	.uleb128 0x44
-	.8byte	.LVL587
-	.4byte	0xa8ce
+	.8byte	.LVL589
+	.4byte	0xa949
 	.4byte	0x2bd8
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28141,8 +28160,8 @@ __func__.7630:
 	.8byte	.LC78
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL588
-	.4byte	0xa8ce
+	.8byte	.LVL590
+	.4byte	0xa949
 	.4byte	0x2bfc
 	.uleb128 0x30
 	.uleb128 0x1
@@ -28164,11 +28183,11 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL589
-	.4byte	0xa8ce
+	.8byte	.LVL591
+	.4byte	0xa949
 	.uleb128 0x36
-	.8byte	.LVL592
-	.4byte	0xa8ce
+	.8byte	.LVL594
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28183,22 +28202,22 @@ __func__.7630:
 	.uleb128 0x2d
 	.4byte	.LASF584
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x12c
-	.8byte	.LFB337
-	.8byte	.LFE337-.LFB337
+	.8byte	.LFB338
+	.8byte	.LFE338-.LFB338
 	.uleb128 0x1
 	.byte	0x9c
 	.4byte	0x2c7c
 	.uleb128 0x2e
 	.4byte	.LASF30
 	.byte	0x1
-	.byte	0x17
+	.byte	0x1b
 	.4byte	0x5b
-	.4byte	.LLST142
+	.4byte	.LLST144
 	.uleb128 0x2f
-	.8byte	.LVL579
-	.4byte	0xa8d9
+	.8byte	.LVL581
+	.4byte	0xa954
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28219,8 +28238,57 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF586
+	.byte	0x1
+	.byte	0x17
+	.8byte	.LFB337
+	.8byte	.LFE337-.LFB337
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2cdf
+	.uleb128 0x31
+	.string	"buf"
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x12c
+	.4byte	.LLST142
 	.uleb128 0x46
-	.4byte	.LASF585
+	.4byte	0x2cdf
+	.8byte	.LBB217
+	.8byte	.LBE217-.LBB217
+	.byte	0x1
+	.byte	0x19
+	.uleb128 0x47
+	.4byte	0x2ceb
+	.4byte	.LLST143
+	.uleb128 0x2f
+	.8byte	.LVL579
+	.4byte	0xa95f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LASF886
+	.byte	0x6
+	.byte	0x4e
+	.byte	0x3
+	.4byte	0x2cf7
+	.uleb128 0x38
+	.4byte	.LASF587
+	.byte	0x6
+	.byte	0x4e
+	.4byte	0x16f
+	.byte	0
+	.uleb128 0x49
+	.4byte	.LASF588
 	.byte	0x5
 	.2byte	0x2f8
 	.4byte	0xb9
@@ -28228,10 +28296,10 @@ __func__.7630:
 	.8byte	.LFE320-.LFB320
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2cb7
+	.4byte	0x2d32
 	.uleb128 0x2f
-	.8byte	.LVL1928
-	.4byte	0x2cb7
+	.8byte	.LVL1930
+	.4byte	0x2d32
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28244,88 +28312,88 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF587
+	.uleb128 0x4a
+	.4byte	.LASF590
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2d84
-	.uleb128 0x48
-	.4byte	.LASF588
+	.4byte	0x2dff
+	.uleb128 0x4b
+	.4byte	.LASF591
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
-	.uleb128 0x48
-	.4byte	.LASF589
+	.uleb128 0x4b
+	.4byte	.LASF592
 	.byte	0x5
 	.2byte	0x1d5
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF590
+	.uleb128 0x4c
+	.4byte	.LASF593
 	.byte	0x5
 	.2byte	0x1d7
 	.4byte	0xdc9
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"lpa"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdd4
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x5
 	.2byte	0x1d8
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF591
+	.uleb128 0x4c
+	.4byte	.LASF594
 	.byte	0x5
 	.2byte	0x1d9
 	.4byte	0xdc9
-	.uleb128 0x49
+	.uleb128 0x4c
 	.4byte	.LASF299
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF592
+	.uleb128 0x4c
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF593
+	.uleb128 0x4c
+	.4byte	.LASF596
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF594
+	.uleb128 0x4c
+	.4byte	.LASF597
 	.byte	0x5
 	.2byte	0x1da
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF595
+	.uleb128 0x4c
+	.4byte	.LASF598
 	.byte	0x5
 	.2byte	0x1db
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF596
+	.uleb128 0x4c
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x1dc
-	.4byte	0x2d84
-	.uleb128 0x4b
-	.4byte	.LASF597
+	.4byte	0x2dff
+	.uleb128 0x4e
+	.4byte	.LASF600
 	.byte	0x5
 	.2byte	0x276
-	.uleb128 0x4b
-	.4byte	.LASF598
+	.uleb128 0x4e
+	.4byte	.LASF601
 	.byte	0x5
 	.2byte	0x279
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x2d9a
-	.4byte	.LASF587
-	.uleb128 0x4d
-	.uleb128 0x49
-	.4byte	.LASF599
+	.4byte	0x2e15
+	.4byte	.LASF590
+	.uleb128 0x50
+	.uleb128 0x4c
+	.4byte	.LASF602
 	.byte	0x5
 	.2byte	0x1f3
 	.4byte	0xdc9
@@ -28336,97 +28404,97 @@ __func__.7630:
 	.4byte	0x1238
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x2d9a
+	.4byte	0x2e15
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x16
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x2d8a
-	.uleb128 0x47
-	.4byte	.LASF600
+	.4byte	0x2e05
+	.uleb128 0x4a
+	.4byte	.LASF603
 	.byte	0x5
 	.2byte	0x1a2
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2dff
-	.uleb128 0x4a
+	.4byte	0x2e7a
+	.uleb128 0x4d
 	.string	"ret"
 	.byte	0x5
 	.2byte	0x1a4
 	.4byte	0x5b
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x5
 	.2byte	0x1a5
 	.4byte	0x5b
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x5
 	.2byte	0x1a6
 	.4byte	0xdd4
-	.uleb128 0x49
+	.uleb128 0x4c
 	.4byte	.LASF565
 	.byte	0x5
 	.2byte	0x1a7
 	.4byte	0x2711
-	.uleb128 0x4e
-	.4byte	0x2df0
-	.uleb128 0x49
-	.4byte	.LASF601
+	.uleb128 0x51
+	.4byte	0x2e6b
+	.uleb128 0x4c
+	.4byte	.LASF604
 	.byte	0x5
 	.2byte	0x1b1
 	.4byte	0xdf5
 	.byte	0
-	.uleb128 0x4d
-	.uleb128 0x49
-	.4byte	.LASF602
+	.uleb128 0x50
+	.uleb128 0x4c
+	.4byte	.LASF605
 	.byte	0x5
 	.2byte	0x1c6
 	.4byte	0xdd4
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF603
+	.uleb128 0x4a
+	.4byte	.LASF606
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x2e49
-	.uleb128 0x48
-	.4byte	.LASF604
+	.4byte	0x2ec4
+	.uleb128 0x4b
+	.4byte	.LASF607
 	.byte	0x5
 	.2byte	0x185
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF592
+	.uleb128 0x4c
+	.4byte	.LASF595
 	.byte	0x5
 	.2byte	0x187
 	.4byte	0xdc9
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdc9
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"j"
 	.byte	0x5
 	.2byte	0x188
 	.4byte	0xdc9
-	.uleb128 0x49
+	.uleb128 0x4c
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x189
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF714
+	.uleb128 0x52
+	.4byte	.LASF715
 	.byte	0x5
 	.2byte	0x17a
 	.4byte	0x5b
 	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF605
+	.uleb128 0x49
+	.4byte	.LASF608
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0x5b
@@ -28434,29 +28502,29 @@ __func__.7630:
 	.8byte	.LFE315-.LFB315
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2ef8
-	.uleb128 0x50
+	.4byte	0x2f73
+	.uleb128 0x53
 	.4byte	.LASF388
 	.byte	0x5
 	.2byte	0x166
 	.4byte	0xdc9
 	.4byte	.LLST139
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x168
 	.4byte	0xdc9
 	.4byte	.LLST140
-	.uleb128 0x52
-	.4byte	.LASF606
+	.uleb128 0x55
+	.4byte	.LASF609
 	.byte	0x5
 	.2byte	0x169
 	.4byte	0xdc9
 	.4byte	.LLST141
 	.uleb128 0x34
 	.8byte	.LVL565
-	.4byte	0x6cf6
-	.4byte	0x2ebe
+	.4byte	0x6d71
+	.4byte	0x2f39
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28466,8 +28534,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL568
-	.4byte	0xa8ce
-	.4byte	0x2ee3
+	.4byte	0xa949
+	.4byte	0x2f5e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28483,7 +28551,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL569
-	.4byte	0x2ef8
+	.4byte	0x2f73
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28492,8 +28560,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF607
+	.uleb128 0x49
+	.4byte	.LASF610
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0x5b
@@ -28501,16 +28569,16 @@ __func__.7630:
 	.8byte	.LFE314-.LFB314
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x2f4c
-	.uleb128 0x50
-	.4byte	.LASF608
+	.4byte	0x2fc7
+	.uleb128 0x53
+	.4byte	.LASF587
 	.byte	0x5
 	.2byte	0x158
 	.4byte	0xdc9
 	.4byte	.LLST138
 	.uleb128 0x36
 	.8byte	.LVL561
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28525,8 +28593,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF609
+	.uleb128 0x49
+	.4byte	.LASF611
 	.byte	0x5
 	.2byte	0x13b
 	.4byte	0xdd4
@@ -28534,23 +28602,23 @@ __func__.7630:
 	.8byte	.LFE313-.LFB313
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3012
-	.uleb128 0x51
+	.4byte	0x308d
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x5
 	.2byte	0x13d
 	.4byte	0xdc9
-	.4byte	.LLST409
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LLST411
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x5
 	.2byte	0x13e
-	.4byte	0x2d84
-	.4byte	.LLST410
+	.4byte	0x2dff
+	.4byte	.LLST412
 	.uleb128 0x34
-	.8byte	.LVL1808
+	.8byte	.LVL1810
 	.4byte	0x27e7
-	.4byte	0x2fa8
+	.4byte	0x3023
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -28563,9 +28631,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1810
-	.4byte	0x35c6
-	.4byte	0x2fc6
+	.8byte	.LVL1812
+	.4byte	0x3641
+	.4byte	0x3041
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28580,9 +28648,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1811
-	.4byte	0x32a5
-	.4byte	0x2fdd
+	.8byte	.LVL1813
+	.4byte	0x3320
+	.4byte	0x3058
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28590,20 +28658,20 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1813
-	.4byte	0x7574
+	.8byte	.LVL1815
+	.4byte	0x75ef
 	.uleb128 0x45
-	.8byte	.LVL1814
-	.4byte	0x72c7
+	.8byte	.LVL1816
+	.4byte	0x7342
 	.uleb128 0x45
-	.8byte	.LVL1815
-	.4byte	0x324a
+	.8byte	.LVL1817
+	.4byte	0x32c5
 	.uleb128 0x45
-	.8byte	.LVL1819
-	.4byte	0x34b7
+	.8byte	.LVL1821
+	.4byte	0x3532
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF610
+	.uleb128 0x49
+	.4byte	.LASF612
 	.byte	0x5
 	.2byte	0x12b
 	.4byte	0xdd4
@@ -28611,14 +28679,14 @@ __func__.7630:
 	.8byte	.LFE312-.LFB312
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x30c4
+	.4byte	0x313f
 	.uleb128 0x45
-	.8byte	.LVL1823
-	.4byte	0x7cda
+	.8byte	.LVL1825
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL1824
-	.4byte	0x32a5
-	.4byte	0x3058
+	.8byte	.LVL1826
+	.4byte	0x3320
+	.4byte	0x30d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28626,9 +28694,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1825
-	.4byte	0x39d7
-	.4byte	0x3077
+	.8byte	.LVL1827
+	.4byte	0x3a52
+	.4byte	0x30f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28637,12 +28705,12 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1826
-	.4byte	0x5ce8
+	.8byte	.LVL1828
+	.4byte	0x5d63
 	.uleb128 0x34
-	.8byte	.LVL1827
-	.4byte	0x58ed
-	.4byte	0x309b
+	.8byte	.LVL1829
+	.4byte	0x5968
+	.4byte	0x3116
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28650,11 +28718,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1828
-	.4byte	0x5619
+	.8byte	.LVL1830
+	.4byte	0x5694
 	.uleb128 0x2f
-	.8byte	.LVL1829
-	.4byte	0x3789
+	.8byte	.LVL1831
+	.4byte	0x3804
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28663,13 +28731,13 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF670
+	.uleb128 0x56
+	.4byte	.LASF671
 	.byte	0x5
 	.2byte	0x120
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF611
+	.4byte	.LASF613
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
@@ -28677,99 +28745,99 @@ __func__.7630:
 	.8byte	.LFE310-.LFB310
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x324a
+	.4byte	0x32c5
 	.uleb128 0x2e
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0x1f04
-	.4byte	.LLST286
+	.4byte	.LLST288
 	.uleb128 0x2e
-	.4byte	.LASF613
+	.4byte	.LASF615
 	.byte	0x5
 	.byte	0xd2
 	.4byte	0xdd4
-	.4byte	.LLST287
+	.4byte	.LLST289
 	.uleb128 0x32
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x5
 	.byte	0xd4
 	.4byte	0xdc9
-	.4byte	.LLST288
+	.4byte	.LLST290
 	.uleb128 0x32
 	.4byte	.LASF569
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST289
+	.4byte	.LLST291
 	.uleb128 0x33
 	.string	"req"
 	.byte	0x5
 	.byte	0xd5
 	.4byte	0xdc9
-	.4byte	.LLST290
+	.4byte	.LLST292
 	.uleb128 0x32
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST291
+	.4byte	.LLST293
 	.uleb128 0x32
 	.4byte	.LASF382
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST292
+	.4byte	.LLST294
 	.uleb128 0x32
 	.4byte	.LASF380
 	.byte	0x5
 	.byte	0xd6
 	.4byte	0xdc9
-	.4byte	.LLST293
+	.4byte	.LLST295
 	.uleb128 0x32
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x5
 	.byte	0xd7
 	.4byte	0xdd4
-	.4byte	.LLST294
+	.4byte	.LLST296
 	.uleb128 0x32
-	.4byte	.LASF615
+	.4byte	.LASF617
 	.byte	0x5
 	.byte	0xd8
 	.4byte	0xdd4
-	.4byte	.LLST295
-	.uleb128 0x54
-	.4byte	.LASF616
+	.4byte	.LLST297
+	.uleb128 0x57
+	.4byte	.LASF618
 	.byte	0x5
 	.byte	0xd9
 	.4byte	0xdd4
 	.sleb128 -1
 	.uleb128 0x32
-	.4byte	.LASF596
+	.4byte	.LASF599
 	.byte	0x5
 	.byte	0xda
-	.4byte	0x2d84
-	.4byte	.LLST296
-	.uleb128 0x55
-	.4byte	.LASF617
+	.4byte	0x2dff
+	.4byte	.LLST298
+	.uleb128 0x58
+	.4byte	.LASF619
 	.byte	0x5
 	.byte	0xe1
-	.uleb128 0x55
-	.4byte	.LASF618
+	.uleb128 0x58
+	.4byte	.LASF620
 	.byte	0x5
 	.byte	0xe5
-	.uleb128 0x56
-	.4byte	.LASF688
+	.uleb128 0x59
+	.4byte	.LASF689
 	.byte	0x5
 	.2byte	0x117
-	.8byte	.L872
+	.8byte	.L873
 	.uleb128 0x45
-	.8byte	.LVL1174
-	.4byte	0x324a
+	.8byte	.LVL1176
+	.4byte	0x32c5
 	.uleb128 0x34
-	.8byte	.LVL1182
+	.8byte	.LVL1184
 	.4byte	0x29a4
-	.4byte	0x31ea
+	.4byte	0x3265
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28785,9 +28853,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1195
-	.4byte	0x6d36
-	.4byte	0x3204
+	.8byte	.LVL1197
+	.4byte	0x6db1
+	.4byte	0x327f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28798,9 +28866,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1201
-	.4byte	0x4e68
-	.4byte	0x3222
+	.8byte	.LVL1203
+	.4byte	0x4ee3
+	.4byte	0x329d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28815,28 +28883,28 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1204
-	.4byte	0x34b7
-	.uleb128 0x45
-	.8byte	.LVL1207
-	.4byte	0x68e0
+	.8byte	.LVL1206
+	.4byte	0x3532
 	.uleb128 0x45
 	.8byte	.LVL1209
-	.4byte	0x324a
+	.4byte	0x695b
+	.uleb128 0x45
+	.8byte	.LVL1211
+	.4byte	0x32c5
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF620
+	.4byte	.LASF621
 	.byte	0x5
 	.byte	0xc9
 	.8byte	.LFB309
 	.8byte	.LFE309-.LFB309
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x32a5
+	.4byte	0x3320
 	.uleb128 0x34
-	.8byte	.LVL1168
+	.8byte	.LVL1170
 	.4byte	0x259f
-	.4byte	0x327f
+	.4byte	0x32fa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28845,9 +28913,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1169
+	.8byte	.LVL1171
 	.4byte	0x259f
-	.4byte	0x3297
+	.4byte	0x3312
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -28855,12 +28923,12 @@ __func__.7630:
 	.byte	0x8
 	.byte	0xff
 	.byte	0
-	.uleb128 0x57
-	.8byte	.LVL1170
-	.4byte	0x361a
+	.uleb128 0x5a
+	.8byte	.LVL1172
+	.4byte	0x3695
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF621
+	.4byte	.LASF622
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
@@ -28868,27 +28936,27 @@ __func__.7630:
 	.8byte	.LFE308-.LFB308
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x34a2
+	.4byte	0x351d
 	.uleb128 0x2e
-	.4byte	.LASF622
+	.4byte	.LASF623
 	.byte	0x5
 	.byte	0x6f
 	.4byte	0x5b
-	.4byte	.LLST404
+	.4byte	.LLST406
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST405
+	.4byte	.LLST407
 	.uleb128 0x32
-	.4byte	.LASF623
+	.4byte	.LASF624
 	.byte	0x5
 	.byte	0x71
 	.4byte	0xdc9
-	.4byte	.LLST406
+	.4byte	.LLST408
 	.uleb128 0x2b
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x5
 	.byte	0x72
 	.4byte	0xdd4
@@ -28896,13 +28964,13 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -4
 	.uleb128 0x32
-	.4byte	.LASF625
+	.4byte	.LASF626
 	.byte	0x5
 	.byte	0x73
 	.4byte	0xdd4
-	.4byte	.LLST407
+	.4byte	.LLST409
 	.uleb128 0x2b
-	.4byte	.LASF612
+	.4byte	.LASF614
 	.byte	0x5
 	.byte	0x74
 	.4byte	0x1f04
@@ -28911,21 +28979,21 @@ __func__.7630:
 	.8byte	g_gc_temp_superblock
 	.byte	0x9f
 	.uleb128 0x32
-	.4byte	.LASF626
+	.4byte	.LASF627
 	.byte	0x5
 	.byte	0x75
 	.4byte	0x1f49
-	.4byte	.LLST408
+	.4byte	.LLST410
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x34b2
+	.4byte	0x352d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7246
+	.8byte	__func__.7245
 	.uleb128 0x34
-	.8byte	.LVL1769
-	.4byte	0x30cd
-	.4byte	0x3365
+	.8byte	.LVL1771
+	.4byte	0x3148
+	.4byte	0x33e0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28934,9 +29002,9 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1771
-	.4byte	0x58ed
-	.4byte	0x337c
+	.8byte	.LVL1773
+	.4byte	0x5968
+	.4byte	0x33f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28944,18 +29012,18 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1772
-	.4byte	0x7574
+	.8byte	.LVL1774
+	.4byte	0x75ef
 	.uleb128 0x45
-	.8byte	.LVL1773
-	.4byte	0x72c7
+	.8byte	.LVL1775
+	.4byte	0x7342
 	.uleb128 0x45
-	.8byte	.LVL1777
-	.4byte	0x7cda
+	.8byte	.LVL1779
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL1778
-	.4byte	0xa8ce
-	.4byte	0x33d5
+	.8byte	.LVL1780
+	.4byte	0xa949
+	.4byte	0x3450
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28976,9 +29044,9 @@ __func__.7630:
 	.byte	0xa2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1780
-	.4byte	0x3645
-	.4byte	0x33ed
+	.8byte	.LVL1782
+	.4byte	0x36c0
+	.4byte	0x3468
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -28987,18 +29055,18 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1781
-	.4byte	0x68bb
-	.uleb128 0x45
 	.8byte	.LVL1783
-	.4byte	0x5ce8
+	.4byte	0x6936
 	.uleb128 0x45
-	.8byte	.LVL1784
-	.4byte	0x5619
+	.8byte	.LVL1785
+	.4byte	0x5d63
+	.uleb128 0x45
+	.8byte	.LVL1786
+	.4byte	0x5694
 	.uleb128 0x34
-	.8byte	.LVL1787
-	.4byte	0xa8ce
-	.4byte	0x343f
+	.8byte	.LVL1789
+	.4byte	0xa949
+	.4byte	0x34ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29019,9 +29087,9 @@ __func__.7630:
 	.byte	0xa8
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1788
-	.4byte	0x5bbb
-	.4byte	0x345d
+	.8byte	.LVL1790
+	.4byte	0x5c36
+	.4byte	0x34d8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29035,12 +29103,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1789
-	.4byte	0x6cf6
+	.8byte	.LVL1791
+	.4byte	0x6d71
 	.uleb128 0x34
-	.8byte	.LVL1792
-	.4byte	0x5bbb
-	.4byte	0x3487
+	.8byte	.LVL1794
+	.4byte	0x5c36
+	.4byte	0x3502
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -29054,32 +29122,32 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1794
-	.4byte	0x3645
+	.8byte	.LVL1796
+	.4byte	0x36c0
 	.uleb128 0x45
-	.8byte	.LVL1798
-	.4byte	0x68e0
+	.8byte	.LVL1800
+	.4byte	0x695b
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x34b2
+	.4byte	0x352d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x12
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x34a2
+	.4byte	0x351d
 	.uleb128 0x43
-	.4byte	.LASF627
+	.4byte	.LASF628
 	.byte	0x5
 	.byte	0x54
 	.8byte	.LFB307
 	.8byte	.LFE307-.LFB307
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3534
+	.4byte	0x35af
 	.uleb128 0x2e
-	.4byte	.LASF628
+	.4byte	.LASF629
 	.byte	0x5
 	.byte	0x54
 	.4byte	0xdd4
@@ -29097,7 +29165,7 @@ __func__.7630:
 	.4byte	0xdd4
 	.4byte	.LLST135
 	.uleb128 0x32
-	.4byte	.LASF629
+	.4byte	.LASF630
 	.byte	0x5
 	.byte	0x56
 	.4byte	0xdc9
@@ -29110,7 +29178,7 @@ __func__.7630:
 	.4byte	.LLST137
 	.uleb128 0x36
 	.8byte	.LVL549
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29122,7 +29190,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF630
+	.4byte	.LASF631
 	.byte	0x5
 	.byte	0x49
 	.4byte	0xdd4
@@ -29130,7 +29198,7 @@ __func__.7630:
 	.8byte	.LFE306-.LFB306
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3572
+	.4byte	0x35ed
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x5
@@ -29145,23 +29213,23 @@ __func__.7630:
 	.4byte	.LLST132
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF631
+	.4byte	.LASF632
 	.byte	0x5
 	.byte	0x38
 	.8byte	.LFB305
 	.8byte	.LFE305-.LFB305
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x35c6
-	.uleb128 0x58
+	.4byte	0x3641
+	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
 	.byte	0x38
 	.4byte	0x1abc
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x59
-	.4byte	.LASF632
+	.uleb128 0x5c
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x38
 	.4byte	0xdd4
@@ -29174,30 +29242,30 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST129
 	.uleb128 0x32
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x3b
 	.4byte	0xdc9
 	.4byte	.LLST130
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF634
+	.4byte	.LASF635
 	.byte	0x5
 	.byte	0x29
 	.8byte	.LFB304
 	.8byte	.LFE304-.LFB304
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x361a
-	.uleb128 0x58
+	.4byte	0x3695
+	.uleb128 0x5b
 	.string	"req"
 	.byte	0x5
 	.byte	0x29
 	.4byte	0x1abc
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x59
-	.4byte	.LASF632
+	.uleb128 0x5c
+	.4byte	.LASF633
 	.byte	0x5
 	.byte	0x29
 	.4byte	0xdd4
@@ -29210,21 +29278,21 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST127
 	.uleb128 0x32
-	.4byte	.LASF633
+	.4byte	.LASF634
 	.byte	0x5
 	.byte	0x2c
 	.4byte	0xdc9
 	.4byte	.LLST128
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF635
+	.4byte	.LASF636
 	.byte	0x5
 	.byte	0x15
 	.8byte	.LFB303
 	.8byte	.LFE303-.LFB303
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3645
+	.4byte	0x36c0
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x5
@@ -29232,8 +29300,8 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST126
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF636
+	.uleb128 0x49
+	.4byte	.LASF637
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0x5b
@@ -29241,29 +29309,29 @@ __func__.7630:
 	.8byte	.LFE302-.LFB302
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3734
-	.uleb128 0x50
-	.4byte	.LASF623
+	.4byte	0x37af
+	.uleb128 0x53
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa93
 	.4byte	0xdc9
-	.4byte	.LLST323
-	.uleb128 0x51
+	.4byte	.LLST325
+	.uleb128 0x54
 	.string	"ret"
 	.byte	0x2
 	.2byte	0xa95
 	.4byte	0x5b
-	.4byte	.LLST324
+	.4byte	.LLST326
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3744
+	.4byte	0x37bf
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7176
+	.8byte	__func__.7175
 	.uleb128 0x34
-	.8byte	.LVL1339
-	.4byte	0xa8ce
-	.4byte	0x36c4
+	.8byte	.LVL1341
+	.4byte	0xa949
+	.4byte	0x373f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29283,9 +29351,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1344
-	.4byte	0xa8ce
-	.4byte	0x36f7
+	.8byte	.LVL1346
+	.4byte	0xa949
+	.4byte	0x3772
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29306,11 +29374,11 @@ __func__.7630:
 	.2byte	0xa9a
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1345
-	.4byte	0x3749
-	.uleb128 0x36
 	.8byte	.LVL1347
-	.4byte	0xa8ce
+	.4byte	0x37c4
+	.uleb128 0x36
+	.8byte	.LVL1349
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29333,41 +29401,41 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3744
+	.4byte	0x37bf
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x13
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3734
-	.uleb128 0x47
-	.4byte	.LASF637
+	.4byte	0x37af
+	.uleb128 0x4a
+	.4byte	.LASF638
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3774
-	.uleb128 0x48
-	.4byte	.LASF623
+	.4byte	0x37ef
+	.uleb128 0x4b
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa7e
 	.4byte	0xdc9
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x3784
-	.4byte	.LASF637
+	.4byte	0x37ff
+	.4byte	.LASF638
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xf
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3774
-	.uleb128 0x46
-	.4byte	.LASF638
+	.4byte	0x37ef
+	.uleb128 0x49
+	.4byte	.LASF639
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0xdd4
@@ -29375,35 +29443,35 @@ __func__.7630:
 	.8byte	.LFE300-.LFB300
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x38b7
-	.uleb128 0x50
-	.4byte	.LASF639
+	.4byte	0x3932
+	.uleb128 0x53
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa5e
 	.4byte	0x1f04
 	.4byte	.LLST123
-	.uleb128 0x52
-	.4byte	.LASF594
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0xa60
 	.4byte	0xdc9
 	.4byte	.LLST124
-	.uleb128 0x52
-	.4byte	.LASF640
+	.uleb128 0x55
+	.4byte	.LASF641
 	.byte	0x2
 	.2byte	0xa61
 	.4byte	0xdd4
 	.4byte	.LLST125
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x34b2
+	.4byte	0x352d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7156
+	.8byte	__func__.7155
 	.uleb128 0x34
 	.8byte	.LVL508
-	.4byte	0xa8ce
-	.4byte	0x3821
+	.4byte	0xa949
+	.4byte	0x389c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29425,8 +29493,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL509
-	.4byte	0xa8ce
-	.4byte	0x3854
+	.4byte	0xa949
+	.4byte	0x38cf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29448,8 +29516,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL510
-	.4byte	0xa8ce
-	.4byte	0x3887
+	.4byte	0xa949
+	.4byte	0x3902
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29471,7 +29539,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL514
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29492,8 +29560,8 @@ __func__.7630:
 	.2byte	0xa7a
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF641
+	.uleb128 0x49
+	.4byte	.LASF642
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x5b
@@ -29501,29 +29569,29 @@ __func__.7630:
 	.8byte	.LFE299-.LFB299
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x39c2
-	.uleb128 0x50
-	.4byte	.LASF639
+	.4byte	0x3a3d
+	.uleb128 0x53
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0xa46
 	.4byte	0x1f04
-	.4byte	.LLST389
-	.uleb128 0x52
-	.4byte	.LASF623
+	.4byte	.LLST391
+	.uleb128 0x55
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0xa48
 	.4byte	0xdc9
-	.4byte	.LLST390
+	.4byte	.LLST392
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x39d2
+	.4byte	0x3a4d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7149
+	.8byte	__func__.7148
 	.uleb128 0x34
-	.8byte	.LVL1701
-	.4byte	0xa8ce
-	.4byte	0x393f
+	.8byte	.LVL1703
+	.4byte	0xa949
+	.4byte	0x39ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29544,9 +29612,9 @@ __func__.7630:
 	.2byte	0xa49
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1702
-	.4byte	0x68bb
-	.4byte	0x3957
+	.8byte	.LVL1704
+	.4byte	0x6936
+	.4byte	0x39d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29555,12 +29623,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1703
-	.4byte	0x3749
+	.8byte	.LVL1705
+	.4byte	0x37c4
 	.uleb128 0x34
-	.8byte	.LVL1704
-	.4byte	0x39d7
-	.4byte	0x397c
+	.8byte	.LVL1706
+	.4byte	0x3a52
+	.4byte	0x39f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29569,12 +29637,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1705
-	.4byte	0x5ce8
+	.8byte	.LVL1707
+	.4byte	0x5d63
 	.uleb128 0x34
-	.8byte	.LVL1706
-	.4byte	0x58ed
-	.4byte	0x39a0
+	.8byte	.LVL1708
+	.4byte	0x5968
+	.4byte	0x3a1b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29582,11 +29650,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1707
-	.4byte	0x5619
+	.8byte	.LVL1709
+	.4byte	0x5694
 	.uleb128 0x36
-	.8byte	.LVL1711
-	.4byte	0x68e0
+	.8byte	.LVL1713
+	.4byte	0x695b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29597,15 +29665,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x39d2
+	.4byte	0x3a4d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x39c2
-	.uleb128 0x46
-	.4byte	.LASF642
+	.4byte	0x3a3d
+	.uleb128 0x49
+	.4byte	.LASF643
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x5b
@@ -29613,79 +29681,79 @@ __func__.7630:
 	.8byte	.LFE298-.LFB298
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3d02
-	.uleb128 0x5a
+	.4byte	0x3d7d
+	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
 	.2byte	0x9e2
 	.4byte	0x1f04
-	.4byte	.LLST310
-	.uleb128 0x52
-	.4byte	.LASF643
+	.4byte	.LLST312
+	.uleb128 0x55
+	.4byte	.LASF644
 	.byte	0x2
 	.2byte	0x9e4
 	.4byte	0xdc9
-	.4byte	.LLST311
-	.uleb128 0x49
-	.4byte	.LASF592
+	.4byte	.LLST313
+	.uleb128 0x4c
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.uleb128 0x52
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.4byte	.LLST312
-	.uleb128 0x51
+	.4byte	.LLST314
+	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.4byte	.LLST313
-	.uleb128 0x49
-	.4byte	.LASF594
+	.4byte	.LLST315
+	.uleb128 0x4c
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x9e5
 	.4byte	0xdc9
-	.uleb128 0x52
-	.4byte	.LASF644
+	.uleb128 0x55
+	.4byte	.LASF645
 	.byte	0x2
 	.2byte	0x9e6
 	.4byte	0x5b
-	.4byte	.LLST314
-	.uleb128 0x52
-	.4byte	.LASF645
+	.4byte	.LLST316
+	.uleb128 0x55
+	.4byte	.LASF646
 	.byte	0x2
 	.2byte	0x9e7
 	.4byte	0xdc9
-	.4byte	.LLST315
-	.uleb128 0x4b
-	.4byte	.LASF646
+	.4byte	.LLST317
+	.uleb128 0x4e
+	.4byte	.LASF647
 	.byte	0x2
 	.2byte	0x9e8
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3d12
+	.4byte	0x3d8d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7128
-	.uleb128 0x5b
-	.4byte	0x5398
-	.8byte	.LBB244
-	.8byte	.LBE244-.LBB244
+	.8byte	__func__.7127
+	.uleb128 0x5e
+	.4byte	0x5413
+	.8byte	.LBB248
+	.8byte	.LBE248-.LBB248
 	.byte	0x2
 	.2byte	0xa18
-	.4byte	0x3ad2
-	.uleb128 0x5c
-	.4byte	0x53b1
-	.4byte	.LLST316
-	.uleb128 0x5c
-	.4byte	0x53a5
-	.4byte	.LLST317
+	.4byte	0x3b4d
+	.uleb128 0x47
+	.4byte	0x542c
+	.4byte	.LLST318
+	.uleb128 0x47
+	.4byte	0x5420
+	.4byte	.LLST319
 	.uleb128 0x36
-	.8byte	.LVL1295
-	.4byte	0x9720
+	.8byte	.LVL1297
+	.4byte	0x979b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29693,15 +29761,15 @@ __func__.7630:
 	.byte	0x84
 	.sleb128 0
 	.uleb128 0x3e
-	.4byte	0x53b1
+	.4byte	0x542c
 	.uleb128 0x1
 	.byte	0x31
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1267
-	.4byte	0xa8ce
-	.4byte	0x3b05
+	.8byte	.LVL1269
+	.4byte	0xa949
+	.4byte	0x3b80
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29722,9 +29790,9 @@ __func__.7630:
 	.2byte	0x9e9
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1271
-	.4byte	0x666f
-	.4byte	0x3b24
+	.8byte	.LVL1273
+	.4byte	0x66ea
+	.4byte	0x3b9f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29733,9 +29801,9 @@ __func__.7630:
 	.8byte	.LANCHOR47
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1273
-	.4byte	0xa8ce
-	.4byte	0x3b57
+	.8byte	.LVL1275
+	.4byte	0xa949
+	.4byte	0x3bd2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29756,9 +29824,9 @@ __func__.7630:
 	.2byte	0x9f2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1274
-	.4byte	0x4593
-	.4byte	0x3b6f
+	.8byte	.LVL1276
+	.4byte	0x460e
+	.4byte	0x3bea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29767,9 +29835,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1275
-	.4byte	0x68bb
-	.4byte	0x3b87
+	.8byte	.LVL1277
+	.4byte	0x6936
+	.4byte	0x3c02
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29778,9 +29846,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1276
-	.4byte	0xa8ce
-	.4byte	0x3bba
+	.8byte	.LVL1278
+	.4byte	0xa949
+	.4byte	0x3c35
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29801,9 +29869,9 @@ __func__.7630:
 	.2byte	0x9fd
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1279
-	.4byte	0xa8ce
-	.4byte	0x3bed
+	.8byte	.LVL1281
+	.4byte	0xa949
+	.4byte	0x3c68
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29824,9 +29892,9 @@ __func__.7630:
 	.2byte	0xa00
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1281
-	.4byte	0xa8ce
-	.4byte	0x3c20
+	.8byte	.LVL1283
+	.4byte	0xa949
+	.4byte	0x3c9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29847,9 +29915,9 @@ __func__.7630:
 	.2byte	0xa0b
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1282
-	.4byte	0xa8ce
-	.4byte	0x3c53
+	.8byte	.LVL1284
+	.4byte	0xa949
+	.4byte	0x3cce
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29870,9 +29938,9 @@ __func__.7630:
 	.2byte	0xa0d
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1283
-	.4byte	0x5398
-	.4byte	0x3c70
+	.8byte	.LVL1285
+	.4byte	0x5413
+	.4byte	0x3ceb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29886,9 +29954,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1286
+	.8byte	.LVL1288
 	.4byte	0x2721
-	.4byte	0x3c88
+	.4byte	0x3d03
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x52
@@ -29897,9 +29965,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1288
-	.4byte	0x3e95
-	.4byte	0x3ca0
+	.8byte	.LVL1290
+	.4byte	0x3f10
+	.4byte	0x3d1b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29908,12 +29976,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1289
-	.4byte	0x72c7
+	.8byte	.LVL1291
+	.4byte	0x7342
 	.uleb128 0x34
-	.8byte	.LVL1290
-	.4byte	0x68bb
-	.4byte	0x3cc5
+	.8byte	.LVL1292
+	.4byte	0x6936
+	.4byte	0x3d40
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29922,11 +29990,11 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1300
-	.4byte	0x7574
+	.8byte	.LVL1302
+	.4byte	0x75ef
 	.uleb128 0x36
-	.8byte	.LVL1304
-	.4byte	0xa8ce
+	.8byte	.LVL1306
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -29949,28 +30017,28 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x3d12
+	.4byte	0x3d8d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x18
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x3d02
-	.uleb128 0x47
-	.4byte	.LASF647
+	.4byte	0x3d7d
+	.uleb128 0x4a
+	.4byte	.LASF648
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3d35
-	.uleb128 0x48
-	.4byte	.LASF623
+	.4byte	0x3db0
+	.uleb128 0x4b
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x9d9
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF648
+	.uleb128 0x49
+	.4byte	.LASF649
 	.byte	0x2
 	.2byte	0x98e
 	.4byte	0xdc9
@@ -29978,44 +30046,44 @@ __func__.7630:
 	.8byte	.LFE296-.LFB296
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e01
-	.uleb128 0x52
-	.4byte	.LASF649
+	.4byte	0x3e7c
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x990
 	.4byte	0xdc9
 	.4byte	.LLST114
-	.uleb128 0x52
-	.4byte	.LASF650
+	.uleb128 0x55
+	.4byte	.LASF651
 	.byte	0x2
 	.2byte	0x991
 	.4byte	0xdc9
 	.4byte	.LLST115
-	.uleb128 0x52
-	.4byte	.LASF651
+	.uleb128 0x55
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x992
 	.4byte	0xdc9
 	.4byte	.LLST116
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x993
 	.4byte	0x1e2c
 	.4byte	.LLST117
-	.uleb128 0x52
-	.4byte	.LASF653
+	.uleb128 0x55
+	.4byte	.LASF654
 	.byte	0x2
 	.2byte	0x994
 	.4byte	0xdc9
 	.4byte	.LLST118
-	.uleb128 0x52
-	.4byte	.LASF654
+	.uleb128 0x55
+	.4byte	.LASF655
 	.byte	0x2
 	.2byte	0x995
 	.4byte	0xdc9
 	.4byte	.LLST119
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x996
@@ -30023,13 +30091,13 @@ __func__.7630:
 	.4byte	.LLST120
 	.uleb128 0x45
 	.8byte	.LVL487
-	.4byte	0x3e01
+	.4byte	0x3e7c
 	.uleb128 0x45
 	.8byte	.LVL493
-	.4byte	0x3e62
+	.4byte	0x3edd
 	.uleb128 0x36
 	.8byte	.LVL495
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30044,8 +30112,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF655
+	.uleb128 0x49
+	.4byte	.LASF656
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdc9
@@ -30053,34 +30121,34 @@ __func__.7630:
 	.8byte	.LFE295-.LFB295
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e62
-	.uleb128 0x50
+	.4byte	0x3edd
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x979
 	.4byte	0xdc9
 	.4byte	.LLST103
-	.uleb128 0x52
-	.4byte	.LASF656
+	.uleb128 0x55
+	.4byte	.LASF657
 	.byte	0x2
 	.2byte	0x97b
 	.4byte	0xdc9
 	.4byte	.LLST104
-	.uleb128 0x52
-	.4byte	.LASF608
+	.uleb128 0x55
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x97c
 	.4byte	0xdc9
 	.4byte	.LLST105
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x97d
 	.4byte	0xdc9
 	.4byte	.LLST106
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF657
+	.uleb128 0x49
+	.4byte	.LASF658
 	.byte	0x2
 	.2byte	0x970
 	.4byte	0xdc9
@@ -30088,16 +30156,16 @@ __func__.7630:
 	.8byte	.LFE294-.LFB294
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3e95
-	.uleb128 0x52
-	.4byte	.LASF651
+	.4byte	0x3f10
+	.uleb128 0x55
+	.4byte	.LASF652
 	.byte	0x2
 	.2byte	0x972
 	.4byte	0xdc9
 	.4byte	.LLST102
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF658
+	.uleb128 0x49
+	.4byte	.LASF659
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0x5b
@@ -30105,26 +30173,26 @@ __func__.7630:
 	.8byte	.LFE293-.LFB293
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x3f1d
-	.uleb128 0x50
-	.4byte	.LASF623
+	.4byte	0x3f98
+	.uleb128 0x53
+	.4byte	.LASF624
 	.byte	0x2
 	.2byte	0x960
 	.4byte	0xdc9
 	.4byte	.LLST98
-	.uleb128 0x52
-	.4byte	.LASF592
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdc9
 	.4byte	.LLST99
-	.uleb128 0x52
-	.4byte	.LASF594
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x962
 	.4byte	0xdc9
 	.4byte	.LLST100
-	.uleb128 0x52
+	.uleb128 0x55
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x963
@@ -30132,8 +30200,8 @@ __func__.7630:
 	.4byte	.LLST101
 	.uleb128 0x34
 	.8byte	.LVL295
-	.4byte	0x6d91
-	.4byte	0x3f0f
+	.4byte	0x6e0c
+	.4byte	0x3f8a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30143,44 +30211,44 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL296
-	.4byte	0x74e5
+	.4byte	0x7560
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF659
+	.uleb128 0x4a
+	.4byte	.LASF660
 	.byte	0x2
 	.2byte	0x901
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x3f47
-	.uleb128 0x4a
+	.4byte	0x3fc2
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
 	.2byte	0x903
 	.4byte	0x5b
-	.uleb128 0x4d
-	.uleb128 0x49
-	.4byte	.LASF612
+	.uleb128 0x50
+	.uleb128 0x4c
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x928
 	.4byte	0x1f04
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF660
+	.uleb128 0x5f
+	.4byte	.LASF661
 	.byte	0x2
 	.2byte	0x8e2
 	.8byte	.LFB291
 	.8byte	.LFE291-.LFB291
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x404b
-	.uleb128 0x51
+	.4byte	0x40c6
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x8e4
 	.4byte	0x5b
-	.4byte	.LLST249
-	.uleb128 0x5e
+	.4byte	.LLST251
+	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x2
 	.2byte	0x8e5
@@ -30188,16 +30256,16 @@ __func__.7630:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF661
+	.uleb128 0x55
+	.4byte	.LASF662
 	.byte	0x2
 	.2byte	0x8e6
-	.4byte	0x2d84
-	.4byte	.LLST250
+	.4byte	0x2dff
+	.4byte	.LLST252
 	.uleb128 0x34
-	.8byte	.LVL954
-	.4byte	0xa8ce
-	.4byte	0x3fb7
+	.8byte	.LVL956
+	.4byte	0xa949
+	.4byte	0x4032
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30212,9 +30280,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL957
-	.4byte	0x5bbb
-	.4byte	0x3fdb
+	.8byte	.LVL959
+	.4byte	0x5c36
+	.4byte	0x4056
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30234,9 +30302,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL958
-	.4byte	0xa8ce
-	.4byte	0x4000
+	.8byte	.LVL960
+	.4byte	0xa949
+	.4byte	0x407b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30251,9 +30319,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL960
+	.8byte	.LVL962
 	.4byte	0x29a4
-	.4byte	0x4029
+	.4byte	0x40a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30272,8 +30340,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL961
-	.4byte	0xa8ce
+	.8byte	.LVL963
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30288,65 +30356,65 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF662
+	.uleb128 0x5f
+	.4byte	.LASF663
 	.byte	0x2
 	.2byte	0x8ae
 	.8byte	.LFB290
 	.8byte	.LFE290-.LFB290
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x41cd
-	.uleb128 0x51
+	.4byte	0x4248
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x8b0
 	.4byte	0xdc9
-	.4byte	.LLST281
-	.uleb128 0x51
+	.4byte	.LLST283
+	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
 	.2byte	0x8b1
 	.4byte	0xdd4
-	.4byte	.LLST282
+	.4byte	.LLST284
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x8b2
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
 	.2byte	0x8b3
 	.4byte	0xdc9
-	.4byte	.LLST283
-	.uleb128 0x52
-	.4byte	.LASF664
+	.4byte	.LLST285
+	.uleb128 0x55
+	.4byte	.LASF665
 	.byte	0x2
 	.2byte	0x8b4
 	.4byte	0xdc9
-	.4byte	.LLST284
+	.4byte	.LLST286
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7044
+	.8byte	__func__.7043
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x180
-	.4byte	0x40fd
-	.uleb128 0x52
+	.4byte	0x4178
+	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x8d1
 	.4byte	0xdc9
-	.4byte	.LLST285
+	.4byte	.LLST287
 	.uleb128 0x36
-	.8byte	.LVL1163
-	.4byte	0xa8ce
+	.8byte	.LVL1165
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30362,9 +30430,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1141
-	.4byte	0xa8ce
-	.4byte	0x4129
+	.8byte	.LVL1143
+	.4byte	0xa949
+	.4byte	0x41a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30379,9 +30447,9 @@ __func__.7630:
 	.8byte	.LANCHOR156
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1142
+	.8byte	.LVL1144
 	.4byte	0x259f
-	.4byte	0x414e
+	.4byte	0x41c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30402,9 +30470,9 @@ __func__.7630:
 	.2byte	0x2000
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1150
-	.4byte	0xa8ce
-	.4byte	0x4181
+	.8byte	.LVL1152
+	.4byte	0xa949
+	.4byte	0x41fc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30425,9 +30493,9 @@ __func__.7630:
 	.2byte	0x8df
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1152
-	.4byte	0x5bbb
-	.4byte	0x41a5
+	.8byte	.LVL1154
+	.4byte	0x5c36
+	.4byte	0x4220
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30447,11 +30515,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1153
-	.4byte	0x6cf6
+	.8byte	.LVL1155
+	.4byte	0x6d71
 	.uleb128 0x36
-	.8byte	.LVL1157
-	.4byte	0xa8ce
+	.8byte	.LVL1159
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30468,58 +30536,58 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xd
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x41cd
-	.uleb128 0x5d
-	.4byte	.LASF665
+	.4byte	0x4248
+	.uleb128 0x5f
+	.4byte	.LASF666
 	.byte	0x2
 	.2byte	0x88f
 	.8byte	.LFB289
 	.8byte	.LFE289-.LFB289
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4316
-	.uleb128 0x51
+	.4byte	0x4391
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x891
 	.4byte	0xdc9
-	.4byte	.LLST386
-	.uleb128 0x51
+	.4byte	.LLST388
+	.uleb128 0x54
 	.string	"lpn"
 	.byte	0x2
 	.2byte	0x892
 	.4byte	0xdd4
-	.4byte	.LLST387
+	.4byte	.LLST389
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x893
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x2
 	.2byte	0x894
 	.4byte	0xdc9
-	.4byte	.LLST388
+	.4byte	.LLST390
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x4326
+	.4byte	0x43a1
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7028
+	.8byte	__func__.7027
 	.uleb128 0x34
-	.8byte	.LVL1681
-	.4byte	0xa8ce
-	.4byte	0x427c
+	.8byte	.LVL1683
+	.4byte	0xa949
+	.4byte	0x42f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30534,9 +30602,9 @@ __func__.7630:
 	.8byte	.LANCHOR168
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1682
+	.8byte	.LVL1684
 	.4byte	0x259f
-	.4byte	0x4294
+	.4byte	0x430f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30545,9 +30613,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1687
-	.4byte	0x5bbb
-	.4byte	0x42b8
+	.8byte	.LVL1689
+	.4byte	0x5c36
+	.4byte	0x4333
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30567,12 +30635,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1688
-	.4byte	0x6cf6
+	.8byte	.LVL1690
+	.4byte	0x6d71
 	.uleb128 0x34
-	.8byte	.LVL1692
-	.4byte	0xa8ce
-	.4byte	0x42e3
+	.8byte	.LVL1694
+	.4byte	0xa949
+	.4byte	0x435e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30587,9 +30655,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1693
-	.4byte	0x3749
-	.4byte	0x42fb
+	.8byte	.LVL1695
+	.4byte	0x37c4
+	.4byte	0x4376
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30598,66 +30666,66 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1694
-	.4byte	0x5ce8
+	.8byte	.LVL1696
+	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL1695
-	.4byte	0x5619
+	.8byte	.LVL1697
+	.4byte	0x5694
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4326
+	.4byte	0x43a1
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x14
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4316
-	.uleb128 0x5d
-	.4byte	.LASF666
+	.4byte	0x4391
+	.uleb128 0x5f
+	.4byte	.LASF667
 	.byte	0x2
 	.2byte	0x86b
 	.8byte	.LFB288
 	.8byte	.LFE288-.LFB288
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x43e3
-	.uleb128 0x50
-	.4byte	.LASF612
+	.4byte	0x445e
+	.uleb128 0x53
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x86b
 	.4byte	0x1f04
-	.4byte	.LLST354
+	.4byte	.LLST356
 	.uleb128 0x2a
-	.4byte	.LASF667
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x86d
 	.4byte	0xdf5
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x52
-	.4byte	.LASF596
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x86e
-	.4byte	0x2d84
-	.4byte	.LLST355
-	.uleb128 0x52
-	.4byte	.LASF668
+	.4byte	0x2dff
+	.4byte	.LLST357
+	.uleb128 0x55
+	.4byte	.LASF669
 	.byte	0x2
 	.2byte	0x86f
 	.4byte	0x5b
-	.4byte	.LLST356
-	.uleb128 0x5f
+	.4byte	.LLST358
+	.uleb128 0x61
 	.4byte	.LASF384
 	.byte	0x2
 	.2byte	0x870
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1515
-	.4byte	0x3789
-	.4byte	0x43ad
+	.8byte	.LVL1517
+	.4byte	0x3804
+	.4byte	0x4428
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30666,9 +30734,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1518
+	.8byte	.LVL1520
 	.4byte	0x27e7
-	.4byte	0x43d5
+	.4byte	0x4450
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30692,22 +30760,22 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1519
-	.4byte	0x3645
+	.8byte	.LVL1521
+	.4byte	0x36c0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF669
+	.uleb128 0x5f
+	.4byte	.LASF670
 	.byte	0x2
 	.2byte	0x851
 	.8byte	.LFB287
 	.8byte	.LFE287-.LFB287
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4444
+	.4byte	0x44bf
 	.uleb128 0x34
-	.8byte	.LVL1659
-	.4byte	0x5955
-	.4byte	0x4423
+	.8byte	.LVL1661
+	.4byte	0x59d0
+	.4byte	0x449e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30726,7 +30794,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1660
+	.8byte	.LVL1662
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -30747,13 +30815,13 @@ __func__.7630:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x53
-	.4byte	.LASF671
+	.uleb128 0x56
+	.4byte	.LASF672
 	.byte	0x2
 	.2byte	0x83d
 	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF672
+	.uleb128 0x49
+	.4byte	.LASF673
 	.byte	0x2
 	.2byte	0x812
 	.4byte	0x5b
@@ -30761,53 +30829,53 @@ __func__.7630:
 	.8byte	.LFE285-.LFB285
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x457e
-	.uleb128 0x52
-	.4byte	.LASF649
+	.4byte	0x45f9
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST275
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	.LLST277
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST276
-	.uleb128 0x52
-	.4byte	.LASF594
+	.4byte	.LLST278
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST277
-	.uleb128 0x52
+	.4byte	.LLST279
+	.uleb128 0x55
 	.4byte	.LASF375
 	.byte	0x2
 	.2byte	0x814
 	.4byte	0xdc9
-	.4byte	.LLST278
-	.uleb128 0x52
-	.4byte	.LASF673
+	.4byte	.LLST280
+	.uleb128 0x55
+	.4byte	.LASF674
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdc9
-	.4byte	.LLST279
-	.uleb128 0x52
-	.4byte	.LASF674
+	.4byte	.LLST281
+	.uleb128 0x55
+	.4byte	.LASF675
 	.byte	0x2
 	.2byte	0x815
 	.4byte	0xdc9
-	.4byte	.LLST280
+	.4byte	.LLST282
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x458e
+	.4byte	0x4609
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.7003
+	.8byte	__func__.7002
 	.uleb128 0x34
-	.8byte	.LVL1115
+	.8byte	.LVL1117
 	.4byte	0x259f
-	.4byte	0x44f9
+	.4byte	0x4574
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30815,9 +30883,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1119
-	.4byte	0x6d91
-	.4byte	0x4511
+	.8byte	.LVL1121
+	.4byte	0x6e0c
+	.4byte	0x458c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -30826,12 +30894,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1120
-	.4byte	0x74e5
+	.8byte	.LVL1122
+	.4byte	0x7560
 	.uleb128 0x34
-	.8byte	.LVL1127
-	.4byte	0x68e0
-	.4byte	0x4536
+	.8byte	.LVL1129
+	.4byte	0x695b
+	.4byte	0x45b1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30840,9 +30908,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1135
-	.4byte	0x68bb
-	.4byte	0x454e
+	.8byte	.LVL1137
+	.4byte	0x6936
+	.4byte	0x45c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30851,8 +30919,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1137
-	.4byte	0xa8ce
+	.8byte	.LVL1139
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30875,15 +30943,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x458e
+	.4byte	0x4609
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x11
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x457e
-	.uleb128 0x46
-	.4byte	.LASF675
+	.4byte	0x45f9
+	.uleb128 0x49
+	.4byte	.LASF676
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x5b
@@ -30891,35 +30959,35 @@ __func__.7630:
 	.8byte	.LFE284-.LFB284
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x464b
-	.uleb128 0x5a
+	.4byte	0x46c6
+	.uleb128 0x5d
 	.string	"p"
 	.byte	0x2
 	.2byte	0x7fc
 	.4byte	0x1f04
 	.4byte	.LLST95
-	.uleb128 0x52
-	.4byte	.LASF592
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdc9
 	.4byte	.LLST96
-	.uleb128 0x52
-	.4byte	.LASF594
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7fe
 	.4byte	0xdc9
 	.4byte	.LLST97
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6982
+	.8byte	__func__.6981
 	.uleb128 0x34
 	.8byte	.LVL278
-	.4byte	0xa8ce
-	.4byte	0x4629
+	.4byte	0xa949
+	.4byte	0x46a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30941,10 +31009,10 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL282
-	.4byte	0x6d91
+	.4byte	0x6e0c
 	.uleb128 0x36
 	.8byte	.LVL284
-	.4byte	0x74e5
+	.4byte	0x7560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30953,8 +31021,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF676
+	.uleb128 0x49
+	.4byte	.LASF677
 	.byte	0x2
 	.2byte	0x7ef
 	.4byte	0x5b
@@ -30962,11 +31030,11 @@ __func__.7630:
 	.8byte	.LFE283-.LFB283
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x46ef
+	.4byte	0x476a
 	.uleb128 0x34
-	.8byte	.LVL1802
-	.4byte	0x4715
-	.4byte	0x4685
+	.8byte	.LVL1804
+	.4byte	0x4790
+	.4byte	0x4700
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30975,9 +31043,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1803
-	.4byte	0x46ef
-	.4byte	0x469d
+	.8byte	.LVL1805
+	.4byte	0x476a
+	.4byte	0x4718
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30986,9 +31054,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1804
-	.4byte	0x4715
-	.4byte	0x46b5
+	.8byte	.LVL1806
+	.4byte	0x4790
+	.4byte	0x4730
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -30997,9 +31065,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1805
-	.4byte	0x46ef
-	.4byte	0x46cd
+	.8byte	.LVL1807
+	.4byte	0x476a
+	.4byte	0x4748
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31008,11 +31076,11 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1806
-	.4byte	0x30c4
+	.8byte	.LVL1808
+	.4byte	0x313f
 	.uleb128 0x36
-	.8byte	.LVL1807
-	.4byte	0x3645
+	.8byte	.LVL1809
+	.4byte	0x36c0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31021,25 +31089,25 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF712
+	.uleb128 0x62
+	.4byte	.LASF713
 	.byte	0x2
 	.2byte	0x7dc
 	.byte	0x1
-	.4byte	0x4715
-	.uleb128 0x48
-	.4byte	.LASF639
+	.4byte	0x4790
+	.uleb128 0x4b
+	.4byte	.LASF640
 	.byte	0x2
 	.2byte	0x7dc
 	.4byte	0x1f04
-	.uleb128 0x49
-	.4byte	.LASF594
+	.uleb128 0x4c
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x7de
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF677
+	.uleb128 0x49
+	.4byte	.LASF678
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x5b
@@ -31047,92 +31115,92 @@ __func__.7630:
 	.8byte	.LFE281-.LFB281
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4d12
-	.uleb128 0x50
-	.4byte	.LASF612
+	.4byte	0x4d8d
+	.uleb128 0x53
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x677
 	.4byte	0x1f04
-	.4byte	.LLST329
-	.uleb128 0x52
-	.4byte	.LASF678
+	.4byte	.LLST331
+	.uleb128 0x55
+	.4byte	.LASF679
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdc9
-	.4byte	.LLST330
-	.uleb128 0x52
-	.4byte	.LASF679
+	.4byte	.LLST332
+	.uleb128 0x55
+	.4byte	.LASF680
 	.byte	0x2
 	.2byte	0x679
 	.4byte	0xdc9
-	.4byte	.LLST331
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	.LLST333
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST332
-	.uleb128 0x52
+	.4byte	.LLST334
+	.uleb128 0x55
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST333
-	.uleb128 0x52
+	.4byte	.LLST335
+	.uleb128 0x55
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x67a
 	.4byte	0xdc9
-	.4byte	.LLST334
-	.uleb128 0x52
-	.4byte	.LASF680
+	.4byte	.LLST336
+	.uleb128 0x55
+	.4byte	.LASF681
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdc9
-	.4byte	.LLST335
-	.uleb128 0x52
-	.4byte	.LASF681
+	.4byte	.LLST337
+	.uleb128 0x55
+	.4byte	.LASF682
 	.byte	0x2
 	.2byte	0x67b
 	.4byte	0xdc9
-	.4byte	.LLST336
-	.uleb128 0x52
-	.4byte	.LASF594
+	.4byte	.LLST338
+	.uleb128 0x55
+	.4byte	.LASF597
 	.byte	0x2
 	.2byte	0x67c
 	.4byte	0xdc9
-	.4byte	.LLST337
-	.uleb128 0x52
-	.4byte	.LASF682
+	.4byte	.LLST339
+	.uleb128 0x55
+	.4byte	.LASF683
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x5b
-	.4byte	.LLST338
-	.uleb128 0x52
-	.4byte	.LASF683
+	.4byte	.LLST340
+	.uleb128 0x55
+	.4byte	.LASF684
 	.byte	0x2
 	.2byte	0x67d
 	.4byte	0x5b
-	.4byte	.LLST338
-	.uleb128 0x52
+	.4byte	.LLST340
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdc9
-	.4byte	.LLST340
-	.uleb128 0x51
+	.4byte	.LLST342
+	.uleb128 0x54
 	.string	"n"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdc9
-	.4byte	.LLST341
-	.uleb128 0x51
+	.4byte	.LLST343
+	.uleb128 0x54
 	.string	"req"
 	.byte	0x2
 	.2byte	0x67e
 	.4byte	0xdc9
-	.4byte	.LLST342
-	.uleb128 0x5e
+	.4byte	.LLST344
+	.uleb128 0x60
 	.string	"lpa"
 	.byte	0x2
 	.2byte	0x67f
@@ -31140,7 +31208,7 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0x68
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdd4
@@ -31148,7 +31216,7 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -12
 	.uleb128 0x2a
-	.4byte	.LASF624
+	.4byte	.LASF625
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdd4
@@ -31156,91 +31224,91 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF614
+	.4byte	.LASF616
 	.byte	0x2
 	.2byte	0x67f
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF629
+	.uleb128 0x55
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdc9
-	.4byte	.LLST343
-	.uleb128 0x52
-	.4byte	.LASF684
+	.4byte	.LLST345
+	.uleb128 0x55
+	.4byte	.LASF685
 	.byte	0x2
 	.2byte	0x680
 	.4byte	0xdc9
-	.4byte	.LLST344
-	.uleb128 0x52
-	.4byte	.LASF685
+	.4byte	.LLST346
+	.uleb128 0x55
+	.4byte	.LASF686
 	.byte	0x2
 	.2byte	0x681
 	.4byte	0xdd4
-	.4byte	.LLST345
-	.uleb128 0x52
-	.4byte	.LASF686
+	.4byte	.LLST347
+	.uleb128 0x55
+	.4byte	.LASF687
 	.byte	0x2
 	.2byte	0x682
 	.4byte	0xdc9
-	.4byte	.LLST346
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LLST348
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x683
-	.4byte	0x2d84
-	.4byte	.LLST347
-	.uleb128 0x5f
-	.4byte	.LASF687
+	.4byte	0x2dff
+	.4byte	.LLST349
+	.uleb128 0x61
+	.4byte	.LASF688
 	.byte	0x2
 	.2byte	0x684
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x4d22
+	.4byte	0x4d9d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6925
-	.uleb128 0x56
-	.4byte	.LASF689
+	.8byte	__func__.6924
+	.uleb128 0x59
+	.4byte	.LASF690
 	.byte	0x2
 	.2byte	0x713
-	.8byte	.L1031
-	.uleb128 0x56
-	.4byte	.LASF618
+	.8byte	.L1032
+	.uleb128 0x59
+	.4byte	.LASF620
 	.byte	0x2
 	.2byte	0x71b
-	.8byte	.L1046
-	.uleb128 0x56
-	.4byte	.LASF690
+	.8byte	.L1047
+	.uleb128 0x59
+	.4byte	.LASF691
 	.byte	0x2
 	.2byte	0x7ce
-	.8byte	.L1052
-	.uleb128 0x4b
-	.4byte	.LASF691
+	.8byte	.L1053
+	.uleb128 0x4e
+	.4byte	.LASF692
 	.byte	0x2
 	.2byte	0x7d8
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x220
-	.4byte	0x4935
-	.uleb128 0x52
-	.4byte	.LASF692
+	.4byte	0x49b0
+	.uleb128 0x55
+	.4byte	.LASF693
 	.byte	0x2
 	.2byte	0x6eb
 	.4byte	0xdd4
-	.4byte	.LLST348
-	.uleb128 0x52
-	.4byte	.LASF693
+	.4byte	.LLST350
+	.uleb128 0x55
+	.4byte	.LASF694
 	.byte	0x2
 	.2byte	0x6ec
 	.4byte	0xdd4
-	.4byte	.LLST349
+	.4byte	.LLST351
 	.uleb128 0x36
-	.8byte	.LVL1428
+	.8byte	.LVL1430
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31251,23 +31319,23 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x250
-	.4byte	0x4a30
-	.uleb128 0x52
-	.4byte	.LASF694
+	.4byte	0x4aab
+	.uleb128 0x55
+	.4byte	.LASF695
 	.byte	0x2
 	.2byte	0x746
 	.4byte	0xdd4
-	.4byte	.LLST350
-	.uleb128 0x52
-	.4byte	.LASF695
+	.4byte	.LLST352
+	.uleb128 0x55
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x747
 	.4byte	0xdd4
-	.4byte	.LLST351
+	.4byte	.LLST353
 	.uleb128 0x34
-	.8byte	.LVL1471
+	.8byte	.LVL1473
 	.4byte	0x29a4
-	.4byte	0x497a
+	.4byte	0x49f5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31280,12 +31348,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1473
-	.4byte	0x3645
+	.8byte	.LVL1475
+	.4byte	0x36c0
 	.uleb128 0x34
-	.8byte	.LVL1479
-	.4byte	0x5bbb
-	.4byte	0x49ab
+	.8byte	.LVL1481
+	.4byte	0x5c36
+	.4byte	0x4a26
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31305,9 +31373,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1482
-	.4byte	0x6ca7
-	.4byte	0x49c6
+	.8byte	.LVL1484
+	.4byte	0x6d22
+	.4byte	0x4a41
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31318,9 +31386,9 @@ __func__.7630:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1483
-	.4byte	0x4d27
-	.4byte	0x49de
+	.8byte	.LVL1485
+	.4byte	0x4da2
+	.4byte	0x4a59
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31329,9 +31397,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1485
+	.8byte	.LVL1487
 	.4byte	0x29a4
-	.4byte	0x49fa
+	.4byte	0x4a75
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31344,9 +31412,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1488
-	.4byte	0x6ca7
-	.4byte	0x4a12
+	.8byte	.LVL1490
+	.4byte	0x6d22
+	.4byte	0x4a8d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31355,8 +31423,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1489
-	.4byte	0x6ca7
+	.8byte	.LVL1491
+	.4byte	0x6d22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31373,26 +31441,26 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.8byte	.LBB271
-	.8byte	.LBE271-.LBB271
-	.4byte	0x4aba
-	.uleb128 0x52
-	.4byte	.LASF696
+	.uleb128 0x63
+	.8byte	.LBB275
+	.8byte	.LBE275-.LBB275
+	.4byte	0x4b35
+	.uleb128 0x55
+	.4byte	.LASF697
 	.byte	0x2
 	.2byte	0x785
 	.4byte	0xdd4
-	.4byte	.LLST352
-	.uleb128 0x52
-	.4byte	.LASF695
+	.4byte	.LLST354
+	.uleb128 0x55
+	.4byte	.LASF696
 	.byte	0x2
 	.2byte	0x786
 	.4byte	0xdd4
-	.4byte	.LLST353
+	.4byte	.LLST355
 	.uleb128 0x34
-	.8byte	.LVL1497
+	.8byte	.LVL1499
 	.4byte	0x29a4
-	.4byte	0x4a81
+	.4byte	0x4afc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31405,9 +31473,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1498
-	.4byte	0x6ca7
-	.4byte	0x4a99
+	.8byte	.LVL1500
+	.4byte	0x6d22
+	.4byte	0x4b14
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31416,8 +31484,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1499
-	.4byte	0x5bbb
+	.8byte	.LVL1501
+	.4byte	0x5c36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31438,9 +31506,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1376
-	.4byte	0x6bca
-	.4byte	0x4ad1
+	.8byte	.LVL1378
+	.4byte	0x6c45
+	.4byte	0x4b4c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31448,9 +31516,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1381
+	.8byte	.LVL1383
 	.4byte	0x29a4
-	.4byte	0x4aee
+	.4byte	0x4b69
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31464,12 +31532,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1386
-	.4byte	0x6d36
+	.8byte	.LVL1388
+	.4byte	0x6db1
 	.uleb128 0x34
-	.8byte	.LVL1389
-	.4byte	0x4e68
-	.4byte	0x4b1f
+	.8byte	.LVL1391
+	.4byte	0x4ee3
+	.4byte	0x4b9a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31490,9 +31558,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1397
-	.4byte	0xa8ce
-	.4byte	0x4b52
+	.8byte	.LVL1399
+	.4byte	0xa949
+	.4byte	0x4bcd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31513,9 +31581,9 @@ __func__.7630:
 	.2byte	0x6aa
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1398
-	.4byte	0xa8ce
-	.4byte	0x4b85
+	.8byte	.LVL1400
+	.4byte	0xa949
+	.4byte	0x4c00
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31536,9 +31604,9 @@ __func__.7630:
 	.2byte	0x6ab
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1407
-	.4byte	0x6ca7
-	.4byte	0x4b9d
+	.8byte	.LVL1409
+	.4byte	0x6d22
+	.4byte	0x4c18
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31547,9 +31615,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1433
-	.4byte	0x5814
-	.4byte	0x4bbc
+	.8byte	.LVL1435
+	.4byte	0x588f
+	.4byte	0x4c37
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31558,9 +31626,9 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1436
+	.8byte	.LVL1438
 	.4byte	0x29a4
-	.4byte	0x4bd9
+	.4byte	0x4c54
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31574,9 +31642,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1457
-	.4byte	0x6d36
-	.4byte	0x4bf3
+	.8byte	.LVL1459
+	.4byte	0x6db1
+	.4byte	0x4c6e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31587,12 +31655,12 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1464
-	.4byte	0x3645
+	.8byte	.LVL1466
+	.4byte	0x36c0
 	.uleb128 0x34
-	.8byte	.LVL1467
-	.4byte	0x6ca7
-	.4byte	0x4c18
+	.8byte	.LVL1469
+	.4byte	0x6d22
+	.4byte	0x4c93
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31601,9 +31669,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1468
-	.4byte	0x5bbb
-	.4byte	0x4c3c
+	.8byte	.LVL1470
+	.4byte	0x5c36
+	.4byte	0x4cb7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31623,9 +31691,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1469
-	.4byte	0x6ca7
-	.4byte	0x4c54
+	.8byte	.LVL1471
+	.4byte	0x6d22
+	.4byte	0x4ccf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31634,9 +31702,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1474
-	.4byte	0x6cf6
-	.4byte	0x4c6e
+	.8byte	.LVL1476
+	.4byte	0x6d71
+	.4byte	0x4ce9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31647,9 +31715,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1476
-	.4byte	0xa8ce
-	.4byte	0x4ca1
+	.8byte	.LVL1478
+	.4byte	0xa949
+	.4byte	0x4d1c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31670,9 +31738,9 @@ __func__.7630:
 	.2byte	0x7a5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1491
-	.4byte	0x5bbb
-	.4byte	0x4cc5
+	.8byte	.LVL1493
+	.4byte	0x5c36
+	.4byte	0x4d40
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31692,9 +31760,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1492
-	.4byte	0x6cf6
-	.4byte	0x4cdf
+	.8byte	.LVL1494
+	.4byte	0x6d71
+	.4byte	0x4d5a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31705,9 +31773,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1501
-	.4byte	0xa8ce
-	.4byte	0x4d04
+	.8byte	.LVL1503
+	.4byte	0xa949
+	.4byte	0x4d7f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31722,76 +31790,76 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1503
-	.4byte	0x3645
+	.8byte	.LVL1505
+	.4byte	0x36c0
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x4d22
+	.4byte	0x4d9d
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x15
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x4d12
-	.uleb128 0x5d
-	.4byte	.LASF697
+	.4byte	0x4d8d
+	.uleb128 0x5f
+	.4byte	.LASF698
 	.byte	0x2
 	.2byte	0x65b
 	.8byte	.LFB280
 	.8byte	.LFE280-.LFB280
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4e68
-	.uleb128 0x5a
+	.4byte	0x4ee3
+	.uleb128 0x5d
 	.string	"lpa"
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdd4
-	.4byte	.LLST243
-	.uleb128 0x50
-	.4byte	.LASF663
+	.4byte	.LLST245
+	.uleb128 0x53
+	.4byte	.LASF664
 	.byte	0x2
 	.2byte	0x65b
 	.4byte	0xdd4
-	.4byte	.LLST244
-	.uleb128 0x52
-	.4byte	.LASF629
+	.4byte	.LLST246
+	.uleb128 0x55
+	.4byte	.LASF630
 	.byte	0x2
 	.2byte	0x65d
 	.4byte	0xdc9
-	.4byte	.LLST245
+	.4byte	.LLST247
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6891
+	.8byte	__func__.6890
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x100
-	.4byte	0x4e2c
-	.uleb128 0x51
+	.4byte	0x4ea7
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x661
 	.4byte	0xdc9
-	.4byte	.LLST246
-	.uleb128 0x52
-	.4byte	.LASF608
+	.4byte	.LLST248
+	.uleb128 0x55
+	.4byte	.LASF587
 	.byte	0x2
 	.2byte	0x662
 	.4byte	0xdc9
-	.4byte	.LLST247
-	.uleb128 0x52
+	.4byte	.LLST249
+	.uleb128 0x55
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x663
 	.4byte	0xdc9
-	.4byte	.LLST248
+	.4byte	.LLST250
 	.uleb128 0x34
-	.8byte	.LVL942
-	.4byte	0x66e6
-	.4byte	0x4de4
+	.8byte	.LVL944
+	.4byte	0x6761
+	.4byte	0x4e5f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31806,9 +31874,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL943
-	.4byte	0xa8ce
-	.4byte	0x4e17
+	.8byte	.LVL945
+	.4byte	0xa949
+	.4byte	0x4e92
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31829,8 +31897,8 @@ __func__.7630:
 	.2byte	0x667
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL944
-	.4byte	0x68bb
+	.8byte	.LVL946
+	.4byte	0x6936
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31840,9 +31908,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL936
-	.4byte	0x6cf6
-	.4byte	0x4e47
+	.8byte	.LVL938
+	.4byte	0x6d71
+	.4byte	0x4ec2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31854,8 +31922,8 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL946
-	.4byte	0x5bbb
+	.8byte	.LVL948
+	.4byte	0x5c36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31875,43 +31943,43 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF698
+	.uleb128 0x5f
+	.4byte	.LASF699
 	.byte	0x2
 	.2byte	0x647
 	.8byte	.LFB279
 	.8byte	.LFE279-.LFB279
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4ec5
-	.uleb128 0x62
-	.4byte	.LASF612
+	.4byte	0x4f40
+	.uleb128 0x64
+	.4byte	.LASF614
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0x1f04
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x50
+	.uleb128 0x53
 	.4byte	.LASF380
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdc9
 	.4byte	.LLST90
-	.uleb128 0x50
+	.uleb128 0x53
 	.4byte	.LASF382
 	.byte	0x2
 	.2byte	0x647
 	.4byte	0xdc9
 	.4byte	.LLST91
-	.uleb128 0x52
-	.4byte	.LASF592
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x649
 	.4byte	0xdc9
 	.4byte	.LLST92
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF699
+	.uleb128 0x49
+	.4byte	.LASF700
 	.byte	0x2
 	.2byte	0x63e
 	.4byte	0x5b
@@ -31919,13 +31987,13 @@ __func__.7630:
 	.8byte	.LFE278-.LFB278
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f10
+	.4byte	0x4f8b
 	.uleb128 0x45
-	.8byte	.LVL1106
-	.4byte	0x4f10
+	.8byte	.LVL1108
+	.4byte	0x4f8b
 	.uleb128 0x36
-	.8byte	.LVL1107
-	.4byte	0x4fa8
+	.8byte	.LVL1109
+	.4byte	0x5023
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31934,25 +32002,25 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF700
+	.uleb128 0x5f
+	.4byte	.LASF701
 	.byte	0x2
 	.2byte	0x627
 	.8byte	.LFB277
 	.8byte	.LFE277-.LFB277
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4f6a
-	.uleb128 0x52
+	.4byte	0x4fe5
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x629
 	.4byte	0xdc9
-	.4byte	.LLST274
+	.4byte	.LLST276
 	.uleb128 0x34
-	.8byte	.LVL1103
+	.8byte	.LVL1105
 	.4byte	0x259f
-	.4byte	0x4f55
+	.4byte	0x4fd0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -31960,7 +32028,7 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1104
+	.8byte	.LVL1106
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -31970,8 +32038,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF701
+	.uleb128 0x49
+	.4byte	.LASF702
 	.byte	0x2
 	.2byte	0x617
 	.4byte	0x5b
@@ -31979,10 +32047,10 @@ __func__.7630:
 	.8byte	.LFE276-.LFB276
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x4fa8
+	.4byte	0x5023
 	.uleb128 0x36
-	.8byte	.LVL1102
-	.4byte	0x4fa8
+	.8byte	.LVL1104
+	.4byte	0x5023
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -31991,8 +32059,8 @@ __func__.7630:
 	.8byte	.LANCHOR149
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF702
+	.uleb128 0x49
+	.4byte	.LASF703
 	.byte	0x2
 	.2byte	0x5b9
 	.4byte	0x5b
@@ -32000,77 +32068,77 @@ __func__.7630:
 	.8byte	.LFE275-.LFB275
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x517a
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x51f5
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x5b9
-	.4byte	0x517a
-	.4byte	.LLST263
-	.uleb128 0x52
-	.4byte	.LASF704
+	.4byte	0x51f5
+	.4byte	.LLST265
+	.uleb128 0x55
+	.4byte	.LASF705
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xdea
-	.4byte	.LLST264
-	.uleb128 0x52
+	.4byte	.LLST266
+	.uleb128 0x55
 	.4byte	.LASF299
 	.byte	0x2
 	.2byte	0x5bb
 	.4byte	0xdea
-	.4byte	.LLST265
-	.uleb128 0x52
-	.4byte	.LASF705
+	.4byte	.LLST267
+	.uleb128 0x55
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x5bc
 	.4byte	0xdea
-	.4byte	.LLST266
-	.uleb128 0x52
+	.4byte	.LLST268
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x5bd
 	.4byte	0xdc9
-	.4byte	.LLST267
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST269
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x5be
 	.4byte	0x1001
-	.4byte	.LLST268
-	.uleb128 0x52
+	.4byte	.LLST270
+	.uleb128 0x55
 	.4byte	.LASF310
 	.byte	0x2
 	.2byte	0x5bf
 	.4byte	0x10f8
-	.4byte	.LLST269
-	.uleb128 0x52
+	.4byte	.LLST271
+	.uleb128 0x55
 	.4byte	.LASF311
 	.byte	0x2
 	.2byte	0x5c0
 	.4byte	0x1001
-	.4byte	.LLST270
-	.uleb128 0x52
+	.4byte	.LLST272
+	.uleb128 0x55
 	.4byte	.LASF307
 	.byte	0x2
 	.2byte	0x5c1
 	.4byte	0xdc9
-	.4byte	.LLST271
-	.uleb128 0x52
-	.4byte	.LASF707
+	.4byte	.LLST273
+	.uleb128 0x55
+	.4byte	.LASF708
 	.byte	0x2
 	.2byte	0x5c2
 	.4byte	0xdc9
-	.4byte	.LLST272
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST274
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x5c3
-	.4byte	0x5180
-	.4byte	.LLST273
+	.4byte	0x51fb
+	.4byte	.LLST275
 	.uleb128 0x34
-	.8byte	.LVL1062
+	.8byte	.LVL1064
 	.4byte	0x259f
-	.4byte	0x50a0
+	.4byte	0x511b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32093,9 +32161,9 @@ __func__.7630:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1067
-	.4byte	0x6bca
-	.4byte	0x50b7
+	.8byte	.LVL1069
+	.4byte	0x6c45
+	.4byte	0x5132
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32103,9 +32171,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1072
-	.4byte	0x62df
-	.4byte	0x50cf
+	.8byte	.LVL1074
+	.4byte	0x635a
+	.4byte	0x514a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32114,9 +32182,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1073
-	.4byte	0x6287
-	.4byte	0x50e7
+	.8byte	.LVL1075
+	.4byte	0x6302
+	.4byte	0x5162
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32125,9 +32193,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1074
-	.4byte	0x610d
-	.4byte	0x50ff
+	.8byte	.LVL1076
+	.4byte	0x6188
+	.4byte	0x517a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32136,9 +32204,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1075
-	.4byte	0x610d
-	.4byte	0x5117
+	.8byte	.LVL1077
+	.4byte	0x6188
+	.4byte	0x5192
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32147,9 +32215,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1083
+	.8byte	.LVL1085
 	.4byte	0x29a4
-	.4byte	0x5139
+	.4byte	0x51b4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32168,9 +32236,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1087
+	.8byte	.LVL1089
 	.4byte	0x29a4
-	.4byte	0x515b
+	.4byte	0x51d6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32189,7 +32257,7 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1089
+	.8byte	.LVL1091
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32215,8 +32283,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x1280
-	.uleb128 0x46
-	.4byte	.LASF709
+	.uleb128 0x49
+	.4byte	.LASF710
 	.byte	0x2
 	.2byte	0x54f
 	.4byte	0x5b
@@ -32224,23 +32292,23 @@ __func__.7630:
 	.8byte	.LFE274-.LFB274
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5365
-	.uleb128 0x52
-	.4byte	.LASF705
+	.4byte	0x53e0
+	.uleb128 0x55
+	.4byte	.LASF706
 	.byte	0x2
 	.2byte	0x551
 	.4byte	0xdea
-	.4byte	.LLST461
+	.4byte	.LLST463
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6828
+	.8byte	__func__.6827
 	.uleb128 0x34
-	.8byte	.LVL2076
+	.8byte	.LVL2078
 	.4byte	0x259f
-	.4byte	0x51e2
+	.4byte	0x525d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32248,9 +32316,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2077
-	.4byte	0x6bca
-	.4byte	0x51f9
+	.8byte	.LVL2079
+	.4byte	0x6c45
+	.4byte	0x5274
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32258,9 +32326,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2079
-	.4byte	0xa8ce
-	.4byte	0x522c
+	.8byte	.LVL2081
+	.4byte	0xa949
+	.4byte	0x52a7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32281,9 +32349,9 @@ __func__.7630:
 	.2byte	0x56c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2080
-	.4byte	0xa8ce
-	.4byte	0x525f
+	.8byte	.LVL2082
+	.4byte	0xa949
+	.4byte	0x52da
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32304,9 +32372,9 @@ __func__.7630:
 	.2byte	0x56e
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2082
+	.8byte	.LVL2084
 	.4byte	0x2527
-	.4byte	0x527d
+	.4byte	0x52f8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32321,15 +32389,15 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2083
+	.8byte	.LVL2085
 	.4byte	0x2527
 	.uleb128 0x45
-	.8byte	.LVL2084
+	.8byte	.LVL2086
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL2085
-	.4byte	0xa8ce
-	.4byte	0x52ca
+	.8byte	.LVL2087
+	.4byte	0xa949
+	.4byte	0x5345
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32350,9 +32418,9 @@ __func__.7630:
 	.2byte	0x584
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2086
-	.4byte	0x4593
-	.4byte	0x52e9
+	.8byte	.LVL2088
+	.4byte	0x460e
+	.4byte	0x5364
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32361,9 +32429,9 @@ __func__.7630:
 	.8byte	.LANCHOR51
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2087
-	.4byte	0x4593
-	.4byte	0x5308
+	.8byte	.LVL2089
+	.4byte	0x460e
+	.4byte	0x5383
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32372,9 +32440,9 @@ __func__.7630:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2088
-	.4byte	0x4593
-	.4byte	0x5327
+	.8byte	.LVL2090
+	.4byte	0x460e
+	.4byte	0x53a2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32383,9 +32451,9 @@ __func__.7630:
 	.8byte	.LANCHOR53
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2089
-	.4byte	0x4593
-	.4byte	0x5346
+	.8byte	.LVL2091
+	.4byte	0x460e
+	.4byte	0x53c1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32394,7 +32462,7 @@ __func__.7630:
 	.8byte	.LANCHOR82
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2091
+	.8byte	.LVL2093
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -32414,8 +32482,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF710
+	.uleb128 0x49
+	.4byte	.LASF711
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0x5b
@@ -32423,39 +32491,39 @@ __func__.7630:
 	.8byte	.LFE273-.LFB273
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5398
-	.uleb128 0x50
-	.4byte	.LASF711
+	.4byte	0x5413
+	.uleb128 0x53
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x54a
 	.4byte	0xdc9
 	.4byte	.LLST89
 	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF713
+	.uleb128 0x62
+	.4byte	.LASF714
 	.byte	0x2
 	.2byte	0x542
 	.byte	0x1
-	.4byte	0x53be
-	.uleb128 0x48
-	.4byte	.LASF711
+	.4byte	0x5439
+	.uleb128 0x4b
+	.4byte	.LASF712
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0xdc9
-	.uleb128 0x48
-	.4byte	.LASF588
+	.uleb128 0x4b
+	.4byte	.LASF591
 	.byte	0x2
 	.2byte	0x542
 	.4byte	0x5b
 	.byte	0
-	.uleb128 0x4f
-	.4byte	.LASF715
+	.uleb128 0x52
+	.4byte	.LASF716
 	.byte	0x2
 	.2byte	0x535
 	.4byte	0x5b
 	.byte	0x1
-	.uleb128 0x46
-	.4byte	.LASF716
+	.uleb128 0x49
+	.4byte	.LASF717
 	.byte	0x2
 	.2byte	0x446
 	.4byte	0x5b
@@ -32463,59 +32531,59 @@ __func__.7630:
 	.8byte	.LFE270-.LFB270
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5619
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	0x5694
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdc9
-	.4byte	.LLST256
-	.uleb128 0x52
-	.4byte	.LASF717
+	.4byte	.LLST258
+	.uleb128 0x55
+	.4byte	.LASF718
 	.byte	0x2
 	.2byte	0x448
 	.4byte	0xdc9
-	.4byte	.LLST257
-	.uleb128 0x52
+	.4byte	.LLST259
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdc9
-	.4byte	.LLST258
-	.uleb128 0x52
+	.4byte	.LLST260
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x2
 	.2byte	0x449
 	.4byte	0xdc9
-	.4byte	.LLST259
-	.uleb128 0x51
+	.4byte	.LLST261
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xdea
-	.4byte	.LLST260
-	.uleb128 0x51
+	.4byte	.LLST262
+	.uleb128 0x54
 	.string	"j"
 	.byte	0x2
 	.2byte	0x44a
 	.4byte	0xdea
-	.4byte	.LLST261
-	.uleb128 0x52
-	.4byte	.LASF718
+	.4byte	.LLST263
+	.uleb128 0x55
+	.4byte	.LASF719
 	.byte	0x2
 	.2byte	0x44b
-	.4byte	0x5180
-	.4byte	.LLST262
+	.4byte	0x51fb
+	.4byte	.LLST264
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6771
+	.8byte	__func__.6770
 	.uleb128 0x34
-	.8byte	.LVL984
+	.8byte	.LVL986
 	.4byte	0x259f
-	.4byte	0x5483
+	.4byte	0x54fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32523,9 +32591,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL985
+	.8byte	.LVL987
 	.4byte	0x259f
-	.4byte	0x549a
+	.4byte	0x5515
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32533,9 +32601,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL986
+	.8byte	.LVL988
 	.4byte	0x259f
-	.4byte	0x54b1
+	.4byte	0x552c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32543,9 +32611,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL987
+	.8byte	.LVL989
 	.4byte	0x259f
-	.4byte	0x54c8
+	.4byte	0x5543
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32553,9 +32621,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL988
+	.8byte	.LVL990
 	.4byte	0x259f
-	.4byte	0x54f2
+	.4byte	0x556d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32575,9 +32643,9 @@ __func__.7630:
 	.byte	0x3c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL991
-	.4byte	0x6d91
-	.4byte	0x550d
+	.8byte	.LVL993
+	.4byte	0x6e0c
+	.4byte	0x5588
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32588,9 +32656,9 @@ __func__.7630:
 	.byte	0x2
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL993
-	.4byte	0x74e5
-	.4byte	0x5525
+	.8byte	.LVL995
+	.4byte	0x7560
+	.4byte	0x55a0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32599,9 +32667,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1002
+	.8byte	.LVL1004
 	.4byte	0x29a4
-	.4byte	0x5542
+	.4byte	0x55bd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32615,9 +32683,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1007
+	.8byte	.LVL1009
 	.4byte	0x29a4
-	.4byte	0x555e
+	.4byte	0x55d9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32630,9 +32698,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1012
-	.4byte	0x6a7f
-	.4byte	0x5576
+	.8byte	.LVL1014
+	.4byte	0x6afa
+	.4byte	0x55f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32641,9 +32709,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1013
-	.4byte	0xa8ce
-	.4byte	0x55a4
+	.8byte	.LVL1015
+	.4byte	0xa949
+	.4byte	0x561f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32665,9 +32733,9 @@ __func__.7630:
 	.2byte	0x48a
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1024
-	.4byte	0xa8ce
-	.4byte	0x55d2
+	.8byte	.LVL1026
+	.4byte	0xa949
+	.4byte	0x564d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32689,9 +32757,9 @@ __func__.7630:
 	.2byte	0x4b3
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1035
-	.4byte	0x6a7f
-	.4byte	0x55e9
+	.8byte	.LVL1037
+	.4byte	0x6afa
+	.4byte	0x5664
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32699,8 +32767,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1037
-	.4byte	0xa8ce
+	.8byte	.LVL1039
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32721,8 +32789,8 @@ __func__.7630:
 	.2byte	0x530
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF719
+	.uleb128 0x49
+	.4byte	.LASF720
 	.byte	0x2
 	.2byte	0x3eb
 	.4byte	0x5b
@@ -32730,27 +32798,27 @@ __func__.7630:
 	.8byte	.LFE269-.LFB269
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x57c2
-	.uleb128 0x52
+	.4byte	0x583d
+	.uleb128 0x55
 	.4byte	.LASF300
 	.byte	0x2
 	.2byte	0x3ed
 	.4byte	0xdc9
-	.4byte	.LLST383
-	.uleb128 0x52
-	.4byte	.LASF720
+	.4byte	.LLST385
+	.uleb128 0x55
+	.4byte	.LASF721
 	.byte	0x2
 	.2byte	0x3ee
-	.4byte	0x57c2
-	.4byte	.LLST384
-	.uleb128 0x52
-	.4byte	.LASF721
+	.4byte	0x583d
+	.4byte	.LLST386
+	.uleb128 0x55
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x3ef
 	.4byte	0xdc9
-	.4byte	.LLST385
-	.uleb128 0x4b
-	.4byte	.LASF722
+	.4byte	.LLST387
+	.uleb128 0x4e
+	.4byte	.LASF723
 	.byte	0x2
 	.2byte	0x41c
 	.uleb128 0x3f
@@ -32758,11 +32826,11 @@ __func__.7630:
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6749
+	.8byte	__func__.6748
 	.uleb128 0x34
-	.8byte	.LVL1663
+	.8byte	.LVL1665
 	.4byte	0x259f
-	.4byte	0x569e
+	.4byte	0x5719
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32771,9 +32839,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1664
+	.8byte	.LVL1666
 	.4byte	0x2527
-	.4byte	0x56c3
+	.4byte	0x573e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -32788,15 +32856,15 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1665
+	.8byte	.LVL1667
 	.4byte	0x2527
 	.uleb128 0x45
-	.8byte	.LVL1666
+	.8byte	.LVL1668
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL1667
-	.4byte	0x58c9
-	.4byte	0x56f5
+	.8byte	.LVL1669
+	.4byte	0x5944
+	.4byte	0x5770
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32805,9 +32873,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1669
+	.8byte	.LVL1671
 	.4byte	0x27e7
-	.4byte	0x571c
+	.4byte	0x5797
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32831,12 +32899,12 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1671
-	.4byte	0x6905
+	.8byte	.LVL1673
+	.4byte	0x6980
 	.uleb128 0x34
-	.8byte	.LVL1672
+	.8byte	.LVL1674
 	.4byte	0x27e7
-	.4byte	0x5750
+	.4byte	0x57cb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32860,9 +32928,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1673
-	.4byte	0xa8ce
-	.4byte	0x5783
+	.8byte	.LVL1675
+	.4byte	0xa949
+	.4byte	0x57fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32883,9 +32951,9 @@ __func__.7630:
 	.2byte	0x433
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1676
-	.4byte	0xa8ce
-	.4byte	0x57a8
+	.8byte	.LVL1678
+	.4byte	0xa949
+	.4byte	0x5823
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32900,8 +32968,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1677
-	.4byte	0x6a7f
+	.8byte	.LVL1679
+	.4byte	0x6afa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -32918,77 +32986,77 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x12d8
-	.uleb128 0x60
-	.4byte	.LASF723
+	.uleb128 0x62
+	.4byte	.LASF724
 	.byte	0x2
 	.2byte	0x3b2
 	.byte	0x1
-	.4byte	0x5814
+	.4byte	0x588f
+	.uleb128 0x50
 	.uleb128 0x4d
-	.uleb128 0x4a
 	.string	"lpa"
 	.byte	0x2
 	.2byte	0x3b7
 	.4byte	0xdd4
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"ppa"
 	.byte	0x2
 	.2byte	0x3b8
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF724
+	.uleb128 0x4c
+	.4byte	.LASF725
 	.byte	0x2
 	.2byte	0x3b9
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF667
+	.uleb128 0x4c
+	.4byte	.LASF668
 	.byte	0x2
 	.2byte	0x3ba
 	.4byte	0xdf5
-	.uleb128 0x49
-	.4byte	.LASF596
+	.uleb128 0x4c
+	.4byte	.LASF599
 	.byte	0x2
 	.2byte	0x3bb
-	.4byte	0x2d84
+	.4byte	0x2dff
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF725
+	.uleb128 0x5f
+	.4byte	.LASF726
 	.byte	0x2
 	.2byte	0x380
 	.8byte	.LFB267
 	.8byte	.LFE267-.LFB267
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x58c9
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x5944
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x380
-	.4byte	0x517a
-	.4byte	.LLST252
-	.uleb128 0x51
+	.4byte	0x51f5
+	.4byte	.LLST254
+	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x2
 	.2byte	0x382
 	.4byte	0xdd4
-	.4byte	.LLST253
-	.uleb128 0x52
+	.4byte	.LLST255
+	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x383
 	.4byte	0xdc9
-	.4byte	.LLST254
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST256
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x384
 	.4byte	0x1001
-	.4byte	.LLST255
+	.4byte	.LLST257
 	.uleb128 0x34
-	.8byte	.LVL978
+	.8byte	.LVL980
 	.4byte	0x29a4
-	.4byte	0x589b
+	.4byte	0x5916
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33007,9 +33075,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x44
-	.8byte	.LVL980
-	.4byte	0x5e2b
-	.4byte	0x58b4
+	.8byte	.LVL982
+	.4byte	0x5ea6
+	.4byte	0x592f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33019,7 +33087,7 @@ __func__.7630:
 	.byte	0x50
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL982
+	.8byte	.LVL984
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33029,25 +33097,25 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.byte	0
-	.uleb128 0x60
-	.4byte	.LASF726
+	.uleb128 0x62
+	.4byte	.LASF727
 	.byte	0x2
 	.2byte	0x371
 	.byte	0x1
-	.4byte	0x58ed
-	.uleb128 0x48
+	.4byte	0x5968
+	.uleb128 0x4b
 	.4byte	.LASF393
 	.byte	0x2
 	.2byte	0x371
 	.4byte	0xdd4
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x2
 	.2byte	0x373
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF727
+	.uleb128 0x49
+	.4byte	.LASF728
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0x5b
@@ -33055,23 +33123,23 @@ __func__.7630:
 	.8byte	.LFE265-.LFB265
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5955
-	.uleb128 0x50
-	.4byte	.LASF728
+	.4byte	0x59d0
+	.uleb128 0x53
+	.4byte	.LASF729
 	.byte	0x2
 	.2byte	0x35c
 	.4byte	0xdd4
-	.4byte	.LLST373
-	.uleb128 0x52
-	.4byte	.LASF729
+	.4byte	.LLST375
+	.uleb128 0x55
+	.4byte	.LASF730
 	.byte	0x2
 	.2byte	0x35e
 	.4byte	0xdd4
-	.4byte	.LLST374
+	.4byte	.LLST376
 	.uleb128 0x34
-	.8byte	.LVL1625
-	.4byte	0x5a7d
-	.4byte	0x5947
+	.8byte	.LVL1627
+	.4byte	0x5af8
+	.4byte	0x59c2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33080,11 +33148,11 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1626
-	.4byte	0x4444
+	.8byte	.LVL1628
+	.4byte	0x44bf
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF730
+	.uleb128 0x49
+	.4byte	.LASF731
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdd4
@@ -33092,50 +33160,50 @@ __func__.7630:
 	.8byte	.LFE264-.LFB264
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5a77
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	0x5af2
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST375
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST377
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST376
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST378
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x336
-	.4byte	0x5a77
-	.4byte	.LLST377
-	.uleb128 0x51
+	.4byte	0x5af2
+	.4byte	.LLST379
+	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdc9
-	.4byte	.LLST378
-	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LLST380
+	.uleb128 0x55
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x338
 	.4byte	0xdc9
-	.4byte	.LLST379
-	.uleb128 0x51
+	.4byte	.LLST381
+	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
 	.2byte	0x339
 	.4byte	0xdd4
-	.4byte	.LLST380
-	.uleb128 0x52
-	.4byte	.LASF735
+	.4byte	.LLST382
+	.uleb128 0x55
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x33a
 	.4byte	0xdd4
-	.4byte	.LLST381
-	.uleb128 0x5e
+	.4byte	.LLST383
+	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
 	.2byte	0x33b
@@ -33143,12 +33211,12 @@ __func__.7630:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x52
-	.4byte	.LASF736
+	.uleb128 0x55
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x33c
 	.4byte	0xdd4
-	.4byte	.LLST382
+	.4byte	.LLST384
 	.uleb128 0x2a
 	.4byte	.LASF565
 	.byte	0x2
@@ -33158,9 +33226,9 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1645
+	.8byte	.LVL1647
 	.4byte	0x29a4
-	.4byte	0x5a39
+	.4byte	0x5ab4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33179,9 +33247,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1647
+	.8byte	.LVL1649
 	.4byte	0x2527
-	.4byte	0x5a57
+	.4byte	0x5ad2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33196,7 +33264,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1654
+	.8byte	.LVL1656
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33220,8 +33288,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0xdbe
-	.uleb128 0x46
-	.4byte	.LASF737
+	.uleb128 0x49
+	.4byte	.LASF738
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdd4
@@ -33229,50 +33297,50 @@ __func__.7630:
 	.8byte	.LFE263-.LFB263
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5bbb
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	0x5c36
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdd4
-	.4byte	.LLST365
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST367
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x2
 	.2byte	0x311
 	.4byte	0xdd4
-	.4byte	.LLST366
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST368
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x311
-	.4byte	0x5a77
-	.4byte	.LLST367
-	.uleb128 0x51
+	.4byte	0x5af2
+	.4byte	.LLST369
+	.uleb128 0x54
 	.string	"len"
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdc9
-	.4byte	.LLST368
-	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LLST370
+	.uleb128 0x55
+	.4byte	.LASF735
 	.byte	0x2
 	.2byte	0x313
 	.4byte	0xdc9
-	.4byte	.LLST369
-	.uleb128 0x51
+	.4byte	.LLST371
+	.uleb128 0x54
 	.string	"ppn"
 	.byte	0x2
 	.2byte	0x314
 	.4byte	0xdd4
-	.4byte	.LLST370
-	.uleb128 0x52
-	.4byte	.LASF735
+	.4byte	.LLST372
+	.uleb128 0x55
+	.4byte	.LASF736
 	.byte	0x2
 	.2byte	0x315
 	.4byte	0xdd4
-	.4byte	.LLST371
-	.uleb128 0x5e
+	.4byte	.LLST373
+	.uleb128 0x60
 	.string	"req"
 	.byte	0x2
 	.2byte	0x316
@@ -33280,12 +33348,12 @@ __func__.7630:
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x52
-	.4byte	.LASF736
+	.uleb128 0x55
+	.4byte	.LASF737
 	.byte	0x2
 	.2byte	0x317
 	.4byte	0xdd4
-	.4byte	.LLST372
+	.4byte	.LLST374
 	.uleb128 0x2a
 	.4byte	.LASF565
 	.byte	0x2
@@ -33295,9 +33363,9 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x34
-	.8byte	.LVL1606
+	.8byte	.LVL1608
 	.4byte	0x29a4
-	.4byte	0x5b61
+	.4byte	0x5bdc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33316,9 +33384,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1608
+	.8byte	.LVL1610
 	.4byte	0x2527
-	.4byte	0x5b82
+	.4byte	0x5bfd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33335,9 +33403,9 @@ __func__.7630:
 	.byte	0x4
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1612
-	.4byte	0x5e2b
-	.4byte	0x5ba7
+	.8byte	.LVL1614
+	.4byte	0x5ea6
+	.4byte	0x5c22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33352,7 +33420,7 @@ __func__.7630:
 	.sleb128 -1
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1617
+	.8byte	.LVL1619
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -33361,8 +33429,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF738
+	.uleb128 0x49
+	.4byte	.LASF739
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x5b
@@ -33370,58 +33438,58 @@ __func__.7630:
 	.8byte	.LFE262-.LFB262
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5cd3
-	.uleb128 0x5a
+	.4byte	0x5d4e
+	.uleb128 0x5d
 	.string	"lpn"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0xdd4
-	.4byte	.LLST237
-	.uleb128 0x5a
+	.4byte	.LLST239
+	.uleb128 0x5d
 	.string	"ppn"
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x1001
-	.4byte	.LLST238
-	.uleb128 0x50
-	.4byte	.LASF739
+	.4byte	.LLST240
+	.uleb128 0x53
+	.4byte	.LASF740
 	.byte	0x2
 	.2byte	0x2f0
 	.4byte	0x5b
-	.4byte	.LLST239
-	.uleb128 0x52
-	.4byte	.LASF740
+	.4byte	.LLST241
+	.uleb128 0x55
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdc9
-	.4byte	.LLST240
-	.uleb128 0x52
-	.4byte	.LASF741
+	.4byte	.LLST242
+	.uleb128 0x55
+	.4byte	.LASF742
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdc9
-	.4byte	.LLST241
-	.uleb128 0x52
-	.4byte	.LASF742
+	.4byte	.LLST243
+	.uleb128 0x55
+	.4byte	.LASF743
 	.byte	0x2
 	.2byte	0x2f2
 	.4byte	0xdc9
-	.4byte	.LLST242
+	.4byte	.LLST244
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x5ce3
+	.4byte	0x5d5e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6676
-	.uleb128 0x56
-	.4byte	.LASF743
+	.8byte	__func__.6675
+	.uleb128 0x59
+	.4byte	.LASF744
 	.byte	0x2
 	.2byte	0x2fb
-	.8byte	.L656
+	.8byte	.L657
 	.uleb128 0x34
-	.8byte	.LVL920
-	.4byte	0xa8ce
-	.4byte	0x5c93
+	.8byte	.LVL922
+	.4byte	0xa949
+	.4byte	0x5d0e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33442,12 +33510,12 @@ __func__.7630:
 	.2byte	0x2f7
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL923
-	.4byte	0x5d3a
-	.uleb128 0x34
 	.8byte	.LVL925
-	.4byte	0x5dcd
-	.4byte	0x5cb8
+	.4byte	0x5db5
+	.uleb128 0x34
+	.8byte	.LVL927
+	.4byte	0x5e48
+	.4byte	0x5d33
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33456,8 +33524,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL926
-	.4byte	0x63c2
+	.8byte	.LVL928
+	.4byte	0x643d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33474,15 +33542,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x5ce3
+	.4byte	0x5d5e
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x8
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x5cd3
-	.uleb128 0x46
-	.4byte	.LASF744
+	.4byte	0x5d4e
+	.uleb128 0x49
+	.4byte	.LASF745
 	.byte	0x2
 	.2byte	0x2e3
 	.4byte	0x5b
@@ -33490,19 +33558,19 @@ __func__.7630:
 	.8byte	.LFE261-.LFB261
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5d3a
-	.uleb128 0x51
+	.4byte	0x5db5
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x2e5
 	.4byte	0xdc9
-	.4byte	.LLST328
+	.4byte	.LLST330
 	.uleb128 0x45
-	.8byte	.LVL1361
-	.4byte	0x57c8
+	.8byte	.LVL1363
+	.4byte	0x5843
 	.uleb128 0x36
-	.8byte	.LVL1364
-	.4byte	0x5dcd
+	.8byte	.LVL1366
+	.4byte	0x5e48
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33511,8 +33579,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF745
+	.uleb128 0x49
+	.4byte	.LASF746
 	.byte	0x2
 	.2byte	0x2bb
 	.4byte	0xdc9
@@ -33520,34 +33588,34 @@ __func__.7630:
 	.8byte	.LFE260-.LFB260
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5dcd
-	.uleb128 0x51
+	.4byte	0x5e48
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x2
 	.2byte	0x2bd
 	.4byte	0xdc9
 	.4byte	.LLST83
-	.uleb128 0x52
-	.4byte	.LASF746
+	.uleb128 0x55
+	.4byte	.LASF747
 	.byte	0x2
 	.2byte	0x2be
 	.4byte	0xdc9
 	.4byte	.LLST84
-	.uleb128 0x52
-	.4byte	.LASF747
+	.uleb128 0x55
+	.4byte	.LASF748
 	.byte	0x2
 	.2byte	0x2bf
 	.4byte	0xdd4
 	.4byte	.LLST85
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x4d22
+	.4byte	0x4d9d
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6659
+	.8byte	__func__.6658
 	.uleb128 0x36
 	.8byte	.LVL237
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33568,8 +33636,8 @@ __func__.7630:
 	.2byte	0x2df
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF748
+	.uleb128 0x49
+	.4byte	.LASF749
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0x5b
@@ -33577,22 +33645,22 @@ __func__.7630:
 	.8byte	.LFE259-.LFB259
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5e2b
-	.uleb128 0x50
-	.4byte	.LASF740
+	.4byte	0x5ea6
+	.uleb128 0x53
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x2b1
 	.4byte	0xdc9
-	.4byte	.LLST235
-	.uleb128 0x52
+	.4byte	.LLST237
+	.uleb128 0x55
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x2b3
 	.4byte	0xdd4
-	.4byte	.LLST236
+	.4byte	.LLST238
 	.uleb128 0x36
-	.8byte	.LVL913
-	.4byte	0x5e2b
+	.8byte	.LVL915
+	.4byte	0x5ea6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33601,8 +33669,8 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF749
+	.uleb128 0x49
+	.4byte	.LASF750
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0x5b
@@ -33610,57 +33678,57 @@ __func__.7630:
 	.8byte	.LFE258-.LFB258
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x5fbc
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x6037
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x276
-	.4byte	0x517a
-	.4byte	.LLST222
-	.uleb128 0x50
+	.4byte	0x51f5
+	.4byte	.LLST224
+	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0xdd4
-	.4byte	.LLST223
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST225
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x2
 	.2byte	0x276
 	.4byte	0x1001
-	.4byte	.LLST224
-	.uleb128 0x52
+	.4byte	.LLST226
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x278
 	.4byte	0xdd4
-	.4byte	.LLST225
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST227
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x279
-	.4byte	0x5180
-	.4byte	.LLST226
-	.uleb128 0x52
-	.4byte	.LASF721
+	.4byte	0x51fb
+	.4byte	.LLST228
+	.uleb128 0x55
+	.4byte	.LASF722
 	.byte	0x2
 	.2byte	0x27a
 	.4byte	0xdc9
-	.4byte	.LLST227
-	.uleb128 0x4b
-	.4byte	.LASF750
+	.4byte	.LLST229
+	.uleb128 0x4e
+	.4byte	.LASF751
 	.byte	0x2
 	.2byte	0x27c
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6634
+	.8byte	__func__.6633
 	.uleb128 0x34
-	.8byte	.LVL871
-	.4byte	0x5fbc
-	.4byte	0x5ee0
+	.8byte	.LVL873
+	.4byte	0x6037
+	.4byte	0x5f5b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33669,9 +33737,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL872
-	.4byte	0xa8ce
-	.4byte	0x5f0c
+	.8byte	.LVL874
+	.4byte	0xa949
+	.4byte	0x5f87
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33692,9 +33760,9 @@ __func__.7630:
 	.2byte	0x28a
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL873
-	.4byte	0xa8ce
-	.4byte	0x5f38
+	.8byte	.LVL875
+	.4byte	0xa949
+	.4byte	0x5fb3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33715,9 +33783,9 @@ __func__.7630:
 	.2byte	0x28b
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL875
+	.8byte	.LVL877
 	.4byte	0x259f
-	.4byte	0x5f54
+	.4byte	0x5fcf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33730,9 +33798,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL878
+	.8byte	.LVL880
 	.4byte	0x27e7
-	.4byte	0x5f7b
+	.4byte	0x5ff6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33756,9 +33824,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL880
-	.4byte	0xa8ce
-	.4byte	0x5f9a
+	.8byte	.LVL882
+	.4byte	0xa949
+	.4byte	0x6015
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33767,8 +33835,8 @@ __func__.7630:
 	.8byte	.LC86
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL881
-	.4byte	0xa8ce
+	.8byte	.LVL883
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33783,8 +33851,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF751
+	.uleb128 0x49
+	.4byte	.LASF752
 	.byte	0x2
 	.2byte	0x246
 	.4byte	0x5b
@@ -33792,58 +33860,58 @@ __func__.7630:
 	.8byte	.LFE257-.LFB257
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x60f8
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x6173
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x246
-	.4byte	0x517a
-	.4byte	.LLST216
-	.uleb128 0x49
+	.4byte	0x51f5
+	.4byte	.LLST218
+	.uleb128 0x4c
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdc9
-	.uleb128 0x52
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x248
 	.4byte	0xdc9
-	.4byte	.LLST217
-	.uleb128 0x52
-	.4byte	.LASF752
+	.4byte	.LLST219
+	.uleb128 0x55
+	.4byte	.LASF753
 	.byte	0x2
 	.2byte	0x249
 	.4byte	0xdc9
-	.4byte	.LLST218
-	.uleb128 0x52
-	.4byte	.LASF753
+	.4byte	.LLST220
+	.uleb128 0x55
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x24a
 	.4byte	0x10f8
-	.4byte	.LLST219
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST221
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x24b
 	.4byte	0x1001
-	.4byte	.LLST220
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST222
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x24c
-	.4byte	0x5180
-	.4byte	.LLST221
+	.4byte	0x51fb
+	.4byte	.LLST223
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x6108
+	.4byte	0x6183
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6620
+	.8byte	__func__.6619
 	.uleb128 0x34
-	.8byte	.LVL850
-	.4byte	0xa8ce
-	.4byte	0x6090
+	.8byte	.LVL852
+	.4byte	0xa949
+	.4byte	0x610b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33864,12 +33932,12 @@ __func__.7630:
 	.2byte	0x250
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL851
-	.4byte	0x6905
+	.8byte	.LVL853
+	.4byte	0x6980
 	.uleb128 0x34
-	.8byte	.LVL858
+	.8byte	.LVL860
 	.4byte	0x259f
-	.4byte	0x60b5
+	.4byte	0x6130
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -33878,9 +33946,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL862
+	.8byte	.LVL864
 	.4byte	0x27e7
-	.4byte	0x60e3
+	.4byte	0x615e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33904,8 +33972,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL863
-	.4byte	0x610d
+	.8byte	.LVL865
+	.4byte	0x6188
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33916,15 +33984,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x6108
+	.4byte	0x6183
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x1e
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x60f8
-	.uleb128 0x46
-	.4byte	.LASF754
+	.4byte	0x6173
+	.uleb128 0x49
+	.4byte	.LASF755
 	.byte	0x2
 	.2byte	0x218
 	.4byte	0x5b
@@ -33932,59 +34000,59 @@ __func__.7630:
 	.8byte	.LFE256-.LFB256
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6287
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x6302
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x218
-	.4byte	0x517a
-	.4byte	.LLST228
-	.uleb128 0x52
-	.4byte	.LASF755
+	.4byte	0x51f5
+	.4byte	.LLST230
+	.uleb128 0x55
+	.4byte	.LASF756
 	.byte	0x2
 	.2byte	0x21a
 	.4byte	0xdc9
-	.4byte	.LLST229
-	.uleb128 0x52
-	.4byte	.LASF756
+	.4byte	.LLST231
+	.uleb128 0x55
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x21b
 	.4byte	0xdc9
-	.4byte	.LLST230
-	.uleb128 0x52
+	.4byte	.LLST232
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x21c
 	.4byte	0xdc9
-	.4byte	.LLST231
-	.uleb128 0x52
-	.4byte	.LASF753
+	.4byte	.LLST233
+	.uleb128 0x55
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x21d
 	.4byte	0x10f8
-	.4byte	.LLST232
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST234
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x21e
 	.4byte	0x1001
-	.4byte	.LLST233
-	.uleb128 0x52
-	.4byte	.LASF708
+	.4byte	.LLST235
+	.uleb128 0x55
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x21f
-	.4byte	0x5180
-	.4byte	.LLST234
+	.4byte	0x51fb
+	.4byte	.LLST236
 	.uleb128 0x3f
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6606
+	.8byte	__func__.6605
 	.uleb128 0x34
-	.8byte	.LVL890
-	.4byte	0x62df
-	.4byte	0x61ca
+	.8byte	.LVL892
+	.4byte	0x635a
+	.4byte	0x6245
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -33993,9 +34061,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL893
-	.4byte	0x6287
-	.4byte	0x61e2
+	.8byte	.LVL895
+	.4byte	0x6302
+	.4byte	0x625d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34004,9 +34072,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL895
-	.4byte	0x6a7f
-	.4byte	0x61ff
+	.8byte	.LVL897
+	.4byte	0x6afa
+	.4byte	0x627a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34020,9 +34088,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL897
-	.4byte	0x6287
-	.4byte	0x6217
+	.8byte	.LVL899
+	.4byte	0x6302
+	.4byte	0x6292
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34031,9 +34099,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL902
+	.8byte	.LVL904
 	.4byte	0x29a4
-	.4byte	0x6240
+	.4byte	0x62bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34052,9 +34120,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL903
-	.4byte	0xa8ce
-	.4byte	0x626c
+	.8byte	.LVL905
+	.4byte	0xa949
+	.4byte	0x62e7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34075,8 +34143,8 @@ __func__.7630:
 	.2byte	0x234
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL908
-	.4byte	0x5e2b
+	.8byte	.LVL910
+	.4byte	0x5ea6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34091,44 +34159,44 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF757
+	.uleb128 0x4a
+	.4byte	.LASF758
 	.byte	0x2
 	.2byte	0x203
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x62ca
-	.uleb128 0x48
-	.4byte	.LASF703
+	.4byte	0x6345
+	.uleb128 0x4b
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x203
-	.4byte	0x517a
-	.uleb128 0x49
-	.4byte	.LASF758
+	.4byte	0x51f5
+	.uleb128 0x4c
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x205
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF753
+	.uleb128 0x4c
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x206
 	.4byte	0x10f8
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x62da
-	.4byte	.LASF757
+	.4byte	0x6355
+	.4byte	.LASF758
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x62da
+	.4byte	0x6355
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x19
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x62ca
-	.uleb128 0x46
-	.4byte	.LASF759
+	.4byte	0x6345
+	.uleb128 0x49
+	.4byte	.LASF760
 	.byte	0x2
 	.2byte	0x1db
 	.4byte	0x5b
@@ -34136,65 +34204,65 @@ __func__.7630:
 	.8byte	.LFE254-.LFB254
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x63c2
-	.uleb128 0x50
-	.4byte	.LASF703
+	.4byte	0x643d
+	.uleb128 0x53
+	.4byte	.LASF704
 	.byte	0x2
 	.2byte	0x1db
-	.4byte	0x517a
-	.4byte	.LLST207
-	.uleb128 0x52
-	.4byte	.LASF753
+	.4byte	0x51f5
+	.4byte	.LLST209
+	.uleb128 0x55
+	.4byte	.LASF754
 	.byte	0x2
 	.2byte	0x1dd
 	.4byte	0x10f8
-	.4byte	.LLST208
-	.uleb128 0x52
-	.4byte	.LASF706
+	.4byte	.LLST210
+	.uleb128 0x55
+	.4byte	.LASF707
 	.byte	0x2
 	.2byte	0x1de
 	.4byte	0x1001
-	.4byte	.LLST209
-	.uleb128 0x52
-	.4byte	.LASF760
+	.4byte	.LLST211
+	.uleb128 0x55
+	.4byte	.LASF761
 	.byte	0x2
 	.2byte	0x1df
 	.4byte	0x10f8
-	.4byte	.LLST210
-	.uleb128 0x52
+	.4byte	.LLST212
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdc9
-	.4byte	.LLST211
-	.uleb128 0x52
+	.4byte	.LLST213
+	.uleb128 0x55
 	.4byte	.LASF330
 	.byte	0x2
 	.2byte	0x1e0
 	.4byte	0xdc9
-	.4byte	.LLST212
-	.uleb128 0x52
-	.4byte	.LASF758
+	.4byte	.LLST214
+	.uleb128 0x55
+	.4byte	.LASF759
 	.byte	0x2
 	.2byte	0x1e1
 	.4byte	0xdc9
-	.4byte	.LLST213
-	.uleb128 0x52
-	.4byte	.LASF761
+	.4byte	.LLST215
+	.uleb128 0x55
+	.4byte	.LASF762
 	.byte	0x2
 	.2byte	0x1e2
 	.4byte	0xdc9
-	.4byte	.LLST214
-	.uleb128 0x52
-	.4byte	.LASF756
+	.4byte	.LLST216
+	.uleb128 0x55
+	.4byte	.LASF757
 	.byte	0x2
 	.2byte	0x1e3
 	.4byte	0xdc9
-	.4byte	.LLST215
+	.4byte	.LLST217
 	.uleb128 0x34
-	.8byte	.LVL827
+	.8byte	.LVL829
 	.4byte	0x259f
-	.4byte	0x63ae
+	.4byte	0x6429
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34208,8 +34276,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL844
-	.4byte	0x6a7f
+	.8byte	.LVL846
+	.4byte	0x6afa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34217,8 +34285,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF762
+	.uleb128 0x49
+	.4byte	.LASF763
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0x5b
@@ -34226,42 +34294,42 @@ __func__.7630:
 	.8byte	.LFE253-.LFB253
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x654a
-	.uleb128 0x50
+	.4byte	0x65c5
+	.uleb128 0x53
 	.4byte	.LASF317
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdc9
-	.4byte	.LLST204
-	.uleb128 0x50
-	.4byte	.LASF740
+	.4byte	.LLST206
+	.uleb128 0x53
+	.4byte	.LASF741
 	.byte	0x2
 	.2byte	0x1b9
 	.4byte	0xdc9
-	.4byte	.LLST205
+	.4byte	.LLST207
 	.uleb128 0x2a
-	.4byte	.LASF708
+	.4byte	.LASF709
 	.byte	0x2
 	.2byte	0x1bb
-	.4byte	0x5180
+	.4byte	0x51fb
 	.uleb128 0x1
 	.byte	0x69
-	.uleb128 0x52
-	.4byte	.LASF763
+	.uleb128 0x55
+	.4byte	.LASF764
 	.byte	0x2
 	.2byte	0x1bc
 	.4byte	0xdd4
-	.4byte	.LLST206
+	.4byte	.LLST208
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x3784
+	.4byte	0x37ff
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6563
+	.8byte	__func__.6562
 	.uleb128 0x34
-	.8byte	.LVL811
-	.4byte	0xa8ce
-	.4byte	0x6468
+	.8byte	.LVL813
+	.4byte	0xa949
+	.4byte	0x64e3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34282,9 +34350,9 @@ __func__.7630:
 	.2byte	0x1be
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL814
+	.8byte	.LVL816
 	.4byte	0x259f
-	.4byte	0x6480
+	.4byte	0x64fb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34293,9 +34361,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL818
+	.8byte	.LVL820
 	.4byte	0x29a4
-	.4byte	0x64a2
+	.4byte	0x651d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34314,9 +34382,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL820
-	.4byte	0xa8ce
-	.4byte	0x64cd
+	.8byte	.LVL822
+	.4byte	0xa949
+	.4byte	0x6548
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34337,9 +34405,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL821
+	.8byte	.LVL823
 	.4byte	0x2b1c
-	.4byte	0x64f6
+	.4byte	0x6571
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34358,9 +34426,9 @@ __func__.7630:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL822
+	.8byte	.LVL824
 	.4byte	0x2b1c
-	.4byte	0x651a
+	.4byte	0x6595
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34374,8 +34442,8 @@ __func__.7630:
 	.byte	0x34
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL823
-	.4byte	0xa8ce
+	.8byte	.LVL825
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34396,60 +34464,60 @@ __func__.7630:
 	.2byte	0x1d3
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF764
+	.uleb128 0x4a
+	.4byte	.LASF765
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x65c9
-	.uleb128 0x48
-	.4byte	.LASF649
+	.4byte	0x6644
+	.uleb128 0x4b
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x193
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF765
+	.uleb128 0x4c
+	.4byte	.LASF766
 	.byte	0x2
 	.2byte	0x195
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF766
+	.uleb128 0x4c
+	.4byte	.LASF767
 	.byte	0x2
 	.2byte	0x196
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF767
+	.uleb128 0x4c
+	.4byte	.LASF768
 	.byte	0x2
 	.2byte	0x197
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF768
+	.uleb128 0x4c
+	.4byte	.LASF769
 	.byte	0x2
 	.2byte	0x199
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF769
+	.uleb128 0x4c
+	.4byte	.LASF770
 	.byte	0x2
 	.2byte	0x19a
 	.4byte	0xdd4
-	.uleb128 0x49
-	.4byte	.LASF652
+	.uleb128 0x4c
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1e2c
-	.uleb128 0x49
-	.4byte	.LASF770
+	.uleb128 0x4c
+	.4byte	.LASF771
 	.byte	0x2
 	.2byte	0x19b
 	.4byte	0x1e2c
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x4d22
-	.4byte	.LASF764
+	.4byte	0x4d9d
+	.4byte	.LASF765
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF771
+	.uleb128 0x49
+	.4byte	.LASF772
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0x5b
@@ -34457,28 +34525,28 @@ __func__.7630:
 	.8byte	.LFE251-.LFB251
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x661c
-	.uleb128 0x50
+	.4byte	0x6697
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x17f
 	.4byte	0xdc9
 	.4byte	.LLST67
-	.uleb128 0x52
-	.4byte	.LASF649
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x181
 	.4byte	0xdc9
 	.4byte	.LLST68
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x182
 	.4byte	0x1e2c
 	.4byte	.LLST69
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF772
+	.uleb128 0x49
+	.4byte	.LASF773
 	.byte	0x2
 	.2byte	0x17a
 	.4byte	0x5b
@@ -34486,16 +34554,16 @@ __func__.7630:
 	.8byte	.LFE250-.LFB250
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6669
-	.uleb128 0x50
-	.4byte	.LASF773
+	.4byte	0x66e4
+	.uleb128 0x53
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x17a
-	.4byte	0x6669
+	.4byte	0x66e4
 	.4byte	.LLST66
 	.uleb128 0x2f
 	.8byte	.LVL187
-	.4byte	0x666f
+	.4byte	0x66ea
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34513,8 +34581,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x1e2c
-	.uleb128 0x46
-	.4byte	.LASF774
+	.uleb128 0x49
+	.4byte	.LASF775
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0x5b
@@ -34522,34 +34590,34 @@ __func__.7630:
 	.8byte	.LFE249-.LFB249
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x66e6
-	.uleb128 0x50
-	.4byte	.LASF773
+	.4byte	0x6761
+	.uleb128 0x53
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x167
-	.4byte	0x6669
+	.4byte	0x66e4
 	.4byte	.LLST62
-	.uleb128 0x50
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x2
 	.2byte	0x167
 	.4byte	0xdc9
 	.4byte	.LLST63
-	.uleb128 0x52
-	.4byte	.LASF649
+	.uleb128 0x55
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x169
 	.4byte	0xdc9
 	.4byte	.LLST64
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x16a
 	.4byte	0x1e2c
 	.4byte	.LLST65
 	.uleb128 0x36
 	.8byte	.LVL178
-	.4byte	0x66e6
+	.4byte	0x6761
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -34558,8 +34626,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF775
+	.uleb128 0x49
+	.4byte	.LASF776
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0x5b
@@ -34567,40 +34635,40 @@ __func__.7630:
 	.8byte	.LFE248-.LFB248
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x678b
-	.uleb128 0x50
-	.4byte	.LASF773
+	.4byte	0x6806
+	.uleb128 0x53
+	.4byte	.LASF774
 	.byte	0x2
 	.2byte	0x14c
-	.4byte	0x6669
+	.4byte	0x66e4
 	.4byte	.LLST58
-	.uleb128 0x50
-	.4byte	.LASF649
+	.uleb128 0x53
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x14c
 	.4byte	0xdc9
 	.4byte	.LLST59
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1e2c
 	.4byte	.LLST60
-	.uleb128 0x52
-	.4byte	.LASF776
+	.uleb128 0x55
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x14e
 	.4byte	0x1e2c
 	.4byte	.LLST61
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x679b
+	.4byte	0x6816
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6522
+	.8byte	__func__.6521
 	.uleb128 0x36
 	.8byte	.LVL164
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34623,15 +34691,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x679b
+	.4byte	0x6816
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0x10
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x678b
-	.uleb128 0x46
-	.4byte	.LASF777
+	.4byte	0x6806
+	.uleb128 0x49
+	.4byte	.LASF778
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0x5b
@@ -34639,47 +34707,47 @@ __func__.7630:
 	.8byte	.LFE247-.LFB247
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6821
-	.uleb128 0x50
-	.4byte	.LASF649
+	.4byte	0x689c
+	.uleb128 0x53
+	.4byte	.LASF650
 	.byte	0x2
 	.2byte	0x11b
 	.4byte	0xdc9
 	.4byte	.LLST51
-	.uleb128 0x52
-	.4byte	.LASF652
+	.uleb128 0x55
+	.4byte	.LASF653
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1e2c
 	.4byte	.LLST52
-	.uleb128 0x52
-	.4byte	.LASF776
+	.uleb128 0x55
+	.4byte	.LASF777
 	.byte	0x2
 	.2byte	0x11d
 	.4byte	0x1e2c
 	.4byte	.LLST53
 	.uleb128 0x2a
-	.4byte	.LASF778
+	.4byte	.LASF779
 	.byte	0x2
 	.2byte	0x11e
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x5d
-	.uleb128 0x52
-	.4byte	.LASF779
+	.uleb128 0x55
+	.4byte	.LASF780
 	.byte	0x2
 	.2byte	0x11f
 	.4byte	0xdc9
 	.4byte	.LLST54
-	.uleb128 0x52
-	.4byte	.LASF780
+	.uleb128 0x55
+	.4byte	.LASF781
 	.byte	0x2
 	.2byte	0x120
 	.4byte	0xdc9
 	.4byte	.LLST55
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF781
+	.4byte	.LASF782
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0x5b
@@ -34687,90 +34755,90 @@ __func__.7630:
 	.8byte	.LFE246-.LFB246
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x68bb
+	.4byte	0x6936
 	.uleb128 0x2e
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xd8
 	.4byte	0xdc9
 	.4byte	.LLST41
 	.uleb128 0x32
-	.4byte	.LASF652
+	.4byte	.LASF653
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1e2c
 	.4byte	.LLST42
 	.uleb128 0x32
-	.4byte	.LASF776
+	.4byte	.LASF777
 	.byte	0x2
 	.byte	0xda
 	.4byte	0x1e2c
 	.4byte	.LLST43
 	.uleb128 0x32
-	.4byte	.LASF782
+	.4byte	.LASF783
 	.byte	0x2
 	.byte	0xdb
 	.4byte	0xdc9
 	.4byte	.LLST44
 	.uleb128 0x32
-	.4byte	.LASF783
+	.4byte	.LASF784
 	.byte	0x2
 	.byte	0xdc
 	.4byte	0xdc9
 	.4byte	.LLST45
 	.uleb128 0x32
-	.4byte	.LASF767
+	.4byte	.LASF768
 	.byte	0x2
 	.byte	0xdd
 	.4byte	0xdd4
 	.4byte	.LLST46
 	.uleb128 0x32
-	.4byte	.LASF784
+	.4byte	.LASF785
 	.byte	0x2
 	.byte	0xde
 	.4byte	0xdd4
 	.4byte	.LLST47
 	.uleb128 0x32
-	.4byte	.LASF780
+	.4byte	.LASF781
 	.byte	0x2
 	.byte	0xdf
 	.4byte	0xdc9
 	.4byte	.LLST48
 	.byte	0
-	.uleb128 0x63
-	.4byte	.LASF785
+	.uleb128 0x65
+	.4byte	.LASF786
 	.byte	0x2
 	.byte	0xb9
 	.byte	0x1
-	.4byte	0x68e0
+	.4byte	0x695b
 	.uleb128 0x38
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb9
 	.4byte	0xdc9
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x679b
-	.4byte	.LASF785
-	.byte	0
-	.uleb128 0x63
+	.4byte	0x6816
 	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x65
+	.4byte	.LASF787
 	.byte	0x2
 	.byte	0xb2
 	.byte	0x1
-	.4byte	0x6905
+	.4byte	0x6980
 	.uleb128 0x38
-	.4byte	.LASF649
+	.4byte	.LASF650
 	.byte	0x2
 	.byte	0xb2
 	.4byte	0xdc9
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.4byte	.LASF574
-	.4byte	0x679b
-	.4byte	.LASF786
+	.4byte	0x6816
+	.4byte	.LASF787
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF787
+	.4byte	.LASF788
 	.byte	0x2
 	.byte	0xa4
 	.4byte	0xdc9
@@ -34778,28 +34846,28 @@ __func__.7630:
 	.8byte	.LFE243-.LFB243
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0x33
 	.string	"tmp"
 	.byte	0x2
 	.byte	0xa6
 	.4byte	0xdc9
 	.4byte	.LLST39
-	.uleb128 0x61
-	.8byte	.LBB174
-	.8byte	.LBE174-.LBB174
-	.4byte	0x6958
+	.uleb128 0x63
+	.8byte	.LBB176
+	.8byte	.LBE176-.LBB176
+	.4byte	0x69d3
 	.uleb128 0x33
 	.string	"Q"
 	.byte	0x2
 	.byte	0xa9
-	.4byte	0x6970
+	.4byte	0x69eb
 	.4byte	.LLST40
 	.byte	0
-	.uleb128 0x64
-	.4byte	0x6b52
-	.8byte	.LBB172
-	.8byte	.LBE172-.LBB172
+	.uleb128 0x66
+	.4byte	0x6bcd
+	.8byte	.LBB174
+	.8byte	.LBE174-.LBB174
 	.byte	0x2
 	.byte	0xa8
 	.byte	0
@@ -34807,7 +34875,7 @@ __func__.7630:
 	.byte	0x8
 	.4byte	0x15a4
 	.uleb128 0x2d
-	.4byte	.LASF788
+	.4byte	.LASF789
 	.byte	0x2
 	.byte	0x92
 	.4byte	0x5b
@@ -34815,7 +34883,7 @@ __func__.7630:
 	.8byte	.LFE242-.LFB242
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x69ea
+	.4byte	0x6a65
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x2
@@ -34838,27 +34906,27 @@ __func__.7630:
 	.string	"Q"
 	.byte	0x2
 	.byte	0x96
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
-	.uleb128 0x65
-	.4byte	0x6b46
-	.8byte	.LBB168
+	.uleb128 0x67
+	.4byte	0x6bc1
+	.8byte	.LBB170
 	.4byte	.Ldebug_ranges0+0x30
 	.byte	0x2
 	.byte	0x98
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF789
+	.4byte	.LASF790
 	.byte	0x2
 	.byte	0x73
 	.8byte	.LFB241
 	.8byte	.LFE241-.LFB241
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6a7f
+	.4byte	0x6afa
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x2
@@ -34878,19 +34946,19 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST32
 	.uleb128 0x32
-	.4byte	.LASF599
+	.4byte	.LASF602
 	.byte	0x2
 	.byte	0x76
 	.4byte	0xdc9
 	.4byte	.LLST33
 	.uleb128 0x32
-	.4byte	.LASF790
+	.4byte	.LASF791
 	.byte	0x2
 	.byte	0x77
 	.4byte	0xdc9
 	.4byte	.LLST34
 	.uleb128 0x32
-	.4byte	.LASF791
+	.4byte	.LASF792
 	.byte	0x2
 	.byte	0x78
 	.4byte	0xdd4
@@ -34899,59 +34967,59 @@ __func__.7630:
 	.string	"Q"
 	.byte	0x2
 	.byte	0x79
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x45
 	.8byte	.LVL79
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF792
+	.4byte	.LASF793
 	.byte	0x2
 	.byte	0x61
 	.8byte	.LFB240
 	.8byte	.LFE240-.LFB240
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6b46
+	.4byte	0x6bc1
 	.uleb128 0x31
 	.string	"blk"
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST182
+	.4byte	.LLST184
 	.uleb128 0x2e
-	.4byte	.LASF793
+	.4byte	.LASF794
 	.byte	0x2
 	.byte	0x61
 	.4byte	0xdc9
-	.4byte	.LLST183
-	.uleb128 0x61
-	.8byte	.LBB219
-	.8byte	.LBE219-.LBB219
-	.4byte	0x6b2e
+	.4byte	.LLST185
+	.uleb128 0x63
+	.8byte	.LBB223
+	.8byte	.LBE223-.LBB223
+	.4byte	0x6ba9
 	.uleb128 0x33
 	.string	"Q"
 	.byte	0x2
 	.byte	0x64
-	.4byte	0x6970
-	.4byte	.LLST184
-	.uleb128 0x66
-	.8byte	.LBB220
-	.8byte	.LBE220-.LBB220
+	.4byte	0x69eb
+	.4byte	.LLST186
+	.uleb128 0x68
+	.8byte	.LBB224
+	.8byte	.LBE224-.LBB224
 	.uleb128 0x32
-	.4byte	.LASF794
+	.4byte	.LASF795
 	.byte	0x2
 	.byte	0x66
 	.4byte	0xdc9
-	.4byte	.LLST185
+	.4byte	.LLST187
 	.uleb128 0x34
-	.8byte	.LVL679
-	.4byte	0x6cf6
-	.4byte	0x6b14
+	.8byte	.LVL681
+	.4byte	0x6d71
+	.4byte	0x6b8f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -34960,7 +35028,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL682
+	.8byte	.LVL684
 	.4byte	0x2721
 	.uleb128 0x30
 	.uleb128 0x1
@@ -34975,27 +35043,27 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x64
-	.4byte	0x6b46
-	.8byte	.LBB217
-	.8byte	.LBE217-.LBB217
+	.uleb128 0x66
+	.4byte	0x6bc1
+	.8byte	.LBB221
+	.8byte	.LBE221-.LBB221
 	.byte	0x2
 	.byte	0x63
 	.byte	0
-	.uleb128 0x67
-	.4byte	.LASF795
+	.uleb128 0x69
+	.4byte	.LASF796
 	.byte	0x2
 	.byte	0x5c
 	.4byte	0xdc9
 	.byte	0x1
-	.uleb128 0x67
-	.4byte	.LASF796
+	.uleb128 0x69
+	.4byte	.LASF797
 	.byte	0x2
 	.byte	0x57
 	.4byte	0xdc9
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF797
+	.4byte	.LASF798
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
@@ -35003,24 +35071,24 @@ __func__.7630:
 	.8byte	.LFE237-.LFB237
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6bca
+	.4byte	0x6c45
 	.uleb128 0x31
 	.string	"max"
 	.byte	0x2
 	.byte	0x4b
 	.4byte	0xdc9
-	.4byte	.LLST203
+	.4byte	.LLST205
 	.uleb128 0x3d
 	.string	"Q"
 	.byte	0x2
 	.byte	0x4d
-	.4byte	0x6970
+	.4byte	0x69eb
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.uleb128 0x36
-	.8byte	.LVL807
+	.8byte	.LVL809
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35042,7 +35110,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF798
+	.4byte	.LASF799
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
@@ -35050,19 +35118,19 @@ __func__.7630:
 	.8byte	.LFE236-.LFB236
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6ca7
+	.4byte	0x6d22
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0xdd4
-	.4byte	.LLST161
+	.4byte	.LLST163
 	.uleb128 0x2e
 	.4byte	.LASF568
 	.byte	0x2
 	.byte	0x2e
 	.4byte	0x5b
-	.4byte	.LLST162
+	.4byte	.LLST164
 	.uleb128 0x3d
 	.string	"req"
 	.byte	0x2
@@ -35076,21 +35144,21 @@ __func__.7630:
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST163
+	.4byte	.LLST165
 	.uleb128 0x32
-	.4byte	.LASF799
+	.4byte	.LASF800
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST164
+	.4byte	.LLST166
 	.uleb128 0x33
 	.string	"mid"
 	.byte	0x2
 	.byte	0x31
 	.4byte	0xdea
-	.4byte	.LLST165
+	.4byte	.LLST167
 	.uleb128 0x2b
-	.4byte	.LASF800
+	.4byte	.LASF801
 	.byte	0x2
 	.byte	0x32
 	.4byte	0x2711
@@ -35098,15 +35166,15 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -64
 	.uleb128 0x32
-	.4byte	.LASF801
+	.4byte	.LASF802
 	.byte	0x2
 	.byte	0x33
 	.4byte	0xdc9
-	.4byte	.LLST166
+	.4byte	.LLST168
 	.uleb128 0x34
-	.8byte	.LVL624
+	.8byte	.LVL626
 	.4byte	0x29a4
-	.4byte	0x6c86
+	.4byte	0x6d01
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35126,7 +35194,7 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL633
+	.8byte	.LVL635
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35148,7 +35216,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF802
+	.4byte	.LASF803
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35156,15 +35224,15 @@ __func__.7630:
 	.8byte	.LFE235-.LFB235
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.uleb128 0x2e
-	.4byte	.LASF803
+	.4byte	.LASF804
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
 	.4byte	.LLST27
 	.uleb128 0x2e
-	.4byte	.LASF804
+	.4byte	.LASF805
 	.byte	0x2
 	.byte	0x1e
 	.4byte	0xdd4
@@ -35177,7 +35245,7 @@ __func__.7630:
 	.4byte	.LLST29
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF805
+	.4byte	.LASF806
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
@@ -35185,22 +35253,22 @@ __func__.7630:
 	.8byte	.LFE234-.LFB234
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d36
+	.4byte	0x6db1
 	.uleb128 0x2e
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0x14
 	.4byte	0xdc9
 	.4byte	.LLST25
 	.uleb128 0x32
-	.4byte	.LASF717
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x16
 	.4byte	0xdc9
 	.4byte	.LLST26
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF806
+	.4byte	.LASF807
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
@@ -35208,15 +35276,15 @@ __func__.7630:
 	.8byte	.LFE233-.LFB233
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6d91
+	.4byte	0x6e0c
 	.uleb128 0x2e
-	.4byte	.LASF594
+	.4byte	.LASF597
 	.byte	0x2
 	.byte	0xc
 	.4byte	0xdc9
 	.4byte	.LLST24
 	.uleb128 0x2b
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0xe
 	.4byte	0xdc9
@@ -35246,7 +35314,7 @@ __func__.7630:
 	.byte	0x9f
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF807
+	.4byte	.LASF808
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
@@ -35254,29 +35322,29 @@ __func__.7630:
 	.8byte	.LFE232-.LFB232
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x6dde
+	.4byte	0x6e59
 	.uleb128 0x2e
-	.4byte	.LASF592
+	.4byte	.LASF595
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.4byte	.LLST22
-	.uleb128 0x59
-	.4byte	.LASF717
+	.uleb128 0x5c
+	.4byte	.LASF718
 	.byte	0x2
 	.byte	0x4
 	.4byte	0xdc9
 	.uleb128 0x1
 	.byte	0x51
 	.uleb128 0x32
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x2
 	.byte	0x6
 	.4byte	0xdc9
 	.4byte	.LLST23
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF808
+	.uleb128 0x49
+	.4byte	.LASF809
 	.byte	0x4
 	.2byte	0x13c
 	.4byte	0xddf
@@ -35284,45 +35352,45 @@ __func__.7630:
 	.8byte	.LFE231-.LFB231
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7029
-	.uleb128 0x51
+	.4byte	0x70a4
+	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x13e
 	.4byte	0xdd4
-	.4byte	.LLST361
-	.uleb128 0x51
+	.4byte	.LLST363
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x13f
 	.4byte	0xdc9
-	.4byte	.LLST362
-	.uleb128 0x52
+	.4byte	.LLST364
+	.uleb128 0x55
 	.4byte	.LASF577
 	.byte	0x4
 	.2byte	0x140
 	.4byte	0xdd4
-	.4byte	.LLST363
-	.uleb128 0x52
-	.4byte	.LASF809
+	.4byte	.LLST365
+	.uleb128 0x55
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x142
-	.4byte	0x7029
-	.4byte	.LLST364
-	.uleb128 0x4b
-	.4byte	.LASF810
+	.4byte	0x70a4
+	.4byte	.LLST366
+	.uleb128 0x4e
+	.4byte	.LASF811
 	.byte	0x4
 	.2byte	0x158
 	.uleb128 0x45
-	.8byte	.LVL1545
-	.4byte	0x7283
+	.8byte	.LVL1547
+	.4byte	0x72fe
 	.uleb128 0x45
-	.8byte	.LVL1546
-	.4byte	0x702f
+	.8byte	.LVL1548
+	.4byte	0x70aa
 	.uleb128 0x34
-	.8byte	.LVL1552
-	.4byte	0x74e5
-	.4byte	0x6e7a
+	.8byte	.LVL1554
+	.4byte	0x7560
+	.4byte	0x6ef5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35331,9 +35399,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1553
+	.8byte	.LVL1555
 	.4byte	0x26cd
-	.4byte	0x6e92
+	.4byte	0x6f0d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35342,9 +35410,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1554
-	.4byte	0x7574
-	.4byte	0x6eaa
+	.8byte	.LVL1556
+	.4byte	0x75ef
+	.4byte	0x6f25
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35353,9 +35421,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1560
+	.8byte	.LVL1562
 	.4byte	0x29a4
-	.4byte	0x6ecc
+	.4byte	0x6f47
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35374,12 +35442,12 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1561
+	.8byte	.LVL1563
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL1563
-	.4byte	0x7574
-	.4byte	0x6ef1
+	.8byte	.LVL1565
+	.4byte	0x75ef
+	.4byte	0x6f6c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35388,9 +35456,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1565
+	.8byte	.LVL1567
 	.4byte	0x2611
-	.4byte	0x6f09
+	.4byte	0x6f84
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35399,15 +35467,15 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1566
-	.4byte	0x7441
-	.uleb128 0x45
 	.8byte	.LVL1568
-	.4byte	0x74e5
+	.4byte	0x74bc
+	.uleb128 0x45
+	.8byte	.LVL1570
+	.4byte	0x7560
 	.uleb128 0x34
-	.8byte	.LVL1569
+	.8byte	.LVL1571
 	.4byte	0x259f
-	.4byte	0x6f3f
+	.4byte	0x6fba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35420,9 +35488,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1570
+	.8byte	.LVL1572
 	.4byte	0x259f
-	.4byte	0x6f5d
+	.4byte	0x6fd8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35436,12 +35504,12 @@ __func__.7630:
 	.2byte	0x1000
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1572
+	.8byte	.LVL1574
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL1573
+	.8byte	.LVL1575
 	.4byte	0x2721
-	.4byte	0x6f8c
+	.4byte	0x7007
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35460,9 +35528,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1574
+	.8byte	.LVL1576
 	.4byte	0x27e7
-	.4byte	0x6fb3
+	.4byte	0x702e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35486,9 +35554,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1575
-	.4byte	0x7574
-	.4byte	0x6fcb
+	.8byte	.LVL1577
+	.4byte	0x75ef
+	.4byte	0x7046
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35497,12 +35565,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1581
-	.4byte	0x7574
+	.8byte	.LVL1583
+	.4byte	0x75ef
 	.uleb128 0x34
-	.8byte	.LVL1585
+	.8byte	.LVL1587
 	.4byte	0x2721
-	.4byte	0x6ff4
+	.4byte	0x706f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35515,23 +35583,23 @@ __func__.7630:
 	.byte	0x32
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1586
-	.4byte	0x7574
-	.uleb128 0x45
-	.8byte	.LVL1587
-	.4byte	0x7574
-	.uleb128 0x45
 	.8byte	.LVL1588
-	.4byte	0x72c7
+	.4byte	0x75ef
+	.uleb128 0x45
+	.8byte	.LVL1589
+	.4byte	0x75ef
 	.uleb128 0x45
 	.8byte	.LVL1590
-	.4byte	0x72c7
+	.4byte	0x7342
+	.uleb128 0x45
+	.8byte	.LVL1592
+	.4byte	0x7342
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x11c8
-	.uleb128 0x46
-	.4byte	.LASF811
+	.uleb128 0x49
+	.4byte	.LASF812
 	.byte	0x4
 	.2byte	0x116
 	.4byte	0x5b
@@ -35539,32 +35607,32 @@ __func__.7630:
 	.8byte	.LFE230-.LFB230
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x70ac
-	.uleb128 0x51
+	.4byte	0x7127
+	.uleb128 0x54
 	.string	"die"
 	.byte	0x4
 	.2byte	0x118
 	.4byte	0xdd4
-	.4byte	.LLST158
-	.uleb128 0x51
+	.4byte	.LLST160
+	.uleb128 0x54
 	.string	"blk"
 	.byte	0x4
 	.2byte	0x119
 	.4byte	0xdc9
-	.4byte	.LLST159
-	.uleb128 0x49
-	.4byte	.LASF812
+	.4byte	.LLST161
+	.uleb128 0x4c
+	.4byte	.LASF813
 	.byte	0x4
 	.2byte	0x11a
 	.4byte	0xdd4
-	.uleb128 0x52
-	.4byte	.LASF809
+	.uleb128 0x55
+	.4byte	.LASF810
 	.byte	0x4
 	.2byte	0x11b
-	.4byte	0x7029
-	.4byte	.LLST160
+	.4byte	0x70a4
+	.4byte	.LLST162
 	.uleb128 0x36
-	.8byte	.LVL614
+	.8byte	.LVL616
 	.4byte	0x29a4
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35585,7 +35653,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF813
+	.4byte	.LASF814
 	.byte	0x4
 	.byte	0xac
 	.4byte	0x5b
@@ -35593,44 +35661,44 @@ __func__.7630:
 	.8byte	.LFE229-.LFB229
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x721a
+	.4byte	0x7295
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0xae
 	.4byte	0xdd4
-	.4byte	.LLST357
+	.4byte	.LLST359
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
 	.byte	0xaf
 	.4byte	0xdc9
-	.4byte	.LLST358
+	.4byte	.LLST360
 	.uleb128 0x32
-	.4byte	.LASF705
+	.4byte	.LASF706
 	.byte	0x4
 	.byte	0xb0
 	.4byte	0xdea
-	.4byte	.LLST359
+	.4byte	.LLST361
 	.uleb128 0x32
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0xb1
-	.4byte	0x7029
-	.4byte	.LLST360
+	.4byte	0x70a4
+	.4byte	.LLST362
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x722a
+	.4byte	0x72a5
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6364
+	.8byte	__func__.6363
 	.uleb128 0x45
-	.8byte	.LVL1521
-	.4byte	0x7283
-	.uleb128 0x34
 	.8byte	.LVL1523
+	.4byte	0x72fe
+	.uleb128 0x34
+	.8byte	.LVL1525
 	.4byte	0x29a4
-	.4byte	0x7149
+	.4byte	0x71c4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35649,9 +35717,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1524
+	.8byte	.LVL1526
 	.4byte	0x29a4
-	.4byte	0x716b
+	.4byte	0x71e6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35670,9 +35738,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1526
+	.8byte	.LVL1528
 	.4byte	0x29a4
-	.4byte	0x7194
+	.4byte	0x720f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35691,9 +35759,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1527
-	.4byte	0x6bca
-	.4byte	0x71ab
+	.8byte	.LVL1529
+	.4byte	0x6c45
+	.4byte	0x7226
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35701,9 +35769,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1529
-	.4byte	0xa8ce
-	.4byte	0x71dd
+	.8byte	.LVL1531
+	.4byte	0xa949
+	.4byte	0x7258
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35724,12 +35792,12 @@ __func__.7630:
 	.byte	0xfe
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1530
-	.4byte	0x8b14
+	.8byte	.LVL1532
+	.4byte	0x8b8f
 	.uleb128 0x34
-	.8byte	.LVL1538
+	.8byte	.LVL1540
 	.4byte	0x29a4
-	.4byte	0x720c
+	.4byte	0x7287
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35748,20 +35816,20 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1543
+	.8byte	.LVL1545
 	.4byte	0x2527
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x722a
+	.4byte	0x72a5
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xa
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x721a
+	.4byte	0x7295
 	.uleb128 0x2d
-	.4byte	.LASF814
+	.4byte	.LASF815
 	.byte	0x4
 	.byte	0x9c
 	.4byte	0xdc9
@@ -35769,7 +35837,7 @@ __func__.7630:
 	.8byte	.LFE228-.LFB228
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7283
+	.4byte	0x72fe
 	.uleb128 0x33
 	.string	"blk"
 	.byte	0x4
@@ -35777,14 +35845,14 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST20
 	.uleb128 0x32
-	.4byte	.LASF815
+	.4byte	.LASF816
 	.byte	0x4
 	.byte	0x9f
 	.4byte	0xdc9
 	.4byte	.LLST21
 	.uleb128 0x36
 	.8byte	.LVL53
-	.4byte	0x74e5
+	.4byte	0x7560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35794,16 +35862,16 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF816
+	.4byte	.LASF817
 	.byte	0x4
 	.byte	0x94
 	.8byte	.LFB227
 	.8byte	.LFE227-.LFB227
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x72c7
+	.4byte	0x7342
 	.uleb128 0x2f
-	.8byte	.LVL804
+	.8byte	.LVL806
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -35825,7 +35893,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF817
+	.4byte	.LASF818
 	.byte	0x4
 	.byte	0x4f
 	.4byte	0x5b
@@ -35833,42 +35901,42 @@ __func__.7630:
 	.8byte	.LFE226-.LFB226
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7441
+	.4byte	0x74bc
 	.uleb128 0x33
 	.string	"i"
 	.byte	0x4
 	.byte	0x51
 	.4byte	0x5b
-	.4byte	.LLST306
+	.4byte	.LLST308
 	.uleb128 0x32
-	.4byte	.LASF818
+	.4byte	.LASF819
 	.byte	0x4
 	.byte	0x52
 	.4byte	0x5b
-	.4byte	.LLST307
+	.4byte	.LLST309
 	.uleb128 0x32
-	.4byte	.LASF809
+	.4byte	.LASF810
 	.byte	0x4
 	.byte	0x53
-	.4byte	0x7029
-	.4byte	.LLST308
+	.4byte	0x70a4
+	.4byte	.LLST310
 	.uleb128 0x32
-	.4byte	.LASF721
+	.4byte	.LASF722
 	.byte	0x4
 	.byte	0x54
 	.4byte	0xdc9
-	.4byte	.LLST309
-	.uleb128 0x55
-	.4byte	.LASF819
+	.4byte	.LLST311
+	.uleb128 0x58
+	.4byte	.LASF820
 	.byte	0x4
 	.byte	0x67
-	.uleb128 0x68
+	.uleb128 0x6a
 	.4byte	.LASF574
 	.4byte	0x299f
 	.uleb128 0x34
-	.8byte	.LVL1243
+	.8byte	.LVL1245
 	.4byte	0x259f
-	.4byte	0x734a
+	.4byte	0x73c5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35877,9 +35945,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1246
+	.8byte	.LVL1248
 	.4byte	0x259f
-	.4byte	0x736d
+	.4byte	0x73e8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35899,9 +35967,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1248
-	.4byte	0xa8ce
-	.4byte	0x7385
+	.8byte	.LVL1250
+	.4byte	0xa949
+	.4byte	0x7400
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35910,9 +35978,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1249
+	.8byte	.LVL1251
 	.4byte	0x27e7
-	.4byte	0x73ac
+	.4byte	0x7427
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35936,9 +36004,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1250
+	.8byte	.LVL1252
 	.4byte	0x2721
-	.4byte	0x73c8
+	.4byte	0x7443
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -35951,9 +36019,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1251
+	.8byte	.LVL1253
 	.4byte	0x27e7
-	.4byte	0x73ef
+	.4byte	0x746a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35977,9 +36045,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1253
-	.4byte	0xa8ce
-	.4byte	0x740e
+	.8byte	.LVL1255
+	.4byte	0xa949
+	.4byte	0x7489
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -35988,9 +36056,9 @@ __func__.7630:
 	.8byte	.LC95
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1254
-	.4byte	0xa8ce
-	.4byte	0x7433
+	.8byte	.LVL1256
+	.4byte	0xa949
+	.4byte	0x74ae
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36005,30 +36073,30 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1257
+	.8byte	.LVL1259
 	.4byte	0x2527
 	.byte	0
 	.uleb128 0x43
-	.4byte	.LASF820
+	.4byte	.LASF821
 	.byte	0x4
 	.byte	0x41
 	.8byte	.LFB225
 	.8byte	.LFE225-.LFB225
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x74dd
+	.4byte	0x7558
 	.uleb128 0x2e
-	.4byte	.LASF753
+	.4byte	.LASF754
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x10f8
-	.4byte	.LLST201
+	.4byte	.LLST203
 	.uleb128 0x2e
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x41
 	.4byte	0x1001
-	.4byte	.LLST202
+	.4byte	.LLST204
 	.uleb128 0x39
 	.string	"i"
 	.byte	0x4
@@ -36036,14 +36104,14 @@ __func__.7630:
 	.4byte	0xdd4
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x41dd
+	.4byte	0x4258
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6321
+	.8byte	__func__.6320
 	.uleb128 0x34
-	.8byte	.LVL800
+	.8byte	.LVL802
 	.4byte	0x259f
-	.4byte	0x74b5
+	.4byte	0x7530
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36057,8 +36125,8 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL801
-	.4byte	0xa8ce
+	.8byte	.LVL803
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36079,13 +36147,13 @@ __func__.7630:
 	.byte	0x4a
 	.byte	0
 	.byte	0
-	.uleb128 0x69
-	.4byte	.LASF822
+	.uleb128 0x6b
+	.4byte	.LASF823
 	.byte	0x4
 	.byte	0x26
 	.byte	0x1
 	.uleb128 0x2d
-	.4byte	.LASF823
+	.4byte	.LASF824
 	.byte	0x4
 	.byte	0x17
 	.4byte	0x5b
@@ -36093,7 +36161,7 @@ __func__.7630:
 	.8byte	.LFE223-.LFB223
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7574
+	.4byte	0x75ef
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36113,7 +36181,7 @@ __func__.7630:
 	.4byte	0xdd4
 	.4byte	.LLST18
 	.uleb128 0x2b
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x1b
 	.4byte	0x1001
@@ -36150,7 +36218,7 @@ __func__.7630:
 	.4byte	.LLST19
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF824
+	.4byte	.LASF825
 	.byte	0x4
 	.byte	0x4
 	.4byte	0x5b
@@ -36158,7 +36226,7 @@ __func__.7630:
 	.8byte	.LFE222-.LFB222
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x75f8
+	.4byte	0x7673
 	.uleb128 0x2e
 	.4byte	.LASF388
 	.byte	0x4
@@ -36172,7 +36240,7 @@ __func__.7630:
 	.4byte	0xdd4
 	.4byte	.LLST13
 	.uleb128 0x32
-	.4byte	.LASF821
+	.4byte	.LASF822
 	.byte	0x4
 	.byte	0x7
 	.4byte	0x1001
@@ -36185,7 +36253,7 @@ __func__.7630:
 	.4byte	.LLST15
 	.uleb128 0x36
 	.8byte	.LVL44
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36204,46 +36272,46 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
-	.4byte	.LASF884
+	.uleb128 0x6c
+	.4byte	.LASF887
 	.byte	0x3
-	.2byte	0x4be
+	.2byte	0x4bd
 	.4byte	0xdd4
 	.8byte	.LFB221
 	.8byte	.LFE221-.LFB221
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x46
-	.4byte	.LASF825
+	.uleb128 0x49
+	.4byte	.LASF826
 	.byte	0x3
-	.2byte	0x4b9
+	.2byte	0x4b8
 	.4byte	0x5b
 	.8byte	.LFB220
 	.8byte	.LFE220-.LFB220
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7691
-	.uleb128 0x50
+	.4byte	0x770c
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
-	.2byte	0x4b9
+	.2byte	0x4b8
 	.4byte	0xb9
-	.4byte	.LLST458
-	.uleb128 0x50
+	.4byte	.LLST460
+	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
-	.2byte	0x4b9
+	.2byte	0x4b8
 	.4byte	0xb9
-	.4byte	.LLST459
-	.uleb128 0x5a
+	.4byte	.LLST461
+	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
-	.2byte	0x4b9
-	.4byte	0x7691
-	.4byte	.LLST460
+	.2byte	0x4b8
+	.4byte	0x770c
+	.4byte	.LLST462
 	.uleb128 0x2f
-	.8byte	.LVL2075
-	.4byte	0x783c
+	.8byte	.LVL2077
+	.4byte	0x78b7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36275,8 +36343,8 @@ __func__.7630:
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0x94
-	.uleb128 0x46
-	.4byte	.LASF826
+	.uleb128 0x49
+	.4byte	.LASF827
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0x5b
@@ -36284,28 +36352,28 @@ __func__.7630:
 	.8byte	.LFE219-.LFB219
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7712
-	.uleb128 0x50
+	.4byte	0x778d
+	.uleb128 0x53
 	.4byte	.LASF236
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb9
-	.4byte	.LLST440
-	.uleb128 0x50
+	.4byte	.LLST442
+	.uleb128 0x53
 	.4byte	.LASF325
 	.byte	0x3
 	.2byte	0x4b3
 	.4byte	0xb9
-	.4byte	.LLST441
-	.uleb128 0x5a
+	.4byte	.LLST443
+	.uleb128 0x5d
 	.string	"buf"
 	.byte	0x3
 	.2byte	0x4b3
-	.4byte	0x7691
-	.4byte	.LLST442
+	.4byte	0x770c
+	.4byte	.LLST444
 	.uleb128 0x2f
-	.8byte	.LVL1982
-	.4byte	0x7f5e
+	.8byte	.LVL1984
+	.4byte	0x7fd9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36334,8 +36402,8 @@ __func__.7630:
 	.byte	0x52
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF827
+	.uleb128 0x49
+	.4byte	.LASF828
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0x5b
@@ -36343,39 +36411,39 @@ __func__.7630:
 	.8byte	.LFE218-.LFB218
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x783c
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	0x78b7
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdd4
-	.4byte	.LLST398
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST400
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x484
 	.4byte	0xdd4
-	.4byte	.LLST399
-	.uleb128 0x52
-	.4byte	.LASF734
+	.4byte	.LLST401
+	.uleb128 0x55
+	.4byte	.LASF735
 	.byte	0x3
 	.2byte	0x486
 	.4byte	0xdc9
-	.4byte	.LLST400
-	.uleb128 0x51
+	.4byte	.LLST402
+	.uleb128 0x54
 	.string	"tmp"
 	.byte	0x3
 	.2byte	0x487
 	.4byte	0xdc9
-	.4byte	.LLST401
-	.uleb128 0x51
+	.4byte	.LLST403
+	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x488
 	.4byte	0xdd4
-	.4byte	.LLST402
+	.4byte	.LLST404
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdd4
@@ -36383,32 +36451,32 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -8
 	.uleb128 0x2a
-	.4byte	.LASF640
+	.4byte	.LASF641
 	.byte	0x3
 	.2byte	0x489
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF629
+	.uleb128 0x55
+	.4byte	.LASF630
 	.byte	0x3
 	.2byte	0x48a
 	.4byte	0xdc9
-	.4byte	.LLST403
+	.4byte	.LLST405
 	.uleb128 0x45
-	.8byte	.LVL1744
-	.4byte	0x7cda
+	.8byte	.LVL1746
+	.4byte	0x7d55
 	.uleb128 0x45
-	.8byte	.LVL1753
-	.4byte	0x5ce8
+	.8byte	.LVL1755
+	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL1754
-	.4byte	0x5619
+	.8byte	.LVL1756
+	.4byte	0x5694
 	.uleb128 0x34
-	.8byte	.LVL1755
-	.4byte	0x5bbb
-	.4byte	0x77fd
+	.8byte	.LVL1757
+	.4byte	0x5c36
+	.4byte	0x7878
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36428,9 +36496,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1756
-	.4byte	0x5bbb
-	.4byte	0x7821
+	.8byte	.LVL1758
+	.4byte	0x5c36
+	.4byte	0x789c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36450,14 +36518,14 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1757
-	.4byte	0x6cf6
+	.8byte	.LVL1759
+	.4byte	0x6d71
 	.uleb128 0x45
-	.8byte	.LVL1758
-	.4byte	0x3645
+	.8byte	.LVL1760
+	.4byte	0x36c0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF828
+	.uleb128 0x49
+	.4byte	.LASF829
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0x5b
@@ -36465,116 +36533,116 @@ __func__.7630:
 	.8byte	.LFE217-.LFB217
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7cda
-	.uleb128 0x5a
+	.4byte	0x7d55
+	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdbe
-	.4byte	.LLST443
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	.LLST445
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdd4
-	.4byte	.LLST444
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST446
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x3c1
 	.4byte	0xdd4
-	.4byte	.LLST445
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST447
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x3c1
-	.4byte	0x5a77
-	.4byte	.LLST446
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	0x5af2
+	.4byte	.LLST448
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x3c3
-	.4byte	0x2d84
-	.4byte	.LLST447
-	.uleb128 0x51
+	.4byte	0x2dff
+	.4byte	.LLST449
+	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdd4
-	.4byte	.LLST448
-	.uleb128 0x52
-	.4byte	.LASF829
+	.4byte	.LLST450
+	.uleb128 0x55
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdd4
-	.4byte	.LLST449
-	.uleb128 0x52
-	.4byte	.LASF830
+	.4byte	.LLST451
+	.uleb128 0x55
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x3c4
 	.4byte	0xdd4
-	.4byte	.LLST450
+	.4byte	.LLST452
 	.uleb128 0x2a
-	.4byte	.LASF663
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdd4
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"ppa"
 	.byte	0x3
 	.2byte	0x3c5
 	.4byte	0xdd4
-	.4byte	.LLST451
-	.uleb128 0x51
+	.4byte	.LLST453
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdd4
-	.4byte	.LLST452
-	.uleb128 0x52
-	.4byte	.LASF831
+	.4byte	.LLST454
+	.uleb128 0x55
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdd4
-	.4byte	.LLST453
-	.uleb128 0x52
-	.4byte	.LASF593
+	.4byte	.LLST455
+	.uleb128 0x55
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x3c6
 	.4byte	0xdd4
-	.4byte	.LLST454
-	.uleb128 0x52
-	.4byte	.LASF832
+	.4byte	.LLST456
+	.uleb128 0x55
+	.4byte	.LASF833
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdd4
-	.4byte	.LLST455
-	.uleb128 0x52
-	.4byte	.LASF833
+	.4byte	.LLST457
+	.uleb128 0x55
+	.4byte	.LASF834
 	.byte	0x3
 	.2byte	0x3c7
 	.4byte	0xdd4
-	.4byte	.LLST456
-	.uleb128 0x52
-	.4byte	.LASF639
+	.4byte	.LLST458
+	.uleb128 0x55
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x3c8
 	.4byte	0x1f04
-	.4byte	.LLST457
+	.4byte	.LLST459
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x5ce3
+	.4byte	0x5d5e
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6257
+	.8byte	__func__.6256
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x300
-	.4byte	0x79fe
+	.4byte	0x7a79
 	.uleb128 0x2a
-	.4byte	.LASF601
+	.4byte	.LASF604
 	.byte	0x3
 	.2byte	0x43d
 	.4byte	0xdf5
@@ -36582,9 +36650,9 @@ __func__.7630:
 	.byte	0x91
 	.sleb128 -32
 	.uleb128 0x34
-	.8byte	.LVL2058
+	.8byte	.LVL2060
 	.4byte	0x29a4
-	.4byte	0x79a9
+	.4byte	0x7a24
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36603,9 +36671,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2060
-	.4byte	0xa8ce
-	.4byte	0x79ce
+	.8byte	.LVL2062
+	.4byte	0xa949
+	.4byte	0x7a49
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36620,8 +36688,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2061
-	.4byte	0xa8ce
+	.8byte	.LVL2063
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36643,9 +36711,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1987
-	.4byte	0x5a7d
-	.4byte	0x7a23
+	.8byte	.LVL1989
+	.4byte	0x5af8
+	.4byte	0x7a9e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36666,12 +36734,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1997
-	.4byte	0x7cda
-	.uleb128 0x34
 	.8byte	.LVL1999
-	.4byte	0xa8ce
-	.4byte	0x7a63
+	.4byte	0x7d55
+	.uleb128 0x34
+	.8byte	.LVL2001
+	.4byte	0xa949
+	.4byte	0x7ade
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36692,12 +36760,12 @@ __func__.7630:
 	.2byte	0x3f4
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2000
-	.4byte	0x7cda
+	.8byte	.LVL2002
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL2001
-	.4byte	0x38b7
-	.4byte	0x7a8f
+	.8byte	.LVL2003
+	.4byte	0x3932
+	.4byte	0x7b0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36706,9 +36774,9 @@ __func__.7630:
 	.8byte	.LANCHOR52
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2003
-	.4byte	0x38b7
-	.4byte	0x7aa7
+	.8byte	.LVL2005
+	.4byte	0x3932
+	.4byte	0x7b22
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36717,9 +36785,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2005
-	.4byte	0x38b7
-	.4byte	0x7abf
+	.8byte	.LVL2007
+	.4byte	0x3932
+	.4byte	0x7b3a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36728,9 +36796,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2008
-	.4byte	0xa8ce
-	.4byte	0x7af2
+	.8byte	.LVL2010
+	.4byte	0xa949
+	.4byte	0x7b6d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36751,9 +36819,9 @@ __func__.7630:
 	.2byte	0x415
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2015
-	.4byte	0x2cb7
-	.4byte	0x7b15
+	.8byte	.LVL2017
+	.4byte	0x2d32
+	.4byte	0x7b90
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36772,9 +36840,9 @@ __func__.7630:
 	.byte	0x1c
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2020
-	.4byte	0x65c9
-	.4byte	0x7b2c
+	.8byte	.LVL2022
+	.4byte	0x6644
+	.4byte	0x7ba7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36782,12 +36850,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2021
-	.4byte	0x2ef8
+	.8byte	.LVL2023
+	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2022
-	.4byte	0x2cb7
-	.4byte	0x7b55
+	.8byte	.LVL2024
+	.4byte	0x2d32
+	.4byte	0x7bd0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36800,9 +36868,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2023
-	.4byte	0x2cb7
-	.4byte	0x7b71
+	.8byte	.LVL2025
+	.4byte	0x2d32
+	.4byte	0x7bec
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36815,9 +36883,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2029
+	.8byte	.LVL2031
 	.4byte	0x2527
-	.4byte	0x7b8f
+	.4byte	0x7c0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36832,12 +36900,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2036
-	.4byte	0x7cda
-	.uleb128 0x34
 	.8byte	.LVL2038
-	.4byte	0x38b7
-	.4byte	0x7bb4
+	.4byte	0x7d55
+	.uleb128 0x34
+	.8byte	.LVL2040
+	.4byte	0x3932
+	.4byte	0x7c2f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36846,9 +36914,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2041
-	.4byte	0x5bbb
-	.4byte	0x7bd8
+	.8byte	.LVL2043
+	.4byte	0x5c36
+	.4byte	0x7c53
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36868,9 +36936,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2042
-	.4byte	0x3789
-	.4byte	0x7bf0
+	.8byte	.LVL2044
+	.4byte	0x3804
+	.4byte	0x7c6b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36879,9 +36947,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2046
+	.8byte	.LVL2048
 	.4byte	0x259f
-	.4byte	0x7c0d
+	.4byte	0x7c88
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36895,9 +36963,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2051
-	.4byte	0xa8ce
-	.4byte	0x7c40
+	.8byte	.LVL2053
+	.4byte	0xa949
+	.4byte	0x7cbb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36918,9 +36986,9 @@ __func__.7630:
 	.2byte	0x45f
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2059
+	.8byte	.LVL2061
 	.4byte	0x2527
-	.4byte	0x7c63
+	.4byte	0x7cde
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36939,9 +37007,9 @@ __func__.7630:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2063
+	.8byte	.LVL2065
 	.4byte	0x259f
-	.4byte	0x7c7a
+	.4byte	0x7cf5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36949,12 +37017,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2064
+	.8byte	.LVL2066
 	.4byte	0x2527
 	.uleb128 0x34
-	.8byte	.LVL2067
-	.4byte	0x7d15
-	.4byte	0x7caa
+	.8byte	.LVL2069
+	.4byte	0x7d90
+	.4byte	0x7d25
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -36974,8 +37042,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL2068
-	.4byte	0xa8ce
+	.8byte	.LVL2070
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -36996,8 +37064,8 @@ __func__.7630:
 	.2byte	0x46e
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF834
+	.uleb128 0x49
+	.4byte	.LASF835
 	.byte	0x3
 	.2byte	0x3b7
 	.4byte	0x5b
@@ -37005,10 +37073,10 @@ __func__.7630:
 	.8byte	.LFE216-.LFB216
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7d15
+	.4byte	0x7d90
 	.uleb128 0x36
-	.8byte	.LVL1732
-	.4byte	0x7d15
+	.8byte	.LVL1734
+	.4byte	0x7d90
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37021,45 +37089,45 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x5d
-	.4byte	.LASF835
+	.uleb128 0x5f
+	.4byte	.LASF836
 	.byte	0x3
 	.2byte	0x387
 	.8byte	.LFB215
 	.8byte	.LFE215-.LFB215
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x7f49
-	.uleb128 0x5a
+	.4byte	0x7fc4
+	.uleb128 0x5d
 	.string	"req"
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1abc
-	.4byte	.LLST391
-	.uleb128 0x50
-	.4byte	.LASF593
+	.4byte	.LLST393
+	.uleb128 0x53
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST392
-	.uleb128 0x50
-	.4byte	.LASF836
+	.4byte	.LLST394
+	.uleb128 0x53
+	.4byte	.LASF837
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0xdd4
-	.4byte	.LLST393
-	.uleb128 0x50
-	.4byte	.LASF639
+	.4byte	.LLST395
+	.uleb128 0x53
+	.4byte	.LASF640
 	.byte	0x3
 	.2byte	0x387
 	.4byte	0x1f04
-	.4byte	.LLST394
-	.uleb128 0x4a
+	.4byte	.LLST396
+	.uleb128 0x4d
 	.string	"i"
 	.byte	0x3
 	.2byte	0x389
 	.4byte	0xdd4
-	.uleb128 0x5e
+	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x3
 	.2byte	0x38a
@@ -37067,40 +37135,40 @@ __func__.7630:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x52
-	.4byte	.LASF663
+	.uleb128 0x55
+	.4byte	.LASF664
 	.byte	0x3
 	.2byte	0x38a
 	.4byte	0xdd4
-	.4byte	.LLST395
-	.uleb128 0x52
-	.4byte	.LASF623
+	.4byte	.LLST397
+	.uleb128 0x55
+	.4byte	.LASF624
 	.byte	0x3
 	.2byte	0x38b
 	.4byte	0xdc9
-	.4byte	.LLST396
-	.uleb128 0x52
-	.4byte	.LASF596
+	.4byte	.LLST398
+	.uleb128 0x55
+	.4byte	.LASF599
 	.byte	0x3
 	.2byte	0x38c
-	.4byte	0x2d84
-	.4byte	.LLST397
-	.uleb128 0x5f
-	.4byte	.LASF687
+	.4byte	0x2dff
+	.4byte	.LLST399
+	.uleb128 0x61
+	.4byte	.LASF688
 	.byte	0x3
 	.2byte	0x38d
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x7f59
+	.4byte	0x7fd4
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6229
+	.8byte	__func__.6228
 	.uleb128 0x34
-	.8byte	.LVL1715
+	.8byte	.LVL1717
 	.4byte	0x27e7
-	.4byte	0x7e00
+	.4byte	0x7e7b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37121,12 +37189,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1716
-	.4byte	0x6cf6
-	.uleb128 0x34
 	.8byte	.LVL1718
-	.4byte	0x38b7
-	.4byte	0x7e25
+	.4byte	0x6d71
+	.uleb128 0x34
+	.8byte	.LVL1720
+	.4byte	0x3932
+	.4byte	0x7ea0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37135,12 +37203,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1719
-	.4byte	0x2e56
+	.8byte	.LVL1721
+	.4byte	0x2ed1
 	.uleb128 0x34
-	.8byte	.LVL1720
-	.4byte	0x3789
-	.4byte	0x7e4a
+	.8byte	.LVL1722
+	.4byte	0x3804
+	.4byte	0x7ec5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37149,9 +37217,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1721
+	.8byte	.LVL1723
 	.4byte	0x27e7
-	.4byte	0x7e6c
+	.4byte	0x7ee7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37170,9 +37238,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1722
-	.4byte	0xa8ce
-	.4byte	0x7e9f
+	.8byte	.LVL1724
+	.4byte	0xa949
+	.4byte	0x7f1a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37193,9 +37261,9 @@ __func__.7630:
 	.2byte	0x3a5
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1723
-	.4byte	0x5bbb
-	.4byte	0x7ebd
+	.8byte	.LVL1725
+	.4byte	0x5c36
+	.4byte	0x7f38
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37209,9 +37277,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1725
-	.4byte	0x6cf6
-	.4byte	0x7ed7
+	.8byte	.LVL1727
+	.4byte	0x6d71
+	.4byte	0x7f52
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37222,9 +37290,9 @@ __func__.7630:
 	.byte	0x25
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1727
-	.4byte	0xa8ce
-	.4byte	0x7f01
+	.8byte	.LVL1729
+	.4byte	0xa949
+	.4byte	0x7f7c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37244,9 +37312,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1728
-	.4byte	0x3645
-	.4byte	0x7f19
+	.8byte	.LVL1730
+	.4byte	0x36c0
+	.4byte	0x7f94
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37255,8 +37323,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1730
-	.4byte	0xa8ce
+	.8byte	.LVL1732
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37279,15 +37347,15 @@ __func__.7630:
 	.byte	0
 	.uleb128 0xa
 	.4byte	0xee
-	.4byte	0x7f59
+	.4byte	0x7fd4
 	.uleb128 0xe
 	.4byte	0xda
 	.byte	0xc
 	.byte	0
 	.uleb128 0x7
-	.4byte	0x7f49
-	.uleb128 0x46
-	.4byte	.LASF837
+	.4byte	0x7fc4
+	.uleb128 0x49
+	.4byte	.LASF838
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0x5b
@@ -37295,62 +37363,62 @@ __func__.7630:
 	.8byte	.LFE214-.LFB214
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8184
-	.uleb128 0x5a
+	.4byte	0x81ff
+	.uleb128 0x5d
 	.string	"LUN"
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdbe
-	.4byte	.LLST423
-	.uleb128 0x50
-	.4byte	.LASF731
+	.4byte	.LLST425
+	.uleb128 0x53
+	.4byte	.LASF732
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdd4
-	.4byte	.LLST424
-	.uleb128 0x50
-	.4byte	.LASF732
+	.4byte	.LLST426
+	.uleb128 0x53
+	.4byte	.LASF733
 	.byte	0x3
 	.2byte	0x32d
 	.4byte	0xdd4
-	.4byte	.LLST425
-	.uleb128 0x50
-	.4byte	.LASF733
+	.4byte	.LLST427
+	.uleb128 0x53
+	.4byte	.LASF734
 	.byte	0x3
 	.2byte	0x32d
-	.4byte	0x5a77
-	.4byte	.LLST426
-	.uleb128 0x51
+	.4byte	0x5af2
+	.4byte	.LLST428
+	.uleb128 0x54
 	.string	"ret"
 	.byte	0x3
 	.2byte	0x32f
 	.4byte	0x5b
-	.4byte	.LLST427
-	.uleb128 0x52
-	.4byte	.LASF829
+	.4byte	.LLST429
+	.uleb128 0x55
+	.4byte	.LASF830
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST428
-	.uleb128 0x52
-	.4byte	.LASF830
+	.4byte	.LLST430
+	.uleb128 0x55
+	.4byte	.LASF831
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST429
-	.uleb128 0x52
-	.4byte	.LASF838
+	.4byte	.LLST431
+	.uleb128 0x55
+	.4byte	.LASF839
 	.byte	0x3
 	.2byte	0x330
 	.4byte	0xdd4
-	.4byte	.LLST430
-	.uleb128 0x51
+	.4byte	.LLST432
+	.uleb128 0x54
 	.string	"lpa"
 	.byte	0x3
 	.2byte	0x331
 	.4byte	0xdd4
-	.4byte	.LLST431
-	.uleb128 0x5e
+	.4byte	.LLST433
+	.uleb128 0x60
 	.string	"ppa"
 	.byte	0x3
 	.2byte	0x331
@@ -37358,69 +37426,69 @@ __func__.7630:
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x51
+	.uleb128 0x54
 	.string	"n"
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST432
-	.uleb128 0x52
-	.4byte	.LASF593
+	.4byte	.LLST434
+	.uleb128 0x55
+	.4byte	.LASF596
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST433
-	.uleb128 0x52
-	.4byte	.LASF831
+	.4byte	.LLST435
+	.uleb128 0x55
+	.4byte	.LASF832
 	.byte	0x3
 	.2byte	0x333
 	.4byte	0xdd4
-	.4byte	.LLST434
-	.uleb128 0x52
-	.4byte	.LASF839
+	.4byte	.LLST436
+	.uleb128 0x55
+	.4byte	.LASF840
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST435
-	.uleb128 0x52
-	.4byte	.LASF840
+	.4byte	.LLST437
+	.uleb128 0x55
+	.4byte	.LASF841
 	.byte	0x3
 	.2byte	0x334
 	.4byte	0xdd4
-	.4byte	.LLST436
-	.uleb128 0x52
-	.4byte	.LASF841
+	.4byte	.LLST438
+	.uleb128 0x55
+	.4byte	.LASF842
 	.byte	0x3
 	.2byte	0x335
 	.4byte	0xdd4
-	.4byte	.LLST437
-	.uleb128 0x52
-	.4byte	.LASF842
+	.4byte	.LLST439
+	.uleb128 0x55
+	.4byte	.LASF843
 	.byte	0x3
 	.2byte	0x336
 	.4byte	0xdd4
-	.4byte	.LLST438
-	.uleb128 0x61
-	.8byte	.LBB293
-	.8byte	.LBE293-.LBB293
-	.4byte	0x80cd
-	.uleb128 0x52
-	.4byte	.LASF608
+	.4byte	.LLST440
+	.uleb128 0x63
+	.8byte	.LBB297
+	.8byte	.LBE297-.LBB297
+	.4byte	0x8148
+	.uleb128 0x55
+	.4byte	.LASF587
 	.byte	0x3
 	.2byte	0x37a
 	.4byte	0xdc9
-	.4byte	.LLST439
+	.4byte	.LLST441
 	.uleb128 0x45
-	.8byte	.LVL1975
-	.4byte	0x6cf6
+	.8byte	.LVL1977
+	.4byte	0x6d71
 	.uleb128 0x45
-	.8byte	.LVL1976
-	.4byte	0x2ef8
+	.8byte	.LVL1978
+	.4byte	0x2f73
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1933
-	.4byte	0x5955
-	.4byte	0x80f2
+	.8byte	.LVL1935
+	.4byte	0x59d0
+	.4byte	0x816d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37441,12 +37509,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1940
-	.4byte	0x7cda
+	.8byte	.LVL1942
+	.4byte	0x7d55
 	.uleb128 0x34
-	.8byte	.LVL1946
-	.4byte	0x2cb7
-	.4byte	0x811b
+	.8byte	.LVL1948
+	.4byte	0x2d32
+	.4byte	0x8196
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37459,9 +37527,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1947
-	.4byte	0x5bbb
-	.4byte	0x813f
+	.8byte	.LVL1949
+	.4byte	0x5c36
+	.4byte	0x81ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37481,9 +37549,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1952
+	.8byte	.LVL1954
 	.4byte	0x29a4
-	.4byte	0x815c
+	.4byte	0x81d7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37497,10 +37565,10 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1955
+	.8byte	.LVL1957
 	.4byte	0x2527
 	.uleb128 0x36
-	.8byte	.LVL1962
+	.8byte	.LVL1964
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -37515,8 +37583,8 @@ __func__.7630:
 	.2byte	0x200
 	.byte	0
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF843
+	.uleb128 0x49
+	.4byte	.LASF844
 	.byte	0x3
 	.2byte	0x325
 	.4byte	0x5b
@@ -37524,13 +37592,13 @@ __func__.7630:
 	.8byte	.LFE213-.LFB213
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x81b4
+	.4byte	0x822f
 	.uleb128 0x45
-	.8byte	.LVL1737
-	.4byte	0x81b4
+	.8byte	.LVL1739
+	.4byte	0x822f
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF844
+	.uleb128 0x49
+	.4byte	.LASF845
 	.byte	0x3
 	.2byte	0x31c
 	.4byte	0x5b
@@ -37538,17 +37606,17 @@ __func__.7630:
 	.8byte	.LFE212-.LFB212
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8215
+	.4byte	0x8290
 	.uleb128 0x45
-	.8byte	.LVL1733
-	.4byte	0x7cda
+	.8byte	.LVL1735
+	.4byte	0x7d55
 	.uleb128 0x45
-	.8byte	.LVL1734
-	.4byte	0x5ce8
+	.8byte	.LVL1736
+	.4byte	0x5d63
 	.uleb128 0x34
-	.8byte	.LVL1735
-	.4byte	0x58ed
-	.4byte	0x8207
+	.8byte	.LVL1737
+	.4byte	0x5968
+	.4byte	0x8282
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37556,11 +37624,11 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1736
-	.4byte	0x5619
+	.8byte	.LVL1738
+	.4byte	0x5694
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF845
+	.uleb128 0x49
+	.4byte	.LASF846
 	.byte	0x3
 	.2byte	0x2e6
 	.4byte	0x5b
@@ -37568,34 +37636,34 @@ __func__.7630:
 	.8byte	.LFE211-.LFB211
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8327
+	.4byte	0x83a2
 	.uleb128 0x2a
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.2byte	0x2e8
-	.4byte	0x8327
+	.4byte	0x83a2
 	.uleb128 0xa
 	.byte	0x3
 	.8byte	g_nand_phy_info
 	.byte	0x9f
-	.uleb128 0x56
-	.4byte	.LASF847
+	.uleb128 0x59
+	.4byte	.LASF848
 	.byte	0x3
 	.2byte	0x2f3
 	.8byte	.LDL2
-	.uleb128 0x61
-	.8byte	.LBB302
-	.8byte	.LBE302-.LBB302
-	.4byte	0x829a
-	.uleb128 0x51
+	.uleb128 0x63
+	.8byte	.LBB306
+	.8byte	.LBE306-.LBB306
+	.4byte	0x8315
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x310
 	.4byte	0xdd4
-	.4byte	.LLST467
+	.4byte	.LLST469
 	.uleb128 0x36
-	.8byte	.LVL2172
-	.4byte	0x2cb7
+	.8byte	.LVL2174
+	.4byte	0x2d32
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37609,9 +37677,9 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2164
-	.4byte	0xa8ce
-	.4byte	0x82c6
+	.8byte	.LVL2166
+	.4byte	0xa949
+	.4byte	0x8341
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37626,9 +37694,9 @@ __func__.7630:
 	.8byte	.LC70
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2165
-	.4byte	0x8aa4
-	.4byte	0x82e5
+	.8byte	.LVL2167
+	.4byte	0x8b1f
+	.4byte	0x8360
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37637,26 +37705,26 @@ __func__.7630:
 	.8byte	.LANCHOR0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2166
-	.4byte	0x87b0
-	.uleb128 0x45
-	.8byte	.LVL2167
-	.4byte	0x86d9
-	.uleb128 0x45
 	.8byte	.LVL2168
-	.4byte	0x6b5e
+	.4byte	0x882b
 	.uleb128 0x45
 	.8byte	.LVL2169
-	.4byte	0x70ac
+	.4byte	0x8754
 	.uleb128 0x45
 	.8byte	.LVL2170
-	.4byte	0x3f1d
+	.4byte	0x6bd9
+	.uleb128 0x45
+	.8byte	.LVL2171
+	.4byte	0x7127
+	.uleb128 0x45
+	.8byte	.LVL2172
+	.4byte	0x3f98
 	.byte	0
 	.uleb128 0x8
 	.byte	0x8
 	.4byte	0xee1
-	.uleb128 0x46
-	.4byte	.LASF848
+	.uleb128 0x49
+	.4byte	.LASF849
 	.byte	0x3
 	.2byte	0x26e
 	.4byte	0x5b
@@ -37664,57 +37732,57 @@ __func__.7630:
 	.8byte	.LFE210-.LFB210
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x84c7
-	.uleb128 0x52
-	.4byte	.LASF717
+	.4byte	0x8542
+	.uleb128 0x55
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST463
-	.uleb128 0x52
-	.4byte	.LASF849
+	.4byte	.LLST465
+	.uleb128 0x55
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x270
 	.4byte	0xdc9
-	.4byte	.LLST464
-	.uleb128 0x52
-	.4byte	.LASF850
+	.4byte	.LLST466
+	.uleb128 0x55
+	.4byte	.LASF851
 	.byte	0x3
 	.2byte	0x271
 	.4byte	0xdc9
-	.4byte	.LLST465
-	.uleb128 0x51
+	.4byte	.LLST467
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x272
 	.4byte	0xdc9
-	.4byte	.LLST466
-	.uleb128 0x56
-	.4byte	.LASF851
+	.4byte	.LLST468
+	.uleb128 0x59
+	.4byte	.LASF852
 	.byte	0x3
 	.2byte	0x2bc
-	.8byte	.L1635
-	.uleb128 0x56
-	.4byte	.LASF852
+	.8byte	.L1636
+	.uleb128 0x59
+	.4byte	.LASF853
 	.byte	0x3
 	.2byte	0x2cc
-	.8byte	.L1637
+	.8byte	.L1638
 	.uleb128 0x45
-	.8byte	.LVL2123
-	.4byte	0x6b5e
+	.8byte	.LVL2125
+	.4byte	0x6bd9
 	.uleb128 0x45
-	.8byte	.LVL2124
-	.4byte	0x70ac
+	.8byte	.LVL2126
+	.4byte	0x7127
 	.uleb128 0x45
-	.8byte	.LVL2125
-	.4byte	0x6dde
+	.8byte	.LVL2127
+	.4byte	0x6e59
 	.uleb128 0x45
-	.8byte	.LVL2133
-	.4byte	0x72c7
+	.8byte	.LVL2135
+	.4byte	0x7342
 	.uleb128 0x34
-	.8byte	.LVL2134
+	.8byte	.LVL2136
 	.4byte	0x259f
-	.4byte	0x83f8
+	.4byte	0x8473
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37722,9 +37790,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2136
+	.8byte	.LVL2138
 	.4byte	0x259f
-	.4byte	0x8410
+	.4byte	0x848b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37733,9 +37801,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2137
-	.4byte	0x4593
-	.4byte	0x8428
+	.8byte	.LVL2139
+	.4byte	0x460e
+	.4byte	0x84a3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37744,9 +37812,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2143
-	.4byte	0x84c7
-	.4byte	0x843f
+	.8byte	.LVL2145
+	.4byte	0x8542
+	.4byte	0x84ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37754,15 +37822,15 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2148
-	.4byte	0x8b14
+	.8byte	.LVL2150
+	.4byte	0x8b8f
 	.uleb128 0x45
-	.8byte	.LVL2149
-	.4byte	0x6b5e
+	.8byte	.LVL2151
+	.4byte	0x6bd9
 	.uleb128 0x34
-	.8byte	.LVL2152
-	.4byte	0x84c7
-	.4byte	0x8470
+	.8byte	.LVL2154
+	.4byte	0x8542
+	.4byte	0x84eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37770,9 +37838,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2155
-	.4byte	0x84c7
-	.4byte	0x8487
+	.8byte	.LVL2157
+	.4byte	0x8542
+	.4byte	0x8502
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37780,9 +37848,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2159
-	.4byte	0x4593
-	.4byte	0x849f
+	.8byte	.LVL2161
+	.4byte	0x460e
+	.4byte	0x851a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37791,17 +37859,17 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2160
-	.4byte	0x6905
+	.8byte	.LVL2162
+	.4byte	0x6980
 	.uleb128 0x45
-	.8byte	.LVL2161
-	.4byte	0x5619
+	.8byte	.LVL2163
+	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2162
-	.4byte	0x3f1d
+	.8byte	.LVL2164
+	.4byte	0x3f98
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF853
+	.uleb128 0x49
+	.4byte	.LASF854
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0x5b
@@ -37809,76 +37877,76 @@ __func__.7630:
 	.8byte	.LFE209-.LFB209
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x86af
-	.uleb128 0x50
-	.4byte	.LASF717
+	.4byte	0x872a
+	.uleb128 0x53
+	.4byte	.LASF718
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdc9
-	.4byte	.LLST186
-	.uleb128 0x50
-	.4byte	.LASF854
+	.4byte	.LLST188
+	.uleb128 0x53
+	.4byte	.LASF855
 	.byte	0x3
 	.2byte	0x20f
 	.4byte	0xdbe
-	.4byte	.LLST187
-	.uleb128 0x52
-	.4byte	.LASF849
+	.4byte	.LLST189
+	.uleb128 0x55
+	.4byte	.LASF850
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST188
-	.uleb128 0x52
+	.4byte	.LLST190
+	.uleb128 0x55
 	.4byte	.LASF569
 	.byte	0x3
 	.2byte	0x211
 	.4byte	0xdc9
-	.4byte	.LLST189
-	.uleb128 0x52
-	.4byte	.LASF592
+	.4byte	.LLST191
+	.uleb128 0x55
+	.4byte	.LASF595
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST190
-	.uleb128 0x52
+	.4byte	.LLST192
+	.uleb128 0x55
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x212
 	.4byte	0xdc9
-	.4byte	.LLST191
-	.uleb128 0x52
-	.4byte	.LASF855
+	.4byte	.LLST193
+	.uleb128 0x55
+	.4byte	.LASF856
 	.byte	0x3
 	.2byte	0x213
 	.4byte	0xdc9
-	.4byte	.LLST192
-	.uleb128 0x52
-	.4byte	.LASF856
+	.4byte	.LLST194
+	.uleb128 0x55
+	.4byte	.LASF857
 	.byte	0x3
 	.2byte	0x214
 	.4byte	0xdc9
-	.4byte	.LLST193
-	.uleb128 0x52
-	.4byte	.LASF857
+	.4byte	.LLST195
+	.uleb128 0x55
+	.4byte	.LASF858
 	.byte	0x3
 	.2byte	0x215
 	.4byte	0xdc9
-	.4byte	.LLST194
-	.uleb128 0x52
-	.4byte	.LASF858
+	.4byte	.LLST196
+	.uleb128 0x55
+	.4byte	.LASF859
 	.byte	0x3
 	.2byte	0x216
 	.4byte	0xdc9
-	.4byte	.LLST195
-	.uleb128 0x56
-	.4byte	.LASF859
+	.4byte	.LLST197
+	.uleb128 0x59
+	.4byte	.LASF860
 	.byte	0x3
 	.2byte	0x240
-	.8byte	.L439
+	.8byte	.L440
 	.uleb128 0x34
-	.8byte	.LVL692
+	.8byte	.LVL694
 	.4byte	0x2721
-	.4byte	0x85b0
+	.4byte	0x862b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37886,12 +37954,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL695
-	.4byte	0x7574
+	.8byte	.LVL697
+	.4byte	0x75ef
 	.uleb128 0x34
-	.8byte	.LVL701
+	.8byte	.LVL703
 	.4byte	0x27e7
-	.4byte	0x85e0
+	.4byte	0x865b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37911,12 +37979,12 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL705
-	.4byte	0x7574
+	.8byte	.LVL707
+	.4byte	0x75ef
 	.uleb128 0x34
-	.8byte	.LVL709
-	.4byte	0x6a7f
-	.4byte	0x8604
+	.8byte	.LVL711
+	.4byte	0x6afa
+	.4byte	0x867f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37924,9 +37992,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL710
+	.8byte	.LVL712
 	.4byte	0x2721
-	.4byte	0x8622
+	.4byte	0x869d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37941,9 +38009,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL714
-	.4byte	0x6d91
-	.4byte	0x863a
+	.8byte	.LVL716
+	.4byte	0x6e0c
+	.4byte	0x86b5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37952,9 +38020,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL716
-	.4byte	0x86af
-	.4byte	0x8652
+	.8byte	.LVL718
+	.4byte	0x872a
+	.4byte	0x86cd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37963,9 +38031,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL717
-	.4byte	0x74e5
-	.4byte	0x866a
+	.8byte	.LVL719
+	.4byte	0x7560
+	.4byte	0x86e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37974,9 +38042,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL728
-	.4byte	0x6d91
-	.4byte	0x8682
+	.8byte	.LVL730
+	.4byte	0x6e0c
+	.4byte	0x86fd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -37985,9 +38053,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL730
-	.4byte	0x86af
-	.4byte	0x869a
+	.8byte	.LVL732
+	.4byte	0x872a
+	.4byte	0x8715
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -37996,8 +38064,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL731
-	.4byte	0x74e5
+	.8byte	.LVL733
+	.4byte	0x7560
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38006,26 +38074,26 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x47
-	.4byte	.LASF860
+	.uleb128 0x4a
+	.4byte	.LASF861
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0x5b
 	.byte	0x1
-	.4byte	0x86d9
-	.uleb128 0x48
+	.4byte	0x8754
+	.uleb128 0x4b
 	.4byte	.LASF388
 	.byte	0x3
 	.2byte	0x201
 	.4byte	0xdc9
-	.uleb128 0x49
-	.4byte	.LASF861
+	.uleb128 0x4c
+	.4byte	.LASF862
 	.byte	0x3
 	.2byte	0x203
 	.4byte	0xdc9
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF862
+	.uleb128 0x49
+	.4byte	.LASF863
 	.byte	0x3
 	.2byte	0x1ec
 	.4byte	0x5b
@@ -38033,11 +38101,11 @@ __func__.7630:
 	.8byte	.LFE207-.LFB207
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x87b0
+	.4byte	0x882b
 	.uleb128 0x34
-	.8byte	.LVL1108
+	.8byte	.LVL1110
 	.4byte	0x259f
-	.4byte	0x8712
+	.4byte	0x878d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38045,9 +38113,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1109
+	.8byte	.LVL1111
 	.4byte	0x259f
-	.4byte	0x8729
+	.4byte	0x87a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38055,9 +38123,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1110
+	.8byte	.LVL1112
 	.4byte	0x259f
-	.4byte	0x8740
+	.4byte	0x87bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38065,9 +38133,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1111
+	.8byte	.LVL1113
 	.4byte	0x259f
-	.4byte	0x876a
+	.4byte	0x87e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38087,9 +38155,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1112
+	.8byte	.LVL1114
 	.4byte	0x259f
-	.4byte	0x8795
+	.4byte	0x8810
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38109,14 +38177,14 @@ __func__.7630:
 	.2byte	0x200
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1113
-	.4byte	0x361a
+	.8byte	.LVL1115
+	.4byte	0x3695
 	.uleb128 0x45
-	.8byte	.LVL1114
-	.4byte	0x4f10
+	.8byte	.LVL1116
+	.4byte	0x4f8b
 	.byte	0
-	.uleb128 0x46
-	.4byte	.LASF863
+	.uleb128 0x49
+	.4byte	.LASF864
 	.byte	0x3
 	.2byte	0x116
 	.4byte	0x5b
@@ -38124,35 +38192,35 @@ __func__.7630:
 	.8byte	.LFE206-.LFB206
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8aa4
-	.uleb128 0x51
+	.4byte	0x8b1f
+	.uleb128 0x54
 	.string	"i"
 	.byte	0x3
 	.2byte	0x118
 	.4byte	0xdd4
-	.4byte	.LLST199
-	.uleb128 0x52
-	.4byte	.LASF864
+	.4byte	.LLST201
+	.uleb128 0x55
+	.4byte	.LASF865
 	.byte	0x3
 	.2byte	0x119
 	.4byte	0xdd4
-	.4byte	.LLST200
+	.4byte	.LLST202
 	.uleb128 0x3f
 	.4byte	.LASF574
-	.4byte	0x722a
+	.4byte	0x72a5
 	.uleb128 0x9
 	.byte	0x3
-	.8byte	__func__.6105
+	.8byte	__func__.6104
 	.uleb128 0x45
-	.8byte	.LVL739
+	.8byte	.LVL741
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL740
+	.8byte	.LVL742
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL742
+	.8byte	.LVL744
 	.4byte	0x2c2b
-	.4byte	0x8835
+	.4byte	0x88b0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38161,9 +38229,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL743
+	.8byte	.LVL745
 	.4byte	0x2c2b
-	.4byte	0x884d
+	.4byte	0x88c8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38172,9 +38240,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL744
+	.8byte	.LVL746
 	.4byte	0x2c2b
-	.4byte	0x8865
+	.4byte	0x88e0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38183,9 +38251,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL745
+	.8byte	.LVL747
 	.4byte	0x2c2b
-	.4byte	0x887d
+	.4byte	0x88f8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38194,9 +38262,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL746
+	.8byte	.LVL748
 	.4byte	0x2c2b
-	.4byte	0x8895
+	.4byte	0x8910
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38205,9 +38273,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL749
+	.8byte	.LVL751
 	.4byte	0x2c2b
-	.4byte	0x88ad
+	.4byte	0x8928
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38216,9 +38284,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL750
+	.8byte	.LVL752
 	.4byte	0x2c2b
-	.4byte	0x88c5
+	.4byte	0x8940
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38227,9 +38295,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL751
+	.8byte	.LVL753
 	.4byte	0x2c2b
-	.4byte	0x88dd
+	.4byte	0x8958
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38238,12 +38306,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL752
+	.8byte	.LVL754
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL753
+	.8byte	.LVL755
 	.4byte	0x2c2b
-	.4byte	0x8902
+	.4byte	0x897d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38252,9 +38320,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL754
+	.8byte	.LVL756
 	.4byte	0x2c2b
-	.4byte	0x891a
+	.4byte	0x8995
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38263,12 +38331,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL756
+	.8byte	.LVL758
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL758
+	.8byte	.LVL760
 	.4byte	0x2c2b
-	.4byte	0x893f
+	.4byte	0x89ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38277,9 +38345,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL759
+	.8byte	.LVL761
 	.4byte	0x2c2b
-	.4byte	0x8959
+	.4byte	0x89d4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38290,18 +38358,18 @@ __func__.7630:
 	.byte	0x24
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL761
+	.8byte	.LVL763
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL762
+	.8byte	.LVL764
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL763
+	.8byte	.LVL765
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL765
+	.8byte	.LVL767
 	.4byte	0x2c2b
-	.4byte	0x8998
+	.4byte	0x8a13
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38310,12 +38378,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL767
+	.8byte	.LVL769
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL769
+	.8byte	.LVL771
 	.4byte	0x2c2b
-	.4byte	0x89bd
+	.4byte	0x8a38
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38324,9 +38392,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL770
+	.8byte	.LVL772
 	.4byte	0x2c2b
-	.4byte	0x89d5
+	.4byte	0x8a50
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38335,24 +38403,24 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL771
+	.8byte	.LVL773
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL772
+	.8byte	.LVL774
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL773
+	.8byte	.LVL775
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL774
+	.8byte	.LVL776
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL775
+	.8byte	.LVL777
 	.4byte	0x2c2b
 	.uleb128 0x34
-	.8byte	.LVL776
+	.8byte	.LVL778
 	.4byte	0x259f
-	.4byte	0x8a2d
+	.4byte	0x8aa8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -38360,26 +38428,26 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL778
+	.8byte	.LVL780
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL780
+	.8byte	.LVL782
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL783
+	.8byte	.LVL785
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL786
+	.8byte	.LVL788
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL789
+	.8byte	.LVL791
 	.4byte	0x2c2b
 	.uleb128 0x45
-	.8byte	.LVL793
+	.8byte	.LVL795
 	.4byte	0x2c2b
 	.uleb128 0x36
-	.8byte	.LVL796
-	.4byte	0xa8ce
+	.8byte	.LVL798
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38395,7 +38463,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF865
+	.4byte	.LASF866
 	.byte	0x3
 	.byte	0xb6
 	.4byte	0x5b
@@ -38403,12 +38471,12 @@ __func__.7630:
 	.8byte	.LFE205-.LFB205
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b14
+	.4byte	0x8b8f
 	.uleb128 0x2e
-	.4byte	.LASF846
+	.4byte	.LASF847
 	.byte	0x3
 	.byte	0xb6
-	.4byte	0x8327
+	.4byte	0x83a2
 	.4byte	.LLST8
 	.uleb128 0x33
 	.string	"i"
@@ -38418,11 +38486,11 @@ __func__.7630:
 	.4byte	.LLST9
 	.uleb128 0x45
 	.8byte	.LVL30
-	.4byte	0x8b5d
+	.4byte	0x8bd8
 	.uleb128 0x34
 	.8byte	.LVL31
-	.4byte	0x8b5d
-	.4byte	0x8b06
+	.4byte	0x8bd8
+	.4byte	0x8b81
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38432,10 +38500,10 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL33
-	.4byte	0x8b14
+	.4byte	0x8b8f
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF866
+	.4byte	.LASF867
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0x5b
@@ -38443,28 +38511,28 @@ __func__.7630:
 	.8byte	.LFE204-.LFB204
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8b45
+	.4byte	0x8bc0
 	.uleb128 0x2e
-	.4byte	.LASF867
+	.4byte	.LASF868
 	.byte	0x3
 	.byte	0xa4
 	.4byte	0xdc9
 	.4byte	.LLST7
 	.byte	0
-	.uleb128 0x63
-	.4byte	.LASF868
+	.uleb128 0x65
+	.4byte	.LASF869
 	.byte	0x3
 	.byte	0x9e
 	.byte	0x1
-	.4byte	0x8b5d
+	.4byte	0x8bd8
 	.uleb128 0x38
-	.4byte	.LASF869
+	.4byte	.LASF870
 	.byte	0x3
 	.byte	0x9e
 	.4byte	0xdd4
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF870
+	.4byte	.LASF871
 	.byte	0x3
 	.byte	0x7f
 	.4byte	0xdc9
@@ -38472,7 +38540,7 @@ __func__.7630:
 	.8byte	.LFE202-.LFB202
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8baa
+	.4byte	0x8c25
 	.uleb128 0x31
 	.string	"num"
 	.byte	0x3
@@ -38486,14 +38554,14 @@ __func__.7630:
 	.4byte	0xdc9
 	.4byte	.LLST5
 	.uleb128 0x32
-	.4byte	.LASF871
+	.4byte	.LASF872
 	.byte	0x3
 	.byte	0x82
 	.4byte	0xdd4
 	.4byte	.LLST6
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF872
+	.4byte	.LASF873
 	.byte	0x3
 	.byte	0x71
 	.4byte	0x5b
@@ -38501,7 +38569,7 @@ __func__.7630:
 	.8byte	.LFE201-.LFB201
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x8c30
+	.4byte	0x8cab
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38516,8 +38584,8 @@ __func__.7630:
 	.4byte	.LLST113
 	.uleb128 0x34
 	.8byte	.LVL470
-	.4byte	0xa8e4
-	.4byte	0x8c1b
+	.4byte	0xa96b
+	.4byte	0x8c96
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38539,7 +38607,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL472
-	.4byte	0x8c30
+	.4byte	0x8cab
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38549,7 +38617,7 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x2d
-	.4byte	.LASF873
+	.4byte	.LASF874
 	.byte	0x3
 	.byte	0xb
 	.4byte	0x5b
@@ -38557,7 +38625,7 @@ __func__.7630:
 	.8byte	.LFE200-.LFB200
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x96be
+	.4byte	0x9739
 	.uleb128 0x2e
 	.4byte	.LASF299
 	.byte	0x3
@@ -38576,20 +38644,20 @@ __func__.7630:
 	.byte	0xe
 	.4byte	0xfa
 	.4byte	.LLST109
-	.uleb128 0x61
-	.8byte	.LBB203
-	.8byte	.LBE203-.LBB203
-	.4byte	0x8cd8
+	.uleb128 0x63
+	.8byte	.LBB205
+	.8byte	.LBE205-.LBB205
+	.4byte	0x8d53
 	.uleb128 0x32
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x57
 	.4byte	0xdc9
 	.4byte	.LLST110
 	.uleb128 0x34
 	.8byte	.LVL455
-	.4byte	0x65c9
-	.4byte	0x8cb7
+	.4byte	0x6644
+	.4byte	0x8d32
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38598,7 +38666,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL459
-	.4byte	0xa8e4
+	.4byte	0xa96b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38619,19 +38687,19 @@ __func__.7630:
 	.sleb128 -1
 	.byte	0
 	.byte	0
-	.uleb128 0x61
-	.8byte	.LBB204
-	.8byte	.LBE204-.LBB204
-	.4byte	0x8d1d
+	.uleb128 0x63
+	.8byte	.LBB206
+	.8byte	.LBE206-.LBB206
+	.4byte	0x8d98
 	.uleb128 0x32
-	.4byte	.LASF608
+	.4byte	.LASF587
 	.byte	0x3
 	.byte	0x60
 	.4byte	0xdc9
 	.4byte	.LLST111
 	.uleb128 0x36
 	.8byte	.LVL466
-	.4byte	0xa8e4
+	.4byte	0xa96b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38654,8 +38722,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL318
-	.4byte	0xa8e4
-	.4byte	0x8d42
+	.4byte	0xa96b
+	.4byte	0x8dbd
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38671,8 +38739,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL320
-	.4byte	0xa8e4
-	.4byte	0x8d67
+	.4byte	0xa96b
+	.4byte	0x8de2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38688,8 +38756,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL322
-	.4byte	0xa8e4
-	.4byte	0x8d8c
+	.4byte	0xa96b
+	.4byte	0x8e07
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38705,8 +38773,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL324
-	.4byte	0xa8e4
-	.4byte	0x8db1
+	.4byte	0xa96b
+	.4byte	0x8e2c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38722,8 +38790,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL326
-	.4byte	0xa8e4
-	.4byte	0x8dd6
+	.4byte	0xa96b
+	.4byte	0x8e51
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38739,8 +38807,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL328
-	.4byte	0xa8e4
-	.4byte	0x8dfb
+	.4byte	0xa96b
+	.4byte	0x8e76
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38756,8 +38824,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL330
-	.4byte	0xa8e4
-	.4byte	0x8e20
+	.4byte	0xa96b
+	.4byte	0x8e9b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38773,8 +38841,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL332
-	.4byte	0xa8e4
-	.4byte	0x8e45
+	.4byte	0xa96b
+	.4byte	0x8ec0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38790,8 +38858,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL334
-	.4byte	0xa8e4
-	.4byte	0x8e6a
+	.4byte	0xa96b
+	.4byte	0x8ee5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38807,8 +38875,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL336
-	.4byte	0xa8e4
-	.4byte	0x8e8f
+	.4byte	0xa96b
+	.4byte	0x8f0a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38824,8 +38892,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL338
-	.4byte	0xa8e4
-	.4byte	0x8eb4
+	.4byte	0xa96b
+	.4byte	0x8f2f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38841,8 +38909,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL340
-	.4byte	0xa8e4
-	.4byte	0x8ed9
+	.4byte	0xa96b
+	.4byte	0x8f54
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38858,8 +38926,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL342
-	.4byte	0xa8e4
-	.4byte	0x8efe
+	.4byte	0xa96b
+	.4byte	0x8f79
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38875,8 +38943,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL344
-	.4byte	0xa8e4
-	.4byte	0x8f23
+	.4byte	0xa96b
+	.4byte	0x8f9e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38892,8 +38960,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL346
-	.4byte	0xa8e4
-	.4byte	0x8f48
+	.4byte	0xa96b
+	.4byte	0x8fc3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38909,8 +38977,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL348
-	.4byte	0xa8e4
-	.4byte	0x8f6d
+	.4byte	0xa96b
+	.4byte	0x8fe8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38926,8 +38994,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL350
-	.4byte	0xa8e4
-	.4byte	0x8f92
+	.4byte	0xa96b
+	.4byte	0x900d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38943,8 +39011,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL352
-	.4byte	0xa8e4
-	.4byte	0x8fb7
+	.4byte	0xa96b
+	.4byte	0x9032
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38960,8 +39028,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL354
-	.4byte	0xa8e4
-	.4byte	0x8fdc
+	.4byte	0xa96b
+	.4byte	0x9057
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38977,8 +39045,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL356
-	.4byte	0xa8e4
-	.4byte	0x9001
+	.4byte	0xa96b
+	.4byte	0x907c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -38994,8 +39062,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL358
-	.4byte	0xa8e4
-	.4byte	0x9026
+	.4byte	0xa96b
+	.4byte	0x90a1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39011,8 +39079,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL360
-	.4byte	0xa8e4
-	.4byte	0x904b
+	.4byte	0xa96b
+	.4byte	0x90c6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39028,8 +39096,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL362
-	.4byte	0xa8e4
-	.4byte	0x9070
+	.4byte	0xa96b
+	.4byte	0x90eb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39045,8 +39113,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL364
-	.4byte	0xa8e4
-	.4byte	0x9095
+	.4byte	0xa96b
+	.4byte	0x9110
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39062,8 +39130,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL366
-	.4byte	0xa8e4
-	.4byte	0x90ba
+	.4byte	0xa96b
+	.4byte	0x9135
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39079,8 +39147,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL368
-	.4byte	0xa8e4
-	.4byte	0x90df
+	.4byte	0xa96b
+	.4byte	0x915a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39096,8 +39164,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL370
-	.4byte	0xa8e4
-	.4byte	0x9104
+	.4byte	0xa96b
+	.4byte	0x917f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39113,8 +39181,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL372
-	.4byte	0xa8e4
-	.4byte	0x9129
+	.4byte	0xa96b
+	.4byte	0x91a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39130,8 +39198,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL374
-	.4byte	0xa8e4
-	.4byte	0x914e
+	.4byte	0xa96b
+	.4byte	0x91c9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39147,8 +39215,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL376
-	.4byte	0xa8e4
-	.4byte	0x9173
+	.4byte	0xa96b
+	.4byte	0x91ee
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39164,8 +39232,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL378
-	.4byte	0xa8e4
-	.4byte	0x9198
+	.4byte	0xa96b
+	.4byte	0x9213
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39181,8 +39249,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL380
-	.4byte	0xa8e4
-	.4byte	0x91bd
+	.4byte	0xa96b
+	.4byte	0x9238
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39198,8 +39266,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL382
-	.4byte	0xa8e4
-	.4byte	0x91e2
+	.4byte	0xa96b
+	.4byte	0x925d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39215,8 +39283,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL384
-	.4byte	0xa8e4
-	.4byte	0x9207
+	.4byte	0xa96b
+	.4byte	0x9282
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39232,8 +39300,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL386
-	.4byte	0xa8e4
-	.4byte	0x922c
+	.4byte	0xa96b
+	.4byte	0x92a7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39249,8 +39317,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL388
-	.4byte	0xa8e4
-	.4byte	0x9251
+	.4byte	0xa96b
+	.4byte	0x92cc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39266,8 +39334,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL390
-	.4byte	0xa8e4
-	.4byte	0x9276
+	.4byte	0xa96b
+	.4byte	0x92f1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39283,8 +39351,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL392
-	.4byte	0xa8e4
-	.4byte	0x929b
+	.4byte	0xa96b
+	.4byte	0x9316
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39300,8 +39368,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL394
-	.4byte	0xa8e4
-	.4byte	0x92c0
+	.4byte	0xa96b
+	.4byte	0x933b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39317,8 +39385,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL396
-	.4byte	0xa8e4
-	.4byte	0x92e5
+	.4byte	0xa96b
+	.4byte	0x9360
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39334,8 +39402,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL398
-	.4byte	0xa8e4
-	.4byte	0x930a
+	.4byte	0xa96b
+	.4byte	0x9385
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39351,8 +39419,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL400
-	.4byte	0xa8e4
-	.4byte	0x932f
+	.4byte	0xa96b
+	.4byte	0x93aa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39368,8 +39436,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL402
-	.4byte	0xa8e4
-	.4byte	0x9354
+	.4byte	0xa96b
+	.4byte	0x93cf
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39385,8 +39453,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL404
-	.4byte	0xa8e4
-	.4byte	0x9379
+	.4byte	0xa96b
+	.4byte	0x93f4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39402,8 +39470,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL406
-	.4byte	0xa8e4
-	.4byte	0x939e
+	.4byte	0xa96b
+	.4byte	0x9419
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39419,8 +39487,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL408
-	.4byte	0xa8e4
-	.4byte	0x93c3
+	.4byte	0xa96b
+	.4byte	0x943e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39436,8 +39504,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL410
-	.4byte	0xa8e4
-	.4byte	0x93e8
+	.4byte	0xa96b
+	.4byte	0x9463
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39453,8 +39521,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL412
-	.4byte	0xa8e4
-	.4byte	0x940d
+	.4byte	0xa96b
+	.4byte	0x9488
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39470,8 +39538,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL414
-	.4byte	0xa8e4
-	.4byte	0x9432
+	.4byte	0xa96b
+	.4byte	0x94ad
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39487,8 +39555,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL416
-	.4byte	0xa8e4
-	.4byte	0x9457
+	.4byte	0xa96b
+	.4byte	0x94d2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39504,8 +39572,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL418
-	.4byte	0xa8e4
-	.4byte	0x947c
+	.4byte	0xa96b
+	.4byte	0x94f7
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39521,8 +39589,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL420
-	.4byte	0xa8e4
-	.4byte	0x94a1
+	.4byte	0xa96b
+	.4byte	0x951c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39538,8 +39606,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL422
-	.4byte	0xa8e4
-	.4byte	0x94c6
+	.4byte	0xa96b
+	.4byte	0x9541
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39555,8 +39623,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL424
-	.4byte	0xa8e4
-	.4byte	0x94eb
+	.4byte	0xa96b
+	.4byte	0x9566
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39572,8 +39640,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL426
-	.4byte	0xa8e4
-	.4byte	0x9510
+	.4byte	0xa96b
+	.4byte	0x958b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39589,8 +39657,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL428
-	.4byte	0xa8e4
-	.4byte	0x9535
+	.4byte	0xa96b
+	.4byte	0x95b0
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39606,8 +39674,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL430
-	.4byte	0xa8e4
-	.4byte	0x955a
+	.4byte	0xa96b
+	.4byte	0x95d5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39623,8 +39691,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL432
-	.4byte	0xa8e4
-	.4byte	0x957f
+	.4byte	0xa96b
+	.4byte	0x95fa
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39640,8 +39708,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL434
-	.4byte	0xa8e4
-	.4byte	0x95a4
+	.4byte	0xa96b
+	.4byte	0x961f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39657,8 +39725,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL436
-	.4byte	0xa8e4
-	.4byte	0x95c9
+	.4byte	0xa96b
+	.4byte	0x9644
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39674,8 +39742,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL438
-	.4byte	0xa8e4
-	.4byte	0x95ee
+	.4byte	0xa96b
+	.4byte	0x9669
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39691,8 +39759,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL440
-	.4byte	0xa8e4
-	.4byte	0x9613
+	.4byte	0xa96b
+	.4byte	0x968e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39708,8 +39776,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL442
-	.4byte	0xa8e4
-	.4byte	0x9638
+	.4byte	0xa96b
+	.4byte	0x96b3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39725,11 +39793,11 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL444
-	.4byte	0x3e62
+	.4byte	0x3edd
 	.uleb128 0x34
 	.8byte	.LVL445
-	.4byte	0xa8e4
-	.4byte	0x966a
+	.4byte	0xa96b
+	.4byte	0x96e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39745,11 +39813,11 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL447
-	.4byte	0x3e01
+	.4byte	0x3e7c
 	.uleb128 0x34
 	.8byte	.LVL448
-	.4byte	0xa8e4
-	.4byte	0x969c
+	.4byte	0xa96b
+	.4byte	0x9717
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39765,7 +39833,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL453
-	.4byte	0xa8e4
+	.4byte	0xa96b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39780,143 +39848,143 @@ __func__.7630:
 	.8byte	.LC67
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.4byte	0x2a9d
-	.8byte	.LFB348
-	.8byte	.LFE348-.LFB348
+	.8byte	.LFB349
+	.8byte	.LFE349-.LFB349
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9720
-	.uleb128 0x6c
+	.4byte	0x979b
+	.uleb128 0x6e
 	.4byte	0x2ab8
 	.uleb128 0x1
 	.byte	0x51
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.4byte	0x2ac3
 	.uleb128 0x1
 	.byte	0x52
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.4byte	0x2aad
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2ace
 	.4byte	.LLST0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2ad9
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2ae4
 	.4byte	.LLST1
-	.uleb128 0x70
+	.uleb128 0x72
 	.4byte	0x2aef
 	.uleb128 0x1
 	.byte	0x56
-	.uleb128 0x70
+	.uleb128 0x72
 	.4byte	0x2afa
 	.uleb128 0x1
 	.byte	0x54
-	.uleb128 0x6e
+	.uleb128 0x70
 	.4byte	0x2b05
 	.4byte	.LLST2
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x2b10
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x5398
-	.8byte	.LFB355
-	.8byte	.LFE355-.LFB355
+	.uleb128 0x6d
+	.4byte	0x5413
+	.8byte	.LFB356
+	.8byte	.LFE356-.LFB356
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9751
-	.uleb128 0x5c
-	.4byte	0x53a5
+	.4byte	0x97cc
+	.uleb128 0x47
+	.4byte	0x5420
 	.4byte	.LLST3
-	.uleb128 0x6c
-	.4byte	0x53b1
+	.uleb128 0x6e
+	.4byte	0x542c
 	.uleb128 0x6
 	.byte	0xfa
-	.4byte	0x53b1
+	.4byte	0x542c
 	.byte	0x9f
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x8b45
+	.uleb128 0x6d
+	.4byte	0x8bc0
 	.8byte	.LFB203
 	.8byte	.LFE203-.LFB203
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9774
-	.uleb128 0x6c
-	.4byte	0x8b51
+	.4byte	0x97ef
+	.uleb128 0x6e
+	.4byte	0x8bcc
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x86af
+	.uleb128 0x6d
+	.4byte	0x872a
 	.8byte	.LFB208
 	.8byte	.LFE208-.LFB208
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x97b8
-	.uleb128 0x5c
-	.4byte	0x86c0
+	.4byte	0x9833
+	.uleb128 0x47
+	.4byte	0x873b
 	.4byte	.LLST10
-	.uleb128 0x6f
-	.4byte	0x86cc
 	.uleb128 0x71
+	.4byte	0x8747
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6d
-	.4byte	0x86c0
-	.uleb128 0x71
+	.uleb128 0x6f
+	.4byte	0x873b
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0
-	.uleb128 0x6e
-	.4byte	0x9798
+	.uleb128 0x70
+	.4byte	0x9813
 	.4byte	.LLST11
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x72
-	.4byte	0x74dd
+	.uleb128 0x74
+	.4byte	0x7558
 	.8byte	.LFB224
 	.8byte	.LFE224-.LFB224
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x72
-	.4byte	0x6b52
+	.uleb128 0x74
+	.4byte	0x6bcd
 	.8byte	.LFB238
 	.8byte	.LFE238-.LFB238
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x72
-	.4byte	0x6b46
+	.uleb128 0x74
+	.4byte	0x6bc1
 	.8byte	.LFB239
 	.8byte	.LFE239-.LFB239
 	.uleb128 0x1
 	.byte	0x9c
-	.uleb128 0x6b
-	.4byte	0x68bb
+	.uleb128 0x6d
+	.4byte	0x6936
 	.8byte	.LFB245
 	.8byte	.LFE245-.LFB245
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x98a0
-	.uleb128 0x5c
-	.4byte	0x68c7
+	.4byte	0x991b
+	.uleb128 0x47
+	.4byte	0x6942
 	.4byte	.LLST49
-	.uleb128 0x6f
-	.4byte	0x68d2
-	.uleb128 0x61
-	.8byte	.LBB177
-	.8byte	.LBE177-.LBB177
-	.4byte	0x988a
-	.uleb128 0x5c
-	.4byte	0x68c7
+	.uleb128 0x71
+	.4byte	0x694d
+	.uleb128 0x63
+	.8byte	.LBB179
+	.8byte	.LBE179-.LBB179
+	.4byte	0x9905
+	.uleb128 0x47
+	.4byte	0x6942
 	.4byte	.LLST50
-	.uleb128 0x66
-	.8byte	.LBB178
-	.8byte	.LBE178-.LBB178
-	.uleb128 0x6f
-	.4byte	0x9821
+	.uleb128 0x68
+	.8byte	.LBB180
+	.8byte	.LBE180-.LBB180
+	.uleb128 0x71
+	.4byte	0x989c
 	.uleb128 0x2f
 	.8byte	.LVL139
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39940,7 +40008,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL137
-	.4byte	0x6821
+	.4byte	0x689c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -39950,33 +40018,33 @@ __func__.7630:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x68e0
+	.uleb128 0x6d
+	.4byte	0x695b
 	.8byte	.LFB244
 	.8byte	.LFE244-.LFB244
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9943
-	.uleb128 0x5c
-	.4byte	0x68ec
+	.4byte	0x99be
+	.uleb128 0x47
+	.4byte	0x6967
 	.4byte	.LLST56
-	.uleb128 0x6f
-	.4byte	0x68f7
-	.uleb128 0x61
-	.8byte	.LBB181
-	.8byte	.LBE181-.LBB181
-	.4byte	0x992d
-	.uleb128 0x5c
-	.4byte	0x68ec
+	.uleb128 0x71
+	.4byte	0x6972
+	.uleb128 0x63
+	.8byte	.LBB183
+	.8byte	.LBE183-.LBB183
+	.4byte	0x99a8
+	.uleb128 0x47
+	.4byte	0x6967
 	.4byte	.LLST57
-	.uleb128 0x66
-	.8byte	.LBB182
-	.8byte	.LBE182-.LBB182
-	.uleb128 0x6f
-	.4byte	0x98c4
+	.uleb128 0x68
+	.8byte	.LBB184
+	.8byte	.LBE184-.LBB184
+	.uleb128 0x71
+	.4byte	0x993f
 	.uleb128 0x2f
 	.8byte	.LVL159
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40000,7 +40068,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL157
-	.4byte	0x67a0
+	.4byte	0x681b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40010,68 +40078,68 @@ __func__.7630:
 	.byte	0x50
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x654a
+	.uleb128 0x6d
+	.4byte	0x65c5
 	.8byte	.LFB252
 	.8byte	.LFE252-.LFB252
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9aa0
-	.uleb128 0x5c
-	.4byte	0x655b
+	.4byte	0x9b1b
+	.uleb128 0x47
+	.4byte	0x65d6
 	.4byte	.LLST70
-	.uleb128 0x6f
-	.4byte	0x6567
-	.uleb128 0x6f
-	.4byte	0x6573
-	.uleb128 0x6f
-	.4byte	0x657f
-	.uleb128 0x6f
-	.4byte	0x658b
-	.uleb128 0x6f
-	.4byte	0x6597
-	.uleb128 0x6f
-	.4byte	0x65a3
-	.uleb128 0x6f
-	.4byte	0x65af
-	.uleb128 0x6f
-	.4byte	0x65bb
-	.uleb128 0x66
-	.8byte	.LBB185
-	.8byte	.LBE185-.LBB185
-	.uleb128 0x5c
-	.4byte	0x655b
+	.uleb128 0x71
+	.4byte	0x65e2
+	.uleb128 0x71
+	.4byte	0x65ee
+	.uleb128 0x71
+	.4byte	0x65fa
+	.uleb128 0x71
+	.4byte	0x6606
+	.uleb128 0x71
+	.4byte	0x6612
+	.uleb128 0x71
+	.4byte	0x661e
+	.uleb128 0x71
+	.4byte	0x662a
+	.uleb128 0x71
+	.4byte	0x6636
+	.uleb128 0x68
+	.8byte	.LBB187
+	.8byte	.LBE187-.LBB187
+	.uleb128 0x47
+	.4byte	0x65d6
 	.4byte	.LLST71
-	.uleb128 0x66
-	.8byte	.LBB186
-	.8byte	.LBE186-.LBB186
-	.uleb128 0x6e
-	.4byte	0x9967
+	.uleb128 0x68
+	.8byte	.LBB188
+	.8byte	.LBE188-.LBB188
+	.uleb128 0x70
+	.4byte	0x99e2
 	.4byte	.LLST72
-	.uleb128 0x6e
-	.4byte	0x996c
+	.uleb128 0x70
+	.4byte	0x99e7
 	.4byte	.LLST73
-	.uleb128 0x6e
-	.4byte	0x9971
+	.uleb128 0x70
+	.4byte	0x99ec
 	.4byte	.LLST74
-	.uleb128 0x6e
-	.4byte	0x9976
+	.uleb128 0x70
+	.4byte	0x99f1
 	.4byte	.LLST75
-	.uleb128 0x6e
-	.4byte	0x997b
+	.uleb128 0x70
+	.4byte	0x99f6
 	.4byte	.LLST76
-	.uleb128 0x6e
-	.4byte	0x9980
+	.uleb128 0x70
+	.4byte	0x99fb
 	.4byte	.LLST77
-	.uleb128 0x6e
-	.4byte	0x9985
+	.uleb128 0x70
+	.4byte	0x9a00
 	.4byte	.LLST78
-	.uleb128 0x6f
-	.4byte	0x998a
+	.uleb128 0x71
+	.4byte	0x9a05
 	.uleb128 0x34
 	.8byte	.LVL205
-	.4byte	0xa8ce
-	.4byte	0x9a31
+	.4byte	0xa949
+	.4byte	0x9aac
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40093,8 +40161,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL213
-	.4byte	0x66e6
-	.4byte	0x9a56
+	.4byte	0x6761
+	.4byte	0x9ad1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40110,8 +40178,8 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x34
 	.8byte	.LVL214
-	.4byte	0xa8ce
-	.4byte	0x9a89
+	.4byte	0xa949
+	.4byte	0x9b04
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40133,7 +40201,7 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x36
 	.8byte	.LVL215
-	.4byte	0x68bb
+	.4byte	0x6936
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40144,43 +40212,43 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x6287
+	.uleb128 0x6d
+	.4byte	0x6302
 	.8byte	.LFB255
 	.8byte	.LFE255-.LFB255
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b58
-	.uleb128 0x5c
-	.4byte	0x6298
+	.4byte	0x9bd3
+	.uleb128 0x47
+	.4byte	0x6313
 	.4byte	.LLST79
-	.uleb128 0x6e
-	.4byte	0x62a4
+	.uleb128 0x70
+	.4byte	0x631f
 	.4byte	.LLST80
-	.uleb128 0x6e
-	.4byte	0x62b0
+	.uleb128 0x70
+	.4byte	0x632b
 	.4byte	.LLST81
-	.uleb128 0x6f
-	.4byte	0x62bc
-	.uleb128 0x61
-	.8byte	.LBB189
-	.8byte	.LBE189-.LBB189
-	.4byte	0x9b4a
-	.uleb128 0x5c
-	.4byte	0x6298
+	.uleb128 0x71
+	.4byte	0x6337
+	.uleb128 0x63
+	.8byte	.LBB191
+	.8byte	.LBE191-.LBB191
+	.4byte	0x9bc5
+	.uleb128 0x47
+	.4byte	0x6313
 	.4byte	.LLST82
-	.uleb128 0x66
-	.8byte	.LBB190
-	.8byte	.LBE190-.LBB190
-	.uleb128 0x6f
-	.4byte	0x9ac4
-	.uleb128 0x6f
-	.4byte	0x9acd
-	.uleb128 0x6f
-	.4byte	0x9ad6
+	.uleb128 0x68
+	.8byte	.LBB192
+	.8byte	.LBE192-.LBB192
+	.uleb128 0x71
+	.4byte	0x9b3f
+	.uleb128 0x71
+	.4byte	0x9b48
+	.uleb128 0x71
+	.4byte	0x9b51
 	.uleb128 0x36
 	.8byte	.LVL221
-	.4byte	0xa8ce
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40204,53 +40272,53 @@ __func__.7630:
 	.byte	0
 	.uleb128 0x45
 	.8byte	.LVL223
-	.4byte	0x6905
+	.4byte	0x6980
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x58c9
+	.uleb128 0x6d
+	.4byte	0x5944
 	.8byte	.LFB266
 	.8byte	.LFE266-.LFB266
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9b9e
-	.uleb128 0x5c
-	.4byte	0x58d6
+	.4byte	0x9c19
+	.uleb128 0x47
+	.4byte	0x5951
 	.4byte	.LLST86
-	.uleb128 0x73
-	.4byte	0x58e2
+	.uleb128 0x75
+	.4byte	0x595d
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6c
-	.4byte	0x58d6
+	.uleb128 0x6e
+	.4byte	0x5951
 	.uleb128 0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.uleb128 0x71
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x60
-	.uleb128 0x6f
-	.4byte	0x9b7c
+	.uleb128 0x71
+	.4byte	0x9bf7
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x5398
+	.uleb128 0x6d
+	.4byte	0x5413
 	.8byte	.LFB272
 	.8byte	.LFE272-.LFB272
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9bea
-	.uleb128 0x5c
-	.4byte	0x53a5
+	.4byte	0x9c65
+	.uleb128 0x47
+	.4byte	0x5420
 	.4byte	.LLST87
-	.uleb128 0x5c
-	.4byte	0x53b1
+	.uleb128 0x47
+	.4byte	0x542c
 	.4byte	.LLST88
 	.uleb128 0x2f
 	.8byte	.LVL257
-	.4byte	0x9720
+	.4byte	0x979b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40259,59 +40327,59 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0x50
 	.uleb128 0x3e
-	.4byte	0x53b1
+	.4byte	0x542c
 	.uleb128 0x3
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x46ef
+	.uleb128 0x6d
+	.4byte	0x476a
 	.8byte	.LFB282
 	.8byte	.LFE282-.LFB282
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c48
-	.uleb128 0x6c
-	.4byte	0x46fc
+	.4byte	0x9cc3
+	.uleb128 0x6e
+	.4byte	0x4777
 	.uleb128 0x1
 	.byte	0x50
-	.uleb128 0x6f
-	.4byte	0x4708
-	.uleb128 0x66
-	.8byte	.LBB201
-	.8byte	.LBE201-.LBB201
-	.uleb128 0x5c
-	.4byte	0x46fc
+	.uleb128 0x71
+	.4byte	0x4783
+	.uleb128 0x68
+	.8byte	.LBB203
+	.8byte	.LBE203-.LBB203
+	.uleb128 0x47
+	.4byte	0x4777
 	.4byte	.LLST93
-	.uleb128 0x66
-	.8byte	.LBB202
-	.8byte	.LBE202-.LBB202
-	.uleb128 0x6e
-	.4byte	0x9c0c
+	.uleb128 0x68
+	.8byte	.LBB204
+	.8byte	.LBE204-.LBB204
+	.uleb128 0x70
+	.4byte	0x9c87
 	.4byte	.LLST94
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x3d17
+	.uleb128 0x6d
+	.4byte	0x3d92
 	.8byte	.LFB297
 	.8byte	.LFE297-.LFB297
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9c91
-	.uleb128 0x5c
-	.4byte	0x3d28
+	.4byte	0x9d0c
+	.uleb128 0x47
+	.4byte	0x3da3
 	.4byte	.LLST121
-	.uleb128 0x71
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0xa0
-	.uleb128 0x5c
-	.4byte	0x3d28
+	.uleb128 0x47
+	.4byte	0x3da3
 	.4byte	.LLST122
 	.uleb128 0x36
 	.8byte	.LVL504
-	.4byte	0x68e0
+	.4byte	0x695b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40322,67 +40390,67 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2e49
+	.uleb128 0x6d
+	.4byte	0x2ec4
 	.8byte	.LFB316
 	.8byte	.LFE316-.LFB316
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9cc7
+	.4byte	0x9d42
 	.uleb128 0x45
 	.8byte	.LVL576
-	.4byte	0x6cf6
+	.4byte	0x6d71
 	.uleb128 0x45
 	.8byte	.LVL577
-	.4byte	0x2ef8
+	.4byte	0x2f73
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2d9f
+	.uleb128 0x6d
+	.4byte	0x2e1a
 	.8byte	.LFB318
 	.8byte	.LFE318-.LFB318
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9dc1
-	.uleb128 0x73
-	.4byte	0x2db0
+	.4byte	0x9e3c
+	.uleb128 0x75
+	.4byte	0x2e2b
 	.byte	0
-	.uleb128 0x6f
-	.4byte	0x2dbc
-	.uleb128 0x6f
-	.4byte	0x2dc6
-	.uleb128 0x6f
-	.4byte	0x2dd2
+	.uleb128 0x71
+	.4byte	0x2e37
+	.uleb128 0x71
+	.4byte	0x2e41
+	.uleb128 0x71
+	.4byte	0x2e4d
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x130
-	.4byte	0x9d96
-	.uleb128 0x6f
-	.4byte	0x9ce2
-	.uleb128 0x6e
-	.4byte	0x9ce8
-	.4byte	.LLST251
+	.4byte	0x9e11
+	.uleb128 0x71
+	.4byte	0x9d5d
 	.uleb128 0x70
-	.4byte	0x9ced
+	.4byte	0x9d63
+	.4byte	.LLST253
+	.uleb128 0x72
+	.4byte	0x9d68
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -100
-	.uleb128 0x70
-	.4byte	0x9cf2
+	.uleb128 0x72
+	.4byte	0x9d6d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
-	.uleb128 0x61
-	.8byte	.LBB230
-	.8byte	.LBE230-.LBB230
-	.4byte	0x9d7b
-	.uleb128 0x70
-	.4byte	0x2de3
+	.uleb128 0x63
+	.8byte	.LBB234
+	.8byte	.LBE234-.LBB234
+	.4byte	0x9df6
+	.uleb128 0x72
+	.4byte	0x2e5e
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
 	.uleb128 0x34
-	.8byte	.LVL966
+	.8byte	.LVL968
 	.4byte	0x29a4
-	.4byte	0x9d60
+	.4byte	0x9ddb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40401,15 +40469,15 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL967
-	.4byte	0x6cf6
+	.8byte	.LVL969
+	.4byte	0x6d71
 	.uleb128 0x45
-	.8byte	.LVL968
-	.4byte	0x2ef8
+	.8byte	.LVL970
+	.4byte	0x2f73
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL965
-	.4byte	0x5bbb
+	.8byte	.LVL967
+	.4byte	0x5c36
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40423,11 +40491,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x66
-	.8byte	.LBB237
-	.8byte	.LBE237-.LBB237
-	.uleb128 0x70
-	.4byte	0x2df1
+	.uleb128 0x68
+	.8byte	.LBB241
+	.8byte	.LBE241-.LBB241
+	.uleb128 0x72
+	.4byte	0x2e6c
 	.uleb128 0x12
 	.byte	0x40
 	.byte	0x45
@@ -40442,51 +40510,51 @@ __func__.7630:
 	.byte	0x9f
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.4byte	0x26cd
-	.8byte	.LFB343
-	.8byte	.LFE343-.LFB343
+	.8byte	.LFB344
+	.8byte	.LFE344-.LFB344
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9ef5
-	.uleb128 0x5c
+	.4byte	0x9f70
+	.uleb128 0x47
 	.4byte	0x26dd
-	.4byte	.LLST297
-	.uleb128 0x73
+	.4byte	.LLST299
+	.uleb128 0x75
 	.4byte	0x26e8
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x26f3
-	.uleb128 0x6f
+	.uleb128 0x71
 	.4byte	0x26fe
-	.uleb128 0x66
-	.8byte	.LBB242
-	.8byte	.LBE242-.LBB242
-	.uleb128 0x5c
+	.uleb128 0x68
+	.8byte	.LBB246
+	.8byte	.LBE246-.LBB246
+	.uleb128 0x47
 	.4byte	0x26dd
-	.4byte	.LLST298
-	.uleb128 0x66
-	.8byte	.LBB243
-	.8byte	.LBE243-.LBB243
-	.uleb128 0x6f
-	.4byte	0x9de5
-	.uleb128 0x70
-	.4byte	0x9deb
+	.4byte	.LLST300
+	.uleb128 0x68
+	.8byte	.LBB247
+	.8byte	.LBE247-.LBB247
+	.uleb128 0x71
+	.4byte	0x9e60
+	.uleb128 0x72
+	.4byte	0x9e66
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -64
-	.uleb128 0x70
-	.4byte	0x9df0
+	.uleb128 0x72
+	.4byte	0x9e6b
 	.uleb128 0x3
 	.byte	0x91
 	.sleb128 -96
-	.uleb128 0x74
+	.uleb128 0x76
 	.4byte	0x2709
 	.8byte	.LDL1
 	.uleb128 0x34
-	.8byte	.LVL1218
+	.8byte	.LVL1220
 	.4byte	0x259f
-	.4byte	0x9e68
+	.4byte	0x9ee3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40507,9 +40575,9 @@ __func__.7630:
 	.byte	0x20
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1220
+	.8byte	.LVL1222
 	.4byte	0x259f
-	.4byte	0x9e8b
+	.4byte	0x9f06
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40529,9 +40597,9 @@ __func__.7630:
 	.byte	0x38
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1221
+	.8byte	.LVL1223
 	.4byte	0x2721
-	.4byte	0x9ead
+	.4byte	0x9f28
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40550,9 +40618,9 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1222
+	.8byte	.LVL1224
 	.4byte	0x27e7
-	.4byte	0x9ed4
+	.4byte	0x9f4f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40576,7 +40644,7 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1224
+	.8byte	.LVL1226
 	.4byte	0x2721
 	.uleb128 0x30
 	.uleb128 0x1
@@ -40598,51 +40666,51 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2dff
+	.uleb128 0x6d
+	.4byte	0x2e7a
 	.8byte	.LFB317
 	.8byte	.LFE317-.LFB317
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0x9fce
-	.uleb128 0x5c
-	.4byte	0x2e10
-	.4byte	.LLST318
-	.uleb128 0x6f
-	.4byte	0x2e1c
-	.uleb128 0x6f
-	.4byte	0x2e28
-	.uleb128 0x6f
-	.4byte	0x2e32
-	.uleb128 0x6f
-	.4byte	0x2e3c
+	.4byte	0xa049
+	.uleb128 0x47
+	.4byte	0x2e8b
+	.4byte	.LLST320
 	.uleb128 0x71
-	.4byte	.Ldebug_ranges0+0x1b0
-	.uleb128 0x6d
-	.4byte	0x2e10
+	.4byte	0x2e97
 	.uleb128 0x71
+	.4byte	0x2ea3
+	.uleb128 0x71
+	.4byte	0x2ead
+	.uleb128 0x71
+	.4byte	0x2eb7
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x1b0
+	.uleb128 0x6f
+	.4byte	0x2e8b
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1b0
-	.uleb128 0x6e
-	.4byte	0x9f19
-	.4byte	.LLST319
 	.uleb128 0x70
-	.4byte	0x9f1e
+	.4byte	0x9f94
+	.4byte	.LLST321
+	.uleb128 0x72
+	.4byte	0x9f99
 	.uleb128 0x1
 	.byte	0x64
-	.uleb128 0x6e
-	.4byte	0x9f23
-	.4byte	.LLST320
 	.uleb128 0x70
-	.4byte	0x9f28
+	.4byte	0x9f9e
+	.4byte	.LLST322
+	.uleb128 0x72
+	.4byte	0x9fa3
 	.uleb128 0x1
 	.byte	0x6a
 	.uleb128 0x45
-	.8byte	.LVL1311
-	.4byte	0x2e49
+	.8byte	.LVL1313
+	.4byte	0x2ec4
 	.uleb128 0x34
-	.8byte	.LVL1314
-	.4byte	0x6d91
-	.4byte	0x9f81
+	.8byte	.LVL1316
+	.4byte	0x6e0c
+	.4byte	0x9ffc
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40651,9 +40719,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1318
-	.4byte	0xa8ce
-	.4byte	0x9fa6
+	.8byte	.LVL1320
+	.4byte	0xa949
+	.4byte	0xa021
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40668,9 +40736,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1319
-	.4byte	0x7574
-	.4byte	0x9fbe
+	.8byte	.LVL1321
+	.4byte	0x75ef
+	.4byte	0xa039
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40679,39 +40747,39 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1320
-	.4byte	0x72c7
+	.8byte	.LVL1322
+	.4byte	0x7342
 	.byte	0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x3749
+	.uleb128 0x6d
+	.4byte	0x37c4
 	.8byte	.LFB301
 	.8byte	.LFE301-.LFB301
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa0f9
-	.uleb128 0x5c
-	.4byte	0x375a
-	.4byte	.LLST321
-	.uleb128 0x6f
-	.4byte	0x3766
-	.uleb128 0x61
-	.8byte	.LBB256
-	.8byte	.LBE256-.LBB256
-	.4byte	0xa0e4
-	.uleb128 0x5c
-	.4byte	0x375a
-	.4byte	.LLST322
-	.uleb128 0x66
-	.8byte	.LBB257
-	.8byte	.LBE257-.LBB257
-	.uleb128 0x6f
-	.4byte	0x9ff2
+	.4byte	0xa174
+	.uleb128 0x47
+	.4byte	0x37d5
+	.4byte	.LLST323
+	.uleb128 0x71
+	.4byte	0x37e1
+	.uleb128 0x63
+	.8byte	.LBB260
+	.8byte	.LBE260-.LBB260
+	.4byte	0xa15f
+	.uleb128 0x47
+	.4byte	0x37d5
+	.4byte	.LLST324
+	.uleb128 0x68
+	.8byte	.LBB261
+	.8byte	.LBE261-.LBB261
+	.uleb128 0x71
+	.4byte	0xa06d
 	.uleb128 0x34
-	.8byte	.LVL1329
-	.4byte	0x66e6
-	.4byte	0xa050
+	.8byte	.LVL1331
+	.4byte	0x6761
+	.4byte	0xa0cb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40726,9 +40794,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1330
-	.4byte	0xa8ce
-	.4byte	0xa083
+	.8byte	.LVL1332
+	.4byte	0xa949
+	.4byte	0xa0fe
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40749,9 +40817,9 @@ __func__.7630:
 	.2byte	0xa88
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1331
-	.4byte	0x3d17
-	.4byte	0xa09b
+	.8byte	.LVL1333
+	.4byte	0x3d92
+	.4byte	0xa116
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40760,9 +40828,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1332
-	.4byte	0x2dff
-	.4byte	0xa0b3
+	.8byte	.LVL1334
+	.4byte	0x2e7a
+	.4byte	0xa12e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40771,8 +40839,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1333
-	.4byte	0xa8ce
+	.8byte	.LVL1335
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40795,8 +40863,8 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1336
-	.4byte	0x654a
+	.8byte	.LVL1338
+	.4byte	0x65c5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40805,38 +40873,38 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x57c8
+	.uleb128 0x6d
+	.4byte	0x5843
 	.8byte	.LFB268
 	.8byte	.LFE268-.LFB268
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa1f2
-	.uleb128 0x71
+	.4byte	0xa26d
+	.uleb128 0x73
 	.4byte	.Ldebug_ranges0+0x1f0
-	.uleb128 0x6e
-	.4byte	0x57d6
-	.4byte	.LLST325
 	.uleb128 0x70
-	.4byte	0x57e2
+	.4byte	0x5851
+	.4byte	.LLST327
+	.uleb128 0x72
+	.4byte	0x585d
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -36
-	.uleb128 0x6e
-	.4byte	0x57ee
-	.4byte	.LLST326
 	.uleb128 0x70
-	.4byte	0x57fa
+	.4byte	0x5869
+	.4byte	.LLST328
+	.uleb128 0x72
+	.4byte	0x5875
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -32
-	.uleb128 0x6e
-	.4byte	0x5806
-	.4byte	.LLST327
+	.uleb128 0x70
+	.4byte	0x5881
+	.4byte	.LLST329
 	.uleb128 0x34
-	.8byte	.LVL1349
-	.4byte	0x5bbb
-	.4byte	0xa168
+	.8byte	.LVL1351
+	.4byte	0x5c36
+	.4byte	0xa1e3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40856,9 +40924,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1351
+	.8byte	.LVL1353
 	.4byte	0x29a4
-	.4byte	0xa18b
+	.4byte	0xa206
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40877,9 +40945,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1355
+	.8byte	.LVL1357
 	.4byte	0x259f
-	.4byte	0xa1a3
+	.4byte	0xa21e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -40888,9 +40956,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1357
-	.4byte	0x3789
-	.4byte	0xa1bb
+	.8byte	.LVL1359
+	.4byte	0x3804
+	.4byte	0xa236
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40899,9 +40967,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1358
+	.8byte	.LVL1360
 	.4byte	0x27e7
-	.4byte	0xa1e3
+	.4byte	0xa25e
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40925,20 +40993,20 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1359
-	.4byte	0x3645
+	.8byte	.LVL1361
+	.4byte	0x36c0
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x4444
+	.uleb128 0x6d
+	.4byte	0x44bf
 	.8byte	.LFB286
 	.8byte	.LFE286-.LFB286
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa233
+	.4byte	0xa2ae
 	.uleb128 0x2f
-	.8byte	.LVL1619
-	.4byte	0x5a7d
+	.8byte	.LVL1621
+	.4byte	0x5af8
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40957,17 +41025,17 @@ __func__.7630:
 	.8byte	.LANCHOR83
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x53be
+	.uleb128 0x6d
+	.4byte	0x5439
 	.8byte	.LFB271
 	.8byte	.LFE271-.LFB271
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa2a6
+	.4byte	0xa321
 	.uleb128 0x34
-	.8byte	.LVL1656
-	.4byte	0x5955
-	.4byte	0xa266
+	.8byte	.LVL1658
+	.4byte	0x59d0
+	.4byte	0xa2e1
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40976,9 +41044,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1657
-	.4byte	0xa8ce
-	.4byte	0xa292
+	.8byte	.LVL1659
+	.4byte	0xa949
+	.4byte	0xa30d
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -40993,7 +41061,7 @@ __func__.7630:
 	.8byte	.LC100
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1658
+	.8byte	.LVL1660
 	.4byte	0x259f
 	.uleb128 0x30
 	.uleb128 0x1
@@ -41002,17 +41070,17 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x30c4
+	.uleb128 0x6d
+	.4byte	0x313f
 	.8byte	.LFB311
 	.8byte	.LFE311-.LFB311
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa30c
+	.4byte	0xa387
 	.uleb128 0x34
-	.8byte	.LVL1799
-	.4byte	0x30cd
-	.4byte	0xa2d9
+	.8byte	.LVL1801
+	.4byte	0x3148
+	.4byte	0xa354
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41021,9 +41089,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1800
-	.4byte	0x5814
-	.4byte	0xa2f8
+	.8byte	.LVL1802
+	.4byte	0x588f
+	.4byte	0xa373
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41032,8 +41100,8 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1801
-	.4byte	0x32a5
+	.8byte	.LVL1803
+	.4byte	0x3320
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41041,103 +41109,103 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x2cb7
+	.uleb128 0x6d
+	.4byte	0x2d32
 	.8byte	.LFB319
 	.8byte	.LFE319-.LFB319
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa6ce
-	.uleb128 0x5c
-	.4byte	0x2cc8
-	.4byte	.LLST411
-	.uleb128 0x5c
-	.4byte	0x2cd4
-	.4byte	.LLST412
-	.uleb128 0x73
-	.4byte	0x2ce0
-	.byte	0x1
-	.uleb128 0x6f
-	.4byte	0x2cec
-	.uleb128 0x6f
-	.4byte	0x2cf8
-	.uleb128 0x75
-	.4byte	0x2d04
-	.sleb128 -1
-	.uleb128 0x6f
-	.4byte	0x2d10
-	.uleb128 0x6f
-	.4byte	0x2d1c
-	.uleb128 0x6f
-	.4byte	0x2d28
-	.uleb128 0x6f
-	.4byte	0x2d34
-	.uleb128 0x6f
-	.4byte	0x2d40
-	.uleb128 0x6f
-	.4byte	0x2d4c
-	.uleb128 0x6f
-	.4byte	0x2d68
-	.uleb128 0x40
-	.4byte	.Ldebug_ranges0+0x2a0
-	.4byte	0xa6ba
-	.uleb128 0x5c
-	.4byte	0x2cd4
+	.4byte	0xa749
+	.uleb128 0x47
+	.4byte	0x2d43
 	.4byte	.LLST413
-	.uleb128 0x5c
-	.4byte	0x2cc8
+	.uleb128 0x47
+	.4byte	0x2d4f
 	.4byte	.LLST414
+	.uleb128 0x75
+	.4byte	0x2d5b
+	.byte	0x1
+	.uleb128 0x71
+	.4byte	0x2d67
+	.uleb128 0x71
+	.4byte	0x2d73
+	.uleb128 0x77
+	.4byte	0x2d7f
+	.sleb128 -1
+	.uleb128 0x71
+	.4byte	0x2d8b
 	.uleb128 0x71
+	.4byte	0x2d97
+	.uleb128 0x71
+	.4byte	0x2da3
+	.uleb128 0x71
+	.4byte	0x2daf
+	.uleb128 0x71
+	.4byte	0x2dbb
+	.uleb128 0x71
+	.4byte	0x2dc7
+	.uleb128 0x71
+	.4byte	0x2de3
+	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2a0
-	.uleb128 0x6f
-	.4byte	0xa339
-	.uleb128 0x6e
-	.4byte	0xa33f
+	.4byte	0xa735
+	.uleb128 0x47
+	.4byte	0x2d4f
 	.4byte	.LLST415
+	.uleb128 0x47
+	.4byte	0x2d43
+	.4byte	.LLST416
+	.uleb128 0x73
+	.4byte	.Ldebug_ranges0+0x2a0
+	.uleb128 0x71
+	.4byte	0xa3b4
 	.uleb128 0x70
-	.4byte	0xa344
+	.4byte	0xa3ba
+	.4byte	.LLST417
+	.uleb128 0x72
+	.4byte	0xa3bf
 	.uleb128 0x2
 	.byte	0x91
 	.sleb128 -4
-	.uleb128 0x6f
-	.4byte	0xa349
-	.uleb128 0x6e
-	.4byte	0xa34f
-	.4byte	.LLST416
-	.uleb128 0x6e
-	.4byte	0xa354
-	.4byte	.LLST417
-	.uleb128 0x6e
-	.4byte	0xa359
+	.uleb128 0x71
+	.4byte	0xa3c4
+	.uleb128 0x70
+	.4byte	0xa3ca
 	.4byte	.LLST418
-	.uleb128 0x6e
-	.4byte	0xa35e
+	.uleb128 0x70
+	.4byte	0xa3cf
 	.4byte	.LLST419
-	.uleb128 0x6e
-	.4byte	0xa363
+	.uleb128 0x70
+	.4byte	0xa3d4
 	.4byte	.LLST420
-	.uleb128 0x6e
-	.4byte	0xa368
+	.uleb128 0x70
+	.4byte	0xa3d9
 	.4byte	.LLST421
-	.uleb128 0x76
-	.4byte	0x2d58
-	.uleb128 0x76
-	.4byte	0x2d60
-	.uleb128 0x6f
-	.4byte	0xa36d
+	.uleb128 0x70
+	.4byte	0xa3de
+	.4byte	.LLST422
+	.uleb128 0x70
+	.4byte	0xa3e3
+	.4byte	.LLST423
+	.uleb128 0x78
+	.4byte	0x2dd3
+	.uleb128 0x78
+	.4byte	0x2ddb
+	.uleb128 0x71
+	.4byte	0xa3e8
 	.uleb128 0x40
 	.4byte	.Ldebug_ranges0+0x2d0
-	.4byte	0xa46f
-	.uleb128 0x6e
-	.4byte	0x2d76
-	.4byte	.LLST422
+	.4byte	0xa4ea
+	.uleb128 0x70
+	.4byte	0x2df1
+	.4byte	.LLST424
 	.uleb128 0x45
-	.8byte	.LVL1834
-	.4byte	0x3d35
+	.8byte	.LVL1836
+	.4byte	0x3db0
 	.uleb128 0x34
-	.8byte	.LVL1837
-	.4byte	0x65c9
-	.4byte	0xa429
+	.8byte	.LVL1839
+	.4byte	0x6644
+	.4byte	0xa4a4
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41146,9 +41214,9 @@ __func__.7630:
 	.byte	0x40
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1840
-	.4byte	0x65c9
-	.4byte	0xa440
+	.8byte	.LVL1842
+	.4byte	0x6644
+	.4byte	0xa4bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41156,11 +41224,11 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1843
-	.4byte	0x2e49
+	.8byte	.LVL1845
+	.4byte	0x2ec4
 	.uleb128 0x36
-	.8byte	.LVL1852
-	.4byte	0xa8ce
+	.8byte	.LVL1854
+	.4byte	0xa949
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41176,12 +41244,12 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1864
-	.4byte	0x3534
+	.8byte	.LVL1866
+	.4byte	0x35af
 	.uleb128 0x34
-	.8byte	.LVL1865
-	.4byte	0x4593
-	.4byte	0xa494
+	.8byte	.LVL1867
+	.4byte	0x460e
+	.4byte	0xa50f
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41190,9 +41258,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1867
-	.4byte	0x65c9
-	.4byte	0xa4ac
+	.8byte	.LVL1869
+	.4byte	0x6644
+	.4byte	0xa527
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41201,12 +41269,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1872
-	.4byte	0x2d9f
-	.uleb128 0x34
 	.8byte	.LVL1874
-	.4byte	0x65c9
-	.4byte	0xa4d0
+	.4byte	0x2e1a
+	.uleb128 0x34
+	.8byte	.LVL1876
+	.4byte	0x6644
+	.4byte	0xa54b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41214,9 +41282,9 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1876
-	.4byte	0x3645
-	.4byte	0xa4e8
+	.8byte	.LVL1878
+	.4byte	0x36c0
+	.4byte	0xa563
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41225,9 +41293,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1881
-	.4byte	0x3534
-	.4byte	0xa500
+	.8byte	.LVL1883
+	.4byte	0x35af
+	.4byte	0xa57b
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41236,9 +41304,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1882
-	.4byte	0x3645
-	.4byte	0xa518
+	.8byte	.LVL1884
+	.4byte	0x36c0
+	.4byte	0xa593
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41247,9 +41315,9 @@ __func__.7630:
 	.byte	0xff
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1883
-	.4byte	0xa8ce
-	.4byte	0xa54b
+	.8byte	.LVL1885
+	.4byte	0xa949
+	.4byte	0xa5c6
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41270,9 +41338,9 @@ __func__.7630:
 	.2byte	0x296
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1884
-	.4byte	0xa8ce
-	.4byte	0xa57e
+	.8byte	.LVL1886
+	.4byte	0xa949
+	.4byte	0xa5f9
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41293,9 +41361,9 @@ __func__.7630:
 	.2byte	0x297
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1885
-	.4byte	0xa8ce
-	.4byte	0xa5b1
+	.8byte	.LVL1887
+	.4byte	0xa949
+	.4byte	0xa62c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41316,9 +41384,9 @@ __func__.7630:
 	.2byte	0x298
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1886
-	.4byte	0x4593
-	.4byte	0xa5c9
+	.8byte	.LVL1888
+	.4byte	0x460e
+	.4byte	0xa644
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41327,12 +41395,12 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1887
-	.4byte	0x2d9f
+	.8byte	.LVL1889
+	.4byte	0x2e1a
 	.uleb128 0x34
-	.8byte	.LVL1901
+	.8byte	.LVL1903
 	.4byte	0x29a4
-	.4byte	0xa5ee
+	.4byte	0xa669
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41341,9 +41409,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1910
-	.4byte	0xa8ce
-	.4byte	0xa621
+	.8byte	.LVL1912
+	.4byte	0xa949
+	.4byte	0xa69c
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41364,9 +41432,9 @@ __func__.7630:
 	.2byte	0x2bc
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL1912
-	.4byte	0x5bbb
-	.4byte	0xa63f
+	.8byte	.LVL1914
+	.4byte	0x5c36
+	.4byte	0xa6ba
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x51
@@ -41380,12 +41448,12 @@ __func__.7630:
 	.byte	0x30
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1913
-	.4byte	0x3012
+	.8byte	.LVL1915
+	.4byte	0x308d
 	.uleb128 0x34
-	.8byte	.LVL1914
-	.4byte	0x3572
-	.4byte	0xa66a
+	.8byte	.LVL1916
+	.4byte	0x35ed
+	.4byte	0xa6e5
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41400,28 +41468,28 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL1915
-	.4byte	0x2f4c
-	.uleb128 0x45
-	.8byte	.LVL1919
-	.4byte	0x2f4c
-	.uleb128 0x45
-	.8byte	.LVL1920
-	.4byte	0x3749
+	.8byte	.LVL1917
+	.4byte	0x2fc7
 	.uleb128 0x45
 	.8byte	.LVL1921
-	.4byte	0x7cda
+	.4byte	0x2fc7
 	.uleb128 0x45
 	.8byte	.LVL1922
-	.4byte	0x5ce8
+	.4byte	0x37c4
 	.uleb128 0x45
 	.8byte	.LVL1923
-	.4byte	0x5619
+	.4byte	0x7d55
+	.uleb128 0x45
+	.8byte	.LVL1924
+	.4byte	0x5d63
+	.uleb128 0x45
+	.8byte	.LVL1925
+	.4byte	0x5694
 	.byte	0
 	.byte	0
 	.uleb128 0x36
-	.8byte	.LVL1847
-	.4byte	0x32a5
+	.8byte	.LVL1849
+	.4byte	0x3320
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41429,34 +41497,34 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
-	.4byte	0x3f1d
+	.uleb128 0x6d
+	.4byte	0x3f98
 	.8byte	.LFB292
 	.8byte	.LFE292-.LFB292
 	.uleb128 0x1
 	.byte	0x9c
-	.4byte	0xa8ab
-	.uleb128 0x73
-	.4byte	0x3f2e
+	.4byte	0xa926
+	.uleb128 0x75
+	.4byte	0x3fa9
 	.byte	0
-	.uleb128 0x61
-	.8byte	.LBB300
-	.8byte	.LBE300-.LBB300
-	.4byte	0xa815
-	.uleb128 0x6f
-	.4byte	0xa6e9
-	.uleb128 0x61
-	.8byte	.LBB301
-	.8byte	.LBE301-.LBB301
-	.4byte	0xa728
-	.uleb128 0x6e
-	.4byte	0x3f39
-	.4byte	.LLST462
+	.uleb128 0x63
+	.8byte	.LBB304
+	.8byte	.LBE304-.LBB304
+	.4byte	0xa890
+	.uleb128 0x71
+	.4byte	0xa764
+	.uleb128 0x63
+	.8byte	.LBB305
+	.8byte	.LBE305-.LBB305
+	.4byte	0xa7a3
+	.uleb128 0x70
+	.4byte	0x3fb4
+	.4byte	.LLST464
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2107
-	.4byte	0x432b
-	.4byte	0xa740
+	.8byte	.LVL2109
+	.4byte	0x43a6
+	.4byte	0xa7bb
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41465,9 +41533,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2108
-	.4byte	0x432b
-	.4byte	0xa758
+	.8byte	.LVL2110
+	.4byte	0x43a6
+	.4byte	0xa7d3
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41476,9 +41544,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2110
-	.4byte	0x5814
-	.4byte	0xa777
+	.8byte	.LVL2112
+	.4byte	0x588f
+	.4byte	0xa7f2
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41487,9 +41555,9 @@ __func__.7630:
 	.8byte	.LANCHOR144
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2111
-	.4byte	0x5814
-	.4byte	0xa796
+	.8byte	.LVL2113
+	.4byte	0x588f
+	.4byte	0xa811
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41498,24 +41566,24 @@ __func__.7630:
 	.8byte	.LANCHOR149
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2112
-	.4byte	0x5ce8
+	.8byte	.LVL2114
+	.4byte	0x5d63
 	.uleb128 0x45
-	.8byte	.LVL2113
-	.4byte	0x5619
+	.8byte	.LVL2115
+	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2114
-	.4byte	0x5619
+	.8byte	.LVL2116
+	.4byte	0x5694
 	.uleb128 0x45
-	.8byte	.LVL2118
-	.4byte	0x2ef8
+	.8byte	.LVL2120
+	.4byte	0x2f73
 	.uleb128 0x45
-	.8byte	.LVL2119
-	.4byte	0x2ef8
+	.8byte	.LVL2121
+	.4byte	0x2f73
 	.uleb128 0x34
-	.8byte	.LVL2120
-	.4byte	0x38b7
-	.4byte	0xa7ef
+	.8byte	.LVL2122
+	.4byte	0x3932
+	.4byte	0xa86a
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41524,9 +41592,9 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x34
-	.8byte	.LVL2121
-	.4byte	0x38b7
-	.4byte	0xa807
+	.8byte	.LVL2123
+	.4byte	0x3932
+	.4byte	0xa882
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41535,42 +41603,42 @@ __func__.7630:
 	.sleb128 0
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2122
-	.4byte	0x41e2
+	.8byte	.LVL2124
+	.4byte	0x425d
 	.byte	0
 	.uleb128 0x45
-	.8byte	.LVL2094
-	.4byte	0x6b5e
-	.uleb128 0x45
-	.8byte	.LVL2095
-	.4byte	0x53cb
-	.uleb128 0x45
 	.8byte	.LVL2096
-	.4byte	0x5186
+	.4byte	0x6bd9
 	.uleb128 0x45
 	.8byte	.LVL2097
-	.4byte	0x4ec5
+	.4byte	0x5446
 	.uleb128 0x45
 	.8byte	.LVL2098
-	.4byte	0x4f6a
+	.4byte	0x5201
 	.uleb128 0x45
 	.8byte	.LVL2099
-	.4byte	0x43e3
+	.4byte	0x4f40
 	.uleb128 0x45
 	.8byte	.LVL2100
-	.4byte	0x53be
+	.4byte	0x4fe5
 	.uleb128 0x45
 	.8byte	.LVL2101
-	.4byte	0x69ea
+	.4byte	0x445e
 	.uleb128 0x45
 	.8byte	.LVL2102
-	.4byte	0x444d
+	.4byte	0x5439
 	.uleb128 0x45
 	.8byte	.LVL2103
-	.4byte	0x464b
-	.uleb128 0x36
+	.4byte	0x6a65
+	.uleb128 0x45
 	.8byte	.LVL2104
-	.4byte	0x58c9
+	.4byte	0x44c8
+	.uleb128 0x45
+	.8byte	.LVL2105
+	.4byte	0x46c6
+	.uleb128 0x36
+	.8byte	.LVL2106
+	.4byte	0x5944
 	.uleb128 0x30
 	.uleb128 0x1
 	.byte	0x50
@@ -41578,34 +41646,39 @@ __func__.7630:
 	.byte	0x31
 	.byte	0
 	.byte	0
-	.uleb128 0x77
-	.4byte	.LASF874
-	.4byte	.LASF874
-	.byte	0xa
-	.byte	0x72
-	.uleb128 0x78
+	.uleb128 0x79
 	.4byte	.LASF875
 	.4byte	.LASF875
-	.byte	0x1b
-	.2byte	0x16d
-	.uleb128 0x78
+	.byte	0xb
+	.byte	0x72
+	.uleb128 0x7a
 	.4byte	.LASF876
 	.4byte	.LASF876
-	.byte	0x1b
-	.2byte	0x16c
-	.uleb128 0x77
+	.byte	0x1c
+	.2byte	0x16d
+	.uleb128 0x7a
 	.4byte	.LASF877
 	.4byte	.LASF877
-	.byte	0x1d
-	.byte	0x12
-	.uleb128 0x77
+	.byte	0x1c
+	.2byte	0x16c
+	.uleb128 0x79
 	.4byte	.LASF878
 	.4byte	.LASF878
-	.byte	0x1c
-	.byte	0x35
-	.uleb128 0x77
+	.byte	0x1d
+	.byte	0x12
+	.uleb128 0x79
 	.4byte	.LASF879
 	.4byte	.LASF879
+	.byte	0x6
+	.byte	0x35
+	.uleb128 0x7a
+	.4byte	.LASF880
+	.4byte	.LASF880
+	.byte	0x1c
+	.2byte	0x399
+	.uleb128 0x79
+	.4byte	.LASF881
+	.4byte	.LASF881
 	.byte	0x1e
 	.byte	0x6d
 	.byte	0
@@ -42539,6 +42612,47 @@ __func__.7630:
 	.byte	0
 	.byte	0
 	.uleb128 0x46
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x49
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42565,7 +42679,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x47
+	.uleb128 0x4a
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42586,7 +42700,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x48
+	.uleb128 0x4b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42599,7 +42713,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x49
+	.uleb128 0x4c
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42612,7 +42726,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4a
+	.uleb128 0x4d
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42625,7 +42739,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4b
+	.uleb128 0x4e
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -42636,7 +42750,7 @@ __func__.7630:
 	.uleb128 0x5
 	.byte	0
 	.byte	0
-	.uleb128 0x4c
+	.uleb128 0x4f
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42649,19 +42763,19 @@ __func__.7630:
 	.uleb128 0xe
 	.byte	0
 	.byte	0
-	.uleb128 0x4d
+	.uleb128 0x50
 	.uleb128 0xb
 	.byte	0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x4e
+	.uleb128 0x51
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x1
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x4f
+	.uleb128 0x52
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -42680,7 +42794,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x50
+	.uleb128 0x53
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42695,7 +42809,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x51
+	.uleb128 0x54
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42710,7 +42824,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x52
+	.uleb128 0x55
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42725,7 +42839,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x53
+	.uleb128 0x56
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -42742,7 +42856,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x54
+	.uleb128 0x57
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42757,7 +42871,7 @@ __func__.7630:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x55
+	.uleb128 0x58
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -42768,7 +42882,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x56
+	.uleb128 0x59
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x3
@@ -42781,7 +42895,7 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x57
+	.uleb128 0x5a
 	.uleb128 0x4109
 	.byte	0
 	.uleb128 0x11
@@ -42792,7 +42906,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x58
+	.uleb128 0x5b
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42807,7 +42921,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x59
+	.uleb128 0x5c
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42822,7 +42936,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5a
+	.uleb128 0x5d
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42837,7 +42951,7 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x5b
+	.uleb128 0x5e
 	.uleb128 0x1d
 	.byte	0x1
 	.uleb128 0x31
@@ -42854,16 +42968,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5c
-	.uleb128 0x5
-	.byte	0
-	.uleb128 0x31
-	.uleb128 0x13
-	.uleb128 0x2
-	.uleb128 0x17
-	.byte	0
-	.byte	0
-	.uleb128 0x5d
+	.uleb128 0x5f
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42888,7 +42993,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x5e
+	.uleb128 0x60
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42903,7 +43008,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x5f
+	.uleb128 0x61
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -42918,7 +43023,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x60
+	.uleb128 0x62
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42937,7 +43042,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x61
+	.uleb128 0x63
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -42948,7 +43053,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x62
+	.uleb128 0x64
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x3
@@ -42963,7 +43068,7 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x63
+	.uleb128 0x65
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x3f
@@ -42982,7 +43087,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x64
+	.uleb128 0x66
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -42997,7 +43102,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x65
+	.uleb128 0x67
 	.uleb128 0x1d
 	.byte	0
 	.uleb128 0x31
@@ -43012,7 +43117,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x66
+	.uleb128 0x68
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x11
@@ -43021,7 +43126,7 @@ __func__.7630:
 	.uleb128 0x7
 	.byte	0
 	.byte	0
-	.uleb128 0x67
+	.uleb128 0x69
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43040,7 +43145,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x68
+	.uleb128 0x6a
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x3
@@ -43051,7 +43156,7 @@ __func__.7630:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x69
+	.uleb128 0x6b
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43068,7 +43173,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x6a
+	.uleb128 0x6c
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43093,7 +43198,7 @@ __func__.7630:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x6b
+	.uleb128 0x6d
 	.uleb128 0x2e
 	.byte	0x1
 	.uleb128 0x31
@@ -43110,7 +43215,7 @@ __func__.7630:
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6c
+	.uleb128 0x6e
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
@@ -43119,14 +43224,14 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x6d
+	.uleb128 0x6f
 	.uleb128 0x5
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x6e
+	.uleb128 0x70
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43135,14 +43240,14 @@ __func__.7630:
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x6f
+	.uleb128 0x71
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x70
+	.uleb128 0x72
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43151,14 +43256,14 @@ __func__.7630:
 	.uleb128 0x18
 	.byte	0
 	.byte	0
-	.uleb128 0x71
+	.uleb128 0x73
 	.uleb128 0xb
 	.byte	0x1
 	.uleb128 0x55
 	.uleb128 0x17
 	.byte	0
 	.byte	0
-	.uleb128 0x72
+	.uleb128 0x74
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x31
@@ -43173,7 +43278,7 @@ __func__.7630:
 	.uleb128 0x19
 	.byte	0
 	.byte	0
-	.uleb128 0x73
+	.uleb128 0x75
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43182,7 +43287,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x74
+	.uleb128 0x76
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
@@ -43191,7 +43296,7 @@ __func__.7630:
 	.uleb128 0x1
 	.byte	0
 	.byte	0
-	.uleb128 0x75
+	.uleb128 0x77
 	.uleb128 0x34
 	.byte	0
 	.uleb128 0x31
@@ -43200,14 +43305,14 @@ __func__.7630:
 	.uleb128 0xd
 	.byte	0
 	.byte	0
-	.uleb128 0x76
+	.uleb128 0x78
 	.uleb128 0xa
 	.byte	0
 	.uleb128 0x31
 	.uleb128 0x13
 	.byte	0
 	.byte	0
-	.uleb128 0x77
+	.uleb128 0x79
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43224,7 +43329,7 @@ __func__.7630:
 	.uleb128 0xb
 	.byte	0
 	.byte	0
-	.uleb128 0x78
+	.uleb128 0x7a
 	.uleb128 0x2e
 	.byte	0
 	.uleb128 0x3f
@@ -43244,13 +43349,13 @@ __func__.7630:
 	.byte	0
 	.section	.debug_loc,"",@progbits
 .Ldebug_loc0:
-.LLST468:
-	.8byte	.LVL2175
-	.8byte	.LVL2176-1
+.LLST470:
+	.8byte	.LVL2177
+	.8byte	.LVL2178-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2176-1
-	.8byte	.LFE347
+	.8byte	.LVL2178-1
+	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43258,13 +43363,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST469:
-	.8byte	.LVL2175
-	.8byte	.LVL2176-1
+.LLST471:
+	.8byte	.LVL2177
+	.8byte	.LVL2178-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2176-1
-	.8byte	.LFE347
+	.8byte	.LVL2178-1
+	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43272,13 +43377,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST470:
-	.8byte	.LVL2175
-	.8byte	.LVL2176-1
+.LLST472:
+	.8byte	.LVL2177
+	.8byte	.LVL2178-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2176-1
-	.8byte	.LFE347
+	.8byte	.LVL2178-1
+	.8byte	.LFE348
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43286,13 +43391,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST303:
-	.8byte	.LVL1240
-	.8byte	.LVL1241-1
+.LLST305:
+	.8byte	.LVL1242
+	.8byte	.LVL1243-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1241-1
-	.8byte	.LFE346
+	.8byte	.LVL1243-1
+	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43300,13 +43405,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST304:
-	.8byte	.LVL1240
-	.8byte	.LVL1241-1
+.LLST306:
+	.8byte	.LVL1242
+	.8byte	.LVL1243-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1241-1
-	.8byte	.LFE346
+	.8byte	.LVL1243-1
+	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43314,13 +43419,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST305:
-	.8byte	.LVL1240
-	.8byte	.LVL1241-1
+.LLST307:
+	.8byte	.LVL1242
+	.8byte	.LVL1243-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1241-1
-	.8byte	.LFE346
+	.8byte	.LVL1243-1
+	.8byte	.LFE347
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43328,13 +43433,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST196:
-	.8byte	.LVL737
-	.8byte	.LVL738-1
+.LLST198:
+	.8byte	.LVL739
+	.8byte	.LVL740-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL738-1
-	.8byte	.LFE345
+	.8byte	.LVL740-1
+	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43342,13 +43447,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST197:
-	.8byte	.LVL737
-	.8byte	.LVL738-1
+.LLST199:
+	.8byte	.LVL739
+	.8byte	.LVL740-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL738-1
-	.8byte	.LFE345
+	.8byte	.LVL740-1
+	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43356,13 +43461,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST198:
-	.8byte	.LVL737
-	.8byte	.LVL738-1
+.LLST200:
+	.8byte	.LVL739
+	.8byte	.LVL740-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL738-1
-	.8byte	.LFE345
+	.8byte	.LVL740-1
+	.8byte	.LFE346
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43370,90 +43475,90 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST299:
-	.8byte	.LVL1226
-	.8byte	.LVL1228-1
+.LLST301:
+	.8byte	.LVL1228
+	.8byte	.LVL1230-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1228-1
-	.8byte	.LVL1236
+	.8byte	.LVL1230-1
+	.8byte	.LVL1238
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1236
-	.8byte	.LVL1237
+	.8byte	.LVL1238
+	.8byte	.LVL1239
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1237
-	.8byte	.LFE344
+	.8byte	.LVL1239
+	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST300:
-	.8byte	.LVL1226
-	.8byte	.LVL1227
+.LLST302:
+	.8byte	.LVL1228
+	.8byte	.LVL1229
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1227
-	.8byte	.LVL1236
+	.8byte	.LVL1229
+	.8byte	.LVL1238
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1236
-	.8byte	.LVL1237
+	.8byte	.LVL1238
+	.8byte	.LVL1239
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1237
-	.8byte	.LFE344
+	.8byte	.LVL1239
+	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST301:
-	.8byte	.LVL1230
-	.8byte	.LVL1231
-	.2byte	0x1
-	.byte	0x50
+.LLST303:
 	.8byte	.LVL1232
 	.8byte	.LVL1233
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1234
+	.8byte	.LVL1235
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1233
-	.8byte	.LFE344
+	.8byte	.LVL1235
+	.8byte	.LFE345
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST302:
-	.8byte	.LVL1234
-	.8byte	.LVL1235
-	.2byte	0x1
-	.byte	0x51
+.LLST304:
+	.8byte	.LVL1236
 	.8byte	.LVL1237
-	.8byte	.LVL1238
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1238
 	.8byte	.LVL1239
+	.8byte	.LVL1240
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1240
+	.8byte	.LVL1241
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST175:
-	.8byte	.LVL662
-	.8byte	.LVL666
+.LLST177:
+	.8byte	.LVL664
+	.8byte	.LVL668
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL666
-	.8byte	.LFE342
+	.8byte	.LVL668
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43461,13 +43566,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST176:
-	.8byte	.LVL662
-	.8byte	.LVL663
+.LLST178:
+	.8byte	.LVL664
+	.8byte	.LVL665
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL663
-	.8byte	.LFE342
+	.8byte	.LVL665
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43475,13 +43580,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST177:
-	.8byte	.LVL662
+.LLST179:
 	.8byte	.LVL664
+	.8byte	.LVL666
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL664
-	.8byte	.LFE342
+	.8byte	.LVL666
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43489,19 +43594,15 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST178:
-	.8byte	.LVL665
-	.8byte	.LVL666
+.LLST180:
+	.8byte	.LVL667
+	.8byte	.LVL668
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST179:
-	.8byte	.LVL670
-	.8byte	.LVL671
-	.2byte	0x1
-	.byte	0x50
+.LLST181:
 	.8byte	.LVL672
 	.8byte	.LVL673
 	.2byte	0x1
@@ -43510,15 +43611,19 @@ __func__.7630:
 	.8byte	.LVL675
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL676
+	.8byte	.LVL677
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST180:
-	.8byte	.LVL662
-	.8byte	.LVL666
+.LLST182:
+	.8byte	.LVL664
+	.8byte	.LVL668
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL666
-	.8byte	.LFE342
+	.8byte	.LVL668
+	.8byte	.LFE343
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43526,57 +43631,57 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST181:
-	.8byte	.LVL665
+.LLST183:
 	.8byte	.LVL667
+	.8byte	.LVL669
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL668
-	.8byte	.LFE342
+	.8byte	.LVL670
+	.8byte	.LFE343
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST167:
-	.8byte	.LVL638
-	.8byte	.LVL643
+.LLST169:
+	.8byte	.LVL640
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL643
-	.8byte	.LVL644
+	.8byte	.LVL645
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL644
-	.8byte	.LVL647
+	.8byte	.LVL646
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LVL656
+	.8byte	.LVL649
+	.8byte	.LVL658
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL656
-	.8byte	.LVL661
+	.8byte	.LVL658
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL661
-	.8byte	.LFE341
+	.8byte	.LVL663
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST168:
-	.8byte	.LVL638
-	.8byte	.LVL639
+.LLST170:
+	.8byte	.LVL640
+	.8byte	.LVL641
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL639
-	.8byte	.LFE341
+	.8byte	.LVL641
+	.8byte	.LFE342
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43584,74 +43689,70 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST169:
-	.8byte	.LVL638
+.LLST171:
 	.8byte	.LVL640
+	.8byte	.LVL642
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL640
-	.8byte	.LVL645
+	.8byte	.LVL642
+	.8byte	.LVL647
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL645
 	.8byte	.LVL647
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LFE341
+	.8byte	.LVL649
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST170:
-	.8byte	.LVL638
-	.8byte	.LVL641
+.LLST172:
+	.8byte	.LVL640
+	.8byte	.LVL643
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL641
-	.8byte	.LVL644
+	.8byte	.LVL643
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL644
-	.8byte	.LVL647
+	.8byte	.LVL646
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LVL656
+	.8byte	.LVL649
+	.8byte	.LVL658
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL656
-	.8byte	.LVL661
+	.8byte	.LVL658
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL661
-	.8byte	.LFE341
+	.8byte	.LVL663
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST171:
-	.8byte	.LVL642
-	.8byte	.LVL643
+.LLST173:
+	.8byte	.LVL644
+	.8byte	.LVL645
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST172:
-	.8byte	.LVL650
-	.8byte	.LVL651
-	.2byte	0x1
-	.byte	0x50
+.LLST174:
 	.8byte	.LVL652
 	.8byte	.LVL653
 	.2byte	0x1
@@ -43660,59 +43761,63 @@ __func__.7630:
 	.8byte	.LVL655
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL656
+	.8byte	.LVL657
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST173:
-	.8byte	.LVL642
-	.8byte	.LVL646
+.LLST175:
+	.8byte	.LVL644
+	.8byte	.LVL648
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL647
-	.8byte	.LFE341
+	.8byte	.LVL649
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST174:
-	.8byte	.LVL642
-	.8byte	.LVL643
+.LLST176:
+	.8byte	.LVL644
+	.8byte	.LVL645
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL643
-	.8byte	.LVL644
+	.8byte	.LVL645
+	.8byte	.LVL646
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL644
-	.8byte	.LVL647
+	.8byte	.LVL646
+	.8byte	.LVL649
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL647
-	.8byte	.LVL656
+	.8byte	.LVL649
+	.8byte	.LVL658
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL656
-	.8byte	.LVL661
+	.8byte	.LVL658
+	.8byte	.LVL663
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL661
-	.8byte	.LFE341
+	.8byte	.LVL663
+	.8byte	.LFE342
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST152:
-	.8byte	.LVL595
-	.8byte	.LVL599
+.LLST154:
+	.8byte	.LVL597
+	.8byte	.LVL601
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL599
-	.8byte	.LFE340
+	.8byte	.LVL601
+	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43720,13 +43825,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST153:
-	.8byte	.LVL595
+.LLST155:
 	.8byte	.LVL597
+	.8byte	.LVL599
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL597
-	.8byte	.LFE340
+	.8byte	.LVL599
+	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43734,13 +43839,13 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST154:
-	.8byte	.LVL595
-	.8byte	.LVL596
+.LLST156:
+	.8byte	.LVL597
+	.8byte	.LVL598
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL596
-	.8byte	.LFE340
+	.8byte	.LVL598
+	.8byte	.LFE341
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -43748,246 +43853,260 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST155:
-	.8byte	.LVL598
-	.8byte	.LVL599
+.LLST157:
+	.8byte	.LVL600
+	.8byte	.LVL601
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST156:
-	.8byte	.LVL604
-	.8byte	.LVL605
+.LLST158:
+	.8byte	.LVL606
+	.8byte	.LVL607
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL605
-	.8byte	.LVL606-1
+	.8byte	.LVL607
+	.8byte	.LVL608-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 0
-	.8byte	.LVL606
-	.8byte	.LVL607
+	.8byte	.LVL608
+	.8byte	.LVL609
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST157:
-	.8byte	.LVL598
+.LLST159:
 	.8byte	.LVL600
+	.8byte	.LVL602
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL601
-	.8byte	.LFE340
+	.8byte	.LVL603
+	.8byte	.LFE341
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST143:
-	.8byte	.LVL580
+.LLST145:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL582
-	.8byte	.LVL586
+	.8byte	.LVL584
+	.8byte	.LVL588
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL586
-	.8byte	.LVL587
+	.8byte	.LVL588
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST144:
-	.8byte	.LVL580
+.LLST146:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST145:
-	.8byte	.LVL580
+.LLST147:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL582
-	.8byte	.LVL585
+	.8byte	.LVL584
+	.8byte	.LVL587
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL585
 	.8byte	.LVL587
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST146:
-	.8byte	.LVL580
+.LLST148:
 	.8byte	.LVL582
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL582
-	.8byte	.LVL586
+	.8byte	.LVL584
+	.8byte	.LVL588
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL586
-	.8byte	.LVL587
+	.8byte	.LVL588
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST147:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST149:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL582
-	.8byte	.LVL583
+	.8byte	.LVL584
+	.8byte	.LVL585
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL587
-	.8byte	.LVL592
+	.8byte	.LVL589
+	.8byte	.LVL594
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL592
-	.8byte	.LVL593
+	.8byte	.LVL594
+	.8byte	.LVL595
 	.2byte	0x3
 	.byte	0x83
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL594
-	.8byte	.LFE338
+	.8byte	.LVL596
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST148:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST150:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL582
-	.8byte	.LVL583
+	.8byte	.LVL584
+	.8byte	.LVL585
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL587
-	.8byte	.LVL591
+	.8byte	.LVL589
+	.8byte	.LVL593
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL591
-	.8byte	.LVL592
+	.8byte	.LVL593
+	.8byte	.LVL594
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL592
-	.8byte	.LFE338
+	.8byte	.LVL594
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST149:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST151:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST150:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST152:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST151:
-	.8byte	.LVL581
-	.8byte	.LVL582
+.LLST153:
+	.8byte	.LVL583
+	.8byte	.LVL584
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL582
 	.8byte	.LVL584
+	.8byte	.LVL586
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL584
-	.8byte	.LVL587
+	.8byte	.LVL586
+	.8byte	.LVL589
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL587
-	.8byte	.LFE338
+	.8byte	.LVL589
+	.8byte	.LFE339
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
+.LLST144:
+	.8byte	.LVL580
+	.8byte	.LVL581-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL581-1
+	.8byte	.LFE338
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
 .LLST142:
 	.8byte	.LVL578
 	.8byte	.LVL579-1
@@ -44002,6 +44121,20 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
+.LLST143:
+	.8byte	.LVL578
+	.8byte	.LVL579-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL579-1
+	.8byte	.LFE337
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
 .LLST139:
 	.8byte	.LVL563
 	.8byte	.LVL564
@@ -44069,37 +44202,37 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST409:
-	.8byte	.LVL1808
-	.8byte	.LVL1809
+.LLST411:
+	.8byte	.LVL1810
+	.8byte	.LVL1811
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1809
-	.8byte	.LVL1810-1
+	.8byte	.LVL1811
+	.8byte	.LVL1812-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1812
-	.8byte	.LVL1813-1
+	.8byte	.LVL1814
+	.8byte	.LVL1815-1
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1816
-	.8byte	.LVL1820
+	.8byte	.LVL1818
+	.8byte	.LVL1822
 	.2byte	0x1
 	.byte	0x5b
-	.8byte	.LVL1821
-	.8byte	.LVL1822
+	.8byte	.LVL1823
+	.8byte	.LVL1824
 	.2byte	0x1
 	.byte	0x5b
 	.8byte	0
 	.8byte	0
-.LLST410:
-	.8byte	.LVL1817
-	.8byte	.LVL1818
+.LLST412:
+	.8byte	.LVL1819
+	.8byte	.LVL1820
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1818
-	.8byte	.LVL1819-1
+	.8byte	.LVL1820
+	.8byte	.LVL1821-1
 	.2byte	0x17
 	.byte	0x7b
 	.sleb128 0
@@ -44116,16 +44249,16 @@ __func__.7630:
 	.uleb128 0x10
 	.8byte	0
 	.8byte	0
-.LLST286:
-	.8byte	.LVL1171
-	.8byte	.LVL1172
+.LLST288:
+	.8byte	.LVL1173
+	.8byte	.LVL1174
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1172
-	.8byte	.LVL1212
+	.8byte	.LVL1174
+	.8byte	.LVL1214
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1212
+	.8byte	.LVL1214
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44134,24 +44267,24 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST287:
-	.8byte	.LVL1171
-	.8byte	.LVL1174-1
+.LLST289:
+	.8byte	.LVL1173
+	.8byte	.LVL1176-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1174-1
-	.8byte	.LVL1175
+	.8byte	.LVL1176-1
+	.8byte	.LVL1177
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1175
 	.8byte	.LVL1177
+	.8byte	.LVL1179
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1177
-	.8byte	.LVL1214
+	.8byte	.LVL1179
+	.8byte	.LVL1216
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1214
+	.8byte	.LVL1216
 	.8byte	.LFE310
 	.2byte	0x4
 	.byte	0xf3
@@ -44160,188 +44293,188 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST288:
-	.8byte	.LVL1188
-	.8byte	.LVL1189
+.LLST290:
+	.8byte	.LVL1190
+	.8byte	.LVL1191
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1189
-	.8byte	.LVL1192
+	.8byte	.LVL1191
+	.8byte	.LVL1194
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 0
-	.8byte	.LVL1192
-	.8byte	.LVL1193
+	.8byte	.LVL1194
+	.8byte	.LVL1195
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
-.LLST289:
-	.8byte	.LVL1180
-	.8byte	.LVL1181
+.LLST291:
+	.8byte	.LVL1182
+	.8byte	.LVL1183
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1181
-	.8byte	.LVL1182-1
+	.8byte	.LVL1183
+	.8byte	.LVL1184-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1187
-	.8byte	.LVL1190
+	.8byte	.LVL1189
+	.8byte	.LVL1192
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1191
 	.8byte	.LVL1193
+	.8byte	.LVL1195
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST290:
-	.8byte	.LVL1182
-	.8byte	.LVL1183
+.LLST292:
+	.8byte	.LVL1184
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST291:
-	.8byte	.LVL1180
-	.8byte	.LVL1181
+.LLST293:
+	.8byte	.LVL1182
+	.8byte	.LVL1183
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST292:
-	.8byte	.LVL1179
-	.8byte	.LVL1183
+.LLST294:
+	.8byte	.LVL1181
+	.8byte	.LVL1185
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1186
-	.8byte	.LVL1193
+	.8byte	.LVL1188
+	.8byte	.LVL1195
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1196
-	.8byte	.LVL1197
+	.8byte	.LVL1198
+	.8byte	.LVL1199
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1197
-	.8byte	.LVL1201-1
+	.8byte	.LVL1199
+	.8byte	.LVL1203-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1202
-	.8byte	.LVL1203
+	.8byte	.LVL1204
+	.8byte	.LVL1205
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1205
-	.8byte	.LVL1207-1
+	.8byte	.LVL1207
+	.8byte	.LVL1209-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1210
-	.8byte	.LVL1211
+	.8byte	.LVL1212
+	.8byte	.LVL1213
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST293:
-	.8byte	.LVL1173
-	.8byte	.LVL1184
-	.2byte	0x1
-	.byte	0x63
+.LLST295:
+	.8byte	.LVL1175
 	.8byte	.LVL1186
-	.8byte	.LVL1206
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL1188
 	.8byte	.LVL1208
+	.2byte	0x1
+	.byte	0x63
 	.8byte	.LVL1210
+	.8byte	.LVL1212
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1210
 	.8byte	.LVL1212
+	.8byte	.LVL1214
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST294:
-	.8byte	.LVL1194
-	.8byte	.LVL1200
+.LLST296:
+	.8byte	.LVL1196
+	.8byte	.LVL1202
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1202
-	.8byte	.LVL1204-1
+	.8byte	.LVL1204
+	.8byte	.LVL1206-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1205
-	.8byte	.LVL1207-1
+	.8byte	.LVL1207
+	.8byte	.LVL1209-1
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST295:
-	.8byte	.LVL1171
-	.8byte	.LVL1178
+.LLST297:
+	.8byte	.LVL1173
+	.8byte	.LVL1180
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1178
-	.8byte	.LVL1185
+	.8byte	.LVL1180
+	.8byte	.LVL1187
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1185
-	.8byte	.LVL1186
+	.8byte	.LVL1187
+	.8byte	.LVL1188
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1186
-	.8byte	.LVL1213
+	.8byte	.LVL1188
+	.8byte	.LVL1215
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST296:
-	.8byte	.LVL1198
-	.8byte	.LVL1199
+.LLST298:
+	.8byte	.LVL1200
+	.8byte	.LVL1201
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1199
-	.8byte	.LVL1200
+	.8byte	.LVL1201
+	.8byte	.LVL1202
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
-	.8byte	.LVL1202
-	.8byte	.LVL1203
+	.8byte	.LVL1204
+	.8byte	.LVL1205
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1203
-	.8byte	.LVL1204-1
+	.8byte	.LVL1205
+	.8byte	.LVL1206-1
 	.2byte	0x2
 	.byte	0x75
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST404:
-	.8byte	.LVL1762
+.LLST406:
 	.8byte	.LVL1764
+	.8byte	.LVL1766
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1764
-	.8byte	.LVL1765
+	.8byte	.LVL1766
+	.8byte	.LVL1767
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1765
 	.8byte	.LVL1767
+	.8byte	.LVL1769
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1767
+	.8byte	.LVL1769
 	.8byte	.LFE308
 	.2byte	0x4
 	.byte	0xf3
@@ -44350,73 +44483,73 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST405:
-	.8byte	.LVL1776
-	.8byte	.LVL1779
+.LLST407:
+	.8byte	.LVL1778
+	.8byte	.LVL1781
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1779
-	.8byte	.LVL1782
+	.8byte	.LVL1781
+	.8byte	.LVL1784
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1785
-	.8byte	.LVL1795
+	.8byte	.LVL1787
+	.8byte	.LVL1797
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1796
+	.8byte	.LVL1798
 	.8byte	.LFE308
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST406:
-	.8byte	.LVL1768
+.LLST408:
 	.8byte	.LVL1770
+	.8byte	.LVL1772
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1775
-	.8byte	.LVL1776
+	.8byte	.LVL1777
+	.8byte	.LVL1778
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1790
-	.8byte	.LVL1791
+	.8byte	.LVL1792
+	.8byte	.LVL1793
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1791
 	.8byte	.LVL1793
+	.8byte	.LVL1795
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST407:
-	.8byte	.LVL1763
-	.8byte	.LVL1764
-	.2byte	0x1
-	.byte	0x51
+.LLST409:
 	.8byte	.LVL1765
 	.8byte	.LVL1766
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1766
+	.8byte	.LVL1767
+	.8byte	.LVL1768
+	.2byte	0x1
+	.byte	0x51
 	.8byte	.LVL1768
+	.8byte	.LVL1770
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
-	.8byte	.LVL1768
-	.8byte	.LVL1769-1
+	.8byte	.LVL1770
+	.8byte	.LVL1771-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1774
-	.8byte	.LVL1775
+	.8byte	.LVL1776
+	.8byte	.LVL1777
 	.2byte	0x2
 	.byte	0x32
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST408:
-	.8byte	.LVL1786
-	.8byte	.LVL1797
+.LLST410:
+	.8byte	.LVL1788
+	.8byte	.LVL1799
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
@@ -44595,16 +44728,16 @@ __func__.7630:
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST323:
-	.8byte	.LVL1337
-	.8byte	.LVL1338
+.LLST325:
+	.8byte	.LVL1339
+	.8byte	.LVL1340
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1338
-	.8byte	.LVL1342
+	.8byte	.LVL1340
+	.8byte	.LVL1344
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1342
+	.8byte	.LVL1344
 	.8byte	.LFE302
 	.2byte	0x4
 	.byte	0xf3
@@ -44613,18 +44746,18 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST324:
-	.8byte	.LVL1337
-	.8byte	.LVL1341
+.LLST326:
+	.8byte	.LVL1339
+	.8byte	.LVL1343
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1343
-	.8byte	.LVL1346
+	.8byte	.LVL1345
+	.8byte	.LVL1348
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1346
+	.8byte	.LVL1348
 	.8byte	.LFE302
 	.2byte	0x1
 	.byte	0x64
@@ -44690,49 +44823,49 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST389:
-	.8byte	.LVL1698
+.LLST391:
 	.8byte	.LVL1700
+	.8byte	.LVL1702
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1700
-	.8byte	.LVL1708
+	.8byte	.LVL1702
+	.8byte	.LVL1710
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1708
 	.8byte	.LVL1710
+	.8byte	.LVL1712
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1710
+	.8byte	.LVL1712
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST390:
-	.8byte	.LVL1699
-	.8byte	.LVL1709
+.LLST392:
+	.8byte	.LVL1701
+	.8byte	.LVL1711
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1710
+	.8byte	.LVL1712
 	.8byte	.LFE299
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST310:
-	.8byte	.LVL1264
-	.8byte	.LVL1265
+.LLST312:
+	.8byte	.LVL1266
+	.8byte	.LVL1267
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1265
-	.8byte	.LVL1305
+	.8byte	.LVL1267
+	.8byte	.LVL1307
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1305
+	.8byte	.LVL1307
 	.8byte	.LFE298
 	.2byte	0x4
 	.byte	0xf3
@@ -44741,127 +44874,127 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST311:
-	.8byte	.LVL1272
-	.8byte	.LVL1277
+.LLST313:
+	.8byte	.LVL1274
+	.8byte	.LVL1279
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1278
-	.8byte	.LVL1305
+	.8byte	.LVL1280
+	.8byte	.LVL1307
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST312:
-	.8byte	.LVL1280
-	.8byte	.LVL1292
+.LLST314:
+	.8byte	.LVL1282
+	.8byte	.LVL1294
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1293
-	.8byte	.LVL1306
+	.8byte	.LVL1295
+	.8byte	.LVL1308
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST313:
-	.8byte	.LVL1284
-	.8byte	.LVL1285
+.LLST315:
+	.8byte	.LVL1286
+	.8byte	.LVL1287
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1286
-	.8byte	.LVL1287
+	.8byte	.LVL1288
+	.8byte	.LVL1289
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1287
-	.8byte	.LVL1291
+	.8byte	.LVL1289
+	.8byte	.LVL1293
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1297
-	.8byte	.LVL1301
+	.8byte	.LVL1299
+	.8byte	.LVL1303
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1301
-	.8byte	.LVL1302
+	.8byte	.LVL1303
+	.8byte	.LVL1304
 	.2byte	0x3
 	.byte	0x88
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1303
-	.8byte	.LVL1307
+	.8byte	.LVL1305
+	.8byte	.LVL1309
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST314:
-	.8byte	.LVL1286
-	.8byte	.LVL1287
+.LLST316:
+	.8byte	.LVL1288
+	.8byte	.LVL1289
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1287
-	.8byte	.LVL1288-1
+	.8byte	.LVL1289
+	.8byte	.LVL1290-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1297
-	.8byte	.LVL1298
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+	.8byte	.LVL1300
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1298
-	.8byte	.LVL1299
+	.8byte	.LVL1300
+	.8byte	.LVL1301
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1299
-	.8byte	.LVL1300-1
+	.8byte	.LVL1301
+	.8byte	.LVL1302-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1300-1
-	.8byte	.LVL1301
+	.8byte	.LVL1302-1
+	.8byte	.LVL1303
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 196
-	.8byte	.LVL1301
 	.8byte	.LVL1303
+	.8byte	.LVL1305
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST315:
-	.8byte	.LVL1264
+.LLST317:
 	.8byte	.LVL1266
+	.8byte	.LVL1268
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1268
-	.8byte	.LVL1269
+	.8byte	.LVL1270
+	.8byte	.LVL1271
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1269
-	.8byte	.LVL1270
+	.8byte	.LVL1271
+	.8byte	.LVL1272
 	.2byte	0x3
 	.byte	0x71
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1270
-	.8byte	.LVL1271-1
+	.8byte	.LVL1272
+	.8byte	.LVL1273-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST316:
-	.8byte	.LVL1294
+.LLST318:
 	.8byte	.LVL1296
+	.8byte	.LVL1298
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST317:
-	.8byte	.LVL1294
+.LLST319:
 	.8byte	.LVL1296
+	.8byte	.LVL1298
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
@@ -45203,214 +45336,214 @@ __func__.7630:
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST249:
-	.8byte	.LVL954
-	.8byte	.LVL955
+.LLST251:
+	.8byte	.LVL956
+	.8byte	.LVL957
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL956
+	.8byte	.LVL958
 	.8byte	.LFE291
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST250:
-	.8byte	.LVL959
+.LLST252:
 	.8byte	.LVL961
+	.8byte	.LVL963
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST281:
-	.8byte	.LVL1144
-	.8byte	.LVL1145
+.LLST283:
+	.8byte	.LVL1146
+	.8byte	.LVL1147
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1147
-	.8byte	.LVL1148
+	.8byte	.LVL1149
+	.8byte	.LVL1150
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1156
-	.8byte	.LVL1159
+	.8byte	.LVL1158
+	.8byte	.LVL1161
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1160
-	.8byte	.LVL1161
+	.8byte	.LVL1162
+	.8byte	.LVL1163
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1161
-	.8byte	.LVL1166
+	.8byte	.LVL1163
+	.8byte	.LVL1168
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1167
+	.8byte	.LVL1169
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1142
-	.8byte	.LVL1143
+.LLST284:
+	.8byte	.LVL1144
+	.8byte	.LVL1145
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1151
-	.8byte	.LVL1156
+	.8byte	.LVL1153
+	.8byte	.LVL1158
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST283:
-	.8byte	.LVL1147
-	.8byte	.LVL1148
+.LLST285:
+	.8byte	.LVL1149
+	.8byte	.LVL1150
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1153
-	.8byte	.LVL1154
+	.8byte	.LVL1155
+	.8byte	.LVL1156
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1161
-	.8byte	.LVL1164
+	.8byte	.LVL1163
+	.8byte	.LVL1166
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1165
+	.8byte	.LVL1167
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST284:
-	.8byte	.LVL1140
-	.8byte	.LVL1144
+.LLST286:
+	.8byte	.LVL1142
+	.8byte	.LVL1146
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1144
-	.8byte	.LVL1149
+	.8byte	.LVL1146
+	.8byte	.LVL1151
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1149
-	.8byte	.LVL1150
+	.8byte	.LVL1151
+	.8byte	.LVL1152
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1151
-	.8byte	.LVL1156
+	.8byte	.LVL1153
+	.8byte	.LVL1158
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1156
-	.8byte	.LVL1162
+	.8byte	.LVL1158
+	.8byte	.LVL1164
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1163
+	.8byte	.LVL1165
 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST285:
-	.8byte	.LVL1146
+.LLST287:
 	.8byte	.LVL1148
+	.8byte	.LVL1150
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1161
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 	.8byte	.LFE290
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST386:
-	.8byte	.LVL1684
-	.8byte	.LVL1685
+.LLST388:
+	.8byte	.LVL1686
+	.8byte	.LVL1687
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1691
-	.8byte	.LVL1696
+	.8byte	.LVL1693
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 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1697
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 	.8byte	.LFE289
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST387:
-	.8byte	.LVL1682
-	.8byte	.LVL1683
+.LLST389:
+	.8byte	.LVL1684
+	.8byte	.LVL1685
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1686
-	.8byte	.LVL1691
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+	.8byte	.LVL1693
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL1688
-	.8byte	.LVL1689
+.LLST390:
+	.8byte	.LVL1690
+	.8byte	.LVL1691
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST354:
-	.8byte	.LVL1508
-	.8byte	.LVL1509
+.LLST356:
+	.8byte	.LVL1510
+	.8byte	.LVL1511
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1509
-	.8byte	.LVL1513
+	.8byte	.LVL1511
+	.8byte	.LVL1515
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1513
-	.8byte	.LVL1514
+	.8byte	.LVL1515
+	.8byte	.LVL1516
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1514
+	.8byte	.LVL1516
 	.8byte	.LFE288
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST355:
-	.8byte	.LVL1516
-	.8byte	.LVL1517
+.LLST357:
+	.8byte	.LVL1518
+	.8byte	.LVL1519
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1517
-	.8byte	.LVL1518-1
+	.8byte	.LVL1519
+	.8byte	.LVL1520-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.8byte	0
 	.8byte	0
-.LLST356:
-	.8byte	.LVL1508
-	.8byte	.LVL1509
+.LLST358:
+	.8byte	.LVL1510
+	.8byte	.LVL1511
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL1509
-	.8byte	.LVL1510
+	.8byte	.LVL1511
+	.8byte	.LVL1512
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1510
-	.8byte	.LVL1511
+	.8byte	.LVL1512
+	.8byte	.LVL1513
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1511
-	.8byte	.LVL1512
+	.8byte	.LVL1513
+	.8byte	.LVL1514
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -2
 	.byte	0x9f
-	.8byte	.LVL1514
+	.8byte	.LVL1516
 	.8byte	.LFE288
 	.2byte	0x3
 	.byte	0x85
@@ -45418,102 +45551,102 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST275:
-	.8byte	.LVL1116
-	.8byte	.LVL1117
+.LLST277:
+	.8byte	.LVL1118
+	.8byte	.LVL1119
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1117
-	.8byte	.LVL1128
+	.8byte	.LVL1119
+	.8byte	.LVL1130
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1129
-	.8byte	.LVL1138
+	.8byte	.LVL1131
+	.8byte	.LVL1140
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST276:
-	.8byte	.LVL1118
-	.8byte	.LVL1122
+.LLST278:
+	.8byte	.LVL1120
+	.8byte	.LVL1124
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1122
-	.8byte	.LVL1123
+	.8byte	.LVL1124
+	.8byte	.LVL1125
 	.2byte	0x3
 	.byte	0x76
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1123
-	.8byte	.LVL1127-1
+	.8byte	.LVL1125
+	.8byte	.LVL1129-1
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1130
-	.8byte	.LVL1135-1
+	.8byte	.LVL1132
+	.8byte	.LVL1137-1
 	.2byte	0x1
 	.byte	0x56
 	.8byte	0
 	.8byte	0
-.LLST277:
-	.8byte	.LVL1119
-	.8byte	.LVL1120-1
+.LLST279:
+	.8byte	.LVL1121
+	.8byte	.LVL1122-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST278:
-	.8byte	.LVL1118
-	.8byte	.LVL1121
+.LLST280:
+	.8byte	.LVL1120
+	.8byte	.LVL1123
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1122
-	.8byte	.LVL1127-1
+	.8byte	.LVL1124
+	.8byte	.LVL1129-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1130
-	.8byte	.LVL1131
+	.8byte	.LVL1132
+	.8byte	.LVL1133
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1132
-	.8byte	.LVL1135-1
+	.8byte	.LVL1134
+	.8byte	.LVL1137-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST279:
-	.8byte	.LVL1116
-	.8byte	.LVL1117
+.LLST281:
+	.8byte	.LVL1118
+	.8byte	.LVL1119
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1117
-	.8byte	.LVL1133
+	.8byte	.LVL1119
+	.8byte	.LVL1135
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1134
 	.8byte	.LVL1136
+	.8byte	.LVL1138
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1136
-	.8byte	.LVL1137-1
+	.8byte	.LVL1138
+	.8byte	.LVL1139-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	g_num_data_superblocks
 	.8byte	0
 	.8byte	0
-.LLST280:
-	.8byte	.LVL1116
-	.8byte	.LVL1117
+.LLST282:
+	.8byte	.LVL1118
+	.8byte	.LVL1119
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1117
-	.8byte	.LVL1125
+	.8byte	.LVL1119
+	.8byte	.LVL1127
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1126
-	.8byte	.LVL1139
+	.8byte	.LVL1128
+	.8byte	.LVL1141
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
@@ -45564,42 +45697,42 @@ __func__.7630:
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST329:
-	.8byte	.LVL1367
-	.8byte	.LVL1368
+.LLST331:
+	.8byte	.LVL1369
+	.8byte	.LVL1370
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1368
-	.8byte	.LVL1372
+	.8byte	.LVL1370
+	.8byte	.LVL1374
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1372
-	.8byte	.LVL1373
+	.8byte	.LVL1374
+	.8byte	.LVL1375
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1373
+	.8byte	.LVL1375
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST330:
-	.8byte	.LVL1369
+.LLST332:
 	.8byte	.LVL1371
+	.8byte	.LVL1373
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1373
+	.8byte	.LVL1375
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST331:
-	.8byte	.LVL1369
-	.8byte	.LVL1370
+.LLST333:
+	.8byte	.LVL1371
+	.8byte	.LVL1372
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45609,8 +45742,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1370
-	.8byte	.LVL1371
+	.8byte	.LVL1372
+	.8byte	.LVL1373
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45620,8 +45753,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1373
-	.8byte	.LVL1376-1
+	.8byte	.LVL1375
+	.8byte	.LVL1378-1
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45631,8 +45764,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1376-1
-	.8byte	.LVL1390
+	.8byte	.LVL1378-1
+	.8byte	.LVL1392
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45642,8 +45775,8 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1390
-	.8byte	.LVL1395
+	.8byte	.LVL1392
+	.8byte	.LVL1397
 	.2byte	0x8
 	.byte	0x83
 	.sleb128 6
@@ -45653,7 +45786,7 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1395
+	.8byte	.LVL1397
 	.8byte	.LFE281
 	.2byte	0x9
 	.byte	0x8f
@@ -45666,51 +45799,51 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST332:
-	.8byte	.LVL1373
+.LLST334:
 	.8byte	.LVL1375
+	.8byte	.LVL1377
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1375
-	.8byte	.LVL1378
+	.8byte	.LVL1377
+	.8byte	.LVL1380
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1390
-	.8byte	.LVL1391
+	.8byte	.LVL1392
+	.8byte	.LVL1393
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1392
-	.8byte	.LVL1399
+	.8byte	.LVL1394
+	.8byte	.LVL1401
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1434
-	.8byte	.LVL1435
+	.8byte	.LVL1436
+	.8byte	.LVL1437
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1440
-	.8byte	.LVL1441
+	.8byte	.LVL1442
+	.8byte	.LVL1443
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1441
-	.8byte	.LVL1445
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1504
-	.8byte	.LVL1505
+	.8byte	.LVL1443
+	.8byte	.LVL1447
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1506
 	.8byte	.LVL1507
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1508
+	.8byte	.LVL1509
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST333:
-	.8byte	.LVL1433
-	.8byte	.LVL1434
+.LLST335:
+	.8byte	.LVL1435
+	.8byte	.LVL1436
 	.2byte	0x9
 	.byte	0x8f
 	.sleb128 324
@@ -45720,476 +45853,476 @@ __func__.7630:
 	.byte	0xff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL1458
 	.8byte	.LVL1460
+	.8byte	.LVL1462
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1507
+	.8byte	.LVL1509
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST334:
-	.8byte	.LVL1417
-	.8byte	.LVL1418
-	.2byte	0x1
-	.byte	0x6a
+.LLST336:
 	.8byte	.LVL1419
 	.8byte	.LVL1420
 	.2byte	0x1
-	.byte	0x68
-	.8byte	.LVL1420
-	.8byte	.LVL1421
-	.2byte	0x1
 	.byte	0x6a
 	.8byte	.LVL1421
-	.8byte	.LVL1430
+	.8byte	.LVL1422
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1431
+	.8byte	.LVL1422
+	.8byte	.LVL1423
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1423
 	.8byte	.LVL1432
 	.2byte	0x1
 	.byte	0x68
 	.8byte	.LVL1433
 	.8byte	.LVL1434
 	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1435
+	.8byte	.LVL1436
+	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1434
-	.8byte	.LVL1438
+	.8byte	.LVL1436
+	.8byte	.LVL1440
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1439
-	.8byte	.LVL1445
+	.8byte	.LVL1441
+	.8byte	.LVL1447
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1445
-	.8byte	.LVL1450
+	.8byte	.LVL1447
+	.8byte	.LVL1452
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1450
+	.8byte	.LVL1452
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST335:
-	.8byte	.LVL1387
-	.8byte	.LVL1390
+.LLST337:
+	.8byte	.LVL1389
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1414
+	.8byte	.LVL1416
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST336:
-	.8byte	.LVL1385
-	.8byte	.LVL1390
+.LLST338:
+	.8byte	.LVL1387
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1409
-	.8byte	.LVL1410
+	.8byte	.LVL1411
+	.8byte	.LVL1412
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1414
+	.8byte	.LVL1416
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST337:
-	.8byte	.LVL1374
-	.8byte	.LVL1376-1
+.LLST339:
+	.8byte	.LVL1376
+	.8byte	.LVL1378-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1390
-	.8byte	.LVL1393
+	.8byte	.LVL1392
+	.8byte	.LVL1395
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1394
-	.8byte	.LVL1395
+	.8byte	.LVL1396
+	.8byte	.LVL1397
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1400
-	.8byte	.LVL1401
+	.8byte	.LVL1402
+	.8byte	.LVL1403
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1401
-	.8byte	.LVL1404
+	.8byte	.LVL1403
+	.8byte	.LVL1406
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 0
-	.8byte	.LVL1404
-	.8byte	.LVL1405
+	.8byte	.LVL1406
+	.8byte	.LVL1407
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -2
-	.8byte	.LVL1422
-	.8byte	.LVL1425
+	.8byte	.LVL1424
+	.8byte	.LVL1427
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1425
-	.8byte	.LVL1426
+	.8byte	.LVL1427
+	.8byte	.LVL1428
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1442
-	.8byte	.LVL1443
+	.8byte	.LVL1444
+	.8byte	.LVL1445
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 328
 	.byte	0x6
 	.byte	0x32
 	.byte	0x1c
-	.8byte	.LVL1443
-	.8byte	.LVL1444
+	.8byte	.LVL1445
+	.8byte	.LVL1446
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
-	.8byte	.LVL1451
-	.8byte	.LVL1454
+	.8byte	.LVL1453
+	.8byte	.LVL1456
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1454
-	.8byte	.LVL1455
+	.8byte	.LVL1456
+	.8byte	.LVL1457
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 0
-	.8byte	.LVL1455
-	.8byte	.LVL1456
+	.8byte	.LVL1457
+	.8byte	.LVL1458
 	.2byte	0x2
 	.byte	0x72
 	.sleb128 -2
-	.8byte	.LVL1504
-	.8byte	.LVL1507
+	.8byte	.LVL1506
+	.8byte	.LVL1509
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 -4
 	.8byte	0
 	.8byte	0
-.LLST338:
-	.8byte	.LVL1377
+.LLST340:
 	.8byte	.LVL1379
+	.8byte	.LVL1381
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1379
-	.8byte	.LVL1388
+	.8byte	.LVL1381
+	.8byte	.LVL1390
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1395
-	.8byte	.LVL1396
+	.8byte	.LVL1397
+	.8byte	.LVL1398
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1396
-	.8byte	.LVL1419
+	.8byte	.LVL1398
+	.8byte	.LVL1421
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1420
-	.8byte	.LVL1421
+	.8byte	.LVL1422
+	.8byte	.LVL1423
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST340:
-	.8byte	.LVL1380
-	.8byte	.LVL1384
+.LLST342:
+	.8byte	.LVL1382
+	.8byte	.LVL1386
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1399
-	.8byte	.LVL1402
+	.8byte	.LVL1401
+	.8byte	.LVL1404
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1403
-	.8byte	.LVL1409
+	.8byte	.LVL1405
+	.8byte	.LVL1411
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1410
-	.8byte	.LVL1414
+	.8byte	.LVL1412
+	.8byte	.LVL1416
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1421
 	.8byte	.LVL1423
+	.8byte	.LVL1425
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1424
-	.8byte	.LVL1427
+	.8byte	.LVL1426
+	.8byte	.LVL1429
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1434
-	.8byte	.LVL1435
+	.8byte	.LVL1436
+	.8byte	.LVL1437
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1435
 	.8byte	.LVL1437
+	.8byte	.LVL1439
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1450
 	.8byte	.LVL1452
+	.8byte	.LVL1454
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1453
-	.8byte	.LVL1456
+	.8byte	.LVL1455
+	.8byte	.LVL1458
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST341:
-	.8byte	.LVL1382
-	.8byte	.LVL1383
+.LLST343:
+	.8byte	.LVL1384
+	.8byte	.LVL1385
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1383
 	.8byte	.LVL1385
+	.8byte	.LVL1387
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1405
-	.8byte	.LVL1408
+	.8byte	.LVL1407
+	.8byte	.LVL1410
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1410
 	.8byte	.LVL1412
+	.8byte	.LVL1414
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1413
-	.8byte	.LVL1414
+	.8byte	.LVL1415
+	.8byte	.LVL1416
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST342:
-	.8byte	.LVL1428
-	.8byte	.LVL1429
+.LLST344:
+	.8byte	.LVL1430
+	.8byte	.LVL1431
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1436
-	.8byte	.LVL1437
+	.8byte	.LVL1438
+	.8byte	.LVL1439
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST343:
-	.8byte	.LVL1459
-	.8byte	.LVL1463
+.LLST345:
+	.8byte	.LVL1461
+	.8byte	.LVL1465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1465
-	.8byte	.LVL1475
+	.8byte	.LVL1467
+	.8byte	.LVL1477
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1475
-	.8byte	.LVL1478
+	.8byte	.LVL1477
+	.8byte	.LVL1480
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1478
-	.8byte	.LVL1500
+	.8byte	.LVL1480
+	.8byte	.LVL1502
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1500
 	.8byte	.LVL1502
+	.8byte	.LVL1504
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1502
 	.8byte	.LVL1504
+	.8byte	.LVL1506
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST344:
-	.8byte	.LVL1459
-	.8byte	.LVL1463
+.LLST346:
+	.8byte	.LVL1461
+	.8byte	.LVL1465
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1465
-	.8byte	.LVL1473
+	.8byte	.LVL1467
+	.8byte	.LVL1475
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1478
-	.8byte	.LVL1493
+	.8byte	.LVL1480
+	.8byte	.LVL1495
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1493
 	.8byte	.LVL1495
+	.8byte	.LVL1497
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1502
 	.8byte	.LVL1504
+	.8byte	.LVL1506
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST345:
-	.8byte	.LVL1382
-	.8byte	.LVL1390
+.LLST347:
+	.8byte	.LVL1384
+	.8byte	.LVL1392
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1405
+	.8byte	.LVL1407
 	.8byte	.LFE281
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST346:
-	.8byte	.LVL1367
-	.8byte	.LVL1371
+.LLST348:
+	.8byte	.LVL1369
+	.8byte	.LVL1373
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1373
-	.8byte	.LVL1383
+	.8byte	.LVL1375
+	.8byte	.LVL1385
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1383
-	.8byte	.LVL1388
+	.8byte	.LVL1385
+	.8byte	.LVL1390
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1390
-	.8byte	.LVL1405
+	.8byte	.LVL1392
+	.8byte	.LVL1407
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1405
-	.8byte	.LVL1416
+	.8byte	.LVL1407
+	.8byte	.LVL1418
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1416
-	.8byte	.LVL1432
+	.8byte	.LVL1418
+	.8byte	.LVL1434
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1445
-	.8byte	.LVL1450
+	.8byte	.LVL1447
+	.8byte	.LVL1452
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST347:
-	.8byte	.LVL1406
-	.8byte	.LVL1410
+.LLST349:
+	.8byte	.LVL1408
+	.8byte	.LVL1412
 	.2byte	0x1
 	.byte	0x58
-	.8byte	.LVL1446
-	.8byte	.LVL1447
+	.8byte	.LVL1448
+	.8byte	.LVL1449
 	.2byte	0x1
 	.byte	0x56
-	.8byte	.LVL1447
-	.8byte	.LVL1448
+	.8byte	.LVL1449
+	.8byte	.LVL1450
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 0
-	.8byte	.LVL1448
-	.8byte	.LVL1449
+	.8byte	.LVL1450
+	.8byte	.LVL1451
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 -32
-	.8byte	.LVL1461
-	.8byte	.LVL1462
+	.8byte	.LVL1463
+	.8byte	.LVL1464
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1465
-	.8byte	.LVL1468-1
+	.8byte	.LVL1467
+	.8byte	.LVL1470-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1470
-	.8byte	.LVL1471-1
+	.8byte	.LVL1472
+	.8byte	.LVL1473-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1471-1
-	.8byte	.LVL1472
+	.8byte	.LVL1473-1
+	.8byte	.LVL1474
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1480
-	.8byte	.LVL1481
+	.8byte	.LVL1482
+	.8byte	.LVL1483
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1484
-	.8byte	.LVL1485-1
+	.8byte	.LVL1486
+	.8byte	.LVL1487-1
 	.2byte	0x2
 	.byte	0x74
 	.sleb128 16
-	.8byte	.LVL1485-1
-	.8byte	.LVL1486
+	.8byte	.LVL1487-1
+	.8byte	.LVL1488
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1496
-	.8byte	.LVL1497-1
+	.8byte	.LVL1498
+	.8byte	.LVL1499-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1497-1
-	.8byte	.LVL1500
+	.8byte	.LVL1499-1
+	.8byte	.LVL1502
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
 	.8byte	0
 	.8byte	0
-.LLST348:
-	.8byte	.LVL1415
-	.8byte	.LVL1432
+.LLST350:
+	.8byte	.LVL1417
+	.8byte	.LVL1434
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1445
-	.8byte	.LVL1450
+	.8byte	.LVL1447
+	.8byte	.LVL1452
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST349:
-	.8byte	.LVL1415
-	.8byte	.LVL1419
+.LLST351:
+	.8byte	.LVL1417
+	.8byte	.LVL1421
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1420
-	.8byte	.LVL1421
+	.8byte	.LVL1422
+	.8byte	.LVL1423
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST350:
-	.8byte	.LVL1471
-	.8byte	.LVL1472
+.LLST352:
+	.8byte	.LVL1473
+	.8byte	.LVL1474
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
 	.byte	0x6
 	.byte	0x23
 	.uleb128 0x4
-	.8byte	.LVL1480
-	.8byte	.LVL1481
+	.8byte	.LVL1482
+	.8byte	.LVL1483
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46198,23 +46331,23 @@ __func__.7630:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST351:
-	.8byte	.LVL1487
-	.8byte	.LVL1490
+.LLST353:
+	.8byte	.LVL1489
+	.8byte	.LVL1492
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST352:
-	.8byte	.LVL1494
-	.8byte	.LVL1500
+.LLST354:
+	.8byte	.LVL1496
+	.8byte	.LVL1502
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST353:
-	.8byte	.LVL1497
-	.8byte	.LVL1498-1
+.LLST355:
+	.8byte	.LVL1499
+	.8byte	.LVL1500-1
 	.2byte	0x6
 	.byte	0x8f
 	.sleb128 296
@@ -46223,91 +46356,91 @@ __func__.7630:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST243:
-	.8byte	.LVL934
-	.8byte	.LVL935
+.LLST245:
+	.8byte	.LVL936
+	.8byte	.LVL937
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL935
-	.8byte	.LVL947
+	.8byte	.LVL937
+	.8byte	.LVL949
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL947
-	.8byte	.LVL948
+	.8byte	.LVL949
+	.8byte	.LVL950
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL948
+	.8byte	.LVL950
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST244:
-	.8byte	.LVL934
-	.8byte	.LVL936-1
+.LLST246:
+	.8byte	.LVL936
+	.8byte	.LVL938-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST245:
-	.8byte	.LVL937
-	.8byte	.LVL938
+.LLST247:
+	.8byte	.LVL939
+	.8byte	.LVL940
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL938
-	.8byte	.LVL942-1
+	.8byte	.LVL940
+	.8byte	.LVL944-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL948
-	.8byte	.LVL953
+	.8byte	.LVL950
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL953
+	.8byte	.LVL955
 	.8byte	.LFE280
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST246:
-	.8byte	.LVL940
-	.8byte	.LVL941
+.LLST248:
+	.8byte	.LVL942
+	.8byte	.LVL943
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL948
-	.8byte	.LVL951
+	.8byte	.LVL950
+	.8byte	.LVL953
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL952
-	.8byte	.LVL953
+	.8byte	.LVL954
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST247:
-	.8byte	.LVL940
-	.8byte	.LVL945
+.LLST249:
+	.8byte	.LVL942
+	.8byte	.LVL947
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL948
-	.8byte	.LVL949
+	.8byte	.LVL950
+	.8byte	.LVL951
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL950
-	.8byte	.LVL953
+	.8byte	.LVL952
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST248:
-	.8byte	.LVL939
-	.8byte	.LVL942-1
+.LLST250:
+	.8byte	.LVL941
+	.8byte	.LVL944-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL948
-	.8byte	.LVL953
+	.8byte	.LVL950
+	.8byte	.LVL955
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
@@ -46352,110 +46485,110 @@ __func__.7630:
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST274:
-	.8byte	.LVL1104
-	.8byte	.LVL1105
+.LLST276:
+	.8byte	.LVL1106
+	.8byte	.LVL1107
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST263:
-	.8byte	.LVL1055
-	.8byte	.LVL1058
+.LLST265:
+	.8byte	.LVL1057
+	.8byte	.LVL1060
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1058
-	.8byte	.LVL1076
+	.8byte	.LVL1060
+	.8byte	.LVL1078
 	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1076
-	.8byte	.LVL1082
+	.byte	0x63
+	.8byte	.LVL1078
+	.8byte	.LVL1084
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST264:
-	.8byte	.LVL1064
-	.8byte	.LVL1065
+.LLST266:
+	.8byte	.LVL1066
+	.8byte	.LVL1067
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1065
-	.8byte	.LVL1080
+	.8byte	.LVL1067
+	.8byte	.LVL1082
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST265:
-	.8byte	.LVL1069
-	.8byte	.LVL1070
+.LLST267:
+	.8byte	.LVL1071
+	.8byte	.LVL1072
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1070
-	.8byte	.LVL1071
+	.8byte	.LVL1072
+	.8byte	.LVL1073
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1082
 	.8byte	.LVL1084
-	.2byte	0x1
-	.byte	0x66
-	.8byte	.LVL1085
 	.8byte	.LVL1086
 	.2byte	0x1
 	.byte	0x66
+	.8byte	.LVL1087
 	.8byte	.LVL1088
-	.8byte	.LVL1089-1
 	.2byte	0x1
-	.byte	0x55
+	.byte	0x66
 	.8byte	.LVL1090
-	.8byte	.LVL1091
+	.8byte	.LVL1091-1
 	.2byte	0x1
 	.byte	0x55
 	.8byte	.LVL1092
 	.8byte	.LVL1093
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x55
+	.8byte	.LVL1094
 	.8byte	.LVL1095
-	.8byte	.LVL1100
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1101
+	.8byte	.LVL1097
+	.8byte	.LVL1102
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1103
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST266:
-	.8byte	.LVL1068
-	.8byte	.LVL1071
+.LLST268:
+	.8byte	.LVL1070
+	.8byte	.LVL1073
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1082
-	.8byte	.LVL1086
+	.8byte	.LVL1084
+	.8byte	.LVL1088
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST267:
-	.8byte	.LVL1096
-	.8byte	.LVL1097
+.LLST269:
+	.8byte	.LVL1098
+	.8byte	.LVL1099
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1097
-	.8byte	.LVL1098
+	.8byte	.LVL1099
+	.8byte	.LVL1100
 	.2byte	0x7
 	.byte	0x72
 	.sleb128 -1
@@ -46464,8 +46597,8 @@ __func__.7630:
 	.byte	0x7a
 	.sleb128 0
 	.byte	0x22
-	.8byte	.LVL1098
-	.8byte	.LVL1099
+	.8byte	.LVL1100
+	.8byte	.LVL1101
 	.2byte	0xf
 	.byte	0x70
 	.sleb128 0
@@ -46484,105 +46617,105 @@ __func__.7630:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST268:
-	.8byte	.LVL1056
-	.8byte	.LVL1077
+.LLST270:
+	.8byte	.LVL1058
+	.8byte	.LVL1079
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST269:
-	.8byte	.LVL1057
-	.8byte	.LVL1066
+.LLST271:
+	.8byte	.LVL1059
+	.8byte	.LVL1068
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1086
+	.8byte	.LVL1088
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST270:
-	.8byte	.LVL1059
-	.8byte	.LVL1060
+.LLST272:
+	.8byte	.LVL1061
+	.8byte	.LVL1062
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1060
-	.8byte	.LVL1062-1
+	.8byte	.LVL1062
+	.8byte	.LVL1064-1
 	.2byte	0x2
 	.byte	0x83
 	.sleb128 24
-	.8byte	.LVL1062-1
-	.8byte	.LVL1081
+	.8byte	.LVL1064-1
+	.8byte	.LVL1083
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
-	.8byte	.LVL1081
-	.8byte	.LVL1082
+	.8byte	.LVL1083
+	.8byte	.LVL1084
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 112
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 256
 	.8byte	0
 	.8byte	0
-.LLST271:
-	.8byte	.LVL1059
-	.8byte	.LVL1078
+.LLST273:
+	.8byte	.LVL1061
+	.8byte	.LVL1080
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST272:
-	.8byte	.LVL1061
-	.8byte	.LVL1081
+.LLST274:
+	.8byte	.LVL1063
+	.8byte	.LVL1083
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
-	.8byte	.LVL1081
-	.8byte	.LVL1082
+	.8byte	.LVL1083
+	.8byte	.LVL1084
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 124
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 268
 	.8byte	0
 	.8byte	0
-.LLST273:
-	.8byte	.LVL1063
-	.8byte	.LVL1079
+.LLST275:
+	.8byte	.LVL1065
+	.8byte	.LVL1081
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1082
+	.8byte	.LVL1084
 	.8byte	.LFE275
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST461:
-	.8byte	.LVL2078
-	.8byte	.LVL2081
+.LLST463:
+	.8byte	.LVL2080
+	.8byte	.LVL2083
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2090
 	.8byte	.LVL2092
+	.8byte	.LVL2094
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2093
+	.8byte	.LVL2095
 	.8byte	.LFE274
 	.2byte	0x1
 	.byte	0x66
@@ -46599,85 +46732,81 @@ __func__.7630:
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST256:
-	.8byte	.LVL990
-	.8byte	.LVL997
+.LLST258:
+	.8byte	.LVL992
+	.8byte	.LVL999
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL997
-	.8byte	.LVL998
+	.8byte	.LVL999
+	.8byte	.LVL1000
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL998
-	.8byte	.LVL999
+	.8byte	.LVL1000
+	.8byte	.LVL1001
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1001
-	.8byte	.LVL1002-1
+	.8byte	.LVL1003
+	.8byte	.LVL1004-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL1002
 	.8byte	.LVL1004
+	.8byte	.LVL1006
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST257:
-	.8byte	.LVL989
-	.8byte	.LVL1038
+.LLST259:
+	.8byte	.LVL991
+	.8byte	.LVL1040
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
-	.8byte	.LVL1038
-	.8byte	.LVL1039
+	.8byte	.LVL1040
+	.8byte	.LVL1041
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 156
-	.8byte	.LVL1039
+	.8byte	.LVL1041
 	.8byte	.LFE270
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST258:
-	.8byte	.LVL992
-	.8byte	.LVL993-1
+.LLST260:
+	.8byte	.LVL994
+	.8byte	.LVL995-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL993-1
-	.8byte	.LVL996
+	.8byte	.LVL995-1
+	.8byte	.LVL998
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1005
-	.8byte	.LVL1036
+	.8byte	.LVL1007
+	.8byte	.LVL1038
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST259:
-	.8byte	.LVL990
-	.8byte	.LVL994
+.LLST261:
+	.8byte	.LVL992
+	.8byte	.LVL996
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL995
-	.8byte	.LVL999
+	.8byte	.LVL997
+	.8byte	.LVL1001
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1001
 	.8byte	.LVL1003
+	.8byte	.LVL1005
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST260:
-	.8byte	.LVL1015
-	.8byte	.LVL1016
-	.2byte	0x1
-	.byte	0x51
+.LLST262:
 	.8byte	.LVL1017
 	.8byte	.LVL1018
 	.2byte	0x1
@@ -46686,10 +46815,10 @@ __func__.7630:
 	.8byte	.LVL1020
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1026
-	.8byte	.LVL1027
+	.8byte	.LVL1021
+	.8byte	.LVL1022
 	.2byte	0x1
-	.byte	0x52
+	.byte	0x51
 	.8byte	.LVL1028
 	.8byte	.LVL1029
 	.2byte	0x1
@@ -46698,11 +46827,11 @@ __func__.7630:
 	.8byte	.LVL1031
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1040
-	.8byte	.LVL1045
+	.8byte	.LVL1032
+	.8byte	.LVL1033
 	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1046
+	.byte	0x52
+	.8byte	.LVL1042
 	.8byte	.LVL1047
 	.2byte	0x1
 	.byte	0x50
@@ -46710,19 +46839,23 @@ __func__.7630:
 	.8byte	.LVL1049
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1052
-	.8byte	.LVL1053
+	.8byte	.LVL1050
+	.8byte	.LVL1051
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL1054
+	.8byte	.LVL1055
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1056
 	.8byte	.LFE270
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST261:
-	.8byte	.LVL1006
+.LLST263:
 	.8byte	.LVL1008
+	.8byte	.LVL1010
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46731,8 +46864,8 @@ __func__.7630:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1009
-	.8byte	.LVL1010
+	.8byte	.LVL1011
+	.8byte	.LVL1012
 	.2byte	0x8
 	.byte	0x40
 	.byte	0x8f
@@ -46741,145 +46874,145 @@ __func__.7630:
 	.byte	0x2
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1010
-	.8byte	.LVL1011
+	.8byte	.LVL1012
+	.8byte	.LVL1013
 	.2byte	0x5
 	.byte	0x41
 	.byte	0x75
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1014
-	.8byte	.LVL1021
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL1022
+	.8byte	.LVL1016
 	.8byte	.LVL1023
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1024
 	.8byte	.LVL1025
-	.8byte	.LVL1032
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1033
+	.8byte	.LVL1027
 	.8byte	.LVL1034
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1041
-	.8byte	.LVL1042
+	.8byte	.LVL1035
+	.8byte	.LVL1036
 	.2byte	0x1
-	.byte	0x51
+	.byte	0x50
 	.8byte	.LVL1043
 	.8byte	.LVL1044
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1049
-	.8byte	.LVL1050
+	.8byte	.LVL1045
+	.8byte	.LVL1046
 	.2byte	0x1
-	.byte	0x50
+	.byte	0x51
 	.8byte	.LVL1051
 	.8byte	.LVL1052
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL1053
+	.8byte	.LVL1054
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST262:
-	.8byte	.LVL1005
-	.8byte	.LVL1036
+.LLST264:
+	.8byte	.LVL1007
+	.8byte	.LVL1038
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST383:
-	.8byte	.LVL1661
-	.8byte	.LVL1668
+.LLST385:
+	.8byte	.LVL1663
+	.8byte	.LVL1670
 	.2byte	0x3
 	.byte	0x9
 	.byte	0xff
 	.byte	0x9f
-	.8byte	.LVL1668
-	.8byte	.LVL1680
+	.8byte	.LVL1670
+	.8byte	.LVL1682
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST384:
-	.8byte	.LVL1662
-	.8byte	.LVL1679
+.LLST386:
+	.8byte	.LVL1664
+	.8byte	.LVL1681
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST385:
-	.8byte	.LVL1661
-	.8byte	.LVL1668
+.LLST387:
+	.8byte	.LVL1663
+	.8byte	.LVL1670
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1668
-	.8byte	.LVL1674
+	.8byte	.LVL1670
+	.8byte	.LVL1676
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1675
-	.8byte	.LVL1678
+	.8byte	.LVL1677
+	.8byte	.LVL1680
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST252:
-	.8byte	.LVL973
+.LLST254:
 	.8byte	.LVL975
+	.8byte	.LVL977
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL975
-	.8byte	.LVL979
+	.8byte	.LVL977
+	.8byte	.LVL981
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL979
-	.8byte	.LVL980-1
+	.8byte	.LVL981
+	.8byte	.LVL982-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL980-1
-	.8byte	.LVL980
+	.8byte	.LVL982-1
+	.8byte	.LVL982
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL980
-	.8byte	.LVL983
+	.8byte	.LVL982
+	.8byte	.LVL985
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL983
+	.8byte	.LVL985
 	.8byte	.LFE267
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST253:
-	.8byte	.LVL976
-	.8byte	.LVL977
+.LLST255:
+	.8byte	.LVL978
+	.8byte	.LVL979
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL977
-	.8byte	.LVL978-1
+	.8byte	.LVL979
+	.8byte	.LVL980-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
-	.8byte	.LVL980
-	.8byte	.LVL981
+	.8byte	.LVL982
+	.8byte	.LVL983
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL981
-	.8byte	.LVL982-1
+	.8byte	.LVL983
+	.8byte	.LVL984-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+4
 	.8byte	0
 	.8byte	0
-.LLST254:
-	.8byte	.LVL973
-	.8byte	.LVL974
+.LLST256:
+	.8byte	.LVL975
+	.8byte	.LVL976
 	.2byte	0x7
 	.byte	0x70
 	.sleb128 6
@@ -46888,7 +47021,7 @@ __func__.7630:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL983
+	.8byte	.LVL985
 	.8byte	.LFE267
 	.2byte	0x7
 	.byte	0x70
@@ -46900,36 +47033,36 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST255:
-	.8byte	.LVL973
-	.8byte	.LVL974
+.LLST257:
+	.8byte	.LVL975
+	.8byte	.LVL976
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
-	.8byte	.LVL983
+	.8byte	.LVL985
 	.8byte	.LFE267
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 40
 	.8byte	0
 	.8byte	0
-.LLST373:
-	.8byte	.LVL1620
-	.8byte	.LVL1623
+.LLST375:
+	.8byte	.LVL1622
+	.8byte	.LVL1625
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1623
-	.8byte	.LVL1627
+	.8byte	.LVL1625
+	.8byte	.LVL1629
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1627
-	.8byte	.LVL1628
+	.8byte	.LVL1629
+	.8byte	.LVL1630
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1628
+	.8byte	.LVL1630
 	.8byte	.LFE265
 	.2byte	0x4
 	.byte	0xf3
@@ -46938,93 +47071,93 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST374:
-	.8byte	.LVL1620
-	.8byte	.LVL1621
+.LLST376:
+	.8byte	.LVL1622
+	.8byte	.LVL1623
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
-	.8byte	.LVL1621
-	.8byte	.LVL1622
+	.8byte	.LVL1623
+	.8byte	.LVL1624
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL1622
 	.8byte	.LVL1624
+	.8byte	.LVL1626
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1627
-	.8byte	.LVL1628
+	.8byte	.LVL1629
+	.8byte	.LVL1630
 	.2byte	0x3
 	.byte	0x8
 	.byte	0x20
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST375:
-	.8byte	.LVL1629
-	.8byte	.LVL1632
+.LLST377:
+	.8byte	.LVL1631
+	.8byte	.LVL1634
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1632
-	.8byte	.LVL1636
+	.8byte	.LVL1634
+	.8byte	.LVL1638
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1637
+	.8byte	.LVL1639
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST376:
-	.8byte	.LVL1629
-	.8byte	.LVL1630
+.LLST378:
+	.8byte	.LVL1631
+	.8byte	.LVL1632
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1630
-	.8byte	.LVL1635
+	.8byte	.LVL1632
+	.8byte	.LVL1637
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1637
+	.8byte	.LVL1639
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST377:
-	.8byte	.LVL1629
-	.8byte	.LVL1633
+.LLST379:
+	.8byte	.LVL1631
+	.8byte	.LVL1635
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1637
-	.8byte	.LVL1655
+	.8byte	.LVL1639
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1655
+	.8byte	.LVL1657
 	.8byte	.LFE264
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST378:
-	.8byte	.LVL1640
-	.8byte	.LVL1655
+.LLST380:
+	.8byte	.LVL1642
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST379:
-	.8byte	.LVL1639
-	.8byte	.LVL1642
+.LLST381:
+	.8byte	.LVL1641
+	.8byte	.LVL1644
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1642
-	.8byte	.LVL1645-1
+	.8byte	.LVL1644
+	.8byte	.LVL1647-1
 	.2byte	0x28
 	.byte	0x85
 	.sleb128 0
@@ -47051,33 +47184,33 @@ __func__.7630:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1652
-	.8byte	.LVL1655
+	.8byte	.LVL1654
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST380:
-	.8byte	.LVL1638
-	.8byte	.LVL1643
+.LLST382:
+	.8byte	.LVL1640
+	.8byte	.LVL1645
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1643
-	.8byte	.LVL1644
+	.8byte	.LVL1645
+	.8byte	.LVL1646
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1644
-	.8byte	.LVL1645-1
+	.8byte	.LVL1646
+	.8byte	.LVL1647-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1652
-	.8byte	.LVL1653
+	.8byte	.LVL1654
+	.8byte	.LVL1655
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1653
-	.8byte	.LVL1654-1
+	.8byte	.LVL1655
+	.8byte	.LVL1656-1
 	.2byte	0x16
 	.byte	0x8a
 	.sleb128 0
@@ -47092,30 +47225,30 @@ __func__.7630:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST381:
-	.8byte	.LVL1629
-	.8byte	.LVL1633
+.LLST383:
+	.8byte	.LVL1631
+	.8byte	.LVL1635
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1637
-	.8byte	.LVL1655
+	.8byte	.LVL1639
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1655
+	.8byte	.LVL1657
 	.8byte	.LFE264
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST382:
-	.8byte	.LVL1631
-	.8byte	.LVL1632
+.LLST384:
+	.8byte	.LVL1633
+	.8byte	.LVL1634
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47128,8 +47261,8 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1632
-	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.8byte	.LVL1635
 	.2byte	0x13
 	.byte	0x85
 	.sleb128 0
@@ -47142,15 +47275,15 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1633
-	.8byte	.LVL1634
+	.8byte	.LVL1635
+	.8byte	.LVL1636
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1637
-	.8byte	.LVL1655
+	.8byte	.LVL1639
+	.8byte	.LVL1657
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1655
+	.8byte	.LVL1657
 	.8byte	.LFE264
 	.2byte	0x13
 	.byte	0x85
@@ -47166,102 +47299,102 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST365:
-	.8byte	.LVL1591
-	.8byte	.LVL1594
+.LLST367:
+	.8byte	.LVL1593
+	.8byte	.LVL1596
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1594
-	.8byte	.LVL1598
+	.8byte	.LVL1596
+	.8byte	.LVL1600
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1599
-	.8byte	.LVL1610
+	.8byte	.LVL1601
+	.8byte	.LVL1612
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL1613
+	.8byte	.LVL1615
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST366:
-	.8byte	.LVL1591
-	.8byte	.LVL1592
+.LLST368:
+	.8byte	.LVL1593
+	.8byte	.LVL1594
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1592
-	.8byte	.LVL1597
+	.8byte	.LVL1594
+	.8byte	.LVL1599
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1599
-	.8byte	.LVL1609
+	.8byte	.LVL1601
+	.8byte	.LVL1611
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1613
+	.8byte	.LVL1615
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST367:
-	.8byte	.LVL1591
-	.8byte	.LVL1595
+.LLST369:
+	.8byte	.LVL1593
+	.8byte	.LVL1597
 	.2byte	0x1
-	.byte	0x52
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+	.byte	0x52
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1599
-	.8byte	.LVL1618
+	.8byte	.LVL1601
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1618
+	.8byte	.LVL1620
 	.8byte	.LFE263
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST368:
-	.8byte	.LVL1602
-	.8byte	.LVL1618
+.LLST370:
+	.8byte	.LVL1604
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST369:
-	.8byte	.LVL1601
-	.8byte	.LVL1607
+.LLST371:
+	.8byte	.LVL1603
+	.8byte	.LVL1609
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1615
-	.8byte	.LVL1618
+	.8byte	.LVL1617
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST370:
-	.8byte	.LVL1600
-	.8byte	.LVL1604
+.LLST372:
+	.8byte	.LVL1602
+	.8byte	.LVL1606
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1604
-	.8byte	.LVL1605
+	.8byte	.LVL1606
+	.8byte	.LVL1607
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 212
-	.8byte	.LVL1605
-	.8byte	.LVL1606-1
+	.8byte	.LVL1607
+	.8byte	.LVL1608-1
 	.2byte	0x2
 	.byte	0x70
 	.sleb128 4
-	.8byte	.LVL1615
-	.8byte	.LVL1616
+	.8byte	.LVL1617
+	.8byte	.LVL1618
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1616
-	.8byte	.LVL1617-1
+	.8byte	.LVL1618
+	.8byte	.LVL1619-1
 	.2byte	0x16
 	.byte	0x85
 	.sleb128 0
@@ -47276,30 +47409,30 @@ __func__.7630:
 	.byte	0x22
 	.8byte	0
 	.8byte	0
-.LLST371:
-	.8byte	.LVL1591
-	.8byte	.LVL1595
+.LLST373:
+	.8byte	.LVL1593
+	.8byte	.LVL1597
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1599
-	.8byte	.LVL1618
+	.8byte	.LVL1601
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1618
+	.8byte	.LVL1620
 	.8byte	.LFE263
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST372:
-	.8byte	.LVL1593
-	.8byte	.LVL1594
+.LLST374:
+	.8byte	.LVL1595
+	.8byte	.LVL1596
 	.2byte	0x13
 	.byte	0x70
 	.sleb128 0
@@ -47312,8 +47445,8 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1594
-	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.8byte	.LVL1597
 	.2byte	0x13
 	.byte	0x8c
 	.sleb128 0
@@ -47326,29 +47459,29 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x25
 	.byte	0x9f
-	.8byte	.LVL1595
-	.8byte	.LVL1596
+	.8byte	.LVL1597
+	.8byte	.LVL1598
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1599
-	.8byte	.LVL1611
+	.8byte	.LVL1601
+	.8byte	.LVL1613
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1611
-	.8byte	.LVL1612-1
+	.8byte	.LVL1613
+	.8byte	.LVL1614-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1612-1
-	.8byte	.LVL1613
+	.8byte	.LVL1614-1
+	.8byte	.LVL1615
 	.2byte	0x3
 	.byte	0x85
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1613
-	.8byte	.LVL1618
+	.8byte	.LVL1615
+	.8byte	.LVL1620
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1618
+	.8byte	.LVL1620
 	.8byte	.LFE263
 	.2byte	0x13
 	.byte	0x8c
@@ -47364,12 +47497,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST237:
-	.8byte	.LVL914
-	.8byte	.LVL918
+.LLST239:
+	.8byte	.LVL916
+	.8byte	.LVL920
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL918
+	.8byte	.LVL920
 	.8byte	.LFE262
 	.2byte	0x4
 	.byte	0xf3
@@ -47378,110 +47511,110 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST238:
-	.8byte	.LVL914
-	.8byte	.LVL915
+.LLST240:
+	.8byte	.LVL916
+	.8byte	.LVL917
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL915
-	.8byte	.LVL932
+	.8byte	.LVL917
+	.8byte	.LVL934
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL932
-	.8byte	.LVL933
+	.8byte	.LVL934
+	.8byte	.LVL935
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST239:
-	.8byte	.LVL914
-	.8byte	.LVL919
+.LLST241:
+	.8byte	.LVL916
+	.8byte	.LVL921
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL919
-	.8byte	.LVL932
+	.8byte	.LVL921
+	.8byte	.LVL934
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL932
-	.8byte	.LVL933
+	.8byte	.LVL934
+	.8byte	.LVL935
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST240:
-	.8byte	.LVL920
-	.8byte	.LVL921
+.LLST242:
+	.8byte	.LVL922
+	.8byte	.LVL923
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL922
 	.8byte	.LVL924
+	.8byte	.LVL926
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL924
-	.8byte	.LVL925-1
+	.8byte	.LVL926
+	.8byte	.LVL927-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL925-1
-	.8byte	.LVL927
+	.8byte	.LVL927-1
+	.8byte	.LVL929
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL927
 	.8byte	.LVL929
+	.8byte	.LVL931
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST241:
-	.8byte	.LVL916
-	.8byte	.LVL931
+.LLST243:
+	.8byte	.LVL918
+	.8byte	.LVL933
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST242:
-	.8byte	.LVL917
-	.8byte	.LVL930
+.LLST244:
+	.8byte	.LVL919
+	.8byte	.LVL932
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL933
+	.8byte	.LVL935
 	.8byte	.LFE262
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST328:
-	.8byte	.LVL1361
-	.8byte	.LVL1362
+.LLST330:
+	.8byte	.LVL1363
+	.8byte	.LVL1364
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1363
 	.8byte	.LVL1365
+	.8byte	.LVL1367
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1366
+	.8byte	.LVL1368
 	.8byte	.LFE261
 	.2byte	0x1
 	.byte	0x63
@@ -47565,12 +47698,12 @@ __func__.7630:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST235:
-	.8byte	.LVL909
-	.8byte	.LVL910
+.LLST237:
+	.8byte	.LVL911
+	.8byte	.LVL912
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL910
+	.8byte	.LVL912
 	.8byte	.LFE259
 	.2byte	0x4
 	.byte	0xf3
@@ -47579,9 +47712,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST236:
-	.8byte	.LVL911
-	.8byte	.LVL912
+.LLST238:
+	.8byte	.LVL913
+	.8byte	.LVL914
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -47591,22 +47724,22 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL912
-	.8byte	.LVL913-1
+	.8byte	.LVL914
+	.8byte	.LVL915-1
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST222:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST224:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL870
-	.8byte	.LVL884
+	.8byte	.LVL872
+	.8byte	.LVL886
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL884
+	.8byte	.LVL886
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47615,16 +47748,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST223:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST225:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL870
-	.8byte	.LVL885
+	.8byte	.LVL872
+	.8byte	.LVL887
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL885
+	.8byte	.LVL887
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47633,16 +47766,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST224:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST226:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL870
-	.8byte	.LVL883
+	.8byte	.LVL872
+	.8byte	.LVL885
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL883
+	.8byte	.LVL885
 	.8byte	.LFE258
 	.2byte	0x4
 	.byte	0xf3
@@ -47651,9 +47784,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST225:
-	.8byte	.LVL874
-	.8byte	.LVL875-1
+.LLST227:
+	.8byte	.LVL876
+	.8byte	.LVL877-1
 	.2byte	0x7
 	.byte	0x73
 	.sleb128 0
@@ -47661,8 +47794,8 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL875-1
-	.8byte	.LVL886
+	.8byte	.LVL877-1
+	.8byte	.LVL888
 	.2byte	0xa
 	.byte	0x8f
 	.sleb128 204
@@ -47672,7 +47805,7 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL886
+	.8byte	.LVL888
 	.8byte	.LFE258
 	.2byte	0xa
 	.byte	0x8f
@@ -47685,379 +47818,379 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST226:
-	.8byte	.LVL876
-	.8byte	.LVL877
+.LLST228:
+	.8byte	.LVL878
+	.8byte	.LVL879
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL877
-	.8byte	.LVL878-1
+	.8byte	.LVL879
+	.8byte	.LVL880-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	req_sys+16
 	.8byte	0
 	.8byte	0
-.LLST227:
-	.8byte	.LVL869
-	.8byte	.LVL870
+.LLST229:
+	.8byte	.LVL871
+	.8byte	.LVL872
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL870
-	.8byte	.LVL879
+	.8byte	.LVL872
+	.8byte	.LVL881
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL880
 	.8byte	.LVL882
+	.8byte	.LVL884
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL847
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 	.8byte	.LVL849
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-	.8byte	.LVL854
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+	.8byte	.LVL856
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 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
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 	.8byte	0
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-	.8byte	.LVL858
-	.8byte	.LVL859
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+	.8byte	.LVL860
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 	.byte	0x9f
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 	.8byte	.LVL861
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-	.8byte	.LVL868
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+	.8byte	.LVL870
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 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL858
-	.8byte	.LVL859
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 	.2byte	0x2
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 	.byte	0x9f
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-	.8byte	.LVL860
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+	.8byte	.LVL862
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-	.8byte	.LVL865
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-	.8byte	.LVL848
-	.8byte	.LVL852
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+	.8byte	.LVL850
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 	.2byte	0x1
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-	.8byte	.LVL855
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 	.2byte	0x1
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 	.sleb128 16
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL848
-	.8byte	.LVL849
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+	.8byte	.LVL850
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 	.2byte	0x2
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 	.sleb128 40
-	.8byte	.LVL849
-	.8byte	.LVL850-1
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 	.2byte	0x2
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 	.sleb128 40
-	.8byte	.LVL854
-	.8byte	.LVL858-1
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 	.2byte	0x2
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 	.8byte	0
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-	.8byte	.LVL856
-	.8byte	.LVL857
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+	.8byte	.LVL858
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 	.2byte	0x1
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-	.8byte	.LVL857
-	.8byte	.LVL858-1
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 	.2byte	0x9
 	.byte	0x3
 	.8byte	p_sys_spare_buf
 	.8byte	0
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-	.8byte	.LVL887
-	.8byte	.LVL890-1
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+	.8byte	.LVL889
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 	.2byte	0x1
 	.byte	0x50
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-	.8byte	.LVL898
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 	.byte	0x63
-	.8byte	.LVL898
 	.8byte	.LVL900
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 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL900
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 	.8byte	.LFE256
 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL892
-	.8byte	.LVL896
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+	.8byte	.LVL894
+	.8byte	.LVL898
 	.2byte	0x1
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 	.8byte	.LFE256
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL890
-	.8byte	.LVL891
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+	.8byte	.LVL892
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 	.2byte	0x1
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-	.8byte	.LVL894
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 	.8byte	.LVL896
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 	.2byte	0x1
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-	.8byte	.LVL900
-	.8byte	.LVL905
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-	.8byte	.LVL906
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 	.8byte	0
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-	.8byte	.LVL888
-	.8byte	.LVL894
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+	.8byte	.LVL890
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL889
-	.8byte	.LVL899
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+	.8byte	.LVL891
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 	.2byte	0x1
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 	.8byte	0
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-	.8byte	.LVL901
-	.8byte	.LVL904
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 	.8byte	0
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-	.8byte	.LVL824
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 	.8byte	.LVL826
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-	.8byte	.LVL831
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 	.2byte	0x1
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-	.8byte	.LVL831
-	.8byte	.LVL835
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+	.8byte	.LVL837
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL835
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 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL825
-	.8byte	.LVL833
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+	.8byte	.LVL827
+	.8byte	.LVL835
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL835
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 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL825
-	.8byte	.LVL830
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+	.8byte	.LVL827
+	.8byte	.LVL832
 	.2byte	0x1
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-	.8byte	.LVL841
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+	.8byte	.LVL843
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL825
-	.8byte	.LVL832
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+	.8byte	.LVL827
+	.8byte	.LVL834
 	.2byte	0x1
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 	.8byte	.LFE254
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL836
-	.8byte	.LVL841
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+	.8byte	.LVL838
+	.8byte	.LVL843
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL827
-	.8byte	.LVL828
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+	.8byte	.LVL829
+	.8byte	.LVL830
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
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 	.8byte	.LVL830
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 	.8byte	.LVL837
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-	.8byte	.LVL838
-	.8byte	.LVL841
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+	.8byte	.LVL843
 	.2byte	0x1
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 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL829
-	.8byte	.LVL830
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+	.8byte	.LVL831
+	.8byte	.LVL832
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL830
-	.8byte	.LVL831
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+	.8byte	.LVL833
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL836
-	.8byte	.LVL839
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+	.8byte	.LVL841
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL840
-	.8byte	.LVL841
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+	.8byte	.LVL843
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL841
-	.8byte	.LVL845
+	.8byte	.LVL843
+	.8byte	.LVL847
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL846
+	.8byte	.LVL848
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL829
-	.8byte	.LVL834
+.LLST216:
+	.8byte	.LVL831
+	.8byte	.LVL836
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL841
+	.8byte	.LVL843
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL829
-	.8byte	.LVL830
+.LLST217:
+	.8byte	.LVL831
+	.8byte	.LVL832
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL830
-	.8byte	.LVL834
+	.8byte	.LVL832
+	.8byte	.LVL836
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL841
-	.8byte	.LVL842
+	.8byte	.LVL843
+	.8byte	.LVL844
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL843
+	.8byte	.LVL845
 	.8byte	.LFE254
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL808
-	.8byte	.LVL809
+.LLST206:
+	.8byte	.LVL810
+	.8byte	.LVL811
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL809
-	.8byte	.LVL815
+	.8byte	.LVL811
+	.8byte	.LVL817
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL815
+	.8byte	.LVL817
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48066,16 +48199,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST205:
-	.8byte	.LVL808
+.LLST207:
 	.8byte	.LVL810
+	.8byte	.LVL812
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL810
-	.8byte	.LVL813
+	.8byte	.LVL812
+	.8byte	.LVL815
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL813
+	.8byte	.LVL815
 	.8byte	.LFE253
 	.2byte	0x4
 	.byte	0xf3
@@ -48084,12 +48217,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST206:
-	.8byte	.LVL812
-	.8byte	.LVL816
+.LLST208:
+	.8byte	.LVL814
+	.8byte	.LVL818
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL817
+	.8byte	.LVL819
 	.8byte	.LFE253
 	.2byte	0x1
 	.byte	0x68
@@ -49047,16 +49180,16 @@ __func__.7630:
 	.byte	0x5b
 	.8byte	0
 	.8byte	0
-.LLST182:
-	.8byte	.LVL676
-	.8byte	.LVL677
+.LLST184:
+	.8byte	.LVL678
+	.8byte	.LVL679
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL677
-	.8byte	.LVL685
+	.8byte	.LVL679
+	.8byte	.LVL687
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL685
+	.8byte	.LVL687
 	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49065,12 +49198,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST183:
-	.8byte	.LVL676
-	.8byte	.LVL679-1
+.LLST185:
+	.8byte	.LVL678
+	.8byte	.LVL681-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL679-1
+	.8byte	.LVL681-1
 	.8byte	.LFE240
 	.2byte	0x4
 	.byte	0xf3
@@ -49079,37 +49212,37 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST184:
-	.8byte	.LVL678
-	.8byte	.LVL684
+.LLST186:
+	.8byte	.LVL680
+	.8byte	.LVL686
 	.2byte	0xa
 	.byte	0x3
 	.8byte	gSysFreeQueue
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL680
-	.8byte	.LVL681
+.LLST187:
+	.8byte	.LVL682
+	.8byte	.LVL683
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL681
 	.8byte	.LVL683
+	.8byte	.LVL685
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL805
-	.8byte	.LVL806
+.LLST205:
+	.8byte	.LVL807
+	.8byte	.LVL808
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL806
-	.8byte	.LVL807-1
+	.8byte	.LVL808
+	.8byte	.LVL809-1
 	.2byte	0x9
 	.byte	0x3
 	.8byte	gSysFreeQueue
-	.8byte	.LVL807-1
+	.8byte	.LVL809-1
 	.8byte	.LFE237
 	.2byte	0x4
 	.byte	0xf3
@@ -49118,23 +49251,23 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST161:
-	.8byte	.LVL618
-	.8byte	.LVL622
+.LLST163:
+	.8byte	.LVL620
+	.8byte	.LVL624
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL622
-	.8byte	.LVL629
+	.8byte	.LVL624
+	.8byte	.LVL631
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL629
 	.8byte	.LVL631
+	.8byte	.LVL633
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL631
+	.8byte	.LVL633
 	.8byte	.LFE236
 	.2byte	0x4
 	.byte	0xf3
@@ -49143,69 +49276,69 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL618
-	.8byte	.LVL619
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+	.8byte	.LVL620
+	.8byte	.LVL621
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL619
-	.8byte	.LVL628
+	.8byte	.LVL621
+	.8byte	.LVL630
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL628
-	.8byte	.LVL629
+	.8byte	.LVL630
+	.8byte	.LVL631
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL629
-	.8byte	.LVL630
+	.8byte	.LVL631
+	.8byte	.LVL632
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL630
+	.8byte	.LVL632
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
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-	.8byte	.LVL623
+.LLST165:
 	.8byte	.LVL625
+	.8byte	.LVL627
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL625
-	.8byte	.LVL626
+	.8byte	.LVL627
+	.8byte	.LVL628
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL631
+	.8byte	.LVL633
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST164:
-	.8byte	.LVL623
-	.8byte	.LVL627
+.LLST166:
+	.8byte	.LVL625
+	.8byte	.LVL629
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL631
-	.8byte	.LVL634
+	.8byte	.LVL633
+	.8byte	.LVL636
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL635
+	.8byte	.LVL637
 	.8byte	.LFE236
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST165:
-	.8byte	.LVL632
-	.8byte	.LVL636
+.LLST167:
+	.8byte	.LVL634
+	.8byte	.LVL638
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL636
+	.8byte	.LVL638
 	.8byte	.LFE236
 	.2byte	0x3
 	.byte	0x84
@@ -49213,9 +49346,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST166:
-	.8byte	.LVL620
-	.8byte	.LVL621
+.LLST168:
+	.8byte	.LVL622
+	.8byte	.LVL623
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
@@ -49491,179 +49624,179 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST361:
-	.8byte	.LVL1546
-	.8byte	.LVL1547
+.LLST363:
+	.8byte	.LVL1548
+	.8byte	.LVL1549
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1547
 	.8byte	.LVL1549
+	.8byte	.LVL1551
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1557
-	.8byte	.LVL1562
+	.8byte	.LVL1559
+	.8byte	.LVL1564
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1562
-	.8byte	.LVL1563
+	.8byte	.LVL1564
+	.8byte	.LVL1565
 	.2byte	0x3
 	.byte	0x86
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1563
-	.8byte	.LVL1583
+	.8byte	.LVL1565
+	.8byte	.LVL1585
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST362:
-	.8byte	.LVL1548
+.LLST364:
 	.8byte	.LVL1550
+	.8byte	.LVL1552
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1551
-	.8byte	.LVL1555
+	.8byte	.LVL1553
+	.8byte	.LVL1557
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1556
-	.8byte	.LVL1557
+	.8byte	.LVL1558
+	.8byte	.LVL1559
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1567
-	.8byte	.LVL1577
+	.8byte	.LVL1569
+	.8byte	.LVL1579
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1578
 	.8byte	.LVL1580
+	.8byte	.LVL1582
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1580
-	.8byte	.LVL1581-1
+	.8byte	.LVL1582
+	.8byte	.LVL1583-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1582
 	.8byte	.LVL1584
+	.8byte	.LVL1586
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1589
-	.8byte	.LVL1590-1
+	.8byte	.LVL1591
+	.8byte	.LVL1592-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST363:
-	.8byte	.LVL1559
-	.8byte	.LVL1564
+.LLST365:
+	.8byte	.LVL1561
+	.8byte	.LVL1566
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1571
-	.8byte	.LVL1576
+	.8byte	.LVL1573
+	.8byte	.LVL1578
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST364:
-	.8byte	.LVL1558
-	.8byte	.LVL1579
+.LLST366:
+	.8byte	.LVL1560
+	.8byte	.LVL1581
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST158:
-	.8byte	.LVL608
-	.8byte	.LVL609
+.LLST160:
+	.8byte	.LVL610
+	.8byte	.LVL611
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL611
+	.8byte	.LVL613
 	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST159:
-	.8byte	.LVL612
-	.8byte	.LVL616
+.LLST161:
+	.8byte	.LVL614
+	.8byte	.LVL618
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL617
+	.8byte	.LVL619
 	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST160:
-	.8byte	.LVL608
+.LLST162:
 	.8byte	.LVL610
+	.8byte	.LVL612
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL611
+	.8byte	.LVL613
 	.8byte	.LFE230
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST357:
-	.8byte	.LVL1532
-	.8byte	.LVL1533
+.LLST359:
+	.8byte	.LVL1534
+	.8byte	.LVL1535
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1541
-	.8byte	.LVL1542
+	.8byte	.LVL1543
+	.8byte	.LVL1544
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1542
-	.8byte	.LVL1543
+	.8byte	.LVL1544
+	.8byte	.LVL1545
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1543
-	.8byte	.LVL1544
+	.8byte	.LVL1545
+	.8byte	.LVL1546
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST358:
-	.8byte	.LVL1522
-	.8byte	.LVL1525
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL1534
-	.8byte	.LVL1535
+.LLST360:
+	.8byte	.LVL1524
+	.8byte	.LVL1527
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL1536
 	.8byte	.LVL1537
 	.2byte	0x1
 	.byte	0x63
+	.8byte	.LVL1538
+	.8byte	.LVL1539
+	.2byte	0x1
+	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST359:
-	.8byte	.LVL1528
-	.8byte	.LVL1532
+.LLST361:
+	.8byte	.LVL1530
+	.8byte	.LVL1534
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1537
 	.8byte	.LVL1539
+	.8byte	.LVL1541
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1540
-	.8byte	.LVL1541
+	.8byte	.LVL1542
+	.8byte	.LVL1543
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST360:
-	.8byte	.LVL1520
-	.8byte	.LVL1531
+.LLST362:
+	.8byte	.LVL1522
+	.8byte	.LVL1533
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1534
-	.8byte	.LVL1541
+	.8byte	.LVL1536
+	.8byte	.LVL1543
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1544
+	.8byte	.LVL1546
 	.8byte	.LFE229
 	.2byte	0x1
 	.byte	0x65
@@ -49701,102 +49834,102 @@ __func__.7630:
 	.byte	0x55
 	.8byte	0
 	.8byte	0
-.LLST306:
-	.8byte	.LVL1243
-	.8byte	.LVL1244
+.LLST308:
+	.8byte	.LVL1245
+	.8byte	.LVL1246
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1255
-	.8byte	.LVL1256
+	.8byte	.LVL1257
+	.8byte	.LVL1258
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1256
-	.8byte	.LVL1257
+	.8byte	.LVL1258
+	.8byte	.LVL1259
 	.2byte	0x3
 	.byte	0x88
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL1257
-	.8byte	.LVL1258
+	.8byte	.LVL1259
+	.8byte	.LVL1260
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST307:
-	.8byte	.LVL1242
-	.8byte	.LVL1247
+.LLST309:
+	.8byte	.LVL1244
+	.8byte	.LVL1249
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1247
-	.8byte	.LVL1255
+	.8byte	.LVL1249
+	.8byte	.LVL1257
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1255
-	.8byte	.LVL1258
+	.8byte	.LVL1257
+	.8byte	.LVL1260
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1258
-	.8byte	.LVL1259
+	.8byte	.LVL1260
+	.8byte	.LVL1261
 	.2byte	0x3
 	.byte	0x89
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1260
-	.8byte	.LVL1263
+	.8byte	.LVL1262
+	.8byte	.LVL1265
 	.2byte	0x3
 	.byte	0x89
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST308:
-	.8byte	.LVL1245
-	.8byte	.LVL1255
+.LLST310:
+	.8byte	.LVL1247
+	.8byte	.LVL1257
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1258
-	.8byte	.LVL1261
+	.8byte	.LVL1260
+	.8byte	.LVL1263
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST309:
-	.8byte	.LVL1242
-	.8byte	.LVL1247
+.LLST311:
+	.8byte	.LVL1244
+	.8byte	.LVL1249
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1247
-	.8byte	.LVL1252
+	.8byte	.LVL1249
+	.8byte	.LVL1254
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1253
 	.8byte	.LVL1255
+	.8byte	.LVL1257
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1255
-	.8byte	.LVL1258
+	.8byte	.LVL1257
+	.8byte	.LVL1260
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1258
-	.8byte	.LVL1262
+	.8byte	.LVL1260
+	.8byte	.LVL1264
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST201:
-	.8byte	.LVL797
-	.8byte	.LVL798
+.LLST203:
+	.8byte	.LVL799
+	.8byte	.LVL800
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL798
-	.8byte	.LVL803
+	.8byte	.LVL800
+	.8byte	.LVL805
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL803
+	.8byte	.LVL805
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -49805,16 +49938,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST202:
-	.8byte	.LVL797
+.LLST204:
 	.8byte	.LVL799
+	.8byte	.LVL801
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL799
-	.8byte	.LVL802
+	.8byte	.LVL801
+	.8byte	.LVL804
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL802
+	.8byte	.LVL804
 	.8byte	.LFE225
 	.2byte	0x4
 	.byte	0xf3
@@ -50147,16 +50280,16 @@ __func__.7630:
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST458:
-	.8byte	.LVL2071
-	.8byte	.LVL2074
+.LLST460:
+	.8byte	.LVL2073
+	.8byte	.LVL2076
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2074
-	.8byte	.LVL2075-1
+	.8byte	.LVL2076
+	.8byte	.LVL2077-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2075-1
+	.8byte	.LVL2077-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50165,16 +50298,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST459:
-	.8byte	.LVL2071
+.LLST461:
 	.8byte	.LVL2073
+	.8byte	.LVL2075
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2073
-	.8byte	.LVL2075-1
+	.8byte	.LVL2075
+	.8byte	.LVL2077-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2075-1
+	.8byte	.LVL2077-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50183,16 +50316,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST460:
-	.8byte	.LVL2071
-	.8byte	.LVL2072
+.LLST462:
+	.8byte	.LVL2073
+	.8byte	.LVL2074
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL2072
-	.8byte	.LVL2075-1
+	.8byte	.LVL2074
+	.8byte	.LVL2077-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL2075-1
+	.8byte	.LVL2077-1
 	.8byte	.LFE220
 	.2byte	0x4
 	.byte	0xf3
@@ -50201,16 +50334,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST440:
-	.8byte	.LVL1978
-	.8byte	.LVL1981
+.LLST442:
+	.8byte	.LVL1980
+	.8byte	.LVL1983
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1981
-	.8byte	.LVL1982-1
+	.8byte	.LVL1983
+	.8byte	.LVL1984-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1982-1
+	.8byte	.LVL1984-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50219,16 +50352,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST441:
-	.8byte	.LVL1978
+.LLST443:
 	.8byte	.LVL1980
+	.8byte	.LVL1982
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1980
-	.8byte	.LVL1982-1
+	.8byte	.LVL1982
+	.8byte	.LVL1984-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1982-1
+	.8byte	.LVL1984-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50237,16 +50370,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST442:
-	.8byte	.LVL1978
-	.8byte	.LVL1979
+.LLST444:
+	.8byte	.LVL1980
+	.8byte	.LVL1981
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1979
-	.8byte	.LVL1982-1
+	.8byte	.LVL1981
+	.8byte	.LVL1984-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1982-1
+	.8byte	.LVL1984-1
 	.8byte	.LFE219
 	.2byte	0x4
 	.byte	0xf3
@@ -50255,61 +50388,61 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST398:
-	.8byte	.LVL1738
+.LLST400:
 	.8byte	.LVL1740
+	.8byte	.LVL1742
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1740
-	.8byte	.LVL1741
+	.8byte	.LVL1742
+	.8byte	.LVL1743
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1741
 	.8byte	.LVL1743
+	.8byte	.LVL1745
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1743
-	.8byte	.LVL1746
+	.8byte	.LVL1745
+	.8byte	.LVL1748
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1746
-	.8byte	.LVL1761
+	.8byte	.LVL1748
+	.8byte	.LVL1763
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1761
+	.8byte	.LVL1763
 	.8byte	.LFE218
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST399:
-	.8byte	.LVL1738
-	.8byte	.LVL1739
+.LLST401:
+	.8byte	.LVL1740
+	.8byte	.LVL1741
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1739
-	.8byte	.LVL1742
+	.8byte	.LVL1741
+	.8byte	.LVL1744
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1743
+	.8byte	.LVL1745
 	.8byte	.LFE218
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST400:
-	.8byte	.LVL1746
-	.8byte	.LVL1751
+.LLST402:
+	.8byte	.LVL1748
+	.8byte	.LVL1753
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1751
-	.8byte	.LVL1752
+	.8byte	.LVL1753
+	.8byte	.LVL1754
 	.2byte	0x2a
 	.byte	0xf3
 	.uleb128 0x1
@@ -50340,9 +50473,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST401:
-	.8byte	.LVL1747
-	.8byte	.LVL1748
+.LLST403:
+	.8byte	.LVL1749
+	.8byte	.LVL1750
 	.2byte	0x25
 	.byte	0x71
 	.sleb128 0
@@ -50372,8 +50505,8 @@ __func__.7630:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL1748
 	.8byte	.LVL1750
+	.8byte	.LVL1752
 	.2byte	0x2e
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -50407,26 +50540,26 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST402:
-	.8byte	.LVL1745
-	.8byte	.LVL1761
+.LLST404:
+	.8byte	.LVL1747
+	.8byte	.LVL1763
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST403:
-	.8byte	.LVL1757
-	.8byte	.LVL1758-1
+.LLST405:
+	.8byte	.LVL1759
+	.8byte	.LVL1760-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST443:
-	.8byte	.LVL1983
-	.8byte	.LVL1986
+.LLST445:
+	.8byte	.LVL1985
+	.8byte	.LVL1988
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1986
+	.8byte	.LVL1988
 	.8byte	.LFE217
 	.2byte	0x4
 	.byte	0xf3
@@ -50435,140 +50568,140 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST444:
-	.8byte	.LVL1983
+.LLST446:
 	.8byte	.LVL1985
+	.8byte	.LVL1987
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1985
 	.8byte	.LVL1987
+	.8byte	.LVL1989
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL1989
-	.8byte	.LVL1992
+	.8byte	.LVL1991
+	.8byte	.LVL1994
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1992
-	.8byte	.LVL2016
+	.8byte	.LVL1994
+	.8byte	.LVL2018
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2024
-	.8byte	.LVL2030
+	.8byte	.LVL2026
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2031
-	.8byte	.LVL2070
+	.8byte	.LVL2033
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL2070
+	.8byte	.LVL2072
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x51
 	.8byte	0
 	.8byte	0
-.LLST445:
-	.8byte	.LVL1983
-	.8byte	.LVL1984
+.LLST447:
+	.8byte	.LVL1985
+	.8byte	.LVL1986
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1984
-	.8byte	.LVL1988
+	.8byte	.LVL1986
+	.8byte	.LVL1990
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1989
-	.8byte	.LVL1990
+	.8byte	.LVL1991
+	.8byte	.LVL1992
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1990
+	.8byte	.LVL1992
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST446:
-	.8byte	.LVL1983
-	.8byte	.LVL1987-1
+.LLST448:
+	.8byte	.LVL1985
+	.8byte	.LVL1989-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1987-1
-	.8byte	.LVL1988
+	.8byte	.LVL1989-1
+	.8byte	.LVL1990
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1989
 	.8byte	.LVL1991
+	.8byte	.LVL1993
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1991
-	.8byte	.LVL2070
+	.8byte	.LVL1993
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL2070
+	.8byte	.LVL2072
 	.8byte	.LFE217
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST447:
-	.8byte	.LVL2044
-	.8byte	.LVL2066
+.LLST449:
+	.8byte	.LVL2046
+	.8byte	.LVL2068
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST448:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST450:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1998
-	.8byte	.LVL2018
+	.8byte	.LVL2000
+	.8byte	.LVL2020
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL2037
-	.8byte	.LVL2070
+	.8byte	.LVL2039
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST449:
-	.8byte	.LVL1993
-	.8byte	.LVL2017
+.LLST451:
+	.8byte	.LVL1995
+	.8byte	.LVL2019
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2024
-	.8byte	.LVL2030
+	.8byte	.LVL2026
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL2031
-	.8byte	.LVL2070
+	.8byte	.LVL2033
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x65
 	.8byte	0
 	.8byte	0
-.LLST450:
-	.8byte	.LVL1994
-	.8byte	.LVL1995
+.LLST452:
+	.8byte	.LVL1996
+	.8byte	.LVL1997
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1995
-	.8byte	.LVL2070
+	.8byte	.LVL1997
+	.8byte	.LVL2072
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 344
 	.8byte	0
 	.8byte	0
-.LLST451:
-	.8byte	.LVL2042
-	.8byte	.LVL2043
+.LLST453:
+	.8byte	.LVL2044
+	.8byte	.LVL2045
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2043
 	.8byte	.LVL2045
+	.8byte	.LVL2047
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 4
-	.8byte	.LVL2045
-	.8byte	.LVL2046-1
+	.8byte	.LVL2047
+	.8byte	.LVL2048-1
 	.2byte	0xf
 	.byte	0x3
 	.8byte	req_prgm
@@ -50580,51 +50713,51 @@ __func__.7630:
 	.uleb128 0x4
 	.8byte	0
 	.8byte	0
-.LLST452:
-	.8byte	.LVL2009
-	.8byte	.LVL2014
+.LLST454:
+	.8byte	.LVL2011
+	.8byte	.LVL2016
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2040
-	.8byte	.LVL2052
+	.8byte	.LVL2042
+	.8byte	.LVL2054
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
-	.8byte	.LVL2052
-	.8byte	.LVL2053
+	.8byte	.LVL2054
+	.8byte	.LVL2055
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2053
-	.8byte	.LVL2070
+	.8byte	.LVL2055
+	.8byte	.LVL2072
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 360
 	.8byte	0
 	.8byte	0
-.LLST453:
-	.8byte	.LVL1996
-	.8byte	.LVL2029
+.LLST455:
+	.8byte	.LVL1998
+	.8byte	.LVL2031
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2029
-	.8byte	.LVL2030
+	.8byte	.LVL2031
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2031
-	.8byte	.LVL2037
+	.8byte	.LVL2033
+	.8byte	.LVL2039
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL2037
-	.8byte	.LVL2070
+	.8byte	.LVL2039
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST454:
-	.8byte	.LVL2005
-	.8byte	.LVL2006
+.LLST456:
+	.8byte	.LVL2007
+	.8byte	.LVL2008
 	.2byte	0x21
 	.byte	0x83
 	.sleb128 7
@@ -50652,52 +50785,52 @@ __func__.7630:
 	.byte	0x16
 	.byte	0x13
 	.byte	0x9f
-	.8byte	.LVL2006
-	.8byte	.LVL2007
+	.8byte	.LVL2008
+	.8byte	.LVL2009
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2007
-	.8byte	.LVL2010
+	.8byte	.LVL2009
+	.8byte	.LVL2012
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2010
-	.8byte	.LVL2011
+	.8byte	.LVL2012
+	.8byte	.LVL2013
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL2011
 	.8byte	.LVL2013
+	.8byte	.LVL2015
 	.2byte	0x3
 	.byte	0x8b
 	.sleb128 -1
 	.byte	0x9f
-	.8byte	.LVL2013
-	.8byte	.LVL2014
+	.8byte	.LVL2015
+	.8byte	.LVL2016
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL2040
-	.8byte	.LVL2066
+	.8byte	.LVL2042
+	.8byte	.LVL2068
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 336
-	.8byte	.LVL2066
-	.8byte	.LVL2070
+	.8byte	.LVL2068
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST455:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST457:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2025
 	.8byte	.LVL2027
+	.8byte	.LVL2029
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2027
-	.8byte	.LVL2029-1
+	.8byte	.LVL2029
+	.8byte	.LVL2031-1
 	.2byte	0x16
 	.byte	0x86
 	.sleb128 0
@@ -50713,108 +50846,108 @@ __func__.7630:
 	.byte	0x1e
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2047
-	.8byte	.LVL2048
+	.8byte	.LVL2049
+	.8byte	.LVL2050
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2048
 	.8byte	.LVL2050
+	.8byte	.LVL2052
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2053
 	.8byte	.LVL2055
+	.8byte	.LVL2057
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2055
-	.8byte	.LVL2056
+	.8byte	.LVL2057
+	.8byte	.LVL2058
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
-	.8byte	.LVL2057
-	.8byte	.LVL2065
+	.8byte	.LVL2059
+	.8byte	.LVL2067
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 340
 	.8byte	0
 	.8byte	0
-.LLST456:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST458:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2026
 	.8byte	.LVL2028
+	.8byte	.LVL2030
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL2028
 	.8byte	.LVL2030
+	.8byte	.LVL2032
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2031
-	.8byte	.LVL2037
+	.8byte	.LVL2033
+	.8byte	.LVL2039
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2049
-	.8byte	.LVL2050
+	.8byte	.LVL2051
+	.8byte	.LVL2052
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2054
-	.8byte	.LVL2055
+	.8byte	.LVL2056
+	.8byte	.LVL2057
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2055
-	.8byte	.LVL2056
+	.8byte	.LVL2057
+	.8byte	.LVL2058
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
-	.8byte	.LVL2057
-	.8byte	.LVL2065
+	.8byte	.LVL2059
+	.8byte	.LVL2067
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 348
 	.8byte	0
 	.8byte	0
-.LLST457:
-	.8byte	.LVL1997
-	.8byte	.LVL1998
+.LLST459:
+	.8byte	.LVL1999
+	.8byte	.LVL2000
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL1998
-	.8byte	.LVL2002
+	.8byte	.LVL2000
+	.8byte	.LVL2004
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2004
-	.8byte	.LVL2019
+	.8byte	.LVL2006
+	.8byte	.LVL2021
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2037
 	.8byte	.LVL2039
+	.8byte	.LVL2041
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2040
-	.8byte	.LVL2070
+	.8byte	.LVL2042
+	.8byte	.LVL2072
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST391:
-	.8byte	.LVL1712
-	.8byte	.LVL1715-1
+.LLST393:
+	.8byte	.LVL1714
+	.8byte	.LVL1717-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1715-1
-	.8byte	.LVL1715
+	.8byte	.LVL1717-1
+	.8byte	.LVL1717
 	.2byte	0x3
 	.byte	0x84
 	.sleb128 -4
 	.byte	0x9f
-	.8byte	.LVL1715
+	.8byte	.LVL1717
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50823,12 +50956,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST392:
-	.8byte	.LVL1712
-	.8byte	.LVL1715-1
+.LLST394:
+	.8byte	.LVL1714
+	.8byte	.LVL1717-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1715-1
+	.8byte	.LVL1717-1
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50837,12 +50970,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST393:
-	.8byte	.LVL1712
-	.8byte	.LVL1713
+.LLST395:
+	.8byte	.LVL1714
+	.8byte	.LVL1715
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1713
+	.8byte	.LVL1715
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50851,16 +50984,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST394:
-	.8byte	.LVL1712
+.LLST396:
 	.8byte	.LVL1714
+	.8byte	.LVL1716
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1714
-	.8byte	.LVL1731
+	.8byte	.LVL1716
+	.8byte	.LVL1733
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1731
+	.8byte	.LVL1733
 	.8byte	.LFE215
 	.2byte	0x4
 	.byte	0xf3
@@ -50869,42 +51002,42 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST395:
-	.8byte	.LVL1724
-	.8byte	.LVL1727-1
+.LLST397:
+	.8byte	.LVL1726
+	.8byte	.LVL1729-1
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST396:
-	.8byte	.LVL1716
-	.8byte	.LVL1717
+.LLST398:
+	.8byte	.LVL1718
+	.8byte	.LVL1719
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1726
-	.8byte	.LVL1727-1
+	.8byte	.LVL1728
+	.8byte	.LVL1729-1
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1727-1
-	.8byte	.LVL1729
+	.8byte	.LVL1729-1
+	.8byte	.LVL1731
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST397:
-	.8byte	.LVL1723
-	.8byte	.LVL1725-1
+.LLST399:
+	.8byte	.LVL1725
+	.8byte	.LVL1727-1
 	.2byte	0x2
 	.byte	0x86
 	.sleb128 16
 	.8byte	0
 	.8byte	0
-.LLST423:
-	.8byte	.LVL1929
-	.8byte	.LVL1932
+.LLST425:
+	.8byte	.LVL1931
+	.8byte	.LVL1934
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1932
+	.8byte	.LVL1934
 	.8byte	.LFE214
 	.2byte	0x4
 	.byte	0xf3
@@ -50913,139 +51046,139 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST424:
-	.8byte	.LVL1929
+.LLST426:
 	.8byte	.LVL1931
+	.8byte	.LVL1933
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1931
-	.8byte	.LVL1935
+	.8byte	.LVL1933
+	.8byte	.LVL1937
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1935
-	.8byte	.LVL1938
+	.8byte	.LVL1937
+	.8byte	.LVL1940
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1939
+	.8byte	.LVL1940
+	.8byte	.LVL1941
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1939
+	.8byte	.LVL1941
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST425:
-	.8byte	.LVL1929
-	.8byte	.LVL1930
+.LLST427:
+	.8byte	.LVL1931
+	.8byte	.LVL1932
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1930
-	.8byte	.LVL1937
+	.8byte	.LVL1932
+	.8byte	.LVL1939
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1937
-	.8byte	.LVL1938
+	.8byte	.LVL1939
+	.8byte	.LVL1940
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x52
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1940-1
+	.8byte	.LVL1940
+	.8byte	.LVL1942-1
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1940-1
-	.8byte	.LVL1977
+	.8byte	.LVL1942-1
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x52
 	.8byte	0
 	.8byte	0
-.LLST426:
-	.8byte	.LVL1929
-	.8byte	.LVL1933-1
+.LLST428:
+	.8byte	.LVL1931
+	.8byte	.LVL1935-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1933-1
-	.8byte	.LVL1936
+	.8byte	.LVL1935-1
+	.8byte	.LVL1938
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1936
 	.8byte	.LVL1938
+	.8byte	.LVL1940
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x53
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1940-1
+	.8byte	.LVL1940
+	.8byte	.LVL1942-1
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1940-1
-	.8byte	.LVL1977
+	.8byte	.LVL1942-1
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x1
 	.byte	0x53
 	.8byte	0
 	.8byte	0
-.LLST427:
-	.8byte	.LVL1929
-	.8byte	.LVL1934
+.LLST429:
+	.8byte	.LVL1931
+	.8byte	.LVL1936
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1956
+	.8byte	.LVL1947
+	.8byte	.LVL1958
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1958
-	.8byte	.LVL1977
+	.8byte	.LVL1960
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x65
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST428:
-	.8byte	.LVL1941
-	.8byte	.LVL1977
+.LLST430:
+	.8byte	.LVL1943
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	0
-	.8byte	0
-.LLST429:
-	.8byte	.LVL1942
-	.8byte	.LVL1977
+	.8byte	0
+	.8byte	0
+.LLST431:
+	.8byte	.LVL1944
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST430:
-	.8byte	.LVL1960
-	.8byte	.LVL1961
+.LLST432:
+	.8byte	.LVL1962
+	.8byte	.LVL1963
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1961
-	.8byte	.LVL1962-1
+	.8byte	.LVL1963
+	.8byte	.LVL1964-1
 	.2byte	0x16
 	.byte	0x3
 	.8byte	c_ftl_nand_sec_pre_page
@@ -51063,53 +51196,53 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST431:
-	.8byte	.LVL1943
+.LLST433:
 	.8byte	.LVL1945
+	.8byte	.LVL1947
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL1945
-	.8byte	.LVL1977
+	.8byte	.LVL1947
+	.8byte	.LVL1979
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST432:
-	.8byte	.LVL1952
+.LLST434:
 	.8byte	.LVL1954
+	.8byte	.LVL1956
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST433:
-	.8byte	.LVL1943
+.LLST435:
 	.8byte	.LVL1945
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1953
+	.8byte	.LVL1947
+	.8byte	.LVL1955
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1959
-	.8byte	.LVL1974
+	.8byte	.LVL1961
+	.8byte	.LVL1976
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST434:
-	.8byte	.LVL1943
-	.8byte	.LVL1944
+.LLST436:
+	.8byte	.LVL1945
+	.8byte	.LVL1946
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1944
-	.8byte	.LVL1950
+	.8byte	.LVL1946
+	.8byte	.LVL1952
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
-	.8byte	.LVL1950
-	.8byte	.LVL1951
+	.8byte	.LVL1952
+	.8byte	.LVL1953
 	.2byte	0x8
 	.byte	0x8f
 	.sleb128 300
@@ -51118,62 +51251,62 @@ __func__.7630:
 	.byte	0x31
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1959
-	.8byte	.LVL1974
+	.8byte	.LVL1961
+	.8byte	.LVL1976
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 300
 	.8byte	0
 	.8byte	0
-.LLST435:
-	.8byte	.LVL1929
-	.8byte	.LVL1934
+.LLST437:
+	.8byte	.LVL1931
+	.8byte	.LVL1936
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1966
+	.8byte	.LVL1947
+	.8byte	.LVL1968
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1966
-	.8byte	.LVL1967
+	.8byte	.LVL1968
+	.8byte	.LVL1969
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1967
-	.8byte	.LVL1977
+	.8byte	.LVL1969
+	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 296
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST436:
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+.LLST438:
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1967
+	.8byte	.LVL1947
+	.8byte	.LVL1969
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1967
-	.8byte	.LVL1968
+	.8byte	.LVL1969
+	.8byte	.LVL1970
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1968
-	.8byte	.LVL1969
+	.8byte	.LVL1970
+	.8byte	.LVL1971
 	.2byte	0x9
 	.byte	0x71
 	.sleb128 0
@@ -51183,79 +51316,79 @@ __func__.7630:
 	.byte	0x4
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL1969
-	.8byte	.LVL1970
+	.8byte	.LVL1971
+	.8byte	.LVL1972
 	.2byte	0x1
 	.byte	0x52
-	.8byte	.LVL1970
-	.8byte	.LVL1977
+	.8byte	.LVL1972
+	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 292
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST437:
-	.8byte	.LVL1938
-	.8byte	.LVL1945
+.LLST439:
+	.8byte	.LVL1940
+	.8byte	.LVL1947
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1945
-	.8byte	.LVL1972
+	.8byte	.LVL1947
+	.8byte	.LVL1974
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1972
-	.8byte	.LVL1973
+	.8byte	.LVL1974
+	.8byte	.LVL1975
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1973
-	.8byte	.LVL1977
+	.8byte	.LVL1975
+	.8byte	.LVL1979
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 288
-	.8byte	.LVL1977
+	.8byte	.LVL1979
 	.8byte	.LFE214
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST438:
-	.8byte	.LVL1948
-	.8byte	.LVL1949
+.LLST440:
+	.8byte	.LVL1950
+	.8byte	.LVL1951
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1959
-	.8byte	.LVL1962-1
+	.8byte	.LVL1961
+	.8byte	.LVL1964-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1962-1
-	.8byte	.LVL1963
+	.8byte	.LVL1964-1
+	.8byte	.LVL1965
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 264
-	.8byte	.LVL1964
-	.8byte	.LVL1965
+	.8byte	.LVL1966
+	.8byte	.LVL1967
 	.2byte	0x1
 	.byte	0x54
 	.8byte	0
 	.8byte	0
-.LLST439:
-	.8byte	.LVL1975
-	.8byte	.LVL1976-1
+.LLST441:
+	.8byte	.LVL1977
+	.8byte	.LVL1978-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST467:
-	.8byte	.LVL2171
-	.8byte	.LVL2172
+.LLST469:
+	.8byte	.LVL2173
+	.8byte	.LVL2174
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51263,8 +51396,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2172
-	.8byte	.LVL2173
+	.8byte	.LVL2174
+	.8byte	.LVL2175
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc2
@@ -51272,8 +51405,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL2173
-	.8byte	.LVL2174
+	.8byte	.LVL2175
+	.8byte	.LVL2176
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x1fc1
@@ -51283,118 +51416,118 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST463:
-	.8byte	.LVL2128
-	.8byte	.LVL2129
+.LLST465:
+	.8byte	.LVL2130
+	.8byte	.LVL2131
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2131
-	.8byte	.LVL2132
+	.8byte	.LVL2133
+	.8byte	.LVL2134
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2141
-	.8byte	.LVL2142
+	.8byte	.LVL2143
+	.8byte	.LVL2144
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2142
-	.8byte	.LVL2143-1
+	.8byte	.LVL2144
+	.8byte	.LVL2145-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2145
-	.8byte	.LVL2146
+	.8byte	.LVL2147
+	.8byte	.LVL2148
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL2150
-	.8byte	.LVL2151
-	.2byte	0x1
-	.byte	0x63
-	.8byte	.LVL2151
-	.8byte	.LVL2152-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL2152
 	.8byte	.LVL2153
 	.2byte	0x1
 	.byte	0x63
 	.8byte	.LVL2153
+	.8byte	.LVL2154-1
+	.2byte	0x1
+	.byte	0x50
 	.8byte	.LVL2154
+	.8byte	.LVL2155
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2155
+	.8byte	.LVL2156
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL2154
-	.8byte	.LVL2155-1
+	.8byte	.LVL2156
+	.8byte	.LVL2157-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL2157
-	.8byte	.LVL2158
+	.8byte	.LVL2159
+	.8byte	.LVL2160
 	.2byte	0x1
 	.byte	0x68
 	.8byte	0
 	.8byte	0
-.LLST464:
-	.8byte	.LVL2131
-	.8byte	.LVL2135
+.LLST466:
+	.8byte	.LVL2133
+	.8byte	.LVL2137
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2153
-	.8byte	.LVL2156
+	.8byte	.LVL2155
+	.8byte	.LVL2158
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2157
-	.8byte	.LVL2158
+	.8byte	.LVL2159
+	.8byte	.LVL2160
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST465:
-	.8byte	.LVL2127
-	.8byte	.LVL2128
+.LLST467:
+	.8byte	.LVL2129
+	.8byte	.LVL2130
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL2128
 	.8byte	.LVL2130
+	.8byte	.LVL2132
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2141
-	.8byte	.LVL2144
+	.8byte	.LVL2143
+	.8byte	.LVL2146
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2145
 	.8byte	.LVL2147
+	.8byte	.LVL2149
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL2149
-	.8byte	.LVL2150
+	.8byte	.LVL2151
+	.8byte	.LVL2152
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST466:
-	.8byte	.LVL2126
+.LLST468:
 	.8byte	.LVL2128
-	.2byte	0x1
-	.byte	0x50
-	.8byte	.LVL2138
-	.8byte	.LVL2139
+	.8byte	.LVL2130
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL2140
 	.8byte	.LVL2141
 	.2byte	0x1
 	.byte	0x50
+	.8byte	.LVL2142
+	.8byte	.LVL2143
+	.2byte	0x1
+	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST186:
-	.8byte	.LVL686
-	.8byte	.LVL687
+.LLST188:
+	.8byte	.LVL688
+	.8byte	.LVL689
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL687
-	.8byte	.LVL712
+	.8byte	.LVL689
+	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL712
+	.8byte	.LVL714
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51403,16 +51536,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST187:
-	.8byte	.LVL686
-	.8byte	.LVL689
+.LLST189:
+	.8byte	.LVL688
+	.8byte	.LVL691
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL689
-	.8byte	.LVL712
+	.8byte	.LVL691
+	.8byte	.LVL714
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL712
+	.8byte	.LVL714
 	.8byte	.LFE209
 	.2byte	0x4
 	.byte	0xf3
@@ -51421,256 +51554,256 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST188:
-	.8byte	.LVL686
-	.8byte	.LVL690
+.LLST190:
+	.8byte	.LVL688
+	.8byte	.LVL692
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL690
-	.8byte	.LVL693
+	.8byte	.LVL692
+	.8byte	.LVL695
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL694
-	.8byte	.LVL703
+	.8byte	.LVL696
+	.8byte	.LVL705
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL704
-	.8byte	.LVL711
+	.8byte	.LVL706
+	.8byte	.LVL713
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL713
-	.8byte	.LVL724
+	.8byte	.LVL715
+	.8byte	.LVL726
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL725
+	.8byte	.LVL727
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST189:
-	.8byte	.LVL686
-	.8byte	.LVL690
+.LLST191:
+	.8byte	.LVL688
+	.8byte	.LVL692
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL690
-	.8byte	.LVL691
+	.8byte	.LVL692
+	.8byte	.LVL693
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL699
-	.8byte	.LVL700
+	.8byte	.LVL701
+	.8byte	.LVL702
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL700
-	.8byte	.LVL710
+	.8byte	.LVL702
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL713
-	.8byte	.LVL718
+	.8byte	.LVL715
+	.8byte	.LVL720
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL719
-	.8byte	.LVL726
+	.8byte	.LVL721
+	.8byte	.LVL728
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL727
-	.8byte	.LVL732
+	.8byte	.LVL729
+	.8byte	.LVL734
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL733
+	.8byte	.LVL735
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST190:
-	.8byte	.LVL688
+.LLST192:
 	.8byte	.LVL690
+	.8byte	.LVL692
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL690
-	.8byte	.LVL692-1
+	.8byte	.LVL692
+	.8byte	.LVL694-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL699
-	.8byte	.LVL700
+	.8byte	.LVL701
+	.8byte	.LVL702
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL700
-	.8byte	.LVL701-1
+	.8byte	.LVL702
+	.8byte	.LVL703-1
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL701
-	.8byte	.LVL702
+	.8byte	.LVL703
+	.8byte	.LVL704
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL713
-	.8byte	.LVL721
+	.8byte	.LVL715
+	.8byte	.LVL723
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL721
-	.8byte	.LVL722
+	.8byte	.LVL723
+	.8byte	.LVL724
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL723
-	.8byte	.LVL726
+	.8byte	.LVL725
+	.8byte	.LVL728
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL727
-	.8byte	.LVL735
+	.8byte	.LVL729
+	.8byte	.LVL737
 	.2byte	0x1
 	.byte	0x55
-	.8byte	.LVL735
-	.8byte	.LVL736
+	.8byte	.LVL737
+	.8byte	.LVL738
 	.2byte	0x3
 	.byte	0x75
 	.sleb128 1
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST191:
-	.8byte	.LVL715
-	.8byte	.LVL720
+.LLST193:
+	.8byte	.LVL717
+	.8byte	.LVL722
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL720
-	.8byte	.LVL723
+	.8byte	.LVL722
+	.8byte	.LVL725
 	.2byte	0x1
 	.byte	0x5e
-	.8byte	.LVL723
-	.8byte	.LVL726
+	.8byte	.LVL725
+	.8byte	.LVL728
 	.2byte	0x1
 	.byte	0x5d
-	.8byte	.LVL729
-	.8byte	.LVL734
+	.8byte	.LVL731
+	.8byte	.LVL736
 	.2byte	0x1
 	.byte	0x5c
-	.8byte	.LVL734
+	.8byte	.LVL736
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x5d
 	.8byte	0
 	.8byte	0
-.LLST192:
-	.8byte	.LVL686
-	.8byte	.LVL697
+.LLST194:
+	.8byte	.LVL688
+	.8byte	.LVL699
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL697
-	.8byte	.LVL698
+	.8byte	.LVL699
+	.8byte	.LVL700
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL699
-	.8byte	.LVL710
+	.8byte	.LVL701
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x6a
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6a
 	.8byte	0
 	.8byte	0
-.LLST193:
-	.8byte	.LVL686
-	.8byte	.LVL699
+.LLST195:
+	.8byte	.LVL688
+	.8byte	.LVL701
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL706
+	.8byte	.LVL701
+	.8byte	.LVL708
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL707
-	.8byte	.LVL708
+	.8byte	.LVL709
+	.8byte	.LVL710
 	.2byte	0x1
 	.byte	0x66
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x66
 	.8byte	0
 	.8byte	0
-.LLST194:
-	.8byte	.LVL686
-	.8byte	.LVL698
+.LLST196:
+	.8byte	.LVL688
+	.8byte	.LVL700
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL710
+	.8byte	.LVL701
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x36
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST195:
-	.8byte	.LVL686
-	.8byte	.LVL696
+.LLST197:
+	.8byte	.LVL688
+	.8byte	.LVL698
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL696
 	.8byte	.LVL698
+	.8byte	.LVL700
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
-	.8byte	.LVL699
-	.8byte	.LVL710
+	.8byte	.LVL701
+	.8byte	.LVL712
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL713
-	.8byte	.LVL727
+	.8byte	.LVL715
+	.8byte	.LVL729
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL727
+	.8byte	.LVL729
 	.8byte	.LFE209
 	.2byte	0x1
 	.byte	0x69
 	.8byte	0
 	.8byte	0
-.LLST199:
-	.8byte	.LVL794
-	.8byte	.LVL795
+.LLST201:
+	.8byte	.LVL796
+	.8byte	.LVL797
 	.2byte	0x2
 	.byte	0x31
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST200:
-	.8byte	.LVL741
-	.8byte	.LVL747
+.LLST202:
+	.8byte	.LVL743
+	.8byte	.LVL749
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL748
-	.8byte	.LVL755
+	.8byte	.LVL750
+	.8byte	.LVL757
 	.2byte	0x7
 	.byte	0x83
 	.sleb128 0
@@ -51678,20 +51811,20 @@ __func__.7630:
 	.2byte	0xffff
 	.byte	0x1a
 	.byte	0x9f
-	.8byte	.LVL757
-	.8byte	.LVL760
+	.8byte	.LVL759
+	.8byte	.LVL762
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL764
 	.8byte	.LVL766
+	.8byte	.LVL768
 	.2byte	0x1
 	.byte	0x6c
-	.8byte	.LVL766
-	.8byte	.LVL767-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL768
 	.8byte	.LVL769-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL770
+	.8byte	.LVL771-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51700,8 +51833,8 @@ __func__.7630:
 	.byte	0x31
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL776
-	.8byte	.LVL777
+	.8byte	.LVL778
+	.8byte	.LVL779
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_map_region_num
@@ -51713,12 +51846,12 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL777
-	.8byte	.LVL778-1
-	.2byte	0x1
-	.byte	0x50
 	.8byte	.LVL779
 	.8byte	.LVL780-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL781
+	.8byte	.LVL782-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	c_ftl_nand_max_map_blks
@@ -51727,8 +51860,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL781
-	.8byte	.LVL782
+	.8byte	.LVL783
+	.8byte	.LVL784
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51740,12 +51873,12 @@ __func__.7630:
 	.byte	0x34
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL782
-	.8byte	.LVL783-1
+	.8byte	.LVL784
+	.8byte	.LVL785-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL784
-	.8byte	.LVL785
+	.8byte	.LVL786
+	.8byte	.LVL787
 	.2byte	0x20
 	.byte	0x3
 	.8byte	c_ftl_nand_l2pmap_ram_region_num
@@ -51763,12 +51896,12 @@ __func__.7630:
 	.byte	0x1a
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL785
-	.8byte	.LVL786-1
+	.8byte	.LVL787
+	.8byte	.LVL788-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL787
-	.8byte	.LVL788
+	.8byte	.LVL789
+	.8byte	.LVL790
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_blk_pre_plane
@@ -51780,12 +51913,12 @@ __func__.7630:
 	.byte	0x36
 	.byte	0x1e
 	.byte	0x9f
-	.8byte	.LVL788
-	.8byte	.LVL789-1
+	.8byte	.LVL790
+	.8byte	.LVL791-1
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL790
-	.8byte	.LVL791
+	.8byte	.LVL792
+	.8byte	.LVL793
 	.2byte	0x15
 	.byte	0x3
 	.8byte	c_ftl_nand_die_num
@@ -51800,8 +51933,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL791
-	.8byte	.LVL792
+	.8byte	.LVL793
+	.8byte	.LVL794
 	.2byte	0x26
 	.byte	0x3
 	.8byte	c_ftl_nand_blks_per_die
@@ -51825,8 +51958,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL792
-	.8byte	.LVL793-1
+	.8byte	.LVL794
+	.8byte	.LVL795-1
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
@@ -52140,7 +52273,7 @@ __func__.7630:
 	.2byte	0x1
 	.byte	0x50
 	.8byte	.LVL11
-	.8byte	.LFE355
+	.8byte	.LFE356
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52562,9 +52695,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST251:
-	.8byte	.LVL964
-	.8byte	.LVL968
+.LLST253:
+	.8byte	.LVL966
+	.8byte	.LVL970
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52572,8 +52705,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL969
-	.8byte	.LVL970
+	.8byte	.LVL971
+	.8byte	.LVL972
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x801
@@ -52581,8 +52714,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x1c
 	.byte	0x9f
-	.8byte	.LVL970
-	.8byte	.LVL971
+	.8byte	.LVL972
+	.8byte	.LVL973
 	.2byte	0x7
 	.byte	0xa
 	.2byte	0x800
@@ -52592,35 +52725,35 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST297:
-	.8byte	.LVL1215
+.LLST299:
 	.8byte	.LVL1217
+	.8byte	.LVL1219
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1217
 	.8byte	.LVL1219
+	.8byte	.LVL1221
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1219
-	.8byte	.LVL1225
+	.8byte	.LVL1221
+	.8byte	.LVL1227
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1225
-	.8byte	.LFE343
+	.8byte	.LVL1227
+	.8byte	.LFE344
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST298:
-	.8byte	.LVL1216
-	.8byte	.LVL1219
+.LLST300:
+	.8byte	.LVL1218
+	.8byte	.LVL1221
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1219
-	.8byte	.LVL1224
+	.8byte	.LVL1221
+	.8byte	.LVL1226
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52628,16 +52761,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST318:
-	.8byte	.LVL1308
-	.8byte	.LVL1309
+.LLST320:
+	.8byte	.LVL1310
+	.8byte	.LVL1311
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1309
-	.8byte	.LVL1312
+	.8byte	.LVL1311
+	.8byte	.LVL1314
 	.2byte	0x1
 	.byte	0x69
-	.8byte	.LVL1312
+	.8byte	.LVL1314
 	.8byte	.LFE317
 	.2byte	0x4
 	.byte	0xf3
@@ -52646,28 +52779,28 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST319:
-	.8byte	.LVL1310
-	.8byte	.LVL1311
+.LLST321:
+	.8byte	.LVL1312
+	.8byte	.LVL1313
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1313
-	.8byte	.LVL1316
+	.8byte	.LVL1315
+	.8byte	.LVL1318
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1317
+	.8byte	.LVL1319
 	.8byte	.LFE317
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST320:
-	.8byte	.LVL1320
-	.8byte	.LVL1321
+.LLST322:
+	.8byte	.LVL1322
+	.8byte	.LVL1323
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1321
-	.8byte	.LVL1322
+	.8byte	.LVL1323
+	.8byte	.LVL1324
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52675,8 +52808,8 @@ __func__.7630:
 	.sleb128 0
 	.byte	0x22
 	.byte	0x9f
-	.8byte	.LVL1324
-	.8byte	.LVL1325
+	.8byte	.LVL1326
+	.8byte	.LVL1327
 	.2byte	0x6
 	.byte	0x70
 	.sleb128 0
@@ -52686,16 +52819,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST321:
-	.8byte	.LVL1326
-	.8byte	.LVL1327
+.LLST323:
+	.8byte	.LVL1328
+	.8byte	.LVL1329
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1327
-	.8byte	.LVL1335
+	.8byte	.LVL1329
+	.8byte	.LVL1337
 	.2byte	0x1
 	.byte	0x63
-	.8byte	.LVL1335
+	.8byte	.LVL1337
 	.8byte	.LFE301
 	.2byte	0x4
 	.byte	0xf3
@@ -52704,16 +52837,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST322:
-	.8byte	.LVL1328
-	.8byte	.LVL1334
+.LLST324:
+	.8byte	.LVL1330
+	.8byte	.LVL1336
 	.2byte	0x1
 	.byte	0x63
 	.8byte	0
 	.8byte	0
-.LLST325:
-	.8byte	.LVL1348
-	.8byte	.LVL1349-1
+.LLST327:
+	.8byte	.LVL1350
+	.8byte	.LVL1351-1
 	.2byte	0xe
 	.byte	0x3
 	.8byte	g_MaxLpn
@@ -52724,9 +52857,9 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST326:
-	.8byte	.LVL1348
-	.8byte	.LVL1349-1
+.LLST328:
+	.8byte	.LVL1350
+	.8byte	.LVL1351-1
 	.2byte	0x12
 	.byte	0x3
 	.8byte	c_ftl_nand_planes_num
@@ -52738,8 +52871,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1349-1
-	.8byte	.LVL1352
+	.8byte	.LVL1351-1
+	.8byte	.LVL1354
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52749,8 +52882,8 @@ __func__.7630:
 	.byte	0x32
 	.byte	0x24
 	.byte	0x9f
-	.8byte	.LVL1354
 	.8byte	.LVL1356
+	.8byte	.LVL1358
 	.2byte	0x9
 	.byte	0x89
 	.sleb128 0
@@ -52762,60 +52895,60 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST327:
-	.8byte	.LVL1350
-	.8byte	.LVL1353
+.LLST329:
+	.8byte	.LVL1352
+	.8byte	.LVL1355
 	.2byte	0x1
 	.byte	0x64
-	.8byte	.LVL1354
-	.8byte	.LVL1360
+	.8byte	.LVL1356
+	.8byte	.LVL1362
 	.2byte	0x1
 	.byte	0x64
 	.8byte	0
 	.8byte	0
-.LLST411:
-	.8byte	.LVL1830
+.LLST413:
 	.8byte	.LVL1832
+	.8byte	.LVL1834
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1832
-	.8byte	.LVL1845
+	.8byte	.LVL1834
+	.8byte	.LVL1847
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1845
-	.8byte	.LVL1846
+	.8byte	.LVL1847
+	.8byte	.LVL1848
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1846
-	.8byte	.LVL1866
+	.8byte	.LVL1848
+	.8byte	.LVL1868
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1866
 	.8byte	.LVL1868
+	.8byte	.LVL1870
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1868
-	.8byte	.LVL1879
+	.8byte	.LVL1870
+	.8byte	.LVL1881
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1879
-	.8byte	.LVL1926
+	.8byte	.LVL1881
+	.8byte	.LVL1928
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1926
-	.8byte	.LVL1927
+	.8byte	.LVL1928
+	.8byte	.LVL1929
 	.2byte	0x1
 	.byte	0x50
-	.8byte	.LVL1927
+	.8byte	.LVL1929
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52824,12 +52957,12 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST412:
-	.8byte	.LVL1830
-	.8byte	.LVL1831
+.LLST414:
+	.8byte	.LVL1832
+	.8byte	.LVL1833
 	.2byte	0x1
 	.byte	0x51
-	.8byte	.LVL1831
+	.8byte	.LVL1833
 	.8byte	.LFE319
 	.2byte	0x4
 	.byte	0xf3
@@ -52838,16 +52971,16 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST413:
-	.8byte	.LVL1833
-	.8byte	.LVL1845
+.LLST415:
+	.8byte	.LVL1835
+	.8byte	.LVL1847
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x51
 	.byte	0x9f
-	.8byte	.LVL1848
-	.8byte	.LVL1926
+	.8byte	.LVL1850
+	.8byte	.LVL1928
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52855,28 +52988,28 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST414:
-	.8byte	.LVL1833
-	.8byte	.LVL1845
+.LLST416:
+	.8byte	.LVL1835
+	.8byte	.LVL1847
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1848
-	.8byte	.LVL1866
+	.8byte	.LVL1850
+	.8byte	.LVL1868
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1866
 	.8byte	.LVL1868
+	.8byte	.LVL1870
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
 	.byte	0x50
 	.byte	0x9f
-	.8byte	.LVL1868
-	.8byte	.LVL1879
+	.8byte	.LVL1870
+	.8byte	.LVL1881
 	.2byte	0x1
 	.byte	0x68
-	.8byte	.LVL1879
-	.8byte	.LVL1926
+	.8byte	.LVL1881
+	.8byte	.LVL1928
 	.2byte	0x4
 	.byte	0xf3
 	.uleb128 0x1
@@ -52884,120 +53017,120 @@ __func__.7630:
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST415:
-	.8byte	.LVL1909
-	.8byte	.LVL1910-1
+.LLST417:
+	.8byte	.LVL1911
+	.8byte	.LVL1912-1
 	.2byte	0x1
 	.byte	0x54
-	.8byte	.LVL1910-1
-	.8byte	.LVL1911
+	.8byte	.LVL1912-1
+	.8byte	.LVL1913
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 272
 	.8byte	0
 	.8byte	0
-.LLST416:
-	.8byte	.LVL1890
-	.8byte	.LVL1891
+.LLST418:
+	.8byte	.LVL1892
+	.8byte	.LVL1893
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
-	.8byte	.LVL1891
-	.8byte	.LVL1904
+	.8byte	.LVL1893
+	.8byte	.LVL1906
 	.2byte	0x1
 	.byte	0x6b
-	.8byte	.LVL1904
-	.8byte	.LVL1905
+	.8byte	.LVL1906
+	.8byte	.LVL1907
 	.2byte	0x3
 	.byte	0x8b
 	.sleb128 1
 	.byte	0x9f
-	.8byte	.LVL1906
-	.8byte	.LVL1926
+	.8byte	.LVL1908
+	.8byte	.LVL1928
 	.2byte	0x1
 	.byte	0x6b
 	.8byte	0
 	.8byte	0
-.LLST417:
-	.8byte	.LVL1892
-	.8byte	.LVL1897
-	.2byte	0x1
-	.byte	0x52
+.LLST419:
+	.8byte	.LVL1894
 	.8byte	.LVL1899
-	.8byte	.LVL1900
 	.2byte	0x1
 	.byte	0x52
 	.8byte	.LVL1901
+	.8byte	.LVL1902
+	.2byte	0x1
+	.byte	0x52
 	.8byte	.LVL1903
+	.8byte	.LVL1905
 	.2byte	0x2
 	.byte	0x30
 	.byte	0x9f
 	.8byte	0
 	.8byte	0
-.LLST418:
-	.8byte	.LVL1892
+.LLST420:
 	.8byte	.LVL1894
+	.8byte	.LVL1896
 	.2byte	0x1
 	.byte	0x67
-	.8byte	.LVL1895
-	.8byte	.LVL1902
+	.8byte	.LVL1897
+	.8byte	.LVL1904
 	.2byte	0x1
 	.byte	0x67
 	.8byte	0
 	.8byte	0
-.LLST419:
-	.8byte	.LVL1893
-	.8byte	.LVL1896
+.LLST421:
+	.8byte	.LVL1895
+	.8byte	.LVL1898
 	.2byte	0x1
 	.byte	0x53
-	.8byte	.LVL1896
 	.8byte	.LVL1898
+	.8byte	.LVL1900
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 0
-	.8byte	.LVL1898
-	.8byte	.LVL1899
+	.8byte	.LVL1900
+	.8byte	.LVL1901
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 -2
 	.8byte	0
 	.8byte	0
-.LLST420:
-	.8byte	.LVL1888
-	.8byte	.LVL1926
+.LLST422:
+	.8byte	.LVL1890
+	.8byte	.LVL1928
 	.2byte	0x3
 	.byte	0x8f
 	.sleb128 332
 	.8byte	0
 	.8byte	0
-.LLST421:
-	.8byte	.LVL1907
-	.8byte	.LVL1908
+.LLST423:
+	.8byte	.LVL1909
+	.8byte	.LVL1910
 	.2byte	0x2
 	.byte	0x71
 	.sleb128 16
-	.8byte	.LVL1908
-	.8byte	.LVL1916
+	.8byte	.LVL1910
+	.8byte	.LVL1918
 	.2byte	0x1
 	.byte	0x6c
 	.8byte	0
 	.8byte	0
-.LLST422:
-	.8byte	.LVL1838
-	.8byte	.LVL1839
+.LLST424:
+	.8byte	.LVL1840
+	.8byte	.LVL1841
 	.2byte	0x1
 	.byte	0x50
 	.8byte	0
 	.8byte	0
-.LLST462:
-	.8byte	.LVL2108
-	.8byte	.LVL2109
+.LLST464:
+	.8byte	.LVL2110
+	.8byte	.LVL2111
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_active_superblock
 	.byte	0x9f
-	.8byte	.LVL2109
-	.8byte	.LVL2115
+	.8byte	.LVL2111
+	.8byte	.LVL2117
 	.2byte	0xa
 	.byte	0x3
 	.8byte	g_buffer_superblock
@@ -53005,17 +53138,17 @@ __func__.7630:
 	.8byte	0
 	.8byte	0
 	.section	.debug_aranges,"",@progbits
-	.4byte	0x86c
+	.4byte	0x87c
 	.2byte	0x2
 	.4byte	.Ldebug_info0
 	.byte	0x8
 	.byte	0
 	.2byte	0
 	.2byte	0
-	.8byte	.LFB348
-	.8byte	.LFE348-.LFB348
-	.8byte	.LFB355
-	.8byte	.LFE355-.LFB355
+	.8byte	.LFB349
+	.8byte	.LFE349-.LFB349
+	.8byte	.LFB356
+	.8byte	.LFE356-.LFB356
 	.8byte	.LFB202
 	.8byte	.LFE202-.LFB202
 	.8byte	.LFB203
@@ -53124,22 +53257,24 @@ __func__.7630:
 	.8byte	.LFE337-.LFB337
 	.8byte	.LFB338
 	.8byte	.LFE338-.LFB338
-	.8byte	.LFB340
-	.8byte	.LFE340-.LFB340
+	.8byte	.LFB339
+	.8byte	.LFE339-.LFB339
+	.8byte	.LFB341
+	.8byte	.LFE341-.LFB341
 	.8byte	.LFB230
 	.8byte	.LFE230-.LFB230
 	.8byte	.LFB236
 	.8byte	.LFE236-.LFB236
-	.8byte	.LFB341
-	.8byte	.LFE341-.LFB341
 	.8byte	.LFB342
 	.8byte	.LFE342-.LFB342
+	.8byte	.LFB343
+	.8byte	.LFE343-.LFB343
 	.8byte	.LFB240
 	.8byte	.LFE240-.LFB240
 	.8byte	.LFB209
 	.8byte	.LFE209-.LFB209
-	.8byte	.LFB345
-	.8byte	.LFE345-.LFB345
+	.8byte	.LFB346
+	.8byte	.LFE346-.LFB346
 	.8byte	.LFB206
 	.8byte	.LFE206-.LFB206
 	.8byte	.LFB225
@@ -53190,12 +53325,12 @@ __func__.7630:
 	.8byte	.LFE309-.LFB309
 	.8byte	.LFB310
 	.8byte	.LFE310-.LFB310
-	.8byte	.LFB343
-	.8byte	.LFE343-.LFB343
 	.8byte	.LFB344
 	.8byte	.LFE344-.LFB344
-	.8byte	.LFB346
-	.8byte	.LFE346-.LFB346
+	.8byte	.LFB345
+	.8byte	.LFE345-.LFB345
+	.8byte	.LFB347
+	.8byte	.LFE347-.LFB347
 	.8byte	.LFB226
 	.8byte	.LFE226-.LFB226
 	.8byte	.LFB298
@@ -53276,118 +53411,118 @@ __func__.7630:
 	.8byte	.LFE210-.LFB210
 	.8byte	.LFB211
 	.8byte	.LFE211-.LFB211
-	.8byte	.LFB347
-	.8byte	.LFE347-.LFB347
+	.8byte	.LFB348
+	.8byte	.LFE348-.LFB348
 	.8byte	0
 	.8byte	0
 	.section	.debug_ranges,"",@progbits
 .Ldebug_ranges0:
-	.8byte	.LBB164
-	.8byte	.LBE164
-	.8byte	.LBB167
-	.8byte	.LBE167
+	.8byte	.LBB166
+	.8byte	.LBE166
+	.8byte	.LBB169
+	.8byte	.LBE169
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB168
-	.8byte	.LBE168
-	.8byte	.LBB171
-	.8byte	.LBE171
+	.8byte	.LBB170
+	.8byte	.LBE170
+	.8byte	.LBB173
+	.8byte	.LBE173
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB193
-	.8byte	.LBE193
-	.8byte	.LBB197
-	.8byte	.LBE197
-	.8byte	.LBB198
-	.8byte	.LBE198
+	.8byte	.LBB195
+	.8byte	.LBE195
+	.8byte	.LBB199
+	.8byte	.LBE199
+	.8byte	.LBB200
+	.8byte	.LBE200
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB207
-	.8byte	.LBE207
-	.8byte	.LBB210
-	.8byte	.LBE210
+	.8byte	.LBB209
+	.8byte	.LBE209
+	.8byte	.LBB212
+	.8byte	.LBE212
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB215
-	.8byte	.LBE215
-	.8byte	.LBB216
-	.8byte	.LBE216
+	.8byte	.LBB219
+	.8byte	.LBE219
+	.8byte	.LBB220
+	.8byte	.LBE220
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB221
-	.8byte	.LBE221
-	.8byte	.LBB222
-	.8byte	.LBE222
+	.8byte	.LBB225
+	.8byte	.LBE225
+	.8byte	.LBB226
+	.8byte	.LBE226
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB229
-	.8byte	.LBE229
-	.8byte	.LBB231
-	.8byte	.LBE231
-	.8byte	.LBB232
-	.8byte	.LBE232
 	.8byte	.LBB233
 	.8byte	.LBE233
+	.8byte	.LBB235
+	.8byte	.LBE235
+	.8byte	.LBB236
+	.8byte	.LBE236
+	.8byte	.LBB237
+	.8byte	.LBE237
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB238
-	.8byte	.LBE238
-	.8byte	.LBB239
-	.8byte	.LBE239
+	.8byte	.LBB242
+	.8byte	.LBE242
+	.8byte	.LBB243
+	.8byte	.LBE243
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB248
-	.8byte	.LBE248
 	.8byte	.LBB252
 	.8byte	.LBE252
-	.8byte	.LBB253
-	.8byte	.LBE253
-	.8byte	0
-	.8byte	0
-	.8byte	.LBB262
-	.8byte	.LBE262
-	.8byte	.LBB263
-	.8byte	.LBE263
+	.8byte	.LBB256
+	.8byte	.LBE256
+	.8byte	.LBB257
+	.8byte	.LBE257
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB265
-	.8byte	.LBE265
+	.8byte	.LBB266
+	.8byte	.LBE266
 	.8byte	.LBB267
 	.8byte	.LBE267
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB266
-	.8byte	.LBE266
-	.8byte	.LBB268
-	.8byte	.LBE268
 	.8byte	.LBB269
 	.8byte	.LBE269
-	.8byte	.LBB270
-	.8byte	.LBE270
+	.8byte	.LBB271
+	.8byte	.LBE271
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB287
-	.8byte	.LBE287
-	.8byte	.LBB292
-	.8byte	.LBE292
+	.8byte	.LBB270
+	.8byte	.LBE270
+	.8byte	.LBB272
+	.8byte	.LBE272
+	.8byte	.LBB273
+	.8byte	.LBE273
+	.8byte	.LBB274
+	.8byte	.LBE274
 	.8byte	0
 	.8byte	0
-	.8byte	.LBB289
-	.8byte	.LBE289
-	.8byte	.LBB290
-	.8byte	.LBE290
+	.8byte	.LBB291
+	.8byte	.LBE291
+	.8byte	.LBB296
+	.8byte	.LBE296
 	.8byte	0
 	.8byte	0
+	.8byte	.LBB293
+	.8byte	.LBE293
 	.8byte	.LBB294
 	.8byte	.LBE294
-	.8byte	.LBB295
-	.8byte	.LBE295
 	.8byte	0
 	.8byte	0
-	.8byte	.LFB348
-	.8byte	.LFE348
-	.8byte	.LFB355
-	.8byte	.LFE355
+	.8byte	.LBB298
+	.8byte	.LBE298
+	.8byte	.LBB299
+	.8byte	.LBE299
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB349
+	.8byte	.LFE349
+	.8byte	.LFB356
+	.8byte	.LFE356
 	.8byte	.LFB202
 	.8byte	.LFE202
 	.8byte	.LFB203
@@ -53496,22 +53631,24 @@ __func__.7630:
 	.8byte	.LFE337
 	.8byte	.LFB338
 	.8byte	.LFE338
-	.8byte	.LFB340
-	.8byte	.LFE340
+	.8byte	.LFB339
+	.8byte	.LFE339
+	.8byte	.LFB341
+	.8byte	.LFE341
 	.8byte	.LFB230
 	.8byte	.LFE230
 	.8byte	.LFB236
 	.8byte	.LFE236
-	.8byte	.LFB341
-	.8byte	.LFE341
 	.8byte	.LFB342
 	.8byte	.LFE342
+	.8byte	.LFB343
+	.8byte	.LFE343
 	.8byte	.LFB240
 	.8byte	.LFE240
 	.8byte	.LFB209
 	.8byte	.LFE209
-	.8byte	.LFB345
-	.8byte	.LFE345
+	.8byte	.LFB346
+	.8byte	.LFE346
 	.8byte	.LFB206
 	.8byte	.LFE206
 	.8byte	.LFB225
@@ -53562,12 +53699,12 @@ __func__.7630:
 	.8byte	.LFE309
 	.8byte	.LFB310
 	.8byte	.LFE310
-	.8byte	.LFB343
-	.8byte	.LFE343
 	.8byte	.LFB344
 	.8byte	.LFE344
-	.8byte	.LFB346
-	.8byte	.LFE346
+	.8byte	.LFB345
+	.8byte	.LFE345
+	.8byte	.LFB347
+	.8byte	.LFE347
 	.8byte	.LFB226
 	.8byte	.LFE226
 	.8byte	.LFB298
@@ -53648,18 +53785,18 @@ __func__.7630:
 	.8byte	.LFE210
 	.8byte	.LFB211
 	.8byte	.LFE211
-	.8byte	.LFB347
-	.8byte	.LFE347
+	.8byte	.LFB348
+	.8byte	.LFE348
 	.8byte	0
 	.8byte	0
 	.section	.debug_line,"",@progbits
 .Ldebug_line0:
 	.section	.debug_str,"MS",@progbits,1
-.LASF727:
+.LASF728:
 	.string	"FtlEctTblFlush"
-.LASF590:
+.LASF593:
 	.string	"gc_page_num"
-.LASF606:
+.LASF609:
 	.string	"superBlk"
 .LASF499:
 	.string	"g_gc_bad_block_temp_num"
@@ -53673,9 +53810,9 @@ __func__.7630:
 	.string	"__func__"
 .LASF419:
 	.string	"c_ftl_nand_sys_blks_per_plane"
-.LASF732:
+.LASF733:
 	.string	"nSec"
-.LASF728:
+.LASF729:
 	.string	"forceFlush"
 .LASF107:
 	.string	"bootm_headers"
@@ -53685,7 +53822,7 @@ __func__.7630:
 	.string	"rd_end"
 .LASF492:
 	.string	"p_gc_blk_tbl"
-.LASF787:
+.LASF788:
 	.string	"FtlFreeSysBlkQueueOut"
 .LASF324:
 	.string	"ftl_bbt_blk_header"
@@ -53693,33 +53830,33 @@ __func__.7630:
 	.string	"eth_device"
 .LASF306:
 	.string	"sign"
-.LASF832:
+.LASF833:
 	.string	"sctidx"
-.LASF669:
+.LASF670:
 	.string	"Ftl_load_ext_data"
 .LASF96:
 	.string	"ih_comp"
-.LASF608:
+.LASF587:
 	.string	"block"
 .LASF22:
 	.string	"_Bool"
-.LASF651:
+.LASF652:
 	.string	"min_ec"
-.LASF601:
+.LASF604:
 	.string	"req_read_temp"
 .LASF279:
 	.string	"p_spare"
-.LASF685:
+.LASF686:
 	.string	"recovery_cur_page_ver"
 .LASF506:
 	.string	"g_totle_write_page_count"
 .LASF245:
 	.string	"net_root_path"
-.LASF624:
+.LASF625:
 	.string	"lookup_ppa"
-.LASF817:
+.LASF818:
 	.string	"FtlBbmTblFlush"
-.LASF610:
+.LASF612:
 	.string	"Ftl_get_new_temp_ppa"
 .LASF327:
 	.string	"ftl_data_blk_header"
@@ -53733,9 +53870,9 @@ __func__.7630:
 	.string	"des_ppa"
 .LASF237:
 	.string	"priv"
-.LASF777:
+.LASF778:
 	.string	"insert_free_list"
-.LASF880:
+.LASF882:
 	.ascii	"GNU C11 6.3.1 20170404 -ms"
 	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
 .LASF21:
@@ -53744,23 +53881,23 @@ __func__.7630:
 	.string	"UCLASS_SPI_GENERIC"
 .LASF477:
 	.string	"g_l2p_last_update_region_id"
-.LASF698:
+.LASF699:
 	.string	"ftl_sb_update_avl_pages"
 .LASF572:
 	.string	"FlashProgPages"
-.LASF856:
+.LASF857:
 	.string	"test_page_num"
-.LASF684:
+.LASF685:
 	.string	"lookup_superblock_id"
 .LASF420:
 	.string	"c_ftl_nand_init_sys_blks_per_plane"
-.LASF865:
+.LASF866:
 	.string	"FtlConstantsInit"
-.LASF593:
+.LASF596:
 	.string	"num_io"
-.LASF868:
+.LASF869:
 	.string	"FtlPrintInfo"
-.LASF744:
+.LASF745:
 	.string	"l2p_flush"
 .LASF378:
 	.string	"rear"
@@ -53772,27 +53909,27 @@ __func__.7630:
 	.string	"c_ftl_nand_page_pre_slc_blk"
 .LASF243:
 	.string	"net_nis_domain"
-.LASF764:
+.LASF765:
 	.string	"List_update_data_list"
-.LASF852:
+.LASF853:
 	.string	"create_first_buffer_superblock"
 .LASF503:
 	.string	"g_gc_merge_free_blk_threshold"
-.LASF693:
+.LASF694:
 	.string	"last_mlc_page_version"
-.LASF630:
+.LASF631:
 	.string	"IsBlkInGcList"
 .LASF235:
 	.string	"next"
 .LASF312:
 	.string	"pBlkVpcTbl"
-.LASF697:
+.LASF698:
 	.string	"FtlReUsePrevPpa"
-.LASF658:
+.LASF659:
 	.string	"update_multiplier_value"
 .LASF411:
 	.string	"c_ftl_nand_totle_phy_blks"
-.LASF874:
+.LASF875:
 	.string	"memcmp"
 .LASF421:
 	.string	"c_ftl_nand_max_sys_blks"
@@ -53808,13 +53945,13 @@ __func__.7630:
 	.string	"UCLASS_I2C_MUX"
 .LASF263:
 	.string	"uclass_id"
-.LASF598:
+.LASF601:
 	.string	"get_new_gc_superblock"
-.LASF622:
+.LASF623:
 	.string	"BOPS_EN"
 .LASF241:
 	.string	"net_netmask"
-.LASF849:
+.LASF850:
 	.string	"bad_block_cnt"
 .LASF424:
 	.string	"c_ftl_nand_max_data_blks"
@@ -53824,13 +53961,13 @@ __func__.7630:
 	.string	"fit_noffset_rd"
 .LASF192:
 	.string	"UCLASS_RTC"
-.LASF809:
+.LASF810:
 	.string	"pBbtHeader"
 .LASF46:
 	.string	"bi_memsize"
 .LASF47:
 	.string	"bi_flashstart"
-.LASF761:
+.LASF762:
 	.string	"minValidPageCount"
 .LASF232:
 	.string	"recv"
@@ -53854,7 +53991,7 @@ __func__.7630:
 	.string	"UCLASS_RKNAND"
 .LASF581:
 	.string	"die_index"
-.LASF804:
+.LASF805:
 	.string	"ver2"
 .LASF434:
 	.string	"gSysFreeQueue"
@@ -53868,6 +54005,8 @@ __func__.7630:
 	.string	"UCLASS_PCI_EMUL"
 .LASF72:
 	.string	"fdt_header"
+.LASF586:
+	.string	"ftl_free"
 .LASF429:
 	.string	"g_MaxLpn"
 .LASF342:
@@ -53880,15 +54019,15 @@ __func__.7630:
 	.string	"off_dt_struct"
 .LASF417:
 	.string	"c_ftl_nand_max_vendor_blks"
-.LASF768:
+.LASF769:
 	.string	"prev_valid_page_count"
-.LASF873:
+.LASF874:
 	.string	"FtlPrintInfo2buf"
 .LASF480:
 	.string	"p_data_block_list_head"
 .LASF265:
 	.string	"NETLOOP_CONTINUE"
-.LASF806:
+.LASF807:
 	.string	"P2V_plane"
 .LASF486:
 	.string	"g_gc_temp_superblock"
@@ -53898,7 +54037,7 @@ __func__.7630:
 	.string	"c_ftl_nand_max_map_blks"
 .LASF302:
 	.string	"BbtMap"
-.LASF743:
+.LASF744:
 	.string	"found_lpa"
 .LASF209:
 	.string	"UCLASS_VIDEO_CONSOLE"
@@ -53906,31 +54045,31 @@ __func__.7630:
 	.string	"last_refresh_read_count"
 .LASF207:
 	.string	"UCLASS_VIDEO"
-.LASF614:
+.LASF616:
 	.string	"current_ppa"
-.LASF851:
+.LASF852:
 	.string	"create_first_active_superblock"
 .LASF313:
 	.string	"pMapPpnTbl"
 .LASF269:
 	.string	"net_state"
-.LASF724:
+.LASF725:
 	.string	"num_page"
 .LASF425:
 	.string	"ftl_gc_temp_power_lost_recovery_flag"
-.LASF613:
+.LASF615:
 	.string	"totle_num"
-.LASF731:
+.LASF732:
 	.string	"Index"
-.LASF681:
+.LASF682:
 	.string	"next_free_active_page"
-.LASF604:
+.LASF607:
 	.string	"spperBlk"
 .LASF65:
 	.string	"IRQ_STACK_START"
 .LASF132:
 	.string	"verify"
-.LASF713:
+.LASF714:
 	.string	"ftl_set_blk_mode"
 .LASF266:
 	.string	"NETLOOP_RESTART"
@@ -53938,11 +54077,11 @@ __func__.7630:
 	.string	"uint8"
 .LASF353:
 	.string	"write_page_count"
-.LASF609:
+.LASF611:
 	.string	"Ftl_gc_temp_data_write_back"
 .LASF295:
 	.string	"erase_blk"
-.LASF722:
+.LASF723:
 	.string	"re_save_vpndata"
 .LASF463:
 	.string	"p_valid_page_count_check_table"
@@ -53952,13 +54091,13 @@ __func__.7630:
 	.string	"g_num_free_superblocks"
 .LASF226:
 	.string	"s_addr"
-.LASF819:
+.LASF820:
 	.string	"re_save_bbmdata"
 .LASF200:
 	.string	"UCLASS_SYSRESET"
-.LASF627:
+.LASF628:
 	.string	"FtlGcUpdatePage"
-.LASF811:
+.LASF812:
 	.string	"FtlLoadFactoryBbt"
 .LASF289:
 	.string	"sec_per_blk"
@@ -53972,11 +54111,11 @@ __func__.7630:
 	.string	"UCLASS_CROS_EC"
 .LASF407:
 	.string	"c_ftl_nand_sec_pre_page_shift"
-.LASF788:
+.LASF789:
 	.string	"IsInFreeQueue"
 .LASF236:
 	.string	"index"
-.LASF745:
+.LASF746:
 	.string	"select_l2p_ram_region"
 .LASF335:
 	.string	"maxDieNum"
@@ -53990,17 +54129,17 @@ __func__.7630:
 	.string	"block_size"
 .LASF90:
 	.string	"ih_load"
-.LASF835:
+.LASF836:
 	.string	"FtlProgPages"
-.LASF664:
+.LASF665:
 	.string	"error_flag"
 .LASF403:
 	.string	"c_ftl_nand_page_pre_blk"
-.LASF794:
+.LASF795:
 	.string	"blk_Id"
 .LASF213:
 	.string	"UCLASS_KEY"
-.LASF875:
+.LASF876:
 	.string	"memcpy"
 .LASF67:
 	.string	"_datarel_start_ofs"
@@ -54022,7 +54161,7 @@ __func__.7630:
 	.string	"g_gc_page_offset"
 .LASF240:
 	.string	"net_gateway"
-.LASF802:
+.LASF803:
 	.string	"ftl_cmp_data_ver"
 .LASF430:
 	.string	"g_VaildLpn"
@@ -54034,41 +54173,41 @@ __func__.7630:
 	.string	"type"
 .LASF40:
 	.string	"lmb_region"
-.LASF632:
+.LASF633:
 	.string	"numREQ"
 .LASF34:
 	.string	"protect"
-.LASF855:
+.LASF856:
 	.string	"max_test_page_num"
-.LASF704:
+.LASF705:
 	.string	"blk_id"
 .LASF349:
 	.string	"GlobalDataVersion"
-.LASF793:
+.LASF794:
 	.string	"erase_flag"
 .LASF362:
 	.string	"last_refresh_data_times"
-.LASF707:
+.LASF708:
 	.string	"totleBlkNum"
-.LASF678:
+.LASF679:
 	.string	"saved_active_page"
-.LASF776:
+.LASF777:
 	.string	"pTmp"
-.LASF602:
+.LASF605:
 	.string	"add_count"
 .LASF547:
 	.string	"ftl_gc_temp_block_bops_scan_page_addr"
 .LASF394:
 	.string	"c_ftl_nand_type"
-.LASF773:
+.LASF774:
 	.string	"pHead"
-.LASF687:
+.LASF688:
 	.string	"recovery_flash_mode"
 .LASF138:
 	.string	"UCLASS_TEST"
 .LASF485:
 	.string	"g_buffer_superblock"
-.LASF649:
+.LASF650:
 	.string	"node_id"
 .LASF397:
 	.string	"c_ftl_nand_blks_per_die"
@@ -54090,9 +54229,9 @@ __func__.7630:
 	.string	"sector_count"
 .LASF406:
 	.string	"c_ftl_nand_sec_pre_page"
-.LASF588:
+.LASF591:
 	.string	"mode"
-.LASF813:
+.LASF814:
 	.string	"FtlLoadBbt"
 .LASF561:
 	.string	"pvForm"
@@ -54100,9 +54239,9 @@ __func__.7630:
 	.string	"padding"
 .LASF460:
 	.string	"p_swl_mul_table"
-.LASF628:
+.LASF629:
 	.string	"src_ppa"
-.LASF682:
+.LASF683:
 	.string	"detected_active_page"
 .LASF389:
 	.string	"ftl_gc_page_item"
@@ -54114,61 +54253,61 @@ __func__.7630:
 	.string	"bi_ethspeed"
 .LASF98:
 	.string	"image_header_t"
-.LASF770:
+.LASF771:
 	.string	"pPrev"
 .LASF474:
 	.string	"g_totle_vendor_block"
-.LASF623:
+.LASF624:
 	.string	"superblock_id"
-.LASF592:
+.LASF595:
 	.string	"plane"
 .LASF11:
 	.string	"phys_addr_t"
 .LASF95:
 	.string	"ih_type"
-.LASF845:
+.LASF846:
 	.string	"sftl_init"
 .LASF2:
 	.string	"unsigned char"
-.LASF611:
+.LASF613:
 	.string	"FtlGcScanTempBlk"
 .LASF109:
 	.string	"legacy_hdr_os_copy"
-.LASF760:
+.LASF761:
 	.string	"vpcTbl"
 .LASF176:
 	.string	"UCLASS_PANEL_BACKLIGHT"
 .LASF339:
 	.string	"activeSuperblockId"
-.LASF803:
+.LASF804:
 	.string	"ver1"
 .LASF280:
 	.string	"nand_phy_info"
-.LASF759:
+.LASF760:
 	.string	"ftl_free_no_use_map_blk"
-.LASF805:
+.LASF806:
 	.string	"P2V_block_in_plane"
 .LASF556:
 	.string	"str1"
 .LASF557:
 	.string	"str2"
-.LASF718:
+.LASF719:
 	.string	"pMapHeader"
 .LASF140:
 	.string	"UCLASS_TEST_BUS"
-.LASF716:
+.LASF717:
 	.string	"FtlScanSysBlk"
 .LASF52:
 	.string	"bi_arm_freq"
-.LASF695:
+.LASF696:
 	.string	"lookup_ppa_ver"
-.LASF752:
+.LASF753:
 	.string	"region_num"
 .LASF476:
 	.string	"p_l2p_map_buf"
 .LASF488:
 	.string	"gp_last_act_superblock"
-.LASF870:
+.LASF871:
 	.string	"Ftl_log2"
 .LASF448:
 	.string	"p_sys_spare_buf"
@@ -54176,7 +54315,7 @@ __func__.7630:
 	.string	"UCLASS_LED"
 .LASF552:
 	.string	"p_current"
-.LASF646:
+.LASF647:
 	.string	"get_new_id"
 .LASF253:
 	.string	"net_rx_packet_len"
@@ -54184,11 +54323,11 @@ __func__.7630:
 	.string	"net_null_ethaddr"
 .LASF543:
 	.string	"g_ect_tbl_power_up_flush"
-.LASF594:
+.LASF597:
 	.string	"physical_block"
 .LASF32:
 	.string	"flash_id"
-.LASF838:
+.LASF839:
 	.string	"absolute_sector"
 .LASF222:
 	.string	"load_addr"
@@ -54196,31 +54335,33 @@ __func__.7630:
 	.string	"PowerLostTimes"
 .LASF501:
 	.string	"g_gc_bad_block_temp_tbl"
+.LASF886:
+	.string	"kfree"
 .LASF464:
 	.string	"p_blk_mode_table"
-.LASF775:
+.LASF776:
 	.string	"List_remove_node"
 .LASF291:
 	.string	"reserved_blk"
-.LASF733:
+.LASF734:
 	.string	"pBuf"
-.LASF791:
+.LASF792:
 	.string	"tmp_ec"
 .LASF484:
 	.string	"g_active_superblock"
-.LASF689:
+.LASF690:
 	.string	"recovery_super_page"
 .LASF437:
 	.string	"req_sys"
 .LASF381:
 	.string	"available_pages"
-.LASF799:
+.LASF800:
 	.string	"high"
-.LASF833:
+.LASF834:
 	.string	"nscts"
 .LASF410:
 	.string	"c_ftl_nand_reserved_blks"
-.LASF700:
+.LASF701:
 	.string	"FtlL2PDataInit"
 .LASF230:
 	.string	"init"
@@ -54230,9 +54371,9 @@ __func__.7630:
 	.string	"check"
 .LASF145:
 	.string	"UCLASS_USB_EMUL"
-.LASF797:
+.LASF798:
 	.string	"FtlFreeSysBlkQueueInit"
-.LASF677:
+.LASF678:
 	.string	"FtlRecoverySuperblock"
 .LASF396:
 	.string	"c_ftl_nand_planes_per_die"
@@ -54242,17 +54383,17 @@ __func__.7630:
 	.string	"ecc_bits"
 .LASF293:
 	.string	"nand_ops"
-.LASF599:
+.LASF602:
 	.string	"tmp_blk"
 .LASF523:
 	.string	"g_gc_head_data_block"
-.LASF828:
+.LASF829:
 	.string	"FtlWrite"
 .LASF182:
 	.string	"UCLASS_PINCTRL"
-.LASF831:
+.LASF832:
 	.string	"num_lpa"
-.LASF867:
+.LASF868:
 	.string	"blkNum"
 .LASF364:
 	.string	"SlcPartLbaEndSector"
@@ -54268,11 +54409,11 @@ __func__.7630:
 	.string	"image_len"
 .LASF441:
 	.string	"req_gc"
-.LASF854:
+.LASF855:
 	.string	"is_sys_blk"
 .LASF42:
 	.string	"memory"
-.LASF821:
+.LASF822:
 	.string	"bitmap"
 .LASF319:
 	.string	"ftl_ect_tbl_info"
@@ -54280,41 +54421,41 @@ __func__.7630:
 	.string	"UCLASS_USB_DEV_GENERIC"
 .LASF212:
 	.string	"UCLASS_FG"
-.LASF755:
+.LASF756:
 	.string	"lastMapBlk"
 .LASF370:
 	.string	"totle_write_sector"
 .LASF522:
 	.string	"g_ftl_nand_free_count"
-.LASF626:
+.LASF627:
 	.string	"p_gc_page"
 .LASF20:
 	.string	"errno"
 .LASF532:
 	.string	"gNandPhyInfo"
-.LASF861:
+.LASF862:
 	.string	"ven_blk"
 .LASF30:
 	.string	"size"
 .LASF244:
 	.string	"net_hostname"
-.LASF772:
+.LASF773:
 	.string	"List_pop_head_node"
 .LASF308:
 	.string	"BlkNum"
-.LASF850:
+.LASF851:
 	.string	"sys_bad_block_cnt"
-.LASF596:
+.LASF599:
 	.string	"p_dataHeader"
-.LASF780:
+.LASF781:
 	.string	"tmp_id"
-.LASF600:
+.LASF603:
 	.string	"FtlReadRefresh"
-.LASF645:
+.LASF646:
 	.string	"free_blk_index"
-.LASF820:
+.LASF821:
 	.string	"FtlBbt2Bitmap"
-.LASF662:
+.LASF663:
 	.string	"ftl_check_vpc"
 .LASF108:
 	.string	"legacy_hdr_os"
@@ -54352,13 +54493,13 @@ __func__.7630:
 	.string	"gcTempSuperblockId"
 .LASF238:
 	.string	"eth_current"
-.LASF766:
+.LASF767:
 	.string	"node_valid_page_count"
 .LASF53:
 	.string	"bi_dsp_freq"
 .LASF5:
 	.string	"uchar"
-.LASF668:
+.LASF669:
 	.string	"pages"
 .LASF89:
 	.string	"ih_size"
@@ -54366,13 +54507,13 @@ __func__.7630:
 	.string	"addr"
 .LASF142:
 	.string	"UCLASS_SPI_EMUL"
-.LASF863:
+.LASF864:
 	.string	"FtlMemInit"
-.LASF818:
+.LASF819:
 	.string	"write_count"
-.LASF663:
+.LASF664:
 	.string	"prev_ppa"
-.LASF586:
+.LASF589:
 	.string	"FlashTestBlk"
 .LASF179:
 	.string	"UCLASS_PCI_GENERIC"
@@ -54380,13 +54521,13 @@ __func__.7630:
 	.string	"bi_sramstart"
 .LASF66:
 	.string	"FIQ_STACK_START"
-.LASF872:
+.LASF873:
 	.string	"rknand_proc_ftlread"
 .LASF228:
 	.string	"enetaddr"
 .LASF181:
 	.string	"UCLASS_PINCONFIG"
-.LASF741:
+.LASF742:
 	.string	"l2p_region_id"
 .LASF554:
 	.string	"check_buf"
@@ -54402,7 +54543,7 @@ __func__.7630:
 	.string	"slc_erase_count"
 .LASF60:
 	.string	"bi_busfreq"
-.LASF769:
+.LASF770:
 	.string	"prev_multiplier_value"
 .LASF497:
 	.string	"g_gc_next_blk"
@@ -54412,15 +54553,15 @@ __func__.7630:
 	.string	"UCLASS_BLK"
 .LASF546:
 	.string	"gc_discard_updated"
-.LASF737:
+.LASF738:
 	.string	"FtlVendorPartWrite"
-.LASF621:
+.LASF622:
 	.string	"FtlGcFreeTempBlock"
 .LASF248:
 	.string	"net_ip"
 .LASF229:
 	.string	"iobase"
-.LASF657:
+.LASF658:
 	.string	"GetFreeBlockMinEraseCount"
 .LASF336:
 	.string	"activeFlashMode"
@@ -54428,13 +54569,13 @@ __func__.7630:
 	.string	"ih_dcrc"
 .LASF35:
 	.string	"flash_info_t"
-.LASF655:
+.LASF656:
 	.string	"GetFreeBlockMaxEraseCount"
-.LASF711:
+.LASF712:
 	.string	"sblk"
-.LASF754:
+.LASF755:
 	.string	"ftl_map_blk_gc"
-.LASF877:
+.LASF878:
 	.string	"printf"
 .LASF59:
 	.string	"bi_intfreq"
@@ -54458,23 +54599,23 @@ __func__.7630:
 	.string	"TotleReadBufferMatchCount"
 .LASF438:
 	.string	"req_read"
-.LASF751:
+.LASF752:
 	.string	"Ftl_write_map_blk_to_last_page"
 .LASF466:
 	.string	"p_map_block_valid_page_count"
 .LASF167:
 	.string	"UCLASS_MAILBOX"
-.LASF792:
+.LASF793:
 	.string	"FtlFreeSysBlkQueueIn"
 .LASF366:
 	.string	"readErrorCount"
-.LASF585:
+.LASF588:
 	.string	"sftl_gc"
-.LASF796:
+.LASF797:
 	.string	"FtlFreeSysBlkQueueEmpty"
-.LASF762:
+.LASF763:
 	.string	"load_l2p_region"
-.LASF639:
+.LASF640:
 	.string	"p_superblock"
 .LASF301:
 	.string	"fBbtBlk"
@@ -54482,7 +54623,7 @@ __func__.7630:
 	.string	"off_mem_rsvmap"
 .LASF445:
 	.string	"p_sys_data_buf"
-.LASF883:
+.LASF885:
 	.string	"l2p_addr_tran"
 .LASF164:
 	.string	"UCLASS_KEYBOARD"
@@ -54490,19 +54631,19 @@ __func__.7630:
 	.string	"page_per_slc_blk"
 .LASF398:
 	.string	"c_ftl_nand_blks_per_die_shift"
-.LASF738:
+.LASF739:
 	.string	"log2phys"
 .LASF478:
 	.string	"p_data_block_list_table"
 .LASF171:
 	.string	"UCLASS_MOD_EXP"
-.LASF644:
+.LASF645:
 	.string	"num_bad_block"
 .LASF85:
 	.string	"image_header"
-.LASF701:
+.LASF702:
 	.string	"FtlLoadVonderInfo"
-.LASF612:
+.LASF614:
 	.string	"pSuperblock"
 .LASF535:
 	.string	"ftl_temp_buf"
@@ -54514,7 +54655,7 @@ __func__.7630:
 	.string	"last_comp_version"
 .LASF415:
 	.string	"c_ftl_nand_map_blks_per_plane"
-.LASF810:
+.LASF811:
 	.string	"re_try_next_blk"
 .LASF56:
 	.string	"bi_ip_addr"
@@ -54526,25 +54667,23 @@ __func__.7630:
 	.string	"g_gc_cur_blk_max_valid_pages"
 .LASF16:
 	.string	"ushort"
-.LASF763:
+.LASF764:
 	.string	"phyAddr"
 .LASF73:
 	.string	"magic"
-.LASF790:
+.LASF791:
 	.string	"tmp_blk_id"
-.LASF876:
+.LASF877:
 	.string	"memset"
 .LASF242:
 	.string	"net_dns_server"
 .LASF562:
 	.string	"ftl_memset"
-.LASF830:
+.LASF831:
 	.string	"end_lpa"
-.LASF882:
-	.string	"/home/ldq/rk-linux/u-boot-debug"
-.LASF735:
+.LASF736:
 	.string	"result"
-.LASF625:
+.LASF626:
 	.string	"scan_page_num"
 .LASF267:
 	.string	"NETLOOP_SUCCESS"
@@ -54552,9 +54691,9 @@ __func__.7630:
 	.string	"name"
 .LASF512:
 	.string	"g_totle_cache_write_count"
-.LASF767:
+.LASF768:
 	.string	"node_multiplier_value"
-.LASF758:
+.LASF759:
 	.string	"blk_index"
 .LASF69:
 	.string	"_datarellocal_start_ofs"
@@ -54566,17 +54705,17 @@ __func__.7630:
 	.string	"fit_hdr_setup"
 .LASF150:
 	.string	"UCLASS_CLK"
-.LASF686:
+.LASF687:
 	.string	"detected_error_page"
 .LASF129:
 	.string	"initrd_end"
-.LASF618:
+.LASF620:
 	.string	"read_super_page"
 .LASF219:
 	.string	"monitor_flash_len"
-.LASF620:
+.LASF621:
 	.string	"FtlGcPageVarInit"
-.LASF822:
+.LASF823:
 	.string	"FtlBbtInfoPrint"
 .LASF530:
 	.string	"c_mlc_erase_count_value"
@@ -54584,13 +54723,13 @@ __func__.7630:
 	.string	"mem_malloc_brk"
 .LASF483:
 	.string	"g_num_data_superblocks"
-.LASF753:
+.LASF754:
 	.string	"blkTbl"
 .LASF348:
 	.string	"mlc_erase_count"
 .LASF12:
 	.string	"phys_size_t"
-.LASF715:
+.LASF716:
 	.string	"FtlLoadEctTbl"
 .LASF62:
 	.string	"bi_boot_params"
@@ -54598,11 +54737,11 @@ __func__.7630:
 	.string	"UCLASS_RC"
 .LASF51:
 	.string	"bi_sramsize"
-.LASF879:
+.LASF881:
 	.string	"sprintf"
-.LASF605:
+.LASF608:
 	.string	"FtlGcMarkBadPhyBlk"
-.LASF641:
+.LASF642:
 	.string	"allocate_new_data_superblock"
 .LASF13:
 	.string	"sizetype"
@@ -54614,9 +54753,9 @@ __func__.7630:
 	.string	"GlobalSysVersion"
 .LASF329:
 	.string	"ftl_map_blk_header"
-.LASF597:
+.LASF600:
 	.string	"gc_next_superblock"
-.LASF812:
+.LASF813:
 	.string	"blkAddr"
 .LASF193:
 	.string	"UCLASS_SCSI"
@@ -54626,15 +54765,15 @@ __func__.7630:
 	.string	"signed char"
 .LASF250:
 	.string	"net_tx_packet"
-.LASF696:
+.LASF697:
 	.string	"current_ppa_ver"
-.LASF784:
+.LASF785:
 	.string	"tmp_multiplier_value"
 .LASF566:
 	.string	"FlashEraseBlocks"
 .LASF33:
 	.string	"start"
-.LASF829:
+.LASF830:
 	.string	"start_lpa"
 .LASF553:
 	.string	"current"
@@ -54658,31 +54797,31 @@ __func__.7630:
 	.string	"TotleReadBufferCount3"
 .LASF455:
 	.string	"c_gc_page_buf_num"
-.LASF719:
+.LASF720:
 	.string	"FtlVpcTblFlush"
 .LASF189:
 	.string	"UCLASS_REMOTEPROC"
-.LASF742:
+.LASF743:
 	.string	"lpn_index"
 .LASF118:
 	.string	"fit_hdr_fdt"
-.LASF631:
+.LASF632:
 	.string	"FtlGcBufAlloc"
 .LASF569:
 	.string	"num_req"
-.LASF778:
+.LASF779:
 	.string	"node_erase_count"
 .LASF254:
 	.string	"net_bcast_ethaddr"
-.LASF736:
+.LASF737:
 	.string	"ppn_index"
-.LASF795:
+.LASF796:
 	.string	"FtlFreeSysBlkQueueFull"
 .LASF133:
 	.string	"state"
 .LASF48:
 	.string	"bi_flashsize"
-.LASF746:
+.LASF747:
 	.string	"target_region"
 .LASF19:
 	.string	"__be32"
@@ -54692,7 +54831,7 @@ __func__.7630:
 	.string	"c_ftl_vendor_part_size"
 .LASF251:
 	.string	"net_rx_packets"
-.LASF826:
+.LASF827:
 	.string	"sftl_read"
 .LASF452:
 	.string	"p_gc_spare_buf"
@@ -54708,15 +54847,15 @@ __func__.7630:
 	.string	"p_io_data_buf_1"
 .LASF68:
 	.string	"_datarelrolocal_start_ofs"
-.LASF683:
+.LASF684:
 	.string	"mlc_detected_active_page"
-.LASF853:
+.LASF854:
 	.string	"FtlLowFormatEraseBlock"
 .LASF317:
 	.string	"region_id"
 .LASF326:
 	.string	"sysBlksPerPlane"
-.LASF816:
+.LASF817:
 	.string	"FtlBbtMemInit"
 .LASF309:
 	.string	"maxBlkNum"
@@ -54724,7 +54863,7 @@ __func__.7630:
 	.string	"c_ftl_nand_die_num"
 .LASF286:
 	.string	"page_per_blk"
-.LASF721:
+.LASF722:
 	.string	"prog_error_count"
 .LASF372:
 	.string	"progErrorCount"
@@ -54734,7 +54873,7 @@ __func__.7630:
 	.string	"g_gc_cur_blk_valid_pages"
 .LASF233:
 	.string	"halt"
-.LASF653:
+.LASF654:
 	.string	"maxFreeBlockEraseCount"
 .LASF86:
 	.string	"ih_magic"
@@ -54742,7 +54881,7 @@ __func__.7630:
 	.string	"block_in_die"
 .LASF457:
 	.string	"gp_ect_tbl_info"
-.LASF654:
+.LASF655:
 	.string	"minDataBlockEraseCount"
 .LASF17:
 	.string	"ulong"
@@ -54754,25 +54893,25 @@ __func__.7630:
 	.string	"__u32"
 .LASF249:
 	.string	"net_server_ip"
-.LASF785:
+.LASF786:
 	.string	"INSERT_DATA_LIST"
 .LASF206:
 	.string	"UCLASS_USB_HUB"
-.LASF825:
+.LASF826:
 	.string	"sftl_write"
 .LASF444:
 	.string	"p_plane_order_table"
-.LASF781:
+.LASF782:
 	.string	"insert_data_list"
 .LASF70:
 	.string	"_datarelro_start_ofs"
-.LASF617:
+.LASF619:
 	.string	"ReInit"
 .LASF172:
 	.string	"UCLASS_MTD"
 .LASF134:
 	.string	"bootm_headers_t"
-.LASF729:
+.LASF730:
 	.string	"ec_mod_count"
 .LASF565:
 	.string	"spare"
@@ -54780,13 +54919,13 @@ __func__.7630:
 	.string	"g_recovery_page_num"
 .LASF15:
 	.string	"long int"
-.LASF667:
+.LASF668:
 	.string	"req_temp"
 .LASF141:
 	.string	"UCLASS_TEST_PROBE"
-.LASF881:
+.LASF883:
 	.string	"drivers/rkflash/rksftl/rk_sftl.c"
-.LASF659:
+.LASF660:
 	.string	"FtlSysBlkInit"
 .LASF524:
 	.string	"g_gc_head_data_block_count"
@@ -54802,9 +54941,9 @@ __func__.7630:
 	.string	"g_GlobalSysVersion"
 .LASF511:
 	.string	"g_tmp_data_superblock_id"
-.LASF871:
+.LASF872:
 	.string	"limit"
-.LASF660:
+.LASF661:
 	.string	"ftl_scan_all_data"
 .LASF331:
 	.string	"ftl_sys_blk_header"
@@ -54812,43 +54951,43 @@ __func__.7630:
 	.string	"flag"
 .LASF470:
 	.string	"p_vendor_block_table"
-.LASF679:
+.LASF680:
 	.string	"saved_active_plane"
-.LASF747:
+.LASF748:
 	.string	"hit_count"
-.LASF714:
+.LASF715:
 	.string	"FtlGcReFreshBadBlk"
 .LASF380:
 	.string	"current_page"
 .LASF201:
 	.string	"UCLASS_THERMAL"
-.LASF814:
+.LASF815:
 	.string	"FtlBbtCalcTotleCnt"
-.LASF786:
+.LASF787:
 	.string	"INSERT_FREE_LIST"
 .LASF563:
 	.string	"FlashGetBadBlockList"
-.LASF694:
+.LASF695:
 	.string	"prev_ppa_ver"
 .LASF246:
 	.string	"net_ethaddr"
 .LASF225:
 	.string	"in_addr"
-.LASF844:
+.LASF845:
 	.string	"FtlSysFlush"
 .LASF99:
 	.string	"image_info"
 .LASF88:
 	.string	"ih_time"
-.LASF607:
+.LASF610:
 	.string	"FtlGcRefreshBlock"
 .LASF334:
 	.string	"ftl_sys_save_info"
-.LASF771:
+.LASF772:
 	.string	"List_get_gc_head_node"
 .LASF399:
 	.string	"c_ftl_nand_planes_num"
-.LASF808:
+.LASF809:
 	.string	"FtlMakeBbt"
 .LASF37:
 	.string	"long double"
@@ -54860,13 +54999,13 @@ __func__.7630:
 	.string	"size_dt_strings"
 .LASF271:
 	.string	"uint16"
-.LASF603:
+.LASF606:
 	.string	"FtlGcFreeBadSuperBlk"
 .LASF106:
 	.string	"image_info_t"
-.LASF703:
+.LASF704:
 	.string	"pMapBlockInfo"
-.LASF616:
+.LASF618:
 	.string	"error_phy_page"
 .LASF3:
 	.string	"long unsigned int"
@@ -54886,15 +55025,15 @@ __func__.7630:
 	.string	"net_server_ethaddr"
 .LASF208:
 	.string	"UCLASS_VIDEO_BRIDGE"
-.LASF691:
+.LASF692:
 	.string	"function_exit"
 .LASF135:
 	.string	"images"
 .LASF525:
 	.string	"g_gc_skip_write_count"
-.LASF619:
+.LASF585:
 	.string	"rknand_print_hex"
-.LASF635:
+.LASF636:
 	.string	"FtlGcBufInit"
 .LASF446:
 	.string	"p_sys_data_buf_1"
@@ -54906,9 +55045,9 @@ __func__.7630:
 	.string	"fit_uname_os"
 .LASF500:
 	.string	"g_gc_bad_block_gc_index"
-.LASF692:
+.LASF693:
 	.string	"last_page_version"
-.LASF801:
+.LASF802:
 	.string	"pagePreBlk"
 .LASF281:
 	.string	"nand_type"
@@ -54924,7 +55063,7 @@ __func__.7630:
 	.string	"table"
 .LASF299:
 	.string	"page"
-.LASF642:
+.LASF643:
 	.string	"allocate_data_superblock"
 .LASF316:
 	.string	"ftl_l2p_ram_map_info"
@@ -54934,17 +55073,17 @@ __func__.7630:
 	.string	"net_loop_state"
 .LASF433:
 	.string	"gSysInfo"
-.LASF629:
+.LASF630:
 	.string	"prev_superblock_id"
 .LASF196:
 	.string	"UCLASS_SPMI"
-.LASF756:
+.LASF757:
 	.string	"minValidPageIndex"
-.LASF841:
+.LASF842:
 	.string	"last_lpa_nscts"
 .LASF194:
 	.string	"UCLASS_SERIAL"
-.LASF709:
+.LASF710:
 	.string	"FtlLoadSysInfo"
 .LASF440:
 	.string	"req_erase"
@@ -54956,25 +55095,25 @@ __func__.7630:
 	.string	"UCLASS_PHY"
 .LASF54:
 	.string	"bi_ddr_freq"
-.LASF858:
+.LASF859:
 	.string	"test_mode"
-.LASF827:
+.LASF828:
 	.string	"FtlDiscard"
-.LASF670:
+.LASF671:
 	.string	"FtlGcPageRecovery"
 .LASF105:
 	.string	"arch"
 .LASF510:
 	.string	"g_totle_read_page_count"
-.LASF710:
+.LASF711:
 	.string	"ftl_get_blk_mode"
-.LASF740:
+.LASF741:
 	.string	"ram_region_id"
 .LASF435:
 	.string	"gL2pMapInfo"
 .LASF322:
 	.string	"lastEc"
-.LASF842:
+.LASF843:
 	.string	"sector"
 .LASF558:
 	.string	"ftl_memcmp"
@@ -54982,27 +55121,27 @@ __func__.7630:
 	.string	"p_map_region_ppn_table"
 .LASF120:
 	.string	"fit_noffset_fdt"
-.LASF866:
+.LASF867:
 	.string	"FtlSysBlkNumInit"
-.LASF671:
+.LASF672:
 	.string	"Ftl_save_ext_data"
 .LASF116:
 	.string	"fit_uname_rd"
-.LASF648:
+.LASF649:
 	.string	"GetSwlReplaceBlock"
 .LASF359:
 	.string	"max_erase_count"
 .LASF475:
 	.string	"p_l2p_ram_map"
-.LASF633:
+.LASF634:
 	.string	"req_num"
 .LASF115:
 	.string	"fit_hdr_rd"
 .LASF268:
 	.string	"NETLOOP_FAIL"
-.LASF823:
+.LASF824:
 	.string	"FtlBbmIsBadBlock"
-.LASF666:
+.LASF667:
 	.string	"FtlSuperblockPowerLostFix"
 .LASF157:
 	.string	"UCLASS_FIRMWARE"
@@ -55026,7 +55165,7 @@ __func__.7630:
 	.string	"UCLASS_NORTHBRIDGE"
 .LASF422:
 	.string	"c_ftl_nand_data_blks_per_plane"
-.LASF615:
+.LASF617:
 	.string	"page_count"
 .LASF298:
 	.string	"ftl_bbt_info"
@@ -55036,7 +55175,7 @@ __func__.7630:
 	.string	"send"
 .LASF531:
 	.string	"g_power_lost_recovery_flag"
-.LASF589:
+.LASF592:
 	.string	"numPages"
 .LASF447:
 	.string	"p_vendor_data_buf"
@@ -55044,21 +55183,21 @@ __func__.7630:
 	.string	"read_page_count"
 .LASF234:
 	.string	"write_hwaddr"
-.LASF725:
+.LASF726:
 	.string	"FtlMapBlkWriteDump_data"
-.LASF834:
+.LASF835:
 	.string	"FtlCacheWriteBack"
-.LASF699:
+.LASF700:
 	.string	"FtlLoadMapInfo"
-.LASF807:
+.LASF808:
 	.string	"V2P_block"
-.LASF720:
+.LASF721:
 	.string	"pSysHeader"
-.LASF672:
+.LASF673:
 	.string	"SupperBlkListInit"
-.LASF706:
+.LASF707:
 	.string	"ppnTbl"
-.LASF846:
+.LASF847:
 	.string	"pNand"
 .LASF559:
 	.string	"ftl_memcpy"
@@ -55068,13 +55207,15 @@ __func__.7630:
 	.string	"g_totle_gc_page_count"
 .LASF24:
 	.string	"_binary_u_boot_bin_start"
-.LASF673:
+.LASF674:
 	.string	"num_data_node"
 .LASF400:
 	.string	"c_ftl_nand_blk_pre_plane"
+.LASF884:
+	.string	"/home/ldq/rk-linux/u-boot-release"
 .LASF64:
 	.string	"bd_t"
-.LASF705:
+.LASF706:
 	.string	"lastWritePage"
 .LASF91:
 	.string	"ih_ep"
@@ -55084,7 +55225,7 @@ __func__.7630:
 	.string	"fit_uname_fdt"
 .LASF187:
 	.string	"UCLASS_RAM"
-.LASF674:
+.LASF675:
 	.string	"num_free_node"
 .LASF379:
 	.string	"ftl_superblock_info"
@@ -55100,35 +55241,35 @@ __func__.7630:
 	.string	"UCLASS_INVALID"
 .LASF443:
 	.string	"g_req_cache"
-.LASF591:
+.LASF594:
 	.string	"gc_blk"
 .LASF277:
 	.string	"page_addr"
-.LASF864:
+.LASF865:
 	.string	"mem_size"
-.LASF857:
+.LASF858:
 	.string	"test_page_step"
-.LASF688:
+.LASF689:
 	.string	"read_super_page_end"
 .LASF368:
 	.string	"refresh_enable_mode"
-.LASF847:
+.LASF848:
 	.string	"load_bbt"
-.LASF860:
+.LASF861:
 	.string	"IsBlkInVendorPart"
 .LASF402:
 	.string	"c_ftl_nand_bbm_buf_size"
-.LASF782:
+.LASF783:
 	.string	"node_data_count"
 .LASF583:
 	.string	"width"
 .LASF39:
 	.string	"base"
-.LASF884:
+.LASF887:
 	.string	"sftl_get_density"
-.LASF839:
+.LASF840:
 	.string	"first_lpa_sctidx"
-.LASF587:
+.LASF590:
 	.string	"rk_ftl_garbage_collect"
 .LASF328:
 	.string	"lastPpa"
@@ -55136,11 +55277,11 @@ __func__.7630:
 	.string	"fit_uname_cfg"
 .LASF344:
 	.string	"gcTempPageOffset"
-.LASF636:
+.LASF637:
 	.string	"decrement_vpc_count"
 .LASF386:
 	.string	"dump_writed"
-.LASF748:
+.LASF749:
 	.string	"flush_l2p_region"
 .LASF130:
 	.string	"cmdline_start"
@@ -55160,9 +55301,9 @@ __func__.7630:
 	.string	"long long unsigned int"
 .LASF274:
 	.string	"int16"
-.LASF848:
+.LASF849:
 	.string	"ftl_low_format"
-.LASF734:
+.LASF735:
 	.string	"offset"
 .LASF504:
 	.string	"g_gc_blk_index"
@@ -55170,15 +55311,15 @@ __func__.7630:
 	.string	"req_prgm"
 .LASF436:
 	.string	"gVendorBlkInfo"
-.LASF676:
+.LASF677:
 	.string	"FtlPowerLostRecovery"
 .LASF462:
 	.string	"p_valid_page_count_table"
-.LASF702:
+.LASF703:
 	.string	"FtlMapTblRecovery"
 .LASF156:
 	.string	"UCLASS_GPIO"
-.LASF869:
+.LASF870:
 	.string	"debug_flag"
 .LASF498:
 	.string	"g_gc_next_blk_1"
@@ -55186,19 +55327,19 @@ __func__.7630:
 	.string	"off_dt_strings"
 .LASF376:
 	.string	"sys_blk_queue"
-.LASF647:
+.LASF648:
 	.string	"free_data_superblock"
-.LASF859:
+.LASF860:
 	.string	"re_test_next_page"
 .LASF61:
 	.string	"bi_arch_number"
-.LASF749:
+.LASF750:
 	.string	"FtlMapWritePage"
-.LASF783:
+.LASF784:
 	.string	"tmp_data_count"
 .LASF26:
 	.string	"ide_bus_offset"
-.LASF739:
+.LASF740:
 	.string	"action"
 .LASF408:
 	.string	"c_ftl_nand_byte_pre_page"
@@ -55206,11 +55347,11 @@ __func__.7630:
 	.string	"UCLASS_COUNT"
 .LASF174:
 	.string	"UCLASS_NVME"
-.LASF643:
+.LASF644:
 	.string	"new_id"
 .LASF345:
 	.string	"cache_write_count"
-.LASF640:
+.LASF641:
 	.string	"new_ppa"
 .LASF258:
 	.string	"net_restart_wrap"
@@ -55240,19 +55381,19 @@ __func__.7630:
 	.string	"g_nand_ops"
 .LASF584:
 	.string	"ftl_malloc"
-.LASF840:
+.LASF841:
 	.string	"first_lpa_nscts"
 .LASF183:
 	.string	"UCLASS_PMIC"
 .LASF318:
 	.string	"L2PMap"
-.LASF765:
+.LASF766:
 	.string	"prev_node_id"
 .LASF454:
 	.string	"gp_gc_page_buf_info"
 .LASF509:
 	.string	"g_totle_discard_page_count"
-.LASF656:
+.LASF657:
 	.string	"max_ec"
 .LASF537:
 	.string	"gFtlInitStatus"
@@ -55260,11 +55401,11 @@ __func__.7630:
 	.string	"long long int"
 .LASF459:
 	.string	"p_erase_count_table"
-.LASF824:
+.LASF825:
 	.string	"FtlBbmMapBadBlock"
 .LASF427:
 	.string	"g_GlobalDataVersion"
-.LASF717:
+.LASF718:
 	.string	"block_in_plane"
 .LASF128:
 	.string	"initrd_start"
@@ -55272,21 +55413,23 @@ __func__.7630:
 	.string	"g_MaxLbaSector"
 .LASF382:
 	.string	"current_plane"
+.LASF880:
+	.string	"free"
 .LASF383:
 	.string	"num_planes"
-.LASF800:
+.LASF801:
 	.string	"spareBuf"
-.LASF730:
+.LASF731:
 	.string	"FtlVendorPartRead"
-.LASF723:
+.LASF724:
 	.string	"FtlWriteDump_data"
 .LASF197:
 	.string	"UCLASS_SPI_FLASH"
 .LASF202:
 	.string	"UCLASS_TIMER"
-.LASF798:
+.LASF799:
 	.string	"FtlGetLastWrittenPage"
-.LASF661:
+.LASF662:
 	.string	"pDataHeader"
 .LASF542:
 	.string	"power_up_flag"
@@ -55294,17 +55437,17 @@ __func__.7630:
 	.string	"inkDie_write_and_check_en"
 .LASF413:
 	.string	"c_ftl_nand_l2pmap_ram_region_num"
-.LASF843:
+.LASF844:
 	.string	"sftl_deinit"
-.LASF815:
+.LASF816:
 	.string	"totle_count"
 .LASF282:
 	.string	"die_num"
-.LASF750:
+.LASF751:
 	.string	"update_map_block"
 .LASF307:
 	.string	"maxRegion"
-.LASF680:
+.LASF681:
 	.string	"next_free_active_plane"
 .LASF491:
 	.string	"p_gc_page_info"
@@ -55318,13 +55461,13 @@ __func__.7630:
 	.string	"g_cur_erase_blk"
 .LASF184:
 	.string	"UCLASS_PWM"
-.LASF634:
+.LASF635:
 	.string	"FtlGcBufFree"
-.LASF774:
+.LASF775:
 	.string	"List_pop_index_node"
-.LASF690:
+.LASF691:
 	.string	"scan_completed"
-.LASF637:
+.LASF638:
 	.string	"update_vpc_list"
 .LASF170:
 	.string	"UCLASS_MMC"
@@ -55336,7 +55479,7 @@ __func__.7630:
 	.string	"res32_0"
 .LASF333:
 	.string	"res32_1"
-.LASF726:
+.LASF727:
 	.string	"FtlUpdateVaildLpn"
 .LASF390:
 	.string	"scr_ppa"
@@ -55346,43 +55489,43 @@ __func__.7630:
 	.string	"save_size"
 .LASF78:
 	.string	"version"
-.LASF652:
+.LASF653:
 	.string	"pNode"
-.LASF638:
+.LASF639:
 	.string	"get_new_active_ppa"
-.LASF878:
+.LASF879:
 	.string	"kmalloc"
 .LASF25:
 	.string	"_binary_u_boot_bin_end"
-.LASF595:
+.LASF598:
 	.string	"max_gc_page_num"
 .LASF1:
 	.string	"unsigned int"
-.LASF712:
+.LASF713:
 	.string	"FtlSlcSuperblockCheck"
 .LASF515:
 	.string	"g_totle_avg_erase_count"
-.LASF836:
+.LASF837:
 	.string	"flashType"
-.LASF789:
+.LASF790:
 	.string	"FtlFreeSysBLkSort"
-.LASF779:
+.LASF780:
 	.string	"tmp_erase_count"
 .LASF83:
 	.string	"working_fdt"
-.LASF862:
+.LASF863:
 	.string	"FtlVariablesInit"
 .LASF392:
 	.string	"ftl_gc_page_buffer"
 .LASF239:
 	.string	"push_packet"
-.LASF708:
+.LASF709:
 	.string	"pMapBlkHeader"
 .LASF82:
 	.string	"size_dt_struct"
 .LASF473:
 	.string	"p_vendor_region_ppn_table"
-.LASF675:
+.LASF676:
 	.string	"make_superblock"
 .LASF97:
 	.string	"ih_name"
@@ -55392,11 +55535,11 @@ __func__.7630:
 	.string	"bufferFlashMode"
 .LASF7:
 	.string	"short int"
-.LASF837:
+.LASF838:
 	.string	"FtlRead"
 .LASF74:
 	.string	"totalsize"
-.LASF757:
+.LASF758:
 	.string	"ftl_map_blk_alloc_new_blk"
 .LASF385:
 	.string	"check_en"
@@ -55406,7 +55549,7 @@ __func__.7630:
 	.string	"prev"
 .LASF423:
 	.string	"c_ftl_nand_data_op_blks_per_plane"
-.LASF650:
+.LASF651:
 	.string	"min_ec_id"
 .LASF388:
 	.string	"phyBlk"
@@ -55414,7 +55557,7 @@ __func__.7630:
 	.string	"net_boot_file_size"
 .LASF412:
 	.string	"c_ftl_nand_map_region_num"
-.LASF665:
+.LASF666:
 	.string	"FtlVpcCheckAndModify"
 .LASF127:
 	.string	"ft_len"
@@ -55426,3 +55569,4 @@ __func__.7630:
 	.string	"g_sys_save_data"
 .LASF124:
 	.string	"rd_start"
+	.hidden	free
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index 8481d93fd9..e4b0901c08 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -13,11 +13,6 @@
 #include "rkflash_blk.h"
 #include "rkflash_debug.h"
 
-void ftl_free(void *buf)
-{
-	kfree(buf);
-}
-
 ulong rkflash_bread(struct udevice *udev, lbaint_t start,
 		    lbaint_t blkcnt, void *dst)
 {

commit 8e620d08b814995136ada212c40ab1236ec0bd6d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 22 09:35:38 2018 +0800

    android: add the default fastbootcmd
    
    Run the default fastbootcmd if can not get fastbootcmd
    from env.
    
    Change-Id: Iaf4d155a9737dd712673f1a7ab9543dc405343fa
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 91b227087e..272dc450b4 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -194,9 +194,12 @@ static int android_bootloader_boot_bootloader(void)
 {
 	const char *fastboot_cmd = env_get("fastbootcmd");
 
-	if (fastboot_cmd)
-		return run_command(fastboot_cmd, CMD_FLAG_ENV);
-	return -1;
+	if (fastboot_cmd == NULL) {
+		printf("fastboot_cmd is null, run default fastboot_cmd!\n");
+		fastboot_cmd = "fastboot usb 0";
+	}
+
+	return run_command(fastboot_cmd, CMD_FLAG_ENV);
 }
 
 #ifdef CONFIG_SUPPORT_OEM_DTB

commit b169aaa6024eb6523f85f71fd99eb1d9dac1c6c0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 15 09:01:51 2018 +0800

    drivers: rknand: zftl improve read performent
    
    1. Enable multi-plane read feature
    2. Increase nandc interface clock frequency
    
    Change-Id: Ic0b372c34833cef34f60ae2aa3fb3b4268bfd4ed
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 57a74d592d..b85cec9848 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-05-11
+ * date: 2018-06-15
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -30,6 +30,34 @@ flash_mem_cmp8:
 	add	w0, w4, 1
 	ret
 	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text.slc_phy_page_address_calc,"ax",@progbits
+	.align	2
+	.type	slc_phy_page_address_calc, %function
+slc_phy_page_address_calc:
+	adrp	x1, .LANCHOR0
+	adrp	x2, .LANCHOR1
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L7
+	ldrb	w1, [x2, #:lo12:.LANCHOR1]
+	cbz	w1, .L8
+.L7:
+	adrp	x1, .LANCHOR2
+	ldrb	w2, [x2, #:lo12:.LANCHOR1]
+	ldrh	w3, [x1, #:lo12:.LANCHOR2]
+	udiv	w1, w0, w3
+	mul	w1, w1, w3
+	sub	w0, w0, w1
+	cbz	w2, .L9
+	add	w0, w1, w0, lsl 1
+	ret
+.L9:
+	adrp	x2, .LANCHOR3
+	add	x2, x2, :lo12:.LANCHOR3
+	ldrh	w0, [x2, w0, uxtw 1]
+	add	w0, w0, w1
+.L8:
+	ret
+	.size	slc_phy_page_address_calc, .-slc_phy_page_address_calc
 	.section	.text._list_remove_node,"ax",@progbits
 	.align	2
 	.type	_list_remove_node, %function
@@ -39,87 +67,87 @@ _list_remove_node:
 	mov	w3, 6
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR0
+	adrp	x21, .LANCHOR4
 	stp	x19, x20, [sp, 16]
 	umull	x20, w1, w3
 	stp	x23, x24, [sp, 48]
 	mov	w1, 65535
-	ldr	x24, [x21, #:lo12:.LANCHOR0]
+	ldr	x24, [x21, #:lo12:.LANCHOR4]
 	add	x19, x24, x20
 	ldrh	w4, [x24, x20]
 	ldrh	w3, [x19, 2]
 	cmp	w4, w1
 	ldr	x1, [x0]
-	bne	.L7
+	bne	.L17
 	cmp	w3, w4
-	bne	.L7
+	bne	.L17
 	cmp	x19, x1
-	bne	.L6
-.L7:
+	bne	.L16
+.L17:
 	mov	x22, x0
 	mov	x23, x2
 	mov	w0, 65535
 	cmp	w3, w0
-	bne	.L9
+	bne	.L19
 	cmp	x19, x1
-	beq	.L9
-	adrp	x1, .LANCHOR1
+	beq	.L19
+	adrp	x1, .LANCHOR5
 	adrp	x0, .LC0
 	mov	w2, 188
-	add	x1, x1, :lo12:.LANCHOR1
+	add	x1, x1, :lo12:.LANCHOR5
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L9:
+.L19:
 	ldr	x0, [x22]
 	ldrh	w3, [x24, x20]
 	cmp	x19, x0
 	mov	w0, 65535
-	bne	.L10
+	bne	.L20
 	cmp	w3, w0
-	bne	.L11
+	bne	.L21
 	str	xzr, [x22]
-.L12:
+.L22:
 	mov	w0, -1
 	strh	w0, [x24, x20]
 	strh	w0, [x19, 2]
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
-.L6:
+.L16:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L11:
-	ldr	x0, [x21, #:lo12:.LANCHOR0]
+.L21:
+	ldr	x0, [x21, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	umaddl	x3, w3, w1, x0
 	mov	w0, -1
 	str	x3, [x22]
 	strh	w0, [x3, 2]
-	b	.L12
-.L10:
+	b	.L22
+.L20:
 	cmp	w3, w0
 	ldrh	w0, [x19, 2]
-	bne	.L13
+	bne	.L23
 	cmp	w0, w3
-	beq	.L12
+	beq	.L22
 	mov	w1, 6
 	mov	w2, -1
 	umull	x0, w0, w1
-	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	ldr	x1, [x21, #:lo12:.LANCHOR4]
 	strh	w2, [x1, x0]
-	b	.L12
-.L13:
-	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	b	.L22
+.L23:
+	ldr	x1, [x21, #:lo12:.LANCHOR4]
 	mov	w2, 6
 	umaddl	x4, w3, w2, x1
 	strh	w0, [x4, 2]
 	ldrh	w0, [x19, 2]
 	umull	x0, w0, w2
 	strh	w3, [x1, x0]
-	b	.L12
+	b	.L22
 	.size	_list_remove_node, .-_list_remove_node
 	.section	.text._list_pop_index_node,"ax",@progbits
 	.align	2
@@ -129,15 +157,15 @@ _list_pop_index_node:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ldr	x20, [x0]
-	cbz	x20, .L21
-	adrp	x3, .LANCHOR0
+	cbz	x20, .L31
+	adrp	x3, .LANCHOR4
 	and	w1, w1, 65535
 	mov	w4, 65535
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR0]
-.L17:
-	cbnz	w1, .L18
-.L20:
+	ldr	x19, [x3, #:lo12:.LANCHOR4]
+.L27:
+	cbnz	w1, .L28
+.L30:
 	sub	x19, x20, x19
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
@@ -150,55 +178,55 @@ _list_pop_index_node:
 	strh	w0, [x20]
 	strh	w0, [x20, 2]
 	mov	w0, w19
-.L15:
+.L25:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L18:
+.L28:
 	ldrh	w3, [x20]
 	cmp	w3, w4
-	beq	.L20
+	beq	.L30
 	sub	w1, w1, #1
 	umaddl	x20, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L17
-.L21:
+	b	.L27
+.L31:
 	mov	w0, 65535
-	b	.L15
+	b	.L25
 	.size	_list_pop_index_node, .-_list_pop_index_node
 	.section	.text._insert_free_list,"ax",@progbits
 	.align	2
 	.type	_insert_free_list, %function
 _insert_free_list:
-	adrp	x3, .LANCHOR2
+	adrp	x3, .LANCHOR6
 	and	w1, w1, 65535
-	ldrh	w3, [x3, #:lo12:.LANCHOR2]
+	ldrh	w3, [x3, #:lo12:.LANCHOR6]
 	cmp	w3, w1
-	bls	.L23
+	bls	.L33
 	ldrh	w3, [x2]
 	mov	w8, 6
 	ldr	x7, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
-	adrp	x2, .LANCHOR0
+	adrp	x2, .LANCHOR4
 	umull	x12, w1, w8
-	ldr	x5, [x2, #:lo12:.LANCHOR0]
+	ldr	x5, [x2, #:lo12:.LANCHOR4]
 	mov	w2, -1
 	add	x6, x5, x12
 	strh	w2, [x6, 2]
 	strh	w2, [x5, x12]
-	cbnz	x7, .L25
-.L30:
+	cbnz	x7, .L35
+.L40:
 	str	x6, [x0]
 	ret
-.L25:
-	adrp	x2, .LANCHOR3
-	adrp	x3, .LANCHOR4
+.L35:
+	adrp	x2, .LANCHOR7
+	adrp	x3, .LANCHOR8
 	mov	w10, w8
 	mov	w15, 65535
-	ldr	x11, [x2, #:lo12:.LANCHOR3]
+	ldr	x11, [x2, #:lo12:.LANCHOR7]
 	ubfiz	x2, x1, 2, 16
-	ldrh	w14, [x3, #:lo12:.LANCHOR4]
+	ldrh	w14, [x3, #:lo12:.LANCHOR8]
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
 	ldr	w4, [x11, x2]
@@ -212,7 +240,7 @@ _insert_free_list:
 	mul	x2, x2, x3
 	mov	x3, x7
 	and	w2, w2, 65535
-.L28:
+.L38:
 	ubfiz	x13, x2, 2, 16
 	ldr	w8, [x11, x13]
 	ldrh	w13, [x11, x13]
@@ -220,88 +248,88 @@ _insert_free_list:
 	and	w13, w13, 2047
 	madd	w8, w14, w8, w13
 	cmp	w4, w8, uxth
-	bls	.L26
+	bls	.L36
 	ldrh	w8, [x3]
 	cmp	w8, w15
-	bne	.L27
+	bne	.L37
 	strh	w2, [x6, 2]
 	strh	w1, [x3]
 	ret
-.L27:
+.L37:
 	umaddl	x3, w8, w10, x5
 	mov	w2, w8
-	b	.L28
-.L26:
+	b	.L38
+.L36:
 	ldrh	w4, [x3, 2]
 	cmp	x7, x3
 	strh	w4, [x6, 2]
 	strh	w2, [x5, x12]
-	bne	.L29
+	bne	.L39
 	strh	w1, [x7, 2]
-	b	.L30
-.L29:
+	b	.L40
+.L39:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x5, x0]
 	strh	w1, [x3, 2]
-.L23:
+.L33:
 	ret
 	.size	_insert_free_list, .-_insert_free_list
 	.section	.text._insert_data_list,"ax",@progbits
 	.align	2
 	.type	_insert_data_list, %function
 _insert_data_list:
-	adrp	x3, .LANCHOR2
+	adrp	x3, .LANCHOR6
 	and	w1, w1, 65535
-	ldrh	w4, [x3, #:lo12:.LANCHOR2]
+	ldrh	w4, [x3, #:lo12:.LANCHOR6]
 	cmp	w4, w1
-	bls	.L51
+	bls	.L61
 	mov	x5, x3
 	ldrh	w3, [x2]
 	mov	w12, 6
 	ldr	x11, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
-	adrp	x2, .LANCHOR0
+	adrp	x2, .LANCHOR4
 	umull	x12, w1, w12
-	ldr	x8, [x2, #:lo12:.LANCHOR0]
+	ldr	x8, [x2, #:lo12:.LANCHOR4]
 	mov	w2, -1
 	add	x10, x8, x12
 	strh	w2, [x10, 2]
 	strh	w2, [x8, x12]
-	cbnz	x11, .L34
+	cbnz	x11, .L44
 	str	x10, [x0]
 	ret
-.L34:
+.L44:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR5
+	adrp	x2, .LANCHOR9
 	uxtw	x3, w1
-	adrp	x7, .LANCHOR4
+	adrp	x7, .LANCHOR8
 	add	x29, sp, 0
-	ldr	x15, [x2, #:lo12:.LANCHOR5]
-	adrp	x2, .LANCHOR3
+	ldr	x15, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR7
 	ldrh	w4, [x10, 4]
-	ldr	x13, [x2, #:lo12:.LANCHOR3]
+	ldr	x13, [x2, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
 	ldrh	w6, [x15, x3, lsl 1]
 	lsl	x3, x3, 2
-	ldrh	w16, [x7, #:lo12:.LANCHOR4]
+	ldrh	w16, [x7, #:lo12:.LANCHOR8]
 	ldr	w2, [x13, x3]
 	mul	w6, w6, w4
 	ldrh	w3, [x13, x3]
 	ubfx	x2, x2, 11, 8
 	and	w3, w3, 2047
-	cbz	w6, .L35
+	cbz	w6, .L45
 	madd	w2, w16, w2, w3
 	add	w6, w6, w2, uxth
-.L35:
+.L45:
 	sub	x2, x11, x8
 	mov	x3, -6148914691236517206
 	asr	x2, x2, 1
 	movk	x3, 0xaaab, lsl 0
 	cmp	w4, 0
-	ldrh	w30, [x5, #:lo12:.LANCHOR2]
+	ldrh	w30, [x5, #:lo12:.LANCHOR6]
 	csinv	w6, w6, wzr, ne
 	mov	x7, x11
 	mul	x2, x2, x3
@@ -309,13 +337,13 @@ _insert_data_list:
 	mov	w19, 65535
 	mov	w20, 6
 	and	w2, w2, 65535
-.L42:
+.L52:
 	add	w4, w4, 1
 	and	w4, w4, 65535
 	cmp	w4, w30
-	bhi	.L31
+	bhi	.L41
 	cmp	w1, w2
-	beq	.L31
+	beq	.L41
 	uxtw	x5, w2
 	ldrh	w17, [x7, 4]
 	ldrh	w3, [x15, x5, lsl 1]
@@ -325,49 +353,49 @@ _insert_data_list:
 	ldrh	w5, [x13, x5]
 	ubfx	x3, x3, 11, 8
 	and	w5, w5, 2047
-	cbz	w14, .L38
-	cbz	w17, .L46
+	cbz	w14, .L48
+	cbz	w17, .L56
 	madd	w3, w16, w3, w5
 	add	w3, w14, w3, uxth
-.L39:
+.L49:
 	cmp	w6, w3
-	bcc	.L40
-.L44:
+	bcc	.L50
+.L54:
 	ldrh	w3, [x7]
 	cmp	w3, w19
-	bne	.L41
+	bne	.L51
 	strh	w2, [x10, 2]
 	strh	w1, [x7]
-.L31:
+.L41:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L41:
+.L51:
 	umaddl	x7, w3, w20, x8
 	mov	w2, w3
-	b	.L42
-.L40:
+	b	.L52
+.L50:
 	ldrh	w3, [x7, 2]
 	cmp	x11, x7
 	strh	w3, [x10, 2]
 	strh	w2, [x8, x12]
-	bne	.L43
+	bne	.L53
 	strh	w1, [x11, 2]
 	str	x10, [x0]
-	b	.L31
-.L43:
+	b	.L41
+.L53:
 	ldrh	w0, [x7, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x8, x0]
 	strh	w1, [x7, 2]
-	b	.L31
-.L38:
-	cbnz	w17, .L44
-.L46:
+	b	.L41
+.L48:
+	cbnz	w17, .L54
+.L56:
 	mov	w3, -1
-	b	.L39
-.L51:
+	b	.L49
+.L61:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
 	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
@@ -375,26 +403,26 @@ _insert_data_list:
 	.type	_list_get_gc_head_node.isra.2, %function
 _list_get_gc_head_node.isra.2:
 	and	w1, w1, 65535
-	cbz	x0, .L58
-	adrp	x2, .LANCHOR0
+	cbz	x0, .L68
+	adrp	x2, .LANCHOR4
 	mov	w3, 65535
 	mov	w4, 6
-	ldr	x2, [x2, #:lo12:.LANCHOR0]
-.L55:
-	cbz	w1, .L56
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+.L65:
+	cbz	w1, .L66
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L57
+	bne	.L67
 	ret
-.L57:
+.L67:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L55
-.L58:
+	b	.L65
+.L68:
 	mov	w0, 65535
 	ret
-.L56:
+.L66:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -411,58 +439,58 @@ _list_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR10
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L60
+	beq	.L70
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L60
+	beq	.L70
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L60
-	adrp	x1, .LANCHOR0
+	beq	.L70
+	adrp	x1, .LANCHOR4
 	mov	w22, 6
 	ldr	x3, [x0]
 	mov	x25, x1
 	umull	x22, w19, w22
-	ldr	x24, [x1, #:lo12:.LANCHOR0]
+	ldr	x24, [x1, #:lo12:.LANCHOR4]
 	add	x23, x24, x22
 	cmp	x23, x3
-	beq	.L60
+	beq	.L70
 	mov	x20, x0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	mov	x21, x2
 	cmp	w0, w1
-	bne	.L64
+	bne	.L74
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L64
-	adrp	x1, .LANCHOR7
+	bne	.L74
+	adrp	x1, .LANCHOR11
 	adrp	x0, .LC0
 	mov	w2, 255
-	add	x1, x1, :lo12:.LANCHOR7
+	add	x1, x1, :lo12:.LANCHOR11
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L64:
+.L74:
 	ldrh	w1, [x23, 2]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L65
+	bne	.L75
 	ldrh	w0, [x24, x22]
 	cmp	w0, w1
-	beq	.L60
-.L65:
-	adrp	x0, .LANCHOR5
+	beq	.L70
+.L75:
+	adrp	x0, .LANCHOR9
 	ubfiz	x2, x19, 1, 16
 	mov	x5, -6148914691236517206
 	mov	w4, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
 	ldrh	w2, [x23, 4]
@@ -474,14 +502,14 @@ _list_update_data_list:
 	asr	x2, x1, 1
 	mul	x2, x2, x5
 	ldrh	w0, [x0, x2, lsl 1]
-	ldr	x2, [x25, #:lo12:.LANCHOR0]
+	ldr	x2, [x25, #:lo12:.LANCHOR4]
 	add	x1, x2, x1
 	ldrh	w1, [x1, 4]
 	cmp	w1, 0
 	mul	w0, w0, w1
 	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L60
+	bcs	.L70
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -495,7 +523,7 @@ _list_update_data_list:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L60:
+.L70:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -503,15 +531,27 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
-	.section	.text.zftl_get_gc_node.part.10,"ax",@progbits
+	.section	.text.zftl_get_gc_node.part.9,"ax",@progbits
 	.align	2
-	.type	zftl_get_gc_node.part.10, %function
-zftl_get_gc_node.part.10:
+	.type	zftl_get_gc_node.part.9, %function
+zftl_get_gc_node.part.9:
 	mov	w1, w0
-	adrp	x0, .LANCHOR8
-	ldr	x0, [x0, #:lo12:.LANCHOR8]
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
 	b	_list_get_gc_head_node.isra.2
-	.size	zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10
+	.size	zftl_get_gc_node.part.9, .-zftl_get_gc_node.part.9
+	.section	.text.nandc_de_cs.constprop.29,"ax",@progbits
+	.align	2
+	.type	nandc_de_cs.constprop.29, %function
+nandc_de_cs.constprop.29:
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs.constprop.29, .-nandc_de_cs.constprop.29
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -520,19 +560,19 @@ nand_flash_print_info:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L73
-	adrp	x1, .LANCHOR10
+	adrp	x19, .LANCHOR14
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L84
+	adrp	x1, .LANCHOR15
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR15
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L73:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L74
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L84:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L85
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w6, [x0, 6]
 	ldrb	w5, [x0, 5]
 	ldrb	w4, [x0, 4]
@@ -542,278 +582,278 @@ nand_flash_print_info:
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L74:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L75
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L85:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L86
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L75:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L76
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L86:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L87
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 9]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L76:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L77
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L87:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L88
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 10]
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L77:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L78
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L88:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L89
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 12]
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L78:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L79
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L89:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L90
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 13]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L79:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L80
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L90:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L91
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L80:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L81
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L91:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L92
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 23]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L81:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L82
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L92:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L93
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 18]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L82:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L83
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L93:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 19]
 	adrp	x0, .LC11
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L83:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L84
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L94:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L95
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 20]
 	adrp	x0, .LC12
 	add	x0, x0, :lo12:.LC12
 	bl	printf
-.L84:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L85
-	adrp	x0, .LANCHOR12
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR17
+	ldrb	w1, [x0, #:lo12:.LANCHOR17]
 	adrp	x0, .LC13
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L85:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L86
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x0, #:lo12:.LANCHOR13]
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L86:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L87
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L98
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 22]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-.L87:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L88
-	adrp	x0, .LANCHOR14
-	ldrb	w1, [x0, #:lo12:.LANCHOR14]
+.L98:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L99
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
-.L88:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L89
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L99:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L100
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 16]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	and	w1, w1, 1
 	bl	printf
-.L89:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L90
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L100:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L101
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
 	ubfx	x1, x1, 1, 1
 	bl	printf
-.L90:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L91
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L101:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L102
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC19
 	add	x0, x0, :lo12:.LC19
 	ubfx	x1, x1, 2, 1
 	bl	printf
-.L91:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L92
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L102:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L103
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC20
 	add	x0, x0, :lo12:.LC20
 	ubfx	x1, x1, 3, 1
 	bl	printf
-.L92:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L93
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L103:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L104
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
 	ubfx	x1, x1, 4, 1
 	bl	printf
-.L93:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L94
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L104:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L105
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
 	ubfx	x1, x1, 5, 1
 	bl	printf
-.L94:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L95
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L105:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L106
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC23
 	add	x0, x0, :lo12:.LC23
 	ubfx	x1, x1, 6, 1
 	bl	printf
-.L95:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L96
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L106:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L107
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	ubfx	x1, x1, 7, 1
 	bl	printf
-.L96:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L97
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L107:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L108
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w1, [x0, 17]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	and	w1, w1, 1
 	bl	printf
-.L97:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L98
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L108:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L109
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
 	ubfx	x1, x1, 9, 1
 	bl	printf
-.L98:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L99
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+.L109:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L110
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC27
 	add	x0, x0, :lo12:.LC27
 	ubfx	x1, x1, 10, 1
 	bl	printf
-.L99:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L100
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x0, #:lo12:.LANCHOR13]
+.L110:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L111
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L100:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L101
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+.L111:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L112
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
-.L101:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L102
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+.L112:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L113
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L102:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L72
-	adrp	x0, .LANCHOR16
+.L113:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L83
+	adrp	x0, .LANCHOR20
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR16]
+	ldrb	w1, [x0, #:lo12:.LANCHOR20]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	b	printf
-.L72:
+.L83:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -826,11 +866,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L196:
+.L207:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L196
+	cbnz	w0, .L207
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -860,54 +900,54 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR21
-	add	x6, x6, :lo12:.LANCHOR21
-	adrp	x3, .LANCHOR17
-	add	x3, x3, :lo12:.LANCHOR17
+	adrp	x6, .LANCHOR25
+	add	x6, x6, :lo12:.LANCHOR25
+	adrp	x3, .LANCHOR21
+	add	x3, x3, :lo12:.LANCHOR21
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR18
-	add	x7, x0, :lo12:.LANCHOR18
+	adrp	x0, .LANCHOR22
+	add	x7, x0, :lo12:.LANCHOR22
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR19
+	adrp	x8, .LANCHOR23
 	mov	x2, 0
-	adrp	x10, .LANCHOR20
-	add	x8, x8, :lo12:.LANCHOR19
-	add	x10, x10, :lo12:.LANCHOR20
+	adrp	x10, .LANCHOR24
+	add	x8, x8, :lo12:.LANCHOR23
+	add	x10, x10, :lo12:.LANCHOR24
 	cmp	w0, w2
-	bhi	.L209
+	bhi	.L220
 	ret
-.L203:
+.L214:
 	cmp	w0, 35
-	bne	.L205
+	bne	.L216
 	ldrsb	w0, [x3, x2]
-	b	.L210
-.L205:
+	b	.L221
+.L216:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L210
-.L209:
+	b	.L221
+.L220:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L206:
+.L217:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR18
+	add	x0, x5, :lo12:.LANCHOR22
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L203
+	bne	.L214
 	ldrsb	w0, [x7, x2]
-.L210:
+.L221:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L206
+	bhi	.L217
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -915,11 +955,11 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR22
+	adrp	x2, .LANCHOR26
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR22]
+	ldr	x2, [x2, #:lo12:.LANCHOR26]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -930,19 +970,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR23
-	ldr	x3, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR13
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L217
+	bhi	.L228
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L217:
+.L228:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L213:
+.L224:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -951,7 +991,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L213
+	bhi	.L224
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -962,29 +1002,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR19
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	adrp	x1, .LANCHOR23
+	ldrb	w1, [x1, #:lo12:.LANCHOR23]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L224
-	adrp	x8, .LANCHOR22
+	bhi	.L235
+	adrp	x8, .LANCHOR26
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR22]
+	ldr	x1, [x8, #:lo12:.LANCHOR26]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L224
+	cbz	w1, .L235
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR22]
+	ldr	x0, [x8, #:lo12:.LANCHOR26]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L224:
+.L235:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -992,20 +1032,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR24
+	adrp	x1, .LANCHOR27
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR23
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
-	ldr	x2, [x2, #:lo12:.LANCHOR23]
+	adrp	x2, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L228
+	bne	.L239
 	str	w1, [x2, 80]
 	ret
-.L228:
+.L239:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -1014,43 +1054,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR23
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
-	bne	.L231
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	bne	.L242
 	ldr	w0, [x0, 80]
-.L233:
+.L244:
 	ubfx	x0, x0, 8, 8
 	ret
-.L231:
+.L242:
 	ldr	w0, [x0, 304]
-	b	.L233
+	b	.L244
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR23]
+	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L235
+	beq	.L246
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR24
+	adrp	x0, .LANCHOR27
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L237
+	bne	.L248
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1058,10 +1098,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L238:
+.L249:
 	str	w1, [x2]
 	ret
-.L237:
+.L248:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1069,38 +1109,25 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L238
-.L235:
+	b	.L249
+.L246:
 	and	w1, w1, -8193
-	b	.L238
+	b	.L249
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR23]
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
 	ret
 	.size	nandc_cs, .-nandc_cs
-	.section	.text.nandc_de_cs,"ax",@progbits
-	.align	2
-	.global	nandc_de_cs
-	.type	nandc_de_cs, %function
-nandc_de_cs:
-	adrp	x0, .LANCHOR23
-	ldr	x1, [x0, #:lo12:.LANCHOR23]
-	ldr	w0, [x1]
-	and	w0, w0, -256
-	and	w0, w0, -131073
-	str	w0, [x1]
-	ret
-	.size	nandc_de_cs, .-nandc_de_cs
 	.section	.text.flash_wait_device_ready_raw,"ax",@progbits
 	.align	2
 	.global	flash_wait_device_ready_raw
@@ -1110,25 +1137,25 @@ flash_wait_device_ready_raw:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
 	mov	w20, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	cmp	w0, w21
-	bhi	.L244
-	adrp	x1, .LANCHOR25
+	bhi	.L254
+	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
 	mov	w2, 599
-	add	x1, x1, :lo12:.LANCHOR25
+	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L244:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L254:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w5, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x4, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w5
 	bl	nandc_cs
 	ubfiz	x2, x5, 8, 8
@@ -1137,7 +1164,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L247:
+.L257:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1147,14 +1174,13 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L247
+	bne	.L257
 	cmp	w3, 255
-	beq	.L247
-	mov	w0, w5
-	bl	nandc_de_cs
-	ldp	x19, x20, [sp, 16]
-	mov	w0, w3
+	beq	.L257
+	bl	nandc_de_cs.constprop.29
 	ldr	x21, [sp, 32]
+	mov	w0, w3
+	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
@@ -1167,32 +1193,45 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L251
-	adrp	x0, .LANCHOR13
-	adrp	x5, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L252
-	ldrb	w0, [x5, #:lo12:.LANCHOR27]
-	cbz	w0, .L251
-.L252:
-	adrp	x0, .LANCHOR28
-	ldrh	w3, [x0, #:lo12:.LANCHOR28]
-	ldrb	w0, [x5, #:lo12:.LANCHOR27]
+	bne	.L261
+	adrp	x0, .LANCHOR0
+	adrp	x5, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L262
+	ldrb	w0, [x5, #:lo12:.LANCHOR1]
+	cbz	w0, .L261
+.L262:
+	adrp	x0, .LANCHOR2
+	ldrh	w3, [x0, #:lo12:.LANCHOR2]
+	ldrb	w0, [x5, #:lo12:.LANCHOR1]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L253
+	cbz	w0, .L263
 	add	w1, w4, w3, lsl 1
-.L251:
+.L261:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L253:
-	adrp	x5, .LANCHOR29
-	add	x5, x5, :lo12:.LANCHOR29
+.L263:
+	adrp	x5, .LANCHOR3
+	add	x5, x5, :lo12:.LANCHOR3
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L251
+	b	.L261
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_de_cs,"ax",@progbits
+	.align	2
+	.global	nandc_de_cs
+	.type	nandc_de_cs, %function
+nandc_de_cs:
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs, .-nandc_de_cs
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
 	.global	nandc_wait_flash_ready
@@ -1201,25 +1240,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR23
+	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
-.L262:
+.L273:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR23]
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L263
+	tbnz	x0, 9, .L274
 	subs	w2, w2, #1
-	bne	.L262
+	bne	.L273
 	mov	w0, -1
-.L260:
+.L271:
 	ldp	x29, x30, [sp], 32
 	ret
-.L263:
+.L274:
 	mov	w0, 0
-	b	.L260
+	b	.L271
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1237,35 +1276,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR21
-	adrp	x2, .LANCHOR17
-	add	x2, x2, :lo12:.LANCHOR17
-	ldrb	w4, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR19
-	ldrb	w5, [x0, #:lo12:.LANCHOR19]
+	adrp	x0, .LANCHOR25
+	adrp	x2, .LANCHOR21
+	add	x2, x2, :lo12:.LANCHOR21
+	ldrb	w4, [x0, #:lo12:.LANCHOR25]
+	adrp	x0, .LANCHOR23
+	ldrb	w5, [x0, #:lo12:.LANCHOR23]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR18
-	add	x0, x0, :lo12:.LANCHOR18
+	adrp	x0, .LANCHOR22
+	add	x0, x0, :lo12:.LANCHOR22
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L267:
+.L278:
 	cmp	w4, w0
-	bhi	.L270
+	bhi	.L281
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L270:
+.L281:
 	cmp	w5, 67
-	bne	.L268
+	bne	.L279
 	ldrsb	w6, [x1, x0]
-.L272:
+.L283:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L267
-.L268:
+	b	.L278
+.L279:
 	ldrsb	w6, [x2, x0]
-	b	.L272
+	b	.L283
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1337,7 +1376,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L277
+	cbz	w2, .L288
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1369,9 +1408,9 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L280:
+.L291:
 	b	nandc_wait_flash_ready
-.L277:
+.L288:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
@@ -1382,46 +1421,46 @@ toshiba_tlc_set_rr_para:
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L280
+	b	.L291
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR0
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR13]
-	cbz	w2, .L283
-	adrp	x1, .LANCHOR23
+	ldrb	w2, [x1, #:lo12:.LANCHOR0]
+	cbz	w2, .L294
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
-	bne	.L286
-.L303:
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L297
+.L314:
 	adrp	x2, .LANCHOR34+29
 	ldrb	w2, [x2, #:lo12:.LANCHOR34+29]
-	cbz	w2, .L283
+	cbz	w2, .L294
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L286:
+.L297:
 	cmp	w2, 2
-	bne	.L288
+	bne	.L299
 	adrp	x2, .LANCHOR35
 	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w3, [x2, x0]
-	cbz	w3, .L283
+	cbz	w3, .L294
 	strb	wzr, [x2, x0]
-	b	.L303
-.L288:
+	b	.L314
+.L299:
 	cmp	w2, 3
-	bne	.L283
+	bne	.L294
 	adrp	x2, .LANCHOR35
 	sxtw	x3, w0
 	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w4, [x2, x3]
-	cbz	w4, .L283
+	cbz	w4, .L294
 	ubfiz	x0, x0, 8, 8
 	strb	wzr, [x2, x3]
 	add	x0, x1, x0
@@ -1435,7 +1474,7 @@ zftl_flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L283:
+.L294:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1443,29 +1482,29 @@ zftl_flash_enter_slc_mode:
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR0
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR13]
-	cbz	w2, .L304
-	adrp	x1, .LANCHOR23
+	ldrb	w2, [x1, #:lo12:.LANCHOR0]
+	cbz	w2, .L315
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
-	bne	.L307
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L318
 	adrp	x2, .LANCHOR34+30
 	ldrb	w2, [x2, #:lo12:.LANCHOR34+30]
-.L324:
-	cbz	w2, .L304
+.L335:
+	cbz	w2, .L315
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L307:
+.L318:
 	cmp	w2, 2
-	bne	.L309
+	bne	.L320
 	adrp	x3, .LANCHOR35
 	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x0]
-	cbnz	w2, .L304
+	cbnz	w2, .L315
 	adrp	x2, .LANCHOR34
 	add	x2, x2, :lo12:.LANCHOR34
 	mov	w5, 4
@@ -1474,15 +1513,15 @@ zftl_flash_exit_slc_mode:
 	cmp	w4, 2
 	csel	w4, w4, w5, eq
 	strb	w4, [x3, x0]
-	b	.L324
-.L309:
+	b	.L335
+.L320:
 	cmp	w2, 3
-	bne	.L304
+	bne	.L315
 	adrp	x3, .LANCHOR35
 	sxtw	x4, w0
 	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x4]
-	cbnz	w2, .L304
+	cbnz	w2, .L315
 	ubfiz	x0, x0, 8, 8
 	adrp	x2, .LANCHOR34+12
 	add	x0, x1, x0
@@ -1501,7 +1540,7 @@ zftl_flash_exit_slc_mode:
 	str	wzr, [x0, 2048]
 	strb	w2, [x3, x4]
 	b	nandc_wait_flash_ready
-.L304:
+.L315:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
@@ -1513,86 +1552,69 @@ flash_start_page_read:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	ubfx	x22, x1, 21, 3
 	and	w19, w1, 2097151
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	ubfx	x21, x1, 24, 2
 	cmp	w0, w22
-	bhi	.L326
+	bhi	.L337
 	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
-	mov	w2, 736
+	mov	w2, 741
 	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L326:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L337:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w7, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x6, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w7
 	bl	nandc_cs
-	cbnz	w21, .L327
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L328
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L329
-.L328:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L330
-	add	w19, w0, w19, lsl 1
-.L329:
+	cbnz	w21, .L338
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L339
 	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
-	b	.L331
-.L330:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-.L331:
-	ubfiz	x0, x7, 8, 8
-	and	w1, w19, 255
-	add	x0, x6, x0
+.L339:
+	ubfiz	x1, x7, 8, 8
+	and	w0, w19, 255
+	add	x1, x6, x1
 	ldp	x21, x22, [sp, 32]
-	str	wzr, [x0, 2056]
-	str	wzr, [x0, 2052]
-	str	wzr, [x0, 2052]
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 8
-	str	w1, [x0, 2052]
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w0, [x1, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x1, 2052]
 	lsr	w19, w19, 16
-	str	w19, [x0, 2052]
-	str	w20, [x0, 2056]
-	mov	w0, 0
+	str	w19, [x1, 2052]
+	str	w20, [x1, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs
-.L327:
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+	b	nandc_de_cs.constprop.29
+.L338:
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L332
+	bne	.L340
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x6, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L331
-.L332:
+	b	.L339
+.L340:
 	mov	w0, w7
 	bl	zftl_flash_exit_slc_mode
-	b	.L331
+	b	.L339
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
@@ -1603,60 +1625,60 @@ flash_erase_duplane_block:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
-	mov	w22, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	mov	w21, w3
+	mov	w21, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	mov	w20, w3
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L338
+	bhi	.L346
 	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
 	mov	w2, 510
 	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L338:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x24, [x0, #:lo12:.LANCHOR23]
-	adrp	x0, .LANCHOR9
-	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+.L346:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w22, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
+	and	x19, x22, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L339
+	tbz	x0, 4, .L347
 	adrp	x0, .LC31
-	mov	w3, w21
-	mov	w2, w22
-	mov	w1, w20
+	mov	w3, w20
+	mov	w2, w21
+	mov	w1, w22
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L339:
+.L347:
 	bl	nandc_wait_flash_ready
-	mov	w0, w20
+	mov	w0, w22
 	bl	nandc_cs
-	mov	w0, w20
-	cbnz	w25, .L340
+	mov	w0, w22
+	cbnz	w25, .L348
 	bl	zftl_flash_enter_slc_mode
-.L341:
+.L349:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
-	and	w0, w22, 255
+	and	w0, w21, 255
 	str	w0, [x24, 2052]
-	lsr	w0, w22, 8
+	lsr	w0, w21, 8
 	str	w0, [x24, 2052]
-	lsr	w0, w22, 16
+	lsr	w0, w21, 16
 	str	w0, [x24, 2052]
 	adrp	x0, .LANCHOR38
 	ldrb	w0, [x0, #:lo12:.LANCHOR38]
-	cbnz	w0, .L344
+	cbnz	w0, .L352
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1664,15 +1686,15 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L342:
+.L350:
 	mov	w0, 96
 	str	w0, [x24, 2056]
-	and	w0, w21, 255
+	and	w0, w20, 255
 	str	w0, [x24, 2052]
-	lsr	w0, w21, 8
+	lsr	w0, w20, 8
 	str	w0, [x24, 2052]
-	lsr	w21, w21, 16
-	str	w21, [x24, 2052]
+	lsr	w20, w20, 16
+	str	w20, [x24, 2052]
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1680,16 +1702,15 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	mov	w0, w20
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L343
+	cbz	w19, .L351
 	adrp	x0, .LC32
-	mov	w1, w22
+	mov	w1, w21
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L343:
+.L351:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1697,12 +1718,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L340:
+.L348:
 	bl	zftl_flash_exit_slc_mode
-	b	.L341
-.L344:
+	b	.L349
+.L352:
 	mov	w5, 0
-	b	.L342
+	b	.L350
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1713,47 +1734,47 @@ flash_erase_block_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
 	mov	w21, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	and	w22, w2, 2097151
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L353
+	bhi	.L361
 	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
 	mov	w2, 555
 	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L353:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L361:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x24, [x0, #:lo12:.LANCHOR23]
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR13
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L354
+	tbz	x0, 4, .L362
 	adrp	x0, .LC33
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L354:
+.L362:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L355
+	cbnz	w25, .L363
 	bl	zftl_flash_enter_slc_mode
-.L356:
+.L364:
 	add	x0, x24, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1769,19 +1790,18 @@ flash_erase_block_en:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w19, w0
-	mov	w0, w20
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L357
-	adrp	x0, .LANCHOR28
+	beq	.L365
+	adrp	x0, .LANCHOR2
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR28]
+	ldrh	w1, [x0, #:lo12:.LANCHOR2]
 	adrp	x0, .LC34
 	add	x0, x0, :lo12:.LC34
 	udiv	w1, w21, w1
 	bl	printf
-.L357:
+.L365:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1789,9 +1809,9 @@ flash_erase_block_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L355:
+.L363:
 	bl	zftl_flash_exit_slc_mode
-	b	.L356
+	b	.L364
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1814,21 +1834,21 @@ flash_erase_all:
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR28
+	adrp	x23, .LANCHOR2
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR28
+	add	x23, x23, :lo12:.LANCHOR2
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR14
+	adrp	x22, .LANCHOR18
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR14
-	adrp	x24, .LANCHOR26
+	add	x22, x22, :lo12:.LANCHOR18
+	adrp	x24, .LANCHOR29
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L367:
+.L375:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L370
+	bhi	.L378
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1838,24 +1858,142 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L370:
-	add	x0, x24, :lo12:.LANCHOR26
+.L378:
+	add	x0, x24, :lo12:.LANCHOR29
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L368:
+.L376:
 	cmp	w20, w21, uxth
-	bhi	.L369
+	bhi	.L377
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L367
-.L369:
+	b	.L375
+.L377:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L368
+	b	.L376
 	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_start_plane_read,"ax",@progbits
+	.align	2
+	.global	flash_start_plane_read
+	.type	flash_start_plane_read, %function
+flash_start_plane_read:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ubfx	x19, x0, 24, 2
+	stp	x21, x22, [sp, 32]
+	ubfx	x22, x0, 21, 3
+	and	w21, w0, 2097151
+	adrp	x0, .LANCHOR18
+	and	w20, w1, 2097151
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cmp	w0, w22
+	bhi	.L381
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LC0
+	mov	w2, 836
+	add	x1, x1, :lo12:.LANCHOR40
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L381:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w6, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x8, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w6
+	bl	nandc_cs
+	adrp	x7, .LANCHOR16
+	cbnz	w19, .L382
+	mov	w0, w21
+	bl	slc_phy_page_address_calc
+	mov	w21, w0
+	mov	w0, w20
+	bl	slc_phy_page_address_calc
+	mov	w20, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L383
+	mov	w0, w6
+	bl	zftl_flash_enter_slc_mode
+.L383:
+	and	x4, x6, 255
+	adrp	x0, .LANCHOR19
+	add	x1, x0, :lo12:.LANCHOR19
+	add	x4, x8, x4, lsl 8
+	and	w3, w21, 255
+	and	w6, w20, 255
+	lsr	w5, w20, 8
+	lsr	w20, w20, 16
+	ldrb	w10, [x1, 8]
+	ldrb	w2, [x1, 16]
+	str	w10, [x4, 2056]
+	cmp	w2, 1
+	lsr	w2, w21, 8
+	lsr	w21, w21, 16
+	bne	.L385
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w3, [x4, 2052]
+	str	w2, [x4, 2052]
+	ldrb	w0, [x1, 9]
+	str	w21, [x4, 2052]
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L386
+	cbz	w19, .L386
+	str	w19, [x4, 2056]
+.L386:
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+.L399:
+	ldp	x21, x22, [sp, 32]
+	str	w6, [x4, 2052]
+	str	w5, [x4, 2052]
+	mov	w0, 48
+	str	w20, [x4, 2052]
+	str	w0, [x4, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs.constprop.29
+.L382:
+	ldr	x0, [x7, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L384
+	sxtw	x0, w6
+	add	x0, x0, 8
+	add	x0, x8, x0, lsl 8
+	str	w19, [x0, 8]
+	b	.L383
+.L384:
+	mov	w0, w6
+	bl	zftl_flash_exit_slc_mode
+	b	.L383
+.L385:
+	str	w3, [x4, 2052]
+	ldr	x1, [x7, #:lo12:.LANCHOR16]
+	str	w2, [x4, 2052]
+	str	w21, [x4, 2052]
+	ldrb	w1, [x1, 12]
+	cmp	w1, 3
+	bne	.L388
+	cbz	w19, .L388
+	str	w19, [x4, 2056]
+.L388:
+	add	x0, x0, :lo12:.LANCHOR19
+	ldrb	w0, [x0, 9]
+	str	w0, [x4, 2056]
+	b	.L399
+	.size	flash_start_plane_read, .-flash_start_plane_read
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
 	.global	flash_set_interface_mode
@@ -1864,57 +2002,57 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR40
+	adrp	x24, .LANCHOR41
 	stp	x21, x22, [sp, 32]
-	adrp	x23, .LANCHOR9
-	adrp	x22, .LANCHOR41
+	adrp	x23, .LANCHOR14
+	adrp	x22, .LANCHOR42
 	str	x25, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR40
-	add	x22, x22, :lo12:.LANCHOR41
-	add	x23, x23, :lo12:.LANCHOR9
+	add	x24, x24, :lo12:.LANCHOR41
+	add	x22, x22, :lo12:.LANCHOR42
+	add	x23, x23, :lo12:.LANCHOR14
 	mov	w25, w0
 	stp	x19, x20, [sp, 16]
 	mov	x20, 0
-.L382:
+.L410:
 	lsl	x0, x20, 3
 	ldrb	w21, [x0, x24]
 	mov	w0, 69
 	cmp	w21, 152
 	ccmp	w21, w0, 4, ne
-	beq	.L373
+	beq	.L401
 	cmp	w21, 44
-	bne	.L374
-.L373:
-	adrp	x0, .LANCHOR23
+	bne	.L402
+.L401:
+	adrp	x0, .LANCHOR13
 	ldrb	w1, [x22]
 	cmp	w25, 1
-	ldr	x19, [x0, #:lo12:.LANCHOR23]
-	bne	.L375
-	tbz	x1, 0, .L374
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	bne	.L403
+	tbz	x1, 0, .L402
 	ldr	w0, [x23]
-	tbz	x0, 12, .L376
+	tbz	x0, 12, .L404
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L376:
+.L404:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
 	mov	w1, 1
-	bne	.L377
+	bne	.L405
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L397:
+.L425:
 	str	w1, [x0, 2048]
-.L381:
+.L409:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L374:
+.L402:
 	add	x20, x20, 1
 	cmp	x20, 4
-	bne	.L382
+	bne	.L410
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -1923,42 +2061,42 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L377:
+.L405:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L397
-.L375:
-	tbz	x1, 2, .L374
+	b	.L425
+.L403:
+	tbz	x1, 2, .L402
 	ldr	w0, [x23]
-	tbz	x0, 12, .L379
+	tbz	x0, 12, .L407
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L379:
+.L407:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
-	bne	.L380
+	bne	.L408
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L397
-.L380:
+	b	.L425
+.L408:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L381
+	b	.L409
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1971,10 +2109,10 @@ flash_reset:
 flash_read_id:
 	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR23]
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w10
 	bl	flash_reset
 	mov	w0, w10
@@ -2002,13 +2140,12 @@ flash_read_id:
 	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
 	strb	w0, [x8, 7]
-	mov	w0, w10
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	ldrb	w2, [x8]
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L399
+	bhi	.L427
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -2019,7 +2156,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L399:
+.L427:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2034,8 +2171,8 @@ flash_read_spare:
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
 	ldrb	w3, [x2, #:lo12:.LANCHOR34+9]
-	adrp	x2, .LANCHOR23
-	ldr	x4, [x2, #:lo12:.LANCHOR23]
+	adrp	x2, .LANCHOR13
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -2063,20 +2200,20 @@ flash_read_spare:
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -48]!
 	mov	w4, w1
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	and	x2, x0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR34
-	ldr	x19, [x1, #:lo12:.LANCHOR23]
+	ldr	x19, [x1, #:lo12:.LANCHOR13]
 	add	x1, x20, :lo12:.LANCHOR34
 	str	x21, [sp, 32]
 	mov	x0, x2
 	add	x2, x2, 8
 	ldrb	w1, [x1, 29]
 	add	x2, x19, x2, lsl 8
-	cbz	w1, .L405
-.L419:
+	cbz	w1, .L433
+.L447:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x19, x19, x0
@@ -2100,37 +2237,37 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x19, 2048]
 	mov	w0, 5
 	ands	w21, w2, w0
-	beq	.L407
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L407
+	beq	.L435
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L435
 	adrp	x0, .LC39
 	mov	w1, w4
 	add	x0, x0, :lo12:.LC39
 	bl	printf
-.L407:
+.L435:
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 30]
-	cbz	w0, .L404
+	cbz	w0, .L432
 	str	w0, [x19, 2056]
-.L404:
+.L432:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L405:
+.L433:
 	mov	w1, 162
-	b	.L419
+	b	.L447
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
 	.global	nandc_rdy_status
 	.type	nandc_rdy_status, %function
 nandc_rdy_status:
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -2143,69 +2280,69 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR42
+	adrp	x2, .LANCHOR43
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR42]
-	adrp	x2, .LANCHOR24
-	ldrb	w2, [x2, #:lo12:.LANCHOR24]
+	strb	w0, [x2, #:lo12:.LANCHOR43]
+	adrp	x2, .LANCHOR27
+	ldrb	w2, [x2, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR23
-	ldr	x2, [x2, #:lo12:.LANCHOR23]
-	bne	.L423
+	adrp	x2, .LANCHOR13
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	bne	.L451
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L430
+	beq	.L458
 	cmp	w0, 60
-	beq	.L431
+	beq	.L459
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L424:
+.L452:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L430:
+.L458:
 	mov	w1, 0
-	b	.L424
-.L431:
+	b	.L452
+.L459:
 	mov	w1, 3
-	b	.L424
-.L423:
+	b	.L452
+.L451:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L426
-.L429:
+	bne	.L454
+.L457:
 	and	w1, w1, -17
-.L427:
+.L455:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L426:
+.L454:
 	cmp	w0, 24
-	bne	.L428
+	bne	.L456
 	orr	w1, w1, 16
-	b	.L427
-.L428:
+	b	.L455
+.L456:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L427
-	b	.L429
+	bne	.L455
+	b	.L457
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L437
+	bne	.L465
 	ldr	w0, [x0, 296]
 	ret
-.L437:
+.L465:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2237,38 +2374,38 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR45
+	adrp	x4, .LANCHOR46
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR24
+	adrp	x0, .LANCHOR27
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	adrp	x24, .LANCHOR23
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L443
+	bne	.L471
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	ldrb	w0, [x0, #:lo12:.LANCHOR44]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L444
-	adrp	x0, .LANCHOR44
-	ldrb	w1, [x0, #:lo12:.LANCHOR44]
+	cbz	w0, .L472
+	adrp	x0, .LANCHOR45
+	ldrb	w1, [x0, #:lo12:.LANCHOR45]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L444:
-	add	x21, x4, :lo12:.LANCHOR45
+.L472:
+	add	x21, x4, :lo12:.LANCHOR46
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -2285,7 +2422,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR23]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -2302,22 +2439,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR46
+	adrp	x2, .LANCHOR47
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR46]
+	ldrh	w2, [x2, #:lo12:.LANCHOR47]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L442:
+.L470:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L443:
-	ldr	x0, [x24, #:lo12:.LANCHOR23]
+.L471:
+	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -2332,24 +2469,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L446
-	adrp	x0, .LANCHOR42
+	cbz	w23, .L474
+	adrp	x0, .LANCHOR43
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR45]
+	ldr	x8, [x4, #:lo12:.LANCHOR46]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L448:
+.L476:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L449
-.L450:
-	add	x21, x4, :lo12:.LANCHOR45
-	ldr	x0, [x4, #:lo12:.LANCHOR45]
+	bne	.L477
+.L478:
+	add	x21, x4, :lo12:.LANCHOR46
+	ldr	x0, [x4, #:lo12:.LANCHOR46]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -2366,7 +2503,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR23]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -2383,8 +2520,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L442
-.L449:
+	b	.L470
+.L477:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2392,11 +2529,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L448
-.L446:
-	ldr	x1, [x4, #:lo12:.LANCHOR45]
+	b	.L476
+.L474:
+	ldr	x1, [x4, #:lo12:.LANCHOR46]
 	str	w0, [x1]
-	b	.L450
+	b	.L478
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2404,23 +2541,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR47
-	add	x1, x1, :lo12:.LANCHOR47
+	adrp	x1, .LANCHOR48
+	add	x1, x1, :lo12:.LANCHOR48
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR44
-	ldrb	w2, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	ldrb	w2, [x1, #:lo12:.LANCHOR45]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR23
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
-	bne	.L460
+	adrp	x1, .LANCHOR13
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L488
 	str	w0, [x1, 520]
 	ret
-.L460:
+.L488:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2433,29 +2570,29 @@ zftl_flash_de_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
-	adrp	x19, .LANCHOR16
+	adrp	x19, .LANCHOR20
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR16]
-	cbz	w0, .L465
-	adrp	x0, .LANCHOR41
-	ldrb	w0, [x0, #:lo12:.LANCHOR41]
-	tbz	x0, 0, .L465
+	ldrb	w0, [x19, #:lo12:.LANCHOR20]
+	cbz	w0, .L493
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	tbz	x0, 0, .L493
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR16]
-.L465:
-	adrp	x3, .LANCHOR44
-	ldrb	w0, [x3, #:lo12:.LANCHOR44]
-	cbz	w0, .L466
+	strb	wzr, [x19, #:lo12:.LANCHOR20]
+.L493:
+	adrp	x3, .LANCHOR45
+	ldrb	w0, [x3, #:lo12:.LANCHOR45]
+	cbz	w0, .L494
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR44]
+	strb	wzr, [x3, #:lo12:.LANCHOR45]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR44]
-.L466:
+	strb	w0, [x3, #:lo12:.LANCHOR45]
+.L494:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2466,8 +2603,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR44
-	strb	w0, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	strb	w0, [x1, #:lo12:.LANCHOR45]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -2475,10 +2612,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR23
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -2487,10 +2624,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR48
-	add	x1, x0, :lo12:.LANCHOR48
+	adrp	x0, .LANCHOR49
+	add	x1, x0, :lo12:.LANCHOR49
 	mov	w2, 0
-.L480:
+.L508:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2500,14 +2637,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L480
-	add	x0, x0, :lo12:.LANCHOR48
+	bne	.L508
+	add	x0, x0, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
 	adrp	x0, .LANCHOR50
-	strb	w2, [x0, #:lo12:.LANCHOR50]
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR51
+	strb	w2, [x0, #:lo12:.LANCHOR51]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2525,80 +2662,106 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L488
+	bne	.L516
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L484
-	adrp	x1, .LANCHOR51
+	bne	.L512
+	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR51
+	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L484:
+.L512:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L482:
+.L510:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L488:
-	adrp	x0, .LANCHOR48
-	add	x2, x0, :lo12:.LANCHOR48
+.L516:
+	adrp	x0, .LANCHOR49
+	add	x2, x0, :lo12:.LANCHOR49
 	mov	x19, x0
-.L489:
+.L517:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L489
+	bne	.L517
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L486
-	adrp	x1, .LANCHOR51
+	bne	.L514
+	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR51
+	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L486:
-	add	x0, x19, :lo12:.LANCHOR48
+.L514:
+	add	x0, x19, :lo12:.LANCHOR49
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L482
+	b	.L510
 	.size	buf_add_tail, .-buf_add_tail
-	.section	.text.buf_free,"ax",@progbits
+	.section	.text.queue_read_cmd,"ax",@progbits
 	.align	2
-	.global	buf_free
-	.type	buf_free, %function
-buf_free:
-	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR49
+	.type	queue_read_cmd, %function
+queue_read_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 48
+	ldr	w1, [x19, 40]
+	bl	flash_start_page_read
+	strb	wzr, [x19, 59]
+	mov	w0, 1
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR53
+	ldr	x19, [sp, 16]
+	add	x0, x0, :lo12:.LANCHOR53
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+	.size	queue_read_cmd, .-queue_read_cmd
+	.section	.text.buf_free,"ax",@progbits
+	.align	2
+	.global	buf_free
+	.type	buf_free, %function
+buf_free:
+	ldrb	w1, [x0, 2]
+	adrp	x2, .LANCHOR50
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L492
+	cbz	w1, .L522
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L522
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR49
+	add	x0, x2, :lo12:.LANCHOR50
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR50]
+	ldrb	w0, [x1, #:lo12:.LANCHOR51]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
-.L492:
-	ldrb	w1, [x2, #:lo12:.LANCHOR49]
+.L522:
+	ldrb	w1, [x2, #:lo12:.LANCHOR50]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR49]
-	ldrb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x2, #:lo12:.LANCHOR50]
+	ldrb	w0, [x1, #:lo12:.LANCHOR51]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x1, #:lo12:.LANCHOR51]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2609,57 +2772,59 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR50
+	adrp	x19, .LANCHOR51
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbz	w0, .L499
-.L502:
-	adrp	x3, .LANCHOR49
-	adrp	x1, .LANCHOR48
-	add	x0, x1, :lo12:.LANCHOR48
-	ldrb	w2, [x3, #:lo12:.LANCHOR49]
-	ubfiz	x4, x2, 6, 8
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbz	w0, .L535
+.L538:
+	adrp	x2, .LANCHOR50
+	adrp	x1, .LANCHOR49
+	add	x0, x1, :lo12:.LANCHOR49
+	ldrb	w3, [x2, #:lo12:.LANCHOR50]
+	ubfiz	x4, x3, 6, 8
 	add	x0, x0, x4
-	mov	x4, x3
-	cbz	w20, .L500
-.L501:
-	add	x1, x1, :lo12:.LANCHOR48
-	sbfiz	x2, x2, 6, 32
-	add	x3, x1, x2
-	ldrb	w5, [x1, x2]
-	strb	w5, [x4, #:lo12:.LANCHOR49]
-	ldrb	w4, [x19, #:lo12:.LANCHOR50]
-	strh	wzr, [x3, 50]
+	mov	x4, x2
+	cbz	w20, .L536
+.L537:
+	add	x1, x1, :lo12:.LANCHOR49
+	sbfiz	x3, x3, 6, 32
+	add	x2, x1, x3
+	ldrb	w5, [x1, x3]
+	strb	w5, [x4, #:lo12:.LANCHOR50]
+	ldrb	w4, [x19, #:lo12:.LANCHOR51]
+	strh	wzr, [x2, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR50]
+	strb	w4, [x19, #:lo12:.LANCHOR51]
 	mov	w4, 1
-	str	xzr, [x3, 16]
-	strb	w4, [x3, 2]
+	strb	wzr, [x2, 56]
+	strb	w4, [x2, 2]
 	mov	w4, -1
-	strb	w4, [x1, x2]
+	strb	wzr, [x2, 57]
+	strb	w4, [x1, x3]
 	mov	w1, -1
-	str	w1, [x3, 36]
-	b	.L498
-.L499:
+	str	xzr, [x2, 16]
+	str	w1, [x2, 36]
+	b	.L534
+.L535:
 	mov	w2, 121
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR54
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR52
+	add	x1, x1, :lo12:.LANCHOR54
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbnz	w0, .L502
-.L504:
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbnz	w0, .L538
+.L540:
 	mov	x0, 0
-.L498:
+.L534:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L500:
-	ldrb	w3, [x19, #:lo12:.LANCHOR50]
-	cmp	w3, 1
-	bne	.L501
-	b	.L504
+.L536:
+	ldrb	w2, [x19, #:lo12:.LANCHOR51]
+	cmp	w2, 1
+	bne	.L537
+	b	.L540
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2669,30 +2834,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L512
+	bne	.L548
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L516:
+.L552:
 	mov	w0, 1
 	ret
-.L513:
+.L549:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L514
+	bne	.L550
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L516
-.L512:
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
-.L514:
+	b	.L552
+.L548:
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
+.L550:
 	cmp	w2, 255
-	bne	.L513
+	bne	.L549
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2704,32 +2869,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR50
+	adrp	x19, .LANCHOR51
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbnz	w0, .L518
-	adrp	x1, .LANCHOR53
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbnz	w0, .L554
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR53
+	mov	w2, 172
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L518:
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
-	cbz	w0, .L517
+.L554:
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
+	cbz	w0, .L553
 	mov	x1, x20
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	adrp	x0, .LANCHOR50
+	add	x0, x0, :lo12:.LANCHOR50
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L517
-	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	bne	.L553
+	ldrb	w0, [x19, #:lo12:.LANCHOR51]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR50]
+	strb	w0, [x19, #:lo12:.LANCHOR51]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L517:
+.L553:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -2753,8 +2918,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR22
-	ldr	x2, [x2, #:lo12:.LANCHOR22]
+	adrp	x2, .LANCHOR26
+	ldr	x2, [x2, #:lo12:.LANCHOR26]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -2792,8 +2957,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR22
-	ldr	x2, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR26
+	ldr	x2, [x0, #:lo12:.LANCHOR26]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -2814,15 +2979,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR55
+	adrp	x1, .LANCHOR57
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR55]
+	ldrb	w0, [x1, #:lo12:.LANCHOR57]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR55]
+	strb	w0, [x1, #:lo12:.LANCHOR57]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -2832,101 +2997,16 @@ ftl_gc_write_buf:
 zftl_cache_flush:
 	ret
 	.size	zftl_cache_flush, .-zftl_cache_flush
-	.section	.text.ftl_read_buf,"ax",@progbits
-	.align	2
-	.global	ftl_read_buf
-	.type	ftl_read_buf, %function
-ftl_read_buf:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w0
-	adrp	x0, .LANCHOR56
-	str	x21, [sp, 32]
-	mov	x21, x1
-	ldr	w0, [x0, #:lo12:.LANCHOR56]
-	cmp	w0, w20
-	bhi	.L530
-	adrp	x1, .LANCHOR57
-	adrp	x0, .LC0
-	mov	w2, 905
-	add	x1, x1, :lo12:.LANCHOR57
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L530:
-	adrp	x19, .LANCHOR48
-	add	x1, x19, :lo12:.LANCHOR48
-	add	x1, x1, 2
-	mov	w0, 0
-.L533:
-	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L531
-	ldrb	w2, [x1]
-	tbz	x2, 3, .L531
-	ubfiz	x0, x0, 6, 32
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x19, x19, x0
-	orr	w0, w2, 4
-	strb	w0, [x19, 2]
-	tbnz	x2, 0, .L529
-	mov	x0, x19
-	bl	buf_remove_free
-.L529:
-	mov	x0, x19
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L531:
-	add	w0, w0, 1
-	add	x1, x1, 64
-	cmp	w0, 32
-	bne	.L533
-	adrp	x0, .LANCHOR58
-	ldr	w1, [x0, #:lo12:.LANCHOR58]
-	cmn	w1, #1
-	bne	.L534
-	str	w20, [x0, #:lo12:.LANCHOR58]
-	adrp	x0, .LANCHOR59
-	str	x21, [x0, #:lo12:.LANCHOR59]
-.L534:
-	mov	x19, 0
-	b	.L529
-	.size	ftl_read_buf, .-ftl_read_buf
-	.section	.text.ftl_read_buf_free,"ax",@progbits
-	.align	2
-	.global	ftl_read_buf_free
-	.type	ftl_read_buf_free, %function
-ftl_read_buf_free:
-	mov	x5, x0
-	stp	x29, x30, [sp, -16]!
-	mov	x1, x0
-	adrp	x0, .LANCHOR60
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR60
-	bl	buf_remove_buf
-	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L541
-	and	w0, w0, -5
-	strb	w0, [x5, 2]
-	ldp	x29, x30, [sp], 16
-	ret
-.L541:
-	ldp	x29, x30, [sp], 16
-	mov	x0, x5
-	b	buf_free
-	.size	ftl_read_buf_free, .-ftl_read_buf_free
 	.section	.text.zftl_get_density,"ax",@progbits
 	.align	2
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L546
-	adrp	x0, .LANCHOR61
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	cbnz	w0, .L566
+	adrp	x0, .LANCHOR58
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
 	ret
-.L546:
+.L566:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -2951,8 +3031,8 @@ vpn_check:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR59
+	ldrh	w0, [x0, #:lo12:.LANCHOR59]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -2960,8 +3040,8 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR2
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",@progbits
@@ -2981,100 +3061,100 @@ gc_add_sblk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR2
+	adrp	x0, .LANCHOR6
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	and	w24, w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	and	w25, w2, 65535
 	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L555
-	adrp	x1, .LANCHOR63
+	bhi	.L575
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
 	mov	w2, 258
-	add	x1, x1, :lo12:.LANCHOR63
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L555:
-	adrp	x22, .LANCHOR5
+.L575:
+	adrp	x22, .LANCHOR9
 	uxtw	x19, w20
 	lsl	x26, x19, 1
-	adrp	x23, .LANCHOR9
-	ldr	x0, [x22, #:lo12:.LANCHOR5]
-	adrp	x27, .LANCHOR3
+	adrp	x23, .LANCHOR14
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	adrp	x27, .LANCHOR7
 	ldrh	w21, [x0, x26]
-	ldr	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L556
-	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L576
+	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	mov	w4, w21
 	mov	w2, w24
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR64
-	ldrh	w6, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR65+56
+	adrp	x0, .LANCHOR61
+	ldrh	w6, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR62+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR65+56]
+	ldrh	w5, [x0, #:lo12:.LANCHOR62+56]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L556:
-	ldr	x0, [x27, #:lo12:.LANCHOR3]
+.L576:
+	ldr	x0, [x27, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, lsl 2
 	ldrb	w2, [x19, 2]
 	tst	w2, 224
-	bne	.L557
-	cbz	w21, .L577
-	adrp	x1, .LANCHOR63
+	bne	.L577
+	cbz	w21, .L597
+	adrp	x1, .LANCHOR60
 	adrp	x0, .LC0
 	mov	w2, 263
-	add	x1, x1, :lo12:.LANCHOR63
+	add	x1, x1, :lo12:.LANCHOR60
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L577:
+.L597:
 	mov	w0, 0
-	b	.L554
-.L557:
-	adrp	x0, .LANCHOR65
-	add	x1, x0, :lo12:.LANCHOR65
-	ldrh	w0, [x0, #:lo12:.LANCHOR65]
+	b	.L574
+.L577:
+	adrp	x0, .LANCHOR62
+	add	x1, x0, :lo12:.LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w0, w20
-	beq	.L577
-	adrp	x21, .LANCHOR6
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	beq	.L597
+	adrp	x21, .LANCHOR10
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w3, [x0, 48]
 	cmp	w3, w20
-	beq	.L577
+	beq	.L597
 	ldrh	w3, [x0, 16]
 	cmp	w3, w20
-	beq	.L577
+	beq	.L597
 	ldrh	w3, [x0, 80]
 	cmp	w3, w20
-	beq	.L577
+	beq	.L597
 	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
 	mov	w3, 0
-.L559:
+.L579:
 	cmp	w3, w4
-	bcc	.L560
-	cbnz	w24, .L564
-	adrp	x1, .LANCHOR66
-	ldrh	w5, [x1, #:lo12:.LANCHOR66]
+	bcc	.L580
+	cbnz	w24, .L584
+	adrp	x1, .LANCHOR63
+	ldrh	w5, [x1, #:lo12:.LANCHOR63]
 	cmp	w20, w5
-	beq	.L577
-	adrp	x3, .LANCHOR67
-	add	x3, x3, :lo12:.LANCHOR67
+	beq	.L597
+	adrp	x3, .LANCHOR64
+	add	x3, x3, :lo12:.LANCHOR64
 	mov	x1, 0
-.L563:
+.L583:
 	ldrh	w6, [x1, x3]
 	cmp	w20, w6
-	bne	.L562
-	ldr	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L577
-	ldr	x0, [x22, #:lo12:.LANCHOR5]
+	bne	.L582
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L597
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w4, w20
 	ubfx	x2, x2, 5, 3
 	mov	w1, w20
@@ -3082,51 +3162,51 @@ gc_add_sblk:
 	adrp	x0, .LC42
 	add	x0, x0, :lo12:.LC42
 	bl	printf
-	b	.L577
-.L560:
+	b	.L597
+.L580:
 	ldrh	w5, [x1], 2
 	cmp	w5, w20
-	beq	.L577
+	beq	.L597
 	add	w3, w3, 1
-	b	.L559
-.L562:
+	b	.L579
+.L582:
 	add	x1, x1, 2
 	cmp	x1, 16
-	bne	.L563
+	bne	.L583
 	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L565:
-	ldr	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L566
-	ldr	x0, [x22, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR64
+.L585:
+	ldr	w0, [x23, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L586
+	ldr	x0, [x22, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR61
 	mov	w5, w4
 	ubfx	x3, x2, 5, 3
-	ldrh	w6, [x1, #:lo12:.LANCHOR64]
+	ldrh	w6, [x1, #:lo12:.LANCHOR61]
 	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L566:
+.L586:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L569:
+.L589:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L567
+	bne	.L587
 	strh	w20, [x0]
-	cbz	w24, .L568
-	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	cbz	w24, .L588
+	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L587:
+.L607:
 	mov	w0, 1
-.L554:
+.L574:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3134,30 +3214,30 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L564:
+.L584:
 	add	x19, x0, 392
-	b	.L565
-.L568:
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	b	.L585
+.L588:
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x25, x0, x25, uxth 1
 	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
 	strh	w0, [x25, 120]
-	b	.L587
-.L567:
+	b	.L607
+.L587:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L569
-	b	.L587
+	bne	.L589
+	b	.L607
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR68
+	adrp	x1, .LANCHOR65
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR68]
+	ldr	x1, [x1, #:lo12:.LANCHOR65]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3169,18 +3249,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR66
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR48
-	add	x23, x23, :lo12:.LANCHOR69
-	add	x22, x24, :lo12:.LANCHOR48
+	adrp	x24, .LANCHOR49
+	add	x23, x23, :lo12:.LANCHOR66
+	add	x22, x24, :lo12:.LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L590:
+.L610:
 	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L601
+	bne	.L621
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3188,47 +3268,47 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L601:
+.L621:
 	lsl	x1, x19, 6
-	add	x0, x24, :lo12:.LANCHOR48
+	add	x0, x24, :lo12:.LANCHOR49
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
 	strb	w0, [x23]
 	ldrh	w25, [x2, 48]
-	cbz	w1, .L591
+	cbz	w1, .L611
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR65
-	add	x0, x0, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR62
+	add	x0, x0, :lo12:.LANCHOR62
 	mov	w3, 1
 	str	w2, [x0, 324]
 	strh	w3, [x0, 320]
 	adrp	x0, .LC43
 	add	x0, x0, :lo12:.LC43
 	bl	printf
-	adrp	x1, .LANCHOR70
+	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
 	mov	w2, 539
-	add	x1, x1, :lo12:.LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L591:
-	adrp	x26, .LANCHOR71
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+.L611:
+	adrp	x26, .LANCHOR68
+	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L602
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	bne	.L622
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L592:
-	adrp	x0, .LANCHOR9
-	adrp	x28, .LANCHOR72
+.L612:
+	adrp	x0, .LANCHOR14
+	adrp	x28, .LANCHOR69
 	and	x21, x25, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L593
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L613
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	w3, w25
 	ldrb	w2, [x0, 1]
@@ -3237,55 +3317,55 @@ gc_write_completed:
 	add	x0, x0, :lo12:.LC44
 	mov	w1, w25
 	bl	printf
-.L593:
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+.L613:
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	add	x0, x22, x19, lsl 6
 	mov	x27, x21
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L594
-	adrp	x1, .LANCHOR70
+	beq	.L614
+	adrp	x1, .LANCHOR67
 	adrp	x0, .LC0
 	mov	w2, 546
-	add	x1, x1, :lo12:.LANCHOR70
+	add	x1, x1, :lo12:.LANCHOR67
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L594:
+.L614:
 	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L595
-	ldrb	w0, [x26, #:lo12:.LANCHOR71]
+	beq	.L615
+	ldrb	w0, [x26, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L595
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbnz	w0, .L595
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	bne	.L615
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbnz	w0, .L615
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	mov	x0, 0
 	add	x21, x1, x21
-.L596:
+.L616:
 	cmp	w20, w0, uxth
-	bls	.L590
+	bls	.L610
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L596
-.L602:
+	b	.L616
+.L622:
 	mov	w20, 1
-	b	.L592
-.L595:
-	adrp	x19, .LANCHOR65
-	add	x19, x19, :lo12:.LANCHOR65
+	b	.L612
+.L615:
+	adrp	x19, .LANCHOR62
+	add	x19, x19, :lo12:.LANCHOR62
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w25, [x19, 316]
-.L597:
+.L617:
 	cmp	x20, x27
-	beq	.L590
-	ldr	x1, [x28, #:lo12:.LANCHOR72]
+	beq	.L610
+	ldr	x1, [x28, #:lo12:.LANCHOR69]
 	ldrb	w0, [x1, x27]
 	strb	w21, [x1, x27]
 	add	x27, x27, 1
@@ -3298,56 +3378,56 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L597
+	b	.L617
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR6
-	ldr	x2, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR74
-	ldrb	w3, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR10
+	ldr	x2, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LANCHOR71
+	ldrb	w3, [x0, #:lo12:.LANCHOR71]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L614
+	cbz	w0, .L634
 	add	x1, x2, 392
 	mov	w4, 1
-.L615:
+.L635:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L619:
+.L639:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L617
+	beq	.L637
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L618
+	cbz	w4, .L638
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L614:
+.L634:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L620
+	cbz	w0, .L640
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L615
-.L618:
+	b	.L635
+.L638:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L617:
+.L637:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L619
+	bne	.L639
 	ret
-.L620:
+.L640:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3359,86 +3439,86 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR65
-	add	x0, x20, :lo12:.LANCHOR65
+	adrp	x20, .LANCHOR62
+	add	x0, x20, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L629
-	adrp	x1, .LANCHOR50
-	ldrb	w1, [x1, #:lo12:.LANCHOR50]
+	cbz	w1, .L649
+	adrp	x1, .LANCHOR51
+	ldrb	w1, [x1, #:lo12:.LANCHOR51]
 	cmp	w1, 1
-	bhi	.L629
+	bhi	.L649
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	adrp	x21, .LANCHOR72
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	adrp	x0, .LANCHOR72
+	adrp	x21, .LANCHOR69
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldr	x4, [x21, #:lo12:.LANCHOR72]
+	ldrh	w0, [x0, #:lo12:.LANCHOR72]
+	ldr	x4, [x21, #:lo12:.LANCHOR69]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
-.L624:
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
+.L644:
 	cmp	w19, w1
-	bcc	.L627
-.L629:
+	bcc	.L647
+.L649:
 	mov	w0, 0
-	b	.L622
-.L627:
+	b	.L642
+.L647:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L625
+	beq	.L645
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L625
+	cbnz	w3, .L645
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L626
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L646
+	ldr	x0, [x21, #:lo12:.LANCHOR69]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
 	adrp	x0, .LC45
 	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L626:
-	ldr	x0, [x21, #:lo12:.LANCHOR72]
-	add	x20, x20, :lo12:.LANCHOR65
+.L646:
+	ldr	x0, [x21, #:lo12:.LANCHOR69]
+	add	x20, x20, :lo12:.LANCHOR62
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L622:
+.L642:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L625:
+.L645:
 	add	w19, w19, 1
-	b	.L624
+	b	.L644
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR77
-	adrp	x1, .LANCHOR65
-	add	x0, x1, :lo12:.LANCHOR65
-	ldrh	w6, [x2, #:lo12:.LANCHOR77]
-	adrp	x2, .LANCHOR50
-	ldrh	w1, [x1, #:lo12:.LANCHOR65]
+	adrp	x2, .LANCHOR74
+	adrp	x1, .LANCHOR62
+	add	x0, x1, :lo12:.LANCHOR62
+	ldrh	w6, [x2, #:lo12:.LANCHOR74]
+	adrp	x2, .LANCHOR51
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR50]
+	ldrb	w4, [x2, #:lo12:.LANCHOR51]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
 	adrp	x0, .LC46
@@ -3453,21 +3533,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L639
+	bne	.L659
 	mov	w1, w0
-	adrp	x0, .LANCHOR78
-	ldr	x0, [x0, #:lo12:.LANCHOR78]
-.L641:
+	adrp	x0, .LANCHOR75
+	ldr	x0, [x0, #:lo12:.LANCHOR75]
+.L661:
 	b	_list_get_gc_head_node.isra.2
-.L639:
+.L659:
 	cmp	w1, 2
-	bne	.L640
-	b	zftl_get_gc_node.part.10
-.L640:
+	bne	.L660
+	b	zftl_get_gc_node.part.9
+.L660:
 	mov	w1, w0
-	adrp	x0, .LANCHOR79
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
-	b	.L641
+	adrp	x0, .LANCHOR76
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	b	.L661
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3481,16 +3561,16 @@ gc_search_src_blk:
 	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
 	str	w0, [x29, 112]
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR10
 	stp	x23, x24, [sp, 48]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L643
+	cbz	w19, .L663
 	mov	w0, w19
-.L642:
+.L662:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3498,72 +3578,72 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L643:
+.L663:
 	and	w20, w2, 255
-	cbnz	w21, .L645
-	adrp	x24, .LANCHOR80
-	adrp	x26, .LANCHOR9
+	cbnz	w21, .L665
+	adrp	x24, .LANCHOR77
+	adrp	x26, .LANCHOR14
 	adrp	x27, .LC47
 	and	w22, w20, 65535
-	add	x26, x26, :lo12:.LANCHOR9
+	add	x26, x26, :lo12:.LANCHOR14
 	add	x27, x27, :lo12:.LC47
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	mov	w23, 0
 	mov	w25, 0
-.L646:
+.L666:
 	cmp	w25, w22
-	bcs	.L651
-	ldrh	w6, [x24, #:lo12:.LANCHOR80]
-	add	x7, x24, :lo12:.LANCHOR80
+	bcs	.L671
+	ldrh	w6, [x24, #:lo12:.LANCHOR77]
+	add	x7, x24, :lo12:.LANCHOR77
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR80]
+	strh	w2, [x24, #:lo12:.LANCHOR77]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L647
+	beq	.L667
 	ldr	w0, [x26]
-	adrp	x6, .LANCHOR5
+	adrp	x6, .LANCHOR9
 	uxtw	x4, w1
-	tbz	x0, 8, .L648
-	ldr	x0, [x6, #:lo12:.LANCHOR5]
+	tbz	x0, 8, .L668
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L648:
-	ldr	x0, [x6, #:lo12:.LANCHOR5]
+.L668:
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR64
-	ldrh	w0, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR61
+	ldrh	w0, [x0, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bcs	.L649
+	bcs	.L669
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L650
+	cbz	w0, .L670
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L650
-.L651:
+	bcs	.L670
+.L671:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L653
-	adrp	x25, .LANCHOR82
-	adrp	x24, .LANCHOR81
-	add	x27, x25, :lo12:.LANCHOR82
-	add	x24, x24, :lo12:.LANCHOR81
+	tbz	x0, 1, .L673
+	adrp	x25, .LANCHOR79
+	adrp	x24, .LANCHOR78
+	add	x27, x25, :lo12:.LANCHOR79
+	add	x24, x24, :lo12:.LANCHOR78
 	mov	w28, 0
 	mov	w26, 65535
-.L654:
+.L674:
 	cmp	w28, w22
-	beq	.L658
+	beq	.L678
 	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
@@ -3572,114 +3652,114 @@ gc_search_src_blk:
 	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L655
-	adrp	x2, .LANCHOR5
+	beq	.L675
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L655
+	bcs	.L675
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L657
+	cbz	w0, .L677
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bcs	.L657
-.L658:
+	bcs	.L677
+.L678:
 	cmp	w23, w22
-	adrp	x0, .LANCHOR83
-	bcs	.L660
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x3, .LANCHOR76
-	adrp	x0, .LANCHOR75
-	ldrh	w2, [x25, #:lo12:.LANCHOR82]
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR80
+	bcs	.L680
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x3, .LANCHOR73
+	adrp	x0, .LANCHOR72
+	ldrh	w2, [x25, #:lo12:.LANCHOR79]
+	ldrb	w3, [x3, #:lo12:.LANCHOR73]
+	ldrh	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w0, w0, w3
 	sub	w0, w0, w1, lsr 2
 	cmp	w2, w0
-	bge	.L653
+	bge	.L673
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x25, #:lo12:.LANCHOR82]
-.L653:
+	strh	w1, [x25, #:lo12:.LANCHOR79]
+.L673:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L661
+	tbz	x0, 0, .L681
 	cmp	w23, w22
-	bcs	.L661
-	adrp	x24, .LANCHOR84
-	add	x24, x24, :lo12:.LANCHOR84
+	bcs	.L681
+	adrp	x24, .LANCHOR81
+	add	x24, x24, :lo12:.LANCHOR81
 	mov	w25, 65535
-.L666:
+.L686:
 	ldrh	w6, [x24]
 	mov	w0, w6
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L662
+	beq	.L682
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L663
+	cbz	w0, .L683
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w22, w23
-	bhi	.L663
-.L664:
-	adrp	x0, .LANCHOR83
-	adrp	x1, .LANCHOR64
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrh	w2, [x1, #:lo12:.LANCHOR64]
+	bhi	.L683
+.L684:
+	adrp	x0, .LANCHOR80
+	adrp	x1, .LANCHOR61
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
 	cmp	w2, w0, lsr 1
-	bls	.L661
+	bls	.L681
 	sub	w0, w2, w0, lsr 3
-	b	.L741
-.L649:
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	b	.L651
-.L647:
+	b	.L761
+.L669:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	b	.L671
+.L667:
 	strh	wzr, [x7]
-	b	.L651
-.L650:
+	b	.L671
+.L670:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L646
-.L655:
+	b	.L666
+.L675:
 	strh	wzr, [x24]
-	b	.L658
-.L657:
+	b	.L678
+.L677:
 	add	w28, w28, 1
 	and	w28, w28, 65535
-	b	.L654
-.L660:
-	ldrh	w1, [x25, #:lo12:.LANCHOR82]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	b	.L674
+.L680:
+	ldrh	w1, [x25, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bls	.L653
+	bls	.L673
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR82]
-	b	.L653
-.L662:
+	strh	w0, [x25, #:lo12:.LANCHOR79]
+	b	.L673
+.L682:
 	strh	wzr, [x24]
-.L665:
+.L685:
 	cmp	w23, w22
-	bcs	.L664
-	adrp	x1, .LANCHOR64
-	adrp	x0, .LANCHOR83
-	ldrh	w2, [x1, #:lo12:.LANCHOR64]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bcs	.L684
+	adrp	x1, .LANCHOR61
+	adrp	x0, .LANCHOR80
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w2, w0
-	bcs	.L661
+	bcs	.L681
 	add	w0, w2, w0, lsr 3
-.L741:
-	strh	w0, [x1, #:lo12:.LANCHOR64]
-.L661:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L688
+.L761:
+	strh	w0, [x1, #:lo12:.LANCHOR61]
+.L681:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L708
 	ldr	w2, [x29, 112]
 	adrp	x0, .LC48
 	mov	w4, w20
@@ -3687,104 +3767,104 @@ gc_search_src_blk:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L688:
+.L708:
 	mov	w0, w23
-	b	.L642
-.L663:
+	b	.L662
+.L683:
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	cmp	w22, w19
-	bne	.L666
-	b	.L665
-.L645:
-	adrp	x0, .LANCHOR65+318
-	strh	wzr, [x0, #:lo12:.LANCHOR65+318]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	bne	.L686
+	b	.L685
+.L665:
+	adrp	x0, .LANCHOR62+318
+	strh	wzr, [x0, #:lo12:.LANCHOR62+318]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x0, #:lo12:.LANCHOR82]
 	ldr	w0, [x29, 112]
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L691
-	adrp	x1, .LANCHOR87
-	adrp	x25, .LANCHOR86
+	tbz	x0, 0, .L711
+	adrp	x1, .LANCHOR84
+	adrp	x25, .LANCHOR83
 	str	x1, [x29, 96]
-	adrp	x26, .LANCHOR88
-	ldrh	w0, [x25, #:lo12:.LANCHOR86]
-	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	adrp	x26, .LANCHOR85
+	ldrh	w0, [x25, #:lo12:.LANCHOR83]
+	ldrh	w2, [x1, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsr 2
-	bcc	.L668
-	ldrh	w1, [x26, #:lo12:.LANCHOR88]
+	bcc	.L688
+	ldrh	w1, [x26, #:lo12:.LANCHOR85]
 	cmp	w1, w0
-	bls	.L692
-.L668:
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
-	adrp	x22, .LANCHOR84
+	bls	.L712
+.L688:
+	ldrh	w0, [x26, #:lo12:.LANCHOR85]
+	adrp	x22, .LANCHOR81
 	lsr	w0, w0, 2
-	strh	w0, [x22, #:lo12:.LANCHOR84]
+	strh	w0, [x22, #:lo12:.LANCHOR81]
 	mov	w0, 0
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L694
-	adrp	x2, .LANCHOR5
+	beq	.L714
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR5]
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	ldr	x3, [x2, #:lo12:.LANCHOR9]
+	adrp	x2, .LANCHOR80
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	ldrh	w1, [x3, x1]
 	cmp	w1, w2, lsr 2
-	bcs	.L694
-	strh	wzr, [x22, #:lo12:.LANCHOR84]
+	bcs	.L714
+	strh	wzr, [x22, #:lo12:.LANCHOR81]
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
 	cmp	w0, 0
 	cset	w23, ne
-.L670:
-	add	x22, x22, :lo12:.LANCHOR84
+.L690:
+	add	x22, x22, :lo12:.LANCHOR81
 	and	w28, w20, 65535
 	mov	w24, 64
 	mov	w27, 65535
-.L672:
+.L692:
 	ldrh	w6, [x22]
 	mov	w0, w6
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	add	w6, w6, 1
 	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L669
+	beq	.L689
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L671
+	cbz	w0, .L691
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w28
-	bcs	.L669
-.L671:
+	bcs	.L689
+.L691:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L672
-.L669:
+	bne	.L692
+.L689:
 	ldr	x0, [x29, 96]
-	ldrh	w1, [x25, #:lo12:.LANCHOR86]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x25, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	cmp	w1, w0, lsr 3
-	bhi	.L689
-	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	bhi	.L709
+	ldrh	w0, [x26, #:lo12:.LANCHOR85]
 	add	w0, w0, 8
 	cmp	w1, w0
-	ble	.L667
-.L689:
-	adrp	x24, .LANCHOR80
+	ble	.L687
+.L709:
+	adrp	x24, .LANCHOR77
 	and	w26, w20, 65535
 	mov	w22, 64
 	mov	w25, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR80]
-	add	x24, x24, :lo12:.LANCHOR80
-.L674:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	add	x24, x24, :lo12:.LANCHOR77
+.L694:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3792,31 +3872,31 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w25, w0, uxth
-	beq	.L667
+	beq	.L687
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L673
+	cbz	w0, .L693
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w26
-	bcs	.L667
-.L673:
+	bcs	.L687
+.L693:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L674
-.L667:
+	bne	.L694
+.L687:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L675
-	adrp	x24, .LANCHOR81
-	adrp	x28, .LANCHOR89
-	adrp	x25, .LANCHOR76
-	add	x26, x24, :lo12:.LANCHOR81
-	add	x27, x28, :lo12:.LANCHOR89
-	add	x25, x25, :lo12:.LANCHOR76
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	tbz	x0, 1, .L695
+	adrp	x24, .LANCHOR78
+	adrp	x28, .LANCHOR86
+	adrp	x25, .LANCHOR73
+	add	x26, x24, :lo12:.LANCHOR78
+	add	x27, x28, :lo12:.LANCHOR86
+	add	x25, x25, :lo12:.LANCHOR73
+	strh	wzr, [x24, #:lo12:.LANCHOR78]
 	mov	w22, 64
-.L680:
+.L700:
 	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
@@ -3826,159 +3906,159 @@ gc_search_src_blk:
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L676
+	beq	.L696
 	cmp	w20, 1
-	bne	.L677
-	adrp	x3, .LANCHOR75
+	bne	.L697
+	adrp	x3, .LANCHOR72
 	ldrb	w2, [x25]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldrh	w3, [x3, #:lo12:.LANCHOR72]
 	mul	w3, w2, w3
-	adrp	x2, .LANCHOR83
-	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	adrp	x2, .LANCHOR80
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	sub	w2, w3, w2, lsr 3
 	strh	w2, [x27]
-.L677:
-	adrp	x2, .LANCHOR5
+.L697:
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L678
+	bcs	.L698
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L679
+	cbz	w0, .L699
 	add	w5, w23, 1
 	add	w19, w19, 1
 	and	w23, w5, 65535
 	and	w19, w19, 65535
 	cmp	w23, w20
-	bcc	.L679
-.L676:
+	bcc	.L699
+.L696:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	adrp	x3, .LANCHOR76
-	bcc	.L681
-	cbnz	w19, .L682
-	adrp	x1, .LANCHOR90
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	adrp	x0, .LANCHOR80
+	adrp	x3, .LANCHOR73
+	bcc	.L701
+	cbnz	w19, .L702
+	adrp	x1, .LANCHOR87
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR88
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
 	cmp	w2, w1
-	bls	.L682
-.L681:
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR75
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	ldrh	w1, [x28, #:lo12:.LANCHOR89]
+	bls	.L702
+.L701:
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w3, [x3, #:lo12:.LANCHOR73]
+	ldrh	w0, [x0, #:lo12:.LANCHOR72]
+	ldrh	w1, [x28, #:lo12:.LANCHOR86]
 	lsr	w2, w2, 3
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L675
+	bge	.L695
 	add	w1, w1, w2
-	strh	w1, [x28, #:lo12:.LANCHOR89]
-.L675:
+	strh	w1, [x28, #:lo12:.LANCHOR86]
+.L695:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L661
-	adrp	x25, .LANCHOR80
-	adrp	x22, .LANCHOR92
-	adrp	x26, .LANCHOR87
-	adrp	x27, .LANCHOR86
-	add	x28, x22, :lo12:.LANCHOR92
-	add	x26, x26, :lo12:.LANCHOR87
-	add	x27, x27, :lo12:.LANCHOR86
-	strh	wzr, [x25, #:lo12:.LANCHOR80]
+	cbz	w0, .L681
+	adrp	x25, .LANCHOR77
+	adrp	x22, .LANCHOR89
+	adrp	x26, .LANCHOR84
+	adrp	x27, .LANCHOR83
+	add	x28, x22, :lo12:.LANCHOR89
+	add	x26, x26, :lo12:.LANCHOR84
+	add	x27, x27, :lo12:.LANCHOR83
+	strh	wzr, [x25, #:lo12:.LANCHOR77]
 	mov	w24, 64
-.L686:
-	ldrh	w6, [x25, #:lo12:.LANCHOR80]
+.L706:
+	ldrh	w6, [x25, #:lo12:.LANCHOR77]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x25, #:lo12:.LANCHOR80]
+	strh	w6, [x25, #:lo12:.LANCHOR77]
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L683
-	adrp	x2, .LANCHOR5
+	beq	.L703
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L684
+	bls	.L704
 	cmp	w1, 2
-	bls	.L684
+	bls	.L704
 	ldrh	w2, [x26]
 	ldrh	w1, [x27]
 	cmp	w1, w2, lsr 1
-	bls	.L683
-.L684:
+	bls	.L703
+.L704:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L685
+	cbz	w0, .L705
 	add	w5, w23, 1
 	and	w23, w5, 65535
 	cmp	w23, w20
-	bcs	.L683
-.L685:
+	bcs	.L703
+.L705:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L686
-.L683:
+	bne	.L706
+.L703:
 	cmp	w23, w20
-	adrp	x0, .LANCHOR83
-	bcs	.L687
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrh	w1, [x22, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR80
+	bcs	.L707
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w1, [x22, #:lo12:.LANCHOR89]
 	cmp	w1, w0, lsr 1
-	bls	.L661
+	bls	.L681
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x22, #:lo12:.LANCHOR92]
-	b	.L661
-.L694:
+	strh	w0, [x22, #:lo12:.LANCHOR89]
+	b	.L681
+.L714:
 	mov	w23, 0
-	b	.L670
-.L691:
+	b	.L690
+.L711:
 	mov	w23, 0
-	b	.L667
-.L678:
-	strh	wzr, [x24, #:lo12:.LANCHOR81]
-	b	.L676
-.L679:
+	b	.L687
+.L698:
+	strh	wzr, [x24, #:lo12:.LANCHOR78]
+	b	.L696
+.L699:
 	sub	w22, w22, #1
 	ands	w22, w22, 65535
-	bne	.L680
-	b	.L676
-.L682:
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	ldrb	w1, [x3, #:lo12:.LANCHOR76]
-	ldrh	w2, [x28, #:lo12:.LANCHOR89]
+	bne	.L700
+	b	.L696
+.L702:
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrb	w1, [x3, #:lo12:.LANCHOR73]
+	ldrh	w2, [x28, #:lo12:.LANCHOR86]
 	mul	w1, w1, w0
 	cmp	w2, w1
-	ble	.L675
+	ble	.L695
 	sub	w0, w2, w0, lsr 3
-	strh	w0, [x28, #:lo12:.LANCHOR89]
-	b	.L675
-.L687:
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrh	w2, [x22, #:lo12:.LANCHOR92]
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	strh	w0, [x28, #:lo12:.LANCHOR86]
+	b	.L695
+.L707:
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR73
+	ldrh	w2, [x22, #:lo12:.LANCHOR89]
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w0, w0, w1
 	sub	w0, w0, #32
 	cmp	w2, w0
-	bge	.L661
+	bge	.L681
 	add	w1, w2, w1, lsr 3
-	strh	w1, [x22, #:lo12:.LANCHOR92]
-	b	.L661
-.L692:
+	strh	w1, [x22, #:lo12:.LANCHOR89]
+	b	.L681
+.L712:
 	mov	w23, 0
-	b	.L669
+	b	.L689
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -3986,32 +4066,32 @@ gc_search_src_blk:
 	.type	zftl_insert_free_list, %function
 zftl_insert_free_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L743
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L745:
+	bne	.L763
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR91
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR91
+.L765:
 	b	_insert_free_list
-.L743:
+.L763:
 	cmp	w0, 16
-	bne	.L744
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L745
-.L744:
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L745
+	bne	.L764
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
+	b	.L765
+.L764:
+	adrp	x2, .LANCHOR94
+	adrp	x0, .LANCHOR95
+	add	x2, x2, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L765
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -4019,36 +4099,36 @@ zftl_insert_free_list:
 	.type	zftl_insert_data_list, %function
 zftl_insert_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L747
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
-.L750:
+	bne	.L767
+	adrp	x2, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
+.L770:
 	b	_insert_data_list
-.L747:
+.L767:
 	cmp	w2, 96
-	bne	.L748
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L750
-.L748:
+	bne	.L768
+	adrp	x2, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L770
+.L768:
 	cmp	w2, 160
-	bne	.L746
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L750
-.L746:
+	bne	.L766
+	adrp	x2, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L770
+.L766:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
@@ -4059,69 +4139,69 @@ zftl_gc_get_free_sblk:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR6
+	adrp	x20, .LANCHOR10
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 65535
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	and	w22, w1, 65535
 	ldrh	w19, [x0, 588]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L752
-	cbnz	w21, .L752
+	beq	.L772
+	cbnz	w21, .L772
 	mov	w1, w19
 	adrp	x0, .LC49
 	add	x0, x0, :lo12:.LC49
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x20, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 588]
-.L753:
+.L773:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L752:
-	adrp	x2, .LANCHOR95
-	adrp	x20, .LANCHOR97
-	ldrh	w0, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x20, #:lo12:.LANCHOR97]
+.L772:
+	adrp	x2, .LANCHOR92
+	adrp	x20, .LANCHOR94
+	ldrh	w0, [x2, #:lo12:.LANCHOR92]
+	ldrh	w1, [x20, #:lo12:.LANCHOR94]
 	cmp	w0, w1
-	bls	.L754
+	bls	.L774
 	lsr	w1, w0, 3
 	cmp	w21, 0
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR93
 	csel	w1, w1, wzr, ne
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-.L768:
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
+.L788:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L759
-	adrp	x0, .LANCHOR93
-	ldrh	w5, [x20, #:lo12:.LANCHOR97]
+	bne	.L779
+	adrp	x0, .LANCHOR90
+	ldrh	w5, [x20, #:lo12:.LANCHOR94]
 	mov	w2, w22
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	ldrh	w4, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldr	x3, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L759:
-	cbz	w21, .L753
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L753
-	adrp	x4, .LANCHOR5
-	adrp	x1, .LANCHOR3
+.L779:
+	cbz	w21, .L773
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L773
+	adrp	x4, .LANCHOR9
+	adrp	x1, .LANCHOR7
 	uxtw	x3, w19
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	lsl	x0, x3, 2
-	ldr	x6, [x4, #:lo12:.LANCHOR5]
+	ldr	x6, [x4, #:lo12:.LANCHOR9]
 	add	x2, x1, x0
 	ldr	w4, [x1, x0]
 	ldrh	w6, [x6, x3, lsl 1]
@@ -4135,20 +4215,20 @@ zftl_gc_get_free_sblk:
 	ubfx	x2, x2, 5, 3
 	add	x0, x0, :lo12:.LC51
 	bl	printf
-	b	.L753
-.L754:
-	cbnz	w21, .L757
+	b	.L773
+.L774:
+	cbnz	w21, .L777
 	lsr	w1, w1, 2
-.L758:
-	adrp	x0, .LANCHOR98
-	add	x2, x20, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L768
-.L757:
+.L778:
+	adrp	x0, .LANCHOR95
+	add	x2, x20, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L788
+.L777:
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-	b	.L758
+	b	.L778
 	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
@@ -4161,99 +4241,99 @@ zftl_get_free_sblk:
 	and	w20, w1, 65535
 	str	x21, [sp, 32]
 	cmp	w20, 5
-	bne	.L770
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR97
-	ldrh	w3, [x2, #:lo12:.LANCHOR95]
-	ldrh	w1, [x0, #:lo12:.LANCHOR97]
+	bne	.L790
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR94
+	ldrh	w3, [x2, #:lo12:.LANCHOR92]
+	ldrh	w1, [x0, #:lo12:.LANCHOR94]
 	cmp	w3, w1
-	bcc	.L771
-	adrp	x4, .LANCHOR93
-	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	bcc	.L791
+	adrp	x4, .LANCHOR90
+	ldrh	w4, [x4, #:lo12:.LANCHOR90]
 	cmp	w4, w3
-	bls	.L772
-	cbz	w1, .L772
-.L771:
-	add	x2, x0, :lo12:.LANCHOR97
-	lsr	w1, w1, 1
+	bls	.L792
+	cbz	w1, .L792
 .L791:
-	adrp	x0, .LANCHOR98
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L790
-.L772:
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
+	add	x2, x0, :lo12:.LANCHOR94
+	lsr	w1, w1, 1
+.L811:
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L810
+.L792:
+	adrp	x0, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
 	mov	w1, 0
-.L790:
+.L810:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L775
-	adrp	x0, .LANCHOR97
+	bne	.L795
+	adrp	x0, .LANCHOR94
 	mov	w2, w20
 	mov	w1, w19
-	ldrh	w5, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR93
-	ldrh	w4, [x0, #:lo12:.LANCHOR93]
-	adrp	x0, .LANCHOR94
-	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	ldrh	w5, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR90
+	ldrh	w4, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldr	x3, [x0, #:lo12:.LANCHOR91]
 	adrp	x0, .LC50
 	add	x0, x0, :lo12:.LC50
 	bl	printf
-	b	.L775
-.L770:
-	adrp	x21, .LANCHOR6
+	b	.L795
+.L790:
+	adrp	x21, .LANCHOR10
 	and	w0, w0, 65535
-	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	ldrh	w19, [x1, 590]
 	mov	w1, 65535
 	cmp	w19, w1
-	beq	.L774
+	beq	.L794
 	cmp	w20, 1
-	beq	.L774
+	beq	.L794
 	mov	w1, w19
 	adrp	x0, .LC52
 	add	x0, x0, :lo12:.LC52
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 590]
-.L775:
+.L795:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L774:
-	adrp	x2, .LANCHOR93
-	adrp	x4, .LANCHOR97
-	ldrh	w1, [x2, #:lo12:.LANCHOR93]
-	ldrh	w3, [x4, #:lo12:.LANCHOR97]
+.L794:
+	adrp	x2, .LANCHOR90
+	adrp	x4, .LANCHOR94
+	ldrh	w1, [x2, #:lo12:.LANCHOR90]
+	ldrh	w3, [x4, #:lo12:.LANCHOR94]
 	cmp	w1, w3
-	bcc	.L776
-	adrp	x5, .LANCHOR95
-	ldrh	w5, [x5, #:lo12:.LANCHOR95]
+	bcc	.L796
+	adrp	x5, .LANCHOR92
+	ldrh	w5, [x5, #:lo12:.LANCHOR92]
 	cmp	w5, w1
-	bls	.L777
-	cbz	w3, .L777
-.L776:
+	bls	.L797
+	cbz	w3, .L797
+.L796:
 	cmp	w20, 1
 	lsr	w3, w3, 1
 	csel	w0, w3, w0, eq
-	add	x2, x4, :lo12:.LANCHOR97
+	add	x2, x4, :lo12:.LANCHOR94
 	mov	w1, w0
-	b	.L791
-.L777:
+	b	.L811
+.L797:
 	lsr	w1, w1, 1
 	cmp	w20, 1
 	csel	w0, w1, w0, eq
-	add	x2, x2, :lo12:.LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR90
 	mov	w1, w0
-	adrp	x0, .LANCHOR94
-	add	x0, x0, :lo12:.LANCHOR94
-	b	.L790
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
+	b	.L810
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4261,36 +4341,36 @@ zftl_get_free_sblk:
 	.type	zftl_remove_data_node, %function
 zftl_remove_data_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L793
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
-.L796:
+	bne	.L813
+	adrp	x2, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
+.L816:
 	b	_list_remove_node
-.L793:
+.L813:
 	cmp	w2, 96
-	bne	.L794
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L796
-.L794:
+	bne	.L814
+	adrp	x2, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L816
+.L814:
 	cmp	w2, 160
-	bne	.L792
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L796
-.L792:
+	bne	.L812
+	adrp	x2, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L816
+.L812:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4299,32 +4379,32 @@ zftl_remove_data_node:
 	.type	zftl_remove_free_node, %function
 zftl_remove_free_node:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L798
-	adrp	x2, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR94
-.L800:
+	bne	.L818
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR91
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR91
+.L820:
 	b	_list_remove_node
-.L798:
+.L818:
 	cmp	w0, 16
-	bne	.L799
-	adrp	x2, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x2, x2, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L800
-.L799:
-	adrp	x2, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x2, x2, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L800
+	bne	.L819
+	adrp	x2, .LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
+	b	.L820
+.L819:
+	adrp	x2, .LANCHOR94
+	adrp	x0, .LANCHOR95
+	add	x2, x2, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L820
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4332,36 +4412,36 @@ zftl_remove_free_node:
 	.type	zftl_list_update_data_list, %function
 zftl_list_update_data_list:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x1, uxth 2
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L802
-	adrp	x2, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x2, x2, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
-.L805:
+	bne	.L822
+	adrp	x2, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x2, x2, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
+.L825:
 	b	_list_update_data_list
-.L802:
+.L822:
 	cmp	w2, 96
-	bne	.L803
-	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L805
-.L803:
+	bne	.L823
+	adrp	x2, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L825
+.L823:
 	cmp	w2, 160
-	bne	.L801
-	adrp	x2, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x2, x2, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L805
-.L801:
+	bne	.L821
+	adrp	x2, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L825
+.L821:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4382,24 +4462,24 @@ print_list_info:
 	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L806
+	cbz	x19, .L826
 	mov	x24, -6148914691236517206
 	adrp	x22, .LC54
-	adrp	x21, .LANCHOR99
+	adrp	x21, .LANCHOR96
 	add	x22, x22, :lo12:.LC54
-	add	x21, x21, :lo12:.LANCHOR99
+	add	x21, x21, :lo12:.LANCHOR96
 	mov	w20, 0
-	adrp	x23, .LANCHOR0
+	adrp	x23, .LANCHOR4
 	movk	x24, 0xaaab, lsl 0
-.L810:
-	ldr	x2, [x23, #:lo12:.LANCHOR0]
-	adrp	x1, .LANCHOR3
-	adrp	x8, .LANCHOR5
+.L830:
+	ldr	x2, [x23, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR7
+	adrp	x8, .LANCHOR9
 	ldrh	w5, [x19, 4]
 	sub	x2, x19, x2
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	ldr	x1, [x1, #:lo12:.LANCHOR7]
 	asr	x2, x2, 1
-	ldr	x8, [x8, #:lo12:.LANCHOR5]
+	ldr	x8, [x8, #:lo12:.LANCHOR9]
 	ldrh	w4, [x19, 2]
 	mul	x2, x2, x24
 	and	x7, x2, 65535
@@ -4424,16 +4504,16 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L806
-	ldr	x0, [x23, #:lo12:.LANCHOR0]
+	beq	.L826
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w1, 6
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	umaddl	x19, w19, w1, x0
 	ldrh	w0, [x21]
 	cmp	w0, w20
-	bcs	.L810
-.L806:
+	bcs	.L830
+.L826:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -4447,37 +4527,37 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LANCHOR94
-	add	x1, x1, :lo12:.LANCHOR93
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR91
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR91
 	bl	print_list_info
-	adrp	x1, .LANCHOR95
-	adrp	x0, .LANCHOR96
-	add	x1, x1, :lo12:.LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR96
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LANCHOR93
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR93
 	bl	print_list_info
-	adrp	x1, .LANCHOR97
-	adrp	x0, .LANCHOR98
-	add	x1, x1, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LANCHOR98
+	adrp	x1, .LANCHOR94
+	adrp	x0, .LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR95
 	bl	print_list_info
-	adrp	x1, .LANCHOR88
-	adrp	x0, .LANCHOR8
-	add	x1, x1, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LANCHOR8
+	adrp	x1, .LANCHOR85
+	adrp	x0, .LANCHOR12
+	add	x1, x1, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LANCHOR12
 	bl	print_list_info
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR79
-	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR79
+	adrp	x1, .LANCHOR83
+	adrp	x0, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR76
 	bl	print_list_info
 	ldp	x29, x30, [sp], 16
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR78
-	add	x1, x1, :lo12:.LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR78
+	adrp	x1, .LANCHOR87
+	adrp	x0, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR75
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
 	.section	.text.ftl_tmp_into_update,"ax",@progbits
@@ -4485,40 +4565,40 @@ dump_all_list_info:
 	.global	ftl_tmp_into_update
 	.type	ftl_tmp_into_update, %function
 ftl_tmp_into_update:
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bls	.L815
+	bls	.L835
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-.L815:
+.L835:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L816
+	bls	.L836
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L816:
+.L836:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L817
+	bls	.L837
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L817:
+.L837:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L814
+	bls	.L834
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L814:
+.L834:
 	ret
 	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
@@ -4526,37 +4606,37 @@ ftl_tmp_into_update:
 	.global	ftl_get_blk_list_in_sblk
 	.type	ftl_get_blk_list_in_sblk, %function
 ftl_get_blk_list_in_sblk:
-	adrp	x2, .LANCHOR3
+	adrp	x2, .LANCHOR7
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR102
-	add	x7, x7, :lo12:.LANCHOR102
-	ldr	x2, [x2, #:lo12:.LANCHOR3]
+	adrp	x7, .LANCHOR99
+	add	x7, x7, :lo12:.LANCHOR99
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR76
-	ldrb	w10, [x2, #:lo12:.LANCHOR76]
-	adrp	x2, .LANCHOR101
-	ldrb	w6, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR73
+	ldrb	w10, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR98
+	ldrb	w6, [x2, #:lo12:.LANCHOR98]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L820:
+.L840:
 	cmp	w3, w10
-	blt	.L824
+	blt	.L844
 	sxtw	x2, w0
 	mov	w3, -1
-.L825:
+.L845:
 	cmp	w10, w2
-	bgt	.L826
+	bgt	.L846
 	ret
-.L824:
+.L844:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L821
+	tbnz	x2, 0, .L841
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4565,21 +4645,21 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L822
-.L827:
+	bhi	.L842
+.L847:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L821:
+.L841:
 	add	w3, w3, 1
-	b	.L820
-.L822:
+	b	.L840
+.L842:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L827
-.L826:
+	b	.L847
+.L846:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L825
+	b	.L845
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4589,28 +4669,28 @@ ftl_free_sblk:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR3
+	adrp	x22, .LANCHOR7
 	str	x23, [sp, 48]
 	and	x23, x0, 65535
-	ldr	x4, [x22, #:lo12:.LANCHOR3]
+	ldr	x4, [x22, #:lo12:.LANCHOR7]
 	lsl	x21, x23, 2
 	stp	x19, x20, [sp, 16]
 	mov	x19, x23
 	add	x20, x4, x21
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L830
-	adrp	x1, .LANCHOR100
+	tbz	x0, 3, .L850
+	adrp	x1, .LANCHOR97
 	ldrh	w2, [x4, x21]
-	adrp	x8, .LANCHOR103
-	ldr	x7, [x1, #:lo12:.LANCHOR100]
+	adrp	x8, .LANCHOR100
+	ldr	x7, [x1, #:lo12:.LANCHOR97]
 	and	w3, w2, 2047
 	ldr	w2, [x4, x21]
-	ldrh	w8, [x8, #:lo12:.LANCHOR103]
+	ldrh	w8, [x8, #:lo12:.LANCHOR100]
 	ldrh	w1, [x7, 74]
 	ubfx	x6, x2, 11, 8
-	adrp	x2, .LANCHOR4
+	adrp	x2, .LANCHOR8
 	add	w1, w3, w1
-	ldrh	w2, [x2, #:lo12:.LANCHOR4]
+	ldrh	w2, [x2, #:lo12:.LANCHOR8]
 	and	w5, w1, 65535
 	ldrh	w1, [x7, 72]
 	add	w1, w6, w1
@@ -4618,26 +4698,26 @@ ftl_free_sblk:
 	and	w1, w1, 65535
 	add	w7, w7, w1
 	cmp	w7, w8
-	ble	.L831
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	ble	.L851
+	adrp	x1, .LANCHOR88
+	adrp	x7, .LANCHOR92
+	ldrh	w5, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR87
+	ldrh	w7, [x7, #:lo12:.LANCHOR92]
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L832
-.L847:
+	blt	.L852
+.L867:
 	mov	w1, 2
 	bfi	w0, w1, 3, 2
-.L845:
+.L865:
 	strb	w0, [x20, 2]
-.L833:
+.L853:
 	ldrb	w0, [x20, 2]
 	ands	w0, w0, 24
-	bne	.L837
+	bne	.L857
 	mul	w2, w6, w2
 	ldrh	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4645,90 +4725,90 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 9
 	bfi	w0, w2, 0, 11
 	strh	w0, [x4, x21]
-.L830:
+.L850:
 	mov	w0, w19
 	bl	zftl_remove_data_node
-	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	add	x21, x0, x21
 	ldrb	w0, [x21, 2]
 	and	w0, w0, 31
 	strb	w0, [x21, 2]
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x23, lsl 1]
 	ldrb	w0, [x20, 2]
-	tbz	x0, 3, .L839
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	tbz	x0, 3, .L859
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	cmp	w1, w19
-	bne	.L840
+	bne	.L860
 	mov	w1, -1
 	ldrh	w2, [x0, 588]
 	strh	w1, [x0, 584]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L840
+	bne	.L860
 	strh	w19, [x0, 588]
 	mov	w1, w19
 	adrp	x0, .LC55
 	add	x0, x0, :lo12:.LC55
-.L846:
+.L866:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	printf
-.L832:
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+.L852:
+	adrp	x1, .LANCHOR101
+	adrp	x7, .LANCHOR90
+	ldrh	w5, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR85
+	ldrh	w7, [x7, #:lo12:.LANCHOR90]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	adrp	x7, .LANCHOR83
+	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L847
-.L836:
+	blt	.L867
+.L856:
 	and	w0, w0, -25
-	b	.L845
-.L831:
+	b	.L865
+.L851:
 	madd	w1, w2, w1, w5
-	adrp	x5, .LANCHOR105
-	ldrh	w5, [x5, #:lo12:.LANCHOR105]
+	adrp	x5, .LANCHOR102
+	ldrh	w5, [x5, #:lo12:.LANCHOR102]
 	cmp	w1, w5
-	ble	.L833
-	adrp	x1, .LANCHOR104
-	adrp	x7, .LANCHOR93
-	ldrh	w5, [x1, #:lo12:.LANCHOR104]
-	adrp	x1, .LANCHOR88
-	ldrh	w7, [x7, #:lo12:.LANCHOR93]
-	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	ble	.L853
+	adrp	x1, .LANCHOR101
+	adrp	x7, .LANCHOR90
+	ldrh	w5, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR85
+	ldrh	w7, [x7, #:lo12:.LANCHOR90]
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	add	w5, w5, 7
 	add	w1, w1, w7
-	adrp	x7, .LANCHOR86
-	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	adrp	x7, .LANCHOR83
+	ldrh	w7, [x7, #:lo12:.LANCHOR83]
 	add	w1, w1, w7
 	cmp	w5, w1
-	bge	.L836
-	adrp	x1, .LANCHOR91
-	adrp	x7, .LANCHOR95
-	ldrh	w5, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR90
-	ldrh	w7, [x7, #:lo12:.LANCHOR95]
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	bge	.L856
+	adrp	x1, .LANCHOR88
+	adrp	x7, .LANCHOR92
+	ldrh	w5, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR87
+	ldrh	w7, [x7, #:lo12:.LANCHOR92]
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	add	w5, w5, 7
 	add	w1, w1, w7
 	cmp	w5, w1
-	blt	.L836
-	b	.L847
-.L837:
+	blt	.L856
+	b	.L867
+.L857:
 	cmp	w0, 16
-	bne	.L830
+	bne	.L850
 	sdiv	w2, w3, w2
 	ldr	w0, [x4, x21]
 	add	w2, w2, w2, lsl 1
@@ -4736,23 +4816,23 @@ ftl_free_sblk:
 	ubfx	x2, x2, 2, 6
 	bfi	w0, w2, 11, 8
 	str	w0, [x4, x21]
-	b	.L830
-.L840:
+	b	.L850
+.L860:
 	ldrh	w1, [x0, 586]
 	cmp	w1, w19
-	bne	.L839
+	bne	.L859
 	mov	w1, -1
 	ldrh	w2, [x0, 590]
 	strh	w1, [x0, 586]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L839
+	bne	.L859
 	strh	w19, [x0, 590]
 	mov	w1, w19
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
-	b	.L846
-.L839:
+	b	.L866
+.L859:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -4768,20 +4848,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR65
+	adrp	x21, .LANCHOR62
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LC57
-	adrp	x23, .LANCHOR5
-	add	x21, x21, :lo12:.LANCHOR65
+	adrp	x23, .LANCHOR9
+	add	x21, x21, :lo12:.LANCHOR62
 	mov	x24, x23
 	add	x22, x22, :lo12:.LC57
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L849:
+.L869:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L863
+	bhi	.L883
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4789,114 +4869,114 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L863:
+.L883:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L850
+	cbz	w2, .L870
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L850:
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
+.L870:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x26]
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L851
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L871
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC58
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC58
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L851:
+.L871:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L852
+	beq	.L872
 	tst	w0, 192
-	bne	.L853
-.L852:
-	adrp	x1, .LANCHOR106
+	bne	.L873
+.L872:
+	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
 	mov	w2, 793
-	add	x1, x1, :lo12:.LANCHOR106
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L853:
+.L873:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L854
+	cbz	w2, .L874
 	add	x3, x0, 392
 	mov	w1, 0
-.L856:
+.L876:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L855
+	bne	.L875
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L854:
+.L874:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L857
+	cbz	w2, .L877
 	add	x3, x0, 136
 	mov	w1, 0
-.L859:
+.L879:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L858
+	bne	.L878
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L857:
+.L877:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L860
+	cbz	w2, .L880
 	add	x3, x0, 264
 	mov	w1, 0
-.L862:
+.L882:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L861
+	bne	.L881
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L860:
+.L880:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L849
-.L855:
+	b	.L869
+.L875:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L856
-	b	.L854
-.L858:
+	bne	.L876
+	b	.L874
+.L878:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L859
-	b	.L857
-.L861:
+	bne	.L879
+	b	.L877
+.L881:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L862
-	b	.L860
+	bne	.L882
+	b	.L880
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4908,29 +4988,29 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR102
+	adrp	x1, .LANCHOR99
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR108
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
+	adrp	x22, .LANCHOR105
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR104
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbz	w0, .L887
-	ldrh	w2, [x22, #:lo12:.LANCHOR108]
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L907
+	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L887:
-	ldrh	w2, [x22, #:lo12:.LANCHOR108]
+.L907:
+	ldrh	w2, [x22, #:lo12:.LANCHOR105]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -4947,60 +5027,60 @@ ftl_erase_sblk:
 	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR3
+	adrp	x23, .LANCHOR7
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	adrp	x25, .LANCHOR109
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
+	adrp	x25, .LANCHOR106
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR101
+	adrp	x24, .LANCHOR98
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR109
+	add	x25, x25, :lo12:.LANCHOR106
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR101
+	add	x24, x24, :lo12:.LANCHOR98
 	add	x27, x29, 112
 	mov	w19, 0
-.L893:
+.L913:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L904
+	bge	.L924
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR105
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR108]
+	ldrh	w3, [x0, #:lo12:.LANCHOR105]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L905
-.L895:
+	b	.L925
+.L915:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L894
+	tbnz	x2, 0, .L914
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L894:
+.L914:
 	add	w0, w0, 1
-.L905:
+.L925:
 	cmp	w0, w1
-	blt	.L895
+	blt	.L915
 	cmp	w1, 4
-	bne	.L896
+	bne	.L916
 	mov	x3, 0
-.L897:
+.L917:
 	cmp	w21, w3
-	bgt	.L898
-.L899:
+	bgt	.L918
+.L919:
 	add	w19, w19, 1
-	b	.L893
-.L898:
+	b	.L913
+.L918:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -5008,59 +5088,59 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L897
-.L896:
+	b	.L917
+.L916:
 	cmp	w21, 2
-	bne	.L900
-	adrp	x0, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbz	w0, .L901
+	bne	.L920
+	adrp	x0, .LANCHOR104
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L921
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L901:
+.L921:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L899
-.L900:
+	b	.L919
+.L920:
 	cmp	w21, 1
-	bne	.L899
-	adrp	x0, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbz	w0, .L903
+	bne	.L919
+	adrp	x0, .LANCHOR104
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbz	w0, .L923
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L903:
+.L923:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L899
-.L904:
-	adrp	x2, .LANCHOR100
-	ldr	x3, [x23, #:lo12:.LANCHOR3]
-	cbnz	w20, .L906
+	b	.L919
+.L924:
+	adrp	x2, .LANCHOR97
+	ldr	x3, [x23, #:lo12:.LANCHOR7]
+	cbnz	w20, .L926
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L908
+	bge	.L928
 	strh	w0, [x1, 96]
-.L908:
+.L928:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -5069,7 +5149,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L906:
+.L926:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -5077,15 +5157,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR100]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L908
+	bcs	.L928
 	strh	w0, [x1, 98]
-	b	.L908
+	b	.L928
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -5093,44 +5173,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR97
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L918
+	bls	.L938
 	strh	wzr, [x1, 136]
-.L918:
+.L938:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L919
-	adrp	x1, .LANCHOR110
+	cbnz	w0, .L939
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
 	mov	w2, 1118
-	add	x1, x1, :lo12:.LANCHOR110
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L919:
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+.L939:
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 65535
-.L922:
+.L942:
 	ldrh	w2, [x1, 136]
-.L920:
+.L940:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L921
+	ble	.L941
 	strh	wzr, [x1, 136]
-	b	.L922
-.L921:
+	b	.L942
+.L941:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L925
+	bne	.L945
 	mov	x2, x4
-	b	.L920
-.L925:
+	b	.L940
+.L945:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -5151,40 +5231,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR97
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L928
+	bls	.L948
 	strh	wzr, [x1, 138]
-.L928:
+.L948:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L929
-	adrp	x1, .LANCHOR111
+	bls	.L949
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
 	mov	w2, 1142
-	add	x1, x1, :lo12:.LANCHOR111
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L929:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L949:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w4, 65535
-.L932:
+.L952:
 	ldrh	w1, [x0, 138]
-.L930:
+.L950:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L931
+	ble	.L951
 	strh	wzr, [x0, 138]
-	b	.L932
-.L931:
+	b	.L952
+.L951:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L933
+	bne	.L953
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -5194,9 +5274,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L933:
+.L953:
 	mov	x1, x3
-	b	.L930
+	b	.L950
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -5206,36 +5286,36 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L946
+	beq	.L966
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR3
+	adrp	x1, .LANCHOR7
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ubfiz	x19, x2, 2, 16
-	ldr	x20, [x1, #:lo12:.LANCHOR3]
+	ldr	x20, [x1, #:lo12:.LANCHOR7]
 	str	x21, [sp, 32]
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L936
+	bne	.L956
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR100
-	ldr	x3, [x1, #:lo12:.LANCHOR100]
-	tbz	x0, 3, .L940
+	adrp	x1, .LANCHOR97
+	ldr	x3, [x1, #:lo12:.LANCHOR97]
+	tbz	x0, 3, .L960
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L941:
+.L961:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L943
+	bne	.L963
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -5243,44 +5323,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L936:
+.L956:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L940:
+.L960:
 	tst	w0, 24
-	bne	.L942
+	bne	.L962
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L941
-.L942:
+	b	.L961
+.L962:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L941
-.L943:
+	b	.L961
+.L963:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L944
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L964
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L936
-.L944:
+	b	.L956
+.L964:
 	cmp	w0, 96
-	bne	.L936
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	bne	.L956
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L936
-.L946:
+	b	.L956
+.L966:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -5289,20 +5369,20 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR6
-	adrp	x3, .LANCHOR76
+	adrp	x1, .LANCHOR10
+	adrp	x3, .LANCHOR73
 	and	w0, w0, 65535
 	add	x29, sp, 0
-	ldr	x2, [x1, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR83
-	ldrb	w3, [x3, #:lo12:.LANCHOR76]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldr	x2, [x1, #:lo12:.LANCHOR10]
+	adrp	x1, .LANCHOR80
+	ldrb	w3, [x3, #:lo12:.LANCHOR73]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L950
+	bge	.L970
 	add	x2, x2, 16
-.L951:
+.L971:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -5310,25 +5390,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L952
-	adrp	x1, .LANCHOR112
+	bne	.L972
+	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
 	mov	w2, 1529
-	add	x1, x1, :lo12:.LANCHOR112
+	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L952:
-	adrp	x0, .LANCHOR108
-	ldrh	w0, [x0, #:lo12:.LANCHOR108]
+.L972:
+	adrp	x0, .LANCHOR105
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L950:
+.L970:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L951
+	b	.L971
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -5336,29 +5416,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR113
-	add	x1, x1, :lo12:.LANCHOR113
+	adrp	x1, .LANCHOR110
+	add	x1, x1, :lo12:.LANCHOR110
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR114
-	ldr	x4, [x2, #:lo12:.LANCHOR114]
-	adrp	x2, .LANCHOR115
-	ldr	x5, [x2, #:lo12:.LANCHOR115]
-.L955:
+	adrp	x2, .LANCHOR111
+	ldr	x4, [x2, #:lo12:.LANCHOR111]
+	adrp	x2, .LANCHOR112
+	ldr	x5, [x2, #:lo12:.LANCHOR112]
+.L975:
 	cmp	w1, w3
-	bne	.L957
+	bne	.L977
 	mov	w0, -1
 	ret
-.L957:
+.L977:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L956
+	bne	.L976
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L956:
+.L976:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L955
+	b	.L975
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -5372,50 +5452,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L959
-	adrp	x1, .LANCHOR116
+	bne	.L979
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
 	mov	w2, 1644
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L959:
-	adrp	x0, .LANCHOR83
+.L979:
+	adrp	x0, .LANCHOR80
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bne	.L960
-	adrp	x1, .LANCHOR116
+	bne	.L980
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
 	mov	w2, 1645
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L960:
+.L980:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L961
-	adrp	x1, .LANCHOR116
+	cbnz	w0, .L981
+	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
 	mov	w2, 1646
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L961:
+.L981:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR76
-	ldrb	w4, [x0, #:lo12:.LANCHOR76]
-.L962:
+	adrp	x0, .LANCHOR73
+	ldrb	w4, [x0, #:lo12:.LANCHOR73]
+.L982:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L964
-	adrp	x0, .LANCHOR108
+	beq	.L984
+	adrp	x0, .LANCHOR105
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR108]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5426,29 +5506,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L958
+	bne	.L978
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L958:
+.L978:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L964:
+.L984:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L963
+	bne	.L983
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L963:
+.L983:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L962
+	b	.L982
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5464,22 +5544,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L968
-	adrp	x1, .LANCHOR117
+	bcs	.L988
+	adrp	x1, .LANCHOR114
 	adrp	x0, .LC0
 	mov	w2, 1677
-	add	x1, x1, :lo12:.LANCHOR117
+	add	x1, x1, :lo12:.LANCHOR114
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L968:
-	adrp	x20, .LANCHOR100
+.L988:
+	adrp	x20, .LANCHOR97
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5492,58 +5572,58 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR118
+	adrp	x2, .LANCHOR115
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR118]
+	ldrh	w1, [x2, #:lo12:.LANCHOR115]
 	cmp	w1, 4
-	bhi	.L971
-	cbnz	w0, .L971
+	bhi	.L991
+	cbnz	w0, .L991
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR118]
+	strh	w1, [x2, #:lo12:.LANCHOR115]
 	ret
-.L971:
-	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR118]
+.L991:
+	adrp	x0, .LANCHOR6
+	strh	wzr, [x3, #:lo12:.LANCHOR115]
 	mov	x1, 0
 	mov	w2, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR2]
-	adrp	x0, .LANCHOR5
+	ldrh	w5, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR9
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LANCHOR3
-	ldr	x7, [x0, #:lo12:.LANCHOR3]
+	ldr	x6, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR7
+	ldr	x7, [x0, #:lo12:.LANCHOR7]
 	mov	w0, 0
-.L973:
+.L993:
 	cmp	w5, w1, uxth
-	bhi	.L976
-	adrp	x1, .LANCHOR6
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bhi	.L996
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR97
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L970
+	cbz	w2, .L990
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L970:
+.L990:
 	ret
-.L976:
+.L996:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L974
+	beq	.L994
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L975
+	bne	.L995
 	add	w0, w0, w3
-.L974:
+.L994:
 	add	x1, x1, 1
-	b	.L973
-.L975:
+	b	.L993
+.L995:
 	add	w2, w2, w3
-	b	.L974
+	b	.L994
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5564,21 +5644,21 @@ ftl_vpn_update:
 	and	w19, w0, 65535
 	mov	w0, w19
 	bl	zftl_list_update_data_list
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR9
 	ubfiz	x19, x19, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x19]
-	cbnz	w0, .L984
-	adrp	x1, .LANCHOR119
+	cbnz	w0, .L1004
+	adrp	x1, .LANCHOR116
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR119]
-.L982:
+	str	w0, [x1, #:lo12:.LANCHOR116]
+.L1002:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L984:
+.L1004:
 	mov	w0, 0
-	b	.L982
+	b	.L1002
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5591,51 +5671,51 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L987
-	adrp	x0, .LANCHOR5
+	beq	.L1007
+	adrp	x0, .LANCHOR9
 	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L988
+	cbnz	w0, .L1008
 	adrp	x0, .LC59
 	mov	w2, 0
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L993:
+.L1013:
 	mov	w0, 0
-	b	.L986
-.L988:
+	b	.L1006
+.L1008:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L987:
-	adrp	x20, .LANCHOR66
-	ldrh	w0, [x20, #:lo12:.LANCHOR66]
+.L1007:
+	adrp	x20, .LANCHOR63
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	cmp	w19, w0
-	beq	.L993
+	beq	.L1013
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L990
-	strh	w19, [x20, #:lo12:.LANCHOR66]
-	b	.L993
-.L990:
+	bne	.L1010
+	strh	w19, [x20, #:lo12:.LANCHOR63]
+	b	.L1013
+.L1010:
 	bl	ftl_vpn_update
 	cmp	w0, 0
-	adrp	x1, .LANCHOR120
+	adrp	x1, .LANCHOR117
 	cset	w0, ne
-	ldrh	w3, [x20, #:lo12:.LANCHOR66]
-	ldrh	w2, [x1, #:lo12:.LANCHOR120]
-	strh	w19, [x20, #:lo12:.LANCHOR66]
+	ldrh	w3, [x20, #:lo12:.LANCHOR63]
+	ldrh	w2, [x1, #:lo12:.LANCHOR117]
+	strh	w19, [x20, #:lo12:.LANCHOR63]
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w2, 7
 	csel	w2, w2, wzr, ls
-	strh	w2, [x1, #:lo12:.LANCHOR120]
+	strh	w2, [x1, #:lo12:.LANCHOR117]
 	and	x2, x2, 65535
-	adrp	x1, .LANCHOR67
-	add	x1, x1, :lo12:.LANCHOR67
+	adrp	x1, .LANCHOR64
+	add	x1, x1, :lo12:.LANCHOR64
 	strh	w3, [x1, x2, lsl 1]
-.L986:
+.L1006:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5645,50 +5725,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR113
+	adrp	x3, .LANCHOR110
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR113
+	add	x4, x3, :lo12:.LANCHOR110
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR114
-	ldr	x8, [x4, #:lo12:.LANCHOR114]
-	adrp	x4, .LANCHOR115
-	ldr	x4, [x4, #:lo12:.LANCHOR115]
-.L996:
+	adrp	x4, .LANCHOR111
+	ldr	x8, [x4, #:lo12:.LANCHOR111]
+	adrp	x4, .LANCHOR112
+	ldr	x4, [x4, #:lo12:.LANCHOR112]
+.L1016:
 	cmp	w6, w12
-	beq	.L1000
+	beq	.L1020
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L997
+	bne	.L1017
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L998
-	add	x6, x3, :lo12:.LANCHOR113
+	bne	.L1018
+	add	x6, x3, :lo12:.LANCHOR110
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L999:
+.L1019:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L1000:
+.L1020:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR113
+	add	x3, x3, :lo12:.LANCHOR110
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L1007
+	beq	.L1027
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR99
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5696,22 +5776,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L998:
+.L1018:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L999
-.L997:
+	b	.L1019
+.L1017:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L996
-.L1007:
+	b	.L1016
+.L1027:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5721,10 +5801,10 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR102
+	adrp	x1, .LANCHOR99
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR102]
+	ldrh	w3, [x1, #:lo12:.LANCHOR99]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -5733,32 +5813,32 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L1011
+	tbz	x0, 14, .L1031
 	adrp	x0, .LC60
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L1011:
-	adrp	x0, .LANCHOR2
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+.L1031:
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w19
-	bls	.L1010
-	adrp	x0, .LANCHOR3
+	bls	.L1030
+	adrp	x0, .LANCHOR7
 	mov	w1, 1
 	lsl	w1, w1, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x19, x0, x19, uxth 2
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L1010:
+.L1030:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5769,36 +5849,36 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR90
-	adrp	x0, .LANCHOR6
-	adrp	x7, .LANCHOR56
+	adrp	x1, .LANCHOR87
+	adrp	x0, .LANCHOR10
+	adrp	x7, .LANCHOR118
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w6, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR86
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
-	ldr	w7, [x7, #:lo12:.LANCHOR56]
-	ldrh	w5, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR88
+	ldrh	w6, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
+	ldr	w7, [x7, #:lo12:.LANCHOR118]
+	ldrh	w5, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR85
 	str	w7, [sp, 8]
-	ldrh	w4, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR97
+	ldrh	w4, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR94
 	ldr	w7, [x0, 528]
-	ldrh	w3, [x1, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR95
+	ldrh	w3, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR92
 	str	w7, [sp]
-	ldrh	w2, [x1, #:lo12:.LANCHOR95]
-	adrp	x1, .LANCHOR93
+	ldrh	w2, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR90
 	ldr	w7, [x0, 524]
 	adrp	x0, .LC61
-	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
 	add	x0, x0, :lo12:.LC61
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR97
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
-	adrp	x1, .LANCHOR121
-	ldrb	w3, [x1, #:lo12:.LANCHOR121]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR119
+	ldrb	w3, [x1, #:lo12:.LANCHOR119]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
@@ -5806,7 +5886,7 @@ print_ftl_debug_info:
 	adrp	x0, .LC62
 	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
@@ -5814,7 +5894,7 @@ print_ftl_debug_info:
 	add	x0, x0, :lo12:.LC63
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5831,18 +5911,18 @@ print_ftl_debug_info:
 	add	x0, x0, :lo12:.LC64
 	bl	printf
 	ldr	x19, [sp, 48]
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR74
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 64
-	ldrh	w5, [x0, #:lo12:.LANCHOR77]
-	adrp	x0, .LANCHOR82
-	ldrh	w4, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LANCHOR64
-	ldrh	w3, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR92
-	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	ldrh	w5, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR79
+	ldrh	w4, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR61
+	ldrh	w3, [x0, #:lo12:.LANCHOR61]
 	adrp	x0, .LANCHOR89
-	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	ldrh	w2, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
 	adrp	x0, .LC65
 	add	x0, x0, :lo12:.LC65
 	b	printf
@@ -5856,65 +5936,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L1020
-	adrp	x1, .LANCHOR122
-	add	x1, x1, :lo12:.LANCHOR122
-	mov	w2, 652
+	cbnz	x0, .L1040
+	adrp	x1, .LANCHOR120
+	add	x1, x1, :lo12:.LANCHOR120
+	mov	w2, 661
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L1019:
+.L1039:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1023:
+.L1043:
 	mov	x1, x19
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR56
+	add	x0, x0, :lo12:.LANCHOR56
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR100
+	adrp	x1, .LANCHOR97
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR55]
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldrb	w0, [x21, #:lo12:.LANCHOR57]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR55]
+	strb	w0, [x21, #:lo12:.LANCHOR57]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L1019
-.L1020:
+	b	.L1039
+.L1040:
 	mov	x19, x0
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR121
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L1025
-	adrp	x1, .LANCHOR122
+	bls	.L1045
+	adrp	x1, .LANCHOR120
 	adrp	x0, .LC0
-	mov	w2, 657
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 666
+	add	x1, x1, :lo12:.LANCHOR120
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1025:
+.L1045:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR55
-	cbz	w0, .L1022
-	ldrb	w1, [x20, #:lo12:.LANCHOR123]
+	adrp	x21, .LANCHOR57
+	cbz	w0, .L1042
+	ldrb	w1, [x20, #:lo12:.LANCHOR121]
 	cmp	w1, w0
-	bcs	.L1023
-.L1022:
+	bcs	.L1043
+.L1042:
 	mov	x0, x19
 	bl	buf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR55]
-	b	.L1019
+	ldrb	w0, [x21, #:lo12:.LANCHOR57]
+	b	.L1039
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -5924,26 +6004,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR124
+	adrp	x20, .LANCHOR122
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR48
-	adrp	x22, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR124
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x22, x22, :lo12:.LANCHOR102
+	adrp	x19, .LANCHOR49
+	adrp	x22, .LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR122
+	add	x19, x19, :lo12:.LANCHOR49
+	add	x22, x22, :lo12:.LANCHOR99
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L1031:
+.L1051:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L1037
+	bne	.L1057
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1037:
+.L1057:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -5952,7 +6032,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L1032
+	bne	.L1052
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -5962,8 +6042,8 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w1, w1, w0
 	adrp	x0, .LC66
 	add	x0, x0, :lo12:.LC66
@@ -5974,40 +6054,84 @@ ftl_write_completed:
 	mov	w2, 0
 	mov	w0, w24
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 556]
 	add	w1, w1, w25
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L1033
+	bne	.L1053
 	strh	wzr, [x0, 22]
-.L1034:
+.L1054:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L1031
-.L1033:
+	b	.L1051
+.L1053:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L1034
+	bne	.L1054
 	strh	wzr, [x0, 54]
-	b	.L1034
-.L1032:
+	b	.L1054
+.L1052:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L1036
+	tbz	x0, 2, .L1056
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L1031
-.L1036:
+	b	.L1051
+.L1056:
 	mov	x0, x21
 	bl	buf_free
-	b	.L1031
+	b	.L1051
 	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.zftl_add_read_buf,"ax",@progbits
+	.align	2
+	.global	zftl_add_read_buf
+	.type	zftl_add_read_buf, %function
+zftl_add_read_buf:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	cbnz	x0, .L1060
+	mov	w2, 948
+	adrp	x1, .LANCHOR123
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR123
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	print_ftl_debug_info
+.L1060:
+	ldrb	w1, [x0, 56]
+	mov	x19, x0
+	adrp	x0, .LANCHOR121
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w1, w0
+	bls	.L1062
+	adrp	x1, .LANCHOR123
+	adrp	x0, .LC0
+	mov	w2, 953
+	add	x1, x1, :lo12:.LANCHOR123
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1062:
+	mov	x1, x19
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR125
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ldrb	w0, [x1, #:lo12:.LANCHOR125]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR125]
+	ret
+	.size	zftl_add_read_buf, .-zftl_add_read_buf
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_sblk
@@ -6028,35 +6152,35 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1041
-	adrp	x0, .LANCHOR3
+	beq	.L1067
+	adrp	x0, .LANCHOR7
 	lsl	w22, w22, 1
-	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L1042
-	adrp	x1, .LANCHOR125
+	beq	.L1068
+	adrp	x1, .LANCHOR126
 	adrp	x0, .LC0
 	mov	w2, 827
-	add	x1, x1, :lo12:.LANCHOR125
+	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1042:
+.L1068:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L1043:
+.L1069:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1041:
+.L1067:
 	bl	print_ftl_debug_info
 	adrp	x21, .LC67
 	mov	w2, w20
@@ -6074,27 +6198,27 @@ ftl_alloc_sblk:
 	bl	printf
 	bl	dump_all_list_info
 	mov	w2, 837
-	adrp	x1, .LANCHOR125
+	adrp	x1, .LANCHOR126
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR125
+	add	x1, x1, :lo12:.LANCHOR126
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L1043
+	b	.L1069
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR126
+	adrp	x1, .LANCHOR53
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR126]
-	adrp	x1, .LANCHOR124
-	strb	w0, [x1, #:lo12:.LANCHOR124]
-	adrp	x1, .LANCHOR60
-	strb	w0, [x1, #:lo12:.LANCHOR60]
-	adrp	x1, .LANCHOR69
-	strb	w0, [x1, #:lo12:.LANCHOR69]
+	strb	w0, [x1, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR122
+	strb	w0, [x1, #:lo12:.LANCHOR122]
+	adrp	x1, .LANCHOR127
+	strb	w0, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR66
+	strb	w0, [x1, #:lo12:.LANCHOR66]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -6108,21 +6232,21 @@ dump_sblk_queue:
 	add	x0, x0, :lo12:.LC68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR126
+	adrp	x19, .LANCHOR53
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR126]
+	ldrb	w1, [x19, #:lo12:.LANCHOR53]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR126]
+	ldrb	w19, [x19, #:lo12:.LANCHOR53]
 	cmp	w19, 255
-	beq	.L1050
-	adrp	x1, .LANCHOR48
+	beq	.L1076
+	adrp	x1, .LANCHOR49
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR48
+	add	x1, x1, :lo12:.LANCHOR49
 	adrp	x21, .LC69
 	add	x19, x1, x19
 	add	x21, x21, :lo12:.LC69
 	mov	x20, x1
-.L1052:
+.L1078:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -6130,11 +6254,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L1050
+	beq	.L1076
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L1052
-.L1050:
+	b	.L1078
+.L1076:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -6145,86 +6269,82 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR126
-	ldrb	w2, [x2, #:lo12:.LANCHOR126]
+	adrp	x2, .LANCHOR53
+	ldrb	w2, [x2, #:lo12:.LANCHOR53]
 	cmp	w2, 255
-	beq	.L1069
-	adrp	x3, .LANCHOR102
-	adrp	x7, .LANCHOR48
-	add	x7, x7, :lo12:.LANCHOR48
-	adrp	x10, .L1065
-	ldrh	w8, [x3, #:lo12:.LANCHOR102]
+	beq	.L1094
+	adrp	x3, .LANCHOR99
+	adrp	x7, .LANCHOR49
+	add	x7, x7, :lo12:.LANCHOR49
+	adrp	x10, .L1090
+	ldrh	w8, [x3, #:lo12:.LANCHOR99]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1065
+	add	x10, x10, :lo12:.L1090
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR101
+	adrp	x4, .LANCHOR98
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR101]
+	ldrb	w6, [x4, #:lo12:.LANCHOR98]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1068:
+.L1093:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L1062
+	bne	.L1088
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1063
+	bne	.L1089
 	cmp	w1, 1
-	bne	.L1060
+	bne	.L1086
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1062
+	beq	.L1088
 	ret
-.L1063:
+.L1089:
 	cmp	w1, 3
-	bhi	.L1062
+	bhi	.L1088
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1065
+	adr	x13, .Lrtx1090
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1065:
+.Lrtx1090:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1065:
-	.byte	(.L1064 - .Lrtx1065) / 4
-	.byte	(.L1066 - .Lrtx1065) / 4
-	.byte	(.L1067 - .Lrtx1065) / 4
-	.byte	(.L1060 - .Lrtx1065) / 4
+.L1090:
+	.byte	(.L1086 - .Lrtx1090) / 4
+	.byte	(.L1091 - .Lrtx1090) / 4
+	.byte	(.L1092 - .Lrtx1090) / 4
+	.byte	(.L1086 - .Lrtx1090) / 4
 	.section	.text.queue_lun_state
-.L1064:
-	cmp	w0, 2
-	beq	.L1062
-	ret
-.L1066:
+.L1091:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L1062
+	beq	.L1088
 	ret
-.L1067:
+.L1092:
 	cmp	w0, 10
-	bne	.L1060
-.L1062:
+	bne	.L1086
+.L1088:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1068
-.L1069:
+	bne	.L1093
+.L1094:
 	mov	w0, 0
-.L1060:
+.L1086:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -6232,68 +6352,87 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR126
-	ldrb	w2, [x6, #:lo12:.LANCHOR126]
-	cmp	w2, 255
-	beq	.L1071
-	adrp	x0, .LANCHOR48
-	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR48
-	add	x3, x5, x4
-	ldrb	w1, [x3, 58]
-	sub	w1, w1, #11
-	and	w1, w1, 255
-	cmp	w1, 1
-	mov	x1, x0
-	bhi	.L1071
-	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR126]
-	mov	w0, -1
-	strb	w0, [x5, x4]
-	ldrb	w0, [x3, 59]
-	cmp	w0, 1
-	bne	.L1073
-	ldrh	w0, [x3, 50]
-	cbnz	w0, .L1074
-	adrp	x0, .LANCHOR124
-	ldrb	w3, [x0, #:lo12:.LANCHOR124]
-	add	x0, x0, :lo12:.LANCHOR124
-.L1075:
-	cmp	w3, 255
-	bne	.L1079
-	add	x1, x1, :lo12:.LANCHOR48
-	add	x1, x1, x2, lsl 6
-	ldrb	w1, [x1, 1]
-	strb	w1, [x0]
+	adrp	x4, .LANCHOR122
+	adrp	x8, .LANCHOR66
+	adrp	x1, .LANCHOR53
+	adrp	x7, .LANCHOR127
+	adrp	x3, .LANCHOR49
+	ldrb	w14, [x4, #:lo12:.LANCHOR122]
+	add	x5, x3, :lo12:.LANCHOR49
+	ldrb	w2, [x1, #:lo12:.LANCHOR53]
+	ldrb	w12, [x8, #:lo12:.LANCHOR66]
+	mov	x11, x5
+	ldrb	w13, [x7, #:lo12:.LANCHOR127]
+	add	x16, x8, :lo12:.LANCHOR66
+	add	x7, x7, :lo12:.LANCHOR127
+	add	x10, x4, :lo12:.LANCHOR122
+	mov	w6, 0
+	mov	w15, -1
+.L1097:
+	cmp	w2, 255
+	beq	.L1098
+	sbfiz	x8, x2, 6, 32
+	sxtw	x0, w2
+	add	x4, x5, x8
+	ldrb	w4, [x4, 58]
+	sub	w4, w4, #11
+	and	w4, w4, 255
+	cmp	w4, 1
+	bls	.L1099
+	cbz	w6, .L1096
+	strb	w2, [x1, #:lo12:.LANCHOR53]
 	ret
-.L1074:
-	adrp	x0, .LANCHOR69
-	ldrb	w3, [x0, #:lo12:.LANCHOR69]
-	add	x0, x0, :lo12:.LANCHOR69
-	b	.L1075
-.L1073:
-	cbnz	w0, .L1071
-	ldr	w0, [x3, 36]
-	cmn	w0, #1
-	beq	.L1071
-	adrp	x0, .LANCHOR60
-	ldrb	w3, [x0, #:lo12:.LANCHOR60]
-	add	x0, x0, :lo12:.LANCHOR60
-	b	.L1075
-.L1079:
-	add	x0, x1, :lo12:.LANCHOR48
-.L1086:
-	mov	w1, w3
-	sbfiz	x3, x3, 6, 32
-	ldrb	w3, [x0, x3]
-	cmp	w3, 255
-	bne	.L1086
-	add	x2, x0, x2, lsl 6
-	sbfiz	x1, x1, 6, 32
-	ldrb	w2, [x2, 1]
-	strb	w2, [x0, x1]
+.L1099:
+	lsl	x6, x0, 6
+	ldrb	w2, [x5, x8]
+	add	x4, x5, x6
+	strb	w15, [x5, x6]
+	ldrb	w6, [x4, 59]
+	cmp	w6, 1
+	bne	.L1102
+	ldrh	w4, [x4, 50]
+	cbnz	w4, .L1110
+	mov	w4, w14
+	mov	x6, x10
+.L1103:
+	cmp	w4, 255
+	bne	.L1108
+	add	x3, x3, :lo12:.LANCHOR49
+	strb	w2, [x1, #:lo12:.LANCHOR53]
+	add	x0, x3, x0, lsl 6
+	ldrb	w0, [x0, 1]
+	strb	w0, [x6]
 	ret
-.L1071:
+.L1102:
+	cbnz	w6, .L1104
+	ldr	w4, [x4, 36]
+	cmn	w4, #1
+	beq	.L1104
+	mov	w4, w13
+	mov	x6, x7
+	b	.L1103
+.L1110:
+	mov	w4, w12
+	mov	x6, x16
+	b	.L1103
+.L1108:
+	mov	w6, w4
+	sbfiz	x4, x4, 6, 32
+	ldrb	w4, [x11, x4]
+	cmp	w4, 255
+	bne	.L1108
+	add	x0, x11, x0, lsl 6
+	sbfiz	x6, x6, 6, 32
+	ldrb	w0, [x0, 1]
+	strb	w0, [x11, x6]
+.L1104:
+	mov	w6, 1
+	b	.L1097
+.L1098:
+	cbz	w6, .L1096
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR53]
+.L1096:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -6302,110 +6441,110 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR76
+	adrp	x2, .LANCHOR73
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
+	adrp	x20, .LANCHOR97
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1088
+	bls	.L1121
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1089
-.L1088:
+	bne	.L1122
+.L1121:
 	adrp	x19, .LC70
 	add	x19, x19, :lo12:.LC70
-	adrp	x23, .LANCHOR3
-.L1101:
+	adrp	x23, .LANCHOR7
+.L1134:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR100
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	add	x14, x20, :lo12:.LANCHOR97
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1090
+	bne	.L1123
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	ldr	x1, [x23, #:lo12:.LANCHOR7]
 	add	x1, x1, x21, uxth 2
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1101
-.L1090:
+	b	.L1134
+.L1123:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR127
+	adrp	x1, .LANCHOR128
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR127]
+	str	w2, [x1, #:lo12:.LANCHOR128]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1092:
+.L1125:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1091
+	beq	.L1124
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1092
-	adrp	x1, .LANCHOR128
+	bne	.L1125
+	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 194
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1091:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1124:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1089:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L1122:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1094
-	adrp	x1, .LANCHOR128
+	bcs	.L1127
+	adrp	x1, .LANCHOR129
 	adrp	x0, .LC0
 	mov	w2, 199
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR129
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1094:
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L1127:
+	adrp	x1, .LANCHOR99
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR102]
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
 	asr	w4, w19, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1097
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1130
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
@@ -6415,7 +6554,7 @@ pm_alloc_new_blk:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC71
 	bl	printf
-.L1097:
+.L1130:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6429,68 +6568,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1106:
+.L1139:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1105
+	beq	.L1138
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1106
+	bne	.L1139
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1108:
+.L1141:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1107
+	tbnz	x3, 15, .L1140
 	cmp	w3, w4
-	bcs	.L1107
+	bcs	.L1140
 	mov	w4, w3
 	mov	w19, w1
-.L1107:
+.L1140:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1108
+	bne	.L1141
 	cmp	w19, 32
-	bne	.L1105
-	adrp	x1, .LANCHOR130
+	bne	.L1138
+	adrp	x1, .LANCHOR131
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR130]
+	ldrb	w3, [x1, #:lo12:.LANCHOR131]
 	mov	w1, 0
-.L1110:
+.L1143:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1109
+	bcs	.L1142
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1109:
+.L1142:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1110
+	bne	.L1143
 	cmp	w19, 32
-	bne	.L1105
-	adrp	x1, .LANCHOR131
+	bne	.L1138
+	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
 	mov	w2, 297
-	add	x1, x1, :lo12:.LANCHOR131
+	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1105:
+.L1138:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6512,60 +6651,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR29
-	cbnz	w0, .L1117
-	add	x1, x19, :lo12:.LANCHOR29
+	adrp	x19, .LANCHOR3
+	cbnz	w0, .L1150
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1118:
+.L1151:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1118
-.L1124:
-	adrp	x20, .LANCHOR132
-	add	x20, x20, :lo12:.LANCHOR132
+	bne	.L1151
+.L1157:
+	adrp	x20, .LANCHOR133
+	add	x20, x20, :lo12:.LANCHOR133
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR29
+	add	x19, x19, :lo12:.LANCHOR3
 	bl	ftl_memset
 	mov	x0, 0
-.L1119:
+.L1152:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1119
+	bne	.L1152
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1117:
+.L1150:
 	cmp	w0, 1
-	bne	.L1120
-	add	x3, x19, :lo12:.LANCHOR29
+	bne	.L1153
+	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1123:
+.L1156:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1121
+	bls	.L1154
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1121:
+.L1154:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1123
-	b	.L1124
-.L1120:
+	bne	.L1156
+	b	.L1157
+.L1153:
 	cmp	w0, 2
-	bne	.L1125
-	add	x3, x19, :lo12:.LANCHOR29
+	bne	.L1158
+	add	x3, x19, :lo12:.LANCHOR3
 	mov	w1, 65535
 	mov	x0, 0
-.L1127:
+.L1160:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6574,35 +6713,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1127
-	b	.L1124
-.L1125:
+	bne	.L1160
+	b	.L1157
+.L1158:
 	cmp	w0, 3
-	bne	.L1128
-	add	x3, x19, :lo12:.LANCHOR29
+	bne	.L1161
+	add	x3, x19, :lo12:.LANCHOR3
 	mov	x1, 0
-.L1131:
+.L1164:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1129
+	bls	.L1162
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1129:
+.L1162:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1131
-	b	.L1124
-.L1128:
+	bne	.L1164
+	b	.L1157
+.L1161:
 	cmp	w0, 4
-	bne	.L1132
-	add	x1, x19, :lo12:.LANCHOR29
+	bne	.L1165
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR29]
+	strh	wzr, [x19, #:lo12:.LANCHOR3]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -6616,7 +6755,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1134:
+.L1167:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6625,37 +6764,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1134
-	b	.L1124
-.L1132:
+	bne	.L1167
+	b	.L1157
+.L1165:
 	cmp	w0, 5
-	bne	.L1135
-	add	x1, x19, :lo12:.LANCHOR29
+	bne	.L1168
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1136:
+.L1169:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1136
+	bne	.L1169
 	add	x1, x1, 32
-.L1137:
+.L1170:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1137
-	b	.L1124
-.L1135:
+	bne	.L1170
+	b	.L1157
+.L1168:
 	cmp	w0, 8
-	bne	.L1124
-	add	x1, x19, :lo12:.LANCHOR29
+	bne	.L1157
+	add	x1, x19, :lo12:.LANCHOR3
 	mov	x0, 0
-.L1138:
+.L1171:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1138
-	b	.L1124
+	bne	.L1171
+	b	.L1157
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6663,38 +6802,38 @@ flash_lsb_page_tbl_build:
 	.type	flash_die_info_init, %function
 flash_die_info_init:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1154
-	adrp	x1, .LANCHOR133
+	tbz	x0, 12, .L1187
+	adrp	x1, .LANCHOR134
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR133
+	add	x1, x1, :lo12:.LANCHOR134
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1154:
+.L1187:
 	adrp	x23, .LANCHOR34
 	add	x19, x23, :lo12:.LANCHOR34
-	adrp	x25, .LANCHOR28
-	adrp	x26, .LANCHOR14
-	adrp	x22, .LANCHOR26
-	add	x21, x22, :lo12:.LANCHOR26
+	adrp	x25, .LANCHOR2
+	adrp	x26, .LANCHOR18
+	adrp	x22, .LANCHOR29
+	add	x21, x22, :lo12:.LANCHOR29
 	ldrh	w0, [x19, 26]
 	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR135
-	strh	w0, [x25, #:lo12:.LANCHOR28]
-	add	x20, x24, :lo12:.LANCHOR135
+	adrp	x24, .LANCHOR136
+	strh	w0, [x25, #:lo12:.LANCHOR2]
+	add	x20, x24, :lo12:.LANCHOR136
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR14]
+	strb	wzr, [x26, #:lo12:.LANCHOR18]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR134
-	strh	w0, [x1, #:lo12:.LANCHOR134]
+	adrp	x1, .LANCHOR135
+	strh	w0, [x1, #:lo12:.LANCHOR135]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -6704,32 +6843,32 @@ flash_die_info_init:
 	bl	ftl_memset
 	ldrb	w13, [x23, #:lo12:.LANCHOR34]
 	mov	x7, x23
-	adrp	x14, .LANCHOR40
-	add	x11, x26, :lo12:.LANCHOR14
-	add	x23, x14, :lo12:.LANCHOR40
+	adrp	x14, .LANCHOR41
+	add	x11, x26, :lo12:.LANCHOR18
+	add	x23, x14, :lo12:.LANCHOR41
 	mov	x8, 0
-.L1156:
+.L1189:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1155
+	cbnz	w0, .L1188
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L1155:
+.L1188:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L1156
+	bne	.L1189
 	add	x0, x7, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1157
-.L1161:
+	beq	.L1190
+.L1194:
 	add	x7, x7, :lo12:.LANCHOR34
-	ldrb	w0, [x26, #:lo12:.LANCHOR14]
+	ldrb	w0, [x26, #:lo12:.LANCHOR18]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -6739,30 +6878,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR136
-	strh	w0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR137
+	strh	w0, [x1, #:lo12:.LANCHOR137]
 	ret
-.L1157:
-	ldrh	w1, [x25, #:lo12:.LANCHOR28]
-	add	x14, x14, :lo12:.LANCHOR40
+.L1190:
+	ldrh	w1, [x25, #:lo12:.LANCHOR2]
+	add	x14, x14, :lo12:.LANCHOR41
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR14
-	add	x15, x24, :lo12:.LANCHOR135
-	add	x22, x22, :lo12:.LANCHOR26
+	add	x19, x26, :lo12:.LANCHOR18
+	add	x15, x24, :lo12:.LANCHOR136
+	add	x22, x22, :lo12:.LANCHOR29
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L1160:
+.L1193:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1158
+	cbnz	w0, .L1191
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -6770,11 +6909,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L1158:
+.L1191:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1160
-	b	.L1161
+	bne	.L1193
+	b	.L1194
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6784,19 +6923,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR110
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LANCHOR110
 	bl	ftl_memset
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR80
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR115
-	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR112
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6806,64 +6945,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1174
-	adrp	x1, .LANCHOR137
+	tbz	x0, 12, .L1207
+	adrp	x1, .LANCHOR138
 	adrp	x0, .LC72
 	mov	w3, 0
-	mov	w2, 220
-	add	x1, x1, :lo12:.LANCHOR137
+	mov	w2, 222
+	add	x1, x1, :lo12:.LANCHOR138
 	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L1174:
-	adrp	x20, .LANCHOR83
-	adrp	x22, .LANCHOR76
-	adrp	x19, .LANCHOR113
-	add	x19, x19, :lo12:.LANCHOR113
+.L1207:
+	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR73
+	adrp	x19, .LANCHOR110
+	add	x19, x19, :lo12:.LANCHOR110
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR83]
-	adrp	x21, .LANCHOR115
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
+	adrp	x21, .LANCHOR112
+	ldrb	w0, [x22, #:lo12:.LANCHOR73]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR115]
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR114
-	ldrb	w3, [x22, #:lo12:.LANCHOR76]
-	ldr	x5, [x21, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR111
+	ldrb	w3, [x22, #:lo12:.LANCHOR73]
+	ldr	x5, [x21, #:lo12:.LANCHOR112]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR114]
-.L1175:
+	ldr	x4, [x0, #:lo12:.LANCHOR111]
+.L1208:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1177
+	blt	.L1210
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1177:
+.L1210:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1176
+	beq	.L1209
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1176:
+.L1209:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1175
+	b	.L1208
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6879,17 +7018,17 @@ zftl_read_flash_info:
 	bl	ftl_memset
 	adrp	x1, .LANCHOR34
 	add	x1, x1, :lo12:.LANCHOR34
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR2
 	mov	w4, 1
 	ldrb	w3, [x1, 9]
-	ldrh	w0, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w0, w3, w0
 	and	w2, w0, 65535
 	strb	w2, [x19, 4]
 	ubfx	x0, x2, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w0, [x19, 7]
 	ldrb	w0, [x1, 13]
 	mul	w0, w0, w2
@@ -6905,30 +7044,30 @@ zftl_read_flash_info:
 	ubfx	x2, x0, 16, 8
 	lsr	w0, w0, 24
 	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR26
+	adrp	x2, .LANCHOR29
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR26
+	add	x2, x2, :lo12:.LANCHOR29
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR14
-	ldrb	w3, [x0, #:lo12:.LANCHOR14]
-.L1186:
+	adrp	x0, .LANCHOR18
+	ldrb	w3, [x0, #:lo12:.LANCHOR18]
+.L1219:
 	cmp	w3, w1, uxtb
-	bhi	.L1187
+	bhi	.L1220
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1187:
+.L1220:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1186
+	b	.L1219
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6938,74 +7077,74 @@ gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR97
 	stp	x19, x20, [sp, 16]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	ldr	w1, [x0, 32]
 	mov	w0, 10240
 	cmp	w1, w0
-	bls	.L1190
+	bls	.L1223
 	bl	ftl_tmp_into_update
-.L1190:
-	adrp	x19, .LANCHOR6
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L1223:
+	adrp	x19, .LANCHOR10
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1191
-	ldr	x3, [x25, #:lo12:.LANCHOR100]
+	bhi	.L1224
+	ldr	x3, [x25, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1240
-.L1191:
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	bls	.L1273
+.L1224:
+	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	mov	w20, 65535
-	adrp	x8, .LANCHOR9
+	adrp	x8, .LANCHOR14
 	mov	w21, w20
-	add	x8, x8, :lo12:.LANCHOR9
+	add	x8, x8, :lo12:.LANCHOR14
 	mov	w28, 0
 	mov	w27, 0
 	mov	w22, 0
 	ldr	w3, [x1, 36]
-	adrp	x23, .LANCHOR3
+	adrp	x23, .LANCHOR7
 	ldrh	w24, [x1, 134]
 	str	w2, [x0, 568]
 	str	w3, [x0, 572]
-	adrp	x0, .LANCHOR2
-	add	x10, x0, :lo12:.LANCHOR2
+	adrp	x0, .LANCHOR6
+	add	x10, x0, :lo12:.LANCHOR6
 	str	wzr, [x29, 128]
 	str	wzr, [x29, 136]
 	stp	wzr, wzr, [x29, 148]
 	str	wzr, [x29, 156]
-.L1193:
+.L1226:
 	ldrh	w0, [x10]
 	cmp	w0, w24
-	bhi	.L1202
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bhi	.L1235
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
-	adrp	x24, .LANCHOR9
+	adrp	x24, .LANCHOR14
 	add	x0, x0, 264
 	strh	wzr, [x0, -142]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w3, [x24, #:lo12:.LANCHOR9]
-	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w3, [x24, #:lo12:.LANCHOR14]
+	ldr	x2, [x23, #:lo12:.LANCHOR7]
 	ldrh	w5, [x0, 586]
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1203
-	adrp	x3, .LANCHOR5
+	tbz	x3, 10, .L1236
+	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
-	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
 	adrp	x0, .LC74
@@ -7017,33 +7156,33 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1203:
+.L1236:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1204
+	tbz	x0, 3, .L1237
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1205
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1238
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 586]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR65+318
+	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR65+318]
-.L1204:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w3, [x24, #:lo12:.LANCHOR9]
-	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	strh	w1, [x0, #:lo12:.LANCHOR62+318]
+.L1237:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	ldr	w3, [x24, #:lo12:.LANCHOR14]
+	ldr	x2, [x23, #:lo12:.LANCHOR7]
 	ldrh	w5, [x0, 584]
 	mov	x1, x5
 	lsl	x0, x5, 2
 	add	x26, x2, x0
-	tbz	x3, 10, .L1206
-	adrp	x3, .LANCHOR5
+	tbz	x3, 10, .L1239
+	adrp	x3, .LANCHOR9
 	ldrb	w4, [x26, 2]
-	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	x6, [x3, #:lo12:.LANCHOR9]
 	ldr	w3, [x2, x0]
 	ldrh	w2, [x2, x0]
 	adrp	x0, .LC75
@@ -7055,28 +7194,28 @@ gc_static_wearleveling:
 	and	w2, w2, 2047
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1206:
+.L1239:
 	ldrb	w0, [x26, 2]
-	tbz	x0, 3, .L1207
+	tbz	x0, 3, .L1240
 	ldrb	w0, [x26, 2]
 	and	w1, w0, 192
 	cmp	w1, 64
-	bne	.L1208
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1241
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 0
 	mov	w2, 1
 	ldrh	w0, [x0, 584]
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR65+318
+	adrp	x0, .LANCHOR62+318
 	mov	w1, 1
-	strh	w1, [x0, #:lo12:.LANCHOR65+318]
-.L1207:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1209
+	strh	w1, [x0, #:lo12:.LANCHOR62+318]
+.L1240:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1242
 	ldr	w6, [x29, 128]
-	adrp	x2, .LANCHOR5
-	ldr	x1, [x23, #:lo12:.LANCHOR3]
-	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR9
+	ldr	x1, [x23, #:lo12:.LANCHOR7]
+	ldr	x7, [x2, #:lo12:.LANCHOR9]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
@@ -7092,13 +7231,13 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1209:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1210
+.L1242:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1243
 	ldr	w6, [x29, 136]
-	adrp	x2, .LANCHOR5
-	ldr	x1, [x23, #:lo12:.LANCHOR3]
-	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR9
+	ldr	x1, [x23, #:lo12:.LANCHOR7]
+	ldr	x7, [x2, #:lo12:.LANCHOR9]
 	lsl	x0, x6, 2
 	add	x5, x1, x0
 	ldr	w3, [x1, x0]
@@ -7114,8 +7253,8 @@ gc_static_wearleveling:
 	ubfx	x5, x4, 5, 3
 	ubfx	x4, x4, 3, 2
 	bl	printf
-.L1210:
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+.L1243:
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x29, 156]
 	strh	w1, [x0, 96]
 	ldr	w1, [x29, 148]
@@ -7127,8 +7266,8 @@ gc_static_wearleveling:
 	udiv	w4, w1, w28
 	strh	w3, [x0, 88]
 	strh	w4, [x0, 90]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1211
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1244
 	adrp	x0, .LC78
 	and	w4, w4, 65535
 	and	w3, w3, 65535
@@ -7136,118 +7275,118 @@ gc_static_wearleveling:
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1211:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 10, .L1212
-	adrp	x0, .LANCHOR138
+.L1244:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 10, .L1245
+	adrp	x0, .LANCHOR139
 	ldr	w3, [x29, 156]
 	mov	w4, w22
 	mov	w2, w21
-	ldrh	w6, [x0, #:lo12:.LANCHOR138]
-	adrp	x0, .LANCHOR139
+	ldrh	w6, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR140
 	mov	w1, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR139]
+	ldrh	w5, [x0, #:lo12:.LANCHOR140]
 	adrp	x0, .LC79
 	add	x0, x0, :lo12:.LC79
 	bl	printf
-.L1212:
+.L1245:
 	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	adrp	x0, .LANCHOR138
+	adrp	x0, .LANCHOR139
 	ldr	w1, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR138]
+	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w1, w0
-	bgt	.L1213
-	adrp	x1, .LANCHOR139
+	bgt	.L1246
+	adrp	x1, .LANCHOR140
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR139]
+	ldrh	w1, [x1, #:lo12:.LANCHOR140]
 	sub	w0, w0, w20
 	cmp	w0, w1
-	ble	.L1241
-.L1213:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	adrp	x28, .LANCHOR65
-	add	x28, x28, :lo12:.LANCHOR65
+	ble	.L1274
+.L1246:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	adrp	x28, .LANCHOR62
+	add	x28, x28, :lo12:.LANCHOR62
 	mov	w27, 0
 	mov	w22, 0
 	ldrh	w26, [x0, 580]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 134]
 	str	w0, [x29, 152]
-	adrp	x0, .LANCHOR2
-	add	x0, x0, :lo12:.LANCHOR2
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
 	str	x0, [x29, 136]
-	adrp	x0, .LANCHOR139
-	add	x0, x0, :lo12:.LANCHOR139
+	adrp	x0, .LANCHOR140
+	add	x0, x0, :lo12:.LANCHOR140
 	str	x0, [x29, 128]
-.L1215:
+.L1248:
 	ldr	x0, [x29, 136]
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w1, w0
-	bcc	.L1225
-.L1224:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bcc	.L1258
+.L1257:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	str	w26, [x0, 580]
-.L1214:
-	cbz	w21, .L1227
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
-	adrp	x0, .LANCHOR2
-	ldrh	w5, [x0, #:lo12:.LANCHOR2]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+.L1247:
+	cbz	w21, .L1260
+	ldr	x2, [x25, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR6
+	ldrh	w5, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1228:
+.L1261:
 	cmp	w1, w5
-	bcc	.L1230
+	bcc	.L1263
 	ldrh	w0, [x2, 72]
 	add	w0, w21, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w21, w0
-	bcs	.L1227
+	bcs	.L1260
 	sub	w21, w0, w21
 	strh	w21, [x2, 98]
-.L1227:
-	cbz	w20, .L1233
-	ldr	x2, [x25, #:lo12:.LANCHOR100]
-	adrp	x0, .LANCHOR2
-	ldrh	w6, [x0, #:lo12:.LANCHOR2]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+.L1260:
+	cbz	w20, .L1266
+	ldr	x2, [x25, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR6
+	ldrh	w6, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ldrh	w1, [x2, 134]
 	add	x0, x0, x1, uxth 2
-.L1234:
+.L1267:
 	cmp	w1, w6
-	bcc	.L1236
+	bcc	.L1269
 	ldrh	w0, [x2, 74]
 	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w20, w0
-	bcs	.L1233
+	bcs	.L1266
 	sub	w20, w0, w20
 	strh	w20, [x2, 96]
-.L1233:
+.L1266:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1192
-	adrp	x2, .LANCHOR5
+	beq	.L1225
+	adrp	x2, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x1]
-	adrp	x1, .LANCHOR83
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR80
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w2, w1
-	bhi	.L1192
+	bhi	.L1225
 	add	w22, w22, 1
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-.L1192:
+.L1225:
 	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7256,53 +7395,53 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1202:
+.L1235:
 	uxtw	x7, w24
-	ldr	x6, [x23, #:lo12:.LANCHOR3]
+	ldr	x6, [x23, #:lo12:.LANCHOR7]
 	lsl	x2, x7, 2
 	add	x11, x6, x2
 	ldrb	w0, [x11, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1194
+	beq	.L1227
 	ubfx	x4, x0, 3, 2
-	tbz	x4, 0, .L1195
+	tbz	x4, 0, .L1228
 	ldr	w0, [x6, x2]
 	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
 	and	w1, w1, 2047
-.L1196:
+.L1229:
 	ldr	w3, [x29, 148]
 	add	w27, w27, 1
 	and	w27, w27, 65535
 	cmp	w20, w1
 	add	w3, w3, w1
 	str	w3, [x29, 148]
-	bls	.L1239
-	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	bls	.L1272
+	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w20, w1
 	strh	w24, [x3, 586]
-.L1239:
+.L1272:
 	ldr	w3, [x29, 156]
 	cmp	w3, w1
-	bcs	.L1199
+	bcs	.L1232
 	str	w24, [x29, 128]
 	str	w1, [x29, 156]
-.L1199:
+.L1232:
 	mov	w3, 65535
 	cmp	w0, w3
-	bne	.L1198
-.L1200:
+	bne	.L1231
+.L1233:
 	cmp	w0, 9
 	ccmp	w1, 9, 0, hi
-	bhi	.L1194
+	bhi	.L1227
 	ldr	w0, [x8]
-	tbz	x0, 8, .L1194
-	adrp	x0, .LANCHOR5
+	tbz	x0, 8, .L1227
+	adrp	x0, .LANCHOR9
 	ldr	w3, [x6, x2]
 	ldrh	w2, [x6, x2]
 	mov	w1, w24
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrb	w6, [x11, 3]
 	ubfx	x3, x3, 11, 8
 	ldrb	w5, [x11, 2]
@@ -7314,73 +7453,73 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC73
 	bl	printf
 	ldp	x8, x10, [x29, 112]
-.L1194:
+.L1227:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-	b	.L1193
-.L1195:
+	b	.L1226
+.L1228:
 	tst	w0, 24
-	bne	.L1197
+	bne	.L1230
 	ldrh	w1, [x6, x2]
 	mov	w0, 65535
 	and	w1, w1, 2047
-	b	.L1196
-.L1197:
+	b	.L1229
+.L1230:
 	ldr	w0, [x6, x2]
 	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1198:
+.L1231:
 	ldr	w3, [x29, 152]
 	add	w28, w28, 1
 	and	w28, w28, 65535
 	cmp	w21, w0
 	add	w3, w3, w0
 	str	w3, [x29, 152]
-	bls	.L1201
-	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	bls	.L1234
+	ldr	x3, [x19, #:lo12:.LANCHOR10]
 	mov	w21, w0
 	strh	w24, [x3, 584]
-.L1201:
+.L1234:
 	cmp	w22, w0
-	bcs	.L1200
+	bcs	.L1233
 	mov	w22, w0
 	str	w24, [x29, 136]
-	b	.L1200
-.L1205:
+	b	.L1233
+.L1238:
 	tst	w0, 224
-	bne	.L1204
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1237
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 65535
 	ldrh	w2, [x0, 590]
 	cmp	w2, w1
-	bne	.L1204
+	bne	.L1237
 	ldrh	w0, [x0, 586]
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 586]
 	strh	w1, [x0, 590]
 	mov	w1, -1
 	strh	w1, [x0, 586]
-	b	.L1204
-.L1208:
+	b	.L1237
+.L1241:
 	tst	w0, 224
-	bne	.L1207
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	bne	.L1240
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w1, 65535
 	ldrh	w2, [x0, 588]
 	cmp	w2, w1
-	bne	.L1207
+	bne	.L1240
 	ldrh	w0, [x0, 584]
 	bl	zftl_remove_free_node
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldrh	w1, [x0, 584]
 	strh	w1, [x0, 588]
 	mov	w1, -1
 	strh	w1, [x0, 584]
-	b	.L1207
-.L1225:
+	b	.L1240
+.L1258:
 	add	w7, w26, 1
-	ldr	x4, [x23, #:lo12:.LANCHOR3]
+	ldr	x4, [x23, #:lo12:.LANCHOR7]
 	and	w26, w7, 65535
 	cmp	w0, w26
 	csel	w26, w26, wzr, hi
@@ -7389,32 +7528,32 @@ gc_static_wearleveling:
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1217
+	beq	.L1250
 	and	w2, w0, 224
 	cmp	w2, 224
-	beq	.L1217
+	beq	.L1250
 	ubfx	x0, x0, 3, 2
 	and	w1, w0, 1
-	tbz	x0, 0, .L1218
+	tbz	x0, 0, .L1251
 	cmp	w2, 160
-.L1305:
-	bne	.L1220
-	adrp	x0, .LANCHOR138
+.L1338:
+	bne	.L1253
+	adrp	x0, .LANCHOR139
 	ldr	w2, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR138]
+	ldrh	w0, [x0, #:lo12:.LANCHOR139]
 	cmp	w2, w0
-	ble	.L1221
+	ble	.L1254
 	ldr	w0, [x4, x3]
 	add	w2, w21, 2
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w2
-	ble	.L1222
-	cbz	w1, .L1221
+	ble	.L1255
+	cbz	w1, .L1254
 	ldrh	w0, [x4, x3]
 	and	w0, w0, 2047
 	cmp	w0, w20
-	bgt	.L1221
-.L1222:
+	bgt	.L1254
+.L1255:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7423,16 +7562,16 @@ gc_static_wearleveling:
 	bl	gc_add_sblk
 	mov	w0, 1
 	strh	w0, [x28, 318]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
 	add	w22, w22, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1221
-	adrp	x0, .LANCHOR5
+	tbz	x0, 10, .L1254
+	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
 	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
@@ -7443,40 +7582,40 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-.L1306:
+.L1339:
 	bl	printf
-.L1221:
+.L1254:
 	cmp	w22, 4
 	ccmp	w27, 4, 2, ls
-	bhi	.L1224
-.L1217:
+	bhi	.L1257
+.L1250:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 152]
-	b	.L1215
-.L1218:
+	b	.L1248
+.L1251:
 	cmp	w0, 2
-	b	.L1305
-.L1220:
+	b	.L1338
+.L1253:
 	ldr	x2, [x29, 128]
 	ldr	w0, [x29, 156]
 	sub	w0, w0, w20
 	ldrh	w2, [x2]
 	cmp	w0, w2
-	ble	.L1221
+	ble	.L1254
 	ldrh	w0, [x4, x3]
 	add	w2, w20, 2
 	and	w0, w0, 2047
 	cmp	w0, w2
-	ble	.L1223
-	cbz	w1, .L1221
+	ble	.L1256
+	cbz	w1, .L1254
 	ldr	w0, [x4, x3]
 	add	w1, w21, 2
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1221
-.L1223:
+	bgt	.L1254
+.L1256:
 	stp	x4, x8, [x29, 104]
 	mov	w2, 1
 	str	x3, [x29, 120]
@@ -7485,16 +7624,16 @@ gc_static_wearleveling:
 	bl	gc_add_sblk
 	mov	w0, 1
 	strh	w0, [x28, 318]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
 	add	w27, w27, 1
 	ldp	x4, x8, [x29, 104]
 	ldr	x3, [x29, 120]
-	tbz	x0, 10, .L1221
-	adrp	x0, .LANCHOR5
+	tbz	x0, 10, .L1254
+	adrp	x0, .LANCHOR9
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	ldr	x0, [x23, #:lo12:.LANCHOR7]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
 	ldrh	w4, [x28, 56]
@@ -7505,48 +7644,48 @@ gc_static_wearleveling:
 	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
 	ubfx	x2, x2, 5, 3
-	b	.L1306
-.L1241:
+	b	.L1339
+.L1274:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1214
-.L1230:
+	b	.L1247
+.L1263:
 	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
 	cmp	w21, w4
-	bhi	.L1229
+	bhi	.L1262
 	ldrb	w6, [x0, 2]
 	tst	w6, 24
-	beq	.L1229
+	beq	.L1262
 	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
 	str	w3, [x0]
-.L1229:
+.L1262:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1228
-.L1236:
+	b	.L1261
+.L1269:
 	ldrh	w3, [x0]
 	and	w4, w3, 2047
 	cmp	w4, w20
-	blt	.L1235
+	blt	.L1268
 	ldrb	w5, [x0, 2]
 	and	w5, w5, 24
 	cmp	w5, 16
-	beq	.L1235
+	beq	.L1268
 	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
 	strh	w3, [x0]
-.L1235:
+.L1268:
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 65535
-	b	.L1234
-.L1240:
+	b	.L1267
+.L1273:
 	mov	w27, 0
 	mov	w22, 0
-	b	.L1192
+	b	.L1225
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -7558,59 +7697,59 @@ zftl_sblk_list_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR2
-	adrp	x28, .LANCHOR0
+	adrp	x27, .LANCHOR6
+	adrp	x28, .LANCHOR4
 	stp	x19, x20, [sp, 16]
-	ldrh	w2, [x27, #:lo12:.LANCHOR2]
-	adrp	x20, .LANCHOR90
+	ldrh	w2, [x27, #:lo12:.LANCHOR6]
+	adrp	x20, .LANCHOR87
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR86
+	adrp	x19, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR94
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR97
 	mul	w2, w2, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR0]
-	adrp	x24, .LANCHOR93
-	adrp	x23, .LANCHOR95
-	adrp	x21, .LANCHOR88
+	ldr	x0, [x28, #:lo12:.LANCHOR4]
+	adrp	x24, .LANCHOR90
+	adrp	x23, .LANCHOR92
+	adrp	x21, .LANCHOR85
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x0, .LANCHOR99
-	adrp	x2, .LANCHOR76
-	adrp	x3, .LANCHOR75
+	adrp	x0, .LANCHOR96
+	adrp	x2, .LANCHOR73
+	adrp	x3, .LANCHOR72
 	mov	w1, 16
-	strh	w1, [x0, #:lo12:.LANCHOR99]
-	adrp	x10, .LANCHOR94
-	ldrb	w0, [x2, #:lo12:.LANCHOR76]
-	adrp	x8, .LANCHOR96
-	ldrh	w1, [x3, #:lo12:.LANCHOR75]
-	adrp	x7, .LANCHOR98
-	adrp	x6, .LANCHOR79
-	adrp	x5, .LANCHOR8
-	adrp	x4, .LANCHOR78
-	str	xzr, [x10, #:lo12:.LANCHOR94]
-	str	xzr, [x8, #:lo12:.LANCHOR96]
-	adrp	x28, .LANCHOR3
+	strh	w1, [x0, #:lo12:.LANCHOR96]
+	adrp	x10, .LANCHOR91
+	ldrb	w0, [x2, #:lo12:.LANCHOR73]
+	adrp	x8, .LANCHOR93
+	ldrh	w1, [x3, #:lo12:.LANCHOR72]
+	adrp	x7, .LANCHOR95
+	adrp	x6, .LANCHOR76
+	adrp	x5, .LANCHOR12
+	adrp	x4, .LANCHOR75
+	str	xzr, [x10, #:lo12:.LANCHOR91]
+	str	xzr, [x8, #:lo12:.LANCHOR93]
+	adrp	x28, .LANCHOR7
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR98]
-	str	xzr, [x6, #:lo12:.LANCHOR79]
-	str	xzr, [x5, #:lo12:.LANCHOR8]
+	str	xzr, [x7, #:lo12:.LANCHOR95]
+	str	xzr, [x6, #:lo12:.LANCHOR76]
+	str	xzr, [x5, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR78]
-	strh	wzr, [x24, #:lo12:.LANCHOR93]
-	strh	wzr, [x23, #:lo12:.LANCHOR95]
-	strh	wzr, [x22, #:lo12:.LANCHOR97]
+	str	xzr, [x4, #:lo12:.LANCHOR75]
+	strh	wzr, [x24, #:lo12:.LANCHOR90]
+	strh	wzr, [x23, #:lo12:.LANCHOR92]
+	strh	wzr, [x22, #:lo12:.LANCHOR94]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	strh	wzr, [x21, #:lo12:.LANCHOR88]
-	strh	wzr, [x20, #:lo12:.LANCHOR90]
-	strh	wzr, [x19, #:lo12:.LANCHOR86]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	strh	wzr, [x21, #:lo12:.LANCHOR85]
+	strh	wzr, [x20, #:lo12:.LANCHOR87]
+	strh	wzr, [x19, #:lo12:.LANCHOR83]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
-	add	x0, x27, :lo12:.LANCHOR2
+	add	x0, x27, :lo12:.LANCHOR6
 	adrp	x27, .LC82
 	add	x27, x27, :lo12:.LC82
 	stp	x3, x2, [x29, 104]
@@ -7618,24 +7757,24 @@ zftl_sblk_list_init:
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1308:
+.L1341:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1324
-	ldr	x0, [x25, #:lo12:.LANCHOR100]
-	ldrh	w1, [x24, #:lo12:.LANCHOR93]
+	blt	.L1357
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
+	ldrh	w1, [x24, #:lo12:.LANCHOR90]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR95]
+	ldrh	w1, [x23, #:lo12:.LANCHOR92]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR97]
+	ldrh	w1, [x22, #:lo12:.LANCHOR94]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR88]
+	ldrh	w1, [x21, #:lo12:.LANCHOR85]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR90]
+	ldrh	w1, [x20, #:lo12:.LANCHOR87]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR86]
+	ldrh	w1, [x19, #:lo12:.LANCHOR83]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7643,32 +7782,32 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1324:
-	ldr	x4, [x28, #:lo12:.LANCHOR3]
+.L1357:
+	ldr	x4, [x28, #:lo12:.LANCHOR7]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1325
+	cbz	w6, .L1358
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR100]
-	ldrb	w8, [x0, #:lo12:.LANCHOR76]
+	ldr	x7, [x25, #:lo12:.LANCHOR97]
+	ldrb	w8, [x0, #:lo12:.LANCHOR73]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR75]
+	ldrh	w10, [x0, #:lo12:.LANCHOR72]
 	mov	w0, 0
-.L1310:
+.L1343:
 	cmp	w1, w8
-	blt	.L1313
-	cbz	w0, .L1314
+	blt	.L1346
+	cbz	w0, .L1347
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	add	w0, w0, 1
 	sxth	w0, w0
-.L1309:
+.L1342:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
-	ldr	x5, [x3, #:lo12:.LANCHOR0]
+	ldr	x5, [x3, #:lo12:.LANCHOR4]
 	add	x6, x5, x1
 	strh	w0, [x6, 4]
 	mov	w0, -1
@@ -7679,120 +7818,120 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1315
-	adrp	x5, .LANCHOR6
-	ldr	x5, [x5, #:lo12:.LANCHOR6]
+	beq	.L1348
+	adrp	x5, .LANCHOR10
+	ldr	x5, [x5, #:lo12:.LANCHOR10]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1315
+	beq	.L1348
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1315
+	beq	.L1348
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1315
+	beq	.L1348
 	cmp	w0, 64
-	bne	.L1316
+	bne	.L1349
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR88
+	add	x2, x21, :lo12:.LANCHOR85
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR8
-.L1328:
+	add	x0, x0, :lo12:.LANCHOR12
+.L1361:
 	bl	_insert_data_list
-.L1315:
+.L1348:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1308
-.L1313:
+	b	.L1341
+.L1346:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1311
+	tbnz	x5, 0, .L1344
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1312:
+.L1345:
 	add	w1, w1, 1
-	b	.L1310
-.L1311:
+	b	.L1343
+.L1344:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1312
-.L1314:
+	b	.L1345
+.L1347:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
 	strb	w1, [x4, 2]
-	adrp	x1, .LANCHOR5
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR9
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1309
-.L1325:
+	b	.L1342
+.L1358:
 	ldr	w0, [x29, 188]
-	b	.L1309
-.L1316:
+	b	.L1342
+.L1349:
 	cmp	w0, 96
-	bne	.L1317
+	bne	.L1350
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR86
+	add	x2, x19, :lo12:.LANCHOR83
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR79
-	b	.L1328
-.L1317:
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L1361
+.L1350:
 	cmp	w0, 160
-	bne	.L1318
+	bne	.L1351
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR90
+	add	x2, x20, :lo12:.LANCHOR87
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR78
-	b	.L1328
-.L1318:
-	cbnz	w0, .L1315
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	add	x0, x0, :lo12:.LANCHOR75
+	b	.L1361
+.L1351:
+	cbnz	w0, .L1348
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1319
+	cbz	w2, .L1352
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1320
+	tbz	x0, 4, .L1353
 	mov	w1, 5
-.L1327:
+.L1360:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1315
-.L1320:
+	b	.L1348
+.L1353:
 	mov	w1, 2
-	b	.L1327
-.L1319:
+	b	.L1360
+.L1352:
 	ands	w1, w1, 24
-	bne	.L1322
+	bne	.L1355
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR93
+	add	x2, x24, :lo12:.LANCHOR90
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR94
-.L1329:
+	add	x0, x0, :lo12:.LANCHOR91
+.L1362:
 	bl	_insert_free_list
-	b	.L1315
-.L1322:
+	b	.L1348
+.L1355:
 	cmp	w1, 16
-	bne	.L1323
+	bne	.L1356
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR95
+	add	x2, x23, :lo12:.LANCHOR92
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR96
-	b	.L1329
-.L1323:
+	add	x0, x0, :lo12:.LANCHOR93
+	b	.L1362
+.L1356:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR97
+	add	x2, x22, :lo12:.LANCHOR94
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR98
-	b	.L1329
+	add	x0, x0, :lo12:.LANCHOR95
+	b	.L1362
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7802,19 +7941,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR76
+	adrp	x20, .LANCHOR73
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
 	adrp	x21, .LC70
-	adrp	x23, .LANCHOR83
+	adrp	x23, .LANCHOR80
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR83
-	add	x20, x20, :lo12:.LANCHOR76
+	add	x23, x23, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR73
 	add	x21, x21, :lo12:.LC70
 	stp	x25, x26, [sp, 64]
-.L1331:
-.L1334:
+.L1364:
+.L1367:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7834,40 +7973,40 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1335
+	beq	.L1368
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1332:
+.L1365:
 	ldrb	w2, [x20]
-	adrp	x26, .LANCHOR5
+	adrp	x26, .LANCHOR9
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR114
-	ldr	x3, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR111
+	ldr	x3, [x1, #:lo12:.LANCHOR111]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
 	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR5]
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1330
+	cbnz	w0, .L1363
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR5]
+	ldr	x0, [x26, #:lo12:.LANCHOR9]
 	mov	w1, -1
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1334
-.L1335:
+	b	.L1367
+.L1368:
 	mov	w0, 0
-	b	.L1332
-.L1330:
+	b	.L1365
+.L1363:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7883,34 +8022,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR140
+	adrp	x20, .LANCHOR141
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR140]
+	ldrh	w0, [x20, #:lo12:.LANCHOR141]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1338
-	adrp	x1, .LANCHOR141
+	bls	.L1371
+	adrp	x1, .LANCHOR142
 	adrp	x0, .LC0
 	mov	w2, 78
-	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR142
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1338:
+.L1371:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR101
-	adrp	x5, .LANCHOR100
-	adrp	x0, .LANCHOR102
+	adrp	x23, .LANCHOR98
+	adrp	x5, .LANCHOR97
+	adrp	x0, .LANCHOR99
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR101]
-	ldr	x7, [x5, #:lo12:.LANCHOR100]
-	ldrh	w11, [x0, #:lo12:.LANCHOR102]
-	ldrh	w13, [x20, #:lo12:.LANCHOR140]
+	ldrb	w12, [x23, #:lo12:.LANCHOR98]
+	ldr	x7, [x5, #:lo12:.LANCHOR97]
+	ldrh	w11, [x0, #:lo12:.LANCHOR99]
+	ldrh	w13, [x20, #:lo12:.LANCHOR141]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -7919,26 +8058,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1339:
+.L1372:
 	cmp	x4, x1
-	bne	.L1343
-	adrp	x24, .LANCHOR76
-	adrp	x25, .LANCHOR83
-	adrp	x26, .LANCHOR9
+	bne	.L1376
+	adrp	x24, .LANCHOR73
+	adrp	x25, .LANCHOR80
+	adrp	x26, .LANCHOR14
 	adrp	x27, .LC83
-	ldrb	w22, [x24, #:lo12:.LANCHOR76]
-	add	x20, x20, :lo12:.LANCHOR140
-	ldrh	w0, [x25, #:lo12:.LANCHOR83]
-	add	x26, x26, :lo12:.LANCHOR9
+	ldrb	w22, [x24, #:lo12:.LANCHOR73]
+	add	x20, x20, :lo12:.LANCHOR141
+	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	add	x26, x26, :lo12:.LANCHOR14
 	add	x27, x27, :lo12:.LC83
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1344:
+.L1377:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1350
+	bhi	.L1383
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7947,7 +8086,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1343:
+.L1376:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -7955,47 +8094,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1340:
+.L1373:
 	cmp	w13, w3, uxth
-	bhi	.L1342
+	bhi	.L1375
 	add	x4, x4, 4
-	b	.L1339
-.L1342:
+	b	.L1372
+.L1375:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1341
+	bne	.L1374
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1341:
+.L1374:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1340
-.L1350:
-	ldr	x1, [x5, #:lo12:.LANCHOR100]
+	b	.L1373
+.L1383:
+	ldr	x1, [x5, #:lo12:.LANCHOR97]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR98]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1345
-	ldrb	w0, [x24, #:lo12:.LANCHOR76]
-	ldrh	w2, [x25, #:lo12:.LANCHOR83]
+	bne	.L1378
+	ldrb	w0, [x24, #:lo12:.LANCHOR73]
+	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1345:
+.L1378:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1346
-	cbnz	w0, .L1351
-.L1348:
+	bls	.L1379
+	cbnz	w0, .L1384
+.L1381:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1347
+	beq	.L1380
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1349
+	tbz	x0, 12, .L1382
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -8003,30 +8142,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1349:
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+.L1382:
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR100]
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1347
-.L1346:
-	cbz	w0, .L1348
-.L1347:
+	b	.L1380
+.L1379:
+	cbz	w0, .L1381
+.L1380:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1344
-.L1351:
+	b	.L1377
+.L1384:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1347
+	b	.L1380
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -8058,24 +8197,24 @@ ftl_memcpy:
 	.type	flash_into_data_init, %function
 flash_into_data_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1360
-	adrp	x2, .LANCHOR142
+	tbz	x0, 12, .L1393
+	adrp	x2, .LANCHOR143
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR142
+	add	x2, x2, :lo12:.LANCHOR143
 	mov	w1, 100
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1360:
-	adrp	x19, .LANCHOR22
+.L1393:
+	adrp	x19, .LANCHOR26
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR22]
+	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR22]
+	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -8085,10 +8224,10 @@ flash_into_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR15
-	add	x1, x1, :lo12:.LANCHOR15
+	adrp	x1, .LANCHOR19
+	add	x1, x1, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR22]
+	ldr	x0, [x19, #:lo12:.LANCHOR26]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
 	adrp	x1, .LANCHOR34
@@ -8103,15 +8242,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1366:
+.L1399:
 	cmp	w2, w3
-	bhi	.L1367
+	bhi	.L1400
 	ret
-.L1367:
+.L1400:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1366
+	b	.L1399
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -8147,54 +8286,58 @@ nandc_init:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR9
+	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1372
-	adrp	x1, .LANCHOR143
+	tbz	x0, 12, .L1405
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC85
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1372:
-	adrp	x20, .LANCHOR24
+.L1405:
+	adrp	x20, .LANCHOR27
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR24]
-	adrp	x0, .LANCHOR23
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR13
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
-	str	x19, [x0, #:lo12:.LANCHOR23]
+	str	x19, [x0, #:lo12:.LANCHOR13]
 	cmp	w2, w1
-	bne	.L1373
+	bne	.L1406
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR24]
-.L1373:
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1406:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1374
+	bne	.L1407
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR24]
-.L1374:
-	ldrb	w0, [x20, #:lo12:.LANCHOR24]
+	strb	w0, [x20, #:lo12:.LANCHOR27]
+.L1407:
+	ldrb	w0, [x20, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR43
-	bne	.L1375
+	adrp	x0, .LANCHOR44
+	bne	.L1408
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR43]
+	strb	w1, [x0, #:lo12:.LANCHOR44]
 	ldr	w0, [x29, 56]
+	mov	w1, 2
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
 	ldr	w0, [x29, 56]
+	bfi	w0, w1, 18, 3
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
 	str	w0, [x19]
 	str	wzr, [x19, 520]
-	mov	w0, 4225
+	mov	w0, 4161
 	str	w0, [x19, 4]
 	mov	w0, 8321
 	str	w0, [x19, 8]
@@ -8205,45 +8348,49 @@ nandc_init:
 	str	w0, [x19, 84]
 	mov	w0, 39
 	str	w0, [x19, 84]
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1377
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1410
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1390:
+.L1423:
 	adrp	x0, .LC86
 	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1377:
-	adrp	x0, .LANCHOR44
+.L1410:
+	adrp	x0, .LANCHOR45
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR46
-	strh	wzr, [x0, #:lo12:.LANCHOR46]
-	adrp	x0, .LANCHOR42
-	strb	wzr, [x0, #:lo12:.LANCHOR42]
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1371
-	ldrb	w1, [x20, #:lo12:.LANCHOR24]
+	strb	w1, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR47
+	strh	wzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR43
+	strb	wzr, [x0, #:lo12:.LANCHOR43]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1404
+	ldrb	w1, [x20, #:lo12:.LANCHOR27]
 	adrp	x0, .LC87
 	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1371:
+.L1404:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1375:
-	strb	wzr, [x0, #:lo12:.LANCHOR43]
+.L1408:
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
+	mov	w1, 1
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
 	ldr	w0, [x29, 56]
+	bfi	w0, w1, 24, 3
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
 	str	w0, [x19]
 	str	wzr, [x19, 336]
-	mov	w0, 4225
+	mov	w0, 4193
 	str	w0, [x19, 4]
 	mov	w0, 8321
 	str	w0, [x19, 344]
@@ -8256,17 +8403,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR45
-	str	x0, [x1, #:lo12:.LANCHOR45]
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1377
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR46
+	str	x0, [x1, #:lo12:.LANCHOR46]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1410
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1390
+	b	.L1423
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -8274,16 +8421,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR48
+	add	x19, x0, :lo12:.LANCHOR49
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR123
-	add	x22, x22, :lo12:.LANCHOR123
+	adrp	x22, .LANCHOR121
+	add	x22, x22, :lo12:.LANCHOR121
 	mov	w21, 0
-.L1392:
+.L1425:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -8301,15 +8448,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1392
-	add	x0, x20, :lo12:.LANCHOR48
+	bne	.L1425
+	add	x0, x20, :lo12:.LANCHOR49
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR49
-	strb	wzr, [x0, #:lo12:.LANCHOR49]
 	adrp	x0, .LANCHOR50
+	strb	wzr, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR51
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR50]
+	strb	w21, [x0, #:lo12:.LANCHOR51]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -8320,91 +8467,91 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR71
 	mov	w2, 328
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR144
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR65
-	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	strb	wzr, [x0, #:lo12:.LANCHOR71]
 	adrp	x0, .LANCHOR145
-	add	x19, x20, :lo12:.LANCHOR65
-	str	wzr, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR85
-	strh	wzr, [x0, #:lo12:.LANCHOR85]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR62
+	strb	wzr, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR146
+	add	x19, x20, :lo12:.LANCHOR62
+	str	wzr, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x0, #:lo12:.LANCHOR82]
 	mov	x0, x19
 	bl	ftl_memset
 	str	xzr, [x19, 8]
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR83
-	adrp	x4, .LANCHOR92
-	adrp	x20, .LANCHOR75
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	strh	w0, [x20, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR80
+	adrp	x4, .LANCHOR89
+	adrp	x20, .LANCHOR72
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR84
-	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR76
-	strh	wzr, [x2, #:lo12:.LANCHOR84]
-	adrp	x2, .LANCHOR80
-	ldrb	w3, [x19, #:lo12:.LANCHOR76]
-	strh	wzr, [x2, #:lo12:.LANCHOR80]
 	adrp	x2, .LANCHOR81
+	strh	w0, [x19, 36]
+	adrp	x19, .LANCHOR73
 	strh	wzr, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR77
+	ldrb	w3, [x19, #:lo12:.LANCHOR73]
+	strh	wzr, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR78
+	strh	wzr, [x2, #:lo12:.LANCHOR78]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR92]
-	adrp	x4, .LANCHOR89
-	strh	w2, [x4, #:lo12:.LANCHOR89]
-	adrp	x2, .LANCHOR82
-	strh	w1, [x2, #:lo12:.LANCHOR82]
-	adrp	x1, .LANCHOR64
-	strh	w0, [x1, #:lo12:.LANCHOR64]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	strh	w5, [x4, #:lo12:.LANCHOR89]
+	adrp	x4, .LANCHOR86
+	strh	w2, [x4, #:lo12:.LANCHOR86]
+	adrp	x2, .LANCHOR79
+	strh	w1, [x2, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR61
+	strh	w0, [x1, #:lo12:.LANCHOR61]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR146
-	str	x0, [x1, #:lo12:.LANCHOR146]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR147]
+	ldrb	w1, [x19, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR147
-	str	x0, [x1, #:lo12:.LANCHOR147]
-	ldrh	w1, [x20, #:lo12:.LANCHOR75]
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR148
+	str	x0, [x1, #:lo12:.LANCHOR148]
+	ldrh	w1, [x20, #:lo12:.LANCHOR72]
+	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR72
-	str	x0, [x1, #:lo12:.LANCHOR72]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR69
+	str	x0, [x1, #:lo12:.LANCHOR69]
+	ldrb	w1, [x19, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR68
-	str	x0, [x1, #:lo12:.LANCHOR68]
-	ldrb	w1, [x19, #:lo12:.LANCHOR76]
-	ldrh	w0, [x20, #:lo12:.LANCHOR75]
+	adrp	x1, .LANCHOR65
+	str	x0, [x1, #:lo12:.LANCHOR65]
+	ldrb	w1, [x19, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR148
+	adrp	x1, .LANCHOR149
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR87
-	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR149]
+	adrp	x0, .LANCHOR84
+	adrp	x1, .LANCHOR74
 	ldp	x29, x30, [sp], 32
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR77]
+	strh	w0, [x1, #:lo12:.LANCHOR74]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -8423,18 +8570,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1399:
+.L1432:
 	cmp	w1, w3
-	bhi	.L1400
+	bhi	.L1433
 	ret
-.L1400:
+.L1433:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1399
+	b	.L1432
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -8471,8 +8618,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR61
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR58
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -8498,9 +8645,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC90
-.L1407:
+.L1440:
 	cmp	x25, x19
-	bne	.L1413
+	bne	.L1446
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC90
 	ldp	x21, x22, [sp, 32]
@@ -8512,38 +8659,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1413:
-	cbnz	w20, .L1408
+.L1446:
+	cbnz	w20, .L1441
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1408:
+.L1441:
 	cmp	w24, 4
-	bne	.L1409
+	bne	.L1442
 	ldr	w1, [x22, x19, lsl 2]
-.L1415:
+.L1448:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1412
+	bls	.L1445
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC90
 	adrp	x0, .LC91
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1412:
+.L1445:
 	add	x19, x19, 1
-	b	.L1407
-.L1409:
+	b	.L1440
+.L1442:
 	cmp	w24, 2
-	bne	.L1411
+	bne	.L1444
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1415
-.L1411:
+	b	.L1448
+.L1444:
 	ldrb	w1, [x22, x19]
-	b	.L1415
+	b	.L1448
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -8557,9 +8704,9 @@ hynix_get_read_retry_default:
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR26
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR22]
+	ldr	x28, [x0, #:lo12:.LANCHOR26]
 	stp	x23, x24, [sp, 48]
 	add	x0, x28, 112
 	str	x0, [x29, 112]
@@ -8575,43 +8722,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1417
+	bne	.L1450
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR149+17
+	adrp	x0, .LANCHOR150+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR149+17]
-.L1472:
+	strb	w1, [x0, #:lo12:.LANCHOR150+17]
+.L1505:
 	mov	w0, 7
-	b	.L1507
-.L1417:
+	b	.L1540
+.L1450:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1419
+	bne	.L1452
 	mov	x6, 0
-.L1420:
+.L1453:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1420
+	bne	.L1453
 	stp	w6, w6, [x29, 132]
-.L1418:
+.L1451:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1425
-	adrp	x7, .LANCHOR14
-	adrp	x11, .LANCHOR26
-	add	x24, x7, :lo12:.LANCHOR14
-	add	x25, x11, :lo12:.LANCHOR26
+	bhi	.L1458
+	adrp	x7, .LANCHOR18
+	adrp	x11, .LANCHOR29
+	add	x24, x7, :lo12:.LANCHOR18
+	add	x25, x11, :lo12:.LANCHOR29
 	mov	w20, 0
 	mov	w26, 55
-.L1426:
+.L1459:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1432
-.L1433:
+	bhi	.L1465
+.L1466:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -8624,10 +8771,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1419:
+.L1452:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1421
+	bne	.L1454
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -8643,13 +8790,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1508:
+.L1541:
 	str	w0, [x29, 136]
-	b	.L1418
-.L1421:
+	b	.L1451
+.L1454:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1422
+	bne	.L1455
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -8659,14 +8806,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1507:
+.L1540:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1508
-.L1422:
+	b	.L1541
+.L1455:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1423
+	bne	.L1456
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -8676,18 +8823,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1507
-.L1423:
+	b	.L1540
+.L1456:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1472
+	bne	.L1505
 	mov	x0, 0
-.L1424:
+.L1457:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1424
+	bne	.L1457
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -8695,8 +8842,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1508
-.L1432:
+	b	.L1541
+.L1465:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -8705,10 +8852,10 @@ hynix_get_read_retry_default:
 	ldr	x1, [x29, 112]
 	ubfiz	x0, x0, 8, 8
 	add	x19, x1, x2
-	adrp	x1, .LANCHOR23
-	ldr	x4, [x1, #:lo12:.LANCHOR23]
+	adrp	x1, .LANCHOR13
+	ldr	x4, [x1, #:lo12:.LANCHOR13]
 	add	x23, x4, x0
-.L1427:
+.L1460:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -8719,15 +8866,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1427
-	adrp	x3, .LANCHOR149
-	add	x3, x3, :lo12:.LANCHOR149
+	bhi	.L1460
+	adrp	x3, .LANCHOR150
+	add	x3, x3, :lo12:.LANCHOR150
 	mov	x0, 0
-.L1430:
+.L1463:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1429:
+.L1462:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8736,10 +8883,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1429
+	bne	.L1462
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1430
+	bne	.L1463
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8749,15 +8896,15 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1426
-.L1425:
+	b	.L1459
+.L1458:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1433
+	bhi	.L1466
 	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR14
-	add	x19, x19, :lo12:.LANCHOR14
+	adrp	x19, .LANCHOR18
+	add	x19, x19, :lo12:.LANCHOR18
 	sub	w13, w1, #1
 	mul	w15, w0, w1
 	and	x13, x13, 255
@@ -8772,14 +8919,14 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1434:
+.L1467:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1433
+	bls	.L1466
 	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	mov	w10, 160
 	mov	w23, 255
 	ldrb	w4, [x0, w1, sxtw]
@@ -8789,8 +8936,8 @@ hynix_get_read_retry_default:
 	ubfiz	x4, x4, 8, 8
 	add	x0, x0, x10
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR23
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	add	x27, x0, x4
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
@@ -8798,22 +8945,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1435
+	bne	.L1468
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1509:
+.L1542:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1510
-.L1435:
+	b	.L1543
+.L1468:
 	cmp	w20, 1
-	bhi	.L1437
+	bhi	.L1470
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1510:
+.L1543:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8828,10 +8975,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1438
+	bne	.L1471
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1439:
+.L1472:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8839,122 +8986,122 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1473
+	bls	.L1506
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1440:
-	adrp	x3, .LANCHOR150
+.L1473:
+	adrp	x3, .LANCHOR151
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR150]
-.L1441:
+	ldr	x0, [x3, #:lo12:.LANCHOR151]
+.L1474:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1441
+	bhi	.L1474
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1442
+	bne	.L1475
 	mov	w1, 0
-.L1444:
+.L1477:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1443
+	beq	.L1476
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1443
+	beq	.L1476
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1444
-.L1445:
+	bne	.L1477
+.L1478:
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1447:
-	b	.L1447
-.L1437:
+.L1480:
+	b	.L1480
+.L1470:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1509
-.L1438:
+	b	.L1542
+.L1471:
 	str	wzr, [x27, 2052]
-	b	.L1439
-.L1473:
+	b	.L1472
+.L1506:
 	mov	w23, 16
-	b	.L1440
-.L1443:
+	b	.L1473
+.L1476:
 	cmp	w1, 6
-	bhi	.L1445
-.L1446:
-	ldr	x2, [x3, #:lo12:.LANCHOR150]
+	bhi	.L1478
+.L1479:
+	ldr	x2, [x3, #:lo12:.LANCHOR151]
 	mov	x0, 0
-.L1451:
+.L1484:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1452
-	ldr	x1, [x3, #:lo12:.LANCHOR150]
+	bgt	.L1485
+	ldr	x1, [x3, #:lo12:.LANCHOR151]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1454:
+.L1487:
 	mov	x0, 0
-.L1453:
+.L1486:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1453
+	bgt	.L1486
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1454
+	bne	.L1487
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1455:
+.L1488:
 	mov	w3, 0
 	mov	w0, 0
-.L1459:
+.L1492:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1457:
+.L1490:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1457
+	bne	.L1490
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1459
+	bne	.L1492
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1455
+	bgt	.L1488
 	mov	x0, 0
 	mov	w3, 0
-.L1462:
+.L1495:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1462
+	bne	.L1495
 	cmp	w3, 7
-	ble	.L1463
+	ble	.L1496
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC93
@@ -8964,67 +9111,67 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1464:
-	b	.L1464
-.L1442:
+.L1497:
+	b	.L1497
+.L1475:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1446
+	bne	.L1479
 	mov	x1, 0
-.L1448:
+.L1481:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1446
+	beq	.L1479
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1446
+	beq	.L1479
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1448
+	bne	.L1481
 	adrp	x0, .LC92
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1450:
-	b	.L1450
-.L1452:
+.L1483:
+	b	.L1483
+.L1485:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1451
-.L1463:
+	b	.L1484
+.L1496:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1475
+	beq	.L1508
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1465:
+.L1498:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1466:
+.L1499:
 	mov	x1, 0
-.L1467:
+.L1500:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1467
+	bhi	.L1500
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1466
+	bgt	.L1499
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1469
+	bhi	.L1502
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -9039,20 +9186,20 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1511:
+.L1544:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1434
-.L1475:
+	b	.L1467
+.L1508:
 	mov	x0, 4
-	b	.L1465
-.L1469:
+	b	.L1498
+.L1502:
 	mov	w0, 56
-	b	.L1511
+	b	.L1544
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -9064,9 +9211,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1512
+	bhi	.L1545
 	b	hynix_get_read_retry_default
-.L1512:
+.L1545:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -9075,81 +9222,81 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR151
-	adrp	x1, .LANCHOR24
+	adrp	x0, .LANCHOR152
+	adrp	x1, .LANCHOR27
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR23
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x19, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR151]
-	bne	.L1515
-	ldr	x20, [x19, #:lo12:.LANCHOR23]
+	strb	wzr, [x0, #:lo12:.LANCHOR152]
+	bne	.L1548
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1516
+	tbnz	x0, 1, .L1549
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1517:
+.L1550:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	tbnz	x0, 20, .L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1517
+	bne	.L1550
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1517
-.L1516:
+	b	.L1550
+.L1549:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1518:
+.L1551:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	bge	.L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1519
+	tbz	x0, 13, .L1552
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1519
+	tbz	x0, 17, .L1552
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
 	ubfx	x1, x1, 17, 1
-.L1552:
+.L1585:
 	bl	printf
-	b	.L1520
-.L1519:
+	b	.L1553
+.L1552:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1518
+	bne	.L1551
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9157,82 +9304,82 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	x0, x23
 	mov	w3, 64
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1518
+	tbz	x0, 13, .L1551
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR151]
-.L1520:
-	adrp	x0, .LANCHOR45+32
+	strb	w0, [x24, #:lo12:.LANCHOR152]
+.L1553:
+	adrp	x0, .LANCHOR46+32
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR45+32]
+	str	wzr, [x0, #:lo12:.LANCHOR46+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1515:
-	ldr	x20, [x19, #:lo12:.LANCHOR23]
+.L1548:
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1526
+	tbnz	x0, 1, .L1559
 	adrp	x22, .LC97
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC97
 	add	x23, x23, :lo12:.LC96
-.L1527:
+.L1560:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	tbnz	x0, 20, .L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1527
+	bne	.L1560
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1527
-.L1526:
+	b	.L1560
+.L1559:
 	adrp	x22, .LC95
 	adrp	x23, .LC96
 	add	x22, x22, :lo12:.LC95
 	add	x23, x23, :lo12:.LC96
-.L1528:
+.L1561:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1520
-	ldr	x0, [x19, #:lo12:.LANCHOR23]
+	bge	.L1553
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1529
+	tbz	x0, 13, .L1562
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1529
+	tbz	x0, 17, .L1562
 	adrp	x0, .LC98
 	ldr	w1, [x29, 72]
 	add	x0, x0, :lo12:.LC98
-	b	.L1552
-.L1529:
+	b	.L1585
+.L1562:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1528
+	bne	.L1561
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -9240,12 +9387,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR23]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1528
+	b	.L1561
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -9266,20 +9413,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1572
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	cbnz	w22, .L1605
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L1555
-	adrp	x22, .LANCHOR23
+	bne	.L1588
+	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
-	ldr	x5, [x22, #:lo12:.LANCHOR23]
+	ldr	x5, [x22, #:lo12:.LANCHOR13]
 	mov	w0, 0
-.L1556:
+.L1589:
 	cmp	w2, w19
-	bcc	.L1560
+	bcc	.L1593
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -9288,35 +9435,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1562
+	bne	.L1595
 	mov	w1, w19
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1562:
-	tbz	x19, 13, .L1563
-	adrp	x1, .LANCHOR151
-	ldrb	w1, [x1, #:lo12:.LANCHOR151]
-	cbz	w1, .L1563
+.L1595:
+	tbz	x19, 13, .L1596
+	adrp	x1, .LANCHOR152
+	ldrb	w1, [x1, #:lo12:.LANCHOR152]
+	cbz	w1, .L1596
 	mov	w1, w19
 	adrp	x0, .LC100
 	add	x0, x0, :lo12:.LC100
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1591:
+.L1624:
 	mov	w0, -1
-.L1554:
+.L1587:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1560:
+.L1593:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -9327,70 +9474,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1574
+	tbnz	x1, 2, .L1607
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1574
+	tbnz	x1, 18, .L1607
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1558
+	ble	.L1591
 	ubfx	x1, x1, 3, 7
-.L1559:
+.L1592:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1557:
+.L1590:
 	add	w2, w2, 1
-	b	.L1556
-.L1558:
+	b	.L1589
+.L1591:
 	ubfx	x1, x1, 19, 7
-	b	.L1559
-.L1574:
+	b	.L1592
+.L1607:
 	mov	w0, -1
-	b	.L1557
-.L1555:
-	adrp	x0, .LANCHOR42
+	b	.L1590
+.L1588:
+	adrp	x0, .LANCHOR43
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	mov	w2, 0
-	adrp	x6, .LANCHOR45
+	adrp	x6, .LANCHOR46
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1565:
+.L1598:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1566
-	adrp	x22, .LANCHOR23
+	bcc	.L1599
+	adrp	x22, .LANCHOR13
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR23]
-.L1567:
+	ldr	x4, [x22, #:lo12:.LANCHOR13]
+.L1600:
 	cmp	w3, w19
-	bcc	.L1571
+	bcc	.L1604
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1563
+	bne	.L1596
 	mov	w1, w19
 	adrp	x0, .LC101
 	add	x0, x0, :lo12:.LC101
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR23]
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1591
-.L1566:
-	ldr	x7, [x6, #:lo12:.LANCHOR45]
+	b	.L1624
+.L1599:
+	ldr	x7, [x6, #:lo12:.LANCHOR46]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -9406,16 +9553,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1565
-.L1571:
+	b	.L1598
+.L1604:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1577
+	tbnz	x1, 2, .L1610
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1577
+	tbnz	x1, 15, .L1610
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -9428,42 +9575,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1569
+	bls	.L1602
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1590:
+.L1623:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1568:
+.L1601:
 	add	w3, w3, 1
-	b	.L1567
-.L1569:
+	b	.L1600
+.L1602:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1590
-.L1577:
+	b	.L1623
+.L1610:
 	mov	w0, -1
-	b	.L1568
-.L1563:
+	b	.L1601
+.L1596:
 	cmn	w0, #1
-	beq	.L1554
+	beq	.L1587
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1554
+	bne	.L1587
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1554
+	bne	.L1587
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1554
-.L1572:
+	b	.L1587
+.L1605:
 	mov	w0, 0
-	b	.L1554
+	b	.L1587
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -9474,35 +9621,35 @@ flash_read_page:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w22, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR23]
-	adrp	x0, .LANCHOR9
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR14
 	stp	x25, x26, [sp, 64]
 	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x25, x2
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1593
+	tbz	x0, 4, .L1626
 	mov	w3, w1
 	adrp	x0, .LC102
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1593:
+.L1626:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR11
-	cbnz	w23, .L1594
+	adrp	x6, .LANCHOR16
+	cbnz	w23, .L1627
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1595:
+.L1628:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -9516,15 +9663,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR11]
+	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1597
-	cbz	w23, .L1597
+	bne	.L1630
+	cbz	w23, .L1630
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1606:
+.L1639:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -9540,8 +9687,7 @@ flash_read_page:
 	mov	w0, w21
 	bl	nandc_xfer
 	mov	w2, w0
-	mov	w0, 0
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9549,23 +9695,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1594:
-	ldr	x0, [x6, #:lo12:.LANCHOR11]
+.L1627:
+	ldr	x0, [x6, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1596
+	bne	.L1629
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1595
-.L1596:
+	b	.L1628
+.L1629:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1595
-.L1597:
+	b	.L1628
+.L1630:
 	mov	w0, w20
-	b	.L1606
+	b	.L1639
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -9576,7 +9722,7 @@ micron_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w0, 255
-	adrp	x0, .LANCHOR42
+	adrp	x0, .LANCHOR43
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w22, w1
@@ -9584,31 +9730,31 @@ micron_read_retrial:
 	mov	x25, x2
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
-	ldrb	w20, [x0, #:lo12:.LANCHOR42]
+	ldrb	w20, [x0, #:lo12:.LANCHOR43]
 	and	x19, x24, 255
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR23
+	adrp	x0, .LANCHOR13
 	mov	w21, 0
 	add	w20, w20, w20, lsl 1
 	mov	w28, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
 	asr	w20, w20, 2
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR153
-	add	x0, x0, :lo12:.LANCHOR153
+	adrp	x0, .LANCHOR154
+	add	x0, x0, :lo12:.LANCHOR154
 	str	x0, [x29, 104]
 	ldr	x0, [x29, 120]
 	add	x23, x0, x19, lsl 8
-	adrp	x0, .LANCHOR9
-	add	x0, x0, :lo12:.LANCHOR9
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 96]
-.L1608:
+.L1641:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1613
-.L1612:
+	bcc	.L1646
+.L1645:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -9622,14 +9768,14 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1614
+	bcc	.L1647
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1614:
+.L1647:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1607
+	bne	.L1640
 	adrp	x0, .LC104
 	mov	w4, w28
 	mov	w3, w21
@@ -9637,7 +9783,7 @@ micron_read_retrial:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1607:
+.L1640:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9646,7 +9792,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1613:
+.L1646:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -9667,7 +9813,7 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1609
+	tbz	x0, 12, .L1642
 	str	w7, [x29, 112]
 	mov	w4, w28
 	mov	w3, w21
@@ -9677,23 +9823,23 @@ micron_read_retrial:
 	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1609:
+.L1642:
 	cmn	w7, #1
-	beq	.L1610
-	adrp	x0, .LANCHOR150
+	beq	.L1643
+	adrp	x0, .LANCHOR151
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x25, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x26, [x0, #:lo12:.LANCHOR152]
-	bcc	.L1616
-.L1610:
+	ldr	x25, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x26, [x0, #:lo12:.LANCHOR153]
+	bcc	.L1649
+.L1643:
 	mov	w21, w27
-	b	.L1608
-.L1616:
+	b	.L1641
+.L1649:
 	mov	w28, w7
-	b	.L1612
+	b	.L1645
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9714,15 +9860,15 @@ toshiba_3d_read_retrial:
 	mov	x27, x3
 	mov	x26, x2
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR23
-	adrp	x22, .LANCHOR19
+	adrp	x0, .LANCHOR13
+	adrp	x22, .LANCHOR23
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x25, [x0, #:lo12:.LANCHOR23]
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	and	x0, x24, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	mov	w19, -1
 	add	x21, x25, x21, lsl 8
 	mov	w20, 1
@@ -9733,18 +9879,18 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR19
-	cbnz	w4, .L1631
+	add	x0, x22, :lo12:.LANCHOR23
+	cbnz	w4, .L1664
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1638:
+.L1671:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1632
+	bne	.L1665
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9752,7 +9898,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1633:
+.L1666:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9760,9 +9906,9 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L1634
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1667
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -9771,51 +9917,51 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1634:
+.L1667:
 	cmn	w4, #1
-	beq	.L1635
-	adrp	x0, .LANCHOR150
+	beq	.L1668
+	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x27, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldr	x26, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1653
-.L1635:
+	bcc	.L1686
+.L1668:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1638
-.L1637:
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+	bne	.L1671
+.L1670:
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1639
+	bne	.L1672
 	mov	w2, 0
-.L1676:
+.L1709:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1640
-.L1632:
+	b	.L1673
+.L1665:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1633
-.L1653:
+	b	.L1666
+.L1686:
 	mov	w19, w4
-	b	.L1637
-.L1639:
+	b	.L1670
+.L1672:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1640:
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+.L1673:
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1649
+	bne	.L1682
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9824,19 +9970,19 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1649:
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+.L1682:
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1650
+	bcc	.L1683
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1650:
+.L1683:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1651
+	bne	.L1684
 	adrp	x0, .LC107
 	mov	w4, w19
 	mov	w3, w20
@@ -9844,7 +9990,7 @@ toshiba_3d_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1651:
+.L1684:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9854,23 +10000,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1631:
+.L1664:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1647:
+.L1680:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1641
+	bne	.L1674
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1675:
+.L1708:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -9880,9 +10026,9 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L1643
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L1676
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
@@ -9891,45 +10037,45 @@ toshiba_3d_read_retrial:
 	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1643:
+.L1676:
 	cmn	w4, #1
-	beq	.L1644
-	adrp	x0, .LANCHOR150
+	beq	.L1677
+	adrp	x0, .LANCHOR151
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x27, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	add	w0, w0, w0, lsl 1
-	cmp	w4, w0, lsr 2
-	bcc	.L1654
-.L1644:
+	ldr	x26, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1687
+.L1677:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1647
-.L1646:
-	ldrb	w0, [x22, #:lo12:.LANCHOR19]
+	bne	.L1680
+.L1679:
+	ldrb	w0, [x22, #:lo12:.LANCHOR23]
 	cmp	w0, 36
-	bne	.L1648
+	bne	.L1681
 	mov	w2, 1
-	b	.L1676
-.L1641:
+	b	.L1709
+.L1674:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1675
-.L1654:
+	b	.L1708
+.L1687:
 	mov	w19, w4
-	b	.L1646
-.L1648:
+	b	.L1679
+.L1681:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1640
+	b	.L1673
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -9949,74 +10095,74 @@ toshiba_read_retrial:
 	mov	x27, x3
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR23
-	adrp	x1, .LANCHOR19
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR23
 	str	x1, [x29, 120]
-	ldr	x22, [x0, #:lo12:.LANCHOR23]
+	ldr	x22, [x0, #:lo12:.LANCHOR13]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	ldrb	w0, [x1, #:lo12:.LANCHOR23]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1695
-	adrp	x0, .LANCHOR16
-	ldrb	w0, [x0, #:lo12:.LANCHOR16]
-	cbz	w0, .L1696
+	bls	.L1728
+	adrp	x0, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR20]
+	cbz	w0, .L1729
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1679:
+.L1712:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1678:
+.L1711:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1680:
-	adrp	x0, .LANCHOR153
-	ldrb	w0, [x0, #:lo12:.LANCHOR153]
+.L1713:
+	adrp	x0, .LANCHOR154
+	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1689
+	bcc	.L1722
 	mov	w28, w24
-.L1688:
+.L1721:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1690
+	bhi	.L1723
 	bl	sandisk_set_rr_para
-.L1691:
+.L1724:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1692
+	bcc	.L1725
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1692:
+.L1725:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1693
+	bne	.L1726
 	adrp	x0, .LC107
 	mov	w4, w28
 	mov	w3, w20
@@ -10024,12 +10170,12 @@ toshiba_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1693:
+.L1726:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1677
+	cbz	w23, .L1710
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1677:
+.L1710:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10038,36 +10184,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1696:
+.L1729:
 	mov	w23, 0
-	b	.L1679
-.L1695:
+	b	.L1712
+.L1728:
 	mov	w23, 0
-	b	.L1678
-.L1689:
+	b	.L1711
+.L1722:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1681
+	bhi	.L1714
 	bl	sandisk_set_rr_para
-.L1682:
+.L1715:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
 	cmp	w0, 34
-	bne	.L1683
-	adrp	x0, .LANCHOR153
-	ldrb	w0, [x0, #:lo12:.LANCHOR153]
+	bne	.L1716
+	adrp	x0, .LANCHOR154
+	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1683
+	bne	.L1716
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1683:
+.L1716:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -10082,27 +10228,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1686
+	beq	.L1719
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR150
-	ldr	x26, [x0, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR152
-	ldr	x27, [x0, #:lo12:.LANCHOR152]
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR151
+	ldr	x26, [x0, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR153
+	ldr	x27, [x0, #:lo12:.LANCHOR153]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1688
-.L1686:
+	bcc	.L1721
+.L1719:
 	add	w20, w20, 1
-	b	.L1680
-.L1681:
+	b	.L1713
+.L1714:
 	bl	toshiba_set_rr_para
-	b	.L1682
-.L1690:
+	b	.L1715
+.L1723:
 	bl	toshiba_set_rr_para
-	b	.L1691
+	b	.L1724
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -10113,11 +10259,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR26
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR22]
+	ldr	x28, [x0, #:lo12:.LANCHOR26]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -10130,29 +10276,29 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR42
-	add	x6, x6, :lo12:.LANCHOR42
+	adrp	x6, .LANCHOR43
+	add	x6, x6, :lo12:.LANCHOR43
 	mov	w5, 0
-	adrp	x7, .LANCHOR150
-	adrp	x8, .LANCHOR152
-.L1710:
+	adrp	x7, .LANCHOR151
+	adrp	x8, .LANCHOR153
+.L1743:
 	cmp	w5, w24
-	bcc	.L1715
-.L1714:
-	adrp	x0, .LANCHOR42
+	bcc	.L1748
+.L1747:
+	adrp	x0, .LANCHOR43
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1716
+	bcc	.L1749
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1716:
+.L1749:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1709
+	bne	.L1742
 	adrp	x0, .LC108
 	mov	w4, w19
 	mov	w3, w5
@@ -10160,7 +10306,7 @@ hynix_read_retrial:
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1709:
+.L1742:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10169,7 +10315,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1715:
+.L1748:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -10190,21 +10336,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1712
+	beq	.L1745
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR150]
-	ldr	x26, [x8, #:lo12:.LANCHOR152]
+	ldr	x25, [x7, #:lo12:.LANCHOR151]
+	ldr	x26, [x8, #:lo12:.LANCHOR153]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1718
-.L1712:
+	bcc	.L1751
+.L1745:
 	add	w5, w5, 1
-	b	.L1710
-.L1718:
+	b	.L1743
+.L1751:
 	mov	w19, w0
-	b	.L1714
+	b	.L1747
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
@@ -10219,13 +10365,13 @@ flash_ddr_tuning_read:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LC109
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR42
+	adrp	x22, .LANCHOR43
 	stp	x25, x26, [sp, 64]
 	add	x21, x21, :lo12:.LC109
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
 	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR42
+	add	x22, x22, :lo12:.LANCHOR43
 	str	x2, [x29, 128]
 	mov	w28, 0
 	str	w0, [x29, 136]
@@ -10233,14 +10379,14 @@ flash_ddr_tuning_read:
 	mov	w23, 0
 	str	w0, [x29, 124]
 	mov	w24, 0
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	mov	w27, 1024
-	add	x0, x0, :lo12:.LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR14
 	mov	w25, 6
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1734:
+.L1767:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -10252,7 +10398,7 @@ flash_ddr_tuning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1729
+	tbz	x0, 4, .L1762
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -10260,51 +10406,51 @@ flash_ddr_tuning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1729:
+.L1762:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1730
-	adrp	x0, .LANCHOR150
-	ldr	x0, [x0, #:lo12:.LANCHOR150]
+	bhi	.L1763
+	adrp	x0, .LANCHOR151
+	ldr	x0, [x0, #:lo12:.LANCHOR151]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR152
-	ldr	x26, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR153
+	ldr	x26, [x0, #:lo12:.LANCHOR153]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1739
+	bcs	.L1772
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1739
+	bls	.L1772
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1732:
+.L1765:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1733:
-	cbz	w28, .L1735
-	adrp	x0, .LANCHOR42
+.L1766:
+	cbz	w28, .L1768
+	adrp	x0, .LANCHOR43
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1735
+	bls	.L1768
 	mov	w1, w28
 	adrp	x0, .LC110
 	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1749:
+.L1782:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1728
+	cbz	w19, .L1761
 	ldr	w1, [x29, 136]
 	adrp	x0, .LC111
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC111
 	mov	w27, w19
 	bl	printf
-.L1728:
+.L1761:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10313,29 +10459,29 @@ flash_ddr_tuning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1730:
+.L1763:
 	cmp	w24, w23
-	bls	.L1740
+	bls	.L1773
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1733
+	bhi	.L1766
 	mov	w23, w24
-.L1740:
+.L1773:
 	mov	w24, 0
-	b	.L1731
-.L1739:
+	b	.L1764
+.L1772:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1731:
+.L1764:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1734
-	b	.L1732
-.L1735:
+	bne	.L1767
+	b	.L1765
+.L1768:
 	ldrb	w0, [x29, 124]
-	b	.L1749
+	b	.L1782
 	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -10344,57 +10490,62 @@ flash_ddr_tuning_read:
 flash_read_page_en:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR18
 	stp	x23, x24, [sp, 48]
-	mov	w19, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	mov	x22, x2
 	stp	x25, x26, [sp, 64]
-	mov	x23, x3
+	mov	x22, x2
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
 	str	x27, [sp, 80]
+	mov	x23, x3
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
 	mov	w24, w4
-	ubfx	x21, x19, 24, 2
-	cmp	w0, w20
-	bhi	.L1751
-	adrp	x1, .LANCHOR154
+	ubfx	x26, x19, 24, 2
+	mov	x25, x0
+	cmp	w1, w21
+	bhi	.L1784
+	adrp	x1, .LANCHOR155
 	adrp	x0, .LC0
-	mov	w2, 378
-	add	x1, x1, :lo12:.LANCHOR154
+	mov	w2, 377
+	add	x1, x1, :lo12:.LANCHOR155
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1751:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w20, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L1752
+.L1784:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w20, [x0, w21, sxtw]
+	ldrb	w0, [x25, #:lo12:.LANCHOR18]
+	cmp	w0, w21
+	bcs	.L1785
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 6, .L1785
 	adrp	x0, .LC112
-	mov	w2, w19
+	mov	w3, w19
+	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC112
 	bl	printf
-.L1752:
-	cbnz	w21, .L1753
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L1754
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L1753
-.L1754:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
+.L1785:
+	cbnz	w26, .L1786
+	adrp	x0, .LANCHOR0
+	adrp	x1, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L1787
+	ldrb	w0, [x1, #:lo12:.LANCHOR1]
+	cbz	w0, .L1786
+.L1787:
+	adrp	x0, .LANCHOR2
+	ldrb	w1, [x1, #:lo12:.LANCHOR1]
+	ldrh	w2, [x0, #:lo12:.LANCHOR2]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1755
+	cbz	w1, .L1788
 	add	w19, w0, w19, lsl 1
-.L1753:
+.L1786:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10403,26 +10554,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1750
-	adrp	x25, .LANCHOR44
+	bne	.L1783
+	adrp	x25, .LANCHOR45
 	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR44]
-	cbnz	w27, .L1757
-.L1760:
-	adrp	x0, .LANCHOR155
-	ldr	x5, [x0, #:lo12:.LANCHOR155]
-	cbnz	x5, .L1758
-.L1759:
-	ldrb	w4, [x26, #:lo12:.LANCHOR44]
+	ldrb	w27, [x25, #:lo12:.LANCHOR45]
+	cbnz	w27, .L1790
+.L1793:
+	adrp	x0, .LANCHOR156
+	ldr	x5, [x0, #:lo12:.LANCHOR156]
+	cbnz	x5, .L1791
+.L1792:
+	ldrb	w4, [x26, #:lo12:.LANCHOR45]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
 	adrp	x0, .LC113
 	add	x0, x0, :lo12:.LC113
 	bl	printf
-	adrp	x0, .LANCHOR16
-	ldrb	w0, [x0, #:lo12:.LANCHOR16]
-	cbz	w0, .L1750
+	adrp	x0, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR20]
+	cbz	w0, .L1783
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10435,26 +10586,26 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1755:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
+.L1788:
+	adrp	x1, .LANCHOR3
+	add	x1, x1, :lo12:.LANCHOR3
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1753
-.L1757:
-	strb	wzr, [x25, #:lo12:.LANCHOR44]
+	b	.L1786
+.L1790:
+	strb	wzr, [x25, #:lo12:.LANCHOR45]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR44]
+	strb	w27, [x25, #:lo12:.LANCHOR45]
 	cmn	w0, #1
-	beq	.L1760
-.L1778:
+	beq	.L1793
+.L1811:
 	mov	w21, w0
-.L1750:
+.L1783:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10463,7 +10614,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1758:
+.L1791:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -10471,8 +10622,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1759
-	b	.L1778
+	beq	.L1792
+	b	.L1811
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -10483,11 +10634,11 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR134
+	adrp	x0, .LANCHOR135
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR134]
+	ldrh	w19, [x0, #:lo12:.LANCHOR135]
 	adrp	x0, .LANCHOR34+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
@@ -10502,23 +10653,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1780
+	bne	.L1813
 	mov	w27, 0
 	mov	w28, 2
-.L1781:
+.L1814:
 	cmp	w27, w19
-	ble	.L1784
-.L1780:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1785
+	ble	.L1817
+.L1813:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L1818
 	ldr	w3, [x22]
 	adrp	x0, .LC114
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1785:
+.L1818:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10527,7 +10678,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1784:
+.L1817:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -10537,25 +10688,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1782
+	bne	.L1815
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1781
-.L1782:
+	b	.L1814
+.L1815:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1781
+	b	.L1814
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR102
+	adrp	x4, .LANCHOR99
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR102]
+	ldrh	w4, [x4, #:lo12:.LANCHOR99]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -10572,55 +10723,55 @@ flash_get_last_written_page_ext:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR22
+	adrp	x20, .LANCHOR26
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1792
-	ldr	x4, [x20, #:lo12:.LANCHOR22]
-	adrp	x2, .LANCHOR156
+	tbz	x0, 12, .L1825
+	ldr	x4, [x20, #:lo12:.LANCHOR26]
+	adrp	x2, .LANCHOR157
 	adrp	x0, .LC115
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR156
+	add	x2, x2, :lo12:.LANCHOR157
 	mov	w1, 49
 	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1792:
-	adrp	x21, .LANCHOR157
-	adrp	x23, .LANCHOR28
+.L1825:
+	adrp	x21, .LANCHOR158
+	adrp	x23, .LANCHOR2
 	mov	w24, 21321
-	add	x26, x23, :lo12:.LANCHOR28
+	add	x26, x23, :lo12:.LANCHOR2
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1795:
+.L1828:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR157]
+	ldr	x3, [x21, #:lo12:.LANCHOR158]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
-	add	x27, x21, :lo12:.LANCHOR157
-	add	x25, x20, :lo12:.LANCHOR22
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
+	add	x27, x21, :lo12:.LANCHOR158
+	add	x25, x20, :lo12:.LANCHOR26
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1793
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	beq	.L1826
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1794
-.L1793:
+	beq	.L1827
+.L1826:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1795
-.L1819:
+	bne	.L1828
+.L1852:
 	mov	w0, -1
-.L1791:
+.L1824:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10628,102 +10779,102 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1803:
+.L1836:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1804
+	bne	.L1837
 	ldr	w19, [x0, 4]
-.L1797:
-	add	x24, x21, :lo12:.LANCHOR158
-	ldrh	w0, [x23, #:lo12:.LANCHOR28]
-	ldr	x3, [x22, #:lo12:.LANCHOR157]
+.L1830:
+	add	x24, x21, :lo12:.LANCHOR159
+	ldrh	w0, [x23, #:lo12:.LANCHOR2]
+	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	ldrb	w1, [x24, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1798
-	ldr	x0, [x20, #:lo12:.LANCHOR22]
+	beq	.L1831
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1798
+	bne	.L1831
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1798
+	bcs	.L1831
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR158]
+	strb	w1, [x21, #:lo12:.LANCHOR159]
 	strb	w0, [x24, 1]
-.L1798:
-	ldrb	w1, [x21, #:lo12:.LANCHOR158]
-	add	x24, x21, :lo12:.LANCHOR158
-	ldr	x3, [x22, #:lo12:.LANCHOR157]
+.L1831:
+	ldrb	w1, [x21, #:lo12:.LANCHOR159]
+	add	x24, x21, :lo12:.LANCHOR159
+	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR158]
+	ldrb	w21, [x21, #:lo12:.LANCHOR159]
 	strh	w0, [x24, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR28]
+	ldrh	w0, [x23, #:lo12:.LANCHOR2]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1799:
-	tbz	w19, #31, .L1801
+.L1832:
+	tbz	w19, #31, .L1834
 	cmn	w19, #1
-	bne	.L1802
-	ldr	x0, [x20, #:lo12:.LANCHOR22]
+	bne	.L1835
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w1, [x0]
 	adrp	x0, .LC116
 	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1819
-.L1801:
-	ldr	x3, [x22, #:lo12:.LANCHOR157]
+	b	.L1852
+.L1834:
+	ldr	x3, [x22, #:lo12:.LANCHOR158]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1800
-	ldr	x0, [x20, #:lo12:.LANCHOR22]
+	beq	.L1833
+	ldr	x0, [x20, #:lo12:.LANCHOR26]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1800
-.L1802:
+	bne	.L1833
+.L1835:
 	mov	w0, 0
-	b	.L1791
-.L1800:
+	b	.L1824
+.L1833:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1799
-.L1794:
-	adrp	x21, .LANCHOR158
-	add	x1, x21, :lo12:.LANCHOR158
+	b	.L1832
+.L1827:
+	adrp	x21, .LANCHOR159
+	add	x1, x21, :lo12:.LANCHOR159
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR158]
+	strb	w0, [x21, #:lo12:.LANCHOR159]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1803
-.L1804:
+	bne	.L1836
+.L1837:
 	mov	w19, 0
-	b	.L1797
+	b	.L1830
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10733,44 +10884,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR41
+	adrp	x20, .LANCHOR42
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR41]
-	adrp	x19, .LANCHOR16
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
+	adrp	x19, .LANCHOR20
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR16]
-	adrp	x24, .LANCHOR160
+	strb	w21, [x19, #:lo12:.LANCHOR20]
+	adrp	x24, .LANCHOR161
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR159
-	ldrb	w0, [x20, #:lo12:.LANCHOR41]
+	adrp	x25, .LANCHOR160
+	ldrb	w0, [x20, #:lo12:.LANCHOR42]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR159]
+	ldr	x3, [x25, #:lo12:.LANCHOR160]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR160]
+	ldr	x2, [x24, #:lo12:.LANCHOR161]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tuning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR159]
+	ldr	x3, [x25, #:lo12:.LANCHOR160]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR160]
+	ldr	x2, [x24, #:lo12:.LANCHOR161]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1821
-	ldrb	w1, [x20, #:lo12:.LANCHOR41]
-	tbz	x1, 0, .L1821
+	bne	.L1854
+	ldrb	w1, [x20, #:lo12:.LANCHOR42]
+	tbz	x1, 0, .L1854
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR16]
-.L1822:
+	strb	wzr, [x19, #:lo12:.LANCHOR20]
+.L1855:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10778,11 +10929,119 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1821:
+.L1854:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR16]
-	b	.L1822
+	strb	w1, [x0, #:lo12:.LANCHOR20]
+	b	.L1855
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_plane_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_plane_page_read
+	.type	flash_complete_plane_page_read, %function
+flash_complete_plane_page_read:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 2097151
+	ubfx	x20, x0, 24, 2
+	str	x23, [sp, 48]
+	ubfx	x23, x0, 21, 3
+	adrp	x0, .LANCHOR18
+	stp	x21, x22, [sp, 32]
+	mov	x21, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	mov	x22, x2
+	cmp	w0, w23
+	bhi	.L1861
+	adrp	x1, .LANCHOR162
+	adrp	x0, .LC0
+	mov	w2, 782
+	add	x1, x1, :lo12:.LANCHOR162
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1861:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w6, [x0, w23, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w6
+	bl	nandc_cs
+	cbnz	w20, .L1862
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+.L1862:
+	adrp	x0, .LANCHOR19+16
+	and	x1, x6, 255
+	and	w3, w19, 255
+	lsr	w2, w19, 8
+	ldrb	w0, [x0, #:lo12:.LANCHOR19+16]
+	adrp	x5, .LANCHOR16
+	cmp	w0, 1
+	lsr	w0, w19, 16
+	bne	.L1863
+	add	x1, x4, x1, lsl 8
+	mov	w4, 6
+.L1874:
+	str	w4, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w3, [x1, 2052]
+	str	w2, [x1, 2052]
+	str	w0, [x1, 2052]
+.L1872:
+	mov	w0, 224
+	str	w0, [x1, 2056]
+	ldr	x0, [x5, #:lo12:.LANCHOR16]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1866
+	cbz	w20, .L1866
+	add	w19, w19, w19, lsl 1
+	sub	w20, w20, #1
+	add	w0, w19, w20
+.L1873:
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR34+9
+	mov	x4, x22
+	mov	x3, x21
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR34+9]
+	mov	w0, w6
+	bl	nandc_xfer
+	mov	w2, w0
+	bl	nandc_de_cs.constprop.29
+	ldr	x23, [sp, 48]
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1863:
+	ldr	x7, [x5, #:lo12:.LANCHOR16]
+	add	x1, x4, x1, lsl 8
+	ldrb	w7, [x7, 12]
+	cmp	w7, 3
+	bne	.L1865
+	mov	w4, 5
+	b	.L1874
+.L1865:
+	str	wzr, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	str	w3, [x1, 2052]
+	str	w2, [x1, 2052]
+	str	w0, [x1, 2052]
+	mov	w0, 5
+	str	w0, [x1, 2056]
+	str	wzr, [x1, 2052]
+	str	wzr, [x1, 2052]
+	b	.L1872
+.L1866:
+	mov	w0, w19
+	b	.L1873
+	.size	flash_complete_plane_page_read, .-flash_complete_plane_page_read
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
 	.global	flash_complete_page_read
@@ -10794,48 +11053,36 @@ flash_complete_page_read:
 	and	w19, w0, 2097151
 	stp	x23, x24, [sp, 48]
 	mov	w23, w0
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	ubfx	x20, x23, 21, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x24, x1
 	stp	x27, x28, [sp, 80]
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1828
-	adrp	x1, .LANCHOR161
+	bhi	.L1876
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR161
+	mov	w2, 904
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1828:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L1876:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w22, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x4, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1829
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L1830
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L1829
-.L1830:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L1831
-	add	w19, w0, w19, lsl 1
-.L1829:
+	cbnz	w21, .L1877
+	mov	w0, w19
+	bl	slc_phy_page_address_calc
+	mov	w19, w0
+.L1877:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -10850,16 +11097,16 @@ flash_complete_page_read:
 	str	w1, [x0, 2052]
 	mov	w1, 224
 	str	w1, [x0, 2056]
-	adrp	x0, .LANCHOR11
-	ldr	x0, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR16
+	ldr	x0, [x0, #:lo12:.LANCHOR16]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1832
-	cbz	w21, .L1832
+	bne	.L1878
+	cbz	w21, .L1878
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1865:
+.L1905:
 	adrp	x20, .LANCHOR34
 	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
@@ -10870,28 +11117,28 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1834
-	adrp	x26, .LANCHOR44
-	ldrb	w27, [x26, #:lo12:.LANCHOR44]
-	cbz	w27, .L1835
+	bne	.L1880
+	adrp	x26, .LANCHOR45
+	ldrb	w27, [x26, #:lo12:.LANCHOR45]
+	cbz	w27, .L1881
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR44]
+	strb	wzr, [x26, #:lo12:.LANCHOR45]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR44]
-	cbnz	w21, .L1836
-.L1841:
-	adrp	x1, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR13]
-	cbz	w1, .L1836
-	adrp	x1, .LANCHOR42
-	ldrb	w1, [x1, #:lo12:.LANCHOR42]
+	strb	w27, [x26, #:lo12:.LANCHOR45]
+	cbnz	w21, .L1882
+.L1887:
+	adrp	x1, .LANCHOR0
+	ldrb	w1, [x1, #:lo12:.LANCHOR0]
+	cbz	w1, .L1882
+	adrp	x1, .LANCHOR43
+	ldrb	w1, [x1, #:lo12:.LANCHOR43]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1836
+	blt	.L1882
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -10899,7 +11146,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1827:
+.L1875:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10907,37 +11154,31 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1831:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-	b	.L1829
-.L1832:
+.L1878:
 	mov	w0, w19
-	b	.L1865
-.L1836:
+	b	.L1905
+.L1882:
 	cmn	w0, #1
-	bne	.L1827
-.L1842:
-	adrp	x0, .LANCHOR155
-	ldr	x5, [x0, #:lo12:.LANCHOR155]
-	cbnz	x5, .L1838
-.L1840:
-	adrp	x0, .LANCHOR44
+	bne	.L1875
+.L1888:
+	adrp	x0, .LANCHOR156
+	ldr	x5, [x0, #:lo12:.LANCHOR156]
+	cbnz	x5, .L1884
+.L1886:
+	adrp	x0, .LANCHOR45
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR44]
+	ldrb	w4, [x0, #:lo12:.LANCHOR45]
 	adrp	x0, .LC117
 	add	x0, x0, :lo12:.LC117
 	bl	printf
-	adrp	x0, .LANCHOR16
-	ldrb	w0, [x0, #:lo12:.LANCHOR16]
-	cbnz	w0, .L1839
+	adrp	x0, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR20]
+	cbnz	w0, .L1885
 	mov	w0, -1
-	b	.L1827
-.L1838:
+	b	.L1875
+.L1884:
 	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
@@ -10946,9 +11187,9 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1840
-	b	.L1827
-.L1839:
+	beq	.L1886
+	b	.L1875
+.L1885:
 	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -10962,202 +11203,378 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tuning_read
-.L1835:
-	cbz	w21, .L1841
-	b	.L1842
-.L1834:
-	cbnz	w21, .L1827
-	b	.L1841
+.L1880:
+	cbz	w21, .L1887
+	b	.L1875
+.L1881:
+	cbnz	w21, .L1888
+	b	.L1887
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR126
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR53
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR126]
+	ldrb	w0, [x0, #:lo12:.LANCHOR53]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1867
-.L1885:
-	mov	w21, 0
-	b	.L1866
-.L1867:
-	adrp	x19, .LANCHOR48
-	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR48
-	add	x1, x1, x22, lsl 6
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	bne	.L1907
+.L1936:
+	mov	w22, 0
+	b	.L1906
+.L1907:
+	adrp	x19, .LANCHOR49
+	sxtw	x20, w0
+	add	x1, x19, :lo12:.LANCHOR49
+	add	x1, x1, x20, lsl 6
 	ldrb	w2, [x1, 58]
-	ldr	w21, [x1, 40]
+	ldr	w22, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1885
-	adrp	x1, .L1870
-	add	x1, x1, :lo12:.L1870
-	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1870
-	add	x1, x3, w1, sxtb #2
+	bhi	.L1936
+	adrp	x1, .L1910
+	add	x1, x1, :lo12:.L1910
+	ldrh	w1, [x1,w3,uxtw #1]
+	adr	x3, .Lrtx1910
+	add	x1, x3, w1, sxth #2
 	br	x1
-.Lrtx1870:
+.Lrtx1910:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1870:
-	.byte	(.L1869 - .Lrtx1870) / 4
-	.byte	(.L1869 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1872 - .Lrtx1870) / 4
-	.byte	(.L1873 - .Lrtx1870) / 4
-	.byte	(.L1874 - .Lrtx1870) / 4
-	.byte	(.L1871 - .Lrtx1870) / 4
-	.byte	(.L1874 - .Lrtx1870) / 4
+.L1910:
+	.2byte	(.L1909 - .Lrtx1910) / 4
+	.2byte	(.L1911 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1913 - .Lrtx1910) / 4
+	.2byte	(.L1914 - .Lrtx1910) / 4
+	.2byte	(.L1915 - .Lrtx1910) / 4
+	.2byte	(.L1912 - .Lrtx1910) / 4
+	.2byte	(.L1915 - .Lrtx1910) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1869:
+.L1909:
 	mov	w1, 64
-	mov	w0, w21
+	mov	w0, w22
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x19, x19, x22, lsl 6
-	ldp	x1, x0, [x19, 8]
-	ldr	x2, [x19, 24]
-	cmp	x0, 0
-	csel	x1, x0, x1, ne
-	mov	w0, w21
+	tbz	x0, 6, .L1936
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x20, lsl 6
+	ldp	x1, x2, [x0, 8]
+	cbz	x2, .L1917
+	ldrb	w3, [x0, 56]
+	adrp	x0, .LANCHOR121
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w3, w0
+	csel	x1, x1, x2, ne
+.L1917:
+	add	x19, x19, :lo12:.LANCHOR49
+	mov	w0, w22
+	add	x20, x19, x20, lsl 6
+	ldr	x2, [x20, 24]
 	bl	flash_complete_page_read
-	str	w0, [x19, 52]
+	str	w0, [x20, 52]
 	mov	w0, 12
-	strb	w0, [x19, 58]
-	ldrb	w0, [x19, 2]
+	strb	w0, [x20, 58]
+	ldrb	w0, [x20, 2]
 	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-	b	.L1885
-.L1871:
-	mov	w0, w21
+	strb	w0, [x20, 2]
+	b	.L1936
+.L1911:
 	mov	w1, 64
+	mov	w0, w22
 	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 6, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	mov	w0, 5
-	add	x19, x19, x22, lsl 6
-	tst	w21, w0
-	beq	.L1884
-	ldrb	w1, [x19, 1]
-	mov	w0, 11
-	ldr	w3, [x19, 40]
-	mov	w4, 11
-	ldr	w2, [x19, 52]
-	strb	w0, [x19, 58]
+	tbz	x0, 6, .L1936
+	add	x0, x19, :lo12:.LANCHOR49
+	lsl	x2, x20, 6
+	add	x1, x0, x2
+	ldrb	w21, [x0, x2]
+	add	x0, x0, x21, lsl 6
+	ldr	x24, [x0, 8]
+	ldp	x26, x0, [x1, 8]
+	cbz	x0, .L1918
+	ldrb	w2, [x1, 56]
+	adrp	x1, .LANCHOR121
+	ldrb	w1, [x1, #:lo12:.LANCHOR121]
+	cmp	w2, w1
+	csel	x26, x26, x0, ne
+.L1918:
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x21, lsl 6
+	ldr	x1, [x0, 16]
+	cbz	x1, .L1919
+	ldrb	w2, [x0, 56]
+	adrp	x0, .LANCHOR121
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w2, w0
+	csel	x24, x24, x1, ne
+.L1919:
+	add	x22, x19, :lo12:.LANCHOR49
+	mov	x1, x26
+	add	x27, x22, x20, lsl 6
+	add	x22, x22, x21, lsl 6
+	ldr	x2, [x27, 24]
+	ldr	w0, [x27, 40]
+	bl	flash_complete_plane_page_read
+	mov	w23, w0
+	ldr	x2, [x22, 24]
+	mov	x1, x24
+	ldr	w0, [x22, 40]
+	bl	flash_complete_plane_page_read
+	mov	w25, w0
+	cmn	w23, #1
+	beq	.L1920
+	ldr	w0, [x27, 36]
+	cmn	w0, #1
+	beq	.L1921
+	ldr	x1, [x27, 24]
+	ldr	w1, [x1, 4]
+	cmp	w0, w1
+	beq	.L1921
+.L1920:
+	add	x22, x19, :lo12:.LANCHOR49
+	adrp	x2, .LANCHOR121
+	add	x22, x22, x20, lsl 6
+	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	mov	x2, x26
+	ldr	x3, [x22, 24]
+	ldr	w1, [x22, 40]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	mov	w23, w0
+	ldr	w2, [x22, 36]
+	cmn	w2, #1
+	beq	.L1922
+	ldr	x0, [x22, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L1922
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L1922
+	ldr	w3, [x0]
+	adrp	x0, .LC118
+	ldr	w1, [x22, 40]
+	add	x0, x0, :lo12:.LC118
+	bl	printf
+.L1922:
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x20, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L1921
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L1921
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC0
+	mov	w2, 338
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1921:
+	add	x0, x19, :lo12:.LANCHOR49
+	mov	w1, 12
+	add	x20, x0, x20, lsl 6
+	cmn	w25, #1
+	strb	w1, [x20, 58]
+	ldrb	w1, [x20, 2]
+	str	w23, [x20, 52]
+	orr	w1, w1, 8
+	strb	w1, [x20, 2]
+	beq	.L1923
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L1925
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L1925
+.L1923:
+	add	x20, x19, :lo12:.LANCHOR49
+	adrp	x2, .LANCHOR121
+	add	x20, x20, x21, lsl 6
+	ldrb	w4, [x2, #:lo12:.LANCHOR121]
+	mov	x2, x24
+	ldr	x3, [x20, 24]
+	ldr	w1, [x20, 40]
+	ubfx	x0, x1, 21, 3
+	and	w1, w1, -14680065
+	bl	flash_read_page_en
+	ldr	w2, [x20, 36]
+	cmn	w2, #1
+	beq	.L1927
+	ldr	x0, [x20, 24]
+	ldr	w4, [x0, 4]
+	cmp	w2, w4
+	beq	.L1927
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 6, .L1927
+	ldr	w3, [x0]
 	adrp	x0, .LC118
+	ldr	w1, [x20, 40]
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1903:
+.L1927:
+	add	x0, x19, :lo12:.LANCHOR49
+	add	x0, x0, x21, lsl 6
+	ldr	w1, [x0, 36]
+	cmn	w1, #1
+	beq	.L1925
+	ldr	x0, [x0, 24]
+	ldr	w0, [x0, 4]
+	cmp	w1, w0
+	beq	.L1925
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LC0
+	mov	w2, 353
+	add	x1, x1, :lo12:.LANCHOR164
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1925:
+	add	x19, x19, :lo12:.LANCHOR49
+	mov	w0, 12
+	add	x21, x19, x21, lsl 6
+	strb	w0, [x21, 58]
+	ldrb	w0, [x21, 2]
+	str	w23, [x21, 52]
+	orr	w0, w0, 8
+	strb	w0, [x21, 2]
+	b	.L1936
+.L1912:
+	mov	w0, w22
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w22, w0
+	tbz	x22, 6, .L1936
+	add	x19, x19, :lo12:.LANCHOR49
+	mov	w0, 5
+	add	x20, x19, x20, lsl 6
+	tst	w22, w0
+	beq	.L1935
+	ldrb	w1, [x20, 1]
+	mov	w0, 11
+	ldr	w3, [x20, 40]
+	mov	w4, 11
+	ldr	w2, [x20, 52]
+	strb	w0, [x20, 58]
+	adrp	x0, .LC119
+	add	x0, x0, :lo12:.LC119
+	bl	printf
+.L1996:
 	mov	w0, -1
-	str	w0, [x19, 52]
-	b	.L1866
-.L1874:
+	str	w0, [x20, 52]
+	b	.L1906
+.L1915:
 	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR48
+	add	x21, x19, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 9
-	add	x0, x20, x0
+	add	x0, x21, x0
 	csel	w2, w2, w1, eq
-	ubfx	x3, x21, 21, 3
-.L1879:
+	ubfx	x3, x22, 21, 3
+.L1930:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1883
-	mov	w21, -1
-	b	.L1866
-.L1883:
+	bne	.L1934
+	mov	w22, -1
+	b	.L1906
+.L1934:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
-	add	x1, x20, x23, lsl 6
-	add	x0, x20, x0
+	add	x1, x21, x23, lsl 6
+	add	x0, x21, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1879
+	bne	.L1930
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1879
-	mov	w0, w21
+	bne	.L1930
+	mov	w0, w22
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
-	and	w21, w0, 64
-	tbz	x24, 6, .L1881
-	add	x20, x20, x22, lsl 6
-	ands	w21, w0, 15
-	beq	.L1882
-	ldrb	w1, [x20, 1]
+	and	w22, w0, 64
+	tbz	x24, 6, .L1932
+	add	x21, x21, x20, lsl 6
+	ands	w22, w0, 15
+	beq	.L1933
+	ldrb	w1, [x21, 1]
 	mov	w4, 11
-	ldr	w3, [x20, 40]
-	adrp	x0, .LC118
-	ldr	w2, [x20, 52]
-	add	x0, x0, :lo12:.LC118
-	mov	w21, w24
+	ldr	w3, [x21, 40]
+	adrp	x0, .LC119
+	ldr	w2, [x21, 52]
+	add	x0, x0, :lo12:.LC119
+	mov	w22, w24
 	bl	printf
 	mov	w0, 11
-	strb	w0, [x20, 58]
+	strb	w0, [x21, 58]
 	mov	w0, -1
-	str	w0, [x20, 52]
-.L1881:
-	add	x1, x19, :lo12:.LANCHOR48
-	add	x22, x1, x22, lsl 6
+	str	w0, [x21, 52]
+.L1932:
+	add	x1, x19, :lo12:.LANCHOR49
+	add	x20, x1, x20, lsl 6
 	add	x1, x1, x23, lsl 6
-	ldrb	w0, [x22, 58]
+	ldrb	w0, [x20, 58]
 	strb	w0, [x1, 58]
-	ldr	w0, [x22, 52]
+	ldr	w0, [x20, 52]
 	str	w0, [x1, 52]
-.L1866:
-	mov	w0, w21
+.L1906:
+	mov	w0, w22
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1882:
+.L1933:
 	mov	w0, 12
-	str	wzr, [x20, 52]
-	strb	w0, [x20, 58]
-	b	.L1881
-.L1872:
-	mov	w0, w21
+	str	wzr, [x21, 52]
+	strb	w0, [x21, 58]
+	b	.L1932
+.L1913:
+	mov	w0, w22
 	mov	w1, 32
 	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 5, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	tst	x21, 15
-	add	x19, x19, x22, lsl 6
-	beq	.L1884
+	mov	w22, w0
+	tbz	x22, 5, .L1936
+	add	x19, x19, :lo12:.LANCHOR49
+	tst	x22, 15
+	add	x20, x19, x20, lsl 6
+	beq	.L1935
 	mov	w0, 11
-	strb	w0, [x19, 58]
-	b	.L1903
-.L1884:
+	strb	w0, [x20, 58]
+	b	.L1996
+.L1935:
 	mov	w0, 12
-	str	wzr, [x19, 52]
-	strb	w0, [x19, 58]
-	b	.L1885
-.L1873:
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L1936
+.L1914:
 	mov	w1, 64
-	mov	w0, w21
+	mov	w0, w22
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1885
-	add	x19, x19, :lo12:.LANCHOR48
-	add	x19, x19, x22, lsl 6
+	tbz	x0, 6, .L1936
+	add	x19, x19, :lo12:.LANCHOR49
+	add	x19, x19, x20, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1885
+	b	.L1936
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -11167,19 +11584,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR126
-	add	x19, x19, :lo12:.LANCHOR126
-.L1905:
+	adrp	x19, .LANCHOR53
+	add	x19, x19, :lo12:.LANCHOR53
+.L1998:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1906
+	bne	.L1999
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1906:
+.L1999:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1905
+	b	.L1998
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -11237,74 +11654,127 @@ ftl_read_ppa_page:
 	.global	sblk_read_page
 	.type	sblk_read_page, %function
 sblk_read_page:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	and	w21, w1, 255
+	and	w22, w1, 255
 	stp	x19, x20, [sp, 16]
-	mov	w22, w21
+	adrp	x21, .LANCHOR49
 	stp	x23, x24, [sp, 48]
-	mov	x20, x0
-	adrp	x23, .LANCHOR126
-	adrp	x24, .LANCHOR48
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR126
-	add	x24, x24, :lo12:.LANCHOR48
 	stp	x25, x26, [sp, 64]
-.L1913:
-	cbnz	w22, .L1917
-.L1925:
-	adrp	x19, .LANCHOR48
-	add	x19, x19, :lo12:.LANCHOR48
-.L1918:
-	cbnz	w21, .L1921
-	mov	w0, 0
+	mov	x23, x0
+	adrp	x26, .LANCHOR165
+	mov	w20, w22
+	add	x26, x26, :lo12:.LANCHOR165
+	add	x21, x21, :lo12:.LANCHOR49
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR105
+.L2006:
+	cbnz	w20, .L2016
+.L2029:
+	adrp	x19, .LANCHOR49
+	add	x19, x19, :lo12:.LANCHOR49
+.L2017:
+	cbnz	w22, .L2019
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1917:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1914:
+.L2016:
+	ldrb	w24, [x19]
+	ldr	w25, [x19, 40]
+.L2007:
 	mov	w1, 0
-	mov	w0, w26
+	mov	w0, w25
 	bl	queue_lun_state
-	cbnz	w0, .L1915
-	ldr	w1, [x19, 40]
-	mov	w0, 48
-	bl	flash_start_page_read
+	cbnz	w0, .L2008
+	cmp	w20, 1
+	beq	.L2013
+	ldrb	w0, [x26]
+	cbnz	w0, .L2010
+.L2013:
+	mov	x0, x19
+	bl	queue_read_cmd
+	b	.L2011
+.L2008:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L2007
+.L2010:
+	ldrb	w0, [x19]
+	ubfx	x4, x25, 21, 3
+	cmp	w0, 255
+	bne	.L2012
+	str	w4, [x29, 124]
+	mov	w2, 624
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldr	w4, [x29, 124]
+.L2012:
+	ldrb	w28, [x19]
+	sbfiz	x2, x28, 6, 32
+	add	x3, x21, x2
+	ldr	w1, [x3, 40]
+	ubfx	x0, x1, 21, 3
+	cmp	w4, w0
+	bne	.L2013
+	ldrh	w0, [x27, #:lo12:.LANCHOR105]
+	add	w25, w0, w25
+	cmp	w1, w25
+	bne	.L2013
+	ldr	w0, [x19, 40]
+	adrp	x25, .LANCHOR53
+	ldrb	w24, [x21, x2]
+	add	x25, x25, :lo12:.LANCHOR53
+	stp	x3, x2, [x29, 104]
+	sub	w20, w20, #1
+	bl	flash_start_plane_read
 	strb	wzr, [x19, 59]
-	mov	w0, 1
-	strb	w0, [x19, 58]
-	mov	w0, -1
-	strb	w0, [x19]
+	mov	w5, 2
+	mov	w4, -1
+	strb	w5, [x19, 58]
 	mov	x1, x19
-	mov	x0, x23
+	strb	w4, [x19]
+	mov	x0, x25
+	stp	w5, w4, [x29, 120]
 	bl	buf_add_tail
-	subs	w22, w22, #1
-	beq	.L1925
-	ubfiz	x19, x25, 6, 8
-	add	x19, x24, x19
-	b	.L1913
-.L1915:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1914
-.L1921:
-	ldrb	w0, [x20, 58]
+	ldp	x3, x2, [x29, 104]
+	strb	wzr, [x3, 59]
+	ldp	w5, w4, [x29, 120]
+	strb	w5, [x3, 58]
+	ubfiz	x1, x28, 6, 8
+	mov	x0, x25
+	add	x1, x21, x1
+	strb	w4, [x21, x2]
+	bl	buf_add_tail
+.L2011:
+	subs	w20, w20, #1
+	beq	.L2029
+	ubfiz	x19, x24, 6, 8
+	add	x19, x21, x19
+	b	.L2006
+.L2019:
+	ldrb	w0, [x23, 58]
 	cmp	w0, 12
-	bne	.L1919
-	ldrb	w20, [x20]
-	sub	w21, w21, #1
-	add	x20, x19, x20, lsl 6
-	b	.L1918
-.L1919:
+	bne	.L2018
+	ldrb	w0, [x23]
+	sub	w22, w22, #1
+	cmp	w0, 255
+	beq	.L2018
+	ubfiz	x23, x0, 6, 8
+	add	x23, x19, x23
+.L2018:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1918
+	b	.L2017
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -11312,108 +11782,108 @@ sblk_read_page:
 	.type	gc_check_data_one_wl, %function
 gc_check_data_one_wl:
 	sub	sp, sp, #112
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR10
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR65
-	add	x20, x19, :lo12:.LANCHOR65
+	adrp	x19, .LANCHOR62
+	add	x20, x19, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 48]
-	ldr	x21, [x0, #:lo12:.LANCHOR6]
+	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x23, x24, [sp, 64]
 	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1928
+	cbnz	x0, .L2032
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x20, 8]
-.L1928:
-	add	x0, x19, :lo12:.LANCHOR65
+.L2032:
+	add	x0, x19, :lo12:.LANCHOR62
 	ldr	x20, [x0, 8]
-	cbnz	x20, .L1929
-	adrp	x1, .LANCHOR162
+	cbnz	x20, .L2033
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 366
-	add	x1, x1, :lo12:.LANCHOR162
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1929:
-	adrp	x26, .LANCHOR108
-	adrp	x27, .LANCHOR71
+.L2033:
+	adrp	x26, .LANCHOR105
+	adrp	x27, .LANCHOR68
 	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR108
-	add	x27, x27, :lo12:.LANCHOR71
+	add	x26, x26, :lo12:.LANCHOR105
+	add	x27, x27, :lo12:.LANCHOR68
 	mov	w24, 0
-.L1930:
+.L2034:
 	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1939
+	bge	.L2043
 	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR65
-	b	.L1940
-.L1938:
+	add	x22, x19, :lo12:.LANCHOR62
+	b	.L2044
+.L2042:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1931
+	bne	.L2035
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1951:
+.L2055:
 	str	w0, [x20, 40]
 	mov	w1, 1
 	mov	x0, x20
 	bl	sblk_read_page
 	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR146
+	adrp	x1, .LANCHOR147
 	cmn	w2, #1
-	beq	.L1934
+	beq	.L2038
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR146]
+	ldr	x4, [x1, #:lo12:.LANCHOR147]
 	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1934
-	adrp	x4, .LANCHOR147
-	ldr	x4, [x4, #:lo12:.LANCHOR147]
+	bne	.L2038
+	adrp	x4, .LANCHOR148
+	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1935
-.L1934:
+	beq	.L2039
+.L2038:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR146]
+	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1935
-	adrp	x1, .LANCHOR9
-	ldr	w1, [x1, #:lo12:.LANCHOR9]
-	tbz	x1, 10, .L1936
+	beq	.L2039
+	adrp	x1, .LANCHOR14
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 10, .L2040
 	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR147
-	ldr	x4, [x4, #:lo12:.LANCHOR147]
+	adrp	x4, .LANCHOR148
+	ldr	x4, [x4, #:lo12:.LANCHOR148]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC119
+	adrp	x0, .LC120
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC120
 	ldr	w7, [x1, 8]
 	ldr	w1, [x20, 40]
 	bl	printf
-.L1936:
-	adrp	x0, .LANCHOR5
+.L2040:
+	adrp	x0, .LANCHOR9
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1927:
+.L2031:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -11422,37 +11892,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1931:
+.L2035:
 	cmp	w2, 2
-	bne	.L1933
+	bne	.L2037
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1951
-.L1933:
+	b	.L2055
+.L2037:
 	add	w0, w0, w1
-	b	.L1951
-.L1935:
+	b	.L2055
+.L2039:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1940:
+.L2044:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1938
+	ble	.L2042
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1930
-.L1939:
-.L1937:
-	add	x19, x19, :lo12:.LANCHOR65
+	b	.L2034
+.L2043:
+.L2041:
+	add	x19, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1927
+	b	.L2031
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -11464,12 +11934,12 @@ flash_prog_page:
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x0, .LANCHOR23
-	adrp	x22, .LANCHOR9
+	adrp	x0, .LANCHOR13
+	adrp	x22, .LANCHOR14
 	stp	x25, x26, [sp, 64]
-	ldr	x25, [x0, #:lo12:.LANCHOR23]
+	ldr	x25, [x0, #:lo12:.LANCHOR13]
 	mov	w21, w1
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	and	x19, x20, 255
 	stp	x23, x24, [sp, 48]
 	add	x23, x19, 8
@@ -11479,22 +11949,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L1953
-	adrp	x0, .LC120
+	tbz	x0, 4, .L2057
+	adrp	x0, .LC121
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L1953:
+.L2057:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L1954
+	cbnz	w28, .L2058
 	bl	zftl_flash_enter_slc_mode
-.L1955:
+.L2059:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -11521,18 +11991,17 @@ flash_prog_page:
 	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
-	mov	w0, w20
-	bl	nandc_de_cs
+	bl	nandc_de_cs.constprop.29
 	and	w19, w2, 4
-	tbz	x2, 2, .L1952
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L1952
-	adrp	x0, .LC121
+	tbz	x2, 2, .L2056
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2056
+	adrp	x0, .LC122
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC121
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L1952:
+.L2056:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11541,9 +12010,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1954:
+.L2058:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1955
+	b	.L2059
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -11557,77 +12026,77 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1968
-	adrp	x0, .LANCHOR163
-	ldrb	w0, [x0, #:lo12:.LANCHOR163]
+	bne	.L2072
+	adrp	x0, .LANCHOR168
+	ldrb	w0, [x0, #:lo12:.LANCHOR168]
 	cmp	w0, w19
-	bhi	.L1972
-.L1968:
-	adrp	x22, .LANCHOR159
-	adrp	x23, .LANCHOR160
+	bhi	.L2076
+.L2072:
+	adrp	x22, .LANCHOR160
+	adrp	x23, .LANCHOR161
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR159]
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR160]
+	ldr	x0, [x23, #:lo12:.LANCHOR161]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
-	adrp	x0, .LANCHOR28
-	ldrh	w20, [x0, #:lo12:.LANCHOR28]
+	adrp	x0, .LANCHOR2
+	ldrh	w20, [x0, #:lo12:.LANCHOR2]
 	mov	w0, w21
 	mul	w20, w20, w19
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1970
+	beq	.L2074
 	adrp	x19, .LANCHOR34
 	add	x19, x19, :lo12:.LANCHOR34
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
+	ldr	x3, [x22, #:lo12:.LANCHOR160]
 	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR160]
+	ldr	x2, [x23, #:lo12:.LANCHOR161]
 	mov	w0, w21
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L1970
+	beq	.L2074
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR159]
+	ldr	x3, [x22, #:lo12:.LANCHOR160]
 	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR160]
+	ldr	x2, [x23, #:lo12:.LANCHOR161]
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1970
-	ldr	x0, [x23, #:lo12:.LANCHOR160]
+	beq	.L2074
+	ldr	x0, [x23, #:lo12:.LANCHOR161]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L1970
-	ldr	x0, [x22, #:lo12:.LANCHOR159]
+	bne	.L2074
+	ldr	x0, [x22, #:lo12:.LANCHOR160]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L1971
-.L1970:
+	beq	.L2075
+.L2074:
 	mov	w19, -1
-.L1971:
+.L2075:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L1967:
+.L2071:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1972:
+.L2076:
 	mov	w0, 0
-	b	.L1967
+	b	.L2071
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11638,50 +12107,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR164
+	adrp	x0, .LANCHOR169
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR164]
+	ldrb	w0, [x0, #:lo12:.LANCHOR169]
 	str	x25, [sp, 64]
-	cbnz	w0, .L1983
+	cbnz	w0, .L2087
 	adrp	x20, .LANCHOR34
 	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1983
+	bhi	.L2087
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1983
-	adrp	x21, .LANCHOR132
+	tbz	x0, 0, .L2087
+	adrp	x21, .LANCHOR133
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR132
+	add	x21, x21, :lo12:.LANCHOR133
 	mov	w25, 65535
-	adrp	x24, .LANCHOR150
-.L1985:
+	adrp	x24, .LANCHOR151
+.L2089:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L1986
-.L1983:
+	bhi	.L2090
+.L2087:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1986:
+.L2090:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L1983
-	ldr	x0, [x24, #:lo12:.LANCHOR150]
+	bne	.L2087
+	ldr	x0, [x24, #:lo12:.LANCHOR151]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR150]
+	ldr	x3, [x24, #:lo12:.LANCHOR151]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -11689,7 +12158,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L1985
+	b	.L2089
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -11706,16 +12175,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1989
+	bls	.L2093
 	cmp	w1, 575
-	bhi	.L1990
-	adrp	x0, .LANCHOR165
+	bhi	.L2094
+	adrp	x0, .LANCHOR170
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR165]
+	str	w2, [x0, #:lo12:.LANCHOR170]
 	adrp	x0, idb_buf
-	bhi	.L1991
+	bhi	.L2095
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -11723,9 +12192,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L2067:
+.L2171:
 	bl	ftl_memcpy
-.L2046:
+.L2150:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11734,7 +12203,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L1991:
+.L2095:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -11744,14 +12213,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L2067
-.L1989:
+	b	.L2171
+.L2093:
 	cmp	w1, 575
-	bls	.L2046
-.L1990:
-	adrp	x0, .LANCHOR165
-	ldr	w0, [x0, #:lo12:.LANCHOR165]
-	cbz	w0, .L2046
+	bls	.L2150
+.L2094:
+	adrp	x0, .LANCHOR170
+	ldr	w0, [x0, #:lo12:.LANCHOR170]
+	cbz	w0, .L2150
 	adrp	x3, .LANCHOR34
 	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
@@ -11773,9 +12242,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L1996:
+.L2100:
 	ldr	w5, [x1]
-	cbnz	w5, .L1994
+	cbnz	w5, .L2098
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -11783,40 +12252,40 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1996
-.L1994:
+	bne	.L2100
+.L2098:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L2030:
+.L2134:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
 	mov	w2, 512
 	mov	x0, x20
 	bl	ftl_memset
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR26
 	ldr	w1, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR22]
+	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L1997
+	beq	.L2101
 	ldr	w1, [x29, 132]
-	adrp	x19, .LANCHOR44
+	adrp	x19, .LANCHOR45
 	mul	w26, w0, w1
 	ldr	x0, [x29, 176]
 	add	x25, x0, :lo12:.LANCHOR34
-	ldrb	w0, [x19, #:lo12:.LANCHOR44]
+	ldrb	w0, [x19, #:lo12:.LANCHOR45]
 	str	w0, [x29, 128]
-	strb	wzr, [x19, #:lo12:.LANCHOR44]
+	strb	wzr, [x19, #:lo12:.LANCHOR45]
 	mov	w0, 0
 	ldrb	w21, [x25, 9]
 	ldrh	w23, [x25, 10]
@@ -11828,11 +12297,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L2036
-	adrp	x0, .LANCHOR24
-	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	bne	.L2140
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
 	cmp	w0, 9
-	bne	.L2036
+	bne	.L2140
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -11868,22 +12337,22 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L1998:
+.L2102:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR164
+	adrp	x28, .LANCHOR169
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR164
-	adrp	x25, .LANCHOR29
+	add	x0, x28, :lo12:.LANCHOR169
+	adrp	x25, .LANCHOR3
 	str	x0, [x29, 152]
 	mov	w20, 0
-	add	x0, x25, :lo12:.LANCHOR29
+	add	x0, x25, :lo12:.LANCHOR3
 	str	x0, [x29, 144]
-.L2000:
+.L2104:
 	cmp	w27, w20
-	bhi	.L2011
+	bhi	.L2115
 	ldr	x0, [x29, 176]
-	add	x25, x19, :lo12:.LANCHOR44
-	strb	wzr, [x19, #:lo12:.LANCHOR44]
+	add	x25, x19, :lo12:.LANCHOR45
+	strb	wzr, [x19, #:lo12:.LANCHOR45]
 	mov	w21, 4
 	add	x0, x0, :lo12:.LANCHOR34
 	mov	w22, 0
@@ -11903,72 +12372,72 @@ idb_write_data:
 	str	w0, [x29, 160]
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 104]
-.L2012:
+.L2116:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L2026
-	adrp	x0, .LANCHOR44
+	bcc	.L2130
+	adrp	x0, .LANCHOR45
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
 	add	x3, x3, :lo12:idb_buf
-	strb	w1, [x0, #:lo12:.LANCHOR44]
+	strb	w1, [x0, #:lo12:.LANCHOR45]
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L2027:
+.L2131:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L2028
+	bcc	.L2132
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L1997
-	b	.L2032
-.L2036:
+	bls	.L2101
+	b	.L2136
+.L2140:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L1998
-.L2011:
+	b	.L2102
+.L2115:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
-	add	x0, x25, :lo12:.LANCHOR29
+	add	x0, x25, :lo12:.LANCHOR3
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L2002
-	adrp	x0, .LANCHOR27
-	ldrb	w3, [x0, #:lo12:.LANCHOR27]
+	cbz	w2, .L2106
+	adrp	x0, .LANCHOR1
+	ldrb	w3, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L2002:
-	adrp	x1, .LANCHOR24
-	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+.L2106:
+	adrp	x1, .LANCHOR27
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 9
-	bne	.L2004
-.L2065:
+	bne	.L2108
+.L2169:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L2006
+	cbnz	w2, .L2110
 	mov	w5, w0
-.L2007:
+.L2111:
 	mul	w1, w21, w5
-	adrp	x2, .LANCHOR42
-	adrp	x0, .LANCHOR12
-	cbnz	x6, .L2008
+	adrp	x2, .LANCHOR43
+	adrp	x0, .LANCHOR17
+	cbnz	x6, .L2112
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	ldrb	w7, [x2, #:lo12:.LANCHOR43]
 	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	str	w5, [x29, 140]
 	str	w7, [x29, 160]
 	ldrb	w6, [x3, 9]
@@ -11983,36 +12452,36 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR164]
+	ldrb	w0, [x28, #:lo12:.LANCHOR169]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L2009
+	cbnz	w0, .L2113
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L2009:
+.L2113:
 	add	x22, x22, 2048
-.L2010:
+.L2114:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L2000
-.L2004:
+	b	.L2104
+.L2108:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L2065
-.L2006:
-	adrp	x0, .LANCHOR27
-	ldrb	w1, [x0, #:lo12:.LANCHOR27]
+	b	.L2169
+.L2110:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L2007
-.L2008:
+	b	.L2111
+.L2112:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	ldrb	w7, [x2, #:lo12:.LANCHOR43]
 	add	x3, x3, :lo12:.LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	str	w7, [x29, 160]
 	ldrb	w5, [x3, 9]
 	udiv	w5, w1, w5
@@ -12026,24 +12495,24 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L2010
-.L2026:
+	b	.L2114
+.L2130:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR169
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR164]
+	ldrb	w1, [x1, #:lo12:.LANCHOR169]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L2013
+	cbnz	w1, .L2117
 	mov	w19, w0
-.L2014:
-	adrp	x0, .LANCHOR12
+.L2118:
+	adrp	x0, .LANCHOR17
 	ldr	w1, [x29, 136]
-	ldrb	w23, [x0, #:lo12:.LANCHOR12]
+	ldrb	w23, [x0, #:lo12:.LANCHOR17]
 	ldr	w0, [x29, 152]
 	add	w0, w0, w1
 	ldr	w1, [x29, 140]
@@ -12052,15 +12521,15 @@ idb_write_data:
 	add	x0, x0, :lo12:.LANCHOR34
 	ldrb	w0, [x0, 9]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	str	w0, [x29, 124]
 	mov	w0, w23
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
 	str	x0, [x29, 112]
-.L2015:
+.L2119:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -12069,32 +12538,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L2016
+	bne	.L2120
 	ldrb	w6, [x25]
-	cbnz	w6, .L2017
-.L2020:
-	adrp	x0, .LANCHOR155
-	ldr	x6, [x0, #:lo12:.LANCHOR155]
-	cbnz	x6, .L2018
-.L2019:
+	cbnz	w6, .L2121
+.L2124:
+	adrp	x0, .LANCHOR156
+	ldr	x6, [x0, #:lo12:.LANCHOR156]
+	cbnz	x6, .L2122
+.L2123:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L2016
+	cbz	w0, .L2120
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tuning_read
-	b	.L2066
-.L2013:
-	adrp	x0, .LANCHOR27
-	ldrb	w1, [x0, #:lo12:.LANCHOR27]
+	b	.L2170
+.L2117:
+	adrp	x0, .LANCHOR1
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L2014
-.L2017:
+	b	.L2118
+.L2121:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -12108,21 +12577,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L2020
-.L2066:
+	beq	.L2124
+.L2170:
 	mov	w5, w0
-.L2016:
+.L2120:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L2022
+	beq	.L2126
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L2015
-.L2018:
+	b	.L2119
+.L2122:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -12132,9 +12601,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L2019
-	b	.L2066
-.L2022:
+	beq	.L2123
+	b	.L2170
+.L2126:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -12144,62 +12613,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L2024
+	bne	.L2128
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L2024
+	cbnz	w0, .L2128
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L2024
+	bne	.L2128
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L2025:
+.L2129:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L2012
-.L2024:
+	b	.L2116
+.L2128:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L2025
-.L2028:
+	b	.L2129
+.L2132:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L2027
+	beq	.L2131
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L1997:
+.L2101:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L2030
+	bne	.L2134
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L2032
-	adrp	x0, .LC124
+	cbnz	w0, .L2136
+	adrp	x0, .LC125
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2032:
-	adrp	x0, .LANCHOR165
-	str	wzr, [x0, #:lo12:.LANCHOR165]
-	b	.L2046
+.L2136:
+	adrp	x0, .LANCHOR170
+	str	wzr, [x0, #:lo12:.LANCHOR170]
+	b	.L2150
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -12208,44 +12677,44 @@ idb_write_data:
 flash_start_tlc_page_prog:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
+	str	x25, [sp, 64]
 	and	w25, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w19, w3, 255
 	stp	x23, x24, [sp, 48]
 	and	w21, w1, 255
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	and	w22, w2, 255
 	mov	w20, w4
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L2069
-	adrp	x1, .LANCHOR166
+	bhi	.L2173
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR166
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2069:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w26, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x19, [x0, #:lo12:.LANCHOR23]
-	mov	w0, w26
+.L2173:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	ldrb	w4, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w4
 	bl	nandc_cs
-	cbz	w25, .L2070
-	sxtw	x0, w26
+	cbz	w25, .L2174
+	sxtw	x0, w4
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L2070:
-	ubfiz	x0, x26, 8, 8
-	add	x19, x19, x0
+.L2174:
+	ubfiz	x4, x4, 8, 8
 	mov	w0, 128
+	add	x19, x19, x4
 	str	w21, [x19, 2056]
 	str	w0, [x19, 2056]
 	and	w0, w20, 255
@@ -12267,14 +12736,13 @@ flash_start_tlc_page_prog:
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	mov	w0, w26
+	ldr	x25, [sp, 64]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
 	str	w22, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 80
-	b	nandc_de_cs
+	b	nandc_de_cs.constprop.29
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
@@ -12325,8 +12793,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -12343,21 +12811,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L2078:
+.L2182:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2079
+	cbnz	w0, .L2183
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2079:
+.L2183:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2078
+	b	.L2182
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -12374,13 +12842,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L2082:
+.L2186:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L2083
+	cbnz	w0, .L2187
 	cmp	w24, 2
-	bne	.L2084
+	bne	.L2188
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -12457,24 +12925,24 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-.L2085:
+.L2189:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2083:
+.L2187:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2082
-.L2084:
+	b	.L2186
+.L2188:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L2085
+	b	.L2189
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -12483,110 +12951,93 @@ sblk_xlc_prog_pages:
 flash_start_page_prog:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR14
 	stp	x23, x24, [sp, 48]
-	and	w23, w0, 255
+	adrp	x23, .LANCHOR18
+	stp	x25, x26, [sp, 64]
+	and	w24, w0, 255
 	stp	x19, x20, [sp, 16]
-	mov	x24, x2
+	mov	x25, x2
 	stp	x21, x22, [sp, 32]
-	mov	x25, x3
-	ldrb	w0, [x26, #:lo12:.LANCHOR14]
-	and	w19, w1, 2097151
+	mov	x26, x3
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
+	and	w20, w1, 2097151
 	str	x27, [sp, 80]
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L2088
-	adrp	x1, .LANCHOR167
+	bhi	.L2192
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 685
-	add	x1, x1, :lo12:.LANCHOR167
+	mov	w2, 699
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2088:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L2192:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w21, [x0, w27, sxtw]
-	adrp	x0, .LANCHOR23
-	ldr	x20, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
 	bl	nandc_rdy_status
-	cbnz	w0, .L2089
-	ldrb	w0, [x26, #:lo12:.LANCHOR14]
+	cbnz	w0, .L2193
+	ldrb	w0, [x23, #:lo12:.LANCHOR18]
 	cmp	w0, 1
-	bne	.L2090
+	bne	.L2194
 	bl	nandc_wait_flash_ready
-.L2089:
+.L2193:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L2091
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L2092
-	ldrb	w0, [x1, #:lo12:.LANCHOR27]
-	cbz	w0, .L2093
-.L2092:
-	adrp	x0, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR27]
-	ldrh	w2, [x0, #:lo12:.LANCHOR28]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L2094
-	add	w19, w0, w19, lsl 1
-.L2093:
+	cbnz	w22, .L2195
+	mov	w0, w20
+	bl	slc_phy_page_address_calc
+	mov	w20, w0
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2196
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L2095
-.L2090:
-	mov	w2, 64
-	mov	w1, w19
-	mov	w0, w27
-	bl	flash_wait_device_ready_raw
-	b	.L2089
-.L2094:
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-.L2095:
-	ubfiz	x0, x21, 8, 8
-	add	x20, x20, x0
+.L2196:
+	ubfiz	x21, x21, 8, 8
 	mov	w0, 128
-	str	w0, [x20, 2056]
-	and	w0, w19, 255
-	str	wzr, [x20, 2052]
-	str	wzr, [x20, 2052]
-	str	w0, [x20, 2052]
-	lsr	w0, w19, 8
-	str	w0, [x20, 2052]
-	lsr	w0, w19, 16
-	str	w0, [x20, 2052]
-	mov	w0, w19
+	add	x19, x19, x21
+	str	w0, [x19, 2056]
+	and	w0, w20, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x19, 2052]
+	mov	w0, w20
 	bl	nandc_set_seed
 	adrp	x0, .LANCHOR34+9
-	mov	x3, x25
-	mov	x2, x24
+	mov	x3, x26
+	mov	x2, x25
 	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	ldr	x27, [sp, 80]
-	ldp	x25, x26, [sp, 64]
-	mov	w0, w21
 	ldp	x21, x22, [sp, 32]
-	str	w23, [x20, 2056]
+	ldp	x25, x26, [sp, 64]
+	str	w24, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
-	b	nandc_de_cs
-.L2091:
+	b	nandc_de_cs.constprop.29
+.L2194:
+	mov	w2, 64
+	mov	w1, w20
+	mov	w0, w27
+	bl	flash_wait_device_ready_raw
+	b	.L2193
+.L2195:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L2095
+	b	.L2196
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -12601,27 +13052,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR126
+	adrp	x0, .LANCHOR53
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR126]
+	ldrb	w1, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, 255
-	beq	.L2101
-	adrp	x2, .LANCHOR48
-	add	x2, x2, :lo12:.LANCHOR48
+	beq	.L2202
+	adrp	x2, .LANCHOR49
+	add	x2, x2, :lo12:.LANCHOR49
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L2103:
+.L2204:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L2102
+	bne	.L2203
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L2102
+	bne	.L2203
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L2101:
+.L2202:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12629,16 +13080,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR53
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L2102:
+.L2203:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L2103
-	b	.L2101
+	bne	.L2204
+	b	.L2202
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12655,24 +13106,25 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L2110
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2110
+	cbz	w0, .L2211
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2211
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC125
+	adrp	x0, .LC126
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC125
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2110:
+.L2211:
 	adrp	x25, .LANCHOR38
-	adrp	x23, .LANCHOR48
+	adrp	x23, .LANCHOR49
 	add	x25, x25, :lo12:.LANCHOR38
-	add	x23, x23, :lo12:.LANCHOR48
+	add	x23, x23, :lo12:.LANCHOR49
 	mov	w21, 0
 	mov	w24, 1
-.L2111:
-	cbnz	w20, .L2121
+.L2212:
+	cbnz	w20, .L2223
+.L2236:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12681,52 +13133,53 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2121:
+.L2223:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L2112:
+.L2213:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L2113
+	cbnz	w0, .L2214
 	cmp	w20, 1
-	beq	.L2114
+	beq	.L2215
 	ldrb	w0, [x25]
-	cbnz	w0, .L2115
-.L2114:
+	cbnz	w0, .L2216
+.L2215:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2116:
+.L2217:
+	subs	w20, w20, #1
+	beq	.L2236
 	ubfiz	x19, x26, 6, 8
-	sub	w20, w20, #1
 	add	x19, x23, x19
-	b	.L2111
-.L2113:
+	b	.L2212
+.L2214:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L2112
-.L2115:
+	b	.L2213
+.L2216:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2117
-	adrp	x1, .LANCHOR168
+	bne	.L2218
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR168
+	mov	w2, 546
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2117:
+.L2218:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2118
-	adrp	x0, .LANCHOR102
-	ldrh	w2, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR101
-	ldrb	w3, [x0, #:lo12:.LANCHOR101]
+	bne	.L2219
+	adrp	x0, .LANCHOR99
+	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR98
+	ldrb	w3, [x0, #:lo12:.LANCHOR98]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -12745,9 +13198,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2118
+	bne	.L2219
 	cmp	w21, w3
-	beq	.L2118
+	beq	.L2219
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -12760,15 +13213,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
 	bl	buf_add_tail
-	b	.L2116
-.L2118:
+	b	.L2217
+.L2219:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2116
+	b	.L2217
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -12776,22 +13229,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR119
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldrb	w1, [x0, #:lo12:.LANCHOR119]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR169
-	cbz	w1, .L2133
-	ldrb	w2, [x20, #:lo12:.LANCHOR169]
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
+	adrp	x20, .LANCHOR174
+	cbz	w1, .L2239
+	ldrb	w2, [x20, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2133:
+.L2239:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR121]
-	strb	w0, [x20, #:lo12:.LANCHOR169]
+	strb	wzr, [x19, #:lo12:.LANCHOR119]
+	strb	w0, [x20, #:lo12:.LANCHOR174]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -12808,55 +13261,55 @@ flash_prog_page_en:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR18
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w20, w1
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
 	mov	x23, x3
 	mov	w25, w4
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2139
-	adrp	x1, .LANCHOR170
+	bhi	.L2245
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR170
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2139:
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+.L2245:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2149
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR27
-	cbz	w1, .L2141
-	ldrb	w1, [x0, #:lo12:.LANCHOR27]
-	cbz	w1, .L2149
-.L2141:
-	adrp	x1, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	cbnz	w19, .L2255
+	adrp	x0, .LANCHOR0
+	ldrb	w1, [x0, #:lo12:.LANCHOR0]
+	adrp	x0, .LANCHOR1
+	cbz	w1, .L2247
+	ldrb	w1, [x0, #:lo12:.LANCHOR1]
+	cbz	w1, .L2255
+.L2247:
+	adrp	x1, .LANCHOR2
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2142
+	cbz	w0, .L2248
 	add	w19, w19, w1, lsl 1
-.L2140:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 4, .L2143
-	adrp	x0, .LC126
+.L2246:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 4, .L2249
+	adrp	x0, .LC127
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2143:
+.L2249:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -12864,68 +13317,68 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2144
-	adrp	x26, .LANCHOR159
-	adrp	x21, .LANCHOR160
+	cbz	w21, .L2250
+	adrp	x26, .LANCHOR160
+	adrp	x21, .LANCHOR161
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR159]
+	ldr	x3, [x26, #:lo12:.LANCHOR160]
 	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR160]
+	ldr	x2, [x21, #:lo12:.LANCHOR161]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2145
-	ldr	x0, [x21, #:lo12:.LANCHOR160]
+	beq	.L2251
+	ldr	x0, [x21, #:lo12:.LANCHOR161]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2145
-	ldr	x0, [x26, #:lo12:.LANCHOR159]
+	bne	.L2251
+	ldr	x0, [x26, #:lo12:.LANCHOR160]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2144
-.L2145:
-	ldr	x1, [x26, #:lo12:.LANCHOR159]
-	mov	w3, 4
-	adrp	x0, .LC127
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC127
-	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR160]
+	beq	.L2250
+.L2251:
+	ldr	x1, [x26, #:lo12:.LANCHOR160]
 	mov	w3, 4
 	adrp	x0, .LC128
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
-.L2146:
-	mov	w1, w20
+	ldr	x1, [x21, #:lo12:.LANCHOR161]
+	mov	w3, 4
 	adrp	x0, .LC129
+	mov	w2, w3
 	add	x0, x0, :lo12:.LC129
+	bl	rknand_print_hex
+.L2252:
+	mov	w1, w20
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR170
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR170
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2147
-.L2142:
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	b	.L2253
+.L2248:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2140
-.L2149:
+	b	.L2246
+.L2255:
 	mov	w19, w20
-	b	.L2140
-.L2144:
+	b	.L2246
+.L2250:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2146
-.L2147:
+	beq	.L2252
+.L2253:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12943,121 +13396,121 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR171
+	adrp	x25, .LANCHOR176
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR109
+	adrp	x26, .LANCHOR106
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR109
+	add	x0, x26, :lo12:.LANCHOR106
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR101
+	adrp	x27, .LANCHOR98
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR101
-	str	wzr, [x25, #:lo12:.LANCHOR171]
+	add	x0, x27, :lo12:.LANCHOR98
+	str	wzr, [x25, #:lo12:.LANCHOR176]
 	str	x0, [x29, 96]
-.L2161:
+.L2267:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2171
-	add	x0, x27, :lo12:.LANCHOR101
+	bls	.L2277
+	add	x0, x27, :lo12:.LANCHOR98
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR9
-	add	x0, x0, :lo12:.LANCHOR9
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 104]
-	b	.L2172
-.L2170:
+	b	.L2278
+.L2276:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2162
-	adrp	x0, .LC130
+	tbz	x0, 12, .L2268
+	adrp	x0, .LC131
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC131
 	bl	printf
-.L2162:
+.L2268:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2163
-	adrp	x0, .LANCHOR22
-	ldr	x0, [x0, #:lo12:.LANCHOR22]
+	cbnz	w20, .L2269
+	adrp	x0, .LANCHOR26
+	ldr	x0, [x0, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2164
-.L2163:
+	bcs	.L2270
+.L2269:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2164
-	adrp	x0, .LANCHOR108
+	cbnz	w0, .L2270
+	adrp	x0, .LANCHOR105
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR108]
+	ldrh	w7, [x0, #:lo12:.LANCHOR105]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2165
-	adrp	x0, .LANCHOR71
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	cbz	w0, .L2271
+	adrp	x0, .LANCHOR68
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	bne	.L2187
-	adrp	x0, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR13]
-	cbz	w0, .L2187
+	bne	.L2293
+	adrp	x0, .LANCHOR0
+	ldrb	w0, [x0, #:lo12:.LANCHOR0]
+	cbz	w0, .L2293
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2187
-.L2169:
-	adrp	x0, .LANCHOR71
+	cbnz	w0, .L2293
+.L2275:
+	adrp	x0, .LANCHOR68
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	add	w26, w26, w0, lsl 24
-.L2168:
-	adrp	x0, .LANCHOR123
+.L2274:
+	adrp	x0, .LANCHOR121
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR171
+	add	x3, x25, :lo12:.LANCHOR176
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR123]
+	ldrb	w4, [x0, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2164
-.L2187:
+	cbz	w0, .L2270
+.L2293:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2164:
+.L2270:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2172:
+.L2278:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2170
+	bhi	.L2276
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2161
-.L2165:
-	cbz	w23, .L2168
-	b	.L2169
-.L2171:
-	cbz	w23, .L2173
-	adrp	x0, .LANCHOR3
+	b	.L2267
+.L2271:
+	cbz	w23, .L2274
+	b	.L2275
+.L2277:
+	cbz	w23, .L2279
+	adrp	x0, .LANCHOR7
 	mov	w1, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x21, x0, x21, uxth 2
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2173:
+.L2279:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13092,18 +13545,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2188
-	mov	w2, 2147
-	adrp	x1, .LANCHOR172
+	bne	.L2294
+	mov	w2, 2151
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC129
+	adrp	x0, .LC130
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC129
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2188:
+.L2294:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -13120,69 +13573,69 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR123
+	adrp	x21, .LANCHOR121
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR174
+	adrp	x22, .LANCHOR179
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR108
+	adrp	x23, .LANCHOR105
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR123]
-	add	x25, x22, :lo12:.LANCHOR174
-	add	x28, x23, :lo12:.LANCHOR108
+	ldrb	w2, [x21, #:lo12:.LANCHOR121]
+	add	x25, x22, :lo12:.LANCHOR179
+	add	x28, x23, :lo12:.LANCHOR105
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR173
+	adrp	x20, .LANCHOR178
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR173
+	add	x0, x20, :lo12:.LANCHOR178
 	bl	ftl_memset
-.L2192:
-	add	x0, x22, :lo12:.LANCHOR174
-	ldrb	w6, [x22, #:lo12:.LANCHOR174]
-	ldrh	w19, [x23, #:lo12:.LANCHOR108]
+.L2298:
+	add	x0, x22, :lo12:.LANCHOR179
+	ldrb	w6, [x22, #:lo12:.LANCHOR179]
+	ldrh	w19, [x23, #:lo12:.LANCHOR105]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR173
-	str	w27, [x20, #:lo12:.LANCHOR173]
+	add	x0, x20, :lo12:.LANCHOR178
+	str	w27, [x20, #:lo12:.LANCHOR178]
 	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2193
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2299
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC131
+	adrp	x0, .LC132
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC131
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2193:
-	adrp	x1, .LANCHOR83
+.L2299:
+	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2194
-	adrp	x19, .LANCHOR175
+	bhi	.L2300
+	adrp	x19, .LANCHOR180
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR175
+	add	x19, x19, :lo12:.LANCHOR180
 	add	x3, x3, :lo12:.LC0
-.L2201:
+.L2307:
 	ldrb	w0, [x25, 1]
-	adrp	x4, .LANCHOR22
+	adrp	x4, .LANCHOR26
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2195
+	bls	.L2301
 	mov	x0, 0
-.L2200:
-	ldr	x2, [x4, #:lo12:.LANCHOR22]
+.L2306:
+	ldr	x2, [x4, #:lo12:.LANCHOR26]
 	add	w1, w0, 8
 	and	w24, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -13190,32 +13643,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2196
+	bhi	.L2302
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2199:
+.L2305:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2195:
-	ldr	x0, [x4, #:lo12:.LANCHOR22]
+.L2301:
+	ldr	x0, [x4, #:lo12:.LANCHOR26]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2201
+	beq	.L2307
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR123]
+	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR173
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -13223,53 +13676,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2202:
-	ldrb	w4, [x21, #:lo12:.LANCHOR123]
+.L2308:
+	ldrb	w4, [x21, #:lo12:.LANCHOR121]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR173
+	add	x3, x20, :lo12:.LANCHOR178
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR176
+	adrp	x0, .LANCHOR181
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2203
-	ldrb	w1, [x0, #:lo12:.LANCHOR176]
-	cbz	w1, .L2204
-.L2203:
-	strb	wzr, [x0, #:lo12:.LANCHOR176]
-	b	.L2192
-.L2196:
+	beq	.L2309
+	ldrb	w1, [x0, #:lo12:.LANCHOR181]
+	cbz	w1, .L2310
+.L2309:
+	strb	wzr, [x0, #:lo12:.LANCHOR181]
+	b	.L2298
+.L2302:
 	cmp	w2, 255
-	bne	.L2199
+	bne	.L2305
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2200
+	bne	.L2306
 	mov	w24, w0
-	b	.L2199
-.L2194:
+	b	.L2305
+.L2300:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2202
+	cbnz	w0, .L2308
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2202
-.L2204:
-	cbnz	w24, .L2205
-.L2213:
-	adrp	x0, .LANCHOR174
-	ldrb	w0, [x0, #:lo12:.LANCHOR174]
+	b	.L2308
+.L2310:
+	cbnz	w24, .L2311
+.L2319:
+	adrp	x0, .LANCHOR179
+	ldrb	w0, [x0, #:lo12:.LANCHOR179]
 	cmp	w0, 255
-	bne	.L2207
-	adrp	x1, .LANCHOR175
+	bne	.L2313
+	adrp	x1, .LANCHOR180
 	adrp	x0, .LC0
 	mov	w2, 778
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR180
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2207:
+.L2313:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13278,42 +13731,42 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2205:
+.L2311:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR175
+	adrp	x20, .LANCHOR180
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR175
+	add	x20, x20, :lo12:.LANCHOR180
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR22
-.L2208:
+	adrp	x22, .LANCHOR26
+.L2314:
 	cmp	w19, 7
-	bhi	.L2213
-	ldr	x1, [x22, #:lo12:.LANCHOR22]
+	bhi	.L2319
+	ldr	x1, [x22, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2209
+	bhi	.L2315
 	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2210:
-	ldrh	w1, [x26, #:lo12:.LANCHOR108]
+.L2316:
+	ldrh	w1, [x26, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2211
-.L2209:
+	b	.L2317
+.L2315:
 	cmp	w23, 255
-	bne	.L2210
-.L2211:
+	bne	.L2316
+.L2317:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2208
+	b	.L2314
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -13321,32 +13774,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR177
-	adrp	x1, .LANCHOR176
+	adrp	x0, .LANCHOR182
+	adrp	x1, .LANCHOR181
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR177]
+	strb	wzr, [x0, #:lo12:.LANCHOR182]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR176]
-	adrp	x1, .LANCHOR178
+	strb	w0, [x1, #:lo12:.LANCHOR181]
+	adrp	x1, .LANCHOR183
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR178]
-	adrp	x1, .LANCHOR3
+	strb	w0, [x1, #:lo12:.LANCHOR183]
+	adrp	x1, .LANCHOR7
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
-	str	x0, [x1, #:lo12:.LANCHOR3]
-	adrp	x1, .LANCHOR2
-	adrp	x22, .LANCHOR100
+	str	x0, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR6
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR174
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	adrp	x21, .LANCHOR179
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR22
+	adrp	x23, .LANCHOR26
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR108
+	adrp	x26, .LANCHOR105
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR100]
+	str	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -13354,51 +13807,51 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR123
-	ldr	x1, [x23, #:lo12:.LANCHOR22]
-	add	x0, x21, :lo12:.LANCHOR174
+	adrp	x25, .LANCHOR121
+	ldr	x1, [x23, #:lo12:.LANCHOR26]
+	add	x0, x21, :lo12:.LANCHOR179
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR108
-	add	x25, x25, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR105
+	add	x25, x25, :lo12:.LANCHOR121
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR174]
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strh	wzr, [x0, 2]
-.L2229:
-	ldr	x1, [x23, #:lo12:.LANCHOR22]
+.L2335:
+	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w19, 8
 	sxth	w24, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2228
-.L2233:
+	bne	.L2334
+.L2339:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2229
+	bne	.L2335
 	mov	w24, 0
-.L2230:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2234
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2336:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2340
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	bl	printf
-.L2234:
+.L2340:
 	cmn	w19, #1
-	bne	.L2235
+	bne	.L2341
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
@@ -13406,7 +13859,7 @@ ftl_info_blk_init:
 	movk	w1, 0x6, lsl 16
 	str	w1, [x0, 12]
 	mov	w0, w19
-.L2227:
+.L2333:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13414,12 +13867,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2228:
+.L2334:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR173
-	add	x7, x7, :lo12:.LANCHOR173
+	adrp	x7, .LANCHOR178
+	add	x7, x7, :lo12:.LANCHOR178
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -13432,7 +13885,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2231
+	bne	.L2337
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -13440,58 +13893,58 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2231:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2232
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2337:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2338
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2232:
+.L2338:
 	cmn	w5, #1
-	beq	.L2233
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2339
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2233
+	bne	.L2339
 	mov	w19, w24
-	b	.L2230
-.L2235:
-	ldr	x1, [x23, #:lo12:.LANCHOR22]
+	b	.L2336
+.L2341:
+	ldr	x1, [x23, #:lo12:.LANCHOR26]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR123
+	adrp	x26, .LANCHOR121
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR121
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR174
-	strb	w1, [x21, #:lo12:.LANCHOR174]
+	add	x0, x21, :lo12:.LANCHOR179
+	strb	w1, [x21, #:lo12:.LANCHOR179]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR173
-	add	x24, x24, :lo12:.LANCHOR173
+	adrp	x24, .LANCHOR178
+	add	x24, x24, :lo12:.LANCHOR178
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR108
-	ldrb	w25, [x21, #:lo12:.LANCHOR174]
-	ldrh	w0, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR105
+	ldrb	w25, [x21, #:lo12:.LANCHOR179]
+	ldrh	w0, [x0, #:lo12:.LANCHOR105]
 	madd	w25, w25, w0, w23
-.L2237:
-	tbnz	w23, #31, .L2240
+.L2343:
+	tbnz	w23, #31, .L2346
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -13499,16 +13952,16 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2238
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	beq	.L2344
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2238
-.L2240:
-	add	x21, x21, :lo12:.LANCHOR174
+	bne	.L2344
+.L2346:
+	add	x21, x21, :lo12:.LANCHOR179
 	strh	w19, [x21, 2]
 	bl	ftl_tmp_into_update
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 64]
 	add	w0, w0, 1
 	str	w0, [x1, 64]
@@ -13517,12 +13970,12 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2227
-.L2238:
+	b	.L2333
+.L2344:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2237
+	b	.L2343
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -13530,57 +13983,57 @@ ftl_info_blk_init:
 	.type	ftl_ext_info_flush, %function
 ftl_ext_info_flush:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR6
+	adrp	x0, .LANCHOR10
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2256
+	cbz	w1, .L2362
 	str	wzr, [x0, 520]
-.L2256:
-	adrp	x20, .LANCHOR83
-	adrp	x22, .LANCHOR179
-	adrp	x21, .LANCHOR102
-	add	x20, x20, :lo12:.LANCHOR83
-	add	x22, x22, :lo12:.LANCHOR179
-	add	x21, x21, :lo12:.LANCHOR102
+.L2362:
+	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR184
+	adrp	x21, .LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR80
+	add	x22, x22, :lo12:.LANCHOR184
+	add	x21, x21, :lo12:.LANCHOR99
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2257:
-	adrp	x23, .LANCHOR100
+.L2363:
+	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2260:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2366:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2258
+	bcc	.L2364
 	bl	ftl_ext_alloc_new_blk
-.L2258:
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+.L2364:
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2259
+	bne	.L2365
 	adrp	x0, .LC0
 	mov	w2, 1747
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2259:
-	ldr	x1, [x24, #:lo12:.LANCHOR100]
+.L2365:
+	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR123
-	adrp	x27, .LANCHOR173
-	add	x25, x27, :lo12:.LANCHOR173
+	adrp	x26, .LANCHOR121
+	adrp	x27, .LANCHOR178
+	add	x25, x27, :lo12:.LANCHOR178
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13588,43 +14041,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR108
-	ldrh	w2, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR105
+	ldrh	w2, [x0, #:lo12:.LANCHOR105]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR123]
+	ldrb	w2, [x26, #:lo12:.LANCHOR121]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR100]
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR123]
+	ldrb	w4, [x26, #:lo12:.LANCHOR121]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR173]
+	str	wzr, [x27, #:lo12:.LANCHOR178]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR100]
+	ldr	x2, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2260
+	beq	.L2366
 	cmn	w0, #1
-	adrp	x0, .LANCHOR178
-	beq	.L2261
-	ldrb	w1, [x0, #:lo12:.LANCHOR178]
-	cbz	w1, .L2262
-.L2261:
-	strb	wzr, [x0, #:lo12:.LANCHOR178]
-	b	.L2257
-.L2262:
+	adrp	x0, .LANCHOR183
+	beq	.L2367
+	ldrb	w1, [x0, #:lo12:.LANCHOR183]
+	cbz	w1, .L2368
+.L2367:
+	strb	wzr, [x0, #:lo12:.LANCHOR183]
+	b	.L2363
+.L2368:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13640,90 +14093,93 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR115
 	mov	w4, 4
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR100
-	strh	wzr, [x0, #:lo12:.LANCHOR118]
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	stp	x19, x20, [sp, 16]
-	mov	w19, 1
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR173
+	adrp	x20, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR115]
+	mov	w19, 21
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	stp	x21, x22, [sp, 32]
-	adrp	x26, ftl_ext_info_data_buffer
-	ldrh	w20, [x0, 130]
-	adrp	x0, .LANCHOR102
 	stp	x27, x28, [sp, 80]
-	add	x3, x25, :lo12:.LANCHOR173
-	ldrh	w1, [x0, #:lo12:.LANCHOR102]
-	mov	w0, 21
-	add	x2, x26, :lo12:ftl_ext_info_data_buffer
-	sub	w0, w0, w1
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR178
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LANCHOR99
+	stp	x25, x26, [sp, 64]
+	add	x3, x24, :lo12:.LANCHOR178
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	adrp	x25, ftl_ext_info_data_buffer
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	sub	w0, w19, w0
+	mov	w19, 1
 	lsl	w19, w19, w0
 	sub	w19, w19, #1
-	and	w19, w19, w20
-	asr	w20, w20, w0
-	and	w20, w20, 255
+	asr	w21, w1, w0
+	and	w19, w19, w1
+	and	w27, w21, 255
 	mov	w1, w19
-	mov	w0, w20
+	mov	w0, w27
 	bl	flash_get_last_written_page
 	sxth	w22, w0
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2273
-	adrp	x1, .LANCHOR180
-	adrp	x0, .LC72
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2379
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR185
+	and	w4, w21, 65535
 	mov	w3, w22
 	mov	w2, 1791
-	add	x1, x1, :lo12:.LANCHOR180
-	add	x0, x0, :lo12:.LC72
+	add	x1, x1, :lo12:.LANCHOR185
+	ldrh	w5, [x0, 130]
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2273:
-	adrp	x27, .LANCHOR123
-	adrp	x28, .LANCHOR108
+.L2379:
+	adrp	x26, .LANCHOR121
+	adrp	x28, .LANCHOR105
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR123
-	add	x28, x28, :lo12:.LANCHOR108
-	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR121
+	add	x28, x28, :lo12:.LANCHOR105
+	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L2274:
+.L2380:
 	and	w21, w22, 65535
-	sub	w0, w21, w24
-	tbnz	x0, 15, .L2279
+	sub	w0, w21, w23
+	tbnz	x0, 15, .L2385
 	ldrh	w0, [x28]
-	sub	w1, w22, w24
-	ldrb	w4, [x27]
-	add	x3, x25, :lo12:.LANCHOR173
+	sub	w1, w22, w23
+	ldrb	w4, [x26]
+	add	x3, x24, :lo12:.LANCHOR178
 	str	w5, [x29, 108]
-	add	x2, x26, :lo12:ftl_ext_info_data_buffer
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
-	mov	w0, w20
+	mov	w0, w27
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2275
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	beq	.L2381
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2275
-.L2279:
+	bne	.L2381
+.L2385:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2277
+	bgt	.L2383
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2277:
-	adrp	x0, .LANCHOR6
+.L2383:
+	adrp	x0, .LANCHOR10
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	strh	w1, [x0, 584]
@@ -13735,14 +14191,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR66
-	strh	w1, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR63
+	strh	w1, [x0, #:lo12:.LANCHOR63]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2275:
-	add	w24, w24, 1
-	b	.L2274
+.L2381:
+	add	w23, w23, 1
+	b	.L2380
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format_data_init,"ax",@progbits
 	.align	2
@@ -13759,87 +14215,91 @@ ftl_low_format_data_init:
 	str	x21, [sp, 32]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR97
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	mov	w21, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2288
-	adrp	x1, .LANCHOR181
+	bcs	.L2394
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
 	mov	w2, 1974
-	add	x1, x1, :lo12:.LANCHOR181
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2288:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2394:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	adrp	x1, .LANCHOR102
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
-	ldrh	w2, [x1, #:lo12:.LANCHOR102]
+	adrp	x1, .LANCHOR99
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldrh	w2, [x1, #:lo12:.LANCHOR99]
 	mov	w1, 21
 	sub	w1, w1, w2
-	strh	w20, [x0, 692]
 	strh	w21, [x0, 416]
+	adrp	x21, .LANCHOR10
+	strh	w20, [x0, 692]
 	asr	w1, w20, w1
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR182
-	adrp	x20, .LANCHOR6
-	ldrh	w1, [x1, #:lo12:.LANCHOR182]
+	adrp	x1, .LANCHOR187
+	ldrh	w1, [x1, #:lo12:.LANCHOR187]
 	strh	w1, [x0, 698]
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 20038
 	movk	w1, 0x4549, lsl 16
 	str	w1, [x0]
 	bl	ftl_alloc_sys_blk
-	mov	w21, w0
+	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, 2
-	strh	w21, [x0, 130]
+	strh	w20, [x0, 130]
+	mov	w20, -1
 	strh	wzr, [x0, 140]
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
+	strh	w20, [x0, 568]
+	strh	w20, [x0, 570]
+	strh	w20, [x0, 572]
+	strh	w20, [x0, 574]
 	bl	ftl_open_sblk_init
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
 	strh	w2, [x0, -10]
+	strh	w20, [x0, -56]
 	mov	w2, -1
+	strh	w20, [x0, -6]
+	str	w2, [x0, 408]
 	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
 	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
 	strh	wzr, [x0, -14]
 	strh	w2, [x1, 126]
 	mov	w2, 256
@@ -13848,7 +14308,7 @@ ftl_low_format_data_init:
 	str	wzr, [x0, 388]
 	str	wzr, [x0, 392]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 392
@@ -13870,82 +14330,82 @@ ftl_low_format_data_init:
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	mov	w1, 0
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR183
+	adrp	x20, .LANCHOR188
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR183
+	add	x20, x20, :lo12:.LANCHOR188
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR22
+	adrp	x22, .LANCHOR26
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
 	bl	printf
-.L2293:
-	ldr	x0, [x22, #:lo12:.LANCHOR22]
+.L2399:
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2291
-	mov	w2, 2024
+	bhi	.L2397
+	mov	w2, 2028
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2291:
+.L2397:
 	cmp	w21, 255
-	beq	.L2292
-	adrp	x0, .LANCHOR108
-	ldrh	w1, [x0, #:lo12:.LANCHOR108]
+	beq	.L2398
+	adrp	x0, .LANCHOR105
+	ldrh	w1, [x0, #:lo12:.LANCHOR105]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2292:
+.L2398:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2293
+	bne	.L2399
 	bl	sblk_init
-	adrp	x22, .LANCHOR3
+	adrp	x22, .LANCHOR7
 	bl	ftl_info_blk_init
-	adrp	x19, .LANCHOR2
+	adrp	x19, .LANCHOR6
 	mov	w2, 16384
 	mov	w1, 0
 	adrp	x0, ftl_info_data_buffer
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	ldr	x0, [x22, #:lo12:.LANCHOR7]
 	mov	w3, 1
-	ldrh	w2, [x19, #:lo12:.LANCHOR2]
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
 	add	x2, x0, x2, lsl 2
-.L2294:
+.L2400:
 	cmp	x0, x2
-	bne	.L2295
-	adrp	x21, .LANCHOR100
+	bne	.L2401
+	adrp	x21, .LANCHOR97
 	mov	w1, 21574
-	adrp	x24, .LANCHOR62
-	add	x24, x24, :lo12:.LANCHOR62
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+	adrp	x24, .LANCHOR59
+	add	x24, x24, :lo12:.LANCHOR59
+	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	movk	w1, 0x494c, lsl 16
 	mov	w20, 0
 	mov	w26, 1
 	strh	wzr, [x0, 148]
 	str	w1, [x0]
-.L2296:
-	ldrh	w0, [x19, #:lo12:.LANCHOR2]
-	adrp	x23, .LANCHOR101
+.L2402:
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
+	adrp	x23, .LANCHOR98
 	cmp	w0, w20
-	bhi	.L2304
-	ldr	x0, [x25, #:lo12:.LANCHOR22]
+	bhi	.L2410
+	ldr	x0, [x25, #:lo12:.LANCHOR26]
 	mov	w4, 3
-	ldrb	w2, [x23, #:lo12:.LANCHOR101]
+	ldrb	w2, [x23, #:lo12:.LANCHOR98]
 	mov	w10, 15
-	ldr	x6, [x21, #:lo12:.LANCHOR100]
+	ldr	x6, [x21, #:lo12:.LANCHOR97]
 	cmp	w2, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	ldr	x1, [x22, #:lo12:.LANCHOR7]
 	ldrb	w0, [x0, 47]
 	csinc	w4, w4, wzr, ne
 	and	w4, w4, 255
@@ -13957,7 +14417,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w20, w5, 1
 	add	x0, x1, x0
-.L2307:
+.L2413:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -13966,40 +14426,40 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2307
+	bne	.L2413
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w3, w8
 	sdiv	w4, w4, w2
 	add	w0, w5, w0, uxth
 	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2308
-	adrp	x0, .LC135
+	tbz	x0, 12, .L2414
+	adrp	x0, .LC137
 	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 2070
-	add	x0, x0, :lo12:.LC135
+	mov	w1, 2074
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2308:
-	ldr	x0, [x21, #:lo12:.LANCHOR100]
+.L2414:
+	ldr	x0, [x21, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	adrp	x0, .LANCHOR109
-	ldrb	w13, [x23, #:lo12:.LANCHOR101]
-	ldr	x2, [x21, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR106
+	ldrb	w13, [x23, #:lo12:.LANCHOR98]
+	ldr	x2, [x21, #:lo12:.LANCHOR97]
 	mov	w4, 21
-	ldrb	w15, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LANCHOR102
+	ldrb	w15, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR99
 	and	w16, w13, 65535
-	ldr	x14, [x22, #:lo12:.LANCHOR3]
-	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	ldr	x14, [x22, #:lo12:.LANCHOR7]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	mov	w3, 0
 	ldrh	w12, [x2, 134]
 	sub	w0, w4, w0
@@ -14008,10 +14468,10 @@ ftl_low_format:
 	lsl	w4, w4, w0
 	and	w1, w1, 65535
 	and	w4, w4, 65535
-.L2309:
+.L2415:
 	cmp	w20, w12
-	bcc	.L2315
-	ldrh	w0, [x19, #:lo12:.LANCHOR2]
+	bcc	.L2421
+	ldrh	w0, [x19, #:lo12:.LANCHOR6]
 	strh	w3, [x2, 112]
 	sub	w0, w0, w12
 	strh	wzr, [x2, 114]
@@ -14026,37 +14486,37 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2295:
+.L2401:
 	ldrb	w1, [x0, 2]
 	add	x0, x0, 4
 	and	w1, w1, 31
 	bfi	w1, w3, 3, 2
 	strb	w1, [x0, -2]
-	b	.L2294
-.L2304:
+	b	.L2400
+.L2410:
 	strh	w20, [x24]
 	mov	w0, w20
 	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR109
-	ldr	x6, [x22, #:lo12:.LANCHOR3]
+	ldrb	w11, [x23, #:lo12:.LANCHOR98]
+	adrp	x0, .LANCHOR106
+	ldr	x6, [x22, #:lo12:.LANCHOR7]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR109]
+	ldrb	w14, [x0, #:lo12:.LANCHOR106]
 	mov	w10, 0
-	ldr	x13, [x21, #:lo12:.LANCHOR100]
+	ldr	x13, [x21, #:lo12:.LANCHOR97]
 	mov	w8, 0
 	mul	w12, w20, w11
 	add	x6, x6, x20, uxth 2
-.L2297:
+.L2403:
 	cmp	w8, w14
-	bcs	.L2301
+	bcs	.L2407
 	add	w15, w11, w7
-	b	.L2302
-.L2300:
+	b	.L2408
+.L2406:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2298
+	cbz	w0, .L2404
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -14064,29 +14524,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2299:
+.L2405:
 	add	w7, w7, 1
-.L2302:
+.L2408:
 	cmp	w7, w15
-	bne	.L2300
+	bne	.L2406
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2297
-.L2298:
+	b	.L2403
+.L2404:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2299
-.L2301:
-	cbnz	w10, .L2303
+	b	.L2405
+.L2407:
+	cbnz	w10, .L2409
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2303:
+.L2409:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2296
-.L2315:
+	b	.L2402
+.L2421:
 	add	x10, x14, x20, uxth 2
 	mov	w6, 0
 	mov	w8, 0
@@ -14094,48 +14554,48 @@ ftl_low_format:
 	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
 	strb	w0, [x10, 2]
-.L2310:
+.L2416:
 	cmp	w5, w15
-	bcc	.L2317
+	bcc	.L2423
 	add	w20, w20, 1
 	add	w1, w16, w1
 	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2309
-.L2313:
+	b	.L2415
+.L2419:
 	ldrb	w11, [x10, 3]
 	add	w17, w8, w7
 	asr	w11, w11, w17
-	tbnz	x11, 0, .L2311
+	tbnz	x11, 0, .L2417
 	cmp	w13, 1
-	bls	.L2316
+	bls	.L2422
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2312:
+.L2418:
 	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
 	and	w3, w3, 65535
 	add	w0, w0, w6
 	strh	w0, [x11, 160]
-.L2311:
+.L2417:
 	add	x7, x7, 1
-.L2314:
+.L2420:
 	and	w0, w7, 65535
 	cmp	w0, w16
-	bcc	.L2313
+	bcc	.L2419
 	add	w5, w5, 1
 	add	w6, w6, w4
 	and	w5, w5, 65535
 	add	w8, w8, w13
 	and	w6, w6, 65535
-	b	.L2310
-.L2316:
+	b	.L2416
+.L2422:
 	mov	w0, w1
-	b	.L2312
-.L2317:
+	b	.L2418
+.L2423:
 	mov	x7, 0
-	b	.L2314
+	b	.L2420
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
@@ -14144,27 +14604,27 @@ ftl_low_format:
 ftl_re_low_format:
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	add	x29, sp, 0
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	adrp	x0, .LANCHOR100
-	adrp	x2, .LANCHOR2
+	adrp	x0, .LANCHOR97
+	adrp	x2, .LANCHOR6
 	mov	w3, 0
 	mov	w4, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	mov	w5, 0
-	ldrh	w7, [x2, #:lo12:.LANCHOR2]
-	adrp	x2, .LANCHOR3
-	ldr	x2, [x2, #:lo12:.LANCHOR3]
+	ldrh	w7, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR7
+	ldr	x2, [x2, #:lo12:.LANCHOR7]
 	ldrh	w1, [x0, 134]
 	add	x2, x2, x1, uxth 2
-.L2328:
+.L2434:
 	cmp	w1, w7
-	bcc	.L2332
+	bcc	.L2438
 	strh	w5, [x0, 114]
 	strh	w4, [x0, 118]
 	strh	w3, [x0, 116]
@@ -14175,29 +14635,29 @@ ftl_re_low_format:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L2332:
+.L2438:
 	ldrb	w6, [x2, 2]
 	and	w8, w6, 31
 	strb	w8, [x2, 2]
 	ands	w6, w6, 24
-	bne	.L2329
+	bne	.L2435
 	add	w5, w5, 1
 	and	w5, w5, 65535
-.L2330:
+.L2436:
 	add	w1, w1, 1
 	add	x2, x2, 4
 	and	w1, w1, 65535
-	b	.L2328
-.L2329:
+	b	.L2434
+.L2435:
 	cmp	w6, 16
-	bne	.L2331
+	bne	.L2437
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2330
-.L2331:
+	b	.L2436
+.L2437:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L2330
+	b	.L2436
 	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -14219,50 +14679,50 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2337
+	bne	.L2443
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR111
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR114]
+	ldr	x20, [x1, #:lo12:.LANCHOR111]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2338
+	beq	.L2444
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR171
+	adrp	x0, .LANCHOR176
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR171
+	add	x6, x0, :lo12:.LANCHOR176
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR171]
-	adrp	x0, .LANCHOR83
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR76
-	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	str	w1, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w1, w1, w0
 	mov	x0, x20
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR121
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR123]
+	ldrb	w3, [x0, #:lo12:.LANCHOR121]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2338:
+.L2444:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2337:
+.L2443:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -14274,142 +14734,142 @@ ftl_open_sblk_recovery:
 	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR9
+	adrp	x22, .LANCHOR14
 	stp	x27, x28, [sp, 80]
 	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	stp	x25, x26, [sp, 64]
 	mov	x25, x1
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	tbz	x0, 12, .L2344
+	tbz	x0, 12, .L2450
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2344:
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2345
+.L2450:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2451
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2345:
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2346
+.L2451:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2452
 	ldrh	w1, [x28]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2346:
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2347
+.L2452:
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2453
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC140
+	adrp	x0, .LC142
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC140
+	add	x0, x0, :lo12:.LC142
 	bl	printf
-.L2347:
+.L2453:
 	ldrh	w0, [x28, 10]
 	strh	w0, [x28, 14]
-	adrp	x0, .LANCHOR2
+	adrp	x0, .LANCHOR6
 	ldrh	w1, [x28]
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w1, w0
-	bcs	.L2343
+	bcs	.L2449
 	mov	w0, 1
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
 	mov	x19, x0
 	ldrh	w21, [x28, 2]
-	adrp	x26, .LANCHOR123
+	adrp	x26, .LANCHOR121
 	mov	w27, 0
-	add	x0, x26, :lo12:.LANCHOR123
-	adrp	x23, .LANCHOR83
+	add	x0, x26, :lo12:.LANCHOR121
+	adrp	x23, .LANCHOR80
 	str	x0, [x29, 128]
-.L2350:
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+.L2456:
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2363
-.L2353:
+	bhi	.L2469
+.L2459:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
-	ldrh	w2, [x23, #:lo12:.LANCHOR83]
+	ldrh	w2, [x23, #:lo12:.LANCHOR80]
 	add	w1, w1, w0
 	ldrb	w0, [x28, 9]
 	strh	w21, [x28, 2]
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2364
-	adrp	x1, .LANCHOR184
+	beq	.L2470
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1473
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2364:
-	adrp	x21, .LANCHOR114
+.L2470:
+	adrp	x21, .LANCHOR111
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x5, [x21, #:lo12:.LANCHOR114]
-.L2365:
+	ldr	x5, [x21, #:lo12:.LANCHOR111]
+.L2471:
 	cmp	w1, w3
-	bcc	.L2367
+	bcc	.L2473
 	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR5
-	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	adrp	x24, .LANCHOR9
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2368
+	tbz	x0, 12, .L2474
 	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR5]
+	ldr	x2, [x24, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC141
+	adrp	x0, .LC143
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC141
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-.L2368:
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	adrp	x25, .LANCHOR123
+.L2474:
+	ldr	x0, [x24, #:lo12:.LANCHOR9]
+	adrp	x25, .LANCHOR121
 	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR76
-	adrp	x26, .LC142
-	add	x24, x24, :lo12:.LANCHOR76
-	add	x25, x25, :lo12:.LANCHOR123
-	add	x26, x26, :lo12:.LC142
+	adrp	x24, .LANCHOR73
+	adrp	x26, .LC144
+	add	x24, x24, :lo12:.LANCHOR73
+	add	x25, x25, :lo12:.LANCHOR121
+	add	x26, x26, :lo12:.LC144
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2369:
+.L2475:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2372
+	bcc	.L2478
 	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR114]
+	ldr	x1, [x21, #:lo12:.LANCHOR111]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2373
-	adrp	x1, .LANCHOR184
+	beq	.L2479
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1503
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2373:
+.L2479:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2343
+	bne	.L2449
 	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 32]
@@ -14418,27 +14878,27 @@ ftl_open_sblk_recovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2363:
+.L2469:
 	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR108
-	add	x0, x24, :lo12:.LANCHOR108
+	adrp	x24, .LANCHOR105
+	add	x0, x24, :lo12:.LANCHOR105
 	str	x0, [x29, 136]
-.L2351:
+.L2457:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2362
+	bhi	.L2468
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2350
-.L2362:
+	b	.L2456
+.L2468:
 	add	x0, x28, x20, sxtw 1
 	mov	w1, 65535
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	beq	.L2352
+	beq	.L2458
 	ldr	x1, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR123]
+	ldrb	w3, [x26, #:lo12:.LANCHOR121]
 	ldr	x2, [x19, 24]
 	ldrh	w5, [x1]
 	ldr	x1, [x19, 8]
@@ -14446,84 +14906,84 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2353
+	beq	.L2459
 	cmn	w0, #1
-	beq	.L2354
+	beq	.L2460
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2354
+	bne	.L2460
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2354
+	bne	.L2460
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2353
-.L2354:
-	adrp	x0, .LANCHOR177
+	beq	.L2459
+.L2460:
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR177]
+	strb	w1, [x0, #:lo12:.LANCHOR182]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2355
-	adrp	x1, .LANCHOR184
+	beq	.L2461
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1396
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2355:
+.L2461:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR83]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2356
-	adrp	x1, .LANCHOR184
+	beq	.L2462
+	adrp	x1, .LANCHOR189
 	adrp	x0, .LC0
 	mov	w2, 1397
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR189
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2356:
+.L2462:
 	cmn	w24, #1
-	beq	.L2358
+	beq	.L2464
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2358
+	beq	.L2464
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2360
+	cbz	x25, .L2466
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2360
+	beq	.L2466
 	cmn	w0, #1
-	beq	.L2360
-	adrp	x6, .LANCHOR102
+	beq	.L2466
+	adrp	x6, .LANCHOR99
 	mov	w5, 21
 	mov	w27, 1
-	ldrh	w7, [x6, #:lo12:.LANCHOR102]
+	ldrh	w7, [x6, #:lo12:.LANCHOR99]
 	sub	w1, w5, w7
 	lsr	w2, w0, w7
-	adrp	x7, .LANCHOR101
+	adrp	x7, .LANCHOR98
 	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x7, #:lo12:.LANCHOR101]
+	ldrb	w2, [x7, #:lo12:.LANCHOR98]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2360
+	bne	.L2466
 	ldr	x1, [x29, 128]
-	adrp	x8, .LANCHOR173
+	adrp	x8, .LANCHOR178
 	ldr	w10, [x3]
-	add	x2, x8, :lo12:.LANCHOR173
+	add	x2, x8, :lo12:.LANCHOR178
 	stp	w5, w10, [x29, 112]
 	str	x8, [x29, 120]
 	ldrb	w3, [x1]
@@ -14532,25 +14992,25 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x8, [x29, 120]
 	ldr	w10, [x29, 116]
-	ldr	w0, [x8, #:lo12:.LANCHOR173]
+	ldr	w0, [x8, #:lo12:.LANCHOR178]
 	cmp	w10, w0
-	bhi	.L2360
+	bhi	.L2466
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2358
+	beq	.L2464
 	ldp	x7, x6, [x29, 96]
 	ldr	w5, [x29, 112]
-	ldrh	w1, [x6, #:lo12:.LANCHOR102]
+	ldrh	w1, [x6, #:lo12:.LANCHOR99]
 	sub	w5, w5, w1
 	lsr	w0, w0, w1
 	lsl	w27, w27, w5
 	sub	w27, w27, #1
 	and	w27, w27, w0
-	ldrb	w0, [x7, #:lo12:.LANCHOR101]
+	ldrb	w0, [x7, #:lo12:.LANCHOR98]
 	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2358:
+.L2464:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14558,41 +15018,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2352:
+.L2458:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2351
-.L2367:
+	b	.L2457
+.L2473:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2366
+	beq	.L2472
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2366:
+.L2472:
 	add	w1, w1, 1
-	b	.L2365
-.L2372:
-	cbz	w27, .L2370
+	b	.L2471
+.L2478:
+	cbz	w27, .L2476
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2370
+	bls	.L2476
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2371
+	ldr	w0, [x22, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2477
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2371:
-	adrp	x0, .LANCHOR100
+.L2477:
+	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -14604,37 +15064,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2370:
+.L2476:
 	add	w20, w20, 1
-	b	.L2369
-.L2360:
+	b	.L2475
+.L2466:
 	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR56
-	ldr	w0, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR118
+	ldr	w0, [x0, #:lo12:.LANCHOR118]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2358
+	bcs	.L2464
 	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR83]
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2358
-	adrp	x0, .LANCHOR100
+	bge	.L2464
+	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w5, [x0, 8]
 	cmp	w1, w5
-	bls	.L2361
+	bls	.L2467
 	str	w1, [x0, 8]
-.L2361:
+.L2467:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2358
-.L2343:
+	b	.L2464
+.L2449:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -14653,94 +15113,94 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR83
+	adrp	x21, .LANCHOR80
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR108
+	adrp	x22, .LANCHOR105
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR100
+	adrp	x23, .LANCHOR97
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR83
+	add	x21, x21, :lo12:.LANCHOR80
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR108
+	add	x22, x22, :lo12:.LANCHOR105
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2423:
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L2529:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2424
+	bcs	.L2530
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2425
-.L2424:
+	bne	.L2531
+.L2530:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2425:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+.L2531:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2426
-	adrp	x1, .LANCHOR185
+	bne	.L2532
+	adrp	x1, .LANCHOR190
 	adrp	x0, .LC0
 	mov	w2, 230
-	add	x1, x1, :lo12:.LANCHOR185
+	add	x1, x1, :lo12:.LANCHOR190
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2426:
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
-	adrp	x27, .LANCHOR186
+.L2532:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	adrp	x27, .LANCHOR191
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR186]
+	ldr	x0, [x27, #:lo12:.LANCHOR191]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR186]
+	ldr	x3, [x27, #:lo12:.LANCHOR191]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR123
-	ldrb	w4, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR121
+	ldrb	w4, [x1, #:lo12:.LANCHOR121]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR187
-	beq	.L2427
-	ldrb	w3, [x1, #:lo12:.LANCHOR187]
-	cbz	w3, .L2428
-.L2427:
-	strb	wzr, [x1, #:lo12:.LANCHOR187]
-	b	.L2423
-.L2428:
+	adrp	x1, .LANCHOR192
+	beq	.L2533
+	ldrb	w3, [x1, #:lo12:.LANCHOR192]
+	cbz	w3, .L2534
+.L2533:
+	strb	wzr, [x1, #:lo12:.LANCHOR192]
+	b	.L2529
+.L2534:
 	cmn	w0, #1
-	bne	.L2430
+	bne	.L2536
 	mov	w1, w26
-	adrp	x0, .LC143
-	add	x0, x0, :lo12:.LC143
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	printf
-	b	.L2423
-.L2430:
+	b	.L2529
+.L2536:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2431
+	bcs	.L2537
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2431:
+.L2537:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -14756,51 +15216,51 @@ pm_write_page:
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2437
-	adrp	x2, .LANCHOR188
+	tbz	x0, 12, .L2543
+	adrp	x2, .LANCHOR193
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR188
+	add	x2, x2, :lo12:.LANCHOR193
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2437:
-	adrp	x23, .LANCHOR157
-	adrp	x20, .LANCHOR22
+.L2543:
+	adrp	x23, .LANCHOR158
+	adrp	x20, .LANCHOR26
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR157]
-	adrp	x21, .LANCHOR158
-	adrp	x22, .LANCHOR28
-	adrp	x24, .LC145
-	adrp	x25, .LANCHOR134
-	add	x22, x22, :lo12:.LANCHOR28
-	add	x24, x24, :lo12:.LC145
-	add	x25, x25, :lo12:.LANCHOR134
+	ldr	x0, [x23, #:lo12:.LANCHOR158]
+	adrp	x21, .LANCHOR159
+	adrp	x22, .LANCHOR2
+	adrp	x24, .LC147
+	adrp	x25, .LANCHOR135
+	add	x22, x22, :lo12:.LANCHOR2
+	add	x24, x24, :lo12:.LC147
+	add	x25, x25, :lo12:.LANCHOR135
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR158
-	ldr	x1, [x20, #:lo12:.LANCHOR22]
+	add	x27, x21, :lo12:.LANCHOR159
+	ldr	x1, [x20, #:lo12:.LANCHOR26]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR22]
+	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2438:
-	add	x28, x21, :lo12:.LANCHOR158
-	ldrb	w4, [x21, #:lo12:.LANCHOR158]
+.L2544:
+	add	x28, x21, :lo12:.LANCHOR159
+	ldrb	w4, [x21, #:lo12:.LANCHOR159]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -14813,40 +15273,40 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2439
-	ldr	x6, [x20, #:lo12:.LANCHOR22]
+	blt	.L2545
+	ldr	x6, [x20, #:lo12:.LANCHOR26]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR158]
+	ldrb	w0, [x21, #:lo12:.LANCHOR159]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR158]
+	strb	w7, [x21, #:lo12:.LANCHOR159]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2448:
+.L2554:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2440
-.L2443:
+	b	.L2546
+.L2549:
 	mov	w26, 1
-	b	.L2438
-.L2439:
+	b	.L2544
+.L2545:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2448
-.L2440:
-	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	cbz	w1, .L2554
+.L2546:
+	ldr	x2, [x20, #:lo12:.LANCHOR26]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR157]
+	ldr	x3, [x23, #:lo12:.LANCHOR158]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -14860,14 +15320,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2441
+	bne	.L2547
 	mov	w1, w19
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
-	b	.L2438
-.L2441:
-	cbz	w26, .L2443
+	b	.L2544
+.L2547:
+	cbz	w26, .L2549
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14885,49 +15345,62 @@ nand_flash_init:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR9
+	adrp	x21, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2450
-	adrp	x2, .LANCHOR189
+	tbz	x0, 12, .L2556
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2101
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2209
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2450:
-	adrp	x22, .LANCHOR11
-	adrp	x20, .LANCHOR40
-	add	x24, x20, :lo12:.LANCHOR40
+.L2556:
 	mov	x0, x19
-	adrp	x25, .LANCHOR35
+	adrp	x23, .LANCHOR16
 	bl	nandc_init
-	add	x25, x25, :lo12:.LANCHOR35
-	mov	x26, x24
 	adrp	x19, .LANCHOR34
-	mov	x23, 0
+	adrp	x20, .LANCHOR41
 	add	x0, x19, :lo12:.LANCHOR34
+	add	x24, x20, :lo12:.LANCHOR41
+	str	x0, [x23, #:lo12:.LANCHOR16]
+	adrp	x25, .LANCHOR35
+	adrp	x0, .LANCHOR18
+	add	x25, x25, :lo12:.LANCHOR35
+	mov	x26, x24
+	mov	w1, 1
+	mov	x22, 0
 	mov	w27, 2
-	str	x0, [x22, #:lo12:.LANCHOR11]
 	mov	w28, 44
-.L2456:
+	strb	w1, [x0, #:lo12:.LANCHOR18]
+	mov	w2, 8
+	mov	w1, 0
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	bl	ftl_memset
+	mov	w2, 32
+	mov	w1, 0
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	bl	ftl_memset
+.L2562:
 	mov	x1, x24
-	mov	w0, w23
+	mov	w0, w22
 	bl	flash_read_id
-	strb	w27, [x23, x25]
-	cbnz	x23, .L2451
+	strb	w27, [x22, x25]
+	cbnz	x22, .L2557
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2452
-.L2454:
+	bls	.L2558
+.L2560:
 	mov	w19, -2
-.L2449:
+.L2555:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14936,326 +15409,329 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2452:
+.L2558:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2454
-.L2451:
+	beq	.L2560
+.L2557:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2455
+	bne	.L2561
 	strb	w28, [x24]
-.L2455:
-	add	x23, x23, 1
+.L2561:
+	add	x22, x22, 1
 	add	x24, x24, 8
-	cmp	x23, 4
-	bne	.L2456
-	adrp	x0, .LANCHOR190
-	add	x8, x0, :lo12:.LANCHOR190
+	cmp	x22, 4
+	bne	.L2562
+	adrp	x0, .LANCHOR195
+	add	x8, x0, :lo12:.LANCHOR195
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR40
+	add	x12, x20, :lo12:.LANCHOR41
 	mov	x10, 0
-.L2459:
+.L2565:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2457
-	add	x0, x7, :lo12:.LANCHOR190
+	cbnz	w0, .L2563
+	add	x0, x7, :lo12:.LANCHOR195
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR191
-	add	x4, x1, :lo12:.LANCHOR191
+	adrp	x1, .LANCHOR196
+	add	x4, x1, :lo12:.LANCHOR196
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2458:
+.L2564:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2460
+	beq	.L2566
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2458
+	bne	.L2564
 	mov	w2, w0
-.L2460:
+.L2566:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR196
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
 	bl	ftl_memcpy
-	add	x23, x19, :lo12:.LANCHOR34
+	add	x22, x19, :lo12:.LANCHOR34
 	mov	x1, x24
-	adrp	x24, .LANCHOR24
+	adrp	x24, .LANCHOR27
 	mov	w2, 32
-	mov	x0, x23
+	mov	x0, x22
 	bl	ftl_memcpy
-	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	ldrb	w0, [x24, #:lo12:.LANCHOR27]
 	cmp	w0, 8
-	bhi	.L2461
-	ldrb	w1, [x23, 20]
+	bhi	.L2567
+	ldrb	w1, [x22, 20]
 	cmp	w1, 60
-	bls	.L2462
+	bls	.L2568
 	mov	w1, 60
-	strb	w1, [x23, 20]
-.L2462:
+	strb	w1, [x22, 20]
+.L2568:
 	cmp	w0, 8
-	bne	.L2461
-	ldrb	w0, [x20, #:lo12:.LANCHOR40]
+	bne	.L2567
+	ldrb	w0, [x20, #:lo12:.LANCHOR41]
 	cmp	w0, 44
-	bne	.L2461
+	bne	.L2567
 	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2461
+	bne	.L2567
 	strb	wzr, [x0, 28]
-.L2461:
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2463
-	adrp	x2, .LANCHOR189
+.L2567:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2569
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2122
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2233
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2463:
+.L2569:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR160
-	adrp	x25, .LANCHOR22
+	adrp	x1, .LANCHOR161
+	adrp	x22, .LANCHOR26
 	add	x20, x19, :lo12:.LANCHOR34
-	adrp	x23, .LANCHOR41
-	str	x0, [x1, #:lo12:.LANCHOR160]
+	str	x0, [x1, #:lo12:.LANCHOR161]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR150
-	str	x0, [x1, #:lo12:.LANCHOR150]
+	adrp	x1, .LANCHOR151
+	str	x0, [x1, #:lo12:.LANCHOR151]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR22]
+	str	x0, [x22, #:lo12:.LANCHOR26]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR159
-	str	x0, [x1, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR160
+	str	x0, [x1, #:lo12:.LANCHOR160]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR152
-	str	x0, [x1, #:lo12:.LANCHOR152]
+	adrp	x1, .LANCHOR153
+	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR157
-	str	x0, [x1, #:lo12:.LANCHOR157]
-	adrp	x0, .LANCHOR163
-	strb	wzr, [x0, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR158
+	str	x0, [x1, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR168
+	strb	wzr, [x0, #:lo12:.LANCHOR168]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR155
+	adrp	x20, .LANCHOR156
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR155]
-	ldr	x1, [x22, #:lo12:.LANCHOR11]
-	mov	x22, x25
+	str	xzr, [x20, #:lo12:.LANCHOR156]
+	ldr	x1, [x23, #:lo12:.LANCHOR16]
+	adrp	x23, .LANCHOR42
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
-	strb	w2, [x23, #:lo12:.LANCHOR41]
-	adrp	x2, .LANCHOR192
+	strb	w2, [x23, #:lo12:.LANCHOR42]
+	adrp	x2, .LANCHOR165
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR192]
+	strb	w3, [x2, #:lo12:.LANCHOR165]
 	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR38]
-	adrp	x2, .LANCHOR73
+	adrp	x2, .LANCHOR70
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR107
+	strb	w3, [x2, #:lo12:.LANCHOR70]
+	adrp	x2, .LANCHOR104
 	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR107]
-	adrp	x2, .LANCHOR27
-	strb	w0, [x2, #:lo12:.LANCHOR27]
+	strb	w3, [x2, #:lo12:.LANCHOR104]
+	adrp	x2, .LANCHOR1
+	strb	w0, [x2, #:lo12:.LANCHOR1]
 	mov	w2, 60
 	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR13
-	strb	w0, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR12
-	strb	w2, [x1, #:lo12:.LANCHOR12]
-	ldrb	w2, [x24, #:lo12:.LANCHOR24]
+	adrp	x1, .LANCHOR0
+	strb	w0, [x1, #:lo12:.LANCHOR0]
+	adrp	x1, .LANCHOR17
+	strb	w2, [x1, #:lo12:.LANCHOR17]
+	ldrb	w2, [x24, #:lo12:.LANCHOR27]
 	cmp	w2, 9
-	bne	.L2464
+	bne	.L2570
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR12]
-.L2464:
+	strb	w2, [x1, #:lo12:.LANCHOR17]
+.L2570:
 	add	x19, x19, :lo12:.LANCHOR34
-	adrp	x1, .LANCHOR164
-	adrp	x25, .LANCHOR19
-	strb	w0, [x1, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR169
+	adrp	x25, .LANCHOR23
+	strb	w0, [x1, #:lo12:.LANCHOR169]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x25, #:lo12:.LANCHOR19]
-	tbz	x1, 6, .L2466
+	strb	w0, [x25, #:lo12:.LANCHOR23]
+	tbz	x1, 6, .L2572
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2467
+	bhi	.L2573
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR155]
+	str	x1, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR153
-	beq	.L2468
+	adrp	x0, .LANCHOR154
+	beq	.L2574
 	mov	w1, 7
-.L2511:
-	strb	w1, [x0, #:lo12:.LANCHOR153]
-	b	.L2466
-.L2457:
+.L2618:
+	strb	w1, [x0, #:lo12:.LANCHOR154]
+	b	.L2572
+.L2563:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2459
-	b	.L2454
-.L2468:
+	bne	.L2565
+	b	.L2560
+.L2574:
 	mov	w1, 15
-	b	.L2511
-.L2467:
+	b	.L2618
+.L2573:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2470
+	bhi	.L2576
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR155]
-	adrp	x0, .LANCHOR21
+	str	x0, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR25
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR21]
-.L2513:
+	strb	w1, [x0, #:lo12:.LANCHOR25]
+.L2620:
 	mov	w1, 7
-	adrp	x0, .LANCHOR153
-	b	.L2511
-.L2470:
+	adrp	x0, .LANCHOR154
+	b	.L2618
+.L2576:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2471
+	bhi	.L2577
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR155]
+	str	x2, [x20, #:lo12:.LANCHOR156]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR153
-	beq	.L2472
+	adrp	x0, .LANCHOR154
+	beq	.L2578
 	mov	w2, 7
-.L2510:
-	strb	w2, [x0, #:lo12:.LANCHOR153]
+.L2617:
+	strb	w2, [x0, #:lo12:.LANCHOR154]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR21
-	bhi	.L2474
+	adrp	x0, .LANCHOR25
+	bhi	.L2580
 	mov	w1, 4
-.L2512:
-	strb	w1, [x0, #:lo12:.LANCHOR21]
-.L2466:
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2475
-	adrp	x2, .LANCHOR189
+.L2619:
+	strb	w1, [x0, #:lo12:.LANCHOR25]
+.L2572:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2581
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2170
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2281
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2475:
-	adrp	x24, .LANCHOR16
-	ldrb	w0, [x23, #:lo12:.LANCHOR41]
-	strb	wzr, [x24, #:lo12:.LANCHOR16]
-	tbz	x0, 0, .L2476
+.L2581:
+	adrp	x24, .LANCHOR20
+	ldrb	w0, [x23, #:lo12:.LANCHOR42]
+	strb	wzr, [x24, #:lo12:.LANCHOR20]
+	tbz	x0, 0, .L2582
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2514:
+.L2621:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2478
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2449
-	adrp	x2, .LANCHOR189
-	mov	w1, 2190
-	add	x2, x2, :lo12:.LANCHOR189
+	bne	.L2584
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2585
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2301
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-	b	.L2449
-.L2472:
+.L2585:
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
+	mov	w1, 17
+	strb	w1, [x0, 32]
+	b	.L2555
+.L2578:
 	mov	w2, 17
-	b	.L2510
-.L2474:
+	b	.L2617
+.L2580:
 	mov	w1, 5
-	b	.L2512
-.L2471:
+	b	.L2619
+.L2577:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2466
+	bhi	.L2572
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR155]
-	b	.L2513
-.L2476:
+	str	x0, [x20, #:lo12:.LANCHOR156]
+	b	.L2620
+.L2582:
 	mov	w0, 4
-	b	.L2514
-.L2478:
-	ldrb	w0, [x25, #:lo12:.LANCHOR19]
+	b	.L2621
+.L2584:
+	ldrb	w0, [x25, #:lo12:.LANCHOR23]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2479
+	bhi	.L2586
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR155]
-.L2479:
-	ldrb	w0, [x23, #:lo12:.LANCHOR41]
-	tbz	x0, 2, .L2481
-	ldr	x0, [x22, #:lo12:.LANCHOR22]
+	str	x0, [x20, #:lo12:.LANCHOR156]
+.L2586:
+	ldrb	w0, [x23, #:lo12:.LANCHOR42]
+	tbz	x0, 2, .L2588
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2481
-	adrp	x0, .LANCHOR158
-	ldrb	w1, [x0, #:lo12:.LANCHOR158]
-	adrp	x0, .LANCHOR28
-	ldrh	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L2588
+	adrp	x0, .LANCHOR159
+	ldrb	w1, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x24, #:lo12:.LANCHOR16]
-	cbnz	w0, .L2481
-	ldr	x0, [x22, #:lo12:.LANCHOR22]
+	ldrb	w0, [x24, #:lo12:.LANCHOR20]
+	cbnz	w0, .L2588
+	ldr	x0, [x22, #:lo12:.LANCHOR26]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2481:
-	ldr	w0, [x21, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2483
-	adrp	x2, .LANCHOR189
+.L2588:
+	ldr	w0, [x21, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2590
+	adrp	x2, .LANCHOR194
 	adrp	x0, .LC84
-	add	x2, x2, :lo12:.LANCHOR189
-	mov	w1, 2243
+	add	x2, x2, :lo12:.LANCHOR194
+	mov	w1, 2356
 	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2483:
+.L2590:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2449
+	b	.L2555
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -15272,31 +15748,31 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR83
+	adrp	x26, .LANCHOR80
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR108
-	adrp	x28, .LANCHOR123
+	adrp	x27, .LANCHOR105
+	adrp	x28, .LANCHOR121
 	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR83
-	add	x27, x27, :lo12:.LANCHOR108
-	add	x28, x28, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LANCHOR80
+	add	x27, x27, :lo12:.LANCHOR105
+	add	x28, x28, :lo12:.LANCHOR121
 	mov	w19, 0
-.L2516:
+.L2623:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2518
+	bhi	.L2625
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2519
-	adrp	x1, .LANCHOR193
+	cbz	w20, .L2626
+	adrp	x1, .LANCHOR197
 	adrp	x0, .LC0
 	mov	w2, 1339
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR197
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2519:
+.L2626:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -15306,7 +15782,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2518:
+.L2625:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -15335,19 +15811,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2516
+	b	.L2623
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -15355,110 +15831,110 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR50
+	adrp	x0, .LANCHOR51
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR50]
-	adrp	x0, .LC149
+	ldrb	w1, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LC151
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC149
+	add	x0, x0, :lo12:.LC151
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR100
-	adrp	x19, .LANCHOR6
-	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR97
+	adrp	x19, .LANCHOR10
+	adrp	x20, .LANCHOR80
 	bl	printf
-	adrp	x21, .LANCHOR2
-	adrp	x0, .LANCHOR174
-	add	x1, x0, :lo12:.LANCHOR174
+	adrp	x21, .LANCHOR6
+	adrp	x0, .LANCHOR179
+	add	x1, x0, :lo12:.LANCHOR179
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR174]
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	ldrb	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
 	ldrh	w2, [x1, 18]
 	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
 	ldrh	w2, [x1, 50]
 	ldrh	w1, [x1, 48]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	adrp	x19, .LANCHOR76
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	ldr	x1, [x19, #:lo12:.LANCHOR10]
+	adrp	x19, .LANCHOR73
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR114
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LC155
+	adrp	x0, .LANCHOR111
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LC157
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC155
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR5
-	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR9
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR3
-	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR7
+	ldrh	w3, [x21, #:lo12:.LANCHOR6]
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	ldr	x1, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR113
-	adrp	x0, .LC158
-	add	x1, x1, :lo12:.LANCHOR113
-	add	x0, x0, :lo12:.LC158
+	adrp	x1, .LANCHOR110
+	adrp	x0, .LC160
+	add	x1, x1, :lo12:.LANCHOR110
+	add	x0, x0, :lo12:.LC160
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR76]
+	ldrb	w0, [x19, #:lo12:.LANCHOR73]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR83]
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR112
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LC159
-	add	x0, x0, :lo12:.LC159
+	ldr	x1, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -15466,39 +15942,39 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR99
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR102]
+	ldrh	w3, [x3, #:lo12:.LANCHOR99]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR101
-	ldrb	w3, [x3, #:lo12:.LANCHOR101]
+	adrp	x3, .LANCHOR98
+	ldrb	w3, [x3, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR3
-	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	adrp	x3, .LANCHOR7
+	ldr	x3, [x3, #:lo12:.LANCHOR7]
 	add	x4, x3, x4, uxth 2
 	ldrb	w3, [x4, 2]
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2530
+	bne	.L2637
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC160
-	add	x0, x0, :lo12:.LC160
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2530:
+.L2637:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15514,113 +15990,113 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2536
-	adrp	x1, .LANCHOR194
+	bls	.L2643
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR194
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2536:
-	adrp	x22, .LANCHOR100
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+.L2643:
+	adrp	x22, .LANCHOR97
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2537
+	bcs	.L2644
 	mov	w1, w19
-	adrp	x0, .LC161
-	add	x0, x0, :lo12:.LC161
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
-	adrp	x0, .LANCHOR195
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR195]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR100]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2539
+	bcs	.L2646
 	mov	w2, 35
-.L2544:
-	adrp	x1, .LANCHOR194
+.L2651:
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR194
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2539
-.L2537:
+	b	.L2646
+.L2644:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR129
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	add	x23, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x23, 2]
-	cbnz	w21, .L2540
+	cbnz	w21, .L2647
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	bl	printf
-	adrp	x0, .LANCHOR195
+	adrp	x0, .LANCHOR199
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR195]
+	ldrh	w2, [x0, #:lo12:.LANCHOR199]
 	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2539:
+.L2646:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2540:
-	adrp	x20, .LANCHOR186
-	adrp	x24, .LANCHOR123
+.L2647:
+	adrp	x20, .LANCHOR191
+	adrp	x24, .LANCHOR121
 	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR186]
-	ldrb	w3, [x24, #:lo12:.LANCHOR123]
+	ldr	x2, [x20, #:lo12:.LANCHOR191]
+	ldrb	w3, [x24, #:lo12:.LANCHOR121]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR186]
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2541
+	beq	.L2648
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
-	adrp	x0, .LC164
-	add	x0, x0, :lo12:.LC164
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x23, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR123]
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
+	ldrb	w3, [x24, #:lo12:.LANCHOR121]
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR186]
-	adrp	x0, .LC166
+	ldr	x1, [x20, #:lo12:.LANCHOR191]
+	adrp	x0, .LC168
 	mov	w3, 16
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC166
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L2541:
-	ldr	x0, [x20, #:lo12:.LANCHOR186]
+.L2648:
+	ldr	x0, [x20, #:lo12:.LANCHOR191]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2539
+	beq	.L2646
 	mov	w2, 59
-	b	.L2544
+	b	.L2651
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15630,73 +16106,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR100
-	adrp	x19, .LANCHOR140
+	adrp	x20, .LANCHOR97
+	adrp	x19, .LANCHOR141
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR140]
+	ldrh	w0, [x19, #:lo12:.LANCHOR141]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2547
+	blt	.L2654
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR100]
-	ldrh	w1, [x19, #:lo12:.LANCHOR140]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldrh	w1, [x19, #:lo12:.LANCHOR141]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2547
+	blt	.L2654
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2549
-	adrp	x1, .LANCHOR196
-	add	x1, x1, :lo12:.LANCHOR196
+	bne	.L2656
+	adrp	x1, .LANCHOR200
+	add	x1, x1, :lo12:.LANCHOR200
 	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2549:
+.L2656:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR129
+	adrp	x1, .LANCHOR130
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR129
+	add	x2, x1, :lo12:.LANCHOR130
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2550
+	beq	.L2657
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2550
+	cbz	x1, .L2657
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2550
+	tbz	w2, #31, .L2657
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2550:
-	add	x1, x23, :lo12:.LANCHOR129
-	adrp	x25, .LANCHOR102
+.L2657:
+	add	x1, x23, :lo12:.LANCHOR130
+	adrp	x25, .LANCHOR99
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR99
 	mov	w19, 0
-.L2551:
-	ldr	x1, [x20, #:lo12:.LANCHOR100]
+.L2658:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2553
+	bhi	.L2660
 	bl	pm_free_sblk
-.L2547:
+.L2654:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -15704,7 +16180,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2553:
+.L2660:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -15715,11 +16191,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2552
+	bne	.L2659
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -15728,10 +16204,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2552:
+.L2659:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2551
+	b	.L2658
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -15740,8 +16216,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR129
-	add	x2, x2, :lo12:.LANCHOR129
+	adrp	x2, .LANCHOR130
+	add	x2, x2, :lo12:.LANCHOR130
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -15751,12 +16227,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR127
-	ldr	w0, [x19, #:lo12:.LANCHOR127]
-	cbz	w0, .L2559
+	adrp	x19, .LANCHOR128
+	ldr	w0, [x19, #:lo12:.LANCHOR128]
+	cbz	w0, .L2666
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR127]
-.L2559:
+	str	wzr, [x19, #:lo12:.LANCHOR128]
+.L2666:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15770,21 +16246,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR129
-	add	x19, x19, :lo12:.LANCHOR129
+	adrp	x19, .LANCHOR130
+	add	x19, x19, :lo12:.LANCHOR130
 	mov	w20, 0
 	add	x19, x19, 2
-.L2566:
+.L2673:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2565
+	tbz	w0, #31, .L2672
 	mov	w0, w20
 	bl	pm_flush_id
-.L2565:
+.L2672:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2566
+	bne	.L2673
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15833,74 +16309,74 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR127
+	adrp	x0, .LANCHOR128
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR129
-	str	wzr, [x0, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR187
+	adrp	x20, .LANCHOR130
+	str	wzr, [x0, #:lo12:.LANCHOR128]
+	adrp	x0, .LANCHOR192
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR129
-	strb	w1, [x0, #:lo12:.LANCHOR187]
+	add	x19, x20, :lo12:.LANCHOR130
+	strb	w1, [x0, #:lo12:.LANCHOR192]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR186
-	adrp	x22, .LANCHOR123
+	adrp	x1, .LANCHOR191
+	adrp	x22, .LANCHOR121
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR123
-	str	x0, [x1, #:lo12:.LANCHOR186]
+	add	x22, x22, :lo12:.LANCHOR121
+	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w25, -1
-.L2576:
+.L2683:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2575
+	cbz	w24, .L2682
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2575:
+.L2682:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2576
-	add	x0, x20, :lo12:.LANCHOR129
-	adrp	x19, .LANCHOR100
-	ldr	x24, [x21, #:lo12:.LANCHOR186]
+	bne	.L2683
+	add	x0, x20, :lo12:.LANCHOR130
+	adrp	x19, .LANCHOR97
+	ldr	x24, [x21, #:lo12:.LANCHOR191]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2577
+	bgt	.L2684
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
-	adrp	x27, .LANCHOR108
-	adrp	x28, .LANCHOR123
-	add	x27, x27, :lo12:.LANCHOR108
-	add	x28, x28, :lo12:.LANCHOR123
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
+	adrp	x27, .LANCHOR105
+	adrp	x28, .LANCHOR121
+	add	x27, x27, :lo12:.LANCHOR105
+	add	x28, x28, :lo12:.LANCHOR121
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2578:
+.L2685:
 	cmp	w21, w26
-	ble	.L2580
-	adrp	x0, .LANCHOR177
+	ble	.L2687
+	adrp	x0, .LANCHOR182
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR129
+	add	x20, x20, :lo12:.LANCHOR130
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR177]
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	strb	w1, [x0, #:lo12:.LANCHOR182]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -15909,7 +16385,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2577:
+.L2684:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -15920,8 +16396,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2580:
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+.L2687:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -15932,32 +16408,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2579
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2686
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2579
+	bcs	.L2686
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2579:
+.L2686:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2578
+	b	.L2685
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -15968,66 +16444,66 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR123
+	adrp	x1, .LANCHOR121
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR123]
+	ldrb	w1, [x1, #:lo12:.LANCHOR121]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
 	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR56
+	adrp	x1, .LANCHOR118
 	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR56]
+	ldr	w2, [x1, #:lo12:.LANCHOR118]
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2590
+	bcc	.L2697
 	mov	w1, w0
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
 	bl	printf
 	mov	w0, -1
-.L2589:
+.L2696:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2590:
-	adrp	x24, .LANCHOR129
-	add	x0, x24, :lo12:.LANCHOR129
+.L2697:
+	adrp	x24, .LANCHOR130
+	add	x0, x24, :lo12:.LANCHOR130
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2596:
+.L2703:
 	ldr	x1, [x0]
-	cbz	x1, .L2592
+	cbz	x1, .L2699
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2592
-.L2593:
-	cbnz	w23, .L2594
-	add	x0, x24, :lo12:.LANCHOR129
+	bne	.L2699
+.L2700:
+	cbnz	w23, .L2701
+	add	x0, x24, :lo12:.LANCHOR130
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2595:
-	add	x24, x24, :lo12:.LANCHOR129
+.L2702:
+	add	x24, x24, :lo12:.LANCHOR130
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2598
+	beq	.L2705
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2598:
+.L2705:
 	mov	w0, 0
-	b	.L2589
-.L2594:
-	add	x0, x24, :lo12:.LANCHOR129
+	b	.L2696
+.L2701:
+	add	x0, x24, :lo12:.LANCHOR130
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -16035,173 +16511,53 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR130
-	strb	w21, [x0, #:lo12:.LANCHOR130]
-	b	.L2595
-.L2592:
+	adrp	x0, .LANCHOR131
+	strb	w21, [x0, #:lo12:.LANCHOR131]
+	b	.L2702
+.L2699:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2596
+	bne	.L2703
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR129
+	add	x2, x24, :lo12:.LANCHOR130
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2597
+	beq	.L2704
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2597
+	tbz	w1, #31, .L2704
 	bl	pm_flush_id
-.L2597:
-	adrp	x0, .LANCHOR197
+.L2704:
+	adrp	x0, .LANCHOR201
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR197]
+	strb	w19, [x0, #:lo12:.LANCHOR201]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2593
+	b	.L2700
 	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.ftl_read_ahead,"ax",@progbits
-	.align	2
-	.global	ftl_read_ahead
-	.type	ftl_read_ahead, %function
-ftl_read_ahead:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR58
-	stp	x21, x22, [sp, 32]
-	ldr	w0, [x20, #:lo12:.LANCHOR58]
-	stp	x23, x24, [sp, 48]
-	cmn	w0, #1
-	beq	.L2613
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x19, x0
-	mov	w0, -1
-	cbz	x19, .L2604
-	ldr	w21, [x20, #:lo12:.LANCHOR58]
-	str	w21, [x19, 36]
-	str	w0, [x20, #:lo12:.LANCHOR58]
-	mov	w0, w21
-	ldr	x20, [x19, 8]
-	ldr	x22, [x19, 24]
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 76]
-	cmn	w0, #1
-	bne	.L2607
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w21
-	bl	pm_log2phys
-.L2607:
-	ldr	w0, [x29, 76]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L2608
-	adrp	x0, .LANCHOR123
-	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
-	mov	x0, x20
-	lsl	w2, w2, 9
-	bl	ftl_memset
-	ldrb	w0, [x19, 2]
-	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-.L2613:
-	mov	w0, 0
-.L2604:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L2608:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w23, [x19, 52]
-	cmn	w23, #1
-	bne	.L2609
-	adrp	x0, .LANCHOR6
-	ldr	x1, [x0, #:lo12:.LANCHOR6]
-	ldr	w0, [x1, 552]
-	add	w0, w0, 1
-	str	w0, [x1, 552]
-.L2610:
-	ldr	w5, [x22, 4]
-	cmp	w21, w5
-	beq	.L2611
-	ldrb	w1, [x19, 1]
-	adrp	x0, .LC171
-	ldr	w4, [x22]
-	mov	w2, w21
-	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC171
-	ldr	w3, [x29, 76]
-	bl	printf
-.L2611:
-	ldr	w0, [x22, 4]
-	cmp	w21, w0
-	bne	.L2612
-	cmn	w23, #1
-	bne	.L2613
-.L2612:
-	mov	w2, 892
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L2613
-.L2609:
-	cmp	w23, 256
-	bne	.L2610
-	adrp	x0, .LANCHOR102
-	mov	w20, 21
-	mov	w24, 1
-	ldrh	w1, [x0, #:lo12:.LANCHOR102]
-	ldr	w0, [x29, 76]
-	sub	w20, w20, w1
-	ldp	w2, w3, [x19, 36]
-	lsr	w0, w0, w1
-	lsl	w20, w24, w20
-	sub	w20, w20, #1
-	and	w20, w20, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
-	udiv	w20, w20, w0
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
-	and	w1, w20, 65535
-	bl	printf
-	mov	w2, 0
-	mov	w1, w24
-	mov	w0, w20
-	bl	gc_add_sblk
-	b	.L2610
-	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
 	.global	gc_recovery
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR71
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
-	adrp	x21, .LANCHOR6
+	adrp	x21, .LANCHOR10
 	stp	x19, x20, [sp, 48]
-	ldr	x20, [x21, #:lo12:.LANCHOR6]
-	strb	wzr, [x0, #:lo12:.LANCHOR74]
-	adrp	x0, .LANCHOR144
+	ldr	x20, [x21, #:lo12:.LANCHOR10]
+	strb	wzr, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR145
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	strb	wzr, [x0, #:lo12:.LANCHOR145]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -16210,8 +16566,8 @@ gc_recovery:
 	str	x0, [x29, 176]
 	mov	w0, 65535
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
-	beq	.L2618
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
+	beq	.L2712
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -16219,41 +16575,41 @@ gc_recovery:
 	mov	x25, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR108
-	adrp	x2, .LANCHOR71
+	adrp	x3, .LANCHOR105
+	adrp	x2, .LANCHOR68
 	sub	w0, w0, #1
 	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR108]
+	ldrh	w1, [x3, #:lo12:.LANCHOR105]
 	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR71]
+	ldrb	w0, [x2, #:lo12:.LANCHOR68]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2619
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2713
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2663:
+.L2757:
 	str	w0, [x25, 40]
-.L2620:
+.L2714:
 	mov	w1, 1
 	mov	x0, x25
 	bl	sblk_read_page
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2621
+	beq	.L2715
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2622
-.L2621:
+	beq	.L2716
+.L2715:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x1, [x25, 24]
@@ -16272,16 +16628,16 @@ gc_recovery:
 	ldr	w1, [x25, 40]
 	ldr	w2, [x25, 52]
 	bl	printf
-.L2667:
-	adrp	x0, .LANCHOR5
+.L2761:
+	adrp	x0, .LANCHOR9
 	ldrh	w1, [x20, 80]
 	mov	w28, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2623:
+.L2717:
 	ldrh	w1, [x20, 80]
 	mov	w2, w28
 	adrp	x0, .LC174
@@ -16291,22 +16647,22 @@ gc_recovery:
 	strh	w0, [x20, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2650
+	beq	.L2744
 	bl	ftl_free_sblk
-.L2650:
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+.L2744:
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	ldr	x1, [x21, #:lo12:.LANCHOR10]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2617:
+.L2711:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -16315,64 +16671,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2619:
+.L2713:
 	cmp	w0, 2
-	bne	.L2620
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	bne	.L2714
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2663
-.L2622:
-	adrp	x19, .LANCHOR75
-	adrp	x22, .LANCHOR76
-	adrp	x23, .LANCHOR146
+	b	.L2757
+.L2716:
+	adrp	x19, .LANCHOR72
+	adrp	x22, .LANCHOR73
+	adrp	x23, .LANCHOR147
 	ldr	x1, [x25, 8]
-	ldrb	w0, [x22, #:lo12:.LANCHOR76]
-	adrp	x24, .LANCHOR147
-	ldrh	w2, [x19, #:lo12:.LANCHOR75]
+	ldrb	w0, [x22, #:lo12:.LANCHOR73]
+	adrp	x24, .LANCHOR148
+	ldrh	w2, [x19, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x22, #:lo12:.LANCHOR76]
-	ldrh	w0, [x19, #:lo12:.LANCHOR75]
+	ldrb	w1, [x22, #:lo12:.LANCHOR73]
+	ldrh	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
 	ldr	x1, [x25, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x24, #:lo12:.LANCHOR147]
+	ldr	x0, [x24, #:lo12:.LANCHOR148]
 	bl	ftl_memcpy
 	str	x19, [x29, 144]
-	adrp	x0, .LANCHOR83
-	ldrh	w14, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w14, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x29, 168]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 2
-	beq	.L2624
-.L2664:
+	beq	.L2718
+.L2758:
 	str	w0, [x29, 184]
 	adrp	x26, .LC173
 	ldr	x0, [x29, 152]
 	mov	w22, 0
 	mov	w28, 0
-	add	x0, x0, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 128]
 	add	x0, x26, :lo12:.LC173
 	str	x0, [x29, 120]
-.L2626:
+.L2720:
 	sub	w0, w22, #1
 	str	w0, [x29, 188]
 	cmp	w22, w14
-	beq	.L2635
+	beq	.L2729
 	mov	x27, 0
-	b	.L2636
-.L2624:
+	b	.L2730
+.L2718:
 	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2664
-.L2632:
+	b	.L2758
+.L2726:
 	ldr	x1, [x29, 128]
 	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
@@ -16382,29 +16738,29 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2627
+	bne	.L2721
 	add	w0, w22, w0
 	orr	w0, w0, w26, lsl 24
-.L2665:
+.L2759:
 	str	w0, [x25, 40]
 	mov	w1, 1
 	str	w14, [x29, 112]
 	mov	x0, x25
 	bl	sblk_read_page
-	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
 	ldr	w3, [x0, x19]
 	ldr	x0, [x25, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2630
-	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	bne	.L2724
+	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x1, x19]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2631
-.L2630:
-	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	beq	.L2725
+.L2724:
+	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
 	str	w14, [x29, 112]
@@ -16415,84 +16771,84 @@ gc_recovery:
 	ldr	w2, [x25, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
 	ldr	w14, [x29, 112]
 	ldr	w0, [x0, x19]
 	cmn	w0, #1
-	beq	.L2631
+	beq	.L2725
 	mov	x0, x25
 	bl	buf_free
-	b	.L2667
-.L2627:
+	b	.L2761
+.L2721:
 	cmp	w1, 2
-	bne	.L2629
+	bne	.L2723
 	ldr	w1, [x29, 188]
 	add	w0, w0, w1
 	add	w0, w0, w26
 	orr	w0, w0, 33554432
-	b	.L2665
-.L2629:
+	b	.L2759
+.L2723:
 	add	w0, w22, w0
-	b	.L2665
-.L2631:
+	b	.L2759
+.L2725:
 	add	w28, w28, 1
 	add	w26, w26, 1
 	add	x19, x19, 4
-.L2634:
+.L2728:
 	ldr	w0, [x29, 184]
 	cmp	w0, w26
-	bcs	.L2632
+	bcs	.L2726
 	add	x27, x27, 1
-.L2636:
+.L2730:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w27
-	ble	.L2633
+	ble	.L2727
 	add	x0, x20, x27, lsl 1
 	str	x0, [x29, 160]
 	ldr	x0, [x29, 168]
 	sbfiz	x19, x28, 2, 32
 	mov	w26, 1
-	add	x0, x0, :lo12:.LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR68
 	str	x0, [x29, 136]
-	b	.L2634
-.L2633:
+	b	.L2728
+.L2727:
 	add	w22, w22, 1
-	b	.L2626
-.L2635:
+	b	.L2720
+.L2729:
 	mov	x0, x25
 	bl	buf_free
 	ldr	x3, [x29, 144]
-	adrp	x25, .LANCHOR5
+	adrp	x25, .LANCHOR9
 	ldr	x0, [x29, 176]
 	mov	w28, 0
 	ldrh	w2, [x20, 80]
 	mov	w27, 0
-	ldr	x1, [x25, #:lo12:.LANCHOR5]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	ldr	x1, [x25, #:lo12:.LANCHOR9]
+	ldrh	w3, [x3, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, 9]
 	str	x25, [x29, 144]
 	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2637:
+.L2731:
 	sub	w0, w27, #1
 	str	w0, [x29, 136]
 	cmp	w22, w27
-	beq	.L2648
+	beq	.L2742
 	mov	x26, 0
-	b	.L2649
-.L2645:
+	b	.L2743
+.L2739:
 	ldr	w0, [x29, 188]
-	ldr	x1, [x23, #:lo12:.LANCHOR146]
+	ldr	x1, [x23, #:lo12:.LANCHOR147]
 	sbfiz	x0, x0, 2, 32
 	ldr	w6, [x1, x0]
 	cmn	w6, #1
-	beq	.L2638
-	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	beq	.L2732
+	ldr	x1, [x24, #:lo12:.LANCHOR148]
 	str	w6, [x29, 108]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 160]
@@ -16501,26 +16857,26 @@ gc_recovery:
 	str	w0, [x29, 204]
 	cmn	w0, #1
 	ldr	w6, [x29, 108]
-	bne	.L2639
+	bne	.L2733
 	mov	w0, w6
 	str	w6, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
 	bl	pm_log2phys
 	ldr	w6, [x29, 108]
-.L2639:
+.L2733:
 	ldr	x0, [x29, 128]
 	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 168]
-	ldrb	w1, [x1, #:lo12:.LANCHOR71]
+	ldrb	w1, [x1, #:lo12:.LANCHOR68]
 	cmp	w1, 3
-	bne	.L2640
+	bne	.L2734
 	add	w0, w27, w0
 	orr	w0, w0, w25, lsl 24
-.L2666:
+.L2760:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 112]
@@ -16538,96 +16894,96 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2643
+	bne	.L2737
 	add	x1, x29, 200
 	mov	w0, w6
 	bl	pm_log2phys
 	add	w28, w28, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2644:
+.L2738:
 	ldr	w0, [x29, 188]
 	add	w0, w0, 1
 	str	w0, [x29, 188]
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR7
+	ldr	x0, [x0, #:lo12:.LANCHOR7]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2638
+	bne	.L2732
 	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2638
+	cbz	w1, .L2732
 	strh	wzr, [x0, x19]
-.L2638:
+.L2732:
 	add	w25, w25, 1
-.L2647:
+.L2741:
 	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2645
+	bcs	.L2739
 	add	x26, x26, 1
-.L2649:
+.L2743:
 	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w26
-	ble	.L2646
+	ble	.L2740
 	add	x0, x20, x26, lsl 1
 	mov	w25, 1
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR101
-	add	x0, x0, :lo12:.LANCHOR101
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
 	str	x0, [x29, 120]
-	b	.L2647
-.L2640:
+	b	.L2741
+.L2734:
 	cmp	w1, 2
-	bne	.L2642
+	bne	.L2736
 	ldr	w1, [x29, 136]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2666
-.L2642:
+	b	.L2760
+.L2736:
 	add	w0, w27, w0
-	b	.L2666
-.L2643:
+	b	.L2760
+.L2737:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w28, w28, eq
-	b	.L2644
-.L2646:
+	b	.L2738
+.L2740:
 	add	w27, w27, 1
-	b	.L2637
-.L2648:
+	b	.L2731
+.L2742:
 	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	strh	w28, [x0, x1, lsl 1]
-	b	.L2623
-.L2618:
+	b	.L2717
+.L2712:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2617
-	adrp	x19, .LANCHOR100
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	beq	.L2711
+	adrp	x19, .LANCHOR97
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2652
+	bne	.L2746
 	bl	pm_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2652:
-	ldr	x0, [x21, #:lo12:.LANCHOR6]
+.L2746:
+	ldr	x0, [x21, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2617
+	b	.L2711
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16635,351 +16991,355 @@ gc_recovery:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR56
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR54]
-	adrp	x1, .LANCHOR55
+	strb	w0, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR57
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR83
-	strb	wzr, [x1, #:lo12:.LANCHOR55]
-	adrp	x1, .LANCHOR169
+	adrp	x22, .LANCHOR80
+	strb	wzr, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR124
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR76
-	strb	w0, [x1, #:lo12:.LANCHOR169]
-	adrp	x0, .LANCHOR121
-	mov	w1, -1
+	adrp	x21, .LANCHOR73
+	strb	w0, [x1, #:lo12:.LANCHOR124]
+	adrp	x1, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR58
+	adrp	x20, .LANCHOR199
+	strb	wzr, [x1, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR174
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR2
-	str	w1, [x0, #:lo12:.LANCHOR58]
-	adrp	x1, .LC175
+	adrp	x23, .LANCHOR6
+	strb	w0, [x1, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR119
+	mov	w1, -1
 	stp	x27, x28, [sp, 80]
-	add	x1, x1, :lo12:.LC175
+	strb	wzr, [x0, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR202
+	str	w1, [x0, #:lo12:.LANCHOR202]
+	adrp	x1, .LC175
 	adrp	x0, .LC91
+	add	x1, x1, :lo12:.LC175
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-	adrp	x20, .LANCHOR195
 	adrp	x1, .LANCHOR34
 	add	x1, x1, :lo12:.LANCHOR34
-	adrp	x0, .LANCHOR71
-	adrp	x2, .LANCHOR123
-	adrp	x3, .LANCHOR75
-	adrp	x4, .LANCHOR101
+	adrp	x0, .LANCHOR68
+	adrp	x2, .LANCHOR121
+	adrp	x3, .LANCHOR72
+	adrp	x4, .LANCHOR98
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR71]
+	strb	w5, [x0, #:lo12:.LANCHOR68]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR123]
+	strb	w0, [x2, #:lo12:.LANCHOR121]
 	ldrh	w2, [x1, 10]
-	strh	w2, [x3, #:lo12:.LANCHOR75]
-	adrp	x3, .LANCHOR14
+	strh	w2, [x3, #:lo12:.LANCHOR72]
+	adrp	x3, .LANCHOR18
 	ldrh	w7, [x1, 14]
 	ubfiz	w10, w0, 9, 7
-	ldrb	w6, [x3, #:lo12:.LANCHOR14]
-	adrp	x3, .LANCHOR109
+	ldrb	w6, [x3, #:lo12:.LANCHOR18]
+	adrp	x3, .LANCHOR106
 	sdiv	w8, w2, w5
-	strh	w7, [x23, #:lo12:.LANCHOR2]
-	strb	w6, [x3, #:lo12:.LANCHOR109]
+	strh	w7, [x23, #:lo12:.LANCHOR6]
+	strb	w6, [x3, #:lo12:.LANCHOR106]
 	ldrb	w3, [x1, 13]
-	adrp	x1, .LANCHOR28
-	strb	w3, [x4, #:lo12:.LANCHOR101]
-	ldrh	w4, [x1, #:lo12:.LANCHOR28]
-	adrp	x1, .LANCHOR108
-	strh	w8, [x22, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR2
+	strb	w3, [x4, #:lo12:.LANCHOR98]
+	ldrh	w4, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR105
+	strh	w8, [x22, #:lo12:.LANCHOR80]
 	mul	w6, w6, w3
-	strh	w4, [x1, #:lo12:.LANCHOR108]
-	strh	w10, [x20, #:lo12:.LANCHOR195]
+	strh	w4, [x1, #:lo12:.LANCHOR105]
+	strh	w10, [x20, #:lo12:.LANCHOR199]
 	mov	w3, 1
 	and	w6, w6, 255
 	mov	w1, 0
-	strb	w6, [x21, #:lo12:.LANCHOR76]
-.L2669:
+	strb	w6, [x21, #:lo12:.LANCHOR73]
+.L2763:
 	cmp	w4, w3
-	bcs	.L2670
+	bcs	.L2764
 	mul	w2, w0, w2
-	adrp	x3, .LANCHOR102
+	adrp	x3, .LANCHOR99
 	sub	w1, w1, #1
 	mov	w4, 0
-	strh	w1, [x3, #:lo12:.LANCHOR102]
+	strh	w1, [x3, #:lo12:.LANCHOR99]
 	mov	w1, 1
 	mul	w3, w2, w7
 	lsr	w11, w3, 21
-.L2671:
+.L2765:
 	cmp	w11, w1
-	bcs	.L2672
+	bcs	.L2766
 	mov	w1, 57344
 	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
 	mul	w3, w3, w6
-	adrp	x28, .LANCHOR56
+	adrp	x28, .LANCHOR118
 	sub	w11, w10, #1
 	mul	w1, w6, w1
-	adrp	x24, .LANCHOR182
+	adrp	x24, .LANCHOR187
 	mul	w8, w8, w6
-	adrp	x27, .LANCHOR200
+	adrp	x27, .LANCHOR204
 	mul	w2, w2, w6
-	adrp	x26, .LANCHOR140
+	adrp	x26, .LANCHOR141
 	lsl	w1, w1, w4
-	adrp	x4, .LANCHOR61
+	adrp	x4, .LANCHOR58
 	sub	w2, w2, #1
-	adrp	x25, .LANCHOR87
-	str	w1, [x4, #:lo12:.LANCHOR61]
-	adrp	x4, .LANCHOR199
-	str	w3, [x4, #:lo12:.LANCHOR199]
+	adrp	x25, .LANCHOR84
+	str	w1, [x4, #:lo12:.LANCHOR58]
+	adrp	x4, .LANCHOR203
+	str	w3, [x4, #:lo12:.LANCHOR203]
 	add	w3, w1, 24576
-	str	w3, [x27, #:lo12:.LANCHOR200]
+	str	w3, [x27, #:lo12:.LANCHOR204]
 	udiv	w0, w3, w0
 	udiv	w3, w3, w2
-	adrp	x2, .LANCHOR104
-	str	w0, [x28, #:lo12:.LANCHOR56]
+	adrp	x2, .LANCHOR101
+	str	w0, [x28, #:lo12:.LANCHOR118]
 	add	w0, w11, w0, lsl 2
 	add	w3, w3, 8
 	udiv	w0, w0, w10
-	strh	w0, [x24, #:lo12:.LANCHOR182]
+	strh	w0, [x24, #:lo12:.LANCHOR187]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w8
-	adrp	x8, .LANCHOR91
+	adrp	x8, .LANCHOR88
 	str	x8, [x29, 104]
-	strh	w3, [x8, #:lo12:.LANCHOR91]
-	strh	w0, [x26, #:lo12:.LANCHOR140]
+	strh	w3, [x8, #:lo12:.LANCHOR88]
+	strh	w0, [x26, #:lo12:.LANCHOR141]
 	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR104]
+	strh	w0, [x2, #:lo12:.LANCHOR101]
 	lsr	w0, w7, 4
-	strh	w0, [x25, #:lo12:.LANCHOR87]
+	strh	w0, [x25, #:lo12:.LANCHOR84]
 	cmp	w0, 79
-	bhi	.L2673
+	bhi	.L2767
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR87]
-.L2673:
-	adrp	x7, .LANCHOR105
+	strh	w0, [x25, #:lo12:.LANCHOR84]
+.L2767:
+	adrp	x7, .LANCHOR102
 	mov	w0, 2000
-	adrp	x3, .LANCHOR103
-	adrp	x6, .LANCHOR139
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	adrp	x3, .LANCHOR100
+	adrp	x6, .LANCHOR140
+	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 50
-	adrp	x2, .LANCHOR138
-	strh	w0, [x3, #:lo12:.LANCHOR103]
+	adrp	x2, .LANCHOR139
+	strh	w0, [x3, #:lo12:.LANCHOR100]
 	mov	w0, 256
-	strh	w0, [x6, #:lo12:.LANCHOR139]
+	strh	w0, [x6, #:lo12:.LANCHOR140]
 	mov	w0, 48
-	strh	w0, [x2, #:lo12:.LANCHOR138]
-	adrp	x0, .LANCHOR4
+	strh	w0, [x2, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR8
 	mov	w8, 32
 	cmp	w5, 2
-	strh	w8, [x0, #:lo12:.LANCHOR4]
-	beq	.L2674
-	adrp	x5, .LANCHOR73
-	ldrb	w5, [x5, #:lo12:.LANCHOR73]
-	cbz	w5, .L2675
-.L2674:
+	strh	w8, [x0, #:lo12:.LANCHOR8]
+	beq	.L2768
+	adrp	x5, .LANCHOR70
+	ldrb	w5, [x5, #:lo12:.LANCHOR70]
+	cbz	w5, .L2769
+.L2768:
 	mov	w5, 150
-	strh	w5, [x3, #:lo12:.LANCHOR103]
+	strh	w5, [x3, #:lo12:.LANCHOR100]
 	mov	w3, 64
-	strh	w3, [x2, #:lo12:.LANCHOR138]
+	strh	w3, [x2, #:lo12:.LANCHOR139]
 	mov	w2, 12
-	strh	w2, [x0, #:lo12:.LANCHOR4]
-	adrp	x2, .LANCHOR13
-	ldrb	w2, [x2, #:lo12:.LANCHOR13]
-	cbnz	w2, .L2675
+	strh	w2, [x0, #:lo12:.LANCHOR8]
+	adrp	x2, .LANCHOR0
+	ldrb	w2, [x2, #:lo12:.LANCHOR0]
+	cbnz	w2, .L2769
 	mov	w2, 4
-	strh	w2, [x0, #:lo12:.LANCHOR4]
+	strh	w2, [x0, #:lo12:.LANCHOR8]
 	mov	w0, 600
-	strh	w0, [x7, #:lo12:.LANCHOR105]
+	strh	w0, [x7, #:lo12:.LANCHOR102]
 	mov	w0, 128
-	strh	w0, [x6, #:lo12:.LANCHOR139]
-.L2675:
-	adrp	x19, .LANCHOR9
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2677
+	strh	w0, [x6, #:lo12:.LANCHOR140]
+.L2769:
+	adrp	x19, .LANCHOR14
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2771
 	str	x4, [x29, 96]
 	adrp	x0, .LC176
 	add	x0, x0, :lo12:.LC176
 	bl	printf
 	ldr	x4, [x29, 96]
-.L2677:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2678
-	ldr	w1, [x4, #:lo12:.LANCHOR199]
+.L2771:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2772
+	ldr	w1, [x4, #:lo12:.LANCHOR203]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2678:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2679
-	ldr	w1, [x28, #:lo12:.LANCHOR56]
+.L2772:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2773
+	ldr	w1, [x28, #:lo12:.LANCHOR118]
 	adrp	x0, .LC178
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2679:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2680
-	ldr	w1, [x27, #:lo12:.LANCHOR200]
+.L2773:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2774
+	ldr	w1, [x27, #:lo12:.LANCHOR204]
 	adrp	x0, .LC179
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2680:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2681
-	ldrh	w1, [x24, #:lo12:.LANCHOR182]
+.L2774:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2775
+	ldrh	w1, [x24, #:lo12:.LANCHOR187]
 	adrp	x0, .LC180
 	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2681:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2682
-	ldrh	w1, [x20, #:lo12:.LANCHOR195]
+.L2775:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2776
+	ldrh	w1, [x20, #:lo12:.LANCHOR199]
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2682:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2683
-	ldrh	w1, [x26, #:lo12:.LANCHOR140]
+.L2776:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2777
+	ldrh	w1, [x26, #:lo12:.LANCHOR141]
 	adrp	x0, .LC182
 	add	x0, x0, :lo12:.LC182
 	bl	printf
-.L2683:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2684
-	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+.L2777:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2778
+	ldrh	w1, [x25, #:lo12:.LANCHOR84]
 	adrp	x0, .LC183
 	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2684:
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2685
+.L2778:
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2779
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LC184
 	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2685:
+.L2779:
 	bl	buf_init
-	adrp	x25, .LANCHOR6
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	adrp	x25, .LANCHOR10
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR0
-	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrb	w1, [x21, #:lo12:.LANCHOR76]
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	adrp	x1, .LANCHOR4
+	str	x0, [x1, #:lo12:.LANCHOR4]
+	ldrb	w1, [x21, #:lo12:.LANCHOR73]
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR115
+	adrp	x1, .LANCHOR112
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR114
-	ldrh	w1, [x22, #:lo12:.LANCHOR83]
-	str	x2, [x0, #:lo12:.LANCHOR114]
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	str	x0, [x1, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR111
+	ldrh	w1, [x22, #:lo12:.LANCHOR80]
+	str	x2, [x0, #:lo12:.LANCHOR111]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR5
+	adrp	x1, .LANCHOR9
 	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR5]
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	str	x3, [x1, #:lo12:.LANCHOR9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
 	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR6]
-	tbz	x0, 12, .L2686
+	str	x1, [x25, #:lo12:.LANCHOR10]
+	tbz	x0, 12, .L2780
 	adrp	x0, .LC185
 	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2686:
-	ldrh	w0, [x22, #:lo12:.LANCHOR83]
-	ldrb	w21, [x21, #:lo12:.LANCHOR76]
-	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	ldrh	w22, [x24, #:lo12:.LANCHOR182]
+.L2780:
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w21, [x21, #:lo12:.LANCHOR73]
+	ldrh	w1, [x23, #:lo12:.LANCHOR6]
+	ldrh	w22, [x24, #:lo12:.LANCHOR187]
 	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	ldr	w0, [x19, #:lo12:.LANCHOR14]
 	add	w21, w1, w21, lsl 2
 	lsl	w1, w1, 2
 	lsl	w21, w21, 1
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2687
-	ldrh	w3, [x20, #:lo12:.LANCHOR195]
+	tbz	x0, 12, .L2781
+	ldrh	w3, [x20, #:lo12:.LANCHOR199]
 	adrp	x0, .LC186
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC186
 	bl	printf
-.L2687:
-	ldrh	w0, [x20, #:lo12:.LANCHOR195]
+.L2781:
+	ldrh	w0, [x20, #:lo12:.LANCHOR199]
 	cmp	w21, w0
-	bhi	.L2688
+	bhi	.L2782
 	cmp	w22, w0
-	bls	.L2689
-.L2688:
-.L2732:
-	b	.L2732
-.L2670:
+	bls	.L2783
+.L2782:
+.L2826:
+	b	.L2826
+.L2764:
 	add	w1, w1, 1
 	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2669
-.L2672:
+	b	.L2763
+.L2766:
 	add	w4, w4, 1
 	lsl	w1, w1, 1
 	and	w4, w4, 65535
-	b	.L2671
-.L2689:
+	b	.L2765
+.L2783:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2668
+	beq	.L2762
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR100
+	adrp	x19, .LANCHOR97
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR6]
+	ldr	x0, [x25, #:lo12:.LANCHOR10]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR177
-	ldrb	w0, [x0, #:lo12:.LANCHOR177]
-	cbz	w0, .L2691
-	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR182
+	ldrb	w0, [x0, #:lo12:.LANCHOR182]
+	cbz	w0, .L2785
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2691:
+.L2785:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2668:
+.L2762:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16997,9 +17357,9 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2736
+	cbnz	w0, .L2830
 	bl	zftl_init
-.L2736:
+.L2830:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
@@ -17017,69 +17377,69 @@ rk_ftl_init:
 	.type	gc_update_l2p_map_new, %function
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR6
-	adrp	x1, .LANCHOR75
+	adrp	x0, .LANCHOR10
+	adrp	x1, .LANCHOR72
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	x21, [x0, #:lo12:.LANCHOR6]
+	ldr	x21, [x0, #:lo12:.LANCHOR10]
 	stp	x25, x26, [sp, 64]
-	ldrh	w26, [x1, #:lo12:.LANCHOR75]
+	ldrh	w26, [x1, #:lo12:.LANCHOR72]
 	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR9
+	adrp	x24, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x27, x28, [sp, 80]
 	stp	x0, x1, [x29, 128]
 	ldrb	w1, [x1, 9]
 	mul	w26, w26, w1
-	ldr	w1, [x24, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L2739
+	ldr	w1, [x24, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L2833
 	ldrh	w1, [x21, 80]
 	adrp	x0, .LC188
 	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2739:
-	adrp	x23, .LANCHOR5
+.L2833:
+	adrp	x23, .LANCHOR9
 	ldrh	w1, [x21, 80]
 	sub	w2, w26, #1
 	mov	x22, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR123
-	add	x0, x0, :lo12:.LANCHOR123
+	adrp	x0, .LANCHOR121
+	add	x0, x0, :lo12:.LANCHOR121
 	str	x0, [x29, 104]
-.L2740:
+.L2834:
 	mov	w28, w22
 	cmp	w26, w22
-	bhi	.L2750
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2751
+	bhi	.L2844
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2845
 	ldr	x0, [x29, 128]
 	mov	w3, w25
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	ldr	x1, [x23, #:lo12:.LANCHOR9]
 	ldrh	w2, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
 	adrp	x0, .LC191
 	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2751:
+.L2845:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w25, w0
-	beq	.L2752
-	adrp	x1, .LANCHOR201
+	beq	.L2846
+	adrp	x1, .LANCHOR205
 	adrp	x0, .LC0
 	mov	w2, 483
-	add	x1, x1, :lo12:.LANCHOR201
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2752:
+.L2846:
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR9]
 	strh	w25, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 80]
 	bl	zftl_insert_data_list
@@ -17090,27 +17450,27 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2750:
-	adrp	x27, .LANCHOR146
+.L2844:
+	adrp	x27, .LANCHOR147
 	lsl	x19, x22, 2
-	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2741
-	adrp	x0, .LANCHOR123
-	ldrb	w20, [x0, #:lo12:.LANCHOR123]
+	beq	.L2835
+	adrp	x0, .LANCHOR121
+	ldrb	w20, [x0, #:lo12:.LANCHOR121]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w0, w20, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2742
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2836
 	ldr	w1, [x29, 156]
 	adrp	x0, .LC189
 	mov	w3, w22
 	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2742:
+.L2836:
 	sub	w28, w26, w28
 	add	x28, x28, x22
 	lsl	x0, x28, 2
@@ -17118,49 +17478,49 @@ gc_update_l2p_map_new:
 	adrp	x0, .LC190
 	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR102
-	add	x0, x0, :lo12:.LANCHOR102
+	adrp	x0, .LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 112]
-.L2743:
+.L2837:
 	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2749
-.L2741:
+	bne	.L2843
+.L2835:
 	add	x22, x22, 1
-	b	.L2740
-.L2749:
-	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	b	.L2834
+.L2843:
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	ldr	w20, [x0, x19]
 	cmn	w20, #1
-	beq	.L2744
+	beq	.L2838
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2744
-	adrp	x0, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	bne	.L2838
+	adrp	x0, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w28, [x0, x19]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2745
+	bne	.L2839
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w20
 	bl	pm_log2phys
-.L2745:
+.L2839:
 	ldr	w3, [x29, 172]
 	cmp	w28, w3
-	bne	.L2746
-	adrp	x0, .LANCHOR148
+	bne	.L2840
+	adrp	x0, .LANCHOR149
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w25, w25, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR148]
+	ldr	x0, [x0, #:lo12:.LANCHOR149]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w20
@@ -17174,28 +17534,28 @@ gc_update_l2p_map_new:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w28, w0, w28
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w0, w28, w0
-.L2772:
+.L2866:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	ldr	x0, [x27, #:lo12:.LANCHOR147]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2744:
+.L2838:
 	add	x19, x19, 4
-	b	.L2743
-.L2746:
-	ldr	w0, [x24, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2748
+	b	.L2837
+.L2840:
+	ldr	w0, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2842
 	ldr	x0, [x29, 120]
 	mov	w2, w28
 	mov	w1, w20
 	bl	printf
-.L2748:
+.L2842:
 	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	b	.L2772
+	b	.L2866
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -17208,70 +17568,70 @@ gc_scan_src_blk_one_page:
 	mov	w7, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR65
-	add	x1, x19, :lo12:.LANCHOR65
+	adrp	x19, .LANCHOR62
+	add	x1, x19, :lo12:.LANCHOR62
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR76
-	ldrb	w4, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	ldrb	w4, [x2, #:lo12:.LANCHOR73]
 	ldrh	w2, [x1, 2]
-.L2774:
+.L2868:
 	cmp	w3, w7
-	beq	.L2776
-	cbz	w6, .L2777
-	add	x1, x19, :lo12:.LANCHOR65
+	beq	.L2870
+	cbz	w6, .L2871
+	add	x1, x19, :lo12:.LANCHOR62
 	strb	w0, [x1, 4]
-.L2777:
-	cbz	w5, .L2778
-	add	x0, x19, :lo12:.LANCHOR65
+.L2871:
+	cbz	w5, .L2872
+	add	x0, x19, :lo12:.LANCHOR62
 	strh	w2, [x0, 2]
-.L2778:
-	adrp	x0, .LANCHOR108
-	ldrh	w22, [x0, #:lo12:.LANCHOR108]
-	adrp	x0, .LANCHOR71
+.L2872:
+	adrp	x0, .LANCHOR105
+	ldrh	w22, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR68
 	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR71]
+	ldrb	w1, [x0, #:lo12:.LANCHOR68]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2779
-	add	x0, x19, :lo12:.LANCHOR65
+	bne	.L2873
+	add	x0, x19, :lo12:.LANCHOR62
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2779
+	cbnz	w1, .L2873
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2780:
-	add	x1, x19, :lo12:.LANCHOR65
+.L2874:
+	add	x1, x19, :lo12:.LANCHOR62
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2781
+	bne	.L2875
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2781:
+.L2875:
 	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR65
+	add	x19, x19, :lo12:.LANCHOR62
 	bl	buf_alloc
-	add	x23, x23, :lo12:.LANCHOR71
+	add	x23, x23, :lo12:.LANCHOR68
 	mov	x21, x0
 	mov	w20, 0
-	adrp	x24, .LANCHOR68
-.L2791:
+	adrp	x24, .LANCHOR65
+.L2885:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2782
-	cbz	w20, .L2783
-.L2782:
+	bne	.L2876
+	cbz	w20, .L2877
+.L2876:
 	cmp	w0, w20
-	bgt	.L2784
-.L2792:
+	bgt	.L2878
+.L2886:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -17280,33 +17640,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2776:
+.L2870:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2775
+	bne	.L2869
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2775:
+.L2869:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2774
-.L2779:
-	add	x0, x19, :lo12:.LANCHOR65
+	b	.L2868
+.L2873:
+	add	x0, x19, :lo12:.LANCHOR62
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2780
-.L2784:
+	b	.L2874
+.L2878:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2785
-	cbnz	w0, .L2785
+	bne	.L2879
+	cbnz	w0, .L2879
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2805:
+.L2899:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -17314,40 +17674,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2788
+	beq	.L2882
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2789
+	bne	.L2883
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2789:
+.L2883:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2788
+	bne	.L2882
 	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR68]
+	ldr	x2, [x24, #:lo12:.LANCHOR65]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2788:
+.L2882:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2783:
+.L2877:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2791
-	b	.L2792
-.L2785:
+	bne	.L2885
+	b	.L2886
+.L2879:
 	orr	w0, w22, w20, lsl 24
-	b	.L2805
+	b	.L2899
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17358,118 +17718,118 @@ gc_scan_src_blk:
 	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR65
+	adrp	x19, .LANCHOR62
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2807
-	adrp	x1, .LANCHOR202
+	bne	.L2901
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 920
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2807:
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+.L2901:
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2827
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L2809
-	adrp	x2, .LANCHOR5
+	beq	.L2921
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L2903
+	adrp	x2, .LANCHOR9
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR9]
 	ldrh	w2, [x2, x0]
 	adrp	x0, .LC192
 	add	x0, x0, :lo12:.LC192
 	bl	printf
-.L2809:
-	ldrh	w0, [x19, #:lo12:.LANCHOR65]
-	add	x14, x19, :lo12:.LANCHOR65
+.L2903:
+	ldrh	w0, [x19, #:lo12:.LANCHOR62]
+	add	x14, x19, :lo12:.LANCHOR62
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2810
+	cbnz	w1, .L2904
 	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR65]
-.L2827:
+	strh	w0, [x19, #:lo12:.LANCHOR62]
+.L2921:
 	mov	w0, 0
-	b	.L2806
-.L2810:
-	adrp	x4, .LANCHOR3
-	ldrh	w3, [x19, #:lo12:.LANCHOR65]
+	b	.L2900
+.L2904:
+	adrp	x4, .LANCHOR7
+	ldrh	w3, [x19, #:lo12:.LANCHOR62]
 	mov	x22, x4
-	ldr	x1, [x4, #:lo12:.LANCHOR3]
+	ldr	x1, [x4, #:lo12:.LANCHOR7]
 	mov	x2, x3
 	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2811
+	beq	.L2905
 	cmp	w1, 224
-	beq	.L2811
-	cbz	w1, .L2812
-	adrp	x1, .LANCHOR6
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	beq	.L2905
+	cbz	w1, .L2906
+	adrp	x1, .LANCHOR10
+	ldr	x1, [x1, #:lo12:.LANCHOR10]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2811
+	beq	.L2905
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2811
+	beq	.L2905
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2841
-.L2811:
-	add	x0, x19, :lo12:.LANCHOR65
+	bne	.L2935
+.L2905:
+	add	x0, x19, :lo12:.LANCHOR62
 	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR65]
+	strh	w1, [x19, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, 24]
-	b	.L2827
-.L2812:
-	adrp	x0, .LANCHOR5
+	b	.L2921
+.L2906:
+	adrp	x0, .LANCHOR9
 	mov	x20, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2814
-	adrp	x1, .LANCHOR202
+	cbz	w1, .L2908
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 940
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2814:
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
+.L2908:
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	ldr	x0, [x20, #:lo12:.LANCHOR9]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2811
-.L2841:
+	b	.L2905
+.L2935:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2815
-	adrp	x1, .LANCHOR202
+	bne	.L2909
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2815:
-	adrp	x1, .LANCHOR108
-	ldr	x3, [x22, #:lo12:.LANCHOR3]
-	adrp	x2, .LANCHOR83
-	adrp	x23, .LANCHOR75
-	ldrh	w20, [x1, #:lo12:.LANCHOR108]
+.L2909:
+	adrp	x1, .LANCHOR105
+	ldr	x3, [x22, #:lo12:.LANCHOR7]
+	adrp	x2, .LANCHOR80
+	adrp	x23, .LANCHOR72
+	ldrh	w20, [x1, #:lo12:.LANCHOR105]
 	mov	x24, x2
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
-	ldrh	w0, [x2, #:lo12:.LANCHOR83]
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	ldrh	w0, [x2, #:lo12:.LANCHOR80]
 	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
@@ -17477,15 +17837,15 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2828
-	adrp	x1, .LANCHOR71
-	ldrb	w21, [x1, #:lo12:.LANCHOR71]
+	bne	.L2922
+	adrp	x1, .LANCHOR68
+	ldrb	w21, [x1, #:lo12:.LANCHOR68]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2817
+	beq	.L2911
 	and	w21, w21, 65535
-.L2816:
-	add	x22, x19, :lo12:.LANCHOR65
+.L2910:
+	add	x22, x19, :lo12:.LANCHOR62
 	orr	w20, w0, w20
 	mov	w0, 1
 	strb	w21, [x22, 6]
@@ -17496,106 +17856,106 @@ gc_scan_src_blk:
 	str	w20, [x0, 40]
 	mov	x25, x0
 	mov	w1, 1
-	adrp	x20, .LANCHOR68
+	adrp	x20, .LANCHOR65
 	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR75]
-	adrp	x23, .LANCHOR76
+	ldrh	w2, [x23, #:lo12:.LANCHOR72]
+	adrp	x23, .LANCHOR73
 	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	ldrb	w0, [x23, #:lo12:.LANCHOR73]
 	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR68]
+	ldr	x0, [x20, #:lo12:.LANCHOR65]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2818
-.L2843:
+	bne	.L2912
+.L2937:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2806:
+.L2900:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2817:
-	ldrh	w0, [x23, #:lo12:.LANCHOR75]
+.L2911:
+	ldrh	w0, [x23, #:lo12:.LANCHOR72]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2816
-.L2828:
+	b	.L2910
+.L2922:
 	mov	w21, 1
-	b	.L2816
-.L2818:
+	b	.L2910
+.L2912:
 	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2819
+	beq	.L2913
 	mov	w2, 980
-	adrp	x1, .LANCHOR202
+	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR202
+	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2843
-.L2819:
-	ldrb	w0, [x23, #:lo12:.LANCHOR76]
-	adrp	x22, .LANCHOR102
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	adrp	x23, .LANCHOR101
+	b	.L2937
+.L2913:
+	ldrb	w0, [x23, #:lo12:.LANCHOR73]
+	adrp	x22, .LANCHOR99
+	ldrh	w1, [x24, #:lo12:.LANCHOR80]
+	adrp	x23, .LANCHOR98
 	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR102
-	add	x23, x23, :lo12:.LANCHOR101
+	add	x22, x22, :lo12:.LANCHOR99
+	add	x23, x23, :lo12:.LANCHOR98
 	mov	x26, 0
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2820:
+.L2914:
 	cmp	w21, w26
-	bgt	.L2825
+	bgt	.L2919
 	mov	x0, x25
 	bl	buf_free
-	adrp	x0, .LANCHOR5
-	ldrh	w1, [x19, #:lo12:.LANCHOR65]
-	add	x3, x19, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR9
+	ldrh	w1, [x19, #:lo12:.LANCHOR62]
+	add	x3, x19, :lo12:.LANCHOR62
 	mov	x20, x0
-	ldr	x4, [x0, #:lo12:.LANCHOR5]
+	ldr	x4, [x0, #:lo12:.LANCHOR9]
 	ubfiz	x2, x1, 1, 16
 	ldrh	w3, [x3, 24]
 	ldrh	w2, [x4, x2]
 	cmp	w2, w3
-	beq	.L2826
+	beq	.L2920
 	adrp	x0, .LC193
 	add	x0, x0, :lo12:.LC193
 	bl	printf
-.L2826:
-	add	x0, x19, :lo12:.LANCHOR65
-	ldrh	w2, [x19, #:lo12:.LANCHOR65]
-	ldr	x1, [x20, #:lo12:.LANCHOR5]
+.L2920:
+	add	x0, x19, :lo12:.LANCHOR62
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
+	ldr	x1, [x20, #:lo12:.LANCHOR9]
 	ldrh	w3, [x0, 24]
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2806
-.L2825:
+	b	.L2900
+.L2919:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2822
+	beq	.L2916
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2823
+	bne	.L2917
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2823:
+.L2917:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -17606,20 +17966,20 @@ gc_scan_src_blk:
 	lsr	w1, w3, w1
 	and	w0, w0, w1
 	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR65]
+	ldrh	w2, [x19, #:lo12:.LANCHOR62]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR65
+	add	x1, x19, :lo12:.LANCHOR62
 	cmp	w0, w2
-	bne	.L2822
+	bne	.L2916
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR68]
+	ldr	x4, [x20, #:lo12:.LANCHOR65]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2822:
+.L2916:
 	add	x26, x26, 1
-	b	.L2820
+	b	.L2914
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -17629,27 +17989,27 @@ gc_scan_static_data:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR6
+	adrp	x19, .LANCHOR10
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2845
-	adrp	x21, .LANCHOR203
+	beq	.L2939
+	adrp	x21, .LANCHOR207
 	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR203
+	add	x21, x21, :lo12:.LANCHOR207
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2853:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L2947:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	mov	w2, 0
 	add	x1, x29, 76
 	ldr	w0, [x0, 544]
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2846
+	beq	.L2940
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -17659,45 +18019,45 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2847
-	adrp	x0, .LANCHOR102
+	bne	.L2941
+	adrp	x0, .LANCHOR99
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR101
-	ldrb	w3, [x2, #:lo12:.LANCHOR101]
+	adrp	x2, .LANCHOR98
+	ldrb	w3, [x2, #:lo12:.LANCHOR98]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2847:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L2941:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2848
+	beq	.L2942
 	mov	w2, 1419
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2848:
+.L2942:
 	mov	x0, x23
 	bl	buf_free
-.L2846:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR56
-	ldr	w2, [x2, #:lo12:.LANCHOR56]
+.L2940:
+	ldr	x0, [x19, #:lo12:.LANCHOR10]
+	adrp	x2, .LANCHOR118
+	ldr	w2, [x2, #:lo12:.LANCHOR118]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2849
+	bcc	.L2943
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -17708,42 +18068,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2844:
+.L2938:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2849:
+.L2943:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2844
+	bne	.L2938
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2853
-	b	.L2844
-.L2845:
+	bne	.L2947
+	b	.L2938
+.L2939:
 	ldr	w1, [x0, 536]
-	adrp	x3, .LANCHOR100
+	adrp	x3, .LANCHOR97
 	ldr	w2, [x0, 12]
 	add	w1, w1, 12959744
 	add	w1, w1, 256
 	cmp	w2, w1
-	bhi	.L2855
-	ldr	x4, [x3, #:lo12:.LANCHOR100]
+	bhi	.L2949
+	ldr	x4, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
 	cmp	w4, w1
-	bls	.L2844
-.L2855:
-	ldr	x1, [x3, #:lo12:.LANCHOR100]
+	bls	.L2938
+.L2949:
+	ldr	x1, [x3, #:lo12:.LANCHOR97]
 	ldr	w1, [x1, 44]
 	str	w1, [x0, 540]
 	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2844
+	b	.L2938
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17755,12 +18115,12 @@ ftl_sblk_dump:
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x23, x24, [sp, 96]
-	adrp	x24, .LANCHOR3
+	adrp	x24, .LANCHOR7
 	lsl	x23, x0, 2
 	stp	x0, x1, [x29, 144]
 	stp	x21, x22, [sp, 80]
 	mov	x21, x0
-	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 64]
 	add	x1, x0, x23
 	stp	x25, x26, [sp, 112]
@@ -17778,29 +18138,29 @@ ftl_sblk_dump:
 	bl	printf
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L2882
-	adrp	x0, .LANCHOR2
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	beq	.L2976
+	adrp	x0, .LANCHOR6
+	ldrh	w0, [x0, #:lo12:.LANCHOR6]
 	cmp	w0, w21
-	bls	.L2882
-	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	bls	.L2976
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2883
-	adrp	x0, .LANCHOR71
-	ldrb	w25, [x0, #:lo12:.LANCHOR71]
-.L2863:
+	bne	.L2977
+	adrp	x0, .LANCHOR68
+	ldrb	w25, [x0, #:lo12:.LANCHOR68]
+.L2957:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR83
+	adrp	x19, .LANCHOR80
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR83]
+	ldrh	w2, [x19, #:lo12:.LANCHOR80]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
@@ -17812,7 +18172,7 @@ ftl_sblk_dump:
 	strh	wzr, [x29, 202]
 	strh	w1, [x29, 198]
 	add	x0, x0, :lo12:.LC195
-	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	ldr	x1, [x24, #:lo12:.LANCHOR7]
 	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
@@ -17823,39 +18183,39 @@ ftl_sblk_dump:
 	str	x19, [x29, 136]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 164]
-	adrp	x0, .LANCHOR108
-	add	x0, x0, :lo12:.LANCHOR108
+	adrp	x0, .LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR105
 	str	x0, [x29, 112]
-.L2864:
+.L2958:
 	ldr	x0, [x29, 136]
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2879
+	bls	.L2973
 	lsl	w0, w20, 1
 	str	wzr, [x29, 172]
 	sub	w0, w0, #1
 	str	w0, [x29, 160]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	str	x0, [x29, 120]
-	b	.L2880
-.L2883:
+	b	.L2974
+.L2977:
 	mov	w25, 1
-	b	.L2863
-.L2876:
+	b	.L2957
+.L2970:
 	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2865
+	beq	.L2959
 	ldr	x0, [x29, 112]
 	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2866
+	bne	.L2960
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2867:
+.L2961:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 104]
@@ -17891,28 +18251,28 @@ ftl_sblk_dump:
 	ccmn	w11, #1, 4, ne
 	csinc	w0, w0, wzr, ne
 	str	w0, [x29, 164]
-	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	ldr	x0, [x24, #:lo12:.LANCHOR7]
 	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2865
+	beq	.L2959
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2870
+	bne	.L2964
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2870:
+.L2964:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2871
+	bne	.L2965
 	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -17923,91 +18283,91 @@ ftl_sblk_dump:
 	adrp	x0, .LC196
 	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2871:
+.L2965:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2873
+	cbz	x0, .L2967
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2874
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2874
+	beq	.L2968
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L2968
 	adrp	x0, .LC197
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2874:
+.L2968:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2873
+	beq	.L2967
 	cmn	w0, #1
-	beq	.L2873
-	adrp	x1, .LANCHOR204
+	beq	.L2967
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 1300
-	add	x1, x1, :lo12:.LANCHOR204
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2873:
+.L2967:
 	add	w27, w27, 1
-.L2865:
+.L2959:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2878:
+.L2972:
 	cmp	w25, w22
-	bcs	.L2876
+	bcs	.L2970
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	str	w0, [x29, 172]
-.L2880:
+.L2974:
 	ldrb	w0, [x29, 201]
 	ldr	w1, [x29, 172]
 	cmp	w0, w1
-	bls	.L2877
+	bls	.L2971
 	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 128]
-	b	.L2878
-.L2866:
+	b	.L2972
+.L2960:
 	cmp	w25, 2
-	bne	.L2868
+	bne	.L2962
 	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR68
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	orr	w19, w19, w0, lsl 24
-	b	.L2867
-.L2868:
+	b	.L2961
+.L2962:
 	add	w19, w20, w19
-	b	.L2867
-.L2877:
+	b	.L2961
+.L2971:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2864
-.L2879:
+	b	.L2958
+.L2973:
 	mov	x0, x26
 	bl	buf_free
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR9
 	ldr	x1, [x29, 144]
 	ldr	w3, [x29, 168]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
 	adrp	x0, .LC198
 	add	x0, x0, :lo12:.LC198
 	bl	printf
 	ldr	w0, [x29, 164]
-.L2861:
+.L2955:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -18016,297 +18376,361 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2882:
+.L2976:
 	mov	w0, 0
-	b	.L2861
+	b	.L2955
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
 	.global	zftl_read
 	.type	zftl_read, %function
 zftl_read:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	w21, w0
-	adrp	x0, .LANCHOR9
-	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
-	mov	w24, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	mov	w19, w1
+	mov	w20, w0
+	adrp	x0, .LANCHOR14
+	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	mov	x23, x3
+	mov	w19, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	mov	w26, w2
+	stp	x23, x24, [sp, 48]
+	mov	x22, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2894
+	tbz	x0, 12, .L2988
 	mov	w3, w2
 	adrp	x0, .LC199
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC199
-	mov	w1, w21
+	mov	w1, w20
 	bl	printf
-.L2894:
-	cbnz	w21, .L2895
-	adrp	x0, .LANCHOR61
-	mov	w21, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L2896:
-	add	w1, w19, w24
+.L2988:
+	cbnz	w20, .L2989
+	adrp	x0, .LANCHOR58
+	mov	w20, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
+.L2990:
+	add	w1, w19, w26
 	cmp	w0, w1
-	bcc	.L2920
-	adrp	x1, .LANCHOR100
-	adrp	x25, .LANCHOR123
-	add	w21, w21, w19
+	bcc	.L3018
+	adrp	x1, .LANCHOR97
+	add	w20, w20, w19
+	add	w3, w26, w20
+	stp	w3, wzr, [x29, 160]
+	ldr	x2, [x1, #:lo12:.LANCHOR97]
+	sub	w3, w3, #1
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR100]
 	ldr	w0, [x2, 24]
-	add	w0, w0, w24
+	add	w0, w0, w26
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR123]
-	add	w2, w24, w21
-	stp	w2, wzr, [x29, 136]
-	sub	w2, w2, #1
-	udiv	w27, w21, w0
-	udiv	w0, w2, w0
-	mov	w20, w27
-	sub	w26, w0, w27
-	str	w0, [x29, 132]
-	add	w26, w26, 1
-	adrp	x0, .LANCHOR205
-	add	x0, x0, :lo12:.LANCHOR205
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
-	str	x0, [x29, 104]
-.L2898:
-	cbnz	w26, .L2918
-	ldr	w0, [x29, 140]
-.L2893:
+	adrp	x0, .LANCHOR121
+	str	x0, [x29, 168]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR125
+	add	x28, x0, :lo12:.LANCHOR125
+	udiv	w27, w20, w2
+	udiv	w2, w3, w2
+	mov	w21, w27
+	sub	w25, w2, w27
+	str	w2, [x29, 156]
+	add	w25, w25, 1
+.L2992:
+	cbnz	w25, .L3016
+	ldr	w0, [x29, 164]
+.L2987:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 192
 	ret
-.L2895:
-	cmp	w21, 3
-	bhi	.L2920
-	lsl	w21, w21, 13
+.L2989:
+	cmp	w20, 3
+	bhi	.L3018
+	lsl	w20, w20, 13
 	mov	w0, 8192
-	b	.L2896
-.L2918:
-	ldrb	w1, [x25, #:lo12:.LANCHOR123]
-	cmp	w20, w27
-	ldr	w0, [x29, 132]
+	b	.L2990
+.L3016:
+	ldr	x0, [x29, 168]
+	cmp	w21, w27
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	ldr	w0, [x29, 156]
 	and	w19, w1, 65535
-	ccmp	w20, w0, 4, ne
-	bne	.L2921
-	cmp	w20, w27
-	bne	.L2900
-	udiv	w22, w21, w1
-	and	w0, w24, 65535
-	msub	w1, w22, w1, w21
-	and	w22, w1, 65535
-	sub	w19, w19, w22
+	ccmp	w21, w0, 4, ne
+	bne	.L3019
+	cmp	w21, w27
+	bne	.L2994
+	udiv	w24, w20, w1
+	and	w0, w26, 65535
+	msub	w1, w24, w1, w20
+	and	w24, w1, 65535
+	sub	w19, w19, w24
 	and	w19, w19, 65535
-	cmp	w24, w19
+	cmp	w26, w19
 	csel	w19, w0, w19, cc
-.L2899:
-	adrp	x0, .LANCHOR48
-	add	x1, x0, :lo12:.LANCHOR48
+.L2993:
+	adrp	x23, .LANCHOR49
+	add	x1, x23, :lo12:.LANCHOR49
 	add	x1, x1, 2
 	mov	w0, 0
-.L2903:
+.L2997:
 	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L2901
+	cmp	w21, w2
+	bne	.L2995
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2901
-	ldr	x1, [x29, 104]
+	tbz	x2, 3, .L2995
+	add	x1, x23, :lo12:.LANCHOR49
 	ubfiz	x0, x0, 6, 32
+	add	x0, x1, x0
 	lsl	w2, w19, 9
 	ubfiz	x19, x19, 9, 16
-	add	x0, x1, x0
-	ubfiz	x22, x22, 9, 16
+	ubfiz	x24, x24, 9, 16
 	ldr	x1, [x0, 8]
-	mov	x0, x23
-	add	x23, x23, x19
-	add	x1, x1, x22
+	mov	x0, x22
+	add	x22, x22, x19
+	add	x1, x1, x24
 	bl	ftl_memcpy
-.L2902:
-	add	w20, w20, 1
-	sub	w26, w26, #1
-	b	.L2898
-.L2900:
-	ldr	w0, [x29, 136]
-	msub	w19, w1, w20, w0
+.L2996:
+	add	w21, w21, 1
+	sub	w25, w25, #1
+.L3003:
+	adrp	x0, .LANCHOR51
+	ldrb	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, 2
+	bls	.L3004
+	cbnz	w25, .L2992
+.L3004:
+	adrp	x0, .LANCHOR125
+	ldrb	w1, [x0, #:lo12:.LANCHOR125]
+	cbz	w1, .L2992
+	adrp	x24, .LANCHOR124
+	add	x0, x23, :lo12:.LANCHOR49
+	ldrb	w2, [x24, #:lo12:.LANCHOR124]
+	add	x0, x0, x2, lsl 6
+	bl	sblk_read_page
+	adrp	x0, .LANCHOR209
+	add	x0, x0, :lo12:.LANCHOR209
+	str	x0, [x29, 136]
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	str	x0, [x29, 128]
+.L3006:
+	ldrb	w0, [x28]
+	cbnz	w0, .L3015
+	mov	w0, -1
+	strb	wzr, [x28]
+	strb	w0, [x24, #:lo12:.LANCHOR124]
+	b	.L2992
+.L2994:
+	ldr	w0, [x29, 160]
+	msub	w19, w1, w21, w0
 	and	w19, w19, 255
-.L2921:
-	mov	w22, 0
-	b	.L2899
-.L2901:
+.L3019:
+	mov	w24, 0
+	b	.L2993
+.L2995:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2903
-	mov	w0, w20
+	bne	.L2997
+	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 156]
+	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2904
+	bne	.L2998
 	mov	w2, 0
-	add	x1, x29, 156
-	mov	w0, w20
+	add	x1, x29, 188
+	mov	w0, w21
 	bl	pm_log2phys
-.L2904:
-	ldr	w0, [x29, 156]
+.L2998:
+	ldr	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2905
-	add	x22, x25, :lo12:.LANCHOR123
+	bne	.L2999
+	ldr	x0, [x29, 168]
 	mov	w19, 0
-.L2906:
-	ldrb	w0, [x22]
+	add	x24, x0, :lo12:.LANCHOR121
+.L3000:
+	ldrb	w0, [x24]
 	cmp	w19, w0
-	bcs	.L2902
-	madd	w0, w20, w0, w19
-	cmp	w21, w0
-	bhi	.L2907
-	ldr	w1, [x29, 136]
+	bcs	.L2996
+	madd	w0, w21, w0, w19
+	cmp	w20, w0
+	bhi	.L3001
+	ldr	w1, [x29, 160]
 	cmp	w1, w0
-	bls	.L2907
-	mov	x0, x23
-	add	x23, x23, 512
+	bls	.L3001
+	mov	x0, x22
+	add	x22, x22, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2907:
+.L3001:
 	add	w19, w19, 1
-	b	.L2906
-.L2905:
+	b	.L3000
+.L2999:
 	mov	w0, 0
 	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L2909
-	bl	ftl_read_ahead
-	b	.L2898
-.L2909:
-	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
-	ldr	w0, [x1, 40]
-	add	w0, w0, 1
-	str	w0, [x1, 40]
-	ldr	w0, [x29, 156]
-	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR123]
-	cmp	w0, w19
-	bne	.L2911
-	str	x23, [x28, 16]
-.L2911:
-	mov	w1, 1
-	mov	x0, x28
-	bl	sblk_read_page
-	ldr	w10, [x28, 52]
-	cmn	w10, #1
-	bne	.L2912
-	adrp	x0, .LANCHOR6
-	str	w10, [x29, 140]
-	ldr	x1, [x0, #:lo12:.LANCHOR6]
+	cbz	x0, .L3003
+	ldr	x2, [x29, 120]
+	ldr	x3, [x2, #:lo12:.LANCHOR97]
+	ldr	w2, [x3, 40]
+	add	w2, w2, 1
+	str	w2, [x3, 40]
+	ldr	w2, [x29, 188]
+	strb	w19, [x0, 56]
+	ubfiz	x19, x19, 9, 16
+	str	x22, [x0, 16]
+	add	x22, x22, x19
+	strb	w24, [x0, 57]
+	stp	w21, w2, [x0, 36]
+	str	w2, [x0, 44]
+	bl	zftl_add_read_buf
+	b	.L2996
+.L3015:
+	ldrb	w0, [x24, #:lo12:.LANCHOR124]
+	cmp	w0, 255
+	bne	.L3007
+	ldp	x0, x1, [x29, 128]
+	mov	w2, 1064
+	bl	printf
+.L3007:
+	ldrb	w19, [x24, #:lo12:.LANCHOR124]
+	add	x0, x23, :lo12:.LANCHOR49
+	ubfiz	x1, x19, 6, 8
+	lsl	x2, x19, 6
+	add	x1, x0, x1
+	str	x1, [x29, 144]
+	add	x1, x0, x2
+	ldrb	w0, [x0, x2]
+	strb	w0, [x24, #:lo12:.LANCHOR124]
+	ldr	w8, [x1, 52]
+	cmn	w8, #1
+	bne	.L3008
+	adrp	x0, .LANCHOR10
+	str	w8, [x29, 164]
+	ldr	x1, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2913:
-	ldr	x0, [x28, 24]
-	ldr	w5, [x0, 4]
-	cmp	w20, w5
-	beq	.L2914
-	ldr	w4, [x0]
-	mov	w2, w20
+.L3009:
+	add	x10, x23, :lo12:.LANCHOR49
+	add	x10, x10, x19, lsl 6
+	ldr	x0, [x10, 24]
+	ldr	w2, [x10, 36]
+	ldr	w1, [x0, 4]
+	cmp	w1, w2
+	beq	.L3010
+	adrp	x1, .LANCHOR10
+	str	w8, [x29, 152]
+	str	x10, [x29, 112]
+	ldr	x3, [x1, #:lo12:.LANCHOR10]
+	ldr	w1, [x3, 552]
+	add	w1, w1, 1
+	str	w1, [x3, 552]
+	ldrb	w1, [x10, 1]
+	ldp	w4, w5, [x0]
 	ldp	w6, w7, [x0, 8]
-	str	w10, [x29, 128]
-	ldrb	w1, [x28, 1]
-	adrp	x0, .LC171
-	ldr	w3, [x29, 156]
-	add	x0, x0, :lo12:.LC171
+	adrp	x0, .LC201
+	ldr	w3, [x10, 40]
+	add	x0, x0, :lo12:.LC201
 	bl	printf
-	adrp	x0, .LANCHOR102
-	ldr	w1, [x29, 156]
-	ldrh	w3, [x0, #:lo12:.LANCHOR102]
+	ldr	x10, [x29, 112]
+	adrp	x0, .LANCHOR99
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
+	ldr	w1, [x10, 40]
 	sub	w2, w0, w3
 	mov	w0, 1
-	lsr	w1, w1, w3
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
+	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w2, [x1, #:lo12:.LANCHOR98]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w10, [x29, 128]
-.L2914:
-	ldr	x0, [x28, 24]
-	ldr	w0, [x0, 4]
-	cmp	w20, w0
-	bne	.L2915
-	cmn	w10, #1
-	bne	.L2916
-.L2915:
-	ldr	x1, [x29, 112]
-	adrp	x0, .LC0
-	mov	w2, 1048
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2916:
-	ldr	x0, [x28, 16]
-	cbnz	x0, .L2917
-	ldr	x1, [x28, 8]
-	ubfiz	x22, x22, 9, 16
-	lsl	w2, w19, 9
-	mov	x0, x23
-	add	x1, x1, x22
+	ldr	w8, [x29, 152]
+.L3010:
+	add	x0, x23, :lo12:.LANCHOR49
+	add	x0, x0, x19, lsl 6
+	ldr	x1, [x0, 24]
+	ldr	w0, [x0, 36]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	bne	.L3011
+	cmn	w8, #1
+	bne	.L3012
+.L3011:
+	ldp	x0, x1, [x29, 128]
+	mov	w2, 1085
+	bl	printf
+.L3012:
+	add	x0, x23, :lo12:.LANCHOR49
+	add	x19, x0, x19, lsl 6
+	ldr	x0, [x29, 168]
+	ldrb	w2, [x19, 56]
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
+	cmp	w0, w2
+	bls	.L3013
+	ldrb	w0, [x19, 57]
+	lsl	w2, w2, 9
+	ldr	x1, [x19, 8]
+	ubfiz	x0, x0, 9, 8
+	add	x1, x1, x0
+	ldr	x0, [x19, 16]
 	bl	ftl_memcpy
-.L2917:
-	ubfiz	x19, x19, 9, 16
-	mov	x0, x28
-	add	x23, x23, x19
+.L3014:
+	ldr	x1, [x29, 144]
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
+	bl	buf_remove_buf
+	ldr	x0, [x29, 144]
 	bl	buf_free
-	b	.L2902
-.L2912:
-	cmp	w10, 256
-	bne	.L2913
-	adrp	x0, .LANCHOR102
+	ldrb	w0, [x28]
+	sub	w0, w0, #1
+	strb	w0, [x28]
+	b	.L3006
+.L3008:
+	cmp	w8, 256
+	bne	.L3009
+	adrp	x0, .LANCHOR99
 	mov	w4, 21
+	ldp	w2, w3, [x1, 36]
 	mov	w5, 1
-	stp	w10, w5, [x29, 96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR102]
-	ldr	w0, [x29, 156]
-	sub	w4, w4, w1
-	ldp	w2, w3, [x28, 36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	str	w5, [x29, 152]
+	sub	w4, w4, w0
+	lsr	w0, w3, w0
 	lsl	w4, w5, w4
-	lsr	w0, w0, w1
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR101
-	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
 	udiv	w4, w4, w0
 	adrp	x0, .LC200
 	add	x0, x0, :lo12:.LC200
+	stp	w8, w4, [x29, 108]
 	and	w1, w4, 65535
-	str	w4, [x29, 128]
 	bl	printf
-	ldr	w5, [x29, 100]
+	ldr	w4, [x29, 112]
 	mov	w2, 0
-	ldr	w4, [x29, 128]
-	mov	w1, w5
+	ldr	w5, [x29, 152]
 	mov	w0, w4
+	mov	w1, w5
 	bl	gc_add_sblk
-	ldr	w10, [x29, 96]
-	b	.L2913
-.L2920:
+	ldr	w8, [x29, 108]
+	b	.L3009
+.L3013:
+	ldrb	w0, [x19, 2]
+	and	w0, w0, -9
+	strb	w0, [x19, 2]
+	b	.L3014
+.L3018:
 	mov	w0, -1
-	b	.L2893
+	b	.L2987
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -18381,52 +18805,52 @@ ftl_update_l2p_map:
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR83
+	adrp	x0, .LANCHOR80
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR83]
+	ldrh	w23, [x0, #:lo12:.LANCHOR80]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
 	mul	w23, w23, w0
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR111
 	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
 	add	x19, x1, x19, lsl 2
 	add	x1, x19, x23, sxtw 2
 	ldr	w1, [x1, -4]
 	cmn	w1, #1
-	beq	.L2937
-	adrp	x1, .LANCHOR206
+	beq	.L3041
+	adrp	x1, .LANCHOR210
 	adrp	x0, .LC0
 	mov	w2, 1576
-	add	x1, x1, :lo12:.LANCHOR206
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2937:
-	adrp	x27, .LANCHOR123
+.L3041:
+	adrp	x27, .LANCHOR121
 	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR123
+	add	x0, x27, :lo12:.LANCHOR121
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L2938:
+.L3042:
 	cmp	w24, w23
-	blt	.L2944
-	adrp	x0, .LANCHOR9
-	adrp	x19, .LANCHOR5
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L2945
+	blt	.L3048
+	adrp	x0, .LANCHOR14
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3049
 	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC204
+	adrp	x0, .LC205
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC204
+	add	x0, x0, :lo12:.LC205
 	bl	printf
-.L2945:
+.L3049:
 	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	ldp	x23, x24, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	strh	w21, [x0, x1, lsl 1]
@@ -18435,38 +18859,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2944:
+.L3048:
 	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L2939
-	ldrb	w20, [x27, #:lo12:.LANCHOR123]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	beq	.L3043
+	ldrb	w20, [x27, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2940
-	adrp	x0, .LC201
+	tbz	x0, 12, .L3044
+	adrp	x0, .LC202
 	mov	w3, w24
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC201
+	add	x0, x0, :lo12:.LC202
 	bl	printf
-.L2940:
-	adrp	x25, .LANCHOR108
-	adrp	x26, .LC202
+.L3044:
+	adrp	x25, .LANCHOR105
+	adrp	x26, .LC203
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR108
-	add	x26, x26, :lo12:.LC202
-.L2943:
+	add	x25, x25, :lo12:.LANCHOR105
+	add	x26, x26, :lo12:.LC203
+.L3047:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L2941
+	beq	.L3045
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2941
+	bne	.L3045
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18478,15 +18902,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2942
+	cbz	w0, .L3046
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LC203
-	add	x0, x0, :lo12:.LC203
+	ldr	x1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LC204
+	add	x0, x0, :lo12:.LC204
 	bl	rknand_print_hex
-.L2942:
+.L3046:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18495,13 +18919,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L2941:
+.L3045:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L2943
-.L2939:
+	bgt	.L3047
+.L3043:
 	add	x24, x24, 1
-	b	.L2938
+	b	.L3042
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18517,11 +18941,11 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2967
+	beq	.L3071
 	bl	zftl_insert_data_list
-.L2967:
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+.L3071:
+	adrp	x0, .LANCHOR10
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	add	x0, x0, 16
 	cmp	x19, x0
 	mov	x0, x19
@@ -18543,54 +18967,54 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	add	x23, x0, :lo12:.LANCHOR48
+	add	x23, x0, :lo12:.LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L2972:
-	adrp	x2, .LANCHOR55
-	ldrb	w1, [x2, #:lo12:.LANCHOR55]
-	cbz	w1, .L2974
-	adrp	x3, .LANCHOR54
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
+.L3076:
+	adrp	x2, .LANCHOR57
+	ldrb	w1, [x2, #:lo12:.LANCHOR57]
+	cbz	w1, .L3078
+	adrp	x3, .LANCHOR56
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	sub	w1, w1, #1
-	ldrb	w4, [x3, #:lo12:.LANCHOR54]
-	strb	w1, [x2, #:lo12:.LANCHOR55]
+	ldrb	w4, [x3, #:lo12:.LANCHOR56]
+	strb	w1, [x2, #:lo12:.LANCHOR57]
 	ubfiz	x27, x4, 6, 8
 	add	x5, x0, x27
 	stp	x4, x5, [x29, 112]
 	lsl	x4, x4, 6
 	add	x5, x0, x4
 	ldrb	w0, [x0, x4]
-	strb	w0, [x3, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR56
+	strb	w0, [x3, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR118
 	ldr	w2, [x5, 36]
 	mov	x19, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	ldr	w1, [x0, #:lo12:.LANCHOR118]
 	cmp	w2, w1
-	bcc	.L2976
-	adrp	x1, .LANCHOR207
+	bcc	.L3080
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 487
-	add	x1, x1, :lo12:.LANCHOR207
+	mov	w2, 495
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2976:
+.L3080:
 	ldr	x0, [x29, 112]
-	ldr	w1, [x19, #:lo12:.LANCHOR56]
+	ldr	w1, [x19, #:lo12:.LANCHOR118]
 	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
 	cmp	w22, w1
-	bcc	.L2977
+	bcc	.L3081
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2971:
+.L3075:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18598,60 +19022,60 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2977:
+.L3081:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
-	ldr	x25, [x0, 8]
+	ldr	x26, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR119
 	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR121]
-	cbz	w1, .L2979
-	adrp	x0, .LANCHOR169
-	ldrb	w1, [x0, #:lo12:.LANCHOR169]
+	ldrb	w1, [x0, #:lo12:.LANCHOR119]
+	cbz	w1, .L3083
+	adrp	x0, .LANCHOR174
+	ldrb	w1, [x0, #:lo12:.LANCHOR174]
 	add	x1, x23, x1, lsl 6
-.L2980:
+.L3084:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2981
+	bne	.L3085
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2979
+	bne	.L3083
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
-	add	x1, x25, x21
+	add	x1, x26, x21
 	add	x0, x0, x21
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2972
-.L2981:
+	b	.L3076
+.L3085:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x23, x1
-	b	.L2980
-.L2979:
+	b	.L3084
+.L3083:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2983
+	bne	.L3087
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2983:
-	adrp	x26, .LANCHOR6
+.L3087:
+	adrp	x25, .LANCHOR10
 	add	x1, x23, 2
 	mov	w0, 0
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L2986:
+.L3090:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2984
+	bne	.L3088
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2984
+	tbz	x2, 3, .L3088
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x23, x0
@@ -18659,50 +19083,50 @@ ftl_write_commit:
 	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2985:
-	adrp	x0, .LANCHOR123
+.L3089:
+	adrp	x0, .LANCHOR121
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR123]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w1
-	bcs	.L3010
+	bcs	.L3114
 	add	w20, w21, w20
-	cbz	x24, .L2988
-	cbz	w21, .L2989
+	cbz	x24, .L3092
+	cbz	w21, .L3093
 	lsl	w2, w21, 9
 	mov	x1, x24
-	mov	x0, x25
+	mov	x0, x26
 	bl	ftl_memcpy
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L2989:
+.L3093:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L2990
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	bcc	.L3094
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3010:
+.L3114:
 	mov	w24, 0
-	b	.L2987
-.L2984:
+	b	.L3091
+.L3088:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2986
+	bne	.L3090
 	mov	x24, 0
-	b	.L2985
-.L2990:
+	b	.L3089
+.L3094:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x24, x0
 	lsl	w2, w2, 9
-	add	x0, x25, x0
+	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3010
-.L2988:
+	b	.L3114
+.L3092:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2991
+	beq	.L3095
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -18715,81 +19139,85 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L2992
+	bne	.L3096
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2993
-.L2992:
-	ldrb	w1, [x27, 1]
+	bne	.L3097
+.L3096:
+	ldr	x1, [x25, #:lo12:.LANCHOR10]
 	mov	w3, w22
-	ldr	w2, [x29, 140]
-	adrp	x0, .LC205
 	ldr	w4, [x27, 52]
-	add	x0, x0, :lo12:.LC205
+	ldr	w2, [x29, 140]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
+	ldrb	w1, [x27, 1]
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC166
+	adrp	x0, .LC168
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC166
+	add	x0, x0, :lo12:.LC168
 	bl	rknand_print_hex
-.L2993:
+.L3097:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2994
+	bne	.L3098
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2995
-.L2994:
-	adrp	x1, .LANCHOR207
+	bne	.L3099
+.L3098:
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 557
-	add	x1, x1, :lo12:.LANCHOR207
+	mov	w2, 566
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2995:
-	cbz	w21, .L2996
+.L3099:
+	cbz	w21, .L3100
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2997
+	beq	.L3101
 	ldr	x1, [x27, 8]
-	mov	x0, x25
+	mov	x0, x26
 	bl	ftl_memcpy
-.L2998:
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+.L3102:
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 48
-.L2996:
+.L3100:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	cmp	w20, w2
-	bcc	.L2999
-	bls	.L3000
-	ldr	x19, [x26, #:lo12:.LANCHOR6]
+	bcc	.L3103
+	bls	.L3104
+	ldr	x19, [x25, #:lo12:.LANCHOR10]
 	add	x19, x19, 16
-.L3000:
-	cbz	x27, .L2987
+.L3104:
+	cbz	x27, .L3091
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR60
-	add	x0, x0, :lo12:.LANCHOR60
+	adrp	x0, .LANCHOR127
+	add	x0, x0, :lo12:.LANCHOR127
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2987:
+.L3091:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L3002
+	cbnz	w0, .L3106
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L3002:
+.L3106:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR169
+	adrp	x20, .LANCHOR174
 	lsl	x2, x1, 6
 	add	x1, x23, x2
 	ldr	w3, [x1, 32]
@@ -18810,94 +19238,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR169
+	add	x0, x20, :lo12:.LANCHOR174
 	bl	buf_add_tail
 	ldr	x0, [x29, 104]
-	ldrb	w2, [x0, #:lo12:.LANCHOR121]
+	ldrb	w2, [x0, #:lo12:.LANCHOR119]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR208
+	strb	w2, [x0, #:lo12:.LANCHOR119]
+	adrp	x0, .LANCHOR212
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR208]
+	str	wzr, [x0, #:lo12:.LANCHOR212]
 	ldrh	w0, [x19, 6]
-	bhi	.L3003
+	bhi	.L3107
 	cmp	w0, 1
-	bne	.L2975
-.L3003:
+	bne	.L3079
+.L3107:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR169]
+	ldrb	w0, [x20, #:lo12:.LANCHOR174]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L3007:
+.L3111:
 	cmp	w1, w4
-	bne	.L3008
-	strb	w3, [x20, #:lo12:.LANCHOR169]
+	bne	.L3112
+	strb	w3, [x20, #:lo12:.LANCHOR174]
 	and	w1, w1, 255
 	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x23, x0
-	strb	w2, [x3, #:lo12:.LANCHOR121]
+	strb	w2, [x3, #:lo12:.LANCHOR119]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2975
+	bne	.L3079
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2975:
-	adrp	x0, .LANCHOR55
-	ldrb	w0, [x0, #:lo12:.LANCHOR55]
-	cbnz	w0, .L2972
-.L2974:
+.L3079:
+	adrp	x0, .LANCHOR57
+	ldrb	w0, [x0, #:lo12:.LANCHOR57]
+	cbnz	w0, .L3076
+.L3078:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2971
-.L2999:
+	b	.L3075
+.L3103:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L3001
+	beq	.L3105
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
-	add	x0, x25, x0
+	add	x0, x26, x0
 	bl	ftl_memcpy
-	b	.L3000
-.L3001:
+	b	.L3104
+.L3105:
 	mov	w1, 0
-	add	x0, x25, x0, lsl 2
+	add	x0, x26, x0, lsl 2
 	bl	ftl_memset
-	b	.L3000
-.L3008:
+	b	.L3104
+.L3112:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x23, x3]
-	b	.L3007
-.L3009:
+	b	.L3111
+.L3113:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w24, 0
-.L2997:
+.L3101:
 	mov	w1, 0
-	mov	x0, x25
+	mov	x0, x26
 	bl	ftl_memset
-	b	.L2998
-.L2991:
-	cbnz	w21, .L3009
+	b	.L3102
+.L3095:
+	cbnz	w21, .L3113
 	mov	w24, 0
 	mov	x27, 0
-	b	.L2996
+	b	.L3100
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -18905,21 +19333,21 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR71
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L3033
+	cbnz	w0, .L3137
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L3032
-	adrp	x20, .LANCHOR65
-	add	x3, x20, :lo12:.LANCHOR65
+	cbz	x0, .L3136
+	adrp	x20, .LANCHOR62
+	add	x3, x20, :lo12:.LANCHOR62
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -18933,52 +19361,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3035
-	adrp	x1, .LANCHOR209
+	bne	.L3139
+	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
 	mov	w2, 595
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3035:
+.L3139:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L3036
+	bne	.L3140
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L3036:
+.L3140:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L3037
-	adrp	x0, .LANCHOR48
-	add	x0, x0, :lo12:.LANCHOR48
+	bne	.L3141
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L3040:
+.L3144:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L3038
+	bne	.L3142
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L3038
+	tbz	x2, 1, .L3142
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3032
-	add	x20, x20, :lo12:.LANCHOR65
-	adrp	x0, .LC206
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3136
+	add	x20, x20, :lo12:.LANCHOR62
+	adrp	x0, .LC207
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC206
+	add	x0, x0, :lo12:.LC207
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L3032:
+.L3136:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18987,14 +19415,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L3038:
+.L3142:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L3040
-	adrp	x0, .LANCHOR123
+	bne	.L3144
+	adrp	x0, .LANCHOR121
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	ldrb	w0, [x0, #:lo12:.LANCHOR121]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19003,67 +19431,67 @@ gc_do_copy_back:
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0]
 	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3041
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3145
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR65
+	add	x1, x20, :lo12:.LANCHOR62
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC207
+	adrp	x0, .LC208
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC208
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L3041:
+.L3145:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR65
-	adrp	x0, .LANCHOR100
-	ldr	x1, [x0, #:lo12:.LANCHOR100]
+	add	x20, x20, :lo12:.LANCHOR62
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L3032
-.L3037:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3042
-	add	x20, x20, :lo12:.LANCHOR65
+	b	.L3136
+.L3141:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3146
+	add	x20, x20, :lo12:.LANCHOR62
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC207
+	adrp	x0, .LC208
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC207
+	add	x0, x0, :lo12:.LC208
 	bl	printf
-.L3042:
+.L3146:
 	mov	x0, x19
 	bl	buf_free
-	b	.L3032
-.L3033:
-	adrp	x1, .LANCHOR6
-	adrp	x0, .LANCHOR71
+	b	.L3136
+.L3137:
+	adrp	x1, .LANCHOR10
+	adrp	x0, .LANCHOR68
 	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR65
-	ldr	x22, [x1, #:lo12:.LANCHOR6]
-	ldrb	w25, [x0, #:lo12:.LANCHOR71]
+	adrp	x24, .LANCHOR62
+	ldr	x22, [x1, #:lo12:.LANCHOR10]
+	ldrb	w25, [x0, #:lo12:.LANCHOR68]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L3043
-	adrp	x0, .LANCHOR73
-	ldrb	w0, [x0, #:lo12:.LANCHOR73]
-	cbz	w0, .L3044
-	add	x0, x24, :lo12:.LANCHOR65
+	bne	.L3147
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cbz	w0, .L3148
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
 	add	w21, w19, w19, lsl 1
@@ -19071,30 +19499,30 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L3045:
-	adrp	x1, .LANCHOR75
+.L3149:
+	adrp	x1, .LANCHOR72
 	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR65
+	add	x4, x24, :lo12:.LANCHOR62
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR75]
+	ldrh	w3, [x1, #:lo12:.LANCHOR72]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR147
-	ldr	x7, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR148
+	ldr	x7, [x0, #:lo12:.LANCHOR148]
 	sub	w3, w3, #1
-.L3048:
+.L3152:
 	cmp	w2, w8
-	blt	.L3050
-.L3077:
+	blt	.L3154
+.L3181:
 	mov	w23, 1
-	b	.L3046
-.L3044:
-	add	x0, x24, :lo12:.LANCHOR65
+	b	.L3150
+.L3148:
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR210
-	add	x0, x0, :lo12:.LANCHOR210
+	adrp	x0, .LANCHOR214
+	add	x0, x0, :lo12:.LANCHOR214
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19105,31 +19533,31 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L3045
-.L3046:
-	adrp	x0, .LANCHOR9
+	beq	.L3149
+.L3150:
+	adrp	x0, .LANCHOR14
 	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L3051
-	adrp	x0, .LANCHOR147
+	ldr	w1, [x0, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3155
+	adrp	x0, .LANCHOR148
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR147]
-	add	x0, x24, :lo12:.LANCHOR65
+	ldr	x2, [x0, #:lo12:.LANCHOR148]
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC208
+	adrp	x0, .LC209
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC208
+	add	x0, x0, :lo12:.LC209
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3051:
-	adrp	x0, .LANCHOR48
+.L3155:
+	adrp	x0, .LANCHOR49
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR49
 	str	x0, [x29, 120]
-.L3052:
+.L3156:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19137,78 +19565,78 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3064
+	blt	.L3168
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3065
+	beq	.L3169
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3066:
+.L3170:
 	cmp	w2, w3
-	blt	.L3072
+	blt	.L3176
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3071
-.L3043:
-	adrp	x0, .LANCHOR107
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbnz	w0, .L3047
-	add	x0, x24, :lo12:.LANCHOR65
+	b	.L3175
+.L3147:
+	adrp	x0, .LANCHOR104
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbnz	w0, .L3151
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3045
-.L3047:
-	add	x0, x24, :lo12:.LANCHOR65
+	b	.L3149
+.L3151:
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L3045
-.L3050:
+	b	.L3149
+.L3154:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3077
+	beq	.L3181
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L3049
+	bne	.L3153
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L3032
+	bcs	.L3136
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L3049:
+.L3153:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L3048
-.L3064:
+	b	.L3152
+.L3168:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3053
+	bne	.L3157
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3054
+	cbnz	x0, .L3158
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19216,17 +19644,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3032
-.L3054:
-	adrp	x0, .LANCHOR72
+	cbz	x0, .L3136
+.L3158:
+	adrp	x0, .LANCHOR69
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR75
-	adrp	x6, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x5, .LANCHOR72
+	adrp	x6, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR65
+	add	x1, x24, :lo12:.LANCHOR62
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR75]
+	ldrh	w7, [x5, #:lo12:.LANCHOR72]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -19237,32 +19665,32 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3055
-	adrp	x0, .LANCHOR146
-	adrp	x4, .LANCHOR76
+	bne	.L3159
+	adrp	x0, .LANCHOR147
+	adrp	x4, .LANCHOR73
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR146]
+	ldr	x1, [x0, #:lo12:.LANCHOR147]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR76]
+	ldrb	w2, [x4, #:lo12:.LANCHOR73]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR75]
-	ldrb	w1, [x4, #:lo12:.LANCHOR76]
+	ldrh	w0, [x5, #:lo12:.LANCHOR72]
+	ldrb	w1, [x4, #:lo12:.LANCHOR73]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR147]
+	ldr	x1, [x6, #:lo12:.LANCHOR148]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR123
+	adrp	x0, .LANCHOR121
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR123]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19271,41 +19699,41 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR75]
+	ldrh	w1, [x5, #:lo12:.LANCHOR72]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR76]
+	ldrb	w0, [x4, #:lo12:.LANCHOR73]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3053:
-	adrp	x0, .LANCHOR72
+.L3157:
+	adrp	x0, .LANCHOR69
 	ldr	w5, [x29, 156]
 	add	x1, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR72]
-	adrp	x0, .LANCHOR48
-	add	x3, x0, :lo12:.LANCHOR48
+	ldr	x4, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR49
+	add	x3, x0, :lo12:.LANCHOR49
 	ldrb	w2, [x4, x27]
 	ubfiz	x0, x2, 6, 8
 	add	x0, x3, x0
 	add	x3, x3, x2, lsl 6
 	str	x0, [x1, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR148
+	adrp	x5, .LANCHOR149
 	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x3, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR71]
+	ldrb	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w0, 3
-	bne	.L3059
+	bne	.L3163
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR108
-	ldrh	w6, [x6, #:lo12:.LANCHOR108]
+	adrp	x6, .LANCHOR105
+	ldrh	w6, [x6, #:lo12:.LANCHOR105]
 	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x1, x22, x1, sxtw 1
@@ -19317,18 +19745,18 @@ gc_do_copy_back:
 	ldrh	w6, [x3, 48]
 	orr	w1, w1, w21
 	str	w1, [x3, 40]
-	ldr	x3, [x5, #:lo12:.LANCHOR148]
+	ldr	x3, [x5, #:lo12:.LANCHOR149]
 	orr	w0, w1, w0, lsl 24
 	str	w0, [x3, x6, lsl 2]
-.L3060:
+.L3164:
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3063
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3167
 	ldr	x0, [x29, 120]
 	ldrb	w4, [x4, x27]
 	ldr	w1, [x29, 156]
 	add	x2, x0, x2, lsl 6
-	add	x0, x24, :lo12:.LANCHOR65
+	add	x0, x24, :lo12:.LANCHOR62
 	ldrb	w3, [x0, 6]
 	ldr	x0, [x2, 24]
 	ldrb	w7, [x2, 1]
@@ -19337,22 +19765,22 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC209
-	add	x0, x0, :lo12:.LC209
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x2, 40]
 	mov	w2, w23
 	bl	printf
-.L3063:
+.L3167:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3052
-.L3055:
+	b	.L3156
+.L3159:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR147]
+	ldr	x0, [x6, #:lo12:.LANCHOR148]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19362,10 +19790,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3057
-	adrp	x0, .LANCHOR102
+	bne	.L3161
+	adrp	x0, .LANCHOR99
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR102]
+	ldrh	w4, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -19373,146 +19801,146 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w2, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w2, [x1, #:lo12:.LANCHOR98]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3057
+	bne	.L3161
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3057
-	adrp	x1, .LANCHOR209
+	bne	.L3161
+	adrp	x1, .LANCHOR213
 	adrp	x0, .LC0
 	mov	w2, 710
-	add	x1, x1, :lo12:.LANCHOR209
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3057:
+.L3161:
 	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR56
-	ldr	w1, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR118
+	ldr	w1, [x1, #:lo12:.LANCHOR118]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3058
+	bcc	.L3162
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3058:
-	adrp	x1, .LANCHOR146
+.L3162:
+	adrp	x1, .LANCHOR147
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR146]
+	ldr	x1, [x1, #:lo12:.LANCHOR147]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3053
-.L3059:
+	b	.L3157
+.L3163:
 	cmp	w0, 2
-	bne	.L3061
-	adrp	x0, .LANCHOR107
-	adrp	x1, .LANCHOR108
-	ldrb	w0, [x0, #:lo12:.LANCHOR107]
-	cbnz	w0, .L3062
+	bne	.L3165
+	adrp	x0, .LANCHOR104
+	adrp	x1, .LANCHOR105
+	ldrb	w0, [x0, #:lo12:.LANCHOR104]
+	cbnz	w0, .L3166
 	ldr	w0, [x29, 156]
-	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
-.L3120:
+.L3224:
 	orr	w0, w0, 33554432
 	str	w0, [x3, 40]
-.L3061:
+.L3165:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x2, lsl 6
 	ldrh	w1, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR148]
+	ldr	x0, [x5, #:lo12:.LANCHOR149]
 	str	w3, [x0, x1, lsl 2]
-	b	.L3060
-.L3062:
+	b	.L3164
+.L3166:
 	add	w0, w19, w26, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x1, #:lo12:.LANCHOR105]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w1, w21
 	and	w1, w26, 1
 	add	w0, w0, w1
-	b	.L3120
-.L3065:
-	adrp	x1, .LANCHOR73
-	ldrb	w3, [x1, #:lo12:.LANCHOR73]
+	b	.L3224
+.L3169:
+	adrp	x1, .LANCHOR70
+	ldrb	w3, [x1, #:lo12:.LANCHOR70]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3067
-.L3070:
+	cbz	w3, .L3171
+.L3174:
 	strb	wzr, [x1, 60]
-	b	.L3068
-.L3067:
+	b	.L3172
+.L3171:
 	cmp	w23, 1
-	bne	.L3069
+	bne	.L3173
 	mov	w3, 9
-.L3119:
+.L3223:
 	strb	w3, [x1, 60]
-.L3068:
+.L3172:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3071:
-	adrp	x1, .LANCHOR73
+.L3175:
+	adrp	x1, .LANCHOR70
 	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
 	and	w0, w3, 65535
-	cbz	w1, .L3073
+	cbz	w1, .L3177
 	add	w0, w0, w0, lsl 1
-.L3074:
-	adrp	x1, .LANCHOR100
-	add	x24, x24, :lo12:.LANCHOR65
-	ldr	x1, [x1, #:lo12:.LANCHOR100]
+.L3178:
+	adrp	x1, .LANCHOR97
+	add	x24, x24, :lo12:.LANCHOR62
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
 	ldrh	w1, [x24, 314]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR72
 	and	w0, w0, 65535
 	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR72]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3075
+	blt	.L3179
 	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x0, #:lo12:.LANCHOR10]
 	strh	wzr, [x0, 86]
-.L3075:
+.L3179:
 	bl	gc_write_completed
-	b	.L3032
-.L3069:
+	b	.L3136
+.L3173:
 	cmp	w23, 2
-	bne	.L3070
+	bne	.L3174
 	mov	w3, 13
-	b	.L3119
-.L3072:
+	b	.L3223
+.L3176:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3066
-.L3073:
-	adrp	x1, .LANCHOR107
-	ldrb	w2, [x1, #:lo12:.LANCHOR107]
+	b	.L3170
+.L3177:
+	adrp	x1, .LANCHOR104
+	ldrb	w2, [x1, #:lo12:.LANCHOR104]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3074
+	b	.L3178
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
@@ -19520,156 +19948,156 @@ gc_do_copy_back:
 	.type	zftl_do_gc, %function
 zftl_do_gc:
 	sub	sp, sp, #128
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR94
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x21, x22, [sp, 48]
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR144
-	ldrh	w22, [x1, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR93
+	adrp	x19, .LANCHOR145
+	ldrh	w22, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR90
 	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR6
-	ldrh	w21, [x1, #:lo12:.LANCHOR93]
+	adrp	x23, .LANCHOR10
+	ldrh	w21, [x1, #:lo12:.LANCHOR90]
 	stp	x25, x26, [sp, 80]
-	ldrb	w1, [x19, #:lo12:.LANCHOR144]
+	ldrb	w1, [x19, #:lo12:.LANCHOR145]
 	add	w21, w22, w21
 	stp	x27, x28, [sp, 96]
-	ldr	x24, [x23, #:lo12:.LANCHOR6]
+	ldr	x24, [x23, #:lo12:.LANCHOR10]
 	cmp	w1, 6
-	bhi	.L3226
+	bhi	.L3330
 	mov	w26, w0
 	and	w21, w21, 65535
-	adrp	x0, .L3124
-	add	x0, x0, :lo12:.L3124
+	adrp	x0, .L3228
+	add	x0, x0, :lo12:.L3228
 	ldrh	w0, [x0,w1,uxtw #1]
-	adr	x1, .Lrtx3124
+	adr	x1, .Lrtx3228
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3124:
+.Lrtx3228:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3124:
-	.2byte	(.L3123 - .Lrtx3124) / 4
-	.2byte	(.L3125 - .Lrtx3124) / 4
-	.2byte	(.L3126 - .Lrtx3124) / 4
-	.2byte	(.L3127 - .Lrtx3124) / 4
-	.2byte	(.L3128 - .Lrtx3124) / 4
-	.2byte	(.L3129 - .Lrtx3124) / 4
-	.2byte	(.L3130 - .Lrtx3124) / 4
+.L3228:
+	.2byte	(.L3227 - .Lrtx3228) / 4
+	.2byte	(.L3229 - .Lrtx3228) / 4
+	.2byte	(.L3230 - .Lrtx3228) / 4
+	.2byte	(.L3231 - .Lrtx3228) / 4
+	.2byte	(.L3232 - .Lrtx3228) / 4
+	.2byte	(.L3233 - .Lrtx3228) / 4
+	.2byte	(.L3234 - .Lrtx3228) / 4
 	.section	.text.zftl_do_gc
-.L3129:
-	adrp	x20, .LANCHOR65
-	add	x24, x20, :lo12:.LANCHOR65
+.L3233:
+	adrp	x20, .LANCHOR62
+	add	x24, x20, :lo12:.LANCHOR62
 	mov	w22, 0
-.L3131:
+.L3235:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3222
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
-	add	x20, x20, :lo12:.LANCHOR65
+	cbz	w0, .L3326
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	add	x20, x20, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
-	ldr	x1, [x23, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR97
+	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	strb	wzr, [x19, #:lo12:.LANCHOR145]
 	str	xzr, [x20, 8]
-	b	.L3290
-.L3123:
-	adrp	x0, .LANCHOR95
-	adrp	x28, .LANCHOR88
-	adrp	x27, .LANCHOR86
+	b	.L3394
+.L3227:
+	adrp	x0, .LANCHOR92
+	adrp	x28, .LANCHOR85
+	adrp	x27, .LANCHOR83
 	ldrh	w1, [x24, 80]
-	ldrh	w0, [x0, #:lo12:.LANCHOR95]
-	ldrh	w25, [x28, #:lo12:.LANCHOR88]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w25, [x28, #:lo12:.LANCHOR85]
 	add	w22, w22, w0
-	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	and	w22, w22, 65535
 	add	w25, w25, w0
 	mov	w0, 65535
 	and	w25, w25, 65535
 	cmp	w1, w0
-	beq	.L3132
-	cbnz	w26, .L3133
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	beq	.L3236
+	cbnz	w26, .L3237
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w21, w0, lsl 1
-	blt	.L3133
-.L3226:
+	blt	.L3237
+.L3330:
 	mov	w20, 16
-	b	.L3121
-.L3133:
-	adrp	x5, .LANCHOR85
+	b	.L3225
+.L3237:
+	adrp	x5, .LANCHOR82
 	mov	w1, 5
-	adrp	x26, .LANCHOR74
-	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+	adrp	x26, .LANCHOR71
+	ldrh	w0, [x5, #:lo12:.LANCHOR82]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x5, #:lo12:.LANCHOR85]
+	strh	w0, [x5, #:lo12:.LANCHOR82]
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3134
-	adrp	x4, .LANCHOR5
+	beq	.L3238
+	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR145
+	adrp	x1, .LANCHOR146
 	mov	x20, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR5]
-	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
+	ldr	w2, [x1, #:lo12:.LANCHOR146]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR145]
+	str	w2, [x1, #:lo12:.LANCHOR146]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR80
+	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3135
-	adrp	x1, .LANCHOR2
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	bcs	.L3239
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3134
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3238
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3134
-.L3135:
-	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	bls	.L3238
+.L3239:
+	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L3136
+	cbz	w0, .L3240
 	mov	w0, 1
-	str	wzr, [x20, #:lo12:.LANCHOR145]
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3134:
-	strh	wzr, [x5, #:lo12:.LANCHOR85]
-.L3136:
+	str	wzr, [x20, #:lo12:.LANCHOR146]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3238:
+	strh	wzr, [x5, #:lo12:.LANCHOR82]
+.L3240:
 	cmp	w22, 15
-	bls	.L3228
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3332
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bhi	.L3228
+	bhi	.L3332
 	cmp	w25, 0
 	cset	w20, eq
 	add	w20, w20, 1
-.L3137:
-	adrp	x0, .LANCHOR9
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 8, .L3138
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+.L3241:
+	adrp	x0, .LANCHOR14
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 8, .L3242
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w4, w22
-	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	ldrb	w2, [x26, #:lo12:.LANCHOR71]
 	mov	w3, w21
 	mov	w1, 1848
 	ldrh	w7, [x0, 122]
@@ -19677,74 +20105,74 @@ zftl_do_gc:
 	ldrh	w5, [x0, 124]
 	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC210
-	add	x0, x0, :lo12:.LC210
+	adrp	x0, .LC211
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3138:
-	ldrb	w0, [x26, #:lo12:.LANCHOR74]
+.L3242:
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3139
-.L3140:
+	ble	.L3243
+.L3244:
 	mov	w0, 1
-.L3292:
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3228:
+.L3396:
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3332:
 	mov	w20, 2
-	b	.L3137
-.L3139:
-	ldrb	w0, [x26, #:lo12:.LANCHOR74]
+	b	.L3241
+.L3243:
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	mov	w2, 1
 	mov	w1, 3
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	bgt	.L3140
-	b	.L3226
-.L3132:
+	bgt	.L3244
+	b	.L3330
+.L3236:
 	cmp	w26, 1
-	bne	.L3142
+	bne	.L3246
 	bl	gc_scan_static_data
-	adrp	x24, .LANCHOR74
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	adrp	x24, .LANCHOR71
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w0, [x0, 122]
-	cbz	w0, .L3143
-.L3144:
+	cbz	w0, .L3247
+.L3248:
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR74]
-	b	.L3292
-.L3143:
+	strb	w0, [x24, #:lo12:.LANCHOR71]
+	b	.L3396
+.L3247:
 	bl	gc_static_wearleveling
 	mov	w20, w0
-	cbnz	w0, .L3144
-	cbnz	w22, .L3145
-.L3149:
+	cbnz	w0, .L3248
+	cbnz	w22, .L3249
+.L3253:
 	mov	w20, 16
-.L3146:
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
-	adrp	x3, .LANCHOR74
+.L3250:
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	adrp	x3, .LANCHOR71
 	mov	w1, 1
 	mov	x23, x3
-	strb	w1, [x3, #:lo12:.LANCHOR74]
+	strb	w1, [x3, #:lo12:.LANCHOR71]
 	ldrh	w5, [x0, 124]
-	cbz	w5, .L3154
-	strb	w1, [x19, #:lo12:.LANCHOR144]
-	adrp	x1, .LANCHOR9
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	ldr	w1, [x1, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L3121
+	cbz	w5, .L3258
+	strb	w1, [x19, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR14
+	strb	wzr, [x3, #:lo12:.LANCHOR71]
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3225
 	ldrh	w7, [x0, 122]
 	mov	w4, w22
 	ldrh	w6, [x0, 120]
 	mov	w3, w21
-	adrp	x0, .LC211
+	adrp	x0, .LC212
 	mov	w2, 0
 	mov	w1, 1946
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L3121:
+.L3225:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -19754,221 +20182,221 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 128
 	ret
-.L3145:
+.L3249:
 	cmp	w21, w25
-	adrp	x1, .LANCHOR90
-	adrp	x2, .LANCHOR87
-	bcs	.L3147
-	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR87
+	adrp	x2, .LANCHOR84
+	bcs	.L3251
+	ldrh	w0, [x2, #:lo12:.LANCHOR84]
 	cmp	w21, w0, lsl 1
-	blt	.L3148
-.L3147:
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	blt	.L3252
+.L3251:
+	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	add	w0, w21, w25
 	cmp	w0, w2, lsl 1
-	blt	.L3148
-	adrp	x0, .LANCHOR91
-	ldrh	w2, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	blt	.L3252
+	adrp	x0, .LANCHOR88
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bcc	.L3149
-.L3148:
-	adrp	x5, .LANCHOR145
-	adrp	x2, .LANCHOR2
+	bcc	.L3253
+.L3252:
+	adrp	x5, .LANCHOR146
+	adrp	x2, .LANCHOR6
 	mov	w6, 1
-	strb	w6, [x24, #:lo12:.LANCHOR74]
-	ldr	w0, [x5, #:lo12:.LANCHOR145]
-	ldrh	w2, [x2, #:lo12:.LANCHOR2]
+	strb	w6, [x24, #:lo12:.LANCHOR71]
+	ldr	w0, [x5, #:lo12:.LANCHOR146]
+	ldrh	w2, [x2, #:lo12:.LANCHOR6]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR145]
+	str	w0, [x5, #:lo12:.LANCHOR146]
 	cmp	w0, w2, lsr 5
-	bls	.L3150
-	ldrh	w0, [x1, #:lo12:.LANCHOR90]
+	bls	.L3254
+	ldrh	w0, [x1, #:lo12:.LANCHOR87]
 	cmp	w0, w22
-	bls	.L3150
+	bls	.L3254
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3149
-	adrp	x1, .LANCHOR5
+	beq	.L3253
+	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bgt	.L3149
+	bgt	.L3253
 	mov	w0, w6
-	str	wzr, [x5, #:lo12:.LANCHOR145]
+	str	wzr, [x5, #:lo12:.LANCHOR146]
 	mov	w2, 4
 	mov	w1, 2
-.L3280:
+.L3384:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-	cbz	w0, .L3149
-	b	.L3140
-.L3150:
-	adrp	x0, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cbz	w0, .L3253
+	b	.L3244
+.L3254:
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bcc	.L3152
+	bcc	.L3256
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
-	b	.L3280
-.L3152:
-	ldrh	w0, [x28, #:lo12:.LANCHOR88]
-	cbnz	w0, .L3153
-	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	b	.L3384
+.L3256:
+	ldrh	w0, [x28, #:lo12:.LANCHOR85]
+	cbnz	w0, .L3257
+	ldrh	w0, [x27, #:lo12:.LANCHOR83]
 	cmp	w0, 8
-	bls	.L3146
-.L3153:
+	bls	.L3250
+.L3257:
 	mov	w1, 1
 	mov	w2, 4
 	mov	w0, w1
-	b	.L3280
-.L3142:
-	adrp	x0, .LANCHOR77
-	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	b	.L3384
+.L3246:
+	adrp	x0, .LANCHOR74
+	ldrh	w0, [x0, #:lo12:.LANCHOR74]
 	cmp	w0, w21
-	bcc	.L3226
-	b	.L3149
-.L3154:
-	adrp	x2, .LANCHOR77
+	bcc	.L3330
+	b	.L3253
+.L3258:
+	adrp	x2, .LANCHOR74
 	mov	x24, x2
-	ldrh	w4, [x2, #:lo12:.LANCHOR77]
+	ldrh	w4, [x2, #:lo12:.LANCHOR74]
 	cmp	w21, w4
-	bcs	.L3155
-	cbz	w22, .L3156
+	bcs	.L3259
+	cbz	w22, .L3260
 	cmp	w22, 16
-	bls	.L3157
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3261
+	adrp	x0, .LANCHOR87
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3157
+	bhi	.L3261
 	str	x3, [x29, 104]
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ldr	x3, [x29, 104]
 	tst	w0, 65535
-	bne	.L3158
-	ldrb	w0, [x3, #:lo12:.LANCHOR74]
+	bne	.L3262
+	ldrb	w0, [x3, #:lo12:.LANCHOR71]
 	mov	w2, 4
 	mov	w1, 3
-.L3282:
+.L3386:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3159:
-	cbnz	w0, .L3161
-	b	.L3121
-.L3158:
+.L3263:
+	cbnz	w0, .L3265
+	b	.L3225
+.L3262:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
 	and	w3, w0, 65535
 	mov	w1, 65535
 	cmp	w3, w1
-	beq	.L3161
-	adrp	x4, .LANCHOR5
+	beq	.L3265
+	adrp	x4, .LANCHOR9
 	ubfiz	x3, x3, 1, 16
-	adrp	x1, .LANCHOR145
+	adrp	x1, .LANCHOR146
 	mov	x21, x1
-	ldr	x4, [x4, #:lo12:.LANCHOR5]
-	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	ldr	x4, [x4, #:lo12:.LANCHOR9]
+	ldr	w2, [x1, #:lo12:.LANCHOR146]
 	add	w2, w2, 1
-	str	w2, [x1, #:lo12:.LANCHOR145]
+	str	w2, [x1, #:lo12:.LANCHOR146]
 	ldrh	w3, [x4, x3]
-	adrp	x4, .LANCHOR83
-	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	adrp	x4, .LANCHOR80
+	ldrh	w4, [x4, #:lo12:.LANCHOR80]
 	cmp	w4, w3
-	bcs	.L3162
-	adrp	x1, .LANCHOR2
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	bcs	.L3266
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
 	cmp	w2, w1, lsr 4
-	bls	.L3161
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	bls	.L3265
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w1, w3
-	bls	.L3161
-.L3162:
-	ldrb	w2, [x23, #:lo12:.LANCHOR74]
+	bls	.L3265
+.L3266:
+	ldrb	w2, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 0
 	bl	gc_add_sblk
-	str	wzr, [x21, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR119
+	str	wzr, [x21, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR116
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR119]
-.L3161:
+	str	w1, [x0, #:lo12:.LANCHOR116]
+.L3265:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	b	.L3121
-.L3157:
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	b	.L3225
+.L3261:
 	mov	w2, 1
 	mov	w0, w2
 	mov	w1, 2
-.L3289:
+.L3393:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3161
+	bne	.L3265
 	mov	w2, 2
-.L3285:
+.L3389:
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
-	b	.L3282
-.L3156:
-	adrp	x1, .LANCHOR9
-	strb	wzr, [x3, #:lo12:.LANCHOR74]
-	ldr	w1, [x1, #:lo12:.LANCHOR9]
-	tbz	x1, 8, .L3164
+	ldrb	w0, [x23, #:lo12:.LANCHOR71]
+	b	.L3386
+.L3260:
+	adrp	x1, .LANCHOR14
+	strb	wzr, [x3, #:lo12:.LANCHOR71]
+	ldr	w1, [x1, #:lo12:.LANCHOR14]
+	tbz	x1, 8, .L3268
 	ldrh	w7, [x0, 122]
 	mov	w5, 0
 	ldrh	w6, [x0, 120]
 	mov	w4, 0
-	adrp	x0, .LC211
+	adrp	x0, .LC212
 	mov	w3, w21
 	mov	w2, 0
 	mov	w1, 1976
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L3164:
+.L3268:
 	cmp	w21, 16
-	bls	.L3165
+	bls	.L3269
 	mov	w2, 4
-	b	.L3285
-.L3165:
+	b	.L3389
+.L3269:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, w2
-	b	.L3289
-.L3155:
+	b	.L3393
+.L3259:
 	cmp	w26, 1
-	bne	.L3121
+	bne	.L3225
 	cmp	w21, w4, lsl 1
-	bge	.L3166
+	bge	.L3270
 	cmp	w25, w22, lsr 1
-	bcs	.L3167
-	adrp	x0, .LANCHOR90
-	ldrh	w1, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	cmp	w1, w0
-	bcs	.L3167
+	bcs	.L3271
 	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w1, w0
+	bcs	.L3271
+	adrp	x0, .LANCHOR84
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3121
-.L3167:
+	strh	w0, [x2, #:lo12:.LANCHOR74]
+	b	.L3225
+.L3271:
 	mov	w1, 5
 	mov	w0, 0
 	bl	zftl_get_gc_node
@@ -19976,55 +20404,55 @@ zftl_do_gc:
 	mov	w1, 65535
 	mov	w3, w26
 	cmp	w26, w1
-	bne	.L3168
-.L3173:
+	bne	.L3272
+.L3277:
 	cmp	w22, 1
-	bhi	.L3169
-.L3170:
+	bhi	.L3273
+.L3274:
 	cmp	w21, w25
-	adrp	x21, .LANCHOR87
-	bcs	.L3177
-	strb	wzr, [x23, #:lo12:.LANCHOR74]
+	adrp	x21, .LANCHOR84
+	bcs	.L3281
+	strb	wzr, [x23, #:lo12:.LANCHOR71]
 	mov	w0, 4
-	bl	zftl_get_gc_node.part.10
+	bl	zftl_get_gc_node.part.9
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L3177
-	adrp	x1, .LANCHOR5
+	beq	.L3281
+	adrp	x1, .LANCHOR9
 	ubfiz	x0, x0, 1, 16
-	adrp	x2, .LANCHOR76
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
-	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR73
+	ldr	x1, [x1, #:lo12:.LANCHOR9]
+	ldrb	w2, [x2, #:lo12:.LANCHOR73]
 	ldrh	w1, [x1, x0]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0, lsr 1
-	ble	.L3179
-.L3177:
-	ldrh	w0, [x21, #:lo12:.LANCHOR87]
+	ble	.L3283
+.L3281:
+	ldrh	w0, [x21, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x24, #:lo12:.LANCHOR77]
-	b	.L3121
-.L3168:
-	adrp	x2, .LANCHOR145
-	adrp	x4, .LANCHOR2
+	strh	w0, [x24, #:lo12:.LANCHOR74]
+	b	.L3225
+.L3272:
+	adrp	x2, .LANCHOR146
+	adrp	x4, .LANCHOR6
 	uxtw	x26, w26
-	ldr	w1, [x2, #:lo12:.LANCHOR145]
-	ldrh	w4, [x4, #:lo12:.LANCHOR2]
+	ldr	w1, [x2, #:lo12:.LANCHOR146]
+	ldrh	w4, [x4, #:lo12:.LANCHOR6]
 	add	w1, w1, 1
-	str	w1, [x2, #:lo12:.LANCHOR145]
+	str	w1, [x2, #:lo12:.LANCHOR146]
 	cmp	w1, w4, lsr 4
-	adrp	x4, .LANCHOR5
-	bls	.L3171
-	ldr	x1, [x4, #:lo12:.LANCHOR5]
-	str	wzr, [x2, #:lo12:.LANCHOR145]
+	adrp	x4, .LANCHOR9
+	bls	.L3275
+	ldr	x1, [x4, #:lo12:.LANCHOR9]
+	str	wzr, [x2, #:lo12:.LANCHOR146]
 	ldrh	w2, [x1, x26, lsl 1]
-	adrp	x1, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	adrp	x1, .LANCHOR86
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
 	cmp	w2, w1
-	bcs	.L3171
+	bcs	.L3275
 	str	x4, [x29, 96]
 	mov	w2, 1
 	str	w3, [x29, 104]
@@ -20032,398 +20460,398 @@ zftl_do_gc:
 	bl	gc_add_sblk
 	ldr	w3, [x29, 104]
 	ldr	x4, [x29, 96]
-	cbnz	w0, .L3161
-.L3171:
-	ldr	x0, [x4, #:lo12:.LANCHOR5]
+	cbnz	w0, .L3265
+.L3275:
+	ldr	x0, [x4, #:lo12:.LANCHOR9]
 	ldrh	w1, [x0, x26, lsl 1]
-	adrp	x0, .LANCHOR83
-	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0, lsr 1
-	bhi	.L3172
+	bhi	.L3276
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w3
 	bl	gc_add_sblk
-	b	.L3161
-.L3172:
-	ldrh	w2, [x27, #:lo12:.LANCHOR86]
-	ldrh	w0, [x28, #:lo12:.LANCHOR88]
+	b	.L3265
+.L3276:
+	ldrh	w2, [x27, #:lo12:.LANCHOR83]
+	ldrh	w0, [x28, #:lo12:.LANCHOR85]
 	add	w0, w0, w2
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR84
+	ldrh	w2, [x2, #:lo12:.LANCHOR84]
 	cmp	w0, w2, lsl 1
-	ble	.L3173
-	adrp	x0, .LANCHOR89
-	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	ble	.L3277
+	adrp	x0, .LANCHOR86
+	ldrh	w0, [x0, #:lo12:.LANCHOR86]
 	cmp	w0, w1
-	bcc	.L3170
-	b	.L3173
-.L3169:
+	bcc	.L3274
+	b	.L3277
+.L3273:
 	mov	w1, 1
-	strb	w1, [x23, #:lo12:.LANCHOR74]
+	strb	w1, [x23, #:lo12:.LANCHOR71]
 	cmp	w22, 16
-	bls	.L3174
-	adrp	x0, .LANCHOR90
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bls	.L3278
+	adrp	x0, .LANCHOR87
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w2, w0
-	bhi	.L3174
+	bhi	.L3278
 	mov	w2, 4
 	mov	w0, w1
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3175
+	bne	.L3279
 	mov	w2, 4
-.L3281:
-	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+.L3385:
+	ldrb	w0, [x23, #:lo12:.LANCHOR71]
 	mov	w1, 3
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3175:
-	adrp	x1, .LANCHOR87
+.L3279:
+	adrp	x1, .LANCHOR84
 	cmp	w21, w25, lsr 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	bls	.L3283
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	bls	.L3387
 	lsr	w1, w1, 2
-.L3284:
-	strh	w1, [x24, #:lo12:.LANCHOR77]
-	b	.L3159
-.L3174:
+.L3388:
+	strh	w1, [x24, #:lo12:.LANCHOR74]
+	b	.L3263
+.L3278:
 	mov	w2, 1
 	mov	w1, 2
 	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3175
+	bne	.L3279
 	mov	w2, 2
-	b	.L3281
-.L3179:
+	b	.L3385
+.L3283:
 	mov	w1, 3
 	mov	w2, 4
 	mov	w0, 0
 	bl	gc_search_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR87]
+	ldrh	w1, [x21, #:lo12:.LANCHOR84]
 	and	w0, w0, 65535
-.L3283:
+.L3387:
 	lsr	w1, w1, 1
-	b	.L3284
-.L3166:
-	adrp	x0, .LANCHOR87
+	b	.L3388
+.L3270:
+	adrp	x0, .LANCHOR84
 	mov	w20, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w0, [x0, #:lo12:.LANCHOR84]
 	lsr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR77]
-	b	.L3121
-.L3125:
-	adrp	x7, .LANCHOR65
+	strh	w0, [x2, #:lo12:.LANCHOR74]
+	b	.L3225
+.L3229:
+	adrp	x7, .LANCHOR62
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR65]
+	ldrh	w1, [x7, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bne	.L3180
+	bne	.L3284
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR65]
-.L3180:
-	ldrh	w3, [x7, #:lo12:.LANCHOR65]
+	strh	w0, [x7, #:lo12:.LANCHOR62]
+.L3284:
+	ldrh	w3, [x7, #:lo12:.LANCHOR62]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR65
+	add	x1, x7, :lo12:.LANCHOR62
 	cmp	w3, w0
-	beq	.L3291
-	adrp	x0, .LANCHOR3
+	beq	.L3395
+	adrp	x0, .LANCHOR7
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
-	ldr	x2, [x0, #:lo12:.LANCHOR3]
+	ldr	x2, [x0, #:lo12:.LANCHOR7]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3182
+	cbz	w5, .L3286
 	add	x1, x1, 58
 	mov	w0, 0
-.L3184:
+.L3288:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3183
-.L3188:
-	adrp	x0, .LANCHOR65
+	bne	.L3287
+.L3292:
+	adrp	x0, .LANCHOR62
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR65]
-	b	.L3226
-.L3183:
+	strh	w1, [x0, #:lo12:.LANCHOR62]
+	b	.L3330
+.L3287:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3184
-.L3182:
+	bne	.L3288
+.L3286:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3185
+	beq	.L3289
 	tst	w0, 192
-	bne	.L3186
-.L3185:
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	bne	.L3290
+.L3289:
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3188
+	cbz	w0, .L3292
 	mov	w2, 2209
-	adrp	x1, .LANCHOR211
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3188
-.L3186:
-	mov	w0, 2
 	b	.L3292
-.L3126:
+.L3290:
+	mov	w0, 2
+	b	.L3396
+.L3230:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3189
+	bne	.L3293
 	mov	w0, 3
-	b	.L3292
-.L3189:
-	adrp	x20, .LANCHOR65
+	b	.L3396
+.L3293:
+	adrp	x20, .LANCHOR62
 	mov	w2, 65535
-	add	x0, x20, :lo12:.LANCHOR65
-	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+	add	x0, x20, :lo12:.LANCHOR62
+	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	cmp	w1, w2
-	beq	.L3140
+	beq	.L3244
 	ldrh	w2, [x0, 24]
-	cbz	w2, .L3190
+	cbz	w2, .L3294
 	mov	w1, 4
 	strh	wzr, [x0, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3190:
+	strb	w1, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3294:
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR5
+	strb	w0, [x19, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR9
 	ubfiz	x1, x1, 1, 16
 	mov	x19, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	ldr	x2, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L3191
-	adrp	x1, .LANCHOR211
+	cbz	w1, .L3295
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2237
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3191:
-	ldrh	w0, [x20, #:lo12:.LANCHOR65]
-	add	x21, x20, :lo12:.LANCHOR65
+.L3295:
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	add	x21, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
+	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3192
+	bhi	.L3296
 	strh	w0, [x21, 30]
-	b	.L3188
-.L3192:
+	b	.L3292
+.L3296:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3188
-.L3127:
-	adrp	x20, .LANCHOR65
-	adrp	x23, .LANCHOR83
-	add	x22, x20, :lo12:.LANCHOR65
-	add	x23, x23, :lo12:.LANCHOR83
-.L3261:
+	b	.L3292
+.L3231:
+	adrp	x20, .LANCHOR62
+	adrp	x23, .LANCHOR80
+	add	x22, x20, :lo12:.LANCHOR62
+	add	x23, x23, :lo12:.LANCHOR80
+.L3365:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3194
+	bcs	.L3298
 	cmp	w21, 7
-	bls	.L3261
-	b	.L3226
-.L3194:
+	bls	.L3365
+	b	.L3330
+.L3298:
 	ldrh	w3, [x22, 24]
-	adrp	x0, .LANCHOR9
-	cbz	w3, .L3195
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR14
+	cbz	w3, .L3299
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w1, 4
 	strh	wzr, [x22, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR144]
-	adrp	x19, .LANCHOR5
-	tbz	x0, 8, .L3196
+	strb	w1, [x19, #:lo12:.LANCHOR145]
+	adrp	x19, .LANCHOR9
+	tbz	x0, 8, .L3300
 	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3196:
-	ldrh	w2, [x20, #:lo12:.LANCHOR65]
-	add	x0, x20, :lo12:.LANCHOR65
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
+.L3300:
+	ldrh	w2, [x20, #:lo12:.LANCHOR62]
+	add	x0, x20, :lo12:.LANCHOR62
+	ldr	x1, [x19, #:lo12:.LANCHOR9]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3197
-	adrp	x1, .LANCHOR211
+	beq	.L3301
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2271
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3197:
-	add	x0, x20, :lo12:.LANCHOR65
-	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+.L3301:
+	add	x0, x20, :lo12:.LANCHOR62
+	ldrh	w1, [x20, #:lo12:.LANCHOR62]
 	ldrh	w2, [x0, 24]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x19, #:lo12:.LANCHOR9]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3226
-.L3195:
-	adrp	x2, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	b	.L3330
+.L3299:
+	adrp	x2, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	ldrh	w1, [x22]
-	ldr	x21, [x2, #:lo12:.LANCHOR3]
+	ldr	x21, [x2, #:lo12:.LANCHOR7]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR144]
+	strb	w2, [x19, #:lo12:.LANCHOR145]
 	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L3198
+	tbz	x0, 8, .L3302
 	ldrb	w2, [x21, 2]
-	adrp	x0, .LC213
-	add	x0, x0, :lo12:.LC213
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3198:
+.L3302:
 	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3199
+	beq	.L3303
 	tst	w0, 192
-	bne	.L3200
-.L3199:
-	adrp	x1, .LANCHOR211
+	bne	.L3304
+.L3303:
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2281
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3200:
-	ldrh	w0, [x20, #:lo12:.LANCHOR65]
-	add	x19, x20, :lo12:.LANCHOR65
+.L3304:
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
+	add	x19, x20, :lo12:.LANCHOR62
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR65]
+	strh	w0, [x20, #:lo12:.LANCHOR62]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3201
+	bhi	.L3305
 	strh	w0, [x19, 30]
-	b	.L3226
-.L3201:
+	b	.L3330
+.L3305:
 	strh	wzr, [x19, 30]
-.L3290:
+.L3394:
 	bl	flt_sys_flush
-	b	.L3226
-.L3128:
+	b	.L3330
+.L3232:
 	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3202
-	adrp	x0, .LANCHOR74
-	ldrb	w22, [x0, #:lo12:.LANCHOR74]
+	bne	.L3306
+	adrp	x0, .LANCHOR71
+	ldrb	w22, [x0, #:lo12:.LANCHOR71]
 	cmp	w22, 1
-	bne	.L3202
+	bne	.L3306
 	bl	ftl_flush
-	adrp	x0, .LANCHOR65
-	add	x1, x0, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR62
+	add	x1, x0, :lo12:.LANCHOR62
 	mov	x20, x0
 	ldrh	w1, [x1, 318]
-	cbz	w1, .L3203
+	cbz	w1, .L3307
 	mov	w0, w22
 	mov	w1, 5
-.L3287:
+.L3391:
 	bl	zftl_gc_get_free_sblk
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L3205
-	adrp	x0, .LANCHOR3
-	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	beq	.L3309
+	adrp	x0, .LANCHOR7
+	ldr	x21, [x0, #:lo12:.LANCHOR7]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3206
-	adrp	x1, .LANCHOR211
+	beq	.L3310
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2310
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3206:
+.L3310:
 	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x21, 2]
-.L3225:
+.L3329:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR75
+	adrp	x22, .LANCHOR72
 	mov	w0, 5
 	strb	w0, [x24, 84]
 	add	x1, x24, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR83
-	adrp	x21, .LANCHOR76
+	adrp	x1, .LANCHOR80
+	adrp	x21, .LANCHOR73
 	strb	w0, [x24, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrh	w2, [x22, #:lo12:.LANCHOR72]
 	strh	w19, [x24, 80]
 	strh	wzr, [x24, 82]
 	mul	w0, w0, w1
 	strb	wzr, [x24, 85]
 	strh	w0, [x24, 86]
 	mov	w1, 255
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	strh	wzr, [x24, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR146
-	ldr	x0, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR147
-	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR148
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	ldrb	w0, [x21, #:lo12:.LANCHOR73]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrh	w2, [x22, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR72
-	ldr	x0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR69
+	ldr	x0, [x0, #:lo12:.LANCHOR69]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	mov	w1, -1
 	str	w19, [x0, 132]
 	strh	w1, [x0, 128]
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR97
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 126]
-	add	x0, x20, :lo12:.LANCHOR65
+	add	x0, x20, :lo12:.LANCHOR62
 	str	w1, [x0, 324]
 	strh	wzr, [x0, 314]
 	strh	wzr, [x0, 56]
@@ -20431,118 +20859,118 @@ zftl_do_gc:
 	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3226
-.L3203:
+	b	.L3330
+.L3307:
 	mov	w1, 5
 	mov	w0, 0
-	b	.L3287
-.L3202:
+	b	.L3391
+.L3306:
 	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
 	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR74
-	adrp	x21, .LANCHOR65
+	adrp	x25, .LANCHOR71
+	adrp	x21, .LANCHOR62
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR74
-	add	x20, x21, :lo12:.LANCHOR65
+	add	x25, x25, :lo12:.LANCHOR71
+	add	x20, x21, :lo12:.LANCHOR62
 	add	x26, x24, 80
-.L3209:
+.L3313:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3226
+	beq	.L3330
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3210
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	cbnz	w0, .L3314
+	adrp	x0, .LANCHOR51
+	ldrb	w0, [x0, #:lo12:.LANCHOR51]
 	cmp	w0, 3
-	bhi	.L3211
+	bhi	.L3315
 	bl	ftl_write_commit
-.L3211:
+.L3315:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3209
+	bcc	.L3313
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR9
 	ldrh	w2, [x20]
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x1, [x0, #:lo12:.LANCHOR9]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3213
-	adrp	x1, .LANCHOR211
+	cbz	w1, .L3317
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
 	mov	w2, 2385
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3213:
-	ldrh	w0, [x21, #:lo12:.LANCHOR65]
-	ldr	x2, [x19, #:lo12:.LANCHOR5]
+.L3317:
+	ldrh	w0, [x21, #:lo12:.LANCHOR62]
+	ldr	x2, [x19, #:lo12:.LANCHOR9]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3214
+	cbnz	w1, .L3318
 	bl	ftl_free_sblk
-	b	.L3188
-.L3214:
+	b	.L3292
+.L3318:
 	mov	w2, 1
 	mov	w1, 0
 	bl	gc_add_sblk
-	b	.L3188
-.L3210:
+	b	.L3292
+.L3314:
 	ldrh	w0, [x20, 320]
-	cbz	w0, .L3215
+	cbz	w0, .L3319
 	ldr	w0, [x20, 324]
 	strh	wzr, [x20, 320]
 	cmn	w0, #1
-	beq	.L3216
+	beq	.L3320
 	bl	ftl_mask_bad_block
-.L3216:
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
-	add	x20, x21, :lo12:.LANCHOR65
+.L3320:
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
+	add	x20, x21, :lo12:.LANCHOR62
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR100
-	ldr	x1, [x23, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR97
+	ldr	x1, [x23, #:lo12:.LANCHOR10]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR100]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3217
+	cbz	x0, .L3321
 	bl	buf_free
-.L3217:
-	add	x21, x21, :lo12:.LANCHOR65
+.L3321:
+	add	x21, x21, :lo12:.LANCHOR62
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
 	mov	w2, 2421
-	strb	wzr, [x19, #:lo12:.LANCHOR144]
-	adrp	x1, .LANCHOR211
+	strb	wzr, [x19, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3226
-.L3215:
+	b	.L3330
+.L3319:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3218
+	bls	.L3322
 	cmp	w1, w0
-	bcc	.L3209
+	bcc	.L3313
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR144]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20551,12 +20979,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3226
-.L3218:
+	b	.L3330
+.L3322:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR144]
+	strb	w2, [x19, #:lo12:.LANCHOR145]
 	cmp	w1, w0
-	bcc	.L3219
+	bcc	.L3323
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20565,55 +20993,55 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3219:
+.L3323:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldr	x0, [x23, #:lo12:.LANCHOR10]
 	ldrh	w1, [x24, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x21, :lo12:.LANCHOR65
-	adrp	x1, .LANCHOR83
-	adrp	x2, .LANCHOR71
-	ldrh	w1, [x1, #:lo12:.LANCHOR83]
-	ldrb	w2, [x2, #:lo12:.LANCHOR71]
+	add	x0, x21, :lo12:.LANCHOR62
+	adrp	x1, .LANCHOR80
+	adrp	x2, .LANCHOR68
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w2, [x2, #:lo12:.LANCHOR68]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3220
+	bne	.L3324
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3220:
-	add	x21, x21, :lo12:.LANCHOR65
+.L3324:
+	add	x21, x21, :lo12:.LANCHOR62
 	strh	wzr, [x21, 22]
-	b	.L3226
-.L3222:
+	b	.L3330
+.L3326:
 	ldrh	w1, [x24, 16]
 	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3223
+	bcc	.L3327
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR144]
+	strb	w0, [x19, #:lo12:.LANCHOR145]
 	ldr	x0, [x24, 8]
 	bl	buf_free
 	str	xzr, [x24, 8]
-	b	.L3226
-.L3223:
+	b	.L3330
+.L3327:
 	cmp	w21, 15
-	bls	.L3131
+	bls	.L3235
 	cmp	w26, 1
-	bne	.L3226
+	bne	.L3330
 	add	w22, w22, 1
 	and	w22, w22, 255
 	cmp	w22, 4
-	bls	.L3131
-	b	.L3226
-.L3130:
+	bls	.L3235
+	b	.L3330
+.L3234:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -20621,22 +21049,22 @@ zftl_do_gc:
 	bl	pm_flush
 	strh	w20, [x24, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR100
-	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L3291:
-	strb	wzr, [x19, #:lo12:.LANCHOR144]
-	b	.L3226
-.L3205:
+.L3395:
+	strb	wzr, [x19, #:lo12:.LANCHOR145]
+	b	.L3330
+.L3309:
 	mov	w2, 2316
-	adrp	x1, .LANCHOR211
+	adrp	x1, .LANCHOR215
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR211
+	add	x1, x1, :lo12:.LANCHOR215
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3225
+	b	.L3329
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -20647,38 +21075,38 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
 	mov	w27, w0
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3294
+	tbz	x0, 12, .L3398
 	mov	w3, w2
-	adrp	x0, .LC214
+	adrp	x0, .LC215
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC214
+	add	x0, x0, :lo12:.LC215
 	mov	w1, w27
 	bl	printf
-.L3294:
-	cbnz	w27, .L3295
-	adrp	x0, .LANCHOR61
+.L3398:
+	cbnz	w27, .L3399
+	adrp	x0, .LANCHOR58
 	mov	w27, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR61]
-.L3296:
+	ldr	w0, [x0, #:lo12:.LANCHOR58]
+.L3400:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3310
-	adrp	x23, .LANCHOR123
+	bcc	.L3414
+	adrp	x23, .LANCHOR121
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR100
-	ldrb	w0, [x23, #:lo12:.LANCHOR123]
+	adrp	x25, .LANCHOR97
+	ldrb	w0, [x23, #:lo12:.LANCHOR121]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR123
+	add	x23, x23, :lo12:.LANCHOR121
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -20686,25 +21114,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3298:
-	cbnz	w21, .L3306
-	adrp	x20, .LANCHOR93
-	adrp	x19, .LANCHOR97
-	add	x20, x20, :lo12:.LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR97
+.L3402:
+	cbnz	w21, .L3410
+	adrp	x20, .LANCHOR90
+	adrp	x19, .LANCHOR94
+	add	x20, x20, :lo12:.LANCHOR90
+	add	x19, x19, :lo12:.LANCHOR94
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3307:
+.L3411:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3308
+	ble	.L3412
 	mov	w0, 0
-.L3293:
+.L3397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20712,28 +21140,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3295:
+.L3399:
 	cmp	w27, 3
-	bhi	.L3310
+	bhi	.L3414
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3296
-.L3306:
+	b	.L3400
+.L3410:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3299
+	cbnz	x0, .L3403
 	bl	ftl_write_commit
-	b	.L3298
-.L3299:
+	b	.L3402
+.L3403:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3302
+	bne	.L3406
 	cmp	w26, w22
-	bne	.L3303
+	bne	.L3407
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -20742,9 +21170,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3315:
+.L3419:
 	strb	w3, [x28, 56]
-.L3302:
+.L3406:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -20754,7 +21182,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -20766,19 +21194,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3298
-.L3303:
+	b	.L3402
+.L3407:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3315
-.L3308:
+	b	.L3419
+.L3412:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3307
-.L3310:
+	b	.L3411
+.L3414:
 	mov	w0, -1
-	b	.L3293
+	b	.L3397
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -20837,12 +21265,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3321
+	bne	.L3425
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3321:
+.L3425:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20858,46 +21286,46 @@ ftl_write:
 	.type	zftl_discard, %function
 zftl_discard:
 	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR61
+	adrp	x2, .LANCHOR58
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR61]
+	ldr	w2, [x2, #:lo12:.LANCHOR58]
 	add	w1, w0, w1
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3344
-	adrp	x24, .LANCHOR212
+	bcc	.L3448
+	adrp	x24, .LANCHOR216
 	add	w22, w0, 24576
-	adrp	x0, .LANCHOR9
+	adrp	x0, .LANCHOR14
 	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR212]
-	ldr	w2, [x0, #:lo12:.LANCHOR9]
+	ldr	w1, [x24, #:lo12:.LANCHOR216]
+	ldr	w2, [x0, #:lo12:.LANCHOR14]
 	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR212]
-	tbz	x2, 12, .L3325
-	adrp	x0, .LC215
+	str	w1, [x24, #:lo12:.LANCHOR216]
+	tbz	x2, 12, .L3429
+	adrp	x0, .LC216
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3325:
-	adrp	x23, .LANCHOR100
-	adrp	x26, .LANCHOR123
-	ldr	x0, [x23, #:lo12:.LANCHOR100]
+.L3429:
+	adrp	x23, .LANCHOR97
+	adrp	x26, .LANCHOR121
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR123]
+	ldrb	w21, [x26, #:lo12:.LANCHOR121]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3326
+	cbz	w25, .L3430
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -20905,20 +21333,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3327
+	bne	.L3431
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3327:
+.L3431:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3329
+	beq	.L3433
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3329
+	cbz	x0, .L3433
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -20933,57 +21361,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3329:
+.L3433:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3326:
-	cbz	w19, .L3331
+.L3430:
+	cbz	w19, .L3435
 	bl	ftl_flush
-.L3331:
-	adrp	x25, .LANCHOR102
-	add	x21, x26, :lo12:.LANCHOR123
-	add	x25, x25, :lo12:.LANCHOR102
+.L3435:
+	adrp	x25, .LANCHOR99
+	add	x21, x26, :lo12:.LANCHOR121
+	add	x25, x25, :lo12:.LANCHOR99
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3332:
+.L3436:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3337
-	cbz	w19, .L3339
+	bcs	.L3441
+	cbz	w19, .L3443
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3340
+	bne	.L3444
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3340:
+.L3444:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3339
+	beq	.L3443
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3339
+	cbz	x0, .L3443
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	ldrb	w0, [x26, #:lo12:.LANCHOR121]
 	cmp	w19, w0
-	bcc	.L3342
-	adrp	x1, .LANCHOR213
+	bcc	.L3446
+	adrp	x1, .LANCHOR217
 	adrp	x0, .LC0
-	mov	w2, 1195
-	add	x1, x1, :lo12:.LANCHOR213
+	mov	w2, 1235
+	add	x1, x1, :lo12:.LANCHOR217
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3342:
+.L3446:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -20991,42 +21419,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3339:
-	ldr	w1, [x24, #:lo12:.LANCHOR212]
+.L3443:
+	ldr	w1, [x24, #:lo12:.LANCHOR216]
 	cmp	w1, 8192
-	bls	.L3345
+	bls	.L3449
 	ldr	x0, [x29, 104]
-	ldr	w0, [x0, #:lo12:.LANCHOR9]
-	tbz	x0, 12, .L3343
-	adrp	x0, .LC215
+	ldr	w0, [x0, #:lo12:.LANCHOR14]
+	tbz	x0, 12, .L3447
+	adrp	x0, .LC216
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
-	add	x0, x0, :lo12:.LC215
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3343:
-	str	wzr, [x24, #:lo12:.LANCHOR212]
+.L3447:
+	str	wzr, [x24, #:lo12:.LANCHOR216]
 	bl	flt_sys_flush
-	adrp	x0, .LANCHOR119
+	adrp	x0, .LANCHOR116
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR119]
-.L3345:
+	str	w1, [x0, #:lo12:.LANCHOR116]
+.L3449:
 	mov	w0, 0
-	b	.L3323
-.L3337:
+	b	.L3427
+.L3441:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3333
+	beq	.L3437
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3335
+	cbz	x0, .L3439
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -21038,24 +21466,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3371:
-	ldr	x1, [x23, #:lo12:.LANCHOR100]
+.L3475:
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3335:
+.L3439:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3332
-.L3333:
+	b	.L3436
+.L3437:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3335
+	beq	.L3439
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -21069,14 +21497,14 @@ zftl_discard:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR101
-	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	adrp	x1, .LANCHOR98
+	ldrb	w1, [x1, #:lo12:.LANCHOR98]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3371
-.L3344:
+	b	.L3475
+.L3448:
 	mov	w0, -1
-.L3323:
+.L3427:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -21158,6 +21586,8 @@ ftl_discard:
 	.global	p_read_ahead_ext_buf
 	.global	discard_sector_count
 	.global	read_ahead_lpa
+	.global	read_buf_count
+	.global	read_buf_head
 	.global	write_commit_count
 	.global	write_commit_head
 	.global	write_buf_count
@@ -21248,35 +21678,35 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
 	.zero	32
 	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	_c_ftl_blk_pre_plane, %object
 	.size	_c_ftl_blk_pre_plane, 2
 _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR195,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21288,129 +21718,129 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",@nobits
 	.align	1
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	_c_slc_to_xlc_ec_ratio, %object
 	.size	_c_slc_to_xlc_ec_ratio, 2
 _c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR200,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR199,. + 0
+	.set	.LANCHOR203,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR116,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -21429,69 +21859,69 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR212,. + 0
+	.set	.LANCHOR216,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -21503,14 +21933,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR208,. + 0
+	.set	.LANCHOR212,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -21523,61 +21953,61 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_update_list,"aw",@nobits
 	.align	3
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	ftl_sblk_update_list, %object
 	.size	ftl_sblk_update_list, 16
 ftl_sblk_update_list:
 	.zero	16
 	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
 	.align	1
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	ftl_sblk_update_list_offset, %object
 	.size	ftl_sblk_update_list_offset, 2
 ftl_sblk_update_list_offset:
 	.zero	2
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -21590,61 +22020,61 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR2,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -21657,7 +22087,7 @@ g_flash_blk_info:
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
@@ -21669,169 +22099,169 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR0,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR186,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR1,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -21843,159 +22273,159 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_search_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gc_search_count, %object
 	.size	gc_search_count, 4
 gc_search_count:
 	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
 	.zero	2
 	.section	.bss.gc_xlc_search_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_xlc_search_index, %object
 	.size	gc_xlc_search_index, 2
 gc_xlc_search_index:
 	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	gp_blk_info, %object
 	.size	gp_blk_info, 8
 gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
 	.zero	8
 	.section	.bss.gp_data_slc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 8
 gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
@@ -22008,63 +22438,63 @@ gp_flash_check_buf:
 	.zero	262144
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
 	.zero	8
 	.section	.bss.gp_sblk_list_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	gp_sblk_list_tbl, %object
 	.size	gp_sblk_list_tbl, 8
 gp_sblk_list_tbl:
@@ -22077,21 +22507,21 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -22103,141 +22533,152 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
 	.zero	1
 	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR59,. + 0
 	.type	p_read_ahead_ext_buf, %object
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR197,. + 0
+	.set	.LANCHOR201,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
+	.section	.bss.read_buf_count,"aw",@nobits
+	.set	.LANCHOR125,. + 0
+	.type	read_buf_count, %object
+	.size	read_buf_count, 1
+read_buf_count:
+	.zero	1
+	.section	.bss.read_buf_head,"aw",@nobits
+	.set	.LANCHOR124,. + 0
+	.type	read_buf_head, %object
+	.size	read_buf_head, 1
+read_buf_head:
+	.zero	1
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
 	.zero	2
 	.section	.bss.zftl_print_list_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	zftl_print_list_count, %object
 	.size	zftl_print_list_count, 2
 zftl_print_list_count:
@@ -22278,7 +22719,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -22312,7 +22753,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR196,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22760,7 +23201,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR210,. + 0
+	.set	.LANCHOR214,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -23150,14 +23591,14 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -23180,7 +23621,7 @@ zftl_nand_flash_para_tbl:
 	.byte	37
 	.byte	60
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	4
 	.byte	0
@@ -23208,7 +23649,7 @@ zftl_nand_flash_para_tbl:
 	.byte	37
 	.byte	60
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	4
 	.byte	0
@@ -23236,7 +23677,7 @@ zftl_nand_flash_para_tbl:
 	.byte	36
 	.byte	60
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	4
 	.byte	0
@@ -23292,7 +23733,7 @@ zftl_nand_flash_para_tbl:
 	.byte	33
 	.byte	40
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -23343,7 +23784,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1056
-	.hword	17881
+	.hword	17857
 	.byte	2
 	.byte	35
 	.byte	40
@@ -23432,7 +23873,7 @@ zftl_nand_flash_para_tbl:
 	.byte	33
 	.byte	40
 	.byte	32
-	.byte	2
+	.byte	3
 	.byte	1
 	.byte	1
 	.byte	0
@@ -23623,7 +24064,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1048
-	.hword	9695
+	.hword	9671
 	.byte	5
 	.byte	19
 	.byte	70
@@ -23735,7 +24176,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	1024
-	.hword	479
+	.hword	455
 	.byte	4
 	.byte	18
 	.byte	60
@@ -23819,7 +24260,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	2184
-	.hword	9695
+	.hword	9671
 	.byte	5
 	.byte	19
 	.byte	70
@@ -23847,7 +24288,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	1
 	.hword	2184
-	.hword	9695
+	.hword	9671
 	.byte	5
 	.byte	19
 	.byte	60
@@ -24001,451 +24442,472 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10025,"a",@progbits
+	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
-	.set	.LANCHOR1,. + 0
-	.type	__func__.10025, %object
-	.size	__func__.10025, 18
-__func__.10025:
+	.set	.LANCHOR5,. + 0
+	.type	__func__.10041, %object
+	.size	__func__.10041, 18
+__func__.10041:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10050,"a",@progbits
+	.section	.rodata.__func__.10066,"a",@progbits
 	.align	3
-	.set	.LANCHOR7,. + 0
-	.type	__func__.10050, %object
-	.size	__func__.10050, 23
-__func__.10050:
+	.set	.LANCHOR11,. + 0
+	.type	__func__.10066, %object
+	.size	__func__.10066, 23
+__func__.10066:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10158,"a",@progbits
+	.section	.rodata.__func__.10174,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.10158, %object
-	.size	__func__.10158, 15
-__func__.10158:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10174, %object
+	.size	__func__.10174, 15
+__func__.10174:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10190,"a",@progbits
+	.section	.rodata.__func__.10206,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.10190, %object
-	.size	__func__.10190, 15
-__func__.10190:
+	.set	.LANCHOR126,. + 0
+	.type	__func__.10206, %object
+	.size	__func__.10206, 15
+__func__.10206:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10231,"a",@progbits
+	.section	.rodata.__func__.10247,"a",@progbits
 	.align	3
-	.set	.LANCHOR110,. + 0
-	.type	__func__.10231, %object
-	.size	__func__.10231, 18
-__func__.10231:
+	.set	.LANCHOR107,. + 0
+	.type	__func__.10247, %object
+	.size	__func__.10247, 18
+__func__.10247:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10241,"a",@progbits
+	.section	.rodata.__func__.10257,"a",@progbits
 	.align	3
-	.set	.LANCHOR111,. + 0
-	.type	__func__.10241, %object
-	.size	__func__.10241, 17
-__func__.10241:
+	.set	.LANCHOR108,. + 0
+	.type	__func__.10257, %object
+	.size	__func__.10257, 17
+__func__.10257:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10276,"a",@progbits
+	.section	.rodata.__func__.10292,"a",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
-	.type	__func__.10276, %object
-	.size	__func__.10276, 14
-__func__.10276:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10292, %object
+	.size	__func__.10292, 14
+__func__.10292:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10300,"a",@progbits
+	.section	.rodata.__func__.10316,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.10300, %object
-	.size	__func__.10300, 16
-__func__.10300:
+	.set	.LANCHOR197,. + 0
+	.type	__func__.10316, %object
+	.size	__func__.10316, 16
+__func__.10316:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10319,"a",@progbits
+	.section	.rodata.__func__.10335,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.10319, %object
-	.size	__func__.10319, 23
-__func__.10319:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.10335, %object
+	.size	__func__.10335, 23
+__func__.10335:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10345,"a",@progbits
+	.section	.rodata.__func__.10361,"a",@progbits
 	.align	3
-	.set	.LANCHOR112,. + 0
-	.type	__func__.10345, %object
-	.size	__func__.10345, 23
-__func__.10345:
+	.set	.LANCHOR109,. + 0
+	.type	__func__.10361, %object
+	.size	__func__.10361, 23
+__func__.10361:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10366,"a",@progbits
+	.section	.rodata.__func__.10382,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.10366, %object
-	.size	__func__.10366, 19
-__func__.10366:
+	.set	.LANCHOR210,. + 0
+	.type	__func__.10382, %object
+	.size	__func__.10382, 19
+__func__.10382:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10384,"a",@progbits
+	.section	.rodata.__func__.10400,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.10384, %object
-	.size	__func__.10384, 22
-__func__.10384:
+	.set	.LANCHOR113,. + 0
+	.type	__func__.10400, %object
+	.size	__func__.10400, 22
+__func__.10400:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10395,"a",@progbits
+	.section	.rodata.__func__.10411,"a",@progbits
 	.align	3
-	.set	.LANCHOR117,. + 0
-	.type	__func__.10395, %object
-	.size	__func__.10395, 22
-__func__.10395:
+	.set	.LANCHOR114,. + 0
+	.type	__func__.10411, %object
+	.size	__func__.10411, 22
+__func__.10411:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10420,"a",@progbits
+	.section	.rodata.__func__.10436,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.10420, %object
-	.size	__func__.10420, 19
-__func__.10420:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.10436, %object
+	.size	__func__.10436, 19
+__func__.10436:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10432,"a",@progbits
+	.section	.rodata.__func__.10448,"a",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
-	.type	__func__.10432, %object
-	.size	__func__.10432, 18
-__func__.10432:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.10448, %object
+	.size	__func__.10448, 18
+__func__.10448:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10469,"a",@progbits
+	.section	.rodata.__func__.10485,"a",@progbits
 	.align	3
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 	.align	3
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 	.align	3
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 	.align	3
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 	.string	"pm_write_page"
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 	.align	3
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 	.align	3
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 	.align	3
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 	.string	"\n!!!!! error @ func:%s - line:%d\n"
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-.LC149:
+.LC151:
 	.string	"free_buf_count: %d\n"
-.LC150:
+.LC152:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC151:
+.LC153:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC152:
+.LC154:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC153:
+.LC155:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC154:
+.LC156:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC155:
+.LC157:
 	.string	"lpa:"
-.LC156:
+.LC158:
 	.string	"vpn:"
-.LC157:
+.LC159:
 	.string	"sblk:"
-.LC158:
+.LC160:
 	.string	"lpa_hash:"
-.LC159:
+.LC161:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
 .LC68:
@@ -24484,11 +24946,11 @@ __func__.9932:
 .LC116:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC144:
+.LC146:
 	.string	"finfo:"
-.LC145:
+.LC147:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC146:
+.LC148:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
 .LC84:
@@ -24497,18 +24959,18 @@ __func__.9932:
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC120:
-	.string	"flash_prog_page %x %x %x\n"
 .LC121:
+	.string	"flash_prog_page %x %x %x\n"
+.LC122:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC126:
-	.string	"flash_prog_page_en:%x %x\n"
 .LC127:
-	.string	"spare"
+	.string	"flash_prog_page_en:%x %x\n"
 .LC128:
-	.string	"data"
+	.string	"spare"
 .LC129:
+	.string	"data"
+.LC130:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
@@ -24518,7 +24980,7 @@ __func__.9932:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
 .LC112:
-	.string	"flash_read_page_en %x %x\n"
+	.string	"flash_read_page_en %x %x %x\n"
 .LC113:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
@@ -24529,48 +24991,46 @@ __func__.9932:
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
 .LC67:
 	.string	"alloc sblk %x %d\n"
+	.section	.rodata.ftl_ext_info_init.str1.1,"aMS",@progbits,1
+.LC135:
+	.string	"%s %d %d %x %x\n"
 	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
 .LC55:
 	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
 .LC56:
 	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC132:
-	.string	"%d %x @%d %x\n"
 .LC133:
+	.string	"%d %x @%d %x\n"
+.LC134:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC131:
+.LC132:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC134:
+.LC136:
 	.string	"ftl_low_format %d\n"
-.LC135:
+.LC137:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC137:
+.LC139:
 	.string	"saved_active_page  = %x\n"
-.LC138:
+.LC140:
 	.string	"saved_active_plane = %x\n"
-.LC139:
+.LC141:
 	.string	"sblk = %x\n"
-.LC140:
+.LC142:
 	.string	"phy_blk = %x %x\n"
-.LC141:
+.LC143:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC142:
+.LC144:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
-.LC136:
+.LC138:
 	.string	"re low format %d\n"
-	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC170:
-	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC171:
-	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
 .LC194:
 	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
@@ -24583,27 +25043,27 @@ __func__.9932:
 .LC198:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC147:
+.LC149:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC148:
+.LC150:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC130:
+.LC131:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC201:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC202:
-	.string	"ftl_update_l2p_map"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC203:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map"
 .LC204:
+	.string	"lpa_tbl:"
+.LC205:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
 .LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC205:
+.LC206:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
 .LC66:
@@ -24614,16 +25074,16 @@ __func__.9932:
 .LC42:
 	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC119:
+.LC120:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC206:
-	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC207:
-	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
 .LC208:
-	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
 .LC209:
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+.LC210:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
 .LC57:
@@ -24692,24 +25152,24 @@ __func__.9932:
 .LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC122:
-	.string	"1 write_idblock fix data %x %x %x\n"
 .LC123:
-	.string	"write_idblock check fail! %x\n"
+	.string	"1 write_idblock fix data %x %x %x\n"
 .LC124:
+	.string	"write_idblock check fail! %x\n"
+.LC125:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC161:
+.LC163:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC162:
+.LC164:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC163:
+.LC165:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC164:
+.LC166:
 	.string	"pm_ppa:"
-.LC165:
+.LC167:
 	.string	"data:"
-.LC166:
+.LC168:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
 .LC72:
@@ -24814,18 +25274,18 @@ __func__.9932:
 .LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC167:
+.LC169:
 	.string	"pm_init posr %x %x %x\n"
-.LC168:
+.LC170:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC169:
+.LC171:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC160:
+.LC162:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC143:
+.LC145:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
 .LC61:
@@ -24848,10 +25308,12 @@ __func__.9932:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
 .LC118:
+	.string	"read: %x %x %x %x\n"
+.LC119:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -24999,11 +25461,11 @@ random_seed:
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC125:
+.LC126:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -25533,7 +25995,7 @@ toshiba_3D_tlc_value:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -25584,7 +26046,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -25597,16 +26059,16 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC215:
+.LC216:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC210:
-	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC211:
-	.string	"gc %d: %d %d %d %d %d %d\n"
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
 .LC212:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+	.string	"gc %d: %d %d %d %d %d %d\n"
 .LC213:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC214:
 	.string	"gc free %x, %d\n"
 	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
 .LC49:
@@ -25620,7 +26082,7 @@ toshiba_ref_value:
 	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC175:
-	.string	"FTL version: 6.0.8 20180511"
+	.string	"FTL version: 6.0.8 20180615"
 .LC176:
 	.string	"_c_user_data_density := %d\n"
 .LC177:
@@ -25648,10 +26110,12 @@ toshiba_ref_value:
 	.string	"ftl_read %x %x %x\n"
 .LC200:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+.LC201:
+	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
 .LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC214:
+.LC215:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 058e5d949750ef2d182bb820262222eef79b001f
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Sat Mar 24 11:29:52 2018 +0800

    rockchip: px30: implement set_armclk_rate()
    
    Add support to set armclk rate.
    
    Change-Id: Ie96d8680e9b3666f8131aeb553594a271d426566
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e4ed09dabe..fe40897830 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -140,6 +140,11 @@ __weak int soc_clk_dump(void)
 	return 0;
 }
 
+__weak int set_armclk_rate(void)
+{
+	return 0;
+}
+
 int board_late_init(void)
 {
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
@@ -233,6 +238,7 @@ int board_init(void)
 	if (ret)
 		debug("%s: Cannot enable boot on regulator\n", __func__);
 #endif
+	set_armclk_rate();
 
 	return rk_board_init();
 }
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 42c9d5f5e2..0aefee52dd 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -4,10 +4,15 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <clk.h>
+#include <dm.h>
 #include <asm/io.h>
 #include <asm/arch/grf_px30.h>
 #include <asm/arch/hardware.h>
 #include <asm/armv8/mmu.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
+#include <dt-bindings/clock/px30-cru.h>
 
 #define PMU_PWRDN_CON	0xff000018
 
@@ -61,3 +66,25 @@ static struct px30_grf * const grf = (void *)GRF_BASE;
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
 }
+
+int set_armclk_rate(void)
+{
+	struct px30_clk_priv *priv;
+	struct clk clk;
+	int ret;
+
+	ret = rockchip_get_clk(&clk.dev);
+	if (ret) {
+		printf("Failed to get clk dev\n");
+		return ret;
+	}
+	clk.id = ARMCLK;
+	priv = dev_get_priv(clk.dev);
+	ret = clk_set_rate(&clk, priv->armclk_hz);
+	if (ret < 0) {
+		printf("Failed to set armclk %lu\n", priv->armclk_hz);
+		return ret;
+	}
+
+	return 0;
+}

commit 37428b9209c97e0b30487c6d6e601d55222371c2
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 23 17:35:39 2018 +0800

    rockchip: clk: px30: Add support to set and get armclk rate
    
    Change-Id: I40948e5cedb781cad7129b02dfbf34fecb8689ca
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index f43fd09ffd..3094246b38 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -14,9 +14,6 @@
 
 #define APLL_HZ		(600 * MHz)
 
-#define CORE_ACLK_HZ	(APLL_HZ / 2)
-#define CORE_DBG_HZ	(APLL_HZ / 4)
-
 /* PX30 pll id */
 enum px30_pll_id {
 	APLL,
@@ -37,6 +34,7 @@ struct px30_clk_info {
 struct px30_clk_priv {
 	struct px30_cru *cru;
 	ulong gpll_hz;
+	ulong armclk_hz;
 };
 
 struct px30_pmuclk_priv {
@@ -112,6 +110,12 @@ struct pll_rate_table {
 	unsigned int frac;
 };
 
+struct cpu_rate_table {
+	unsigned long rate;
+	unsigned int aclk_div;
+	unsigned int pclk_div;
+};
+
 enum {
 	/* PLLCON0*/
 	PLL_BP_SHIFT		= 15,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 25b5568034..87705cf542 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -38,6 +38,13 @@ enum {
 	.frac = _frac,						\
 }
 
+#define PX30_CPUCLK_RATE(_rate, _aclk_div, _pclk_div)		\
+{								\
+	.rate	= _rate##U,					\
+	.aclk_div = _aclk_div,					\
+	.pclk_div = _pclk_div,					\
+}
+
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
 #define PX30_CLK_DUMP(_id, _name, _iscru)	\
@@ -52,6 +59,7 @@ static struct pll_rate_table px30_pll_rates[] = {
 	PX30_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
 	PX30_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
 	PX30_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	PX30_PLL_RATE(1008000000, 1, 84, 2, 1, 1, 0),
 	PX30_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
 	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
 	PX30_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
@@ -71,6 +79,13 @@ static const struct px30_clk_info clks_dump[] = {
 	PX30_CLK_DUMP(PCLK_PMU_PRE, "pclk_pmu", false),
 };
 
+static struct cpu_rate_table px30_cpu_rates[] = {
+	PX30_CPUCLK_RATE(1200000000, 1, 5),
+	PX30_CPUCLK_RATE(1008000000, 1, 5),
+	PX30_CPUCLK_RATE(816000000, 1, 3),
+	PX30_CPUCLK_RATE(600000000, 1, 3),
+};
+
 static u8 pll_mode_shift[PLL_COUNT] = {
 	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
 	NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
@@ -161,6 +176,19 @@ static const struct pll_rate_table *get_pll_settings(unsigned long rate)
 	return pll_clk_set_by_auto(rate);
 }
 
+static const struct cpu_rate_table *get_cpu_settings(unsigned long rate)
+{
+	unsigned int rate_count = ARRAY_SIZE(px30_cpu_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (rate == px30_cpu_rates[i].rate)
+			return &px30_cpu_rates[i];
+	}
+
+	return NULL;
+}
+
 /*
  * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
  * Formulas also embedded within the Fractional PLL Verilog model:
@@ -788,6 +816,49 @@ static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
 	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
 }
 
+static ulong px30_armclk_set_clk(struct px30_clk_priv *priv, ulong hz)
+{
+	struct px30_cru *cru = priv->cru;
+	const struct cpu_rate_table *rate;
+	ulong old_rate;
+
+	rate = get_cpu_settings(hz);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	old_rate = px30_clk_get_pll_rate(priv, APLL);
+	if (old_rate > hz) {
+		if (rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, hz))
+			return -EINVAL;
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+	} else if (old_rate < hz) {
+		rk_clrsetreg(&cru->clksel_con[0],
+			     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+			     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK,
+			     rate->aclk_div << CORE_ACLK_DIV_SHIFT |
+			     rate->pclk_div << CORE_DBG_DIV_SHIFT |
+			     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+			     0 << CORE_DIV_CON_SHIFT);
+		if (rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, hz))
+			return -EINVAL;
+	}
+
+	return px30_clk_get_pll_rate(priv, APLL);
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -817,6 +888,9 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case PLL_NPLL:
 		rate = px30_clk_get_pll_rate(priv, NPLL);
 		break;
+	case ARMCLK:
+		rate = px30_clk_get_pll_rate(priv, APLL);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
@@ -877,8 +951,11 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case ARMCLK:
+		if (priv->armclk_hz)
+			px30_armclk_set_clk(priv, rate);
+		priv->armclk_hz = rate;
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
@@ -1054,26 +1131,12 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
-	struct px30_cru *cru = priv->cru;
-	u32 aclk_div, pclk_div;
 
-	/* init pll */
-	rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, APLL_HZ);
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PERI and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	pclk_div = APLL_HZ / CORE_DBG_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_DBG_DIV_SHIFT |
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
+	if (px30_clk_get_pll_rate(priv, APLL) == APLL_HZ)
+		return 0;
+
+	if (px30_armclk_set_clk(priv, APLL_HZ))
+		return -EINVAL;
 
 	return 0;
 }

commit 4a9de4c99bda127013d4fb8c319b624246555025
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Jun 22 11:19:49 2018 +0800

    rockchip: clk: px30: Avoid emmc, sdmmc, nandc, rate overflowing
    
    Change-Id: I75b5bed7962fcd7ffad84dc1c4d2ffbbf1404ad3
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index b6fec42679..25b5568034 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1220,6 +1220,10 @@ static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
 	nandc_rate = px30_nandc_get_clk(cru_priv);
 	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__, emmc_rate,
 	      sdmmc_rate, nandc_rate);
+	/* avoid rate too large, reduce rate first */
+	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate / div);
+	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate / div);
+	px30_nandc_set_clk(cru_priv, nandc_rate / div);
 
 	rkclk_set_pll(&pmucru->pll, &pmucru->pmu_mode, GPLL, hz);
 	priv->gpll_hz = px30_gpll_get_pmuclk(priv);

commit 60a1199e4138c08680af8cc75b4156dc021da100
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 22 10:35:15 2018 +0800

    rockchip: clk: px30: fix nandc clock freq caculate
    
    The nandc clk no need div 2.
    
    Change-Id: I9e33ef3a4b5c5dcd024f3aed26ddee9fb8e6af6c
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index a964400de0..b6fec42679 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -342,7 +342,7 @@ static ulong px30_nandc_get_clk(struct px30_clk_priv *priv)
 	con = readl(&cru->clksel_con[15]);
 	div = (con & NANDC_DIV_MASK) >> NANDC_DIV_SHIFT;
 
-	return DIV_TO_RATE(priv->gpll_hz, div) / 2;
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
 static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
@@ -353,7 +353,7 @@ static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
 
 	/* Select nandc source from GPLL by default */
 	/* nandc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, set_rate);
 	assert(src_clk_div - 1 < 31);
 
 	rk_clrsetreg(&cru->clksel_con[15],

commit dd472d4ff5b10cfcbdc7e46ec8efef420dc7b003
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Jun 21 18:23:56 2018 +0800

    rockchip: clk: px30: Change apll rate to 600MHz
    
    The initial voltage may be too low for 816MHz and it is enough for
    600MHz.
    
    Change-Id: Ifa1438d8d3056c9fb8fb3e578a28c26682a27e46
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index acaa204a25..f43fd09ffd 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -12,10 +12,10 @@
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(816 * MHz)
+#define APLL_HZ		(600 * MHz)
 
-#define CORE_PERI_HZ	204000000
-#define CORE_ACLK_HZ	408000000
+#define CORE_ACLK_HZ	(APLL_HZ / 2)
+#define CORE_DBG_HZ	(APLL_HZ / 4)
 
 /* PX30 pll id */
 enum px30_pll_id {
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 7fbb279247..a964400de0 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -54,6 +54,7 @@ static struct pll_rate_table px30_pll_rates[] = {
 	PX30_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
 	PX30_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
 	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	PX30_PLL_RATE(600000000, 1, 75, 3, 1, 1, 0),
 };
 
 static const struct px30_clk_info clks_dump[] = {
@@ -1054,7 +1055,7 @@ static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
 	struct px30_cru *cru = priv->cru;
-	u32 aclk_div;
+	u32 aclk_div, pclk_div;
 
 	/* init pll */
 	rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, APLL_HZ);
@@ -1064,10 +1065,13 @@ static int px30_clk_probe(struct udevice *dev)
 	 * core hz : apll = 1:1
 	 */
 	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	pclk_div = APLL_HZ / CORE_DBG_HZ - 1;
+
 	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
-		     CORE_ACLK_DIV_MASK,
+		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
 		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_DBG_DIV_SHIFT |
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 

commit c2304c02b148bdde20cb77ab5b01be65307c2c91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 14 10:55:46 2018 +0800

    console: add warning message if slient console is enabled
    
    Change-Id: Ibc50e9bc19c77bb688a0312c1d1290250a9b6a2f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/console.c b/common/console.c
index f83528ca60..cbec485345 100644
--- a/common/console.c
+++ b/common/console.c
@@ -666,10 +666,12 @@ int console_assign(int file, const char *devname)
 static void console_update_silent(void)
 {
 #ifdef CONFIG_SILENT_CONSOLE
-	if (env_get("silent") != NULL)
+	if (env_get("silent") != NULL) {
+		printf("U-Boot: enable slient console\n");
 		gd->flags |= GD_FLG_SILENT;
-	else
+	} else {
 		gd->flags &= ~GD_FLG_SILENT;
+	}
 #endif
 }
 

commit 541f90ebf1638c84d29a1bcefe354945b3b98c26
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri Jun 22 11:39:07 2018 +0800

    drivers: core: do not use nand node from kernel dtb
    
    Do not use nand node from kernel dtb, or the driver will
    be initialized twice.
    
    Change-Id: Iae3e76094d074549e6f52c20261ceefa9b98be1b
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index f754824c22..825dc6bc0f 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -51,8 +51,8 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	}
 
 #ifdef CONFIG_USING_KERNEL_DTB
-	/* Do not use mmc node from kernel dtb */
-	if(drv->id == UCLASS_MMC)
+	/* Do not use mmc node and nand node from kernel dtb */
+	if(drv->id == UCLASS_MMC || drv->id == UCLASS_RKNAND)
 	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 		if (!strcmp(name, dev->name)){
 			debug("%s do not bind dev already in list %s\n",

commit adde78bf7034484a41dd086ab2cb16c8f5d724b8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 21 10:44:56 2018 +0800

    serial: ns16550: use fifo and flush console before jumping to OS
    
    with this patch, U-Boot can save a lot of boot time which
    depends on how much log we print.
    
    Change-Id: Ib96e9343e9439d251c2c40be14609bc08d638931
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 5e6336cbd8..fd2f101992 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -92,6 +92,18 @@ static void announce_and_cleanup(int fake)
 	udc_disconnect();
 #endif
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/* Enable this flag, call putc to flush console(ns16550_serial_putc)*/
+	gd->flags |= GD_FLG_OS_RUN;
+	/*
+	 * This putc is only for calling ns16550_serial_putc() to flush console.
+	 * Console uclass framework is quite complicated, it's not easy to
+	 * flush console by privoding a new interface which must provide a
+	 * udevice here, so we use an easy way to achieve that.
+	 */
+	putc('\n');
+#endif
+
 	board_quiesce_devices();
 
 	/*
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 490087c017..ad7a3d77ab 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -318,8 +318,20 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 {
 	struct NS16550 *const com_port = dev_get_priv(dev);
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * Use fifo function.
+	 *
+	 * UART_USR: bit1 trans_fifo_not_full:
+	 *	0 = Transmit FIFO is full;
+	 *	1 = Transmit FIFO is not full;
+	 */
+	while (!(serial_in(&com_port->rbr + 0x1f) & 0x02))
+		;
+#else
 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
 		return -EAGAIN;
+#endif
 	serial_out(ch, &com_port->thr);
 
 	/*
@@ -331,6 +343,20 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
 	if (ch == '\n')
 		WATCHDOG_RESET();
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	/*
+	 * Wait fifo flush.
+	 *
+	 * UART_USR: bit2 trans_fifo_empty:
+	 *	0 = Transmit FIFO is not empty
+	 *	1 = Transmit FIFO is empty
+	 */
+	if (gd->flags & GD_FLG_OS_RUN) {
+		while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
+			;
+	}
+#endif
+
 	return 0;
 }
 
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 5aaa78b06a..5158bc8817 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -156,4 +156,9 @@ typedef struct global_data {
 #define GD_FLG_SPL_EARLY_INIT	0x04000 /* Early SPL init is done	   */
 #define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+/* Currently, we use it to indicate console can be flushed before jump to OS */
+#define GD_FLG_OS_RUN		0x10000
+#endif
+
 #endif /* __ASM_GENERIC_GBL_DATA_H */

commit 5fb597c27d7b58dd1de4ff74001b5ddc723d5647
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 22 11:43:57 2018 +0800

    rockchip: rockusb: only fix cmd for WL10/RL10
    
    The definition of cmnd[7] is different for different cmd, so
    we can not use the fixup for all cmd.
    
    Change-Id: I0020de4974ecca6075e0512456787089139a67fd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 9792ca01fa..ee31daa884 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -330,7 +330,6 @@ static int rkusb_cmd_process(struct fsg_common *common,
 
 	dump_cbw(cbw);
 
-	rkusb_fixup_cbwcb(common, bh);
 	if (rkusb_check_lun(common)) {
 		*reply = -EINVAL;
 		return RKUSB_RC_ERROR;
@@ -353,12 +352,14 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		break;
 
 	case RKUSB_LBA_READ_10:
+		rkusb_fixup_cbwcb(common, bh);
 		common->cmnd[0] = SC_READ_10;
 		common->cmnd[1] = 0; /* Not support */
 		rc = RKUSB_RC_CONTINUE;
 		break;
 
 	case RKUSB_LBA_WRITE_10:
+		rkusb_fixup_cbwcb(common, bh);
 		common->cmnd[0] = SC_WRITE_10;
 		common->cmnd[1] = 0; /* Not support */
 		rc = RKUSB_RC_CONTINUE;

commit 236f805c2ac2685e879fb5546c62da11ee3ad127
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jun 21 11:57:06 2018 +0800

    rockchip: config: add common config for rk3399
    
    This config will used for rockchip sdk(including android and Linux)
    
    Change-Id: I65bad79066c5d2dd775cfcb9455b2a77542243a3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3399_defconfig b/configs/rk3399_defconfig
new file mode 100644
index 0000000000..f84e81afef
--- /dev/null
+++ b/configs/rk3399_defconfig
@@ -0,0 +1,103 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 8d2f64435d814910f7e13a71bdc5c57c8f28cdc8
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Fri Jun 15 10:36:53 2018 +0800

    fuel gauge: rk817: calibrate the fuel gauge, when the system is powered on
    
    There is an error with the fuel gauge, so we need to calibrate it.
    
    Change-Id: I649cacaa97c69fd47bad6f6d02a7569e735b7a80
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index e23d0034df..c6e4b3bfef 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -434,16 +434,25 @@ static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 {
 	u8 buf;
 	u32 cap;
+	u32 val;
 
 	cap = CAPACITY_TO_ADC(capacity, battery->res_div);
-	buf = (cap >> 24) & 0xff;
-	rk817_bat_write(battery, Q_INIT_H3, buf);
-	buf = (cap >> 16) & 0xff;
-	rk817_bat_write(battery, Q_INIT_H2, buf);
-	buf = (cap >> 8) & 0xff;
-	rk817_bat_write(battery, Q_INIT_L1, buf);
-	buf = (cap >> 0) & 0xff;
-	rk817_bat_write(battery, Q_INIT_L0, buf);
+
+	do {
+		buf = (cap >> 24) & 0xff;
+		rk817_bat_write(battery, Q_INIT_H3, buf);
+		buf = (cap >> 16) & 0xff;
+		rk817_bat_write(battery, Q_INIT_H2, buf);
+		buf = (cap >> 8) & 0xff;
+		rk817_bat_write(battery, Q_INIT_L1, buf);
+		buf = (cap >> 0) & 0xff;
+		rk817_bat_write(battery, Q_INIT_L0, buf);
+
+		val = rk817_bat_read(battery, Q_INIT_H3) << 24;
+		val |= rk817_bat_read(battery, Q_INIT_H2) << 16;
+		val |= rk817_bat_read(battery, Q_INIT_L1) << 8;
+		val |= rk817_bat_read(battery, Q_INIT_L0) << 0;
+	} while (cap != val);
 
 	battery->rsoc = capacity * 1000 * 100 / battery->fcc;
 	battery->remain_cap = capacity * 1000;
@@ -465,8 +474,6 @@ static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
 		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
 
 		capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
-	} else {
-		rk817_bat_init_coulomb_cap(battery, 0);
 	}
 
 	return  capacity;
@@ -481,10 +488,7 @@ static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
 		val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
 		val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
 		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
-
 		capacity = ADC_TO_CAPACITY(val, battery->res_div);
-	} else {
-		rk817_bat_init_coulomb_cap(battery, 0);
 	}
 
 	return  capacity;
@@ -694,12 +698,24 @@ static bool is_rk817_bat_last_halt(struct rk817_battery_device *battery)
 	int pre_cap = rk817_bat_get_prev_cap(battery);
 	int now_cap = rk817_bat_get_capacity_mah(battery);
 
+	battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+
 	/* over 10%: system halt last time */
-	if (abs(now_cap - pre_cap) > (battery->fcc / 10)) {
-		rk817_bat_inc_halt_cnt(battery);
-		return true;
+	if (now_cap > pre_cap) {
+		if (abs(now_cap - pre_cap) > (battery->fcc / 10)) {
+			rk817_bat_inc_halt_cnt(battery);
+			return true;
+		} else {
+			return false;
+		}
 	} else {
-		return false;
+		if (abs(battery->nac - pre_cap) > (battery->fcc / 5)) {
+			rk817_bat_inc_halt_cnt(battery);
+			return true;
+		} else {
+			return false;
+		}
 	}
 }
 
@@ -725,23 +741,78 @@ static void rk817_bat_set_initialized_flag(struct rk817_battery_device *battery)
 static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 {
 	int now_cap, pre_soc, pre_cap;
+	int is_charge = 0, temp_soc = 0;
 
 	battery->fcc = rk817_bat_get_fcc(battery);
 	pre_soc = rk817_bat_get_prev_dsoc(battery);
 	pre_cap = rk817_bat_get_prev_cap(battery);
+
 	now_cap = rk817_bat_get_capacity_mah(battery);
+	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
+	battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+	battery->pwroff_min = rk817_bat_get_off_count(battery);
 	battery->remain_cap = pre_cap * 1000;
 	battery->is_halt = is_rk817_bat_last_halt(battery);
-	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
 
-	if (battery->is_halt) {
-		DBG("system halt last time... cap: pre=%d, now=%d\n",
-		    pre_cap, now_cap);
-		if (now_cap < 0)
-			now_cap = 0;
+	if (now_cap == 0) {
+		if (battery->pwroff_min > 3) {
+			battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+			now_cap = battery->nac;
+			pre_cap = now_cap;
+			printf("now_cap 0x%x\n", now_cap);
+		} else {
+			now_cap = pre_cap;
+		}
+
 		rk817_bat_init_coulomb_cap(battery, now_cap);
-		pre_cap = now_cap;
+		goto finish;
+	}
+
+	if (now_cap > pre_cap) {
+		is_charge = 1;
+		if ((now_cap > battery->fcc * 2) &&
+		    ((battery->pwroff_min > 0) &&
+		    (battery->pwroff_min < 3))) {
+			now_cap = pre_cap;
+			is_charge = 0;
+		}
+	} else {
+		is_charge = 0;
+	}
+
+	if (is_charge == 0) {
+		if ((battery->pwroff_min >= 0)  && (battery->pwroff_min < 3)) {
+			rk817_bat_init_coulomb_cap(battery, pre_cap);
+			rk817_bat_get_capacity_mah(battery);
+			goto finish;
+		}
+
+		if (battery->pwroff_min >= 3) {
+			if (battery->nac > pre_cap) {
+				rk817_bat_init_coulomb_cap(battery,
+							   battery->nac);
+				rk817_bat_get_capacity_mah(battery);
+				pre_cap = battery->nac;
+				goto finish;
+			}
+
+			if ((pre_cap - battery->nac) > (battery->fcc / 10)) {
+				rk817_bat_inc_halt_cnt(battery);
+				temp_soc = (pre_cap - battery->nac) * 1000 * 100 / battery->fcc;
+				pre_soc -= temp_soc;
+				pre_cap = battery->nac;
+				if (pre_soc <= 0)
+					pre_soc = 0;
+				goto finish;
+			}
+		}
+	} else {
+		battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+		battery->rsoc = rk817_bat_get_rsoc(battery);
 		pre_soc = battery->rsoc;
+		pre_cap = battery->remain_cap;
 		goto finish;
 	}
 finish:

commit 50a5d4fff35478b90a453b83a4742118dba45899
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 14 10:48:25 2018 +0800

    env_default: add "silent=enable" when CONFIG_SILENT_CONSOLE enabled
    
    framework requires users to enable slient console by both setting
    CONFIG_SILENT_CONSOLE and env "silent", it's really unnecessary,
    let's fix it.
    
    Change-Id: I92c9792f74a7edf61fe0947617038709d8b14d8d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/env_default.h b/include/env_default.h
index b574345af2..853c290042 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -103,6 +103,9 @@ const uchar default_environment[] = {
 #ifdef CONFIG_SYS_SOC
 	"soc="		CONFIG_SYS_SOC			"\0"
 #endif
+#ifdef CONFIG_SILENT_CONSOLE
+	"silent=enable\0"
+#endif
 #endif
 #ifdef	CONFIG_EXTRA_ENV_SETTINGS
 	CONFIG_EXTRA_ENV_SETTINGS

commit b722d159ec51cccf7606843531b830057b688dcd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jun 14 16:13:25 2018 +0800

    rockchip: config: add rk3326 common config
    
    Change-Id: I4ec5fbb491b8511a662b60b7fdc1878a0af26467
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3326_defconfig b/configs/rk3326_defconfig
new file mode 100644
index 0000000000..feac2a1a08
--- /dev/null
+++ b/configs/rk3326_defconfig
@@ -0,0 +1,95 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_ROCKCHIP_RK3326=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
+CONFIG_TEST_ROCKCHIP=y

commit b2cd2d96bc14551bca204d181933920fda4e78dd
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jun 14 09:42:48 2018 +0800

    arm: dts: rk3288: add adc-keys dt node
    
    Add adc-keys for download mode detection.
    
    Change-Id: I8f3204bc716c7e06fde07f9f1c6f926767214c4b
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
index 4f51961579..828257e311 100644
--- a/arch/arm/dts/rk3288-evb-rk1608.dtsi
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -5,12 +5,24 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index a84156fe14..32c262907b 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -5,12 +5,24 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm/dts/rk3288-fennec.dtsi b/arch/arm/dts/rk3288-fennec.dtsi
index f61252ce9d..c31a168caa 100644
--- a/arch/arm/dts/rk3288-fennec.dtsi
+++ b/arch/arm/dts/rk3288-fennec.dtsi
@@ -39,6 +39,7 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
@@ -46,6 +47,17 @@
 		device_type = "memory";
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -78,6 +90,11 @@
 	status = "okay";
 };
 
+&saradc {
+	vref-supply = <&vcc_18>;
+	status = "okay";
+};
+
 &sdmmc {
 	bus-width = <4>;
 	cap-mmc-highspeed;
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
index 072eaa6116..020e7e576b 100644
--- a/arch/arm/dts/rk3288-firefly.dtsi
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -5,12 +5,24 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index 47dc0f9d74..77b618805f 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -5,6 +5,7 @@
  */
 
 #include "rk3288.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	memory {
@@ -12,6 +13,17 @@
 		reg = <0 0x80000000>;
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
 	ext_gmac: external-gmac-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;

commit f84438048a44ce13148d471eb15a28d082716ff7
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Jun 14 09:41:04 2018 +0800

    config: rk3288: add adc-key support
    
    Change-Id: I9f6f2723db5c84bebac1d84dfd43b10dd5a9c947
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index d73134f64e..ebe548cd33 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -41,6 +41,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 7c155cd7be..06e903e97d 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -44,6 +44,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 37c5ee6556..7ebfbf3a2a 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -46,6 +46,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 1d3856a08e..1f2d1eef57 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -46,6 +46,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 7b76be8f3a..088b15f5be 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -46,6 +46,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_DM_ETH=y

commit 300175f79e1bdf9df8608ed16e21c97ae091a2b9
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Jun 6 16:35:41 2018 +0800

    cmd: rknand: add rockchip spi nand u-boot command support
    
    Change-Id: I8e3e6bab2d419b5fe0ab35c3985d1ff88efc5778
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index f7f78c6361..bfd78ddd8c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -893,10 +893,10 @@ config CMD_ROCKUSB
 
 config CMD_RKNAND
 	bool "rknand"
-	depends on RKNAND
-	default y if RKNAND
+	depends on (RKNAND || RKNANDC_NAND)
+	default y if (RKNAND || RKNANDC_NAND)
 	help
-	  Rockchip NAND FLASH device support
+	    Rockchip NAND FLASH device support
 
 config CMD_RKSFC
 	bool "rksfc"

commit aa74b60729b17fca518ad294d465032baa9983f5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 22:44:15 2018 +0800

    fastboot: fix cb_upload bug
    
    It will run sleep_thread when call
    fastboot_tx_write_str. So add wakeup_thread
    to function tx_handler_ul when tx_handler okay.
    
    Change-Id: I25996639bbed7228dc9bc4fb5184ddf2ee19a511
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
old mode 100644
new mode 100755
index ded9d2db29..6570aef9b2
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -873,6 +873,7 @@ static void tx_handler_ul(struct usb_ep *ep, struct usb_request *req)
 
 	if (remain_size <= 0) {
 		fastboot_func->in_req->complete = fastboot_complete;
+		wakeup_thread();
 		fastboot_tx_write_str("OKAY");
 		printf("\nuploading of %d bytes finished\n", upload_bytes);
 		upload_bytes = 0;

commit 8d0db1d9838243e603f3c0d67462ac8624d84204
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 22:19:10 2018 +0800

    lib: avb: implement the function get_random()
    
    Use the function get_timer to get the random
    seed. Then the seed is used by function srand
    to initialize the random data.
    
    Change-Id: Iaae6a17d22b8e85fb4d4b6c6247cd11003b64eea
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index bf92167b99..9dd8a8b570 100755
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -347,6 +347,23 @@ static void avb_set_key_version(AvbAtxOps* atx_ops,
 #endif
 }
 
+AvbIOResult rk_get_random(AvbAtxOps* atx_ops,
+                          size_t num_bytes,
+                          uint8_t* output)
+{
+        int i;
+        unsigned int seed;
+
+        seed = (unsigned int)get_timer(0);
+        for (i = 0; i < num_bytes; i++) {
+		srand(seed);
+                output[i] = (uint8_t)(rand());
+                seed = (unsigned int)(output[i]);
+        }
+
+        return 0;
+}
+
 AvbOps* avb_ops_user_new(void) {
   AvbOps* ops;
 
@@ -387,6 +404,7 @@ AvbOps* avb_ops_user_new(void) {
   ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
   ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
   ops->atx_ops->set_key_version = avb_set_key_version;
+  ops->atx_ops->get_random = rk_get_random;
 
 out:
   return ops;

commit c88f4351109fc2602a5c781f26d75a9b875a580c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 13 20:41:46 2018 +0800

    make.sh: show original chip name for build message
    
    Change-Id: I383c44d760f1670143aa8437597606902bbc10fa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index b2b2ec30da..5a4772fbea 100755
--- a/make.sh
+++ b/make.sh
@@ -2,8 +2,8 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKCHIP=${BOARD##*-}
-RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
+RKCHIP=$(echo ${BOARD##*-} | tr '[a-z]' '[A-Z]')
+ORG_RKCHIP=$RKCHIP
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
@@ -86,6 +86,7 @@ prepare()
 		else
 			RKCHIP=${RKCHIP%=*}
 			RKCHIP=${RKCHIP##*_}
+			ORG_RKCHIP=$RKCHIP
 		fi
 	fi
 
@@ -309,9 +310,9 @@ finish()
 {
 	echo
 	if [ "$BOARD" = '' ]; then
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
 	else
-		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+		echo "Platform ${ORG_RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
 	fi
 }
 

commit 30b04afc78b7b83a601dea5974bbefa8e9d731f9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jun 13 19:28:58 2018 +0800

    make.sh: support "./make.sh" build without [board] option
    
    this default use exist .config to build project. because users
    maybe don't like their .config to be override after "make menuconfig"
    change.
    
    Only one SoC in the .config is allowed, otherwise still use
    "./make.sh [board]".
    
    Change-Id: Ib65a4b6d6f84b822f6bdaf84b9784521fbf200e9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 9eee27c9d5..b2b2ec30da 100755
--- a/make.sh
+++ b/make.sh
@@ -5,7 +5,7 @@ SUBCMD=$2
 RKCHIP=${BOARD##*-}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
-SUPPROT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
+SUPPORT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
 ########################################### User can modify #############################################
 # User's rkbin tool relative path
@@ -42,26 +42,53 @@ PLATFORM_AARCH32=
 
 prepare()
 {
-	local absolute_path cmd
+	local absolute_path cmd count
+
+	# Assign output directory
+	cmd=${SUBCMD%=*}
+	if [ "${cmd}" = 'O' ]; then
+		OUTDIR=${SUBCMD#*=}
+		OUTOPT=O=${OUTDIR}
+	else
+		OUTDIR=.
+	fi
 
 	# Check invalid args and help
-	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
+	if [ "$BOARD" = '--help' -o "$BOARD" = '-help' -o "$BOARD" = 'help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
 		echo
 		echo "Usage: ./make.sh [board]"
 		echo "Example:"
+		echo "./make.sh		 ---- build with exist .config"
 		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
 		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
 		exit 1
-	elif [ ! -f configs/${BOARD}_defconfig ]; then
+	elif [ $BOARD ] && [ ! -f configs/${BOARD}_defconfig ]; then
+		echo
 		echo "Can't find: configs/${BOARD}_defconfig"
 		echo
-		echo "*************** Support list ***************"
-		echo "${SUPPROT_LIST}"
+		echo "******** Rockchip Support List *************"
+		echo "${SUPPORT_LIST}"
 		echo "********************************************"
 		echo
 		exit 1
 	fi
 
+	# Get RKCHIP from exist .config file
+	if [ "$RKCHIP" = '' ]; then
+		count=`grep -c '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+		RKCHIP=`grep '^CONFIG_ROCKCHIP_[R,P][X,V,K][0-9][0-9]' ${OUTDIR}/.config`
+		if [ $count -gt 1 ]; then
+			echo "Find $count SoC in .config file:"
+			echo "$RKCHIP"
+			echo
+			echo "I'm confused, please compile with [board], like: ./make.sh [board]"
+			exit 1
+		else
+			RKCHIP=${RKCHIP%=*}
+			RKCHIP=${RKCHIP##*_}
+		fi
+	fi
+
 	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
@@ -76,14 +103,13 @@ prepare()
 		echo "	3. Download full release SDK repository"
 		exit 1
 	fi
+}
 
-	# Assign output directory
-	cmd=${SUBCMD%=*}
-	if [ "${cmd}" = 'O' ]; then
-		OUTDIR=${SUBCMD#*=}
-		OUTOPT=O=${OUTDIR}
-	else
-		OUTDIR=.
+make_defconfig()
+{
+	if [ $BOARD ]; then
+		echo "make for ${BOARD}_defconfig by -j${JOB}"
+		make ${BOARD}_defconfig ${OUTOPT}
 	fi
 }
 
@@ -279,9 +305,18 @@ pack_trust_image()
 	fi
 }
 
+finish()
+{
+	echo
+	if [ "$BOARD" = '' ]; then
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with exist .config"
+	else
+		echo "Platform ${RKCHIP}${PLATFORM_AARCH32} is build OK, with new .config(make ${BOARD}_defconfig)"
+	fi
+}
+
 prepare
-echo "make for ${BOARD}_defconfig by -j${JOB}"
-make ${BOARD}_defconfig ${OUTOPT}
+make_defconfig
 select_toolchain
 fixup_platform_configure
 sub_commands
@@ -289,3 +324,4 @@ make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
 pack_uboot_image
 pack_loader_image
 pack_trust_image
+finish

commit f91f3b34274f35e9ce4952b54088eb46b93497da
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 11 10:14:20 2018 +0800

    rockchip: part: rkpram: update size for the last partition
    
    The last partition with size '-' use all remain size.
    
    Change-Id: Id91302d89927ac01c1975c8798c59543314689cd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 38bc2e112b..4dd2d564d7 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -83,6 +83,9 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		if (dev_desc->if_type != IF_TYPE_RKNAND)
 			offset = RK_PARAM_OFFSET;
 		part->start = start + offset;
+		/* Last partition use all remain space */
+		if (size == (~0UL))
+			size = dev_desc->lba - part->start;
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';

commit e0023032d6dfacfb5e36f7145ac682b8dbc85856
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jun 5 17:54:34 2018 +0800

    rockchip: rockusb: update for legacy tool
    
    Update data size for get_flash_id() and do_bad_block_test() so that
    legacy tool can till work;
    Add warning log for those not supported cmds from legacy tool;
    
    Change-Id: I40e7f5d82a138bef6f8b0cef237c04483e663931
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 2e89051462..9792ca01fa 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -155,7 +155,7 @@ static int rkusb_do_read_flash_id(struct fsg_common *common,
 				  struct fsg_buffhd *bh)
 {
 	u8 *buf = (u8 *)bh->buf;
-	u32 len = common->data_size;
+	u32 len = 5;
 	enum if_type type = ums[common->lun].block_dev.if_type;
 
 	if (type == IF_TYPE_MMC)
@@ -167,6 +167,7 @@ static int rkusb_do_read_flash_id(struct fsg_common *common,
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
+	common->data_size = len;
 
 	return len;
 }
@@ -175,12 +176,13 @@ static int rkusb_do_test_bad_block(struct fsg_common *common,
 				   struct fsg_buffhd *bh)
 {
 	u8 *buf = (u8 *)bh->buf;
-	u32 len = common->data_size;
+	u32 len = 64;
 
 	memset((void *)&buf[0], 0, len);
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
+	common->data_size = len;
 
 	return len;
 }
@@ -387,9 +389,10 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 
-	case RKUSB_SET_DEVICE_ID:
 	case RKUSB_READ_10:
 	case RKUSB_WRITE_10:
+		printf("CMD Not support, pls use new version Tool\n");
+	case RKUSB_SET_DEVICE_ID:
 	case RKUSB_ERASE_10:
 	case RKUSB_WRITE_SPARE:
 	case RKUSB_READ_SPARE:

commit ba0501aca290ca5c87ce48b247d37c934d6108cf
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Fri Jun 1 17:49:04 2018 +0800

    rockchip: rkflash: add slc nand flash and spi nand flash support
    
    1.All three types of flash including slc nand flash, spi nand flash
    and spi nor flash are code compatibility
    2.Add vendor partition ops
    3.Unified naming format and variable with code in kernel
    
    Change-Id: I0aa1c5daf9ec51296a6d2d904b2cf1ea7a0dd077
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/Kconfig b/drivers/rkflash/Kconfig
index ab6fce36a0..d8a37025fe 100644
--- a/drivers/rkflash/Kconfig
+++ b/drivers/rkflash/Kconfig
@@ -6,26 +6,53 @@
 if ARCH_ROCKCHIP
 
 menuconfig RKFLASH
-	tristate "Rockchip Flash Devices Support"
+	bool "Rockchip Flash Devices support"
 	default n
 	help
-	  Enable rockchip flash devices support.
-	  rkflash driver support 3-type flash devices: NANDC NAND, SFC_NOR
-	  and SFC_NAND.
+	  This enables support for Rockchip Flash Devices including Nandc Slc
+	  Nand, SFC SPI Nand and SFC SPI Nor.
+
+	  They're block interface.
+
 	  Say Y when you have a board with one of them.
 
 if RKFLASH
 
 comment "Rockchip Flash Devices"
 
+config RKNANDC_NAND
+	bool "Rockchip NANDC Slc Nand Devices support"
+	depends on RKNAND != y
+	default n
+	help
+	  This enables support for NANDC Slc Nand Devices.
+
+	  It's block interface, 512Kb/sector.
+
+	  Say Y when you have a board with Slc Nand Flash supported by Rockchip
+	  Nandc controller.
+
+config RKSFC_NAND
+	bool "Rockchip SFC SPI Nand Devices support"
+	depends on RKNAND != y
+	default n
+	help
+	  This enables support for Rockchip SFC SPI Nand Devices.
+
+	  It's block interface, 512Kb/sector.
+
+	  Say Y when you have a board with SPI Nand Flash supported by Rockchip
+          Serial Flash Controller(SFC).
 config RKSFC_NOR
-	bool "Rockchip SFC NOR flash support"
+	bool "Rockchip SFC SPI Nor Devices Support"
 	depends on BLK
 	help
-	  This option enables support for Rockchip SFC nor devices.
-	  It's block interface.
-	  512Kb/sector.
-	  Say y here to enable rockchip spi nor flash driver.
+	  This enables support for Rockchip SFC SPI Nor Devices.
+
+	  It's block interface,512Kb/sector.
+
+	  Say Y when you have a board with SPI Nor Flash supported by Rockchip
+	  Serial Flash Controller(SFC).
 
 endif # RKFLASH
 
diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
index 164c7e9d7f..19d980597a 100644
--- a/drivers/rkflash/Makefile
+++ b/drivers/rkflash/Makefile
@@ -1,8 +1,19 @@
 #
 # Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
 #
-# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+# SPDX-License-Identifier:	GPL-2.0
 #
 
-obj-y += rkflash_debug.o
-obj-$(CONFIG_RKSFC_NOR) += sfc.o sfc_nor.o rkflash_api.o rksfc_base.o rkflash_blk.o
\ No newline at end of file
+obj-$(CONFIG_RKNANDC_NAND) += rkflash_blk.o rknandc_base.o rkflash_api.o rkflash_debug.o flash.o nandc.o
+obj-$(CONFIG_RKSFC_NAND) += rkflash_blk.o rksfc_base.o  rkflash_api.o rkflash_debug.o sfc_nand.o sfc.o
+obj-$(CONFIG_RKSFC_NOR) += rkflash_blk.o rksfc_base.o rkflash_api.o rkflash_debug.o sfc_nor.o sfc.o
+
+ifneq (, $(CONFIG_RKNANDC_NAND)$(CONFIG_RKSFC_NAND))
+
+ifdef CONFIG_ARM64
+obj-y += rk_sftl_arm_v8.o
+else
+obj-y += rk_sftl_arm_v7.o
+endif
+
+endif
diff --git a/drivers/rkflash/flash.c b/drivers/rkflash/flash.c
new file mode 100644
index 0000000000..a3f9e89f3d
--- /dev/null
+++ b/drivers/rkflash/flash.c
@@ -0,0 +1,517 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <linux/delay.h>
+
+#include "flash.h"
+#include "flash_com.h"
+#include "nandc.h"
+#include "typedef.h"
+#include "rkflash_debug.h"
+
+#define FLASH_STRESS_TEST_EN		0
+
+static u8 id_byte[MAX_FLASH_NUM][8];
+static u8 die_cs_index[MAX_FLASH_NUM];
+static u8 g_nand_max_die;
+static u16 g_totle_block;
+static u8 g_nand_flash_ecc_bits;
+static u8 g_nand_idb_res_blk_num;
+
+static struct NAND_PARA_INFO_T nand_para = {
+	2,
+	{0x98, 0xF1, 0, 0, 0, 0},
+	TOSHIBA,
+	1,
+	4,
+	64,
+	1,
+	1,
+	1024,
+	0x100,
+	LSB_0,
+	RR_NONE,
+	16,
+	40,
+	1,
+	0,
+	BBF_1,
+	MPM_0,
+	{0}
+};	/* TC58NVG0S3HTA00 */
+
+void nandc_flash_reset(u8 cs)
+{
+	nandc_flash_cs(cs);
+	nandc_writel(RESET_CMD, NANDC_CHIP_CMD(cs));
+	nandc_wait_flash_ready(cs);
+	nandc_flash_de_cs(cs);
+}
+
+static void flash_read_id_raw(u8 cs, u8 *buf)
+{
+	u8 *ptr = (u8 *)buf;
+
+	nandc_flash_reset(cs);
+	nandc_flash_cs(cs);
+	nandc_writel(READ_ID_CMD, NANDC_CHIP_CMD(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_delayns(200);
+
+	ptr[0] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[1] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[2] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[3] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[4] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[5] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[6] = nandc_readl(NANDC_CHIP_DATA(cs));
+	ptr[7] = nandc_readl(NANDC_CHIP_DATA(cs));
+
+	nandc_flash_de_cs(cs);
+	if (ptr[0] != 0xFF && ptr[0] && ptr[1] != 0xFF)
+		PRINT_NANDC_E("No.%d FLASH ID:%x %x %x %x %x %x\n",
+			      cs + 1, ptr[0], ptr[1], ptr[2],
+			      ptr[3], ptr[4], ptr[5]);
+}
+
+static void flash_bch_sel(u8 bits)
+{
+	g_nand_flash_ecc_bits = bits;
+	nandc_bch_sel(bits);
+}
+
+static __maybe_unused void flash_timing_cfg(u32 ahb_khz)
+{
+	nandc_time_cfg(nand_para.access_freq);
+}
+
+static void flash_read_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(READ_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+	nandc_writel(READ_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static void flash_prog_first_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(PAGE_PROG_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(0x00, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+}
+
+static void flash_erase_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(BLOCK_ERASE_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+	nandc_writel(BLOCK_ERASE_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static void flash_prog_second_cmd(u8 cs, u32 page_addr)
+{
+	nandc_writel(PAGE_PROG_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static u32 flash_read_status(u8 cs, u32 page_addr)
+{
+	nandc_writel(READ_STATUS_CMD, NANDC_CHIP_CMD(cs));
+	nandc_delayns(80);
+
+	return nandc_readl(NANDC_CHIP_DATA(cs));
+}
+
+static void flash_read_random_dataout_cmd(u8 cs, u32 col_addr)
+{
+	nandc_writel(READ_DP_OUT_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(col_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(col_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(READ_DP_OUT_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+}
+
+static u32 flash_read_page_raw(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
+{
+	u32 ret = 0;
+	u32 error_ecc_bits;
+	u32 sec_per_page = nand_para.sec_per_page;
+
+	nandc_wait_flash_ready(cs);
+	nandc_flash_cs(cs);
+	flash_read_cmd(cs, page_addr);
+	nandc_wait_flash_ready(cs);
+	flash_read_random_dataout_cmd(cs, 0);
+	nandc_wait_flash_ready(cs);
+
+	error_ecc_bits = nandc_xfer_data(cs, NANDC_READ, sec_per_page,
+					 p_data, p_spare);
+	if (error_ecc_bits > 2) {
+		PRINT_NANDC_E("FlashReadRawPage %x %x error_ecc_bits %d\n",
+			      cs, page_addr, error_ecc_bits);
+		if (p_data)
+			PRINT_NANDC_HEX("data:", p_data, 4, 8);
+		if (p_spare)
+			PRINT_NANDC_HEX("spare:", p_spare, 4, 2);
+	}
+	nandc_flash_de_cs(cs);
+
+	if (error_ecc_bits != NAND_STS_ECC_ERR) {
+		if (error_ecc_bits >= (u32)nand_para.ecc_bits - 3)
+			ret = NAND_STS_REFRESH;
+		else
+			ret = NAND_STS_OK;
+	}
+
+	return ret;
+}
+
+static u32 flash_read_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
+{
+	u32 ret;
+
+	ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
+	if (ret == NAND_STS_ECC_ERR)
+		ret = flash_read_page_raw(cs, page_addr, p_data, p_spare);
+
+	return ret;
+}
+
+static u32 flash_prog_page(u8 cs, u32 page_addr, u32 *p_data, u32 *p_spare)
+{
+	u32 status;
+	u32 sec_per_page = nand_para.sec_per_page;
+
+	nandc_wait_flash_ready(cs);
+	nandc_flash_cs(cs);
+	flash_prog_first_cmd(cs, page_addr);
+	nandc_xfer_data(cs, NANDC_WRITE, sec_per_page, p_data, p_spare);
+	flash_prog_second_cmd(cs, page_addr);
+	nandc_wait_flash_ready(cs);
+	status = flash_read_status(cs, page_addr);
+	nandc_flash_de_cs(cs);
+	status &= 0x01;
+	if (status) {
+		PRINT_NANDC_I("%s addr=%x status=%x\n",
+			      __func__, page_addr, status);
+	}
+	return status;
+}
+
+static u32 flash_erase_block(u8 cs, u32 page_addr)
+{
+	u32 status;
+
+	nandc_wait_flash_ready(cs);
+	nandc_flash_cs(cs);
+	flash_erase_cmd(cs, page_addr);
+	nandc_wait_flash_ready(cs);
+	status = flash_read_status(cs, page_addr);
+	nandc_flash_de_cs(cs);
+	status &= 0x01;
+	if (status) {
+		PRINT_NANDC_I("%s pageadd=%x status=%x\n",
+			      __func__, page_addr, status);
+	}
+	return status;
+}
+
+static void flash_read_spare(u8 cs, u32 page_addr, u8 *spare)
+{
+	u32 col = nand_para.sec_per_page << 9;
+
+	nandc_writel(READ_CMD >> 8, NANDC_CHIP_CMD(cs));
+	nandc_writel(col, NANDC_CHIP_ADDR(cs));
+	nandc_writel(col >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr & 0x00ff, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 8, NANDC_CHIP_ADDR(cs));
+	nandc_writel(page_addr >> 16, NANDC_CHIP_ADDR(cs));
+	nandc_writel(READ_CMD & 0x00ff, NANDC_CHIP_CMD(cs));
+
+	nandc_wait_flash_ready(cs);
+
+	*spare = nandc_readl(NANDC_CHIP_DATA(cs));
+}
+
+/*
+ * Read the 1st page's 1st spare byte of a phy_blk
+ * If not FF, it's bad blk
+ */
+static s32 get_bad_blk_list(u16 *table, u32 die)
+{
+	u16 blk;
+	u32 bad_cnt, page_addr0, page_addr1, page_addr2;
+	u32 blk_per_die;
+	u8 bad_flag0, bad_flag1, bad_flag2;
+
+	bad_cnt = 0;
+	blk_per_die = nand_para.plane_per_die * nand_para.blk_per_plane;
+	for (blk = 0; blk < blk_per_die; blk++) {
+		bad_flag0 = 0xFF;
+		bad_flag1 = 0xFF;
+		bad_flag2 = 0xFF;
+		page_addr0 = (blk + blk_per_die * die) *
+			nand_para.page_per_blk + 0;
+		page_addr1 = page_addr0 + 1;
+		page_addr2 = page_addr0 + nand_para.page_per_blk - 1;
+		flash_read_spare(die, page_addr0, &bad_flag0);
+		flash_read_spare(die, page_addr1, &bad_flag1);
+		flash_read_spare(die, page_addr2, &bad_flag2);
+		if (bad_flag0 != 0xFF ||
+		    bad_flag1 != 0xFF ||
+		    bad_flag2 != 0xFF) {
+			table[bad_cnt++] = blk;
+			PRINT_NANDC_E("die[%d], bad_blk[%d]\n", die, blk);
+		}
+	}
+	return bad_cnt;
+}
+
+#if FLASH_STRESS_TEST_EN
+
+#define FLASH_PAGE_SIZE	2048
+#define FLASH_SPARE_SIZE	8
+
+static u16 bad_blk_list[1024];
+static u32 pwrite[FLASH_PAGE_SIZE / 4];
+static u32 pread[FLASH_PAGE_SIZE / 4];
+static u32 pspare_write[FLASH_SPARE_SIZE / 4];
+static u32 pspare_read[FLASH_SPARE_SIZE / 4];
+static u32 bad_blk_num;
+static u32 bad_page_num;
+
+static void flash_test(void)
+{
+	u32 i, blk, page, bad_cnt, page_addr;
+	int ret;
+	u32 pages_num = 64;
+	u32 blk_addr = 64;
+	u32 is_bad_blk = 0;
+
+	PRINT_NANDC_E("%s\n", __func__);
+	bad_blk_num = 0;
+	bad_page_num = 0;
+	bad_cnt	= get_bad_blk_list(bad_blk_list, 0);
+
+	for (blk = 0; blk < 1024; blk++) {
+		for (i = 0; i < bad_cnt; i++) {
+			if (bad_blk_list[i] == blk)
+				break;
+		}
+		if (i < bad_cnt)
+			continue;
+		is_bad_blk = 0;
+		PRINT_NANDC_E("Flash prog block: %x\n", blk);
+		flash_erase_block(0, blk * blk_addr);
+		for (page = 0; page < pages_num; page++) {
+			page_addr = blk * blk_addr + page;
+			for (i = 0; i < 512; i++)
+				pwrite[i] = (page_addr << 16) + i;
+			pspare_write[0] = pwrite[0] + 0x5AF0;
+			pspare_write[1] = pspare_write[0] + 1;
+			flash_prog_page(0, page_addr, pwrite, pspare_write);
+			memset(pread, 0, 2048);
+			memset(pspare_read, 0, 8);
+			ret = flash_read_page(0, page_addr, pread,
+					      pspare_read);
+			if (ret != NAND_STS_OK)
+				is_bad_blk = 1;
+			for (i = 0; i < 512; i++) {
+				if (pwrite[i] != pread[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			for (i = 0; i < 2; i++) {
+				if (pspare_write[i] != pspare_read[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			if (is_bad_blk) {
+				bad_page_num++;
+				PRINT_NANDC_E("ERR:page %x, ret= %x\n",
+					      page_addr,
+					      ret);
+				PRINT_NANDC_HEX("data:", pread, 4, 8);
+				PRINT_NANDC_HEX("spare:", pspare_read, 4, 2);
+			}
+		}
+		flash_erase_block(0, blk * blk_addr);
+		if (is_bad_blk)
+			bad_blk_num++;
+	}
+	PRINT_NANDC_E("bad_blk_num = %d, bad_page_num = %d\n",
+		      bad_blk_num, bad_page_num);
+
+	PRINT_NANDC_E("Flash Test Finish!!!\n");
+	while (1)
+		;
+}
+#endif
+
+static void flash_die_info_init(void)
+{
+	u32 cs;
+
+	g_nand_max_die = 0;
+	for (cs = 0; cs < MAX_FLASH_NUM; cs++) {
+		if (nand_para.nand_id[1] == id_byte[cs][1]) {
+			die_cs_index[g_nand_max_die] = cs;
+			g_nand_max_die++;
+		}
+	}
+	g_totle_block = g_nand_max_die *  nand_para.plane_per_die *
+			nand_para.blk_per_plane;
+}
+
+static void nandc_flash_print_info(void)
+{
+	PRINT_NANDC_I("No.0 FLASH ID: %x %x %x %x %x %x\n",
+		      nand_para.nand_id[0],
+		      nand_para.nand_id[1],
+		      nand_para.nand_id[2],
+		      nand_para.nand_id[3],
+		      nand_para.nand_id[4],
+		      nand_para.nand_id[5]);
+	PRINT_NANDC_I("die_per_chip: %x\n", nand_para.die_per_chip);
+	PRINT_NANDC_I("sec_per_page: %x\n", nand_para.sec_per_page);
+	PRINT_NANDC_I("page_per_blk: %x\n", nand_para.page_per_blk);
+	PRINT_NANDC_I("cell: %x\n", nand_para.cell);
+	PRINT_NANDC_I("plane_per_die: %x\n", nand_para.plane_per_die);
+	PRINT_NANDC_I("blk_per_plane: %x\n", nand_para.blk_per_plane);
+	PRINT_NANDC_I("TotleBlock: %x\n", g_totle_block);
+	PRINT_NANDC_I("die gap: %x\n", nand_para.die_gap);
+	PRINT_NANDC_I("lsb_mode: %x\n", nand_para.lsb_mode);
+	PRINT_NANDC_I("read_retry_mode: %x\n", nand_para.read_retry_mode);
+	PRINT_NANDC_I("ecc_bits: %x\n", nand_para.ecc_bits);
+	PRINT_NANDC_I("Use ecc_bits: %x\n", g_nand_flash_ecc_bits);
+	PRINT_NANDC_I("access_freq: %x\n", nand_para.access_freq);
+	PRINT_NANDC_I("opt_mode: %x\n", nand_para.opt_mode);
+
+	PRINT_NANDC_I("Cache read enable: %x\n",
+		      nand_para.operation_opt & NAND_CACHE_READ_EN ? 1 : 0);
+	PRINT_NANDC_I("Cache random read enable: %x\n",
+		      nand_para.operation_opt &
+			NAND_CACHE_RANDOM_READ_EN ? 1 : 0);
+	PRINT_NANDC_I("Cache prog enable: %x\n",
+		      nand_para.operation_opt & NAND_CACHE_PROG_EN ? 1 : 0);
+	PRINT_NANDC_I("multi read enable: %x\n",
+		      nand_para.operation_opt & NAND_MULTI_READ_EN ? 1 : 0);
+
+	PRINT_NANDC_I("multi prog enable: %x\n",
+		      nand_para.operation_opt & NAND_MULTI_PROG_EN ? 1 : 0);
+	PRINT_NANDC_I("interleave enable: %x\n",
+		      nand_para.operation_opt & NAND_INTERLEAVE_EN ? 1 : 0);
+
+	PRINT_NANDC_I("read retry enable: %x\n",
+		      nand_para.operation_opt & NAND_READ_RETRY_EN ? 1 : 0);
+	PRINT_NANDC_I("randomizer enable: %x\n",
+		      nand_para.operation_opt & NAND_RANDOMIZER_EN ? 1 : 0);
+
+	PRINT_NANDC_I("SDR enable: %x\n",
+		      nand_para.operation_opt & NAND_SDR_EN ? 1 : 0);
+	PRINT_NANDC_I("ONFI enable: %x\n",
+		      nand_para.operation_opt & NAND_ONFI_EN ? 1 : 0);
+	PRINT_NANDC_I("TOGGLE enable: %x\n",
+		      nand_para.operation_opt & NAND_TOGGLE_EN ? 1 : 0);
+
+	PRINT_NANDC_I("g_nand_idb_res_blk_num: %x\n", g_nand_idb_res_blk_num);
+}
+
+static void ftl_flash_init(void)
+{
+	/* para init */
+	g_nand_phy_info.nand_type	= nand_para.cell;
+	g_nand_phy_info.die_num		= nand_para.die_per_chip;
+	g_nand_phy_info.plane_per_die	= nand_para.plane_per_die;
+	g_nand_phy_info.blk_per_plane	= nand_para.blk_per_plane;
+	g_nand_phy_info.page_per_blk	= nand_para.page_per_blk;
+	g_nand_phy_info.page_per_slc_blk	= nand_para.page_per_blk /
+						  nand_para.cell;
+	g_nand_phy_info.byte_per_sec	= 512;
+	g_nand_phy_info.sec_per_page	= nand_para.sec_per_page;
+	g_nand_phy_info.sec_per_blk	= nand_para.sec_per_page *
+					  nand_para.page_per_blk;
+	g_nand_phy_info.reserved_blk	= 8;
+	g_nand_phy_info.blk_per_die	= nand_para.plane_per_die *
+					  nand_para.blk_per_plane;
+	g_nand_phy_info.ecc_bits	= nand_para.ecc_bits;
+
+	/* driver register */
+	g_nand_ops.get_bad_blk_list	= get_bad_blk_list;
+	g_nand_ops.erase_blk		= flash_erase_block;
+	g_nand_ops.prog_page		= flash_prog_page;
+	g_nand_ops.read_page		= flash_read_page;
+}
+
+u32 nandc_flash_init(void __iomem *nandc_addr)
+{
+	u32 cs;
+
+	PRINT_NANDC_I("...%s enter...\n", __func__);
+	g_nand_idb_res_blk_num = MAX_IDB_RESERVED_BLOCK;
+
+	nandc_init(nandc_addr);
+
+	for (cs = 0; cs < MAX_FLASH_NUM; cs++) {
+		flash_read_id_raw(cs, id_byte[cs]);
+		if (cs == 0) {
+			if (id_byte[0][0] == 0xFF ||
+			    id_byte[0][0] == 0 ||
+			    id_byte[0][1] == 0xFF)
+				return FTL_NO_FLASH;
+			if (id_byte[0][1] != 0xF1 &&
+			    id_byte[0][1] != 0xDA &&
+			    id_byte[0][1] != 0xD1 &&
+			    id_byte[0][1] != 0x95 &&
+			    id_byte[0][1] != 0xDC)
+
+				return FTL_UNSUPPORTED_FLASH;
+		}
+	}
+	nand_para.nand_id[1] = id_byte[0][1];
+	if (id_byte[0][1] == 0xDA) {
+		nand_para.plane_per_die = 2;
+		nand_para.nand_id[1] = 0xDA;
+	} else if (id_byte[0][1] == 0xDC) {
+		nand_para.nand_id[1] = 0xDC;
+		if (id_byte[0][0] == 0x2C && id_byte[0][3] == 0xA6) {
+			nand_para.plane_per_die = 2;
+			nand_para.sec_per_page = 8;
+		} else {
+			nand_para.plane_per_die = 2;
+			nand_para.blk_per_plane = 2048;
+		}
+	}
+	flash_die_info_init();
+	flash_bch_sel(nand_para.ecc_bits);
+	nandc_flash_print_info();
+	/* flash_print_info(); */
+	ftl_flash_init();
+
+	#if FLASH_STRESS_TEST_EN
+	flash_test();
+	#endif
+
+	return 0;
+}
+
+void nandc_flash_get_id(u8 cs, void *buf)
+{
+	memcpy(buf, id_byte[cs], 5);
+}
+
+u32 nandc_flash_deinit(void)
+{
+	return 0;
+}
diff --git a/drivers/rkflash/flash.h b/drivers/rkflash/flash.h
new file mode 100644
index 0000000000..d7e44d7e9f
--- /dev/null
+++ b/drivers/rkflash/flash.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __FLASH_H
+#define __FLASH_H
+
+#include "typedef.h"
+
+#ifndef BIT
+#define BIT(nr)			(1 << (nr))
+#endif
+
+#define MAX_FLASH_NUM			2
+#define MAX_IDB_RESERVED_BLOCK		12
+
+#define NAND_CACHE_READ_EN		BIT(0)
+#define NAND_CACHE_RANDOM_READ_EN	BIT(1)
+#define NAND_CACHE_PROG_EN		BIT(2)
+#define NAND_MULTI_READ_EN		BIT(3)
+
+#define NAND_MULTI_PROG_EN		BIT(4)
+#define NAND_INTERLEAVE_EN		BIT(5)
+#define NAND_READ_RETRY_EN		BIT(6)
+#define NAND_RANDOMIZER_EN		BIT(7)
+
+#define NAND_INTER_MODE_OFFSET		(0x8)
+#define NAND_INTER_MODE_MARK		(0x07)
+#define NAND_INTER_SDR_EN		BIT(0)
+#define NAND_INTER_ONFI_EN		BIT(1)
+#define NAND_INTER_TOGGLE_EN		BIT(2)
+
+#define NAND_SDR_EN			BIT(8)
+#define NAND_ONFI_EN			BIT(9)
+#define NAND_TOGGLE_EN			BIT(10)
+#define NAND_UNIQUE_ID_EN		BIT(11)
+
+#define RESET_CMD		0xff
+#define READ_ID_CMD		0x90
+#define READ_STATUS_CMD		0x70
+#define PAGE_PROG_CMD		0x8010
+#define BLOCK_ERASE_CMD		0x60d0
+#define READ_CMD		0x0030
+#define READ_DP_OUT_CMD		0x05E0
+
+#define SAMSUNG			0x00	/* SAMSUNG */
+#define TOSHIBA			0x01	/* TOSHIBA */
+#define HYNIX			0x02	/* HYNIX */
+#define INFINEON		0x03	/* INFINEON */
+#define MICRON			0x04	/* MICRON */
+#define RENESAS			0x05	/* RENESAS */
+#define ST			0x06	/* ST */
+#define INTEL			0x07	/* intel */
+#define Sandisk			0x08	/* Sandisk */
+
+#define RR_NONE			0x00
+#define RR_HY_1			0x01	/* hynix H27UCG8T2M */
+#define RR_HY_2			0x02	/* hynix H27UBG08U0B */
+#define RR_HY_3			0x03	/* hynix H27UCG08U0B H27UBG08U0C */
+#define RR_HY_4                 0x04	/* hynix H27UCG8T2A */
+#define RR_HY_5                 0x05	/* hynix H27UCG8T2E */
+#define RR_HY_6                 0x06	/* hynix H27QCG8T2F5R-BCG */
+#define RR_MT_1                 0x11	/* micron */
+#define RR_MT_2                 0x12	/* micron L94C L95B */
+#define RR_TH_1                 0x21	/* toshiba */
+#define RR_TH_2                 0x22	/* toshiba */
+#define RR_TH_3                 0x23	/* toshiba */
+#define RR_SS_1                 0x31	/* samsung */
+#define RR_SD_1                 0x41	/* Sandisk */
+#define RR_SD_2                 0x42	/* Sandisk */
+#define RR_SD_3                 0x43	/* Sandisk */
+#define RR_SD_4                 0x44	/* Sandisk */
+
+/*  0 1 2 3 4 5 6 7 8 9 slc */
+#define LSB_0	0
+/*  0 1 2 3 6 7 A B E F hynix, micron 74A */
+#define LSB_1	1
+/*  0 1 3 5 7 9 B D toshiba samsung sandisk */
+#define LSB_2	2
+/*  0 1 2 3 4 5 8 9 C D 10 11 micron 84A */
+#define LSB_3	3
+/*  0 1 2 3 4 5 7 8 A B E F micron L95B */
+#define LSB_4	4
+/*  0 1 2 3 4 5 8 9 14 15 20 21 26 27 micron B74A TLC */
+#define LSB_6	6
+/*  0 3 6 9 C F 12 15 18 15 1B 1E 21 24 K9ABGD8U0C TLC */
+#define LSB_7	7
+
+/* BadBlockFlagMode */
+/* first spare @ first page of each blocks */
+#define BBF_1	1
+/* first spare @ last page of each blocks */
+#define BBF_2	2
+/* first spare @ first and last page of each blocks */
+#define BBF_11	3
+/* sandisk 15nm flash prog first page without data and check status */
+#define BBF_3	4
+
+#define MPM_0	0	/* block 0 ~ 1 */
+#define MPM_1	1	/* block 0 ~ 2048... */
+
+struct NAND_PARA_INFO_T {
+	u8	id_bytes;
+	u8	nand_id[6];
+	u8	vendor;
+	u8	die_per_chip;
+	u8	sec_per_page;
+	u16	page_per_blk;
+	u8	cell;	/* 1 slc , 2 mlc , 3 tlc */
+	u8	plane_per_die;
+	u16	 blk_per_plane;
+	u16	operation_opt;
+	u8	lsb_mode;
+	u8	read_retry_mode;
+	u8	ecc_bits;
+	u8	access_freq;
+	u8	opt_mode;
+	u8	die_gap;
+	u8	bad_block_mode;
+	u8	multi_plane_mode;
+	u8	reversd2[6];	/* 32 bytes */
+};
+
+struct FLASH_INFO_T {
+	u16	block_size;
+	u8	ecc_bits;
+	u32	flash_size;
+	u16	page_size;
+	u8	access_time;
+	u8	manufacturer_name;
+	u8	flash_mask;
+};
+
+extern struct nand_phy_info	g_nand_phy_info;
+extern struct nand_ops		g_nand_ops;
+extern void __iomem *nandc_base;
+
+void nandc_flash_get_id(u8 cs, void *buf);
+void nandc_flash_reset(u8 chip_sel);
+u32 nandc_flash_init(void __iomem *nandc_addr);
+u32 nandc_flash_deinit(void);
+
+#endif
diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h
new file mode 100644
index 0000000000..65081efade
--- /dev/null
+++ b/drivers/rkflash/flash_com.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __FLASH_COM_H
+#define __FLASH_COM_H
+
+#include "typedef.h"
+
+#define NAND_ERROR			INVALID_UINT32
+#define NAND_OK				0
+
+#define NAND_STS_OK                     0	/* bit 0 ecc error or ok */
+#define NAND_STS_REFRESH                256	/* need refresh */
+#define NAND_STS_EMPTY                  512	/* page is not proged */
+#define NAND_STS_ECC_ERR                NAND_ERROR
+
+#define FULL_SLC			0
+#define SLC				1
+
+#define NAND_FLASH_MLC_PAGE_TAG         0xFFFF
+#define MAX_FLASH_PAGE_SIZE		0x1000 /* 4KB */
+
+#define PAGE_ADDR_BITS			0
+#define PAGE_ADDR_MASK			((1u << 11) - 1)
+#define BLOCK_ADDR_BITS			11
+#define BLOCK_ADDR_MASK			((1u << 14) - 1)
+#define DIE_ADDR_BITS			25
+#define DIE_ADDR_MASK			((1u << 3) - 1)
+#define FLAG_ADDR_BITS			28
+#define FLAG_ADDR_MASK			((1u << 4) - 1)
+#define PHY_BLK_DIE_ADDR_BITS		14
+
+struct nand_req {
+	u32 status;
+	u32 page_addr;   /* 31:28 flag, 27:25: die, 24:11 block, 10:0 page */
+	u32 *p_data;
+	u32 *p_spare;
+	u32 lpa;
+};
+
+struct nand_phy_info {
+	u16	nand_type;		/* SLC,MLC,TLC */
+	u16	die_num;		/* number of LUNs */
+	u16	plane_per_die;
+	u16	blk_per_plane;
+	u16	blk_per_die;
+	u16	page_per_blk;		/* in MLC mode */
+	u16	page_per_slc_blk;	/* in SLC mode */
+	u16	sec_per_page;		/* physical page data size */
+	u16	sec_per_blk;		/* physical page data size */
+	u16	byte_per_sec;		/* size of logical sectors */
+	u16	reserved_blk;		/* reserved for boot loader in die 0*/
+	u8	ecc_bits;
+};
+
+struct nand_ops {
+	s32 (*get_bad_blk_list)(u16 *table, u32 die);
+	u32 (*erase_blk)(u8 cs, u32 page_addr);
+	u32 (*prog_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
+	u32 (*read_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare);
+};
+
+#endif
diff --git a/drivers/rkflash/nandc.c b/drivers/rkflash/nandc.c
new file mode 100644
index 0000000000..8f5c87c283
--- /dev/null
+++ b/drivers/rkflash/nandc.c
@@ -0,0 +1,292 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <linux/compat.h>
+#include <linux/delay.h>
+
+#include "flash.h"
+#include "flash_com.h"
+#include "nandc.h"
+#include "typedef.h"
+
+#define     CPU_DELAY_NS(n)	ndelay(n)
+
+#define	    NANDC_MASTER_EN
+
+void __iomem *nandc_base;
+
+static u32 g_nandc_ecc_bits;
+#ifdef NANDC_MASTER_EN
+static struct MASTER_INFO_T master;
+static u32 *g_master_temp_buf;
+#endif
+
+void nandc_init(void __iomem *nandc_addr)
+{
+	union FM_CTL_T ctl_reg;
+
+	nandc_base = nandc_addr;
+
+	ctl_reg.d32 = 0;
+	ctl_reg.V6.wp = 1;
+	nandc_writel(ctl_reg.d32, NANDC_FMCTL);
+	nandc_writel(0, NANDC_RANDMZ_CFG);
+	nandc_time_cfg(40);
+
+#ifdef NANDC_MASTER_EN
+	if (!g_master_temp_buf)
+		g_master_temp_buf = (u32 *)ftl_malloc(MAX_FLASH_PAGE_SIZE +
+					      MAX_FLASH_PAGE_SIZE / 8);
+	master.page_buf = &g_master_temp_buf[0];
+	master.spare_buf = &g_master_temp_buf[MAX_FLASH_PAGE_SIZE / 4];
+	master.mapped = 0;
+#endif
+}
+
+void nandc_flash_cs(u8 chip_sel)
+{
+	union FM_CTL_T tmp;
+
+	tmp.d32 = nandc_readl(NANDC_FMCTL);
+	tmp.V6.cs = 0x01 << chip_sel;
+	nandc_writel(tmp.d32, NANDC_FMCTL);
+}
+
+void nandc_flash_de_cs(u8 chip_sel)
+{
+	union FM_CTL_T tmp;
+
+	tmp.d32 = nandc_readl(NANDC_FMCTL);
+	tmp.V6.cs = 0;
+	tmp.V6.flash_abort_clear = 0;
+	nandc_writel(tmp.d32, NANDC_FMCTL);
+}
+
+u32 nandc_delayns(u32 count)
+{
+	CPU_DELAY_NS(count);
+	return 0;
+}
+
+u32 nandc_wait_flash_ready(u8 chip_sel)
+{
+	union FM_CTL_T tmp;
+	u32 status;
+	u32 i;
+
+	status = 0;
+	for (i = 0; i < 100000; i++) {
+		nandc_delayns(100);
+		tmp.d32 = nandc_readl(NANDC_FMCTL);
+		if (tmp.V6.rdy != 0)
+			break;
+	}
+
+	if (i >= 100000)
+		status = -1;
+	return status;
+}
+
+void nandc_randmz_sel(u8 chip_sel, u32 randmz_seed)
+{
+	nandc_writel(randmz_seed, NANDC_RANDMZ_CFG);
+}
+
+void nandc_time_cfg(u32 ns)
+{
+	if (ns < 36)
+		nandc_writel(0x1061, NANDC_FMWAIT);
+	else if (ns >= 100)
+		nandc_writel(0x2082, NANDC_FMWAIT);
+	else
+		nandc_writel(0x1081, NANDC_FMWAIT);
+}
+
+void nandc_bch_sel(u8 bits)
+{
+	union BCH_CTL_T tmp;
+	union FL_CTL_T fl_reg;
+
+	fl_reg.d32 = 0;
+	fl_reg.V6.rst = 1;
+	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+	g_nandc_ecc_bits = bits;
+	tmp.d32 = 0;
+	tmp.V6.addr = 0x10;
+	tmp.V6.bch_mode1 = 0;
+	if (bits == 16) {
+		tmp.V6.bch_mode = 0;
+	} else if (bits == 24) {
+		tmp.V6.bch_mode = 1;
+	} else {
+		tmp.V6.bch_mode1 = 1;
+		tmp.V6.bch_mode = 1;
+		if (bits == 40)
+			tmp.V6.bch_mode = 0;
+	}
+	tmp.V6.rst = 1;
+	nandc_writel(tmp.d32, NANDC_BCHCTL);
+}
+
+static void nandc_xfer_start(u8 chip_sel,
+			     u8 dir,
+			     u8 sector_count,
+			     u8 st_buf,
+			     u32 *p_data,
+			     u32 *p_spare)
+{
+	union BCH_CTL_T bch_reg;
+	union FL_CTL_T fl_reg;
+	u8 bus_mode = (p_spare || p_data);
+	u32 i;
+	union MTRANS_CFG_T master_reg;
+	u16 *p_spare_tmp = (u16 *)p_spare;
+	u64 vir_addr;
+
+	fl_reg.d32 = 0;
+	bch_reg.d32 = nandc_readl(NANDC_BCHCTL);
+	bch_reg.V6.addr = 0x10;
+	bch_reg.V6.power_down = 0;
+	bch_reg.V6.region = chip_sel;
+
+	fl_reg.V6.rdn = dir;
+	fl_reg.V6.dma = 1;
+	fl_reg.V6.tr_count = 1;
+	fl_reg.V6.async_tog_mix = 1;
+	fl_reg.V6.cor_en = 1;
+	fl_reg.V6.st_addr = st_buf / 2;
+
+	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+	master_reg.V6.bus_mode = 0;
+	#ifdef NANDC_MASTER_EN
+	if (bus_mode != 0 && dir != 0) {
+		u32 spare_sz = 64;
+
+		for (i = 0; i < sector_count / 2; i++) {
+			if (p_spare) {
+				master.spare_buf[i * spare_sz / 4] =
+				(p_spare_tmp[0]) | ((u32)p_spare_tmp[1] << 16);
+				p_spare_tmp += 2;
+			} else{
+				master.spare_buf[i * spare_sz / 4] =
+				0xffffffff;
+			}
+		}
+	}
+	fl_reg.V6.page_num = (sector_count + 1) / 2;
+	master.page_vir = (u32 *)((p_data == (u32 *)NULL) ?
+				  master.page_buf :
+				  (u32 *)p_data);
+	master.spare_vir = (u32 *)master.spare_buf;
+
+	master.page_phy = (u32)((unsigned long)master.page_vir);
+	master.spare_phy = (u32)((unsigned long)master.spare_vir);
+	vir_addr = ((unsigned long)master.page_phy);
+	flush_dcache_range(vir_addr & (~0x3FuL),
+			   ((vir_addr + 63) & (~0x3FuL)) +
+				fl_reg.V6.page_num * 1024);
+	vir_addr = ((unsigned long)master.spare_phy);
+	flush_dcache_range(vir_addr & (~0x3FuL),
+			   ((vir_addr + 63) & (~0x3FuL)) +
+				fl_reg.V6.page_num * 128);
+	master.mapped = 1;
+	nandc_writel(master.page_phy, NANDC_MTRANS_SADDR0);
+	nandc_writel(master.spare_phy, NANDC_MTRANS_SADDR1);
+	master_reg.d32 = 0;
+	master_reg.V6.incr_num = 16;
+	master_reg.V6.burst = 7;
+	if ((((unsigned long)p_data) & 0x03) == 0)
+		master_reg.V6.hsize = 2;
+	master_reg.V6.bus_mode = 1;
+	master_reg.V6.ahb_wr = !dir;
+	master_reg.V6.ahb_wr_st = 1;
+	#endif
+
+	nandc_writel(master_reg.d32, NANDC_MTRANS_CFG);
+	nandc_writel(bch_reg.d32, NANDC_BCHCTL);
+	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+	fl_reg.V6.start = 1;
+	nandc_writel(fl_reg.d32, NANDC_FLCTL);
+}
+
+static void nandc_xfer_comp(u8 chip_sel)
+{
+	union FL_CTL_T fl_reg;
+	union MTRANS_CFG_T master_reg;
+
+	master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG);
+	if (master_reg.V6.bus_mode != 0) {
+		union MTRANS_STAT_T stat_reg;
+
+		if (master_reg.V6.ahb_wr != 0) {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+				stat_reg.d32 = nandc_readl(NANDC_MTRANS_STAT);
+			} while (stat_reg.V6.mtrans_cnt < fl_reg.V6.page_num);
+		} else {
+			do {
+				fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+			} while (fl_reg.V6.tr_rdy == 0);
+		}
+	} else {
+		do {
+			fl_reg.d32 = nandc_readl(NANDC_FLCTL);
+		} while ((fl_reg.V6.tr_rdy == 0));
+	}
+}
+
+u32 nandc_xfer_data(u8 chip_sel, u8 dir, u8 sector_count,
+		    u32 *p_data, u32 *p_spare)
+{
+	u32 status = NAND_STS_OK;
+	u32 i;
+	u32 spare[16];
+	union BCH_ST_T bch_st_reg;
+
+	if (dir == NANDC_WRITE && !p_spare) {
+		p_spare = (u32 *)spare;
+		memset(spare, 0xFF, sizeof(spare));
+	}
+	nandc_xfer_start(chip_sel, dir, sector_count, 0, p_data, p_spare);
+	nandc_xfer_comp(chip_sel);
+	if (dir == NANDC_READ) {
+		if (p_spare) {
+			u32 spare_sz = 64;
+			u32 temp_data;
+			u8 *p_spare_temp = (u8 *)p_spare;
+
+			for (i = 0; i < sector_count / 2; i++) {
+				temp_data = master.spare_buf[i * spare_sz / 4];
+				*p_spare_temp++ = (u8)temp_data;
+				*p_spare_temp++ = (u8)(temp_data >> 8);
+				*p_spare_temp++ = (u8)(temp_data >> 16);
+				*p_spare_temp++ = (u8)(temp_data >> 24);
+			}
+		}
+		for (i = 0; i < sector_count / 4 ; i++) {
+			bch_st_reg.d32 = nandc_readl(NANDC_BCHST(i));
+			if (bch_st_reg.V6.fail0 || bch_st_reg.V6.fail1) {
+				status = NAND_STS_ECC_ERR;
+			} else {
+				u32 tmp = 0;
+
+				tmp =
+				max(bch_st_reg.V6.err_bits0 |
+				    ((u32)bch_st_reg.V6.err_bits0_5 << 5),
+				    bch_st_reg.V6.err_bits1 |
+				    ((u32)bch_st_reg.V6.err_bits1_5 << 5));
+				status = max(tmp, status);
+			}
+		}
+	}
+	nandc_writel(0, NANDC_MTRANS_CFG);
+	return status;
+}
+
+void nandc_clean_irq(void)
+{
+}
diff --git a/drivers/rkflash/nandc.h b/drivers/rkflash/nandc.h
new file mode 100644
index 0000000000..689f50f5cc
--- /dev/null
+++ b/drivers/rkflash/nandc.h
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __NAND_H
+#define __NAND_H
+
+#include <asm/io.h>
+
+#define nandc_writel(v, offs)	writel((v), (offs) + nandc_base)
+#define nandc_readl(offs)	readl((offs) + nandc_base)
+
+#define NANDC_READ	0
+#define NANDC_WRITE	1
+
+/* INT ID */
+enum NANDC_IRQ_NUM_T {
+	NC_IRQ_DMA = 0,
+	NC_IRQ_FRDY,
+	NC_IRQ_BCHERR,
+	NC_IRQ_BCHFAIL,
+	NC_IRQ_LLP
+};
+
+union FM_CTL_T {
+	u32 d32;
+	struct {
+		unsigned cs : 8;		/* bits[0:7] */
+		unsigned wp : 1;		/* bits[8] */
+		unsigned rdy : 1;		/* bits[9] */
+		unsigned fifo_empty : 1;	/* bits[10] */
+		unsigned reserved11 : 1;	/* bits[11] */
+		unsigned dwidth : 1;		/* bits[12] */
+		unsigned tm : 1;		/* bits[13] */
+		unsigned onficlk_en : 1;	/* bits[14] */
+		unsigned toggle_en : 1;		/* bits[15] */
+		unsigned flash_abort_en : 1;	/* bits[16] */
+		unsigned flash_abort_clear : 1;	/* bits[17] */
+		unsigned reserved18_23 : 6;	/* bits[18:23] */
+		unsigned read_delay : 3;	/* bits[24:26] */
+		unsigned reserved27_31 : 5;	/* bits[27:31] */
+	} V6;
+};
+
+union FM_WAIT_T {
+	u32 d32;
+	struct {
+		unsigned csrw : 5;
+		unsigned rwpw : 6;
+		unsigned rdy : 1;
+		unsigned rwcs : 6;
+		unsigned reserved18_23 : 6;
+		unsigned fmw_dly : 6;
+		unsigned fmw_dly_en : 1;
+		unsigned reserved31_31 : 1;
+	} V6;
+};
+
+union FL_CTL_T {
+	u32 d32;
+	struct {
+		unsigned rst : 1;
+		unsigned rdn : 1;
+		unsigned start : 1;
+		unsigned dma : 1;
+		unsigned st_addr : 1;
+		unsigned tr_count : 2;
+		unsigned rdy_ignore : 1;
+		/* unsigned int_clr : 1; */
+		/* unsigned int_en : 1; */
+		unsigned reserved8_9 : 2;
+		unsigned cor_en : 1;
+		unsigned lba_en : 1;
+		unsigned spare_size : 7;
+		unsigned reserved19 : 1;
+		unsigned tr_rdy : 1;
+		unsigned page_size : 1;
+		unsigned page_num : 6;
+		unsigned low_power : 1;
+		unsigned async_tog_mix : 1;
+		unsigned reserved30_31 : 2;
+	} V6;
+};
+
+union BCH_CTL_T {
+	u32 d32;
+	struct {
+		unsigned rst : 1;
+		unsigned reserved : 1;
+		unsigned addr_not_care : 1;
+		unsigned power_down : 1;
+		unsigned bch_mode : 1;	   /* 0-16bit/1KB, 1-24bit/1KB */
+		unsigned region : 3;
+		unsigned addr : 8;
+		unsigned bchpage : 1;
+		unsigned reserved17 : 1;
+		unsigned bch_mode1 : 1;
+		unsigned thres : 8;
+		unsigned reserved27_31 : 5;
+	} V6;
+};
+
+union BCH_ST_T {
+	u32 d32;
+	struct {
+		unsigned errf0 : 1;
+		unsigned done0 : 1;
+		unsigned fail0 : 1;
+		unsigned err_bits0 : 5;
+		unsigned err_bits_low0 : 5;
+		unsigned errf1 : 1;
+		unsigned done1 : 1;
+		unsigned fail1 : 1;
+		unsigned err_bits1 : 5;
+		unsigned err_bits_low1 : 5;
+		unsigned rdy : 1;
+		/* unsigned cnt : 1; */
+		unsigned err_bits0_5 : 1;
+		unsigned err_bits_low0_5 : 1;
+		unsigned err_bits1_5 : 1;
+		unsigned err_bits_low1_5 : 1;
+		unsigned reserved31_31 : 1;
+	} V6;
+};
+
+union MTRANS_CFG_T {
+	u32 d32;
+	struct {
+		unsigned ahb_wr_st : 1;
+		unsigned ahb_wr : 1;
+		unsigned bus_mode : 1;
+		unsigned hsize : 3;
+		unsigned burst : 3;
+		unsigned incr_num : 5;
+		unsigned fl_pwd : 1;
+		unsigned ahb_rst : 1;
+		unsigned reserved16_31 : 16;
+	} V6;
+};
+
+union MTRANS_STAT_T {
+	u32 d32;
+	struct {
+		unsigned bus_err : 16;
+		unsigned mtrans_cnt : 5;
+		unsigned reserved21_31 : 11;
+	} V6;
+};
+
+/* NANDC Registers */
+#define NANDC_FMCTL		0x0
+#define NANDC_FMWAIT		0x4
+#define NANDC_FLCTL		0x8
+#define NANDC_BCHCTL		0xc
+#define NANDC_MTRANS_CFG	0x10
+#define NANDC_MTRANS_SADDR0	0x14
+#define NANDC_MTRANS_SADDR1	0x18
+#define NANDC_MTRANS_STAT	0x1c
+#define NANDC_DLL_CTL_REG0	0x130
+#define NANDC_DLL_CTL_REG1	0x134
+#define NANDC_DLL_OBS_REG0	0x138
+#define NANDC_RANDMZ_CFG	0x150
+#define NANDC_EBI_EN		0x154
+#define NANDC_FMWAIT_SYN	0x158
+#define NANDC_MTRANS_STAT2	0x15c
+#define NANDC_NANDC_VER		0x160
+#define NANDC_LLP_CTL		0x164
+#define NANDC_LLP_STAT		0x168
+#define NANDC_INTEN		0x16c
+#define NANDC_INTCLR		0x170
+#define NANDC_INTST		0x174
+#define NANDC_SPARE0		0x200
+#define NANDC_SPARE1		0x230
+
+#define NANDC_BCHST(i)		({		\
+	u32 x = (i);				\
+	4 * x + x < 8 ? 0x20 : 0x520; })
+
+#define NANDC_CHIP_DATA(id)	(0x800 + (id) * 0x100)
+#define NANDC_CHIP_ADDR(id)	(0x800 + (id) * 0x100 + 0x4)
+#define NANDC_CHIP_CMD(id)	(0x800 + (id) * 0x100 + 0x8)
+
+struct MASTER_INFO_T {
+	u32  *page_buf;		/* [DATA_LEN]; */
+	u32  *spare_buf;	/* [DATA_LEN / (1024/128)]; */
+	u32  *page_vir;	/* page_buf_vir_addr */
+	u32  *spare_vir;	/* spare_buf_vir_addr */
+	u32  page_phy;		/* page_buf_phy_addr */
+	u32  spare_phy;	/* spare_buf_phy_addr*/
+	u32  mapped;
+	u32  cnt;
+};
+
+struct CHIP_MAP_INFO_T {
+	u32  *nandc_addr;
+	u32  chip_num;
+};
+
+unsigned long rknandc_dma_map_single(unsigned long ptr,
+				     int size,
+				     int dir);
+void rknandc_dma_unmap_single(unsigned long ptr,
+			      int size,
+			      int dir);
+
+void nandc_init(void __iomem *nandc_addr);
+void nandc_flash_cs(u8 chip_sel);
+void nandc_flash_de_cs(u8 chip_sel);
+u32 nandc_wait_flash_ready(u8 chip_sel);
+u32 nandc_delayns(u32 count);
+u32 nandc_xfer_data(u8 chip_sel,
+		    u8 dir,
+		    u8 sector_count,
+		    u32 *p_data,
+		    u32 *p_spare);
+void nandc_randmz_sel(u8 chip_sel, u32 randmz_seed);
+void nandc_bch_sel(u8 bits);
+void nandc_read_not_case_busy_en(u8 en);
+void nandc_time_cfg(u32 ns);
+void nandc_clean_irq(void);
+
+#endif
diff --git a/drivers/rkflash/rk_sftl.h b/drivers/rkflash/rk_sftl.h
new file mode 100644
index 0000000000..e2d596b358
--- /dev/null
+++ b/drivers/rkflash/rk_sftl.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __RK_SFTL_H
+#define __RK_SFTL_H
+
+u32 ftl_low_format(void);
+int sftl_init(void);
+int sftl_deinit(void);
+int sftl_read(u32 index, u32 count, u8 *buf);
+int sftl_write(u32 index, u32 count, u8 *buf);
+u32 sftl_get_density(void);
+s32 sftl_gc(void);
+
+#endif
diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S
new file mode 100644
index 0000000000..e383c55612
--- /dev/null
+++ b/drivers/rkflash/rk_sftl_arm_v7.S
@@ -0,0 +1,55433 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+	.arch armv7-a
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 2
+	.file	"rk_sftl.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.global	__aeabi_uidiv
+	.section	.text.l2p_addr_tran.isra.0,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_addr_tran.isra.0, %function
+l2p_addr_tran.isra.0:
+.LFB351:
+	.file 1 "drivers/rkflash/sftl_flash.c"
+	.loc 1 54 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL0:
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 70 0
+	lsrs	r7, r0, #10
+	.loc 1 62 0
+	ldr	r3, .L3
+	.loc 1 54 0
+	mov	r8, r1
+	mov	r6, r0
+	.loc 1 71 0
+	uxth	r0, r7
+	.loc 1 54 0
+	mov	r10, r2
+	.loc 1 72 0
+	uxth	r7, r7
+	.loc 1 62 0
+	ldrh	r4, [r3, #8]
+.LVL1:
+	.loc 1 74 0
+	ubfx	r6, r6, #0, #10
+	.loc 1 63 0
+	ldrh	r5, [r3, #10]
+.LVL2:
+	.loc 1 64 0
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	.loc 1 65 0
+	itt	eq
+	lsreq	r4, r4, #1
+.LVL3:
+	.loc 1 66 0
+	lsleq	r5, r5, #1
+.LVL4:
+	.loc 1 71 0
+	mov	r1, r4
+.LVL5:
+	.loc 1 66 0
+	it	eq
+	uxtheq	r5, r5
+.LVL6:
+	.loc 1 71 0
+	bl	__aeabi_uidiv
+.LVL7:
+	uxth	r0, r0
+.LVL8:
+	.loc 1 72 0
+	mls	r4, r0, r4, r7
+.LVL9:
+	.loc 1 74 0
+	mla	r4, r5, r4, r6
+	str	r4, [r8]
+	.loc 1 75 0
+	str	r0, [r10]
+	.loc 1 78 0
+	movs	r0, #0
+.LVL10:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL11:
+.L4:
+	.align	2
+.L3:
+	.word	.LANCHOR0
+	.cfi_endproc
+.LFE351:
+	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
+	.section	.text.ftl_set_blk_mode.part.7,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_set_blk_mode.part.7, %function
+ftl_set_blk_mode.part.7:
+.LFB358:
+	.file 2 "drivers/rkflash/sftl_sys.c"
+	.loc 2 1346 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL12:
+	.loc 2 1349 0
+	ldr	r3, .L6
+	lsrs	r1, r0, #5
+	and	r0, r0, #31
+.LVL13:
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsl	r0, r3, r0
+	ldr	r3, [r2, r1, lsl #2]
+	orrs	r3, r3, r0
+	str	r3, [r2, r1, lsl #2]
+	bx	lr
+.L7:
+	.align	2
+.L6:
+	.word	.LANCHOR1
+	.cfi_endproc
+.LFE358:
+	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+	.section	.text.Ftl_log2,"ax",%progbits
+	.align	1
+	.global	Ftl_log2
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_log2, %function
+Ftl_log2:
+.LFB205:
+	.file 3 "drivers/rkflash/sftl_plat.c"
+	.loc 3 128 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL14:
+	.loc 3 132 0
+	movs	r1, #0
+	.loc 3 130 0
+	movs	r2, #1
+.LVL15:
+.L9:
+	.loc 3 132 0 discriminator 1
+	cmp	r2, r0
+	uxth	r3, r1
+.LVL16:
+	add	r1, r1, #1
+	bls	.L10
+.LVL17:
+	.loc 3 134 0
+	subs	r0, r3, #1
+.LVL18:
+	.loc 3 136 0
+	uxth	r0, r0
+	bx	lr
+.LVL19:
+.L10:
+	.loc 3 133 0 discriminator 3
+	lsls	r2, r2, #1
+.LVL20:
+	b	.L9
+	.cfi_endproc
+.LFE205:
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",%progbits
+	.align	1
+	.global	FtlPrintInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+.LFB206:
+	.loc 3 159 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL21:
+	bx	lr
+	.cfi_endproc
+.LFE206:
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkNumInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+.LFB207:
+	.loc 3 165 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL22:
+	.loc 3 168 0
+	ldr	r3, .L13
+	cmp	r0, #24
+	it	cc
+	movcc	r0, #24
+.LVL23:
+	.loc 3 169 0
+	ldr	r2, .L13+4
+	.loc 3 168 0
+	str	r0, [r3]
+	.loc 3 169 0
+	ldr	r3, .L13+8
+	ldrh	r3, [r3]
+	muls	r3, r0, r3
+	str	r3, [r2]
+	.loc 3 170 0
+	ldr	r2, .L13+12
+	ldrh	r2, [r2]
+	subs	r0, r2, r0
+.LVL24:
+	ldr	r2, .L13+16
+	strh	r0, [r2]	@ movhi
+	.loc 3 174 0
+	movs	r0, #0
+	.loc 3 171 0
+	ldr	r2, .L13+20
+	ldr	r2, [r2]
+	subs	r3, r2, r3
+	ldr	r2, .L13+24
+	str	r3, [r2]
+	.loc 3 174 0
+	bx	lr
+.L14:
+	.align	2
+.L13:
+	.word	.LANCHOR2
+	.word	.LANCHOR4
+	.word	.LANCHOR3
+	.word	.LANCHOR6
+	.word	.LANCHOR5
+	.word	.LANCHOR8
+	.word	.LANCHOR7
+	.cfi_endproc
+.LFE207:
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.global	__aeabi_idiv
+	.section	.text.FtlConstantsInit,"ax",%progbits
+	.align	1
+	.global	FtlConstantsInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+.LFB208:
+	.loc 3 183 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL25:
+	.loc 3 188 0
+	ldrh	r1, [r0]
+	ldr	r2, .L25
+	.loc 3 183 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 183 0
+	mov	r7, r0
+	.loc 3 189 0
+	ldrh	r5, [r0, #2]
+	.loc 3 188 0
+	strh	r1, [r2]	@ movhi
+	.loc 3 189 0
+	ldr	r2, .L25+4
+	.loc 3 190 0
+	ldrh	r0, [r0, #4]
+.LVL26:
+	.loc 3 189 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 190 0
+	ldr	r2, .L25+8
+	strh	r0, [r2]	@ movhi
+	.loc 3 191 0
+	ldrh	r2, [r7, #14]
+	cmp	r2, #4
+	bne	.L16
+	.loc 3 192 0
+	ldrh	r2, [r7, #6]
+	ldr	r4, .L25+12
+	lsrs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+	.loc 3 193 0
+	movs	r4, #8
+	ldr	r2, .L25+16
+	strh	r4, [r2]	@ movhi
+.L16:
+	.loc 3 197 0 discriminator 3
+	ldr	r4, .L25+20
+	.loc 3 183 0 discriminator 3
+	movs	r2, #0
+.L17:
+.LVL27:
+	.loc 3 197 0 discriminator 3
+	strb	r2, [r2, r4]
+	.loc 3 196 0 discriminator 3
+	adds	r2, r2, #1
+.LVL28:
+	cmp	r2, #32
+	bne	.L17
+	.loc 3 198 0
+	ldr	r2, .L25+24
+.LVL29:
+	.loc 3 200 0
+	cmp	r1, #1
+	.loc 3 198 0
+	mov	r4, #5
+	.loc 3 204 0
+	smulbb	r5, r5, r0
+	.loc 3 199 0
+	mov	r6, #0
+	.loc 3 198 0
+	strh	r4, [r2]	@ movhi
+	.loc 3 201 0
+	it	eq
+	strheq	r1, [r2]	@ movhi
+	.loc 3 202 0
+	mov	r1, #640
+	ldr	r2, .L25+28
+	.loc 3 204 0
+	uxth	r5, r5
+	.loc 3 199 0
+	ldr	r4, .L25+32
+	.loc 3 202 0
+	strh	r1, [r2]	@ movhi
+	.loc 3 204 0
+	ldr	r2, .L25+36
+	.loc 3 199 0
+	strh	r6, [r4]	@ movhi
+	.loc 3 210 0
+	ldr	r6, .L25+40
+	.loc 3 204 0
+	strh	r5, [r2]	@ movhi
+	.loc 3 205 0
+	ldr	r2, .L25+12
+	ldrh	r4, [r2]
+	ldr	r2, .L25+44
+	smulbb	r0, r0, r4
+	uxth	r0, r0
+	strh	r0, [r2]	@ movhi
+	.loc 3 206 0
+	bl	Ftl_log2
+.LVL30:
+	ldr	r2, .L25+48
+	.loc 3 207 0
+	ldrh	r8, [r7, #12]
+	ldr	r3, .L25+52
+	.loc 3 206 0
+	strh	r0, [r2]	@ movhi
+	.loc 3 208 0
+	ldr	r2, .L25+56
+	.loc 3 209 0
+	smulbb	r1, r5, r8
+	.loc 3 207 0
+	strh	r8, [r3]	@ movhi
+	.loc 3 208 0
+	strh	r8, [r2]	@ movhi
+	.loc 3 209 0
+	ldr	r2, .L25+60
+	strh	r1, [r2]	@ movhi
+	.loc 3 210 0
+	ldr	r2, .L25+16
+	ldrh	fp, [r2]
+	mov	r0, fp
+	bl	Ftl_log2
+.LVL31:
+	.loc 3 212 0
+	lsl	r2, fp, #9
+	ldr	r1, .L25+64
+	.loc 3 214 0
+	ldr	r3, .L25+68
+	.loc 3 210 0
+	mov	r10, r0
+	.loc 3 212 0
+	uxth	r2, r2
+	.loc 3 210 0
+	strh	r0, [r6]	@ movhi
+	.loc 3 218 0
+	mov	r0, #5120
+	.loc 3 212 0
+	strh	r2, [r1]	@ movhi
+	.loc 3 213 0
+	lsrs	r2, r2, #8
+	ldr	r1, .L25+72
+	strh	r2, [r1]	@ movhi
+	.loc 3 218 0
+	mul	r1, r8, fp
+	.loc 3 214 0
+	ldrh	r2, [r7, #20]
+	ldr	r7, .L25+52
+.LVL32:
+	strh	r2, [r3]	@ movhi
+	.loc 3 216 0
+	mul	r3, r4, r5
+	ldr	r2, .L25+76
+	.loc 3 223 0
+	lsls	r4, r4, #6
+	.loc 3 216 0
+	str	r3, [r2]
+	.loc 3 217 0
+	mul	r3, fp, r3
+	ldr	r2, .L25+80
+	mul	r3, r8, r3
+	ldr	r8, .L25+116
+	asrs	r3, r3, #11
+	str	r3, [r2]
+	.loc 3 218 0
+	bl	__aeabi_idiv
+.LVL33:
+	uxth	r0, r0
+	.loc 3 221 0
+	ldr	r2, .L25+84
+	.loc 3 226 0
+	mov	r1, r5
+	.loc 3 219 0
+	cmp	r0, #4
+	.loc 3 220 0
+	itet	ls
+	movls	r3, #4
+	.loc 3 218 0
+	strhhi	r0, [r8]	@ movhi
+	.loc 3 220 0
+	strhls	r3, [r8]	@ movhi
+	.loc 3 221 0
+	mov	r3, #640
+	asr	r3, r3, r10
+	.loc 3 223 0
+	add	r10, r10, #9
+	asr	r4, r4, r10
+	.loc 3 224 0
+	ldr	r10, .L25+120
+	.loc 3 221 0
+	adds	r3, r3, #2
+	.loc 3 226 0
+	ldrh	r0, [r8]
+	.loc 3 221 0
+	strh	r3, [r2]	@ movhi
+	.loc 3 223 0
+	ldr	r3, .L25+88
+	strh	r4, [r3]	@ movhi
+	uxth	r4, r4
+	.loc 3 224 0
+	mul	r3, r5, r4
+	.loc 3 226 0
+	adds	r4, r4, #8
+	.loc 3 224 0
+	str	r3, [r10]
+	.loc 3 226 0
+	bl	__aeabi_uidiv
+.LVL34:
+	uxtah	r0, r4, r0
+	ldr	r4, .L25+92
+	.loc 3 227 0
+	cmp	r5, #1
+	.loc 3 228 0
+	it	eq
+	addeq	r0, r0, #4
+	str	r0, [r4]
+	.loc 3 231 0
+	ldrh	r0, [r4]
+	bl	FtlSysBlkNumInit
+.LVL35:
+	.loc 3 232 0
+	ldr	r2, [r4]
+	.loc 3 236 0
+	movs	r0, #0
+	.loc 3 232 0
+	ldr	r3, .L25+96
+	str	r2, [r3]
+	.loc 3 234 0
+	ldr	r3, .L25+100
+	ldr	r2, [r3]
+	ldrh	r3, [r7]
+	lsls	r2, r2, #2
+	muls	r3, r2, r3
+	ldrh	r2, [r6]
+	adds	r2, r2, #9
+	lsrs	r3, r3, r2
+	ldr	r2, .L25+104
+	adds	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	.loc 3 235 0
+	movs	r2, #32
+	ldr	r3, .L25+108
+	strh	r2, [r3]	@ movhi
+	.loc 3 236 0
+	ldr	r3, .L25+112
+	str	r0, [r3]
+	.loc 3 237 0
+	ldrh	r3, [r8]
+	adds	r3, r3, #3
+	strh	r3, [r8]	@ movhi
+	.loc 3 238 0
+	ldr	r3, [r10]
+	adds	r3, r3, #3
+	str	r3, [r10]
+	.loc 3 263 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L26:
+	.align	2
+.L25:
+	.word	.LANCHOR9
+	.word	.LANCHOR10
+	.word	.LANCHOR11
+	.word	.LANCHOR6
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR16
+	.word	.LANCHOR15
+	.word	.LANCHOR3
+	.word	.LANCHOR22
+	.word	.LANCHOR17
+	.word	.LANCHOR18
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR21
+	.word	.LANCHOR23
+	.word	.LANCHOR25
+	.word	.LANCHOR24
+	.word	.LANCHOR8
+	.word	.LANCHOR26
+	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR2
+	.word	.LANCHOR31
+	.word	.LANCHOR7
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.word	.LANCHOR34
+	.word	.LANCHOR27
+	.word	.LANCHOR30
+	.cfi_endproc
+.LFE208:
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.align	1
+	.global	IsBlkInVendorPart
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+.LFB211:
+	.loc 3 514 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL36:
+	.loc 3 517 0
+	ldr	r3, .L34
+	ldrh	r3, [r3]
+	cbz	r3, .L33
+.LBB164:
+.LBB165:
+	.loc 3 519 0
+	ldr	r3, .L34+4
+	.loc 3 518 0
+	ldr	r2, .L34+8
+	.loc 3 519 0
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L29:
+	.loc 3 518 0
+	cmp	r3, r2
+	bne	.L30
+.L33:
+.LBE165:
+.LBE164:
+	.loc 3 524 0
+	movs	r0, #0
+.LVL37:
+	bx	lr
+.LVL38:
+.L30:
+.LBB167:
+.LBB166:
+	.loc 3 519 0
+	ldrh	r1, [r3], #2
+	cmp	r0, r1
+	bne	.L29
+	.loc 3 520 0
+	movs	r0, #1
+.LVL39:
+.LBE166:
+.LBE167:
+	.loc 3 525 0
+	bx	lr
+.L35:
+	.align	2
+.L34:
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.cfi_endproc
+.LFE211:
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.sftl_get_density,"ax",%progbits
+	.align	1
+	.global	sftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_get_density, %function
+sftl_get_density:
+.LFB224:
+	.loc 3 1214 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 3 1216 0
+	ldr	r3, .L37
+	ldr	r0, [r3]
+	bx	lr
+.L38:
+	.align	2
+.L37:
+	.word	.LANCHOR34
+	.cfi_endproc
+.LFE224:
+	.size	sftl_get_density, .-sftl_get_density
+	.global	__aeabi_uidivmod
+	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmMapBadBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+.LFB225:
+	.file 4 "drivers/rkflash/sftl_bbm.c"
+	.loc 4 5 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL40:
+	.loc 4 10 0
+	ldr	r3, .L40
+	.loc 4 5 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 4 5 0
+	mov	r5, r0
+	.loc 4 10 0
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+.LVL41:
+	mov	r1, r4
+	.loc 4 13 0
+	ldr	r4, .L40+4
+	.loc 4 10 0
+	uxth	r6, r0
+.LVL42:
+	mov	r0, r5
+	bl	__aeabi_uidivmod
+.LVL43:
+	.loc 4 13 0
+	add	r2, r4, r6, lsl #2
+	uxth	r3, r1
+.LVL44:
+	.loc 4 15 0
+	ldr	r2, [r2, #28]
+	lsrs	r1, r3, #5
+	and	r7, r3, #31
+	movs	r0, #1
+	lsls	r0, r0, r7
+	ldr	r7, [r2, r1, lsl #2]
+	orrs	r0, r0, r7
+	str	r0, [r2, r1, lsl #2]
+	.loc 4 16 0
+	mov	r2, r6
+	str	r0, [sp]
+	mov	r1, r5
+	ldr	r0, .L40+8
+	bl	printf
+.LVL45:
+	.loc 4 17 0
+	ldrh	r3, [r4, #6]
+	.loc 4 19 0
+	movs	r0, #0
+	.loc 4 17 0
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	.loc 4 19 0
+	add	sp, sp, #12
+	.cfi_def_cfa_offset 20
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.LVL46:
+.L41:
+	.align	2
+.L40:
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LC0
+	.cfi_endproc
+.LFE225:
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmIsBadBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+.LFB226:
+	.loc 4 24 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL47:
+	.loc 4 30 0
+	ldr	r3, .L43
+	.loc 4 24 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 4 24 0
+	mov	r6, r0
+	.loc 4 30 0
+	ldrh	r5, [r3]
+.LVL48:
+	.loc 4 31 0
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+.LVL49:
+	.loc 4 30 0
+	mov	r0, r6
+	.loc 4 31 0
+	uxth	r4, r1
+.LVL50:
+	.loc 4 30 0
+	mov	r1, r5
+	bl	__aeabi_uidiv
+.LVL51:
+	.loc 4 33 0
+	ldr	r3, .L43+4
+	.loc 4 30 0
+	uxth	r0, r0
+	.loc 4 34 0
+	lsrs	r2, r4, #5
+	and	r4, r4, #31
+.LVL52:
+	.loc 4 33 0
+	add	r0, r3, r0, lsl #2
+	.loc 4 34 0
+	ldr	r3, [r0, #28]
+	ldr	r0, [r3, r2, lsl #2]
+	lsrs	r0, r0, r4
+	.loc 4 36 0
+	and	r0, r0, #1
+	pop	{r4, r5, r6, pc}
+.LVL53:
+.L44:
+	.align	2
+.L43:
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.cfi_endproc
+.LFE226:
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+	.align	1
+	.global	FtlBbtInfoPrint
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+.LFB227:
+	.loc 4 39 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.cfi_endproc
+.LFE227:
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbtCalcTotleCnt,"ax",%progbits
+	.align	1
+	.global	FtlBbtCalcTotleCnt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtCalcTotleCnt, %function
+FtlBbtCalcTotleCnt:
+.LFB231:
+	.loc 4 157 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL54:
+	.loc 4 160 0
+	ldr	r3, .L53
+	ldr	r2, .L53+4
+	.loc 4 157 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 4 160 0
+	movs	r5, #0
+	ldrh	r3, [r3]
+	.loc 4 159 0
+	mov	r4, r5
+	.loc 4 160 0
+	ldrh	r6, [r2]
+	muls	r6, r3, r6
+.LVL55:
+.L47:
+	uxth	r0, r5
+.LVL56:
+	.loc 4 160 0 is_stmt 0 discriminator 1
+	cmp	r0, r6
+	blt	.L49
+	.loc 4 169 0 is_stmt 1
+	mov	r0, r4
+.LVL57:
+	pop	{r4, r5, r6, pc}
+.LVL58:
+.L49:
+	.loc 4 162 0
+	bl	FtlBbmIsBadBlock
+.LVL59:
+	cbz	r0, .L48
+	.loc 4 164 0
+	adds	r4, r4, #1
+.LVL60:
+	uxth	r4, r4
+.LVL61:
+.L48:
+	adds	r5, r5, #1
+.LVL62:
+	b	.L47
+.L54:
+	.align	2
+.L53:
+	.word	.LANCHOR17
+	.word	.LANCHOR10
+	.cfi_endproc
+.LFE231:
+	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
+	.section	.text.V2P_block,"ax",%progbits
+	.align	1
+	.global	V2P_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	V2P_block, %function
+V2P_block:
+.LFB235:
+	.loc 2 5 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL63:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 5 0
+	mov	r5, r1
+	.loc 2 8 0
+	ldr	r3, .L56
+	.loc 2 5 0
+	mov	r7, r0
+	.loc 2 8 0
+	ldrh	r6, [r3]
+.LVL64:
+	mov	r1, r6
+.LVL65:
+	bl	__aeabi_uidiv
+.LVL66:
+	ldr	r3, .L56+4
+	smulbb	r5, r6, r5
+	mov	r1, r6
+	ldrh	r4, [r3]
+	smulbb	r4, r4, r0
+	mov	r0, r7
+	bl	__aeabi_uidivmod
+.LVL67:
+	adds	r0, r5, r1
+	add	r0, r0, r4
+	.loc 2 10 0
+	uxth	r0, r0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L57:
+	.align	2
+.L56:
+	.word	.LANCHOR11
+	.word	.LANCHOR17
+	.cfi_endproc
+.LFE235:
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",%progbits
+	.align	1
+	.global	P2V_plane
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	P2V_plane, %function
+P2V_plane:
+.LFB236:
+	.loc 2 13 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL68:
+	.loc 2 16 0
+	ldr	r3, .L59
+	.loc 2 13 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 13 0
+	mov	r6, r0
+	.loc 2 16 0
+	ldrh	r5, [r3]
+.LVL69:
+	ldr	r3, .L59+4
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+.LVL70:
+	smulbb	r4, r0, r5
+	mov	r1, r5
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+.LVL71:
+	add	r1, r1, r4
+	.loc 2 18 0
+	uxth	r0, r1
+	pop	{r4, r5, r6, pc}
+.L60:
+	.align	2
+.L59:
+	.word	.LANCHOR11
+	.word	.LANCHOR17
+	.cfi_endproc
+.LFE236:
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",%progbits
+	.align	1
+	.global	P2V_block_in_plane
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+.LFB237:
+	.loc 2 21 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL72:
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 24 0
+	ldr	r3, .L62
+	ldrh	r1, [r3]
+	bl	__aeabi_uidivmod
+.LVL73:
+	.loc 2 25 0
+	ldr	r3, .L62+4
+	.loc 2 24 0
+	uxth	r0, r1
+.LVL74:
+	.loc 2 25 0
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+.LVL75:
+	.loc 2 27 0
+	uxth	r0, r0
+	pop	{r3, pc}
+.L63:
+	.align	2
+.L62:
+	.word	.LANCHOR17
+	.word	.LANCHOR11
+	.cfi_endproc
+.LFE237:
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+	.align	1
+	.global	ftl_cmp_data_ver
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+.LFB238:
+	.loc 2 31 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL76:
+	.loc 2 34 0
+	cmp	r0, r1
+	bls	.L65
+	.loc 2 36 0
+	subs	r0, r0, r1
+.LVL77:
+	cmp	r0, #-2147483648
+	ite	hi
+	movhi	r0, #0
+	movls	r0, #1
+	bx	lr
+.LVL78:
+.L65:
+	.loc 2 40 0
+	subs	r0, r1, r0
+.LVL79:
+	cmp	r0, #-2147483648
+	ite	ls
+	movls	r0, #0
+	movhi	r0, #1
+.LVL80:
+	.loc 2 44 0
+	bx	lr
+	.cfi_endproc
+.LFE238:
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueEmpty
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+.LFB241:
+	.loc 2 88 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 89 0
+	ldr	r3, .L68
+	ldrh	r0, [r3, #6]
+	.loc 2 90 0
+	clz	r0, r0
+	lsrs	r0, r0, #5
+	bx	lr
+.L69:
+	.align	2
+.L68:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE241:
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueFull
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+.LFB242:
+	.loc 2 93 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 94 0
+	ldr	r3, .L71
+	ldrh	r0, [r3, #6]
+	.loc 2 95 0
+	sub	r3, r0, #1024
+	rsbs	r0, r3, #0
+	adcs	r0, r0, r3
+	bx	lr
+.L72:
+	.align	2
+.L71:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE242:
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBLkSort
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+.LFB244:
+	.loc 2 116 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL81:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 123 0
+	ldr	r4, .L82
+	.loc 2 125 0
+	ldr	r3, .L82+4
+	.loc 2 124 0
+	ldrh	r7, [r4, #2]
+	.loc 2 123 0
+	ldrh	r6, [r4, #6]
+	.loc 2 125 0
+	ldr	r5, [r3]
+	ldr	r3, .L82+8
+	add	r8, r4, r7, lsl #1
+	mov	r10, r5
+	ldr	r3, [r3]
+	add	fp, r5, r6, lsl #2
+	add	r8, r8, #6
+.LVL82:
+.L74:
+	.loc 2 123 0 discriminator 1
+	cmp	r10, fp
+	bne	.L75
+	movs	r3, #0
+	.loc 2 128 0
+	add	lr, r6, #-1
+.L76:
+.LVL83:
+	.loc 2 128 0 is_stmt 0 discriminator 1
+	cmp	r3, lr
+	blt	.L81
+	.loc 2 144 0 is_stmt 1
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL84:
+.L75:
+	.cfi_restore_state
+	.loc 2 124 0 discriminator 3
+	ldrh	r0, [r8, #2]!
+	str	r3, [sp, #4]
+	bl	P2V_block_in_plane
+.LVL85:
+	.loc 2 125 0 discriminator 3
+	ldr	r3, [sp, #4]
+	ldrh	r2, [r3, r0, lsl #1]
+	str	r2, [r10], #4
+	b	.L74
+.LVL86:
+.L81:
+	.loc 2 130 0
+	add	ip, r3, #1
+	mov	r2, r3
+	uxth	ip, ip
+.LVL87:
+	mov	r8, ip
+.LVL88:
+.L77:
+	.loc 2 130 0 is_stmt 0 discriminator 1
+	cmp	r8, r6
+	bcc	.L79
+	.loc 2 134 0 is_stmt 1
+	cmp	r3, r2
+	beq	.L80
+	.loc 2 135 0
+	ldr	r0, [r5, r2, lsl #2]
+.LVL89:
+	.loc 2 136 0
+	ldr	r1, [r5, r3, lsl #2]
+	str	r1, [r5, r2, lsl #2]
+	.loc 2 139 0
+	add	r2, r2, r7
+.LVL90:
+	.loc 2 137 0
+	str	r0, [r5, r3, lsl #2]
+	.loc 2 140 0
+	add	r3, r3, r7
+.LVL91:
+	.loc 2 139 0
+	adds	r2, r2, #4
+	.loc 2 140 0
+	adds	r3, r3, #4
+	.loc 2 139 0
+	ldrh	r1, [r4, r2, lsl #1]
+.LVL92:
+	.loc 2 140 0
+	ldrh	r0, [r4, r3, lsl #1]
+.LVL93:
+	strh	r0, [r4, r2, lsl #1]	@ movhi
+	.loc 2 141 0
+	strh	r1, [r4, r3, lsl #1]	@ movhi
+.LVL94:
+.L80:
+	mov	r3, ip
+	b	.L76
+.LVL95:
+.L79:
+	.loc 2 131 0
+	ldr	r1, [r5, r8, lsl #2]
+	ldr	r0, [r5, r2, lsl #2]
+	cmp	r0, r1
+	it	hi
+	movhi	r2, r8
+.LVL96:
+	.loc 2 130 0
+	add	r8, r8, #1
+.LVL97:
+	uxth	r8, r8
+.LVL98:
+	b	.L77
+.L83:
+	.align	2
+.L82:
+	.word	.LANCHOR38
+	.word	.LANCHOR39
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE244:
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.IsInFreeQueue,"ax",%progbits
+	.align	1
+	.global	IsInFreeQueue
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsInFreeQueue, %function
+IsInFreeQueue:
+.LFB245:
+	.loc 2 147 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL99:
+.LBB168:
+.LBB169:
+	.loc 2 94 0
+	ldr	r3, .L90
+.LBE169:
+.LBE168:
+	.loc 2 147 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+.LBB171:
+.LBB170:
+	.loc 2 94 0
+	ldrh	r4, [r3, #6]
+.LBE170:
+.LBE171:
+	.loc 2 152 0
+	cmp	r4, #1024
+	beq	.L88
+	.loc 2 155 0
+	ldrh	r5, [r3, #2]
+	movs	r1, #0
+.L86:
+.LVL100:
+	.loc 2 154 0 discriminator 1
+	cmp	r1, r4
+	bcc	.L87
+.LVL101:
+.L88:
+	.loc 2 148 0
+	movs	r0, #0
+.LVL102:
+	pop	{r4, r5, pc}
+.LVL103:
+.L87:
+	.loc 2 155 0
+	adds	r2, r1, r5
+	ubfx	r2, r2, #0, #10
+	adds	r2, r2, #4
+	ldrh	r2, [r3, r2, lsl #1]
+	cmp	r2, r0
+	beq	.L89
+	.loc 2 154 0 discriminator 2
+	adds	r1, r1, #1
+.LVL104:
+	b	.L86
+.L89:
+	.loc 2 156 0
+	movs	r0, #1
+.LVL105:
+	.loc 2 162 0
+	pop	{r4, r5, pc}
+.L91:
+	.align	2
+.L90:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE245:
+	.size	IsInFreeQueue, .-IsInFreeQueue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueOut
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB246:
+	.loc 2 165 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL106:
+.LBB172:
+.LBB173:
+	.loc 2 89 0
+	ldr	r2, .L95
+	ldrh	r1, [r2, #6]
+.LBE173:
+.LBE172:
+	.loc 2 168 0
+	cbz	r1, .L94
+.LVL107:
+.LBB174:
+	.loc 2 170 0
+	ldrh	r3, [r2, #2]
+	.loc 2 171 0
+	subs	r1, r1, #1
+	strh	r1, [r2, #6]	@ movhi
+	.loc 2 170 0
+	adds	r0, r3, #4
+	.loc 2 172 0
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	.loc 2 170 0
+	ldrh	r0, [r2, r0, lsl #1]
+.LVL108:
+	.loc 2 172 0
+	strh	r3, [r2, #2]	@ movhi
+	bx	lr
+.LVL109:
+.L94:
+.LBE174:
+	.loc 2 166 0
+	movw	r0, #65535
+.LVL110:
+	.loc 2 176 0
+	bx	lr
+.L96:
+	.align	2
+.L95:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE246:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",%progbits
+	.align	1
+	.global	insert_data_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	insert_data_list, %function
+insert_data_list:
+.LFB249:
+	.loc 2 217 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL111:
+	.loc 2 225 0
+	movw	r3, #65535
+	.loc 2 217 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 225 0
+	cmp	r0, r3
+	beq	.L98
+	.loc 2 230 0
+	ldr	r2, .L111
+	movs	r5, #6
+	muls	r5, r0, r5
+	ldr	r4, [r2]
+	adds	r1, r4, r5
+.LVL112:
+	.loc 2 231 0
+	strh	r3, [r1, #2]	@ movhi
+	strh	r3, [r4, r5]	@ movhi
+	.loc 2 233 0
+	ldr	r3, .L111+4
+	ldr	ip, [r3]
+	cmp	ip, #0
+	bne	.L99
+.L110:
+	.loc 2 275 0
+	str	r1, [r3]
+.LVL113:
+.L98:
+	.loc 2 281 0
+	movs	r0, #0
+.LVL114:
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL115:
+.L99:
+	.cfi_restore_state
+	.loc 2 238 0
+	ldr	r3, .L111+8
+	lsls	r7, r0, #1
+	.loc 2 239 0
+	ldrh	r6, [r1, #4]
+	.loc 2 238 0
+	ldr	lr, [r3]
+	ldrh	r3, [lr, r0, lsl #1]
+.LVL116:
+	.loc 2 240 0
+	cbz	r6, .L108
+	.loc 2 239 0
+	muls	r6, r3, r6
+.LVL117:
+.L100:
+	.loc 2 244 0
+	sub	r2, ip, r4
+	asrs	r3, r2, #1
+.LVL118:
+	ldr	r2, .L111+12
+	muls	r2, r3, r2
+	.loc 2 252 0
+	ldr	r3, .L111+16
+	ldr	r8, [r3]
+	.loc 2 244 0
+	uxth	r2, r2
+.LVL119:
+	.loc 2 252 0
+	add	r3, r8, r7
+	str	r3, [sp, #4]
+	mov	r3, ip
+.LVL120:
+.L106:
+	.loc 2 247 0
+	ldrh	r7, [r3, #4]
+	.loc 2 246 0
+	lsl	r10, r2, #1
+	ldrh	fp, [lr, r2, lsl #1]
+.LVL121:
+	.loc 2 248 0
+	cbz	r7, .L109
+	.loc 2 247 0
+	mul	r7, r7, fp
+.LVL122:
+.L101:
+	.loc 2 251 0
+	cmp	r6, r7
+	bne	.L102
+	.loc 2 252 0
+	ldr	r7, [sp, #4]
+.LVL123:
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r7]
+	cmp	r10, r7
+	bcc	.L104
+.L103:
+	.loc 2 270 0
+	strh	r2, [r4, r5]	@ movhi
+.LVL124:
+	.loc 2 273 0
+	cmp	r3, ip
+	.loc 2 271 0
+	ldrh	r2, [r3, #2]
+.LVL125:
+	strh	r2, [r1, #2]	@ movhi
+	.loc 2 273 0
+	bne	.L107
+	.loc 2 274 0
+	strh	r0, [r3, #2]	@ movhi
+	.loc 2 275 0
+	ldr	r3, .L111+4
+.LVL126:
+	b	.L110
+.LVL127:
+.L108:
+	.loc 2 241 0
+	mov	r6, #-1
+.LVL128:
+	b	.L100
+.LVL129:
+.L109:
+	.loc 2 249 0
+	mov	r7, #-1
+.LVL130:
+	b	.L101
+.LVL131:
+.L102:
+	.loc 2 256 0
+	bcc	.L103
+.LVL132:
+.L104:
+	.loc 2 259 0
+	ldrh	r7, [r3]
+	movw	r10, #65535
+	cmp	r7, r10
+	bne	.L105
+	.loc 2 260 0
+	strh	r2, [r1, #2]	@ movhi
+.LVL133:
+	.loc 2 261 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 262 0
+	ldr	r3, .L111+20
+.LVL134:
+	b	.L110
+.LVL135:
+.L105:
+	.loc 2 267 0
+	movs	r3, #6
+.LVL136:
+	.loc 2 246 0
+	mov	r2, r7
+	.loc 2 267 0
+	mla	r3, r3, r7, r4
+.LVL137:
+	.loc 2 246 0
+	b	.L106
+.LVL138:
+.L107:
+	.loc 2 277 0
+	ldrh	r1, [r3, #2]
+.LVL139:
+	movs	r2, #6
+	muls	r2, r1, r2
+	strh	r0, [r4, r2]	@ movhi
+.LVL140:
+	.loc 2 278 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L98
+.L112:
+	.align	2
+.L111:
+	.word	.LANCHOR41
+	.word	.LANCHOR42
+	.word	.LANCHOR43
+	.word	-1431655765
+	.word	.LANCHOR40
+	.word	.LANCHOR44
+	.cfi_endproc
+.LFE249:
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_DATA_LIST
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+.LFB248:
+	.loc 2 186 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL141:
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 187 0
+	bl	insert_data_list
+.LVL142:
+	.loc 2 188 0
+	ldr	r2, .L115
+	ldrh	r3, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2]	@ movhi
+	.loc 2 189 0
+	ldr	r2, .L115+4
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bcs	.L113
+.LVL143:
+.LBB177:
+.LBB178:
+	movs	r2, #189
+	ldr	r1, .L115+8
+	ldr	r0, .L115+12
+.LBE178:
+.LBE177:
+	.loc 2 190 0
+	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB180:
+.LBB179:
+	.loc 2 189 0
+	b	printf
+.LVL144:
+.L113:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L116:
+	.align	2
+.L115:
+	.word	.LANCHOR45
+	.word	.LANCHOR5
+	.word	.LANCHOR46
+	.word	.LC1
+.LBE179:
+.LBE180:
+	.cfi_endproc
+.LFE248:
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",%progbits
+	.align	1
+	.global	insert_free_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	insert_free_list, %function
+insert_free_list:
+.LFB250:
+	.loc 2 284 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL145:
+	.loc 2 290 0
+	movw	r1, #65535
+	.loc 2 284 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 290 0
+	cmp	r0, r1
+	beq	.L118
+	.loc 2 293 0
+	ldr	r3, .L124
+	mov	r10, #6
+	mul	r7, r10, r0
+	ldr	r4, [r3]
+	.loc 2 296 0
+	ldr	r3, .L124+4
+	.loc 2 293 0
+	adds	r5, r4, r7
+.LVL146:
+	.loc 2 296 0
+	ldr	r6, [r3]
+	mov	lr, r3
+	.loc 2 294 0
+	strh	r1, [r5, #2]	@ movhi
+	strh	r1, [r4, r7]	@ movhi
+	.loc 2 296 0
+	cbnz	r6, .L119
+	.loc 2 297 0
+	str	r5, [r3]
+.LVL147:
+.L118:
+	.loc 2 330 0
+	movs	r0, #0
+.LVL148:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL149:
+.L119:
+	.loc 2 301 0
+	ldr	r3, .L124+8
+	.loc 2 303 0
+	subs	r2, r6, r4
+	.loc 2 310 0
+	mov	fp, r1
+	.loc 2 301 0
+	ldr	ip, [r3]
+	.loc 2 303 0
+	asrs	r3, r2, #1
+	ldr	r2, .L124+12
+	.loc 2 301 0
+	ldrh	r8, [ip, r0, lsl #1]
+.LVL150:
+	.loc 2 303 0
+	muls	r2, r3, r2
+	mov	r3, r6
+	uxth	r2, r2
+.LVL151:
+.L122:
+	.loc 2 307 0
+	ldrh	r1, [ip, r2, lsl #1]
+	cmp	r1, r8
+	bcs	.L120
+	.loc 2 310 0
+	ldrh	r1, [r3]
+	cmp	r1, fp
+	bne	.L121
+	.loc 2 311 0
+	strh	r2, [r5, #2]	@ movhi
+.LVL152:
+	.loc 2 312 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 313 0
+	b	.L118
+.LVL153:
+.L121:
+	.loc 2 316 0
+	mla	r3, r10, r1, r4
+.LVL154:
+	.loc 2 306 0
+	mov	r2, r1
+.LVL155:
+	b	.L122
+.LVL156:
+.L120:
+	.loc 2 319 0
+	ldrh	r1, [r3, #2]
+	.loc 2 322 0
+	cmp	r3, r6
+	.loc 2 319 0
+	strh	r1, [r5, #2]	@ movhi
+.LVL157:
+	.loc 2 326 0
+	it	ne
+	ldrhne	r1, [r3, #2]
+	.loc 2 320 0
+	strh	r2, [r4, r7]	@ movhi
+	.loc 2 326 0
+	iteet	ne
+	movne	r2, #6
+.LVL158:
+	.loc 2 323 0
+	strheq	r0, [r3, #2]	@ movhi
+	.loc 2 324 0
+	streq	r5, [lr]
+	.loc 2 326 0
+	mulne	r2, r2, r1
+	itt	ne
+	strhne	r0, [r4, r2]	@ movhi
+.LVL159:
+	.loc 2 327 0
+	strhne	r0, [r3, #2]	@ movhi
+	b	.L118
+.L125:
+	.align	2
+.L124:
+	.word	.LANCHOR41
+	.word	.LANCHOR47
+	.word	.LANCHOR40
+	.word	-1431655765
+	.cfi_endproc
+.LFE250:
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_FREE_LIST
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+.LFB247:
+	.loc 2 179 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL160:
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 180 0
+	bl	insert_free_list
+.LVL161:
+	.loc 2 181 0
+	ldr	r2, .L128
+	ldrh	r3, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2]	@ movhi
+	.loc 2 182 0
+	ldr	r2, .L128+4
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bcs	.L126
+.LVL162:
+.LBB183:
+.LBB184:
+	movs	r2, #182
+	ldr	r1, .L128+8
+	ldr	r0, .L128+12
+.LBE184:
+.LBE183:
+	.loc 2 183 0
+	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB186:
+.LBB185:
+	.loc 2 182 0
+	b	printf
+.LVL163:
+.L126:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L129:
+	.align	2
+.L128:
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR49
+	.word	.LC1
+.LBE185:
+.LBE186:
+	.cfi_endproc
+.LFE247:
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",%progbits
+	.align	1
+	.global	List_remove_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_remove_node, %function
+List_remove_node:
+.LFB251:
+	.loc 2 333 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL164:
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 336 0
+	movs	r6, #6
+	ldr	r5, .L137
+	muls	r6, r1, r6
+	.loc 2 337 0
+	movw	r3, #65535
+	.loc 2 333 0
+	mov	r8, r0
+	.loc 2 336 0
+	ldr	r7, [r5]
+	adds	r4, r7, r6
+.LVL165:
+	.loc 2 337 0
+	ldrh	r2, [r4, #2]
+	cmp	r2, r3
+	bne	.L131
+	.loc 2 337 0 is_stmt 0 discriminator 1
+	ldr	r3, [r0]
+	cmp	r4, r3
+	beq	.L131
+	.loc 2 337 0 discriminator 2
+	movw	r2, #337
+	ldr	r1, .L137+4
+.LVL166:
+	ldr	r0, .L137+8
+.LVL167:
+	bl	printf
+.LVL168:
+.L131:
+	.loc 2 339 0 is_stmt 1
+	ldr	r3, [r8]
+	movw	r1, #65535
+	ldrh	r2, [r7, r6]
+	cmp	r4, r3
+	bne	.L132
+	.loc 2 340 0
+	cmp	r2, r1
+	.loc 2 343 0
+	ittee	ne
+	ldrne	r0, [r5]
+	movne	r3, #6
+	.loc 2 341 0
+	moveq	r3, #0
+	streq	r3, [r8]
+	.loc 2 343 0
+	ittt	ne
+	mlane	r2, r3, r2, r0
+	strne	r2, [r8]
+	.loc 2 344 0
+	strhne	r1, [r2, #2]	@ movhi
+.L134:
+	.loc 2 355 0
+	movw	r3, #65535
+	.loc 2 357 0
+	movs	r0, #0
+	.loc 2 355 0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 357 0
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL169:
+.L132:
+	.loc 2 346 0
+	cmp	r2, r1
+	.loc 2 348 0
+	ldr	r1, [r5]
+.LVL170:
+	mov	r3, #6
+	ldrh	r0, [r4, #2]
+	.loc 2 351 0
+	ittt	ne
+	mlane	r5, r3, r2, r1
+	strhne	r0, [r5, #2]	@ movhi
+.LVL171:
+	.loc 2 352 0
+	ldrhne	r0, [r4, #2]
+	.loc 2 353 0
+	muls	r3, r0, r3
+	strh	r2, [r1, r3]	@ movhi
+.LVL172:
+	b	.L134
+.L138:
+	.align	2
+.L137:
+	.word	.LANCHOR41
+	.word	.LANCHOR50
+	.word	.LC1
+	.cfi_endproc
+.LFE251:
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",%progbits
+	.align	1
+	.global	List_pop_index_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+.LFB252:
+	.loc 2 360 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL173:
+	.loc 2 364 0
+	ldr	r3, [r0]
+	.loc 2 360 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 364 0
+	cbz	r3, .L145
+	.loc 2 369 0
+	ldr	r2, .L146
+	.loc 2 368 0
+	movw	r5, #65535
+	.loc 2 369 0
+	movs	r6, #6
+	ldr	r2, [r2]
+.L141:
+.LVL174:
+	.loc 2 368 0
+	cbnz	r1, .L142
+.L144:
+	.loc 2 372 0
+	ldr	r4, .L146+4
+	subs	r3, r3, r2
+.LVL175:
+	asrs	r3, r3, #1
+	muls	r4, r3, r4
+.LVL176:
+	.loc 2 373 0
+	uxth	r1, r4
+.LVL177:
+	bl	List_remove_node
+.LVL178:
+	uxth	r0, r4
+	.loc 2 375 0
+	pop	{r4, r5, r6, pc}
+.LVL179:
+.L142:
+	.loc 2 368 0 discriminator 1
+	ldrh	r4, [r3]
+	cmp	r4, r5
+	beq	.L144
+	.loc 2 370 0
+	subs	r1, r1, #1
+.LVL180:
+	.loc 2 369 0
+	mla	r3, r6, r4, r2
+.LVL181:
+	.loc 2 370 0
+	uxth	r1, r1
+.LVL182:
+	b	.L141
+.LVL183:
+.L145:
+	.loc 2 365 0
+	movw	r0, #65535
+.LVL184:
+	.loc 2 376 0
+	pop	{r4, r5, r6, pc}
+.L147:
+	.align	2
+.L146:
+	.word	.LANCHOR41
+	.word	-1431655765
+	.cfi_endproc
+.LFE252:
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_pop_head_node,"ax",%progbits
+	.align	1
+	.global	List_pop_head_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_pop_head_node, %function
+List_pop_head_node:
+.LFB253:
+	.loc 2 379 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL185:
+	.loc 2 380 0
+	movs	r1, #0
+	b	List_pop_index_node
+.LVL186:
+	.cfi_endproc
+.LFE253:
+	.size	List_pop_head_node, .-List_pop_head_node
+	.section	.text.List_get_gc_head_node,"ax",%progbits
+	.align	1
+	.global	List_get_gc_head_node
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+.LFB254:
+	.loc 2 384 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL187:
+	.loc 2 388 0
+	ldr	r3, .L155
+	.loc 2 384 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 388 0
+	ldr	r3, [r3]
+	cbz	r3, .L154
+	.loc 2 393 0
+	ldr	r2, .L155+4
+	movs	r4, #6
+	ldr	r1, [r2]
+	.loc 2 392 0
+	movw	r2, #65535
+.L151:
+.LVL188:
+	cbz	r0, .L152
+	.loc 2 392 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r3]
+.LVL189:
+	cmp	r3, r2
+	bne	.L153
+.L154:
+	.loc 2 389 0 is_stmt 1
+	movw	r0, #65535
+.LVL190:
+	pop	{r4, pc}
+.LVL191:
+.L153:
+	.loc 2 394 0
+	subs	r0, r0, #1
+.LVL192:
+	.loc 2 393 0
+	mla	r3, r4, r3, r1
+.LVL193:
+	.loc 2 394 0
+	uxth	r0, r0
+.LVL194:
+	b	.L151
+.L152:
+.LVL195:
+	.loc 2 398 0
+	ldr	r0, .L155+8
+.LVL196:
+	subs	r3, r3, r1
+.LVL197:
+	asrs	r3, r3, #1
+	muls	r3, r0, r3
+	uxth	r0, r3
+	.loc 2 401 0
+	pop	{r4, pc}
+.L156:
+	.align	2
+.L155:
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	-1431655765
+	.cfi_endproc
+.LFE254:
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",%progbits
+	.align	1
+	.global	List_update_data_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	List_update_data_list, %function
+List_update_data_list:
+.LFB255:
+	.loc 2 404 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL198:
+	.loc 2 413 0
+	ldr	r3, .L165
+	.loc 2 404 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 404 0
+	mov	r4, r0
+	.loc 2 413 0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L159
+	.loc 2 413 0 is_stmt 0 discriminator 1
+	ldr	r3, .L165+4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L159
+	.loc 2 413 0 discriminator 2
+	ldr	r3, .L165+8
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L159
+.LVL199:
+.LBB189:
+.LBB190:
+	.loc 2 416 0 is_stmt 1
+	ldr	r6, .L165+12
+	movs	r3, #6
+	.loc 2 418 0
+	ldr	r2, .L165+16
+	.loc 2 416 0
+	muls	r3, r0, r3
+	ldr	r1, [r6]
+	.loc 2 418 0
+	ldr	r2, [r2]
+	.loc 2 416 0
+	add	r8, r1, r3
+.LVL200:
+	.loc 2 418 0
+	cmp	r8, r2
+	beq	.L159
+.LVL201:
+	.loc 2 421 0
+	ldr	r7, .L165+20
+	.loc 2 422 0
+	ldrh	r5, [r8, #4]
+	.loc 2 421 0
+	ldr	r2, [r7]
+	.loc 2 422 0
+	ldrh	r2, [r2, r0, lsl #1]
+.LVL202:
+	.loc 2 424 0
+	muls	r5, r2, r5
+.LVL203:
+	.loc 2 426 0
+	ldrh	r2, [r8, #2]
+	movw	r0, #65535
+.LVL204:
+	.loc 2 424 0
+	it	eq
+	moveq	r5, #-1
+.LVL205:
+	.loc 2 426 0
+	cmp	r2, r0
+	bne	.L162
+	ldrh	r3, [r1, r3]
+	cmp	r3, r2
+	bne	.L162
+	mov	r2, #426
+	ldr	r1, .L165+24
+	ldr	r0, .L165+28
+	bl	printf
+.LVL206:
+.L162:
+	.loc 2 427 0
+	ldrh	r3, [r8, #2]
+	movs	r2, #6
+	muls	r2, r3, r2
+.LVL207:
+	.loc 2 428 0
+	ldr	r3, .L165+32
+	asrs	r1, r2, #1
+	muls	r3, r1, r3
+	.loc 2 429 0
+	ldr	r1, [r7]
+	.loc 2 430 0
+	ldrh	r0, [r1, r3, lsl #1]
+	ldr	r1, [r6]
+	add	r2, r2, r1
+.LVL208:
+	ldrh	r3, [r2, #4]
+.LVL209:
+	.loc 2 432 0
+	muls	r3, r0, r3
+.LVL210:
+	it	eq
+	moveq	r3, #-1
+.LVL211:
+	.loc 2 434 0
+	cmp	r5, r3
+	bcs	.L159
+	.loc 2 435 0
+	ldr	r5, .L165+36
+.LVL212:
+	mov	r1, r4
+	ldr	r0, .L165+16
+	bl	List_remove_node
+.LVL213:
+	ldrh	r3, [r5]
+	cbnz	r3, .L164
+	movw	r2, #435
+	ldr	r1, .L165+24
+	ldr	r0, .L165+28
+	bl	printf
+.LVL214:
+.L164:
+	ldrh	r3, [r5]
+	.loc 2 436 0
+	mov	r0, r4
+	.loc 2 435 0
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	.loc 2 436 0
+	bl	INSERT_DATA_LIST
+.LVL215:
+.L159:
+.LBE190:
+.LBE189:
+	.loc 2 439 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L166:
+	.align	2
+.L165:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR41
+	.word	.LANCHOR42
+	.word	.LANCHOR43
+	.word	.LANCHOR54
+	.word	.LC1
+	.word	-1431655765
+	.word	.LANCHOR45
+	.cfi_endproc
+.LFE255:
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB258:
+	.loc 2 516 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL216:
+	.loc 2 520 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
+	.loc 2 516 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 516 0
+	mov	r4, r0
+	.loc 2 520 0
+	movs	r3, #0
+.LVL217:
+.L168:
+	uxth	r5, r3
+.LVL218:
+	.loc 2 520 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bcc	.L170
+.LVL219:
+.L171:
+.LBB193:
+.LBB194:
+	.loc 2 532 0 is_stmt 1
+	mov	r2, #532
+	ldr	r1, .L177
+	ldr	r0, .L177+4
+	bl	printf
+.LVL220:
+	b	.L172
+.LVL221:
+.L170:
+.LBE194:
+.LBE193:
+	.loc 2 521 0
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L168
+	.loc 2 522 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL222:
+	strh	r0, [r7]	@ movhi
+	.loc 2 523 0
+	cbz	r0, .L169
+	.loc 2 526 0
+	ldr	r3, [r4, #28]
+	.loc 2 524 0
+	strh	r6, [r4, #2]	@ movhi
+	.loc 2 525 0
+	strh	r5, [r4]	@ movhi
+	.loc 2 526 0
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	.loc 2 527 0
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+.L169:
+	.loc 2 532 0
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bls	.L171
+.L172:
+	.loc 2 534 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL223:
+.L178:
+	.align	2
+.L177:
+	.word	.LANCHOR55
+	.word	.LC1
+	.cfi_endproc
+.LFE258:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",%progbits
+	.align	1
+	.global	select_l2p_ram_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+.LFB263:
+	.loc 2 700 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL224:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 705 0
+	movs	r1, #0
+	ldr	r3, .L189
+	.loc 2 706 0
+	movs	r0, #12
+	movw	r5, #65535
+	.loc 2 705 0
+	ldrh	r2, [r3]
+	.loc 2 706 0
+	ldr	r3, .L189+4
+	ldr	r3, [r3]
+.LVL225:
+.L180:
+	uxth	r4, r1
+.LVL226:
+	.loc 2 705 0 discriminator 1
+	cmp	r4, r2
+	bcc	.L182
+	mov	r4, r2
+.LVL227:
+	movs	r1, #0
+.LVL228:
+	mov	r6, #-2147483648
+	.loc 2 716 0
+	movs	r7, #12
+.L183:
+	uxth	r5, r1
+.LVL229:
+	.loc 2 715 0 discriminator 1
+	cmp	r5, r2
+	bcc	.L185
+	.loc 2 724 0
+	cmp	r4, r2
+	bcc	.L181
+	.loc 2 730 0
+	ldr	r1, .L189+8
+	mov	r4, r2
+	mov	r0, #-1
+	ldrh	r7, [r1]
+	movs	r1, #0
+.LVL230:
+.L186:
+	uxth	r5, r1
+.LVL231:
+	.loc 2 729 0 discriminator 1
+	cmp	r5, r2
+	bcc	.L188
+	.loc 2 735 0
+	cmp	r4, r2
+	bcc	.L181
+	.loc 2 735 0 is_stmt 0 discriminator 1
+	movw	r2, #735
+	ldr	r1, .L189+12
+	ldr	r0, .L189+16
+.LVL232:
+	bl	printf
+.LVL233:
+	b	.L181
+.LVL234:
+.L182:
+	adds	r1, r1, #1
+	.loc 2 706 0 is_stmt 1
+	mla	r6, r0, r1, r3
+	ldrh	r6, [r6, #-12]
+	cmp	r6, r5
+	bne	.L180
+.LVL235:
+.L181:
+	.loc 2 737 0
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL236:
+.L185:
+	.loc 2 716 0
+	mla	r0, r7, r1, r3
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L184
+	.loc 2 717 0
+	cmp	r6, r0
+	itt	hi
+	movhi	r6, r0
+.LVL237:
+	movhi	r4, r5
+.L184:
+.LVL238:
+	adds	r1, r1, #1
+.LVL239:
+	b	.L183
+.LVL240:
+.L188:
+	.loc 2 730 0
+	ldr	r6, [r3, #4]
+	cmp	r0, r6
+	bls	.L187
+	.loc 2 730 0 is_stmt 0 discriminator 1
+	ldrh	ip, [r3]
+	cmp	ip, r7
+	itt	ne
+	movne	r0, r6
+.LVL241:
+	movne	r4, r5
+.LVL242:
+.L187:
+	adds	r1, r1, #1
+.LVL243:
+	adds	r3, r3, #12
+	b	.L186
+.L190:
+	.align	2
+.L189:
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR58
+	.word	.LC1
+	.cfi_endproc
+.LFE263:
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
+	.align	1
+	.global	FtlUpdateVaildLpn
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+.LFB269:
+	.loc 2 882 0 is_stmt 1
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL244:
+	.loc 2 885 0
+	ldr	r2, .L201
+	.loc 2 882 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	mov	r1, r2
+	.loc 2 885 0
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L192
+	.loc 2 885 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L192
+	.loc 2 885 0
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	.loc 2 894 0 is_stmt 1
+	pop	{r4, r5, r6, pc}
+.L192:
+	.loc 2 886 0
+	movs	r3, #0
+.LBB197:
+.LBB198:
+	.loc 2 888 0
+	ldr	r0, .L201+4
+.LVL245:
+.LBE198:
+.LBE197:
+	.loc 2 886 0
+	strh	r3, [r1]	@ movhi
+.LBB202:
+.LBB199:
+	.loc 2 890 0
+	movw	r6, #65535
+	ldr	r1, .L201+8
+	ldrh	r4, [r0]
+	mov	r0, r3
+.LBE199:
+.LBE202:
+	.loc 2 887 0
+	ldr	r2, .L201+12
+.LBB203:
+.LBB200:
+	.loc 2 890 0
+	ldr	r1, [r1]
+.LBE200:
+.LBE203:
+	.loc 2 887 0
+	str	r3, [r2]
+.LVL246:
+	add	r4, r1, r4, lsl #1
+.L193:
+.LBB204:
+.LBB201:
+	.loc 2 888 0
+	cmp	r1, r4
+	bne	.L195
+	cbz	r3, .L191
+	str	r0, [r2]
+.L191:
+	pop	{r4, r5, r6, pc}
+.L195:
+	.loc 2 890 0
+	ldrh	r5, [r1], #2
+	cmp	r5, r6
+	.loc 2 891 0
+	itt	ne
+	addne	r0, r0, r5
+	movne	r3, #1
+	b	.L193
+.L202:
+	.align	2
+.L201:
+	.word	.LANCHOR59
+	.word	.LANCHOR5
+	.word	.LANCHOR43
+	.word	.LANCHOR60
+.LBE201:
+.LBE204:
+	.cfi_endproc
+.LFE269:
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_set_blk_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+.LFB275:
+	.loc 2 1347 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL247:
+	.loc 2 1347 0
+	mov	r3, r0
+	.loc 2 1348 0
+	cbz	r1, .L204
+	b	ftl_set_blk_mode.part.7
+.LVL248:
+.L204:
+	.loc 2 1351 0
+	ldr	r2, .L205
+	lsrs	r0, r0, #5
+.LVL249:
+	and	r3, r3, #31
+	ldr	r1, [r2]
+.LVL250:
+	movs	r2, #1
+	lsl	r3, r2, r3
+	ldr	r2, [r1, r0, lsl #2]
+	bic	r2, r2, r3
+	str	r2, [r1, r0, lsl #2]
+	bx	lr
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR1
+	.cfi_endproc
+.LFE275:
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+.LFB276:
+	.loc 2 1355 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL251:
+	.loc 2 1356 0
+	ldr	r3, .L208
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+.LVL252:
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2, lsl #2]
+	lsr	r0, r3, r0
+	.loc 2 1357 0
+	and	r0, r0, #1
+	bx	lr
+.L209:
+	.align	2
+.L208:
+	.word	.LANCHOR1
+	.cfi_endproc
+.LFE276:
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
+	.align	1
+	.global	ftl_sb_update_avl_pages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+.LFB282:
+	.loc 2 1608 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL253:
+	.loc 2 1610 0
+	movs	r3, #0
+	.loc 2 1608 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 1610 0
+	strh	r3, [r0, #4]	@ movhi
+.LVL254:
+	.loc 2 1613 0
+	movw	r6, #65535
+	.loc 2 1611 0
+	ldr	r3, .L217
+	ldrh	r4, [r3]
+	add	r3, r0, r2, lsl #1
+	adds	r3, r3, #14
+.LVL255:
+.L211:
+	.loc 2 1611 0 is_stmt 0 discriminator 1
+	cmp	r2, r4
+	bcc	.L213
+	.loc 2 1622 0 is_stmt 1
+	ldr	r3, .L217+4
+	add	r5, r0, #16
+	.loc 2 1620 0
+	movw	r6, #65535
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	subs	r1, r3, r1
+.LVL256:
+	.loc 2 1622 0
+	movs	r3, #0
+	uxth	r1, r1
+.LVL257:
+.L214:
+	.loc 2 1618 0 discriminator 1
+	uxth	r2, r3
+	cmp	r4, r2
+	bhi	.L216
+	.loc 2 1625 0
+	pop	{r4, r5, r6, pc}
+.LVL258:
+.L213:
+	.loc 2 1613 0
+	ldrh	r5, [r3, #2]!
+	.loc 2 1611 0
+	adds	r2, r2, #1
+.LVL259:
+	uxth	r2, r2
+.LVL260:
+	.loc 2 1613 0
+	cmp	r5, r6
+	.loc 2 1615 0
+	ittt	ne
+	ldrhne	r5, [r0, #4]
+	addne	r5, r5, #1
+	strhne	r5, [r0, #4]	@ movhi
+	b	.L211
+.LVL261:
+.L216:
+	.loc 2 1620 0
+	ldrh	r2, [r5], #2
+	adds	r3, r3, #1
+.LVL262:
+	cmp	r2, r6
+	.loc 2 1622 0
+	ittt	ne
+	ldrhne	r2, [r0, #4]
+	addne	r2, r2, r1
+	strhne	r2, [r0, #4]	@ movhi
+	b	.L214
+.L218:
+	.align	2
+.L217:
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.cfi_endproc
+.LFE282:
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
+	.align	1
+	.global	FtlSlcSuperblockCheck
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+.LFB285:
+	.loc 2 2013 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL263:
+	.loc 2 2016 0
+	ldrh	r3, [r0, #4]
+	.loc 2 2013 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2016 0
+	cbz	r3, .L219
+	.loc 2 2018 0
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L219
+.LVL264:
+.LBB207:
+.LBB208:
+	.loc 2 2020 0
+	ldrb	r2, [r0, #6]	@ zero_extendqisi2
+	.loc 2 2025 0
+	movs	r5, #0
+	.loc 2 2020 0
+	adds	r2, r2, #8
+	ldrh	r1, [r0, r2, lsl #1]
+.LVL265:
+	.loc 2 2023 0
+	ldr	r2, .L225
+	ldrh	r4, [r2]
+	.loc 2 2021 0
+	mov	r2, r3
+.L222:
+	cmp	r1, r2
+	beq	.L224
+.LVL266:
+.L219:
+	pop	{r4, r5, pc}
+.LVL267:
+.L224:
+	.loc 2 2022 0
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	.loc 2 2023 0
+	cmp	r3, r4
+	.loc 2 2022 0
+	strb	r3, [r0, #6]
+	.loc 2 2024 0
+	itttt	eq
+	ldrheq	r3, [r0, #2]
+	.loc 2 2025 0
+	strbeq	r5, [r0, #6]
+	.loc 2 2024 0
+	addeq	r3, r3, #1
+	strheq	r3, [r0, #2]	@ movhi
+	.loc 2 2027 0
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r1, [r0, r3, lsl #1]
+.LVL268:
+	b	.L222
+.L226:
+	.align	2
+.L225:
+	.word	.LANCHOR3
+.LBE208:
+.LBE207:
+	.cfi_endproc
+.LFE285:
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.make_superblock,"ax",%progbits
+	.align	1
+	.global	make_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	make_superblock, %function
+make_superblock:
+.LFB287:
+	.loc 2 2045 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL269:
+	.loc 2 2048 0
+	ldr	r3, .L232
+	ldrh	r2, [r0]
+	.loc 2 2045 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2045 0
+	mov	r4, r0
+	.loc 2 2048 0
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L228
+	.loc 2 2048 0 is_stmt 0 discriminator 1
+	mov	r2, #2048
+	ldr	r1, .L232+4
+	ldr	r0, .L232+8
+.LVL270:
+	bl	printf
+.LVL271:
+.L228:
+	.loc 2 2051 0 is_stmt 1
+	ldr	r3, .L232+12
+	add	r6, r4, #16
+	.loc 2 2052 0
+	ldr	r10, .L232+20
+	.loc 2 2053 0
+	movw	r7, #65535
+	.loc 2 2049 0
+	movs	r5, #0
+	.loc 2 2051 0
+	ldrh	r8, [r3]
+	.loc 2 2049 0
+	strh	r5, [r4, #4]	@ movhi
+	.loc 2 2050 0
+	strb	r5, [r4, #7]
+.LVL272:
+.L229:
+	.loc 2 2051 0 discriminator 1
+	uxth	r3, r5
+	cmp	r8, r3
+	bhi	.L231
+	.loc 2 2061 0
+	ldr	r2, .L232+16
+	.loc 2 2064 0
+	movs	r0, #0
+	.loc 2 2061 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 2062 0
+	movs	r3, #1
+	strb	r3, [r4, #9]
+	.loc 2 2064 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL273:
+.L231:
+	.loc 2 2052 0
+	ldrh	r1, [r4]
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL274:
+	.loc 2 2053 0
+	strh	r7, [r6]	@ movhi
+	.loc 2 2052 0
+	mov	fp, r0
+.LVL275:
+	.loc 2 2054 0
+	bl	FtlBbmIsBadBlock
+.LVL276:
+	cbnz	r0, .L230
+	.loc 2 2055 0
+	strh	fp, [r6]	@ movhi
+	.loc 2 2056 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L230:
+.LVL277:
+	adds	r5, r5, #1
+.LVL278:
+	adds	r6, r6, #2
+	b	.L229
+.L233:
+	.align	2
+.L232:
+	.word	.LANCHOR5
+	.word	.LANCHOR61
+	.word	.LC1
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.cfi_endproc
+.LFE287:
+	.size	make_superblock, .-make_superblock
+	.section	.text.update_multiplier_value,"ax",%progbits
+	.align	1
+	.global	update_multiplier_value
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+.LFB296:
+	.loc 2 2401 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL279:
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 2405 0
+	movs	r5, #0
+	ldr	r3, .L240
+	.loc 2 2401 0
+	mov	r6, r0
+	.loc 2 2403 0
+	mov	r4, r5
+	.loc 2 2406 0
+	ldr	r10, .L240+12
+	.loc 2 2405 0
+	ldrh	r7, [r3]
+	.loc 2 2408 0
+	ldr	r3, .L240+4
+	ldrh	r8, [r3]
+.LVL280:
+.L235:
+	.loc 2 2405 0 discriminator 1
+	uxth	r3, r5
+	cmp	r7, r3
+	bhi	.L237
+	.loc 2 2410 0
+	cbz	r4, .L239
+	.loc 2 2411 0
+	mov	r1, r4
+	mov	r0, #32768
+	bl	__aeabi_idiv
+.LVL281:
+.L238:
+	.loc 2 2412 0
+	ldr	r3, .L240+8
+	movs	r2, #6
+	ldr	r3, [r3]
+	mla	r6, r2, r6, r3
+	strh	r0, [r6, #4]	@ movhi
+	.loc 2 2414 0
+	movs	r0, #0
+.LVL282:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL283:
+.L237:
+	.loc 2 2406 0
+	mov	r1, r6
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL284:
+	.loc 2 2407 0
+	bl	FtlBbmIsBadBlock
+.LVL285:
+	cbnz	r0, .L236
+	.loc 2 2408 0
+	add	r4, r4, r8
+.LVL286:
+	uxth	r4, r4
+.LVL287:
+.L236:
+	adds	r5, r5, #1
+.LVL288:
+	b	.L235
+.LVL289:
+.L239:
+	mov	r0, r4
+	b	.L238
+.L241:
+	.align	2
+.L240:
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR41
+	.word	.LANCHOR13
+	.cfi_endproc
+.LFE296:
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMinEraseCount
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+.LFB297:
+	.loc 2 2417 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL290:
+	.loc 2 2420 0
+	ldr	r3, .L245
+	ldr	r0, [r3]
+	cbz	r0, .L243
+	.loc 2 2421 0
+	ldr	r3, .L245+4
+	ldr	r3, [r3]
+	subs	r0, r0, r3
+	ldr	r3, .L245+8
+	asrs	r0, r0, #1
+	muls	r0, r3, r0
+	ldr	r3, .L245+12
+	ldr	r3, [r3]
+	uxth	r0, r0
+	ldrh	r0, [r3, r0, lsl #1]
+.LVL291:
+.L243:
+	.loc 2 2423 0
+	bx	lr
+.L246:
+	.align	2
+.L245:
+	.word	.LANCHOR47
+	.word	.LANCHOR41
+	.word	-1431655765
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE297:
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMaxEraseCount
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+.LFB298:
+	.loc 2 2426 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL292:
+	.loc 2 2431 0
+	ldr	r3, .L255
+	.loc 2 2426 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2431 0
+	ldr	r3, [r3]
+	cbz	r3, .L253
+	.loc 2 2432 0
+	ldr	r2, .L255+4
+	.loc 2 2436 0
+	movs	r5, #6
+	movw	r6, #65535
+	.loc 2 2432 0
+	ldrh	r2, [r2]
+	rsb	r2, r2, r2, lsl #3
+	asrs	r2, r2, #3
+	cmp	r0, r2
+	.loc 2 2433 0
+	it	gt
+	uxthgt	r0, r2
+.LVL293:
+	.loc 2 2434 0
+	ldr	r2, .L255+8
+	ldr	r1, [r2]
+	ldr	r2, .L255+12
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	.loc 2 2435 0
+	movs	r2, #0
+	.loc 2 2434 0
+	uxth	r3, r3
+.LVL294:
+.L250:
+	.loc 2 2435 0 discriminator 1
+	uxth	r4, r2
+	cmp	r0, r4
+	bls	.L252
+	.loc 2 2436 0
+	mul	r4, r5, r3
+	adds	r2, r2, #1
+.LVL295:
+	ldrh	r4, [r1, r4]
+	cmp	r4, r6
+	bne	.L254
+.L252:
+	.loc 2 2440 0
+	ldr	r2, .L255+16
+	ldr	r2, [r2]
+	ldrh	r0, [r2, r3, lsl #1]
+.LVL296:
+	pop	{r4, r5, r6, pc}
+.LVL297:
+.L254:
+	mov	r3, r4
+.LVL298:
+	b	.L250
+.L253:
+	.loc 2 2427 0
+	mov	r0, r3
+.LVL299:
+	.loc 2 2443 0
+	pop	{r4, r5, r6, pc}
+.L256:
+	.align	2
+.L255:
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR41
+	.word	-1431655765
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE298:
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.FtlPrintInfo2buf,"ax",%progbits
+	.align	1
+	.global	FtlPrintInfo2buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPrintInfo2buf, %function
+FtlPrintInfo2buf:
+.LFB203:
+	.loc 3 12 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL300:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 12 0
+	mov	r8, r0
+.LVL301:
+	.loc 3 16 0
+	ldr	r1, .L269
+	bl	sprintf
+.LVL302:
+	.loc 3 17 0
+	ldr	r3, .L269+4
+	.loc 3 16 0
+	add	r5, r8, r0
+.LVL303:
+	.loc 3 17 0
+	ldr	r1, .L269+8
+	mov	r0, r5
+	.loc 3 31 0
+	ldr	r4, .L269+12
+	.loc 3 17 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL304:
+	add	r5, r5, r0
+.LVL305:
+	.loc 3 18 0
+	ldr	r1, .L269+16
+	mov	r0, r5
+	.loc 3 32 0
+	ldr	r10, .L269+352
+	.loc 3 18 0
+	bl	sprintf
+.LVL306:
+	.loc 3 19 0
+	ldr	r3, .L269+20
+	.loc 3 18 0
+	add	r5, r5, r0
+.LVL307:
+	.loc 3 19 0
+	ldr	r1, .L269+24
+	mov	r0, r5
+	.loc 3 39 0
+	ldr	r6, .L269+28
+	.loc 3 19 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL308:
+	.loc 3 20 0
+	ldr	r3, .L269+32
+	.loc 3 19 0
+	add	r5, r5, r0
+.LVL309:
+	.loc 3 20 0
+	ldr	r1, .L269+36
+	mov	r0, r5
+	.loc 3 67 0
+	ldr	r7, .L269+40
+	.loc 3 20 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL310:
+	.loc 3 21 0
+	ldr	r3, .L269+44
+	.loc 3 20 0
+	add	r5, r5, r0
+.LVL311:
+	.loc 3 21 0
+	ldr	r1, .L269+48
+	mov	r0, r5
+	.loc 3 72 0
+	ldr	fp, .L269+356
+	.loc 3 21 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL312:
+	.loc 3 22 0
+	ldr	r3, .L269+52
+	.loc 3 21 0
+	add	r5, r5, r0
+.LVL313:
+	.loc 3 22 0
+	ldr	r1, .L269+56
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL314:
+	.loc 3 23 0
+	ldr	r3, .L269+60
+	.loc 3 22 0
+	add	r5, r5, r0
+.LVL315:
+	.loc 3 23 0
+	ldr	r1, .L269+64
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL316:
+	.loc 3 24 0
+	ldr	r3, .L269+68
+	.loc 3 23 0
+	add	r5, r5, r0
+.LVL317:
+	.loc 3 24 0
+	ldr	r1, .L269+72
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL318:
+	.loc 3 25 0
+	ldr	r3, .L269+76
+	.loc 3 24 0
+	add	r5, r5, r0
+.LVL319:
+	.loc 3 25 0
+	ldr	r1, .L269+80
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL320:
+	.loc 3 26 0
+	ldr	r3, .L269+84
+	.loc 3 25 0
+	add	r5, r5, r0
+.LVL321:
+	.loc 3 26 0
+	ldr	r1, .L269+88
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL322:
+	.loc 3 27 0
+	ldr	r3, .L269+92
+	.loc 3 26 0
+	add	r5, r5, r0
+.LVL323:
+	.loc 3 27 0
+	ldr	r1, .L269+96
+	mov	r0, r5
+	ldr	r2, [r3]
+	lsrs	r2, r2, #11
+	bl	sprintf
+.LVL324:
+	.loc 3 28 0
+	ldr	r3, .L269+100
+	.loc 3 27 0
+	add	r5, r5, r0
+.LVL325:
+	.loc 3 28 0
+	ldr	r1, .L269+104
+	mov	r0, r5
+	ldr	r2, [r3]
+	lsrs	r2, r2, #11
+	bl	sprintf
+.LVL326:
+	.loc 3 29 0
+	ldr	r3, .L269+108
+	.loc 3 28 0
+	add	r5, r5, r0
+.LVL327:
+	.loc 3 29 0
+	ldr	r1, .L269+112
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL328:
+	.loc 3 30 0
+	ldr	r3, .L269+116
+	.loc 3 29 0
+	add	r5, r5, r0
+.LVL329:
+	.loc 3 30 0
+	ldr	r1, .L269+120
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL330:
+	add	r5, r5, r0
+.LVL331:
+	.loc 3 31 0
+	ldrh	r2, [r4, #6]
+	ldr	r1, .L269+124
+	mov	r0, r5
+	bl	sprintf
+.LVL332:
+	add	r5, r5, r0
+.LVL333:
+	.loc 3 32 0
+	ldrh	r2, [r10]
+	ldr	r1, .L269+128
+	mov	r0, r5
+	bl	sprintf
+.LVL334:
+	.loc 3 33 0
+	ldr	r3, .L269+132
+	.loc 3 32 0
+	add	r5, r5, r0
+.LVL335:
+	.loc 3 33 0
+	ldr	r1, .L269+136
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL336:
+	.loc 3 34 0
+	ldr	r3, .L269+140
+	.loc 3 33 0
+	add	r5, r5, r0
+.LVL337:
+	.loc 3 34 0
+	ldr	r1, .L269+144
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL338:
+	.loc 3 35 0
+	ldr	r3, .L269+148
+	.loc 3 34 0
+	add	r5, r5, r0
+.LVL339:
+	.loc 3 35 0
+	ldr	r1, .L269+152
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL340:
+	.loc 3 36 0
+	ldr	r3, .L269+156
+	.loc 3 35 0
+	add	r5, r5, r0
+.LVL341:
+	.loc 3 36 0
+	ldr	r1, .L269+160
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL342:
+	.loc 3 37 0
+	ldr	r3, .L269+164
+	.loc 3 36 0
+	add	r5, r5, r0
+.LVL343:
+	.loc 3 37 0
+	ldr	r1, .L269+168
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL344:
+	.loc 3 38 0
+	ldr	r3, .L269+172
+	.loc 3 37 0
+	add	r5, r5, r0
+.LVL345:
+	.loc 3 38 0
+	ldr	r1, .L269+176
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL346:
+	add	r5, r5, r0
+.LVL347:
+	.loc 3 39 0
+	ldrh	r2, [r6, #30]
+	ldr	r1, .L269+180
+	mov	r0, r5
+	bl	sprintf
+.LVL348:
+	add	r5, r5, r0
+.LVL349:
+	.loc 3 40 0
+	ldrh	r2, [r6, #28]
+	ldr	r1, .L269+184
+	mov	r0, r5
+	bl	sprintf
+.LVL350:
+	.loc 3 41 0
+	ldr	r3, .L269+188
+	.loc 3 40 0
+	add	r5, r5, r0
+.LVL351:
+	.loc 3 41 0
+	ldr	r1, .L269+192
+	mov	r0, r5
+	.loc 3 55 0
+	ldr	r6, .L269+196
+	.loc 3 41 0
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL352:
+	.loc 3 42 0
+	ldr	r3, .L269+200
+	.loc 3 41 0
+	add	r5, r5, r0
+.LVL353:
+	.loc 3 42 0
+	ldr	r1, .L269+204
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL354:
+	.loc 3 43 0
+	ldr	r3, .L269+208
+	.loc 3 42 0
+	add	r5, r5, r0
+.LVL355:
+	.loc 3 43 0
+	ldr	r1, .L269+212
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL356:
+	.loc 3 44 0
+	ldr	r3, .L269+216
+	.loc 3 43 0
+	add	r5, r5, r0
+.LVL357:
+	.loc 3 44 0
+	ldr	r1, .L269+220
+	mov	r0, r5
+	ldrh	r2, [r3, #6]
+	bl	sprintf
+.LVL358:
+	.loc 3 45 0
+	ldr	r3, .L269+224
+	.loc 3 44 0
+	add	r5, r5, r0
+.LVL359:
+	.loc 3 45 0
+	ldr	r1, .L269+228
+	mov	r0, r5
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL360:
+	.loc 3 46 0
+	ldr	r3, .L269+232
+	.loc 3 45 0
+	add	r5, r5, r0
+.LVL361:
+	.loc 3 46 0
+	ldr	r1, .L269+236
+	mov	r0, r5
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL362:
+	.loc 3 47 0
+	ldr	r3, .L269+240
+	.loc 3 46 0
+	add	r5, r5, r0
+.LVL363:
+	.loc 3 47 0
+	ldr	r1, .L269+244
+	mov	r0, r5
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL364:
+	.loc 3 48 0
+	ldr	r3, .L269+248
+	.loc 3 47 0
+	add	r5, r5, r0
+.LVL365:
+	.loc 3 48 0
+	ldr	r1, .L269+252
+	mov	r0, r5
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL366:
+	.loc 3 49 0
+	ldrh	r2, [r4]
+	.loc 3 48 0
+	add	r5, r5, r0
+.LVL367:
+	.loc 3 50 0
+	ldr	r4, .L269+256
+	.loc 3 49 0
+	mov	r0, r5
+	ldr	r1, .L269+260
+	bl	sprintf
+.LVL368:
+	add	r5, r5, r0
+.LVL369:
+	.loc 3 50 0
+	ldrh	r2, [r4, #2]
+	ldr	r1, .L269+264
+	mov	r0, r5
+	bl	sprintf
+.LVL370:
+	add	r5, r5, r0
+.LVL371:
+	.loc 3 51 0
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+268
+	mov	r0, r5
+	bl	sprintf
+.LVL372:
+	add	r5, r5, r0
+.LVL373:
+	.loc 3 52 0
+	ldrh	r2, [r4]
+	ldr	r1, .L269+272
+	mov	r0, r5
+	bl	sprintf
+.LVL374:
+	add	r5, r5, r0
+.LVL375:
+	.loc 3 53 0
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r1, .L269+276
+	mov	r0, r5
+	bl	sprintf
+.LVL376:
+	add	r5, r5, r0
+.LVL377:
+	.loc 3 54 0
+	ldrh	r2, [r4, #4]
+	ldr	r1, .L269+280
+	mov	r0, r5
+	bl	sprintf
+.LVL378:
+	.loc 3 55 0
+	ldr	r3, [r6]
+	.loc 3 54 0
+	add	r5, r5, r0
+.LVL379:
+	.loc 3 55 0
+	ldrh	r2, [r4]
+	mov	r0, r5
+	.loc 3 56 0
+	ldr	r4, .L269+284
+	.loc 3 55 0
+	ldr	r1, .L269+288
+	ldrh	r2, [r3, r2, lsl #1]
+	bl	sprintf
+.LVL380:
+	add	r5, r5, r0
+.LVL381:
+	.loc 3 56 0
+	ldrh	r2, [r4, #2]
+	ldr	r1, .L269+292
+	mov	r0, r5
+	bl	sprintf
+.LVL382:
+	add	r5, r5, r0
+.LVL383:
+	.loc 3 57 0
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+296
+	mov	r0, r5
+	bl	sprintf
+.LVL384:
+	add	r5, r5, r0
+.LVL385:
+	.loc 3 58 0
+	ldrh	r2, [r4]
+	ldr	r1, .L269+300
+	mov	r0, r5
+	bl	sprintf
+.LVL386:
+	add	r5, r5, r0
+.LVL387:
+	.loc 3 59 0
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r1, .L269+304
+	mov	r0, r5
+	bl	sprintf
+.LVL388:
+	add	r5, r5, r0
+.LVL389:
+	.loc 3 60 0
+	ldrh	r2, [r4, #4]
+	ldr	r1, .L269+308
+	mov	r0, r5
+	bl	sprintf
+.LVL390:
+	.loc 3 61 0
+	ldr	r3, [r6]
+	.loc 3 60 0
+	add	r5, r5, r0
+.LVL391:
+	.loc 3 61 0
+	ldrh	r2, [r4]
+	mov	r0, r5
+	.loc 3 62 0
+	ldr	r4, .L269+312
+	.loc 3 61 0
+	ldr	r1, .L269+316
+	ldrh	r2, [r3, r2, lsl #1]
+	bl	sprintf
+.LVL392:
+	add	r5, r5, r0
+.LVL393:
+	.loc 3 62 0
+	ldrh	r2, [r4, #2]
+	ldr	r1, .L269+320
+	mov	r0, r5
+	bl	sprintf
+.LVL394:
+	add	r5, r5, r0
+.LVL395:
+	.loc 3 63 0
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+324
+	mov	r0, r5
+	bl	sprintf
+.LVL396:
+	add	r5, r5, r0
+.LVL397:
+	.loc 3 64 0
+	ldrh	r2, [r4]
+	ldr	r1, .L269+328
+	mov	r0, r5
+	bl	sprintf
+.LVL398:
+	add	r5, r5, r0
+.LVL399:
+	.loc 3 65 0
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r1, .L269+332
+	mov	r0, r5
+	bl	sprintf
+.LVL400:
+	add	r5, r5, r0
+.LVL401:
+	.loc 3 66 0
+	ldrh	r2, [r4, #4]
+	ldr	r1, .L269+336
+	mov	r0, r5
+	bl	sprintf
+.LVL402:
+	add	r5, r5, r0
+.LVL403:
+	.loc 3 67 0
+	ldrh	r2, [r7, #2]
+	ldr	r1, .L269+340
+	mov	r0, r5
+	bl	sprintf
+.LVL404:
+	add	r5, r5, r0
+.LVL405:
+	.loc 3 68 0
+	ldrb	r2, [r7, #6]	@ zero_extendqisi2
+	ldr	r1, .L269+344
+	mov	r0, r5
+	bl	sprintf
+.LVL406:
+	add	r5, r5, r0
+.LVL407:
+	.loc 3 69 0
+	ldrh	r2, [r7]
+	ldr	r1, .L269+348
+	mov	r0, r5
+	b	.L270
+.L271:
+	.align	2
+.L269:
+	.word	.LC2
+	.word	.LANCHOR26
+	.word	.LC3
+	.word	.LANCHOR37
+	.word	.LC4
+	.word	.LANCHOR62
+	.word	.LC5
+	.word	.LANCHOR79
+	.word	.LANCHOR60
+	.word	.LC6
+	.word	.LANCHOR82
+	.word	.LANCHOR63
+	.word	.LC7
+	.word	.LANCHOR64
+	.word	.LC8
+	.word	.LANCHOR65
+	.word	.LC9
+	.word	.LANCHOR66
+	.word	.LC10
+	.word	.LANCHOR67
+	.word	.LC11
+	.word	.LANCHOR68
+	.word	.LC12
+	.word	.LANCHOR69
+	.word	.LC13
+	.word	.LANCHOR70
+	.word	.LC14
+	.word	.LANCHOR71
+	.word	.LC15
+	.word	.LANCHOR72
+	.word	.LC16
+	.word	.LC17
+	.word	.LC18
+	.word	.LANCHOR73
+	.word	.LC19
+	.word	.LANCHOR74
+	.word	.LC20
+	.word	.LANCHOR75
+	.word	.LC21
+	.word	.LANCHOR76
+	.word	.LC22
+	.word	.LANCHOR77
+	.word	.LC23
+	.word	.LANCHOR78
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LANCHOR34
+	.word	.LC27
+	.word	.LANCHOR43
+	.word	.LANCHOR31
+	.word	.LC28
+	.word	.LANCHOR2
+	.word	.LC29
+	.word	.LANCHOR38
+	.word	.LC30
+	.word	.LANCHOR5
+	.word	.LC31
+	.word	.LANCHOR80
+	.word	.LC32
+	.word	.LANCHOR7
+	.word	.LC33
+	.word	.LANCHOR81
+	.word	.LC34
+	.word	.LANCHOR51
+	.word	.LC35
+	.word	.LC36
+	.word	.LC37
+	.word	.LC38
+	.word	.LC39
+	.word	.LC40
+	.word	.LANCHOR52
+	.word	.LC41
+	.word	.LC42
+	.word	.LC43
+	.word	.LC44
+	.word	.LC45
+	.word	.LC46
+	.word	.LANCHOR53
+	.word	.LC47
+	.word	.LC48
+	.word	.LC49
+	.word	.LC50
+	.word	.LC51
+	.word	.LC52
+	.word	.LC53
+	.word	.LC54
+	.word	.LC55
+	.word	.LANCHOR48
+	.word	.LANCHOR83
+.L270:
+	bl	sprintf
+.LVL408:
+	add	r5, r5, r0
+.LVL409:
+	.loc 3 70 0
+	ldrb	r2, [r7, #8]	@ zero_extendqisi2
+	ldr	r1, .L272
+	mov	r0, r5
+	bl	sprintf
+.LVL410:
+	add	r5, r5, r0
+.LVL411:
+	.loc 3 71 0
+	ldrh	r2, [r7, #4]
+	ldr	r1, .L272+4
+	mov	r0, r5
+	bl	sprintf
+.LVL412:
+	.loc 3 72 0
+	ldr	r3, [fp, #76]
+	.loc 3 71 0
+	add	r5, r5, r0
+.LVL413:
+	.loc 3 72 0
+	ldr	r1, .L272+8
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [fp, #84]
+	ldr	r2, [fp, #80]
+	bl	sprintf
+.LVL414:
+	adds	r4, r5, r0
+.LVL415:
+	.loc 3 73 0
+	ldr	r2, [fp, #72]
+	ldr	r1, .L272+12
+	mov	r0, r4
+	bl	sprintf
+.LVL416:
+	add	r4, r4, r0
+.LVL417:
+	.loc 3 74 0
+	ldr	r2, [fp, #96]
+	ldr	r1, .L272+16
+	mov	r0, r4
+	bl	sprintf
+.LVL418:
+	.loc 3 75 0
+	ldr	r3, .L272+20
+	.loc 3 74 0
+	add	r4, r4, r0
+.LVL419:
+	.loc 3 75 0
+	ldr	r1, .L272+24
+	mov	r0, r4
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL420:
+	.loc 3 76 0
+	ldr	r3, .L272+28
+	.loc 3 75 0
+	add	r4, r4, r0
+.LVL421:
+	.loc 3 76 0
+	ldr	r1, .L272+32
+	mov	r0, r4
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL422:
+	.loc 3 77 0
+	ldr	r3, .L272+36
+	.loc 3 76 0
+	add	r4, r4, r0
+.LVL423:
+	.loc 3 77 0
+	ldr	r1, .L272+40
+	mov	r0, r4
+	ldr	r2, [r3]
+	bl	sprintf
+.LVL424:
+	.loc 3 78 0
+	ldr	r3, .L272+44
+	.loc 3 77 0
+	add	r4, r4, r0
+.LVL425:
+	.loc 3 78 0
+	ldr	r1, .L272+48
+	mov	r0, r4
+	ldrh	r2, [r3]
+	bl	sprintf
+.LVL426:
+	add	r4, r4, r0
+.LVL427:
+	.loc 3 79 0
+	bl	GetFreeBlockMinEraseCount
+.LVL428:
+	ldr	r1, .L272+52
+	mov	r2, r0
+	mov	r0, r4
+	bl	sprintf
+.LVL429:
+	add	r4, r4, r0
+.LVL430:
+	.loc 3 80 0
+	ldrh	r0, [r10]
+	bl	GetFreeBlockMaxEraseCount
+.LVL431:
+	ldr	r1, .L272+56
+	mov	r2, r0
+	mov	r0, r4
+	bl	sprintf
+.LVL432:
+	.loc 3 81 0
+	ldr	r3, .L272+60
+	.loc 3 80 0
+	add	r4, r4, r0
+.LVL433:
+	.loc 3 81 0
+	ldr	r3, [r3]
+	cmp	r3, #1
+	beq	.L258
+.L263:
+	.loc 3 104 0
+	sub	r0, r4, r8
+	.loc 3 105 0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL434:
+.L258:
+	.cfi_restore_state
+	.loc 3 84 0
+	ldrh	r3, [r7]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L260
+	.loc 3 85 0
+	ldr	r2, [r6]
+	mov	r0, r4
+	ldr	r1, .L272+64
+	ldrh	r2, [r2, r3, lsl #1]
+	bl	sprintf
+.LVL435:
+	add	r4, r4, r0
+.LVL436:
+.L260:
+.LBB209:
+	.loc 3 87 0
+	movs	r0, #0
+	ldr	r5, .L272+68
+	.loc 3 91 0
+	ldr	fp, .L272+84
+	.loc 3 88 0
+	movs	r7, #0
+	.loc 3 87 0
+	bl	List_get_gc_head_node
+.LVL437:
+	uxth	r3, r0
+.LVL438:
+.L262:
+	.loc 3 89 0
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L261
+	.loc 3 91 0 discriminator 2
+	ldr	r2, [fp]
+	mov	r10, #6
+	mul	r10, r10, r3
+	mov	r0, r4
+	ldr	r1, .L272+72
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp, #8]
+	ldr	r2, [r5]
+	add	r2, r2, r10
+	ldrh	r2, [r2, #4]
+	str	r2, [sp, #4]
+	ldr	r2, [r6]
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp]
+	mov	r2, r7
+	bl	sprintf
+.LVL439:
+	.loc 3 88 0 discriminator 2
+	adds	r7, r7, #1
+.LVL440:
+	.loc 3 92 0 discriminator 2
+	ldr	r3, [r5]
+	.loc 3 88 0 discriminator 2
+	cmp	r7, #16
+	.loc 3 91 0 discriminator 2
+	add	r4, r4, r0
+.LVL441:
+	.loc 3 92 0 discriminator 2
+	ldrh	r3, [r3, r10]
+.LVL442:
+	.loc 3 88 0 discriminator 2
+	bne	.L262
+.L261:
+.LBE209:
+.LBB210:
+	.loc 3 96 0
+	ldr	r3, .L272+76
+.LVL443:
+	.loc 3 97 0
+	movs	r7, #0
+.LVL444:
+	.loc 3 96 0
+	ldr	r2, [r5]
+	.loc 3 100 0
+	ldr	r10, .L272+84
+	.loc 3 96 0
+	ldr	r3, [r3]
+	.loc 3 100 0
+	ldr	fp, .L272+88
+	.loc 3 96 0
+	subs	r3, r3, r2
+	ldr	r2, .L272+80
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	uxth	r3, r3
+.LVL445:
+.L264:
+	.loc 3 98 0
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L263
+	.loc 3 100 0 discriminator 2
+	ldr	r2, [r10]
+	movs	r6, #6
+	muls	r6, r3, r6
+	mov	r0, r4
+	mov	r1, fp
+	ldrh	r2, [r2, r3, lsl #1]
+	str	r2, [sp, #4]
+	ldr	r2, [r5]
+	add	r2, r2, r6
+	ldrh	r2, [r2, #4]
+	str	r2, [sp]
+	mov	r2, r7
+	.loc 3 97 0 discriminator 2
+	adds	r7, r7, #1
+.LVL446:
+	.loc 3 100 0 discriminator 2
+	bl	sprintf
+.LVL447:
+	.loc 3 97 0 discriminator 2
+	cmp	r7, #4
+	.loc 3 100 0 discriminator 2
+	add	r4, r4, r0
+.LVL448:
+	.loc 3 97 0 discriminator 2
+	beq	.L263
+	.loc 3 101 0
+	ldr	r3, [r5]
+	ldrh	r3, [r3, r6]
+	b	.L264
+.L273:
+	.align	2
+.L272:
+	.word	.LC56
+	.word	.LC57
+	.word	.LC58
+	.word	.LC59
+	.word	.LC60
+	.word	.LANCHOR84
+	.word	.LC61
+	.word	.LANCHOR85
+	.word	.LC62
+	.word	.LANCHOR86
+	.word	.LC63
+	.word	.LANCHOR87
+	.word	.LC64
+	.word	.LC65
+	.word	.LC66
+	.word	.LANCHOR88
+	.word	.LC67
+	.word	.LANCHOR41
+	.word	.LC68
+	.word	.LANCHOR47
+	.word	-1431655765
+	.word	.LANCHOR40
+	.word	.LC69
+.LBE210:
+	.cfi_endproc
+.LFE203:
+	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
+	.section	.text.rknand_proc_ftlread,"ax",%progbits
+	.align	1
+	.global	rknand_proc_ftlread
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_proc_ftlread, %function
+rknand_proc_ftlread:
+.LFB204:
+	.loc 3 114 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL449:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 114 0
+	mov	r5, r0
+.LVL450:
+	.loc 3 120 0
+	ldr	r2, .L275
+	ldr	r1, .L275+4
+	bl	sprintf
+.LVL451:
+	adds	r4, r5, r0
+.LVL452:
+	.loc 3 122 0
+	mov	r0, r4
+	bl	FtlPrintInfo2buf
+.LVL453:
+	add	r0, r0, r4
+.LVL454:
+	.loc 3 124 0
+	subs	r0, r0, r5
+.LVL455:
+	pop	{r3, r4, r5, pc}
+.LVL456:
+.L276:
+	.align	2
+.L275:
+	.word	.LC70
+	.word	.LC71
+	.cfi_endproc
+.LFE204:
+	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
+	.section	.text.GetSwlReplaceBlock,"ax",%progbits
+	.align	1
+	.global	GetSwlReplaceBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	GetSwlReplaceBlock, %function
+GetSwlReplaceBlock:
+.LFB299:
+	.loc 2 2447 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL457:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2456 0
+	ldr	r3, .L306
+	ldr	r6, .L306+4
+	ldr	r5, [r3]
+	mov	r10, r3
+	ldr	r1, [r6]
+	cmp	r1, r5
+	bcs	.L278
+	.loc 2 2459 0
+	ldr	r2, .L306+8
+	.loc 2 2458 0
+	movs	r3, #0
+	ldr	r4, .L306+12
+	.loc 2 2459 0
+	mov	r0, r3
+	ldrh	r1, [r2]
+	.loc 2 2460 0
+	ldr	r2, .L306+16
+	.loc 2 2458 0
+	str	r3, [r4]
+.LVL458:
+	.loc 2 2460 0
+	ldr	r7, [r2]
+	.loc 2 2459 0
+	mov	r2, r3
+.LVL459:
+.L279:
+	.loc 2 2459 0 is_stmt 0 discriminator 1
+	cmp	r2, r1
+	bcc	.L280
+	cbz	r3, .L281
+	str	r0, [r4]
+.L281:
+	.loc 2 2461 0 is_stmt 1
+	ldr	r7, [r4]
+	mov	r0, r7
+	bl	__aeabi_uidiv
+.LVL460:
+	.loc 2 2462 0
+	ldr	r3, .L306+20
+	.loc 2 2461 0
+	str	r0, [r6]
+	.loc 2 2462 0
+	ldr	r0, [r3]
+	ldr	r3, .L306+24
+	subs	r0, r7, r0
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+.LVL461:
+	str	r0, [r4]
+.L282:
+	.loc 2 2468 0
+	ldr	r6, [r6]
+	add	r3, r5, #256
+	cmp	r3, r6
+	bls	.L287
+	.loc 2 2468 0 is_stmt 0 discriminator 1
+	ldr	r2, .L306+28
+	add	r3, r5, #768
+	ldr	r2, [r2]
+	cmp	r3, r2
+	bls	.L287
+.LVL462:
+.L290:
+	.loc 2 2469 0 is_stmt 1
+	movw	r4, #65535
+.L288:
+	.loc 2 2518 0
+	mov	r0, r4
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL463:
+.L280:
+	.cfi_restore_state
+	.loc 2 2460 0 discriminator 3
+	ldrh	r3, [r7, r2, lsl #1]
+	.loc 2 2459 0 discriminator 3
+	adds	r2, r2, #1
+.LVL464:
+	.loc 2 2460 0 discriminator 3
+	add	r0, r0, r3
+	movs	r3, #1
+	b	.L279
+.LVL465:
+.L278:
+	.loc 2 2463 0
+	ldr	r2, .L306+28
+	ldr	r3, [r2]
+	cmp	r1, r3
+	bls	.L282
+	.loc 2 2464 0
+	adds	r3, r3, #1
+	.loc 2 2465 0
+	ldr	r0, .L306+8
+	.loc 2 2464 0
+	str	r3, [r2]
+.LVL466:
+	.loc 2 2465 0
+	movs	r2, #0
+	.loc 2 2466 0
+	ldr	r3, .L306+16
+	ldr	r3, [r3]
+	subs	r3, r3, #2
+.LVL467:
+.L284:
+	.loc 2 2465 0 discriminator 1
+	ldrh	r1, [r0]
+	cmp	r2, r1
+	bcs	.L282
+	.loc 2 2466 0 discriminator 3
+	ldrh	r1, [r3, #2]
+	.loc 2 2465 0 discriminator 3
+	adds	r2, r2, #1
+.LVL468:
+	.loc 2 2466 0 discriminator 3
+	adds	r1, r1, #1
+	strh	r1, [r3, #2]!	@ movhi
+	b	.L284
+.LVL469:
+.L287:
+	.loc 2 2471 0
+	ldr	r3, .L306+32
+	ldrh	r0, [r3]
+	add	r0, r0, r0, lsl #1
+	ubfx	r0, r0, #2, #16
+	bl	GetFreeBlockMaxEraseCount
+.LVL470:
+	.loc 2 2472 0
+	add	r3, r5, #64
+	.loc 2 2471 0
+	mov	r2, r0
+.LVL471:
+	.loc 2 2472 0
+	cmp	r0, r3
+	bcs	.L289
+	.loc 2 2472 0 is_stmt 0 discriminator 1
+	cmp	r5, #30
+	bhi	.L290
+.L289:
+	.loc 2 2476 0 is_stmt 1
+	ldr	r3, .L306+36
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L290
+	.loc 2 2483 0
+	ldr	r1, .L306+40
+	.loc 2 2495 0
+	mov	fp, #6
+	.loc 2 2483 0
+	ldr	lr, [r1]
+	.loc 2 2484 0
+	ldr	r1, .L306+16
+	ldr	r0, [r1]
+.LVL472:
+	movw	r1, #65535
+	mov	r7, r1
+	.loc 2 2479 0
+	mov	r8, r1
+.LVL473:
+.L291:
+	ldrh	ip, [r3]
+	cmp	ip, r8
+	bne	.L294
+	mov	r4, r7
+.LVL474:
+.L293:
+	.loc 2 2498 0
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L290
+	.loc 2 2500 0
+	ldrh	r7, [r0, r4, lsl #1]
+.LVL475:
+	lsl	r8, r4, #1
+	.loc 2 2501 0
+	cmp	r5, r7
+	bcs	.L295
+	.loc 2 2503 0
+	bl	GetFreeBlockMinEraseCount
+.LVL476:
+	cmp	r5, r0
+	.loc 2 2504 0
+	it	cc
+	strcc	r1, [r10]
+.L295:
+	.loc 2 2506 0
+	cmp	r6, r7
+	bls	.L290
+	.loc 2 2506 0 is_stmt 0 discriminator 1
+	add	r3, r7, #128
+	cmp	r2, r3
+	ble	.L290
+	.loc 2 2508 0 is_stmt 1
+	add	r3, r7, #256
+	ldr	r0, .L306+28
+	cmp	r6, r3
+	bhi	.L296
+	.loc 2 2508 0 is_stmt 0 discriminator 1
+	ldr	r1, [r0]
+.LVL477:
+	add	r3, r7, #768
+	cmp	r3, r1
+	bcs	.L290
+.L296:
+	.loc 2 2510 0 is_stmt 1
+	ldr	r3, .L306+44
+	mov	r1, r4
+	str	r2, [sp, #8]
+	mov	r2, r6
+	str	r7, [sp, #4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r8]
+	str	r3, [sp]
+	ldr	r3, [r0]
+	ldr	r0, .L306+48
+	bl	printf
+.LVL478:
+	.loc 2 2511 0
+	ldr	r3, .L306+52
+	movs	r2, #1
+	str	r2, [r3]
+	.loc 2 2512 0
+	b	.L288
+.LVL479:
+.L294:
+	.loc 2 2481 0
+	ldrh	r4, [r3, #4]
+	cbz	r4, .L292
+	.loc 2 2483 0
+	ldr	r4, .L306+56
+	sub	r3, r3, lr
+.LVL480:
+	asrs	r3, r3, #1
+	muls	r3, r4, r3
+	uxth	r4, r3
+.LVL481:
+	.loc 2 2484 0
+	ldrh	r3, [r0, r4, lsl #1]
+	cmp	r5, r3
+	bcs	.L293
+	.loc 2 2489 0
+	cmp	r1, r3
+	itt	hi
+	movhi	r1, r3
+.LVL482:
+	.loc 2 2483 0
+	movhi	r7, r4
+.LVL483:
+.L292:
+	.loc 2 2495 0
+	mla	r3, fp, ip, lr
+.LVL484:
+	b	.L291
+.L307:
+	.align	2
+.L306:
+	.word	.LANCHOR78
+	.word	.LANCHOR75
+	.word	.LANCHOR5
+	.word	.LANCHOR73
+	.word	.LANCHOR40
+	.word	.LANCHOR74
+	.word	.LANCHOR14
+	.word	.LANCHOR77
+	.word	.LANCHOR48
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	.LANCHOR43
+	.word	.LC72
+	.word	.LANCHOR89
+	.word	-1431655765
+	.cfi_endproc
+.LFE299:
+	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
+	.section	.text.free_data_superblock,"ax",%progbits
+	.align	1
+	.global	free_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	free_data_superblock, %function
+free_data_superblock:
+.LFB300:
+	.loc 2 2522 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL485:
+	.loc 2 2523 0
+	movw	r2, #65535
+	.loc 2 2522 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 2523 0
+	cmp	r0, r2
+	beq	.L309
+.LVL486:
+.LBB213:
+.LBB214:
+	.loc 2 2525 0
+	ldr	r2, .L310
+	movs	r1, #0
+	ldr	r2, [r2]
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	.loc 2 2526 0
+	bl	INSERT_FREE_LIST
+.LVL487:
+.L309:
+.LBE214:
+.LBE213:
+	.loc 2 2528 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L311:
+	.align	2
+.L310:
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE300:
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.get_new_active_ppa,"ax",%progbits
+	.align	1
+	.global	get_new_active_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+.LFB303:
+	.loc 2 2655 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL488:
+	.loc 2 2659 0
+	ldrh	r2, [r0]
+	.loc 2 2655 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 2659 0
+	movw	r3, #65535
+	.loc 2 2655 0
+	mov	r4, r0
+	.loc 2 2659 0
+	cmp	r2, r3
+	bne	.L313
+	.loc 2 2659 0 is_stmt 0 discriminator 1
+	movw	r2, #2659
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+.LVL489:
+	bl	printf
+.LVL490:
+.L313:
+	.loc 2 2660 0 is_stmt 1
+	ldr	r5, .L326+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L314
+	.loc 2 2660 0 is_stmt 0 discriminator 1
+	movw	r2, #2660
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+	bl	printf
+.LVL491:
+.L314:
+	.loc 2 2661 0 is_stmt 1
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L315
+	.loc 2 2661 0 is_stmt 0 discriminator 1
+	movw	r2, #2661
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+	bl	printf
+.LVL492:
+.L315:
+	.loc 2 2663 0 is_stmt 1
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	.loc 2 2662 0
+	movs	r3, #0
+	strb	r3, [r4, #10]
+	.loc 2 2664 0
+	movw	r6, #65535
+	.loc 2 2663 0
+	adds	r2, r2, #8
+	ldrh	r0, [r4, r2, lsl #1]
+.LVL493:
+	.loc 2 2666 0
+	ldr	r2, .L326+12
+	ldrh	r1, [r2]
+	.loc 2 2668 0
+	mov	r2, r3
+.L316:
+	.loc 2 2664 0
+	cmp	r0, r6
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	beq	.L318
+	.loc 2 2673 0
+	ldrh	r2, [r4, #4]
+	.loc 2 2672 0
+	ldrh	r6, [r4, #2]
+	.loc 2 2673 0
+	subs	r2, r2, #1
+	uxth	r2, r2
+	.loc 2 2672 0
+	orr	r6, r6, r0, lsl #10
+.LVL494:
+	.loc 2 2680 0
+	movw	r0, #65535
+.LVL495:
+	.loc 2 2673 0
+	strh	r2, [r4, #4]	@ movhi
+.L320:
+	.loc 2 2675 0
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	.loc 2 2676 0
+	cmp	r1, r3
+	.loc 2 2677 0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	.loc 2 2678 0
+	moveq	r3, #0
+	.loc 2 2680 0
+	add	r7, r3, #8
+	ldrh	r7, [r4, r7, lsl #1]
+	cmp	r7, r0
+	beq	.L320
+	strb	r3, [r4, #6]
+	.loc 2 2682 0
+	ldrh	r1, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r1, r3
+	bne	.L312
+	.loc 2 2682 0 is_stmt 0 discriminator 1
+	cbz	r2, .L312
+	.loc 2 2682 0 discriminator 2
+	movw	r2, #2682
+	ldr	r1, .L326
+	ldr	r0, .L326+4
+	bl	printf
+.LVL496:
+.L312:
+	.loc 2 2684 0 is_stmt 1
+	mov	r0, r6
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL497:
+.L318:
+	.loc 2 2665 0
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	.loc 2 2666 0
+	cmp	r3, r1
+	.loc 2 2665 0
+	strb	r3, [r4, #6]
+	.loc 2 2667 0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	.loc 2 2668 0
+	strbeq	r2, [r4, #6]
+	.loc 2 2667 0
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	.loc 2 2670 0
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r0, [r4, r3, lsl #1]
+.LVL498:
+	b	.L316
+.L327:
+	.align	2
+.L326:
+	.word	.LANCHOR90
+	.word	.LC1
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.cfi_endproc
+.LFE303:
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlGcBufInit,"ax",%progbits
+	.align	1
+	.global	FtlGcBufInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+.LFB306:
+	.file 5 "drivers/rkflash/sftl_gc.c"
+	.loc 5 22 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 25 0
+	movs	r3, #0
+	.loc 5 27 0
+	ldr	r1, .L333
+	mov	fp, #1
+	.loc 5 25 0
+	ldr	r2, .L333+4
+	.loc 5 27 0
+	ldr	r5, [r1]
+	.loc 5 28 0
+	ldr	r1, .L333+8
+	.loc 5 25 0
+	str	r3, [r2]
+.LVL499:
+	.loc 5 26 0
+	ldr	r2, .L333+12
+	mov	r0, r5
+	.loc 5 28 0
+	ldr	r1, [r1]
+	.loc 5 26 0
+	ldrh	r2, [r2]
+	.loc 5 28 0
+	str	r1, [sp, #4]
+	ldr	r1, .L333+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	.loc 5 29 0
+	ldr	r1, .L333+20
+	ldr	r10, [r1]
+	ldr	r1, .L333+24
+	ldrh	r7, [r1]
+	.loc 5 30 0
+	ldr	r1, .L333+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	.loc 5 26 0
+	mov	r1, r3
+.LVL500:
+.L329:
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	.loc 5 26 0 is_stmt 0 discriminator 1
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #20
+	add	lr, r1, r6
+	bne	.L330
+	.loc 5 34 0 is_stmt 1
+	ldr	r3, .L333+32
+	.loc 5 35 0
+	mov	lr, #12
+	mov	r8, #0
+	.loc 5 34 0
+	ldr	r0, [r3]
+	.loc 5 36 0
+	ldr	r3, .L333+8
+	ldr	r4, [r3]
+	.loc 5 37 0
+	ldr	r3, .L333+20
+	ldr	ip, [r3]
+.L331:
+.LVL501:
+	.loc 5 34 0 discriminator 1
+	cmp	r2, r0
+	bcc	.L332
+	.loc 5 39 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL502:
+.L330:
+	.cfi_restore_state
+	.loc 5 28 0 discriminator 3
+	bic	r1, r1, #3
+	.loc 5 29 0 discriminator 3
+	bic	r3, r3, #3
+	.loc 5 28 0 discriminator 3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
+	.loc 5 29 0 discriminator 3
+	add	r3, r3, r10
+	.loc 5 27 0 discriminator 3
+	str	fp, [r0, #-4]
+	.loc 5 29 0 discriminator 3
+	str	r3, [r0, #-8]
+	.loc 5 28 0 discriminator 3
+	add	r6, r6, r1
+	.loc 5 31 0 discriminator 3
+	mov	r1, lr
+	.loc 5 28 0 discriminator 3
+	str	r6, [r0, #-12]
+	.loc 5 31 0 discriminator 3
+	str	r3, [r4, #-16]
+	mov	r3, ip
+	.loc 5 30 0 discriminator 3
+	str	r6, [r4, #-20]
+	b	.L329
+.LVL503:
+.L332:
+	.loc 5 36 0 discriminator 3
+	ldr	r3, [sp]
+	.loc 5 35 0 discriminator 3
+	mul	r10, lr, r2
+	.loc 5 36 0 discriminator 3
+	muls	r3, r2, r3
+	.loc 5 35 0 discriminator 3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	.loc 5 36 0 discriminator 3
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	.loc 5 37 0 discriminator 3
+	mul	r3, r2, r7
+	.loc 5 34 0 discriminator 3
+	adds	r2, r2, #1
+.LVL504:
+	uxth	r2, r2
+.LVL505:
+	.loc 5 37 0 discriminator 3
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L331
+.L334:
+	.align	2
+.L333:
+	.word	.LANCHOR92
+	.word	.LANCHOR91
+	.word	.LANCHOR93
+	.word	.LANCHOR3
+	.word	.LANCHOR23
+	.word	.LANCHOR94
+	.word	.LANCHOR24
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.cfi_endproc
+.LFE306:
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
+	.align	1
+	.global	FtlGcBufFree
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+.LFB307:
+	.loc 5 42 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL506:
+	.loc 5 47 0
+	ldr	r3, .L342
+	.loc 5 48 0
+	mov	ip, #12
+	.loc 5 42 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 46 0
+	movs	r4, #0
+	.loc 5 48 0
+	mov	fp, #20
+	.loc 5 49 0
+	mov	lr, r4
+	.loc 5 47 0
+	ldr	r7, [r3]
+	.loc 5 48 0
+	ldr	r3, .L342+4
+	ldr	r5, [r3]
+.LVL507:
+.L336:
+	uxth	r3, r4
+	.loc 5 46 0 discriminator 1
+	cmp	r1, r3
+	bls	.L335
+	.loc 5 48 0
+	mla	r8, fp, r3, r0
+	movs	r2, #0
+.L337:
+.LVL508:
+	uxth	r3, r2
+	.loc 5 47 0 discriminator 1
+	cmp	r7, r3
+	bls	.L338
+	.loc 5 48 0
+	mul	r3, ip, r3
+	ldr	r6, [r8, #8]
+	adds	r2, r2, #1
+.LVL509:
+	add	r10, r5, r3
+	ldr	r3, [r5, r3]
+	cmp	r3, r6
+	bne	.L337
+	.loc 5 49 0
+	str	lr, [r10, #8]
+.L338:
+.LVL510:
+	adds	r4, r4, #1
+.LVL511:
+	b	.L336
+.LVL512:
+.L335:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL513:
+.L343:
+	.align	2
+.L342:
+	.word	.LANCHOR96
+	.word	.LANCHOR92
+	.cfi_endproc
+.LFE307:
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
+	.align	1
+	.global	FtlGcBufAlloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+.LFB308:
+	.loc 5 57 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL514:
+	.loc 5 62 0
+	ldr	r3, .L351
+	.loc 5 61 0
+	movs	r2, #0
+	.loc 5 57 0
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 28
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 5 63 0
+	mov	ip, #12
+	.loc 5 64 0
+	movs	r7, #1
+	.loc 5 65 0
+	mov	lr, #20
+	.loc 5 62 0
+	ldr	r4, [r3]
+	.loc 5 63 0
+	ldr	r3, .L351+4
+	ldr	r5, [r3]
+.LVL515:
+.L345:
+	uxth	r8, r2
+	.loc 5 61 0 discriminator 1
+	cmp	r1, r8
+	bhi	.L349
+	.loc 5 71 0
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L349:
+	mov	r10, #0
+.L346:
+.LVL516:
+	uxth	r3, r10
+	.loc 5 62 0 discriminator 1
+	cmp	r4, r3
+	bls	.L347
+	.loc 5 63 0
+	mla	r3, ip, r3, r5
+	add	r10, r10, #1
+.LVL517:
+	ldr	r6, [r3, #8]
+	cmp	r6, #0
+	bne	.L346
+	.loc 5 65 0
+	mla	r8, lr, r8, r0
+	.loc 5 64 0
+	str	r7, [r3, #8]
+	.loc 5 65 0
+	ldr	r6, [r3]
+	.loc 5 66 0
+	ldr	r3, [r3, #4]
+	.loc 5 65 0
+	str	r6, [r8, #8]
+	.loc 5 66 0
+	str	r3, [r8, #12]
+.L347:
+.LVL518:
+	adds	r2, r2, #1
+.LVL519:
+	b	.L345
+.L352:
+	.align	2
+.L351:
+	.word	.LANCHOR96
+	.word	.LANCHOR92
+	.cfi_endproc
+.LFE308:
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
+	.align	1
+	.global	IsBlkInGcList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+.LFB309:
+	.loc 5 74 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL520:
+	.loc 5 78 0
+	ldr	r3, .L358
+	.loc 5 77 0
+	ldr	r2, .L358+4
+	.loc 5 78 0
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.LVL521:
+.L354:
+	.loc 5 77 0 discriminator 1
+	cmp	r3, r2
+	bne	.L356
+	.loc 5 81 0
+	movs	r0, #0
+.LVL522:
+	bx	lr
+.LVL523:
+.L356:
+	.loc 5 78 0
+	ldrh	r1, [r3], #2
+	cmp	r1, r0
+	bne	.L354
+	.loc 5 79 0
+	movs	r0, #1
+.LVL524:
+	.loc 5 82 0
+	bx	lr
+.L359:
+	.align	2
+.L358:
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.cfi_endproc
+.LFE309:
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
+	.align	1
+	.global	FtlGcUpdatePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+.LFB310:
+	.loc 5 85 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL525:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 5 85 0
+	mov	r5, r0
+	.loc 5 91 0
+	ldr	r4, .L364
+	.loc 5 88 0
+	ubfx	r0, r0, #10, #16
+.LVL526:
+	.loc 5 85 0
+	mov	r6, r1
+	mov	r7, r2
+	.loc 5 88 0
+	bl	P2V_block_in_plane
+.LVL527:
+	.loc 5 92 0
+	ldr	r3, .L364+4
+	.loc 5 91 0
+	ldrh	r1, [r4]
+	.loc 5 92 0
+	ldr	r2, [r3]
+	.loc 5 91 0
+	movs	r3, #0
+.LVL528:
+.L361:
+	uxth	ip, r3
+.LVL529:
+	.loc 5 91 0 is_stmt 0 discriminator 1
+	cmp	ip, r1
+	bcc	.L363
+	.loc 5 96 0 is_stmt 1
+	bne	.L362
+	.loc 5 97 0
+	strh	r0, [r2, ip, lsl #1]	@ movhi
+	.loc 5 98 0
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L362
+.L363:
+	adds	r3, r3, #1
+	.loc 5 92 0
+	add	ip, r2, r3, lsl #1
+.LVL530:
+	ldrh	ip, [ip, #-2]
+	cmp	ip, r0
+	bne	.L361
+.L362:
+	.loc 5 101 0
+	ldr	r2, .L364+8
+	movs	r0, #12
+.LVL531:
+	ldr	r1, .L364+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
+	muls	r0, r3, r0
+	.loc 5 107 0
+	adds	r3, r3, #1
+	.loc 5 101 0
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	.loc 5 102 0
+	str	r7, [r4, #8]
+	.loc 5 103 0
+	str	r5, [r1, r0]
+	.loc 5 107 0
+	strh	r3, [r2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL532:
+.L365:
+	.align	2
+.L364:
+	.word	.LANCHOR98
+	.word	.LANCHOR97
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.cfi_endproc
+.LFE310:
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+.LFB317:
+	.loc 5 345 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL533:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 5 347 0
+	mov	r1, r0
+	.loc 5 345 0
+	mov	r4, r0
+	.loc 5 347 0
+	ldr	r0, .L369
+.LVL534:
+	bl	printf
+.LVL535:
+	.loc 5 349 0
+	ldr	r0, .L369+4
+	ldrh	r5, [r0]
+	cmp	r4, r5
+	beq	.L367
+	.loc 5 349 0 is_stmt 0 discriminator 1
+	ldr	r3, .L369+8
+	ldrh	r1, [r3]
+	cmp	r4, r1
+	beq	.L367
+	.loc 5 351 0 is_stmt 1
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L368
+	.loc 5 352 0
+	strh	r4, [r0]	@ movhi
+.L367:
+	.loc 5 356 0
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L368:
+	.loc 5 353 0
+	cmp	r1, r2
+	.loc 5 354 0
+	it	eq
+	strheq	r4, [r3]	@ movhi
+	b	.L367
+.L370:
+	.align	2
+.L369:
+	.word	.LC73
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.cfi_endproc
+.LFE317:
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcMarkBadPhyBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+.LFB318:
+	.loc 5 359 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL536:
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 5 359 0
+	mov	r5, r0
+	.loc 5 364 0
+	ldr	r4, .L375
+	.loc 5 361 0
+	bl	P2V_block_in_plane
+.LVL537:
+	.loc 5 364 0
+	mov	r2, r5
+	.loc 5 361 0
+	mov	r6, r0
+.LVL538:
+	.loc 5 364 0
+	ldrh	r1, [r4]
+	ldr	r0, .L375+4
+	bl	printf
+.LVL539:
+	.loc 5 366 0
+	mov	r0, r6
+	bl	FtlGcRefreshBlock
+.LVL540:
+	.loc 5 368 0
+	ldrh	r3, [r4]
+	movs	r2, #0
+	.loc 5 369 0
+	ldr	r0, .L375+8
+.LVL541:
+.L372:
+	.loc 5 368 0 discriminator 1
+	uxth	r1, r2
+	cmp	r3, r1
+	bhi	.L374
+	.loc 5 372 0
+	cmp	r3, #15
+	.loc 5 373 0
+	itttt	ls
+	addls	r2, r3, #1
+.LVL542:
+	strhls	r2, [r4]	@ movhi
+	ldrls	r2, .L375+8
+	strhls	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L373
+.LVL543:
+.L374:
+	adds	r2, r2, #1
+.LVL544:
+	.loc 5 369 0
+	add	r1, r0, r2, lsl #1
+.LVL545:
+	ldrh	r1, [r1, #-2]
+	cmp	r1, r5
+	bne	.L372
+.L373:
+	.loc 5 375 0
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.LVL546:
+.L376:
+	.align	2
+.L375:
+	.word	.LANCHOR103
+	.word	.LC74
+	.word	.LANCHOR104
+	.cfi_endproc
+.LFE318:
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcReFreshBadBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+.LFB319:
+	.loc 5 379 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 380 0
+	ldr	r3, .L383
+	.loc 5 379 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 5 380 0
+	ldrh	r3, [r3]
+	cbz	r3, .L378
+	.loc 5 380 0 is_stmt 0 discriminator 1
+	ldr	r2, .L383+4
+	ldrh	r1, [r2]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L378
+	.loc 5 381 0 is_stmt 1
+	ldr	r4, .L383+8
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	.loc 5 382 0
+	itt	cs
+	movcs	r3, #0
+	strhcs	r3, [r4]	@ movhi
+.LBB217:
+.LBB218:
+	.loc 5 383 0
+	ldr	r3, .L383+12
+	ldrh	r2, [r4]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+.LVL547:
+	bl	FtlGcRefreshBlock
+.LVL548:
+	.loc 5 384 0
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+.L378:
+.LBE218:
+.LBE217:
+	.loc 5 387 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L384:
+	.align	2
+.L383:
+	.word	.LANCHOR103
+	.word	.LANCHOR101
+	.word	.LANCHOR105
+	.word	.LANCHOR104
+	.cfi_endproc
+.LFE319:
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+.LFB340:
+	.loc 1 24 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL549:
+	.loc 1 25 0
+	movs	r1, #0
+	b	kmalloc
+.LVL550:
+	.cfi_endproc
+.LFE340:
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+.LFB341:
+	.loc 1 29 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL551:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 36 0
+	movs	r6, #0
+	.loc 1 29 0
+	mov	fp, r0
+	mov	r7, r1
+.LVL552:
+	mov	r8, r2
+	mov	r10, r3
+	.loc 1 35 0
+	mov	r5, r6
+	.loc 1 36 0
+	mov	r4, r6
+.LVL553:
+.L387:
+	.loc 1 36 0 is_stmt 0 discriminator 1
+	cmp	r4, r10
+	bcc	.L393
+	.loc 1 51 0 is_stmt 1
+	ldr	r0, .L396
+	.loc 1 52 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 11
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL554:
+	.loc 1 51 0
+	b	printf
+.LVL555:
+.L393:
+	.cfi_restore_state
+	.loc 1 37 0
+	cbnz	r5, .L388
+	.loc 1 38 0
+	mov	r2, r6
+	mov	r1, fp
+	ldr	r0, .L396+4
+	bl	printf
+.LVL556:
+.L388:
+	.loc 1 40 0
+	cmp	r8, #4
+	bne	.L389
+	.loc 1 41 0
+	ldr	r1, [r7, r4, lsl #2]
+.L395:
+	.loc 1 43 0
+	ldr	r0, .L396+8
+.L394:
+	.loc 1 46 0
+	adds	r5, r5, #1
+.LVL557:
+	.loc 1 45 0
+	bl	printf
+.LVL558:
+	.loc 1 46 0
+	cmp	r5, #15
+	bls	.L392
+.LVL559:
+	.loc 1 47 0
+	movs	r5, #0
+	.loc 1 48 0
+	ldr	r0, .L396
+	bl	printf
+.LVL560:
+.L392:
+	.loc 1 36 0 discriminator 2
+	adds	r4, r4, #1
+.LVL561:
+	add	r6, r6, r8
+	b	.L387
+.L389:
+	.loc 1 42 0
+	cmp	r8, #2
+	bne	.L391
+	.loc 1 43 0
+	ldrsh	r1, [r7, r4, lsl #1]
+	b	.L395
+.L391:
+	.loc 1 45 0
+	ldrb	r1, [r7, r4]	@ zero_extendqisi2
+	ldr	r0, .L396+12
+	b	.L394
+.L397:
+	.align	2
+.L396:
+	.word	.LC78
+	.word	.LC75
+	.word	.LC76
+	.word	.LC77
+	.cfi_endproc
+.LFE341:
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+.LFB343:
+	.loc 1 81 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL562:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 81 0
+	mov	r8, r1
+	.loc 1 83 0
+	ldr	r3, .L416
+	mov	r4, r0
+	.loc 1 87 0
+	movs	r5, #0
+	.loc 1 88 0
+	ldr	fp, .L416+12
+	.loc 1 83 0
+	ldrh	r2, [r3, #12]
+.LVL563:
+	mov	r10, r3
+	str	r2, [sp, #4]
+.LVL564:
+.L399:
+	.loc 1 87 0 discriminator 1
+	cmp	r5, r8
+	bne	.L406
+	.loc 1 108 0
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL565:
+.L406:
+	.cfi_restore_state
+	.loc 1 88 0
+	ldr	r3, [r4, #8]
+	cbz	r3, .L400
+	.loc 1 88 0 is_stmt 0 discriminator 2
+	ldr	r3, [r4, #12]
+	cbnz	r3, .L401
+.L400:
+	.loc 1 88 0 discriminator 3
+	movs	r2, #88
+	ldr	r1, .L416+4
+	mov	r0, fp
+	bl	printf
+.LVL566:
+.L401:
+	.loc 1 90 0 is_stmt 1
+	ldr	r6, .L416+8
+	.loc 1 89 0
+	add	r2, sp, #8
+	add	r1, sp, #12
+	ldr	r0, [r4, #4]
+	bl	l2p_addr_tran.isra.0
+.LVL567:
+	.loc 1 90 0
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #8]
+	ldr	r1, [sp, #12]
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	ldr	r7, [r6, #12]
+	blx	r7
+.LVL568:
+	.loc 1 95 0
+	ldrh	r3, [r10, #14]
+	.loc 1 94 0
+	str	r0, [r4]
+	.loc 1 95 0
+	cmp	r3, #4
+	bne	.L403
+	.loc 1 96 0
+	ldr	r0, [sp, #4]
+.LVL569:
+	ldr	r3, [r4, #12]
+	ldr	r2, [r4, #8]
+	ldr	r1, [sp, #12]
+	ldr	r6, [r6, #12]
+	adds	r3, r3, #8
+	add	r2, r2, #2048
+	add	r1, r1, r0
+	ldrb	r0, [sp, #8]	@ zero_extendqisi2
+	blx	r6
+.LVL570:
+	.loc 1 100 0
+	adds	r0, r0, #1
+.LVL571:
+	beq	.L404
+	.loc 1 101 0 discriminator 1
+	ldr	r3, [r4, #12]
+	.loc 1 100 0 discriminator 1
+	ldr	r2, [r3, #12]
+	adds	r2, r2, #1
+	bne	.L403
+	.loc 1 101 0
+	ldr	r2, [r3, #8]
+	adds	r2, r2, #1
+	bne	.L403
+	.loc 1 102 0
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L403
+.L404:
+	.loc 1 104 0
+	mov	r3, #-1
+	str	r3, [r4]
+.LVL572:
+.L403:
+	.loc 1 87 0 discriminator 2
+	adds	r5, r5, #1
+.LVL573:
+	adds	r4, r4, #20
+	b	.L399
+.L417:
+	.align	2
+.L416:
+	.word	.LANCHOR0
+	.word	.LANCHOR106
+	.word	.LANCHOR107
+	.word	.LC1
+	.cfi_endproc
+.LFE343:
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadFactoryBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+.LFB233:
+	.loc 4 279 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 4 286 0
+	ldr	r3, .L428
+	.loc 4 279 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 289 0
+	movs	r6, #0
+	.loc 4 286 0
+	ldr	r5, .L428+4
+	ldr	r3, [r3]
+	ldr	r7, .L428+8
+	.loc 4 291 0
+	ldr	r10, .L428+20
+	.loc 4 286 0
+	str	r3, [r5, #8]
+	.loc 4 287 0
+	ldr	r3, .L428+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.LVL574:
+.L419:
+	.loc 4 289 0 discriminator 1
+	ldr	r3, .L428+16
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L424
+	.loc 4 314 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL575:
+.L424:
+	.loc 4 291 0
+	ldrh	r4, [r10]
+	.loc 4 290 0
+	movw	r3, #65535
+	.loc 4 294 0
+	ldr	fp, .L428+4
+	.loc 4 290 0
+	strh	r3, [r7, #2]!	@ movhi
+	.loc 4 291 0
+	subs	r4, r4, #1
+	uxth	r4, r4
+.LVL576:
+.L420:
+	.loc 4 291 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L422
+.LVL577:
+	.loc 4 292 0 is_stmt 1
+	mla	r3, r6, r3, r4
+.LVL578:
+	.loc 4 294 0
+	movs	r2, #1
+.LVL579:
+	mov	r1, r2
+	mov	r0, fp
+	.loc 4 292 0
+	lsls	r3, r3, #10
+	.loc 4 293 0
+	str	r3, [r5, #4]
+	.loc 4 294 0
+	bl	FlashReadPages
+.LVL580:
+	.loc 4 295 0
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L421
+	.loc 4 301 0
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L421
+	.loc 4 303 0
+	strh	r4, [r7]	@ movhi
+.L422:
+	.loc 4 289 0 discriminator 2
+	adds	r6, r6, #1
+.LVL581:
+	b	.L419
+.L421:
+	.loc 4 291 0 discriminator 2
+	subs	r4, r4, #1
+.LVL582:
+	uxth	r4, r4
+.LVL583:
+	b	.L420
+.L429:
+	.align	2
+.L428:
+	.word	.LANCHOR39
+	.word	.LANCHOR108
+	.word	.LANCHOR37+10
+	.word	.LANCHOR109
+	.word	.LANCHOR10
+	.word	.LANCHOR17
+	.cfi_endproc
+.LFE233:
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	.align	1
+	.global	FtlGetLastWrittenPage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+.LFB239:
+	.loc 2 47 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL584:
+	.loc 2 51 0
+	cmp	r1, #1
+	.loc 2 47 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 51 0
+	it	eq
+	ldreq	r3, .L439
+	.loc 2 47 0
+	sub	sp, sp, #88
+	.cfi_def_cfa_offset 112
+	.loc 2 57 0
+	lsl	r7, r0, #10
+	.loc 2 58 0
+	mov	r2, r1
+	.loc 2 51 0
+	it	ne
+	ldrne	r3, .L439+4
+	.loc 2 47 0
+	mov	r6, r1
+	.loc 2 58 0
+	add	r0, sp, #4
+.LVL585:
+	movs	r1, #1
+.LVL586:
+	.loc 2 51 0
+	ldrh	r5, [r3]
+.LVL587:
+	.loc 2 53 0
+	ldr	r3, .L439+8
+	.loc 2 56 0
+	subs	r5, r5, #1
+.LVL588:
+	sxth	r5, r5
+.LVL589:
+	.loc 2 53 0
+	str	r3, [sp, #12]
+	.loc 2 54 0
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+.LVL590:
+	.loc 2 57 0
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	.loc 2 58 0
+	bl	FlashReadPages
+.LVL591:
+	.loc 2 59 0
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L433
+	mov	r8, #0
+.LVL592:
+.L434:
+	.loc 2 60 0
+	cmp	r8, r5
+	ble	.L437
+.LVL593:
+.L433:
+	.loc 2 73 0
+	mov	r0, r5
+	add	sp, sp, #88
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL594:
+.L437:
+	.cfi_restore_state
+	.loc 2 61 0
+	add	r3, r8, r5
+	.loc 2 63 0
+	mov	r2, r6
+	.loc 2 61 0
+	add	r3, r3, r3, lsr #31
+	.loc 2 63 0
+	movs	r1, #1
+	add	r0, sp, #4
+	.loc 2 61 0
+	asrs	r4, r3, #1
+.LVL595:
+	.loc 2 62 0
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	.loc 2 63 0
+	bl	FlashReadPages
+.LVL596:
+	.loc 2 65 0
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	bne	.L435
+	.loc 2 65 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	bne	.L435
+	.loc 2 66 0 is_stmt 1
+	subs	r4, r4, #1
+.LVL597:
+	sxth	r5, r4
+.LVL598:
+	b	.L434
+.LVL599:
+.L435:
+	.loc 2 68 0
+	adds	r4, r4, #1
+.LVL600:
+	sxth	r8, r4
+.LVL601:
+	b	.L434
+.L440:
+	.align	2
+.L439:
+	.word	.LANCHOR20
+	.word	.LANCHOR19
+	.word	ftl_temp_buf
+	.cfi_endproc
+.LFE239:
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FlashProgPages,"ax",%progbits
+	.align	1
+	.global	FlashProgPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashProgPages, %function
+FlashProgPages:
+.LFB344:
+	.loc 1 111 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL602:
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 1 111 0
+	str	r3, [sp]
+	mov	r10, r1
+	mov	r7, r2
+	mov	r4, r0
+	.loc 1 113 0
+	ldr	r3, .L471
+.LVL603:
+	.loc 1 117 0
+	mov	r5, r0
+	movs	r6, #0
+	.loc 1 113 0
+	ldrh	r8, [r3, #12]
+.LVL604:
+	str	r3, [sp, #4]
+.LVL605:
+.L442:
+	.loc 1 117 0 discriminator 1
+	cmp	r6, r10
+	bne	.L450
+	.loc 1 138 0
+	ldr	r3, [sp]
+	cmp	r3, #0
+	bne	.L457
+.LVL606:
+.L470:
+	.loc 1 168 0
+	movs	r0, #0
+	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL607:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL608:
+.L450:
+	.cfi_restore_state
+	.loc 1 118 0
+	ldr	r3, [r5, #8]
+	cbz	r3, .L443
+	.loc 1 118 0 is_stmt 0 discriminator 2
+	ldr	r3, [r5, #12]
+	cbnz	r3, .L444
+.L443:
+	.loc 1 118 0 discriminator 3
+	movs	r2, #118
+	ldr	r1, .L471+4
+	ldr	r0, .L471+8
+	bl	printf
+.LVL609:
+.L444:
+	.loc 1 119 0 is_stmt 1
+	add	r2, sp, #12
+	add	r1, sp, #16
+	ldr	r0, [r5, #4]
+	bl	l2p_addr_tran.isra.0
+.LVL610:
+	.loc 1 120 0
+	ldr	r3, .L471+12
+	ldr	r2, [r5, #8]
+	ldr	r1, [sp, #16]
+	ldr	fp, [r3, #8]
+	ldrb	r0, [sp, #12]	@ zero_extendqisi2
+	ldr	r3, [r5, #12]
+	blx	fp
+.LVL611:
+	.loc 1 125 0
+	cbnz	r0, .L445
+	.loc 1 124 0
+	str	r0, [r5]
+.L446:
+	.loc 1 128 0
+	ldr	r3, [sp, #4]
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L448
+	.loc 1 129 0
+	ldr	r1, .L471+12
+	ldr	r3, [r5, #12]
+	ldr	r2, [r5, #8]
+	ldr	fp, [r1, #8]
+	ldr	r1, [sp, #16]
+	adds	r3, r3, #8
+	add	r2, r2, #2048
+	ldrb	r0, [sp, #12]	@ zero_extendqisi2
+.LVL612:
+	add	r1, r1, r8
+	blx	fp
+.LVL613:
+	.loc 1 133 0
+	cbz	r0, .L448
+	.loc 1 134 0
+	mov	r3, #-1
+	str	r3, [r5]
+.L448:
+	.loc 1 117 0 discriminator 2
+	adds	r6, r6, #1
+.LVL614:
+	adds	r5, r5, #20
+	b	.L442
+.L445:
+	.loc 1 126 0
+	mov	r3, #-1
+	str	r3, [r5]
+	b	.L446
+.LVL615:
+.L455:
+.LBB219:
+	.loc 1 143 0
+	movs	r3, #0
+	.loc 1 149 0
+	mov	r2, r7
+	.loc 1 143 0
+	str	r3, [r8]
+	.loc 1 149 0
+	movs	r1, #1
+	.loc 1 144 0
+	str	r3, [r10]
+	.loc 1 149 0
+	add	r0, sp, #20
+	.loc 1 145 0
+	ldr	r3, [r4, #4]
+	.loc 1 146 0
+	str	r8, [sp, #28]
+	.loc 1 147 0
+	str	r10, [sp, #32]
+	.loc 1 145 0
+	str	r3, [sp, #24]
+	.loc 1 149 0
+	bl	FlashReadPages
+.LVL616:
+	.loc 1 150 0
+	ldr	fp, [sp, #20]
+	cmp	fp, #-1
+	bne	.L452
+	.loc 1 151 0
+	ldr	r1, [r4, #4]
+	ldr	r0, .L471+16
+	bl	printf
+.LVL617:
+	.loc 1 152 0
+	str	fp, [r4]
+.L452:
+	.loc 1 154 0
+	ldr	r3, [r4, #12]
+	cbz	r3, .L453
+	.loc 1 155 0
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	cmp	r2, r3
+	beq	.L453
+	.loc 1 156 0
+	ldr	r1, [r4, #4]
+	ldr	r0, .L471+20
+	bl	printf
+.LVL618:
+	.loc 1 157 0
+	mov	r3, #-1
+	str	r3, [r4]
+.L453:
+	.loc 1 160 0
+	ldr	r3, [r4, #8]
+	cbz	r3, .L454
+	.loc 1 161 0
+	ldr	r2, [r3]
+	ldr	r3, [r8]
+	cmp	r2, r3
+	beq	.L454
+	.loc 1 162 0
+	ldr	r1, [r4, #4]
+	ldr	r0, .L471+24
+	bl	printf
+.LVL619:
+	.loc 1 163 0
+	mov	r3, #-1
+	str	r3, [r4]
+.L454:
+.LBE219:
+	.loc 1 140 0 discriminator 2
+	adds	r5, r5, #1
+.LVL620:
+	adds	r4, r4, #20
+.LVL621:
+.L451:
+	.loc 1 140 0 is_stmt 0 discriminator 1
+	cmp	r6, r5
+	bne	.L455
+	b	.L470
+.LVL622:
+.L457:
+	movs	r5, #0
+.LBB220:
+	.loc 1 143 0 is_stmt 1
+	ldr	r8, .L471+28
+.LVL623:
+	.loc 1 144 0
+	ldr	r10, .L471+32
+.LVL624:
+	b	.L451
+.L472:
+	.align	2
+.L471:
+	.word	.LANCHOR0
+	.word	.LANCHOR110
+	.word	.LC1
+	.word	.LANCHOR107
+	.word	.LC79
+	.word	.LC80
+	.word	.LC81
+	.word	check_buf
+	.word	.LANCHOR111
+.LBE220:
+	.cfi_endproc
+.LFE344:
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashEraseBlocks,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlocks
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+.LFB345:
+	.loc 1 171 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL625:
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 171 0
+	mov	r7, r2
+	.loc 1 174 0
+	ldr	r5, .L484
+	adds	r4, r0, #4
+	.loc 1 177 0
+	movs	r6, #0
+	.loc 1 179 0
+	ldr	r10, .L484+4
+	.loc 1 174 0
+	ldrh	r8, [r5, #12]
+.LVL626:
+.L474:
+	.loc 1 177 0 discriminator 1
+	cmp	r6, r7
+	bne	.L480
+	.loc 1 190 0
+	movs	r0, #0
+	add	sp, sp, #12
+	.cfi_remember_state
+	.cfi_def_cfa_offset 28
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.LVL627:
+.L480:
+	.cfi_restore_state
+	.loc 1 178 0
+	add	r1, sp, #4
+	mov	r2, sp
+	ldr	r0, [r4]
+	bl	l2p_addr_tran.isra.0
+.LVL628:
+	.loc 1 179 0
+	ldr	r3, [r10, #4]
+	ldr	r1, [sp, #4]
+	ldrb	r0, [sp]	@ zero_extendqisi2
+	blx	r3
+.LVL629:
+	.loc 1 181 0
+	cbnz	r0, .L475
+	.loc 1 180 0
+	str	r0, [r4, #-4]
+.L476:
+	.loc 1 183 0
+	ldrh	r3, [r5, #14]
+	cmp	r3, #4
+	bne	.L478
+	.loc 1 184 0
+	ldr	r1, [sp, #4]
+	ldr	r3, [r10, #4]
+	ldrb	r0, [sp]	@ zero_extendqisi2
+.LVL630:
+	add	r1, r1, r8
+	blx	r3
+.LVL631:
+	.loc 1 185 0
+	cbz	r0, .L478
+	.loc 1 186 0
+	mov	r3, #-1
+	str	r3, [r4, #-4]
+.L478:
+	.loc 1 177 0 discriminator 2
+	adds	r6, r6, #1
+.LVL632:
+	adds	r4, r4, #20
+	b	.L474
+.L475:
+	.loc 1 182 0
+	mov	r3, #-1
+	str	r3, [r4, #-4]
+	b	.L476
+.L485:
+	.align	2
+.L484:
+	.word	.LANCHOR0
+	.word	.LANCHOR107
+	.cfi_endproc
+.LFE345:
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueIn
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+.LFB243:
+	.loc 2 98 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL633:
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 98 0
+	mov	r5, r0
+.LBB221:
+.LBB222:
+	.loc 2 94 0
+	ldr	r4, .L495
+.LBE222:
+.LBE221:
+	.loc 2 99 0
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1024
+	beq	.L486
+.LVL634:
+.LBB223:
+	.loc 2 101 0
+	cbz	r1, .L488
+.LBB224:
+	.loc 2 102 0
+	bl	P2V_block_in_plane
+.LVL635:
+	.loc 2 103 0
+	ldr	r3, .L495+4
+	.loc 2 102 0
+	mov	r6, r0
+.LVL636:
+	.loc 2 104 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 103 0
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
+	str	r3, [r0, #4]
+	.loc 2 104 0
+	bl	FlashEraseBlocks
+.LVL637:
+	.loc 2 105 0
+	ldr	r3, .L495+8
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	.loc 2 106 0
+	ldr	r2, .L495+12
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.LVL638:
+.L488:
+.LBE224:
+	.loc 2 108 0
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	.loc 2 109 0
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	.loc 2 110 0
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	.loc 2 109 0
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	.loc 2 110 0
+	strh	r3, [r4, #4]	@ movhi
+.LVL639:
+.L486:
+	pop	{r4, r5, r6, pc}
+.L496:
+	.align	2
+.L495:
+	.word	.LANCHOR38
+	.word	.LANCHOR112
+	.word	.LANCHOR40
+	.word	.LANCHOR76
+.LBE223:
+	.cfi_endproc
+.LFE243:
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlLowFormatEraseBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+.LFB212:
+	.loc 3 528 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL640:
+	.loc 3 538 0
+	ldr	r3, .L540
+	.loc 3 528 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 3 540 0
+	ldr	r6, .L540+4
+	.loc 3 539 0
+	mov	fp, #0
+	.loc 3 536 0
+	mov	r5, fp
+	.loc 3 537 0
+	mov	r4, fp
+	.loc 3 538 0
+	str	r0, [r3]
+.LVL641:
+	.loc 3 540 0
+	mov	r10, #20
+	.loc 3 539 0
+	ldr	r3, .L540+8
+	.loc 3 540 0
+	ldr	r8, [r6]
+	.loc 3 528 0
+	str	r0, [sp, #4]
+	.loc 3 539 0
+	ldrh	r3, [r3]
+	.loc 3 528 0
+	str	r1, [sp]
+	.loc 3 539 0
+	str	r3, [sp, #8]
+	.loc 3 550 0
+	ldr	r3, .L540+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	.loc 3 551 0
+	ldr	r3, .L540+16
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L540+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #20]
+.LVL642:
+.L498:
+	.loc 3 539 0 discriminator 1
+	ldr	r3, [sp, #8]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L502
+	.loc 3 559 0
+	cmp	r5, #0
+	beq	.L497
+	.loc 3 562 0
+	mov	r0, r8
+	.loc 3 563 0
+	movs	r7, #0
+	.loc 3 564 0
+	mov	r8, #20
+	.loc 3 562 0
+	mov	r2, r5
+	movs	r1, #0
+	bl	FlashEraseBlocks
+.LVL643:
+.L505:
+	.loc 3 563 0 discriminator 1
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L507
+	.loc 3 571 0
+	ldr	r3, [sp]
+	cmp	r3, #0
+	beq	.L523
+.LVL644:
+	.loc 3 573 0
+	ldr	r3, .L540+24
+	.loc 3 572 0
+	mov	r8, #1
+	.loc 3 573 0
+	ldrh	r10, [r3]
+.LVL645:
+	.loc 3 574 0
+	lsr	r3, r10, #2
+	str	r3, [sp, #12]
+.LVL646:
+.L508:
+	movs	r6, #0
+.LVL647:
+.L517:
+	.loc 3 578 0
+	ldr	r3, .L540+8
+	mov	fp, #0
+	.loc 3 577 0
+	mov	r5, fp
+	.loc 3 578 0
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	.loc 3 579 0
+	ldr	r3, .L540+4
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	.loc 3 587 0
+	ldr	r3, .L540+28
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	.loc 3 588 0
+	ldr	r3, .L540+12
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, .L540+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.LVL648:
+.L509:
+	.loc 3 578 0 discriminator 1
+	ldr	r3, [sp, #16]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L512
+	.loc 3 593 0
+	cbz	r5, .L497
+	.loc 3 598 0
+	ldr	fp, .L540+4
+.LVL649:
+	.loc 3 596 0
+	movs	r3, #1
+	mov	r2, r8
+.LVL650:
+	mov	r1, r5
+	ldr	r0, [sp, #8]
+	.loc 3 597 0
+	movs	r7, #0
+	.loc 3 596 0
+	bl	FlashProgPages
+.LVL651:
+	.loc 3 598 0
+	movs	r3, #20
+.LVL652:
+.L514:
+	.loc 3 597 0 discriminator 1
+	uxth	r2, r7
+	cmp	r5, r2
+	bhi	.L516
+	.loc 3 604 0
+	ldr	r3, [sp, #12]
+	add	r6, r6, r3
+.LVL653:
+	uxth	r6, r6
+.LVL654:
+	.loc 3 605 0
+	cmp	r10, r6
+	bhi	.L517
+	.loc 3 611 0 discriminator 1
+	ldr	r7, .L540+4
+.LVL655:
+	movs	r6, #0
+.LVL656:
+	mov	r10, #20
+.LVL657:
+.L518:
+	.loc 3 610 0 discriminator 1
+	uxth	r3, r6
+	cmp	r5, r3
+	bhi	.L520
+	.loc 3 615 0
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L521
+	.loc 3 615 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp]
+	cbz	r3, .L497
+.L521:
+	.loc 3 616 0 is_stmt 1
+	ldr	r3, .L540+4
+	mov	r2, r5
+	mov	r1, r8
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.LVL658:
+.L497:
+	.loc 3 619 0
+	mov	r0, r4
+	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL659:
+.L502:
+	.cfi_restore_state
+	.loc 3 540 0
+	mul	r2, r10, fp
+	movs	r3, #0
+	.loc 3 541 0
+	ldr	r1, [sp, #4]
+	.loc 3 540 0
+	str	r3, [r8, r2]
+	.loc 3 541 0
+	ldr	r3, .L540+32
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL660:
+	.loc 3 543 0
+	ldr	r3, [sp]
+	.loc 3 541 0
+	mov	r7, r0
+.LVL661:
+	.loc 3 543 0
+	cbz	r3, .L499
+	.loc 3 544 0
+	bl	IsBlkInVendorPart
+.LVL662:
+	cbnz	r0, .L500
+.L499:
+	.loc 3 548 0
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+.LVL663:
+	cbnz	r0, .L501
+	.loc 3 549 0
+	mla	r1, r10, r5, r8
+	.loc 3 550 0
+	ldr	r3, [sp, #12]
+	.loc 3 549 0
+	lsls	r7, r7, #10
+	.loc 3 550 0
+	str	r3, [r1, #8]
+	.loc 3 551 0
+	ldr	r3, [sp, #20]
+	.loc 3 549 0
+	str	r7, [r1, #4]
+	.loc 3 551 0
+	mul	r2, r3, r5
+	ldr	r3, [sp, #16]
+	.loc 3 552 0
+	adds	r5, r5, #1
+.LVL664:
+	uxth	r5, r5
+.LVL665:
+	.loc 3 551 0
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L500:
+.LVL666:
+	add	fp, fp, #1
+.LVL667:
+	b	.L498
+.LVL668:
+.L501:
+	.loc 3 554 0
+	adds	r4, r4, #1
+.LVL669:
+	uxth	r4, r4
+.LVL670:
+	b	.L500
+.LVL671:
+.L507:
+	.loc 3 564 0
+	mul	r3, r8, r7
+	ldr	r2, [r6]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	adds	r3, r3, #1
+	bne	.L506
+	.loc 3 566 0
+	ldr	r0, [r1, #4]
+	.loc 3 565 0
+	adds	r4, r4, #1
+.LVL672:
+	uxth	r4, r4
+.LVL673:
+	.loc 3 566 0
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.LVL674:
+.L506:
+	adds	r7, r7, #1
+.LVL675:
+	b	.L505
+.LVL676:
+.L523:
+	.loc 3 533 0
+	movs	r3, #6
+	.loc 3 534 0
+	ldr	r8, [sp]
+	.loc 3 533 0
+	str	r3, [sp, #12]
+	.loc 3 531 0
+	mov	r10, #1
+	b	.L508
+.LVL677:
+.L512:
+	.loc 3 579 0
+	movs	r3, #20
+	mul	r2, r3, fp
+	ldr	r3, [sp, #8]
+	mov	r1, r3
+	movs	r3, #0
+	str	r3, [r1, r2]
+	.loc 3 580 0
+	ldr	r3, .L540+32
+	ldr	r1, [sp, #4]
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL678:
+	.loc 3 581 0
+	ldr	r3, [sp]
+	.loc 3 580 0
+	mov	r7, r0
+.LVL679:
+	.loc 3 581 0
+	cbz	r3, .L510
+	.loc 3 582 0
+	bl	IsBlkInVendorPart
+.LVL680:
+	cbnz	r0, .L511
+.L510:
+	.loc 3 585 0
+	mov	r0, r7
+	bl	FtlBbmIsBadBlock
+.LVL681:
+	cbnz	r0, .L511
+	.loc 3 586 0
+	ldr	r3, [sp, #8]
+	movs	r2, #20
+	add	r7, r6, r7, lsl #10
+	mla	r1, r2, r5, r3
+	.loc 3 587 0
+	ldr	r3, [sp, #20]
+	str	r3, [r1, #8]
+	.loc 3 588 0
+	ldr	r3, [sp, #28]
+	.loc 3 586 0
+	str	r7, [r1, #4]
+	.loc 3 588 0
+	mul	r2, r3, r5
+	ldr	r3, [sp, #24]
+	.loc 3 589 0
+	adds	r5, r5, #1
+.LVL682:
+	uxth	r5, r5
+.LVL683:
+	.loc 3 588 0
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L511:
+.LVL684:
+	add	fp, fp, #1
+.LVL685:
+	b	.L509
+.LVL686:
+.L516:
+	.loc 3 598 0
+	mul	r2, r3, r7
+	ldr	r1, [fp]
+	adds	r0, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L515
+	.loc 3 600 0
+	ldr	r0, [r0, #4]
+	.loc 3 599 0
+	adds	r4, r4, #1
+.LVL687:
+	str	r3, [sp, #8]
+	uxth	r4, r4
+.LVL688:
+	.loc 3 600 0
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.LVL689:
+	ldr	r3, [sp, #8]
+.L515:
+.LVL690:
+	adds	r7, r7, #1
+.LVL691:
+	b	.L514
+.LVL692:
+.L520:
+	.loc 3 611 0
+	ldr	r3, [sp]
+	cbz	r3, .L519
+	.loc 3 611 0 is_stmt 0 discriminator 1
+	mul	r3, r10, r6
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L519
+	.loc 3 612 0 is_stmt 1
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.LVL693:
+.L519:
+	adds	r6, r6, #1
+.LVL694:
+	b	.L518
+.L541:
+	.align	2
+.L540:
+	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR3
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.word	.LANCHOR24
+	.word	.LANCHOR20
+	.word	.LANCHOR116
+	.word	.LANCHOR13
+	.cfi_endproc
+.LFE212:
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memset, %function
+ftl_memset:
+.LFB348:
+	.loc 1 238 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL695:
+	.loc 1 239 0
+	b	memset
+.LVL696:
+	.cfi_endproc
+.LFE348:
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",%progbits
+	.align	1
+	.global	FtlMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMemInit, %function
+FtlMemInit:
+.LFB209:
+	.loc 3 279 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 282 0
+	movs	r1, #0
+	ldr	r3, .L644
+	.loc 3 311 0
+	mov	r8, #12
+	.loc 3 297 0
+	ldr	r2, .L644+4
+	.loc 3 282 0
+	str	r1, [r3]
+	.loc 3 283 0
+	ldr	r3, .L644+8
+	.loc 3 310 0
+	ldr	r4, .L644+12
+	.loc 3 307 0
+	str	r1, [sp, #4]
+	.loc 3 283 0
+	str	r1, [r3]
+	.loc 3 284 0
+	ldr	r3, .L644+16
+	.loc 3 310 0
+	ldrh	r0, [r4]
+	.loc 3 312 0
+	ldr	fp, .L644+288
+	.loc 3 284 0
+	str	r1, [r3]
+	.loc 3 285 0
+	ldr	r3, .L644+20
+	.loc 3 310 0
+	lsls	r0, r0, #1
+	.loc 3 316 0
+	ldr	r10, .L644+292
+	.loc 3 320 0
+	ldr	r5, .L644+24
+	.loc 3 285 0
+	str	r1, [r3]
+	.loc 3 286 0
+	ldr	r3, .L644+28
+	.loc 3 323 0
+	ldr	r7, .L644+32
+	.loc 3 286 0
+	str	r1, [r3]
+	.loc 3 287 0
+	ldr	r3, .L644+36
+	str	r1, [r3]
+	.loc 3 288 0
+	ldr	r3, .L644+40
+	str	r1, [r3]
+	.loc 3 289 0
+	ldr	r3, .L644+44
+	str	r1, [r3]
+	.loc 3 290 0
+	ldr	r3, .L644+48
+	str	r1, [r3]
+	.loc 3 291 0
+	ldr	r3, .L644+52
+	str	r1, [r3]
+	.loc 3 292 0
+	ldr	r3, .L644+56
+	str	r1, [r3]
+	.loc 3 293 0
+	ldr	r3, .L644+60
+	str	r1, [r3]
+	.loc 3 294 0
+	ldr	r3, .L644+64
+	str	r1, [r3]
+	.loc 3 295 0
+	ldr	r3, .L644+68
+	str	r1, [r3]
+	.loc 3 296 0
+	ldr	r3, .L644+72
+	str	r1, [r3]
+	.loc 3 297 0
+	movw	r3, #65535
+	str	r3, [r2]
+	.loc 3 298 0
+	ldr	r2, .L644+76
+	str	r1, [r2]
+	.loc 3 299 0
+	ldr	r2, .L644+80
+	str	r1, [r2]
+	.loc 3 300 0
+	ldr	r2, .L644+84
+	str	r1, [r2]
+	.loc 3 301 0
+	ldr	r2, .L644+88
+	strh	r3, [r2]	@ movhi
+	.loc 3 302 0
+	ldr	r2, .L644+92
+	strh	r3, [r2]	@ movhi
+	.loc 3 303 0
+	movs	r2, #32
+	ldr	r3, .L644+96
+	strh	r2, [r3]	@ movhi
+	.loc 3 304 0
+	movs	r2, #128
+	ldr	r3, .L644+100
+	strh	r2, [r3]	@ movhi
+	.loc 3 305 0
+	ldr	r3, .L644+104
+	strh	r1, [r3]	@ movhi
+	.loc 3 306 0
+	ldr	r3, .L644+108
+	strh	r1, [r3]	@ movhi
+	.loc 3 307 0
+	ldr	r3, .L644+112
+	strh	r1, [r3]	@ movhi
+	.loc 3 310 0
+	bl	ftl_malloc
+.LVL697:
+	ldr	r3, .L644+116
+	str	r0, [r3]
+	.loc 3 311 0
+	ldrh	r0, [r4]
+	.loc 3 312 0
+	movs	r4, #20
+	.loc 3 311 0
+	mul	r0, r8, r0
+	bl	ftl_malloc
+.LVL698:
+	.loc 3 312 0
+	ldrh	r2, [fp]
+	.loc 3 311 0
+	ldr	r3, .L644+120
+	.loc 3 312 0
+	muls	r4, r2, r4
+.LVL699:
+	.loc 3 311 0
+	str	r0, [r3]
+	.loc 3 313 0
+	lsls	r6, r4, #2
+	mov	r0, r6
+	bl	ftl_malloc
+.LVL700:
+	ldr	r3, .L644+124
+	str	r0, [r3]
+	.loc 3 314 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL701:
+	ldr	r3, .L644+128
+	str	r0, [r3]
+	.loc 3 315 0
+	mov	r0, r6
+	bl	ftl_malloc
+.LVL702:
+	ldr	r3, .L644+132
+	.loc 3 324 0
+	ldr	r6, .L644+136
+	.loc 3 315 0
+	str	r0, [r3]
+	.loc 3 316 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL703:
+	str	r0, [r10]
+	.loc 3 317 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL704:
+	ldr	r3, .L644+140
+	.loc 3 320 0
+	ldrh	r2, [fp]
+	.loc 3 317 0
+	str	r0, [r3]
+	.loc 3 319 0
+	ldr	r3, .L644+144
+	.loc 3 320 0
+	lsls	r2, r2, #1
+	.loc 3 319 0
+	ldrh	r4, [r3]
+.LVL705:
+	.loc 3 320 0
+	adds	r2, r2, #1
+	str	r2, [r5]
+	.loc 3 321 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL706:
+	ldr	r3, .L644+148
+	str	r0, [r3]
+	.loc 3 322 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL707:
+	ldr	r3, .L644+152
+	str	r0, [r3]
+	.loc 3 323 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL708:
+	str	r0, [r7]
+	.loc 3 324 0
+	ldr	r0, [r5]
+	muls	r0, r4, r0
+	bl	ftl_malloc
+.LVL709:
+	str	r0, [r6]
+	.loc 3 325 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL710:
+	ldr	r2, .L644+156
+	str	r0, [r2]
+	.loc 3 326 0
+	mov	r0, r4
+	bl	ftl_malloc
+.LVL711:
+	ldr	r2, .L644+160
+	.loc 3 329 0
+	ldr	r4, .L644+164
+.LVL712:
+	.loc 3 326 0
+	str	r0, [r2]
+	.loc 3 327 0
+	ldr	r0, [r5]
+	mul	r0, r8, r0
+	bl	ftl_malloc
+.LVL713:
+	ldr	r2, .L644+168
+	.loc 3 329 0
+	ldrh	r3, [fp]
+	.loc 3 327 0
+	str	r0, [r2]
+	.loc 3 329 0
+	ldrh	r2, [r4]
+	mul	fp, r3, r2
+.LVL714:
+	.loc 3 330 0
+	mov	r0, fp
+	bl	ftl_malloc
+.LVL715:
+	ldr	r2, .L644+172
+	str	r0, [r2]
+	.loc 3 331 0
+	lsl	r0, fp, #2
+	bl	ftl_malloc
+.LVL716:
+	ldr	r3, .L644+176
+	str	r0, [r3]
+	.loc 3 332 0
+	ldrh	r3, [r4]
+	ldr	r0, [r5]
+	.loc 3 335 0
+	ldr	r4, .L644+180
+	ldr	r5, .L644+184
+	.loc 3 332 0
+	muls	r0, r3, r0
+	bl	ftl_malloc
+.LVL717:
+	ldr	r3, .L644+188
+	str	r0, [r3]
+	.loc 3 335 0
+	ldrh	r0, [r4]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r5]	@ movhi
+	.loc 3 336 0
+	bl	ftl_malloc
+.LVL718:
+	ldr	r3, .L644+192
+	str	r0, [r3]
+	.loc 3 337 0
+	ldrh	r3, [r5]
+	.loc 3 338 0
+	ldr	r0, .L644+196
+	.loc 3 337 0
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	.loc 3 338 0
+	and	r0, r0, r3, lsl #9
+	.loc 3 337 0
+	strh	r3, [r5]	@ movhi
+	.loc 3 338 0
+	bl	ftl_malloc
+.LVL719:
+	.loc 3 345 0
+	ldrh	fp, [r4]
+.LVL720:
+	.loc 3 338 0
+	ldr	r3, .L644+200
+	str	r0, [r3]
+	.loc 3 345 0
+	lsl	fp, fp, #1
+	.loc 3 339 0
+	ldr	r3, .L644+204
+	adds	r0, r0, #32
+	str	r0, [r3]
+.LVL721:
+	.loc 3 347 0
+	mov	r0, fp
+	bl	ftl_malloc
+.LVL722:
+	ldr	r3, .L644+208
+	str	r0, [r3]
+	.loc 3 349 0
+	mov	r0, fp
+	bl	ftl_malloc
+.LVL723:
+	.loc 3 350 0
+	ldr	fp, .L644+296
+.LVL724:
+	.loc 3 349 0
+	ldr	r3, .L644+212
+	str	r0, [r3]
+.LVL725:
+	.loc 3 350 0
+	ldr	r3, [fp]
+	lsls	r5, r3, #1
+.LVL726:
+	.loc 3 351 0
+	mov	r0, r5
+	bl	ftl_malloc
+.LVL727:
+	ldr	r2, .L644+216
+	str	r0, [r2]
+	.loc 3 352 0
+	mov	r0, r5
+	bl	ftl_malloc
+.LVL728:
+	ldr	r3, .L644+220
+	.loc 3 354 0
+	ldr	r5, .L644+224
+.LVL729:
+	.loc 3 352 0
+	str	r0, [r3]
+	.loc 3 353 0
+	ldrh	r0, [r4]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+.LVL730:
+	ldr	r3, .L644+228
+	str	r0, [r3]
+	.loc 3 354 0
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+.LVL731:
+	ldr	r2, .L644+232
+	str	r0, [r2]
+	.loc 3 355 0
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+.LVL732:
+	ldr	r2, .L644+236
+	str	r0, [r2]
+	.loc 3 356 0
+	ldrh	r0, [r5]
+	ldr	r5, .L644+120
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+.LVL733:
+	ldr	r3, .L644+240
+	str	r0, [r3]
+	.loc 3 357 0
+	ldr	r3, .L644+244
+	ldrh	r0, [r3]
+	str	r3, [sp]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+.LVL734:
+	.loc 3 358 0
+	ldr	r3, [sp]
+	.loc 3 357 0
+	ldr	r2, .L644+248
+	.loc 3 358 0
+	ldr	r1, [sp, #4]
+	.loc 3 357 0
+	str	r0, [r2]
+	.loc 3 358 0
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.LVL735:
+	.loc 3 360 0
+	ldr	r3, .L644+252
+	ldrh	r0, [r3]
+	.loc 3 361 0
+	lsls	r0, r0, #2
+.LVL736:
+	bl	ftl_malloc
+.LVL737:
+	ldr	r3, .L644+256
+	str	r0, [r3]
+.LVL738:
+	.loc 3 362 0
+	ldr	r0, [fp]
+	.loc 3 364 0
+	ldr	fp, .L644+300
+	.loc 3 363 0
+	lsls	r0, r0, #2
+.LVL739:
+	bl	ftl_malloc
+.LVL740:
+	ldr	r3, .L644+260
+	str	r0, [r3]
+.LVL741:
+	.loc 3 364 0
+	ldrh	r0, [fp]
+	.loc 3 365 0
+	mul	r0, r8, r0
+.LVL742:
+	.loc 3 371 0
+	ldr	r8, .L644+304
+	.loc 3 365 0
+	bl	ftl_malloc
+.LVL743:
+	.loc 3 366 0
+	ldr	r2, .L644+144
+	.loc 3 365 0
+	ldr	r3, .L644+264
+	str	r0, [r3]
+.LVL744:
+	.loc 3 366 0
+	ldrh	r0, [r2]
+	ldrh	r3, [fp]
+	ldr	fp, .L644+132
+	.loc 3 367 0
+	muls	r0, r3, r0
+.LVL745:
+	bl	ftl_malloc
+.LVL746:
+	ldr	r3, .L644+268
+	str	r0, [r3]
+.LVL747:
+	.loc 3 369 0
+	movs	r0, #6
+	.loc 3 368 0
+	ldrh	r3, [r4]
+	.loc 3 370 0
+	ldr	r4, .L644+272
+	.loc 3 369 0
+	muls	r0, r3, r0
+.LVL748:
+	bl	ftl_malloc
+.LVL749:
+	ldr	r3, .L644+276
+	str	r0, [r3]
+	.loc 3 370 0
+	ldr	r3, .L644+280
+	ldrh	r0, [r3]
+	.loc 3 371 0
+	ldrh	r3, [r8]
+	.loc 3 370 0
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r4]	@ movhi
+.LVL750:
+	.loc 3 371 0
+	muls	r0, r3, r0
+.LVL751:
+	.loc 3 372 0
+	lsls	r0, r0, #2
+.LVL752:
+	bl	ftl_malloc
+.LVL753:
+	ldr	r2, .L644+284
+	str	r5, [sp, #4]
+	ldr	r5, .L644+124
+	mov	r1, r2
+	.loc 3 373 0
+	ldrh	r3, [r8]
+	.loc 3 372 0
+	str	r0, [r1, #28]!
+.LVL754:
+	.loc 3 374 0
+	ldrh	r0, [r4]
+	ldr	r8, .L644+140
+	ldr	lr, .L644+148
+	b	.L645
+.L646:
+	.align	2
+.L644:
+	.word	.LANCHOR71
+	.word	.LANCHOR118
+	.word	.LANCHOR72
+	.word	.LANCHOR21
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR96
+	.word	.LANCHOR64
+	.word	.LANCHOR124
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR63
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LANCHOR117
+	.word	.LANCHOR89
+	.word	.LANCHOR119
+	.word	.LANCHOR86
+	.word	.LANCHOR113
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.word	.LANCHOR87
+	.word	.LANCHOR103
+	.word	.LANCHOR105
+	.word	.LANCHOR97
+	.word	.LANCHOR100
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR122
+	.word	.LANCHOR93
+	.word	.LANCHOR95
+	.word	.LANCHOR23
+	.word	.LANCHOR39
+	.word	.LANCHOR123
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR24
+	.word	.LANCHOR92
+	.word	.LANCHOR109
+	.word	.LANCHOR115
+	.word	.LANCHOR6
+	.word	.LANCHOR125
+	.word	.LANCHOR94
+	.word	.LANCHOR126
+	.word	33553920
+	.word	.LANCHOR127
+	.word	.LANCHOR40
+	.word	.LANCHOR128
+	.word	.LANCHOR43
+	.word	.LANCHOR129
+	.word	.LANCHOR130
+	.word	.LANCHOR27
+	.word	.LANCHOR1
+	.word	.LANCHOR36
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR28
+	.word	.LANCHOR133
+	.word	.LANCHOR32
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR56
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.word	.LANCHOR41
+	.word	.LANCHOR17
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR112
+	.word	.LANCHOR30
+	.word	.LANCHOR33
+	.word	.LANCHOR10
+.L645:
+	ldr	ip, .L647+100
+	lsls	r0, r0, #2
+	str	r5, [sp, #8]
+	ldr	r5, .L647
+	.loc 3 373 0
+	str	r3, [sp]
+	mov	r4, r0
+	movs	r3, #1
+	str	r5, [sp, #12]
+.LVL755:
+.L544:
+	.loc 3 373 0 is_stmt 0 discriminator 1
+	ldr	r5, [sp]
+	cmp	r3, r5
+	bcc	.L545
+	add	r3, r2, r3, lsl #2
+.LVL756:
+	ldr	r1, .L647+4
+	.loc 3 379 0 is_stmt 1
+	movs	r0, #0
+	adds	r3, r3, #24
+.L546:
+	.loc 3 377 0 discriminator 1
+	cmp	r1, r3
+	bne	.L547
+	.loc 3 383 0
+	ldr	r3, .L647+8
+	ldr	r3, [r3]
+	cbnz	r3, .L548
+.L550:
+	.loc 3 385 0
+	ldr	r1, .L647+12
+	ldr	r0, .L647+16
+	bl	printf
+.LVL757:
+	.loc 3 386 0
+	mov	r0, #-1
+.L543:
+	.loc 3 484 0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL758:
+.L545:
+	.cfi_restore_state
+	.loc 3 374 0 discriminator 3
+	ldr	r5, [r2, #28]
+	.loc 3 373 0 discriminator 3
+	adds	r3, r3, #1
+.LVL759:
+	.loc 3 374 0 discriminator 3
+	add	r5, r5, r4
+	add	r4, r4, r0
+	str	r5, [r1, #4]!
+	b	.L544
+.LVL760:
+.L547:
+	.loc 3 379 0 discriminator 2
+	str	r0, [r3, #4]!
+	b	.L546
+.L548:
+	.loc 3 388 0
+	ldr	r3, .L647+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 393 0
+	ldr	r3, .L647+24
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 398 0
+	ldr	r3, .L647+28
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 404 0
+	ldr	r3, .L647+32
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 409 0
+	ldr	r3, .L647+36
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 414 0
+	ldr	r3, .L647+40
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 419 0
+	ldr	r3, [r2, #28]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 425 0
+	ldr	r3, .L647+44
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 430 0
+	ldr	r3, .L647+48
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 430 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #4]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 is_stmt 1
+	ldr	r3, [sp, #8]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 is_stmt 0 discriminator 1
+	ldr	r3, [fp]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 discriminator 2
+	ldr	r3, [r10]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 discriminator 3
+	ldr	r3, [r8]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 435 0 discriminator 4
+	ldr	r3, [sp, #12]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 is_stmt 1
+	ldr	r3, [lr]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 is_stmt 0 discriminator 1
+	ldr	r3, [ip]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 discriminator 2
+	ldr	r3, [r7]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 440 0 discriminator 3
+	ldr	r3, [r6]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 441 0 is_stmt 1
+	ldr	r3, .L647+52
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 441 0 is_stmt 0 discriminator 1
+	ldr	r3, .L647+56
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 441 0 discriminator 2
+	ldr	r3, .L647+60
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 446 0 is_stmt 1
+	ldr	r3, .L647+64
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 446 0 is_stmt 0 discriminator 1
+	ldr	r3, .L647+68
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 446 0 discriminator 2
+	ldr	r3, .L647+72
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 452 0 is_stmt 1
+	ldr	r3, .L647+76
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 452 0 is_stmt 0 discriminator 1
+	ldr	r3, .L647+80
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 458 0 is_stmt 1
+	ldr	r3, .L647+84
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 464 0
+	ldr	r3, .L647+88
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 470 0
+	ldr	r3, .L647+92
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 476 0
+	ldr	r3, .L647+96
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L550
+	.loc 3 483 0
+	movs	r0, #0
+	b	.L543
+.L648:
+	.align	2
+.L647:
+	.word	.LANCHOR121
+	.word	.LANCHOR37+56
+	.word	.LANCHOR129
+	.word	.LANCHOR138
+	.word	.LC82
+	.word	.LANCHOR130
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR56
+	.word	.LANCHOR136
+	.word	.LANCHOR41
+	.word	.LANCHOR43
+	.word	.LANCHOR97
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR92
+	.word	.LANCHOR109
+	.word	.LANCHOR115
+	.word	.LANCHOR94
+	.word	.LANCHOR40
+	.word	.LANCHOR126
+	.word	.LANCHOR36
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR123
+	.cfi_endproc
+.LFE209:
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+.LFB228:
+	.loc 4 66 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL761:
+	.loc 4 69 0
+	ldr	r3, .L655
+	.loc 4 66 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 4 66 0
+	mov	r5, r0
+	.loc 4 74 0
+	ldr	r7, .L655+4
+	.loc 4 66 0
+	mov	r6, r1
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	.loc 4 69 0
+	ldrh	r2, [r3]
+	movs	r1, #0
+.LVL762:
+	.loc 4 74 0
+	ldr	r8, .L655+12
+	.loc 4 69 0
+	mov	r0, r6
+.LVL763:
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.LVL764:
+.L652:
+	.loc 4 72 0
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L649
+	.loc 4 74 0
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bhi	.L651
+	.loc 4 74 0 is_stmt 0 discriminator 1
+	movs	r2, #74
+	mov	r1, r8
+	ldr	r0, .L655+8
+	bl	printf
+.LVL765:
+.L651:
+	.loc 4 75 0 is_stmt 1 discriminator 2
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	.loc 4 70 0 discriminator 2
+	cmp	r5, r4
+	.loc 4 75 0 discriminator 2
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	.loc 4 70 0 discriminator 2
+	bne	.L652
+.L649:
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL766:
+.L656:
+	.align	2
+.L655:
+	.word	.LANCHOR137
+	.word	.LANCHOR17
+	.word	.LC1
+	.word	.LANCHOR139
+	.cfi_endproc
+.LFE228:
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
+	.align	1
+	.global	FtlBbtMemInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+.LFB230:
+	.loc 4 149 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 4 150 0
+	ldr	r0, .L658
+	movw	r3, #65535
+	.loc 4 152 0
+	movs	r2, #16
+	movs	r1, #255
+	.loc 4 150 0
+	strh	r3, [r0]	@ movhi
+	.loc 4 151 0
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	.loc 4 152 0
+	adds	r0, r0, #12
+	b	ftl_memset
+.LVL767:
+.L659:
+	.align	2
+.L658:
+	.word	.LANCHOR37
+	.cfi_endproc
+.LFE230:
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+.LFB240:
+	.loc 2 76 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL768:
+	.loc 2 79 0
+	ldr	r3, .L661
+	.loc 2 83 0
+	mov	r2, #2048
+	.loc 2 76 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 79 0
+	movs	r4, #0
+	.loc 2 83 0
+	mov	r1, r4
+	.loc 2 79 0
+	strh	r4, [r3, #2]	@ movhi
+	.loc 2 80 0
+	strh	r4, [r3, #4]	@ movhi
+	.loc 2 81 0
+	strh	r4, [r3, #6]	@ movhi
+	.loc 2 82 0
+	strh	r0, [r3], #8	@ movhi
+	.loc 2 83 0
+	mov	r0, r3
+.LVL769:
+	bl	ftl_memset
+.LVL770:
+	.loc 2 85 0
+	mov	r0, r4
+	pop	{r4, pc}
+.L662:
+	.align	2
+.L661:
+	.word	.LANCHOR38
+	.cfi_endproc
+.LFE240:
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+.LFB256:
+	.loc 2 442 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL771:
+	.loc 2 446 0
+	ldr	r3, .L669
+	.loc 2 442 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 442 0
+	mov	r5, r0
+	mov	r10, r1
+	.loc 2 446 0
+	ldrh	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, r0
+	bcs	.L664
+	.loc 2 446 0 is_stmt 0 discriminator 1
+	mov	r2, #446
+	ldr	r1, .L669+4
+.LVL772:
+	ldr	r0, .L669+8
+.LVL773:
+	bl	printf
+.LVL774:
+.L664:
+	.loc 2 447 0 is_stmt 1
+	ldr	fp, .L669+40
+	movs	r4, #12
+	ldr	r7, .L669+12
+	ldr	r3, [fp]
+	ldr	r8, [r3, r5, lsl #2]
+.LVL775:
+	.loc 2 449 0
+	cmp	r8, #0
+	bne	.L665
+	.loc 2 450 0
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	movs	r1, #255
+	adds	r0, r2, r4
+	ldr	r2, .L669+16
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+.LVL776:
+	.loc 2 451 0
+	ldr	r2, [r7]
+	adds	r1, r2, r4
+	strh	r5, [r2, r4]	@ movhi
+	.loc 2 452 0
+	str	r8, [r1, #4]
+.L666:
+	.loc 2 473 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL777:
+.L665:
+	.cfi_restore_state
+	.loc 2 456 0
+	mul	r4, r4, r10
+	ldr	r2, [r7]
+	.loc 2 455 0
+	ldr	r6, .L669+20
+	.loc 2 456 0
+	add	r2, r2, r4
+	.loc 2 458 0
+	mov	r0, r6
+	.loc 2 456 0
+	ldr	r2, [r2, #8]
+	.loc 2 455 0
+	str	r8, [r6, #4]
+	.loc 2 456 0
+	str	r2, [r6, #8]
+	.loc 2 457 0
+	ldr	r2, .L669+24
+	ldr	r2, [r2]
+	str	r2, [r6, #12]
+	.loc 2 458 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL778:
+	.loc 2 459 0
+	ldr	r10, [r6, #12]
+.LVL779:
+	.loc 2 461 0
+	ldrh	r2, [r10, #8]
+	cmp	r2, r5
+	beq	.L667
+	.loc 2 462 0
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L669+28
+	bl	printf
+.LVL780:
+	.loc 2 463 0
+	movs	r3, #4
+	ldr	r1, [r6, #12]
+	mov	r2, r3
+	ldr	r0, .L669+32
+	bl	rknand_print_hex
+.LVL781:
+	.loc 2 464 0
+	ldr	r3, [sp, #4]
+	movs	r2, #4
+	ldr	r1, [fp]
+	ldr	r0, .L669+36
+	ldrh	r3, [r3]
+	bl	rknand_print_hex
+.LVL782:
+.L667:
+	.loc 2 467 0
+	ldrh	r3, [r10, #8]
+	cmp	r3, r5
+	beq	.L668
+	.loc 2 467 0 is_stmt 0 discriminator 1
+	movw	r2, #467
+	ldr	r1, .L669+4
+	ldr	r0, .L669+8
+	bl	printf
+.LVL783:
+.L668:
+	.loc 2 470 0 is_stmt 1
+	ldr	r3, [r7]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	.loc 2 471 0
+	strh	r5, [r3, r4]	@ movhi
+	.loc 2 472 0
+	b	.L666
+.L670:
+	.align	2
+.L669:
+	.word	.LANCHOR32
+	.word	.LANCHOR140
+	.word	.LC1
+	.word	.LANCHOR56
+	.word	.LANCHOR23
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LC83
+	.word	.LC84
+	.word	.LC85
+	.word	.LANCHOR134
+	.cfi_endproc
+.LFE256:
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+.LFB257:
+	.loc 2 476 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL784:
+	.loc 2 485 0
+	ldrh	r2, [r0, #10]
+	.loc 2 476 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 476 0
+	mov	r4, r0
+	.loc 2 479 0
+	ldr	r5, [r0, #20]
+	.loc 2 485 0
+	movs	r1, #0
+	.loc 2 477 0
+	ldr	r10, [r0, #12]
+.LVL785:
+	.loc 2 485 0
+	lsls	r2, r2, #1
+	.loc 2 478 0
+	ldr	r6, [r0, #24]
+.LVL786:
+	.loc 2 485 0
+	mov	r0, r5
+.LVL787:
+	bl	ftl_memset
+.LVL788:
+	.loc 2 486 0
+	movs	r3, #0
+.LVL789:
+.L672:
+	.loc 2 486 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L676
+	.loc 2 494 0 is_stmt 1
+	ldrh	r3, [r5]
+.LVL790:
+	.loc 2 497 0
+	movs	r6, #0
+.LVL791:
+	.loc 2 498 0
+	ldr	r2, .L685
+.LVL792:
+	.loc 2 495 0
+	mov	fp, r6
+.LVL793:
+.L677:
+	.loc 2 497 0 discriminator 1
+	ldrh	r0, [r4, #10]
+	uxth	r1, r6
+.LVL794:
+	cmp	r0, r1
+	bhi	.L681
+	.loc 2 513 0
+	mov	r0, fp
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL795:
+.L676:
+	.cfi_restore_state
+	.loc 2 487 0
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
+	.loc 2 488 0
+	movs	r2, #0
+	.loc 2 487 0
+	ubfx	r1, r1, #10, #16
+.LVL796:
+.L673:
+	.loc 2 488 0 discriminator 1
+	ldrh	r7, [r4, #10]
+	uxth	r0, r2
+	cmp	r7, r0
+	bhi	.L675
+.LVL797:
+	adds	r3, r3, #1
+.LVL798:
+	b	.L672
+.LVL799:
+.L675:
+	.loc 2 489 0
+	uxth	r0, r2
+	adds	r2, r2, #1
+.LVL800:
+	ldrh	r7, [r10, r0, lsl #1]
+	cmp	r7, r1
+	.loc 2 490 0
+	ittt	eq
+	ldrheq	r7, [r5, r0, lsl #1]
+	addeq	r7, r7, #1
+	strheq	r7, [r5, r0, lsl #1]	@ movhi
+.LVL801:
+	b	.L673
+.LVL802:
+.L681:
+	.loc 2 498 0
+	ldrh	r0, [r4]
+	uxth	r7, r6
+	cmp	r0, r1
+	bne	.L678
+	.loc 2 498 0 is_stmt 0 discriminator 1
+	ldrh	r0, [r2]
+	ldrh	ip, [r4, #2]
+	cmp	ip, r0
+	.loc 2 499 0 is_stmt 1 discriminator 1
+	it	cc
+	strhcc	r0, [r5, r7, lsl #1]	@ movhi
+.L678:
+	.loc 2 500 0
+	ldrh	r8, [r5, r7, lsl #1]
+	cmp	r3, r8
+	itt	hi
+	movhi	fp, r1
+	movhi	r3, r8
+.LVL803:
+	.loc 2 504 0
+	cmp	r8, #0
+	bne	.L680
+	.loc 2 504 0 is_stmt 0 discriminator 1
+	ldrh	r0, [r10, r7, lsl #1]
+	cbz	r0, .L680
+	.loc 2 506 0 is_stmt 1
+	movs	r1, #1
+.LVL804:
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	bl	FtlFreeSysBlkQueueIn
+.LVL805:
+	.loc 2 507 0
+	strh	r8, [r10, r7, lsl #1]	@ movhi
+	.loc 2 508 0
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r4, #8]
+	ldr	r3, [sp]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.LVL806:
+.L680:
+	adds	r6, r6, #1
+.LVL807:
+	b	.L677
+.L686:
+	.align	2
+.L685:
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE257:
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.align	1
+	.global	Ftl_write_map_blk_to_last_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+.LFB260:
+	.loc 2 583 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL808:
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 591 0
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	.loc 2 583 0
+	mov	r4, r0
+	.loc 2 586 0
+	ldr	r5, [r0, #12]
+.LVL809:
+	.loc 2 591 0
+	cmp	r3, r2
+	bne	.L688
+	.loc 2 592 0
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L689
+	.loc 2 592 0 is_stmt 0 discriminator 1
+	mov	r2, #592
+	ldr	r1, .L697
+	ldr	r0, .L697+4
+.LVL810:
+	bl	printf
+.LVL811:
+.L689:
+	.loc 2 593 0 is_stmt 1
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	.loc 2 594 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL812:
+	.loc 2 595 0
+	movs	r3, #0
+	.loc 2 594 0
+	strh	r0, [r5]	@ movhi
+	.loc 2 595 0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 596 0
+	strh	r3, [r4]	@ movhi
+	.loc 2 597 0
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.LVL813:
+.L690:
+	.loc 2 628 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.LVL814:
+.L688:
+	.loc 2 601 0
+	ldrh	r5, [r5, r3, lsl #1]
+.LVL815:
+	.loc 2 612 0
+	movs	r1, #255
+	.loc 2 602 0
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L697+8
+	.loc 2 603 0
+	ldr	r7, .L697+12
+	.loc 2 587 0
+	ldr	r6, [r0, #24]
+	.loc 2 602 0
+	orr	r3, r3, r5, lsl #10
+	.loc 2 603 0
+	ldr	r0, [r7]
+.LVL816:
+	.loc 2 602 0
+	str	r3, [r2, #4]
+	.loc 2 604 0
+	ldr	r3, .L697+16
+	.loc 2 603 0
+	str	r0, [r2, #8]
+	.loc 2 604 0
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+.LVL817:
+	.loc 2 607 0
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	.loc 2 608 0
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	.loc 2 609 0
+	ldrh	r2, [r4, #4]
+	.loc 2 610 0
+	strh	r5, [r3, #2]	@ movhi
+	.loc 2 609 0
+	strh	r2, [r3]	@ movhi
+	.loc 2 612 0
+	ldr	r3, .L697+20
+.LVL818:
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+.LVL819:
+	.loc 2 614 0
+	ldrh	ip, [r4, #6]
+	movs	r3, #0
+	.loc 2 617 0
+	ldr	r1, [r7]
+	.loc 2 613 0
+	mov	r2, r3
+.LVL820:
+.L691:
+	.loc 2 614 0 discriminator 1
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L693
+	.loc 2 621 0
+	movs	r2, #1
+.LVL821:
+	movs	r3, #0
+.LVL822:
+	mov	r1, r2
+	ldr	r0, .L697+8
+.LVL823:
+	bl	FlashProgPages
+.LVL824:
+	.loc 2 622 0
+	ldrh	r3, [r4, #2]
+	.loc 2 626 0
+	mov	r0, r4
+	.loc 2 622 0
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 626 0
+	bl	ftl_map_blk_gc
+.LVL825:
+	.loc 2 627 0
+	b	.L690
+.LVL826:
+.L693:
+	.loc 2 615 0
+	ldr	r0, [r6, r3, lsl #2]
+	cmp	r5, r0, lsr #10
+	bne	.L692
+	.loc 2 616 0
+	adds	r2, r2, #1
+.LVL827:
+	uxth	r2, r2
+.LVL828:
+	.loc 2 617 0
+	str	r3, [r1, r2, lsl #3]
+	.loc 2 618 0
+	add	r7, r1, r2, lsl #3
+	ldr	r0, [r6, r3, lsl #2]
+	str	r0, [r7, #4]
+.L692:
+.LVL829:
+	adds	r3, r3, #1
+.LVL830:
+	b	.L691
+.L698:
+	.align	2
+.L697:
+	.word	.LANCHOR141
+	.word	.LC1
+	.word	.LANCHOR108
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE260:
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+.LFB261:
+	.loc 2 631 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL831:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 631 0
+	mov	r4, r0
+	.loc 2 638 0
+	ldr	r8, .L718+28
+	.loc 2 631 0
+	mov	r7, r1
+	.loc 2 634 0
+	movs	r6, #0
+	.loc 2 631 0
+	str	r2, [sp, #4]
+	mov	fp, r8
+.LVL832:
+.L700:
+	.loc 2 637 0
+	ldr	r2, .L718
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	.loc 2 638 0
+	ldrh	r3, [r8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L701
+	.loc 2 638 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r4]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L702
+.L701:
+	.loc 2 639 0 is_stmt 1
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.LVL833:
+.L702:
+	.loc 2 650 0
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L703
+	.loc 2 650 0 is_stmt 0 discriminator 1
+	movw	r2, #650
+	ldr	r1, .L718+4
+	ldr	r0, .L718+8
+	bl	printf
+.LVL834:
+.L703:
+	.loc 2 651 0 is_stmt 1
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L704
+	.loc 2 651 0 is_stmt 0 discriminator 1
+	movw	r2, #651
+	ldr	r1, .L718+4
+	ldr	r0, .L718+8
+	bl	printf
+.LVL835:
+.L704:
+	.loc 2 652 0 is_stmt 1
+	ldrh	r2, [r4]
+	.loc 2 658 0
+	movs	r1, #0
+	.loc 2 652 0
+	ldr	r3, [r4, #12]
+	.loc 2 654 0
+	ldr	r5, .L718+12
+	.loc 2 652 0
+	ldrh	r10, [r3, r2, lsl #1]
+.LVL836:
+	.loc 2 654 0
+	ldrh	r2, [r4, #2]
+	.loc 2 655 0
+	ldr	r3, [sp, #4]
+	.loc 2 654 0
+	orr	r2, r2, r10, lsl #10
+	.loc 2 655 0
+	str	r3, [r5, #8]
+	.loc 2 654 0
+	str	r2, [r5, #4]
+	.loc 2 656 0
+	ldr	r2, .L718+16
+	ldr	r0, [r2]
+	.loc 2 658 0
+	movs	r2, #16
+	.loc 2 656 0
+	str	r0, [r5, #12]
+	.loc 2 658 0
+	bl	ftl_memset
+.LVL837:
+	.loc 2 659 0
+	ldr	r2, [r5, #12]
+.LVL838:
+	.loc 2 664 0
+	movs	r3, #1
+	.loc 2 660 0
+	ldr	r1, [r4, #28]
+	.loc 2 664 0
+	mov	r0, r5
+	.loc 2 661 0
+	strh	r7, [r2, #8]	@ movhi
+	.loc 2 660 0
+	str	r1, [r2, #4]
+	.loc 2 662 0
+	ldrh	r1, [r4, #4]
+	.loc 2 663 0
+	strh	r10, [r2, #2]	@ movhi
+	.loc 2 662 0
+	strh	r1, [r2]	@ movhi
+	.loc 2 664 0
+	mov	r2, r3
+.LVL839:
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL840:
+	.loc 2 665 0
+	ldrh	r2, [r4, #2]
+	.loc 2 667 0
+	ldr	r3, [r5]
+	.loc 2 665 0
+	adds	r2, r2, #1
+	uxth	r2, r2
+	.loc 2 667 0
+	adds	r3, r3, #1
+	.loc 2 665 0
+	strh	r2, [r4, #2]	@ movhi
+	.loc 2 667 0
+	bne	.L705
+	.loc 2 668 0
+	ldr	r1, [r5, #4]
+	.loc 2 669 0
+	adds	r6, r6, #1
+.LVL841:
+	.loc 2 668 0
+	ldr	r0, .L718+20
+	.loc 2 669 0
+	uxth	r6, r6
+	.loc 2 668 0
+	bl	printf
+.LVL842:
+	.loc 2 670 0
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	.loc 2 671 0
+	ittt	ls
+	ldrhls	r2, [fp]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	.loc 2 673 0
+	cmp	r6, #3
+	bls	.L707
+	.loc 2 674 0
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L718+24
+	bl	printf
+.LVL843:
+.L708:
+	b	.L708
+.L707:
+	.loc 2 678 0
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L700
+.L717:
+	b	.L717
+.L705:
+	.loc 2 682 0
+	cmp	r2, #1
+	beq	.L700
+	.loc 2 685 0
+	ldr	r2, [r5, #4]
+	.loc 2 687 0
+	movs	r0, #0
+	.loc 2 685 0
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r7, lsl #2]
+	.loc 2 687 0
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL844:
+.L719:
+	.align	2
+.L718:
+	.word	.LANCHOR67
+	.word	.LANCHOR142
+	.word	.LC1
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LC86
+	.word	.LC87
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE261:
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+.LFB259:
+	.loc 2 537 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL845:
+	.loc 2 542 0
+	ldr	r3, [r0, #24]
+	.loc 2 537 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 537 0
+	mov	r4, r0
+	.loc 2 541 0
+	ldr	r5, [r0, #12]
+.LVL846:
+	.loc 2 542 0
+	str	r3, [sp]
+.LVL847:
+	.loc 2 545 0
+	bl	ftl_free_no_use_map_blk
+.LVL848:
+	.loc 2 547 0
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #4
+	cmp	r2, r3
+	blt	.L721
+	.loc 2 548 0
+	uxth	r0, r0
+	ldrh	r7, [r5, r0, lsl #1]
+.LVL849:
+	.loc 2 549 0
+	cbz	r7, .L721
+	.loc 2 549 0 is_stmt 0 discriminator 1
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L721
+	.loc 2 550 0 is_stmt 1
+	movs	r2, #1
+	str	r2, [r4, #32]
+	.loc 2 551 0
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	.loc 2 552 0
+	ldrh	r3, [r4, #8]
+	.loc 2 553 0
+	ldrh	r2, [r4, #2]
+	.loc 2 552 0
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	.loc 2 553 0
+	ldr	r3, .L732
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L722
+	.loc 2 554 0
+	mov	r0, r4
+.LVL850:
+	bl	ftl_map_blk_alloc_new_blk
+.LVL851:
+.L722:
+	.loc 2 558 0 discriminator 1
+	ldr	r5, .L732+4
+.LVL852:
+	.loc 2 537 0 discriminator 1
+	movs	r6, #0
+	.loc 2 558 0 discriminator 1
+	ldr	fp, .L732+20
+.L723:
+	.loc 2 556 0 discriminator 1
+	ldrh	r3, [r4, #6]
+	uxth	r10, r6
+.LVL853:
+	cmp	r3, r10
+	bhi	.L727
+	.loc 2 572 0
+	movs	r1, #1
+	mov	r0, r7
+	bl	FtlFreeSysBlkQueueIn
+.LVL854:
+	.loc 2 573 0
+	movs	r3, #0
+	str	r3, [r4, #32]
+.LVL855:
+.L721:
+	.loc 2 577 0
+	ldr	r3, .L732
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L728
+	.loc 2 578 0
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.LVL856:
+.L728:
+	.loc 2 580 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL857:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL858:
+.L727:
+	.cfi_restore_state
+	.loc 2 557 0
+	ldr	r3, [sp]
+	uxth	r8, r6
+	ldr	r2, [r3, r8, lsl #2]
+	cmp	r7, r2, lsr #10
+	bne	.L724
+	.loc 2 558 0
+	ldr	r3, [fp]
+	.loc 2 560 0
+	str	r2, [r5, #4]
+.LVL859:
+	.loc 2 562 0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L732+4
+	.loc 2 558 0
+	str	r3, [r5, #8]
+	.loc 2 559 0
+	ldr	r3, .L732+8
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
+	str	r3, [sp, #4]
+.LVL860:
+	.loc 2 562 0
+	bl	FlashReadPages
+.LVL861:
+	.loc 2 564 0
+	ldr	r3, [sp, #4]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r10
+	beq	.L725
+	.loc 2 564 0 is_stmt 0 discriminator 1
+	mov	r2, #564
+	ldr	r1, .L732+12
+	ldr	r0, .L732+16
+	bl	printf
+.LVL862:
+.L725:
+	.loc 2 565 0 is_stmt 1
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L726
+	.loc 2 566 0
+	ldr	r2, [sp]
+	movs	r3, #0
+	str	r3, [r2, r8, lsl #2]
+.L724:
+.LVL863:
+	adds	r6, r6, #1
+.LVL864:
+	b	.L723
+.LVL865:
+.L726:
+	.loc 2 568 0
+	ldr	r2, [r5, #8]
+	mov	r1, r8
+	mov	r0, r4
+	bl	FtlMapWritePage
+.LVL866:
+	b	.L724
+.L733:
+	.align	2
+.L732:
+	.word	.LANCHOR20
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR143
+	.word	.LC1
+	.word	.LANCHOR123
+	.cfi_endproc
+.LFE259:
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",%progbits
+	.align	1
+	.global	flush_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+.LFB262:
+	.loc 2 690 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL867:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 693 0
+	movs	r4, #12
+	ldr	r5, .L735
+	muls	r4, r0, r4
+	.loc 2 694 0
+	ldr	r0, .L735+4
+.LVL868:
+	.loc 2 693 0
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+.LVL869:
+	.loc 2 694 0
+	ldrh	r1, [r3, r4]
+.LVL870:
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+.LVL871:
+	.loc 2 695 0
+	ldr	r3, [r5]
+	.loc 2 697 0
+	movs	r0, #0
+	.loc 2 695 0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	.loc 2 697 0
+	pop	{r3, r4, r5, pc}
+.L736:
+	.align	2
+.L735:
+	.word	.LANCHOR56
+	.word	.LANCHOR144
+	.cfi_endproc
+.LFE262:
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",%progbits
+	.align	1
+	.global	log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	log2phys, %function
+log2phys:
+.LFB265:
+	.loc 2 753 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL872:
+	.loc 2 756 0
+	ldr	r3, .L751
+	.loc 2 753 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 753 0
+	mov	r7, r1
+	mov	r10, r2
+	.loc 2 756 0
+	ldrh	r4, [r3]
+	adds	r3, r4, #7
+	.loc 2 757 0
+	movs	r4, #1
+	.loc 2 756 0
+	lsr	r8, r0, r3
+	.loc 2 757 0
+	lsls	r4, r4, r3
+	.loc 2 759 0
+	ldr	r3, .L751+4
+	.loc 2 757 0
+	subs	r4, r4, #1
+	.loc 2 756 0
+	uxth	r8, r8
+.LVL873:
+	.loc 2 757 0
+	ands	r4, r4, r0
+	.loc 2 759 0
+	ldr	r3, [r3]
+	.loc 2 757 0
+	uxth	r4, r4
+.LVL874:
+	.loc 2 759 0
+	cmp	r0, r3
+	bcc	.L738
+	.loc 2 759 0 is_stmt 0 discriminator 1
+	movw	r2, #759
+.LVL875:
+	ldr	r1, .L751+8
+.LVL876:
+	ldr	r0, .L751+12
+.LVL877:
+	bl	printf
+.LVL878:
+.L738:
+	.loc 2 762 0 is_stmt 1
+	ldr	r6, .L751+16
+	mov	fp, #12
+	.loc 2 761 0
+	ldr	r3, .L751+20
+	.loc 2 762 0
+	ldr	r1, [r6]
+	.loc 2 761 0
+	ldrh	r2, [r3]
+	movs	r3, #0
+.LVL879:
+.L739:
+	uxth	r5, r3
+.LVL880:
+	.loc 2 761 0 is_stmt 0 discriminator 1
+	cmp	r5, r2
+	bcc	.L744
+	.loc 2 776 0 is_stmt 1
+	bl	select_l2p_ram_region
+.LVL881:
+	.loc 2 777 0
+	mul	fp, fp, r0
+	ldr	r3, [r6]
+	.loc 2 776 0
+	mov	r5, r0
+.LVL882:
+	.loc 2 777 0
+	ldrh	r1, [r3, fp]
+	add	r2, r3, fp
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L745
+	.loc 2 777 0 is_stmt 0 discriminator 1
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L745
+	.loc 2 778 0 is_stmt 1
+	bl	flush_l2p_region
+.LVL883:
+.L745:
+	.loc 2 781 0
+	mov	r1, r5
+	mov	r0, r8
+	bl	load_l2p_region
+.LVL884:
+	.loc 2 782 0
+	b	.L740
+.LVL885:
+.L744:
+	adds	r3, r3, #1
+	.loc 2 762 0
+	mla	r0, fp, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r8
+	bne	.L739
+.LVL886:
+.L740:
+	.loc 2 765 0
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r3, r3, r5, r2
+	.loc 2 764 0
+	cmp	r10, #0
+	bne	.L741
+	.loc 2 765 0
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [r7]
+.L742:
+	.loc 2 771 0
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r5, r3, r5, r2
+.LVL887:
+	ldr	r3, [r5, #4]
+	adds	r2, r3, #1
+	beq	.L748
+	.loc 2 772 0
+	adds	r3, r3, #1
+	str	r3, [r5, #4]
+.L748:
+	.loc 2 783 0
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL888:
+.L741:
+	.loc 2 767 0
+	ldr	r1, [r7]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r4, lsl #2]
+	.loc 2 768 0
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	.loc 2 769 0
+	ldr	r3, .L751+24
+	strh	r8, [r3]	@ movhi
+	b	.L742
+.L752:
+	.align	2
+.L751:
+	.word	.LANCHOR22
+	.word	.LANCHOR62
+	.word	.LANCHOR145
+	.word	.LC1
+	.word	.LANCHOR56
+	.word	.LANCHOR33
+	.word	.LANCHOR57
+	.cfi_endproc
+.LFE265:
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.align	1
+	.global	FtlReUsePrevPpa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+.LFB283:
+	.loc 2 1628 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL889:
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 1628 0
+	mov	r6, r0
+	.loc 2 1631 0
+	ldr	r5, .L763
+	.loc 2 1629 0
+	ubfx	r0, r1, #10, #16
+.LVL890:
+	.loc 2 1628 0
+	str	r1, [sp, #4]
+	.loc 2 1629 0
+	bl	P2V_block_in_plane
+.LVL891:
+	.loc 2 1631 0
+	ldr	r2, [r5]
+	.loc 2 1629 0
+	mov	r7, r0
+.LVL892:
+	.loc 2 1631 0
+	ldrh	r3, [r2, r0, lsl #1]
+	cbnz	r3, .L754
+	.loc 2 1632 0
+	ldr	r2, .L763+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L755
+.LBB225:
+	.loc 2 1636 0
+	ldr	r2, .L763+8
+	.loc 2 1644 0
+	movw	lr, #65535
+	.loc 2 1636 0
+	ldr	ip, .L763+24
+	.loc 2 1635 0
+	ldr	r0, .L763+12
+.LVL893:
+	.loc 2 1636 0
+	ldr	r2, [r2]
+	.loc 2 1635 0
+	ldrh	r1, [r0]
+.LVL894:
+	mov	r8, r0
+	.loc 2 1636 0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	.loc 2 1644 0
+	mov	ip, #6
+	.loc 2 1636 0
+	uxth	r4, r4
+.LVL895:
+.L756:
+	.loc 2 1637 0 discriminator 1
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L755
+	.loc 2 1638 0
+	cmp	r4, r7
+	bne	.L757
+	.loc 2 1639 0
+	mov	r1, r4
+.LVL896:
+	ldr	r0, .L763+4
+	bl	List_remove_node
+.LVL897:
+	ldrh	r3, [r8]
+	cbnz	r3, .L758
+	.loc 2 1639 0 is_stmt 0 discriminator 1
+	movw	r2, #1639
+	ldr	r1, .L763+16
+	ldr	r0, .L763+20
+	bl	printf
+.LVL898:
+.L758:
+	.loc 2 1639 0 discriminator 3
+	ldrh	r3, [r8]
+	.loc 2 1640 0 is_stmt 1 discriminator 3
+	mov	r0, r4
+	.loc 2 1639 0 discriminator 3
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	.loc 2 1640 0 discriminator 3
+	bl	INSERT_DATA_LIST
+.LVL899:
+	.loc 2 1641 0 discriminator 3
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.LVL900:
+.L754:
+.LBE225:
+	.loc 2 1650 0
+	adds	r3, r3, #1
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L755
+.LVL901:
+.L757:
+.LBB226:
+	.loc 2 1644 0
+	mul	r4, ip, r4
+.LVL902:
+	adds	r3, r3, #1
+.LVL903:
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L756
+.LVL904:
+.L755:
+.LBE226:
+	.loc 2 1652 0
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+.LVL905:
+	.loc 2 1653 0
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL906:
+.L764:
+	.align	2
+.L763:
+	.word	.LANCHOR43
+	.word	.LANCHOR47
+	.word	.LANCHOR41
+	.word	.LANCHOR48
+	.word	.LANCHOR146
+	.word	.LC1
+	.word	-1431655765
+	.cfi_endproc
+.LFE283:
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+.LFB294:
+	.loc 2 2275 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 2281 0
+	movs	r5, #0
+	ldr	r7, .L779
+	.loc 2 2275 0
+	sub	sp, sp, #32
+	.cfi_def_cfa_offset 56
+	.loc 2 2280 0
+	movs	r1, #0
+	.loc 2 2284 0
+	ldr	r8, .L779+24
+	.loc 2 2280 0
+	ldr	r0, .L779+4
+	bl	printf
+.LVL907:
+.L766:
+	.loc 2 2281 0 discriminator 1
+	ldr	r3, [r7]
+	cmp	r5, r3
+	bcc	.L772
+	.loc 2 2303 0
+	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL908:
+.L772:
+	.cfi_restore_state
+	.loc 2 2282 0
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r5
+	bl	log2phys
+.LVL909:
+	.loc 2 2283 0
+	ubfx	r3, r5, #0, #11
+	cbnz	r3, .L767
+	.loc 2 2284 0
+	ldr	r2, [sp, #28]
+	mov	r1, r5
+	mov	r0, r8
+	bl	printf
+.LVL910:
+.L767:
+	.loc 2 2285 0
+	ldr	r3, [sp, #28]
+	adds	r2, r3, #1
+	beq	.L769
+	.loc 2 2286 0
+	ldr	r4, .L779+8
+	.loc 2 2290 0
+	movs	r2, #0
+	.loc 2 2292 0
+	movs	r1, #1
+	.loc 2 2286 0
+	str	r3, [r4, #4]
+	.loc 2 2292 0
+	mov	r0, r4
+	.loc 2 2288 0
+	ldr	r3, .L779+12
+	.loc 2 2287 0
+	str	r5, [r4, #16]
+	.loc 2 2290 0
+	str	r2, [r4]
+	.loc 2 2288 0
+	ldr	r3, [r3]
+	str	r3, [r4, #8]
+	.loc 2 2289 0
+	ldr	r3, .L779+16
+	ldr	r6, [r3]
+.LVL911:
+	str	r6, [r4, #12]
+	.loc 2 2292 0
+	bl	FlashReadPages
+.LVL912:
+	.loc 2 2293 0
+	ldr	r3, [r4]
+	cmp	r3, #256
+	beq	.L770
+	.loc 2 2293 0 is_stmt 0 discriminator 1
+	adds	r3, r3, #1
+	beq	.L770
+	.loc 2 2294 0 is_stmt 1
+	ldr	r3, [r6, #8]
+	cmp	r5, r3
+	beq	.L769
+.L770:
+	.loc 2 2297 0
+	ldr	r2, [r4, #8]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L779+20
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #4]
+	ldr	r3, [r3]
+	bl	printf
+.LVL913:
+.L769:
+	.loc 2 2281 0 discriminator 2
+	adds	r5, r5, #1
+.LVL914:
+	b	.L766
+.L780:
+	.align	2
+.L779:
+	.word	.LANCHOR62
+	.word	.LC88
+	.word	.LANCHOR108
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LC90
+	.word	.LC89
+	.cfi_endproc
+.LFE294:
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlReadRefresh,"ax",%progbits
+	.align	1
+	.global	FtlReadRefresh
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+.LFB321:
+	.loc 5 419 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL915:
+	.loc 5 425 0
+	ldr	r3, .L794
+	.loc 5 419 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #88
+	.cfi_def_cfa_offset 104
+	mov	r4, r3
+	.loc 5 425 0
+	ldr	r0, [r3, #80]
+	cmp	r0, #0
+	beq	.L782
+	.loc 5 426 0
+	ldr	r6, .L794+4
+	ldr	r0, [r3, #84]
+	ldr	r1, [r6]
+	cmp	r0, r1
+	bcs	.L783
+	mov	r5, #2048
+.L788:
+.LVL916:
+.LBB232:
+.LBB233:
+	.loc 5 428 0
+	ldr	r0, [r4, #84]
+	ldr	r3, [r6]
+	cmp	r0, r3
+	bcs	.L785
+	.loc 5 430 0
+	movs	r2, #0
+	mov	r1, sp
+	bl	log2phys
+.LVL917:
+	.loc 5 432 0
+	ldr	r2, [sp]
+	.loc 5 431 0
+	ldr	r3, [r4, #84]
+	.loc 5 432 0
+	adds	r1, r2, #1
+	.loc 5 431 0
+	add	r3, r3, #1
+	str	r3, [r4, #84]
+	.loc 5 432 0
+	beq	.L786
+.LBB234:
+	.loc 5 435 0
+	str	r3, [sp, #20]
+	.loc 5 438 0
+	add	r0, sp, #88
+	.loc 5 436 0
+	ldr	r3, .L794+8
+	.loc 5 439 0
+	movs	r1, #1
+	.loc 5 434 0
+	str	r2, [sp, #8]
+	.loc 5 438 0
+	movs	r2, #0
+	str	r2, [r0, #-84]!
+	.loc 5 436 0
+	str	r3, [sp, #12]
+	.loc 5 437 0
+	add	r3, sp, #24
+	str	r3, [sp, #16]
+	.loc 5 439 0
+	bl	FlashReadPages
+.LVL918:
+	.loc 5 440 0
+	ldr	r3, [sp, #4]
+	cmp	r3, #256
+	bne	.L785
+	.loc 5 442 0
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL919:
+	bl	FtlGcRefreshBlock
+.LVL920:
+.L785:
+.LBE234:
+	mov	r0, #-1
+.L781:
+.LBE233:
+.LBE232:
+	.loc 5 466 0
+	add	sp, sp, #88
+	.cfi_remember_state
+	.cfi_def_cfa_offset 16
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.LVL921:
+.L786:
+	.cfi_restore_state
+.LBB236:
+.LBB235:
+	.loc 5 427 0
+	subs	r5, r5, #1
+.LVL922:
+	bne	.L788
+	b	.L785
+.LVL923:
+.L783:
+.LBE235:
+.LBE236:
+	.loc 5 451 0
+	ldr	r2, .L794+12
+	.loc 5 449 0
+	movs	r0, #0
+	str	r0, [r3, #80]
+	.loc 5 450 0
+	str	r0, [r3, #84]
+	.loc 5 451 0
+	ldr	r2, [r2]
+	str	r2, [r3, #76]
+	b	.L781
+.L782:
+.LVL924:
+.LBB237:
+	.loc 5 456 0
+	ldr	r1, [r3, #76]
+	ldr	r3, .L794+12
+	ldr	r5, [r3]
+	add	r3, r5, #1048576
+	cmp	r1, r3
+	bhi	.L791
+	.loc 5 454 0
+	ldr	r3, .L794+16
+	ldr	r2, [r3]
+	mov	r3, #33554432
+	lsrs	r2, r2, #10
+	asrs	r3, r3, r2
+	.loc 5 457 0
+	add	r3, r3, r1
+	cmp	r5, r3
+	bhi	.L791
+	.loc 5 458 0
+	ldr	r3, .L794+20
+	ldrb	r3, [r3, #28]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L781
+.L791:
+	.loc 5 460 0
+	movs	r3, #1
+	.loc 5 461 0
+	movs	r0, #0
+	.loc 5 460 0
+	str	r3, [r4, #80]
+	.loc 5 461 0
+	str	r0, [r4, #84]
+	.loc 5 462 0
+	str	r5, [r4, #76]
+	b	.L781
+.L795:
+	.align	2
+.L794:
+	.word	.LANCHOR83
+	.word	.LANCHOR62
+	.word	ftl_temp_buf
+	.word	.LANCHOR63
+	.word	.LANCHOR77
+	.word	.LANCHOR79
+.LBE237:
+	.cfi_endproc
+.LFE321:
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDump_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+.LFB270:
+	.loc 2 897 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL925:
+	.loc 2 903 0
+	ldr	r3, [r0, #36]
+	.loc 2 897 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 897 0
+	mov	r6, r0
+	.loc 2 903 0
+	cbz	r3, .L796
+	.loc 2 899 0
+	ldrh	r5, [r0, #6]
+	.loc 2 905 0
+	movs	r3, #0
+	.loc 2 900 0
+	ldr	r2, [r0, #24]
+	.loc 2 905 0
+	str	r3, [r0, #36]
+	.loc 2 899 0
+	subs	r5, r5, #1
+	.loc 2 907 0
+	ldr	r3, .L800
+	.loc 2 908 0
+	ldr	r1, .L800+4
+	.loc 2 930 0
+	uxth	r5, r5
+	.loc 2 907 0
+	ldr	r4, .L800+8
+	.loc 2 930 0
+	ldr	r2, [r2, r5, lsl #2]
+.LVL926:
+	.loc 2 907 0
+	ldr	r0, [r3]
+.LVL927:
+	.loc 2 908 0
+	ldr	r1, [r1]
+	.loc 2 931 0
+	str	r2, [r4, #4]
+	.loc 2 907 0
+	str	r0, [r4, #8]
+	.loc 2 908 0
+	str	r1, [r4, #12]
+	.loc 2 932 0
+	cbz	r2, .L798
+	.loc 2 934 0
+	movs	r2, #1
+.LVL928:
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL929:
+.L799:
+	.loc 2 941 0
+	ldr	r2, [r4, #8]
+	mov	r1, r5
+	mov	r0, r6
+	.loc 2 943 0
+	pop	{r4, r5, r6, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL930:
+	.loc 2 941 0
+	b	FtlMapWritePage
+.LVL931:
+.L798:
+	.cfi_restore_state
+	.loc 2 938 0
+	ldr	r3, .L800+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+.LVL932:
+	bl	ftl_memset
+.LVL933:
+	b	.L799
+.LVL934:
+.L796:
+	pop	{r4, r5, r6, pc}
+.L801:
+	.align	2
+.L800:
+	.word	.LANCHOR123
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR23
+	.cfi_endproc
+.LFE270:
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+.LFB273:
+	.loc 2 1095 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1101 0
+	movs	r4, #0
+	.loc 2 1103 0
+	ldr	r5, .L883
+	.loc 2 1095 0
+	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 2 1103 0
+	mov	r1, r4
+	.loc 2 1102 0
+	ldr	r3, .L883+4
+	.loc 2 1103 0
+	ldr	r2, [r5]
+	.loc 2 1101 0
+	ldr	r6, .L883+8
+	.loc 2 1102 0
+	strh	r4, [r3]	@ movhi
+	.loc 2 1103 0
+	ldr	r3, .L883+12
+	lsls	r2, r2, #2
+	.loc 2 1101 0
+	strh	r4, [r6]	@ movhi
+	.loc 2 1105 0
+	ldr	r7, .L883+16
+	.loc 2 1103 0
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL935:
+	.loc 2 1104 0
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L883+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL936:
+	.loc 2 1105 0
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L883+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL937:
+	.loc 2 1106 0
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L883+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL938:
+	.loc 2 1107 0
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L883+32
+	bl	ftl_memset
+.LVL939:
+	.loc 2 1109 0
+	ldr	r3, .L883+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.LVL940:
+.L803:
+	.loc 2 1109 0 is_stmt 0 discriminator 1
+	ldr	r3, .L883+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bls	.L844
+	.loc 2 1113 0 is_stmt 1 discriminator 1
+	ldr	r3, .L883+44
+	.loc 2 1120 0 discriminator 1
+	movs	r5, #0
+	ldr	r1, .L883+48
+	mov	fp, r5
+	.loc 2 1118 0 discriminator 1
+	movs	r7, #20
+	.loc 2 1113 0 discriminator 1
+	ldrh	r8, [r3]
+	.loc 2 1118 0 discriminator 1
+	ldr	r3, .L883+52
+	.loc 2 1120 0 discriminator 1
+	ldr	r2, [r1]
+	ldr	r1, .L883+56
+	.loc 2 1118 0 discriminator 1
+	ldr	r6, [r3]
+	.loc 2 1119 0 discriminator 1
+	ldr	r3, .L883+60
+	.loc 2 1120 0 discriminator 1
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	.loc 2 1119 0 discriminator 1
+	ldr	r3, [r3]
+	.loc 2 1115 0 discriminator 1
+	ldr	r2, .L883+64
+	b	.L845
+.LVL941:
+.L805:
+	.loc 2 1115 0 is_stmt 0
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+.LVL942:
+	str	r0, [sp, #20]
+.LVL943:
+	.loc 2 1116 0 is_stmt 1
+	bl	FtlBbmIsBadBlock
+.LVL944:
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L804
+	.loc 2 1118 0
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	.loc 2 1120 0
+	ldr	r4, [sp, #8]
+	.loc 2 1118 0
+	lsls	r1, r1, #10
+	.loc 2 1119 0
+	str	r3, [r0, #8]
+	.loc 2 1118 0
+	str	r1, [r0, #4]
+	.loc 2 1120 0
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	.loc 2 1121 0
+	add	r1, fp, #1
+	uxth	fp, r1
+.LVL945:
+.L804:
+	adds	r5, r5, #1
+.LVL946:
+.L845:
+	.loc 2 1113 0 discriminator 1
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L805
+	.loc 2 1124 0
+	cmp	fp, #0
+	bne	.L806
+.LVL947:
+.L843:
+	.loc 2 1109 0
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+.LVL948:
+	b	.L803
+.LVL949:
+.L806:
+	.loc 2 1128 0
+	movs	r7, #0
+	.loc 2 1127 0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.LVL950:
+.L807:
+	.loc 2 1128 0 discriminator 1
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L843
+	.loc 2 1129 0
+	ldr	r3, .L883+52
+	mov	r8, #20
+	mul	r8, r8, r7
+	ldr	r3, [r3]
+	add	r2, r3, r8
+	.loc 2 1132 0
+	ldr	r3, [r3, r8]
+	.loc 2 1129 0
+	ldr	r5, [r2, #4]
+	.loc 2 1130 0
+	ldr	r6, [r2, #12]
+	.loc 2 1132 0
+	adds	r3, r3, #1
+	.loc 2 1129 0
+	ubfx	r5, r5, #10, #16
+.LVL951:
+	.loc 2 1132 0
+	bne	.L810
+	mov	r10, #16
+.L812:
+.LVL952:
+	.loc 2 1134 0
+	ldr	r3, .L883+52
+	.loc 2 1135 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 1134 0
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	.loc 2 1135 0
+	bl	FlashReadPages
+.LVL953:
+	.loc 2 1136 0
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	.loc 2 1137 0
+	ldr	r3, .L883+52
+	ldr	r3, [r3]
+	.loc 2 1136 0
+	bne	.L809
+	.loc 2 1137 0
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	.loc 2 1145 0
+	ldr	r3, .L883+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	bne	.L810
+.LVL954:
+.L811:
+	.loc 2 1287 0
+	movs	r1, #1
+	b	.L882
+.LVL955:
+.L809:
+	.loc 2 1139 0
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L810
+.LVL956:
+	add	r10, r10, #-1
+.LVL957:
+	uxth	r10, r10
+	.loc 2 1133 0 discriminator 2
+	cmp	r10, #0
+	bne	.L812
+	b	.L811
+.L810:
+	.loc 2 1147 0
+	ldr	r3, .L883+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L813
+	.loc 2 1147 0 is_stmt 0 discriminator 1
+	cmp	r2, r3
+	bhi	.L814
+.L813:
+	.loc 2 1149 0 is_stmt 1
+	adds	r2, r3, #1
+	.loc 2 1152 0
+	ittt	ne
+	ldrne	r1, .L883+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L814:
+	.loc 2 1157 0
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L816
+	bhi	.L817
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L818
+.L815:
+.LVL958:
+	adds	r7, r7, #1
+.LVL959:
+	b	.L807
+.LVL960:
+.L817:
+	movw	r3, #61634
+	cmp	r2, r3
+	beq	.L819
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L815
+	.loc 2 1280 0
+	movs	r1, #0
+.L882:
+	.loc 2 1287 0
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+.LVL961:
+	b	.L815
+.L819:
+	.loc 2 1162 0
+	ldr	r3, .L883+8
+	ldrh	r2, [r3]
+	ldr	r3, .L883
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L821
+	.loc 2 1162 0 is_stmt 0 discriminator 1
+	movw	r2, #1162
+	ldr	r1, .L883+72
+	ldr	r0, .L883+76
+	bl	printf
+.LVL962:
+.L821:
+	.loc 2 1163 0 is_stmt 1
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	.loc 2 1165 0
+	ldr	r2, .L883+12
+	.loc 2 1163 0
+	uxth	r10, r1
+	.loc 2 1165 0
+	ldr	ip, [r2]
+	.loc 2 1163 0
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+.LVL963:
+	sxth	r10, r10
+.L822:
+	.loc 2 1163 0 is_stmt 0 discriminator 1
+	cmp	r3, r10
+	bgt	.L828
+	.loc 2 1186 0 is_stmt 1
+	cmp	r3, #0
+	bge	.L860
+	b	.L815
+.L828:
+	.loc 2 1165 0
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L823
+	.loc 2 1167 0
+	ldr	r2, [ip]
+	cbnz	r2, .L824
+	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cmp	r1, r0
+	.loc 2 1172 0 is_stmt 1 discriminator 1
+	ittt	ne
+	ldrne	r2, .L883+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L824:
+	.loc 2 1178 0 discriminator 1
+	ldr	r2, .L883+20
+	.loc 2 1175 0 discriminator 1
+	uxth	r10, r3
+	.loc 2 1178 0 discriminator 1
+	ldr	r0, [r2]
+	movs	r2, #0
+.L825:
+	.loc 2 1175 0 discriminator 1
+	uxth	lr, r2
+	sxth	r1, r2
+.LVL964:
+	cmp	r10, lr
+	bhi	.L826
+	.loc 2 1180 0
+	ldr	r2, [r6, #4]
+	.loc 2 1186 0
+	cmp	r3, #0
+	.loc 2 1180 0
+	str	r2, [r8]
+	.loc 2 1181 0
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	.loc 2 1186 0
+	blt	.L815
+	.loc 2 1193 0
+	ldr	r2, .L883+8
+	ldrh	r0, [r2]
+	ldr	r2, .L883
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L815
+.LVL965:
+.L860:
+	.loc 2 1195 0
+	ldr	r2, .L883+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	.loc 2 1196 0
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	.loc 2 1197 0
+	ldr	r2, .L883+20
+.L880:
+	.loc 2 1241 0
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L815
+.LVL966:
+.L826:
+	.loc 2 1177 0 discriminator 3
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	.loc 2 1178 0 discriminator 3
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	.loc 2 1177 0 discriminator 3
+	str	r4, [ip, r1, lsl #2]
+	.loc 2 1178 0 discriminator 3
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+.LVL967:
+	b	.L825
+.L823:
+	subs	r3, r3, #1
+.LVL968:
+	sxth	r3, r3
+.LVL969:
+	b	.L822
+.L884:
+	.align	2
+.L883:
+	.word	.LANCHOR30
+	.word	.LANCHOR35
+	.word	.LANCHOR147
+	.word	.LANCHOR135
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR132
+	.word	.LANCHOR36
+	.word	.LANCHOR81
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.word	.LANCHOR3
+	.word	.LANCHOR94
+	.word	.LANCHOR120
+	.word	.LANCHOR24
+	.word	.LANCHOR93
+	.word	.LANCHOR13
+	.word	.LANCHOR71
+	.word	.LANCHOR148
+	.word	.LC1
+.LVL970:
+.L818:
+	.loc 2 1203 0
+	ldr	r8, .L885+12
+	ldr	r10, .L885+20
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L831
+	.loc 2 1203 0 is_stmt 0 discriminator 1
+	movw	r2, #1203
+	ldr	r1, .L885
+	ldr	r0, .L885+4
+	bl	printf
+.LVL971:
+.L831:
+	.loc 2 1206 0 is_stmt 1
+	ldr	r2, .L885+8
+	.loc 2 1204 0
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	.loc 2 1206 0
+	ldr	r0, [r2]
+	.loc 2 1204 0
+	add	r10, lr, #-1
+	sxth	r3, r10
+.LVL972:
+	sub	r10, r10, ip
+.L832:
+	.loc 2 1204 0 is_stmt 0 discriminator 1
+	cmp	r3, r10
+	ble	.L837
+	.loc 2 1206 0 is_stmt 1
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L833
+	.loc 2 1208 0
+	ldr	r2, [r0]
+	cbnz	r2, .L834
+	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cmp	lr, ip
+	.loc 2 1216 0 is_stmt 1 discriminator 1
+	ittt	ne
+	ldrne	r2, .L885+12
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L834:
+	.loc 2 1221 0 discriminator 1
+	ldr	r2, .L885+16
+	.loc 2 1218 0 discriminator 1
+	uxth	r10, r3
+	.loc 2 1221 0 discriminator 1
+	ldr	ip, [r2]
+	movs	r2, #0
+.L835:
+	.loc 2 1218 0 discriminator 1
+	uxth	lr, r2
+	sxth	r1, r2
+.LVL973:
+	cmp	r10, lr
+	bhi	.L836
+	.loc 2 1223 0
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	.loc 2 1224 0
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.LVL974:
+.L837:
+	.loc 2 1229 0
+	cmp	r3, #0
+	blt	.L815
+	.loc 2 1237 0
+	ldr	r2, .L885+20
+	ldr	ip, .L885+12
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L815
+	.loc 2 1240 0
+	ldr	r2, [r6, #4]
+	.loc 2 1239 0
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	.loc 2 1240 0
+	str	r2, [r0, r3, lsl #2]
+	.loc 2 1241 0
+	ldr	r2, .L885+16
+	b	.L880
+.LVL975:
+.L836:
+	.loc 2 1220 0 discriminator 3
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	.loc 2 1221 0 discriminator 3
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	.loc 2 1220 0 discriminator 3
+	str	r4, [r0, r1, lsl #2]
+	.loc 2 1221 0 discriminator 3
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+.LVL976:
+	b	.L835
+.L833:
+	subs	r3, r3, #1
+.LVL977:
+	sxth	r3, r3
+.LVL978:
+	b	.L832
+.LVL979:
+.L816:
+	.loc 2 1248 0
+	ldr	r8, .L885+40
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L839
+.L881:
+	.loc 2 1260 0
+	strh	r5, [r8]	@ movhi
+	.loc 2 1261 0
+	str	r3, [r8, #8]
+	b	.L815
+.L839:
+	.loc 2 1255 0
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L840
+	.loc 2 1256 0
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.LVL980:
+.L840:
+	.loc 2 1257 0
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L841
+	.loc 2 1259 0
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L881
+.L841:
+	.loc 2 1265 0
+	strh	r5, [r8, #4]	@ movhi
+	b	.L815
+.LVL981:
+.L844:
+	.loc 2 1292 0
+	ldr	r3, .L885+24
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L846
+.L849:
+	.loc 2 1310 0
+	ldr	r3, .L885+16
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L847
+.L848:
+	.loc 2 1328 0
+	ldr	r3, .L885+28
+	ldrh	r2, [r3]
+	ldr	r3, .L885+32
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L879
+	.loc 2 1328 0 is_stmt 0 discriminator 1
+	mov	r2, #1328
+	ldr	r1, .L885
+	ldr	r0, .L885+4
+	bl	printf
+.LVL982:
+.L879:
+	.loc 2 1330 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL983:
+.L846:
+	.cfi_restore_state
+	.loc 2 1292 0 discriminator 1
+	ldr	r1, .L885+28
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L849
+	.loc 2 1294 0 discriminator 1
+	ldr	r5, .L885+32
+	ldr	r0, [r5]
+.L850:
+	sxth	r1, r3
+.LVL984:
+	cmp	r1, r0
+	bcs	.L849
+	.loc 2 1296 0
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L850
+	.loc 2 1301 0
+	ldr	r3, .L885+36
+	.loc 2 1302 0
+	movs	r6, #0
+	.loc 2 1301 0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L851:
+.LVL985:
+	.loc 2 1298 0 discriminator 1
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L849
+	.loc 2 1300 0 discriminator 3
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	.loc 2 1301 0 discriminator 3
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	.loc 2 1302 0 discriminator 3
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+.LVL986:
+	sxth	r3, r3
+.LVL987:
+	b	.L851
+.LVL988:
+.L847:
+	.loc 2 1310 0 discriminator 1
+	ldr	r3, .L885+12
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L848
+	.loc 2 1312 0 discriminator 1
+	ldr	r5, .L885+20
+	ldrh	r1, [r5]
+.L856:
+	sxth	r3, r2
+.LVL989:
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L848
+	.loc 2 1314 0
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L856
+	.loc 2 1319 0
+	ldr	r2, .L885+8
+	.loc 2 1320 0
+	movs	r0, #0
+	.loc 2 1319 0
+	ldr	r2, [r2]
+.LVL990:
+.L857:
+	.loc 2 1316 0 discriminator 1
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L848
+	.loc 2 1318 0 discriminator 3
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	.loc 2 1319 0 discriminator 3
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	.loc 2 1320 0 discriminator 3
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+.LVL991:
+	b	.L857
+.L886:
+	.align	2
+.L885:
+	.word	.LANCHOR148
+	.word	.LC1
+	.word	.LANCHOR132
+	.word	.LANCHOR35
+	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR129
+	.word	.LANCHOR147
+	.word	.LANCHOR30
+	.word	.LANCHOR135
+	.word	.LANCHOR81
+	.cfi_endproc
+.LFE273:
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+.LFB278:
+	.loc 2 1466 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL992:
+	.loc 2 1472 0
+	ldr	r3, [r0, #16]
+	.loc 2 1477 0
+	movs	r1, #0
+	.loc 2 1466 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 1473 0
+	ldrh	fp, [r0, #6]
+	.loc 2 1466 0
+	mov	r4, r0
+	.loc 2 1483 0
+	movs	r6, #0
+	.loc 2 1470 0
+	ldr	r8, [r0, #24]
+.LVL993:
+	.loc 2 1472 0
+	str	r3, [sp, #12]
+	.loc 2 1474 0
+	ldrh	r3, [r0, #8]
+	.loc 2 1477 0
+	lsl	r2, fp, #2
+	.loc 2 1471 0
+	ldr	r10, [r0, #12]
+.LVL994:
+	.loc 2 1477 0
+	mov	r0, r8
+.LVL995:
+	.loc 2 1478 0
+	ldr	r5, .L914
+	.loc 2 1474 0
+	str	r3, [sp, #4]
+.LVL996:
+	.loc 2 1477 0
+	bl	ftl_memset
+.LVL997:
+	.loc 2 1478 0
+	ldr	r3, .L914+4
+	.loc 2 1483 0
+	str	r6, [r4, #32]
+	.loc 2 1484 0
+	str	r6, [r4, #28]
+	.loc 2 1478 0
+	ldr	r2, [r3]
+	.loc 2 1510 0
+	str	r3, [sp, #8]
+	.loc 2 1478 0
+	str	r2, [r5, #8]
+	.loc 2 1479 0
+	ldr	r2, .L914+8
+	ldr	r7, [r2]
+	.loc 2 1481 0
+	movw	r2, #65535
+	.loc 2 1479 0
+	str	r7, [r5, #12]
+.LVL998:
+	.loc 2 1481 0
+	strh	r2, [r4]	@ movhi
+	.loc 2 1482 0
+	strh	r2, [r4, #2]	@ movhi
+	.loc 2 1485 0
+	movs	r2, #1
+	str	r2, [r4, #36]
+.LVL999:
+.L888:
+	.loc 2 1486 0 discriminator 1
+	ldr	r2, [sp, #4]
+	sxth	r3, r6
+.LVL1000:
+	cmp	r3, r2
+	bge	.L905
+	.loc 2 1488 0
+	ldr	r2, [sp, #4]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	lsl	r2, r3, #1
+	bne	.L889
+	.loc 2 1490 0
+	ldrh	r0, [r10, r3, lsl #1]
+	movs	r1, #1
+	add	r5, r10, r2
+	str	r3, [sp, #4]
+.LVL1001:
+	bl	FtlGetLastWrittenPage
+.LVL1002:
+	.loc 2 1493 0
+	ldr	r3, [sp, #12]
+	.loc 2 1490 0
+	sxth	r10, r0
+.LVL1003:
+	.loc 2 1492 0
+	strh	r6, [r4]	@ movhi
+	.loc 2 1494 0
+	movs	r6, #0
+	.loc 2 1491 0
+	adds	r0, r0, #1
+	.loc 2 1493 0
+	mov	r2, r3
+	ldr	r3, [sp, #4]
+	.loc 2 1491 0
+	strh	r0, [r4, #2]	@ movhi
+	.loc 2 1493 0
+	ldr	r3, [r2, r3, lsl #2]
+	str	r3, [r4, #28]
+.LVL1004:
+	.loc 2 1496 0
+	ldr	r3, .L914
+.LVL1005:
+.L890:
+	sxth	r2, r6
+.LVL1006:
+	.loc 2 1494 0 discriminator 1
+	cmp	r2, r10
+	ble	.L892
+.LVL1007:
+.L905:
+	.loc 2 1547 0
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+.LVL1008:
+	.loc 2 1548 0
+	ldr	r3, .L914+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L894
+	.loc 2 1550 0
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.LVL1009:
+.L894:
+	.loc 2 1553 0
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+.LVL1010:
+	.loc 2 1555 0
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+.LVL1011:
+	.loc 2 1557 0
+	movs	r0, #0
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1012:
+.L892:
+	.cfi_restore_state
+	.loc 2 1496 0
+	ldrh	r1, [r5]
+	.loc 2 1497 0
+	ldr	r0, .L914
+	.loc 2 1496 0
+	str	r3, [sp, #4]
+	orr	r2, r2, r1, lsl #10
+.LVL1013:
+	str	r2, [r3, #4]
+	.loc 2 1497 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1014:
+	.loc 2 1500 0
+	ldr	r3, [sp, #4]
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	beq	.L891
+	.loc 2 1502 0
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L891
+	.loc 2 1502 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
+	cmp	r0, r1
+	.loc 2 1504 0 is_stmt 1 discriminator 1
+	itt	eq
+	ldreq	r1, [r3, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L891:
+.LVL1015:
+	adds	r6, r6, #1
+.LVL1016:
+	b	.L890
+.LVL1017:
+.L889:
+	.loc 2 1510 0
+	ldr	r1, [sp, #8]
+	.loc 2 1511 0
+	add	r2, r10, r2
+	str	r2, [sp, #16]
+	.loc 2 1512 0
+	ldr	r0, .L914
+	.loc 2 1510 0
+	ldr	r1, [r1]
+	str	r1, [r5, #8]
+	.loc 2 1511 0
+	ldrh	r1, [r10, r3, lsl #1]
+	ldr	r3, .L914+12
+.LVL1018:
+	ldrh	r2, [r3]
+	str	r3, [sp, #20]
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	.loc 2 1512 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1019:
+	.loc 2 1515 0
+	ldr	r2, [r5]
+	adds	r2, r2, #1
+	beq	.L907
+	.loc 2 1515 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r7]
+	ldrh	r2, [r4, #4]
+	ldr	r3, [sp, #20]
+	cmp	r1, r2
+	bne	.L907
+	.loc 2 1515 0 discriminator 2
+	ldrh	r1, [r7, #8]
+	movw	r2, #64245
+	cmp	r1, r2
+	beq	.L896
+.L907:
+	movs	r3, #0
+.L897:
+.LVL1020:
+	.loc 2 1530 0 is_stmt 1 discriminator 1
+	ldr	r1, .L914+12
+	sxth	r2, r3
+	ldrh	r1, [r1]
+	cmp	r2, r1
+	bge	.L903
+	str	r3, [sp, #20]
+	.loc 2 1532 0
+	ldr	r3, [sp, #16]
+.LVL1021:
+	.loc 2 1533 0
+	ldr	r0, .L914
+	.loc 2 1532 0
+	ldrh	r1, [r3]
+	orr	r2, r2, r1, lsl #10
+.LVL1022:
+	str	r2, [r5, #4]
+	.loc 2 1533 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1023:
+	.loc 2 1536 0
+	ldr	r2, [r5]
+	ldr	r3, [sp, #20]
+	adds	r2, r2, #1
+	beq	.L901
+	.loc 2 1538 0
+	ldrh	r2, [r7, #8]
+	cmp	fp, r2
+	bls	.L901
+	.loc 2 1538 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r7]
+	cmp	r0, r1
+	.loc 2 1540 0 is_stmt 1 discriminator 1
+	itt	eq
+	ldreq	r1, [r5, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L901:
+.LVL1024:
+	adds	r3, r3, #1
+.LVL1025:
+	b	.L897
+.L896:
+	.loc 2 1518 0 discriminator 1
+	ldrh	r2, [r3]
+	.loc 2 1520 0 discriminator 1
+	movs	r1, #0
+	ldr	r3, [sp, #8]
+	.loc 2 1518 0 discriminator 1
+	subs	r2, r2, #1
+	.loc 2 1520 0 discriminator 1
+	ldr	ip, [r3]
+.L898:
+	sxth	r3, r1
+.LVL1026:
+	.loc 2 1518 0 discriminator 1
+	cmp	r3, r2
+	blt	.L900
+.L903:
+.LVL1027:
+	adds	r6, r6, #1
+.LVL1028:
+	b	.L888
+.LVL1029:
+.L900:
+	.loc 2 1520 0
+	lsls	r0, r3, #3
+	ldr	r3, [ip, r3, lsl #3]
+.LVL1030:
+	adds	r1, r1, #1
+.LVL1031:
+	.loc 2 1521 0
+	uxth	lr, r3
+	cmp	fp, lr
+	.loc 2 1523 0
+	itttt	hi
+	addhi	r0, r0, ip
+	movhi	r3, lr
+.LVL1032:
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r8, r3, lsl #2]
+	b	.L898
+.L915:
+	.align	2
+.L914:
+	.word	.LANCHOR108
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR20
+	.cfi_endproc
+.LFE278:
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+.LFB279:
+	.loc 2 1560 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 1561 0
+	ldr	r3, .L917
+	ldr	r0, .L917+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	.loc 2 1562 0
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	.loc 2 1563 0
+	ldr	r3, .L917+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	.loc 2 1564 0
+	ldr	r3, .L917+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	.loc 2 1565 0
+	ldr	r3, .L917+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	.loc 2 1566 0
+	ldr	r3, .L917+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	.loc 2 1567 0
+	ldr	r3, .L917+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	.loc 2 1568 0
+	ldr	r3, .L917+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	.loc 2 1570 0
+	bl	FtlMapTblRecovery
+.LVL1033:
+	.loc 2 1573 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L918:
+	.align	2
+.L917:
+	.word	.LANCHOR27
+	.word	.LANCHOR149
+	.word	.LANCHOR35
+	.word	.LANCHOR28
+	.word	.LANCHOR36
+	.word	.LANCHOR132
+	.word	.LANCHOR131
+	.word	.LANCHOR133
+	.cfi_endproc
+.LFE279:
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+.LFB280:
+	.loc 2 1576 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 1578 0
+	movs	r1, #0
+	ldr	r5, .L922
+	ldr	r4, .L922+4
+	ldr	r2, [r5]
+	.loc 2 1579 0
+	ldr	r7, .L922+8
+	ldr	r6, .L922+12
+	.loc 2 1578 0
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	.loc 2 1579 0
+	ldr	r8, .L922+44
+	.loc 2 1578 0
+	bl	ftl_memset
+.LVL1034:
+	.loc 2 1579 0
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+.LVL1035:
+	ldr	r3, .L922+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	.loc 2 1584 0
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	.loc 2 1580 0
+	movs	r3, #0
+	.loc 2 1582 0
+	mov	lr, r3
+.LVL1036:
+.L920:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	.loc 2 1580 0 discriminator 1
+	cmp	r2, r1
+	bne	.L921
+	.loc 2 1586 0
+	ldr	r3, .L922+20
+	.loc 2 1588 0
+	ldr	r2, [r5]
+	.loc 2 1586 0
+	strh	r0, [r3, #2]	@ movhi
+	.loc 2 1588 0
+	strh	r2, [r3, #10]	@ movhi
+	.loc 2 1589 0
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	.loc 2 1590 0
+	ldr	r2, .L922+24
+	.loc 2 1587 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 1590 0
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	.loc 2 1591 0
+	ldr	r2, .L922+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	.loc 2 1592 0
+	ldr	r2, .L922+32
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	.loc 2 1593 0
+	ldr	r2, .L922+36
+	ldr	r2, [r2]
+	str	r2, [r3, #16]
+	.loc 2 1594 0
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	.loc 2 1595 0
+	ldr	r2, .L922+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L921:
+	.loc 2 1584 0 discriminator 3
+	bic	r3, r3, #3
+	.loc 2 1582 0 discriminator 3
+	str	lr, [r2, #-8]
+	.loc 2 1584 0 discriminator 3
+	add	r3, r3, ip
+	.loc 2 1583 0 discriminator 3
+	strh	r0, [r2, #-12]	@ movhi
+	.loc 2 1584 0 discriminator 3
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L920
+.L923:
+	.align	2
+.L922:
+	.word	.LANCHOR30
+	.word	.LANCHOR130
+	.word	.LANCHOR23
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.word	.LANCHOR144
+	.word	.LANCHOR147
+	.word	.LANCHOR32
+	.word	.LANCHOR129
+	.word	.LANCHOR135
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.cfi_endproc
+.LFE280:
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+.LFB281:
+	.loc 2 1599 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 1600 0
+	bl	FtlL2PDataInit
+.LVL1037:
+	.loc 2 1602 0
+	ldr	r0, .L925
+	bl	FtlMapTblRecovery
+.LVL1038:
+	.loc 2 1605 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L926:
+	.align	2
+.L925:
+	.word	.LANCHOR144
+	.cfi_endproc
+.LFE281:
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+.LFB210:
+	.loc 3 493 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 496 0
+	movs	r4, #0
+	ldr	r3, .L928
+	.loc 3 497 0
+	movw	r2, #65535
+	.loc 3 502 0
+	mov	r1, r4
+	.loc 3 503 0
+	ldr	r5, .L928+4
+	.loc 3 496 0
+	str	r4, [r3]
+	.loc 3 497 0
+	ldr	r3, .L928+8
+	strh	r2, [r3]	@ movhi
+	.loc 3 500 0
+	mov	r2, #-1
+	.loc 3 498 0
+	ldr	r3, .L928+12
+	str	r4, [r3]
+	.loc 3 499 0
+	ldr	r3, .L928+16
+	str	r4, [r3]
+	.loc 3 500 0
+	ldr	r3, .L928+20
+	str	r2, [r3]
+	.loc 3 501 0
+	ldr	r3, .L928+24
+	strh	r4, [r3]	@ movhi
+	.loc 3 502 0
+	ldr	r3, .L928+28
+	ldrh	r2, [r3]
+	ldr	r3, .L928+32
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1039:
+	.loc 3 503 0
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L928+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1040:
+	.loc 3 504 0
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L928+40
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1041:
+	.loc 3 505 0
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L928+44
+	bl	ftl_memset
+.LVL1042:
+	.loc 3 506 0
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L928+48
+	bl	ftl_memset
+.LVL1043:
+	.loc 3 507 0
+	bl	FtlGcBufInit
+.LVL1044:
+	.loc 3 508 0
+	bl	FtlL2PDataInit
+.LVL1045:
+	.loc 3 510 0
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L929:
+	.align	2
+.L928:
+	.word	.LANCHOR150
+	.word	.LANCHOR6
+	.word	.LANCHOR151
+	.word	.LANCHOR152
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR35
+	.word	.LANCHOR27
+	.word	.LANCHOR36
+	.word	.LANCHOR40
+	.word	.LANCHOR126
+	.word	.LANCHOR79
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE210:
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
+	.align	1
+	.global	SupperBlkListInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+.LFB288:
+	.loc 2 2067 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2071 0
+	movs	r2, #6
+	ldr	r3, .L941
+	movs	r1, #0
+	.loc 2 2072 0
+	movs	r4, #0
+	.loc 2 2071 0
+	ldr	r5, .L941+4
+	.loc 2 2077 0
+	mov	r8, r4
+	.loc 2 2071 0
+	ldrh	r3, [r3]
+	.loc 2 2077 0
+	mov	r6, r4
+	.loc 2 2071 0
+	ldr	r0, [r5]
+	mov	r10, r5
+	muls	r2, r3, r2
+	bl	ftl_memset
+.LVL1046:
+	.loc 2 2072 0
+	ldr	r3, .L941+8
+	.loc 2 2075 0
+	ldr	r2, .L941+12
+	.loc 2 2072 0
+	str	r4, [r3]
+	.loc 2 2073 0
+	ldr	r3, .L941+16
+	.loc 2 2075 0
+	strh	r4, [r2]	@ movhi
+	str	r2, [sp, #4]
+	.loc 2 2073 0
+	str	r4, [r3]
+	.loc 2 2074 0
+	ldr	r3, .L941+20
+	str	r4, [r3]
+	.loc 2 2076 0
+	ldr	r3, .L941+24
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.LVL1047:
+.L931:
+	.loc 2 2079 0 discriminator 1
+	ldr	r3, .L941+28
+	uxth	r7, r4
+.LVL1048:
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcs	.L937
+	.loc 2 2081 0
+	ldr	r3, .L941+32
+	ldrh	r2, [r3]
+	.loc 2 2084 0
+	ldr	r3, .L941+36
+	ldrh	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L938
+.LVL1049:
+.L933:
+	str	r2, [sp, #12]
+	.loc 2 2082 0
+	mov	r1, r7
+	ldr	r2, .L941+40
+	str	r3, [sp, #8]
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL1050:
+	.loc 2 2083 0
+	bl	FtlBbmIsBadBlock
+.LVL1051:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
+	cbnz	r0, .L932
+	.loc 2 2084 0
+	ldr	r1, [sp]
+	add	r5, r5, r1
+.LVL1052:
+	uxth	r5, r5
+.LVL1053:
+.L932:
+	adds	r3, r3, #1
+.LVL1054:
+.L938:
+	.loc 2 2081 0 discriminator 1
+	uxth	r1, r3
+	cmp	r2, r1
+	bhi	.L933
+	.loc 2 2086 0
+	cbz	r5, .L940
+	.loc 2 2087 0
+	mov	r1, r5
+	mov	r0, #32768
+	bl	__aeabi_idiv
+.LVL1055:
+.L934:
+	.loc 2 2088 0
+	ldr	r1, [r10]
+	uxth	r2, r4
+	movs	r3, #6
+	mla	r3, r3, r2, r1
+	strh	r0, [r3, #4]	@ movhi
+	.loc 2 2090 0
+	ldr	r3, .L941+44
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	beq	.L935
+	.loc 2 2091 0 discriminator 1
+	ldr	r3, .L941+48
+	.loc 2 2090 0 discriminator 1
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	beq	.L935
+	.loc 2 2092 0
+	ldr	r3, .L941+52
+	.loc 2 2091 0
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	beq	.L935
+	.loc 2 2094 0
+	ldr	r3, .L941+56
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L936
+	.loc 2 2095 0
+	add	r8, r8, #1
+.LVL1056:
+	.loc 2 2096 0
+	mov	r0, r7
+.LVL1057:
+	.loc 2 2095 0
+	uxth	r8, r8
+.LVL1058:
+	.loc 2 2096 0
+	bl	INSERT_FREE_LIST
+.LVL1059:
+.L935:
+	adds	r4, r4, #1
+.LVL1060:
+	b	.L931
+.LVL1061:
+.L940:
+	mov	r0, r5
+	b	.L934
+.LVL1062:
+.L936:
+	.loc 2 2098 0
+	adds	r6, r6, #1
+.LVL1063:
+	.loc 2 2099 0
+	mov	r0, r7
+.LVL1064:
+	.loc 2 2098 0
+	uxth	r6, r6
+.LVL1065:
+	.loc 2 2099 0
+	bl	INSERT_DATA_LIST
+.LVL1066:
+	b	.L935
+.L937:
+	.loc 2 2103 0
+	ldr	r2, [sp, #4]
+	.loc 2 2104 0
+	strh	r8, [fp]	@ movhi
+	.loc 2 2103 0
+	strh	r6, [r2]	@ movhi
+	.loc 2 2105 0
+	add	r6, r6, r8
+.LVL1067:
+	cmp	r6, r3
+	ble	.L939
+	.loc 2 2105 0 is_stmt 0 discriminator 1
+	movw	r2, #2105
+	ldr	r1, .L941+60
+	ldr	r0, .L941+64
+	bl	printf
+.LVL1068:
+.L939:
+	.loc 2 2107 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1069:
+.L942:
+	.align	2
+.L941:
+	.word	.LANCHOR6
+	.word	.LANCHOR41
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LANCHOR42
+	.word	.LANCHOR44
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR43
+	.word	.LANCHOR155
+	.word	.LC1
+	.cfi_endproc
+.LFE288:
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.ftl_check_vpc,"ax",%progbits
+	.align	1
+	.global	ftl_check_vpc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+.LFB293:
+	.loc 2 2223 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1070:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2232 0
+	movs	r4, #0
+	ldr	r6, .L967
+	.loc 2 2238 0
+	ldr	r5, .L967+4
+	.loc 2 2229 0
+	ldr	r1, .L967+8
+	ldr	r0, .L967+12
+	bl	printf
+.LVL1071:
+	.loc 2 2231 0
+	mov	r2, #8192
+	movs	r1, #0
+	ldr	r0, .L967+4
+	bl	ftl_memset
+.LVL1072:
+.L944:
+	.loc 2 2232 0 discriminator 1
+	ldr	r3, [r6]
+	cmp	r4, r3
+	bcc	.L946
+	.loc 2 2243 0 discriminator 1
+	ldr	r10, .L967+48
+	movs	r4, #0
+.LVL1073:
+	.loc 2 2245 0 discriminator 1
+	ldr	r7, .L967+16
+	mov	r6, r4
+.LVL1074:
+.L947:
+	.loc 2 2243 0 discriminator 1
+	ldrh	r2, [r10]
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L949
+	.loc 2 2255 0
+	ldr	r3, .L967+20
+	ldr	r4, [r3]
+.LVL1075:
+	cbz	r4, .L950
+.LBB238:
+	.loc 2 2257 0
+	ldr	r3, .L967+24
+	.loc 2 2259 0
+	mov	r8, #0
+	.loc 2 2258 0
+	ldr	r5, .L967+28
+	.loc 2 2261 0
+	ldr	r10, .L967+16
+	.loc 2 2257 0
+	ldrh	r7, [r3]
+.LVL1076:
+	.loc 2 2258 0
+	ldr	r3, [r5]
+	.loc 2 2263 0
+	ldr	fp, .L967+4
+	.loc 2 2258 0
+	subs	r4, r4, r3
+	ldr	r3, .L967+32
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+.LVL1077:
+.L951:
+	.loc 2 2259 0 discriminator 1
+	uxth	r3, r8
+	cmp	r7, r3
+	bls	.L950
+	.loc 2 2261 0
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L952
+	.loc 2 2264 0
+	movs	r6, #1
+	.loc 2 2263 0
+	ldrh	r3, [fp, r4, lsl #1]
+	mov	r1, r4
+	ldr	r0, .L967+36
+	bl	printf
+.LVL1078:
+.L952:
+	.loc 2 2266 0
+	movs	r3, #6
+	ldr	r2, [r5]
+	muls	r4, r3, r4
+.LVL1079:
+	movw	r3, #65535
+	add	r8, r8, #1
+.LVL1080:
+	ldrh	r4, [r2, r4]
+	cmp	r4, r3
+	bne	.L951
+.LVL1081:
+.L950:
+.LBE238:
+	.loc 2 2271 0
+	cbz	r6, .L943
+.LVL1082:
+	.loc 2 2271 0 is_stmt 0 discriminator 1
+	movw	r2, #2271
+	ldr	r1, .L967+8
+	ldr	r0, .L967+40
+	bl	printf
+.LVL1083:
+.L943:
+	.loc 2 2272 0 is_stmt 1
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1084:
+.L946:
+	.cfi_restore_state
+	.loc 2 2234 0
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r4
+	bl	log2phys
+.LVL1085:
+	.loc 2 2235 0
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L945
+	.loc 2 2237 0
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1086:
+	.loc 2 2238 0
+	ldrh	r3, [r5, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+.LVL1087:
+.L945:
+	.loc 2 2232 0 discriminator 2
+	adds	r4, r4, #1
+.LVL1088:
+	b	.L944
+.LVL1089:
+.L949:
+	.loc 2 2245 0
+	ldr	r3, [r7]
+	uxth	r5, r4
+	ldr	r8, .L967+4
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r3, [r8, r5, lsl #1]
+	cmp	r2, r3
+	beq	.L948
+	.loc 2 2247 0
+	mov	r1, r5
+	ldr	r0, .L967+44
+	bl	printf
+.LVL1090:
+	.loc 2 2248 0
+	ldr	r3, [r7]
+	movw	r2, #65535
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, r2
+	beq	.L948
+	.loc 2 2248 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r8, r5, lsl #1]
+	.loc 2 2250 0 is_stmt 1 discriminator 1
+	cmp	r2, r3
+	it	hi
+	movhi	r6, #1
+.LVL1091:
+.L948:
+	adds	r4, r4, #1
+.LVL1092:
+	b	.L947
+.L968:
+	.align	2
+.L967:
+	.word	.LANCHOR62
+	.word	check_vpc_table
+	.word	.LANCHOR156
+	.word	.LC91
+	.word	.LANCHOR43
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR41
+	.word	-1431655765
+	.word	.LC93
+	.word	.LC1
+	.word	.LC92
+	.word	.LANCHOR5
+	.cfi_endproc
+.LFE293:
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.align	1
+	.global	FtlGcPageVarInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+.LFB312:
+	.loc 5 202 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 203 0
+	ldr	r2, .L970
+	movs	r3, #0
+	.loc 5 202 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 5 205 0
+	movs	r1, #255
+	ldr	r4, .L970+4
+	.loc 5 203 0
+	strh	r3, [r2]	@ movhi
+	.loc 5 204 0
+	ldr	r2, .L970+8
+	strh	r3, [r2]	@ movhi
+	.loc 5 205 0
+	ldrh	r2, [r4]
+	ldr	r3, .L970+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1093:
+	.loc 5 206 0
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L970+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1094:
+	.loc 5 208 0
+	pop	{r4, lr}
+	.cfi_restore 14
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 5 207 0
+	b	FtlGcBufInit
+.LVL1095:
+.L971:
+	.align	2
+.L970:
+	.word	.LANCHOR98
+	.word	.LANCHOR21
+	.word	.LANCHOR99
+	.word	.LANCHOR97
+	.word	.LANCHOR100
+	.cfi_endproc
+.LFE312:
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+.LFB313:
+	.loc 5 211 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1096:
+	.loc 5 220 0
+	ldr	r3, .L995
+	.loc 5 211 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 5 211 0
+	mov	r5, r0
+	str	r1, [sp, #8]
+	.loc 5 220 0
+	ldrh	r4, [r3]
+.LVL1097:
+	.loc 5 221 0
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L989
+	.loc 5 223 0
+	cbnz	r4, .L973
+.L974:
+	.loc 5 224 0
+	bl	FtlGcPageVarInit
+.LVL1098:
+	b	.L975
+.LVL1099:
+.L989:
+	.loc 5 222 0
+	movs	r4, #0
+.LVL1100:
+.L973:
+	.loc 5 223 0 discriminator 1
+	ldr	r3, .L995+4
+	ldr	r2, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	beq	.L974
+.LVL1101:
+.L975:
+	.loc 5 222 0
+	movs	r7, #0
+.LVL1102:
+.L983:
+	.loc 5 228 0
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	.loc 5 226 0
+	movs	r0, #0
+	strb	r0, [r5, #8]
+.LVL1103:
+	.loc 5 228 0
+	cmp	r2, r3
+	beq	.L976
+.L986:
+.LVL1104:
+	.loc 5 231 0
+	ldr	r3, .L995+8
+	movs	r2, #0
+	add	ip, r5, #16
+	.loc 5 230 0
+	mov	r6, r2
+	.loc 5 233 0
+	movw	lr, #65535
+	.loc 5 234 0
+	mov	r8, #20
+	.loc 5 231 0
+	ldrh	fp, [r3]
+	.loc 5 234 0
+	ldr	r3, .L995+12
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	.loc 5 235 0
+	ldr	r3, .L995+16
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L995+20
+	ldrh	r3, [r3]
+	str	r3, [sp, #16]
+	.loc 5 236 0
+	ldr	r3, .L995+24
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L995+28
+	ldrh	r10, [r3]
+.LVL1105:
+.L977:
+	.loc 5 231 0 discriminator 1
+	uxth	r3, r2
+	cmp	fp, r3
+	bhi	.L979
+	.loc 5 241 0
+	mov	r8, #0
+	.loc 5 242 0
+	mov	fp, #20
+	.loc 5 240 0
+	movs	r2, #0
+.LVL1106:
+	mov	r1, r6
+	ldr	r0, [sp, #4]
+	bl	FlashReadPages
+.LVL1107:
+.L980:
+	.loc 5 241 0 discriminator 1
+	uxth	r3, r8
+	cmp	r6, r3
+	bhi	.L984
+	.loc 5 268 0
+	ldr	r3, [sp, #8]
+	.loc 5 266 0
+	adds	r7, r7, #1
+.LVL1108:
+	.loc 5 264 0
+	adds	r4, r4, #1
+.LVL1109:
+	ldr	r2, .L995+4
+	uxth	r4, r4
+.LVL1110:
+	.loc 5 268 0
+	cmp	r3, r7
+	bls	.L985
+.L987:
+	.loc 5 274 0
+	ldrh	r3, [r2]
+	cmp	r3, r4
+	bhi	.L986
+	.loc 5 265 0
+	movs	r0, #0
+	b	.L976
+.LVL1111:
+.L979:
+	.loc 5 232 0
+	ldrh	r3, [ip], #2
+.LVL1112:
+	.loc 5 233 0
+	cmp	r3, lr
+	beq	.L978
+	.loc 5 234 0
+	ldr	r1, [sp, #4]
+	orr	r3, r4, r3, lsl #10
+.LVL1113:
+	.loc 5 235 0
+	ldr	r0, [sp, #12]
+	.loc 5 234 0
+	mla	r1, r8, r6, r1
+	str	r3, [r1, #4]
+	.loc 5 235 0
+	ldr	r3, [sp, #16]
+	muls	r3, r6, r3
+	bic	r3, r3, #3
+	add	r3, r3, r0
+	.loc 5 236 0
+	ldr	r0, [sp, #20]
+	.loc 5 235 0
+	str	r3, [r1, #8]
+	.loc 5 236 0
+	mul	r3, r10, r6
+	.loc 5 237 0
+	adds	r6, r6, #1
+.LVL1114:
+	uxth	r6, r6
+.LVL1115:
+	.loc 5 236 0
+	bic	r3, r3, #3
+	add	r3, r3, r0
+	str	r3, [r1, #12]
+.L978:
+.LVL1116:
+	adds	r2, r2, #1
+.LVL1117:
+	b	.L977
+.LVL1118:
+.L984:
+	.loc 5 242 0
+	ldr	r3, .L995+12
+	mul	r10, fp, r8
+	ldr	r2, [r3]
+	add	r3, r2, r10
+	str	r2, [sp, #16]
+	ldr	r1, [r3, #4]
+	str	r3, [sp, #12]
+.LVL1119:
+	.loc 5 243 0
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_plane
+.LVL1120:
+	.loc 5 245 0
+	ldr	r2, [sp, #16]
+	ldr	r2, [r2, r10]
+	cbnz	r2, .L981
+	.loc 5 247 0
+	ldr	r3, [sp, #12]
+	.loc 5 248 0
+	movw	r2, #65535
+	add	r8, r8, #1
+.LVL1121:
+	ldr	r1, [sp, #4]
+	.loc 5 247 0
+	ldr	r3, [r3, #12]
+.LVL1122:
+	.loc 5 248 0
+	ldrh	ip, [r3]
+	cmp	ip, r2
+	bne	.L982
+	.loc 5 249 0
+	ldr	r3, .L995+32
+.LVL1123:
+	movs	r2, #1
+	str	r2, [r3]
+.LVL1124:
+.L976:
+	.loc 5 281 0
+	ldr	r3, .L995
+	movw	r2, #65535
+	.loc 5 283 0
+	strb	r0, [r5, #6]
+	.loc 5 284 0
+	mov	r1, r4
+	.loc 5 282 0
+	strh	r4, [r5, #2]	@ movhi
+	.loc 5 281 0
+	strh	r2, [r3]	@ movhi
+	.loc 5 284 0
+	mov	r2, r0
+	mov	r0, r5
+.LVL1125:
+	bl	ftl_sb_update_avl_pages
+.LVL1126:
+	.loc 5 285 0
+	b	.L988
+.LVL1127:
+.L982:
+	.loc 5 252 0
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+.LVL1128:
+	bl	FtlGcUpdatePage
+.LVL1129:
+	b	.L980
+.LVL1130:
+.L981:
+	.loc 5 256 0
+	ldr	r3, .L995+36
+	movs	r4, #0
+.LVL1131:
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 5 257 0
+	ldrh	r0, [r5]
+.LVL1132:
+	bl	INSERT_FREE_LIST
+.LVL1133:
+	.loc 5 258 0
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.LVL1134:
+	.loc 5 260 0
+	bl	FtlGcPageVarInit
+.LVL1135:
+	.loc 5 261 0
+	b	.L983
+.LVL1136:
+.L985:
+	.loc 5 268 0 discriminator 1
+	ldr	r1, .L995
+	movw	r0, #65535
+	ldrh	r3, [r1]
+	cmp	r3, r0
+	beq	.L987
+	.loc 5 269 0
+	add	r3, r3, r7
+	strh	r3, [r1]	@ movhi
+	.loc 5 270 0
+	ldrh	r3, [r2]
+	cmp	r3, r4
+	bls	.L987
+.LVL1137:
+.L988:
+	.loc 5 286 0
+	mov	r0, #-1
+	add	sp, sp, #24
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1138:
+.L996:
+	.align	2
+.L995:
+	.word	.LANCHOR157
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR120
+	.word	.LANCHOR93
+	.word	.LANCHOR23
+	.word	.LANCHOR94
+	.word	.LANCHOR24
+	.word	.LANCHOR153
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE313:
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashTestBlk,"ax",%progbits
+	.align	1
+	.global	FlashTestBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+.LFB346:
+	.loc 1 193 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 88
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1139:
+	.loc 1 198 0
+	cmp	r0, #11
+	.loc 1 193 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	mov	r4, r0
+	sub	sp, sp, #92
+	.cfi_def_cfa_offset 104
+	.loc 1 198 0
+	bls	.L999
+.LVL1140:
+.LBB241:
+.LBB242:
+	.loc 1 202 0
+	ldr	r5, .L1000
+	.loc 1 203 0
+	add	r0, sp, #24
+.LVL1141:
+	.loc 1 204 0
+	movs	r2, #32
+	movs	r1, #165
+	.loc 1 203 0
+	str	r0, [sp, #16]
+	.loc 1 206 0
+	lsls	r4, r4, #10
+.LVL1142:
+	.loc 1 202 0
+	str	r5, [sp, #12]
+	.loc 1 204 0
+	bl	ftl_memset
+.LVL1143:
+	.loc 1 205 0
+	movs	r2, #8
+	movs	r1, #90
+	mov	r0, r5
+	bl	ftl_memset
+.LVL1144:
+	.loc 1 207 0
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	.loc 1 206 0
+	str	r4, [sp, #8]
+	.loc 1 207 0
+	bl	FlashEraseBlocks
+.LVL1145:
+	.loc 1 208 0
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1146:
+	.loc 1 209 0
+	ldr	r4, [sp, #4]
+	.loc 1 215 0
+	movs	r2, #1
+	movs	r1, #0
+	add	r0, sp, #4
+	.loc 1 209 0
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+.LDL1:
+.LVL1147:
+	.loc 1 215 0
+	bl	FlashEraseBlocks
+.LVL1148:
+.L997:
+.LBE242:
+.LBE241:
+	.loc 1 217 0
+	mov	r0, r4
+	add	sp, sp, #92
+	.cfi_remember_state
+	.cfi_def_cfa_offset 12
+	@ sp needed
+	pop	{r4, r5, pc}
+.LVL1149:
+.L999:
+	.cfi_restore_state
+	.loc 1 199 0
+	movs	r4, #0
+	b	.L997
+.L1001:
+	.align	2
+.L1000:
+	.word	ftl_temp_buf
+	.cfi_endproc
+.LFE346:
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+.LFB347:
+	.loc 1 220 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1150:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 223 0
+	mov	r2, #256
+	.loc 1 220 0
+	mov	r5, r1
+	.loc 1 223 0
+	movs	r1, #255
+.LVL1151:
+	.loc 1 220 0
+	mov	r4, r0
+	.loc 1 223 0
+	bl	ftl_memset
+.LVL1152:
+	.loc 1 224 0
+	ldr	r3, .L1009
+	mov	r1, r5
+	mov	r0, r4
+	ldr	r3, [r3]
+	blx	r3
+.LVL1153:
+	uxth	r0, r0
+.LVL1154:
+	.loc 1 225 0
+	cmp	r0, #50
+	bls	.L1003
+	.loc 1 226 0
+	mov	r2, #256
+	movs	r1, #255
+	mov	r0, r4
+.LVL1155:
+	bl	ftl_memset
+.LVL1156:
+	.loc 1 227 0
+	movs	r0, #0
+.LVL1157:
+.L1003:
+	.loc 1 229 0
+	ldr	r3, .L1009+4
+	ldrh	r3, [r3, #14]
+	cmp	r3, #4
+	bne	.L1008
+	add	r1, r4, r0, lsl #1
+	mov	r3, r4
+.L1005:
+	.loc 1 230 0 discriminator 1
+	cmp	r3, r1
+	bne	.L1006
+.L1008:
+	.loc 1 235 0
+	pop	{r3, r4, r5, pc}
+.LVL1158:
+.L1006:
+	.loc 1 231 0 discriminator 3
+	ldrh	r2, [r3]
+	lsrs	r2, r2, #1
+	strh	r2, [r3], #2	@ movhi
+	b	.L1005
+.L1010:
+	.align	2
+.L1009:
+	.word	.LANCHOR107
+	.word	.LANCHOR0
+	.cfi_endproc
+.LFE347:
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+.LFB349:
+	.loc 1 243 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1159:
+	.loc 1 244 0
+	b	memcpy
+.LVL1160:
+	.cfi_endproc
+.LFE349:
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlBbmTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+.LFB229:
+	.loc 4 80 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1161:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 91 0
+	movs	r4, #0
+	.loc 4 88 0
+	ldr	r7, .L1021
+	.loc 4 89 0
+	movs	r1, #0
+	.loc 4 87 0
+	ldr	r5, .L1021+4
+	.loc 4 88 0
+	ldr	r3, [r7]
+	mov	fp, r7
+	.loc 4 87 0
+	ldr	r8, .L1021+48
+	ldr	r6, .L1021+8
+	.loc 4 88 0
+	str	r3, [r5, #12]
+	.loc 4 91 0
+	ldr	r7, .L1021+12
+	.loc 4 89 0
+	ldr	r3, .L1021+16
+	.loc 4 92 0
+	ldr	r10, .L1021+52
+	.loc 4 87 0
+	ldr	r0, [r8]
+	.loc 4 89 0
+	ldrh	r2, [r3]
+	.loc 4 87 0
+	str	r0, [r5, #8]
+	.loc 4 89 0
+	bl	ftl_memset
+.LVL1162:
+.L1013:
+	.loc 4 91 0 discriminator 1
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1014
+	.loc 4 94 0
+	ldr	r6, [r5, #12]
+.LVL1163:
+	.loc 4 95 0
+	movs	r2, #16
+	.loc 4 98 0
+	ldr	r4, .L1021+20
+.LVL1164:
+	.loc 4 95 0
+	movs	r1, #255
+	.loc 4 84 0
+	movs	r7, #0
+	.loc 4 95 0
+	mov	r0, r6
+	bl	ftl_memset
+.LVL1165:
+	.loc 4 97 0
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	.loc 4 98 0
+	ldr	r3, [r4, #8]
+	.loc 4 82 0
+	str	r7, [sp, #12]
+	.loc 4 98 0
+	str	r3, [r6, #4]
+	.loc 4 99 0
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	.loc 4 100 0
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	.loc 4 101 0
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	.loc 4 102 0
+	ldr	r3, .L1021+24
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.LVL1166:
+.L1015:
+	.loc 4 104 0
+	ldr	r3, [r8]
+	.loc 4 107 0
+	ldrh	r1, [r4]
+	ldrh	r2, [r4, #2]
+	.loc 4 104 0
+	str	r3, [r5, #8]
+	.loc 4 105 0
+	ldr	r3, [fp]
+	.loc 4 108 0
+	ldrh	r0, [r6, #10]
+	.loc 4 105 0
+	str	r3, [r5, #12]
+	.loc 4 106 0
+	movs	r3, #0
+	str	r3, [r5]
+	.loc 4 107 0
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	.loc 4 108 0
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1021+28
+	bl	printf
+.LVL1167:
+	.loc 4 109 0
+	movs	r3, #1
+	ldr	r0, .L1021+4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1168:
+	.loc 4 110 0
+	ldr	r3, .L1021+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1016
+	.loc 4 113 0
+	ldr	r3, [r4, #8]
+	.loc 4 117 0
+	mov	r1, #0	@ movhi
+	.loc 4 115 0
+	ldrh	r2, [r4]
+	.loc 4 117 0
+	strh	r1, [r4, #2]	@ movhi
+	.loc 4 113 0
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	.loc 4 114 0
+	str	r3, [r6, #4]
+	.loc 4 115 0
+	strh	r2, [r6, #8]	@ movhi
+	.loc 4 116 0
+	ldrh	r3, [r4, #4]
+	.loc 4 118 0
+	strh	r2, [r4, #4]	@ movhi
+	.loc 4 121 0
+	ldr	r2, .L1021+36
+	.loc 4 116 0
+	strh	r3, [r4]	@ movhi
+	.loc 4 119 0
+	lsls	r3, r3, #10
+	.loc 4 121 0
+	ldr	r0, [r2]
+	.loc 4 122 0
+	movs	r2, #1
+	.loc 4 119 0
+	str	r3, [r5, #4]
+	.loc 4 122 0
+	mov	r1, r2
+	.loc 4 121 0
+	str	r3, [r0, #4]
+	.loc 4 122 0
+	bl	FlashEraseBlocks
+.LVL1169:
+	.loc 4 123 0
+	movs	r3, #1
+	ldr	r0, .L1021+4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1170:
+.L1016:
+	.loc 4 126 0
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	.loc 4 127 0
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1017
+	.loc 4 130 0
+	adds	r7, r7, #1
+.LVL1171:
+	.loc 4 129 0
+	ldr	r1, [r5, #4]
+	.loc 4 130 0
+	uxth	r7, r7
+	.loc 4 129 0
+	ldr	r0, .L1021+40
+	bl	printf
+.LVL1172:
+	.loc 4 131 0
+	cmp	r7, #3
+	bls	.L1015
+	.loc 4 132 0
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1021+44
+	bl	printf
+.LVL1173:
+.L1019:
+	b	.L1019
+.LVL1174:
+.L1014:
+	.loc 4 92 0 discriminator 3
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	.loc 4 91 0 discriminator 3
+	adds	r4, r4, #1
+.LVL1175:
+	.loc 4 92 0 discriminator 3
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+.LVL1176:
+	b	.L1013
+.LVL1177:
+.L1020:
+	movs	r3, #1
+.LVL1178:
+	str	r3, [sp, #12]
+.LVL1179:
+	b	.L1015
+.LVL1180:
+.L1017:
+	.loc 4 139 0
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L1020
+	.loc 4 146 0
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1181:
+.L1022:
+	.align	2
+.L1021:
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR23
+	.word	.LANCHOR37
+	.word	.LANCHOR2
+	.word	.LC94
+	.word	.LANCHOR20
+	.word	.LANCHOR112
+	.word	.LC95
+	.word	.LC96
+	.word	.LANCHOR39
+	.word	.LANCHOR137
+	.cfi_endproc
+.LFE229:
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+.LFB301:
+	.loc 2 2531 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1182:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2531 0
+	mov	r4, r0
+	ldr	r8, .L1061
+.LVL1183:
+.L1024:
+	.loc 2 2537 0
+	ldr	r3, .L1061
+	ldr	r6, .L1061+4
+	ldr	fp, .L1061+76
+	ldrh	r3, [r3]
+	ldrh	r2, [r6]
+	add	r3, r3, r2
+	ldrh	r2, [fp]
+	cmp	r3, r2
+	ble	.L1025
+	.loc 2 2537 0 is_stmt 0 discriminator 1
+	movw	r2, #2537
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1184:
+.L1025:
+	.loc 2 2539 0 is_stmt 1
+	ldr	r3, .L1061+16
+	cmp	r4, r3
+	bne	.L1050
+	.loc 2 2540 0
+	ldr	r2, .L1061+20
+	ldrh	r3, [r8]
+	ldr	r2, [r2]
+	lsrs	r1, r3, #1
+	muls	r2, r3, r2
+	adds	r1, r1, #1
+	add	r1, r1, r2, lsr #2
+	uxth	r1, r1
+.LVL1185:
+	.loc 2 2544 0
+	cbz	r1, .L1026
+	.loc 2 2545 0
+	subs	r1, r1, #1
+.LVL1186:
+	uxth	r1, r1
+.LVL1187:
+.L1026:
+	.loc 2 2546 0
+	ldr	r0, .L1061+24
+	bl	List_pop_index_node
+.LVL1188:
+	ldrh	r3, [r8]
+	mov	r5, r0
+	uxth	r7, r0
+.LVL1189:
+	cbnz	r3, .L1027
+	.loc 2 2546 0 is_stmt 0 discriminator 1
+	movw	r2, #2546
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1190:
+.L1027:
+	.loc 2 2546 0 discriminator 3
+	ldrh	r3, [r8]
+	.loc 2 2550 0 is_stmt 1 discriminator 3
+	mov	r0, r4
+	.loc 2 2546 0 discriminator 3
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	.loc 2 2549 0 discriminator 3
+	strh	r7, [r4]	@ movhi
+	.loc 2 2550 0 discriminator 3
+	bl	make_superblock
+.LVL1191:
+	.loc 2 2551 0 discriminator 3
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1028
+	.loc 2 2555 0
+	ldr	r3, .L1061+28
+	uxth	r5, r5
+	movw	r2, #65535
+	.loc 2 2556 0
+	mov	r0, r7
+	.loc 2 2555 0
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	.loc 2 2556 0
+	bl	INSERT_DATA_LIST
+.LVL1192:
+	.loc 2 2557 0
+	ldrh	r2, [r6]
+	ldrh	r3, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [fp]
+	cmp	r3, r2
+	ble	.L1024
+	.loc 2 2557 0 is_stmt 0 discriminator 1
+	movw	r2, #2557
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1193:
+	b	.L1024
+.LVL1194:
+.L1050:
+	movs	r1, #0
+	b	.L1026
+.LVL1195:
+.L1028:
+	.loc 2 2560 0 is_stmt 1
+	ldrh	r2, [r6]
+	ldrh	r3, [r8]
+	add	r3, r3, r2
+	ldrh	r2, [fp]
+	cmp	r3, r2
+	ble	.L1030
+	.loc 2 2560 0 is_stmt 0 discriminator 1
+	mov	r2, #2560
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1196:
+.L1030:
+	.loc 2 2564 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1061+32
+	movs	r6, #0
+	.loc 2 2563 0 discriminator 1
+	ldr	r2, .L1061+36
+	add	ip, r4, #16
+	.loc 2 2564 0 discriminator 1
+	mov	lr, r6
+	.loc 2 2566 0 discriminator 1
+	movw	r10, #65535
+	.loc 2 2564 0 discriminator 1
+	ldr	r0, [r3]
+	ldrh	r1, [r2]
+	movs	r2, #20
+	.loc 2 2567 0 discriminator 1
+	str	r2, [sp, #4]
+	mov	r3, r0
+	mla	r1, r2, r1, r0
+	str	r1, [sp]
+.L1031:
+.LVL1197:
+	.loc 2 2563 0 discriminator 1
+	ldr	r2, [sp]
+	cmp	r2, r3
+	bne	.L1033
+	.loc 2 2571 0
+	cbnz	r6, .L1034
+	.loc 2 2571 0 is_stmt 0 discriminator 1
+	movw	r2, #2571
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1198:
+.L1034:
+	.loc 2 2573 0 is_stmt 1
+	ldr	r3, .L1061+40
+	ldrh	r3, [r3]
+	cmp	r3, r7
+	bne	.L1035
+	.loc 2 2573 0 is_stmt 0 discriminator 1
+	movw	r2, #2573
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1199:
+.L1035:
+	.loc 2 2574 0 is_stmt 1
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	uxth	r5, r5
+	ldr	r2, .L1061+44
+	ldr	r3, .L1061+48
+	ldr	r10, .L1061+80
+	cmp	r1, #0
+	bne	.L1036
+	.loc 2 2575 0
+	ldr	r0, [r2]
+	ldrh	lr, [r0, r5, lsl #1]
+	cmp	lr, #0
+	beq	.L1037
+	.loc 2 2576 0
+	ldr	r1, .L1061+52
+	ldrh	ip, [r1]
+	add	r1, lr, ip
+.L1060:
+	.loc 2 2578 0
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	.loc 2 2580 0
+	mov	r0, r7
+	.loc 2 2579 0
+	ldr	r1, [r3]
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	adds	r1, r1, #1
+	str	r1, [r3]
+	.loc 2 2580 0
+	movs	r1, #0
+	bl	ftl_set_blk_mode
+.LVL1200:
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
+.L1039:
+	.loc 2 2587 0
+	ldr	r2, [r2]
+	lsls	r1, r5, #1
+	str	r1, [sp]
+	ldrh	r0, [r2, r5, lsl #1]
+	ldr	r2, .L1061+56
+	ldr	r1, [r2]
+	cmp	r0, r1
+	.loc 2 2590 0
+	ldrh	r1, [fp]
+	.loc 2 2588 0
+	it	hi
+	strhi	r0, [r2]
+	.loc 2 2590 0
+	ldr	r2, .L1061+52
+	ldr	r0, [r3]
+	ldr	r3, [r10]
+	ldrh	r2, [r2]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+.LVL1201:
+	ldr	r3, .L1061+60
+	.loc 2 2594 0
+	ldr	ip, .L1061+84
+	.loc 2 2590 0
+	str	r0, [r3]
+	.loc 2 2591 0
+	ldr	r3, .L1061+64
+	ldr	r2, [r3]
+	ldr	r3, [r2, #16]
+	adds	r3, r3, #1
+	str	r3, [r2, #16]
+.LVL1202:
+	movs	r2, #20
+	.loc 2 2594 0
+	ldr	r3, .L1061+32
+	ldr	r0, [r3]
+	adds	r3, r0, #4
+	mla	r2, r2, r6, r0
+	adds	r2, r2, #24
+.LVL1203:
+.L1041:
+	adds	r3, r3, #20
+	.loc 2 2593 0 discriminator 1
+	cmp	r2, r3
+	bne	.L1042
+	.loc 2 2595 0
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	.loc 2 2597 0
+	mov	r10, #0
+	.loc 2 2595 0
+	bl	FlashEraseBlocks
+.LVL1204:
+	.loc 2 2596 0
+	mov	r3, r10
+	.loc 2 2598 0
+	movs	r1, #20
+.LVL1205:
+.L1043:
+	.loc 2 2597 0 discriminator 1
+	uxth	r2, r10
+	cmp	r6, r2
+	bhi	.L1045
+	.loc 2 2608 0
+	cbz	r3, .L1046
+	.loc 2 2609 0
+	mov	r0, r7
+	bl	update_multiplier_value
+.LVL1206:
+	.loc 2 2610 0
+	bl	FtlBbmTblFlush
+.LVL1207:
+.L1046:
+	.loc 2 2613 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r1, .L1061+28
+	cmp	r2, #0
+	bne	.L1047
+	.loc 2 2615 0
+	ldr	r3, [r1]
+	movw	r2, #65535
+	.loc 2 2616 0
+	mov	r0, r7
+	.loc 2 2615 0
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	.loc 2 2616 0
+	bl	INSERT_DATA_LIST
+.LVL1208:
+	.loc 2 2617 0
+	b	.L1024
+.LVL1209:
+.L1033:
+	.loc 2 2566 0
+	ldrh	r1, [ip], #2
+	.loc 2 2564 0
+	str	lr, [r3, #8]
+	.loc 2 2565 0
+	str	lr, [r3, #12]
+	.loc 2 2566 0
+	cmp	r1, r10
+	beq	.L1032
+	.loc 2 2567 0
+	ldr	r2, [sp, #4]
+	lsls	r1, r1, #10
+	mla	r2, r2, r6, r0
+	.loc 2 2568 0
+	adds	r6, r6, #1
+.LVL1210:
+	uxth	r6, r6
+.LVL1211:
+	.loc 2 2567 0
+	str	r1, [r2, #4]
+.L1032:
+	adds	r3, r3, #20
+	b	.L1031
+.L1037:
+	.loc 2 2578 0
+	movs	r1, #2
+	b	.L1060
+.L1036:
+	.loc 2 2582 0
+	ldr	r0, [r2]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	ldrh	r1, [r0, r5, lsl #1]
+	adds	r1, r1, #1
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+.LBB243:
+.LBB244:
+	mov	r0, r7
+.LBE244:
+.LBE243:
+	.loc 2 2583 0
+	ldr	r1, [r10]
+	adds	r1, r1, #1
+	str	r1, [r10]
+.LVL1212:
+.LBB246:
+.LBB245:
+	bl	ftl_set_blk_mode.part.7
+.LVL1213:
+	ldm	sp, {r2, r3}
+	b	.L1039
+.LVL1214:
+.L1042:
+.LBE245:
+.LBE246:
+	.loc 2 2594 0 discriminator 3
+	ldr	r1, [r3, #-20]
+	and	r1, r1, ip
+	str	r1, [r3, #-20]
+	b	.L1041
+.LVL1215:
+.L1045:
+	.loc 2 2598 0
+	ldr	r0, .L1061+32
+	mul	r2, r1, r10
+	ldr	r0, [r0]
+	add	ip, r0, r2
+	ldr	r2, [r0, r2]
+	adds	r0, r2, #1
+	bne	.L1044
+	.loc 2 2600 0
+	ldr	r0, [ip, #4]
+	.loc 2 2599 0
+	adds	r3, r3, #1
+.LVL1216:
+	str	r1, [sp, #12]
+	str	r2, [sp, #8]
+	.loc 2 2601 0
+	ubfx	r0, r0, #10, #16
+	.loc 2 2599 0
+	str	r3, [sp, #4]
+.LVL1217:
+	.loc 2 2601 0
+	bl	FtlBbmMapBadBlock
+.LVL1218:
+	.loc 2 2602 0
+	ldr	r2, [sp, #8]
+	add	r0, r4, r10, lsl #1
+	.loc 2 2603 0
+	ldr	r1, [sp, #12]
+	ldr	r3, [sp, #4]
+	.loc 2 2602 0
+	strh	r2, [r0, #16]	@ movhi
+	.loc 2 2603 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.LVL1219:
+.L1044:
+	add	r10, r10, #1
+.LVL1220:
+	b	.L1043
+.LVL1221:
+.L1047:
+	.loc 2 2620 0
+	ldr	r3, .L1061+68
+	.loc 2 2624 0
+	ldr	r0, .L1061+72
+	.loc 2 2620 0
+	ldrh	r3, [r3]
+	.loc 2 2621 0
+	strh	r7, [r4]	@ movhi
+	.loc 2 2620 0
+	smulbb	r3, r3, r2
+	.loc 2 2622 0
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	.loc 2 2623 0
+	strb	r2, [r4, #6]
+	.loc 2 2624 0
+	ldr	r2, [r0]
+	.loc 2 2620 0
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 2624 0
+	str	r2, [r4, #12]
+	adds	r2, r2, #1
+	str	r2, [r0]
+	.loc 2 2625 0
+	ldr	r2, [r1]
+	ldr	r1, [sp]
+	strh	r3, [r2, r1]	@ movhi
+	.loc 2 2626 0
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1048
+	.loc 2 2626 0 is_stmt 0 discriminator 2
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1049
+.L1048:
+	.loc 2 2626 0 discriminator 3
+	movw	r2, #2626
+	ldr	r1, .L1061+8
+	ldr	r0, .L1061+12
+	bl	printf
+.LVL1222:
+.L1049:
+	.loc 2 2628 0 is_stmt 1
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1223:
+.L1062:
+	.align	2
+.L1061:
+	.word	.LANCHOR48
+	.word	.LANCHOR45
+	.word	.LANCHOR158
+	.word	.LC1
+	.word	.LANCHOR53
+	.word	.LANCHOR89
+	.word	.LANCHOR47
+	.word	.LANCHOR43
+	.word	.LANCHOR112
+	.word	.LANCHOR3
+	.word	.LANCHOR82
+	.word	.LANCHOR40
+	.word	.LANCHOR73
+	.word	.LANCHOR14
+	.word	.LANCHOR77
+	.word	.LANCHOR75
+	.word	.LANCHOR127
+	.word	.LANCHOR19
+	.word	.LANCHOR71
+	.word	.LANCHOR5
+	.word	.LANCHOR74
+	.word	-1024
+	.cfi_endproc
+.LFE301:
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeBadSuperBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+.LFB320:
+	.loc 5 390 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1224:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 390 0
+	mov	r10, r0
+	.loc 5 395 0
+	ldr	r4, .L1075
+	ldrh	r3, [r4]
+	cbz	r3, .L1064
+.LBB249:
+.LBB250:
+	.loc 5 399 0
+	ldr	r8, .L1075+16
+.LBE250:
+.LBE249:
+	movs	r6, #0
+.LVL1225:
+.L1065:
+.LBB253:
+.LBB251:
+	.loc 5 396 0
+	ldr	r3, .L1075+4
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L1071
+	.loc 5 412 0
+	bl	FtlGcReFreshBadBlk
+.LVL1226:
+.L1064:
+.LBE251:
+.LBE253:
+	.loc 5 415 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1227:
+.L1071:
+	.cfi_restore_state
+.LBB254:
+.LBB252:
+	.loc 5 397 0
+	ldr	r2, .L1075+8
+	uxth	r3, r6
+	mov	r1, r10
+	movs	r7, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+.LVL1228:
+	.loc 5 401 0
+	ldr	r2, .L1075+12
+	.loc 5 397 0
+	mov	fp, r0
+.LVL1229:
+.L1066:
+	.loc 5 398 0
+	ldrh	r3, [r4]
+	uxth	r5, r7
+.LVL1230:
+	cmp	r3, r5
+	bhi	.L1070
+.LVL1231:
+	adds	r6, r6, #1
+.LVL1232:
+	b	.L1065
+.LVL1233:
+.L1070:
+	.loc 5 399 0
+	uxth	r3, r7
+	ldrh	r1, [r8, r3, lsl #1]
+	cmp	r1, fp
+	bne	.L1067
+	.loc 5 401 0
+	mov	r1, fp
+	mov	r0, r2
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	bl	printf
+.LVL1234:
+	.loc 5 403 0
+	mov	r0, fp
+	bl	FtlBbmMapBadBlock
+.LVL1235:
+	.loc 5 404 0
+	bl	FtlBbmTblFlush
+.LVL1236:
+	ldr	r3, [sp, #4]
+	.loc 5 405 0
+	ldrh	r1, [r4]
+	ldr	r2, [sp]
+	add	r3, r8, r3, lsl #1
+.LVL1237:
+.L1068:
+	cmp	r5, r1
+	bcc	.L1069
+	.loc 5 407 0
+	subs	r1, r1, #1
+	strh	r1, [r4]	@ movhi
+.LVL1238:
+.L1067:
+	adds	r7, r7, #1
+.LVL1239:
+	b	.L1066
+.LVL1240:
+.L1069:
+	.loc 5 406 0
+	ldrh	r0, [r3, #2]!
+	.loc 5 405 0
+	adds	r5, r5, #1
+.LVL1241:
+	uxth	r5, r5
+.LVL1242:
+	.loc 5 406 0
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1068
+.L1076:
+	.align	2
+.L1075:
+	.word	.LANCHOR103
+	.word	.LANCHOR3
+	.word	.LANCHOR13
+	.word	.LC97
+	.word	.LANCHOR104
+.LBE252:
+.LBE254:
+	.cfi_endproc
+.LFE320:
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
+.LFB304:
+	.loc 2 2687 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1243:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2687 0
+	mov	r4, r0
+	.loc 2 2688 0
+	ldr	r3, .L1087
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1078
+	.loc 2 2689 0
+	ldr	r2, .L1087+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L1079
+	.loc 2 2691 0
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L1080:
+.LVL1244:
+.LBB257:
+.LBB258:
+	.loc 2 2696 0
+	ldr	r5, .L1087+8
+	mov	r1, r4
+	ldr	r0, .L1087+12
+.LVL1245:
+	bl	List_remove_node
+.LVL1246:
+	ldrh	r3, [r5]
+	cbnz	r3, .L1082
+	movw	r2, #2696
+	ldr	r1, .L1087+16
+	ldr	r0, .L1087+20
+	bl	printf
+.LVL1247:
+.L1082:
+	ldrh	r3, [r5]
+	.loc 2 2697 0
+	mov	r0, r4
+	.loc 2 2696 0
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	.loc 2 2697 0
+	bl	free_data_superblock
+.LVL1248:
+	.loc 2 2698 0
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+.LVL1249:
+	.loc 2 2699 0
+	ldr	r3, .L1087+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1087+28
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1086
+	movw	r2, #2699
+	ldr	r1, .L1087+16
+	ldr	r0, .L1087+20
+	bl	printf
+.LVL1250:
+.L1086:
+	movs	r3, #1
+	b	.L1077
+.LVL1251:
+.L1079:
+.LBE258:
+.LBE257:
+	.loc 2 2692 0
+	ldr	r2, .L1087+32
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1077
+	.loc 2 2692 0 is_stmt 0 discriminator 1
+	ldr	r2, .L1087+36
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1077
+	.loc 2 2692 0 discriminator 2
+	ldr	r2, .L1087+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1080
+.LVL1252:
+.L1077:
+	.loc 2 2705 0 is_stmt 1
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.LVL1253:
+.L1078:
+	.loc 2 2702 0
+	bl	List_update_data_list
+.LVL1254:
+	.loc 2 2704 0
+	movs	r3, #0
+	b	.L1077
+.L1088:
+	.align	2
+.L1087:
+	.word	.LANCHOR43
+	.word	.LANCHOR82
+	.word	.LANCHOR45
+	.word	.LANCHOR42
+	.word	.LANCHOR159
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR5
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.cfi_endproc
+.LFE304:
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
+	.align	1
+	.global	decrement_vpc_count
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+.LFB305:
+	.loc 2 2708 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1255:
+	.loc 2 2711 0
+	movw	r3, #65535
+	.loc 2 2708 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2711 0
+	cmp	r0, r3
+	.loc 2 2708 0
+	mov	r4, r0
+	.loc 2 2711 0
+	beq	.L1090
+	.loc 2 2712 0
+	ldr	r5, .L1098
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1091
+	.loc 2 2713 0
+	mov	r1, r0
+	ldr	r0, .L1098+4
+.LVL1256:
+	bl	printf
+.LVL1257:
+	.loc 2 2714 0
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L1092
+.L1096:
+	.loc 2 2723 0
+	movs	r5, #0
+.LVL1258:
+.L1089:
+	.loc 2 2733 0
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.LVL1259:
+.L1092:
+	.loc 2 2714 0 discriminator 1
+	movw	r2, #2714
+.LVL1260:
+.L1097:
+	.loc 2 2730 0 discriminator 2
+	ldr	r1, .L1098+8
+	ldr	r0, .L1098+12
+	bl	printf
+.LVL1261:
+	b	.L1089
+.LVL1262:
+.L1091:
+	.loc 2 2717 0
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1090:
+	.loc 2 2721 0
+	ldr	r6, .L1098+16
+	movw	r3, #65535
+	ldrh	r0, [r6]
+.LVL1263:
+	cmp	r0, r3
+	bne	.L1094
+	.loc 2 2722 0
+	strh	r4, [r6]	@ movhi
+	b	.L1096
+.L1094:
+	.loc 2 2724 0
+	cmp	r4, r0
+	beq	.L1096
+	.loc 2 2727 0
+	bl	update_vpc_list
+.LVL1264:
+	.loc 2 2730 0
+	ldr	r3, .L1098+20
+	.loc 2 2727 0
+	adds	r5, r0, #0
+	.loc 2 2730 0
+	ldr	r2, .L1098+24
+	.loc 2 2727 0
+	it	ne
+	movne	r5, #1
+.LVL1265:
+	.loc 2 2729 0
+	strh	r4, [r6]	@ movhi
+	.loc 2 2730 0
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1098+28
+	muls	r3, r2, r3
+	ldr	r2, .L1098
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L1089
+	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cmp	r4, r1
+	beq	.L1089
+	.loc 2 2730 0 discriminator 2
+	movw	r2, #2730
+	b	.L1097
+.L1099:
+	.align	2
+.L1098:
+	.word	.LANCHOR43
+	.word	.LC98
+	.word	.LANCHOR160
+	.word	.LC1
+	.word	.LANCHOR151
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	-1431655765
+	.cfi_endproc
+.LFE305:
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlWriteDump_data,"ax",%progbits
+	.align	1
+	.global	FtlWriteDump_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
+.LFB271:
+	.loc 2 947 0 is_stmt 1
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 948 0
+	ldr	r4, .L1119
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1101
+	.loc 2 948 0 is_stmt 0 discriminator 1
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1101
+	.loc 2 949 0 is_stmt 1
+	ldr	r3, .L1119+4
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1101
+.LVL1266:
+.LBB262:
+.LBB263:
+	.loc 2 956 0
+	ldrb	r7, [r4, #10]	@ zero_extendqisi2
+	cbnz	r7, .L1100
+	.loc 2 951 0
+	ldr	r3, .L1119+8
+	.loc 2 958 0
+	mov	r2, r7
+	mov	r1, sp
+	.loc 2 951 0
+	ldr	r6, [r3]
+	.loc 2 953 0
+	ldr	r3, .L1119+12
+	.loc 2 951 0
+	subs	r6, r6, #1
+	.loc 2 958 0
+	mov	r0, r6
+	.loc 2 953 0
+	ldrh	r8, [r3]
+	.loc 2 958 0
+	bl	log2phys
+.LVL1267:
+	.loc 2 963 0
+	ldr	r2, .L1119+16
+	.loc 2 961 0
+	ldr	r3, [sp]
+	.loc 2 962 0
+	str	r6, [sp, #20]
+	.loc 2 963 0
+	ldr	r0, [r2]
+	.loc 2 964 0
+	ldr	r2, .L1119+20
+	.loc 2 961 0
+	str	r3, [sp, #8]
+	.loc 2 967 0
+	adds	r3, r3, #1
+	.loc 2 963 0
+	str	r0, [sp, #12]
+	.loc 2 964 0
+	ldr	r5, [r2]
+	str	r5, [sp, #16]
+.LVL1268:
+	.loc 2 966 0
+	str	r7, [r5, #4]
+	.loc 2 967 0
+	beq	.L1103
+	.loc 2 969 0
+	mov	r2, r7
+	movs	r1, #1
+	add	r0, sp, #4
+	bl	FlashReadPages
+.LVL1269:
+.L1104:
+	.loc 2 986 0
+	ldr	fp, .L1119
+	.loc 2 953 0
+	lsl	r8, r8, #2
+.LVL1270:
+	.loc 2 987 0
+	ldr	r10, .L1119+28
+	.loc 2 975 0
+	movs	r7, #0
+	movw	r3, #61589
+	strh	r3, [r5]	@ movhi
+.L1105:
+	.loc 2 976 0
+	cmp	r8, r7
+	bne	.L1109
+.L1106:
+	.loc 2 992 0
+	movs	r3, #1
+.LVL1271:
+.L1118:
+.LBE263:
+.LBE262:
+	.loc 2 998 0
+	strb	r3, [r4, #10]
+.L1100:
+	.loc 2 1000 0
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1272:
+.L1103:
+	.cfi_restore_state
+.LBB265:
+.LBB264:
+	.loc 2 973 0
+	ldr	r3, .L1119+24
+	movs	r1, #255
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.LVL1273:
+	b	.L1104
+.LVL1274:
+.L1109:
+	.loc 2 978 0
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	beq	.L1106
+	.loc 2 983 0
+	ldr	r3, [sp, #8]
+	.loc 2 986 0
+	mov	r0, fp
+	.loc 2 982 0
+	str	r6, [r5, #8]
+	adds	r7, r7, #1
+	.loc 2 983 0
+	str	r3, [r5, #12]
+	.loc 2 984 0
+	ldrh	r3, [r4]
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 986 0
+	bl	get_new_active_ppa
+.LVL1275:
+	.loc 2 987 0
+	ldr	r3, [r10]
+	.loc 2 988 0
+	movs	r1, #1
+	.loc 2 986 0
+	str	r0, [sp, #8]
+	.loc 2 988 0
+	add	r0, sp, #4
+	.loc 2 987 0
+	str	r3, [r5, #4]
+	adds	r3, r3, #1
+	adds	r2, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r10]
+	.loc 2 988 0
+	movs	r3, #0
+	mov	r2, r3
+	bl	FlashProgPages
+.LVL1276:
+	.loc 2 990 0
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+.LVL1277:
+	b	.L1105
+.LVL1278:
+.L1101:
+.LBE264:
+.LBE265:
+	.loc 2 998 0
+	movs	r3, #0
+	b	.L1118
+.L1120:
+	.align	2
+.L1119:
+	.word	.LANCHOR51
+	.word	.LANCHOR19
+	.word	.LANCHOR62
+	.word	.LANCHOR3
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR23
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE271:
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
+.LFB264:
+	.loc 2 740 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 746 0
+	movs	r4, #0
+	ldr	r5, .L1125
+	.loc 2 747 0
+	ldr	r6, .L1125+4
+	.loc 2 744 0
+	bl	FtlWriteDump_data
+.LVL1279:
+.L1122:
+	.loc 2 746 0 discriminator 1
+	ldrh	r3, [r5]
+	uxth	r0, r4
+.LVL1280:
+	cmp	r3, r0
+	bhi	.L1124
+	.loc 2 750 0
+	movs	r0, #0
+.LVL1281:
+	pop	{r4, r5, r6, pc}
+.LVL1282:
+.L1124:
+	.loc 2 747 0
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1123
+	.loc 2 748 0
+	bl	flush_l2p_region
+.LVL1283:
+.L1123:
+	adds	r4, r4, #1
+.LVL1284:
+	b	.L1122
+.L1126:
+	.align	2
+.L1125:
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.cfi_endproc
+.LFE264:
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+.LFB284:
+	.loc 2 1656 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1285:
+	.loc 2 1670 0
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	.loc 2 1656 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r8, r0
+	sub	sp, sp, #48
+	.cfi_def_cfa_offset 80
+	.loc 2 1670 0
+	cmp	r3, r2
+	beq	.L1256
+	.loc 2 1675 0
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #4]
+.LVL1286:
+	.loc 2 1676 0
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	.loc 2 1681 0
+	ldr	r1, [sp, #4]
+	.loc 2 1676 0
+	str	r3, [sp, #20]
+.LVL1287:
+	.loc 2 1681 0
+	ldr	r3, .L1264
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	mov	r3, #0
+	bne	.L1130
+	.loc 2 1682 0
+	strh	r3, [r0, #4]	@ movhi
+.LVL1288:
+.L1262:
+	.loc 2 1989 0
+	strb	r3, [r8, #6]
+.LVL1289:
+.L1256:
+	.loc 2 2010 0
+	movs	r0, #0
+	add	sp, sp, #48
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1290:
+.L1130:
+	.cfi_restore_state
+	.loc 2 1689 0
+	ldrh	r0, [r0, #16]
+.LVL1291:
+.L1131:
+	.loc 2 1690 0
+	cmp	r0, r2
+	uxth	r5, r3
+.LVL1292:
+	add	r3, r3, #1
+	beq	.L1132
+	.loc 2 1697 0
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
+.LVL1293:
+	mov	r4, r0
+.LVL1294:
+	.loc 2 1705 0
+	adds	r0, r0, #1
+.LVL1295:
+	beq	.L1133
+	.loc 2 1717 0
+	ldr	r3, .L1264+4
+	.loc 2 1722 0
+	movs	r2, #0
+	mov	r5, r2
+.LVL1296:
+	.loc 2 1719 0
+	movw	fp, #65535
+	.loc 2 1720 0
+	mov	r10, #20
+	.loc 2 1717 0
+	ldrh	ip, [r3]
+	.loc 2 1720 0
+	ldr	r3, .L1264+8
+	ldr	r0, [r3]
+	.loc 2 1721 0
+	ldr	r3, .L1264+12
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1264+16
+	ldrh	r7, [r3]
+	.loc 2 1722 0
+	ldr	r3, .L1264+20
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1264+24
+	ldrh	lr, [r3]
+	add	r3, r8, #16
+	str	r3, [sp, #16]
+	str	r3, [sp]
+.L1134:
+.LVL1297:
+	.loc 2 1717 0 discriminator 1
+	uxth	r3, r2
+	cmp	ip, r3
+	bhi	.L1138
+	.loc 2 1727 0
+	movs	r2, #0
+.LVL1298:
+	mov	r1, r5
+	bl	FlashReadPages
+.LVL1299:
+	.loc 2 1728 0
+	ldr	r2, .L1264+28
+	.loc 2 1742 0
+	uxth	r1, r4
+	.loc 2 1666 0
+	movw	fp, #65535
+	.loc 2 1742 0
+	str	r1, [sp, #12]
+	.loc 2 1728 0
+	ldr	r3, [r2]
+	subs	r3, r3, #1
+	str	r3, [sp]
+.LVL1300:
+	.loc 2 1730 0
+	ldr	r3, .L1264+8
+.LVL1301:
+	ldr	r10, [r3]
+	.loc 2 1729 0
+	movs	r3, #0
+	mov	r7, r10
+.LVL1302:
+.L1139:
+	uxth	r1, r3
+.LVL1303:
+	.loc 2 1729 0 is_stmt 0 discriminator 1
+	cmp	r5, r1
+	bhi	.L1144
+	.loc 2 1745 0 is_stmt 1
+	bne	.L1142
+	.loc 2 1747 0
+	adds	r3, r4, #1
+	uxth	r3, r3
+	str	r3, [sp, #8]
+.LVL1304:
+.L1257:
+	.loc 2 1753 0
+	ldr	r0, [r10, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+.LVL1305:
+	.loc 2 1758 0
+	ldr	r3, .L1264
+	.loc 2 1753 0
+	mov	r10, r0
+.LVL1306:
+	.loc 2 1758 0
+	ldr	r2, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bne	.L1146
+	.loc 2 1759 0
+	ldrh	r3, [sp, #8]
+	strh	r3, [r8, #2]	@ movhi
+	.loc 2 1760 0
+	movs	r3, #0
+	strb	r3, [r8, #6]
+	.loc 2 1761 0
+	strh	r3, [r8, #4]	@ movhi
+.L1146:
+	.loc 2 1764 0
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #4]
+	cmp	r3, r2
+	bne	.L1147
+	.loc 2 1764 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #20]
+	cmp	r10, r3
+	bne	.L1147
+	.loc 2 1765 0 is_stmt 1
+	ldr	r1, [sp, #8]
+	mov	r2, r10
+.LVL1307:
+.L1263:
+	.loc 2 2004 0
+	mov	r0, r8
+	bl	ftl_sb_update_avl_pages
+.LVL1308:
+	b	.L1256
+.LVL1309:
+.L1132:
+	.loc 2 1692 0
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r8, r1, lsl #1]
+.LVL1310:
+	b	.L1131
+.LVL1311:
+.L1133:
+	.loc 2 1706 0
+	ldr	r3, [sp, #4]
+	cbz	r3, .L1135
+	.loc 2 1706 0 is_stmt 0 discriminator 1
+	movw	r2, #1706
+	ldr	r1, .L1264+32
+	ldr	r0, .L1264+36
+	bl	printf
+.LVL1312:
+.L1135:
+	.loc 2 1707 0 is_stmt 1
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1136
+	.loc 2 1707 0 is_stmt 0 discriminator 1
+	cmp	r5, r3
+	beq	.L1136
+	.loc 2 1707 0 discriminator 2
+	movw	r2, #1707
+	ldr	r1, .L1264+32
+	ldr	r0, .L1264+36
+	bl	printf
+.LVL1313:
+.L1136:
+	.loc 2 1708 0 is_stmt 1
+	movs	r3, #0
+	strh	r3, [r8, #2]	@ movhi
+	b	.L1262
+.LVL1314:
+.L1138:
+	.loc 2 1718 0
+	ldr	r1, [sp]
+	ldrh	r3, [r1], #2
+	.loc 2 1719 0
+	cmp	r3, fp
+	.loc 2 1718 0
+	str	r1, [sp]
+.LVL1315:
+	.loc 2 1719 0
+	beq	.L1137
+	.loc 2 1720 0
+	mla	r1, r10, r5, r0
+	.loc 2 1721 0
+	ldr	r6, [sp, #8]
+	.loc 2 1720 0
+	orr	r3, r4, r3, lsl #10
+.LVL1316:
+	str	r3, [r1, #4]
+	.loc 2 1721 0
+	mul	r3, r7, r5
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	.loc 2 1722 0
+	ldr	r6, [sp, #12]
+	.loc 2 1721 0
+	str	r3, [r1, #8]
+	.loc 2 1722 0
+	mul	r3, lr, r5
+	.loc 2 1723 0
+	adds	r5, r5, #1
+.LVL1317:
+	uxth	r5, r5
+.LVL1318:
+	.loc 2 1722 0
+	bic	r3, r3, #3
+	add	r3, r3, r6
+	str	r3, [r1, #12]
+.L1137:
+.LVL1319:
+	adds	r2, r2, #1
+.LVL1320:
+	b	.L1134
+.LVL1321:
+.L1144:
+	.loc 2 1730 0
+	ldr	r1, [r7]
+.LVL1322:
+	cbnz	r1, .L1140
+	.loc 2 1731 0
+	ldr	r1, [r7, #12]
+	.loc 2 1732 0
+	ldr	r6, [r1, #4]
+	.loc 2 1731 0
+	str	r1, [sp, #8]
+.LVL1323:
+	.loc 2 1732 0
+	adds	r1, r6, #1
+.LVL1324:
+	beq	.L1141
+	.loc 2 1733 0
+	ldr	r1, [r2]
+	mov	r0, r6
+	bl	ftl_cmp_data_ver
+.LVL1325:
+	cbz	r0, .L1141
+	.loc 2 1735 0
+	adds	r6, r6, #1
+	str	r6, [r2]
+.L1141:
+	.loc 2 1738 0
+	ldr	r1, [sp, #8]
+	ldr	r1, [r1]
+	adds	r1, r1, #1
+	bne	.L1143
+.LVL1326:
+.L1142:
+	.loc 2 1752 0
+	uxth	r2, r4
+	.loc 2 1753 0
+	uxth	r3, r3
+	.loc 2 1752 0
+	str	r2, [sp, #8]
+.LVL1327:
+	.loc 2 1753 0
+	movs	r2, #20
+	mla	r10, r2, r3, r10
+	b	.L1257
+.LVL1328:
+.L1140:
+	.loc 2 1742 0
+	ldr	fp, [sp, #12]
+.LVL1329:
+.L1143:
+	adds	r3, r3, #1
+.LVL1330:
+	adds	r7, r7, #20
+	b	.L1139
+.LVL1331:
+.L1147:
+	.loc 2 1770 0
+	movw	r3, #65535
+	cmp	fp, r3
+	bne	.L1148
+	.loc 2 1770 0 is_stmt 0 discriminator 1
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1149
+.L1148:
+.LVL1332:
+.LBB266:
+	.loc 2 1775 0 is_stmt 1
+	ldr	r3, .L1264+40
+	.loc 2 1774 0
+	uxth	r6, r4
+.LVL1333:
+	.loc 2 1778 0
+	uxth	r4, r4
+.LVL1334:
+	.loc 2 1785 0
+	ldr	r7, .L1264+8
+	.loc 2 1775 0
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	.loc 2 1776 0
+	itt	eq
+	ldreq	r2, [sp]
+	streq	r2, [r3]
+.LVL1335:
+	.loc 2 1778 0
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #7
+	cmp	r4, r3
+	.loc 2 1779 0
+	itet	gt
+	subgt	r4, r6, #7
+	ldrle	r4, [sp, #4]
+	uxthgt	r4, r4
+.LVL1336:
+.L1152:
+	.loc 2 1780 0 discriminator 1
+	cmp	r4, r6
+	bhi	.L1162
+	.loc 2 1782 0
+	ldr	r3, .L1264+4
+	.loc 2 1784 0
+	movw	lr, #65535
+	.loc 2 1785 0
+	ldr	r0, [r7]
+	mov	ip, #20
+	.loc 2 1782 0
+	ldrh	fp, [r3]
+	.loc 2 1785 0
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #12]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L1163
+.LVL1337:
+.L1154:
+	.loc 2 1783 0
+	ldr	r1, [sp, #12]
+	ldrh	r2, [r1], #2
+	.loc 2 1784 0
+	cmp	r2, lr
+	.loc 2 1783 0
+	str	r1, [sp, #12]
+.LVL1338:
+	.loc 2 1784 0
+	beq	.L1153
+	.loc 2 1785 0
+	mla	r1, ip, r5, r0
+	.loc 2 1786 0
+	adds	r5, r5, #1
+.LVL1339:
+	.loc 2 1785 0
+	orr	r2, r4, r2, lsl #10
+.LVL1340:
+	.loc 2 1786 0
+	uxth	r5, r5
+.LVL1341:
+	.loc 2 1785 0
+	str	r2, [r1, #4]
+.L1153:
+.LVL1342:
+	adds	r3, r3, #1
+.LVL1343:
+.L1163:
+	.loc 2 1782 0 discriminator 1
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L1154
+	.loc 2 1789 0
+	mov	r1, r5
+	movs	r2, #0
+	bl	FlashReadPages
+.LVL1344:
+	ldr	r3, .L1264+40
+	movs	r1, #20
+	.loc 2 1790 0
+	movs	r0, #0
+	.loc 2 1793 0
+	movw	ip, #65535
+	ldr	r2, [r3]
+	ldr	r3, [r7]
+	mla	r5, r1, r5, r3
+.LVL1345:
+.L1155:
+	.loc 2 1790 0 discriminator 1
+	cmp	r3, r5
+	bne	.L1160
+	cbz	r0, .L1161
+	ldr	r3, .L1264+40
+	str	r2, [r3]
+.L1161:
+	.loc 2 1780 0
+	adds	r4, r4, #1
+.LVL1346:
+	uxth	r4, r4
+.LVL1347:
+	b	.L1152
+.L1265:
+	.align	2
+.L1264:
+	.word	.LANCHOR19
+	.word	.LANCHOR3
+	.word	.LANCHOR120
+	.word	.LANCHOR93
+	.word	.LANCHOR23
+	.word	.LANCHOR94
+	.word	.LANCHOR24
+	.word	.LANCHOR72
+	.word	.LANCHOR161
+	.word	.LC1
+	.word	.LANCHOR154
+.L1160:
+	.loc 2 1791 0
+	ldr	r1, [r3]
+	cmp	r1, #0
+	beq	.L1156
+	cbz	r0, .L1149
+.L1258:
+	.loc 2 1809 0
+	ldr	r3, .L1266
+	str	r2, [r3]
+.LVL1348:
+.L1149:
+.LBE266:
+	.loc 2 1814 0
+	ldr	r3, .L1266+4
+	movs	r2, #1
+	.loc 2 1815 0
+	ldr	r0, .L1266+8
+	.loc 2 1824 0
+	ldr	r6, .L1266+12
+	.loc 2 1814 0
+	strh	r2, [r3]	@ movhi
+	.loc 2 1815 0
+	bl	FtlMapBlkWriteDump_data
+.LVL1349:
+	ldr	fp, [sp, #4]
+.LVL1350:
+.L1164:
+	.loc 2 1821 0
+	ldr	r3, .L1266+16
+	.loc 2 1823 0
+	movw	lr, #65535
+	.loc 2 1824 0
+	ldr	r0, [r6]
+	movs	r7, #20
+	.loc 2 1821 0
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r3]
+	movs	r3, #0
+	.loc 2 1820 0
+	str	r3, [sp, #12]
+.LVL1351:
+.L1165:
+	.loc 2 1821 0 discriminator 1
+	uxth	r2, r3
+	cmp	r2, r4
+	bcc	.L1167
+	.loc 2 1828 0
+	movs	r2, #0
+	ldr	r1, [sp, #12]
+	bl	FlashReadPages
+.LVL1352:
+	.loc 2 1829 0
+	movs	r3, #0
+.LVL1353:
+.L1261:
+	str	r3, [sp, #24]
+.LVL1354:
+	.loc 2 1829 0 is_stmt 0 discriminator 2
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #24]
+	cmp	r2, r3
+	bhi	.L1196
+	.loc 2 1983 0 is_stmt 1
+	ldr	r3, .L1266+20
+	.loc 2 1982 0
+	add	fp, fp, #1
+.LVL1355:
+	uxth	fp, fp
+.LVL1356:
+	.loc 2 1983 0
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L1164
+	.loc 2 1986 0
+	ldr	r2, .L1266+16
+	.loc 2 1988 0
+	movw	r0, #65535
+	.loc 2 1985 0
+	movs	r3, #0
+	.loc 2 1984 0
+	strh	fp, [r8, #2]	@ movhi
+	.loc 2 1985 0
+	strh	r3, [r8, #4]	@ movhi
+.LVL1357:
+	.loc 2 1986 0
+	ldrh	r2, [r2]
+.LVL1358:
+.L1197:
+	.loc 2 1986 0 is_stmt 0 discriminator 1
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L1256
+	.loc 2 1987 0 is_stmt 1
+	ldr	r1, [sp, #16]
+	ldrh	r4, [r1], #2
+	.loc 2 1988 0
+	cmp	r4, r0
+	.loc 2 1987 0
+	str	r1, [sp, #16]
+.LVL1359:
+	add	r1, r3, #1
+	.loc 2 1988 0
+	bne	.L1262
+	mov	r3, r1
+.LVL1360:
+	b	.L1197
+.LVL1361:
+.L1156:
+.LBB267:
+	.loc 2 1792 0
+	ldr	r1, [r3, #12]
+.LVL1362:
+	.loc 2 1793 0
+	ldrh	lr, [r1]
+	cmp	lr, ip
+	beq	.L1159
+	.loc 2 1795 0
+	ldr	r1, [r1, #4]
+.LVL1363:
+	cmp	r1, #-1
+	itt	ne
+	movne	r2, r1
+	movne	r0, #1
+.L1159:
+	adds	r3, r3, #20
+.LVL1364:
+	b	.L1155
+.LVL1365:
+.L1162:
+	.loc 2 1809 0
+	mov	r2, #-1
+	b	.L1258
+.LVL1366:
+.L1167:
+.LBE267:
+	.loc 2 1822 0
+	ldrh	r2, [r1], #2
+.LVL1367:
+	.loc 2 1823 0
+	cmp	r2, lr
+	beq	.L1166
+	.loc 2 1824 0
+	ldr	r5, [sp, #12]
+	orr	r2, fp, r2, lsl #10
+.LVL1368:
+	mla	ip, r7, r5, r0
+	str	r2, [ip, #4]
+	.loc 2 1825 0
+	mov	r2, r5
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #12]
+.LVL1369:
+.L1166:
+	adds	r3, r3, #1
+.LVL1370:
+	b	.L1165
+.LVL1371:
+.L1196:
+	ldr	r3, [sp, #24]
+	movs	r5, #20
+	muls	r5, r3, r5
+	.loc 2 1830 0
+	ldr	r3, [r6]
+	str	r3, [sp, #28]
+	adds	r7, r3, r5
+	ldr	r4, [r7, #4]
+	.loc 2 1831 0
+	ubfx	r0, r4, #10, #16
+	.loc 2 1830 0
+	str	r4, [sp, #44]
+	.loc 2 1831 0
+	bl	P2V_plane
+.LVL1372:
+	.loc 2 1833 0
+	ldr	r3, [sp, #4]
+	cmp	fp, r3
+	bcc	.L1169
+	.loc 2 1833 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #28]
+	bne	.L1170
+	.loc 2 1834 0 is_stmt 1
+	ldr	r2, [sp, #20]
+	cmp	r2, r0
+	bhi	.L1169
+.L1170:
+	.loc 2 1837 0
+	ldr	r2, [sp, #8]
+	cmp	fp, r2
+	bne	.L1171
+	.loc 2 1837 0 is_stmt 0 discriminator 1
+	cmp	r10, r0
+	beq	.L1172
+.L1171:
+.LVL1373:
+	.loc 2 1841 0 is_stmt 1
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L1173
+	.loc 2 1842 0
+	ldr	r3, [r7, #12]
+.LVL1374:
+	.loc 2 1843 0
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L1174
+.LVL1375:
+.L1180:
+.LBB268:
+	.loc 2 1876 0
+	ldrh	r0, [r8]
+.LVL1376:
+.L1260:
+.LBE268:
+	.loc 2 1960 0
+	bl	decrement_vpc_count
+.LVL1377:
+.L1169:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	b	.L1261
+.LVL1378:
+.L1174:
+	.loc 2 1849 0
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+.LVL1379:
+	.loc 2 1850 0
+	adds	r2, r2, #1
+.LVL1380:
+	beq	.L1175
+	.loc 2 1851 0 discriminator 1
+	ldr	r2, .L1266+24
+	ldr	r0, [sp]
+.LVL1381:
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+.LVL1382:
+	.loc 2 1850 0 discriminator 1
+	cbz	r0, .L1175
+	.loc 2 1853 0
+	ldr	r1, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L1175:
+	.loc 2 1857 0
+	ldr	r4, [r3, #8]
+.LVL1383:
+	.loc 2 1859 0
+	add	r1, sp, #40
+	.loc 2 1858 0
+	ldr	r3, [r3, #12]
+.LVL1384:
+	.loc 2 1859 0
+	movs	r2, #0
+	mov	r0, r4
+	.loc 2 1858 0
+	str	r3, [sp, #36]
+	.loc 2 1859 0
+	bl	log2phys
+.LVL1385:
+	.loc 2 1860 0
+	ldr	r3, .L1266
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L1176
+	.loc 2 1861 0 discriminator 1
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+.LVL1386:
+	.loc 2 1860 0 discriminator 1
+	cmp	r0, #0
+	beq	.L1176
+.LBB269:
+	.loc 2 1865 0
+	ldr	r3, [sp, #36]
+	adds	r7, r3, #1
+	beq	.L1177
+	.loc 2 1866 0
+	ldr	r0, [r6]
+	.loc 2 1868 0
+	movs	r2, #0
+	movs	r1, #1
+	.loc 2 1866 0
+	add	r0, r0, r5
+	.loc 2 1867 0
+	str	r3, [r0, #4]
+	.loc 2 1866 0
+	ldr	r7, [r0, #12]
+.LVL1387:
+	.loc 2 1868 0
+	bl	FlashReadPages
+.LVL1388:
+	.loc 2 1881 0
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L1178
+.LVL1389:
+.L1179:
+	.loc 2 1913 0
+	mov	r3, #-1
+	.loc 2 1914 0
+	ldrh	r0, [r8]
+	.loc 2 1913 0
+	str	r3, [sp, #36]
+	.loc 2 1914 0
+	bl	decrement_vpc_count
+.LVL1390:
+.L1187:
+.LBE269:
+	.loc 2 1954 0
+	ldr	r7, [sp, #36]
+	adds	r0, r7, #1
+	beq	.L1169
+.L1200:
+	.loc 2 1956 0
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+.LVL1391:
+	.loc 2 1957 0
+	ldr	r3, .L1266+28
+	.loc 2 1956 0
+	mov	r4, r0
+.LVL1392:
+	.loc 2 1957 0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1192
+	.loc 2 1957 0 is_stmt 0 discriminator 1
+	movw	r2, #1957
+	ldr	r1, .L1266+32
+	ldr	r0, .L1266+36
+.LVL1393:
+	bl	printf
+.LVL1394:
+.L1192:
+	.loc 2 1958 0 is_stmt 1
+	ldr	r3, .L1266+40
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	beq	.L1193
+	.loc 2 1960 0
+	mov	r0, r4
+	b	.L1260
+.LVL1395:
+.L1177:
+.LBB270:
+	.loc 2 1872 0
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	bne	.L1180
+	.loc 2 1873 0
+	movs	r2, #1
+	add	r1, sp, #36
+	mov	r0, r4
+	bl	log2phys
+.LVL1396:
+	b	.L1180
+.LVL1397:
+.L1178:
+	.loc 2 1881 0 discriminator 1
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L1179
+	.loc 2 1882 0 discriminator 2
+	ldr	r0, .L1266
+	.loc 2 1869 0 discriminator 2
+	ldr	r1, [r7, #4]
+	.loc 2 1882 0 discriminator 2
+	ldr	r0, [r0]
+	.loc 2 1869 0 discriminator 2
+	str	r1, [sp, #28]
+	.loc 2 1882 0 discriminator 2
+	bl	ftl_cmp_data_ver
+.LVL1398:
+	.loc 2 1881 0 discriminator 2
+	cmp	r0, #0
+	beq	.L1179
+	.loc 2 1883 0
+	ldr	r1, [sp, #40]
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	bne	.L1182
+.L1185:
+	.loc 2 1909 0
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+.LVL1399:
+	b	.L1179
+.L1182:
+	.loc 2 1886 0
+	ldr	r0, [sp, #36]
+	cmp	r1, r0
+	beq	.L1179
+	.loc 2 1887 0
+	adds	r0, r1, #1
+	beq	.L1183
+.LVL1400:
+	.loc 2 1889 0
+	str	r1, [r3, #4]
+	.loc 2 1890 0
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r3
+	.loc 2 1888 0
+	ldr	r7, [r3, #12]
+	.loc 2 1890 0
+	bl	FlashReadPages
+.LVL1401:
+.L1184:
+	.loc 2 1895 0
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L1185
+	.loc 2 1896 0
+	ldr	r3, [r7, #4]
+.LVL1402:
+	.loc 2 1897 0
+	ldr	r2, .L1266
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+.LVL1403:
+	cmp	r0, #0
+	beq	.L1185
+	.loc 2 1898 0
+	mov	r1, r3
+	ldr	r0, [sp, #28]
+	bl	ftl_cmp_data_ver
+.LVL1404:
+	cmp	r0, #0
+	beq	.L1179
+.LVL1405:
+	b	.L1185
+.LVL1406:
+.L1183:
+	.loc 2 1892 0
+	str	r1, [r2, r5]
+	b	.L1184
+.L1267:
+	.align	2
+.L1266:
+	.word	.LANCHOR154
+	.word	.LANCHOR162
+	.word	.LANCHOR144
+	.word	.LANCHOR120
+	.word	.LANCHOR3
+	.word	.LANCHOR19
+	.word	.LANCHOR72
+	.word	.LANCHOR5
+	.word	.LANCHOR161
+	.word	.LC1
+	.word	.LANCHOR43
+.LVL1407:
+.L1176:
+.LBE270:
+	.loc 2 1915 0
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	beq	.L1187
+	.loc 2 1917 0
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+.LVL1408:
+	.loc 2 1918 0
+	ldr	r7, [sp, #40]
+	adds	r5, r7, #1
+	beq	.L1187
+	.loc 2 1918 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #36]
+	cmp	r7, r3
+	beq	.L1200
+	.loc 2 1919 0 is_stmt 1
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+.LVL1409:
+	.loc 2 1921 0
+	ldr	r3, .L1268
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1191
+	.loc 2 1922 0 discriminator 1
+	ldr	r3, .L1268+4
+	.loc 2 1921 0 discriminator 1
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L1191
+	.loc 2 1923 0
+	ldr	r3, .L1268+8
+	.loc 2 1922 0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1187
+.L1191:
+.LVL1410:
+.LBB271:
+	.loc 2 1927 0
+	ldr	r0, [r6]
+.LVL1411:
+	.loc 2 1930 0
+	movs	r2, #0
+	movs	r1, #1
+	.loc 2 1929 0
+	str	r7, [r0, #4]
+	.loc 2 1927 0
+	ldr	r5, [r0, #12]
+.LVL1412:
+	.loc 2 1930 0
+	bl	FlashReadPages
+.LVL1413:
+	.loc 2 1933 0
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L1187
+	.loc 2 1934 0
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp]
+	bl	ftl_cmp_data_ver
+.LVL1414:
+	cmp	r0, #0
+	bne	.L1187
+	.loc 2 1941 0
+	movs	r2, #1
+	add	r1, sp, #40
+.LVL1415:
+	mov	r0, r4
+	bl	log2phys
+.LVL1416:
+	b	.L1187
+.LVL1417:
+.L1193:
+.LBE271:
+	.loc 2 1962 0
+	mov	r1, r4
+	ldr	r0, .L1268+12
+	bl	printf
+.LVL1418:
+	b	.L1169
+.LVL1419:
+.L1173:
+	.loc 2 1969 0
+	ldr	r3, .L1268+16
+	ldr	r3, [r3]
+	cmp	r3, #31
+	bhi	.L1194
+	.loc 2 1970 0
+	ldr	r2, .L1268+20
+	str	r4, [r2, r3, lsl #2]
+	.loc 2 1971 0
+	adds	r3, r3, #1
+	ldr	r2, .L1268+16
+	str	r3, [r2]
+.L1194:
+	.loc 2 1973 0
+	ldrh	r0, [r8]
+.LVL1420:
+	bl	decrement_vpc_count
+.LVL1421:
+	.loc 2 1975 0
+	ldr	r3, .L1268+24
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L1195
+	.loc 2 1976 0
+	ldr	r2, [sp]
+.L1259:
+	.loc 2 1978 0
+	str	r2, [r3]
+	b	.L1169
+.L1195:
+	.loc 2 1977 0
+	ldr	r1, [sp]
+	cmp	r1, r2
+	bcs	.L1169
+	.loc 2 1978 0
+	mov	r2, r1
+	b	.L1259
+.LVL1422:
+.L1172:
+	.loc 2 2002 0
+	strb	r10, [r8, #6]
+	.loc 2 2004 0
+	mov	r2, r10
+	.loc 2 2003 0
+	strh	fp, [r8, #2]	@ movhi
+	.loc 2 2004 0
+	mov	r1, fp
+	b	.L1263
+.L1269:
+	.align	2
+.L1268:
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LC99
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR154
+	.cfi_endproc
+.LFE284:
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+.LFB291:
+	.loc 2 2156 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1423:
+	push	{r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 20
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	mov	r4, r0
+	.loc 2 2169 0
+	ldr	r6, .L1281
+	.loc 2 2156 0
+	sub	sp, sp, #28
+	.cfi_def_cfa_offset 48
+	.loc 2 2162 0
+	movs	r5, #7
+	.loc 2 2170 0
+	ldr	r7, .L1281+4
+.LVL1424:
+.L1271:
+	.loc 2 2162 0
+	subs	r5, r5, #1
+.LVL1425:
+	beq	.L1273
+.LVL1426:
+	.loc 2 2163 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1272
+.LVL1427:
+.L1273:
+	.loc 2 2183 0
+	ldr	r3, .L1281+8
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 2 2184 0
+	ldr	r3, .L1281+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 2185 0
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	.loc 2 2186 0
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 2188 0
+	add	sp, sp, #28
+	.cfi_remember_state
+	.cfi_def_cfa_offset 20
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.LVL1428:
+.L1272:
+	.cfi_restore_state
+	.loc 2 2165 0
+	mov	r0, r4
+	bl	get_new_active_ppa
+.LVL1429:
+	str	r0, [sp, #8]
+	.loc 2 2166 0
+	adds	r0, r0, #1
+	beq	.L1273
+	.loc 2 2170 0
+	ldr	r1, [r7]
+	.loc 2 2168 0
+	mov	r3, #-1
+	.loc 2 2169 0
+	ldr	r2, [r6]
+	.loc 2 2178 0
+	ldr	r0, .L1281+16
+	.loc 2 2168 0
+	str	r3, [sp, #20]
+	.loc 2 2170 0
+	str	r1, [sp, #16]
+.LVL1430:
+	.loc 2 2169 0
+	str	r2, [sp, #12]
+	.loc 2 2174 0
+	str	r3, [r1, #12]
+	.loc 2 2178 0
+	ldr	r2, [r0]
+	.loc 2 2173 0
+	str	r3, [r1, #8]
+	.loc 2 2175 0
+	ldrh	r3, [r4]
+	.loc 2 2178 0
+	str	r2, [r1, #4]
+	adds	r2, r2, #1
+	.loc 2 2175 0
+	strh	r3, [r1, #2]	@ movhi
+	.loc 2 2176 0
+	movs	r3, #0
+	strh	r3, [r1]	@ movhi
+	.loc 2 2178 0
+	adds	r1, r2, #1
+.LVL1431:
+	it	eq
+	moveq	r2, r3
+	.loc 2 2179 0
+	movs	r1, #1
+	.loc 2 2178 0
+	str	r2, [r0]
+	.loc 2 2179 0
+	mov	r2, r3
+	add	r0, sp, #4
+	bl	FlashProgPages
+.LVL1432:
+	.loc 2 2180 0
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+.LVL1433:
+	b	.L1271
+.L1282:
+	.align	2
+.L1281:
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR43
+	.word	.LANCHOR19
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE291:
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+.LFB232:
+	.loc 4 173 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 4 180 0
+	ldr	r8, .L1312+40
+	ldr	r4, .L1312
+	ldr	r3, [r8]
+	.loc 4 184 0
+	ldr	r7, .L1312+4
+	.loc 4 186 0
+	mov	r10, r4
+	.loc 4 180 0
+	str	r3, [r4, #8]
+	.loc 4 181 0
+	ldr	r3, .L1312+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+.LVL1434:
+	.loc 4 183 0
+	bl	FtlBbtMemInit
+.LVL1435:
+	.loc 4 184 0
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.LVL1436:
+.L1284:
+	.loc 4 184 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r7]
+	subs	r3, r3, #15
+	cmp	r3, r5
+	bgt	.L1287
+	.loc 4 185 0 is_stmt 1
+	lsls	r3, r5, #10
+	.loc 4 186 0
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	.loc 4 185 0
+	str	r3, [r4, #4]
+	.loc 4 186 0
+	bl	FlashReadPages
+.LVL1437:
+	.loc 4 187 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1285
+	.loc 4 188 0
+	ldr	r3, [r4, #4]
+	.loc 4 189 0
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	.loc 4 188 0
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	.loc 4 189 0
+	bl	FlashReadPages
+.LVL1438:
+.L1285:
+	.loc 4 191 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1286
+	.loc 4 196 0
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1286
+	.loc 4 198 0
+	ldr	r3, .L1312+12
+	.loc 4 199 0
+	ldr	r2, [r6, #4]
+	.loc 4 198 0
+	strh	r5, [r3]	@ movhi
+	.loc 4 199 0
+	str	r2, [r3, #8]
+	.loc 4 200 0
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L1287:
+	.loc 4 216 0
+	ldr	r5, .L1312+12
+.LVL1439:
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L1301
+	.loc 4 222 0
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L1291
+	.loc 4 224 0
+	lsls	r3, r3, #10
+	.loc 4 225 0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L1312
+	.loc 4 224 0
+	str	r3, [r4, #4]
+	.loc 4 225 0
+	bl	FlashReadPages
+.LVL1440:
+	.loc 4 226 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1291
+	.loc 4 229 0
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1291
+	.loc 4 229 0 is_stmt 0 discriminator 1
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1291
+	.loc 4 231 0 is_stmt 1
+	ldrh	r2, [r5, #4]
+	.loc 4 232 0
+	str	r3, [r5, #8]
+	.loc 4 233 0
+	ldrh	r3, [r6, #8]
+	.loc 4 231 0
+	strh	r2, [r5]	@ movhi
+	.loc 4 233 0
+	strh	r3, [r5, #4]	@ movhi
+.L1291:
+	.loc 4 245 0
+	ldr	r10, .L1312
+	.loc 4 238 0
+	movs	r1, #1
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+.LVL1441:
+	sxth	r7, r0
+.LVL1442:
+	.loc 4 239 0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L1293:
+	.loc 4 241 0
+	cmp	r7, #0
+	bge	.L1296
+	.loc 4 254 0
+	movs	r2, #254
+	ldr	r1, .L1312+16
+	ldr	r0, .L1312+20
+	bl	printf
+.LVL1443:
+.L1295:
+	.loc 4 255 0
+	ldrh	r3, [r6, #10]
+	.loc 4 257 0
+	ldrh	r0, [r6, #12]
+	.loc 4 255 0
+	strh	r3, [r5, #6]	@ movhi
+	.loc 4 257 0
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1298
+	.loc 4 259 0
+	ldr	r3, .L1312+24
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L1298
+	.loc 4 259 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1312+28
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1298
+	.loc 4 261 0 is_stmt 1
+	cmp	r0, r3
+	bcs	.L1298
+	.loc 4 263 0
+	bl	FtlSysBlkNumInit
+.LVL1444:
+.L1298:
+	ldr	r6, .L1312+32
+.LVL1445:
+	.loc 4 173 0 discriminator 1
+	movs	r5, #0
+	.loc 4 268 0 discriminator 1
+	ldr	r7, .L1312+36
+.LVL1446:
+	.loc 4 269 0 discriminator 1
+	ldr	r8, .L1312+44
+.L1299:
+.LVL1447:
+	.loc 4 268 0 discriminator 1
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1300
+	.loc 4 275 0
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL1448:
+.L1286:
+	.loc 4 184 0 discriminator 2
+	subs	r5, r5, #1
+.LVL1449:
+	uxth	r5, r5
+.LVL1450:
+	b	.L1284
+.LVL1451:
+.L1296:
+	.loc 4 243 0
+	ldrh	r3, [r5]
+	.loc 4 245 0
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	.loc 4 243 0
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	.loc 4 244 0
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	.loc 4 245 0
+	bl	FlashReadPages
+.LVL1452:
+	.loc 4 247 0
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1294
+	.loc 4 247 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L1295
+.L1294:
+	subs	r7, r7, #1
+.LVL1453:
+	sxth	r7, r7
+.LVL1454:
+	b	.L1293
+.LVL1455:
+.L1300:
+	.loc 4 269 0 is_stmt 1 discriminator 3
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	.loc 4 268 0 discriminator 3
+	adds	r5, r5, #1
+.LVL1456:
+	.loc 4 269 0 discriminator 3
+	bl	ftl_memcpy
+.LVL1457:
+	b	.L1299
+.LVL1458:
+.L1301:
+	.loc 4 218 0
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL1459:
+.L1313:
+	.align	2
+.L1312:
+	.word	.LANCHOR108
+	.word	.LANCHOR17
+	.word	.LANCHOR109
+	.word	.LANCHOR37
+	.word	.LANCHOR165
+	.word	.LC1
+	.word	.LANCHOR2
+	.word	.LANCHOR6
+	.word	.LANCHOR37+24
+	.word	.LANCHOR10
+	.word	.LANCHOR39
+	.word	.LANCHOR137
+	.cfi_endproc
+.LFE232:
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+.LFB234:
+	.loc 4 317 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 327 0
+	movs	r6, #0
+	ldr	r7, .L1333
+	.loc 4 325 0
+	bl	FtlBbtMemInit
+.LVL1460:
+	sub	r8, r7, #18
+	.loc 4 326 0
+	bl	FtlLoadFactoryBbt
+.LVL1461:
+.L1315:
+	.loc 4 327 0 discriminator 1
+	ldr	r3, .L1333+4
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1321
+	.loc 4 381 0 discriminator 1
+	ldr	r5, .L1333+8
+	movs	r4, #0
+.L1322:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+.LVL1462:
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L1323
+	.loc 4 387 0
+	ldr	r4, .L1333+12
+	.loc 4 396 0
+	movw	r6, #65535
+.LVL1463:
+	.loc 4 387 0
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.LVL1464:
+.L1324:
+	.loc 4 387 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1328
+	.loc 4 389 0 is_stmt 1
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+.LVL1465:
+	cmp	r0, #1
+	beq	.L1325
+	.loc 4 391 0
+	mov	r0, r5
+	bl	FlashTestBlk
+.LVL1466:
+	cmp	r0, #0
+	beq	.L1326
+	.loc 4 393 0
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.LVL1467:
+.L1325:
+	.loc 4 387 0 discriminator 2
+	subs	r5, r5, #1
+.LVL1468:
+	uxth	r5, r5
+.LVL1469:
+	b	.L1324
+.LVL1470:
+.L1321:
+	.loc 4 328 0
+	ldr	r3, .L1333+16
+	.loc 4 329 0
+	ldr	r5, .L1333+20
+	.loc 4 331 0
+	ldrh	r2, [r8, #2]!
+	.loc 4 328 0
+	ldr	r4, .L1333+24
+	ldr	r0, [r3]
+	.loc 4 331 0
+	movw	r3, #65535
+	.loc 4 329 0
+	ldr	r10, [r5]
+	.loc 4 331 0
+	cmp	r2, r3
+	mov	fp, r4
+	ldr	r3, .L1333+28
+	.loc 4 328 0
+	str	r0, [r4, #8]
+	.loc 4 329 0
+	str	r10, [r4, #12]
+.LVL1471:
+	.loc 4 331 0
+	beq	.L1316
+	.loc 4 333 0
+	ldrh	r5, [r3]
+	.loc 4 335 0
+	mov	r0, r4
+	.loc 4 333 0
+	str	r3, [sp]
+	mla	r5, r6, r5, r2
+.LVL1472:
+	.loc 4 334 0
+	lsls	r2, r5, #10
+	str	r2, [r4, #4]
+	.loc 4 335 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1473:
+	.loc 4 336 0
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r7]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.LVL1474:
+.L1317:
+	.loc 4 376 0 discriminator 2
+	uxth	r0, r5
+	.loc 4 327 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1475:
+	adds	r7, r7, #4
+	.loc 4 376 0 discriminator 2
+	bl	FtlBbmMapBadBlock
+.LVL1476:
+	b	.L1315
+.LVL1477:
+.L1316:
+	.loc 4 340 0
+	mov	r1, r6
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+.LVL1478:
+	.loc 4 341 0
+	ldr	r0, [r4, #8]
+	ldr	r1, [r7]
+	bl	FtlBbt2Bitmap
+.LVL1479:
+	.loc 4 343 0
+	ldr	r3, [sp]
+	.loc 4 350 0
+	str	r5, [sp, #4]
+	.loc 4 343 0
+	ldrh	r4, [r3]
+	subs	r4, r4, #1
+	uxth	r4, r4
+.LVL1480:
+.L1318:
+	.loc 4 345 0
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r6, r4
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+.LVL1481:
+	cmp	r0, #1
+	beq	.L1319
+	.loc 4 350 0
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	.loc 4 349 0
+	strh	r4, [r8]	@ movhi
+	.loc 4 350 0
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1482:
+	.loc 4 351 0
+	ldr	r3, .L1333+16
+	mov	r2, #4096
+	movs	r1, #0
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL1483:
+	.loc 4 355 0
+	ldr	r2, [sp]
+	.loc 4 352 0
+	movw	r3, #61664
+	strh	r3, [r10]	@ movhi
+	.loc 4 353 0
+	movs	r3, #0
+	str	r3, [r10, #4]
+	.loc 4 355 0
+	ldrh	r5, [r2]
+	.loc 4 354 0
+	ldrh	r3, [r8]
+	.loc 4 357 0
+	ldr	r1, [r7]
+	ldr	r0, [fp, #8]
+	.loc 4 354 0
+	strh	r3, [r10, #2]	@ movhi
+	.loc 4 355 0
+	mla	r5, r6, r5, r3
+.LVL1484:
+	.loc 4 356 0
+	lsls	r3, r5, #10
+	str	r3, [fp, #4]
+	.loc 4 357 0
+	ldr	r3, .L1333+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+.LVL1485:
+	.loc 4 358 0
+	movs	r2, #1
+	ldr	r0, .L1333+24
+	mov	r1, r2
+	bl	FlashEraseBlocks
+.LVL1486:
+	.loc 4 359 0
+	movs	r3, #1
+	ldr	r0, .L1333+24
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1487:
+	.loc 4 360 0
+	ldr	r3, [fp]
+	adds	r3, r3, #1
+	bne	.L1317
+	.loc 4 362 0
+	uxth	r0, r5
+	bl	FtlBbmMapBadBlock
+.LVL1488:
+	.loc 4 363 0
+	b	.L1318
+.LVL1489:
+.L1319:
+	.loc 4 347 0
+	subs	r4, r4, #1
+.LVL1490:
+	uxth	r4, r4
+.LVL1491:
+	b	.L1318
+.LVL1492:
+.L1323:
+	.loc 4 383 0 discriminator 3
+	bl	FtlBbmMapBadBlock
+.LVL1493:
+	b	.L1322
+.LVL1494:
+.L1326:
+	.loc 4 396 0
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L1327
+	.loc 4 398 0
+	strh	r5, [r4]	@ movhi
+	b	.L1325
+.L1327:
+	.loc 4 402 0
+	strh	r5, [r4, #4]	@ movhi
+.L1328:
+	.loc 4 414 0
+	ldr	r3, .L1333+36
+	.loc 4 411 0
+	movs	r5, #0
+.LVL1495:
+	.loc 4 413 0
+	str	r5, [r4, #8]
+	.loc 4 416 0
+	movs	r1, #1
+	movs	r2, #2
+	.loc 4 411 0
+	strh	r5, [r4, #2]	@ movhi
+	.loc 4 414 0
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	.loc 4 415 0
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #24]
+	.loc 4 416 0
+	bl	FlashEraseBlocks
+.LVL1496:
+	.loc 4 418 0
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+.LVL1497:
+	.loc 4 419 0
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+.LVL1498:
+	.loc 4 421 0
+	bl	FtlBbmTblFlush
+.LVL1499:
+	.loc 4 422 0
+	ldr	r3, [r4, #8]
+	.loc 4 425 0
+	ldrh	r2, [r4, #4]
+	.loc 4 426 0
+	strh	r5, [r4, #2]	@ movhi
+	.loc 4 422 0
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	.loc 4 424 0
+	ldrh	r3, [r4]
+.LVL1500:
+	.loc 4 425 0
+	strh	r2, [r4]	@ movhi
+	.loc 4 427 0
+	strh	r3, [r4, #4]	@ movhi
+	.loc 4 429 0
+	bl	FtlBbmTblFlush
+.LVL1501:
+	.loc 4 432 0
+	mov	r0, r5
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1334:
+	.align	2
+.L1333:
+	.word	.LANCHOR37+28
+	.word	.LANCHOR10
+	.word	.LANCHOR25
+	.word	.LANCHOR37
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR17
+	.word	.LANCHOR137
+	.word	.LANCHOR112
+	.cfi_endproc
+.LFE234:
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+.LFB266:
+	.loc 2 786 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1502:
+	.loc 2 794 0
+	ldr	r3, .L1347
+	.loc 2 786 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #104
+	.cfi_def_cfa_offset 136
+	.loc 2 786 0
+	str	r2, [sp]
+	.loc 2 794 0
+	adds	r2, r0, r1
+.LVL1503:
+	.loc 2 786 0
+	mov	r7, r0
+	mov	r5, r1
+	.loc 2 794 0
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1343
+	.loc 2 791 0
+	ldr	r3, .L1347+4
+	mov	r8, #0
+	ldrh	r6, [r3]
+	lsr	r6, r0, r6
+	lsl	fp, r6, #2
+.LVL1504:
+.L1337:
+	.loc 2 797 0
+	cbnz	r5, .L1342
+.LVL1505:
+.L1335:
+	.loc 2 820 0
+	mov	r0, r8
+	add	sp, sp, #104
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL1506:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1507:
+.L1342:
+	.cfi_restore_state
+	.loc 2 798 0
+	ldr	r3, .L1347+8
+	.loc 2 799 0
+	mov	r0, r7
+	ldr	r10, .L1347+24
+	.loc 2 798 0
+	ldr	r3, [r3]
+	ldr	r2, [r3, fp]
+	.loc 2 799 0
+	ldr	r3, .L1347+12
+	.loc 2 798 0
+	str	r2, [sp, #12]
+.LVL1508:
+	.loc 2 799 0
+	ldrh	r3, [r3]
+	mov	r1, r3
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+.LVL1509:
+	.loc 2 800 0
+	ldr	r3, [sp, #8]
+	.loc 2 801 0
+	ldr	r2, [sp, #12]
+	.loc 2 799 0
+	str	r1, [sp, #4]
+.LVL1510:
+	.loc 2 800 0
+	subs	r4, r3, r1
+	uxth	r4, r4
+.LVL1511:
+	.loc 2 801 0
+	cmp	r5, r4
+	.loc 2 802 0
+	it	cc
+	uxthcc	r4, r5
+.LVL1512:
+	.loc 2 803 0
+	cbz	r2, .L1339
+	.loc 2 803 0 is_stmt 0 discriminator 1
+	cmp	r4, r3
+	beq	.L1339
+	.loc 2 805 0 is_stmt 1
+	ldr	r3, [r10]
+	.loc 2 807 0
+	add	r0, sp, #20
+	.loc 2 804 0
+	str	r2, [sp, #24]
+	.loc 2 807 0
+	movs	r2, #1
+	mov	r1, r2
+	.loc 2 805 0
+	str	r3, [sp, #28]
+	.loc 2 806 0
+	add	r3, sp, #40
+	str	r3, [sp, #32]
+	.loc 2 807 0
+	bl	FlashReadPages
+.LVL1513:
+.L1340:
+	.loc 2 811 0
+	lsls	r3, r4, #9
+	ldr	r0, [r10]
+	.loc 2 815 0
+	subs	r5, r5, r4
+.LVL1514:
+	.loc 2 811 0
+	mov	r2, r3
+	str	r3, [sp, #8]
+	ldm	sp, {r1, r3}
+	.loc 2 816 0
+	add	r7, r7, r4
+.LVL1515:
+	add	fp, fp, #4
+	.loc 2 811 0
+	add	r0, r0, r3, lsl #9
+	bl	ftl_memcpy
+.LVL1516:
+	.loc 2 812 0
+	ldr	r2, [r10]
+	mov	r1, r6
+	ldr	r0, .L1347+16
+	.loc 2 814 0
+	adds	r6, r6, #1
+.LVL1517:
+	.loc 2 812 0
+	bl	FtlMapWritePage
+.LVL1518:
+	.loc 2 817 0
+	ldr	r3, [sp]
+	.loc 2 813 0
+	adds	r0, r0, #1
+	it	eq
+	moveq	r8, #-1
+.LVL1519:
+	.loc 2 817 0
+	mov	r2, r3
+	ldr	r3, [sp, #8]
+	add	r2, r2, r3
+	str	r2, [sp]
+.LVL1520:
+	b	.L1337
+.LVL1521:
+.L1339:
+	.loc 2 809 0
+	ldr	r3, .L1347+20
+	movs	r1, #0
+	ldr	r0, [r10]
+	ldrh	r2, [r3]
+.LVL1522:
+	bl	ftl_memset
+.LVL1523:
+	b	.L1340
+.LVL1524:
+.L1343:
+	.loc 2 795 0
+	mov	r8, #-1
+	b	.L1335
+.L1348:
+	.align	2
+.L1347:
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR133
+	.word	.LANCHOR12
+	.word	.LANCHOR149
+	.word	.LANCHOR23
+	.word	.LANCHOR124
+	.cfi_endproc
+.LFE266:
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_save_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+.LFB289:
+	.loc 2 2110 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 2 2111 0
+	ldr	r2, .L1351
+	ldr	r3, .L1351+4
+	ldr	r1, [r2]
+	cmp	r1, r3
+	bne	.L1349
+.LBB274:
+.LBB275:
+	.loc 2 2112 0
+	ldr	r3, .L1351+8
+	.loc 2 2125 0
+	movs	r1, #1
+	movs	r0, #0
+	.loc 2 2112 0
+	str	r3, [r2, #4]
+	.loc 2 2113 0
+	ldr	r3, .L1351+12
+	ldr	r3, [r3]
+	str	r3, [r2, #88]
+	.loc 2 2114 0
+	ldr	r3, .L1351+16
+	ldr	r3, [r3]
+	str	r3, [r2, #92]
+	.loc 2 2115 0
+	ldr	r3, .L1351+20
+	ldr	r3, [r3]
+	str	r3, [r2, #8]
+	.loc 2 2116 0
+	ldr	r3, .L1351+24
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	.loc 2 2117 0
+	ldr	r3, .L1351+28
+	ldr	r3, [r3]
+	str	r3, [r2, #16]
+	.loc 2 2118 0
+	ldr	r3, .L1351+32
+	ldr	r3, [r3]
+	str	r3, [r2, #20]
+	.loc 2 2119 0
+	ldr	r3, .L1351+36
+	ldr	r3, [r3]
+	str	r3, [r2, #28]
+	.loc 2 2120 0
+	ldr	r3, .L1351+40
+	ldr	r3, [r3]
+	str	r3, [r2, #32]
+	.loc 2 2121 0
+	ldr	r3, .L1351+44
+	ldr	r3, [r3]
+	str	r3, [r2, #36]
+	.loc 2 2122 0
+	ldr	r3, .L1351+48
+	ldr	r3, [r3]
+	str	r3, [r2, #40]
+	.loc 2 2123 0
+	ldr	r3, .L1351+52
+	ldr	r3, [r3]
+	str	r3, [r2, #44]
+	.loc 2 2124 0
+	ldr	r3, .L1351+56
+	ldr	r3, [r3]
+	str	r3, [r2, #48]
+	.loc 2 2125 0
+	b	FtlVendorPartWrite
+.LVL1525:
+.L1349:
+	bx	lr
+.L1352:
+	.align	2
+.L1351:
+	.word	.LANCHOR83
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LANCHOR74
+	.word	.LANCHOR76
+	.word	.LANCHOR64
+	.word	.LANCHOR66
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+.LBE275:
+.LBE274:
+	.cfi_endproc
+.LFE289:
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+.LFB268:
+	.loc 2 861 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1526:
+	.loc 2 864 0
+	ldr	r2, .L1358
+	.loc 2 861 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 864 0
+	ldrh	r3, [r2]
+	cmp	r3, #31
+	.loc 2 865 0
+	itett	ls
+	addls	r3, r3, #1
+	.loc 2 862 0
+	movhi	r3, #32
+	.loc 2 865 0
+	strhls	r3, [r2]	@ movhi
+.LVL1527:
+	.loc 2 866 0
+	movls	r3, #1
+.LVL1528:
+	ldr	r2, .L1358+4
+	.loc 2 868 0
+	cbnz	r0, .L1355
+	.loc 2 868 0 is_stmt 0 discriminator 1
+	ldr	r1, [r2]
+	ldr	r0, [r1, #20]
+.LVL1529:
+	ldr	r1, [r1, #16]
+	add	r3, r3, r0
+.LVL1530:
+	cmp	r1, r3
+	bcc	.L1356
+.L1355:
+	.loc 2 870 0 is_stmt 1
+	ldr	r2, [r2]
+	.loc 2 875 0
+	movs	r0, #64
+	.loc 2 870 0
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	.loc 2 871 0
+	ldr	r3, .L1358+8
+	str	r3, [r2]
+	.loc 2 872 0
+	ldr	r3, .L1358+12
+	ldrh	r1, [r3]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	.loc 2 873 0
+	ldr	r3, [r2, #8]
+	adds	r3, r3, #1
+	str	r3, [r2, #8]
+	.loc 2 874 0
+	movs	r3, #0
+	str	r3, [r2, #4]
+	.loc 2 875 0
+	bl	FtlVendorPartWrite
+.LVL1531:
+	.loc 2 876 0
+	bl	Ftl_save_ext_data
+.LVL1532:
+.L1356:
+	.loc 2 878 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L1359:
+	.align	2
+.L1358:
+	.word	.LANCHOR166
+	.word	.LANCHOR127
+	.word	1112818501
+	.word	.LANCHOR125
+	.cfi_endproc
+.LFE268:
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+.LFB267:
+	.loc 2 823 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1533:
+	.loc 2 832 0
+	ldr	r3, .L1369
+	.loc 2 823 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r8, r2
+	.loc 2 832 0
+	adds	r2, r0, r1
+.LVL1534:
+	.loc 2 823 0
+	sub	sp, sp, #104
+	.cfi_def_cfa_offset 136
+	.loc 2 823 0
+	mov	r6, r0
+	mov	r5, r1
+	.loc 2 832 0
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1368
+	.loc 2 828 0
+	ldr	r3, .L1369+4
+	movs	r7, #0
+	.loc 2 842 0
+	ldr	fp, .L1369+16
+	.loc 2 828 0
+	ldrh	r3, [r3]
+	lsr	r3, r0, r3
+	lsls	r3, r3, #2
+	str	r3, [sp, #4]
+.LVL1535:
+.L1362:
+	.loc 2 834 0
+	cbnz	r5, .L1367
+.LVL1536:
+.L1360:
+	.loc 2 857 0
+	mov	r0, r7
+	add	sp, sp, #104
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1537:
+.L1367:
+	.cfi_restore_state
+	.loc 2 835 0
+	ldr	r3, .L1369+8
+	.loc 2 836 0
+	mov	r0, r6
+	.loc 2 835 0
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2]
+	.loc 2 836 0
+	ldr	r2, .L1369+12
+	.loc 2 835 0
+	str	r3, [sp, #12]
+.LVL1538:
+	.loc 2 836 0
+	ldrh	r4, [r2]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+.LVL1539:
+	.loc 2 837 0
+	subs	r4, r4, r1
+	.loc 2 838 0
+	ldr	r3, [sp, #12]
+	.loc 2 837 0
+	uxth	r4, r4
+	.loc 2 836 0
+	str	r1, [sp, #8]
+.LVL1540:
+	.loc 2 838 0
+	cmp	r5, r4
+	.loc 2 839 0
+	it	cc
+	uxthcc	r4, r5
+.LVL1541:
+	lsl	r10, r4, #9
+	.loc 2 840 0
+	cbz	r3, .L1364
+	.loc 2 841 0
+	str	r3, [sp, #24]
+	.loc 2 844 0
+	movs	r2, #1
+	.loc 2 842 0
+	ldr	r3, [fp]
+	.loc 2 844 0
+	mov	r1, r2
+	add	r0, sp, #20
+	.loc 2 842 0
+	str	r3, [sp, #28]
+	.loc 2 843 0
+	add	r3, sp, #40
+	str	r3, [sp, #32]
+	.loc 2 844 0
+	bl	FlashReadPages
+.LVL1542:
+	.loc 2 845 0
+	ldr	r3, [sp, #20]
+	.loc 2 847 0
+	mov	r2, r10
+	ldr	r1, [fp]
+	mov	r0, r8
+	.loc 2 846 0
+	adds	r3, r3, #1
+	.loc 2 847 0
+	ldr	r3, [sp, #8]
+	.loc 2 846 0
+	it	eq
+	moveq	r7, #-1
+.LVL1543:
+	.loc 2 847 0
+	add	r1, r1, r3, lsl #9
+	bl	ftl_memcpy
+.LVL1544:
+.L1366:
+	ldr	r3, [sp, #4]
+	.loc 2 852 0
+	subs	r5, r5, r4
+.LVL1545:
+	.loc 2 853 0
+	add	r6, r6, r4
+.LVL1546:
+	.loc 2 854 0
+	add	r8, r8, r10
+.LVL1547:
+	adds	r3, r3, #4
+	str	r3, [sp, #4]
+	b	.L1362
+.LVL1548:
+.L1364:
+	.loc 2 849 0
+	mov	r2, r10
+	mov	r1, r3
+	mov	r0, r8
+	bl	ftl_memset
+.LVL1549:
+	b	.L1366
+.LVL1550:
+.L1368:
+	.loc 2 833 0
+	mov	r7, #-1
+	b	.L1360
+.L1370:
+	.align	2
+.L1369:
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR133
+	.word	.LANCHOR12
+	.word	.LANCHOR124
+	.cfi_endproc
+.LFE267:
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
+	.align	1
+	.global	FtlLoadEctTbl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+.LFB274:
+	.loc 2 1334 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 1335 0
+	movs	r0, #64
+	ldr	r4, .L1373
+	ldr	r5, .L1373+4
+	ldr	r2, [r4]
+	ldrh	r1, [r5]
+	bl	FtlVendorPartRead
+.LVL1551:
+	.loc 2 1336 0
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	ldr	r3, .L1373+8
+	cmp	r2, r3
+	beq	.L1372
+.LBB278:
+.LBB279:
+	.loc 2 1338 0
+	ldr	r1, .L1373+12
+	ldr	r0, .L1373+16
+	bl	printf
+.LVL1552:
+	.loc 2 1339 0
+	ldrh	r2, [r5]
+	movs	r1, #0
+	ldr	r0, [r4]
+	lsls	r2, r2, #9
+	bl	ftl_memset
+.LVL1553:
+.L1372:
+.LBE279:
+.LBE278:
+	.loc 2 1344 0
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1374:
+	.align	2
+.L1373:
+	.word	.LANCHOR127
+	.word	.LANCHOR125
+	.word	1112818501
+	.word	.LC100
+	.word	.LC71
+	.cfi_endproc
+.LFE274:
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+.LFB290:
+	.loc 2 2130 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2131 0
+	movs	r1, #1
+	ldr	r4, .L1378
+	movs	r0, #0
+	.loc 2 2132 0
+	ldr	r5, .L1378+4
+	.loc 2 2131 0
+	mov	r2, r4
+	bl	FtlVendorPartRead
+.LVL1554:
+	.loc 2 2132 0
+	ldr	r3, [r4]
+	cmp	r3, r5
+	beq	.L1376
+	.loc 2 2133 0
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_memset
+.LVL1555:
+	.loc 2 2134 0
+	str	r5, [r4]
+.L1376:
+	.loc 2 2137 0
+	ldr	r3, [r4]
+	cmp	r3, r5
+	ldr	r3, .L1378+8
+	bne	.L1377
+	.loc 2 2138 0
+	ldr	r1, [r4, #88]
+	ldr	r2, .L1378+12
+	str	r1, [r2]
+	.loc 2 2139 0
+	ldr	r1, [r4, #92]
+	ldr	r2, .L1378+16
+	str	r1, [r2]
+	.loc 2 2140 0
+	ldr	r1, [r4, #8]
+	ldr	r2, .L1378+20
+	str	r1, [r2]
+	.loc 2 2141 0
+	ldr	r1, [r4, #12]
+	ldr	r2, .L1378+24
+	str	r1, [r2]
+	.loc 2 2142 0
+	ldr	r1, [r4, #16]
+	ldr	r2, .L1378+28
+	str	r1, [r2]
+	.loc 2 2143 0
+	ldr	r1, [r4, #20]
+	ldr	r2, .L1378+32
+	str	r1, [r2]
+	.loc 2 2144 0
+	ldr	r2, [r4, #28]
+	.loc 2 2145 0
+	ldr	r1, [r4, #32]
+	.loc 2 2144 0
+	str	r2, [r3]
+	.loc 2 2145 0
+	ldr	r2, .L1378+36
+	str	r1, [r2]
+	.loc 2 2146 0
+	ldr	r1, [r4, #36]
+	ldr	r2, .L1378+40
+	str	r1, [r2]
+	.loc 2 2147 0
+	ldr	r1, [r4, #40]
+	ldr	r2, .L1378+44
+	str	r1, [r2]
+	.loc 2 2148 0
+	ldr	r1, [r4, #44]
+	ldr	r2, .L1378+48
+	str	r1, [r2]
+	.loc 2 2149 0
+	ldr	r1, [r4, #48]
+	ldr	r2, .L1378+52
+	str	r1, [r2]
+.L1377:
+	.loc 2 2152 0
+	ldr	r1, .L1378+56
+	ldr	r2, .L1378+60
+	ldr	r3, [r3]
+	ldr	r0, [r1]
+	ldrh	r2, [r2]
+	ldr	r1, .L1378+64
+	mla	r0, r0, r2, r3
+	ldrh	r1, [r1]
+	bl	__aeabi_uidiv
+.LVL1556:
+	ldr	r3, .L1378+68
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L1379:
+	.align	2
+.L1378:
+	.word	.LANCHOR83
+	.word	1179929683
+	.word	.LANCHOR74
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LANCHOR76
+	.word	.LANCHOR64
+	.word	.LANCHOR66
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LANCHOR73
+	.word	.LANCHOR14
+	.word	.LANCHOR5
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE290:
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlVpcTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+.LFB272:
+	.loc 2 1004 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1557:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1016 0
+	movs	r6, #0
+	.loc 2 1013 0
+	ldr	r3, .L1392
+	.loc 2 1005 0
+	movw	fp, #65535
+	.loc 2 1010 0
+	ldr	r8, .L1392+80
+	.loc 2 1011 0
+	ldr	r10, .L1392+84
+	.loc 2 1013 0
+	ldrh	r2, [r3]
+	.loc 2 1010 0
+	ldr	r0, [r8]
+	.loc 2 1011 0
+	ldr	r7, [r10]
+	.loc 2 1010 0
+	ldr	r5, .L1392+4
+	.loc 2 1019 0
+	ldr	r4, .L1392+8
+	.loc 2 1020 0
+	ldr	r1, .L1392+12
+	.loc 2 1010 0
+	str	r0, [r5, #8]
+	.loc 2 1011 0
+	str	r7, [r5, #12]
+.LVL1558:
+	.loc 2 1013 0
+	strh	r2, [r7, #2]	@ movhi
+	.loc 2 1014 0
+	movw	r2, #61604
+	strh	r2, [r7]	@ movhi
+	.loc 2 1015 0
+	ldr	r2, [r3, #8]
+	.loc 2 1016 0
+	str	r6, [r7, #8]
+	.loc 2 1017 0
+	str	r6, [r7, #12]
+	.loc 2 1015 0
+	str	r2, [r7, #4]
+	.loc 2 1020 0
+	ldr	r2, .L1392+16
+	.loc 2 1021 0
+	str	r3, [sp, #4]
+	.loc 2 1020 0
+	stm	r4, {r1, r2}
+	.loc 2 1021 0
+	ldrh	r2, [r3, #6]
+	strh	r2, [r4, #8]	@ movhi
+	.loc 2 1022 0
+	ldr	r2, .L1392+20
+	ldrh	r2, [r2]
+	strb	r2, [r4, #10]
+	.loc 2 1024 0
+	ldr	r2, .L1392+24
+	ldrh	r1, [r2]
+	.loc 2 1025 0
+	ldrh	ip, [r2, #2]
+	.loc 2 1024 0
+	strh	r1, [r4, #14]	@ movhi
+	.loc 2 1025 0
+	ldrb	r1, [r2, #6]	@ zero_extendqisi2
+	.loc 2 1026 0
+	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	strb	r2, [r4, #11]
+	.loc 2 1025 0
+	orr	r1, r1, ip, lsl #6
+	.loc 2 1028 0
+	ldr	r2, .L1392+28
+	.loc 2 1025 0
+	strh	r1, [r4, #16]	@ movhi
+	.loc 2 1028 0
+	ldrh	r1, [r2]
+	.loc 2 1029 0
+	ldrh	ip, [r2, #2]
+	.loc 2 1028 0
+	strh	r1, [r4, #18]	@ movhi
+	.loc 2 1029 0
+	ldrb	r1, [r2, #6]	@ zero_extendqisi2
+	.loc 2 1030 0
+	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	.loc 2 1029 0
+	orr	r1, r1, ip, lsl #6
+	strh	r1, [r4, #20]	@ movhi
+	.loc 2 1030 0
+	strb	r2, [r4, #12]
+	.loc 2 1032 0
+	ldr	r2, .L1392+32
+	ldrh	r1, [r2]
+	.loc 2 1033 0
+	ldrh	ip, [r2, #2]
+	.loc 2 1032 0
+	strh	r1, [r4, #22]	@ movhi
+	.loc 2 1033 0
+	ldrb	r1, [r2, #6]	@ zero_extendqisi2
+	.loc 2 1034 0
+	ldrb	r2, [r2, #8]	@ zero_extendqisi2
+	strb	r2, [r4, #13]
+	.loc 2 1033 0
+	orr	r1, r1, ip, lsl #6
+	.loc 2 1036 0
+	ldr	r2, .L1392+36
+	.loc 2 1033 0
+	strh	r1, [r4, #24]	@ movhi
+	.loc 2 1047 0
+	movs	r1, #255
+	.loc 2 1036 0
+	ldr	r2, [r2]
+	str	r2, [r4, #32]
+	.loc 2 1041 0
+	ldr	r2, .L1392+40
+	ldr	r2, [r2]
+	str	r2, [r4, #40]
+	.loc 2 1042 0
+	ldr	r2, .L1392+44
+	ldr	r2, [r2]
+	str	r2, [r4, #36]
+	.loc 2 1047 0
+	ldr	r2, .L1392+48
+	ldrh	r2, [r2]
+	bl	ftl_memset
+.LVL1559:
+	.loc 2 1048 0
+	mov	r1, r4
+	.loc 2 1049 0
+	ldr	r4, .L1392+52
+	.loc 2 1048 0
+	movs	r2, #48
+	ldr	r0, [r5, #8]
+	bl	ftl_memcpy
+.LVL1560:
+	.loc 2 1049 0
+	ldrh	r2, [r4]
+	ldr	r0, [r5, #8]
+	ldr	r1, .L1392+56
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	ldr	r1, [r1]
+	bl	ftl_memcpy
+.LVL1561:
+	.loc 2 1050 0
+	ldrh	r0, [r4]
+	ldr	r1, .L1392+60
+	ldr	r4, [r5, #8]
+	lsrs	r2, r0, #3
+	adds	r0, r0, #24
+	lsls	r0, r0, #1
+	ldr	r1, [r1]
+	adds	r2, r2, #4
+	bic	r0, r0, #3
+	add	r0, r0, r4
+	bl	ftl_memcpy
+.LVL1562:
+	.loc 2 1051 0
+	mov	r0, r6
+	bl	FtlUpdateVaildLpn
+.LVL1563:
+	ldr	r3, [sp, #4]
+	mov	r4, r3
+.LVL1564:
+.L1381:
+	.loc 2 1053 0
+	ldr	r3, [r8]
+	.loc 2 1055 0
+	ldrh	r2, [r4]
+	.loc 2 1056 0
+	ldr	r0, .L1392+4
+	.loc 2 1053 0
+	str	r3, [r5, #8]
+	.loc 2 1054 0
+	ldr	r3, [r10]
+	str	r3, [r5, #12]
+	.loc 2 1055 0
+	ldrh	r3, [r4, #2]
+	orr	r3, r3, r2, lsl #10
+	str	r3, [r5, #4]
+	.loc 2 1056 0
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.LVL1565:
+	.loc 2 1057 0
+	ldr	r3, .L1392+64
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1382
+	.loc 2 1059 0
+	ldrh	r3, [r4]
+	.loc 2 1058 0
+	ldrh	fp, [r4, #4]
+.LVL1566:
+	.loc 2 1059 0
+	strh	r3, [r4, #4]	@ movhi
+	.loc 2 1060 0
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 1061 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL1567:
+	.loc 2 1066 0
+	ldr	r2, .L1392+40
+	.loc 2 1061 0
+	strh	r0, [r4]	@ movhi
+	.loc 2 1066 0
+	ldr	r3, [r2]
+	adds	r1, r3, #1
+	str	r3, [r4, #8]
+	str	r1, [r2]
+	.loc 2 1067 0
+	lsls	r2, r0, #10
+	str	r2, [r5, #4]
+	.loc 2 1068 0
+	str	r3, [r7, #4]
+	.loc 2 1070 0
+	movs	r3, #1
+	.loc 2 1069 0
+	strh	r0, [r7, #2]	@ movhi
+	.loc 2 1070 0
+	mov	r2, r3
+	mov	r1, r3
+	ldr	r0, .L1392+4
+	bl	FlashProgPages
+.LVL1568:
+.L1382:
+	.loc 2 1072 0
+	ldrh	r3, [r4, #2]
+	.loc 2 1073 0
+	ldr	r2, [r5]
+	.loc 2 1072 0
+	adds	r3, r3, #1
+	uxth	r3, r3
+	.loc 2 1073 0
+	adds	r2, r2, #1
+	.loc 2 1072 0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 2 1073 0
+	bne	.L1383
+	.loc 2 1075 0
+	cmp	r3, #1
+	bne	.L1384
+	.loc 2 1075 0 is_stmt 0 discriminator 1
+	movw	r2, #1075
+	ldr	r1, .L1392+68
+	ldr	r0, .L1392+72
+	bl	printf
+.LVL1569:
+.L1384:
+	.loc 2 1076 0 is_stmt 1
+	ldrh	r3, [r4, #2]
+	.loc 2 1078 0
+	adds	r6, r6, #1
+.LVL1570:
+	uxth	r6, r6
+.LVL1571:
+	.loc 2 1076 0
+	cmp	r3, #1
+	.loc 2 1077 0
+	itttt	eq
+	ldreq	r3, .L1392+64
+	ldrheq	r3, [r3]
+	addeq	r3, r3, #-1
+	strheq	r3, [r4, #2]	@ movhi
+	.loc 2 1079 0
+	cmp	r6, #3
+	bls	.L1381
+	.loc 2 1080 0
+	mov	r2, r6
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1392+76
+	bl	printf
+.LVL1572:
+.L1387:
+	b	.L1387
+.L1383:
+	.loc 2 1086 0
+	cmp	r3, #1
+	beq	.L1381
+	.loc 2 1089 0
+	movw	r3, #65535
+	cmp	fp, r3
+	beq	.L1388
+	.loc 2 1090 0
+	movs	r1, #1
+	mov	r0, fp
+	bl	FtlFreeSysBlkQueueIn
+.LVL1573:
+.L1388:
+	.loc 2 1092 0
+	movs	r0, #0
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1574:
+.L1393:
+	.align	2
+.L1392:
+	.word	.LANCHOR81
+	.word	.LANCHOR108
+	.word	.LANCHOR79
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR10
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR73
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR23
+	.word	.LANCHOR5
+	.word	.LANCHOR43
+	.word	.LANCHOR1
+	.word	.LANCHOR20
+	.word	.LANCHOR167
+	.word	.LC1
+	.word	.LC101
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.cfi_endproc
+.LFE272:
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlVpcCheckAndModify,"ax",%progbits
+	.align	1
+	.global	FtlVpcCheckAndModify
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVpcCheckAndModify, %function
+FtlVpcCheckAndModify:
+.LFB292:
+	.loc 2 2192 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 2199 0
+	movs	r5, #0
+	.loc 2 2197 0
+	ldr	r1, .L1406
+	ldr	r0, .L1406+4
+	bl	printf
+.LVL1575:
+	.loc 2 2198 0
+	ldr	r3, .L1406+8
+	movs	r1, #0
+	ldr	r4, .L1406+12
+	.loc 2 2199 0
+	ldr	r6, .L1406+16
+	.loc 2 2198 0
+	ldrh	r2, [r3]
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.LVL1576:
+.L1395:
+	.loc 2 2199 0 discriminator 1
+	ldr	r3, [r6]
+	cmp	r5, r3
+	bcc	.L1397
+	.loc 2 2206 0 discriminator 1
+	ldr	r10, .L1406+36
+	movs	r7, #0
+	.loc 2 2207 0 discriminator 1
+	ldr	r8, .L1406+40
+.LVL1577:
+.L1398:
+	.loc 2 2206 0 discriminator 1
+	ldrh	r3, [r10]
+	uxth	r5, r7
+.LVL1578:
+	cmp	r3, r5
+	bhi	.L1402
+	.loc 2 2218 0
+	add	sp, sp, #12
+	.cfi_remember_state
+	.cfi_def_cfa_offset 28
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.LVL1579:
+.L1397:
+	.cfi_restore_state
+	.loc 2 2200 0
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, r5
+	bl	log2phys
+.LVL1580:
+	.loc 2 2201 0
+	ldr	r0, [sp, #4]
+	adds	r3, r0, #1
+	beq	.L1396
+	.loc 2 2202 0
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1581:
+	.loc 2 2203 0
+	ldr	r2, [r4]
+	ldrh	r3, [r2, r0, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r0, lsl #1]	@ movhi
+.LVL1582:
+.L1396:
+	.loc 2 2199 0 discriminator 2
+	adds	r5, r5, #1
+.LVL1583:
+	b	.L1395
+.LVL1584:
+.L1402:
+	.loc 2 2207 0
+	ldr	r3, [r8]
+	uxth	r6, r7
+	ldrh	r2, [r3, r6, lsl #1]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r6, lsl #1]
+	cmp	r2, r3
+	beq	.L1400
+	.loc 2 2207 0 is_stmt 0 discriminator 1
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L1400
+	.loc 2 2209 0 is_stmt 1
+	mov	r1, r6
+	ldr	r0, .L1406+20
+	bl	printf
+.LVL1585:
+	.loc 2 2210 0
+	ldr	r3, .L1406+24
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	beq	.L1400
+	.loc 2 2210 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1406+28
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	beq	.L1400
+	.loc 2 2210 0 discriminator 2
+	ldr	r3, .L1406+32
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	beq	.L1400
+	.loc 2 2211 0 is_stmt 1
+	ldr	r3, [r4]
+	.loc 2 2212 0
+	mov	r0, r5
+	.loc 2 2211 0
+	ldrh	r2, [r3, r6, lsl #1]
+	ldr	r3, [r8]
+	strh	r2, [r3, r6, lsl #1]	@ movhi
+	.loc 2 2212 0
+	bl	update_vpc_list
+.LVL1586:
+	.loc 2 2213 0
+	bl	l2p_flush
+.LVL1587:
+	.loc 2 2214 0
+	bl	FtlVpcTblFlush
+.LVL1588:
+.L1400:
+	adds	r7, r7, #1
+.LVL1589:
+	b	.L1398
+.L1407:
+	.align	2
+.L1406:
+	.word	.LANCHOR168
+	.word	.LC91
+	.word	.LANCHOR6
+	.word	.LANCHOR128
+	.word	.LANCHOR62
+	.word	.LC102
+	.word	.LANCHOR51
+	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.word	.LANCHOR5
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE292:
+	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_new_data_superblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+.LFB302:
+	.loc 2 2631 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1590:
+	.loc 2 2633 0
+	ldr	r3, .L1418
+	.loc 2 2631 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2631 0
+	mov	r6, r0
+	.loc 2 2632 0
+	ldrh	r4, [r0]
+.LVL1591:
+	.loc 2 2633 0
+	ldrh	r3, [r3]
+	cmp	r3, r4
+	bcs	.L1409
+	.loc 2 2633 0 is_stmt 0 discriminator 1
+	movw	r2, #2633
+	ldr	r1, .L1418+4
+	ldr	r0, .L1418+8
+.LVL1592:
+	bl	printf
+.LVL1593:
+.L1409:
+	.loc 2 2635 0 is_stmt 1
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L1410
+	.loc 2 2636 0
+	ldr	r3, .L1418+12
+	.loc 2 2637 0
+	mov	r0, r4
+	.loc 2 2636 0
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbz	r3, .L1411
+	.loc 2 2637 0
+	bl	INSERT_DATA_LIST
+.LVL1594:
+.L1410:
+	.loc 2 2642 0
+	ldr	r5, .L1418+16
+	movw	r2, #65535
+	.loc 2 2641 0
+	movs	r3, #1
+	strb	r3, [r6, #8]
+	.loc 2 2642 0
+	ldrh	r0, [r5]
+	cmp	r0, r2
+	beq	.L1412
+	.loc 2 2643 0
+	cmp	r4, r0
+	bne	.L1413
+	.loc 2 2643 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1418+12
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1414
+.L1413:
+	.loc 2 2644 0 is_stmt 1
+	bl	update_vpc_list
+.LVL1595:
+.L1414:
+	.loc 2 2645 0
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L1412:
+	.loc 2 2647 0
+	mov	r0, r6
+	bl	allocate_data_superblock
+.LVL1596:
+	.loc 2 2648 0
+	bl	l2p_flush
+.LVL1597:
+	.loc 2 2649 0
+	movs	r0, #0
+	bl	FtlEctTblFlush
+.LVL1598:
+	.loc 2 2650 0
+	bl	FtlVpcTblFlush
+.LVL1599:
+	.loc 2 2652 0
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.LVL1600:
+.L1411:
+	.loc 2 2639 0
+	bl	INSERT_FREE_LIST
+.LVL1601:
+	b	.L1410
+.L1419:
+	.align	2
+.L1418:
+	.word	.LANCHOR5
+	.word	.LANCHOR169
+	.word	.LC1
+	.word	.LANCHOR43
+	.word	.LANCHOR151
+	.cfi_endproc
+.LFE302:
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",%progbits
+	.align	1
+	.global	FtlProgPages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlProgPages, %function
+FtlProgPages:
+.LFB218:
+	.loc 3 904 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1602:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 913 0
+	movs	r6, #0
+	.loc 3 917 0
+	ldr	r8, .L1434+24
+	.loc 3 904 0
+	mov	r4, r3
+	.loc 3 911 0
+	movs	r2, #0
+.LVL1603:
+	.loc 3 904 0
+	mov	r5, r0
+	.loc 3 911 0
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+.LVL1604:
+	.loc 3 904 0
+	mov	r10, r1
+	.loc 3 911 0
+	bl	FlashProgPages
+.LVL1605:
+.L1421:
+	.loc 3 913 0 discriminator 1
+	cmp	r6, r10
+	beq	.L1428
+	.loc 3 918 0
+	ldr	r7, .L1434
+	b	.L1429
+.L1424:
+	.loc 3 915 0
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1606:
+	.loc 3 916 0
+	ldrh	r3, [r4]
+	cmp	r3, r0
+	bne	.L1422
+	.loc 3 917 0
+	ldr	r1, [r8]
+	ldrh	r0, [r4, #4]
+.LVL1607:
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	.loc 3 918 0
+	ldrh	r3, [r7]
+	strh	r3, [r4, #2]	@ movhi
+	.loc 3 919 0
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	.loc 3 920 0
+	strh	r3, [r4, #4]	@ movhi
+.L1422:
+	.loc 3 922 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1423
+	.loc 3 923 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1608:
+.L1423:
+	.loc 3 926 0
+	ldr	r2, .L1434+4
+	ldr	r3, [r2, #96]
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	.loc 3 927 0
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
+.LVL1609:
+	.loc 3 928 0
+	mov	r0, r4
+	bl	get_new_active_ppa
+.LVL1610:
+	.loc 3 930 0
+	movs	r2, #0
+	.loc 3 929 0
+	str	r0, [r5, #4]
+	.loc 3 928 0
+	str	r0, [sp, #4]
+	.loc 3 930 0
+	movs	r1, #1
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	FlashProgPages
+.LVL1611:
+.L1429:
+	.loc 3 914 0
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1424
+	.loc 3 933 0
+	ldr	r3, .L1434+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1425
+	.loc 3 933 0 is_stmt 0 discriminator 1
+	movw	r2, #933
+	ldr	r1, .L1434+12
+	ldr	r0, .L1434+16
+	bl	printf
+.LVL1612:
+.L1425:
+	.loc 3 934 0 is_stmt 1
+	ldr	r3, [r5, #4]
+	add	r1, sp, #8
+	.loc 3 935 0
+	movs	r2, #1
+	ldr	r0, [r5, #16]
+	.loc 3 934 0
+	str	r3, [r1, #-4]!
+	.loc 3 935 0
+	bl	log2phys
+.LVL1613:
+	.loc 3 937 0
+	ldr	r3, [r5, #12]
+	ldr	fp, [r3, #12]
+.LVL1614:
+	.loc 3 939 0
+	ubfx	r0, fp, #10, #16
+	bl	P2V_block_in_plane
+.LVL1615:
+	.loc 3 940 0
+	cmp	fp, #-1
+	.loc 3 939 0
+	mov	r7, r0
+.LVL1616:
+	.loc 3 940 0
+	beq	.L1426
+	.loc 3 942 0
+	ldr	r3, [r8]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1427
+	.loc 3 943 0
+	mov	r1, r0
+	ldr	r0, .L1434+20
+.LVL1617:
+	bl	printf
+.LVL1618:
+.L1427:
+	.loc 3 944 0
+	mov	r0, r7
+	bl	decrement_vpc_count
+.LVL1619:
+.L1426:
+	.loc 3 913 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1620:
+	adds	r5, r5, #20
+	b	.L1421
+.LVL1621:
+.L1428:
+	.loc 3 948 0
+	ldr	r3, .L1434+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1420
+	.loc 3 948 0 is_stmt 0 discriminator 1
+	mov	r2, #948
+	ldr	r1, .L1434+12
+	ldr	r0, .L1434+16
+	bl	printf
+.LVL1622:
+.L1420:
+	.loc 3 949 0 is_stmt 1
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1623:
+.L1435:
+	.align	2
+.L1434:
+	.word	.LANCHOR19
+	.word	.LANCHOR83
+	.word	.LANCHOR3
+	.word	.LANCHOR170
+	.word	.LC1
+	.word	.LC103
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE218:
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB219:
+	.loc 3 952 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 953 0
+	ldr	r4, .L1441
+	ldr	r0, [r4]
+	cbz	r0, .L1437
+	.loc 3 954 0
+	ldr	r3, .L1441+4
+	movs	r2, #0
+	movs	r1, #1
+	ldr	r3, [r3]
+	bl	FtlProgPages
+.LVL1624:
+	.loc 3 955 0
+	movs	r3, #0
+	str	r3, [r4]
+.L1437:
+	.loc 3 958 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L1442:
+	.align	2
+.L1441:
+	.word	.LANCHOR150
+	.word	.LANCHOR171
+	.cfi_endproc
+.LFE219:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB215:
+	.loc 3 797 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 798 0
+	bl	FtlCacheWriteBack
+.LVL1625:
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1626:
+	.loc 3 800 0
+	movs	r0, #1
+	bl	FtlEctTblFlush
+.LVL1627:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1628:
+	.loc 3 803 0
+	movs	r0, #0
+	pop	{r3, pc}
+	.cfi_endproc
+.LFE215:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",%progbits
+	.align	1
+	.global	sftl_deinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB216:
+	.loc 3 806 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 807 0
+	ldr	r3, .L1446
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L1445
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1629:
+.L1445:
+	.loc 3 810 0
+	movs	r0, #0
+	pop	{r3, pc}
+.L1447:
+	.align	2
+.L1446:
+	.word	.LANCHOR88
+	.cfi_endproc
+.LFE216:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",%progbits
+	.align	1
+	.global	FtlDiscard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB221:
+	.loc 3 1157 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1630:
+	.loc 3 1164 0
+	ldr	r3, .L1463
+	adds	r2, r0, r1
+	.loc 3 1157 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 3 1157 0
+	mov	r6, r0
+	mov	r5, r1
+	.loc 3 1164 0
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1456
+	.loc 3 1167 0
+	cmp	r1, #31
+	bhi	.L1450
+.LVL1631:
+.L1455:
+	.loc 3 1168 0
+	movs	r0, #0
+.L1448:
+	.loc 3 1201 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL1632:
+.L1450:
+	.cfi_restore_state
+	.loc 3 1172 0
+	ldr	r8, .L1463+12
+	.loc 3 1170 0
+	bl	FtlCacheWriteBack
+.LVL1633:
+	.loc 3 1172 0
+	mov	r0, r6
+	ldrh	r4, [r8]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+.LVL1634:
+	.loc 3 1173 0
+	smulbb	r3, r0, r4
+	.loc 3 1172 0
+	mov	r7, r0
+.LVL1635:
+	.loc 3 1173 0
+	subs	r6, r6, r3
+.LVL1636:
+	uxth	r6, r6
+.LVL1637:
+	.loc 3 1174 0
+	cbz	r6, .L1451
+.LVL1638:
+	.loc 3 1175 0
+	subs	r4, r4, r6
+.LVL1639:
+	.loc 3 1176 0
+	adds	r7, r7, #1
+.LVL1640:
+	.loc 3 1175 0
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
+	uxth	r4, r4
+	.loc 3 1177 0
+	subs	r5, r5, r4
+.LVL1641:
+.L1451:
+	.loc 3 1184 0
+	ldr	r4, .L1463+4
+	.loc 3 1180 0
+	mov	r3, #-1
+	.loc 3 1185 0
+	ldr	r6, .L1463+8
+.LVL1642:
+	.loc 3 1180 0
+	str	r3, [sp, #4]
+.L1452:
+	.loc 3 1181 0
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L1454
+	.loc 3 1194 0
+	ldr	r3, .L1463+4
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L1455
+	.loc 3 1196 0
+	movs	r4, #0
+	str	r4, [r3]
+	.loc 3 1197 0
+	bl	l2p_flush
+.LVL1643:
+	.loc 3 1198 0
+	bl	FtlVpcTblFlush
+.LVL1644:
+	b	.L1455
+.L1454:
+	.loc 3 1182 0
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r7
+	bl	log2phys
+.LVL1645:
+	.loc 3 1183 0
+	ldr	r3, [sp]
+	adds	r3, r3, #1
+	beq	.L1453
+	.loc 3 1184 0
+	ldr	r3, [r4]
+	.loc 3 1186 0
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r7
+	.loc 3 1184 0
+	adds	r3, r3, #1
+	str	r3, [r4]
+	.loc 3 1185 0
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	str	r3, [r6]
+	.loc 3 1186 0
+	bl	log2phys
+.LVL1646:
+	.loc 3 1187 0
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1647:
+	.loc 3 1188 0
+	bl	decrement_vpc_count
+.LVL1648:
+.L1453:
+	.loc 3 1191 0
+	ldrh	r3, [r8]
+	.loc 3 1190 0
+	adds	r7, r7, #1
+.LVL1649:
+	.loc 3 1191 0
+	subs	r5, r5, r3
+.LVL1650:
+	b	.L1452
+.LVL1651:
+.L1456:
+	.loc 3 1165 0
+	mov	r0, #-1
+.LVL1652:
+	b	.L1448
+.L1464:
+	.align	2
+.L1463:
+	.word	.LANCHOR34
+	.word	.LANCHOR172
+	.word	.LANCHOR64
+	.word	.LANCHOR12
+	.cfi_endproc
+.LFE221:
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+.LFB311:
+	.loc 5 112 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1653:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 119 0
+	movw	r2, #65535
+	ldr	r4, .L1491
+	.loc 5 115 0
+	ldr	r6, .L1491+4
+	.loc 5 119 0
+	ldrh	r5, [r4]
+	.loc 5 115 0
+	ldrh	r1, [r6]
+.LVL1654:
+	.loc 5 119 0
+	cmp	r5, r2
+	bne	.L1466
+.LVL1655:
+.L1476:
+	.loc 5 152 0
+	ldr	r3, .L1491+8
+	movs	r2, #0
+	str	r2, [r3]
+	.loc 5 153 0
+	movw	r3, #65535
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L1489
+.L1467:
+	.loc 5 154 0
+	movs	r0, #0
+.L1465:
+	.loc 5 199 0
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1656:
+.L1466:
+	.cfi_restore_state
+	.loc 5 121 0
+	cbz	r0, .L1469
+.LVL1657:
+	.loc 5 123 0
+	ldr	r3, .L1491+12
+	ldrh	r0, [r3]
+.LVL1658:
+	cmp	r0, r2
+	beq	.L1470
+.L1471:
+	.loc 5 122 0
+	movs	r1, #2
+.LVL1659:
+.L1469:
+	.loc 5 131 0
+	ldr	r0, .L1491
+	bl	FtlGcScanTempBlk
+.LVL1660:
+	str	r0, [sp, #12]
+	.loc 5 132 0
+	adds	r0, r0, #1
+	beq	.L1472
+	.loc 5 135 0
+	ldr	r3, .L1491+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r5, lsl #1]
+	cmp	r3, #4
+	bls	.L1473
+	.loc 5 136 0
+	subs	r3, r3, #5
+	.loc 5 137 0
+	movs	r0, #1
+	.loc 5 136 0
+	strh	r3, [r2, r5, lsl #1]	@ movhi
+	.loc 5 137 0
+	bl	FtlEctTblFlush
+.LVL1661:
+.L1473:
+	.loc 5 139 0
+	ldr	r4, .L1491+8
+	ldr	r2, [r4]
+	cbnz	r2, .L1474
+	.loc 5 140 0
+	ldr	r2, .L1491+20
+	.loc 5 141 0
+	ldr	r0, [sp, #12]
+	.loc 5 140 0
+	ldr	r3, [r2, #96]
+	.loc 5 141 0
+	ubfx	r0, r0, #10, #16
+	.loc 5 140 0
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	.loc 5 141 0
+	bl	FtlBbmMapBadBlock
+.LVL1662:
+	.loc 5 142 0
+	bl	FtlBbmTblFlush
+.LVL1663:
+.L1474:
+	.loc 5 144 0
+	movs	r3, #0
+	str	r3, [r4]
+.L1485:
+	.loc 5 149 0
+	movs	r0, #1
+	b	.L1465
+.LVL1664:
+.L1470:
+	.loc 5 124 0
+	movs	r2, #0
+	strh	r2, [r3]	@ movhi
+	.loc 5 125 0
+	ldr	r3, .L1491+24
+	ldrh	r3, [r3]
+	cmp	r3, #17
+	bhi	.L1471
+	b	.L1469
+.LVL1665:
+.L1472:
+	.loc 5 148 0
+	ldr	r3, .L1491+12
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1485
+	b	.L1476
+.LVL1666:
+.L1489:
+	.loc 5 160 0
+	bl	FtlCacheWriteBack
+.LVL1667:
+	.loc 5 162 0
+	ldrb	r1, [r4, #7]	@ zero_extendqisi2
+	ldrh	r3, [r6]
+	ldr	r5, .L1491+28
+	muls	r3, r1, r3
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	beq	.L1477
+	.loc 5 162 0 is_stmt 0 discriminator 1
+	movs	r2, #162
+	ldr	r1, .L1491+32
+	ldr	r0, .L1491+36
+	bl	printf
+.LVL1668:
+.L1477:
+	.loc 5 163 0 is_stmt 1
+	ldrh	r6, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldr	r2, .L1491+40
+	ldrh	r0, [r4]
+	.loc 5 168 0
+	ldr	fp, .L1491+68
+	.loc 5 163 0
+	smulbb	r3, r3, r6
+	ldr	r1, [r2]
+	.loc 5 165 0
+	movs	r6, #0
+	str	r2, [sp, #4]
+	.loc 5 163 0
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	.loc 5 164 0
+	ldr	r1, .L1491+44
+	ldrh	r3, [r5]
+	ldr	r0, [r1]
+	add	r3, r3, r0
+	str	r3, [r1]
+.LVL1669:
+.L1478:
+	.loc 5 165 0 discriminator 1
+	ldrh	r2, [r5]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L1482
+	.loc 5 181 0
+	movw	r0, #65535
+	bl	decrement_vpc_count
+.LVL1670:
+	.loc 5 182 0
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	beq	.L1483
+	.loc 5 183 0
+	bl	INSERT_DATA_LIST
+.LVL1671:
+.L1484:
+	.loc 5 188 0
+	ldr	r3, .L1491+48
+	.loc 5 186 0
+	movw	r6, #65535
+.LVL1672:
+	strh	r6, [r4]	@ movhi
+	.loc 5 187 0
+	movs	r4, #0
+	strh	r4, [r5]	@ movhi
+	.loc 5 188 0
+	strh	r4, [r3]	@ movhi
+	.loc 5 189 0
+	bl	l2p_flush
+.LVL1673:
+	.loc 5 190 0
+	bl	FtlVpcTblFlush
+.LVL1674:
+	.loc 5 191 0
+	ldr	r3, .L1491+24
+	ldrh	r2, [r3]
+	ldr	r3, .L1491+52
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, asr #2
+	ble	.L1467
+	.loc 5 192 0
+	ldr	r3, .L1491+56
+	.loc 5 193 0
+	movs	r2, #20
+	.loc 5 192 0
+	strh	r6, [r3]	@ movhi
+	.loc 5 193 0
+	ldr	r3, .L1491+60
+	strh	r2, [r3]	@ movhi
+	b	.L1467
+.LVL1675:
+.L1482:
+	.loc 5 166 0
+	uxth	r3, r6
+	movs	r7, #12
+	.loc 5 168 0
+	ldr	r2, [fp]
+	.loc 5 166 0
+	muls	r7, r3, r7
+	ldr	r3, .L1491+64
+	ldr	r8, [r3]
+	add	r10, r8, r7
+.LVL1676:
+	.loc 5 168 0
+	ldr	r1, [r10, #8]
+	cmp	r1, r2
+	bcc	.L1479
+	.loc 5 168 0 is_stmt 0 discriminator 1
+	movs	r2, #168
+	ldr	r1, .L1491+32
+	ldr	r0, .L1491+36
+	bl	printf
+.LVL1677:
+.L1479:
+	.loc 5 169 0 is_stmt 1
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r10, #8]
+	bl	log2phys
+.LVL1678:
+	.loc 5 170 0
+	ldr	r2, [sp, #12]
+	ldr	r0, [r8, r7]
+	cmp	r0, r2
+	bne	.L1480
+	.loc 5 171 0
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1679:
+	.loc 5 172 0
+	movs	r2, #1
+	.loc 5 171 0
+	mov	r7, r0
+.LVL1680:
+	.loc 5 172 0
+	add	r1, r10, #4
+	ldr	r0, [r10, #8]
+	bl	log2phys
+.LVL1681:
+	.loc 5 173 0
+	mov	r0, r7
+.LVL1682:
+.L1490:
+	.loc 5 177 0
+	bl	decrement_vpc_count
+.LVL1683:
+.L1481:
+	adds	r6, r6, #1
+.LVL1684:
+	b	.L1478
+.LVL1685:
+.L1480:
+	.loc 5 175 0
+	ldr	r3, [r10, #4]
+	cmp	r2, r3
+	beq	.L1481
+	.loc 5 177 0
+	ldrh	r0, [r4]
+	b	.L1490
+.LVL1686:
+.L1483:
+	.loc 5 185 0
+	bl	INSERT_FREE_LIST
+.LVL1687:
+	b	.L1484
+.L1492:
+	.align	2
+.L1491:
+	.word	.LANCHOR53
+	.word	.LANCHOR19
+	.word	.LANCHOR153
+	.word	.LANCHOR157
+	.word	.LANCHOR40
+	.word	.LANCHOR83
+	.word	.LANCHOR48
+	.word	.LANCHOR99
+	.word	.LANCHOR173
+	.word	.LC1
+	.word	.LANCHOR43
+	.word	.LANCHOR68
+	.word	.LANCHOR98
+	.word	.LANCHOR80
+	.word	.LANCHOR82
+	.word	.LANCHOR84
+	.word	.LANCHOR100
+	.word	.LANCHOR62
+	.cfi_endproc
+.LFE311:
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
+	.align	1
+	.global	FtlGcPageRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+.LFB314:
+	.loc 5 289 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 5 290 0
+	ldr	r4, .L1495
+	ldr	r5, .L1495+4
+	ldrh	r1, [r4]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+.LVL1688:
+	.loc 5 291 0
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4]
+	cmp	r2, r3
+	bcc	.L1493
+.LBB282:
+.LBB283:
+	.loc 5 293 0
+	ldr	r0, .L1495+8
+	bl	FtlMapBlkWriteDump_data
+.LVL1689:
+	.loc 5 294 0
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+.LVL1690:
+	.loc 5 295 0
+	ldr	r3, .L1495+12
+	movs	r2, #0
+	str	r2, [r3]
+.L1493:
+	pop	{r3, r4, r5, pc}
+.L1496:
+	.align	2
+.L1495:
+	.word	.LANCHOR19
+	.word	.LANCHOR53
+	.word	.LANCHOR144
+	.word	.LANCHOR153
+.LBE283:
+.LBE282:
+	.cfi_endproc
+.LFE314:
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.align	1
+	.global	FtlPowerLostRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+.LFB286:
+	.loc 2 2032 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 2033 0
+	movs	r4, #0
+	.loc 2 2035 0
+	ldr	r5, .L1498
+	.loc 2 2033 0
+	ldr	r3, .L1498+4
+	.loc 2 2035 0
+	mov	r0, r5
+	.loc 2 2033 0
+	str	r4, [r3]
+	.loc 2 2035 0
+	bl	FtlRecoverySuperblock
+.LVL1691:
+	.loc 2 2036 0
+	mov	r0, r5
+	.loc 2 2037 0
+	ldr	r5, .L1498+8
+	.loc 2 2036 0
+	bl	FtlSlcSuperblockCheck
+.LVL1692:
+	.loc 2 2037 0
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+.LVL1693:
+	.loc 2 2038 0
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+.LVL1694:
+	.loc 2 2039 0
+	bl	FtlGcPageRecovery
+.LVL1695:
+	.loc 2 2040 0
+	movw	r0, #65535
+	bl	decrement_vpc_count
+.LVL1696:
+	.loc 2 2042 0
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L1499:
+	.align	2
+.L1498:
+	.word	.LANCHOR51
+	.word	.LANCHOR163
+	.word	.LANCHOR52
+	.cfi_endproc
+.LFE286:
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+.LFB316:
+	.loc 5 316 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 5 320 0
+	movs	r3, #0
+	ldr	r4, .L1507
+	.loc 5 321 0
+	movs	r6, #0
+	.loc 5 322 0
+	movs	r7, #20
+	.loc 5 320 0
+	mov	r2, r3
+	ldr	r5, .L1507+4
+	ldr	r1, [r4]
+	ldr	r0, [r5]
+	bl	FlashProgPages
+.LVL1697:
+.L1501:
+	.loc 5 321 0 discriminator 1
+	ldr	r1, [r4]
+	uxth	r3, r6
+	cmp	r1, r3
+	bhi	.L1504
+	.loc 5 335 0
+	ldr	r0, [r5]
+	bl	FtlGcBufFree
+.LVL1698:
+	.loc 5 337 0
+	ldr	r3, .L1507+8
+	.loc 5 336 0
+	movs	r0, #0
+	str	r0, [r4]
+	.loc 5 337 0
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L1500
+	.loc 5 338 0
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.LVL1699:
+	b	.L1506
+.L1504:
+	.loc 5 322 0
+	muls	r3, r7, r3
+	ldr	r2, [r5]
+	adds	r6, r6, #1
+.LVL1700:
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L1502
+	.loc 5 323 0
+	ldr	r3, .L1507+8
+	movs	r5, #0
+	ldr	r0, .L1507+12
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	.loc 5 324 0
+	strh	r2, [r3]	@ movhi
+	.loc 5 325 0
+	ldr	r2, .L1507+16
+	.loc 5 326 0
+	ldr	r0, [r1, #4]
+	.loc 5 325 0
+	ldr	r3, [r2, #96]
+	.loc 5 326 0
+	ubfx	r0, r0, #10, #16
+	.loc 5 325 0
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	.loc 5 326 0
+	bl	FtlBbmMapBadBlock
+.LVL1701:
+	.loc 5 327 0
+	bl	FtlBbmTblFlush
+.LVL1702:
+	.loc 5 328 0
+	bl	FtlGcPageVarInit
+.LVL1703:
+.L1506:
+	.loc 5 339 0
+	movs	r0, #1
+.L1500:
+	.loc 5 342 0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1502:
+	.loc 5 331 0 discriminator 2
+	ldr	r3, [r1, #12]
+.LVL1704:
+	.loc 5 332 0 discriminator 2
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+.LVL1705:
+	b	.L1501
+.L1508:
+	.align	2
+.L1507:
+	.word	.LANCHOR91
+	.word	.LANCHOR121
+	.word	.LANCHOR53
+	.word	.LANCHOR43
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE316:
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+.LFB315:
+	.loc 5 300 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 5 301 0
+	movw	r3, #65535
+	ldr	r4, .L1512
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L1510
+	.loc 5 301 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1511
+.L1510:
+	.loc 5 302 0 is_stmt 1
+	bl	FtlCacheWriteBack
+.LVL1706:
+	.loc 5 303 0
+	movs	r0, #0
+	.loc 5 304 0
+	movs	r5, #0
+	.loc 5 303 0
+	bl	FtlGcFreeTempBlock
+.LVL1707:
+	.loc 5 305 0
+	ldr	r0, .L1512
+	.loc 5 304 0
+	strb	r5, [r4, #8]
+	.loc 5 305 0
+	bl	allocate_data_superblock
+.LVL1708:
+	.loc 5 306 0
+	ldr	r3, .L1512+4
+	strh	r5, [r3]	@ movhi
+	.loc 5 307 0
+	ldr	r3, .L1512+8
+	strh	r5, [r3]	@ movhi
+	.loc 5 308 0
+	bl	l2p_flush
+.LVL1709:
+	.loc 5 309 0
+	mov	r0, r5
+	bl	FtlEctTblFlush
+.LVL1710:
+	.loc 5 310 0
+	bl	FtlVpcTblFlush
+.LVL1711:
+.L1511:
+	.loc 5 312 0
+	ldr	r0, .L1512
+	.loc 5 313 0
+	pop	{r3, r4, r5, lr}
+	.cfi_restore 14
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+	.loc 5 312 0
+	b	get_new_active_ppa
+.LVL1712:
+.L1513:
+	.align	2
+.L1512:
+	.word	.LANCHOR53
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.cfi_endproc
+.LFE315:
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.align	1
+	.global	rk_ftl_garbage_collect
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+.LFB322:
+	.loc 5 470 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1713:
+	.loc 5 478 0
+	ldr	r3, .L1632
+	.loc 5 470 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r7, r0
+	sub	sp, sp, #48
+	.cfi_def_cfa_offset 80
+	.loc 5 478 0
+	ldr	r0, [r3]
+.LVL1714:
+	cmp	r0, #0
+	bne	.L1589
+	.loc 5 481 0
+	ldr	r3, .L1632+4
+	ldrh	r3, [r3]
+	cmp	r3, #47
+	bls	.L1514
+	.loc 5 485 0
+	ldr	r3, .L1632+8
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1516
+.LVL1715:
+.L1519:
+.LBB287:
+.LBB288:
+	.loc 5 489 0
+	ldr	r3, .L1632+12
+	movw	r4, #65535
+	ldrh	r0, [r3]
+	cmp	r0, r4
+	bne	.L1517
+.L1518:
+	.loc 5 496 0
+	ldr	r2, .L1632+16
+	.loc 5 497 0
+	movw	r5, #65535
+	ldr	r6, .L1632+20
+	.loc 5 496 0
+	ldr	r3, [r2]
+	.loc 5 497 0
+	ldrh	r0, [r6]
+	.loc 5 496 0
+	adds	r3, r3, #1
+	add	r3, r3, r7, lsl #7
+	.loc 5 497 0
+	cmp	r0, r5
+	.loc 5 496 0
+	str	r3, [r2]
+	.loc 5 497 0
+	bne	.L1520
+	ldr	r1, .L1632+24
+	ldrh	r1, [r1]
+	cmp	r1, r0
+	bne	.L1521
+	ldr	r0, .L1632+28
+	ldrh	r10, [r0]
+	cmp	r10, r1
+	bne	.L1522
+	.loc 5 498 0
+	ldr	r1, .L1632+32
+	ldrh	r0, [r1]
+	mov	r8, r1
+	cmp	r0, #24
+	ite	cc
+	movcc	r1, #5120
+	movcs	r1, #1024
+	cmp	r3, r1
+	bls	.L1522
+.LBB289:
+	.loc 5 502 0
+	ldr	r3, .L1632+36
+	.loc 5 501 0
+	movs	r4, #0
+	str	r4, [r2]
+	.loc 5 502 0
+	strh	r4, [r3]	@ movhi
+	.loc 5 503 0
+	bl	GetSwlReplaceBlock
+.LVL1716:
+	.loc 5 504 0
+	cmp	r0, r10
+	.loc 5 503 0
+	mov	r5, r0
+.LVL1717:
+	.loc 5 504 0
+	bne	.L1593
+	.loc 5 505 0
+	ldr	r10, .L1632+96
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bcs	.L1525
+	.loc 5 506 0
+	movs	r0, #64
+.LVL1718:
+	bl	List_get_gc_head_node
+.LVL1719:
+	.loc 5 507 0
+	uxth	r3, r0
+	cmp	r3, r5
+	beq	.L1527
+	.loc 5 508 0
+	mov	r0, r3
+	ldr	r3, .L1632+40
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #7
+	bhi	.L1528
+	.loc 5 509 0
+	mov	r0, r4
+.LVL1720:
+	bl	List_get_gc_head_node
+.LVL1721:
+	uxth	r4, r0
+.LVL1722:
+	.loc 5 510 0
+	movs	r3, #128
+	strh	r3, [r10]	@ movhi
+	.loc 5 520 0
+	cmp	r4, r5
+	bne	.L1524
+.LVL1723:
+.L1527:
+	.loc 5 523 0
+	bl	FtlGcReFreshBadBlk
+.LVL1724:
+.LBE289:
+	.loc 5 527 0
+	cmp	r7, #0
+	bne	.L1530
+	movw	r3, #65535
+	cmp	r5, r3
+	bne	.L1530
+.LVL1725:
+.L1587:
+	.loc 5 528 0
+	ldr	r3, .L1632+32
+	ldrh	r3, [r3]
+	cmp	r3, #24
+	bhi	.L1594
+	ldr	r2, .L1632+44
+	.loc 5 530 0
+	cmp	r3, #16
+	.loc 5 531 0
+	ldrh	r4, [r2]
+	.loc 5 530 0
+	bls	.L1532
+	.loc 5 531 0
+	lsrs	r4, r4, #5
+.LVL1726:
+.L1531:
+	.loc 5 539 0
+	ldr	r2, .L1632+48
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L1535
+	.loc 5 540 0
+	ldr	r3, .L1632+24
+	movw	r0, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1536
+	ldr	r0, .L1632+28
+	ldrh	r0, [r0]
+	cmp	r0, r3
+	bne	.L1536
+	.loc 5 542 0
+	ldr	r3, .L1632+36
+	ldrh	r0, [r3]
+	cbnz	r0, .L1537
+	ldr	r3, .L1632+52
+	ldr	r4, .L1632+56
+.LVL1727:
+	ldr	r3, [r3]
+	ldr	r4, [r4]
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcs	.L1538
+.L1537:
+	.loc 5 543 0
+	ldr	r3, .L1632+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L1539:
+	.loc 5 546 0
+	ldr	r3, .L1632+64
+	movs	r2, #0
+	str	r2, [r3]
+.LVL1728:
+.L1514:
+.LBE288:
+.LBE287:
+	.loc 5 758 0
+	add	sp, sp, #48
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1729:
+.L1516:
+	.cfi_restore_state
+	.loc 5 485 0 discriminator 1
+	ldr	r2, .L1632+24
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L1519
+	.loc 5 486 0
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.LVL1730:
+	cmp	r0, #0
+	beq	.L1519
+	.loc 5 487 0
+	movs	r0, #1
+	b	.L1514
+.LVL1731:
+.L1517:
+.LBB293:
+.LBB291:
+	.loc 5 489 0
+	ldr	r1, .L1632+28
+	ldrh	r2, [r1]
+	cmp	r2, r4
+	.loc 5 490 0
+	itt	eq
+	strheq	r0, [r1]	@ movhi
+	.loc 5 491 0
+	strheq	r2, [r3]	@ movhi
+	b	.L1518
+.LVL1732:
+.L1528:
+.LBB290:
+	.loc 5 512 0
+	movs	r3, #64
+.LVL1733:
+.L1626:
+	.loc 5 516 0
+	strh	r3, [r10]	@ movhi
+	b	.L1527
+.LVL1734:
+.L1525:
+	movs	r3, #80
+	b	.L1626
+.L1593:
+	.loc 5 504 0
+	mov	r4, r0
+.LVL1735:
+.L1524:
+	.loc 5 521 0
+	ldr	r3, .L1632+40
+	mov	r5, r4
+	ldr	r1, .L1632+48
+	ldrh	r2, [r8]
+	ldr	r3, [r3]
+	ldrh	r1, [r1]
+	ldr	r0, .L1632+68
+	ldrh	r3, [r3, r4, lsl #1]
+	str	r1, [sp, #4]
+	ldr	r1, .L1632+72
+	ldr	r1, [r1]
+	ldrh	r1, [r1, r4, lsl #1]
+	str	r1, [sp]
+	mov	r1, r4
+	bl	printf
+.LVL1736:
+	b	.L1527
+.LVL1737:
+.L1532:
+.LBE290:
+	.loc 5 532 0
+	cmp	r3, #12
+	bls	.L1533
+	.loc 5 533 0
+	lsrs	r4, r4, #4
+.LVL1738:
+	b	.L1531
+.LVL1739:
+.L1533:
+	.loc 5 534 0
+	cmp	r3, #8
+	bls	.L1531
+	.loc 5 535 0
+	lsrs	r4, r4, #2
+.LVL1740:
+	b	.L1531
+.LVL1741:
+.L1594:
+	.loc 5 529 0
+	movs	r4, #1
+	b	.L1531
+.L1538:
+	.loc 5 545 0
+	movs	r3, #18
+	strh	r3, [r2]	@ movhi
+	b	.L1539
+.LVL1742:
+.L1536:
+	.loc 5 549 0
+	ldr	r3, .L1632+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L1535:
+	.loc 5 551 0
+	ldr	r3, .L1632+76
+	ldrh	r3, [r3]
+	cbz	r3, .L1595
+	.loc 5 552 0
+	adds	r4, r4, #32
+.LVL1743:
+	uxth	r4, r4
+.LVL1744:
+.L1595:
+	.loc 5 551 0
+	movw	r5, #65535
+.LVL1745:
+.L1541:
+	.loc 5 597 0
+	ldrh	r3, [r6]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1550
+	.loc 5 598 0
+	cmp	r5, r3
+	beq	.L1551
+	.loc 5 599 0
+	strh	r5, [r6]	@ movhi
+.LVL1746:
+.L1552:
+	.loc 5 611 0
+	ldrh	r0, [r6]
+	movw	r7, #65535
+	.loc 5 610 0
+	movs	r3, #0
+	strb	r3, [r6, #8]
+	.loc 5 611 0
+	cmp	r0, r7
+	beq	.L1550
+	.loc 5 612 0
+	bl	IsBlkInGcList
+.LVL1747:
+	cbz	r0, .L1555
+	.loc 5 613 0
+	strh	r7, [r6]	@ movhi
+.L1555:
+	.loc 5 615 0
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1550
+	.loc 5 616 0
+	ldr	r0, .L1632+20
+	bl	make_superblock
+.LVL1748:
+	.loc 5 619 0
+	ldr	r2, .L1632+80
+	.loc 5 617 0
+	movs	r3, #0
+	strh	r3, [r6, #2]	@ movhi
+	.loc 5 618 0
+	strb	r3, [r6, #6]
+	.loc 5 619 0
+	strh	r3, [r2]	@ movhi
+	.loc 5 620 0
+	ldr	r3, .L1632+40
+	ldrh	r2, [r6]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L1632+84
+	strh	r2, [r3]	@ movhi
+.L1550:
+	.loc 5 625 0
+	ldr	r2, .L1632+88
+	ldrh	r3, [r6]
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L1556
+	ldr	r2, .L1632+92
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L1556
+	.loc 5 631 0
+	ldr	r6, .L1632+20
+	mov	fp, r6
+.L1557:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1558
+	.loc 5 635 0
+	ldr	r8, .L1632+100
+	.loc 5 632 0
+	movs	r2, #0
+	ldr	r3, .L1632+64
+	str	r2, [r3]
+.L1559:
+	.loc 5 635 0
+	ldrh	r7, [r8]
+	mov	r0, r7
+	bl	List_get_gc_head_node
+.LVL1749:
+	uxth	r3, r0
+	.loc 5 636 0
+	movw	r1, #65535
+	cmp	r3, r1
+	.loc 5 635 0
+	strh	r3, [fp]	@ movhi
+	.loc 5 636 0
+	bne	.L1560
+	.loc 5 637 0
+	movs	r3, #0
+	.loc 5 638 0
+	movs	r0, #8
+	.loc 5 637 0
+	strh	r3, [r8]	@ movhi
+	b	.L1514
+.LVL1750:
+.L1542:
+	.loc 5 558 0
+	ldr	r3, .L1632+64
+	movs	r2, #0
+	.loc 5 560 0
+	ldr	r1, .L1632+48
+	ldr	r4, .L1632+32
+	.loc 5 558 0
+	str	r2, [r3]
+	.loc 5 560 0
+	ldrh	r3, [r1]
+	mov	r2, r1
+	ldrh	r8, [r4]
+	ldr	r5, .L1632+36
+	cmp	r3, r8
+	bcs	.L1543
+	.loc 5 561 0
+	ldrh	r3, [r5]
+	cbnz	r3, .L1544
+	ldr	r3, .L1632+52
+	ldr	r0, .L1632+56
+	ldr	r3, [r3]
+	ldr	r0, [r0]
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcs	.L1545
+.L1544:
+	.loc 5 562 0
+	ldr	r3, .L1632+60
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+.LVL1751:
+.L1629:
+	.loc 5 578 0
+	bl	FtlReadRefresh
+.LVL1752:
+	.loc 5 579 0
+	ldrh	r0, [r5]
+	b	.L1514
+.L1633:
+	.align	2
+.L1632:
+	.word	.LANCHOR117
+	.word	.LANCHOR45
+	.word	.LANCHOR157
+	.word	.LANCHOR102
+	.word	.LANCHOR86
+	.word	.LANCHOR82
+	.word	.LANCHOR53
+	.word	.LANCHOR101
+	.word	.LANCHOR48
+	.word	.LANCHOR174
+	.word	.LANCHOR43
+	.word	.LANCHOR19
+	.word	.LANCHOR84
+	.word	.LANCHOR62
+	.word	.LANCHOR60
+	.word	.LANCHOR80
+	.word	.LANCHOR89
+	.word	.LC104
+	.word	.LANCHOR40
+	.word	.LANCHOR103
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR85
+	.word	.LANCHOR87
+.LVL1753:
+.L1545:
+	.loc 5 564 0
+	movs	r3, #18
+	strh	r3, [r1]	@ movhi
+	b	.L1629
+.L1543:
+	.loc 5 572 0
+	ldrh	r0, [r5]
+	cmp	r0, #0
+	bne	.L1547
+	.loc 5 573 0
+	ldr	r3, .L1634
+	ldrh	r7, [r3]
+.LVL1754:
+	add	r2, r7, r7, lsl #1
+	asrs	r2, r2, #2
+	strh	r2, [r1]	@ movhi
+	.loc 5 574 0
+	bl	List_get_gc_head_node
+.LVL1755:
+	.loc 5 575 0
+	ldr	r3, .L1634+4
+	uxth	r0, r0
+	ldr	r2, .L1634+8
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	ldrh	r1, [r3, r0, lsl #1]
+	ldr	r3, .L1634+12
+	ldrh	r3, [r3]
+	muls	r2, r3, r2
+	cmp	r1, r2, asr #1
+	ble	.L1548
+	.loc 5 576 0
+	subs	r3, r7, #1
+	.loc 5 575 0
+	cmp	r8, r3
+	bge	.L1629
+.L1548:
+	.loc 5 584 0
+	cmp	r1, #0
+	bne	.L1547
+	.loc 5 585 0
+	movw	r0, #65535
+.LVL1756:
+	bl	decrement_vpc_count
+.LVL1757:
+	.loc 5 586 0
+	ldrh	r0, [r4]
+	adds	r0, r0, #1
+	b	.L1514
+.LVL1758:
+.L1551:
+	.loc 5 600 0
+	ldr	r3, .L1634+16
+	ldrh	r2, [r3]
+	cmp	r2, r5
+	beq	.L1552
+	.loc 5 604 0
+	ldr	r1, .L1634+4
+	ldr	r1, [r1]
+	ldrh	r2, [r1, r2, lsl #1]
+	cbnz	r2, .L1553
+	.loc 5 605 0
+	strh	r5, [r3]	@ movhi
+.L1553:
+	.loc 5 606 0
+	ldrh	r2, [r3]
+	strh	r2, [r6]	@ movhi
+	.loc 5 607 0
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+	b	.L1552
+.LVL1759:
+.L1556:
+	.loc 5 626 0
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.LVL1760:
+.L1630:
+	.loc 5 652 0
+	ldr	r3, .L1634+20
+	ldrh	r0, [r3]
+	b	.L1514
+.LVL1761:
+.L1560:
+	str	r0, [sp, #16]
+	.loc 5 640 0
+	mov	r0, r3
+	str	r3, [sp, #12]
+	adds	r7, r7, #1
+	bl	IsBlkInGcList
+.LVL1762:
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #16]
+	cbz	r0, .L1561
+	.loc 5 641 0
+	strh	r7, [r8]	@ movhi
+	b	.L1559
+.L1561:
+	.loc 5 645 0
+	uxth	r0, r2
+	ldr	r2, .L1634+24
+	ldr	r10, .L1634+4
+	.loc 5 644 0
+	uxth	r7, r7
+	.loc 5 645 0
+	ldrh	lr, [r2]
+	ldr	r2, .L1634+8
+	ldr	r1, [r10]
+	.loc 5 644 0
+	strh	r7, [r8]	@ movhi
+	.loc 5 645 0
+	ldrh	r2, [r2]
+	ldrh	ip, [r1, r0, lsl #1]
+	mul	lr, r2, lr
+	cmp	ip, lr, asr #1
+	bgt	.L1563
+	.loc 5 646 0
+	cmp	r7, #48
+	bls	.L1564
+	cmp	ip, #8
+	bls	.L1564
+	ldr	r7, .L1634+28
+	ldrh	r7, [r7]
+	cmp	r7, #35
+	bhi	.L1564
+.L1563:
+	.loc 5 647 0
+	ldr	r2, .L1634+32
+	movs	r7, #0
+	strh	r7, [r2]	@ movhi
+.L1564:
+	.loc 5 649 0
+	ldrh	r1, [r1, r0, lsl #1]
+	cmp	lr, r1
+	bgt	.L1565
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L1565
+	.loc 5 651 0
+	ldr	r2, .L1634+32
+	movs	r3, #0
+	.loc 5 650 0
+	strh	r5, [fp]	@ movhi
+	.loc 5 651 0
+	strh	r3, [r2]	@ movhi
+	b	.L1630
+.L1565:
+	.loc 5 655 0
+	cbnz	r1, .L1566
+	.loc 5 656 0
+	movw	r0, #65535
+	bl	decrement_vpc_count
+.LVL1763:
+	.loc 5 657 0
+	ldr	r3, .L1634+32
+	ldr	r2, .L1634+32
+	ldrh	r3, [r3]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	b	.L1559
+.L1566:
+	.loc 5 660 0
+	movs	r2, #0
+	strb	r2, [fp, #8]
+	.loc 5 662 0
+	ldr	r2, .L1634+36
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bne	.L1567
+	movw	r2, #662
+	ldr	r1, .L1634+40
+	ldr	r0, .L1634+44
+	bl	printf
+.LVL1764:
+.L1567:
+	.loc 5 663 0
+	ldr	r3, .L1634+48
+	ldrh	r2, [fp]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1568
+	movw	r2, #663
+	ldr	r1, .L1634+40
+	ldr	r0, .L1634+44
+	bl	printf
+.LVL1765:
+.L1568:
+	.loc 5 664 0
+	ldr	r3, .L1634+52
+	ldrh	r2, [fp]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1569
+	mov	r2, #664
+	ldr	r1, .L1634+40
+	ldr	r0, .L1634+44
+	bl	printf
+.LVL1766:
+.L1569:
+	.loc 5 665 0
+	mov	r0, r6
+	bl	make_superblock
+.LVL1767:
+	.loc 5 666 0
+	ldr	r2, .L1634+56
+	movs	r3, #0
+	.loc 5 667 0
+	ldrh	r1, [fp]
+	.loc 5 666 0
+	strh	r3, [r2]	@ movhi
+	.loc 5 667 0
+	ldr	r2, [r10]
+	ldrh	r1, [r2, r1, lsl #1]
+	ldr	r2, .L1634+60
+	.loc 5 668 0
+	strh	r3, [fp, #2]	@ movhi
+	.loc 5 669 0
+	strb	r3, [fp, #6]
+	.loc 5 667 0
+	strh	r1, [r2]	@ movhi
+.L1558:
+	.loc 5 675 0
+	bl	FtlReadRefresh
+.LVL1768:
+	.loc 5 678 0
+	ldr	r3, .L1634+64
+	movs	r2, #1
+	str	r2, [r3]
+	.loc 5 679 0
+	ldr	r3, .L1634+24
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+.LVL1769:
+	.loc 5 680 0
+	ldrh	r3, [fp, #2]
+	ldr	r1, [sp, #28]
+	adds	r2, r3, r4
+	cmp	r2, r1
+	.loc 5 681 0
+	itt	gt
+	movgt	r2, r1
+	subgt	r4, r2, r3
+.LVL1770:
+	.loc 5 693 0
+	mov	r3, #0
+	.loc 5 681 0
+	it	gt
+	uxthgt	r4, r4
+.LVL1771:
+.L1628:
+	str	r3, [sp, #24]
+.LVL1772:
+	.loc 5 683 0
+	ldrh	r3, [sp, #24]
+	cmp	r4, r3
+	bls	.L1579
+	.loc 5 685 0
+	ldr	r3, .L1634+8
+	.loc 5 687 0
+	movw	r10, #65535
+	.loc 5 688 0
+	ldrh	r8, [r6, #2]
+	ldr	r1, .L1634+68
+	.loc 5 685 0
+	ldrh	ip, [r3]
+	.loc 5 688 0
+	ldr	r3, .L1634+72
+	ldr	r0, [r3]
+	ldr	r3, [sp, #24]
+	add	r8, r8, r3
+	movs	r3, #0
+	str	r3, [sp, #12]
+	b	.L1580
+.LVL1773:
+.L1573:
+	.loc 5 686 0
+	ldrh	r2, [r1, #2]!
+.LVL1774:
+	.loc 5 687 0
+	cmp	r2, r10
+	beq	.L1572
+	.loc 5 688 0
+	ldr	r7, [sp, #12]
+	mov	lr, #20
+	orr	r2, r8, r2, lsl #10
+.LVL1775:
+	mla	lr, lr, r7, r0
+	str	r2, [lr, #4]
+	.loc 5 689 0
+	mov	r2, r7
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp, #12]
+.LVL1776:
+.L1572:
+	adds	r3, r3, #1
+.LVL1777:
+.L1580:
+	.loc 5 685 0
+	uxth	r2, r3
+	cmp	ip, r2
+	bhi	.L1573
+	.loc 5 693 0
+	ldrb	r2, [r6, #8]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bl	FlashReadPages
+.LVL1778:
+	movs	r3, #0
+.LVL1779:
+.L1627:
+	str	r3, [sp, #20]
+.LVL1780:
+	.loc 5 695 0
+	ldr	r2, [sp, #12]
+	ldrh	r3, [sp, #20]
+	cmp	r2, r3
+	bhi	.L1578
+.LVL1781:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	b	.L1628
+.L1635:
+	.align	2
+.L1634:
+	.word	.LANCHOR80
+	.word	.LANCHOR43
+	.word	.LANCHOR3
+	.word	.LANCHOR20
+	.word	.LANCHOR101
+	.word	.LANCHOR174
+	.word	.LANCHOR19
+	.word	.LANCHOR98
+	.word	.LANCHOR87
+	.word	.LANCHOR51
+	.word	.LANCHOR177
+	.word	.LC1
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR117
+	.word	.LANCHOR82+14
+	.word	.LANCHOR95
+.LVL1782:
+.L1578:
+	ldr	r3, [sp, #20]
+	movs	r7, #20
+	muls	r7, r3, r7
+	.loc 5 696 0
+	ldr	r3, .L1636
+	ldr	r3, [r3]
+	adds	r2, r3, r7
+.LVL1783:
+	.loc 5 697 0
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	beq	.L1575
+	.loc 5 696 0
+	ldr	r3, [r2, #12]
+	.loc 5 697 0
+	ldrh	r2, [r3]
+.LVL1784:
+	.loc 5 696 0
+	str	r3, [sp, #16]
+	.loc 5 697 0
+	movw	r3, #61589
+.LVL1785:
+	cmp	r2, r3
+	bne	.L1575
+	.loc 5 699 0
+	ldr	r3, [sp, #16]
+	ldr	r8, [r3, #8]
+.LVL1786:
+	.loc 5 700 0
+	cmp	r8, #-1
+	bne	.L1576
+	mov	r2, #700
+	ldr	r1, .L1636+4
+	ldr	r0, .L1636+8
+	bl	printf
+.LVL1787:
+.L1576:
+	.loc 5 701 0
+	movs	r2, #0
+	add	r1, sp, #44
+	mov	r0, r8
+	bl	log2phys
+.LVL1788:
+	.loc 5 702 0
+	ldr	r3, .L1636
+	ldr	r1, [r3]
+	ldr	r3, [sp, #44]
+	add	r1, r1, r7
+	ldr	r2, [r1, #4]
+	cmp	r2, r3
+	bne	.L1575
+	.loc 5 704 0
+	ldr	r2, .L1636+12
+	.loc 5 705 0
+	mov	r10, #20
+	ldr	r8, .L1636+36
+.LVL1789:
+	ldr	r1, [r1, #16]
+	.loc 5 704 0
+	ldrh	r3, [r2]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	.loc 5 705 0
+	ldr	r2, .L1636+16
+	ldr	r3, [r8]
+	ldr	r0, [r2]
+	str	r2, [sp, #36]
+	mla	r3, r10, r3, r0
+	str	r1, [r3, #16]
+	str	r3, [sp, #32]
+	.loc 5 706 0
+	bl	Ftl_get_new_temp_ppa
+.LVL1790:
+	ldr	r3, [sp, #32]
+	.loc 5 707 0
+	ldr	r2, [sp, #36]
+	.loc 5 709 0
+	ldr	r1, [sp, #16]
+	.loc 5 706 0
+	str	r0, [r3, #4]
+	.loc 5 707 0
+	ldr	r2, [r2]
+	ldr	r3, [r8]
+	mla	r10, r10, r3, r2
+	ldr	r2, .L1636
+	.loc 5 715 0
+	adds	r3, r3, #1
+	.loc 5 707 0
+	ldr	r0, [r2]
+	add	r0, r0, r7
+	.loc 5 710 0
+	ldr	r7, .L1636+20
+	.loc 5 707 0
+	ldr	r2, [r0, #8]
+	str	r2, [r10, #8]
+	.loc 5 708 0
+	ldr	r2, [r0, #12]
+	str	r2, [r10, #12]
+	.loc 5 709 0
+	ldr	r2, [sp, #44]
+	str	r2, [r1, #12]
+	.loc 5 710 0
+	ldrh	r2, [r7]
+	strh	r2, [r1, #2]	@ movhi
+	.loc 5 713 0
+	ldr	r2, .L1636+24
+	.loc 5 715 0
+	str	r3, [r8]
+	.loc 5 713 0
+	ldr	r2, [r2]
+	str	r2, [r1, #4]
+	.loc 5 716 0
+	movs	r1, #1
+	bl	FtlGcBufAlloc
+.LVL1791:
+	.loc 5 717 0
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [r8]
+	cmp	r2, r3
+	beq	.L1577
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L1575
+.L1577:
+	.loc 5 718 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1792:
+	cbz	r0, .L1575
+.LVL1793:
+.L1631:
+	.loc 5 733 0
+	ldr	r3, .L1636+28
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L1630
+.LVL1794:
+.L1575:
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	b	.L1627
+.LVL1795:
+.L1579:
+	.loc 5 727 0
+	ldrh	r3, [r6, #2]
+	add	r4, r4, r3
+.LVL1796:
+	.loc 5 729 0
+	ldr	r3, [sp, #28]
+	.loc 5 727 0
+	uxth	r4, r4
+	.loc 5 729 0
+	cmp	r3, r4
+	.loc 5 727 0
+	strh	r4, [r6, #2]	@ movhi
+	.loc 5 729 0
+	bls	.L1581
+	ldr	r3, .L1636+12
+	ldrh	r2, [r3]
+	ldr	r3, .L1636+32
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L1582
+.L1581:
+	.loc 5 731 0
+	ldr	r3, .L1636+36
+	ldr	r3, [r3]
+	cbz	r3, .L1583
+	.loc 5 732 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1797:
+	cmp	r0, #0
+	bne	.L1631
+.L1583:
+	.loc 5 737 0
+	ldr	r3, .L1636+12
+	ldrh	r1, [r3]
+	cbnz	r1, .L1584
+	ldr	r3, .L1636+40
+	ldrh	r2, [r6]
+	ldr	r3, [r3]
+	ldrh	r0, [r3, r2, lsl #1]
+	cbz	r0, .L1584
+	.loc 5 739 0
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 5 740 0
+	ldrh	r0, [r6]
+	bl	update_vpc_list
+.LVL1798:
+	.loc 5 741 0
+	bl	FtlCacheWriteBack
+.LVL1799:
+	.loc 5 742 0
+	bl	l2p_flush
+.LVL1800:
+	.loc 5 743 0
+	bl	FtlVpcTblFlush
+.LVL1801:
+.L1584:
+	.loc 5 745 0
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L1582:
+	.loc 5 747 0
+	ldr	r3, .L1636+44
+	ldrh	r3, [r3]
+	cmp	r3, #2
+	bhi	.L1585
+	.loc 5 749 0
+	ldr	r3, .L1636+48
+	ldrh	r4, [r3]
+.LVL1802:
+	b	.L1557
+.LVL1803:
+.L1585:
+	.loc 5 752 0
+	ldr	r2, .L1636+28
+	movs	r1, #0
+	str	r1, [r2]
+	.loc 5 754 0
+	ldr	r2, .L1636+52
+	ldrh	r0, [r2]
+	cmp	r0, #0
+	bne	.L1514
+	.loc 5 757 0
+	adds	r0, r3, #1
+.LVL1804:
+	b	.L1514
+.LVL1805:
+.L1589:
+.LBE291:
+.LBE293:
+	.loc 5 479 0
+	movs	r0, #0
+	b	.L1514
+.LVL1806:
+.L1520:
+.LBB294:
+.LBB292:
+	.loc 5 527 0
+	cmp	r7, #0
+	beq	.L1587
+.LVL1807:
+.L1530:
+	.loc 5 557 0
+	ldr	r3, .L1636+20
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1598
+.LVL1808:
+.L1588:
+	ldr	r3, .L1636+56
+	movw	r2, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bne	.L1598
+	cmp	r5, r3
+	bne	.L1598
+	ldrh	r3, [r6]
+	cmp	r3, r5
+	beq	.L1542
+.LVL1809:
+.L1547:
+	.loc 5 556 0
+	movw	r5, #65535
+.L1598:
+	movs	r4, #1
+	b	.L1541
+.LVL1810:
+.L1522:
+	.loc 5 527 0
+	cmp	r7, #0
+	beq	.L1587
+	movw	r5, #65535
+	b	.L1588
+.LVL1811:
+.L1521:
+	cmp	r7, #0
+	bne	.L1547
+	b	.L1587
+.L1637:
+	.align	2
+.L1636:
+	.word	.LANCHOR95
+	.word	.LANCHOR177
+	.word	.LC1
+	.word	.LANCHOR175
+	.word	.LANCHOR121
+	.word	.LANCHOR53
+	.word	.LANCHOR72
+	.word	.LANCHOR117
+	.word	.LANCHOR176
+	.word	.LANCHOR91
+	.word	.LANCHOR43
+	.word	.LANCHOR48
+	.word	.LANCHOR19
+	.word	.LANCHOR174
+	.word	.LANCHOR101
+.LBE292:
+.LBE294:
+	.cfi_endproc
+.LFE322:
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_gc,"ax",%progbits
+	.align	1
+	.global	sftl_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_gc, %function
+sftl_gc:
+.LFB323:
+	.loc 5 761 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	.loc 5 762 0
+	movs	r1, #1
+	mov	r0, r1
+	b	rk_ftl_garbage_collect
+.LVL1812:
+	.cfi_endproc
+.LFE323:
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlRead,"ax",%progbits
+	.align	1
+	.global	FtlRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRead, %function
+FtlRead:
+.LFB217:
+	.loc 3 814 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1813:
+	.loc 3 824 0
+	cmp	r0, #16
+	.loc 3 814 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 3 814 0
+	mov	r6, r1
+	mov	r8, r3
+	str	r2, [sp, #32]
+	.loc 3 824 0
+	bne	.L1640
+	.loc 3 825 0
+	mov	r2, r3
+.LVL1814:
+	ldr	r1, [sp, #32]
+.LVL1815:
+	add	r0, r6, #256
+.LVL1816:
+	bl	FtlVendorPartRead
+.LVL1817:
+	str	r0, [sp, #4]
+.LVL1818:
+.L1639:
+	.loc 3 901 0
+	ldr	r0, [sp, #4]
+	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1819:
+.L1640:
+	.cfi_restore_state
+	.loc 3 830 0
+	ldr	r3, [sp, #32]
+.LVL1820:
+	adds	r3, r1, r3
+	str	r3, [sp, #12]
+	ldr	r3, .L1671
+	ldr	r2, [sp, #12]
+.LVL1821:
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L1660
+	.loc 3 830 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1671+4
+	ldr	r3, [r3]
+	adds	r0, r3, #1
+.LVL1822:
+	beq	.L1661
+	.loc 3 833 0 is_stmt 1
+	bl	FtlCacheWriteBack
+.LVL1823:
+	.loc 3 835 0
+	ldr	r3, .L1671+8
+	mov	r0, r6
+	.loc 3 828 0
+	movs	r7, #0
+	.loc 3 840 0
+	mov	r5, r7
+	.loc 3 835 0
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+.LVL1824:
+	.loc 3 836 0
+	ldr	r3, [sp, #12]
+	mov	r1, r4
+	.loc 3 835 0
+	str	r0, [sp, #16]
+.LVL1825:
+	.loc 3 836 0
+	subs	r0, r3, #1
+.LVL1826:
+	bl	__aeabi_uidiv
+.LVL1827:
+	.loc 3 837 0
+	ldr	r3, [sp, #16]
+	.loc 3 841 0
+	ldr	r2, .L1671+12
+	.loc 3 835 0
+	ldr	r4, [sp, #16]
+	.loc 3 837 0
+	rsb	r3, r3, #1
+	.loc 3 836 0
+	str	r0, [sp, #20]
+.LVL1828:
+	.loc 3 837 0
+	add	r3, r3, r0
+	.loc 3 828 0
+	str	r7, [sp, #28]
+	.loc 3 837 0
+	str	r3, [sp, #8]
+.LVL1829:
+	.loc 3 841 0
+	ldr	r1, [sp, #8]
+	ldr	r3, [r2]
+.LVL1830:
+	.loc 3 820 0
+	str	r7, [sp, #24]
+	.loc 3 815 0
+	str	r7, [sp, #4]
+	.loc 3 841 0
+	add	r3, r3, r1
+	str	r3, [r2]
+.LVL1831:
+.L1642:
+	.loc 3 842 0
+	ldr	r3, [sp, #8]
+	cbnz	r3, .L1658
+	.loc 3 898 0
+	ldr	r3, .L1671+16
+	ldrh	r3, [r3]
+	cbnz	r3, .L1659
+	.loc 3 898 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1671+20
+	ldrh	r3, [r3]
+	cmp	r3, #31
+	bhi	.L1639
+.L1659:
+	.loc 3 899 0 is_stmt 1
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL1832:
+	b	.L1639
+.LVL1833:
+.L1658:
+	.loc 3 843 0
+	add	r1, sp, #52
+	movs	r2, #0
+	mov	r0, r4
+	bl	log2phys
+.LVL1834:
+	.loc 3 844 0
+	ldr	r3, [sp, #52]
+	adds	r1, r3, #1
+	bne	.L1643
+	.loc 3 845 0 discriminator 1
+	ldr	fp, .L1671+8
+	mov	r10, #0
+.L1644:
+.LVL1835:
+	ldrh	r0, [fp]
+	cmp	r10, r0
+	bcc	.L1646
+.LVL1836:
+.L1647:
+	.loc 3 874 0
+	ldr	r3, [sp, #8]
+	.loc 3 872 0
+	adds	r4, r4, #1
+.LVL1837:
+	.loc 3 874 0
+	subs	r3, r3, #1
+.LVL1838:
+	str	r3, [sp, #8]
+	beq	.L1651
+	.loc 3 874 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1671+24
+.LVL1839:
+	ldrh	r3, [r3]
+	cmp	r5, r3, lsl #2
+	bne	.L1642
+.L1651:
+	.loc 3 875 0 is_stmt 1
+	cmp	r5, #0
+	beq	.L1642
+	.loc 3 876 0
+	ldr	r3, .L1671+28
+	movs	r2, #0
+	mov	r1, r5
+	.loc 3 877 0
+	mov	r10, #0
+	.loc 3 876 0
+	ldr	r0, [r3]
+	bl	FlashReadPages
+.LVL1840:
+	.loc 3 883 0
+	lsls	r3, r7, #9
+	str	r3, [sp, #44]
+	.loc 3 880 0
+	ldr	r3, [sp, #24]
+	lsls	r3, r3, #9
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #28]
+	lsls	r3, r3, #9
+	str	r3, [sp, #40]
+.LVL1841:
+.L1657:
+	movs	r3, #20
+	mul	fp, r3, r10
+	.loc 3 878 0
+	ldr	r3, .L1671+28
+	ldr	r2, [r3]
+	ldr	r3, [sp, #16]
+	add	r2, r2, fp
+	ldr	r1, [r2, #16]
+	cmp	r3, r1
+	bne	.L1653
+	.loc 3 879 0
+	ldr	r1, [r2, #8]
+	ldr	r2, .L1671+32
+	ldr	r2, [r2]
+	cmp	r1, r2
+	bne	.L1654
+	.loc 3 880 0
+	ldr	r3, [sp, #36]
+	mov	r0, r8
+	ldr	r2, [sp, #40]
+	add	r1, r1, r3
+.L1670:
+	.loc 3 883 0
+	bl	ftl_memcpy
+.LVL1842:
+.L1654:
+	.loc 3 885 0
+	ldr	r3, .L1671+28
+	ldr	r2, [r3]
+	ldr	r3, [r2, fp]
+	add	r1, r2, fp
+	adds	r2, r3, #1
+	bne	.L1655
+	.loc 3 886 0
+	ldr	r1, .L1671+36
+	.loc 3 887 0
+	str	r3, [sp, #4]
+	.loc 3 886 0
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.LVL1843:
+.L1656:
+	.loc 3 877 0 discriminator 2
+	add	r10, r10, #1
+.LVL1844:
+	cmp	r5, r10
+	bne	.L1657
+	.loc 3 894 0
+	movs	r5, #0
+.LVL1845:
+	b	.L1642
+.LVL1846:
+.L1646:
+	.loc 3 846 0
+	mla	r0, r0, r4, r10
+.LVL1847:
+	.loc 3 847 0
+	cmp	r6, r0
+	bhi	.L1645
+	.loc 3 847 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #12]
+	cmp	r3, r0
+	bls	.L1645
+	.loc 3 848 0 is_stmt 1
+	subs	r0, r0, r6
+.LVL1848:
+	mov	r2, #512
+	movs	r1, #0
+	add	r0, r8, r0, lsl #9
+	bl	ftl_memset
+.LVL1849:
+.L1645:
+	.loc 3 845 0 discriminator 2
+	add	r10, r10, #1
+.LVL1850:
+	b	.L1644
+.LVL1851:
+.L1643:
+	.loc 3 851 0
+	ldr	r2, .L1671+28
+	mov	r10, #20
+	ldr	r2, [r2]
+	mla	r10, r10, r5, r2
+	str	r3, [r10, #4]
+	.loc 3 852 0
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	ldr	r3, .L1671+8
+	bne	.L1648
+	.loc 3 853 0
+	ldr	r2, .L1671+32
+	.loc 3 854 0
+	mov	r0, r6
+	ldrh	fp, [r3]
+	.loc 3 853 0
+	ldr	r2, [r2]
+	.loc 3 854 0
+	mov	r1, fp
+	.loc 3 853 0
+	str	r2, [r10, #8]
+	.loc 3 854 0
+	bl	__aeabi_uidivmod
+.LVL1852:
+	ldr	r2, [sp, #32]
+	.loc 3 855 0
+	sub	r3, fp, r1
+	.loc 3 854 0
+	str	r1, [sp, #24]
+.LVL1853:
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+.LVL1854:
+	.loc 3 857 0
+	cmp	fp, r3
+	str	r3, [sp, #28]
+.LVL1855:
+	bne	.L1649
+	.loc 3 858 0
+	str	r8, [r10, #8]
+.LVL1856:
+.L1649:
+	.loc 3 867 0
+	ldr	r3, .L1671+40
+	ldr	r2, .L1671+44
+	.loc 3 868 0
+	str	r4, [r10, #16]
+	.loc 3 867 0
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	muls	r3, r5, r3
+	.loc 3 869 0
+	adds	r5, r5, #1
+.LVL1857:
+	.loc 3 867 0
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [r10, #12]
+	b	.L1647
+.L1648:
+	.loc 3 859 0
+	ldr	r2, [sp, #20]
+	cmp	r4, r2
+	bne	.L1650
+	.loc 3 860 0
+	ldr	r2, .L1671+48
+	.loc 3 861 0
+	ldr	r1, [sp, #12]
+	.loc 3 860 0
+	ldr	r2, [r2]
+	str	r2, [r10, #8]
+	.loc 3 861 0
+	ldrh	r2, [r3]
+	mul	r3, r2, r4
+	subs	r7, r1, r3
+.LVL1858:
+	.loc 3 862 0
+	cmp	r2, r7
+	bne	.L1649
+.L1669:
+	.loc 3 865 0
+	subs	r3, r3, r6
+	add	r3, r8, r3, lsl #9
+	str	r3, [r10, #8]
+	b	.L1649
+.L1650:
+	ldrh	r3, [r3]
+	muls	r3, r4, r3
+	b	.L1669
+.LVL1859:
+.L1653:
+	.loc 3 881 0
+	ldr	r3, [sp, #20]
+	cmp	r3, r1
+	bne	.L1654
+	.loc 3 882 0
+	ldr	r3, .L1671+48
+	ldr	r1, [r2, #8]
+	ldr	r2, [r3]
+	cmp	r1, r2
+	bne	.L1654
+	.loc 3 883 0
+	ldr	r2, .L1671+8
+	ldr	r3, [sp, #20]
+	ldrh	r0, [r2]
+	ldr	r2, [sp, #44]
+	muls	r0, r3, r0
+	subs	r0, r0, r6
+	add	r0, r8, r0, lsl #9
+	b	.L1670
+.L1655:
+	.loc 3 889 0
+	cmp	r3, #256
+	bne	.L1656
+.LBB295:
+	.loc 3 890 0
+	ldr	r0, [r1, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL1860:
+	.loc 3 891 0
+	bl	FtlGcRefreshBlock
+.LVL1861:
+	b	.L1656
+.LVL1862:
+.L1660:
+.LBE295:
+	.loc 3 831 0
+	mov	r3, #-1
+.LVL1863:
+.L1661:
+	str	r3, [sp, #4]
+	b	.L1639
+.L1672:
+	.align	2
+.L1671:
+	.word	.LANCHOR34
+	.word	.LANCHOR88
+	.word	.LANCHOR12
+	.word	.LANCHOR63
+	.word	.LANCHOR103
+	.word	.LANCHOR48
+	.word	.LANCHOR3
+	.word	.LANCHOR120
+	.word	.LANCHOR116
+	.word	.LANCHOR83
+	.word	.LANCHOR24
+	.word	.LANCHOR115
+	.word	.LANCHOR114
+	.cfi_endproc
+.LFE217:
+	.size	FtlRead, .-FtlRead
+	.section	.text.sftl_read,"ax",%progbits
+	.align	1
+	.global	sftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_read, %function
+sftl_read:
+.LFB222:
+	.loc 3 1204 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1864:
+	.loc 3 1205 0
+	mov	r3, r2
+	mov	r2, r1
+.LVL1865:
+	mov	r1, r0
+.LVL1866:
+	movs	r0, #0
+.LVL1867:
+	b	FtlRead
+.LVL1868:
+	.cfi_endproc
+.LFE222:
+	.size	sftl_read, .-sftl_read
+	.section	.text.FtlWrite,"ax",%progbits
+	.align	1
+	.global	FtlWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWrite, %function
+FtlWrite:
+.LFB220:
+	.loc 3 962 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1869:
+	.loc 3 970 0
+	cmp	r0, #16
+	.loc 3 962 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 3 962 0
+	mov	r8, r1
+	str	r2, [sp, #16]
+	str	r3, [sp, #4]
+	.loc 3 970 0
+	bne	.L1675
+	.loc 3 971 0
+	mov	r2, r3
+.LVL1870:
+	ldr	r1, [sp, #16]
+.LVL1871:
+	add	r0, r8, #256
+.LVL1872:
+	bl	FtlVendorPartWrite
+.LVL1873:
+.L1674:
+	.loc 3 1153 0
+	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1874:
+.L1675:
+	.cfi_restore_state
+	.loc 3 974 0
+	ldr	r3, [sp, #16]
+.LVL1875:
+	adds	r5, r1, r3
+	ldr	r3, .L1740
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bhi	.L1717
+	.loc 3 974 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1740+4
+	ldr	r0, [r3]
+.LVL1876:
+	adds	r4, r0, #1
+	beq	.L1674
+	.loc 3 977 0 is_stmt 1
+	ldr	r3, .L1740+8
+	mov	r2, #2048
+.LVL1877:
+	.loc 3 978 0
+	mov	r0, r8
+	.loc 3 977 0
+	str	r2, [r3]
+	.loc 3 978 0
+	ldr	r3, .L1740+12
+	ldrh	r4, [r3]
+	mov	r1, r4
+.LVL1878:
+	bl	__aeabi_uidiv
+.LVL1879:
+	.loc 3 979 0
+	mov	r1, r4
+	.loc 3 978 0
+	str	r0, [sp]
+.LVL1880:
+	.loc 3 979 0
+	subs	r0, r5, #1
+.LVL1881:
+	bl	__aeabi_uidiv
+.LVL1882:
+	.loc 3 980 0
+	ldr	r2, [sp]
+	.loc 3 979 0
+	str	r0, [sp, #20]
+.LVL1883:
+	.loc 3 980 0
+	subs	r5, r0, r2
+	.loc 3 982 0
+	ldr	r2, .L1740+16
+	.loc 3 980 0
+	adds	r3, r5, #1
+	.loc 3 982 0
+	adds	r1, r5, #1
+	.loc 3 980 0
+	str	r3, [sp, #8]
+.LVL1884:
+	.loc 3 982 0
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	str	r3, [r2]
+	.loc 3 983 0
+	ldr	r3, .L1740+20
+	ldr	r7, [r3]
+	cbz	r7, .L1677
+	.loc 3 984 0
+	ldr	r3, [r7, #16]
+	ldr	r2, [sp]
+	cmp	r2, r3
+	beq	.L1678
+	.loc 3 985 0
+	bl	FtlCacheWriteBack
+.LVL1885:
+.L1677:
+	.loc 3 1008 0
+	ldr	r3, .L1740+24
+	ldr	r4, .L1740+28
+	ldr	r3, [r3]
+	cbz	r3, .L1680
+	.loc 3 1008 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r4, #4]
+	.loc 3 1009 0 is_stmt 1 discriminator 1
+	ldr	r3, .L1740+32
+	cmp	r2, #0
+	it	eq
+	moveq	r4, r3
+.L1680:
+	.loc 3 1068 0
+	ldr	r6, [sp]
+.LVL1886:
+.L1681:
+	.loc 3 1011 0
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L1715
+	.loc 3 1012 0
+	ldr	r3, .L1740+36
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1682
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	mov	r2, #1012
+	ldr	r1, .L1740+40
+	ldr	r0, .L1740+44
+	bl	printf
+.LVL1887:
+.L1682:
+	.loc 3 1013 0 is_stmt 1
+	ldrh	r7, [r4, #4]
+	cbnz	r7, .L1683
+	.loc 3 1014 0
+	bl	FtlCacheWriteBack
+.LVL1888:
+	.loc 3 1016 0
+	ldr	r3, .L1740+28
+	ldr	r5, .L1740+24
+	cmp	r4, r3
+	bne	.L1684
+	.loc 3 1017 0
+	ldr	r0, .L1740+32
+	ldrh	r4, [r0, #4]
+.LVL1889:
+	cbnz	r4, .L1685
+	.loc 3 1018 0
+	bl	allocate_new_data_superblock
+.LVL1890:
+	.loc 3 1019 0
+	str	r4, [r5]
+.L1685:
+	.loc 3 1021 0
+	ldr	r0, .L1740+28
+	bl	allocate_new_data_superblock
+.LVL1891:
+	.loc 3 1023 0
+	ldr	r4, .L1740+28
+	.loc 3 1022 0
+	ldr	r2, [r5]
+	.loc 3 1023 0
+	ldr	r3, .L1740+32
+	cmp	r2, #0
+	it	ne
+	movne	r4, r3
+.L1686:
+.LVL1892:
+	.loc 3 1033 0
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1683
+	.loc 3 1034 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1893:
+.L1683:
+	.loc 3 1041 0
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	.loc 3 1043 0
+	ldrh	r3, [r4, #4]
+	ldr	r1, [sp, #8]
+	.loc 3 1041 0
+	lsls	r2, r2, #2
+	cmp	r3, r1
+	it	cs
+	movcs	r3, r1
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	.loc 3 1045 0
+	ldr	r3, .L1740+36
+	str	r2, [sp, #36]
+.LVL1894:
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+.LVL1895:
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1687
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	movw	r2, #1045
+	ldr	r1, .L1740+40
+	ldr	r0, .L1740+44
+	bl	printf
+.LVL1896:
+.L1687:
+	.loc 3 1054 0 is_stmt 1 discriminator 1
+	ldr	r10, .L1740+80
+	.loc 3 1068 0 discriminator 1
+	mov	fp, #0
+.L1688:
+.LVL1897:
+	.loc 3 1046 0 discriminator 1
+	ldr	r3, [sp, #36]
+	cmp	fp, r3
+	bne	.L1709
+.L1689:
+.LVL1898:
+	.loc 3 1127 0
+	ldr	r3, .L1740+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L1710
+.LVL1899:
+	.loc 3 1129 0
+	ldr	r3, [sp, #8]
+	.loc 3 1130 0
+	subs	fp, fp, #1
+.LVL1900:
+	.loc 3 1129 0
+	add	r3, r3, #-1
+	str	r3, [sp, #8]
+.LVL1901:
+	.loc 3 1130 0
+	bne	.L1710
+.LVL1902:
+.L1715:
+	.loc 3 1137 0
+	ldr	r2, [sp]
+	movs	r0, #0
+	ldr	r3, [sp, #20]
+.LVL1903:
+	.loc 3 1139 0
+	ldr	r4, .L1740+48
+.LVL1904:
+	.loc 3 1137 0
+	subs	r1, r3, r2
+	bl	rk_ftl_garbage_collect
+.LVL1905:
+	.loc 3 1139 0
+	ldrh	r2, [r4]
+	cmp	r2, #15
+	bhi	.L1712
+	.loc 3 1141 0
+	ldr	r5, .L1740+52
+	ldr	r6, .L1740+56
+.LVL1906:
+.L1736:
+	ldrh	r3, [r5]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1716
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	bne	.L1716
+	.loc 3 1142 0 is_stmt 1
+	movs	r0, #0
+	bl	List_get_gc_head_node
+.LVL1907:
+	uxth	r0, r0
+	bl	FtlGcRefreshBlock
+.LVL1908:
+.L1716:
+	.loc 3 1143 0
+	ldr	r2, .L1740+60
+	movs	r3, #128
+	.loc 3 1145 0
+	movs	r1, #1
+	mov	r0, r1
+	.loc 3 1143 0
+	strh	r3, [r2]	@ movhi
+	.loc 3 1144 0
+	ldr	r2, .L1740+64
+	strh	r3, [r2]	@ movhi
+	.loc 3 1145 0
+	bl	rk_ftl_garbage_collect
+.LVL1909:
+	.loc 3 1146 0
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL1910:
+	.loc 3 1147 0
+	ldrh	r3, [r4]
+	cmp	r3, #8
+	bls	.L1736
+	b	.L1712
+.LVL1911:
+.L1678:
+	.loc 3 987 0
+	ldr	r2, .L1740+68
+.LVL1912:
+	.loc 3 988 0
+	mov	r1, r4
+.LVL1913:
+	mov	r0, r8
+.LVL1914:
+	.loc 3 987 0
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	.loc 3 988 0
+	bl	__aeabi_uidivmod
+.LVL1915:
+	ldr	r2, [sp, #16]
+	.loc 3 989 0
+	subs	r4, r4, r1
+	.loc 3 992 0
+	ldr	r0, [r7, #8]
+	.loc 3 988 0
+	mov	r3, r1
+.LVL1916:
+	.loc 3 992 0
+	ldr	r1, [sp, #4]
+.LVL1917:
+	cmp	r4, r2
+	it	cs
+	movcs	r4, r2
+.LVL1918:
+	lsls	r6, r4, #9
+	add	r0, r0, r3, lsl #9
+	mov	r2, r6
+	bl	ftl_memcpy
+.LVL1919:
+	.loc 3 994 0
+	cbnz	r5, .L1679
+.LVL1920:
+.L1712:
+	.loc 3 995 0
+	movs	r0, #0
+	b	.L1674
+.LVL1921:
+.L1679:
+	.loc 3 996 0
+	ldr	r3, [sp, #16]
+	.loc 3 997 0
+	add	r8, r8, r4
+.LVL1922:
+	.loc 3 996 0
+	subs	r3, r3, r4
+	str	r3, [sp, #16]
+.LVL1923:
+	.loc 3 998 0
+	ldr	r3, [sp, #4]
+.LVL1924:
+	add	r3, r3, r6
+	str	r3, [sp, #4]
+.LVL1925:
+	.loc 3 999 0
+	ldr	r3, [sp]
+.LVL1926:
+	adds	r3, r3, #1
+	str	r3, [sp]
+.LVL1927:
+	.loc 3 1000 0
+	bl	FtlCacheWriteBack
+.LVL1928:
+	str	r5, [sp, #8]
+	b	.L1677
+.LVL1929:
+.L1684:
+	.loc 3 1028 0
+	ldrh	r2, [r3, #4]
+	.loc 3 1027 0
+	str	r7, [r5]
+	.loc 3 1028 0
+	cbnz	r2, .L1722
+	.loc 3 1029 0
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.LVL1930:
+	b	.L1686
+.L1722:
+	mov	r4, r3
+.LVL1931:
+	b	.L1683
+.LVL1932:
+.L1709:
+	.loc 3 1047 0
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1689
+	.loc 3 1051 0
+	movs	r2, #0
+	add	r1, sp, #40
+	mov	r0, r6
+	movs	r7, #20
+	bl	log2phys
+.LVL1933:
+	.loc 3 1052 0
+	mov	r0, r4
+	mul	r7, r7, fp
+	bl	get_new_active_ppa
+.LVL1934:
+	.loc 3 1055 0
+	ldr	r3, .L1740+72
+	.loc 3 1054 0
+	ldr	r1, [r10]
+	.loc 3 1055 0
+	ldrh	r2, [r3]
+	.loc 3 1054 0
+	add	r1, r1, r7
+	str	r0, [r1, #4]
+	.loc 3 1056 0
+	str	r6, [r1, #16]
+.LVL1935:
+	.loc 3 1055 0
+	mul	r0, r2, fp
+.LVL1936:
+	bic	r3, r0, #3
+	ldr	r0, .L1740+76
+	str	r3, [sp, #28]
+	ldr	r3, [r0]
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #32]
+	add	r3, r3, r0
+	str	r3, [r1, #12]
+	.loc 3 1059 0
+	mov	r0, r3
+	movs	r1, #0
+.LVL1937:
+	.loc 3 1055 0
+	str	r3, [sp, #12]
+.LVL1938:
+	.loc 3 1059 0
+	bl	ftl_memset
+.LVL1939:
+	.loc 3 1061 0
+	ldr	r3, [sp]
+	ldr	r2, .L1740+12
+	cmp	r6, r3
+	beq	.L1690
+	.loc 3 1061 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #20]
+	cmp	r6, r3
+	bne	.L1735
+.LVL1940:
+	.loc 3 1069 0 is_stmt 1
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #16]
+	smulbb	r2, r2, r6
+	add	r5, r8, r3
+	.loc 3 1068 0
+	movs	r3, #0
+	str	r3, [sp, #24]
+	.loc 3 1069 0
+	subs	r5, r5, r2
+	uxth	r5, r5
+.LVL1941:
+	b	.L1693
+.L1741:
+	.align	2
+.L1740:
+	.word	.LANCHOR34
+	.word	.LANCHOR88
+	.word	.LANCHOR178
+	.word	.LANCHOR12
+	.word	.LANCHOR65
+	.word	.LANCHOR150
+	.word	.LANCHOR179
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR3
+	.word	.LANCHOR180
+	.word	.LC1
+	.word	.LANCHOR48
+	.word	.LANCHOR82
+	.word	.LANCHOR101
+	.word	.LANCHOR85
+	.word	.LANCHOR84
+	.word	.LANCHOR66
+	.word	.LANCHOR24
+	.word	.LANCHOR115
+	.word	.LANCHOR122
+.LVL1942:
+.L1690:
+	.loc 3 1063 0
+	ldrh	r5, [r2]
+	mov	r0, r8
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+.LVL1943:
+	ldr	r3, [sp, #16]
+	.loc 3 1064 0
+	subs	r5, r5, r1
+	.loc 3 1063 0
+	str	r1, [sp, #24]
+.LVL1944:
+	cmp	r5, r3
+	it	cs
+	movcs	r5, r3
+.LVL1945:
+.L1693:
+	.loc 3 1072 0
+	ldr	r2, .L1742
+	.loc 3 1073 0
+	ldr	r3, [sp]
+	.loc 3 1072 0
+	ldrh	r2, [r2]
+	cmp	r5, r2
+	.loc 3 1074 0
+	ldr	r2, [r10]
+	.loc 3 1072 0
+	bne	.L1694
+	.loc 3 1073 0
+	cmp	r6, r3
+	.loc 3 1074 0
+	add	r7, r7, r2
+	.loc 3 1076 0
+	ittet	ne
+	mulne	r5, r5, r6
+.LVL1946:
+	ldrne	r3, [sp, #4]
+	.loc 3 1074 0
+	ldreq	r3, [sp, #4]
+	.loc 3 1076 0
+	subne	r5, r5, r8
+	.loc 3 1074 0
+	itee	eq
+	streq	r3, [r7, #8]
+	.loc 3 1076 0
+	addne	r5, r3, r5, lsl #9
+	strne	r5, [r7, #8]
+.LVL1947:
+.L1696:
+	.loc 3 1119 0
+	ldr	r3, .L1742+4
+	ldrb	r1, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r3]
+	cmp	r1, r2
+	bcc	.L1706
+	.loc 3 1119 0 is_stmt 0 discriminator 1
+	movw	r2, #1119
+	ldr	r1, .L1742+8
+	ldr	r0, .L1742+12
+	bl	printf
+.LVL1948:
+.L1706:
+	.loc 3 1120 0 is_stmt 1
+	ldr	r3, [sp, #32]
+	movw	r2, #61589
+	ldr	r1, [sp, #28]
+	.loc 3 1046 0
+	add	fp, fp, #1
+.LVL1949:
+	.loc 3 1120 0
+	strh	r2, [r3, r1]	@ movhi
+	.loc 3 1121 0
+	ldr	r1, .L1742+16
+	ldr	r3, [sp, #12]
+	ldr	r2, [r1]
+	str	r2, [r3, #4]
+	adds	r2, r2, #1
+	adds	r3, r2, #1
+	.loc 3 1122 0
+	ldr	r3, [sp, #12]
+	.loc 3 1121 0
+	it	eq
+	moveq	r2, #0
+	str	r2, [r1]
+	.loc 3 1123 0
+	ldr	r2, [sp, #40]
+	.loc 3 1122 0
+	str	r6, [r3, #8]
+	.loc 3 1125 0
+	adds	r6, r6, #1
+.LVL1950:
+	.loc 3 1123 0
+	str	r2, [r3, #12]
+	.loc 3 1124 0
+	ldrh	r2, [r4]
+	strh	r2, [r3, #2]	@ movhi
+	b	.L1688
+.LVL1951:
+.L1694:
+	.loc 3 1079 0
+	cmp	r6, r3
+	.loc 3 1080 0
+	add	r2, r2, r7
+	ite	eq
+	ldreq	r1, .L1742+20
+	.loc 3 1082 0
+	ldrne	r1, .L1742+24
+	ldr	r1, [r1]
+	str	r1, [r2, #8]
+	.loc 3 1084 0
+	ldr	r2, [sp, #40]
+	adds	r1, r2, #1
+	beq	.L1699
+.LBB296:
+	.loc 3 1086 0
+	str	r2, [sp, #48]
+	.loc 3 1090 0
+	add	r0, sp, #44
+	.loc 3 1088 0
+	ldr	r2, [r10]
+	.loc 3 1087 0
+	str	r6, [sp, #60]
+	.loc 3 1088 0
+	add	r2, r2, r7
+	ldr	r1, [r2, #8]
+	.loc 3 1089 0
+	ldr	r2, [r2, #12]
+	.loc 3 1088 0
+	str	r1, [sp, #52]
+	.loc 3 1090 0
+	movs	r1, #1
+	.loc 3 1089 0
+	str	r2, [sp, #56]
+	.loc 3 1090 0
+	movs	r2, #0
+	bl	FlashReadPages
+.LVL1952:
+	.loc 3 1091 0
+	ldr	r2, [sp, #44]
+	adds	r2, r2, #1
+	bne	.L1700
+	.loc 3 1092 0
+	ldr	r1, .L1742+28
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L1703:
+.LBE296:
+	.loc 3 1104 0
+	ldr	r3, [sp]
+	lsls	r2, r5, #9
+	cmp	r6, r3
+	bne	.L1704
+	.loc 3 1105 0
+	ldr	r1, [r10]
+	ldr	r3, [sp, #24]
+	add	r1, r1, r7
+	ldr	r0, [r1, #8]
+	ldr	r1, [sp, #4]
+	add	r0, r0, r3, lsl #9
+.L1738:
+	.loc 3 1107 0
+	bl	ftl_memcpy
+.LVL1953:
+	.loc 3 1109 0
+	ldr	r3, [sp, #20]
+	cmp	r6, r3
+	bne	.L1696
+	.loc 3 1110 0
+	ldrh	r2, [r4, #4]
+	cmp	r2, #0
+	beq	.L1696
+	.loc 3 1111 0
+	ldr	r2, [r10]
+	add	r7, r7, r2
+	ldr	r2, .L1742+32
+	str	r7, [r2]
+	.loc 3 1112 0
+	ldr	r2, .L1742+36
+	str	r4, [r2]
+	b	.L1696
+.L1700:
+.LBB297:
+	.loc 3 1094 0
+	ldr	r3, [sp, #12]
+	ldr	r1, [r3, #8]
+	cmp	r6, r1
+	beq	.L1702
+	.loc 3 1095 0
+	ldr	r0, .L1742+28
+	ldr	r2, [r0, #72]
+	adds	r2, r2, #1
+	str	r2, [r0, #72]
+	.loc 3 1096 0
+	mov	r2, r6
+	ldr	r0, .L1742+40
+	bl	printf
+.LVL1954:
+.L1702:
+	.loc 3 1098 0
+	ldr	r3, [sp, #12]
+	ldr	r2, [r3, #8]
+	cmp	r6, r2
+	beq	.L1703
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	movw	r2, #1098
+	ldr	r1, .L1742+8
+	ldr	r0, .L1742+12
+	bl	printf
+.LVL1955:
+	b	.L1703
+.LVL1956:
+.L1699:
+.LBE297:
+	.loc 3 1101 0 is_stmt 1
+	ldr	r2, [r10]
+	movs	r1, #0
+	adds	r0, r2, r7
+	ldr	r2, .L1742+44
+	ldr	r0, [r0, #8]
+	ldrh	r2, [r2]
+	bl	ftl_memset
+.LVL1957:
+	b	.L1703
+.L1704:
+	.loc 3 1107 0
+	ldr	r1, .L1742
+	ldr	r0, [r10]
+	ldr	r3, [sp, #4]
+	ldrh	r1, [r1]
+	add	r0, r0, r7
+	ldr	r0, [r0, #8]
+	muls	r1, r6, r1
+	sub	r1, r1, r8
+	add	r1, r3, r1, lsl #9
+	b	.L1738
+.LVL1958:
+.L1735:
+	.loc 3 1117 0
+	ldrh	r2, [r2]
+	ldr	r3, [sp, #4]
+	ldr	r1, [r10]
+	muls	r2, r6, r2
+	add	r7, r7, r1
+	sub	r2, r2, r8
+	add	r2, r3, r2, lsl #9
+	str	r2, [r7, #8]
+	b	.L1696
+.LVL1959:
+.L1710:
+	.loc 3 1133 0
+	ldr	r0, .L1742+48
+	mov	r3, r4
+	movs	r2, #0
+	mov	r1, fp
+	ldr	r0, [r0]
+	bl	FtlProgPages
+.LVL1960:
+	.loc 3 1134 0
+	ldr	r3, [sp, #8]
+	cmp	r3, fp
+	bcs	.L1713
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	movw	r2, #1134
+	ldr	r1, .L1742+8
+	ldr	r0, .L1742+12
+	bl	printf
+.LVL1961:
+.L1713:
+	.loc 3 1135 0 is_stmt 1
+	ldr	r3, [sp, #8]
+	sub	r3, r3, fp
+	str	r3, [sp, #8]
+.LVL1962:
+	b	.L1681
+.LVL1963:
+.L1717:
+	.loc 3 975 0
+	mov	r0, #-1
+.LVL1964:
+	b	.L1674
+.L1743:
+	.align	2
+.L1742:
+	.word	.LANCHOR12
+	.word	.LANCHOR3
+	.word	.LANCHOR180
+	.word	.LC1
+	.word	.LANCHOR72
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR83
+	.word	.LANCHOR150
+	.word	.LANCHOR171
+	.word	.LC105
+	.word	.LANCHOR23
+	.word	.LANCHOR122
+	.cfi_endproc
+.LFE220:
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.sftl_write,"ax",%progbits
+	.align	1
+	.global	sftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_write, %function
+sftl_write:
+.LFB223:
+	.loc 3 1209 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1965:
+	.loc 3 1210 0
+	mov	r3, r2
+	mov	r2, r1
+.LVL1966:
+	mov	r1, r0
+.LVL1967:
+	movs	r0, #0
+.LVL1968:
+	b	FtlWrite
+.LVL1969:
+	.cfi_endproc
+.LFE223:
+	.size	sftl_write, .-sftl_write
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+.LFB277:
+	.loc 2 1360 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1368 0
+	movs	r1, #0
+	.loc 2 1365 0
+	ldr	r8, .L1766+136
+	.loc 2 1368 0
+	ldr	r5, .L1766
+	.loc 2 1365 0
+	ldr	r3, [r8]
+	ldr	r4, .L1766+4
+	.loc 2 1366 0
+	ldr	r10, .L1766+140
+	.loc 2 1368 0
+	ldrh	r2, [r5]
+	ldr	r7, .L1766+8
+	.loc 2 1365 0
+	str	r3, [r4, #8]
+	.loc 2 1369 0
+	ldr	r6, .L1766+12
+	.loc 2 1366 0
+	ldr	r3, [r10]
+	.loc 2 1368 0
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	.loc 2 1366 0
+	str	r3, [r4, #12]
+	.loc 2 1368 0
+	bl	ftl_memset
+.LVL1970:
+	.loc 2 1369 0
+	ldrh	r0, [r6]
+	movw	r3, #65535
+	str	r7, [sp]
+	cmp	r0, r3
+	bne	.L1746
+.L1754:
+	.loc 2 1370 0
+	mov	r0, #-1
+.L1745:
+	.loc 2 1463 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1746:
+	.cfi_restore_state
+	.loc 2 1372 0
+	movs	r1, #1
+	.loc 2 1378 0
+	mov	fp, r4
+	.loc 2 1372 0
+	bl	FtlGetLastWrittenPage
+.LVL1971:
+	.loc 2 1381 0
+	ldr	r3, .L1766+16
+	.loc 2 1372 0
+	sxth	r7, r0
+.LVL1972:
+	.loc 2 1373 0
+	adds	r0, r0, #1
+	strh	r0, [r6, #2]	@ movhi
+.L1748:
+	.loc 2 1375 0
+	cmp	r7, #0
+	bge	.L1751
+	.loc 2 1388 0
+	movw	r2, #1388
+	ldr	r1, .L1766+20
+	ldr	r0, .L1766+24
+	bl	printf
+.LVL1973:
+.L1750:
+	.loc 2 1390 0
+	ldr	r2, .L1766+28
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L1753
+	.loc 2 1390 0 is_stmt 0 discriminator 1
+	movw	r2, #1390
+	ldr	r1, .L1766+20
+	ldr	r0, .L1766+24
+	bl	printf
+.LVL1974:
+.L1753:
+	.loc 2 1392 0 is_stmt 1
+	ldr	r7, .L1766+32
+.LVL1975:
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	mov	r0, r7
+	bl	ftl_memcpy
+.LVL1976:
+	.loc 2 1393 0
+	ldrh	r2, [r5]
+	ldr	r1, [r4, #8]
+	ldr	r3, [sp]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+.LVL1977:
+	.loc 2 1394 0
+	ldrh	r1, [r5]
+	ldr	r3, [r4, #8]
+	mov	r4, r7
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L1766+36
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+.LVL1978:
+	.loc 2 1396 0
+	ldr	r2, [r7]
+	ldr	r3, .L1766+16
+	cmp	r2, r3
+	bne	.L1754
+	.loc 2 1400 0
+	ldr	r3, .L1766+40
+	ldrb	r2, [r7, #10]	@ zero_extendqisi2
+	.loc 2 1399 0
+	ldrh	r5, [r7, #8]
+	.loc 2 1400 0
+	ldrh	r3, [r3]
+	.loc 2 1399 0
+	strh	r5, [r6, #6]	@ movhi
+	.loc 2 1400 0
+	cmp	r2, r3
+	bne	.L1754
+	.loc 2 1403 0
+	ldr	r3, .L1766+44
+	.loc 2 1404 0
+	ldr	r2, .L1766+48
+	.loc 2 1403 0
+	str	r5, [r3]
+	.loc 2 1404 0
+	ldr	r3, .L1766+52
+	ldrh	r3, [r3]
+	muls	r3, r5, r3
+	str	r3, [r2]
+	.loc 2 1405 0
+	ldr	r2, .L1766+56
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L1766+60
+	str	r3, [r2]
+	.loc 2 1406 0
+	ldr	r3, .L1766+64
+	ldr	r6, [r3]
+	ldr	r3, .L1766+68
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1766+72
+	subs	r0, r6, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r5
+	bl	__aeabi_uidiv
+.LVL1979:
+	ldr	r3, .L1766+76
+	.loc 2 1412 0
+	cmp	r5, r6
+	.loc 2 1406 0
+	strh	r0, [r3]	@ movhi
+	.loc 2 1412 0
+	bls	.L1755
+	.loc 2 1412 0 is_stmt 0 discriminator 1
+	movw	r2, #1412
+	ldr	r1, .L1766+20
+	ldr	r0, .L1766+24
+	bl	printf
+.LVL1980:
+.L1755:
+	.loc 2 1415 0 is_stmt 1
+	ldrh	r2, [r4, #16]
+	.loc 2 1414 0
+	ldr	r3, .L1766+80
+	ldrh	ip, [r4, #14]
+	.loc 2 1419 0
+	ldr	r7, .L1766+84
+	.loc 2 1415 0
+	lsrs	r1, r2, #6
+	.loc 2 1416 0
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	.loc 2 1417 0
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	.loc 2 1415 0
+	strh	r1, [r3, #2]	@ movhi
+	.loc 2 1424 0
+	ldr	r1, .L1766+88
+	.loc 2 1417 0
+	strb	r2, [r3, #8]
+	.loc 2 1424 0
+	ldrh	r2, [r4, #18]
+	.loc 2 1414 0
+	strh	ip, [r3]	@ movhi
+	.loc 2 1419 0
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	.loc 2 1420 0
+	movs	r3, #0
+	.loc 2 1424 0
+	strh	r2, [r1]	@ movhi
+	.loc 2 1425 0
+	ldrh	r2, [r4, #20]
+	.loc 2 1420 0
+	strh	r3, [r7, #2]	@ movhi
+	.loc 2 1421 0
+	strb	r3, [r7, #6]
+	.loc 2 1422 0
+	strb	r3, [r7, #8]
+	.loc 2 1425 0
+	lsrs	r5, r2, #6
+	.loc 2 1426 0
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	.loc 2 1427 0
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	.loc 2 1425 0
+	strh	r5, [r1, #2]	@ movhi
+	.loc 2 1429 0
+	ldrh	r5, [r4, #22]
+	.loc 2 1427 0
+	strb	r2, [r1, #8]
+	.loc 2 1429 0
+	ldr	r2, .L1766+92
+	strh	r5, [r2]	@ movhi
+	.loc 2 1430 0
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	.loc 2 1431 0
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	.loc 2 1432 0
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	.loc 2 1430 0
+	strh	r6, [r2, #2]	@ movhi
+	.loc 2 1439 0
+	ldr	r6, [r4, #32]
+	.loc 2 1432 0
+	strb	r5, [r2, #8]
+	.loc 2 1434 0
+	ldr	r5, .L1766+96
+	str	r3, [r5]
+	.loc 2 1435 0
+	ldr	r5, .L1766+100
+	str	r3, [r5]
+	.loc 2 1436 0
+	ldr	r5, .L1766+104
+	str	r3, [r5]
+	.loc 2 1437 0
+	ldr	r5, .L1766+108
+	str	r3, [r5]
+	.loc 2 1439 0
+	ldr	r5, .L1766+112
+	str	r6, [r5]
+	mov	r6, r1
+	.loc 2 1440 0
+	ldr	r5, .L1766+116
+	str	r3, [r5]
+	.loc 2 1441 0
+	ldr	r5, .L1766+120
+	str	r3, [r5]
+	.loc 2 1442 0
+	ldr	r5, .L1766+124
+	.loc 2 1444 0
+	ldr	lr, [r4, #40]
+	.loc 2 1442 0
+	str	r3, [r5]
+	.loc 2 1444 0
+	ldr	r3, .L1766+128
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	.loc 2 1445 0
+	it	hi
+	strhi	lr, [r3]
+	.loc 2 1447 0
+	ldr	r3, .L1766+132
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	.loc 2 1448 0
+	it	hi
+	strhi	r2, [r3]
+	.loc 2 1450 0
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L1758
+	.loc 2 1451 0
+	ldr	r0, .L1766+80
+	bl	make_superblock
+.LVL1981:
+.L1758:
+	.loc 2 1453 0
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1759
+	.loc 2 1454 0
+	ldr	r0, .L1766+88
+	bl	make_superblock
+.LVL1982:
+.L1759:
+	.loc 2 1456 0
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1760
+	.loc 2 1457 0
+	ldr	r0, .L1766+92
+	bl	make_superblock
+.LVL1983:
+.L1760:
+	.loc 2 1459 0
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1761
+	.loc 2 1460 0
+	ldr	r0, .L1766+84
+	bl	make_superblock
+.LVL1984:
+.L1761:
+	.loc 2 1462 0
+	movs	r0, #0
+	b	.L1745
+.LVL1985:
+.L1751:
+	.loc 2 1376 0
+	ldrh	r2, [r6]
+	.loc 2 1378 0
+	mov	r0, fp
+	str	r3, [sp, #4]
+	.loc 2 1376 0
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	.loc 2 1377 0
+	ldr	r2, [r8]
+	str	r2, [r4, #8]
+	.loc 2 1378 0
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+.LVL1986:
+	.loc 2 1381 0
+	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1749
+	.loc 2 1382 0 discriminator 1
+	ldr	r2, [r8]
+	.loc 2 1381 0 discriminator 1
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L1749
+	.loc 2 1383 0
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	.loc 2 1382 0
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L1750
+.L1749:
+	subs	r7, r7, #1
+.LVL1987:
+	sxth	r7, r7
+.LVL1988:
+	b	.L1748
+.L1767:
+	.align	2
+.L1766:
+	.word	.LANCHOR5
+	.word	.LANCHOR108
+	.word	.LANCHOR43
+	.word	.LANCHOR81
+	.word	1179929683
+	.word	.LANCHOR181
+	.word	.LC1
+	.word	.LANCHOR23
+	.word	.LANCHOR79
+	.word	.LANCHOR1
+	.word	.LANCHOR10
+	.word	.LANCHOR182
+	.word	.LANCHOR62
+	.word	.LANCHOR19
+	.word	.LANCHOR12
+	.word	.LANCHOR34
+	.word	.LANCHOR7
+	.word	.LANCHOR37
+	.word	.LANCHOR3
+	.word	.LANCHOR80
+	.word	.LANCHOR51
+	.word	.LANCHOR82
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR63
+	.word	.LANCHOR67
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR77
+	.word	.LANCHOR66
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR39
+	.word	.LANCHOR109
+	.cfi_endproc
+.LFE277:
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+.LFB295:
+	.loc 2 2306 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 2310 0
+	movs	r3, #0
+	ldr	r6, .L1784
+	strh	r3, [r6]	@ movhi
+	.loc 2 2312 0
+	ldr	r3, .L1784+4
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+.LVL1989:
+	.loc 2 2313 0
+	bl	FtlScanSysBlk
+.LVL1990:
+	.loc 2 2314 0
+	ldr	r3, .L1784+8
+	ldrh	r2, [r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1769
+.L1771:
+	.loc 2 2315 0
+	mov	r7, #-1
+.L1768:
+	.loc 2 2398 0
+	mov	r0, r7
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1769:
+	.loc 2 2317 0
+	bl	FtlLoadSysInfo
+.LVL1991:
+	mov	r7, r0
+	cmp	r0, #0
+	bne	.L1771
+	.loc 2 2320 0
+	bl	FtlLoadMapInfo
+.LVL1992:
+	.loc 2 2321 0
+	bl	FtlLoadVonderInfo
+.LVL1993:
+	.loc 2 2322 0
+	bl	Ftl_load_ext_data
+.LVL1994:
+	.loc 2 2324 0
+	bl	FtlLoadEctTbl
+.LVL1995:
+	.loc 2 2325 0
+	bl	FtlFreeSysBLkSort
+.LVL1996:
+	.loc 2 2327 0
+	bl	SupperBlkListInit
+.LVL1997:
+	.loc 2 2328 0
+	bl	FtlPowerLostRecovery
+.LVL1998:
+	.loc 2 2330 0
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+.LVL1999:
+.LBB301:
+.LBB302:
+	.loc 2 2332 0
+	ldr	r3, .L1784+12
+	.loc 2 2333 0
+	movs	r0, #12
+	.loc 2 2332 0
+	ldrh	r1, [r3]
+	.loc 2 2333 0
+	ldr	r3, .L1784+16
+	ldr	r2, [r3]
+	.loc 2 2332 0
+	mov	r3, r7
+.L1772:
+.LVL2000:
+	cmp	r3, r1
+	bge	.L1777
+	.loc 2 2333 0
+	mla	r4, r0, r3, r2
+	ldr	r4, [r4, #4]
+	cmp	r4, #0
+	bge	.L1773
+.L1777:
+	.loc 2 2336 0
+	ldr	r4, .L1784+20
+	.loc 2 2338 0
+	cmp	r3, r1
+	ldr	r5, .L1784+24
+	.loc 2 2336 0
+	ldrh	r2, [r4, #28]
+	add	r2, r2, #1
+	strh	r2, [r4, #28]	@ movhi
+	.loc 2 2338 0
+	bge	.L1783
+.LVL2001:
+.L1774:
+	.loc 2 2340 0
+	ldr	r6, .L1784+28
+	.loc 2 2339 0
+	ldr	r0, .L1784+24
+	bl	FtlSuperblockPowerLostFix
+.LVL2002:
+	.loc 2 2340 0
+	mov	r0, r6
+	bl	FtlSuperblockPowerLostFix
+.LVL2003:
+.LBB303:
+	.loc 2 2346 0
+	ldr	r3, .L1784+32
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	.loc 2 2347 0
+	ldr	r0, .L1784+36
+	.loc 2 2346 0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 2 2352 0
+	ldrh	ip, [r6]
+	.loc 2 2347 0
+	ldrh	r3, [r0]
+	.loc 2 2352 0
+	ldrh	lr, [r6, #4]
+	.loc 2 2347 0
+	strh	r3, [r5, #2]	@ movhi
+	.loc 2 2348 0
+	movs	r3, #0
+	strb	r3, [r5, #6]
+	.loc 2 2349 0
+	strh	r3, [r5, #4]	@ movhi
+.LVL2004:
+	.loc 2 2352 0
+	ldrh	r1, [r2, ip, lsl #1]
+	sub	r1, r1, lr
+	strh	r1, [r2, ip, lsl #1]	@ movhi
+	.loc 2 2353 0
+	ldrh	r2, [r0]
+.LBE303:
+	.loc 2 2359 0
+	ldr	r0, .L1784+40
+.LBB304:
+	.loc 2 2354 0
+	strb	r3, [r6, #6]
+	.loc 2 2353 0
+	strh	r2, [r6, #2]	@ movhi
+	.loc 2 2355 0
+	strh	r3, [r6, #4]	@ movhi
+.LBE304:
+	.loc 2 2359 0
+	bl	FtlMapBlkWriteDump_data
+.LVL2005:
+	.loc 2 2360 0
+	ldr	r0, .L1784+44
+	bl	FtlMapBlkWriteDump_data
+.LVL2006:
+	.loc 2 2372 0
+	ldrh	r3, [r4, #30]
+	adds	r3, r3, #1
+	strh	r3, [r4, #30]	@ movhi
+	.loc 2 2373 0
+	bl	l2p_flush
+.LVL2007:
+	.loc 2 2374 0
+	bl	FtlVpcTblFlush
+.LVL2008:
+	.loc 2 2375 0
+	bl	FtlVpcTblFlush
+.LVL2009:
+	b	.L1778
+.LVL2010:
+.L1773:
+	.loc 2 2332 0
+	adds	r3, r3, #1
+.LVL2011:
+	b	.L1772
+.L1783:
+	.loc 2 2338 0
+	ldrh	r3, [r6]
+.LVL2012:
+	cmp	r3, #0
+	bne	.L1774
+.L1778:
+	.loc 2 2379 0
+	ldrh	r0, [r5]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1779
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1779
+	.loc 2 2381 0
+	ldr	r5, .L1784+28
+	.loc 2 2380 0
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1779
+	.loc 2 2382 0
+	bl	FtlGcRefreshBlock
+.LVL2013:
+	.loc 2 2383 0
+	ldrh	r0, [r5]
+	bl	FtlGcRefreshBlock
+.LVL2014:
+	.loc 2 2384 0
+	ldr	r0, .L1784+24
+	bl	allocate_new_data_superblock
+.LVL2015:
+	.loc 2 2385 0
+	mov	r0, r5
+	bl	allocate_new_data_superblock
+.LVL2016:
+.L1779:
+	.loc 2 2390 0
+	ldrh	r3, [r4, #28]
+	lsls	r3, r3, #27
+	bne	.L1768
+	.loc 2 2391 0
+	bl	FtlVpcCheckAndModify
+.LVL2017:
+	b	.L1768
+.L1785:
+	.align	2
+.L1784:
+	.word	.LANCHOR162
+	.word	.LANCHOR4
+	.word	.LANCHOR81
+	.word	.LANCHOR33
+	.word	.LANCHOR56
+	.word	.LANCHOR79
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR43
+	.word	.LANCHOR19
+	.word	.LANCHOR144
+	.word	.LANCHOR149
+.LBE302:
+.LBE301:
+	.cfi_endproc
+.LFE295:
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.ftl_low_format,"ax",%progbits
+	.align	1
+	.global	ftl_low_format
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format, %function
+ftl_low_format:
+.LFB213:
+	.loc 3 623 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 3 629 0
+	movs	r3, #0
+	.loc 3 631 0
+	ldr	r6, .L1810
+	.loc 3 630 0
+	ldr	r2, .L1810+4
+	.loc 3 629 0
+	ldr	r5, .L1810+8
+	.loc 3 631 0
+	ldrh	r0, [r6]
+	.loc 3 630 0
+	str	r3, [r2]
+	.loc 3 629 0
+	str	r3, [r5]
+	.loc 3 631 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2018:
+	.loc 3 632 0
+	bl	FtlLoadBbt
+.LVL2019:
+	cbz	r0, .L1787
+	.loc 3 633 0
+	bl	FtlMakeBbt
+.LVL2020:
+.L1787:
+	.loc 3 635 0 discriminator 1
+	ldr	r3, .L1810+12
+	.loc 3 636 0 discriminator 1
+	ldr	r2, .L1810+16
+	.loc 3 637 0 discriminator 1
+	ldr	ip, .L1810+100
+	.loc 3 635 0 discriminator 1
+	ldrh	r1, [r3]
+	.loc 3 636 0 discriminator 1
+	ldr	r4, [r2]
+	.loc 3 637 0 discriminator 1
+	ldr	r2, .L1810+20
+	str	r3, [sp, #4]
+	.loc 3 635 0 discriminator 1
+	lsls	r1, r1, #7
+	.loc 3 637 0 discriminator 1
+	ldr	r7, [r2]
+	movs	r2, #0
+.L1788:
+.LVL2021:
+	.loc 3 635 0 discriminator 1
+	uxth	r3, r2
+	adds	r2, r2, #1
+.LVL2022:
+	cmp	r3, r1
+	blt	.L1789
+.LVL2023:
+	.loc 3 642 0
+	ldr	r3, .L1810+24
+.LVL2024:
+	.loc 3 641 0
+	movs	r7, #0
+	.loc 3 642 0
+	ldr	r10, .L1810+104
+	ldrh	r4, [r3]
+.LVL2025:
+	mov	r8, r3
+	mov	fp, r10
+.LVL2026:
+.L1790:
+	.loc 3 642 0 is_stmt 0 discriminator 1
+	ldrh	r3, [r10]
+	cmp	r3, r4
+	bhi	.L1791
+	.loc 3 645 0 is_stmt 1
+	ldr	r4, .L1810+28
+.LVL2027:
+	subs	r3, r7, #2
+	ldrh	r1, [r4]
+	cmp	r3, r1, lsl #1
+	bgt	.L1792
+.LVL2028:
+.L1796:
+	.loc 3 641 0
+	movs	r6, #0
+	mov	r7, r6
+.L1793:
+	.loc 3 656 0 discriminator 1
+	ldrh	r3, [r8]
+	uxth	r0, r6
+.LVL2029:
+	adds	r6, r6, #1
+	cmp	r3, r0
+	bhi	.L1797
+	.loc 3 658 0
+	ldrh	r2, [fp]
+	ldr	r3, .L1810+32
+	.loc 3 661 0
+	ldrh	r4, [r4]
+	ldr	r6, .L1810+36
+	.loc 3 658 0
+	str	r2, [r3]
+	.loc 3 661 0
+	ldr	r3, .L1810+40
+	mov	r1, r4
+	ldr	r2, [r3]
+	mov	r0, r2
+.LVL2030:
+	str	r2, [sp, #12]
+	bl	__aeabi_uidiv
+.LVL2031:
+	.loc 3 662 0
+	ubfx	r10, r0, #5, #16
+	.loc 3 661 0
+	mov	r3, r0
+	str	r0, [r6]
+	.loc 3 662 0
+	add	r1, r10, #36
+	ldr	r0, .L1810+44
+	strh	r1, [r0]	@ movhi
+	.loc 3 663 0
+	movs	r1, #24
+	muls	r1, r4, r1
+	str	r0, [sp]
+	cmp	r7, r1
+	ble	.L1798
+	.loc 3 664 0
+	ldr	r2, [sp, #12]
+	mov	r1, r4
+	str	r3, [sp, #8]
+	subs	r0, r2, r7
+	bl	__aeabi_uidiv
+.LVL2032:
+	.loc 3 665 0
+	ldr	r3, [sp]
+	.loc 3 664 0
+	str	r0, [r6]
+	.loc 3 665 0
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r3]	@ movhi
+	ldr	r3, [sp, #8]
+.L1798:
+	.loc 3 668 0
+	ldr	r2, .L1810+48
+	ldrh	r2, [r2]
+	cbz	r2, .L1800
+	.loc 3 669 0
+	ldr	r1, .L1810+44
+	ldrh	r0, [r1]
+	add	r0, r0, r2, lsr #1
+	strh	r0, [r1]	@ movhi
+	.loc 3 670 0
+	mul	r0, r4, r2
+	cmp	r7, r0
+	.loc 3 672 0
+	itttt	lt
+	addlt	r2, r2, #32
+	.loc 3 671 0
+	strlt	r3, [r6]
+	.loc 3 672 0
+	addlt	r2, r2, r10
+	strhlt	r2, [r1]	@ movhi
+.L1800:
+	.loc 3 677 0
+	ldr	r3, [sp]
+	ldr	r7, .L1810+52
+.LVL2033:
+	.loc 3 687 0
+	ldr	r10, .L1810+108
+	.loc 3 677 0
+	ldrh	r2, [r3]
+	ldr	r3, [r6]
+	subs	r3, r3, r2
+	muls	r4, r3, r4
+	.loc 3 678 0
+	ldr	r3, .L1810+56
+	ldrh	r3, [r3]
+	.loc 3 677 0
+	str	r4, [r7]
+	.loc 3 678 0
+	muls	r4, r3, r4
+	.loc 3 679 0
+	ldr	r3, [sp, #4]
+	ldrh	r3, [r3]
+	.loc 3 678 0
+	str	r4, [r6]
+	.loc 3 694 0
+	ldr	r6, .L1810+60
+	.loc 3 679 0
+	muls	r4, r3, r4
+	ldr	r3, .L1810+64
+	str	r4, [r3]
+	.loc 3 689 0
+	movw	r4, #65535
+	.loc 3 684 0
+	bl	FtlBbmTblFlush
+.LVL2034:
+	.loc 3 687 0
+	ldrh	r2, [fp]
+	movs	r1, #0
+	ldr	r0, [r10]
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.LVL2035:
+	.loc 3 688 0
+	ldr	r2, .L1810+68
+	movs	r3, #0
+	.loc 3 694 0
+	strh	r3, [r6, #2]	@ movhi
+	.loc 3 698 0
+	movs	r1, #255
+	.loc 3 695 0
+	strb	r3, [r6, #6]
+	.loc 3 688 0
+	str	r3, [r2]
+	.loc 3 689 0
+	ldr	r2, .L1810+72
+	.loc 3 696 0
+	strh	r3, [r6]	@ movhi
+	.loc 3 690 0
+	strh	r3, [r2, #2]	@ movhi
+	.loc 3 691 0
+	strb	r3, [r2, #6]
+	.loc 3 692 0
+	strb	r3, [r2, #8]
+	.loc 3 697 0
+	movs	r3, #1
+	.loc 3 689 0
+	strh	r4, [r2]	@ movhi
+	.loc 3 698 0
+	ldrh	r2, [r8]
+	mov	r8, r10
+	.loc 3 697 0
+	strb	r3, [r6, #8]
+	.loc 3 701 0
+	mov	r10, r6
+	.loc 3 698 0
+	ldr	r3, .L1810+76
+	lsrs	r2, r2, #3
+	ldr	r0, [r3]
+	bl	ftl_memset
+.LVL2036:
+.L1802:
+	.loc 3 701 0
+	mov	r0, r10
+	bl	make_superblock
+.LVL2037:
+	.loc 3 702 0
+	ldrb	r3, [r6, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	cmp	r3, #0
+	bne	.L1803
+	.loc 3 705 0
+	ldr	r3, [r8]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 3 706 0
+	ldrh	r3, [r6]
+	adds	r3, r3, #1
+	strh	r3, [r6]	@ movhi
+	.loc 3 707 0
+	b	.L1802
+.LVL2038:
+.L1789:
+	.loc 3 636 0 discriminator 3
+	mvns	r0, r3
+	orr	r0, r3, r0, lsl #16
+	str	r0, [r4, r3, lsl #2]
+	.loc 3 637 0 discriminator 3
+	str	ip, [r7, r3, lsl #2]
+.LVL2039:
+	b	.L1788
+.LVL2040:
+.L1791:
+	.loc 3 643 0 discriminator 3
+	mov	r0, r4
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+.LVL2041:
+	.loc 3 642 0 discriminator 3
+	adds	r4, r4, #1
+.LVL2042:
+	.loc 3 643 0 discriminator 3
+	add	r7, r7, r0
+.LVL2043:
+	uxth	r7, r7
+.LVL2044:
+	.loc 3 642 0 discriminator 3
+	uxth	r4, r4
+.LVL2045:
+	b	.L1790
+.LVL2046:
+.L1792:
+	.loc 3 647 0
+	mov	r0, r7
+	bl	__aeabi_uidiv
+.LVL2047:
+	ldr	r3, .L1810+80
+	ldr	r3, [r3]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+.LVL2048:
+	.loc 3 648 0
+	ldrh	r0, [r6]
+	bl	FtlFreeSysBlkQueueInit
+.LVL2049:
+	.loc 3 650 0
+	ldrh	r6, [r8]
+.LVL2050:
+.L1794:
+	.loc 3 650 0 is_stmt 0 discriminator 1
+	ldrh	r3, [fp]
+	cmp	r3, r6
+	bls	.L1796
+	.loc 3 651 0 is_stmt 1 discriminator 3
+	mov	r0, r6
+	movs	r1, #1
+	.loc 3 650 0 discriminator 3
+	adds	r6, r6, #1
+.LVL2051:
+	.loc 3 651 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2052:
+	.loc 3 650 0 discriminator 3
+	uxth	r6, r6
+.LVL2053:
+	b	.L1794
+.LVL2054:
+.L1797:
+	.loc 3 657 0 discriminator 3
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+.LVL2055:
+	add	r7, r7, r0
+.LVL2056:
+	uxth	r7, r7
+.LVL2057:
+	b	.L1793
+.LVL2058:
+.L1803:
+	.loc 3 709 0
+	ldr	r3, [r5]
+	.loc 3 710 0
+	ldrh	r1, [r6, #4]
+	.loc 3 712 0
+	ldr	r4, .L1810+84
+	.loc 3 709 0
+	str	r3, [r6, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	.loc 3 710 0
+	ldr	r3, [r8]
+	.loc 3 717 0
+	mov	r10, r4
+	.loc 3 710 0
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 3 712 0
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 3 713 0
+	strb	r3, [r4, #6]
+	.loc 3 714 0
+	ldrh	r3, [r6]
+	.loc 3 721 0
+	movw	r6, #65535
+	.loc 3 714 0
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	.loc 3 715 0
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L1804:
+	.loc 3 717 0
+	mov	r0, r10
+	bl	make_superblock
+.LVL2059:
+	.loc 3 718 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cbnz	r3, .L1805
+	.loc 3 721 0
+	ldr	r3, [r8]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	.loc 3 722 0
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	.loc 3 723 0
+	b	.L1804
+.L1805:
+	.loc 3 725 0
+	ldr	r3, [r5]
+	.loc 3 726 0
+	ldrh	r1, [r4, #4]
+	.loc 3 725 0
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	.loc 3 727 0
+	movw	r4, #65535
+	.loc 3 726 0
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 3 727 0
+	ldr	r3, .L1810+88
+	strh	r4, [r3]	@ movhi
+	.loc 3 730 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL2060:
+	ldr	r3, .L1810+92
+	.loc 3 731 0
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	.loc 3 733 0
+	ldr	r2, [r7]
+	.loc 3 730 0
+	strh	r0, [r3]	@ movhi
+	.loc 3 732 0
+	strh	r4, [r3, #4]	@ movhi
+	.loc 3 733 0
+	strh	r2, [r3, #6]	@ movhi
+	.loc 3 734 0
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	.loc 3 735 0
+	bl	FtlVpcTblFlush
+.LVL2061:
+	.loc 3 736 0
+	bl	FtlSysBlkInit
+.LVL2062:
+	cbnz	r0, .L1806
+	.loc 3 737 0
+	ldr	r3, .L1810+96
+	movs	r2, #1
+	str	r2, [r3]
+.L1806:
+	.loc 3 739 0
+	movs	r0, #0
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1811:
+	.align	2
+.L1810:
+	.word	.LANCHOR4
+	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LANCHOR12
+	.word	.LANCHOR116
+	.word	.LANCHOR114
+	.word	.LANCHOR5
+	.word	.LANCHOR3
+	.word	.LANCHOR113
+	.word	.LANCHOR62
+	.word	.LANCHOR7
+	.word	.LANCHOR80
+	.word	.LANCHOR15
+	.word	.LANCHOR182
+	.word	.LANCHOR19
+	.word	.LANCHOR51
+	.word	.LANCHOR34
+	.word	.LANCHOR60
+	.word	.LANCHOR82
+	.word	.LANCHOR1
+	.word	.LANCHOR31
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR81
+	.word	.LANCHOR88
+	.word	168778952
+	.word	.LANCHOR6
+	.word	.LANCHOR43
+	.cfi_endproc
+.LFE213:
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.sftl_init,"ax",%progbits
+	.align	1
+	.global	sftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sftl_init, %function
+sftl_init:
+.LFB214:
+	.loc 3 743 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2063:
+	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 746 0
+	mov	r3, #-1
+	ldr	r4, .L1818
+	.loc 3 749 0
+	ldr	r1, .L1818+4
+	ldr	r0, .L1818+8
+	.loc 3 746 0
+	str	r3, [r4]
+	.loc 3 749 0
+	bl	printf
+.LVL2064:
+	.loc 3 750 0
+	ldr	r0, .L1818+12
+	bl	FtlConstantsInit
+.LVL2065:
+	.loc 3 751 0
+	bl	FtlMemInit
+.LVL2066:
+	.loc 3 752 0
+	bl	FtlVariablesInit
+.LVL2067:
+	.loc 3 753 0
+	ldr	r3, .L1818+16
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+.LVL2068:
+.LDL2:
+	.loc 3 756 0
+	bl	FtlLoadBbt
+.LVL2069:
+	cbnz	r0, .L1816
+	.loc 3 767 0
+	bl	FtlSysBlkInit
+.LVL2070:
+	cbnz	r0, .L1816
+	.loc 3 779 0
+	movs	r3, #1
+	str	r3, [r4]
+	.loc 3 783 0
+	ldr	r3, .L1818+20
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L1816
+	movw	r4, #8129
+.L1815:
+.LVL2071:
+.LBB305:
+	.loc 3 786 0 discriminator 3
+	movs	r1, #1
+	movs	r0, #0
+	bl	rk_ftl_garbage_collect
+.LVL2072:
+	.loc 3 785 0 discriminator 3
+	subs	r4, r4, #1
+.LVL2073:
+	bne	.L1815
+.LVL2074:
+.L1816:
+.LBE305:
+	.loc 3 794 0
+	movs	r0, #0
+	pop	{r4, pc}
+.L1819:
+	.align	2
+.L1818:
+	.word	.LANCHOR88
+	.word	.LC70
+	.word	.LC71
+	.word	.LANCHOR0
+	.word	.LANCHOR4
+	.word	.LANCHOR48
+	.cfi_endproc
+.LFE214:
+	.size	sftl_init, .-sftl_init
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+.LFB350:
+	.loc 1 248 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL2075:
+	.loc 1 249 0
+	b	memcmp
+.LVL2076:
+	.cfi_endproc
+.LFE350:
+	.size	ftl_memcmp, .-ftl_memcmp
+	.global	ftl_temp_buf
+	.global	g_nand_ops
+	.global	g_nand_phy_info
+	.global	gc_ink_free_return_value
+	.global	check_vpc_table
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.section	.bss.DeviceCapacity,"aw",%nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.space	4
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
+	.align	1
+	.set	.LANCHOR59,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.space	2
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR6,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR17,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR18,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+	.set	.LANCHOR24,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR23,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR5,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR80,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR10,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.space	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR15,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR31,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR33,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR29,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR32,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.space	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR7,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR4,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR27,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR19,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR20,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR21,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR3,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR11,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR25,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR12,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR22,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR2,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR8,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+	.set	.LANCHOR9,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR28,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR16,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR14,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.check_buf,"aw",%nobits
+	.align	2
+	.type	check_buf, %object
+	.size	check_buf, 4096
+check_buf:
+	.space	4096
+	.section	.bss.check_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR111,. + 0
+	.type	check_spare_buf, %object
+	.size	check_spare_buf, 512
+check_spare_buf:
+	.space	512
+	.section	.bss.check_vpc_table,"aw",%nobits
+	.align	1
+	.type	check_vpc_table, %object
+	.size	check_vpc_table, 16384
+check_vpc_table:
+	.space	16384
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.space	4
+	.section	.bss.ftl_temp_buf,"aw",%nobits
+	.align	2
+	.type	ftl_temp_buf, %object
+	.size	ftl_temp_buf, 4096
+ftl_temp_buf:
+	.space	4096
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR37,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR144,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 40
+gL2pMapInfo:
+	.space	40
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.gSysInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR81,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR149,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 40
+gVendorBlkInfo:
+	.space	40
+	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.space	4
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR71,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.space	4
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.space	4
+	.section	.bss.g_MaxLbn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR182,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.space	4
+	.section	.bss.g_MaxLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR62,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.space	4
+	.section	.bss.g_VaildLpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR60,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR51,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR52,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+	.set	.LANCHOR113,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+	.set	.LANCHOR166,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR178,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR103,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
+	.align	1
+	.set	.LANCHOR104,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_blk_index,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.space	2
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR98,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.align	2
+	.set	.LANCHOR118,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.space	4
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR119,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.space	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR86,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.space	4
+	.section	.bss.g_gc_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR82,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR53,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.align	2
+	.set	.LANCHOR117,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.space	4
+	.section	.bss.g_in_swl_replace,"aw",%nobits
+	.align	2
+	.set	.LANCHOR89,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.space	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.space	2
+	.section	.bss.g_max_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR77,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.space	4
+	.section	.bss.g_min_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.space	4
+	.section	.bss.g_nand_ops,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	g_nand_ops, %object
+	.size	g_nand_ops, 16
+g_nand_ops:
+	.space	16
+	.section	.bss.g_nand_phy_info,"aw",%nobits
+	.align	1
+	.set	.LANCHOR0,. + 0
+	.type	g_nand_phy_info, %object
+	.size	g_nand_phy_info, 24
+g_nand_phy_info:
+	.space	24
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR45,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+	.set	.LANCHOR162,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.space	4
+	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.space	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.g_req_cache,"aw",%nobits
+	.align	2
+	.set	.LANCHOR150,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
+	.space	4
+	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR83,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR79,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR151,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.space	4
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR66,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.space	4
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR64,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.space	4
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR68,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.space	4
+	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR67,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.space	4
+	.section	.bss.g_totle_map_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR147,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.space	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR70,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.space	4
+	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR76,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR35,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.space	2
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.space	4
+	.section	.bss.gc_discard_updated,"aw",%nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.space	4
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.space	2
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR127,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR92,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
+	.space	4
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR171,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR1,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
+	.space	4
+	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR42,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
+	.space	4
+	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR41,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
+	.space	4
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
+	.align	2
+	.set	.LANCHOR44,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
+	.space	4
+	.section	.bss.p_erase_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR40,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
+	.space	4
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR97,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
+	.space	4
+	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR93,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
+	.space	4
+	.section	.bss.p_gc_page_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR100,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
+	.space	4
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR94,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
+	.space	4
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.align	2
+	.set	.LANCHOR116,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
+	.space	4
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR114,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR115,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR136,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.align	2
+	.set	.LANCHOR56,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
+	.space	4
+	.section	.bss.p_map_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR129,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
+	.space	4
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR130,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR134,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
+	.space	4
+	.section	.bss.p_plane_order_table,"aw",%nobits
+	.set	.LANCHOR13,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR126,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR39,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.align	2
+	.set	.LANCHOR123,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
+	.space	4
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
+	.space	4
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR128,. + 0
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
+	.space	4
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR43,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
+	.space	4
+	.section	.bss.p_vendor_block_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR36,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 4
+p_vendor_block_table:
+	.space	4
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
+	.space	4
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
+	.space	4
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR124,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
+	.space	4
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR133,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
+	.space	4
+	.section	.bss.req_erase,"aw",%nobits
+	.align	2
+	.set	.LANCHOR112,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
+	.space	4
+	.section	.bss.req_gc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR95,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
+	.space	4
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+	.set	.LANCHOR121,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
+	.section	.bss.req_prgm,"aw",%nobits
+	.align	2
+	.set	.LANCHOR122,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
+	.space	4
+	.section	.bss.req_read,"aw",%nobits
+	.align	2
+	.set	.LANCHOR120,. + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
+	.space	4
+	.section	.bss.req_sys,"aw",%nobits
+	.align	2
+	.set	.LANCHOR108,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 20
+req_sys:
+	.space	20
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
+	.align	1
+	.set	.LANCHOR157,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.short	-1
+	.section	.data.gFtlInitStatus,"aw",%progbits
+	.align	2
+	.set	.LANCHOR88,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.rodata.FlashProgPages.str1.1,"aMS",%progbits,1
+.LC79:
+	.ascii	"prog read error: = %x\012\000"
+.LC80:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC81:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
+.LC94:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC95:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC96:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",%progbits,1
+.LC97:
+	.ascii	"FtlGcFreeBadSuperBlk 0x%x\012\000"
+	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",%progbits,1
+.LC74:
+	.ascii	"FtlGcMarkBadPhyBlk %d 0x%x\012\000"
+	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",%progbits,1
+.LC73:
+	.ascii	"FtlGcRefreshBlock  0x%x\012\000"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
+.LC100:
+	.ascii	"no ect\000"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
+.LC86:
+	.ascii	"FtlMapWritePage error = %x \012\000"
+.LC87:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.section	.rodata.FtlMemInit.str1.1,"aMS",%progbits,1
+.LC82:
+	.ascii	"%s error allocating memory. return -1\012\000"
+	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",%progbits,1
+.LC2:
+	.ascii	"FLASH INFO:\012\000"
+.LC3:
+	.ascii	"Device Capacity: %d MB\012\000"
+.LC4:
+	.ascii	"FTL INFO:\012\000"
+.LC5:
+	.ascii	"g_MaxLpn = 0x%x\012\000"
+.LC6:
+	.ascii	"g_VaildLpn = 0x%x\012\000"
+.LC7:
+	.ascii	"read_page_count = 0x%x\012\000"
+.LC8:
+	.ascii	"discard_page_count = 0x%x\012\000"
+.LC9:
+	.ascii	"write_page_count = 0x%x\012\000"
+.LC10:
+	.ascii	"cache_write_count = 0x%x\012\000"
+.LC11:
+	.ascii	"l2p_write_count = 0x%x\012\000"
+.LC12:
+	.ascii	"gc_page_count = 0x%x\012\000"
+.LC13:
+	.ascii	"totle_write = %d MB\012\000"
+.LC14:
+	.ascii	"totle_read = %d MB\012\000"
+.LC15:
+	.ascii	"GSV = 0x%x\012\000"
+.LC16:
+	.ascii	"GDV = 0x%x\012\000"
+.LC17:
+	.ascii	"bad blk num = %d\012\000"
+.LC18:
+	.ascii	"free_superblocks = 0x%x\012\000"
+.LC19:
+	.ascii	"mlc_EC = 0x%x\012\000"
+.LC20:
+	.ascii	"slc_EC = 0x%x\012\000"
+.LC21:
+	.ascii	"avg_EC = 0x%x\012\000"
+.LC22:
+	.ascii	"sys_EC = 0x%x\012\000"
+.LC23:
+	.ascii	"max_EC = 0x%x\012\000"
+.LC24:
+	.ascii	"min_EC = 0x%x\012\000"
+.LC25:
+	.ascii	"PLT = 0x%x\012\000"
+.LC26:
+	.ascii	"POT = 0x%x\012\000"
+.LC27:
+	.ascii	"MaxSector = 0x%x\012\000"
+.LC28:
+	.ascii	"init_sys_blks_pp = 0x%x\012\000"
+.LC29:
+	.ascii	"sys_blks_pp = 0x%x\012\000"
+.LC30:
+	.ascii	"free sysblock = 0x%x\012\000"
+.LC31:
+	.ascii	"data_blks_pp = 0x%x\012\000"
+.LC32:
+	.ascii	"data_op_blks_pp = 0x%x\012\000"
+.LC33:
+	.ascii	"max_data_blks = 0x%x\012\000"
+.LC34:
+	.ascii	"Sys.id = 0x%x\012\000"
+.LC35:
+	.ascii	"Bbt.id = 0x%x\012\000"
+.LC36:
+	.ascii	"ACT.page = 0x%x\012\000"
+.LC37:
+	.ascii	"ACT.plane = 0x%x\012\000"
+.LC38:
+	.ascii	"ACT.id = 0x%x\012\000"
+.LC39:
+	.ascii	"ACT.mode = 0x%x\012\000"
+.LC40:
+	.ascii	"ACT.a_pages = 0x%x\012\000"
+.LC41:
+	.ascii	"ACT VPC = 0x%x\012\000"
+.LC42:
+	.ascii	"BUF.page = 0x%x\012\000"
+.LC43:
+	.ascii	"BUF.plane = 0x%x\012\000"
+.LC44:
+	.ascii	"BUF.id = 0x%x\012\000"
+.LC45:
+	.ascii	"BUF.mode = 0x%x\012\000"
+.LC46:
+	.ascii	"BUF.a_pages = 0x%x\012\000"
+.LC47:
+	.ascii	"BUF VPC = 0x%x\012\000"
+.LC48:
+	.ascii	"TMP.page = 0x%x\012\000"
+.LC49:
+	.ascii	"TMP.plane = 0x%x\012\000"
+.LC50:
+	.ascii	"TMP.id = 0x%x\012\000"
+.LC51:
+	.ascii	"TMP.mode = 0x%x\012\000"
+.LC52:
+	.ascii	"TMP.a_pages = 0x%x\012\000"
+.LC53:
+	.ascii	"GC.page = 0x%x\012\000"
+.LC54:
+	.ascii	"GC.plane = 0x%x\012\000"
+.LC55:
+	.ascii	"GC.id = 0x%x\012\000"
+.LC56:
+	.ascii	"GC.mode = 0x%x\012\000"
+.LC57:
+	.ascii	"GC.a_pages = 0x%x\012\000"
+.LC58:
+	.ascii	"WR_CHK = %x %x %x\012\000"
+.LC59:
+	.ascii	"Read Err Cnt = 0x%x\012\000"
+.LC60:
+	.ascii	"Prog Err Cnt = 0x%x\012\000"
+.LC61:
+	.ascii	"gc_free_blk_th= 0x%x\012\000"
+.LC62:
+	.ascii	"gc_merge_free_blk_th= 0x%x\012\000"
+.LC63:
+	.ascii	"gc_skip_write_count= 0x%x\012\000"
+.LC64:
+	.ascii	"gc_blk_index= 0x%x\012\000"
+.LC65:
+	.ascii	"free min EC= 0x%x\012\000"
+.LC66:
+	.ascii	"free max EC= 0x%x\012\000"
+.LC67:
+	.ascii	"GC__SB VPC = 0x%x\012\000"
+.LC68:
+	.ascii	"%d. [0x%x]=0x%x 0x%x  0x%x\012\000"
+.LC69:
+	.ascii	"free %d. [0x%x] 0x%x  0x%x\012\000"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
+.LC103:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
+.LC99:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",%progbits,1
+.LC102:
+	.ascii	"FtlCheckVpc %x = %x  %x\012\000"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
+.LC101:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlWrite.str1.1,"aMS",%progbits,1
+.LC105:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",%progbits,1
+.LC72:
+	.ascii	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
+	.ascii	"\012\000"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.section	.rodata.__func__.10046,"a",%progbits
+	.set	.LANCHOR177,. + 0
+	.type	__func__.10046, %object
+	.size	__func__.10046, 23
+__func__.10046:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.__func__.10307,"a",%progbits
+	.set	.LANCHOR106,. + 0
+	.type	__func__.10307, %object
+	.size	__func__.10307, 15
+__func__.10307:
+	.ascii	"FlashReadPages\000"
+	.section	.rodata.__func__.10324,"a",%progbits
+	.set	.LANCHOR110,. + 0
+	.type	__func__.10324, %object
+	.size	__func__.10324, 15
+__func__.10324:
+	.ascii	"FlashProgPages\000"
+	.section	.rodata.__func__.8799,"a",%progbits
+	.set	.LANCHOR138,. + 0
+	.type	__func__.8799, %object
+	.size	__func__.8799, 11
+__func__.8799:
+	.ascii	"FtlMemInit\000"
+	.section	.rodata.__func__.8923,"a",%progbits
+	.set	.LANCHOR170,. + 0
+	.type	__func__.8923, %object
+	.size	__func__.8923, 13
+__func__.8923:
+	.ascii	"FtlProgPages\000"
+	.section	.rodata.__func__.8951,"a",%progbits
+	.set	.LANCHOR180,. + 0
+	.type	__func__.8951, %object
+	.size	__func__.8951, 9
+__func__.8951:
+	.ascii	"FtlWrite\000"
+	.section	.rodata.__func__.9015,"a",%progbits
+	.set	.LANCHOR139,. + 0
+	.type	__func__.9015, %object
+	.size	__func__.9015, 14
+__func__.9015:
+	.ascii	"FtlBbt2Bitmap\000"
+	.section	.rodata.__func__.9058,"a",%progbits
+	.set	.LANCHOR165,. + 0
+	.type	__func__.9058, %object
+	.size	__func__.9058, 11
+__func__.9058:
+	.ascii	"FtlLoadBbt\000"
+	.section	.rodata.__func__.9181,"a",%progbits
+	.set	.LANCHOR49,. + 0
+	.type	__func__.9181, %object
+	.size	__func__.9181, 17
+__func__.9181:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.9186,"a",%progbits
+	.set	.LANCHOR46,. + 0
+	.type	__func__.9186, %object
+	.size	__func__.9186, 17
+__func__.9186:
+	.ascii	"INSERT_DATA_LIST\000"
+	.section	.rodata.__func__.9216,"a",%progbits
+	.set	.LANCHOR50,. + 0
+	.type	__func__.9216, %object
+	.size	__func__.9216, 17
+__func__.9216:
+	.ascii	"List_remove_node\000"
+	.section	.rodata.__func__.9248,"a",%progbits
+	.set	.LANCHOR54,. + 0
+	.type	__func__.9248, %object
+	.size	__func__.9248, 22
+__func__.9248:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.9257,"a",%progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.9257, %object
+	.size	__func__.9257, 16
+__func__.9257:
+	.ascii	"load_l2p_region\000"
+	.section	.rodata.__func__.9289,"a",%progbits
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9289, %object
+	.size	__func__.9289, 26
+__func__.9289:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.rodata.__func__.9300,"a",%progbits
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9300, %object
+	.size	__func__.9300, 15
+__func__.9300:
+	.ascii	"ftl_map_blk_gc\000"
+	.section	.rodata.__func__.9314,"a",%progbits
+	.set	.LANCHOR141,. + 0
+	.type	__func__.9314, %object
+	.size	__func__.9314, 31
+__func__.9314:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.9328,"a",%progbits
+	.set	.LANCHOR142,. + 0
+	.type	__func__.9328, %object
+	.size	__func__.9328, 16
+__func__.9328:
+	.ascii	"FtlMapWritePage\000"
+	.section	.rodata.__func__.9353,"a",%progbits
+	.set	.LANCHOR58,. + 0
+	.type	__func__.9353, %object
+	.size	__func__.9353, 22
+__func__.9353:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.rodata.__func__.9370,"a",%progbits
+	.set	.LANCHOR145,. + 0
+	.type	__func__.9370, %object
+	.size	__func__.9370, 9
+__func__.9370:
+	.ascii	"log2phys\000"
+	.section	.rodata.__func__.9443,"a",%progbits
+	.set	.LANCHOR167,. + 0
+	.type	__func__.9443, %object
+	.size	__func__.9443, 15
+__func__.9443:
+	.ascii	"FtlVpcTblFlush\000"
+	.section	.rodata.__func__.9465,"a",%progbits
+	.set	.LANCHOR148,. + 0
+	.type	__func__.9465, %object
+	.size	__func__.9465, 14
+__func__.9465:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.rodata.__func__.9522,"a",%progbits
+	.set	.LANCHOR181,. + 0
+	.type	__func__.9522, %object
+	.size	__func__.9522, 15
+__func__.9522:
+	.ascii	"FtlLoadSysInfo\000"
+	.section	.rodata.__func__.9585,"a",%progbits
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9585, %object
+	.size	__func__.9585, 16
+__func__.9585:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.9619,"a",%progbits
+	.set	.LANCHOR161,. + 0
+	.type	__func__.9619, %object
+	.size	__func__.9619, 22
+__func__.9619:
+	.ascii	"FtlRecoverySuperblock\000"
+	.section	.rodata.__func__.9676,"a",%progbits
+	.set	.LANCHOR61,. + 0
+	.type	__func__.9676, %object
+	.size	__func__.9676, 16
+__func__.9676:
+	.ascii	"make_superblock\000"
+	.section	.rodata.__func__.9697,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.9697, %object
+	.size	__func__.9697, 18
+__func__.9697:
+	.ascii	"SupperBlkListInit\000"
+	.section	.rodata.__func__.9722,"a",%progbits
+	.set	.LANCHOR168,. + 0
+	.type	__func__.9722, %object
+	.size	__func__.9722, 21
+__func__.9722:
+	.ascii	"FtlVpcCheckAndModify\000"
+	.section	.rodata.__func__.9738,"a",%progbits
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9738, %object
+	.size	__func__.9738, 14
+__func__.9738:
+	.ascii	"ftl_check_vpc\000"
+	.section	.rodata.__func__.9822,"a",%progbits
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9822, %object
+	.size	__func__.9822, 25
+__func__.9822:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.9843,"a",%progbits
+	.set	.LANCHOR169,. + 0
+	.type	__func__.9843, %object
+	.size	__func__.9843, 29
+__func__.9843:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.rodata.__func__.9850,"a",%progbits
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9850, %object
+	.size	__func__.9850, 19
+__func__.9850:
+	.ascii	"get_new_active_ppa\000"
+	.section	.rodata.__func__.9863,"a",%progbits
+	.set	.LANCHOR159,. + 0
+	.type	__func__.9863, %object
+	.size	__func__.9863, 16
+__func__.9863:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.9870,"a",%progbits
+	.set	.LANCHOR160,. + 0
+	.type	__func__.9870, %object
+	.size	__func__.9870, 20
+__func__.9870:
+	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.9940,"a",%progbits
+	.set	.LANCHOR173,. + 0
+	.type	__func__.9940, %object
+	.size	__func__.9940, 19
+__func__.9940:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
+.LC98:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.ftl_check_vpc.str1.1,"aMS",%progbits,1
+.LC91:
+	.ascii	"...%s enter...\012\000"
+.LC92:
+	.ascii	"FtlCheckVpc2 %x = %x  %x\012\000"
+.LC93:
+	.ascii	"free blk vpc error %x = %x  %x\012\000"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
+.LC88:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC89:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC90:
+	.ascii	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012"
+	.ascii	"\000"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
+.LC83:
+	.ascii	"region_id = %x phyAddr = %x\012\000"
+.LC84:
+	.ascii	"spare:\000"
+.LC85:
+	.ascii	"map_ppn:\000"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",%progbits,1
+.LC104:
+	.ascii	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC75:
+	.ascii	"%s 0x%x:\000"
+.LC76:
+	.ascii	"%x \000"
+.LC77:
+	.ascii	"%02x \000"
+.LC78:
+	.ascii	"\012\000"
+	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",%progbits,1
+.LC70:
+	.ascii	"SFTL version: 5.0.43 20180116\000"
+.LC71:
+	.ascii	"%s\012\000"
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/part.h"
+	.file 14 "include/flash.h"
+	.file 15 "include/lmb.h"
+	.file 16 "include/asm-generic/u-boot.h"
+	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 19 "include/libfdt_env.h"
+	.file 20 "include/image.h"
+	.file 21 "include/net.h"
+	.file 22 "include/dm/uclass-id.h"
+	.file 23 "drivers/rkflash/sftl_inc.h"
+	.file 24 "drivers/rkflash/flash_com.h"
+	.file 25 "drivers/rkflash/sftl_struct.h"
+	.file 26 "drivers/rkflash/sftl_global.h"
+	.file 27 "include/malloc.h"
+	.file 28 "include/linux/compat.h"
+	.file 29 "include/stdio.h"
+	.file 30 "include/vsprintf.h"
+	.file 31 "include/log.h"
+	.section	.debug_info,"",%progbits
+.Ldebug_info0:
+	.4byte	0x9240
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x4
+	.uleb128 0x1
+	.4byte	.LASF880
+	.byte	0xc
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x1c0
+	.4byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF0
+	.uleb128 0x3
+	.4byte	.LASF4
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x37
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF1
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF2
+	.uleb128 0x4
+	.4byte	.LASF20
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x50
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.ascii	"int\000"
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF3
+	.uleb128 0x3
+	.4byte	.LASF5
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x37
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF6
+	.uleb128 0x3
+	.4byte	.LASF7
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x7b
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF8
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.ascii	"u8\000"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x37
+	.uleb128 0x7
+	.4byte	0x90
+	.uleb128 0x6
+	.ascii	"u16\000"
+	.byte	0x7
+	.byte	0x22
+	.4byte	0x25
+	.uleb128 0x6
+	.ascii	"s32\000"
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x50
+	.uleb128 0x6
+	.ascii	"u32\000"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x7b
+	.uleb128 0x3
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x35
+	.4byte	0x3e
+	.uleb128 0x3
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x36
+	.4byte	0x3e
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xea
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xe3
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xe3
+	.uleb128 0x3
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x3e
+	.uleb128 0x3
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x5e
+	.uleb128 0x3
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x70
+	.uleb128 0x9
+	.byte	0x4
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xf6
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF22
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0x147
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF23
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x13c
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x13c
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x13c
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x171
+	.uleb128 0xd
+	.uleb128 0xa
+	.4byte	0x107
+	.4byte	0x17d
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF26
+	.byte	0xc
+	.byte	0x10
+	.4byte	0x172
+	.uleb128 0xa
+	.4byte	0x37
+	.4byte	0x198
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0x8
+	.byte	0xd
+	.byte	0xf
+	.4byte	0x1bd
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0xd
+	.byte	0x10
+	.4byte	0xf6
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0xd
+	.byte	0x11
+	.4byte	0x1d6
+	.byte	0x4
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x198
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0x1d6
+	.uleb128 0x12
+	.4byte	0x50
+	.uleb128 0x12
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1c2
+	.uleb128 0xa
+	.4byte	0x1bd
+	.4byte	0x1e7
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1dc
+	.uleb128 0x4
+	.4byte	.LASF29
+	.byte	0xd
+	.byte	0xcd
+	.4byte	0x1e7
+	.uleb128 0x13
+	.2byte	0xa0c
+	.byte	0xe
+	.byte	0x13
+	.4byte	0x23e
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xe
+	.byte	0x14
+	.4byte	0x107
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xe
+	.byte	0x15
+	.4byte	0xfc
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF32
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x107
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x23e
+	.byte	0xc
+	.uleb128 0x14
+	.4byte	.LASF34
+	.byte	0xe
+	.byte	0x18
+	.4byte	0x24f
+	.2byte	0x80c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x107
+	.4byte	0x24f
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x2c
+	.4byte	0x260
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF35
+	.byte	0xe
+	.byte	0x32
+	.4byte	0x1f7
+	.uleb128 0xa
+	.4byte	0x260
+	.4byte	0x276
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF36
+	.byte	0xe
+	.byte	0x34
+	.4byte	0x26b
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4
+	.4byte	.LASF37
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0x8
+	.byte	0xf
+	.byte	0x10
+	.4byte	0x2ad
+	.uleb128 0x10
+	.4byte	.LASF39
+	.byte	0xf
+	.byte	0x11
+	.4byte	0xc0
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x12
+	.4byte	0xcb
+	.byte	0x4
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0x50
+	.byte	0xf
+	.byte	0x15
+	.4byte	0x2de
+	.uleb128 0x16
+	.ascii	"cnt\000"
+	.byte	0xf
+	.byte	0x16
+	.4byte	0x3e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x17
+	.4byte	0xcb
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF41
+	.byte	0xf
+	.byte	0x18
+	.4byte	0x2de
+	.byte	0x8
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x288
+	.4byte	0x2ee
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x17
+	.ascii	"lmb\000"
+	.byte	0xa0
+	.byte	0xf
+	.byte	0x1b
+	.4byte	0x313
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0xf
+	.byte	0x1c
+	.4byte	0x2ad
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF43
+	.byte	0xf
+	.byte	0x1d
+	.4byte	0x2ad
+	.byte	0x50
+	.byte	0
+	.uleb128 0x18
+	.ascii	"lmb\000"
+	.byte	0xf
+	.byte	0x20
+	.4byte	0x2ee
+	.uleb128 0x19
+	.byte	0x8
+	.byte	0x10
+	.byte	0x5a
+	.4byte	0x33f
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0x10
+	.byte	0x5b
+	.4byte	0xc0
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0x10
+	.byte	0x5c
+	.4byte	0xcb
+	.byte	0x4
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF44
+	.byte	0x58
+	.byte	0x10
+	.byte	0x1b
+	.4byte	0x430
+	.uleb128 0x10
+	.4byte	.LASF45
+	.byte	0x10
+	.byte	0x1c
+	.4byte	0x3e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0x1d
+	.4byte	0xcb
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF47
+	.byte	0x10
+	.byte	0x1e
+	.4byte	0x3e
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF48
+	.byte	0x10
+	.byte	0x1f
+	.4byte	0x3e
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF49
+	.byte	0x10
+	.byte	0x20
+	.4byte	0x3e
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF50
+	.byte	0x10
+	.byte	0x21
+	.4byte	0x3e
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF51
+	.byte	0x10
+	.byte	0x22
+	.4byte	0x3e
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF52
+	.byte	0x10
+	.byte	0x24
+	.4byte	0x3e
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF53
+	.byte	0x10
+	.byte	0x25
+	.4byte	0x3e
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF54
+	.byte	0x10
+	.byte	0x26
+	.4byte	0x3e
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF55
+	.byte	0x10
+	.byte	0x31
+	.4byte	0x3e
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF56
+	.byte	0x10
+	.byte	0x32
+	.4byte	0x3e
+	.byte	0x2c
+	.uleb128 0x10
+	.4byte	.LASF57
+	.byte	0x10
+	.byte	0x33
+	.4byte	0x188
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF58
+	.byte	0x10
+	.byte	0x34
+	.4byte	0x25
+	.byte	0x36
+	.uleb128 0x10
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0x35
+	.4byte	0x3e
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF60
+	.byte	0x10
+	.byte	0x36
+	.4byte	0x3e
+	.byte	0x3c
+	.uleb128 0x10
+	.4byte	.LASF61
+	.byte	0x10
+	.byte	0x57
+	.4byte	0x107
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF62
+	.byte	0x10
+	.byte	0x58
+	.4byte	0x107
+	.byte	0x44
+	.uleb128 0x10
+	.4byte	.LASF63
+	.byte	0x10
+	.byte	0x5d
+	.4byte	0x430
+	.byte	0x48
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x31e
+	.4byte	0x440
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF64
+	.byte	0x10
+	.byte	0x5f
+	.4byte	0x33f
+	.uleb128 0x4
+	.4byte	.LASF65
+	.byte	0x11
+	.byte	0x13
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF66
+	.byte	0x11
+	.byte	0x14
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF67
+	.byte	0x11
+	.byte	0x15
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF68
+	.byte	0x11
+	.byte	0x16
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF69
+	.byte	0x11
+	.byte	0x17
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF70
+	.byte	0x11
+	.byte	0x18
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF71
+	.byte	0x11
+	.byte	0x19
+	.4byte	0x107
+	.uleb128 0xf
+	.4byte	.LASF72
+	.byte	0x28
+	.byte	0x12
+	.byte	0x39
+	.4byte	0x51d
+	.uleb128 0x10
+	.4byte	.LASF73
+	.byte	0x12
+	.byte	0x3a
+	.4byte	0x52e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF74
+	.byte	0x12
+	.byte	0x3b
+	.4byte	0x52e
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF75
+	.byte	0x12
+	.byte	0x3c
+	.4byte	0x52e
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF76
+	.byte	0x12
+	.byte	0x3d
+	.4byte	0x52e
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF77
+	.byte	0x12
+	.byte	0x3e
+	.4byte	0x52e
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x12
+	.byte	0x3f
+	.4byte	0x52e
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF79
+	.byte	0x12
+	.byte	0x40
+	.4byte	0x52e
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF80
+	.byte	0x12
+	.byte	0x43
+	.4byte	0x52e
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF81
+	.byte	0x12
+	.byte	0x46
+	.4byte	0x52e
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF82
+	.byte	0x12
+	.byte	0x49
+	.4byte	0x52e
+	.byte	0x24
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF83
+	.byte	0x13
+	.byte	0xf
+	.4byte	0x528
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x498
+	.uleb128 0x3
+	.4byte	.LASF84
+	.byte	0x13
+	.byte	0x12
+	.4byte	0x11d
+	.uleb128 0x1a
+	.4byte	.LASF85
+	.byte	0x40
+	.byte	0x14
+	.2byte	0x133
+	.4byte	0x5e3
+	.uleb128 0x1b
+	.4byte	.LASF86
+	.byte	0x14
+	.2byte	0x134
+	.4byte	0x11d
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF87
+	.byte	0x14
+	.2byte	0x135
+	.4byte	0x11d
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF88
+	.byte	0x14
+	.2byte	0x136
+	.4byte	0x11d
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF89
+	.byte	0x14
+	.2byte	0x137
+	.4byte	0x11d
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF90
+	.byte	0x14
+	.2byte	0x138
+	.4byte	0x11d
+	.byte	0x10
+	.uleb128 0x1b
+	.4byte	.LASF91
+	.byte	0x14
+	.2byte	0x139
+	.4byte	0x11d
+	.byte	0x14
+	.uleb128 0x1b
+	.4byte	.LASF92
+	.byte	0x14
+	.2byte	0x13a
+	.4byte	0x11d
+	.byte	0x18
+	.uleb128 0x1b
+	.4byte	.LASF93
+	.byte	0x14
+	.2byte	0x13b
+	.4byte	0x112
+	.byte	0x1c
+	.uleb128 0x1b
+	.4byte	.LASF94
+	.byte	0x14
+	.2byte	0x13c
+	.4byte	0x112
+	.byte	0x1d
+	.uleb128 0x1b
+	.4byte	.LASF95
+	.byte	0x14
+	.2byte	0x13d
+	.4byte	0x112
+	.byte	0x1e
+	.uleb128 0x1b
+	.4byte	.LASF96
+	.byte	0x14
+	.2byte	0x13e
+	.4byte	0x112
+	.byte	0x1f
+	.uleb128 0x1b
+	.4byte	.LASF97
+	.byte	0x14
+	.2byte	0x13f
+	.4byte	0x5e3
+	.byte	0x20
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x112
+	.4byte	0x5f3
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF98
+	.byte	0x14
+	.2byte	0x140
+	.4byte	0x539
+	.uleb128 0x1a
+	.4byte	.LASF99
+	.byte	0x18
+	.byte	0x14
+	.2byte	0x142
+	.4byte	0x681
+	.uleb128 0x1b
+	.4byte	.LASF33
+	.byte	0x14
+	.2byte	0x143
+	.4byte	0x107
+	.byte	0
+	.uleb128 0x1d
+	.ascii	"end\000"
+	.byte	0x14
+	.2byte	0x143
+	.4byte	0x107
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF100
+	.byte	0x14
+	.2byte	0x144
+	.4byte	0x107
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF101
+	.byte	0x14
+	.2byte	0x144
+	.4byte	0x107
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF102
+	.byte	0x14
+	.2byte	0x145
+	.4byte	0x107
+	.byte	0x10
+	.uleb128 0x1b
+	.4byte	.LASF103
+	.byte	0x14
+	.2byte	0x146
+	.4byte	0x112
+	.byte	0x14
+	.uleb128 0x1b
+	.4byte	.LASF104
+	.byte	0x14
+	.2byte	0x146
+	.4byte	0x112
+	.byte	0x15
+	.uleb128 0x1d
+	.ascii	"os\000"
+	.byte	0x14
+	.2byte	0x146
+	.4byte	0x112
+	.byte	0x16
+	.uleb128 0x1b
+	.4byte	.LASF105
+	.byte	0x14
+	.2byte	0x147
+	.4byte	0x112
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1c
+	.4byte	.LASF106
+	.byte	0x14
+	.2byte	0x148
+	.4byte	0x5ff
+	.uleb128 0x1e
+	.4byte	.LASF107
+	.2byte	0x164
+	.byte	0x14
+	.2byte	0x14e
+	.4byte	0x820
+	.uleb128 0x1b
+	.4byte	.LASF108
+	.byte	0x14
+	.2byte	0x154
+	.4byte	0x820
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF109
+	.byte	0x14
+	.2byte	0x155
+	.4byte	0x5f3
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF110
+	.byte	0x14
+	.2byte	0x156
+	.4byte	0x107
+	.byte	0x44
+	.uleb128 0x1b
+	.4byte	.LASF111
+	.byte	0x14
+	.2byte	0x159
+	.4byte	0xdd
+	.byte	0x48
+	.uleb128 0x1b
+	.4byte	.LASF112
+	.byte	0x14
+	.2byte	0x15b
+	.4byte	0x128
+	.byte	0x4c
+	.uleb128 0x1b
+	.4byte	.LASF113
+	.byte	0x14
+	.2byte	0x15c
+	.4byte	0xdd
+	.byte	0x50
+	.uleb128 0x1b
+	.4byte	.LASF114
+	.byte	0x14
+	.2byte	0x15d
+	.4byte	0x50
+	.byte	0x54
+	.uleb128 0x1b
+	.4byte	.LASF115
+	.byte	0x14
+	.2byte	0x15f
+	.4byte	0x128
+	.byte	0x58
+	.uleb128 0x1b
+	.4byte	.LASF116
+	.byte	0x14
+	.2byte	0x160
+	.4byte	0xdd
+	.byte	0x5c
+	.uleb128 0x1b
+	.4byte	.LASF117
+	.byte	0x14
+	.2byte	0x161
+	.4byte	0x50
+	.byte	0x60
+	.uleb128 0x1b
+	.4byte	.LASF118
+	.byte	0x14
+	.2byte	0x163
+	.4byte	0x128
+	.byte	0x64
+	.uleb128 0x1b
+	.4byte	.LASF119
+	.byte	0x14
+	.2byte	0x164
+	.4byte	0xdd
+	.byte	0x68
+	.uleb128 0x1b
+	.4byte	.LASF120
+	.byte	0x14
+	.2byte	0x165
+	.4byte	0x50
+	.byte	0x6c
+	.uleb128 0x1b
+	.4byte	.LASF121
+	.byte	0x14
+	.2byte	0x167
+	.4byte	0x128
+	.byte	0x70
+	.uleb128 0x1b
+	.4byte	.LASF122
+	.byte	0x14
+	.2byte	0x168
+	.4byte	0xdd
+	.byte	0x74
+	.uleb128 0x1b
+	.4byte	.LASF123
+	.byte	0x14
+	.2byte	0x169
+	.4byte	0x50
+	.byte	0x78
+	.uleb128 0x1d
+	.ascii	"os\000"
+	.byte	0x14
+	.2byte	0x16d
+	.4byte	0x681
+	.byte	0x7c
+	.uleb128 0x1d
+	.ascii	"ep\000"
+	.byte	0x14
+	.2byte	0x16e
+	.4byte	0x107
+	.byte	0x94
+	.uleb128 0x1b
+	.4byte	.LASF124
+	.byte	0x14
+	.2byte	0x170
+	.4byte	0x107
+	.byte	0x98
+	.uleb128 0x1b
+	.4byte	.LASF125
+	.byte	0x14
+	.2byte	0x170
+	.4byte	0x107
+	.byte	0x9c
+	.uleb128 0x1b
+	.4byte	.LASF126
+	.byte	0x14
+	.2byte	0x172
+	.4byte	0xf6
+	.byte	0xa0
+	.uleb128 0x1b
+	.4byte	.LASF127
+	.byte	0x14
+	.2byte	0x173
+	.4byte	0x107
+	.byte	0xa4
+	.uleb128 0x1b
+	.4byte	.LASF128
+	.byte	0x14
+	.2byte	0x175
+	.4byte	0x107
+	.byte	0xa8
+	.uleb128 0x1b
+	.4byte	.LASF129
+	.byte	0x14
+	.2byte	0x176
+	.4byte	0x107
+	.byte	0xac
+	.uleb128 0x1b
+	.4byte	.LASF130
+	.byte	0x14
+	.2byte	0x177
+	.4byte	0x107
+	.byte	0xb0
+	.uleb128 0x1b
+	.4byte	.LASF131
+	.byte	0x14
+	.2byte	0x178
+	.4byte	0x107
+	.byte	0xb4
+	.uleb128 0x1d
+	.ascii	"kbd\000"
+	.byte	0x14
+	.2byte	0x179
+	.4byte	0x826
+	.byte	0xb8
+	.uleb128 0x1b
+	.4byte	.LASF132
+	.byte	0x14
+	.2byte	0x17c
+	.4byte	0x50
+	.byte	0xbc
+	.uleb128 0x1b
+	.4byte	.LASF133
+	.byte	0x14
+	.2byte	0x189
+	.4byte	0x50
+	.byte	0xc0
+	.uleb128 0x1d
+	.ascii	"lmb\000"
+	.byte	0x14
+	.2byte	0x18c
+	.4byte	0x2ee
+	.byte	0xc4
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x5f3
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x440
+	.uleb128 0x1c
+	.4byte	.LASF134
+	.byte	0x14
+	.2byte	0x18e
+	.4byte	0x68d
+	.uleb128 0xc
+	.4byte	.LASF135
+	.byte	0x14
+	.2byte	0x190
+	.4byte	0x82c
+	.uleb128 0x1f
+	.4byte	.LASF263
+	.byte	0x4
+	.4byte	0x50
+	.byte	0x16
+	.byte	0xe
+	.4byte	0xa41
+	.uleb128 0x20
+	.4byte	.LASF136
+	.byte	0
+	.uleb128 0x20
+	.4byte	.LASF137
+	.byte	0x1
+	.uleb128 0x20
+	.4byte	.LASF138
+	.byte	0x2
+	.uleb128 0x20
+	.4byte	.LASF139
+	.byte	0x3
+	.uleb128 0x20
+	.4byte	.LASF140
+	.byte	0x4
+	.uleb128 0x20
+	.4byte	.LASF141
+	.byte	0x5
+	.uleb128 0x20
+	.4byte	.LASF142
+	.byte	0x6
+	.uleb128 0x20
+	.4byte	.LASF143
+	.byte	0x7
+	.uleb128 0x20
+	.4byte	.LASF144
+	.byte	0x8
+	.uleb128 0x20
+	.4byte	.LASF145
+	.byte	0x9
+	.uleb128 0x20
+	.4byte	.LASF146
+	.byte	0xa
+	.uleb128 0x20
+	.4byte	.LASF147
+	.byte	0xb
+	.uleb128 0x20
+	.4byte	.LASF148
+	.byte	0xc
+	.uleb128 0x20
+	.4byte	.LASF149
+	.byte	0xd
+	.uleb128 0x20
+	.4byte	.LASF150
+	.byte	0xe
+	.uleb128 0x20
+	.4byte	.LASF151
+	.byte	0xf
+	.uleb128 0x20
+	.4byte	.LASF152
+	.byte	0x10
+	.uleb128 0x20
+	.4byte	.LASF153
+	.byte	0x11
+	.uleb128 0x20
+	.4byte	.LASF154
+	.byte	0x12
+	.uleb128 0x20
+	.4byte	.LASF155
+	.byte	0x13
+	.uleb128 0x20
+	.4byte	.LASF156
+	.byte	0x14
+	.uleb128 0x20
+	.4byte	.LASF157
+	.byte	0x15
+	.uleb128 0x20
+	.4byte	.LASF158
+	.byte	0x16
+	.uleb128 0x20
+	.4byte	.LASF159
+	.byte	0x17
+	.uleb128 0x20
+	.4byte	.LASF160
+	.byte	0x18
+	.uleb128 0x20
+	.4byte	.LASF161
+	.byte	0x19
+	.uleb128 0x20
+	.4byte	.LASF162
+	.byte	0x1a
+	.uleb128 0x20
+	.4byte	.LASF163
+	.byte	0x1b
+	.uleb128 0x20
+	.4byte	.LASF164
+	.byte	0x1c
+	.uleb128 0x20
+	.4byte	.LASF165
+	.byte	0x1d
+	.uleb128 0x20
+	.4byte	.LASF166
+	.byte	0x1e
+	.uleb128 0x20
+	.4byte	.LASF167
+	.byte	0x1f
+	.uleb128 0x20
+	.4byte	.LASF168
+	.byte	0x20
+	.uleb128 0x20
+	.4byte	.LASF169
+	.byte	0x21
+	.uleb128 0x20
+	.4byte	.LASF170
+	.byte	0x22
+	.uleb128 0x20
+	.4byte	.LASF171
+	.byte	0x23
+	.uleb128 0x20
+	.4byte	.LASF172
+	.byte	0x24
+	.uleb128 0x20
+	.4byte	.LASF173
+	.byte	0x25
+	.uleb128 0x20
+	.4byte	.LASF174
+	.byte	0x26
+	.uleb128 0x20
+	.4byte	.LASF175
+	.byte	0x27
+	.uleb128 0x20
+	.4byte	.LASF176
+	.byte	0x28
+	.uleb128 0x20
+	.4byte	.LASF177
+	.byte	0x29
+	.uleb128 0x20
+	.4byte	.LASF178
+	.byte	0x2a
+	.uleb128 0x20
+	.4byte	.LASF179
+	.byte	0x2b
+	.uleb128 0x20
+	.4byte	.LASF180
+	.byte	0x2c
+	.uleb128 0x20
+	.4byte	.LASF181
+	.byte	0x2d
+	.uleb128 0x20
+	.4byte	.LASF182
+	.byte	0x2e
+	.uleb128 0x20
+	.4byte	.LASF183
+	.byte	0x2f
+	.uleb128 0x20
+	.4byte	.LASF184
+	.byte	0x30
+	.uleb128 0x20
+	.4byte	.LASF185
+	.byte	0x31
+	.uleb128 0x20
+	.4byte	.LASF186
+	.byte	0x32
+	.uleb128 0x20
+	.4byte	.LASF187
+	.byte	0x33
+	.uleb128 0x20
+	.4byte	.LASF188
+	.byte	0x34
+	.uleb128 0x20
+	.4byte	.LASF189
+	.byte	0x35
+	.uleb128 0x20
+	.4byte	.LASF190
+	.byte	0x36
+	.uleb128 0x20
+	.4byte	.LASF191
+	.byte	0x37
+	.uleb128 0x20
+	.4byte	.LASF192
+	.byte	0x38
+	.uleb128 0x20
+	.4byte	.LASF193
+	.byte	0x39
+	.uleb128 0x20
+	.4byte	.LASF194
+	.byte	0x3a
+	.uleb128 0x20
+	.4byte	.LASF195
+	.byte	0x3b
+	.uleb128 0x20
+	.4byte	.LASF196
+	.byte	0x3c
+	.uleb128 0x20
+	.4byte	.LASF197
+	.byte	0x3d
+	.uleb128 0x20
+	.4byte	.LASF198
+	.byte	0x3e
+	.uleb128 0x20
+	.4byte	.LASF199
+	.byte	0x3f
+	.uleb128 0x20
+	.4byte	.LASF200
+	.byte	0x40
+	.uleb128 0x20
+	.4byte	.LASF201
+	.byte	0x41
+	.uleb128 0x20
+	.4byte	.LASF202
+	.byte	0x42
+	.uleb128 0x20
+	.4byte	.LASF203
+	.byte	0x43
+	.uleb128 0x20
+	.4byte	.LASF204
+	.byte	0x44
+	.uleb128 0x20
+	.4byte	.LASF205
+	.byte	0x45
+	.uleb128 0x20
+	.4byte	.LASF206
+	.byte	0x46
+	.uleb128 0x20
+	.4byte	.LASF207
+	.byte	0x47
+	.uleb128 0x20
+	.4byte	.LASF208
+	.byte	0x48
+	.uleb128 0x20
+	.4byte	.LASF209
+	.byte	0x49
+	.uleb128 0x20
+	.4byte	.LASF210
+	.byte	0x4a
+	.uleb128 0x20
+	.4byte	.LASF211
+	.byte	0x4b
+	.uleb128 0x20
+	.4byte	.LASF212
+	.byte	0x4c
+	.uleb128 0x20
+	.4byte	.LASF213
+	.byte	0x4d
+	.uleb128 0x20
+	.4byte	.LASF214
+	.byte	0x4e
+	.uleb128 0x20
+	.4byte	.LASF215
+	.byte	0x4f
+	.uleb128 0x20
+	.4byte	.LASF216
+	.byte	0x50
+	.uleb128 0x21
+	.4byte	.LASF217
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x22
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x1f
+	.byte	0xe0
+	.4byte	0xa54
+	.uleb128 0x20
+	.4byte	.LASF218
+	.byte	0x5
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xa64
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF219
+	.byte	0x6
+	.byte	0xa6
+	.4byte	0x107
+	.uleb128 0xa
+	.4byte	0x90
+	.4byte	0xa7a
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF220
+	.byte	0x6
+	.byte	0xa8
+	.4byte	0xa6f
+	.uleb128 0x4
+	.4byte	.LASF221
+	.byte	0x6
+	.byte	0xa9
+	.4byte	0xa6f
+	.uleb128 0x4
+	.4byte	.LASF222
+	.byte	0x6
+	.byte	0xf7
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF223
+	.byte	0x6
+	.byte	0xf8
+	.4byte	0x107
+	.uleb128 0x4
+	.4byte	.LASF224
+	.byte	0x6
+	.byte	0xf9
+	.4byte	0x107
+	.uleb128 0xf
+	.4byte	.LASF225
+	.byte	0x4
+	.byte	0x15
+	.byte	0x2e
+	.4byte	0xaca
+	.uleb128 0x10
+	.4byte	.LASF226
+	.byte	0x15
+	.byte	0x2f
+	.4byte	0x11d
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x2c
+	.uleb128 0xf
+	.4byte	.LASF227
+	.byte	0x40
+	.byte	0x15
+	.byte	0xa6
+	.4byte	0xb6d
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0x15
+	.byte	0xa8
+	.4byte	0xb6d
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF228
+	.byte	0x15
+	.byte	0xa9
+	.4byte	0x188
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF229
+	.byte	0x15
+	.byte	0xaa
+	.4byte	0xc0
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF133
+	.byte	0x15
+	.byte	0xab
+	.4byte	0x50
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF230
+	.byte	0x15
+	.byte	0xad
+	.4byte	0xb97
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF231
+	.byte	0x15
+	.byte	0xae
+	.4byte	0xbb6
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF232
+	.byte	0x15
+	.byte	0xaf
+	.4byte	0xbcb
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF233
+	.byte	0x15
+	.byte	0xb0
+	.4byte	0xbdc
+	.byte	0x2c
+	.uleb128 0x10
+	.4byte	.LASF234
+	.byte	0x15
+	.byte	0xb4
+	.4byte	0xbcb
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF235
+	.byte	0x15
+	.byte	0xb5
+	.4byte	0xb91
+	.byte	0x34
+	.uleb128 0x10
+	.4byte	.LASF236
+	.byte	0x15
+	.byte	0xb6
+	.4byte	0x50
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF237
+	.byte	0x15
+	.byte	0xb7
+	.4byte	0x128
+	.byte	0x3c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xb7d
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0xb91
+	.uleb128 0x12
+	.4byte	0xb91
+	.uleb128 0x12
+	.4byte	0x826
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xad0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xb7d
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0xbb6
+	.uleb128 0x12
+	.4byte	0xb91
+	.uleb128 0x12
+	.4byte	0x128
+	.uleb128 0x12
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xb9d
+	.uleb128 0x11
+	.4byte	0x50
+	.4byte	0xbcb
+	.uleb128 0x12
+	.4byte	0xb91
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xbbc
+	.uleb128 0x23
+	.4byte	0xbdc
+	.uleb128 0x12
+	.4byte	0xb91
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xbd1
+	.uleb128 0x4
+	.4byte	.LASF238
+	.byte	0x15
+	.byte	0xbd
+	.4byte	0xb91
+	.uleb128 0x23
+	.4byte	0xbfd
+	.uleb128 0x12
+	.4byte	0x128
+	.uleb128 0x12
+	.4byte	0x50
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF239
+	.byte	0x15
+	.2byte	0x11e
+	.4byte	0xc09
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xbed
+	.uleb128 0xa
+	.4byte	0x90
+	.4byte	0xc1f
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF240
+	.byte	0x15
+	.2byte	0x1fd
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF241
+	.byte	0x15
+	.2byte	0x1fe
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF242
+	.byte	0x15
+	.2byte	0x200
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF243
+	.byte	0x15
+	.2byte	0x205
+	.4byte	0xa54
+	.uleb128 0xc
+	.4byte	.LASF244
+	.byte	0x15
+	.2byte	0x206
+	.4byte	0xa54
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xc6b
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x3f
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF245
+	.byte	0x15
+	.2byte	0x207
+	.4byte	0xc5b
+	.uleb128 0xc
+	.4byte	.LASF246
+	.byte	0x15
+	.2byte	0x209
+	.4byte	0xc0f
+	.uleb128 0xc
+	.4byte	.LASF247
+	.byte	0x15
+	.2byte	0x20a
+	.4byte	0xc0f
+	.uleb128 0xc
+	.4byte	.LASF248
+	.byte	0x15
+	.2byte	0x20b
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF249
+	.byte	0x15
+	.2byte	0x20c
+	.4byte	0xab1
+	.uleb128 0xc
+	.4byte	.LASF250
+	.byte	0x15
+	.2byte	0x20d
+	.4byte	0xaca
+	.uleb128 0xa
+	.4byte	0xaca
+	.4byte	0xcc3
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x3
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF251
+	.byte	0x15
+	.2byte	0x20e
+	.4byte	0xcb3
+	.uleb128 0xc
+	.4byte	.LASF252
+	.byte	0x15
+	.2byte	0x20f
+	.4byte	0xaca
+	.uleb128 0xc
+	.4byte	.LASF253
+	.byte	0x15
+	.2byte	0x210
+	.4byte	0x50
+	.uleb128 0xa
+	.4byte	0x9a
+	.4byte	0xcf7
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xce7
+	.uleb128 0xc
+	.4byte	.LASF254
+	.byte	0x15
+	.2byte	0x211
+	.4byte	0xcf7
+	.uleb128 0xc
+	.4byte	.LASF255
+	.byte	0x15
+	.2byte	0x212
+	.4byte	0xcf7
+	.uleb128 0xc
+	.4byte	.LASF256
+	.byte	0x15
+	.2byte	0x216
+	.4byte	0xfc
+	.uleb128 0xc
+	.4byte	.LASF257
+	.byte	0x15
+	.2byte	0x217
+	.4byte	0xfc
+	.uleb128 0xc
+	.4byte	.LASF258
+	.byte	0x15
+	.2byte	0x219
+	.4byte	0x50
+	.uleb128 0xa
+	.4byte	0xe3
+	.4byte	0xd49
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF259
+	.byte	0x15
+	.2byte	0x220
+	.4byte	0xd38
+	.uleb128 0xc
+	.4byte	.LASF260
+	.byte	0x15
+	.2byte	0x222
+	.4byte	0xb5
+	.uleb128 0xc
+	.4byte	.LASF261
+	.byte	0x15
+	.2byte	0x224
+	.4byte	0xb5
+	.uleb128 0xc
+	.4byte	.LASF262
+	.byte	0x15
+	.2byte	0x230
+	.4byte	0xab1
+	.uleb128 0x24
+	.4byte	.LASF264
+	.byte	0x4
+	.4byte	0x7b
+	.byte	0x15
+	.2byte	0x286
+	.4byte	0xda3
+	.uleb128 0x20
+	.4byte	.LASF265
+	.byte	0
+	.uleb128 0x20
+	.4byte	.LASF266
+	.byte	0x1
+	.uleb128 0x20
+	.4byte	.LASF267
+	.byte	0x2
+	.uleb128 0x20
+	.4byte	.LASF268
+	.byte	0x3
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF269
+	.byte	0x15
+	.2byte	0x28c
+	.4byte	0xd79
+	.uleb128 0x3
+	.4byte	.LASF270
+	.byte	0x17
+	.byte	0x9
+	.4byte	0x37
+	.uleb128 0x3
+	.4byte	.LASF271
+	.byte	0x17
+	.byte	0xa
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF272
+	.byte	0x17
+	.byte	0xb
+	.4byte	0x7b
+	.uleb128 0x3
+	.4byte	.LASF273
+	.byte	0x17
+	.byte	0xc
+	.4byte	0x50
+	.uleb128 0x3
+	.4byte	.LASF274
+	.byte	0x17
+	.byte	0xd
+	.4byte	0x69
+	.uleb128 0xf
+	.4byte	.LASF275
+	.byte	0x14
+	.byte	0x18
+	.byte	0x27
+	.4byte	0xe2f
+	.uleb128 0x10
+	.4byte	.LASF276
+	.byte	0x18
+	.byte	0x28
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF277
+	.byte	0x18
+	.byte	0x29
+	.4byte	0xb5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF278
+	.byte	0x18
+	.byte	0x2a
+	.4byte	0xe2f
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF279
+	.byte	0x18
+	.byte	0x2b
+	.4byte	0xe2f
+	.byte	0xc
+	.uleb128 0x16
+	.ascii	"lpa\000"
+	.byte	0x18
+	.byte	0x2c
+	.4byte	0xb5
+	.byte	0x10
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xb5
+	.uleb128 0xf
+	.4byte	.LASF280
+	.byte	0x18
+	.byte	0x18
+	.byte	0x2f
+	.4byte	0xed2
+	.uleb128 0x10
+	.4byte	.LASF281
+	.byte	0x18
+	.byte	0x30
+	.4byte	0x9f
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF282
+	.byte	0x18
+	.byte	0x31
+	.4byte	0x9f
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF283
+	.byte	0x18
+	.byte	0x32
+	.4byte	0x9f
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF284
+	.byte	0x18
+	.byte	0x33
+	.4byte	0x9f
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF285
+	.byte	0x18
+	.byte	0x34
+	.4byte	0x9f
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF286
+	.byte	0x18
+	.byte	0x35
+	.4byte	0x9f
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF287
+	.byte	0x18
+	.byte	0x36
+	.4byte	0x9f
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF288
+	.byte	0x18
+	.byte	0x37
+	.4byte	0x9f
+	.byte	0xe
+	.uleb128 0x10
+	.4byte	.LASF289
+	.byte	0x18
+	.byte	0x38
+	.4byte	0x9f
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF290
+	.byte	0x18
+	.byte	0x39
+	.4byte	0x9f
+	.byte	0x12
+	.uleb128 0x10
+	.4byte	.LASF291
+	.byte	0x18
+	.byte	0x3a
+	.4byte	0x9f
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF292
+	.byte	0x18
+	.byte	0x3b
+	.4byte	0x90
+	.byte	0x16
+	.byte	0
+	.uleb128 0x7
+	.4byte	0xe35
+	.uleb128 0xf
+	.4byte	.LASF293
+	.byte	0x10
+	.byte	0x18
+	.byte	0x3e
+	.4byte	0xf14
+	.uleb128 0x10
+	.4byte	.LASF294
+	.byte	0x18
+	.byte	0x3f
+	.4byte	0xf2e
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF295
+	.byte	0x18
+	.byte	0x40
+	.4byte	0xf48
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF296
+	.byte	0x18
+	.byte	0x41
+	.4byte	0xf6c
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF297
+	.byte	0x18
+	.byte	0x42
+	.4byte	0xf6c
+	.byte	0xc
+	.byte	0
+	.uleb128 0x11
+	.4byte	0xaa
+	.4byte	0xf28
+	.uleb128 0x12
+	.4byte	0xf28
+	.uleb128 0x12
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x9f
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf14
+	.uleb128 0x11
+	.4byte	0xb5
+	.4byte	0xf48
+	.uleb128 0x12
+	.4byte	0x90
+	.uleb128 0x12
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf34
+	.uleb128 0x11
+	.4byte	0xb5
+	.4byte	0xf6c
+	.uleb128 0x12
+	.4byte	0x90
+	.uleb128 0x12
+	.4byte	0xb5
+	.uleb128 0x12
+	.4byte	0xe2f
+	.uleb128 0x12
+	.4byte	0xe2f
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xf4e
+	.uleb128 0xf
+	.4byte	.LASF298
+	.byte	0x3c
+	.byte	0x19
+	.byte	0x2b
+	.4byte	0xfd2
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x2d
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF299
+	.byte	0x19
+	.byte	0x2e
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF300
+	.byte	0x19
+	.byte	0x2f
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x16
+	.ascii	"cnt\000"
+	.byte	0x19
+	.byte	0x30
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x31
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF301
+	.byte	0x19
+	.byte	0x32
+	.4byte	0xfd2
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF302
+	.byte	0x19
+	.byte	0x33
+	.4byte	0xfe2
+	.byte	0x1c
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0xfe2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x7
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xff2
+	.4byte	0xff2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x7
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdc5
+	.uleb128 0xf
+	.4byte	.LASF303
+	.byte	0xc
+	.byte	0x19
+	.byte	0x3f
+	.4byte	0x1040
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x41
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF299
+	.byte	0x19
+	.byte	0x42
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF300
+	.byte	0x19
+	.byte	0x43
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF304
+	.byte	0x19
+	.byte	0x44
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x45
+	.4byte	0xdc5
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF305
+	.byte	0x28
+	.byte	0x19
+	.byte	0x48
+	.4byte	0x10e9
+	.uleb128 0x10
+	.4byte	.LASF236
+	.byte	0x19
+	.byte	0x4a
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF299
+	.byte	0x19
+	.byte	0x4b
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x4d
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF307
+	.byte	0x19
+	.byte	0x4e
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF308
+	.byte	0x19
+	.byte	0x50
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF309
+	.byte	0x19
+	.byte	0x51
+	.4byte	0xdba
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF310
+	.byte	0x19
+	.byte	0x53
+	.4byte	0x10e9
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF311
+	.byte	0x19
+	.byte	0x54
+	.4byte	0xff2
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF312
+	.byte	0x19
+	.byte	0x55
+	.4byte	0x10e9
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF313
+	.byte	0x19
+	.byte	0x56
+	.4byte	0xff2
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x58
+	.4byte	0xdc5
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF314
+	.byte	0x19
+	.byte	0x59
+	.4byte	0xdc5
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF315
+	.byte	0x19
+	.byte	0x5a
+	.4byte	0xdc5
+	.byte	0x24
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdba
+	.uleb128 0xf
+	.4byte	.LASF316
+	.byte	0xc
+	.byte	0x19
+	.byte	0x5d
+	.4byte	0x112c
+	.uleb128 0x10
+	.4byte	.LASF317
+	.byte	0x19
+	.byte	0x5f
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF43
+	.byte	0x19
+	.byte	0x60
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x16
+	.ascii	"hit\000"
+	.byte	0x19
+	.byte	0x61
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF318
+	.byte	0x19
+	.byte	0x62
+	.4byte	0xff2
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF319
+	.byte	0x24
+	.byte	0x19
+	.byte	0x65
+	.4byte	0x1199
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x67
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF320
+	.byte	0x19
+	.byte	0x68
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x69
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x16
+	.ascii	"len\000"
+	.byte	0x19
+	.byte	0x6a
+	.4byte	0xdc5
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF321
+	.byte	0x19
+	.byte	0x6b
+	.4byte	0xdc5
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF322
+	.byte	0x19
+	.byte	0x6c
+	.4byte	0xdc5
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0x6d
+	.4byte	0x1199
+	.byte	0x18
+	.uleb128 0x16
+	.ascii	"tbl\000"
+	.byte	0x19
+	.byte	0x6e
+	.4byte	0x11a9
+	.byte	0x20
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x11a9
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x11b9
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF324
+	.byte	0x10
+	.byte	0x19
+	.byte	0x72
+	.4byte	0x1219
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x74
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x75
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x76
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF300
+	.byte	0x19
+	.byte	0x77
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF325
+	.byte	0x19
+	.byte	0x78
+	.4byte	0xdba
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF326
+	.byte	0x19
+	.byte	0x79
+	.4byte	0xdba
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0x7a
+	.4byte	0x1219
+	.byte	0xe
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdaf
+	.4byte	0x1229
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF327
+	.byte	0x10
+	.byte	0x19
+	.byte	0x7d
+	.4byte	0x1271
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x7f
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x80
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x81
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x16
+	.ascii	"lpa\000"
+	.byte	0x19
+	.byte	0x82
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF328
+	.byte	0x19
+	.byte	0x83
+	.4byte	0xdc5
+	.byte	0xc
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF329
+	.byte	0x10
+	.byte	0x19
+	.byte	0x8f
+	.4byte	0x12b9
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x91
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x92
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x93
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF330
+	.byte	0x19
+	.byte	0x94
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0x95
+	.4byte	0x12b9
+	.byte	0xa
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdaf
+	.4byte	0x12c9
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF331
+	.byte	0x10
+	.byte	0x19
+	.byte	0x98
+	.4byte	0x1311
+	.uleb128 0x10
+	.4byte	.LASF306
+	.byte	0x19
+	.byte	0x9a
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0x9b
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF78
+	.byte	0x19
+	.byte	0x9c
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF332
+	.byte	0x19
+	.byte	0x9d
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF333
+	.byte	0x19
+	.byte	0x9e
+	.4byte	0xdc5
+	.byte	0xc
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF334
+	.byte	0x30
+	.byte	0x19
+	.byte	0xa1
+	.4byte	0x140e
+	.uleb128 0x16
+	.ascii	"tag\000"
+	.byte	0x19
+	.byte	0xa3
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x16
+	.ascii	"ver\000"
+	.byte	0x19
+	.byte	0xa4
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF304
+	.byte	0x19
+	.byte	0xa6
+	.4byte	0xdba
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF335
+	.byte	0x19
+	.byte	0xa7
+	.4byte	0xdaf
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF336
+	.byte	0x19
+	.byte	0xa8
+	.4byte	0xdaf
+	.byte	0xb
+	.uleb128 0x10
+	.4byte	.LASF337
+	.byte	0x19
+	.byte	0xa9
+	.4byte	0xdaf
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF338
+	.byte	0x19
+	.byte	0xaa
+	.4byte	0xdaf
+	.byte	0xd
+	.uleb128 0x10
+	.4byte	.LASF339
+	.byte	0x19
+	.byte	0xab
+	.4byte	0xdba
+	.byte	0xe
+	.uleb128 0x10
+	.4byte	.LASF340
+	.byte	0x19
+	.byte	0xad
+	.4byte	0xdba
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF341
+	.byte	0x19
+	.byte	0xae
+	.4byte	0xdba
+	.byte	0x12
+	.uleb128 0x10
+	.4byte	.LASF342
+	.byte	0x19
+	.byte	0xaf
+	.4byte	0xdba
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF343
+	.byte	0x19
+	.byte	0xb0
+	.4byte	0xdba
+	.byte	0x16
+	.uleb128 0x10
+	.4byte	.LASF344
+	.byte	0x19
+	.byte	0xb2
+	.4byte	0xdba
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF345
+	.byte	0x19
+	.byte	0xb3
+	.4byte	0xdba
+	.byte	0x1a
+	.uleb128 0x10
+	.4byte	.LASF346
+	.byte	0x19
+	.byte	0xb4
+	.4byte	0xdba
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF347
+	.byte	0x19
+	.byte	0xb5
+	.4byte	0xdba
+	.byte	0x1e
+	.uleb128 0x10
+	.4byte	.LASF348
+	.byte	0x19
+	.byte	0xb7
+	.4byte	0xdc5
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF349
+	.byte	0x19
+	.byte	0xb8
+	.4byte	0xdc5
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF350
+	.byte	0x19
+	.byte	0xb9
+	.4byte	0xdc5
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0xba
+	.4byte	0x11a9
+	.byte	0x2c
+	.byte	0
+	.uleb128 0x25
+	.4byte	.LASF351
+	.2byte	0x200
+	.byte	0x19
+	.byte	0xbe
+	.4byte	0x1554
+	.uleb128 0x16
+	.ascii	"tag\000"
+	.byte	0x19
+	.byte	0xc0
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x16
+	.ascii	"ver\000"
+	.byte	0x19
+	.byte	0xc1
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF352
+	.byte	0x19
+	.byte	0xc3
+	.4byte	0xdc5
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF353
+	.byte	0x19
+	.byte	0xc4
+	.4byte	0xdc5
+	.byte	0xc
+	.uleb128 0x10
+	.4byte	.LASF354
+	.byte	0x19
+	.byte	0xc5
+	.4byte	0xdc5
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF355
+	.byte	0x19
+	.byte	0xc6
+	.4byte	0xdc5
+	.byte	0x14
+	.uleb128 0x10
+	.4byte	.LASF348
+	.byte	0x19
+	.byte	0xc8
+	.4byte	0xdc5
+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF356
+	.byte	0x19
+	.byte	0xc9
+	.4byte	0xdc5
+	.byte	0x1c
+	.uleb128 0x10
+	.4byte	.LASF357
+	.byte	0x19
+	.byte	0xca
+	.4byte	0xdc5
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF358
+	.byte	0x19
+	.byte	0xcb
+	.4byte	0xdc5
+	.byte	0x24
+	.uleb128 0x10
+	.4byte	.LASF345
+	.byte	0x19
+	.byte	0xcd
+	.4byte	0xdc5
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF359
+	.byte	0x19
+	.byte	0xce
+	.4byte	0xdc5
+	.byte	0x2c
+	.uleb128 0x10
+	.4byte	.LASF360
+	.byte	0x19
+	.byte	0xcf
+	.4byte	0xdc5
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF361
+	.byte	0x19
+	.byte	0xd0
+	.4byte	0xdc5
+	.byte	0x34
+	.uleb128 0x10
+	.4byte	.LASF362
+	.byte	0x19
+	.byte	0xd2
+	.4byte	0xdc5
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF363
+	.byte	0x19
+	.byte	0xd3
+	.4byte	0xdc5
+	.byte	0x3c
+	.uleb128 0x10
+	.4byte	.LASF364
+	.byte	0x19
+	.byte	0xd4
+	.4byte	0xdc5
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF365
+	.byte	0x19
+	.byte	0xd5
+	.4byte	0xdc5
+	.byte	0x44
+	.uleb128 0x10
+	.4byte	.LASF366
+	.byte	0x19
+	.byte	0xd7
+	.4byte	0xdc5
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF367
+	.byte	0x19
+	.byte	0xd8
+	.4byte	0xdc5
+	.byte	0x4c
+	.uleb128 0x10
+	.4byte	.LASF368
+	.byte	0x19
+	.byte	0xd9
+	.4byte	0xdc5
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF369
+	.byte	0x19
+	.byte	0xda
+	.4byte	0xdc5
+	.byte	0x54
+	.uleb128 0x10
+	.4byte	.LASF370
+	.byte	0x19
+	.byte	0xdc
+	.4byte	0xdc5
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF371
+	.byte	0x19
+	.byte	0xdd
+	.4byte	0xdc5
+	.byte	0x5c
+	.uleb128 0x10
+	.4byte	.LASF372
+	.byte	0x19
+	.byte	0xde
+	.4byte	0xdc5
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF323
+	.byte	0x19
+	.byte	0xe0
+	.4byte	0x1554
+	.byte	0x64
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x1564
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x66
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF373
+	.byte	0x6
+	.byte	0x19
+	.byte	0xe4
+	.4byte	0x1595
+	.uleb128 0x10
+	.4byte	.LASF235
+	.byte	0x19
+	.byte	0xe6
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF374
+	.byte	0x19
+	.byte	0xe7
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF375
+	.byte	0x19
+	.byte	0xe8
+	.4byte	0xdba
+	.byte	0x4
+	.byte	0
+	.uleb128 0x25
+	.4byte	.LASF376
+	.2byte	0x808
+	.byte	0x19
+	.byte	0xeb
+	.4byte	0x15df
+	.uleb128 0x16
+	.ascii	"max\000"
+	.byte	0x19
+	.byte	0xed
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF377
+	.byte	0x19
+	.byte	0xee
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF378
+	.byte	0x19
+	.byte	0xef
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF325
+	.byte	0x19
+	.byte	0xf0
+	.4byte	0xdba
+	.byte	0x6
+	.uleb128 0x16
+	.ascii	"arr\000"
+	.byte	0x19
+	.byte	0xf1
+	.4byte	0x15df
+	.byte	0x8
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x15f0
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF379
+	.byte	0x30
+	.byte	0x19
+	.byte	0xf5
+	.4byte	0x1682
+	.uleb128 0x16
+	.ascii	"id\000"
+	.byte	0x19
+	.byte	0xf7
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF380
+	.byte	0x19
+	.byte	0xf8
+	.4byte	0xdba
+	.byte	0x2
+	.uleb128 0x10
+	.4byte	.LASF381
+	.byte	0x19
+	.byte	0xf9
+	.4byte	0xdba
+	.byte	0x4
+	.uleb128 0x10
+	.4byte	.LASF382
+	.byte	0x19
+	.byte	0xfa
+	.4byte	0xdaf
+	.byte	0x6
+	.uleb128 0x10
+	.4byte	.LASF383
+	.byte	0x19
+	.byte	0xfb
+	.4byte	0xdaf
+	.byte	0x7
+	.uleb128 0x10
+	.4byte	.LASF384
+	.byte	0x19
+	.byte	0xfc
+	.4byte	0xdaf
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF385
+	.byte	0x19
+	.byte	0xfd
+	.4byte	0xdaf
+	.byte	0x9
+	.uleb128 0x10
+	.4byte	.LASF386
+	.byte	0x19
+	.byte	0xfe
+	.4byte	0xdaf
+	.byte	0xa
+	.uleb128 0x10
+	.4byte	.LASF387
+	.byte	0x19
+	.byte	0xff
+	.4byte	0xdaf
+	.byte	0xb
+	.uleb128 0x1b
+	.4byte	.LASF78
+	.byte	0x19
+	.2byte	0x100
+	.4byte	0xdc5
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF388
+	.byte	0x19
+	.2byte	0x101
+	.4byte	0x1682
+	.byte	0x10
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x1692
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1a
+	.4byte	.LASF389
+	.byte	0xc
+	.byte	0x19
+	.2byte	0x105
+	.4byte	0x16c7
+	.uleb128 0x1b
+	.4byte	.LASF390
+	.byte	0x19
+	.2byte	0x107
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF391
+	.byte	0x19
+	.2byte	0x108
+	.4byte	0xdc5
+	.byte	0x4
+	.uleb128 0x1d
+	.ascii	"lpa\000"
+	.byte	0x19
+	.2byte	0x109
+	.4byte	0xdc5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x1a
+	.4byte	.LASF392
+	.byte	0xc
+	.byte	0x19
+	.2byte	0x10c
+	.4byte	0x16fc
+	.uleb128 0x1b
+	.4byte	.LASF278
+	.byte	0x19
+	.2byte	0x10e
+	.4byte	0xff2
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF279
+	.byte	0x19
+	.2byte	0x10f
+	.4byte	0xff2
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF393
+	.byte	0x19
+	.2byte	0x110
+	.4byte	0xdc5
+	.byte	0x8
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF394
+	.byte	0x1a
+	.byte	0x12
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_type
+	.uleb128 0x26
+	.4byte	.LASF395
+	.byte	0x1a
+	.byte	0x13
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.uleb128 0x26
+	.4byte	.LASF396
+	.byte	0x1a
+	.byte	0x14
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.uleb128 0x26
+	.4byte	.LASF397
+	.byte	0x1a
+	.byte	0x15
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.uleb128 0x26
+	.4byte	.LASF398
+	.byte	0x1a
+	.byte	0x16
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die_shift
+	.uleb128 0x26
+	.4byte	.LASF399
+	.byte	0x1a
+	.byte	0x17
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_num
+	.uleb128 0x26
+	.4byte	.LASF400
+	.byte	0x1a
+	.byte	0x18
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.uleb128 0x26
+	.4byte	.LASF401
+	.byte	0x1a
+	.byte	0x19
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_ext_blk_pre_plane
+	.uleb128 0x26
+	.4byte	.LASF402
+	.byte	0x1a
+	.byte	0x1a
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_bbm_buf_size
+	.uleb128 0x26
+	.4byte	.LASF403
+	.byte	0x1a
+	.byte	0x1c
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.uleb128 0x26
+	.4byte	.LASF404
+	.byte	0x1a
+	.byte	0x1d
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_slc_blk
+	.uleb128 0x26
+	.4byte	.LASF405
+	.byte	0x1a
+	.byte	0x1e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_super_blk
+	.uleb128 0x26
+	.4byte	.LASF406
+	.byte	0x1a
+	.byte	0x1f
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.uleb128 0x26
+	.4byte	.LASF407
+	.byte	0x1a
+	.byte	0x20
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.uleb128 0x26
+	.4byte	.LASF408
+	.byte	0x1a
+	.byte	0x24
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.uleb128 0x26
+	.4byte	.LASF409
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_oob
+	.uleb128 0x26
+	.4byte	.LASF410
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_reserved_blks
+	.uleb128 0x26
+	.4byte	.LASF411
+	.byte	0x1a
+	.byte	0x27
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_totle_phy_blks
+	.uleb128 0x26
+	.4byte	.LASF412
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.uleb128 0x26
+	.4byte	.LASF413
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.uleb128 0x26
+	.4byte	.LASF414
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_vendor_region_num
+	.uleb128 0x26
+	.4byte	.LASF415
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF416
+	.byte	0x1a
+	.byte	0x2f
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.uleb128 0x26
+	.4byte	.LASF417
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_vendor_blks
+	.uleb128 0x26
+	.4byte	.LASF418
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_vendor_part_size
+	.uleb128 0x26
+	.4byte	.LASF419
+	.byte	0x1a
+	.byte	0x32
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF420
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_init_sys_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF421
+	.byte	0x1a
+	.byte	0x34
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_sys_blks
+	.uleb128 0x26
+	.4byte	.LASF422
+	.byte	0x1a
+	.byte	0x35
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF423
+	.byte	0x1a
+	.byte	0x36
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_op_blks_per_plane
+	.uleb128 0x26
+	.4byte	.LASF424
+	.byte	0x1a
+	.byte	0x37
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_data_blks
+	.uleb128 0x26
+	.4byte	.LASF425
+	.byte	0x1a
+	.byte	0x38
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_power_lost_recovery_flag
+	.uleb128 0x26
+	.4byte	.LASF426
+	.byte	0x1a
+	.byte	0x3a
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalSysVersion
+	.uleb128 0x26
+	.4byte	.LASF427
+	.byte	0x1a
+	.byte	0x3b
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalDataVersion
+	.uleb128 0x26
+	.4byte	.LASF428
+	.byte	0x1a
+	.byte	0x3c
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbaSector
+	.uleb128 0x26
+	.4byte	.LASF429
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLpn
+	.uleb128 0x26
+	.4byte	.LASF430
+	.byte	0x1a
+	.byte	0x3e
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_VaildLpn
+	.uleb128 0x26
+	.4byte	.LASF431
+	.byte	0x1a
+	.byte	0x3f
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbn
+	.uleb128 0x26
+	.4byte	.LASF432
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0xf72
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBbtInfo
+	.uleb128 0x26
+	.4byte	.LASF433
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0xff8
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysInfo
+	.uleb128 0x26
+	.4byte	.LASF434
+	.byte	0x1a
+	.byte	0x43
+	.4byte	0x1595
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.uleb128 0x26
+	.4byte	.LASF435
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x1040
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gL2pMapInfo
+	.uleb128 0x26
+	.4byte	.LASF436
+	.byte	0x1a
+	.byte	0x45
+	.4byte	0x1040
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gVendorBlkInfo
+	.uleb128 0x26
+	.4byte	.LASF437
+	.byte	0x1a
+	.byte	0x46
+	.4byte	0xde6
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_sys
+	.uleb128 0x26
+	.4byte	.LASF438
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_read
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xde6
+	.uleb128 0x26
+	.4byte	.LASF439
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_prgm
+	.uleb128 0x26
+	.4byte	.LASF440
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_erase
+	.uleb128 0x26
+	.4byte	.LASF441
+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc
+	.uleb128 0x26
+	.4byte	.LASF442
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc_dst
+	.uleb128 0x26
+	.4byte	.LASF443
+	.byte	0x1a
+	.byte	0x4d
+	.4byte	0x19f9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_req_cache
+	.uleb128 0xa
+	.4byte	0xdaf
+	.4byte	0x1a64
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF444
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x1a54
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_plane_order_table
+	.uleb128 0x26
+	.4byte	.LASF445
+	.byte	0x1a
+	.byte	0x51
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf
+	.uleb128 0x26
+	.4byte	.LASF446
+	.byte	0x1a
+	.byte	0x52
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf_1
+	.uleb128 0x26
+	.4byte	.LASF447
+	.byte	0x1a
+	.byte	0x53
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_data_buf
+	.uleb128 0x26
+	.4byte	.LASF448
+	.byte	0x1a
+	.byte	0x54
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.uleb128 0x26
+	.4byte	.LASF449
+	.byte	0x1a
+	.byte	0x55
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_0
+	.uleb128 0x26
+	.4byte	.LASF450
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_1
+	.uleb128 0x26
+	.4byte	.LASF451
+	.byte	0x1a
+	.byte	0x57
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_spare_buf
+	.uleb128 0x26
+	.4byte	.LASF452
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_spare_buf
+	.uleb128 0x26
+	.4byte	.LASF453
+	.byte	0x1a
+	.byte	0x59
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_data_buf
+	.uleb128 0x26
+	.4byte	.LASF454
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0x1b1f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_gc_page_buf_info
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x16c7
+	.uleb128 0x26
+	.4byte	.LASF455
+	.byte	0x1a
+	.byte	0x5b
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_gc_page_buf_num
+	.uleb128 0x26
+	.4byte	.LASF456
+	.byte	0x1a
+	.byte	0x5c
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_num_req
+	.uleb128 0x26
+	.4byte	.LASF457
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0x1b58
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_ect_tbl_info
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x112c
+	.uleb128 0x26
+	.4byte	.LASF458
+	.byte	0x1a
+	.byte	0x5e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_info_size
+	.uleb128 0x26
+	.4byte	.LASF459
+	.byte	0x1a
+	.byte	0x5f
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_erase_count_table
+	.uleb128 0x26
+	.4byte	.LASF460
+	.byte	0x1a
+	.byte	0x61
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_swl_mul_table
+	.uleb128 0x26
+	.4byte	.LASF461
+	.byte	0x1a
+	.byte	0x62
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_swl_count
+	.uleb128 0x26
+	.4byte	.LASF462
+	.byte	0x1a
+	.byte	0x63
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.uleb128 0x26
+	.4byte	.LASF463
+	.byte	0x1a
+	.byte	0x64
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_check_table
+	.uleb128 0x26
+	.4byte	.LASF464
+	.byte	0x1a
+	.byte	0x65
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_blk_mode_table
+	.uleb128 0x26
+	.4byte	.LASF465
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_table
+	.uleb128 0x26
+	.4byte	.LASF466
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_valid_page_count
+	.uleb128 0x26
+	.4byte	.LASF467
+	.byte	0x1a
+	.byte	0x69
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_ver_table
+	.uleb128 0x26
+	.4byte	.LASF468
+	.byte	0x1a
+	.byte	0x6a
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_region_ppn_table
+	.uleb128 0x26
+	.4byte	.LASF469
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_map_block
+	.uleb128 0x26
+	.4byte	.LASF470
+	.byte	0x1a
+	.byte	0x6d
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_table
+	.uleb128 0x26
+	.4byte	.LASF471
+	.byte	0x1a
+	.byte	0x6e
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_valid_page_count
+	.uleb128 0x26
+	.4byte	.LASF472
+	.byte	0x1a
+	.byte	0x6f
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_ver_table
+	.uleb128 0x26
+	.4byte	.LASF473
+	.byte	0x1a
+	.byte	0x70
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_region_ppn_table
+	.uleb128 0x26
+	.4byte	.LASF474
+	.byte	0x1a
+	.byte	0x71
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_vendor_block
+	.uleb128 0x26
+	.4byte	.LASF475
+	.byte	0x1a
+	.byte	0x73
+	.4byte	0x1c90
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_ram_map
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x10ef
+	.uleb128 0x26
+	.4byte	.LASF476
+	.byte	0x1a
+	.byte	0x74
+	.4byte	0xff2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_map_buf
+	.uleb128 0x26
+	.4byte	.LASF477
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_l2p_last_update_region_id
+	.uleb128 0x26
+	.4byte	.LASF478
+	.byte	0x1a
+	.byte	0x7c
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1564
+	.uleb128 0x26
+	.4byte	.LASF479
+	.byte	0x1a
+	.byte	0x7d
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_free_data_block_list_head
+	.uleb128 0x26
+	.4byte	.LASF480
+	.byte	0x1a
+	.byte	0x7f
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_head
+	.uleb128 0x26
+	.4byte	.LASF481
+	.byte	0x1a
+	.byte	0x80
+	.4byte	0x1cc9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_tail
+	.uleb128 0x26
+	.4byte	.LASF482
+	.byte	0x1a
+	.byte	0x81
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.uleb128 0x26
+	.4byte	.LASF483
+	.byte	0x1a
+	.byte	0x82
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.uleb128 0x26
+	.4byte	.LASF484
+	.byte	0x1a
+	.byte	0x83
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_active_superblock
+	.uleb128 0x26
+	.4byte	.LASF485
+	.byte	0x1a
+	.byte	0x84
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.uleb128 0x26
+	.4byte	.LASF486
+	.byte	0x1a
+	.byte	0x85
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.uleb128 0x26
+	.4byte	.LASF487
+	.byte	0x1a
+	.byte	0x86
+	.4byte	0x15f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_superblock
+	.uleb128 0x26
+	.4byte	.LASF488
+	.byte	0x1a
+	.byte	0x87
+	.4byte	0x1d79
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_last_act_superblock
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x15f0
+	.uleb128 0x26
+	.4byte	.LASF489
+	.byte	0x1a
+	.byte	0x88
+	.4byte	0x1311
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_save_data
+	.uleb128 0x26
+	.4byte	.LASF490
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x140e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_ext_data
+	.uleb128 0x26
+	.4byte	.LASF491
+	.byte	0x1a
+	.byte	0x8b
+	.4byte	0x1db2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_page_info
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1692
+	.uleb128 0x26
+	.4byte	.LASF492
+	.byte	0x1a
+	.byte	0x8c
+	.4byte	0x10e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_blk_tbl
+	.uleb128 0x26
+	.4byte	.LASF493
+	.byte	0x1a
+	.byte	0x8d
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_num
+	.uleb128 0x26
+	.4byte	.LASF494
+	.byte	0x1a
+	.byte	0x8e
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_page_offset
+	.uleb128 0x26
+	.4byte	.LASF495
+	.byte	0x1a
+	.byte	0x8f
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_valid_pages
+	.uleb128 0x26
+	.4byte	.LASF496
+	.byte	0x1a
+	.byte	0x90
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_max_valid_pages
+	.uleb128 0x26
+	.4byte	.LASF497
+	.byte	0x1a
+	.byte	0x91
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk
+	.uleb128 0x26
+	.4byte	.LASF498
+	.byte	0x1a
+	.byte	0x92
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk_1
+	.uleb128 0x26
+	.4byte	.LASF499
+	.byte	0x1a
+	.byte	0x93
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_num
+	.uleb128 0x26
+	.4byte	.LASF500
+	.byte	0x1a
+	.byte	0x94
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_gc_index
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x1e61
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x10
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF501
+	.byte	0x1a
+	.byte	0x95
+	.4byte	0x1e51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_tbl
+	.uleb128 0x26
+	.4byte	.LASF502
+	.byte	0x1a
+	.byte	0x97
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_free_blk_threshold
+	.uleb128 0x26
+	.4byte	.LASF503
+	.byte	0x1a
+	.byte	0x98
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_merge_free_blk_threshold
+	.uleb128 0x26
+	.4byte	.LASF504
+	.byte	0x1a
+	.byte	0x99
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_index
+	.uleb128 0x26
+	.4byte	.LASF505
+	.byte	0x1a
+	.byte	0x9b
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_gc_page_count
+	.uleb128 0x26
+	.4byte	.LASF506
+	.byte	0x1a
+	.byte	0x9c
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_page_count
+	.uleb128 0x26
+	.4byte	.LASF507
+	.byte	0x1a
+	.byte	0x9d
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_sector
+	.uleb128 0x26
+	.4byte	.LASF508
+	.byte	0x1a
+	.byte	0x9e
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_sector
+	.uleb128 0x26
+	.4byte	.LASF509
+	.byte	0x1a
+	.byte	0xa0
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_discard_page_count
+	.uleb128 0x26
+	.4byte	.LASF510
+	.byte	0x1a
+	.byte	0xa1
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_page_count
+	.uleb128 0x26
+	.4byte	.LASF511
+	.byte	0x1a
+	.byte	0xa2
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_tmp_data_superblock_id
+	.uleb128 0x26
+	.4byte	.LASF512
+	.byte	0x1a
+	.byte	0xa3
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_cache_write_count
+	.uleb128 0x26
+	.4byte	.LASF513
+	.byte	0x1a
+	.byte	0xa4
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_l2p_write_count
+	.uleb128 0x26
+	.4byte	.LASF514
+	.byte	0x1a
+	.byte	0xa6
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_mlc_erase_count
+	.uleb128 0x26
+	.4byte	.LASF515
+	.byte	0x1a
+	.byte	0xa7
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_avg_erase_count
+	.uleb128 0x26
+	.4byte	.LASF516
+	.byte	0x1a
+	.byte	0xa8
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_min_erase_count
+	.uleb128 0x26
+	.4byte	.LASF517
+	.byte	0x1a
+	.byte	0xa9
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_slc_erase_count
+	.uleb128 0x26
+	.4byte	.LASF518
+	.byte	0x1a
+	.byte	0xaa
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_sys_slc_erase_count
+	.uleb128 0x26
+	.4byte	.LASF519
+	.byte	0x1a
+	.byte	0xab
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_max_erase_count
+	.uleb128 0x26
+	.4byte	.LASF520
+	.byte	0x1a
+	.byte	0xac
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_gc_progress
+	.uleb128 0x26
+	.4byte	.LASF521
+	.byte	0x1a
+	.byte	0xad
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_swl_replace
+	.uleb128 0x26
+	.4byte	.LASF522
+	.byte	0x1a
+	.byte	0xae
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ftl_nand_free_count
+	.uleb128 0x26
+	.4byte	.LASF523
+	.byte	0x1a
+	.byte	0xaf
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block
+	.uleb128 0x26
+	.4byte	.LASF524
+	.byte	0x1a
+	.byte	0xb0
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block_count
+	.uleb128 0x26
+	.4byte	.LASF525
+	.byte	0x1a
+	.byte	0xb1
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_skip_write_count
+	.uleb128 0x26
+	.4byte	.LASF526
+	.byte	0x1a
+	.byte	0xb2
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_cur_erase_blk
+	.uleb128 0x26
+	.4byte	.LASF527
+	.byte	0x1a
+	.byte	0xb4
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_num
+	.uleb128 0x26
+	.4byte	.LASF528
+	.byte	0x1a
+	.byte	0xb5
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_min_ver
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x204d
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x26
+	.4byte	.LASF529
+	.byte	0x1a
+	.byte	0xb6
+	.4byte	0x203d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_ppa_tbl
+	.uleb128 0x26
+	.4byte	.LASF530
+	.byte	0x1a
+	.byte	0xb7
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_mlc_erase_count_value
+	.uleb128 0x26
+	.4byte	.LASF531
+	.byte	0x1a
+	.byte	0xb8
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_power_lost_recovery_flag
+	.uleb128 0x4
+	.4byte	.LASF532
+	.byte	0x17
+	.byte	0x14
+	.4byte	0xe35
+	.uleb128 0x4
+	.4byte	.LASF533
+	.byte	0x17
+	.byte	0x15
+	.4byte	0xe35
+	.uleb128 0x4
+	.4byte	.LASF534
+	.byte	0x17
+	.byte	0x16
+	.4byte	0xed7
+	.uleb128 0xa
+	.4byte	0xb5
+	.4byte	0x20b2
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF535
+	.byte	0x17
+	.byte	0x17
+	.4byte	0x20a1
+	.uleb128 0x26
+	.4byte	.LASF536
+	.byte	0x3
+	.byte	0x6
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DeviceCapacity
+	.uleb128 0x26
+	.4byte	.LASF537
+	.byte	0x3
+	.byte	0x7
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFtlInitStatus
+	.uleb128 0x4
+	.4byte	.LASF538
+	.byte	0x3
+	.byte	0x6d
+	.4byte	0xdc5
+	.uleb128 0x4
+	.4byte	.LASF539
+	.byte	0x3
+	.byte	0x6e
+	.4byte	0xdc5
+	.uleb128 0x4
+	.4byte	.LASF540
+	.byte	0x3
+	.byte	0x6f
+	.4byte	0xdc5
+	.uleb128 0x4
+	.4byte	.LASF541
+	.byte	0x3
+	.byte	0x70
+	.4byte	0xdc5
+	.uleb128 0x27
+	.4byte	.LASF542
+	.byte	0x3
+	.2byte	0x3c0
+	.4byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	power_up_flag
+	.uleb128 0x28
+	.4byte	.LASF546
+	.byte	0x3
+	.2byte	0x483
+	.4byte	0xdc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_discard_updated
+	.uleb128 0x27
+	.4byte	.LASF543
+	.byte	0x2
+	.2byte	0x35b
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_power_up_flush
+	.uleb128 0x27
+	.4byte	.LASF544
+	.byte	0x2
+	.2byte	0x370
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlUpdateVaildLpnCount
+	.uleb128 0xa
+	.4byte	0xdba
+	.4byte	0x2164
+	.uleb128 0x15
+	.4byte	0xd6
+	.2byte	0x1fff
+	.byte	0
+	.uleb128 0x27
+	.4byte	.LASF545
+	.byte	0x2
+	.2byte	0x8ad
+	.4byte	0x2153
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	check_vpc_table
+	.uleb128 0x29
+	.4byte	.LASF547
+	.byte	0x5
+	.byte	0x6d
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_block_bops_scan_page_addr
+	.uleb128 0x27
+	.4byte	.LASF548
+	.byte	0x5
+	.2byte	0x1d4
+	.4byte	0xdba
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_ink_free_return_value
+	.uleb128 0xc
+	.4byte	.LASF549
+	.byte	0x1b
+	.2byte	0x3ba
+	.4byte	0x107
+	.uleb128 0xc
+	.4byte	.LASF550
+	.byte	0x1b
+	.2byte	0x3bb
+	.4byte	0x107
+	.uleb128 0xc
+	.4byte	.LASF551
+	.byte	0x1b
+	.2byte	0x3bc
+	.4byte	0x107
+	.uleb128 0xf
+	.4byte	.LASF552
+	.byte	0x4
+	.byte	0x1c
+	.byte	0xc
+	.4byte	0x21d6
+	.uleb128 0x16
+	.ascii	"pid\000"
+	.byte	0x1c
+	.byte	0xd
+	.4byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF553
+	.byte	0x1c
+	.byte	0x10
+	.4byte	0x21e1
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x21bd
+	.uleb128 0x2a
+	.4byte	0x208b
+	.byte	0x1
+	.byte	0x10
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_nand_phy_info
+	.uleb128 0x2a
+	.4byte	0x2096
+	.byte	0x1
+	.byte	0x11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_nand_ops
+	.uleb128 0x29
+	.4byte	.LASF554
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x20a1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	check_buf
+	.uleb128 0x2a
+	.4byte	0x20b2
+	.byte	0x1
+	.byte	0x14
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_temp_buf
+	.uleb128 0xa
+	.4byte	0xb5
+	.4byte	0x222f
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x29
+	.4byte	.LASF555
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x221f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	check_spare_buf
+	.uleb128 0x2b
+	.4byte	.LASF558
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x50
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x22a6
+	.uleb128 0x2c
+	.4byte	.LASF556
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x128
+	.4byte	.LLST453
+	.uleb128 0x2c
+	.4byte	.LASF557
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x128
+	.4byte	.LLST454
+	.uleb128 0x2c
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x7b
+	.4byte	.LLST455
+	.uleb128 0x2d
+	.4byte	.LVL2076
+	.4byte	0x91ff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF559
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x128
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x230c
+	.uleb128 0x2c
+	.4byte	.LASF560
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x128
+	.4byte	.LLST285
+	.uleb128 0x2c
+	.4byte	.LASF561
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x16b
+	.4byte	.LLST286
+	.uleb128 0x2c
+	.4byte	.LASF30
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x7b
+	.4byte	.LLST287
+	.uleb128 0x2d
+	.4byte	.LVL1160
+	.4byte	0x920a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF562
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x128
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x236c
+	.uleb128 0x2f
+	.ascii	"s\000"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x128
+	.4byte	.LLST189
+	.uleb128 0x2f
+	.ascii	"c\000"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x50
+	.4byte	.LLST190
+	.uleb128 0x2f
+	.ascii	"n\000"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x7b
+	.4byte	.LLST191
+	.uleb128 0x2d
+	.4byte	.LVL696
+	.4byte	0x9216
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF563
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xaa
+	.4byte	.LFB347
+	.4byte	.LFE347-.LFB347
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2410
+	.uleb128 0x2c
+	.4byte	.LASF564
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xf28
+	.4byte	.LLST282
+	.uleb128 0x2f
+	.ascii	"die\000"
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xb5
+	.4byte	.LLST283
+	.uleb128 0x30
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0x9f
+	.4byte	.LLST284
+	.uleb128 0x31
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0x9f
+	.uleb128 0x32
+	.4byte	.LVL1152
+	.4byte	0x230c
+	.4byte	0x23dc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x100
+	.byte	0
+	.uleb128 0x33
+	.4byte	.LVL1153
+	.4byte	0x23f2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1156
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x100
+	.byte	0
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF586
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0xdd0
+	.byte	0x1
+	.4byte	0x2454
+	.uleb128 0x36
+	.4byte	.LASF577
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0xdba
+	.uleb128 0x31
+	.ascii	"sts\000"
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0xdd0
+	.uleb128 0x37
+	.4byte	.LASF565
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x2454
+	.uleb128 0x31
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xde6
+	.uleb128 0x38
+	.ascii	"out\000"
+	.byte	0x1
+	.byte	0xd6
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdc5
+	.4byte	0x2464
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF566
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xaa
+	.4byte	.LFB345
+	.4byte	.LFE345-.LFB345
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x251a
+	.uleb128 0x2c
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0x128
+	.4byte	.LLST170
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xb5
+	.4byte	.LLST171
+	.uleb128 0x2c
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xb5
+	.4byte	.LLST172
+	.uleb128 0x3a
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x3a
+	.ascii	"cs\000"
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x30
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.4byte	.LLST173
+	.uleb128 0x29
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x3b
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0xad
+	.4byte	0x19f9
+	.4byte	.LLST174
+	.uleb128 0x29
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0xae
+	.4byte	0xb5
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x34
+	.4byte	.LVL628
+	.4byte	0x83c6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x3c
+	.4byte	0x27c7
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 -4
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF572
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xaa
+	.4byte	.LFB344
+	.4byte	.LFE344-.LFB344
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26a4
+	.uleb128 0x2c
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0x128
+	.4byte	.LLST162
+	.uleb128 0x2c
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb5
+	.4byte	.LLST163
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb5
+	.4byte	.LLST164
+	.uleb128 0x2c
+	.4byte	.LASF573
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb5
+	.4byte	.LLST165
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.4byte	.LLST166
+	.uleb128 0x3a
+	.ascii	"cs\000"
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x30
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.4byte	.LLST167
+	.uleb128 0x29
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x30
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0x71
+	.4byte	0xb5
+	.4byte	.LLST168
+	.uleb128 0x3b
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x72
+	.4byte	0x19f9
+	.4byte	.LLST169
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10324
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x88
+	.4byte	0x264b
+	.uleb128 0x29
+	.4byte	.LASF575
+	.byte	0x1
+	.byte	0x8d
+	.4byte	0xde6
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x32
+	.4byte	.LVL616
+	.4byte	0x26b9
+	.4byte	0x2609
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL617
+	.4byte	0x9222
+	.4byte	0x2620
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC79
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL618
+	.4byte	0x9222
+	.4byte	0x2637
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC80
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL619
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC81
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL609
+	.4byte	0x9222
+	.4byte	0x2671
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR110
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x76
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL610
+	.4byte	0x83c6
+	.4byte	0x2693
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x3c
+	.4byte	0x27c7
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LVL611
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x3f
+	.4byte	.LVL613
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x26b4
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xe
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x26a4
+	.uleb128 0x2b
+	.4byte	.LASF576
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xaa
+	.4byte	.LFB343
+	.4byte	.LFE343-.LFB343
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x27b7
+	.uleb128 0x2c
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0x50
+	.4byte	0x128
+	.4byte	.LLST151
+	.uleb128 0x2c
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xb5
+	.4byte	.LLST152
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xb5
+	.4byte	.LLST153
+	.uleb128 0x3a
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x3a
+	.ascii	"cs\000"
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x30
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.4byte	.LLST154
+	.uleb128 0x29
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x29
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0x53
+	.4byte	0xb5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x3a
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x54
+	.4byte	0x19f9
+	.uleb128 0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10307
+	.uleb128 0x32
+	.4byte	.LVL566
+	.4byte	0x9222
+	.4byte	0x2784
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR106
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x58
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL567
+	.4byte	0x83c6
+	.4byte	0x27a6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x3c
+	.4byte	0x27c7
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LVL568
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x3f
+	.4byte	.LVL570
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x40
+	.4byte	.LASF883
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xb5
+	.byte	0x1
+	.4byte	0x2836
+	.uleb128 0x41
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x36
+	.4byte	0x19f9
+	.uleb128 0x36
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xe2f
+	.uleb128 0x36
+	.4byte	.LASF578
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xe2f
+	.uleb128 0x37
+	.4byte	.LASF579
+	.byte	0x1
+	.byte	0x38
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF580
+	.byte	0x1
+	.byte	0x38
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF285
+	.byte	0x1
+	.byte	0x39
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF286
+	.byte	0x1
+	.byte	0x39
+	.4byte	0x9f
+	.uleb128 0x37
+	.4byte	.LASF581
+	.byte	0x1
+	.byte	0x3a
+	.4byte	0xb5
+	.uleb128 0x37
+	.4byte	.LASF277
+	.byte	0x1
+	.byte	0x3b
+	.4byte	0xb5
+	.uleb128 0x37
+	.4byte	.LASF582
+	.byte	0x1
+	.byte	0x3c
+	.4byte	0xb5
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF619
+	.byte	0x1
+	.byte	0x1c
+	.4byte	.LFB341
+	.4byte	.LFE341-.LFB341
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2922
+	.uleb128 0x2f
+	.ascii	"s\000"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0xf6
+	.4byte	.LLST142
+	.uleb128 0x2f
+	.ascii	"buf\000"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x128
+	.4byte	.LLST143
+	.uleb128 0x2c
+	.4byte	.LASF583
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x50
+	.4byte	.LLST144
+	.uleb128 0x2f
+	.ascii	"len\000"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x50
+	.4byte	.LLST145
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0xb5
+	.4byte	.LLST146
+	.uleb128 0x3b
+	.ascii	"j\000"
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0xb5
+	.4byte	.LLST147
+	.uleb128 0x3b
+	.ascii	"p8\000"
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0xf6
+	.4byte	.LLST148
+	.uleb128 0x3b
+	.ascii	"p16\000"
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x2922
+	.4byte	.LLST149
+	.uleb128 0x3b
+	.ascii	"p32\000"
+	.byte	0x1
+	.byte	0x21
+	.4byte	0xe2f
+	.4byte	.LLST150
+	.uleb128 0x43
+	.4byte	.LVL555
+	.4byte	0x9222
+	.4byte	0x28e2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC78
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL556
+	.4byte	0x9222
+	.4byte	0x2905
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC75
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL558
+	.4byte	0x9222
+	.uleb128 0x34
+	.4byte	.LVL560
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC78
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x69
+	.uleb128 0x2b
+	.4byte	.LASF584
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x128
+	.4byte	.LFB340
+	.4byte	.LFE340-.LFB340
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2967
+	.uleb128 0x2c
+	.4byte	.LASF30
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x50
+	.4byte	.LLST141
+	.uleb128 0x2d
+	.4byte	.LVL550
+	.4byte	0x922d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF585
+	.byte	0x5
+	.2byte	0x2f8
+	.4byte	0xb5
+	.4byte	.LFB323
+	.4byte	.LFE323-.LFB323
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2996
+	.uleb128 0x2d
+	.4byte	.LVL1812
+	.4byte	0x2996
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF587
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2a63
+	.uleb128 0x47
+	.4byte	.LASF588
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0xdc5
+	.uleb128 0x47
+	.4byte	.LASF589
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF590
+	.byte	0x5
+	.2byte	0x1d7
+	.4byte	0xdba
+	.uleb128 0x49
+	.ascii	"lpa\000"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdc5
+	.uleb128 0x49
+	.ascii	"ppa\000"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF591
+	.byte	0x5
+	.2byte	0x1d9
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF299
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF593
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF594
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF595
+	.byte	0x5
+	.2byte	0x1db
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x1dc
+	.4byte	0x2a63
+	.uleb128 0x4a
+	.4byte	.LASF597
+	.byte	0x5
+	.2byte	0x276
+	.uleb128 0x4a
+	.4byte	.LASF598
+	.byte	0x5
+	.2byte	0x279
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x2a79
+	.4byte	.LASF587
+	.uleb128 0x4c
+	.uleb128 0x48
+	.4byte	.LASF599
+	.byte	0x5
+	.2byte	0x1f3
+	.4byte	0xdba
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1229
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x2a79
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x16
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x2a69
+	.uleb128 0x46
+	.4byte	.LASF600
+	.byte	0x5
+	.2byte	0x1a2
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2ade
+	.uleb128 0x49
+	.ascii	"ret\000"
+	.byte	0x5
+	.2byte	0x1a4
+	.4byte	0x50
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x1a5
+	.4byte	0x50
+	.uleb128 0x49
+	.ascii	"ppa\000"
+	.byte	0x5
+	.2byte	0x1a6
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF565
+	.byte	0x5
+	.2byte	0x1a7
+	.4byte	0x2454
+	.uleb128 0x4d
+	.4byte	0x2acf
+	.uleb128 0x48
+	.4byte	.LASF601
+	.byte	0x5
+	.2byte	0x1b1
+	.4byte	0xde6
+	.byte	0
+	.uleb128 0x4c
+	.uleb128 0x48
+	.4byte	.LASF602
+	.byte	0x5
+	.2byte	0x1c6
+	.4byte	0xdc5
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF603
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x2b28
+	.uleb128 0x47
+	.4byte	.LASF604
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x187
+	.4byte	0xdba
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdba
+	.uleb128 0x49
+	.ascii	"j\000"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x189
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x4e
+	.4byte	.LASF714
+	.byte	0x5
+	.2byte	0x17a
+	.4byte	0x50
+	.byte	0x1
+	.uleb128 0x45
+	.4byte	.LASF605
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0x50
+	.4byte	.LFB318
+	.4byte	.LFE318-.LFB318
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2bbf
+	.uleb128 0x4f
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0xdba
+	.4byte	.LLST138
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x168
+	.4byte	0xdba
+	.4byte	.LLST139
+	.uleb128 0x51
+	.4byte	.LASF606
+	.byte	0x5
+	.2byte	0x169
+	.4byte	0xdba
+	.4byte	.LLST140
+	.uleb128 0x32
+	.4byte	.LVL537
+	.4byte	0x6122
+	.4byte	0x2b91
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL539
+	.4byte	0x9222
+	.4byte	0x2bae
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC74
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL540
+	.4byte	0x2bbf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF607
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0x50
+	.4byte	.LFB317
+	.4byte	.LFE317-.LFB317
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2c03
+	.uleb128 0x4f
+	.4byte	.LASF608
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0xdba
+	.4byte	.LLST137
+	.uleb128 0x34
+	.4byte	.LVL535
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC73
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF609
+	.byte	0x5
+	.2byte	0x13b
+	.4byte	0xdc5
+	.4byte	.LFB316
+	.4byte	.LFE316-.LFB316
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2ca7
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x5
+	.2byte	0x13d
+	.4byte	0xdba
+	.4byte	.LLST394
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x13e
+	.4byte	0x2a63
+	.4byte	.LLST395
+	.uleb128 0x32
+	.4byte	.LVL1697
+	.4byte	0x251a
+	.4byte	0x2c55
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1698
+	.4byte	0x3183
+	.4byte	0x2c6f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1699
+	.4byte	0x2edb
+	.4byte	0x2c82
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1701
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1702
+	.4byte	0x65f0
+	.uleb128 0x44
+	.4byte	.LVL1703
+	.4byte	0x2e94
+	.uleb128 0x44
+	.4byte	.LVL1705
+	.4byte	0x308c
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF610
+	.byte	0x5
+	.2byte	0x12b
+	.4byte	0xdc5
+	.4byte	.LFB315
+	.4byte	.LFE315-.LFB315
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2d2c
+	.uleb128 0x44
+	.4byte	.LVL1706
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1707
+	.4byte	0x2edb
+	.4byte	0x2cde
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1708
+	.4byte	0x34ac
+	.4byte	0x2cf2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1709
+	.4byte	0x5313
+	.uleb128 0x32
+	.4byte	.LVL1710
+	.4byte	0x4f7f
+	.4byte	0x2d0f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1711
+	.4byte	0x4d0e
+	.uleb128 0x2d
+	.4byte	.LVL1712
+	.4byte	0x32d7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR53
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.4byte	.LASF670
+	.byte	0x5
+	.2byte	0x120
+	.byte	0x1
+	.uleb128 0x2b
+	.4byte	.LASF611
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdc5
+	.4byte	.LFB313
+	.4byte	.LFE313-.LFB313
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2e94
+	.uleb128 0x2c
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0x1d79
+	.4byte	.LLST269
+	.uleb128 0x2c
+	.4byte	.LASF613
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdc5
+	.4byte	.LLST270
+	.uleb128 0x30
+	.4byte	.LASF594
+	.byte	0x5
+	.byte	0xd4
+	.4byte	0xdba
+	.4byte	.LLST271
+	.uleb128 0x30
+	.4byte	.LASF569
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdba
+	.4byte	.LLST272
+	.uleb128 0x3b
+	.ascii	"req\000"
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdba
+	.4byte	.LLST273
+	.uleb128 0x30
+	.4byte	.LASF592
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdba
+	.4byte	.LLST274
+	.uleb128 0x30
+	.4byte	.LASF382
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdba
+	.4byte	.LLST275
+	.uleb128 0x30
+	.4byte	.LASF380
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdba
+	.4byte	.LLST276
+	.uleb128 0x30
+	.4byte	.LASF614
+	.byte	0x5
+	.byte	0xd7
+	.4byte	0xdc5
+	.4byte	.LLST277
+	.uleb128 0x30
+	.4byte	.LASF615
+	.byte	0x5
+	.byte	0xd8
+	.4byte	0xdc5
+	.4byte	.LLST278
+	.uleb128 0x53
+	.4byte	.LASF616
+	.byte	0x5
+	.byte	0xd9
+	.4byte	0xdc5
+	.sleb128 -1
+	.uleb128 0x30
+	.4byte	.LASF596
+	.byte	0x5
+	.byte	0xda
+	.4byte	0x2a63
+	.4byte	.LLST279
+	.uleb128 0x54
+	.4byte	.LASF617
+	.byte	0x5
+	.byte	0xe1
+	.uleb128 0x54
+	.4byte	.LASF618
+	.byte	0x5
+	.byte	0xe5
+	.uleb128 0x55
+	.4byte	.LASF688
+	.byte	0x5
+	.2byte	0x117
+	.4byte	.L976
+	.uleb128 0x44
+	.4byte	.LVL1098
+	.4byte	0x2e94
+	.uleb128 0x32
+	.4byte	.LVL1107
+	.4byte	0x26b9
+	.4byte	0x2e43
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1120
+	.4byte	0x615a
+	.4byte	0x2e5e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1126
+	.4byte	0x468d
+	.4byte	0x2e78
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1129
+	.4byte	0x308c
+	.uleb128 0x44
+	.4byte	.LVL1133
+	.4byte	0x5d9a
+	.uleb128 0x44
+	.4byte	.LVL1135
+	.4byte	0x2e94
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF620
+	.byte	0x5
+	.byte	0xc9
+	.4byte	.LFB312
+	.4byte	.LFE312-.LFB312
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2edb
+	.uleb128 0x32
+	.4byte	.LVL1093
+	.4byte	0x230c
+	.4byte	0x2ebd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1094
+	.4byte	0x230c
+	.4byte	0x2ed1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x56
+	.4byte	.LVL1095
+	.4byte	0x31cf
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF621
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x50
+	.4byte	.LFB311
+	.4byte	.LFE311-.LFB311
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3077
+	.uleb128 0x2c
+	.4byte	.LASF622
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x50
+	.4byte	.LLST389
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdba
+	.4byte	.LLST390
+	.uleb128 0x30
+	.4byte	.LASF623
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdba
+	.4byte	.LLST391
+	.uleb128 0x29
+	.4byte	.LASF624
+	.byte	0x5
+	.byte	0x72
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x30
+	.4byte	.LASF625
+	.byte	0x5
+	.byte	0x73
+	.4byte	0xdc5
+	.4byte	.LLST392
+	.uleb128 0x29
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0x74
+	.4byte	0x1d79
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.byte	0x9f
+	.uleb128 0x30
+	.4byte	.LASF626
+	.byte	0x5
+	.byte	0x75
+	.4byte	0x1db2
+	.4byte	.LLST393
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3087
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9940
+	.uleb128 0x32
+	.4byte	.LVL1660
+	.4byte	0x2d35
+	.4byte	0x2f80
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1661
+	.4byte	0x4f7f
+	.4byte	0x2f93
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1662
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1663
+	.4byte	0x65f0
+	.uleb128 0x44
+	.4byte	.LVL1667
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1668
+	.4byte	0x9222
+	.4byte	0x2fd4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR173
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1670
+	.4byte	0x31f2
+	.4byte	0x2fe8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1671
+	.4byte	0x5d75
+	.uleb128 0x44
+	.4byte	.LVL1673
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL1674
+	.4byte	0x4d0e
+	.uleb128 0x32
+	.4byte	.LVL1677
+	.4byte	0x9222
+	.4byte	0x3029
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR173
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1678
+	.4byte	0x5212
+	.4byte	0x3042
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1679
+	.4byte	0x6122
+	.uleb128 0x32
+	.4byte	.LVL1681
+	.4byte	0x5212
+	.4byte	0x3064
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1683
+	.4byte	0x31f2
+	.uleb128 0x44
+	.4byte	.LVL1687
+	.4byte	0x5d9a
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3087
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x12
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3077
+	.uleb128 0x42
+	.4byte	.LASF627
+	.byte	0x5
+	.byte	0x54
+	.4byte	.LFB310
+	.4byte	.LFE310-.LFB310
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3101
+	.uleb128 0x2c
+	.4byte	.LASF628
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdc5
+	.4byte	.LLST132
+	.uleb128 0x2c
+	.4byte	.LASF391
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdc5
+	.4byte	.LLST133
+	.uleb128 0x2f
+	.ascii	"lpa\000"
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdc5
+	.4byte	.LLST134
+	.uleb128 0x30
+	.4byte	.LASF629
+	.byte	0x5
+	.byte	0x56
+	.4byte	0xdba
+	.4byte	.LLST135
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x57
+	.4byte	0xdba
+	.4byte	.LLST136
+	.uleb128 0x34
+	.4byte	.LVL527
+	.4byte	0x6122
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF630
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdc5
+	.4byte	.LFB309
+	.4byte	.LFE309-.LFB309
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3137
+	.uleb128 0x2f
+	.ascii	"blk\000"
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdba
+	.4byte	.LLST130
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x4b
+	.4byte	0xdba
+	.4byte	.LLST131
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF631
+	.byte	0x5
+	.byte	0x38
+	.4byte	.LFB308
+	.4byte	.LFE308-.LFB308
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3183
+	.uleb128 0x57
+	.ascii	"req\000"
+	.byte	0x5
+	.byte	0x38
+	.4byte	0x19f9
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x58
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x38
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x3a
+	.4byte	0xdba
+	.4byte	.LLST128
+	.uleb128 0x30
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x3b
+	.4byte	0xdba
+	.4byte	.LLST129
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF634
+	.byte	0x5
+	.byte	0x29
+	.4byte	.LFB307
+	.4byte	.LFE307-.LFB307
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x31cf
+	.uleb128 0x57
+	.ascii	"req\000"
+	.byte	0x5
+	.byte	0x29
+	.4byte	0x19f9
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x58
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x29
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x2b
+	.4byte	0xdba
+	.4byte	.LLST126
+	.uleb128 0x30
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x2c
+	.4byte	0xdba
+	.4byte	.LLST127
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF635
+	.byte	0x5
+	.byte	0x15
+	.4byte	.LFB306
+	.4byte	.LFE306-.LFB306
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x31f2
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x17
+	.4byte	0xdba
+	.4byte	.LLST125
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF636
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0x50
+	.4byte	.LFB305
+	.4byte	.LFE305-.LFB305
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3282
+	.uleb128 0x4f
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0xdba
+	.4byte	.LLST307
+	.uleb128 0x50
+	.ascii	"ret\000"
+	.byte	0x2
+	.2byte	0xa95
+	.4byte	0x50
+	.4byte	.LLST308
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3292
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9870
+	.uleb128 0x32
+	.4byte	.LVL1257
+	.4byte	0x9222
+	.4byte	0x3258
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC98
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1261
+	.4byte	0x9222
+	.4byte	0x3278
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR160
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1264
+	.4byte	0x3297
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3292
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x13
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3282
+	.uleb128 0x46
+	.4byte	.LASF637
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x32c2
+	.uleb128 0x47
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0xdba
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.4byte	.LASF637
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x32d2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xf
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x32c2
+	.uleb128 0x45
+	.4byte	.LASF638
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0xdc5
+	.4byte	.LFB303
+	.4byte	.LFE303-.LFB303
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x33c9
+	.uleb128 0x4f
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0x1d79
+	.4byte	.LLST122
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0xa60
+	.4byte	0xdba
+	.4byte	.LLST123
+	.uleb128 0x51
+	.4byte	.LASF640
+	.byte	0x2
+	.2byte	0xa61
+	.4byte	0xdc5
+	.4byte	.LLST124
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3087
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9850
+	.uleb128 0x32
+	.4byte	.LVL490
+	.4byte	0x9222
+	.4byte	0x3357
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa63
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL491
+	.4byte	0x9222
+	.4byte	0x337e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa64
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL492
+	.4byte	0x9222
+	.4byte	0x33a5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa65
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL496
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa7a
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF641
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x50
+	.4byte	.LFB302
+	.4byte	.LFE302-.LFB302
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3497
+	.uleb128 0x4f
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x1d79
+	.4byte	.LLST374
+	.uleb128 0x28
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa48
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x34a7
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9843
+	.uleb128 0x32
+	.4byte	.LVL1593
+	.4byte	0x9222
+	.4byte	0x3437
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR169
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa49
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1594
+	.4byte	0x5d75
+	.4byte	0x344b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1595
+	.4byte	0x3297
+	.uleb128 0x32
+	.4byte	.LVL1596
+	.4byte	0x34ac
+	.4byte	0x3468
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1597
+	.4byte	0x5313
+	.uleb128 0x32
+	.4byte	.LVL1598
+	.4byte	0x4f7f
+	.4byte	0x3484
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1599
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL1601
+	.4byte	0x5d9a
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x34a7
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3497
+	.uleb128 0x59
+	.4byte	.LASF642
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x50
+	.4byte	.LFB301
+	.4byte	.LFE301-.LFB301
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3747
+	.uleb128 0x5a
+	.ascii	"p\000"
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x1d79
+	.4byte	.LLST292
+	.uleb128 0x51
+	.4byte	.LASF643
+	.byte	0x2
+	.2byte	0x9e4
+	.4byte	0xdba
+	.4byte	.LLST293
+	.uleb128 0x48
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.4byte	.LLST294
+	.uleb128 0x50
+	.ascii	"n\000"
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.4byte	.LLST295
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdba
+	.4byte	.LLST296
+	.uleb128 0x51
+	.4byte	.LASF644
+	.byte	0x2
+	.2byte	0x9e6
+	.4byte	0x50
+	.4byte	.LLST297
+	.uleb128 0x51
+	.4byte	.LASF645
+	.byte	0x2
+	.2byte	0x9e7
+	.4byte	0xdba
+	.4byte	.LLST298
+	.uleb128 0x4a
+	.4byte	.LASF646
+	.byte	0x2
+	.2byte	0x9e8
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3757
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9822
+	.uleb128 0x5b
+	.4byte	0x4ad9
+	.4byte	.LBB243
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x2
+	.2byte	0xa18
+	.4byte	0x3593
+	.uleb128 0x5c
+	.4byte	0x4af2
+	.4byte	.LLST299
+	.uleb128 0x5c
+	.4byte	0x4ae6
+	.4byte	.LLST300
+	.uleb128 0x34
+	.4byte	.LVL1213
+	.4byte	0x8420
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x3c
+	.4byte	0x4af2
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1184
+	.4byte	0x9222
+	.4byte	0x35ba
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9e9
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1188
+	.4byte	0x5b5f
+	.4byte	0x35d1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR47
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1190
+	.4byte	0x9222
+	.4byte	0x35f8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9f2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1191
+	.4byte	0x3ec7
+	.4byte	0x360c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1192
+	.4byte	0x5d75
+	.4byte	0x3620
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1193
+	.4byte	0x9222
+	.4byte	0x3647
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9fd
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1196
+	.4byte	0x9222
+	.4byte	0x366e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa00
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1198
+	.4byte	0x9222
+	.4byte	0x3695
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0b
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1199
+	.4byte	0x9222
+	.4byte	0x36bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0d
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1200
+	.4byte	0x4ad9
+	.4byte	0x36d5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1204
+	.4byte	0x2464
+	.4byte	0x36e9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1206
+	.4byte	0x38bf
+	.4byte	0x36fd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1207
+	.4byte	0x65f0
+	.uleb128 0x32
+	.4byte	.LVL1208
+	.4byte	0x5d75
+	.4byte	0x371a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1218
+	.4byte	0x6828
+	.uleb128 0x34
+	.4byte	.LVL1222
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR158
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa42
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3757
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x18
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3747
+	.uleb128 0x46
+	.4byte	.LASF647
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x377a
+	.uleb128 0x47
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF648
+	.byte	0x2
+	.2byte	0x98e
+	.4byte	0xdba
+	.4byte	.LFB299
+	.4byte	.LFE299-.LFB299
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x383b
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x990
+	.4byte	0xdba
+	.4byte	.LLST113
+	.uleb128 0x51
+	.4byte	.LASF650
+	.byte	0x2
+	.2byte	0x991
+	.4byte	0xdba
+	.4byte	.LLST114
+	.uleb128 0x51
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x992
+	.4byte	0xdba
+	.4byte	.LLST115
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x993
+	.4byte	0x1cc9
+	.4byte	.LLST116
+	.uleb128 0x51
+	.4byte	.LASF653
+	.byte	0x2
+	.2byte	0x994
+	.4byte	0xdba
+	.4byte	.LLST117
+	.uleb128 0x51
+	.4byte	.LASF654
+	.byte	0x2
+	.2byte	0x995
+	.4byte	0xdba
+	.4byte	.LLST118
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x996
+	.4byte	0xdc5
+	.4byte	.LLST119
+	.uleb128 0x44
+	.4byte	.LVL470
+	.4byte	0x383b
+	.uleb128 0x44
+	.4byte	.LVL476
+	.4byte	0x3894
+	.uleb128 0x34
+	.4byte	.LVL478
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC72
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF655
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdba
+	.4byte	.LFB298
+	.4byte	.LFE298-.LFB298
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3894
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdba
+	.4byte	.LLST102
+	.uleb128 0x51
+	.4byte	.LASF656
+	.byte	0x2
+	.2byte	0x97b
+	.4byte	0xdba
+	.4byte	.LLST103
+	.uleb128 0x51
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x97c
+	.4byte	0xdba
+	.4byte	.LLST104
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x97d
+	.4byte	0xdba
+	.4byte	.LLST105
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF657
+	.byte	0x2
+	.2byte	0x970
+	.4byte	0xdba
+	.4byte	.LFB297
+	.4byte	.LFE297-.LFB297
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x38bf
+	.uleb128 0x51
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x972
+	.4byte	0xdba
+	.4byte	.LLST101
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF658
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0x50
+	.4byte	.LFB296
+	.4byte	.LFE296-.LFB296
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3937
+	.uleb128 0x4f
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0xdba
+	.4byte	.LLST97
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdba
+	.4byte	.LLST98
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdba
+	.4byte	.LLST99
+	.uleb128 0x51
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x963
+	.4byte	0xdba
+	.4byte	.LLST100
+	.uleb128 0x32
+	.4byte	.LVL284
+	.4byte	0x6192
+	.4byte	0x392d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL285
+	.4byte	0x67c5
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF659
+	.byte	0x2
+	.2byte	0x901
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x3961
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x903
+	.4byte	0x50
+	.uleb128 0x4c
+	.uleb128 0x48
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x928
+	.4byte	0x1d79
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF660
+	.byte	0x2
+	.2byte	0x8e2
+	.4byte	.LFB294
+	.4byte	.LFE294-.LFB294
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3a30
+	.uleb128 0x5e
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x8e4
+	.4byte	0x50
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x5e
+	.ascii	"ppa\000"
+	.byte	0x2
+	.2byte	0x8e5
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x51
+	.4byte	.LASF661
+	.byte	0x2
+	.2byte	0x8e6
+	.4byte	0x2a63
+	.4byte	.LLST237
+	.uleb128 0x32
+	.4byte	.LVL907
+	.4byte	0x9222
+	.4byte	0x39bf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC88
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL909
+	.4byte	0x5212
+	.4byte	0x39de
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL910
+	.4byte	0x9222
+	.4byte	0x39f8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL912
+	.4byte	0x26b9
+	.4byte	0x3a16
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL913
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC90
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF662
+	.byte	0x2
+	.2byte	0x8ae
+	.4byte	.LFB293
+	.4byte	.LFE293-.LFB293
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3b83
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x8b0
+	.4byte	0xdba
+	.4byte	.LLST264
+	.uleb128 0x50
+	.ascii	"lpn\000"
+	.byte	0x2
+	.2byte	0x8b1
+	.4byte	0xdc5
+	.4byte	.LLST265
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x8b2
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0x8b3
+	.4byte	0xdba
+	.4byte	.LLST266
+	.uleb128 0x51
+	.4byte	.LASF664
+	.byte	0x2
+	.2byte	0x8b4
+	.4byte	0xdba
+	.4byte	.LLST267
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3b93
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9738
+	.uleb128 0x5f
+	.4byte	.LBB238
+	.4byte	.LBE238-.LBB238
+	.4byte	0x3ad9
+	.uleb128 0x51
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x8d1
+	.4byte	0xdba
+	.4byte	.LLST268
+	.uleb128 0x34
+	.4byte	.LVL1078
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC93
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1071
+	.4byte	0x9222
+	.4byte	0x3af9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC91
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR156
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1072
+	.4byte	0x230c
+	.4byte	0x3b1a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2000
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1083
+	.4byte	0x9222
+	.4byte	0x3b41
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR156
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8df
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1085
+	.4byte	0x5212
+	.4byte	0x3b60
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1086
+	.4byte	0x6122
+	.uleb128 0x34
+	.4byte	.LVL1090
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC92
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3b93
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xd
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3b83
+	.uleb128 0x5d
+	.4byte	.LASF665
+	.byte	0x2
+	.2byte	0x88f
+	.4byte	.LFB292
+	.4byte	.LFE292-.LFB292
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3c9a
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x891
+	.4byte	0xdba
+	.4byte	.LLST371
+	.uleb128 0x50
+	.ascii	"lpn\000"
+	.byte	0x2
+	.2byte	0x892
+	.4byte	0xdc5
+	.4byte	.LLST372
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x893
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0x894
+	.4byte	0xdba
+	.4byte	.LLST373
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3caa
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9722
+	.uleb128 0x32
+	.4byte	.LVL1575
+	.4byte	0x9222
+	.4byte	0x3c1a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC91
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR168
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1576
+	.4byte	0x230c
+	.4byte	0x3c2e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1580
+	.4byte	0x5212
+	.4byte	0x3c4d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1581
+	.4byte	0x6122
+	.uleb128 0x32
+	.4byte	.LVL1585
+	.4byte	0x9222
+	.4byte	0x3c73
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC102
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1586
+	.4byte	0x3297
+	.4byte	0x3c87
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1587
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL1588
+	.4byte	0x4d0e
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3caa
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x14
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3c9a
+	.uleb128 0x5d
+	.4byte	.LASF666
+	.byte	0x2
+	.2byte	0x86b
+	.4byte	.LFB291
+	.4byte	.LFE291-.LFB291
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3d52
+	.uleb128 0x4f
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x86b
+	.4byte	0x1d79
+	.4byte	.LLST339
+	.uleb128 0x28
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x86d
+	.4byte	0xde6
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x86e
+	.4byte	0x2a63
+	.4byte	.LLST340
+	.uleb128 0x51
+	.4byte	.LASF668
+	.byte	0x2
+	.2byte	0x86f
+	.4byte	0x50
+	.4byte	.LLST341
+	.uleb128 0x60
+	.4byte	.LASF384
+	.byte	0x2
+	.2byte	0x870
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1429
+	.4byte	0x32d7
+	.4byte	0x3d25
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1432
+	.4byte	0x251a
+	.4byte	0x3d48
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1433
+	.4byte	0x31f2
+	.byte	0
+	.uleb128 0x61
+	.4byte	.LASF669
+	.byte	0x2
+	.2byte	0x851
+	.4byte	.LFB290
+	.4byte	.LFE290-.LFB290
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3da3
+	.uleb128 0x32
+	.4byte	.LVL1554
+	.4byte	0x4fd7
+	.4byte	0x3d86
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1555
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x52
+	.4byte	.LASF671
+	.byte	0x2
+	.2byte	0x83d
+	.byte	0x1
+	.uleb128 0x59
+	.4byte	.LASF672
+	.byte	0x2
+	.2byte	0x812
+	.4byte	0x50
+	.4byte	.LFB288
+	.4byte	.LFE288-.LFB288
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3eb2
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST258
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST259
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST260
+	.uleb128 0x51
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdba
+	.4byte	.LLST261
+	.uleb128 0x51
+	.4byte	.LASF673
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdba
+	.4byte	.LLST262
+	.uleb128 0x51
+	.4byte	.LASF674
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdba
+	.4byte	.LLST263
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3ec2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9697
+	.uleb128 0x32
+	.4byte	.LVL1046
+	.4byte	0x230c
+	.4byte	0x3e49
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1050
+	.4byte	0x6192
+	.4byte	0x3e5d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1051
+	.4byte	0x67c5
+	.uleb128 0x32
+	.4byte	.LVL1059
+	.4byte	0x5d9a
+	.4byte	0x3e7a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1066
+	.4byte	0x5d75
+	.4byte	0x3e8e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1068
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR155
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x839
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x3ec2
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x11
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3eb2
+	.uleb128 0x45
+	.4byte	.LASF675
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x50
+	.4byte	.LFB287
+	.4byte	.LFE287-.LFB287
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3f5d
+	.uleb128 0x5a
+	.ascii	"p\000"
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x1d79
+	.4byte	.LLST95
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdba
+	.4byte	.LLST96
+	.uleb128 0x28
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9676
+	.uleb128 0x32
+	.4byte	.LVL271
+	.4byte	0x9222
+	.4byte	0x3f43
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR61
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL274
+	.4byte	0x6192
+	.uleb128 0x34
+	.4byte	.LVL276
+	.4byte	0x67c5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF676
+	.byte	0x2
+	.2byte	0x7ef
+	.4byte	0x50
+	.4byte	.LFB286
+	.4byte	.LFE286-.LFB286
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3fe1
+	.uleb128 0x32
+	.4byte	.LVL1691
+	.4byte	0x4007
+	.4byte	0x3f8b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1692
+	.4byte	0x3fe1
+	.4byte	0x3f9f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1693
+	.4byte	0x4007
+	.4byte	0x3fb3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1694
+	.4byte	0x3fe1
+	.4byte	0x3fc7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1695
+	.4byte	0x2d2c
+	.uleb128 0x34
+	.4byte	.LVL1696
+	.4byte	0x31f2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.4byte	.LASF712
+	.byte	0x2
+	.2byte	0x7dc
+	.byte	0x1
+	.4byte	0x4007
+	.uleb128 0x47
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0x7dc
+	.4byte	0x1d79
+	.uleb128 0x48
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7de
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF677
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x50
+	.4byte	.LFB284
+	.4byte	.LFE284-.LFB284
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4560
+	.uleb128 0x4f
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x1d79
+	.4byte	.LLST313
+	.uleb128 0x51
+	.4byte	.LASF678
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdba
+	.4byte	.LLST314
+	.uleb128 0x51
+	.4byte	.LASF679
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdba
+	.4byte	.LLST315
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdba
+	.4byte	.LLST316
+	.uleb128 0x51
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdba
+	.4byte	.LLST317
+	.uleb128 0x51
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdba
+	.4byte	.LLST318
+	.uleb128 0x51
+	.4byte	.LASF680
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdba
+	.4byte	.LLST319
+	.uleb128 0x51
+	.4byte	.LASF681
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdba
+	.4byte	.LLST320
+	.uleb128 0x51
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x67c
+	.4byte	0xdba
+	.4byte	.LLST321
+	.uleb128 0x51
+	.4byte	.LASF682
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x50
+	.4byte	.LLST322
+	.uleb128 0x51
+	.4byte	.LASF683
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x50
+	.4byte	.LLST322
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdba
+	.4byte	.LLST324
+	.uleb128 0x50
+	.ascii	"n\000"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdba
+	.4byte	.LLST325
+	.uleb128 0x50
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdba
+	.4byte	.LLST326
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.4byte	.LLST327
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x28
+	.4byte	.LASF624
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x28
+	.4byte	.LASF614
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x51
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdba
+	.4byte	.LLST328
+	.uleb128 0x51
+	.4byte	.LASF684
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdba
+	.4byte	.LLST329
+	.uleb128 0x51
+	.4byte	.LASF685
+	.byte	0x2
+	.2byte	0x681
+	.4byte	0xdc5
+	.4byte	.LLST330
+	.uleb128 0x51
+	.4byte	.LASF686
+	.byte	0x2
+	.2byte	0x682
+	.4byte	0xdba
+	.4byte	.LLST331
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x683
+	.4byte	0x2a63
+	.4byte	.LLST332
+	.uleb128 0x60
+	.4byte	.LASF687
+	.byte	0x2
+	.2byte	0x684
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x4570
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9619
+	.uleb128 0x55
+	.4byte	.LASF689
+	.byte	0x2
+	.2byte	0x713
+	.4byte	.L1149
+	.uleb128 0x55
+	.4byte	.LASF618
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	.L1164
+	.uleb128 0x55
+	.4byte	.LASF690
+	.byte	0x2
+	.2byte	0x7ce
+	.4byte	.L1172
+	.uleb128 0x4a
+	.4byte	.LASF691
+	.byte	0x2
+	.2byte	0x7d8
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x120
+	.4byte	0x4213
+	.uleb128 0x51
+	.4byte	.LASF692
+	.byte	0x2
+	.2byte	0x6eb
+	.4byte	0xdc5
+	.4byte	.LLST333
+	.uleb128 0x51
+	.4byte	.LASF693
+	.byte	0x2
+	.2byte	0x6ec
+	.4byte	0xdc5
+	.4byte	.LLST334
+	.uleb128 0x34
+	.4byte	.LVL1344
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x138
+	.4byte	0x42e8
+	.uleb128 0x51
+	.4byte	.LASF694
+	.byte	0x2
+	.2byte	0x746
+	.4byte	0xdc5
+	.4byte	.LLST335
+	.uleb128 0x51
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x747
+	.4byte	0xdc5
+	.4byte	.LLST336
+	.uleb128 0x32
+	.4byte	.LVL1388
+	.4byte	0x26b9
+	.4byte	0x4254
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1390
+	.4byte	0x31f2
+	.uleb128 0x32
+	.4byte	.LVL1396
+	.4byte	0x5212
+	.4byte	0x427c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1398
+	.4byte	0x60dd
+	.4byte	0x4290
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1399
+	.4byte	0x4575
+	.4byte	0x42a4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1401
+	.4byte	0x26b9
+	.4byte	0x42bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1403
+	.4byte	0x60dd
+	.4byte	0x42d0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1404
+	.4byte	0x60dd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LBB271
+	.4byte	.LBE271-.LBB271
+	.4byte	0x4364
+	.uleb128 0x51
+	.4byte	.LASF696
+	.byte	0x2
+	.2byte	0x785
+	.4byte	0xdc5
+	.4byte	.LLST337
+	.uleb128 0x51
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x786
+	.4byte	0xdc5
+	.4byte	.LLST338
+	.uleb128 0x32
+	.4byte	.LVL1413
+	.4byte	0x26b9
+	.4byte	0x432d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1414
+	.4byte	0x60dd
+	.4byte	0x4348
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1416
+	.4byte	0x5212
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1293
+	.4byte	0x6011
+	.4byte	0x4377
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1299
+	.4byte	0x26b9
+	.4byte	0x4390
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1305
+	.4byte	0x615a
+	.uleb128 0x32
+	.4byte	.LVL1308
+	.4byte	0x468d
+	.4byte	0x43ad
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1312
+	.4byte	0x9222
+	.4byte	0x43d4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR161
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6aa
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1313
+	.4byte	0x9222
+	.4byte	0x43fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR161
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6ab
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1325
+	.4byte	0x60dd
+	.4byte	0x4415
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1349
+	.4byte	0x4ec1
+	.4byte	0x442c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1352
+	.4byte	0x26b9
+	.4byte	0x4447
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1372
+	.4byte	0x615a
+	.4byte	0x4461
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x74
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1377
+	.4byte	0x31f2
+	.uleb128 0x32
+	.4byte	.LVL1382
+	.4byte	0x60dd
+	.4byte	0x4485
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1385
+	.4byte	0x5212
+	.4byte	0x44a4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1386
+	.4byte	0x60dd
+	.4byte	0x44bf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1391
+	.4byte	0x6122
+	.4byte	0x44d9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x77
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1394
+	.4byte	0x9222
+	.4byte	0x4500
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR161
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7a5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1408
+	.4byte	0x5212
+	.4byte	0x451f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1409
+	.4byte	0x6122
+	.4byte	0x4539
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x77
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1418
+	.4byte	0x9222
+	.4byte	0x4556
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC99
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1421
+	.4byte	0x31f2
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x4570
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x15
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x4560
+	.uleb128 0x5d
+	.4byte	.LASF697
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	.LFB283
+	.4byte	.LFE283-.LFB283
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x468d
+	.uleb128 0x5a
+	.ascii	"lpa\000"
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdc5
+	.4byte	.LLST231
+	.uleb128 0x4f
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdc5
+	.4byte	.LLST232
+	.uleb128 0x51
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x65d
+	.4byte	0xdba
+	.4byte	.LLST233
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9585
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0xa0
+	.4byte	0x4656
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x661
+	.4byte	0xdba
+	.4byte	.LLST234
+	.uleb128 0x51
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x662
+	.4byte	0xdba
+	.4byte	.LLST235
+	.uleb128 0x51
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x663
+	.4byte	0xdba
+	.4byte	.LLST236
+	.uleb128 0x32
+	.4byte	.LVL897
+	.4byte	0x5bca
+	.4byte	0x461e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR47
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL898
+	.4byte	0x9222
+	.4byte	0x4645
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR146
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x667
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL899
+	.4byte	0x5d75
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL891
+	.4byte	0x6122
+	.4byte	0x4671
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL905
+	.4byte	0x5212
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF698
+	.byte	0x2
+	.2byte	0x647
+	.4byte	.LFB282
+	.4byte	.LFE282-.LFB282
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x46e2
+	.uleb128 0x63
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0x1d79
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4f
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdba
+	.4byte	.LLST90
+	.uleb128 0x4f
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdba
+	.4byte	.LLST91
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x649
+	.4byte	0xdba
+	.4byte	.LLST92
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF699
+	.byte	0x2
+	.2byte	0x63e
+	.4byte	0x50
+	.4byte	.LFB281
+	.4byte	.LFE281-.LFB281
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4719
+	.uleb128 0x44
+	.4byte	.LVL1037
+	.4byte	0x4719
+	.uleb128 0x34
+	.4byte	.LVL1038
+	.4byte	0x4791
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF700
+	.byte	0x2
+	.2byte	0x627
+	.4byte	.LFB280
+	.4byte	.LFE280-.LFB280
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4763
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x629
+	.4byte	0xdba
+	.4byte	.LLST257
+	.uleb128 0x32
+	.4byte	.LVL1034
+	.4byte	0x230c
+	.4byte	0x4752
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1035
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF701
+	.byte	0x2
+	.2byte	0x617
+	.4byte	0x50
+	.4byte	.LFB279
+	.4byte	.LFE279-.LFB279
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4791
+	.uleb128 0x34
+	.4byte	.LVL1033
+	.4byte	0x4791
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR149
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF702
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x50
+	.4byte	.LFB278
+	.4byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4934
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x4934
+	.4byte	.LLST249
+	.uleb128 0x51
+	.4byte	.LASF704
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xddb
+	.4byte	.LLST250
+	.uleb128 0x51
+	.4byte	.LASF299
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xddb
+	.4byte	.LLST251
+	.uleb128 0x51
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x5bc
+	.4byte	0xddb
+	.4byte	.LLST252
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x5bd
+	.4byte	0xdba
+	.4byte	.LLST253
+	.uleb128 0x28
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x5be
+	.4byte	0xff2
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x51
+	.4byte	.LASF310
+	.byte	0x2
+	.2byte	0x5bf
+	.4byte	0x10e9
+	.4byte	.LLST254
+	.uleb128 0x51
+	.4byte	.LASF311
+	.byte	0x2
+	.2byte	0x5c0
+	.4byte	0xff2
+	.4byte	.LLST255
+	.uleb128 0x28
+	.4byte	.LASF307
+	.byte	0x2
+	.2byte	0x5c1
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x51
+	.4byte	.LASF707
+	.byte	0x2
+	.2byte	0x5c2
+	.4byte	0xdba
+	.4byte	.LLST256
+	.uleb128 0x28
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x5c3
+	.4byte	0x493a
+	.uleb128 0x1
+	.byte	0x57
+	.uleb128 0x32
+	.4byte	.LVL997
+	.4byte	0x230c
+	.4byte	0x4877
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1002
+	.4byte	0x6011
+	.4byte	0x488a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1008
+	.4byte	0x583d
+	.4byte	0x489e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1009
+	.4byte	0x57e5
+	.4byte	0x48b2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1010
+	.4byte	0x569b
+	.4byte	0x48c6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1011
+	.4byte	0x569b
+	.4byte	0x48da
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1014
+	.4byte	0x26b9
+	.4byte	0x48fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1019
+	.4byte	0x26b9
+	.4byte	0x4919
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1023
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1040
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1271
+	.uleb128 0x59
+	.4byte	.LASF709
+	.byte	0x2
+	.2byte	0x54f
+	.4byte	0x50
+	.4byte	.LFB277
+	.4byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4aae
+	.uleb128 0x51
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x551
+	.4byte	0xddb
+	.4byte	.LLST446
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9522
+	.uleb128 0x32
+	.4byte	.LVL1970
+	.4byte	0x230c
+	.4byte	0x498c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1971
+	.4byte	0x6011
+	.4byte	0x499f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1973
+	.4byte	0x9222
+	.4byte	0x49c6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR181
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1974
+	.4byte	0x9222
+	.4byte	0x49ed
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR181
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56e
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1976
+	.4byte	0x22a6
+	.4byte	0x4a07
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1977
+	.4byte	0x22a6
+	.uleb128 0x44
+	.4byte	.LVL1978
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1980
+	.4byte	0x9222
+	.4byte	0x4a40
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR181
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x584
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1981
+	.4byte	0x3ec7
+	.4byte	0x4a57
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1982
+	.4byte	0x3ec7
+	.4byte	0x4a6b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1983
+	.4byte	0x3ec7
+	.4byte	0x4a7f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1984
+	.4byte	0x3ec7
+	.4byte	0x4a93
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1986
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF710
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0x50
+	.4byte	.LFB276
+	.4byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4ad9
+	.uleb128 0x4f
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0xdba
+	.4byte	.LLST89
+	.byte	0
+	.uleb128 0x62
+	.4byte	.LASF713
+	.byte	0x2
+	.2byte	0x542
+	.byte	0x1
+	.4byte	0x4aff
+	.uleb128 0x47
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0xdba
+	.uleb128 0x47
+	.4byte	.LASF588
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0x50
+	.byte	0
+	.uleb128 0x4e
+	.4byte	.LASF715
+	.byte	0x2
+	.2byte	0x535
+	.4byte	0x50
+	.byte	0x1
+	.uleb128 0x45
+	.4byte	.LASF716
+	.byte	0x2
+	.2byte	0x446
+	.4byte	0x50
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4d0e
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdba
+	.4byte	.LLST243
+	.uleb128 0x28
+	.4byte	.LASF717
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdba
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdba
+	.4byte	.LLST244
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdba
+	.4byte	.LLST245
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xddb
+	.4byte	.LLST246
+	.uleb128 0x50
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xddb
+	.4byte	.LLST247
+	.uleb128 0x51
+	.4byte	.LASF718
+	.byte	0x2
+	.2byte	0x44b
+	.4byte	0x493a
+	.4byte	.LLST248
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3b93
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9465
+	.uleb128 0x32
+	.4byte	.LVL935
+	.4byte	0x230c
+	.4byte	0x4bb4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL936
+	.4byte	0x230c
+	.4byte	0x4bc8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL937
+	.4byte	0x230c
+	.4byte	0x4bdc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL938
+	.4byte	0x230c
+	.4byte	0x4bf0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL939
+	.4byte	0x230c
+	.4byte	0x4c12
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR81
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL942
+	.4byte	0x6192
+	.4byte	0x4c28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL944
+	.4byte	0x67c5
+	.4byte	0x4c3e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL950
+	.4byte	0x26b9
+	.4byte	0x4c5d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL953
+	.4byte	0x26b9
+	.4byte	0x4c75
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL961
+	.4byte	0x5f01
+	.4byte	0x4c89
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL962
+	.4byte	0x9222
+	.4byte	0x4cb0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR148
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x48a
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL971
+	.4byte	0x9222
+	.4byte	0x4cd7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR148
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4b3
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL980
+	.4byte	0x5f01
+	.4byte	0x4cea
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL982
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR148
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x530
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF719
+	.byte	0x2
+	.2byte	0x3eb
+	.4byte	0x50
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4e6f
+	.uleb128 0x51
+	.4byte	.LASF300
+	.byte	0x2
+	.2byte	0x3ed
+	.4byte	0xdba
+	.4byte	.LLST368
+	.uleb128 0x51
+	.4byte	.LASF720
+	.byte	0x2
+	.2byte	0x3ee
+	.4byte	0x4e6f
+	.4byte	.LLST369
+	.uleb128 0x51
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x3ef
+	.4byte	0xdba
+	.4byte	.LLST370
+	.uleb128 0x4a
+	.4byte	.LASF722
+	.byte	0x2
+	.2byte	0x41c
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9443
+	.uleb128 0x32
+	.4byte	.LVL1559
+	.4byte	0x230c
+	.4byte	0x4d83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1560
+	.4byte	0x22a6
+	.4byte	0x4da0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR79
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1561
+	.4byte	0x22a6
+	.uleb128 0x44
+	.4byte	.LVL1562
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1563
+	.4byte	0x4f5b
+	.4byte	0x4dc6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1565
+	.4byte	0x251a
+	.4byte	0x4de9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1567
+	.4byte	0x5dbf
+	.uleb128 0x32
+	.4byte	.LVL1568
+	.4byte	0x251a
+	.4byte	0x4e15
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1569
+	.4byte	0x9222
+	.4byte	0x4e3c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR167
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x433
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1572
+	.4byte	0x9222
+	.4byte	0x4e59
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC101
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1573
+	.4byte	0x5f01
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x12c9
+	.uleb128 0x62
+	.4byte	.LASF723
+	.byte	0x2
+	.2byte	0x3b2
+	.byte	0x1
+	.4byte	0x4ec1
+	.uleb128 0x4c
+	.uleb128 0x49
+	.ascii	"lpa\000"
+	.byte	0x2
+	.2byte	0x3b7
+	.4byte	0xdc5
+	.uleb128 0x49
+	.ascii	"ppa\000"
+	.byte	0x2
+	.2byte	0x3b8
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF724
+	.byte	0x2
+	.2byte	0x3b9
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x3ba
+	.4byte	0xde6
+	.uleb128 0x48
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x3bb
+	.4byte	0x2a63
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF725
+	.byte	0x2
+	.2byte	0x380
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f5b
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x380
+	.4byte	0x4934
+	.4byte	.LLST239
+	.uleb128 0x50
+	.ascii	"ppa\000"
+	.byte	0x2
+	.2byte	0x382
+	.4byte	0xdc5
+	.4byte	.LLST240
+	.uleb128 0x51
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x383
+	.4byte	0xdba
+	.4byte	.LLST241
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x384
+	.4byte	0xff2
+	.4byte	.LLST242
+	.uleb128 0x32
+	.4byte	.LVL929
+	.4byte	0x26b9
+	.4byte	0x4f35
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LVL931
+	.4byte	0x5417
+	.4byte	0x4f4a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL933
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.4byte	.LASF726
+	.byte	0x2
+	.2byte	0x371
+	.byte	0x1
+	.4byte	0x4f7f
+	.uleb128 0x47
+	.4byte	.LASF393
+	.byte	0x2
+	.2byte	0x371
+	.4byte	0xdc5
+	.uleb128 0x49
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x373
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF727
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0x50
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4fd7
+	.uleb128 0x4f
+	.4byte	.LASF728
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0xdc5
+	.4byte	.LLST358
+	.uleb128 0x51
+	.4byte	.LASF729
+	.byte	0x2
+	.2byte	0x35e
+	.4byte	0xdc5
+	.4byte	.LLST359
+	.uleb128 0x32
+	.4byte	.LVL1531
+	.4byte	0x50ef
+	.4byte	0x4fcd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1532
+	.4byte	0x3da3
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF730
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LFB267
+	.4byte	.LFE267-.LFB267
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x50e9
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LLST360
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LLST361
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0x50e9
+	.4byte	.LLST362
+	.uleb128 0x50
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdba
+	.4byte	.LLST363
+	.uleb128 0x51
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdba
+	.4byte	.LLST364
+	.uleb128 0x50
+	.ascii	"ppn\000"
+	.byte	0x2
+	.2byte	0x339
+	.4byte	0xdc5
+	.4byte	.LLST365
+	.uleb128 0x51
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x33a
+	.4byte	0xdc5
+	.4byte	.LLST366
+	.uleb128 0x5e
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x33b
+	.4byte	0xde6
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x51
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x33c
+	.4byte	0xdc5
+	.4byte	.LLST367
+	.uleb128 0x28
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x33d
+	.4byte	0x2454
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x32
+	.4byte	.LVL1542
+	.4byte	0x26b9
+	.4byte	0x50b0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1544
+	.4byte	0x22a6
+	.4byte	0x50ca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1549
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -124
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xdaf
+	.uleb128 0x59
+	.4byte	.LASF737
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdc5
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5212
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdc5
+	.4byte	.LLST350
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdc5
+	.4byte	.LLST351
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0x50e9
+	.4byte	.LLST352
+	.uleb128 0x50
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdba
+	.4byte	.LLST353
+	.uleb128 0x51
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdba
+	.4byte	.LLST354
+	.uleb128 0x50
+	.ascii	"ppn\000"
+	.byte	0x2
+	.2byte	0x314
+	.4byte	0xdc5
+	.4byte	.LLST355
+	.uleb128 0x51
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x315
+	.4byte	0xdc5
+	.4byte	.LLST356
+	.uleb128 0x5e
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x316
+	.4byte	0xde6
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x51
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x317
+	.4byte	0xdc5
+	.4byte	.LLST357
+	.uleb128 0x28
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x318
+	.4byte	0x2454
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x32
+	.4byte	.LVL1513
+	.4byte	0x26b9
+	.4byte	0x51c8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1516
+	.4byte	0x22a6
+	.4byte	0x51e5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -128
+	.byte	0x6
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1518
+	.4byte	0x5417
+	.4byte	0x5202
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR149
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1523
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF738
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x50
+	.4byte	.LFB265
+	.4byte	.LFE265-.LFB265
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x52fe
+	.uleb128 0x5a
+	.ascii	"lpn\000"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0xdc5
+	.4byte	.LLST227
+	.uleb128 0x5a
+	.ascii	"ppn\000"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0xff2
+	.4byte	.LLST228
+	.uleb128 0x4f
+	.4byte	.LASF739
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x50
+	.4byte	.LLST229
+	.uleb128 0x51
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdba
+	.4byte	.LLST230
+	.uleb128 0x28
+	.4byte	.LASF741
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x28
+	.4byte	.LASF742
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x530e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9370
+	.uleb128 0x55
+	.4byte	.LASF743
+	.byte	0x2
+	.2byte	0x2fb
+	.4byte	.L740
+	.uleb128 0x32
+	.4byte	.LVL878
+	.4byte	0x9222
+	.4byte	0x52ca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR145
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2f7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL881
+	.4byte	0x534e
+	.uleb128 0x32
+	.4byte	.LVL883
+	.4byte	0x53c9
+	.4byte	0x52e7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL884
+	.4byte	0x590c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x530e
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x52fe
+	.uleb128 0x45
+	.4byte	.LASF744
+	.byte	0x2
+	.2byte	0x2e3
+	.4byte	0x50
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x534e
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x2e5
+	.4byte	0xdba
+	.4byte	.LLST312
+	.uleb128 0x44
+	.4byte	.LVL1279
+	.4byte	0x4e75
+	.uleb128 0x44
+	.4byte	.LVL1283
+	.4byte	0x53c9
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF745
+	.byte	0x2
+	.2byte	0x2bb
+	.4byte	0xdba
+	.4byte	.LFB263
+	.4byte	.LFE263-.LFB263
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x53c9
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x2bd
+	.4byte	0xdba
+	.4byte	.LLST83
+	.uleb128 0x51
+	.4byte	.LASF746
+	.byte	0x2
+	.2byte	0x2be
+	.4byte	0xdba
+	.4byte	.LLST84
+	.uleb128 0x51
+	.4byte	.LASF747
+	.byte	0x2
+	.2byte	0x2bf
+	.4byte	0xdc5
+	.4byte	.LLST85
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x4570
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9353
+	.uleb128 0x34
+	.4byte	.LVL233
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR58
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2df
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF748
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0x50
+	.4byte	.LFB262
+	.4byte	.LFE262-.LFB262
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5417
+	.uleb128 0x4f
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0xdba
+	.4byte	.LLST225
+	.uleb128 0x51
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x2b3
+	.4byte	0xdc5
+	.4byte	.LLST226
+	.uleb128 0x34
+	.4byte	.LVL871
+	.4byte	0x5417
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF749
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x50
+	.4byte	.LFB261
+	.4byte	.LFE261-.LFB261
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5576
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x4934
+	.4byte	.LLST212
+	.uleb128 0x4f
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0xdc5
+	.4byte	.LLST213
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0xff2
+	.4byte	.LLST214
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x278
+	.4byte	0xdc5
+	.4byte	.LLST215
+	.uleb128 0x51
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x279
+	.4byte	0x493a
+	.4byte	.LLST216
+	.uleb128 0x51
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x27a
+	.4byte	0xdba
+	.4byte	.LLST217
+	.uleb128 0x4a
+	.4byte	.LASF750
+	.byte	0x2
+	.2byte	0x27c
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9328
+	.uleb128 0x32
+	.4byte	.LVL833
+	.4byte	0x5576
+	.4byte	0x54bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL834
+	.4byte	0x9222
+	.4byte	0x54e3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR142
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28a
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL835
+	.4byte	0x9222
+	.4byte	0x550a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR142
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28b
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL837
+	.4byte	0x230c
+	.4byte	0x5522
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL840
+	.4byte	0x251a
+	.4byte	0x5545
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL842
+	.4byte	0x9222
+	.4byte	0x555c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC86
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL843
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC87
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF751
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x50
+	.4byte	.LFB260
+	.4byte	.LFE260-.LFB260
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5686
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x4934
+	.4byte	.LLST206
+	.uleb128 0x48
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdba
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdba
+	.4byte	.LLST207
+	.uleb128 0x51
+	.4byte	.LASF752
+	.byte	0x2
+	.2byte	0x249
+	.4byte	0xdba
+	.4byte	.LLST208
+	.uleb128 0x51
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x24a
+	.4byte	0x10e9
+	.4byte	.LLST209
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x24b
+	.4byte	0xff2
+	.4byte	.LLST210
+	.uleb128 0x51
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x493a
+	.4byte	.LLST211
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x5696
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9314
+	.uleb128 0x32
+	.4byte	.LVL811
+	.4byte	0x9222
+	.4byte	0x5632
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR141
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x250
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL812
+	.4byte	0x5dbf
+	.uleb128 0x32
+	.4byte	.LVL819
+	.4byte	0x230c
+	.4byte	0x564f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL824
+	.4byte	0x251a
+	.4byte	0x5675
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL825
+	.4byte	0x569b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x5696
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5686
+	.uleb128 0x45
+	.4byte	.LASF754
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x50
+	.4byte	.LFB259
+	.4byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x57e5
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x4934
+	.4byte	.LLST218
+	.uleb128 0x51
+	.4byte	.LASF755
+	.byte	0x2
+	.2byte	0x21a
+	.4byte	0xdba
+	.4byte	.LLST219
+	.uleb128 0x51
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x21b
+	.4byte	0xdba
+	.4byte	.LLST220
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x21c
+	.4byte	0xdba
+	.4byte	.LLST221
+	.uleb128 0x51
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x21d
+	.4byte	0x10e9
+	.4byte	.LLST222
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x21e
+	.4byte	0xff2
+	.4byte	.LLST223
+	.uleb128 0x51
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x21f
+	.4byte	0x493a
+	.4byte	.LLST224
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9300
+	.uleb128 0x32
+	.4byte	.LVL848
+	.4byte	0x583d
+	.4byte	0x5748
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL851
+	.4byte	0x57e5
+	.4byte	0x575c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL854
+	.4byte	0x5f01
+	.4byte	0x5775
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL856
+	.4byte	0x57e5
+	.4byte	0x5789
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL861
+	.4byte	0x26b9
+	.4byte	0x57a7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL862
+	.4byte	0x9222
+	.4byte	0x57ce
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR143
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x234
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL866
+	.4byte	0x5417
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF757
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x5828
+	.uleb128 0x47
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x4934
+	.uleb128 0x48
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x206
+	.4byte	0x10e9
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x5838
+	.4byte	.LASF757
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x5838
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x19
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5828
+	.uleb128 0x45
+	.4byte	.LASF759
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x50
+	.4byte	.LFB257
+	.4byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x590c
+	.uleb128 0x4f
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x4934
+	.4byte	.LLST199
+	.uleb128 0x28
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x1dd
+	.4byte	0x10e9
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x51
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x1de
+	.4byte	0xff2
+	.4byte	.LLST200
+	.uleb128 0x28
+	.4byte	.LASF760
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x10e9
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdba
+	.4byte	.LLST201
+	.uleb128 0x51
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdba
+	.4byte	.LLST202
+	.uleb128 0x51
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x1e1
+	.4byte	0xdba
+	.4byte	.LLST203
+	.uleb128 0x51
+	.4byte	.LASF761
+	.byte	0x2
+	.2byte	0x1e2
+	.4byte	0xdba
+	.4byte	.LLST204
+	.uleb128 0x51
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x1e3
+	.4byte	0xdba
+	.4byte	.LLST205
+	.uleb128 0x32
+	.4byte	.LVL788
+	.4byte	0x230c
+	.4byte	0x58fc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL805
+	.4byte	0x5f01
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF762
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0x50
+	.4byte	.LFB256
+	.4byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a4e
+	.uleb128 0x4f
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdba
+	.4byte	.LLST197
+	.uleb128 0x4f
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdba
+	.4byte	.LLST198
+	.uleb128 0x28
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x1bb
+	.4byte	0x493a
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x28
+	.4byte	.LASF763
+	.byte	0x2
+	.2byte	0x1bc
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x32d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9257
+	.uleb128 0x32
+	.4byte	.LVL774
+	.4byte	0x9222
+	.4byte	0x5998
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR140
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1be
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL776
+	.4byte	0x230c
+	.4byte	0x59ac
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL778
+	.4byte	0x26b9
+	.4byte	0x59ca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL780
+	.4byte	0x9222
+	.4byte	0x59ed
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL781
+	.4byte	0x2836
+	.4byte	0x5a0e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC84
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL782
+	.4byte	0x2836
+	.4byte	0x5a2a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC85
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL783
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR140
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1d3
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF764
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x5acd
+	.uleb128 0x47
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF765
+	.byte	0x2
+	.2byte	0x195
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF766
+	.byte	0x2
+	.2byte	0x196
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF767
+	.byte	0x2
+	.2byte	0x197
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF768
+	.byte	0x2
+	.2byte	0x199
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF769
+	.byte	0x2
+	.2byte	0x19a
+	.4byte	0xdc5
+	.uleb128 0x48
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1cc9
+	.uleb128 0x48
+	.4byte	.LASF770
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1cc9
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x4570
+	.4byte	.LASF764
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF771
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0x50
+	.4byte	.LFB254
+	.4byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b18
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0xdba
+	.4byte	.LLST67
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x181
+	.4byte	0xdba
+	.4byte	.LLST68
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x182
+	.4byte	0x1cc9
+	.4byte	.LLST69
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF772
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x50
+	.4byte	.LFB253
+	.4byte	.LFE253-.LFB253
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b59
+	.uleb128 0x4f
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x5b59
+	.4byte	.LLST66
+	.uleb128 0x2d
+	.4byte	.LVL186
+	.4byte	0x5b5f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1cc9
+	.uleb128 0x45
+	.4byte	.LASF774
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x50
+	.4byte	.LFB252
+	.4byte	.LFE252-.LFB252
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5bca
+	.uleb128 0x4f
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x5b59
+	.4byte	.LLST62
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0xdba
+	.4byte	.LLST63
+	.uleb128 0x51
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x169
+	.4byte	0xdba
+	.4byte	.LLST64
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x16a
+	.4byte	0x1cc9
+	.4byte	.LLST65
+	.uleb128 0x34
+	.4byte	.LVL178
+	.4byte	0x5bca
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF775
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x50
+	.4byte	.LFB251
+	.4byte	.LFE251-.LFB251
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5c55
+	.uleb128 0x4f
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x5b59
+	.4byte	.LLST59
+	.uleb128 0x4f
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0xdba
+	.4byte	.LLST60
+	.uleb128 0x28
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1cc9
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x51
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1cc9
+	.4byte	.LLST61
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x5c65
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9216
+	.uleb128 0x34
+	.4byte	.LVL168
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x151
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x5c65
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0x10
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5c55
+	.uleb128 0x45
+	.4byte	.LASF777
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0x50
+	.4byte	.LFB250
+	.4byte	.LFE250-.LFB250
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5ce3
+	.uleb128 0x4f
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0xdba
+	.4byte	.LLST53
+	.uleb128 0x51
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1cc9
+	.4byte	.LLST54
+	.uleb128 0x51
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1cc9
+	.4byte	.LLST55
+	.uleb128 0x28
+	.4byte	.LASF778
+	.byte	0x2
+	.2byte	0x11e
+	.4byte	0xdba
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x51
+	.4byte	.LASF779
+	.byte	0x2
+	.2byte	0x11f
+	.4byte	0xdba
+	.4byte	.LLST56
+	.uleb128 0x51
+	.4byte	.LASF780
+	.byte	0x2
+	.2byte	0x120
+	.4byte	0xdba
+	.4byte	.LLST57
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF781
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0x50
+	.4byte	.LFB249
+	.4byte	.LFE249-.LFB249
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5d75
+	.uleb128 0x2c
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0xdba
+	.4byte	.LLST44
+	.uleb128 0x30
+	.4byte	.LASF652
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1cc9
+	.4byte	.LLST45
+	.uleb128 0x30
+	.4byte	.LASF776
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1cc9
+	.4byte	.LLST46
+	.uleb128 0x30
+	.4byte	.LASF782
+	.byte	0x2
+	.byte	0xdb
+	.4byte	0xdba
+	.4byte	.LLST47
+	.uleb128 0x30
+	.4byte	.LASF783
+	.byte	0x2
+	.byte	0xdc
+	.4byte	0xdba
+	.4byte	.LLST48
+	.uleb128 0x30
+	.4byte	.LASF767
+	.byte	0x2
+	.byte	0xdd
+	.4byte	0xdc5
+	.4byte	.LLST49
+	.uleb128 0x30
+	.4byte	.LASF784
+	.byte	0x2
+	.byte	0xde
+	.4byte	0xdc5
+	.4byte	.LLST50
+	.uleb128 0x30
+	.4byte	.LASF780
+	.byte	0x2
+	.byte	0xdf
+	.4byte	0xdba
+	.4byte	.LLST51
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF785
+	.byte	0x2
+	.byte	0xb9
+	.byte	0x1
+	.4byte	0x5d9a
+	.uleb128 0x36
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb9
+	.4byte	0xdba
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x5c65
+	.4byte	.LASF785
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF786
+	.byte	0x2
+	.byte	0xb2
+	.byte	0x1
+	.4byte	0x5dbf
+	.uleb128 0x36
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb2
+	.4byte	0xdba
+	.uleb128 0x4b
+	.4byte	.LASF574
+	.4byte	0x5c65
+	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF787
+	.byte	0x2
+	.byte	0xa4
+	.4byte	0xdba
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5e12
+	.uleb128 0x3b
+	.ascii	"tmp\000"
+	.byte	0x2
+	.byte	0xa6
+	.4byte	0xdba
+	.4byte	.LLST42
+	.uleb128 0x5f
+	.4byte	.LBB174
+	.4byte	.LBE174-.LBB174
+	.4byte	0x5e02
+	.uleb128 0x3b
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0xa9
+	.4byte	0x5e12
+	.4byte	.LLST43
+	.byte	0
+	.uleb128 0x65
+	.4byte	0x5fac
+	.4byte	.LBB172
+	.4byte	.LBE172-.LBB172
+	.byte	0x2
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x1595
+	.uleb128 0x2b
+	.4byte	.LASF788
+	.byte	0x2
+	.byte	0x92
+	.4byte	0x50
+	.4byte	.LFB245
+	.4byte	.LFE245-.LFB245
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5e7c
+	.uleb128 0x2f
+	.ascii	"blk\000"
+	.byte	0x2
+	.byte	0x92
+	.4byte	0xdba
+	.4byte	.LLST39
+	.uleb128 0x3b
+	.ascii	"ret\000"
+	.byte	0x2
+	.byte	0x94
+	.4byte	0x50
+	.4byte	.LLST40
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x2
+	.byte	0x95
+	.4byte	0xdc5
+	.4byte	.LLST41
+	.uleb128 0x3a
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x96
+	.4byte	0x5e12
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x66
+	.4byte	0x5fa0
+	.4byte	.LBB168
+	.4byte	.Ldebug_ranges0+0x18
+	.byte	0x2
+	.byte	0x98
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x73
+	.4byte	.LFB244
+	.4byte	.LFE244-.LFB244
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5f01
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdba
+	.4byte	.LLST33
+	.uleb128 0x3b
+	.ascii	"tmp\000"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdba
+	.4byte	.LLST34
+	.uleb128 0x3b
+	.ascii	"j\000"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdba
+	.4byte	.LLST35
+	.uleb128 0x30
+	.4byte	.LASF599
+	.byte	0x2
+	.byte	0x76
+	.4byte	0xdba
+	.4byte	.LLST36
+	.uleb128 0x30
+	.4byte	.LASF790
+	.byte	0x2
+	.byte	0x77
+	.4byte	0xdba
+	.4byte	.LLST37
+	.uleb128 0x30
+	.4byte	.LASF791
+	.byte	0x2
+	.byte	0x78
+	.4byte	0xdc5
+	.4byte	.LLST38
+	.uleb128 0x3a
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x79
+	.4byte	0x5e12
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x44
+	.4byte	.LVL85
+	.4byte	0x6122
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF792
+	.byte	0x2
+	.byte	0x61
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5fa0
+	.uleb128 0x2f
+	.ascii	"blk\000"
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdba
+	.4byte	.LLST175
+	.uleb128 0x2c
+	.4byte	.LASF793
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdba
+	.4byte	.LLST176
+	.uleb128 0x5f
+	.4byte	.LBB223
+	.4byte	.LBE223-.LBB223
+	.4byte	0x5f90
+	.uleb128 0x3b
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x64
+	.4byte	0x5e12
+	.4byte	.LLST177
+	.uleb128 0x67
+	.4byte	.LBB224
+	.4byte	.LBE224-.LBB224
+	.uleb128 0x30
+	.4byte	.LASF794
+	.byte	0x2
+	.byte	0x66
+	.4byte	0xdba
+	.4byte	.LLST178
+	.uleb128 0x32
+	.4byte	.LVL635
+	.4byte	0x6122
+	.4byte	0x5f7a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL637
+	.4byte	0x2464
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.4byte	0x5fa0
+	.4byte	.LBB221
+	.4byte	.LBE221-.LBB221
+	.byte	0x2
+	.byte	0x63
+	.byte	0
+	.uleb128 0x68
+	.4byte	.LASF795
+	.byte	0x2
+	.byte	0x5c
+	.4byte	0xdba
+	.byte	0x1
+	.uleb128 0x68
+	.4byte	.LASF796
+	.byte	0x2
+	.byte	0x57
+	.4byte	0xdba
+	.byte	0x1
+	.uleb128 0x2b
+	.4byte	.LASF797
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdba
+	.4byte	.LFB240
+	.4byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6011
+	.uleb128 0x2f
+	.ascii	"max\000"
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdba
+	.4byte	.LLST196
+	.uleb128 0x3a
+	.ascii	"Q\000"
+	.byte	0x2
+	.byte	0x4d
+	.4byte	0x5e12
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x34
+	.4byte	.LVL770
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR38+8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF798
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x50
+	.4byte	.LFB239
+	.4byte	.LFE239-.LFB239
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x60dd
+	.uleb128 0x2c
+	.4byte	.LASF388
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0xdc5
+	.4byte	.LLST157
+	.uleb128 0x2c
+	.4byte	.LASF568
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x50
+	.4byte	.LLST158
+	.uleb128 0x3a
+	.ascii	"req\000"
+	.byte	0x2
+	.byte	0x30
+	.4byte	0xde6
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -108
+	.uleb128 0x3b
+	.ascii	"low\000"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xddb
+	.4byte	.LLST159
+	.uleb128 0x29
+	.4byte	.LASF799
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xddb
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x3b
+	.ascii	"mid\000"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xddb
+	.4byte	.LLST160
+	.uleb128 0x29
+	.4byte	.LASF800
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x2454
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -88
+	.uleb128 0x30
+	.4byte	.LASF801
+	.byte	0x2
+	.byte	0x33
+	.4byte	0xdba
+	.4byte	.LLST161
+	.uleb128 0x32
+	.4byte	.LVL591
+	.4byte	0x26b9
+	.4byte	0x60c0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL596
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -108
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF802
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdc5
+	.4byte	.LFB238
+	.4byte	.LFE238-.LFB238
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6122
+	.uleb128 0x2c
+	.4byte	.LASF803
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdc5
+	.4byte	.LLST31
+	.uleb128 0x58
+	.4byte	.LASF804
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3b
+	.ascii	"ret\000"
+	.byte	0x2
+	.byte	0x20
+	.4byte	0xdc5
+	.4byte	.LLST32
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF805
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdba
+	.4byte	.LFB237
+	.4byte	.LFE237-.LFB237
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x615a
+	.uleb128 0x2c
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdba
+	.4byte	.LLST29
+	.uleb128 0x30
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x16
+	.4byte	0xdba
+	.4byte	.LLST30
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF806
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdba
+	.4byte	.LFB236
+	.4byte	.LFE236-.LFB236
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6192
+	.uleb128 0x2c
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdba
+	.4byte	.LLST27
+	.uleb128 0x30
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xdba
+	.4byte	.LLST28
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF807
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x61d9
+	.uleb128 0x2c
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LLST24
+	.uleb128 0x2c
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LLST25
+	.uleb128 0x30
+	.4byte	.LASF608
+	.byte	0x2
+	.byte	0x6
+	.4byte	0xdba
+	.4byte	.LLST26
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF808
+	.byte	0x4
+	.2byte	0x13c
+	.4byte	0xdd0
+	.4byte	.LFB234
+	.4byte	.LFE234-.LFB234
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x63c0
+	.uleb128 0x50
+	.ascii	"die\000"
+	.byte	0x4
+	.2byte	0x13e
+	.4byte	0xdc5
+	.4byte	.LLST346
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x4
+	.2byte	0x13f
+	.4byte	0xdba
+	.4byte	.LLST347
+	.uleb128 0x51
+	.4byte	.LASF577
+	.byte	0x4
+	.2byte	0x140
+	.4byte	0xdc5
+	.4byte	.LLST348
+	.uleb128 0x51
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x142
+	.4byte	0x63c0
+	.4byte	.LLST349
+	.uleb128 0x4a
+	.4byte	.LASF810
+	.byte	0x4
+	.2byte	0x158
+	.uleb128 0x44
+	.4byte	.LVL1460
+	.4byte	0x65bc
+	.uleb128 0x44
+	.4byte	.LVL1461
+	.4byte	0x63c6
+	.uleb128 0x32
+	.4byte	.LVL1465
+	.4byte	0x67c5
+	.4byte	0x6261
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1466
+	.4byte	0x2410
+	.4byte	0x6275
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1467
+	.4byte	0x6828
+	.4byte	0x6289
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1473
+	.4byte	0x26b9
+	.4byte	0x62a7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1474
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1476
+	.4byte	0x6828
+	.4byte	0x62c4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1478
+	.4byte	0x236c
+	.4byte	0x62d8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1479
+	.4byte	0x6739
+	.uleb128 0x44
+	.4byte	.LVL1481
+	.4byte	0x67c5
+	.uleb128 0x32
+	.4byte	.LVL1482
+	.4byte	0x230c
+	.4byte	0x6302
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1483
+	.4byte	0x230c
+	.4byte	0x631c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1485
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1486
+	.4byte	0x2464
+	.4byte	0x6343
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1487
+	.4byte	0x251a
+	.4byte	0x6366
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1488
+	.4byte	0x6828
+	.4byte	0x637a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1493
+	.4byte	0x6828
+	.uleb128 0x32
+	.4byte	.LVL1496
+	.4byte	0x2464
+	.4byte	0x639b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1497
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1498
+	.4byte	0x6828
+	.uleb128 0x44
+	.4byte	.LVL1499
+	.4byte	0x65f0
+	.uleb128 0x44
+	.4byte	.LVL1501
+	.4byte	0x65f0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x11b9
+	.uleb128 0x45
+	.4byte	.LASF811
+	.byte	0x4
+	.2byte	0x116
+	.4byte	0x50
+	.4byte	.LFB233
+	.4byte	.LFE233-.LFB233
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6437
+	.uleb128 0x5e
+	.ascii	"die\000"
+	.byte	0x4
+	.2byte	0x118
+	.4byte	0xdc5
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x50
+	.ascii	"blk\000"
+	.byte	0x4
+	.2byte	0x119
+	.4byte	0xdba
+	.4byte	.LLST155
+	.uleb128 0x51
+	.4byte	.LASF812
+	.byte	0x4
+	.2byte	0x11a
+	.4byte	0xdc5
+	.4byte	.LLST156
+	.uleb128 0x28
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x11b
+	.4byte	0x63c0
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x34
+	.4byte	.LVL580
+	.4byte	0x26b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF813
+	.byte	0x4
+	.byte	0xac
+	.4byte	0x50
+	.4byte	.LFB232
+	.4byte	.LFE232-.LFB232
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6566
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0xae
+	.4byte	0xdc5
+	.4byte	.LLST342
+	.uleb128 0x3b
+	.ascii	"blk\000"
+	.byte	0x4
+	.byte	0xaf
+	.4byte	0xdba
+	.4byte	.LLST343
+	.uleb128 0x30
+	.4byte	.LASF705
+	.byte	0x4
+	.byte	0xb0
+	.4byte	0xddb
+	.4byte	.LLST344
+	.uleb128 0x30
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0xb1
+	.4byte	0x63c0
+	.4byte	.LLST345
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x6576
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9058
+	.uleb128 0x44
+	.4byte	.LVL1435
+	.4byte	0x65bc
+	.uleb128 0x32
+	.4byte	.LVL1437
+	.4byte	0x26b9
+	.4byte	0x64c0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1438
+	.4byte	0x26b9
+	.4byte	0x64de
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1440
+	.4byte	0x26b9
+	.4byte	0x64fc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1441
+	.4byte	0x6011
+	.4byte	0x650f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1443
+	.4byte	0x9222
+	.4byte	0x6535
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR165
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xfe
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1444
+	.4byte	0x7a7c
+	.uleb128 0x32
+	.4byte	.LVL1452
+	.4byte	0x26b9
+	.4byte	0x655c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1457
+	.4byte	0x22a6
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x6576
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xa
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x6566
+	.uleb128 0x2b
+	.4byte	.LASF814
+	.byte	0x4
+	.byte	0x9c
+	.4byte	0xdba
+	.4byte	.LFB231
+	.4byte	.LFE231-.LFB231
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x65bc
+	.uleb128 0x3b
+	.ascii	"blk\000"
+	.byte	0x4
+	.byte	0x9e
+	.4byte	0xdba
+	.4byte	.LLST22
+	.uleb128 0x30
+	.4byte	.LASF815
+	.byte	0x4
+	.byte	0x9f
+	.4byte	0xdba
+	.4byte	.LLST23
+	.uleb128 0x44
+	.4byte	.LVL59
+	.4byte	0x67c5
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF816
+	.byte	0x4
+	.byte	0x94
+	.4byte	.LFB230
+	.4byte	.LFE230-.LFB230
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x65f0
+	.uleb128 0x2d
+	.4byte	.LVL767
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR37+12
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF817
+	.byte	0x4
+	.byte	0x4f
+	.4byte	0x50
+	.4byte	.LFB229
+	.4byte	.LFE229-.LFB229
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6739
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x51
+	.4byte	0x50
+	.4byte	.LLST288
+	.uleb128 0x30
+	.4byte	.LASF818
+	.byte	0x4
+	.byte	0x52
+	.4byte	0x50
+	.4byte	.LLST289
+	.uleb128 0x30
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0x53
+	.4byte	0x63c0
+	.4byte	.LLST290
+	.uleb128 0x30
+	.4byte	.LASF721
+	.byte	0x4
+	.byte	0x54
+	.4byte	0xdba
+	.4byte	.LLST291
+	.uleb128 0x54
+	.4byte	.LASF819
+	.byte	0x4
+	.byte	0x67
+	.uleb128 0x69
+	.4byte	.LASF574
+	.4byte	0x26b4
+	.uleb128 0x32
+	.4byte	.LVL1162
+	.4byte	0x230c
+	.4byte	0x6667
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1165
+	.4byte	0x230c
+	.4byte	0x6686
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1167
+	.4byte	0x9222
+	.4byte	0x669d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC94
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1168
+	.4byte	0x251a
+	.4byte	0x66c0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1169
+	.4byte	0x2464
+	.4byte	0x66d8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1170
+	.4byte	0x251a
+	.4byte	0x66fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1172
+	.4byte	0x9222
+	.4byte	0x6712
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC95
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1173
+	.4byte	0x9222
+	.4byte	0x672f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC96
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1176
+	.4byte	0x22a6
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LASF820
+	.byte	0x4
+	.byte	0x41
+	.4byte	.LFB228
+	.4byte	.LFE228-.LFB228
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x67bd
+	.uleb128 0x2c
+	.4byte	.LASF753
+	.byte	0x4
+	.byte	0x41
+	.4byte	0x10e9
+	.4byte	.LLST194
+	.uleb128 0x2c
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x41
+	.4byte	0xff2
+	.4byte	.LLST195
+	.uleb128 0x31
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x43
+	.4byte	0xdc5
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x3b93
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.9015
+	.uleb128 0x32
+	.4byte	.LVL764
+	.4byte	0x230c
+	.4byte	0x679d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL765
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4a
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.4byte	.LASF822
+	.byte	0x4
+	.byte	0x26
+	.byte	0x1
+	.uleb128 0x39
+	.4byte	.LASF823
+	.byte	0x4
+	.byte	0x17
+	.4byte	0x50
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6828
+	.uleb128 0x2c
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x17
+	.4byte	0xdba
+	.4byte	.LLST17
+	.uleb128 0x3b
+	.ascii	"die\000"
+	.byte	0x4
+	.byte	0x19
+	.4byte	0xdc5
+	.4byte	.LLST18
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x1a
+	.4byte	0xdc5
+	.4byte	.LLST19
+	.uleb128 0x30
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x1b
+	.4byte	0xff2
+	.4byte	.LLST20
+	.uleb128 0x30
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x1c
+	.4byte	0xdba
+	.4byte	.LLST21
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF824
+	.byte	0x4
+	.byte	0x4
+	.4byte	0x50
+	.4byte	.LFB225
+	.4byte	.LFE225-.LFB225
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x689d
+	.uleb128 0x2c
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x4
+	.4byte	0xdba
+	.4byte	.LLST13
+	.uleb128 0x3b
+	.ascii	"die\000"
+	.byte	0x4
+	.byte	0x6
+	.4byte	0xdc5
+	.4byte	.LLST14
+	.uleb128 0x30
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x7
+	.4byte	0xff2
+	.4byte	.LLST15
+	.uleb128 0x30
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x8
+	.4byte	0xdba
+	.4byte	.LLST16
+	.uleb128 0x34
+	.4byte	.LVL45
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.LASF884
+	.byte	0x3
+	.2byte	0x4bd
+	.4byte	0xdc5
+	.4byte	.LFB224
+	.4byte	.LFE224-.LFB224
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x45
+	.4byte	.LASF825
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0x50
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6922
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0xb5
+	.4byte	.LLST443
+	.uleb128 0x4f
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0xb5
+	.4byte	.LLST444
+	.uleb128 0x5a
+	.ascii	"buf\000"
+	.byte	0x3
+	.2byte	0x4b8
+	.4byte	0x6922
+	.4byte	.LLST445
+	.uleb128 0x2d
+	.4byte	.LVL1969
+	.4byte	0x6a9b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0x90
+	.uleb128 0x45
+	.4byte	.LASF826
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x50
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6997
+	.uleb128 0x4f
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb5
+	.4byte	.LLST425
+	.uleb128 0x4f
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb5
+	.4byte	.LLST426
+	.uleb128 0x5a
+	.ascii	"buf\000"
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x6922
+	.4byte	.LLST427
+	.uleb128 0x2d
+	.4byte	.LVL1868
+	.4byte	0x70a1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF827
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0x50
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6a9b
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdc5
+	.4byte	.LLST383
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdc5
+	.4byte	.LLST384
+	.uleb128 0x51
+	.4byte	.LASF734
+	.byte	0x3
+	.2byte	0x486
+	.4byte	0xdba
+	.4byte	.LLST385
+	.uleb128 0x50
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x487
+	.4byte	0xdba
+	.4byte	.LLST386
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x3
+	.2byte	0x488
+	.4byte	0xdc5
+	.4byte	.LLST387
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x28
+	.4byte	.LASF640
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x51
+	.4byte	.LASF629
+	.byte	0x3
+	.2byte	0x48a
+	.4byte	0xdba
+	.4byte	.LLST388
+	.uleb128 0x44
+	.4byte	.LVL1633
+	.4byte	0x6e77
+	.uleb128 0x44
+	.4byte	.LVL1643
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL1644
+	.4byte	0x4d0e
+	.uleb128 0x32
+	.4byte	.LVL1645
+	.4byte	0x5212
+	.4byte	0x6a69
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1646
+	.4byte	0x5212
+	.4byte	0x6a88
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1647
+	.4byte	0x6122
+	.uleb128 0x44
+	.4byte	.LVL1648
+	.4byte	0x31f2
+	.byte	0
+	.uleb128 0x59
+	.4byte	.LASF828
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x50
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e77
+	.uleb128 0x5a
+	.ascii	"LUN\000"
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdaf
+	.4byte	.LLST428
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdc5
+	.4byte	.LLST429
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdc5
+	.4byte	.LLST430
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x50e9
+	.4byte	.LLST431
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x3c3
+	.4byte	0x2a63
+	.4byte	.LLST432
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdc5
+	.4byte	.LLST433
+	.uleb128 0x51
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdc5
+	.4byte	.LLST434
+	.uleb128 0x51
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdc5
+	.4byte	.LLST435
+	.uleb128 0x28
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x50
+	.ascii	"ppa\000"
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdc5
+	.4byte	.LLST436
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdc5
+	.4byte	.LLST437
+	.uleb128 0x51
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdc5
+	.4byte	.LLST438
+	.uleb128 0x51
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdc5
+	.4byte	.LLST439
+	.uleb128 0x51
+	.4byte	.LASF832
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdc5
+	.4byte	.LLST440
+	.uleb128 0x51
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdc5
+	.4byte	.LLST441
+	.uleb128 0x51
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x3c8
+	.4byte	0x1d79
+	.4byte	.LLST442
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x530e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.8951
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x190
+	.4byte	0x6c38
+	.uleb128 0x28
+	.4byte	.LASF601
+	.byte	0x3
+	.2byte	0x43d
+	.4byte	0xde6
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x32
+	.4byte	.LVL1952
+	.4byte	0x26b9
+	.4byte	0x6bf7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1954
+	.4byte	0x9222
+	.4byte	0x6c14
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC105
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1955
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x44a
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1873
+	.4byte	0x50ef
+	.4byte	0x6c5d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x78
+	.sleb128 256
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1885
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1887
+	.4byte	0x9222
+	.4byte	0x6c8d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3f4
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1888
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1890
+	.4byte	0x33c9
+	.4byte	0x6cad
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR52
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1891
+	.4byte	0x33c9
+	.4byte	0x6cc4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1893
+	.4byte	0x33c9
+	.4byte	0x6cd8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1896
+	.4byte	0x9222
+	.4byte	0x6cff
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x415
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1905
+	.4byte	0x2996
+	.4byte	0x6d1e
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x91
+	.sleb128 -76
+	.byte	0x6
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1907
+	.4byte	0x5acd
+	.4byte	0x6d31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1908
+	.4byte	0x2bbf
+	.uleb128 0x32
+	.4byte	.LVL1909
+	.4byte	0x2996
+	.4byte	0x6d52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1910
+	.4byte	0x2996
+	.4byte	0x6d6a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1919
+	.4byte	0x22a6
+	.4byte	0x6d86
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1928
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1930
+	.4byte	0x33c9
+	.4byte	0x6da3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1933
+	.4byte	0x5212
+	.4byte	0x6dc2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1934
+	.4byte	0x32d7
+	.4byte	0x6dd6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1939
+	.4byte	0x230c
+	.4byte	0x6df1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -84
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1948
+	.4byte	0x9222
+	.4byte	0x6e18
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x45f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1953
+	.4byte	0x22a6
+	.uleb128 0x32
+	.4byte	.LVL1957
+	.4byte	0x230c
+	.4byte	0x6e34
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1960
+	.4byte	0x6ea6
+	.4byte	0x6e53
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1961
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR180
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF834
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x50
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6ea6
+	.uleb128 0x34
+	.4byte	.LVL1624
+	.4byte	0x6ea6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF835
+	.byte	0x3
+	.2byte	0x387
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x708c
+	.uleb128 0x5a
+	.ascii	"req\000"
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x19f9
+	.4byte	.LLST375
+	.uleb128 0x4f
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdc5
+	.4byte	.LLST376
+	.uleb128 0x4f
+	.4byte	.LASF836
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdc5
+	.4byte	.LLST377
+	.uleb128 0x4f
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x1d79
+	.4byte	.LLST378
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x389
+	.4byte	0xdc5
+	.4byte	.LLST379
+	.uleb128 0x5e
+	.ascii	"ppa\000"
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x51
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdc5
+	.4byte	.LLST380
+	.uleb128 0x51
+	.4byte	.LASF623
+	.byte	0x3
+	.2byte	0x38b
+	.4byte	0xdba
+	.4byte	.LLST381
+	.uleb128 0x51
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x38c
+	.4byte	0x2a63
+	.4byte	.LLST382
+	.uleb128 0x60
+	.4byte	.LASF687
+	.byte	0x3
+	.2byte	0x38d
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x709c
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.8923
+	.uleb128 0x32
+	.4byte	.LVL1605
+	.4byte	0x251a
+	.4byte	0x6f85
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1606
+	.4byte	0x6122
+	.uleb128 0x32
+	.4byte	.LVL1608
+	.4byte	0x33c9
+	.4byte	0x6fa2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1609
+	.4byte	0x2b35
+	.uleb128 0x32
+	.4byte	.LVL1610
+	.4byte	0x32d7
+	.4byte	0x6fbf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1611
+	.4byte	0x251a
+	.4byte	0x6fdd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1612
+	.4byte	0x9222
+	.4byte	0x7004
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR170
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3a5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1613
+	.4byte	0x5212
+	.4byte	0x701d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1615
+	.4byte	0x6122
+	.4byte	0x7037
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1618
+	.4byte	0x9222
+	.4byte	0x7054
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC103
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1619
+	.4byte	0x31f2
+	.4byte	0x7068
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1622
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR170
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3b4
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xea
+	.4byte	0x709c
+	.uleb128 0xe
+	.4byte	0xd6
+	.byte	0xc
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x708c
+	.uleb128 0x59
+	.4byte	.LASF837
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x50
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7294
+	.uleb128 0x5a
+	.ascii	"LUN\000"
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdaf
+	.4byte	.LLST408
+	.uleb128 0x4f
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdc5
+	.4byte	.LLST409
+	.uleb128 0x4f
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdc5
+	.4byte	.LLST410
+	.uleb128 0x4f
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x50e9
+	.4byte	.LLST411
+	.uleb128 0x50
+	.ascii	"ret\000"
+	.byte	0x3
+	.2byte	0x32f
+	.4byte	0x50
+	.4byte	.LLST412
+	.uleb128 0x51
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdc5
+	.4byte	.LLST413
+	.uleb128 0x51
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdc5
+	.4byte	.LLST414
+	.uleb128 0x51
+	.4byte	.LASF838
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdc5
+	.4byte	.LLST415
+	.uleb128 0x50
+	.ascii	"lpa\000"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdc5
+	.4byte	.LLST416
+	.uleb128 0x5e
+	.ascii	"ppa\000"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x50
+	.ascii	"n\000"
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdc5
+	.4byte	.LLST417
+	.uleb128 0x51
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdc5
+	.4byte	.LLST418
+	.uleb128 0x51
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdc5
+	.4byte	.LLST419
+	.uleb128 0x51
+	.4byte	.LASF839
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdc5
+	.4byte	.LLST420
+	.uleb128 0x51
+	.4byte	.LASF840
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdc5
+	.4byte	.LLST421
+	.uleb128 0x51
+	.4byte	.LASF841
+	.byte	0x3
+	.2byte	0x335
+	.4byte	0xdc5
+	.4byte	.LLST422
+	.uleb128 0x51
+	.4byte	.LASF842
+	.byte	0x3
+	.2byte	0x336
+	.4byte	0xdc5
+	.4byte	.LLST423
+	.uleb128 0x5f
+	.4byte	.LBB295
+	.4byte	.LBE295-.LBB295
+	.4byte	0x71f8
+	.uleb128 0x51
+	.4byte	.LASF608
+	.byte	0x3
+	.2byte	0x37a
+	.4byte	0xdba
+	.4byte	.LLST424
+	.uleb128 0x44
+	.4byte	.LVL1860
+	.4byte	0x6122
+	.uleb128 0x44
+	.4byte	.LVL1861
+	.4byte	0x2bbf
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1817
+	.4byte	0x4fd7
+	.4byte	0x721a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x76
+	.sleb128 256
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1823
+	.4byte	0x6e77
+	.uleb128 0x32
+	.4byte	.LVL1832
+	.4byte	0x2996
+	.4byte	0x723b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1834
+	.4byte	0x5212
+	.4byte	0x725a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1840
+	.4byte	0x26b9
+	.4byte	0x7274
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1842
+	.4byte	0x22a6
+	.uleb128 0x34
+	.4byte	.LVL1849
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF843
+	.byte	0x3
+	.2byte	0x325
+	.4byte	0x50
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x72b8
+	.uleb128 0x44
+	.4byte	.LVL1629
+	.4byte	0x72b8
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF844
+	.byte	0x3
+	.2byte	0x31c
+	.4byte	0x50
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7301
+	.uleb128 0x44
+	.4byte	.LVL1625
+	.4byte	0x6e77
+	.uleb128 0x44
+	.4byte	.LVL1626
+	.4byte	0x5313
+	.uleb128 0x32
+	.4byte	.LVL1627
+	.4byte	0x4f7f
+	.4byte	0x72f7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1628
+	.4byte	0x4d0e
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF845
+	.byte	0x3
+	.2byte	0x2e6
+	.4byte	0x50
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x73cf
+	.uleb128 0x28
+	.4byte	.LASF846
+	.byte	0x3
+	.2byte	0x2e8
+	.4byte	0x73cf
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	g_nand_phy_info
+	.byte	0x9f
+	.uleb128 0x55
+	.4byte	.LASF847
+	.byte	0x3
+	.2byte	0x2f3
+	.4byte	.LDL2
+	.uleb128 0x5f
+	.4byte	.LBB305
+	.4byte	.LBE305-.LBB305
+	.4byte	0x736a
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x310
+	.4byte	0xdc5
+	.4byte	.LLST452
+	.uleb128 0x34
+	.4byte	.LVL2072
+	.4byte	0x2996
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2064
+	.4byte	0x9222
+	.4byte	0x738a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC71
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC70
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2065
+	.4byte	0x7a20
+	.4byte	0x73a1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2066
+	.4byte	0x77c3
+	.uleb128 0x44
+	.4byte	.LVL2067
+	.4byte	0x7713
+	.uleb128 0x44
+	.4byte	.LVL2068
+	.4byte	0x5fb8
+	.uleb128 0x44
+	.4byte	.LVL2069
+	.4byte	0x6437
+	.uleb128 0x44
+	.4byte	.LVL2070
+	.4byte	0x3937
+	.byte	0
+	.uleb128 0x8
+	.byte	0x4
+	.4byte	0xed2
+	.uleb128 0x59
+	.4byte	.LASF848
+	.byte	0x3
+	.2byte	0x26e
+	.4byte	0x50
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x752b
+	.uleb128 0x51
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdba
+	.4byte	.LLST448
+	.uleb128 0x51
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdba
+	.4byte	.LLST449
+	.uleb128 0x51
+	.4byte	.LASF850
+	.byte	0x3
+	.2byte	0x271
+	.4byte	0xdba
+	.4byte	.LLST450
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x272
+	.4byte	0xdba
+	.4byte	.LLST451
+	.uleb128 0x55
+	.4byte	.LASF851
+	.byte	0x3
+	.2byte	0x2bc
+	.4byte	.L1802
+	.uleb128 0x55
+	.4byte	.LASF852
+	.byte	0x3
+	.2byte	0x2cc
+	.4byte	.L1804
+	.uleb128 0x44
+	.4byte	.LVL2018
+	.4byte	0x5fb8
+	.uleb128 0x44
+	.4byte	.LVL2019
+	.4byte	0x6437
+	.uleb128 0x44
+	.4byte	.LVL2020
+	.4byte	0x61d9
+	.uleb128 0x44
+	.4byte	.LVL2034
+	.4byte	0x65f0
+	.uleb128 0x32
+	.4byte	.LVL2035
+	.4byte	0x230c
+	.4byte	0x747c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2036
+	.4byte	0x230c
+	.4byte	0x7490
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2037
+	.4byte	0x3ec7
+	.4byte	0x74a4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2041
+	.4byte	0x752b
+	.4byte	0x74bd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2048
+	.4byte	0x7a7c
+	.uleb128 0x44
+	.4byte	.LVL2049
+	.4byte	0x5fb8
+	.uleb128 0x32
+	.4byte	.LVL2052
+	.4byte	0x752b
+	.4byte	0x74e8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2055
+	.4byte	0x752b
+	.4byte	0x74fb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2059
+	.4byte	0x3ec7
+	.4byte	0x750f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2060
+	.4byte	0x5dbf
+	.uleb128 0x44
+	.4byte	.LVL2061
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL2062
+	.4byte	0x3937
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF853
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0x50
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x76e9
+	.uleb128 0x4f
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdba
+	.4byte	.LLST179
+	.uleb128 0x4f
+	.4byte	.LASF854
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdaf
+	.4byte	.LLST180
+	.uleb128 0x51
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdba
+	.4byte	.LLST181
+	.uleb128 0x51
+	.4byte	.LASF569
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdba
+	.4byte	.LLST182
+	.uleb128 0x51
+	.4byte	.LASF592
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdba
+	.4byte	.LLST183
+	.uleb128 0x51
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdba
+	.4byte	.LLST184
+	.uleb128 0x51
+	.4byte	.LASF855
+	.byte	0x3
+	.2byte	0x213
+	.4byte	0xdba
+	.4byte	.LLST185
+	.uleb128 0x51
+	.4byte	.LASF856
+	.byte	0x3
+	.2byte	0x214
+	.4byte	0xdba
+	.4byte	.LLST186
+	.uleb128 0x51
+	.4byte	.LASF857
+	.byte	0x3
+	.2byte	0x215
+	.4byte	0xdba
+	.4byte	.LLST187
+	.uleb128 0x51
+	.4byte	.LASF858
+	.byte	0x3
+	.2byte	0x216
+	.4byte	0xdba
+	.4byte	.LLST188
+	.uleb128 0x55
+	.4byte	.LASF859
+	.byte	0x3
+	.2byte	0x240
+	.4byte	.L508
+	.uleb128 0x32
+	.4byte	.LVL643
+	.4byte	0x2464
+	.4byte	0x760b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL651
+	.4byte	0x251a
+	.4byte	0x7631
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL658
+	.4byte	0x2464
+	.4byte	0x764b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL660
+	.4byte	0x6192
+	.4byte	0x7661
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL662
+	.4byte	0x76e9
+	.4byte	0x7675
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL663
+	.4byte	0x67c5
+	.4byte	0x7689
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL674
+	.4byte	0x6828
+	.uleb128 0x32
+	.4byte	.LVL678
+	.4byte	0x6192
+	.4byte	0x76a8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL680
+	.4byte	0x76e9
+	.4byte	0x76bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL681
+	.4byte	0x67c5
+	.4byte	0x76d0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL689
+	.4byte	0x6828
+	.uleb128 0x34
+	.4byte	.LVL693
+	.4byte	0x5f01
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF860
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0x50
+	.byte	0x1
+	.4byte	0x7713
+	.uleb128 0x47
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0xdba
+	.uleb128 0x48
+	.4byte	.LASF861
+	.byte	0x3
+	.2byte	0x203
+	.4byte	0xdba
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF862
+	.byte	0x3
+	.2byte	0x1ec
+	.4byte	0x50
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x77c3
+	.uleb128 0x32
+	.4byte	.LVL1039
+	.4byte	0x230c
+	.4byte	0x7741
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1040
+	.4byte	0x230c
+	.4byte	0x7755
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1041
+	.4byte	0x230c
+	.4byte	0x7769
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1042
+	.4byte	0x230c
+	.4byte	0x778c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR79
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1043
+	.4byte	0x230c
+	.4byte	0x77b0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR83
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1044
+	.4byte	0x31cf
+	.uleb128 0x44
+	.4byte	.LVL1045
+	.4byte	0x4719
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LASF863
+	.byte	0x3
+	.2byte	0x116
+	.4byte	0x50
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7a20
+	.uleb128 0x50
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x118
+	.4byte	0xdc5
+	.4byte	.LLST192
+	.uleb128 0x51
+	.4byte	.LASF864
+	.byte	0x3
+	.2byte	0x119
+	.4byte	0xdc5
+	.4byte	.LLST193
+	.uleb128 0x3d
+	.4byte	.LASF574
+	.4byte	0x6576
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.8799
+	.uleb128 0x44
+	.4byte	.LVL697
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL698
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL700
+	.4byte	0x2928
+	.4byte	0x7830
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL701
+	.4byte	0x2928
+	.4byte	0x7844
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL702
+	.4byte	0x2928
+	.4byte	0x7858
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL703
+	.4byte	0x2928
+	.4byte	0x786c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL704
+	.4byte	0x2928
+	.4byte	0x7880
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL706
+	.4byte	0x2928
+	.4byte	0x7894
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL707
+	.4byte	0x2928
+	.4byte	0x78a8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL708
+	.4byte	0x2928
+	.4byte	0x78bc
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL709
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL710
+	.4byte	0x2928
+	.4byte	0x78d9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL711
+	.4byte	0x2928
+	.4byte	0x78ed
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL713
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL715
+	.4byte	0x2928
+	.4byte	0x790a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL716
+	.4byte	0x2928
+	.4byte	0x7920
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL717
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL718
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL719
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL722
+	.4byte	0x2928
+	.4byte	0x794f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL723
+	.4byte	0x2928
+	.4byte	0x7963
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL727
+	.4byte	0x2928
+	.4byte	0x7977
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL728
+	.4byte	0x2928
+	.4byte	0x798b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL730
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL731
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL732
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL733
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL734
+	.4byte	0x2928
+	.uleb128 0x32
+	.4byte	.LVL735
+	.4byte	0x230c
+	.4byte	0x79cd
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL737
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL740
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL743
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL746
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL749
+	.4byte	0x2928
+	.uleb128 0x44
+	.4byte	.LVL753
+	.4byte	0x2928
+	.uleb128 0x34
+	.4byte	.LVL757
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC82
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR138
+	.byte	0
+	.byte	0
+	.uleb128 0x39
+	.4byte	.LASF865
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x50
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7a7c
+	.uleb128 0x2c
+	.4byte	.LASF846
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x73cf
+	.4byte	.LLST10
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0xb8
+	.4byte	0xdc5
+	.4byte	.LLST11
+	.uleb128 0x44
+	.4byte	.LVL30
+	.4byte	0x7abd
+	.uleb128 0x32
+	.4byte	.LVL31
+	.4byte	0x7abd
+	.4byte	0x7a72
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL35
+	.4byte	0x7a7c
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF866
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0x50
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7aa5
+	.uleb128 0x2c
+	.4byte	.LASF867
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0xdba
+	.4byte	.LLST9
+	.byte	0
+	.uleb128 0x64
+	.4byte	.LASF868
+	.byte	0x3
+	.byte	0x9e
+	.byte	0x1
+	.4byte	0x7abd
+	.uleb128 0x36
+	.4byte	.LASF869
+	.byte	0x3
+	.byte	0x9e
+	.4byte	0xdc5
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF870
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdba
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7b02
+	.uleb128 0x2f
+	.ascii	"num\000"
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdc5
+	.4byte	.LLST6
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0x81
+	.4byte	0xdba
+	.4byte	.LLST7
+	.uleb128 0x30
+	.4byte	.LASF871
+	.byte	0x3
+	.byte	0x82
+	.4byte	0xdc5
+	.4byte	.LLST8
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF872
+	.byte	0x3
+	.byte	0x71
+	.4byte	0x50
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7b70
+	.uleb128 0x2c
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0x71
+	.4byte	0xf6
+	.4byte	.LLST111
+	.uleb128 0x3b
+	.ascii	"buf\000"
+	.byte	0x3
+	.byte	0x73
+	.4byte	0xf6
+	.4byte	.LLST112
+	.uleb128 0x32
+	.4byte	.LVL451
+	.4byte	0x9238
+	.4byte	0x7b5f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC71
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC70
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL453
+	.4byte	0x7b70
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF873
+	.byte	0x3
+	.byte	0xb
+	.4byte	0x50
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x83c6
+	.uleb128 0x2c
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0xb
+	.4byte	0xf6
+	.4byte	.LLST106
+	.uleb128 0x3b
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0xd
+	.4byte	0x50
+	.4byte	.LLST107
+	.uleb128 0x3b
+	.ascii	"buf\000"
+	.byte	0x3
+	.byte	0xe
+	.4byte	0xf6
+	.4byte	.LLST108
+	.uleb128 0x5f
+	.4byte	.LBB209
+	.4byte	.LBE209-.LBB209
+	.4byte	0x7c04
+	.uleb128 0x30
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x57
+	.4byte	0xdba
+	.4byte	.LLST109
+	.uleb128 0x32
+	.4byte	.LVL437
+	.4byte	0x5acd
+	.4byte	0x7be4
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL439
+	.4byte	0x9238
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC68
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LBB210
+	.4byte	.LBE210-.LBB210
+	.4byte	0x7c3d
+	.uleb128 0x30
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x60
+	.4byte	0xdba
+	.4byte	.LLST110
+	.uleb128 0x34
+	.4byte	.LVL447
+	.4byte	0x9238
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 -1
+	.byte	0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL302
+	.4byte	0x9238
+	.4byte	0x7c5a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL304
+	.4byte	0x9238
+	.4byte	0x7c77
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC3
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL306
+	.4byte	0x9238
+	.4byte	0x7c94
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC4
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL308
+	.4byte	0x9238
+	.4byte	0x7cb1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC5
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL310
+	.4byte	0x9238
+	.4byte	0x7cce
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL312
+	.4byte	0x9238
+	.4byte	0x7ceb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL314
+	.4byte	0x9238
+	.4byte	0x7d08
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL316
+	.4byte	0x9238
+	.4byte	0x7d25
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC9
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL318
+	.4byte	0x9238
+	.4byte	0x7d42
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC10
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL320
+	.4byte	0x9238
+	.4byte	0x7d5f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC11
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL322
+	.4byte	0x9238
+	.4byte	0x7d7c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC12
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL324
+	.4byte	0x9238
+	.4byte	0x7d99
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC13
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL326
+	.4byte	0x9238
+	.4byte	0x7db6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC14
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL328
+	.4byte	0x9238
+	.4byte	0x7dd3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC15
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL330
+	.4byte	0x9238
+	.4byte	0x7df0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC16
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL332
+	.4byte	0x9238
+	.4byte	0x7e0d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC17
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL334
+	.4byte	0x9238
+	.4byte	0x7e2a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL336
+	.4byte	0x9238
+	.4byte	0x7e47
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL338
+	.4byte	0x9238
+	.4byte	0x7e64
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC20
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL340
+	.4byte	0x9238
+	.4byte	0x7e81
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC21
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL342
+	.4byte	0x9238
+	.4byte	0x7e9e
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL344
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.4byte	.LC23
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL346
+	.4byte	0x9238
+	.4byte	0x7ed8
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL348
+	.4byte	0x9238
+	.4byte	0x7ef5
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL350
+	.4byte	0x9238
+	.4byte	0x7f12
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL352
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL354
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL356
+	.4byte	0x9238
+	.4byte	0x7f69
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL358
+	.4byte	0x9238
+	.4byte	0x7f86
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL360
+	.4byte	0x9238
+	.4byte	0x7fa3
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.4byte	.LC31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL362
+	.4byte	0x9238
+	.4byte	0x7fc0
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL364
+	.4byte	0x9238
+	.4byte	0x7fdd
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL366
+	.4byte	0x9238
+	.4byte	0x7ffa
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL368
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL370
+	.4byte	0x9238
+	.4byte	0x8034
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL372
+	.4byte	0x9238
+	.4byte	0x8051
+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL374
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL376
+	.4byte	0x9238
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL378
+	.4byte	0x9238
+	.4byte	0x80a8
+	.uleb128 0x2e
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL380
+	.4byte	0x9238
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+	.uleb128 0x2e
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL382
+	.4byte	0x9238
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+	.uleb128 0x2e
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL384
+	.4byte	0x9238
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+	.uleb128 0x2e
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+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL386
+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.uleb128 0x2e
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.4byte	0x9238
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+	.byte	0
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+	.byte	0
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+	.byte	0
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+	.4byte	0x9238
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+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC65
+	.byte	0
+	.uleb128 0x44
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+	.uleb128 0x32
+	.4byte	.LVL432
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x1
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x5
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+	.byte	0
+	.byte	0
+	.uleb128 0x6c
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+	.4byte	.LFE351-.LFB351
+	.uleb128 0x1
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+	.4byte	0x8420
+	.uleb128 0x5c
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+	.uleb128 0x5c
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+	.uleb128 0x5c
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+	.byte	0
+	.byte	0
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+	.uleb128 0x73
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+	.uleb128 0x1
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+	.uleb128 0x73
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+	.4byte	.LFE242-.LFB242
+	.uleb128 0x1
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+	.uleb128 0x70
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+	.4byte	.LFE248-.LFB248
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+	.uleb128 0x6e
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
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+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
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+	.uleb128 0x2e
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xbd
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+	.byte	0
+	.byte	0
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+	.byte	0
+	.uleb128 0x70
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+	.4byte	.LFE247-.LFB247
+	.uleb128 0x1
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+	.uleb128 0x5c
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+	.uleb128 0x5
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x70
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+	.4byte	.LFE255-.LFB255
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+	.uleb128 0x6e
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+	.uleb128 0x2
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+	.uleb128 0x3
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+	.sleb128 -100
+	.uleb128 0x76
+	.4byte	0x244c
+	.4byte	.LDL1
+	.uleb128 0x32
+	.4byte	.LVL1143
+	.4byte	0x230c
+	.4byte	0x89b9
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1144
+	.4byte	0x230c
+	.4byte	0x89d8
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5a
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1145
+	.4byte	0x2464
+	.4byte	0x89f7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1146
+	.4byte	0x251a
+	.4byte	0x8a1b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1148
+	.4byte	0x2464
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2ade
+	.4byte	.LFB320
+	.4byte	.LFE320-.LFB320
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8af2
+	.uleb128 0x5c
+	.4byte	0x2aef
+	.4byte	.LLST301
+	.uleb128 0x6e
+	.4byte	0x2afb
+	.uleb128 0x6e
+	.4byte	0x2b07
+	.uleb128 0x6e
+	.4byte	0x2b11
+	.uleb128 0x6e
+	.4byte	0x2b1b
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0xe8
+	.uleb128 0x6d
+	.4byte	0x2aef
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0xe8
+	.uleb128 0x6f
+	.4byte	0x8a55
+	.4byte	.LLST302
+	.uleb128 0x6f
+	.4byte	0x8a5a
+	.4byte	.LLST303
+	.uleb128 0x6f
+	.4byte	0x8a5f
+	.4byte	.LLST304
+	.uleb128 0x75
+	.4byte	0x8a64
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x44
+	.4byte	.LVL1226
+	.4byte	0x2b28
+	.uleb128 0x32
+	.4byte	.LVL1228
+	.4byte	0x6192
+	.4byte	0x8ab7
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1234
+	.4byte	0x9222
+	.4byte	0x8ad2
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1235
+	.4byte	0x6828
+	.4byte	0x8ae6
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1236
+	.4byte	0x65f0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x3297
+	.4byte	.LFB304
+	.4byte	.LFE304-.LFB304
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8bd2
+	.uleb128 0x5c
+	.4byte	0x32a8
+	.4byte	.LLST305
+	.uleb128 0x6e
+	.4byte	0x32b4
+	.uleb128 0x5f
+	.4byte	.LBB257
+	.4byte	.LBE257-.LBB257
+	.4byte	0x8bc8
+	.uleb128 0x5c
+	.4byte	0x32a8
+	.4byte	.LLST306
+	.uleb128 0x67
+	.4byte	.LBB258
+	.4byte	.LBE258-.LBB258
+	.uleb128 0x6e
+	.4byte	0x8b0e
+	.uleb128 0x32
+	.4byte	.LVL1246
+	.4byte	0x5bca
+	.4byte	0x8b54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR42
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1247
+	.4byte	0x9222
+	.4byte	0x8b7b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR159
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa88
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1248
+	.4byte	0x375c
+	.4byte	0x8b8f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1249
+	.4byte	0x2ade
+	.4byte	0x8ba3
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1250
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR159
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa8b
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1254
+	.4byte	0x5a4e
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x4e75
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8caa
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x108
+	.uleb128 0x6f
+	.4byte	0x4e83
+	.4byte	.LLST309
+	.uleb128 0x75
+	.4byte	0x4e8f
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -56
+	.uleb128 0x6f
+	.4byte	0x4e9b
+	.4byte	.LLST310
+	.uleb128 0x75
+	.4byte	0x4ea7
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x6f
+	.4byte	0x4eb3
+	.4byte	.LLST311
+	.uleb128 0x32
+	.4byte	.LVL1267
+	.4byte	0x5212
+	.4byte	0x8c35
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1269
+	.4byte	0x26b9
+	.4byte	0x8c54
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1273
+	.4byte	0x230c
+	.4byte	0x8c68
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1275
+	.4byte	0x32d7
+	.4byte	0x8c7c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1276
+	.4byte	0x251a
+	.4byte	0x8c9f
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1277
+	.4byte	0x31f2
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x3da3
+	.4byte	.LFB289
+	.4byte	.LFE289-.LFB289
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8cdb
+	.uleb128 0x2d
+	.4byte	.LVL1525
+	.4byte	0x50ef
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR83
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x4aff
+	.4byte	.LFB274
+	.4byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8d32
+	.uleb128 0x32
+	.4byte	.LVL1551
+	.4byte	0x4fd7
+	.4byte	0x8d02
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1552
+	.4byte	0x9222
+	.4byte	0x8d22
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC71
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC100
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1553
+	.4byte	0x230c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2d2c
+	.4byte	.LFB314
+	.4byte	.LFE314-.LFB314
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8d80
+	.uleb128 0x32
+	.4byte	.LVL1688
+	.4byte	0x2d35
+	.4byte	0x8d59
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1689
+	.4byte	0x4ec1
+	.4byte	0x8d70
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1690
+	.4byte	0x2edb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x2996
+	.4byte	.LFB322
+	.4byte	.LFE322-.LFB322
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x909f
+	.uleb128 0x5c
+	.4byte	0x29a7
+	.4byte	.LLST396
+	.uleb128 0x5c
+	.4byte	0x29b3
+	.4byte	.LLST397
+	.uleb128 0x74
+	.4byte	0x29bf
+	.byte	0x1
+	.uleb128 0x6e
+	.4byte	0x29cb
+	.uleb128 0x6e
+	.4byte	0x29d7
+	.uleb128 0x77
+	.4byte	0x29e3
+	.sleb128 -1
+	.uleb128 0x6e
+	.4byte	0x29ef
+	.uleb128 0x6e
+	.4byte	0x29fb
+	.uleb128 0x6e
+	.4byte	0x2a07
+	.uleb128 0x6e
+	.4byte	0x2a13
+	.uleb128 0x6e
+	.4byte	0x2a1f
+	.uleb128 0x6e
+	.4byte	0x2a2b
+	.uleb128 0x6e
+	.4byte	0x2a47
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x158
+	.4byte	0x908f
+	.uleb128 0x5c
+	.4byte	0x29b3
+	.4byte	.LLST398
+	.uleb128 0x5c
+	.4byte	0x29a7
+	.4byte	.LLST399
+	.uleb128 0x72
+	.4byte	.Ldebug_ranges0+0x158
+	.uleb128 0x6e
+	.4byte	0x8da5
+	.uleb128 0x6f
+	.4byte	0x8dab
+	.4byte	.LLST400
+	.uleb128 0x75
+	.4byte	0x8db0
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x6e
+	.4byte	0x8db5
+	.uleb128 0x6f
+	.4byte	0x8dbb
+	.4byte	.LLST401
+	.uleb128 0x6f
+	.4byte	0x8dc0
+	.4byte	.LLST402
+	.uleb128 0x6f
+	.4byte	0x8dc5
+	.4byte	.LLST403
+	.uleb128 0x6f
+	.4byte	0x8dca
+	.4byte	.LLST404
+	.uleb128 0x6f
+	.4byte	0x8dcf
+	.4byte	.LLST405
+	.uleb128 0x6f
+	.4byte	0x8dd4
+	.4byte	.LLST406
+	.uleb128 0x78
+	.4byte	0x2a37
+	.uleb128 0x78
+	.4byte	0x2a3f
+	.uleb128 0x6e
+	.4byte	0x8dd9
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x178
+	.4byte	0x8ec4
+	.uleb128 0x6f
+	.4byte	0x2a55
+	.4byte	.LLST407
+	.uleb128 0x44
+	.4byte	.LVL1716
+	.4byte	0x377a
+	.uleb128 0x32
+	.4byte	.LVL1719
+	.4byte	0x5acd
+	.4byte	0x8e8d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1721
+	.4byte	0x5acd
+	.4byte	0x8ea1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1724
+	.4byte	0x2b28
+	.uleb128 0x34
+	.4byte	.LVL1736
+	.4byte	0x9222
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC104
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1747
+	.4byte	0x3101
+	.uleb128 0x32
+	.4byte	.LVL1748
+	.4byte	0x3ec7
+	.4byte	0x8ee1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1749
+	.4byte	0x5acd
+	.4byte	0x8ef5
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1752
+	.4byte	0x2a7e
+	.uleb128 0x44
+	.4byte	.LVL1755
+	.4byte	0x5acd
+	.uleb128 0x32
+	.4byte	.LVL1757
+	.4byte	0x31f2
+	.4byte	0x8f1b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1762
+	.4byte	0x3101
+	.4byte	0x8f32
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1763
+	.4byte	0x31f2
+	.4byte	0x8f46
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1764
+	.4byte	0x9222
+	.4byte	0x8f6d
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x296
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1765
+	.4byte	0x9222
+	.4byte	0x8f94
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x297
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1766
+	.4byte	0x9222
+	.4byte	0x8fbb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x298
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1767
+	.4byte	0x3ec7
+	.4byte	0x8fcf
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1768
+	.4byte	0x2a7e
+	.uleb128 0x32
+	.4byte	.LVL1778
+	.4byte	0x26b9
+	.4byte	0x8fee
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1787
+	.4byte	0x9222
+	.4byte	0x9015
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2bc
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL1788
+	.4byte	0x5212
+	.4byte	0x9034
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1790
+	.4byte	0x2ca7
+	.uleb128 0x32
+	.4byte	.LVL1791
+	.4byte	0x3137
+	.4byte	0x9057
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1792
+	.4byte	0x2c03
+	.uleb128 0x44
+	.4byte	.LVL1797
+	.4byte	0x2c03
+	.uleb128 0x44
+	.4byte	.LVL1798
+	.4byte	0x3297
+	.uleb128 0x44
+	.4byte	.LVL1799
+	.4byte	0x6e77
+	.uleb128 0x44
+	.4byte	.LVL1800
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL1801
+	.4byte	0x4d0e
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.4byte	.LVL1730
+	.4byte	0x2edb
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.4byte	0x3937
+	.4byte	.LFB295
+	.4byte	.LFE295-.LFB295
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x91ff
+	.uleb128 0x74
+	.4byte	0x3948
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LBB302
+	.4byte	.LBE302-.LBB302
+	.4byte	0x9195
+	.uleb128 0x6e
+	.4byte	0x90b2
+	.uleb128 0x3e
+	.4byte	.Ldebug_ranges0+0x1a8
+	.4byte	0x90dd
+	.uleb128 0x6f
+	.4byte	0x3953
+	.4byte	.LLST447
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2002
+	.4byte	0x3caf
+	.4byte	0x90f1
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2003
+	.4byte	0x3caf
+	.4byte	0x9105
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2005
+	.4byte	0x4ec1
+	.4byte	0x911c
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2006
+	.4byte	0x4ec1
+	.4byte	0x9133
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR149
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2007
+	.4byte	0x5313
+	.uleb128 0x44
+	.4byte	.LVL2008
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL2009
+	.4byte	0x4d0e
+	.uleb128 0x44
+	.4byte	.LVL2013
+	.4byte	0x2bbf
+	.uleb128 0x44
+	.4byte	.LVL2014
+	.4byte	0x2bbf
+	.uleb128 0x32
+	.4byte	.LVL2015
+	.4byte	0x33c9
+	.4byte	0x9177
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x32
+	.4byte	.LVL2016
+	.4byte	0x33c9
+	.4byte	0x918b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2017
+	.4byte	0x3b98
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1989
+	.4byte	0x5fb8
+	.uleb128 0x44
+	.4byte	.LVL1990
+	.4byte	0x4b0c
+	.uleb128 0x44
+	.4byte	.LVL1991
+	.4byte	0x4940
+	.uleb128 0x44
+	.4byte	.LVL1992
+	.4byte	0x46e2
+	.uleb128 0x44
+	.4byte	.LVL1993
+	.4byte	0x4763
+	.uleb128 0x44
+	.4byte	.LVL1994
+	.4byte	0x3d52
+	.uleb128 0x44
+	.4byte	.LVL1995
+	.4byte	0x4aff
+	.uleb128 0x44
+	.4byte	.LVL1996
+	.4byte	0x5e7c
+	.uleb128 0x44
+	.4byte	.LVL1997
+	.4byte	0x3dac
+	.uleb128 0x44
+	.4byte	.LVL1998
+	.4byte	0x3f5d
+	.uleb128 0x34
+	.4byte	.LVL1999
+	.4byte	0x4f5b
+	.uleb128 0x2e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x79
+	.4byte	.LASF874
+	.4byte	.LASF874
+	.byte	0xa
+	.byte	0x72
+	.uleb128 0x7a
+	.4byte	.LASF875
+	.4byte	.LASF875
+	.byte	0x1b
+	.2byte	0x16d
+	.uleb128 0x7a
+	.4byte	.LASF876
+	.4byte	.LASF876
+	.byte	0x1b
+	.2byte	0x16c
+	.uleb128 0x79
+	.4byte	.LASF877
+	.4byte	.LASF877
+	.byte	0x1d
+	.byte	0x12
+	.uleb128 0x79
+	.4byte	.LASF878
+	.4byte	.LASF878
+	.byte	0x1c
+	.byte	0x35
+	.uleb128 0x79
+	.4byte	.LASF879
+	.4byte	.LASF879
+	.byte	0x1e
+	.byte	0x6d
+	.byte	0
+	.section	.debug_abbrev,"",%progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
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+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0xa
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+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xe
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
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+	.uleb128 0x2f
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+	.byte	0
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+	.uleb128 0xf
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+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x3a
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+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
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+	.byte	0
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+	.uleb128 0x10
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
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+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x15
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+	.uleb128 0x27
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x12
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
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+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
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+	.uleb128 0x3a
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+	.uleb128 0x3b
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+	.uleb128 0x14
+	.uleb128 0xd
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+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
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+	.uleb128 0x16
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
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+	.uleb128 0x17
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0x8
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+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
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+	.byte	0
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+	.uleb128 0x18
+	.uleb128 0x34
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+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
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+	.uleb128 0x19
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
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+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x1c
+	.uleb128 0x16
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+	.uleb128 0x3
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+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1d
+	.uleb128 0xd
+	.byte	0
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+	.uleb128 0x1c
+	.uleb128 0xb
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+	.uleb128 0x1c
+	.uleb128 0xd
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+	.uleb128 0x2e
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+	.uleb128 0x19
+	.uleb128 0x6e
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+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x7a
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
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+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
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+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",%progbits
+.Ldebug_loc0:
+.LLST453:
+	.4byte	.LVL2075
+	.4byte	.LVL2076-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2076-1
+	.4byte	.LFE350
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST454:
+	.4byte	.LVL2075
+	.4byte	.LVL2076-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2076-1
+	.4byte	.LFE350
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST455:
+	.4byte	.LVL2075
+	.4byte	.LVL2076-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2076-1
+	.4byte	.LFE350
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST285:
+	.4byte	.LVL1159
+	.4byte	.LVL1160-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1160-1
+	.4byte	.LFE349
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST286:
+	.4byte	.LVL1159
+	.4byte	.LVL1160-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1160-1
+	.4byte	.LFE349
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST287:
+	.4byte	.LVL1159
+	.4byte	.LVL1160-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1160-1
+	.4byte	.LFE349
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST189:
+	.4byte	.LVL695
+	.4byte	.LVL696-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL696-1
+	.4byte	.LFE348
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST190:
+	.4byte	.LVL695
+	.4byte	.LVL696-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL696-1
+	.4byte	.LFE348
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST191:
+	.4byte	.LVL695
+	.4byte	.LVL696-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL696-1
+	.4byte	.LFE348
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST282:
+	.4byte	.LVL1150
+	.4byte	.LVL1152-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1152-1
+	.4byte	.LFE347
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST283:
+	.4byte	.LVL1150
+	.4byte	.LVL1151
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1151
+	.4byte	.LFE347
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST284:
+	.4byte	.LVL1154
+	.4byte	.LVL1155
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1156
+	.4byte	.LVL1157
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1157
+	.4byte	.LFE347
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST170:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST171:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST172:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST173:
+	.4byte	.LVL629
+	.4byte	.LVL630
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL631
+	.4byte	.LFE345
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST174:
+	.4byte	.LVL625
+	.4byte	.LVL626
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL626
+	.4byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST162:
+	.4byte	.LVL602
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL606
+	.4byte	.LVL608
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL622
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST163:
+	.4byte	.LVL602
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL606
+	.4byte	.LVL608
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL622
+	.4byte	.LVL624
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL624
+	.4byte	.LFE344
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST164:
+	.4byte	.LVL602
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL605
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL602
+	.4byte	.LVL603
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL603
+	.4byte	.LVL607
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL607
+	.4byte	.LVL608
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL608
+	.4byte	.LFE344
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL604
+	.4byte	.LVL605
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL622
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST167:
+	.4byte	.LVL611
+	.4byte	.LVL612
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL613
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
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+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL622
+	.4byte	.LVL623
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL604
+	.4byte	.LVL605
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL606
+	.4byte	.LVL608
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL608
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL615
+	.4byte	.LVL622
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL622
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST151:
+	.4byte	.LVL562
+	.4byte	.LVL564
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL564
+	.4byte	.LFE343
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST152:
+	.4byte	.LVL562
+	.4byte	.LVL564
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL564
+	.4byte	.LFE343
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL562
+	.4byte	.LVL563
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL563
+	.4byte	.LFE343
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL568
+	.4byte	.LVL569
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL569
+	.4byte	.LVL570-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 0
+	.4byte	.LVL570
+	.4byte	.LVL571
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL571
+	.4byte	.LVL572
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST143:
+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST144:
+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST145:
+	.4byte	.LVL551
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x53
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+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST146:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST147:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL555
+	.4byte	.LVL557
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL557
+	.4byte	.LVL558
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL558
+	.4byte	.LVL559
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL559
+	.4byte	.LVL560
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL560
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST148:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST149:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST150:
+	.4byte	.LVL552
+	.4byte	.LVL553
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL555
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST141:
+	.4byte	.LVL549
+	.4byte	.LVL550-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL550-1
+	.4byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST138:
+	.4byte	.LVL536
+	.4byte	.LVL537-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL537-1
+	.4byte	.LFE318
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST139:
+	.4byte	.LVL540
+	.4byte	.LVL541
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL541
+	.4byte	.LVL542
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL542
+	.4byte	.LVL543
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL543
+	.4byte	.LVL544
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL544
+	.4byte	.LVL545
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST140:
+	.4byte	.LVL538
+	.4byte	.LVL546
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST137:
+	.4byte	.LVL533
+	.4byte	.LVL534
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL534
+	.4byte	.LFE317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST394:
+	.4byte	.LVL1697
+	.4byte	.LVL1700
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1705
+	.4byte	.LFE316
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST395:
+	.4byte	.LVL1704
+	.4byte	.LVL1705-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1096
+	.4byte	.LVL1098-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1098-1
+	.4byte	.LVL1099
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1099
+	.4byte	.LVL1101
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1101
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1138
+	.4byte	.LFE313
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1096
+	.4byte	.LVL1098-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1098-1
+	.4byte	.LVL1099
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1099
+	.4byte	.LVL1101
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1101
+	.4byte	.LVL1138
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1138
+	.4byte	.LFE313
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1112
+	.4byte	.LVL1113
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1113
+	.4byte	.LVL1118
+	.2byte	0x2
+	.byte	0x7c
+	.sleb128 -2
+	.4byte	0
+	.4byte	0
+.LLST272:
+	.4byte	.LVL1104
+	.4byte	.LVL1105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1105
+	.4byte	.LVL1114
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1115
+	.4byte	.LVL1124
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1127
+	.4byte	.LVL1137
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1107
+	.4byte	.LVL1111
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1118
+	.4byte	.LVL1121
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1129
+	.4byte	.LVL1137
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST274:
+	.4byte	.LVL1104
+	.4byte	.LVL1105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1105
+	.4byte	.LVL1106
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1106
+	.4byte	.LVL1107-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1111
+	.4byte	.LVL1116
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1116
+	.4byte	.LVL1117
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST275:
+	.4byte	.LVL1103
+	.4byte	.LVL1107
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1110
+	.4byte	.LVL1118
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1120
+	.4byte	.LVL1125
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1127
+	.4byte	.LVL1128
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1130
+	.4byte	.LVL1132
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1136
+	.4byte	.LVL1137
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1097
+	.4byte	.LVL1109
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1110
+	.4byte	.LVL1131
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1134
+	.4byte	.LVL1136
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1136
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST277:
+	.4byte	.LVL1119
+	.4byte	.LVL1120-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1120-1
+	.4byte	.LVL1124
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1127
+	.4byte	.LVL1129-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1129-1
+	.4byte	.LVL1136
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST278:
+	.4byte	.LVL1096
+	.4byte	.LVL1102
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1102
+	.4byte	.LVL1108
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1108
+	.4byte	.LVL1110
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1110
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST279:
+	.4byte	.LVL1122
+	.4byte	.LVL1123
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1123
+	.4byte	.LVL1124
+	.2byte	0x5
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0xc
+	.4byte	.LVL1127
+	.4byte	.LVL1129-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST389:
+	.4byte	.LVL1653
+	.4byte	.LVL1655
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1655
+	.4byte	.LVL1656
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1656
+	.4byte	.LVL1658
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1658
+	.4byte	.LFE311
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST390:
+	.4byte	.LVL1666
+	.4byte	.LVL1669
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1669
+	.4byte	.LVL1672
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1675
+	.4byte	.LVL1683
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1683
+	.4byte	.LVL1684
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1685
+	.4byte	.LFE311
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST391:
+	.4byte	.LVL1659
+	.4byte	.LVL1664
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1665
+	.4byte	.LVL1666
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1680
+	.4byte	.LVL1682
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST392:
+	.4byte	.LVL1654
+	.4byte	.LVL1655
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1656
+	.4byte	.LVL1657
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1657
+	.4byte	.LVL1659
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1659
+	.4byte	.LVL1660-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1664
+	.4byte	.LVL1665
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST393:
+	.4byte	.LVL1676
+	.4byte	.LVL1686
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST132:
+	.4byte	.LVL525
+	.4byte	.LVL526
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL526
+	.4byte	.LVL532
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL532
+	.4byte	.LFE310
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST133:
+	.4byte	.LVL525
+	.4byte	.LVL527-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL527-1
+	.4byte	.LVL532
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL532
+	.4byte	.LFE310
+	.2byte	0x7
+	.byte	0x71
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST134:
+	.4byte	.LVL525
+	.4byte	.LVL527-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL527-1
+	.4byte	.LVL532
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL532
+	.4byte	.LFE310
+	.2byte	0x7
+	.byte	0x71
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x8
+	.4byte	0
+	.4byte	0
+.LLST135:
+	.4byte	.LVL527
+	.4byte	.LVL531
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST136:
+	.4byte	.LVL527
+	.4byte	.LVL528
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL529
+	.4byte	.LVL530
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST130:
+	.4byte	.LVL520
+	.4byte	.LVL522
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL522
+	.4byte	.LVL523
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL523
+	.4byte	.LVL524
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL524
+	.4byte	.LFE309
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST131:
+	.4byte	.LVL520
+	.4byte	.LVL521
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST128:
+	.4byte	.LVL516
+	.4byte	.LVL517
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST129:
+	.4byte	.LVL514
+	.4byte	.LVL515
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL515
+	.4byte	.LVL518
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL518
+	.4byte	.LVL519
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST126:
+	.4byte	.LVL508
+	.4byte	.LVL509
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST127:
+	.4byte	.LVL506
+	.4byte	.LVL507
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL507
+	.4byte	.LVL510
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL510
+	.4byte	.LVL511
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL512
+	.4byte	.LVL513
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL513
+	.4byte	.LFE307
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST125:
+	.4byte	.LVL499
+	.4byte	.LVL500
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL501
+	.4byte	.LVL502
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL503
+	.4byte	.LVL504
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL505
+	.4byte	.LFE306
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST307:
+	.4byte	.LVL1255
+	.4byte	.LVL1256
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1256
+	.4byte	.LVL1262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1262
+	.4byte	.LVL1263
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1263
+	.4byte	.LFE305
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST308:
+	.4byte	.LVL1255
+	.4byte	.LVL1258
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1259
+	.4byte	.LVL1260
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1262
+	.4byte	.LVL1265
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1265
+	.4byte	.LFE305
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST122:
+	.4byte	.LVL488
+	.4byte	.LVL489
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL489
+	.4byte	.LFE303
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST123:
+	.4byte	.LVL493
+	.4byte	.LVL495
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL497
+	.4byte	.LFE303
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST124:
+	.4byte	.LVL488
+	.4byte	.LVL494
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL494
+	.4byte	.LVL497
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL497
+	.4byte	.LFE303
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST374:
+	.4byte	.LVL1590
+	.4byte	.LVL1592
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1592
+	.4byte	.LFE302
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST292:
+	.4byte	.LVL1182
+	.4byte	.LVL1183
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1183
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1223
+	.4byte	.LFE301
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST293:
+	.4byte	.LVL1189
+	.4byte	.LVL1194
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1195
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST294:
+	.4byte	.LVL1197
+	.4byte	.LVL1210
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1211
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST295:
+	.4byte	.LVL1202
+	.4byte	.LVL1203
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1204
+	.4byte	.LVL1205
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1205
+	.4byte	.LVL1209
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1215
+	.4byte	.LVL1219
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1219
+	.4byte	.LVL1220
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1221
+	.4byte	.LVL1223
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST296:
+	.4byte	.LVL1217
+	.4byte	.LVL1218-1
+	.2byte	0x6
+	.byte	0x7c
+	.sleb128 4
+	.byte	0x6
+	.byte	0x3a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST297:
+	.4byte	.LVL1204
+	.4byte	.LVL1205
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1205
+	.4byte	.LVL1206-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1215
+	.4byte	.LVL1216
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1216
+	.4byte	.LVL1217
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1217
+	.4byte	.LVL1218-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1218-1
+	.4byte	.LVL1219
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1219
+	.4byte	.LVL1221
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST298:
+	.4byte	.LVL1182
+	.4byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1185
+	.4byte	.LVL1186
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1186
+	.4byte	.LVL1187
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1187
+	.4byte	.LVL1188-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST299:
+	.4byte	.LVL1212
+	.4byte	.LVL1214
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST300:
+	.4byte	.LVL1212
+	.4byte	.LVL1214
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST113:
+	.4byte	.LVL457
+	.4byte	.LVL462
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL481
+	.4byte	.LVL483
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST114:
+	.4byte	.LVL457
+	.4byte	.LVL462
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL474
+	.4byte	.LVL479
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST115:
+	.4byte	.LVL457
+	.4byte	.LVL462
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL473
+	.4byte	.LVL477
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL479
+	.4byte	.LVL482
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL483
+	.4byte	.LFE299
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST116:
+	.4byte	.LVL473
+	.4byte	.LVL474
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL479
+	.4byte	.LVL480
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL484
+	.4byte	.LFE299
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST117:
+	.4byte	.LVL471
+	.4byte	.LVL472
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST118:
+	.4byte	.LVL475
+	.4byte	.LVL479
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST119:
+	.4byte	.LVL458
+	.4byte	.LVL459
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL459
+	.4byte	.LVL460-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL463
+	.4byte	.LVL465
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL466
+	.4byte	.LVL467
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL467
+	.4byte	.LVL469
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST102:
+	.4byte	.LVL292
+	.4byte	.LVL293
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL293
+	.4byte	.LVL296
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL297
+	.4byte	.LVL299
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL299
+	.4byte	.LFE298
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST103:
+	.4byte	.LVL292
+	.4byte	.LVL296
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL296
+	.4byte	.LVL297
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL297
+	.4byte	.LVL299
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL299
+	.4byte	.LFE298
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST104:
+	.4byte	.LVL294
+	.4byte	.LVL298
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST105:
+	.4byte	.LVL294
+	.4byte	.LVL295
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST101:
+	.4byte	.LVL290
+	.4byte	.LVL291
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL291
+	.4byte	.LFE297
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST97:
+	.4byte	.LVL279
+	.4byte	.LVL280
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL280
+	.4byte	.LFE296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST98:
+	.4byte	.LVL279
+	.4byte	.LVL280
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL280
+	.4byte	.LVL287
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL287
+	.4byte	.LVL288
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL289
+	.4byte	.LFE296
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST99:
+	.4byte	.LVL284
+	.4byte	.LVL285-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST100:
+	.4byte	.LVL279
+	.4byte	.LVL280
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL280
+	.4byte	.LVL281
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL281
+	.4byte	.LVL282
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL282
+	.4byte	.LVL283
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	.LVL283
+	.4byte	.LVL286
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL287
+	.4byte	.LFE296
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST237:
+	.4byte	.LVL911
+	.4byte	.LVL913
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST264:
+	.4byte	.LVL1074
+	.4byte	.LVL1075
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1077
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1089
+	.4byte	.LVL1091
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1091
+	.4byte	.LVL1092
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1092
+	.4byte	.LFE293
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST265:
+	.4byte	.LVL1072
+	.4byte	.LVL1073
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1084
+	.4byte	.LVL1089
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST266:
+	.4byte	.LVL1077
+	.4byte	.LVL1079
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1086
+	.4byte	.LVL1087
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST267:
+	.4byte	.LVL1070
+	.4byte	.LVL1074
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1074
+	.4byte	.LVL1077
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1081
+	.4byte	.LVL1082
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1082
+	.4byte	.LVL1083
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1084
+	.4byte	.LVL1089
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1089
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST268:
+	.4byte	.LVL1076
+	.4byte	.LVL1081
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST371:
+	.4byte	.LVL1578
+	.4byte	.LVL1579
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1584
+	.4byte	.LVL1588
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1588
+	.4byte	.LVL1589
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1589
+	.4byte	.LFE292
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST372:
+	.4byte	.LVL1576
+	.4byte	.LVL1577
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1579
+	.4byte	.LVL1584
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST373:
+	.4byte	.LVL1581
+	.4byte	.LVL1582
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST339:
+	.4byte	.LVL1423
+	.4byte	.LVL1424
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1424
+	.4byte	.LFE291
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST340:
+	.4byte	.LVL1430
+	.4byte	.LVL1431
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1431
+	.4byte	.LVL1432-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.4byte	0
+	.4byte	0
+.LLST341:
+	.4byte	.LVL1423
+	.4byte	.LVL1424
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1424
+	.4byte	.LVL1425
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL1425
+	.4byte	.LVL1426
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1426
+	.4byte	.LVL1427
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL1428
+	.4byte	.LFE291
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST258:
+	.4byte	.LVL1048
+	.4byte	.LVL1059
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1059
+	.4byte	.LVL1060
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1060
+	.4byte	.LVL1061
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1061
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST259:
+	.4byte	.LVL1049
+	.4byte	.LVL1050-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1053
+	.4byte	.LVL1054
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1054
+	.4byte	.LVL1055-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1061
+	.4byte	.LVL1062
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST260:
+	.4byte	.LVL1050
+	.4byte	.LVL1051-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST261:
+	.4byte	.LVL1049
+	.4byte	.LVL1052
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1053
+	.4byte	.LVL1055
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1055
+	.4byte	.LVL1057
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1057
+	.4byte	.LVL1059-1
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	.LVL1061
+	.4byte	.LVL1062
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1062
+	.4byte	.LVL1064
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1064
+	.4byte	.LVL1066-1
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST262:
+	.4byte	.LVL1048
+	.4byte	.LVL1063
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1065
+	.4byte	.LVL1067
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1067
+	.4byte	.LVL1068-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.4byte	0
+	.4byte	0
+.LLST263:
+	.4byte	.LVL1048
+	.4byte	.LVL1056
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1058
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST95:
+	.4byte	.LVL269
+	.4byte	.LVL270
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL270
+	.4byte	.LFE287
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST96:
+	.4byte	.LVL272
+	.4byte	.LVL277
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL277
+	.4byte	.LVL278
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST313:
+	.4byte	.LVL1285
+	.4byte	.LVL1288
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1288
+	.4byte	.LVL1290
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1290
+	.4byte	.LVL1291
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1291
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST314:
+	.4byte	.LVL1286
+	.4byte	.LVL1289
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1290
+	.4byte	.LFE284
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST315:
+	.4byte	.LVL1287
+	.4byte	.LVL1289
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1290
+	.4byte	.LFE284
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST316:
+	.4byte	.LVL1290
+	.4byte	.LVL1291
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1292
+	.4byte	.LVL1296
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1297
+	.4byte	.LVL1298
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1298
+	.4byte	.LVL1299-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1309
+	.4byte	.LVL1311
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1311
+	.4byte	.LVL1314
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1314
+	.4byte	.LVL1319
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1319
+	.4byte	.LVL1320
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1337
+	.4byte	.LVL1342
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1342
+	.4byte	.LVL1343
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1343
+	.4byte	.LVL1344-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1350
+	.4byte	.LVL1351
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1351
+	.4byte	.LVL1352-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1357
+	.4byte	.LVL1358
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1358
+	.4byte	.LVL1360
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1366
+	.4byte	.LVL1369
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1369
+	.4byte	.LVL1370
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST317:
+	.4byte	.LVL1349
+	.4byte	.LVL1350
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1372
+	.4byte	.LVL1375
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1378
+	.4byte	.LVL1381
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1419
+	.4byte	.LVL1420
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1422
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST318:
+	.4byte	.LVL1335
+	.4byte	.LVL1336
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1336
+	.4byte	.LVL1346
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1347
+	.4byte	.LVL1348
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1349
+	.4byte	.LVL1350
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1350
+	.4byte	.LVL1355
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1356
+	.4byte	.LVL1361
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1361
+	.4byte	.LVL1366
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1366
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST319:
+	.4byte	.LVL1306
+	.4byte	.LVL1309
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1331
+	.4byte	.LFE284
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST320:
+	.4byte	.LVL1304
+	.4byte	.LVL1309
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1327
+	.4byte	.LVL1328
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1331
+	.4byte	.LFE284
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST321:
+	.4byte	.LVL1291
+	.4byte	.LVL1293-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1309
+	.4byte	.LVL1311
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1315
+	.4byte	.LVL1316
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1316
+	.4byte	.LVL1321
+	.2byte	0x5
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL1338
+	.4byte	.LVL1340
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1340
+	.4byte	.LVL1343
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL1359
+	.4byte	.LVL1361
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1367
+	.4byte	.LVL1368
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1368
+	.4byte	.LVL1371
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 -2
+	.4byte	0
+	.4byte	0
+.LLST322:
+	.4byte	.LVL1294
+	.4byte	.LVL1295
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1295
+	.4byte	.LVL1307
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1311
+	.4byte	.LVL1334
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST324:
+	.4byte	.LVL1297
+	.4byte	.LVL1307
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1314
+	.4byte	.LVL1317
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1318
+	.4byte	.LVL1336
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1337
+	.4byte	.LVL1339
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1341
+	.4byte	.LVL1345
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1350
+	.4byte	.LVL1351
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1351
+	.4byte	.LVL1361
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL1366
+	.4byte	.LFE284
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST325:
+	.4byte	.LVL1300
+	.4byte	.LVL1302
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1303
+	.4byte	.LVL1304
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1321
+	.4byte	.LVL1322
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1322
+	.4byte	.LVL1329
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1329
+	.4byte	.LVL1330
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST326:
+	.4byte	.LVL1344
+	.4byte	.LVL1345
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1352
+	.4byte	.LVL1353
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1354
+	.4byte	.LVL1361
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL1371
+	.4byte	.LVL1377
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL1377
+	.4byte	.LVL1378
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL1378
+	.4byte	.LFE284
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	0
+	.4byte	0
+.LLST327:
+	.4byte	.LVL1383
+	.4byte	.LVL1392
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1395
+	.4byte	.LVL1417
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST328:
+	.4byte	.LVL1373
+	.4byte	.LVL1376
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1378
+	.4byte	.LVL1392
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1392
+	.4byte	.LVL1393
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1395
+	.4byte	.LVL1417
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1419
+	.4byte	.LVL1422
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST329:
+	.4byte	.LVL1373
+	.4byte	.LVL1376
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1378
+	.4byte	.LVL1390
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1395
+	.4byte	.LVL1409
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1409
+	.4byte	.LVL1411
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1419
+	.4byte	.LVL1422
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST330:
+	.4byte	.LVL1300
+	.4byte	.LVL1301
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1301
+	.4byte	.LVL1309
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1321
+	.4byte	.LVL1379
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1379
+	.4byte	.LVL1380
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1380
+	.4byte	.LFE284
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST331:
+	.4byte	.LVL1285
+	.4byte	.LVL1288
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1290
+	.4byte	.LVL1302
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1309
+	.4byte	.LVL1321
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1333
+	.4byte	.LVL1348
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1361
+	.4byte	.LVL1366
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST332:
+	.4byte	.LVL1323
+	.4byte	.LVL1324
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1324
+	.4byte	.LVL1326
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1362
+	.4byte	.LVL1363
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1363
+	.4byte	.LVL1364
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 12
+	.4byte	.LVL1364
+	.4byte	.LVL1365
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 -8
+	.4byte	.LVL1374
+	.4byte	.LVL1375
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1378
+	.4byte	.LVL1384
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1387
+	.4byte	.LVL1390
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1397
+	.4byte	.LVL1400
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1400
+	.4byte	.LVL1401-1
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 12
+	.4byte	.LVL1401-1
+	.4byte	.LVL1407
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1412
+	.4byte	.LVL1417
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST333:
+	.4byte	.LVL1332
+	.4byte	.LVL1348
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1361
+	.4byte	.LVL1366
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST334:
+	.4byte	.LVL1332
+	.4byte	.LVL1336
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST335:
+	.4byte	.LVL1388
+	.4byte	.LVL1389
+	.2byte	0x2
+	.byte	0x77
+	.sleb128 4
+	.4byte	.LVL1397
+	.4byte	.LVL1398-1
+	.2byte	0x2
+	.byte	0x77
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST336:
+	.4byte	.LVL1402
+	.4byte	.LVL1405
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1405
+	.4byte	.LVL1406
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST337:
+	.4byte	.LVL1410
+	.4byte	.LVL1417
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST338:
+	.4byte	.LVL1413
+	.4byte	.LVL1414-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 4
+	.4byte	.LVL1414-1
+	.4byte	.LVL1415
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST231:
+	.4byte	.LVL889
+	.4byte	.LVL890
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL890
+	.4byte	.LVL906
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL906
+	.4byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST232:
+	.4byte	.LVL889
+	.4byte	.LVL891-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST233:
+	.4byte	.LVL892
+	.4byte	.LVL893
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST234:
+	.4byte	.LVL895
+	.4byte	.LVL897-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL901
+	.4byte	.LVL903
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL903
+	.4byte	.LVL904
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST235:
+	.4byte	.LVL895
+	.4byte	.LVL900
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL901
+	.4byte	.LVL902
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST236:
+	.4byte	.LVL894
+	.4byte	.LVL896
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL896
+	.4byte	.LVL897-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.4byte	.LVL901
+	.4byte	.LVL904
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST90:
+	.4byte	.LVL253
+	.4byte	.LVL256
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL256
+	.4byte	.LVL258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL258
+	.4byte	.LVL261
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL261
+	.4byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST91:
+	.4byte	.LVL253
+	.4byte	.LVL255
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL255
+	.4byte	.LFE282
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST92:
+	.4byte	.LVL254
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL257
+	.4byte	.LVL258
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL258
+	.4byte	.LVL259
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL260
+	.4byte	.LVL261
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL261
+	.4byte	.LVL262
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST257:
+	.4byte	.LVL1035
+	.4byte	.LVL1036
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST249:
+	.4byte	.LVL992
+	.4byte	.LVL995
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL995
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST250:
+	.4byte	.LVL1000
+	.4byte	.LVL1002-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1002-1
+	.4byte	.LVL1005
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1017
+	.4byte	.LVL1018
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1018
+	.4byte	.LVL1027
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1027
+	.4byte	.LVL1028
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1029
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST251:
+	.4byte	.LVL1004
+	.4byte	.LVL1005
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1006
+	.4byte	.LVL1007
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1012
+	.4byte	.LVL1013
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1013
+	.4byte	.LVL1015
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1015
+	.4byte	.LVL1016
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1020
+	.4byte	.LVL1021
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1021
+	.4byte	.LVL1022
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1024
+	.4byte	.LVL1025
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1026
+	.4byte	.LVL1030
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1030
+	.4byte	.LVL1031
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST252:
+	.4byte	.LVL1003
+	.4byte	.LVL1007
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1012
+	.4byte	.LVL1017
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST253:
+	.4byte	.LVL1030
+	.4byte	.LVL1032
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1032
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	0
+	.4byte	0
+.LLST254:
+	.4byte	.LVL994
+	.4byte	.LVL1003
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1017
+	.4byte	.LFE278
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST255:
+	.4byte	.LVL994
+	.4byte	.LVL995
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.4byte	.LVL995
+	.4byte	.LVL997-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 16
+	.4byte	.LVL997-1
+	.4byte	.LFE278
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST256:
+	.4byte	.LVL996
+	.4byte	.LVL1001
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1017
+	.4byte	.LFE278
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST446:
+	.4byte	.LVL1972
+	.4byte	.LVL1975
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1985
+	.4byte	.LVL1987
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1988
+	.4byte	.LFE277
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST89:
+	.4byte	.LVL251
+	.4byte	.LVL252
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL252
+	.4byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST243:
+	.4byte	.LVL941
+	.4byte	.LVL945
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL945
+	.4byte	.LVL946
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL946
+	.4byte	.LVL947
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL949
+	.4byte	.LVL950
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL950
+	.4byte	.LVL958
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL958
+	.4byte	.LVL959
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL960
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST244:
+	.4byte	.LVL943
+	.4byte	.LVL946
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL951
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST245:
+	.4byte	.LVL941
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST246:
+	.4byte	.LVL964
+	.4byte	.LVL965
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL966
+	.4byte	.LVL967
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL973
+	.4byte	.LVL974
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL975
+	.4byte	.LVL976
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL984
+	.4byte	.LVL988
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL989
+	.4byte	.LVL990
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL990
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST247:
+	.4byte	.LVL952
+	.4byte	.LVL954
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL955
+	.4byte	.LVL956
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL956
+	.4byte	.LVL957
+	.2byte	0x5
+	.byte	0x41
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL963
+	.4byte	.LVL968
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL969
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL972
+	.4byte	.LVL977
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL978
+	.4byte	.LVL979
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL985
+	.4byte	.LVL986
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL987
+	.4byte	.LVL988
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL990
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST248:
+	.4byte	.LVL951
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST368:
+	.4byte	.LVL1557
+	.4byte	.LVL1564
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1566
+	.4byte	.LVL1568
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST369:
+	.4byte	.LVL1558
+	.4byte	.LVL1574
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST370:
+	.4byte	.LVL1557
+	.4byte	.LVL1564
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1564
+	.4byte	.LVL1570
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1571
+	.4byte	.LVL1574
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST239:
+	.4byte	.LVL925
+	.4byte	.LVL927
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL927
+	.4byte	.LVL930
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL930
+	.4byte	.LVL931-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL931-1
+	.4byte	.LVL931
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL931
+	.4byte	.LVL934
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL934
+	.4byte	.LFE270
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST240:
+	.4byte	.LVL926
+	.4byte	.LVL928
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL928
+	.4byte	.LVL929-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+4
+	.4byte	.LVL931
+	.4byte	.LVL932
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL932
+	.4byte	.LVL933-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+4
+	.4byte	0
+	.4byte	0
+.LLST241:
+	.4byte	.LVL925
+	.4byte	.LVL927
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LVL929-1
+	.2byte	0x7
+	.byte	0x76
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL931
+	.4byte	.LVL933-1
+	.2byte	0x7
+	.byte	0x76
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL934
+	.4byte	.LFE270
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST242:
+	.4byte	.LVL925
+	.4byte	.LVL927
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL927
+	.4byte	.LVL929-1
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 24
+	.4byte	.LVL931
+	.4byte	.LVL933-1
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 24
+	.4byte	.LVL934
+	.4byte	.LFE270
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST358:
+	.4byte	.LVL1526
+	.4byte	.LVL1529
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1529
+	.4byte	.LFE268
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST359:
+	.4byte	.LVL1526
+	.4byte	.LVL1527
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.4byte	.LVL1527
+	.4byte	.LVL1528
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1528
+	.4byte	.LVL1530
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST360:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1535
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST361:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1535
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST362:
+	.4byte	.LVL1533
+	.4byte	.LVL1534
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1534
+	.4byte	.LFE267
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST363:
+	.4byte	.LVL1540
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST364:
+	.4byte	.LVL1540
+	.4byte	.LVL1550
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -128
+	.4byte	0
+	.4byte	0
+.LLST365:
+	.4byte	.LVL1538
+	.4byte	.LVL1539-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1539-1
+	.4byte	.LVL1548
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	.LVL1548
+	.4byte	.LVL1549-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1549-1
+	.4byte	.LVL1550
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	0
+	.4byte	0
+.LLST366:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1535
+	.4byte	.LVL1536
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1537
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST367:
+	.4byte	.LVL1533
+	.4byte	.LVL1535
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL1550
+	.4byte	.LFE267
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST350:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1504
+	.4byte	.LVL1515
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1519
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST351:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1504
+	.4byte	.LVL1514
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1519
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST352:
+	.4byte	.LVL1502
+	.4byte	.LVL1503
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1503
+	.4byte	.LVL1506
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1506
+	.4byte	.LVL1507
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -136
+	.4byte	.LVL1507
+	.4byte	.LVL1520
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1520
+	.4byte	.LVL1521
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1521
+	.4byte	.LFE266
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST353:
+	.4byte	.LVL1511
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST354:
+	.4byte	.LVL1510
+	.4byte	.LVL1524
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -132
+	.4byte	0
+	.4byte	0
+.LLST355:
+	.4byte	.LVL1508
+	.4byte	.LVL1509-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1509-1
+	.4byte	.LVL1521
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	.LVL1521
+	.4byte	.LVL1522
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1522
+	.4byte	.LVL1524
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -124
+	.4byte	0
+	.4byte	0
+.LLST356:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1504
+	.4byte	.LVL1505
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1507
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST357:
+	.4byte	.LVL1502
+	.4byte	.LVL1504
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL1504
+	.4byte	.LVL1505
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1507
+	.4byte	.LVL1517
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1517
+	.4byte	.LVL1518-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1518-1
+	.4byte	.LVL1519
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1519
+	.4byte	.LVL1524
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1524
+	.4byte	.LFE266
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST227:
+	.4byte	.LVL872
+	.4byte	.LVL877
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL877
+	.4byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST228:
+	.4byte	.LVL872
+	.4byte	.LVL876
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL876
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST229:
+	.4byte	.LVL872
+	.4byte	.LVL875
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL875
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST230:
+	.4byte	.LVL878
+	.4byte	.LVL879
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL880
+	.4byte	.LVL882
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL882
+	.4byte	.LVL883-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL885
+	.4byte	.LVL887
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL888
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST312:
+	.4byte	.LVL1280
+	.4byte	.LVL1281
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1281
+	.4byte	.LVL1282
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1282
+	.4byte	.LVL1283-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1283-1
+	.4byte	.LVL1283
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1283
+	.4byte	.LVL1284
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST83:
+	.4byte	.LVL224
+	.4byte	.LVL225
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL226
+	.4byte	.LVL227
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL227
+	.4byte	.LVL228
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL229
+	.4byte	.LVL230
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL231
+	.4byte	.LVL234
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL236
+	.4byte	.LVL238
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL238
+	.4byte	.LVL239
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL239
+	.4byte	.LVL240
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL240
+	.4byte	.LVL242
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL242
+	.4byte	.LVL243
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL243
+	.4byte	.LFE263
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST84:
+	.4byte	.LVL231
+	.4byte	.LVL234
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL240
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST85:
+	.4byte	.LVL229
+	.4byte	.LVL230
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL231
+	.4byte	.LVL232
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL236
+	.4byte	.LVL237
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL238
+	.4byte	.LVL240
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL240
+	.4byte	.LVL241
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL242
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST225:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL868
+	.4byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST226:
+	.4byte	.LVL869
+	.4byte	.LVL870
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL870
+	.4byte	.LVL871-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST212:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL832
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL844
+	.4byte	.LFE261
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST213:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL832
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL844
+	.4byte	.LFE261
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST214:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL832
+	.4byte	.LVL844
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL844
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST215:
+	.4byte	.LVL836
+	.4byte	.LVL844
+	.2byte	0x7
+	.byte	0x7a
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST216:
+	.4byte	.LVL838
+	.4byte	.LVL839
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL839
+	.4byte	.LVL840-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+12
+	.4byte	0
+	.4byte	0
+.LLST217:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL832
+	.4byte	.LVL841
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL842
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST206:
+	.4byte	.LVL808
+	.4byte	.LVL810
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL810
+	.4byte	.LVL814
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL814
+	.4byte	.LVL816
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL816
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST207:
+	.4byte	.LVL819
+	.4byte	.LVL820
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL820
+	.4byte	.LVL822
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL822
+	.4byte	.LVL823
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL826
+	.4byte	.LVL829
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL829
+	.4byte	.LVL830
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST208:
+	.4byte	.LVL819
+	.4byte	.LVL820
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL820
+	.4byte	.LVL821
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL826
+	.4byte	.LVL827
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL828
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST209:
+	.4byte	.LVL809
+	.4byte	.LVL813
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL814
+	.4byte	.LVL815
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL815
+	.4byte	.LVL816
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL816
+	.4byte	.LVL819-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST210:
+	.4byte	.LVL809
+	.4byte	.LVL810
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL810
+	.4byte	.LVL811-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	.LVL814
+	.4byte	.LVL816
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL816
+	.4byte	.LVL819-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST211:
+	.4byte	.LVL817
+	.4byte	.LVL818
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL818
+	.4byte	.LVL819-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.4byte	0
+	.4byte	0
+.LLST218:
+	.4byte	.LVL845
+	.4byte	.LVL848-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL848-1
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST219:
+	.4byte	.LVL849
+	.4byte	.LVL855
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL858
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST220:
+	.4byte	.LVL848
+	.4byte	.LVL850
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST221:
+	.4byte	.LVL853
+	.4byte	.LVL855
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL858
+	.4byte	.LVL863
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL863
+	.4byte	.LVL864
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL864
+	.4byte	.LVL865
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL865
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST222:
+	.4byte	.LVL846
+	.4byte	.LVL852
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST223:
+	.4byte	.LVL847
+	.4byte	.LVL848-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL848-1
+	.4byte	.LVL857
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL857
+	.4byte	.LVL858
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL858
+	.4byte	.LFE259
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST224:
+	.4byte	.LVL859
+	.4byte	.LVL860
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST199:
+	.4byte	.LVL784
+	.4byte	.LVL787
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL787
+	.4byte	.LFE257
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST200:
+	.4byte	.LVL786
+	.4byte	.LVL791
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL795
+	.4byte	.LVL802
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST201:
+	.4byte	.LVL796
+	.4byte	.LVL802
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST202:
+	.4byte	.LVL788
+	.4byte	.LVL789
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL789
+	.4byte	.LVL790
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL790
+	.4byte	.LVL792
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL795
+	.4byte	.LVL797
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL797
+	.4byte	.LVL798
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL799
+	.4byte	.LVL802
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST203:
+	.4byte	.LVL790
+	.4byte	.LVL793
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL794
+	.4byte	.LVL795
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL796
+	.4byte	.LVL800
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL800
+	.4byte	.LVL801
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL802
+	.4byte	.LVL804
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL804
+	.4byte	.LVL806
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL806
+	.4byte	.LVL807
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL807
+	.4byte	.LFE257
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST204:
+	.4byte	.LVL790
+	.4byte	.LVL793
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL794
+	.4byte	.LVL795
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL802
+	.4byte	.LVL805-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL805-1
+	.4byte	.LVL806
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST205:
+	.4byte	.LVL790
+	.4byte	.LVL793
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST197:
+	.4byte	.LVL771
+	.4byte	.LVL773
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL773
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST198:
+	.4byte	.LVL771
+	.4byte	.LVL772
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL772
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST67:
+	.4byte	.LVL187
+	.4byte	.LVL190
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL191
+	.4byte	.LVL192
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL194
+	.4byte	.LVL196
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST68:
+	.4byte	.LVL187
+	.4byte	.LVL195
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL195
+	.4byte	.LVL197
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST69:
+	.4byte	.LVL188
+	.4byte	.LVL189
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL193
+	.4byte	.LVL197
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST66:
+	.4byte	.LVL185
+	.4byte	.LVL186-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL186-1
+	.4byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST62:
+	.4byte	.LVL173
+	.4byte	.LVL178-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL178-1
+	.4byte	.LVL179
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL179
+	.4byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL184
+	.4byte	.LFE252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST63:
+	.4byte	.LVL173
+	.4byte	.LVL177
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL179
+	.4byte	.LVL180
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL182
+	.4byte	.LFE252
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST64:
+	.4byte	.LVL173
+	.4byte	.LVL176
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL176
+	.4byte	.LVL179
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL179
+	.4byte	.LFE252
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST65:
+	.4byte	.LVL174
+	.4byte	.LVL175
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL179
+	.4byte	.LVL183
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST59:
+	.4byte	.LVL164
+	.4byte	.LVL167
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL167
+	.4byte	.LFE251
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST60:
+	.4byte	.LVL164
+	.4byte	.LVL166
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL166
+	.4byte	.LFE251
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST61:
+	.4byte	.LVL170
+	.4byte	.LVL171
+	.2byte	0xc
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL171
+	.4byte	.LVL172
+	.2byte	0xe
+	.byte	0x74
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST53:
+	.4byte	.LVL145
+	.4byte	.LVL148
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL148
+	.4byte	.LVL149
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL149
+	.4byte	.LFE250
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST54:
+	.4byte	.LVL146
+	.4byte	.LVL147
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL149
+	.4byte	.LFE250
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST55:
+	.4byte	.LVL150
+	.4byte	.LVL151
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL151
+	.4byte	.LFE250
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST56:
+	.4byte	.LVL151
+	.4byte	.LVL152
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL153
+	.4byte	.LVL155
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL156
+	.4byte	.LVL157
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST57:
+	.4byte	.LVL151
+	.4byte	.LVL153
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL153
+	.4byte	.LVL156
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL156
+	.4byte	.LVL158
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL158
+	.4byte	.LVL159
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x77
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST44:
+	.4byte	.LVL111
+	.4byte	.LVL114
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL114
+	.4byte	.LVL115
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL115
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST45:
+	.4byte	.LVL112
+	.4byte	.LVL113
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL115
+	.4byte	.LVL139
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL139
+	.4byte	.LFE249
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST46:
+	.4byte	.LVL117
+	.4byte	.LVL120
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL120
+	.4byte	.LVL126
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL129
+	.4byte	.LVL134
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL135
+	.4byte	.LVL136
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL137
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST47:
+	.4byte	.LVL116
+	.4byte	.LVL118
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL118
+	.4byte	.LVL124
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL127
+	.4byte	.LVL129
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL129
+	.4byte	.LVL133
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL135
+	.4byte	.LVL138
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST48:
+	.4byte	.LVL121
+	.4byte	.LVL127
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL129
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST49:
+	.4byte	.LVL116
+	.4byte	.LVL117
+	.2byte	0xe
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL117
+	.4byte	.LVL127
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL127
+	.4byte	.LVL128
+	.2byte	0xe
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL128
+	.4byte	.LVL129
+	.2byte	0x10
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x71
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL129
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST50:
+	.4byte	.LVL121
+	.4byte	.LVL122
+	.2byte	0xe
+	.byte	0x7b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL122
+	.4byte	.LVL123
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0xe
+	.byte	0x7b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL130
+	.4byte	.LVL131
+	.2byte	0x10
+	.byte	0x7b
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL131
+	.4byte	.LVL132
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST51:
+	.4byte	.LVL119
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL125
+	.4byte	.LVL127
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL129
+	.4byte	.LVL135
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL135
+	.4byte	.LVL138
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL138
+	.4byte	.LVL140
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST42:
+	.4byte	.LVL106
+	.4byte	.LVL108
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL108
+	.4byte	.LVL109
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL109
+	.4byte	.LVL110
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL110
+	.4byte	.LFE246
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST43:
+	.4byte	.LVL107
+	.4byte	.LVL109
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST39:
+	.4byte	.LVL99
+	.4byte	.LVL102
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL102
+	.4byte	.LVL103
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL103
+	.4byte	.LVL105
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL105
+	.4byte	.LFE245
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST40:
+	.4byte	.LVL99
+	.4byte	.LVL105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL105
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST41:
+	.4byte	.LVL100
+	.4byte	.LVL101
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL103
+	.4byte	.LFE245
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST33:
+	.4byte	.LVL81
+	.4byte	.LVL82
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL83
+	.4byte	.LVL84
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL86
+	.4byte	.LVL91
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL95
+	.4byte	.LFE244
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST34:
+	.4byte	.LVL86
+	.4byte	.LVL88
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL88
+	.4byte	.LVL90
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL95
+	.4byte	.LFE244
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST35:
+	.4byte	.LVL87
+	.4byte	.LVL88
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL88
+	.4byte	.LVL97
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL98
+	.4byte	.LFE244
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST36:
+	.4byte	.LVL92
+	.4byte	.LVL94
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST37:
+	.4byte	.LVL85
+	.4byte	.LVL86
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST38:
+	.4byte	.LVL89
+	.4byte	.LVL93
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST175:
+	.4byte	.LVL633
+	.4byte	.LVL635-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL635-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST176:
+	.4byte	.LVL633
+	.4byte	.LVL635-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL635-1
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST177:
+	.4byte	.LVL634
+	.4byte	.LVL639
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST178:
+	.4byte	.LVL636
+	.4byte	.LVL638
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST196:
+	.4byte	.LVL768
+	.4byte	.LVL769
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL769
+	.4byte	.LVL770-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.4byte	.LVL770-1
+	.4byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST157:
+	.4byte	.LVL584
+	.4byte	.LVL585
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL585
+	.4byte	.LFE239
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST158:
+	.4byte	.LVL584
+	.4byte	.LVL586
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL586
+	.4byte	.LVL591-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL591-1
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST159:
+	.4byte	.LVL590
+	.4byte	.LVL592
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL592
+	.4byte	.LVL593
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL594
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST160:
+	.4byte	.LVL595
+	.4byte	.LVL597
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL597
+	.4byte	.LVL599
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL599
+	.4byte	.LVL600
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL600
+	.4byte	.LFE239
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST161:
+	.4byte	.LVL587
+	.4byte	.LVL588
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL588
+	.4byte	.LVL589
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST31:
+	.4byte	.LVL76
+	.4byte	.LVL77
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL78
+	.4byte	.LVL79
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL79
+	.4byte	.LFE238
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST32:
+	.4byte	.LVL76
+	.4byte	.LVL78
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL78
+	.4byte	.LVL80
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL80
+	.4byte	.LFE238
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST29:
+	.4byte	.LVL72
+	.4byte	.LVL73-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL73-1
+	.4byte	.LFE237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST30:
+	.4byte	.LVL74
+	.4byte	.LVL75-1
+	.2byte	0x11
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST27:
+	.4byte	.LVL68
+	.4byte	.LVL70-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL70-1
+	.4byte	.LFE236
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST28:
+	.4byte	.LVL69
+	.4byte	.LVL70-1
+	.2byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST24:
+	.4byte	.LVL63
+	.4byte	.LVL66-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL66-1
+	.4byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST25:
+	.4byte	.LVL63
+	.4byte	.LVL65
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL65
+	.4byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST26:
+	.4byte	.LVL64
+	.4byte	.LVL66-1
+	.2byte	0x20
+	.byte	0x77
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST346:
+	.4byte	.LVL1461
+	.4byte	.LVL1463
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1470
+	.4byte	.LVL1475
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1475
+	.4byte	.LVL1476
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1476
+	.4byte	.LVL1494
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST347:
+	.4byte	.LVL1462
+	.4byte	.LVL1464
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1464
+	.4byte	.LVL1468
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1469
+	.4byte	.LVL1470
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1480
+	.4byte	.LVL1490
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1491
+	.4byte	.LVL1492
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1492
+	.4byte	.LVL1493-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1493
+	.4byte	.LVL1494
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1494
+	.4byte	.LVL1495
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1500
+	.4byte	.LVL1501-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST348:
+	.4byte	.LVL1472
+	.4byte	.LVL1477
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1484
+	.4byte	.LVL1489
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST349:
+	.4byte	.LVL1471
+	.4byte	.LVL1492
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST155:
+	.4byte	.LVL576
+	.4byte	.LVL582
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL583
+	.4byte	.LFE233
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST156:
+	.4byte	.LVL577
+	.4byte	.LVL578
+	.2byte	0x13
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL578
+	.4byte	.LVL579
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 15
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL579
+	.4byte	.LVL580-1
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST342:
+	.4byte	.LVL1447
+	.4byte	.LVL1448
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1455
+	.4byte	.LVL1456
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1456
+	.4byte	.LVL1457
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1457
+	.4byte	.LVL1458
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST343:
+	.4byte	.LVL1436
+	.4byte	.LVL1439
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1448
+	.4byte	.LVL1449
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1450
+	.4byte	.LVL1451
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST344:
+	.4byte	.LVL1442
+	.4byte	.LVL1446
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1451
+	.4byte	.LVL1453
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1454
+	.4byte	.LVL1455
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST345:
+	.4byte	.LVL1434
+	.4byte	.LVL1445
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1448
+	.4byte	.LVL1455
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1458
+	.4byte	.LVL1459
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST22:
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL56
+	.4byte	.LVL57
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL57
+	.4byte	.LVL58
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL58
+	.4byte	.LVL59-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL59-1
+	.4byte	.LVL61
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL61
+	.4byte	.LVL62
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST23:
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL56
+	.4byte	.LVL60
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL61
+	.4byte	.LFE231
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST288:
+	.4byte	.LVL1162
+	.4byte	.LVL1164
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1174
+	.4byte	.LVL1175
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1175
+	.4byte	.LVL1176
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1176
+	.4byte	.LVL1177
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST289:
+	.4byte	.LVL1161
+	.4byte	.LVL1166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1166
+	.4byte	.LVL1174
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL1174
+	.4byte	.LVL1177
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1177
+	.4byte	.LVL1178
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1178
+	.4byte	.LVL1179
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL1180
+	.4byte	.LVL1181
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL1181
+	.4byte	.LFE229
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST290:
+	.4byte	.LVL1163
+	.4byte	.LVL1174
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1177
+	.4byte	.LVL1181
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST291:
+	.4byte	.LVL1161
+	.4byte	.LVL1166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1166
+	.4byte	.LVL1171
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1172
+	.4byte	.LVL1174
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1174
+	.4byte	.LVL1177
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1177
+	.4byte	.LVL1181
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST194:
+	.4byte	.LVL761
+	.4byte	.LVL763
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL763
+	.4byte	.LVL766
+	.2byte	0x4
+	.byte	0x75
+	.sleb128 -1022
+	.byte	0x9f
+	.4byte	.LVL766
+	.4byte	.LFE228
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST195:
+	.4byte	.LVL761
+	.4byte	.LVL762
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL762
+	.4byte	.LVL766
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL766
+	.4byte	.LFE228
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST17:
+	.4byte	.LVL47
+	.4byte	.LVL49-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL49-1
+	.4byte	.LFE226
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST18:
+	.4byte	.LVL48
+	.4byte	.LVL53
+	.2byte	0x10
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST19:
+	.4byte	.LVL50
+	.4byte	.LVL51-1
+	.2byte	0x32
+	.byte	0x74
+	.sleb128 0
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL50
+	.4byte	.LVL51-1
+	.2byte	0x19
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST21:
+	.4byte	.LVL50
+	.4byte	.LVL52
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST13:
+	.4byte	.LVL40
+	.4byte	.LVL41-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL41-1
+	.4byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST14:
+	.4byte	.LVL42
+	.4byte	.LVL46
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST15:
+	.4byte	.LVL44
+	.4byte	.LVL45-1
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST16:
+	.4byte	.LVL44
+	.4byte	.LVL45-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST443:
+	.4byte	.LVL1965
+	.4byte	.LVL1968
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1968
+	.4byte	.LVL1969-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1969-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST444:
+	.4byte	.LVL1965
+	.4byte	.LVL1967
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1967
+	.4byte	.LVL1969-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1969-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST445:
+	.4byte	.LVL1965
+	.4byte	.LVL1966
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1966
+	.4byte	.LVL1969-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1969-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST425:
+	.4byte	.LVL1864
+	.4byte	.LVL1867
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1867
+	.4byte	.LVL1868-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1868-1
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST426:
+	.4byte	.LVL1864
+	.4byte	.LVL1866
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1866
+	.4byte	.LVL1868-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1868-1
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST427:
+	.4byte	.LVL1864
+	.4byte	.LVL1865
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1865
+	.4byte	.LVL1868-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1868-1
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST383:
+	.4byte	.LVL1630
+	.4byte	.LVL1631
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1631
+	.4byte	.LVL1632
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1632
+	.4byte	.LVL1633-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1633-1
+	.4byte	.LVL1636
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1636
+	.4byte	.LVL1651
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1651
+	.4byte	.LVL1652
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1652
+	.4byte	.LFE221
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST384:
+	.4byte	.LVL1630
+	.4byte	.LVL1631
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1631
+	.4byte	.LVL1632
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1632
+	.4byte	.LVL1633-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1633-1
+	.4byte	.LVL1651
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1651
+	.4byte	.LFE221
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST385:
+	.4byte	.LVL1637
+	.4byte	.LVL1642
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST386:
+	.4byte	.LVL1638
+	.4byte	.LVL1639
+	.2byte	0x21
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x75
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST387:
+	.4byte	.LVL1635
+	.4byte	.LVL1640
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1640
+	.4byte	.LVL1651
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST388:
+	.4byte	.LVL1647
+	.4byte	.LVL1648-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST428:
+	.4byte	.LVL1869
+	.4byte	.LVL1872
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1872
+	.4byte	.LVL1874
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LVL1876
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1876
+	.4byte	.LVL1963
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1963
+	.4byte	.LVL1964
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1964
+	.4byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST429:
+	.4byte	.LVL1869
+	.4byte	.LVL1871
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1871
+	.4byte	.LVL1874
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1874
+	.4byte	.LVL1878
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1878
+	.4byte	.LVL1922
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1922
+	.4byte	.LVL1923
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1923
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1963
+	.4byte	.LFE220
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST430:
+	.4byte	.LVL1869
+	.4byte	.LVL1870
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1870
+	.4byte	.LVL1874
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1874
+	.4byte	.LVL1877
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1877
+	.4byte	.LVL1923
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1923
+	.4byte	.LVL1924
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1924
+	.4byte	.LVL1963
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1963
+	.4byte	.LFE220
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST431:
+	.4byte	.LVL1869
+	.4byte	.LVL1873-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1873-1
+	.4byte	.LVL1874
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1874
+	.4byte	.LVL1875
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1875
+	.4byte	.LVL1925
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL1925
+	.4byte	.LVL1926
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1926
+	.4byte	.LFE220
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST432:
+	.4byte	.LVL1935
+	.4byte	.LVL1938
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST433:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1886
+	.4byte	.LVL1906
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1929
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST434:
+	.4byte	.LVL1880
+	.4byte	.LVL1881
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1881
+	.4byte	.LVL1911
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1911
+	.4byte	.LVL1912
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1912
+	.4byte	.LVL1927
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1927
+	.4byte	.LVL1928-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1928-1
+	.4byte	.LVL1963
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST435:
+	.4byte	.LVL1883
+	.4byte	.LVL1885-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1885-1
+	.4byte	.LVL1911
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL1911
+	.4byte	.LVL1914
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1914
+	.4byte	.LVL1963
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST436:
+	.4byte	.LVL1934
+	.4byte	.LVL1936
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1936
+	.4byte	.LVL1937
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.4byte	.LVL1937
+	.4byte	.LVL1939-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	req_prgm
+	.byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST437:
+	.4byte	.LVL1897
+	.4byte	.LVL1900
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1900
+	.4byte	.LVL1902
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1932
+	.4byte	.LVL1949
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1949
+	.4byte	.LVL1950
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1950
+	.4byte	.LVL1959
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST438:
+	.4byte	.LVL1884
+	.4byte	.LVL1885-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1885-1
+	.4byte	.LVL1901
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1901
+	.4byte	.LVL1903
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1903
+	.4byte	.LVL1911
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1911
+	.4byte	.LVL1913
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1913
+	.4byte	.LVL1919
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1919
+	.4byte	.LVL1920
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1921
+	.4byte	.LVL1929
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1929
+	.4byte	.LVL1962
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL1962
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST439:
+	.4byte	.LVL1893
+	.4byte	.LVL1894
+	.2byte	0x1f
+	.byte	0x74
+	.sleb128 7
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x6
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	.LVL1894
+	.4byte	.LVL1895
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1895
+	.4byte	.LVL1898
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1898
+	.4byte	.LVL1899
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1899
+	.4byte	.LVL1900
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1900
+	.4byte	.LVL1902
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1932
+	.4byte	.LVL1959
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1959
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST440:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1916
+	.4byte	.LVL1917
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1917
+	.4byte	.LVL1919-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1940
+	.4byte	.LVL1942
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1944
+	.4byte	.LVL1945
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1945
+	.4byte	.LVL1947
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1951
+	.4byte	.LVL1958
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST441:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1916
+	.4byte	.LVL1920
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1921
+	.4byte	.LVL1929
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1941
+	.4byte	.LVL1942
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1945
+	.4byte	.LVL1946
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1951
+	.4byte	.LVL1958
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST442:
+	.4byte	.LVL1885
+	.4byte	.LVL1886
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL1886
+	.4byte	.LVL1889
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1892
+	.4byte	.LVL1904
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1929
+	.4byte	.LVL1931
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1932
+	.4byte	.LVL1963
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST375:
+	.4byte	.LVL1602
+	.4byte	.LVL1605-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1605-1
+	.4byte	.LVL1605
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1605
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST376:
+	.4byte	.LVL1602
+	.4byte	.LVL1605-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1605-1
+	.4byte	.LVL1623
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1623
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST377:
+	.4byte	.LVL1602
+	.4byte	.LVL1603
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1603
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST378:
+	.4byte	.LVL1602
+	.4byte	.LVL1604
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1604
+	.4byte	.LVL1623
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1623
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST379:
+	.4byte	.LVL1605
+	.4byte	.LVL1623
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST380:
+	.4byte	.LVL1614
+	.4byte	.LVL1621
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST381:
+	.4byte	.LVL1606
+	.4byte	.LVL1607
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1616
+	.4byte	.LVL1617
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST382:
+	.4byte	.LVL1613
+	.4byte	.LVL1615-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST408:
+	.4byte	.LVL1813
+	.4byte	.LVL1816
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1816
+	.4byte	.LVL1819
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1822
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1822
+	.4byte	.LVL1862
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1862
+	.4byte	.LVL1863
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1863
+	.4byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST409:
+	.4byte	.LVL1813
+	.4byte	.LVL1815
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1815
+	.4byte	.LVL1819
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1819
+	.4byte	.LVL1823-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1823-1
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST410:
+	.4byte	.LVL1813
+	.4byte	.LVL1814
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1814
+	.4byte	.LVL1819
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL1819
+	.4byte	.LVL1821
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1821
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	0
+	.4byte	0
+.LLST411:
+	.4byte	.LVL1813
+	.4byte	.LVL1817-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1817-1
+	.4byte	.LVL1819
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1819
+	.4byte	.LVL1820
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1820
+	.4byte	.LFE217
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST412:
+	.4byte	.LVL1813
+	.4byte	.LVL1818
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST413:
+	.4byte	.LVL1825
+	.4byte	.LVL1826
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1826
+	.4byte	.LVL1862
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST414:
+	.4byte	.LVL1828
+	.4byte	.LVL1831
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1831
+	.4byte	.LVL1862
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST415:
+	.4byte	.LVL1847
+	.4byte	.LVL1848
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1848
+	.4byte	.LVL1849-1
+	.2byte	0x12
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST416:
+	.4byte	.LVL1829
+	.4byte	.LVL1831
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL1831
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST417:
+	.4byte	.LVL1840
+	.4byte	.LVL1841
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1841
+	.4byte	.LVL1846
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1859
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST418:
+	.4byte	.LVL1829
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1845
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1846
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST419:
+	.4byte	.LVL1829
+	.4byte	.LVL1830
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1830
+	.4byte	.LVL1831
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1831
+	.4byte	.LVL1833
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1833
+	.4byte	.LVL1834-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1834-1
+	.4byte	.LVL1837
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1837
+	.4byte	.LVL1838
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1839
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1839
+	.4byte	.LVL1862
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST420:
+	.4byte	.LVL1813
+	.4byte	.LVL1818
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1853
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1853
+	.4byte	.LVL1856
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1856
+	.4byte	.LVL1862
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST421:
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1853
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1853
+	.4byte	.LVL1854
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1854
+	.4byte	.LVL1855
+	.2byte	0x6
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1855
+	.4byte	.LVL1856
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1856
+	.4byte	.LVL1862
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST422:
+	.4byte	.LVL1819
+	.4byte	.LVL1831
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1831
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1862
+	.4byte	.LFE217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST423:
+	.4byte	.LVL1835
+	.4byte	.LVL1836
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1846
+	.4byte	.LVL1851
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST424:
+	.4byte	.LVL1860
+	.4byte	.LVL1861-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST452:
+	.4byte	.LVL2071
+	.4byte	.LVL2072
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2072
+	.4byte	.LVL2073
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc2
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2073
+	.4byte	.LVL2074
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST448:
+	.4byte	.LVL2025
+	.4byte	.LVL2027
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2029
+	.4byte	.LVL2030
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2040
+	.4byte	.LVL2042
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2045
+	.4byte	.LVL2046
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2050
+	.4byte	.LVL2051
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2053
+	.4byte	.LVL2054
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2054
+	.4byte	.LVL2055-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2057
+	.4byte	.LVL2058
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST449:
+	.4byte	.LVL2029
+	.4byte	.LVL2033
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2054
+	.4byte	.LVL2056
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2057
+	.4byte	.LVL2058
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST450:
+	.4byte	.LVL2023
+	.4byte	.LVL2026
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2026
+	.4byte	.LVL2028
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2040
+	.4byte	.LVL2043
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2044
+	.4byte	.LVL2049
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2049
+	.4byte	.LVL2050
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST451:
+	.4byte	.LVL2021
+	.4byte	.LVL2022
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2022
+	.4byte	.LVL2024
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2038
+	.4byte	.LVL2039
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2039
+	.4byte	.LVL2040
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST179:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL642
+	.4byte	.LFE212
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST180:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL642
+	.4byte	.LFE212
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST181:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL669
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL670
+	.4byte	.LVL672
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL673
+	.4byte	.LVL687
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL688
+	.4byte	.LFE212
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST182:
+	.4byte	.LVL640
+	.4byte	.LVL642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL647
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL647
+	.4byte	.LVL648
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL648
+	.4byte	.LVL664
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL665
+	.4byte	.LVL682
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL683
+	.4byte	.LFE212
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST183:
+	.4byte	.LVL641
+	.4byte	.LVL642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL643
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL643
+	.4byte	.LVL647
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL647
+	.4byte	.LVL648
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL648
+	.4byte	.LVL649
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL649
+	.4byte	.LVL650
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL651
+	.4byte	.LVL652
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL652
+	.4byte	.LVL655
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL655
+	.4byte	.LVL657
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL657
+	.4byte	.LVL658
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL659
+	.4byte	.LVL666
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL666
+	.4byte	.LVL667
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL668
+	.4byte	.LVL671
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL671
+	.4byte	.LVL674
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL674
+	.4byte	.LVL675
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL676
+	.4byte	.LVL677
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL677
+	.4byte	.LVL684
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL684
+	.4byte	.LVL685
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL686
+	.4byte	.LVL690
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL690
+	.4byte	.LVL691
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL692
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL693
+	.4byte	.LVL694
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST184:
+	.4byte	.LVL661
+	.4byte	.LVL662-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL679
+	.4byte	.LVL680-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST185:
+	.4byte	.LVL640
+	.4byte	.LVL645
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL645
+	.4byte	.LVL646
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST186:
+	.4byte	.LVL640
+	.4byte	.LVL647
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL647
+	.4byte	.LVL653
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL654
+	.4byte	.LVL656
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL677
+	.4byte	.LVL692
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST187:
+	.4byte	.LVL640
+	.4byte	.LVL646
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST188:
+	.4byte	.LVL640
+	.4byte	.LVL644
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL644
+	.4byte	.LVL646
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL659
+	.4byte	.LVL677
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST192:
+	.4byte	.LVL754
+	.4byte	.LVL755
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL755
+	.4byte	.LVL756
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL758
+	.4byte	.LVL760
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST193:
+	.4byte	.LVL699
+	.4byte	.LVL705
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL705
+	.4byte	.LVL712
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL714
+	.4byte	.LVL720
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL721
+	.4byte	.LVL724
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL725
+	.4byte	.LVL726
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL726
+	.4byte	.LVL729
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL735
+	.4byte	.LVL736
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL736
+	.4byte	.LVL737-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL738
+	.4byte	.LVL739
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL739
+	.4byte	.LVL740-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL741
+	.4byte	.LVL742
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3c
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL742
+	.4byte	.LVL743-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL744
+	.4byte	.LVL745
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL745
+	.4byte	.LVL746-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL747
+	.4byte	.LVL748
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL748
+	.4byte	.LVL749-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL750
+	.4byte	.LVL751
+	.2byte	0x11
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL751
+	.4byte	.LVL752
+	.2byte	0x1e
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x1f
+	.byte	0x35
+	.byte	0x26
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL752
+	.4byte	.LVL753-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST10:
+	.4byte	.LVL25
+	.4byte	.LVL26
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL26
+	.4byte	.LVL32
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL32
+	.4byte	.LFE208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST11:
+	.4byte	.LVL27
+	.4byte	.LVL29
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST9:
+	.4byte	.LVL22
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL23
+	.4byte	.LVL24
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL24
+	.4byte	.LFE207
+	.2byte	0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.4byte	0
+	.4byte	0
+.LLST6:
+	.4byte	.LVL14
+	.4byte	.LVL18
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL18
+	.4byte	.LVL19
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL19
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST7:
+	.4byte	.LVL14
+	.4byte	.LVL15
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL16
+	.4byte	.LVL17
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL17
+	.4byte	.LVL19
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL19
+	.4byte	.LVL20
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL20
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST8:
+	.4byte	.LVL14
+	.4byte	.LVL15
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL16
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST111:
+	.4byte	.LVL449
+	.4byte	.LVL451-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL451-1
+	.4byte	.LVL456
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL456
+	.4byte	.LFE204
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST112:
+	.4byte	.LVL450
+	.4byte	.LVL451-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL451-1
+	.4byte	.LVL452
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL452
+	.4byte	.LVL453
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL453
+	.4byte	.LVL454
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL454
+	.4byte	.LVL455
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST106:
+	.4byte	.LVL300
+	.4byte	.LVL302-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL302-1
+	.4byte	.LFE203
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST107:
+	.4byte	.LVL438
+	.4byte	.LVL440
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL440
+	.4byte	.LVL442
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL442
+	.4byte	.LVL444
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL445
+	.4byte	.LVL446
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL446
+	.4byte	.LVL447-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL447-1
+	.4byte	.LVL448
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL448
+	.4byte	.LFE203
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST108:
+	.4byte	.LVL301
+	.4byte	.LVL302-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL302-1
+	.4byte	.LVL303
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL303
+	.4byte	.LVL415
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL415
+	.4byte	.LFE203
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST109:
+	.4byte	.LVL438
+	.4byte	.LVL439-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL442
+	.4byte	.LVL443
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST110:
+	.4byte	.LVL445
+	.4byte	.LVL447-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL448
+	.4byte	.LFE203
+	.2byte	0x9
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST0:
+	.4byte	.LVL0
+	.4byte	.LVL5
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL5
+	.4byte	.LVL11
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL11
+	.4byte	.LFE351
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST1:
+	.4byte	.LVL0
+	.4byte	.LVL7-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL7-1
+	.4byte	.LVL11
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL11
+	.4byte	.LFE351
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST2:
+	.4byte	.LVL1
+	.4byte	.LVL9
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST3:
+	.4byte	.LVL2
+	.4byte	.LVL4
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL4
+	.4byte	.LVL6
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_nand_phy_info+10
+	.4byte	.LVL6
+	.4byte	.LVL11
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST4:
+	.4byte	.LVL8
+	.4byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL10
+	.4byte	.LVL11
+	.2byte	0x2
+	.byte	0x7a
+	.sleb128 0
+	.4byte	.LVL11
+	.4byte	.LFE351
+	.2byte	0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST5:
+	.4byte	.LVL12
+	.4byte	.LVL13
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL13
+	.4byte	.LFE358
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST12:
+	.4byte	.LVL36
+	.4byte	.LVL37
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL37
+	.4byte	.LVL38
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL38
+	.4byte	.LVL39
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL39
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST52:
+	.4byte	.LVL141
+	.4byte	.LVL142-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL142-1
+	.4byte	.LFE248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST58:
+	.4byte	.LVL160
+	.4byte	.LVL161-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL161-1
+	.4byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST70:
+	.4byte	.LVL198
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL204
+	.4byte	.LFE255
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST71:
+	.4byte	.LVL199
+	.4byte	.LVL204
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL204
+	.4byte	.LVL215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST72:
+	.4byte	.LVL207
+	.4byte	.LVL208
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL213-1
+	.2byte	0xd
+	.byte	0x78
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST73:
+	.4byte	.LVL201
+	.4byte	.LVL204
+	.2byte	0xb
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL204
+	.4byte	.LVL206-1
+	.2byte	0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST74:
+	.4byte	.LVL202
+	.4byte	.LVL203
+	.2byte	0x6
+	.byte	0x75
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL203
+	.4byte	.LVL212
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST75:
+	.4byte	.LVL207
+	.4byte	.LVL208
+	.2byte	0xd
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL208
+	.4byte	.LVL213-1
+	.2byte	0x15
+	.byte	0x78
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST76:
+	.4byte	.LVL209
+	.4byte	.LVL210
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL210
+	.4byte	.LVL213-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST77:
+	.4byte	.LVL200
+	.4byte	.LVL215
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST78:
+	.4byte	.LVL207
+	.4byte	.LVL208
+	.2byte	0xa
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL208
+	.4byte	.LVL213-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST79:
+	.4byte	.LVL216
+	.4byte	.LVL219
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL219
+	.4byte	.LVL221
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL221
+	.4byte	.LVL222-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL222-1
+	.4byte	.LVL223
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL223
+	.4byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST80:
+	.4byte	.LVL216
+	.4byte	.LVL217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL218
+	.4byte	.LVL223
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST81:
+	.4byte	.LVL216
+	.4byte	.LVL219
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL221
+	.4byte	.LVL222-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST82:
+	.4byte	.LVL219
+	.4byte	.LVL221
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST86:
+	.4byte	.LVL244
+	.4byte	.LVL245
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL245
+	.4byte	.LFE269
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST87:
+	.4byte	.LVL247
+	.4byte	.LVL248-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL248-1
+	.4byte	.LVL248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL248
+	.4byte	.LVL249
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL249
+	.4byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST88:
+	.4byte	.LVL247
+	.4byte	.LVL248-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL248-1
+	.4byte	.LVL248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL248
+	.4byte	.LVL250
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL250
+	.4byte	.LFE275
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST93:
+	.4byte	.LVL264
+	.4byte	.LVL266
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL267
+	.4byte	.LFE285
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST94:
+	.4byte	.LVL265
+	.4byte	.LVL266
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL267
+	.4byte	.LFE285
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST120:
+	.4byte	.LVL485
+	.4byte	.LVL487-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL487-1
+	.4byte	.LFE300
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST121:
+	.4byte	.LVL486
+	.4byte	.LVL487-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL487-1
+	.4byte	.LVL487
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST238:
+	.4byte	.LVL916
+	.4byte	.LVL920
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x800
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL921
+	.4byte	.LVL922
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL922
+	.4byte	.LVL923
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x800
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST280:
+	.4byte	.LVL1139
+	.4byte	.LVL1141
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1141
+	.4byte	.LVL1149
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1149
+	.4byte	.LFE346
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST281:
+	.4byte	.LVL1140
+	.4byte	.LVL1142
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST301:
+	.4byte	.LVL1224
+	.4byte	.LVL1225
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1225
+	.4byte	.LFE320
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST302:
+	.4byte	.LVL1225
+	.4byte	.LVL1226
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1227
+	.4byte	.LVL1231
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1231
+	.4byte	.LVL1232
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1233
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST303:
+	.4byte	.LVL1230
+	.4byte	.LVL1237
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1237
+	.4byte	.LVL1238
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1238
+	.4byte	.LVL1239
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1240
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST304:
+	.4byte	.LVL1236
+	.4byte	.LVL1238
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1240
+	.4byte	.LVL1241
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1242
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST305:
+	.4byte	.LVL1243
+	.4byte	.LVL1245
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1245
+	.4byte	.LVL1251
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1251
+	.4byte	.LVL1252
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1252
+	.4byte	.LVL1253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1253
+	.4byte	.LVL1254-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1254-1
+	.4byte	.LFE304
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST306:
+	.4byte	.LVL1244
+	.4byte	.LVL1251
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST309:
+	.4byte	.LVL1266
+	.4byte	.LVL1267-1
+	.2byte	0x9
+	.byte	0x3
+	.4byte	g_MaxLpn
+	.byte	0x6
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1267-1
+	.4byte	.LVL1271
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1272
+	.4byte	.LVL1278
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST310:
+	.4byte	.LVL1266
+	.4byte	.LVL1267-1
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1267-1
+	.4byte	.LVL1270
+	.2byte	0x9
+	.byte	0x78
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1272
+	.4byte	.LVL1274
+	.2byte	0x9
+	.byte	0x78
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST311:
+	.4byte	.LVL1268
+	.4byte	.LVL1271
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1272
+	.4byte	.LVL1278
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST396:
+	.4byte	.LVL1713
+	.4byte	.LVL1714
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1714
+	.4byte	.LVL1728
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1728
+	.4byte	.LVL1729
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1729
+	.4byte	.LVL1745
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1745
+	.4byte	.LVL1750
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1750
+	.4byte	.LVL1751
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1751
+	.4byte	.LVL1753
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1753
+	.4byte	.LVL1754
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1754
+	.4byte	.LVL1805
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1805
+	.4byte	.LVL1809
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1809
+	.4byte	.LVL1810
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1810
+	.4byte	.LFE322
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST397:
+	.4byte	.LVL1713
+	.4byte	.LVL1715
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1715
+	.4byte	.LVL1729
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1729
+	.4byte	.LVL1730-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1730-1
+	.4byte	.LVL1805
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1805
+	.4byte	.LVL1806
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1806
+	.4byte	.LFE322
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST398:
+	.4byte	.LVL1715
+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1731
+	.4byte	.LVL1804
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1806
+	.4byte	.LFE322
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST399:
+	.4byte	.LVL1715
+	.4byte	.LVL1728
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1731
+	.4byte	.LVL1745
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1745
+	.4byte	.LVL1750
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1750
+	.4byte	.LVL1751
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1751
+	.4byte	.LVL1753
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1753
+	.4byte	.LVL1754
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1754
+	.4byte	.LVL1804
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1806
+	.4byte	.LVL1809
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1809
+	.4byte	.LVL1810
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1810
+	.4byte	.LFE322
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST400:
+	.4byte	.LVL1786
+	.4byte	.LVL1789
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST401:
+	.4byte	.LVL1772
+	.4byte	.LVL1781
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL1781
+	.4byte	.LVL1782
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL1782
+	.4byte	.LVL1804
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	0
+	.4byte	0
+.LLST402:
+	.4byte	.LVL1773
+	.4byte	.LVL1776
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1776
+	.4byte	.LVL1777
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1777
+	.4byte	.LVL1778-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1778
+	.4byte	.LVL1779
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1780
+	.4byte	.LVL1793
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1794
+	.4byte	.LVL1795
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST403:
+	.4byte	.LVL1773
+	.4byte	.LVL1793
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL1794
+	.4byte	.LVL1795
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST404:
+	.4byte	.LVL1774
+	.4byte	.LVL1775
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1775
+	.4byte	.LVL1777
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST405:
+	.4byte	.LVL1769
+	.4byte	.LVL1804
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST406:
+	.4byte	.LVL1783
+	.4byte	.LVL1784
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 12
+	.4byte	.LVL1784
+	.4byte	.LVL1785
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1785
+	.4byte	.LVL1793
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST407:
+	.4byte	.LVL1719
+	.4byte	.LVL1720
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1732
+	.4byte	.LVL1733
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST447:
+	.4byte	.LVL2003
+	.4byte	.LVL2004
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL2004
+	.4byte	.LVL2010
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+	.section	.debug_aranges,"",%progbits
+	.4byte	0x43c
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x4
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.4byte	.LFB351
+	.4byte	.LFE351-.LFB351
+	.4byte	.LFB358
+	.4byte	.LFE358-.LFB358
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
+	.4byte	.LFB208
+	.4byte	.LFE208-.LFB208
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
+	.4byte	.LFB224
+	.4byte	.LFE224-.LFB224
+	.4byte	.LFB225
+	.4byte	.LFE225-.LFB225
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
+	.4byte	.LFB231
+	.4byte	.LFE231-.LFB231
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
+	.4byte	.LFB236
+	.4byte	.LFE236-.LFB236
+	.4byte	.LFB237
+	.4byte	.LFE237-.LFB237
+	.4byte	.LFB238
+	.4byte	.LFE238-.LFB238
+	.4byte	.LFB241
+	.4byte	.LFE241-.LFB241
+	.4byte	.LFB242
+	.4byte	.LFE242-.LFB242
+	.4byte	.LFB244
+	.4byte	.LFE244-.LFB244
+	.4byte	.LFB245
+	.4byte	.LFE245-.LFB245
+	.4byte	.LFB246
+	.4byte	.LFE246-.LFB246
+	.4byte	.LFB249
+	.4byte	.LFE249-.LFB249
+	.4byte	.LFB248
+	.4byte	.LFE248-.LFB248
+	.4byte	.LFB250
+	.4byte	.LFE250-.LFB250
+	.4byte	.LFB247
+	.4byte	.LFE247-.LFB247
+	.4byte	.LFB251
+	.4byte	.LFE251-.LFB251
+	.4byte	.LFB252
+	.4byte	.LFE252-.LFB252
+	.4byte	.LFB253
+	.4byte	.LFE253-.LFB253
+	.4byte	.LFB254
+	.4byte	.LFE254-.LFB254
+	.4byte	.LFB255
+	.4byte	.LFE255-.LFB255
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
+	.4byte	.LFB263
+	.4byte	.LFE263-.LFB263
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
+	.4byte	.LFB275
+	.4byte	.LFE275-.LFB275
+	.4byte	.LFB276
+	.4byte	.LFE276-.LFB276
+	.4byte	.LFB282
+	.4byte	.LFE282-.LFB282
+	.4byte	.LFB285
+	.4byte	.LFE285-.LFB285
+	.4byte	.LFB287
+	.4byte	.LFE287-.LFB287
+	.4byte	.LFB296
+	.4byte	.LFE296-.LFB296
+	.4byte	.LFB297
+	.4byte	.LFE297-.LFB297
+	.4byte	.LFB298
+	.4byte	.LFE298-.LFB298
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
+	.4byte	.LFB299
+	.4byte	.LFE299-.LFB299
+	.4byte	.LFB300
+	.4byte	.LFE300-.LFB300
+	.4byte	.LFB303
+	.4byte	.LFE303-.LFB303
+	.4byte	.LFB306
+	.4byte	.LFE306-.LFB306
+	.4byte	.LFB307
+	.4byte	.LFE307-.LFB307
+	.4byte	.LFB308
+	.4byte	.LFE308-.LFB308
+	.4byte	.LFB309
+	.4byte	.LFE309-.LFB309
+	.4byte	.LFB310
+	.4byte	.LFE310-.LFB310
+	.4byte	.LFB317
+	.4byte	.LFE317-.LFB317
+	.4byte	.LFB318
+	.4byte	.LFE318-.LFB318
+	.4byte	.LFB319
+	.4byte	.LFE319-.LFB319
+	.4byte	.LFB340
+	.4byte	.LFE340-.LFB340
+	.4byte	.LFB341
+	.4byte	.LFE341-.LFB341
+	.4byte	.LFB343
+	.4byte	.LFE343-.LFB343
+	.4byte	.LFB233
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+	.4byte	.LFB239
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+	.4byte	.LFB344
+	.4byte	.LFE344-.LFB344
+	.4byte	.LFB345
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+	.4byte	.LFB243
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+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
+	.4byte	.LFB209
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+	.4byte	.LFB228
+	.4byte	.LFE228-.LFB228
+	.4byte	.LFB230
+	.4byte	.LFE230-.LFB230
+	.4byte	.LFB240
+	.4byte	.LFE240-.LFB240
+	.4byte	.LFB256
+	.4byte	.LFE256-.LFB256
+	.4byte	.LFB257
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+	.4byte	.LFB260
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+	.4byte	.LFB261
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+	.4byte	.LFB259
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+	.4byte	.LFB262
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+	.4byte	.LFB294
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+	.4byte	.LFB321
+	.4byte	.LFE321-.LFB321
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+	.4byte	.LFB273
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+	.4byte	.LFB278
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+	.4byte	.LFB279
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+	.4byte	.LFB280
+	.4byte	.LFE280-.LFB280
+	.4byte	.LFB281
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+	.4byte	.LFB210
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+	.4byte	.LFB288
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+	.4byte	.LFE293-.LFB293
+	.4byte	.LFB312
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+	.4byte	.LFB313
+	.4byte	.LFE313-.LFB313
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
+	.4byte	.LFB347
+	.4byte	.LFE347-.LFB347
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+	.4byte	.LFE349-.LFB349
+	.4byte	.LFB229
+	.4byte	.LFE229-.LFB229
+	.4byte	.LFB301
+	.4byte	.LFE301-.LFB301
+	.4byte	.LFB320
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+	.4byte	.LFB304
+	.4byte	.LFE304-.LFB304
+	.4byte	.LFB305
+	.4byte	.LFE305-.LFB305
+	.4byte	.LFB271
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+	.4byte	.LFB284
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+	.4byte	.LFB234
+	.4byte	.LFE234-.LFB234
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+	.4byte	.LFE289-.LFB289
+	.4byte	.LFB268
+	.4byte	.LFE268-.LFB268
+	.4byte	.LFB267
+	.4byte	.LFE267-.LFB267
+	.4byte	.LFB274
+	.4byte	.LFE274-.LFB274
+	.4byte	.LFB290
+	.4byte	.LFE290-.LFB290
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
+	.4byte	.LFB292
+	.4byte	.LFE292-.LFB292
+	.4byte	.LFB302
+	.4byte	.LFE302-.LFB302
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
+	.4byte	.LFB311
+	.4byte	.LFE311-.LFB311
+	.4byte	.LFB314
+	.4byte	.LFE314-.LFB314
+	.4byte	.LFB286
+	.4byte	.LFE286-.LFB286
+	.4byte	.LFB316
+	.4byte	.LFE316-.LFB316
+	.4byte	.LFB315
+	.4byte	.LFE315-.LFB315
+	.4byte	.LFB322
+	.4byte	.LFE322-.LFB322
+	.4byte	.LFB323
+	.4byte	.LFE323-.LFB323
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
+	.4byte	.LFB277
+	.4byte	.LFE277-.LFB277
+	.4byte	.LFB295
+	.4byte	.LFE295-.LFB295
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
+	.4byte	0
+	.4byte	0
+	.section	.debug_ranges,"",%progbits
+.Ldebug_ranges0:
+	.4byte	.LBB164
+	.4byte	.LBE164
+	.4byte	.LBB167
+	.4byte	.LBE167
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB168
+	.4byte	.LBE168
+	.4byte	.LBB171
+	.4byte	.LBE171
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB177
+	.4byte	.LBE177
+	.4byte	.LBB180
+	.4byte	.LBE180
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB183
+	.4byte	.LBE183
+	.4byte	.LBB186
+	.4byte	.LBE186
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB197
+	.4byte	.LBE197
+	.4byte	.LBB202
+	.4byte	.LBE202
+	.4byte	.LBB203
+	.4byte	.LBE203
+	.4byte	.LBB204
+	.4byte	.LBE204
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB219
+	.4byte	.LBE219
+	.4byte	.LBB220
+	.4byte	.LBE220
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB225
+	.4byte	.LBE225
+	.4byte	.LBB226
+	.4byte	.LBE226
+	.4byte	0
+	.4byte	0
+	.4byte	.LBB233
+	.4byte	.LBE233
+	.4byte	.LBB235
+	.4byte	.LBE235
+	.4byte	0
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+	.4byte	.LBB243
+	.4byte	.LBE243
+	.4byte	.LBB246
+	.4byte	.LBE246
+	.4byte	0
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+	.4byte	.LBE249
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+	.4byte	0
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+	.4byte	.LBE266
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+	.4byte	0
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+	.4byte	.LFE351
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+	.4byte	.LFB206
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+	.4byte	.LFE237
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+	.4byte	.LFB242
+	.4byte	.LFE242
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+	.4byte	.LFE251
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+	.4byte	.LFE254
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+	.4byte	.LFE255
+	.4byte	.LFB258
+	.4byte	.LFE258
+	.4byte	.LFB263
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+	.4byte	.LFE269
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+	.4byte	.LFE275
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+	.4byte	.LFE276
+	.4byte	.LFB282
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+	.4byte	.LFB298
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+	.4byte	.LFE306
+	.4byte	.LFB307
+	.4byte	.LFE307
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+	.4byte	.LFE308
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+	.4byte	.LFE309
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+	.4byte	.LFE310
+	.4byte	.LFB317
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+	.4byte	.LFB318
+	.4byte	.LFE318
+	.4byte	.LFB319
+	.4byte	.LFE319
+	.4byte	.LFB340
+	.4byte	.LFE340
+	.4byte	.LFB341
+	.4byte	.LFE341
+	.4byte	.LFB343
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+	.4byte	.LFB233
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+	.4byte	.LFB239
+	.4byte	.LFE239
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+	.4byte	.LFE345
+	.4byte	.LFB243
+	.4byte	.LFE243
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+	.4byte	.LFE212
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+	.4byte	.LFE348
+	.4byte	.LFB209
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+	.4byte	.LFB228
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+	.4byte	.LFE240
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+	.4byte	.LFE273
+	.4byte	.LFB278
+	.4byte	.LFE278
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+	.4byte	.LFE280
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+	.4byte	.LFE281
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+	.4byte	.LFE320
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+	.4byte	.LFE304
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+	.4byte	.LFE305
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+	.4byte	.LFE232
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+	.4byte	.LFB272
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+	.4byte	.LFE302
+	.4byte	.LFB218
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+	.4byte	.LFE219
+	.4byte	.LFB215
+	.4byte	.LFE215
+	.4byte	.LFB216
+	.4byte	.LFE216
+	.4byte	.LFB221
+	.4byte	.LFE221
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+	.4byte	.LFE311
+	.4byte	.LFB314
+	.4byte	.LFE314
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+	.4byte	.LFB316
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+	.4byte	.LFB315
+	.4byte	.LFE315
+	.4byte	.LFB322
+	.4byte	.LFE322
+	.4byte	.LFB323
+	.4byte	.LFE323
+	.4byte	.LFB217
+	.4byte	.LFE217
+	.4byte	.LFB222
+	.4byte	.LFE222
+	.4byte	.LFB220
+	.4byte	.LFE220
+	.4byte	.LFB223
+	.4byte	.LFE223
+	.4byte	.LFB277
+	.4byte	.LFE277
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+	.4byte	.LFE295
+	.4byte	.LFB213
+	.4byte	.LFE213
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+	.4byte	.LFE350
+	.4byte	0
+	.4byte	0
+	.section	.debug_line,"",%progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",%progbits,1
+.LASF727:
+	.ascii	"FtlEctTblFlush\000"
+.LASF590:
+	.ascii	"gc_page_num\000"
+.LASF606:
+	.ascii	"superBlk\000"
+.LASF499:
+	.ascii	"g_gc_bad_block_temp_num\000"
+.LASF363:
+	.ascii	"all_blk_used_slc_mode\000"
+.LASF43:
+	.ascii	"reserved\000"
+.LASF508:
+	.ascii	"g_totle_read_sector\000"
+.LASF574:
+	.ascii	"__func__\000"
+.LASF419:
+	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
+.LASF732:
+	.ascii	"nSec\000"
+.LASF728:
+	.ascii	"forceFlush\000"
+.LASF107:
+	.ascii	"bootm_headers\000"
+.LASF453:
+	.ascii	"p_gc_data_buf\000"
+.LASF125:
+	.ascii	"rd_end\000"
+.LASF492:
+	.ascii	"p_gc_blk_tbl\000"
+.LASF787:
+	.ascii	"FtlFreeSysBlkQueueOut\000"
+.LASF324:
+	.ascii	"ftl_bbt_blk_header\000"
+.LASF227:
+	.ascii	"eth_device\000"
+.LASF306:
+	.ascii	"sign\000"
+.LASF832:
+	.ascii	"sctidx\000"
+.LASF669:
+	.ascii	"Ftl_load_ext_data\000"
+.LASF96:
+	.ascii	"ih_comp\000"
+.LASF608:
+	.ascii	"block\000"
+.LASF22:
+	.ascii	"_Bool\000"
+.LASF651:
+	.ascii	"min_ec\000"
+.LASF601:
+	.ascii	"req_read_temp\000"
+.LASF279:
+	.ascii	"p_spare\000"
+.LASF685:
+	.ascii	"recovery_cur_page_ver\000"
+.LASF506:
+	.ascii	"g_totle_write_page_count\000"
+.LASF245:
+	.ascii	"net_root_path\000"
+.LASF624:
+	.ascii	"lookup_ppa\000"
+.LASF817:
+	.ascii	"FtlBbmTblFlush\000"
+.LASF610:
+	.ascii	"Ftl_get_new_temp_ppa\000"
+.LASF327:
+	.ascii	"ftl_data_blk_header\000"
+.LASF284:
+	.ascii	"blk_per_plane\000"
+.LASF360:
+	.ascii	"min_erase_count\000"
+.LASF114:
+	.ascii	"fit_noffset_os\000"
+.LASF391:
+	.ascii	"des_ppa\000"
+.LASF237:
+	.ascii	"priv\000"
+.LASF777:
+	.ascii	"insert_free_list\000"
+.LASF773:
+	.ascii	"pHead\000"
+.LASF21:
+	.ascii	"___strtok\000"
+.LASF198:
+	.ascii	"UCLASS_SPI_GENERIC\000"
+.LASF477:
+	.ascii	"g_l2p_last_update_region_id\000"
+.LASF698:
+	.ascii	"ftl_sb_update_avl_pages\000"
+.LASF572:
+	.ascii	"FlashProgPages\000"
+.LASF856:
+	.ascii	"test_page_num\000"
+.LASF684:
+	.ascii	"lookup_superblock_id\000"
+.LASF420:
+	.ascii	"c_ftl_nand_init_sys_blks_per_plane\000"
+.LASF865:
+	.ascii	"FtlConstantsInit\000"
+.LASF593:
+	.ascii	"num_io\000"
+.LASF868:
+	.ascii	"FtlPrintInfo\000"
+.LASF744:
+	.ascii	"l2p_flush\000"
+.LASF378:
+	.ascii	"rear\000"
+.LASF305:
+	.ascii	"ftl_l2p_map_info\000"
+.LASF521:
+	.ascii	"g_in_swl_replace\000"
+.LASF404:
+	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
+.LASF243:
+	.ascii	"net_nis_domain\000"
+.LASF764:
+	.ascii	"List_update_data_list\000"
+.LASF852:
+	.ascii	"create_first_buffer_superblock\000"
+.LASF503:
+	.ascii	"g_gc_merge_free_blk_threshold\000"
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+	.ascii	"last_mlc_page_version\000"
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+	.ascii	"offset\000"
+.LASF504:
+	.ascii	"g_gc_blk_index\000"
+.LASF439:
+	.ascii	"req_prgm\000"
+.LASF436:
+	.ascii	"gVendorBlkInfo\000"
+.LASF676:
+	.ascii	"FtlPowerLostRecovery\000"
+.LASF462:
+	.ascii	"p_valid_page_count_table\000"
+.LASF702:
+	.ascii	"FtlMapTblRecovery\000"
+.LASF156:
+	.ascii	"UCLASS_GPIO\000"
+.LASF869:
+	.ascii	"debug_flag\000"
+.LASF498:
+	.ascii	"g_gc_next_blk_1\000"
+.LASF76:
+	.ascii	"off_dt_strings\000"
+.LASF376:
+	.ascii	"sys_blk_queue\000"
+.LASF647:
+	.ascii	"free_data_superblock\000"
+.LASF859:
+	.ascii	"re_test_next_page\000"
+.LASF61:
+	.ascii	"bi_arch_number\000"
+.LASF749:
+	.ascii	"FtlMapWritePage\000"
+.LASF783:
+	.ascii	"tmp_data_count\000"
+.LASF26:
+	.ascii	"ide_bus_offset\000"
+.LASF739:
+	.ascii	"action\000"
+.LASF408:
+	.ascii	"c_ftl_nand_byte_pre_page\000"
+.LASF216:
+	.ascii	"UCLASS_COUNT\000"
+.LASF174:
+	.ascii	"UCLASS_NVME\000"
+.LASF643:
+	.ascii	"new_id\000"
+.LASF345:
+	.ascii	"cache_write_count\000"
+.LASF640:
+	.ascii	"new_ppa\000"
+.LASF258:
+	.ascii	"net_restart_wrap\000"
+.LASF371:
+	.ascii	"totle_read_sector\000"
+.LASF341:
+	.ascii	"bufferSuperblockId\000"
+.LASF273:
+	.ascii	"int32\000"
+.LASF369:
+	.ascii	"refresh_start_lpa\000"
+.LASF80:
+	.ascii	"boot_cpuid_phys\000"
+.LASF304:
+	.ascii	"maxLogicBlk\000"
+.LASF321:
+	.ascii	"totleEc\000"
+.LASF38:
+	.ascii	"lmb_property\000"
+.LASF458:
+	.ascii	"g_ect_tbl_info_size\000"
+.LASF338:
+	.ascii	"gcTempFlashMode\000"
+.LASF431:
+	.ascii	"g_MaxLbn\000"
+.LASF534:
+	.ascii	"g_nand_ops\000"
+.LASF584:
+	.ascii	"ftl_malloc\000"
+.LASF840:
+	.ascii	"first_lpa_nscts\000"
+.LASF183:
+	.ascii	"UCLASS_PMIC\000"
+.LASF318:
+	.ascii	"L2PMap\000"
+.LASF765:
+	.ascii	"prev_node_id\000"
+.LASF454:
+	.ascii	"gp_gc_page_buf_info\000"
+.LASF509:
+	.ascii	"g_totle_discard_page_count\000"
+.LASF656:
+	.ascii	"max_ec\000"
+.LASF537:
+	.ascii	"gFtlInitStatus\000"
+.LASF9:
+	.ascii	"long long int\000"
+.LASF459:
+	.ascii	"p_erase_count_table\000"
+.LASF824:
+	.ascii	"FtlBbmMapBadBlock\000"
+.LASF427:
+	.ascii	"g_GlobalDataVersion\000"
+.LASF717:
+	.ascii	"block_in_plane\000"
+.LASF128:
+	.ascii	"initrd_start\000"
+.LASF428:
+	.ascii	"g_MaxLbaSector\000"
+.LASF382:
+	.ascii	"current_plane\000"
+.LASF383:
+	.ascii	"num_planes\000"
+.LASF800:
+	.ascii	"spareBuf\000"
+.LASF730:
+	.ascii	"FtlVendorPartRead\000"
+.LASF723:
+	.ascii	"FtlWriteDump_data\000"
+.LASF197:
+	.ascii	"UCLASS_SPI_FLASH\000"
+.LASF202:
+	.ascii	"UCLASS_TIMER\000"
+.LASF798:
+	.ascii	"FtlGetLastWrittenPage\000"
+.LASF661:
+	.ascii	"pDataHeader\000"
+.LASF542:
+	.ascii	"power_up_flag\000"
+.LASF365:
+	.ascii	"inkDie_write_and_check_en\000"
+.LASF413:
+	.ascii	"c_ftl_nand_l2pmap_ram_region_num\000"
+.LASF843:
+	.ascii	"sftl_deinit\000"
+.LASF815:
+	.ascii	"totle_count\000"
+.LASF282:
+	.ascii	"die_num\000"
+.LASF750:
+	.ascii	"update_map_block\000"
+.LASF880:
+	.ascii	"GNU C11 6.3.1 20170404 -mthumb -mthumb-interwork -m"
+	.ascii	"abi=aapcs-linux -mword-relocations -mno-unaligned-a"
+	.ascii	"ccess -mfloat-abi=soft -march=armv7-a -mtune=cortex"
+	.ascii	"-a9 -mfpu=vfpv3-d16 -mtls-dialect=gnu -g -Os -fno-b"
+	.ascii	"uiltin -ffreestanding -fshort-wchar -fno-stack-prot"
+	.ascii	"ector -fno-delete-null-pointer-checks -fstack-usage"
+	.ascii	" -fno-pic -ffunction-sections -fdata-sections -fno-"
+	.ascii	"common -ffixed-r9\000"
+.LASF307:
+	.ascii	"maxRegion\000"
+.LASF680:
+	.ascii	"next_free_active_plane\000"
+.LASF491:
+	.ascii	"p_gc_page_info\000"
+.LASF256:
+	.ascii	"net_our_vlan\000"
+.LASF361:
+	.ascii	"totle_power_on_run_times\000"
+.LASF93:
+	.ascii	"ih_os\000"
+.LASF526:
+	.ascii	"g_cur_erase_blk\000"
+.LASF184:
+	.ascii	"UCLASS_PWM\000"
+.LASF634:
+	.ascii	"FtlGcBufFree\000"
+.LASF774:
+	.ascii	"List_pop_index_node\000"
+.LASF690:
+	.ascii	"scan_completed\000"
+.LASF637:
+	.ascii	"update_vpc_list\000"
+.LASF170:
+	.ascii	"UCLASS_MMC\000"
+.LASF465:
+	.ascii	"p_map_block_table\000"
+.LASF544:
+	.ascii	"FtlUpdateVaildLpnCount\000"
+.LASF332:
+	.ascii	"res32_0\000"
+.LASF333:
+	.ascii	"res32_1\000"
+.LASF726:
+	.ascii	"FtlUpdateVaildLpn\000"
+.LASF390:
+	.ascii	"scr_ppa\000"
+.LASF162:
+	.ascii	"UCLASS_IDE\000"
+.LASF224:
+	.ascii	"save_size\000"
+.LASF78:
+	.ascii	"version\000"
+.LASF652:
+	.ascii	"pNode\000"
+.LASF638:
+	.ascii	"get_new_active_ppa\000"
+.LASF878:
+	.ascii	"kmalloc\000"
+.LASF25:
+	.ascii	"_binary_u_boot_bin_end\000"
+.LASF595:
+	.ascii	"max_gc_page_num\000"
+.LASF8:
+	.ascii	"unsigned int\000"
+.LASF712:
+	.ascii	"FtlSlcSuperblockCheck\000"
+.LASF515:
+	.ascii	"g_totle_avg_erase_count\000"
+.LASF836:
+	.ascii	"flashType\000"
+.LASF789:
+	.ascii	"FtlFreeSysBLkSort\000"
+.LASF779:
+	.ascii	"tmp_erase_count\000"
+.LASF83:
+	.ascii	"working_fdt\000"
+.LASF862:
+	.ascii	"FtlVariablesInit\000"
+.LASF392:
+	.ascii	"ftl_gc_page_buffer\000"
+.LASF239:
+	.ascii	"push_packet\000"
+.LASF708:
+	.ascii	"pMapBlkHeader\000"
+.LASF82:
+	.ascii	"size_dt_struct\000"
+.LASF473:
+	.ascii	"p_vendor_region_ppn_table\000"
+.LASF675:
+	.ascii	"make_superblock\000"
+.LASF97:
+	.ascii	"ih_name\000"
+.LASF186:
+	.ascii	"UCLASS_PWRSEQ\000"
+.LASF337:
+	.ascii	"bufferFlashMode\000"
+.LASF6:
+	.ascii	"short int\000"
+.LASF837:
+	.ascii	"FtlRead\000"
+.LASF74:
+	.ascii	"totalsize\000"
+.LASF757:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+.LASF385:
+	.ascii	"check_en\000"
+.LASF442:
+	.ascii	"req_gc_dst\000"
+.LASF374:
+	.ascii	"prev\000"
+.LASF423:
+	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
+.LASF650:
+	.ascii	"min_ec_id\000"
+.LASF388:
+	.ascii	"phyBlk\000"
+.LASF260:
+	.ascii	"net_boot_file_size\000"
+.LASF412:
+	.ascii	"c_ftl_nand_map_region_num\000"
+.LASF665:
+	.ascii	"FtlVpcCheckAndModify\000"
+.LASF127:
+	.ascii	"ft_len\000"
+.LASF188:
+	.ascii	"UCLASS_REGULATOR\000"
+.LASF311:
+	.ascii	"pBlkVerTbl\000"
+.LASF489:
+	.ascii	"g_sys_save_data\000"
+.LASF124:
+	.ascii	"rd_start\000"
diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S
new file mode 100644
index 0000000000..ada1fa1a49
--- /dev/null
+++ b/drivers/rkflash/rk_sftl_arm_v8.S
@@ -0,0 +1,55428 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+	.arch armv8-a+nosimd
+	.file	"rk_sftl.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.l2p_addr_tran.isra.0,"ax",@progbits
+	.align	2
+	.type	l2p_addr_tran.isra.0, %function
+l2p_addr_tran.isra.0:
+.LFB348:
+	.file 1 "drivers/rkflash/rksftl/sftl_flash.c"
+	.loc 1 54 0
+	.cfi_startproc
+.LVL0:
+	.loc 1 62 0
+	adrp	x4, .LANCHOR0
+	add	x4, x4, :lo12:.LANCHOR0
+	ldrh	w3, [x4, 8]
+.LVL1:
+	.loc 1 63 0
+	ldrh	w6, [x4, 10]
+.LVL2:
+	.loc 1 64 0
+	ldrh	w4, [x4, 14]
+	cmp	w4, 4
+	bne	.L2
+	.loc 1 65 0
+	lsr	w3, w3, 1
+.LVL3:
+	.loc 1 66 0
+	ubfiz	w6, w6, 1, 15
+.LVL4:
+.L2:
+	.loc 1 70 0
+	lsr	w5, w0, 10
+.LVL5:
+	.loc 1 74 0
+	and	w0, w0, 1023
+.LVL6:
+	.loc 1 71 0
+	and	w4, w5, 65535
+	.loc 1 72 0
+	and	w5, w5, 65535
+.LVL7:
+	.loc 1 71 0
+	udiv	w4, w4, w3
+.LVL8:
+	.loc 1 72 0
+	msub	w3, w3, w4, w5
+.LVL9:
+	.loc 1 74 0
+	madd	w3, w3, w6, w0
+	.loc 1 78 0
+	mov	w0, 0
+	.loc 1 74 0
+	str	w3, [x1]
+	.loc 1 75 0
+	str	w4, [x2]
+	.loc 1 78 0
+	ret
+	.cfi_endproc
+.LFE348:
+	.size	l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0
+	.section	.text.ftl_set_blk_mode.part.7,"ax",@progbits
+	.align	2
+	.type	ftl_set_blk_mode.part.7, %function
+ftl_set_blk_mode.part.7:
+.LFB355:
+	.file 2 "drivers/rkflash/rksftl/sftl_sys.c"
+	.loc 2 1346 0
+	.cfi_startproc
+.LVL10:
+	.loc 2 1346 0
+	and	w0, w0, 65535
+	.loc 2 1349 0
+	adrp	x2, .LANCHOR1
+	ubfx	x1, x0, 5, 11
+	ldr	x3, [x2, #:lo12:.LANCHOR1]
+	lsl	x1, x1, 2
+	mov	w2, 1
+	lsl	w2, w2, w0
+	ldr	w0, [x3, x1]
+.LVL11:
+	orr	w0, w0, w2
+	str	w0, [x3, x1]
+	ret
+	.cfi_endproc
+.LFE355:
+	.size	ftl_set_blk_mode.part.7, .-ftl_set_blk_mode.part.7
+	.section	.text.Ftl_log2,"ax",@progbits
+	.align	2
+	.global	Ftl_log2
+	.type	Ftl_log2, %function
+Ftl_log2:
+.LFB202:
+	.file 3 "drivers/rkflash/rksftl/sftl_plat.c"
+	.loc 3 128 0
+	.cfi_startproc
+.LVL12:
+	.loc 3 130 0
+	mov	w2, 1
+	.loc 3 132 0
+	mov	w1, 0
+.LVL13:
+.L5:
+	.loc 3 132 0 is_stmt 0 discriminator 1
+	cmp	w2, w0
+	bls	.L6
+.LVL14:
+	.loc 3 134 0 is_stmt 1
+	sub	w0, w1, #1
+.LVL15:
+	.loc 3 136 0
+	ret
+.LVL16:
+.L6:
+	.loc 3 132 0 discriminator 3
+	add	w1, w1, 1
+.LVL17:
+	.loc 3 133 0 discriminator 3
+	lsl	w2, w2, 1
+.LVL18:
+	.loc 3 132 0 discriminator 3
+	and	w1, w1, 65535
+.LVL19:
+	b	.L5
+	.cfi_endproc
+.LFE202:
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",@progbits
+	.align	2
+	.global	FtlPrintInfo
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+.LFB203:
+	.loc 3 159 0
+	.cfi_startproc
+.LVL20:
+	ret
+	.cfi_endproc
+.LFE203:
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkNumInit
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+.LFB204:
+	.loc 3 165 0
+	.cfi_startproc
+.LVL21:
+	.loc 3 165 0
+	and	w0, w0, 65535
+	mov	w1, 24
+	cmp	w0, 24
+	.loc 3 169 0
+	adrp	x2, .LANCHOR4
+	csel	w0, w0, w1, cs
+.LVL22:
+	.loc 3 168 0
+	adrp	x1, .LANCHOR2
+	and	w0, w0, 65535
+.LVL23:
+	str	w0, [x1, #:lo12:.LANCHOR2]
+	.loc 3 169 0
+	adrp	x1, .LANCHOR3
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	mul	w1, w1, w0
+	str	w1, [x2, #:lo12:.LANCHOR4]
+	.loc 3 170 0
+	adrp	x2, .LANCHOR6
+	ldrh	w2, [x2, #:lo12:.LANCHOR6]
+	sub	w0, w2, w0
+.LVL24:
+	adrp	x2, .LANCHOR5
+	strh	w0, [x2, #:lo12:.LANCHOR5]
+	.loc 3 171 0
+	adrp	x0, .LANCHOR8
+	ldr	w0, [x0, #:lo12:.LANCHOR8]
+	sub	w1, w0, w1
+	adrp	x0, .LANCHOR7
+	str	w1, [x0, #:lo12:.LANCHOR7]
+	.loc 3 174 0
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE204:
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.section	.text.FtlConstantsInit,"ax",@progbits
+	.align	2
+	.global	FtlConstantsInit
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+.LFB205:
+	.loc 3 183 0
+	.cfi_startproc
+.LVL25:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	mov	x5, x0
+	.loc 3 190 0
+	adrp	x1, .LANCHOR11
+	.loc 3 183 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 188 0
+	ldrh	w2, [x0]
+	adrp	x0, .LANCHOR9
+.LVL26:
+	.loc 3 189 0
+	ldrh	w4, [x5, 2]
+	.loc 3 188 0
+	strh	w2, [x0, #:lo12:.LANCHOR9]
+	.loc 3 189 0
+	adrp	x0, .LANCHOR10
+	strh	w4, [x0, #:lo12:.LANCHOR10]
+	.loc 3 190 0
+	ldrh	w0, [x5, 4]
+	strh	w0, [x1, #:lo12:.LANCHOR11]
+	.loc 3 191 0
+	ldrh	w1, [x5, 14]
+	cmp	w1, 4
+	bne	.L10
+	.loc 3 192 0
+	ldrh	w1, [x5, 6]
+	adrp	x3, .LANCHOR6
+	lsr	w1, w1, 1
+	strh	w1, [x3, #:lo12:.LANCHOR6]
+	.loc 3 193 0
+	adrp	x1, .LANCHOR12
+	mov	w3, 8
+	strh	w3, [x1, #:lo12:.LANCHOR12]
+.L10:
+	.loc 3 197 0 discriminator 3
+	adrp	x3, .LANCHOR13
+	add	x3, x3, :lo12:.LANCHOR13
+	.loc 3 183 0 discriminator 3
+	mov	x1, 0
+.L11:
+.LVL27:
+	.loc 3 197 0 discriminator 3
+	strb	w1, [x1, x3]
+.LVL28:
+	add	x1, x1, 1
+.LVL29:
+	.loc 3 196 0 discriminator 3
+	cmp	x1, 32
+	bne	.L11
+	.loc 3 198 0
+	adrp	x1, .LANCHOR14
+	mov	w3, 5
+	.loc 3 200 0
+	cmp	w2, 1
+	.loc 3 198 0
+	strh	w3, [x1, #:lo12:.LANCHOR14]
+	.loc 3 199 0
+	adrp	x3, .LANCHOR15
+	strh	wzr, [x3, #:lo12:.LANCHOR15]
+	.loc 3 200 0
+	bne	.L12
+	.loc 3 201 0
+	strh	w2, [x1, #:lo12:.LANCHOR14]
+.L12:
+	.loc 3 202 0
+	adrp	x1, .LANCHOR16
+	mov	w2, 640
+	.loc 3 204 0
+	mul	w4, w4, w0
+	.loc 3 202 0
+	strh	w2, [x1, #:lo12:.LANCHOR16]
+	.loc 3 204 0
+	adrp	x1, .LANCHOR3
+	and	w4, w4, 65535
+	strh	w4, [x1, #:lo12:.LANCHOR3]
+	.loc 3 205 0
+	adrp	x1, .LANCHOR6
+	ldrh	w3, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR17
+	mul	w0, w0, w3
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR17]
+	.loc 3 206 0
+	bl	Ftl_log2
+.LVL30:
+	.loc 3 207 0
+	ldrh	w7, [x5, 12]
+	.loc 3 206 0
+	adrp	x1, .LANCHOR18
+	.loc 3 207 0
+	adrp	x8, .LANCHOR19
+	.loc 3 206 0
+	strh	w0, [x1, #:lo12:.LANCHOR18]
+	.loc 3 208 0
+	adrp	x0, .LANCHOR20
+	.loc 3 209 0
+	mul	w1, w4, w7
+	.loc 3 207 0
+	strh	w7, [x8, #:lo12:.LANCHOR19]
+	.loc 3 208 0
+	strh	w7, [x0, #:lo12:.LANCHOR20]
+	.loc 3 209 0
+	adrp	x0, .LANCHOR21
+	strh	w1, [x0, #:lo12:.LANCHOR21]
+	.loc 3 210 0
+	adrp	x0, .LANCHOR12
+	ldrh	w6, [x0, #:lo12:.LANCHOR12]
+	mov	w0, w6
+	bl	Ftl_log2
+.LVL31:
+	and	w1, w0, 65535
+	adrp	x2, .LANCHOR22
+	.loc 3 212 0
+	adrp	x10, .LANCHOR23
+	.loc 3 214 0
+	ldrh	w5, [x5, 20]
+.LVL32:
+	.loc 3 210 0
+	strh	w0, [x2, #:lo12:.LANCHOR22]
+	.loc 3 212 0
+	ubfiz	w0, w6, 9, 7
+	strh	w0, [x10, #:lo12:.LANCHOR23]
+	.loc 3 213 0
+	adrp	x10, .LANCHOR24
+	ubfx	w0, w0, 8, 8
+	strh	w0, [x10, #:lo12:.LANCHOR24]
+	.loc 3 214 0
+	adrp	x0, .LANCHOR25
+	strh	w5, [x0, #:lo12:.LANCHOR25]
+	.loc 3 216 0
+	mul	w0, w4, w3
+	adrp	x5, .LANCHOR8
+	str	w0, [x5, #:lo12:.LANCHOR8]
+	.loc 3 217 0
+	adrp	x5, .LANCHOR26
+	mul	w0, w0, w6
+	.loc 3 218 0
+	mul	w6, w6, w7
+	.loc 3 217 0
+	mul	w0, w0, w7
+	mov	x7, x2
+	asr	w0, w0, 11
+	str	w0, [x5, #:lo12:.LANCHOR26]
+	.loc 3 218 0
+	mov	w0, 5120
+	adrp	x5, .LANCHOR27
+	sdiv	w0, w0, w6
+	and	w0, w0, 65535
+	.loc 3 219 0
+	cmp	w0, 4
+	bls	.L13
+.L19:
+	.loc 3 220 0
+	strh	w0, [x5, #:lo12:.LANCHOR27]
+	.loc 3 221 0
+	adrp	x2, .LANCHOR28
+	mov	w0, 640
+	.loc 3 223 0
+	lsl	w3, w3, 6
+	.loc 3 221 0
+	asr	w0, w0, w1
+	add	w0, w0, 2
+	.loc 3 223 0
+	add	w1, w1, 9
+	.loc 3 221 0
+	strh	w0, [x2, #:lo12:.LANCHOR28]
+	.loc 3 223 0
+	adrp	x0, .LANCHOR29
+	.loc 3 227 0
+	cmp	w4, 1
+	.loc 3 223 0
+	asr	w3, w3, w1
+	.loc 3 224 0
+	adrp	x1, .LANCHOR30
+	.loc 3 223 0
+	strh	w3, [x0, #:lo12:.LANCHOR29]
+	and	w3, w3, 65535
+	adrp	x6, .LANCHOR2
+	.loc 3 224 0
+	mul	w0, w3, w4
+	.loc 3 226 0
+	add	w3, w3, 8
+	.loc 3 224 0
+	str	w0, [x1, #:lo12:.LANCHOR30]
+	.loc 3 226 0
+	ldrh	w0, [x5, #:lo12:.LANCHOR27]
+	udiv	w0, w0, w4
+	mov	x4, x1
+	add	w3, w0, w3
+	.loc 3 227 0
+	beq	.L15
+.L20:
+	.loc 3 228 0
+	str	w3, [x6, #:lo12:.LANCHOR2]
+	.loc 3 231 0
+	ldrh	w0, [x6, #:lo12:.LANCHOR2]
+	bl	FtlSysBlkNumInit
+.LVL33:
+	.loc 3 232 0
+	ldr	w1, [x6, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR31
+	.loc 3 263 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	.loc 3 232 0
+	str	w1, [x0, #:lo12:.LANCHOR31]
+	.loc 3 234 0
+	adrp	x0, .LANCHOR7
+	ldrh	w1, [x8, #:lo12:.LANCHOR19]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	lsl	w0, w0, 2
+	mul	w0, w0, w1
+	ldrh	w1, [x7, #:lo12:.LANCHOR22]
+	add	w1, w1, 9
+	lsr	w0, w0, w1
+	adrp	x1, .LANCHOR32
+	add	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR32]
+	.loc 3 235 0
+	adrp	x0, .LANCHOR33
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR33]
+	.loc 3 236 0
+	adrp	x0, .LANCHOR34
+	str	wzr, [x0, #:lo12:.LANCHOR34]
+	.loc 3 237 0
+	ldrh	w0, [x5, #:lo12:.LANCHOR27]
+	add	w0, w0, 3
+	strh	w0, [x5, #:lo12:.LANCHOR27]
+	.loc 3 238 0
+	ldr	w0, [x4, #:lo12:.LANCHOR30]
+	add	w0, w0, 3
+	str	w0, [x4, #:lo12:.LANCHOR30]
+	.loc 3 263 0
+	mov	w0, 0
+	ret
+.L13:
+	.cfi_restore_state
+	.loc 3 220 0
+	mov	w0, 4
+	b	.L19
+.L15:
+	.loc 3 228 0
+	add	w3, w3, 4
+	b	.L20
+	.cfi_endproc
+.LFE205:
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",@progbits
+	.align	2
+	.global	IsBlkInVendorPart
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+.LFB208:
+	.loc 3 514 0
+	.cfi_startproc
+.LVL34:
+	.loc 3 517 0
+	adrp	x1, .LANCHOR35
+	.loc 3 514 0
+	and	w0, w0, 65535
+	.loc 3 517 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	cbz	w1, .L25
+.LBB164:
+.LBB165:
+	.loc 3 518 0
+	adrp	x1, .LANCHOR27
+	ldrh	w2, [x1, #:lo12:.LANCHOR27]
+	.loc 3 519 0
+	adrp	x1, .LANCHOR36
+	ldr	x3, [x1, #:lo12:.LANCHOR36]
+	mov	x1, 0
+.L23:
+.LVL35:
+	.loc 3 518 0
+	cmp	w2, w1, uxth
+	bhi	.L24
+.LVL36:
+.L25:
+.LBE165:
+.LBE164:
+	.loc 3 524 0
+	mov	w0, 0
+.LVL37:
+	ret
+.LVL38:
+.L24:
+	add	x1, x1, 1
+.LVL39:
+.LBB167:
+.LBB166:
+	.loc 3 519 0
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L23
+	.loc 3 520 0
+	mov	w0, 1
+.LBE166:
+.LBE167:
+	.loc 3 525 0
+	ret
+	.cfi_endproc
+.LFE208:
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.sftl_get_density,"ax",@progbits
+	.align	2
+	.global	sftl_get_density
+	.type	sftl_get_density, %function
+sftl_get_density:
+.LFB221:
+	.loc 3 1215 0
+	.cfi_startproc
+	.loc 3 1217 0
+	adrp	x0, .LANCHOR34
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	ret
+	.cfi_endproc
+.LFE221:
+	.size	sftl_get_density, .-sftl_get_density
+	.section	.text.FtlBbmMapBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmMapBadBlock
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+.LFB222:
+	.file 4 "drivers/rkflash/rksftl/sftl_bbm.c"
+	.loc 4 5 0
+	.cfi_startproc
+.LVL40:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	and	w1, w0, 65535
+	.loc 4 10 0
+	adrp	x0, .LANCHOR17
+.LVL41:
+	.loc 4 15 0
+	mov	w4, 1
+	.loc 4 5 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 4 10 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR17]
+	.loc 4 5 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 4 13 0
+	adrp	x19, .LANCHOR37
+	add	x19, x19, :lo12:.LANCHOR37
+	.loc 4 10 0
+	udiv	w3, w1, w0
+	and	w2, w3, 65535
+.LVL42:
+	msub	w3, w3, w0, w1
+	.loc 4 13 0
+	add	x0, x19, x2, uxth 3
+	and	w3, w3, 65535
+.LVL43:
+	.loc 4 15 0
+	ldr	x0, [x0, 32]
+	ubfx	x5, x3, 5, 11
+	lsl	x5, x5, 2
+	lsl	w4, w4, w3
+	ldr	w6, [x0, x5]
+	orr	w4, w4, w6
+	str	w4, [x0, x5]
+	.loc 4 16 0
+	adrp	x0, .LC0
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.LVL44:
+	.loc 4 17 0
+	ldrh	w0, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 6]
+	.loc 4 19 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE222:
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.section	.text.FtlBbmIsBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmIsBadBlock
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+.LFB223:
+	.loc 4 24 0
+	.cfi_startproc
+.LVL45:
+	.loc 4 30 0
+	adrp	x1, .LANCHOR17
+	.loc 4 24 0
+	and	w0, w0, 65535
+	.loc 4 30 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR17]
+.LVL46:
+	.loc 4 31 0
+	udiv	w2, w0, w1
+	msub	w0, w2, w1, w0
+.LVL47:
+	.loc 4 33 0
+	adrp	x1, .LANCHOR37
+.LVL48:
+	add	x1, x1, :lo12:.LANCHOR37
+	add	x2, x1, x2, uxth 3
+	.loc 4 31 0
+	and	w0, w0, 65535
+.LVL49:
+	.loc 4 34 0
+	ubfx	x3, x0, 5, 11
+	ldr	x1, [x2, 32]
+	ldr	w1, [x1, x3, lsl 2]
+	lsr	w0, w1, w0
+.LVL50:
+	.loc 4 36 0
+	and	w0, w0, 1
+	ret
+	.cfi_endproc
+.LFE223:
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",@progbits
+	.align	2
+	.global	FtlBbtInfoPrint
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+.LFB224:
+	.loc 4 39 0
+	.cfi_startproc
+	ret
+	.cfi_endproc
+.LFE224:
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbtCalcTotleCnt,"ax",@progbits
+	.align	2
+	.global	FtlBbtCalcTotleCnt
+	.type	FtlBbtCalcTotleCnt, %function
+FtlBbtCalcTotleCnt:
+.LFB228:
+	.loc 4 157 0
+	.cfi_startproc
+.LVL51:
+	.loc 4 160 0
+	adrp	x0, .LANCHOR17
+	mov	w4, 0
+	.loc 4 159 0
+	mov	w5, 0
+.LVL52:
+	.loc 4 160 0
+	ldrh	w6, [x0, #:lo12:.LANCHOR17]
+	adrp	x0, .LANCHOR10
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	mul	w6, w6, w0
+	cmp	w4, w6
+	blt	.L42
+	.loc 4 169 0
+	mov	w0, w5
+	ret
+.L42:
+	.loc 4 157 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+.L35:
+	.loc 4 162 0
+	mov	w0, w4
+	bl	FtlBbmIsBadBlock
+.LVL53:
+	cbz	w0, .L34
+	.loc 4 164 0
+	add	w5, w5, 1
+.LVL54:
+	and	w5, w5, 65535
+.LVL55:
+.L34:
+	.loc 4 160 0 discriminator 2
+	add	w4, w4, 1
+.LVL56:
+	and	w4, w4, 65535
+.LVL57:
+	cmp	w4, w6
+	blt	.L35
+	.loc 4 169 0
+	mov	w0, w5
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE228:
+	.size	FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
+	.section	.text.V2P_block,"ax",@progbits
+	.align	2
+	.global	V2P_block
+	.type	V2P_block, %function
+V2P_block:
+.LFB232:
+	.loc 2 5 0
+	.cfi_startproc
+.LVL58:
+	.loc 2 8 0
+	adrp	x2, .LANCHOR11
+	.loc 2 5 0
+	and	w0, w0, 65535
+	.loc 2 8 0
+	adrp	x4, .LANCHOR17
+	.loc 2 5 0
+	and	w1, w1, 65535
+	.loc 2 8 0
+	ldrh	w2, [x2, #:lo12:.LANCHOR11]
+.LVL59:
+	ldrh	w4, [x4, #:lo12:.LANCHOR17]
+	udiv	w3, w0, w2
+	msub	w0, w3, w2, w0
+.LVL60:
+	madd	w2, w2, w1, w0
+.LVL61:
+	madd	w0, w3, w4, w2
+	.loc 2 10 0
+	ret
+	.cfi_endproc
+.LFE232:
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",@progbits
+	.align	2
+	.global	P2V_plane
+	.type	P2V_plane, %function
+P2V_plane:
+.LFB233:
+	.loc 2 13 0
+	.cfi_startproc
+.LVL62:
+	.loc 2 13 0
+	and	w3, w0, 65535
+	.loc 2 16 0
+	adrp	x0, .LANCHOR11
+.LVL63:
+	ldrh	w1, [x0, #:lo12:.LANCHOR11]
+.LVL64:
+	adrp	x0, .LANCHOR17
+	ldrh	w2, [x0, #:lo12:.LANCHOR17]
+	udiv	w0, w3, w1
+	udiv	w2, w3, w2
+	msub	w0, w0, w1, w3
+	madd	w0, w1, w2, w0
+	.loc 2 18 0
+	ret
+	.cfi_endproc
+.LFE233:
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",@progbits
+	.align	2
+	.global	P2V_block_in_plane
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+.LFB234:
+	.loc 2 21 0
+	.cfi_startproc
+.LVL65:
+	.loc 2 21 0
+	and	w2, w0, 65535
+	.loc 2 24 0
+	adrp	x0, .LANCHOR17
+.LVL66:
+	ldrh	w1, [x0, #:lo12:.LANCHOR17]
+	udiv	w0, w2, w1
+	msub	w0, w0, w1, w2
+	.loc 2 25 0
+	adrp	x1, .LANCHOR11
+	ldrh	w1, [x1, #:lo12:.LANCHOR11]
+	.loc 2 24 0
+	and	w0, w0, 65535
+.LVL67:
+	.loc 2 27 0
+	udiv	w0, w0, w1
+.LVL68:
+	ret
+	.cfi_endproc
+.LFE234:
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",@progbits
+	.align	2
+	.global	ftl_cmp_data_ver
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+.LFB235:
+	.loc 2 31 0
+	.cfi_startproc
+.LVL69:
+	.loc 2 34 0
+	cmp	w0, w1
+	mov	w2, -2147483648
+	bls	.L47
+	.loc 2 36 0
+	sub	w1, w0, w1
+.LVL70:
+	cmp	w1, w2
+	cset	w0, ls
+.LVL71:
+	ret
+.LVL72:
+.L47:
+	.loc 2 40 0
+	sub	w1, w1, w0
+.LVL73:
+	cmp	w1, w2
+	cset	w0, hi
+.LVL74:
+	.loc 2 44 0
+	ret
+	.cfi_endproc
+.LFE235:
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueEmpty
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+.LFB238:
+	.loc 2 88 0
+	.cfi_startproc
+	.loc 2 89 0
+	adrp	x0, .LANCHOR38+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
+	cmp	w0, 0
+	.loc 2 90 0
+	cset	w0, eq
+	ret
+	.cfi_endproc
+.LFE238:
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueFull
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+.LFB239:
+	.loc 2 93 0
+	.cfi_startproc
+	.loc 2 94 0
+	adrp	x0, .LANCHOR38+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR38+6]
+	cmp	w0, 1024
+	.loc 2 95 0
+	cset	w0, eq
+	ret
+	.cfi_endproc
+.LFE239:
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBLkSort,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBLkSort
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+.LFB241:
+	.loc 2 116 0
+	.cfi_startproc
+.LVL75:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 123 0
+	adrp	x2, .LANCHOR38
+	.loc 2 125 0
+	adrp	x1, .LANCHOR39
+	.loc 2 123 0
+	add	x0, x2, :lo12:.LANCHOR38
+	.loc 2 116 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 125 0
+	ldr	x3, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR40
+	.loc 2 124 0
+	ldrh	w8, [x0, 2]
+	mov	x4, x2
+	.loc 2 123 0
+	ldrh	w7, [x0, 6]
+	.loc 2 124 0
+	mov	x6, x0
+	.loc 2 125 0
+	ldr	x10, [x1, #:lo12:.LANCHOR40]
+	.loc 2 124 0
+	and	x11, x8, 65535
+	.loc 2 123 0
+	mov	x5, 0
+.LVL76:
+.L52:
+	.loc 2 123 0 is_stmt 0 discriminator 1
+	cmp	w7, w5, uxth
+	bhi	.L53
+	.loc 2 128 0 is_stmt 1
+	sub	w10, w7, #1
+	.loc 2 139 0
+	add	x2, x4, :lo12:.LANCHOR38
+	mov	w0, 0
+.LVL77:
+.L54:
+	.loc 2 128 0 discriminator 1
+	cmp	w0, w10
+	blt	.L59
+	.loc 2 144 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL78:
+.L53:
+	.cfi_restore_state
+	.loc 2 124 0 discriminator 3
+	add	x0, x11, x5
+	add	x0, x6, x0, lsl 1
+	ldrh	w0, [x0, 8]
+	bl	P2V_block_in_plane
+.LVL79:
+	.loc 2 125 0 discriminator 3
+	ubfiz	x0, x0, 1, 16
+.LVL80:
+	ldrh	w0, [x10, x0]
+	str	w0, [x3, x5, lsl 2]
+.LVL81:
+	add	x5, x5, 1
+.LVL82:
+	b	.L52
+.LVL83:
+.L59:
+	.loc 2 130 0
+	add	w5, w0, 1
+	mov	w1, w0
+	and	w5, w5, 65535
+.LVL84:
+	mov	w4, w5
+.LVL85:
+.L55:
+	.loc 2 130 0 is_stmt 0 discriminator 1
+	cmp	w4, w7
+	bcc	.L57
+	.loc 2 134 0 is_stmt 1
+	cmp	w0, w1
+	beq	.L58
+	.loc 2 136 0
+	ubfiz	x4, x0, 2, 16
+.LVL86:
+	.loc 2 135 0
+	ubfiz	x6, x1, 2, 32
+	.loc 2 140 0
+	add	w0, w8, w0
+.LVL87:
+	.loc 2 139 0
+	add	w1, w1, w8
+.LVL88:
+	.loc 2 140 0
+	add	x0, x2, x0, sxtw 1
+	.loc 2 139 0
+	add	x1, x2, x1, sxtw 1
+	.loc 2 136 0
+	ldr	w12, [x3, x4]
+	.loc 2 135 0
+	ldr	w11, [x3, x6]
+.LVL89:
+	.loc 2 136 0
+	str	w12, [x3, x6]
+	.loc 2 137 0
+	str	w11, [x3, x4]
+	.loc 2 140 0
+	ldrh	w6, [x0, 8]
+	.loc 2 139 0
+	ldrh	w4, [x1, 8]
+.LVL90:
+	.loc 2 140 0
+	strh	w6, [x1, 8]
+	.loc 2 141 0
+	strh	w4, [x0, 8]
+.LVL91:
+.L58:
+	mov	w0, w5
+	b	.L54
+.LVL92:
+.L57:
+	.loc 2 131 0
+	ubfiz	x6, x4, 2, 16
+	ldr	w11, [x3, w1, uxtw 2]
+	ldr	w6, [x3, x6]
+	cmp	w11, w6
+	csel	w1, w1, w4, ls
+.LVL93:
+	.loc 2 130 0
+	add	w4, w4, 1
+.LVL94:
+	and	w4, w4, 65535
+.LVL95:
+	b	.L55
+	.cfi_endproc
+.LFE241:
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.IsInFreeQueue,"ax",@progbits
+	.align	2
+	.global	IsInFreeQueue
+	.type	IsInFreeQueue, %function
+IsInFreeQueue:
+.LFB242:
+	.loc 2 147 0
+	.cfi_startproc
+.LVL96:
+.LBB168:
+.LBB169:
+	.loc 2 94 0
+	adrp	x1, .LANCHOR38
+	add	x1, x1, :lo12:.LANCHOR38
+.LBE169:
+.LBE168:
+	.loc 2 147 0
+	and	w0, w0, 65535
+.LBB171:
+.LBB170:
+	.loc 2 94 0
+	ldrh	w4, [x1, 6]
+.LBE170:
+.LBE171:
+	.loc 2 152 0
+	cmp	w4, 1024
+	beq	.L65
+	.loc 2 155 0
+	ldrh	w5, [x1, 2]
+	mov	w3, 0
+.L63:
+.LVL97:
+	.loc 2 154 0 discriminator 1
+	cmp	w3, w4
+	bcc	.L64
+.LVL98:
+.L65:
+	.loc 2 148 0
+	mov	w0, 0
+.LVL99:
+	ret
+.LVL100:
+.L64:
+	.loc 2 155 0
+	add	w2, w3, w5
+	ubfiz	x2, x2, 1, 10
+	add	x2, x1, x2
+	ldrh	w2, [x2, 8]
+	cmp	w2, w0
+	beq	.L66
+	.loc 2 154 0 discriminator 2
+	add	w3, w3, 1
+.LVL101:
+	b	.L63
+.L66:
+	.loc 2 156 0
+	mov	w0, 1
+.LVL102:
+	.loc 2 162 0
+	ret
+	.cfi_endproc
+.LFE242:
+	.size	IsInFreeQueue, .-IsInFreeQueue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+.LFB243:
+	.loc 2 165 0
+	.cfi_startproc
+.LVL103:
+.LBB172:
+.LBB173:
+	.loc 2 89 0
+	adrp	x1, .LANCHOR38
+	add	x1, x1, :lo12:.LANCHOR38
+	ldrh	w3, [x1, 6]
+.LBE173:
+.LBE172:
+	.loc 2 168 0
+	cbz	w3, .L69
+.LVL104:
+.LBB174:
+	.loc 2 170 0
+	ldrh	w2, [x1, 2]
+	.loc 2 171 0
+	sub	w3, w3, #1
+	strh	w3, [x1, 6]
+	.loc 2 170 0
+	add	x0, x1, x2, sxtw 1
+	.loc 2 172 0
+	add	w2, w2, 1
+	and	w2, w2, 1023
+	strh	w2, [x1, 2]
+	.loc 2 170 0
+	ldrh	w0, [x0, 8]
+.LVL105:
+	ret
+.LVL106:
+.L69:
+.LBE174:
+	.loc 2 166 0
+	mov	w0, 65535
+.LVL107:
+	.loc 2 176 0
+	ret
+	.cfi_endproc
+.LFE243:
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",@progbits
+	.align	2
+	.global	insert_data_list
+	.type	insert_data_list, %function
+insert_data_list:
+.LFB246:
+	.loc 2 217 0
+	.cfi_startproc
+.LVL108:
+	and	w0, w0, 65535
+	.loc 2 225 0
+	mov	w11, 65535
+	cmp	w0, w11
+	beq	.L84
+	.loc 2 230 0
+	adrp	x1, .LANCHOR41
+	mov	w6, 6
+	ldr	x4, [x1, #:lo12:.LANCHOR41]
+	umull	x13, w0, w6
+	.loc 2 231 0
+	mov	w1, -1
+	.loc 2 230 0
+	add	x3, x4, x13
+.LVL109:
+	.loc 2 231 0
+	strh	w1, [x3, 2]
+	strh	w1, [x4, x13]
+	.loc 2 233 0
+	adrp	x1, .LANCHOR42
+	mov	x15, x1
+	ldr	x12, [x1, #:lo12:.LANCHOR42]
+	cbnz	x12, .L72
+	.loc 2 234 0
+	str	x3, [x1, #:lo12:.LANCHOR42]
+.LVL110:
+.L84:
+	.loc 2 281 0
+	mov	w0, 0
+.LVL111:
+	ret
+.LVL112:
+.L72:
+	.loc 2 217 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 238 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x2, x0, 1, 16
+	.loc 2 244 0
+	mov	x8, -6148914691236517206
+	.loc 2 217 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 238 0
+	ldr	x14, [x1, #:lo12:.LANCHOR43]
+	.loc 2 244 0
+	movk	x8, 0xaaab, lsl 0
+	.loc 2 239 0
+	ldrh	w1, [x3, 4]
+	mov	w7, -1
+	.loc 2 247 0
+	mov	w10, w7
+	.loc 2 239 0
+	cmp	w1, 0
+	.loc 2 238 0
+	ldrh	w5, [x14, x2]
+.LVL113:
+	.loc 2 239 0
+	mul	w5, w5, w1
+.LVL114:
+	.loc 2 244 0
+	sub	x1, x12, x4
+.LVL115:
+	asr	x1, x1, 1
+	.loc 2 239 0
+	csel	w5, w5, w7, ne
+.LVL116:
+	.loc 2 267 0
+	mov	w7, w6
+	.loc 2 244 0
+	mul	x1, x1, x8
+	.loc 2 252 0
+	adrp	x8, .LANCHOR40
+	ldr	x16, [x8, #:lo12:.LANCHOR40]
+	.loc 2 244 0
+	and	w1, w1, 65535
+.LVL117:
+	.loc 2 252 0
+	add	x8, x16, x2
+	mov	x2, x12
+.LVL118:
+.L79:
+	.loc 2 246 0
+	ubfiz	x17, x1, 1, 16
+	.loc 2 247 0
+	ldrh	w30, [x2, 4]
+	cmp	w30, 0
+	.loc 2 246 0
+	ldrh	w6, [x14, x17]
+.LVL119:
+	.loc 2 247 0
+	mul	w6, w6, w30
+.LVL120:
+	csel	w6, w6, w10, ne
+.LVL121:
+	.loc 2 251 0
+	cmp	w5, w6
+	bne	.L75
+	.loc 2 252 0
+	ldrh	w17, [x16, x17]
+.LVL122:
+	ldrh	w6, [x8]
+.LVL123:
+	cmp	w17, w6
+	bcc	.L77
+.L76:
+	.loc 2 270 0
+	strh	w1, [x4, x13]
+.LVL124:
+	.loc 2 273 0
+	cmp	x2, x12
+	.loc 2 271 0
+	ldrh	w1, [x2, 2]
+.LVL125:
+	strh	w1, [x3, 2]
+	.loc 2 273 0
+	bne	.L80
+	.loc 2 274 0
+	strh	w0, [x2, 2]
+	.loc 2 275 0
+	str	x3, [x15, #:lo12:.LANCHOR42]
+	b	.L71
+.LVL126:
+.L75:
+	.loc 2 256 0
+	bcc	.L76
+.LVL127:
+.L77:
+	.loc 2 259 0
+	ldrh	w6, [x2]
+	cmp	w6, w11
+	bne	.L78
+	.loc 2 260 0
+	strh	w1, [x3, 2]
+.LVL128:
+	.loc 2 261 0
+	strh	w0, [x2]
+	.loc 2 262 0
+	adrp	x0, .LANCHOR44
+	str	x3, [x0, #:lo12:.LANCHOR44]
+.LVL129:
+.L71:
+	.loc 2 281 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL130:
+.L78:
+	.cfi_restore_state
+	.loc 2 267 0
+	umaddl	x2, w6, w7, x4
+.LVL131:
+	.loc 2 246 0
+	mov	w1, w6
+.LVL132:
+	b	.L79
+.LVL133:
+.L80:
+	.loc 2 277 0
+	ldrh	w1, [x2, 2]
+	mov	w3, 6
+.LVL134:
+	umull	x1, w1, w3
+	strh	w0, [x4, x1]
+.LVL135:
+	.loc 2 278 0
+	strh	w0, [x2, 2]
+	b	.L71
+	.cfi_endproc
+.LFE246:
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_DATA_LIST
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+.LFB245:
+	.loc 2 186 0
+	.cfi_startproc
+.LVL136:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 187 0
+	bl	insert_data_list
+.LVL137:
+	.loc 2 188 0
+	adrp	x1, .LANCHOR45
+	ldrh	w0, [x1, #:lo12:.LANCHOR45]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR45]
+	.loc 2 189 0
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w1, w0
+	bcs	.L86
+.LVL138:
+	.loc 2 190 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+.LBB177:
+.LBB178:
+	.loc 2 189 0
+	mov	w2, 189
+	adrp	x1, .LANCHOR46
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LC1
+	b	printf
+.LVL139:
+.L86:
+	.cfi_restore_state
+.LBE178:
+.LBE177:
+	.loc 2 190 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE245:
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",@progbits
+	.align	2
+	.global	insert_free_list
+	.type	insert_free_list, %function
+insert_free_list:
+.LFB247:
+	.loc 2 284 0
+	.cfi_startproc
+.LVL140:
+	.loc 2 284 0
+	and	w0, w0, 65535
+	.loc 2 290 0
+	mov	w7, 65535
+	cmp	w0, w7
+	beq	.L90
+	.loc 2 293 0
+	adrp	x1, .LANCHOR41
+	mov	w6, 6
+	ldr	x3, [x1, #:lo12:.LANCHOR41]
+	umull	x8, w0, w6
+	.loc 2 294 0
+	mov	w1, -1
+	.loc 2 293 0
+	add	x4, x3, x8
+.LVL141:
+	.loc 2 294 0
+	strh	w1, [x4, 2]
+	strh	w1, [x3, x8]
+	.loc 2 296 0
+	adrp	x1, .LANCHOR47
+	mov	x12, x1
+	ldr	x5, [x1, #:lo12:.LANCHOR47]
+	cbnz	x5, .L91
+	.loc 2 297 0
+	str	x4, [x1, #:lo12:.LANCHOR47]
+.LVL142:
+.L90:
+	.loc 2 330 0
+	mov	w0, 0
+.LVL143:
+	ret
+.LVL144:
+.L91:
+	.loc 2 301 0
+	adrp	x1, .LANCHOR40
+	.loc 2 303 0
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	.loc 2 301 0
+	ldr	x11, [x1, #:lo12:.LANCHOR40]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w13, [x11, x1]
+.LVL145:
+	.loc 2 303 0
+	sub	x1, x5, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	mov	x2, x5
+	and	w1, w1, 65535
+.LVL146:
+.L94:
+	.loc 2 306 0
+	ubfiz	x10, x1, 1, 16
+	.loc 2 307 0
+	ldrh	w10, [x11, x10]
+	cmp	w10, w13
+	bcs	.L92
+	.loc 2 310 0
+	ldrh	w10, [x2]
+	cmp	w10, w7
+	bne	.L93
+	.loc 2 311 0
+	strh	w1, [x4, 2]
+.LVL147:
+	.loc 2 312 0
+	strh	w0, [x2]
+	.loc 2 313 0
+	b	.L90
+.LVL148:
+.L93:
+	.loc 2 316 0
+	umaddl	x2, w10, w6, x3
+.LVL149:
+	.loc 2 306 0
+	mov	w1, w10
+.LVL150:
+	b	.L94
+.LVL151:
+.L92:
+	.loc 2 319 0
+	ldrh	w6, [x2, 2]
+	.loc 2 322 0
+	cmp	x2, x5
+	.loc 2 319 0
+	strh	w6, [x4, 2]
+.LVL152:
+	.loc 2 320 0
+	strh	w1, [x3, x8]
+	.loc 2 322 0
+	bne	.L95
+	.loc 2 323 0
+	strh	w0, [x2, 2]
+	.loc 2 324 0
+	str	x4, [x12, #:lo12:.LANCHOR47]
+	b	.L90
+.L95:
+	.loc 2 326 0
+	ldrh	w1, [x2, 2]
+.LVL153:
+	mov	w4, 6
+.LVL154:
+	umull	x1, w1, w4
+	strh	w0, [x3, x1]
+.LVL155:
+	.loc 2 327 0
+	strh	w0, [x2, 2]
+	b	.L90
+	.cfi_endproc
+.LFE247:
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_FREE_LIST
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+.LFB244:
+	.loc 2 179 0
+	.cfi_startproc
+.LVL156:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 180 0
+	bl	insert_free_list
+.LVL157:
+	.loc 2 181 0
+	adrp	x1, .LANCHOR48
+	ldrh	w0, [x1, #:lo12:.LANCHOR48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR48]
+	.loc 2 182 0
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w1, w0
+	bcs	.L96
+.LVL158:
+	.loc 2 183 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+.LBB181:
+.LBB182:
+	.loc 2 182 0
+	mov	w2, 182
+	adrp	x1, .LANCHOR49
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR49
+	add	x0, x0, :lo12:.LC1
+	b	printf
+.LVL159:
+.L96:
+	.cfi_restore_state
+.LBE182:
+.LBE181:
+	.loc 2 183 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE244:
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",@progbits
+	.align	2
+	.global	List_remove_node
+	.type	List_remove_node, %function
+List_remove_node:
+.LFB248:
+	.loc 2 333 0
+	.cfi_startproc
+.LVL160:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	and	w1, w1, 65535
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 2 336 0
+	adrp	x20, .LANCHOR41
+	.loc 2 333 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	mov	x22, x0
+	.loc 2 336 0
+	mov	w0, 6
+.LVL161:
+	.loc 2 333 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -16
+	.loc 2 336 0
+	ldr	x23, [x20, #:lo12:.LANCHOR41]
+	umull	x21, w1, w0
+	.loc 2 337 0
+	mov	w0, 65535
+	.loc 2 336 0
+	add	x19, x23, x21
+.LVL162:
+	.loc 2 337 0
+	ldrh	w1, [x19, 2]
+.LVL163:
+	cmp	w1, w0
+	bne	.L100
+	.loc 2 337 0 is_stmt 0 discriminator 1
+	ldr	x0, [x22]
+	cmp	x19, x0
+	beq	.L100
+	.loc 2 337 0 discriminator 2
+	adrp	x1, .LANCHOR50
+	adrp	x0, .LC1
+	mov	w2, 337
+	add	x1, x1, :lo12:.LANCHOR50
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL164:
+.L100:
+	.loc 2 339 0 is_stmt 1
+	ldr	x0, [x22]
+	mov	w1, 65535
+	cmp	x19, x0
+	ldrh	w0, [x23, x21]
+	bne	.L101
+	.loc 2 340 0
+	cmp	w0, w1
+	bne	.L102
+	.loc 2 341 0
+	str	xzr, [x22]
+.L103:
+	.loc 2 355 0
+	mov	w0, -1
+	strh	w0, [x23, x21]
+	strh	w0, [x19, 2]
+	.loc 2 357 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL165:
+	ldp	x21, x22, [sp, 32]
+.LVL166:
+	ldr	x23, [sp, 48]
+.LVL167:
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL168:
+.L102:
+	.cfi_restore_state
+	.loc 2 343 0
+	ldr	x1, [x20, #:lo12:.LANCHOR41]
+	mov	w2, 6
+	umaddl	x0, w0, w2, x1
+	.loc 2 344 0
+	mov	w1, -1
+	.loc 2 343 0
+	str	x0, [x22]
+	.loc 2 344 0
+	strh	w1, [x0, 2]
+	b	.L103
+.L101:
+	.loc 2 346 0
+	cmp	w0, w1
+	mov	w2, 6
+	ldrh	w1, [x19, 2]
+	bne	.L104
+.LVL169:
+	.loc 2 347 0
+	umull	x1, w1, w2
+	.loc 2 348 0
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	mov	w2, -1
+	strh	w2, [x0, x1]
+	b	.L103
+.LVL170:
+.L104:
+	.loc 2 350 0
+	ldr	x3, [x20, #:lo12:.LANCHOR41]
+.LVL171:
+	.loc 2 351 0
+	umaddl	x4, w0, w2, x3
+	strh	w1, [x4, 2]
+.LVL172:
+	.loc 2 352 0
+	ldrh	w1, [x19, 2]
+	umull	x1, w1, w2
+	.loc 2 353 0
+	strh	w0, [x3, x1]
+	b	.L103
+	.cfi_endproc
+.LFE248:
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",@progbits
+	.align	2
+	.global	List_pop_index_node
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+.LFB249:
+	.loc 2 360 0
+	.cfi_startproc
+.LVL173:
+	.loc 2 364 0
+	ldr	x2, [x0]
+	cbz	x2, .L112
+	.loc 2 360 0
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 369 0
+	adrp	x3, .LANCHOR41
+	and	w1, w1, 65535
+	.loc 2 368 0
+	mov	w4, 65535
+	.loc 2 360 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 369 0
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR41]
+.LVL174:
+.L108:
+	.loc 2 368 0
+	cbnz	w1, .L109
+.L111:
+	.loc 2 372 0
+	sub	x19, x2, x19
+	mov	x2, -6148914691236517206
+.LVL175:
+	asr	x19, x19, 1
+	movk	x2, 0xaaab, lsl 0
+	mul	x19, x19, x2
+	and	w19, w19, 65535
+.LVL176:
+	.loc 2 373 0
+	mov	w1, w19
+.LVL177:
+	bl	List_remove_node
+.LVL178:
+	.loc 2 375 0
+	mov	w0, w19
+	.loc 2 376 0
+	ldr	x19, [sp, 16]
+.LVL179:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL180:
+.L109:
+	.cfi_restore_state
+	.loc 2 368 0 discriminator 1
+	ldrh	w3, [x2]
+	cmp	w3, w4
+	beq	.L111
+	.loc 2 370 0
+	sub	w1, w1, #1
+.LVL181:
+	.loc 2 369 0
+	umaddl	x2, w3, w5, x19
+.LVL182:
+	.loc 2 370 0
+	and	w1, w1, 65535
+.LVL183:
+	b	.L108
+.LVL184:
+.L112:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 29
+	.cfi_restore 30
+	.loc 2 365 0
+	mov	w0, 65535
+.LVL185:
+	ret
+	.cfi_endproc
+.LFE249:
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_pop_head_node,"ax",@progbits
+	.align	2
+	.global	List_pop_head_node
+	.type	List_pop_head_node, %function
+List_pop_head_node:
+.LFB250:
+	.loc 2 379 0
+	.cfi_startproc
+.LVL186:
+	.loc 2 380 0
+	mov	w1, 0
+	b	List_pop_index_node
+.LVL187:
+	.cfi_endproc
+.LFE250:
+	.size	List_pop_head_node, .-List_pop_head_node
+	.section	.text.List_get_gc_head_node,"ax",@progbits
+	.align	2
+	.global	List_get_gc_head_node
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+.LFB251:
+	.loc 2 384 0
+	.cfi_startproc
+.LVL188:
+	.loc 2 384 0
+	and	w2, w0, 65535
+	.loc 2 388 0
+	adrp	x0, .LANCHOR42
+.LVL189:
+	ldr	x1, [x0, #:lo12:.LANCHOR42]
+	cbz	x1, .L123
+	.loc 2 393 0
+	adrp	x0, .LANCHOR41
+	mov	w4, 6
+	ldr	x3, [x0, #:lo12:.LANCHOR41]
+	.loc 2 392 0
+	mov	w0, 65535
+.LVL190:
+.L120:
+	cbz	w2, .L121
+	.loc 2 392 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x1]
+.LVL191:
+	cmp	w1, w0
+	bne	.L122
+	ret
+.L122:
+	.loc 2 394 0 is_stmt 1
+	sub	w2, w2, #1
+.LVL192:
+	.loc 2 393 0
+	umaddl	x1, w1, w4, x3
+.LVL193:
+	.loc 2 394 0
+	and	w2, w2, 65535
+.LVL194:
+	b	.L120
+.LVL195:
+.L123:
+	.loc 2 389 0
+	mov	w0, 65535
+	ret
+.LVL196:
+.L121:
+	.loc 2 398 0
+	sub	x0, x1, x3
+	mov	x1, -6148914691236517206
+.LVL197:
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	.loc 2 400 0
+	and	w0, w0, 65535
+	.loc 2 401 0
+	ret
+	.cfi_endproc
+.LFE251:
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",@progbits
+	.align	2
+	.global	List_update_data_list
+	.type	List_update_data_list, %function
+List_update_data_list:
+.LFB252:
+	.loc 2 404 0
+	.cfi_startproc
+.LVL198:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	and	w19, w0, 65535
+	.loc 2 413 0
+	adrp	x0, .LANCHOR51
+.LVL199:
+	.loc 2 404 0
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	.loc 2 413 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L126
+	.loc 2 413 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L126
+	.loc 2 413 0 discriminator 2
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L126
+.LVL200:
+.LBB185:
+.LBB186:
+	.loc 2 416 0 is_stmt 1
+	adrp	x2, .LANCHOR41
+	mov	w1, 6
+	.loc 2 418 0
+	adrp	x0, .LANCHOR42
+	mov	x24, x2
+	.loc 2 416 0
+	umull	x1, w19, w1
+	ldr	x3, [x2, #:lo12:.LANCHOR41]
+	.loc 2 418 0
+	ldr	x4, [x0, #:lo12:.LANCHOR42]
+	mov	x23, x0
+	.loc 2 416 0
+	add	x22, x3, x1
+.LVL201:
+	.loc 2 418 0
+	cmp	x22, x4
+	beq	.L126
+.LVL202:
+	.loc 2 421 0
+	adrp	x0, .LANCHOR43
+	ubfiz	x2, x19, 1, 16
+	mov	x21, x0
+	ldr	x4, [x0, #:lo12:.LANCHOR43]
+	.loc 2 426 0
+	ldrh	w0, [x22, 2]
+	.loc 2 422 0
+	ldrh	w20, [x4, x2]
+	ldrh	w2, [x22, 4]
+	mul	w20, w20, w2
+.LVL203:
+	.loc 2 426 0
+	mov	w2, 65535
+	.loc 2 424 0
+	cmp	w20, 0
+	csinv	w20, w20, wzr, ne
+.LVL204:
+	.loc 2 426 0
+	cmp	w0, w2
+	bne	.L129
+	ldrh	w1, [x3, x1]
+	cmp	w1, w0
+	bne	.L129
+	adrp	x1, .LANCHOR54
+	adrp	x0, .LC1
+	mov	w2, 426
+	add	x1, x1, :lo12:.LANCHOR54
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL205:
+.L129:
+	.loc 2 427 0
+	ldrh	w1, [x22, 2]
+	mov	w0, 6
+	.loc 2 428 0
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	.loc 2 427 0
+	umull	x1, w1, w0
+.LVL206:
+	.loc 2 428 0
+	asr	x0, x1, 1
+	mul	x0, x0, x2
+	.loc 2 429 0
+	ldr	x2, [x21, #:lo12:.LANCHOR43]
+	.loc 2 430 0
+	ldrh	w0, [x2, x0, lsl 1]
+	ldr	x2, [x24, #:lo12:.LANCHOR41]
+	add	x1, x2, x1
+.LVL207:
+	ldrh	w1, [x1, 4]
+.LVL208:
+	mul	w0, w0, w1
+.LVL209:
+	.loc 2 432 0
+	cmp	w0, 0
+	csinv	w0, w0, wzr, ne
+.LVL210:
+	.loc 2 434 0
+	cmp	w20, w0
+	bcs	.L126
+	.loc 2 435 0
+	adrp	x20, .LANCHOR45
+.LVL211:
+	mov	w1, w19
+	add	x0, x23, :lo12:.LANCHOR42
+.LVL212:
+	bl	List_remove_node
+.LVL213:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L131
+	adrp	x1, .LANCHOR54
+	adrp	x0, .LC1
+	mov	w2, 435
+	add	x1, x1, :lo12:.LANCHOR54
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL214:
+.L131:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	.loc 2 436 0
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL215:
+.L126:
+.LBE186:
+.LBE185:
+	.loc 2 439 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL216:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE252:
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_alloc_new_blk
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+.LFB255:
+	.loc 2 516 0
+	.cfi_startproc
+.LVL217:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+.LVL218:
+	mov	x4, x0
+	.loc 2 520 0
+	mov	w5, 0
+	.loc 2 516 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 520 0
+	ldrh	w1, [x0, 10]
+	ldr	x0, [x0, 16]
+.LVL219:
+.L134:
+	.loc 2 520 0 is_stmt 0 discriminator 1
+	cmp	w5, w1
+	bne	.L137
+.L138:
+.LVL220:
+.LBB189:
+.LBB190:
+	.loc 2 532 0 is_stmt 1
+	mov	w2, 532
+	adrp	x1, .LANCHOR55
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR55
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL221:
+	b	.L139
+.LVL222:
+.L137:
+.LBE190:
+.LBE189:
+	.loc 2 521 0
+	mov	x6, x0
+	ldrh	w2, [x0], 2
+	cbnz	w2, .L135
+	.loc 2 522 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL223:
+	strh	w0, [x6]
+	.loc 2 523 0
+	tst	w0, 65535
+	beq	.L136
+	.loc 2 526 0
+	ldr	w0, [x4, 48]
+	.loc 2 524 0
+	strh	wzr, [x4, 2]
+	.loc 2 526 0
+	add	w0, w0, 1
+	str	w0, [x4, 48]
+	.loc 2 527 0
+	ldrh	w0, [x4, 8]
+	.loc 2 525 0
+	strh	w5, [x4]
+	.loc 2 527 0
+	add	w0, w0, 1
+	strh	w0, [x4, 8]
+.L136:
+	.loc 2 532 0
+	ldrh	w0, [x4, 10]
+	cmp	w0, w5
+	bls	.L138
+.LVL224:
+.L139:
+	.loc 2 534 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL225:
+.L135:
+	.cfi_restore_state
+	.loc 2 520 0 discriminator 2
+	add	w5, w5, 1
+.LVL226:
+	and	w5, w5, 65535
+.LVL227:
+	b	.L134
+	.cfi_endproc
+.LFE255:
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",@progbits
+	.align	2
+	.global	select_l2p_ram_region
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+.LFB260:
+	.loc 2 700 0
+	.cfi_startproc
+.LVL228:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 705 0
+	adrp	x0, .LANCHOR33
+	mov	x1, 0
+	.loc 2 706 0
+	mov	w3, 65535
+	.loc 2 700 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 705 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR33]
+	.loc 2 706 0
+	adrp	x0, .LANCHOR56
+	.loc 2 700 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 706 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+.LVL229:
+.L145:
+	and	w19, w1, 65535
+.LVL230:
+	.loc 2 705 0 discriminator 1
+	cmp	w19, w2
+	bcc	.L147
+	add	x3, x0, 4
+	.loc 2 705 0 is_stmt 0
+	mov	w19, w2
+.LVL231:
+	mov	w5, -2147483648
+	mov	w1, 0
+.LVL232:
+.L148:
+	.loc 2 715 0 is_stmt 1 discriminator 1
+	cmp	w1, w2
+	bne	.L150
+	.loc 2 724 0
+	cmp	w19, w2
+	bcc	.L146
+	.loc 2 730 0
+	adrp	x1, .LANCHOR57
+.LVL233:
+	mov	w19, w2
+.LVL234:
+	mov	w3, -1
+	ldrh	w4, [x1, #:lo12:.LANCHOR57]
+	mov	w1, 0
+.LVL235:
+.L151:
+	.loc 2 729 0 discriminator 1
+	cmp	w1, w2
+	bne	.L153
+	.loc 2 735 0
+	cmp	w19, w1
+	bcc	.L146
+	.loc 2 735 0 is_stmt 0 discriminator 1
+	mov	w2, 735
+	adrp	x1, .LANCHOR58
+.LVL236:
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR58
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL237:
+	b	.L146
+.LVL238:
+.L147:
+	add	x1, x1, 1
+	.loc 2 706 0 is_stmt 1
+	add	x4, x0, x1, lsl 4
+	ldrh	w4, [x4, -16]
+	cmp	w4, w3
+	bne	.L145
+.LVL239:
+.L146:
+	.loc 2 737 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL240:
+.L150:
+	.cfi_restore_state
+	.loc 2 716 0
+	ldr	w4, [x3]
+	tbnz	w4, #31, .L149
+	.loc 2 717 0
+	cmp	w5, w4
+	bls	.L149
+	mov	w5, w4
+.LVL241:
+	mov	w19, w1
+.LVL242:
+.L149:
+	.loc 2 715 0 discriminator 2
+	add	w1, w1, 1
+.LVL243:
+	add	x3, x3, 16
+	and	w1, w1, 65535
+.LVL244:
+	b	.L148
+.LVL245:
+.L153:
+	.loc 2 730 0
+	ldr	w6, [x0, 4]
+	cmp	w3, w6
+	bls	.L152
+	.loc 2 730 0 is_stmt 0 discriminator 1
+	ldrh	w5, [x0]
+	cmp	w5, w4
+	csel	w3, w3, w6, eq
+.LVL246:
+	csel	w19, w19, w1, eq
+.LVL247:
+.L152:
+	.loc 2 729 0 is_stmt 1 discriminator 2
+	add	w1, w1, 1
+.LVL248:
+	add	x0, x0, 16
+	and	w1, w1, 65535
+.LVL249:
+	b	.L151
+	.cfi_endproc
+.LFE260:
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
+	.align	2
+	.global	FtlUpdateVaildLpn
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+.LFB266:
+	.loc 2 882 0
+	.cfi_startproc
+.LVL250:
+	.loc 2 885 0
+	adrp	x2, .LANCHOR59
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR59]
+	cmp	w1, 4
+	bhi	.L156
+	.loc 2 885 0 is_stmt 0 discriminator 1
+	cbnz	w0, .L156
+	.loc 2 885 0
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR59]
+	.loc 2 894 0 is_stmt 1
+	ret
+.L156:
+.LBB193:
+.LBB194:
+	.loc 2 888 0
+	adrp	x1, .LANCHOR5
+.LBE194:
+.LBE193:
+	.loc 2 887 0
+	adrp	x0, .LANCHOR60
+.LVL251:
+	.loc 2 886 0
+	strh	wzr, [x3, #:lo12:.LANCHOR59]
+.LBB197:
+.LBB195:
+	.loc 2 890 0
+	mov	w2, 0
+	.loc 2 888 0
+	ldrh	w5, [x1, #:lo12:.LANCHOR5]
+	.loc 2 890 0
+	adrp	x1, .LANCHOR43
+.LBE195:
+.LBE197:
+	.loc 2 887 0
+	str	wzr, [x0, #:lo12:.LANCHOR60]
+.LVL252:
+.LBB198:
+.LBB196:
+	.loc 2 890 0
+	mov	w3, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR43]
+	mov	w7, 65535
+	mov	x1, 0
+.L157:
+.LVL253:
+	.loc 2 888 0
+	cmp	w5, w1, uxth
+	bhi	.L159
+	cbz	w3, .L155
+	str	w2, [x0, #:lo12:.LANCHOR60]
+.L155:
+	ret
+.L159:
+	.loc 2 890 0
+	ldrh	w4, [x6, x1, lsl 1]
+	cmp	w4, w7
+	beq	.L158
+	.loc 2 891 0
+	add	w2, w2, w4
+	mov	w3, 1
+.L158:
+.LVL254:
+	add	x1, x1, 1
+.LVL255:
+	b	.L157
+.LBE196:
+.LBE198:
+	.cfi_endproc
+.LFE266:
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_set_blk_mode
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+.LFB272:
+	.loc 2 1347 0
+	.cfi_startproc
+.LVL256:
+	.loc 2 1347 0
+	and	w0, w0, 65535
+	.loc 2 1348 0
+	cbz	w1, .L166
+	b	ftl_set_blk_mode.part.7
+.LVL257:
+.L166:
+	.loc 2 1351 0
+	adrp	x1, .LANCHOR1
+.LVL258:
+	ubfx	x2, x0, 5, 11
+	lsl	x2, x2, 2
+	ldr	x3, [x1, #:lo12:.LANCHOR1]
+	mov	w1, 1
+	lsl	w0, w1, w0
+	ldr	w1, [x3, x2]
+	bic	w0, w1, w0
+	str	w0, [x3, x2]
+	ret
+	.cfi_endproc
+.LFE272:
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_mode
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+.LFB273:
+	.loc 2 1355 0
+	.cfi_startproc
+.LVL259:
+	.loc 2 1355 0
+	and	w1, w0, 65535
+	.loc 2 1356 0
+	adrp	x0, .LANCHOR1
+.LVL260:
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	ubfx	x2, x1, 5, 11
+	ldr	w0, [x0, x2, lsl 2]
+	lsr	w0, w0, w1
+	.loc 2 1357 0
+	and	w0, w0, 1
+	ret
+	.cfi_endproc
+.LFE273:
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
+	.align	2
+	.global	ftl_sb_update_avl_pages
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+.LFB279:
+	.loc 2 1608 0
+	.cfi_startproc
+.LVL261:
+	.loc 2 1608 0
+	and	w2, w2, 65535
+	and	w6, w1, 65535
+	ubfiz	x4, x2, 1, 16
+	.loc 2 1611 0
+	adrp	x1, .LANCHOR3
+.LVL262:
+	add	x4, x4, 16
+	.loc 2 1610 0
+	strh	wzr, [x0, 4]
+.LVL263:
+	add	x4, x0, x4
+	.loc 2 1611 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR3]
+	.loc 2 1613 0
+	mov	w1, 65535
+.LVL264:
+.L169:
+	.loc 2 1611 0 discriminator 1
+	cmp	w2, w3
+	bcc	.L171
+	.loc 2 1622 0
+	adrp	x1, .LANCHOR19
+	ubfiz	x3, x3, 1, 16
+	add	x3, x3, 16
+	add	x2, x0, 16
+.LVL265:
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	add	x3, x0, x3
+	.loc 2 1620 0
+	mov	w5, 65535
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+	.loc 2 1622 0
+	sub	w1, w1, w6
+.L172:
+	.loc 2 1618 0 discriminator 1
+	cmp	x2, x3
+	bne	.L174
+	.loc 2 1625 0
+	ret
+.LVL266:
+.L171:
+	.loc 2 1613 0
+	ldrh	w5, [x4]
+	cmp	w5, w1
+	beq	.L170
+	.loc 2 1615 0
+	ldrh	w5, [x0, 4]
+	add	w5, w5, 1
+	strh	w5, [x0, 4]
+.L170:
+	.loc 2 1611 0 discriminator 2
+	add	w2, w2, 1
+.LVL267:
+	add	x4, x4, 2
+	and	w2, w2, 65535
+.LVL268:
+	b	.L169
+.LVL269:
+.L174:
+	.loc 2 1620 0
+	ldrh	w4, [x2]
+	cmp	w4, w5
+	beq	.L173
+	.loc 2 1622 0
+	ldrh	w4, [x0, 4]
+	add	w4, w1, w4
+	strh	w4, [x0, 4]
+.L173:
+	add	x2, x2, 2
+	b	.L172
+	.cfi_endproc
+.LFE279:
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
+	.align	2
+	.global	FtlSlcSuperblockCheck
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+.LFB282:
+	.loc 2 2013 0
+	.cfi_startproc
+.LVL270:
+	.loc 2 2016 0
+	ldrh	w1, [x0, 4]
+	cbz	w1, .L175
+	.loc 2 2018 0
+	ldrh	w2, [x0]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L175
+.LVL271:
+.LBB201:
+.LBB202:
+	.loc 2 2020 0
+	ldrb	w2, [x0, 6]
+	add	x2, x2, 8
+	ldrh	w3, [x0, x2, lsl 1]
+.LVL272:
+	.loc 2 2023 0
+	adrp	x2, .LANCHOR3
+	ldrh	w4, [x2, #:lo12:.LANCHOR3]
+	.loc 2 2021 0
+	mov	w2, w1
+.L178:
+	cmp	w3, w2
+	beq	.L180
+.LVL273:
+.L175:
+	ret
+.LVL274:
+.L180:
+	.loc 2 2022 0
+	ldrb	w1, [x0, 6]
+	add	w1, w1, 1
+	and	w1, w1, 255
+	strb	w1, [x0, 6]
+	.loc 2 2023 0
+	cmp	w1, w4
+	bne	.L179
+	.loc 2 2024 0
+	ldrh	w1, [x0, 2]
+	.loc 2 2025 0
+	strb	wzr, [x0, 6]
+	.loc 2 2024 0
+	add	w1, w1, 1
+	strh	w1, [x0, 2]
+.L179:
+	.loc 2 2027 0
+	ldrb	w1, [x0, 6]
+	add	x1, x1, 8
+	ldrh	w3, [x0, x1, lsl 1]
+.LVL275:
+	b	.L178
+.LBE202:
+.LBE201:
+	.cfi_endproc
+.LFE282:
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.make_superblock,"ax",@progbits
+	.align	2
+	.global	make_superblock
+	.type	make_superblock, %function
+make_superblock:
+.LFB284:
+	.loc 2 2045 0
+	.cfi_startproc
+.LVL276:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 2048 0
+	ldrh	w1, [x0]
+	.loc 2 2045 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 2045 0
+	mov	x19, x0
+	.loc 2 2048 0
+	adrp	x0, .LANCHOR5
+.LVL277:
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w1, w0
+	bcc	.L182
+	.loc 2 2048 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR61
+	adrp	x0, .LC1
+	mov	w2, 2048
+	add	x1, x1, :lo12:.LANCHOR61
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL278:
+.L182:
+	.loc 2 2051 0 is_stmt 1
+	adrp	x0, .LANCHOR3
+	.loc 2 2052 0
+	adrp	x7, .LANCHOR13
+	add	x6, x19, 16
+	add	x7, x7, :lo12:.LANCHOR13
+	.loc 2 2051 0
+	ldrh	w8, [x0, #:lo12:.LANCHOR3]
+	mov	x5, 0
+	.loc 2 2049 0
+	strh	wzr, [x19, 4]
+	.loc 2 2053 0
+	mov	w10, -1
+	.loc 2 2050 0
+	strb	wzr, [x19, 7]
+.LVL279:
+.L183:
+	.loc 2 2051 0 discriminator 1
+	cmp	w8, w5, uxth
+	bhi	.L185
+	.loc 2 2061 0
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x19, 7]
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	strh	w0, [x19, 4]
+	.loc 2 2062 0
+	mov	w0, 1
+	strb	w0, [x19, 9]
+	.loc 2 2064 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+.LVL280:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL281:
+.L185:
+	.cfi_restore_state
+	.loc 2 2052 0
+	ldrh	w1, [x19]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+.LVL282:
+	mov	w4, w0
+.LVL283:
+	.loc 2 2053 0
+	strh	w10, [x6]
+	.loc 2 2054 0
+	bl	FtlBbmIsBadBlock
+.LVL284:
+	cbnz	w0, .L184
+	.loc 2 2055 0
+	strh	w4, [x6]
+	.loc 2 2056 0
+	ldrb	w0, [x19, 7]
+	add	w0, w0, 1
+	strb	w0, [x19, 7]
+.L184:
+.LVL285:
+	add	x5, x5, 1
+.LVL286:
+	add	x6, x6, 2
+	b	.L183
+	.cfi_endproc
+.LFE284:
+	.size	make_superblock, .-make_superblock
+	.section	.text.update_multiplier_value,"ax",@progbits
+	.align	2
+	.global	update_multiplier_value
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+.LFB293:
+	.loc 2 2401 0
+	.cfi_startproc
+.LVL287:
+	and	w6, w0, 65535
+	.loc 2 2405 0
+	adrp	x0, .LANCHOR3
+.LVL288:
+	mov	x7, 0
+	.loc 2 2406 0
+	adrp	x8, .LANCHOR13
+	.loc 2 2405 0
+	ldrh	w10, [x0, #:lo12:.LANCHOR3]
+	.loc 2 2408 0
+	adrp	x0, .LANCHOR19
+	.loc 2 2403 0
+	mov	w5, 0
+	.loc 2 2406 0
+	add	x8, x8, :lo12:.LANCHOR13
+.LVL289:
+	.loc 2 2408 0
+	ldrh	w11, [x0, #:lo12:.LANCHOR19]
+	.loc 2 2405 0
+	cmp	w10, w7, uxth
+	bhi	.L199
+	.loc 2 2410 0
+	cbz	w5, .L197
+	.loc 2 2411 0
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.LVL290:
+.L198:
+	.loc 2 2412 0
+	adrp	x0, .LANCHOR41
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	umaddl	x6, w6, w1, x0
+.LVL291:
+	.loc 2 2414 0
+	mov	w0, 0
+	.loc 2 2412 0
+	strh	w5, [x6, 4]
+	.loc 2 2414 0
+	ret
+.LVL292:
+.L192:
+	.cfi_def_cfa 29, 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	mov	w5, 0
+.LVL293:
+	b	.L191
+.LVL294:
+.L197:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 29
+	.cfi_restore 30
+	mov	w5, 0
+	b	.L198
+.L199:
+	.loc 2 2401 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+.L190:
+	.loc 2 2406 0
+	ldrb	w0, [x8, x7]
+	mov	w1, w6
+	bl	V2P_block
+.LVL295:
+	.loc 2 2407 0
+	bl	FtlBbmIsBadBlock
+.LVL296:
+	cbnz	w0, .L189
+	.loc 2 2408 0
+	add	w5, w5, w11
+.LVL297:
+	and	w5, w5, 65535
+.LVL298:
+.L189:
+	add	x7, x7, 1
+.LVL299:
+	.loc 2 2405 0 discriminator 2
+	cmp	w10, w7, uxth
+	bhi	.L190
+	.loc 2 2410 0
+	cbz	w5, .L192
+	.loc 2 2411 0
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.LVL300:
+.L191:
+	.loc 2 2412 0
+	adrp	x0, .LANCHOR41
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	umaddl	x6, w6, w1, x0
+	.loc 2 2414 0
+	mov	w0, 0
+	.loc 2 2412 0
+	strh	w5, [x6, 4]
+	.loc 2 2414 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE293:
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMinEraseCount
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+.LFB294:
+	.loc 2 2417 0
+	.cfi_startproc
+.LVL301:
+	.loc 2 2420 0
+	adrp	x0, .LANCHOR47
+	ldr	x0, [x0, #:lo12:.LANCHOR47]
+	cbz	x0, .L202
+	.loc 2 2421 0
+	adrp	x1, .LANCHOR41
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR40
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	and	x0, x0, 65535
+	ldrh	w0, [x1, x0, lsl 1]
+.LVL302:
+	ret
+.LVL303:
+.L202:
+	.loc 2 2418 0
+	mov	w0, 0
+.LVL304:
+	.loc 2 2423 0
+	ret
+	.cfi_endproc
+.LFE294:
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMaxEraseCount
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+.LFB295:
+	.loc 2 2426 0
+	.cfi_startproc
+.LVL305:
+	.loc 2 2431 0
+	adrp	x1, .LANCHOR47
+	.loc 2 2426 0
+	and	w0, w0, 65535
+	.loc 2 2431 0
+	ldr	x1, [x1, #:lo12:.LANCHOR47]
+	cbz	x1, .L210
+	.loc 2 2432 0
+	adrp	x2, .LANCHOR48
+	mov	w3, 7
+	.loc 2 2436 0
+	mov	w5, 6
+	mov	w6, 65535
+	.loc 2 2432 0
+	ldrh	w2, [x2, #:lo12:.LANCHOR48]
+	mul	w2, w2, w3
+	asr	w2, w2, 3
+	.loc 2 2433 0
+	cmp	w0, w2
+	csel	w0, w2, w0, gt
+.LVL306:
+	.loc 2 2434 0
+	adrp	x2, .LANCHOR41
+	ldr	x3, [x2, #:lo12:.LANCHOR41]
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	sub	x1, x1, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	.loc 2 2435 0
+	mov	w2, 0
+	.loc 2 2434 0
+	and	w1, w1, 65535
+.LVL307:
+.L206:
+	.loc 2 2435 0 discriminator 1
+	cmp	w0, w2
+	beq	.L209
+	.loc 2 2436 0
+	umull	x4, w1, w5
+	ldrh	w4, [x3, x4]
+	cmp	w4, w6
+	bne	.L207
+.L209:
+	.loc 2 2440 0
+	adrp	x0, .LANCHOR40
+.LVL308:
+	ubfiz	x1, x1, 1, 16
+.LVL309:
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	ldrh	w0, [x0, x1]
+.LVL310:
+	ret
+.LVL311:
+.L207:
+	.loc 2 2435 0 discriminator 2
+	add	w2, w2, 1
+.LVL312:
+	mov	w1, w4
+	and	w2, w2, 65535
+.LVL313:
+	b	.L206
+.LVL314:
+.L210:
+	.loc 2 2427 0
+	mov	w0, 0
+.LVL315:
+	.loc 2 2443 0
+	ret
+	.cfi_endproc
+.LFE295:
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.FtlPrintInfo2buf,"ax",@progbits
+	.align	2
+	.global	FtlPrintInfo2buf
+	.type	FtlPrintInfo2buf, %function
+FtlPrintInfo2buf:
+.LFB200:
+	.loc 3 12 0
+	.cfi_startproc
+.LVL316:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 3 16 0
+	adrp	x1, .LC2
+	add	x1, x1, :lo12:.LC2
+	.loc 3 12 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 3 31 0
+	adrp	x19, .LANCHOR37
+	.loc 3 12 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	x21, x0
+.LVL317:
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 3 32 0
+	adrp	x23, .LANCHOR48
+	.loc 3 12 0
+	stp	x25, x26, [sp, 64]
+	.loc 3 39 0
+	adrp	x22, .LANCHOR79
+	.loc 3 12 0
+	str	x27, [sp, 80]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	.loc 3 16 0
+	bl	sprintf
+.LVL318:
+	add	x20, x21, x0, sxtw
+.LVL319:
+	.loc 3 17 0
+	adrp	x0, .LANCHOR26
+	adrp	x1, .LC3
+	add	x1, x1, :lo12:.LC3
+	ldr	w2, [x0, #:lo12:.LANCHOR26]
+	mov	x0, x20
+	.loc 3 39 0
+	add	x22, x22, :lo12:.LANCHOR79
+	.loc 3 50 0
+	adrp	x24, .LANCHOR51
+	.loc 3 67 0
+	adrp	x25, .LANCHOR82
+	.loc 3 17 0
+	bl	sprintf
+.LVL320:
+	add	x20, x20, x0, sxtw
+.LVL321:
+	.loc 3 18 0
+	mov	x0, x20
+	adrp	x1, .LC4
+	add	x1, x1, :lo12:.LC4
+	bl	sprintf
+.LVL322:
+	add	x20, x20, x0, sxtw
+.LVL323:
+	.loc 3 19 0
+	adrp	x0, .LANCHOR62
+	adrp	x1, .LC5
+	add	x1, x1, :lo12:.LC5
+	ldr	w2, [x0, #:lo12:.LANCHOR62]
+	mov	x0, x20
+	bl	sprintf
+.LVL324:
+	add	x20, x20, x0, sxtw
+.LVL325:
+	.loc 3 20 0
+	adrp	x0, .LANCHOR60
+	adrp	x1, .LC6
+	add	x1, x1, :lo12:.LC6
+	ldr	w2, [x0, #:lo12:.LANCHOR60]
+	mov	x0, x20
+	bl	sprintf
+.LVL326:
+	add	x20, x20, x0, sxtw
+.LVL327:
+	.loc 3 21 0
+	adrp	x0, .LANCHOR63
+	adrp	x1, .LC7
+	add	x1, x1, :lo12:.LC7
+	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	mov	x0, x20
+	bl	sprintf
+.LVL328:
+	add	x20, x20, x0, sxtw
+.LVL329:
+	.loc 3 22 0
+	adrp	x0, .LANCHOR64
+	adrp	x1, .LC8
+	add	x1, x1, :lo12:.LC8
+	ldr	w2, [x0, #:lo12:.LANCHOR64]
+	mov	x0, x20
+	bl	sprintf
+.LVL330:
+	add	x20, x20, x0, sxtw
+.LVL331:
+	.loc 3 23 0
+	adrp	x0, .LANCHOR65
+	adrp	x1, .LC9
+	add	x1, x1, :lo12:.LC9
+	ldr	w2, [x0, #:lo12:.LANCHOR65]
+	mov	x0, x20
+	bl	sprintf
+.LVL332:
+	add	x20, x20, x0, sxtw
+.LVL333:
+	.loc 3 24 0
+	adrp	x0, .LANCHOR66
+	adrp	x1, .LC10
+	add	x1, x1, :lo12:.LC10
+	ldr	w2, [x0, #:lo12:.LANCHOR66]
+	mov	x0, x20
+	bl	sprintf
+.LVL334:
+	add	x20, x20, x0, sxtw
+.LVL335:
+	.loc 3 25 0
+	adrp	x0, .LANCHOR67
+	adrp	x1, .LC11
+	add	x1, x1, :lo12:.LC11
+	ldr	w2, [x0, #:lo12:.LANCHOR67]
+	mov	x0, x20
+	bl	sprintf
+.LVL336:
+	add	x20, x20, x0, sxtw
+.LVL337:
+	.loc 3 26 0
+	adrp	x0, .LANCHOR68
+	adrp	x1, .LC12
+	add	x1, x1, :lo12:.LC12
+	ldr	w2, [x0, #:lo12:.LANCHOR68]
+	mov	x0, x20
+	bl	sprintf
+.LVL338:
+	add	x20, x20, x0, sxtw
+.LVL339:
+	.loc 3 27 0
+	adrp	x0, .LANCHOR69
+	adrp	x1, .LC13
+	add	x1, x1, :lo12:.LC13
+	ldr	w2, [x0, #:lo12:.LANCHOR69]
+	mov	x0, x20
+	lsr	w2, w2, 11
+	bl	sprintf
+.LVL340:
+	add	x20, x20, x0, sxtw
+.LVL341:
+	.loc 3 28 0
+	adrp	x0, .LANCHOR70
+	adrp	x1, .LC14
+	add	x1, x1, :lo12:.LC14
+	ldr	w2, [x0, #:lo12:.LANCHOR70]
+	mov	x0, x20
+	lsr	w2, w2, 11
+	bl	sprintf
+.LVL342:
+	add	x20, x20, x0, sxtw
+.LVL343:
+	.loc 3 29 0
+	adrp	x0, .LANCHOR71
+	adrp	x1, .LC15
+	add	x1, x1, :lo12:.LC15
+	ldr	w2, [x0, #:lo12:.LANCHOR71]
+	mov	x0, x20
+	bl	sprintf
+.LVL344:
+	add	x20, x20, x0, sxtw
+.LVL345:
+	.loc 3 30 0
+	adrp	x0, .LANCHOR72
+	adrp	x1, .LC16
+	add	x1, x1, :lo12:.LC16
+	ldr	w2, [x0, #:lo12:.LANCHOR72]
+	mov	x0, x20
+	bl	sprintf
+.LVL346:
+	add	x20, x20, x0, sxtw
+.LVL347:
+	.loc 3 31 0
+	add	x0, x19, :lo12:.LANCHOR37
+	adrp	x1, .LC17
+	add	x1, x1, :lo12:.LC17
+	ldrh	w2, [x0, 6]
+	mov	x0, x20
+	bl	sprintf
+.LVL348:
+	add	x20, x20, x0, sxtw
+.LVL349:
+	.loc 3 32 0
+	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	mov	x0, x20
+	adrp	x1, .LC18
+	add	x1, x1, :lo12:.LC18
+	bl	sprintf
+.LVL350:
+	add	x20, x20, x0, sxtw
+.LVL351:
+	.loc 3 33 0
+	adrp	x0, .LANCHOR73
+	adrp	x1, .LC19
+	add	x1, x1, :lo12:.LC19
+	ldr	w2, [x0, #:lo12:.LANCHOR73]
+	mov	x0, x20
+	bl	sprintf
+.LVL352:
+	add	x20, x20, x0, sxtw
+.LVL353:
+	.loc 3 34 0
+	adrp	x0, .LANCHOR74
+	adrp	x1, .LC20
+	add	x1, x1, :lo12:.LC20
+	ldr	w2, [x0, #:lo12:.LANCHOR74]
+	mov	x0, x20
+	bl	sprintf
+.LVL354:
+	add	x20, x20, x0, sxtw
+.LVL355:
+	.loc 3 35 0
+	adrp	x0, .LANCHOR75
+	adrp	x1, .LC21
+	add	x1, x1, :lo12:.LC21
+	ldr	w2, [x0, #:lo12:.LANCHOR75]
+	mov	x0, x20
+	bl	sprintf
+.LVL356:
+	add	x20, x20, x0, sxtw
+.LVL357:
+	.loc 3 36 0
+	adrp	x0, .LANCHOR76
+	adrp	x1, .LC22
+	add	x1, x1, :lo12:.LC22
+	ldr	w2, [x0, #:lo12:.LANCHOR76]
+	mov	x0, x20
+	bl	sprintf
+.LVL358:
+	add	x20, x20, x0, sxtw
+.LVL359:
+	.loc 3 37 0
+	adrp	x0, .LANCHOR77
+	adrp	x1, .LC23
+	add	x1, x1, :lo12:.LC23
+	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	mov	x0, x20
+	bl	sprintf
+.LVL360:
+	add	x20, x20, x0, sxtw
+.LVL361:
+	.loc 3 38 0
+	adrp	x0, .LANCHOR78
+	adrp	x1, .LC24
+	add	x1, x1, :lo12:.LC24
+	ldr	w2, [x0, #:lo12:.LANCHOR78]
+	mov	x0, x20
+	bl	sprintf
+.LVL362:
+	add	x20, x20, x0, sxtw
+.LVL363:
+	.loc 3 39 0
+	ldrh	w2, [x22, 30]
+	mov	x0, x20
+	adrp	x1, .LC25
+	add	x1, x1, :lo12:.LC25
+	bl	sprintf
+.LVL364:
+	add	x20, x20, x0, sxtw
+.LVL365:
+	.loc 3 40 0
+	ldrh	w2, [x22, 28]
+	mov	x0, x20
+	adrp	x1, .LC26
+	add	x1, x1, :lo12:.LC26
+	.loc 3 55 0
+	adrp	x22, .LANCHOR43
+	.loc 3 40 0
+	bl	sprintf
+.LVL366:
+	add	x20, x20, x0, sxtw
+.LVL367:
+	.loc 3 41 0
+	adrp	x0, .LANCHOR34
+	adrp	x1, .LC27
+	add	x1, x1, :lo12:.LC27
+	ldr	w2, [x0, #:lo12:.LANCHOR34]
+	mov	x0, x20
+	bl	sprintf
+.LVL368:
+	add	x20, x20, x0, sxtw
+.LVL369:
+	.loc 3 42 0
+	adrp	x0, .LANCHOR31
+	adrp	x1, .LC28
+	add	x1, x1, :lo12:.LC28
+	ldr	w2, [x0, #:lo12:.LANCHOR31]
+	mov	x0, x20
+	bl	sprintf
+.LVL370:
+	add	x20, x20, x0, sxtw
+.LVL371:
+	.loc 3 43 0
+	adrp	x0, .LANCHOR2
+	adrp	x1, .LC29
+	add	x1, x1, :lo12:.LC29
+	ldr	w2, [x0, #:lo12:.LANCHOR2]
+	mov	x0, x20
+	bl	sprintf
+.LVL372:
+	add	x20, x20, x0, sxtw
+.LVL373:
+	.loc 3 44 0
+	adrp	x0, .LANCHOR38+6
+	adrp	x1, .LC30
+	add	x1, x1, :lo12:.LC30
+	ldrh	w2, [x0, #:lo12:.LANCHOR38+6]
+	mov	x0, x20
+	bl	sprintf
+.LVL374:
+	add	x20, x20, x0, sxtw
+.LVL375:
+	.loc 3 45 0
+	adrp	x0, .LANCHOR5
+	adrp	x1, .LC31
+	add	x1, x1, :lo12:.LC31
+	ldrh	w2, [x0, #:lo12:.LANCHOR5]
+	mov	x0, x20
+	bl	sprintf
+.LVL376:
+	add	x20, x20, x0, sxtw
+.LVL377:
+	.loc 3 46 0
+	adrp	x0, .LANCHOR80
+	adrp	x1, .LC32
+	add	x1, x1, :lo12:.LC32
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	mov	x0, x20
+	bl	sprintf
+.LVL378:
+	add	x20, x20, x0, sxtw
+.LVL379:
+	.loc 3 47 0
+	adrp	x0, .LANCHOR7
+	adrp	x1, .LC33
+	add	x1, x1, :lo12:.LC33
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	mov	x0, x20
+	bl	sprintf
+.LVL380:
+	add	x20, x20, x0, sxtw
+.LVL381:
+	.loc 3 48 0
+	adrp	x0, .LANCHOR81
+	adrp	x1, .LC34
+	add	x1, x1, :lo12:.LC34
+	ldrh	w2, [x0, #:lo12:.LANCHOR81]
+	mov	x0, x20
+	bl	sprintf
+.LVL382:
+	add	x20, x20, x0, sxtw
+.LVL383:
+	.loc 3 49 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR37]
+	.loc 3 50 0
+	add	x19, x24, :lo12:.LANCHOR51
+	.loc 3 49 0
+	mov	x0, x20
+	adrp	x1, .LC35
+	add	x1, x1, :lo12:.LC35
+	bl	sprintf
+.LVL384:
+	add	x20, x20, x0, sxtw
+.LVL385:
+	.loc 3 50 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC36
+	add	x1, x1, :lo12:.LC36
+	bl	sprintf
+.LVL386:
+	add	x20, x20, x0, sxtw
+.LVL387:
+	.loc 3 51 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC37
+	add	x1, x1, :lo12:.LC37
+	bl	sprintf
+.LVL388:
+	add	x20, x20, x0, sxtw
+.LVL389:
+	.loc 3 52 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR51]
+	mov	x0, x20
+	adrp	x1, .LC38
+	add	x1, x1, :lo12:.LC38
+	bl	sprintf
+.LVL390:
+	add	x20, x20, x0, sxtw
+.LVL391:
+	.loc 3 53 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC39
+	add	x1, x1, :lo12:.LC39
+	bl	sprintf
+.LVL392:
+	add	x20, x20, x0, sxtw
+.LVL393:
+	.loc 3 54 0
+	ldrh	w2, [x19, 4]
+	mov	x0, x20
+	adrp	x1, .LC40
+	add	x1, x1, :lo12:.LC40
+	bl	sprintf
+.LVL394:
+	add	x20, x20, x0, sxtw
+.LVL395:
+	.loc 3 55 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR51]
+	.loc 3 56 0
+	adrp	x24, .LANCHOR52
+	.loc 3 55 0
+	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	.loc 3 56 0
+	add	x19, x24, :lo12:.LANCHOR52
+	.loc 3 55 0
+	ldrh	w2, [x0, x1, lsl 1]
+	mov	x0, x20
+	adrp	x1, .LC41
+	add	x1, x1, :lo12:.LC41
+	bl	sprintf
+.LVL396:
+	add	x20, x20, x0, sxtw
+.LVL397:
+	.loc 3 56 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC42
+	add	x1, x1, :lo12:.LC42
+	bl	sprintf
+.LVL398:
+	add	x20, x20, x0, sxtw
+.LVL399:
+	.loc 3 57 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC43
+	add	x1, x1, :lo12:.LC43
+	bl	sprintf
+.LVL400:
+	add	x20, x20, x0, sxtw
+.LVL401:
+	.loc 3 58 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR52]
+	mov	x0, x20
+	adrp	x1, .LC44
+	add	x1, x1, :lo12:.LC44
+	bl	sprintf
+.LVL402:
+	add	x20, x20, x0, sxtw
+.LVL403:
+	.loc 3 59 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC45
+	add	x1, x1, :lo12:.LC45
+	bl	sprintf
+.LVL404:
+	add	x20, x20, x0, sxtw
+.LVL405:
+	.loc 3 60 0
+	ldrh	w2, [x19, 4]
+	mov	x0, x20
+	adrp	x1, .LC46
+	add	x1, x1, :lo12:.LC46
+	bl	sprintf
+.LVL406:
+	add	x20, x20, x0, sxtw
+.LVL407:
+	.loc 3 61 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR52]
+	.loc 3 62 0
+	adrp	x24, .LANCHOR53
+	.loc 3 61 0
+	ldr	x0, [x22, #:lo12:.LANCHOR43]
+	.loc 3 62 0
+	add	x19, x24, :lo12:.LANCHOR53
+	.loc 3 61 0
+	ldrh	w2, [x0, x1, lsl 1]
+	mov	x0, x20
+	adrp	x1, .LC47
+	add	x1, x1, :lo12:.LC47
+	bl	sprintf
+.LVL408:
+	add	x20, x20, x0, sxtw
+.LVL409:
+	.loc 3 62 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC48
+	add	x1, x1, :lo12:.LC48
+	bl	sprintf
+.LVL410:
+	add	x20, x20, x0, sxtw
+.LVL411:
+	.loc 3 63 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC49
+	add	x1, x1, :lo12:.LC49
+	bl	sprintf
+.LVL412:
+	add	x20, x20, x0, sxtw
+.LVL413:
+	.loc 3 64 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR53]
+	mov	x0, x20
+	adrp	x1, .LC50
+	add	x1, x1, :lo12:.LC50
+	.loc 3 72 0
+	adrp	x24, .LANCHOR83
+	add	x24, x24, :lo12:.LANCHOR83
+	.loc 3 64 0
+	bl	sprintf
+.LVL414:
+	add	x20, x20, x0, sxtw
+.LVL415:
+	.loc 3 65 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC51
+	add	x1, x1, :lo12:.LC51
+	bl	sprintf
+.LVL416:
+	add	x20, x20, x0, sxtw
+.LVL417:
+	.loc 3 66 0
+	ldrh	w2, [x19, 4]
+	.loc 3 67 0
+	add	x19, x25, :lo12:.LANCHOR82
+	.loc 3 66 0
+	mov	x0, x20
+	adrp	x1, .LC52
+	add	x1, x1, :lo12:.LC52
+	bl	sprintf
+.LVL418:
+	add	x20, x20, x0, sxtw
+.LVL419:
+	.loc 3 67 0
+	ldrh	w2, [x19, 2]
+	mov	x0, x20
+	adrp	x1, .LC53
+	add	x1, x1, :lo12:.LC53
+	bl	sprintf
+.LVL420:
+	add	x20, x20, x0, sxtw
+.LVL421:
+	.loc 3 68 0
+	ldrb	w2, [x19, 6]
+	mov	x0, x20
+	adrp	x1, .LC54
+	add	x1, x1, :lo12:.LC54
+	bl	sprintf
+.LVL422:
+	add	x20, x20, x0, sxtw
+.LVL423:
+	.loc 3 69 0
+	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	mov	x0, x20
+	adrp	x1, .LC55
+	add	x1, x1, :lo12:.LC55
+	bl	sprintf
+.LVL424:
+	add	x20, x20, x0, sxtw
+.LVL425:
+	.loc 3 70 0
+	ldrb	w2, [x19, 8]
+	mov	x0, x20
+	adrp	x1, .LC56
+	add	x1, x1, :lo12:.LC56
+	bl	sprintf
+.LVL426:
+	add	x20, x20, x0, sxtw
+.LVL427:
+	.loc 3 71 0
+	ldrh	w2, [x19, 4]
+	mov	x0, x20
+	adrp	x1, .LC57
+	add	x1, x1, :lo12:.LC57
+	bl	sprintf
+.LVL428:
+	add	x20, x20, x0, sxtw
+.LVL429:
+	.loc 3 72 0
+	ldp	w4, w2, [x24, 76]
+	adrp	x1, .LC58
+	ldr	w3, [x24, 84]
+	add	x1, x1, :lo12:.LC58
+	mov	x0, x20
+	bl	sprintf
+.LVL430:
+	add	x19, x20, x0, sxtw
+.LVL431:
+	.loc 3 73 0
+	ldr	w2, [x24, 72]
+	mov	x0, x19
+	adrp	x1, .LC59
+	add	x1, x1, :lo12:.LC59
+	bl	sprintf
+.LVL432:
+	add	x19, x19, x0, sxtw
+.LVL433:
+	.loc 3 74 0
+	ldr	w2, [x24, 96]
+	mov	x0, x19
+	adrp	x1, .LC60
+	add	x1, x1, :lo12:.LC60
+	bl	sprintf
+.LVL434:
+	add	x19, x19, x0, sxtw
+.LVL435:
+	.loc 3 75 0
+	adrp	x0, .LANCHOR84
+	adrp	x1, .LC61
+	add	x1, x1, :lo12:.LC61
+	ldrh	w2, [x0, #:lo12:.LANCHOR84]
+	mov	x0, x19
+	bl	sprintf
+.LVL436:
+	add	x19, x19, x0, sxtw
+.LVL437:
+	.loc 3 76 0
+	adrp	x0, .LANCHOR85
+	adrp	x1, .LC62
+	add	x1, x1, :lo12:.LC62
+	ldrh	w2, [x0, #:lo12:.LANCHOR85]
+	mov	x0, x19
+	bl	sprintf
+.LVL438:
+	add	x19, x19, x0, sxtw
+.LVL439:
+	.loc 3 77 0
+	adrp	x0, .LANCHOR86
+	adrp	x1, .LC63
+	add	x1, x1, :lo12:.LC63
+	ldr	w2, [x0, #:lo12:.LANCHOR86]
+	mov	x0, x19
+	bl	sprintf
+.LVL440:
+	add	x19, x19, x0, sxtw
+.LVL441:
+	.loc 3 78 0
+	adrp	x0, .LANCHOR87
+	adrp	x1, .LC64
+	add	x1, x1, :lo12:.LC64
+	ldrh	w2, [x0, #:lo12:.LANCHOR87]
+	mov	x0, x19
+	bl	sprintf
+.LVL442:
+	add	x19, x19, x0, sxtw
+.LVL443:
+	.loc 3 79 0
+	bl	GetFreeBlockMinEraseCount
+.LVL444:
+	and	w2, w0, 65535
+	adrp	x1, .LC65
+	mov	x0, x19
+	add	x1, x1, :lo12:.LC65
+	bl	sprintf
+.LVL445:
+	add	x19, x19, x0, sxtw
+.LVL446:
+	.loc 3 80 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	bl	GetFreeBlockMaxEraseCount
+.LVL447:
+	and	w2, w0, 65535
+	adrp	x1, .LC66
+	mov	x0, x19
+	add	x1, x1, :lo12:.LC66
+	bl	sprintf
+.LVL448:
+	add	x19, x19, x0, sxtw
+.LVL449:
+	.loc 3 81 0
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w0, 1
+	beq	.L212
+.L217:
+	.loc 3 104 0
+	sub	w0, w19, w21
+	.loc 3 105 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL450:
+	ldp	x21, x22, [sp, 32]
+.LVL451:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL452:
+.L212:
+	.cfi_restore_state
+	.loc 3 84 0
+	ldrh	w0, [x25, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L214
+	.loc 3 85 0
+	ldr	x1, [x22, #:lo12:.LANCHOR43]
+	ubfiz	x0, x0, 1, 16
+	ldrh	w2, [x1, x0]
+	mov	x0, x19
+	adrp	x1, .LC67
+	add	x1, x1, :lo12:.LC67
+	bl	sprintf
+.LVL453:
+	add	x19, x19, x0, sxtw
+.LVL454:
+.L214:
+.LBB203:
+	.loc 3 87 0
+	mov	w0, 0
+	.loc 3 91 0
+	adrp	x24, .LC68
+	.loc 3 87 0
+	bl	List_get_gc_head_node
+.LVL455:
+	.loc 3 91 0
+	add	x24, x24, :lo12:.LC68
+	.loc 3 87 0
+	and	w3, w0, 65535
+.LVL456:
+	.loc 3 88 0
+	mov	w23, 0
+	.loc 3 89 0
+	mov	w27, 65535
+	adrp	x20, .LANCHOR41
+	.loc 3 91 0
+	mov	w26, 6
+.LVL457:
+.L216:
+	.loc 3 89 0
+	cmp	w3, w27
+	beq	.L215
+	.loc 3 91 0 discriminator 2
+	adrp	x0, .LANCHOR40
+	umull	x25, w3, w26
+	ldr	x2, [x22, #:lo12:.LANCHOR43]
+	ubfiz	x1, x3, 1, 16
+	ldr	x4, [x0, #:lo12:.LANCHOR40]
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	add	x0, x0, x25
+	ldrh	w6, [x4, x1]
+	ldrh	w4, [x2, x1]
+	mov	w2, w23
+	ldrh	w5, [x0, 4]
+	mov	x1, x24
+	mov	x0, x19
+	.loc 3 88 0 discriminator 2
+	add	w23, w23, 1
+.LVL458:
+	.loc 3 91 0 discriminator 2
+	bl	sprintf
+.LVL459:
+	add	x19, x19, x0, sxtw
+.LVL460:
+	.loc 3 92 0 discriminator 2
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	.loc 3 88 0 discriminator 2
+	cmp	w23, 16
+	.loc 3 92 0 discriminator 2
+	ldrh	w3, [x0, x25]
+.LVL461:
+	.loc 3 88 0 discriminator 2
+	bne	.L216
+.L215:
+.LBE203:
+.LBB204:
+	.loc 3 96 0
+	adrp	x0, .LANCHOR47
+	.loc 3 100 0
+	adrp	x23, .LC69
+.LVL462:
+	add	x23, x23, :lo12:.LC69
+	.loc 3 97 0
+	mov	w22, 0
+	.loc 3 96 0
+	ldr	x3, [x0, #:lo12:.LANCHOR47]
+.LVL463:
+	.loc 3 98 0
+	mov	w25, 65535
+	.loc 3 96 0
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	.loc 3 100 0
+	mov	w26, 6
+	adrp	x27, .LANCHOR40
+	.loc 3 96 0
+	sub	x3, x3, x0
+	mov	x0, -6148914691236517206
+	asr	x3, x3, 1
+	movk	x0, 0xaaab, lsl 0
+	mul	x3, x3, x0
+	and	w3, w3, 65535
+.LVL464:
+.L218:
+	.loc 3 98 0
+	cmp	w3, w25
+	beq	.L217
+	.loc 3 100 0 discriminator 2
+	umull	x24, w3, w26
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldr	x2, [x27, #:lo12:.LANCHOR40]
+	ubfiz	x1, x3, 1, 16
+	add	x0, x0, x24
+	ldrh	w5, [x2, x1]
+	mov	w2, w22
+	ldrh	w4, [x0, 4]
+	mov	x1, x23
+	mov	x0, x19
+	.loc 3 97 0 discriminator 2
+	add	w22, w22, 1
+.LVL465:
+	.loc 3 100 0 discriminator 2
+	bl	sprintf
+.LVL466:
+	add	x19, x19, x0, sxtw
+.LVL467:
+	.loc 3 97 0 discriminator 2
+	cmp	w22, 4
+	beq	.L217
+	.loc 3 101 0
+	ldr	x0, [x20, #:lo12:.LANCHOR41]
+	ldrh	w3, [x0, x24]
+	b	.L218
+.LBE204:
+	.cfi_endproc
+.LFE200:
+	.size	FtlPrintInfo2buf, .-FtlPrintInfo2buf
+	.section	.text.rknand_proc_ftlread,"ax",@progbits
+	.align	2
+	.global	rknand_proc_ftlread
+	.type	rknand_proc_ftlread, %function
+rknand_proc_ftlread:
+.LFB201:
+	.loc 3 114 0
+	.cfi_startproc
+.LVL468:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 120 0
+	adrp	x2, .LC70
+	adrp	x1, .LC71
+	add	x2, x2, :lo12:.LC70
+	.loc 3 114 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 120 0
+	add	x1, x1, :lo12:.LC71
+	.loc 3 114 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 3 114 0
+	mov	x20, x0
+.LVL469:
+	.loc 3 120 0
+	bl	sprintf
+.LVL470:
+	add	x19, x20, x0, sxtw
+.LVL471:
+	.loc 3 122 0
+	mov	x0, x19
+	bl	FtlPrintInfo2buf
+.LVL472:
+	add	x0, x19, x0, sxtw
+.LVL473:
+	.loc 3 124 0
+	sub	w0, w0, w20
+.LVL474:
+	ldp	x19, x20, [sp, 16]
+.LVL475:
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE201:
+	.size	rknand_proc_ftlread, .-rknand_proc_ftlread
+	.section	.text.GetSwlReplaceBlock,"ax",@progbits
+	.align	2
+	.global	GetSwlReplaceBlock
+	.type	GetSwlReplaceBlock, %function
+GetSwlReplaceBlock:
+.LFB296:
+	.loc 2 2447 0
+	.cfi_startproc
+.LVL476:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 2456 0
+	adrp	x2, .LANCHOR75
+	adrp	x10, .LANCHOR78
+	.loc 2 2447 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 2456 0
+	ldr	w3, [x2, #:lo12:.LANCHOR75]
+	ldr	w7, [x10, #:lo12:.LANCHOR78]
+	cmp	w3, w7
+	bcs	.L227
+	.loc 2 2459 0
+	adrp	x1, .LANCHOR5
+	.loc 2 2458 0
+	adrp	x0, .LANCHOR73
+	.loc 2 2459 0
+	mov	w5, 0
+	mov	w4, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR5]
+	.loc 2 2460 0
+	adrp	x1, .LANCHOR40
+	.loc 2 2458 0
+	str	wzr, [x0, #:lo12:.LANCHOR73]
+.LVL477:
+	.loc 2 2460 0
+	ldr	x6, [x1, #:lo12:.LANCHOR40]
+	.loc 2 2459 0
+	mov	x1, 0
+.LVL478:
+.L228:
+	.loc 2 2459 0 is_stmt 0 discriminator 1
+	cmp	w3, w1
+	bhi	.L229
+	cbz	w5, .L230
+	str	w4, [x0, #:lo12:.LANCHOR73]
+.L230:
+	.loc 2 2461 0 is_stmt 1
+	ldr	w1, [x0, #:lo12:.LANCHOR73]
+.LVL479:
+	udiv	w3, w1, w3
+	str	w3, [x2, #:lo12:.LANCHOR75]
+	.loc 2 2462 0
+	adrp	x3, .LANCHOR74
+	ldr	w3, [x3, #:lo12:.LANCHOR74]
+	sub	w1, w1, w3
+	adrp	x3, .LANCHOR14
+	ldrh	w3, [x3, #:lo12:.LANCHOR14]
+	udiv	w1, w1, w3
+	str	w1, [x0, #:lo12:.LANCHOR73]
+.L231:
+	.loc 2 2468 0
+	ldr	w8, [x2, #:lo12:.LANCHOR75]
+	add	w0, w7, 256
+	cmp	w0, w8
+	bls	.L236
+	.loc 2 2468 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR77
+	add	w0, w7, 768
+	ldr	w1, [x1, #:lo12:.LANCHOR77]
+	cmp	w0, w1
+	bls	.L236
+.LVL480:
+.L239:
+	.loc 2 2469 0 is_stmt 1
+	mov	w19, 65535
+.L237:
+	.loc 2 2518 0
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.LVL481:
+.L229:
+	.cfi_restore_state
+	.loc 2 2460 0 discriminator 3
+	ldrh	w5, [x6, x1, lsl 1]
+	add	x1, x1, 1
+.LVL482:
+	add	w4, w4, w5
+	mov	w5, 1
+	b	.L228
+.L227:
+	.loc 2 2463 0
+	adrp	x1, .LANCHOR77
+	ldr	w0, [x1, #:lo12:.LANCHOR77]
+	cmp	w3, w0
+	bls	.L231
+	.loc 2 2464 0
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR77]
+.LVL483:
+	.loc 2 2466 0
+	adrp	x0, .LANCHOR40
+	.loc 2 2465 0
+	adrp	x1, .LANCHOR5
+	add	x1, x1, :lo12:.LANCHOR5
+	.loc 2 2466 0
+	ldr	x4, [x0, #:lo12:.LANCHOR40]
+	.loc 2 2465 0
+	mov	w0, 0
+.LVL484:
+.L233:
+	.loc 2 2465 0 is_stmt 0 discriminator 1
+	ldrh	w3, [x1]
+	cmp	w0, w3
+	bcs	.L231
+	.loc 2 2466 0 is_stmt 1 discriminator 3
+	ubfiz	x5, x0, 1, 32
+	.loc 2 2465 0 discriminator 3
+	add	w0, w0, 1
+.LVL485:
+	.loc 2 2466 0 discriminator 3
+	ldrh	w3, [x4, x5]
+	add	w3, w3, 1
+	strh	w3, [x4, x5]
+	b	.L233
+.LVL486:
+.L236:
+	.loc 2 2471 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w0, lsl 1
+	lsr	w0, w0, 2
+	bl	GetFreeBlockMaxEraseCount
+.LVL487:
+	and	w6, w0, 65535
+.LVL488:
+	.loc 2 2472 0
+	add	w0, w7, 64
+.LVL489:
+	cmp	w6, w0
+	bcs	.L238
+	.loc 2 2472 0 is_stmt 0 discriminator 1
+	cmp	w7, 30
+	bhi	.L239
+.L238:
+	.loc 2 2476 0 is_stmt 1
+	adrp	x0, .LANCHOR42
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	cbz	x0, .L239
+	.loc 2 2483 0
+	adrp	x1, .LANCHOR41
+	.loc 2 2484 0
+	mov	w3, 65535
+	.loc 2 2483 0
+	mov	x12, -6148914691236517206
+	.loc 2 2484 0
+	mov	w2, w3
+	.loc 2 2483 0
+	ldr	x5, [x1, #:lo12:.LANCHOR41]
+	.loc 2 2484 0
+	adrp	x1, .LANCHOR40
+	.loc 2 2479 0
+	mov	w11, w3
+	.loc 2 2483 0
+	movk	x12, 0xaaab, lsl 0
+	.loc 2 2484 0
+	ldr	x1, [x1, #:lo12:.LANCHOR40]
+	.loc 2 2495 0
+	mov	w13, 6
+.LVL490:
+.L240:
+	.loc 2 2479 0
+	ldrh	w4, [x0]
+	cmp	w4, w11
+	bne	.L243
+	mov	w19, w2
+.LVL491:
+.L242:
+	.loc 2 2498 0
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L239
+	.loc 2 2500 0
+	ubfiz	x2, x19, 1, 32
+	ldrh	w5, [x1, x2]
+.LVL492:
+	.loc 2 2501 0
+	cmp	w7, w5
+	bcs	.L244
+	.loc 2 2503 0
+	bl	GetFreeBlockMinEraseCount
+.LVL493:
+	cmp	w7, w0, uxth
+	bcs	.L244
+	.loc 2 2504 0
+	str	w3, [x10, #:lo12:.LANCHOR78]
+.L244:
+	.loc 2 2506 0
+	cmp	w8, w5
+	bls	.L239
+	.loc 2 2506 0 is_stmt 0 discriminator 1
+	add	w0, w5, 128
+	cmp	w6, w0
+	ble	.L239
+	.loc 2 2508 0 is_stmt 1
+	add	w0, w5, 256
+	adrp	x1, .LANCHOR77
+	cmp	w8, w0
+	bhi	.L245
+	.loc 2 2508 0 is_stmt 0 discriminator 1
+	ldr	w3, [x1, #:lo12:.LANCHOR77]
+.LVL494:
+	add	w0, w5, 768
+	cmp	w0, w3
+	bcs	.L239
+.L245:
+	.loc 2 2510 0 is_stmt 1
+	adrp	x0, .LANCHOR43
+	ldr	w3, [x1, #:lo12:.LANCHOR77]
+	mov	w1, w19
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldrh	w4, [x0, x2]
+	mov	w2, w8
+	adrp	x0, .LC72
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+.LVL495:
+	.loc 2 2511 0
+	adrp	x0, .LANCHOR89
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR89]
+	.loc 2 2512 0
+	b	.L237
+.LVL496:
+.L243:
+	.loc 2 2481 0
+	ldrh	w14, [x0, 4]
+	cbz	w14, .L241
+	.loc 2 2483 0
+	sub	x0, x0, x5
+.LVL497:
+	asr	x0, x0, 1
+	mul	x0, x0, x12
+	and	w19, w0, 65535
+.LVL498:
+	.loc 2 2484 0
+	and	x0, x0, 65535
+	ldrh	w0, [x1, x0, lsl 1]
+	cmp	w7, w0
+	bcs	.L242
+	.loc 2 2489 0
+	cmp	w3, w0
+	bls	.L241
+	mov	w3, w0
+.LVL499:
+	.loc 2 2483 0
+	mov	w2, w19
+.LVL500:
+.L241:
+	.loc 2 2495 0
+	umaddl	x0, w4, w13, x5
+.LVL501:
+	b	.L240
+	.cfi_endproc
+.LFE296:
+	.size	GetSwlReplaceBlock, .-GetSwlReplaceBlock
+	.section	.text.free_data_superblock,"ax",@progbits
+	.align	2
+	.global	free_data_superblock
+	.type	free_data_superblock, %function
+free_data_superblock:
+.LFB297:
+	.loc 2 2522 0
+	.cfi_startproc
+.LVL502:
+	and	w0, w0, 65535
+	.loc 2 2523 0
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L259
+.LVL503:
+	.loc 2 2522 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+.LBB207:
+.LBB208:
+	.loc 2 2525 0
+	adrp	x2, .LANCHOR43
+	ubfiz	x1, x0, 1, 16
+.LBE208:
+.LBE207:
+	.loc 2 2522 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+.LBB210:
+.LBB209:
+	.loc 2 2525 0
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	strh	wzr, [x2, x1]
+	.loc 2 2526 0
+	bl	INSERT_FREE_LIST
+.LVL504:
+.LBE209:
+.LBE210:
+	.loc 2 2528 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL505:
+.L259:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE297:
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.get_new_active_ppa,"ax",@progbits
+	.align	2
+	.global	get_new_active_ppa
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+.LFB300:
+	.loc 2 2655 0
+	.cfi_startproc
+.LVL506:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	.loc 2 2659 0
+	ldrh	w1, [x0]
+	mov	w0, 65535
+.LVL507:
+	.loc 2 2655 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2659 0
+	cmp	w1, w0
+	bne	.L263
+	.loc 2 2659 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2659
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL508:
+.L263:
+	.loc 2 2660 0 is_stmt 1
+	adrp	x20, .LANCHOR19
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	cmp	w1, w0
+	bne	.L264
+	.loc 2 2660 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2660
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL509:
+.L264:
+	.loc 2 2661 0 is_stmt 1
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L265
+	.loc 2 2661 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2661
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL510:
+.L265:
+	.loc 2 2663 0 is_stmt 1
+	ldrb	w0, [x19, 6]
+	.loc 2 2666 0
+	adrp	x1, .LANCHOR3
+	.loc 2 2662 0
+	strb	wzr, [x19, 10]
+	.loc 2 2663 0
+	add	x0, x0, 8
+	.loc 2 2666 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR3]
+	.loc 2 2664 0
+	mov	w1, 65535
+	.loc 2 2663 0
+	ldrh	w0, [x19, x0, lsl 1]
+.LVL511:
+.L266:
+	.loc 2 2664 0
+	cmp	w0, w1
+	beq	.L268
+	.loc 2 2672 0
+	ldrh	w21, [x19, 2]
+	.loc 2 2680 0
+	mov	w3, 65535
+	.loc 2 2673 0
+	ldrh	w1, [x19, 4]
+	.loc 2 2672 0
+	orr	w21, w21, w0, lsl 10
+.LVL512:
+	ldrb	w0, [x19, 6]
+.LVL513:
+	.loc 2 2673 0
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+	strh	w1, [x19, 4]
+.L270:
+	.loc 2 2675 0
+	add	w0, w0, 1
+	and	w0, w0, 255
+	.loc 2 2676 0
+	cmp	w2, w0
+	bne	.L269
+	.loc 2 2677 0
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	.loc 2 2678 0
+	mov	w0, 0
+.L269:
+	.loc 2 2680 0
+	add	x4, x19, x0, sxtw 1
+	ldrh	w4, [x4, 16]
+	cmp	w4, w3
+	beq	.L270
+	strb	w0, [x19, 6]
+	.loc 2 2682 0
+	ldrh	w2, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	cmp	w2, w0
+	bne	.L262
+	.loc 2 2682 0 is_stmt 0 discriminator 1
+	cbz	w1, .L262
+	.loc 2 2682 0 discriminator 2
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LC1
+	mov	w2, 2682
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL514:
+.L262:
+	.loc 2 2684 0 is_stmt 1
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+.LVL515:
+	ldp	x19, x20, [sp, 16]
+.LVL516:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL517:
+.L268:
+	.cfi_restore_state
+	.loc 2 2665 0
+	ldrb	w0, [x19, 6]
+.LVL518:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x19, 6]
+	.loc 2 2666 0
+	cmp	w0, w2
+	bne	.L267
+	.loc 2 2667 0
+	ldrh	w0, [x19, 2]
+	.loc 2 2668 0
+	strb	wzr, [x19, 6]
+	.loc 2 2667 0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L267:
+	.loc 2 2670 0
+	ldrb	w0, [x19, 6]
+	add	x0, x0, 8
+	ldrh	w0, [x19, x0, lsl 1]
+.LVL519:
+	b	.L266
+	.cfi_endproc
+.LFE300:
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlGcBufInit,"ax",@progbits
+	.align	2
+	.global	FtlGcBufInit
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+.LFB303:
+	.file 5 "drivers/rkflash/rksftl/sftl_gc.c"
+	.loc 5 22 0
+	.cfi_startproc
+	.loc 5 27 0
+	adrp	x1, .LANCHOR92
+	.loc 5 25 0
+	adrp	x0, .LANCHOR91
+	.loc 5 28 0
+	adrp	x7, .LANCHOR93
+	.loc 5 29 0
+	adrp	x6, .LANCHOR94
+	.loc 5 27 0
+	ldr	x5, [x1, #:lo12:.LANCHOR92]
+	.loc 5 28 0
+	adrp	x1, .LANCHOR23
+	.loc 5 25 0
+	str	wzr, [x0, #:lo12:.LANCHOR91]
+.LVL520:
+	.loc 5 26 0
+	adrp	x0, .LANCHOR3
+	.loc 5 28 0
+	ldrh	w10, [x1, #:lo12:.LANCHOR23]
+	.loc 5 29 0
+	adrp	x1, .LANCHOR24
+	.loc 5 26 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	w8, 24
+	.loc 5 29 0
+	ldrh	w11, [x1, #:lo12:.LANCHOR24]
+	.loc 5 30 0
+	adrp	x1, .LANCHOR95
+	.loc 5 28 0
+	ldr	x14, [x7, #:lo12:.LANCHOR93]
+	mov	x3, x5
+	ldr	x4, [x1, #:lo12:.LANCHOR95]
+	.loc 5 26 0
+	mov	w2, 0
+	.loc 5 29 0
+	ldr	x15, [x6, #:lo12:.LANCHOR94]
+	nop // between mem op and mult-accumulate
+	umaddl	x8, w0, w8, x5
+	add	x4, x4, 8
+	.loc 5 26 0
+	mov	w1, 0
+	.loc 5 27 0
+	mov	w16, 1
+.LVL521:
+.L278:
+	add	w13, w2, w10
+	add	w12, w1, w11
+	.loc 5 26 0 discriminator 1
+	cmp	x3, x8
+	bne	.L279
+	.loc 5 34 0
+	adrp	x1, .LANCHOR96
+	.loc 5 36 0
+	ldr	x7, [x7, #:lo12:.LANCHOR93]
+	.loc 5 37 0
+	ldr	x6, [x6, #:lo12:.LANCHOR94]
+	.loc 5 35 0
+	mov	w8, 24
+	.loc 5 34 0
+	ldr	w4, [x1, #:lo12:.LANCHOR96]
+.L280:
+.LVL522:
+	.loc 5 34 0 is_stmt 0 discriminator 1
+	cmp	w0, w4
+	bcc	.L281
+	.loc 5 39 0 is_stmt 1
+	ret
+.LVL523:
+.L279:
+	.loc 5 28 0 discriminator 3
+	asr	w2, w2, 2
+	.loc 5 29 0 discriminator 3
+	asr	w1, w1, 2
+	.loc 5 28 0 discriminator 3
+	add	x2, x14, x2, sxtw 2
+	.loc 5 29 0 discriminator 3
+	add	x1, x15, x1, sxtw 2
+	.loc 5 27 0 discriminator 3
+	str	w16, [x3, 16]
+	.loc 5 29 0 discriminator 3
+	stp	x2, x1, [x3]
+	add	x3, x3, 24
+	.loc 5 31 0 discriminator 3
+	stp	x2, x1, [x4]
+	add	x4, x4, 32
+	mov	w1, w12
+	mov	w2, w13
+	b	.L278
+.LVL524:
+.L281:
+	.loc 5 35 0 discriminator 3
+	umull	x3, w0, w8
+	.loc 5 36 0 discriminator 3
+	mul	w1, w10, w0
+	.loc 5 35 0 discriminator 3
+	add	x2, x5, x3
+	.loc 5 36 0 discriminator 3
+	asr	w1, w1, 2
+	add	x1, x7, x1, sxtw 2
+	.loc 5 35 0 discriminator 3
+	str	wzr, [x2, 16]
+	.loc 5 36 0 discriminator 3
+	str	x1, [x5, x3]
+	.loc 5 37 0 discriminator 3
+	mul	w1, w11, w0
+	.loc 5 34 0 discriminator 3
+	add	w0, w0, 1
+.LVL525:
+	and	w0, w0, 65535
+.LVL526:
+	.loc 5 37 0 discriminator 3
+	asr	w1, w1, 2
+	add	x1, x6, x1, sxtw 2
+	str	x1, [x2, 8]
+	b	.L280
+	.cfi_endproc
+.LFE303:
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",@progbits
+	.align	2
+	.global	FtlGcBufFree
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+.LFB304:
+	.loc 5 42 0
+	.cfi_startproc
+.LVL527:
+	.loc 5 47 0
+	adrp	x2, .LANCHOR96
+	.loc 5 46 0
+	mov	w3, 0
+	.loc 5 48 0
+	mov	w8, 24
+	.loc 5 47 0
+	ldr	w7, [x2, #:lo12:.LANCHOR96]
+	.loc 5 48 0
+	adrp	x2, .LANCHOR92
+	ldr	x5, [x2, #:lo12:.LANCHOR92]
+.LVL528:
+.L283:
+	.loc 5 46 0 discriminator 1
+	cmp	w3, w1
+	bcs	.L282
+	.loc 5 48 0
+	ubfiz	x4, x3, 5, 16
+	mov	w2, 0
+	add	x4, x0, x4
+	b	.L288
+.LVL529:
+.L284:
+	.loc 5 47 0 discriminator 2
+	add	w2, w2, 1
+.LVL530:
+	and	w2, w2, 65535
+.LVL531:
+.L288:
+	.loc 5 47 0 is_stmt 0 discriminator 1
+	cmp	w2, w7
+	bcs	.L285
+	.loc 5 48 0 is_stmt 1
+	umull	x6, w2, w8
+	add	x10, x5, x6
+	ldr	x11, [x5, x6]
+	ldr	x6, [x4, 8]
+	cmp	x11, x6
+	bne	.L284
+	.loc 5 49 0
+	str	wzr, [x10, 16]
+.L285:
+	.loc 5 46 0 discriminator 2
+	add	w3, w3, 1
+.LVL532:
+	and	w3, w3, 65535
+.LVL533:
+	b	.L283
+.LVL534:
+.L282:
+	ret
+	.cfi_endproc
+.LFE304:
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",@progbits
+	.align	2
+	.global	FtlGcBufAlloc
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+.LFB305:
+	.loc 5 57 0
+	.cfi_startproc
+.LVL535:
+	.loc 5 62 0
+	adrp	x2, .LANCHOR96
+	.loc 5 61 0
+	mov	w3, 0
+	.loc 5 63 0
+	mov	w7, 24
+	.loc 5 64 0
+	mov	w8, 1
+	.loc 5 62 0
+	ldr	w5, [x2, #:lo12:.LANCHOR96]
+	.loc 5 63 0
+	adrp	x2, .LANCHOR92
+	ldr	x6, [x2, #:lo12:.LANCHOR92]
+.LVL536:
+.L290:
+	.loc 5 61 0 discriminator 1
+	cmp	w3, w1
+	bcs	.L289
+	mov	w2, 0
+	b	.L295
+.LVL537:
+.L291:
+	.loc 5 62 0 discriminator 2
+	add	w2, w2, 1
+.LVL538:
+	and	w2, w2, 65535
+.LVL539:
+.L295:
+	.loc 5 62 0 is_stmt 0 discriminator 1
+	cmp	w2, w5
+	bcs	.L292
+	.loc 5 63 0 is_stmt 1
+	umaddl	x4, w2, w7, x6
+	ldr	w10, [x4, 16]
+	cbnz	w10, .L291
+	.loc 5 65 0
+	ubfiz	x2, x3, 5, 16
+.LVL540:
+	ldr	x10, [x4]
+	add	x2, x0, x2
+	.loc 5 64 0
+	str	w8, [x4, 16]
+	.loc 5 66 0
+	ldr	x4, [x4, 8]
+	stp	x10, x4, [x2, 8]
+.L292:
+	.loc 5 61 0 discriminator 2
+	add	w3, w3, 1
+.LVL541:
+	and	w3, w3, 65535
+.LVL542:
+	b	.L290
+.L289:
+	ret
+	.cfi_endproc
+.LFE305:
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",@progbits
+	.align	2
+	.global	IsBlkInGcList
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+.LFB306:
+	.loc 5 74 0
+	.cfi_startproc
+.LVL543:
+	.loc 5 77 0
+	adrp	x1, .LANCHOR97
+	.loc 5 74 0
+	and	w0, w0, 65535
+	.loc 5 77 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR97]
+	.loc 5 78 0
+	adrp	x1, .LANCHOR98
+	ldr	x3, [x1, #:lo12:.LANCHOR98]
+	.loc 5 77 0
+	mov	x1, 0
+.LVL544:
+.L297:
+	.loc 5 77 0 is_stmt 0 discriminator 1
+	cmp	w2, w1, uxth
+	bhi	.L299
+	.loc 5 81 0 is_stmt 1
+	mov	w0, 0
+.LVL545:
+	ret
+.L299:
+	add	x1, x1, 1
+.LVL546:
+	.loc 5 78 0
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L297
+	.loc 5 79 0
+	mov	w0, 1
+	.loc 5 82 0
+	ret
+	.cfi_endproc
+.LFE306:
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",@progbits
+	.align	2
+	.global	FtlGcUpdatePage
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+.LFB307:
+	.loc 5 85 0
+	.cfi_startproc
+.LVL547:
+	mov	w6, w0
+	mov	w10, w1
+	mov	w8, w2
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 5 88 0
+	lsr	w0, w0, 10
+.LVL548:
+	.loc 5 85 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 5 88 0
+	bl	P2V_block_in_plane
+.LVL549:
+	and	w7, w0, 65535
+.LVL550:
+	.loc 5 91 0
+	adrp	x4, .LANCHOR97
+	.loc 5 92 0
+	adrp	x2, .LANCHOR98
+	.loc 5 91 0
+	mov	x3, 0
+	ldrh	w1, [x4, #:lo12:.LANCHOR97]
+	.loc 5 92 0
+	ldr	x5, [x2, #:lo12:.LANCHOR98]
+.LVL551:
+.L302:
+	and	w2, w3, 65535
+.LVL552:
+	.loc 5 91 0 discriminator 1
+	cmp	w2, w1
+	bcc	.L304
+	.loc 5 96 0
+	bne	.L303
+	.loc 5 97 0
+	and	x3, x3, 65535
+	strh	w0, [x5, x3, lsl 1]
+	.loc 5 98 0
+	ldrh	w0, [x4, #:lo12:.LANCHOR97]
+.LVL553:
+	add	w0, w0, 1
+	strh	w0, [x4, #:lo12:.LANCHOR97]
+.LVL554:
+	b	.L303
+.LVL555:
+.L304:
+	add	x3, x3, 1
+	.loc 5 92 0
+	add	x2, x5, x3, lsl 1
+.LVL556:
+	ldrh	w2, [x2, -2]
+	cmp	w2, w7
+	bne	.L302
+.LVL557:
+.L303:
+	.loc 5 101 0
+	adrp	x4, .LANCHOR99
+	adrp	x1, .LANCHOR100
+	mov	w3, 12
+	ldrh	w0, [x4, #:lo12:.LANCHOR99]
+	ldr	x5, [x1, #:lo12:.LANCHOR100]
+	umull	x3, w0, w3
+	.loc 5 107 0
+	add	w0, w0, 1
+	.loc 5 101 0
+	add	x7, x5, x3
+.LVL558:
+	.loc 5 102 0
+	stp	w10, w8, [x7, 4]
+	.loc 5 103 0
+	str	w6, [x5, x3]
+	.loc 5 107 0
+	strh	w0, [x4, #:lo12:.LANCHOR99]
+	.loc 5 108 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE307:
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshBlock
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+.LFB314:
+	.loc 5 345 0
+	.cfi_startproc
+.LVL559:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 5 345 0
+	and	w19, w0, 65535
+	.loc 5 347 0
+	mov	w1, w19
+	adrp	x0, .LC73
+.LVL560:
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.LVL561:
+	.loc 5 349 0
+	adrp	x3, .LANCHOR101
+	ldrh	w4, [x3, #:lo12:.LANCHOR101]
+	cmp	w19, w4
+	beq	.L307
+	.loc 5 349 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	cmp	w19, w2
+	beq	.L307
+	.loc 5 351 0 is_stmt 1
+	mov	w1, 65535
+	cmp	w4, w1
+	bne	.L308
+	.loc 5 352 0
+	strh	w19, [x3, #:lo12:.LANCHOR101]
+.L307:
+	.loc 5 356 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+.LVL562:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.L308:
+	.cfi_restore_state
+	.loc 5 353 0
+	cmp	w2, w1
+	bne	.L307
+	.loc 5 354 0
+	strh	w19, [x0, #:lo12:.LANCHOR102]
+	b	.L307
+	.cfi_endproc
+.LFE314:
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcMarkBadPhyBlk
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+.LFB315:
+	.loc 5 359 0
+	.cfi_startproc
+.LVL563:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	and	w20, w0, 65535
+	.loc 5 364 0
+	adrp	x19, .LANCHOR103
+	.loc 5 359 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 5 361 0
+	mov	w0, w20
+.LVL564:
+	bl	P2V_block_in_plane
+.LVL565:
+	.loc 5 364 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR103]
+	mov	w2, w20
+	.loc 5 361 0
+	mov	w21, w0
+.LVL566:
+	.loc 5 364 0
+	adrp	x0, .LC74
+.LVL567:
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+.LVL568:
+	.loc 5 366 0
+	mov	w0, w21
+	bl	FtlGcRefreshBlock
+.LVL569:
+	.loc 5 368 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR103]
+	.loc 5 369 0
+	adrp	x2, .LANCHOR104
+	add	x2, x2, :lo12:.LANCHOR104
+	.loc 5 368 0
+	mov	x1, 0
+.LVL570:
+.L311:
+	.loc 5 368 0 is_stmt 0 discriminator 1
+	cmp	w0, w1, uxth
+	bhi	.L313
+	.loc 5 372 0 is_stmt 1
+	cmp	w0, 15
+	bhi	.L312
+	.loc 5 373 0
+	add	w1, w0, 1
+.LVL571:
+	strh	w1, [x19, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR104
+	add	x1, x1, :lo12:.LANCHOR104
+	strh	w20, [x1, w0, sxtw 1]
+	b	.L312
+.LVL572:
+.L313:
+	add	x1, x1, 1
+.LVL573:
+	.loc 5 369 0
+	add	x3, x2, x1, lsl 1
+	ldrh	w3, [x3, -2]
+	cmp	w3, w20
+	bne	.L311
+.L312:
+	.loc 5 375 0
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+.LVL574:
+	ldp	x19, x20, [sp, 16]
+.LVL575:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE315:
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcReFreshBadBlk
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+.LFB316:
+	.loc 5 379 0
+	.cfi_startproc
+	.loc 5 380 0
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	cbz	w0, .L322
+	.loc 5 380 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR101
+	ldrh	w2, [x1, #:lo12:.LANCHOR101]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L322
+	.loc 5 379 0 is_stmt 1
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 5 381 0
+	adrp	x19, .LANCHOR105
+	ldrh	w1, [x19, #:lo12:.LANCHOR105]
+	cmp	w1, w0
+	bcc	.L317
+	.loc 5 382 0
+	strh	wzr, [x19, #:lo12:.LANCHOR105]
+.L317:
+.LBB213:
+.LBB214:
+	.loc 5 383 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR104
+	add	x0, x0, :lo12:.LANCHOR104
+	ldrh	w0, [x0, x1, lsl 1]
+	bl	P2V_block_in_plane
+.LVL576:
+	bl	FtlGcRefreshBlock
+.LVL577:
+	.loc 5 384 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR105]
+	add	w0, w0, 1
+	strh	w0, [x19, #:lo12:.LANCHOR105]
+.LBE214:
+.LBE213:
+	.loc 5 387 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+.L322:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE316:
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+.LFB337:
+	.loc 1 24 0
+	.cfi_startproc
+.LVL578:
+	.loc 1 25 0
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+.LVL579:
+	.cfi_endproc
+.LFE337:
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+.LFB338:
+	.loc 1 29 0
+	.cfi_startproc
+.LVL580:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	x22, x1
+.LVL581:
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 1 38 0
+	adrp	x24, .LC75
+	.loc 1 29 0
+	stp	x25, x26, [sp, 64]
+	mov	w23, w2
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 1 45 0
+	adrp	x25, .LC77
+	.loc 1 29 0
+	mov	x28, x0
+	mov	w27, w3
+	.loc 1 38 0
+	add	x24, x24, :lo12:.LC75
+	.loc 1 45 0
+	add	x25, x25, :lo12:.LC77
+	.loc 1 29 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 1 36 0
+	mov	w21, 0
+	mov	x19, 0
+	.loc 1 35 0
+	mov	w20, 0
+	.loc 1 43 0
+	adrp	x26, .LC76
+.LVL582:
+.L327:
+	.loc 1 36 0 discriminator 1
+	cmp	w27, w19
+	bhi	.L333
+	.loc 1 52 0
+	ldp	x19, x20, [sp, 16]
+.LVL583:
+	.loc 1 51 0
+	adrp	x0, .LC78
+	.loc 1 52 0
+	ldp	x21, x22, [sp, 32]
+.LVL584:
+	.loc 1 51 0
+	add	x0, x0, :lo12:.LC78
+	.loc 1 52 0
+	ldp	x23, x24, [sp, 48]
+.LVL585:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL586:
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 1 51 0
+	b	printf
+.LVL587:
+.L333:
+	.cfi_restore_state
+	.loc 1 37 0
+	cbnz	w20, .L328
+	.loc 1 38 0
+	mov	w2, w21
+	mov	x1, x28
+	mov	x0, x24
+	bl	printf
+.LVL588:
+.L328:
+	.loc 1 40 0
+	cmp	w23, 4
+	bne	.L329
+	.loc 1 41 0
+	ldr	w1, [x22, x19, lsl 2]
+.L336:
+	.loc 1 43 0
+	add	x0, x26, :lo12:.LC76
+.L335:
+	.loc 1 45 0
+	bl	printf
+.LVL589:
+	.loc 1 46 0
+	add	w20, w20, 1
+.LVL590:
+	cmp	w20, 15
+	bls	.L332
+.LVL591:
+	.loc 1 47 0
+	mov	w20, 0
+	.loc 1 48 0
+	adrp	x0, .LC78
+	add	x0, x0, :lo12:.LC78
+	bl	printf
+.LVL592:
+.L332:
+	add	x19, x19, 1
+.LVL593:
+	add	w21, w21, w23
+	b	.L327
+.LVL594:
+.L329:
+	.loc 1 42 0
+	cmp	w23, 2
+	bne	.L331
+	.loc 1 43 0
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L336
+.L331:
+	.loc 1 45 0
+	ldrb	w1, [x22, x19]
+	mov	x0, x25
+	b	.L335
+	.cfi_endproc
+.LFE338:
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashReadPages,"ax",@progbits
+	.align	2
+	.global	FlashReadPages
+	.type	FlashReadPages, %function
+FlashReadPages:
+.LFB340:
+	.loc 1 81 0
+	.cfi_startproc
+.LVL595:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 1 83 0
+	adrp	x2, .LANCHOR0
+.LVL596:
+	add	x3, x2, :lo12:.LANCHOR0
+	ubfiz	x1, x1, 5, 32
+.LVL597:
+	.loc 1 81 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x25, [sp, 64]
+	.cfi_offset 25, -32
+	.loc 1 83 0
+	ldrh	w25, [x3, 12]
+.LVL598:
+	.loc 1 81 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 1 88 0
+	adrp	x21, .LANCHOR106
+	.loc 1 81 0
+	stp	x23, x24, [sp, 48]
+	.loc 1 88 0
+	adrp	x22, .LC1
+	.loc 1 81 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	add	x24, x0, x1
+	mov	x19, x0
+	mov	x23, x2
+	.loc 1 88 0
+	add	x21, x21, :lo12:.LANCHOR106
+	add	x22, x22, :lo12:.LC1
+.LVL599:
+.L338:
+	.loc 1 87 0 discriminator 1
+	cmp	x19, x24
+	bne	.L345
+	.loc 1 108 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+.LVL600:
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL601:
+.L345:
+	.cfi_restore_state
+	.loc 1 88 0
+	ldr	x0, [x19, 8]
+	cbz	x0, .L339
+	.loc 1 88 0 is_stmt 0 discriminator 2
+	ldr	x0, [x19, 16]
+	cbnz	x0, .L340
+.L339:
+	.loc 1 88 0 discriminator 3
+	mov	w2, 88
+	mov	x1, x21
+	mov	x0, x22
+	bl	printf
+.LVL602:
+.L340:
+	.loc 1 89 0 is_stmt 1
+	ldr	w0, [x19, 4]
+	.loc 1 90 0
+	adrp	x20, .LANCHOR107
+	add	x20, x20, :lo12:.LANCHOR107
+	.loc 1 89 0
+	add	x2, x29, 88
+	add	x1, x29, 92
+	bl	l2p_addr_tran.isra.0
+.LVL603:
+	.loc 1 90 0
+	ldrb	w0, [x29, 88]
+	ldr	w1, [x29, 92]
+	ldp	x2, x3, [x19, 8]
+	ldr	x4, [x20, 24]
+	blr	x4
+.LVL604:
+	.loc 1 94 0
+	str	w0, [x19]
+	.loc 1 95 0
+	add	x0, x23, :lo12:.LANCHOR0
+.LVL605:
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L342
+	.loc 1 96 0
+	ldrb	w0, [x29, 88]
+	ldr	x4, [x20, 24]
+	ldp	x2, x3, [x19, 8]
+	ldr	w1, [x29, 92]
+	add	x3, x3, 8
+	add	x2, x2, 2048
+	add	w1, w25, w1
+	blr	x4
+.LVL606:
+	.loc 1 100 0
+	cmn	w0, #1
+	beq	.L343
+	.loc 1 101 0 discriminator 1
+	ldr	x0, [x19, 16]
+.LVL607:
+	.loc 1 100 0 discriminator 1
+	ldr	w1, [x0, 12]
+	cmn	w1, #1
+	bne	.L342
+	.loc 1 101 0
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	bne	.L342
+	.loc 1 102 0
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L342
+.L343:
+	.loc 1 104 0
+	mov	w0, -1
+	str	w0, [x19]
+.L342:
+	add	x19, x19, 32
+	b	.L338
+	.cfi_endproc
+.LFE340:
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadFactoryBbt
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+.LFB230:
+	.loc 4 279 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 4 286 0
+	adrp	x2, .LANCHOR39
+	adrp	x0, .LANCHOR108
+	add	x1, x0, :lo12:.LANCHOR108
+	.loc 4 279 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 4 286 0
+	ldr	x2, [x2, #:lo12:.LANCHOR39]
+	.loc 4 279 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	mov	x22, x0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 4 291 0
+	adrp	x26, .LANCHOR17
+	.loc 4 279 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 4 291 0
+	add	x28, x26, :lo12:.LANCHOR17
+	.loc 4 279 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	adrp	x20, .LANCHOR37
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	add	x20, x20, :lo12:.LANCHOR37
+	.loc 4 286 0
+	str	x2, [x1, 8]
+	.loc 4 287 0
+	adrp	x2, .LANCHOR109
+	.loc 4 289 0
+	adrp	x23, .LANCHOR10
+	add	x20, x20, 12
+	.loc 4 287 0
+	ldr	x25, [x2, #:lo12:.LANCHOR109]
+	.loc 4 289 0
+	add	x23, x23, :lo12:.LANCHOR10
+	mov	w21, 0
+	.loc 4 290 0
+	mov	w27, -1
+	.loc 4 287 0
+	str	x25, [x1, 16]
+.LVL608:
+.L357:
+	.loc 4 289 0 discriminator 1
+	ldrh	w0, [x23]
+	cmp	w21, w0
+	bcc	.L362
+	.loc 4 314 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+.LVL609:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL610:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL611:
+.L362:
+	.cfi_restore_state
+	.loc 4 291 0
+	ldrh	w19, [x26, #:lo12:.LANCHOR17]
+	.loc 4 293 0
+	add	x24, x22, :lo12:.LANCHOR108
+	.loc 4 290 0
+	strh	w27, [x20]
+	.loc 4 301 0
+	mov	w3, 61664
+	.loc 4 291 0
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.LVL612:
+.L358:
+	.loc 4 291 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x28]
+	sub	w1, w0, #15
+	cmp	w1, w19
+	bgt	.L360
+	.loc 4 292 0 is_stmt 1
+	madd	w0, w0, w21, w19
+	.loc 4 294 0
+	mov	w2, 1
+	str	w3, [x29, 108]
+.LVL613:
+	mov	w1, w2
+	.loc 4 292 0
+	lsl	w0, w0, 10
+	.loc 4 293 0
+	str	w0, [x24, 4]
+	.loc 4 294 0
+	mov	x0, x24
+	bl	FlashReadPages
+.LVL614:
+	.loc 4 295 0
+	ldr	w0, [x24]
+	ldr	w3, [x29, 108]
+	cmn	w0, #1
+	beq	.L359
+	.loc 4 301 0
+	ldrh	w0, [x25]
+	cmp	w0, w3
+	bne	.L359
+	.loc 4 303 0
+	strh	w19, [x20]
+.L360:
+	.loc 4 289 0 discriminator 2
+	add	w21, w21, 1
+.LVL615:
+	add	x20, x20, 2
+	b	.L357
+.L359:
+	.loc 4 291 0 discriminator 2
+	sub	w19, w19, #1
+.LVL616:
+	and	w19, w19, 65535
+.LVL617:
+	b	.L358
+	.cfi_endproc
+.LFE230:
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
+	.align	2
+	.global	FtlGetLastWrittenPage
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+.LFB236:
+	.loc 2 47 0
+	.cfi_startproc
+.LVL618:
+	stp	x29, x30, [sp, -160]!
+	.cfi_def_cfa_offset 160
+	.cfi_offset 29, -160
+	.cfi_offset 30, -152
+	.loc 2 51 0
+	cmp	w1, 1
+	.loc 2 47 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -112
+	.cfi_offset 24, -104
+	mov	w23, w1
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -144
+	.cfi_offset 20, -136
+	.cfi_offset 21, -128
+	.cfi_offset 22, -120
+	.loc 2 51 0
+	bne	.L368
+	.loc 2 51 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR20
+.LVL619:
+	ldrh	w19, [x1, #:lo12:.LANCHOR20]
+.L369:
+.LVL620:
+	.loc 2 56 0 is_stmt 1 discriminator 4
+	sub	w19, w19, #1
+.LVL621:
+	.loc 2 53 0 discriminator 4
+	adrp	x1, ftl_temp_buf
+	.loc 2 56 0 discriminator 4
+	sxth	w19, w19
+	.loc 2 53 0 discriminator 4
+	add	x1, x1, :lo12:ftl_temp_buf
+	.loc 2 57 0 discriminator 4
+	lsl	w21, w0, 10
+	.loc 2 53 0 discriminator 4
+	str	x1, [x29, 72]
+	.loc 2 57 0 discriminator 4
+	orr	w0, w19, w21
+.LVL622:
+	.loc 2 54 0 discriminator 4
+	add	x1, x29, 96
+	.loc 2 57 0 discriminator 4
+	str	w0, [x29, 68]
+	.loc 2 58 0 discriminator 4
+	mov	w2, w23
+	.loc 2 54 0 discriminator 4
+	str	x1, [x29, 80]
+.LVL623:
+	.loc 2 58 0 discriminator 4
+	add	x0, x29, 64
+	mov	w1, 1
+	bl	FlashReadPages
+.LVL624:
+	.loc 2 59 0 discriminator 4
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L370
+	mov	w22, 0
+	.loc 2 61 0
+	mov	w24, 2
+.LVL625:
+.L371:
+	.loc 2 60 0
+	cmp	w22, w19
+	ble	.L374
+.LVL626:
+.L370:
+	.loc 2 73 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL627:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL628:
+	ldp	x29, x30, [sp], 160
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL629:
+.L368:
+	.cfi_restore_state
+	.loc 2 51 0 discriminator 2
+	adrp	x1, .LANCHOR19
+.LVL630:
+	ldrh	w19, [x1, #:lo12:.LANCHOR19]
+	b	.L369
+.LVL631:
+.L374:
+	.loc 2 61 0
+	add	w20, w22, w19
+	.loc 2 63 0
+	mov	w2, w23
+	mov	w1, 1
+	.loc 2 61 0
+	sdiv	w20, w20, w24
+.LVL632:
+	.loc 2 62 0
+	sxth	w0, w20
+	orr	w0, w0, w21
+	str	w0, [x29, 68]
+	.loc 2 63 0
+	add	x0, x29, 64
+	bl	FlashReadPages
+.LVL633:
+	.loc 2 65 0
+	ldr	w0, [x29, 96]
+	cmn	w0, #1
+	bne	.L372
+	.loc 2 65 0 is_stmt 0 discriminator 1
+	ldr	w0, [x29, 100]
+	cmn	w0, #1
+	bne	.L372
+	.loc 2 66 0 is_stmt 1
+	sub	w19, w20, #1
+.LVL634:
+	sxth	w19, w19
+.LVL635:
+	b	.L371
+.L372:
+	.loc 2 68 0
+	add	w20, w20, 1
+.LVL636:
+	sxth	w22, w20
+.LVL637:
+	b	.L371
+	.cfi_endproc
+.LFE236:
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FlashProgPages,"ax",@progbits
+	.align	2
+	.global	FlashProgPages
+	.type	FlashProgPages, %function
+FlashProgPages:
+.LFB341:
+	.loc 1 111 0
+	.cfi_startproc
+.LVL638:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	ubfiz	x1, x1, 5, 32
+.LVL639:
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	mov	w25, w2
+	mov	w26, w3
+	.loc 1 113 0
+	adrp	x2, .LANCHOR0
+.LVL640:
+	add	x3, x2, :lo12:.LANCHOR0
+.LVL641:
+	.loc 1 111 0
+	stp	x27, x28, [sp, 80]
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	mov	x20, x0
+	stp	x21, x22, [sp, 32]
+	.loc 1 117 0
+	mov	x19, x0
+	.loc 1 113 0
+	ldrh	w27, [x3, 12]
+.LVL642:
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 1 118 0
+	adrp	x21, .LANCHOR110
+	.loc 1 111 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.loc 1 120 0
+	adrp	x22, .LANCHOR107
+	add	x24, x0, x1
+	mov	x23, x2
+	.loc 1 118 0
+	add	x21, x21, :lo12:.LANCHOR110
+	.loc 1 129 0
+	add	x28, x22, :lo12:.LANCHOR107
+.LVL643:
+.L377:
+	.loc 1 117 0 discriminator 1
+	cmp	x19, x24
+	bne	.L385
+	.loc 1 138 0
+	cbnz	w26, .L386
+.LVL644:
+.L404:
+	.loc 1 168 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL645:
+	ldp	x27, x28, [sp, 80]
+.LVL646:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL647:
+.L385:
+	.cfi_restore_state
+	.loc 1 118 0
+	ldr	x0, [x19, 8]
+	cbz	x0, .L378
+	.loc 1 118 0 is_stmt 0 discriminator 2
+	ldr	x0, [x19, 16]
+	cbnz	x0, .L379
+.L378:
+	.loc 1 118 0 discriminator 3
+	adrp	x0, .LC1
+	mov	w2, 118
+	mov	x1, x21
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL648:
+.L379:
+	.loc 1 119 0 is_stmt 1
+	ldr	w0, [x19, 4]
+	add	x2, x29, 104
+	add	x1, x29, 108
+	bl	l2p_addr_tran.isra.0
+.LVL649:
+	.loc 1 120 0
+	add	x0, x22, :lo12:.LANCHOR107
+	ldr	w1, [x29, 108]
+	ldp	x2, x3, [x19, 8]
+	ldr	x4, [x0, 16]
+	ldrb	w0, [x29, 104]
+	blr	x4
+.LVL650:
+	.loc 1 125 0
+	cbnz	w0, .L380
+	.loc 1 124 0
+	str	wzr, [x19]
+.LVL651:
+.L381:
+	.loc 1 128 0
+	add	x0, x23, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L383
+	.loc 1 129 0
+	ldrb	w0, [x29, 104]
+	ldr	x4, [x28, 16]
+	ldp	x2, x3, [x19, 8]
+	ldr	w1, [x29, 108]
+	add	x3, x3, 8
+	add	x2, x2, 2048
+	add	w1, w27, w1
+	blr	x4
+.LVL652:
+	.loc 1 133 0
+	cbz	w0, .L383
+	.loc 1 134 0
+	mov	w0, -1
+.LVL653:
+	str	w0, [x19]
+.L383:
+	add	x19, x19, 32
+	b	.L377
+.LVL654:
+.L380:
+	.loc 1 126 0
+	mov	w0, -1
+.LVL655:
+	str	w0, [x19]
+	b	.L381
+.LVL656:
+.L390:
+.LBB215:
+	.loc 1 143 0
+	str	wzr, [x22]
+	.loc 1 149 0
+	mov	w2, w25
+	.loc 1 144 0
+	str	wzr, [x24]
+	.loc 1 149 0
+	mov	w1, 1
+	.loc 1 147 0
+	stp	x22, x24, [x29, 120]
+	.loc 1 145 0
+	ldr	w0, [x20, 4]
+	str	w0, [x29, 116]
+	.loc 1 149 0
+	add	x0, x29, 112
+	bl	FlashReadPages
+.LVL657:
+	.loc 1 150 0
+	ldr	w26, [x29, 112]
+	cmn	w26, #1
+	bne	.L387
+	.loc 1 151 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+.LVL658:
+	.loc 1 152 0
+	str	w26, [x20]
+.L387:
+	.loc 1 154 0
+	ldr	x0, [x20, 16]
+	cbz	x0, .L388
+	.loc 1 155 0
+	ldr	w3, [x23, #:lo12:.LANCHOR111]
+	ldr	w2, [x0]
+	cmp	w2, w3
+	beq	.L388
+	.loc 1 156 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	printf
+.LVL659:
+	.loc 1 157 0
+	mov	w0, -1
+	str	w0, [x20]
+.L388:
+	.loc 1 160 0
+	ldr	x0, [x20, 8]
+	cbz	x0, .L389
+	.loc 1 161 0
+	ldr	w3, [x21, #:lo12:check_buf]
+	ldr	w2, [x0]
+	cmp	w2, w3
+	beq	.L389
+	.loc 1 162 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
+	bl	printf
+.LVL660:
+	.loc 1 163 0
+	mov	w0, -1
+	str	w0, [x20]
+.L389:
+	add	x20, x20, 32
+.L405:
+.LBE215:
+	.loc 1 140 0 discriminator 1
+	cmp	x20, x19
+	bne	.L390
+	b	.L404
+.LVL661:
+.L386:
+.LBB216:
+	.loc 1 143 0 discriminator 1
+	adrp	x21, check_buf
+	.loc 1 144 0 discriminator 1
+	adrp	x23, .LANCHOR111
+	.loc 1 143 0 discriminator 1
+	add	x22, x21, :lo12:check_buf
+	.loc 1 144 0 discriminator 1
+	add	x24, x23, :lo12:.LANCHOR111
+	b	.L405
+.LBE216:
+	.cfi_endproc
+.LFE341:
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashEraseBlocks,"ax",@progbits
+	.align	2
+	.global	FlashEraseBlocks
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+.LFB342:
+	.loc 1 171 0
+	.cfi_startproc
+.LVL662:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 1 174 0
+	adrp	x1, .LANCHOR0
+.LVL663:
+	add	x3, x1, :lo12:.LANCHOR0
+	ubfiz	x2, x2, 5, 32
+.LVL664:
+	.loc 1 171 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	add	x2, x2, 4
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 1 174 0
+	ldrh	w23, [x3, 12]
+.LVL665:
+	.loc 1 171 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	add	x19, x0, 4
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	mov	x20, x1
+	.loc 1 179 0
+	adrp	x21, .LANCHOR107
+	add	x22, x0, x2
+	.loc 1 184 0
+	add	x24, x21, :lo12:.LANCHOR107
+.LVL666:
+.L408:
+	.loc 1 177 0 discriminator 1
+	cmp	x19, x22
+	bne	.L414
+	.loc 1 190 0
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL667:
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL668:
+.L414:
+	.cfi_restore_state
+	.loc 1 178 0
+	ldr	w0, [x19]
+	add	x2, x29, 72
+	add	x1, x29, 76
+	bl	l2p_addr_tran.isra.0
+.LVL669:
+	.loc 1 179 0
+	add	x0, x21, :lo12:.LANCHOR107
+	ldr	w1, [x29, 76]
+	ldr	x2, [x0, 8]
+	ldrb	w0, [x29, 72]
+	blr	x2
+.LVL670:
+	.loc 1 181 0
+	cbnz	w0, .L409
+	.loc 1 180 0
+	str	wzr, [x19, -4]
+.LVL671:
+.L410:
+	.loc 1 183 0
+	add	x0, x20, :lo12:.LANCHOR0
+	ldrh	w0, [x0, 14]
+	cmp	w0, 4
+	bne	.L412
+	.loc 1 184 0
+	ldrb	w0, [x29, 72]
+	ldr	x2, [x24, 8]
+	ldr	w1, [x29, 76]
+	add	w1, w23, w1
+	blr	x2
+.LVL672:
+	.loc 1 185 0
+	cbz	w0, .L412
+	.loc 1 186 0
+	mov	w0, -1
+.LVL673:
+	str	w0, [x19, -4]
+.L412:
+	add	x19, x19, 32
+	b	.L408
+.LVL674:
+.L409:
+	.loc 1 182 0
+	mov	w0, -1
+.LVL675:
+	str	w0, [x19, -4]
+	b	.L410
+	.cfi_endproc
+.LFE342:
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueIn
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+.LFB240:
+	.loc 2 98 0
+	.cfi_startproc
+.LVL676:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	and	w21, w0, 65535
+.LBB217:
+.LBB218:
+	.loc 2 94 0
+	adrp	x0, .LANCHOR38
+.LVL677:
+	add	x2, x0, :lo12:.LANCHOR38
+.LBE218:
+.LBE217:
+	.loc 2 98 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 99 0
+	ldrh	w2, [x2, 6]
+	cmp	w2, 1024
+	beq	.L419
+	and	w1, w1, 65535
+	mov	x19, x0
+.LVL678:
+.LBB219:
+	.loc 2 101 0
+	cbz	w1, .L421
+.LBB220:
+	.loc 2 102 0
+	mov	w0, w21
+	bl	P2V_block_in_plane
+.LVL679:
+	and	w20, w0, 65535
+.LVL680:
+	.loc 2 103 0
+	adrp	x0, .LANCHOR112
+.LVL681:
+	lsl	w1, w21, 10
+	.loc 2 104 0
+	mov	w2, 1
+	.loc 2 103 0
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	str	w1, [x0, 4]
+	.loc 2 104 0
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL682:
+	.loc 2 105 0
+	adrp	x1, .LANCHOR40
+	ubfiz	x0, x20, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR40]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	.loc 2 106 0
+	adrp	x1, .LANCHOR76
+	ldr	w0, [x1, #:lo12:.LANCHOR76]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.LVL683:
+.L421:
+.LBE220:
+	.loc 2 108 0
+	add	x0, x19, :lo12:.LANCHOR38
+	ldrh	w1, [x0, 6]
+	add	w1, w1, 1
+	strh	w1, [x0, 6]
+	.loc 2 109 0
+	ldrh	w1, [x0, 4]
+	add	x2, x0, x1, sxtw 1
+	.loc 2 110 0
+	add	w1, w1, 1
+	and	w1, w1, 1023
+	strh	w1, [x0, 4]
+	.loc 2 109 0
+	strh	w21, [x2, 8]
+.LVL684:
+.L419:
+.LBE219:
+	.loc 2 113 0
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+.LVL685:
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE240:
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlLowFormatEraseBlock
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+.LFB209:
+	.loc 3 528 0
+	.cfi_startproc
+.LVL686:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	.loc 3 541 0
+	adrp	x7, .LANCHOR13
+	add	x7, x7, :lo12:.LANCHOR13
+	.loc 3 539 0
+	mov	x5, 0
+	.loc 3 528 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	and	w24, w0, 65535
+	.loc 3 538 0
+	adrp	x0, .LANCHOR113
+.LVL687:
+	.loc 3 528 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	and	w23, w1, 255
+	.loc 3 538 0
+	str	w24, [x0, #:lo12:.LANCHOR113]
+.LVL688:
+	.loc 3 551 0
+	adrp	x0, .LANCHOR115
+	.loc 3 550 0
+	adrp	x1, .LANCHOR114
+.LVL689:
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 3 539 0
+	adrp	x20, .LANCHOR3
+	.loc 3 540 0
+	adrp	x21, .LANCHOR112
+	.loc 3 551 0
+	ldr	x11, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR24
+	.loc 3 539 0
+	ldrh	w8, [x20, #:lo12:.LANCHOR3]
+	.loc 3 540 0
+	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	.loc 3 536 0
+	mov	w22, 0
+	.loc 3 550 0
+	ldr	x10, [x1, #:lo12:.LANCHOR114]
+	.loc 3 537 0
+	mov	w19, 0
+	.loc 3 551 0
+	ldrh	w12, [x0, #:lo12:.LANCHOR24]
+	.loc 3 528 0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	stp	x0, x1, [x29, 120]
+.LVL690:
+.L430:
+	.loc 3 539 0 discriminator 1
+	cmp	w8, w5, uxth
+	bhi	.L434
+	.loc 3 559 0
+	cbz	w22, .L429
+	.loc 3 562 0
+	mov	w2, w22
+	ubfiz	x22, x22, 5, 16
+.LVL691:
+	mov	x25, 0
+	mov	w1, 0
+	mov	x0, x6
+	bl	FlashEraseBlocks
+.LVL692:
+.L438:
+	.loc 3 564 0
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	add	x1, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L437
+	.loc 3 566 0
+	ldr	w0, [x1, 4]
+	.loc 3 565 0
+	add	w19, w19, 1
+.LVL693:
+	and	w19, w19, 65535
+.LVL694:
+	.loc 3 566 0
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL695:
+.L437:
+	add	x25, x25, 32
+	.loc 3 563 0 discriminator 2
+	cmp	x25, x22
+	bne	.L438
+	.loc 3 571 0
+	cbz	w23, .L451
+.LVL696:
+	.loc 3 573 0
+	adrp	x0, .LANCHOR20
+	.loc 3 572 0
+	mov	w25, 1
+	.loc 3 573 0
+	ldrh	w26, [x0, #:lo12:.LANCHOR20]
+.LVL697:
+	.loc 3 574 0
+	lsr	w28, w26, 2
+.LVL698:
+.L439:
+	.loc 3 578 0
+	add	x0, x20, :lo12:.LANCHOR3
+	.loc 3 580 0
+	adrp	x27, .LANCHOR13
+	.loc 3 578 0
+	str	x0, [x29, 136]
+	mov	w22, 0
+	.loc 3 580 0
+	add	x0, x27, :lo12:.LANCHOR13
+	str	x0, [x29, 112]
+.LVL699:
+.L447:
+	.loc 3 578 0
+	ldr	x0, [x29, 136]
+	mov	x5, 0
+	.loc 3 579 0
+	ldr	x6, [x21, #:lo12:.LANCHOR112]
+	.loc 3 577 0
+	mov	w20, 0
+	.loc 3 578 0
+	ldrh	w7, [x0]
+	.loc 3 587 0
+	adrp	x0, .LANCHOR116
+	ldr	x8, [x0, #:lo12:.LANCHOR116]
+	.loc 3 588 0
+	ldr	x0, [x29, 128]
+	ldr	x10, [x0, #:lo12:.LANCHOR114]
+	ldr	x0, [x29, 120]
+	ldrh	w11, [x0, #:lo12:.LANCHOR24]
+.LVL700:
+.L440:
+	.loc 3 578 0 discriminator 1
+	cmp	w7, w5, uxth
+	bhi	.L443
+	.loc 3 593 0
+	cbz	w20, .L429
+	.loc 3 596 0
+	mov	w1, w20
+	mov	w3, 1
+	mov	w2, w25
+	mov	x0, x6
+	bl	FlashProgPages
+.LVL701:
+	mov	x27, 0
+	ubfiz	x1, x20, 5, 16
+.LVL702:
+.L446:
+	.loc 3 598 0
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	add	x3, x0, x27
+	ldr	w0, [x0, x27]
+	cbz	w0, .L445
+	.loc 3 600 0
+	ldr	w0, [x3, 4]
+	.loc 3 599 0
+	add	w19, w19, 1
+.LVL703:
+	str	x1, [x29, 104]
+	and	w19, w19, 65535
+.LVL704:
+	.loc 3 600 0
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL705:
+	ldr	x1, [x29, 104]
+.L445:
+	add	x27, x27, 32
+	.loc 3 597 0 discriminator 2
+	cmp	x1, x27
+	bne	.L446
+	.loc 3 604 0
+	add	w22, w22, w28
+.LVL706:
+	and	w22, w22, 65535
+.LVL707:
+	.loc 3 605 0
+	cmp	w26, w22
+	bhi	.L447
+	mov	x22, 0
+.LVL708:
+.L449:
+	.loc 3 611 0
+	cbz	w23, .L448
+	.loc 3 611 0 is_stmt 0 discriminator 1
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	cbnz	w0, .L448
+	.loc 3 612 0 is_stmt 1
+	ldr	w0, [x1, 4]
+	mov	w1, 1
+	lsr	w0, w0, 10
+	bl	FtlFreeSysBlkQueueIn
+.LVL709:
+.L448:
+	add	x22, x22, 32
+	.loc 3 610 0 discriminator 2
+	cmp	x22, x27
+	bne	.L449
+	.loc 3 615 0
+	cmp	w24, 63
+	ccmp	w23, 0, 0, hi
+	beq	.L429
+	.loc 3 616 0
+	ldr	x0, [x21, #:lo12:.LANCHOR112]
+	mov	w2, w20
+	mov	w1, w25
+	bl	FlashEraseBlocks
+.LVL710:
+.L429:
+	.loc 3 619 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+.LVL711:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL712:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL713:
+.L434:
+	.cfi_restore_state
+	.loc 3 540 0
+	lsl	x0, x5, 5
+	.loc 3 541 0
+	mov	w1, w24
+	.loc 3 540 0
+	str	wzr, [x6, x0]
+	.loc 3 541 0
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+.LVL714:
+	and	w13, w0, 65535
+	mov	w14, w13
+.LVL715:
+	.loc 3 543 0
+	cbz	w23, .L431
+	.loc 3 544 0
+	bl	IsBlkInVendorPart
+.LVL716:
+	cbnz	w0, .L432
+.L431:
+	.loc 3 548 0
+	mov	w0, w14
+	bl	FtlBbmIsBadBlock
+.LVL717:
+	cbnz	w0, .L433
+	.loc 3 549 0
+	ubfiz	x0, x22, 5, 16
+	.loc 3 551 0
+	mul	w1, w22, w12
+	.loc 3 549 0
+	add	x0, x6, x0
+	.loc 3 552 0
+	add	w22, w22, 1
+.LVL718:
+	and	w22, w22, 65535
+.LVL719:
+	.loc 3 549 0
+	lsl	w13, w13, 10
+.LVL720:
+	.loc 3 551 0
+	asr	w1, w1, 2
+	add	x1, x11, x1, sxtw 2
+	.loc 3 549 0
+	str	w13, [x0, 4]
+	.loc 3 551 0
+	stp	x10, x1, [x0, 8]
+.L432:
+.LVL721:
+	add	x5, x5, 1
+.LVL722:
+	b	.L430
+.LVL723:
+.L433:
+	.loc 3 554 0
+	add	w19, w19, 1
+.LVL724:
+	and	w19, w19, 65535
+.LVL725:
+	b	.L432
+.LVL726:
+.L451:
+	.loc 3 534 0
+	mov	w25, 0
+	.loc 3 533 0
+	mov	w28, 6
+	.loc 3 531 0
+	mov	w26, 1
+	b	.L439
+.LVL727:
+.L443:
+	.loc 3 579 0
+	lsl	x0, x5, 5
+	.loc 3 580 0
+	mov	w1, w24
+	.loc 3 579 0
+	str	wzr, [x6, x0]
+	.loc 3 580 0
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, x5]
+	bl	V2P_block
+.LVL728:
+	and	w12, w0, 65535
+	mov	w13, w12
+.LVL729:
+	.loc 3 581 0
+	cbz	w23, .L441
+	.loc 3 582 0
+	bl	IsBlkInVendorPart
+.LVL730:
+	cbnz	w0, .L442
+.L441:
+	.loc 3 585 0
+	mov	w0, w13
+	bl	FtlBbmIsBadBlock
+.LVL731:
+	cbnz	w0, .L442
+	.loc 3 586 0
+	ubfiz	x0, x20, 5, 16
+	.loc 3 588 0
+	mul	w1, w20, w11
+	.loc 3 586 0
+	add	x0, x6, x0
+	.loc 3 589 0
+	add	w20, w20, 1
+.LVL732:
+	and	w20, w20, 65535
+.LVL733:
+	.loc 3 586 0
+	add	w12, w22, w12, lsl 10
+.LVL734:
+	.loc 3 588 0
+	asr	w1, w1, 2
+	add	x1, x10, x1, sxtw 2
+	.loc 3 586 0
+	str	w12, [x0, 4]
+	.loc 3 588 0
+	stp	x8, x1, [x0, 8]
+.L442:
+.LVL735:
+	add	x5, x5, 1
+.LVL736:
+	b	.L440
+	.cfi_endproc
+.LFE209:
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.ftl_memset,"ax",@progbits
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+.LFB345:
+	.loc 1 238 0
+	.cfi_startproc
+.LVL737:
+	.loc 1 239 0
+	uxtw	x2, w2
+	b	memset
+.LVL738:
+	.cfi_endproc
+.LFE345:
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.FtlMemInit,"ax",@progbits
+	.align	2
+	.global	FtlMemInit
+	.type	FtlMemInit, %function
+FtlMemInit:
+.LFB206:
+	.loc 3 279 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -208]!
+	.cfi_def_cfa_offset 208
+	.cfi_offset 29, -208
+	.cfi_offset 30, -200
+	.loc 3 282 0
+	adrp	x0, .LANCHOR71
+	.loc 3 297 0
+	mov	w1, 65535
+	.loc 3 279 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 282 0
+	str	wzr, [x0, #:lo12:.LANCHOR71]
+	.loc 3 283 0
+	adrp	x0, .LANCHOR72
+	.loc 3 279 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -192
+	.cfi_offset 20, -184
+	.loc 3 310 0
+	adrp	x19, .LANCHOR21
+	.loc 3 283 0
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+	.loc 3 284 0
+	adrp	x0, .LANCHOR68
+	.loc 3 279 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -176
+	.cfi_offset 22, -168
+	.loc 3 312 0
+	adrp	x22, .LANCHOR3
+	.loc 3 284 0
+	str	wzr, [x0, #:lo12:.LANCHOR68]
+	.loc 3 285 0
+	adrp	x0, .LANCHOR65
+	.loc 3 279 0
+	stp	x23, x24, [sp, 48]
+	.loc 3 319 0
+	adrp	x21, .LANCHOR23
+	.loc 3 285 0
+	str	wzr, [x0, #:lo12:.LANCHOR65]
+	.loc 3 286 0
+	adrp	x0, .LANCHOR64
+	.loc 3 279 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -160
+	.cfi_offset 24, -152
+	.cfi_offset 25, -144
+	.cfi_offset 26, -136
+	.loc 3 330 0
+	adrp	x24, .LANCHOR109
+	.loc 3 286 0
+	str	wzr, [x0, #:lo12:.LANCHOR64]
+	.loc 3 287 0
+	adrp	x0, .LANCHOR66
+	.loc 3 279 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -128
+	.cfi_offset 28, -120
+	.loc 3 331 0
+	adrp	x23, .LANCHOR115
+	.loc 3 287 0
+	str	wzr, [x0, #:lo12:.LANCHOR66]
+	.loc 3 288 0
+	adrp	x0, .LANCHOR67
+	.loc 3 349 0
+	adrp	x25, .LANCHOR43
+	.loc 3 351 0
+	adrp	x27, .LANCHOR129
+	.loc 3 288 0
+	str	wzr, [x0, #:lo12:.LANCHOR67]
+	.loc 3 289 0
+	adrp	x0, .LANCHOR63
+	.loc 3 352 0
+	adrp	x26, .LANCHOR130
+	.loc 3 289 0
+	str	wzr, [x0, #:lo12:.LANCHOR63]
+	.loc 3 290 0
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
+	.loc 3 291 0
+	adrp	x0, .LANCHOR74
+	str	wzr, [x0, #:lo12:.LANCHOR74]
+	.loc 3 292 0
+	adrp	x0, .LANCHOR76
+	str	wzr, [x0, #:lo12:.LANCHOR76]
+	.loc 3 293 0
+	adrp	x0, .LANCHOR77
+	str	wzr, [x0, #:lo12:.LANCHOR77]
+	.loc 3 294 0
+	adrp	x0, .LANCHOR78
+	str	wzr, [x0, #:lo12:.LANCHOR78]
+	.loc 3 295 0
+	adrp	x0, .LANCHOR117
+	str	wzr, [x0, #:lo12:.LANCHOR117]
+	.loc 3 296 0
+	adrp	x0, .LANCHOR89
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+	.loc 3 297 0
+	adrp	x0, .LANCHOR118
+	str	w1, [x0, #:lo12:.LANCHOR118]
+	.loc 3 298 0
+	adrp	x0, .LANCHOR119
+	.loc 3 301 0
+	adrp	x1, .LANCHOR101
+	.loc 3 298 0
+	str	wzr, [x0, #:lo12:.LANCHOR119]
+	.loc 3 299 0
+	adrp	x0, .LANCHOR86
+	str	wzr, [x0, #:lo12:.LANCHOR86]
+	.loc 3 300 0
+	adrp	x0, .LANCHOR113
+	str	wzr, [x0, #:lo12:.LANCHOR113]
+	.loc 3 301 0
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR101]
+	.loc 3 302 0
+	adrp	x1, .LANCHOR102
+	strh	w0, [x1, #:lo12:.LANCHOR102]
+	.loc 3 303 0
+	adrp	x0, .LANCHOR84
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	.loc 3 304 0
+	adrp	x0, .LANCHOR85
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR85]
+	.loc 3 305 0
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	.loc 3 306 0
+	adrp	x0, .LANCHOR103
+	strh	wzr, [x0, #:lo12:.LANCHOR103]
+	.loc 3 307 0
+	adrp	x0, .LANCHOR105
+	strh	wzr, [x0, #:lo12:.LANCHOR105]
+	.loc 3 310 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR21]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+.LVL739:
+	adrp	x1, .LANCHOR98
+	str	x0, [x1, #:lo12:.LANCHOR98]
+	.loc 3 311 0
+	mov	w0, 12
+	ldrh	w1, [x19, #:lo12:.LANCHOR21]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+.LVL740:
+	.loc 3 312 0
+	ldrh	w19, [x22, #:lo12:.LANCHOR3]
+	.loc 3 311 0
+	adrp	x3, .LANCHOR100
+	str	x3, [x29, 104]
+	.loc 3 312 0
+	lsl	w20, w19, 5
+.LVL741:
+	.loc 3 313 0
+	lsl	w19, w19, 7
+	.loc 3 311 0
+	str	x0, [x3, #:lo12:.LANCHOR100]
+	.loc 3 313 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL742:
+	adrp	x15, .LANCHOR120
+	str	x15, [x29, 112]
+	str	x0, [x15, #:lo12:.LANCHOR120]
+	.loc 3 314 0
+	mov	w0, w20
+	bl	ftl_malloc
+.LVL743:
+	adrp	x11, .LANCHOR121
+	str	x11, [x29, 120]
+	str	x0, [x11, #:lo12:.LANCHOR121]
+	.loc 3 315 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL744:
+	adrp	x14, .LANCHOR122
+	str	x14, [x29, 128]
+	str	x0, [x14, #:lo12:.LANCHOR122]
+	.loc 3 316 0
+	mov	w0, w20
+	bl	ftl_malloc
+.LVL745:
+	adrp	x13, .LANCHOR112
+	str	x13, [x29, 136]
+	str	x0, [x13, #:lo12:.LANCHOR112]
+	.loc 3 317 0
+	mov	w0, w20
+	bl	ftl_malloc
+.LVL746:
+	.loc 3 320 0
+	adrp	x20, .LANCHOR96
+.LVL747:
+	.loc 3 317 0
+	adrp	x12, .LANCHOR95
+	.loc 3 319 0
+	ldrh	w19, [x21, #:lo12:.LANCHOR23]
+.LVL748:
+	.loc 3 317 0
+	str	x12, [x29, 144]
+	str	x0, [x12, #:lo12:.LANCHOR95]
+	.loc 3 320 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR3]
+	lsl	w0, w0, 1
+	add	w0, w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR96]
+	.loc 3 321 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL749:
+	adrp	x10, .LANCHOR39
+	str	x10, [x29, 152]
+	str	x0, [x10, #:lo12:.LANCHOR39]
+	.loc 3 322 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL750:
+	adrp	x8, .LANCHOR123
+	str	x8, [x29, 160]
+	str	x0, [x8, #:lo12:.LANCHOR123]
+	.loc 3 323 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL751:
+	adrp	x7, .LANCHOR124
+	str	x7, [x29, 168]
+	str	x0, [x7, #:lo12:.LANCHOR124]
+	.loc 3 324 0
+	ldr	w0, [x20, #:lo12:.LANCHOR96]
+	mul	w0, w19, w0
+	bl	ftl_malloc
+.LVL752:
+	adrp	x6, .LANCHOR93
+	str	x6, [x29, 176]
+	str	x0, [x6, #:lo12:.LANCHOR93]
+	.loc 3 325 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL753:
+	adrp	x5, .LANCHOR116
+	str	x5, [x29, 184]
+	str	x0, [x5, #:lo12:.LANCHOR116]
+	.loc 3 326 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL754:
+	.loc 3 329 0
+	adrp	x19, .LANCHOR24
+.LVL755:
+	.loc 3 326 0
+	adrp	x4, .LANCHOR114
+	.loc 3 327 0
+	ldr	w2, [x20, #:lo12:.LANCHOR96]
+	.loc 3 326 0
+	str	x4, [x29, 192]
+	str	x0, [x4, #:lo12:.LANCHOR114]
+	.loc 3 327 0
+	mov	w0, 24
+	mul	w0, w2, w0
+	bl	ftl_malloc
+.LVL756:
+	.loc 3 329 0
+	ldrh	w28, [x19, #:lo12:.LANCHOR24]
+	.loc 3 327 0
+	adrp	x1, .LANCHOR92
+	str	x0, [x1, #:lo12:.LANCHOR92]
+	.loc 3 329 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR3]
+	.loc 3 332 0
+	adrp	x22, .LANCHOR94
+	.loc 3 329 0
+	mul	w28, w28, w0
+.LVL757:
+	.loc 3 330 0
+	mov	w0, w28
+	bl	ftl_malloc
+.LVL758:
+	str	x0, [x24, #:lo12:.LANCHOR109]
+	.loc 3 331 0
+	lsl	w0, w28, 2
+	bl	ftl_malloc
+.LVL759:
+	str	x0, [x23, #:lo12:.LANCHOR115]
+	.loc 3 332 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR24]
+	.loc 3 335 0
+	adrp	x28, .LANCHOR125
+.LVL760:
+	.loc 3 332 0
+	ldr	w0, [x20, #:lo12:.LANCHOR96]
+	.loc 3 335 0
+	adrp	x20, .LANCHOR6
+	.loc 3 332 0
+	mul	w0, w1, w0
+	bl	ftl_malloc
+.LVL761:
+	str	x0, [x22, #:lo12:.LANCHOR94]
+	.loc 3 335 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	ubfiz	w0, w0, 1, 15
+	strh	w0, [x28, #:lo12:.LANCHOR125]
+	.loc 3 336 0
+	and	w0, w0, 65534
+	bl	ftl_malloc
+.LVL762:
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
+	.loc 3 337 0
+	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	add	x0, x0, 547
+	lsr	x0, x0, 9
+	strh	w0, [x28, #:lo12:.LANCHOR125]
+	.loc 3 338 0
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+.LVL763:
+	adrp	x1, .LANCHOR127
+	.loc 3 345 0
+	ldrh	w28, [x20, #:lo12:.LANCHOR6]
+	.loc 3 338 0
+	str	x0, [x1, #:lo12:.LANCHOR127]
+	.loc 3 339 0
+	adrp	x1, .LANCHOR40
+	.loc 3 345 0
+	lsl	w28, w28, 1
+	.loc 3 339 0
+	add	x0, x0, 32
+	str	x0, [x1, #:lo12:.LANCHOR40]
+.LVL764:
+	.loc 3 347 0
+	mov	w0, w28
+	bl	ftl_malloc
+.LVL765:
+	adrp	x1, .LANCHOR128
+	str	x0, [x1, #:lo12:.LANCHOR128]
+	.loc 3 349 0
+	mov	w0, w28
+	.loc 3 350 0
+	adrp	x28, .LANCHOR30
+.LVL766:
+	.loc 3 349 0
+	bl	ftl_malloc
+.LVL767:
+	str	x0, [x25, #:lo12:.LANCHOR43]
+.LVL768:
+	.loc 3 350 0
+	ldr	w1, [x28, #:lo12:.LANCHOR30]
+	lsl	w19, w1, 1
+	.loc 3 351 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL769:
+	str	x0, [x27, #:lo12:.LANCHOR129]
+	.loc 3 352 0
+	mov	w0, w19
+	bl	ftl_malloc
+.LVL770:
+	str	x0, [x26, #:lo12:.LANCHOR130]
+	.loc 3 353 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR6]
+	.loc 3 354 0
+	adrp	x19, .LANCHOR27
+	.loc 3 353 0
+	lsr	w0, w0, 3
+	add	w0, w0, 4
+	bl	ftl_malloc
+.LVL771:
+	adrp	x1, .LANCHOR1
+	str	x0, [x1, #:lo12:.LANCHOR1]
+	.loc 3 354 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+.LVL772:
+	adrp	x2, .LANCHOR36
+	str	x0, [x2, #:lo12:.LANCHOR36]
+	.loc 3 355 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+.LVL773:
+	adrp	x2, .LANCHOR131
+	str	x0, [x2, #:lo12:.LANCHOR131]
+	.loc 3 356 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	adrp	x19, .LANCHOR40
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+.LVL774:
+	adrp	x1, .LANCHOR132
+	str	x0, [x1, #:lo12:.LANCHOR132]
+	.loc 3 357 0
+	adrp	x1, .LANCHOR28
+	str	x1, [x29, 200]
+	ldrh	w0, [x1, #:lo12:.LANCHOR28]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+.LVL775:
+	.loc 3 358 0
+	ldr	x1, [x29, 200]
+	.loc 3 357 0
+	adrp	x2, .LANCHOR133
+	str	x0, [x2, #:lo12:.LANCHOR133]
+	.loc 3 358 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR28]
+	mov	w1, 0
+	lsl	w2, w2, 2
+	bl	ftl_memset
+.LVL776:
+	.loc 3 360 0
+	adrp	x0, .LANCHOR32
+	ldrh	w0, [x0, #:lo12:.LANCHOR32]
+	.loc 3 361 0
+	lsl	w0, w0, 2
+.LVL777:
+	bl	ftl_malloc
+.LVL778:
+	adrp	x1, .LANCHOR134
+	str	x0, [x1, #:lo12:.LANCHOR134]
+.LVL779:
+	.loc 3 362 0
+	ldr	w0, [x28, #:lo12:.LANCHOR30]
+	.loc 3 364 0
+	adrp	x28, .LANCHOR33
+	.loc 3 363 0
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+.LVL780:
+	adrp	x1, .LANCHOR135
+	str	x0, [x1, #:lo12:.LANCHOR135]
+.LVL781:
+	.loc 3 364 0
+	ldrh	w0, [x28, #:lo12:.LANCHOR33]
+	.loc 3 365 0
+	lsl	w0, w0, 4
+.LVL782:
+	bl	ftl_malloc
+.LVL783:
+	adrp	x1, .LANCHOR56
+	str	x0, [x1, #:lo12:.LANCHOR56]
+.LVL784:
+	.loc 3 366 0
+	ldrh	w1, [x28, #:lo12:.LANCHOR33]
+	ldrh	w0, [x21, #:lo12:.LANCHOR23]
+	.loc 3 371 0
+	adrp	x21, .LANCHOR10
+	.loc 3 367 0
+	mul	w0, w1, w0
+.LVL785:
+	bl	ftl_malloc
+.LVL786:
+	adrp	x1, .LANCHOR136
+	str	x0, [x1, #:lo12:.LANCHOR136]
+.LVL787:
+	.loc 3 369 0
+	mov	w0, 6
+	.loc 3 368 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR6]
+	.loc 3 370 0
+	adrp	x20, .LANCHOR137
+	.loc 3 369 0
+	mul	w0, w1, w0
+.LVL788:
+	bl	ftl_malloc
+.LVL789:
+	adrp	x1, .LANCHOR41
+	str	x0, [x1, #:lo12:.LANCHOR41]
+	.loc 3 370 0
+	adrp	x0, .LANCHOR17
+	.loc 3 371 0
+	ldrh	w1, [x21, #:lo12:.LANCHOR10]
+	.loc 3 370 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR17]
+	add	w0, w0, 31
+	asr	w0, w0, 5
+	strh	w0, [x20, #:lo12:.LANCHOR137]
+.LVL790:
+	.loc 3 371 0
+	mul	w0, w1, w0
+.LVL791:
+	.loc 3 372 0
+	lsl	w0, w0, 2
+.LVL792:
+	bl	ftl_malloc
+.LVL793:
+	ldp	x3, x15, [x29, 104]
+	adrp	x1, .LANCHOR37
+	.loc 3 374 0
+	ldrh	w20, [x20, #:lo12:.LANCHOR137]
+	.loc 3 372 0
+	add	x2, x1, :lo12:.LANCHOR37
+	ldp	x11, x14, [x29, 120]
+	.loc 3 373 0
+	mov	w30, w20
+	ldp	x13, x12, [x29, 136]
+	mov	x16, x3
+	ldp	x10, x8, [x29, 152]
+	.loc 3 372 0
+	str	x0, [x2, 32]
+.LVL794:
+	ldp	x7, x6, [x29, 168]
+	adrp	x17, .LANCHOR98
+	ldp	x5, x4, [x29, 184]
+	adrp	x3, .LANCHOR92
+	.loc 3 373 0
+	ldrh	w28, [x21, #:lo12:.LANCHOR10]
+	add	x21, x2, 40
+	mov	x0, 1
+	str	x19, [x29, 200]
+.LVL795:
+.L474:
+	.loc 3 373 0 is_stmt 0 discriminator 1
+	cmp	w0, w28
+	bcc	.L475
+	mov	w2, 8
+	sub	w2, w2, w0
+	add	x2, x2, 1
+	.loc 3 379 0 is_stmt 1
+	add	x1, x1, :lo12:.LANCHOR37
+	.loc 3 373 0
+	mov	x19, 0
+.L476:
+	add	x19, x19, 1
+	.loc 3 377 0 discriminator 1
+	cmp	x19, x2
+	bne	.L477
+	.loc 3 383 0
+	ldr	x0, [x27, #:lo12:.LANCHOR129]
+	cbnz	x0, .L478
+.L480:
+	.loc 3 385 0
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC82
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC82
+	bl	printf
+.LVL796:
+	.loc 3 386 0
+	mov	w0, -1
+.L473:
+	.loc 3 484 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L475:
+	.cfi_restore_state
+	.loc 3 374 0 discriminator 3
+	ldr	x19, [x2, 32]
+	.loc 3 373 0 discriminator 3
+	add	w0, w0, 1
+	.loc 3 374 0 discriminator 3
+	add	x19, x19, x30, uxtw 2
+	add	w30, w30, w20
+	str	x19, [x21], 8
+	b	.L474
+.L477:
+	.loc 3 379 0 discriminator 2
+	add	x20, x0, x19
+	add	x20, x1, x20, lsl 3
+	str	xzr, [x20, 24]
+	b	.L476
+.L478:
+	.loc 3 388 0
+	ldr	x0, [x26, #:lo12:.LANCHOR130]
+	cbz	x0, .L480
+	.loc 3 393 0
+	adrp	x0, .LANCHOR134
+	ldr	x0, [x0, #:lo12:.LANCHOR134]
+	cbz	x0, .L480
+	.loc 3 398 0
+	adrp	x0, .LANCHOR135
+	ldr	x0, [x0, #:lo12:.LANCHOR135]
+	cbz	x0, .L480
+	.loc 3 404 0
+	adrp	x0, .LANCHOR56
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	cbz	x0, .L480
+	.loc 3 409 0
+	adrp	x0, .LANCHOR136
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	cbz	x0, .L480
+	.loc 3 414 0
+	adrp	x0, .LANCHOR41
+	ldr	x0, [x0, #:lo12:.LANCHOR41]
+	cbz	x0, .L480
+	.loc 3 419 0
+	adrp	x0, .LANCHOR37+32
+	ldr	x0, [x0, #:lo12:.LANCHOR37+32]
+	cbz	x0, .L480
+	.loc 3 425 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	cbz	x0, .L480
+	.loc 3 430 0
+	ldr	x0, [x17, #:lo12:.LANCHOR98]
+	cbz	x0, .L480
+	.loc 3 430 0 is_stmt 0 discriminator 1
+	ldr	x0, [x16, #:lo12:.LANCHOR100]
+	cbz	x0, .L480
+	.loc 3 435 0 is_stmt 1
+	ldr	x0, [x15, #:lo12:.LANCHOR120]
+	cbz	x0, .L480
+	.loc 3 435 0 is_stmt 0 discriminator 1
+	ldr	x0, [x14, #:lo12:.LANCHOR122]
+	cbz	x0, .L480
+	.loc 3 435 0 discriminator 2
+	ldr	x0, [x13, #:lo12:.LANCHOR112]
+	cbz	x0, .L480
+	.loc 3 435 0 discriminator 3
+	ldr	x0, [x12, #:lo12:.LANCHOR95]
+	cbz	x0, .L480
+	.loc 3 435 0 discriminator 4
+	ldr	x0, [x11, #:lo12:.LANCHOR121]
+	cbz	x0, .L480
+	.loc 3 440 0 is_stmt 1
+	ldr	x0, [x10, #:lo12:.LANCHOR39]
+	cbz	x0, .L480
+	.loc 3 440 0 is_stmt 0 discriminator 1
+	ldr	x0, [x8, #:lo12:.LANCHOR123]
+	cbz	x0, .L480
+	.loc 3 440 0 discriminator 2
+	ldr	x0, [x7, #:lo12:.LANCHOR124]
+	cbz	x0, .L480
+	.loc 3 440 0 discriminator 3
+	ldr	x0, [x6, #:lo12:.LANCHOR93]
+	cbz	x0, .L480
+	.loc 3 441 0 is_stmt 1
+	ldr	x0, [x5, #:lo12:.LANCHOR116]
+	cbz	x0, .L480
+	.loc 3 441 0 is_stmt 0 discriminator 1
+	ldr	x0, [x4, #:lo12:.LANCHOR114]
+	cbz	x0, .L480
+	.loc 3 441 0 discriminator 2
+	ldr	x0, [x3, #:lo12:.LANCHOR92]
+	cbz	x0, .L480
+	.loc 3 446 0 is_stmt 1
+	ldr	x0, [x24, #:lo12:.LANCHOR109]
+	cbz	x0, .L480
+	.loc 3 446 0 is_stmt 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR115]
+	cbz	x0, .L480
+	.loc 3 446 0 discriminator 2
+	ldr	x0, [x22, #:lo12:.LANCHOR94]
+	cbz	x0, .L480
+	.loc 3 452 0 is_stmt 1
+	ldr	x0, [x29, 200]
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	cbz	x0, .L480
+	.loc 3 452 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR126
+	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	cbz	x0, .L480
+	.loc 3 458 0 is_stmt 1
+	adrp	x0, .LANCHOR36
+	ldr	x0, [x0, #:lo12:.LANCHOR36]
+	cbz	x0, .L480
+	.loc 3 464 0
+	adrp	x0, .LANCHOR131
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	cbz	x0, .L480
+	.loc 3 470 0
+	adrp	x0, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	cbz	x0, .L480
+	.loc 3 476 0
+	adrp	x0, .LANCHOR133
+	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	cbz	x0, .L480
+	.loc 3 483 0
+	mov	w0, 0
+	b	.L473
+	.cfi_endproc
+.LFE206:
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.FtlBbt2Bitmap,"ax",@progbits
+	.align	2
+	.global	FtlBbt2Bitmap
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+.LFB225:
+	.loc 4 66 0
+	.cfi_startproc
+.LVL797:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	mov	x22, x0
+	.loc 4 69 0
+	adrp	x0, .LANCHOR137
+.LVL798:
+	.loc 4 66 0
+	stp	x23, x24, [sp, 48]
+	.loc 4 74 0
+	adrp	x21, .LANCHOR17
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	adrp	x23, .LANCHOR139
+	.loc 4 69 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR137]
+	.loc 4 74 0
+	add	x21, x21, :lo12:.LANCHOR17
+	add	x23, x23, :lo12:.LANCHOR139
+	.loc 4 66 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 4 72 0
+	mov	w24, 65535
+	.loc 4 69 0
+	mov	x19, 0
+	.loc 4 66 0
+	mov	x20, x1
+	.loc 4 69 0
+	lsl	w2, w2, 2
+	mov	w1, 0
+.LVL799:
+	mov	x0, x20
+	bl	ftl_memset
+.LVL800:
+.L578:
+	.loc 4 72 0
+	ldrh	w0, [x22, x19]
+	cmp	w0, w24
+	beq	.L575
+	.loc 4 74 0
+	ldrh	w1, [x21]
+	cmp	w1, w0
+	bhi	.L577
+	.loc 4 74 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 74
+	mov	x1, x23
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL801:
+.L577:
+	.loc 4 75 0 is_stmt 1 discriminator 2
+	ldrh	w2, [x22, x19]
+	mov	w1, 1
+	add	x19, x19, 2
+	.loc 4 70 0 discriminator 2
+	cmp	x19, 1024
+	.loc 4 75 0 discriminator 2
+	ubfx	x0, x2, 5, 11
+	lsl	w2, w1, w2
+	lsl	x0, x0, 2
+	ldr	w1, [x20, x0]
+	orr	w1, w1, w2
+	str	w1, [x20, x0]
+	.loc 4 70 0 discriminator 2
+	bne	.L578
+.L575:
+	.loc 4 77 0
+	ldp	x19, x20, [sp, 16]
+.LVL802:
+	ldp	x21, x22, [sp, 32]
+.LVL803:
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE225:
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",@progbits
+	.align	2
+	.global	FtlBbtMemInit
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+.LFB227:
+	.loc 4 149 0
+	.cfi_startproc
+	.loc 4 150 0
+	adrp	x1, .LANCHOR37
+	add	x0, x1, :lo12:.LANCHOR37
+	mov	w2, -1
+	.loc 4 152 0
+	add	x0, x0, 12
+	.loc 4 150 0
+	strh	w2, [x1, #:lo12:.LANCHOR37]
+	.loc 4 152 0
+	mov	w2, 16
+	.loc 4 151 0
+	strh	wzr, [x0, -6]
+	.loc 4 152 0
+	mov	w1, 255
+	b	ftl_memset
+.LVL804:
+	.cfi_endproc
+.LFE227:
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueInit
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+.LFB237:
+	.loc 2 76 0
+	.cfi_startproc
+.LVL805:
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 79 0
+	adrp	x1, .LANCHOR38
+	add	x3, x1, :lo12:.LANCHOR38
+	.loc 2 83 0
+	mov	w2, 2048
+	.loc 2 76 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 82 0
+	strh	w0, [x1, #:lo12:.LANCHOR38]
+	.loc 2 83 0
+	mov	w1, 0
+	.loc 2 79 0
+	strh	wzr, [x3, 2]
+	.loc 2 83 0
+	add	x0, x3, 8
+.LVL806:
+	.loc 2 80 0
+	strh	wzr, [x3, 4]
+	.loc 2 81 0
+	strh	wzr, [x3, 6]
+	.loc 2 83 0
+	bl	ftl_memset
+.LVL807:
+	.loc 2 85 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE237:
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
+.LFB253:
+	.loc 2 442 0
+	.cfi_startproc
+.LVL808:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 2 446 0
+	adrp	x23, .LANCHOR32
+	.loc 2 442 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	and	x19, x1, 65535
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	and	w21, w0, 65535
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 446 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR32]
+.LVL809:
+	cmp	w0, w21
+	bcs	.L586
+	.loc 2 446 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR140
+.LVL810:
+	adrp	x0, .LC1
+	mov	w2, 446
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL811:
+.L586:
+	.loc 2 447 0 is_stmt 1
+	adrp	x26, .LANCHOR134
+	ubfiz	x0, x21, 2, 16
+	adrp	x22, .LANCHOR56
+	ldr	x1, [x26, #:lo12:.LANCHOR134]
+	ldr	w24, [x1, x0]
+.LVL812:
+	.loc 2 449 0
+	cbnz	w24, .L587
+	.loc 2 450 0
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 4
+.LVL813:
+	adrp	x1, .LANCHOR23
+	add	x0, x0, x19
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+.LVL814:
+	.loc 2 451 0
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	add	x1, x0, x19
+	strh	w21, [x0, x19]
+	.loc 2 452 0
+	str	wzr, [x1, 4]
+.L588:
+	.loc 2 473 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL815:
+	ldp	x23, x24, [sp, 48]
+.LVL816:
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL817:
+.L587:
+	.cfi_restore_state
+	.loc 2 456 0
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 4
+	.loc 2 455 0
+	adrp	x20, .LANCHOR108
+	add	x20, x20, :lo12:.LANCHOR108
+	.loc 2 456 0
+	add	x0, x0, x19
+	.loc 2 458 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 2 455 0
+	str	w24, [x20, 4]
+	.loc 2 456 0
+	ldr	x0, [x0, 8]
+	str	x0, [x20, 8]
+	.loc 2 457 0
+	adrp	x0, .LANCHOR109
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	str	x0, [x20, 16]
+	.loc 2 458 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL818:
+	.loc 2 459 0
+	ldr	x25, [x20, 16]
+.LVL819:
+	.loc 2 461 0
+	ldrh	w0, [x25, 8]
+	cmp	w0, w21
+	beq	.L589
+	.loc 2 462 0
+	mov	w2, w24
+	mov	w1, w21
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
+	bl	printf
+.LVL820:
+	.loc 2 463 0
+	ldr	x1, [x20, 16]
+	mov	w3, 4
+	adrp	x0, .LC84
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC84
+	bl	rknand_print_hex
+.LVL821:
+	.loc 2 464 0
+	ldrh	w3, [x23, #:lo12:.LANCHOR32]
+	adrp	x0, .LC85
+	ldr	x1, [x26, #:lo12:.LANCHOR134]
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC85
+	bl	rknand_print_hex
+.LVL822:
+.L589:
+	.loc 2 467 0
+	ldrh	w0, [x25, 8]
+	cmp	w0, w21
+	beq	.L590
+	.loc 2 467 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR140
+	adrp	x0, .LC1
+	mov	w2, 467
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL823:
+.L590:
+	.loc 2 470 0 is_stmt 1
+	ldr	x0, [x22, #:lo12:.LANCHOR56]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	.loc 2 471 0
+	strh	w21, [x0, x19]
+	.loc 2 472 0
+	b	.L588
+	.cfi_endproc
+.LFE253:
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
+	.align	2
+	.global	ftl_free_no_use_map_blk
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+.LFB254:
+	.loc 2 476 0
+	.cfi_startproc
+.LVL824:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 2 485 0
+	mov	w1, 0
+	.loc 2 476 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	x19, x0
+	.loc 2 485 0
+	ldrh	w2, [x0, 10]
+	.loc 2 476 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 478 0
+	ldp	x21, x20, [x0, 32]
+	.loc 2 476 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 2 485 0
+	lsl	w2, w2, 1
+	.loc 2 477 0
+	ldr	x23, [x0, 16]
+.LVL825:
+	.loc 2 485 0
+	mov	x0, x21
+.LVL826:
+	bl	ftl_memset
+.LVL827:
+	.loc 2 486 0
+	mov	w0, 0
+.LVL828:
+.L593:
+	.loc 2 486 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x19, 6]
+	cmp	w1, w0
+	bhi	.L597
+	.loc 2 494 0 is_stmt 1
+	ldrh	w26, [x21]
+.LVL829:
+	.loc 2 498 0
+	adrp	x24, .LANCHOR20
+	add	x24, x24, :lo12:.LANCHOR20
+	.loc 2 495 0
+	mov	w25, 0
+	.loc 2 497 0
+	mov	w20, 0
+.LVL830:
+.L598:
+	.loc 2 497 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bhi	.L602
+	.loc 2 513 0 is_stmt 1
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+.LVL831:
+	ldp	x21, x22, [sp, 32]
+.LVL832:
+	ldp	x23, x24, [sp, 48]
+.LVL833:
+	ldp	x25, x26, [sp, 64]
+.LVL834:
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL835:
+.L597:
+	.cfi_restore_state
+	.loc 2 487 0
+	ubfiz	x1, x0, 2, 16
+	ldr	w2, [x20, x1]
+	.loc 2 488 0
+	mov	w1, 0
+	.loc 2 487 0
+	ubfx	x2, x2, 10, 16
+.LVL836:
+.L594:
+	.loc 2 488 0 discriminator 1
+	ldrh	w3, [x19, 10]
+	cmp	w3, w1
+	bhi	.L596
+	.loc 2 486 0 discriminator 2
+	add	w0, w0, 1
+.LVL837:
+	and	w0, w0, 65535
+.LVL838:
+	b	.L593
+.L596:
+	.loc 2 489 0
+	ubfiz	x3, x1, 1, 16
+	ldrh	w4, [x23, x3]
+	cmp	w4, w2
+	bne	.L595
+	.loc 2 490 0
+	ldrh	w4, [x21, x3]
+	add	w4, w4, 1
+	strh	w4, [x21, x3]
+.L595:
+	.loc 2 488 0 discriminator 2
+	add	w1, w1, 1
+.LVL839:
+	and	w1, w1, 65535
+.LVL840:
+	b	.L594
+.LVL841:
+.L602:
+	.loc 2 498 0
+	ldrh	w0, [x19]
+	uxtw	x22, w20
+	cmp	w0, w20
+	bne	.L599
+	.loc 2 498 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x24]
+	ldrh	w1, [x19, 2]
+	cmp	w1, w0
+	bcs	.L599
+	.loc 2 499 0 is_stmt 1
+	strh	w0, [x21, x22, lsl 1]
+.L599:
+	.loc 2 500 0
+	lsl	x22, x22, 1
+	ldrh	w0, [x21, x22]
+	cmp	w26, w0
+	bls	.L600
+	mov	w25, w20
+.LVL842:
+	mov	w26, w0
+.LVL843:
+.L600:
+	.loc 2 504 0
+	cbnz	w0, .L601
+	.loc 2 504 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x23, x22]
+	cbz	w0, .L601
+	.loc 2 506 0 is_stmt 1
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+.LVL844:
+	.loc 2 507 0
+	strh	wzr, [x23, x22]
+	.loc 2 508 0
+	ldrh	w0, [x19, 8]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+.L601:
+	.loc 2 497 0 discriminator 2
+	add	w20, w20, 1
+.LVL845:
+	and	w20, w20, 65535
+.LVL846:
+	b	.L598
+	.cfi_endproc
+.LFE254:
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+.LFB257:
+	.loc 2 583 0
+	.cfi_startproc
+.LVL847:
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	.loc 2 591 0
+	mov	w1, 65535
+	.loc 2 583 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	mov	x19, x0
+	.loc 2 586 0
+	ldr	x20, [x0, 16]
+.LVL848:
+	.loc 2 583 0
+	stp	x21, x22, [sp, 32]
+	.loc 2 591 0
+	ldrh	w0, [x0]
+.LVL849:
+	.loc 2 583 0
+	str	x23, [sp, 48]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.cfi_offset 23, -16
+	.loc 2 591 0
+	cmp	w0, w1
+	bne	.L608
+	.loc 2 592 0
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L609
+	.loc 2 592 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR141
+	adrp	x0, .LC1
+	mov	w2, 592
+	add	x1, x1, :lo12:.LANCHOR141
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL850:
+.L609:
+	.loc 2 593 0 is_stmt 1
+	ldrh	w0, [x19, 8]
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+	.loc 2 594 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL851:
+	strh	w0, [x20]
+	.loc 2 597 0
+	ldr	w0, [x19, 48]
+	.loc 2 595 0
+	strh	wzr, [x19, 2]
+	.loc 2 597 0
+	add	w0, w0, 1
+	.loc 2 596 0
+	strh	wzr, [x19]
+	.loc 2 597 0
+	str	w0, [x19, 48]
+.LVL852:
+.L610:
+	.loc 2 628 0
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+.LVL853:
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL854:
+.L608:
+	.cfi_restore_state
+	.loc 2 601 0
+	ubfiz	x0, x0, 1, 16
+	.loc 2 604 0
+	adrp	x1, .LANCHOR109
+	.loc 2 603 0
+	adrp	x23, .LANCHOR39
+	.loc 2 587 0
+	ldr	x22, [x19, 40]
+	.loc 2 604 0
+	ldr	x1, [x1, #:lo12:.LANCHOR109]
+	.loc 2 601 0
+	ldrh	w21, [x20, x0]
+	.loc 2 602 0
+	adrp	x20, .LANCHOR108
+.LVL855:
+	ldrh	w0, [x19, 2]
+	add	x2, x20, :lo12:.LANCHOR108
+	orr	w0, w0, w21, lsl 10
+	str	w0, [x2, 4]
+	.loc 2 603 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 604 0
+	str	x1, [x2, 16]
+.LVL856:
+	.loc 2 603 0
+	str	x0, [x2, 8]
+	.loc 2 607 0
+	ldr	w2, [x19, 48]
+	str	w2, [x1, 4]
+	.loc 2 608 0
+	mov	w2, -1291
+	strh	w2, [x1, 8]
+	.loc 2 609 0
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1]
+	.loc 2 610 0
+	strh	w21, [x1, 2]
+	.loc 2 612 0
+	adrp	x1, .LANCHOR20
+.LVL857:
+	ldrh	w2, [x1, #:lo12:.LANCHOR20]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+.LVL858:
+	.loc 2 614 0
+	ldrh	w4, [x19, 6]
+	mov	x1, 0
+	.loc 2 617 0
+	ldr	x3, [x23, #:lo12:.LANCHOR39]
+	.loc 2 613 0
+	mov	w2, 0
+.LVL859:
+.L611:
+	.loc 2 614 0 discriminator 1
+	cmp	w4, w1, uxth
+	bhi	.L613
+	.loc 2 621 0
+	mov	w2, 1
+.LVL860:
+	mov	w3, 0
+	mov	w1, w2
+.LVL861:
+	add	x0, x20, :lo12:.LANCHOR108
+	bl	FlashProgPages
+.LVL862:
+	.loc 2 622 0
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	.loc 2 626 0
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+.LVL863:
+	.loc 2 627 0
+	b	.L610
+.LVL864:
+.L613:
+	.loc 2 615 0
+	ldr	w0, [x22, x1, lsl 2]
+	cmp	w21, w0, lsr 10
+	bne	.L612
+	.loc 2 616 0
+	add	w2, w2, 1
+.LVL865:
+	and	w2, w2, 65535
+.LVL866:
+	.loc 2 617 0
+	ubfiz	x0, x2, 1, 16
+	str	w1, [x3, x0, lsl 2]
+	.loc 2 618 0
+	add	x0, x0, 1
+	ldr	w5, [x22, x1, lsl 2]
+	str	w5, [x3, x0, lsl 2]
+.L612:
+.LVL867:
+	add	x1, x1, 1
+.LVL868:
+	b	.L611
+	.cfi_endproc
+.LFE257:
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
+	.align	2
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+.LFB258:
+	.loc 2 631 0
+	.cfi_startproc
+.LVL869:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 637 0
+	adrp	x23, .LANCHOR67
+	.loc 2 631 0
+	stp	x25, x26, [sp, 64]
+	.loc 2 650 0
+	adrp	x24, .LANCHOR142
+	.loc 2 631 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 638 0
+	adrp	x26, .LANCHOR20
+	.loc 2 631 0
+	stp	x19, x20, [sp, 16]
+	mov	w25, w1
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x19, x0
+	mov	x27, x2
+	.loc 2 637 0
+	add	x23, x23, :lo12:.LANCHOR67
+	.loc 2 650 0
+	add	x24, x24, :lo12:.LANCHOR142
+	.loc 2 671 0
+	add	x28, x26, :lo12:.LANCHOR20
+	.loc 2 631 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 2 634 0
+	mov	w22, 0
+.LVL870:
+.L619:
+	.loc 2 637 0
+	ldr	w0, [x23]
+	.loc 2 638 0
+	ldrh	w1, [x19, 2]
+	.loc 2 637 0
+	add	w0, w0, 1
+	str	w0, [x23]
+	.loc 2 638 0
+	ldrh	w0, [x26, #:lo12:.LANCHOR20]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bge	.L620
+	.loc 2 638 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L621
+.L620:
+	.loc 2 639 0 is_stmt 1
+	mov	x0, x19
+	bl	Ftl_write_map_blk_to_last_page
+.LVL871:
+.L621:
+	.loc 2 650 0
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L622
+	.loc 2 650 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 650
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL872:
+.L622:
+	.loc 2 651 0 is_stmt 1
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L623
+	.loc 2 651 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 651
+	mov	x1, x24
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL873:
+.L623:
+	.loc 2 652 0 is_stmt 1
+	ldrh	w1, [x19]
+	.loc 2 654 0
+	adrp	x21, .LANCHOR108
+	.loc 2 652 0
+	ldr	x0, [x19, 16]
+	.loc 2 654 0
+	add	x20, x21, :lo12:.LANCHOR108
+	.loc 2 658 0
+	mov	w2, 16
+	.loc 2 652 0
+	ldrh	w3, [x0, x1, lsl 1]
+.LVL874:
+	.loc 2 658 0
+	mov	w1, 0
+	.loc 2 654 0
+	ldrh	w0, [x19, 2]
+	str	w3, [x29, 108]
+	.loc 2 655 0
+	str	x27, [x20, 8]
+	.loc 2 654 0
+	orr	w0, w0, w3, lsl 10
+	str	w0, [x20, 4]
+	.loc 2 656 0
+	adrp	x0, .LANCHOR109
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	str	x0, [x20, 16]
+	.loc 2 658 0
+	bl	ftl_memset
+.LVL875:
+	.loc 2 659 0
+	ldr	x0, [x20, 16]
+.LVL876:
+	.loc 2 660 0
+	ldr	w1, [x19, 48]
+	.loc 2 663 0
+	ldr	w3, [x29, 108]
+	.loc 2 660 0
+	str	w1, [x0, 4]
+	.loc 2 662 0
+	ldrh	w1, [x19, 4]
+	strh	w1, [x0]
+	.loc 2 663 0
+	strh	w3, [x0, 2]
+	.loc 2 664 0
+	mov	w3, 1
+	.loc 2 661 0
+	strh	w25, [x0, 8]
+	.loc 2 664 0
+	mov	w1, w3
+	mov	w2, w3
+	mov	x0, x20
+.LVL877:
+	bl	FlashProgPages
+.LVL878:
+	.loc 2 665 0
+	ldrh	w0, [x19, 2]
+	.loc 2 667 0
+	ldr	w1, [x21, #:lo12:.LANCHOR108]
+	.loc 2 665 0
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	.loc 2 667 0
+	cmn	w1, #1
+	bne	.L624
+	.loc 2 668 0
+	ldr	w1, [x20, 4]
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	.loc 2 669 0
+	add	w22, w22, 1
+.LVL879:
+	and	w22, w22, 65535
+	.loc 2 668 0
+	bl	printf
+.LVL880:
+	.loc 2 670 0
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L625
+	.loc 2 671 0
+	ldrh	w0, [x28]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L625:
+	.loc 2 673 0
+	cmp	w22, 3
+	bls	.L626
+	.loc 2 674 0
+	add	x21, x21, :lo12:.LANCHOR108
+	adrp	x0, .LC87
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC87
+	ldr	w1, [x21, 4]
+	bl	printf
+.LVL881:
+.L627:
+	b	.L627
+.L626:
+	.loc 2 678 0
+	ldr	w0, [x19, 52]
+	cbz	w0, .L619
+.L636:
+	b	.L636
+.L624:
+	.loc 2 682 0
+	cmp	w0, 1
+	beq	.L619
+	.loc 2 685 0
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
+	.loc 2 687 0
+	ldp	x21, x22, [sp, 32]
+.LVL882:
+	ldp	x23, x24, [sp, 48]
+	ldp	x27, x28, [sp, 80]
+.LVL883:
+	.loc 2 685 0
+	str	w1, [x0, w25, uxtw 2]
+	.loc 2 687 0
+	ldp	x19, x20, [sp, 16]
+.LVL884:
+	mov	w0, 0
+	ldp	x25, x26, [sp, 64]
+.LVL885:
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL886:
+	ret
+	.cfi_endproc
+.LFE258:
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+.LFB256:
+	.loc 2 537 0
+	.cfi_startproc
+.LVL887:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	adrp	x23, .LANCHOR20
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 2 541 0
+	ldr	x20, [x0, 16]
+.LVL888:
+	.loc 2 542 0
+	ldr	x24, [x0, 40]
+.LVL889:
+	.loc 2 545 0
+	bl	ftl_free_no_use_map_blk
+.LVL890:
+	.loc 2 547 0
+	ldrh	w1, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w1, #4
+	cmp	w2, w1
+	blt	.L639
+	.loc 2 548 0
+	ubfiz	x0, x0, 1, 16
+.LVL891:
+	ldrh	w21, [x20, x0]
+.LVL892:
+	.loc 2 549 0
+	cbz	w21, .L639
+	.loc 2 549 0 is_stmt 0 discriminator 1
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L639
+	.loc 2 550 0 is_stmt 1
+	mov	w1, 1
+	str	w1, [x19, 52]
+	.loc 2 551 0
+	strh	wzr, [x20, x0]
+	.loc 2 552 0
+	ldrh	w0, [x19, 8]
+	.loc 2 553 0
+	ldrh	w1, [x19, 2]
+	.loc 2 552 0
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+	.loc 2 553 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L640
+	.loc 2 554 0
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.LVL893:
+.L640:
+	.loc 2 558 0 discriminator 1
+	adrp	x25, .LANCHOR108
+	.loc 2 564 0 discriminator 1
+	adrp	x22, .LANCHOR143
+	.loc 2 565 0 discriminator 1
+	add	x26, x25, :lo12:.LANCHOR108
+	.loc 2 564 0 discriminator 1
+	add	x22, x22, :lo12:.LANCHOR143
+	.loc 2 537 0 discriminator 1
+	mov	w20, 0
+.LVL894:
+.L641:
+	.loc 2 556 0 discriminator 1
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L645
+	.loc 2 572 0
+	mov	w1, 1
+	mov	w0, w21
+	bl	FtlFreeSysBlkQueueIn
+.LVL895:
+	.loc 2 573 0
+	str	wzr, [x19, 52]
+.LVL896:
+.L639:
+	.loc 2 577 0
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x23, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bcc	.L646
+	.loc 2 578 0
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.LVL897:
+.L646:
+	.loc 2 580 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL898:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL899:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL900:
+.L645:
+	.cfi_restore_state
+	.loc 2 557 0
+	ubfiz	x27, x20, 2, 16
+	ldr	w1, [x24, x27]
+	cmp	w21, w1, lsr 10
+	bne	.L642
+	.loc 2 558 0
+	adrp	x2, .LANCHOR123
+	add	x0, x25, :lo12:.LANCHOR108
+	ldr	x2, [x2, #:lo12:.LANCHOR123]
+	str	x2, [x0, 8]
+	.loc 2 559 0
+	adrp	x2, .LANCHOR109
+	.loc 2 560 0
+	str	w1, [x0, 4]
+	.loc 2 559 0
+	ldr	x28, [x2, #:lo12:.LANCHOR109]
+.LVL901:
+	.loc 2 562 0
+	mov	w2, 1
+	.loc 2 559 0
+	str	x28, [x0, 16]
+	.loc 2 562 0
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL902:
+	.loc 2 564 0
+	ldrh	w0, [x28, 8]
+	cmp	w0, w20
+	beq	.L643
+	.loc 2 564 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 564
+	mov	x1, x22
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL903:
+.L643:
+	.loc 2 565 0 is_stmt 1
+	ldr	w0, [x26]
+	cmn	w0, #1
+	bne	.L644
+	.loc 2 566 0
+	str	wzr, [x24, x27]
+.LVL904:
+.L642:
+	.loc 2 556 0 discriminator 2
+	add	w20, w20, 1
+.LVL905:
+	and	w20, w20, 65535
+.LVL906:
+	b	.L641
+.LVL907:
+.L644:
+	.loc 2 568 0
+	ldr	x2, [x26, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+.LVL908:
+	b	.L642
+	.cfi_endproc
+.LFE256:
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+.LFB259:
+	.loc 2 690 0
+	.cfi_startproc
+.LVL909:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 693 0
+	adrp	x20, .LANCHOR56
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+.LVL910:
+	add	x1, x0, x19
+.LVL911:
+	.loc 2 694 0
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+.LVL912:
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapWritePage
+.LVL913:
+	.loc 2 695 0
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	add	x0, x0, x19
+	.loc 2 697 0
+	ldp	x19, x20, [sp, 16]
+	.loc 2 695 0
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
+	.loc 2 697 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE259:
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+.LFB262:
+	.loc 2 753 0
+	.cfi_startproc
+.LVL914:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	mov	x23, x1
+	.loc 2 756 0
+	adrp	x1, .LANCHOR22
+.LVL915:
+	.loc 2 753 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	w24, w2
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 756 0
+	ldrh	w19, [x1, #:lo12:.LANCHOR22]
+	.loc 2 753 0
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 2 756 0
+	add	w1, w19, 7
+	.loc 2 757 0
+	mov	x19, 1
+	.loc 2 756 0
+	lsr	w22, w0, w1
+	and	w22, w22, 65535
+.LVL916:
+	.loc 2 757 0
+	lsl	x19, x19, x1
+	.loc 2 759 0
+	adrp	x1, .LANCHOR62
+	.loc 2 757 0
+	sub	w19, w19, #1
+	.loc 2 759 0
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	.loc 2 757 0
+	and	w19, w19, w0
+	and	x19, x19, 65535
+.LVL917:
+	.loc 2 759 0
+	cmp	w0, w1
+	bcc	.L654
+	.loc 2 759 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR145
+	adrp	x0, .LC1
+.LVL918:
+	mov	w2, 759
+.LVL919:
+	add	x1, x1, :lo12:.LANCHOR145
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL920:
+.L654:
+	.loc 2 762 0 is_stmt 1
+	adrp	x21, .LANCHOR56
+	.loc 2 761 0
+	adrp	x0, .LANCHOR33
+	.loc 2 762 0
+	ldr	x2, [x21, #:lo12:.LANCHOR56]
+	.loc 2 761 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR33]
+	mov	x0, 0
+.LVL921:
+.L655:
+	and	x20, x0, 65535
+.LVL922:
+	.loc 2 761 0 is_stmt 0 discriminator 1
+	cmp	w20, w1
+	bcc	.L660
+	.loc 2 776 0 is_stmt 1
+	bl	select_l2p_ram_region
+.LVL923:
+	and	x20, x0, 65535
+.LVL924:
+	.loc 2 777 0
+	ldr	x2, [x21, #:lo12:.LANCHOR56]
+	ubfiz	x1, x20, 4, 16
+	.loc 2 776 0
+	mov	w25, w0
+	.loc 2 777 0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L661
+	.loc 2 777 0 is_stmt 0 discriminator 1
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L661
+	.loc 2 778 0 is_stmt 1
+	bl	flush_l2p_region
+.LVL925:
+.L661:
+	.loc 2 781 0
+	mov	w1, w25
+	mov	w0, w22
+	bl	load_l2p_region
+.LVL926:
+	.loc 2 782 0
+	b	.L656
+.LVL927:
+.L660:
+	add	x0, x0, 1
+	.loc 2 762 0
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L655
+.LVL928:
+.L656:
+	.loc 2 765 0
+	ldr	x0, [x21, #:lo12:.LANCHOR56]
+	add	x0, x0, x20, lsl 4
+	.loc 2 764 0
+	cbnz	w24, .L657
+	.loc 2 765 0
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x19, lsl 2]
+	str	w0, [x23]
+.L658:
+	.loc 2 771 0
+	ldr	x0, [x21, #:lo12:.LANCHOR56]
+	add	x20, x0, x20, lsl 4
+.LVL929:
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L663
+	.loc 2 772 0
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L663:
+	.loc 2 783 0
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+.LVL930:
+	ldp	x21, x22, [sp, 32]
+.LVL931:
+	ldp	x23, x24, [sp, 48]
+.LVL932:
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL933:
+.L657:
+	.cfi_restore_state
+	.loc 2 767 0
+	ldr	x1, [x0, 8]
+	ldr	w2, [x23]
+	str	w2, [x1, x19, lsl 2]
+	.loc 2 768 0
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	.loc 2 769 0
+	adrp	x0, .LANCHOR57
+	strh	w22, [x0, #:lo12:.LANCHOR57]
+	b	.L658
+	.cfi_endproc
+.LFE262:
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+.LFB280:
+	.loc 2 1628 0
+	.cfi_startproc
+.LVL934:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 2 1631 0
+	adrp	x22, .LANCHOR43
+	.loc 2 1628 0
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	.loc 2 1629 0
+	lsr	w0, w1, 10
+.LVL935:
+	.loc 2 1628 0
+	str	x23, [sp, 48]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 23, -32
+	.loc 2 1629 0
+	bl	P2V_block_in_plane
+.LVL936:
+	.loc 2 1631 0
+	ldr	x2, [x22, #:lo12:.LANCHOR43]
+	.loc 2 1629 0
+	and	w3, w0, 65535
+.LVL937:
+	.loc 2 1631 0
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L669
+	.loc 2 1632 0
+	adrp	x0, .LANCHOR47
+.LVL938:
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+	cbz	x19, .L670
+.LBB221:
+	.loc 2 1636 0
+	adrp	x2, .LANCHOR41
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	.loc 2 1635 0
+	adrp	x23, .LANCHOR48
+	.loc 2 1636 0
+	ldr	x2, [x2, #:lo12:.LANCHOR41]
+	.loc 2 1644 0
+	mov	w6, 65535
+	.loc 2 1635 0
+	ldrh	w4, [x23, #:lo12:.LANCHOR48]
+.LVL939:
+	.loc 2 1636 0
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	.loc 2 1644 0
+	mov	w5, 6
+	.loc 2 1636 0
+	and	w19, w19, 65535
+.LVL940:
+.L671:
+	.loc 2 1637 0 discriminator 1
+	cmp	w1, w4
+	beq	.L670
+	.loc 2 1638 0
+	cmp	w19, w3
+	bne	.L672
+	.loc 2 1639 0
+	mov	w1, w19
+.LVL941:
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_remove_node
+.LVL942:
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cbnz	w0, .L673
+	.loc 2 1639 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR146
+	adrp	x0, .LC1
+	mov	w2, 1639
+	add	x1, x1, :lo12:.LANCHOR146
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL943:
+.L673:
+	.loc 2 1639 0 discriminator 3
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR48]
+	.loc 2 1640 0 is_stmt 1 discriminator 3
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL944:
+	.loc 2 1641 0 discriminator 3
+	ldr	x1, [x22, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.LVL945:
+.L670:
+.LBE221:
+	.loc 2 1652 0
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+.LVL946:
+	.loc 2 1653 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL947:
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL948:
+.L672:
+	.cfi_restore_state
+.LBB222:
+	.loc 2 1644 0
+	umull	x19, w19, w5
+.LVL949:
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L670
+.LVL950:
+	.loc 2 1637 0 discriminator 2
+	add	w1, w1, 1
+.LVL951:
+	and	w1, w1, 65535
+.LVL952:
+	b	.L671
+.LVL953:
+.L669:
+.LBE222:
+	.loc 2 1650 0
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L670
+	.cfi_endproc
+.LFE280:
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+.LFB291:
+	.loc 2 2275 0
+	.cfi_startproc
+	sub	sp, sp, #96
+	.cfi_def_cfa_offset 96
+	.loc 2 2280 0
+	adrp	x0, .LC88
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC88
+	.loc 2 2275 0
+	stp	x29, x30, [sp, 16]
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 16
+	.cfi_def_cfa 29, 80
+	stp	x19, x20, [sp, 32]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.loc 2 2286 0
+	adrp	x20, .LANCHOR108
+	.loc 2 2275 0
+	stp	x21, x22, [sp, 48]
+	.loc 2 2281 0
+	mov	w19, 0
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	adrp	x21, .LANCHOR62
+	.loc 2 2297 0
+	add	x22, x20, :lo12:.LANCHOR108
+	.loc 2 2281 0
+	add	x21, x21, :lo12:.LANCHOR62
+	.loc 2 2275 0
+	str	x23, [sp, 64]
+	.cfi_offset 23, -32
+	.loc 2 2280 0
+	bl	printf
+.LVL954:
+.L680:
+	.loc 2 2281 0 discriminator 1
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L686
+	.loc 2 2303 0
+	ldp	x19, x20, [sp, 32]
+.LVL955:
+	ldp	x21, x22, [sp, 48]
+	ldp	x29, x30, [sp, 16]
+	ldr	x23, [sp, 64]
+	add	sp, sp, 96
+	.cfi_remember_state
+	.cfi_restore 29
+	.cfi_restore 30
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL956:
+.L686:
+	.cfi_restore_state
+	.loc 2 2282 0
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w19
+	bl	log2phys
+.LVL957:
+	.loc 2 2283 0
+	tst	x19, 2047
+	bne	.L681
+	.loc 2 2284 0
+	ldr	w2, [x29, 76]
+	adrp	x0, .LC89
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC89
+	bl	printf
+.LVL958:
+.L681:
+	.loc 2 2285 0
+	ldr	w1, [x29, 76]
+	cmn	w1, #1
+	beq	.L683
+	.loc 2 2286 0
+	add	x0, x20, :lo12:.LANCHOR108
+	.loc 2 2290 0
+	str	wzr, [x20, #:lo12:.LANCHOR108]
+	.loc 2 2292 0
+	mov	w2, 0
+	.loc 2 2286 0
+	str	w1, [x0, 4]
+	.loc 2 2288 0
+	adrp	x1, .LANCHOR39
+	.loc 2 2287 0
+	str	w19, [x0, 24]
+	.loc 2 2288 0
+	ldr	x1, [x1, #:lo12:.LANCHOR39]
+	str	x1, [x0, 8]
+	.loc 2 2289 0
+	adrp	x1, .LANCHOR109
+	ldr	x23, [x1, #:lo12:.LANCHOR109]
+.LVL959:
+	.loc 2 2292 0
+	mov	w1, 1
+	.loc 2 2289 0
+	str	x23, [x0, 16]
+	.loc 2 2292 0
+	bl	FlashReadPages
+.LVL960:
+	.loc 2 2293 0
+	ldr	w0, [x20, #:lo12:.LANCHOR108]
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	beq	.L684
+	.loc 2 2294 0
+	ldr	w0, [x23, 8]
+	cmp	w19, w0
+	beq	.L683
+.L684:
+	.loc 2 2297 0
+	ldp	x1, x0, [x22, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldr	w2, [x22, 4]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC90
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC90
+	mov	w1, w19
+	bl	printf
+.LVL961:
+.L683:
+	.loc 2 2281 0 discriminator 2
+	add	w19, w19, 1
+.LVL962:
+	b	.L680
+	.cfi_endproc
+.LFE291:
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.FtlReadRefresh,"ax",@progbits
+	.align	2
+	.global	FtlReadRefresh
+	.type	FtlReadRefresh, %function
+FtlReadRefresh:
+.LFB318:
+	.loc 5 419 0
+	.cfi_startproc
+.LVL963:
+	.loc 5 425 0
+	adrp	x1, .LANCHOR83
+	add	x0, x1, :lo12:.LANCHOR83
+	ldr	w2, [x0, 80]
+	cbz	w2, .L689
+	.loc 5 426 0
+	adrp	x1, .LANCHOR62
+	ldr	w3, [x0, 84]
+	ldr	w2, [x1, #:lo12:.LANCHOR62]
+	cmp	w3, w2
+	bcs	.L690
+	.loc 5 419 0
+	stp	x29, x30, [sp, -160]!
+	.cfi_def_cfa_offset 160
+	.cfi_offset 29, -160
+	.cfi_offset 30, -152
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -144
+	.cfi_offset 20, -136
+.LBB228:
+.LBB229:
+	.loc 5 428 0
+	mov	x19, x0
+	add	x20, x1, :lo12:.LANCHOR62
+.LBE229:
+.LBE228:
+	.loc 5 419 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -128
+	mov	w21, 2048
+.L695:
+.LVL964:
+.LBB234:
+.LBB231:
+	.loc 5 428 0
+	ldr	w0, [x19, 84]
+	ldr	w1, [x20]
+	cmp	w0, w1
+	bcs	.L692
+	.loc 5 430 0
+	add	x1, x29, 60
+	mov	w2, 0
+	bl	log2phys
+.LVL965:
+	.loc 5 431 0
+	ldr	w0, [x19, 84]
+	.loc 5 432 0
+	ldr	w1, [x29, 60]
+	.loc 5 431 0
+	add	w0, w0, 1
+	str	w0, [x19, 84]
+	.loc 5 432 0
+	cmn	w1, #1
+	beq	.L693
+.LBB230:
+	.loc 5 435 0
+	str	w0, [x29, 88]
+	.loc 5 436 0
+	adrp	x0, ftl_temp_buf
+	add	x0, x0, :lo12:ftl_temp_buf
+	str	x0, [x29, 72]
+	.loc 5 437 0
+	add	x0, x29, 96
+	str	x0, [x29, 80]
+	.loc 5 438 0
+	add	x0, x29, 160
+	.loc 5 434 0
+	str	w1, [x29, 68]
+	.loc 5 439 0
+	mov	w2, 0
+	mov	w1, 1
+	.loc 5 438 0
+	str	wzr, [x0, -96]!
+	.loc 5 439 0
+	bl	FlashReadPages
+.LVL966:
+	.loc 5 440 0
+	ldr	w0, [x29, 64]
+	cmp	w0, 256
+	bne	.L692
+	.loc 5 442 0
+	ldr	w0, [x29, 60]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL967:
+	bl	FtlGcRefreshBlock
+.LVL968:
+.L692:
+.LBE230:
+.LBE231:
+.LBE234:
+	.loc 5 466 0
+	ldp	x19, x20, [sp, 16]
+.LBB235:
+.LBB232:
+	mov	w0, -1
+.LBE232:
+.LBE235:
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 160
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL969:
+.L693:
+	.cfi_restore_state
+.LBB236:
+.LBB233:
+	.loc 5 427 0
+	subs	w21, w21, #1
+.LVL970:
+	bne	.L695
+	b	.L692
+.LVL971:
+.L690:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 29
+	.cfi_restore 30
+.LBE233:
+.LBE236:
+	.loc 5 451 0
+	adrp	x1, .LANCHOR63
+	.loc 5 450 0
+	str	wzr, [x0, 84]
+	.loc 5 451 0
+	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	.loc 5 449 0
+	stp	w1, wzr, [x0, 76]
+.L699:
+	.loc 5 420 0
+	mov	w0, 0
+	.loc 5 465 0
+	ret
+.L689:
+.LVL972:
+.LBB237:
+	.loc 5 456 0
+	ldr	w4, [x0, 76]
+	adrp	x0, .LANCHOR63
+	ldr	w2, [x0, #:lo12:.LANCHOR63]
+	add	w0, w2, 1048576
+	cmp	w4, w0
+	bhi	.L698
+	.loc 5 454 0
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	lsr	w3, w0, 10
+	mov	w0, 33554432
+	asr	w0, w0, w3
+	.loc 5 457 0
+	add	w0, w0, w4
+	cmp	w2, w0
+	bhi	.L698
+	.loc 5 458 0
+	adrp	x0, .LANCHOR79+28
+	ldrb	w0, [x0, #:lo12:.LANCHOR79+28]
+	cbnz	w0, .L699
+.L698:
+	.loc 5 460 0
+	add	x0, x1, :lo12:.LANCHOR83
+	mov	w1, 1
+	.loc 5 461 0
+	str	wzr, [x0, 84]
+	.loc 5 460 0
+	stp	w2, w1, [x0, 76]
+	b	.L699
+.LBE237:
+	.cfi_endproc
+.LFE318:
+	.size	FtlReadRefresh, .-FtlReadRefresh
+	.section	.text.FtlMapBlkWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDump_data
+	.type	FtlMapBlkWriteDump_data, %function
+FtlMapBlkWriteDump_data:
+.LFB267:
+	.loc 2 897 0
+	.cfi_startproc
+.LVL973:
+	.loc 2 903 0
+	ldr	w1, [x0, 56]
+	cbz	w1, .L705
+	.loc 2 897 0
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+.LVL974:
+	.loc 2 907 0
+	adrp	x1, .LANCHOR108
+	.loc 2 908 0
+	adrp	x2, .LANCHOR109
+	.loc 2 897 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	mov	x19, x0
+	.loc 2 899 0
+	ldrh	w20, [x0, 6]
+	.loc 2 907 0
+	adrp	x0, .LANCHOR123
+.LVL975:
+	.loc 2 908 0
+	ldr	x2, [x2, #:lo12:.LANCHOR109]
+	.loc 2 907 0
+	ldr	x3, [x0, #:lo12:.LANCHOR123]
+	add	x0, x1, :lo12:.LANCHOR108
+	.loc 2 899 0
+	sub	w20, w20, #1
+	.loc 2 900 0
+	ldr	x4, [x19, 40]
+	.loc 2 899 0
+	and	w20, w20, 65535
+	.loc 2 897 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 908 0
+	stp	x3, x2, [x0, 8]
+	.loc 2 930 0
+	ubfiz	x2, x20, 2, 16
+	.loc 2 905 0
+	str	wzr, [x19, 56]
+	mov	x21, x1
+	.loc 2 930 0
+	ldr	w2, [x4, x2]
+.LVL976:
+	.loc 2 931 0
+	str	w2, [x0, 4]
+	.loc 2 932 0
+	cbz	w2, .L707
+	.loc 2 934 0
+	mov	w2, 1
+.LVL977:
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL978:
+.L708:
+	.loc 2 941 0
+	add	x1, x21, :lo12:.LANCHOR108
+	mov	x0, x19
+	.loc 2 943 0
+	ldr	x21, [sp, 32]
+	.loc 2 941 0
+	ldr	x2, [x1, 8]
+	mov	w1, w20
+	.loc 2 943 0
+	ldp	x19, x20, [sp, 16]
+.LVL979:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 2 941 0
+	b	FtlMapWritePage
+.LVL980:
+.L707:
+	.cfi_restore_state
+	.loc 2 938 0
+	adrp	x0, .LANCHOR23
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR23]
+.LVL981:
+	mov	x0, x3
+	bl	ftl_memset
+.LVL982:
+	b	.L708
+.LVL983:
+.L705:
+	.cfi_def_cfa 31, 0
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_restore 21
+	.cfi_restore 29
+	.cfi_restore 30
+	ret
+	.cfi_endproc
+.LFE267:
+	.size	FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data
+	.section	.text.FtlScanSysBlk,"ax",@progbits
+	.align	2
+	.global	FtlScanSysBlk
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+.LFB270:
+	.loc 2 1095 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -176]!
+	.cfi_def_cfa_offset 176
+	.cfi_offset 29, -176
+	.cfi_offset 30, -168
+	.loc 2 1103 0
+	mov	w1, 0
+	.loc 2 1095 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -112
+	.cfi_offset 26, -104
+	.loc 2 1103 0
+	adrp	x25, .LANCHOR135
+	.loc 2 1095 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -144
+	.cfi_offset 22, -136
+	.loc 2 1103 0
+	adrp	x21, .LANCHOR30
+	ldr	x0, [x25, #:lo12:.LANCHOR135]
+	.loc 2 1105 0
+	adrp	x22, .LANCHOR132
+	.loc 2 1103 0
+	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	.loc 2 1095 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -160
+	.cfi_offset 20, -152
+	.loc 2 1101 0
+	adrp	x20, .LANCHOR147
+	.loc 2 1095 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -128
+	.cfi_offset 24, -120
+	.loc 2 1102 0
+	adrp	x23, .LANCHOR35
+	.loc 2 1095 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -96
+	.cfi_offset 28, -88
+	.loc 2 1104 0
+	adrp	x27, .LANCHOR129
+	.loc 2 1103 0
+	lsl	w2, w2, 2
+	.loc 2 1101 0
+	strh	wzr, [x20, #:lo12:.LANCHOR147]
+	.loc 2 1102 0
+	strh	wzr, [x23, #:lo12:.LANCHOR35]
+	.loc 2 1103 0
+	bl	ftl_memset
+.LVL984:
+	.loc 2 1104 0
+	ldr	x0, [x27, #:lo12:.LANCHOR129]
+	mov	w1, 0
+	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	.loc 2 1105 0
+	adrp	x19, .LANCHOR27
+	.loc 2 1106 0
+	adrp	x28, .LANCHOR36
+	.loc 2 1107 0
+	adrp	x24, .LANCHOR81
+	.loc 2 1104 0
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL985:
+	.loc 2 1105 0
+	ldr	x0, [x22, #:lo12:.LANCHOR132]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+.LVL986:
+	.loc 2 1106 0
+	ldr	x0, [x28, #:lo12:.LANCHOR36]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL987:
+	.loc 2 1107 0
+	mov	w2, 12
+	mov	w1, 255
+	add	x0, x24, :lo12:.LANCHOR81
+	bl	ftl_memset
+.LVL988:
+	.loc 2 1109 0
+	adrp	x0, .LANCHOR5
+	stp	x22, x25, [x29, 144]
+	str	x27, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	str	w0, [x29, 172]
+.LVL989:
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	str	x0, [x29, 120]
+	.loc 2 1152 0
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	str	x0, [x29, 112]
+.L713:
+	.loc 2 1109 0 discriminator 1
+	ldr	x0, [x29, 120]
+	ldr	w1, [x29, 172]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bls	.L753
+	.loc 2 1113 0 discriminator 1
+	adrp	x0, .LANCHOR3
+	.loc 2 1118 0 discriminator 1
+	adrp	x25, .LANCHOR120
+	.loc 2 1115 0 discriminator 1
+	adrp	x6, .LANCHOR13
+	.loc 2 1120 0 discriminator 1
+	mov	x5, 0
+	.loc 2 1113 0 discriminator 1
+	ldrh	w12, [x0, #:lo12:.LANCHOR3]
+	.loc 2 1119 0 discriminator 1
+	adrp	x0, .LANCHOR93
+	.loc 2 1118 0 discriminator 1
+	ldr	x7, [x25, #:lo12:.LANCHOR120]
+	.loc 2 1120 0 discriminator 1
+	mov	w22, 0
+	.loc 2 1119 0 discriminator 1
+	ldr	x11, [x0, #:lo12:.LANCHOR93]
+	.loc 2 1120 0 discriminator 1
+	adrp	x0, .LANCHOR94
+	.loc 2 1115 0 discriminator 1
+	add	x6, x6, :lo12:.LANCHOR13
+	.loc 2 1120 0 discriminator 1
+	ldr	x10, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LANCHOR24
+	ldrh	w8, [x0, #:lo12:.LANCHOR24]
+	b	.L754
+.LVL990:
+.L715:
+	.loc 2 1115 0
+	ldrh	w1, [x29, 172]
+	ldrb	w0, [x6, x5]
+	bl	V2P_block
+.LVL991:
+	and	w4, w0, 65535
+.LVL992:
+	.loc 2 1116 0
+	bl	FtlBbmIsBadBlock
+.LVL993:
+	cbnz	w0, .L714
+	.loc 2 1118 0
+	ubfiz	x0, x22, 5, 16
+	.loc 2 1120 0
+	mul	w1, w22, w8
+	.loc 2 1118 0
+	add	x0, x7, x0
+	.loc 2 1121 0
+	add	w22, w22, 1
+.LVL994:
+	and	w22, w22, 65535
+.LVL995:
+	.loc 2 1118 0
+	lsl	w4, w4, 10
+.LVL996:
+	.loc 2 1120 0
+	asr	w1, w1, 2
+	add	x1, x10, x1, sxtw 2
+	.loc 2 1118 0
+	str	w4, [x0, 4]
+	.loc 2 1120 0
+	stp	x11, x1, [x0, 8]
+.L714:
+.LVL997:
+	add	x5, x5, 1
+.LVL998:
+.L754:
+	.loc 2 1113 0 discriminator 1
+	cmp	w12, w5, uxth
+	bhi	.L715
+	.loc 2 1124 0
+	cbnz	w22, .L716
+.LVL999:
+.L752:
+	.loc 2 1109 0
+	ldr	w0, [x29, 172]
+	add	w26, w0, 1
+	and	w0, w26, 65535
+	str	w0, [x29, 172]
+.LVL1000:
+	b	.L713
+.LVL1001:
+.L716:
+	.loc 2 1127 0
+	mov	w1, w22
+	mov	w2, 1
+	mov	x0, x7
+	bl	FlashReadPages
+.LVL1002:
+	ubfiz	x0, x22, 5, 16
+	mov	x22, 0
+.LVL1003:
+	str	x0, [x29, 128]
+.LVL1004:
+	.loc 2 1162 0
+	adrp	x0, .LANCHOR148
+	add	x0, x0, :lo12:.LANCHOR148
+	str	x0, [x29, 136]
+.L751:
+	.loc 2 1129 0
+	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	add	x1, x0, x22
+	.loc 2 1132 0
+	ldr	w0, [x0, x22]
+	.loc 2 1129 0
+	ldr	w3, [x1, 4]
+	.loc 2 1132 0
+	cmn	w0, #1
+	.loc 2 1130 0
+	ldr	x27, [x1, 16]
+	.loc 2 1129 0
+	ubfx	x26, x3, 10, 16
+.LVL1005:
+	.loc 2 1132 0
+	bne	.L719
+	mov	w5, 16
+	.loc 2 1136 0
+	mov	w7, 65535
+.L721:
+	.loc 2 1134 0
+	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	add	x6, x25, :lo12:.LANCHOR120
+	.loc 2 1135 0
+	mov	w2, 1
+	str	w7, [x29, 100]
+	.loc 2 1134 0
+	add	x0, x0, x22
+	str	x6, [x29, 104]
+	str	w5, [x29, 168]
+.LVL1006:
+	ldr	w1, [x0, 4]
+	add	w1, w1, 1
+	str	w1, [x0, 4]
+	.loc 2 1135 0
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL1007:
+	.loc 2 1136 0
+	ldrh	w0, [x27]
+	ldr	w7, [x29, 100]
+	ldr	w5, [x29, 168]
+	cmp	w0, w7
+	ldr	x6, [x29, 104]
+	bne	.L718
+	.loc 2 1137 0
+	ldr	x0, [x6]
+	mov	w1, -1
+	str	w1, [x0, x22]
+	.loc 2 1145 0
+	ldr	x0, [x6]
+	ldr	w0, [x0, x22]
+	cmp	w0, w1
+	bne	.L719
+.LVL1008:
+.L720:
+	.loc 2 1287 0
+	mov	w1, 1
+	b	.L790
+.LVL1009:
+.L718:
+	.loc 2 1139 0
+	ldr	x0, [x25, #:lo12:.LANCHOR120]
+	ldr	w0, [x0, x22]
+	cmn	w0, #1
+	bne	.L719
+.LVL1010:
+	sub	w5, w5, #1
+.LVL1011:
+	.loc 2 1133 0 discriminator 2
+	ands	w5, w5, 65535
+	bne	.L721
+	b	.L720
+.L719:
+	.loc 2 1147 0
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x27, 4]
+	cmn	w1, #1
+	beq	.L722
+	.loc 2 1147 0 is_stmt 0 discriminator 1
+	cmp	w1, w0
+	bhi	.L723
+.L722:
+	.loc 2 1149 0 is_stmt 1
+	cmn	w0, #1
+	beq	.L723
+	.loc 2 1152 0
+	ldr	x2, [x29, 112]
+	add	w1, w0, 1
+	str	w1, [x2]
+.L723:
+	.loc 2 1157 0
+	ldrh	w1, [x27]
+	mov	w2, 61604
+	cmp	w1, w2
+	beq	.L725
+	bhi	.L726
+	mov	w0, 61574
+	cmp	w1, w0
+	beq	.L727
+.L724:
+	.loc 2 1128 0 discriminator 2
+	ldr	x0, [x29, 128]
+	add	x22, x22, 32
+	cmp	x0, x22
+	bne	.L751
+	b	.L752
+.L726:
+	.loc 2 1157 0
+	mov	w0, 61634
+	cmp	w1, w0
+	beq	.L728
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L724
+	.loc 2 1280 0
+	mov	w1, 0
+.L790:
+	.loc 2 1287 0
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+.LVL1012:
+	b	.L724
+.L728:
+	.loc 2 1162 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldr	w0, [x21, #:lo12:.LANCHOR30]
+	cmp	w1, w0
+	bls	.L730
+	.loc 2 1162 0 is_stmt 0 discriminator 1
+	ldr	x1, [x29, 136]
+	adrp	x0, .LC1
+	mov	w2, 1162
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1013:
+.L730:
+	.loc 2 1163 0 is_stmt 1
+	ldr	w6, [x21, #:lo12:.LANCHOR30]
+	.loc 2 1165 0
+	ldr	x3, [x29, 152]
+	.loc 2 1163 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	and	w2, w6, 65535
+	sub	w0, w2, #1
+	sub	w2, w2, w1
+	sxth	x0, w0
+.LVL1014:
+	sub	w2, w2, #1
+	.loc 2 1165 0
+	ldr	x5, [x3, #:lo12:.LANCHOR135]
+	.loc 2 1163 0
+	sxth	w2, w2
+.L731:
+	.loc 2 1163 0 is_stmt 0 discriminator 1
+	cmp	w0, w2
+	bgt	.L737
+	.loc 2 1186 0 is_stmt 1
+	tbz	w0, #31, .L771
+	b	.L724
+.L737:
+	.loc 2 1165 0
+	sxtw	x8, w0
+	ldr	w11, [x27, 4]
+	lsl	x7, x8, 2
+	add	x10, x5, x7
+	ldr	w7, [x5, x7]
+	cmp	w11, w7
+	bls	.L732
+	.loc 2 1167 0
+	ldr	w2, [x5]
+	cbnz	w2, .L733
+	.loc 2 1167 0 is_stmt 0 discriminator 1
+	cmp	w6, w1
+	beq	.L733
+	.loc 2 1172 0 is_stmt 1
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR147]
+.L733:
+	.loc 2 1178 0 discriminator 1
+	ldr	x1, [x29, 160]
+	ldr	x6, [x1, #:lo12:.LANCHOR129]
+	mov	w1, 0
+.L734:
+.LVL1015:
+	.loc 2 1175 0 discriminator 1
+	cmp	w1, w0
+	bne	.L735
+	.loc 2 1180 0
+	ldr	w1, [x27, 4]
+.LVL1016:
+	str	w1, [x10]
+	.loc 2 1181 0
+	strh	w26, [x6, x8, lsl 1]
+	.loc 2 1186 0
+	tbnz	w0, #31, .L724
+	.loc 2 1193 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldr	w2, [x21, #:lo12:.LANCHOR30]
+	sub	w2, w2, w1
+	sub	w2, w2, #1
+	cmp	w0, w2, sxth
+	bgt	.L724
+.L771:
+	.loc 2 1195 0
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR147]
+	.loc 2 1196 0
+	ldr	w1, [x27, 4]
+	str	w1, [x5, x0, lsl 2]
+	.loc 2 1197 0
+	ldr	x1, [x29, 160]
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+.L789:
+	.loc 2 1241 0
+	strh	w26, [x1, x0, lsl 1]
+	b	.L724
+.LVL1017:
+.L735:
+	.loc 2 1177 0 discriminator 3
+	sxtw	x2, w1
+	add	w1, w1, 1
+.LVL1018:
+	lsl	x7, x2, 2
+	.loc 2 1178 0 discriminator 3
+	lsl	x2, x2, 1
+	.loc 2 1177 0 discriminator 3
+	add	x11, x5, x7
+	sxth	w1, w1
+.LVL1019:
+	ldr	w11, [x11, 4]
+	str	w11, [x5, x7]
+	.loc 2 1178 0 discriminator 3
+	add	x7, x6, x2
+	ldrh	w7, [x7, 2]
+	strh	w7, [x6, x2]
+	b	.L734
+.LVL1020:
+.L732:
+	sub	w0, w0, #1
+.LVL1021:
+	sxth	x0, w0
+.LVL1022:
+	b	.L731
+.LVL1023:
+.L727:
+	.loc 2 1203 0
+	ldrh	w1, [x23, #:lo12:.LANCHOR35]
+	ldrh	w0, [x19, #:lo12:.LANCHOR27]
+	cmp	w1, w0
+	bls	.L740
+	.loc 2 1203 0 is_stmt 0 discriminator 1
+	ldr	x1, [x29, 136]
+	adrp	x0, .LC1
+	mov	w2, 1203
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1024:
+.L740:
+	.loc 2 1204 0 is_stmt 1
+	ldrh	w6, [x19, #:lo12:.LANCHOR27]
+	ldrh	w2, [x23, #:lo12:.LANCHOR35]
+	sub	w1, w6, #1
+	sxth	x0, w1
+.LVL1025:
+	sub	w5, w1, w2
+	.loc 2 1206 0
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
+.L741:
+	.loc 2 1204 0 discriminator 1
+	cmp	w0, w5
+	ble	.L746
+	.loc 2 1206 0
+	sxtw	x7, w0
+	ldr	w11, [x27, 4]
+	lsl	x8, x7, 2
+	add	x10, x1, x8
+	ldr	w8, [x1, x8]
+	cmp	w11, w8
+	bls	.L742
+	.loc 2 1208 0
+	ldr	w5, [x1]
+	cbnz	w5, .L743
+	.loc 2 1208 0 is_stmt 0 discriminator 1
+	cmp	w6, w2
+	beq	.L743
+	.loc 2 1216 0 is_stmt 1
+	add	w2, w2, 1
+	strh	w2, [x23, #:lo12:.LANCHOR35]
+.L743:
+	.loc 2 1221 0 discriminator 1
+	ldr	x6, [x28, #:lo12:.LANCHOR36]
+	mov	w2, 0
+.L744:
+.LVL1026:
+	.loc 2 1218 0 discriminator 1
+	cmp	w2, w0
+	bne	.L745
+	.loc 2 1223 0
+	ldr	w2, [x27, 4]
+.LVL1027:
+	str	w2, [x10]
+	.loc 2 1224 0
+	strh	w26, [x6, x7, lsl 1]
+.L746:
+	.loc 2 1229 0
+	tbnz	w0, #31, .L724
+	.loc 2 1237 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	ldrh	w5, [x23, #:lo12:.LANCHOR35]
+	sub	w2, w2, #1
+	sub	w2, w2, w5
+	cmp	w0, w2, sxth
+	bgt	.L724
+	.loc 2 1239 0
+	add	w5, w5, 1
+	.loc 2 1240 0
+	ldr	w2, [x27, 4]
+	.loc 2 1239 0
+	strh	w5, [x23, #:lo12:.LANCHOR35]
+	.loc 2 1240 0
+	str	w2, [x1, x0, lsl 2]
+	.loc 2 1241 0
+	ldr	x1, [x28, #:lo12:.LANCHOR36]
+	b	.L789
+.LVL1028:
+.L745:
+	.loc 2 1220 0 discriminator 3
+	sxtw	x5, w2
+	add	w2, w2, 1
+.LVL1029:
+	lsl	x8, x5, 2
+	.loc 2 1221 0 discriminator 3
+	lsl	x5, x5, 1
+	.loc 2 1220 0 discriminator 3
+	add	x11, x1, x8
+	sxth	w2, w2
+.LVL1030:
+	ldr	w11, [x11, 4]
+	str	w11, [x1, x8]
+	.loc 2 1221 0 discriminator 3
+	add	x8, x6, x5
+	ldrh	w8, [x8, 2]
+	strh	w8, [x6, x5]
+	b	.L744
+.LVL1031:
+.L742:
+	sub	w0, w0, #1
+.LVL1032:
+	sxth	x0, w0
+.LVL1033:
+	b	.L741
+.LVL1034:
+.L725:
+	.loc 2 1248 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR81]
+	mov	w1, 65535
+	add	x2, x24, :lo12:.LANCHOR81
+	cmp	w5, w1
+	bne	.L748
+	.loc 2 1250 0
+	strh	w26, [x24, #:lo12:.LANCHOR81]
+	.loc 2 1251 0
+	str	w0, [x2, 8]
+	b	.L724
+.L748:
+	.loc 2 1255 0
+	ldrh	w0, [x2, 4]
+	cmp	w0, w1
+	beq	.L749
+	.loc 2 1256 0
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+.LVL1035:
+.L749:
+	.loc 2 1257 0
+	add	x0, x24, :lo12:.LANCHOR81
+	ldr	w1, [x27, 4]
+	ldr	w2, [x0, 8]
+	cmp	w2, w1
+	bcs	.L750
+	.loc 2 1259 0
+	ldrh	w2, [x24, #:lo12:.LANCHOR81]
+	strh	w2, [x0, 4]
+	.loc 2 1260 0
+	strh	w26, [x24, #:lo12:.LANCHOR81]
+	.loc 2 1261 0
+	str	w1, [x0, 8]
+	b	.L724
+.L750:
+	.loc 2 1265 0
+	strh	w26, [x0, 4]
+	b	.L724
+.LVL1036:
+.L753:
+	.loc 2 1292 0
+	ldr	x0, [x29, 160]
+	ldr	x2, [x0, #:lo12:.LANCHOR129]
+	ldrh	w0, [x2]
+	cbz	w0, .L755
+.L758:
+	.loc 2 1310 0
+	ldr	x1, [x28, #:lo12:.LANCHOR36]
+	ldrh	w0, [x1]
+	cbz	w0, .L756
+.L757:
+	.loc 2 1328 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR147]
+	ldr	w0, [x21, #:lo12:.LANCHOR30]
+	cmp	w1, w0
+	bls	.L787
+	.loc 2 1328 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC1
+	mov	w2, 1328
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1037:
+.L787:
+	.loc 2 1330 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL1038:
+	ret
+.LVL1039:
+.L755:
+	.cfi_restore_state
+	.loc 2 1292 0 discriminator 1
+	ldrh	w0, [x20, #:lo12:.LANCHOR147]
+	cbz	w0, .L758
+	.loc 2 1294 0 discriminator 1
+	ldr	w1, [x21, #:lo12:.LANCHOR30]
+	mov	w0, 0
+.L759:
+.LVL1040:
+	cmp	w0, w1
+	bcs	.L758
+	.loc 2 1296 0
+	ldrh	w3, [x2, w0, sxtw 1]
+	cbz	w3, .L760
+	.loc 2 1301 0
+	ldr	x1, [x29, 152]
+	.loc 2 1298 0
+	add	x7, x21, :lo12:.LANCHOR30
+	.loc 2 1301 0
+	ldr	x4, [x1, #:lo12:.LANCHOR135]
+	mov	w1, w0
+.L761:
+.LVL1041:
+	.loc 2 1298 0 discriminator 1
+	ldr	w3, [x7]
+	cmp	w1, w3
+	bcs	.L758
+	.loc 2 1300 0 discriminator 3
+	sxtw	x6, w1
+	sub	w3, w1, w0
+	lsl	x5, x6, 1
+	sxtw	x3, w3
+	add	w1, w1, 1
+.LVL1042:
+	.loc 2 1301 0 discriminator 3
+	ldr	w6, [x4, x6, lsl 2]
+	sxth	w1, w1
+.LVL1043:
+	.loc 2 1300 0 discriminator 3
+	ldrh	w8, [x2, x5]
+	strh	w8, [x2, x3, lsl 1]
+	.loc 2 1301 0 discriminator 3
+	str	w6, [x4, x3, lsl 2]
+	.loc 2 1302 0 discriminator 3
+	strh	wzr, [x2, x5]
+	b	.L761
+.LVL1044:
+.L760:
+	add	w0, w0, 1
+.LVL1045:
+	sxth	w0, w0
+.LVL1046:
+	b	.L759
+.LVL1047:
+.L756:
+	.loc 2 1310 0 discriminator 1
+	ldrh	w0, [x23, #:lo12:.LANCHOR35]
+	cbz	w0, .L757
+	.loc 2 1312 0 discriminator 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR27]
+	mov	w0, 0
+.L766:
+.LVL1048:
+	mov	w6, w0
+	cmp	w0, w2
+	bge	.L757
+	.loc 2 1314 0
+	ldrh	w3, [x1, w0, sxtw 1]
+	cbz	w3, .L767
+	.loc 2 1319 0
+	ldr	x2, [x29, 144]
+	.loc 2 1316 0
+	add	x19, x19, :lo12:.LANCHOR27
+	.loc 2 1319 0
+	ldr	x3, [x2, #:lo12:.LANCHOR132]
+.LVL1049:
+.L768:
+	.loc 2 1316 0 discriminator 1
+	ldrh	w2, [x19]
+	cmp	w0, w2
+	bge	.L757
+	.loc 2 1318 0 discriminator 3
+	sxtw	x5, w0
+	sub	w2, w0, w6
+	lsl	x4, x5, 1
+	sxtw	x2, w2
+	add	w0, w0, 1
+.LVL1050:
+	.loc 2 1319 0 discriminator 3
+	ldr	w5, [x3, x5, lsl 2]
+	sxth	w0, w0
+.LVL1051:
+	.loc 2 1318 0 discriminator 3
+	ldrh	w7, [x1, x4]
+	strh	w7, [x1, x2, lsl 1]
+	.loc 2 1319 0 discriminator 3
+	str	w5, [x3, x2, lsl 2]
+	.loc 2 1320 0 discriminator 3
+	strh	wzr, [x1, x4]
+	b	.L768
+.LVL1052:
+.L767:
+	add	w0, w0, 1
+.LVL1053:
+	sxth	w0, w0
+.LVL1054:
+	b	.L766
+	.cfi_endproc
+.LFE270:
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.align	2
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+.LFB275:
+	.loc 2 1466 0
+	.cfi_startproc
+.LVL1055:
+	stp	x29, x30, [sp, -144]!
+	.cfi_def_cfa_offset 144
+	.cfi_offset 29, -144
+	.cfi_offset 30, -136
+	.loc 2 1477 0
+	mov	w1, 0
+	.loc 2 1466 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -128
+	.cfi_offset 20, -120
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	.loc 2 1478 0
+	adrp	x20, .LANCHOR108
+	.cfi_offset 23, -96
+	.cfi_offset 24, -88
+	.loc 2 1473 0
+	ldrh	w23, [x0, 6]
+	.loc 2 1511 0
+	adrp	x24, .LANCHOR20
+	.loc 2 1466 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -112
+	.cfi_offset 22, -104
+	.loc 2 1470 0
+	ldr	x21, [x0, 40]
+.LVL1056:
+	.loc 2 1471 0
+	ldr	x22, [x0, 16]
+.LVL1057:
+	.loc 2 1477 0
+	lsl	w2, w23, 2
+	.loc 2 1472 0
+	ldr	x0, [x0, 24]
+.LVL1058:
+	str	x0, [x29, 128]
+.LVL1059:
+	.loc 2 1474 0
+	ldrh	w0, [x19, 8]
+.LVL1060:
+	.loc 2 1466 0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 25, -80
+	.cfi_offset 26, -72
+	.cfi_offset 27, -64
+	.cfi_offset 28, -56
+	.loc 2 1486 0
+	mov	w27, 0
+	.loc 2 1474 0
+	str	w0, [x29, 140]
+.LVL1061:
+	.loc 2 1477 0
+	mov	x0, x21
+	bl	ftl_memset
+.LVL1062:
+	str	x20, [x29, 120]
+	.loc 2 1478 0
+	adrp	x7, .LANCHOR39
+	add	x3, x20, :lo12:.LANCHOR108
+	mov	x26, x7
+	.loc 2 1510 0
+	mov	x20, x3
+	.loc 2 1478 0
+	ldr	x0, [x7, #:lo12:.LANCHOR39]
+	str	x0, [x3, 8]
+	.loc 2 1479 0
+	adrp	x0, .LANCHOR109
+	.loc 2 1483 0
+	stp	wzr, wzr, [x19, 48]
+	.loc 2 1479 0
+	ldr	x25, [x0, #:lo12:.LANCHOR109]
+	.loc 2 1481 0
+	mov	w0, -1
+	.loc 2 1479 0
+	str	x25, [x3, 16]
+.LVL1063:
+	.loc 2 1481 0
+	strh	w0, [x19]
+	.loc 2 1482 0
+	strh	w0, [x19, 2]
+	.loc 2 1485 0
+	mov	w0, 1
+	str	w0, [x19, 56]
+.LVL1064:
+	.loc 2 1488 0
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	str	w0, [x29, 136]
+	.loc 2 1530 0
+	add	x0, x24, :lo12:.LANCHOR20
+	str	x0, [x29, 112]
+.LVL1065:
+.L792:
+	.loc 2 1486 0 discriminator 1
+	ldr	w0, [x29, 140]
+	cmp	w27, w0
+	bge	.L809
+	.loc 2 1488 0
+	ldr	w0, [x29, 136]
+	sxtw	x28, w27
+	cmp	w27, w0
+	bne	.L793
+	.loc 2 1490 0
+	lsl	x0, x28, 1
+	mov	w1, 1
+	add	x24, x22, x0
+	ldrh	w0, [x22, x0]
+	.loc 2 1494 0
+	mov	w22, 0
+.LVL1066:
+	.loc 2 1490 0
+	bl	FtlGetLastWrittenPage
+.LVL1067:
+	sxth	w26, w0
+.LVL1068:
+	.loc 2 1491 0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	.loc 2 1493 0
+	ldr	x0, [x29, 128]
+	.loc 2 1492 0
+	strh	w27, [x19]
+	.loc 2 1493 0
+	ldr	w0, [x0, x28, lsl 2]
+	str	w0, [x19, 48]
+.LVL1069:
+	.loc 2 1496 0
+	ldr	x0, [x29, 120]
+	add	x20, x0, :lo12:.LANCHOR108
+.LVL1070:
+.L794:
+	.loc 2 1494 0 discriminator 1
+	cmp	w22, w26
+	ble	.L796
+.LVL1071:
+.L809:
+	.loc 2 1547 0
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+.LVL1072:
+	.loc 2 1548 0
+	adrp	x0, .LANCHOR20
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cmp	w1, w0
+	bne	.L798
+	.loc 2 1550 0
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.LVL1073:
+.L798:
+	.loc 2 1553 0
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+.LVL1074:
+	.loc 2 1555 0
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+.LVL1075:
+	.loc 2 1557 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL1076:
+	ldp	x21, x22, [sp, 32]
+.LVL1077:
+	ldp	x23, x24, [sp, 48]
+.LVL1078:
+	ldp	x25, x26, [sp, 64]
+.LVL1079:
+	ldp	x27, x28, [sp, 80]
+.LVL1080:
+	ldp	x29, x30, [sp], 144
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+.LVL1081:
+	ret
+.LVL1082:
+.L796:
+	.cfi_restore_state
+	.loc 2 1496 0
+	ldrh	w0, [x24]
+	.loc 2 1497 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 2 1496 0
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x20, 4]
+	.loc 2 1497 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1083:
+	.loc 2 1500 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L795
+	.loc 2 1502 0
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L795
+	.loc 2 1502 0 is_stmt 0 discriminator 1
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L795
+	.loc 2 1504 0 is_stmt 1
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L795:
+	add	w22, w22, 1
+.LVL1084:
+	sxth	w22, w22
+.LVL1085:
+	b	.L794
+.LVL1086:
+.L793:
+	.loc 2 1510 0
+	ldr	x0, [x26, #:lo12:.LANCHOR39]
+	.loc 2 1512 0
+	mov	w2, 1
+	.loc 2 1510 0
+	str	x0, [x20, 8]
+	.loc 2 1511 0
+	lsl	x0, x28, 1
+	ldrh	w1, [x24, #:lo12:.LANCHOR20]
+	add	x28, x22, x0
+	ldrh	w0, [x22, x0]
+	sub	w1, w1, #1
+	orr	w0, w1, w0, lsl 10
+	.loc 2 1512 0
+	mov	w1, w2
+	.loc 2 1511 0
+	str	w0, [x20, 4]
+	.loc 2 1512 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1087:
+	.loc 2 1515 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L811
+	.loc 2 1515 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x25]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L811
+	.loc 2 1515 0 discriminator 2
+	ldrh	w1, [x25, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L800
+.L811:
+	mov	w5, 0
+.L801:
+.LVL1088:
+	.loc 2 1530 0 is_stmt 1 discriminator 1
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0]
+	cmp	w5, w0
+	bge	.L807
+	.loc 2 1532 0
+	ldrh	w0, [x28]
+	.loc 2 1533 0
+	mov	w2, 1
+	.loc 2 1532 0
+	str	w5, [x29, 108]
+	.loc 2 1533 0
+	mov	w1, w2
+	.loc 2 1532 0
+	orr	w0, w5, w0, lsl 10
+	str	w0, [x20, 4]
+	.loc 2 1533 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1089:
+	.loc 2 1536 0
+	ldr	w0, [x20]
+	ldr	w5, [x29, 108]
+	cmn	w0, #1
+	beq	.L805
+	.loc 2 1538 0
+	ldrh	w0, [x25, 8]
+	cmp	w23, w0
+	bls	.L805
+	.loc 2 1538 0 is_stmt 0 discriminator 1
+	ldrh	w2, [x25]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L805
+	.loc 2 1540 0 is_stmt 1
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x20, 4]
+	str	w1, [x21, x0]
+.L805:
+	add	w5, w5, 1
+	sxth	w5, w5
+.LVL1090:
+	b	.L801
+.LVL1091:
+.L800:
+	.loc 2 1518 0 discriminator 1
+	ldrh	w5, [x24, #:lo12:.LANCHOR20]
+	.loc 2 1520 0 discriminator 1
+	mov	w0, 0
+	ldr	x10, [x26, #:lo12:.LANCHOR39]
+	.loc 2 1518 0 discriminator 1
+	sub	w5, w5, #1
+.L802:
+.LVL1092:
+	cmp	w0, w5
+	blt	.L804
+.LVL1093:
+.L807:
+	add	w4, w27, 1
+	sxth	w27, w4
+.LVL1094:
+	b	.L792
+.LVL1095:
+.L804:
+	.loc 2 1520 0
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x10, x1]
+.LVL1096:
+	.loc 2 1521 0
+	cmp	w23, w1
+	bls	.L803
+	.loc 2 1523 0
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+.LVL1097:
+	ldr	w2, [x10, x2, lsl 2]
+.LVL1098:
+	str	w2, [x21, x1]
+.LVL1099:
+.L803:
+	add	w0, w0, 1
+.LVL1100:
+	sxth	w0, w0
+.LVL1101:
+	b	.L802
+	.cfi_endproc
+.LFE275:
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+.LFB276:
+	.loc 2 1560 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	.loc 2 1561 0
+	adrp	x1, .LANCHOR27
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
+	.loc 2 1560 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 1561 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR27]
+	strh	w1, [x0, 10]
+	.loc 2 1562 0
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	.loc 2 1563 0
+	adrp	x1, .LANCHOR35
+	ldrh	w1, [x1, #:lo12:.LANCHOR35]
+	strh	w1, [x0, 8]
+	.loc 2 1564 0
+	adrp	x1, .LANCHOR28
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
+	strh	w1, [x0, 6]
+	.loc 2 1565 0
+	adrp	x1, .LANCHOR36
+	ldr	x1, [x1, #:lo12:.LANCHOR36]
+	str	x1, [x0, 16]
+	.loc 2 1566 0
+	adrp	x1, .LANCHOR132
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	str	x1, [x0, 24]
+	.loc 2 1567 0
+	adrp	x1, .LANCHOR131
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	str	x1, [x0, 32]
+	.loc 2 1568 0
+	adrp	x1, .LANCHOR133
+	ldr	x1, [x1, #:lo12:.LANCHOR133]
+	str	x1, [x0, 40]
+	.loc 2 1570 0
+	bl	FtlMapTblRecovery
+.LVL1102:
+	.loc 2 1573 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE276:
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlL2PDataInit,"ax",@progbits
+	.align	2
+	.global	FtlL2PDataInit
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+.LFB277:
+	.loc 2 1576 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	.loc 2 1578 0
+	mov	w1, 0
+	.loc 2 1576 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 2 1578 0
+	adrp	x19, .LANCHOR130
+	adrp	x20, .LANCHOR30
+	.loc 2 1576 0
+	stp	x21, x22, [sp, 32]
+	.loc 2 1578 0
+	ldr	x0, [x19, #:lo12:.LANCHOR130]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.loc 2 1579 0
+	adrp	x22, .LANCHOR23
+	.loc 2 1578 0
+	ldr	w2, [x20, #:lo12:.LANCHOR30]
+	.loc 2 1579 0
+	adrp	x21, .LANCHOR33
+	.loc 2 1576 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -16
+	.loc 2 1579 0
+	adrp	x23, .LANCHOR136
+	.loc 2 1578 0
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1103:
+	.loc 2 1579 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR33]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR23]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR136]
+	bl	ftl_memset
+.LVL1104:
+	adrp	x0, .LANCHOR56
+	ldrh	w3, [x21, #:lo12:.LANCHOR33]
+	.loc 2 1584 0
+	ldr	x6, [x23, #:lo12:.LANCHOR136]
+	.loc 2 1580 0
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	mov	w2, -1
+	ldrh	w5, [x22, #:lo12:.LANCHOR23]
+	add	x3, x0, x3, lsl 4
+.LVL1105:
+.L822:
+	add	x4, x1, x5
+	.loc 2 1580 0 is_stmt 0 discriminator 1
+	cmp	x0, x3
+	bne	.L823
+	.loc 2 1586 0 is_stmt 1
+	adrp	x1, .LANCHOR144
+	add	x0, x1, :lo12:.LANCHOR144
+	.loc 2 1596 0
+	ldp	x21, x22, [sp, 32]
+	.loc 2 1587 0
+	strh	w2, [x1, #:lo12:.LANCHOR144]
+	.loc 2 1588 0
+	ldr	w1, [x20, #:lo12:.LANCHOR30]
+	strh	w1, [x0, 10]
+	.loc 2 1589 0
+	mov	w1, -3902
+	strh	w1, [x0, 4]
+	.loc 2 1590 0
+	adrp	x1, .LANCHOR147
+	.loc 2 1596 0
+	ldr	x23, [sp, 48]
+	.loc 2 1586 0
+	strh	w2, [x0, 2]
+	.loc 2 1590 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR147]
+	strh	w1, [x0, 8]
+	.loc 2 1591 0
+	adrp	x1, .LANCHOR32
+	ldrh	w1, [x1, #:lo12:.LANCHOR32]
+	strh	w1, [x0, 6]
+	.loc 2 1592 0
+	adrp	x1, .LANCHOR129
+	ldr	x1, [x1, #:lo12:.LANCHOR129]
+	str	x1, [x0, 16]
+	.loc 2 1593 0
+	adrp	x1, .LANCHOR135
+	ldr	x1, [x1, #:lo12:.LANCHOR135]
+	str	x1, [x0, 24]
+	.loc 2 1594 0
+	ldr	x1, [x19, #:lo12:.LANCHOR130]
+	.loc 2 1596 0
+	ldp	x19, x20, [sp, 16]
+	.loc 2 1594 0
+	str	x1, [x0, 32]
+	.loc 2 1595 0
+	adrp	x1, .LANCHOR134
+	ldr	x1, [x1, #:lo12:.LANCHOR134]
+	str	x1, [x0, 40]
+	.loc 2 1596 0
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L823:
+	.cfi_restore_state
+	.loc 2 1584 0 discriminator 3
+	and	x1, x1, -4
+	.loc 2 1583 0 discriminator 3
+	strh	w2, [x0]
+	.loc 2 1584 0 discriminator 3
+	add	x1, x6, x1
+	.loc 2 1582 0 discriminator 3
+	str	wzr, [x0, 4]
+	.loc 2 1584 0 discriminator 3
+	str	x1, [x0, 8]
+	add	x0, x0, 16
+	mov	x1, x4
+	b	.L822
+	.cfi_endproc
+.LFE277:
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+.LFB278:
+	.loc 2 1599 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 1600 0
+	bl	FtlL2PDataInit
+.LVL1106:
+	.loc 2 1602 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapTblRecovery
+.LVL1107:
+	.loc 2 1605 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE278:
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlVariablesInit,"ax",@progbits
+	.align	2
+	.global	FtlVariablesInit
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+.LFB207:
+	.loc 3 493 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 496 0
+	adrp	x0, .LANCHOR150
+	.loc 3 497 0
+	mov	w1, -1
+	.loc 3 493 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 496 0
+	str	xzr, [x0, #:lo12:.LANCHOR150]
+	.loc 3 497 0
+	adrp	x0, .LANCHOR151
+	.loc 3 493 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 3 503 0
+	adrp	x19, .LANCHOR6
+	.loc 3 497 0
+	strh	w1, [x0, #:lo12:.LANCHOR151]
+	.loc 3 498 0
+	adrp	x0, .LANCHOR152
+	.loc 3 500 0
+	mov	w1, -1
+	.loc 3 498 0
+	str	wzr, [x0, #:lo12:.LANCHOR152]
+	.loc 3 499 0
+	adrp	x0, .LANCHOR153
+	str	wzr, [x0, #:lo12:.LANCHOR153]
+	.loc 3 500 0
+	adrp	x0, .LANCHOR154
+	str	w1, [x0, #:lo12:.LANCHOR154]
+	.loc 3 501 0
+	adrp	x0, .LANCHOR35
+	.loc 3 502 0
+	mov	w1, 0
+	.loc 3 501 0
+	strh	wzr, [x0, #:lo12:.LANCHOR35]
+	.loc 3 502 0
+	adrp	x0, .LANCHOR27
+	ldrh	w2, [x0, #:lo12:.LANCHOR27]
+	adrp	x0, .LANCHOR36
+	ldr	x0, [x0, #:lo12:.LANCHOR36]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1108:
+	.loc 3 503 0
+	adrp	x0, .LANCHOR40
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR40]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1109:
+	.loc 3 504 0
+	adrp	x0, .LANCHOR126
+	ldrh	w2, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR126]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1110:
+	.loc 3 505 0
+	mov	w2, 48
+	mov	w1, 0
+	adrp	x0, .LANCHOR79
+	add	x0, x0, :lo12:.LANCHOR79
+	bl	ftl_memset
+.LVL1111:
+	.loc 3 506 0
+	mov	w2, 512
+	mov	w1, 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	bl	ftl_memset
+.LVL1112:
+	.loc 3 507 0
+	bl	FtlGcBufInit
+.LVL1113:
+	.loc 3 508 0
+	bl	FtlL2PDataInit
+.LVL1114:
+	.loc 3 510 0
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE207:
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",@progbits
+	.align	2
+	.global	SupperBlkListInit
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+.LFB285:
+	.loc 2 2067 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 2 2071 0
+	adrp	x0, .LANCHOR6
+	mov	w1, 0
+	.loc 2 2067 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 2071 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR6]
+	mov	w0, 6
+	.loc 2 2067 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 2 2071 0
+	adrp	x24, .LANCHOR41
+	.loc 2 2067 0
+	stp	x19, x20, [sp, 16]
+	.loc 2 2075 0
+	adrp	x23, .LANCHOR45
+	.loc 2 2067 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 2076 0
+	adrp	x22, .LANCHOR48
+	.loc 2 2071 0
+	mul	w2, w2, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR41]
+	.loc 2 2067 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.loc 2 2079 0
+	adrp	x25, .LANCHOR5
+	.loc 2 2067 0
+	str	x27, [sp, 80]
+	.cfi_offset 27, -16
+	.loc 2 2082 0
+	adrp	x26, .LANCHOR13
+	.loc 2 2079 0
+	add	x25, x25, :lo12:.LANCHOR5
+	.loc 2 2082 0
+	add	x26, x26, :lo12:.LANCHOR13
+	.loc 2 2071 0
+	bl	ftl_memset
+.LVL1115:
+	.loc 2 2077 0
+	mov	w21, 0
+	.loc 2 2072 0
+	adrp	x0, .LANCHOR47
+	.loc 2 2077 0
+	mov	w20, 0
+	.loc 2 2079 0
+	mov	w19, 0
+	.loc 2 2075 0
+	strh	wzr, [x23, #:lo12:.LANCHOR45]
+	.loc 2 2072 0
+	str	xzr, [x0, #:lo12:.LANCHOR47]
+	.loc 2 2073 0
+	adrp	x0, .LANCHOR42
+	.loc 2 2076 0
+	strh	wzr, [x22, #:lo12:.LANCHOR48]
+.LVL1116:
+	.loc 2 2081 0
+	adrp	x27, .LANCHOR3
+	.loc 2 2073 0
+	str	xzr, [x0, #:lo12:.LANCHOR42]
+	.loc 2 2074 0
+	adrp	x0, .LANCHOR44
+	str	xzr, [x0, #:lo12:.LANCHOR44]
+.LVL1117:
+.L830:
+	.loc 2 2079 0 discriminator 1
+	ldrh	w0, [x25]
+	cmp	w19, w0
+	bcs	.L836
+	.loc 2 2084 0
+	adrp	x0, .LANCHOR19
+	.loc 2 2081 0
+	ldrh	w8, [x27, #:lo12:.LANCHOR3]
+	.loc 2 2084 0
+	mov	x6, 0
+	mov	w5, 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR19]
+	b	.L837
+.LVL1118:
+.L832:
+	.loc 2 2082 0
+	ldrb	w0, [x26, x6]
+	mov	w1, w19
+	bl	V2P_block
+.LVL1119:
+	.loc 2 2083 0
+	bl	FtlBbmIsBadBlock
+.LVL1120:
+	cbnz	w0, .L831
+	.loc 2 2084 0
+	add	w5, w5, w7
+.LVL1121:
+	and	w5, w5, 65535
+.LVL1122:
+.L831:
+	add	x6, x6, 1
+.LVL1123:
+.L837:
+	.loc 2 2081 0 discriminator 1
+	cmp	w8, w6, uxth
+	bhi	.L832
+	.loc 2 2086 0
+	cbz	w5, .L839
+	.loc 2 2087 0
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.LVL1124:
+.L833:
+	.loc 2 2088 0
+	ldr	x1, [x24, #:lo12:.LANCHOR41]
+	mov	w0, 6
+	umaddl	x0, w19, w0, x1
+	strh	w5, [x0, 4]
+	.loc 2 2090 0
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L834
+	.loc 2 2091 0 discriminator 1
+	adrp	x0, .LANCHOR52
+	.loc 2 2090 0 discriminator 1
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L834
+	.loc 2 2092 0
+	adrp	x0, .LANCHOR53
+	.loc 2 2091 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L834
+	.loc 2 2094 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x19, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L835
+	.loc 2 2095 0
+	add	w21, w21, 1
+.LVL1125:
+	.loc 2 2096 0
+	mov	w0, w19
+	.loc 2 2095 0
+	and	w21, w21, 65535
+.LVL1126:
+	.loc 2 2096 0
+	bl	INSERT_FREE_LIST
+.LVL1127:
+.L834:
+	.loc 2 2079 0 discriminator 2
+	add	w19, w19, 1
+.LVL1128:
+	and	w19, w19, 65535
+.LVL1129:
+	b	.L830
+.LVL1130:
+.L839:
+	mov	w5, 0
+.LVL1131:
+	b	.L833
+.LVL1132:
+.L835:
+	.loc 2 2098 0
+	add	w20, w20, 1
+.LVL1133:
+	.loc 2 2099 0
+	mov	w0, w19
+	.loc 2 2098 0
+	and	w20, w20, 65535
+.LVL1134:
+	.loc 2 2099 0
+	bl	INSERT_DATA_LIST
+.LVL1135:
+	b	.L834
+.L836:
+	.loc 2 2103 0
+	strh	w20, [x23, #:lo12:.LANCHOR45]
+	.loc 2 2105 0
+	add	w20, w20, w21
+.LVL1136:
+	.loc 2 2104 0
+	strh	w21, [x22, #:lo12:.LANCHOR48]
+	.loc 2 2105 0
+	cmp	w20, w0
+	ble	.L838
+	.loc 2 2105 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR155
+	adrp	x0, .LC1
+	mov	w2, 2105
+	add	x1, x1, :lo12:.LANCHOR155
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1137:
+.L838:
+	.loc 2 2107 0 is_stmt 1
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+.LVL1138:
+	ldp	x21, x22, [sp, 32]
+.LVL1139:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE285:
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.ftl_check_vpc,"ax",@progbits
+	.align	2
+	.global	ftl_check_vpc
+	.type	ftl_check_vpc, %function
+ftl_check_vpc:
+.LFB290:
+	.loc 2 2223 0
+	.cfi_startproc
+.LVL1140:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 2 2229 0
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
+	.loc 2 2223 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 2232 0
+	adrp	x23, .LANCHOR62
+	add	x23, x23, :lo12:.LANCHOR62
+	.loc 2 2223 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 2 2232 0
+	mov	w22, 0
+	.loc 2 2223 0
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	.loc 2 2229 0
+	adrp	x21, .LANCHOR156
+	.loc 2 2223 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 2229 0
+	add	x1, x21, :lo12:.LANCHOR156
+	.loc 2 2231 0
+	adrp	x20, check_vpc_table
+	.loc 2 2229 0
+	bl	printf
+.LVL1141:
+	.loc 2 2231 0
+	add	x19, x20, :lo12:check_vpc_table
+	mov	w2, 8192
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+.LVL1142:
+.L842:
+	.loc 2 2232 0 discriminator 1
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L844
+	.loc 2 2243 0 discriminator 1
+	adrp	x22, .LANCHOR5
+.LVL1143:
+	.loc 2 2247 0 discriminator 1
+	adrp	x24, .LC92
+	.loc 2 2243 0 discriminator 1
+	add	x22, x22, :lo12:.LANCHOR5
+	.loc 2 2245 0 discriminator 1
+	add	x26, x20, :lo12:check_vpc_table
+	.loc 2 2247 0 discriminator 1
+	add	x24, x24, :lo12:.LC92
+	mov	w23, 0
+	mov	w19, 0
+	.loc 2 2245 0 discriminator 1
+	adrp	x25, .LANCHOR43
+.LVL1144:
+.L845:
+	.loc 2 2243 0 discriminator 1
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L847
+	.loc 2 2255 0
+	adrp	x0, .LANCHOR47
+	ldr	x19, [x0, #:lo12:.LANCHOR47]
+.LVL1145:
+	cbz	x19, .L848
+.LBB238:
+	.loc 2 2257 0
+	adrp	x0, .LANCHOR48
+	.loc 2 2263 0
+	adrp	x25, .LC93
+	add	x20, x20, :lo12:check_vpc_table
+	add	x25, x25, :lo12:.LC93
+	.loc 2 2257 0
+	ldrh	w26, [x0, #:lo12:.LANCHOR48]
+.LVL1146:
+	.loc 2 2258 0
+	adrp	x0, .LANCHOR41
+	mov	x24, x0
+	.loc 2 2259 0
+	mov	w22, 0
+	.loc 2 2258 0
+	ldr	x1, [x0, #:lo12:.LANCHOR41]
+	.loc 2 2261 0
+	adrp	x27, .LANCHOR43
+	.loc 2 2266 0
+	mov	w28, 6
+	.loc 2 2258 0
+	sub	x19, x19, x1
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+.LVL1147:
+.L849:
+	.loc 2 2259 0 discriminator 1
+	cmp	w22, w26
+	bne	.L851
+.LVL1148:
+.L848:
+.LBE238:
+	.loc 2 2271 0
+	cbz	w23, .L841
+.LVL1149:
+	.loc 2 2271 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 2271
+	add	x1, x21, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1150:
+.L841:
+	.loc 2 2272 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1151:
+.L844:
+	.cfi_restore_state
+	.loc 2 2234 0
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w22
+	bl	log2phys
+.LVL1152:
+	.loc 2 2235 0
+	ldr	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L843
+	.loc 2 2237 0
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1153:
+	.loc 2 2238 0
+	and	x0, x0, 65535
+	ldrh	w1, [x19, x0, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x19, x0, lsl 1]
+.LVL1154:
+.L843:
+	.loc 2 2232 0 discriminator 2
+	add	w22, w22, 1
+.LVL1155:
+	b	.L842
+.LVL1156:
+.L847:
+	.loc 2 2245 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ubfiz	x28, x19, 1, 16
+	sxtw	x27, w19
+	ldrh	w2, [x0, x28]
+	ldrh	w3, [x26, x27, lsl 1]
+	cmp	w2, w3
+	beq	.L846
+	.loc 2 2247 0
+	mov	w1, w19
+	mov	x0, x24
+	bl	printf
+.LVL1157:
+	.loc 2 2248 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	mov	w1, 65535
+	ldrh	w0, [x0, x28]
+	cmp	w0, w1
+	beq	.L846
+	.loc 2 2248 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x26, x27, lsl 1]
+	.loc 2 2250 0 is_stmt 1 discriminator 1
+	cmp	w1, w0
+	csinc	w23, w23, wzr, ls
+.LVL1158:
+.L846:
+	.loc 2 2243 0 discriminator 2
+	add	w19, w19, 1
+.LVL1159:
+	and	w19, w19, 65535
+.LVL1160:
+	b	.L845
+.LVL1161:
+.L851:
+.LBB239:
+	.loc 2 2261 0
+	ldr	x1, [x27, #:lo12:.LANCHOR43]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L850
+	.loc 2 2263 0
+	ldrh	w3, [x20, w19, sxtw 1]
+	.loc 2 2264 0
+	mov	w23, 1
+.LVL1162:
+	.loc 2 2263 0
+	mov	w1, w19
+	mov	x0, x25
+	bl	printf
+.LVL1163:
+.L850:
+	.loc 2 2266 0
+	ldr	x0, [x24, #:lo12:.LANCHOR41]
+	umull	x19, w19, w28
+.LVL1164:
+	ldrh	w19, [x0, x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L848
+.LVL1165:
+	.loc 2 2259 0 discriminator 2
+	add	w22, w22, 1
+.LVL1166:
+	and	w22, w22, 65535
+.LVL1167:
+	b	.L849
+.LBE239:
+	.cfi_endproc
+.LFE290:
+	.size	ftl_check_vpc, .-ftl_check_vpc
+	.section	.text.FtlGcPageVarInit,"ax",@progbits
+	.align	2
+	.global	FtlGcPageVarInit
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+.LFB309:
+	.loc 5 202 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 5 203 0
+	adrp	x0, .LANCHOR97
+	.loc 5 205 0
+	mov	w1, 255
+	.loc 5 202 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 5 203 0
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	.loc 5 204 0
+	adrp	x0, .LANCHOR99
+	.loc 5 202 0
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 5 205 0
+	adrp	x19, .LANCHOR21
+	.loc 5 204 0
+	strh	wzr, [x0, #:lo12:.LANCHOR99]
+	.loc 5 205 0
+	adrp	x0, .LANCHOR98
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR98]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1168:
+	.loc 5 206 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR21]
+	mov	w0, 12
+	mov	w1, 255
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	bl	ftl_memset
+.LVL1169:
+	.loc 5 208 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	.loc 5 207 0
+	b	FtlGcBufInit
+.LVL1170:
+	.cfi_endproc
+.LFE309:
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+.LFB310:
+	.loc 5 211 0
+	.cfi_startproc
+.LVL1171:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 5 220 0
+	adrp	x21, .LANCHOR157
+	.loc 5 211 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	mov	x20, x0
+	stp	x27, x28, [sp, 80]
+	.loc 5 221 0
+	mov	w0, 65535
+.LVL1172:
+	.loc 5 220 0
+	ldrh	w19, [x21, #:lo12:.LANCHOR157]
+.LVL1173:
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 5 211 0
+	mov	w28, w1
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 5 221 0
+	cmp	w19, w0
+	beq	.L885
+	.loc 5 223 0
+	cbnz	w19, .L869
+.L870:
+	.loc 5 224 0
+	bl	FtlGcPageVarInit
+.LVL1174:
+	b	.L871
+.LVL1175:
+.L885:
+	.loc 5 222 0
+	mov	w19, 0
+.LVL1176:
+.L869:
+	.loc 5 223 0 discriminator 1
+	adrp	x0, .LANCHOR19
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w28
+	beq	.L870
+.LVL1177:
+.L871:
+	.loc 5 235 0
+	adrp	x27, .LANCHOR23
+	add	x27, x27, :lo12:.LANCHOR23
+	.loc 5 222 0
+	mov	w22, 0
+	.loc 5 228 0
+	mov	w23, 65535
+.LVL1178:
+.L879:
+	ldrh	w0, [x20]
+	.loc 5 226 0
+	strb	wzr, [x20, 8]
+.LVL1179:
+	.loc 5 228 0
+	cmp	w0, w23
+	beq	.L886
+	.loc 5 236 0
+	adrp	x25, .LANCHOR24
+	.loc 5 231 0
+	adrp	x26, .LANCHOR3
+	.loc 5 236 0
+	add	x25, x25, :lo12:.LANCHOR24
+	.loc 5 231 0
+	add	x26, x26, :lo12:.LANCHOR3
+.L882:
+.LVL1180:
+	.loc 5 235 0
+	adrp	x1, .LANCHOR93
+	.loc 5 234 0
+	adrp	x24, .LANCHOR120
+	.loc 5 235 0
+	ldrh	w7, [x27]
+	add	x5, x20, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR93]
+	.loc 5 236 0
+	adrp	x1, .LANCHOR94
+	.loc 5 234 0
+	ldr	x0, [x24, #:lo12:.LANCHOR120]
+	.loc 5 230 0
+	mov	w3, 0
+	.loc 5 236 0
+	ldr	x8, [x1, #:lo12:.LANCHOR94]
+	ldrh	w1, [x26]
+	ldrh	w10, [x25]
+	add	x1, x1, 8
+	add	x1, x20, x1, lsl 1
+.LVL1181:
+.L873:
+	.loc 5 231 0 discriminator 1
+	cmp	x1, x5
+	bne	.L875
+	.loc 5 240 0
+	mov	w1, w3
+	str	w3, [x29, 108]
+	mov	w2, 0
+	bl	FlashReadPages
+.LVL1182:
+	ldr	w3, [x29, 108]
+	.loc 5 241 0
+	mov	x11, 0
+	ubfiz	x12, x3, 5, 16
+.LVL1183:
+.L876:
+	.loc 5 241 0 is_stmt 0 discriminator 1
+	cmp	x11, x12
+	bne	.L880
+	.loc 5 264 0 is_stmt 1
+	add	w19, w19, 1
+.LVL1184:
+	.loc 5 266 0
+	add	w22, w22, 1
+.LVL1185:
+	.loc 5 264 0
+	and	w19, w19, 65535
+.LVL1186:
+	.loc 5 268 0
+	cmp	w28, w22
+	adrp	x1, .LANCHOR19
+	bls	.L881
+.L883:
+	.loc 5 274 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w19
+	bhi	.L882
+.L886:
+	.loc 5 227 0
+	mov	w2, 0
+	b	.L872
+.LVL1187:
+.L875:
+	.loc 5 232 0
+	ldrh	w4, [x5]
+.LVL1188:
+	.loc 5 233 0
+	cmp	w4, w23
+	beq	.L874
+	.loc 5 234 0
+	ubfiz	x2, x3, 5, 16
+	orr	w4, w19, w4, lsl 10
+.LVL1189:
+	add	x2, x0, x2
+	str	w4, [x2, 4]
+	.loc 5 235 0
+	mul	w4, w3, w7
+	asr	w4, w4, 2
+	add	x4, x6, x4, sxtw 2
+	str	x4, [x2, 8]
+	.loc 5 236 0
+	mul	w4, w3, w10
+	.loc 5 237 0
+	add	w3, w3, 1
+.LVL1190:
+	and	w3, w3, 65535
+.LVL1191:
+	.loc 5 236 0
+	asr	w4, w4, 2
+	add	x4, x8, x4, sxtw 2
+	str	x4, [x2, 16]
+.L874:
+	add	x5, x5, 2
+.LVL1192:
+	b	.L873
+.LVL1193:
+.L880:
+	.loc 5 242 0
+	ldr	x6, [x24, #:lo12:.LANCHOR120]
+	add	x5, x6, x11
+	ldr	w4, [x5, 4]
+.LVL1194:
+	.loc 5 243 0
+	lsr	w0, w4, 10
+	bl	P2V_plane
+.LVL1195:
+	and	w2, w0, 65535
+.LVL1196:
+	.loc 5 245 0
+	ldr	w0, [x6, x11]
+.LVL1197:
+	cbnz	w0, .L877
+	.loc 5 247 0
+	ldr	x0, [x5, 16]
+.LVL1198:
+	add	x11, x11, 32
+	.loc 5 248 0
+	ldrh	w1, [x0]
+	cmp	w1, w23
+	bne	.L878
+	.loc 5 249 0
+	adrp	x0, .LANCHOR153
+.LVL1199:
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR153]
+.LVL1200:
+.L872:
+	.loc 5 282 0
+	strh	w19, [x20, 2]
+	.loc 5 281 0
+	mov	w0, -1
+	.loc 5 283 0
+	strb	w2, [x20, 6]
+	.loc 5 284 0
+	mov	w1, w19
+	.loc 5 281 0
+	strh	w0, [x21, #:lo12:.LANCHOR157]
+	.loc 5 284 0
+	mov	x0, x20
+	bl	ftl_sb_update_avl_pages
+.LVL1201:
+	.loc 5 285 0
+	b	.L884
+.LVL1202:
+.L878:
+	.loc 5 252 0
+	ldp	w2, w0, [x0, 8]
+.LVL1203:
+	mov	w1, w4
+	bl	FtlGcUpdatePage
+.LVL1204:
+	b	.L876
+.LVL1205:
+.L877:
+	.loc 5 256 0
+	adrp	x0, .LANCHOR43
+	ldrh	w1, [x20]
+	.loc 5 259 0
+	mov	w19, 0
+.LVL1206:
+	.loc 5 256 0
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	strh	wzr, [x0, x1, lsl 1]
+	.loc 5 257 0
+	ldrh	w0, [x20]
+	bl	INSERT_FREE_LIST
+.LVL1207:
+	.loc 5 258 0
+	mov	w0, -1
+	strh	w0, [x20]
+.LVL1208:
+	.loc 5 260 0
+	bl	FtlGcPageVarInit
+.LVL1209:
+	.loc 5 261 0
+	b	.L879
+.LVL1210:
+.L881:
+	.loc 5 268 0 discriminator 1
+	ldrh	w0, [x21, #:lo12:.LANCHOR157]
+	cmp	w0, w23
+	beq	.L883
+	.loc 5 269 0
+	add	w0, w0, w22
+	strh	w0, [x21, #:lo12:.LANCHOR157]
+	.loc 5 270 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	cmp	w0, w19
+	bls	.L883
+.LVL1211:
+.L884:
+	.loc 5 286 0
+	ldp	x19, x20, [sp, 16]
+.LVL1212:
+	mov	w0, -1
+	ldp	x21, x22, [sp, 32]
+.LVL1213:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL1214:
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE310:
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FlashTestBlk,"ax",@progbits
+	.align	2
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+.LFB343:
+	.loc 1 193 0
+	.cfi_startproc
+.LVL1215:
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	.loc 1 193 0
+	and	w19, w0, 65535
+	.loc 1 198 0
+	cmp	w19, 11
+	bls	.L894
+.LVL1216:
+.LBB242:
+.LBB243:
+	.loc 1 203 0
+	add	x0, x29, 64
+.LVL1217:
+	.loc 1 204 0
+	mov	w2, 32
+	mov	w1, 165
+	.loc 1 202 0
+	adrp	x20, ftl_temp_buf
+	add	x20, x20, :lo12:ftl_temp_buf
+	.loc 1 203 0
+	stp	x20, x0, [x29, 40]
+	.loc 1 204 0
+	bl	ftl_memset
+.LVL1218:
+	.loc 1 206 0
+	lsl	w19, w19, 10
+.LVL1219:
+	.loc 1 205 0
+	mov	w2, 8
+	mov	w1, 90
+	mov	x0, x20
+	bl	ftl_memset
+.LVL1220:
+	.loc 1 207 0
+	mov	w2, 1
+	.loc 1 206 0
+	str	w19, [x29, 36]
+	.loc 1 207 0
+	mov	w1, w2
+	add	x0, x29, 32
+	bl	FlashEraseBlocks
+.LVL1221:
+	.loc 1 208 0
+	mov	w3, 1
+	add	x0, x29, 32
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1222:
+	.loc 1 209 0
+	ldr	w0, [x29, 32]
+	.loc 1 215 0
+	mov	w2, 1
+	mov	w1, 0
+	.loc 1 209 0
+	cmp	w0, 0
+	.loc 1 215 0
+	add	x0, x29, 32
+	.loc 1 209 0
+	csetm	w19, ne
+.LDL1:
+.LVL1223:
+	.loc 1 215 0
+	bl	FlashEraseBlocks
+.LVL1224:
+.L892:
+.LBE243:
+.LBE242:
+	.loc 1 217 0
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1225:
+.L894:
+	.cfi_restore_state
+	.loc 1 199 0
+	mov	w19, 0
+	b	.L892
+	.cfi_endproc
+.LFE343:
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+.LFB344:
+	.loc 1 220 0
+	.cfi_startproc
+.LVL1226:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 1 223 0
+	mov	w2, 256
+	.loc 1 220 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 1 220 0
+	mov	x19, x0
+	mov	w20, w1
+	.loc 1 223 0
+	mov	w1, 255
+.LVL1227:
+	bl	ftl_memset
+.LVL1228:
+	.loc 1 224 0
+	adrp	x0, .LANCHOR107
+	mov	w1, w20
+	ldr	x2, [x0, #:lo12:.LANCHOR107]
+	mov	x0, x19
+	blr	x2
+.LVL1229:
+	and	w0, w0, 65535
+.LVL1230:
+	.loc 1 225 0
+	cmp	w0, 50
+	bls	.L897
+	.loc 1 226 0
+	mov	w2, 256
+	mov	w1, 255
+	mov	x0, x19
+.LVL1231:
+	bl	ftl_memset
+.LVL1232:
+	.loc 1 227 0
+	mov	w0, 0
+.LVL1233:
+.L897:
+	.loc 1 229 0
+	adrp	x1, .LANCHOR0+14
+	ldrh	w1, [x1, #:lo12:.LANCHOR0+14]
+	cmp	w1, 4
+	bne	.L901
+	mov	x1, 0
+.L899:
+.LVL1234:
+	.loc 1 230 0 discriminator 1
+	cmp	w0, w1, uxth
+	bhi	.L900
+.LVL1235:
+.L901:
+	.loc 1 235 0
+	ldp	x19, x20, [sp, 16]
+.LVL1236:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1237:
+.L900:
+	.cfi_restore_state
+	.loc 1 231 0 discriminator 3
+	ldrh	w2, [x19, x1, lsl 1]
+	lsr	w2, w2, 1
+	strh	w2, [x19, x1, lsl 1]
+.LVL1238:
+	add	x1, x1, 1
+.LVL1239:
+	b	.L899
+	.cfi_endproc
+.LFE344:
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+.LFB346:
+	.loc 1 243 0
+	.cfi_startproc
+.LVL1240:
+	.loc 1 244 0
+	uxtw	x2, w2
+	b	memcpy
+.LVL1241:
+	.cfi_endproc
+.LFE346:
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+.LFB226:
+	.loc 4 80 0
+	.cfi_startproc
+.LVL1242:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 4 88 0
+	adrp	x23, .LANCHOR109
+	.loc 4 80 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 4 87 0
+	adrp	x19, .LANCHOR108
+	.loc 4 80 0
+	stp	x21, x22, [sp, 32]
+	.loc 4 87 0
+	add	x20, x19, :lo12:.LANCHOR108
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	adrp	x22, .LANCHOR39
+	.loc 4 88 0
+	ldr	x1, [x23, #:lo12:.LANCHOR109]
+	.loc 4 80 0
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR37
+	str	x27, [sp, 80]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.cfi_offset 27, -16
+	add	x25, x21, :lo12:.LANCHOR37
+	.loc 4 87 0
+	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	.loc 4 91 0
+	adrp	x26, .LANCHOR10
+	.loc 4 88 0
+	stp	x0, x1, [x20, 8]
+	.loc 4 89 0
+	adrp	x1, .LANCHOR23
+	.loc 4 92 0
+	adrp	x27, .LANCHOR137
+	add	x25, x25, 32
+	.loc 4 89 0
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	.loc 4 91 0
+	mov	w24, 0
+	add	x26, x26, :lo12:.LANCHOR10
+	.loc 4 92 0
+	add	x27, x27, :lo12:.LANCHOR137
+	.loc 4 89 0
+	mov	w1, 0
+	bl	ftl_memset
+.LVL1243:
+.L905:
+	.loc 4 91 0 discriminator 1
+	ldrh	w0, [x26]
+	cmp	w24, w0
+	blt	.L906
+	.loc 4 94 0
+	add	x19, x19, :lo12:.LANCHOR108
+	.loc 4 98 0
+	add	x20, x21, :lo12:.LANCHOR37
+	.loc 4 95 0
+	mov	w2, 16
+	mov	w1, 255
+	.loc 4 108 0
+	adrp	x24, .LC94
+.LVL1244:
+	.loc 4 110 0
+	adrp	x26, .LANCHOR20
+	.loc 4 94 0
+	ldr	x27, [x19, 16]
+.LVL1245:
+	.loc 4 108 0
+	add	x24, x24, :lo12:.LC94
+	.loc 4 110 0
+	add	x26, x26, :lo12:.LANCHOR20
+	.loc 4 82 0
+	mov	w25, 0
+	.loc 4 95 0
+	mov	x0, x27
+	bl	ftl_memset
+.LVL1246:
+	.loc 4 97 0
+	mov	w0, -3887
+	strh	w0, [x27]
+	.loc 4 98 0
+	ldr	w0, [x20, 8]
+	str	w0, [x27, 4]
+	.loc 4 99 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR37]
+	.loc 4 84 0
+	mov	w21, 0
+	.loc 4 99 0
+	strh	w0, [x27, 2]
+	.loc 4 100 0
+	ldrh	w0, [x20, 4]
+	strh	w0, [x27, 8]
+	.loc 4 101 0
+	ldrh	w0, [x20, 6]
+	strh	w0, [x27, 10]
+	.loc 4 102 0
+	adrp	x0, .LANCHOR2
+	ldr	w0, [x0, #:lo12:.LANCHOR2]
+	strh	w0, [x27, 12]
+.LVL1247:
+.L907:
+	.loc 4 108 0
+	ldrh	w4, [x27, 10]
+	.loc 4 107 0
+	ldrh	w1, [x20]
+	ldrh	w2, [x20, 2]
+	.loc 4 108 0
+	ldrh	w3, [x20, 4]
+	.loc 4 104 0
+	ldr	x0, [x22, #:lo12:.LANCHOR39]
+	str	x0, [x19, 8]
+	.loc 4 105 0
+	ldr	x0, [x23, #:lo12:.LANCHOR109]
+	str	x0, [x19, 16]
+	.loc 4 107 0
+	orr	w0, w2, w1, lsl 10
+	.loc 4 106 0
+	str	wzr, [x19]
+	.loc 4 107 0
+	str	w0, [x19, 4]
+	.loc 4 108 0
+	mov	x0, x24
+	bl	printf
+.LVL1248:
+	.loc 4 109 0
+	mov	w3, 1
+	mov	x0, x19
+	mov	w1, w3
+	mov	w2, w3
+	bl	FlashProgPages
+.LVL1249:
+	.loc 4 110 0
+	ldrh	w0, [x26]
+	ldrh	w1, [x20, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L908
+	.loc 4 113 0
+	ldr	w0, [x20, 8]
+	.loc 4 122 0
+	mov	w2, 1
+	.loc 4 116 0
+	ldrh	w1, [x20, 4]
+	.loc 4 113 0
+	add	w0, w0, 1
+	str	w0, [x20, 8]
+	.loc 4 114 0
+	str	w0, [x27, 4]
+	.loc 4 115 0
+	ldrh	w0, [x20]
+	strh	w0, [x27, 8]
+	.loc 4 118 0
+	strh	w0, [x20, 4]
+	.loc 4 121 0
+	adrp	x0, .LANCHOR112
+	.loc 4 116 0
+	strh	w1, [x20]
+	.loc 4 119 0
+	lsl	w1, w1, 10
+	.loc 4 121 0
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	.loc 4 119 0
+	str	w1, [x19, 4]
+	.loc 4 117 0
+	strh	wzr, [x20, 2]
+	.loc 4 121 0
+	str	w1, [x0, 4]
+	.loc 4 122 0
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL1250:
+	.loc 4 123 0
+	mov	w3, 1
+	mov	x0, x19
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1251:
+.L908:
+	.loc 4 126 0
+	ldrh	w0, [x20, 2]
+	add	w0, w0, 1
+	strh	w0, [x20, 2]
+	.loc 4 127 0
+	ldr	w0, [x19]
+	cmn	w0, #1
+	bne	.L909
+	.loc 4 129 0
+	ldr	w1, [x19, 4]
+	.loc 4 130 0
+	add	w21, w21, 1
+.LVL1252:
+	.loc 4 129 0
+	adrp	x0, .LC95
+	.loc 4 130 0
+	and	w21, w21, 65535
+	.loc 4 129 0
+	add	x0, x0, :lo12:.LC95
+	bl	printf
+.LVL1253:
+	.loc 4 131 0
+	cmp	w21, 3
+	bls	.L907
+	.loc 4 132 0
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC96
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC96
+	bl	printf
+.LVL1254:
+.L911:
+	b	.L911
+.LVL1255:
+.L906:
+	.loc 4 92 0 discriminator 3
+	ldrh	w2, [x27]
+	ldr	x1, [x25], 8
+	ldr	x0, [x20, 8]
+	mul	w3, w24, w2
+	lsl	w2, w2, 2
+	.loc 4 91 0 discriminator 3
+	add	w24, w24, 1
+.LVL1256:
+	.loc 4 92 0 discriminator 3
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+.LVL1257:
+	b	.L905
+.LVL1258:
+.L912:
+	mov	w25, 1
+.LVL1259:
+	b	.L907
+.LVL1260:
+.L909:
+	.loc 4 139 0
+	cbz	w25, .L912
+	.loc 4 146 0
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+.LVL1261:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+.LVL1262:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1263:
+	ldp	x29, x30, [sp], 96
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE226:
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+.LFB298:
+	.loc 2 2531 0
+	.cfi_startproc
+.LVL1264:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 2537 0
+	adrp	x28, .LANCHOR48
+	.loc 2 2531 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 2540 0
+	add	x23, x28, :lo12:.LANCHOR48
+	.loc 2 2531 0
+	stp	x19, x20, [sp, 16]
+	.loc 2 2537 0
+	adrp	x27, .LANCHOR45
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.loc 2 2531 0
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.loc 2 2537 0
+	add	x0, x27, :lo12:.LANCHOR45
+.LVL1265:
+	.loc 2 2531 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 2 2537 0
+	str	x0, [x29, 104]
+.LVL1266:
+.L915:
+	ldr	x1, [x29, 104]
+	adrp	x24, .LANCHOR5
+	ldrh	w0, [x28, #:lo12:.LANCHOR48]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L916
+	.loc 2 2537 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2537
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1267:
+.L916:
+	.loc 2 2539 0 is_stmt 1
+	adrp	x0, .LANCHOR53
+	add	x0, x0, :lo12:.LANCHOR53
+	cmp	x19, x0
+	bne	.L941
+	.loc 2 2540 0
+	adrp	x1, .LANCHOR89
+	ldrh	w0, [x23]
+	ldr	w1, [x1, #:lo12:.LANCHOR89]
+	mul	w1, w0, w1
+	lsr	w0, w0, 1
+	add	w0, w0, 1
+	add	w1, w0, w1, lsr 2
+.LVL1268:
+	.loc 2 2544 0
+	ands	w1, w1, 65535
+	beq	.L917
+	.loc 2 2545 0
+	sub	w1, w1, #1
+.LVL1269:
+	and	w1, w1, 65535
+.LVL1270:
+.L917:
+	.loc 2 2546 0
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
+	bl	List_pop_index_node
+.LVL1271:
+	and	w20, w0, 65535
+.LVL1272:
+	ldrh	w0, [x23]
+	cbnz	w0, .L918
+	.loc 2 2546 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2546
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1273:
+.L918:
+	.loc 2 2546 0 discriminator 3
+	ldrh	w0, [x23]
+	sub	w0, w0, #1
+	strh	w0, [x23]
+	.loc 2 2549 0 is_stmt 1 discriminator 3
+	strh	w20, [x19]
+	.loc 2 2550 0 discriminator 3
+	mov	x0, x19
+	bl	make_superblock
+.LVL1274:
+	.loc 2 2551 0 discriminator 3
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L919
+	.loc 2 2555 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x20, 1, 16
+	mov	w2, -1
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	strh	w2, [x1, x0]
+	.loc 2 2556 0
+	mov	w0, w20
+	bl	INSERT_DATA_LIST
+.LVL1275:
+	.loc 2 2557 0
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L915
+	.loc 2 2557 0 is_stmt 0 discriminator 1
+	mov	w2, 2557
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1276:
+	b	.L915
+.LVL1277:
+.L941:
+	mov	w1, 0
+	b	.L917
+.LVL1278:
+.L919:
+	.loc 2 2560 0 is_stmt 1
+	ldrh	w1, [x27, #:lo12:.LANCHOR45]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L921
+	.loc 2 2560 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2560
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1279:
+.L921:
+	.loc 2 2563 0 is_stmt 1 discriminator 1
+	adrp	x0, .LANCHOR3
+	.loc 2 2564 0 discriminator 1
+	adrp	x25, .LANCHOR112
+	add	x26, x19, 16
+	mov	w21, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	mov	x4, x26
+	ldr	x3, [x25, #:lo12:.LANCHOR112]
+	.loc 2 2566 0 discriminator 1
+	mov	w6, 65535
+	ubfiz	x0, x0, 5, 16
+	add	x1, x3, 8
+	add	x0, x0, 8
+	add	x0, x3, x0
+.L922:
+.LVL1280:
+	.loc 2 2563 0 discriminator 1
+	cmp	x0, x1
+	bne	.L924
+	.loc 2 2571 0
+	cbnz	w21, .L925
+	.loc 2 2571 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2571
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1281:
+.L925:
+	.loc 2 2573 0 is_stmt 1
+	adrp	x0, .LANCHOR82
+	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+	cmp	w0, w20
+	bne	.L926
+	.loc 2 2573 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2573
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1282:
+.L926:
+	.loc 2 2574 0 is_stmt 1
+	ldrb	w0, [x19, 8]
+	uxtw	x22, w20
+	adrp	x6, .LANCHOR40
+	adrp	x7, .LANCHOR14
+	adrp	x5, .LANCHOR73
+	adrp	x4, .LANCHOR74
+	cbnz	w0, .L927
+	.loc 2 2575 0
+	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	lsl	x1, x22, 1
+	ldrh	w0, [x2, x1]
+	cbz	w0, .L928
+	.loc 2 2576 0
+	ldrh	w3, [x7, #:lo12:.LANCHOR14]
+	add	w0, w0, w3
+.L952:
+	.loc 2 2578 0
+	strh	w0, [x2, x1]
+	.loc 2 2580 0
+	mov	w1, 0
+	.loc 2 2579 0
+	ldr	w0, [x5, #:lo12:.LANCHOR73]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR73]
+	.loc 2 2580 0
+	mov	w0, w20
+	bl	ftl_set_blk_mode
+.LVL1283:
+.L930:
+	.loc 2 2587 0
+	ldr	x0, [x6, #:lo12:.LANCHOR40]
+	lsl	x22, x22, 1
+	ldrh	w1, [x0, x22]
+	adrp	x0, .LANCHOR77
+	ldr	w2, [x0, #:lo12:.LANCHOR77]
+	cmp	w1, w2
+	bls	.L931
+	.loc 2 2588 0
+	str	w1, [x0, #:lo12:.LANCHOR77]
+.L931:
+	.loc 2 2590 0
+	ldr	w2, [x5, #:lo12:.LANCHOR73]
+	ldr	w1, [x4, #:lo12:.LANCHOR74]
+	ldrh	w0, [x7, #:lo12:.LANCHOR14]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR75
+	str	w0, [x1, #:lo12:.LANCHOR75]
+	.loc 2 2591 0
+	adrp	x0, .LANCHOR127
+	ldr	x1, [x0, #:lo12:.LANCHOR127]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+.LVL1284:
+	.loc 2 2594 0
+	ldr	x0, [x25, #:lo12:.LANCHOR112]
+	ubfiz	x1, x21, 5, 16
+	add	x1, x1, 4
+	add	x2, x0, 4
+	add	x1, x0, x1
+.LVL1285:
+.L932:
+	.loc 2 2593 0 discriminator 1
+	cmp	x1, x2
+	bne	.L933
+	.loc 2 2595 0
+	ldrb	w1, [x19, 8]
+	mov	w2, w21
+	.loc 2 2597 0
+	mov	x24, 0
+	.loc 2 2595 0
+	bl	FlashEraseBlocks
+.LVL1286:
+	.loc 2 2596 0
+	mov	w1, 0
+.LVL1287:
+.L934:
+	.loc 2 2597 0 discriminator 1
+	cmp	w21, w24, uxth
+	bhi	.L936
+	.loc 2 2608 0
+	cbz	w1, .L937
+	.loc 2 2609 0
+	mov	w0, w20
+	bl	update_multiplier_value
+.LVL1288:
+	.loc 2 2610 0
+	bl	FtlBbmTblFlush
+.LVL1289:
+.L937:
+	.loc 2 2613 0
+	ldrb	w0, [x19, 7]
+	adrp	x2, .LANCHOR43
+	cbnz	w0, .L938
+	.loc 2 2615 0
+	ldr	x0, [x2, #:lo12:.LANCHOR43]
+	mov	w1, -1
+	strh	w1, [x0, x22]
+	.loc 2 2616 0
+	mov	w0, w20
+	bl	INSERT_DATA_LIST
+.LVL1290:
+	.loc 2 2617 0
+	b	.L915
+.LVL1291:
+.L924:
+	.loc 2 2566 0
+	ldrh	w2, [x4]
+	.loc 2 2565 0
+	stp	xzr, xzr, [x1]
+	.loc 2 2566 0
+	cmp	w2, w6
+	beq	.L923
+	.loc 2 2567 0
+	ubfiz	x5, x21, 5, 16
+	.loc 2 2568 0
+	add	w21, w21, 1
+.LVL1292:
+	.loc 2 2567 0
+	add	x5, x3, x5
+	.loc 2 2568 0
+	and	w21, w21, 65535
+.LVL1293:
+	.loc 2 2567 0
+	lsl	w2, w2, 10
+	str	w2, [x5, 4]
+.L923:
+	add	x1, x1, 32
+	add	x4, x4, 2
+	b	.L922
+.L928:
+	.loc 2 2578 0
+	mov	w0, 2
+	b	.L952
+.L927:
+	.loc 2 2582 0
+	ldr	x2, [x6, #:lo12:.LANCHOR40]
+	lsl	x0, x22, 1
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	.loc 2 2583 0
+	ldr	w0, [x4, #:lo12:.LANCHOR74]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR74]
+.LVL1294:
+.LBB244:
+.LBB245:
+	mov	w0, w20
+	bl	ftl_set_blk_mode.part.7
+.LVL1295:
+	b	.L930
+.LVL1296:
+.L933:
+.LBE245:
+.LBE244:
+	.loc 2 2594 0 discriminator 3
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 32
+	b	.L932
+.LVL1297:
+.L936:
+	.loc 2 2598 0
+	ldr	x2, [x25, #:lo12:.LANCHOR112]
+	lsl	x0, x24, 5
+	add	x3, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L935
+	.loc 2 2599 0
+	add	w1, w1, 1
+.LVL1298:
+	.loc 2 2600 0
+	ldr	w0, [x3, 4]
+	.loc 2 2599 0
+	stp	w2, w1, [x29, 96]
+.LVL1299:
+	.loc 2 2601 0
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL1300:
+	.loc 2 2603 0
+	ldp	w2, w1, [x29, 96]
+	.loc 2 2602 0
+	strh	w2, [x26]
+	.loc 2 2603 0
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+.LVL1301:
+.L935:
+	add	x24, x24, 1
+.LVL1302:
+	add	x26, x26, 2
+	b	.L934
+.LVL1303:
+.L938:
+	.loc 2 2620 0
+	adrp	x1, .LANCHOR19
+	.loc 2 2624 0
+	adrp	x3, .LANCHOR71
+	.loc 2 2623 0
+	strb	wzr, [x19, 6]
+	.loc 2 2620 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	.loc 2 2622 0
+	strh	wzr, [x19, 2]
+	.loc 2 2621 0
+	strh	w20, [x19]
+	.loc 2 2620 0
+	mul	w0, w0, w1
+	.loc 2 2624 0
+	ldr	w1, [x3, #:lo12:.LANCHOR71]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x3, #:lo12:.LANCHOR71]
+	.loc 2 2625 0
+	ldr	x1, [x2, #:lo12:.LANCHOR43]
+	.loc 2 2620 0
+	and	w0, w0, 65535
+	strh	w0, [x19, 4]
+	.loc 2 2625 0
+	strh	w0, [x1, x22]
+	.loc 2 2626 0
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L939
+	.loc 2 2626 0 is_stmt 0 discriminator 2
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L940
+.L939:
+	.loc 2 2626 0 discriminator 3
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC1
+	mov	w2, 2626
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1304:
+.L940:
+	.loc 2 2628 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL1305:
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+.LVL1306:
+	ldp	x23, x24, [sp, 48]
+.LVL1307:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE298:
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+.LFB317:
+	.loc 5 390 0
+	.cfi_startproc
+.LVL1308:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 5 395 0
+	adrp	x21, .LANCHOR103
+	.loc 5 390 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	and	w25, w0, 65535
+	.loc 5 395 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR103]
+.LVL1309:
+	.loc 5 390 0
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 27, -16
+	.loc 5 395 0
+	cbz	w0, .L954
+.LBB248:
+.LBB249:
+	.loc 5 399 0
+	adrp	x23, .LANCHOR104
+	.loc 5 406 0
+	add	x24, x23, :lo12:.LANCHOR104
+.LBE249:
+.LBE248:
+	mov	w19, 0
+.L955:
+.LVL1310:
+.LBB252:
+.LBB250:
+	.loc 5 396 0
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w0, w19
+	bhi	.L961
+	.loc 5 412 0
+	bl	FtlGcReFreshBadBlk
+.LVL1311:
+.L954:
+.LBE250:
+.LBE252:
+	.loc 5 415 0
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1312:
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1313:
+.L961:
+	.cfi_restore_state
+.LBB253:
+.LBB251:
+	.loc 5 397 0
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	mov	w1, w25
+	.loc 5 398 0
+	add	x22, x21, :lo12:.LANCHOR103
+	mov	w20, 0
+	.loc 5 397 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+.LVL1314:
+	and	w26, w0, 65535
+.LVL1315:
+.L956:
+	.loc 5 398 0
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L960
+	.loc 5 396 0
+	add	w19, w19, 1
+.LVL1316:
+	and	w19, w19, 65535
+.LVL1317:
+	b	.L955
+.L960:
+	.loc 5 399 0
+	add	x0, x23, :lo12:.LANCHOR104
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L957
+	.loc 5 401 0
+	mov	w1, w26
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
+	bl	printf
+.LVL1318:
+	.loc 5 403 0
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+.LVL1319:
+	.loc 5 404 0
+	bl	FtlBbmTblFlush
+.LVL1320:
+	.loc 5 405 0
+	ldrh	w1, [x22]
+	.loc 5 406 0
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	.loc 5 405 0
+	mov	x0, 0
+.LVL1321:
+.L958:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L959
+	.loc 5 407 0
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.LVL1322:
+.L957:
+	.loc 5 398 0
+	and	w20, w27, 65535
+.LVL1323:
+	b	.L956
+.LVL1324:
+.L959:
+	.loc 5 406 0
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+.LVL1325:
+	strh	w5, [x24, x2, lsl 1]
+	b	.L958
+.LBE251:
+.LBE253:
+	.cfi_endproc
+.LFE317:
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
+	.align	2
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+.LFB301:
+	.loc 2 2687 0
+	.cfi_startproc
+.LVL1326:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 2688 0
+	adrp	x1, .LANCHOR43
+	.loc 2 2687 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 2687 0
+	and	w19, w0, 65535
+	.loc 2 2688 0
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ubfiz	x0, x19, 1, 16
+.LVL1327:
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L967
+	.loc 2 2689 0
+	adrp	x0, .LANCHOR82
+	ldrh	w1, [x0, #:lo12:.LANCHOR82]
+	cmp	w1, w19
+	bne	.L968
+	.loc 2 2691 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR82]
+.L969:
+.LVL1328:
+.LBB256:
+.LBB257:
+	.loc 2 2696 0
+	adrp	x20, .LANCHOR45
+	mov	w1, w19
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	bl	List_remove_node
+.LVL1329:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	cbnz	w0, .L971
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC1
+	mov	w2, 2696
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1330:
+.L971:
+	ldrh	w0, [x20, #:lo12:.LANCHOR45]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR45]
+	.loc 2 2697 0
+	mov	w0, w19
+	bl	free_data_superblock
+.LVL1331:
+	.loc 2 2698 0
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+.LVL1332:
+	.loc 2 2699 0
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x20, #:lo12:.LANCHOR45]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	cmp	w0, w1
+	ble	.L975
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC1
+	mov	w2, 2699
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1333:
+.L975:
+	mov	w0, 1
+	b	.L966
+.LVL1334:
+.L968:
+.LBE257:
+.LBE256:
+	.loc 2 2692 0
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L974
+	.loc 2 2692 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L974
+	.loc 2 2692 0 discriminator 2
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	bne	.L969
+.L974:
+	.loc 2 2694 0 is_stmt 1
+	mov	w0, 0
+.L966:
+	.loc 2 2705 0
+	ldp	x19, x20, [sp, 16]
+.LVL1335:
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L967:
+	.cfi_restore_state
+	.loc 2 2702 0
+	mov	w0, w19
+	bl	List_update_data_list
+.LVL1336:
+	b	.L974
+	.cfi_endproc
+.LFE301:
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
+	.align	2
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+.LFB302:
+	.loc 2 2708 0
+	.cfi_startproc
+.LVL1337:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2711 0
+	mov	w0, 65535
+.LVL1338:
+	cmp	w19, w0
+	beq	.L978
+	.loc 2 2712 0
+	adrp	x21, .LANCHOR43
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L979
+	.loc 2 2713 0
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
+	bl	printf
+.LVL1339:
+	.loc 2 2714 0
+	ldr	x0, [x21, #:lo12:.LANCHOR43]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L980
+.L985:
+.LVL1340:
+	.loc 2 2715 0 discriminator 1
+	mov	w20, 0
+.LVL1341:
+.L977:
+	.loc 2 2733 0
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL1342:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1343:
+.L980:
+	.cfi_restore_state
+	.loc 2 2714 0 discriminator 1
+	mov	w2, 2714
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1344:
+	b	.L985
+.L979:
+	.loc 2 2717 0
+	sub	w0, w0, #1
+	strh	w0, [x1, x20]
+.L978:
+	.loc 2 2721 0
+	adrp	x21, .LANCHOR151
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR151]
+	cmp	w0, w1
+	bne	.L982
+	.loc 2 2722 0
+	strh	w19, [x21, #:lo12:.LANCHOR151]
+	b	.L985
+.L982:
+	.loc 2 2724 0
+	cmp	w19, w0
+	beq	.L985
+	.loc 2 2727 0
+	bl	update_vpc_list
+.LVL1345:
+	cmp	w0, 0
+	.loc 2 2730 0
+	adrp	x1, .LANCHOR41
+	adrp	x0, .LANCHOR42
+	.loc 2 2729 0
+	strh	w19, [x21, #:lo12:.LANCHOR151]
+	.loc 2 2727 0
+	cset	w20, ne
+.LVL1346:
+	.loc 2 2730 0
+	ldr	x1, [x1, #:lo12:.LANCHOR41]
+	ldr	x0, [x0, #:lo12:.LANCHOR42]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR43
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L977
+	.loc 2 2730 0 is_stmt 0 discriminator 1
+	cmp	w19, w0, uxth
+	beq	.L977
+	.loc 2 2730 0 discriminator 2
+	mov	w2, 2730
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1347:
+	b	.L977
+	.cfi_endproc
+.LFE302:
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlWriteDump_data,"ax",@progbits
+	.align	2
+	.global	FtlWriteDump_data
+	.type	FtlWriteDump_data, %function
+FtlWriteDump_data:
+.LFB268:
+	.loc 2 947 0 is_stmt 1
+	.cfi_startproc
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	.loc 2 948 0
+	adrp	x19, .LANCHOR51
+	add	x0, x19, :lo12:.LANCHOR51
+	.loc 2 947 0
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	.loc 2 948 0
+	ldrh	w2, [x0, 4]
+	.loc 2 947 0
+	str	x25, [sp, 64]
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	.cfi_offset 25, -64
+	.loc 2 948 0
+	cbz	w2, .L987
+	.loc 2 948 0 is_stmt 0 discriminator 1
+	ldrb	w1, [x0, 8]
+	cbnz	w1, .L987
+	.loc 2 949 0 is_stmt 1
+	adrp	x3, .LANCHOR19
+	ldrb	w1, [x0, 7]
+	ldrh	w3, [x3, #:lo12:.LANCHOR19]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L987
+.LVL1348:
+.LBB261:
+.LBB262:
+	.loc 2 956 0
+	ldrb	w0, [x0, 10]
+	cbnz	w0, .L986
+	.loc 2 951 0
+	adrp	x0, .LANCHOR62
+	.loc 2 958 0
+	mov	w2, 0
+	add	x1, x29, 92
+	.loc 2 951 0
+	ldr	w21, [x0, #:lo12:.LANCHOR62]
+	.loc 2 953 0
+	adrp	x0, .LANCHOR3
+	.loc 2 951 0
+	sub	w21, w21, #1
+	.loc 2 953 0
+	ldrh	w25, [x0, #:lo12:.LANCHOR3]
+	.loc 2 958 0
+	mov	w0, w21
+	bl	log2phys
+.LVL1349:
+	.loc 2 964 0
+	adrp	x2, .LANCHOR109
+	.loc 2 963 0
+	adrp	x0, .LANCHOR39
+	.loc 2 961 0
+	ldr	w1, [x29, 92]
+	.loc 2 964 0
+	ldr	x20, [x2, #:lo12:.LANCHOR109]
+	.loc 2 963 0
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	.loc 2 967 0
+	cmn	w1, #1
+	.loc 2 961 0
+	str	w1, [x29, 100]
+	.loc 2 964 0
+	stp	x0, x20, [x29, 104]
+.LVL1350:
+	.loc 2 962 0
+	str	w21, [x29, 120]
+	.loc 2 966 0
+	str	wzr, [x20, 4]
+	.loc 2 967 0
+	beq	.L989
+	.loc 2 969 0
+	mov	w2, 0
+	mov	w1, 1
+	add	x0, x29, 96
+	bl	FlashReadPages
+.LVL1351:
+.L990:
+	.loc 2 987 0
+	adrp	x23, .LANCHOR72
+	.loc 2 953 0
+	lsl	w25, w25, 2
+.LVL1352:
+	.loc 2 978 0
+	add	x22, x19, :lo12:.LANCHOR51
+	.loc 2 987 0
+	add	x23, x23, :lo12:.LANCHOR72
+	.loc 2 975 0
+	mov	w0, -3947
+	mov	w24, 0
+	strh	w0, [x20]
+.L991:
+	.loc 2 976 0
+	cmp	w25, w24
+	bne	.L995
+.L992:
+	.loc 2 992 0
+	add	x19, x19, :lo12:.LANCHOR51
+	mov	w0, 1
+	strb	w0, [x19, 10]
+.LVL1353:
+.L986:
+.LBE262:
+.LBE261:
+	.loc 2 1000 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 128
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1354:
+.L989:
+	.cfi_restore_state
+.LBB264:
+.LBB263:
+	.loc 2 973 0
+	adrp	x1, .LANCHOR23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+.LVL1355:
+	b	.L990
+.LVL1356:
+.L995:
+	.loc 2 978 0
+	ldrh	w0, [x22, 4]
+	cbz	w0, .L992
+	.loc 2 983 0
+	ldr	w0, [x29, 100]
+	add	w24, w24, 1
+	stp	w21, w0, [x20, 8]
+	.loc 2 984 0
+	ldrh	w0, [x22]
+	strh	w0, [x20, 2]
+	.loc 2 986 0
+	mov	x0, x22
+	bl	get_new_active_ppa
+.LVL1357:
+	str	w0, [x29, 100]
+	.loc 2 987 0
+	ldr	w0, [x23]
+	.loc 2 988 0
+	mov	w3, 0
+	.loc 2 987 0
+	str	w0, [x20, 4]
+	.loc 2 988 0
+	mov	w2, 0
+	.loc 2 987 0
+	add	w0, w0, 1
+	.loc 2 988 0
+	mov	w1, 1
+	.loc 2 987 0
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x23]
+	.loc 2 988 0
+	add	x0, x29, 96
+	bl	FlashProgPages
+.LVL1358:
+	.loc 2 990 0
+	ldrh	w0, [x22]
+	bl	decrement_vpc_count
+.LVL1359:
+	b	.L991
+.LVL1360:
+.L987:
+.LBE263:
+.LBE264:
+	.loc 2 998 0
+	add	x19, x19, :lo12:.LANCHOR51
+	strb	wzr, [x19, 10]
+	.loc 2 1000 0
+	b	.L986
+	.cfi_endproc
+.LFE268:
+	.size	FtlWriteDump_data, .-FtlWriteDump_data
+	.section	.text.l2p_flush,"ax",@progbits
+	.align	2
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+.LFB261:
+	.loc 2 740 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 746 0
+	adrp	x20, .LANCHOR33
+	add	x20, x20, :lo12:.LANCHOR33
+	.loc 2 740 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 746 0
+	mov	w19, 0
+	.loc 2 747 0
+	adrp	x21, .LANCHOR56
+	.loc 2 744 0
+	bl	FtlWriteDump_data
+.LVL1361:
+.L1005:
+	.loc 2 746 0 discriminator 1
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1007
+	.loc 2 750 0
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL1362:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1363:
+.L1007:
+	.cfi_restore_state
+	.loc 2 747 0
+	ldr	x1, [x21, #:lo12:.LANCHOR56]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L1006
+	.loc 2 748 0
+	mov	w0, w19
+	bl	flush_l2p_region
+.LVL1364:
+.L1006:
+	.loc 2 746 0 discriminator 2
+	add	w19, w19, 1
+.LVL1365:
+	and	w19, w19, 65535
+.LVL1366:
+	b	.L1005
+	.cfi_endproc
+.LFE261:
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+.LFB281:
+	.loc 2 1656 0
+	.cfi_startproc
+.LVL1367:
+	stp	x29, x30, [sp, -192]!
+	.cfi_def_cfa_offset 192
+	.cfi_offset 29, -192
+	.cfi_offset 30, -184
+	.loc 2 1670 0
+	mov	w1, 65535
+	.loc 2 1656 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -176
+	.cfi_offset 20, -168
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	.loc 2 1670 0
+	ldrh	w0, [x0]
+.LVL1368:
+	.loc 2 1656 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.loc 2 1670 0
+	cmp	w0, w1
+	.loc 2 1656 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 21, -160
+	.cfi_offset 22, -152
+	.cfi_offset 23, -144
+	.cfi_offset 24, -136
+	.cfi_offset 25, -128
+	.cfi_offset 26, -120
+	.cfi_offset 27, -112
+	.cfi_offset 28, -104
+	.loc 2 1670 0
+	beq	.L1133
+	.loc 2 1676 0
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 164]
+	.loc 2 1681 0
+	adrp	x0, .LANCHOR19
+	.loc 2 1675 0
+	ldrh	w26, [x19, 2]
+.LVL1369:
+	str	x0, [x29, 128]
+	.loc 2 1681 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR19]
+	cmp	w2, w26
+	bne	.L1012
+	.loc 2 1682 0
+	strh	wzr, [x19, 4]
+.LVL1370:
+.L1139:
+	.loc 2 1709 0
+	strb	wzr, [x19, 6]
+.LVL1371:
+.L1133:
+	.loc 2 2010 0
+	ldp	x19, x20, [sp, 16]
+.LVL1372:
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1373:
+.L1012:
+	.cfi_restore_state
+	.loc 2 1689 0
+	ldrh	w0, [x19, 16]
+.LVL1374:
+	.loc 2 1688 0
+	mov	w20, 0
+.LVL1375:
+.L1013:
+	.loc 2 1690 0
+	cmp	w0, w1
+	beq	.L1014
+	.loc 2 1697 0
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+.LVL1376:
+	mov	w23, w0
+.LVL1377:
+	.loc 2 1705 0
+	cmn	w0, #1
+	beq	.L1015
+	.loc 2 1721 0
+	adrp	x1, .LANCHOR93
+	.loc 2 1717 0
+	adrp	x2, .LANCHOR3
+	.loc 2 1720 0
+	adrp	x20, .LANCHOR120
+.LVL1378:
+	.loc 2 1722 0
+	add	x4, x19, 16
+	.loc 2 1721 0
+	ldr	x5, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR23
+	.loc 2 1720 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+.LVL1379:
+	.loc 2 1722 0
+	mov	w22, 0
+	.loc 2 1721 0
+	ldrh	w6, [x1, #:lo12:.LANCHOR23]
+	.loc 2 1722 0
+	adrp	x1, .LANCHOR94
+	.loc 2 1719 0
+	mov	w10, 65535
+	str	x2, [x29, 152]
+	.loc 2 1722 0
+	ldr	x7, [x1, #:lo12:.LANCHOR94]
+	adrp	x1, .LANCHOR24
+	ldrh	w8, [x1, #:lo12:.LANCHOR24]
+	add	x1, x19, 16
+	str	x1, [x29, 168]
+	ldrh	w1, [x2, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L1016:
+.LVL1380:
+	.loc 2 1717 0 discriminator 1
+	cmp	x4, x1
+	bne	.L1020
+	.loc 2 1727 0
+	mov	w2, 0
+	mov	w1, w22
+	bl	FlashReadPages
+.LVL1381:
+	.loc 2 1728 0
+	adrp	x0, .LANCHOR72
+	.loc 2 1730 0
+	ldr	x4, [x20, #:lo12:.LANCHOR120]
+	.loc 2 1742 0
+	and	w10, w23, 65535
+	.loc 2 1733 0
+	add	x7, x0, :lo12:.LANCHOR72
+	.loc 2 1728 0
+	ldr	w21, [x0, #:lo12:.LANCHOR72]
+	mov	x11, x4
+	.loc 2 1666 0
+	mov	w6, 65535
+	.loc 2 1729 0
+	mov	w3, 0
+	.loc 2 1728 0
+	sub	w21, w21, #1
+.LVL1382:
+	str	x0, [x29, 144]
+.LVL1383:
+.L1021:
+	.loc 2 1729 0 discriminator 1
+	cmp	w22, w3
+	bne	.L1026
+	.loc 2 1747 0
+	add	w22, w23, 1
+.LVL1384:
+	.loc 2 1749 0
+	ldr	w0, [x4, 4]
+	.loc 2 1747 0
+	and	w22, w22, 65535
+.LVL1385:
+.L1135:
+	.loc 2 1753 0
+	lsr	w0, w0, 10
+	bl	P2V_plane
+.LVL1386:
+	and	w27, w0, 65535
+.LVL1387:
+	.loc 2 1758 0
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w22
+	bne	.L1028
+	.loc 2 1759 0
+	strh	w22, [x19, 2]
+	.loc 2 1760 0
+	strb	wzr, [x19, 6]
+	.loc 2 1761 0
+	strh	wzr, [x19, 4]
+.L1028:
+	.loc 2 1764 0
+	ldr	w0, [x29, 164]
+	cmp	w22, w26
+	cset	w1, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w1, w0
+	beq	.L1029
+.LVL1388:
+.L1140:
+	.loc 2 2004 0
+	mov	w2, w27
+	mov	w1, w22
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+.LVL1389:
+	b	.L1133
+.LVL1390:
+.L1014:
+	.loc 2 1691 0
+	add	w20, w20, 1
+.LVL1391:
+	and	w20, w20, 65535
+.LVL1392:
+	.loc 2 1692 0
+	add	x0, x19, x20, sxtw 1
+.LVL1393:
+	ldrh	w0, [x0, 16]
+.LVL1394:
+	b	.L1013
+.LVL1395:
+.L1015:
+	.loc 2 1706 0
+	cbz	w26, .L1017
+	.loc 2 1706 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR161
+	adrp	x0, .LC1
+.LVL1396:
+	mov	w2, 1706
+	add	x1, x1, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1397:
+.L1017:
+	.loc 2 1707 0 is_stmt 1
+	ldr	w0, [x29, 164]
+	cmp	w0, 0
+	ccmp	w20, w0, 4, ne
+	beq	.L1018
+	.loc 2 1707 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR161
+	adrp	x0, .LC1
+	mov	w2, 1707
+	add	x1, x1, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1398:
+.L1018:
+	.loc 2 1708 0 is_stmt 1
+	strh	wzr, [x19, 2]
+	b	.L1139
+.LVL1399:
+.L1020:
+	.loc 2 1718 0
+	ldrh	w3, [x4]
+.LVL1400:
+	.loc 2 1719 0
+	cmp	w3, w10
+	beq	.L1019
+	.loc 2 1720 0
+	ubfiz	x2, x22, 5, 16
+	orr	w3, w23, w3, lsl 10
+.LVL1401:
+	add	x2, x0, x2
+	str	w3, [x2, 4]
+	.loc 2 1721 0
+	mul	w3, w22, w6
+	asr	w3, w3, 2
+	add	x3, x5, x3, sxtw 2
+	str	x3, [x2, 8]
+	.loc 2 1722 0
+	mul	w3, w22, w8
+	.loc 2 1723 0
+	add	w22, w22, 1
+.LVL1402:
+	and	w22, w22, 65535
+.LVL1403:
+	.loc 2 1722 0
+	asr	w3, w3, 2
+	add	x3, x7, x3, sxtw 2
+	str	x3, [x2, 16]
+.L1019:
+	add	x4, x4, 2
+.LVL1404:
+	b	.L1016
+.LVL1405:
+.L1026:
+	.loc 2 1730 0
+	ldr	w0, [x11]
+	cbnz	w0, .L1022
+	.loc 2 1731 0
+	ldr	x8, [x11, 16]
+.LVL1406:
+	.loc 2 1732 0
+	ldr	w5, [x8, 4]
+	cmn	w5, #1
+	beq	.L1023
+	.loc 2 1733 0
+	ldr	w1, [x7]
+	mov	w0, w5
+	bl	ftl_cmp_data_ver
+.LVL1407:
+	cbz	w0, .L1023
+	.loc 2 1735 0
+	add	w5, w5, 1
+	str	w5, [x7]
+.L1023:
+	.loc 2 1738 0
+	ldr	w0, [x8]
+	cmn	w0, #1
+	bne	.L1025
+	.loc 2 1753 0
+	ubfiz	x3, x3, 5, 16
+.LVL1408:
+	.loc 2 1752 0
+	and	w22, w23, 65535
+.LVL1409:
+	.loc 2 1753 0
+	add	x3, x4, x3
+	ldr	w0, [x3, 4]
+	b	.L1135
+.LVL1410:
+.L1022:
+	.loc 2 1742 0
+	mov	w6, w10
+.LVL1411:
+.L1025:
+	.loc 2 1729 0 discriminator 2
+	add	w3, w3, 1
+.LVL1412:
+	add	x11, x11, 32
+	and	w3, w3, 65535
+.LVL1413:
+	b	.L1021
+.LVL1414:
+.L1029:
+	.loc 2 1770 0
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L1030
+	.loc 2 1770 0 is_stmt 0 discriminator 1
+	ldrb	w0, [x19, 8]
+	cbnz	w0, .L1031
+.L1030:
+.LVL1415:
+.LBB265:
+	.loc 2 1775 0 is_stmt 1
+	adrp	x25, .LANCHOR154
+	.loc 2 1774 0
+	and	w28, w23, 65535
+.LVL1416:
+	.loc 2 1775 0
+	ldr	w0, [x25, #:lo12:.LANCHOR154]
+	cmn	w0, #1
+	bne	.L1032
+	.loc 2 1776 0
+	str	w21, [x25, #:lo12:.LANCHOR154]
+.L1032:
+.LVL1417:
+	.loc 2 1778 0
+	add	w0, w26, 7
+	cmp	w0, w23, uxth
+	bge	.L1082
+	.loc 2 1779 0
+	sub	w24, w28, #7
+	and	w24, w24, 65535
+.LVL1418:
+.L1033:
+	.loc 2 1782 0 discriminator 1
+	ldr	x0, [x29, 152]
+	.loc 2 1784 0 discriminator 1
+	mov	w3, 65535
+	mov	w5, 1
+	.loc 2 1782 0 discriminator 1
+	add	x4, x0, :lo12:.LANCHOR3
+.LVL1419:
+.L1034:
+	.loc 2 1780 0 discriminator 1
+	cmp	w24, w28
+	bhi	.L1044
+	ldrh	w1, [x4]
+	.loc 2 1785 0
+	mov	w23, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	add	x1, x1, 8
+	ldr	x2, [x29, 168]
+	add	x1, x19, x1, lsl 1
+	b	.L1045
+.LVL1420:
+.L1082:
+	mov	w24, w26
+	b	.L1033
+.LVL1421:
+.L1036:
+	.loc 2 1783 0
+	ldrh	w6, [x2]
+.LVL1422:
+	.loc 2 1784 0
+	cmp	w6, w3
+	beq	.L1035
+	.loc 2 1785 0
+	ubfiz	x7, x23, 5, 16
+	.loc 2 1786 0
+	add	w23, w23, 1
+.LVL1423:
+	.loc 2 1785 0
+	add	x7, x0, x7
+	.loc 2 1786 0
+	and	w23, w23, 65535
+.LVL1424:
+	.loc 2 1785 0
+	orr	w6, w24, w6, lsl 10
+.LVL1425:
+	str	w6, [x7, 4]
+.L1035:
+	add	x2, x2, 2
+.LVL1426:
+.L1045:
+	.loc 2 1782 0 discriminator 1
+	cmp	x2, x1
+	bne	.L1036
+	.loc 2 1789 0
+	mov	w1, w23
+	mov	w2, 0
+	str	w5, [x29, 112]
+	ubfiz	x23, x23, 5, 16
+.LVL1427:
+	str	w3, [x29, 120]
+	add	x23, x23, 16
+	str	x4, [x29, 136]
+	bl	FlashReadPages
+.LVL1428:
+	.loc 2 1791 0
+	ldr	x2, [x20, #:lo12:.LANCHOR120]
+	ldr	w1, [x25, #:lo12:.LANCHOR154]
+	.loc 2 1790 0
+	ldr	w5, [x29, 112]
+	add	x0, x2, 16
+	ldr	w3, [x29, 120]
+	add	x23, x2, x23
+	ldr	x4, [x29, 136]
+	mov	w2, 0
+.LVL1429:
+.L1037:
+	.loc 2 1790 0 is_stmt 0 discriminator 1
+	cmp	x23, x0
+	bne	.L1042
+	cbz	w2, .L1043
+	str	w1, [x25, #:lo12:.LANCHOR154]
+.L1043:
+	.loc 2 1780 0 is_stmt 1
+	add	w24, w24, 1
+.LVL1430:
+	and	w24, w24, 65535
+.LVL1431:
+	b	.L1034
+.L1042:
+	.loc 2 1791 0
+	ldr	w6, [x0, -16]
+	cbz	w6, .L1038
+	cbz	w2, .L1031
+	str	w1, [x25, #:lo12:.LANCHOR154]
+.LVL1432:
+.L1031:
+.LBE265:
+	.loc 2 1814 0
+	mov	w1, 1
+	adrp	x0, .LANCHOR162
+	.loc 2 1815 0
+	mov	w23, w26
+	.loc 2 1975 0
+	adrp	x28, .LANCHOR154
+	.loc 2 1814 0
+	strh	w1, [x0, #:lo12:.LANCHOR162]
+	.loc 2 1815 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapBlkWriteDump_data
+.LVL1433:
+.LBB266:
+	.loc 2 1897 0
+	add	x0, x28, :lo12:.LANCHOR154
+	str	x0, [x29, 104]
+.LVL1434:
+.L1046:
+	ldr	x1, [x29, 152]
+.LBE266:
+	.loc 2 1820 0
+	mov	w24, 0
+	.loc 2 1824 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	.loc 2 1823 0
+	mov	w5, 65535
+	.loc 2 1821 0
+	ldr	x2, [x29, 168]
+	ldrh	w1, [x1, #:lo12:.LANCHOR3]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.LVL1435:
+.L1047:
+	.loc 2 1821 0 is_stmt 0 discriminator 1
+	cmp	x1, x2
+	bne	.L1049
+	.loc 2 1828 0 is_stmt 1
+	mov	w2, 0
+	mov	w1, w24
+	bl	FlashReadPages
+.LVL1436:
+	.loc 2 1829 0
+	mov	x25, 0
+	ubfiz	x0, x24, 5, 16
+	str	x0, [x29, 112]
+	.loc 2 1969 0
+	adrp	x0, .LANCHOR163
+	add	x0, x0, :lo12:.LANCHOR163
+	str	x0, [x29, 120]
+.LVL1437:
+.L1050:
+	.loc 2 1829 0 discriminator 1
+	ldr	x0, [x29, 112]
+	cmp	x25, x0
+	bne	.L1076
+	.loc 2 1983 0
+	ldr	x0, [x29, 128]
+	.loc 2 1982 0
+	add	w23, w23, 1
+.LVL1438:
+	and	w23, w23, 65535
+.LVL1439:
+	.loc 2 1983 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	cmp	w0, w23
+	bne	.L1046
+	.loc 2 1986 0
+	ldr	x0, [x29, 152]
+	.loc 2 1988 0
+	mov	w2, 65535
+	.loc 2 1984 0
+	strh	w23, [x19, 2]
+	.loc 2 1985 0
+	strh	wzr, [x19, 4]
+.LVL1440:
+	.loc 2 1986 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR3]
+	mov	w0, 0
+.LVL1441:
+.L1077:
+	.loc 2 1986 0 is_stmt 0 discriminator 1
+	cmp	w0, w1
+	beq	.L1133
+.LVL1442:
+	.loc 2 1988 0 is_stmt 1
+	ldr	x4, [x29, 168]
+	ldrh	w3, [x4], 2
+	str	x4, [x29, 168]
+.LVL1443:
+	cmp	w3, w2
+	beq	.L1078
+	.loc 2 1989 0
+	strb	w0, [x19, 6]
+.LVL1444:
+	.loc 2 1990 0
+	b	.L1133
+.LVL1445:
+.L1038:
+.LBB267:
+	.loc 2 1792 0
+	ldr	x6, [x0]
+.LVL1446:
+	.loc 2 1793 0
+	ldrh	w7, [x6]
+	cmp	w7, w3
+	beq	.L1041
+	.loc 2 1795 0
+	ldr	w6, [x6, 4]
+.LVL1447:
+	cmn	w6, #1
+	csel	w1, w1, w6, eq
+	csel	w2, w2, w5, eq
+.L1041:
+	add	x0, x0, 32
+.LVL1448:
+	b	.L1037
+.LVL1449:
+.L1044:
+	.loc 2 1809 0
+	mov	w0, -1
+	str	w0, [x25, #:lo12:.LANCHOR154]
+	b	.L1031
+.LVL1450:
+.L1049:
+.LBE267:
+	.loc 2 1822 0
+	ldrh	w3, [x2]
+.LVL1451:
+	.loc 2 1823 0
+	cmp	w3, w5
+	beq	.L1048
+	.loc 2 1824 0
+	ubfiz	x4, x24, 5, 16
+	.loc 2 1825 0
+	add	w24, w24, 1
+.LVL1452:
+	.loc 2 1824 0
+	add	x4, x0, x4
+	.loc 2 1825 0
+	and	w24, w24, 65535
+.LVL1453:
+	.loc 2 1824 0
+	orr	w3, w23, w3, lsl 10
+.LVL1454:
+	str	w3, [x4, 4]
+.L1048:
+	add	x2, x2, 2
+.LVL1455:
+	b	.L1047
+.LVL1456:
+.L1076:
+	.loc 2 1830 0
+	ldr	x4, [x20, #:lo12:.LANCHOR120]
+	add	x4, x4, x25
+	ldr	w5, [x4, 4]
+	str	w5, [x29, 188]
+	.loc 2 1831 0
+	lsr	w0, w5, 10
+	bl	P2V_plane
+.LVL1457:
+	and	w0, w0, 65535
+.LVL1458:
+	.loc 2 1833 0
+	cmp	w23, w26
+	bcc	.L1051
+	.loc 2 1833 0 is_stmt 0 discriminator 1
+	ldr	w1, [x29, 164]
+	ccmp	w1, w0, 0, eq
+	bhi	.L1051
+	.loc 2 1837 0 is_stmt 1
+	cmp	w23, w22
+	ccmp	w27, w0, 0, eq
+	beq	.L1052
+.LVL1459:
+	.loc 2 1841 0
+	ldr	w0, [x4]
+.LVL1460:
+	cmn	w0, #1
+	beq	.L1053
+	.loc 2 1842 0
+	ldr	x3, [x4, 16]
+.LVL1461:
+	.loc 2 1843 0
+	mov	w0, 61589
+	ldrh	w1, [x3]
+	cmp	w1, w0
+	beq	.L1054
+.LVL1462:
+.L1060:
+.LBB268:
+	.loc 2 1876 0
+	ldrh	w0, [x19]
+.LVL1463:
+.L1138:
+.LBE268:
+	.loc 2 1960 0
+	bl	decrement_vpc_count
+.LVL1464:
+.L1051:
+	add	x25, x25, 32
+	b	.L1050
+.LVL1465:
+.L1054:
+	.loc 2 1849 0
+	ldr	w21, [x3, 4]
+.LVL1466:
+	.loc 2 1850 0
+	cmn	w21, #1
+	beq	.L1055
+	.loc 2 1851 0 discriminator 1
+	ldr	x0, [x29, 144]
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+.LVL1467:
+	.loc 2 1850 0 discriminator 1
+	cbz	w0, .L1055
+	.loc 2 1853 0
+	ldr	x1, [x29, 144]
+	add	w0, w21, 1
+	str	w0, [x1, #:lo12:.LANCHOR72]
+.L1055:
+	.loc 2 1858 0
+	ldp	w24, w0, [x3, 8]
+	.loc 2 1859 0
+	add	x1, x29, 184
+	.loc 2 1858 0
+	str	w0, [x29, 180]
+	.loc 2 1859 0
+	mov	w2, 0
+	mov	w0, w24
+	bl	log2phys
+.LVL1468:
+	.loc 2 1860 0
+	ldr	w1, [x28, #:lo12:.LANCHOR154]
+	cmn	w1, #1
+	beq	.L1056
+	.loc 2 1861 0 discriminator 1
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+.LVL1469:
+	.loc 2 1860 0 discriminator 1
+	cbz	w0, .L1056
+.LBB269:
+	.loc 2 1865 0
+	ldr	w1, [x29, 180]
+	cmn	w1, #1
+	beq	.L1057
+	.loc 2 1866 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	.loc 2 1868 0
+	mov	w2, 0
+	.loc 2 1866 0
+	add	x0, x0, x25
+	ldr	x3, [x0, 16]
+	.loc 2 1867 0
+	str	w1, [x0, 4]
+	.loc 2 1868 0
+	mov	w1, 1
+	.loc 2 1866 0
+	str	x3, [x29, 136]
+.LVL1470:
+	.loc 2 1868 0
+	bl	FlashReadPages
+.LVL1471:
+	.loc 2 1881 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	ldr	x3, [x29, 136]
+	add	x4, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L1058
+.LVL1472:
+.L1059:
+	.loc 2 1913 0
+	mov	w0, -1
+	str	w0, [x29, 180]
+	.loc 2 1914 0
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.LVL1473:
+.L1067:
+.LBE269:
+	.loc 2 1954 0
+	ldr	w3, [x29, 180]
+	cmn	w3, #1
+	beq	.L1051
+.L1081:
+	.loc 2 1956 0
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+.LVL1474:
+	and	w24, w0, 65535
+	.loc 2 1957 0
+	adrp	x0, .LANCHOR5
+	.loc 2 1956 0
+	mov	w3, w24
+.LVL1475:
+	.loc 2 1957 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w0, w24
+	bhi	.L1072
+	.loc 2 1957 0 is_stmt 0 discriminator 1
+	mov	w2, 1957
+	adrp	x1, .LANCHOR161
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR161
+	add	x0, x0, :lo12:.LC1
+	str	w24, [x29, 136]
+	bl	printf
+.LVL1476:
+	ldr	w3, [x29, 136]
+.LVL1477:
+.L1072:
+	.loc 2 1958 0 is_stmt 1
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x24, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1073
+	.loc 2 1960 0
+	mov	w0, w3
+	b	.L1138
+.LVL1478:
+.L1057:
+.LBB270:
+	.loc 2 1872 0
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	bne	.L1060
+	.loc 2 1873 0
+	mov	w2, 1
+	add	x1, x29, 180
+	mov	w0, w24
+	bl	log2phys
+.LVL1479:
+	b	.L1060
+.LVL1480:
+.L1058:
+	.loc 2 1881 0 discriminator 1
+	ldr	w0, [x3, 8]
+	cmp	w24, w0
+	bne	.L1059
+	.loc 2 1869 0 discriminator 2
+	ldr	w0, [x3, 4]
+	str	w0, [x29, 136]
+.LVL1481:
+	str	x3, [x29, 96]
+	.loc 2 1882 0 discriminator 2
+	uxtw	x1, w0
+	ldr	w0, [x28, #:lo12:.LANCHOR154]
+	bl	ftl_cmp_data_ver
+.LVL1482:
+	.loc 2 1881 0 discriminator 2
+	cbz	w0, .L1059
+	.loc 2 1883 0
+	ldp	w0, w1, [x29, 184]
+	ldr	x3, [x29, 96]
+	cmp	w0, w1
+	.loc 2 1885 0
+	ldr	w1, [x29, 180]
+	.loc 2 1883 0
+	bne	.L1062
+.L1136:
+	.loc 2 1909 0
+	mov	w0, w24
+	bl	FtlReUsePrevPpa
+.LVL1483:
+	b	.L1059
+.L1062:
+	.loc 2 1886 0
+	cmp	w0, w1
+	beq	.L1059
+	.loc 2 1887 0
+	cmn	w0, #1
+	beq	.L1063
+.LVL1484:
+	.loc 2 1888 0
+	ldr	x3, [x4, 16]
+	.loc 2 1890 0
+	mov	w2, 0
+	.loc 2 1889 0
+	str	w0, [x4, 4]
+	.loc 2 1890 0
+	mov	w1, 1
+	.loc 2 1888 0
+	str	x3, [x29, 96]
+	.loc 2 1890 0
+	mov	x0, x4
+	bl	FlashReadPages
+.LVL1485:
+	ldr	x3, [x29, 96]
+.LVL1486:
+.L1064:
+	.loc 2 1895 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	beq	.L1065
+	.loc 2 1897 0
+	ldr	x0, [x29, 104]
+	.loc 2 1896 0
+	ldr	w3, [x3, 4]
+.LVL1487:
+	.loc 2 1897 0
+	mov	w1, w3
+	ldr	w0, [x0]
+	bl	ftl_cmp_data_ver
+.LVL1488:
+	cbz	w0, .L1065
+	.loc 2 1898 0
+	ldr	w0, [x29, 136]
+	mov	w1, w3
+	bl	ftl_cmp_data_ver
+.LVL1489:
+	cbz	w0, .L1059
+.LVL1490:
+.L1065:
+	.loc 2 1909 0
+	ldr	w1, [x29, 180]
+	b	.L1136
+.L1063:
+	.loc 2 1892 0
+	str	w0, [x4]
+	b	.L1064
+.L1056:
+.LBE270:
+	.loc 2 1915 0
+	ldp	w1, w0, [x29, 184]
+	cmp	w1, w0
+	beq	.L1067
+	.loc 2 1917 0
+	mov	w2, 1
+	add	x1, x29, 188
+	mov	w0, w24
+	bl	log2phys
+.LVL1491:
+	.loc 2 1918 0
+	ldr	w3, [x29, 184]
+	cmn	w3, #1
+	beq	.L1067
+	.loc 2 1918 0 is_stmt 0 discriminator 1
+	ldr	w0, [x29, 180]
+	cmp	w3, w0
+	beq	.L1081
+	.loc 2 1919 0 is_stmt 1
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+.LVL1492:
+	.loc 2 1921 0
+	adrp	x1, .LANCHOR51
+	.loc 2 1919 0
+	and	w0, w0, 65535
+.LVL1493:
+	.loc 2 1921 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	beq	.L1071
+	.loc 2 1922 0 discriminator 1
+	adrp	x1, .LANCHOR52
+	.loc 2 1921 0 discriminator 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	beq	.L1071
+	.loc 2 1923 0
+	adrp	x1, .LANCHOR53
+	.loc 2 1922 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1067
+.L1071:
+.LVL1494:
+.LBB271:
+	.loc 2 1927 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+.LVL1495:
+	.loc 2 1930 0
+	mov	w2, 0
+	mov	w1, 1
+	.loc 2 1927 0
+	ldr	x4, [x0, 16]
+	.loc 2 1929 0
+	str	w3, [x0, 4]
+	.loc 2 1927 0
+	str	x4, [x29, 136]
+.LVL1496:
+	.loc 2 1930 0
+	bl	FlashReadPages
+.LVL1497:
+	.loc 2 1933 0
+	ldr	x0, [x20, #:lo12:.LANCHOR120]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L1067
+	.loc 2 1934 0
+	ldr	x4, [x29, 136]
+	mov	w0, w21
+	ldr	w1, [x4, 4]
+	bl	ftl_cmp_data_ver
+.LVL1498:
+	cbnz	w0, .L1067
+	.loc 2 1941 0
+	mov	w2, 1
+	add	x1, x29, 184
+	mov	w0, w24
+	bl	log2phys
+.LVL1499:
+	b	.L1067
+.LVL1500:
+.L1073:
+.LBE271:
+	.loc 2 1962 0
+	mov	w1, w24
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
+	bl	printf
+.LVL1501:
+	b	.L1051
+.LVL1502:
+.L1053:
+	.loc 2 1969 0
+	ldr	x0, [x29, 120]
+	ldr	w0, [x0]
+	cmp	w0, 31
+	bhi	.L1074
+	.loc 2 1970 0
+	adrp	x1, .LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR164
+	str	w5, [x1, w0, uxtw 2]
+	.loc 2 1971 0
+	add	w0, w0, 1
+	ldr	x1, [x29, 120]
+	str	w0, [x1]
+.L1074:
+	.loc 2 1973 0
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.LVL1503:
+	.loc 2 1975 0
+	ldr	w0, [x28, #:lo12:.LANCHOR154]
+	cmn	w0, #1
+	bne	.L1075
+.L1137:
+	.loc 2 1978 0
+	str	w21, [x28, #:lo12:.LANCHOR154]
+	b	.L1051
+.L1075:
+	.loc 2 1977 0
+	cmp	w21, w0
+	bcs	.L1051
+	b	.L1137
+.LVL1504:
+.L1078:
+	.loc 2 1986 0 discriminator 2
+	add	w0, w0, 1
+.LVL1505:
+	and	w0, w0, 65535
+.LVL1506:
+	b	.L1077
+.LVL1507:
+.L1052:
+	.loc 2 2002 0
+	strb	w27, [x19, 6]
+	.loc 2 2003 0
+	strh	w22, [x19, 2]
+	b	.L1140
+	.cfi_endproc
+.LFE281:
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.align	2
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+.LFB288:
+	.loc 2 2156 0
+	.cfi_startproc
+.LVL1508:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 2 2178 0
+	adrp	x20, .LANCHOR72
+	.loc 2 2156 0
+	mov	x19, x0
+	.loc 2 2178 0
+	add	x20, x20, :lo12:.LANCHOR72
+	.loc 2 2156 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 2162 0
+	mov	w21, 7
+	.loc 2 2156 0
+	str	x23, [sp, 48]
+	.cfi_offset 23, -48
+	.loc 2 2168 0
+	mov	w22, -1
+	.loc 2 2169 0
+	adrp	x23, .LANCHOR39
+.LVL1509:
+.L1142:
+	.loc 2 2162 0
+	subs	w21, w21, #1
+.LVL1510:
+	beq	.L1144
+.LVL1511:
+	.loc 2 2163 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1143
+.LVL1512:
+.L1144:
+	.loc 2 2183 0
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR43
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR43]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	.loc 2 2184 0
+	adrp	x0, .LANCHOR19
+	.loc 2 2185 0
+	strb	wzr, [x19, 6]
+	.loc 2 2186 0
+	strh	wzr, [x19, 4]
+	.loc 2 2184 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	strh	w0, [x19, 2]
+	.loc 2 2188 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+.LVL1513:
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1514:
+.L1143:
+	.cfi_restore_state
+	.loc 2 2165 0
+	mov	x0, x19
+	bl	get_new_active_ppa
+.LVL1515:
+	str	w0, [x29, 68]
+	.loc 2 2166 0
+	cmn	w0, #1
+	beq	.L1144
+	.loc 2 2169 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 2179 0
+	mov	w3, 0
+	.loc 2 2169 0
+	str	x0, [x29, 72]
+	.loc 2 2179 0
+	mov	w2, 0
+	.loc 2 2170 0
+	adrp	x0, .LANCHOR109
+	.loc 2 2168 0
+	str	w22, [x29, 88]
+	.loc 2 2170 0
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	str	x1, [x29, 80]
+.LVL1516:
+	.loc 2 2175 0
+	ldrh	w0, [x19]
+	strh	w0, [x1, 2]
+	.loc 2 2178 0
+	ldr	w0, [x20]
+	.loc 2 2173 0
+	stp	w0, w22, [x1, 4]
+	.loc 2 2178 0
+	add	w0, w0, 1
+	.loc 2 2176 0
+	strh	wzr, [x1]
+	.loc 2 2178 0
+	cmn	w0, #1
+	.loc 2 2174 0
+	str	w22, [x1, 12]
+	.loc 2 2178 0
+	csel	w0, w0, wzr, ne
+	.loc 2 2179 0
+	mov	w1, 1
+.LVL1517:
+	.loc 2 2178 0
+	str	w0, [x20]
+	.loc 2 2179 0
+	add	x0, x29, 64
+	bl	FlashProgPages
+.LVL1518:
+	.loc 2 2180 0
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.LVL1519:
+	b	.L1142
+	.cfi_endproc
+.LFE288:
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadBbt
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+.LFB229:
+	.loc 4 173 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 4 180 0
+	adrp	x23, .LANCHOR39
+	.loc 4 173 0
+	stp	x19, x20, [sp, 16]
+	.loc 4 184 0
+	adrp	x24, .LANCHOR17
+	.loc 4 173 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.loc 4 180 0
+	adrp	x22, .LANCHOR108
+	add	x20, x22, :lo12:.LANCHOR108
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 4 173 0
+	str	x25, [sp, 64]
+	.cfi_offset 25, -16
+	.loc 4 196 0
+	mov	w25, 61649
+	.loc 4 180 0
+	str	x0, [x20, 8]
+	.loc 4 181 0
+	adrp	x0, .LANCHOR109
+	ldr	x21, [x0, #:lo12:.LANCHOR109]
+	str	x21, [x20, 16]
+.LVL1520:
+	.loc 4 183 0
+	bl	FtlBbtMemInit
+.LVL1521:
+	.loc 4 184 0
+	ldrh	w19, [x24, #:lo12:.LANCHOR17]
+	add	x24, x24, :lo12:.LANCHOR17
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.LVL1522:
+.L1154:
+	.loc 4 184 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x24]
+	sub	w0, w0, #15
+	cmp	w0, w19
+	bgt	.L1157
+	.loc 4 185 0 is_stmt 1
+	lsl	w0, w19, 10
+	.loc 4 186 0
+	mov	w2, 1
+	.loc 4 185 0
+	str	w0, [x20, 4]
+	.loc 4 186 0
+	mov	w1, w2
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1523:
+	.loc 4 187 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L1155
+	.loc 4 188 0
+	ldr	w0, [x20, 4]
+	.loc 4 189 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 4 188 0
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+	.loc 4 189 0
+	mov	x0, x20
+	bl	FlashReadPages
+.LVL1524:
+.L1155:
+	.loc 4 191 0
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L1156
+	.loc 4 196 0
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	bne	.L1156
+	.loc 4 198 0
+	adrp	x1, .LANCHOR37
+	add	x0, x1, :lo12:.LANCHOR37
+	strh	w19, [x1, #:lo12:.LANCHOR37]
+	.loc 4 199 0
+	ldr	w1, [x21, 4]
+	str	w1, [x0, 8]
+	.loc 4 200 0
+	ldrh	w1, [x21, 8]
+	strh	w1, [x0, 4]
+.L1157:
+	.loc 4 216 0
+	adrp	x19, .LANCHOR37
+.LVL1525:
+	mov	w0, 65535
+	add	x20, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x19, #:lo12:.LANCHOR37]
+	cmp	w1, w0
+	beq	.L1171
+	.loc 4 222 0
+	ldrh	w1, [x20, 4]
+	cmp	w1, w0
+	beq	.L1161
+	.loc 4 224 0
+	add	x0, x22, :lo12:.LANCHOR108
+	lsl	w1, w1, 10
+	.loc 4 225 0
+	mov	w2, 1
+	.loc 4 224 0
+	str	w1, [x0, 4]
+	.loc 4 225 0
+	mov	w1, w2
+	bl	FlashReadPages
+.LVL1526:
+	.loc 4 226 0
+	ldr	w0, [x22, #:lo12:.LANCHOR108]
+	cmn	w0, #1
+	beq	.L1161
+	.loc 4 229 0
+	ldrh	w1, [x21]
+	mov	w0, 61649
+	cmp	w1, w0
+	bne	.L1161
+	.loc 4 229 0 is_stmt 0 discriminator 1
+	ldr	w1, [x20, 8]
+	ldr	w0, [x21, 4]
+	cmp	w0, w1
+	bls	.L1161
+	.loc 4 231 0 is_stmt 1
+	ldrh	w1, [x20, 4]
+	.loc 4 232 0
+	str	w0, [x20, 8]
+	.loc 4 233 0
+	ldrh	w0, [x21, 8]
+	.loc 4 231 0
+	strh	w1, [x19, #:lo12:.LANCHOR37]
+	.loc 4 233 0
+	strh	w0, [x20, 4]
+.L1161:
+	.loc 4 238 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	add	x24, x19, :lo12:.LANCHOR37
+	mov	w1, 1
+	.loc 4 247 0
+	mov	w25, 61649
+	.loc 4 238 0
+	bl	FtlGetLastWrittenPage
+.LVL1527:
+	sxth	w20, w0
+.LVL1528:
+	.loc 4 239 0
+	add	w0, w0, 1
+	strh	w0, [x24, 2]
+	.loc 4 243 0
+	add	x24, x22, :lo12:.LANCHOR108
+.L1163:
+	.loc 4 241 0
+	tbz	w20, #31, .L1166
+	.loc 4 254 0
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LC1
+	mov	w2, 254
+	add	x1, x1, :lo12:.LANCHOR165
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1529:
+.L1165:
+	.loc 4 255 0
+	add	x0, x19, :lo12:.LANCHOR37
+	ldrh	w1, [x21, 10]
+	strh	w1, [x0, 6]
+	.loc 4 257 0
+	mov	w1, 65535
+	ldrh	w0, [x21, 12]
+	cmp	w0, w1
+	beq	.L1168
+	.loc 4 259 0
+	adrp	x1, .LANCHOR2
+	ldr	w2, [x1, #:lo12:.LANCHOR2]
+	cmp	w0, w2
+	beq	.L1168
+	.loc 4 259 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR6]
+	lsr	w1, w1, 2
+	cmp	w2, w1
+	bcs	.L1168
+	.loc 4 261 0 is_stmt 1
+	cmp	w0, w1
+	bcs	.L1168
+	.loc 4 263 0
+	bl	FtlSysBlkNumInit
+.LVL1530:
+.L1168:
+	add	x19, x19, :lo12:.LANCHOR37
+	.loc 4 268 0 discriminator 1
+	adrp	x21, .LANCHOR10
+.LVL1531:
+	.loc 4 269 0 discriminator 1
+	adrp	x23, .LANCHOR137
+	add	x19, x19, 32
+	.loc 4 268 0 discriminator 1
+	add	x21, x21, :lo12:.LANCHOR10
+	.loc 4 269 0 discriminator 1
+	add	x23, x23, :lo12:.LANCHOR137
+	add	x22, x22, :lo12:.LANCHOR108
+	.loc 4 173 0 discriminator 1
+	mov	w20, 0
+.LVL1532:
+.L1169:
+	.loc 4 268 0 discriminator 1
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	bcc	.L1170
+	.loc 4 275 0
+	mov	w0, 0
+.LVL1533:
+.L1153:
+	.loc 4 276 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1534:
+.L1156:
+	.cfi_restore_state
+	.loc 4 184 0 discriminator 2
+	sub	w19, w19, #1
+.LVL1535:
+	and	w19, w19, 65535
+.LVL1536:
+	b	.L1154
+.LVL1537:
+.L1166:
+	.loc 4 243 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR37]
+	.loc 4 245 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 4 243 0
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x24, 4]
+	.loc 4 244 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	str	x0, [x24, 8]
+	.loc 4 245 0
+	mov	x0, x24
+	bl	FlashReadPages
+.LVL1538:
+	.loc 4 247 0
+	ldr	w0, [x24]
+	cmn	w0, #1
+	beq	.L1164
+	.loc 4 247 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	beq	.L1165
+.L1164:
+	sub	w20, w20, #1
+.LVL1539:
+	sxth	w20, w20
+.LVL1540:
+	b	.L1163
+.LVL1541:
+.L1170:
+	.loc 4 269 0 is_stmt 1 discriminator 3
+	ldrh	w2, [x23]
+	ldr	x0, [x22, 8]
+	mul	w1, w2, w20
+	lsl	w2, w2, 2
+	.loc 4 268 0 discriminator 3
+	add	w20, w20, 1
+.LVL1542:
+	.loc 4 269 0 discriminator 3
+	add	x1, x0, x1, lsl 2
+	ldr	x0, [x19], 8
+	bl	ftl_memcpy
+.LVL1543:
+	b	.L1169
+.LVL1544:
+.L1171:
+	.loc 4 218 0
+	mov	w0, -1
+	b	.L1153
+	.cfi_endproc
+.LFE229:
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlMakeBbt,"ax",@progbits
+	.align	2
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+.LFB231:
+	.loc 4 317 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -128]!
+	.cfi_def_cfa_offset 128
+	.cfi_offset 29, -128
+	.cfi_offset 30, -120
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -96
+	.cfi_offset 22, -88
+	.loc 4 327 0
+	mov	w22, 0
+	.loc 4 317 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -112
+	.cfi_offset 20, -104
+	adrp	x20, .LANCHOR37
+	stp	x23, x24, [sp, 48]
+	add	x21, x20, :lo12:.LANCHOR37
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 23, -80
+	.cfi_offset 24, -72
+	.cfi_offset 25, -64
+	.cfi_offset 26, -56
+	add	x24, x21, 32
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -48
+	.cfi_offset 28, -40
+	.loc 4 325 0
+	bl	FtlBbtMemInit
+.LVL1545:
+	.loc 4 326 0
+	bl	FtlLoadFactoryBbt
+.LVL1546:
+	.loc 4 328 0
+	adrp	x28, .LANCHOR108
+	add	x21, x21, 12
+	.loc 4 356 0
+	add	x25, x28, :lo12:.LANCHOR108
+	.loc 4 327 0
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	str	x0, [x29, 120]
+.LVL1547:
+.L1184:
+	.loc 4 327 0 is_stmt 0 discriminator 1
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L1190
+	.loc 4 381 0 is_stmt 1 discriminator 1
+	adrp	x21, .LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR25
+	mov	w19, 0
+.L1191:
+.LVL1548:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L1192
+	.loc 4 387 0
+	add	x21, x20, :lo12:.LANCHOR37
+	.loc 4 396 0
+	mov	w22, 65535
+.LVL1549:
+	.loc 4 387 0
+	ldrh	w19, [x21, 12]
+.LVL1550:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.LVL1551:
+.L1193:
+	.loc 4 387 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L1197
+	.loc 4 389 0 is_stmt 1
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+.LVL1552:
+	cmp	w0, 1
+	beq	.L1194
+	.loc 4 391 0
+	mov	w0, w19
+	bl	FlashTestBlk
+.LVL1553:
+	cbz	w0, .L1195
+	.loc 4 393 0
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.LVL1554:
+.L1194:
+	.loc 4 387 0 discriminator 2
+	sub	w19, w19, #1
+.LVL1555:
+	and	w19, w19, 65535
+.LVL1556:
+	b	.L1193
+.LVL1557:
+.L1190:
+	.loc 4 329 0
+	adrp	x2, .LANCHOR109
+	.loc 4 328 0
+	adrp	x0, .LANCHOR39
+	add	x19, x28, :lo12:.LANCHOR108
+	.loc 4 331 0
+	ldrh	w1, [x21]
+	.loc 4 328 0
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	.loc 4 331 0
+	mov	w3, 65535
+	.loc 4 329 0
+	ldr	x26, [x2, #:lo12:.LANCHOR109]
+	.loc 4 331 0
+	cmp	w1, w3
+	.loc 4 329 0
+	stp	x0, x26, [x19, 8]
+.LVL1558:
+	adrp	x23, .LANCHOR17
+	str	x2, [x29, 112]
+	.loc 4 331 0
+	beq	.L1185
+	.loc 4 333 0
+	ldrh	w4, [x23, #:lo12:.LANCHOR17]
+	.loc 4 335 0
+	mov	w2, 1
+	.loc 4 333 0
+	madd	w27, w4, w22, w1
+.LVL1559:
+	.loc 4 335 0
+	mov	w1, w2
+	.loc 4 334 0
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	.loc 4 335 0
+	mov	x0, x19
+	bl	FlashReadPages
+.LVL1560:
+	.loc 4 336 0
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR17]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.LVL1561:
+.L1186:
+	.loc 4 376 0 discriminator 2
+	mov	w0, w27
+	.loc 4 327 0 discriminator 2
+	add	w22, w22, 1
+.LVL1562:
+	.loc 4 376 0 discriminator 2
+	bl	FtlBbmMapBadBlock
+.LVL1563:
+	add	x24, x24, 8
+	add	x21, x21, 2
+	b	.L1184
+.LVL1564:
+.L1185:
+	.loc 4 340 0
+	mov	w1, w22
+	bl	FlashGetBadBlockList
+.LVL1565:
+	.loc 4 341 0
+	ldr	x0, [x19, 8]
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+.LVL1566:
+	.loc 4 343 0
+	ldrh	w19, [x23, #:lo12:.LANCHOR17]
+	.loc 4 345 0
+	add	x23, x23, :lo12:.LANCHOR17
+	.loc 4 357 0
+	adrp	x0, .LANCHOR137
+	.loc 4 343 0
+	sub	w19, w19, #1
+	.loc 4 357 0
+	add	x0, x0, :lo12:.LANCHOR137
+	.loc 4 343 0
+	and	w19, w19, 65535
+.LVL1567:
+	.loc 4 357 0
+	str	x0, [x29, 104]
+.L1187:
+	.loc 4 345 0
+	ldrh	w0, [x23]
+	madd	w0, w22, w0, w19
+	bl	FtlBbmIsBadBlock
+.LVL1568:
+	cmp	w0, 1
+	beq	.L1188
+	.loc 4 350 0
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	.loc 4 349 0
+	strh	w19, [x21]
+	.loc 4 350 0
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	bl	ftl_memset
+.LVL1569:
+	.loc 4 351 0
+	adrp	x0, .LANCHOR39
+	mov	w2, 4096
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR39]
+	bl	ftl_memset
+.LVL1570:
+	.loc 4 352 0
+	mov	w0, -3872
+	strh	w0, [x26]
+	.loc 4 355 0
+	ldrh	w4, [x23]
+	.loc 4 354 0
+	ldrh	w0, [x21]
+	strh	w0, [x26, 2]
+	.loc 4 357 0
+	ldr	x1, [x24]
+	.loc 4 353 0
+	str	wzr, [x26, 4]
+	.loc 4 355 0
+	madd	w27, w4, w22, w0
+.LVL1571:
+	.loc 4 356 0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	.loc 4 357 0
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+.LVL1572:
+	.loc 4 358 0
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+.LVL1573:
+	.loc 4 359 0
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1574:
+	.loc 4 360 0
+	ldr	w0, [x25]
+	cmn	w0, #1
+	bne	.L1186
+	.loc 4 362 0
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+.LVL1575:
+	.loc 4 363 0
+	b	.L1187
+.LVL1576:
+.L1188:
+	.loc 4 347 0
+	sub	w19, w19, #1
+.LVL1577:
+	and	w19, w19, 65535
+.LVL1578:
+	b	.L1187
+.LVL1579:
+.L1192:
+	.loc 4 383 0 discriminator 3
+	mov	w0, w19
+	.loc 4 381 0 discriminator 3
+	add	w19, w19, 1
+.LVL1580:
+	.loc 4 383 0 discriminator 3
+	bl	FtlBbmMapBadBlock
+.LVL1581:
+	.loc 4 381 0 discriminator 3
+	and	w19, w19, 65535
+.LVL1582:
+	b	.L1191
+.LVL1583:
+.L1195:
+	.loc 4 396 0
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L1196
+	.loc 4 398 0
+	strh	w19, [x21]
+	b	.L1194
+.L1196:
+	.loc 4 402 0
+	strh	w19, [x21, 4]
+.L1197:
+	.loc 4 414 0
+	adrp	x0, .LANCHOR112
+	.loc 4 411 0
+	add	x19, x20, :lo12:.LANCHOR37
+.LVL1584:
+	.loc 4 414 0
+	ldrh	w1, [x20, #:lo12:.LANCHOR37]
+	.loc 4 416 0
+	mov	w2, 2
+	.loc 4 414 0
+	ldr	x0, [x0, #:lo12:.LANCHOR112]
+	.loc 4 413 0
+	str	wzr, [x19, 8]
+	.loc 4 414 0
+	lsl	w1, w1, 10
+	.loc 4 411 0
+	strh	wzr, [x19, 2]
+	.loc 4 414 0
+	str	w1, [x0, 4]
+	.loc 4 415 0
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 36]
+	.loc 4 416 0
+	mov	w1, 1
+	bl	FlashEraseBlocks
+.LVL1585:
+	.loc 4 418 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+	bl	FtlBbmMapBadBlock
+.LVL1586:
+	.loc 4 419 0
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+.LVL1587:
+	.loc 4 421 0
+	bl	FtlBbmTblFlush
+.LVL1588:
+	.loc 4 426 0
+	strh	wzr, [x19, 2]
+	.loc 4 422 0
+	ldr	w0, [x19, 8]
+	.loc 4 425 0
+	ldrh	w1, [x19, 4]
+	.loc 4 422 0
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	.loc 4 424 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR37]
+.LVL1589:
+	.loc 4 427 0
+	strh	w0, [x19, 4]
+	.loc 4 425 0
+	strh	w1, [x20, #:lo12:.LANCHOR37]
+	.loc 4 429 0
+	bl	FtlBbmTblFlush
+.LVL1590:
+	.loc 4 432 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE231:
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlVendorPartWrite,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartWrite
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+.LFB263:
+	.loc 2 786 0
+	.cfi_startproc
+.LVL1591:
+	stp	x29, x30, [sp, -208]!
+	.cfi_def_cfa_offset 208
+	.cfi_offset 29, -208
+	.cfi_offset 30, -200
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -192
+	.cfi_offset 20, -184
+	mov	w20, w1
+	stp	x27, x28, [sp, 80]
+	.loc 2 794 0
+	add	w1, w0, w1
+.LVL1592:
+	.cfi_offset 27, -128
+	.cfi_offset 28, -120
+	.loc 2 786 0
+	mov	w28, w0
+.LVL1593:
+	.loc 2 794 0
+	adrp	x0, .LANCHOR16
+.LVL1594:
+	.loc 2 786 0
+	stp	x21, x22, [sp, 32]
+	.loc 2 794 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR16]
+	.loc 2 786 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -176
+	.cfi_offset 22, -168
+	.cfi_offset 23, -160
+	.cfi_offset 24, -152
+	.cfi_offset 25, -144
+	.cfi_offset 26, -136
+	.loc 2 794 0
+	cmp	w1, w0
+	bhi	.L1211
+	.loc 2 791 0
+	adrp	x0, .LANCHOR22
+	.loc 2 799 0
+	adrp	x25, .LANCHOR12
+	.loc 2 809 0
+	adrp	x26, .LANCHOR23
+	mov	x24, x2
+	.loc 2 791 0
+	ldrh	w21, [x0, #:lo12:.LANCHOR22]
+	.loc 2 799 0
+	add	x25, x25, :lo12:.LANCHOR12
+	.loc 2 809 0
+	add	x26, x26, :lo12:.LANCHOR23
+	.loc 2 791 0
+	mov	w23, 0
+	lsr	w21, w28, w21
+.LVL1595:
+.L1205:
+	.loc 2 797 0
+	cbnz	w20, .L1210
+.LVL1596:
+.L1203:
+	.loc 2 820 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+.LVL1597:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL1598:
+	ldp	x29, x30, [sp], 208
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1599:
+.L1210:
+	.cfi_restore_state
+	.loc 2 799 0
+	ldrh	w1, [x25]
+	.loc 2 798 0
+	adrp	x0, .LANCHOR133
+	adrp	x27, .LANCHOR124
+	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	.loc 2 799 0
+	udiv	w22, w28, w1
+	.loc 2 798 0
+	ldr	w2, [x0, w21, uxtw 2]
+.LVL1600:
+	.loc 2 802 0
+	and	w0, w20, 65535
+	.loc 2 799 0
+	msub	w22, w22, w1, w28
+.LVL1601:
+	.loc 2 800 0
+	sub	w19, w1, w22
+	and	w19, w19, 65535
+.LVL1602:
+	.loc 2 802 0
+	cmp	w20, w19
+	csel	w19, w0, w19, cc
+.LVL1603:
+	.loc 2 803 0
+	cbz	w2, .L1207
+	.loc 2 803 0 is_stmt 0 discriminator 1
+	cmp	w19, w1
+	beq	.L1207
+	.loc 2 805 0 is_stmt 1
+	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	str	x0, [x29, 120]
+	.loc 2 806 0
+	add	x0, x29, 144
+	.loc 2 804 0
+	str	w2, [x29, 116]
+	.loc 2 807 0
+	mov	w2, 1
+.LVL1604:
+	.loc 2 806 0
+	str	x0, [x29, 128]
+	.loc 2 807 0
+	mov	w1, w2
+	add	x0, x29, 112
+.LVL1605:
+	bl	FlashReadPages
+.LVL1606:
+.L1208:
+	.loc 2 811 0
+	lsl	w4, w19, 9
+	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	lsl	w22, w22, 7
+.LVL1607:
+	mov	w2, w4
+	mov	x1, x24
+	str	w4, [x29, 108]
+	add	x0, x0, x22, sxtw 2
+	bl	ftl_memcpy
+.LVL1608:
+	.loc 2 812 0
+	ldr	x2, [x27, #:lo12:.LANCHOR124]
+	mov	w1, w21
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
+	.loc 2 815 0
+	sub	w20, w20, w19
+.LVL1609:
+	.loc 2 816 0
+	add	w28, w28, w19
+.LVL1610:
+	.loc 2 814 0
+	add	w21, w21, 1
+.LVL1611:
+	.loc 2 812 0
+	bl	FtlMapWritePage
+.LVL1612:
+	.loc 2 813 0
+	cmn	w0, #1
+	.loc 2 817 0
+	ldr	w4, [x29, 108]
+	.loc 2 813 0
+	csinv	w23, w23, wzr, ne
+.LVL1613:
+	.loc 2 817 0
+	add	x24, x24, x4, sxtw
+.LVL1614:
+	b	.L1205
+.LVL1615:
+.L1207:
+	.loc 2 809 0
+	ldrh	w2, [x26]
+.LVL1616:
+	mov	w1, 0
+	ldr	x0, [x27, #:lo12:.LANCHOR124]
+	bl	ftl_memset
+.LVL1617:
+	b	.L1208
+.LVL1618:
+.L1211:
+	.loc 2 795 0
+	mov	w23, -1
+	b	.L1203
+	.cfi_endproc
+.LFE263:
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_save_ext_data
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+.LFB286:
+	.loc 2 2110 0
+	.cfi_startproc
+	.loc 2 2111 0
+	adrp	x0, .LANCHOR83
+	add	x2, x0, :lo12:.LANCHOR83
+	ldr	w1, [x0, #:lo12:.LANCHOR83]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1216
+.LBB274:
+.LBB275:
+	.loc 2 2112 0
+	mov	w0, 64
+	.loc 2 2125 0
+	mov	w1, 1
+	.loc 2 2112 0
+	movk	w0, 0x5000, lsl 16
+	str	w0, [x2, 4]
+	.loc 2 2113 0
+	adrp	x0, .LANCHOR69
+	ldr	w0, [x0, #:lo12:.LANCHOR69]
+	str	w0, [x2, 88]
+	.loc 2 2114 0
+	adrp	x0, .LANCHOR70
+	ldr	w0, [x0, #:lo12:.LANCHOR70]
+	str	w0, [x2, 92]
+	.loc 2 2115 0
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
+	str	w0, [x2, 8]
+	.loc 2 2116 0
+	adrp	x0, .LANCHOR65
+	ldr	w0, [x0, #:lo12:.LANCHOR65]
+	str	w0, [x2, 12]
+	.loc 2 2117 0
+	adrp	x0, .LANCHOR63
+	ldr	w0, [x0, #:lo12:.LANCHOR63]
+	str	w0, [x2, 16]
+	.loc 2 2118 0
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	str	w0, [x2, 20]
+	.loc 2 2119 0
+	adrp	x0, .LANCHOR74
+	ldr	w0, [x0, #:lo12:.LANCHOR74]
+	str	w0, [x2, 28]
+	.loc 2 2120 0
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	str	w0, [x2, 32]
+	.loc 2 2121 0
+	adrp	x0, .LANCHOR64
+	ldr	w0, [x0, #:lo12:.LANCHOR64]
+	str	w0, [x2, 36]
+	.loc 2 2122 0
+	adrp	x0, .LANCHOR66
+	ldr	w0, [x0, #:lo12:.LANCHOR66]
+	str	w0, [x2, 40]
+	.loc 2 2123 0
+	adrp	x0, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR77]
+	str	w0, [x2, 44]
+	.loc 2 2124 0
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	str	w0, [x2, 48]
+	.loc 2 2125 0
+	mov	w0, 0
+	b	FtlVendorPartWrite
+.LVL1619:
+.L1216:
+	ret
+.LBE275:
+.LBE274:
+	.cfi_endproc
+.LFE286:
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlEctTblFlush
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+.LFB265:
+	.loc 2 861 0
+	.cfi_startproc
+.LVL1620:
+	.loc 2 864 0
+	adrp	x2, .LANCHOR166
+	ldrh	w1, [x2, #:lo12:.LANCHOR166]
+	cmp	w1, 31
+	bhi	.L1222
+	.loc 2 865 0
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR166]
+.LVL1621:
+	.loc 2 866 0
+	mov	w1, 1
+.LVL1622:
+.L1219:
+	adrp	x2, .LANCHOR127
+	.loc 2 868 0
+	cbnz	w0, .L1220
+	.loc 2 868 0 is_stmt 0 discriminator 1
+	ldr	x0, [x2, #:lo12:.LANCHOR127]
+.LVL1623:
+	ldr	w3, [x0, 20]
+	ldr	w0, [x0, 16]
+	add	w1, w1, w3
+.LVL1624:
+	cmp	w0, w1
+	bcc	.L1224
+.L1220:
+	.loc 2 861 0 is_stmt 1
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 870 0
+	ldr	x2, [x2, #:lo12:.LANCHOR127]
+	ldr	w0, [x2, 16]
+	str	w0, [x2, 20]
+	.loc 2 871 0
+	mov	w0, 17221
+	.loc 2 874 0
+	str	wzr, [x2, 4]
+	.loc 2 871 0
+	movk	w0, 0x4254, lsl 16
+	str	w0, [x2]
+	.loc 2 872 0
+	adrp	x0, .LANCHOR125
+	ldrh	w1, [x0, #:lo12:.LANCHOR125]
+	lsl	w0, w1, 9
+	str	w0, [x2, 12]
+	.loc 2 873 0
+	ldr	w0, [x2, 8]
+	add	w0, w0, 1
+	str	w0, [x2, 8]
+	.loc 2 875 0
+	mov	w0, 64
+	bl	FtlVendorPartWrite
+.LVL1625:
+	.loc 2 876 0
+	bl	Ftl_save_ext_data
+.LVL1626:
+	.loc 2 878 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1627:
+.L1222:
+	.loc 2 862 0
+	mov	w1, 32
+	b	.L1219
+.LVL1628:
+.L1224:
+	.loc 2 878 0
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE265:
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.FtlVendorPartRead,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartRead
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+.LFB264:
+	.loc 2 823 0
+	.cfi_startproc
+.LVL1629:
+	stp	x29, x30, [sp, -208]!
+	.cfi_def_cfa_offset 208
+	.cfi_offset 29, -208
+	.cfi_offset 30, -200
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -192
+	.cfi_offset 20, -184
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	.loc 2 832 0
+	add	w1, w0, w1
+.LVL1630:
+	.cfi_offset 21, -176
+	.cfi_offset 22, -168
+	.loc 2 823 0
+	mov	w21, w0
+.LVL1631:
+	.loc 2 832 0
+	adrp	x0, .LANCHOR16
+.LVL1632:
+	.loc 2 823 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 832 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR16]
+	.loc 2 823 0
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -160
+	.cfi_offset 24, -152
+	.cfi_offset 25, -144
+	.cfi_offset 26, -136
+	.cfi_offset 27, -128
+	.cfi_offset 28, -120
+	.loc 2 832 0
+	cmp	w1, w0
+	bhi	.L1234
+	.loc 2 828 0
+	adrp	x0, .LANCHOR22
+	.loc 2 836 0
+	adrp	x24, .LANCHOR12
+	mov	x23, x2
+	add	x24, x24, :lo12:.LANCHOR12
+	.loc 2 828 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR22]
+	mov	w22, 0
+	.loc 2 835 0
+	adrp	x25, .LANCHOR133
+	.loc 2 828 0
+	lsr	w26, w21, w3
+.LVL1633:
+.L1228:
+	.loc 2 834 0
+	cbnz	w20, .L1233
+.LVL1634:
+.L1226:
+	.loc 2 857 0
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+.LVL1635:
+	ldp	x21, x22, [sp, 32]
+.LVL1636:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1637:
+.L1233:
+	.cfi_restore_state
+	.loc 2 836 0
+	ldrh	w19, [x24]
+	.loc 2 835 0
+	ldr	x0, [x25, #:lo12:.LANCHOR133]
+	.loc 2 836 0
+	udiv	w27, w21, w19
+	.loc 2 835 0
+	ldr	w1, [x0, w26, uxtw 2]
+.LVL1638:
+	.loc 2 839 0
+	and	w0, w20, 65535
+	.loc 2 836 0
+	msub	w27, w27, w19, w21
+.LVL1639:
+	.loc 2 837 0
+	sub	w19, w19, w27
+	and	w19, w19, 65535
+.LVL1640:
+	.loc 2 839 0
+	cmp	w20, w19
+	csel	w19, w0, w19, cc
+.LVL1641:
+	lsl	w28, w19, 9
+	.loc 2 840 0
+	cbz	w1, .L1230
+	.loc 2 842 0
+	adrp	x4, .LANCHOR124
+	.loc 2 844 0
+	mov	w2, 1
+	.loc 2 842 0
+	str	x4, [x29, 104]
+	.loc 2 847 0
+	lsl	w27, w27, 7
+.LVL1642:
+	.loc 2 842 0
+	ldr	x0, [x4, #:lo12:.LANCHOR124]
+	str	x0, [x29, 120]
+	.loc 2 843 0
+	add	x0, x29, 144
+	.loc 2 841 0
+	str	w1, [x29, 116]
+	.loc 2 844 0
+	mov	w1, w2
+.LVL1643:
+	.loc 2 843 0
+	str	x0, [x29, 128]
+	.loc 2 844 0
+	add	x0, x29, 112
+.LVL1644:
+	bl	FlashReadPages
+.LVL1645:
+	.loc 2 847 0
+	ldr	x4, [x29, 104]
+	mov	w2, w28
+	.loc 2 846 0
+	ldr	w0, [x29, 112]
+	cmn	w0, #1
+	.loc 2 847 0
+	mov	x0, x23
+	ldr	x1, [x4, #:lo12:.LANCHOR124]
+	.loc 2 846 0
+	csinv	w22, w22, wzr, ne
+.LVL1646:
+	.loc 2 847 0
+	add	x1, x1, x27, sxtw 2
+	bl	ftl_memcpy
+.LVL1647:
+.L1232:
+	.loc 2 851 0
+	add	w26, w26, 1
+.LVL1648:
+	.loc 2 852 0
+	sub	w20, w20, w19
+.LVL1649:
+	.loc 2 853 0
+	add	w21, w21, w19
+.LVL1650:
+	.loc 2 854 0
+	add	x23, x23, x28, sxtw
+.LVL1651:
+	b	.L1228
+.LVL1652:
+.L1230:
+	.loc 2 849 0
+	mov	w2, w28
+	mov	w1, 0
+.LVL1653:
+	mov	x0, x23
+	bl	ftl_memset
+.LVL1654:
+	b	.L1232
+.LVL1655:
+.L1234:
+	.loc 2 833 0
+	mov	w22, -1
+	b	.L1226
+	.cfi_endproc
+.LFE264:
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",@progbits
+	.align	2
+	.global	FtlLoadEctTbl
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+.LFB271:
+	.loc 2 1334 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 1335 0
+	mov	w0, 64
+	.loc 2 1334 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 2 1335 0
+	adrp	x19, .LANCHOR127
+	adrp	x20, .LANCHOR125
+	ldr	x2, [x19, #:lo12:.LANCHOR127]
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	bl	FtlVendorPartRead
+.LVL1656:
+	.loc 2 1336 0
+	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	ldr	w1, [x0]
+	mov	w0, 17221
+	movk	w0, 0x4254, lsl 16
+	cmp	w1, w0
+	beq	.L1237
+.LBB278:
+.LBB279:
+	.loc 2 1338 0
+	adrp	x1, .LC100
+	adrp	x0, .LC71
+	add	x1, x1, :lo12:.LC100
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+.LVL1657:
+	.loc 2 1339 0
+	ldr	x0, [x19, #:lo12:.LANCHOR127]
+	mov	w1, 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR125]
+	lsl	w2, w2, 9
+	bl	ftl_memset
+.LVL1658:
+.L1237:
+.LBE279:
+.LBE278:
+	.loc 2 1344 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE271:
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_load_ext_data
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+.LFB287:
+	.loc 2 2130 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	.loc 2 2131 0
+	mov	w1, 1
+	mov	w0, 0
+	.loc 2 2130 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 2131 0
+	adrp	x19, .LANCHOR83
+	.loc 2 2130 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2131 0
+	add	x21, x19, :lo12:.LANCHOR83
+	mov	x2, x21
+	bl	FtlVendorPartRead
+.LVL1659:
+	.loc 2 2132 0
+	ldr	w0, [x19, #:lo12:.LANCHOR83]
+	mov	w20, 19539
+	movk	w20, 0x4654, lsl 16
+	cmp	w0, w20
+	beq	.L1240
+	.loc 2 2133 0
+	mov	w2, 512
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+.LVL1660:
+	.loc 2 2134 0
+	str	w20, [x19, #:lo12:.LANCHOR83]
+.L1240:
+	.loc 2 2137 0
+	ldr	w1, [x19, #:lo12:.LANCHOR83]
+	add	x0, x19, :lo12:.LANCHOR83
+	cmp	w1, w20
+	adrp	x1, .LANCHOR74
+	bne	.L1241
+	.loc 2 2138 0
+	adrp	x2, .LANCHOR69
+	ldr	w3, [x0, 88]
+	str	w3, [x2, #:lo12:.LANCHOR69]
+	.loc 2 2139 0
+	adrp	x2, .LANCHOR70
+	ldr	w3, [x0, 92]
+	str	w3, [x2, #:lo12:.LANCHOR70]
+	.loc 2 2140 0
+	adrp	x2, .LANCHOR68
+	ldr	w3, [x0, 8]
+	str	w3, [x2, #:lo12:.LANCHOR68]
+	.loc 2 2141 0
+	adrp	x2, .LANCHOR65
+	ldr	w3, [x0, 12]
+	str	w3, [x2, #:lo12:.LANCHOR65]
+	.loc 2 2142 0
+	adrp	x2, .LANCHOR63
+	ldr	w3, [x0, 16]
+	str	w3, [x2, #:lo12:.LANCHOR63]
+	.loc 2 2143 0
+	adrp	x2, .LANCHOR67
+	ldr	w3, [x0, 20]
+	str	w3, [x2, #:lo12:.LANCHOR67]
+	.loc 2 2145 0
+	ldp	w2, w3, [x0, 28]
+	.loc 2 2144 0
+	str	w2, [x1, #:lo12:.LANCHOR74]
+	.loc 2 2145 0
+	adrp	x2, .LANCHOR76
+	str	w3, [x2, #:lo12:.LANCHOR76]
+	.loc 2 2146 0
+	adrp	x2, .LANCHOR64
+	ldr	w3, [x0, 36]
+	str	w3, [x2, #:lo12:.LANCHOR64]
+	.loc 2 2147 0
+	adrp	x2, .LANCHOR66
+	ldr	w3, [x0, 40]
+	str	w3, [x2, #:lo12:.LANCHOR66]
+	.loc 2 2148 0
+	adrp	x2, .LANCHOR77
+	ldr	w3, [x0, 44]
+	str	w3, [x2, #:lo12:.LANCHOR77]
+	.loc 2 2149 0
+	ldr	w2, [x0, 48]
+	adrp	x0, .LANCHOR78
+	str	w2, [x0, #:lo12:.LANCHOR78]
+.L1241:
+	.loc 2 2152 0
+	adrp	x0, .LANCHOR14
+	adrp	x2, .LANCHOR73
+	ldr	w1, [x1, #:lo12:.LANCHOR74]
+	ldrh	w0, [x0, #:lo12:.LANCHOR14]
+	ldr	w2, [x2, #:lo12:.LANCHOR73]
+	.loc 2 2153 0
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	.loc 2 2152 0
+	madd	w0, w0, w2, w1
+	adrp	x1, .LANCHOR5
+	.loc 2 2153 0
+	ldp	x29, x30, [sp], 48
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	.loc 2 2152 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR5]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR75
+	str	w0, [x1, #:lo12:.LANCHOR75]
+	.loc 2 2153 0
+	ret
+	.cfi_endproc
+.LFE287:
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlVpcTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlVpcTblFlush
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+.LFB269:
+	.loc 2 1004 0
+	.cfi_startproc
+.LVL1661:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 2 1013 0
+	adrp	x1, .LANCHOR81
+	.loc 2 1019 0
+	mov	w2, 19539
+	.loc 2 1004 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.loc 2 1011 0
+	adrp	x25, .LANCHOR109
+	.loc 2 1004 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 2 1010 0
+	adrp	x22, .LANCHOR108
+	.loc 2 1004 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.loc 2 1010 0
+	adrp	x24, .LANCHOR39
+	.loc 2 1004 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -32
+	.cfi_offset 28, -24
+	.loc 2 1010 0
+	add	x28, x22, :lo12:.LANCHOR108
+	.loc 2 1011 0
+	ldr	x21, [x25, #:lo12:.LANCHOR109]
+	.loc 2 1019 0
+	movk	w2, 0x4654, lsl 16
+	.loc 2 1004 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.loc 2 1013 0
+	add	x19, x1, :lo12:.LANCHOR81
+	.loc 2 1010 0
+	ldr	x0, [x24, #:lo12:.LANCHOR39]
+	.loc 2 1041 0
+	adrp	x23, .LANCHOR71
+	.loc 2 1013 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR81]
+	.loc 2 1057 0
+	adrp	x27, .LANCHOR20
+	.loc 2 1011 0
+	stp	x0, x21, [x28, 8]
+.LVL1662:
+	.loc 2 1005 0
+	mov	w26, 65535
+	.loc 2 1013 0
+	strh	w1, [x21, 2]
+	.loc 2 1014 0
+	mov	w1, -3932
+	strh	w1, [x21]
+	.loc 2 1015 0
+	ldr	w1, [x19, 8]
+	.loc 2 1016 0
+	stp	w1, wzr, [x21, 4]
+	.loc 2 1019 0
+	adrp	x1, .LANCHOR79
+	add	x20, x1, :lo12:.LANCHOR79
+	.loc 2 1017 0
+	str	wzr, [x21, 12]
+	.loc 2 1019 0
+	str	w2, [x1, #:lo12:.LANCHOR79]
+	.loc 2 1020 0
+	mov	w1, 64
+	movk	w1, 0x5000, lsl 16
+	str	w1, [x20, 4]
+	.loc 2 1021 0
+	ldrh	w1, [x19, 6]
+	.loc 2 1024 0
+	adrp	x2, .LANCHOR51
+	.loc 2 1021 0
+	strh	w1, [x20, 8]
+	.loc 2 1022 0
+	adrp	x1, .LANCHOR10
+	ldrh	w1, [x1, #:lo12:.LANCHOR10]
+	strb	w1, [x20, 10]
+	.loc 2 1024 0
+	add	x1, x2, :lo12:.LANCHOR51
+	ldrh	w2, [x2, #:lo12:.LANCHOR51]
+	strh	w2, [x20, 14]
+	.loc 2 1025 0
+	ldrh	w2, [x1, 2]
+	ldrb	w3, [x1, 6]
+	.loc 2 1026 0
+	ldrb	w1, [x1, 8]
+	strb	w1, [x20, 11]
+	.loc 2 1025 0
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x20, 16]
+	.loc 2 1028 0
+	adrp	x2, .LANCHOR52
+	add	x1, x2, :lo12:.LANCHOR52
+	ldrh	w2, [x2, #:lo12:.LANCHOR52]
+	.loc 2 1029 0
+	ldrb	w3, [x1, 6]
+	.loc 2 1028 0
+	strh	w2, [x20, 18]
+	.loc 2 1029 0
+	ldrh	w2, [x1, 2]
+	.loc 2 1030 0
+	ldrb	w1, [x1, 8]
+	strb	w1, [x20, 12]
+	.loc 2 1029 0
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x20, 20]
+	.loc 2 1032 0
+	adrp	x2, .LANCHOR53
+	add	x1, x2, :lo12:.LANCHOR53
+	ldrh	w2, [x2, #:lo12:.LANCHOR53]
+	.loc 2 1033 0
+	ldrb	w3, [x1, 6]
+	.loc 2 1032 0
+	strh	w2, [x20, 22]
+	.loc 2 1033 0
+	ldrh	w2, [x1, 2]
+	.loc 2 1034 0
+	ldrb	w1, [x1, 8]
+	strb	w1, [x20, 13]
+	.loc 2 1036 0
+	adrp	x1, .LANCHOR73
+	.loc 2 1033 0
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x20, 24]
+	.loc 2 1036 0
+	ldr	w1, [x1, #:lo12:.LANCHOR73]
+	str	w1, [x20, 32]
+	.loc 2 1041 0
+	ldr	w1, [x23, #:lo12:.LANCHOR71]
+	str	w1, [x20, 40]
+	.loc 2 1042 0
+	adrp	x1, .LANCHOR72
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	str	w1, [x20, 36]
+	.loc 2 1047 0
+	adrp	x1, .LANCHOR23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 255
+	bl	ftl_memset
+.LVL1663:
+	.loc 2 1048 0
+	ldr	x0, [x28, 8]
+	mov	x1, x20
+	mov	w2, 48
+	.loc 2 1049 0
+	adrp	x20, .LANCHOR5
+	.loc 2 1048 0
+	bl	ftl_memcpy
+.LVL1664:
+	.loc 2 1049 0
+	adrp	x1, .LANCHOR43
+	ldrh	w2, [x20, #:lo12:.LANCHOR5]
+	ldr	x0, [x28, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	lsl	w2, w2, 1
+	add	x0, x0, 48
+	bl	ftl_memcpy
+.LVL1665:
+	.loc 2 1050 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR1
+	ldr	x3, [x28, 8]
+	.loc 2 1007 0
+	mov	w20, 0
+	.loc 2 1050 0
+	ldr	x1, [x1, #:lo12:.LANCHOR1]
+	lsr	w2, w0, 3
+	ubfiz	x0, x0, 1, 16
+	add	w2, w2, 4
+	add	x0, x0, 48
+	and	x0, x0, -4
+	add	x0, x3, x0
+	bl	ftl_memcpy
+.LVL1666:
+	.loc 2 1051 0
+	mov	w0, 0
+	bl	FtlUpdateVaildLpn
+.LVL1667:
+	.loc 2 1077 0
+	add	x0, x27, :lo12:.LANCHOR20
+	str	x0, [x29, 104]
+.LVL1668:
+.L1244:
+	.loc 2 1053 0
+	ldr	x0, [x24, #:lo12:.LANCHOR39]
+	.loc 2 1056 0
+	mov	w3, 1
+	.loc 2 1053 0
+	str	x0, [x28, 8]
+	.loc 2 1056 0
+	mov	w2, w3
+	.loc 2 1054 0
+	ldr	x0, [x25, #:lo12:.LANCHOR109]
+	.loc 2 1055 0
+	ldrh	w1, [x19, 2]
+	.loc 2 1054 0
+	str	x0, [x28, 16]
+	.loc 2 1055 0
+	ldrh	w0, [x19]
+	orr	w0, w1, w0, lsl 10
+	.loc 2 1056 0
+	mov	w1, w3
+	.loc 2 1055 0
+	str	w0, [x28, 4]
+	.loc 2 1056 0
+	mov	x0, x28
+	bl	FlashProgPages
+.LVL1669:
+	.loc 2 1057 0
+	ldrh	w0, [x27, #:lo12:.LANCHOR20]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1245
+	.loc 2 1059 0
+	ldrh	w0, [x19]
+	.loc 2 1058 0
+	ldrh	w26, [x19, 4]
+.LVL1670:
+	.loc 2 1060 0
+	strh	wzr, [x19, 2]
+	.loc 2 1059 0
+	strh	w0, [x19, 4]
+	.loc 2 1061 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL1671:
+	strh	w0, [x19]
+	.loc 2 1066 0
+	ldr	w1, [x23, #:lo12:.LANCHOR71]
+	.loc 2 1070 0
+	mov	w3, 1
+	.loc 2 1066 0
+	str	w1, [x19, 8]
+	add	w2, w1, 1
+	str	w2, [x23, #:lo12:.LANCHOR71]
+	.loc 2 1067 0
+	ubfiz	w2, w0, 10, 16
+	str	w2, [x28, 4]
+	.loc 2 1069 0
+	strh	w0, [x21, 2]
+	.loc 2 1070 0
+	mov	w2, w3
+	.loc 2 1068 0
+	str	w1, [x21, 4]
+	.loc 2 1070 0
+	mov	x0, x28
+	mov	w1, w3
+	bl	FlashProgPages
+.LVL1672:
+.L1245:
+	.loc 2 1072 0
+	ldrh	w0, [x19, 2]
+	.loc 2 1073 0
+	ldr	w1, [x28]
+	.loc 2 1072 0
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	.loc 2 1073 0
+	cmn	w1, #1
+	bne	.L1246
+	.loc 2 1075 0
+	cmp	w0, 1
+	bne	.L1247
+	.loc 2 1075 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR167
+	adrp	x0, .LC1
+	mov	w2, 1075
+	add	x1, x1, :lo12:.LANCHOR167
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1673:
+.L1247:
+	.loc 2 1076 0 is_stmt 1
+	ldrh	w0, [x19, 2]
+	cmp	w0, 1
+	bne	.L1248
+	.loc 2 1077 0
+	ldr	x0, [x29, 104]
+	ldrh	w0, [x0]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L1248:
+	.loc 2 1078 0
+	add	w20, w20, 1
+.LVL1674:
+	and	w20, w20, 65535
+.LVL1675:
+	.loc 2 1079 0
+	cmp	w20, 3
+	bls	.L1244
+	.loc 2 1080 0
+	add	x22, x22, :lo12:.LANCHOR108
+	adrp	x0, .LC101
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC101
+	ldr	w1, [x22, 4]
+	bl	printf
+.LVL1676:
+.L1250:
+	b	.L1250
+.L1246:
+	.loc 2 1086 0
+	cmp	w0, 1
+	beq	.L1244
+	.loc 2 1089 0
+	mov	w0, 65535
+	cmp	w26, w0
+	beq	.L1251
+	.loc 2 1090 0
+	mov	w1, 1
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+.LVL1677:
+.L1251:
+	.loc 2 1092 0
+	ldp	x19, x20, [sp, 16]
+.LVL1678:
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+.LVL1679:
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1680:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE269:
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlVpcCheckAndModify,"ax",@progbits
+	.align	2
+	.global	FtlVpcCheckAndModify
+	.type	FtlVpcCheckAndModify, %function
+FtlVpcCheckAndModify:
+.LFB289:
+	.loc 2 2192 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 2 2197 0
+	adrp	x1, .LANCHOR168
+	adrp	x0, .LC91
+	add	x1, x1, :lo12:.LANCHOR168
+	.loc 2 2192 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.loc 2 2197 0
+	add	x0, x0, :lo12:.LC91
+	.loc 2 2192 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 2198 0
+	adrp	x20, .LANCHOR128
+	.loc 2 2192 0
+	stp	x23, x24, [sp, 48]
+	.loc 2 2199 0
+	adrp	x21, .LANCHOR62
+	.loc 2 2192 0
+	str	x25, [sp, 64]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 25, -32
+	.loc 2 2197 0
+	bl	printf
+.LVL1681:
+	.loc 2 2198 0
+	adrp	x0, .LANCHOR6
+	.loc 2 2199 0
+	mov	w19, 0
+	add	x21, x21, :lo12:.LANCHOR62
+	.loc 2 2198 0
+	mov	w1, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR6]
+	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL1682:
+.L1257:
+	.loc 2 2199 0 discriminator 1
+	ldr	w0, [x21]
+	cmp	w19, w0
+	bcc	.L1259
+	.loc 2 2206 0 discriminator 1
+	adrp	x22, .LANCHOR5
+	.loc 2 2209 0 discriminator 1
+	adrp	x23, .LC102
+	.loc 2 2206 0 discriminator 1
+	add	x22, x22, :lo12:.LANCHOR5
+	.loc 2 2209 0 discriminator 1
+	add	x23, x23, :lo12:.LC102
+	mov	w19, 0
+.LVL1683:
+	.loc 2 2207 0 discriminator 1
+	adrp	x25, .LANCHOR43
+	mov	w24, 65535
+.L1260:
+.LVL1684:
+	.loc 2 2206 0 discriminator 1
+	ldrh	w0, [x22]
+	cmp	w0, w19
+	bhi	.L1264
+	.loc 2 2218 0
+	ldp	x19, x20, [sp, 16]
+.LVL1685:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1686:
+.L1259:
+	.cfi_restore_state
+	.loc 2 2200 0
+	mov	w2, 0
+	add	x1, x29, 92
+	mov	w0, w19
+	bl	log2phys
+.LVL1687:
+	.loc 2 2201 0
+	ldr	w0, [x29, 92]
+	cmn	w0, #1
+	beq	.L1258
+	.loc 2 2202 0
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1688:
+	.loc 2 2203 0
+	ldr	x2, [x20, #:lo12:.LANCHOR128]
+	ubfiz	x0, x0, 1, 16
+.LVL1689:
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+.L1258:
+	.loc 2 2199 0 discriminator 2
+	add	w19, w19, 1
+.LVL1690:
+	b	.L1257
+.LVL1691:
+.L1264:
+	.loc 2 2207 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ubfiz	x21, x19, 1, 16
+	ldrh	w2, [x0, x21]
+	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	ldrh	w3, [x0, x21]
+	cmp	w2, w3
+	beq	.L1262
+	.loc 2 2207 0 is_stmt 0 discriminator 1
+	cmp	w2, w24
+	beq	.L1262
+	.loc 2 2209 0 is_stmt 1
+	mov	w1, w19
+	mov	x0, x23
+	bl	printf
+.LVL1692:
+	.loc 2 2210 0
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	beq	.L1262
+	.loc 2 2210 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w19
+	beq	.L1262
+	.loc 2 2210 0 discriminator 2
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	beq	.L1262
+	.loc 2 2211 0 is_stmt 1
+	ldr	x0, [x20, #:lo12:.LANCHOR128]
+	ldrh	w1, [x0, x21]
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	strh	w1, [x0, x21]
+	.loc 2 2212 0
+	mov	w0, w19
+	bl	update_vpc_list
+.LVL1693:
+	.loc 2 2213 0
+	bl	l2p_flush
+.LVL1694:
+	.loc 2 2214 0
+	bl	FtlVpcTblFlush
+.LVL1695:
+.L1262:
+	.loc 2 2206 0 discriminator 2
+	add	w19, w19, 1
+.LVL1696:
+	and	w19, w19, 65535
+.LVL1697:
+	b	.L1260
+	.cfi_endproc
+.LFE289:
+	.size	FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
+	.section	.text.allocate_new_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_new_data_superblock
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+.LFB299:
+	.loc 2 2631 0
+	.cfi_startproc
+.LVL1698:
+	stp	x29, x30, [sp, -48]!
+	.cfi_def_cfa_offset 48
+	.cfi_offset 29, -48
+	.cfi_offset 30, -40
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -32
+	.cfi_offset 20, -24
+	.loc 2 2632 0
+	ldrh	w19, [x0]
+.LVL1699:
+	.loc 2 2631 0
+	str	x21, [sp, 32]
+	.cfi_offset 21, -16
+	.loc 2 2631 0
+	mov	x21, x0
+	.loc 2 2633 0
+	adrp	x0, .LANCHOR5
+.LVL1700:
+	ldrh	w0, [x0, #:lo12:.LANCHOR5]
+	cmp	w0, w19
+	bcs	.L1270
+	.loc 2 2633 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR169
+	adrp	x0, .LC1
+	mov	w2, 2633
+	add	x1, x1, :lo12:.LANCHOR169
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1701:
+.L1270:
+	.loc 2 2635 0 is_stmt 1
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1271
+	.loc 2 2636 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x19, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1272
+	.loc 2 2637 0
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.LVL1702:
+.L1271:
+	.loc 2 2642 0
+	adrp	x1, .LANCHOR151
+	.loc 2 2641 0
+	mov	w0, 1
+	strb	w0, [x21, 8]
+	.loc 2 2642 0
+	mov	w2, 65535
+	ldrh	w0, [x1, #:lo12:.LANCHOR151]
+	mov	x20, x1
+	cmp	w0, w2
+	beq	.L1273
+	.loc 2 2643 0
+	cmp	w19, w0
+	bne	.L1274
+	.loc 2 2643 0 is_stmt 0 discriminator 1
+	adrp	x2, .LANCHOR43
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L1275
+.L1274:
+	.loc 2 2644 0 is_stmt 1
+	bl	update_vpc_list
+.LVL1703:
+.L1275:
+	.loc 2 2645 0
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR151]
+.L1273:
+	.loc 2 2647 0
+	mov	x0, x21
+	bl	allocate_data_superblock
+.LVL1704:
+	.loc 2 2648 0
+	bl	l2p_flush
+.LVL1705:
+	.loc 2 2649 0
+	mov	w0, 0
+	bl	FtlEctTblFlush
+.LVL1706:
+	.loc 2 2650 0
+	bl	FtlVpcTblFlush
+.LVL1707:
+	.loc 2 2652 0
+	ldr	x21, [sp, 32]
+.LVL1708:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+.LVL1709:
+	ldp	x29, x30, [sp], 48
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 21
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1710:
+.L1272:
+	.cfi_restore_state
+	.loc 2 2639 0
+	mov	w0, w19
+	bl	INSERT_FREE_LIST
+.LVL1711:
+	b	.L1271
+	.cfi_endproc
+.LFE299:
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",@progbits
+	.align	2
+	.global	FtlProgPages
+	.type	FtlProgPages, %function
+FtlProgPages:
+.LFB215:
+	.loc 3 904 0
+	.cfi_startproc
+.LVL1712:
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 3 911 0
+	mov	w2, 0
+.LVL1713:
+	.loc 3 904 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	mov	x19, x3
+	stp	x23, x24, [sp, 48]
+	add	x20, x0, 4
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	mov	w21, w1
+	str	x25, [sp, 64]
+	.cfi_offset 25, -32
+	ubfiz	x21, x21, 5, 32
+	add	x21, x21, 4
+	.loc 3 918 0
+	adrp	x24, .LANCHOR19
+	.loc 3 911 0
+	ldrb	w3, [x3, 9]
+.LVL1714:
+	.loc 3 926 0
+	adrp	x23, .LANCHOR83
+	add	x21, x0, x21
+	.loc 3 918 0
+	add	x24, x24, :lo12:.LANCHOR19
+	.loc 3 926 0
+	add	x23, x23, :lo12:.LANCHOR83
+	.loc 3 911 0
+	bl	FlashProgPages
+.LVL1715:
+.L1281:
+	.loc 3 913 0 discriminator 1
+	cmp	x20, x21
+	beq	.L1288
+	sub	x22, x20, #4
+	.loc 3 917 0
+	adrp	x25, .LANCHOR43
+	b	.L1289
+.L1284:
+	.loc 3 915 0
+	ldr	w0, [x20]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1716:
+	.loc 3 916 0
+	ldrh	w1, [x19]
+	cmp	w1, w0, uxth
+	bne	.L1282
+	.loc 3 917 0
+	ldr	x2, [x25, #:lo12:.LANCHOR43]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w3, [x19, 4]
+	ldrh	w0, [x2, x1]
+.LVL1717:
+	sub	w0, w0, w3
+	strh	w0, [x2, x1]
+	.loc 3 919 0
+	strb	wzr, [x19, 6]
+	.loc 3 918 0
+	ldrh	w0, [x24]
+	strh	w0, [x19, 2]
+	.loc 3 920 0
+	strh	wzr, [x19, 4]
+.L1282:
+	.loc 3 922 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1283
+	.loc 3 923 0
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL1718:
+.L1283:
+	.loc 3 926 0
+	ldr	w0, [x23, 96]
+	add	w0, w0, 1
+	str	w0, [x23, 96]
+	.loc 3 927 0
+	ldr	w0, [x20]
+	lsr	w0, w0, 10
+	bl	FtlGcMarkBadPhyBlk
+.LVL1719:
+	.loc 3 928 0
+	mov	x0, x19
+	bl	get_new_active_ppa
+.LVL1720:
+	.loc 3 929 0
+	str	w0, [x20]
+	.loc 3 930 0
+	mov	w2, 0
+	.loc 3 928 0
+	str	w0, [x29, 92]
+	.loc 3 930 0
+	mov	w1, 1
+	ldrb	w3, [x19, 9]
+	mov	x0, x22
+	bl	FlashProgPages
+.LVL1721:
+.L1289:
+	.loc 3 914 0
+	ldr	w0, [x20, -4]
+	cmn	w0, #1
+	beq	.L1284
+	.loc 3 933 0
+	adrp	x0, .LANCHOR3
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1285
+	.loc 3 933 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC1
+	mov	w2, 933
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1722:
+.L1285:
+	.loc 3 934 0 is_stmt 1
+	add	x1, x29, 96
+	ldr	w0, [x22, 4]
+	.loc 3 935 0
+	mov	w2, 1
+	.loc 3 934 0
+	str	w0, [x1, -4]!
+	.loc 3 935 0
+	ldr	w0, [x22, 24]
+	bl	log2phys
+.LVL1723:
+	.loc 3 937 0
+	ldr	x0, [x22, 16]
+	ldr	w3, [x0, 12]
+.LVL1724:
+	.loc 3 939 0
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+.LVL1725:
+	and	w1, w0, 65535
+	mov	w22, w1
+.LVL1726:
+	.loc 3 940 0
+	cmn	w3, #1
+	beq	.L1286
+	.loc 3 942 0
+	adrp	x2, .LANCHOR43
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L1287
+	.loc 3 943 0
+	adrp	x0, .LC103
+	mov	w2, 0
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.LVL1727:
+.L1287:
+	.loc 3 944 0
+	mov	w0, w22
+	bl	decrement_vpc_count
+.LVL1728:
+.L1286:
+	add	x20, x20, 32
+	b	.L1281
+.LVL1729:
+.L1288:
+	.loc 3 948 0
+	adrp	x0, .LANCHOR3
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1280
+	.loc 3 948 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC1
+	mov	w2, 948
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1730:
+.L1280:
+	.loc 3 949 0 is_stmt 1
+	ldp	x19, x20, [sp, 16]
+.LVL1731:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE215:
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+.LFB216:
+	.loc 3 952 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 3 953 0
+	adrp	x19, .LANCHOR150
+	ldr	x0, [x19, #:lo12:.LANCHOR150]
+	cbz	x0, .L1296
+	.loc 3 954 0
+	adrp	x1, .LANCHOR171
+	mov	w2, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR171]
+	mov	w1, 1
+	bl	FtlProgPages
+.LVL1732:
+	.loc 3 955 0
+	str	xzr, [x19, #:lo12:.LANCHOR150]
+.L1296:
+	.loc 3 958 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE216:
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+.LFB212:
+	.loc 3 797 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 798 0
+	bl	FtlCacheWriteBack
+.LVL1733:
+	.loc 3 799 0
+	bl	l2p_flush
+.LVL1734:
+	.loc 3 800 0
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.LVL1735:
+	.loc 3 801 0
+	bl	FtlVpcTblFlush
+.LVL1736:
+	.loc 3 803 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE212:
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.sftl_deinit,"ax",@progbits
+	.align	2
+	.global	sftl_deinit
+	.type	sftl_deinit, %function
+sftl_deinit:
+.LFB213:
+	.loc 3 806 0
+	.cfi_startproc
+	.loc 3 807 0
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmp	w0, 1
+	bne	.L1306
+	.loc 3 806 0
+	stp	x29, x30, [sp, -16]!
+	.cfi_def_cfa_offset 16
+	.cfi_offset 29, -16
+	.cfi_offset 30, -8
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 3 808 0
+	bl	FtlSysFlush
+.LVL1737:
+	.loc 3 810 0
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_def_cfa 31, 0
+	ret
+.L1306:
+	mov	w0, 0
+	ret
+	.cfi_endproc
+.LFE213:
+	.size	sftl_deinit, .-sftl_deinit
+	.section	.text.FtlDiscard,"ax",@progbits
+	.align	2
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
+.LFB218:
+	.loc 3 1157 0
+	.cfi_startproc
+.LVL1738:
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	mov	w20, w0
+	mov	w19, w1
+	.loc 3 1164 0
+	add	w1, w0, w1
+.LVL1739:
+	adrp	x0, .LANCHOR34
+.LVL1740:
+	.loc 3 1157 0
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 23, -32
+	.loc 3 1164 0
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	cmp	w1, w0
+	bhi	.L1317
+	.loc 3 1167 0
+	cmp	w19, 31
+	bhi	.L1311
+.LVL1741:
+.L1325:
+	.loc 3 1200 0
+	mov	w0, 0
+.L1309:
+	.loc 3 1201 0
+	ldp	x19, x20, [sp, 16]
+.LVL1742:
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1743:
+.L1311:
+	.cfi_restore_state
+	.loc 3 1172 0
+	adrp	x22, .LANCHOR12
+	.loc 3 1170 0
+	bl	FtlCacheWriteBack
+.LVL1744:
+	.loc 3 1172 0
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	udiv	w21, w20, w1
+.LVL1745:
+	.loc 3 1173 0
+	msub	w20, w1, w21, w20
+.LVL1746:
+	.loc 3 1174 0
+	ands	w20, w20, 65535
+	beq	.L1312
+.LVL1747:
+	.loc 3 1175 0
+	sub	w1, w1, w20
+.LVL1748:
+	.loc 3 1176 0
+	add	w21, w21, 1
+.LVL1749:
+	.loc 3 1175 0
+	cmp	w1, w19
+	csel	w1, w1, w19, ls
+	.loc 3 1177 0
+	sub	w19, w19, w1, uxth
+.LVL1750:
+.L1312:
+	.loc 3 1184 0
+	adrp	x20, .LANCHOR172
+.LVL1751:
+	.loc 3 1185 0
+	adrp	x23, .LANCHOR64
+	.loc 3 1184 0
+	add	x20, x20, :lo12:.LANCHOR172
+	.loc 3 1185 0
+	add	x23, x23, :lo12:.LANCHOR64
+	.loc 3 1180 0
+	mov	w0, -1
+	str	w0, [x29, 76]
+.LVL1752:
+.L1313:
+	.loc 3 1181 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	cmp	w19, w0
+	bcs	.L1315
+	.loc 3 1194 0
+	adrp	x0, .LANCHOR172
+	ldr	w1, [x0, #:lo12:.LANCHOR172]
+	cmp	w1, 32
+	bls	.L1325
+	.loc 3 1196 0
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+	.loc 3 1197 0
+	bl	l2p_flush
+.LVL1753:
+	.loc 3 1198 0
+	bl	FtlVpcTblFlush
+.LVL1754:
+	b	.L1325
+.L1315:
+	.loc 3 1182 0
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w21
+	bl	log2phys
+.LVL1755:
+	.loc 3 1183 0
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1314
+	.loc 3 1184 0
+	ldr	w0, [x20]
+	.loc 3 1186 0
+	mov	w2, 1
+	add	x1, x29, 76
+	.loc 3 1184 0
+	add	w0, w0, 1
+	str	w0, [x20]
+	.loc 3 1185 0
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	.loc 3 1186 0
+	mov	w0, w21
+	bl	log2phys
+.LVL1756:
+	.loc 3 1187 0
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1757:
+	.loc 3 1188 0
+	bl	decrement_vpc_count
+.LVL1758:
+.L1314:
+	.loc 3 1191 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	.loc 3 1190 0
+	add	w21, w21, 1
+.LVL1759:
+	.loc 3 1191 0
+	sub	w19, w19, w0
+.LVL1760:
+	b	.L1313
+.LVL1761:
+.L1317:
+	.loc 3 1165 0
+	mov	w0, -1
+	b	.L1309
+	.cfi_endproc
+.LFE218:
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeTempBlock
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+.LFB308:
+	.loc 5 112 0
+	.cfi_startproc
+.LVL1762:
+	stp	x29, x30, [sp, -112]!
+	.cfi_def_cfa_offset 112
+	.cfi_offset 29, -112
+	.cfi_offset 30, -104
+	.loc 5 119 0
+	mov	w2, 65535
+	.loc 5 112 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -96
+	.cfi_offset 20, -88
+	.loc 5 119 0
+	adrp	x19, .LANCHOR53
+	.loc 5 112 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -80
+	.cfi_offset 22, -72
+	.loc 5 115 0
+	adrp	x21, .LANCHOR19
+	.loc 5 119 0
+	ldrh	w20, [x19, #:lo12:.LANCHOR53]
+	.loc 5 112 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	.loc 5 119 0
+	cmp	w20, w2
+	.loc 5 112 0
+	str	x27, [sp, 80]
+	.cfi_offset 23, -64
+	.cfi_offset 24, -56
+	.cfi_offset 25, -48
+	.cfi_offset 26, -40
+	.cfi_offset 27, -32
+	.loc 5 115 0
+	ldrh	w1, [x21, #:lo12:.LANCHOR19]
+.LVL1763:
+	.loc 5 119 0
+	bne	.L1327
+.LVL1764:
+.L1337:
+	.loc 5 152 0
+	adrp	x0, .LANCHOR153
+	.loc 5 153 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR53]
+	add	x22, x19, :lo12:.LANCHOR53
+	.loc 5 152 0
+	str	wzr, [x0, #:lo12:.LANCHOR153]
+	.loc 5 153 0
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1350
+.L1353:
+	.loc 5 198 0
+	mov	w0, 0
+.L1326:
+	.loc 5 199 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1765:
+.L1327:
+	.cfi_restore_state
+	.loc 5 121 0
+	cbz	w0, .L1330
+.LVL1766:
+	.loc 5 123 0
+	adrp	x0, .LANCHOR157
+.LVL1767:
+	ldrh	w3, [x0, #:lo12:.LANCHOR157]
+	cmp	w3, w2
+	beq	.L1331
+.L1332:
+	.loc 5 122 0
+	mov	w1, 2
+.LVL1768:
+.L1330:
+	.loc 5 131 0
+	add	x0, x19, :lo12:.LANCHOR53
+	bl	FtlGcScanTempBlk
+.LVL1769:
+	str	w0, [x29, 108]
+	.loc 5 132 0
+	cmn	w0, #1
+	beq	.L1333
+	.loc 5 135 0
+	adrp	x0, .LANCHOR40
+	ubfiz	x20, x20, 1, 16
+.LVL1770:
+	ldr	x1, [x0, #:lo12:.LANCHOR40]
+	ldrh	w0, [x1, x20]
+	cmp	w0, 4
+	bls	.L1334
+	.loc 5 136 0
+	sub	w0, w0, #5
+	strh	w0, [x1, x20]
+	.loc 5 137 0
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.LVL1771:
+.L1334:
+	.loc 5 139 0
+	adrp	x0, .LANCHOR153
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR153]
+	cbnz	w1, .L1335
+	.loc 5 140 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w1, [x0, 96]
+	add	w1, w1, 1
+	str	w1, [x0, 96]
+	.loc 5 141 0
+	ldr	w0, [x29, 108]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL1772:
+	.loc 5 142 0
+	bl	FtlBbmTblFlush
+.LVL1773:
+.L1335:
+	.loc 5 144 0
+	str	wzr, [x19, #:lo12:.LANCHOR153]
+.L1346:
+	.loc 5 149 0
+	mov	w0, 1
+	b	.L1326
+.LVL1774:
+.L1331:
+	.loc 5 124 0
+	strh	wzr, [x0, #:lo12:.LANCHOR157]
+	.loc 5 125 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 17
+	bhi	.L1332
+	b	.L1330
+.LVL1775:
+.L1333:
+	.loc 5 148 0
+	adrp	x0, .LANCHOR157
+	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1346
+	b	.L1337
+.LVL1776:
+.L1350:
+	.loc 5 160 0
+	bl	FtlCacheWriteBack
+.LVL1777:
+	.loc 5 162 0
+	adrp	x20, .LANCHOR99
+	ldrb	w0, [x22, 7]
+	ldrh	w2, [x21, #:lo12:.LANCHOR19]
+	ldrh	w1, [x20, #:lo12:.LANCHOR99]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L1338
+	.loc 5 162 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR173
+	adrp	x0, .LC1
+	mov	w2, 162
+	add	x1, x1, :lo12:.LANCHOR173
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1778:
+.L1338:
+	.loc 5 163 0 is_stmt 1
+	add	x0, x19, :lo12:.LANCHOR53
+	adrp	x23, .LANCHOR43
+	ldrh	w3, [x21, #:lo12:.LANCHOR19]
+	.loc 5 168 0
+	adrp	x25, .LANCHOR62
+	.loc 5 163 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	.loc 5 168 0
+	adrp	x26, .LANCHOR173
+	.loc 5 163 0
+	ldrb	w0, [x0, 7]
+	.loc 5 168 0
+	add	x25, x25, :lo12:.LANCHOR62
+	.loc 5 163 0
+	ldr	x1, [x23, #:lo12:.LANCHOR43]
+	.loc 5 168 0
+	add	x26, x26, :lo12:.LANCHOR173
+	.loc 5 165 0
+	mov	w21, 0
+	.loc 5 163 0
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	.loc 5 164 0
+	adrp	x1, .LANCHOR68
+	ldrh	w0, [x20, #:lo12:.LANCHOR99]
+	ldr	w2, [x1, #:lo12:.LANCHOR68]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR68]
+.LVL1779:
+.L1339:
+	.loc 5 165 0 discriminator 1
+	ldrh	w0, [x20, #:lo12:.LANCHOR99]
+	cmp	w0, w21
+	bhi	.L1343
+	.loc 5 181 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1780:
+	.loc 5 182 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	ldr	x2, [x23, #:lo12:.LANCHOR43]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L1344
+	.loc 5 183 0
+	bl	INSERT_DATA_LIST
+.LVL1781:
+.L1345:
+	.loc 5 188 0
+	adrp	x0, .LANCHOR97
+	.loc 5 186 0
+	mov	w21, -1
+.LVL1782:
+	.loc 5 187 0
+	strh	wzr, [x20, #:lo12:.LANCHOR99]
+	.loc 5 186 0
+	strh	w21, [x19, #:lo12:.LANCHOR53]
+	.loc 5 188 0
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	.loc 5 189 0
+	bl	l2p_flush
+.LVL1783:
+	.loc 5 190 0
+	bl	FtlVpcTblFlush
+.LVL1784:
+	.loc 5 191 0
+	adrp	x0, .LANCHOR48
+	ldrh	w1, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	ble	.L1353
+	.loc 5 192 0
+	adrp	x0, .LANCHOR82
+	.loc 5 193 0
+	mov	w1, 20
+	.loc 5 192 0
+	strh	w21, [x0, #:lo12:.LANCHOR82]
+	.loc 5 193 0
+	adrp	x0, .LANCHOR84
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	b	.L1353
+.LVL1785:
+.L1343:
+	.loc 5 166 0
+	adrp	x0, .LANCHOR100
+	mov	w24, 12
+	ldr	x27, [x0, #:lo12:.LANCHOR100]
+	umull	x24, w21, w24
+	.loc 5 168 0
+	ldr	w0, [x25]
+	.loc 5 166 0
+	add	x22, x27, x24
+.LVL1786:
+	.loc 5 168 0
+	ldr	w1, [x22, 8]
+	cmp	w1, w0
+	bcc	.L1340
+	.loc 5 168 0 is_stmt 0 discriminator 1
+	adrp	x0, .LC1
+	mov	w2, 168
+	mov	x1, x26
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1787:
+.L1340:
+	.loc 5 169 0 is_stmt 1
+	ldr	w0, [x22, 8]
+	add	x1, x29, 108
+	mov	w2, 0
+	bl	log2phys
+.LVL1788:
+	.loc 5 170 0
+	ldr	w0, [x27, x24]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	bne	.L1341
+	.loc 5 171 0
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1789:
+	mov	w24, w0
+.LVL1790:
+	.loc 5 172 0
+	ldr	w0, [x22, 8]
+.LVL1791:
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+.LVL1792:
+	.loc 5 173 0
+	mov	w0, w24
+.LVL1793:
+.L1352:
+	.loc 5 177 0
+	bl	decrement_vpc_count
+.LVL1794:
+.L1342:
+	.loc 5 165 0 discriminator 2
+	add	w21, w21, 1
+.LVL1795:
+	and	w21, w21, 65535
+.LVL1796:
+	b	.L1339
+.L1341:
+	.loc 5 175 0
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L1342
+	.loc 5 177 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	b	.L1352
+.LVL1797:
+.L1344:
+	.loc 5 185 0
+	bl	INSERT_FREE_LIST
+.LVL1798:
+	b	.L1345
+	.cfi_endproc
+.LFE308:
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.FtlGcPageRecovery,"ax",@progbits
+	.align	2
+	.global	FtlGcPageRecovery
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+.LFB311:
+	.loc 5 289 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 5 290 0
+	adrp	x20, .LANCHOR19
+	adrp	x19, .LANCHOR53
+	add	x19, x19, :lo12:.LANCHOR53
+	ldrh	w1, [x20, #:lo12:.LANCHOR19]
+	mov	x0, x19
+	bl	FtlGcScanTempBlk
+.LVL1799:
+	.loc 5 291 0
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR19]
+	cmp	w1, w0
+	bcc	.L1354
+.LBB282:
+.LBB283:
+	.loc 5 293 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapBlkWriteDump_data
+.LVL1800:
+	.loc 5 294 0
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+.LVL1801:
+	.loc 5 295 0
+	adrp	x0, .LANCHOR153
+	str	wzr, [x0, #:lo12:.LANCHOR153]
+.L1354:
+.LBE283:
+.LBE282:
+	.loc 5 297 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE311:
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",@progbits
+	.align	2
+	.global	FtlPowerLostRecovery
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+.LFB283:
+	.loc 2 2032 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 2 2033 0
+	adrp	x0, .LANCHOR163
+	.loc 2 2032 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 2 2035 0
+	adrp	x19, .LANCHOR51
+	add	x19, x19, :lo12:.LANCHOR51
+	.loc 2 2033 0
+	str	wzr, [x0, #:lo12:.LANCHOR163]
+	.loc 2 2035 0
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+.LVL1802:
+	.loc 2 2036 0
+	mov	x0, x19
+	.loc 2 2037 0
+	adrp	x19, .LANCHOR52
+	.loc 2 2036 0
+	bl	FtlSlcSuperblockCheck
+.LVL1803:
+	.loc 2 2037 0
+	add	x19, x19, :lo12:.LANCHOR52
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+.LVL1804:
+	.loc 2 2038 0
+	mov	x0, x19
+	bl	FtlSlcSuperblockCheck
+.LVL1805:
+	.loc 2 2039 0
+	bl	FtlGcPageRecovery
+.LVL1806:
+	.loc 2 2040 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1807:
+	.loc 2 2042 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE283:
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
+	.align	2
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+.LFB313:
+	.loc 5 316 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 5 320 0
+	mov	w3, 0
+	mov	w2, 0
+	.loc 5 316 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -16
+	.cfi_offset 20, -8
+	.loc 5 320 0
+	adrp	x19, .LANCHOR91
+	adrp	x20, .LANCHOR121
+	ldr	w1, [x19, #:lo12:.LANCHOR91]
+	.loc 5 321 0
+	add	x19, x19, :lo12:.LANCHOR91
+	.loc 5 320 0
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	bl	FlashProgPages
+.LVL1808:
+	.loc 5 321 0
+	mov	w11, 0
+.LVL1809:
+.L1360:
+	.loc 5 321 0 is_stmt 0 discriminator 1
+	ldr	w1, [x19]
+	cmp	w11, w1
+	bcc	.L1363
+	.loc 5 335 0 is_stmt 1
+	ldr	x0, [x20, #:lo12:.LANCHOR121]
+	bl	FtlGcBufFree
+.LVL1810:
+	.loc 5 336 0
+	str	wzr, [x19]
+	.loc 5 337 0
+	adrp	x0, .LANCHOR53+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR53+4]
+	cbnz	w0, .L1364
+	.loc 5 338 0
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+.LVL1811:
+	b	.L1366
+.LVL1812:
+.L1363:
+	.loc 5 322 0
+	ldr	x2, [x20, #:lo12:.LANCHOR121]
+	ubfiz	x0, x11, 5, 16
+	add	x1, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L1361
+	.loc 5 323 0
+	adrp	x0, .LANCHOR53
+	adrp	x3, .LANCHOR43
+	ldrh	w4, [x0, #:lo12:.LANCHOR53]
+	ldr	x3, [x3, #:lo12:.LANCHOR43]
+	strh	wzr, [x3, x4, lsl 1]
+	.loc 5 324 0
+	strh	w2, [x0, #:lo12:.LANCHOR53]
+	.loc 5 325 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w2, [x0, 96]
+	add	w2, w2, 1
+	str	w2, [x0, 96]
+	.loc 5 326 0
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.LVL1813:
+	.loc 5 327 0
+	bl	FtlBbmTblFlush
+.LVL1814:
+	.loc 5 328 0
+	bl	FtlGcPageVarInit
+.LVL1815:
+.L1366:
+	.loc 5 339 0
+	mov	w0, 1
+.L1359:
+	.loc 5 342 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1816:
+.L1361:
+	.cfi_restore_state
+	.loc 5 331 0 discriminator 2
+	ldr	x0, [x1, 16]
+.LVL1817:
+	.loc 5 332 0 discriminator 2
+	ldr	w1, [x1, 4]
+	ldp	w2, w0, [x0, 8]
+.LVL1818:
+	bl	FtlGcUpdatePage
+.LVL1819:
+	.loc 5 321 0 discriminator 2
+	add	w11, w11, 1
+.LVL1820:
+	and	w11, w11, 65535
+.LVL1821:
+	b	.L1360
+.LVL1822:
+.L1364:
+	.loc 5 341 0
+	mov	w0, 0
+	b	.L1359
+	.cfi_endproc
+.LFE313:
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
+	.align	2
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+.LFB312:
+	.loc 5 300 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 5 301 0
+	adrp	x0, .LANCHOR53
+	mov	w2, 65535
+	.loc 5 300 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	mov	x19, x0
+	.loc 5 301 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR53]
+	cmp	w3, w2
+	beq	.L1368
+	add	x1, x0, :lo12:.LANCHOR53
+	.loc 5 301 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x1, 4]
+	cbnz	w0, .L1369
+.L1368:
+	.loc 5 302 0 is_stmt 1
+	bl	FtlCacheWriteBack
+.LVL1823:
+	.loc 5 303 0
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+.LVL1824:
+	.loc 5 304 0
+	add	x0, x19, :lo12:.LANCHOR53
+	strb	wzr, [x0, 8]
+	.loc 5 305 0
+	bl	allocate_data_superblock
+.LVL1825:
+	.loc 5 306 0
+	adrp	x0, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR97]
+	.loc 5 307 0
+	adrp	x0, .LANCHOR99
+	strh	wzr, [x0, #:lo12:.LANCHOR99]
+	.loc 5 308 0
+	bl	l2p_flush
+.LVL1826:
+	.loc 5 309 0
+	mov	w0, 0
+	bl	FtlEctTblFlush
+.LVL1827:
+	.loc 5 310 0
+	bl	FtlVpcTblFlush
+.LVL1828:
+.L1369:
+	.loc 5 312 0
+	add	x0, x19, :lo12:.LANCHOR53
+	.loc 5 313 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	.loc 5 312 0
+	b	get_new_active_ppa
+.LVL1829:
+	.cfi_endproc
+.LFE312:
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
+	.align	2
+	.global	rk_ftl_garbage_collect
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+.LFB319:
+	.loc 5 470 0
+	.cfi_startproc
+.LVL1830:
+	stp	x29, x30, [sp, -192]!
+	.cfi_def_cfa_offset 192
+	.cfi_offset 29, -192
+	.cfi_offset 30, -184
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -160
+	.cfi_offset 22, -152
+	.loc 5 478 0
+	adrp	x22, .LANCHOR117
+	.loc 5 470 0
+	stp	x19, x20, [sp, 16]
+	.loc 5 478 0
+	ldr	w1, [x22, #:lo12:.LANCHOR117]
+.LVL1831:
+	.loc 5 470 0
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 19, -176
+	.cfi_offset 20, -168
+	.cfi_offset 23, -144
+	.cfi_offset 24, -136
+	.cfi_offset 25, -128
+	.cfi_offset 26, -120
+	.cfi_offset 27, -112
+	.cfi_offset 28, -104
+	.loc 5 478 0
+	cbnz	w1, .L1443
+	.loc 5 481 0
+	adrp	x1, .LANCHOR45
+	ldrh	w1, [x1, #:lo12:.LANCHOR45]
+	cmp	w1, 47
+	bls	.L1443
+	mov	w24, w0
+	.loc 5 485 0
+	adrp	x0, .LANCHOR157
+.LVL1832:
+	ldrh	w1, [x0, #:lo12:.LANCHOR157]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1373
+.L1376:
+.LVL1833:
+.LBB287:
+.LBB288:
+	.loc 5 489 0
+	adrp	x0, .LANCHOR102
+	mov	w3, 65535
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	cmp	w2, w3
+	bne	.L1374
+.L1375:
+	.loc 5 496 0
+	adrp	x2, .LANCHOR86
+	.loc 5 497 0
+	adrp	x19, .LANCHOR82
+	mov	w20, 65535
+	.loc 5 496 0
+	ldr	w1, [x2, #:lo12:.LANCHOR86]
+	.loc 5 497 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 496 0
+	add	w1, w1, 1
+	add	w1, w1, w24, lsl 7
+	str	w1, [x2, #:lo12:.LANCHOR86]
+	.loc 5 497 0
+	cmp	w0, w20
+	bne	.L1377
+	adrp	x3, .LANCHOR53
+	ldrh	w20, [x3, #:lo12:.LANCHOR53]
+	cmp	w20, w0
+	bne	.L1446
+	adrp	x0, .LANCHOR101
+	ldrh	w21, [x0, #:lo12:.LANCHOR101]
+	cmp	w21, w20
+	bne	.L1377
+	.loc 5 498 0
+	adrp	x23, .LANCHOR48
+	mov	w3, 1024
+	ldrh	w0, [x23, #:lo12:.LANCHOR48]
+	cmp	w0, 24
+	mov	w0, 5120
+	csel	w0, w0, w3, cc
+	cmp	w1, w0
+	bls	.L1449
+.LBB289:
+	.loc 5 502 0
+	adrp	x0, .LANCHOR174
+	.loc 5 501 0
+	str	wzr, [x2, #:lo12:.LANCHOR86]
+	.loc 5 502 0
+	strh	wzr, [x0, #:lo12:.LANCHOR174]
+	.loc 5 503 0
+	bl	GetSwlReplaceBlock
+.LVL1834:
+	and	w20, w0, 65535
+.LVL1835:
+	.loc 5 504 0
+	cmp	w20, w21
+	bne	.L1450
+	.loc 5 505 0
+	adrp	x5, .LANCHOR85
+	ldrh	w1, [x23, #:lo12:.LANCHOR48]
+	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+.LVL1836:
+	cmp	w1, w0
+	bcs	.L1380
+	.loc 5 506 0
+	mov	w0, 64
+	bl	List_get_gc_head_node
+.LVL1837:
+	and	w0, w0, 65535
+.LVL1838:
+	.loc 5 507 0
+	cmp	w0, w20
+	beq	.L1382
+	.loc 5 508 0
+	adrp	x1, .LANCHOR43
+	ubfiz	x0, x0, 1, 16
+.LVL1839:
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w0, [x1, x0]
+	cmp	w0, 7
+	bhi	.L1383
+	.loc 5 509 0
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL1840:
+	and	w21, w0, 65535
+.LVL1841:
+	.loc 5 510 0
+	mov	w0, 128
+	strh	w0, [x5, #:lo12:.LANCHOR85]
+	.loc 5 520 0
+	cmp	w21, w20
+	bne	.L1379
+.LVL1842:
+.L1382:
+	.loc 5 523 0
+	bl	FtlGcReFreshBadBlk
+.LVL1843:
+.L1377:
+.LBE289:
+	.loc 5 527 0
+	cmp	w24, 0
+	mov	w0, 65535
+	ccmp	w20, w0, 0, eq
+	bne	.L1385
+	.loc 5 528 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 24
+	bhi	.L1451
+	adrp	x1, .LANCHOR19
+	.loc 5 530 0
+	cmp	w0, 16
+	.loc 5 531 0
+	ldrh	w21, [x1, #:lo12:.LANCHOR19]
+	.loc 5 530 0
+	bls	.L1387
+	.loc 5 531 0
+	lsr	w21, w21, 5
+.LVL1844:
+.L1386:
+	.loc 5 539 0
+	adrp	x2, .LANCHOR84
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR84]
+	cmp	w1, w0
+	bcs	.L1390
+	.loc 5 540 0
+	adrp	x0, .LANCHOR53
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w0, w1
+	bne	.L1391
+	adrp	x1, .LANCHOR101
+	ldrh	w1, [x1, #:lo12:.LANCHOR101]
+	cmp	w1, w0
+	bne	.L1391
+	.loc 5 542 0
+	adrp	x0, .LANCHOR174
+	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	cbnz	w0, .L1392
+	adrp	x1, .LANCHOR62
+	adrp	x4, .LANCHOR60
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	ldr	w4, [x4, #:lo12:.LANCHOR60]
+	add	w1, w1, w1, lsl 1
+	cmp	w4, w1, lsr 2
+	bcs	.L1393
+.L1392:
+	.loc 5 543 0
+	adrp	x1, .LANCHOR80
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	add	w1, w1, w1, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x3, #:lo12:.LANCHOR84]
+.L1394:
+	.loc 5 546 0
+	adrp	x1, .LANCHOR89
+	str	wzr, [x1, #:lo12:.LANCHOR89]
+.LVL1845:
+.L1371:
+.LBE288:
+.LBE287:
+	.loc 5 758 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1846:
+.L1373:
+	.cfi_restore_state
+	.loc 5 485 0 discriminator 1
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	beq	.L1376
+	.loc 5 486 0
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+.LVL1847:
+	cbz	w0, .L1376
+	.loc 5 487 0
+	mov	w0, 1
+	b	.L1371
+.LVL1848:
+.L1374:
+.LBB292:
+.LBB291:
+	.loc 5 489 0
+	adrp	x1, .LANCHOR101
+	ldrh	w4, [x1, #:lo12:.LANCHOR101]
+	cmp	w4, w3
+	bne	.L1375
+	.loc 5 490 0
+	strh	w2, [x1, #:lo12:.LANCHOR101]
+	.loc 5 491 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR102]
+	b	.L1375
+.LVL1849:
+.L1383:
+.LBB290:
+	.loc 5 512 0
+	mov	w0, 64
+.L1475:
+	.loc 5 516 0
+	strh	w0, [x5, #:lo12:.LANCHOR85]
+	b	.L1382
+.L1380:
+	mov	w0, 80
+	b	.L1475
+.LVL1850:
+.L1450:
+	.loc 5 504 0
+	mov	w21, w20
+.LVL1851:
+.L1379:
+	.loc 5 521 0
+	adrp	x1, .LANCHOR40
+	ubfiz	x0, x21, 1, 32
+	adrp	x3, .LANCHOR84
+	mov	w20, w21
+	ldr	x2, [x1, #:lo12:.LANCHOR40]
+	adrp	x1, .LANCHOR43
+	ldrh	w5, [x3, #:lo12:.LANCHOR84]
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w4, [x2, x0]
+	ldrh	w2, [x23, #:lo12:.LANCHOR48]
+	ldrh	w3, [x1, x0]
+	mov	w1, w21
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+.LVL1852:
+	b	.L1382
+.LVL1853:
+.L1446:
+.LBE290:
+	.loc 5 473 0
+	mov	w20, w0
+	b	.L1377
+.L1449:
+	mov	w20, w21
+	b	.L1377
+.LVL1854:
+.L1387:
+	.loc 5 532 0
+	cmp	w0, 12
+	bls	.L1388
+	.loc 5 533 0
+	lsr	w21, w21, 4
+.LVL1855:
+	b	.L1386
+.LVL1856:
+.L1388:
+	.loc 5 534 0
+	cmp	w0, 8
+	bls	.L1386
+	.loc 5 535 0
+	lsr	w21, w21, 2
+.LVL1857:
+	b	.L1386
+.LVL1858:
+.L1451:
+	.loc 5 529 0
+	mov	w21, 1
+	b	.L1386
+.LVL1859:
+.L1393:
+	.loc 5 545 0
+	mov	w1, 18
+	strh	w1, [x2, #:lo12:.LANCHOR84]
+	b	.L1394
+.L1391:
+	.loc 5 549 0
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	add	w0, w0, w0, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x3, #:lo12:.LANCHOR84]
+.L1390:
+	.loc 5 551 0
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	cbz	w0, .L1452
+	.loc 5 552 0
+	add	w21, w21, 32
+.LVL1860:
+	and	w21, w21, 65535
+.LVL1861:
+.L1452:
+	.loc 5 551 0
+	mov	w20, 65535
+.LVL1862:
+.L1396:
+	.loc 5 597 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L1405
+	.loc 5 598 0
+	cmp	w20, w0
+	beq	.L1406
+	.loc 5 599 0
+	strh	w20, [x19, #:lo12:.LANCHOR82]
+.LVL1863:
+.L1407:
+	.loc 5 610 0
+	add	x0, x19, :lo12:.LANCHOR82
+	.loc 5 611 0
+	mov	w1, 65535
+	.loc 5 610 0
+	strb	wzr, [x0, 8]
+	.loc 5 611 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	cmp	w0, w1
+	beq	.L1405
+	.loc 5 612 0
+	bl	IsBlkInGcList
+.LVL1864:
+	cbz	w0, .L1410
+	.loc 5 613 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+.L1410:
+	.loc 5 615 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	mov	w0, 65535
+	add	x23, x19, :lo12:.LANCHOR82
+	cmp	w1, w0
+	beq	.L1405
+	.loc 5 616 0
+	mov	x0, x23
+	bl	make_superblock
+.LVL1865:
+	.loc 5 619 0
+	adrp	x0, .LANCHOR175
+	.loc 5 620 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 617 0
+	strh	wzr, [x23, 2]
+	.loc 5 619 0
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
+	.loc 5 620 0
+	adrp	x0, .LANCHOR43
+	.loc 5 618 0
+	strb	wzr, [x23, 6]
+	.loc 5 620 0
+	ldr	x0, [x0, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR176
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+.L1405:
+	.loc 5 625 0
+	adrp	x0, .LANCHOR51
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	str	x0, [x29, 136]
+	ldrh	w2, [x0, #:lo12:.LANCHOR51]
+	cmp	w2, w1
+	beq	.L1411
+	adrp	x0, .LANCHOR52
+	str	x0, [x29, 128]
+	ldrh	w2, [x0, #:lo12:.LANCHOR52]
+	cmp	w2, w1
+	beq	.L1411
+	.loc 5 635 0
+	adrp	x24, .LANCHOR87
+.LVL1866:
+	.loc 5 657 0
+	add	x0, x24, :lo12:.LANCHOR87
+	str	x0, [x29, 160]
+.L1412:
+	.loc 5 631 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1413
+	.loc 5 632 0
+	adrp	x0, .LANCHOR89
+	.loc 5 645 0
+	adrp	x25, .LANCHOR19
+	add	x25, x25, :lo12:.LANCHOR19
+	.loc 5 632 0
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+.L1414:
+	.loc 5 635 0
+	ldrh	w5, [x24, #:lo12:.LANCHOR87]
+	add	x7, x24, :lo12:.LANCHOR87
+	mov	w0, w5
+	bl	List_get_gc_head_node
+.LVL1867:
+	and	w6, w0, 65535
+	strh	w6, [x19, #:lo12:.LANCHOR82]
+	.loc 5 636 0
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L1415
+	.loc 5 637 0
+	strh	wzr, [x7]
+	.loc 5 638 0
+	mov	w0, 8
+	b	.L1371
+.LVL1868:
+.L1385:
+	.loc 5 557 0
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1455
+	adrp	x0, .LANCHOR101
+	ldrh	w0, [x0, #:lo12:.LANCHOR101]
+	cmp	w0, w1
+	bne	.L1455
+	cmp	w20, w0
+	bne	.L1455
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	cmp	w0, w20
+	beq	.L1397
+.LVL1869:
+.L1455:
+	.loc 5 556 0
+	mov	w21, 1
+	b	.L1396
+.LVL1870:
+.L1397:
+	.loc 5 558 0
+	adrp	x0, .LANCHOR89
+	.loc 5 560 0
+	adrp	x21, .LANCHOR48
+	adrp	x23, .LANCHOR174
+	.loc 5 558 0
+	str	wzr, [x0, #:lo12:.LANCHOR89]
+	.loc 5 560 0
+	adrp	x0, .LANCHOR84
+	ldrh	w6, [x21, #:lo12:.LANCHOR48]
+	mov	x2, x0
+	ldrh	w1, [x0, #:lo12:.LANCHOR84]
+	cmp	w1, w6
+	.loc 5 561 0
+	ldrh	w1, [x23, #:lo12:.LANCHOR174]
+	.loc 5 560 0
+	bcs	.L1398
+	.loc 5 561 0
+	cbnz	w1, .L1399
+	adrp	x1, .LANCHOR62
+	adrp	x3, .LANCHOR60
+	ldr	w1, [x1, #:lo12:.LANCHOR62]
+	ldr	w3, [x3, #:lo12:.LANCHOR60]
+	add	w1, w1, w1, lsl 1
+	cmp	w3, w1, lsr 2
+	bcs	.L1400
+.L1399:
+	.loc 5 562 0
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	add	w0, w0, w0, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR84]
+.LVL1871:
+.L1476:
+	.loc 5 578 0
+	bl	FtlReadRefresh
+.LVL1872:
+	.loc 5 579 0
+	ldrh	w0, [x23, #:lo12:.LANCHOR174]
+	b	.L1371
+.LVL1873:
+.L1400:
+	.loc 5 564 0
+	mov	w1, 18
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	b	.L1476
+.L1398:
+	.loc 5 572 0
+	cbnz	w1, .L1455
+	.loc 5 573 0
+	adrp	x1, .LANCHOR80
+	ldrh	w5, [x1, #:lo12:.LANCHOR80]
+	add	w1, w5, w5, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x0, #:lo12:.LANCHOR84]
+	.loc 5 574 0
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL1874:
+	.loc 5 575 0
+	ubfiz	x0, x0, 1, 16
+.LVL1875:
+	adrp	x1, .LANCHOR43
+	adrp	x2, .LANCHOR3
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	ldrh	w2, [x2, #:lo12:.LANCHOR3]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR20
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	mul	w0, w0, w2
+	cmp	w1, w0, asr 1
+	ble	.L1403
+	.loc 5 576 0
+	sub	w5, w5, #1
+	.loc 5 575 0
+	cmp	w6, w5
+	bge	.L1476
+.L1403:
+	.loc 5 584 0
+	cbnz	w1, .L1455
+	.loc 5 585 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1876:
+	.loc 5 586 0
+	ldrh	w0, [x21, #:lo12:.LANCHOR48]
+	add	w0, w0, 1
+	b	.L1371
+.LVL1877:
+.L1406:
+	.loc 5 600 0
+	adrp	x0, .LANCHOR101
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	cmp	w1, w20
+	beq	.L1407
+	.loc 5 604 0
+	adrp	x2, .LANCHOR43
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR43]
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L1408
+	.loc 5 605 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+.L1408:
+	.loc 5 606 0
+	ldrh	w1, [x0, #:lo12:.LANCHOR101]
+	strh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 607 0
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR101]
+	b	.L1407
+.LVL1878:
+.L1411:
+	.loc 5 626 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+.LVL1879:
+.L1477:
+	.loc 5 734 0
+	adrp	x0, .LANCHOR174
+	ldrh	w0, [x0, #:lo12:.LANCHOR174]
+	b	.L1371
+.LVL1880:
+.L1415:
+	.loc 5 640 0
+	mov	w0, w6
+	bl	IsBlkInGcList
+.LVL1881:
+	add	w5, w5, 1
+	cbz	w0, .L1416
+	.loc 5 641 0
+	strh	w5, [x24, #:lo12:.LANCHOR87]
+	b	.L1414
+.L1416:
+	.loc 5 645 0
+	adrp	x23, .LANCHOR43
+	adrp	x4, .LANCHOR3
+	ldrh	w0, [x25]
+	ubfiz	x1, x6, 1, 16
+	ldr	x2, [x23, #:lo12:.LANCHOR43]
+	.loc 5 644 0
+	and	w5, w5, 65535
+	.loc 5 645 0
+	ldrh	w4, [x4, #:lo12:.LANCHOR3]
+	.loc 5 644 0
+	strh	w5, [x24, #:lo12:.LANCHOR87]
+	.loc 5 645 0
+	ldrh	w3, [x2, x1]
+	mul	w0, w0, w4
+	cmp	w3, w0, asr 1
+	bgt	.L1418
+	.loc 5 646 0
+	cmp	w5, 48
+	bls	.L1419
+	cmp	w3, 8
+	bls	.L1419
+	adrp	x3, .LANCHOR97
+	ldrh	w3, [x3, #:lo12:.LANCHOR97]
+	cmp	w3, 35
+	bhi	.L1419
+.L1418:
+	.loc 5 647 0
+	ldr	x3, [x29, 160]
+	strh	wzr, [x3]
+.L1419:
+	.loc 5 649 0
+	ldrh	w1, [x2, x1]
+	cmp	w0, w1
+	bgt	.L1420
+	mov	w0, 65535
+	cmp	w20, w0
+	bne	.L1420
+	.loc 5 650 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+	.loc 5 651 0
+	adrp	x0, .LANCHOR87
+	strh	wzr, [x0, #:lo12:.LANCHOR87]
+	b	.L1477
+.L1420:
+	.loc 5 655 0
+	cbnz	w1, .L1421
+	.loc 5 656 0
+	mov	w0, -1
+	bl	decrement_vpc_count
+.LVL1882:
+	.loc 5 657 0
+	ldr	x0, [x29, 160]
+	ldr	x1, [x29, 160]
+	ldrh	w0, [x0]
+	add	w0, w0, 1
+	strh	w0, [x1]
+	b	.L1414
+.L1421:
+	.loc 5 660 0
+	add	x0, x19, :lo12:.LANCHOR82
+	strb	wzr, [x0, 8]
+	.loc 5 662 0
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w6
+	bne	.L1422
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	mov	w2, 662
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1883:
+.L1422:
+	.loc 5 663 0
+	ldr	x0, [x29, 128]
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bne	.L1423
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	mov	w2, 663
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1884:
+.L1423:
+	.loc 5 664 0
+	adrp	x0, .LANCHOR53
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	cmp	w1, w0
+	bne	.L1424
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	mov	w2, 664
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1885:
+.L1424:
+	.loc 5 665 0
+	add	x25, x19, :lo12:.LANCHOR82
+	mov	x0, x25
+	bl	make_superblock
+.LVL1886:
+	.loc 5 666 0
+	adrp	x0, .LANCHOR175
+	.loc 5 667 0
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	.loc 5 666 0
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
+	.loc 5 667 0
+	ldr	x0, [x23, #:lo12:.LANCHOR43]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR176
+	.loc 5 668 0
+	strh	wzr, [x25, 2]
+	.loc 5 667 0
+	strh	w1, [x0, #:lo12:.LANCHOR176]
+	.loc 5 669 0
+	strb	wzr, [x25, 6]
+.L1413:
+	.loc 5 675 0
+	bl	FtlReadRefresh
+.LVL1887:
+	.loc 5 679 0
+	adrp	x1, .LANCHOR19
+	.loc 5 678 0
+	mov	w0, 1
+	str	w0, [x22, #:lo12:.LANCHOR117]
+	.loc 5 679 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR19]
+	str	w0, [x29, 172]
+.LVL1888:
+	.loc 5 680 0
+	add	x0, x19, :lo12:.LANCHOR82
+	str	x1, [x29, 120]
+	ldr	w3, [x29, 172]
+	ldrh	w0, [x0, 2]
+	add	w2, w0, w21
+	cmp	w2, w3
+	ble	.L1425
+	.loc 5 681 0
+	sub	w21, w3, w0
+.LVL1889:
+	and	w21, w21, 65535
+.LVL1890:
+.L1425:
+	.loc 5 704 0
+	adrp	x0, .LANCHOR175
+	.loc 5 693 0
+	mov	w27, 0
+	.loc 5 704 0
+	add	x0, x0, :lo12:.LANCHOR175
+	str	x0, [x29, 152]
+.LVL1891:
+.L1426:
+	.loc 5 683 0
+	cmp	w21, w27, uxth
+	bls	.L1434
+	.loc 5 688 0
+	add	x1, x19, :lo12:.LANCHOR82
+	.loc 5 685 0
+	adrp	x0, .LANCHOR3
+	.loc 5 688 0
+	adrp	x25, .LANCHOR95
+	add	x1, x1, 16
+	.loc 5 685 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR3]
+	.loc 5 688 0
+	mov	w23, 0
+	ldrh	w4, [x1, -14]
+	mov	w2, 0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	.loc 5 687 0
+	mov	w6, 65535
+	.loc 5 688 0
+	add	w4, w4, w27
+	b	.L1435
+.LVL1892:
+.L1428:
+	.loc 5 686 0
+	ldrh	w3, [x1]
+.LVL1893:
+	.loc 5 687 0
+	cmp	w3, w6
+	beq	.L1427
+	.loc 5 688 0
+	ubfiz	x5, x23, 5, 16
+	.loc 5 689 0
+	add	w23, w23, 1
+.LVL1894:
+	.loc 5 688 0
+	add	x5, x0, x5
+	.loc 5 689 0
+	and	w23, w23, 65535
+.LVL1895:
+	.loc 5 688 0
+	orr	w3, w4, w3, lsl 10
+.LVL1896:
+	str	w3, [x5, 4]
+.L1427:
+	.loc 5 685 0
+	add	w2, w2, 1
+.LVL1897:
+	add	x1, x1, 2
+.LVL1898:
+	and	w2, w2, 65535
+.LVL1899:
+.L1435:
+	cmp	w2, w7
+	bne	.L1428
+	.loc 5 693 0
+	add	x1, x19, :lo12:.LANCHOR82
+	.loc 5 705 0
+	adrp	x26, .LANCHOR91
+	add	x26, x26, :lo12:.LANCHOR91
+	.loc 5 693 0
+	ldrb	w2, [x1, 8]
+.LVL1900:
+	mov	w1, w23
+	bl	FlashReadPages
+.LVL1901:
+	ubfiz	x0, x23, 5, 16
+	mov	x23, 0
+.LVL1902:
+	str	x0, [x29, 144]
+.LVL1903:
+.L1429:
+	.loc 5 695 0
+	ldr	x0, [x29, 144]
+	cmp	x0, x23
+	bne	.L1433
+.LVL1904:
+	add	w27, w27, 1
+.LVL1905:
+	b	.L1426
+.LVL1906:
+.L1433:
+	.loc 5 696 0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	add	x1, x0, x23
+.LVL1907:
+	.loc 5 697 0
+	ldr	w0, [x0, x23]
+	cmn	w0, #1
+	beq	.L1430
+	.loc 5 696 0
+	ldr	x28, [x1, 16]
+	.loc 5 697 0
+	mov	w0, 61589
+	ldrh	w1, [x28]
+.LVL1908:
+	cmp	w1, w0
+	bne	.L1430
+	.loc 5 699 0
+	ldr	w4, [x28, 8]
+.LVL1909:
+	.loc 5 700 0
+	cmn	w4, #1
+	bne	.L1431
+	str	w4, [x29, 112]
+	mov	w2, 700
+	adrp	x1, .LANCHOR177
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR177
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1910:
+	ldr	w4, [x29, 112]
+.LVL1911:
+.L1431:
+	.loc 5 701 0
+	mov	w2, 0
+	add	x1, x29, 188
+	mov	w0, w4
+	bl	log2phys
+.LVL1912:
+	.loc 5 702 0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	ldr	w1, [x29, 188]
+	add	x0, x0, x23
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bne	.L1430
+	.loc 5 704 0
+	ldr	x1, [x29, 152]
+	.loc 5 705 0
+	adrp	x4, .LANCHOR121
+	.loc 5 704 0
+	ldr	x2, [x29, 152]
+	.loc 5 705 0
+	ldr	w0, [x0, 24]
+	.loc 5 704 0
+	ldrh	w1, [x1]
+	add	w1, w1, 1
+	strh	w1, [x2]
+	.loc 5 705 0
+	ldr	x2, [x4, #:lo12:.LANCHOR121]
+	ldr	w1, [x26]
+	add	x1, x2, x1, lsl 5
+	stp	x4, x1, [x29, 104]
+	str	w0, [x1, 24]
+	.loc 5 706 0
+	bl	Ftl_get_new_temp_ppa
+.LVL1913:
+	ldp	x4, x1, [x29, 104]
+	.loc 5 707 0
+	ldr	x2, [x4, #:lo12:.LANCHOR121]
+	.loc 5 706 0
+	str	w0, [x1, 4]
+	.loc 5 707 0
+	ldr	w1, [x26]
+	ubfiz	x0, x1, 5, 32
+	.loc 5 715 0
+	add	w1, w1, 1
+	.loc 5 707 0
+	add	x2, x2, x0
+	ldr	x0, [x25, #:lo12:.LANCHOR95]
+	add	x0, x0, x23
+	ldr	x4, [x0, 8]
+	str	x4, [x2, 8]
+	.loc 5 708 0
+	ldr	x4, [x0, 16]
+	str	x4, [x2, 16]
+	.loc 5 709 0
+	ldr	w2, [x29, 188]
+	str	w2, [x28, 12]
+	.loc 5 710 0
+	adrp	x2, .LANCHOR53
+	add	x11, x2, :lo12:.LANCHOR53
+	ldrh	w2, [x2, #:lo12:.LANCHOR53]
+	strh	w2, [x28, 2]
+	.loc 5 713 0
+	adrp	x2, .LANCHOR72
+	.loc 5 715 0
+	str	w1, [x26]
+	.loc 5 716 0
+	mov	w1, 1
+	.loc 5 713 0
+	ldr	w2, [x2, #:lo12:.LANCHOR72]
+	str	w2, [x28, 4]
+	.loc 5 716 0
+	bl	FtlGcBufAlloc
+.LVL1914:
+	.loc 5 717 0
+	ldrb	w1, [x11, 7]
+	ldr	w0, [x26]
+	cmp	w1, w0
+	beq	.L1432
+	ldrh	w0, [x11, 4]
+	cbnz	w0, .L1430
+.L1432:
+	.loc 5 718 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1915:
+	cbz	w0, .L1430
+.LVL1916:
+.L1478:
+	.loc 5 733 0
+	str	wzr, [x22, #:lo12:.LANCHOR117]
+	b	.L1477
+.LVL1917:
+.L1430:
+	add	x23, x23, 32
+	b	.L1429
+.L1434:
+	.loc 5 727 0
+	add	x1, x19, :lo12:.LANCHOR82
+	ldrh	w0, [x1, 2]
+	add	w21, w21, w0
+.LVL1918:
+	.loc 5 729 0
+	ldr	w0, [x29, 172]
+	.loc 5 727 0
+	and	w21, w21, 65535
+	strh	w21, [x1, 2]
+	.loc 5 729 0
+	cmp	w0, w21
+	bls	.L1436
+	adrp	x0, .LANCHOR175
+	ldrh	w1, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LANCHOR176
+	ldrh	w0, [x0, #:lo12:.LANCHOR176]
+	cmp	w1, w0
+	bne	.L1437
+.L1436:
+	.loc 5 731 0
+	adrp	x0, .LANCHOR91
+	ldr	w0, [x0, #:lo12:.LANCHOR91]
+	cbz	w0, .L1438
+	.loc 5 732 0
+	bl	Ftl_gc_temp_data_write_back
+.LVL1919:
+	cbnz	w0, .L1478
+.L1438:
+	.loc 5 737 0
+	adrp	x0, .LANCHOR175
+	ldrh	w0, [x0, #:lo12:.LANCHOR175]
+	cbnz	w0, .L1439
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR43
+	ldr	x1, [x1, #:lo12:.LANCHOR43]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L1439
+	.loc 5 739 0
+	strh	wzr, [x1, x0]
+	.loc 5 740 0
+	ldrh	w0, [x19, #:lo12:.LANCHOR82]
+	bl	update_vpc_list
+.LVL1920:
+	.loc 5 741 0
+	bl	FtlCacheWriteBack
+.LVL1921:
+	.loc 5 742 0
+	bl	l2p_flush
+.LVL1922:
+	.loc 5 743 0
+	bl	FtlVpcTblFlush
+.LVL1923:
+.L1439:
+	.loc 5 745 0
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR82]
+.L1437:
+	.loc 5 747 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 2
+	bhi	.L1440
+	.loc 5 749 0
+	ldr	x0, [x29, 120]
+	ldrh	w21, [x0, #:lo12:.LANCHOR19]
+.LVL1924:
+	b	.L1412
+.LVL1925:
+.L1440:
+	.loc 5 754 0
+	adrp	x1, .LANCHOR174
+	.loc 5 752 0
+	str	wzr, [x22, #:lo12:.LANCHOR117]
+	.loc 5 754 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR174]
+	.loc 5 755 0
+	cmp	w1, 0
+	csinc	w0, w1, w0, ne
+	b	.L1371
+.LVL1926:
+.L1443:
+.LBE291:
+.LBE292:
+	.loc 5 479 0
+	mov	w0, 0
+.LVL1927:
+	b	.L1371
+	.cfi_endproc
+.LFE319:
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.sftl_gc,"ax",@progbits
+	.align	2
+	.global	sftl_gc
+	.type	sftl_gc, %function
+sftl_gc:
+.LFB320:
+	.loc 5 761 0
+	.cfi_startproc
+	.loc 5 762 0
+	mov	w1, 1
+	mov	w0, w1
+	b	rk_ftl_garbage_collect
+.LVL1928:
+	.cfi_endproc
+.LFE320:
+	.size	sftl_gc, .-sftl_gc
+	.section	.text.FtlRead,"ax",@progbits
+	.align	2
+	.global	FtlRead
+	.type	FtlRead, %function
+FtlRead:
+.LFB214:
+	.loc 3 814 0
+	.cfi_startproc
+.LVL1929:
+	stp	x29, x30, [sp, -176]!
+	.cfi_def_cfa_offset 176
+	.cfi_offset 29, -176
+	.cfi_offset 30, -168
+	and	w0, w0, 255
+	.loc 3 824 0
+	cmp	w0, 16
+	.loc 3 814 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -160
+	.cfi_offset 20, -152
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -128
+	.cfi_offset 24, -120
+	mov	x23, x3
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -96
+	.cfi_offset 28, -88
+	mov	w27, w2
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -144
+	.cfi_offset 22, -136
+	.cfi_offset 25, -112
+	.cfi_offset 26, -104
+	.loc 3 824 0
+	bne	.L1481
+	.loc 3 825 0
+	mov	x2, x3
+.LVL1930:
+	mov	w1, w27
+.LVL1931:
+	add	w0, w19, 256
+.LVL1932:
+	bl	FtlVendorPartRead
+.LVL1933:
+	mov	w21, w0
+.LVL1934:
+.L1480:
+	.loc 3 901 0
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+.LVL1935:
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+.LVL1936:
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+.LVL1937:
+	ldp	x29, x30, [sp], 176
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1938:
+.L1481:
+	.cfi_restore_state
+	.loc 3 830 0
+	add	w0, w1, w2
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR34
+	add	w1, w1, w2
+.LVL1939:
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	cmp	w1, w0
+	bhi	.L1501
+	.loc 3 830 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR88
+	ldr	w21, [x0, #:lo12:.LANCHOR88]
+	cmn	w21, #1
+	beq	.L1480
+	.loc 3 835 0 is_stmt 1
+	adrp	x22, .LANCHOR12
+	.loc 3 833 0
+	bl	FtlCacheWriteBack
+.LVL1940:
+	.loc 3 836 0
+	add	w1, w19, w27
+	.loc 3 840 0
+	mov	w25, 0
+	.loc 3 835 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR12]
+	.loc 3 836 0
+	sub	w24, w1, #1
+	.loc 3 841 0
+	adrp	x1, .LANCHOR63
+	.loc 3 815 0
+	mov	w21, 0
+	.loc 3 851 0
+	adrp	x28, .LANCHOR120
+	.loc 3 828 0
+	stp	wzr, wzr, [x29, 144]
+	.loc 3 835 0
+	udiv	w26, w19, w0
+.LVL1941:
+	.loc 3 836 0
+	udiv	w24, w24, w0
+.LVL1942:
+	.loc 3 835 0
+	mov	w20, w26
+	.loc 3 837 0
+	sub	w0, w24, w26
+	add	w0, w0, 1
+	stp	wzr, w0, [x29, 152]
+.LVL1943:
+	.loc 3 841 0
+	ldr	w0, [x1, #:lo12:.LANCHOR63]
+.LVL1944:
+	ldr	w2, [x29, 156]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR63]
+	.loc 3 886 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	str	x0, [x29, 128]
+.LVL1945:
+.L1483:
+	.loc 3 842 0
+	ldr	w0, [x29, 156]
+	cbnz	w0, .L1499
+	.loc 3 898 0
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	cbnz	w0, .L1500
+	.loc 3 898 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 31
+	bhi	.L1480
+.L1500:
+	.loc 3 899 0 is_stmt 1
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL1946:
+	b	.L1480
+.L1499:
+	.loc 3 843 0
+	add	x1, x29, 172
+	mov	w2, 0
+	mov	w0, w20
+	bl	log2phys
+.LVL1947:
+	.loc 3 844 0
+	ldr	w1, [x29, 172]
+	cmn	w1, #1
+	bne	.L1484
+	.loc 3 845 0 discriminator 1
+	add	x5, x22, :lo12:.LANCHOR12
+	mov	w4, 0
+.L1485:
+.LVL1948:
+	ldrh	w0, [x5]
+	cmp	w4, w0
+	bcc	.L1487
+.LVL1949:
+.L1488:
+	.loc 3 874 0
+	ldr	w0, [x29, 156]
+	.loc 3 872 0
+	add	w20, w20, 1
+.LVL1950:
+	.loc 3 874 0
+	subs	w0, w0, #1
+	str	w0, [x29, 156]
+.LVL1951:
+	beq	.L1492
+	.loc 3 874 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR3
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w25, w0, lsl 2
+	bne	.L1483
+.L1492:
+	.loc 3 875 0 is_stmt 1
+	cbz	w25, .L1483
+	.loc 3 876 0
+	ldr	x0, [x28, #:lo12:.LANCHOR120]
+	mov	w1, w25
+	mov	w2, 0
+	bl	FlashReadPages
+.LVL1952:
+	.loc 3 883 0
+	ldr	w0, [x29, 144]
+	lsl	w0, w0, 9
+	str	w0, [x29, 136]
+	.loc 3 880 0
+	ldr	w0, [x29, 152]
+	lsl	w0, w0, 9
+	str	x0, [x29, 120]
+	ldr	w0, [x29, 148]
+	lsl	w0, w0, 9
+	str	w0, [x29, 112]
+	ubfiz	x0, x25, 5, 32
+	mov	x25, 0
+.LVL1953:
+	str	x0, [x29, 104]
+.LVL1954:
+	.loc 3 883 0
+	add	x0, x22, :lo12:.LANCHOR12
+	str	x0, [x29, 96]
+.L1498:
+	.loc 3 878 0
+	ldr	x0, [x28, #:lo12:.LANCHOR120]
+	add	x0, x0, x25
+	ldr	w1, [x0, 24]
+	cmp	w26, w1
+	bne	.L1494
+	.loc 3 879 0
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR116
+	ldr	x0, [x0, #:lo12:.LANCHOR116]
+	cmp	x1, x0
+	bne	.L1495
+	.loc 3 880 0
+	ldr	x0, [x29, 120]
+	ldr	w2, [x29, 112]
+	add	x1, x1, x0
+	mov	x0, x23
+.L1512:
+	.loc 3 883 0
+	bl	ftl_memcpy
+.LVL1955:
+.L1495:
+	.loc 3 885 0
+	ldr	x0, [x28, #:lo12:.LANCHOR120]
+	add	x1, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L1496
+	.loc 3 886 0
+	ldr	x1, [x29, 128]
+	.loc 3 887 0
+	mov	w21, w0
+.LVL1956:
+	.loc 3 886 0
+	ldr	x2, [x29, 128]
+	ldr	w1, [x1, 72]
+	add	w1, w1, 1
+	str	w1, [x2, 72]
+.LVL1957:
+.L1497:
+	.loc 3 877 0 discriminator 2
+	ldr	x0, [x29, 104]
+	add	x25, x25, 32
+.LVL1958:
+	cmp	x0, x25
+	bne	.L1498
+	.loc 3 894 0
+	mov	w25, 0
+	b	.L1483
+.LVL1959:
+.L1487:
+	.loc 3 846 0
+	madd	w0, w20, w0, w4
+.LVL1960:
+	.loc 3 847 0
+	cmp	w19, w0
+	bhi	.L1486
+	.loc 3 847 0 is_stmt 0 discriminator 1
+	ldr	w1, [x29, 140]
+	cmp	w1, w0
+	bls	.L1486
+	.loc 3 848 0 is_stmt 1
+	sub	w0, w0, w19
+.LVL1961:
+	str	x5, [x29, 112]
+	lsl	w0, w0, 9
+	str	w4, [x29, 120]
+	mov	w2, 512
+	mov	w1, 0
+	add	x0, x23, x0
+	bl	ftl_memset
+.LVL1962:
+	ldr	w4, [x29, 120]
+	ldr	x5, [x29, 112]
+.LVL1963:
+.L1486:
+	.loc 3 845 0 discriminator 2
+	add	w4, w4, 1
+.LVL1964:
+	b	.L1485
+.LVL1965:
+.L1484:
+	.loc 3 851 0
+	ldr	x2, [x28, #:lo12:.LANCHOR120]
+	ubfiz	x0, x25, 5, 32
+	.loc 3 852 0
+	cmp	w20, w26
+	.loc 3 851 0
+	add	x0, x2, x0
+	str	w1, [x0, 4]
+	.loc 3 852 0
+	bne	.L1489
+	.loc 3 853 0
+	adrp	x1, .LANCHOR116
+	ldr	x1, [x1, #:lo12:.LANCHOR116]
+	str	x1, [x0, 8]
+	.loc 3 854 0
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	udiv	w2, w19, w1
+	msub	w2, w2, w1, w19
+	str	w2, [x29, 152]
+.LVL1966:
+	.loc 3 855 0
+	sub	w2, w1, w2
+.LVL1967:
+	cmp	w27, w2
+	csel	w2, w27, w2, ls
+.LVL1968:
+	str	w2, [x29, 148]
+.LVL1969:
+	.loc 3 857 0
+	cmp	w1, w2
+	bne	.L1490
+	.loc 3 858 0
+	str	x23, [x0, 8]
+.LVL1970:
+.L1490:
+	.loc 3 867 0
+	adrp	x1, .LANCHOR24
+	adrp	x2, .LANCHOR115
+	.loc 3 868 0
+	str	w20, [x0, 24]
+	.loc 3 867 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR24]
+	ldr	x2, [x2, #:lo12:.LANCHOR115]
+	mul	w1, w1, w25
+	.loc 3 869 0
+	add	w25, w25, 1
+.LVL1971:
+	.loc 3 867 0
+	and	x1, x1, 4294967292
+	add	x1, x2, x1
+	str	x1, [x0, 16]
+	b	.L1488
+.L1489:
+	.loc 3 859 0
+	cmp	w20, w24
+	bne	.L1491
+	.loc 3 861 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR12]
+	.loc 3 860 0
+	adrp	x1, .LANCHOR114
+	.loc 3 861 0
+	ldr	w3, [x29, 140]
+	.loc 3 860 0
+	ldr	x1, [x1, #:lo12:.LANCHOR114]
+	str	x1, [x0, 8]
+	.loc 3 861 0
+	mul	w1, w20, w2
+	sub	w3, w3, w1
+	str	w3, [x29, 144]
+.LVL1972:
+	.loc 3 862 0
+	cmp	w2, w3
+	bne	.L1490
+.LVL1973:
+.L1511:
+	.loc 3 865 0
+	sub	w1, w1, w19
+	lsl	w1, w1, 9
+	add	x1, x23, x1
+	str	x1, [x0, 8]
+	b	.L1490
+.L1491:
+	ldrh	w1, [x22, #:lo12:.LANCHOR12]
+	mul	w1, w1, w20
+	b	.L1511
+.LVL1974:
+.L1494:
+	.loc 3 881 0
+	cmp	w24, w1
+	bne	.L1495
+	.loc 3 882 0
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR114
+	ldr	x0, [x0, #:lo12:.LANCHOR114]
+	cmp	x1, x0
+	bne	.L1495
+	.loc 3 883 0
+	ldr	x0, [x29, 96]
+	ldr	w2, [x29, 136]
+	ldrh	w0, [x0]
+	mul	w0, w0, w24
+	sub	w0, w0, w19
+	lsl	w0, w0, 9
+	add	x0, x23, x0
+	b	.L1512
+.L1496:
+	.loc 3 889 0
+	cmp	w0, 256
+	bne	.L1497
+.LBB293:
+	.loc 3 890 0
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+.LVL1975:
+	.loc 3 891 0
+	bl	FtlGcRefreshBlock
+.LVL1976:
+	b	.L1497
+.LVL1977:
+.L1501:
+.LBE293:
+	.loc 3 831 0
+	mov	w21, -1
+	b	.L1480
+	.cfi_endproc
+.LFE214:
+	.size	FtlRead, .-FtlRead
+	.section	.text.sftl_read,"ax",@progbits
+	.align	2
+	.global	sftl_read
+	.type	sftl_read, %function
+sftl_read:
+.LFB219:
+	.loc 3 1204 0
+	.cfi_startproc
+.LVL1978:
+	.loc 3 1205 0
+	mov	x3, x2
+	mov	w2, w1
+.LVL1979:
+	mov	w1, w0
+.LVL1980:
+	mov	w0, 0
+.LVL1981:
+	b	FtlRead
+.LVL1982:
+	.cfi_endproc
+.LFE219:
+	.size	sftl_read, .-sftl_read
+	.section	.text.FtlWrite,"ax",@progbits
+	.align	2
+	.global	FtlWrite
+	.type	FtlWrite, %function
+FtlWrite:
+.LFB217:
+	.loc 3 962 0
+	.cfi_startproc
+.LVL1983:
+	stp	x29, x30, [sp, -240]!
+	.cfi_def_cfa_offset 240
+	.cfi_offset 29, -240
+	.cfi_offset 30, -232
+	and	w0, w0, 255
+	.loc 3 970 0
+	cmp	w0, 16
+	.loc 3 962 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -176
+	.cfi_offset 26, -168
+	mov	w25, w2
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 21, -208
+	.cfi_offset 22, -200
+	.cfi_offset 19, -224
+	.cfi_offset 20, -216
+	mov	w22, w1
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 23, -192
+	.cfi_offset 24, -184
+	.cfi_offset 27, -160
+	.cfi_offset 28, -152
+	.loc 3 970 0
+	bne	.L1515
+	.loc 3 971 0
+	mov	x2, x3
+.LVL1984:
+	mov	w1, w25
+.LVL1985:
+	add	w0, w22, 256
+.LVL1986:
+	bl	FtlVendorPartWrite
+.LVL1987:
+.L1514:
+	.loc 3 1153 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+.LVL1988:
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.LVL1989:
+.L1515:
+	.cfi_restore_state
+	.loc 3 974 0
+	adrp	x0, .LANCHOR34
+	add	w2, w1, w2
+.LVL1990:
+	ldr	w0, [x0, #:lo12:.LANCHOR34]
+	cmp	w2, w0
+	bhi	.L1557
+	.loc 3 974 0 is_stmt 0 discriminator 1
+	adrp	x0, .LANCHOR88
+	ldr	w0, [x0, #:lo12:.LANCHOR88]
+	cmn	w0, #1
+	beq	.L1514
+	.loc 3 977 0 is_stmt 1
+	adrp	x0, .LANCHOR178
+	.loc 3 978 0
+	adrp	x3, .LANCHOR12
+.LVL1991:
+	.loc 3 977 0
+	mov	w1, 2048
+.LVL1992:
+	.loc 3 979 0
+	sub	w2, w2, #1
+	.loc 3 977 0
+	str	w1, [x0, #:lo12:.LANCHOR178]
+	.loc 3 978 0
+	ldrh	w1, [x3, #:lo12:.LANCHOR12]
+	str	x3, [x29, 176]
+	.loc 3 979 0
+	udiv	w0, w2, w1
+	.loc 3 982 0
+	adrp	x2, .LANCHOR65
+	.loc 3 978 0
+	udiv	w21, w22, w1
+.LVL1993:
+	.loc 3 979 0
+	str	w0, [x29, 168]
+.LVL1994:
+	.loc 3 980 0
+	sub	w23, w0, w21
+	.loc 3 982 0
+	ldr	w0, [x2, #:lo12:.LANCHOR65]
+.LVL1995:
+	.loc 3 980 0
+	add	w24, w23, 1
+.LVL1996:
+	.loc 3 982 0
+	add	w0, w0, w24
+	str	w0, [x2, #:lo12:.LANCHOR65]
+	.loc 3 983 0
+	adrp	x0, .LANCHOR150
+	str	x0, [x29, 128]
+	ldr	x2, [x0, #:lo12:.LANCHOR150]
+	cbz	x2, .L1517
+	.loc 3 984 0
+	ldr	w0, [x2, 24]
+	cmp	w21, w0
+	beq	.L1518
+	.loc 3 985 0
+	bl	FtlCacheWriteBack
+.LVL1997:
+.L1517:
+	.loc 3 1008 0
+	adrp	x0, .LANCHOR179
+	str	x0, [x29, 152]
+	ldr	w1, [x0, #:lo12:.LANCHOR179]
+	adrp	x0, .LANCHOR51
+	add	x19, x0, :lo12:.LANCHOR51
+	cbz	w1, .L1520
+	.loc 3 1008 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1520
+	.loc 3 1009 0 is_stmt 1
+	adrp	x19, .LANCHOR52
+	add	x19, x19, :lo12:.LANCHOR52
+.L1520:
+	mov	w20, w21
+	.loc 3 1023 0
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	str	x0, [x29, 104]
+.LVL1998:
+.L1521:
+	.loc 3 1011 0
+	cbz	w24, .L1555
+	.loc 3 1012 0
+	adrp	x0, .LANCHOR3
+	ldrb	w2, [x19, 6]
+	str	x0, [x29, 120]
+	ldrh	w1, [x0, #:lo12:.LANCHOR3]
+	cmp	w2, w1
+	bcc	.L1522
+	.loc 3 1012 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1012
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL1999:
+.L1522:
+	.loc 3 1013 0 is_stmt 1
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1523
+	.loc 3 1014 0
+	bl	FtlCacheWriteBack
+.LVL2000:
+	.loc 3 1016 0
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
+	cmp	x19, x0
+	bne	.L1524
+	.loc 3 1017 0
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	ldrh	w1, [x0, 4]
+	cbnz	w1, .L1525
+	.loc 3 1018 0
+	bl	allocate_new_data_superblock
+.LVL2001:
+	.loc 3 1019 0
+	ldr	x0, [x29, 152]
+	str	wzr, [x0, #:lo12:.LANCHOR179]
+.L1525:
+	.loc 3 1021 0
+	adrp	x0, .LANCHOR51
+	add	x19, x0, :lo12:.LANCHOR51
+.LVL2002:
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL2003:
+	.loc 3 1022 0
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR179]
+	.loc 3 1023 0
+	cmp	w0, 0
+	ldr	x0, [x29, 104]
+	csel	x19, x0, x19, ne
+.L1526:
+.LVL2004:
+	.loc 3 1033 0
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1523
+	.loc 3 1034 0
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL2005:
+.L1523:
+	.loc 3 1043 0
+	ldrh	w0, [x19, 4]
+	.loc 3 1041 0
+	ldrb	w1, [x19, 7]
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
+	lsl	w1, w1, 2
+	cmp	w0, w1
+	csel	w0, w0, w1, ls
+	str	w0, [x29, 160]
+.LVL2006:
+	.loc 3 1045 0
+	ldr	x0, [x29, 120]
+.LVL2007:
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1527
+	.loc 3 1045 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1045
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2008:
+.L1527:
+	.loc 3 1055 0 is_stmt 1 discriminator 1
+	adrp	x0, .LANCHOR24
+	adrp	x28, .LANCHOR122
+	add	x0, x0, :lo12:.LANCHOR24
+	.loc 3 1068 0 discriminator 1
+	str	xzr, [x29, 184]
+	.loc 3 1055 0 discriminator 1
+	str	x0, [x29, 112]
+.L1528:
+	.loc 3 1046 0 discriminator 1
+	ldr	w1, [x29, 160]
+	ldr	w27, [x29, 184]
+.LVL2009:
+	cmp	w27, w1
+	bcc	.L1549
+	mov	x27, x1
+.L1529:
+.LVL2010:
+	.loc 3 1127 0
+	ldr	x0, [x29, 128]
+	ldr	x0, [x0, #:lo12:.LANCHOR150]
+	cbz	x0, .L1550
+.LVL2011:
+	.loc 3 1129 0
+	sub	w24, w24, #1
+.LVL2012:
+	.loc 3 1130 0
+	subs	w27, w27, #1
+.LVL2013:
+	bne	.L1550
+.LVL2014:
+.L1555:
+	.loc 3 1137 0
+	ldr	w0, [x29, 168]
+	sub	w1, w0, w21
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2015:
+	.loc 3 1139 0
+	adrp	x0, .LANCHOR48
+	mov	x22, x0
+.LVL2016:
+	ldrh	w1, [x0, #:lo12:.LANCHOR48]
+	cmp	w1, 15
+	bhi	.L1552
+	.loc 3 1141 0
+	adrp	x21, .LANCHOR101
+.LVL2017:
+	.loc 3 1143 0
+	adrp	x20, .LANCHOR85
+.LVL2018:
+	.loc 3 1144 0
+	adrp	x19, .LANCHOR84
+.LVL2019:
+	.loc 3 1141 0
+	add	x21, x21, :lo12:.LANCHOR101
+	.loc 3 1143 0
+	add	x20, x20, :lo12:.LANCHOR85
+	.loc 3 1144 0
+	add	x19, x19, :lo12:.LANCHOR84
+.L1575:
+	.loc 3 1141 0
+	adrp	x0, .LANCHOR82
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR82]
+	cmp	w0, w1
+	bne	.L1556
+	.loc 3 1141 0 is_stmt 0 discriminator 1
+	ldrh	w1, [x21]
+	cmp	w1, w0
+	bne	.L1556
+	.loc 3 1142 0 is_stmt 1
+	mov	w0, 0
+	bl	List_get_gc_head_node
+.LVL2020:
+	bl	FtlGcRefreshBlock
+.LVL2021:
+.L1556:
+	.loc 3 1143 0
+	mov	w0, 128
+	.loc 3 1145 0
+	mov	w1, 1
+	.loc 3 1143 0
+	strh	w0, [x20]
+	.loc 3 1144 0
+	strh	w0, [x19]
+	.loc 3 1145 0
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+.LVL2022:
+	.loc 3 1146 0
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2023:
+	.loc 3 1147 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR48]
+	cmp	w0, 8
+	bls	.L1575
+	b	.L1552
+.LVL2024:
+.L1518:
+	.loc 3 987 0
+	adrp	x3, .LANCHOR66
+	ldr	w0, [x3, #:lo12:.LANCHOR66]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR66]
+	.loc 3 988 0
+	msub	w0, w21, w1, w22
+.LVL2025:
+	.loc 3 992 0
+	ldr	x3, [x2, 8]
+	.loc 3 989 0
+	sub	w1, w1, w0
+.LVL2026:
+	cmp	w25, w1
+	.loc 3 992 0
+	lsl	w0, w0, 9
+.LVL2027:
+	csel	w19, w25, w1, ls
+.LVL2028:
+	add	x0, x3, x0
+	lsl	w20, w19, 9
+	mov	x1, x26
+	mov	w2, w20
+	bl	ftl_memcpy
+.LVL2029:
+	.loc 3 994 0
+	cbnz	w23, .L1519
+.LVL2030:
+.L1552:
+	.loc 3 995 0
+	mov	w0, 0
+	b	.L1514
+.LVL2031:
+.L1519:
+	.loc 3 996 0
+	sub	w25, w25, w19
+.LVL2032:
+	.loc 3 997 0
+	add	w22, w22, w19
+.LVL2033:
+	.loc 3 998 0
+	add	x26, x26, x20
+.LVL2034:
+	.loc 3 999 0
+	add	w21, w21, 1
+.LVL2035:
+	.loc 3 1000 0
+	bl	FtlCacheWriteBack
+.LVL2036:
+	mov	w24, w23
+	b	.L1517
+.LVL2037:
+.L1524:
+	.loc 3 1027 0
+	ldr	x1, [x29, 152]
+	str	wzr, [x1, #:lo12:.LANCHOR179]
+	.loc 3 1028 0
+	ldrh	w1, [x0, 4]
+	cbnz	w1, .L1562
+	.loc 3 1029 0
+	mov	x0, x19
+	bl	allocate_new_data_superblock
+.LVL2038:
+	b	.L1526
+.L1562:
+	mov	x19, x0
+.LVL2039:
+	b	.L1523
+.LVL2040:
+.L1549:
+	.loc 3 1047 0
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1529
+	.loc 3 1051 0
+	add	x1, x29, 204
+	mov	w2, 0
+	mov	w0, w20
+	bl	log2phys
+.LVL2041:
+	.loc 3 1052 0
+	mov	x0, x19
+	bl	get_new_active_ppa
+.LVL2042:
+	ldr	x1, [x29, 184]
+	lsl	x23, x1, 5
+	.loc 3 1054 0
+	adrp	x1, .LANCHOR122
+	ldr	x1, [x1, #:lo12:.LANCHOR122]
+	add	x1, x1, x23
+	str	w0, [x1, 4]
+	.loc 3 1055 0
+	ldr	x0, [x29, 112]
+.LVL2043:
+	.loc 3 1056 0
+	str	w20, [x1, 24]
+	.loc 3 1055 0
+	ldrh	w2, [x0]
+	mul	w27, w27, w2
+	and	x0, x27, 4294967292
+	str	x0, [x29, 144]
+	adrp	x0, .LANCHOR115
+	ldr	x3, [x29, 144]
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
+	str	x0, [x29, 136]
+	add	x27, x0, x3
+.LVL2044:
+	str	x27, [x1, 16]
+	.loc 3 1059 0
+	mov	x0, x27
+	mov	w1, 0
+.LVL2045:
+	bl	ftl_memset
+.LVL2046:
+	.loc 3 1061 0
+	ldr	w0, [x29, 168]
+	cmp	w20, w21
+	ccmp	w20, w0, 4, ne
+	bne	.L1530
+	.loc 3 1062 0
+	cmp	w20, w21
+	bne	.L1531
+	.loc 3 1063 0
+	ldr	x0, [x29, 176]
+	ldrh	w2, [x0, #:lo12:.LANCHOR12]
+	udiv	w0, w22, w2
+	msub	w0, w0, w2, w22
+	str	w0, [x29, 164]
+.LVL2047:
+	.loc 3 1064 0
+	sub	w2, w2, w0
+	cmp	w2, w25
+	csel	w0, w2, w25, ls
+.LVL2048:
+	str	w0, [x29, 172]
+.LVL2049:
+.L1532:
+	.loc 3 1072 0
+	ldr	x0, [x29, 176]
+	ldr	w1, [x29, 172]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	cmp	w1, w0
+	.loc 3 1074 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	.loc 3 1072 0
+	bne	.L1533
+	.loc 3 1074 0
+	add	x23, x0, x23
+	.loc 3 1073 0
+	cmp	w20, w21
+	bne	.L1534
+	.loc 3 1074 0
+	str	x26, [x23, 8]
+.LVL2050:
+.L1535:
+	.loc 3 1119 0
+	ldr	x0, [x29, 120]
+	ldrb	w1, [x19, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR3]
+	cmp	w1, w0
+	bcc	.L1546
+	.loc 3 1119 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1119
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2051:
+.L1546:
+	.loc 3 1120 0 is_stmt 1
+	ldp	x1, x2, [x29, 136]
+	mov	w0, -3947
+	strh	w0, [x1, x2]
+	.loc 3 1121 0
+	adrp	x1, .LANCHOR72
+	ldr	w0, [x1, #:lo12:.LANCHOR72]
+	.loc 3 1122 0
+	stp	w0, w20, [x27, 4]
+	.loc 3 1125 0
+	add	w20, w20, 1
+.LVL2052:
+	.loc 3 1121 0
+	add	w0, w0, 1
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x1, #:lo12:.LANCHOR72]
+	.loc 3 1123 0
+	ldr	w0, [x29, 204]
+	str	w0, [x27, 12]
+	.loc 3 1124 0
+	ldrh	w0, [x19]
+	strh	w0, [x27, 2]
+	ldr	x0, [x29, 184]
+	add	x0, x0, 1
+	str	x0, [x29, 184]
+	b	.L1528
+.LVL2053:
+.L1531:
+	.loc 3 1069 0
+	ldr	x0, [x29, 176]
+	add	w2, w22, w25
+	.loc 3 1068 0
+	str	wzr, [x29, 164]
+	.loc 3 1069 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	msub	w2, w20, w0, w2
+	and	w0, w2, 65535
+	str	w0, [x29, 172]
+.LVL2054:
+	b	.L1532
+.LVL2055:
+.L1534:
+	.loc 3 1076 0
+	ldr	w0, [x29, 172]
+.LVL2056:
+.L1578:
+	.loc 3 1117 0
+	mul	w0, w0, w20
+	sub	w0, w0, w22
+	lsl	w0, w0, 9
+	add	x0, x26, x0
+	str	x0, [x23, 8]
+	b	.L1535
+.LVL2057:
+.L1533:
+	.loc 3 1080 0
+	add	x0, x0, x23
+	.loc 3 1079 0
+	cmp	w20, w21
+	bne	.L1536
+	.loc 3 1080 0
+	adrp	x1, .LANCHOR116
+	ldr	x1, [x1, #:lo12:.LANCHOR116]
+.L1577:
+	.loc 3 1082 0
+	str	x1, [x0, 8]
+	.loc 3 1084 0
+	ldr	w0, [x29, 204]
+	cmn	w0, #1
+	beq	.L1538
+.LBB294:
+	.loc 3 1086 0
+	str	w0, [x29, 212]
+	.loc 3 1090 0
+	mov	w2, 0
+	.loc 3 1088 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	.loc 3 1087 0
+	str	w20, [x29, 232]
+	.loc 3 1088 0
+	add	x0, x0, x23
+	.loc 3 1089 0
+	ldp	x1, x0, [x0, 8]
+	stp	x1, x0, [x29, 216]
+	.loc 3 1090 0
+	mov	w1, 1
+	add	x0, x29, 208
+	bl	FlashReadPages
+.LVL2058:
+	.loc 3 1091 0
+	ldr	w0, [x29, 208]
+	cmn	w0, #1
+	bne	.L1539
+	.loc 3 1092 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w1, [x0, 72]
+	add	w1, w1, 1
+	str	w1, [x0, 72]
+.L1542:
+	ldr	w0, [x29, 172]
+.LBE294:
+	.loc 3 1104 0
+	cmp	w20, w21
+	lsl	w2, w0, 9
+	bne	.L1543
+	.loc 3 1105 0
+	ldr	x1, [x28, #:lo12:.LANCHOR122]
+	ldr	w0, [x29, 164]
+	add	x1, x1, x23
+	lsl	w0, w0, 9
+	ldr	x4, [x1, 8]
+	mov	x1, x26
+	add	x0, x4, x0
+	bl	ftl_memcpy
+.LVL2059:
+	.loc 3 1109 0
+	ldr	w0, [x29, 168]
+	cmp	w20, w0
+	bne	.L1535
+.L1544:
+	.loc 3 1110 0
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1535
+	.loc 3 1111 0
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	add	x23, x0, x23
+	ldr	x0, [x29, 128]
+	str	x23, [x0, #:lo12:.LANCHOR150]
+	.loc 3 1112 0
+	adrp	x0, .LANCHOR171
+	str	x19, [x0, #:lo12:.LANCHOR171]
+	b	.L1535
+.L1536:
+	.loc 3 1082 0
+	adrp	x1, .LANCHOR114
+	ldr	x1, [x1, #:lo12:.LANCHOR114]
+	b	.L1577
+.L1539:
+.LBB295:
+	.loc 3 1094 0
+	ldr	w1, [x27, 8]
+	cmp	w20, w1
+	beq	.L1541
+	.loc 3 1095 0
+	adrp	x0, .LANCHOR83
+	add	x0, x0, :lo12:.LANCHOR83
+	ldr	w2, [x0, 72]
+	add	w2, w2, 1
+	str	w2, [x0, 72]
+	.loc 3 1096 0
+	adrp	x0, .LC105
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC105
+	bl	printf
+.LVL2060:
+.L1541:
+	.loc 3 1098 0
+	ldr	w0, [x27, 8]
+	cmp	w20, w0
+	beq	.L1542
+	.loc 3 1098 0 is_stmt 0 discriminator 1
+	mov	w2, 1098
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2061:
+	b	.L1542
+.LVL2062:
+.L1538:
+.LBE295:
+	.loc 3 1101 0 is_stmt 1
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	adrp	x1, .LANCHOR23
+	add	x0, x0, x23
+	ldrh	w2, [x1, #:lo12:.LANCHOR23]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+.LVL2063:
+	b	.L1542
+.L1543:
+	.loc 3 1107 0
+	ldr	x0, [x29, 176]
+	ldrh	w1, [x0, #:lo12:.LANCHOR12]
+	ldr	x0, [x28, #:lo12:.LANCHOR122]
+	add	x0, x0, x23
+	mul	w1, w1, w20
+	ldr	x0, [x0, 8]
+	sub	w1, w1, w22
+	lsl	w1, w1, 9
+	add	x1, x26, x1
+	bl	ftl_memcpy
+.LVL2064:
+	b	.L1544
+.LVL2065:
+.L1530:
+	.loc 3 1117 0
+	adrp	x0, .LANCHOR122
+	ldr	x0, [x0, #:lo12:.LANCHOR122]
+	add	x23, x0, x23
+	ldr	x0, [x29, 176]
+	ldrh	w0, [x0, #:lo12:.LANCHOR12]
+	b	.L1578
+.LVL2066:
+.L1550:
+	.loc 3 1133 0
+	adrp	x0, .LANCHOR122
+	mov	x3, x19
+	mov	w2, 0
+	mov	w1, w27
+	ldr	x0, [x0, #:lo12:.LANCHOR122]
+	bl	FtlProgPages
+.LVL2067:
+	.loc 3 1134 0
+	cmp	w24, w27
+	bcs	.L1553
+	.loc 3 1134 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC1
+	mov	w2, 1134
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2068:
+.L1553:
+	.loc 3 1135 0 is_stmt 1
+	sub	w24, w24, w27
+.LVL2069:
+	b	.L1521
+.LVL2070:
+.L1557:
+	.loc 3 975 0
+	mov	w0, -1
+	b	.L1514
+	.cfi_endproc
+.LFE217:
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.sftl_write,"ax",@progbits
+	.align	2
+	.global	sftl_write
+	.type	sftl_write, %function
+sftl_write:
+.LFB220:
+	.loc 3 1210 0
+	.cfi_startproc
+.LVL2071:
+	.loc 3 1211 0
+	mov	x3, x2
+	mov	w2, w1
+.LVL2072:
+	mov	w1, w0
+.LVL2073:
+	mov	w0, 0
+.LVL2074:
+	b	FtlWrite
+.LVL2075:
+	.cfi_endproc
+.LFE220:
+	.size	sftl_write, .-sftl_write
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+.LFB274:
+	.loc 2 1360 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -96]!
+	.cfi_def_cfa_offset 96
+	.cfi_offset 29, -96
+	.cfi_offset 30, -88
+	.loc 2 1368 0
+	mov	w1, 0
+	.loc 2 1360 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -80
+	.cfi_offset 20, -72
+	.loc 2 1365 0
+	adrp	x19, .LANCHOR108
+	.loc 2 1360 0
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -48
+	.cfi_offset 24, -40
+	.loc 2 1365 0
+	adrp	x23, .LANCHOR39
+	.loc 2 1360 0
+	stp	x21, x22, [sp, 32]
+	.cfi_offset 21, -64
+	.cfi_offset 22, -56
+	.loc 2 1365 0
+	add	x21, x19, :lo12:.LANCHOR108
+	.loc 2 1360 0
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 25, -32
+	.cfi_offset 26, -24
+	.loc 2 1366 0
+	adrp	x26, .LANCHOR109
+	.loc 2 1360 0
+	stp	x27, x28, [sp, 80]
+	.cfi_offset 27, -16
+	.cfi_offset 28, -8
+	.loc 2 1368 0
+	adrp	x25, .LANCHOR43
+	.loc 2 1365 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 1368 0
+	adrp	x24, .LANCHOR5
+	.loc 2 1365 0
+	str	x0, [x21, 8]
+	.loc 2 1369 0
+	adrp	x20, .LANCHOR81
+	.loc 2 1366 0
+	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	str	x0, [x21, 16]
+	.loc 2 1368 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL2076:
+	.loc 2 1369 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR81]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L1581
+.L1589:
+	.loc 2 1370 0
+	mov	w0, -1
+.L1580:
+	.loc 2 1463 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 27
+	.cfi_restore 28
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L1581:
+	.cfi_restore_state
+	add	x27, x20, :lo12:.LANCHOR81
+	.loc 2 1372 0
+	mov	w1, 1
+	bl	FtlGetLastWrittenPage
+.LVL2077:
+	sxth	w22, w0
+.LVL2078:
+	.loc 2 1373 0
+	add	w0, w0, 1
+	.loc 2 1382 0
+	mov	w28, 61604
+	.loc 2 1373 0
+	strh	w0, [x27, 2]
+	.loc 2 1381 0
+	mov	w27, 19539
+	movk	w27, 0x4654, lsl 16
+.L1583:
+	.loc 2 1375 0
+	tbz	w22, #31, .L1586
+	.loc 2 1388 0
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC1
+	mov	w2, 1388
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2079:
+.L1585:
+	.loc 2 1390 0
+	adrp	x1, .LANCHOR23
+	ldrh	w0, [x24, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, #:lo12:.LANCHOR23]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L1588
+	.loc 2 1390 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC1
+	mov	w2, 1390
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2080:
+.L1588:
+	.loc 2 1392 0 is_stmt 1
+	add	x22, x19, :lo12:.LANCHOR108
+.LVL2081:
+	adrp	x19, .LANCHOR79
+	add	x21, x19, :lo12:.LANCHOR79
+	mov	w2, 48
+	mov	x0, x21
+	ldr	x1, [x22, 8]
+	bl	ftl_memcpy
+.LVL2082:
+	.loc 2 1393 0
+	ldr	x0, [x25, #:lo12:.LANCHOR43]
+	ldrh	w2, [x24, #:lo12:.LANCHOR5]
+	ldr	x1, [x22, 8]
+	lsl	w2, w2, 1
+	add	x1, x1, 48
+	bl	ftl_memcpy
+.LVL2083:
+	.loc 2 1394 0
+	ldrh	w1, [x24, #:lo12:.LANCHOR5]
+	ldr	x0, [x22, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR1
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	bl	ftl_memcpy
+.LVL2084:
+	.loc 2 1396 0
+	ldr	w1, [x19, #:lo12:.LANCHOR79]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1589
+	.loc 2 1399 0
+	add	x20, x20, :lo12:.LANCHOR81
+	.loc 2 1400 0
+	adrp	x0, .LANCHOR10
+	.loc 2 1399 0
+	ldrh	w1, [x21, 8]
+	.loc 2 1400 0
+	ldrb	w2, [x21, 10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR10]
+	.loc 2 1399 0
+	strh	w1, [x20, 6]
+	.loc 2 1400 0
+	cmp	w2, w0
+	bne	.L1589
+	.loc 2 1403 0
+	adrp	x0, .LANCHOR182
+	.loc 2 1404 0
+	adrp	x2, .LANCHOR62
+	.loc 2 1406 0
+	adrp	x3, .LANCHOR3
+	.loc 2 1403 0
+	str	w1, [x0, #:lo12:.LANCHOR182]
+	.loc 2 1404 0
+	adrp	x0, .LANCHOR19
+	.loc 2 1406 0
+	ldrh	w3, [x3, #:lo12:.LANCHOR3]
+	.loc 2 1404 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR19]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR62]
+	.loc 2 1405 0
+	adrp	x2, .LANCHOR12
+	ldrh	w2, [x2, #:lo12:.LANCHOR12]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR34
+	str	w0, [x2, #:lo12:.LANCHOR34]
+	.loc 2 1406 0
+	adrp	x0, .LANCHOR7
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR37+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR37+6]
+	.loc 2 1412 0
+	cmp	w1, w2
+	.loc 2 1406 0
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR80
+	strh	w0, [x3, #:lo12:.LANCHOR80]
+	.loc 2 1412 0
+	bls	.L1590
+	.loc 2 1412 0 is_stmt 0 discriminator 1
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC1
+	mov	w2, 1412
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.LVL2085:
+.L1590:
+	.loc 2 1414 0 is_stmt 1
+	add	x1, x19, :lo12:.LANCHOR79
+	adrp	x0, .LANCHOR51
+	add	x3, x0, :lo12:.LANCHOR51
+	.loc 2 1419 0
+	adrp	x20, .LANCHOR82
+	.loc 2 1415 0
+	ldrh	w2, [x1, 16]
+	.loc 2 1414 0
+	ldrh	w6, [x1, 14]
+	strh	w6, [x0, #:lo12:.LANCHOR51]
+	.loc 2 1415 0
+	lsr	w4, w2, 6
+	.loc 2 1416 0
+	and	w2, w2, 63
+	strb	w2, [x3, 6]
+	.loc 2 1417 0
+	ldrb	w2, [x1, 11]
+	strb	w2, [x3, 8]
+	.loc 2 1419 0
+	add	x2, x20, :lo12:.LANCHOR82
+	.loc 2 1415 0
+	strh	w4, [x3, 2]
+	.loc 2 1419 0
+	mov	w3, -1
+	strh	w3, [x20, #:lo12:.LANCHOR82]
+	.loc 2 1420 0
+	strh	wzr, [x2, 2]
+	.loc 2 1421 0
+	strb	wzr, [x2, 6]
+	.loc 2 1422 0
+	strb	wzr, [x2, 8]
+	.loc 2 1424 0
+	adrp	x2, .LANCHOR52
+	ldrh	w3, [x1, 18]
+	add	x4, x2, :lo12:.LANCHOR52
+	strh	w3, [x2, #:lo12:.LANCHOR52]
+	mov	x21, x2
+	.loc 2 1425 0
+	ldrh	w3, [x1, 20]
+	lsr	w5, w3, 6
+	.loc 2 1426 0
+	and	w3, w3, 63
+	strb	w3, [x4, 6]
+	.loc 2 1427 0
+	ldrb	w3, [x1, 12]
+	.loc 2 1425 0
+	strh	w5, [x4, 2]
+	.loc 2 1427 0
+	strb	w3, [x4, 8]
+	.loc 2 1429 0
+	adrp	x4, .LANCHOR53
+	ldrh	w3, [x1, 22]
+	add	x5, x4, :lo12:.LANCHOR53
+	strh	w3, [x4, #:lo12:.LANCHOR53]
+	mov	x22, x4
+	.loc 2 1430 0
+	ldrh	w3, [x1, 24]
+	lsr	w7, w3, 6
+	.loc 2 1431 0
+	and	w3, w3, 63
+	strb	w3, [x5, 6]
+	.loc 2 1432 0
+	ldrb	w3, [x1, 13]
+	strb	w3, [x5, 8]
+	.loc 2 1434 0
+	adrp	x3, .LANCHOR68
+	.loc 2 1430 0
+	strh	w7, [x5, 2]
+	.loc 2 1439 0
+	ldr	w5, [x1, 32]
+	.loc 2 1434 0
+	str	wzr, [x3, #:lo12:.LANCHOR68]
+	.loc 2 1435 0
+	adrp	x3, .LANCHOR65
+	str	wzr, [x3, #:lo12:.LANCHOR65]
+	.loc 2 1436 0
+	adrp	x3, .LANCHOR63
+	str	wzr, [x3, #:lo12:.LANCHOR63]
+	.loc 2 1437 0
+	adrp	x3, .LANCHOR67
+	str	wzr, [x3, #:lo12:.LANCHOR67]
+	.loc 2 1439 0
+	adrp	x3, .LANCHOR73
+	str	w5, [x3, #:lo12:.LANCHOR73]
+	.loc 2 1440 0
+	adrp	x3, .LANCHOR74
+	str	wzr, [x3, #:lo12:.LANCHOR74]
+	.loc 2 1441 0
+	adrp	x3, .LANCHOR77
+	str	wzr, [x3, #:lo12:.LANCHOR77]
+	.loc 2 1442 0
+	adrp	x3, .LANCHOR66
+	str	wzr, [x3, #:lo12:.LANCHOR66]
+	.loc 2 1444 0
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR71
+	ldr	w5, [x1, #:lo12:.LANCHOR71]
+	cmp	w3, w5
+	bls	.L1591
+	.loc 2 1445 0
+	str	w3, [x1, #:lo12:.LANCHOR71]
+.L1591:
+	.loc 2 1447 0
+	add	x19, x19, :lo12:.LANCHOR79
+	adrp	x1, .LANCHOR72
+	ldr	w3, [x1, #:lo12:.LANCHOR72]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L1592
+	.loc 2 1448 0
+	str	w2, [x1, #:lo12:.LANCHOR72]
+.L1592:
+	.loc 2 1450 0
+	mov	w1, 65535
+	cmp	w6, w1
+	beq	.L1593
+	.loc 2 1451 0
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	make_superblock
+.LVL2086:
+.L1593:
+	.loc 2 1453 0
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR52
+	cmp	w2, w1
+	beq	.L1594
+	.loc 2 1454 0
+	bl	make_superblock
+.LVL2087:
+.L1594:
+	.loc 2 1456 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR53
+	cmp	w2, w1
+	beq	.L1595
+	.loc 2 1457 0
+	bl	make_superblock
+.LVL2088:
+.L1595:
+	.loc 2 1459 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR82
+	cmp	w2, w1
+	beq	.L1596
+	.loc 2 1460 0
+	bl	make_superblock
+.LVL2089:
+.L1596:
+	.loc 2 1462 0
+	mov	w0, 0
+	b	.L1580
+.LVL2090:
+.L1586:
+	.loc 2 1376 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR81]
+	.loc 2 1378 0
+	mov	w2, 1
+	mov	w1, w2
+	.loc 2 1376 0
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x21, 4]
+	.loc 2 1377 0
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	str	x0, [x21, 8]
+	.loc 2 1378 0
+	mov	x0, x21
+	bl	FlashReadPages
+.LVL2091:
+	.loc 2 1381 0
+	ldr	w0, [x21]
+	cmn	w0, #1
+	beq	.L1584
+	.loc 2 1382 0 discriminator 1
+	ldr	x0, [x23, #:lo12:.LANCHOR39]
+	.loc 2 1381 0 discriminator 1
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1584
+	.loc 2 1383 0
+	ldr	x0, [x26, #:lo12:.LANCHOR109]
+	ldrh	w0, [x0]
+	.loc 2 1382 0
+	cmp	w0, w28
+	beq	.L1585
+.L1584:
+	sub	w22, w22, #1
+.LVL2092:
+	sxth	w22, w22
+.LVL2093:
+	b	.L1583
+	.cfi_endproc
+.LFE274:
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+.LFB292:
+	.loc 2 2306 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -64]!
+	.cfi_def_cfa_offset 64
+	.cfi_offset 29, -64
+	.cfi_offset 30, -56
+	.loc 2 2312 0
+	adrp	x0, .LANCHOR4
+	.loc 2 2306 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	.loc 2 2312 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	.loc 2 2306 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -48
+	.cfi_offset 20, -40
+	.loc 2 2310 0
+	adrp	x20, .LANCHOR162
+	.loc 2 2306 0
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 21, -32
+	.cfi_offset 22, -24
+	.cfi_offset 23, -16
+	.cfi_offset 24, -8
+	.loc 2 2310 0
+	strh	wzr, [x20, #:lo12:.LANCHOR162]
+	.loc 2 2312 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2094:
+	.loc 2 2313 0
+	bl	FtlScanSysBlk
+.LVL2095:
+	.loc 2 2314 0
+	adrp	x0, .LANCHOR81
+	ldrh	w1, [x0, #:lo12:.LANCHOR81]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1603
+.L1605:
+	.loc 2 2315 0
+	mov	w23, -1
+.L1602:
+	.loc 2 2398 0
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	.cfi_remember_state
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+.L1603:
+	.cfi_restore_state
+	.loc 2 2317 0
+	bl	FtlLoadSysInfo
+.LVL2096:
+	mov	w23, w0
+	cbnz	w0, .L1605
+	.loc 2 2320 0
+	bl	FtlLoadMapInfo
+.LVL2097:
+	.loc 2 2321 0
+	bl	FtlLoadVonderInfo
+.LVL2098:
+	.loc 2 2322 0
+	bl	Ftl_load_ext_data
+.LVL2099:
+	.loc 2 2324 0
+	bl	FtlLoadEctTbl
+.LVL2100:
+	.loc 2 2325 0
+	bl	FtlFreeSysBLkSort
+.LVL2101:
+	.loc 2 2327 0
+	bl	SupperBlkListInit
+.LVL2102:
+	.loc 2 2328 0
+	bl	FtlPowerLostRecovery
+.LVL2103:
+	.loc 2 2330 0
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+.LVL2104:
+.LBB299:
+.LBB300:
+	.loc 2 2332 0
+	adrp	x0, .LANCHOR33
+	ldrh	w2, [x0, #:lo12:.LANCHOR33]
+	.loc 2 2333 0
+	adrp	x0, .LANCHOR56
+	ldr	x1, [x0, #:lo12:.LANCHOR56]
+	.loc 2 2332 0
+	mov	w0, 0
+	add	x1, x1, 4
+.L1606:
+.LVL2105:
+	cmp	w0, w2
+	bge	.L1611
+	.loc 2 2333 0
+	ldr	w3, [x1], 16
+	tbz	w3, #31, .L1607
+.L1611:
+	.loc 2 2336 0
+	adrp	x19, .LANCHOR79
+	add	x3, x19, :lo12:.LANCHOR79
+	.loc 2 2338 0
+	cmp	w0, w2
+	adrp	x22, .LANCHOR51
+	.loc 2 2336 0
+	ldrh	w1, [x3, 28]
+	add	w1, w1, 1
+	strh	w1, [x3, 28]
+	.loc 2 2338 0
+	bge	.L1617
+.LVL2106:
+.L1608:
+	.loc 2 2339 0
+	add	x21, x22, :lo12:.LANCHOR51
+	.loc 2 2340 0
+	adrp	x24, .LANCHOR52
+	.loc 2 2339 0
+	mov	x0, x21
+	.loc 2 2340 0
+	add	x20, x24, :lo12:.LANCHOR52
+	.loc 2 2339 0
+	bl	FtlSuperblockPowerLostFix
+.LVL2107:
+	.loc 2 2340 0
+	mov	x0, x20
+	bl	FtlSuperblockPowerLostFix
+.LVL2108:
+.LBB301:
+	.loc 2 2346 0
+	adrp	x0, .LANCHOR43
+	ldrh	w3, [x21, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR43]
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	.loc 2 2347 0
+	adrp	x3, .LANCHOR19
+	.loc 2 2346 0
+	strh	w2, [x1, x0]
+	.loc 2 2348 0
+	strb	wzr, [x21, 6]
+	.loc 2 2347 0
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x21, 2]
+	.loc 2 2352 0
+	ldrh	w0, [x24, #:lo12:.LANCHOR52]
+	.loc 2 2349 0
+	strh	wzr, [x21, 4]
+.LVL2109:
+	.loc 2 2352 0
+	ldrh	w4, [x20, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	.loc 2 2354 0
+	strb	wzr, [x20, 6]
+	.loc 2 2353 0
+	ldrh	w0, [x3, #:lo12:.LANCHOR19]
+	strh	w0, [x20, 2]
+	.loc 2 2355 0
+	strh	wzr, [x20, 4]
+.LBE301:
+	.loc 2 2359 0
+	adrp	x0, .LANCHOR144
+	add	x0, x0, :lo12:.LANCHOR144
+	bl	FtlMapBlkWriteDump_data
+.LVL2110:
+	.loc 2 2360 0
+	adrp	x0, .LANCHOR149
+	add	x0, x0, :lo12:.LANCHOR149
+	bl	FtlMapBlkWriteDump_data
+.LVL2111:
+	.loc 2 2372 0
+	add	x1, x19, :lo12:.LANCHOR79
+	ldrh	w0, [x1, 30]
+	add	w0, w0, 1
+	strh	w0, [x1, 30]
+	.loc 2 2373 0
+	bl	l2p_flush
+.LVL2112:
+	.loc 2 2374 0
+	bl	FtlVpcTblFlush
+.LVL2113:
+	.loc 2 2375 0
+	bl	FtlVpcTblFlush
+.LVL2114:
+	b	.L1612
+.LVL2115:
+.L1607:
+	.loc 2 2332 0
+	add	w0, w0, 1
+.LVL2116:
+	b	.L1606
+.L1617:
+	.loc 2 2338 0
+	ldrh	w0, [x20, #:lo12:.LANCHOR162]
+.LVL2117:
+	cbnz	w0, .L1608
+.L1612:
+	.loc 2 2379 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR51]
+	mov	w1, 65535
+	add	x21, x22, :lo12:.LANCHOR51
+	cmp	w0, w1
+	beq	.L1613
+	ldrh	w1, [x21, 4]
+	cbnz	w1, .L1613
+	.loc 2 2381 0
+	adrp	x22, .LANCHOR52
+	add	x20, x22, :lo12:.LANCHOR52
+	.loc 2 2380 0
+	ldrh	w1, [x20, 4]
+	cbnz	w1, .L1613
+	.loc 2 2382 0
+	bl	FtlGcRefreshBlock
+.LVL2118:
+	.loc 2 2383 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR52]
+	bl	FtlGcRefreshBlock
+.LVL2119:
+	.loc 2 2384 0
+	mov	x0, x21
+	bl	allocate_new_data_superblock
+.LVL2120:
+	.loc 2 2385 0
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+.LVL2121:
+.L1613:
+	.loc 2 2390 0
+	add	x19, x19, :lo12:.LANCHOR79
+	ldrh	w0, [x19, 28]
+	tst	x0, 31
+	bne	.L1602
+	.loc 2 2391 0
+	bl	FtlVpcCheckAndModify
+.LVL2122:
+	b	.L1602
+.LBE300:
+.LBE299:
+	.cfi_endproc
+.LFE292:
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+.LFB210:
+	.loc 3 623 0
+	.cfi_startproc
+	stp	x29, x30, [sp, -80]!
+	.cfi_def_cfa_offset 80
+	.cfi_offset 29, -80
+	.cfi_offset 30, -72
+	.loc 3 630 0
+	adrp	x0, .LANCHOR72
+	.loc 3 623 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	stp	x23, x24, [sp, 48]
+	.cfi_offset 23, -32
+	.cfi_offset 24, -24
+	.loc 3 631 0
+	adrp	x24, .LANCHOR4
+	.loc 3 630 0
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+	.loc 3 631 0
+	ldrh	w0, [x24, #:lo12:.LANCHOR4]
+	.loc 3 623 0
+	stp	x19, x20, [sp, 16]
+	.cfi_offset 19, -64
+	.cfi_offset 20, -56
+	.loc 3 629 0
+	adrp	x20, .LANCHOR71
+	.loc 3 623 0
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	.cfi_offset 21, -48
+	.cfi_offset 22, -40
+	.cfi_offset 25, -16
+	.cfi_offset 26, -8
+	.loc 3 629 0
+	str	wzr, [x20, #:lo12:.LANCHOR71]
+	.loc 3 631 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2123:
+	.loc 3 632 0
+	bl	FtlLoadBbt
+.LVL2124:
+	cbz	w0, .L1620
+	.loc 3 633 0
+	bl	FtlMakeBbt
+.LVL2125:
+.L1620:
+	.loc 3 635 0 discriminator 1
+	adrp	x23, .LANCHOR12
+	.loc 3 636 0 discriminator 1
+	adrp	x0, .LANCHOR116
+	.loc 3 637 0 discriminator 1
+	mov	w6, 23752
+	.loc 3 635 0 discriminator 1
+	ldrh	w1, [x23, #:lo12:.LANCHOR12]
+	.loc 3 637 0 discriminator 1
+	movk	w6, 0xa0f, lsl 16
+	.loc 3 636 0 discriminator 1
+	ldr	x4, [x0, #:lo12:.LANCHOR116]
+	.loc 3 637 0 discriminator 1
+	adrp	x0, .LANCHOR114
+	.loc 3 635 0 discriminator 1
+	lsl	w1, w1, 7
+	.loc 3 637 0 discriminator 1
+	ldr	x5, [x0, #:lo12:.LANCHOR114]
+	mov	w0, 0
+.L1621:
+.LVL2126:
+	.loc 3 635 0 discriminator 1
+	cmp	w0, w1
+	blt	.L1622
+.LVL2127:
+	.loc 3 642 0
+	adrp	x21, .LANCHOR5
+	adrp	x22, .LANCHOR6
+	add	x26, x22, :lo12:.LANCHOR6
+	.loc 3 641 0
+	mov	w19, 0
+	.loc 3 642 0
+	ldrh	w25, [x21, #:lo12:.LANCHOR5]
+.LVL2128:
+.L1623:
+	.loc 3 642 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x26]
+	cmp	w0, w25
+	bhi	.L1624
+	.loc 3 645 0 is_stmt 1
+	adrp	x25, .LANCHOR3
+.LVL2129:
+	sub	w1, w19, #2
+	ldrh	w0, [x25, #:lo12:.LANCHOR3]
+	cmp	w1, w0, lsl 1
+	bgt	.L1625
+.LVL2130:
+.L1629:
+	.loc 3 656 0
+	add	x26, x21, :lo12:.LANCHOR5
+	.loc 3 641 0
+	mov	w19, 0
+	mov	w24, 0
+.L1626:
+.LVL2131:
+	.loc 3 656 0 discriminator 1
+	ldrh	w0, [x26]
+	cmp	w0, w24
+	bhi	.L1630
+	.loc 3 658 0
+	adrp	x0, .LANCHOR113
+	ldrh	w1, [x22, #:lo12:.LANCHOR6]
+	.loc 3 661 0
+	ldrh	w4, [x25, #:lo12:.LANCHOR3]
+	.loc 3 662 0
+	adrp	x2, .LANCHOR80
+	.loc 3 658 0
+	str	w1, [x0, #:lo12:.LANCHOR113]
+	.loc 3 661 0
+	adrp	x0, .LANCHOR7
+	adrp	x3, .LANCHOR62
+	ldr	w1, [x0, #:lo12:.LANCHOR7]
+	udiv	w5, w1, w4
+	.loc 3 662 0
+	ubfx	x0, x5, 5, 16
+	.loc 3 661 0
+	str	w5, [x3, #:lo12:.LANCHOR62]
+	.loc 3 662 0
+	add	w6, w0, 36
+	strh	w6, [x2, #:lo12:.LANCHOR80]
+	.loc 3 663 0
+	mov	w6, 24
+	mul	w6, w4, w6
+	cmp	w19, w6
+	ble	.L1631
+	.loc 3 664 0
+	sub	w1, w1, w19
+	udiv	w1, w1, w4
+	str	w1, [x3, #:lo12:.LANCHOR62]
+	.loc 3 665 0
+	lsr	w1, w1, 5
+	add	w1, w1, 24
+	strh	w1, [x2, #:lo12:.LANCHOR80]
+.L1631:
+	.loc 3 668 0
+	adrp	x1, .LANCHOR15
+	ldrh	w1, [x1, #:lo12:.LANCHOR15]
+	cbz	w1, .L1633
+	.loc 3 669 0
+	ldrh	w6, [x2, #:lo12:.LANCHOR80]
+	add	w6, w6, w1, lsr 1
+	strh	w6, [x2, #:lo12:.LANCHOR80]
+	.loc 3 670 0
+	mul	w6, w1, w4
+	cmp	w19, w6
+	bge	.L1633
+	.loc 3 672 0
+	add	w1, w1, 32
+	.loc 3 671 0
+	str	w5, [x3, #:lo12:.LANCHOR62]
+	.loc 3 672 0
+	add	w1, w0, w1
+	strh	w1, [x2, #:lo12:.LANCHOR80]
+.L1633:
+	.loc 3 677 0
+	ldrh	w1, [x2, #:lo12:.LANCHOR80]
+	adrp	x25, .LANCHOR182
+	ldr	w0, [x3, #:lo12:.LANCHOR62]
+	.loc 3 687 0
+	adrp	x24, .LANCHOR43
+.LVL2132:
+	.loc 3 677 0
+	sub	w0, w0, w1
+	.loc 3 678 0
+	adrp	x1, .LANCHOR19
+	ldrh	w1, [x1, #:lo12:.LANCHOR19]
+	.loc 3 677 0
+	mul	w0, w0, w4
+	str	w0, [x25, #:lo12:.LANCHOR182]
+	.loc 3 678 0
+	mul	w0, w1, w0
+	.loc 3 679 0
+	ldrh	w1, [x23, #:lo12:.LANCHOR12]
+	.loc 3 678 0
+	str	w0, [x3, #:lo12:.LANCHOR62]
+	.loc 3 689 0
+	mov	w23, -1
+	.loc 3 679 0
+	mul	w0, w1, w0
+	adrp	x1, .LANCHOR34
+	str	w0, [x1, #:lo12:.LANCHOR34]
+	.loc 3 684 0
+	bl	FtlBbmTblFlush
+.LVL2133:
+	.loc 3 687 0
+	ldr	x0, [x24, #:lo12:.LANCHOR43]
+	mov	w1, 0
+	ldrh	w2, [x22, #:lo12:.LANCHOR6]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+.LVL2134:
+	.loc 3 688 0
+	adrp	x0, .LANCHOR60
+	.loc 3 689 0
+	adrp	x1, .LANCHOR82
+	.loc 3 698 0
+	ldrh	w2, [x21, #:lo12:.LANCHOR5]
+	.loc 3 688 0
+	str	wzr, [x0, #:lo12:.LANCHOR60]
+	.loc 3 689 0
+	add	x0, x1, :lo12:.LANCHOR82
+	strh	w23, [x1, #:lo12:.LANCHOR82]
+	.loc 3 698 0
+	mov	w1, 255
+	lsr	w2, w2, 3
+	.loc 3 690 0
+	strh	wzr, [x0, 2]
+	.loc 3 691 0
+	strb	wzr, [x0, 6]
+	.loc 3 692 0
+	strb	wzr, [x0, 8]
+	.loc 3 694 0
+	adrp	x0, .LANCHOR51
+	add	x19, x0, :lo12:.LANCHOR51
+.LVL2135:
+	.loc 3 696 0
+	strh	wzr, [x0, #:lo12:.LANCHOR51]
+	.loc 3 697 0
+	mov	w0, 1
+	strb	w0, [x19, 8]
+	.loc 3 698 0
+	adrp	x0, .LANCHOR1
+	.loc 3 694 0
+	strh	wzr, [x19, 2]
+	.loc 3 698 0
+	ldr	x0, [x0, #:lo12:.LANCHOR1]
+	.loc 3 695 0
+	strb	wzr, [x19, 6]
+	.loc 3 698 0
+	bl	ftl_memset
+.LVL2136:
+.L1635:
+	.loc 3 701 0
+	mov	x0, x19
+	bl	make_superblock
+.LVL2137:
+	.loc 3 702 0
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L1636
+	.loc 3 705 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	.loc 3 706 0
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	.loc 3 707 0
+	b	.L1635
+.LVL2138:
+.L1622:
+	.loc 3 636 0 discriminator 3
+	ubfiz	x3, x0, 2, 16
+	mvn	w2, w0
+	orr	w2, w0, w2, lsl 16
+	.loc 3 635 0 discriminator 3
+	add	w0, w0, 1
+.LVL2139:
+	and	w0, w0, 65535
+.LVL2140:
+	.loc 3 636 0 discriminator 3
+	str	w2, [x4, x3]
+	.loc 3 637 0 discriminator 3
+	str	w6, [x5, x3]
+	b	.L1621
+.LVL2141:
+.L1624:
+	.loc 3 643 0 discriminator 3
+	mov	w0, w25
+	mov	w1, 1
+	.loc 3 642 0 discriminator 3
+	add	w25, w25, 1
+.LVL2142:
+	.loc 3 643 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2143:
+	add	w19, w19, w0
+.LVL2144:
+	.loc 3 642 0 discriminator 3
+	and	w25, w25, 65535
+	.loc 3 643 0 discriminator 3
+	and	w19, w19, 65535
+.LVL2145:
+	b	.L1623
+.LVL2146:
+.L1625:
+	.loc 3 647 0
+	udiv	w0, w19, w0
+	adrp	x1, .LANCHOR31
+	ldr	w19, [x1, #:lo12:.LANCHOR31]
+.LVL2147:
+	add	w0, w0, w19
+	bl	FtlSysBlkNumInit
+.LVL2148:
+	.loc 3 648 0
+	ldrh	w0, [x24, #:lo12:.LANCHOR4]
+	.loc 3 650 0
+	add	x24, x22, :lo12:.LANCHOR6
+	.loc 3 648 0
+	bl	FtlFreeSysBlkQueueInit
+.LVL2149:
+	.loc 3 650 0
+	ldrh	w19, [x21, #:lo12:.LANCHOR5]
+.LVL2150:
+.L1627:
+	.loc 3 650 0 is_stmt 0 discriminator 1
+	ldrh	w0, [x24]
+	cmp	w0, w19
+	bls	.L1629
+	.loc 3 651 0 is_stmt 1 discriminator 3
+	mov	w0, w19
+	.loc 3 650 0 discriminator 3
+	add	w19, w19, 1
+.LVL2151:
+	.loc 3 651 0 discriminator 3
+	mov	w1, 1
+	.loc 3 650 0 discriminator 3
+	and	w19, w19, 65535
+	.loc 3 651 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2152:
+	b	.L1627
+.LVL2153:
+.L1630:
+	.loc 3 657 0 discriminator 3
+	mov	w0, w24
+	mov	w1, 0
+	.loc 3 656 0 discriminator 3
+	add	w24, w24, 1
+.LVL2154:
+	.loc 3 657 0 discriminator 3
+	bl	FtlLowFormatEraseBlock
+.LVL2155:
+	add	w19, w19, w0
+.LVL2156:
+	.loc 3 656 0 discriminator 3
+	and	w24, w24, 65535
+	.loc 3 657 0 discriminator 3
+	and	w19, w19, 65535
+.LVL2157:
+	b	.L1626
+.LVL2158:
+.L1636:
+	.loc 3 709 0
+	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 710 0
+	ubfiz	x0, x0, 1, 16
+	.loc 3 709 0
+	str	w1, [x19, 12]
+	.loc 3 721 0
+	mov	w23, -1
+	.loc 3 709 0
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 710 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	.loc 3 712 0
+	adrp	x2, .LANCHOR52
+	add	x0, x2, :lo12:.LANCHOR52
+	.loc 3 714 0
+	ldrh	w1, [x19]
+	.loc 3 717 0
+	mov	x19, x0
+	.loc 3 714 0
+	add	w1, w1, 1
+	.loc 3 712 0
+	strh	wzr, [x0, 2]
+	.loc 3 714 0
+	strh	w1, [x2, #:lo12:.LANCHOR52]
+	.loc 3 715 0
+	mov	w1, 1
+	.loc 3 713 0
+	strb	wzr, [x0, 6]
+	.loc 3 715 0
+	strb	w1, [x0, 8]
+.L1637:
+	.loc 3 717 0
+	mov	x0, x19
+	bl	make_superblock
+.LVL2159:
+	.loc 3 718 0
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L1638
+	.loc 3 721 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	.loc 3 722 0
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	.loc 3 723 0
+	b	.L1637
+.L1638:
+	.loc 3 725 0
+	ldr	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 726 0
+	ubfiz	x0, x0, 1, 16
+	.loc 3 725 0
+	str	w1, [x19, 12]
+	.loc 3 727 0
+	mov	w4, -1
+	.loc 3 725 0
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR71]
+	.loc 3 726 0
+	ldr	x1, [x24, #:lo12:.LANCHOR43]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	.loc 3 727 0
+	adrp	x0, .LANCHOR53
+	strh	w4, [x0, #:lo12:.LANCHOR53]
+	.loc 3 730 0
+	bl	FtlFreeSysBlkQueueOut
+.LVL2160:
+	adrp	x2, .LANCHOR81
+	add	x1, x2, :lo12:.LANCHOR81
+	strh	w0, [x2, #:lo12:.LANCHOR81]
+	.loc 3 733 0
+	ldr	w0, [x25, #:lo12:.LANCHOR182]
+	strh	w0, [x1, 6]
+	.loc 3 734 0
+	ldr	w0, [x20, #:lo12:.LANCHOR71]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	.loc 3 731 0
+	strh	wzr, [x1, 2]
+	.loc 3 732 0
+	strh	w4, [x1, 4]
+	.loc 3 734 0
+	str	w0, [x20, #:lo12:.LANCHOR71]
+	.loc 3 735 0
+	bl	FtlVpcTblFlush
+.LVL2161:
+	.loc 3 736 0
+	bl	FtlSysBlkInit
+.LVL2162:
+	cbnz	w0, .L1639
+	.loc 3 737 0
+	adrp	x0, .LANCHOR88
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR88]
+.L1639:
+	.loc 3 739 0
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 25
+	.cfi_restore 26
+	.cfi_restore 23
+	.cfi_restore 24
+	.cfi_restore 21
+	.cfi_restore 22
+	.cfi_restore 19
+	.cfi_restore 20
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE210:
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.sftl_init,"ax",@progbits
+	.align	2
+	.global	sftl_init
+	.type	sftl_init, %function
+sftl_init:
+.LFB211:
+	.loc 3 743 0
+	.cfi_startproc
+.LVL2163:
+	stp	x29, x30, [sp, -32]!
+	.cfi_def_cfa_offset 32
+	.cfi_offset 29, -32
+	.cfi_offset 30, -24
+	.loc 3 749 0
+	adrp	x1, .LC70
+	add	x1, x1, :lo12:.LC70
+	.loc 3 746 0
+	mov	w0, -1
+	.loc 3 743 0
+	add	x29, sp, 0
+	.cfi_def_cfa_register 29
+	str	x19, [sp, 16]
+	.cfi_offset 19, -16
+	.loc 3 746 0
+	adrp	x19, .LANCHOR88
+	str	w0, [x19, #:lo12:.LANCHOR88]
+	.loc 3 749 0
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+.LVL2164:
+	.loc 3 750 0
+	adrp	x0, .LANCHOR0
+	add	x0, x0, :lo12:.LANCHOR0
+	bl	FtlConstantsInit
+.LVL2165:
+	.loc 3 751 0
+	bl	FtlMemInit
+.LVL2166:
+	.loc 3 752 0
+	bl	FtlVariablesInit
+.LVL2167:
+	.loc 3 753 0
+	adrp	x0, .LANCHOR4
+	ldrh	w0, [x0, #:lo12:.LANCHOR4]
+	bl	FtlFreeSysBlkQueueInit
+.LVL2168:
+.LDL2:
+	.loc 3 756 0
+	bl	FtlLoadBbt
+.LVL2169:
+	cbnz	w0, .L1648
+	.loc 3 767 0
+	bl	FtlSysBlkInit
+.LVL2170:
+	cbnz	w0, .L1648
+	.loc 3 779 0
+	mov	w0, 1
+	str	w0, [x19, #:lo12:.LANCHOR88]
+	.loc 3 783 0
+	adrp	x0, .LANCHOR48
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	cmp	w0, 15
+	bhi	.L1648
+	mov	w19, 8129
+.L1647:
+.LVL2171:
+.LBB302:
+	.loc 3 786 0 discriminator 3
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.LVL2172:
+	.loc 3 785 0 discriminator 3
+	subs	w19, w19, #1
+.LVL2173:
+	bne	.L1647
+.LVL2174:
+.L1648:
+.LBE302:
+	.loc 3 794 0
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	.cfi_restore 30
+	.cfi_restore 29
+	.cfi_restore 19
+	.cfi_def_cfa 31, 0
+	ret
+	.cfi_endproc
+.LFE211:
+	.size	sftl_init, .-sftl_init
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+.LFB347:
+	.loc 1 248 0
+	.cfi_startproc
+.LVL2175:
+	.loc 1 249 0
+	uxtw	x2, w2
+	b	memcmp
+.LVL2176:
+	.cfi_endproc
+.LFE347:
+	.size	ftl_memcmp, .-ftl_memcmp
+	.global	ftl_temp_buf
+	.global	g_nand_ops
+	.global	g_nand_phy_info
+	.global	gc_ink_free_return_value
+	.global	check_vpc_table
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.section	.bss.DeviceCapacity,"aw",@nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.zero	4
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
+	.align	1
+	.set	.LANCHOR59,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.zero	2
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.zero	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR6,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR17,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR18,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
+	.align	1
+	.set	.LANCHOR24,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR23,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR5,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR80,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR10,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR15,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR31,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR33,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR29,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR32,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR7,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR4,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR27,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR19,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR20,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR21,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR3,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR11,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR25,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR12,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR22,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR2,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR8,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_type,"aw",@nobits
+	.align	1
+	.set	.LANCHOR9,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.zero	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR28,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.zero	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR16,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.zero	2
+	.section	.bss.c_gc_page_buf_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.zero	4
+	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR14,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.zero	2
+	.section	.bss.check_buf,"aw",@nobits
+	.align	3
+	.type	check_buf, %object
+	.size	check_buf, 4096
+check_buf:
+	.zero	4096
+	.section	.bss.check_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR111,. + 0
+	.type	check_spare_buf, %object
+	.size	check_spare_buf, 512
+check_spare_buf:
+	.zero	512
+	.section	.bss.check_vpc_table,"aw",@nobits
+	.align	3
+	.type	check_vpc_table, %object
+	.size	check_vpc_table, 16384
+check_vpc_table:
+	.zero	16384
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.zero	4
+	.section	.bss.ftl_temp_buf,"aw",@nobits
+	.align	3
+	.type	ftl_temp_buf, %object
+	.size	ftl_temp_buf, 4096
+ftl_temp_buf:
+	.zero	4096
+	.section	.bss.gBbtInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR37,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 96
+gBbtInfo:
+	.zero	96
+	.section	.bss.gL2pMapInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR144,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 64
+gL2pMapInfo:
+	.zero	64
+	.section	.bss.gSysFreeQueue,"aw",@nobits
+	.align	3
+	.set	.LANCHOR38,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.zero	2056
+	.section	.bss.gSysInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR81,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.zero	12
+	.section	.bss.gVendorBlkInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR149,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 64
+gVendorBlkInfo:
+	.zero	64
+	.section	.bss.g_GlobalDataVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.zero	4
+	.section	.bss.g_GlobalSysVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR71,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.zero	4
+	.section	.bss.g_MaxLbaSector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.zero	4
+	.section	.bss.g_MaxLbn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR182,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.zero	4
+	.section	.bss.g_MaxLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR62,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.zero	4
+	.section	.bss.g_VaildLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR60,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.zero	4
+	.section	.bss.g_active_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR51,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.zero	48
+	.section	.bss.g_buffer_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR52,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.zero	48
+	.section	.bss.g_cur_erase_blk,"aw",@nobits
+	.align	2
+	.set	.LANCHOR113,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.zero	4
+	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.zero	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
+	.align	1
+	.set	.LANCHOR166,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.zero	2
+	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR178,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.zero	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR103,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR104,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.zero	34
+	.section	.bss.g_gc_blk_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.zero	2
+	.section	.bss.g_gc_blk_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_head_data_block,"aw",@nobits
+	.align	2
+	.set	.LANCHOR118,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.zero	4
+	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR119,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.zero	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_next_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.zero	2
+	.section	.bss.g_gc_next_blk_1,"aw",@nobits
+	.align	1
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.zero	2
+	.section	.bss.g_gc_num_req,"aw",@nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.zero	4
+	.section	.bss.g_gc_page_offset,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.zero	2
+	.section	.bss.g_gc_skip_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR86,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.zero	4
+	.section	.bss.g_gc_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR82,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.zero	48
+	.section	.bss.g_gc_temp_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR53,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.zero	48
+	.section	.bss.g_in_gc_progress,"aw",@nobits
+	.align	2
+	.set	.LANCHOR117,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.zero	4
+	.section	.bss.g_in_swl_replace,"aw",@nobits
+	.align	2
+	.set	.LANCHOR89,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.zero	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.zero	2
+	.section	.bss.g_max_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR77,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.zero	4
+	.section	.bss.g_min_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.zero	4
+	.section	.bss.g_nand_ops,"aw",@nobits
+	.align	3
+	.set	.LANCHOR107,. + 0
+	.type	g_nand_ops, %object
+	.size	g_nand_ops, 32
+g_nand_ops:
+	.zero	32
+	.section	.bss.g_nand_phy_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	g_nand_phy_info, %object
+	.size	g_nand_phy_info, 24
+g_nand_phy_info:
+	.zero	24
+	.section	.bss.g_num_data_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR45,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.zero	2
+	.section	.bss.g_num_free_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.zero	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
+	.align	1
+	.set	.LANCHOR162,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.zero	2
+	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.zero	4
+	.section	.bss.g_recovery_page_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.zero	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR164,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.zero	128
+	.section	.bss.g_req_cache,"aw",@nobits
+	.align	3
+	.set	.LANCHOR150,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 8
+g_req_cache:
+	.zero	8
+	.section	.bss.g_sys_ext_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR83,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.zero	512
+	.section	.bss.g_sys_save_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR79,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.zero	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR151,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.zero	2
+	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.zero	4
+	.section	.bss.g_totle_cache_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR66,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.zero	4
+	.section	.bss.g_totle_discard_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR64,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.zero	4
+	.section	.bss.g_totle_gc_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR68,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.zero	4
+	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR67,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.zero	4
+	.section	.bss.g_totle_map_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR147,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.zero	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_read_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.zero	4
+	.section	.bss.g_totle_read_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR70,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.zero	4
+	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR74,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_swl_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.zero	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR76,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_vendor_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR35,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.zero	2
+	.section	.bss.g_totle_write_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.zero	4
+	.section	.bss.g_totle_write_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.zero	4
+	.section	.bss.gc_discard_updated,"aw",@nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.zero	4
+	.section	.bss.gc_ink_free_return_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.zero	2
+	.section	.bss.gp_ect_tbl_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR127,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 8
+gp_ect_tbl_info:
+	.zero	8
+	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR92,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 8
+gp_gc_page_buf_info:
+	.zero	8
+	.section	.bss.gp_last_act_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR171,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 8
+gp_last_act_superblock:
+	.zero	8
+	.section	.bss.p_blk_mode_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 8
+p_blk_mode_table:
+	.zero	8
+	.section	.bss.p_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR42,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 8
+p_data_block_list_head:
+	.zero	8
+	.section	.bss.p_data_block_list_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR41,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 8
+p_data_block_list_table:
+	.zero	8
+	.section	.bss.p_data_block_list_tail,"aw",@nobits
+	.align	3
+	.set	.LANCHOR44,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 8
+p_data_block_list_tail:
+	.zero	8
+	.section	.bss.p_erase_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR40,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 8
+p_erase_count_table:
+	.zero	8
+	.section	.bss.p_free_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR47,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 8
+p_free_data_block_list_head:
+	.zero	8
+	.section	.bss.p_gc_blk_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR98,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 8
+p_gc_blk_tbl:
+	.zero	8
+	.section	.bss.p_gc_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR93,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 8
+p_gc_data_buf:
+	.zero	8
+	.section	.bss.p_gc_page_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR100,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 8
+p_gc_page_info:
+	.zero	8
+	.section	.bss.p_gc_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR94,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 8
+p_gc_spare_buf:
+	.zero	8
+	.section	.bss.p_io_data_buf_0,"aw",@nobits
+	.align	3
+	.set	.LANCHOR116,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 8
+p_io_data_buf_0:
+	.zero	8
+	.section	.bss.p_io_data_buf_1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR114,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 8
+p_io_data_buf_1:
+	.zero	8
+	.section	.bss.p_io_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR115,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 8
+p_io_spare_buf:
+	.zero	8
+	.section	.bss.p_l2p_map_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR136,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 8
+p_l2p_map_buf:
+	.zero	8
+	.section	.bss.p_l2p_ram_map,"aw",@nobits
+	.align	3
+	.set	.LANCHOR56,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 8
+p_l2p_ram_map:
+	.zero	8
+	.section	.bss.p_map_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR129,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 8
+p_map_block_table:
+	.zero	8
+	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR130,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 8
+p_map_block_valid_page_count:
+	.zero	8
+	.section	.bss.p_map_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR135,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 8
+p_map_block_ver_table:
+	.zero	8
+	.section	.bss.p_map_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR134,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 8
+p_map_region_ppn_table:
+	.zero	8
+	.section	.bss.p_plane_order_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR13,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.zero	32
+	.section	.bss.p_swl_mul_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR126,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 8
+p_swl_mul_table:
+	.zero	8
+	.section	.bss.p_sys_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR39,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 8
+p_sys_data_buf:
+	.zero	8
+	.section	.bss.p_sys_data_buf_1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR123,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 8
+p_sys_data_buf_1:
+	.zero	8
+	.section	.bss.p_sys_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR109,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 8
+p_sys_spare_buf:
+	.zero	8
+	.section	.bss.p_valid_page_count_check_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR128,. + 0
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 8
+p_valid_page_count_check_table:
+	.zero	8
+	.section	.bss.p_valid_page_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR43,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 8
+p_valid_page_count_table:
+	.zero	8
+	.section	.bss.p_vendor_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR36,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 8
+p_vendor_block_table:
+	.zero	8
+	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR131,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 8
+p_vendor_block_valid_page_count:
+	.zero	8
+	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR132,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 8
+p_vendor_block_ver_table:
+	.zero	8
+	.section	.bss.p_vendor_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR124,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 8
+p_vendor_data_buf:
+	.zero	8
+	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR133,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 8
+p_vendor_region_ppn_table:
+	.zero	8
+	.section	.bss.req_erase,"aw",@nobits
+	.align	3
+	.set	.LANCHOR112,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 8
+req_erase:
+	.zero	8
+	.section	.bss.req_gc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR95,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 8
+req_gc:
+	.zero	8
+	.section	.bss.req_gc_dst,"aw",@nobits
+	.align	3
+	.set	.LANCHOR121,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 8
+req_gc_dst:
+	.zero	8
+	.section	.bss.req_prgm,"aw",@nobits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 8
+req_prgm:
+	.zero	8
+	.section	.bss.req_read,"aw",@nobits
+	.align	3
+	.set	.LANCHOR120,. + 0
+	.type	req_read, %object
+	.size	req_read, 8
+req_read:
+	.zero	8
+	.section	.bss.req_sys,"aw",@nobits
+	.align	3
+	.set	.LANCHOR108,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 32
+req_sys:
+	.zero	32
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
+	.align	1
+	.set	.LANCHOR157,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.hword	-1
+	.section	.data.gFtlInitStatus,"aw",@progbits
+	.align	2
+	.set	.LANCHOR88,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.power_up_flag,"aw",@progbits
+	.align	2
+	.set	.LANCHOR179,. + 0
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.rodata.FlashProgPages.str1.1,"aMS",@progbits,1
+.LC79:
+	.string	"prog read error: = %x\n"
+.LC80:
+	.string	"prog read s error: = %x %x %x\n"
+.LC81:
+	.string	"prog read d error: = %x %x %x\n"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
+.LC94:
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+.LC95:
+	.string	"FtlBbmTblFlush error:%x\n"
+.LC96:
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlGcFreeBadSuperBlk.str1.1,"aMS",@progbits,1
+.LC97:
+	.string	"FtlGcFreeBadSuperBlk 0x%x\n"
+	.section	.rodata.FtlGcMarkBadPhyBlk.str1.1,"aMS",@progbits,1
+.LC74:
+	.string	"FtlGcMarkBadPhyBlk %d 0x%x\n"
+	.section	.rodata.FtlGcRefreshBlock.str1.1,"aMS",@progbits,1
+.LC73:
+	.string	"FtlGcRefreshBlock  0x%x\n"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
+.LC100:
+	.string	"no ect"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
+.LC86:
+	.string	"FtlMapWritePage error = %x \n"
+.LC87:
+	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.section	.rodata.FtlMemInit.str1.1,"aMS",@progbits,1
+.LC82:
+	.string	"%s error allocating memory. return -1\n"
+	.section	.rodata.FtlPrintInfo2buf.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"FLASH INFO:\n"
+.LC3:
+	.string	"Device Capacity: %d MB\n"
+.LC4:
+	.string	"FTL INFO:\n"
+.LC5:
+	.string	"g_MaxLpn = 0x%x\n"
+.LC6:
+	.string	"g_VaildLpn = 0x%x\n"
+.LC7:
+	.string	"read_page_count = 0x%x\n"
+.LC8:
+	.string	"discard_page_count = 0x%x\n"
+.LC9:
+	.string	"write_page_count = 0x%x\n"
+.LC10:
+	.string	"cache_write_count = 0x%x\n"
+.LC11:
+	.string	"l2p_write_count = 0x%x\n"
+.LC12:
+	.string	"gc_page_count = 0x%x\n"
+.LC13:
+	.string	"totle_write = %d MB\n"
+.LC14:
+	.string	"totle_read = %d MB\n"
+.LC15:
+	.string	"GSV = 0x%x\n"
+.LC16:
+	.string	"GDV = 0x%x\n"
+.LC17:
+	.string	"bad blk num = %d\n"
+.LC18:
+	.string	"free_superblocks = 0x%x\n"
+.LC19:
+	.string	"mlc_EC = 0x%x\n"
+.LC20:
+	.string	"slc_EC = 0x%x\n"
+.LC21:
+	.string	"avg_EC = 0x%x\n"
+.LC22:
+	.string	"sys_EC = 0x%x\n"
+.LC23:
+	.string	"max_EC = 0x%x\n"
+.LC24:
+	.string	"min_EC = 0x%x\n"
+.LC25:
+	.string	"PLT = 0x%x\n"
+.LC26:
+	.string	"POT = 0x%x\n"
+.LC27:
+	.string	"MaxSector = 0x%x\n"
+.LC28:
+	.string	"init_sys_blks_pp = 0x%x\n"
+.LC29:
+	.string	"sys_blks_pp = 0x%x\n"
+.LC30:
+	.string	"free sysblock = 0x%x\n"
+.LC31:
+	.string	"data_blks_pp = 0x%x\n"
+.LC32:
+	.string	"data_op_blks_pp = 0x%x\n"
+.LC33:
+	.string	"max_data_blks = 0x%x\n"
+.LC34:
+	.string	"Sys.id = 0x%x\n"
+.LC35:
+	.string	"Bbt.id = 0x%x\n"
+.LC36:
+	.string	"ACT.page = 0x%x\n"
+.LC37:
+	.string	"ACT.plane = 0x%x\n"
+.LC38:
+	.string	"ACT.id = 0x%x\n"
+.LC39:
+	.string	"ACT.mode = 0x%x\n"
+.LC40:
+	.string	"ACT.a_pages = 0x%x\n"
+.LC41:
+	.string	"ACT VPC = 0x%x\n"
+.LC42:
+	.string	"BUF.page = 0x%x\n"
+.LC43:
+	.string	"BUF.plane = 0x%x\n"
+.LC44:
+	.string	"BUF.id = 0x%x\n"
+.LC45:
+	.string	"BUF.mode = 0x%x\n"
+.LC46:
+	.string	"BUF.a_pages = 0x%x\n"
+.LC47:
+	.string	"BUF VPC = 0x%x\n"
+.LC48:
+	.string	"TMP.page = 0x%x\n"
+.LC49:
+	.string	"TMP.plane = 0x%x\n"
+.LC50:
+	.string	"TMP.id = 0x%x\n"
+.LC51:
+	.string	"TMP.mode = 0x%x\n"
+.LC52:
+	.string	"TMP.a_pages = 0x%x\n"
+.LC53:
+	.string	"GC.page = 0x%x\n"
+.LC54:
+	.string	"GC.plane = 0x%x\n"
+.LC55:
+	.string	"GC.id = 0x%x\n"
+.LC56:
+	.string	"GC.mode = 0x%x\n"
+.LC57:
+	.string	"GC.a_pages = 0x%x\n"
+.LC58:
+	.string	"WR_CHK = %x %x %x\n"
+.LC59:
+	.string	"Read Err Cnt = 0x%x\n"
+.LC60:
+	.string	"Prog Err Cnt = 0x%x\n"
+.LC61:
+	.string	"gc_free_blk_th= 0x%x\n"
+.LC62:
+	.string	"gc_merge_free_blk_th= 0x%x\n"
+.LC63:
+	.string	"gc_skip_write_count= 0x%x\n"
+.LC64:
+	.string	"gc_blk_index= 0x%x\n"
+.LC65:
+	.string	"free min EC= 0x%x\n"
+.LC66:
+	.string	"free max EC= 0x%x\n"
+.LC67:
+	.string	"GC__SB VPC = 0x%x\n"
+.LC68:
+	.string	"%d. [0x%x]=0x%x 0x%x  0x%x\n"
+.LC69:
+	.string	"free %d. [0x%x] 0x%x  0x%x\n"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
+.LC103:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
+.LC99:
+	.string	"spuer block %x vpn is 0\n "
+	.section	.rodata.FtlVpcCheckAndModify.str1.1,"aMS",@progbits,1
+.LC102:
+	.string	"FtlCheckVpc %x = %x  %x\n"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
+.LC101:
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlWrite.str1.1,"aMS",@progbits,1
+.LC105:
+	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.GetSwlReplaceBlock.str1.1,"aMS",@progbits,1
+.LC72:
+	.string	"swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x\n"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
+	.section	.rodata.__func__.6105,"a",@progbits
+	.align	3
+	.set	.LANCHOR138,. + 0
+	.type	__func__.6105, %object
+	.size	__func__.6105, 11
+__func__.6105:
+	.string	"FtlMemInit"
+	.section	.rodata.__func__.6229,"a",@progbits
+	.align	3
+	.set	.LANCHOR170,. + 0
+	.type	__func__.6229, %object
+	.size	__func__.6229, 13
+__func__.6229:
+	.string	"FtlProgPages"
+	.section	.rodata.__func__.6257,"a",@progbits
+	.align	3
+	.set	.LANCHOR180,. + 0
+	.type	__func__.6257, %object
+	.size	__func__.6257, 9
+__func__.6257:
+	.string	"FtlWrite"
+	.section	.rodata.__func__.6321,"a",@progbits
+	.align	3
+	.set	.LANCHOR139,. + 0
+	.type	__func__.6321, %object
+	.size	__func__.6321, 14
+__func__.6321:
+	.string	"FtlBbt2Bitmap"
+	.section	.rodata.__func__.6364,"a",@progbits
+	.align	3
+	.set	.LANCHOR165,. + 0
+	.type	__func__.6364, %object
+	.size	__func__.6364, 11
+__func__.6364:
+	.string	"FtlLoadBbt"
+	.section	.rodata.__func__.6487,"a",@progbits
+	.align	3
+	.set	.LANCHOR49,. + 0
+	.type	__func__.6487, %object
+	.size	__func__.6487, 17
+__func__.6487:
+	.string	"INSERT_FREE_LIST"
+	.section	.rodata.__func__.6492,"a",@progbits
+	.align	3
+	.set	.LANCHOR46,. + 0
+	.type	__func__.6492, %object
+	.size	__func__.6492, 17
+__func__.6492:
+	.string	"INSERT_DATA_LIST"
+	.section	.rodata.__func__.6522,"a",@progbits
+	.align	3
+	.set	.LANCHOR50,. + 0
+	.type	__func__.6522, %object
+	.size	__func__.6522, 17
+__func__.6522:
+	.string	"List_remove_node"
+	.section	.rodata.__func__.6554,"a",@progbits
+	.align	3
+	.set	.LANCHOR54,. + 0
+	.type	__func__.6554, %object
+	.size	__func__.6554, 22
+__func__.6554:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.6563,"a",@progbits
+	.align	3
+	.set	.LANCHOR140,. + 0
+	.type	__func__.6563, %object
+	.size	__func__.6563, 16
+__func__.6563:
+	.string	"load_l2p_region"
+	.section	.rodata.__func__.6595,"a",@progbits
+	.align	3
+	.set	.LANCHOR55,. + 0
+	.type	__func__.6595, %object
+	.size	__func__.6595, 26
+__func__.6595:
+	.string	"ftl_map_blk_alloc_new_blk"
+	.section	.rodata.__func__.6606,"a",@progbits
+	.align	3
+	.set	.LANCHOR143,. + 0
+	.type	__func__.6606, %object
+	.size	__func__.6606, 15
+__func__.6606:
+	.string	"ftl_map_blk_gc"
+	.section	.rodata.__func__.6620,"a",@progbits
+	.align	3
+	.set	.LANCHOR141,. + 0
+	.type	__func__.6620, %object
+	.size	__func__.6620, 31
+__func__.6620:
+	.string	"Ftl_write_map_blk_to_last_page"
+	.section	.rodata.__func__.6634,"a",@progbits
+	.align	3
+	.set	.LANCHOR142,. + 0
+	.type	__func__.6634, %object
+	.size	__func__.6634, 16
+__func__.6634:
+	.string	"FtlMapWritePage"
+	.section	.rodata.__func__.6659,"a",@progbits
+	.align	3
+	.set	.LANCHOR58,. + 0
+	.type	__func__.6659, %object
+	.size	__func__.6659, 22
+__func__.6659:
+	.string	"select_l2p_ram_region"
+	.section	.rodata.__func__.6676,"a",@progbits
+	.align	3
+	.set	.LANCHOR145,. + 0
+	.type	__func__.6676, %object
+	.size	__func__.6676, 9
+__func__.6676:
+	.string	"log2phys"
+	.section	.rodata.__func__.6749,"a",@progbits
+	.align	3
+	.set	.LANCHOR167,. + 0
+	.type	__func__.6749, %object
+	.size	__func__.6749, 15
+__func__.6749:
+	.string	"FtlVpcTblFlush"
+	.section	.rodata.__func__.6771,"a",@progbits
+	.align	3
+	.set	.LANCHOR148,. + 0
+	.type	__func__.6771, %object
+	.size	__func__.6771, 14
+__func__.6771:
+	.string	"FtlScanSysBlk"
+	.section	.rodata.__func__.6828,"a",@progbits
+	.align	3
+	.set	.LANCHOR181,. + 0
+	.type	__func__.6828, %object
+	.size	__func__.6828, 15
+__func__.6828:
+	.string	"FtlLoadSysInfo"
+	.section	.rodata.__func__.6891,"a",@progbits
+	.align	3
+	.set	.LANCHOR146,. + 0
+	.type	__func__.6891, %object
+	.size	__func__.6891, 16
+__func__.6891:
+	.string	"FtlReUsePrevPpa"
+	.section	.rodata.__func__.6925,"a",@progbits
+	.align	3
+	.set	.LANCHOR161,. + 0
+	.type	__func__.6925, %object
+	.size	__func__.6925, 22
+__func__.6925:
+	.string	"FtlRecoverySuperblock"
+	.section	.rodata.__func__.6982,"a",@progbits
+	.align	3
+	.set	.LANCHOR61,. + 0
+	.type	__func__.6982, %object
+	.size	__func__.6982, 16
+__func__.6982:
+	.string	"make_superblock"
+	.section	.rodata.__func__.7003,"a",@progbits
+	.align	3
+	.set	.LANCHOR155,. + 0
+	.type	__func__.7003, %object
+	.size	__func__.7003, 18
+__func__.7003:
+	.string	"SupperBlkListInit"
+	.section	.rodata.__func__.7028,"a",@progbits
+	.align	3
+	.set	.LANCHOR168,. + 0
+	.type	__func__.7028, %object
+	.size	__func__.7028, 21
+__func__.7028:
+	.string	"FtlVpcCheckAndModify"
+	.section	.rodata.__func__.7044,"a",@progbits
+	.align	3
+	.set	.LANCHOR156,. + 0
+	.type	__func__.7044, %object
+	.size	__func__.7044, 14
+__func__.7044:
+	.string	"ftl_check_vpc"
+	.section	.rodata.__func__.7128,"a",@progbits
+	.align	3
+	.set	.LANCHOR158,. + 0
+	.type	__func__.7128, %object
+	.size	__func__.7128, 25
+__func__.7128:
+	.string	"allocate_data_superblock"
+	.section	.rodata.__func__.7149,"a",@progbits
+	.align	3
+	.set	.LANCHOR169,. + 0
+	.type	__func__.7149, %object
+	.size	__func__.7149, 29
+__func__.7149:
+	.string	"allocate_new_data_superblock"
+	.section	.rodata.__func__.7156,"a",@progbits
+	.align	3
+	.set	.LANCHOR90,. + 0
+	.type	__func__.7156, %object
+	.size	__func__.7156, 19
+__func__.7156:
+	.string	"get_new_active_ppa"
+	.section	.rodata.__func__.7169,"a",@progbits
+	.align	3
+	.set	.LANCHOR159,. + 0
+	.type	__func__.7169, %object
+	.size	__func__.7169, 16
+__func__.7169:
+	.string	"update_vpc_list"
+	.section	.rodata.__func__.7176,"a",@progbits
+	.align	3
+	.set	.LANCHOR160,. + 0
+	.type	__func__.7176, %object
+	.size	__func__.7176, 20
+__func__.7176:
+	.string	"decrement_vpc_count"
+	.section	.rodata.__func__.7246,"a",@progbits
+	.align	3
+	.set	.LANCHOR173,. + 0
+	.type	__func__.7246, %object
+	.size	__func__.7246, 19
+__func__.7246:
+	.string	"FtlGcFreeTempBlock"
+	.section	.rodata.__func__.7352,"a",@progbits
+	.align	3
+	.set	.LANCHOR177,. + 0
+	.type	__func__.7352, %object
+	.size	__func__.7352, 23
+__func__.7352:
+	.string	"rk_ftl_garbage_collect"
+	.section	.rodata.__func__.7613,"a",@progbits
+	.align	3
+	.set	.LANCHOR106,. + 0
+	.type	__func__.7613, %object
+	.size	__func__.7613, 15
+__func__.7613:
+	.string	"FlashReadPages"
+	.section	.rodata.__func__.7630,"a",@progbits
+	.align	3
+	.set	.LANCHOR110,. + 0
+	.type	__func__.7630, %object
+	.size	__func__.7630, 15
+__func__.7630:
+	.string	"FlashProgPages"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
+.LC98:
+	.string	"decrement_vpc_count %x = %d\n"
+	.section	.rodata.ftl_check_vpc.str1.1,"aMS",@progbits,1
+.LC91:
+	.string	"...%s enter...\n"
+.LC92:
+	.string	"FtlCheckVpc2 %x = %x  %x\n"
+.LC93:
+	.string	"free blk vpc error %x = %x  %x\n"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
+.LC88:
+	.string	"ftl_scan_all_data = %x\n"
+.LC89:
+	.string	"scan lpa = %x ppa= %x\n"
+.LC90:
+	.string	"lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
+.LC83:
+	.string	"region_id = %x phyAddr = %x\n"
+.LC84:
+	.string	"spare:"
+.LC85:
+	.string	"map_ppn:"
+	.section	.rodata.rk_ftl_garbage_collect.str1.1,"aMS",@progbits,1
+.LC104:
+	.string	"SWL %x, FSB = %x vpc= %x,ec=%x th=%x\n"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
+.LC75:
+	.string	"%s 0x%x:"
+.LC76:
+	.string	"%x "
+.LC77:
+	.string	"%02x "
+.LC78:
+	.string	"\n"
+	.section	.rodata.rknand_proc_ftlread.str1.1,"aMS",@progbits,1
+.LC70:
+	.string	"SFTL version: 5.0.43 20180116"
+.LC71:
+	.string	"%s\n"
+	.text
+.Letext0:
+	.file 6 "include/common.h"
+	.file 7 "./arch/arm/include/asm/types.h"
+	.file 8 "include/linux/types.h"
+	.file 9 "include/errno.h"
+	.file 10 "include/linux/string.h"
+	.file 11 "include/efi.h"
+	.file 12 "include/ide.h"
+	.file 13 "include/part.h"
+	.file 14 "include/flash.h"
+	.file 15 "include/lmb.h"
+	.file 16 "include/asm-generic/u-boot.h"
+	.file 17 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 18 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 19 "include/libfdt_env.h"
+	.file 20 "include/image.h"
+	.file 21 "include/net.h"
+	.file 22 "include/dm/uclass-id.h"
+	.file 23 "drivers/rkflash/rksftl/sftl_inc.h"
+	.file 24 "drivers/rkflash/rksftl/flash_com.h"
+	.file 25 "drivers/rkflash/rksftl/sftl_struct.h"
+	.file 26 "drivers/rkflash/rksftl/sftl_global.h"
+	.file 27 "include/malloc.h"
+	.file 28 "include/linux/compat.h"
+	.file 29 "include/stdio.h"
+	.file 30 "include/vsprintf.h"
+	.file 31 "include/log.h"
+	.section	.debug_info,"",@progbits
+.Ldebug_info0:
+	.4byte	0xa8ec
+	.2byte	0x4
+	.4byte	.Ldebug_abbrev0
+	.byte	0x8
+	.uleb128 0x1
+	.4byte	.LASF880
+	.byte	0xc
+	.4byte	.LASF881
+	.4byte	.LASF882
+	.4byte	.Ldebug_ranges0+0x330
+	.8byte	0
+	.4byte	.Ldebug_line0
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x7
+	.4byte	.LASF0
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF1
+	.uleb128 0x3
+	.4byte	.LASF5
+	.byte	0x6
+	.byte	0xd
+	.4byte	0x42
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF2
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF3
+	.uleb128 0x4
+	.4byte	.LASF20
+	.byte	0x9
+	.byte	0xc
+	.4byte	0x5b
+	.uleb128 0x5
+	.byte	0x4
+	.byte	0x5
+	.string	"int"
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x6
+	.4byte	.LASF4
+	.uleb128 0x3
+	.4byte	.LASF6
+	.byte	0x7
+	.byte	0xc
+	.4byte	0x42
+	.uleb128 0x2
+	.byte	0x2
+	.byte	0x5
+	.4byte	.LASF7
+	.uleb128 0x3
+	.4byte	.LASF8
+	.byte	0x7
+	.byte	0x12
+	.4byte	0x30
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF9
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF10
+	.uleb128 0x6
+	.string	"u8"
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x42
+	.uleb128 0x7
+	.4byte	0x94
+	.uleb128 0x6
+	.string	"u16"
+	.byte	0x7
+	.byte	0x22
+	.4byte	0x29
+	.uleb128 0x6
+	.string	"s32"
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x5b
+	.uleb128 0x6
+	.string	"u32"
+	.byte	0x7
+	.byte	0x25
+	.4byte	0x30
+	.uleb128 0x3
+	.4byte	.LASF11
+	.byte	0x7
+	.byte	0x31
+	.4byte	0x8d
+	.uleb128 0x3
+	.4byte	.LASF12
+	.byte	0x7
+	.byte	0x32
+	.4byte	0x8d
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x7
+	.4byte	.LASF13
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xee
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF14
+	.uleb128 0x7
+	.4byte	0xe7
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5
+	.4byte	.LASF15
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xe7
+	.uleb128 0x3
+	.4byte	.LASF16
+	.byte	0x8
+	.byte	0x59
+	.4byte	0x29
+	.uleb128 0x3
+	.4byte	.LASF17
+	.byte	0x8
+	.byte	0x5b
+	.4byte	0x49
+	.uleb128 0x3
+	.4byte	.LASF18
+	.byte	0x8
+	.byte	0x69
+	.4byte	0x69
+	.uleb128 0x3
+	.4byte	.LASF19
+	.byte	0x8
+	.byte	0x97
+	.4byte	0x7b
+	.uleb128 0x9
+	.byte	0x8
+	.uleb128 0x4
+	.4byte	.LASF21
+	.byte	0xa
+	.byte	0xb
+	.4byte	0xfa
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF22
+	.uleb128 0xa
+	.4byte	0xe7
+	.4byte	0x14b
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0xc
+	.4byte	.LASF23
+	.byte	0xb
+	.2byte	0x140
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF24
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0xc
+	.4byte	.LASF25
+	.byte	0xb
+	.2byte	0x143
+	.4byte	0x140
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x175
+	.uleb128 0xd
+	.uleb128 0xa
+	.4byte	0x10b
+	.4byte	0x181
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF26
+	.byte	0xc
+	.byte	0x10
+	.4byte	0x176
+	.uleb128 0xa
+	.4byte	0x42
+	.4byte	0x19c
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x5
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF29
+	.byte	0x10
+	.byte	0xd
+	.byte	0xf
+	.4byte	0x1c1
+	.uleb128 0x10
+	.4byte	.LASF27
+	.byte	0xd
+	.byte	0x10
+	.4byte	0xfa
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF28
+	.byte	0xd
+	.byte	0x11
+	.4byte	0x1da
+	.byte	0x8
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x19c
+	.uleb128 0x11
+	.4byte	0x5b
+	.4byte	0x1da
+	.uleb128 0x12
+	.4byte	0x5b
+	.uleb128 0x12
+	.4byte	0x5b
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1c6
+	.uleb128 0xa
+	.4byte	0x1c1
+	.4byte	0x1eb
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x1e0
+	.uleb128 0x4
+	.4byte	.LASF29
+	.byte	0xd
+	.byte	0xcd
+	.4byte	0x1eb
+	.uleb128 0x13
+	.2byte	0x1218
+	.byte	0xe
+	.byte	0x13
+	.4byte	0x242
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xe
+	.byte	0x14
+	.4byte	0x10b
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF31
+	.byte	0xe
+	.byte	0x15
+	.4byte	0x100
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF32
+	.byte	0xe
+	.byte	0x16
+	.4byte	0x10b
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0xe
+	.byte	0x17
+	.4byte	0x242
+	.byte	0x18
+	.uleb128 0x14
+	.4byte	.LASF34
+	.byte	0xe
+	.byte	0x18
+	.4byte	0x253
+	.2byte	0x1018
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x10b
+	.4byte	0x253
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x37
+	.4byte	0x264
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF35
+	.byte	0xe
+	.byte	0x32
+	.4byte	0x1fb
+	.uleb128 0xa
+	.4byte	0x264
+	.4byte	0x27a
+	.uleb128 0xb
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF36
+	.byte	0xe
+	.byte	0x34
+	.4byte	0x26f
+	.uleb128 0x2
+	.byte	0x10
+	.byte	0x4
+	.4byte	.LASF37
+	.uleb128 0xf
+	.4byte	.LASF38
+	.byte	0x10
+	.byte	0xf
+	.byte	0x10
+	.4byte	0x2b1
+	.uleb128 0x10
+	.4byte	.LASF39
+	.byte	0xf
+	.byte	0x11
+	.4byte	0xc4
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x12
+	.4byte	0xcf
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xa0
+	.byte	0xf
+	.byte	0x15
+	.4byte	0x2e2
+	.uleb128 0x16
+	.string	"cnt"
+	.byte	0xf
+	.byte	0x16
+	.4byte	0x49
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0xf
+	.byte	0x17
+	.4byte	0xcf
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF41
+	.byte	0xf
+	.byte	0x18
+	.4byte	0x2e2
+	.byte	0x10
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x28c
+	.4byte	0x2f2
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x8
+	.byte	0
+	.uleb128 0x17
+	.string	"lmb"
+	.2byte	0x140
+	.byte	0xf
+	.byte	0x1b
+	.4byte	0x318
+	.uleb128 0x10
+	.4byte	.LASF42
+	.byte	0xf
+	.byte	0x1c
+	.4byte	0x2b1
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF43
+	.byte	0xf
+	.byte	0x1d
+	.4byte	0x2b1
+	.byte	0xa0
+	.byte	0
+	.uleb128 0x18
+	.string	"lmb"
+	.byte	0xf
+	.byte	0x20
+	.4byte	0x2f2
+	.uleb128 0x19
+	.byte	0x10
+	.byte	0x10
+	.byte	0x5a
+	.4byte	0x344
+	.uleb128 0x10
+	.4byte	.LASF33
+	.byte	0x10
+	.byte	0x5b
+	.4byte	0xc4
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF30
+	.byte	0x10
+	.byte	0x5c
+	.4byte	0xcf
+	.byte	0x8
+	.byte	0
+	.uleb128 0xf
+	.4byte	.LASF44
+	.byte	0xa8
+	.byte	0x10
+	.byte	0x1b
+	.4byte	0x435
+	.uleb128 0x10
+	.4byte	.LASF45
+	.byte	0x10
+	.byte	0x1c
+	.4byte	0x49
+	.byte	0
+	.uleb128 0x10
+	.4byte	.LASF46
+	.byte	0x10
+	.byte	0x1d
+	.4byte	0xcf
+	.byte	0x8
+	.uleb128 0x10
+	.4byte	.LASF47
+	.byte	0x10
+	.byte	0x1e
+	.4byte	0x49
+	.byte	0x10
+	.uleb128 0x10
+	.4byte	.LASF48
+	.byte	0x10
+	.byte	0x1f
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+	.byte	0x18
+	.uleb128 0x10
+	.4byte	.LASF49
+	.byte	0x10
+	.byte	0x20
+	.4byte	0x49
+	.byte	0x20
+	.uleb128 0x10
+	.4byte	.LASF50
+	.byte	0x10
+	.byte	0x21
+	.4byte	0x49
+	.byte	0x28
+	.uleb128 0x10
+	.4byte	.LASF51
+	.byte	0x10
+	.byte	0x22
+	.4byte	0x49
+	.byte	0x30
+	.uleb128 0x10
+	.4byte	.LASF52
+	.byte	0x10
+	.byte	0x24
+	.4byte	0x49
+	.byte	0x38
+	.uleb128 0x10
+	.4byte	.LASF53
+	.byte	0x10
+	.byte	0x25
+	.4byte	0x49
+	.byte	0x40
+	.uleb128 0x10
+	.4byte	.LASF54
+	.byte	0x10
+	.byte	0x26
+	.4byte	0x49
+	.byte	0x48
+	.uleb128 0x10
+	.4byte	.LASF55
+	.byte	0x10
+	.byte	0x31
+	.4byte	0x49
+	.byte	0x50
+	.uleb128 0x10
+	.4byte	.LASF56
+	.byte	0x10
+	.byte	0x32
+	.4byte	0x49
+	.byte	0x58
+	.uleb128 0x10
+	.4byte	.LASF57
+	.byte	0x10
+	.byte	0x33
+	.4byte	0x18c
+	.byte	0x60
+	.uleb128 0x10
+	.4byte	.LASF58
+	.byte	0x10
+	.byte	0x34
+	.4byte	0x29
+	.byte	0x66
+	.uleb128 0x10
+	.4byte	.LASF59
+	.byte	0x10
+	.byte	0x35
+	.4byte	0x49
+	.byte	0x68
+	.uleb128 0x10
+	.4byte	.LASF60
+	.byte	0x10
+	.byte	0x36
+	.4byte	0x49
+	.byte	0x70
+	.uleb128 0x10
+	.4byte	.LASF61
+	.byte	0x10
+	.byte	0x57
+	.4byte	0x10b
+	.byte	0x78
+	.uleb128 0x10
+	.4byte	.LASF62
+	.byte	0x10
+	.byte	0x58
+	.4byte	0x10b
+	.byte	0x80
+	.uleb128 0x10
+	.4byte	.LASF63
+	.byte	0x10
+	.byte	0x5d
+	.4byte	0x435
+	.byte	0x88
+	.byte	0
+	.uleb128 0xa
+	.4byte	0x323
+	.4byte	0x445
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF64
+	.byte	0x10
+	.byte	0x5f
+	.4byte	0x344
+	.uleb128 0x4
+	.4byte	.LASF65
+	.byte	0x11
+	.byte	0x13
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF66
+	.byte	0x11
+	.byte	0x14
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF67
+	.byte	0x11
+	.byte	0x15
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF68
+	.byte	0x11
+	.byte	0x16
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF69
+	.byte	0x11
+	.byte	0x17
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF70
+	.byte	0x11
+	.byte	0x18
+	.4byte	0x10b
+	.uleb128 0x4
+	.4byte	.LASF71
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+	.uleb128 0x1b
+	.4byte	.LASF393
+	.byte	0x19
+	.2byte	0x110
+	.4byte	0xdd4
+	.byte	0x10
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF394
+	.byte	0x1a
+	.byte	0x12
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_type
+	.uleb128 0x28
+	.4byte	.LASF395
+	.byte	0x1a
+	.byte	0x13
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_die_num
+	.uleb128 0x28
+	.4byte	.LASF396
+	.byte	0x1a
+	.byte	0x14
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.uleb128 0x28
+	.4byte	.LASF397
+	.byte	0x1a
+	.byte	0x15
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.uleb128 0x28
+	.4byte	.LASF398
+	.byte	0x1a
+	.byte	0x16
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die_shift
+	.uleb128 0x28
+	.4byte	.LASF399
+	.byte	0x1a
+	.byte	0x17
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_num
+	.uleb128 0x28
+	.4byte	.LASF400
+	.byte	0x1a
+	.byte	0x18
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_blk_pre_plane
+	.uleb128 0x28
+	.4byte	.LASF401
+	.byte	0x1a
+	.byte	0x19
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_ext_blk_pre_plane
+	.uleb128 0x28
+	.4byte	.LASF402
+	.byte	0x1a
+	.byte	0x1a
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_bbm_buf_size
+	.uleb128 0x28
+	.4byte	.LASF403
+	.byte	0x1a
+	.byte	0x1c
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_page_pre_blk
+	.uleb128 0x28
+	.4byte	.LASF404
+	.byte	0x1a
+	.byte	0x1d
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_page_pre_slc_blk
+	.uleb128 0x28
+	.4byte	.LASF405
+	.byte	0x1a
+	.byte	0x1e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_page_pre_super_blk
+	.uleb128 0x28
+	.4byte	.LASF406
+	.byte	0x1a
+	.byte	0x1f
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.uleb128 0x28
+	.4byte	.LASF407
+	.byte	0x1a
+	.byte	0x20
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.uleb128 0x28
+	.4byte	.LASF408
+	.byte	0x1a
+	.byte	0x24
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_byte_pre_page
+	.uleb128 0x28
+	.4byte	.LASF409
+	.byte	0x1a
+	.byte	0x25
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_byte_pre_oob
+	.uleb128 0x28
+	.4byte	.LASF410
+	.byte	0x1a
+	.byte	0x26
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_reserved_blks
+	.uleb128 0x28
+	.4byte	.LASF411
+	.byte	0x1a
+	.byte	0x27
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_totle_phy_blks
+	.uleb128 0x28
+	.4byte	.LASF412
+	.byte	0x1a
+	.byte	0x29
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_map_region_num
+	.uleb128 0x28
+	.4byte	.LASF413
+	.byte	0x1a
+	.byte	0x2a
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_l2pmap_ram_region_num
+	.uleb128 0x28
+	.4byte	.LASF414
+	.byte	0x1a
+	.byte	0x2c
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_vendor_region_num
+	.uleb128 0x28
+	.4byte	.LASF415
+	.byte	0x1a
+	.byte	0x2e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_map_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF416
+	.byte	0x1a
+	.byte	0x2f
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_map_blks
+	.uleb128 0x28
+	.4byte	.LASF417
+	.byte	0x1a
+	.byte	0x30
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_vendor_blks
+	.uleb128 0x28
+	.4byte	.LASF418
+	.byte	0x1a
+	.byte	0x31
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_vendor_part_size
+	.uleb128 0x28
+	.4byte	.LASF419
+	.byte	0x1a
+	.byte	0x32
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sys_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF420
+	.byte	0x1a
+	.byte	0x33
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_init_sys_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF421
+	.byte	0x1a
+	.byte	0x34
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_sys_blks
+	.uleb128 0x28
+	.4byte	.LASF422
+	.byte	0x1a
+	.byte	0x35
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_data_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF423
+	.byte	0x1a
+	.byte	0x36
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_data_op_blks_per_plane
+	.uleb128 0x28
+	.4byte	.LASF424
+	.byte	0x1a
+	.byte	0x37
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_max_data_blks
+	.uleb128 0x28
+	.4byte	.LASF425
+	.byte	0x1a
+	.byte	0x38
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	ftl_gc_temp_power_lost_recovery_flag
+	.uleb128 0x28
+	.4byte	.LASF426
+	.byte	0x1a
+	.byte	0x3a
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_GlobalSysVersion
+	.uleb128 0x28
+	.4byte	.LASF427
+	.byte	0x1a
+	.byte	0x3b
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_GlobalDataVersion
+	.uleb128 0x28
+	.4byte	.LASF428
+	.byte	0x1a
+	.byte	0x3c
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_MaxLbaSector
+	.uleb128 0x28
+	.4byte	.LASF429
+	.byte	0x1a
+	.byte	0x3d
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_MaxLpn
+	.uleb128 0x28
+	.4byte	.LASF430
+	.byte	0x1a
+	.byte	0x3e
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_VaildLpn
+	.uleb128 0x28
+	.4byte	.LASF431
+	.byte	0x1a
+	.byte	0x3f
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_MaxLbn
+	.uleb128 0x28
+	.4byte	.LASF432
+	.byte	0x1a
+	.byte	0x41
+	.4byte	0xf81
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gBbtInfo
+	.uleb128 0x28
+	.4byte	.LASF433
+	.byte	0x1a
+	.byte	0x42
+	.4byte	0x1007
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gSysInfo
+	.uleb128 0x28
+	.4byte	.LASF434
+	.byte	0x1a
+	.byte	0x43
+	.4byte	0x15a4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.uleb128 0x28
+	.4byte	.LASF435
+	.byte	0x1a
+	.byte	0x44
+	.4byte	0x104f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gL2pMapInfo
+	.uleb128 0x28
+	.4byte	.LASF436
+	.byte	0x1a
+	.byte	0x45
+	.4byte	0x104f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gVendorBlkInfo
+	.uleb128 0x28
+	.4byte	.LASF437
+	.byte	0x1a
+	.byte	0x46
+	.4byte	0xdf5
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_sys
+	.uleb128 0x28
+	.4byte	.LASF438
+	.byte	0x1a
+	.byte	0x47
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_read
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xdf5
+	.uleb128 0x28
+	.4byte	.LASF439
+	.byte	0x1a
+	.byte	0x48
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_prgm
+	.uleb128 0x28
+	.4byte	.LASF440
+	.byte	0x1a
+	.byte	0x49
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_erase
+	.uleb128 0x28
+	.4byte	.LASF441
+	.byte	0x1a
+	.byte	0x4a
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_gc
+	.uleb128 0x28
+	.4byte	.LASF442
+	.byte	0x1a
+	.byte	0x4b
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	req_gc_dst
+	.uleb128 0x28
+	.4byte	.LASF443
+	.byte	0x1a
+	.byte	0x4d
+	.4byte	0x1abc
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_req_cache
+	.uleb128 0xa
+	.4byte	0xdbe
+	.4byte	0x1b3b
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF444
+	.byte	0x1a
+	.byte	0x4f
+	.4byte	0x1b2b
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_plane_order_table
+	.uleb128 0x28
+	.4byte	.LASF445
+	.byte	0x1a
+	.byte	0x51
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_sys_data_buf
+	.uleb128 0x28
+	.4byte	.LASF446
+	.byte	0x1a
+	.byte	0x52
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_sys_data_buf_1
+	.uleb128 0x28
+	.4byte	.LASF447
+	.byte	0x1a
+	.byte	0x53
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_data_buf
+	.uleb128 0x28
+	.4byte	.LASF448
+	.byte	0x1a
+	.byte	0x54
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_sys_spare_buf
+	.uleb128 0x28
+	.4byte	.LASF449
+	.byte	0x1a
+	.byte	0x55
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_io_data_buf_0
+	.uleb128 0x28
+	.4byte	.LASF450
+	.byte	0x1a
+	.byte	0x56
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_io_data_buf_1
+	.uleb128 0x28
+	.4byte	.LASF451
+	.byte	0x1a
+	.byte	0x57
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_io_spare_buf
+	.uleb128 0x28
+	.4byte	.LASF452
+	.byte	0x1a
+	.byte	0x58
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_spare_buf
+	.uleb128 0x28
+	.4byte	.LASF453
+	.byte	0x1a
+	.byte	0x59
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_data_buf
+	.uleb128 0x28
+	.4byte	.LASF454
+	.byte	0x1a
+	.byte	0x5a
+	.4byte	0x1c22
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gp_gc_page_buf_info
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16d6
+	.uleb128 0x28
+	.4byte	.LASF455
+	.byte	0x1a
+	.byte	0x5b
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_gc_page_buf_num
+	.uleb128 0x28
+	.4byte	.LASF456
+	.byte	0x1a
+	.byte	0x5c
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_num_req
+	.uleb128 0x28
+	.4byte	.LASF457
+	.byte	0x1a
+	.byte	0x5d
+	.4byte	0x1c67
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gp_ect_tbl_info
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x113b
+	.uleb128 0x28
+	.4byte	.LASF458
+	.byte	0x1a
+	.byte	0x5e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_ect_tbl_info_size
+	.uleb128 0x28
+	.4byte	.LASF459
+	.byte	0x1a
+	.byte	0x5f
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_erase_count_table
+	.uleb128 0x28
+	.4byte	.LASF460
+	.byte	0x1a
+	.byte	0x61
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_swl_mul_table
+	.uleb128 0x28
+	.4byte	.LASF461
+	.byte	0x1a
+	.byte	0x62
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_swl_count
+	.uleb128 0x28
+	.4byte	.LASF462
+	.byte	0x1a
+	.byte	0x63
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.uleb128 0x28
+	.4byte	.LASF463
+	.byte	0x1a
+	.byte	0x64
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_valid_page_count_check_table
+	.uleb128 0x28
+	.4byte	.LASF464
+	.byte	0x1a
+	.byte	0x65
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_blk_mode_table
+	.uleb128 0x28
+	.4byte	.LASF465
+	.byte	0x1a
+	.byte	0x67
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_block_table
+	.uleb128 0x28
+	.4byte	.LASF466
+	.byte	0x1a
+	.byte	0x68
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_block_valid_page_count
+	.uleb128 0x28
+	.4byte	.LASF467
+	.byte	0x1a
+	.byte	0x69
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_block_ver_table
+	.uleb128 0x28
+	.4byte	.LASF468
+	.byte	0x1a
+	.byte	0x6a
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_map_region_ppn_table
+	.uleb128 0x28
+	.4byte	.LASF469
+	.byte	0x1a
+	.byte	0x6b
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_map_block
+	.uleb128 0x28
+	.4byte	.LASF470
+	.byte	0x1a
+	.byte	0x6d
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_block_table
+	.uleb128 0x28
+	.4byte	.LASF471
+	.byte	0x1a
+	.byte	0x6e
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_block_valid_page_count
+	.uleb128 0x28
+	.4byte	.LASF472
+	.byte	0x1a
+	.byte	0x6f
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_block_ver_table
+	.uleb128 0x28
+	.4byte	.LASF473
+	.byte	0x1a
+	.byte	0x70
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_vendor_region_ppn_table
+	.uleb128 0x28
+	.4byte	.LASF474
+	.byte	0x1a
+	.byte	0x71
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_vendor_block
+	.uleb128 0x28
+	.4byte	.LASF475
+	.byte	0x1a
+	.byte	0x73
+	.4byte	0x1de7
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_l2p_ram_map
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x10fe
+	.uleb128 0x28
+	.4byte	.LASF476
+	.byte	0x1a
+	.byte	0x74
+	.4byte	0x1001
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_l2p_map_buf
+	.uleb128 0x28
+	.4byte	.LASF477
+	.byte	0x1a
+	.byte	0x75
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_l2p_last_update_region_id
+	.uleb128 0x28
+	.4byte	.LASF478
+	.byte	0x1a
+	.byte	0x7c
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1573
+	.uleb128 0x28
+	.4byte	.LASF479
+	.byte	0x1a
+	.byte	0x7d
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_free_data_block_list_head
+	.uleb128 0x28
+	.4byte	.LASF480
+	.byte	0x1a
+	.byte	0x7f
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_data_block_list_head
+	.uleb128 0x28
+	.4byte	.LASF481
+	.byte	0x1a
+	.byte	0x80
+	.4byte	0x1e2c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_data_block_list_tail
+	.uleb128 0x28
+	.4byte	.LASF482
+	.byte	0x1a
+	.byte	0x81
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_num_free_superblocks
+	.uleb128 0x28
+	.4byte	.LASF483
+	.byte	0x1a
+	.byte	0x82
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_num_data_superblocks
+	.uleb128 0x28
+	.4byte	.LASF484
+	.byte	0x1a
+	.byte	0x83
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_active_superblock
+	.uleb128 0x28
+	.4byte	.LASF485
+	.byte	0x1a
+	.byte	0x84
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_buffer_superblock
+	.uleb128 0x28
+	.4byte	.LASF486
+	.byte	0x1a
+	.byte	0x85
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_temp_superblock
+	.uleb128 0x28
+	.4byte	.LASF487
+	.byte	0x1a
+	.byte	0x86
+	.4byte	0x15ff
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_superblock
+	.uleb128 0x28
+	.4byte	.LASF488
+	.byte	0x1a
+	.byte	0x87
+	.4byte	0x1f04
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gp_last_act_superblock
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x15ff
+	.uleb128 0x28
+	.4byte	.LASF489
+	.byte	0x1a
+	.byte	0x88
+	.4byte	0x1320
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_sys_save_data
+	.uleb128 0x28
+	.4byte	.LASF490
+	.byte	0x1a
+	.byte	0x89
+	.4byte	0x141d
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_sys_ext_data
+	.uleb128 0x28
+	.4byte	.LASF491
+	.byte	0x1a
+	.byte	0x8b
+	.4byte	0x1f49
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_page_info
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x16a1
+	.uleb128 0x28
+	.4byte	.LASF492
+	.byte	0x1a
+	.byte	0x8c
+	.4byte	0x10f8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	p_gc_blk_tbl
+	.uleb128 0x28
+	.4byte	.LASF493
+	.byte	0x1a
+	.byte	0x8d
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_blk_num
+	.uleb128 0x28
+	.4byte	.LASF494
+	.byte	0x1a
+	.byte	0x8e
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_page_offset
+	.uleb128 0x28
+	.4byte	.LASF495
+	.byte	0x1a
+	.byte	0x8f
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_cur_blk_valid_pages
+	.uleb128 0x28
+	.4byte	.LASF496
+	.byte	0x1a
+	.byte	0x90
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_cur_blk_max_valid_pages
+	.uleb128 0x28
+	.4byte	.LASF497
+	.byte	0x1a
+	.byte	0x91
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_next_blk
+	.uleb128 0x28
+	.4byte	.LASF498
+	.byte	0x1a
+	.byte	0x92
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_next_blk_1
+	.uleb128 0x28
+	.4byte	.LASF499
+	.byte	0x1a
+	.byte	0x93
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_bad_block_temp_num
+	.uleb128 0x28
+	.4byte	.LASF500
+	.byte	0x1a
+	.byte	0x94
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_bad_block_gc_index
+	.uleb128 0xa
+	.4byte	0xdc9
+	.4byte	0x201c
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x10
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF501
+	.byte	0x1a
+	.byte	0x95
+	.4byte	0x200c
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_bad_block_temp_tbl
+	.uleb128 0x28
+	.4byte	.LASF502
+	.byte	0x1a
+	.byte	0x97
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_free_blk_threshold
+	.uleb128 0x28
+	.4byte	.LASF503
+	.byte	0x1a
+	.byte	0x98
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_merge_free_blk_threshold
+	.uleb128 0x28
+	.4byte	.LASF504
+	.byte	0x1a
+	.byte	0x99
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_blk_index
+	.uleb128 0x28
+	.4byte	.LASF505
+	.byte	0x1a
+	.byte	0x9b
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_gc_page_count
+	.uleb128 0x28
+	.4byte	.LASF506
+	.byte	0x1a
+	.byte	0x9c
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_write_page_count
+	.uleb128 0x28
+	.4byte	.LASF507
+	.byte	0x1a
+	.byte	0x9d
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_write_sector
+	.uleb128 0x28
+	.4byte	.LASF508
+	.byte	0x1a
+	.byte	0x9e
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_read_sector
+	.uleb128 0x28
+	.4byte	.LASF509
+	.byte	0x1a
+	.byte	0xa0
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_discard_page_count
+	.uleb128 0x28
+	.4byte	.LASF510
+	.byte	0x1a
+	.byte	0xa1
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_read_page_count
+	.uleb128 0x28
+	.4byte	.LASF511
+	.byte	0x1a
+	.byte	0xa2
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_tmp_data_superblock_id
+	.uleb128 0x28
+	.4byte	.LASF512
+	.byte	0x1a
+	.byte	0xa3
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_cache_write_count
+	.uleb128 0x28
+	.4byte	.LASF513
+	.byte	0x1a
+	.byte	0xa4
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_l2p_write_count
+	.uleb128 0x28
+	.4byte	.LASF514
+	.byte	0x1a
+	.byte	0xa6
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_mlc_erase_count
+	.uleb128 0x28
+	.4byte	.LASF515
+	.byte	0x1a
+	.byte	0xa7
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_avg_erase_count
+	.uleb128 0x28
+	.4byte	.LASF516
+	.byte	0x1a
+	.byte	0xa8
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_min_erase_count
+	.uleb128 0x28
+	.4byte	.LASF517
+	.byte	0x1a
+	.byte	0xa9
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_slc_erase_count
+	.uleb128 0x28
+	.4byte	.LASF518
+	.byte	0x1a
+	.byte	0xaa
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_totle_sys_slc_erase_count
+	.uleb128 0x28
+	.4byte	.LASF519
+	.byte	0x1a
+	.byte	0xab
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_max_erase_count
+	.uleb128 0x28
+	.4byte	.LASF520
+	.byte	0x1a
+	.byte	0xac
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_in_gc_progress
+	.uleb128 0x28
+	.4byte	.LASF521
+	.byte	0x1a
+	.byte	0xad
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_in_swl_replace
+	.uleb128 0x28
+	.4byte	.LASF522
+	.byte	0x1a
+	.byte	0xae
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_ftl_nand_free_count
+	.uleb128 0x28
+	.4byte	.LASF523
+	.byte	0x1a
+	.byte	0xaf
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_head_data_block
+	.uleb128 0x28
+	.4byte	.LASF524
+	.byte	0x1a
+	.byte	0xb0
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_head_data_block_count
+	.uleb128 0x28
+	.4byte	.LASF525
+	.byte	0x1a
+	.byte	0xb1
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_gc_skip_write_count
+	.uleb128 0x28
+	.4byte	.LASF526
+	.byte	0x1a
+	.byte	0xb2
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_cur_erase_blk
+	.uleb128 0x28
+	.4byte	.LASF527
+	.byte	0x1a
+	.byte	0xb4
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_recovery_page_num
+	.uleb128 0x28
+	.4byte	.LASF528
+	.byte	0x1a
+	.byte	0xb5
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_recovery_page_min_ver
+	.uleb128 0xa
+	.4byte	0xdd4
+	.4byte	0x2278
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF529
+	.byte	0x1a
+	.byte	0xb6
+	.4byte	0x2268
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_recovery_ppa_tbl
+	.uleb128 0x28
+	.4byte	.LASF530
+	.byte	0x1a
+	.byte	0xb7
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	c_mlc_erase_count_value
+	.uleb128 0x28
+	.4byte	.LASF531
+	.byte	0x1a
+	.byte	0xb8
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_power_lost_recovery_flag
+	.uleb128 0x4
+	.4byte	.LASF532
+	.byte	0x17
+	.byte	0x14
+	.4byte	0xe44
+	.uleb128 0x4
+	.4byte	.LASF533
+	.byte	0x17
+	.byte	0x15
+	.4byte	0xe44
+	.uleb128 0x4
+	.4byte	.LASF534
+	.byte	0x17
+	.byte	0x16
+	.4byte	0xee6
+	.uleb128 0xa
+	.4byte	0xb9
+	.4byte	0x22e9
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF535
+	.byte	0x17
+	.byte	0x17
+	.4byte	0x22d8
+	.uleb128 0x28
+	.4byte	.LASF536
+	.byte	0x3
+	.byte	0x6
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	DeviceCapacity
+	.uleb128 0x28
+	.4byte	.LASF537
+	.byte	0x3
+	.byte	0x7
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gFtlInitStatus
+	.uleb128 0x4
+	.4byte	.LASF538
+	.byte	0x3
+	.byte	0x6d
+	.4byte	0xdd4
+	.uleb128 0x4
+	.4byte	.LASF539
+	.byte	0x3
+	.byte	0x6e
+	.4byte	0xdd4
+	.uleb128 0x4
+	.4byte	.LASF540
+	.byte	0x3
+	.byte	0x6f
+	.4byte	0xdd4
+	.uleb128 0x4
+	.4byte	.LASF541
+	.byte	0x3
+	.byte	0x70
+	.4byte	0xdd4
+	.uleb128 0x29
+	.4byte	.LASF542
+	.byte	0x3
+	.2byte	0x3c0
+	.4byte	0x5b
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	power_up_flag
+	.uleb128 0x2a
+	.4byte	.LASF546
+	.byte	0x3
+	.2byte	0x483
+	.4byte	0xdd4
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gc_discard_updated
+	.uleb128 0x29
+	.4byte	.LASF543
+	.byte	0x2
+	.2byte	0x35b
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_ect_tbl_power_up_flush
+	.uleb128 0x29
+	.4byte	.LASF544
+	.byte	0x2
+	.2byte	0x370
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	FtlUpdateVaildLpnCount
+	.uleb128 0xa
+	.4byte	0xdc9
+	.4byte	0x23b3
+	.uleb128 0x15
+	.4byte	0xda
+	.2byte	0x1fff
+	.byte	0
+	.uleb128 0x29
+	.4byte	.LASF545
+	.byte	0x2
+	.2byte	0x8ad
+	.4byte	0x23a2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	check_vpc_table
+	.uleb128 0x2b
+	.4byte	.LASF547
+	.byte	0x5
+	.byte	0x6d
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	ftl_gc_temp_block_bops_scan_page_addr
+	.uleb128 0x29
+	.4byte	.LASF548
+	.byte	0x5
+	.2byte	0x1d4
+	.4byte	0xdc9
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	gc_ink_free_return_value
+	.uleb128 0xc
+	.4byte	.LASF549
+	.byte	0x1b
+	.2byte	0x3ba
+	.4byte	0x10b
+	.uleb128 0xc
+	.4byte	.LASF550
+	.byte	0x1b
+	.2byte	0x3bb
+	.4byte	0x10b
+	.uleb128 0xc
+	.4byte	.LASF551
+	.byte	0x1b
+	.2byte	0x3bc
+	.4byte	0x10b
+	.uleb128 0xf
+	.4byte	.LASF552
+	.byte	0x4
+	.byte	0x1c
+	.byte	0xc
+	.4byte	0x2431
+	.uleb128 0x16
+	.string	"pid"
+	.byte	0x1c
+	.byte	0xd
+	.4byte	0x5b
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.4byte	.LASF553
+	.byte	0x1c
+	.byte	0x10
+	.4byte	0x243c
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x2418
+	.uleb128 0x2c
+	.4byte	0x22c2
+	.byte	0x1
+	.byte	0x10
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_nand_phy_info
+	.uleb128 0x2c
+	.4byte	0x22cd
+	.byte	0x1
+	.byte	0x11
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	g_nand_ops
+	.uleb128 0x2b
+	.4byte	.LASF554
+	.byte	0x1
+	.byte	0x13
+	.4byte	0x22d8
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	check_buf
+	.uleb128 0x2c
+	.4byte	0x22e9
+	.byte	0x1
+	.byte	0x14
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	ftl_temp_buf
+	.uleb128 0xa
+	.4byte	0xb9
+	.4byte	0x249a
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x2b
+	.4byte	.LASF555
+	.byte	0x1
+	.byte	0x15
+	.4byte	0x248a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	check_spare_buf
+	.uleb128 0x2d
+	.4byte	.LASF558
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x5b
+	.8byte	.LFB347
+	.8byte	.LFE347-.LFB347
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2527
+	.uleb128 0x2e
+	.4byte	.LASF556
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x12c
+	.4byte	.LLST468
+	.uleb128 0x2e
+	.4byte	.LASF557
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x12c
+	.4byte	.LLST469
+	.uleb128 0x2e
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xf7
+	.4byte	0x30
+	.4byte	.LLST470
+	.uleb128 0x2f
+	.8byte	.LVL2176
+	.4byte	0xa8ab
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF559
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x12c
+	.8byte	.LFB346
+	.8byte	.LFE346-.LFB346
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x259f
+	.uleb128 0x2e
+	.4byte	.LASF560
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x12c
+	.4byte	.LLST303
+	.uleb128 0x2e
+	.4byte	.LASF561
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x16f
+	.4byte	.LLST304
+	.uleb128 0x2e
+	.4byte	.LASF30
+	.byte	0x1
+	.byte	0xf2
+	.4byte	0x30
+	.4byte	.LLST305
+	.uleb128 0x2f
+	.8byte	.LVL1241
+	.4byte	0xa8b6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF562
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x12c
+	.8byte	.LFB345
+	.8byte	.LFE345-.LFB345
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2611
+	.uleb128 0x31
+	.string	"s"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x12c
+	.4byte	.LLST196
+	.uleb128 0x31
+	.string	"c"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x5b
+	.4byte	.LLST197
+	.uleb128 0x31
+	.string	"n"
+	.byte	0x1
+	.byte	0xed
+	.4byte	0x30
+	.4byte	.LLST198
+	.uleb128 0x2f
+	.8byte	.LVL738
+	.4byte	0xa8c2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF563
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xae
+	.8byte	.LFB344
+	.8byte	.LFE344-.LFB344
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x26cd
+	.uleb128 0x2e
+	.4byte	.LASF564
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xf37
+	.4byte	.LLST299
+	.uleb128 0x31
+	.string	"die"
+	.byte	0x1
+	.byte	0xdb
+	.4byte	0xb9
+	.4byte	.LLST300
+	.uleb128 0x32
+	.4byte	.LASF325
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0xa3
+	.4byte	.LLST301
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x1
+	.byte	0xdd
+	.4byte	0xa3
+	.4byte	.LLST302
+	.uleb128 0x34
+	.8byte	.LVL1228
+	.4byte	0x259f
+	.4byte	0x2691
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x100
+	.byte	0
+	.uleb128 0x35
+	.8byte	.LVL1229
+	.4byte	0x26ab
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1232
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x100
+	.byte	0
+	.byte	0
+	.uleb128 0x37
+	.4byte	.LASF586
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0xddf
+	.byte	0x1
+	.4byte	0x2711
+	.uleb128 0x38
+	.4byte	.LASF577
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0xdc9
+	.uleb128 0x39
+	.string	"sts"
+	.byte	0x1
+	.byte	0xc2
+	.4byte	0xddf
+	.uleb128 0x3a
+	.4byte	.LASF565
+	.byte	0x1
+	.byte	0xc3
+	.4byte	0x2711
+	.uleb128 0x39
+	.string	"req"
+	.byte	0x1
+	.byte	0xc4
+	.4byte	0xdf5
+	.uleb128 0x3b
+	.string	"out"
+	.byte	0x1
+	.byte	0xd6
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xdd4
+	.4byte	0x2721
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xf
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF566
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xae
+	.8byte	.LFB342
+	.8byte	.LFE342-.LFB342
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x27e7
+	.uleb128 0x2e
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0x12c
+	.4byte	.LLST175
+	.uleb128 0x2e
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xb9
+	.4byte	.LLST176
+	.uleb128 0x2e
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0xaa
+	.4byte	0xb9
+	.4byte	.LLST177
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb9
+	.4byte	.LLST178
+	.uleb128 0x3d
+	.string	"cs"
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb9
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb9
+	.4byte	.LLST179
+	.uleb128 0x2b
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0xac
+	.4byte	0xb9
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x33
+	.string	"req"
+	.byte	0x1
+	.byte	0xad
+	.4byte	0x1abc
+	.4byte	.LLST180
+	.uleb128 0x32
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0xae
+	.4byte	0xb9
+	.4byte	.LLST181
+	.uleb128 0x36
+	.8byte	.LVL669
+	.4byte	0x96be
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x3e
+	.4byte	0x2aad
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 -4
+	.byte	0
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF572
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xae
+	.8byte	.LFB341
+	.8byte	.LFE341-.LFB341
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x298f
+	.uleb128 0x2e
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0x12c
+	.4byte	.LLST167
+	.uleb128 0x2e
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb9
+	.4byte	.LLST168
+	.uleb128 0x2e
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb9
+	.4byte	.LLST169
+	.uleb128 0x2e
+	.4byte	.LASF573
+	.byte	0x1
+	.byte	0x6e
+	.4byte	0xb9
+	.4byte	.LLST170
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb9
+	.4byte	.LLST171
+	.uleb128 0x3d
+	.string	"cs"
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb9
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x32
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb9
+	.4byte	.LLST172
+	.uleb128 0x2b
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x70
+	.4byte	0xb9
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x32
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0x71
+	.4byte	0xb9
+	.4byte	.LLST173
+	.uleb128 0x33
+	.string	"req"
+	.byte	0x1
+	.byte	0x72
+	.4byte	0x1abc
+	.4byte	.LLST174
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7630
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0xd0
+	.4byte	0x2941
+	.uleb128 0x2b
+	.4byte	.LASF575
+	.byte	0x1
+	.byte	0x8d
+	.4byte	0xdf5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x34
+	.8byte	.LVL657
+	.4byte	0x29a4
+	.4byte	0x28e7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 192
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL658
+	.4byte	0xa8ce
+	.4byte	0x2906
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC79
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL659
+	.4byte	0xa8ce
+	.4byte	0x2925
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC80
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL660
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC81
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL648
+	.4byte	0xa8ce
+	.4byte	0x296c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x76
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL649
+	.4byte	0x96be
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x3e
+	.4byte	0x2aad
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x299f
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xe
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x298f
+	.uleb128 0x3c
+	.4byte	.LASF576
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xae
+	.8byte	.LFB340
+	.8byte	.LFE340-.LFB340
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2a9d
+	.uleb128 0x2e
+	.4byte	.LASF567
+	.byte	0x1
+	.byte	0x50
+	.4byte	0x12c
+	.4byte	.LLST152
+	.uleb128 0x2e
+	.4byte	.LASF569
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xb9
+	.4byte	.LLST153
+	.uleb128 0x2e
+	.4byte	.LASF568
+	.byte	0x1
+	.byte	0x50
+	.4byte	0xb9
+	.4byte	.LLST154
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb9
+	.4byte	.LLST155
+	.uleb128 0x3d
+	.string	"cs"
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb9
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x32
+	.4byte	.LASF276
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb9
+	.4byte	.LLST156
+	.uleb128 0x2b
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x52
+	.4byte	0xb9
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x32
+	.4byte	.LASF571
+	.byte	0x1
+	.byte	0x53
+	.4byte	0xb9
+	.4byte	.LLST157
+	.uleb128 0x39
+	.string	"req"
+	.byte	0x1
+	.byte	0x54
+	.4byte	0x1abc
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7613
+	.uleb128 0x34
+	.8byte	.LVL602
+	.4byte	0xa8ce
+	.4byte	0x2a7a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x58
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL603
+	.4byte	0x96be
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.uleb128 0x3e
+	.4byte	0x2aad
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x41
+	.4byte	.LASF883
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xb9
+	.byte	0x1
+	.4byte	0x2b1c
+	.uleb128 0x42
+	.string	"req"
+	.byte	0x1
+	.byte	0x36
+	.4byte	0x1abc
+	.uleb128 0x38
+	.4byte	.LASF570
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xe3e
+	.uleb128 0x38
+	.4byte	.LASF578
+	.byte	0x1
+	.byte	0x36
+	.4byte	0xe3e
+	.uleb128 0x3a
+	.4byte	.LASF579
+	.byte	0x1
+	.byte	0x38
+	.4byte	0xa3
+	.uleb128 0x3a
+	.4byte	.LASF580
+	.byte	0x1
+	.byte	0x38
+	.4byte	0xa3
+	.uleb128 0x3a
+	.4byte	.LASF285
+	.byte	0x1
+	.byte	0x39
+	.4byte	0xa3
+	.uleb128 0x3a
+	.4byte	.LASF286
+	.byte	0x1
+	.byte	0x39
+	.4byte	0xa3
+	.uleb128 0x3a
+	.4byte	.LASF581
+	.byte	0x1
+	.byte	0x3a
+	.4byte	0xb9
+	.uleb128 0x3a
+	.4byte	.LASF277
+	.byte	0x1
+	.byte	0x3b
+	.4byte	0xb9
+	.uleb128 0x3a
+	.4byte	.LASF582
+	.byte	0x1
+	.byte	0x3c
+	.4byte	0xb9
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF619
+	.byte	0x1
+	.byte	0x1c
+	.8byte	.LFB338
+	.8byte	.LFE338-.LFB338
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2c25
+	.uleb128 0x31
+	.string	"s"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0xfa
+	.4byte	.LLST143
+	.uleb128 0x31
+	.string	"buf"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x12c
+	.4byte	.LLST144
+	.uleb128 0x2e
+	.4byte	.LASF583
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x5b
+	.4byte	.LLST145
+	.uleb128 0x31
+	.string	"len"
+	.byte	0x1
+	.byte	0x1c
+	.4byte	0x5b
+	.4byte	.LLST146
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0xb9
+	.4byte	.LLST147
+	.uleb128 0x33
+	.string	"j"
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0xb9
+	.4byte	.LLST148
+	.uleb128 0x33
+	.string	"p8"
+	.byte	0x1
+	.byte	0x1f
+	.4byte	0xfa
+	.4byte	.LLST149
+	.uleb128 0x33
+	.string	"p16"
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x2c25
+	.4byte	.LLST150
+	.uleb128 0x33
+	.string	"p32"
+	.byte	0x1
+	.byte	0x21
+	.4byte	0xe3e
+	.4byte	.LLST151
+	.uleb128 0x44
+	.8byte	.LVL587
+	.4byte	0xa8ce
+	.4byte	0x2bd8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC78
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL588
+	.4byte	0xa8ce
+	.4byte	0x2bfc
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL589
+	.4byte	0xa8ce
+	.uleb128 0x36
+	.8byte	.LVL592
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC78
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x74
+	.uleb128 0x2d
+	.4byte	.LASF584
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x12c
+	.8byte	.LFB337
+	.8byte	.LFE337-.LFB337
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2c7c
+	.uleb128 0x2e
+	.4byte	.LASF30
+	.byte	0x1
+	.byte	0x17
+	.4byte	0x5b
+	.4byte	.LLST142
+	.uleb128 0x2f
+	.8byte	.LVL579
+	.4byte	0xa8d9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF585
+	.byte	0x5
+	.2byte	0x2f8
+	.4byte	0xb9
+	.8byte	.LFB320
+	.8byte	.LFE320-.LFB320
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2cb7
+	.uleb128 0x2f
+	.8byte	.LVL1928
+	.4byte	0x2cb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF587
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x2d84
+	.uleb128 0x48
+	.4byte	.LASF588
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0xdd4
+	.uleb128 0x48
+	.4byte	.LASF589
+	.byte	0x5
+	.2byte	0x1d5
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF590
+	.byte	0x5
+	.2byte	0x1d7
+	.4byte	0xdc9
+	.uleb128 0x4a
+	.string	"lpa"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdd4
+	.uleb128 0x4a
+	.string	"ppa"
+	.byte	0x5
+	.2byte	0x1d8
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF591
+	.byte	0x5
+	.2byte	0x1d9
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF299
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF593
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF594
+	.byte	0x5
+	.2byte	0x1da
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF595
+	.byte	0x5
+	.2byte	0x1db
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x1dc
+	.4byte	0x2d84
+	.uleb128 0x4b
+	.4byte	.LASF597
+	.byte	0x5
+	.2byte	0x276
+	.uleb128 0x4b
+	.4byte	.LASF598
+	.byte	0x5
+	.2byte	0x279
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x2d9a
+	.4byte	.LASF587
+	.uleb128 0x4d
+	.uleb128 0x49
+	.4byte	.LASF599
+	.byte	0x5
+	.2byte	0x1f3
+	.4byte	0xdc9
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1238
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x2d9a
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x16
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x2d8a
+	.uleb128 0x47
+	.4byte	.LASF600
+	.byte	0x5
+	.2byte	0x1a2
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x2dff
+	.uleb128 0x4a
+	.string	"ret"
+	.byte	0x5
+	.2byte	0x1a4
+	.4byte	0x5b
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x5
+	.2byte	0x1a5
+	.4byte	0x5b
+	.uleb128 0x4a
+	.string	"ppa"
+	.byte	0x5
+	.2byte	0x1a6
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF565
+	.byte	0x5
+	.2byte	0x1a7
+	.4byte	0x2711
+	.uleb128 0x4e
+	.4byte	0x2df0
+	.uleb128 0x49
+	.4byte	.LASF601
+	.byte	0x5
+	.2byte	0x1b1
+	.4byte	0xdf5
+	.byte	0
+	.uleb128 0x4d
+	.uleb128 0x49
+	.4byte	.LASF602
+	.byte	0x5
+	.2byte	0x1c6
+	.4byte	0xdd4
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF603
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x2e49
+	.uleb128 0x48
+	.4byte	.LASF604
+	.byte	0x5
+	.2byte	0x185
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF592
+	.byte	0x5
+	.2byte	0x187
+	.4byte	0xdc9
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdc9
+	.uleb128 0x4a
+	.string	"j"
+	.byte	0x5
+	.2byte	0x188
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x189
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x4f
+	.4byte	.LASF714
+	.byte	0x5
+	.2byte	0x17a
+	.4byte	0x5b
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF605
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0x5b
+	.8byte	.LFB315
+	.8byte	.LFE315-.LFB315
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2ef8
+	.uleb128 0x50
+	.4byte	.LASF388
+	.byte	0x5
+	.2byte	0x166
+	.4byte	0xdc9
+	.4byte	.LLST139
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x5
+	.2byte	0x168
+	.4byte	0xdc9
+	.4byte	.LLST140
+	.uleb128 0x52
+	.4byte	.LASF606
+	.byte	0x5
+	.2byte	0x169
+	.4byte	0xdc9
+	.4byte	.LLST141
+	.uleb128 0x34
+	.8byte	.LVL565
+	.4byte	0x6cf6
+	.4byte	0x2ebe
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL568
+	.4byte	0xa8ce
+	.4byte	0x2ee3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC74
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL569
+	.4byte	0x2ef8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF607
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0x5b
+	.8byte	.LFB314
+	.8byte	.LFE314-.LFB314
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x2f4c
+	.uleb128 0x50
+	.4byte	.LASF608
+	.byte	0x5
+	.2byte	0x158
+	.4byte	0xdc9
+	.4byte	.LLST138
+	.uleb128 0x36
+	.8byte	.LVL561
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC73
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF609
+	.byte	0x5
+	.2byte	0x13b
+	.4byte	0xdd4
+	.8byte	.LFB313
+	.8byte	.LFE313-.LFB313
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3012
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x5
+	.2byte	0x13d
+	.4byte	0xdc9
+	.4byte	.LLST409
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x5
+	.2byte	0x13e
+	.4byte	0x2d84
+	.4byte	.LLST410
+	.uleb128 0x34
+	.8byte	.LVL1808
+	.4byte	0x27e7
+	.4byte	0x2fa8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1810
+	.4byte	0x35c6
+	.4byte	0x2fc6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1811
+	.4byte	0x32a5
+	.4byte	0x2fdd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1813
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1814
+	.4byte	0x72c7
+	.uleb128 0x45
+	.8byte	.LVL1815
+	.4byte	0x324a
+	.uleb128 0x45
+	.8byte	.LVL1819
+	.4byte	0x34b7
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF610
+	.byte	0x5
+	.2byte	0x12b
+	.4byte	0xdd4
+	.8byte	.LFB312
+	.8byte	.LFE312-.LFB312
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x30c4
+	.uleb128 0x45
+	.8byte	.LVL1823
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1824
+	.4byte	0x32a5
+	.4byte	0x3058
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1825
+	.4byte	0x39d7
+	.4byte	0x3077
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1826
+	.4byte	0x5ce8
+	.uleb128 0x34
+	.8byte	.LVL1827
+	.4byte	0x58ed
+	.4byte	0x309b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1828
+	.4byte	0x5619
+	.uleb128 0x2f
+	.8byte	.LVL1829
+	.4byte	0x3789
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.4byte	.LASF670
+	.byte	0x5
+	.2byte	0x120
+	.byte	0x1
+	.uleb128 0x2d
+	.4byte	.LASF611
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdd4
+	.8byte	.LFB310
+	.8byte	.LFE310-.LFB310
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x324a
+	.uleb128 0x2e
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0x1f04
+	.4byte	.LLST286
+	.uleb128 0x2e
+	.4byte	.LASF613
+	.byte	0x5
+	.byte	0xd2
+	.4byte	0xdd4
+	.4byte	.LLST287
+	.uleb128 0x32
+	.4byte	.LASF594
+	.byte	0x5
+	.byte	0xd4
+	.4byte	0xdc9
+	.4byte	.LLST288
+	.uleb128 0x32
+	.4byte	.LASF569
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdc9
+	.4byte	.LLST289
+	.uleb128 0x33
+	.string	"req"
+	.byte	0x5
+	.byte	0xd5
+	.4byte	0xdc9
+	.4byte	.LLST290
+	.uleb128 0x32
+	.4byte	.LASF592
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdc9
+	.4byte	.LLST291
+	.uleb128 0x32
+	.4byte	.LASF382
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdc9
+	.4byte	.LLST292
+	.uleb128 0x32
+	.4byte	.LASF380
+	.byte	0x5
+	.byte	0xd6
+	.4byte	0xdc9
+	.4byte	.LLST293
+	.uleb128 0x32
+	.4byte	.LASF614
+	.byte	0x5
+	.byte	0xd7
+	.4byte	0xdd4
+	.4byte	.LLST294
+	.uleb128 0x32
+	.4byte	.LASF615
+	.byte	0x5
+	.byte	0xd8
+	.4byte	0xdd4
+	.4byte	.LLST295
+	.uleb128 0x54
+	.4byte	.LASF616
+	.byte	0x5
+	.byte	0xd9
+	.4byte	0xdd4
+	.sleb128 -1
+	.uleb128 0x32
+	.4byte	.LASF596
+	.byte	0x5
+	.byte	0xda
+	.4byte	0x2d84
+	.4byte	.LLST296
+	.uleb128 0x55
+	.4byte	.LASF617
+	.byte	0x5
+	.byte	0xe1
+	.uleb128 0x55
+	.4byte	.LASF618
+	.byte	0x5
+	.byte	0xe5
+	.uleb128 0x56
+	.4byte	.LASF688
+	.byte	0x5
+	.2byte	0x117
+	.8byte	.L872
+	.uleb128 0x45
+	.8byte	.LVL1174
+	.4byte	0x324a
+	.uleb128 0x34
+	.8byte	.LVL1182
+	.4byte	0x29a4
+	.4byte	0x31ea
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1195
+	.4byte	0x6d36
+	.4byte	0x3204
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1201
+	.4byte	0x4e68
+	.4byte	0x3222
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1204
+	.4byte	0x34b7
+	.uleb128 0x45
+	.8byte	.LVL1207
+	.4byte	0x68e0
+	.uleb128 0x45
+	.8byte	.LVL1209
+	.4byte	0x324a
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF620
+	.byte	0x5
+	.byte	0xc9
+	.8byte	.LFB309
+	.8byte	.LFE309-.LFB309
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x32a5
+	.uleb128 0x34
+	.8byte	.LVL1168
+	.4byte	0x259f
+	.4byte	0x327f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1169
+	.4byte	0x259f
+	.4byte	0x3297
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x57
+	.8byte	.LVL1170
+	.4byte	0x361a
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF621
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x5b
+	.8byte	.LFB308
+	.8byte	.LFE308-.LFB308
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x34a2
+	.uleb128 0x2e
+	.4byte	.LASF622
+	.byte	0x5
+	.byte	0x6f
+	.4byte	0x5b
+	.4byte	.LLST404
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdc9
+	.4byte	.LLST405
+	.uleb128 0x32
+	.4byte	.LASF623
+	.byte	0x5
+	.byte	0x71
+	.4byte	0xdc9
+	.4byte	.LLST406
+	.uleb128 0x2b
+	.4byte	.LASF624
+	.byte	0x5
+	.byte	0x72
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x32
+	.4byte	.LASF625
+	.byte	0x5
+	.byte	0x73
+	.4byte	0xdd4
+	.4byte	.LLST407
+	.uleb128 0x2b
+	.4byte	.LASF612
+	.byte	0x5
+	.byte	0x74
+	.4byte	0x1f04
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	g_gc_temp_superblock
+	.byte	0x9f
+	.uleb128 0x32
+	.4byte	.LASF626
+	.byte	0x5
+	.byte	0x75
+	.4byte	0x1f49
+	.4byte	.LLST408
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x34b2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7246
+	.uleb128 0x34
+	.8byte	.LVL1769
+	.4byte	0x30cd
+	.4byte	0x3365
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1771
+	.4byte	0x58ed
+	.4byte	0x337c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1772
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1773
+	.4byte	0x72c7
+	.uleb128 0x45
+	.8byte	.LVL1777
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1778
+	.4byte	0xa8ce
+	.4byte	0x33d5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR173
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1780
+	.4byte	0x3645
+	.4byte	0x33ed
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1781
+	.4byte	0x68bb
+	.uleb128 0x45
+	.8byte	.LVL1783
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1784
+	.4byte	0x5619
+	.uleb128 0x34
+	.8byte	.LVL1787
+	.4byte	0xa8ce
+	.4byte	0x343f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1788
+	.4byte	0x5bbb
+	.4byte	0x345d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 188
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1789
+	.4byte	0x6cf6
+	.uleb128 0x34
+	.8byte	.LVL1792
+	.4byte	0x5bbb
+	.4byte	0x3487
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1794
+	.4byte	0x3645
+	.uleb128 0x45
+	.8byte	.LVL1798
+	.4byte	0x68e0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x34b2
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x12
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x34a2
+	.uleb128 0x43
+	.4byte	.LASF627
+	.byte	0x5
+	.byte	0x54
+	.8byte	.LFB307
+	.8byte	.LFE307-.LFB307
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3534
+	.uleb128 0x2e
+	.4byte	.LASF628
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdd4
+	.4byte	.LLST133
+	.uleb128 0x2e
+	.4byte	.LASF391
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdd4
+	.4byte	.LLST134
+	.uleb128 0x31
+	.string	"lpa"
+	.byte	0x5
+	.byte	0x54
+	.4byte	0xdd4
+	.4byte	.LLST135
+	.uleb128 0x32
+	.4byte	.LASF629
+	.byte	0x5
+	.byte	0x56
+	.4byte	0xdc9
+	.4byte	.LLST136
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x57
+	.4byte	0xdc9
+	.4byte	.LLST137
+	.uleb128 0x36
+	.8byte	.LVL549
+	.4byte	0x6cf6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x76
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF630
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdd4
+	.8byte	.LFB306
+	.8byte	.LFE306-.LFB306
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3572
+	.uleb128 0x31
+	.string	"blk"
+	.byte	0x5
+	.byte	0x49
+	.4byte	0xdc9
+	.4byte	.LLST131
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x4b
+	.4byte	0xdc9
+	.4byte	.LLST132
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF631
+	.byte	0x5
+	.byte	0x38
+	.8byte	.LFB305
+	.8byte	.LFE305-.LFB305
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x35c6
+	.uleb128 0x58
+	.string	"req"
+	.byte	0x5
+	.byte	0x38
+	.4byte	0x1abc
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x59
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x38
+	.4byte	0xdd4
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x3a
+	.4byte	0xdc9
+	.4byte	.LLST129
+	.uleb128 0x32
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x3b
+	.4byte	0xdc9
+	.4byte	.LLST130
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF634
+	.byte	0x5
+	.byte	0x29
+	.8byte	.LFB304
+	.8byte	.LFE304-.LFB304
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x361a
+	.uleb128 0x58
+	.string	"req"
+	.byte	0x5
+	.byte	0x29
+	.4byte	0x1abc
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x59
+	.4byte	.LASF632
+	.byte	0x5
+	.byte	0x29
+	.4byte	0xdd4
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x2b
+	.4byte	0xdc9
+	.4byte	.LLST127
+	.uleb128 0x32
+	.4byte	.LASF633
+	.byte	0x5
+	.byte	0x2c
+	.4byte	0xdc9
+	.4byte	.LLST128
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF635
+	.byte	0x5
+	.byte	0x15
+	.8byte	.LFB303
+	.8byte	.LFE303-.LFB303
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3645
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x5
+	.byte	0x17
+	.4byte	0xdc9
+	.4byte	.LLST126
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF636
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0x5b
+	.8byte	.LFB302
+	.8byte	.LFE302-.LFB302
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3734
+	.uleb128 0x50
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa93
+	.4byte	0xdc9
+	.4byte	.LLST323
+	.uleb128 0x51
+	.string	"ret"
+	.byte	0x2
+	.2byte	0xa95
+	.4byte	0x5b
+	.4byte	.LLST324
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3744
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7176
+	.uleb128 0x34
+	.8byte	.LVL1339
+	.4byte	0xa8ce
+	.4byte	0x36c4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC98
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1344
+	.4byte	0xa8ce
+	.4byte	0x36f7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa9a
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1345
+	.4byte	0x3749
+	.uleb128 0x36
+	.8byte	.LVL1347
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xaaa
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x3744
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x13
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3734
+	.uleb128 0x47
+	.4byte	.LASF637
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x3774
+	.uleb128 0x48
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa7e
+	.4byte	0xdc9
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x3784
+	.4byte	.LASF637
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x3784
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xf
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3774
+	.uleb128 0x46
+	.4byte	.LASF638
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0xdd4
+	.8byte	.LFB300
+	.8byte	.LFE300-.LFB300
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x38b7
+	.uleb128 0x50
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa5e
+	.4byte	0x1f04
+	.4byte	.LLST123
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0xa60
+	.4byte	0xdc9
+	.4byte	.LLST124
+	.uleb128 0x52
+	.4byte	.LASF640
+	.byte	0x2
+	.2byte	0xa61
+	.4byte	0xdd4
+	.4byte	.LLST125
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x34b2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7156
+	.uleb128 0x34
+	.8byte	.LVL508
+	.4byte	0xa8ce
+	.4byte	0x3821
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa63
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL509
+	.4byte	0xa8ce
+	.4byte	0x3854
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa64
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL510
+	.4byte	0xa8ce
+	.4byte	0x3887
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa65
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL514
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa7a
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF641
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x5b
+	.8byte	.LFB299
+	.8byte	.LFE299-.LFB299
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x39c2
+	.uleb128 0x50
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0xa46
+	.4byte	0x1f04
+	.4byte	.LLST389
+	.uleb128 0x52
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0xa48
+	.4byte	0xdc9
+	.4byte	.LLST390
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x39d2
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7149
+	.uleb128 0x34
+	.8byte	.LVL1701
+	.4byte	0xa8ce
+	.4byte	0x393f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR169
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa49
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1702
+	.4byte	0x68bb
+	.4byte	0x3957
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1703
+	.4byte	0x3749
+	.uleb128 0x34
+	.8byte	.LVL1704
+	.4byte	0x39d7
+	.4byte	0x397c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1705
+	.4byte	0x5ce8
+	.uleb128 0x34
+	.8byte	.LVL1706
+	.4byte	0x58ed
+	.4byte	0x39a0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1707
+	.4byte	0x5619
+	.uleb128 0x36
+	.8byte	.LVL1711
+	.4byte	0x68e0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x39d2
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x39c2
+	.uleb128 0x46
+	.4byte	.LASF642
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x5b
+	.8byte	.LFB298
+	.8byte	.LFE298-.LFB298
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3d02
+	.uleb128 0x5a
+	.string	"p"
+	.byte	0x2
+	.2byte	0x9e2
+	.4byte	0x1f04
+	.4byte	.LLST310
+	.uleb128 0x52
+	.4byte	.LASF643
+	.byte	0x2
+	.2byte	0x9e4
+	.4byte	0xdc9
+	.4byte	.LLST311
+	.uleb128 0x49
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.4byte	.LLST312
+	.uleb128 0x51
+	.string	"n"
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.4byte	.LLST313
+	.uleb128 0x49
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x9e5
+	.4byte	0xdc9
+	.uleb128 0x52
+	.4byte	.LASF644
+	.byte	0x2
+	.2byte	0x9e6
+	.4byte	0x5b
+	.4byte	.LLST314
+	.uleb128 0x52
+	.4byte	.LASF645
+	.byte	0x2
+	.2byte	0x9e7
+	.4byte	0xdc9
+	.4byte	.LLST315
+	.uleb128 0x4b
+	.4byte	.LASF646
+	.byte	0x2
+	.2byte	0x9e8
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3d12
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7128
+	.uleb128 0x5b
+	.4byte	0x5398
+	.8byte	.LBB244
+	.8byte	.LBE244-.LBB244
+	.byte	0x2
+	.2byte	0xa18
+	.4byte	0x3ad2
+	.uleb128 0x5c
+	.4byte	0x53b1
+	.4byte	.LLST316
+	.uleb128 0x5c
+	.4byte	0x53a5
+	.4byte	.LLST317
+	.uleb128 0x36
+	.8byte	.LVL1295
+	.4byte	0x9720
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x3e
+	.4byte	0x53b1
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1267
+	.4byte	0xa8ce
+	.4byte	0x3b05
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9e9
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1271
+	.4byte	0x666f
+	.4byte	0x3b24
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR47
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1273
+	.4byte	0xa8ce
+	.4byte	0x3b57
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9f2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1274
+	.4byte	0x4593
+	.4byte	0x3b6f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1275
+	.4byte	0x68bb
+	.4byte	0x3b87
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1276
+	.4byte	0xa8ce
+	.4byte	0x3bba
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9fd
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1279
+	.4byte	0xa8ce
+	.4byte	0x3bed
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa00
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1281
+	.4byte	0xa8ce
+	.4byte	0x3c20
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0b
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1282
+	.4byte	0xa8ce
+	.4byte	0x3c53
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa0d
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1283
+	.4byte	0x5398
+	.4byte	0x3c70
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1286
+	.4byte	0x2721
+	.4byte	0x3c88
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1288
+	.4byte	0x3e95
+	.4byte	0x3ca0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1289
+	.4byte	0x72c7
+	.uleb128 0x34
+	.8byte	.LVL1290
+	.4byte	0x68bb
+	.4byte	0x3cc5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1300
+	.4byte	0x7574
+	.uleb128 0x36
+	.8byte	.LVL1304
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR158
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa42
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x3d12
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x18
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x3d02
+	.uleb128 0x47
+	.4byte	.LASF647
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x3d35
+	.uleb128 0x48
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x9d9
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF648
+	.byte	0x2
+	.2byte	0x98e
+	.4byte	0xdc9
+	.8byte	.LFB296
+	.8byte	.LFE296-.LFB296
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3e01
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x990
+	.4byte	0xdc9
+	.4byte	.LLST114
+	.uleb128 0x52
+	.4byte	.LASF650
+	.byte	0x2
+	.2byte	0x991
+	.4byte	0xdc9
+	.4byte	.LLST115
+	.uleb128 0x52
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x992
+	.4byte	0xdc9
+	.4byte	.LLST116
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x993
+	.4byte	0x1e2c
+	.4byte	.LLST117
+	.uleb128 0x52
+	.4byte	.LASF653
+	.byte	0x2
+	.2byte	0x994
+	.4byte	0xdc9
+	.4byte	.LLST118
+	.uleb128 0x52
+	.4byte	.LASF654
+	.byte	0x2
+	.2byte	0x995
+	.4byte	0xdc9
+	.4byte	.LLST119
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x996
+	.4byte	0xdd4
+	.4byte	.LLST120
+	.uleb128 0x45
+	.8byte	.LVL487
+	.4byte	0x3e01
+	.uleb128 0x45
+	.8byte	.LVL493
+	.4byte	0x3e62
+	.uleb128 0x36
+	.8byte	.LVL495
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC72
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF655
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdc9
+	.8byte	.LFB295
+	.8byte	.LFE295-.LFB295
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3e62
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x979
+	.4byte	0xdc9
+	.4byte	.LLST103
+	.uleb128 0x52
+	.4byte	.LASF656
+	.byte	0x2
+	.2byte	0x97b
+	.4byte	0xdc9
+	.4byte	.LLST104
+	.uleb128 0x52
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x97c
+	.4byte	0xdc9
+	.4byte	.LLST105
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x97d
+	.4byte	0xdc9
+	.4byte	.LLST106
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF657
+	.byte	0x2
+	.2byte	0x970
+	.4byte	0xdc9
+	.8byte	.LFB294
+	.8byte	.LFE294-.LFB294
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3e95
+	.uleb128 0x52
+	.4byte	.LASF651
+	.byte	0x2
+	.2byte	0x972
+	.4byte	0xdc9
+	.4byte	.LLST102
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF658
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0x5b
+	.8byte	.LFB293
+	.8byte	.LFE293-.LFB293
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x3f1d
+	.uleb128 0x50
+	.4byte	.LASF623
+	.byte	0x2
+	.2byte	0x960
+	.4byte	0xdc9
+	.4byte	.LLST98
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdc9
+	.4byte	.LLST99
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x962
+	.4byte	0xdc9
+	.4byte	.LLST100
+	.uleb128 0x52
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x963
+	.4byte	0xdc9
+	.4byte	.LLST101
+	.uleb128 0x34
+	.8byte	.LVL295
+	.4byte	0x6d91
+	.4byte	0x3f0f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL296
+	.4byte	0x74e5
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF659
+	.byte	0x2
+	.2byte	0x901
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x3f47
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x2
+	.2byte	0x903
+	.4byte	0x5b
+	.uleb128 0x4d
+	.uleb128 0x49
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x928
+	.4byte	0x1f04
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF660
+	.byte	0x2
+	.2byte	0x8e2
+	.8byte	.LFB291
+	.8byte	.LFE291-.LFB291
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x404b
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x8e4
+	.4byte	0x5b
+	.4byte	.LLST249
+	.uleb128 0x5e
+	.string	"ppa"
+	.byte	0x2
+	.2byte	0x8e5
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF661
+	.byte	0x2
+	.2byte	0x8e6
+	.4byte	0x2d84
+	.4byte	.LLST250
+	.uleb128 0x34
+	.8byte	.LVL954
+	.4byte	0xa8ce
+	.4byte	0x3fb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC88
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL957
+	.4byte	0x5bbb
+	.4byte	0x3fdb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 140
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL958
+	.4byte	0xa8ce
+	.4byte	0x4000
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC89
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL960
+	.4byte	0x29a4
+	.4byte	0x4029
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL961
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC90
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF662
+	.byte	0x2
+	.2byte	0x8ae
+	.8byte	.LFB290
+	.8byte	.LFE290-.LFB290
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x41cd
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x8b0
+	.4byte	0xdc9
+	.4byte	.LLST281
+	.uleb128 0x51
+	.string	"lpn"
+	.byte	0x2
+	.2byte	0x8b1
+	.4byte	0xdd4
+	.4byte	.LLST282
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x8b2
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x2
+	.2byte	0x8b3
+	.4byte	0xdc9
+	.4byte	.LLST283
+	.uleb128 0x52
+	.4byte	.LASF664
+	.byte	0x2
+	.2byte	0x8b4
+	.4byte	0xdc9
+	.4byte	.LLST284
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x41dd
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7044
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x180
+	.4byte	0x40fd
+	.uleb128 0x52
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x8d1
+	.4byte	0xdc9
+	.4byte	.LLST285
+	.uleb128 0x36
+	.8byte	.LVL1163
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1141
+	.4byte	0xa8ce
+	.4byte	0x4129
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC91
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR156
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1142
+	.4byte	0x259f
+	.4byte	0x414e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2000
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1150
+	.4byte	0xa8ce
+	.4byte	0x4181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8df
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1152
+	.4byte	0x5bbb
+	.4byte	0x41a5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 188
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1153
+	.4byte	0x6cf6
+	.uleb128 0x36
+	.8byte	.LVL1157
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x41dd
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xd
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x41cd
+	.uleb128 0x5d
+	.4byte	.LASF665
+	.byte	0x2
+	.2byte	0x88f
+	.8byte	.LFB289
+	.8byte	.LFE289-.LFB289
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4316
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x891
+	.4byte	0xdc9
+	.4byte	.LLST386
+	.uleb128 0x51
+	.string	"lpn"
+	.byte	0x2
+	.2byte	0x892
+	.4byte	0xdd4
+	.4byte	.LLST387
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x893
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x2
+	.2byte	0x894
+	.4byte	0xdc9
+	.4byte	.LLST388
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x4326
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7028
+	.uleb128 0x34
+	.8byte	.LVL1681
+	.4byte	0xa8ce
+	.4byte	0x427c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC91
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR168
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1682
+	.4byte	0x259f
+	.4byte	0x4294
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1687
+	.4byte	0x5bbb
+	.4byte	0x42b8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1688
+	.4byte	0x6cf6
+	.uleb128 0x34
+	.8byte	.LVL1692
+	.4byte	0xa8ce
+	.4byte	0x42e3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1693
+	.4byte	0x3749
+	.4byte	0x42fb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1694
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1695
+	.4byte	0x5619
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x4326
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x14
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x4316
+	.uleb128 0x5d
+	.4byte	.LASF666
+	.byte	0x2
+	.2byte	0x86b
+	.8byte	.LFB288
+	.8byte	.LFE288-.LFB288
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x43e3
+	.uleb128 0x50
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x86b
+	.4byte	0x1f04
+	.4byte	.LLST354
+	.uleb128 0x2a
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x86d
+	.4byte	0xdf5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x86e
+	.4byte	0x2d84
+	.4byte	.LLST355
+	.uleb128 0x52
+	.4byte	.LASF668
+	.byte	0x2
+	.2byte	0x86f
+	.4byte	0x5b
+	.4byte	.LLST356
+	.uleb128 0x5f
+	.4byte	.LASF384
+	.byte	0x2
+	.2byte	0x870
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1515
+	.4byte	0x3789
+	.4byte	0x43ad
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1518
+	.4byte	0x27e7
+	.4byte	0x43d5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 112
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1519
+	.4byte	0x3645
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF669
+	.byte	0x2
+	.2byte	0x851
+	.8byte	.LFB287
+	.8byte	.LFE287-.LFB287
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4444
+	.uleb128 0x34
+	.8byte	.LVL1659
+	.4byte	0x5955
+	.4byte	0x4423
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1660
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.4byte	.LASF671
+	.byte	0x2
+	.2byte	0x83d
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF672
+	.byte	0x2
+	.2byte	0x812
+	.4byte	0x5b
+	.8byte	.LFB285
+	.8byte	.LFE285-.LFB285
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x457e
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST275
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST276
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST277
+	.uleb128 0x52
+	.4byte	.LASF375
+	.byte	0x2
+	.2byte	0x814
+	.4byte	0xdc9
+	.4byte	.LLST278
+	.uleb128 0x52
+	.4byte	.LASF673
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdc9
+	.4byte	.LLST279
+	.uleb128 0x52
+	.4byte	.LASF674
+	.byte	0x2
+	.2byte	0x815
+	.4byte	0xdc9
+	.4byte	.LLST280
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x458e
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.7003
+	.uleb128 0x34
+	.8byte	.LVL1115
+	.4byte	0x259f
+	.4byte	0x44f9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1119
+	.4byte	0x6d91
+	.4byte	0x4511
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1120
+	.4byte	0x74e5
+	.uleb128 0x34
+	.8byte	.LVL1127
+	.4byte	0x68e0
+	.4byte	0x4536
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1135
+	.4byte	0x68bb
+	.4byte	0x454e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1137
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR155
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x839
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x458e
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x11
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x457e
+	.uleb128 0x46
+	.4byte	.LASF675
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x5b
+	.8byte	.LFB284
+	.8byte	.LFE284-.LFB284
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x464b
+	.uleb128 0x5a
+	.string	"p"
+	.byte	0x2
+	.2byte	0x7fc
+	.4byte	0x1f04
+	.4byte	.LLST95
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdc9
+	.4byte	.LLST96
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7fe
+	.4byte	0xdc9
+	.4byte	.LLST97
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6982
+	.uleb128 0x34
+	.8byte	.LVL278
+	.4byte	0xa8ce
+	.4byte	0x4629
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR61
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL282
+	.4byte	0x6d91
+	.uleb128 0x36
+	.8byte	.LVL284
+	.4byte	0x74e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF676
+	.byte	0x2
+	.2byte	0x7ef
+	.4byte	0x5b
+	.8byte	.LFB283
+	.8byte	.LFE283-.LFB283
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x46ef
+	.uleb128 0x34
+	.8byte	.LVL1802
+	.4byte	0x4715
+	.4byte	0x4685
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1803
+	.4byte	0x46ef
+	.4byte	0x469d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1804
+	.4byte	0x4715
+	.4byte	0x46b5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1805
+	.4byte	0x46ef
+	.4byte	0x46cd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1806
+	.4byte	0x30c4
+	.uleb128 0x36
+	.8byte	.LVL1807
+	.4byte	0x3645
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF712
+	.byte	0x2
+	.2byte	0x7dc
+	.byte	0x1
+	.4byte	0x4715
+	.uleb128 0x48
+	.4byte	.LASF639
+	.byte	0x2
+	.2byte	0x7dc
+	.4byte	0x1f04
+	.uleb128 0x49
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x7de
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF677
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x5b
+	.8byte	.LFB281
+	.8byte	.LFE281-.LFB281
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4d12
+	.uleb128 0x50
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x677
+	.4byte	0x1f04
+	.4byte	.LLST329
+	.uleb128 0x52
+	.4byte	.LASF678
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdc9
+	.4byte	.LLST330
+	.uleb128 0x52
+	.4byte	.LASF679
+	.byte	0x2
+	.2byte	0x679
+	.4byte	0xdc9
+	.4byte	.LLST331
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdc9
+	.4byte	.LLST332
+	.uleb128 0x52
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdc9
+	.4byte	.LLST333
+	.uleb128 0x52
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x67a
+	.4byte	0xdc9
+	.4byte	.LLST334
+	.uleb128 0x52
+	.4byte	.LASF680
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdc9
+	.4byte	.LLST335
+	.uleb128 0x52
+	.4byte	.LASF681
+	.byte	0x2
+	.2byte	0x67b
+	.4byte	0xdc9
+	.4byte	.LLST336
+	.uleb128 0x52
+	.4byte	.LASF594
+	.byte	0x2
+	.2byte	0x67c
+	.4byte	0xdc9
+	.4byte	.LLST337
+	.uleb128 0x52
+	.4byte	.LASF682
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x5b
+	.4byte	.LLST338
+	.uleb128 0x52
+	.4byte	.LASF683
+	.byte	0x2
+	.2byte	0x67d
+	.4byte	0x5b
+	.4byte	.LLST338
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdc9
+	.4byte	.LLST340
+	.uleb128 0x51
+	.string	"n"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdc9
+	.4byte	.LLST341
+	.uleb128 0x51
+	.string	"req"
+	.byte	0x2
+	.2byte	0x67e
+	.4byte	0xdc9
+	.4byte	.LLST342
+	.uleb128 0x5e
+	.string	"lpa"
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x1
+	.byte	0x68
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -12
+	.uleb128 0x2a
+	.4byte	.LASF624
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x2a
+	.4byte	.LASF614
+	.byte	0x2
+	.2byte	0x67f
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdc9
+	.4byte	.LLST343
+	.uleb128 0x52
+	.4byte	.LASF684
+	.byte	0x2
+	.2byte	0x680
+	.4byte	0xdc9
+	.4byte	.LLST344
+	.uleb128 0x52
+	.4byte	.LASF685
+	.byte	0x2
+	.2byte	0x681
+	.4byte	0xdd4
+	.4byte	.LLST345
+	.uleb128 0x52
+	.4byte	.LASF686
+	.byte	0x2
+	.2byte	0x682
+	.4byte	0xdc9
+	.4byte	.LLST346
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x683
+	.4byte	0x2d84
+	.4byte	.LLST347
+	.uleb128 0x5f
+	.4byte	.LASF687
+	.byte	0x2
+	.2byte	0x684
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x4d22
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6925
+	.uleb128 0x56
+	.4byte	.LASF689
+	.byte	0x2
+	.2byte	0x713
+	.8byte	.L1031
+	.uleb128 0x56
+	.4byte	.LASF618
+	.byte	0x2
+	.2byte	0x71b
+	.8byte	.L1046
+	.uleb128 0x56
+	.4byte	.LASF690
+	.byte	0x2
+	.2byte	0x7ce
+	.8byte	.L1052
+	.uleb128 0x4b
+	.4byte	.LASF691
+	.byte	0x2
+	.2byte	0x7d8
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x220
+	.4byte	0x4935
+	.uleb128 0x52
+	.4byte	.LASF692
+	.byte	0x2
+	.2byte	0x6eb
+	.4byte	0xdd4
+	.4byte	.LLST348
+	.uleb128 0x52
+	.4byte	.LASF693
+	.byte	0x2
+	.2byte	0x6ec
+	.4byte	0xdd4
+	.4byte	.LLST349
+	.uleb128 0x36
+	.8byte	.LVL1428
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x250
+	.4byte	0x4a30
+	.uleb128 0x52
+	.4byte	.LASF694
+	.byte	0x2
+	.2byte	0x746
+	.4byte	0xdd4
+	.4byte	.LLST350
+	.uleb128 0x52
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x747
+	.4byte	0xdd4
+	.4byte	.LLST351
+	.uleb128 0x34
+	.8byte	.LVL1471
+	.4byte	0x29a4
+	.4byte	0x497a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1473
+	.4byte	0x3645
+	.uleb128 0x34
+	.8byte	.LVL1479
+	.4byte	0x5bbb
+	.4byte	0x49ab
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 340
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1482
+	.4byte	0x6ca7
+	.4byte	0x49c6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x94
+	.byte	0x4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1483
+	.4byte	0x4d27
+	.4byte	0x49de
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1485
+	.4byte	0x29a4
+	.4byte	0x49fa
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1488
+	.4byte	0x6ca7
+	.4byte	0x4a12
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1489
+	.4byte	0x6ca7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x94
+	.byte	0x4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.8byte	.LBB271
+	.8byte	.LBE271-.LBB271
+	.4byte	0x4aba
+	.uleb128 0x52
+	.4byte	.LASF696
+	.byte	0x2
+	.2byte	0x785
+	.4byte	0xdd4
+	.4byte	.LLST352
+	.uleb128 0x52
+	.4byte	.LASF695
+	.byte	0x2
+	.2byte	0x786
+	.4byte	0xdd4
+	.4byte	.LLST353
+	.uleb128 0x34
+	.8byte	.LVL1497
+	.4byte	0x29a4
+	.4byte	0x4a81
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1498
+	.4byte	0x6ca7
+	.4byte	0x4a99
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1499
+	.4byte	0x5bbb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 344
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1376
+	.4byte	0x6bca
+	.4byte	0x4ad1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1381
+	.4byte	0x29a4
+	.4byte	0x4aee
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1386
+	.4byte	0x6d36
+	.uleb128 0x34
+	.8byte	.LVL1389
+	.4byte	0x4e68
+	.4byte	0x4b1f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1397
+	.4byte	0xa8ce
+	.4byte	0x4b52
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR161
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6aa
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1398
+	.4byte	0xa8ce
+	.4byte	0x4b85
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR161
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6ab
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1407
+	.4byte	0x6ca7
+	.4byte	0x4b9d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1433
+	.4byte	0x5814
+	.4byte	0x4bbc
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1436
+	.4byte	0x29a4
+	.4byte	0x4bd9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1457
+	.4byte	0x6d36
+	.4byte	0x4bf3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x75
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1464
+	.4byte	0x3645
+	.uleb128 0x34
+	.8byte	.LVL1467
+	.4byte	0x6ca7
+	.4byte	0x4c18
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1468
+	.4byte	0x5bbb
+	.4byte	0x4c3c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 344
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1469
+	.4byte	0x6ca7
+	.4byte	0x4c54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1474
+	.4byte	0x6cf6
+	.4byte	0x4c6e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x73
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1476
+	.4byte	0xa8ce
+	.4byte	0x4ca1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR161
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7a5
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1491
+	.4byte	0x5bbb
+	.4byte	0x4cc5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 348
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1492
+	.4byte	0x6cf6
+	.4byte	0x4cdf
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x73
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1501
+	.4byte	0xa8ce
+	.4byte	0x4d04
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC99
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1503
+	.4byte	0x3645
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x4d22
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x15
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x4d12
+	.uleb128 0x5d
+	.4byte	.LASF697
+	.byte	0x2
+	.2byte	0x65b
+	.8byte	.LFB280
+	.8byte	.LFE280-.LFB280
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4e68
+	.uleb128 0x5a
+	.string	"lpa"
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdd4
+	.4byte	.LLST243
+	.uleb128 0x50
+	.4byte	.LASF663
+	.byte	0x2
+	.2byte	0x65b
+	.4byte	0xdd4
+	.4byte	.LLST244
+	.uleb128 0x52
+	.4byte	.LASF629
+	.byte	0x2
+	.2byte	0x65d
+	.4byte	0xdc9
+	.4byte	.LLST245
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6891
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x100
+	.4byte	0x4e2c
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x661
+	.4byte	0xdc9
+	.4byte	.LLST246
+	.uleb128 0x52
+	.4byte	.LASF608
+	.byte	0x2
+	.2byte	0x662
+	.4byte	0xdc9
+	.4byte	.LLST247
+	.uleb128 0x52
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x663
+	.4byte	0xdc9
+	.4byte	.LLST248
+	.uleb128 0x34
+	.8byte	.LVL942
+	.4byte	0x66e6
+	.4byte	0x4de4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR47
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL943
+	.4byte	0xa8ce
+	.4byte	0x4e17
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR146
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x667
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL944
+	.4byte	0x68bb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL936
+	.4byte	0x6cf6
+	.4byte	0x4e47
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL946
+	.4byte	0x5bbb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 124
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF698
+	.byte	0x2
+	.2byte	0x647
+	.8byte	.LFB279
+	.8byte	.LFE279-.LFB279
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4ec5
+	.uleb128 0x62
+	.4byte	.LASF612
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0x1f04
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x50
+	.4byte	.LASF380
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdc9
+	.4byte	.LLST90
+	.uleb128 0x50
+	.4byte	.LASF382
+	.byte	0x2
+	.2byte	0x647
+	.4byte	0xdc9
+	.4byte	.LLST91
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x649
+	.4byte	0xdc9
+	.4byte	.LLST92
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF699
+	.byte	0x2
+	.2byte	0x63e
+	.4byte	0x5b
+	.8byte	.LFB278
+	.8byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f10
+	.uleb128 0x45
+	.8byte	.LVL1106
+	.4byte	0x4f10
+	.uleb128 0x36
+	.8byte	.LVL1107
+	.4byte	0x4fa8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF700
+	.byte	0x2
+	.2byte	0x627
+	.8byte	.LFB277
+	.8byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f6a
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x629
+	.4byte	0xdc9
+	.4byte	.LLST274
+	.uleb128 0x34
+	.8byte	.LVL1103
+	.4byte	0x259f
+	.4byte	0x4f55
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1104
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF701
+	.byte	0x2
+	.2byte	0x617
+	.4byte	0x5b
+	.8byte	.LFB276
+	.8byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4fa8
+	.uleb128 0x36
+	.8byte	.LVL1102
+	.4byte	0x4fa8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR149
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF702
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x5b
+	.8byte	.LFB275
+	.8byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x517a
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x5b9
+	.4byte	0x517a
+	.4byte	.LLST263
+	.uleb128 0x52
+	.4byte	.LASF704
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xdea
+	.4byte	.LLST264
+	.uleb128 0x52
+	.4byte	.LASF299
+	.byte	0x2
+	.2byte	0x5bb
+	.4byte	0xdea
+	.4byte	.LLST265
+	.uleb128 0x52
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x5bc
+	.4byte	0xdea
+	.4byte	.LLST266
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x5bd
+	.4byte	0xdc9
+	.4byte	.LLST267
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x5be
+	.4byte	0x1001
+	.4byte	.LLST268
+	.uleb128 0x52
+	.4byte	.LASF310
+	.byte	0x2
+	.2byte	0x5bf
+	.4byte	0x10f8
+	.4byte	.LLST269
+	.uleb128 0x52
+	.4byte	.LASF311
+	.byte	0x2
+	.2byte	0x5c0
+	.4byte	0x1001
+	.4byte	.LLST270
+	.uleb128 0x52
+	.4byte	.LASF307
+	.byte	0x2
+	.2byte	0x5c1
+	.4byte	0xdc9
+	.4byte	.LLST271
+	.uleb128 0x52
+	.4byte	.LASF707
+	.byte	0x2
+	.2byte	0x5c2
+	.4byte	0xdc9
+	.4byte	.LLST272
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x5c3
+	.4byte	0x5180
+	.4byte	.LLST273
+	.uleb128 0x34
+	.8byte	.LVL1062
+	.4byte	0x259f
+	.4byte	0x50a0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x87
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1067
+	.4byte	0x6bca
+	.4byte	0x50b7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1072
+	.4byte	0x62df
+	.4byte	0x50cf
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1073
+	.4byte	0x6287
+	.4byte	0x50e7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1074
+	.4byte	0x610d
+	.4byte	0x50ff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1075
+	.4byte	0x610d
+	.4byte	0x5117
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1083
+	.4byte	0x29a4
+	.4byte	0x5139
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1087
+	.4byte	0x29a4
+	.4byte	0x515b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1089
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x104f
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1280
+	.uleb128 0x46
+	.4byte	.LASF709
+	.byte	0x2
+	.2byte	0x54f
+	.4byte	0x5b
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5365
+	.uleb128 0x52
+	.4byte	.LASF705
+	.byte	0x2
+	.2byte	0x551
+	.4byte	0xdea
+	.4byte	.LLST461
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6828
+	.uleb128 0x34
+	.8byte	.LVL2076
+	.4byte	0x259f
+	.4byte	0x51e2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2077
+	.4byte	0x6bca
+	.4byte	0x51f9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2079
+	.4byte	0xa8ce
+	.4byte	0x522c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2080
+	.4byte	0xa8ce
+	.4byte	0x525f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x56e
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2082
+	.4byte	0x2527
+	.4byte	0x527d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2083
+	.4byte	0x2527
+	.uleb128 0x45
+	.8byte	.LVL2084
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL2085
+	.4byte	0xa8ce
+	.4byte	0x52ca
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR181
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x584
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2086
+	.4byte	0x4593
+	.4byte	0x52e9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR51
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2087
+	.4byte	0x4593
+	.4byte	0x5308
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR52
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2088
+	.4byte	0x4593
+	.4byte	0x5327
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR53
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2089
+	.4byte	0x4593
+	.4byte	0x5346
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR82
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2091
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF710
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0x5b
+	.8byte	.LFB273
+	.8byte	.LFE273-.LFB273
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5398
+	.uleb128 0x50
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x54a
+	.4byte	0xdc9
+	.4byte	.LLST89
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF713
+	.byte	0x2
+	.2byte	0x542
+	.byte	0x1
+	.4byte	0x53be
+	.uleb128 0x48
+	.4byte	.LASF711
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0xdc9
+	.uleb128 0x48
+	.4byte	.LASF588
+	.byte	0x2
+	.2byte	0x542
+	.4byte	0x5b
+	.byte	0
+	.uleb128 0x4f
+	.4byte	.LASF715
+	.byte	0x2
+	.2byte	0x535
+	.4byte	0x5b
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF716
+	.byte	0x2
+	.2byte	0x446
+	.4byte	0x5b
+	.8byte	.LFB270
+	.8byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5619
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdc9
+	.4byte	.LLST256
+	.uleb128 0x52
+	.4byte	.LASF717
+	.byte	0x2
+	.2byte	0x448
+	.4byte	0xdc9
+	.4byte	.LLST257
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdc9
+	.4byte	.LLST258
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x2
+	.2byte	0x449
+	.4byte	0xdc9
+	.4byte	.LLST259
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xdea
+	.4byte	.LLST260
+	.uleb128 0x51
+	.string	"j"
+	.byte	0x2
+	.2byte	0x44a
+	.4byte	0xdea
+	.4byte	.LLST261
+	.uleb128 0x52
+	.4byte	.LASF718
+	.byte	0x2
+	.2byte	0x44b
+	.4byte	0x5180
+	.4byte	.LLST262
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x41dd
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6771
+	.uleb128 0x34
+	.8byte	.LVL984
+	.4byte	0x259f
+	.4byte	0x5483
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL985
+	.4byte	0x259f
+	.4byte	0x549a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL986
+	.4byte	0x259f
+	.4byte	0x54b1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL987
+	.4byte	0x259f
+	.4byte	0x54c8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL988
+	.4byte	0x259f
+	.4byte	0x54f2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR81
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL991
+	.4byte	0x6d91
+	.4byte	0x550d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 332
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL993
+	.4byte	0x74e5
+	.4byte	0x5525
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1002
+	.4byte	0x29a4
+	.4byte	0x5542
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1007
+	.4byte	0x29a4
+	.4byte	0x555e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1012
+	.4byte	0x6a7f
+	.4byte	0x5576
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1013
+	.4byte	0xa8ce
+	.4byte	0x55a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x48a
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1024
+	.4byte	0xa8ce
+	.4byte	0x55d2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4b3
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1035
+	.4byte	0x6a7f
+	.4byte	0x55e9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1037
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR148
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x530
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF719
+	.byte	0x2
+	.2byte	0x3eb
+	.4byte	0x5b
+	.8byte	.LFB269
+	.8byte	.LFE269-.LFB269
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x57c2
+	.uleb128 0x52
+	.4byte	.LASF300
+	.byte	0x2
+	.2byte	0x3ed
+	.4byte	0xdc9
+	.4byte	.LLST383
+	.uleb128 0x52
+	.4byte	.LASF720
+	.byte	0x2
+	.2byte	0x3ee
+	.4byte	0x57c2
+	.4byte	.LLST384
+	.uleb128 0x52
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x3ef
+	.4byte	0xdc9
+	.4byte	.LLST385
+	.uleb128 0x4b
+	.4byte	.LASF722
+	.byte	0x2
+	.2byte	0x41c
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6749
+	.uleb128 0x34
+	.8byte	.LVL1663
+	.4byte	0x259f
+	.4byte	0x569e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1664
+	.4byte	0x2527
+	.4byte	0x56c3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR79
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1665
+	.4byte	0x2527
+	.uleb128 0x45
+	.8byte	.LVL1666
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL1667
+	.4byte	0x58c9
+	.4byte	0x56f5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1669
+	.4byte	0x27e7
+	.4byte	0x571c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1671
+	.4byte	0x6905
+	.uleb128 0x34
+	.8byte	.LVL1672
+	.4byte	0x27e7
+	.4byte	0x5750
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1673
+	.4byte	0xa8ce
+	.4byte	0x5783
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR167
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x433
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1676
+	.4byte	0xa8ce
+	.4byte	0x57a8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC101
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1677
+	.4byte	0x6a7f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x12d8
+	.uleb128 0x60
+	.4byte	.LASF723
+	.byte	0x2
+	.2byte	0x3b2
+	.byte	0x1
+	.4byte	0x5814
+	.uleb128 0x4d
+	.uleb128 0x4a
+	.string	"lpa"
+	.byte	0x2
+	.2byte	0x3b7
+	.4byte	0xdd4
+	.uleb128 0x4a
+	.string	"ppa"
+	.byte	0x2
+	.2byte	0x3b8
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF724
+	.byte	0x2
+	.2byte	0x3b9
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF667
+	.byte	0x2
+	.2byte	0x3ba
+	.4byte	0xdf5
+	.uleb128 0x49
+	.4byte	.LASF596
+	.byte	0x2
+	.2byte	0x3bb
+	.4byte	0x2d84
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF725
+	.byte	0x2
+	.2byte	0x380
+	.8byte	.LFB267
+	.8byte	.LFE267-.LFB267
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x58c9
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x380
+	.4byte	0x517a
+	.4byte	.LLST252
+	.uleb128 0x51
+	.string	"ppa"
+	.byte	0x2
+	.2byte	0x382
+	.4byte	0xdd4
+	.4byte	.LLST253
+	.uleb128 0x52
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x383
+	.4byte	0xdc9
+	.4byte	.LLST254
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x384
+	.4byte	0x1001
+	.4byte	.LLST255
+	.uleb128 0x34
+	.8byte	.LVL978
+	.4byte	0x29a4
+	.4byte	0x589b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.8byte	.LVL980
+	.4byte	0x5e2b
+	.4byte	0x58b4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL982
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF726
+	.byte	0x2
+	.2byte	0x371
+	.byte	0x1
+	.4byte	0x58ed
+	.uleb128 0x48
+	.4byte	.LASF393
+	.byte	0x2
+	.2byte	0x371
+	.4byte	0xdd4
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x2
+	.2byte	0x373
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF727
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0x5b
+	.8byte	.LFB265
+	.8byte	.LFE265-.LFB265
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5955
+	.uleb128 0x50
+	.4byte	.LASF728
+	.byte	0x2
+	.2byte	0x35c
+	.4byte	0xdd4
+	.4byte	.LLST373
+	.uleb128 0x52
+	.4byte	.LASF729
+	.byte	0x2
+	.2byte	0x35e
+	.4byte	0xdd4
+	.4byte	.LLST374
+	.uleb128 0x34
+	.8byte	.LVL1625
+	.4byte	0x5a7d
+	.4byte	0x5947
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1626
+	.4byte	0x4444
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF730
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdd4
+	.8byte	.LFB264
+	.8byte	.LFE264-.LFB264
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a77
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdd4
+	.4byte	.LLST375
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0xdd4
+	.4byte	.LLST376
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x336
+	.4byte	0x5a77
+	.4byte	.LLST377
+	.uleb128 0x51
+	.string	"len"
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdc9
+	.4byte	.LLST378
+	.uleb128 0x52
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0xdc9
+	.4byte	.LLST379
+	.uleb128 0x51
+	.string	"ppn"
+	.byte	0x2
+	.2byte	0x339
+	.4byte	0xdd4
+	.4byte	.LLST380
+	.uleb128 0x52
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x33a
+	.4byte	0xdd4
+	.4byte	.LLST381
+	.uleb128 0x5e
+	.string	"req"
+	.byte	0x2
+	.2byte	0x33b
+	.4byte	0xdf5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x52
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x33c
+	.4byte	0xdd4
+	.4byte	.LLST382
+	.uleb128 0x2a
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x33d
+	.4byte	0x2711
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x34
+	.8byte	.LVL1645
+	.4byte	0x29a4
+	.4byte	0x5a39
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 208
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1647
+	.4byte	0x2527
+	.4byte	0x5a57
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1654
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xdbe
+	.uleb128 0x46
+	.4byte	.LASF737
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdd4
+	.8byte	.LFB263
+	.8byte	.LFE263-.LFB263
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5bbb
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdd4
+	.4byte	.LLST365
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0xdd4
+	.4byte	.LLST366
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x311
+	.4byte	0x5a77
+	.4byte	.LLST367
+	.uleb128 0x51
+	.string	"len"
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdc9
+	.4byte	.LLST368
+	.uleb128 0x52
+	.4byte	.LASF734
+	.byte	0x2
+	.2byte	0x313
+	.4byte	0xdc9
+	.4byte	.LLST369
+	.uleb128 0x51
+	.string	"ppn"
+	.byte	0x2
+	.2byte	0x314
+	.4byte	0xdd4
+	.4byte	.LLST370
+	.uleb128 0x52
+	.4byte	.LASF735
+	.byte	0x2
+	.2byte	0x315
+	.4byte	0xdd4
+	.4byte	.LLST371
+	.uleb128 0x5e
+	.string	"req"
+	.byte	0x2
+	.2byte	0x316
+	.4byte	0xdf5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x52
+	.4byte	.LASF736
+	.byte	0x2
+	.2byte	0x317
+	.4byte	0xdd4
+	.4byte	.LLST372
+	.uleb128 0x2a
+	.4byte	.LASF565
+	.byte	0x2
+	.2byte	0x318
+	.4byte	0x2711
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x34
+	.8byte	.LVL1606
+	.4byte	0x29a4
+	.4byte	0x5b61
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 208
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1608
+	.4byte	0x2527
+	.4byte	0x5b82
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1612
+	.4byte	0x5e2b
+	.4byte	0x5ba7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR149
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1617
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF738
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x5b
+	.8byte	.LFB262
+	.8byte	.LFE262-.LFB262
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5cd3
+	.uleb128 0x5a
+	.string	"lpn"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0xdd4
+	.4byte	.LLST237
+	.uleb128 0x5a
+	.string	"ppn"
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x1001
+	.4byte	.LLST238
+	.uleb128 0x50
+	.4byte	.LASF739
+	.byte	0x2
+	.2byte	0x2f0
+	.4byte	0x5b
+	.4byte	.LLST239
+	.uleb128 0x52
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdc9
+	.4byte	.LLST240
+	.uleb128 0x52
+	.4byte	.LASF741
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdc9
+	.4byte	.LLST241
+	.uleb128 0x52
+	.4byte	.LASF742
+	.byte	0x2
+	.2byte	0x2f2
+	.4byte	0xdc9
+	.4byte	.LLST242
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x5ce3
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6676
+	.uleb128 0x56
+	.4byte	.LASF743
+	.byte	0x2
+	.2byte	0x2fb
+	.8byte	.L656
+	.uleb128 0x34
+	.8byte	.LVL920
+	.4byte	0xa8ce
+	.4byte	0x5c93
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR145
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2f7
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL923
+	.4byte	0x5d3a
+	.uleb128 0x34
+	.8byte	.LVL925
+	.4byte	0x5dcd
+	.4byte	0x5cb8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL926
+	.4byte	0x63c2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x5ce3
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x8
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x5cd3
+	.uleb128 0x46
+	.4byte	.LASF744
+	.byte	0x2
+	.2byte	0x2e3
+	.4byte	0x5b
+	.8byte	.LFB261
+	.8byte	.LFE261-.LFB261
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5d3a
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x2e5
+	.4byte	0xdc9
+	.4byte	.LLST328
+	.uleb128 0x45
+	.8byte	.LVL1361
+	.4byte	0x57c8
+	.uleb128 0x36
+	.8byte	.LVL1364
+	.4byte	0x5dcd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF745
+	.byte	0x2
+	.2byte	0x2bb
+	.4byte	0xdc9
+	.8byte	.LFB260
+	.8byte	.LFE260-.LFB260
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5dcd
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x2
+	.2byte	0x2bd
+	.4byte	0xdc9
+	.4byte	.LLST83
+	.uleb128 0x52
+	.4byte	.LASF746
+	.byte	0x2
+	.2byte	0x2be
+	.4byte	0xdc9
+	.4byte	.LLST84
+	.uleb128 0x52
+	.4byte	.LASF747
+	.byte	0x2
+	.2byte	0x2bf
+	.4byte	0xdd4
+	.4byte	.LLST85
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x4d22
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6659
+	.uleb128 0x36
+	.8byte	.LVL237
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR58
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2df
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF748
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0x5b
+	.8byte	.LFB259
+	.8byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5e2b
+	.uleb128 0x50
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0xdc9
+	.4byte	.LLST235
+	.uleb128 0x52
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x2b3
+	.4byte	0xdd4
+	.4byte	.LLST236
+	.uleb128 0x36
+	.8byte	.LVL913
+	.4byte	0x5e2b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF749
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x5b
+	.8byte	.LFB258
+	.8byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5fbc
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x517a
+	.4byte	.LLST222
+	.uleb128 0x50
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0xdd4
+	.4byte	.LLST223
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x2
+	.2byte	0x276
+	.4byte	0x1001
+	.4byte	.LLST224
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x278
+	.4byte	0xdd4
+	.4byte	.LLST225
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x279
+	.4byte	0x5180
+	.4byte	.LLST226
+	.uleb128 0x52
+	.4byte	.LASF721
+	.byte	0x2
+	.2byte	0x27a
+	.4byte	0xdc9
+	.4byte	.LLST227
+	.uleb128 0x4b
+	.4byte	.LASF750
+	.byte	0x2
+	.2byte	0x27c
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6634
+	.uleb128 0x34
+	.8byte	.LVL871
+	.4byte	0x5fbc
+	.4byte	0x5ee0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL872
+	.4byte	0xa8ce
+	.4byte	0x5f0c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28a
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL873
+	.4byte	0xa8ce
+	.4byte	0x5f38
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x28b
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL875
+	.4byte	0x259f
+	.4byte	0x5f54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL878
+	.4byte	0x27e7
+	.4byte	0x5f7b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL880
+	.4byte	0xa8ce
+	.4byte	0x5f9a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC86
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL881
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC87
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF751
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x5b
+	.8byte	.LFB257
+	.8byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x60f8
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x246
+	.4byte	0x517a
+	.4byte	.LLST216
+	.uleb128 0x49
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdc9
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x248
+	.4byte	0xdc9
+	.4byte	.LLST217
+	.uleb128 0x52
+	.4byte	.LASF752
+	.byte	0x2
+	.2byte	0x249
+	.4byte	0xdc9
+	.4byte	.LLST218
+	.uleb128 0x52
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x24a
+	.4byte	0x10f8
+	.4byte	.LLST219
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x24b
+	.4byte	0x1001
+	.4byte	.LLST220
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x5180
+	.4byte	.LLST221
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x6108
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6620
+	.uleb128 0x34
+	.8byte	.LVL850
+	.4byte	0xa8ce
+	.4byte	0x6090
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR141
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x250
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL851
+	.4byte	0x6905
+	.uleb128 0x34
+	.8byte	.LVL858
+	.4byte	0x259f
+	.4byte	0x60b5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL862
+	.4byte	0x27e7
+	.4byte	0x60e3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL863
+	.4byte	0x610d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x6108
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x60f8
+	.uleb128 0x46
+	.4byte	.LASF754
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x5b
+	.8byte	.LFB256
+	.8byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6287
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x218
+	.4byte	0x517a
+	.4byte	.LLST228
+	.uleb128 0x52
+	.4byte	.LASF755
+	.byte	0x2
+	.2byte	0x21a
+	.4byte	0xdc9
+	.4byte	.LLST229
+	.uleb128 0x52
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x21b
+	.4byte	0xdc9
+	.4byte	.LLST230
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x21c
+	.4byte	0xdc9
+	.4byte	.LLST231
+	.uleb128 0x52
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x21d
+	.4byte	0x10f8
+	.4byte	.LLST232
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x21e
+	.4byte	0x1001
+	.4byte	.LLST233
+	.uleb128 0x52
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x21f
+	.4byte	0x5180
+	.4byte	.LLST234
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6606
+	.uleb128 0x34
+	.8byte	.LVL890
+	.4byte	0x62df
+	.4byte	0x61ca
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL893
+	.4byte	0x6287
+	.4byte	0x61e2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL895
+	.4byte	0x6a7f
+	.4byte	0x61ff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL897
+	.4byte	0x6287
+	.4byte	0x6217
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL902
+	.4byte	0x29a4
+	.4byte	0x6240
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL903
+	.4byte	0xa8ce
+	.4byte	0x626c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x234
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL908
+	.4byte	0x5e2b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF757
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x62ca
+	.uleb128 0x48
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x203
+	.4byte	0x517a
+	.uleb128 0x49
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x206
+	.4byte	0x10f8
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x62da
+	.4byte	.LASF757
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x62da
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x19
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x62ca
+	.uleb128 0x46
+	.4byte	.LASF759
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x5b
+	.8byte	.LFB254
+	.8byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x63c2
+	.uleb128 0x50
+	.4byte	.LASF703
+	.byte	0x2
+	.2byte	0x1db
+	.4byte	0x517a
+	.4byte	.LLST207
+	.uleb128 0x52
+	.4byte	.LASF753
+	.byte	0x2
+	.2byte	0x1dd
+	.4byte	0x10f8
+	.4byte	.LLST208
+	.uleb128 0x52
+	.4byte	.LASF706
+	.byte	0x2
+	.2byte	0x1de
+	.4byte	0x1001
+	.4byte	.LLST209
+	.uleb128 0x52
+	.4byte	.LASF760
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x10f8
+	.4byte	.LLST210
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdc9
+	.4byte	.LLST211
+	.uleb128 0x52
+	.4byte	.LASF330
+	.byte	0x2
+	.2byte	0x1e0
+	.4byte	0xdc9
+	.4byte	.LLST212
+	.uleb128 0x52
+	.4byte	.LASF758
+	.byte	0x2
+	.2byte	0x1e1
+	.4byte	0xdc9
+	.4byte	.LLST213
+	.uleb128 0x52
+	.4byte	.LASF761
+	.byte	0x2
+	.2byte	0x1e2
+	.4byte	0xdc9
+	.4byte	.LLST214
+	.uleb128 0x52
+	.4byte	.LASF756
+	.byte	0x2
+	.2byte	0x1e3
+	.4byte	0xdc9
+	.4byte	.LLST215
+	.uleb128 0x34
+	.8byte	.LVL827
+	.4byte	0x259f
+	.4byte	0x63ae
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL844
+	.4byte	0x6a7f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF762
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0x5b
+	.8byte	.LFB253
+	.8byte	.LFE253-.LFB253
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x654a
+	.uleb128 0x50
+	.4byte	.LASF317
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdc9
+	.4byte	.LLST204
+	.uleb128 0x50
+	.4byte	.LASF740
+	.byte	0x2
+	.2byte	0x1b9
+	.4byte	0xdc9
+	.4byte	.LLST205
+	.uleb128 0x2a
+	.4byte	.LASF708
+	.byte	0x2
+	.2byte	0x1bb
+	.4byte	0x5180
+	.uleb128 0x1
+	.byte	0x69
+	.uleb128 0x52
+	.4byte	.LASF763
+	.byte	0x2
+	.2byte	0x1bc
+	.4byte	0xdd4
+	.4byte	.LLST206
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x3784
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6563
+	.uleb128 0x34
+	.8byte	.LVL811
+	.4byte	0xa8ce
+	.4byte	0x6468
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR140
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1be
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL814
+	.4byte	0x259f
+	.4byte	0x6480
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL818
+	.4byte	0x29a4
+	.4byte	0x64a2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL820
+	.4byte	0xa8ce
+	.4byte	0x64cd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC83
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL821
+	.4byte	0x2b1c
+	.4byte	0x64f6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC84
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL822
+	.4byte	0x2b1c
+	.4byte	0x651a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC85
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL823
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR140
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1d3
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF764
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x65c9
+	.uleb128 0x48
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x193
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF765
+	.byte	0x2
+	.2byte	0x195
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF766
+	.byte	0x2
+	.2byte	0x196
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF767
+	.byte	0x2
+	.2byte	0x197
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF768
+	.byte	0x2
+	.2byte	0x199
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF769
+	.byte	0x2
+	.2byte	0x19a
+	.4byte	0xdd4
+	.uleb128 0x49
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1e2c
+	.uleb128 0x49
+	.4byte	.LASF770
+	.byte	0x2
+	.2byte	0x19b
+	.4byte	0x1e2c
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x4d22
+	.4byte	.LASF764
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF771
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0x5b
+	.8byte	.LFB251
+	.8byte	.LFE251-.LFB251
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x661c
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x17f
+	.4byte	0xdc9
+	.4byte	.LLST67
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x181
+	.4byte	0xdc9
+	.4byte	.LLST68
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x182
+	.4byte	0x1e2c
+	.4byte	.LLST69
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF772
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x5b
+	.8byte	.LFB250
+	.8byte	.LFE250-.LFB250
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6669
+	.uleb128 0x50
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x17a
+	.4byte	0x6669
+	.4byte	.LLST66
+	.uleb128 0x2f
+	.8byte	.LVL187
+	.4byte	0x666f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x1e2c
+	.uleb128 0x46
+	.4byte	.LASF774
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x5b
+	.8byte	.LFB249
+	.8byte	.LFE249-.LFB249
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x66e6
+	.uleb128 0x50
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0x6669
+	.4byte	.LLST62
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x2
+	.2byte	0x167
+	.4byte	0xdc9
+	.4byte	.LLST63
+	.uleb128 0x52
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x169
+	.4byte	0xdc9
+	.4byte	.LLST64
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x16a
+	.4byte	0x1e2c
+	.4byte	.LLST65
+	.uleb128 0x36
+	.8byte	.LVL178
+	.4byte	0x66e6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF775
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x5b
+	.8byte	.LFB248
+	.8byte	.LFE248-.LFB248
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x678b
+	.uleb128 0x50
+	.4byte	.LASF773
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0x6669
+	.4byte	.LLST58
+	.uleb128 0x50
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x14c
+	.4byte	0xdc9
+	.4byte	.LLST59
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1e2c
+	.4byte	.LLST60
+	.uleb128 0x52
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x14e
+	.4byte	0x1e2c
+	.4byte	.LLST61
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x679b
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6522
+	.uleb128 0x36
+	.8byte	.LVL164
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x151
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x679b
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0x10
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x678b
+	.uleb128 0x46
+	.4byte	.LASF777
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0x5b
+	.8byte	.LFB247
+	.8byte	.LFE247-.LFB247
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6821
+	.uleb128 0x50
+	.4byte	.LASF649
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0xdc9
+	.4byte	.LLST51
+	.uleb128 0x52
+	.4byte	.LASF652
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1e2c
+	.4byte	.LLST52
+	.uleb128 0x52
+	.4byte	.LASF776
+	.byte	0x2
+	.2byte	0x11d
+	.4byte	0x1e2c
+	.4byte	.LLST53
+	.uleb128 0x2a
+	.4byte	.LASF778
+	.byte	0x2
+	.2byte	0x11e
+	.4byte	0xdc9
+	.uleb128 0x1
+	.byte	0x5d
+	.uleb128 0x52
+	.4byte	.LASF779
+	.byte	0x2
+	.2byte	0x11f
+	.4byte	0xdc9
+	.4byte	.LLST54
+	.uleb128 0x52
+	.4byte	.LASF780
+	.byte	0x2
+	.2byte	0x120
+	.4byte	0xdc9
+	.4byte	.LLST55
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF781
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0x5b
+	.8byte	.LFB246
+	.8byte	.LFE246-.LFB246
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x68bb
+	.uleb128 0x2e
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xd8
+	.4byte	0xdc9
+	.4byte	.LLST41
+	.uleb128 0x32
+	.4byte	.LASF652
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1e2c
+	.4byte	.LLST42
+	.uleb128 0x32
+	.4byte	.LASF776
+	.byte	0x2
+	.byte	0xda
+	.4byte	0x1e2c
+	.4byte	.LLST43
+	.uleb128 0x32
+	.4byte	.LASF782
+	.byte	0x2
+	.byte	0xdb
+	.4byte	0xdc9
+	.4byte	.LLST44
+	.uleb128 0x32
+	.4byte	.LASF783
+	.byte	0x2
+	.byte	0xdc
+	.4byte	0xdc9
+	.4byte	.LLST45
+	.uleb128 0x32
+	.4byte	.LASF767
+	.byte	0x2
+	.byte	0xdd
+	.4byte	0xdd4
+	.4byte	.LLST46
+	.uleb128 0x32
+	.4byte	.LASF784
+	.byte	0x2
+	.byte	0xde
+	.4byte	0xdd4
+	.4byte	.LLST47
+	.uleb128 0x32
+	.4byte	.LASF780
+	.byte	0x2
+	.byte	0xdf
+	.4byte	0xdc9
+	.4byte	.LLST48
+	.byte	0
+	.uleb128 0x63
+	.4byte	.LASF785
+	.byte	0x2
+	.byte	0xb9
+	.byte	0x1
+	.4byte	0x68e0
+	.uleb128 0x38
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb9
+	.4byte	0xdc9
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x679b
+	.4byte	.LASF785
+	.byte	0
+	.uleb128 0x63
+	.4byte	.LASF786
+	.byte	0x2
+	.byte	0xb2
+	.byte	0x1
+	.4byte	0x6905
+	.uleb128 0x38
+	.4byte	.LASF649
+	.byte	0x2
+	.byte	0xb2
+	.4byte	0xdc9
+	.uleb128 0x4c
+	.4byte	.LASF574
+	.4byte	0x679b
+	.4byte	.LASF786
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF787
+	.byte	0x2
+	.byte	0xa4
+	.4byte	0xdc9
+	.8byte	.LFB243
+	.8byte	.LFE243-.LFB243
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6970
+	.uleb128 0x33
+	.string	"tmp"
+	.byte	0x2
+	.byte	0xa6
+	.4byte	0xdc9
+	.4byte	.LLST39
+	.uleb128 0x61
+	.8byte	.LBB174
+	.8byte	.LBE174-.LBB174
+	.4byte	0x6958
+	.uleb128 0x33
+	.string	"Q"
+	.byte	0x2
+	.byte	0xa9
+	.4byte	0x6970
+	.4byte	.LLST40
+	.byte	0
+	.uleb128 0x64
+	.4byte	0x6b52
+	.8byte	.LBB172
+	.8byte	.LBE172-.LBB172
+	.byte	0x2
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x15a4
+	.uleb128 0x2d
+	.4byte	.LASF788
+	.byte	0x2
+	.byte	0x92
+	.4byte	0x5b
+	.8byte	.LFB242
+	.8byte	.LFE242-.LFB242
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x69ea
+	.uleb128 0x31
+	.string	"blk"
+	.byte	0x2
+	.byte	0x92
+	.4byte	0xdc9
+	.4byte	.LLST36
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x2
+	.byte	0x94
+	.4byte	0x5b
+	.4byte	.LLST37
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x2
+	.byte	0x95
+	.4byte	0xdd4
+	.4byte	.LLST38
+	.uleb128 0x3d
+	.string	"Q"
+	.byte	0x2
+	.byte	0x96
+	.4byte	0x6970
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x65
+	.4byte	0x6b46
+	.8byte	.LBB168
+	.4byte	.Ldebug_ranges0+0x30
+	.byte	0x2
+	.byte	0x98
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF789
+	.byte	0x2
+	.byte	0x73
+	.8byte	.LFB241
+	.8byte	.LFE241-.LFB241
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6a7f
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdc9
+	.4byte	.LLST30
+	.uleb128 0x33
+	.string	"tmp"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdc9
+	.4byte	.LLST31
+	.uleb128 0x33
+	.string	"j"
+	.byte	0x2
+	.byte	0x75
+	.4byte	0xdc9
+	.4byte	.LLST32
+	.uleb128 0x32
+	.4byte	.LASF599
+	.byte	0x2
+	.byte	0x76
+	.4byte	0xdc9
+	.4byte	.LLST33
+	.uleb128 0x32
+	.4byte	.LASF790
+	.byte	0x2
+	.byte	0x77
+	.4byte	0xdc9
+	.4byte	.LLST34
+	.uleb128 0x32
+	.4byte	.LASF791
+	.byte	0x2
+	.byte	0x78
+	.4byte	0xdd4
+	.4byte	.LLST35
+	.uleb128 0x3d
+	.string	"Q"
+	.byte	0x2
+	.byte	0x79
+	.4byte	0x6970
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x45
+	.8byte	.LVL79
+	.4byte	0x6cf6
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF792
+	.byte	0x2
+	.byte	0x61
+	.8byte	.LFB240
+	.8byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6b46
+	.uleb128 0x31
+	.string	"blk"
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdc9
+	.4byte	.LLST182
+	.uleb128 0x2e
+	.4byte	.LASF793
+	.byte	0x2
+	.byte	0x61
+	.4byte	0xdc9
+	.4byte	.LLST183
+	.uleb128 0x61
+	.8byte	.LBB219
+	.8byte	.LBE219-.LBB219
+	.4byte	0x6b2e
+	.uleb128 0x33
+	.string	"Q"
+	.byte	0x2
+	.byte	0x64
+	.4byte	0x6970
+	.4byte	.LLST184
+	.uleb128 0x66
+	.8byte	.LBB220
+	.8byte	.LBE220-.LBB220
+	.uleb128 0x32
+	.4byte	.LASF794
+	.byte	0x2
+	.byte	0x66
+	.4byte	0xdc9
+	.4byte	.LLST185
+	.uleb128 0x34
+	.8byte	.LVL679
+	.4byte	0x6cf6
+	.4byte	0x6b14
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL682
+	.4byte	0x2721
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.4byte	0x6b46
+	.8byte	.LBB217
+	.8byte	.LBE217-.LBB217
+	.byte	0x2
+	.byte	0x63
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF795
+	.byte	0x2
+	.byte	0x5c
+	.4byte	0xdc9
+	.byte	0x1
+	.uleb128 0x67
+	.4byte	.LASF796
+	.byte	0x2
+	.byte	0x57
+	.4byte	0xdc9
+	.byte	0x1
+	.uleb128 0x2d
+	.4byte	.LASF797
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdc9
+	.8byte	.LFB237
+	.8byte	.LFE237-.LFB237
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6bca
+	.uleb128 0x31
+	.string	"max"
+	.byte	0x2
+	.byte	0x4b
+	.4byte	0xdc9
+	.4byte	.LLST203
+	.uleb128 0x3d
+	.string	"Q"
+	.byte	0x2
+	.byte	0x4d
+	.4byte	0x6970
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x36
+	.8byte	.LVL807
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR38+8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF798
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x5b
+	.8byte	.LFB236
+	.8byte	.LFE236-.LFB236
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6ca7
+	.uleb128 0x2e
+	.4byte	.LASF388
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0xdd4
+	.4byte	.LLST161
+	.uleb128 0x2e
+	.4byte	.LASF568
+	.byte	0x2
+	.byte	0x2e
+	.4byte	0x5b
+	.4byte	.LLST162
+	.uleb128 0x3d
+	.string	"req"
+	.byte	0x2
+	.byte	0x30
+	.4byte	0xdf5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x33
+	.string	"low"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xdea
+	.4byte	.LLST163
+	.uleb128 0x32
+	.4byte	.LASF799
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xdea
+	.4byte	.LLST164
+	.uleb128 0x33
+	.string	"mid"
+	.byte	0x2
+	.byte	0x31
+	.4byte	0xdea
+	.4byte	.LLST165
+	.uleb128 0x2b
+	.4byte	.LASF800
+	.byte	0x2
+	.byte	0x32
+	.4byte	0x2711
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x32
+	.4byte	.LASF801
+	.byte	0x2
+	.byte	0x33
+	.4byte	0xdc9
+	.4byte	.LLST166
+	.uleb128 0x34
+	.8byte	.LVL624
+	.4byte	0x29a4
+	.4byte	0x6c86
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 112
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL633
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 112
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF802
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdd4
+	.8byte	.LFB235
+	.8byte	.LFE235-.LFB235
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6cf6
+	.uleb128 0x2e
+	.4byte	.LASF803
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdd4
+	.4byte	.LLST27
+	.uleb128 0x2e
+	.4byte	.LASF804
+	.byte	0x2
+	.byte	0x1e
+	.4byte	0xdd4
+	.4byte	.LLST28
+	.uleb128 0x33
+	.string	"ret"
+	.byte	0x2
+	.byte	0x20
+	.4byte	0xdd4
+	.4byte	.LLST29
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF805
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdc9
+	.8byte	.LFB234
+	.8byte	.LFE234-.LFB234
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6d36
+	.uleb128 0x2e
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0x14
+	.4byte	0xdc9
+	.4byte	.LLST25
+	.uleb128 0x32
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x16
+	.4byte	0xdc9
+	.4byte	.LLST26
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF806
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdc9
+	.8byte	.LFB233
+	.8byte	.LFE233-.LFB233
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6d91
+	.uleb128 0x2e
+	.4byte	.LASF594
+	.byte	0x2
+	.byte	0xc
+	.4byte	0xdc9
+	.4byte	.LLST24
+	.uleb128 0x2b
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0xe
+	.4byte	0xdc9
+	.uleb128 0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF807
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdc9
+	.8byte	.LFB232
+	.8byte	.LFE232-.LFB232
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6dde
+	.uleb128 0x2e
+	.4byte	.LASF592
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdc9
+	.4byte	.LLST22
+	.uleb128 0x59
+	.4byte	.LASF717
+	.byte	0x2
+	.byte	0x4
+	.4byte	0xdc9
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x32
+	.4byte	.LASF608
+	.byte	0x2
+	.byte	0x6
+	.4byte	0xdc9
+	.4byte	.LLST23
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF808
+	.byte	0x4
+	.2byte	0x13c
+	.4byte	0xddf
+	.8byte	.LFB231
+	.8byte	.LFE231-.LFB231
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7029
+	.uleb128 0x51
+	.string	"die"
+	.byte	0x4
+	.2byte	0x13e
+	.4byte	0xdd4
+	.4byte	.LLST361
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x4
+	.2byte	0x13f
+	.4byte	0xdc9
+	.4byte	.LLST362
+	.uleb128 0x52
+	.4byte	.LASF577
+	.byte	0x4
+	.2byte	0x140
+	.4byte	0xdd4
+	.4byte	.LLST363
+	.uleb128 0x52
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x142
+	.4byte	0x7029
+	.4byte	.LLST364
+	.uleb128 0x4b
+	.4byte	.LASF810
+	.byte	0x4
+	.2byte	0x158
+	.uleb128 0x45
+	.8byte	.LVL1545
+	.4byte	0x7283
+	.uleb128 0x45
+	.8byte	.LVL1546
+	.4byte	0x702f
+	.uleb128 0x34
+	.8byte	.LVL1552
+	.4byte	0x74e5
+	.4byte	0x6e7a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1553
+	.4byte	0x26cd
+	.4byte	0x6e92
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1554
+	.4byte	0x7574
+	.4byte	0x6eaa
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1560
+	.4byte	0x29a4
+	.4byte	0x6ecc
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1561
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL1563
+	.4byte	0x7574
+	.4byte	0x6ef1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1565
+	.4byte	0x2611
+	.4byte	0x6f09
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1566
+	.4byte	0x7441
+	.uleb128 0x45
+	.8byte	.LVL1568
+	.4byte	0x74e5
+	.uleb128 0x34
+	.8byte	.LVL1569
+	.4byte	0x259f
+	.4byte	0x6f3f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1570
+	.4byte	0x259f
+	.4byte	0x6f5d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1572
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL1573
+	.4byte	0x2721
+	.4byte	0x6f8c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1574
+	.4byte	0x27e7
+	.4byte	0x6fb3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1575
+	.4byte	0x7574
+	.4byte	0x6fcb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1581
+	.4byte	0x7574
+	.uleb128 0x34
+	.8byte	.LVL1585
+	.4byte	0x2721
+	.4byte	0x6ff4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1586
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1587
+	.4byte	0x7574
+	.uleb128 0x45
+	.8byte	.LVL1588
+	.4byte	0x72c7
+	.uleb128 0x45
+	.8byte	.LVL1590
+	.4byte	0x72c7
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x11c8
+	.uleb128 0x46
+	.4byte	.LASF811
+	.byte	0x4
+	.2byte	0x116
+	.4byte	0x5b
+	.8byte	.LFB230
+	.8byte	.LFE230-.LFB230
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x70ac
+	.uleb128 0x51
+	.string	"die"
+	.byte	0x4
+	.2byte	0x118
+	.4byte	0xdd4
+	.4byte	.LLST158
+	.uleb128 0x51
+	.string	"blk"
+	.byte	0x4
+	.2byte	0x119
+	.4byte	0xdc9
+	.4byte	.LLST159
+	.uleb128 0x49
+	.4byte	.LASF812
+	.byte	0x4
+	.2byte	0x11a
+	.4byte	0xdd4
+	.uleb128 0x52
+	.4byte	.LASF809
+	.byte	0x4
+	.2byte	0x11b
+	.4byte	0x7029
+	.4byte	.LLST160
+	.uleb128 0x36
+	.8byte	.LVL614
+	.4byte	0x29a4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF813
+	.byte	0x4
+	.byte	0xac
+	.4byte	0x5b
+	.8byte	.LFB229
+	.8byte	.LFE229-.LFB229
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x721a
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x4
+	.byte	0xae
+	.4byte	0xdd4
+	.4byte	.LLST357
+	.uleb128 0x33
+	.string	"blk"
+	.byte	0x4
+	.byte	0xaf
+	.4byte	0xdc9
+	.4byte	.LLST358
+	.uleb128 0x32
+	.4byte	.LASF705
+	.byte	0x4
+	.byte	0xb0
+	.4byte	0xdea
+	.4byte	.LLST359
+	.uleb128 0x32
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0xb1
+	.4byte	0x7029
+	.4byte	.LLST360
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x722a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6364
+	.uleb128 0x45
+	.8byte	.LVL1521
+	.4byte	0x7283
+	.uleb128 0x34
+	.8byte	.LVL1523
+	.4byte	0x29a4
+	.4byte	0x7149
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1524
+	.4byte	0x29a4
+	.4byte	0x716b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1526
+	.4byte	0x29a4
+	.4byte	0x7194
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR108
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1527
+	.4byte	0x6bca
+	.4byte	0x71ab
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1529
+	.4byte	0xa8ce
+	.4byte	0x71dd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR165
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xfe
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1530
+	.4byte	0x8b14
+	.uleb128 0x34
+	.8byte	.LVL1538
+	.4byte	0x29a4
+	.4byte	0x720c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1543
+	.4byte	0x2527
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x722a
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xa
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x721a
+	.uleb128 0x2d
+	.4byte	.LASF814
+	.byte	0x4
+	.byte	0x9c
+	.4byte	0xdc9
+	.8byte	.LFB228
+	.8byte	.LFE228-.LFB228
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7283
+	.uleb128 0x33
+	.string	"blk"
+	.byte	0x4
+	.byte	0x9e
+	.4byte	0xdc9
+	.4byte	.LLST20
+	.uleb128 0x32
+	.4byte	.LASF815
+	.byte	0x4
+	.byte	0x9f
+	.4byte	0xdc9
+	.4byte	.LLST21
+	.uleb128 0x36
+	.8byte	.LVL53
+	.4byte	0x74e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF816
+	.byte	0x4
+	.byte	0x94
+	.8byte	.LFB227
+	.8byte	.LFE227-.LFB227
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x72c7
+	.uleb128 0x2f
+	.8byte	.LVL804
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR37+12
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF817
+	.byte	0x4
+	.byte	0x4f
+	.4byte	0x5b
+	.8byte	.LFB226
+	.8byte	.LFE226-.LFB226
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7441
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x4
+	.byte	0x51
+	.4byte	0x5b
+	.4byte	.LLST306
+	.uleb128 0x32
+	.4byte	.LASF818
+	.byte	0x4
+	.byte	0x52
+	.4byte	0x5b
+	.4byte	.LLST307
+	.uleb128 0x32
+	.4byte	.LASF809
+	.byte	0x4
+	.byte	0x53
+	.4byte	0x7029
+	.4byte	.LLST308
+	.uleb128 0x32
+	.4byte	.LASF721
+	.byte	0x4
+	.byte	0x54
+	.4byte	0xdc9
+	.4byte	.LLST309
+	.uleb128 0x55
+	.4byte	.LASF819
+	.byte	0x4
+	.byte	0x67
+	.uleb128 0x68
+	.4byte	.LASF574
+	.4byte	0x299f
+	.uleb128 0x34
+	.8byte	.LVL1243
+	.4byte	0x259f
+	.4byte	0x734a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1246
+	.4byte	0x259f
+	.4byte	0x736d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1248
+	.4byte	0xa8ce
+	.4byte	0x7385
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1249
+	.4byte	0x27e7
+	.4byte	0x73ac
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1250
+	.4byte	0x2721
+	.4byte	0x73c8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1251
+	.4byte	0x27e7
+	.4byte	0x73ef
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1253
+	.4byte	0xa8ce
+	.4byte	0x740e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC95
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1254
+	.4byte	0xa8ce
+	.4byte	0x7433
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC96
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1257
+	.4byte	0x2527
+	.byte	0
+	.uleb128 0x43
+	.4byte	.LASF820
+	.byte	0x4
+	.byte	0x41
+	.8byte	.LFB225
+	.8byte	.LFE225-.LFB225
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x74dd
+	.uleb128 0x2e
+	.4byte	.LASF753
+	.byte	0x4
+	.byte	0x41
+	.4byte	0x10f8
+	.4byte	.LLST201
+	.uleb128 0x2e
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x41
+	.4byte	0x1001
+	.4byte	.LLST202
+	.uleb128 0x39
+	.string	"i"
+	.byte	0x4
+	.byte	0x43
+	.4byte	0xdd4
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x41dd
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6321
+	.uleb128 0x34
+	.8byte	.LVL800
+	.4byte	0x259f
+	.4byte	0x74b5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL801
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4a
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF822
+	.byte	0x4
+	.byte	0x26
+	.byte	0x1
+	.uleb128 0x2d
+	.4byte	.LASF823
+	.byte	0x4
+	.byte	0x17
+	.4byte	0x5b
+	.8byte	.LFB223
+	.8byte	.LFE223-.LFB223
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7574
+	.uleb128 0x2e
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x17
+	.4byte	0xdc9
+	.4byte	.LLST16
+	.uleb128 0x33
+	.string	"die"
+	.byte	0x4
+	.byte	0x19
+	.4byte	0xdd4
+	.4byte	.LLST17
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x4
+	.byte	0x1a
+	.4byte	0xdd4
+	.4byte	.LLST18
+	.uleb128 0x2b
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x1b
+	.4byte	0x1001
+	.uleb128 0x27
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.uleb128 0x32
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x1c
+	.4byte	0xdc9
+	.4byte	.LLST19
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF824
+	.byte	0x4
+	.byte	0x4
+	.4byte	0x5b
+	.8byte	.LFB222
+	.8byte	.LFE222-.LFB222
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x75f8
+	.uleb128 0x2e
+	.4byte	.LASF388
+	.byte	0x4
+	.byte	0x4
+	.4byte	0xdc9
+	.4byte	.LLST12
+	.uleb128 0x33
+	.string	"die"
+	.byte	0x4
+	.byte	0x6
+	.4byte	0xdd4
+	.4byte	.LLST13
+	.uleb128 0x32
+	.4byte	.LASF821
+	.byte	0x4
+	.byte	0x7
+	.4byte	0x1001
+	.4byte	.LLST14
+	.uleb128 0x32
+	.4byte	.LASF582
+	.byte	0x4
+	.byte	0x8
+	.4byte	0xdc9
+	.4byte	.LLST15
+	.uleb128 0x36
+	.8byte	.LVL44
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.4byte	.LASF884
+	.byte	0x3
+	.2byte	0x4be
+	.4byte	0xdd4
+	.8byte	.LFB221
+	.8byte	.LFE221-.LFB221
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x46
+	.4byte	.LASF825
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0x5b
+	.8byte	.LFB220
+	.8byte	.LFE220-.LFB220
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7691
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0xb9
+	.4byte	.LLST458
+	.uleb128 0x50
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0xb9
+	.4byte	.LLST459
+	.uleb128 0x5a
+	.string	"buf"
+	.byte	0x3
+	.2byte	0x4b9
+	.4byte	0x7691
+	.4byte	.LLST460
+	.uleb128 0x2f
+	.8byte	.LVL2075
+	.4byte	0x783c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0x94
+	.uleb128 0x46
+	.4byte	.LASF826
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x5b
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7712
+	.uleb128 0x50
+	.4byte	.LASF236
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb9
+	.4byte	.LLST440
+	.uleb128 0x50
+	.4byte	.LASF325
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0xb9
+	.4byte	.LLST441
+	.uleb128 0x5a
+	.string	"buf"
+	.byte	0x3
+	.2byte	0x4b3
+	.4byte	0x7691
+	.4byte	.LLST442
+	.uleb128 0x2f
+	.8byte	.LVL1982
+	.4byte	0x7f5e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF827
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0x5b
+	.8byte	.LFB218
+	.8byte	.LFE218-.LFB218
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x783c
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdd4
+	.4byte	.LLST398
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x484
+	.4byte	0xdd4
+	.4byte	.LLST399
+	.uleb128 0x52
+	.4byte	.LASF734
+	.byte	0x3
+	.2byte	0x486
+	.4byte	0xdc9
+	.4byte	.LLST400
+	.uleb128 0x51
+	.string	"tmp"
+	.byte	0x3
+	.2byte	0x487
+	.4byte	0xdc9
+	.4byte	.LLST401
+	.uleb128 0x51
+	.string	"lpa"
+	.byte	0x3
+	.2byte	0x488
+	.4byte	0xdd4
+	.4byte	.LLST402
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -8
+	.uleb128 0x2a
+	.4byte	.LASF640
+	.byte	0x3
+	.2byte	0x489
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF629
+	.byte	0x3
+	.2byte	0x48a
+	.4byte	0xdc9
+	.4byte	.LLST403
+	.uleb128 0x45
+	.8byte	.LVL1744
+	.4byte	0x7cda
+	.uleb128 0x45
+	.8byte	.LVL1753
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1754
+	.4byte	0x5619
+	.uleb128 0x34
+	.8byte	.LVL1755
+	.4byte	0x5bbb
+	.4byte	0x77fd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 120
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1756
+	.4byte	0x5bbb
+	.4byte	0x7821
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 124
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1757
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL1758
+	.4byte	0x3645
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF828
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x5b
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7cda
+	.uleb128 0x5a
+	.string	"LUN"
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdbe
+	.4byte	.LLST443
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdd4
+	.4byte	.LLST444
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0xdd4
+	.4byte	.LLST445
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x3c1
+	.4byte	0x5a77
+	.4byte	.LLST446
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x3c3
+	.4byte	0x2d84
+	.4byte	.LLST447
+	.uleb128 0x51
+	.string	"lpa"
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdd4
+	.4byte	.LLST448
+	.uleb128 0x52
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdd4
+	.4byte	.LLST449
+	.uleb128 0x52
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x3c4
+	.4byte	0xdd4
+	.4byte	.LLST450
+	.uleb128 0x2a
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x51
+	.string	"ppa"
+	.byte	0x3
+	.2byte	0x3c5
+	.4byte	0xdd4
+	.4byte	.LLST451
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdd4
+	.4byte	.LLST452
+	.uleb128 0x52
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdd4
+	.4byte	.LLST453
+	.uleb128 0x52
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x3c6
+	.4byte	0xdd4
+	.4byte	.LLST454
+	.uleb128 0x52
+	.4byte	.LASF832
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdd4
+	.4byte	.LLST455
+	.uleb128 0x52
+	.4byte	.LASF833
+	.byte	0x3
+	.2byte	0x3c7
+	.4byte	0xdd4
+	.4byte	.LLST456
+	.uleb128 0x52
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x3c8
+	.4byte	0x1f04
+	.4byte	.LLST457
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x5ce3
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6257
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x300
+	.4byte	0x79fe
+	.uleb128 0x2a
+	.4byte	.LASF601
+	.byte	0x3
+	.2byte	0x43d
+	.4byte	0xdf5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x34
+	.8byte	.LVL2058
+	.4byte	0x29a4
+	.4byte	0x79a9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 384
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2060
+	.4byte	0xa8ce
+	.4byte	0x79ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC105
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2061
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x44a
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1987
+	.4byte	0x5a7d
+	.4byte	0x7a23
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x86
+	.sleb128 256
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1997
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1999
+	.4byte	0xa8ce
+	.4byte	0x7a63
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3f4
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2000
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL2001
+	.4byte	0x38b7
+	.4byte	0x7a8f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR52
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2003
+	.4byte	0x38b7
+	.4byte	0x7aa7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2005
+	.4byte	0x38b7
+	.4byte	0x7abf
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2008
+	.4byte	0xa8ce
+	.4byte	0x7af2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x415
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2015
+	.4byte	0x2cb7
+	.4byte	0x7b15
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x8
+	.byte	0x8f
+	.sleb128 344
+	.byte	0x94
+	.byte	0x4
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2020
+	.4byte	0x65c9
+	.4byte	0x7b2c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2021
+	.4byte	0x2ef8
+	.uleb128 0x34
+	.8byte	.LVL2022
+	.4byte	0x2cb7
+	.4byte	0x7b55
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2023
+	.4byte	0x2cb7
+	.4byte	0x7b71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2029
+	.4byte	0x2527
+	.4byte	0x7b8f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2036
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL2038
+	.4byte	0x38b7
+	.4byte	0x7bb4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2041
+	.4byte	0x5bbb
+	.4byte	0x7bd8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 380
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2042
+	.4byte	0x3789
+	.4byte	0x7bf0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2046
+	.4byte	0x259f
+	.4byte	0x7c0d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2051
+	.4byte	0xa8ce
+	.4byte	0x7c40
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x45f
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2059
+	.4byte	0x2527
+	.4byte	0x7c63
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x7
+	.byte	0x8f
+	.sleb128 348
+	.byte	0x94
+	.byte	0x4
+	.byte	0x39
+	.byte	0x24
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2063
+	.4byte	0x259f
+	.4byte	0x7c7a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2064
+	.4byte	0x2527
+	.uleb128 0x34
+	.8byte	.LVL2067
+	.4byte	0x7d15
+	.4byte	0x7caa
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL2068
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR180
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x46e
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF834
+	.byte	0x3
+	.2byte	0x3b7
+	.4byte	0x5b
+	.8byte	.LFB216
+	.8byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7d15
+	.uleb128 0x36
+	.8byte	.LVL1732
+	.4byte	0x7d15
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.4byte	.LASF835
+	.byte	0x3
+	.2byte	0x387
+	.8byte	.LFB215
+	.8byte	.LFE215-.LFB215
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7f49
+	.uleb128 0x5a
+	.string	"req"
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x1abc
+	.4byte	.LLST391
+	.uleb128 0x50
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdd4
+	.4byte	.LLST392
+	.uleb128 0x50
+	.4byte	.LASF836
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xdd4
+	.4byte	.LLST393
+	.uleb128 0x50
+	.4byte	.LASF639
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0x1f04
+	.4byte	.LLST394
+	.uleb128 0x4a
+	.string	"i"
+	.byte	0x3
+	.2byte	0x389
+	.4byte	0xdd4
+	.uleb128 0x5e
+	.string	"ppa"
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x52
+	.4byte	.LASF663
+	.byte	0x3
+	.2byte	0x38a
+	.4byte	0xdd4
+	.4byte	.LLST395
+	.uleb128 0x52
+	.4byte	.LASF623
+	.byte	0x3
+	.2byte	0x38b
+	.4byte	0xdc9
+	.4byte	.LLST396
+	.uleb128 0x52
+	.4byte	.LASF596
+	.byte	0x3
+	.2byte	0x38c
+	.4byte	0x2d84
+	.4byte	.LLST397
+	.uleb128 0x5f
+	.4byte	.LASF687
+	.byte	0x3
+	.2byte	0x38d
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x7f59
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6229
+	.uleb128 0x34
+	.8byte	.LVL1715
+	.4byte	0x27e7
+	.4byte	0x7e00
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 -4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1716
+	.4byte	0x6cf6
+	.uleb128 0x34
+	.8byte	.LVL1718
+	.4byte	0x38b7
+	.4byte	0x7e25
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1719
+	.4byte	0x2e56
+	.uleb128 0x34
+	.8byte	.LVL1720
+	.4byte	0x3789
+	.4byte	0x7e4a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1721
+	.4byte	0x27e7
+	.4byte	0x7e6c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1722
+	.4byte	0xa8ce
+	.4byte	0x7e9f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR170
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3a5
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1723
+	.4byte	0x5bbb
+	.4byte	0x7ebd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1725
+	.4byte	0x6cf6
+	.4byte	0x7ed7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x73
+	.sleb128 0
+	.byte	0x3a
+	.byte	0x25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1727
+	.4byte	0xa8ce
+	.4byte	0x7f01
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC103
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1728
+	.4byte	0x3645
+	.4byte	0x7f19
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1730
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR170
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x3b4
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.4byte	0xee
+	.4byte	0x7f59
+	.uleb128 0xe
+	.4byte	0xda
+	.byte	0xc
+	.byte	0
+	.uleb128 0x7
+	.4byte	0x7f49
+	.uleb128 0x46
+	.4byte	.LASF837
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x5b
+	.8byte	.LFB214
+	.8byte	.LFE214-.LFB214
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8184
+	.uleb128 0x5a
+	.string	"LUN"
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdbe
+	.4byte	.LLST423
+	.uleb128 0x50
+	.4byte	.LASF731
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdd4
+	.4byte	.LLST424
+	.uleb128 0x50
+	.4byte	.LASF732
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0xdd4
+	.4byte	.LLST425
+	.uleb128 0x50
+	.4byte	.LASF733
+	.byte	0x3
+	.2byte	0x32d
+	.4byte	0x5a77
+	.4byte	.LLST426
+	.uleb128 0x51
+	.string	"ret"
+	.byte	0x3
+	.2byte	0x32f
+	.4byte	0x5b
+	.4byte	.LLST427
+	.uleb128 0x52
+	.4byte	.LASF829
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdd4
+	.4byte	.LLST428
+	.uleb128 0x52
+	.4byte	.LASF830
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdd4
+	.4byte	.LLST429
+	.uleb128 0x52
+	.4byte	.LASF838
+	.byte	0x3
+	.2byte	0x330
+	.4byte	0xdd4
+	.4byte	.LLST430
+	.uleb128 0x51
+	.string	"lpa"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdd4
+	.4byte	.LLST431
+	.uleb128 0x5e
+	.string	"ppa"
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0xdd4
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x51
+	.string	"n"
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdd4
+	.4byte	.LLST432
+	.uleb128 0x52
+	.4byte	.LASF593
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdd4
+	.4byte	.LLST433
+	.uleb128 0x52
+	.4byte	.LASF831
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0xdd4
+	.4byte	.LLST434
+	.uleb128 0x52
+	.4byte	.LASF839
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdd4
+	.4byte	.LLST435
+	.uleb128 0x52
+	.4byte	.LASF840
+	.byte	0x3
+	.2byte	0x334
+	.4byte	0xdd4
+	.4byte	.LLST436
+	.uleb128 0x52
+	.4byte	.LASF841
+	.byte	0x3
+	.2byte	0x335
+	.4byte	0xdd4
+	.4byte	.LLST437
+	.uleb128 0x52
+	.4byte	.LASF842
+	.byte	0x3
+	.2byte	0x336
+	.4byte	0xdd4
+	.4byte	.LLST438
+	.uleb128 0x61
+	.8byte	.LBB293
+	.8byte	.LBE293-.LBB293
+	.4byte	0x80cd
+	.uleb128 0x52
+	.4byte	.LASF608
+	.byte	0x3
+	.2byte	0x37a
+	.4byte	0xdc9
+	.4byte	.LLST439
+	.uleb128 0x45
+	.8byte	.LVL1975
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL1976
+	.4byte	0x2ef8
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1933
+	.4byte	0x5955
+	.4byte	0x80f2
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x83
+	.sleb128 256
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8b
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1940
+	.4byte	0x7cda
+	.uleb128 0x34
+	.8byte	.LVL1946
+	.4byte	0x2cb7
+	.4byte	0x811b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1947
+	.4byte	0x5bbb
+	.4byte	0x813f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 316
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1952
+	.4byte	0x29a4
+	.4byte	0x815c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1955
+	.4byte	0x2527
+	.uleb128 0x36
+	.8byte	.LVL1962
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF843
+	.byte	0x3
+	.2byte	0x325
+	.4byte	0x5b
+	.8byte	.LFB213
+	.8byte	.LFE213-.LFB213
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x81b4
+	.uleb128 0x45
+	.8byte	.LVL1737
+	.4byte	0x81b4
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF844
+	.byte	0x3
+	.2byte	0x31c
+	.4byte	0x5b
+	.8byte	.LFB212
+	.8byte	.LFE212-.LFB212
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8215
+	.uleb128 0x45
+	.8byte	.LVL1733
+	.4byte	0x7cda
+	.uleb128 0x45
+	.8byte	.LVL1734
+	.4byte	0x5ce8
+	.uleb128 0x34
+	.8byte	.LVL1735
+	.4byte	0x58ed
+	.4byte	0x8207
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1736
+	.4byte	0x5619
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF845
+	.byte	0x3
+	.2byte	0x2e6
+	.4byte	0x5b
+	.8byte	.LFB211
+	.8byte	.LFE211-.LFB211
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8327
+	.uleb128 0x2a
+	.4byte	.LASF846
+	.byte	0x3
+	.2byte	0x2e8
+	.4byte	0x8327
+	.uleb128 0xa
+	.byte	0x3
+	.8byte	g_nand_phy_info
+	.byte	0x9f
+	.uleb128 0x56
+	.4byte	.LASF847
+	.byte	0x3
+	.2byte	0x2f3
+	.8byte	.LDL2
+	.uleb128 0x61
+	.8byte	.LBB302
+	.8byte	.LBE302-.LBB302
+	.4byte	0x829a
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x310
+	.4byte	0xdd4
+	.4byte	.LLST467
+	.uleb128 0x36
+	.8byte	.LVL2172
+	.4byte	0x2cb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2164
+	.4byte	0xa8ce
+	.4byte	0x82c6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC70
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2165
+	.4byte	0x8aa4
+	.4byte	0x82e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2166
+	.4byte	0x87b0
+	.uleb128 0x45
+	.8byte	.LVL2167
+	.4byte	0x86d9
+	.uleb128 0x45
+	.8byte	.LVL2168
+	.4byte	0x6b5e
+	.uleb128 0x45
+	.8byte	.LVL2169
+	.4byte	0x70ac
+	.uleb128 0x45
+	.8byte	.LVL2170
+	.4byte	0x3f1d
+	.byte	0
+	.uleb128 0x8
+	.byte	0x8
+	.4byte	0xee1
+	.uleb128 0x46
+	.4byte	.LASF848
+	.byte	0x3
+	.2byte	0x26e
+	.4byte	0x5b
+	.8byte	.LFB210
+	.8byte	.LFE210-.LFB210
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x84c7
+	.uleb128 0x52
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdc9
+	.4byte	.LLST463
+	.uleb128 0x52
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x270
+	.4byte	0xdc9
+	.4byte	.LLST464
+	.uleb128 0x52
+	.4byte	.LASF850
+	.byte	0x3
+	.2byte	0x271
+	.4byte	0xdc9
+	.4byte	.LLST465
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x272
+	.4byte	0xdc9
+	.4byte	.LLST466
+	.uleb128 0x56
+	.4byte	.LASF851
+	.byte	0x3
+	.2byte	0x2bc
+	.8byte	.L1635
+	.uleb128 0x56
+	.4byte	.LASF852
+	.byte	0x3
+	.2byte	0x2cc
+	.8byte	.L1637
+	.uleb128 0x45
+	.8byte	.LVL2123
+	.4byte	0x6b5e
+	.uleb128 0x45
+	.8byte	.LVL2124
+	.4byte	0x70ac
+	.uleb128 0x45
+	.8byte	.LVL2125
+	.4byte	0x6dde
+	.uleb128 0x45
+	.8byte	.LVL2133
+	.4byte	0x72c7
+	.uleb128 0x34
+	.8byte	.LVL2134
+	.4byte	0x259f
+	.4byte	0x83f8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2136
+	.4byte	0x259f
+	.4byte	0x8410
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2137
+	.4byte	0x4593
+	.4byte	0x8428
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2143
+	.4byte	0x84c7
+	.4byte	0x843f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2148
+	.4byte	0x8b14
+	.uleb128 0x45
+	.8byte	.LVL2149
+	.4byte	0x6b5e
+	.uleb128 0x34
+	.8byte	.LVL2152
+	.4byte	0x84c7
+	.4byte	0x8470
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2155
+	.4byte	0x84c7
+	.4byte	0x8487
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2159
+	.4byte	0x4593
+	.4byte	0x849f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2160
+	.4byte	0x6905
+	.uleb128 0x45
+	.8byte	.LVL2161
+	.4byte	0x5619
+	.uleb128 0x45
+	.8byte	.LVL2162
+	.4byte	0x3f1d
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF853
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0x5b
+	.8byte	.LFB209
+	.8byte	.LFE209-.LFB209
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x86af
+	.uleb128 0x50
+	.4byte	.LASF717
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdc9
+	.4byte	.LLST186
+	.uleb128 0x50
+	.4byte	.LASF854
+	.byte	0x3
+	.2byte	0x20f
+	.4byte	0xdbe
+	.4byte	.LLST187
+	.uleb128 0x52
+	.4byte	.LASF849
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdc9
+	.4byte	.LLST188
+	.uleb128 0x52
+	.4byte	.LASF569
+	.byte	0x3
+	.2byte	0x211
+	.4byte	0xdc9
+	.4byte	.LLST189
+	.uleb128 0x52
+	.4byte	.LASF592
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdc9
+	.4byte	.LLST190
+	.uleb128 0x52
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x212
+	.4byte	0xdc9
+	.4byte	.LLST191
+	.uleb128 0x52
+	.4byte	.LASF855
+	.byte	0x3
+	.2byte	0x213
+	.4byte	0xdc9
+	.4byte	.LLST192
+	.uleb128 0x52
+	.4byte	.LASF856
+	.byte	0x3
+	.2byte	0x214
+	.4byte	0xdc9
+	.4byte	.LLST193
+	.uleb128 0x52
+	.4byte	.LASF857
+	.byte	0x3
+	.2byte	0x215
+	.4byte	0xdc9
+	.4byte	.LLST194
+	.uleb128 0x52
+	.4byte	.LASF858
+	.byte	0x3
+	.2byte	0x216
+	.4byte	0xdc9
+	.4byte	.LLST195
+	.uleb128 0x56
+	.4byte	.LASF859
+	.byte	0x3
+	.2byte	0x240
+	.8byte	.L439
+	.uleb128 0x34
+	.8byte	.LVL692
+	.4byte	0x2721
+	.4byte	0x85b0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL695
+	.4byte	0x7574
+	.uleb128 0x34
+	.8byte	.LVL701
+	.4byte	0x27e7
+	.4byte	0x85e0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL705
+	.4byte	0x7574
+	.uleb128 0x34
+	.8byte	.LVL709
+	.4byte	0x6a7f
+	.4byte	0x8604
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL710
+	.4byte	0x2721
+	.4byte	0x8622
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL714
+	.4byte	0x6d91
+	.4byte	0x863a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL716
+	.4byte	0x86af
+	.4byte	0x8652
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL717
+	.4byte	0x74e5
+	.4byte	0x866a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7e
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL728
+	.4byte	0x6d91
+	.4byte	0x8682
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL730
+	.4byte	0x86af
+	.4byte	0x869a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL731
+	.4byte	0x74e5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x47
+	.4byte	.LASF860
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0x5b
+	.byte	0x1
+	.4byte	0x86d9
+	.uleb128 0x48
+	.4byte	.LASF388
+	.byte	0x3
+	.2byte	0x201
+	.4byte	0xdc9
+	.uleb128 0x49
+	.4byte	.LASF861
+	.byte	0x3
+	.2byte	0x203
+	.4byte	0xdc9
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF862
+	.byte	0x3
+	.2byte	0x1ec
+	.4byte	0x5b
+	.8byte	.LFB207
+	.8byte	.LFE207-.LFB207
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x87b0
+	.uleb128 0x34
+	.8byte	.LVL1108
+	.4byte	0x259f
+	.4byte	0x8712
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1109
+	.4byte	0x259f
+	.4byte	0x8729
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1110
+	.4byte	0x259f
+	.4byte	0x8740
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1111
+	.4byte	0x259f
+	.4byte	0x876a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR79
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1112
+	.4byte	0x259f
+	.4byte	0x8795
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR83
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1113
+	.4byte	0x361a
+	.uleb128 0x45
+	.8byte	.LVL1114
+	.4byte	0x4f10
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF863
+	.byte	0x3
+	.2byte	0x116
+	.4byte	0x5b
+	.8byte	.LFB206
+	.8byte	.LFE206-.LFB206
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8aa4
+	.uleb128 0x51
+	.string	"i"
+	.byte	0x3
+	.2byte	0x118
+	.4byte	0xdd4
+	.4byte	.LLST199
+	.uleb128 0x52
+	.4byte	.LASF864
+	.byte	0x3
+	.2byte	0x119
+	.4byte	0xdd4
+	.4byte	.LLST200
+	.uleb128 0x3f
+	.4byte	.LASF574
+	.4byte	0x722a
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	__func__.6105
+	.uleb128 0x45
+	.8byte	.LVL739
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL740
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL742
+	.4byte	0x2c2b
+	.4byte	0x8835
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL743
+	.4byte	0x2c2b
+	.4byte	0x884d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL744
+	.4byte	0x2c2b
+	.4byte	0x8865
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL745
+	.4byte	0x2c2b
+	.4byte	0x887d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL746
+	.4byte	0x2c2b
+	.4byte	0x8895
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL749
+	.4byte	0x2c2b
+	.4byte	0x88ad
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL750
+	.4byte	0x2c2b
+	.4byte	0x88c5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL751
+	.4byte	0x2c2b
+	.4byte	0x88dd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL752
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL753
+	.4byte	0x2c2b
+	.4byte	0x8902
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL754
+	.4byte	0x2c2b
+	.4byte	0x891a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL756
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL758
+	.4byte	0x2c2b
+	.4byte	0x893f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL759
+	.4byte	0x2c2b
+	.4byte	0x8959
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL761
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL762
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL763
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL765
+	.4byte	0x2c2b
+	.4byte	0x8998
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8c
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL767
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL769
+	.4byte	0x2c2b
+	.4byte	0x89bd
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL770
+	.4byte	0x2c2b
+	.4byte	0x89d5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL771
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL772
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL773
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL774
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL775
+	.4byte	0x2c2b
+	.uleb128 0x34
+	.8byte	.LVL776
+	.4byte	0x259f
+	.4byte	0x8a2d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL778
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL780
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL783
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL786
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL789
+	.4byte	0x2c2b
+	.uleb128 0x45
+	.8byte	.LVL793
+	.4byte	0x2c2b
+	.uleb128 0x36
+	.8byte	.LVL796
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC82
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR138
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF865
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x5b
+	.8byte	.LFB205
+	.8byte	.LFE205-.LFB205
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8b14
+	.uleb128 0x2e
+	.4byte	.LASF846
+	.byte	0x3
+	.byte	0xb6
+	.4byte	0x8327
+	.4byte	.LLST8
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x3
+	.byte	0xb8
+	.4byte	0xdd4
+	.4byte	.LLST9
+	.uleb128 0x45
+	.8byte	.LVL30
+	.4byte	0x8b5d
+	.uleb128 0x34
+	.8byte	.LVL31
+	.4byte	0x8b5d
+	.4byte	0x8b06
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL33
+	.4byte	0x8b14
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF866
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0x5b
+	.8byte	.LFB204
+	.8byte	.LFE204-.LFB204
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8b45
+	.uleb128 0x2e
+	.4byte	.LASF867
+	.byte	0x3
+	.byte	0xa4
+	.4byte	0xdc9
+	.4byte	.LLST7
+	.byte	0
+	.uleb128 0x63
+	.4byte	.LASF868
+	.byte	0x3
+	.byte	0x9e
+	.byte	0x1
+	.4byte	0x8b5d
+	.uleb128 0x38
+	.4byte	.LASF869
+	.byte	0x3
+	.byte	0x9e
+	.4byte	0xdd4
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF870
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdc9
+	.8byte	.LFB202
+	.8byte	.LFE202-.LFB202
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8baa
+	.uleb128 0x31
+	.string	"num"
+	.byte	0x3
+	.byte	0x7f
+	.4byte	0xdd4
+	.4byte	.LLST4
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x3
+	.byte	0x81
+	.4byte	0xdc9
+	.4byte	.LLST5
+	.uleb128 0x32
+	.4byte	.LASF871
+	.byte	0x3
+	.byte	0x82
+	.4byte	0xdd4
+	.4byte	.LLST6
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF872
+	.byte	0x3
+	.byte	0x71
+	.4byte	0x5b
+	.8byte	.LFB201
+	.8byte	.LFE201-.LFB201
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8c30
+	.uleb128 0x2e
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0x71
+	.4byte	0xfa
+	.4byte	.LLST112
+	.uleb128 0x33
+	.string	"buf"
+	.byte	0x3
+	.byte	0x73
+	.4byte	0xfa
+	.4byte	.LLST113
+	.uleb128 0x34
+	.8byte	.LVL470
+	.4byte	0xa8e4
+	.4byte	0x8c1b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC70
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL472
+	.4byte	0x8c30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x2d
+	.4byte	.LASF873
+	.byte	0x3
+	.byte	0xb
+	.4byte	0x5b
+	.8byte	.LFB200
+	.8byte	.LFE200-.LFB200
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x96be
+	.uleb128 0x2e
+	.4byte	.LASF299
+	.byte	0x3
+	.byte	0xb
+	.4byte	0xfa
+	.4byte	.LLST107
+	.uleb128 0x33
+	.string	"i"
+	.byte	0x3
+	.byte	0xd
+	.4byte	0x5b
+	.4byte	.LLST108
+	.uleb128 0x33
+	.string	"buf"
+	.byte	0x3
+	.byte	0xe
+	.4byte	0xfa
+	.4byte	.LLST109
+	.uleb128 0x61
+	.8byte	.LBB203
+	.8byte	.LBE203-.LBB203
+	.4byte	0x8cd8
+	.uleb128 0x32
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x57
+	.4byte	0xdc9
+	.4byte	.LLST110
+	.uleb128 0x34
+	.8byte	.LVL455
+	.4byte	0x65c9
+	.4byte	0x8cb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL459
+	.4byte	0xa8e4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x88
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 -1
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.8byte	.LBB204
+	.8byte	.LBE204-.LBB204
+	.4byte	0x8d1d
+	.uleb128 0x32
+	.4byte	.LASF608
+	.byte	0x3
+	.byte	0x60
+	.4byte	0xdc9
+	.4byte	.LLST111
+	.uleb128 0x36
+	.8byte	.LVL466
+	.4byte	0xa8e4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 -1
+	.byte	0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL318
+	.4byte	0xa8e4
+	.4byte	0x8d42
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC2
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL320
+	.4byte	0xa8e4
+	.4byte	0x8d67
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC3
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL322
+	.4byte	0xa8e4
+	.4byte	0x8d8c
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC4
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL324
+	.4byte	0xa8e4
+	.4byte	0x8db1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC5
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL326
+	.4byte	0xa8e4
+	.4byte	0x8dd6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC6
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL328
+	.4byte	0xa8e4
+	.4byte	0x8dfb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC7
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL330
+	.4byte	0xa8e4
+	.4byte	0x8e20
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC8
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL332
+	.4byte	0xa8e4
+	.4byte	0x8e45
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC9
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL334
+	.4byte	0xa8e4
+	.4byte	0x8e6a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC10
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL336
+	.4byte	0xa8e4
+	.4byte	0x8e8f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC11
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL338
+	.4byte	0xa8e4
+	.4byte	0x8eb4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC12
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL340
+	.4byte	0xa8e4
+	.4byte	0x8ed9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC13
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL342
+	.4byte	0xa8e4
+	.4byte	0x8efe
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC14
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL344
+	.4byte	0xa8e4
+	.4byte	0x8f23
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC15
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL346
+	.4byte	0xa8e4
+	.4byte	0x8f48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC16
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL348
+	.4byte	0xa8e4
+	.4byte	0x8f6d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC17
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL350
+	.4byte	0xa8e4
+	.4byte	0x8f92
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC18
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL352
+	.4byte	0xa8e4
+	.4byte	0x8fb7
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC19
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL354
+	.4byte	0xa8e4
+	.4byte	0x8fdc
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC20
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL356
+	.4byte	0xa8e4
+	.4byte	0x9001
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC21
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL358
+	.4byte	0xa8e4
+	.4byte	0x9026
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC22
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL360
+	.4byte	0xa8e4
+	.4byte	0x904b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC23
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL362
+	.4byte	0xa8e4
+	.4byte	0x9070
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC24
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL364
+	.4byte	0xa8e4
+	.4byte	0x9095
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC25
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL366
+	.4byte	0xa8e4
+	.4byte	0x90ba
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC26
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL368
+	.4byte	0xa8e4
+	.4byte	0x90df
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x9104
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
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+	.4byte	0xa8e4
+	.4byte	0x9129
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x914e
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x9173
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
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+	.4byte	0xa8e4
+	.4byte	0x9198
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
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+	.4byte	0xa8e4
+	.4byte	0x91bd
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
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+	.4byte	0xa8e4
+	.4byte	0x91e2
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x9207
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x922c
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.8byte	.LC36
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL388
+	.4byte	0xa8e4
+	.4byte	0x9251
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x9
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+	.8byte	.LC37
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL390
+	.4byte	0xa8e4
+	.4byte	0x9276
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x9
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+	.8byte	.LC38
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL392
+	.4byte	0xa8e4
+	.4byte	0x929b
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL394
+	.4byte	0xa8e4
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.8byte	.LC40
+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.8byte	.LC42
+	.byte	0
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+	.8byte	.LVL400
+	.4byte	0xa8e4
+	.4byte	0x932f
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL404
+	.4byte	0xa8e4
+	.4byte	0x9379
+	.uleb128 0x30
+	.uleb128 0x1
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+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x9
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+	.8byte	.LC45
+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x939e
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x9
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+	.8byte	.LC46
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL408
+	.4byte	0xa8e4
+	.4byte	0x93c3
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x9
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+	.8byte	.LC48
+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x940d
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.8byte	.LC49
+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x9432
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
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+	.4byte	0xa8e4
+	.4byte	0x9457
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x9
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+	.8byte	.LC51
+	.byte	0
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+	.uleb128 0x30
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+	.byte	0
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+	.uleb128 0x1
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+	.byte	0
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+	.byte	0
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+	.byte	0
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+	.byte	0
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
+	.uleb128 0x34
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x9
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+	.byte	0
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+	.uleb128 0x30
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+	.byte	0
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+	.uleb128 0x6b
+	.4byte	0x8b45
+	.8byte	.LFB203
+	.8byte	.LFE203-.LFB203
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9774
+	.uleb128 0x6c
+	.4byte	0x8b51
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x86af
+	.8byte	.LFB208
+	.8byte	.LFE208-.LFB208
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x97b8
+	.uleb128 0x5c
+	.4byte	0x86c0
+	.4byte	.LLST10
+	.uleb128 0x6f
+	.4byte	0x86cc
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x6d
+	.4byte	0x86c0
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x6e
+	.4byte	0x9798
+	.4byte	.LLST11
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0x74dd
+	.8byte	.LFB224
+	.8byte	.LFE224-.LFB224
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x72
+	.4byte	0x6b52
+	.8byte	.LFB238
+	.8byte	.LFE238-.LFB238
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x72
+	.4byte	0x6b46
+	.8byte	.LFB239
+	.8byte	.LFE239-.LFB239
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x6b
+	.4byte	0x68bb
+	.8byte	.LFB245
+	.8byte	.LFE245-.LFB245
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x98a0
+	.uleb128 0x5c
+	.4byte	0x68c7
+	.4byte	.LLST49
+	.uleb128 0x6f
+	.4byte	0x68d2
+	.uleb128 0x61
+	.8byte	.LBB177
+	.8byte	.LBE177-.LBB177
+	.4byte	0x988a
+	.uleb128 0x5c
+	.4byte	0x68c7
+	.4byte	.LLST50
+	.uleb128 0x66
+	.8byte	.LBB178
+	.8byte	.LBE178-.LBB178
+	.uleb128 0x6f
+	.4byte	0x9821
+	.uleb128 0x2f
+	.8byte	.LVL139
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR46
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xbd
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL137
+	.4byte	0x6821
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x68e0
+	.8byte	.LFB244
+	.8byte	.LFE244-.LFB244
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9943
+	.uleb128 0x5c
+	.4byte	0x68ec
+	.4byte	.LLST56
+	.uleb128 0x6f
+	.4byte	0x68f7
+	.uleb128 0x61
+	.8byte	.LBB181
+	.8byte	.LBE181-.LBB181
+	.4byte	0x992d
+	.uleb128 0x5c
+	.4byte	0x68ec
+	.4byte	.LLST57
+	.uleb128 0x66
+	.8byte	.LBB182
+	.8byte	.LBE182-.LBB182
+	.uleb128 0x6f
+	.4byte	0x98c4
+	.uleb128 0x2f
+	.8byte	.LVL159
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR49
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xb6
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL157
+	.4byte	0x67a0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x654a
+	.8byte	.LFB252
+	.8byte	.LFE252-.LFB252
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9aa0
+	.uleb128 0x5c
+	.4byte	0x655b
+	.4byte	.LLST70
+	.uleb128 0x6f
+	.4byte	0x6567
+	.uleb128 0x6f
+	.4byte	0x6573
+	.uleb128 0x6f
+	.4byte	0x657f
+	.uleb128 0x6f
+	.4byte	0x658b
+	.uleb128 0x6f
+	.4byte	0x6597
+	.uleb128 0x6f
+	.4byte	0x65a3
+	.uleb128 0x6f
+	.4byte	0x65af
+	.uleb128 0x6f
+	.4byte	0x65bb
+	.uleb128 0x66
+	.8byte	.LBB185
+	.8byte	.LBE185-.LBB185
+	.uleb128 0x5c
+	.4byte	0x655b
+	.4byte	.LLST71
+	.uleb128 0x66
+	.8byte	.LBB186
+	.8byte	.LBE186-.LBB186
+	.uleb128 0x6e
+	.4byte	0x9967
+	.4byte	.LLST72
+	.uleb128 0x6e
+	.4byte	0x996c
+	.4byte	.LLST73
+	.uleb128 0x6e
+	.4byte	0x9971
+	.4byte	.LLST74
+	.uleb128 0x6e
+	.4byte	0x9976
+	.4byte	.LLST75
+	.uleb128 0x6e
+	.4byte	0x997b
+	.4byte	.LLST76
+	.uleb128 0x6e
+	.4byte	0x9980
+	.4byte	.LLST77
+	.uleb128 0x6e
+	.4byte	0x9985
+	.4byte	.LLST78
+	.uleb128 0x6f
+	.4byte	0x998a
+	.uleb128 0x34
+	.8byte	.LVL205
+	.4byte	0xa8ce
+	.4byte	0x9a31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1aa
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL213
+	.4byte	0x66e6
+	.4byte	0x9a56
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR42
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL214
+	.4byte	0xa8ce
+	.4byte	0x9a89
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR54
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1b3
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL215
+	.4byte	0x68bb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x6287
+	.8byte	.LFB255
+	.8byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9b58
+	.uleb128 0x5c
+	.4byte	0x6298
+	.4byte	.LLST79
+	.uleb128 0x6e
+	.4byte	0x62a4
+	.4byte	.LLST80
+	.uleb128 0x6e
+	.4byte	0x62b0
+	.4byte	.LLST81
+	.uleb128 0x6f
+	.4byte	0x62bc
+	.uleb128 0x61
+	.8byte	.LBB189
+	.8byte	.LBE189-.LBB189
+	.4byte	0x9b4a
+	.uleb128 0x5c
+	.4byte	0x6298
+	.4byte	.LLST82
+	.uleb128 0x66
+	.8byte	.LBB190
+	.8byte	.LBE190-.LBB190
+	.uleb128 0x6f
+	.4byte	0x9ac4
+	.uleb128 0x6f
+	.4byte	0x9acd
+	.uleb128 0x6f
+	.4byte	0x9ad6
+	.uleb128 0x36
+	.8byte	.LVL221
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR55
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
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+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL223
+	.4byte	0x6905
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x58c9
+	.8byte	.LFB266
+	.8byte	.LFE266-.LFB266
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9b9e
+	.uleb128 0x5c
+	.4byte	0x58d6
+	.4byte	.LLST86
+	.uleb128 0x73
+	.4byte	0x58e2
+	.byte	0
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x6c
+	.4byte	0x58d6
+	.uleb128 0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x60
+	.uleb128 0x6f
+	.4byte	0x9b7c
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x5398
+	.8byte	.LFB272
+	.8byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9bea
+	.uleb128 0x5c
+	.4byte	0x53a5
+	.4byte	.LLST87
+	.uleb128 0x5c
+	.4byte	0x53b1
+	.4byte	.LLST88
+	.uleb128 0x2f
+	.8byte	.LVL257
+	.4byte	0x9720
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3e
+	.4byte	0x53b1
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x46ef
+	.8byte	.LFB282
+	.8byte	.LFE282-.LFB282
+	.uleb128 0x1
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+	.4byte	0x9c48
+	.uleb128 0x6c
+	.4byte	0x46fc
+	.uleb128 0x1
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+	.uleb128 0x6f
+	.4byte	0x4708
+	.uleb128 0x66
+	.8byte	.LBB201
+	.8byte	.LBE201-.LBB201
+	.uleb128 0x5c
+	.4byte	0x46fc
+	.4byte	.LLST93
+	.uleb128 0x66
+	.8byte	.LBB202
+	.8byte	.LBE202-.LBB202
+	.uleb128 0x6e
+	.4byte	0x9c0c
+	.4byte	.LLST94
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x3d17
+	.8byte	.LFB297
+	.8byte	.LFE297-.LFB297
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9c91
+	.uleb128 0x5c
+	.4byte	0x3d28
+	.4byte	.LLST121
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0xa0
+	.uleb128 0x5c
+	.4byte	0x3d28
+	.4byte	.LLST122
+	.uleb128 0x36
+	.8byte	.LVL504
+	.4byte	0x68e0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2e49
+	.8byte	.LFB316
+	.8byte	.LFE316-.LFB316
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9cc7
+	.uleb128 0x45
+	.8byte	.LVL576
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL577
+	.4byte	0x2ef8
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2d9f
+	.8byte	.LFB318
+	.8byte	.LFE318-.LFB318
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9dc1
+	.uleb128 0x73
+	.4byte	0x2db0
+	.byte	0
+	.uleb128 0x6f
+	.4byte	0x2dbc
+	.uleb128 0x6f
+	.4byte	0x2dc6
+	.uleb128 0x6f
+	.4byte	0x2dd2
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x130
+	.4byte	0x9d96
+	.uleb128 0x6f
+	.4byte	0x9ce2
+	.uleb128 0x6e
+	.4byte	0x9ce8
+	.4byte	.LLST251
+	.uleb128 0x70
+	.4byte	0x9ced
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x70
+	.4byte	0x9cf2
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -64
+	.uleb128 0x61
+	.8byte	.LBB230
+	.8byte	.LBE230-.LBB230
+	.4byte	0x9d7b
+	.uleb128 0x70
+	.4byte	0x2de3
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x34
+	.8byte	.LVL966
+	.4byte	0x29a4
+	.4byte	0x9d60
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 96
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL967
+	.4byte	0x6cf6
+	.uleb128 0x45
+	.8byte	.LVL968
+	.4byte	0x2ef8
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL965
+	.4byte	0x5bbb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 92
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.8byte	.LBB237
+	.8byte	.LBE237-.LBB237
+	.uleb128 0x70
+	.4byte	0x2df1
+	.uleb128 0x12
+	.byte	0x40
+	.byte	0x45
+	.byte	0x24
+	.byte	0x3
+	.8byte	g_max_erase_count
+	.byte	0x94
+	.byte	0x4
+	.byte	0x3a
+	.byte	0x25
+	.byte	0x26
+	.byte	0x9f
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x26cd
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+	.8byte	.LFE343-.LFB343
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9ef5
+	.uleb128 0x5c
+	.4byte	0x26dd
+	.4byte	.LLST297
+	.uleb128 0x73
+	.4byte	0x26e8
+	.byte	0
+	.uleb128 0x6f
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+	.uleb128 0x6f
+	.4byte	0x26fe
+	.uleb128 0x66
+	.8byte	.LBB242
+	.8byte	.LBE242-.LBB242
+	.uleb128 0x5c
+	.4byte	0x26dd
+	.4byte	.LLST298
+	.uleb128 0x66
+	.8byte	.LBB243
+	.8byte	.LBE243-.LBB243
+	.uleb128 0x6f
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+	.uleb128 0x70
+	.4byte	0x9deb
+	.uleb128 0x2
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+	.sleb128 -64
+	.uleb128 0x70
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+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x74
+	.4byte	0x2709
+	.8byte	.LDL1
+	.uleb128 0x34
+	.8byte	.LVL1218
+	.4byte	0x259f
+	.4byte	0x9e68
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
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+	.sleb128 80
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
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+	.byte	0xa5
+	.uleb128 0x30
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1220
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+	.4byte	0x9e8b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.byte	0x5a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
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+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1221
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+	.4byte	0x9ead
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 48
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+	.uleb128 0x1
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+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1222
+	.4byte	0x27e7
+	.4byte	0x9ed4
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1224
+	.4byte	0x2721
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8f
+	.sleb128 48
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2dff
+	.8byte	.LFB317
+	.8byte	.LFE317-.LFB317
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9fce
+	.uleb128 0x5c
+	.4byte	0x2e10
+	.4byte	.LLST318
+	.uleb128 0x6f
+	.4byte	0x2e1c
+	.uleb128 0x6f
+	.4byte	0x2e28
+	.uleb128 0x6f
+	.4byte	0x2e32
+	.uleb128 0x6f
+	.4byte	0x2e3c
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x1b0
+	.uleb128 0x6d
+	.4byte	0x2e10
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x1b0
+	.uleb128 0x6e
+	.4byte	0x9f19
+	.4byte	.LLST319
+	.uleb128 0x70
+	.4byte	0x9f1e
+	.uleb128 0x1
+	.byte	0x64
+	.uleb128 0x6e
+	.4byte	0x9f23
+	.4byte	.LLST320
+	.uleb128 0x70
+	.4byte	0x9f28
+	.uleb128 0x1
+	.byte	0x6a
+	.uleb128 0x45
+	.8byte	.LVL1311
+	.4byte	0x2e49
+	.uleb128 0x34
+	.8byte	.LVL1314
+	.4byte	0x6d91
+	.4byte	0x9f81
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1318
+	.4byte	0xa8ce
+	.4byte	0x9fa6
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC97
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1319
+	.4byte	0x7574
+	.4byte	0x9fbe
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1320
+	.4byte	0x72c7
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x3749
+	.8byte	.LFB301
+	.8byte	.LFE301-.LFB301
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa0f9
+	.uleb128 0x5c
+	.4byte	0x375a
+	.4byte	.LLST321
+	.uleb128 0x6f
+	.4byte	0x3766
+	.uleb128 0x61
+	.8byte	.LBB256
+	.8byte	.LBE256-.LBB256
+	.4byte	0xa0e4
+	.uleb128 0x5c
+	.4byte	0x375a
+	.4byte	.LLST322
+	.uleb128 0x66
+	.8byte	.LBB257
+	.8byte	.LBE257-.LBB257
+	.uleb128 0x6f
+	.4byte	0x9ff2
+	.uleb128 0x34
+	.8byte	.LVL1329
+	.4byte	0x66e6
+	.4byte	0xa050
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR42
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1330
+	.4byte	0xa8ce
+	.4byte	0xa083
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR159
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa88
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1331
+	.4byte	0x3d17
+	.4byte	0xa09b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1332
+	.4byte	0x2dff
+	.4byte	0xa0b3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1333
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR159
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xa8b
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1336
+	.4byte	0x654a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x57c8
+	.8byte	.LFB268
+	.8byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa1f2
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x1f0
+	.uleb128 0x6e
+	.4byte	0x57d6
+	.4byte	.LLST325
+	.uleb128 0x70
+	.4byte	0x57e2
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x6e
+	.4byte	0x57ee
+	.4byte	.LLST326
+	.uleb128 0x70
+	.4byte	0x57fa
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x6e
+	.4byte	0x5806
+	.4byte	.LLST327
+	.uleb128 0x34
+	.8byte	.LVL1349
+	.4byte	0x5bbb
+	.4byte	0xa168
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 156
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1351
+	.4byte	0x29a4
+	.4byte	0xa18b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1355
+	.4byte	0x259f
+	.4byte	0xa1a3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1357
+	.4byte	0x3789
+	.4byte	0xa1bb
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x86
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1358
+	.4byte	0x27e7
+	.4byte	0xa1e3
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 160
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1359
+	.4byte	0x3645
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x4444
+	.8byte	.LFB286
+	.8byte	.LFE286-.LFB286
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa233
+	.uleb128 0x2f
+	.8byte	.LVL1619
+	.4byte	0x5a7d
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR83
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x53be
+	.8byte	.LFB271
+	.8byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa2a6
+	.uleb128 0x34
+	.8byte	.LVL1656
+	.4byte	0x5955
+	.4byte	0xa266
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1657
+	.4byte	0xa8ce
+	.4byte	0xa292
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC71
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC100
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1658
+	.4byte	0x259f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x30c4
+	.8byte	.LFB311
+	.8byte	.LFE311-.LFB311
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa30c
+	.uleb128 0x34
+	.8byte	.LVL1799
+	.4byte	0x30cd
+	.4byte	0xa2d9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x83
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1800
+	.4byte	0x5814
+	.4byte	0xa2f8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1801
+	.4byte	0x32a5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x2cb7
+	.8byte	.LFB319
+	.8byte	.LFE319-.LFB319
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa6ce
+	.uleb128 0x5c
+	.4byte	0x2cc8
+	.4byte	.LLST411
+	.uleb128 0x5c
+	.4byte	0x2cd4
+	.4byte	.LLST412
+	.uleb128 0x73
+	.4byte	0x2ce0
+	.byte	0x1
+	.uleb128 0x6f
+	.4byte	0x2cec
+	.uleb128 0x6f
+	.4byte	0x2cf8
+	.uleb128 0x75
+	.4byte	0x2d04
+	.sleb128 -1
+	.uleb128 0x6f
+	.4byte	0x2d10
+	.uleb128 0x6f
+	.4byte	0x2d1c
+	.uleb128 0x6f
+	.4byte	0x2d28
+	.uleb128 0x6f
+	.4byte	0x2d34
+	.uleb128 0x6f
+	.4byte	0x2d40
+	.uleb128 0x6f
+	.4byte	0x2d4c
+	.uleb128 0x6f
+	.4byte	0x2d68
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x2a0
+	.4byte	0xa6ba
+	.uleb128 0x5c
+	.4byte	0x2cd4
+	.4byte	.LLST413
+	.uleb128 0x5c
+	.4byte	0x2cc8
+	.4byte	.LLST414
+	.uleb128 0x71
+	.4byte	.Ldebug_ranges0+0x2a0
+	.uleb128 0x6f
+	.4byte	0xa339
+	.uleb128 0x6e
+	.4byte	0xa33f
+	.4byte	.LLST415
+	.uleb128 0x70
+	.4byte	0xa344
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.uleb128 0x6f
+	.4byte	0xa349
+	.uleb128 0x6e
+	.4byte	0xa34f
+	.4byte	.LLST416
+	.uleb128 0x6e
+	.4byte	0xa354
+	.4byte	.LLST417
+	.uleb128 0x6e
+	.4byte	0xa359
+	.4byte	.LLST418
+	.uleb128 0x6e
+	.4byte	0xa35e
+	.4byte	.LLST419
+	.uleb128 0x6e
+	.4byte	0xa363
+	.4byte	.LLST420
+	.uleb128 0x6e
+	.4byte	0xa368
+	.4byte	.LLST421
+	.uleb128 0x76
+	.4byte	0x2d58
+	.uleb128 0x76
+	.4byte	0x2d60
+	.uleb128 0x6f
+	.4byte	0xa36d
+	.uleb128 0x40
+	.4byte	.Ldebug_ranges0+0x2d0
+	.4byte	0xa46f
+	.uleb128 0x6e
+	.4byte	0x2d76
+	.4byte	.LLST422
+	.uleb128 0x45
+	.8byte	.LVL1834
+	.4byte	0x3d35
+	.uleb128 0x34
+	.8byte	.LVL1837
+	.4byte	0x65c9
+	.4byte	0xa429
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1840
+	.4byte	0x65c9
+	.4byte	0xa440
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1843
+	.4byte	0x2e49
+	.uleb128 0x36
+	.8byte	.LVL1852
+	.4byte	0xa8ce
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC104
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1864
+	.4byte	0x3534
+	.uleb128 0x34
+	.8byte	.LVL1865
+	.4byte	0x4593
+	.4byte	0xa494
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1867
+	.4byte	0x65c9
+	.4byte	0xa4ac
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1872
+	.4byte	0x2d9f
+	.uleb128 0x34
+	.8byte	.LVL1874
+	.4byte	0x65c9
+	.4byte	0xa4d0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1876
+	.4byte	0x3645
+	.4byte	0xa4e8
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1881
+	.4byte	0x3534
+	.4byte	0xa500
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1882
+	.4byte	0x3645
+	.4byte	0xa518
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1883
+	.4byte	0xa8ce
+	.4byte	0xa54b
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x296
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1884
+	.4byte	0xa8ce
+	.4byte	0xa57e
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x297
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1885
+	.4byte	0xa8ce
+	.4byte	0xa5b1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x298
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1886
+	.4byte	0x4593
+	.4byte	0xa5c9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x89
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1887
+	.4byte	0x2d9f
+	.uleb128 0x34
+	.8byte	.LVL1901
+	.4byte	0x29a4
+	.4byte	0xa5ee
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x87
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1910
+	.4byte	0xa8ce
+	.4byte	0xa621
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LC1
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR177
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2bc
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL1912
+	.4byte	0x5bbb
+	.4byte	0xa63f
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x8f
+	.sleb128 348
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1913
+	.4byte	0x3012
+	.uleb128 0x34
+	.8byte	.LVL1914
+	.4byte	0x3572
+	.4byte	0xa66a
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL1915
+	.4byte	0x2f4c
+	.uleb128 0x45
+	.8byte	.LVL1919
+	.4byte	0x2f4c
+	.uleb128 0x45
+	.8byte	.LVL1920
+	.4byte	0x3749
+	.uleb128 0x45
+	.8byte	.LVL1921
+	.4byte	0x7cda
+	.uleb128 0x45
+	.8byte	.LVL1922
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL1923
+	.4byte	0x5619
+	.byte	0
+	.byte	0
+	.uleb128 0x36
+	.8byte	.LVL1847
+	.4byte	0x32a5
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	0x3f1d
+	.8byte	.LFB292
+	.8byte	.LFE292-.LFB292
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa8ab
+	.uleb128 0x73
+	.4byte	0x3f2e
+	.byte	0
+	.uleb128 0x61
+	.8byte	.LBB300
+	.8byte	.LBE300-.LBB300
+	.4byte	0xa815
+	.uleb128 0x6f
+	.4byte	0xa6e9
+	.uleb128 0x61
+	.8byte	.LBB301
+	.8byte	.LBE301-.LBB301
+	.4byte	0xa728
+	.uleb128 0x6e
+	.4byte	0x3f39
+	.4byte	.LLST462
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2107
+	.4byte	0x432b
+	.4byte	0xa740
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2108
+	.4byte	0x432b
+	.4byte	0xa758
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2110
+	.4byte	0x5814
+	.4byte	0xa777
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR144
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2111
+	.4byte	0x5814
+	.4byte	0xa796
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x3
+	.8byte	.LANCHOR149
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2112
+	.4byte	0x5ce8
+	.uleb128 0x45
+	.8byte	.LVL2113
+	.4byte	0x5619
+	.uleb128 0x45
+	.8byte	.LVL2114
+	.4byte	0x5619
+	.uleb128 0x45
+	.8byte	.LVL2118
+	.4byte	0x2ef8
+	.uleb128 0x45
+	.8byte	.LVL2119
+	.4byte	0x2ef8
+	.uleb128 0x34
+	.8byte	.LVL2120
+	.4byte	0x38b7
+	.4byte	0xa7ef
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x85
+	.sleb128 0
+	.byte	0
+	.uleb128 0x34
+	.8byte	.LVL2121
+	.4byte	0x38b7
+	.4byte	0xa807
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x84
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2122
+	.4byte	0x41e2
+	.byte	0
+	.uleb128 0x45
+	.8byte	.LVL2094
+	.4byte	0x6b5e
+	.uleb128 0x45
+	.8byte	.LVL2095
+	.4byte	0x53cb
+	.uleb128 0x45
+	.8byte	.LVL2096
+	.4byte	0x5186
+	.uleb128 0x45
+	.8byte	.LVL2097
+	.4byte	0x4ec5
+	.uleb128 0x45
+	.8byte	.LVL2098
+	.4byte	0x4f6a
+	.uleb128 0x45
+	.8byte	.LVL2099
+	.4byte	0x43e3
+	.uleb128 0x45
+	.8byte	.LVL2100
+	.4byte	0x53be
+	.uleb128 0x45
+	.8byte	.LVL2101
+	.4byte	0x69ea
+	.uleb128 0x45
+	.8byte	.LVL2102
+	.4byte	0x444d
+	.uleb128 0x45
+	.8byte	.LVL2103
+	.4byte	0x464b
+	.uleb128 0x36
+	.8byte	.LVL2104
+	.4byte	0x58c9
+	.uleb128 0x30
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x77
+	.4byte	.LASF874
+	.4byte	.LASF874
+	.byte	0xa
+	.byte	0x72
+	.uleb128 0x78
+	.4byte	.LASF875
+	.4byte	.LASF875
+	.byte	0x1b
+	.2byte	0x16d
+	.uleb128 0x78
+	.4byte	.LASF876
+	.4byte	.LASF876
+	.byte	0x1b
+	.2byte	0x16c
+	.uleb128 0x77
+	.4byte	.LASF877
+	.4byte	.LASF877
+	.byte	0x1d
+	.byte	0x12
+	.uleb128 0x77
+	.4byte	.LASF878
+	.4byte	.LASF878
+	.byte	0x1c
+	.byte	0x35
+	.uleb128 0x77
+	.4byte	.LASF879
+	.4byte	.LASF879
+	.byte	0x1e
+	.byte	0x6d
+	.byte	0
+	.section	.debug_abbrev,"",@progbits
+.Ldebug_abbrev0:
+	.uleb128 0x1
+	.uleb128 0x11
+	.byte	0x1
+	.uleb128 0x25
+	.uleb128 0xe
+	.uleb128 0x13
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1b
+	.uleb128 0xe
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x10
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x2
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0xe
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x4
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x5
+	.uleb128 0x24
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3e
+	.uleb128 0xb
+	.uleb128 0x3
+	.uleb128 0x8
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7
+	.uleb128 0x26
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.uleb128 0xf
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xa
+	.uleb128 0x1
+	.byte	0x1
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0xb
+	.uleb128 0x21
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0xd
+	.uleb128 0x26
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xe
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0xf
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x11
+	.uleb128 0x15
+	.byte	0x1
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x12
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x13
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x14
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x15
+	.uleb128 0x21
+	.byte	0
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2f
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x16
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x17
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x18
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x19
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1a
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0xb
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1b
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x1c
+	.uleb128 0x16
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1d
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.uleb128 0x13
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0xb
+	.uleb128 0x5
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x1f
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x20
+	.uleb128 0xd
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x38
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x21
+	.uleb128 0x4
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
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+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
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+	.uleb128 0x22
+	.uleb128 0x28
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x1c
+	.uleb128 0xb
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+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x5a
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x5d
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x5e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x5f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x61
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x62
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x63
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x64
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x65
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x66
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x68
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x34
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
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+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
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+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x6d
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
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+	.uleb128 0x6f
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x71
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x7
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x73
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x74
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x75
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x76
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x77
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x78
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",@progbits
+.Ldebug_loc0:
+.LLST468:
+	.8byte	.LVL2175
+	.8byte	.LVL2176-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2176-1
+	.8byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST469:
+	.8byte	.LVL2175
+	.8byte	.LVL2176-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2176-1
+	.8byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST470:
+	.8byte	.LVL2175
+	.8byte	.LVL2176-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL2176-1
+	.8byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST303:
+	.8byte	.LVL1240
+	.8byte	.LVL1241-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1241-1
+	.8byte	.LFE346
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST304:
+	.8byte	.LVL1240
+	.8byte	.LVL1241-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1241-1
+	.8byte	.LFE346
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST305:
+	.8byte	.LVL1240
+	.8byte	.LVL1241-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1241-1
+	.8byte	.LFE346
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST196:
+	.8byte	.LVL737
+	.8byte	.LVL738-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL738-1
+	.8byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST197:
+	.8byte	.LVL737
+	.8byte	.LVL738-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL738-1
+	.8byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST198:
+	.8byte	.LVL737
+	.8byte	.LVL738-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL738-1
+	.8byte	.LFE345
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST299:
+	.8byte	.LVL1226
+	.8byte	.LVL1228-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1228-1
+	.8byte	.LVL1236
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1236
+	.8byte	.LVL1237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1237
+	.8byte	.LFE344
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST300:
+	.8byte	.LVL1226
+	.8byte	.LVL1227
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1227
+	.8byte	.LVL1236
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1236
+	.8byte	.LVL1237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL1237
+	.8byte	.LFE344
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST301:
+	.8byte	.LVL1230
+	.8byte	.LVL1231
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1232
+	.8byte	.LVL1233
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1233
+	.8byte	.LFE344
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST302:
+	.8byte	.LVL1234
+	.8byte	.LVL1235
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1237
+	.8byte	.LVL1238
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1238
+	.8byte	.LVL1239
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST175:
+	.8byte	.LVL662
+	.8byte	.LVL666
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL666
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST176:
+	.8byte	.LVL662
+	.8byte	.LVL663
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL663
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST177:
+	.8byte	.LVL662
+	.8byte	.LVL664
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL664
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST178:
+	.8byte	.LVL665
+	.8byte	.LVL666
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST179:
+	.8byte	.LVL670
+	.8byte	.LVL671
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL672
+	.8byte	.LVL673
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL674
+	.8byte	.LVL675
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST180:
+	.8byte	.LVL662
+	.8byte	.LVL666
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL666
+	.8byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST181:
+	.8byte	.LVL665
+	.8byte	.LVL667
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL668
+	.8byte	.LFE342
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST167:
+	.8byte	.LVL638
+	.8byte	.LVL643
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL643
+	.8byte	.LVL644
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL644
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LVL656
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL656
+	.8byte	.LVL661
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL661
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST168:
+	.8byte	.LVL638
+	.8byte	.LVL639
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL639
+	.8byte	.LFE341
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST169:
+	.8byte	.LVL638
+	.8byte	.LVL640
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL640
+	.8byte	.LVL645
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL645
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST170:
+	.8byte	.LVL638
+	.8byte	.LVL641
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL641
+	.8byte	.LVL644
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL644
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LVL656
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL656
+	.8byte	.LVL661
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL661
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST171:
+	.8byte	.LVL642
+	.8byte	.LVL643
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST172:
+	.8byte	.LVL650
+	.8byte	.LVL651
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL652
+	.8byte	.LVL653
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL654
+	.8byte	.LVL655
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST173:
+	.8byte	.LVL642
+	.8byte	.LVL646
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL647
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST174:
+	.8byte	.LVL642
+	.8byte	.LVL643
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL643
+	.8byte	.LVL644
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL644
+	.8byte	.LVL647
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL647
+	.8byte	.LVL656
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL656
+	.8byte	.LVL661
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL661
+	.8byte	.LFE341
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST152:
+	.8byte	.LVL595
+	.8byte	.LVL599
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL599
+	.8byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST153:
+	.8byte	.LVL595
+	.8byte	.LVL597
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL597
+	.8byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST154:
+	.8byte	.LVL595
+	.8byte	.LVL596
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL596
+	.8byte	.LFE340
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST155:
+	.8byte	.LVL598
+	.8byte	.LVL599
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST156:
+	.8byte	.LVL604
+	.8byte	.LVL605
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL605
+	.8byte	.LVL606-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 0
+	.8byte	.LVL606
+	.8byte	.LVL607
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST157:
+	.8byte	.LVL598
+	.8byte	.LVL600
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL601
+	.8byte	.LFE340
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST143:
+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL582
+	.8byte	.LVL586
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL586
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST144:
+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST145:
+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL582
+	.8byte	.LVL585
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL585
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST146:
+	.8byte	.LVL580
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL582
+	.8byte	.LVL586
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL586
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST147:
+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL582
+	.8byte	.LVL583
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL587
+	.8byte	.LVL592
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL592
+	.8byte	.LVL593
+	.2byte	0x3
+	.byte	0x83
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL594
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST148:
+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL582
+	.8byte	.LVL583
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL587
+	.8byte	.LVL591
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL591
+	.8byte	.LVL592
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL592
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST149:
+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST150:
+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST151:
+	.8byte	.LVL581
+	.8byte	.LVL582
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL582
+	.8byte	.LVL584
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL584
+	.8byte	.LVL587
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL587
+	.8byte	.LFE338
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST142:
+	.8byte	.LVL578
+	.8byte	.LVL579-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL579-1
+	.8byte	.LFE337
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST139:
+	.8byte	.LVL563
+	.8byte	.LVL564
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL564
+	.8byte	.LVL575
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL575
+	.8byte	.LFE315
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST140:
+	.8byte	.LVL569
+	.8byte	.LVL570
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL570
+	.8byte	.LVL571
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL572
+	.8byte	.LVL573
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST141:
+	.8byte	.LVL566
+	.8byte	.LVL567
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL567
+	.8byte	.LVL574
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST138:
+	.8byte	.LVL559
+	.8byte	.LVL560
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL560
+	.8byte	.LVL561-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL561-1
+	.8byte	.LVL562
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL562
+	.8byte	.LFE314
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST409:
+	.8byte	.LVL1808
+	.8byte	.LVL1809
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1809
+	.8byte	.LVL1810-1
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL1812
+	.8byte	.LVL1813-1
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL1816
+	.8byte	.LVL1820
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	.LVL1821
+	.8byte	.LVL1822
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	0
+	.8byte	0
+.LLST410:
+	.8byte	.LVL1817
+	.8byte	.LVL1818
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1818
+	.8byte	.LVL1819-1
+	.2byte	0x17
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x35
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe0
+	.byte	0x1a
+	.byte	0x3
+	.8byte	req_gc_dst
+	.byte	0x6
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x10
+	.8byte	0
+	.8byte	0
+.LLST286:
+	.8byte	.LVL1171
+	.8byte	.LVL1172
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1172
+	.8byte	.LVL1212
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1212
+	.8byte	.LFE310
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST287:
+	.8byte	.LVL1171
+	.8byte	.LVL1174-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1174-1
+	.8byte	.LVL1175
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1175
+	.8byte	.LVL1177
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1177
+	.8byte	.LVL1214
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1214
+	.8byte	.LFE310
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST288:
+	.8byte	.LVL1188
+	.8byte	.LVL1189
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1189
+	.8byte	.LVL1192
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 0
+	.8byte	.LVL1192
+	.8byte	.LVL1193
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 -2
+	.8byte	0
+	.8byte	0
+.LLST289:
+	.8byte	.LVL1180
+	.8byte	.LVL1181
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1181
+	.8byte	.LVL1182-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1187
+	.8byte	.LVL1190
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1191
+	.8byte	.LVL1193
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST290:
+	.8byte	.LVL1182
+	.8byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST291:
+	.8byte	.LVL1180
+	.8byte	.LVL1181
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST292:
+	.8byte	.LVL1179
+	.8byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1186
+	.8byte	.LVL1193
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1196
+	.8byte	.LVL1197
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1197
+	.8byte	.LVL1201-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1202
+	.8byte	.LVL1203
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1205
+	.8byte	.LVL1207-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1210
+	.8byte	.LVL1211
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST293:
+	.8byte	.LVL1173
+	.8byte	.LVL1184
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1186
+	.8byte	.LVL1206
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1208
+	.8byte	.LVL1210
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1210
+	.8byte	.LVL1212
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST294:
+	.8byte	.LVL1194
+	.8byte	.LVL1200
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1202
+	.8byte	.LVL1204-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1205
+	.8byte	.LVL1207-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST295:
+	.8byte	.LVL1171
+	.8byte	.LVL1178
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1178
+	.8byte	.LVL1185
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1185
+	.8byte	.LVL1186
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1186
+	.8byte	.LVL1213
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST296:
+	.8byte	.LVL1198
+	.8byte	.LVL1199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1199
+	.8byte	.LVL1200
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 16
+	.8byte	.LVL1202
+	.8byte	.LVL1203
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1203
+	.8byte	.LVL1204-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST404:
+	.8byte	.LVL1762
+	.8byte	.LVL1764
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1764
+	.8byte	.LVL1765
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1765
+	.8byte	.LVL1767
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1767
+	.8byte	.LFE308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST405:
+	.8byte	.LVL1776
+	.8byte	.LVL1779
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1779
+	.8byte	.LVL1782
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1785
+	.8byte	.LVL1795
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1796
+	.8byte	.LFE308
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST406:
+	.8byte	.LVL1768
+	.8byte	.LVL1770
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1775
+	.8byte	.LVL1776
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1790
+	.8byte	.LVL1791
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1791
+	.8byte	.LVL1793
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST407:
+	.8byte	.LVL1763
+	.8byte	.LVL1764
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1765
+	.8byte	.LVL1766
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1766
+	.8byte	.LVL1768
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	.LVL1768
+	.8byte	.LVL1769-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1774
+	.8byte	.LVL1775
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST408:
+	.8byte	.LVL1786
+	.8byte	.LVL1797
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST133:
+	.8byte	.LVL547
+	.8byte	.LVL548
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL548
+	.8byte	.LFE307
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST134:
+	.8byte	.LVL547
+	.8byte	.LVL549-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL549-1
+	.8byte	.LFE307
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	0
+	.8byte	0
+.LLST135:
+	.8byte	.LVL547
+	.8byte	.LVL549-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL549-1
+	.8byte	.LFE307
+	.2byte	0x1
+	.byte	0x58
+	.8byte	0
+	.8byte	0
+.LLST136:
+	.8byte	.LVL550
+	.8byte	.LVL553
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL553
+	.8byte	.LVL554
+	.2byte	0x7
+	.byte	0x73
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x75
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL554
+	.8byte	.LVL555
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL555
+	.8byte	.LVL557
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL557
+	.8byte	.LVL558
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST137:
+	.8byte	.LVL550
+	.8byte	.LVL551
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL552
+	.8byte	.LVL556
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST131:
+	.8byte	.LVL543
+	.8byte	.LVL545
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL545
+	.8byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST132:
+	.8byte	.LVL543
+	.8byte	.LVL544
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL544
+	.8byte	.LVL546
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST129:
+	.8byte	.LVL537
+	.8byte	.LVL538
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL539
+	.8byte	.LVL540
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST130:
+	.8byte	.LVL535
+	.8byte	.LVL536
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL536
+	.8byte	.LVL541
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL542
+	.8byte	.LFE305
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST127:
+	.8byte	.LVL529
+	.8byte	.LVL530
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL531
+	.8byte	.LVL534
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST128:
+	.8byte	.LVL527
+	.8byte	.LVL528
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL528
+	.8byte	.LVL532
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL533
+	.8byte	.LFE304
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST126:
+	.8byte	.LVL520
+	.8byte	.LVL521
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL522
+	.8byte	.LVL523
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL524
+	.8byte	.LVL525
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL526
+	.8byte	.LFE303
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST323:
+	.8byte	.LVL1337
+	.8byte	.LVL1338
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1338
+	.8byte	.LVL1342
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1342
+	.8byte	.LFE302
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST324:
+	.8byte	.LVL1337
+	.8byte	.LVL1341
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1343
+	.8byte	.LVL1346
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1346
+	.8byte	.LFE302
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST123:
+	.8byte	.LVL506
+	.8byte	.LVL507
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL507
+	.8byte	.LVL516
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL516
+	.8byte	.LVL517
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL517
+	.8byte	.LFE300
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST124:
+	.8byte	.LVL511
+	.8byte	.LVL513
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL517
+	.8byte	.LVL518
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL519
+	.8byte	.LFE300
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST125:
+	.8byte	.LVL506
+	.8byte	.LVL512
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL512
+	.8byte	.LVL515
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL515
+	.8byte	.LVL517
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL517
+	.8byte	.LFE300
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST389:
+	.8byte	.LVL1698
+	.8byte	.LVL1700
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1700
+	.8byte	.LVL1708
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1708
+	.8byte	.LVL1710
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1710
+	.8byte	.LFE299
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST390:
+	.8byte	.LVL1699
+	.8byte	.LVL1709
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1710
+	.8byte	.LFE299
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST310:
+	.8byte	.LVL1264
+	.8byte	.LVL1265
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1265
+	.8byte	.LVL1305
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1305
+	.8byte	.LFE298
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST311:
+	.8byte	.LVL1272
+	.8byte	.LVL1277
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1278
+	.8byte	.LVL1305
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST312:
+	.8byte	.LVL1280
+	.8byte	.LVL1292
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1293
+	.8byte	.LVL1306
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST313:
+	.8byte	.LVL1284
+	.8byte	.LVL1285
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1286
+	.8byte	.LVL1287
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1287
+	.8byte	.LVL1291
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1297
+	.8byte	.LVL1301
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1301
+	.8byte	.LVL1302
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1303
+	.8byte	.LVL1307
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST314:
+	.8byte	.LVL1286
+	.8byte	.LVL1287
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1287
+	.8byte	.LVL1288-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1297
+	.8byte	.LVL1298
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1298
+	.8byte	.LVL1299
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1299
+	.8byte	.LVL1300-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1300-1
+	.8byte	.LVL1301
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 196
+	.8byte	.LVL1301
+	.8byte	.LVL1303
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST315:
+	.8byte	.LVL1264
+	.8byte	.LVL1266
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1268
+	.8byte	.LVL1269
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1269
+	.8byte	.LVL1270
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1270
+	.8byte	.LVL1271-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST316:
+	.8byte	.LVL1294
+	.8byte	.LVL1296
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST317:
+	.8byte	.LVL1294
+	.8byte	.LVL1296
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST114:
+	.8byte	.LVL476
+	.8byte	.LVL480
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL481
+	.8byte	.LVL490
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL498
+	.8byte	.LVL500
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST115:
+	.8byte	.LVL476
+	.8byte	.LVL480
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL481
+	.8byte	.LVL490
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL490
+	.8byte	.LVL491
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL491
+	.8byte	.LVL496
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL496
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST116:
+	.8byte	.LVL476
+	.8byte	.LVL480
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL481
+	.8byte	.LVL490
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL490
+	.8byte	.LVL494
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL496
+	.8byte	.LVL499
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL500
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST117:
+	.8byte	.LVL490
+	.8byte	.LVL491
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL496
+	.8byte	.LVL497
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL501
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST118:
+	.8byte	.LVL488
+	.8byte	.LVL489
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL489
+	.8byte	.LVL495-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL496
+	.8byte	.LFE296
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST119:
+	.8byte	.LVL492
+	.8byte	.LVL495-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST120:
+	.8byte	.LVL477
+	.8byte	.LVL478
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL478
+	.8byte	.LVL479
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL481
+	.8byte	.LVL482
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL483
+	.8byte	.LVL484
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL484
+	.8byte	.LVL486
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST103:
+	.8byte	.LVL305
+	.8byte	.LVL306
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL306
+	.8byte	.LVL308
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL308
+	.8byte	.LVL311
+	.2byte	0x41
+	.byte	0x3
+	.8byte	g_num_free_superblocks
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x37
+	.byte	0x1e
+	.byte	0x33
+	.byte	0x26
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x3
+	.8byte	g_num_free_superblocks
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x37
+	.byte	0x1e
+	.byte	0x33
+	.byte	0x26
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x2b
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL311
+	.8byte	.LVL314
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL314
+	.8byte	.LFE295
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST104:
+	.8byte	.LVL305
+	.8byte	.LVL310
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL310
+	.8byte	.LVL311
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL311
+	.8byte	.LVL315
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL315
+	.8byte	.LFE295
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST105:
+	.8byte	.LVL307
+	.8byte	.LVL309
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL311
+	.8byte	.LVL314
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST106:
+	.8byte	.LVL307
+	.8byte	.LVL312
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL313
+	.8byte	.LVL314
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST102:
+	.8byte	.LVL301
+	.8byte	.LVL302
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL302
+	.8byte	.LVL303
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL303
+	.8byte	.LVL304
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL304
+	.8byte	.LFE294
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST98:
+	.8byte	.LVL287
+	.8byte	.LVL288
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL288
+	.8byte	.LVL291
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL291
+	.8byte	.LFE293
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST99:
+	.8byte	.LVL287
+	.8byte	.LVL289
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL289
+	.8byte	.LVL298
+	.2byte	0x1
+	.byte	0x57
+	.8byte	.LVL298
+	.8byte	.LVL299
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL299
+	.8byte	.LFE293
+	.2byte	0x1
+	.byte	0x57
+	.8byte	0
+	.8byte	0
+.LLST100:
+	.8byte	.LVL295
+	.8byte	.LVL296-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST101:
+	.8byte	.LVL287
+	.8byte	.LVL289
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL289
+	.8byte	.LVL293
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL294
+	.8byte	.LVL297
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL298
+	.8byte	.LFE293
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST249:
+	.8byte	.LVL954
+	.8byte	.LVL955
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL956
+	.8byte	.LFE291
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST250:
+	.8byte	.LVL959
+	.8byte	.LVL961
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST281:
+	.8byte	.LVL1144
+	.8byte	.LVL1145
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1147
+	.8byte	.LVL1148
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1156
+	.8byte	.LVL1159
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1160
+	.8byte	.LVL1161
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1161
+	.8byte	.LVL1166
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1167
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST282:
+	.8byte	.LVL1142
+	.8byte	.LVL1143
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1151
+	.8byte	.LVL1156
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST283:
+	.8byte	.LVL1147
+	.8byte	.LVL1148
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1153
+	.8byte	.LVL1154
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1161
+	.8byte	.LVL1164
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1165
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST284:
+	.8byte	.LVL1140
+	.8byte	.LVL1144
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1144
+	.8byte	.LVL1149
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1149
+	.8byte	.LVL1150
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL1151
+	.8byte	.LVL1156
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1156
+	.8byte	.LVL1162
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1163
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST285:
+	.8byte	.LVL1146
+	.8byte	.LVL1148
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1161
+	.8byte	.LFE290
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST386:
+	.8byte	.LVL1684
+	.8byte	.LVL1685
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1691
+	.8byte	.LVL1696
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1697
+	.8byte	.LFE289
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST387:
+	.8byte	.LVL1682
+	.8byte	.LVL1683
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1686
+	.8byte	.LVL1691
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST388:
+	.8byte	.LVL1688
+	.8byte	.LVL1689
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST354:
+	.8byte	.LVL1508
+	.8byte	.LVL1509
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1509
+	.8byte	.LVL1513
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1513
+	.8byte	.LVL1514
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1514
+	.8byte	.LFE288
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST355:
+	.8byte	.LVL1516
+	.8byte	.LVL1517
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1517
+	.8byte	.LVL1518-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	p_sys_spare_buf
+	.8byte	0
+	.8byte	0
+.LLST356:
+	.8byte	.LVL1508
+	.8byte	.LVL1509
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.8byte	.LVL1509
+	.8byte	.LVL1510
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	.LVL1510
+	.8byte	.LVL1511
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1511
+	.8byte	.LVL1512
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	.LVL1514
+	.8byte	.LFE288
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -2
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST275:
+	.8byte	.LVL1116
+	.8byte	.LVL1117
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1117
+	.8byte	.LVL1128
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1129
+	.8byte	.LVL1138
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST276:
+	.8byte	.LVL1118
+	.8byte	.LVL1122
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1122
+	.8byte	.LVL1123
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1123
+	.8byte	.LVL1127-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1130
+	.8byte	.LVL1135-1
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST277:
+	.8byte	.LVL1119
+	.8byte	.LVL1120-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST278:
+	.8byte	.LVL1118
+	.8byte	.LVL1121
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1122
+	.8byte	.LVL1127-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1130
+	.8byte	.LVL1131
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1132
+	.8byte	.LVL1135-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST279:
+	.8byte	.LVL1116
+	.8byte	.LVL1117
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1117
+	.8byte	.LVL1133
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1134
+	.8byte	.LVL1136
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1136
+	.8byte	.LVL1137-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	g_num_data_superblocks
+	.8byte	0
+	.8byte	0
+.LLST280:
+	.8byte	.LVL1116
+	.8byte	.LVL1117
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1117
+	.8byte	.LVL1125
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1126
+	.8byte	.LVL1139
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST95:
+	.8byte	.LVL276
+	.8byte	.LVL277
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL277
+	.8byte	.LVL280
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL280
+	.8byte	.LVL281
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL281
+	.8byte	.LFE284
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST96:
+	.8byte	.LVL279
+	.8byte	.LVL285
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL285
+	.8byte	.LVL286
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST97:
+	.8byte	.LVL283
+	.8byte	.LVL284-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL284-1
+	.8byte	.LFE284
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST329:
+	.8byte	.LVL1367
+	.8byte	.LVL1368
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1368
+	.8byte	.LVL1372
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1372
+	.8byte	.LVL1373
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1373
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST330:
+	.8byte	.LVL1369
+	.8byte	.LVL1371
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1373
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST331:
+	.8byte	.LVL1369
+	.8byte	.LVL1370
+	.2byte	0x8
+	.byte	0x83
+	.sleb128 6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1370
+	.8byte	.LVL1371
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1373
+	.8byte	.LVL1376-1
+	.2byte	0x8
+	.byte	0x83
+	.sleb128 6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1376-1
+	.8byte	.LVL1390
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1390
+	.8byte	.LVL1395
+	.2byte	0x8
+	.byte	0x83
+	.sleb128 6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1395
+	.8byte	.LFE281
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST332:
+	.8byte	.LVL1373
+	.8byte	.LVL1375
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1375
+	.8byte	.LVL1378
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1390
+	.8byte	.LVL1391
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1392
+	.8byte	.LVL1399
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1434
+	.8byte	.LVL1435
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1440
+	.8byte	.LVL1441
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1441
+	.8byte	.LVL1445
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1504
+	.8byte	.LVL1505
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1506
+	.8byte	.LVL1507
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST333:
+	.8byte	.LVL1433
+	.8byte	.LVL1434
+	.2byte	0x9
+	.byte	0x8f
+	.sleb128 324
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL1458
+	.8byte	.LVL1460
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1507
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST334:
+	.8byte	.LVL1417
+	.8byte	.LVL1418
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1419
+	.8byte	.LVL1420
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1420
+	.8byte	.LVL1421
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1421
+	.8byte	.LVL1430
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1431
+	.8byte	.LVL1432
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1433
+	.8byte	.LVL1434
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1434
+	.8byte	.LVL1438
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1439
+	.8byte	.LVL1445
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1445
+	.8byte	.LVL1450
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1450
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST335:
+	.8byte	.LVL1387
+	.8byte	.LVL1390
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1414
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST336:
+	.8byte	.LVL1385
+	.8byte	.LVL1390
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1409
+	.8byte	.LVL1410
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1414
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST337:
+	.8byte	.LVL1374
+	.8byte	.LVL1376-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1390
+	.8byte	.LVL1393
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1394
+	.8byte	.LVL1395
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1400
+	.8byte	.LVL1401
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1401
+	.8byte	.LVL1404
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 0
+	.8byte	.LVL1404
+	.8byte	.LVL1405
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 -2
+	.8byte	.LVL1422
+	.8byte	.LVL1425
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1425
+	.8byte	.LVL1426
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 0
+	.8byte	.LVL1442
+	.8byte	.LVL1443
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 328
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.8byte	.LVL1443
+	.8byte	.LVL1444
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 -4
+	.8byte	.LVL1451
+	.8byte	.LVL1454
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1454
+	.8byte	.LVL1455
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 0
+	.8byte	.LVL1455
+	.8byte	.LVL1456
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 -2
+	.8byte	.LVL1504
+	.8byte	.LVL1507
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 -4
+	.8byte	0
+	.8byte	0
+.LLST338:
+	.8byte	.LVL1377
+	.8byte	.LVL1379
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1379
+	.8byte	.LVL1388
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1395
+	.8byte	.LVL1396
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1396
+	.8byte	.LVL1419
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1420
+	.8byte	.LVL1421
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST340:
+	.8byte	.LVL1380
+	.8byte	.LVL1384
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1399
+	.8byte	.LVL1402
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1403
+	.8byte	.LVL1409
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1410
+	.8byte	.LVL1414
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1421
+	.8byte	.LVL1423
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1424
+	.8byte	.LVL1427
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1434
+	.8byte	.LVL1435
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1435
+	.8byte	.LVL1437
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1450
+	.8byte	.LVL1452
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1453
+	.8byte	.LVL1456
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST341:
+	.8byte	.LVL1382
+	.8byte	.LVL1383
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1383
+	.8byte	.LVL1385
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1405
+	.8byte	.LVL1408
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1410
+	.8byte	.LVL1412
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1413
+	.8byte	.LVL1414
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST342:
+	.8byte	.LVL1428
+	.8byte	.LVL1429
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1436
+	.8byte	.LVL1437
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST343:
+	.8byte	.LVL1459
+	.8byte	.LVL1463
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1465
+	.8byte	.LVL1475
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1475
+	.8byte	.LVL1478
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1478
+	.8byte	.LVL1500
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1500
+	.8byte	.LVL1502
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1502
+	.8byte	.LVL1504
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST344:
+	.8byte	.LVL1459
+	.8byte	.LVL1463
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1465
+	.8byte	.LVL1473
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1478
+	.8byte	.LVL1493
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1493
+	.8byte	.LVL1495
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1502
+	.8byte	.LVL1504
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST345:
+	.8byte	.LVL1382
+	.8byte	.LVL1390
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1405
+	.8byte	.LFE281
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST346:
+	.8byte	.LVL1367
+	.8byte	.LVL1371
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1373
+	.8byte	.LVL1383
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1383
+	.8byte	.LVL1388
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1390
+	.8byte	.LVL1405
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1405
+	.8byte	.LVL1416
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1416
+	.8byte	.LVL1432
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1445
+	.8byte	.LVL1450
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST347:
+	.8byte	.LVL1406
+	.8byte	.LVL1410
+	.2byte	0x1
+	.byte	0x58
+	.8byte	.LVL1446
+	.8byte	.LVL1447
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL1447
+	.8byte	.LVL1448
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 0
+	.8byte	.LVL1448
+	.8byte	.LVL1449
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 -32
+	.8byte	.LVL1461
+	.8byte	.LVL1462
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1465
+	.8byte	.LVL1468-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1470
+	.8byte	.LVL1471-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1471-1
+	.8byte	.LVL1472
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1480
+	.8byte	.LVL1481
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1484
+	.8byte	.LVL1485-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 16
+	.8byte	.LVL1485-1
+	.8byte	.LVL1486
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 256
+	.8byte	.LVL1496
+	.8byte	.LVL1497-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1497-1
+	.8byte	.LVL1500
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	0
+	.8byte	0
+.LLST348:
+	.8byte	.LVL1415
+	.8byte	.LVL1432
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1445
+	.8byte	.LVL1450
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST349:
+	.8byte	.LVL1415
+	.8byte	.LVL1419
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1420
+	.8byte	.LVL1421
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST350:
+	.8byte	.LVL1471
+	.8byte	.LVL1472
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	.LVL1480
+	.8byte	.LVL1481
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	0
+	.8byte	0
+.LLST351:
+	.8byte	.LVL1487
+	.8byte	.LVL1490
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST352:
+	.8byte	.LVL1494
+	.8byte	.LVL1500
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST353:
+	.8byte	.LVL1497
+	.8byte	.LVL1498-1
+	.2byte	0x6
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	0
+	.8byte	0
+.LLST243:
+	.8byte	.LVL934
+	.8byte	.LVL935
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL935
+	.8byte	.LVL947
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL947
+	.8byte	.LVL948
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL948
+	.8byte	.LFE280
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST244:
+	.8byte	.LVL934
+	.8byte	.LVL936-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST245:
+	.8byte	.LVL937
+	.8byte	.LVL938
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL938
+	.8byte	.LVL942-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL948
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL953
+	.8byte	.LFE280
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST246:
+	.8byte	.LVL940
+	.8byte	.LVL941
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL948
+	.8byte	.LVL951
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL952
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST247:
+	.8byte	.LVL940
+	.8byte	.LVL945
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL948
+	.8byte	.LVL949
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL950
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST248:
+	.8byte	.LVL939
+	.8byte	.LVL942-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL948
+	.8byte	.LVL953
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST90:
+	.8byte	.LVL261
+	.8byte	.LVL262
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL262
+	.8byte	.LFE279
+	.2byte	0x1
+	.byte	0x56
+	.8byte	0
+	.8byte	0
+.LLST91:
+	.8byte	.LVL261
+	.8byte	.LVL264
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL264
+	.8byte	.LFE279
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST92:
+	.8byte	.LVL263
+	.8byte	.LVL265
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL266
+	.8byte	.LVL267
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL268
+	.8byte	.LVL269
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST274:
+	.8byte	.LVL1104
+	.8byte	.LVL1105
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST263:
+	.8byte	.LVL1055
+	.8byte	.LVL1058
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1058
+	.8byte	.LVL1076
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1076
+	.8byte	.LVL1082
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST264:
+	.8byte	.LVL1064
+	.8byte	.LVL1065
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1065
+	.8byte	.LVL1080
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST265:
+	.8byte	.LVL1069
+	.8byte	.LVL1070
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1070
+	.8byte	.LVL1071
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1082
+	.8byte	.LVL1084
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1085
+	.8byte	.LVL1086
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1088
+	.8byte	.LVL1089-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1090
+	.8byte	.LVL1091
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1092
+	.8byte	.LVL1093
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1095
+	.8byte	.LVL1100
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1101
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST266:
+	.8byte	.LVL1068
+	.8byte	.LVL1071
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1082
+	.8byte	.LVL1086
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST267:
+	.8byte	.LVL1096
+	.8byte	.LVL1097
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1097
+	.8byte	.LVL1098
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x32
+	.byte	0x24
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL1098
+	.8byte	.LVL1099
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x32
+	.byte	0x24
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST268:
+	.8byte	.LVL1056
+	.8byte	.LVL1077
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST269:
+	.8byte	.LVL1057
+	.8byte	.LVL1066
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1086
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST270:
+	.8byte	.LVL1059
+	.8byte	.LVL1060
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1060
+	.8byte	.LVL1062-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 24
+	.8byte	.LVL1062-1
+	.8byte	.LVL1081
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 256
+	.8byte	.LVL1081
+	.8byte	.LVL1082
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 112
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 256
+	.8byte	0
+	.8byte	0
+.LLST271:
+	.8byte	.LVL1059
+	.8byte	.LVL1078
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST272:
+	.8byte	.LVL1061
+	.8byte	.LVL1081
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 268
+	.8byte	.LVL1081
+	.8byte	.LVL1082
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 124
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 268
+	.8byte	0
+	.8byte	0
+.LLST273:
+	.8byte	.LVL1063
+	.8byte	.LVL1079
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1082
+	.8byte	.LFE275
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST461:
+	.8byte	.LVL2078
+	.8byte	.LVL2081
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2090
+	.8byte	.LVL2092
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2093
+	.8byte	.LFE274
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST89:
+	.8byte	.LVL259
+	.8byte	.LVL260
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL260
+	.8byte	.LFE273
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST256:
+	.8byte	.LVL990
+	.8byte	.LVL997
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL997
+	.8byte	.LVL998
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL998
+	.8byte	.LVL999
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1001
+	.8byte	.LVL1002-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL1002
+	.8byte	.LVL1004
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST257:
+	.8byte	.LVL989
+	.8byte	.LVL1038
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 332
+	.8byte	.LVL1038
+	.8byte	.LVL1039
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 156
+	.8byte	.LVL1039
+	.8byte	.LFE270
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 332
+	.8byte	0
+	.8byte	0
+.LLST258:
+	.8byte	.LVL992
+	.8byte	.LVL993-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL993-1
+	.8byte	.LVL996
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1005
+	.8byte	.LVL1036
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST259:
+	.8byte	.LVL990
+	.8byte	.LVL994
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL995
+	.8byte	.LVL999
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1001
+	.8byte	.LVL1003
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST260:
+	.8byte	.LVL1015
+	.8byte	.LVL1016
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1017
+	.8byte	.LVL1018
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1019
+	.8byte	.LVL1020
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1026
+	.8byte	.LVL1027
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1028
+	.8byte	.LVL1029
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1030
+	.8byte	.LVL1031
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1040
+	.8byte	.LVL1045
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1046
+	.8byte	.LVL1047
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1048
+	.8byte	.LVL1049
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1052
+	.8byte	.LVL1053
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1054
+	.8byte	.LFE270
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST261:
+	.8byte	.LVL1006
+	.8byte	.LVL1008
+	.2byte	0x8
+	.byte	0x40
+	.byte	0x8f
+	.sleb128 328
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1009
+	.8byte	.LVL1010
+	.2byte	0x8
+	.byte	0x40
+	.byte	0x8f
+	.sleb128 328
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1010
+	.8byte	.LVL1011
+	.2byte	0x5
+	.byte	0x41
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1014
+	.8byte	.LVL1021
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1022
+	.8byte	.LVL1023
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1025
+	.8byte	.LVL1032
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1033
+	.8byte	.LVL1034
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1041
+	.8byte	.LVL1042
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1043
+	.8byte	.LVL1044
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1049
+	.8byte	.LVL1050
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1051
+	.8byte	.LVL1052
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST262:
+	.8byte	.LVL1005
+	.8byte	.LVL1036
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST383:
+	.8byte	.LVL1661
+	.8byte	.LVL1668
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL1668
+	.8byte	.LVL1680
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST384:
+	.8byte	.LVL1662
+	.8byte	.LVL1679
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST385:
+	.8byte	.LVL1661
+	.8byte	.LVL1668
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1668
+	.8byte	.LVL1674
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1675
+	.8byte	.LVL1678
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST252:
+	.8byte	.LVL973
+	.8byte	.LVL975
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL975
+	.8byte	.LVL979
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL979
+	.8byte	.LVL980-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL980-1
+	.8byte	.LVL980
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL980
+	.8byte	.LVL983
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL983
+	.8byte	.LFE267
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST253:
+	.8byte	.LVL976
+	.8byte	.LVL977
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL977
+	.8byte	.LVL978-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	req_sys+4
+	.8byte	.LVL980
+	.8byte	.LVL981
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL981
+	.8byte	.LVL982-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	req_sys+4
+	.8byte	0
+	.8byte	0
+.LLST254:
+	.8byte	.LVL973
+	.8byte	.LVL974
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL983
+	.8byte	.LFE267
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST255:
+	.8byte	.LVL973
+	.8byte	.LVL974
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 40
+	.8byte	.LVL983
+	.8byte	.LFE267
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 40
+	.8byte	0
+	.8byte	0
+.LLST373:
+	.8byte	.LVL1620
+	.8byte	.LVL1623
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1623
+	.8byte	.LVL1627
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1627
+	.8byte	.LVL1628
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1628
+	.8byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST374:
+	.8byte	.LVL1620
+	.8byte	.LVL1621
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.8byte	.LVL1621
+	.8byte	.LVL1622
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL1622
+	.8byte	.LVL1624
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1627
+	.8byte	.LVL1628
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST375:
+	.8byte	.LVL1629
+	.8byte	.LVL1632
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1632
+	.8byte	.LVL1636
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1637
+	.8byte	.LFE264
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST376:
+	.8byte	.LVL1629
+	.8byte	.LVL1630
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1630
+	.8byte	.LVL1635
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1637
+	.8byte	.LFE264
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST377:
+	.8byte	.LVL1629
+	.8byte	.LVL1633
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1637
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1655
+	.8byte	.LFE264
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST378:
+	.8byte	.LVL1640
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST379:
+	.8byte	.LVL1639
+	.8byte	.LVL1642
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1642
+	.8byte	.LVL1645-1
+	.2byte	0x28
+	.byte	0x85
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1652
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST380:
+	.8byte	.LVL1638
+	.8byte	.LVL1643
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1643
+	.8byte	.LVL1644
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL1644
+	.8byte	.LVL1645-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 4
+	.8byte	.LVL1652
+	.8byte	.LVL1653
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1653
+	.8byte	.LVL1654-1
+	.2byte	0x16
+	.byte	0x8a
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x10
+	.uleb128 0x3fffffffc
+	.byte	0x1a
+	.byte	0x3
+	.8byte	p_vendor_region_ppn_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST381:
+	.8byte	.LVL1629
+	.8byte	.LVL1633
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1637
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1655
+	.8byte	.LFE264
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST382:
+	.8byte	.LVL1631
+	.8byte	.LVL1632
+	.2byte	0x13
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1632
+	.8byte	.LVL1633
+	.2byte	0x13
+	.byte	0x85
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1633
+	.8byte	.LVL1634
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1637
+	.8byte	.LVL1655
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1655
+	.8byte	.LFE264
+	.2byte	0x13
+	.byte	0x85
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST365:
+	.8byte	.LVL1591
+	.8byte	.LVL1594
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1594
+	.8byte	.LVL1598
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1599
+	.8byte	.LVL1610
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL1613
+	.8byte	.LFE263
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST366:
+	.8byte	.LVL1591
+	.8byte	.LVL1592
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1592
+	.8byte	.LVL1597
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1599
+	.8byte	.LVL1609
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1613
+	.8byte	.LFE263
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST367:
+	.8byte	.LVL1591
+	.8byte	.LVL1595
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1599
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1618
+	.8byte	.LFE263
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST368:
+	.8byte	.LVL1602
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST369:
+	.8byte	.LVL1601
+	.8byte	.LVL1607
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1615
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST370:
+	.8byte	.LVL1600
+	.8byte	.LVL1604
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1604
+	.8byte	.LVL1605
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 212
+	.8byte	.LVL1605
+	.8byte	.LVL1606-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 4
+	.8byte	.LVL1615
+	.8byte	.LVL1616
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1616
+	.8byte	.LVL1617-1
+	.2byte	0x16
+	.byte	0x85
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0x10
+	.uleb128 0x3fffffffc
+	.byte	0x1a
+	.byte	0x3
+	.8byte	p_vendor_region_ppn_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST371:
+	.8byte	.LVL1591
+	.8byte	.LVL1595
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1599
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1618
+	.8byte	.LFE263
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST372:
+	.8byte	.LVL1593
+	.8byte	.LVL1594
+	.2byte	0x13
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1594
+	.8byte	.LVL1595
+	.2byte	0x13
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	.LVL1595
+	.8byte	.LVL1596
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1599
+	.8byte	.LVL1611
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1611
+	.8byte	.LVL1612-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1612-1
+	.8byte	.LVL1613
+	.2byte	0x3
+	.byte	0x85
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1613
+	.8byte	.LVL1618
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1618
+	.8byte	.LFE263
+	.2byte	0x13
+	.byte	0x8c
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST237:
+	.8byte	.LVL914
+	.8byte	.LVL918
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL918
+	.8byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST238:
+	.8byte	.LVL914
+	.8byte	.LVL915
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL915
+	.8byte	.LVL932
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL932
+	.8byte	.LVL933
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST239:
+	.8byte	.LVL914
+	.8byte	.LVL919
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL919
+	.8byte	.LVL932
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL932
+	.8byte	.LVL933
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST240:
+	.8byte	.LVL920
+	.8byte	.LVL921
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL922
+	.8byte	.LVL924
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL924
+	.8byte	.LVL925-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL925-1
+	.8byte	.LVL927
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL927
+	.8byte	.LVL929
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST241:
+	.8byte	.LVL916
+	.8byte	.LVL931
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST242:
+	.8byte	.LVL917
+	.8byte	.LVL930
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL933
+	.8byte	.LFE262
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST328:
+	.8byte	.LVL1361
+	.8byte	.LVL1362
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1363
+	.8byte	.LVL1365
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1366
+	.8byte	.LFE261
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST83:
+	.8byte	.LVL228
+	.8byte	.LVL229
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL230
+	.8byte	.LVL231
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL231
+	.8byte	.LVL233
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL235
+	.8byte	.LVL236
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL238
+	.8byte	.LVL239
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL240
+	.8byte	.LVL243
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL244
+	.8byte	.LVL248
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL249
+	.8byte	.LFE260
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST84:
+	.8byte	.LVL232
+	.8byte	.LVL234
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL235
+	.8byte	.LVL238
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL240
+	.8byte	.LFE260
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST85:
+	.8byte	.LVL232
+	.8byte	.LVL235
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL235
+	.8byte	.LVL237-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL240
+	.8byte	.LVL241
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL242
+	.8byte	.LVL245
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL245
+	.8byte	.LVL246
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL247
+	.8byte	.LFE260
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST235:
+	.8byte	.LVL909
+	.8byte	.LVL910
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL910
+	.8byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST236:
+	.8byte	.LVL911
+	.8byte	.LVL912
+	.2byte	0x9
+	.byte	0x71
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL912
+	.8byte	.LVL913-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST222:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL870
+	.8byte	.LVL884
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL884
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST223:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL870
+	.8byte	.LVL885
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL885
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST224:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL870
+	.8byte	.LVL883
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL883
+	.8byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST225:
+	.8byte	.LVL874
+	.8byte	.LVL875-1
+	.2byte	0x7
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL875-1
+	.8byte	.LVL886
+	.2byte	0xa
+	.byte	0x8f
+	.sleb128 204
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL886
+	.8byte	.LFE258
+	.2byte	0xa
+	.byte	0x8f
+	.sleb128 92
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST226:
+	.8byte	.LVL876
+	.8byte	.LVL877
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL877
+	.8byte	.LVL878-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	req_sys+16
+	.8byte	0
+	.8byte	0
+.LLST227:
+	.8byte	.LVL869
+	.8byte	.LVL870
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL870
+	.8byte	.LVL879
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL880
+	.8byte	.LVL882
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST216:
+	.8byte	.LVL847
+	.8byte	.LVL849
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL849
+	.8byte	.LVL853
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL853
+	.8byte	.LVL854
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL854
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST217:
+	.8byte	.LVL858
+	.8byte	.LVL859
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL859
+	.8byte	.LVL861
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL864
+	.8byte	.LVL867
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL867
+	.8byte	.LVL868
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST218:
+	.8byte	.LVL858
+	.8byte	.LVL859
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL859
+	.8byte	.LVL860
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL864
+	.8byte	.LVL865
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL866
+	.8byte	.LFE257
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST219:
+	.8byte	.LVL848
+	.8byte	.LVL852
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL854
+	.8byte	.LVL855
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL855
+	.8byte	.LVL858-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST220:
+	.8byte	.LVL848
+	.8byte	.LVL849
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 40
+	.8byte	.LVL849
+	.8byte	.LVL850-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 40
+	.8byte	.LVL854
+	.8byte	.LVL858-1
+	.2byte	0x2
+	.byte	0x83
+	.sleb128 40
+	.8byte	0
+	.8byte	0
+.LLST221:
+	.8byte	.LVL856
+	.8byte	.LVL857
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL857
+	.8byte	.LVL858-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	p_sys_spare_buf
+	.8byte	0
+	.8byte	0
+.LLST228:
+	.8byte	.LVL887
+	.8byte	.LVL890-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL890-1
+	.8byte	.LVL898
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL898
+	.8byte	.LVL900
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL900
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST229:
+	.8byte	.LVL892
+	.8byte	.LVL896
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL900
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST230:
+	.8byte	.LVL890
+	.8byte	.LVL891
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST231:
+	.8byte	.LVL894
+	.8byte	.LVL896
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL900
+	.8byte	.LVL905
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL906
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST232:
+	.8byte	.LVL888
+	.8byte	.LVL894
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST233:
+	.8byte	.LVL889
+	.8byte	.LVL899
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL900
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST234:
+	.8byte	.LVL901
+	.8byte	.LVL904
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL907
+	.8byte	.LFE256
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST207:
+	.8byte	.LVL824
+	.8byte	.LVL826
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL826
+	.8byte	.LVL831
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL831
+	.8byte	.LVL835
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL835
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST208:
+	.8byte	.LVL825
+	.8byte	.LVL833
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL835
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST209:
+	.8byte	.LVL825
+	.8byte	.LVL830
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL835
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST210:
+	.8byte	.LVL825
+	.8byte	.LVL832
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL835
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST211:
+	.8byte	.LVL836
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST212:
+	.8byte	.LVL827
+	.8byte	.LVL828
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL828
+	.8byte	.LVL830
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL835
+	.8byte	.LVL837
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL838
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST213:
+	.8byte	.LVL829
+	.8byte	.LVL830
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL830
+	.8byte	.LVL831
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL836
+	.8byte	.LVL839
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL840
+	.8byte	.LVL841
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL841
+	.8byte	.LVL845
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL846
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST214:
+	.8byte	.LVL829
+	.8byte	.LVL834
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL841
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST215:
+	.8byte	.LVL829
+	.8byte	.LVL830
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL830
+	.8byte	.LVL834
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL841
+	.8byte	.LVL842
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL843
+	.8byte	.LFE254
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST204:
+	.8byte	.LVL808
+	.8byte	.LVL809
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL809
+	.8byte	.LVL815
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL815
+	.8byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST205:
+	.8byte	.LVL808
+	.8byte	.LVL810
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL810
+	.8byte	.LVL813
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL813
+	.8byte	.LFE253
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST206:
+	.8byte	.LVL812
+	.8byte	.LVL816
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL817
+	.8byte	.LFE253
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST67:
+	.8byte	.LVL188
+	.8byte	.LVL189
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL189
+	.8byte	.LVL192
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL194
+	.8byte	.LFE251
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST68:
+	.8byte	.LVL188
+	.8byte	.LVL196
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x8
+	.byte	0x71
+	.sleb128 0
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST69:
+	.8byte	.LVL190
+	.8byte	.LVL191
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL193
+	.8byte	.LVL195
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL196
+	.8byte	.LVL197
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST66:
+	.8byte	.LVL186
+	.8byte	.LVL187-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL187-1
+	.8byte	.LFE250
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST62:
+	.8byte	.LVL173
+	.8byte	.LVL178-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL178-1
+	.8byte	.LVL180
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL180
+	.8byte	.LVL185
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL185
+	.8byte	.LFE249
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST63:
+	.8byte	.LVL173
+	.8byte	.LVL174
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL174
+	.8byte	.LVL177
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL180
+	.8byte	.LVL181
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL183
+	.8byte	.LFE249
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST64:
+	.8byte	.LVL173
+	.8byte	.LVL176
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL176
+	.8byte	.LVL179
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL179
+	.8byte	.LVL180
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL180
+	.8byte	.LFE249
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST65:
+	.8byte	.LVL174
+	.8byte	.LVL175
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL180
+	.8byte	.LVL184
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST58:
+	.8byte	.LVL160
+	.8byte	.LVL161
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL161
+	.8byte	.LVL166
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL166
+	.8byte	.LVL168
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL168
+	.8byte	.LFE248
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST59:
+	.8byte	.LVL160
+	.8byte	.LVL163
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL163
+	.8byte	.LFE248
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST60:
+	.8byte	.LVL162
+	.8byte	.LVL165
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL165
+	.8byte	.LVL166
+	.2byte	0x6
+	.byte	0x87
+	.sleb128 0
+	.byte	0x85
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL166
+	.8byte	.LVL167
+	.2byte	0xd
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL168
+	.8byte	.LFE248
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST61:
+	.8byte	.LVL169
+	.8byte	.LVL170
+	.2byte	0x16
+	.byte	0x83
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL171
+	.8byte	.LVL172
+	.2byte	0xc
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL172
+	.8byte	.LFE248
+	.2byte	0xe
+	.byte	0x83
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST51:
+	.8byte	.LVL140
+	.8byte	.LVL143
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL143
+	.8byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST52:
+	.8byte	.LVL141
+	.8byte	.LVL142
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL144
+	.8byte	.LVL154
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL154
+	.8byte	.LFE247
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST53:
+	.8byte	.LVL145
+	.8byte	.LVL146
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL146
+	.8byte	.LFE247
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST54:
+	.8byte	.LVL146
+	.8byte	.LVL147
+	.2byte	0xb
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL148
+	.8byte	.LVL150
+	.2byte	0xb
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL151
+	.8byte	.LVL152
+	.2byte	0xb
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST55:
+	.8byte	.LVL146
+	.8byte	.LVL148
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL148
+	.8byte	.LVL151
+	.2byte	0x1
+	.byte	0x5a
+	.8byte	.LVL151
+	.8byte	.LVL153
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL153
+	.8byte	.LVL155
+	.2byte	0x5
+	.byte	0x73
+	.sleb128 0
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST41:
+	.8byte	.LVL108
+	.8byte	.LVL111
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL111
+	.8byte	.LFE246
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST42:
+	.8byte	.LVL109
+	.8byte	.LVL110
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL112
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL129
+	.8byte	.LVL130
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL130
+	.8byte	.LVL134
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL134
+	.8byte	.LFE246
+	.2byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST43:
+	.8byte	.LVL116
+	.8byte	.LVL118
+	.2byte	0x1
+	.byte	0x5c
+	.8byte	.LVL118
+	.8byte	.LFE246
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST44:
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL114
+	.8byte	.LVL118
+	.2byte	0x5
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL118
+	.8byte	.LVL124
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL126
+	.8byte	.LVL128
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL130
+	.8byte	.LVL133
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST45:
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL120
+	.8byte	.LVL122
+	.2byte	0x5
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x81
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL122
+	.8byte	.LVL124
+	.2byte	0xd
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x5
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x81
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0xd
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL130
+	.8byte	.LVL132
+	.2byte	0xd
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST46:
+	.8byte	.LVL113
+	.8byte	.LVL114
+	.2byte	0xe
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL114
+	.8byte	.LVL115
+	.2byte	0x13
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL115
+	.8byte	.LVL116
+	.2byte	0x15
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL116
+	.8byte	.LFE246
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST47:
+	.8byte	.LVL119
+	.8byte	.LVL120
+	.2byte	0xe
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL120
+	.8byte	.LVL121
+	.2byte	0x13
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x81
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL121
+	.8byte	.LVL123
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL123
+	.8byte	.LVL124
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL126
+	.8byte	.LVL127
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL127
+	.8byte	.LVL128
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL130
+	.8byte	.LVL132
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0xc
+	.4byte	0x1fffe
+	.byte	0x1a
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8e
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST48:
+	.8byte	.LVL117
+	.8byte	.LVL125
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL125
+	.8byte	.LVL126
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.8byte	.LVL126
+	.8byte	.LVL129
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL130
+	.8byte	.LVL133
+	.2byte	0x1
+	.byte	0x56
+	.8byte	.LVL133
+	.8byte	.LVL135
+	.2byte	0x5
+	.byte	0x74
+	.sleb128 0
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST39:
+	.8byte	.LVL103
+	.8byte	.LVL105
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL105
+	.8byte	.LVL106
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL106
+	.8byte	.LVL107
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.8byte	.LVL107
+	.8byte	.LFE243
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST40:
+	.8byte	.LVL104
+	.8byte	.LVL106
+	.2byte	0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST36:
+	.8byte	.LVL96
+	.8byte	.LVL99
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL99
+	.8byte	.LFE242
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST37:
+	.8byte	.LVL96
+	.8byte	.LVL102
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL102
+	.8byte	.LFE242
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST38:
+	.8byte	.LVL97
+	.8byte	.LVL98
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL100
+	.8byte	.LFE242
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST30:
+	.8byte	.LVL75
+	.8byte	.LVL76
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL76
+	.8byte	.LVL77
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL77
+	.8byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL78
+	.8byte	.LVL81
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL81
+	.8byte	.LVL82
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL83
+	.8byte	.LVL87
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL92
+	.8byte	.LFE241
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST31:
+	.8byte	.LVL83
+	.8byte	.LVL85
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL85
+	.8byte	.LVL88
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL92
+	.8byte	.LFE241
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST32:
+	.8byte	.LVL84
+	.8byte	.LVL85
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL85
+	.8byte	.LVL86
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL92
+	.8byte	.LVL94
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL95
+	.8byte	.LFE241
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST33:
+	.8byte	.LVL90
+	.8byte	.LVL91
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST34:
+	.8byte	.LVL79
+	.8byte	.LVL80
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST35:
+	.8byte	.LVL89
+	.8byte	.LVL91
+	.2byte	0x1
+	.byte	0x5b
+	.8byte	0
+	.8byte	0
+.LLST182:
+	.8byte	.LVL676
+	.8byte	.LVL677
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL677
+	.8byte	.LVL685
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL685
+	.8byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST183:
+	.8byte	.LVL676
+	.8byte	.LVL679-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL679-1
+	.8byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST184:
+	.8byte	.LVL678
+	.8byte	.LVL684
+	.2byte	0xa
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST185:
+	.8byte	.LVL680
+	.8byte	.LVL681
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL681
+	.8byte	.LVL683
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST203:
+	.8byte	.LVL805
+	.8byte	.LVL806
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL806
+	.8byte	.LVL807-1
+	.2byte	0x9
+	.byte	0x3
+	.8byte	gSysFreeQueue
+	.8byte	.LVL807-1
+	.8byte	.LFE237
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST161:
+	.8byte	.LVL618
+	.8byte	.LVL622
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL622
+	.8byte	.LVL629
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL629
+	.8byte	.LVL631
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL631
+	.8byte	.LFE236
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST162:
+	.8byte	.LVL618
+	.8byte	.LVL619
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL619
+	.8byte	.LVL628
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL628
+	.8byte	.LVL629
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL629
+	.8byte	.LVL630
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL630
+	.8byte	.LFE236
+	.2byte	0x1
+	.byte	0x67
+	.8byte	0
+	.8byte	0
+.LLST163:
+	.8byte	.LVL623
+	.8byte	.LVL625
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL625
+	.8byte	.LVL626
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL631
+	.8byte	.LFE236
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST164:
+	.8byte	.LVL623
+	.8byte	.LVL627
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL631
+	.8byte	.LVL634
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL635
+	.8byte	.LFE236
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST165:
+	.8byte	.LVL632
+	.8byte	.LVL636
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL636
+	.8byte	.LFE236
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST166:
+	.8byte	.LVL620
+	.8byte	.LVL621
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST27:
+	.8byte	.LVL69
+	.8byte	.LVL71
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL71
+	.8byte	.LVL72
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL74
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL74
+	.8byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST28:
+	.8byte	.LVL69
+	.8byte	.LVL70
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL70
+	.8byte	.LVL72
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL73
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL73
+	.8byte	.LFE235
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST29:
+	.8byte	.LVL69
+	.8byte	.LVL72
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL72
+	.8byte	.LVL74
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL74
+	.8byte	.LFE235
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST25:
+	.8byte	.LVL65
+	.8byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL66
+	.8byte	.LFE234
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST26:
+	.8byte	.LVL67
+	.8byte	.LVL68
+	.2byte	0x15
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.8byte	.LVL68
+	.8byte	.LFE234
+	.2byte	0x3a
+	.byte	0x72
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST24:
+	.8byte	.LVL62
+	.8byte	.LVL63
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL63
+	.8byte	.LFE233
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST22:
+	.8byte	.LVL58
+	.8byte	.LVL60
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL60
+	.8byte	.LFE232
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST23:
+	.8byte	.LVL59
+	.8byte	.LVL60
+	.2byte	0x24
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x72
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x72
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x70
+	.sleb128 0
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL60
+	.8byte	.LVL61
+	.2byte	0x26
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x72
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x72
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x72
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL61
+	.8byte	.LFE232
+	.2byte	0x41
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1e
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x3
+	.8byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST361:
+	.8byte	.LVL1546
+	.8byte	.LVL1547
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1547
+	.8byte	.LVL1549
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1557
+	.8byte	.LVL1562
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1562
+	.8byte	.LVL1563
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1563
+	.8byte	.LVL1583
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST362:
+	.8byte	.LVL1548
+	.8byte	.LVL1550
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1551
+	.8byte	.LVL1555
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1556
+	.8byte	.LVL1557
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1567
+	.8byte	.LVL1577
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1578
+	.8byte	.LVL1580
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1580
+	.8byte	.LVL1581-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1582
+	.8byte	.LVL1584
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1589
+	.8byte	.LVL1590-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST363:
+	.8byte	.LVL1559
+	.8byte	.LVL1564
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1571
+	.8byte	.LVL1576
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST364:
+	.8byte	.LVL1558
+	.8byte	.LVL1579
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST158:
+	.8byte	.LVL608
+	.8byte	.LVL609
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL611
+	.8byte	.LFE230
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST159:
+	.8byte	.LVL612
+	.8byte	.LVL616
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL617
+	.8byte	.LFE230
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST160:
+	.8byte	.LVL608
+	.8byte	.LVL610
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL611
+	.8byte	.LFE230
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST357:
+	.8byte	.LVL1532
+	.8byte	.LVL1533
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1541
+	.8byte	.LVL1542
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1542
+	.8byte	.LVL1543
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1543
+	.8byte	.LVL1544
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST358:
+	.8byte	.LVL1522
+	.8byte	.LVL1525
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1534
+	.8byte	.LVL1535
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1536
+	.8byte	.LVL1537
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST359:
+	.8byte	.LVL1528
+	.8byte	.LVL1532
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1537
+	.8byte	.LVL1539
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1540
+	.8byte	.LVL1541
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST360:
+	.8byte	.LVL1520
+	.8byte	.LVL1531
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1534
+	.8byte	.LVL1541
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1544
+	.8byte	.LFE229
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST20:
+	.8byte	.LVL51
+	.8byte	.LVL52
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL52
+	.8byte	.LVL56
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL57
+	.8byte	.LFE228
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST21:
+	.8byte	.LVL51
+	.8byte	.LVL52
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL52
+	.8byte	.LVL54
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL55
+	.8byte	.LFE228
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST306:
+	.8byte	.LVL1243
+	.8byte	.LVL1244
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1255
+	.8byte	.LVL1256
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL1256
+	.8byte	.LVL1257
+	.2byte	0x3
+	.byte	0x88
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL1257
+	.8byte	.LVL1258
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST307:
+	.8byte	.LVL1242
+	.8byte	.LVL1247
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1247
+	.8byte	.LVL1255
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1255
+	.8byte	.LVL1258
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1258
+	.8byte	.LVL1259
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL1260
+	.8byte	.LVL1263
+	.2byte	0x3
+	.byte	0x89
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST308:
+	.8byte	.LVL1245
+	.8byte	.LVL1255
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1258
+	.8byte	.LVL1261
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST309:
+	.8byte	.LVL1242
+	.8byte	.LVL1247
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1247
+	.8byte	.LVL1252
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1253
+	.8byte	.LVL1255
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1255
+	.8byte	.LVL1258
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1258
+	.8byte	.LVL1262
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST201:
+	.8byte	.LVL797
+	.8byte	.LVL798
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL798
+	.8byte	.LVL803
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL803
+	.8byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST202:
+	.8byte	.LVL797
+	.8byte	.LVL799
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL799
+	.8byte	.LVL802
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL802
+	.8byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST16:
+	.8byte	.LVL45
+	.8byte	.LVL47
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL47
+	.8byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST17:
+	.8byte	.LVL46
+	.8byte	.LVL47
+	.2byte	0x10
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x71
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL47
+	.8byte	.LVL48
+	.2byte	0x11
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x71
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL48
+	.8byte	.LFE223
+	.2byte	0x1a
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST18:
+	.8byte	.LVL49
+	.8byte	.LVL50
+	.2byte	0x41
+	.byte	0x70
+	.sleb128 0
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x4
+	.byte	0x70
+	.sleb128 0
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL50
+	.8byte	.LFE223
+	.2byte	0x97
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x29
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST19:
+	.8byte	.LVL49
+	.8byte	.LVL50
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL50
+	.8byte	.LFE223
+	.2byte	0x2e
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST12:
+	.8byte	.LVL40
+	.8byte	.LVL41
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL41
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL44-1
+	.8byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST13:
+	.8byte	.LVL42
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST14:
+	.8byte	.LVL43
+	.8byte	.LVL44-1
+	.2byte	0x16
+	.byte	0x72
+	.sleb128 0
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.8byte	gBbtInfo
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST15:
+	.8byte	.LVL43
+	.8byte	.LVL44-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST458:
+	.8byte	.LVL2071
+	.8byte	.LVL2074
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2074
+	.8byte	.LVL2075-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2075-1
+	.8byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST459:
+	.8byte	.LVL2071
+	.8byte	.LVL2073
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2073
+	.8byte	.LVL2075-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL2075-1
+	.8byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST460:
+	.8byte	.LVL2071
+	.8byte	.LVL2072
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL2072
+	.8byte	.LVL2075-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL2075-1
+	.8byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST440:
+	.8byte	.LVL1978
+	.8byte	.LVL1981
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1981
+	.8byte	.LVL1982-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1982-1
+	.8byte	.LFE219
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST441:
+	.8byte	.LVL1978
+	.8byte	.LVL1980
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1980
+	.8byte	.LVL1982-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1982-1
+	.8byte	.LFE219
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST442:
+	.8byte	.LVL1978
+	.8byte	.LVL1979
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1979
+	.8byte	.LVL1982-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1982-1
+	.8byte	.LFE219
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST398:
+	.8byte	.LVL1738
+	.8byte	.LVL1740
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1740
+	.8byte	.LVL1741
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1741
+	.8byte	.LVL1743
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1743
+	.8byte	.LVL1746
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1746
+	.8byte	.LVL1761
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL1761
+	.8byte	.LFE218
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST399:
+	.8byte	.LVL1738
+	.8byte	.LVL1739
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1739
+	.8byte	.LVL1742
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1743
+	.8byte	.LFE218
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST400:
+	.8byte	.LVL1746
+	.8byte	.LVL1751
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL1751
+	.8byte	.LVL1752
+	.2byte	0x2a
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0xf7
+	.uleb128 0x30
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST401:
+	.8byte	.LVL1747
+	.8byte	.LVL1748
+	.2byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x83
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL1748
+	.8byte	.LVL1750
+	.2byte	0x2e
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x83
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST402:
+	.8byte	.LVL1745
+	.8byte	.LVL1761
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST403:
+	.8byte	.LVL1757
+	.8byte	.LVL1758-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST443:
+	.8byte	.LVL1983
+	.8byte	.LVL1986
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1986
+	.8byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST444:
+	.8byte	.LVL1983
+	.8byte	.LVL1985
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1985
+	.8byte	.LVL1987
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL1989
+	.8byte	.LVL1992
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1992
+	.8byte	.LVL2016
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2024
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2031
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL2070
+	.8byte	.LFE217
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST445:
+	.8byte	.LVL1983
+	.8byte	.LVL1984
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1984
+	.8byte	.LVL1988
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1989
+	.8byte	.LVL1990
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1990
+	.8byte	.LFE217
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST446:
+	.8byte	.LVL1983
+	.8byte	.LVL1987-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1987-1
+	.8byte	.LVL1988
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1989
+	.8byte	.LVL1991
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1991
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL2070
+	.8byte	.LFE217
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST447:
+	.8byte	.LVL2044
+	.8byte	.LVL2066
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST448:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1998
+	.8byte	.LVL2018
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL2037
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST449:
+	.8byte	.LVL1993
+	.8byte	.LVL2017
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL2024
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL2031
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST450:
+	.8byte	.LVL1994
+	.8byte	.LVL1995
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1995
+	.8byte	.LVL2070
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 344
+	.8byte	0
+	.8byte	0
+.LLST451:
+	.8byte	.LVL2042
+	.8byte	.LVL2043
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2043
+	.8byte	.LVL2045
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.8byte	.LVL2045
+	.8byte	.LVL2046-1
+	.2byte	0xf
+	.byte	0x3
+	.8byte	req_prgm
+	.byte	0x6
+	.byte	0x87
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.8byte	0
+	.8byte	0
+.LLST452:
+	.8byte	.LVL2009
+	.8byte	.LVL2014
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 360
+	.8byte	.LVL2040
+	.8byte	.LVL2052
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 360
+	.8byte	.LVL2052
+	.8byte	.LVL2053
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2053
+	.8byte	.LVL2070
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 360
+	.8byte	0
+	.8byte	0
+.LLST453:
+	.8byte	.LVL1996
+	.8byte	.LVL2029
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL2029
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL2031
+	.8byte	.LVL2037
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL2037
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST454:
+	.8byte	.LVL2005
+	.8byte	.LVL2006
+	.2byte	0x21
+	.byte	0x83
+	.sleb128 7
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x12
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x88
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0xc
+	.4byte	0xffffffff
+	.byte	0x1a
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.8byte	.LVL2006
+	.8byte	.LVL2007
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2007
+	.8byte	.LVL2010
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 336
+	.8byte	.LVL2010
+	.8byte	.LVL2011
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL2011
+	.8byte	.LVL2013
+	.2byte	0x3
+	.byte	0x8b
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL2013
+	.8byte	.LVL2014
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL2040
+	.8byte	.LVL2066
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 336
+	.8byte	.LVL2066
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	0
+	.8byte	0
+.LLST455:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2025
+	.8byte	.LVL2027
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2027
+	.8byte	.LVL2029-1
+	.2byte	0x16
+	.byte	0x86
+	.sleb128 0
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL2047
+	.8byte	.LVL2048
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2048
+	.8byte	.LVL2050
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 340
+	.8byte	.LVL2053
+	.8byte	.LVL2055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2055
+	.8byte	.LVL2056
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 340
+	.8byte	.LVL2057
+	.8byte	.LVL2065
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 340
+	.8byte	0
+	.8byte	0
+.LLST456:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2026
+	.8byte	.LVL2028
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL2028
+	.8byte	.LVL2030
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2031
+	.8byte	.LVL2037
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2049
+	.8byte	.LVL2050
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 348
+	.8byte	.LVL2054
+	.8byte	.LVL2055
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2055
+	.8byte	.LVL2056
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 348
+	.8byte	.LVL2057
+	.8byte	.LVL2065
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 348
+	.8byte	0
+	.8byte	0
+.LLST457:
+	.8byte	.LVL1997
+	.8byte	.LVL1998
+	.2byte	0xa
+	.byte	0x3
+	.8byte	g_active_superblock
+	.byte	0x9f
+	.8byte	.LVL1998
+	.8byte	.LVL2002
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2004
+	.8byte	.LVL2019
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2037
+	.8byte	.LVL2039
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2040
+	.8byte	.LVL2070
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST391:
+	.8byte	.LVL1712
+	.8byte	.LVL1715-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1715-1
+	.8byte	.LVL1715
+	.2byte	0x3
+	.byte	0x84
+	.sleb128 -4
+	.byte	0x9f
+	.8byte	.LVL1715
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST392:
+	.8byte	.LVL1712
+	.8byte	.LVL1715-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1715-1
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST393:
+	.8byte	.LVL1712
+	.8byte	.LVL1713
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1713
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST394:
+	.8byte	.LVL1712
+	.8byte	.LVL1714
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1714
+	.8byte	.LVL1731
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1731
+	.8byte	.LFE215
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST395:
+	.8byte	.LVL1724
+	.8byte	.LVL1727-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST396:
+	.8byte	.LVL1716
+	.8byte	.LVL1717
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1726
+	.8byte	.LVL1727-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1727-1
+	.8byte	.LVL1729
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST397:
+	.8byte	.LVL1723
+	.8byte	.LVL1725-1
+	.2byte	0x2
+	.byte	0x86
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST423:
+	.8byte	.LVL1929
+	.8byte	.LVL1932
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1932
+	.8byte	.LFE214
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST424:
+	.8byte	.LVL1929
+	.8byte	.LVL1931
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1931
+	.8byte	.LVL1935
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL1935
+	.8byte	.LVL1938
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1939
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL1939
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST425:
+	.8byte	.LVL1929
+	.8byte	.LVL1930
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1930
+	.8byte	.LVL1937
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1937
+	.8byte	.LVL1938
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1940-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1940-1
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x6b
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST426:
+	.8byte	.LVL1929
+	.8byte	.LVL1933-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1933-1
+	.8byte	.LVL1936
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1936
+	.8byte	.LVL1938
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1940-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1940-1
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST427:
+	.8byte	.LVL1929
+	.8byte	.LVL1934
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1956
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1958
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST428:
+	.8byte	.LVL1941
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST429:
+	.8byte	.LVL1942
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST430:
+	.8byte	.LVL1960
+	.8byte	.LVL1961
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1961
+	.8byte	.LVL1962-1
+	.2byte	0x16
+	.byte	0x3
+	.8byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x84
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST431:
+	.8byte	.LVL1943
+	.8byte	.LVL1945
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL1945
+	.8byte	.LVL1977
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST432:
+	.8byte	.LVL1952
+	.8byte	.LVL1954
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST433:
+	.8byte	.LVL1943
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1953
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL1959
+	.8byte	.LVL1974
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST434:
+	.8byte	.LVL1943
+	.8byte	.LVL1944
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL1944
+	.8byte	.LVL1950
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 300
+	.8byte	.LVL1950
+	.8byte	.LVL1951
+	.2byte	0x8
+	.byte	0x8f
+	.sleb128 300
+	.byte	0x94
+	.byte	0x4
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1959
+	.8byte	.LVL1974
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 300
+	.8byte	0
+	.8byte	0
+.LLST435:
+	.8byte	.LVL1929
+	.8byte	.LVL1934
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1966
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1966
+	.8byte	.LVL1967
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1967
+	.8byte	.LVL1977
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 296
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST436:
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1967
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 292
+	.8byte	.LVL1967
+	.8byte	.LVL1968
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1968
+	.8byte	.LVL1969
+	.2byte	0x9
+	.byte	0x71
+	.sleb128 0
+	.byte	0x8f
+	.sleb128 296
+	.byte	0x94
+	.byte	0x4
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL1969
+	.8byte	.LVL1970
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL1970
+	.8byte	.LVL1977
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 292
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST437:
+	.8byte	.LVL1938
+	.8byte	.LVL1945
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL1945
+	.8byte	.LVL1972
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 288
+	.8byte	.LVL1972
+	.8byte	.LVL1973
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL1973
+	.8byte	.LVL1977
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 288
+	.8byte	.LVL1977
+	.8byte	.LFE214
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST438:
+	.8byte	.LVL1948
+	.8byte	.LVL1949
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1959
+	.8byte	.LVL1962-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL1962-1
+	.8byte	.LVL1963
+	.2byte	0x3
+	.byte	0x8f
+	.sleb128 264
+	.8byte	.LVL1964
+	.8byte	.LVL1965
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST439:
+	.8byte	.LVL1975
+	.8byte	.LVL1976-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST467:
+	.8byte	.LVL2171
+	.8byte	.LVL2172
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL2172
+	.8byte	.LVL2173
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc2
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL2173
+	.8byte	.LVL2174
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x1fc1
+	.byte	0x83
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST463:
+	.8byte	.LVL2128
+	.8byte	.LVL2129
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL2131
+	.8byte	.LVL2132
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL2141
+	.8byte	.LVL2142
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL2142
+	.8byte	.LVL2143-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2145
+	.8byte	.LVL2146
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL2150
+	.8byte	.LVL2151
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2151
+	.8byte	.LVL2152-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2152
+	.8byte	.LVL2153
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2153
+	.8byte	.LVL2154
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL2154
+	.8byte	.LVL2155-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2157
+	.8byte	.LVL2158
+	.2byte	0x1
+	.byte	0x68
+	.8byte	0
+	.8byte	0
+.LLST464:
+	.8byte	.LVL2131
+	.8byte	.LVL2135
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2153
+	.8byte	.LVL2156
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2157
+	.8byte	.LVL2158
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST465:
+	.8byte	.LVL2127
+	.8byte	.LVL2128
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL2128
+	.8byte	.LVL2130
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2141
+	.8byte	.LVL2144
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2145
+	.8byte	.LVL2147
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL2149
+	.8byte	.LVL2150
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST466:
+	.8byte	.LVL2126
+	.8byte	.LVL2128
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2138
+	.8byte	.LVL2139
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL2140
+	.8byte	.LVL2141
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST186:
+	.8byte	.LVL686
+	.8byte	.LVL687
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL687
+	.8byte	.LVL712
+	.2byte	0x1
+	.byte	0x68
+	.8byte	.LVL712
+	.8byte	.LFE209
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST187:
+	.8byte	.LVL686
+	.8byte	.LVL689
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL689
+	.8byte	.LVL712
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL712
+	.8byte	.LFE209
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST188:
+	.8byte	.LVL686
+	.8byte	.LVL690
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL690
+	.8byte	.LVL693
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL694
+	.8byte	.LVL703
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL704
+	.8byte	.LVL711
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL713
+	.8byte	.LVL724
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL725
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST189:
+	.8byte	.LVL686
+	.8byte	.LVL690
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL690
+	.8byte	.LVL691
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL699
+	.8byte	.LVL700
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL700
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL713
+	.8byte	.LVL718
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL719
+	.8byte	.LVL726
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL727
+	.8byte	.LVL732
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL733
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST190:
+	.8byte	.LVL688
+	.8byte	.LVL690
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL690
+	.8byte	.LVL692-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL699
+	.8byte	.LVL700
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL700
+	.8byte	.LVL701-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL701
+	.8byte	.LVL702
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL713
+	.8byte	.LVL721
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL721
+	.8byte	.LVL722
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	.LVL723
+	.8byte	.LVL726
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL727
+	.8byte	.LVL735
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL735
+	.8byte	.LVL736
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST191:
+	.8byte	.LVL715
+	.8byte	.LVL720
+	.2byte	0x1
+	.byte	0x5d
+	.8byte	.LVL720
+	.8byte	.LVL723
+	.2byte	0x1
+	.byte	0x5e
+	.8byte	.LVL723
+	.8byte	.LVL726
+	.2byte	0x1
+	.byte	0x5d
+	.8byte	.LVL729
+	.8byte	.LVL734
+	.2byte	0x1
+	.byte	0x5c
+	.8byte	.LVL734
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x5d
+	.8byte	0
+	.8byte	0
+.LLST192:
+	.8byte	.LVL686
+	.8byte	.LVL697
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL697
+	.8byte	.LVL698
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL699
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x6a
+	.8byte	0
+	.8byte	0
+.LLST193:
+	.8byte	.LVL686
+	.8byte	.LVL699
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL699
+	.8byte	.LVL706
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL707
+	.8byte	.LVL708
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST194:
+	.8byte	.LVL686
+	.8byte	.LVL698
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.8byte	.LVL699
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	0
+	.8byte	0
+.LLST195:
+	.8byte	.LVL686
+	.8byte	.LVL696
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL696
+	.8byte	.LVL698
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL699
+	.8byte	.LVL710
+	.2byte	0x1
+	.byte	0x69
+	.8byte	.LVL713
+	.8byte	.LVL727
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL727
+	.8byte	.LFE209
+	.2byte	0x1
+	.byte	0x69
+	.8byte	0
+	.8byte	0
+.LLST199:
+	.8byte	.LVL794
+	.8byte	.LVL795
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST200:
+	.8byte	.LVL741
+	.8byte	.LVL747
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL748
+	.8byte	.LVL755
+	.2byte	0x7
+	.byte	0x83
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.8byte	.LVL757
+	.8byte	.LVL760
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL764
+	.8byte	.LVL766
+	.2byte	0x1
+	.byte	0x6c
+	.8byte	.LVL766
+	.8byte	.LVL767-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL768
+	.8byte	.LVL769-1
+	.2byte	0xe
+	.byte	0x3
+	.8byte	c_ftl_nand_max_map_blks
+	.byte	0x94
+	.byte	0x4
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL776
+	.8byte	.LVL777
+	.2byte	0x12
+	.byte	0x3
+	.8byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL777
+	.8byte	.LVL778-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL779
+	.8byte	.LVL780-1
+	.2byte	0xe
+	.byte	0x3
+	.8byte	c_ftl_nand_max_map_blks
+	.byte	0x94
+	.byte	0x4
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL781
+	.8byte	.LVL782
+	.2byte	0x12
+	.byte	0x3
+	.8byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x34
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL782
+	.8byte	.LVL783-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL784
+	.8byte	.LVL785
+	.2byte	0x20
+	.byte	0x3
+	.8byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3
+	.8byte	c_ftl_nand_byte_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL785
+	.8byte	.LVL786-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL787
+	.8byte	.LVL788
+	.2byte	0x12
+	.byte	0x3
+	.8byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x9f
+	.8byte	.LVL788
+	.8byte	.LVL789-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL790
+	.8byte	.LVL791
+	.2byte	0x15
+	.byte	0x3
+	.8byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL791
+	.8byte	.LVL792
+	.2byte	0x26
+	.byte	0x3
+	.8byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x1f
+	.byte	0x35
+	.byte	0x26
+	.byte	0x3
+	.8byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.8byte	.LVL792
+	.8byte	.LVL793-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST8:
+	.8byte	.LVL25
+	.8byte	.LVL26
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL26
+	.8byte	.LVL32
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL32
+	.8byte	.LFE205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST9:
+	.8byte	.LVL27
+	.8byte	.LVL28
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL28
+	.8byte	.LVL29
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST7:
+	.8byte	.LVL21
+	.8byte	.LVL22
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL22
+	.8byte	.LVL23
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL23
+	.8byte	.LVL24
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL24
+	.8byte	.LFE204
+	.2byte	0x9
+	.byte	0x3
+	.8byte	c_ftl_nand_sys_blks_per_plane
+	.8byte	0
+	.8byte	0
+.LLST4:
+	.8byte	.LVL12
+	.8byte	.LVL15
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL15
+	.8byte	.LVL16
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LFE202
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST5:
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LVL14
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL14
+	.8byte	.LVL16
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL16
+	.8byte	.LVL17
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL19
+	.8byte	.LFE202
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST6:
+	.8byte	.LVL12
+	.8byte	.LVL13
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.8byte	.LVL13
+	.8byte	.LFE202
+	.2byte	0x1
+	.byte	0x52
+	.8byte	0
+	.8byte	0
+.LLST112:
+	.8byte	.LVL468
+	.8byte	.LVL470-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL470-1
+	.8byte	.LVL475
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL475
+	.8byte	.LFE201
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST113:
+	.8byte	.LVL469
+	.8byte	.LVL470-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL470-1
+	.8byte	.LVL471
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL471
+	.8byte	.LVL472
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL472
+	.8byte	.LVL473
+	.2byte	0xc
+	.byte	0x70
+	.sleb128 0
+	.byte	0x8
+	.byte	0x20
+	.byte	0x24
+	.byte	0x8
+	.byte	0x20
+	.byte	0x26
+	.byte	0x83
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL473
+	.8byte	.LVL474
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST107:
+	.8byte	.LVL316
+	.8byte	.LVL318-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL318-1
+	.8byte	.LVL451
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL451
+	.8byte	.LVL452
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL452
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x65
+	.8byte	0
+	.8byte	0
+.LLST108:
+	.8byte	.LVL456
+	.8byte	.LVL457
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL457
+	.8byte	.LVL458
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL458
+	.8byte	.LVL459-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL459-1
+	.8byte	.LVL461
+	.2byte	0x3
+	.byte	0x87
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL461
+	.8byte	.LVL462
+	.2byte	0x1
+	.byte	0x67
+	.8byte	.LVL464
+	.8byte	.LVL465
+	.2byte	0x1
+	.byte	0x66
+	.8byte	.LVL465
+	.8byte	.LVL466-1
+	.2byte	0x1
+	.byte	0x52
+	.8byte	.LVL466-1
+	.8byte	.LVL467
+	.2byte	0x3
+	.byte	0x86
+	.sleb128 -1
+	.byte	0x9f
+	.8byte	.LVL467
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST109:
+	.8byte	.LVL317
+	.8byte	.LVL318-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL318-1
+	.8byte	.LVL319
+	.2byte	0x1
+	.byte	0x65
+	.8byte	.LVL319
+	.8byte	.LVL431
+	.2byte	0x1
+	.byte	0x64
+	.8byte	.LVL431
+	.8byte	.LVL450
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL452
+	.8byte	.LFE200
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST110:
+	.8byte	.LVL456
+	.8byte	.LVL459-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL461
+	.8byte	.LVL463
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST111:
+	.8byte	.LVL464
+	.8byte	.LVL466-1
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL467
+	.8byte	.LFE200
+	.2byte	0xd
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x88
+	.sleb128 0
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST0:
+	.8byte	.LVL5
+	.8byte	.LVL7
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL7
+	.8byte	.LVL8
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST1:
+	.8byte	.LVL1
+	.8byte	.LVL9
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST2:
+	.8byte	.LVL4
+	.8byte	.LVL6
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST3:
+	.8byte	.LVL10
+	.8byte	.LVL11
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL11
+	.8byte	.LFE355
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST10:
+	.8byte	.LVL34
+	.8byte	.LVL37
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL37
+	.8byte	.LFE208
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST11:
+	.8byte	.LVL35
+	.8byte	.LVL36
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL38
+	.8byte	.LVL39
+	.2byte	0x1
+	.byte	0x51
+	.8byte	0
+	.8byte	0
+.LLST49:
+	.8byte	.LVL136
+	.8byte	.LVL137-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL137-1
+	.8byte	.LFE245
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST50:
+	.8byte	.LVL138
+	.8byte	.LVL139
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST56:
+	.8byte	.LVL156
+	.8byte	.LVL157-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL157-1
+	.8byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST57:
+	.8byte	.LVL158
+	.8byte	.LVL159
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST70:
+	.8byte	.LVL198
+	.8byte	.LVL199
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL199
+	.8byte	.LVL216
+	.2byte	0x1
+	.byte	0x63
+	.8byte	.LVL216
+	.8byte	.LFE252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST71:
+	.8byte	.LVL200
+	.8byte	.LVL215
+	.2byte	0x1
+	.byte	0x63
+	.8byte	0
+	.8byte	0
+.LLST72:
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LVL213-1
+	.2byte	0xd
+	.byte	0x86
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST73:
+	.8byte	.LVL202
+	.8byte	.LVL205-1
+	.2byte	0x13
+	.byte	0x83
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST74:
+	.8byte	.LVL203
+	.8byte	.LVL211
+	.2byte	0x1
+	.byte	0x64
+	.8byte	0
+	.8byte	0
+.LLST75:
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0x11
+	.byte	0x71
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	.LVL207
+	.8byte	.LVL213-1
+	.2byte	0x19
+	.byte	0x86
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.8byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.8byte	0
+	.8byte	0
+.LLST76:
+	.8byte	.LVL209
+	.8byte	.LVL212
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST77:
+	.8byte	.LVL201
+	.8byte	.LVL215
+	.2byte	0x1
+	.byte	0x66
+	.8byte	0
+	.8byte	0
+.LLST78:
+	.8byte	.LVL206
+	.8byte	.LVL207
+	.2byte	0xe
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x71
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.8byte	.LVL207
+	.8byte	.LVL208
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL208
+	.8byte	.LVL213-1
+	.2byte	0x16
+	.byte	0x86
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.8byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST79:
+	.8byte	.LVL217
+	.8byte	.LVL219
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL219
+	.8byte	.LVL221-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL221-1
+	.8byte	.LVL222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL222
+	.8byte	.LVL224
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL224
+	.8byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	.LVL225
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x54
+	.8byte	0
+	.8byte	0
+.LLST80:
+	.8byte	.LVL217
+	.8byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.8byte	.LVL219
+	.8byte	.LVL221-1
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL222
+	.8byte	.LVL224
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL225
+	.8byte	.LVL226
+	.2byte	0x1
+	.byte	0x55
+	.8byte	.LVL227
+	.8byte	.LFE255
+	.2byte	0x1
+	.byte	0x55
+	.8byte	0
+	.8byte	0
+.LLST81:
+	.8byte	.LVL217
+	.8byte	.LVL218
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.8byte	0
+	.8byte	0
+.LLST82:
+	.8byte	.LVL220
+	.8byte	.LVL221-1
+	.2byte	0x1
+	.byte	0x54
+	.8byte	.LVL221-1
+	.8byte	.LVL222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST86:
+	.8byte	.LVL250
+	.8byte	.LVL251
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL251
+	.8byte	.LFE266
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST87:
+	.8byte	.LVL256
+	.8byte	.LVL257-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL257-1
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST88:
+	.8byte	.LVL256
+	.8byte	.LVL257-1
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL257-1
+	.8byte	.LVL257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	.LVL257
+	.8byte	.LVL258
+	.2byte	0x1
+	.byte	0x51
+	.8byte	.LVL258
+	.8byte	.LFE272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST93:
+	.8byte	.LVL271
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL274
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x50
+	.8byte	0
+	.8byte	0
+.LLST94:
+	.8byte	.LVL272
+	.8byte	.LVL273
+	.2byte	0x1
+	.byte	0x53
+	.8byte	.LVL274
+	.8byte	.LFE282
+	.2byte	0x1
+	.byte	0x53
+	.8byte	0
+	.8byte	0
+.LLST121:
+	.8byte	.LVL502
+	.8byte	.LVL504-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL504-1
+	.8byte	.LFE297
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST122:
+	.8byte	.LVL503
+	.8byte	.LVL504-1
+	.2byte	0x1
+	.byte	0x50
+	.8byte	.LVL504-1
+	.8byte	.LVL505
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.8byte	0
+	.8byte	0
+.LLST251:
+	.8byte	.LVL964
+	.8byte	.LVL968
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x800
+	.byte	0x85
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.8byte	.LVL969
+	.8byte	.LVL970
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x85
+	.sleb128 0
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+	.8byte	.LVL1349-1
+	.2byte	0xe
+	.byte	0x3
+	.8byte	g_MaxLpn
+	.byte	0x94
+	.byte	0x4
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+	.byte	0x1c
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+	.byte	0x3
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+	.2byte	0x9
+	.byte	0x89
+	.sleb128 0
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+	.2byte	0x9
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+	.sleb128 0
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+	.2byte	0xffff
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+	.byte	0xf3
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+	.byte	0x3
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+	.byte	0x9f
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+	.8byte	.LFE312-.LFB312
+	.8byte	.LFB319
+	.8byte	.LFE319-.LFB319
+	.8byte	.LFB320
+	.8byte	.LFE320-.LFB320
+	.8byte	.LFB214
+	.8byte	.LFE214-.LFB214
+	.8byte	.LFB219
+	.8byte	.LFE219-.LFB219
+	.8byte	.LFB217
+	.8byte	.LFE217-.LFB217
+	.8byte	.LFB220
+	.8byte	.LFE220-.LFB220
+	.8byte	.LFB274
+	.8byte	.LFE274-.LFB274
+	.8byte	.LFB292
+	.8byte	.LFE292-.LFB292
+	.8byte	.LFB210
+	.8byte	.LFE210-.LFB210
+	.8byte	.LFB211
+	.8byte	.LFE211-.LFB211
+	.8byte	.LFB347
+	.8byte	.LFE347-.LFB347
+	.8byte	0
+	.8byte	0
+	.section	.debug_ranges,"",@progbits
+.Ldebug_ranges0:
+	.8byte	.LBB164
+	.8byte	.LBE164
+	.8byte	.LBB167
+	.8byte	.LBE167
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB168
+	.8byte	.LBE168
+	.8byte	.LBB171
+	.8byte	.LBE171
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB193
+	.8byte	.LBE193
+	.8byte	.LBB197
+	.8byte	.LBE197
+	.8byte	.LBB198
+	.8byte	.LBE198
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB207
+	.8byte	.LBE207
+	.8byte	.LBB210
+	.8byte	.LBE210
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB215
+	.8byte	.LBE215
+	.8byte	.LBB216
+	.8byte	.LBE216
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB221
+	.8byte	.LBE221
+	.8byte	.LBB222
+	.8byte	.LBE222
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB229
+	.8byte	.LBE229
+	.8byte	.LBB231
+	.8byte	.LBE231
+	.8byte	.LBB232
+	.8byte	.LBE232
+	.8byte	.LBB233
+	.8byte	.LBE233
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB238
+	.8byte	.LBE238
+	.8byte	.LBB239
+	.8byte	.LBE239
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB248
+	.8byte	.LBE248
+	.8byte	.LBB252
+	.8byte	.LBE252
+	.8byte	.LBB253
+	.8byte	.LBE253
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB262
+	.8byte	.LBE262
+	.8byte	.LBB263
+	.8byte	.LBE263
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB265
+	.8byte	.LBE265
+	.8byte	.LBB267
+	.8byte	.LBE267
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB266
+	.8byte	.LBE266
+	.8byte	.LBB268
+	.8byte	.LBE268
+	.8byte	.LBB269
+	.8byte	.LBE269
+	.8byte	.LBB270
+	.8byte	.LBE270
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB287
+	.8byte	.LBE287
+	.8byte	.LBB292
+	.8byte	.LBE292
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB289
+	.8byte	.LBE289
+	.8byte	.LBB290
+	.8byte	.LBE290
+	.8byte	0
+	.8byte	0
+	.8byte	.LBB294
+	.8byte	.LBE294
+	.8byte	.LBB295
+	.8byte	.LBE295
+	.8byte	0
+	.8byte	0
+	.8byte	.LFB348
+	.8byte	.LFE348
+	.8byte	.LFB355
+	.8byte	.LFE355
+	.8byte	.LFB202
+	.8byte	.LFE202
+	.8byte	.LFB203
+	.8byte	.LFE203
+	.8byte	.LFB204
+	.8byte	.LFE204
+	.8byte	.LFB205
+	.8byte	.LFE205
+	.8byte	.LFB208
+	.8byte	.LFE208
+	.8byte	.LFB221
+	.8byte	.LFE221
+	.8byte	.LFB222
+	.8byte	.LFE222
+	.8byte	.LFB223
+	.8byte	.LFE223
+	.8byte	.LFB224
+	.8byte	.LFE224
+	.8byte	.LFB228
+	.8byte	.LFE228
+	.8byte	.LFB232
+	.8byte	.LFE232
+	.8byte	.LFB233
+	.8byte	.LFE233
+	.8byte	.LFB234
+	.8byte	.LFE234
+	.8byte	.LFB235
+	.8byte	.LFE235
+	.8byte	.LFB238
+	.8byte	.LFE238
+	.8byte	.LFB239
+	.8byte	.LFE239
+	.8byte	.LFB241
+	.8byte	.LFE241
+	.8byte	.LFB242
+	.8byte	.LFE242
+	.8byte	.LFB243
+	.8byte	.LFE243
+	.8byte	.LFB246
+	.8byte	.LFE246
+	.8byte	.LFB245
+	.8byte	.LFE245
+	.8byte	.LFB247
+	.8byte	.LFE247
+	.8byte	.LFB244
+	.8byte	.LFE244
+	.8byte	.LFB248
+	.8byte	.LFE248
+	.8byte	.LFB249
+	.8byte	.LFE249
+	.8byte	.LFB250
+	.8byte	.LFE250
+	.8byte	.LFB251
+	.8byte	.LFE251
+	.8byte	.LFB252
+	.8byte	.LFE252
+	.8byte	.LFB255
+	.8byte	.LFE255
+	.8byte	.LFB260
+	.8byte	.LFE260
+	.8byte	.LFB266
+	.8byte	.LFE266
+	.8byte	.LFB272
+	.8byte	.LFE272
+	.8byte	.LFB273
+	.8byte	.LFE273
+	.8byte	.LFB279
+	.8byte	.LFE279
+	.8byte	.LFB282
+	.8byte	.LFE282
+	.8byte	.LFB284
+	.8byte	.LFE284
+	.8byte	.LFB293
+	.8byte	.LFE293
+	.8byte	.LFB294
+	.8byte	.LFE294
+	.8byte	.LFB295
+	.8byte	.LFE295
+	.8byte	.LFB200
+	.8byte	.LFE200
+	.8byte	.LFB201
+	.8byte	.LFE201
+	.8byte	.LFB296
+	.8byte	.LFE296
+	.8byte	.LFB297
+	.8byte	.LFE297
+	.8byte	.LFB300
+	.8byte	.LFE300
+	.8byte	.LFB303
+	.8byte	.LFE303
+	.8byte	.LFB304
+	.8byte	.LFE304
+	.8byte	.LFB305
+	.8byte	.LFE305
+	.8byte	.LFB306
+	.8byte	.LFE306
+	.8byte	.LFB307
+	.8byte	.LFE307
+	.8byte	.LFB314
+	.8byte	.LFE314
+	.8byte	.LFB315
+	.8byte	.LFE315
+	.8byte	.LFB316
+	.8byte	.LFE316
+	.8byte	.LFB337
+	.8byte	.LFE337
+	.8byte	.LFB338
+	.8byte	.LFE338
+	.8byte	.LFB340
+	.8byte	.LFE340
+	.8byte	.LFB230
+	.8byte	.LFE230
+	.8byte	.LFB236
+	.8byte	.LFE236
+	.8byte	.LFB341
+	.8byte	.LFE341
+	.8byte	.LFB342
+	.8byte	.LFE342
+	.8byte	.LFB240
+	.8byte	.LFE240
+	.8byte	.LFB209
+	.8byte	.LFE209
+	.8byte	.LFB345
+	.8byte	.LFE345
+	.8byte	.LFB206
+	.8byte	.LFE206
+	.8byte	.LFB225
+	.8byte	.LFE225
+	.8byte	.LFB227
+	.8byte	.LFE227
+	.8byte	.LFB237
+	.8byte	.LFE237
+	.8byte	.LFB253
+	.8byte	.LFE253
+	.8byte	.LFB254
+	.8byte	.LFE254
+	.8byte	.LFB257
+	.8byte	.LFE257
+	.8byte	.LFB258
+	.8byte	.LFE258
+	.8byte	.LFB256
+	.8byte	.LFE256
+	.8byte	.LFB259
+	.8byte	.LFE259
+	.8byte	.LFB262
+	.8byte	.LFE262
+	.8byte	.LFB280
+	.8byte	.LFE280
+	.8byte	.LFB291
+	.8byte	.LFE291
+	.8byte	.LFB318
+	.8byte	.LFE318
+	.8byte	.LFB267
+	.8byte	.LFE267
+	.8byte	.LFB270
+	.8byte	.LFE270
+	.8byte	.LFB275
+	.8byte	.LFE275
+	.8byte	.LFB276
+	.8byte	.LFE276
+	.8byte	.LFB277
+	.8byte	.LFE277
+	.8byte	.LFB278
+	.8byte	.LFE278
+	.8byte	.LFB207
+	.8byte	.LFE207
+	.8byte	.LFB285
+	.8byte	.LFE285
+	.8byte	.LFB290
+	.8byte	.LFE290
+	.8byte	.LFB309
+	.8byte	.LFE309
+	.8byte	.LFB310
+	.8byte	.LFE310
+	.8byte	.LFB343
+	.8byte	.LFE343
+	.8byte	.LFB344
+	.8byte	.LFE344
+	.8byte	.LFB346
+	.8byte	.LFE346
+	.8byte	.LFB226
+	.8byte	.LFE226
+	.8byte	.LFB298
+	.8byte	.LFE298
+	.8byte	.LFB317
+	.8byte	.LFE317
+	.8byte	.LFB301
+	.8byte	.LFE301
+	.8byte	.LFB302
+	.8byte	.LFE302
+	.8byte	.LFB268
+	.8byte	.LFE268
+	.8byte	.LFB261
+	.8byte	.LFE261
+	.8byte	.LFB281
+	.8byte	.LFE281
+	.8byte	.LFB288
+	.8byte	.LFE288
+	.8byte	.LFB229
+	.8byte	.LFE229
+	.8byte	.LFB231
+	.8byte	.LFE231
+	.8byte	.LFB263
+	.8byte	.LFE263
+	.8byte	.LFB286
+	.8byte	.LFE286
+	.8byte	.LFB265
+	.8byte	.LFE265
+	.8byte	.LFB264
+	.8byte	.LFE264
+	.8byte	.LFB271
+	.8byte	.LFE271
+	.8byte	.LFB287
+	.8byte	.LFE287
+	.8byte	.LFB269
+	.8byte	.LFE269
+	.8byte	.LFB289
+	.8byte	.LFE289
+	.8byte	.LFB299
+	.8byte	.LFE299
+	.8byte	.LFB215
+	.8byte	.LFE215
+	.8byte	.LFB216
+	.8byte	.LFE216
+	.8byte	.LFB212
+	.8byte	.LFE212
+	.8byte	.LFB213
+	.8byte	.LFE213
+	.8byte	.LFB218
+	.8byte	.LFE218
+	.8byte	.LFB308
+	.8byte	.LFE308
+	.8byte	.LFB311
+	.8byte	.LFE311
+	.8byte	.LFB283
+	.8byte	.LFE283
+	.8byte	.LFB313
+	.8byte	.LFE313
+	.8byte	.LFB312
+	.8byte	.LFE312
+	.8byte	.LFB319
+	.8byte	.LFE319
+	.8byte	.LFB320
+	.8byte	.LFE320
+	.8byte	.LFB214
+	.8byte	.LFE214
+	.8byte	.LFB219
+	.8byte	.LFE219
+	.8byte	.LFB217
+	.8byte	.LFE217
+	.8byte	.LFB220
+	.8byte	.LFE220
+	.8byte	.LFB274
+	.8byte	.LFE274
+	.8byte	.LFB292
+	.8byte	.LFE292
+	.8byte	.LFB210
+	.8byte	.LFE210
+	.8byte	.LFB211
+	.8byte	.LFE211
+	.8byte	.LFB347
+	.8byte	.LFE347
+	.8byte	0
+	.8byte	0
+	.section	.debug_line,"",@progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",@progbits,1
+.LASF727:
+	.string	"FtlEctTblFlush"
+.LASF590:
+	.string	"gc_page_num"
+.LASF606:
+	.string	"superBlk"
+.LASF499:
+	.string	"g_gc_bad_block_temp_num"
+.LASF363:
+	.string	"all_blk_used_slc_mode"
+.LASF43:
+	.string	"reserved"
+.LASF508:
+	.string	"g_totle_read_sector"
+.LASF574:
+	.string	"__func__"
+.LASF419:
+	.string	"c_ftl_nand_sys_blks_per_plane"
+.LASF732:
+	.string	"nSec"
+.LASF728:
+	.string	"forceFlush"
+.LASF107:
+	.string	"bootm_headers"
+.LASF453:
+	.string	"p_gc_data_buf"
+.LASF125:
+	.string	"rd_end"
+.LASF492:
+	.string	"p_gc_blk_tbl"
+.LASF787:
+	.string	"FtlFreeSysBlkQueueOut"
+.LASF324:
+	.string	"ftl_bbt_blk_header"
+.LASF227:
+	.string	"eth_device"
+.LASF306:
+	.string	"sign"
+.LASF832:
+	.string	"sctidx"
+.LASF669:
+	.string	"Ftl_load_ext_data"
+.LASF96:
+	.string	"ih_comp"
+.LASF608:
+	.string	"block"
+.LASF22:
+	.string	"_Bool"
+.LASF651:
+	.string	"min_ec"
+.LASF601:
+	.string	"req_read_temp"
+.LASF279:
+	.string	"p_spare"
+.LASF685:
+	.string	"recovery_cur_page_ver"
+.LASF506:
+	.string	"g_totle_write_page_count"
+.LASF245:
+	.string	"net_root_path"
+.LASF624:
+	.string	"lookup_ppa"
+.LASF817:
+	.string	"FtlBbmTblFlush"
+.LASF610:
+	.string	"Ftl_get_new_temp_ppa"
+.LASF327:
+	.string	"ftl_data_blk_header"
+.LASF284:
+	.string	"blk_per_plane"
+.LASF360:
+	.string	"min_erase_count"
+.LASF114:
+	.string	"fit_noffset_os"
+.LASF391:
+	.string	"des_ppa"
+.LASF237:
+	.string	"priv"
+.LASF777:
+	.string	"insert_free_list"
+.LASF880:
+	.ascii	"GNU C11 6.3.1 20170404 -ms"
+	.string	"trict-align -march=armv8-a+nosimd -mlittle-endian -mabi=lp64 -g -Os -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -fstack-usage -fno-pic -ffunction-sections -fdata-sections -ffixed-r9 -fno-common -ffixed-x18"
+.LASF21:
+	.string	"___strtok"
+.LASF198:
+	.string	"UCLASS_SPI_GENERIC"
+.LASF477:
+	.string	"g_l2p_last_update_region_id"
+.LASF698:
+	.string	"ftl_sb_update_avl_pages"
+.LASF572:
+	.string	"FlashProgPages"
+.LASF856:
+	.string	"test_page_num"
+.LASF684:
+	.string	"lookup_superblock_id"
+.LASF420:
+	.string	"c_ftl_nand_init_sys_blks_per_plane"
+.LASF865:
+	.string	"FtlConstantsInit"
+.LASF593:
+	.string	"num_io"
+.LASF868:
+	.string	"FtlPrintInfo"
+.LASF744:
+	.string	"l2p_flush"
+.LASF378:
+	.string	"rear"
+.LASF305:
+	.string	"ftl_l2p_map_info"
+.LASF521:
+	.string	"g_in_swl_replace"
+.LASF404:
+	.string	"c_ftl_nand_page_pre_slc_blk"
+.LASF243:
+	.string	"net_nis_domain"
+.LASF764:
+	.string	"List_update_data_list"
+.LASF852:
+	.string	"create_first_buffer_superblock"
+.LASF503:
+	.string	"g_gc_merge_free_blk_threshold"
+.LASF693:
+	.string	"last_mlc_page_version"
+.LASF630:
+	.string	"IsBlkInGcList"
+.LASF235:
+	.string	"next"
+.LASF312:
+	.string	"pBlkVpcTbl"
+.LASF697:
+	.string	"FtlReUsePrevPpa"
+.LASF658:
+	.string	"update_multiplier_value"
+.LASF411:
+	.string	"c_ftl_nand_totle_phy_blks"
+.LASF874:
+	.string	"memcmp"
+.LASF421:
+	.string	"c_ftl_nand_max_sys_blks"
+.LASF577:
+	.string	"PhyBlk"
+.LASF576:
+	.string	"FlashReadPages"
+.LASF479:
+	.string	"p_free_data_block_list_head"
+.LASF148:
+	.string	"UCLASS_AHCI"
+.LASF161:
+	.string	"UCLASS_I2C_MUX"
+.LASF263:
+	.string	"uclass_id"
+.LASF598:
+	.string	"get_new_gc_superblock"
+.LASF622:
+	.string	"BOPS_EN"
+.LASF241:
+	.string	"net_netmask"
+.LASF849:
+	.string	"bad_block_cnt"
+.LASF424:
+	.string	"c_ftl_nand_max_data_blks"
+.LASF560:
+	.string	"pvTo"
+.LASF117:
+	.string	"fit_noffset_rd"
+.LASF192:
+	.string	"UCLASS_RTC"
+.LASF809:
+	.string	"pBbtHeader"
+.LASF46:
+	.string	"bi_memsize"
+.LASF47:
+	.string	"bi_flashstart"
+.LASF761:
+	.string	"minValidPageCount"
+.LASF232:
+	.string	"recv"
+.LASF122:
+	.string	"fit_uname_setup"
+.LASF199:
+	.string	"UCLASS_SYSCON"
+.LASF153:
+	.string	"UCLASS_DISPLAY"
+.LASF519:
+	.string	"g_max_erase_count"
+.LASF568:
+	.string	"flash_type"
+.LASF529:
+	.string	"g_recovery_ppa_tbl"
+.LASF71:
+	.string	"IRQ_STACK_START_IN"
+.LASF63:
+	.string	"bi_dram"
+.LASF191:
+	.string	"UCLASS_RKNAND"
+.LASF581:
+	.string	"die_index"
+.LASF804:
+	.string	"ver2"
+.LASF434:
+	.string	"gSysFreeQueue"
+.LASF159:
+	.string	"UCLASS_I2C_EEPROM"
+.LASF533:
+	.string	"g_nand_phy_info"
+.LASF555:
+	.string	"check_spare_buf"
+.LASF144:
+	.string	"UCLASS_PCI_EMUL"
+.LASF72:
+	.string	"fdt_header"
+.LASF429:
+	.string	"g_MaxLpn"
+.LASF342:
+	.string	"bufferPageOffset"
+.LASF387:
+	.string	"reversed"
+.LASF507:
+	.string	"g_totle_write_sector"
+.LASF75:
+	.string	"off_dt_struct"
+.LASF417:
+	.string	"c_ftl_nand_max_vendor_blks"
+.LASF768:
+	.string	"prev_valid_page_count"
+.LASF873:
+	.string	"FtlPrintInfo2buf"
+.LASF480:
+	.string	"p_data_block_list_head"
+.LASF265:
+	.string	"NETLOOP_CONTINUE"
+.LASF806:
+	.string	"P2V_plane"
+.LASF486:
+	.string	"g_gc_temp_superblock"
+.LASF195:
+	.string	"UCLASS_SPI"
+.LASF416:
+	.string	"c_ftl_nand_max_map_blks"
+.LASF302:
+	.string	"BbtMap"
+.LASF743:
+	.string	"found_lpa"
+.LASF209:
+	.string	"UCLASS_VIDEO_CONSOLE"
+.LASF367:
+	.string	"last_refresh_read_count"
+.LASF207:
+	.string	"UCLASS_VIDEO"
+.LASF614:
+	.string	"current_ppa"
+.LASF851:
+	.string	"create_first_active_superblock"
+.LASF313:
+	.string	"pMapPpnTbl"
+.LASF269:
+	.string	"net_state"
+.LASF724:
+	.string	"num_page"
+.LASF425:
+	.string	"ftl_gc_temp_power_lost_recovery_flag"
+.LASF613:
+	.string	"totle_num"
+.LASF731:
+	.string	"Index"
+.LASF681:
+	.string	"next_free_active_page"
+.LASF604:
+	.string	"spperBlk"
+.LASF65:
+	.string	"IRQ_STACK_START"
+.LASF132:
+	.string	"verify"
+.LASF713:
+	.string	"ftl_set_blk_mode"
+.LASF266:
+	.string	"NETLOOP_RESTART"
+.LASF270:
+	.string	"uint8"
+.LASF353:
+	.string	"write_page_count"
+.LASF609:
+	.string	"Ftl_gc_temp_data_write_back"
+.LASF295:
+	.string	"erase_blk"
+.LASF722:
+	.string	"re_save_vpndata"
+.LASF463:
+	.string	"p_valid_page_count_check_table"
+.LASF502:
+	.string	"g_gc_free_blk_threshold"
+.LASF482:
+	.string	"g_num_free_superblocks"
+.LASF226:
+	.string	"s_addr"
+.LASF819:
+	.string	"re_save_bbmdata"
+.LASF200:
+	.string	"UCLASS_SYSRESET"
+.LASF627:
+	.string	"FtlGcUpdatePage"
+.LASF811:
+	.string	"FtlLoadFactoryBbt"
+.LASF289:
+	.string	"sec_per_blk"
+.LASF136:
+	.string	"UCLASS_ROOT"
+.LASF296:
+	.string	"prog_page"
+.LASF340:
+	.string	"activePageOffset"
+.LASF152:
+	.string	"UCLASS_CROS_EC"
+.LASF407:
+	.string	"c_ftl_nand_sec_pre_page_shift"
+.LASF788:
+	.string	"IsInFreeQueue"
+.LASF236:
+	.string	"index"
+.LASF745:
+	.string	"select_l2p_ram_region"
+.LASF335:
+	.string	"maxDieNum"
+.LASF290:
+	.string	"byte_per_sec"
+.LASF278:
+	.string	"p_data"
+.LASF528:
+	.string	"g_recovery_page_min_ver"
+.LASF571:
+	.string	"block_size"
+.LASF90:
+	.string	"ih_load"
+.LASF835:
+	.string	"FtlProgPages"
+.LASF664:
+	.string	"error_flag"
+.LASF403:
+	.string	"c_ftl_nand_page_pre_blk"
+.LASF794:
+	.string	"blk_Id"
+.LASF213:
+	.string	"UCLASS_KEY"
+.LASF875:
+	.string	"memcpy"
+.LASF67:
+	.string	"_datarel_start_ofs"
+.LASF373:
+	.string	"List_Node"
+.LASF578:
+	.string	"p_die"
+.LASF314:
+	.string	"in_gc_mode"
+.LASF147:
+	.string	"UCLASS_ADC"
+.LASF94:
+	.string	"ih_arch"
+.LASF163:
+	.string	"UCLASS_IRQ"
+.LASF6:
+	.string	"__u8"
+.LASF494:
+	.string	"g_gc_page_offset"
+.LASF240:
+	.string	"net_gateway"
+.LASF802:
+	.string	"ftl_cmp_data_ver"
+.LASF430:
+	.string	"g_VaildLpn"
+.LASF471:
+	.string	"p_vendor_block_valid_page_count"
+.LASF262:
+	.string	"net_ping_ip"
+.LASF104:
+	.string	"type"
+.LASF40:
+	.string	"lmb_region"
+.LASF632:
+	.string	"numREQ"
+.LASF34:
+	.string	"protect"
+.LASF855:
+	.string	"max_test_page_num"
+.LASF704:
+	.string	"blk_id"
+.LASF349:
+	.string	"GlobalDataVersion"
+.LASF793:
+	.string	"erase_flag"
+.LASF362:
+	.string	"last_refresh_data_times"
+.LASF707:
+	.string	"totleBlkNum"
+.LASF678:
+	.string	"saved_active_page"
+.LASF776:
+	.string	"pTmp"
+.LASF602:
+	.string	"add_count"
+.LASF547:
+	.string	"ftl_gc_temp_block_bops_scan_page_addr"
+.LASF394:
+	.string	"c_ftl_nand_type"
+.LASF773:
+	.string	"pHead"
+.LASF687:
+	.string	"recovery_flash_mode"
+.LASF138:
+	.string	"UCLASS_TEST"
+.LASF485:
+	.string	"g_buffer_superblock"
+.LASF649:
+	.string	"node_id"
+.LASF397:
+	.string	"c_ftl_nand_blks_per_die"
+.LASF261:
+	.string	"net_boot_file_expected_size_in_blocks"
+.LASF23:
+	.string	"image_base"
+.LASF110:
+	.string	"legacy_hdr_valid"
+.LASF203:
+	.string	"UCLASS_TPM"
+.LASF575:
+	.string	"read_req"
+.LASF432:
+	.string	"gBbtInfo"
+.LASF169:
+	.string	"UCLASS_MISC"
+.LASF31:
+	.string	"sector_count"
+.LASF406:
+	.string	"c_ftl_nand_sec_pre_page"
+.LASF588:
+	.string	"mode"
+.LASF813:
+	.string	"FtlLoadBbt"
+.LASF561:
+	.string	"pvForm"
+.LASF323:
+	.string	"padding"
+.LASF460:
+	.string	"p_swl_mul_table"
+.LASF628:
+	.string	"src_ppa"
+.LASF682:
+	.string	"detected_active_page"
+.LASF389:
+	.string	"ftl_gc_page_item"
+.LASF549:
+	.string	"mem_malloc_start"
+.LASF210:
+	.string	"UCLASS_VIDEO_CRTC"
+.LASF58:
+	.string	"bi_ethspeed"
+.LASF98:
+	.string	"image_header_t"
+.LASF770:
+	.string	"pPrev"
+.LASF474:
+	.string	"g_totle_vendor_block"
+.LASF623:
+	.string	"superblock_id"
+.LASF592:
+	.string	"plane"
+.LASF11:
+	.string	"phys_addr_t"
+.LASF95:
+	.string	"ih_type"
+.LASF845:
+	.string	"sftl_init"
+.LASF2:
+	.string	"unsigned char"
+.LASF611:
+	.string	"FtlGcScanTempBlk"
+.LASF109:
+	.string	"legacy_hdr_os_copy"
+.LASF760:
+	.string	"vpcTbl"
+.LASF176:
+	.string	"UCLASS_PANEL_BACKLIGHT"
+.LASF339:
+	.string	"activeSuperblockId"
+.LASF803:
+	.string	"ver1"
+.LASF280:
+	.string	"nand_phy_info"
+.LASF759:
+	.string	"ftl_free_no_use_map_blk"
+.LASF805:
+	.string	"P2V_block_in_plane"
+.LASF556:
+	.string	"str1"
+.LASF557:
+	.string	"str2"
+.LASF718:
+	.string	"pMapHeader"
+.LASF140:
+	.string	"UCLASS_TEST_BUS"
+.LASF716:
+	.string	"FtlScanSysBlk"
+.LASF52:
+	.string	"bi_arm_freq"
+.LASF695:
+	.string	"lookup_ppa_ver"
+.LASF752:
+	.string	"region_num"
+.LASF476:
+	.string	"p_l2p_map_buf"
+.LASF488:
+	.string	"gp_last_act_superblock"
+.LASF870:
+	.string	"Ftl_log2"
+.LASF448:
+	.string	"p_sys_spare_buf"
+.LASF165:
+	.string	"UCLASS_LED"
+.LASF552:
+	.string	"p_current"
+.LASF646:
+	.string	"get_new_id"
+.LASF253:
+	.string	"net_rx_packet_len"
+.LASF255:
+	.string	"net_null_ethaddr"
+.LASF543:
+	.string	"g_ect_tbl_power_up_flush"
+.LASF594:
+	.string	"physical_block"
+.LASF32:
+	.string	"flash_id"
+.LASF838:
+	.string	"absolute_sector"
+.LASF222:
+	.string	"load_addr"
+.LASF347:
+	.string	"PowerLostTimes"
+.LASF501:
+	.string	"g_gc_bad_block_temp_tbl"
+.LASF464:
+	.string	"p_blk_mode_table"
+.LASF775:
+	.string	"List_remove_node"
+.LASF291:
+	.string	"reserved_blk"
+.LASF733:
+	.string	"pBuf"
+.LASF791:
+	.string	"tmp_ec"
+.LASF484:
+	.string	"g_active_superblock"
+.LASF689:
+	.string	"recovery_super_page"
+.LASF437:
+	.string	"req_sys"
+.LASF381:
+	.string	"available_pages"
+.LASF799:
+	.string	"high"
+.LASF833:
+	.string	"nscts"
+.LASF410:
+	.string	"c_ftl_nand_reserved_blks"
+.LASF700:
+	.string	"FtlL2PDataInit"
+.LASF230:
+	.string	"init"
+.LASF215:
+	.string	"UCLASS_CHARGE_DISPLAY"
+.LASF573:
+	.string	"check"
+.LASF145:
+	.string	"UCLASS_USB_EMUL"
+.LASF797:
+	.string	"FtlFreeSysBlkQueueInit"
+.LASF677:
+	.string	"FtlRecoverySuperblock"
+.LASF396:
+	.string	"c_ftl_nand_planes_per_die"
+.LASF405:
+	.string	"c_ftl_nand_page_pre_super_blk"
+.LASF292:
+	.string	"ecc_bits"
+.LASF293:
+	.string	"nand_ops"
+.LASF599:
+	.string	"tmp_blk"
+.LASF523:
+	.string	"g_gc_head_data_block"
+.LASF828:
+	.string	"FtlWrite"
+.LASF182:
+	.string	"UCLASS_PINCTRL"
+.LASF831:
+	.string	"num_lpa"
+.LASF867:
+	.string	"blkNum"
+.LASF364:
+	.string	"SlcPartLbaEndSector"
+.LASF84:
+	.string	"fdt32_t"
+.LASF469:
+	.string	"g_totle_map_block"
+.LASF375:
+	.string	"value"
+.LASF211:
+	.string	"UCLASS_WDT"
+.LASF101:
+	.string	"image_len"
+.LASF441:
+	.string	"req_gc"
+.LASF854:
+	.string	"is_sys_blk"
+.LASF42:
+	.string	"memory"
+.LASF821:
+	.string	"bitmap"
+.LASF319:
+	.string	"ftl_ect_tbl_info"
+.LASF205:
+	.string	"UCLASS_USB_DEV_GENERIC"
+.LASF212:
+	.string	"UCLASS_FG"
+.LASF755:
+	.string	"lastMapBlk"
+.LASF370:
+	.string	"totle_write_sector"
+.LASF522:
+	.string	"g_ftl_nand_free_count"
+.LASF626:
+	.string	"p_gc_page"
+.LASF20:
+	.string	"errno"
+.LASF532:
+	.string	"gNandPhyInfo"
+.LASF861:
+	.string	"ven_blk"
+.LASF30:
+	.string	"size"
+.LASF244:
+	.string	"net_hostname"
+.LASF772:
+	.string	"List_pop_head_node"
+.LASF308:
+	.string	"BlkNum"
+.LASF850:
+	.string	"sys_bad_block_cnt"
+.LASF596:
+	.string	"p_dataHeader"
+.LASF780:
+	.string	"tmp_id"
+.LASF600:
+	.string	"FtlReadRefresh"
+.LASF645:
+	.string	"free_blk_index"
+.LASF820:
+	.string	"FtlBbt2Bitmap"
+.LASF662:
+	.string	"ftl_check_vpc"
+.LASF108:
+	.string	"legacy_hdr_os"
+.LASF100:
+	.string	"image_start"
+.LASF580:
+	.string	"page_index"
+.LASF18:
+	.string	"uint8_t"
+.LASF55:
+	.string	"bi_bootflags"
+.LASF487:
+	.string	"g_gc_superblock"
+.LASF303:
+	.string	"ftl_sys_info"
+.LASF87:
+	.string	"ih_hcrc"
+.LASF377:
+	.string	"front"
+.LASF175:
+	.string	"UCLASS_PANEL"
+.LASF472:
+	.string	"p_vendor_block_ver_table"
+.LASF204:
+	.string	"UCLASS_USB"
+.LASF517:
+	.string	"g_totle_slc_erase_count"
+.LASF461:
+	.string	"g_totle_swl_count"
+.LASF139:
+	.string	"UCLASS_TEST_FDT"
+.LASF294:
+	.string	"get_bad_blk_list"
+.LASF343:
+	.string	"gcTempSuperblockId"
+.LASF238:
+	.string	"eth_current"
+.LASF766:
+	.string	"node_valid_page_count"
+.LASF53:
+	.string	"bi_dsp_freq"
+.LASF5:
+	.string	"uchar"
+.LASF668:
+	.string	"pages"
+.LASF89:
+	.string	"ih_size"
+.LASF570:
+	.string	"addr"
+.LASF142:
+	.string	"UCLASS_SPI_EMUL"
+.LASF863:
+	.string	"FtlMemInit"
+.LASF818:
+	.string	"write_count"
+.LASF663:
+	.string	"prev_ppa"
+.LASF586:
+	.string	"FlashTestBlk"
+.LASF179:
+	.string	"UCLASS_PCI_GENERIC"
+.LASF50:
+	.string	"bi_sramstart"
+.LASF66:
+	.string	"FIQ_STACK_START"
+.LASF872:
+	.string	"rknand_proc_ftlread"
+.LASF228:
+	.string	"enetaddr"
+.LASF181:
+	.string	"UCLASS_PINCONFIG"
+.LASF741:
+	.string	"l2p_region_id"
+.LASF554:
+	.string	"check_buf"
+.LASF190:
+	.string	"UCLASS_RESET"
+.LASF137:
+	.string	"UCLASS_DEMO"
+.LASF44:
+	.string	"bd_info"
+.LASF275:
+	.string	"nand_req"
+.LASF356:
+	.string	"slc_erase_count"
+.LASF60:
+	.string	"bi_busfreq"
+.LASF769:
+	.string	"prev_multiplier_value"
+.LASF497:
+	.string	"g_gc_next_blk"
+.LASF516:
+	.string	"g_min_erase_count"
+.LASF149:
+	.string	"UCLASS_BLK"
+.LASF546:
+	.string	"gc_discard_updated"
+.LASF737:
+	.string	"FtlVendorPartWrite"
+.LASF621:
+	.string	"FtlGcFreeTempBlock"
+.LASF248:
+	.string	"net_ip"
+.LASF229:
+	.string	"iobase"
+.LASF657:
+	.string	"GetFreeBlockMinEraseCount"
+.LASF336:
+	.string	"activeFlashMode"
+.LASF92:
+	.string	"ih_dcrc"
+.LASF35:
+	.string	"flash_info_t"
+.LASF655:
+	.string	"GetFreeBlockMaxEraseCount"
+.LASF711:
+	.string	"sblk"
+.LASF754:
+	.string	"ftl_map_blk_gc"
+.LASF877:
+	.string	"printf"
+.LASF59:
+	.string	"bi_intfreq"
+.LASF223:
+	.string	"save_addr"
+.LASF538:
+	.string	"TotleReadBufferCount1"
+.LASF567:
+	.string	"request"
+.LASF330:
+	.string	"regionId"
+.LASF166:
+	.string	"UCLASS_LPC"
+.LASF285:
+	.string	"blk_per_die"
+.LASF352:
+	.string	"gc_page_count"
+.LASF49:
+	.string	"bi_flashoffset"
+.LASF541:
+	.string	"TotleReadBufferMatchCount"
+.LASF438:
+	.string	"req_read"
+.LASF751:
+	.string	"Ftl_write_map_blk_to_last_page"
+.LASF466:
+	.string	"p_map_block_valid_page_count"
+.LASF167:
+	.string	"UCLASS_MAILBOX"
+.LASF792:
+	.string	"FtlFreeSysBlkQueueIn"
+.LASF366:
+	.string	"readErrorCount"
+.LASF585:
+	.string	"sftl_gc"
+.LASF796:
+	.string	"FtlFreeSysBlkQueueEmpty"
+.LASF762:
+	.string	"load_l2p_region"
+.LASF639:
+	.string	"p_superblock"
+.LASF301:
+	.string	"fBbtBlk"
+.LASF77:
+	.string	"off_mem_rsvmap"
+.LASF445:
+	.string	"p_sys_data_buf"
+.LASF883:
+	.string	"l2p_addr_tran"
+.LASF164:
+	.string	"UCLASS_KEYBOARD"
+.LASF287:
+	.string	"page_per_slc_blk"
+.LASF398:
+	.string	"c_ftl_nand_blks_per_die_shift"
+.LASF738:
+	.string	"log2phys"
+.LASF478:
+	.string	"p_data_block_list_table"
+.LASF171:
+	.string	"UCLASS_MOD_EXP"
+.LASF644:
+	.string	"num_bad_block"
+.LASF85:
+	.string	"image_header"
+.LASF701:
+	.string	"FtlLoadVonderInfo"
+.LASF612:
+	.string	"pSuperblock"
+.LASF535:
+	.string	"ftl_temp_buf"
+.LASF384:
+	.string	"flash_mode"
+.LASF514:
+	.string	"g_totle_mlc_erase_count"
+.LASF79:
+	.string	"last_comp_version"
+.LASF415:
+	.string	"c_ftl_nand_map_blks_per_plane"
+.LASF810:
+	.string	"re_try_next_blk"
+.LASF56:
+	.string	"bi_ip_addr"
+.LASF579:
+	.string	"block_index"
+.LASF36:
+	.string	"flash_info"
+.LASF496:
+	.string	"g_gc_cur_blk_max_valid_pages"
+.LASF16:
+	.string	"ushort"
+.LASF763:
+	.string	"phyAddr"
+.LASF73:
+	.string	"magic"
+.LASF790:
+	.string	"tmp_blk_id"
+.LASF876:
+	.string	"memset"
+.LASF242:
+	.string	"net_dns_server"
+.LASF562:
+	.string	"ftl_memset"
+.LASF830:
+	.string	"end_lpa"
+.LASF882:
+	.string	"/home/ldq/rk-linux/u-boot-debug"
+.LASF735:
+	.string	"result"
+.LASF625:
+	.string	"scan_page_num"
+.LASF267:
+	.string	"NETLOOP_SUCCESS"
+.LASF27:
+	.string	"name"
+.LASF512:
+	.string	"g_totle_cache_write_count"
+.LASF767:
+	.string	"node_multiplier_value"
+.LASF758:
+	.string	"blk_index"
+.LASF69:
+	.string	"_datarellocal_start_ofs"
+.LASF288:
+	.string	"sec_per_page"
+.LASF409:
+	.string	"c_ftl_nand_byte_pre_oob"
+.LASF121:
+	.string	"fit_hdr_setup"
+.LASF150:
+	.string	"UCLASS_CLK"
+.LASF686:
+	.string	"detected_error_page"
+.LASF129:
+	.string	"initrd_end"
+.LASF618:
+	.string	"read_super_page"
+.LASF219:
+	.string	"monitor_flash_len"
+.LASF620:
+	.string	"FtlGcPageVarInit"
+.LASF822:
+	.string	"FtlBbtInfoPrint"
+.LASF530:
+	.string	"c_mlc_erase_count_value"
+.LASF551:
+	.string	"mem_malloc_brk"
+.LASF483:
+	.string	"g_num_data_superblocks"
+.LASF753:
+	.string	"blkTbl"
+.LASF348:
+	.string	"mlc_erase_count"
+.LASF12:
+	.string	"phys_size_t"
+.LASF715:
+	.string	"FtlLoadEctTbl"
+.LASF62:
+	.string	"bi_boot_params"
+.LASF214:
+	.string	"UCLASS_RC"
+.LASF51:
+	.string	"bi_sramsize"
+.LASF879:
+	.string	"sprintf"
+.LASF605:
+	.string	"FtlGcMarkBadPhyBlk"
+.LASF641:
+	.string	"allocate_new_data_superblock"
+.LASF13:
+	.string	"sizetype"
+.LASF57:
+	.string	"bi_enetaddr"
+.LASF252:
+	.string	"net_rx_packet"
+.LASF350:
+	.string	"GlobalSysVersion"
+.LASF329:
+	.string	"ftl_map_blk_header"
+.LASF597:
+	.string	"gc_next_superblock"
+.LASF812:
+	.string	"blkAddr"
+.LASF193:
+	.string	"UCLASS_SCSI"
+.LASF0:
+	.string	"short unsigned int"
+.LASF4:
+	.string	"signed char"
+.LASF250:
+	.string	"net_tx_packet"
+.LASF696:
+	.string	"current_ppa_ver"
+.LASF784:
+	.string	"tmp_multiplier_value"
+.LASF566:
+	.string	"FlashEraseBlocks"
+.LASF33:
+	.string	"start"
+.LASF829:
+	.string	"start_lpa"
+.LASF553:
+	.string	"current"
+.LASF218:
+	.string	"LOGF_MAX_CATEGORIES"
+.LASF518:
+	.string	"g_totle_sys_slc_erase_count"
+.LASF300:
+	.string	"prev_id"
+.LASF276:
+	.string	"status"
+.LASF103:
+	.string	"comp"
+.LASF325:
+	.string	"count"
+.LASF146:
+	.string	"UCLASS_SIMPLE_BUS"
+.LASF539:
+	.string	"TotleReadBufferCount2"
+.LASF540:
+	.string	"TotleReadBufferCount3"
+.LASF455:
+	.string	"c_gc_page_buf_num"
+.LASF719:
+	.string	"FtlVpcTblFlush"
+.LASF189:
+	.string	"UCLASS_REMOTEPROC"
+.LASF742:
+	.string	"lpn_index"
+.LASF118:
+	.string	"fit_hdr_fdt"
+.LASF631:
+	.string	"FtlGcBufAlloc"
+.LASF569:
+	.string	"num_req"
+.LASF778:
+	.string	"node_erase_count"
+.LASF254:
+	.string	"net_bcast_ethaddr"
+.LASF736:
+	.string	"ppn_index"
+.LASF795:
+	.string	"FtlFreeSysBlkQueueFull"
+.LASF133:
+	.string	"state"
+.LASF48:
+	.string	"bi_flashsize"
+.LASF746:
+	.string	"target_region"
+.LASF19:
+	.string	"__be32"
+.LASF131:
+	.string	"cmdline_end"
+.LASF418:
+	.string	"c_ftl_vendor_part_size"
+.LASF251:
+	.string	"net_rx_packets"
+.LASF826:
+	.string	"sftl_read"
+.LASF452:
+	.string	"p_gc_spare_buf"
+.LASF151:
+	.string	"UCLASS_CPU"
+.LASF467:
+	.string	"p_map_block_ver_table"
+.LASF456:
+	.string	"g_gc_num_req"
+.LASF449:
+	.string	"p_io_data_buf_0"
+.LASF450:
+	.string	"p_io_data_buf_1"
+.LASF68:
+	.string	"_datarelrolocal_start_ofs"
+.LASF683:
+	.string	"mlc_detected_active_page"
+.LASF853:
+	.string	"FtlLowFormatEraseBlock"
+.LASF317:
+	.string	"region_id"
+.LASF326:
+	.string	"sysBlksPerPlane"
+.LASF816:
+	.string	"FtlBbtMemInit"
+.LASF309:
+	.string	"maxBlkNum"
+.LASF395:
+	.string	"c_ftl_nand_die_num"
+.LASF286:
+	.string	"page_per_blk"
+.LASF721:
+	.string	"prog_error_count"
+.LASF372:
+	.string	"progErrorCount"
+.LASF259:
+	.string	"net_boot_file_name"
+.LASF495:
+	.string	"g_gc_cur_blk_valid_pages"
+.LASF233:
+	.string	"halt"
+.LASF653:
+	.string	"maxFreeBlockEraseCount"
+.LASF86:
+	.string	"ih_magic"
+.LASF582:
+	.string	"block_in_die"
+.LASF457:
+	.string	"gp_ect_tbl_info"
+.LASF654:
+	.string	"minDataBlockEraseCount"
+.LASF17:
+	.string	"ulong"
+.LASF41:
+	.string	"region"
+.LASF315:
+	.string	"dump_write_en"
+.LASF8:
+	.string	"__u32"
+.LASF249:
+	.string	"net_server_ip"
+.LASF785:
+	.string	"INSERT_DATA_LIST"
+.LASF206:
+	.string	"UCLASS_USB_HUB"
+.LASF825:
+	.string	"sftl_write"
+.LASF444:
+	.string	"p_plane_order_table"
+.LASF781:
+	.string	"insert_data_list"
+.LASF70:
+	.string	"_datarelro_start_ofs"
+.LASF617:
+	.string	"ReInit"
+.LASF172:
+	.string	"UCLASS_MTD"
+.LASF134:
+	.string	"bootm_headers_t"
+.LASF729:
+	.string	"ec_mod_count"
+.LASF565:
+	.string	"spare"
+.LASF527:
+	.string	"g_recovery_page_num"
+.LASF15:
+	.string	"long int"
+.LASF667:
+	.string	"req_temp"
+.LASF141:
+	.string	"UCLASS_TEST_PROBE"
+.LASF881:
+	.string	"drivers/rkflash/rksftl/rk_sftl.c"
+.LASF659:
+	.string	"FtlSysBlkInit"
+.LASF524:
+	.string	"g_gc_head_data_block_count"
+.LASF297:
+	.string	"read_page"
+.LASF177:
+	.string	"UCLASS_PCH"
+.LASF178:
+	.string	"UCLASS_PCI"
+.LASF154:
+	.string	"UCLASS_DMA"
+.LASF426:
+	.string	"g_GlobalSysVersion"
+.LASF511:
+	.string	"g_tmp_data_superblock_id"
+.LASF871:
+	.string	"limit"
+.LASF660:
+	.string	"ftl_scan_all_data"
+.LASF331:
+	.string	"ftl_sys_blk_header"
+.LASF393:
+	.string	"flag"
+.LASF470:
+	.string	"p_vendor_block_table"
+.LASF679:
+	.string	"saved_active_plane"
+.LASF747:
+	.string	"hit_count"
+.LASF714:
+	.string	"FtlGcReFreshBadBlk"
+.LASF380:
+	.string	"current_page"
+.LASF201:
+	.string	"UCLASS_THERMAL"
+.LASF814:
+	.string	"FtlBbtCalcTotleCnt"
+.LASF786:
+	.string	"INSERT_FREE_LIST"
+.LASF563:
+	.string	"FlashGetBadBlockList"
+.LASF694:
+	.string	"prev_ppa_ver"
+.LASF246:
+	.string	"net_ethaddr"
+.LASF225:
+	.string	"in_addr"
+.LASF844:
+	.string	"FtlSysFlush"
+.LASF99:
+	.string	"image_info"
+.LASF88:
+	.string	"ih_time"
+.LASF607:
+	.string	"FtlGcRefreshBlock"
+.LASF334:
+	.string	"ftl_sys_save_info"
+.LASF771:
+	.string	"List_get_gc_head_node"
+.LASF399:
+	.string	"c_ftl_nand_planes_num"
+.LASF808:
+	.string	"FtlMakeBbt"
+.LASF37:
+	.string	"long double"
+.LASF481:
+	.string	"p_data_block_list_tail"
+.LASF493:
+	.string	"g_gc_blk_num"
+.LASF81:
+	.string	"size_dt_strings"
+.LASF271:
+	.string	"uint16"
+.LASF603:
+	.string	"FtlGcFreeBadSuperBlk"
+.LASF106:
+	.string	"image_info_t"
+.LASF703:
+	.string	"pMapBlockInfo"
+.LASF616:
+	.string	"error_phy_page"
+.LASF3:
+	.string	"long unsigned int"
+.LASF414:
+	.string	"c_ftl_nand_vendor_region_num"
+.LASF158:
+	.string	"UCLASS_I2C"
+.LASF143:
+	.string	"UCLASS_I2C_EMUL"
+.LASF28:
+	.string	"select_hwpart"
+.LASF257:
+	.string	"net_native_vlan"
+.LASF351:
+	.string	"ftl_sys_ext_info"
+.LASF247:
+	.string	"net_server_ethaddr"
+.LASF208:
+	.string	"UCLASS_VIDEO_BRIDGE"
+.LASF691:
+	.string	"function_exit"
+.LASF135:
+	.string	"images"
+.LASF525:
+	.string	"g_gc_skip_write_count"
+.LASF619:
+	.string	"rknand_print_hex"
+.LASF635:
+	.string	"FtlGcBufInit"
+.LASF446:
+	.string	"p_sys_data_buf_1"
+.LASF14:
+	.string	"char"
+.LASF310:
+	.string	"pBlkTbl"
+.LASF113:
+	.string	"fit_uname_os"
+.LASF500:
+	.string	"g_gc_bad_block_gc_index"
+.LASF692:
+	.string	"last_page_version"
+.LASF801:
+	.string	"pagePreBlk"
+.LASF281:
+	.string	"nand_type"
+.LASF112:
+	.string	"fit_hdr_os"
+.LASF283:
+	.string	"plane_per_die"
+.LASF490:
+	.string	"g_sys_ext_data"
+.LASF272:
+	.string	"uint32"
+.LASF564:
+	.string	"table"
+.LASF299:
+	.string	"page"
+.LASF642:
+	.string	"allocate_data_superblock"
+.LASF316:
+	.string	"ftl_l2p_ram_map_info"
+.LASF102:
+	.string	"load"
+.LASF264:
+	.string	"net_loop_state"
+.LASF433:
+	.string	"gSysInfo"
+.LASF629:
+	.string	"prev_superblock_id"
+.LASF196:
+	.string	"UCLASS_SPMI"
+.LASF756:
+	.string	"minValidPageIndex"
+.LASF841:
+	.string	"last_lpa_nscts"
+.LASF194:
+	.string	"UCLASS_SERIAL"
+.LASF709:
+	.string	"FtlLoadSysInfo"
+.LASF440:
+	.string	"req_erase"
+.LASF320:
+	.string	"hash"
+.LASF545:
+	.string	"check_vpc_table"
+.LASF180:
+	.string	"UCLASS_PHY"
+.LASF54:
+	.string	"bi_ddr_freq"
+.LASF858:
+	.string	"test_mode"
+.LASF827:
+	.string	"FtlDiscard"
+.LASF670:
+	.string	"FtlGcPageRecovery"
+.LASF105:
+	.string	"arch"
+.LASF510:
+	.string	"g_totle_read_page_count"
+.LASF710:
+	.string	"ftl_get_blk_mode"
+.LASF740:
+	.string	"ram_region_id"
+.LASF435:
+	.string	"gL2pMapInfo"
+.LASF322:
+	.string	"lastEc"
+.LASF842:
+	.string	"sector"
+.LASF558:
+	.string	"ftl_memcmp"
+.LASF468:
+	.string	"p_map_region_ppn_table"
+.LASF120:
+	.string	"fit_noffset_fdt"
+.LASF866:
+	.string	"FtlSysBlkNumInit"
+.LASF671:
+	.string	"Ftl_save_ext_data"
+.LASF116:
+	.string	"fit_uname_rd"
+.LASF648:
+	.string	"GetSwlReplaceBlock"
+.LASF359:
+	.string	"max_erase_count"
+.LASF475:
+	.string	"p_l2p_ram_map"
+.LASF633:
+	.string	"req_num"
+.LASF115:
+	.string	"fit_hdr_rd"
+.LASF268:
+	.string	"NETLOOP_FAIL"
+.LASF823:
+	.string	"FtlBbmIsBadBlock"
+.LASF666:
+	.string	"FtlSuperblockPowerLostFix"
+.LASF157:
+	.string	"UCLASS_FIRMWARE"
+.LASF123:
+	.string	"fit_noffset_setup"
+.LASF401:
+	.string	"c_ftl_nand_ext_blk_pre_plane"
+.LASF550:
+	.string	"mem_malloc_end"
+.LASF451:
+	.string	"p_io_spare_buf"
+.LASF185:
+	.string	"UCLASS_POWER_DOMAIN"
+.LASF520:
+	.string	"g_in_gc_progress"
+.LASF168:
+	.string	"UCLASS_MASS_STORAGE"
+.LASF29:
+	.string	"block_drvr"
+.LASF173:
+	.string	"UCLASS_NORTHBRIDGE"
+.LASF422:
+	.string	"c_ftl_nand_data_blks_per_plane"
+.LASF615:
+	.string	"page_count"
+.LASF298:
+	.string	"ftl_bbt_info"
+.LASF160:
+	.string	"UCLASS_I2C_GENERIC"
+.LASF231:
+	.string	"send"
+.LASF531:
+	.string	"g_power_lost_recovery_flag"
+.LASF589:
+	.string	"numPages"
+.LASF447:
+	.string	"p_vendor_data_buf"
+.LASF354:
+	.string	"read_page_count"
+.LASF234:
+	.string	"write_hwaddr"
+.LASF725:
+	.string	"FtlMapBlkWriteDump_data"
+.LASF834:
+	.string	"FtlCacheWriteBack"
+.LASF699:
+	.string	"FtlLoadMapInfo"
+.LASF807:
+	.string	"V2P_block"
+.LASF720:
+	.string	"pSysHeader"
+.LASF672:
+	.string	"SupperBlkListInit"
+.LASF706:
+	.string	"ppnTbl"
+.LASF846:
+	.string	"pNand"
+.LASF559:
+	.string	"ftl_memcpy"
+.LASF346:
+	.string	"PowerOnTimes"
+.LASF505:
+	.string	"g_totle_gc_page_count"
+.LASF24:
+	.string	"_binary_u_boot_bin_start"
+.LASF673:
+	.string	"num_data_node"
+.LASF400:
+	.string	"c_ftl_nand_blk_pre_plane"
+.LASF64:
+	.string	"bd_t"
+.LASF705:
+	.string	"lastWritePage"
+.LASF91:
+	.string	"ih_ep"
+.LASF45:
+	.string	"bi_memstart"
+.LASF119:
+	.string	"fit_uname_fdt"
+.LASF187:
+	.string	"UCLASS_RAM"
+.LASF674:
+	.string	"num_free_node"
+.LASF379:
+	.string	"ftl_superblock_info"
+.LASF126:
+	.string	"ft_addr"
+.LASF357:
+	.string	"sys_slc_erase_count"
+.LASF513:
+	.string	"g_totle_l2p_write_count"
+.LASF220:
+	.string	"__dtb_dt_begin"
+.LASF217:
+	.string	"UCLASS_INVALID"
+.LASF443:
+	.string	"g_req_cache"
+.LASF591:
+	.string	"gc_blk"
+.LASF277:
+	.string	"page_addr"
+.LASF864:
+	.string	"mem_size"
+.LASF857:
+	.string	"test_page_step"
+.LASF688:
+	.string	"read_super_page_end"
+.LASF368:
+	.string	"refresh_enable_mode"
+.LASF847:
+	.string	"load_bbt"
+.LASF860:
+	.string	"IsBlkInVendorPart"
+.LASF402:
+	.string	"c_ftl_nand_bbm_buf_size"
+.LASF782:
+	.string	"node_data_count"
+.LASF583:
+	.string	"width"
+.LASF39:
+	.string	"base"
+.LASF884:
+	.string	"sftl_get_density"
+.LASF839:
+	.string	"first_lpa_sctidx"
+.LASF587:
+	.string	"rk_ftl_garbage_collect"
+.LASF328:
+	.string	"lastPpa"
+.LASF111:
+	.string	"fit_uname_cfg"
+.LASF344:
+	.string	"gcTempPageOffset"
+.LASF636:
+	.string	"decrement_vpc_count"
+.LASF386:
+	.string	"dump_writed"
+.LASF748:
+	.string	"flush_l2p_region"
+.LASF130:
+	.string	"cmdline_start"
+.LASF536:
+	.string	"DeviceCapacity"
+.LASF355:
+	.string	"l2p_write_count"
+.LASF548:
+	.string	"gc_ink_free_return_value"
+.LASF358:
+	.string	"discard_page_count"
+.LASF155:
+	.string	"UCLASS_ETH"
+.LASF221:
+	.string	"__dtb_dt_spl_begin"
+.LASF10:
+	.string	"long long unsigned int"
+.LASF274:
+	.string	"int16"
+.LASF848:
+	.string	"ftl_low_format"
+.LASF734:
+	.string	"offset"
+.LASF504:
+	.string	"g_gc_blk_index"
+.LASF439:
+	.string	"req_prgm"
+.LASF436:
+	.string	"gVendorBlkInfo"
+.LASF676:
+	.string	"FtlPowerLostRecovery"
+.LASF462:
+	.string	"p_valid_page_count_table"
+.LASF702:
+	.string	"FtlMapTblRecovery"
+.LASF156:
+	.string	"UCLASS_GPIO"
+.LASF869:
+	.string	"debug_flag"
+.LASF498:
+	.string	"g_gc_next_blk_1"
+.LASF76:
+	.string	"off_dt_strings"
+.LASF376:
+	.string	"sys_blk_queue"
+.LASF647:
+	.string	"free_data_superblock"
+.LASF859:
+	.string	"re_test_next_page"
+.LASF61:
+	.string	"bi_arch_number"
+.LASF749:
+	.string	"FtlMapWritePage"
+.LASF783:
+	.string	"tmp_data_count"
+.LASF26:
+	.string	"ide_bus_offset"
+.LASF739:
+	.string	"action"
+.LASF408:
+	.string	"c_ftl_nand_byte_pre_page"
+.LASF216:
+	.string	"UCLASS_COUNT"
+.LASF174:
+	.string	"UCLASS_NVME"
+.LASF643:
+	.string	"new_id"
+.LASF345:
+	.string	"cache_write_count"
+.LASF640:
+	.string	"new_ppa"
+.LASF258:
+	.string	"net_restart_wrap"
+.LASF371:
+	.string	"totle_read_sector"
+.LASF341:
+	.string	"bufferSuperblockId"
+.LASF273:
+	.string	"int32"
+.LASF369:
+	.string	"refresh_start_lpa"
+.LASF80:
+	.string	"boot_cpuid_phys"
+.LASF304:
+	.string	"maxLogicBlk"
+.LASF321:
+	.string	"totleEc"
+.LASF38:
+	.string	"lmb_property"
+.LASF458:
+	.string	"g_ect_tbl_info_size"
+.LASF338:
+	.string	"gcTempFlashMode"
+.LASF431:
+	.string	"g_MaxLbn"
+.LASF534:
+	.string	"g_nand_ops"
+.LASF584:
+	.string	"ftl_malloc"
+.LASF840:
+	.string	"first_lpa_nscts"
+.LASF183:
+	.string	"UCLASS_PMIC"
+.LASF318:
+	.string	"L2PMap"
+.LASF765:
+	.string	"prev_node_id"
+.LASF454:
+	.string	"gp_gc_page_buf_info"
+.LASF509:
+	.string	"g_totle_discard_page_count"
+.LASF656:
+	.string	"max_ec"
+.LASF537:
+	.string	"gFtlInitStatus"
+.LASF9:
+	.string	"long long int"
+.LASF459:
+	.string	"p_erase_count_table"
+.LASF824:
+	.string	"FtlBbmMapBadBlock"
+.LASF427:
+	.string	"g_GlobalDataVersion"
+.LASF717:
+	.string	"block_in_plane"
+.LASF128:
+	.string	"initrd_start"
+.LASF428:
+	.string	"g_MaxLbaSector"
+.LASF382:
+	.string	"current_plane"
+.LASF383:
+	.string	"num_planes"
+.LASF800:
+	.string	"spareBuf"
+.LASF730:
+	.string	"FtlVendorPartRead"
+.LASF723:
+	.string	"FtlWriteDump_data"
+.LASF197:
+	.string	"UCLASS_SPI_FLASH"
+.LASF202:
+	.string	"UCLASS_TIMER"
+.LASF798:
+	.string	"FtlGetLastWrittenPage"
+.LASF661:
+	.string	"pDataHeader"
+.LASF542:
+	.string	"power_up_flag"
+.LASF365:
+	.string	"inkDie_write_and_check_en"
+.LASF413:
+	.string	"c_ftl_nand_l2pmap_ram_region_num"
+.LASF843:
+	.string	"sftl_deinit"
+.LASF815:
+	.string	"totle_count"
+.LASF282:
+	.string	"die_num"
+.LASF750:
+	.string	"update_map_block"
+.LASF307:
+	.string	"maxRegion"
+.LASF680:
+	.string	"next_free_active_plane"
+.LASF491:
+	.string	"p_gc_page_info"
+.LASF256:
+	.string	"net_our_vlan"
+.LASF361:
+	.string	"totle_power_on_run_times"
+.LASF93:
+	.string	"ih_os"
+.LASF526:
+	.string	"g_cur_erase_blk"
+.LASF184:
+	.string	"UCLASS_PWM"
+.LASF634:
+	.string	"FtlGcBufFree"
+.LASF774:
+	.string	"List_pop_index_node"
+.LASF690:
+	.string	"scan_completed"
+.LASF637:
+	.string	"update_vpc_list"
+.LASF170:
+	.string	"UCLASS_MMC"
+.LASF465:
+	.string	"p_map_block_table"
+.LASF544:
+	.string	"FtlUpdateVaildLpnCount"
+.LASF332:
+	.string	"res32_0"
+.LASF333:
+	.string	"res32_1"
+.LASF726:
+	.string	"FtlUpdateVaildLpn"
+.LASF390:
+	.string	"scr_ppa"
+.LASF162:
+	.string	"UCLASS_IDE"
+.LASF224:
+	.string	"save_size"
+.LASF78:
+	.string	"version"
+.LASF652:
+	.string	"pNode"
+.LASF638:
+	.string	"get_new_active_ppa"
+.LASF878:
+	.string	"kmalloc"
+.LASF25:
+	.string	"_binary_u_boot_bin_end"
+.LASF595:
+	.string	"max_gc_page_num"
+.LASF1:
+	.string	"unsigned int"
+.LASF712:
+	.string	"FtlSlcSuperblockCheck"
+.LASF515:
+	.string	"g_totle_avg_erase_count"
+.LASF836:
+	.string	"flashType"
+.LASF789:
+	.string	"FtlFreeSysBLkSort"
+.LASF779:
+	.string	"tmp_erase_count"
+.LASF83:
+	.string	"working_fdt"
+.LASF862:
+	.string	"FtlVariablesInit"
+.LASF392:
+	.string	"ftl_gc_page_buffer"
+.LASF239:
+	.string	"push_packet"
+.LASF708:
+	.string	"pMapBlkHeader"
+.LASF82:
+	.string	"size_dt_struct"
+.LASF473:
+	.string	"p_vendor_region_ppn_table"
+.LASF675:
+	.string	"make_superblock"
+.LASF97:
+	.string	"ih_name"
+.LASF186:
+	.string	"UCLASS_PWRSEQ"
+.LASF337:
+	.string	"bufferFlashMode"
+.LASF7:
+	.string	"short int"
+.LASF837:
+	.string	"FtlRead"
+.LASF74:
+	.string	"totalsize"
+.LASF757:
+	.string	"ftl_map_blk_alloc_new_blk"
+.LASF385:
+	.string	"check_en"
+.LASF442:
+	.string	"req_gc_dst"
+.LASF374:
+	.string	"prev"
+.LASF423:
+	.string	"c_ftl_nand_data_op_blks_per_plane"
+.LASF650:
+	.string	"min_ec_id"
+.LASF388:
+	.string	"phyBlk"
+.LASF260:
+	.string	"net_boot_file_size"
+.LASF412:
+	.string	"c_ftl_nand_map_region_num"
+.LASF665:
+	.string	"FtlVpcCheckAndModify"
+.LASF127:
+	.string	"ft_len"
+.LASF188:
+	.string	"UCLASS_REGULATOR"
+.LASF311:
+	.string	"pBlkVerTbl"
+.LASF489:
+	.string	"g_sys_save_data"
+.LASF124:
+	.string	"rd_start"
diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
index bc7b4c839e..a52d2a9f02 100644
--- a/drivers/rkflash/rkflash_api.c
+++ b/drivers/rkflash/rkflash_api.c
@@ -1,8 +1,9 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
+
 #include <common.h>
 #include <dm.h>
 
@@ -10,7 +11,7 @@
 #include "rkflash_blk.h"
 
 #ifdef CONFIG_RKSFC_NOR
-int rk_snor_init(struct udevice *udev)
+int rksfc_nor_init(struct udevice *udev)
 {
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
@@ -18,7 +19,7 @@ int rk_snor_init(struct udevice *udev)
 	return snor_init(p_dev);
 }
 
-u32 rk_snor_get_capacity(struct udevice *udev)
+u32 rksfc_nor_get_capacity(struct udevice *udev)
 {
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
@@ -26,20 +27,182 @@ u32 rk_snor_get_capacity(struct udevice *udev)
 	return snor_get_capacity(p_dev);
 }
 
-int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data)
+int rksfc_nor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data)
 {
+	u32 ret;
+	u32 offset, count = 0;
+	char *buf = (char *)p_data;
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
 
-	return snor_read(p_dev, sec, n_sec, p_data);
+	if (sec + n_sec - 1 < FLASH_VENDOR_PART_START ||
+	    sec > FLASH_VENDOR_PART_END) {
+		ret = snor_read(p_dev, sec, n_sec, p_data);
+		if (ret != n_sec)
+			return ret;
+	} else {
+		memset(p_data, 0, 512 * n_sec);
+		if (sec < FLASH_VENDOR_PART_START) {
+			count = FLASH_VENDOR_PART_START - sec;
+			buf = (char *)p_data;
+			ret = snor_read(p_dev, sec, count, buf);
+			if (ret != count)
+				return ret;
+		}
+		if ((sec + n_sec - 1) > FLASH_VENDOR_PART_END) {
+			count = sec + n_sec - 1 - FLASH_VENDOR_PART_END;
+			offset = FLASH_VENDOR_PART_END - sec + 1;
+			buf = (char *)p_data + offset * 512;
+			ret = snor_read(p_dev,
+					FLASH_VENDOR_PART_END + 1,
+					count, buf);
+			if (ret != count)
+				return ret;
+		}
+	}
+
+	return n_sec;
 }
 
-int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data)
+int rksfc_nor_write(struct udevice *udev,
+		    u32 sec,
+		    u32 n_sec,
+		    const void *p_data)
 {
+	u32 ret;
+	u32 offset, count = 0;
+	char *buf = (char *)p_data;
 	struct rkflash_info *priv = dev_get_priv(udev);
 	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
 
+	if (sec + n_sec - 1 < FLASH_VENDOR_PART_START ||
+	    sec > FLASH_VENDOR_PART_END) {
+		ret = snor_write(p_dev, sec, n_sec, p_data);
+		if (ret != n_sec)
+			return ret;
+	} else {
+		if (sec < FLASH_VENDOR_PART_START) {
+			count = FLASH_VENDOR_PART_START - sec;
+			buf = (char *)p_data;
+			ret = snor_write(p_dev, sec, count, buf);
+			if (ret != count)
+				return ret;
+		}
+		if ((sec + n_sec - 1) > FLASH_VENDOR_PART_END) {
+			count = sec + n_sec - 1 - FLASH_VENDOR_PART_END;
+			offset = FLASH_VENDOR_PART_END - sec + 1;
+			buf = (char *)p_data + offset * 512;
+			ret = snor_write(p_dev,
+					 FLASH_VENDOR_PART_END + 1,
+					 count, buf);
+			if (ret != count)
+				return ret;
+		}
+	}
+
+	return n_sec;
+}
+
+int rksfc_nor_vendor_read(struct blk_desc *dev_desc,
+			  u32 sec,
+			  u32 n_sec,
+			  void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(dev_desc->bdev->parent);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_read(p_dev, sec, n_sec, p_data);
+}
+
+int rksfc_nor_vendor_write(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(dev_desc->bdev->parent);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
 	return snor_write(p_dev, sec, n_sec, p_data);
 }
+
+#endif
+
+#ifdef CONFIG_RKSFC_NAND
+int rksfc_nand_init(struct udevice *udev)
+{
+	int ret;
+
+	ret = sfc_nand_init();
+	if (ret)
+		return ret;
+	else
+		return sftl_init();
+}
+
+int rksfc_nand_read(struct udevice *udev, u32 index, u32 count, void *buf)
+{
+	int ret;
+
+	ret = sftl_read(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+int rksfc_nand_write(struct udevice *udev,
+		     u32 index,
+		     u32 count,
+		     const void *buf)
+{
+	int ret;
+
+	ret = sftl_write(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+u32 rksfc_nand_get_density(struct udevice *udev)
+{
+	return sftl_get_density();
+}
 #endif
 
+#ifdef CONFIG_RKNANDC_NAND
+int rknand_flash_init(struct udevice *udev)
+{
+	return sftl_init();
+}
+
+int rknand_flash_read(struct udevice *udev, u32 index, u32 count, void *buf)
+{
+	int ret;
+
+	ret = sftl_read(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+int rknand_flash_write(struct udevice *udev,
+		       u32 index,
+		       u32 count,
+		       const void *buf)
+{
+	int ret;
+
+	ret = sftl_write(index, count, (u8 *)buf);
+	if (!ret)
+		return count;
+	else
+		return -EIO;
+}
+
+u32 rknand_flash_get_density(struct udevice *udev)
+{
+	return sftl_get_density();
+}
+#endif
diff --git a/drivers/rkflash/rkflash_api.h b/drivers/rkflash/rkflash_api.h
index ece56c0944..f1f9bfee39 100644
--- a/drivers/rkflash/rkflash_api.h
+++ b/drivers/rkflash/rkflash_api.h
@@ -1,20 +1,59 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef __RKFLASH_API_H
 #define __RKFLASH_API_H
 
+#define	FLASH_VENDOR_PART_START		8
+#define	FLASH_VENDOR_PART_END		39	/* 8 + 8 * 4 - 1 */
+
 #ifdef CONFIG_RKSFC_NOR
 #include "sfc_nor.h"
 #include "sfc.h"
 
-int rk_snor_init(struct udevice *udev);
-u32 rk_snor_get_capacity(struct udevice *udev);
-int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data);
-int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data);
+int rksfc_nor_init(struct udevice *udev);
+u32 rksfc_nor_get_capacity(struct udevice *udev);
+int rksfc_nor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data);
+int rksfc_nor_write(struct udevice *udev,
+		    u32 sec,
+		    u32 n_sec,
+		    const void *p_data);
+int rksfc_nor_vendor_read(struct blk_desc *dev_desc,
+			  u32 sec,
+			  u32 n_sec,
+			  void *p_data);
+int rksfc_nor_vendor_write(struct blk_desc *dev_desc,
+			   u32 sec,
+			   u32 n_sec,
+			   void *p_data);
+
+#endif
+
+#ifdef CONFIG_RKSFC_NAND
+#include "sfc_nand.h"
+#include "sfc.h"
+#include "rk_sftl.h"
+int rksfc_nand_init(struct udevice *udev);
+u32 rksfc_nand_get_density(struct udevice *udev);
+int rksfc_nand_read(struct udevice *udev, u32 index, u32 count, void *buf);
+int rksfc_nand_write(struct udevice *udev,
+		     u32 index,
+		     u32 count,
+		     const void *buf);
 #endif
 
+#ifdef CONFIG_RKNANDC_NAND
+#include "flash.h"
+#include "rk_sftl.h"
+int rknand_flash_init(struct udevice *udev);
+u32 rknand_flash_get_density(struct udevice *udev);
+int rknand_flash_read(struct udevice *udev, u32 index, u32 count, void *buf);
+int rknand_flash_write(struct udevice *udev,
+		       u32 index,
+		       u32 count,
+		       const void *buf);
+#endif
 #endif
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
index 702fc1aed1..8481d93fd9 100644
--- a/drivers/rkflash/rkflash_blk.c
+++ b/drivers/rkflash/rkflash_blk.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <common.h>
@@ -13,20 +13,26 @@
 #include "rkflash_blk.h"
 #include "rkflash_debug.h"
 
+void ftl_free(void *buf)
+{
+	kfree(buf);
+}
+
 ulong rkflash_bread(struct udevice *udev, lbaint_t start,
 		    lbaint_t blkcnt, void *dst)
 {
 	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
+	debug("%s lba %x cnt %x", __func__, (u32)start, (u32)blkcnt);
 	if (blkcnt == 0)
-		return 0;
+		return -EINVAL;
 
 	if ((start + blkcnt) > block_dev->lba)
-		return 0;
+		return -EINVAL;
 
 	if (!priv->read)
-		return 0;
+		return -EINVAL;
 
 	return (ulong)priv->read(udev->parent, (u32)start, (u32)blkcnt, dst);
 }
@@ -38,13 +44,13 @@ ulong rkflash_bwrite(struct udevice *udev, lbaint_t start,
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
 	if (blkcnt == 0)
-		return 0;
+		return -EINVAL;
 
 	if ((start + blkcnt) > block_dev->lba)
-		return 0;
+		return -EINVAL;
 
 	if (!priv->write)
-		return 0;
+		return -EINVAL;
 
 	return (ulong)priv->write(udev->parent, (u32)start, (u32)blkcnt, src);
 }
@@ -56,13 +62,13 @@ ulong rkflash_berase(struct udevice *udev, lbaint_t start,
 	struct rkflash_info *priv = dev_get_priv(udev->parent);
 
 	if (blkcnt == 0)
-		return 0;
+		return -EINVAL;
 
 	if ((start + blkcnt) > block_dev->lba)
-		return 0;
+		return -EINVAL;
 
 	if (!priv->erase)
-		return 0;
+		return -EINVAL;
 
 	return (ulong)priv->erase(udev->parent, (u32)start, (u32)blkcnt);
 }
@@ -77,6 +83,9 @@ static int rkflash_blk_probe(struct udevice *udev)
 	priv->child_dev = udev;
 	if (priv->flash_con_type == FLASH_CON_TYPE_SFC)
 		desc->if_type = IF_TYPE_RKSFC;
+	else if (priv->flash_con_type == FLASH_CON_TYPE_NANDC)
+		desc->if_type = IF_TYPE_RKNAND;
+
 	desc->lba = priv->density;
 	desc->log2blksz = 9;
 	desc->blksz = 512;
diff --git a/drivers/rkflash/rkflash_blk.h b/drivers/rkflash/rkflash_blk.h
index 9384b0ac49..c6f8b6de0f 100644
--- a/drivers/rkflash/rkflash_blk.h
+++ b/drivers/rkflash/rkflash_blk.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef __RKFLASH_BLK_H__
@@ -32,6 +32,17 @@ struct flash_operation {
 			   u32 start,
 			   u32 blkcnt,
 			   const void *buffer);
+	int (*flash_erase)(struct udevice *udev,
+			   u32 start,
+			   u32 blkcnt);
+	int (*vendor_read)(struct blk_desc *dev_desc,
+			   u32 start,
+			   u32 blkcnt,
+			   void *buffer);
+	int (*vendor_write)(struct blk_desc *dev_desc,
+			    u32 start,
+			    u32 blkcnt,
+			    void *buffer);
 };
 
 struct rkflash_dev {
diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
index 8321522fec..f30fdafb10 100644
--- a/drivers/rkflash/rkflash_debug.c
+++ b/drivers/rkflash/rkflash_debug.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <blk.h>
@@ -37,9 +37,9 @@ void rkflash_print_hex(char *s, void *buf, u32 width, u32 len)
 
 #if (BLK_STRESS_TEST_EN)
 #define max_test_sector 64
-u8 pwrite[max_test_sector * 512];
-u8 pread[max_test_sector * 512];
-u32 *pwrite32;
+static u8 pwrite[max_test_sector * 512];
+static u8 pread[max_test_sector * 512];
+static u32 *pwrite32;
 void blk_stress_test(struct udevice *udev)
 {
 	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
diff --git a/drivers/rkflash/rkflash_debug.h b/drivers/rkflash/rkflash_debug.h
index d9a968ec4a..e93c837c2d 100644
--- a/drivers/rkflash/rkflash_debug.h
+++ b/drivers/rkflash/rkflash_debug.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef _RKFLASH_DEBUG_H
@@ -10,6 +10,11 @@
 #include <common.h>
 #include <dm.h>
 
+/*
+ * Test switch
+ */
+#define BLK_STRESS_TEST_EN	0
+
 /*
  * Print switch, set to 1 if needed
  * I - info
@@ -21,12 +26,11 @@
 #define	PRINT_SWI_SFC_E		1
 #define PRINT_SWI_SFC_HEX	1
 
-/*
- * Test switch
- */
-#define BLK_STRESS_TEST_EN	0
+#define	PRINT_SWI_NANDC_I	0
+#define	PRINT_SWI_NANDC_E	1
+#define PRINT_SWI_NANDC_HEX	1
 
-#if (RINT_SWI_SFC_I)
+#if (PRINT_SWI_SFC_I)
 #define PRINT_SFC_I(...) printf(__VA_ARGS__)
 #else
 #define PRINT_SFC_I(...)
@@ -45,6 +49,25 @@
 #define PRINT_SFC_HEX(s, buf, width, len)
 #endif
 
+#if (PRINT_SWI_NANDC_I)
+#define PRINT_NANDC_I(...) printf(__VA_ARGS__)
+#else
+#define PRINT_NANDC_I(...)
+#endif
+
+#if (PRINT_SWI_NANDC_E)
+#define PRINT_NANDC_E(...) printf(__VA_ARGS__)
+#else
+#define PRINT_NANDC_E(...)
+#endif
+
+#if (PRINT_SWI_NANDC_HEX)
+#define PRINT_NANDC_HEX(s, buf, width, len)\
+		rkflash_print_hex(s, buf, width, len)
+#else
+#define PRINT_NANDC_HEX(s, buf, width, len)
+#endif
+
 void rkflash_print_hex(char *s, void *buf, u32 width, u32 len);
 void rkflash_test(struct udevice *p_dev);
 
diff --git a/drivers/rkflash/rknandc_base.c b/drivers/rkflash/rknandc_base.c
new file mode 100644
index 0000000000..ef824e36dd
--- /dev/null
+++ b/drivers/rkflash/rknandc_base.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <asm/arch/clock.h>
+
+#include "rkflash_blk.h"
+#include "rkflash_api.h"
+
+static struct flash_operation nandc_flash_op = {
+#ifdef	CONFIG_RKNANDC_NAND
+	FLASH_TYPE_NANDC_NAND,
+	rknand_flash_init,
+	rknand_flash_get_density,
+	rknand_flash_read,
+	rknand_flash_write,
+	NULL,
+	NULL,
+	NULL,
+#else
+	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+#endif
+};
+
+int rknand_scan_namespace(void)
+{
+	struct uclass *uc;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get(UCLASS_RKNAND, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		debug("%s %d %p\n", __func__, __LINE__, dev);
+		ret = device_probe(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rknand_blk_bind(struct udevice *udev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+				 IF_TYPE_RKNAND,
+				 0, 512, 0, &bdev);
+	if (ret) {
+		debug("Cannot create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rkflash_info *priv = dev_get_priv(dev);
+
+	priv->ioaddr = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rockchip_nand_probe(struct udevice *udev)
+{
+	int ret;
+	struct rkflash_info *priv = dev_get_priv(udev);
+
+	debug("%s %d %p ndev = %p\n", __func__, __LINE__, udev, priv);
+
+	ret = nandc_flash_init(priv->ioaddr);
+	if (ret) {
+		debug("nandc_flash_init failed, ret %d", ret);
+		return ret;
+	}
+	ret = nandc_flash_op.flash_init(udev);
+	if (!ret) {
+		priv->flash_con_type = FLASH_CON_TYPE_NANDC;
+		priv->density = nandc_flash_op.flash_get_capacity(udev);
+		priv->read = nandc_flash_op.flash_read;
+		priv->write = nandc_flash_op.flash_write;
+		priv->erase = nandc_flash_op.flash_erase;
+		debug("%s probe success\n", __func__);
+	}
+
+	return ret;
+}
+
+UCLASS_DRIVER(rknand) = {
+	.id		= UCLASS_RKNAND,
+	.name		= "rknand",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+};
+
+static const struct udevice_id rockchip_nand_ids[] = {
+	{ .compatible = "rockchip,rk-nandc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rknand) = {
+	.name		= "rknand",
+	.id		= UCLASS_RKNAND,
+	.of_match	= rockchip_nand_ids,
+	.bind		= rknand_blk_bind,
+	.probe		= rockchip_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct rkflash_info),
+	.ofdata_to_platdata = rockchip_nand_ofdata_to_platdata,
+};
+
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
index 713b6b5b3b..b813ae9e11 100644
--- a/drivers/rkflash/rksfc_base.c
+++ b/drivers/rkflash/rksfc_base.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <common.h>
@@ -13,18 +13,41 @@
 #include "rkflash_blk.h"
 #include "rkflash_api.h"
 
-static struct flash_operation spi_flash_op = {
+static struct flash_operation sfc_nor_op = {
 #ifdef	CONFIG_RKSFC_NOR
 	FLASH_TYPE_SFC_NOR,
-	rk_snor_init,
-	rk_snor_get_capacity,
-	rk_snor_read,
-	rk_snor_write,
+	rksfc_nor_init,
+	rksfc_nor_get_capacity,
+	rksfc_nor_read,
+	rksfc_nor_write,
+	NULL,
+	rksfc_nor_vendor_read,
+	rksfc_nor_vendor_write,
 #else
-	-1, NULL, NULL, NULL, NULL,
+	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 #endif
 };
 
+static struct flash_operation sfc_nand_op = {
+#ifdef CONFIG_RKSFC_NAND
+	FLASH_TYPE_SFC_NAND,
+	rksfc_nand_init,
+	rksfc_nand_get_density,
+	rksfc_nand_read,
+	rksfc_nand_write,
+	NULL,
+	NULL,
+	NULL,
+#else
+	-1, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+#endif
+};
+
+static struct flash_operation *spi_flash_op[2] = {
+	&sfc_nor_op,
+	&sfc_nand_op,
+};
+
 int rksfc_scan_namespace(void)
 {
 	struct uclass *uc;
@@ -72,22 +95,29 @@ static int rockchip_rksfc_ofdata_to_platdata(struct udevice *dev)
 
 static int rockchip_rksfc_probe(struct udevice *udev)
 {
-	int ret;
+	int ret = 0;
+	int i;
 	struct rkflash_info *priv = dev_get_priv(udev);
 
 	debug("%s %d %p ndev = %p\n", __func__, __LINE__, udev, priv);
 
 	sfc_init(priv->ioaddr);
-	if (spi_flash_op.id == -1) {
-		debug("%s no optional spi flash\n", __func__);
-		return 0;
-	}
-	ret = spi_flash_op.flash_init(udev);
-	if (!ret) {
-		priv->flash_con_type = FLASH_CON_TYPE_SFC;
-		priv->density = spi_flash_op.flash_get_capacity(udev);
-		priv->read = spi_flash_op.flash_read;
-		priv->write = spi_flash_op.flash_write;
+	for (i = 0; i < 2; i++) {
+		if (spi_flash_op[i]->id == -1) {
+			debug("%s no optional spi flash for type %x\n",
+			      __func__, i);
+			continue;
+		}
+		ret = spi_flash_op[i]->flash_init(udev);
+		if (!ret) {
+			priv->flash_con_type = FLASH_CON_TYPE_SFC;
+			priv->density =
+				spi_flash_op[i]->flash_get_capacity(udev);
+			priv->read = spi_flash_op[i]->flash_read;
+			priv->write = spi_flash_op[i]->flash_write;
+			debug("%s probe success\n", __func__);
+			break;
+		}
 	}
 
 	return ret;
diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index cb4920b5a8..f913112e96 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #include <common.h>
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
index 9a9095470a..a1431f8b09 100644
--- a/drivers/rkflash/sfc.h
+++ b/drivers/rkflash/sfc.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef _SFC_H
diff --git a/drivers/rkflash/sfc_nand.c b/drivers/rkflash/sfc_nand.c
new file mode 100644
index 0000000000..2bfd63b331
--- /dev/null
+++ b/drivers/rkflash/sfc_nand.c
@@ -0,0 +1,528 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
+
+#include "flash.h"
+#include "flash_com.h"
+#include "sfc.h"
+#include "sfc_nand.h"
+#include "rkflash_debug.h"
+
+static struct nand_info spi_nand_tbl[] = {
+	/* TC58CVG0S0HxAIx */
+	{0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8},
+	/* TC58CVG1S0HxAIx */
+	{0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8},
+	/* MX35LF1GE4AB */
+	{0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* MX35LF2GE4AB */
+	{0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	/* GD5F1GQ4UAYIG */
+	{0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* GD5F2GQ40BY2GR */
+	{0xC8D2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* MT29F1G01ZAC */
+	{0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8},
+	/* GD5F1GQ4U */
+	{0xC8B1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* GD5F2GQ4U */
+	{0xC8B2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8},
+	/* GD5F1GQ4U */
+	{0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8},
+	/* IS37SML01G1 */
+	{0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12},
+	/* W25N01GV */
+	{0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20},
+};
+
+static u8 id_byte[8];
+static struct nand_info *p_nand_info;
+static u32 gp_page_buf[SFC_NAND_PAGE_MAX_SIZE / 4];
+static struct SFNAND_DEV sfc_nand_dev;
+
+static struct nand_info *spi_nand_get_info(u8 *nand_id)
+{
+	u32 i;
+	u32 id = (nand_id[0] << 8) | (nand_id[1] << 0);
+
+	for (i = 0; i < ARRAY_SIZE(spi_nand_tbl); i++) {
+		if (spi_nand_tbl[i].id == id)
+			return &spi_nand_tbl[i];
+	}
+	return NULL;
+}
+
+static int sfc_nand_write_en(void)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_WRITE_EN;
+	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	return ret;
+}
+
+static int sfc_nand_rw_preset(void)
+{
+	int ret;
+	union SFCCTRL_DATA sfctrl;
+	union SFCCMD_DATA sfcmd;
+	u8 status = 0xFF;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = 0;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.rw = SFC_WRITE;
+
+	sfctrl.b.datalines = 2;
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, &status);
+	return ret;
+}
+
+static int sfc_nand_read_feature(u8 addr, u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = 0x0F;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	*data = 0;
+
+	ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, data);
+	if (ret != SFC_OK)
+		return ret;
+	return SFC_OK;
+}
+
+static int sfc_nand_write_feature(u32 addr, u8 status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfc_nand_write_en();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = 0x1F;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	sfcmd.b.rw = SFC_WRITE;
+
+	ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, &status);
+	if (ret != SFC_OK)
+		return ret;
+	return ret;
+}
+
+static int sfc_nand_wait_busy(u8 *data, int timeout)
+{
+	int ret;
+	int i;
+	u8 status;
+
+	*data = 0;
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_nand_read_feature(0xC0, &status);
+		if (ret != SFC_OK)
+			return ret;
+		*data = status;
+		if (!(status & (1 << 0)))
+			return SFC_OK;
+		sfc_delay(1);
+	}
+	return -1;
+}
+
+static u32 sfc_nand_erase_block(u8 cs, u32 addr)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 status;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_nand_info->block_erase_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfc_nand_write_en();
+	ret = sfc_request(sfcmd.d32, 0, addr, NULL);
+	if (ret != SFC_OK)
+		return ret;
+	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+	if (status & (1 << 2))
+		return SFC_NAND_PROG_ERASE_ERROR;
+	return ret;
+}
+
+static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+	u8 status;
+	u32 data_sz = 2048;
+	u32 spare_offs_1 = p_nand_info->spare_offs_1;
+	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+
+	memcpy(gp_page_buf, p_data, data_sz);
+	gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0];
+	gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1];
+
+	sfc_nand_write_en();
+	if (sfc_nand_dev.prog_lines == DATA_LINES_X4 &&
+	    p_nand_info->QE_address == 0xFF &&
+	    sfc_get_version() != SFC_VER_3)
+		sfc_nand_rw_preset();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = sfc_nand_dev.page_prog_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.rw = SFC_WRITE;
+
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = sfc_nand_dev.prog_lines;
+	sfctrl.b.addrbits = 16;
+	sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_nand_info->page_prog_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfcmd.b.datasize = 0;
+	sfcmd.b.rw = SFC_WRITE;
+	ret = sfc_request(sfcmd.d32, 0, addr, p_data);
+	if (ret != SFC_OK)
+		return ret;
+	ret = sfc_nand_wait_busy(&status, 1000 * 1000);
+	if (status & (1 << 3))
+		return SFC_NAND_PROG_ERASE_ERROR;
+	return ret;
+}
+
+static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+	u8 status;
+	u8 ecc;
+	u32 data_sz = 2048;
+	u32 spare_offs_1 = p_nand_info->spare_offs_1;
+	u32 spare_offs_2 = p_nand_info->spare_offs_2;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_nand_info->page_read_cmd;
+	sfcmd.b.datasize = 0;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfc_request(sfcmd.d32, 0, addr, p_data);
+
+	sfc_nand_wait_busy(&status, 1000 * 1000);
+	ecc = (status >> 4) & 0x03;
+	if (sfc_nand_dev.read_lines == DATA_LINES_X4 &&
+	    p_nand_info->QE_address == 0xFF &&
+	    sfc_get_version() != SFC_VER_3)
+		sfc_nand_rw_preset();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = sfc_nand_dev.page_read_cmd;
+	sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = sfc_nand_dev.read_lines;
+
+	memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE);
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf);
+
+	memcpy(p_data, gp_page_buf, data_sz);
+	p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4];
+	p_spare[1] = gp_page_buf[(data_sz + spare_offs_2) / 4];
+	if (ret != SFC_OK)
+		return SFC_NAND_ECC_ERROR;
+
+	/*
+	 * ecc status:
+	 * 0, No bit errors were detected
+	 * 1, Bit errors were detected and corrected. If max_ecc_bits equals 1,
+	 *	Bit error count exceed the bit flip detection threshold.
+	 * 2, Multiple bit errors were detected and not corrected.
+	 * 3, If max_ecc_bits equals 1, reserved, else bit errors were detected
+	 *	and corrected, bit error count exceed the bit flip detection
+	 *	threshold
+	 */
+
+	if (ecc == 0) {
+		ret = SFC_NAND_ECC_OK;
+	} else if (ecc == 1) {
+		if (p_nand_info->max_ecc_bits == 1)
+			ret = SFC_NAND_ECC_REFRESH;
+		else
+			ret = SFC_NAND_ECC_OK;
+	} else if (ecc == 2) {
+		ret = SFC_NAND_ECC_ERROR;
+	} else {
+		if (p_nand_info->max_ecc_bits == 1)
+			ret = SFC_NAND_ECC_ERROR;
+		else
+			ret = SFC_NAND_ECC_REFRESH;
+	}
+
+	if (ret != SFC_NAND_ECC_OK) {
+		PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ret);
+		if (p_data)
+			PRINT_SFC_HEX("data:", p_data, 4, 8);
+		if (p_spare)
+			PRINT_SFC_HEX("spare:", p_spare, 4, 2);
+	}
+	return ret;
+}
+
+static int sfc_nand_read_id_raw(u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_JEDECID;
+	sfcmd.b.datasize = 3;
+	sfcmd.b.addrbits = SFC_ADDR_XBITS;
+
+	ret = sfc_request(sfcmd.d32, 0x8 << 16, 0, data);
+
+	return ret;
+}
+
+/*
+ * Read the 1st page's 1st byte of a phy_blk
+ * If not FF, it's bad blk
+ */
+static int sfc_nand_get_bad_block_list(u16 *table, u32 die)
+{
+	u16 blk;
+	u32 bad_cnt, page;
+	u32 blk_per_die;
+	u32 *pread;
+	u32 *pspare_read;
+
+	PRINT_SFC_E("%s\n", __func__);
+	pread = ftl_malloc(2048);
+	pspare_read = ftl_malloc(8);
+	bad_cnt = 0;
+	blk_per_die = p_nand_info->plane_per_die *
+			p_nand_info->blk_per_plane;
+	for (blk = 0; blk < blk_per_die; blk++) {
+		page = (blk + blk_per_die * die) *
+			p_nand_info->page_per_blk;
+		sfc_nand_read_page(0, page, pread, pspare_read);
+
+		if (pread[0] != 0xFFFFFFFF ||
+		    pspare_read[0] != 0xFFFFFFFF) {
+			table[bad_cnt++] = blk;
+			PRINT_SFC_E("die[%d], bad_blk[%d]\n", die, blk);
+		}
+	}
+	ftl_free(pread);
+	ftl_free(pspare_read);
+	return (int)bad_cnt;
+}
+
+#if SFC_NAND_STRESS_TEST_EN
+
+#define SFC_NAND_PAGE_SIZE	2048
+#define SFC_NAND_SPARE_SIZE	8
+
+static u16 bad_blk_list[1024];
+static u32 pwrite[SFC_NAND_PAGE_SIZE / 4];
+static u32 pread[SFC_NAND_PAGE_SIZE / 4];
+static u32 pspare_write[SFC_NAND_SPARE_SIZE / 4];
+static u32 pspare_read[SFC_NAND_SPARE_SIZE / 4];
+static u32 bad_blk_num;
+static u32 bad_page_num;
+
+static void sfc_nand_test(void)
+{
+	u32 i, blk, page, bad_cnt, page_addr;
+	int ret;
+	u32 pages_num = 64;
+	u32 blk_addr = 64;
+	u32 is_bad_blk = 0;
+
+	PRINT_SFC_E("%s\n", __func__);
+
+	bad_blk_num = 0;
+	bad_page_num = 0;
+	bad_cnt	= sfc_nand_get_bad_block_list(bad_blk_list, 0);
+
+	for (blk = 0; blk < 1024; blk++) {
+		for (i = 0; i < bad_cnt; i++) {
+			if (bad_blk_list[i] == blk)
+				break;
+		}
+		if (i < bad_cnt)
+			continue;
+		is_bad_blk = 0;
+		PRINT_SFC_E("Flash prog block: %x\n", blk);
+		sfc_nand_erase_block(0, blk * blk_addr);
+		for (page = 0; page < pages_num; page++) {
+			page_addr = blk * blk_addr + page;
+			for (i = 0; i < 512; i++)
+				pwrite[i] = (page_addr << 16) + i;
+			pspare_write[0] = pwrite[0] + 0x5AF0;
+			pspare_write[1] = pspare_write[0] + 1;
+			sfc_nand_prog_page(0, page_addr, pwrite, pspare_write);
+			memset(pread, 0, 2048);
+			memset(pspare_read, 0, 8);
+			ret = sfc_nand_read_page(0, page_addr, pread,
+						 pspare_read);
+			if (ret != SFC_NAND_ECC_OK)
+				is_bad_blk = 1;
+			for (i = 0; i < 512; i++) {
+				if (pwrite[i] != pread[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			for (i = 0; i < 2; i++) {
+				if (pspare_write[i] != pspare_read[i]) {
+					is_bad_blk = 1;
+					break;
+				}
+			}
+			if (is_bad_blk) {
+				bad_page_num++;
+				PRINT_SFC_E("ERR:page%x, ret=%x\n",
+					    page_addr, ret);
+				PRINT_SFC_HEX("data:", pread, 4, 8);
+				PRINT_SFC_HEX("spare:", pspare_read, 4, 2);
+			}
+		}
+		sfc_nand_erase_block(0, blk * blk_addr);
+		if (is_bad_blk)
+			bad_blk_num++;
+	}
+	PRINT_SFC_E("bad_blk_num = %d, bad_page_num = %d\n",
+		    bad_blk_num, bad_page_num);
+
+	PRINT_SFC_E("Flash Test Finish!!!\n");
+	while (1)
+		;
+}
+#endif
+
+static void ftl_flash_init(void)
+{
+	/* para init */
+	g_nand_phy_info.nand_type	= 1;
+	g_nand_phy_info.die_num		= 1;
+	g_nand_phy_info.plane_per_die	= p_nand_info->plane_per_die;
+	g_nand_phy_info.blk_per_plane	= p_nand_info->blk_per_plane;
+	g_nand_phy_info.page_per_blk	= p_nand_info->page_per_blk;
+	g_nand_phy_info.page_per_slc_blk = p_nand_info->page_per_blk;
+	g_nand_phy_info.byte_per_sec	= 512;
+	g_nand_phy_info.sec_per_page	= p_nand_info->sec_per_page;
+	g_nand_phy_info.sec_per_blk	= p_nand_info->sec_per_page *
+					  p_nand_info->page_per_blk;
+	g_nand_phy_info.reserved_blk	= 8;
+	g_nand_phy_info.blk_per_die	= p_nand_info->plane_per_die *
+					  p_nand_info->blk_per_plane;
+	g_nand_phy_info.ecc_bits	= p_nand_info->max_ecc_bits;
+
+	/* driver register */
+	g_nand_ops.get_bad_blk_list	= sfc_nand_get_bad_block_list;
+	g_nand_ops.erase_blk		= sfc_nand_erase_block;
+	g_nand_ops.prog_page		= sfc_nand_prog_page;
+	g_nand_ops.read_page		= sfc_nand_read_page;
+}
+
+static int spi_nand_enable_QE(void)
+{
+	int ret = SFC_OK;
+	u8 status;
+	int bit_offset = p_nand_info->QE_bits;
+
+	if (bit_offset == 0xFF)
+		return SFC_OK;
+
+	ret = sfc_nand_read_feature(p_nand_info->QE_address, &status);
+	if (ret != SFC_OK)
+		return ret;
+
+	if (status & (1 << bit_offset))   /* is QE bit set */
+		return SFC_OK;
+
+	status |= (1 << bit_offset);
+		return sfc_nand_write_feature(p_nand_info->QE_address, status);
+
+	return ret;
+}
+
+u32 sfc_nand_init(void)
+{
+	PRINT_SFC_I("...%s enter...\n", __func__);
+
+	sfc_nand_read_id_raw(id_byte);
+	PRINT_SFC_E("sfc_nand id: %x %x %x\n",
+		    id_byte[0], id_byte[1], id_byte[2]);
+	if (id_byte[0] == 0xFF || id_byte[0] == 0x00)
+		return FTL_NO_FLASH;
+
+	p_nand_info = spi_nand_get_info(id_byte);
+	if (!p_nand_info)
+		return FTL_UNSUPPORTED_FLASH;
+
+	sfc_nand_dev.manufacturer = id_byte[0];
+	sfc_nand_dev.mem_type = id_byte[1];
+
+	/* disable block lock */
+	sfc_nand_write_feature(0xA0, 0);
+	sfc_nand_dev.read_lines = DATA_LINES_X1;
+	sfc_nand_dev.prog_lines = DATA_LINES_X1;
+	sfc_nand_dev.page_read_cmd = p_nand_info->read_cache_cmd_1;
+	sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_1;
+	if (p_nand_info->feature & FEA_4BIT_READ) {
+		if (spi_nand_enable_QE() == SFC_OK) {
+			sfc_nand_dev.read_lines = DATA_LINES_X4;
+			sfc_nand_dev.page_read_cmd =
+				p_nand_info->read_cache_cmd_4;
+		}
+	}
+
+	if (p_nand_info->feature & FEA_4BIT_PROG &&
+	    sfc_nand_dev.read_lines == DATA_LINES_X4) {
+		sfc_nand_dev.prog_lines = DATA_LINES_X4;
+		sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_4;
+	}
+
+	if (1) {
+		u8 status;
+
+		sfc_nand_read_feature(0xA0, &status);
+		PRINT_SFC_I("sfc_nand A0 = 0x%x\n", status);
+		sfc_nand_read_feature(0xB0, &status);
+		PRINT_SFC_I("sfc_nand B0 = 0x%x\n", status);
+		sfc_nand_read_feature(0xC0, &status);
+		PRINT_SFC_I("sfc_nand C0 = 0x%x\n", status);
+		PRINT_SFC_I("read_lines = %x\n", sfc_nand_dev.read_lines);
+		PRINT_SFC_I("prog_lines = %x\n", sfc_nand_dev.prog_lines);
+		PRINT_SFC_I("page_read_cmd = %x\n", sfc_nand_dev.page_read_cmd);
+		PRINT_SFC_I("page_prog_cmd = %x\n", sfc_nand_dev.page_prog_cmd);
+	}
+	ftl_flash_init();
+
+	#if SFC_NAND_STRESS_TEST_EN
+	sfc_nand_test();
+	#endif
+
+	return SFC_OK;
+}
+
+int sfc_nand_read_id(u8 *data)
+{
+	memcpy(data, id_byte, 3);
+	return 0;
+}
diff --git a/drivers/rkflash/sfc_nand.h b/drivers/rkflash/sfc_nand.h
new file mode 100644
index 0000000000..4b96d5b9f2
--- /dev/null
+++ b/drivers/rkflash/sfc_nand.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __SFC_NAND_H
+#define __SFC_NAND_H
+
+#define SFC_NAND_STRESS_TEST_EN		0
+
+#define SFC_NAND_PROG_ERASE_ERROR	-2
+#define SFC_NAND_HW_ERROR		-1
+#define SFC_NAND_ECC_ERROR		NAND_ERROR
+#define SFC_NAND_ECC_REFRESH		NAND_STS_REFRESH
+#define SFC_NAND_ECC_OK			NAND_STS_OK
+
+#define SFC_NAND_PAGE_MAX_SIZE		2112
+
+#define FEA_READ_STATUE_MASK    (0x3 << 0)
+#define FEA_STATUE_MODE1        0
+#define FEA_STATUE_MODE2        1
+#define FEA_4BIT_READ           BIT(2)
+#define FEA_4BIT_PROG           BIT(3)
+#define FEA_4BYTE_ADDR          BIT(4)
+#define FEA_4BYTE_ADDR_MODE	BIT(5)
+
+#define MID_WINBOND             0xEF
+#define MID_GIGADEV             0xC8
+#define MID_MICRON              0x2C
+#define MID_MACRONIX            0xC2
+#define MID_SPANSION            0x01
+#define MID_EON                 0x1C
+#define MID_ST                  0x20
+
+/* Command Set */
+#define CMD_READ_JEDECID        (0x9F)
+#define CMD_READ_DATA           (0x03)
+#define CMD_READ_STATUS         (0x05)
+#define CMD_WRITE_STATUS        (0x01)
+#define CMD_PAGE_PROG           (0x02)
+#define CMD_SECTOR_ERASE        (0x20)
+#define CMD_BLK64K_ERASE        (0xD8)
+#define CMD_BLK32K_ERASE        (0x52)
+#define CMD_CHIP_ERASE          (0xC7)
+#define CMD_WRITE_EN            (0x06)
+#define CMD_WRITE_DIS           (0x04)
+#define CMD_PAGE_READ           (0x13)
+#define CMD_GET_FEATURE         (0x0F)
+#define CMD_SET_FEATURE         (0x1F)
+#define CMD_PROG_LOAD           (0x02)
+#define CMD_PROG_EXEC           (0x10)
+#define CMD_BLOCK_ERASE         (0xD8)
+#define CMD_READ_DATA_X2        (0x3B)
+#define CMD_READ_DATA_X4        (0x6B)
+#define CMD_PROG_LOAD_X4        (0x32)
+#define CMD_READ_STATUS2        (0x35)
+#define CMD_READ_STATUS3        (0x15)
+#define CMD_WRITE_STATUS2       (0x31)
+#define CMD_WRITE_STATUS3       (0x11)
+#define CMD_FAST_READ_X1        (0x0B)  /* X1 cmd, X1 addr, X1 data */
+#define CMD_FAST_READ_X2        (0x3B)  /* X1 cmd, X1 addr, X2 data */
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_READ_X4        (0x6B)
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_4READ_X4       (0x6C)
+/* X1 cmd, X4 addr, X4 data SUPPORT EON GD MARCONIX WINBOND */
+#define CMD_FAST_READ_A4        (0xEB)
+/* X1 cmd, X1 addr, X4 data, SUPPORT GD WINBOND */
+#define CMD_PAGE_PROG_X4        (0x32)
+/* X1 cmd, X4 addr, X4 data, SUPPORT MARCONIX */
+#define CMD_PAGE_PROG_A4        (0x38)
+#define CMD_RESET_NAND          (0xFF)
+
+#define CMD_ENTER_4BYTE_MODE    (0xB7)
+#define CMD_EXIT_4BYTE_MODE     (0xE9)
+#define CMD_ENABLE_RESER	(0x66)
+#define CMD_RESET_DEVICE	(0x99)
+
+struct SFNAND_DEV {
+	u32 capacity;
+	u32 block_size;
+	u16 page_size;
+	u8 manufacturer;
+	u8 mem_type;
+	u8 read_lines;
+	u8 prog_lines;
+	u8 page_read_cmd;
+	u8 page_prog_cmd;
+};
+
+struct nand_info {
+	u32 id;
+
+	u16 sec_per_page;
+	u16 page_per_blk;
+	u16 plane_per_die;
+	u16 blk_per_plane;
+
+	u8 page_read_cmd;
+	u8 page_prog_cmd;
+	u8 read_cache_cmd_1;
+	u8 prog_cache_cmd_1;
+
+	u8 read_cache_cmd_4;
+	u8 prog_cache_cmd_4;
+	u8 block_erase_cmd;
+	u8 feature;
+
+	u8 density;  /* (1 << density) sectors*/
+	u8 max_ecc_bits;
+	u8 QE_address;
+	u8 QE_bits;
+
+	u8 spare_offs_1;
+	u8 spare_offs_2;
+};
+
+u32 sfc_nand_init(void);
+int sfc_nand_read_id(u8 *buf);
+
+#endif
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
index bff5cdf8d3..1a1cd01492 100644
--- a/drivers/rkflash/sfc_nor.c
+++ b/drivers/rkflash/sfc_nor.c
@@ -1,11 +1,11 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
-
-#include <linux/delay.h>
 #include <linux/compat.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
 #include <linux/string.h>
 
 #include "sfc_nor.h"
@@ -103,7 +103,8 @@ static int snor_wait_busy(int timeout)
 {
 	int ret;
 	union SFCCMD_DATA sfcmd;
-	u32 i, status;
+	int i;
+	u32 status;
 
 	sfcmd.d32 = 0;
 	sfcmd.b.cmd = CMD_READ_STATUS;
@@ -195,7 +196,7 @@ static int snor_erase(struct SFNOR_DEV *p_dev,
 
 	sfcmd.b.addrbits = (erase_type != ERASE_CHIP) ?
 				SFC_ADDR_24BITS : SFC_ADDR_0BITS;
-	if ((p_dev->addr_mode == ADDR_MODE_4BYTE) && (erase_type != ERASE_CHIP))
+	if (p_dev->addr_mode == ADDR_MODE_4BYTE && erase_type != ERASE_CHIP)
 		sfcmd.b.addrbits = SFC_ADDR_32BITS;
 
 	snor_write_en();
@@ -401,6 +402,7 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 	int ret = SFC_OK;
 	u32 len, blk_size, offset;
 	u8 *p_buf =  (u8 *)p_data;
+	u32 total_sec = n_sec;
 
 	if ((sec + n_sec) > p_dev->capacity)
 		return SFC_PARAM_ERR;
@@ -436,7 +438,7 @@ int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
 out:
 	mutex_unlock(&p_dev->lock);
 	if (!ret)
-		ret = n_sec;
+		ret = total_sec;
 
 	return ret;
 }
@@ -492,9 +494,7 @@ static struct flash_info *snor_get_flash_info(u8 *flash_id)
 	u32 i;
 	u32 id = (flash_id[0] << 16) | (flash_id[1] << 8) | (flash_id[2] << 0);
 
-	for (i = 0;
-		i < (sizeof(spi_flash_tbl) / sizeof(struct flash_info));
-		i++) {
+	for (i = 0; i < ARRAY_SIZE(spi_flash_tbl); i++) {
 		if (spi_flash_tbl[i].id == id)
 			return &spi_flash_tbl[i];
 	}
@@ -520,7 +520,7 @@ static void *snor_flash_info_adjust(struct flash_info *spi_flash_info)
 
 int snor_init(struct SFNOR_DEV *p_dev)
 {
-	int i;
+	u32 i;
 	u8 id_byte[5];
 	int err;
 
@@ -562,8 +562,8 @@ int snor_init(struct SFNOR_DEV *p_dev)
 				p_dev->read_cmd = g_spi_flash_info->read_cmd_4;
 			}
 		}
-		if ((g_spi_flash_info->feature & FEA_4BIT_PROG) &&
-		    (p_dev->read_lines == DATA_LINES_X4)) {
+		if (g_spi_flash_info->feature & FEA_4BIT_PROG &&
+		    p_dev->read_lines == DATA_LINES_X4) {
 			p_dev->prog_lines = DATA_LINES_X4;
 			p_dev->prog_cmd = g_spi_flash_info->prog_cmd_4;
 		}
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
index 6f36358898..105683e84f 100644
--- a/drivers/rkflash/sfc_nor.h
+++ b/drivers/rkflash/sfc_nor.h
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
  *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef _SFNOR_H
diff --git a/drivers/rkflash/typedef.h b/drivers/rkflash/typedef.h
new file mode 100644
index 0000000000..ca20ceeb18
--- /dev/null
+++ b/drivers/rkflash/typedef.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef	__TYPE_DEF_H
+#define	__TYPE_DEF_H
+
+#include <asm/types.h>
+
+#ifndef NULL
+#define NULL	0
+#endif
+
+#define OK	0
+#define ERROR	(-1)
+
+#define FTL_ERROR	ERROR
+#define FTL_OK		OK
+#define FTL_NO_FLASH	-2
+#define FTL_NO_IDB	-3
+#define FTL_UNSUPPORTED_FLASH	-4
+
+#define FALSE		0
+#define TRUE		(!FALSE)
+
+#define INVALID_UINT8	((u8)0xFF)
+#define INVALID_UINT16	((u16)0xFFFF)
+#define INVALID_UINT32	((u32)0xFFFFFFFFL)
+
+#define PRINT_E	pr_info
+#define PRINT_I	pr_info
+
+void *ftl_malloc(int n_size);
+void *ftl_memset(void *s, int c, unsigned int n);
+void *ftl_memcpy(void *pv_to,
+		 const void *pv_from,
+		 unsigned int size);
+void ftl_free(void *p);
+void rknand_print_hex(char *s, void *buf, int width, int len);
+
+#endif  /*__TYPEDEF_H */

commit 504d9922d7962ecf19c00d1965fb36a07a330eec
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Feb 27 11:13:22 2018 +0800

    drm/rockchip: vop: delete aclk frequence set
    
    aclk freq should same to kernel, in addition the aclk is also used by
    oteher IP, like RGA,IEP and so on. so we move this to cru driver to do
    aclk init.
    
    Change-Id: I0d2395506a185548e64d8d2e37024c0de656514b
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 739595d782..201fd20082 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -196,7 +196,7 @@ static int rockchip_vop_init(struct display_state *state)
 	u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
-	struct clk dclk, aclk;
+	struct clk dclk;
 	u32 val, act_end;
 	int ret;
 	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
@@ -237,12 +237,6 @@ static int rockchip_vop_init(struct display_state *state)
 		return ret;
 	}
 
-	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
-	if (!ret)
-		ret = clk_set_rate(&aclk, 400 * 1000 * 1000);
-	if (IS_ERR_VALUE(ret))
-		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
-
 	memcpy(vop->regsbak, vop->regs, vop_data->reg_len);
 
 	rockchip_vop_init_gamma(vop, state);

commit 7a1915c07b081eaeaf68b22bcf1841cee9cddd08
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 22 16:25:06 2018 +0800

    clk: rockchip: px30: implement soc_clk_dump
    
    Change-Id: I8c5c4468ed6c6d1f4767a0a6ddaa2b47037fe8bc
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index df5ec9b9e2..acaa204a25 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -27,6 +27,12 @@ enum px30_pll_id {
 	PLL_COUNT,
 };
 
+struct px30_clk_info {
+	unsigned long id;
+	char *name;
+	bool is_cru;
+};
+
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct px30_clk_priv {
 	struct px30_cru *cru;
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 3b8dca8547..7fbb279247 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -40,6 +40,13 @@ enum {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
+#define PX30_CLK_DUMP(_id, _name, _iscru)	\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+	.is_cru = _iscru,			\
+}
+
 static struct pll_rate_table px30_pll_rates[] = {
 	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
 	PX30_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
@@ -49,6 +56,20 @@ static struct pll_rate_table px30_pll_rates[] = {
 	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
 };
 
+static const struct px30_clk_info clks_dump[] = {
+	PX30_CLK_DUMP(PLL_APLL, "apll", true),
+	PX30_CLK_DUMP(PLL_DPLL, "dpll", true),
+	PX30_CLK_DUMP(PLL_CPLL, "cpll", true),
+	PX30_CLK_DUMP(PLL_NPLL, "npll", true),
+	PX30_CLK_DUMP(PLL_GPLL, "gpll", false),
+	PX30_CLK_DUMP(ACLK_BUS_PRE, "aclk_bus", true),
+	PX30_CLK_DUMP(HCLK_BUS_PRE, "hclk_bus", true),
+	PX30_CLK_DUMP(PCLK_BUS_PRE, "pclk_bus", true),
+	PX30_CLK_DUMP(ACLK_PERI_PRE, "aclk_peri", true),
+	PX30_CLK_DUMP(HCLK_PERI_PRE, "hclk_peri", true),
+	PX30_CLK_DUMP(PCLK_PMU_PRE, "pclk_pmu", false),
+};
+
 static u8 pll_mode_shift[PLL_COUNT] = {
 	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
 	NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
@@ -1281,3 +1302,69 @@ U_BOOT_DRIVER(rockchip_px30_pmucru) = {
 	.ops		= &px30_pmuclk_ops,
 	.probe		= px30_pmuclk_probe,
 };
+
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev, *pmucru_dev;
+	const struct px30_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_px30_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_px30_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s failed to get pmucru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			if (clk_dump->is_cru)
+				ret = clk_request(cru_dev, &clk);
+			else
+				ret = clk_request(pmucru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}

commit 8b1aed51a630d15c96a7adfd99c2ea7bf2c3d834
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 22 16:46:07 2018 +0800

    clk: rockchip: px30: Add support to get pll rate
    
    Change-Id: I41834e2d5e2537a71d68228d995cbfcc04744959
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 0e4e4b1faf..3b8dca8547 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -758,6 +758,14 @@ static int px30_clk_get_gpll_rate(ulong *rate)
 	return 0;
 }
 
+static ulong px30_clk_get_pll_rate(struct px30_clk_priv *priv,
+				   enum px30_pll_id pll_id)
+{
+	struct px30_cru *cru = priv->cru;
+
+	return rkclk_pll_get_rate(&cru->pll[pll_id], &cru->mode, pll_id);
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -775,8 +783,18 @@ static ulong px30_clk_get_rate(struct clk *clk)
 
 	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case PLL_APLL:
+		rate = px30_clk_get_pll_rate(priv, APLL);
+		break;
+	case PLL_DPLL:
+		rate = px30_clk_get_pll_rate(priv, DPLL);
+		break;
+	case PLL_CPLL:
+		rate = px30_clk_get_pll_rate(priv, CPLL);
+		break;
+	case PLL_NPLL:
+		rate = px30_clk_get_pll_rate(priv, NPLL);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:

commit cefa5186b040a24890d8f0f2e9020fe0f1b645ed
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 16:57:55 2018 +0800

    clk: rockchip: px30: Add support for pmucru
    
    Change-Id: I445ae2b2491d1709d2790412fcc07dccf56189d9
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 3bb6007ff2..df5ec9b9e2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -13,31 +13,10 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(1200 * MHz)
-#define CPLL_HZ		(594 * MHz)
 
 #define CORE_PERI_HZ	204000000
 #define CORE_ACLK_HZ	408000000
 
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
-
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
-
-enum apll_frequencies {
-	APLL_816_MHZ,
-	APLL_600_MHZ,
-};
-
-/* Private data for the clock driver - used by rockchip_get_cru() */
-struct px30_clk_priv {
-	struct px30_cru *cru;
-	ulong rate;
-};
-
 /* PX30 pll id */
 enum px30_pll_id {
 	APLL,
@@ -48,15 +27,28 @@ enum px30_pll_id {
 	PLL_COUNT,
 };
 
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct px30_clk_priv {
+	struct px30_cru *cru;
+	ulong gpll_hz;
+};
+
+struct px30_pmuclk_priv {
+	struct px30_pmucru *pmucru;
+	ulong gpll_hz;
+};
+
+struct px30_pll {
+	unsigned int con0;
+	unsigned int con1;
+	unsigned int con2;
+	unsigned int con3;
+	unsigned int con4;
+	unsigned int reserved0[3];
+};
+
 struct px30_cru {
-	struct px30_pll {
-		unsigned int con0;
-		unsigned int con1;
-		unsigned int con2;
-		unsigned int con3;
-		unsigned int con4;
-		unsigned int reserved0[3];
-	} pll[4];
+	struct px30_pll pll[4];
 	unsigned int reserved1[8];
 	unsigned int mode;
 	unsigned int misc;
@@ -87,23 +79,31 @@ struct px30_cru {
 	unsigned int emmc_con[2];
 	unsigned int reserved9[(0x400 - 0x394) / 4 - 1];
 	unsigned int autocs_con[8];
-	unsigned int reserved10[(0xc000 - 0x41c) / 4 - 1];
-	struct px30_pll gpll;
+};
+
+check_member(px30_cru, autocs_con[7], 0x41c);
+
+struct px30_pmucru {
+	struct px30_pll pll;
 	unsigned int pmu_mode;
-	unsigned int reserved11[7];
+	unsigned int reserved1[7];
 	unsigned int pmu_clksel_con[6];
+	unsigned int reserved2[10];
 	unsigned int pmu_clkgate_con[2];
-	unsigned int reserved12[(0xc0c0 - 0xc05c) / 4 - 1];
+	unsigned int reserved3[14];
 	unsigned int pmu_autocs_con[2];
 };
-check_member(px30_cru, pmu_autocs_con[1], 0xc0c4);
-
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+
+check_member(px30_pmucru, pmu_autocs_con[1], 0xc4);
+
+struct pll_rate_table {
+	unsigned long rate;
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
 };
 
 enum {
@@ -194,6 +194,21 @@ enum {
 	PERI_ACLK_DIV_SHIFT	= 0,
 	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
 
+	/* CRU_CLKSEL15_CON */
+	NANDC_CLK_SEL_SHIFT	= 15,
+	NANDC_CLK_SEL_MASK	= 0x1 << NANDC_CLK_SEL_SHIFT,
+	NANDC_CLK_SEL_NANDC	= 0,
+	NANDC_CLK_SEL_NANDC_DIV50,
+	NANDC_DIV50_SHIFT	= 8,
+	NANDC_DIV50_MASK	= 0x1f << NANDC_DIV50_SHIFT,
+	NANDC_PLL_SHIFT		= 6,
+	NANDC_PLL_MASK		= 0x3 << NANDC_PLL_SHIFT,
+	NANDC_SEL_GPLL		= 0,
+	NANDC_SEL_CPLL,
+	NANDC_SEL_NPLL,
+	NANDC_DIV_SHIFT		= 0,
+	NANDC_DIV_MASK		= 0x1f << NANDC_DIV_SHIFT,
+
 	/* CRU_CLKSEL20_CON */
 	EMMC_PLL_SHIFT		= 14,
 	EMMC_PLL_MASK		= 3 << EMMC_PLL_SHIFT,
@@ -309,8 +324,11 @@ enum {
 	CLK_SARADC_DIV_CON_MASK		= 0x7ff,
 
 	/* CRU_PMU_MODE */
-	GPLL_MODE_SHIFT		= 0,
-	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
-	
+	GPLL_MODE_SHIFT			= 0,
+	GPLL_MODE_MASK			= 3 << GPLL_MODE_SHIFT,
+
+	/* CRU_PMU_CLK_SEL0_CON */
+	CLK_PMU_PCLK_DIV_SHIFT		= 0,
+	CLK_PMU_PCLK_DIV_MASK		= 0x1f << CLK_PMU_PCLK_DIV_SHIFT,
 };
 #endif
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 17effb0239..0e4e4b1faf 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -26,20 +26,27 @@ enum {
 	OUTPUT_MIN_HZ	= 24 * 1000000,
 };
 
-#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
-
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 1, 1);
+#define PX30_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
+			_postdiv2, _dsmpd, _frac)		\
+{								\
+	.rate	= _rate##U,					\
+	.fbdiv = _fbdiv,					\
+	.postdiv1 = _postdiv1,					\
+	.refdiv = _refdiv,					\
+	.postdiv2 = _postdiv2,					\
+	.dsmpd = _dsmpd,					\
+	.frac = _frac,						\
+}
 
-static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
-static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
-static const struct pll_div *apll_cfgs[] = {
-	[APLL_816_MHZ] = &apll_816_cfg,
-	[APLL_600_MHZ] = &apll_600_cfg,
+static struct pll_rate_table px30_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	PX30_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	PX30_PLL_RATE(1188000000, 2, 99, 1, 1, 1, 0),
+	PX30_PLL_RATE(1100000000, 12, 550, 1, 1, 1, 0),
+	PX30_PLL_RATE(1000000000, 6, 500, 2, 1, 1, 0),
+	PX30_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
 };
 
 static u8 pll_mode_shift[PLL_COUNT] = {
@@ -51,12 +58,86 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	NPLL_MODE_MASK, GPLL_MODE_MASK
 };
 
-/*
- *  the div restructions of pll in integer mode, these are defined in
- *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
- */
-#define PLL_DIV_MIN	16
-#define PLL_DIV_MAX	3200
+static struct pll_rate_table auto_table;
+
+static struct pll_rate_table *pll_clk_set_by_auto(u32 drate)
+{
+	struct pll_rate_table *rate = &auto_table;
+	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 rate_khz = drate / KHz;
+
+	if (!drate) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return NULL;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, rate_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = rate_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / KHz) || vco_khz > (VCO_MAX_HZ / KHz) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, rate_khz);
+		return NULL;
+	}
+
+	rate->postdiv1 = postdiv1;
+	rate->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		rate->refdiv = refdiv;
+		rate->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (MHz / KHz)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, rate_khz,
+		       best_diff_khz * KHz);
+		return NULL;
+	}
+
+	return rate;
+}
+
+static const struct pll_rate_table *get_pll_settings(unsigned long rate)
+{
+	unsigned int rate_count = ARRAY_SIZE(px30_pll_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (rate == px30_pll_rates[i].rate)
+			return &px30_pll_rates[i];
+	}
+
+	return pll_clk_set_by_auto(rate);
+}
 
 /*
  * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
@@ -73,26 +154,26 @@ static u32 pll_mode_mask[PLL_COUNT] = {
  * FBDIV = Integer value programmed into feedback divide
  *
  */
-static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
-			  const struct pll_div *div)
+static int rkclk_set_pll(struct px30_pll *pll, unsigned int *mode,
+			 enum px30_pll_id pll_id,
+			 unsigned long drate)
 {
-	struct px30_pll *pll;
-	unsigned int *mode;
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+	const struct pll_rate_table *rate;
+	uint vco_hz, output_hz;
 
-	if (pll_id == GPLL) {
-		pll = &cru->gpll;
-		mode = &cru->pmu_mode;
-	} else {
-		pll = &cru->pll[pll_id];
-		mode = &cru->mode;
-	};
+	rate = get_pll_settings(drate);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000;
+	output_hz = vco_hz / rate->postdiv1 / rate->postdiv2;
 
 	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
+	      pll, rate->fbdiv, rate->refdiv, rate->postdiv1,
+	      rate->postdiv2, vco_hz, output_hz);
 	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
 	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
 
@@ -110,10 +191,10 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+		     (rate->postdiv1 << PLL_POSTDIV1_SHIFT) | rate->fbdiv);
 	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
+		     (rate->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     rate->refdiv << PLL_REFDIV_SHIFT));
 
 	/* Power Up */
 	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
@@ -125,26 +206,16 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	rk_clrsetreg(mode, pll_mode_mask[pll_id],
 		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
 
-	return;
+	return 0;
 }
 
-static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
+static uint32_t rkclk_pll_get_rate(struct px30_pll *pll, unsigned int *mode,
 				   enum px30_pll_id pll_id)
 {
 	u32 refdiv, fbdiv, postdiv1, postdiv2;
-	u32 con;
-	struct px30_pll *pll;
-	uint shift;
-	uint mask;
-
-	if (pll_id == GPLL) {
-		pll = &cru->gpll;
-		con = readl(&cru->pmu_mode);
-	} else {
-		pll = &cru->pll[pll_id];
-		con = readl(&cru->mode);
-	}
+	u32 con, shift, mask;
 
+	con = readl(mode);
 	shift = pll_mode_shift[pll_id];
 	mask = pll_mode_mask[pll_id];
 
@@ -166,94 +237,9 @@ static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
 	}
 }
 
-static int pll_para_config(u32 freq_hz, struct pll_div *div)
-{
-	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
-	u32 postdiv1, postdiv2 = 1;
-	u32 fref_khz;
-	u32 diff_khz, best_diff_khz;
-	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
-	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
-	u32 vco_khz;
-	u32 freq_khz = freq_hz / KHz;
-
-	if (!freq_hz) {
-		printf("%s: the frequency can't be 0 Hz\n", __func__);
-		return -1;
-	}
-
-	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
-	if (postdiv1 > max_postdiv1) {
-		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
-		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
-	}
-
-	vco_khz = freq_khz * postdiv1 * postdiv2;
-
-	if (vco_khz < (VCO_MIN_HZ / KHz) || vco_khz > (VCO_MAX_HZ / KHz) ||
-	    postdiv2 > max_postdiv2) {
-		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
-		       __func__, freq_hz);
-		return -1;
-	}
-
-	div->postdiv1 = postdiv1;
-	div->postdiv2 = postdiv2;
-
-	best_diff_khz = vco_khz;
-	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
-		fref_khz = ref_khz / refdiv;
-
-		fbdiv = vco_khz / fref_khz;
-		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
-			continue;
-		diff_khz = vco_khz - fbdiv * fref_khz;
-		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
-			fbdiv++;
-			diff_khz = fref_khz - diff_khz;
-		}
-
-		if (diff_khz >= best_diff_khz)
-			continue;
-
-		best_diff_khz = diff_khz;
-		div->refdiv = refdiv;
-		div->fbdiv = fbdiv;
-	}
-
-	if (best_diff_khz > 4 * (MHz / KHz)) {
-		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
-		       __func__, freq_hz,
-		       best_diff_khz * KHz);
-		return -1;
-	}
-	return 0;
-}
-
-static void rkclk_init(struct px30_cru *cru)
-{
-	u32 aclk_div;
-
-	/* init pll */
-	rkclk_set_pll(cru, APLL, apll_cfgs[APLL_816_MHZ]);
-	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
-
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PERI and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
-		     CORE_ACLK_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-}
-
-static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_i2c_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -278,14 +264,15 @@ static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -322,11 +309,44 @@ static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return px30_i2c_get_clk(cru, clk_id);
+	return px30_i2c_get_clk(priv, clk_id);
+}
+
+static ulong px30_nandc_get_clk(struct px30_clk_priv *priv)
+{
+	struct px30_cru *cru = priv->cru;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[15]);
+	div = (con & NANDC_DIV_MASK) >> NANDC_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div) / 2;
+}
+
+static ulong px30_nandc_set_clk(struct px30_clk_priv *priv,
+				ulong set_rate)
+{
+	struct px30_cru *cru = priv->cru;
+	int src_clk_div;
+
+	/* Select nandc source from GPLL by default */
+	/* nandc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
+	assert(src_clk_div - 1 < 31);
+
+	rk_clrsetreg(&cru->clksel_con[15],
+		     NANDC_CLK_SEL_MASK | NANDC_PLL_MASK |
+		     NANDC_DIV_MASK,
+		     NANDC_CLK_SEL_NANDC << NANDC_CLK_SEL_SHIFT |
+		     NANDC_SEL_GPLL << NANDC_PLL_SHIFT |
+		     (src_clk_div - 1) << NANDC_DIV_SHIFT);
+
+	return px30_nandc_get_clk(priv);
 }
 
-static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
+static ulong px30_mmc_get_clk(struct px30_clk_priv *priv, uint clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
 	switch (clk_id) {
@@ -350,17 +370,17 @@ static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
 	    == EMMC_SEL_24M)
 		return DIV_TO_RATE(OSC_HZ, div) / 2;
 	else
-		return DIV_TO_RATE(GPLL_HZ, div) / 2;
+		return DIV_TO_RATE(priv->gpll_hz, div) / 2;
 
 }
 
-static ulong px30_mmc_set_clk(struct px30_cru *cru,
-				ulong clk_id, ulong set_rate)
+static ulong px30_mmc_set_clk(struct px30_clk_priv *priv,
+			      ulong clk_id, ulong set_rate)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 	u32 con_id;
 
-	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
 	switch (clk_id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -373,9 +393,10 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	default:
 		return -EINVAL;
 	}
+
 	/* Select clk_sdmmc/emmc source from GPLL by default */
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz / 2, set_rate);
 
 	if (src_clk_div > 127) {
 		/* use 24MHz source for 400KHz clock */
@@ -393,11 +414,12 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	rk_clrsetreg(&cru->clksel_con[con_id +1], EMMC_CLK_SEL_MASK,
 		     EMMC_CLK_SEL_EMMC);
 
-	return px30_mmc_get_clk(cru, clk_id);
+	return px30_mmc_get_clk(priv, clk_id);
 }
 
-static ulong px30_pwm_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_pwm_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -414,14 +436,15 @@ static ulong px30_pwm_get_clk(struct px30_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_pwm_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -444,11 +467,12 @@ static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return px30_pwm_get_clk(cru, clk_id);
+	return px30_pwm_get_clk(priv, clk_id);
 }
 
-static ulong px30_saradc_get_clk(struct px30_cru *cru)
+static ulong px30_saradc_get_clk(struct px30_clk_priv *priv)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[55]);
@@ -457,22 +481,24 @@ static ulong px30_saradc_get_clk(struct px30_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
+static ulong px30_saradc_set_clk(struct px30_clk_priv *priv, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = OSC_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
 	assert(src_clk_div - 1 < 2047);
 
 	rk_clrsetreg(&cru->clksel_con[55],
 		     CLK_SARADC_DIV_CON_MASK,
 		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
 
-	return px30_saradc_get_clk(cru);
+	return px30_saradc_get_clk(priv);
 }
 
-static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_spi_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con;
 
 	switch (clk_id) {
@@ -489,14 +515,15 @@ static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	return DIV_TO_RATE(priv->gpll_hz, div);
 }
 
-static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_spi_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk_id) {
@@ -519,23 +546,24 @@ static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return px30_spi_get_clk(cru, clk_id);
+	return px30_spi_get_clk(priv, clk_id);
 }
 
-static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_vop_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
 	case ACLK_VOPB:
 		con = readl(&cru->clksel_con[3]);
 		div = con & ACLK_VO_DIV_MASK;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case DCLK_VOPB:
 		con = readl(&cru->clksel_con[5]);
 		div = con & DCLK_VOPB_DIV_MASK;
-		parent = rkclk_pll_get_rate(cru, CPLL);
+		parent = rkclk_pll_get_rate(&cru->pll[CPLL], &cru->mode, CPLL);
 		break;
 	default:
 		return -ENOENT;
@@ -544,12 +572,12 @@ static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+static ulong px30_vop_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
-	struct pll_div cpll_config = {0};
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 31);
 
 	switch (clk_id) {
@@ -564,9 +592,7 @@ static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		 * vopb dclk source from cpll, and equals to
 		 * cpll(means div == 1)
 		 */
-		if (pll_para_config(hz, &cpll_config))
-			return -1;
-		rkclk_set_pll(cru, CPLL, &cpll_config);
+		rkclk_set_pll(&cru->pll[CPLL], &cru->mode, CPLL, hz);
 
 		rk_clrsetreg(&cru->clksel_con[5],
 			     DCLK_VOPB_SEL_MASK | DCLK_VOPB_PLL_SEL_MASK |
@@ -580,26 +606,27 @@ static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return hz;
+	return px30_vop_get_clk(priv, clk_id);
 }
 
-static ulong px30_bus_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_bus_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
 	case ACLK_BUS_PRE:
 		con = readl(&cru->clksel_con[23]);
 		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case HCLK_BUS_PRE:
 		con = readl(&cru->clksel_con[24]);
 		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case PCLK_BUS_PRE:
-		parent = px30_bus_get_clk(cru, ACLK_BUS_PRE);
+		parent = px30_bus_get_clk(priv, ACLK_BUS_PRE);
 		con = readl(&cru->clksel_con[24]);
 		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
 		break;
@@ -610,8 +637,10 @@ static ulong px30_bus_get_clk(struct px30_cru *cru, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+static ulong px30_bus_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+			      ulong hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
 	/*
@@ -620,7 +649,7 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 	 */
 	switch (clk_id) {
 	case ACLK_BUS_PRE:
-		src_clk_div = GPLL_HZ / hz;
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[23],
 			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
@@ -628,7 +657,7 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
 		break;
 	case HCLK_BUS_PRE:
-		src_clk_div = GPLL_HZ / hz;
+		src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 		assert(src_clk_div - 1 < 31);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PLL_SEL_MASK | BUS_HCLK_DIV_MASK,
@@ -636,7 +665,8 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
 		break;
 	case PCLK_BUS_PRE:
-		src_clk_div = px30_bus_get_clk(cru, ACLK_BUS_PRE) / hz;
+		src_clk_div =
+			DIV_ROUND_UP(px30_bus_get_clk(priv, ACLK_BUS_PRE), hz);
 		assert(src_clk_div - 1 < 3);
 		rk_clrsetreg(&cru->clksel_con[24],
 			     BUS_PCLK_DIV_MASK,
@@ -647,23 +677,24 @@ static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 		return -EINVAL;
 	}
 
-	return px30_bus_get_clk(cru, clk_id);
+	return px30_bus_get_clk(priv, clk_id);
 }
 
-static ulong px30_peri_get_clk(struct px30_cru *cru, ulong clk_id)
+static ulong px30_peri_get_clk(struct px30_clk_priv *priv, ulong clk_id)
 {
+	struct px30_cru *cru = priv->cru;
 	u32 div, con, parent;
 
 	switch (clk_id) {
 	case ACLK_PERI_PRE:
 		con = readl(&cru->clksel_con[14]);
 		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	case HCLK_PERI_PRE:
 		con = readl(&cru->clksel_con[14]);
 		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
-		parent = GPLL_HZ;
+		parent = priv->gpll_hz;
 		break;
 	default:
 		return -ENOENT;
@@ -672,11 +703,13 @@ static ulong px30_peri_get_clk(struct px30_cru *cru, ulong clk_id)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong px30_peri_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+static ulong px30_peri_set_clk(struct px30_clk_priv *priv, ulong clk_id,
+			       ulong hz)
 {
+	struct px30_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = GPLL_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
 	assert(src_clk_div - 1 < 31);
 
 	/*
@@ -701,14 +734,46 @@ static ulong px30_peri_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
 		return -EINVAL;
 	}
 
-	return px30_peri_get_clk(cru, clk_id);
+	return px30_peri_get_clk(priv, clk_id);
+}
+
+static int px30_clk_get_gpll_rate(ulong *rate)
+{
+	struct udevice *pmucru_dev;
+	struct px30_pmuclk_priv *priv;
+	struct px30_pmucru *pmucru;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_px30_pmucru),
+					  &pmucru_dev);
+	if (ret) {
+		printf("%s: could not find pmucru device\n", __func__);
+		return ret;
+	}
+	priv = dev_get_priv(pmucru_dev);
+	pmucru = priv->pmucru;
+	*rate =  rkclk_pll_get_rate(&pmucru->pll, &pmucru->pmu_mode, GPLL);
+
+	return 0;
 }
 
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
+	int ret;
+
+	if (!priv->gpll_hz) {
+		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
+		if (ret) {
+			printf("%s failed to get gpll rate\n", __func__);
+			return ret;
+		}
+		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	}
 
+	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case 0 ... 15:
 		return 0;
@@ -717,37 +782,37 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
 	case SCLK_EMMC_SAMPLE:
-		rate = px30_mmc_get_clk(priv->cru, clk->id);
+		rate = px30_mmc_get_clk(priv, clk->id);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		rate = px30_i2c_get_clk(priv->cru, clk->id);
+		rate = px30_i2c_get_clk(priv, clk->id);
 		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
-		rate = px30_pwm_get_clk(priv->cru, clk->id);
+		rate = px30_pwm_get_clk(priv, clk->id);
 		break;
 	case SCLK_SARADC:
-		rate = px30_saradc_get_clk(priv->cru);
+		rate = px30_saradc_get_clk(priv);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		rate = px30_spi_get_clk(priv->cru, clk->id);
+		rate = px30_spi_get_clk(priv, clk->id);
 		break;
 	case ACLK_VOPB:
 	case DCLK_VOPB:
-		rate = px30_vop_get_clk(priv->cru, clk->id);
+		rate = px30_vop_get_clk(priv, clk->id);
 		break;
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
 	case PCLK_BUS_PRE:
-		rate = px30_bus_get_clk(priv->cru, clk->id);
+		rate = px30_bus_get_clk(priv, clk->id);
 		break;
 	case ACLK_PERI_PRE:
 	case HCLK_PERI_PRE:
-		rate = px30_peri_get_clk(priv->cru, clk->id);
+		rate = px30_peri_get_clk(priv, clk->id);
 		break;
 	default:
 		return -ENOENT;
@@ -761,6 +826,15 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
+	if (!priv->gpll_hz) {
+		ret = px30_clk_get_gpll_rate(&priv->gpll_hz);
+		if (ret) {
+			printf("%s failed to get gpll rate\n", __func__);
+			return ret;
+		}
+		debug("%s gpll=%lu\n", __func__, priv->gpll_hz);
+	}
+
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
 	case 0 ... 15:
@@ -769,37 +843,37 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		ret = px30_mmc_set_clk(priv->cru, clk->id, rate);
+		ret = px30_mmc_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		ret = px30_i2c_set_clk(priv->cru, clk->id, rate);
+		ret = px30_i2c_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_PWM0:
 	case SCLK_PWM1:
-		ret = px30_pwm_set_clk(priv->cru, clk->id, rate);
+		ret = px30_pwm_set_clk(priv, clk->id, rate);
 		break;
 	case SCLK_SARADC:
-		ret = px30_saradc_set_clk(priv->cru, rate);
+		ret = px30_saradc_set_clk(priv, rate);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		ret = px30_spi_set_clk(priv->cru, clk->id, rate);
+		ret = px30_spi_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_VOPB:
 	case DCLK_VOPB:
-		ret = px30_vop_set_clk(priv->cru, clk->id, rate);
+		ret = px30_vop_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_BUS_PRE:
 	case HCLK_BUS_PRE:
 	case PCLK_BUS_PRE:
-		ret = px30_bus_set_clk(priv->cru, clk->id, rate);
+		ret = px30_bus_set_clk(priv, clk->id, rate);
 		break;
 	case ACLK_PERI_PRE:
 	case HCLK_PERI_PRE:
-		ret = px30_peri_set_clk(priv->cru, clk->id, rate);
+		ret = px30_peri_set_clk(priv, clk->id, rate);
 		break;
 	default:
 		return -ENOENT;
@@ -900,7 +974,7 @@ int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
 static int px30_clk_get_phase(struct clk *clk)
 {
 	int ret;
-
+	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC_SAMPLE:
@@ -917,6 +991,7 @@ static int px30_clk_set_phase(struct clk *clk, int degrees)
 {
 	int ret;
 
+	debug("%s %ld\n", __func__, clk->id);
 	switch (clk->id) {
 	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC_SAMPLE:
@@ -939,12 +1014,23 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
-	u32 reg = readl(&priv->cru->clksel_con[23]);
+	struct px30_cru *cru = priv->cru;
+	u32 aclk_div;
 
-	/* Only do the rkclk_init() one time for boot up */
-	if (((reg & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) !=
-	    (GPLL_HZ / BUS_ACLK_HZ - 1))
-		rkclk_init(priv->cru);
+	/* init pll */
+	rkclk_set_pll(&cru->pll[APLL], &cru->mode, APLL, APLL_HZ);
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+		     CORE_ACLK_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
 
 	return 0;
 }
@@ -1009,3 +1095,171 @@ U_BOOT_DRIVER(rockchip_px30_cru) = {
 	.bind		= px30_clk_bind,
 	.probe		= px30_clk_probe,
 };
+
+static ulong px30_pclk_pmu_get_pmuclk(struct px30_pmuclk_priv *priv)
+{
+	struct px30_pmucru *pmucru = priv->pmucru;
+	u32 div, con;
+
+	con = readl(&pmucru->pmu_clksel_con[0]);
+	div = (con & CLK_PMU_PCLK_DIV_MASK) >> CLK_PMU_PCLK_DIV_SHIFT;
+
+	return DIV_TO_RATE(priv->gpll_hz, div);
+}
+
+static ulong px30_pclk_pmu_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
+{
+	struct px30_pmucru *pmucru = priv->pmucru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->gpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	rk_clrsetreg(&pmucru->pmu_clksel_con[0],
+		     CLK_PMU_PCLK_DIV_MASK,
+		     (src_clk_div - 1) << CLK_PMU_PCLK_DIV_SHIFT);
+
+	return px30_pclk_pmu_get_pmuclk(priv);
+}
+
+static ulong px30_gpll_get_pmuclk(struct px30_pmuclk_priv *priv)
+{
+	struct px30_pmucru *pmucru = priv->pmucru;
+
+	return rkclk_pll_get_rate(&pmucru->pll, &pmucru->pmu_mode, GPLL);
+}
+
+static ulong px30_gpll_set_pmuclk(struct px30_pmuclk_priv *priv, ulong hz)
+{
+	struct udevice *cru_dev;
+	struct px30_clk_priv *cru_priv;
+	struct px30_pmucru *pmucru = priv->pmucru;
+	u32 div;
+	ulong emmc_rate, sdmmc_rate, nandc_rate;
+	int ret;
+
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+
+	ret = uclass_get_device_by_name(UCLASS_CLK,
+					"clock-controller@ff2b0000",
+					 &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+	cru_priv = dev_get_priv(cru_dev);
+	cru_priv->gpll_hz = priv->gpll_hz;
+
+	div = DIV_ROUND_UP(hz, priv->gpll_hz);
+
+	/*
+	 * avoid bus and peri clock rate too large, reduce rate first.
+	 * they will be assigned by clk_set_defaults.
+	 */
+	px30_bus_set_clk(cru_priv, ACLK_BUS_PRE,
+			 px30_bus_get_clk(cru_priv, ACLK_BUS_PRE) / div);
+	px30_bus_set_clk(cru_priv, HCLK_BUS_PRE,
+			 px30_bus_get_clk(cru_priv, HCLK_BUS_PRE) / div);
+	px30_bus_set_clk(cru_priv, PCLK_BUS_PRE,
+			 px30_bus_get_clk(cru_priv, PCLK_BUS_PRE) / div);
+	px30_peri_set_clk(cru_priv, ACLK_PERI_PRE,
+			  px30_bus_get_clk(cru_priv, ACLK_PERI_PRE) / div);
+	px30_peri_set_clk(cru_priv, HCLK_PERI_PRE,
+			  px30_bus_get_clk(cru_priv, HCLK_PERI_PRE) / div);
+	px30_pclk_pmu_set_pmuclk(priv, px30_pclk_pmu_get_pmuclk(priv) / div);
+
+	/*
+	 * save emmc, sdmmc and nandc clock rate,
+	 * nandc clock rate should less than or equal to 150Mhz.
+	 */
+	emmc_rate = px30_mmc_get_clk(cru_priv, SCLK_EMMC);
+	sdmmc_rate = px30_mmc_get_clk(cru_priv, SCLK_SDMMC);
+	nandc_rate = px30_nandc_get_clk(cru_priv);
+	debug("%s emmc=%lu, sdmmc=%lu, nandc=%lu\n", __func__, emmc_rate,
+	      sdmmc_rate, nandc_rate);
+
+	rkclk_set_pll(&pmucru->pll, &pmucru->pmu_mode, GPLL, hz);
+	priv->gpll_hz = px30_gpll_get_pmuclk(priv);
+	cru_priv->gpll_hz = priv->gpll_hz;
+
+	/* restore emmc, sdmmc and nandc clock rate */
+	px30_mmc_set_clk(cru_priv, SCLK_EMMC, emmc_rate);
+	px30_mmc_set_clk(cru_priv, SCLK_SDMMC, sdmmc_rate);
+	px30_nandc_set_clk(cru_priv, nandc_rate);
+
+	return priv->gpll_hz;
+}
+
+static ulong px30_pmuclk_get_rate(struct clk *clk)
+{
+	struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	debug("%s %ld\n", __func__, clk->id);
+	switch (clk->id) {
+	case PLL_GPLL:
+		rate = px30_gpll_get_pmuclk(priv);
+		break;
+	case PCLK_PMU_PRE:
+		rate = px30_pclk_pmu_get_pmuclk(priv);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate)
+{
+	struct px30_pmuclk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case PLL_GPLL:
+		ret = px30_gpll_set_pmuclk(priv, rate);
+		break;
+	case PCLK_PMU_PRE:
+		ret = px30_pclk_pmu_set_pmuclk(priv, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops px30_pmuclk_ops = {
+	.get_rate = px30_pmuclk_get_rate,
+	.set_rate = px30_pmuclk_set_rate,
+};
+
+static int px30_pmuclk_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static int px30_pmuclk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct px30_pmuclk_priv *priv = dev_get_priv(dev);
+
+	priv->pmucru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static const struct udevice_id px30_pmuclk_ids[] = {
+	{ .compatible = "rockchip,px30-pmucru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_px30_pmucru) = {
+	.name		= "rockchip_px30_pmucru",
+	.id		= UCLASS_CLK,
+	.of_match	= px30_pmuclk_ids,
+	.priv_auto_alloc_size = sizeof(struct px30_pmuclk_priv),
+	.ofdata_to_platdata = px30_pmuclk_ofdata_to_platdata,
+	.ops		= &px30_pmuclk_ops,
+	.probe		= px30_pmuclk_probe,
+};

commit 713d964649c9705b58cf31c8dd37844abe7862f9
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 15:08:18 2018 +0800

    core: device_bind_common: remove the same clk device
    
    With kernel dtb support, there are two dtbs and some devices may have
    the same driver and nanme, the api uclass_get_device_by_driver() and
    uclass_get_device_by_name() may get wrong value. In order to use cru
    node in kernel dtb, remove the same device whose node is in u-boot dtb.
    
    Change-Id: Id19eedb276731fa18b07bca51bbc203636f20c31
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index b68b277bd8..f754824c22 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -61,6 +61,16 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 			return 0;
 		}
 	}
+
+	/* use cru node from kernel dtb */
+	if (drv->id == UCLASS_CLK) {
+		struct udevice *n;
+
+		list_for_each_entry_safe(dev, n, &uc->dev_head, uclass_node) {
+			if (!strcmp(name, dev->name))
+				list_del(&dev->uclass_node);
+		}
+	}
 #endif
 	dev = calloc(1, sizeof(struct udevice));
 	if (!dev)

commit da7f6ae0bb45622df167141336514cf95d48fe26
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Jun 5 15:07:31 2018 +0800

    rockchip: dts: px30: enable pmucru in pre-reloc
    
    We will add a pmucru driver for handling some clocks, such as
    PLL_GPLL and PCLK_PMU.
    
    Change-Id: I8fb8979b02c4f3a7c4a6a4d6f20a5ed1bb11dd8d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 2e9ef97d26..865eb8fd94 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -38,6 +38,10 @@
 	u-boot,dm-pre-reloc;
 };
 
+&pmucru {
+	u-boot,dm-pre-reloc;
+};
+
 &gpio0 {
 	u-boot,dm-pre-reloc;
 	status = "disabled";

commit 7b1c1c4be3bdc441501dcfbfa08d53b38e777147
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Jun 7 11:34:32 2018 +0800

    clk: rockchip: rk3308: check pll rate before set and get rate
    
    As clk_set_defaults() is called before rk3308_clk_probe() and pll rate are
    assigned when clk probe at present, so if enable kernel dtb and it contains
    "assigned-clocks" property, the pll rate will be zero when set and get clk rate.
    In order to fix this, check and assign pll rate before set and get rate.
    
    Change-Id: Ic8e9fcf487e7531a8ef23f54d0786e0cbc9a9f4a
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3f5b59ff3f..de0f32459d 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -224,6 +224,16 @@ static uint32_t rkclk_pll_get_rate(struct rk3308_clk_priv *priv,
 	}
 }
 
+static void rk3308_clk_get_pll_rate(struct rk3308_clk_priv *priv)
+{
+	if (!priv->dpll_hz)
+		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
+	if (!priv->vpll0_hz)
+		priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
+	if (!priv->vpll1_hz)
+		priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+}
+
 static void rkclk_init(struct udevice *dev)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
@@ -250,9 +260,8 @@ static void rkclk_init(struct udevice *dev)
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 
-	priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
-	priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
-	priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+#ifndef CONFIG_USING_KERNEL_DTB
+	rk3308_clk_get_pll_rate(priv);
 
 	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
 	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
@@ -264,6 +273,7 @@ static void rkclk_init(struct udevice *dev)
 
 	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
 	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
+#endif
 }
 
 static ulong rk3308_i2c_get_clk(struct clk *clk)
@@ -536,13 +546,13 @@ static ulong rk3308_vop_get_clk(struct clk *clk)
 	} else if (vol_sel == DCLK_VOP_SEL_DIVOUT) {
 		switch (pll_sel) {
 		case DCLK_VOP_PLL_SEL_DPLL:
-			parent = rkclk_pll_get_rate(priv, DPLL);
+			parent = priv->dpll_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL0:
-			parent = rkclk_pll_get_rate(priv, VPLL0);
+			parent = priv->vpll0_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL1:
-			parent = rkclk_pll_get_rate(priv, VPLL1);
+			parent = priv->vpll0_hz;
 			break;
 		default:
 			printf("do not support this vop pll sel\n");
@@ -797,6 +807,8 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
+	rk3308_clk_get_pll_rate(priv);
+
 	debug("%s id:%ld\n", __func__, clk->id);
 
 	switch (clk->id) {
@@ -864,6 +876,8 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
+	rk3308_clk_get_pll_rate(priv);
+
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
 
 	switch (clk->id) {

commit 6399bf1d8a3df3386bed45a809b3b624d23cbb5a
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 21:13:10 2018 +0800

    clk: rockchip: rk3308: update dpll_hz if dpll rate is changed
    
    Change-Id: I133c4c19968de249902db005fea31648bb69a7fc
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 0a68eff080..3f5b59ff3f 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -869,6 +869,7 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case PLL_DPLL:
 		ret = rkclk_set_pll(priv, DPLL, rate);
+		priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
 		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:

commit 4e6d575238b8a995b4561fd5dc049fe8abf0bc37
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 21:17:46 2018 +0800

    clk: rockchip: rk3308: Fix divisor for i2c, saradc, pwm and spi
    
    Some divisor calculations were misrounded, causing higher than
    requested rates on some clocks. Fix them up using DIV_ROUND_UP.
    
    Change-Id: Ie90598d94e9a8dcde9c68ec9986ea200293c2d5b
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index c1480c4ea2..0a68eff080 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -302,7 +302,7 @@ static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = priv->dpll_hz / hz;
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk->id) {
@@ -422,7 +422,7 @@ static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = OSC_HZ / hz;
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz);
 	assert(src_clk_div - 1 < 2047);
 
 	rk_clrsetreg(&cru->clksel_con[34],
@@ -465,7 +465,7 @@ static ulong rk3308_spi_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = priv->dpll_hz / hz;
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	switch (clk->id) {
@@ -509,7 +509,7 @@ static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz)
 	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = priv->dpll_hz / hz;
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
 	assert(src_clk_div - 1 < 127);
 
 	rk_clrsetreg(&cru->clksel_con[29],

commit e8ca712810504151eec022d6044dccf769893622
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Jun 6 21:08:51 2018 +0800

    clk: rockchip: Fix clk name of PLL_DPLL
    
    Change-Id: Id2d9e91917a8011d150f499bfc91eae02e5a0642
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 0ed825d93b..c1480c4ea2 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -66,7 +66,7 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 
 static const struct rk3308_clk_info clks_dump[] = {
 	RK3308_CLK_DUMP(PLL_APLL, "apll"),
-	RK3308_CLK_DUMP(PLL_DPLL, "gpll"),
+	RK3308_CLK_DUMP(PLL_DPLL, "dpll"),
 	RK3308_CLK_DUMP(PLL_VPLL0, "vpll0"),
 	RK3308_CLK_DUMP(PLL_VPLL1, "vpll1"),
 	RK3308_CLK_DUMP(ACLK_BUS, "aclk_bus"),

commit 471ba803ddc2fe83bb1961dd5140df22fd798603
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Jun 7 08:50:14 2018 +0800

    usb: phy: fixed otg-phy init error for rk3288 platform
    
    The defect was introduced when clean up platform board file in commit
    fc98393 (rockchip: rk3288: use common board file). This change padded
    USB otg-phy private data before otg-phy init to fix it.
    
    Change-Id: I3188a3d04c4ba04435fa279668fc69bac847ba89
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index 1958478d62..720014a6ce 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -5,8 +5,11 @@
  */
 
 #include <common.h>
+#include <asm/arch/clock.h>
 #include <asm/io.h>
+#include <fdtdec.h>
 #include <libfdt.h>
+#include <syscon.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
 
@@ -62,6 +65,55 @@ static void property_enable(struct dwc2_plat_otg_data *pdata,
 	writel(val, pdata->regs_phy + reg->offset);
 }
 
+static int otg_phy_parse(struct dwc2_udc *dev)
+{
+	int node, phy_node;
+	u32 grf_base, grf_offset;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+	struct dwc2_plat_otg_data *pdata = dev->pdata;
+
+	/* Find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2");
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node, "snps,dwc2");
+	}
+
+	if (!matched) {
+		pr_err("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+
+	/* Find the usb phy node */
+	node = fdtdec_lookup_phandle(blob, node, "phys");
+	if (node <= 0) {
+		pr_err("Not found usbphy device\n");
+		return -ENODEV;
+	}
+
+	/* Find the usb otg-phy node */
+	phy_node = fdt_parent_offset(blob, node);
+	if (phy_node <= 0) {
+		pr_err("Not found sub usbphy device\n");
+		return -ENODEV;
+	}
+
+	grf_base = (u32)syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	grf_offset = fdtdec_get_addr(blob, node, "reg");
+
+	/* Pad dwc2_plat_otg_data related to phy */
+	pdata->phy_of_node = phy_node;
+	pdata->regs_phy = grf_base + grf_offset;
+
+	return 0;
+}
 
 void otg_phy_init(struct dwc2_udc *dev)
 {
@@ -70,6 +122,11 @@ void otg_phy_init(struct dwc2_udc *dev)
 	struct rockchip_usb2_phy_dt_id *of_id;
 	int i;
 
+	if (!pdata->regs_phy && otg_phy_parse(dev)) {
+		pr_err("otg-phy parse error\n");
+		return;
+	}
+
 	for (i = 0; i < ARRAY_SIZE(rockchip_usb2_phy_dt_ids); i++) {
 		of_id = &rockchip_usb2_phy_dt_ids[i];
 		if (fdt_node_check_compatible(gd->fdt_blob, pdata->phy_of_node,
@@ -100,6 +157,11 @@ void otg_phy_off(struct dwc2_udc *dev)
 	struct dwc2_plat_otg_data *pdata = dev->pdata;
 	struct rockchip_usb2_phy_cfg *phy_cfg = pdata->priv;
 
+	if (!pdata->regs_phy && otg_phy_parse(dev)) {
+		pr_err("otg-phy parse error\n");
+		return;
+	}
+
 	/* enable software control */
 	property_enable(pdata, &phy_cfg->soft_con, true);
 	/* enter suspend */

commit fb90bd1d33cd8b3820ac6bb6cb948ba116ae89c5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 11 16:46:55 2018 +0800

    make.sh: clean up code
    
    Change-Id: If6379bc4c9c5b177f4997791324ad2665fcb6b11
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index bb062a9310..9eee27c9d5 100755
--- a/make.sh
+++ b/make.sh
@@ -5,29 +5,32 @@ SUBCMD=$2
 RKCHIP=${BOARD##*-}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
-SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
+SUPPROT_LIST=`ls configs/*-[r,p][x,v,k][0-9][0-9]*_defconfig`
 
-# Declare global default output dir and cmd, update in prepare()
-OUTDIR=.
-OUTOPT=
-
-# Declare global rkbin tools and rkbin Responsity path, updated in prepare()
-TOOLCHAIN_RKBIN=./
-RKBIN=./
-# RKTOOL path
+########################################### User can modify #############################################
+# User's rkbin tool relative path
 RKBIN_TOOLS=../rkbin/tools
 
-# Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
-TOOLCHAIN_GCC=./
-TOOLCHAIN_OBJDUMP=./
-# GCC toolchain
+# User's GCC toolchain and relative path
+OBJ_ARM32=arm-linux-gnueabihf-objdump
+OBJ_ARM64=aarch64-linux-gnu-objdump
 GCC_ARM32=arm-linux-gnueabihf-
 GCC_ARM64=aarch64-linux-gnu-
 TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
-# OBJDMP
-OBJ_ARM32=arm-linux-gnueabihf-objdump
-OBJ_ARM64=aarch64-linux-gnu-objdump
+
+########################################### User not touch #############################################
+# Declare global rkbin RKTOOLS and rkbin repository path, updated in prepare()
+RKTOOLS=
+RKBIN=
+
+# Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
+TOOLCHAIN_GCC=
+TOOLCHAIN_OBJDUMP=
+
+# Declare global default output dir and cmd, update in prepare()
+OUTDIR=
+OUTOPT=
 
 # Declare global plaform configure, updated in fixup_platform_configure()
 PLATFORM_RSA=
@@ -35,12 +38,13 @@ PLATFORM_SHA=
 PLATFORM_UBOOT_IMG_SIZE=
 PLATFORM_TRUST_IMG_SIZE=
 PLATFORM_AARCH32=
+#########################################################################################################
 
 prepare()
 {
 	local absolute_path cmd
 
-	# Check invaid args and help
+	# Check invalid args and help
 	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
 		echo
 		echo "Usage: ./make.sh [board]"
@@ -52,24 +56,24 @@ prepare()
 		echo "Can't find: configs/${BOARD}_defconfig"
 		echo
 		echo "*************** Support list ***************"
-		echo "$SUPPROT_LIST"
+		echo "${SUPPROT_LIST}"
 		echo "********************************************"
 		echo
 		exit 1
 	fi
 
-	# Initialize RKBIN and TOOLCHAIN_RKBIN
+	# Initialize RKBIN and RKTOOLS
 	if [ -d ${RKBIN_TOOLS} ]; then
 		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
 		RKBIN=${absolute_path}
-		TOOLCHAIN_RKBIN=${absolute_path}/tools
+		RKTOOLS=${absolute_path}/tools
 	else
 		echo
-		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
+		echo "Can't find '../rkbin/' repository, please download it before pack image!"
 		echo "How to obtain? 3 ways:"
-		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
-		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
-		echo "	3. Download full release SDK Responsity"
+		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" repository"
+		echo "	2. Github repository: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK repository"
 		exit 1
 	fi
 
@@ -78,6 +82,8 @@ prepare()
 	if [ "${cmd}" = 'O' ]; then
 		OUTDIR=${SUBCMD#*=}
 		OUTOPT=O=${OUTDIR}
+	else
+		OUTDIR=.
 	fi
 }
 
@@ -108,6 +114,12 @@ select_toolchain()
 	echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
+# Support subcmd:
+#	./make.sh evb-rk3288 elf	--- dump elf file with -D(default)
+#	./make.sh evb-rk3288 elf-S	--- dump elf file with -S
+#	./make.sh evb-rk3288 trust	--- pack trust.img without compile u-boot
+#	./make.sh evb-rk3288 loader	--- pack loader bin without compile u-boot
+#	./make.sh evb-rk3288 uboot	--- pack uboot.img without compile u-boot
 sub_commands()
 {
 	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
@@ -131,9 +143,17 @@ sub_commands()
 	elif [ "$SUBCMD" = 'loader' ]; then
 		pack_loader_image
 		exit 0
+	elif [ "$SUBCMD" = 'uboot' ]; then
+		pack_uboot_image
+		exit 0
 	fi
 }
 
+# Support platform special configure
+#	1. fixup chip name;
+#	2. fixup pack mode;
+#	3. fixup image size
+#	4. fixup ARM64 cpu boot with AArch32
 fixup_platform_configure()
 {
 # <1> Fixup chip name for searching trust/loader ini files
@@ -175,8 +195,9 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
+	${RKTOOLS}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
+	# Delete u-boot.img and u-boot-dtb.img, which makes users not be confused with final uboot.img
 	if [ -f ${OUTDIR}/u-boot.img ]; then
 		rm ${OUTDIR}/u-boot.img
 	fi
@@ -196,9 +217,8 @@ pack_loader_image()
 	fi
 
 	cd ${RKBIN}
-	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
-	cd -
-	mv ${RKBIN}/*_loader_*.bin ./
+	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	cd - && mv ${RKBIN}/*_loader_*.bin ./
 	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
@@ -214,10 +234,9 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${TOOLCHAIN_RKBIN}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
+		${RKTOOLS}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
 
-		cd -
-		mv ${RKBIN}/trust.img ./trust.img
+		cd - && mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
@@ -242,14 +261,14 @@ pack_trust_image()
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
 		if [ $TOS_TA -a $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "Both trust.img and trust_with_ta.img are ready"
 		elif [ $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img is ready"
 		elif [ $TOS_TA ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img with ta is ready"
 		else
 			echo "Can't find any tee bin"

commit 41cf5e5a16714dd40c62cf9540d4f27009cb5a77
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 11 16:11:39 2018 +0800

    make.sh: clean up platform fixup configures
    
    1. move all platform fixup together in fixup_platform_configure();
    2. Support rk3308 build trust.img/uboot.img AArch32 1MB and AArch64 2MB.
    
    Change-Id: I02cf51bc8e01317caee0d6de157d832ef133ab4c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 2490260123..bb062a9310 100755
--- a/make.sh
+++ b/make.sh
@@ -29,6 +29,13 @@ TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_
 OBJ_ARM32=arm-linux-gnueabihf-objdump
 OBJ_ARM64=aarch64-linux-gnu-objdump
 
+# Declare global plaform configure, updated in fixup_platform_configure()
+PLATFORM_RSA=
+PLATFORM_SHA=
+PLATFORM_UBOOT_IMG_SIZE=
+PLATFORM_TRUST_IMG_SIZE=
+PLATFORM_AARCH32=
+
 prepare()
 {
 	local absolute_path cmd
@@ -127,11 +134,40 @@ sub_commands()
 	fi
 }
 
-fixup_chip_name()
+fixup_platform_configure()
 {
+# <1> Fixup chip name for searching trust/loader ini files
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
 		RKCHIP=RK322X
 	fi
+
+# <2> Fixup rsa/sha pack mode for platforms
+	# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
+	if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+		PLATFORM_RSA="--rsa 3"
+	# RK3368 use rk big endian SHA256, it's pack magic is "2"
+	elif [ $RKCHIP = "RK3368" ]; then
+		PLATFORM_SHA="--sha 2"
+	# other platforms use default configure
+	fi
+
+# <3> Fixup images size pack for platforms
+	if [ $RKCHIP = "RK3308" ]; then
+		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+			PLATFORM_UBOOT_IMG_SIZE="--size 512 2"
+			PLATFORM_TRUST_IMG_SIZE="--size 512 2"
+		else
+			PLATFORM_UBOOT_IMG_SIZE="--size 1024 2"
+			PLATFORM_TRUST_IMG_SIZE="--size 1024 2"
+		fi
+	fi
+
+# <4> Fixup PLATFORM_AARCH32 for ARM64 cpu platforms
+	if [ $RKCHIP = "RK3308" ]; then
+		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+			PLATFORM_AARCH32="AARCH32"
+		fi
+	fi
 }
 
 pack_uboot_image()
@@ -139,7 +175,7 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR} ${PLATFORM_UBOOT_IMG_SIZE}
 
 	if [ -f ${OUTDIR}/u-boot.img ]; then
 		rm ${OUTDIR}/u-boot.img
@@ -168,34 +204,21 @@ pack_loader_image()
 
 pack_trust_image()
 {
-	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000 AARCH32
+	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
-		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
-			AARCH32=AARCH32
-		fi
-
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
-
-		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
-		# RK3368 use rk big endian SHA256, it's pack magic is "2"
-		elif [ $RKCHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
-		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
-		fi
+		${TOOLCHAIN_RKBIN}/trust_merger ${PLATFORM_SHA} ${PLATFORM_RSA} ${PLATFORM_TRUST_IMG_SIZE} --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${PLATFORM_AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
@@ -219,14 +242,14 @@ pack_trust_image()
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
 		if [ $TOS_TA -a $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "Both trust.img and trust_with_ta.img are ready"
 		elif [ $TOS ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img is ready"
 		elif [ $TOS_TA ]; then
-			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR} ${PLATFORM_TRUST_IMG_SIZE}
 			echo "trust.img with ta is ready"
 		else
 			echo "Can't find any tee bin"
@@ -241,7 +264,7 @@ prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig ${OUTOPT}
 select_toolchain
-fixup_chip_name
+fixup_platform_configure
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
 pack_uboot_image

commit a64486b5426a52b10c3c8d4f9b24fbb06fb1322d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jun 11 14:48:20 2018 +0800

    Revert "make.sh: support rk312x trust.img pack"
    
    This reverts commit b45ec7ccd833efcd005fe4a9630a532d0341cf65.
    
    Due to commit d77daa4 in rkbin project, which supports muitiple filesystem,
    so we don't need this patch any more.
    
    Change-Id: I73fab6f865a8428c9ecf41406fd5bbeffe6920cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d6f1c41ae9..2490260123 100755
--- a/make.sh
+++ b/make.sh
@@ -166,47 +166,6 @@ pack_loader_image()
 	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
-pack_mass_trust_image()
-{
-	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
-
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-
-# OP-TEE is 132M(0x8400000) offset from DRAM base.
-	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
-	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
-
-# Convert Dec to Hex
-	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
-
-# Parse orignal path
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-
-# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
-	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
-	TOS1=$(echo ${TOS1} | sed "s/tools\/rk_tools\//\.\//g")
-
-	if [ "$TOS0" ]; then
-		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS0} ./${IMG0} ${TEE_LOAD_ADDR}
-		echo "${IMG0} is ready"
-	fi
-
-	if [ "$TOS1" ]; then
-		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS1} ./${IMG1} ${TEE_LOAD_ADDR}
-		echo "${IMG1} is ready"
-	fi
-
-	if [ -z "$TOS0" -a -z "$TOS1" ]; then
-		echo "pack trust failed! Can't find any tee bin"
-	fi
-}
-
 pack_trust_image()
 {
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000 AARCH32
@@ -259,7 +218,7 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ "$TOS_TA" -a "$TOS" ]; then
+		if [ $TOS_TA -a $TOS ]; then
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
 			echo "Both trust.img and trust_with_ta.img are ready"
@@ -270,8 +229,8 @@ pack_trust_image()
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img with ta is ready"
 		else
-			# Only RK312X need it to pack trust_emmc.img trust_nand.img
-			pack_mass_trust_image
+			echo "Can't find any tee bin"
+			exit 1
 		fi
 
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"

commit c563adc74ed429641f937ead6730be016f4b56ad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 7 12:01:09 2018 +0800

    rockchip: add interrupt debugger to dump pt_regs
    
    We install a timer interrupt and dump pt_regs when
    the timeout event trigger. This help us to know cpu
    state when system hang.
    
    Change-Id: I91aa2322036ae83ac8b9cd299bef9b521995d85b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 4501d4d6b3..839c2b18f6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -424,6 +424,14 @@ config ROCKCHIP_SMCCC
 	help
 	  This enable support for Rockchip SMC calls
 
+config ROCKCHIP_DEBUGGER
+	bool "Rockchip debugger"
+	depends on IRQ
+	help
+	  This enable support for Rockchip debugger. Now we install a timer interrupt
+	  and dump pt_regs when the timeout event trigger. This helps us to know cpu
+	  state when system hang.
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index de4faf2fa9..1cc2cc35e7 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
+obj-$(CONFIG_ROCKCHIP_DEBUGGER) += rockchip_debugger.o
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index beb476a0c1..e4ed09dabe 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -25,6 +25,9 @@
 #ifdef CONFIG_DRM_ROCKCHIP
 #include <video_rockchip.h>
 #endif
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+#include <rockchip_debugger.h>
+#endif
 #include <mmc.h>
 #include <of_live.h>
 #include <dm/root.h>
@@ -234,6 +237,16 @@ int board_init(void)
 	return rk_board_init();
 }
 
+int interrupt_debugger_init(void)
+{
+	int ret = 0;
+
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+	ret = rockchip_debugger_init();
+#endif
+	return ret;
+}
+
 int board_fdt_fixup(void *blob)
 {
 	__maybe_unused int ret = 0;
diff --git a/arch/arm/mach-rockchip/rockchip_debugger.c b/arch/arm/mach-rockchip/rockchip_debugger.c
new file mode 100644
index 0000000000..f9c0b1a95e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_debugger.c
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <irq-generic.h>
+#include <rk_timer_irq.h>
+
+/*
+ * Currently, we support a timer timeout to generate a IRQ to dump cpu context.
+ */
+#define ROCKCHIP_DEBUGGER_TIMEOUT	5	/* seconds */
+
+static void rockchip_debugger_isr(int irq, void *data)
+{
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+}
+
+int rockchip_debugger_init(void)
+{
+	uint32_t load_count0, load_count1;
+	uint64_t delay_c = ROCKCHIP_DEBUGGER_TIMEOUT * COUNTER_FREQUENCY;
+
+	if (!delay_c)
+		return 0;
+
+	printf("Enable rockchip debugger\n");
+
+	/* Disable first */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
+	load_count0 = (uint32_t)(delay_c);
+	load_count1 = (uint32_t)(delay_c >> 32);
+	writel(load_count0, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel(load_count1, TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* Request irq */
+	irq_install_handler(TIMER_IRQ, rockchip_debugger_isr, NULL);
+	irq_handler_enable(TIMER_IRQ);
+
+	return 0;
+}
diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 593a122e74..9bf3d6411f 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -243,6 +243,11 @@ static int cpu_local_irq_disable(void)
 
 void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 {
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+	printf("\n>>> Rockchip Debugger:\n");
+	show_regs(pt_regs);
+#endif
+
 	_do_generic_irq_handler();
 }
 #else
@@ -272,6 +277,11 @@ static int cpu_local_irq_disable(void)
 
 void do_irq(struct pt_regs *pt_regs)
 {
+#ifdef CONFIG_ROCKCHIP_DEBUGGER
+	printf("\n>>> Rockchp Debugger:\n");
+	show_regs(pt_regs);
+#endif
+
 	_do_generic_irq_handler();
 }
 #endif
diff --git a/include/rockchip_debugger.h b/include/rockchip_debugger.h
new file mode 100644
index 0000000000..c64f98e719
--- /dev/null
+++ b/include/rockchip_debugger.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_DEBUGGER_H_
+#define _ROCKCHIP_DEBUGGER_H_
+
+int rockchip_debugger_init(void);
+
+#endif

commit 7f571427efa668c12c58532f754dbd5869e3087f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 7 11:57:26 2018 +0800

    board_r: add interrupt_debugger_init()
    
    provide for platforms to override as early as possible since
    interrupt is ready.
    
    Change-Id: I803620b71c3f1559e79074c03bee36a84f1ebc1c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 6c4256a723..e8ca37294e 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -652,6 +652,11 @@ static int initr_kbd(void)
 }
 #endif
 
+__weak int interrupt_debugger_init(void)
+{
+	return 0;
+}
+
 static int run_main_loop(void)
 {
 #ifdef CONFIG_SANDBOX
@@ -703,6 +708,7 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_ARM
 	initr_enable_interrupts,
 #endif
+	interrupt_debugger_init,
 
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,

commit ab608f806ee1d7fa63a18cc035e8ea62b67634e5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 16:52:48 2018 +0800

    lib: avb: update avb source code
    
    according to google lib avb
    commit id: 44e07124afb1f46af0d745d83481f49c482900b1
    
    Change-Id: Ie59a7265699e3e6b1673bb64da6d1c7a1e7b6201
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_ab_ops.h b/include/android_avb/avb_ab_ops.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_atx_ops.h b/include/android_avb/avb_atx_ops.h
old mode 100644
new mode 100755
index 726dd6a8a1..a7da29a7dd
--- a/include/android_avb/avb_atx_ops.h
+++ b/include/android_avb/avb_atx_ops.h
@@ -68,6 +68,15 @@ struct AvbAtxOps {
   void (*set_key_version)(AvbAtxOps* atx_ops,
                           size_t rollback_index_location,
                           uint64_t key_version);
+
+  /* Generates |num_bytes| random bytes and stores them in |output|,
+   * which must point to a buffer large enough to store the bytes.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_random)(AvbAtxOps* atx_ops,
+                            size_t num_bytes,
+                            uint8_t* output);
 };
 
 #ifdef __cplusplus
diff --git a/include/android_avb/avb_atx_types.h b/include/android_avb/avb_atx_types.h
old mode 100644
new mode 100755
index 9b1c36a3c3..6985ac0be8
--- a/include/android_avb/avb_atx_types.h
+++ b/include/android_avb/avb_atx_types.h
@@ -41,6 +41,9 @@ extern "C" {
 /* Size in bytes of an Android Things product ID. */
 #define AVB_ATX_PRODUCT_ID_SIZE 16
 
+/* Size in bytes of an Android Things unlock challenge. */
+#define AVB_ATX_UNLOCK_CHALLENGE_SIZE 16
+
 /* Size in bytes of a serialized public key with a 4096-bit modulus. */
 #define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
 
@@ -73,6 +76,21 @@ typedef struct AvbAtxPublicKeyMetadata {
   AvbAtxCertificate product_signing_key_certificate;
 } AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
 
+/* Data structure of an Android Things unlock challenge. */
+typedef struct AvbAtxUnlockChallenge {
+  uint32_t version;
+  uint8_t product_id_hash[AVB_SHA256_DIGEST_SIZE];
+  uint8_t challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
+} AVB_ATTR_PACKED AvbAtxUnlockChallenge;
+
+/* Data structure of an Android Things unlock credential. */
+typedef struct AvbAtxUnlockCredential {
+  uint32_t version;
+  AvbAtxCertificate product_intermediate_key_certificate;
+  AvbAtxCertificate product_unlock_key_certificate;
+  uint8_t challenge_signature[AVB_RSA4096_NUM_BYTES];
+} AVB_ATTR_PACKED AvbAtxUnlockCredential;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
old mode 100644
new mode 100755
index 9989bb1ddb..8f784cd466
--- a/include/android_avb/avb_atx_validate.h
+++ b/include/android_avb/avb_atx_validate.h
@@ -72,6 +72,20 @@ AvbIOResult avb_atx_validate_vbmeta_public_key(
     size_t public_key_metadata_length,
     bool* out_is_trusted);
 
+/* Generates a challenge which can be used to create an unlock credential. */
+AvbIOResult avb_atx_generate_unlock_challenge(
+    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge);
+
+/* Validates an unlock credential. The certificate validation is very similar to
+ * the validation of public key metadata except in place of the PSK is a Product
+ * Unlock Key (PUK) and the certificate usage field identifies it as such. The
+ * challenge signature field is verified against this PUK.
+ */
+AvbIOResult avb_atx_validate_unlock_credential(
+    AvbAtxOps* atx_ops,
+    const AvbAtxUnlockCredential* unlock_credential,
+    bool* out_is_trusted);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/include/android_avb/avb_chain_partition_descriptor.h b/include/android_avb/avb_chain_partition_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_cmdline.h b/include/android_avb/avb_cmdline.h
old mode 100644
new mode 100755
index 717381a3f4..8e5caf61b0
--- a/include/android_avb/avb_cmdline.h
+++ b/include/android_avb/avb_cmdline.h
@@ -45,12 +45,24 @@
  */
 #define AVB_PART_NAME_MAX_SIZE 32
 
+#define AVB_MAX_NUM_CMDLINE_SUBST 10
+
+/* Holds information about command-line substitutions. */
+typedef struct AvbCmdlineSubstList {
+  size_t size;
+  char* tokens[AVB_MAX_NUM_CMDLINE_SUBST];
+  char* values[AVB_MAX_NUM_CMDLINE_SUBST];
+} AvbCmdlineSubstList;
+
 /* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
  * values. Returns NULL on OOM, otherwise the cmdline with values
  * replaced.
  */
-char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
-                      bool using_boot_for_vbmeta);
+char* avb_sub_cmdline(AvbOps* ops,
+                      const char* cmdline,
+                      const char* ab_suffix,
+                      bool using_boot_for_vbmeta,
+                      const AvbCmdlineSubstList* additional_substitutions);
 
 AvbSlotVerifyResult avb_append_options(
     AvbOps* ops,
@@ -59,4 +71,24 @@ AvbSlotVerifyResult avb_append_options(
     AvbAlgorithmType algorithm_type,
     AvbHashtreeErrorMode hashtree_error_mode);
 
+/* Allocates and initializes a new command line substitution list. Free with
+ * |avb_free_cmdline_subst_list|.
+ */
+AvbCmdlineSubstList* avb_new_cmdline_subst_list(void);
+
+/* Use this instead of |avb_free| to deallocate a AvbCmdlineSubstList. */
+void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst);
+
+/* Adds a hashtree root digest to be substituted in $(AVB_*_ROOT_DIGEST)
+ * variables. The partition name differentiates the variable. For example, if
+ * |part_name| is "foo" then $(AVB_FOO_ROOT_DIGEST) will be substituted with the
+ * hex encoding of the digest. The substitution will be added to
+ * |out_cmdline_subst|. Returns AVB_SLOT_VERIFY_RESULT_OK on success.
+ */
+AvbSlotVerifyResult avb_add_root_digest_substitution(
+    const char* part_name,
+    const uint8_t* digest,
+    size_t digest_size,
+    AvbCmdlineSubstList* out_cmdline_subst);
+
 #endif
diff --git a/include/android_avb/avb_crypto.h b/include/android_avb/avb_crypto.h
old mode 100644
new mode 100755
index b99a905d70..258a938093
--- a/include/android_avb/avb_crypto.h
+++ b/include/android_avb/avb_crypto.h
@@ -46,12 +46,21 @@ extern "C" {
 /* Size of a RSA-8192 signature. */
 #define AVB_RSA8192_NUM_BYTES 1024
 
+/* Size in bytes of a SHA-1 digest. */
+#define AVB_SHA1_DIGEST_SIZE 20
+
 /* Size in bytes of a SHA-256 digest. */
 #define AVB_SHA256_DIGEST_SIZE 32
 
 /* Size in bytes of a SHA-512 digest. */
 #define AVB_SHA512_DIGEST_SIZE 64
 
+/* Possible digest types supported by libavb routines. */
+typedef enum {
+  AVB_DIGEST_TYPE_SHA256,
+  AVB_DIGEST_TYPE_SHA512,
+} AvbDigestType;
+
 /* Algorithms that can be used in the vbmeta image for
  * verification. An algorithm consists of a hash type and a signature
  * type.
diff --git a/include/android_avb/avb_descriptor.h b/include/android_avb/avb_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_footer.h b/include/android_avb/avb_footer.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_hash_descriptor.h b/include/android_avb/avb_hash_descriptor.h
old mode 100644
new mode 100755
index ef3f27117a..633b2691de
--- a/include/android_avb/avb_hash_descriptor.h
+++ b/include/android_avb/avb_hash_descriptor.h
@@ -37,6 +37,16 @@
 extern "C" {
 #endif
 
+/* Flags for hash descriptors.
+ *
+ * AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB: Do not apply the default A/B
+ *   partition logic to this partition. This is intentionally a negative boolean
+ *   because A/B should be both the default and most used in practice.
+ */
+typedef enum {
+  AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB = (1 << 0),
+} AvbHashDescriptorFlags;
+
 /* A descriptor containing information about hash for an image.
  *
  * This descriptor is typically used for boot partitions to verify the
@@ -48,6 +58,10 @@ extern "C" {
  *
  * The |reserved| field is for future expansion and must be set to NUL
  * bytes.
+ *
+ * Changes in v1.1:
+ *   - flags field is added which supports AVB_HASH_DESCRIPTOR_FLAGS_USE_AB
+ *   - digest_len may be zero, which indicates the use of a persistent digest
  */
 typedef struct AvbHashDescriptor {
   AvbDescriptor parent_descriptor;
@@ -56,7 +70,8 @@ typedef struct AvbHashDescriptor {
   uint32_t partition_name_len;
   uint32_t salt_len;
   uint32_t digest_len;
-  uint8_t reserved[64];
+  uint32_t flags;
+  uint8_t reserved[60];
 } AVB_ATTR_PACKED AvbHashDescriptor;
 
 /* Copies |src| to |dest| and validates, byte-swapping fields in the
diff --git a/include/android_avb/avb_hashtree_descriptor.h b/include/android_avb/avb_hashtree_descriptor.h
old mode 100644
new mode 100755
index d579275e73..e447ebf8aa
--- a/include/android_avb/avb_hashtree_descriptor.h
+++ b/include/android_avb/avb_hashtree_descriptor.h
@@ -37,6 +37,16 @@
 extern "C" {
 #endif
 
+/* Flags for hashtree descriptors.
+ *
+ * AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB: Do not apply the default A/B
+ *   partition logic to this partition. This is intentionally a negative boolean
+ *   because A/B should be both the default and most used in practice.
+ */
+typedef enum {
+  AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB = (1 << 0),
+} AvbHashtreeDescriptorFlags;
+
 /* A descriptor containing information about a dm-verity hashtree.
  *
  * Hash-trees are used to verify large partitions typically containing
@@ -50,6 +60,10 @@ extern "C" {
  *
  * The |reserved| field is for future expansion and must be set to NUL
  * bytes.
+ *
+ * Changes in v1.1:
+ *   - flags field is added which supports AVB_HASHTREE_DESCRIPTOR_FLAGS_USE_AB
+ *   - digest_len may be zero, which indicates the use of a persistent digest
  */
 typedef struct AvbHashtreeDescriptor {
   AvbDescriptor parent_descriptor;
@@ -66,7 +80,8 @@ typedef struct AvbHashtreeDescriptor {
   uint32_t partition_name_len;
   uint32_t salt_len;
   uint32_t root_digest_len;
-  uint8_t reserved[64];
+  uint32_t flags;
+  uint8_t reserved[60];
 } AVB_ATTR_PACKED AvbHashtreeDescriptor;
 
 /* Copies |src| to |dest| and validates, byte-swapping fields in the
diff --git a/include/android_avb/avb_kernel_cmdline_descriptor.h b/include/android_avb/avb_kernel_cmdline_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
old mode 100644
new mode 100755
index 2a418454d4..f58f18cae8
--- a/include/android_avb/avb_ops.h
+++ b/include/android_avb/avb_ops.h
@@ -37,6 +37,9 @@
 extern "C" {
 #endif
 
+/* Well-known names of named persistent values. */
+#define AVB_NPV_PERSISTENT_DIGEST_PREFIX "avb.persistent_digest."
+
 /* Return codes used for I/O operations.
  *
  * AVB_IO_RESULT_OK is returned if the requested operation was
@@ -53,13 +56,25 @@ extern "C" {
  * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
  * range of bytes requested to be read or written is outside the range
  * of the partition.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE is returned if a named persistent value
+ * does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE is returned if a named persistent
+ * value size is not supported or does not match the expected size.
+ *
+ * AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned if a buffer is too small
+ * for the requested operation.
  */
 typedef enum {
   AVB_IO_RESULT_OK,
   AVB_IO_RESULT_ERROR_OOM,
   AVB_IO_RESULT_ERROR_IO,
   AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
-  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
+  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION,
+  AVB_IO_RESULT_ERROR_NO_SUCH_VALUE,
+  AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE,
+  AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE,
 } AvbIOResult;
 
 struct AvbOps;
@@ -247,6 +262,53 @@ struct AvbOps {
   AvbIOResult (*get_size_of_partition)(AvbOps* ops,
                                        const char* partition,
                                        uint64_t* out_size_num_bytes);
+
+  /* Reads a persistent value corresponding to the given |name|. The value is
+   * returned in |out_buffer| which must point to |buffer_size| bytes. On
+   * success |out_num_bytes_read| contains the number of bytes read into
+   * |out_buffer|. If AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE is returned,
+   * |out_num_bytes_read| contains the number of bytes that would have been read
+   * which can be used to allocate a buffer.
+   *
+   * The |buffer_size| may be zero and the |out_buffer| may be NULL, but if
+   * |out_buffer| is NULL then |buffer_size| *must* be zero.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   *
+   * If the value does not exist, is not supported, or is not populated, returns
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If |buffer_size| is smaller than the
+   * size of the stored value, returns AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE.
+   *
+   * This operation is currently only used to support persistent digests. If a
+   * device does not use persistent digests this function pointer can be set to
+   * NULL.
+   */
+  AvbIOResult (*read_persistent_value)(AvbOps* ops,
+                                       const char* name,
+                                       size_t buffer_size,
+                                       uint8_t* out_buffer,
+                                       size_t* out_num_bytes_read);
+
+  /* Writes a persistent value corresponding to the given |name|. The value is
+   * supplied in |value| which must point to |value_size| bytes. Any existing
+   * value with the same name is overwritten. If |value_size| is zero, future
+   * calls to |read_persistent_value| will return
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   *
+   * If the value |name| is not supported, returns
+   * AVB_IO_RESULT_ERROR_NO_SUCH_VALUE. If the |value_size| is not supported,
+   * returns AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE.
+   *
+   * This operation is currently only used to support persistent digests. If a
+   * device does not use persistent digests this function pointer can be set to
+   * NULL.
+   */
+  AvbIOResult (*write_persistent_value)(AvbOps* ops,
+                                        const char* name,
+                                        size_t value_size,
+                                        const uint8_t* value);
 };
 
 #ifdef __cplusplus
diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_property_descriptor.h b/include/android_avb/avb_property_descriptor.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_rsa.h b/include/android_avb/avb_rsa.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_slot_verify.h b/include/android_avb/avb_slot_verify.h
old mode 100644
new mode 100755
index 1b7932496c..8b40676a6b
--- a/include/android_avb/avb_slot_verify.h
+++ b/include/android_avb/avb_slot_verify.h
@@ -262,6 +262,15 @@ typedef struct {
   uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
 } AvbSlotVerifyData;
 
+/* Calculates a digest of all vbmeta images in |data| using
+ * the digest indicated by |digest_type|. Stores the result
+ * in |out_digest| which must be large enough to hold a digest
+ * of the requested type.
+ */
+void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
+                                                  AvbDigestType digest_type,
+                                                  uint8_t* out_digest);
+
 /* Frees a |AvbSlotVerifyData| including all data it points to. */
 void avb_slot_verify_data_free(AvbSlotVerifyData* data);
 
diff --git a/include/android_avb/avb_sysdeps.h b/include/android_avb/avb_sysdeps.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_user_verification.h b/include/android_avb/avb_user_verification.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_user_verity.h b/include/android_avb/avb_user_verity.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_util.h b/include/android_avb/avb_util.h
old mode 100644
new mode 100755
index d23c961e10..99e94d0ac7
--- a/include/android_avb/avb_util.h
+++ b/include/android_avb/avb_util.h
@@ -272,6 +272,16 @@ uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
  */
 const char* avb_basename(const char* str);
 
+/* Converts any ascii lowercase characters in |str| to uppercase in-place.
+ * |str| must be NUL-terminated and valid UTF-8.
+ */
+void avb_uppercase(char* str);
+
+/* Converts |data_len| bytes of |data| to hex and returns the result. Returns
+ * NULL on OOM. Caller must free the returned string with avb_free.
+ */
+char* avb_bin2hex(const uint8_t* data, size_t data_len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/include/android_avb/avb_vbmeta_image.h b/include/android_avb/avb_vbmeta_image.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/avb_version.h b/include/android_avb/avb_version.h
old mode 100644
new mode 100755
index 48e11705a9..9fa509ea45
--- a/include/android_avb/avb_version.h
+++ b/include/android_avb/avb_version.h
@@ -39,7 +39,7 @@ extern "C" {
 
 /* The version number of AVB - keep in sync with avbtool. */
 #define AVB_VERSION_MAJOR 1
-#define AVB_VERSION_MINOR 0
+#define AVB_VERSION_MINOR 1
 #define AVB_VERSION_SUB 0
 
 /* Returns a NUL-terminated string for the libavb version in use.  The
diff --git a/include/android_avb/libavb.h b/include/android_avb/libavb.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/libavb_ab.h b/include/android_avb/libavb_ab.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/libavb_atx.h b/include/android_avb/libavb_atx.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/libavb_user.h b/include/android_avb/libavb_user.h
old mode 100644
new mode 100755
diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/Kconfig b/lib/avb/libavb/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/Makefile b/lib/avb/libavb/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_chain_partition_descriptor.c b/lib/avb/libavb/avb_chain_partition_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_cmdline.c b/lib/avb/libavb/avb_cmdline.c
old mode 100644
new mode 100755
index ecf582ebd9..a4bb2edc34
--- a/lib/avb/libavb/avb_cmdline.c
+++ b/lib/avb/libavb/avb_cmdline.c
@@ -33,8 +33,11 @@
  * values. Returns NULL on OOM, otherwise the cmdline with values
  * replaced.
  */
-char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
-                      bool using_boot_for_vbmeta) {
+char* avb_sub_cmdline(AvbOps* ops,
+                      const char* cmdline,
+                      const char* ab_suffix,
+                      bool using_boot_for_vbmeta,
+                      const AvbCmdlineSubstList* additional_substitutions) {
   const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
   const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
                                         "$(ANDROID_BOOT_PARTUUID)",
@@ -68,7 +71,7 @@ char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
     io_ret = ops->get_unique_guid_for_partition(
         ops, part_name, guid_buf, sizeof guid_buf);
     if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-      return NULL;
+      goto fail;
     } else if (io_ret != AVB_IO_RESULT_OK) {
       avb_error("Error getting unique GUID for partition.\n");
       goto fail;
@@ -86,6 +89,22 @@ char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
     }
   }
 
+  avb_assert(ret != NULL);
+
+  /* Replace any additional substitutions. */
+  if (additional_substitutions != NULL) {
+    for (n = 0; n < additional_substitutions->size; ++n) {
+      char* new_ret = avb_replace(ret,
+                                  additional_substitutions->tokens[n],
+                                  additional_substitutions->values[n]);
+      avb_free(ret);
+      ret = new_ret;
+      if (ret == NULL) {
+        goto fail;
+      }
+    }
+  }
+
   return ret;
 
 fail:
@@ -186,22 +205,11 @@ static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
                               const char* key,
                               const uint8_t* data,
                               size_t data_len) {
-  char hex_digits[17] = "0123456789abcdef";
-  char* hex_data;
   int ret;
-  size_t n;
-
-  hex_data = avb_malloc(data_len * 2 + 1);
+  char* hex_data = avb_bin2hex(data, data_len);
   if (hex_data == NULL) {
     return 0;
   }
-
-  for (n = 0; n < data_len; n++) {
-    hex_data[n * 2] = hex_digits[data[n] >> 4];
-    hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
-  }
-  hex_data[n * 2] = '\0';
-
   ret = cmdline_append_option(slot_data, key, hex_data);
   avb_free(hex_data);
   return ret;
@@ -261,13 +269,11 @@ AvbSlotVerifyResult avb_append_options(
     case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
     case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
     case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
-      AvbSHA256Ctx ctx;
       size_t n, total_size = 0;
-      avb_sha256_init(&ctx);
+      uint8_t vbmeta_digest[AVB_SHA256_DIGEST_SIZE];
+      avb_slot_verify_data_calculate_vbmeta_digest(
+          slot_data, AVB_DIGEST_TYPE_SHA256, vbmeta_digest);
       for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha256_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
         total_size += slot_data->vbmeta_images[n].vbmeta_size;
       }
       if (!cmdline_append_option(
@@ -276,7 +282,7 @@ AvbSlotVerifyResult avb_append_options(
               slot_data, "androidboot.vbmeta.size", total_size) ||
           !cmdline_append_hex(slot_data,
                               "androidboot.vbmeta.digest",
-                              avb_sha256_final(&ctx),
+                              vbmeta_digest,
                               AVB_SHA256_DIGEST_SIZE)) {
         ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
         goto out;
@@ -286,13 +292,11 @@ AvbSlotVerifyResult avb_append_options(
     case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
     case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
     case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
-      AvbSHA512Ctx ctx;
       size_t n, total_size = 0;
-      avb_sha512_init(&ctx);
+      uint8_t vbmeta_digest[AVB_SHA512_DIGEST_SIZE];
+      avb_slot_verify_data_calculate_vbmeta_digest(
+          slot_data, AVB_DIGEST_TYPE_SHA512, vbmeta_digest);
       for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha512_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
         total_size += slot_data->vbmeta_images[n].vbmeta_size;
       }
       if (!cmdline_append_option(
@@ -301,7 +305,7 @@ AvbSlotVerifyResult avb_append_options(
               slot_data, "androidboot.vbmeta.size", total_size) ||
           !cmdline_append_hex(slot_data,
                               "androidboot.vbmeta.digest",
-                              avb_sha512_final(&ctx),
+                              vbmeta_digest,
                               AVB_SHA512_DIGEST_SIZE)) {
         ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
         goto out;
@@ -369,3 +373,68 @@ out:
   return ret;
 }
 
+AvbCmdlineSubstList* avb_new_cmdline_subst_list() {
+  return (AvbCmdlineSubstList*)avb_calloc(sizeof(AvbCmdlineSubstList));
+}
+
+void avb_free_cmdline_subst_list(AvbCmdlineSubstList* cmdline_subst) {
+  size_t i;
+  for (i = 0; i < cmdline_subst->size; ++i) {
+    avb_free(cmdline_subst->tokens[i]);
+    avb_free(cmdline_subst->values[i]);
+  }
+  cmdline_subst->size = 0;
+  avb_free(cmdline_subst);
+}
+
+AvbSlotVerifyResult avb_add_root_digest_substitution(
+    const char* part_name,
+    const uint8_t* digest,
+    size_t digest_size,
+    AvbCmdlineSubstList* out_cmdline_subst) {
+  const char* kDigestSubPrefix = "$(AVB_";
+  const char* kDigestSubSuffix = "_ROOT_DIGEST)";
+  size_t part_name_len = avb_strlen(part_name);
+  size_t list_index = out_cmdline_subst->size;
+
+  avb_assert(part_name_len < AVB_PART_NAME_MAX_SIZE);
+  avb_assert(digest_size <= AVB_SHA512_DIGEST_SIZE);
+  if (part_name_len >= AVB_PART_NAME_MAX_SIZE ||
+      digest_size > AVB_SHA512_DIGEST_SIZE) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  if (out_cmdline_subst->size >= AVB_MAX_NUM_CMDLINE_SUBST) {
+    /* The list is full. Currently dynamic growth of this list is not supported.
+     */
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  /* Construct the token to replace in the command line based on the partition
+   * name. For partition 'foo', this will be '$(AVB_FOO_ROOT_DIGEST)'.
+   */
+  out_cmdline_subst->tokens[list_index] =
+      avb_strdupv(kDigestSubPrefix, part_name, kDigestSubSuffix, NULL);
+  if (out_cmdline_subst->tokens[list_index] == NULL) {
+    goto fail;
+  }
+  avb_uppercase(out_cmdline_subst->tokens[list_index]);
+
+  /* The digest value is hex encoded when inserted in the command line. */
+  out_cmdline_subst->values[list_index] = avb_bin2hex(digest, digest_size);
+  if (out_cmdline_subst->values[list_index] == NULL) {
+    goto fail;
+  }
+
+  out_cmdline_subst->size++;
+  return AVB_SLOT_VERIFY_RESULT_OK;
+
+fail:
+  if (out_cmdline_subst->tokens[list_index]) {
+    avb_free(out_cmdline_subst->tokens[list_index]);
+  }
+  if (out_cmdline_subst->values[list_index]) {
+    avb_free(out_cmdline_subst->values[list_index]);
+  }
+  return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+}
diff --git a/lib/avb/libavb/avb_crc32.c b/lib/avb/libavb/avb_crc32.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_crypto.c b/lib/avb/libavb/avb_crypto.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_descriptor.c b/lib/avb/libavb/avb_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_footer.c b/lib/avb/libavb/avb_footer.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_hash_descriptor.c b/lib/avb/libavb/avb_hash_descriptor.c
old mode 100644
new mode 100755
index 294f3d648e..ef9921a20c
--- a/lib/avb/libavb/avb_hash_descriptor.c
+++ b/lib/avb/libavb/avb_hash_descriptor.c
@@ -44,6 +44,7 @@ bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
   dest->partition_name_len = avb_be32toh(dest->partition_name_len);
   dest->salt_len = avb_be32toh(dest->salt_len);
   dest->digest_len = avb_be32toh(dest->digest_len);
+  dest->flags = avb_be32toh(dest->flags);
 
   /* Check that partition_name, salt, and digest are fully contained. */
   expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
diff --git a/lib/avb/libavb/avb_hashtree_descriptor.c b/lib/avb/libavb/avb_hashtree_descriptor.c
old mode 100644
new mode 100755
index 0e95e8762d..19de1e3d70
--- a/lib/avb/libavb/avb_hashtree_descriptor.c
+++ b/lib/avb/libavb/avb_hashtree_descriptor.c
@@ -52,6 +52,7 @@ bool avb_hashtree_descriptor_validate_and_byteswap(
   dest->partition_name_len = avb_be32toh(dest->partition_name_len);
   dest->salt_len = avb_be32toh(dest->salt_len);
   dest->root_digest_len = avb_be32toh(dest->root_digest_len);
+  dest->flags = avb_be32toh(dest->flags);
 
   /* Check that partition_name, salt, and root_digest are fully contained. */
   expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
diff --git a/lib/avb/libavb/avb_kernel_cmdline_descriptor.c b/lib/avb/libavb/avb_kernel_cmdline_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_property_descriptor.c b/lib/avb/libavb/avb_property_descriptor.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_rsa.c b/lib/avb/libavb/avb_rsa.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_sha256.c b/lib/avb/libavb/avb_sha256.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_sha512.c b/lib/avb/libavb/avb_sha512.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
old mode 100644
new mode 100755
index 972fda0e9c..d6a843853f
--- a/lib/avb/libavb/avb_slot_verify.c
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -27,6 +27,7 @@
 #include <android_avb/avb_cmdline.h>
 #include <android_avb/avb_footer.h>
 #include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_hashtree_descriptor.h>
 #include <android_avb/avb_kernel_cmdline_descriptor.h>
 #include <android_avb/avb_sha.h>
 #include <android_avb/avb_util.h>
@@ -65,10 +66,11 @@ static inline bool result_should_continue(AvbSlotVerifyResult result) {
   return false;
 }
 
-static AvbSlotVerifyResult load_full_partition(
-    AvbOps* ops, const char* part_name,
-    uint64_t image_size, uint8_t** out_image_buf,
-    bool* out_image_preloaded) {
+static AvbSlotVerifyResult load_full_partition(AvbOps* ops,
+                                               const char* part_name,
+                                               uint64_t image_size,
+                                               uint8_t** out_image_buf,
+                                               bool* out_image_preloaded) {
   size_t part_num_read;
   AvbIOResult io_ret;
 
@@ -110,9 +112,12 @@ static AvbSlotVerifyResult load_full_partition(
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     }
 
-    io_ret = ops->read_from_partition(
-        ops, part_name, 0 /* offset */, image_size, *out_image_buf,
-        &part_num_read);
+    io_ret = ops->read_from_partition(ops,
+                                      part_name,
+                                      0 /* offset */,
+                                      image_size,
+                                      *out_image_buf,
+                                      &part_num_read);
     if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
       return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
     } else if (io_ret != AVB_IO_RESULT_OK) {
@@ -128,6 +133,47 @@ static AvbSlotVerifyResult load_full_partition(
   return AVB_SLOT_VERIFY_RESULT_OK;
 }
 
+static AvbSlotVerifyResult read_persistent_digest(AvbOps* ops,
+                                                  const char* part_name,
+                                                  size_t expected_digest_size,
+                                                  uint8_t* out_digest) {
+  char* persistent_value_name = NULL;
+  AvbIOResult io_ret = AVB_IO_RESULT_OK;
+  size_t stored_digest_size = 0;
+
+  if (ops->read_persistent_value == NULL) {
+    avb_errorv(part_name, ": Persistent values are not implemented.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+  persistent_value_name =
+      avb_strdupv(AVB_NPV_PERSISTENT_DIGEST_PREFIX, part_name, NULL);
+  if (persistent_value_name == NULL) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  }
+  io_ret = ops->read_persistent_value(ops,
+                                      persistent_value_name,
+                                      expected_digest_size,
+                                      out_digest,
+                                      &stored_digest_size);
+  avb_free(persistent_value_name);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+  } else if (io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_VALUE) {
+    avb_errorv(part_name, ": Persistent digest does not exist.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  } else if (io_ret == AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE ||
+             io_ret == AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE ||
+             expected_digest_size != stored_digest_size) {
+    avb_errorv(
+        part_name, ": Persistent digest is not of expected size.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_errorv(part_name, ": Error reading persistent digest.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+  }
+  return AVB_SLOT_VERIFY_RESULT_OK;
+}
+
 static AvbSlotVerifyResult load_and_verify_hash_partition(
     AvbOps* ops,
     const char* const* requested_partitions,
@@ -148,6 +194,9 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
   size_t digest_len;
   const char* found;
   uint64_t image_size = 0;
+  size_t expected_digest_len = 0;
+  uint8_t expected_digest_buf[AVB_SHA512_DIGEST_SIZE];
+  const uint8_t* expected_digest = NULL;
 
   if (!avb_hash_descriptor_validate_and_byteswap(
           (const AvbHashDescriptor*)descriptor, &hash_desc)) {
@@ -177,15 +226,35 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
     goto out;
   }
 
-  if (!avb_str_concat(part_name,
-                      sizeof part_name,
-                      (const char*)desc_partition_name,
-                      hash_desc.partition_name_len,
-                      ab_suffix,
-                      avb_strlen(ab_suffix))) {
-    avb_error("Partition name and suffix does not fit.\n");
+  if ((hash_desc.flags & AVB_HASH_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) != 0) {
+    /* No ab_suffix, just copy the partition name as is. */
+    if (hash_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
+      avb_error("Partition name does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+    avb_memcpy(part_name, desc_partition_name, hash_desc.partition_name_len);
+    part_name[hash_desc.partition_name_len] = '\0';
+  } else if (hash_desc.digest_len == 0 && avb_strlen(ab_suffix) != 0) {
+    /* No ab_suffix allowed for partitions without a digest in the descriptor
+     * because these partitions hold data unique to this device and are not
+     * updated using an A/B scheme.
+     */
+    avb_error("Cannot use A/B with a persistent digest.\n");
     ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
     goto out;
+  } else {
+    /* Add ab_suffix to the partition name. */
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        (const char*)desc_partition_name,
+                        hash_desc.partition_name_len,
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
   }
 
   /* If we're allowing verification errors then hash_desc.image_size
@@ -244,14 +313,31 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
     goto out;
   }
 
-  if (digest_len != hash_desc.digest_len) {
+  if (hash_desc.digest_len == 0) {
+    // Expect a match to a persistent digest.
+    avb_debugv(part_name, ": No digest, using persistent digest.\n", NULL);
+    expected_digest_len = digest_len;
+    expected_digest = expected_digest_buf;
+    avb_assert(expected_digest_len <= sizeof(expected_digest_buf));
+    ret =
+        read_persistent_digest(ops, part_name, digest_len, expected_digest_buf);
+    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      goto out;
+    }
+  } else {
+    // Expect a match to the digest in the descriptor.
+    expected_digest_len = hash_desc.digest_len;
+    expected_digest = desc_digest;
+  }
+
+  if (digest_len != expected_digest_len) {
     avb_errorv(
         part_name, ": Digest in descriptor not of expected size.\n", NULL);
     ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
     goto out;
   }
 
-  if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
+  if (avb_safe_memcmp(digest, expected_digest, digest_len) != 0) {
     avb_errorv(part_name,
                ": Hash of data does not match digest in descriptor.\n",
                NULL);
@@ -352,7 +438,7 @@ static AvbSlotVerifyResult load_requested_partitions(
       goto out;
     }
     loaded_partition->data_size = image_size;
-    loaded_partition->data = image_buf;  /* Transferring the owner. */
+    loaded_partition->data = image_buf; /* Transferring the owner. */
     loaded_partition->preloaded = image_preloaded;
     image_buf = NULL;
     image_preloaded = false;
@@ -382,7 +468,8 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
     const uint8_t* expected_public_key,
     size_t expected_public_key_length,
     AvbSlotVerifyData* slot_data,
-    AvbAlgorithmType* out_algorithm_type) {
+    AvbAlgorithmType* out_algorithm_type,
+    AvbCmdlineSubstList* out_additional_cmdline_subst) {
   char full_partition_name[AVB_PART_NAME_MAX_SIZE];
   AvbSlotVerifyResult ret;
   AvbIOResult io_ret;
@@ -518,7 +605,8 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
                                    NULL /* expected_public_key */,
                                    0 /* expected_public_key_length */,
                                    slot_data,
-                                   out_algorithm_type);
+                                   out_algorithm_type,
+                                   out_additional_cmdline_subst);
       goto out;
     } else {
       avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
@@ -714,7 +802,8 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
    *   checks that it matches what's in the hash descriptor.
    *
    * - hashtree descriptor: Do nothing since verification happens
-   *   on-the-fly from within the OS.
+   *   on-the-fly from within the OS. (Unless the descriptor uses a
+   *   persistent digest, in which case we need to find it).
    *
    * - chained partition descriptor: Load the footer, load the vbmeta
    *   image, verify vbmeta image (includes rollback checks, hash
@@ -785,18 +874,20 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
                                sizeof(AvbChainPartitionDescriptor);
         chain_public_key = chain_partition_name + chain_desc.partition_name_len;
 
-        sub_ret = load_and_verify_vbmeta(ops,
-                                         requested_partitions,
-                                         ab_suffix,
-                                         allow_verification_error,
-                                         toplevel_vbmeta_flags,
-                                         chain_desc.rollback_index_location,
-                                         (const char*)chain_partition_name,
-                                         chain_desc.partition_name_len,
-                                         chain_public_key,
-                                         chain_desc.public_key_len,
-                                         slot_data,
-                                         NULL /* out_algorithm_type */);
+        sub_ret =
+            load_and_verify_vbmeta(ops,
+                                   requested_partitions,
+                                   ab_suffix,
+                                   allow_verification_error,
+                                   toplevel_vbmeta_flags,
+                                   chain_desc.rollback_index_location,
+                                   (const char*)chain_partition_name,
+                                   chain_desc.partition_name_len,
+                                   chain_public_key,
+                                   chain_desc.public_key_len,
+                                   slot_data,
+                                   NULL, /* out_algorithm_type */
+                                   NULL /* out_additional_cmdline_subst */);
         if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
           ret = sub_ret;
           if (!result_should_continue(ret)) {
@@ -882,9 +973,90 @@ static AvbSlotVerifyResult load_and_verify_vbmeta(
         }
       } break;
 
-      /* Explicit fall-through */
+      case AVB_DESCRIPTOR_TAG_HASHTREE: {
+        AvbHashtreeDescriptor hashtree_desc;
+
+        if (!avb_hashtree_descriptor_validate_and_byteswap(
+                (AvbHashtreeDescriptor*)descriptors[n], &hashtree_desc)) {
+          avb_errorv(
+              full_partition_name, ": Hashtree descriptor is invalid.\n", NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        /* We only need to continue when there is no digest in the descriptor.
+         * This is because the only processing here is to find the digest and
+         * make it available on the kernel command line.
+         */
+        if (hashtree_desc.root_digest_len == 0) {
+          char part_name[AVB_PART_NAME_MAX_SIZE];
+          size_t digest_len = 0;
+          uint8_t digest_buf[AVB_SHA512_DIGEST_SIZE];
+          const uint8_t* desc_partition_name =
+              ((const uint8_t*)descriptors[n]) + sizeof(AvbHashtreeDescriptor);
+
+          if (!avb_validate_utf8(desc_partition_name,
+                                 hashtree_desc.partition_name_len)) {
+            avb_error("Partition name is not valid UTF-8.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+
+          /* No ab_suffix for partitions without a digest in the descriptor
+           * because these partitions hold data unique to this device and are
+           * not updated using an A/B scheme.
+           */
+          if ((hashtree_desc.flags &
+               AVB_HASHTREE_DESCRIPTOR_FLAGS_DO_NOT_USE_AB) == 0 &&
+              avb_strlen(ab_suffix) != 0) {
+            avb_error("Cannot use A/B with a persistent root digest.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+          if (hashtree_desc.partition_name_len >= AVB_PART_NAME_MAX_SIZE) {
+            avb_error("Partition name does not fit.\n");
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+          avb_memcpy(
+              part_name, desc_partition_name, hashtree_desc.partition_name_len);
+          part_name[hashtree_desc.partition_name_len] = '\0';
+
+          /* Determine the expected digest size from the hash algorithm. */
+          if (avb_strcmp((const char*)hashtree_desc.hash_algorithm, "sha1") ==
+              0) {
+            digest_len = AVB_SHA1_DIGEST_SIZE;
+          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
+                                "sha256") == 0) {
+            digest_len = AVB_SHA256_DIGEST_SIZE;
+          } else if (avb_strcmp((const char*)hashtree_desc.hash_algorithm,
+                                "sha512") == 0) {
+            digest_len = AVB_SHA512_DIGEST_SIZE;
+          } else {
+            avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+            ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+            goto out;
+          }
+
+          ret = read_persistent_digest(ops, part_name, digest_len, digest_buf);
+          if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+            goto out;
+          }
+
+          if (out_additional_cmdline_subst) {
+            ret =
+                avb_add_root_digest_substitution(part_name,
+                                                 digest_buf,
+                                                 digest_len,
+                                                 out_additional_cmdline_subst);
+            if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+              goto out;
+            }
+          }
+        }
+      } break;
+
       case AVB_DESCRIPTOR_TAG_PROPERTY:
-      case AVB_DESCRIPTOR_TAG_HASHTREE:
         /* Do nothing. */
         break;
     }
@@ -932,6 +1104,7 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
   AvbVBMetaImageHeader toplevel_vbmeta;
   bool allow_verification_error =
       (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+  AvbCmdlineSubstList* additional_cmdline_subst = NULL;
 
   /* Fail early if we're missing the AvbOps needed for slot verification.
    *
@@ -976,6 +1149,12 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
     goto fail;
   }
 
+  additional_cmdline_subst = avb_new_cmdline_subst_list();
+  if (additional_cmdline_subst == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+
   ret = load_and_verify_vbmeta(ops,
                                requested_partitions,
                                ab_suffix,
@@ -987,7 +1166,8 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
                                NULL /* expected_public_key */,
                                0 /* expected_public_key_length */,
                                slot_data,
-                               &algorithm_type);
+                               &algorithm_type,
+                               additional_cmdline_subst);
   if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
     goto fail;
   }
@@ -1032,9 +1212,11 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
       /* Add options - any failure in avb_append_options() is either an
        * I/O or OOM error.
        */
-      AvbSlotVerifyResult sub_ret = avb_append_options(
-          ops, slot_data, &toplevel_vbmeta, algorithm_type,
-          hashtree_error_mode);
+      AvbSlotVerifyResult sub_ret = avb_append_options(ops,
+                                                       slot_data,
+                                                       &toplevel_vbmeta,
+                                                       algorithm_type,
+                                                       hashtree_error_mode);
       if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
         ret = sub_ret;
         goto fail;
@@ -1044,8 +1226,11 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
     /* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
     if (slot_data->cmdline != NULL) {
       char* new_cmdline;
-      new_cmdline = avb_sub_cmdline(
-          ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
+      new_cmdline = avb_sub_cmdline(ops,
+                                    slot_data->cmdline,
+                                    ab_suffix,
+                                    using_boot_for_vbmeta,
+                                    additional_cmdline_subst);
       if (new_cmdline != slot_data->cmdline) {
         if (new_cmdline == NULL) {
           ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
@@ -1063,6 +1248,9 @@ AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
     }
   }
 
+  avb_free_cmdline_subst_list(additional_cmdline_subst);
+  additional_cmdline_subst = NULL;
+
   if (!allow_verification_error) {
     avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
   }
@@ -1073,6 +1261,9 @@ fail:
   if (slot_data != NULL) {
     avb_slot_verify_data_free(slot_data);
   }
+  if (additional_cmdline_subst != NULL) {
+    avb_free_cmdline_subst_list(additional_cmdline_subst);
+  }
   return ret;
 }
 
@@ -1153,3 +1344,42 @@ const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result) {
 
   return ret;
 }
+
+void avb_slot_verify_data_calculate_vbmeta_digest(AvbSlotVerifyData* data,
+                                                  AvbDigestType digest_type,
+                                                  uint8_t* out_digest) {
+  bool ret = false;
+  size_t n;
+
+  switch (digest_type) {
+    case AVB_DIGEST_TYPE_SHA256: {
+      AvbSHA256Ctx ctx;
+      avb_sha256_init(&ctx);
+      for (n = 0; n < data->num_vbmeta_images; n++) {
+        avb_sha256_update(&ctx,
+                          data->vbmeta_images[n].vbmeta_data,
+                          data->vbmeta_images[n].vbmeta_size);
+      }
+      avb_memcpy(out_digest, avb_sha256_final(&ctx), AVB_SHA256_DIGEST_SIZE);
+      ret = true;
+    } break;
+
+    case AVB_DIGEST_TYPE_SHA512: {
+      AvbSHA512Ctx ctx;
+      avb_sha512_init(&ctx);
+      for (n = 0; n < data->num_vbmeta_images; n++) {
+        avb_sha512_update(&ctx,
+                          data->vbmeta_images[n].vbmeta_data,
+                          data->vbmeta_images[n].vbmeta_size);
+      }
+      avb_memcpy(out_digest, avb_sha512_final(&ctx), AVB_SHA512_DIGEST_SIZE);
+      ret = true;
+    } break;
+
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (!ret) {
+    avb_fatal("Unknown digest type");
+  }
+}
diff --git a/lib/avb/libavb/avb_sysdeps_posix.c b/lib/avb/libavb/avb_sysdeps_posix.c
old mode 100644
new mode 100755
index 9df018f7c8..638ce9867a
--- a/lib/avb/libavb/avb_sysdeps_posix.c
+++ b/lib/avb/libavb/avb_sysdeps_posix.c
@@ -22,6 +22,7 @@
  * SOFTWARE.
  */
 
+#include <stdio.h>
 #include <common.h>
 #include <stdarg.h>
 #include <stdlib.h>
@@ -31,8 +32,10 @@
 
 #include <android_avb/avb_sysdeps.h>
 
-void abort(void);
-
+void abort(void)
+{
+	
+}
 int avb_memcmp(const void* src1, const void* src2, size_t n) {
   return memcmp(src1, src2, n);
 }
diff --git a/lib/avb/libavb/avb_util.c b/lib/avb/libavb/avb_util.c
old mode 100644
new mode 100755
index 434cb39e2b..7b2053b5bd
--- a/lib/avb/libavb/avb_util.c
+++ b/lib/avb/libavb/avb_util.c
@@ -401,3 +401,30 @@ const char* avb_basename(const char* str) {
   }
   return str;
 }
+
+void avb_uppercase(char* str) {
+  size_t i;
+  for (i = 0; str[i] != '\0'; ++i) {
+    if (str[i] <= 0x7A && str[i] >= 0x61) {
+      str[i] -= 0x20;
+    }
+  }
+}
+
+char* avb_bin2hex(const uint8_t* data, size_t data_len) {
+  const char hex_digits[17] = "0123456789abcdef";
+  char* hex_data;
+  size_t n;
+
+  hex_data = avb_malloc(data_len * 2 + 1);
+  if (hex_data == NULL) {
+    return NULL;
+  }
+
+  for (n = 0; n < data_len; n++) {
+    hex_data[n * 2] = hex_digits[data[n] >> 4];
+    hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
+  }
+  hex_data[n * 2] = '\0';
+  return hex_data;
+}
diff --git a/lib/avb/libavb/avb_vbmeta_image.c b/lib/avb/libavb/avb_vbmeta_image.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb/avb_version.c b/lib/avb/libavb/avb_version.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_ab/Kconfig b/lib/avb/libavb_ab/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_ab/Makefile b/lib/avb/libavb_ab/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_atx/Kconfig b/lib/avb/libavb_atx/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_atx/Makefile b/lib/avb/libavb_atx/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
old mode 100644
new mode 100755
index e0f205a728..74a34fd0fd
--- a/lib/avb/libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -29,6 +29,9 @@
 #include <android_avb/avb_sysdeps.h>
 #include <android_avb/avb_util.h>
 
+/* The most recent unlock challenge generated. */
+static uint8_t last_unlock_challenge[AVB_ATX_UNLOCK_CHALLENGE_SIZE];
+
 /* Computes the SHA256 |hash| of |length| bytes of |data|. */
 static void sha256(const uint8_t* data,
                    uint32_t length,
@@ -59,7 +62,7 @@ static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
 /* Verifies structure and |expected_hash| of permanent |attributes|. */
 static bool verify_permanent_attributes(
     const AvbAtxPermanentAttributes* attributes,
-    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+    const uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
   uint8_t hash[AVB_SHA256_DIGEST_SIZE];
 
   if (attributes->version != 1) {
@@ -75,10 +78,11 @@ static bool verify_permanent_attributes(
 }
 
 /* Verifies the format, key version, usage, and signature of a certificate. */
-static bool verify_certificate(AvbAtxCertificate* certificate,
-                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                               uint64_t minimum_key_version,
-                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+static bool verify_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_key_version,
+    const uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
   const AvbAlgorithmData* algorithm_data;
   uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
 
@@ -115,9 +119,10 @@ static bool verify_certificate(AvbAtxCertificate* certificate,
 }
 
 /* Verifies signature and fields of a PIK certificate. */
-static bool verify_pik_certificate(AvbAtxCertificate* certificate,
-                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                                   uint64_t minimum_version) {
+static bool verify_pik_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version) {
   uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
 
   sha256_str("com.google.android.things.vboot.ca", expected_usage);
@@ -131,10 +136,10 @@ static bool verify_pik_certificate(AvbAtxCertificate* certificate,
 
 /* Verifies signature and fields of a PSK certificate. */
 static bool verify_psk_certificate(
-    AvbAtxCertificate* certificate,
-    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
     uint64_t minimum_version,
-    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
   uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
   uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
 
@@ -148,7 +153,32 @@ static bool verify_psk_certificate(
   if (0 != avb_safe_memcmp(certificate->signed_data.subject,
                            expected_subject,
                            AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Product ID mismatch.\n");
+    avb_error("PSK: Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PUK certificate. */
+static bool verify_puk_certificate(
+    const AvbAtxCertificate* certificate,
+    const uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    const uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.unlock", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PUK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("PUK: Product ID mismatch.\n");
     return false;
   }
   return true;
@@ -254,3 +284,118 @@ AvbIOResult avb_atx_validate_vbmeta_public_key(
   *out_is_trusted = true;
   return AVB_IO_RESULT_OK;
 }
+
+AvbIOResult avb_atx_generate_unlock_challenge(
+    AvbAtxOps* atx_ops, AvbAtxUnlockChallenge* out_unlock_challenge) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+
+  /* We need the permanent attributes to compute the product_id_hash. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->get_random(
+      atx_ops, AVB_ATX_UNLOCK_CHALLENGE_SIZE, last_unlock_challenge);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to generate random challenge.\n");
+    return result;
+  }
+  out_unlock_challenge->version = 1;
+  sha256(permanent_attributes.product_id,
+         AVB_ATX_PRODUCT_ID_SIZE,
+         out_unlock_challenge->product_id_hash);
+  avb_memcpy(out_unlock_challenge->challenge,
+             last_unlock_challenge,
+             AVB_ATX_UNLOCK_CHALLENGE_SIZE);
+  return result;
+}
+
+AvbIOResult avb_atx_validate_unlock_credential(
+    AvbAtxOps* atx_ops,
+    const AvbAtxUnlockCredential* unlock_credential,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  uint64_t minimum_version;
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t challenge_hash[AVB_SHA512_DIGEST_SIZE];
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Sanity check the credential. */
+  if (unlock_credential->version != 1) {
+    avb_error("Unsupported unlock credential format.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Read and verify permanent attributes. */
+  result = atx_ops->read_permanent_attributes(atx_ops, &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = atx_ops->read_permanent_attributes_hash(atx_ops,
+                                                   permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(
+          &unlock_credential->product_intermediate_key_certificate,
+          permanent_attributes.product_root_public_key,
+          minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PUK certificate. The minimum version is shared with the PSK. */
+  result = atx_ops->ops->read_rollback_index(
+      atx_ops->ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_puk_certificate(
+          &unlock_credential->product_unlock_key_certificate,
+          unlock_credential->product_intermediate_key_certificate.signed_data
+              .public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the challenge signature. */
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512(last_unlock_challenge, AVB_ATX_UNLOCK_CHALLENGE_SIZE, challenge_hash);
+  if (!avb_rsa_verify(unlock_credential->product_unlock_key_certificate
+                          .signed_data.public_key,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      unlock_credential->challenge_signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      challenge_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid unlock challenge signature.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
diff --git a/lib/avb/libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/Makefile b/lib/avb/libavb_user/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/avb_user_verification.c b/lib/avb/libavb_user/avb_user_verification.c
old mode 100644
new mode 100755
diff --git a/lib/avb/libavb_user/avb_user_verity.c b/lib/avb/libavb_user/avb_user_verity.c
old mode 100644
new mode 100755
diff --git a/lib/avb/rk_avb_user/Kconfig b/lib/avb/rk_avb_user/Kconfig
old mode 100644
new mode 100755
diff --git a/lib/avb/rk_avb_user/Makefile b/lib/avb/rk_avb_user/Makefile
old mode 100644
new mode 100755
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
old mode 100644
new mode 100755

commit 62b1148596a6b6d426748984fc540b2ee51ad497
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 19:57:12 2018 +0800

    fastboot: support oem at-get-vboot-unlock-challenge
    
    Change-Id: I34785710a3edc80fbc5e98d4a26c98f8bd12a15b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b1377df514..ded9d2db29 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1326,6 +1326,22 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
+#endif
+	} else if (strncmp("at-get-vboot-unlock-challenge", cmd + 4, 29) == 0) {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		uint32_t challenge_len = 0;
+		int ret = 0;
+
+		ret = rk_generate_unlock_challenge((void *)CONFIG_FASTBOOT_BUF_ADDR, &challenge_len);
+		if (ret == 0) {
+			upload_size = challenge_len;
+			fastboot_tx_write_str("OKAY");
+		} else {
+			fastboot_tx_write_str("FAILgenerate unlock challenge fail!");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
 #endif
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER

commit 57c7f8fe0d71f0d7e81cfdb66f5dc311f9b55d77
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 19:49:01 2018 +0800

    lib: avb: support generate unlock challenge
    
    Change-Id: Ia21746ec2bc729fd92ca7ea7a3320dfcbd4dd238
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 099be41da8..76a4de6349 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -254,6 +254,19 @@ AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
  */
 int rk_auth_unlock(void *buffer, char *out_is_trusted);
 
+/**
+ * generate unlock challenge
+ *
+ * @param buffer: AvbAtxUnlockChallenge
+ *
+ * @param challenge_len: Challenge length
+ *
+ * @param out_is_trusted: true or false
+ *
+ * @return 0 if generate unlock challenge OK, -1 if not
+ */
+int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index a2279ae562..92e50c38dd 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -655,3 +655,24 @@ int rk_auth_unlock(void *buffer, char *out_is_trusted)
 	else
 		return -1;
 }
+
+int rk_generate_unlock_challenge(void *buffer, uint32_t *challenge_len)
+{
+	AvbOps* ops;
+	AvbIOResult result = AVB_IO_RESULT_OK;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		avb_error("avb_ops_user_new() failed!");
+		return -1;
+	}
+
+	result = avb_atx_generate_unlock_challenge(ops->atx_ops,
+						   (AvbAtxUnlockChallenge *)buffer);
+	avb_ops_user_free(ops);
+	*challenge_len = sizeof(AvbAtxUnlockChallenge);
+	if (result == AVB_IO_RESULT_OK)
+		return 0;
+	else
+		return -1;
+}

commit 542316a9d41c8ee243546a37588a04afeb9718aa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 19:23:33 2018 +0800

    fastboot: support authenticated unlock
    
    Change-Id: I1a92652ab031f370ff37b73dfd2d7e4b2ec957e7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index b505ce9ce1..b1377df514 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1341,16 +1341,28 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
+		char out_is_trusted;
+
 		if (rk_avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAILlock sate read failure");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
-			if (rk_avb_write_lock_state(lock_state))
-				fastboot_tx_write_str("FAILwrite lock state failed");
-			else
-				fastboot_tx_write_str("OKAY");
+			if (rk_auth_unlock((void *)CONFIG_FASTBOOT_BUF_ADDR,
+					   &out_is_trusted)) {
+				printf("rk_auth_unlock ops error!\n");
+				fastboot_tx_write_str("FAILrk_auth_unlock ops error!");
+				return;
+			}
+			if (out_is_trusted == true) {
+				if (rk_avb_write_lock_state(lock_state))
+					fastboot_tx_write_str("FAILwrite lock state failed");
+				else
+					fastboot_tx_write_str("OKAY");
+			} else {
+				fastboot_tx_write_str("FAILauthenticated unlock fail");
+			}
 		}
 #else
 		fastboot_tx_write_str("FAILnot implemented");

commit 83ab7b4937c098a3febc8f361a6be16f28ae16aa
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jun 11 18:16:04 2018 +0800

    lib: avb: rk: add authenticated unlock interface
    
    Change-Id: Ib2aa1ac07d25f14aa08fc759ec99b6ba64d6abef
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index 48e1f58afe..099be41da8 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -243,6 +243,17 @@ int rk_avb_get_part_has_slot_info(const char *base_name);
 
 AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
 
+/**
+ * authenticated unlock
+ *
+ * @param buffer: AvbAtxUnlockCredential
+ *
+ * @param out_is_trusted: true or false
+ *
+ * @return 0 if authenticated unlock OK, -1 if not
+ */
+int rk_auth_unlock(void *buffer, char *out_is_trusted);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 01cfb0c41a..a2279ae562 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -632,3 +632,26 @@ int rk_avb_get_part_has_slot_info(const char *base_name)
 	free(part_name);
 	return part_num;
 }
+
+int rk_auth_unlock(void *buffer, char *out_is_trusted)
+{
+	AvbOps* ops;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		avb_error("avb_ops_user_new() failed!");
+		return -1;
+	}
+
+	if (avb_atx_validate_unlock_credential(ops->atx_ops,
+					   (AvbAtxUnlockCredential*)buffer,
+					   (bool*)out_is_trusted)) {
+		avb_ops_user_free(ops);
+		return -1;
+	}
+	avb_ops_user_free(ops);
+	if (*out_is_trusted == true)
+		return 0;
+	else
+		return -1;
+}

commit cb49af8fa64463a09a4cc77d49615cb0db50ee82
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Jun 6 16:17:42 2018 +0800

    lib: optee_client: Change param when get share memory config
    
    Change-Id: I572bf900af26b2c2dcfce23e912b95aa729d786b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index 7ecb769e3e..969a5bb348 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -132,7 +132,7 @@ void OpteeClientMemInit(void)
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
 #ifdef CONFIG_OPTEE_V1
-	ArmSmcArgs.Arg0 = TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG;
+	ArmSmcArgs.Arg0 = TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG;
 #endif
 #ifdef CONFIG_OPTEE_V2
 	ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHM_CONFIG_V2;

commit 151a2fa402ae1ce587965c710d488af11472abea
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Jun 11 15:12:29 2018 +0800

    rockchip: dts: rv1108-evb: add mipi display support
    
    Add lcd-e555hbm2-mipi display support for show logo
    on RK_MINIEVB_RV1108_V10.
    
    Change-Id: I1eb61a2977d68679835697e5400dbfb1f57bd70e
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 51353c8fac..338a04534b 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -33,6 +33,44 @@
 		};
 	};
 
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm0 0 25000 0>;
+		default-brightness-level = <200>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+	};
 
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
@@ -44,6 +82,86 @@
 	};
 };
 
+&display_subsystem {
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	panel: panel@0 {
+		compatible = "simple-panel-dsi";
+		reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
+		enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		reset-delay-ms = <20>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <20>;
+		reg =<0>;
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+		status = "okay";
+
+		panel-init-sequence = [
+			39 00 06 F0 55 AA 52 08 00
+			39 00 05 B0 0F 0F 1E 14
+			15 00 02 B2 00
+			15 00 02 B6 03
+			39 00 15 C0 03 00 06 07 08 09 00 00 00 00 02 00 0A 0B 0C 0D 00 00 00 00
+			39 00 11 C1 08 24 24 01 18 24 9F 85 08 24 24 01 18 24 95 85
+			39 00 19 C2 03 05 1B 24 13 31 01 05 1B 24 13 31 03 05 1B 38 00 11 02 05 1B 38 00 11
+			39 00 19 C3 02 05 1B 24 13 11 03 05 1B 24 13 11 03 05 1B 38 00 11 02 05 1B 38 00 11
+			39 00 06 F0 55 AA 52 08 01
+			15 00 02 B5 1E
+			15 00 02 B6 2D
+			15 00 02 B7 04
+			15 00 02 B8 05
+			15 00 02 B9 04
+			15 00 02 BA 14
+			15 00 02 BB 2F
+			15 00 02 BE 12
+			39 00 04 C2 00 35 07
+			39 00 06 F0 55 AA 52 08 02
+			15 00 02 C9 13
+			39 00 04 D4 02 04 2C
+			39 00 24 E1 00 91 AE CB E6 54 FF 1e 33 43 55 4F 66 78 8B 55 9D AC C0 CF 55 E0 e8 F2 FB AA 03 0D 15 1F AA 27 2C 31 34
+			39 00 24 E2 00 AD C6 E4 FD 55 11 2A 3B 49 55 54 6B 7C 8F 55 A1 AF C3 D1 55 E2 EA F3 FC AA 04 0E 15 20 AA 28 2D 32 35
+			39 00 24 E3 55 05 1E 37 4B 55 5A 64 72 7F 55 8B A3 B8 D1 A5 E4 F6 0E 23 AA 39 42 4F 59 AA 64 70 7A 86 AA 90 96 9C 9F
+			39 00 07 8F 5A 96 3C C3 A5 69
+			15 00 02 89 00
+			39 00 04 8C 55 49 53
+			15 00 02 9A 5A
+			39 00 05 FF A5 5A 13 86
+			39 00 03 FE 01 54
+			15 00 02 35 00
+			15 96 02 11 00
+			15 32 02 29 00
+		];
+
+		display-timings {
+			native-mode = <&timing_e555hbm2>;
+
+			timing_e555hbm2: timing0 {
+				clock-frequency = <62000000>;
+				hactive = <720>;
+				vactive = <1280>;
+				hsync-len = <4>;
+				hback-porch = <20>;
+				hfront-porch = <32>;
+				vsync-len = <4>;
+				vback-porch = <15>;
+				vfront-porch = <15>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
 &gmac {
 	status = "okay";
 	clock_in_out = <0>;
@@ -52,6 +170,18 @@
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
 };
 
+&mipi_dphy {
+	status = "okay";
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&route_dsi {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };
@@ -98,6 +228,10 @@
 	status = "okay";
 };
 
+&vop {
+	status = "okay";
+};
+
 &i2c0 {
 	i2c-scl-rising-time-ns = <275>;
 	i2c-scl-falling-time-ns = <16>;

commit 3cf7b58c24548c63a248ac0ff65bbbca0358d05a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sat Jun 9 15:15:04 2018 +0800

    defconfig: rv1108: enable drm display drivers
    
    Change-Id: Id01979462e9ea0cf8329e3afbcdf83c16ca4c1fc
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 53838f5638..2096487043 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -7,11 +7,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TARGET_EVB_RV1108=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
+# CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
@@ -27,6 +29,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_SPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -78,5 +81,9 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x110a
+CONFIG_DISPLAY=y
+CONFIG_DM_VIDEO=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit a41197ef2ed4cc316c7749042a32ea618fe34135
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue May 29 14:27:29 2018 +0800

    rockchip: dts: rv1108: Add vop and mipi mipi-dphy node
    
    Change-Id: Ifa31422f96e98e47ca4857bf8bdee52c0756ca91
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index b9b15da5c2..5331c9a9ee 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -9,6 +9,8 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/rv1108-cru.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/media/rockchip_mipi_dsi.h>
+#include <linux/media-bus-format.h>
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -41,6 +43,70 @@
 		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+		status = "disabled";
+
+		route {
+			route_dsi: route-dsi {
+				status = "okay";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vop_out_mipi>;
+			};
+		};
+	};
+
+	mipi_dphy: mipi-dphy@0x20228000 {
+		compatible = "rockchip,rv1108-mipi-dphy";
+		reg = <0x20228000 0x8000>;
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru PRST_MIPI_DSI_PHY>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
+	dsi: dsi@300e0000 {
+		compatible = "rockchip,rv1108-mipi-dsi";
+		reg = <0x300e0000 0x10000>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MIPI_DSI>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru 127>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcdc_mipi_data>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				mipi_in_vop: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vop_out_mipi>;
+				};
+			};
+
+		};
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>,
@@ -448,6 +514,23 @@
 			};
 		};
 
+		gpio1_lcdc {
+			lcdc_mipi_data: lcdc-mipi_data {
+				rockchip,pins = <1 RK_PA0 RK_FUNC_1 &pcfg_pull_none>, /* DSI_CLKP */
+						<1 RK_PA1 RK_FUNC_1 &pcfg_pull_none>, /* DSI_CLKN */
+						<1 RK_PA2 RK_FUNC_1 &pcfg_pull_none>, /* D0P */
+						<1 RK_PA3 RK_FUNC_1 &pcfg_pull_none>, /* D0N */
+						<1 RK_PA4 RK_FUNC_1 &pcfg_pull_none>, /* D1P */
+						<1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>, /* D1N */
+						<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>, /* D2P */
+						<1 RK_PA7 RK_FUNC_1 &pcfg_pull_none>, /* D2N */
+						<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>, /* D3P */
+						<1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>, /* D3N */
+						<1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>, /* D10 */
+						<1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>; /* D11 */
+			};
+		};
+
 		i2c0 {
 			i2c0_xfer: i2c0-xfer {
 				rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
@@ -599,4 +682,25 @@
 		       0x20200000 0x1f0
 		       0x20010000 0x78>;
         };
+
+	vop: vop@30040000 {
+		compatible = "rockchip,rv1108-vop";
+		reg = <0x30040000 0xe00>;
+		reg-names = "regs";
+		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>,
+			 <&cru HCLK_VOP>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_mipi: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&mipi_in_vop>;
+			};
+		};
+	};
 };

commit 544f4e917b499d62abe1912c733db2d90f0e43ec
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Sat Jun 9 15:45:46 2018 +0800

    arm: dts: rv1108: Add pwm0 node support
    
    Change-Id: Id0bb2776abd70eaabff21bf6af950ef11bcf37cd
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 37faa1859c..b9b15da5c2 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -160,6 +160,18 @@
 		status = "disabled";
 	};
 
+	pwm0: pwm@20040000 {
+		compatible = "rockchip,rk1108-pwm", "rockchip,rk3328-pwm";
+		reg = <0x20040000 0x10>;
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
 	pmugrf: syscon@20060000 {
 		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;
@@ -415,6 +427,12 @@
 			input-enable;
 		};
 
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins = <0 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		gmac {
 			rmii_pins: rmii-pins {
 				rockchip,pins = <1 RK_PC5 RK_FUNC_2 &pcfg_pull_none>,

commit 1abf41e2abb06ea21113373000080b09417869b3
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Tue Jun 5 20:44:49 2018 +0800

    video/drm: dphy: Add support for RV1108
    
    Change-Id: I86fe9df2e1fb74792a60eb672f664878a4134826
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index c6893a29ef..c7f147f826 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -40,6 +40,10 @@ static const struct udevice_id rockchip_phy_ids[] = {
 		.compatible = "rockchip,rk3368-mipi-dphy",
 		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
+	{
+		.compatible = "rockchip,rv1108-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
+	},
 #endif
 	{}
 };

commit e6f516ad96dc86e9465681959bb8186f66c18291
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Tue Jun 5 16:42:25 2018 +0800

    video/drm: dsi: Add support for RV1108
    
    Change-Id: Iad3fa58ebbfc7395f7d72d17d79dcd56888dee6d
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 4cd967fccd..04784d5d79 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -269,6 +269,7 @@ enum soc_type {
 	RK3366,
 	RK3368,
 	RK3399,
+	RV1108,
 };
 
 #define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
@@ -1296,6 +1297,26 @@ static const struct rockchip_connector rk3399_mipi_dsi_data = {
 	 .data = &rk3399_mipi_dsi_drv_data,
 };
 
+static const u32 rv1108_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[DPICOLORM]		= GRF_REG_FIELD(0x0410,  7,  7),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0410,  6,  6),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0410,  8,  8),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0414,  5,  5),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0414,  6,  9),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  4,  4),
+};
+
+static const struct dw_mipi_dsi_plat_data rv1108_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rv1108_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RV1108,
+};
+
+static const struct rockchip_connector rv1108_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rv1108_mipi_dsi_drv_data,
+};
+
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	{
 		.compatible = "rockchip,px30-mipi-dsi",
@@ -1321,6 +1342,10 @@ static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 		.compatible = "rockchip,rk3399-mipi-dsi",
 		.data = (ulong)&rk3399_mipi_dsi_data,
 	},
+	{
+		.compatible = "rockchip,rv1108-mipi-dsi",
+		.data = (ulong)&rv1108_mipi_dsi_data,
+	},
 	{}
 };
 

commit fe49d27610cb521301d5e633e30b495989f62362
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue May 29 14:24:22 2018 +0800

    drm/rockchip: vop: add support rv1108
    
    rv1108 have one vop, support win0(scale) and win1(for ui)
    most register layout is similar with rk3366.
    
    Change-Id: Ifc1b8488ce18bdc579ae0db214d71c104708c206
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 722998a68d..3fb1886df8 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -22,6 +22,11 @@ static const struct rockchip_crtc rk3036_vop_data = {
 	.data = &rk3036_vop,
 };
 
+static const struct rockchip_crtc rv1108_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rv1108_vop,
+};
+
 static const struct rockchip_crtc px30_vop_lit_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &px30_vop_lit,
@@ -81,6 +86,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	{
 		.compatible = "rockchip,rk3036-vop",
 		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,rv1108-vop",
+		.data = (ulong)&rv1108_vop_data,
 	}, {
 		.compatible = "rockchip,rk3126-vop",
 		.data = (ulong)&rk3036_vop_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 60ace69f5f..44a5012461 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -37,4 +37,5 @@ extern const struct vop_data rk3399_vop_big;
 extern const struct vop_data rk3399_vop_lit;
 extern const struct vop_data rk322x_vop;
 extern const struct vop_data rk3328_vop;
+extern const struct vop_data rv1108_vop;
 #endif
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 9445fb5d8d..8dee6129e1 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -602,3 +602,12 @@ const struct vop_data rk3308_vop = {
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };
+
+const struct vop_data rv1108_vop = {
+	.version = VOP_VERSION(2, 4),
+	.max_output = {1920, 1080},
+	.ctrl = &rk3308_ctrl_data,
+	.win = &rk3366_win0_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};

commit 3fc26c82e81096f12426674e29e6b2d208b61780
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jun 7 11:56:37 2018 +0800

    board_r: initialize interrupt earlier
    
    Change-Id: I1c674efd0d1b7e8229179ac570727da9b4adab27
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 582a155e98..6c4256a723 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -698,6 +698,12 @@ static init_fnc_t init_sequence_r[] = {
 	initr_noncached,
 #endif
 	bootstage_relocate,
+
+	interrupt_init,
+#ifdef CONFIG_ARM
+	initr_enable_interrupts,
+#endif
+
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,
 #endif
@@ -812,10 +818,7 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_CMD_KGDB
 	initr_kgdb,
 #endif
-	interrupt_init,
-#ifdef CONFIG_ARM
-	initr_enable_interrupts,
-#endif
+
 #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
 	timer_init,		/* initialize timer */
 #endif

commit 2eddc6d65fe490944427d89ac55f8de45717057d
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Mon Jun 11 16:10:41 2018 +0800

    rockchip/rk3399: Fixes the typo
    
    Change-Id: I2133cae52c78edbead32ad57b47d22dfb12ab785
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 2f582a150a..20dfd2d71f 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -61,7 +61,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"ramdisk_addr_r=0x0a200000\\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 395ad7c88f0d7fd12921fc109f4ea92b15c56a4d
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 1 17:39:09 2018 +0800

    arm: dts: evb_rv1108: add adc-keys dt node
    
    Add adc-keys for download mode detection.
    
    Change-Id: Id38b7b716fe742c182cceb6921cd23b20c6e6e8e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 0203a9a5ef..51353c8fac 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -8,6 +8,7 @@
 
 #include "rv1108.dtsi"
 #include "rv1108-sdram-ddr3-400.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RV1108 Evaluation board";
@@ -22,6 +23,17 @@
 		stdout-path = "serial2:1500000n8";
 	};
 
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		volup-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
+
 	vcc5v0_otg: vcc5v0-otg-drv {
 		compatible = "regulator-fixed";
 		enable-active-high;

commit dfe03786591925e6b5fe6afc4a1c50140dc1495f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jun 1 17:37:24 2018 +0800

    rockchip: rv1108: select BOARD_LATE_INIT
    
    Set bootup mode in board_late_init.
    
    Change-Id: I11eb28251bb1b7761397c6d4ee344f1b9755cc46
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 915f5fa6db..4501d4d6b3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -250,6 +250,7 @@ config ROCKCHIP_RV1108
 	select CPU_V7
 	select SUPPORT_SPL
 	select SPL
+	select BOARD_LATE_INIT
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.

commit d5d88d949f515f366e158b86f013516bdaccbdab
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 29 10:58:41 2018 +0800

    rockchip: rv1108: use RKIMG_BOOTCOMMAND
    
    Boot system by bootrkp or boot_android
    
    Change-Id: Ieea7aa778ae14a08f7c40c48a88822058a2985f5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index ab5b68954a..53838f5638 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TARGET_EVB_RV1108=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -13,15 +14,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
 CONFIG_RANDOM_UUID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -34,8 +33,6 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
@@ -45,6 +42,8 @@ CONFIG_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR_FIXED=y
@@ -56,6 +55,8 @@ CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKFLASH=y
+CONFIG_RKSFC_NOR=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
diff --git a/include/configs/evb_rv1108.h b/include/configs/evb_rv1108.h
index c02ce65b28..9b2a767f91 100644
--- a/include/configs/evb_rv1108.h
+++ b/include/configs/evb_rv1108.h
@@ -9,18 +9,10 @@
 
 #include <configs/rv1108_common.h>
 
-/*
- * Default environment settings
- */
-#define CONFIG_EXTRA_ENV_SETTINGS                                       \
-	"netdev=eth0\0"                                                 \
-	"ipaddr=172.16.12.50\0"                                         \
-	"serverip=172.16.12.69\0"					\
-	""
-#define CONFIG_BOOTCOMMAND						\
-	"sf probe;"							\
-	"sf read 0x62000000 0xc0000 0x500000;"				\
-	"dcache off;"							\
-	"go 0x62000000"
+#ifndef CONFIG_SPL_BUILD
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
 
 #endif
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index d0afa41a99..73b75b16c7 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -37,4 +37,21 @@
 /* rockchip ohci host driver */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
+#ifndef CONFIG_SPL_BUILD
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x60000000\0" \
+	"fdt_addr_r=0x61f00000\0" \
+	"kernel_addr_r=0x62000000\0" \
+	"ramdisk_addr_r=0x64000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	RKIMG_DET_BOOTDEV \
+	BOOTENV
+#endif
+
 #endif

commit f42a70b193dddf6bc9f746e341ff90ee1dec7701
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 29 10:57:30 2018 +0800

    rockchip: rv1108: switch to rksfc
    
    rksfc will emulate the spi nor flash as a block
    device, then we can access it via gpt partition.
    
    Change-Id: Idc9bb2532d8fcc82af03f451735a487ef22abe00
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 2494548260..0203a9a5ef 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -45,14 +45,8 @@
 };
 
 &sfc {
+	compatible = "rockchip,rksfc";
 	status = "okay";
-	flash@0 {
-		compatible = "gd25q256","spi-flash";
-		reg = <0>;
-		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <4>;
-		spi-max-frequency = <96000000>;
-	};
 };
 
 &u2phy {

commit c791e8a87d6643c2b0a57b23224e34abb2610c6b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed May 30 17:31:16 2018 +0800

    rockchip: rk3308: set text base to 0x00600000
    
    Memory layout now:
    -----------------
    |Offset| Blob   |
    -----------------
    |0M    | ATF    |
    -----------------
    |2M    | OP-TEE |
    -----------------
    |6M    | U-BOOT |
    -----------------
    
    Also remove unused SPL definition.
    
    Change-Id: I3daadd45267c90752de51aa6ec8ccdf1d5e1c2b3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 379e4a1789..e4756a043c 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -17,14 +17,10 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#define CONFIG_SYS_TEXT_BASE		0x00200000
-#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
-#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SYS_TEXT_BASE		0x00600000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00700000
+#define CONFIG_SYS_LOAD_ADDR		0x00C00800
 #define CONFIG_SPL_STACK		0x00400000
-#define CONFIG_SPL_TEXT_BASE		0x00000000
-#define CONFIG_SPL_MAX_SIZE		0x10000
-#define CONFIG_SPL_BSS_START_ADDR	0x2000000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
 
 #define COUNTER_FREQUENCY		24000000

commit 9c629953c6415578cfbf5b51de0f8f0640b75d4b
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jun 6 17:03:21 2018 +0800

    defconfig: rockchip: rv1108: enable PMIC and regulator by default
    
    Change-Id: I8c144c507efa9bf3608d70554ab0866faa309e99
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index fe77072827..ab5b68954a 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -46,7 +46,13 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y

commit 2fe2ebad16a535161c9a2bd560ba1bf2ddddfdf5
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jun 6 17:01:14 2018 +0800

    arm: rv1108: support rk805 setting voltage
    
    add rk805 and i2c dts node.
    support rk805 i2c read and write.
    
    Change-Id: I74d6a9f6ff5609ebdbc1a272cd044fdaa7041d7f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 568e082a53..2494548260 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -91,3 +91,125 @@
 &usb_host_ohci {
 	status = "okay";
 };
+
+&i2c0 {
+	i2c-scl-rising-time-ns = <275>;
+	i2c-scl-falling-time-ns = <16>;
+	clock-frequency = <200000>;
+	nack-retry = <1>;
+	status = "okay";
+
+	rk805: pmic@18 {
+		compatible = "rockchip,rk805";
+		status = "okay";
+		reg = <0x18>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+
+		pwrkey {
+			status = "okay";
+		};
+
+		regulators {
+			vdd_arm: DCDC_REG1 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vdd_cam: DCDC_REG2 {
+				regulator-name = "vdd_cam";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <2000000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vdd_10: LDO_REG1 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_18emmc: LDO_REG2 {
+				regulator-name = "vcc_18emmc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10_pmu: LDO_REG3 {
+				regulator-name = "vdd_10_pmu";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+};
+
+&pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+		rockchip,pins =
+			<0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index ce6021a234..37faa1859c 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -18,6 +18,7 @@
 	interrupt-parent = <&gic>;
 
 	aliases {
+		i2c0 = &i2c0;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -171,7 +172,19 @@
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
-
+	i2c0: i2c@20000000 {
+		compatible = "rockchip,rv1108-i2c";
+		reg = <0x20000000 0x1000>;
+		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_I2C0_PMU>, <&cru PCLK_I2C0_PMU>;
+		clock-names = "i2c", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		status = "disabled";
+	};
 	usbgrf: syscon@202a0000 {
 		compatible = "rockchip,rv1108-usbgrf", "syscon";
 		reg = <0x202a0000 0x1000>;
@@ -384,6 +397,11 @@
 			drive-strength = <4>;
 		};
 
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
 		pcfg_output_high: pcfg-output-high {
 			output-high;
 		};
@@ -412,6 +430,13 @@
 			};
 		};
 
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
+						<0 RK_PB2 RK_FUNC_1 &pcfg_pull_none_smt>;
+			};
+		};
+
 		i2c1 {
 			i2c1_xfer: i2c1-xfer {
 				rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 482c3da644..f9d71fc1f1 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -399,6 +399,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
 	{ .compatible = "rockchip,rk3328-i2c" },
 	{ .compatible = "rockchip,rk3399-i2c" },
 	{ .compatible = "rockchip,rk3228-i2c" },
+	{ .compatible = "rockchip,rv1108-i2c" },
 	{ }
 };
 

commit 680c48344fec20ad0b7a348d4553e518c0a03ca7
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Wed Jun 6 16:50:42 2018 +0800

    clk: rockchip: rv1108: support i2c clk get and set rate
    
    Change-Id: Iff7e9191e66e0eff828b9ea51cb952ee7139457f
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index b57c07e55e..3e752ab62e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -128,6 +128,31 @@ enum {
 	CLK_DDR_DIV_CON_SHIFT		= 0,
 	CLK_DDR_DIV_CON_MASK		= 0x3 << CLK_DDR_DIV_CON_SHIFT,
 
+	/* CLKSEL_CON19 */
+	CLK_I2C1_PLL_SEL_SHIFT		= 15,
+	CLK_I2C1_PLL_SEL_MASK		= 1 << CLK_I2C1_PLL_SEL_SHIFT,
+	CLK_I2C1_PLL_SEL_DPLL		= 0,
+	CLK_I2C1_PLL_SEL_GPLL		= 1,
+	CLK_I2C1_DIV_CON_SHIFT		= 8,
+	CLK_I2C1_DIV_CON_MASK		= 0x7f << CLK_I2C1_DIV_CON_SHIFT,
+	CLK_I2C0_PLL_SEL_SHIFT		= 7,
+	CLK_I2C0_PLL_SEL_MASK		= 1 << CLK_I2C0_PLL_SEL_SHIFT,
+	CLK_I2C0_DIV_CON_SHIFT		= 0,
+	CLK_I2C0_DIV_CON_MASK		= 0x7f,
+	I2C_DIV_CON_WIDTH		= 7,
+
+	/* CLKSEL_CON20 */
+	CLK_I2C3_PLL_SEL_SHIFT		= 15,
+	CLK_I2C3_PLL_SEL_MASK		= 1 << CLK_I2C3_PLL_SEL_SHIFT,
+	CLK_I2C3_PLL_SEL_DPLL		= 0,
+	CLK_I2C3_PLL_SEL_GPLL		= 1,
+	CLK_I2C3_DIV_CON_SHIFT		= 8,
+	CLK_I2C3_DIV_CON_MASK		= 0x7f << CLK_I2C3_DIV_CON_SHIFT,
+	CLK_I2C2_PLL_SEL_SHIFT		= 7,
+	CLK_I2C2_PLL_SEL_MASK		= 1 << CLK_I2C2_PLL_SEL_SHIFT,
+	CLK_I2C2_DIV_CON_SHIFT		= 0,
+	CLK_I2C2_DIV_CON_MASK		= 0x7f,
+
 	/* CLKSEL_CON22 */
 	CLK_SARADC_DIV_CON_SHIFT	= 0,
 	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 266d012258..62c239283f 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -410,6 +410,80 @@ static ulong rv1108_pclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
 	return rv1108_pclk_peri_get_clk(cru);
 }
 
+static ulong rv1108_i2c_get_clk(struct rv1108_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_I2C0_PMU:
+		con = readl(&cru->clksel_con[19]);
+		div = bitfield_extract(con, CLK_I2C0_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	case SCLK_I2C1:
+		con = readl(&cru->clksel_con[19]);
+		div = bitfield_extract(con, CLK_I2C1_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	case SCLK_I2C2:
+		con = readl(&cru->clksel_con[20]);
+		div = bitfield_extract(con, CLK_I2C2_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	case SCLK_I2C3:
+		con = readl(&cru->clksel_con[20]);
+		div = bitfield_extract(con, CLK_I2C3_DIV_CON_SHIFT,
+				       I2C_DIV_CON_WIDTH);
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_i2c_set_clk(struct rv1108_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	/* i2c0,4,8 src clock from ppll, i2c1,2,3,5,6,7 src clock from gpll*/
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 <= 127);
+
+	switch (clk_id) {
+	case SCLK_I2C0_PMU:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_I2C0_DIV_CON_MASK | CLK_I2C1_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C0_DIV_CON_SHIFT) |
+			     (CLK_I2C1_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT));
+		break;
+	case SCLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[19],
+			     CLK_I2C1_DIV_CON_MASK | CLK_I2C1_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C1_DIV_CON_SHIFT) |
+			     (CLK_I2C1_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT));
+		break;
+	case SCLK_I2C2:
+		rk_clrsetreg(&cru->clksel_con[20],
+			     CLK_I2C2_DIV_CON_MASK | CLK_I2C3_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C2_DIV_CON_SHIFT) |
+			     (CLK_I2C3_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT));
+		break;
+	case SCLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[20],
+			     CLK_I2C3_DIV_CON_MASK | CLK_I2C3_PLL_SEL_MASK,
+			     (src_clk_div << CLK_I2C3_DIV_CON_SHIFT) |
+			     (CLK_I2C3_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT));
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return rv1108_i2c_get_clk(cru, clk_id);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -433,6 +507,11 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 		return rv1108_hclk_peri_get_clk(priv->cru);
 	case PCLK_PERI:
 		return rv1108_pclk_peri_get_clk(priv->cru);
+	case SCLK_I2C0_PMU:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		return rv1108_i2c_get_clk(priv->cru, clk->id);
 	default:
 		return -ENOENT;
 	}
@@ -474,6 +553,12 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_PERI:
 		new_rate = rv1108_pclk_peri_set_clk(priv->cru, rate);
 		break;
+	case SCLK_I2C0_PMU:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		new_rate = rv1108_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 1636e7c2d44abbfb7db4fa675149e822d0b2cc99
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Jun 5 10:45:19 2018 +0800

    clk: rockchip: rv1108: Make clock ids consistent with kernel
    
    Change-Id: Idd295c633dffbe2ed6c3f5b6e115b0fd5b040251
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index a4a673c846..ce6021a234 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -264,7 +264,7 @@
 		rockchip,grf = <&grf>;
 		clocks = <&cru SCLK_MAC>,
 			<&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
-			<&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
+			<&cru SCLK_MAC_REF>, <&cru SCLK_MAC_REFOUT>,
 			<&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
                 clock-names = "stmmaceth",
                         "mac_clk_rx", "mac_clk_tx",
diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h
index dcc6e42463..ff3688e827 100644
--- a/include/dt-bindings/clock/rv1108-cru.h
+++ b/include/dt-bindings/clock/rv1108-cru.h
@@ -14,7 +14,6 @@
 #define ARMCLK				3
 
 /* sclk gates (special clocks) */
-#define SCLK_MAC			64
 #define SCLK_SPI0			65
 #define SCLK_NANDC			67
 #define SCLK_SDMMC			68
@@ -35,23 +34,75 @@
 #define SCLK_SDMMC_SAMPLE		84
 #define SCLK_SDIO_SAMPLE		85
 #define SCLK_EMMC_SAMPLE		86
-#define SCLK_MAC_RX			87
-#define SCLK_MAC_TX			88
-#define SCLK_MACREF			89
-#define SCLK_MACREF_OUT			90
-#define SCLK_SARADC			91
+#define SCLK_VENC_CORE			87
+#define SCLK_HEVC_CORE			88
+#define SCLK_HEVC_CABAC			89
+#define SCLK_PWM0_PMU			90
+#define SCLK_I2C0_PMU			91
+#define SCLK_WIFI			92
+#define SCLK_CIFOUT			93
+#define SCLK_MIPI_CSI_OUT		94
+#define SCLK_CIF0			95
+#define SCLK_CIF1			96
+#define SCLK_CIF2			97
+#define SCLK_CIF3			98
+#define SCLK_DSP			99
+#define SCLK_DSP_IOP			100
+#define SCLK_DSP_EPP			101
+#define SCLK_DSP_EDP			102
+#define SCLK_DSP_EDAP			103
+#define SCLK_CVBS_HOST			104
+#define SCLK_HDMI_SFR			105
+#define SCLK_HDMI_CEC			106
+#define SCLK_CRYPTO			107
+#define SCLK_SPI			108
+#define SCLK_SARADC			109
+#define SCLK_TSADC			110
+#define SCLK_MAC_PRE			111
+#define SCLK_MAC			112
+#define SCLK_MAC_RX			113
+#define SCLK_MAC_REF			114
+#define SCLK_MAC_REFOUT			115
+#define SCLK_DSP_PFM			116
+#define SCLK_RGA			117
+#define SCLK_I2C1			118
+#define SCLK_I2C2			119
+#define SCLK_I2C3			120
+#define SCLK_PWM			121
+#define SCLK_ISP			122
+#define SCLK_USBPHY			123
+#define SCLK_I2S0_SRC			124
+#define SCLK_I2S1_SRC			125
+#define SCLK_I2S2_SRC			126
+#define SCLK_UART0_SRC			127
+#define SCLK_UART1_SRC			128
+#define SCLK_UART2_SRC			129
+#define SCLK_MAC_TX			130
 
-#define DCLK_VOP                        187
+#define DCLK_VOP_SRC			185
+#define DCLK_HDMIPHY			186
+#define DCLK_VOP			187
 
 /* aclk gates */
 #define ACLK_DMAC			192
 #define ACLK_PRE			193
 #define ACLK_CORE			194
 #define ACLK_ENMCORE			195
-#define ACLK_GMAC			196
-#define ACLK_VIO0                       200
-#define ACLK_VIO1                       201
-#define ACLK_PERI                       209
+#define ACLK_RKVENC			196
+#define ACLK_RKVDEC			197
+#define ACLK_VPU			198
+#define ACLK_CIF0			199
+#define ACLK_VIO0			200
+#define ACLK_VIO1			201
+#define ACLK_VOP			202
+#define ACLK_IEP			203
+#define ACLK_RGA			204
+#define ACLK_ISP			205
+#define ACLK_CIF1			206
+#define ACLK_CIF2			207
+#define ACLK_CIF3			208
+#define ACLK_PERI			209
+#define ACLK_GMAC			210
 
 /* pclk gates */
 #define PCLK_GPIO1			256
@@ -70,13 +121,24 @@
 #define PCLK_PWM			269
 #define PCLK_TIMER			270
 #define PCLK_PERI			271
-#define PCLK_GMAC			272
-#define PCLK_SARADC			273
-#define PCLK_VIO                        276
+#define PCLK_GPIO0_PMU			272
+#define PCLK_I2C0_PMU			273
+#define PCLK_PWM0_PMU			274
+#define PCLK_ISP			275
+#define PCLK_VIO			276
+#define PCLK_MIPI_DSI			277
+#define PCLK_HDMI_CTRL			278
+#define PCLK_SARADC			279
+#define PCLK_DSP_CFG			280
+#define PCLK_BUS			281
+#define PCLK_EFUSE0			282
+#define PCLK_EFUSE1			283
+#define PCLK_WDT			284
+#define PCLK_GMAC			285
 
 /* hclk gates */
 #define HCLK_I2S0_8CH			320
-#define HCLK_I2S1_8CH			321
+#define HCLK_I2S1_2CH			321
 #define HCLK_I2S2_2CH			322
 #define HCLK_NANDC			323
 #define HCLK_SDMMC			324
@@ -84,9 +146,25 @@
 #define HCLK_EMMC			326
 #define HCLK_PERI			327
 #define HCLK_SFC			328
-#define HCLK_VIO                        332
+#define HCLK_RKVENC			329
+#define HCLK_RKVDEC			330
+#define HCLK_CIF0			331
+#define HCLK_VIO			332
+#define HCLK_VOP			333
+#define HCLK_IEP			334
+#define HCLK_RGA			335
+#define HCLK_ISP			336
+#define HCLK_CRYPTO_MST			337
+#define HCLK_CRYPTO_SLV			338
+#define HCLK_HOST0			339
+#define HCLK_OTG			340
+#define HCLK_CIF1			341
+#define HCLK_CIF2			342
+#define HCLK_CIF3			343
+#define HCLK_BUS			344
+#define HCLK_VPU			345
 
-#define CLK_NR_CLKS			(HCLK_VIO + 1)
+#define CLK_NR_CLKS			(HCLK_VPU + 1)
 
 /* reset id */
 #define SRST_CORE_PO_AD		0

commit 4cda57496112483d201288a6cb1851a4591ae72a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 17:53:42 2018 +0800

    boot_rkimg: check recovery mode by env "reboot_mode"
    
    This is set when recovery key pressed.
    
    Change-Id: Id5fe334fafd67fec461c36df13b2e856e519a083
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 1e33a5e335..0252924c59 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -274,6 +274,18 @@ void board_run_recovery_wipe_data(void)
 	board_run_recovery();
 }
 
+/*
+ * Generally, we have 3 ways to get reboot mode:
+ *
+ * 1. from bootloader_message which is defined in MISC partition;
+ * 2. from CONFIG_ROCKCHIP_BOOT_MODE_REG which supports "reboot xxx" commands;
+ * 3. from env "reboot_mode" which is added by U-Boot code(currently only when
+ *    recovery key pressed);
+ *
+ * 1st and 2nd cases are static determined at system start and we check it once,
+ * while 3th case is dynamically added by U-Boot code, so we have to check it
+ * everytime.
+ */
 int rockchip_get_boot_mode(void)
 {
 	struct blk_desc *dev_desc;
@@ -283,6 +295,16 @@ int rockchip_get_boot_mode(void)
 		   * RK_BLK_SIZE;
 	int ret;
 	uint32_t reg_boot_mode;
+	char *env_reboot_mode;
+
+	/*
+	 * Here, we mainly check for:
+	 * In rockchip_dnl_mode_check(), that recovery key is pressed without
+	 * USB attach will do env_set("reboot_mode", "recovery");
+	 */
+	env_reboot_mode = env_get("reboot_mode");
+	if (env_reboot_mode && !strcmp(env_reboot_mode, "recovery"))
+		boot_mode = BOOT_MODE_RECOVERY;
 
 	if (boot_mode != -1)
 		return boot_mode;

commit 28f6607570203160ea22f2d1374ead776f2c4d1f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 17:52:13 2018 +0800

    rockchip: boot_mode: support enter recovery mode by key
    
    When recovery key is pressed without USB attach, enter
    recovery mode by env_set("reboot_mode", "recovery"), it
    would be used at boot flow.
    
    Change-Id: I8730ad16c3c4a530179f41d3c3e5683a2138d8a5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 9aa425a31d..9ae0611004 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -87,12 +87,17 @@ void devtype_num_envset(void)
 
 void rockchip_dnl_mode_check(void)
 {
-	if (rockchip_dnl_key_pressed() && rockchip_u2phy_vbus_detect()) {
-		printf("download key pressed, entering download mode...\n");
-		/* If failed, we fall back to bootrom download mode */
-		run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
-		set_back_to_bootrom_dnl_flag();
-		do_reset(NULL, 0, 0, NULL);
+	if (rockchip_dnl_key_pressed()) {
+		if (rockchip_u2phy_vbus_detect()) {
+			printf("download key pressed, entering download mode...\n");
+			/* If failed, we fall back to bootrom download mode */
+			run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
+			set_back_to_bootrom_dnl_flag();
+			do_reset(NULL, 0, 0, NULL);
+		} else {
+			printf("recovery key pressed, entering recovery mode!\n");
+			env_set("reboot_mode", "recovery");
+		}
 	}
 }
 

commit e09b1e4a58f9ee118f46daae5188bd0295974acc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jun 1 17:46:16 2018 +0800

    bootm-fdt: fixup rk3288w compatible in fdt
    
    1. recoganize RK3288w according to HDMI Revision ID;
    2. proive a weak board_fdt_fixup() as common fixup place;
    3. move rockchip_display_fixup() into board_fdt_fixup();
    
    Change-Id: Ib3f4e991ffd7420a8f39390ae067340a65183a26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index adf0d249f9..b693496d39 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -22,9 +22,6 @@
 #endif
 #include <asm/psci.h>
 #include <asm/spin_table.h>
-#ifdef CONFIG_DRM_ROCKCHIP
-#include <video_rockchip.h>
-#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -35,6 +32,11 @@ __weak int fdt_update_ethernet_dt(void *blob)
 }
 #endif
 
+__weak int board_fdt_fixup(void *blob)
+{
+	return 0;
+}
+
 int arch_fixup_fdt(void *blob)
 {
 	int ret = 0;
@@ -78,9 +80,10 @@ int arch_fixup_fdt(void *blob)
 		return ret;
 #endif
 #endif
-#ifdef CONFIG_DRM_ROCKCHIP
-	rockchip_display_fixup(blob);
-#endif
+	ret = board_fdt_fixup(blob);
+	if (ret)
+		return ret;
+
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);
 	if (ret)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4325098eb4..beb476a0c1 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -234,6 +234,27 @@ int board_init(void)
 	return rk_board_init();
 }
 
+int board_fdt_fixup(void *blob)
+{
+	__maybe_unused int ret = 0;
+
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_display_fixup(blob);
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3288
+	/* RK3288W HDMI Revision ID is 0x1A */
+	if (readl(0xff980004) == 0x1A) {
+		ret = fdt_setprop_string(blob, 0,
+					 "compatible", "rockchip,rk3288w");
+		if (ret)
+			printf("fdt set compatible failed: %d\n", ret);
+	}
+#endif
+
+	return ret;
+}
+
 #if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
 void enable_caches(void)
 {

commit c5ffdb29c3c0a456924555bb1d14e47c2b412205
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 16:35:34 2018 +0800

    rockchip: resource: fix resource double found issue
    
    It should not try to find dtb from resource partition depends
    on boot mode, otherwiser in boot normal mode, it try to load
    dtb from resource partition when we use boot.img(AOSP).
    
    Change-Id: Ic27bb76ecbf80794e8c7298d209f139176ccef78
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 0766f15bcc..faa85d022a 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -160,7 +160,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int ret;
 	int e_num;
 	int offset = 0;
-	int mode = 0;
+	int resource_found = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
@@ -188,8 +188,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	/* Get boot mode from misc */
-	mode = rockchip_get_boot_mode();
-	if (mode == BOOT_MODE_RECOVERY)
+	if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
 	/* Read boot/recovery and chenc if this is an AOSP img */
 #ifdef CONFIG_ANDROID_AB
@@ -206,7 +205,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
 		/* RKIMG can support part table without 'boot' */
-		mode = 0;
 		goto next;
 	}
 	andr_hdr = (void *)hdr;
@@ -225,13 +223,12 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
 		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
 		offset = offset / RK_BLK_SIZE;
-	} else {
-		/* Set mode to 0 in for recovery is not valid AOSP img */
-		mode = 0;
+
+		resource_found = 1;
 	}
 next:
 #endif
-	if (!mode) {
+	if (!resource_found) {
 		/* Read resource from Rockchip Resource partition */
 		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
 					 &part_info);

commit c701866bfcd4589e45c6eb1498318b77c4e30de5
Author: MengDongyang <daniel.meng@rock-chips.com>
Date:   Sun Jun 3 21:24:01 2018 -0700

    rockchip: dts: rv1108: delete property of usbgrf
    
    Delete property of usbgrf to make the driver use grf to
    refrence the base address only.
    
    Change-Id: I4601f6d263595eeabd861e5e01230bd8411bae83
    Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index da3123b8d1..a4a673c846 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -130,7 +130,6 @@
 		compatible = "rockchip,rv1108-usb2phy";
 		reg = <0x100 0x0c>;
 		rockchip,grf = <&grf>;
-		rockchip,usbgrf = <&usbgrf>;
 		#phy-cells = <1>;
 		status = "disabled";
 

commit 9482282bd7fd184e70888d4d3a119d4a0775a851
Author: MengDongyang <daniel.meng@rock-chips.com>
Date:   Sun Jun 3 21:13:26 2018 -0700

    phy: phy-rockchip-inno-usb2: correct the error of address for rv1108
    
    The driver of u2phy use either grf or usbgrf to detect charger type.
    But the register is divide into two parts both in grf and usbgrf in
    rv1108. So rebase the regitster in usbgrf to grf register to make
    sure that the driver can use a same base address.
    
    Change-Id: I90ac8164b4dce2412a21ed7b5a5180dca1e9af3c
    Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index ee06ae21eb..70bdcd1f4e 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -650,7 +650,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
 		.port_cfgs	= {
 			[USB2PHY_PORT_OTG] = {
-				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0ffa0100, 8, 0, 0, 0x1d1 },
 				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
 				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
 				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
@@ -661,7 +661,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 				.utmi_ls	= { 0x0804, 13, 12, 0, 1 },
 			},
 			[USB2PHY_PORT_HOST] = {
-				.phy_sus	= { 0x0104, 8, 0, 0, 0x1d1 },
+				.phy_sus	= { 0x0ffa0104, 8, 0, 0, 0x1d1 },
 				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
 				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
 				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 },
@@ -670,16 +670,16 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 			}
 		},
 		.chg_det = {
-			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.opmode		= { 0x0ffa0100, 3, 0, 5, 1 },
 			.cp_det		= { 0x0804, 1, 1, 0, 1 },
 			.dcp_det	= { 0x0804, 0, 0, 0, 1 },
 			.dp_det		= { 0x0804, 2, 2, 0, 1 },
-			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
-			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
-			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
-			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
-			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
-			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+			.idm_sink_en	= { 0x0ffa0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0ffa0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0ffa0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0ffa0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0ffa0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0ffa0108, 11, 11, 0, 1 },
 		},
 	},
 	{ /* sentinel */ }

commit 564ab2efb0af171ff62022de8aa5df42be724b57
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 6 15:15:40 2018 +0800

    common: bootm: reserve memory bank
    
    Reserve lmb according to gd->bd->bi_dram.
    
    Change-Id: Ib1d4da95e826d3afe034bd3a90ec1d1c92a692bf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 5e1f7c218c..0bebb2d046 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -50,16 +50,23 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 #ifdef CONFIG_LMB
 static void boot_start_lmb(bootm_headers_t *images)
 {
-	ulong		mem_start;
-	phys_size_t	mem_size;
 
 	lmb_init(&images->lmb);
+#ifdef CONFIG_NR_DRAM_BANKS
+	int i;
+
+	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		lmb_add(&images->lmb, gd->bd->bi_dram[i].start,
+			gd->bd->bi_dram[i].size);
+	}
+#else
+	ulong		mem_start;
+	phys_size_t	mem_size;
 
 	mem_start = env_get_bootm_low();
 	mem_size = env_get_bootm_size();
-
 	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
-
+#endif
 	arch_lmb_reserve(&images->lmb);
 	board_lmb_reserve(&images->lmb);
 }

commit fa7f201ba7479ace62947bc801c5b60bc91cefa3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Jun 6 14:42:57 2018 +0800

    arm: bootm: reserve stack space
    
    BUG: LMB save the stack space according to the
    gd->bd->bi_dram[0], but sometimes the SDRAM is
    divided into several banks. The stack space is not
    in the bank0 but the high bank.
    
    SOLVE: use the gd->ram_top instead of gd->bd->bi_dram[0].
    
    Change-Id: I347c7dff279bab62754a5785fed0dd5b4c1464dd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 5c62d9c144..5e6336cbd8 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -64,7 +64,7 @@ void arch_lmb_reserve(struct lmb *lmb)
 	/* adjust sp by 4K to be safe */
 	sp -= 4096;
 	lmb_reserve(lmb, sp,
-		    gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size - sp);
+		    gd->ram_top - sp);
 }
 
 __weak void board_quiesce_devices(void)

commit 981b79162bacefa5d08f08caa210d293c7b6be3a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Jun 5 14:59:31 2018 +0800

    lib: optee_client: get share memory config to init
    
    Change-Id: I92fff248650ff239e050fb058ee095e9bed231c6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/teesmc_v2.h b/include/optee_include/teesmc_v2.h
index 43bcd1a7ee..840cd97861 100644
--- a/include/optee_include/teesmc_v2.h
+++ b/include/optee_include/teesmc_v2.h
@@ -85,5 +85,30 @@ typedef struct optee_msg_param_v2      t_teesmc32_param;
 
 #define OPTEE_MSG_RPC_CMD_FS_V2		2
 
+#define OPTEE_SMC_32_V2			0
+#define OPTEE_SMC_64_V2			0x40000000
+#define OPTEE_SMC_FAST_CALL_V2		0x80000000
+#define OPTEE_SMC_STD_CALL_V2		0
+
+#define OPTEE_SMC_OWNER_MASK_V2		0x3F
+#define OPTEE_SMC_OWNER_SHIFT_V2		24
+
+#define OPTEE_SMC_FUNC_MASK_V2		0xFFFF
+
+#define OPTEE_SMC_OWNER_TRUSTED_OS_V2	50
+
+#define OPTEE_SMC_FUNCID_GET_SHM_CONFIG_V2	7
+#define OPTEE_SMC_GET_SHM_CONFIG_V2 \
+	OPTEE_SMC_FAST_CALL_VAL_V2(OPTEE_SMC_FUNCID_GET_SHM_CONFIG_V2)
+
+#define OPTEE_SMC_FAST_CALL_VAL_V2(func_num) \
+	OPTEE_SMC_CALL_VAL_V2(OPTEE_SMC_32_V2, OPTEE_SMC_FAST_CALL_V2, \
+			   OPTEE_SMC_OWNER_TRUSTED_OS_V2, (func_num))
+
+#define OPTEE_SMC_CALL_VAL_V2(type, calling_convention, owner, func_num) \
+			((type) | (calling_convention) | \
+			(((owner) & OPTEE_SMC_OWNER_MASK_V2) << \
+				OPTEE_SMC_OWNER_SHIFT_V2) |\
+			((func_num) & OPTEE_SMC_FUNC_MASK_V2))
 
 #endif /* TEESMC_V2_H */
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index e78b603f29..7ecb769e3e 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -7,6 +7,10 @@
 #include <common.h>
 #include <stdlib.h>
 #include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientRPC.h>
+#include <optee_include/teesmc.h>
+#include <optee_include/teesmc_optee.h>
+#include <optee_include/teesmc_v2.h>
 
 void *my_mem_start;
 uint32_t my_count;
@@ -125,17 +129,21 @@ void my_free(void *ptr)
  */
 void OpteeClientMemInit(void)
 {
-#ifdef CONFIG_ARM64
-	debug(" OpteeClientMemInit 64\n");
-	my_malloc_init((void *)0x09e10000, 0x003e0000);
-#else
-	debug(" OpteeClientMemInit 32\n");
-#ifdef CONFIG_ROCKCHIP_RK3288
-	my_malloc_init((void *)0x0910a000, 0x000e0000);
-#else
-	my_malloc_init((void *)0x6910a000, 0x000e0000);
+	ARM_SMC_ARGS ArmSmcArgs = {0};
+
+#ifdef CONFIG_OPTEE_V1
+	ArmSmcArgs.Arg0 = TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG;
 #endif
+#ifdef CONFIG_OPTEE_V2
+	ArmSmcArgs.Arg0 = OPTEE_SMC_GET_SHM_CONFIG_V2;
 #endif
+
+	tee_smc_call(&ArmSmcArgs);
+
+	printf("get share memory, arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
+
+	my_malloc_init((void *)(size_t)ArmSmcArgs.Arg1, ArmSmcArgs.Arg2);
 }
 
 /*

commit 69285f9ef7a2b3e2194a60eaabefe96dd82b320a
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu May 31 10:25:53 2018 +0800

    cmd: mmc: remove test vboot hash code
    
    trusty_write_vbootkey_hash will set secure boot flag
    when we write vboot key hash success, we should remove it
    
    Change-Id: I7b45739918b10b6847a7f5bf6b7c740f3b802870
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 8d320fa122..74b379ebf3 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -189,15 +189,6 @@ static int do_mmc_testefuse(cmd_tbl_t *cmdtp,
 
 	trusty_read_attribute_hash(outbuf32, 8);
 
-	printf(" 0x%x  0x%x  0x%x  0x%x \n",
-		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
-	printf(" 0x%x  0x%x  0x%x  0x%x \n",
-		outbuf32[4], outbuf32[5], outbuf32[6], outbuf32[7]);
-
-	trusty_write_vbootkey_hash(buf32, 8);
-
-	trusty_read_vbootkey_hash(outbuf32, 8);
-
 	printf(" 0x%x  0x%x  0x%x  0x%x \n",
 		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
 	printf(" 0x%x  0x%x  0x%x  0x%x \n",

commit f303baf0d8d327fa53781870689349fcd21098b8
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed May 30 08:47:04 2018 +0800

    lib: optee_client: optee os v1 support multi file system
    
    Change-Id: I78487659e9fb5b9f2b5d468d587cd00756fdb98c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 0632b33733..e5400a2ed6 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -44,12 +44,7 @@ void test_optee(void)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -159,12 +154,8 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
+
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -246,12 +237,7 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -334,12 +320,7 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -418,12 +399,7 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -503,12 +479,7 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -587,12 +558,7 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -672,12 +638,7 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -757,12 +718,7 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -845,12 +801,7 @@ TEEC_Result read_from_keymaster(uint8_t *filename,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -933,12 +884,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1377,12 +1323,7 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1460,12 +1401,7 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
-#ifdef CONFIG_OPTEE_V1
-				NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 				&TeecOperation,
-#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1546,12 +1482,7 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1620,12 +1551,7 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1701,12 +1627,7 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1782,12 +1703,7 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 					TeecUuid,
 					TEEC_LOGIN_PUBLIC,
 					NULL,
-#ifdef CONFIG_OPTEE_V1
-					NULL,
-#endif
-#ifdef CONFIG_OPTEE_V2
 					&TeecOperation,
-#endif
 					&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};

commit 58737b30a231f0ca62858c9c44ec950ac9fe530d
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed May 30 08:46:10 2018 +0800

    lib: optee_client: update keymaster TA
    
    compile form keymaster 8.0/develop commit:ddd71dca
    Features:
            ddd71dca ta: support emmc/nand storage for keymaster & gatekeeper
            2692c551 Update export-user_ta/ to support dual filesystems
            bc288722 keymaster: uboot write data overwrite
    
    Change-Id: I51b84f62db15bd4825035089dbb6ee38d11d4cac
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index 7de07bb0cf..dfdefc81d8 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ

commit dce239c78748169efcfad7615226f133a7436fdf
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 15:28:32 2018 +0800

    rockchip: vendor: fix typo 'Vednor' -> 'Vendor'
    
    Change-Id: I1fb7eec71ef9f1f24c6404534a8e4b99193ddeb7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index ecaeea98b0..cef6e5254d 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -124,7 +124,7 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		 * ----------------------------------------------------
 		 */
 		lba = EMMC_VENDOR_PART_OFFSET;
-		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	case IF_TYPE_RKNAND:
 	case IF_TYPE_SPINOR:
@@ -139,17 +139,17 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		 * ----------------------------------------------------
 		 */
 		lba = FLASH_VENDOR_PART_OFFSET;
-		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		debug("[Vendor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	default:
-		printf("[Vednor ERROR]:Boot device type is invalid!\n");
+		printf("[Vendor ERROR]:Boot device type is invalid!\n");
 		return -ENODEV;
 	}
 	if (write)
 		ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
 	else
 		ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
-	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
+	debug("[Vendor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
 	return ret;
 }
@@ -182,7 +182,7 @@ int vendor_storage_init(void)
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("[Vednor ERROR]:Invalid boot device type(%d)\n",
+		printf("[Vendor ERROR]:Invalid boot device type(%d)\n",
 		       bootdev_type);
 		return -ENODEV;
 	}
@@ -205,7 +205,7 @@ int vendor_storage_init(void)
 		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
 		break;
 	default:
-		debug("[Vednor ERROR]:Boot device type is invalid!\n");
+		debug("[Vendor ERROR]:Boot device type is invalid!\n");
 		ret = -ENODEV;
 		break;
 	}
@@ -219,7 +219,7 @@ int vendor_storage_init(void)
 	/* Always use, no need to release */
 	buffer = (u8 *)malloc(size);
 	if (!buffer) {
-		printf("[Vednor ERROR]:Malloc failed!\n");
+		printf("[Vendor ERROR]:Malloc failed!\n");
 		return -ENOMEM;
 	}
 	/* Pointer initialization */
@@ -244,7 +244,7 @@ int vendor_storage_init(void)
 		}
 	}
 	if (max_ver) {
-		debug("[Vednor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
+		debug("[Vendor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
 		/*
 		 * Keep vendor_info the same as the largest
 		 * version of vendor
@@ -255,7 +255,7 @@ int vendor_storage_init(void)
 				return -EIO;
 		}
 	} else {
-		debug("[Vednor INFO]:Reset vendor info...\n");
+		debug("[Vendor INFO]:Reset vendor info...\n");
 		memset((u8 *)vendor_info.hdr, 0, size);
 		vendor_info.hdr->version = 1;
 		vendor_info.hdr->tag = VENDOR_TAG;
@@ -265,7 +265,7 @@ int vendor_storage_init(void)
 			- (u32)(size_t)vendor_info.data);
 		*(vendor_info.version2) = vendor_info.hdr->version;
 	}
-	debug("[Vednor INFO]:ret=%d.\n", ret);
+	debug("[Vendor INFO]:ret=%d.\n", ret);
 
 #ifdef VENDOR_STORAGE_TEST
 	if (vendor_storage_test())
@@ -303,7 +303,7 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 	item = vendor_info.item;
 	for (i = 0; i < vendor_info.hdr->item_num; i++) {
 		if ((item + i)->id == id) {
-			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			debug("[Vendor INFO]:Find the matching item, id=%d\n", id);
 			/* Correct the size value */
 			if (size > (item + i)->size)
 				size = (item + i)->size;
@@ -312,7 +312,7 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 			return size;
 		}
 	}
-	debug("[Vednor ERROR]:No matching item, id=%d\n", id);
+	debug("[Vendor ERROR]:No matching item, id=%d\n", id);
 
 	return -EINVAL;
 }
@@ -371,7 +371,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	/* If item already exist, update the item data */
 	for (i = 0; i < vendor_info.hdr->item_num; i++) {
 		if ((item + i)->id == id) {
-			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			debug("[Vendor INFO]:Find the matching item, id=%d\n", id);
 			offset = (item + i)->offset;
 			memcpy((vendor_info.data + offset), pbuf, size);
 			(item + i)->size = size;
@@ -390,7 +390,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	 */
 	if ((vendor_info.hdr->item_num < max_item_num) &&
 	    (vendor_info.hdr->free_size >= align_size)) {
-		debug("[Vednor INFO]:Create new Item, id=%d\n", id);
+		debug("[Vendor INFO]:Create new Item, id=%d\n", id);
 		item = vendor_info.item + vendor_info.hdr->item_num;
 		item->id = id;
 		item->offset = vendor_info.hdr->free_offset;
@@ -409,7 +409,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
 		return (cnt == part_size) ? size : -EIO;
 	}
-	debug("[Vednor ERROR]:Vendor has no space left!\n");
+	debug("[Vendor ERROR]:Vendor has no space left!\n");
 
 	return -ENOMEM;
 }

commit 72c2cf15e0deb2013a641a69f90d4f4ef91ce608
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jun 5 15:25:41 2018 +0800

    rockchip: vendor: fix return value error
    
    1. initialize global variant bootdev_type;
    2. fix return value;
    
    Change-Id: I0f20ff931c5896be06e802cffbc1b4a7a6848c94
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 7848d71660..ecaeea98b0 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -212,6 +212,10 @@ int vendor_storage_init(void)
 	/* Invalid bootdev type */
 	if (ret)
 		return ret;
+
+	/* Initialize */
+	bootdev_type = dev_desc->if_type;
+
 	/* Always use, no need to release */
 	buffer = (u8 *)malloc(size);
 	if (!buffer) {
@@ -228,8 +232,8 @@ int vendor_storage_init(void)
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
 	for (i = 0; i < VENDOR_PART_NUM; i++) {
 		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
-		if (ret < 0)
-			return ret;
+		if (ret != part_size)
+			return -EIO;
 
 		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
 		    (*(vendor_info.version2) == vendor_info.hdr->version)) {
@@ -245,8 +249,11 @@ int vendor_storage_init(void)
 		 * Keep vendor_info the same as the largest
 		 * version of vendor
 		 */
-		if (max_index != (VENDOR_PART_NUM - 1))
+		if (max_index != (VENDOR_PART_NUM - 1)) {
 			ret = vendor_ops((u8 *)vendor_info.hdr, part_size * max_index, part_size, 0);
+			if (ret != part_size)
+				return -EIO;
+		}
 	} else {
 		debug("[Vednor INFO]:Reset vendor info...\n");
 		memset((u8 *)vendor_info.hdr, 0, size);
@@ -268,6 +275,17 @@ int vendor_storage_init(void)
 	return ret;
 }
 
+/*
+ * @id: item id, first 4 id is occupied:
+ *	VENDOR_SN_ID
+ *	VENDOR_WIFI_MAC_ID
+ *	VENDOR_LAN_MAC_ID
+ *	VENDOR_BLUETOOTH_ID
+ * @pbuf: read data buffer;
+ * @size: read bytes;
+ *
+ * return: bytes equal to @size is success, other fail;
+ */
 int vendor_storage_read(u16 id, void *pbuf, u16 size)
 {
 	int ret = 0;
@@ -299,9 +317,20 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 	return -EINVAL;
 }
 
+/*
+ * @id: item id, first 4 id is occupied:
+ *	VENDOR_SN_ID
+ *	VENDOR_WIFI_MAC_ID
+ *	VENDOR_LAN_MAC_ID
+ *	VENDOR_BLUETOOTH_ID
+ * @pbuf: write data buffer;
+ * @size: write bytes;
+ *
+ * return: bytes equal to @size is success, other fail;
+ */
 int vendor_storage_write(u16 id, void *pbuf, u16 size)
 {
-	int ret = 0;
+	int cnt, ret = 0;
 	u32 i, next_index, align_size;
 	struct vendor_item *item;
 	u16 part_size, max_item_num, offset;
@@ -351,7 +380,8 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 			vendor_info.hdr->next_index++;
 			if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
 				vendor_info.hdr->next_index = 0;
-			return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+			cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+			return (cnt == part_size) ? size : -EIO;
 		}
 	}
 	/*
@@ -376,7 +406,8 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
 			vendor_info.hdr->next_index = 0;
 
-		return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+		cnt = vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+		return (cnt == part_size) ? size : -EIO;
 	}
 	debug("[Vednor ERROR]:Vendor has no space left!\n");
 
@@ -496,7 +527,7 @@ int vendor_storage_test(void)
 	for (id = 0; id < item_num; id++) {
 		memset(buffer, 0, size);
 		ret = vendor_storage_read(id, buffer, size);
-		if (ret != size) {
+		if (ret < 0) {
 			printf("[Vendor Test]:vendor read failed(id=%d)!\n", id);
 			free(buffer);
 			return ret;

commit 9cc336e89e858e0607f7b7c72166345b0a882be5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 31 15:30:41 2018 +0800

    android: bring up the kernel if device is unlock
    
    If the device is unlock, the device can be brought
    up when use avb.
    
    Change-Id: I82dd71d33f47dda0a760740428988dd658a96713
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index d31e583c12..91b227087e 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -436,7 +436,7 @@ static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
 			&slot_data[0]);
 
-	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK) {
+	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK && !(unlocked & LOCK_MASK)) {
 		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
 		goto out;
 	}
@@ -460,7 +460,10 @@ out:
 	if (slot_data[0] != NULL)
 		avb_slot_verify_data_free(slot_data[0]);
 
-	return verify_result;
+	if (unlocked & LOCK_MASK)
+		return 0;
+	else
+		return verify_result;
 }
 #endif
 

commit efdbac3478cedf49c0d31f177215ce1266a19823
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri May 18 21:27:00 2018 +0800

    clk: rockchip: rk3308: implement soc_clk_dump
    
    Change-Id: I6f0c3f56a878f491c4bb1deafd8e020e052e2287
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 8746c9aa60..ca74a833d7 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -36,6 +36,11 @@ enum rk3308_pll_id {
 	PLL_COUNT,
 };
 
+struct rk3308_clk_info {
+	unsigned long id;
+	char *name;
+};
+
 struct pll_rate_table {
 	unsigned long rate;
 	unsigned int fbdiv;
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 70ce25c25c..4325098eb4 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -132,6 +132,11 @@ __weak int rk_board_late_init(void)
 	return 0;
 }
 
+__weak int soc_clk_dump(void)
+{
+	return 0;
+}
+
 int board_late_init(void)
 {
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
@@ -147,6 +152,8 @@ int board_late_init(void)
 #endif
 	rockchip_set_serialno();
 
+	soc_clk_dump();
+
 	return rk_board_late_init();
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 6a0a595548..0ed825d93b 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -28,6 +28,12 @@ enum {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
+#define RK3308_CLK_DUMP(_id, _name)		\
+{						\
+	.id = _id,				\
+	.name = _name,				\
+}
+
 #define RK3308_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
 			_postdiv2, _dsmpd, _frac)		\
 {								\
@@ -58,6 +64,21 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
+static const struct rk3308_clk_info clks_dump[] = {
+	RK3308_CLK_DUMP(PLL_APLL, "apll"),
+	RK3308_CLK_DUMP(PLL_DPLL, "gpll"),
+	RK3308_CLK_DUMP(PLL_VPLL0, "vpll0"),
+	RK3308_CLK_DUMP(PLL_VPLL1, "vpll1"),
+	RK3308_CLK_DUMP(ACLK_BUS, "aclk_bus"),
+	RK3308_CLK_DUMP(HCLK_BUS, "hclk_bus"),
+	RK3308_CLK_DUMP(PCLK_BUS, "pclk_bus"),
+	RK3308_CLK_DUMP(ACLK_PERI, "aclk_peri"),
+	RK3308_CLK_DUMP(HCLK_PERI, "hclk_peri"),
+	RK3308_CLK_DUMP(PCLK_PERI, "pclk_peri"),
+	RK3308_CLK_DUMP(HCLK_AUDIO, "hclk_audio"),
+	RK3308_CLK_DUMP(PCLK_AUDIO, "pclk_audio"),
+};
+
 static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
 				ulong hz);
 static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
@@ -1092,3 +1113,58 @@ U_BOOT_DRIVER(rockchip_rk3308_cru) = {
 	.bind		= rk3308_clk_bind,
 	.probe		= rk3308_clk_probe,
 };
+
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+	struct udevice *cru_dev;
+	const struct rk3308_clk_info *clk_dump;
+	struct clk clk;
+	unsigned long clk_count = ARRAY_SIZE(clks_dump);
+	unsigned long rate;
+	int i, ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_CLK,
+					  DM_GET_DRIVER(rockchip_rk3308_cru),
+					  &cru_dev);
+	if (ret) {
+		printf("%s failed to get cru device\n", __func__);
+		return ret;
+	}
+
+	printf("CLK:");
+	for (i = 0; i < clk_count; i++) {
+		clk_dump = &clks_dump[i];
+		if (clk_dump->name) {
+			clk.id = clk_dump->id;
+			ret = clk_request(cru_dev, &clk);
+			if (ret < 0)
+				return ret;
+
+			rate = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (i == 0) {
+				if (rate < 0)
+					printf("%10s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%10s%20lu Hz\n", clk_dump->name,
+					       rate);
+			} else {
+				if (rate < 0)
+					printf("%14s%20s\n", clk_dump->name,
+					       "unknown");
+				else
+					printf("%14s%20lu Hz\n", clk_dump->name,
+					       rate);
+			}
+		}
+	}
+
+	return 0;
+}

commit 6c96c4c34573d57258b9ad3ed897c87a6bea5c98
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Jun 4 16:26:55 2018 +0800

    clk: rockchip: px30: Add support to set rate for bus and peri clks
    
    Change-Id: Ic122eaea3c1c63e6108eabf41ca1b46a30cc66ef
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 5385381306..8746c9aa60 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -245,6 +245,17 @@ enum {
 	EMMC_SEL_24M,
 	EMMC_DIV_SHIFT		= 0,
 	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL45_CON */
+	AUDIO_PCLK_DIV_SHIFT	= 8,
+	AUDIO_PCLK_DIV_MASK	= 0x1f << AUDIO_PCLK_DIV_SHIFT,
+	AUDIO_PLL_SEL_SHIFT	= 6,
+	AUDIO_PLL_SEL_MASK	= 0x3 << AUDIO_PLL_SEL_SHIFT,
+	AUDIO_PLL_VPLL0		= 0,
+	AUDIO_PLL_VPLL1,
+	AUDIO_PLL_24M,
+	AUDIO_HCLK_DIV_SHIFT	= 0,
+	AUDIO_HCLK_DIV_MASK	= 0x1f << AUDIO_HCLK_DIV_SHIFT,
 };
 
 check_member(rk3308_cru, emmc_con[1], 0x494);
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 21af800e58..6a0a595548 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -58,6 +58,13 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
+static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				ulong hz);
+static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				 ulong hz);
+static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv,
+				  ulong clk_id, ulong hz);
+
 static const struct pll_rate_table *get_pll_settings(unsigned long rate)
 {
 	unsigned int rate_count = ARRAY_SIZE(rk3308_pll_rates);
@@ -200,8 +207,7 @@ static void rkclk_init(struct udevice *dev)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(dev);
 	struct rk3308_cru *cru = priv->cru;
-
-	u32 aclk_div, hclk_div, pclk_div;
+	u32 aclk_div, pclk_div;
 
 	/* init pll */
 	if (rkclk_set_pll(priv, APLL, APLL_HZ))
@@ -223,41 +229,20 @@ static void rkclk_init(struct udevice *dev)
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 
-	/*
-	 * select dpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
 	priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
-	aclk_div = priv->dpll_hz / BUS_ACLK_HZ - 1;
-	hclk_div = priv->dpll_hz / BUS_HCLK_HZ - 1;
-	pclk_div = priv->dpll_hz / BUS_PCLK_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[5],
-		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-	rk_clrsetreg(&cru->clksel_con[6],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select dpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = priv->dpll_hz / PERI_ACLK_HZ - 1;
-	hclk_div = priv->dpll_hz / PERI_HCLK_HZ - 1;
-	pclk_div = priv->dpll_hz / PERI_PCLK_HZ - 1;
-	rk_clrsetreg(&cru->clksel_con[36],
-		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
-		     BUS_PLL_SEL_DPLL << PERI_PLL_SEL_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-	rk_clrsetreg(&cru->clksel_con[37],
-		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK,
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT);
-
 	priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
 	priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
+
+	rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ);
+	rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ);
+	rk3308_bus_set_clk(priv, PCLK_BUS, BUS_PCLK_HZ);
+
+	rk3308_peri_set_clk(priv, ACLK_PERI, PERI_ACLK_HZ);
+	rk3308_peri_set_clk(priv, HCLK_PERI, PERI_HCLK_HZ);
+	rk3308_peri_set_clk(priv, PCLK_PERI, PERI_PCLK_HZ);
+
+	rk3308_audio_set_clk(priv, HCLK_AUDIO, AUDIO_HCLK_HZ);
+	rk3308_audio_set_clk(priv, PCLK_AUDIO, AUDIO_PCLK_HZ);
 }
 
 static ulong rk3308_i2c_get_clk(struct clk *clk)
@@ -605,6 +590,187 @@ static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz)
 	return rk3308_vop_get_clk(clk);
 }
 
+static ulong rk3308_bus_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent = priv->dpll_hz;
+
+	switch (clk_id) {
+	case ACLK_BUS:
+		con = readl(&cru->clksel_con[5]);
+		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
+		break;
+	case HCLK_BUS:
+		con = readl(&cru->clksel_con[6]);
+		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
+		break;
+	case PCLK_BUS:
+		con = readl(&cru->clksel_con[6]);
+		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select dpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS:
+		rk_clrsetreg(&cru->clksel_con[5],
+			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+			     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_BUS:
+		rk_clrsetreg(&cru->clksel_con[6],
+			     BUS_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_BUS:
+		rk_clrsetreg(&cru->clksel_con[6],
+			     BUS_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_bus_get_clk(priv, clk_id);
+}
+
+static ulong rk3308_peri_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent = priv->dpll_hz;
+
+	switch (clk_id) {
+	case ACLK_PERI:
+		con = readl(&cru->clksel_con[36]);
+		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
+		break;
+	case HCLK_PERI:
+		con = readl(&cru->clksel_con[37]);
+		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
+		break;
+	case PCLK_PERI:
+		con = readl(&cru->clksel_con[37]);
+		div = (con & PERI_PCLK_DIV_MASK) >> PERI_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				 ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->dpll_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select dpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[36],
+			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+			     PERI_PLL_DPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[37],
+			     PERI_HCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_PERI:
+		rk_clrsetreg(&cru->clksel_con[37],
+			     PERI_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << PERI_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_peri_get_clk(priv, clk_id);
+}
+
+static ulong rk3308_audio_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+	struct rk3308_cru *cru = priv->cru;
+	u32 div, con, parent = priv->vpll0_hz;
+
+	switch (clk_id) {
+	case HCLK_AUDIO:
+		con = readl(&cru->clksel_con[45]);
+		div = (con & AUDIO_HCLK_DIV_MASK) >> AUDIO_HCLK_DIV_SHIFT;
+		break;
+	case PCLK_AUDIO:
+		con = readl(&cru->clksel_con[45]);
+		div = (con & AUDIO_PCLK_DIV_MASK) >> AUDIO_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_audio_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+				  ulong hz)
+{
+	struct rk3308_cru *cru = priv->cru;
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz, hz);
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select vpll0 as audio bus clock source and
+	 * set up dependent divisors for HCLK and PCLK clocks.
+	 */
+	switch (clk_id) {
+	case HCLK_AUDIO:
+		rk_clrsetreg(&cru->clksel_con[45],
+			     AUDIO_PLL_SEL_MASK | AUDIO_HCLK_DIV_MASK,
+			     AUDIO_PLL_VPLL0 << AUDIO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << AUDIO_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_AUDIO:
+		rk_clrsetreg(&cru->clksel_con[45],
+			     AUDIO_PLL_SEL_MASK | AUDIO_PCLK_DIV_MASK,
+			     AUDIO_PLL_VPLL0 << AUDIO_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << AUDIO_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this audio freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_peri_get_clk(priv, clk_id);
+}
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -651,6 +817,20 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case DCLK_VOP:
 		rate = rk3308_vop_get_clk(clk);
 		break;
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+		rate = rk3308_bus_get_clk(priv, clk->id);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3308_peri_get_clk(priv, clk->id);
+		break;
+	case HCLK_AUDIO:
+	case PCLK_AUDIO:
+		rate = rk3308_audio_get_clk(priv, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -694,6 +874,20 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOP:
 		ret = rk3308_vop_set_clk(clk, rate);
 		break;
+	case ACLK_BUS:
+	case HCLK_BUS:
+	case PCLK_BUS:
+		rate = rk3308_bus_set_clk(priv, clk->id, rate);
+		break;
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+		rate = rk3308_peri_set_clk(priv, clk->id, rate);
+		break;
+	case HCLK_AUDIO:
+	case PCLK_AUDIO:
+		rate = rk3308_audio_set_clk(priv, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 1e180a5641549ff946ab17afb26cc1b021b4dfac
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri May 18 19:29:33 2018 +0800

    clk: rockchip: rk3308: Add support to set and get pll rate
    
    Change-Id: Idfbe59c3f1d12d0e9adcb253e3d6db9e994bc44c
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index bf5bf57c8c..5385381306 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -11,6 +11,8 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
+#define APLL_HZ		(816 * MHz)
+
 #define CORE_ACLK_HZ	408000000
 #define CORE_DBG_HZ	204000000
 
@@ -34,12 +36,14 @@ enum rk3308_pll_id {
 	PLL_COUNT,
 };
 
-struct pll_div {
-	u32 refdiv;
-	u32 fbdiv;
-	u32 postdiv1;
-	u32 postdiv2;
-	u32 frac;
+struct pll_rate_table {
+	unsigned long rate;
+	unsigned int fbdiv;
+	unsigned int postdiv1;
+	unsigned int refdiv;
+	unsigned int postdiv2;
+	unsigned int dsmpd;
+	unsigned int frac;
 };
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3e39cfba91..21af800e58 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -7,6 +7,7 @@
 #include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <div64.h>
 #include <errno.h>
 #include <syscon.h>
 #include <asm/arch/clock.h>
@@ -27,12 +28,25 @@ enum {
 
 #define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
 
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+#define RK3308_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,	\
+			_postdiv2, _dsmpd, _frac)		\
+{								\
+	.rate	= _rate##U,					\
+	.fbdiv = _fbdiv,					\
+	.postdiv1 = _postdiv1,					\
+	.refdiv = _refdiv,					\
+	.postdiv2 = _postdiv2,					\
+	.dsmpd = _dsmpd,					\
+	.frac = _frac,						\
+}
 
-static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
+static struct pll_rate_table rk3308_pll_rates[] = {
+	/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
+	RK3308_PLL_RATE(1300000000, 6, 325, 1, 1, 1, 0),
+	RK3308_PLL_RATE(1200000000, 1, 50, 1, 1, 1, 0),
+	RK3308_PLL_RATE(816000000, 1, 68, 2, 1, 1, 0),
+	RK3308_PLL_RATE(748000000, 2, 187, 3, 1, 1, 0),
+};
 
 static u8 pll_mode_shift[PLL_COUNT] = {
 	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, VPLL0_MODE_SHIFT,
@@ -44,6 +58,19 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
+static const struct pll_rate_table *get_pll_settings(unsigned long rate)
+{
+	unsigned int rate_count = ARRAY_SIZE(rk3308_pll_rates);
+	int i;
+
+	for (i = 0; i < rate_count; i++) {
+		if (rate == rk3308_pll_rates[i].rate)
+			return &rk3308_pll_rates[i];
+	}
+
+	return NULL;
+}
+
 /*
  * How to calculate the PLL:
  * Formulas also embedded within the Fractional PLL Verilog model:
@@ -60,21 +87,32 @@ static u32 pll_mode_mask[PLL_COUNT] = {
  *
  */
 
-static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
-			  const struct pll_div *div)
+static int rkclk_set_pll(struct rk3308_clk_priv *priv,
+			 enum rk3308_pll_id pll_id,
+			 unsigned long drate)
 {
+	struct rk3308_cru *cru = priv->cru;
 	struct rk3308_pll *pll;
 	unsigned int *mode;
+	const struct pll_rate_table *rate;
+	uint vco_hz, output_hz;
+
+	rate = get_pll_settings(drate);
+	if (!rate) {
+		printf("%s unsupport rate\n", __func__);
+		return -EINVAL;
+	}
+
 	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+	vco_hz = OSC_HZ / 1000 * rate->fbdiv / rate->refdiv * 1000;
+	output_hz = vco_hz / rate->postdiv1 / rate->postdiv2;
 
 	pll = &cru->pll[pll_id];
 	mode = &cru->mode;
 
 	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
+	      pll, rate->fbdiv, rate->refdiv, rate->postdiv1,
+	      rate->postdiv2, vco_hz, output_hz);
 	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
 	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
 
@@ -92,10 +130,10 @@ static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
 
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+		     (rate->postdiv1 << PLL_POSTDIV1_SHIFT) | rate->fbdiv);
 	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
+		     (rate->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     rate->refdiv << PLL_REFDIV_SHIFT));
 
 	/* Power Up */
 	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
@@ -106,14 +144,18 @@ static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
 
 	rk_clrsetreg(mode, pll_mode_mask[pll_id],
 		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
+
+	return 0;
 }
 
-static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
+static uint32_t rkclk_pll_get_rate(struct rk3308_clk_priv *priv,
 				   enum rk3308_pll_id pll_id)
 {
-	u32 refdiv, fbdiv, postdiv1, postdiv2;
-	u32 con;
+	struct rk3308_cru *cru = priv->cru;
 	struct rk3308_pll *pll;
+	u32 con, refdiv, fbdiv, postdiv1, postdiv2, dsmpd, frac;
+	u32 rate = 0;
+	u64 frac_rate64 = 0;
 	uint shift;
 	uint mask;
 
@@ -134,7 +176,20 @@ static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
 		con = readl(&pll->con1);
 		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
 		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+		dsmpd = (con & PLL_DSMPD_MASK) >> PLL_DSMPD_SHIFT;
+		con = readl(&pll->con2);
+		frac = con & PLL_FRAC_DIV;
+		rate = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+		if (dsmpd == 0) {
+			/* fractional mode */
+			frac_rate64 = 24000000 * (u64)frac;
+			do_div(frac_rate64, refdiv);
+			frac_rate64 >>= 24;
+			do_div(frac_rate64, postdiv1);
+			do_div(frac_rate64, postdiv2);
+			rate += (uint32_t)frac_rate64;
+		}
+		return rate;
 	case PLLMUX_FROM_RTC32K:
 	default:
 		return 32768;
@@ -149,14 +204,15 @@ static void rkclk_init(struct udevice *dev)
 	u32 aclk_div, hclk_div, pclk_div;
 
 	/* init pll */
-	rkclk_set_pll(cru, APLL, &apll_816_cfg);
+	if (rkclk_set_pll(priv, APLL, APLL_HZ))
+		printf("%s set apll unsuccessfully\n", __func__);
 
 	/*
 	 * select apll as cpu/core clock pll source and
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	priv->apll_hz = rkclk_pll_get_rate(cru, APLL);
+	priv->apll_hz = rkclk_pll_get_rate(priv, APLL);
 	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
 	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
@@ -171,7 +227,7 @@ static void rkclk_init(struct udevice *dev)
 	 * select dpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	priv->dpll_hz = rkclk_pll_get_rate(cru, DPLL);
+	priv->dpll_hz = rkclk_pll_get_rate(priv, DPLL);
 	aclk_div = priv->dpll_hz / BUS_ACLK_HZ - 1;
 	hclk_div = priv->dpll_hz / BUS_HCLK_HZ - 1;
 	pclk_div = priv->dpll_hz / BUS_PCLK_HZ - 1;
@@ -200,8 +256,8 @@ static void rkclk_init(struct udevice *dev)
 		     pclk_div << PERI_PCLK_DIV_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
 
-	priv->vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
-	priv->vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
+	priv->vpll0_hz = rkclk_pll_get_rate(priv, VPLL0);
+	priv->vpll1_hz = rkclk_pll_get_rate(priv, VPLL1);
 }
 
 static ulong rk3308_i2c_get_clk(struct clk *clk)
@@ -474,13 +530,13 @@ static ulong rk3308_vop_get_clk(struct clk *clk)
 	} else if (vol_sel == DCLK_VOP_SEL_DIVOUT) {
 		switch (pll_sel) {
 		case DCLK_VOP_PLL_SEL_DPLL:
-			parent = rkclk_pll_get_rate(cru, DPLL);
+			parent = rkclk_pll_get_rate(priv, DPLL);
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL0:
-			parent = rkclk_pll_get_rate(cru, VPLL0);
+			parent = rkclk_pll_get_rate(priv, VPLL0);
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL1:
-			parent = rkclk_pll_get_rate(cru, VPLL1);
+			parent = rkclk_pll_get_rate(priv, VPLL1);
 			break;
 		default:
 			printf("do not support this vop pll sel\n");
@@ -551,13 +607,24 @@ static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz)
 
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
 	debug("%s id:%ld\n", __func__, clk->id);
 
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case PLL_APLL:
+		rate = rkclk_pll_get_rate(priv, APLL);
+		break;
+	case PLL_DPLL:
+		rate = rkclk_pll_get_rate(priv, DPLL);
+		break;
+	case PLL_VPLL0:
+		rate = rkclk_pll_get_rate(priv, VPLL0);
+		break;
+	case PLL_VPLL1:
+		rate = rkclk_pll_get_rate(priv, VPLL1);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
@@ -593,12 +660,15 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
+
 	switch (clk->id) {
-	case 0 ... 15:
-		return 0;
+	case PLL_DPLL:
+		ret = rkclk_set_pll(priv, DPLL, rate);
+		break;
 	case HCLK_SDMMC:
 	case HCLK_EMMC:
 	case SCLK_SDMMC:

commit 4af5b92cfb763ab5537066f5c3ce20f3e25747ed
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon May 21 17:20:36 2018 +0800

    clk: rockchip: rk3308: Make clock ids consistent with kernel
    
    Change-Id: I79db3bd2faa4f296efab68d15cae5548314b446f
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
index 1346a6929b..7ba1b86ccd 100644
--- a/include/dt-bindings/clock/rk3308-cru.h
+++ b/include/dt-bindings/clock/rk3308-cru.h
@@ -73,11 +73,11 @@
 #define SCLK_EMMC_SAMPLE	60
 #define SCLK_SFC		61
 #define SCLK_OTG_ADP		62
-#define SCLK_GMAC_SRC		63
-#define SCLK_GMAC		64
+#define SCLK_MAC_SRC		63
+#define SCLK_MAC		64
 #define SCLK_MAC_REF		65
-#define SCLK_GMAC_RX_TX		66
-#define SCLK_GMAC_RMII		67
+#define SCLK_MAC_RX_TX		66
+#define SCLK_MAC_RMII		67
 #define SCLK_DDR_MON_TIMER	68
 #define SCLK_DDR_MON		69
 #define SCLK_DDRCLK		70
@@ -112,18 +112,39 @@
 #define SCLK_SPDIF_RX_DIV	99
 #define SCLK_SPDIF_RX_DIV50	100
 #define SCLK_SPDIF_RX		101
+#define SCLK_I2S0_8CH_TX_MUX	102
+#define SCLK_I2S0_8CH_RX_MUX	103
+#define SCLK_I2S1_8CH_TX_MUX	104
+#define SCLK_I2S1_8CH_RX_MUX	105
+#define SCLK_I2S2_8CH_TX_MUX	106
+#define SCLK_I2S2_8CH_RX_MUX	107
+#define SCLK_I2S3_8CH_TX_MUX	108
+#define SCLK_I2S3_8CH_RX_MUX	109
+#define SCLK_I2S0_8CH_TX_SRC	110
+#define SCLK_I2S0_8CH_RX_SRC	111
+#define SCLK_I2S1_8CH_TX_SRC	112
+#define SCLK_I2S1_8CH_RX_SRC	113
+#define SCLK_I2S2_8CH_TX_SRC	114
+#define SCLK_I2S2_8CH_RX_SRC	115
+#define SCLK_I2S3_8CH_TX_SRC	116
+#define SCLK_I2S3_8CH_RX_SRC	117
+#define SCLK_I2S0_2CH_SRC	118
+#define SCLK_I2S1_2CH_SRC	119
 
 /* dclk */
 #define DCLK_VOP		120
 
 /* aclk */
-#define ACLK_CORE		130
+#define ACLK_BUS_SRC		130
 #define ACLK_BUS		131
-#define ACLK_PERI		132
-#define ACLK_GMAC		133
-#define ACLK_CRYPTO		134
-#define ACLK_VOP		135
-#define ACLK_GIC		136
+#define ACLK_PERI_SRC		132
+#define ACLK_PERI		133
+#define ACLK_MAC		134
+#define ACLK_CRYPTO		135
+#define ACLK_VOP		136
+#define ACLK_GIC		137
+#define ACLK_DMAC0		138
+#define ACLK_DMAC1		139
 
 /* hclk */
 #define HCLK_BUS		150
@@ -156,7 +177,7 @@
 #define PCLK_PERI		192
 #define PCLK_PMU		193
 #define PCLK_AUDIO		194
-#define PCLK_GMAC		195
+#define PCLK_MAC		195
 #define PCLK_ACODEC		196
 #define PCLK_UART0		197
 #define PCLK_UART1		198
@@ -175,14 +196,14 @@
 #define PCLK_TSADC		211
 #define PCLK_TIMER		212
 #define PCLK_OTP_NS		213
-#define PCLK_WDT_NS		214
+#define PCLK_WDT		214
 #define PCLK_GPIO0		215
 #define PCLK_GPIO1		216
 #define PCLK_GPIO2		217
 #define PCLK_GPIO3		218
 #define PCLK_GPIO4		219
 #define PCLK_SGRF		220
-#define PCLK_GRF			221
+#define PCLK_GRF		221
 #define PCLK_USBSD_DET		222
 #define PCLK_DDR_UPCTL		223
 #define PCLK_DDR_MON		224
@@ -327,7 +348,7 @@
 #define SRST_SD_H		122
 #define SRST_NANDC_H		123
 #define SRST_NANDC_N		124
-#define SRST_GMAC_A		125
+#define SRST_MAC_A		125
 
 /* cru_softrst_con8 */
 #define SRST_AUDIO_NIU_H	128

commit d23ec8c4ae7a709b700692f5e3f06ae629c67d8f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 18:09:42 2018 +0800

    rockchip: rockusb: add copatible with legacy upgrade tool
    
    Legacy upgrade tool may not set correct transfer size for cmds,
    and for get flash info there no size in cmnd[7], fix it.
    
    Change-Id: I4060d72bb1f814903ed3c5b6b13689609dc905c8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 9b06812bff..2e89051462 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -189,7 +189,7 @@ static int rkusb_do_read_flash_info(struct fsg_common *common,
 				    struct fsg_buffhd *bh)
 {
 	u8 *buf = (u8 *)bh->buf;
-	u32 len = common->data_size;
+	u32 len = sizeof(struct rk_flash_info);
 	struct rk_flash_info finfo = {
 		.block_size = 1024,
 		.ecc_bits = 0,
@@ -208,6 +208,8 @@ static int rkusb_do_read_flash_info(struct fsg_common *common,
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;
+        /* legacy upgrade_tool does not set correct transfer size */
+	common->data_size = len;
 
 	return len;
 }
@@ -292,6 +294,31 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 	return len;
 }
 
+static void rkusb_fixup_cbwcb(struct fsg_common *common,
+			      struct fsg_buffhd *bh)
+{
+	struct usb_request      *req = bh->outreq;
+	struct fsg_bulk_cb_wrap *cbw = req->buf;
+
+	/* FIXME cbw.DataTransferLength was not set by Upgrade Tool */
+	common->data_size = le32_to_cpu(cbw->DataTransferLength);
+	if (common->data_size == 0) {
+		common->data_size =
+		get_unaligned_be16(&common->cmnd[7]) << 9;
+		printf("Trasfer Length NOT set, please use new version tool\n");
+		debug("%s %d, cmnd1 %x\n", __func__,
+		      get_unaligned_be16(&common->cmnd[7]),
+		      get_unaligned_be16(&common->cmnd[1]));
+	}
+	if (cbw->Flags & USB_BULK_IN_FLAG)
+		common->data_dir = DATA_DIR_TO_HOST;
+	else
+		common->data_dir = DATA_DIR_FROM_HOST;
+
+	/* Not support */
+	common->cmnd[1] = 0;
+}
+
 static int rkusb_cmd_process(struct fsg_common *common,
 			     struct fsg_buffhd *bh, int *reply)
 {
@@ -301,6 +328,7 @@ static int rkusb_cmd_process(struct fsg_common *common,
 
 	dump_cbw(cbw);
 
+	rkusb_fixup_cbwcb(common, bh);
 	if (rkusb_check_lun(common)) {
 		*reply = -EINVAL;
 		return RKUSB_RC_ERROR;

commit d80d7b52d3ac29353027cfb7934e007bad3e7614
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 11:40:24 2018 +0800

    rockchip: rk3328: add vendor storage support for sn
    
    We need to read sn from vendor storage.
    
    Change-Id: If0e41d1eecd66fcf7733fb02e1f6609971ef0d1e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
index aff65d1e1d..b0fe0ad1ee 100644
--- a/configs/rk3328_defconfig
+++ b/configs/rk3328_defconfig
@@ -104,6 +104,7 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 55a83ed534dd026951bfa4277f5c82b0b07cb843
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 11:39:28 2018 +0800

    rockchip: gva-rk3229: add fastboot key detect
    
    Since the common board init do not detect the fastboot key,
    we need to add it in gva board init.
    
    Change-Id: I7f5ea5df740e855c1ec4f64092450d028321200b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
index ece9ed57a9..c6c4ae2433 100644
--- a/board/rockchip/gva_rk3229/gva_rk3229.c
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <misc.h>
 #include <time.h>
+#include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/setup.h>
 #include <asm/arch/uart.h>
@@ -102,3 +103,22 @@ void get_board_serial(struct tag_serialnr *serialnr)
 	serialnr->low = (u32)(serial & 0xffffffff);
 }
 #endif
+
+#define FASTBOOT_KEY_GPIO 43 /*GPIO1B3*/
+
+int fastboot_key_pressed(void)
+{
+	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
+	gpio_direction_input(FASTBOOT_KEY_GPIO);
+	return !gpio_get_value(FASTBOOT_KEY_GPIO);
+}
+
+int rk_board_late_init(void)
+{
+	if (fastboot_key_pressed()) {
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+	}
+
+	return 0;
+}

commit 99fa2bd0a6eb6ad5161bfeeeaa6f9b03b87d4bbd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jun 4 11:38:24 2018 +0800

    rockchip: board: remove fastboot key detect
    
    Most of rockchip board do not have a fastboot key, remove it
    from common board init.
    Boards need to add it back in per-board init if needed.
    
    Change-Id: I8e3ae1f767485ae075811f406c6822f333d1bd78
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 62dab89b99..70ce25c25c 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -101,14 +101,6 @@ int fb_set_reboot_flag(void)
 
 	return 0;
 }
-
-#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
-static int fastboot_key_pressed(void)
-{
-	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
-	gpio_direction_input(FASTBOOT_KEY_GPIO);
-	return !gpio_get_value(FASTBOOT_KEY_GPIO);
-}
 #endif
 
 #ifdef CONFIG_DM_CHARGE_DISPLAY
@@ -142,13 +134,6 @@ __weak int rk_board_late_init(void)
 
 int board_late_init(void)
 {
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-	if (fastboot_key_pressed()) {
-		printf("fastboot key pressed!\n");
-		fb_set_reboot_flag();
-	}
-#endif
-
 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
 	setup_boot_mode();
 #endif

commit 1203ea6358458cbf8343d2decdda06058970715c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 31 15:48:52 2018 +0800

    rockchip: vendor: unify vendor_ops return value
    
    The blk_dread will return cnt if execute successful.
    This is different with blk_dwrite. So unify the return
    value in function vendor_ops.
    
    Change-Id: I31a91b2281de840a06e2d8c96a7316202d2d5424
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 71f318cd37..7848d71660 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -142,16 +142,13 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
 	default:
-		debug("[Vednor ERROR]:Boot device type is invalid!\n");
-		ret = -ENODEV;
-		break;
-	}
-	if (!ret) {
-		if (write)
-			ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
-		else
-			ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
+		printf("[Vednor ERROR]:Boot device type is invalid!\n");
+		return -ENODEV;
 	}
+	if (write)
+		ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
+	else
+		ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
 	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
 	return ret;
@@ -231,7 +228,7 @@ int vendor_storage_init(void)
 	/* Find valid and up-to-date one from (vendor0 - vendor3) */
 	for (i = 0; i < VENDOR_PART_NUM; i++) {
 		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
-		if (ret)
+		if (ret < 0)
 			return ret;
 
 		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
@@ -281,7 +278,7 @@ int vendor_storage_read(u16 id, void *pbuf, u16 size)
 	/* init vendor storage */
 	if (!bootdev_type) {
 		ret = vendor_storage_init();
-		if (ret)
+		if (ret < 0)
 			return ret;
 	}
 
@@ -312,7 +309,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	/* init vendor storage */
 	if (!bootdev_type) {
 		ret = vendor_storage_init();
-		if (ret)
+		if (ret < 0)
 			return ret;
 	}
 
@@ -332,7 +329,7 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 		break;
 	}
 	/* Invalid bootdev? */
-	if (ret)
+	if (ret < 0)
 		return ret;
 
 	next_index = vendor_info.hdr->next_index;
@@ -489,7 +486,7 @@ int vendor_storage_test(void)
 	for (id = 0; id < item_num; id++) {
 		memset(buffer, id, size);
 		ret = vendor_storage_write(id, buffer, size);
-		if (ret) {
+		if (ret < 0) {
 			printf("[Vendor Test]:vendor write failed(id=%d)!\n", id);
 			free(buffer);
 			return ret;
@@ -572,7 +569,7 @@ int vendor_storage_test(void)
 	id = 0;
 	printf("[Vendor Test]:id=%d, size=%d.\n", id, size);
 	ret = vendor_storage_write(id, buffer, size);
-	if (!ret)
+	if (ret == size)
 		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:OK\n");
 	else
 		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:Failed\n");
@@ -585,7 +582,7 @@ int vendor_storage_test(void)
 	for (id = 0; id <= item_num; id++) {
 		memset(buffer, id, size);
 		ret = vendor_storage_write(id, buffer, size);
-		if (ret) {
+		if (ret < 0) {
 			if ((id == item_num) && (ret == -ENOMEM)) {
 				printf("[Vendor Test]:<Total memory overflow> Test End, States:OK\n");
 				break;

commit 064b2675e01d61deadaf6161f699f53f611f4913
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jun 1 17:42:16 2018 +0800

    rockchip: board: support get serialno
    
    The serialno is used to identify the device.
    Serialno can be got from vendor storage, efuse,
    and generated ramdom. The order is:
    vendor storage > cpuid(efuse) > ramdom
    
    Change-Id: Ic805848d59eec761fe1eac6ee43558b2ba06e3c8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index e5c54ee541..62dab89b99 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -10,6 +10,8 @@
 #include <ram.h>
 #include <syscon.h>
 #include <asm/io.h>
+#include <asm/arch/vendor.h>
+#include <misc.h>
 #include <asm/gpio.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
@@ -28,6 +30,67 @@
 #include <dm/root.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+/* define serialno max length, the max length is 512 Bytes
+ * The remaining bytes are used to ensure that the first 512 bytes
+ * are valid when executing 'env_set("serial#", value)'.
+ */
+#define VENDOR_SN_MAX	513
+#define CPUID_LEN       0x10
+#define CPUID_OFF       0x7
+
+static int rockchip_set_serialno(void)
+{
+	char serialno_str[VENDOR_SN_MAX];
+	int ret = 0, i;
+	u8 cpuid[CPUID_LEN] = {0};
+	u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2];
+	u64 serialno;
+
+	/* Read serial number from vendor storage part */
+	memset(serialno_str, 0, VENDOR_SN_MAX);
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
+	if (ret > 0) {
+		env_set("serial#", serialno_str);
+	} else {
+#endif
+#ifdef CONFIG_ROCKCHIP_EFUSE
+		struct udevice *dev;
+
+		/* retrieve the device */
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_GET_DRIVER(rockchip_efuse), &dev);
+		if (ret) {
+			printf("%s: could not find efuse device\n", __func__);
+			return ret;
+		}
+		/* read the cpu_id range from the efuses */
+		ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid));
+		if (ret) {
+			printf("%s: reading cpuid from the efuses failed\n", __func__);
+			return ret;
+		}
+#else
+		/* generate random cpuid */
+		for (i = 0; i < CPUID_LEN; i++) {
+			cpuid[i] = (u8)(rand());
+		}
+#endif
+		/* Generate the serial number based on CPU ID */
+		for (i = 0; i < 8; i++) {
+			low[i] = cpuid[1 + (i << 1)];
+			high[i] = cpuid[i << 1];
+		}
+		serialno = crc32_no_comp(0, low, 8);
+		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
+		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+
+		env_set("serial#", serialno_str);
+#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+	}
+#endif
+	return ret;
+}
 
 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
 int fb_set_reboot_flag(void)
@@ -97,6 +160,7 @@ int board_late_init(void)
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
 #endif
+	rockchip_set_serialno();
 
 	return rk_board_late_init();
 }

commit 348264084d7b5cee05333cdf825599c803726081
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 31 14:45:14 2018 +0800

    rockchip: vendor: fix compile warning in arm64
    
    Change-Id: I578344812ea2ac1cb1142244741b827b8714d47a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index 627e123339..71f318cd37 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -256,7 +256,9 @@ int vendor_storage_init(void)
 		vendor_info.hdr->version = 1;
 		vendor_info.hdr->tag = VENDOR_TAG;
 		/* data field length */
-		vendor_info.hdr->free_size = ((u32)vendor_info.hash - (u32)vendor_info.data);
+		vendor_info.hdr->free_size =
+			((u32)(size_t)vendor_info.hash
+			- (u32)(size_t)vendor_info.data);
 		*(vendor_info.version2) = vendor_info.hdr->version;
 	}
 	debug("[Vednor INFO]:ret=%d.\n", ret);

commit 05b226ad5bcb86f584a3a6099daa83c8f7529dea
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:49:49 2018 +0800

    rockchip: clk: rk3328: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: I6bae4b3e540f2d70f50615bf7cff0af99908f859
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index dcf0d4028d..c0cfcf1f19 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -767,7 +767,7 @@ static int rk3328_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3328_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 
 	return 0;
 }

commit 7d9cf22de952def3ef629d5d5f9276b660cfd7de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:49:30 2018 +0800

    rockchip: clk: rk3288: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: Ia0c7e42beff1442055156d2125d35a58b5be8b13
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index b730cefbf7..c18d7819bc 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -1030,7 +1030,7 @@ static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3288_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3288_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit b1cc17a3f7a28abac0b7b825aec7876190349daf
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:49:05 2018 +0800

    rockchip: clk: rk3188: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: Ib0903a0ec7b0602fb2f78bab65c44db071f13bd0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index ad00d6e0e1..287c44093c 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -571,7 +571,7 @@ static int rk3188_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3188_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3188_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit 11143e9c4538f7546983efd15c3fc49845f4bef3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:48:14 2018 +0800

    rockchip: clk: rk3066: convert to live dt
    
    Use dev_read_addr_ptr to get cru base
    
    Change-Id: I22d0a98ff29d894ec777574f93f145c55383ffa0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index e15273268e..57f8640089 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -530,7 +530,7 @@ static int rk3066_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3066_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3066_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit dae34b54f3a34571449e91630b118c62d3903ae7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:47:23 2018 +0800

    rockchip: rk3328: add common config
    
    Add common config to support rkimg/android image.
    
    Change-Id: I58ef7a9155abdbe22a82b24cdd8412b71b62e276
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rk3328_defconfig b/configs/rk3328_defconfig
new file mode 100644
index 0000000000..aff65d1e1d
--- /dev/null
+++ b/configs/rk3328_defconfig
@@ -0,0 +1,111 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 26258180d667da3d2dae0df4abc1867c63093d2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:46:55 2018 +0800

    rockchip: rk3328: config: update for rkimg support
    
    Change-Id: Ia1599b94f6a243bd75edb923d7956a45396193ac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/Kconfig b/arch/arm/mach-rockchip/rk3328/Kconfig
index 43afba2430..def8381cbc 100644
--- a/arch/arm/mach-rockchip/rk3328/Kconfig
+++ b/arch/arm/mach-rockchip/rk3328/Kconfig
@@ -5,6 +5,7 @@ choice
 
 config TARGET_EVB_RK3328
 	bool "RK3328 evaluation board"
+	select BOARD_LATE_INIT
 	help
 	  RK3328evb is a evaluation board for Rockchip rk3328,
 	  with full function and phisical connectors support like
diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index 87f2c9e21a..2f16ddbed5 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -13,8 +13,6 @@
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 
-#define CONFIG_CONSOLE_SCROLL_LINES		10
-
 #ifndef CONFIG_SPL_BUILD
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index a55dd5e644..03b6ce4955 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -57,17 +57,20 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02000000\0" \
+	"kernel_addr_r=0x02080000\0" \
 	"ramdisk_addr_r=0x04000000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	"partitions=" PARTS_DEFAULT \
 	BOOTENV
 
 #endif
 
+#define CONFIG_PREBOOT
+
 /* rockchip ohci host driver */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1

commit a14c50f0dfd10c2337745490166090f9f1cd6710
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 11:07:39 2018 +0800

    rockchip: test: eth: fix build error
    
    add header file for cli;
    use simplg_strtoul() instead of strtoul();
    
    Change-Id: I274710be24132fd9188be4b2283bea747bcfe667
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-eth.c b/test/rockchip/test-eth.c
index 364e106f54..4e04416935 100644
--- a/test/rockchip/test-eth.c
+++ b/test/rockchip/test-eth.c
@@ -6,6 +6,7 @@
 
 #include <asm/io.h>
 #include <adc.h>
+#include <cli.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
@@ -274,15 +275,15 @@ int board_eth_test(int argc, char * const argv[])
 		break;
 	case 4:
 		if (!strncmp(argv[2], "loopback", sizeof("loopback"))) {
-			speed = strtoul(argv[3], NULL, 0);
+			speed = simple_strtoul(argv[3], NULL, 0);
 			ret = eth_loopback_test(speed, 0);
 			return ret;
 		}
 		break;
 	case 5:
 		if (!strncmp(argv[2], "delayline", sizeof("delayline"))) {
-			tx_delay = strtoul(argv[3], NULL, 0);
-			rx_delay = strtoul(argv[4], NULL, 0);
+			tx_delay = simple_strtoul(argv[3], NULL, 0);
+			rx_delay = simple_strtoul(argv[4], NULL, 0);
 			gmac_set_rgmii(current, tx_delay, rx_delay);
 			return 0;
 		}

commit 49f41c7b1e4112d3adbbf3bebf4277782312da7c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 15:47:02 2018 +0800

    part: efi: fix error pointer for buffer pte
    
    Set to NULL after the pointer is free.
    
    Change-Id: I7fd703984514295bc9e5eea34808e0ac941bdb30
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index a83558a976..f2454e28d3 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -276,7 +276,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 		gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
 
 	/* We suppose different dev have different size, eg. emmc vs sd */
-	if (!gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
+	if (gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
 		gpt_pte = NULL;
 
 	/* "part" argument must be at least 1 */
@@ -985,6 +985,7 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 
 	if (validate_gpt_entries(pgpt_head, *pgpt_pte)) {
 		free(*pgpt_pte);
+		*pgpt_pte = NULL;
 		return 0;
 	}
 

commit 52ae0af19e68659c6024c69a39f0b5e40062f9c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 1 10:50:20 2018 +0800

    rockchip: clk: rv1108: use ofdata_to_platdata for cru base
    
    We use ofdata_to_platdata() to get cru base from dtb,
    update the api with support for live dt.
    
    Change-Id: I652c82a427693093d4ceca5d747543af945b0986
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index cbaf0b2913..266d012258 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -518,11 +518,18 @@ static void rkclk_init(struct rv1108_cru *cru)
 	       aclk_bus, aclk_peri, hclk_peri, pclk_peri);
 }
 
-static int rv1108_clk_probe(struct udevice *dev)
+static int rv1108_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rv1108_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rv1108_clk_probe(struct udevice *dev)
+{
+	struct rv1108_clk_priv *priv = dev_get_priv(dev);
 
 	rkclk_init(priv->cru);
 
@@ -577,5 +584,6 @@ U_BOOT_DRIVER(clk_rv1108) = {
 	.priv_auto_alloc_size = sizeof(struct rv1108_clk_priv),
 	.ops		= &rv1108_clk_ops,
 	.bind		= rv1108_clk_bind,
+	.ofdata_to_platdata	= rv1108_clk_ofdata_to_platdata,
 	.probe		= rv1108_clk_probe,
 };

commit 640d29ee2a27c709709a44f7959c4581ff5bfb92
Author: Lin Huang <hl@rock-chips.com>
Date:   Tue May 29 11:02:55 2018 +0800

    config: rk3288: support android boot image
    
    The boot.img will instead of the kernel.img and resource.img on linux
    platform, so need to support android boot image in rk3288 uboot.
    
    Change-Id: I6d7d42d80026cad594e720e279b7213dd4adcadd
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 11c323dae5..7c155cd7be 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
@@ -17,6 +16,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 64c4827879..37c5ee6556 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
@@ -18,6 +17,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 8d2809b6aa..1d3856a08e 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
@@ -17,6 +16,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 7c4cbfc7e1..7b76be8f3a 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_MIQI_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
@@ -17,6 +16,9 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index b0eed9b4eb..91611c1cd4 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -30,6 +30,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
 
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/*  64M */
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000
 

commit 1ba474786a542a5836475b7684fed1ad5ebca0d0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 30 16:28:34 2018 +0800

    make.sh: support pack ARM64 AArch32 trust.img
    
    Change-Id: Ic04bc1624505200989301c904194a41b043ec16b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 2e1fa79343..d6f1c41ae9 100755
--- a/make.sh
+++ b/make.sh
@@ -209,10 +209,14 @@ pack_mass_trust_image()
 
 pack_trust_image()
 {
-	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000 AARCH32
 
 	# ARM64 uses trust_merger
 	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
+		if grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' ${OUTDIR}/.config ; then
+			AARCH32=AARCH32
+		fi
+
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
 			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return
@@ -222,17 +226,17 @@ pack_trust_image()
 
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
 		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
 		# RK3368 use rk big endian SHA256, it's pack magic is "2"
 		elif [ $RKCHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
 		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini
 		fi
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}${AARCH32}TRUST.ini"
 	# ARM uses loaderimage
 	else
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then

commit 76a38da738e8d6eab8a4ae8460a0678386aa1cb8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 30 14:34:19 2018 +0800

    configs: add android6.0-rk3399_defconfig
    
    This is a copy from evb-rk3399_defconfig
    
    Change-Id: I2c9511252da97832ca7774f399170ea7494ee2e4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/android6.0-rk3399_defconfig b/configs/android6.0-rk3399_defconfig
new file mode 100644
index 0000000000..2a907019bd
--- /dev/null
+++ b/configs/android6.0-rk3399_defconfig
@@ -0,0 +1,104 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 5cb579f13bf7e1a5e850c392a6c9197881ae8176
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu May 31 14:29:49 2018 +0800

    rockchip: clk: rv1108: Add some frequency setting interfaces
    
    support PLL freq setting,
    support bus and peri clk freq setting,
    support aclk vio and dclk vop freq setting.
    
    Change-Id: I894552c1e1bb1bd13a143e200edf289234a53c1d
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index f7b8c13d0f..b57c07e55e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -12,7 +12,11 @@
 #define OSC_HZ		(24 * 1000 * 1000)
 
 #define APLL_HZ		(600 * 1000000)
-#define GPLL_HZ		(594 * 1000000)
+#define GPLL_HZ		(1188 * 1000000)
+#define ACLK_PERI_HZ	(148500000)
+#define HCLK_PERI_HZ	(148500000)
+#define PCLK_PERI_HZ	(74250000)
+#define ACLK_BUS_HZ	(148500000)
 
 struct rv1108_clk_priv {
 	struct rv1108_cru *cru;
@@ -110,6 +114,7 @@ enum {
 	ACLK_BUS_PLL_SEL_DPLL		= 2,
 	ACLK_BUS_DIV_CON_SHIFT		= 0,
 	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+	ACLK_BUS_DIV_CON_WIDTH		= 5,
 
 	/* CLKSEL_CON3 */
 	PCLK_BUS_DIV_CON_SHIFT		= 8,
@@ -139,6 +144,7 @@ enum {
 	HCLK_PERI_DIV_CON_MASK		= 0x1f << HCLK_PERI_DIV_CON_SHIFT,
 	ACLK_PERI_DIV_CON_SHIFT		= 0,
 	ACLK_PERI_DIV_CON_MASK		= 0x1f,
+	PERI_DIV_CON_WIDTH		= 5,
 
 	/* CLKSEL24_CON */
 	MAC_PLL_SEL_SHIFT		= 12,
@@ -158,6 +164,38 @@ enum {
 	SFC_CLK_DIV_SHIFT		= 0,
 	SFC_CLK_DIV_MASK		= 0x3f << SFC_CLK_DIV_SHIFT,
 
+	/* CLKSEL28_CON */
+	ACLK_VIO1_PLL_SEL_SHIFT		= 14,
+	ACLK_VIO1_PLL_SEL_MASK		= 3 << ACLK_VIO1_PLL_SEL_SHIFT,
+	VIO_PLL_SEL_DPLL		= 0,
+	VIO_PLL_SEL_GPLL		= 1,
+	ACLK_VIO1_CLK_DIV_SHIFT		= 8,
+	ACLK_VIO1_CLK_DIV_MASK		= 0x1f << ACLK_VIO1_CLK_DIV_SHIFT,
+	CLK_VIO_DIV_CON_WIDTH		= 5,
+	ACLK_VIO0_PLL_SEL_SHIFT		= 6,
+	ACLK_VIO0_PLL_SEL_MASK		= 3 << ACLK_VIO0_PLL_SEL_SHIFT,
+	ACLK_VIO0_CLK_DIV_SHIFT		= 0,
+	ACLK_VIO0_CLK_DIV_MASK		= 0x1f << ACLK_VIO0_CLK_DIV_SHIFT,
+
+	/* CLKSEL29_CON */
+	PCLK_VIO_CLK_DIV_SHIFT		= 8,
+	PCLK_VIO_CLK_DIV_MASK		= 0x1f << PCLK_VIO_CLK_DIV_SHIFT,
+	HCLK_VIO_CLK_DIV_SHIFT		= 0,
+	HCLK_VIO_CLK_DIV_MASK		= 0x1f << HCLK_VIO_CLK_DIV_SHIFT,
+
+	/* CLKSEL32_CON */
+	DCLK_VOP_SEL_SHIFT		= 7,
+	DCLK_VOP_SEL_MASK		= 1 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_SEL_HDMI		= 0,
+	DCLK_VOP_SEL_PLL		= 1,
+	DCLK_VOP_PLL_SEL_SHIFT		= 6,
+	DCLK_VOP_PLL_SEL_MASK		= 1 << DCLK_VOP_PLL_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_GPLL		= 0,
+	DCLK_VOP_PLL_SEL_DPLL		= 1,
+	DCLK_VOP_CLK_DIV_SHIFT		= 0,
+	DCLK_VOP_CLK_DIV_MASK		= 0x3f << DCLK_VOP_CLK_DIV_SHIFT,
+	DCLK_VOP_DIV_CON_WIDTH		= 6,
+
 	/* SOFTRST1_CON*/
 	DDRPHY_SRSTN_CLKDIV_REQ_SHIFT	= 0,
 	DDRPHY_SRSTN_CLKDIV_REQ		= 1,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index a6c5c47ad8..cbaf0b2913 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -37,6 +37,9 @@ enum {
 			 #hz "Hz cannot be hit with PLL "\
 			 "divisors on line " __stringify(__LINE__));
 
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+
 /* use integer mode */
 static inline int rv1108_pll_id(enum rk_clk_id clk_id)
 {
@@ -59,6 +62,58 @@ static inline int rv1108_pll_id(enum rk_clk_id clk_id)
 	return id;
 }
 
+static int rkclk_set_pll(struct rv1108_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div)
+{
+	int pll_id = rv1108_pll_id(clk_id);
+	struct rv1108_pll *pll = &cru->pll[pll_id];
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(&pll->con3, WORK_MODE_MASK,
+		     WORK_MODE_SLOW << WORK_MODE_SHIFT);
+
+	/* use integer mode */
+	rk_setreg(&pll->con3, 1 << DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con3, 1 << GLOBAL_POWER_DOWN_SHIFT);
+
+	rk_clrsetreg(&pll->con0, FBDIV_MASK, div->fbdiv << FBDIV_SHIFT);
+	rk_clrsetreg(&pll->con1, POSTDIV1_MASK | POSTDIV2_MASK | REFDIV_MASK,
+		     (div->postdiv1 << POSTDIV1_SHIFT |
+		     div->postdiv2 << POSTDIV2_SHIFT |
+		     div->refdiv << REFDIV_SHIFT));
+	rk_clrsetreg(&pll->con2, FRACDIV_MASK,
+		     (div->refdiv << REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con3, 1 << GLOBAL_POWER_DOWN_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con2) & (1 << LOCK_STA_SHIFT))
+		udelay(1);
+
+	/*
+	 * set PLL into normal mode.
+	 */
+	rk_clrsetreg(&pll->con3, WORK_MODE_MASK,
+		     WORK_MODE_NORMAL << WORK_MODE_SHIFT);
+
+	return 0;
+}
+
 static uint32_t rkclk_pll_get_rate(struct rv1108_cru *cru,
 				   enum rk_clk_id clk_id)
 {
@@ -76,7 +131,7 @@ static uint32_t rkclk_pll_get_rate(struct rv1108_cru *cru,
 		fbdiv = (con0 >> FBDIV_SHIFT) & FBDIV_MASK;
 		postdiv1 = (con1 & POSTDIV1_MASK) >> POSTDIV1_SHIFT;
 		postdiv2 = (con1 & POSTDIV2_MASK) >> POSTDIV2_SHIFT;
-		refdiv = (con1 & REFDIV_MASK) >> REFDIV_SHIFT;
+		refdiv = (con1 >> REFDIV_SHIFT) & REFDIV_MASK;
 		freq = (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
 	} else {
 		freq = OSC_HZ;
@@ -156,6 +211,205 @@ static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz)
 	return rv1108_saradc_get_clk(cru);
 }
 
+static ulong rv1108_aclk_vio1_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[28]);
+	div = bitfield_extract(val, ACLK_VIO1_CLK_DIV_SHIFT,
+			       CLK_VIO_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_aclk_vio1_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     ACLK_VIO1_CLK_DIV_MASK | ACLK_VIO1_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_VIO1_CLK_DIV_SHIFT) |
+		     (VIO_PLL_SEL_GPLL << ACLK_VIO1_PLL_SEL_SHIFT));
+
+	return rv1108_aclk_vio1_get_clk(cru);
+}
+
+static ulong rv1108_aclk_vio0_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[28]);
+	div = bitfield_extract(val, ACLK_VIO0_CLK_DIV_SHIFT,
+			       CLK_VIO_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_aclk_vio0_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[28],
+		     ACLK_VIO0_CLK_DIV_MASK | ACLK_VIO0_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_VIO0_CLK_DIV_SHIFT) |
+		     (VIO_PLL_SEL_GPLL << ACLK_VIO0_PLL_SEL_SHIFT));
+
+	/*HCLK_VIO default div = 4*/
+	rk_clrsetreg(&cru->clksel_con[29],
+		     HCLK_VIO_CLK_DIV_MASK,
+		     3 << HCLK_VIO_CLK_DIV_SHIFT);
+	/*PCLK_VIO default div = 4*/
+	rk_clrsetreg(&cru->clksel_con[29],
+		     PCLK_VIO_CLK_DIV_MASK,
+		     3 << PCLK_VIO_CLK_DIV_SHIFT);
+
+	return rv1108_aclk_vio0_get_clk(cru);
+}
+
+static ulong rv1108_dclk_vop_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[32]);
+	div = bitfield_extract(val, DCLK_VOP_CLK_DIV_SHIFT,
+			       DCLK_VOP_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong rv1108_dclk_vop_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1;
+	assert(src_clk_div < 64);
+
+	rk_clrsetreg(&cru->clksel_con[32],
+		     DCLK_VOP_CLK_DIV_MASK | DCLK_VOP_PLL_SEL_MASK |
+		     DCLK_VOP_SEL_SHIFT,
+		     (src_clk_div << DCLK_VOP_CLK_DIV_SHIFT) |
+		     (DCLK_VOP_PLL_SEL_GPLL << DCLK_VOP_PLL_SEL_SHIFT) |
+		     (DCLK_VOP_SEL_PLL << DCLK_VOP_SEL_SHIFT));
+
+	return rv1108_dclk_vop_get_clk(cru);
+}
+
+static ulong rv1108_aclk_bus_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[2]);
+	div = bitfield_extract(val, ACLK_BUS_DIV_CON_SHIFT,
+			       ACLK_BUS_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_aclk_bus_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[2],
+		     ACLK_BUS_DIV_CON_MASK | ACLK_BUS_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_BUS_DIV_CON_SHIFT) |
+		     (ACLK_BUS_PLL_SEL_GPLL << ACLK_BUS_PLL_SEL_SHIFT));
+
+	return rv1108_aclk_bus_get_clk(cru);
+}
+
+static ulong rv1108_aclk_peri_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, ACLK_PERI_DIV_CON_SHIFT,
+			       PERI_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_hclk_peri_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, HCLK_PERI_DIV_CON_SHIFT,
+			       PERI_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_pclk_peri_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, PCLK_PERI_DIV_CON_SHIFT,
+			       PERI_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(parent_rate, div);
+}
+
+static ulong rv1108_aclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     ACLK_PERI_DIV_CON_MASK | ACLK_PERI_PLL_SEL_MASK,
+		     (src_clk_div << ACLK_PERI_DIV_CON_SHIFT) |
+		     (ACLK_PERI_PLL_SEL_GPLL << ACLK_PERI_PLL_SEL_SHIFT));
+
+	return rv1108_aclk_peri_get_clk(cru);
+}
+
+static ulong rv1108_hclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     HCLK_PERI_DIV_CON_MASK,
+		     (src_clk_div << HCLK_PERI_DIV_CON_SHIFT));
+
+	return rv1108_hclk_peri_get_clk(cru);
+}
+
+static ulong rv1108_pclk_peri_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+	ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL);
+
+	src_clk_div = DIV_ROUND_UP(parent_rate, hz) - 1;
+	assert(src_clk_div < 32);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     PCLK_PERI_DIV_CON_MASK,
+		     (src_clk_div << PCLK_PERI_DIV_CON_SHIFT));
+
+	return rv1108_pclk_peri_get_clk(cru);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -165,6 +419,20 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 		return rkclk_pll_get_rate(priv->cru, clk->id);
 	case SCLK_SARADC:
 		return rv1108_saradc_get_clk(priv->cru);
+	case ACLK_VIO0:
+		return rv1108_aclk_vio0_get_clk(priv->cru);
+	case ACLK_VIO1:
+		return rv1108_aclk_vio1_get_clk(priv->cru);
+	case DCLK_VOP:
+		return rv1108_dclk_vop_get_clk(priv->cru);
+	case ACLK_PRE:
+		return rv1108_aclk_bus_get_clk(priv->cru);
+	case ACLK_PERI:
+		return rv1108_aclk_peri_get_clk(priv->cru);
+	case HCLK_PERI:
+		return rv1108_hclk_peri_get_clk(priv->cru);
+	case PCLK_PERI:
+		return rv1108_pclk_peri_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -185,6 +453,27 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		new_rate = rv1108_saradc_set_clk(priv->cru, rate);
 		break;
+	case ACLK_VIO0:
+		new_rate = rv1108_aclk_vio0_set_clk(priv->cru, rate);
+		break;
+	case ACLK_VIO1:
+		new_rate = rv1108_aclk_vio1_set_clk(priv->cru, rate);
+		break;
+	case DCLK_VOP:
+		new_rate = rv1108_dclk_vop_set_clk(priv->cru, rate);
+		break;
+	case ACLK_PRE:
+		new_rate = rv1108_aclk_bus_set_clk(priv->cru, rate);
+		break;
+	case ACLK_PERI:
+		new_rate = rv1108_aclk_peri_set_clk(priv->cru, rate);
+		break;
+	case HCLK_PERI:
+		new_rate = rv1108_hclk_peri_set_clk(priv->cru, rate);
+		break;
+	case PCLK_PERI:
+		new_rate = rv1108_pclk_peri_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -199,14 +488,34 @@ static const struct clk_ops rv1108_clk_ops = {
 
 static void rkclk_init(struct rv1108_cru *cru)
 {
-	unsigned int apll = rkclk_pll_get_rate(cru, CLK_ARM);
-	unsigned int dpll = rkclk_pll_get_rate(cru, CLK_DDR);
-	unsigned int gpll = rkclk_pll_get_rate(cru, CLK_GENERAL);
+	unsigned int apll, dpll, gpll;
+	unsigned int aclk_bus, aclk_peri, hclk_peri, pclk_peri;
+
+	aclk_bus = rv1108_aclk_bus_set_clk(cru, ACLK_BUS_HZ / 2);
+	aclk_peri = rv1108_aclk_peri_set_clk(cru, ACLK_PERI_HZ / 2);
+	hclk_peri = rv1108_hclk_peri_set_clk(cru, HCLK_PERI_HZ / 2);
+	pclk_peri = rv1108_pclk_peri_set_clk(cru, PCLK_PERI_HZ / 2);
+	rv1108_aclk_vio0_set_clk(cru, 297000000);
+	rv1108_aclk_vio1_set_clk(cru, 297000000);
+
+	/* configure apll */
+	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+	aclk_bus = rv1108_aclk_bus_set_clk(cru, ACLK_BUS_HZ);
+	aclk_peri = rv1108_aclk_peri_set_clk(cru, ACLK_PERI_HZ);
+	hclk_peri = rv1108_hclk_peri_set_clk(cru, HCLK_PERI_HZ);
+	pclk_peri = rv1108_pclk_peri_set_clk(cru, PCLK_PERI_HZ);
+
+	apll = rkclk_pll_get_rate(cru, CLK_ARM);
+	dpll = rkclk_pll_get_rate(cru, CLK_DDR);
+	gpll = rkclk_pll_get_rate(cru, CLK_GENERAL);
 
 	rk_clrsetreg(&cru->clksel_con[0], CORE_CLK_DIV_MASK,
 		     0 << MAC_CLK_DIV_SHIFT);
 
 	printf("APLL: %d DPLL:%d GPLL:%d\n", apll, dpll, gpll);
+	printf("ACLK_BUS: %d ACLK_PERI:%d HCLK_PERI:%d PCLK_PERI:%d\n",
+	       aclk_bus, aclk_peri, hclk_peri, pclk_peri);
 }
 
 static int rv1108_clk_probe(struct udevice *dev)
diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h
index 7defc6b282..dcc6e42463 100644
--- a/include/dt-bindings/clock/rv1108-cru.h
+++ b/include/dt-bindings/clock/rv1108-cru.h
@@ -41,6 +41,7 @@
 #define SCLK_MACREF_OUT			90
 #define SCLK_SARADC			91
 
+#define DCLK_VOP                        187
 
 /* aclk gates */
 #define ACLK_DMAC			192
@@ -48,7 +49,9 @@
 #define ACLK_CORE			194
 #define ACLK_ENMCORE			195
 #define ACLK_GMAC			196
-
+#define ACLK_VIO0                       200
+#define ACLK_VIO1                       201
+#define ACLK_PERI                       209
 
 /* pclk gates */
 #define PCLK_GPIO1			256
@@ -69,6 +72,7 @@
 #define PCLK_PERI			271
 #define PCLK_GMAC			272
 #define PCLK_SARADC			273
+#define PCLK_VIO                        276
 
 /* hclk gates */
 #define HCLK_I2S0_8CH			320
@@ -80,8 +84,9 @@
 #define HCLK_EMMC			326
 #define HCLK_PERI			327
 #define HCLK_SFC			328
+#define HCLK_VIO                        332
 
-#define CLK_NR_CLKS			(HCLK_SFC + 1)
+#define CLK_NR_CLKS			(HCLK_VIO + 1)
 
 /* reset id */
 #define SRST_CORE_PO_AD		0

commit 3b296e2b3d2e422038b490a1aaa54033804346f9
Author: MengDongyang <daniel.meng@rock-chips.com>
Date:   Tue May 29 04:59:28 2018 -0700

    rockchip: dts: rv1108: correct the reference of u2phy
    
    The reference of u2phy should be OTG port or host port in
    the DT node of USB controller. Because the phy ops is bind
    to each port or u2phy. So it will result in a NULL point if
    we use the parent DT node as reference. This patch change
    <&u2phy 1> to <&u2phy_otg> and <&u2phy_host> to solve this
    problem.
    
    Change-Id: I7e8fc5fcdeb1ce188c857bb3c5caa23aa713988e
    Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 7349239007..da3123b8d1 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -218,7 +218,7 @@
 		compatible = "generic-ehci";
 		reg = <0x30140000 0x20000>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -227,7 +227,7 @@
 		compatible = "generic-ohci";
 		reg = <0x30160000 0x20000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
-		phys = <&u2phy 1>;
+		phys = <&u2phy_host>;
 		phy-names = "usb";
 		status = "disabled";
 	};
@@ -239,7 +239,7 @@
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
-		phys = <&u2phy 0>;
+		phys = <&u2phy_otg>;
 		phy-names = "usb";
 		status = "disabled";
 	};

commit 5cfdc12322e0357b93ce91105b5797d07be3b9a9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 7 16:00:16 2018 +0800

    pmic: rk8xx: make relative message more clear
    
    1. adjust error message easy to be understood;
    2. show RK808 chip id as "RK808";
    3. check PMIC chip id read failed;
    
    Change-Id: Ifc4c25ccc8cac4fdd91bcf6515b1dd6aa1bf71fa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 6dc3edb13c..732f3dca5e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -56,7 +56,7 @@ static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret) {
-		debug("write error to device: %p register: %#x!", dev, reg);
+		printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
 		return ret;
 	}
 
@@ -69,7 +69,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret) {
-		debug("read error from device: %p register: %#x!", dev, reg);
+		printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
 		return ret;
 	}
 
@@ -105,16 +105,14 @@ static int rk8xx_shutdown(struct udevice *dev)
 
 	ret = dm_i2c_read(dev, devctrl_reg, &val, 1);
 	if (ret) {
-		printf("read error from device: %p register: %#x!",
-		       dev, devctrl_reg);
+		printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, devctrl_reg, ret);
 		return ret;
 	}
 
 	val |= dev_off;
 	ret = dm_i2c_write(dev, devctrl_reg, &val, 1);
 	if (ret) {
-		printf("write error to device: %p register: %#x!",
-		       dev, devctrl_reg);
+		printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, devctrl_reg, ret);
 		return ret;
 	}
 
@@ -129,7 +127,7 @@ static int rk8xx_bind(struct udevice *dev)
 
 	regulators_node = dev_read_subnode(dev, "regulators");
 	if (!ofnode_valid(regulators_node)) {
-		debug("%s: %s regulators subnode not found!", __func__,
+		debug("%s: %s regulators subnode not found!\n", __func__,
 		      dev->name);
 		return -ENXIO;
 	}
@@ -158,7 +156,7 @@ static int rk8xx_probe(struct udevice *dev)
 	struct rk8xx_priv *priv = dev_get_priv(dev);
 	struct reg_data *init_data = NULL;
 	int init_data_num = 0;
-	int ret = 0, i;
+	int ret = 0, i, show_variant;
 	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
@@ -171,13 +169,20 @@ static int rk8xx_probe(struct udevice *dev)
 		id_lsb = ID_LSB;
 	}
 
-	rk8xx_read(dev, id_msb, &msb, 1);
-	rk8xx_read(dev, id_lsb, &lsb, 1);
+	ret = rk8xx_read(dev, id_msb, &msb, 1);
+	if (ret)
+		return ret;
+	ret = rk8xx_read(dev, id_lsb, &lsb, 1);
+	if (ret)
+		return ret;
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
+	show_variant = priv->variant;
 	switch (priv->variant) {
-	case RK805_ID:
 	case RK808_ID:
+		show_variant = 0x808;	/* RK808 hardware ID is 0 */
+		break;
+	case RK805_ID:
 	case RK816_ID:
 	case RK818_ID:
 		break;
@@ -207,7 +212,7 @@ static int rk8xx_probe(struct udevice *dev)
 		      pmic_reg_read(dev, init_data[i].reg));
 	}
 
-	printf("PMIC:  RK%x\n", priv->variant);
+	printf("PMIC:  RK%x\n", show_variant);
 
 	return 0;
 }

commit 1bb49bc4e2f612da166d09b71ad250f00f6f643c
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue May 29 11:07:19 2018 +0800

    rockchip: rkflash: adjust sfc bounce buffer addr for 32bits and 64bits alterable
    
    Change-Id: I276540d8ae20536124bcb9ad995d941fd8c04866
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
index b0f50defb7..cb4920b5a8 100644
--- a/drivers/rkflash/sfc.c
+++ b/drivers/rkflash/sfc.c
@@ -91,7 +91,7 @@ int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
 
 		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
 		writel(~((u32)FINISH_INT), g_sfc_reg + SFC_IMR);
-		writel((u64)bb.bounce_buffer, g_sfc_reg + SFC_DMA_ADDR);
+		writel((unsigned long)bb.bounce_buffer, g_sfc_reg + SFC_DMA_ADDR);
 		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
 
 		timeout = cmd.b.datasize * 10;

commit 5eb61944c8dd44b34ab22d821a2775b182e3c23a
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon May 28 20:32:36 2018 +0800

    drm/rockchip: loader kernel bmp for rk fb driver
    
    Kernel rkfb driver need a separate function to load the kernel bmp,
    which is different with kernel using drm driver.
    
    Change-Id: I01662bf88e47e685f2a4ee1c4306f1f7e69bed3b
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 69eb7900e4..f9d1919918 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -790,6 +790,41 @@ struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 	return logo_cache;
 }
 
+/* Note: used only for rkfb kernel driver */
+static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
+{
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+	void *dst = NULL;
+	int len, size;
+	struct bmp_header *header;
+
+	if (!logo || !bmp_name)
+		return -EINVAL;
+
+	header = malloc(RK_BLK_SIZE);
+	if (!header)
+		return -ENOMEM;
+
+	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
+	if (len != RK_BLK_SIZE) {
+		free(header);
+		return -EINVAL;
+	}
+	size = get_unaligned_le32(&header->file_size);
+	dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
+	len = rockchip_read_resource_file(dst, bmp_name, 0, size);
+	if (len != size) {
+		printf("failed to load bmp %s\n", bmp_name);
+		free(header);
+		return -ENOENT;
+	}
+
+	logo->mem = dst;
+
+	return 0;
+#endif
+}
+
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
 #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
@@ -930,8 +965,8 @@ void rockchip_show_logo(void)
 			printf("failed to display uboot logo\n");
 		else
 			display_logo(s);
-		if (load_bmp_logo(&s->logo, s->klogo_name))
-			printf("failed to display kernel logo\n");
+
+		/* Load kernel bmp in rockchip_display_fixup() later */
 	}
 }
 
@@ -1096,17 +1131,25 @@ void rockchip_display_fixup(void *blob)
 	if (!get_display_size())
 		return;
 
-	offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
-					       (u64)memory_start,
-					       (u64)get_display_size());
-	if (offset < 0) {
-		printf("failed to add drm-loader-logo memory\n");
+	if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
+		list_for_each_entry(s, &rockchip_display_list, head)
+			load_bmp_logo(&s->logo, s->klogo_name);
+		offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
+						    (u64)memory_start,
+						    (u64)get_display_size());
+		if (offset < 0)
+			printf("failed to reserve drm-loader-logo memory\n");
+	} else {
+		printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
 		/* Compatible with rkfb display, only need reserve memory */
 		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
-					       (u64)memory_start,
-					       (u64)get_display_size());
+						    (u64)memory_start,
+						    MEMORY_POOL_SIZE);
 		if (offset < 0)
-			printf("failed to add fb-loader-logo memory\n");
+			printf("failed to reserve fb-loader-logo memory\n");
+		else
+			list_for_each_entry(s, &rockchip_display_list, head)
+				load_kernel_bmp_logo(&s->logo, s->klogo_name);
 		return;
 	}
 

commit 5757fb55a6df9fbeb750736def54313ef70c00e6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 10:02:19 2018 +0800

    rockchip: rk3399-evb: enable rockchip drm display without kernel dtb
    
    Use rockchip display driver instead of upstream display driver.
    
    Change-Id: Ie6356f447bcd49d65b81cec8c09a80c3cb333c70
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index ccd490fbb2..2a907019bd 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -6,15 +6,15 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
-CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -37,6 +37,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_CMD_TIME=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -93,9 +94,11 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
-CONFIG_ENV_IS_NOWHERE=y

commit 694afdc865333f8f628d6f5841f48b2ceef3258b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon May 28 17:54:11 2018 +0800

    rockchip: display: support reserve memory for rkfb
    
    Some rockchip SDK like rk3399 Android 6.0 is still using rkfb in
    kernel as display framework, in this case we need to:
    - use a separate dtb in U-Boot which is drm display node;
    - disable CONFIG_USING_KERNEL_DTB in U-Boot
    - pass the reserve memory for kernel rkfb in U-Boot
    
    Change-Id: I80df05d3cf15dce203c4397544b65f80fde1d22a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d192193476..69eb7900e4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1089,7 +1089,7 @@ void rockchip_display_fixup(void *blob)
 	const struct rockchip_connector *conn;
 	const struct rockchip_crtc *crtc;
 	struct display_state *s;
-	u32 offset;
+	int offset;
 	const struct device_node *np;
 	const char *path;
 
@@ -1101,6 +1101,12 @@ void rockchip_display_fixup(void *blob)
 					       (u64)get_display_size());
 	if (offset < 0) {
 		printf("failed to add drm-loader-logo memory\n");
+		/* Compatible with rkfb display, only need reserve memory */
+		offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
+					       (u64)memory_start,
+					       (u64)get_display_size());
+		if (offset < 0)
+			printf("failed to add fb-loader-logo memory\n");
 		return;
 	}
 

commit 0313794beec099a565b407e8a41c5bfdb25dafc9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon May 28 17:56:56 2018 +0800

    rockchip: dts: update rk3399 drm display node
    
    This has been test in rk3399-execavator board with edp panel.
    
    Change-Id: I6ad5176c305883a037f6571623b5f6f754a8f6c1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 42f67e7a89..a4ddd0075e 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -10,6 +10,7 @@
 #include "rk3399.dtsi"
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
 #include "rk3399-u-boot.dtsi"
+#include <linux/media-bus-format.h>
 
 / {
 	model = "Rockchip RK3399 Evaluation Board";
@@ -126,13 +127,62 @@
 		status = "disabled";
 	};
 
-	panel:panel {
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc_lcd: vcc-lcd {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_lcd";
+		gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+		startup-delay-us = <20000>;
+		enable-active-high;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	panel: panel {
 		compatible = "simple-panel";
-		power-supply = <&vcc33_lcd>;
 		backlight = <&backlight>;
-		/*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
-		status = "disabled";
+		power-supply = <&vcc_lcd>;
+		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+		prepare-delay-ms = <20>;
+		enable-delay-ms = <20>;
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <200000000>;
+				hactive = <1536>;
+				vactive = <2048>;
+				hfront-porch = <12>;
+				hsync-len = <16>;
+				hback-porch = <48>;
+				vfront-porch = <8>;
+				vsync-len = <4>;
+				vback-porch = <8>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		ports {
+			panel_in: endpoint {
+				remote-endpoint = <&edp_out>;
+			};
+		};
 	};
+
 };
 
 &emmc_phy {
@@ -276,3 +326,39 @@
 	rx_delay = <0x11>;
 	status = "okay";
 };
+
+&backlight {
+	status = "okay";
+	enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+};
+
+&route_edp {
+	status = "okay";
+};
+
+&edp_in_vopl {
+	status = "disabled";
+};
+
+&edp_in_vopb {
+	status = "okay";
+};
+
+&edp {
+	status = "okay";
+	force-hpd;
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			edp_out: endpoint {
+				remote-endpoint = <&panel_in>;
+			};
+		};
+	};
+};
+
+&vopb {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index cfae43ef9f..6c56e51588 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -118,6 +118,32 @@
 		};
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vopb_out>, <&vopl_out>;
+		status = "okay";
+
+		route {
+			route_hdmi: route-hdmi {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopb_out_hdmi>;
+			};
+
+			route_edp: route-edp {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vopb_out_edp>;
+			};
+		};
+	};
+
 	pmu_a53 {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
@@ -1405,7 +1431,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			vopl_out_mipi: endpoint@0 {
-				reg = <3>;
+				reg = <0>;
 				remote-endpoint = <&mipi_in_vopl>;
 			};
 
@@ -1413,6 +1439,11 @@
 				reg = <1>;
 				remote-endpoint = <&hdmi_in_vopl>;
 			};
+
+			vopl_out_edp: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&edp_in_vopl>;
+			};
 		};
 	};
 
@@ -1430,7 +1461,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			vopb_out_mipi: endpoint@0 {
-				reg = <3>;
+				reg = <0>;
 				remote-endpoint = <&mipi_in_vopb>;
 			};
 
@@ -1438,6 +1469,11 @@
 				reg = <1>;
 				remote-endpoint = <&hdmi_in_vopb>;
 			};
+
+			vopb_out_edp: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&edp_in_vopb>;
+			};
 		};
 	};
 
@@ -1452,7 +1488,7 @@
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_SFR>, <&cru PLL_VPLL>, <&cru PCLK_VIO_GRF>;
 		clock-names = "iahb", "isfr", "vpll", "grf";
-		status = "disabled";
+		status = "okay";
 
 		ports {
 			hdmi_in: port {
@@ -1500,6 +1536,42 @@
 		};
 	};
 
+	edp: edp@ff970000 {
+		compatible = "rockchip,rk3399-edp";
+		reg = <0x0 0xff970000 0x0 0x8000>;
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
+		clock-names = "dp", "pclk";
+		power-domains = <&power RK3399_PD_EDP>;
+		resets = <&cru SRST_P_EDP_CTRL>;
+		reset-names = "dp";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&edp_hpd>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			edp_in: port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				edp_in_vopb: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopb_out_edp>;
+				};
+
+				edp_in_vopl: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopl_out_edp>;
+				};
+			};
+		};
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3399-pinctrl";
 		rockchip,grf = <&grf>;

commit 532b87c785bae5460bd1bea099ae44e2219c7bd8
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon May 28 11:47:08 2018 +0800

    video/drm: edp: fix compile error
    
    Change-Id: Iacf2f895c44689c25cf4ac735b60618f959d2aed
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index b86863ec3f..7b92e1b632 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -11,6 +11,7 @@
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <dm/read.h>
 #include <linux/list.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
@@ -841,7 +842,6 @@ static int rockchip_analogix_dp_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct rockchip_dp_chip_data *pdata = connector->data;
-	int dp_node = conn_state->node;
 	struct analogix_dp_device *dp;
 	struct analogix_dp_plat_data *plat_data;
 	int ret;
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/rockchip_analogix_dp.h
index aa3add0554..dc54ea8e1b 100644
--- a/drivers/video/drm/rockchip_analogix_dp.h
+++ b/drivers/video/drm/rockchip_analogix_dp.h
@@ -7,10 +7,6 @@
 #ifndef __DRM_ANALOGIX_DP_H__
 #define __DRM_ANALOGIX_DP_H__
 
-#define pr_err printf
-#define pr_info printf
-#define pr_debug debug
-
 /*
  * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
  * DP and DPCD versions are independent.  Differences from 1.0 are not noted,

commit 6f7b6465e903a33a52ed79400c6047f64515313d
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed May 23 14:08:17 2018 +0800

    rockchip: board: fix usb-otg address parse error
    
    Using fdt_translate_address() instead of fdtdec_get_addr() to avoid
    address parse error when 64-bits CPU works at 32-bits mode but uses
    64-bits DT files.
    
    Change-Id: I8c605ab2e5b3fc0d5267af6094c2a7f54c2d7e89
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 3c7a41f14f..e5c54ee541 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -187,6 +187,7 @@ void enable_caches(void)
 #endif
 
 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <fdt_support.h>
 #include <usb.h>
 #include <usb/dwc2_udc.h>
 
@@ -200,6 +201,8 @@ int board_usb_init(int index, enum usb_init_type init)
 {
 	int node;
 	const char *mode;
+	fdt_addr_t addr;
+	const fdt32_t *reg;
 	bool matched = false;
 	const void *blob = gd->fdt_blob;
 
@@ -221,7 +224,18 @@ int board_usb_init(int index, enum usb_init_type init)
 		debug("Not found usb_otg device\n");
 		return -ENODEV;
 	}
-	otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	reg = fdt_getprop(blob, node, "reg", NULL);
+	if (!reg)
+		return -EINVAL;
+
+	addr = fdt_translate_address(blob, node, reg);
+	if (addr == OF_BAD_ADDR) {
+		pr_err("Not found usb_otg address\n");
+		return -EINVAL;
+	}
+
+	otg_data.regs_otg = (uintptr_t)addr;
 
 	return dwc2_udc_probe(&otg_data);
 }

commit 46a684d29c5b26890ca1a232be52af6831a883ad
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed May 23 09:17:36 2018 +0800

    rockchip: sdram: Reserve ram space for ATF when boot an arm64 on AArch32 state
    
    When we boot an ARM64 processor on AArch32 execution state,
    it's still need to run ATF, so we have to reserve 2M space
    from the start of dram.
    
    Change-Id: Ida7c35e35bc04c97616279906b3de95c8aaf36af
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 50828deff1..546eb768c5 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -69,14 +69,15 @@ int dram_init_banksize(void)
 
 	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
 				  sizeof(struct tos_parameter_t) - 8);
-#ifdef CONFIG_ARM64
+
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM64_BOOT_AARCH32)
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #else
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #endif
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+
 	if ((checksum == tos_parameter->checksum) &&
 	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
@@ -97,7 +98,6 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	size_t size_mb = 0;
 	u32 ch;
 	u32 cs1_col = 0;
-
 	u32 sys_reg = readl(reg);
 	u32 sys_reg1 = readl(reg + 4);
 	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)

commit b4bed602c04c6e734cc28869e7d42d69c9f46e02
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 22 20:19:23 2018 +0800

    rockchip: rk3308: add AAarch32 execution state support
    
    Support boot ARMv8 based RK3308 on AARCH32 state
    
    Change-Id: I62f857b61668fb6ff50136ffff2b09349492c218
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d295c83750..915f5fa6db 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -139,7 +139,7 @@ config ROCKCHIP_RK3288
 
 config ROCKCHIP_RK3308
 	bool "Support Rockchip RK3308"
-	select ARM64
+	select ARM64 if !ARM64_BOOT_AARCH32
 	select DEBUG_UART_BOARD_INIT
 	select ARM_SMCCC
 	help
@@ -274,6 +274,13 @@ config TPL_ROCKCHIP_BACK_TO_BROM
           SPL will return to the boot rom, which will then load the U-Boot
           binary to keep going on.
 
+config ARM64_BOOT_AARCH32
+	bool "Support Boot an ARM64 on AArch32 execution state"
+	select CPU_V7
+	default n
+	help
+	  If you want to boot an ARM64 processor on 32-bit mode, say y here.
+
 config ROCKCHIP_BOOT_MODE_REG
 	hex "Rockchip boot mode flag register address"
 	default 0xff010200 if ROCKCHIP_PX30
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 238f4ae2b7..384ef42f90 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -7,9 +7,10 @@
 #include <asm/io.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch/hardware.h>
-#include <asm/armv8/mmu.h>
 #include <debug_uart.h>
 
+#ifdef CONFIG_ARM64
+#include <asm/armv8/mmu.h>
 static struct mm_region rk3308_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -31,6 +32,7 @@ static struct mm_region rk3308_mem_map[] = {
 };
 
 struct mm_region *mem_map = rk3308_mem_map;
+#endif
 
 #define GRF_BASE	0xff000000
 
diff --git a/configs/evb-aarch32-rk3308_defconfig b/configs/evb-aarch32-rk3308_defconfig
new file mode 100644
index 0000000000..80d7028268
--- /dev/null
+++ b/configs/evb-aarch32-rk3308_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ARM64_BOOT_AARCH32=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 37e8128bf3..379e4a1789 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(10 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -48,12 +48,21 @@
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 #define CONFIG_ROCKUSB_G_DNL_PID        0x330d
 
+#ifdef CONFIG_ARM64
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
 	"ramdisk_addr_r=0x04000000\0"
+#else
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x03200000\0" \
+	"kernel_addr_r=0x2008000\0" \
+	"ramdisk_addr_r=0x03080000\0"
+#endif
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit e424c91f23b3da69a2aace28717232bc04de318c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri May 25 09:08:02 2018 +0800

    rockchip: rk3308: enable CONFIG_SUPPORT_EMMC_RPMB
    
    Change-Id: I8fc57eb27f45efd6d3e92c56813e7f1959c0960b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index 1fa3c14d65..a09a18271f 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -9,6 +9,7 @@
 
 #include <configs/rk3308_common.h>
 
+#define CONFIG_SUPPORT_EMMC_RPMB
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 

commit e96eea958a89f4134480ecd2b966031596afd56b
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Fri May 25 17:13:39 2018 +0800

    px3se: support android boot image
    
    Change-Id: I19048288d0646547821ad80dc1a3e2cb27e23953
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>

diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
index 791a90b2cd..a36e775541 100644
--- a/configs/evb-px3se_defconfig
+++ b/configs/evb-px3se_defconfig
@@ -2,6 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -9,7 +11,9 @@ CONFIG_FIT=y
 # CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y

commit 9920102d3cff2b08e64f5f30b4c704ad3517e467
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 25 15:58:29 2018 +0800

    Revert "rockchip: dts: px30: enable saradc in pre-reloc"
    
    This reverts commit 73f99ea810566e73bfb31c7196ce303b098c8260.
    
    There is something wrong with saradc clk after reloc, and saradc
    doesn't work. we don't find the root cause, so revert it temporary.
    
    Change-Id: Ica8b61225ffbd3578860b03faa4b0f2b13f77584

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 0204cede7b..2e9ef97d26 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -38,11 +38,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&saradc {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &gpio0 {
 	u-boot,dm-pre-reloc;
 	status = "disabled";

commit 93d59c05c71154275f64a6af0ee9c83d90b8f19d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 25 15:27:57 2018 +0800

    android: fix "reboot recovery" command doesn't work
    
    If not find recovery message in misc partition, we try to check
    kernel reboot command.
    
    Change-Id: I25847cb5cc06efc39c419426ab6dbe9acde3797d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 7016f33e5a..d31e583c12 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -492,6 +492,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 #endif
 
 	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	if (mode == ANDROID_BOOT_MODE_NORMAL) {
+		if (rockchip_get_boot_mode() == BOOT_MODE_RECOVERY)
+			mode = ANDROID_BOOT_MODE_RECOVERY;
+	}
+#endif
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
 	switch (mode) {

commit bad3fe2d02a54f6f51ae2f7f28bc333b9fb0330b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 25 16:27:35 2018 +0800

    part: rkparm: update part table if device change
    
    Do not re-use the partition table for 'mmc 1' from the partition
    table of 'mmc 0', update the table if the device number changed.
    
    Change-Id: I03b8509749d079ded6a0e0a87929be21732399fb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 0398e4d5ab..38bc2e112b 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -27,6 +27,7 @@ struct rkparm_part {
 
 
 static LIST_HEAD(parts_head);
+static int dev_num = -1;
 
 static int rkparm_param_parse(char *param, struct list_head *parts_head,
 			      struct blk_desc *dev_desc)
@@ -56,6 +57,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	 */
 	env_delete("bootargs", "initrd=");
 
+	INIT_LIST_HEAD(parts_head);
 	while (next) {
 		/* Skip ':' and ',' */
 		next++;
@@ -88,6 +90,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		next = strchr(next, ',');
 	}
 
+	dev_num = ((dev_desc->if_type << 8) + dev_desc->devnum);
+
 	return 0;
 }
 
@@ -124,7 +128,8 @@ static void part_print_rkparm(struct blk_desc *dev_desc)
 	struct rkparm_part *p = NULL;
 	int i = 0;
 
-	if (list_empty(&parts_head))
+	if (list_empty(&parts_head) ||
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
 		ret = rkparm_init_param(dev_desc, &parts_head);
 
 	if (ret) {
@@ -156,7 +161,8 @@ static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
 		return -EINVAL;
 	}
 
-	if (list_empty(&parts_head))
+	if (list_empty(&parts_head) ||
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
 		ret = rkparm_init_param(dev_desc, &parts_head);
 
 	if (ret) {
@@ -191,7 +197,8 @@ static int part_test_rkparm(struct blk_desc *dev_desc)
 {
 	int ret = 0;
 
-	if (list_empty(&parts_head))
+	if (list_empty(&parts_head) ||
+	    (dev_num != ((dev_desc->if_type << 8) + dev_desc->devnum)))
 		ret = rkparm_init_param(dev_desc, &parts_head);
 	if (ret)
 		ret = -1;

commit 48b6ef28caa69acca5eeeb87322fbc285f2e7e37
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 25 15:51:12 2018 +0800

    rockchip: dts: rk3399 use -u-boot.dtsi for rk3399
    
    Move u-boot config into rk3399-u-boot.dtsi
    
    Change-Id: Ia3cb1ecc379c62f2e071947e308e29038bfffbea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 38d2a458ef..42f67e7a89 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -9,6 +9,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
+#include "rk3399-u-boot.dtsi"
 
 / {
 	model = "Rockchip RK3399 Evaluation Board";
@@ -167,11 +168,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &usb_host0_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index a007fa1013..85c5208ee1 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -9,6 +9,7 @@
 #include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
 #include "rk3399-sdram-ddr3-1600.dtsi"
+#include "rk3399-u-boot.dtsi"
 
 / {
 	model = "Firefly-RK3399 Board";
@@ -593,7 +594,6 @@
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
 	bus-width = <4>;
 	status = "okay";
 };
@@ -647,11 +647,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &usb_host0_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
new file mode 100644
index 0000000000..7bd104fb3f
--- /dev/null
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	aliases {
+		mmc0 = &sdhci;
+		mmc1 = &sdmmc;
+	};
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&sdhci {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmusgrf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmucru {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&cic {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc_phy {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 584f0a58f5..cfae43ef9f 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -35,8 +35,6 @@
 		serial2 = &uart2;
 		serial3 = &uart3;
 		serial4 = &uart4;
-		mmc0 = &sdhci;
-		mmc1 = &sdmmc;
 	};
 
 	cpus {
@@ -276,7 +274,6 @@
 	};
 
 	sdhci: sdhci@fe330000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
 		reg = <0x0 0xfe330000 0x0 0x10000>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1013,7 +1010,6 @@
 	};
 
 	pmugrf: syscon@ff320000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
 		reg = <0x0 0xff320000 0x0 0x1000>;
 		#address-cells = <1>;
@@ -1026,7 +1022,6 @@
 	};
 
 	pmusgrf: syscon@ff330000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pmusgrf", "syscon";
 		reg = <0x0 0xff330000 0x0 0xe3d4>;
 	};
@@ -1132,7 +1127,6 @@
 	};
 
 	cic: syscon@ff620000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-cic", "syscon";
 		reg = <0x0 0xff620000 0x0 0x100>;
 	};
@@ -1147,7 +1141,6 @@
 	};
 
 	dmc: dmc {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-dmc";
 		devfreq-events = <&dfi>;
 		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1196,7 +1189,6 @@
 	};
 
 	pmucru: pmu-clock-controller@ff750000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pmucru";
 		reg = <0x0 0xff750000 0x0 0x1000>;
 		rockchip,grf = <&pmugrf>;
@@ -1207,7 +1199,6 @@
 	};
 
 	cru: clock-controller@ff760000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-cru";
 		reg = <0x0 0xff760000 0x0 0x1000>;
 		rockchip,grf = <&grf>;
@@ -1232,7 +1223,6 @@
 	};
 
 	grf: syscon@ff770000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xff770000 0x0 0x10000>;
 		#address-cells = <1>;
@@ -1298,7 +1288,6 @@
 		};
 
 		emmc_phy: phy@f780 {
-		u-boot,dm-pre-reloc;
 			compatible = "rockchip,rk3399-emmc-phy";
 			reg = <0xf780 0x24>;
 			clocks = <&sdhci>;
@@ -1512,7 +1501,6 @@
 	};
 
 	pinctrl: pinctrl {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-pinctrl";
 		rockchip,grf = <&grf>;
 		rockchip,pmu = <&pmugrf>;

commit fa400ae59ca161528229163d65dab9b375069a4c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 25 11:16:24 2018 +0800

    make.sh: support pack trust.img that ARM64 cpu boot on AArch32
    
    Change-Id: I5207c644284b686513d3d3536e4032d0980f9112
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 62419d277a..2e1fa79343 100755
--- a/make.sh
+++ b/make.sh
@@ -212,7 +212,7 @@ pack_trust_image()
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
 	# ARM64 uses trust_merger
-	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
+	if grep -Eq ''^CONFIG_ARM64=y'|'^CONFIG_ARM64_BOOT_AARCH32=y'' ${OUTDIR}/.config ; then
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
 			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return

commit 2c7457942fd2758d5e728740ad8e80d1f26f3587
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Fri May 11 17:06:00 2018 +0800

    drivers: rknand: zftl static wear leveling strategy optimize
    
    1. Garbage collection does not deal with the updated blocks.
    2. Static wear considers the SLC mode erase count and XLC
    mode erase count
    
    Change-Id: I6054fbc1726be1c93558eafad59fa9ea38d6a206
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index ec6c5a4cc2..57a74d592d 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-23
+ * date: 2018-05-11
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -65,7 +65,7 @@ _list_remove_node:
 	beq	.L9
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
-	mov	w2, 184
+	mov	w2, 188
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -176,73 +176,74 @@ _insert_free_list:
 	cmp	w3, w1
 	bls	.L23
 	ldrh	w3, [x2]
-	mov	w5, 6
-	ldr	x8, [x0]
+	mov	w8, 6
+	ldr	x7, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
 	adrp	x2, .LANCHOR0
-	umull	x12, w1, w5
-	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	umull	x12, w1, w8
+	ldr	x5, [x2, #:lo12:.LANCHOR0]
 	mov	w2, -1
-	add	x7, x6, x12
-	strh	w2, [x7, 2]
-	strh	w2, [x6, x12]
-	cbnz	x8, .L25
+	add	x6, x5, x12
+	strh	w2, [x6, 2]
+	strh	w2, [x5, x12]
+	cbnz	x7, .L25
 .L30:
-	str	x7, [x0]
+	str	x6, [x0]
 	ret
 .L25:
 	adrp	x2, .LANCHOR3
-	mov	x3, -6148914691236517206
-	movk	x3, 0xaaab, lsl 0
-	mov	w10, w5
+	adrp	x3, .LANCHOR4
+	mov	w10, w8
+	mov	w15, 65535
 	ldr	x11, [x2, #:lo12:.LANCHOR3]
 	ubfiz	x2, x1, 2, 16
-	mov	w14, 65535
+	ldrh	w14, [x3, #:lo12:.LANCHOR4]
+	mov	x3, -6148914691236517206
+	movk	x3, 0xaaab, lsl 0
 	ldr	w4, [x11, x2]
 	ldrh	w2, [x11, x2]
 	ubfx	x4, x4, 11, 8
 	and	w2, w2, 2047
-	add	w4, w2, w4, lsl 3
-	sub	x2, x8, x6
+	madd	w4, w14, w4, w2
+	sub	x2, x7, x5
 	asr	x2, x2, 1
-	and	w4, w4, 4095
+	and	w4, w4, 65535
 	mul	x2, x2, x3
-	mov	x3, x8
+	mov	x3, x7
 	and	w2, w2, 65535
 .L28:
 	ubfiz	x13, x2, 2, 16
-	ldr	w5, [x11, x13]
+	ldr	w8, [x11, x13]
 	ldrh	w13, [x11, x13]
-	ubfx	x5, x5, 11, 8
+	ubfx	x8, x8, 11, 8
 	and	w13, w13, 2047
-	add	w5, w13, w5, lsl 3
-	and	w5, w5, 4095
-	cmp	w4, w5
+	madd	w8, w14, w8, w13
+	cmp	w4, w8, uxth
 	bls	.L26
-	ldrh	w5, [x3]
-	cmp	w5, w14
+	ldrh	w8, [x3]
+	cmp	w8, w15
 	bne	.L27
-	strh	w2, [x7, 2]
+	strh	w2, [x6, 2]
 	strh	w1, [x3]
 	ret
 .L27:
-	umaddl	x3, w5, w10, x6
-	mov	w2, w5
+	umaddl	x3, w8, w10, x5
+	mov	w2, w8
 	b	.L28
 .L26:
 	ldrh	w4, [x3, 2]
-	cmp	x8, x3
-	strh	w4, [x7, 2]
-	strh	w2, [x6, x12]
+	cmp	x7, x3
+	strh	w4, [x6, 2]
+	strh	w2, [x5, x12]
 	bne	.L29
-	strh	w1, [x8, 2]
+	strh	w1, [x7, 2]
 	b	.L30
 .L29:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
-	strh	w1, [x6, x0]
+	strh	w1, [x5, x0]
 	strh	w1, [x3, 2]
 .L23:
 	ret
@@ -251,108 +252,122 @@ _insert_free_list:
 	.align	2
 	.type	_insert_data_list, %function
 _insert_data_list:
-	adrp	x4, .LANCHOR2
+	adrp	x3, .LANCHOR2
 	and	w1, w1, 65535
-	ldrh	w3, [x4, #:lo12:.LANCHOR2]
-	cmp	w3, w1
-	bls	.L47
+	ldrh	w4, [x3, #:lo12:.LANCHOR2]
+	cmp	w4, w1
+	bls	.L51
+	mov	x5, x3
 	ldrh	w3, [x2]
-	mov	w11, 6
-	ldr	x8, [x0]
+	mov	w12, 6
+	ldr	x11, [x0]
 	add	w3, w3, 1
 	strh	w3, [x2]
 	adrp	x2, .LANCHOR0
-	umull	x13, w1, w11
-	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	umull	x12, w1, w12
+	ldr	x8, [x2, #:lo12:.LANCHOR0]
 	mov	w2, -1
-	add	x7, x6, x13
-	strh	w2, [x7, 2]
-	strh	w2, [x6, x13]
-	cbnz	x8, .L34
-	str	x7, [x0]
+	add	x10, x8, x12
+	strh	w2, [x10, 2]
+	strh	w2, [x8, x12]
+	cbnz	x11, .L34
+	str	x10, [x0]
 	ret
 .L34:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR4
-	mov	x3, -6148914691236517206
-	mov	w12, -1
+	adrp	x2, .LANCHOR5
+	uxtw	x3, w1
+	adrp	x7, .LANCHOR4
 	add	x29, sp, 0
-	ldr	x15, [x2, #:lo12:.LANCHOR4]
-	ubfiz	x2, x1, 1, 16
-	movk	x3, 0xaaab, lsl 0
-	ldrh	w30, [x4, #:lo12:.LANCHOR2]
-	mov	x5, x8
+	ldr	x15, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR3
+	ldrh	w4, [x10, 4]
+	ldr	x13, [x2, #:lo12:.LANCHOR3]
 	stp	x19, x20, [sp, 16]
-	mov	w10, 0
-	mov	w19, 65535
-	ldrh	w16, [x15, x2]
-	ldrh	w2, [x7, 4]
-	cmp	w2, 0
-	mul	w14, w16, w2
-	sub	x2, x8, x6
+	ldrh	w6, [x15, x3, lsl 1]
+	lsl	x3, x3, 2
+	ldrh	w16, [x7, #:lo12:.LANCHOR4]
+	ldr	w2, [x13, x3]
+	mul	w6, w6, w4
+	ldrh	w3, [x13, x3]
+	ubfx	x2, x2, 11, 8
+	and	w3, w3, 2047
+	cbz	w6, .L35
+	madd	w2, w16, w2, w3
+	add	w6, w6, w2, uxth
+.L35:
+	sub	x2, x11, x8
+	mov	x3, -6148914691236517206
 	asr	x2, x2, 1
-	csel	w14, w14, w12, ne
+	movk	x3, 0xaaab, lsl 0
+	cmp	w4, 0
+	ldrh	w30, [x5, #:lo12:.LANCHOR2]
+	csinv	w6, w6, wzr, ne
+	mov	x7, x11
 	mul	x2, x2, x3
-	adrp	x3, .LANCHOR3
-	ldr	x17, [x3, #:lo12:.LANCHOR3]
+	mov	w4, 0
+	mov	w19, 65535
+	mov	w20, 6
 	and	w2, w2, 65535
 .L42:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	cmp	w10, w30
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	cmp	w4, w30
 	bhi	.L31
 	cmp	w1, w2
 	beq	.L31
-	uxtw	x4, w2
-	ldrh	w20, [x5, 4]
-	cmp	w20, 0
-	ldrh	w3, [x15, x4, lsl 1]
-	mul	w3, w3, w20
-	csel	w3, w3, w12, ne
-	cmp	w14, w3
-	bne	.L38
-	lsl	x4, x4, 2
-	ldr	w3, [x17, x4]
-	ldrh	w4, [x17, x4]
+	uxtw	x5, w2
+	ldrh	w17, [x7, 4]
+	ldrh	w3, [x15, x5, lsl 1]
+	lsl	x5, x5, 2
+	mul	w14, w3, w17
+	ldr	w3, [x13, x5]
+	ldrh	w5, [x13, x5]
 	ubfx	x3, x3, 11, 8
-	and	w4, w4, 2047
-	add	w3, w4, w3, lsl 3
-	and	w3, w3, 4095
-	cmp	w16, w3
-	bhi	.L40
+	and	w5, w5, 2047
+	cbz	w14, .L38
+	cbz	w17, .L46
+	madd	w3, w16, w3, w5
+	add	w3, w14, w3, uxth
 .L39:
-	ldrh	w3, [x5, 2]
-	cmp	x8, x5
-	strh	w3, [x7, 2]
-	strh	w2, [x6, x13]
-	bne	.L43
-	strh	w1, [x8, 2]
-	str	x7, [x0]
-	b	.L31
-.L38:
-	bcc	.L39
-.L40:
-	ldrh	w3, [x5]
+	cmp	w6, w3
+	bcc	.L40
+.L44:
+	ldrh	w3, [x7]
 	cmp	w3, w19
 	bne	.L41
-	strh	w2, [x7, 2]
-	strh	w1, [x5]
+	strh	w2, [x10, 2]
+	strh	w1, [x7]
 .L31:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 .L41:
-	umaddl	x5, w3, w11, x6
+	umaddl	x7, w3, w20, x8
 	mov	w2, w3
 	b	.L42
+.L40:
+	ldrh	w3, [x7, 2]
+	cmp	x11, x7
+	strh	w3, [x10, 2]
+	strh	w2, [x8, x12]
+	bne	.L43
+	strh	w1, [x11, 2]
+	str	x10, [x0]
+	b	.L31
 .L43:
-	ldrh	w0, [x5, 2]
+	ldrh	w0, [x7, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
-	strh	w1, [x6, x0]
-	strh	w1, [x5, 2]
+	strh	w1, [x8, x0]
+	strh	w1, [x7, 2]
 	b	.L31
-.L47:
+.L38:
+	cbnz	w17, .L44
+.L46:
+	mov	w3, -1
+	b	.L39
+.L51:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
 	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
@@ -360,26 +375,26 @@ _insert_data_list:
 	.type	_list_get_gc_head_node.isra.2, %function
 _list_get_gc_head_node.isra.2:
 	and	w1, w1, 65535
-	cbz	x0, .L54
+	cbz	x0, .L58
 	adrp	x2, .LANCHOR0
 	mov	w3, 65535
 	mov	w4, 6
 	ldr	x2, [x2, #:lo12:.LANCHOR0]
-.L51:
-	cbz	w1, .L52
+.L55:
+	cbz	w1, .L56
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L53
+	bne	.L57
 	ret
-.L53:
+.L57:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L51
-.L54:
+	b	.L55
+.L58:
 	mov	w0, 65535
 	ret
-.L52:
+.L56:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -396,20 +411,20 @@ _list_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
-	adrp	x1, .LANCHOR5
+	adrp	x1, .LANCHOR6
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
 	ldrh	w3, [x1, 16]
 	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L56
+	beq	.L60
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L56
+	beq	.L60
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L56
+	beq	.L60
 	adrp	x1, .LANCHOR0
 	mov	w22, 6
 	ldr	x3, [x0]
@@ -418,36 +433,36 @@ _list_update_data_list:
 	ldr	x24, [x1, #:lo12:.LANCHOR0]
 	add	x23, x24, x22
 	cmp	x23, x3
-	beq	.L56
+	beq	.L60
 	mov	x20, x0
 	ldrh	w0, [x23, 2]
 	mov	w1, 65535
 	mov	x21, x2
 	cmp	w0, w1
-	bne	.L60
+	bne	.L64
 	ldrh	w1, [x24, x22]
 	cmp	w1, w0
-	bne	.L60
-	adrp	x1, .LANCHOR6
+	bne	.L64
+	adrp	x1, .LANCHOR7
 	adrp	x0, .LC0
-	mov	w2, 251
-	add	x1, x1, :lo12:.LANCHOR6
+	mov	w2, 255
+	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L60:
+.L64:
 	ldrh	w1, [x23, 2]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L61
+	bne	.L65
 	ldrh	w0, [x24, x22]
 	cmp	w0, w1
-	beq	.L56
-.L61:
-	adrp	x0, .LANCHOR4
+	beq	.L60
+.L65:
+	adrp	x0, .LANCHOR5
 	ubfiz	x2, x19, 1, 16
 	mov	x5, -6148914691236517206
 	mov	w4, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
 	ldrh	w2, [x23, 4]
@@ -466,7 +481,7 @@ _list_update_data_list:
 	mul	w0, w0, w1
 	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L56
+	bcs	.L60
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -480,7 +495,7 @@ _list_update_data_list:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L56:
+.L60:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -488,6 +503,15 @@ _list_update_data_list:
 	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
+	.section	.text.zftl_get_gc_node.part.10,"ax",@progbits
+	.align	2
+	.type	zftl_get_gc_node.part.10, %function
+zftl_get_gc_node.part.10:
+	mov	w1, w0
+	adrp	x0, .LANCHOR8
+	ldr	x0, [x0, #:lo12:.LANCHOR8]
+	b	_list_get_gc_head_node.isra.2
+	.size	zftl_get_gc_node.part.10, .-zftl_get_gc_node.part.10
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -496,19 +520,19 @@ nand_flash_print_info:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR7
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L68
-	adrp	x1, .LANCHOR8
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L73
+	adrp	x1, .LANCHOR10
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR10
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L68:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L69
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L73:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L74
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w6, [x0, 6]
 	ldrb	w5, [x0, 5]
 	ldrb	w4, [x0, 4]
@@ -518,278 +542,278 @@ nand_flash_print_info:
 	adrp	x0, .LC2
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L69:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L70
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L74:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L75
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L70:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L71
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L75:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L76
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 9]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	bl	printf
-.L71:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L72
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L76:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L77
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 10]
 	adrp	x0, .LC5
 	add	x0, x0, :lo12:.LC5
 	bl	printf
-.L72:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L73
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L77:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L78
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 12]
 	adrp	x0, .LC6
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L73:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L74
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L78:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L79
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 13]
 	adrp	x0, .LC7
 	add	x0, x0, :lo12:.LC7
 	bl	printf
-.L74:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L75
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L79:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L80
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 14]
 	adrp	x0, .LC8
 	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L75:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L76
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L80:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L81
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 23]
 	adrp	x0, .LC9
 	add	x0, x0, :lo12:.LC9
 	bl	printf
-.L76:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L77
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L81:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L82
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 18]
 	adrp	x0, .LC10
 	add	x0, x0, :lo12:.LC10
 	bl	printf
-.L77:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L78
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L82:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L83
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 19]
 	adrp	x0, .LC11
 	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L78:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L79
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L83:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L84
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 20]
 	adrp	x0, .LC12
 	add	x0, x0, :lo12:.LC12
 	bl	printf
-.L79:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L80
-	adrp	x0, .LANCHOR10
-	ldrb	w1, [x0, #:lo12:.LANCHOR10]
+.L84:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L85
+	adrp	x0, .LANCHOR12
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
 	adrp	x0, .LC13
 	add	x0, x0, :lo12:.LC13
 	bl	printf
-.L80:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L81
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+.L85:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L86
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L81:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L82
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L86:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L87
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 22]
 	adrp	x0, .LC15
 	add	x0, x0, :lo12:.LC15
 	bl	printf
-.L82:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L83
-	adrp	x0, .LANCHOR12
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+.L87:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L88
+	adrp	x0, .LANCHOR14
+	ldrb	w1, [x0, #:lo12:.LANCHOR14]
 	adrp	x0, .LC16
 	add	x0, x0, :lo12:.LC16
 	bl	printf
-.L83:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L84
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L88:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L89
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 16]
 	adrp	x0, .LC17
 	add	x0, x0, :lo12:.LC17
 	and	w1, w1, 1
 	bl	printf
-.L84:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L85
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L89:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L90
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC18
 	add	x0, x0, :lo12:.LC18
 	ubfx	x1, x1, 1, 1
 	bl	printf
-.L85:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L86
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L90:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L91
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC19
 	add	x0, x0, :lo12:.LC19
 	ubfx	x1, x1, 2, 1
 	bl	printf
-.L86:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L87
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L91:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L92
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC20
 	add	x0, x0, :lo12:.LC20
 	ubfx	x1, x1, 3, 1
 	bl	printf
-.L87:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L88
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L92:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L93
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC21
 	add	x0, x0, :lo12:.LC21
 	ubfx	x1, x1, 4, 1
 	bl	printf
-.L88:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L89
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L93:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC22
 	add	x0, x0, :lo12:.LC22
 	ubfx	x1, x1, 5, 1
 	bl	printf
-.L89:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L90
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L94:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L95
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC23
 	add	x0, x0, :lo12:.LC23
 	ubfx	x1, x1, 6, 1
 	bl	printf
-.L90:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L91
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC24
 	add	x0, x0, :lo12:.LC24
 	ubfx	x1, x1, 7, 1
 	bl	printf
-.L91:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L92
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w1, [x0, 17]
 	adrp	x0, .LC25
 	add	x0, x0, :lo12:.LC25
 	and	w1, w1, 1
 	bl	printf
-.L92:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L93
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L98
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC26
 	add	x0, x0, :lo12:.LC26
 	ubfx	x1, x1, 9, 1
 	bl	printf
-.L93:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L94
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L98:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L99
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrh	w1, [x0, 16]
 	adrp	x0, .LC27
 	add	x0, x0, :lo12:.LC27
 	ubfx	x1, x1, 10, 1
 	bl	printf
-.L94:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L95
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+.L99:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L100
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x0, #:lo12:.LANCHOR13]
 	adrp	x0, .LC14
 	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L95:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L96
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+.L100:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L101
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	ldrb	w2, [x0, 11]
 	ldrb	w1, [x0, 10]
 	adrp	x0, .LC28
 	add	x0, x0, :lo12:.LC28
 	bl	printf
-.L96:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L97
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+.L101:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L102
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	ldrb	w2, [x0, 9]
 	ldrb	w1, [x0, 8]
 	adrp	x0, .LC29
 	add	x0, x0, :lo12:.LC29
 	bl	printf
-.L97:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L67
-	adrp	x0, .LANCHOR14
+.L102:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L72
+	adrp	x0, .LANCHOR16
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	ldrb	w1, [x0, #:lo12:.LANCHOR14]
+	ldrb	w1, [x0, #:lo12:.LANCHOR16]
 	adrp	x0, .LC30
 	add	x0, x0, :lo12:.LC30
 	b	printf
-.L67:
+.L72:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -802,11 +826,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L191:
+.L196:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L191
+	cbnz	w0, .L196
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -836,54 +860,54 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR19
-	add	x6, x6, :lo12:.LANCHOR19
-	adrp	x3, .LANCHOR15
-	add	x3, x3, :lo12:.LANCHOR15
+	adrp	x6, .LANCHOR21
+	add	x6, x6, :lo12:.LANCHOR21
+	adrp	x3, .LANCHOR17
+	add	x3, x3, :lo12:.LANCHOR17
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR16
-	add	x7, x0, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR18
+	add	x7, x0, :lo12:.LANCHOR18
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR17
+	adrp	x8, .LANCHOR19
 	mov	x2, 0
-	adrp	x10, .LANCHOR18
-	add	x8, x8, :lo12:.LANCHOR17
-	add	x10, x10, :lo12:.LANCHOR18
+	adrp	x10, .LANCHOR20
+	add	x8, x8, :lo12:.LANCHOR19
+	add	x10, x10, :lo12:.LANCHOR20
 	cmp	w0, w2
-	bhi	.L204
+	bhi	.L209
 	ret
-.L198:
+.L203:
 	cmp	w0, 35
-	bne	.L200
+	bne	.L205
 	ldrsb	w0, [x3, x2]
-	b	.L205
-.L200:
+	b	.L210
+.L205:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L205
-.L204:
+	b	.L210
+.L209:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L201:
+.L206:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR16
+	add	x0, x5, :lo12:.LANCHOR18
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L198
+	bne	.L203
 	ldrsb	w0, [x7, x2]
-.L205:
+.L210:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L201
+	bhi	.L206
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -891,11 +915,11 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR20
+	adrp	x2, .LANCHOR22
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR20]
+	ldr	x2, [x2, #:lo12:.LANCHOR22]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -906,19 +930,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR21
-	ldr	x3, [x1, #:lo12:.LANCHOR21]
+	adrp	x1, .LANCHOR23
+	ldr	x3, [x1, #:lo12:.LANCHOR23]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L212
+	bhi	.L217
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L212:
+.L217:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L208:
+.L213:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -927,7 +951,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L208
+	bhi	.L213
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -938,29 +962,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR17
-	ldrb	w1, [x1, #:lo12:.LANCHOR17]
+	adrp	x1, .LANCHOR19
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L219
-	adrp	x8, .LANCHOR20
+	bhi	.L224
+	adrp	x8, .LANCHOR22
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR20]
+	ldr	x1, [x8, #:lo12:.LANCHOR22]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L219
+	cbz	w1, .L224
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR20]
+	ldr	x0, [x8, #:lo12:.LANCHOR22]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L219:
+.L224:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -968,20 +992,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR22
+	adrp	x1, .LANCHOR24
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR21
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
-	ldr	x2, [x2, #:lo12:.LANCHOR21]
+	adrp	x2, .LANCHOR23
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	ldr	x2, [x2, #:lo12:.LANCHOR23]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L223
+	bne	.L228
 	str	w1, [x2, 80]
 	ret
-.L223:
+.L228:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -990,43 +1014,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR22
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR21
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
-	bne	.L226
+	adrp	x0, .LANCHOR23
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
+	bne	.L231
 	ldr	w0, [x0, 80]
-.L228:
+.L233:
 	ubfx	x0, x0, 8, 8
 	ret
-.L226:
+.L231:
 	ldr	w0, [x0, 304]
-	b	.L228
+	b	.L233
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR21]
+	ldr	x2, [x1, #:lo12:.LANCHOR23]
 	ldr	w1, [x2]
-	beq	.L230
+	beq	.L235
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR24
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L232
+	bne	.L237
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -1034,10 +1058,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L233:
+.L238:
 	str	w1, [x2]
 	ret
-.L232:
+.L237:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -1045,20 +1069,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L233
-.L230:
+	b	.L238
+.L235:
 	and	w1, w1, -8193
-	b	.L233
+	b	.L238
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR21]
+	ldr	x3, [x1, #:lo12:.LANCHOR23]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -1069,8 +1093,8 @@ nandc_cs:
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR21
-	ldr	x1, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x1, [x0, #:lo12:.LANCHOR23]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -1086,25 +1110,25 @@ flash_wait_device_ready_raw:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	mov	w19, w1
 	mov	w20, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	cmp	w0, w21
-	bhi	.L239
-	adrp	x1, .LANCHOR23
+	bhi	.L244
+	adrp	x1, .LANCHOR25
 	adrp	x0, .LC0
 	mov	w2, 599
-	add	x1, x1, :lo12:.LANCHOR23
+	add	x1, x1, :lo12:.LANCHOR25
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L239:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L244:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w5, [x0, w21, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x4, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w5
 	bl	nandc_cs
 	ubfiz	x2, x5, 8, 8
@@ -1113,7 +1137,7 @@ flash_wait_device_ready_raw:
 	and	w19, w19, 255
 	add	x2, x4, x2
 	mov	w4, 120
-.L242:
+.L247:
 	str	w4, [x2, 2056]
 	mov	w0, 120
 	str	w19, [x2, 2052]
@@ -1123,9 +1147,9 @@ flash_wait_device_ready_raw:
 	ldr	w3, [x2, 2048]
 	and	w3, w3, 255
 	bics	wzr, w20, w3
-	bne	.L242
+	bne	.L247
 	cmp	w3, 255
-	beq	.L242
+	beq	.L247
 	mov	w0, w5
 	bl	nandc_de_cs
 	ldp	x19, x20, [sp, 16]
@@ -1143,31 +1167,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L246
-	adrp	x0, .LANCHOR11
-	adrp	x5, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L247
-	ldrb	w0, [x5, #:lo12:.LANCHOR25]
-	cbz	w0, .L246
-.L247:
-	adrp	x0, .LANCHOR26
-	ldrh	w3, [x0, #:lo12:.LANCHOR26]
-	ldrb	w0, [x5, #:lo12:.LANCHOR25]
+	bne	.L251
+	adrp	x0, .LANCHOR13
+	adrp	x5, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L252
+	ldrb	w0, [x5, #:lo12:.LANCHOR27]
+	cbz	w0, .L251
+.L252:
+	adrp	x0, .LANCHOR28
+	ldrh	w3, [x0, #:lo12:.LANCHOR28]
+	ldrb	w0, [x5, #:lo12:.LANCHOR27]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L248
+	cbz	w0, .L253
 	add	w1, w4, w3, lsl 1
-.L246:
+.L251:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L248:
-	adrp	x5, .LANCHOR27
-	add	x5, x5, :lo12:.LANCHOR27
+.L253:
+	adrp	x5, .LANCHOR29
+	add	x5, x5, :lo12:.LANCHOR29
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L246
+	b	.L251
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -1177,25 +1201,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR21
+	adrp	x3, .LANCHOR23
 	add	x29, sp, 0
-.L257:
+.L262:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR21]
+	ldr	x0, [x3, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L258
+	tbnz	x0, 9, .L263
 	subs	w2, w2, #1
-	bne	.L257
+	bne	.L262
 	mov	w0, -1
-.L255:
+.L260:
 	ldp	x29, x30, [sp], 32
 	ret
-.L258:
+.L263:
 	mov	w0, 0
-	b	.L255
+	b	.L260
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -1213,35 +1237,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
+	adrp	x0, .LANCHOR21
+	adrp	x2, .LANCHOR17
+	add	x2, x2, :lo12:.LANCHOR17
+	ldrb	w4, [x0, #:lo12:.LANCHOR21]
 	adrp	x0, .LANCHOR19
-	adrp	x2, .LANCHOR15
-	add	x2, x2, :lo12:.LANCHOR15
-	ldrb	w4, [x0, #:lo12:.LANCHOR19]
-	adrp	x0, .LANCHOR17
-	ldrb	w5, [x0, #:lo12:.LANCHOR17]
+	ldrb	w5, [x0, #:lo12:.LANCHOR19]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR16
-	add	x0, x0, :lo12:.LANCHOR16
+	adrp	x0, .LANCHOR18
+	add	x0, x0, :lo12:.LANCHOR18
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L262:
+.L267:
 	cmp	w4, w0
-	bhi	.L265
+	bhi	.L270
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L265:
+.L270:
 	cmp	w5, 67
-	bne	.L263
+	bne	.L268
 	ldrsb	w6, [x1, x0]
-.L267:
+.L272:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L262
-.L263:
-	ldrsb	w6, [x2, x0]
 	b	.L267
+.L268:
+	ldrsb	w6, [x2, x0]
+	b	.L272
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -1260,8 +1284,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR28
-	add	x0, x0, :lo12:.LANCHOR28
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1296,8 +1320,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR29
-	add	x2, x2, :lo12:.LANCHOR29
+	adrp	x2, .LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR31
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -1313,7 +1337,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L272
+	cbz	w2, .L277
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -1322,8 +1346,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR30
-	add	x0, x0, :lo12:.LANCHOR30
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1345,59 +1369,59 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L275:
+.L280:
 	b	nandc_wait_flash_ready
-.L272:
+.L277:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR31
-	add	x2, x2, :lo12:.LANCHOR31
+	adrp	x2, .LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR33
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L275
+	b	.L280
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR11
+	adrp	x1, .LANCHOR13
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L278
-	adrp	x1, .LANCHOR21
+	ldrb	w2, [x1, #:lo12:.LANCHOR13]
+	cbz	w2, .L283
+	adrp	x1, .LANCHOR23
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
-	bne	.L281
-.L298:
-	adrp	x2, .LANCHOR32+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR32+29]
-	cbz	w2, .L278
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	bne	.L286
+.L303:
+	adrp	x2, .LANCHOR34+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR34+29]
+	cbz	w2, .L283
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L281:
+.L286:
 	cmp	w2, 2
-	bne	.L283
-	adrp	x2, .LANCHOR33
-	add	x2, x2, :lo12:.LANCHOR33
+	bne	.L288
+	adrp	x2, .LANCHOR35
+	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w3, [x2, x0]
-	cbz	w3, .L278
+	cbz	w3, .L283
 	strb	wzr, [x2, x0]
-	b	.L298
-.L283:
+	b	.L303
+.L288:
 	cmp	w2, 3
-	bne	.L278
-	adrp	x2, .LANCHOR33
+	bne	.L283
+	adrp	x2, .LANCHOR35
 	sxtw	x3, w0
-	add	x2, x2, :lo12:.LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR35
 	ldrb	w4, [x2, x3]
-	cbz	w4, .L278
+	cbz	w4, .L283
 	ubfiz	x0, x0, 8, 8
 	strb	wzr, [x2, x3]
 	add	x0, x1, x0
@@ -1411,7 +1435,7 @@ zftl_flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L278:
+.L283:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1419,51 +1443,51 @@ zftl_flash_enter_slc_mode:
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR11
+	adrp	x1, .LANCHOR13
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L299
-	adrp	x1, .LANCHOR21
+	ldrb	w2, [x1, #:lo12:.LANCHOR13]
+	cbz	w2, .L304
+	adrp	x1, .LANCHOR23
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
-	bne	.L302
-	adrp	x2, .LANCHOR32+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR32+30]
-.L319:
-	cbz	w2, .L299
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	bne	.L307
+	adrp	x2, .LANCHOR34+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR34+30]
+.L324:
+	cbz	w2, .L304
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L302:
+.L307:
 	cmp	w2, 2
-	bne	.L304
-	adrp	x3, .LANCHOR33
-	add	x3, x3, :lo12:.LANCHOR33
+	bne	.L309
+	adrp	x3, .LANCHOR35
+	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x0]
-	cbnz	w2, .L299
-	adrp	x2, .LANCHOR32
-	add	x2, x2, :lo12:.LANCHOR32
+	cbnz	w2, .L304
+	adrp	x2, .LANCHOR34
+	add	x2, x2, :lo12:.LANCHOR34
 	mov	w5, 4
 	ldrb	w4, [x2, 12]
 	ldrb	w2, [x2, 30]
 	cmp	w4, 2
 	csel	w4, w4, w5, eq
 	strb	w4, [x3, x0]
-	b	.L319
-.L304:
+	b	.L324
+.L309:
 	cmp	w2, 3
-	bne	.L299
-	adrp	x3, .LANCHOR33
+	bne	.L304
+	adrp	x3, .LANCHOR35
 	sxtw	x4, w0
-	add	x3, x3, :lo12:.LANCHOR33
+	add	x3, x3, :lo12:.LANCHOR35
 	ldrb	w2, [x3, x4]
-	cbnz	w2, .L299
+	cbnz	w2, .L304
 	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR32+12
+	adrp	x2, .LANCHOR34+12
 	add	x0, x1, x0
 	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR32+12]
+	ldrb	w2, [x2, #:lo12:.LANCHOR34+12]
 	mov	w5, 4
 	str	w1, [x0, 2056]
 	cmp	w2, 2
@@ -1477,7 +1501,7 @@ zftl_flash_exit_slc_mode:
 	str	wzr, [x0, 2048]
 	strb	w2, [x3, x4]
 	b	nandc_wait_flash_ready
-.L299:
+.L304:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_start_page_read,"ax",@progbits
@@ -1489,54 +1513,54 @@ flash_start_page_read:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	ubfx	x22, x1, 21, 3
 	and	w19, w1, 2097151
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	ubfx	x21, x1, 24, 2
 	cmp	w0, w22
-	bhi	.L321
-	adrp	x1, .LANCHOR34
+	bhi	.L326
+	adrp	x1, .LANCHOR36
 	adrp	x0, .LC0
 	mov	w2, 736
-	add	x1, x1, :lo12:.LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR36
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L321:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L326:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w7, [x0, w22, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x6, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x6, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w7
 	bl	nandc_cs
-	cbnz	w21, .L322
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L323
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L324
-.L323:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	cbnz	w21, .L327
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L328
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L329
+.L328:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L325
+	cbz	w1, .L330
 	add	w19, w0, w19, lsl 1
-.L324:
+.L329:
 	mov	w0, w7
 	bl	zftl_flash_enter_slc_mode
-	b	.L326
-.L325:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+	b	.L331
+.L330:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L326:
+.L331:
 	ubfiz	x0, x7, 8, 8
 	and	w1, w19, 255
 	add	x0, x6, x0
@@ -1554,21 +1578,21 @@ flash_start_page_read:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	b	nandc_de_cs
-.L322:
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+.L327:
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L327
+	bne	.L332
 	sxtw	x0, w7
 	add	x0, x0, 8
 	add	x0, x6, x0, lsl 8
 	str	w21, [x0, 8]
-	b	.L326
-.L327:
+	b	.L331
+.L332:
 	mov	w0, w7
 	bl	zftl_flash_exit_slc_mode
-	b	.L326
+	b	.L331
 	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
@@ -1579,48 +1603,48 @@ flash_erase_duplane_block:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
 	mov	w22, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	w21, w3
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L333
-	adrp	x1, .LANCHOR35
+	bhi	.L338
+	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
 	mov	w2, 510
-	add	x1, x1, :lo12:.LANCHOR35
+	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L333:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L338:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x24, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR23
+	ldr	x24, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR9
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L334
+	tbz	x0, 4, .L339
 	adrp	x0, .LC31
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L334:
+.L339:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L335
+	cbnz	w25, .L340
 	bl	zftl_flash_enter_slc_mode
-.L336:
+.L341:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
@@ -1630,9 +1654,9 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	lsr	w0, w22, 16
 	str	w0, [x24, 2052]
-	adrp	x0, .LANCHOR36
-	ldrb	w0, [x0, #:lo12:.LANCHOR36]
-	cbnz	w0, .L339
+	adrp	x0, .LANCHOR38
+	ldrb	w0, [x0, #:lo12:.LANCHOR38]
+	cbnz	w0, .L344
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1640,7 +1664,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L337:
+.L342:
 	mov	w0, 96
 	str	w0, [x24, 2056]
 	and	w0, w21, 255
@@ -1660,12 +1684,12 @@ flash_erase_duplane_block:
 	bl	nandc_de_cs
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L338
+	cbz	w19, .L343
 	adrp	x0, .LC32
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L338:
+.L343:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1673,12 +1697,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L335:
+.L340:
 	bl	zftl_flash_exit_slc_mode
-	b	.L336
-.L339:
+	b	.L341
+.L344:
 	mov	w5, 0
-	b	.L337
+	b	.L342
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -1689,47 +1713,47 @@ flash_erase_block_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	str	x25, [sp, 64]
 	mov	w21, w2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	and	w22, w2, 2097151
 	stp	x23, x24, [sp, 48]
 	and	w25, w1, 255
 	cmp	w0, w19
-	bhi	.L348
-	adrp	x1, .LANCHOR37
+	bhi	.L353
+	adrp	x1, .LANCHOR39
 	adrp	x0, .LC0
 	mov	w2, 555
-	add	x1, x1, :lo12:.LANCHOR37
+	add	x1, x1, :lo12:.LANCHOR39
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L348:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L353:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x24, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR23
+	ldr	x24, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR9
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L349
+	tbz	x0, 4, .L354
 	adrp	x0, .LC33
 	mov	w2, w21
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L349:
+.L354:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L350
+	cbnz	w25, .L355
 	bl	zftl_flash_enter_slc_mode
-.L351:
+.L356:
 	add	x0, x24, x19, lsl 8
 	mov	w1, 96
 	str	w1, [x0, 2056]
@@ -1749,15 +1773,15 @@ flash_erase_block_en:
 	bl	nandc_de_cs
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L352
-	adrp	x0, .LANCHOR26
+	beq	.L357
+	adrp	x0, .LANCHOR28
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR26]
+	ldrh	w1, [x0, #:lo12:.LANCHOR28]
 	adrp	x0, .LC34
 	add	x0, x0, :lo12:.LC34
 	udiv	w1, w21, w1
 	bl	printf
-.L352:
+.L357:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1765,9 +1789,9 @@ flash_erase_block_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L350:
+.L355:
 	bl	zftl_flash_exit_slc_mode
-	b	.L351
+	b	.L356
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1784,27 +1808,27 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR26
+	adrp	x23, .LANCHOR28
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR26
+	add	x23, x23, :lo12:.LANCHOR28
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR12
+	adrp	x22, .LANCHOR14
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR12
-	adrp	x24, .LANCHOR24
+	add	x22, x22, :lo12:.LANCHOR14
+	adrp	x24, .LANCHOR26
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L362:
+.L367:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L365
+	bhi	.L370
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -1814,23 +1838,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L365:
-	add	x0, x24, :lo12:.LANCHOR24
+.L370:
+	add	x0, x24, :lo12:.LANCHOR26
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L363:
+.L368:
 	cmp	w20, w21, uxth
-	bhi	.L364
+	bhi	.L369
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L362
-.L364:
+	b	.L367
+.L369:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L363
+	b	.L368
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -1840,57 +1864,57 @@ flash_set_interface_mode:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR38
+	adrp	x24, .LANCHOR40
 	stp	x21, x22, [sp, 32]
-	adrp	x23, .LANCHOR7
-	adrp	x22, .LANCHOR39
+	adrp	x23, .LANCHOR9
+	adrp	x22, .LANCHOR41
 	str	x25, [sp, 64]
-	add	x24, x24, :lo12:.LANCHOR38
-	add	x22, x22, :lo12:.LANCHOR39
-	add	x23, x23, :lo12:.LANCHOR7
+	add	x24, x24, :lo12:.LANCHOR40
+	add	x22, x22, :lo12:.LANCHOR41
+	add	x23, x23, :lo12:.LANCHOR9
 	mov	w25, w0
 	stp	x19, x20, [sp, 16]
 	mov	x20, 0
-.L377:
+.L382:
 	lsl	x0, x20, 3
 	ldrb	w21, [x0, x24]
 	mov	w0, 69
 	cmp	w21, 152
 	ccmp	w21, w0, 4, ne
-	beq	.L368
+	beq	.L373
 	cmp	w21, 44
-	bne	.L369
-.L368:
-	adrp	x0, .LANCHOR21
+	bne	.L374
+.L373:
+	adrp	x0, .LANCHOR23
 	ldrb	w1, [x22]
 	cmp	w25, 1
-	ldr	x19, [x0, #:lo12:.LANCHOR21]
-	bne	.L370
-	tbz	x1, 0, .L369
+	ldr	x19, [x0, #:lo12:.LANCHOR23]
+	bne	.L375
+	tbz	x1, 0, .L374
 	ldr	w0, [x23]
-	tbz	x0, 12, .L371
+	tbz	x0, 12, .L376
 	adrp	x0, .LC36
 	add	x0, x0, :lo12:.LC36
 	bl	printf
-.L371:
+.L376:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
 	mov	w1, 1
-	bne	.L372
+	bne	.L377
 	str	w1, [x0, 2052]
 	mov	w1, 5
-.L392:
+.L397:
 	str	w1, [x0, 2048]
-.L376:
+.L381:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-.L369:
+.L374:
 	add	x20, x20, 1
 	cmp	x20, 4
-	bne	.L377
+	bne	.L382
 	bl	nandc_wait_flash_ready
 	ldr	x25, [sp, 64]
 	mov	w0, 0
@@ -1899,42 +1923,42 @@ flash_set_interface_mode:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L372:
+.L377:
 	mov	w2, 128
 	str	w2, [x0, 2052]
-	b	.L392
-.L370:
-	tbz	x1, 2, .L369
+	b	.L397
+.L375:
+	tbz	x1, 2, .L374
 	ldr	w0, [x23]
-	tbz	x0, 12, .L374
+	tbz	x0, 12, .L379
 	adrp	x0, .LC37
 	add	x0, x0, :lo12:.LC37
 	bl	printf
-.L374:
+.L379:
 	add	x0, x19, x20, lsl 8
 	mov	w1, 239
 	cmp	w21, 44
 	str	w1, [x0, 2056]
-	bne	.L375
+	bne	.L380
 	mov	w1, 1
 	str	w1, [x0, 2052]
 	mov	w1, 35
-	b	.L392
-.L375:
+	b	.L397
+.L380:
 	mov	w1, 128
 	str	w1, [x0, 2052]
 	str	wzr, [x0, 2048]
-	b	.L376
+	b	.L381
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1947,10 +1971,10 @@ flash_reset:
 flash_read_id:
 	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	ldr	x4, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w10
 	bl	flash_reset
 	mov	w0, w10
@@ -1984,7 +2008,7 @@ flash_read_id:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L394
+	bhi	.L399
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
@@ -1995,7 +2019,7 @@ flash_read_id:
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L394:
+.L399:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -2006,12 +2030,12 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR32+9
+	adrp	x2, .LANCHOR34+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
-	adrp	x2, .LANCHOR21
-	ldr	x4, [x2, #:lo12:.LANCHOR21]
+	ldrb	w3, [x2, #:lo12:.LANCHOR34+9]
+	adrp	x2, .LANCHOR23
+	ldr	x4, [x2, #:lo12:.LANCHOR23]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -2039,20 +2063,20 @@ flash_read_spare:
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -48]!
 	mov	w4, w1
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	and	x2, x0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR32
-	ldr	x19, [x1, #:lo12:.LANCHOR21]
-	add	x1, x20, :lo12:.LANCHOR32
+	adrp	x20, .LANCHOR34
+	ldr	x19, [x1, #:lo12:.LANCHOR23]
+	add	x1, x20, :lo12:.LANCHOR34
 	str	x21, [sp, 32]
 	mov	x0, x2
 	add	x2, x2, 8
 	ldrb	w1, [x1, 29]
 	add	x2, x19, x2, lsl 8
-	cbz	w1, .L400
-.L414:
+	cbz	w1, .L405
+.L419:
 	ubfiz	x0, x0, 8, 8
 	str	w1, [x2, 8]
 	add	x19, x19, x0
@@ -2076,37 +2100,37 @@ sandisk_prog_test_bad_block:
 	ldr	w2, [x19, 2048]
 	mov	w0, 5
 	ands	w21, w2, w0
-	beq	.L402
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L402
+	beq	.L407
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L407
 	adrp	x0, .LC39
 	mov	w1, w4
 	add	x0, x0, :lo12:.LC39
 	bl	printf
-.L402:
-	add	x20, x20, :lo12:.LANCHOR32
+.L407:
+	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 30]
-	cbz	w0, .L399
+	cbz	w0, .L404
 	str	w0, [x19, 2056]
-.L399:
+.L404:
 	mov	w0, w21
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L400:
+.L405:
 	mov	w1, 162
-	b	.L414
+	b	.L419
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
 	.section	.text.nandc_rdy_status,"ax",@progbits
 	.align	2
 	.global	nandc_rdy_status
 	.type	nandc_rdy_status, %function
 nandc_rdy_status:
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -2119,69 +2143,69 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR40
+	adrp	x2, .LANCHOR42
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR40]
-	adrp	x2, .LANCHOR22
-	ldrb	w2, [x2, #:lo12:.LANCHOR22]
+	strb	w0, [x2, #:lo12:.LANCHOR42]
+	adrp	x2, .LANCHOR24
+	ldrb	w2, [x2, #:lo12:.LANCHOR24]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR21
-	ldr	x2, [x2, #:lo12:.LANCHOR21]
-	bne	.L418
+	adrp	x2, .LANCHOR23
+	ldr	x2, [x2, #:lo12:.LANCHOR23]
+	bne	.L423
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L425
+	beq	.L430
 	cmp	w0, 60
-	beq	.L426
+	beq	.L431
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L419:
+.L424:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L425:
+.L430:
 	mov	w1, 0
-	b	.L419
-.L426:
+	b	.L424
+.L431:
 	mov	w1, 3
-	b	.L419
-.L418:
+	b	.L424
+.L423:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L421
-.L424:
+	bne	.L426
+.L429:
 	and	w1, w1, -17
-.L422:
+.L427:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L421:
+.L426:
 	cmp	w0, 24
-	bne	.L423
+	bne	.L428
 	orr	w1, w1, 16
-	b	.L422
-.L423:
+	b	.L427
+.L428:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L422
-	b	.L424
+	bne	.L427
+	b	.L429
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR22
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	cmp	w1, 9
-	bne	.L432
+	bne	.L437
 	ldr	w0, [x0, 296]
 	ret
-.L432:
+.L437:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -2213,38 +2237,38 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR43
+	adrp	x4, .LANCHOR45
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR24
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
-	adrp	x24, .LANCHOR21
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	adrp	x24, .LANCHOR23
 	cmp	w0, 9
-	bne	.L438
+	bne	.L443
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR41
+	adrp	x0, .LANCHOR43
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldrb	w0, [x0, #:lo12:.LANCHOR41]
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
 	orr	w19, w19, 128
-	cbz	w0, .L439
-	adrp	x0, .LANCHOR42
-	ldrb	w1, [x0, #:lo12:.LANCHOR42]
+	cbz	w0, .L444
+	adrp	x0, .LANCHOR44
+	ldrb	w1, [x0, #:lo12:.LANCHOR44]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L439:
-	add	x21, x4, :lo12:.LANCHOR43
+.L444:
+	add	x21, x4, :lo12:.LANCHOR45
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -2261,7 +2285,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR21]
+	ldr	x1, [x24, #:lo12:.LANCHOR23]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -2278,22 +2302,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR44
+	adrp	x2, .LANCHOR46
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR44]
+	ldrh	w2, [x2, #:lo12:.LANCHOR46]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L437:
+.L442:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L438:
-	ldr	x0, [x24, #:lo12:.LANCHOR21]
+.L443:
+	ldr	x0, [x24, #:lo12:.LANCHOR23]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -2308,24 +2332,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L441
-	adrp	x0, .LANCHOR40
+	cbz	w23, .L446
+	adrp	x0, .LANCHOR42
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR43]
+	ldr	x8, [x4, #:lo12:.LANCHOR45]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L443:
+.L448:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L444
-.L445:
-	add	x21, x4, :lo12:.LANCHOR43
-	ldr	x0, [x4, #:lo12:.LANCHOR43]
+	bne	.L449
+.L450:
+	add	x21, x4, :lo12:.LANCHOR45
+	ldr	x0, [x4, #:lo12:.LANCHOR45]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -2342,7 +2366,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR21]
+	ldr	x1, [x24, #:lo12:.LANCHOR23]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -2359,8 +2383,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L437
-.L444:
+	b	.L442
+.L449:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -2368,11 +2392,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L443
-.L441:
-	ldr	x1, [x4, #:lo12:.LANCHOR43]
+	b	.L448
+.L446:
+	ldr	x1, [x4, #:lo12:.LANCHOR45]
 	str	w0, [x1]
-	b	.L445
+	b	.L450
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -2380,23 +2404,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR45
-	add	x1, x1, :lo12:.LANCHOR45
+	adrp	x1, .LANCHOR47
+	add	x1, x1, :lo12:.LANCHOR47
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR42
-	ldrb	w2, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR44
+	ldrb	w2, [x1, #:lo12:.LANCHOR44]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR22
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR21
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
-	bne	.L455
+	adrp	x1, .LANCHOR23
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
+	bne	.L460
 	str	w0, [x1, 520]
 	ret
-.L455:
+.L460:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -2409,29 +2433,29 @@ zftl_flash_de_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
-	adrp	x19, .LANCHOR14
+	adrp	x19, .LANCHOR16
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	ldrb	w0, [x19, #:lo12:.LANCHOR14]
-	cbz	w0, .L460
-	adrp	x0, .LANCHOR39
-	ldrb	w0, [x0, #:lo12:.LANCHOR39]
-	tbz	x0, 0, .L460
+	ldrb	w0, [x19, #:lo12:.LANCHOR16]
+	cbz	w0, .L465
+	adrp	x0, .LANCHOR41
+	ldrb	w0, [x0, #:lo12:.LANCHOR41]
+	tbz	x0, 0, .L465
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR14]
-.L460:
-	adrp	x3, .LANCHOR42
-	ldrb	w0, [x3, #:lo12:.LANCHOR42]
-	cbz	w0, .L461
+	strb	wzr, [x19, #:lo12:.LANCHOR16]
+.L465:
+	adrp	x3, .LANCHOR44
+	ldrb	w0, [x3, #:lo12:.LANCHOR44]
+	cbz	w0, .L466
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR42]
+	strb	wzr, [x3, #:lo12:.LANCHOR44]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR42]
-.L461:
+	strb	w0, [x3, #:lo12:.LANCHOR44]
+.L466:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -2442,8 +2466,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR42
-	strb	w0, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR44
+	strb	w0, [x1, #:lo12:.LANCHOR44]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -2451,10 +2475,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR21
+	adrp	x1, .LANCHOR23
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	ldr	x1, [x1, #:lo12:.LANCHOR23]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -2463,10 +2487,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR46
-	add	x1, x0, :lo12:.LANCHOR46
+	adrp	x0, .LANCHOR48
+	add	x1, x0, :lo12:.LANCHOR48
 	mov	w2, 0
-.L475:
+.L480:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2476,14 +2500,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L475
-	add	x0, x0, :lo12:.LANCHOR46
+	bne	.L480
+	add	x0, x0, :lo12:.LANCHOR48
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR47
-	strb	wzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR48
-	strb	w2, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
+	strb	w2, [x0, #:lo12:.LANCHOR50]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2501,49 +2525,49 @@ buf_add_tail:
 	mov	x20, x1
 	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L483
+	bne	.L488
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L479
-	adrp	x1, .LANCHOR49
+	bne	.L484
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR49
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L479:
+.L484:
 	ldrb	w0, [x20, 1]
 	strb	w0, [x19]
-.L477:
+.L482:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L483:
-	adrp	x0, .LANCHOR46
-	add	x2, x0, :lo12:.LANCHOR46
+.L488:
+	adrp	x0, .LANCHOR48
+	add	x2, x0, :lo12:.LANCHOR48
 	mov	x19, x0
-.L484:
+.L489:
 	sbfiz	x0, x1, 6, 32
 	mov	w21, w1
 	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L484
+	bne	.L489
 	ldrb	w0, [x20, 1]
 	cmp	w0, 255
-	bne	.L481
-	adrp	x1, .LANCHOR49
+	bne	.L486
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR49
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L481:
-	add	x0, x19, :lo12:.LANCHOR46
+.L486:
+	add	x0, x19, :lo12:.LANCHOR48
 	sbfiz	x21, x21, 6, 32
 	ldrb	w1, [x20, 1]
 	strb	w1, [x0, x21]
-	b	.L477
+	b	.L482
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.buf_free,"ax",@progbits
 	.align	2
@@ -2551,30 +2575,30 @@ buf_add_tail:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR47
+	adrp	x2, .LANCHOR49
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L487
+	cbz	w1, .L492
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR47
+	add	x0, x2, :lo12:.LANCHOR49
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR48
+	adrp	x1, .LANCHOR50
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR48]
+	ldrb	w0, [x1, #:lo12:.LANCHOR50]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR48]
+	strb	w0, [x1, #:lo12:.LANCHOR50]
 	ret
-.L487:
-	ldrb	w1, [x2, #:lo12:.LANCHOR47]
+.L492:
+	ldrb	w1, [x2, #:lo12:.LANCHOR49]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR48
+	adrp	x1, .LANCHOR50
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR47]
-	ldrb	w0, [x1, #:lo12:.LANCHOR48]
+	strb	w0, [x2, #:lo12:.LANCHOR49]
+	ldrb	w0, [x1, #:lo12:.LANCHOR50]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR48]
+	strb	w0, [x1, #:lo12:.LANCHOR50]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2585,29 +2609,29 @@ buf_alloc:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR48
+	adrp	x19, .LANCHOR50
 	and	w20, w0, 255
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbz	w0, .L494
-.L497:
-	adrp	x3, .LANCHOR47
-	adrp	x1, .LANCHOR46
-	add	x0, x1, :lo12:.LANCHOR46
-	ldrb	w2, [x3, #:lo12:.LANCHOR47]
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbz	w0, .L499
+.L502:
+	adrp	x3, .LANCHOR49
+	adrp	x1, .LANCHOR48
+	add	x0, x1, :lo12:.LANCHOR48
+	ldrb	w2, [x3, #:lo12:.LANCHOR49]
 	ubfiz	x4, x2, 6, 8
 	add	x0, x0, x4
 	mov	x4, x3
-	cbz	w20, .L495
-.L496:
-	add	x1, x1, :lo12:.LANCHOR46
+	cbz	w20, .L500
+.L501:
+	add	x1, x1, :lo12:.LANCHOR48
 	sbfiz	x2, x2, 6, 32
 	add	x3, x1, x2
 	ldrb	w5, [x1, x2]
-	strb	w5, [x4, #:lo12:.LANCHOR47]
-	ldrb	w4, [x19, #:lo12:.LANCHOR48]
+	strb	w5, [x4, #:lo12:.LANCHOR49]
+	ldrb	w4, [x19, #:lo12:.LANCHOR50]
 	strh	wzr, [x3, 50]
 	sub	w4, w4, #1
-	strb	w4, [x19, #:lo12:.LANCHOR48]
+	strb	w4, [x19, #:lo12:.LANCHOR50]
 	mov	w4, 1
 	str	xzr, [x3, 16]
 	strb	w4, [x3, 2]
@@ -2615,27 +2639,27 @@ buf_alloc:
 	strb	w4, [x1, x2]
 	mov	w1, -1
 	str	w1, [x3, 36]
-	b	.L493
-.L494:
+	b	.L498
+.L499:
 	mov	w2, 121
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR52
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR50
+	add	x1, x1, :lo12:.LANCHOR52
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbnz	w0, .L497
-.L499:
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbnz	w0, .L502
+.L504:
 	mov	x0, 0
-.L493:
+.L498:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L495:
-	ldrb	w3, [x19, #:lo12:.LANCHOR48]
+.L500:
+	ldrb	w3, [x19, #:lo12:.LANCHOR50]
 	cmp	w3, 1
-	bne	.L496
-	b	.L499
+	bne	.L501
+	b	.L504
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2645,30 +2669,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L507
+	bne	.L512
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L511:
+.L516:
 	mov	w0, 1
 	ret
-.L508:
+.L513:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L509
+	bne	.L514
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L511
-.L507:
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
-.L509:
+	b	.L516
+.L512:
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
+.L514:
 	cmp	w2, 255
-	bne	.L508
+	bne	.L513
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2680,32 +2704,32 @@ buf_remove_free:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR48
+	adrp	x19, .LANCHOR50
 	mov	x20, x0
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbnz	w0, .L513
-	adrp	x1, .LANCHOR51
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbnz	w0, .L518
+	adrp	x1, .LANCHOR53
 	adrp	x0, .LC0
 	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR51
+	add	x1, x1, :lo12:.LANCHOR53
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L513:
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
-	cbz	w0, .L512
+.L518:
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
+	cbz	w0, .L517
 	mov	x1, x20
-	adrp	x0, .LANCHOR47
-	add	x0, x0, :lo12:.LANCHOR47
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L512
-	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	bne	.L517
+	ldrb	w0, [x19, #:lo12:.LANCHOR50]
 	sub	w0, w0, #1
-	strb	w0, [x19, #:lo12:.LANCHOR48]
+	strb	w0, [x19, #:lo12:.LANCHOR50]
 	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
 	strb	w0, [x20, 2]
-.L512:
+.L517:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -2715,8 +2739,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR32
-	add	x3, x3, :lo12:.LANCHOR32
+	adrp	x3, .LANCHOR34
+	add	x3, x3, :lo12:.LANCHOR34
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -2729,8 +2753,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR20
-	ldr	x2, [x2, #:lo12:.LANCHOR20]
+	adrp	x2, .LANCHOR22
+	ldr	x2, [x2, #:lo12:.LANCHOR22]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -2747,8 +2771,8 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR32
-	add	x0, x0, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR34
+	add	x0, x0, :lo12:.LANCHOR34
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
@@ -2768,8 +2792,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR20
-	ldr	x2, [x0, #:lo12:.LANCHOR20]
+	adrp	x0, .LANCHOR22
+	ldr	x2, [x0, #:lo12:.LANCHOR22]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -2790,15 +2814,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR53
+	adrp	x1, .LANCHOR55
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR53]
+	ldrb	w0, [x1, #:lo12:.LANCHOR55]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR53]
+	strb	w0, [x1, #:lo12:.LANCHOR55]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
@@ -2817,58 +2841,58 @@ ftl_read_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w0
-	adrp	x0, .LANCHOR54
+	adrp	x0, .LANCHOR56
 	str	x21, [sp, 32]
 	mov	x21, x1
-	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	ldr	w0, [x0, #:lo12:.LANCHOR56]
 	cmp	w0, w20
-	bhi	.L525
-	adrp	x1, .LANCHOR55
+	bhi	.L530
+	adrp	x1, .LANCHOR57
 	adrp	x0, .LC0
-	mov	w2, 888
-	add	x1, x1, :lo12:.LANCHOR55
+	mov	w2, 905
+	add	x1, x1, :lo12:.LANCHOR57
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L525:
-	adrp	x19, .LANCHOR46
-	add	x1, x19, :lo12:.LANCHOR46
+.L530:
+	adrp	x19, .LANCHOR48
+	add	x1, x19, :lo12:.LANCHOR48
 	add	x1, x1, 2
 	mov	w0, 0
-.L528:
+.L533:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L526
+	bne	.L531
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L526
+	tbz	x2, 3, .L531
 	ubfiz	x0, x0, 6, 32
-	add	x19, x19, :lo12:.LANCHOR46
+	add	x19, x19, :lo12:.LANCHOR48
 	add	x19, x19, x0
 	orr	w0, w2, 4
 	strb	w0, [x19, 2]
-	tbnz	x2, 0, .L524
+	tbnz	x2, 0, .L529
 	mov	x0, x19
 	bl	buf_remove_free
-.L524:
+.L529:
 	mov	x0, x19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L526:
+.L531:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L528
-	adrp	x0, .LANCHOR56
-	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	bne	.L533
+	adrp	x0, .LANCHOR58
+	ldr	w1, [x0, #:lo12:.LANCHOR58]
 	cmn	w1, #1
-	bne	.L529
-	str	w20, [x0, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR57
-	str	x21, [x0, #:lo12:.LANCHOR57]
-.L529:
+	bne	.L534
+	str	w20, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR59
+	str	x21, [x0, #:lo12:.LANCHOR59]
+.L534:
 	mov	x19, 0
-	b	.L524
+	b	.L529
 	.size	ftl_read_buf, .-ftl_read_buf
 	.section	.text.ftl_read_buf_free,"ax",@progbits
 	.align	2
@@ -2878,17 +2902,17 @@ ftl_read_buf_free:
 	mov	x5, x0
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	adrp	x0, .LANCHOR58
+	adrp	x0, .LANCHOR60
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_remove_buf
 	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L536
+	tbz	x0, 1, .L541
 	and	w0, w0, -5
 	strb	w0, [x5, 2]
 	ldp	x29, x30, [sp], 16
 	ret
-.L536:
+.L541:
 	ldp	x29, x30, [sp], 16
 	mov	x0, x5
 	b	buf_free
@@ -2898,11 +2922,11 @@ ftl_read_buf_free:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L541
-	adrp	x0, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	cbnz	w0, .L546
+	adrp	x0, .LANCHOR61
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ret
-.L541:
+.L546:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -2915,13 +2939,20 @@ zftl_get_density:
 gc_hook:
 	ret
 	.size	gc_hook, .-gc_hook
+	.section	.text.vpn_check,"ax",@progbits
+	.align	2
+	.global	vpn_check
+	.type	vpn_check, %function
+vpn_check:
+	ret
+	.size	vpn_check, .-vpn_check
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
 	.align	2
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR60
-	ldrh	w0, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -2951,118 +2982,151 @@ gc_add_sblk:
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
 	adrp	x0, .LANCHOR2
-	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	and	w22, w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR2]
-	and	w23, w2, 65535
 	stp	x25, x26, [sp, 64]
+	and	w24, w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	and	w25, w2, 65535
+	stp	x21, x22, [sp, 32]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L549
-	adrp	x1, .LANCHOR61
+	bhi	.L555
+	adrp	x1, .LANCHOR63
 	adrp	x0, .LC0
-	mov	w2, 252
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 258
+	add	x1, x1, :lo12:.LANCHOR63
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L549:
-	adrp	x24, .LANCHOR4
+.L555:
+	adrp	x22, .LANCHOR5
 	uxtw	x19, w20
 	lsl	x26, x19, 1
-	adrp	x25, .LANCHOR7
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	adrp	x23, .LANCHOR9
+	ldr	x0, [x22, #:lo12:.LANCHOR5]
 	adrp	x27, .LANCHOR3
 	ldrh	w21, [x0, x26]
-	ldr	w0, [x25, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L550
+	ldr	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L556
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	mov	w4, w21
-	mov	w2, w22
+	mov	w2, w24
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR62
-	ldrh	w6, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR63+56
+	adrp	x0, .LANCHOR64
+	ldrh	w6, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR65+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
+	ldrh	w5, [x0, #:lo12:.LANCHOR65+56]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L550:
+.L556:
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, lsl 2
-	ldrb	w3, [x19, 2]
-	tst	w3, 224
-	bne	.L551
-	cbz	w21, .L566
-	adrp	x1, .LANCHOR61
+	ldrb	w2, [x19, 2]
+	tst	w2, 224
+	bne	.L557
+	cbz	w21, .L577
+	adrp	x1, .LANCHOR63
 	adrp	x0, .LC0
-	mov	w2, 257
-	add	x1, x1, :lo12:.LANCHOR61
+	mov	w2, 263
+	add	x1, x1, :lo12:.LANCHOR63
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L566:
+.L577:
 	mov	w0, 0
-	b	.L548
-.L551:
-	adrp	x0, .LANCHOR63
-	add	x1, x0, :lo12:.LANCHOR63
-	ldrh	w0, [x0, #:lo12:.LANCHOR63]
+	b	.L554
+.L557:
+	adrp	x0, .LANCHOR65
+	add	x1, x0, :lo12:.LANCHOR65
+	ldrh	w0, [x0, #:lo12:.LANCHOR65]
 	cmp	w0, w20
-	beq	.L566
-	adrp	x21, .LANCHOR5
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldrh	w2, [x0, 48]
-	cmp	w2, w20
-	beq	.L566
-	ldrh	w2, [x0, 16]
-	cmp	w2, w20
-	beq	.L566
-	ldrh	w2, [x0, 80]
-	cmp	w2, w20
-	beq	.L566
-	ldrh	w5, [x1, 56]
+	beq	.L577
+	adrp	x21, .LANCHOR6
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	ldrh	w3, [x0, 48]
+	cmp	w3, w20
+	beq	.L577
+	ldrh	w3, [x0, 16]
+	cmp	w3, w20
+	beq	.L577
+	ldrh	w3, [x0, 80]
+	cmp	w3, w20
+	beq	.L577
+	ldrh	w4, [x1, 56]
 	add	x1, x1, 58
-	mov	w2, 0
-.L553:
-	cmp	w2, w5
-	bcc	.L554
-	cbnz	w22, .L555
-	ubfiz	x19, x23, 7, 16
+	mov	w3, 0
+.L559:
+	cmp	w3, w4
+	bcc	.L560
+	cbnz	w24, .L564
+	adrp	x1, .LANCHOR66
+	ldrh	w5, [x1, #:lo12:.LANCHOR66]
+	cmp	w20, w5
+	beq	.L577
+	adrp	x3, .LANCHOR67
+	add	x3, x3, :lo12:.LANCHOR67
+	mov	x1, 0
+.L563:
+	ldrh	w6, [x1, x3]
+	cmp	w20, w6
+	bne	.L562
+	ldr	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L577
+	ldr	x0, [x22, #:lo12:.LANCHOR5]
+	mov	w4, w20
+	ubfx	x2, x2, 5, 3
+	mov	w1, w20
+	ldrh	w3, [x0, x26]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+	b	.L577
+.L560:
+	ldrh	w5, [x1], 2
+	cmp	w5, w20
+	beq	.L577
+	add	w3, w3, 1
+	b	.L559
+.L562:
+	add	x1, x1, 2
+	cmp	x1, 16
+	bne	.L563
+	ubfiz	x19, x25, 7, 16
 	add	x19, x19, 136
 	add	x19, x0, x19
-.L556:
-	ldr	w0, [x25, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L557
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x1, .LANCHOR62
-	ubfx	x3, x3, 5, 3
-	mov	w2, w22
-	ldrh	w6, [x1, #:lo12:.LANCHOR62]
+.L565:
+	ldr	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L566
+	ldr	x0, [x22, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR64
+	mov	w5, w4
+	ubfx	x3, x2, 5, 3
+	ldrh	w6, [x1, #:lo12:.LANCHOR64]
+	mov	w2, w24
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
 	adrp	x0, .LC41
 	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L557:
+.L566:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L560:
+.L569:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L558
+	bne	.L567
 	strh	w20, [x0]
-	cbz	w22, .L559
-	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	cbz	w24, .L568
+	ldr	x1, [x21, #:lo12:.LANCHOR6]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L575:
+.L587:
 	mov	w0, 1
-.L548:
+.L554:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3070,36 +3134,30 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L554:
-	ldrh	w4, [x1], 2
-	cmp	w4, w20
-	beq	.L566
-	add	w2, w2, 1
-	b	.L553
-.L555:
+.L564:
 	add	x19, x0, 392
-	b	.L556
-.L559:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x23, x0, x23, uxth 1
-	ldrh	w0, [x23, 120]
+	b	.L565
+.L568:
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	add	x25, x0, x25, uxth 1
+	ldrh	w0, [x25, 120]
 	add	w0, w0, 1
-	strh	w0, [x23, 120]
-	b	.L575
-.L558:
+	strh	w0, [x25, 120]
+	b	.L587
+.L567:
 	add	x0, x0, 2
 	cmp	x1, x0
-	bne	.L560
-	b	.L575
+	bne	.L569
+	b	.L587
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR64
+	adrp	x1, .LANCHOR68
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR64]
+	ldr	x1, [x1, #:lo12:.LANCHOR68]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -3111,18 +3169,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR65
+	adrp	x23, .LANCHOR69
 	stp	x21, x22, [sp, 32]
-	adrp	x24, .LANCHOR46
-	add	x23, x23, :lo12:.LANCHOR65
-	add	x22, x24, :lo12:.LANCHOR46
+	adrp	x24, .LANCHOR48
+	add	x23, x23, :lo12:.LANCHOR69
+	add	x22, x24, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L578:
+.L590:
 	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L589
+	bne	.L601
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3130,104 +3188,104 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L589:
+.L601:
 	lsl	x1, x19, 6
-	add	x0, x24, :lo12:.LANCHOR46
+	add	x0, x24, :lo12:.LANCHOR48
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
 	strb	w0, [x23]
 	ldrh	w25, [x2, 48]
-	cbz	w1, .L579
+	cbz	w1, .L591
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR65
+	add	x0, x0, :lo12:.LANCHOR65
 	mov	w3, 1
-	str	w2, [x0, 320]
-	strh	w3, [x0, 318]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	str	w2, [x0, 324]
+	strh	w3, [x0, 320]
+	adrp	x0, .LC43
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	adrp	x1, .LANCHOR66
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 519
-	add	x1, x1, :lo12:.LANCHOR66
+	mov	w2, 539
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L579:
-	adrp	x26, .LANCHOR67
-	ldrb	w0, [x26, #:lo12:.LANCHOR67]
+.L591:
+	adrp	x26, .LANCHOR71
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L590
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	bne	.L602
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L580:
-	adrp	x0, .LANCHOR7
-	adrp	x28, .LANCHOR68
+.L592:
+	adrp	x0, .LANCHOR9
+	adrp	x28, .LANCHOR72
 	and	x21, x25, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L581
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L593
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	add	x0, x22, x19, lsl 6
 	mov	w3, w25
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC43
+	adrp	x0, .LC44
 	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC44
 	mov	w1, w25
 	bl	printf
-.L581:
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+.L593:
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	add	x0, x22, x19, lsl 6
 	mov	x27, x21
 	ldrb	w0, [x0, 1]
 	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L582
-	adrp	x1, .LANCHOR66
+	beq	.L594
+	adrp	x1, .LANCHOR70
 	adrp	x0, .LC0
-	mov	w2, 526
-	add	x1, x1, :lo12:.LANCHOR66
+	mov	w2, 546
+	add	x1, x1, :lo12:.LANCHOR70
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L582:
+.L594:
 	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L583
-	ldrb	w0, [x26, #:lo12:.LANCHOR67]
+	beq	.L595
+	ldrb	w0, [x26, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L583
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbnz	w0, .L583
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	bne	.L595
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbnz	w0, .L595
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	mov	x0, 0
 	add	x21, x1, x21
-.L584:
+.L596:
 	cmp	w20, w0, uxth
-	bls	.L578
+	bls	.L590
 	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
 	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L584
-.L590:
+	b	.L596
+.L602:
 	mov	w20, 1
-	b	.L580
-.L583:
-	adrp	x19, .LANCHOR63
-	add	x19, x19, :lo12:.LANCHOR63
+	b	.L592
+.L595:
+	adrp	x19, .LANCHOR65
+	add	x19, x19, :lo12:.LANCHOR65
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w25, [x19, 316]
-.L585:
+.L597:
 	cmp	x20, x27
-	beq	.L578
-	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	beq	.L590
+	ldr	x1, [x28, #:lo12:.LANCHOR72]
 	ldrb	w0, [x1, x27]
 	strb	w21, [x1, x27]
 	add	x27, x27, 1
@@ -3240,56 +3298,56 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L585
+	b	.L597
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR5
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LANCHOR70
-	ldrb	w3, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR6
+	ldr	x2, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR74
+	ldrb	w3, [x0, #:lo12:.LANCHOR74]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L602
+	cbz	w0, .L614
 	add	x1, x2, 392
 	mov	w4, 1
-.L603:
+.L615:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L607:
+.L619:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L605
+	beq	.L617
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L606
+	cbz	w4, .L618
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L602:
+.L614:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L608
+	cbz	w0, .L620
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L603
-.L606:
+	b	.L615
+.L618:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L605:
+.L617:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L607
+	bne	.L619
 	ret
-.L608:
+.L620:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -3301,90 +3359,90 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR63
-	add	x0, x20, :lo12:.LANCHOR63
+	adrp	x20, .LANCHOR65
+	add	x0, x20, :lo12:.LANCHOR65
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L617
-	adrp	x1, .LANCHOR48
-	ldrb	w1, [x1, #:lo12:.LANCHOR48]
+	cbz	w1, .L629
+	adrp	x1, .LANCHOR50
+	ldrb	w1, [x1, #:lo12:.LANCHOR50]
 	cmp	w1, 1
-	bhi	.L617
+	bhi	.L629
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR72
-	adrp	x0, .LANCHOR71
-	adrp	x21, .LANCHOR68
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	adrp	x21, .LANCHOR72
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR71]
-	ldr	x4, [x21, #:lo12:.LANCHOR68]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldr	x4, [x21, #:lo12:.LANCHOR72]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
-.L612:
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
+.L624:
 	cmp	w19, w1
-	bcc	.L615
-.L617:
+	bcc	.L627
+.L629:
 	mov	w0, 0
-	b	.L610
-.L615:
+	b	.L622
+.L627:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L613
+	beq	.L625
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L613
+	cbnz	w3, .L625
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L614
-	ldr	x0, [x21, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L626
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-.L614:
-	ldr	x0, [x21, #:lo12:.LANCHOR68]
-	add	x20, x20, :lo12:.LANCHOR63
+.L626:
+	ldr	x0, [x21, #:lo12:.LANCHOR72]
+	add	x20, x20, :lo12:.LANCHOR65
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L610:
+.L622:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L613:
+.L625:
 	add	w19, w19, 1
-	b	.L612
+	b	.L624
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
 	.global	print_gc_debug_info
 	.type	print_gc_debug_info, %function
 print_gc_debug_info:
-	adrp	x2, .LANCHOR73
-	adrp	x1, .LANCHOR63
-	add	x0, x1, :lo12:.LANCHOR63
-	ldrh	w6, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR48
-	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	adrp	x2, .LANCHOR77
+	adrp	x1, .LANCHOR65
+	add	x0, x1, :lo12:.LANCHOR65
+	ldrh	w6, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR50
+	ldrh	w1, [x1, #:lo12:.LANCHOR65]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR48]
+	ldrb	w4, [x2, #:lo12:.LANCHOR50]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3395,23 +3453,21 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L627
+	bne	.L639
 	mov	w1, w0
-	adrp	x0, .LANCHOR74
-	ldr	x0, [x0, #:lo12:.LANCHOR74]
-.L629:
+	adrp	x0, .LANCHOR78
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
+.L641:
 	b	_list_get_gc_head_node.isra.2
-.L627:
+.L639:
 	cmp	w1, 2
+	bne	.L640
+	b	zftl_get_gc_node.part.10
+.L640:
 	mov	w1, w0
-	bne	.L628
-	adrp	x0, .LANCHOR75
-	ldr	x0, [x0, #:lo12:.LANCHOR75]
-	b	.L629
-.L628:
-	adrp	x0, .LANCHOR76
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L629
+	adrp	x0, .LANCHOR79
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	b	.L641
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3425,16 +3481,16 @@ gc_search_src_blk:
 	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
 	str	w0, [x29, 112]
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	stp	x23, x24, [sp, 48]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L631
+	cbz	w19, .L643
 	mov	w0, w19
-.L630:
+.L642:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3442,439 +3498,487 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L631:
+.L643:
 	and	w20, w2, 255
-	cbnz	w21, .L633
-	adrp	x24, .LANCHOR77
-	adrp	x26, .LANCHOR7
-	adrp	x27, .LC46
-	and	w23, w20, 65535
-	add	x26, x26, :lo12:.LANCHOR7
-	add	x27, x27, :lo12:.LC46
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	mov	w22, 0
+	cbnz	w21, .L645
+	adrp	x24, .LANCHOR80
+	adrp	x26, .LANCHOR9
+	adrp	x27, .LC47
+	and	w22, w20, 65535
+	add	x26, x26, :lo12:.LANCHOR9
+	add	x27, x27, :lo12:.LC47
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	mov	w23, 0
 	mov	w25, 0
-.L634:
-	cmp	w25, w23
-	bcs	.L639
-	ldrh	w6, [x24, #:lo12:.LANCHOR77]
-	add	x7, x24, :lo12:.LANCHOR77
+.L646:
+	cmp	w25, w22
+	bcs	.L651
+	ldrh	w6, [x24, #:lo12:.LANCHOR80]
+	add	x7, x24, :lo12:.LANCHOR80
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w2, w6, 1
 	and	w2, w2, 65535
-	strh	w2, [x24, #:lo12:.LANCHOR77]
+	strh	w2, [x24, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L635
+	beq	.L647
 	ldr	w0, [x26]
-	adrp	x6, .LANCHOR4
+	adrp	x6, .LANCHOR5
 	uxtw	x4, w1
-	tbz	x0, 8, .L636
-	ldr	x0, [x6, #:lo12:.LANCHOR4]
+	tbz	x0, 8, .L648
+	ldr	x0, [x6, #:lo12:.LANCHOR5]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L636:
-	ldr	x0, [x6, #:lo12:.LANCHOR4]
+.L648:
+	ldr	x0, [x6, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, x4, lsl 1]
-	adrp	x0, .LANCHOR62
-	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR64
+	ldrh	w0, [x0, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bcs	.L637
+	bcs	.L649
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L638
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w23, w22
-	bcs	.L638
-.L639:
+	cbz	w0, .L650
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w22, w23
+	bcs	.L650
+.L651:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L641
-	adrp	x25, .LANCHOR79
-	adrp	x28, .LANCHOR78
-	add	x27, x25, :lo12:.LANCHOR79
-	add	x28, x28, :lo12:.LANCHOR78
+	tbz	x0, 1, .L653
+	adrp	x25, .LANCHOR82
+	adrp	x24, .LANCHOR81
+	add	x27, x25, :lo12:.LANCHOR82
+	add	x24, x24, :lo12:.LANCHOR81
+	mov	w28, 0
 	mov	w26, 65535
-.L642:
-	cmp	w19, w23
-	beq	.L646
-	ldrh	w6, [x28]
+.L654:
+	cmp	w28, w22
+	beq	.L658
+	ldrh	w6, [x24]
 	mov	w1, 5
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x28]
+	strh	w6, [x24]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L643
-	adrp	x2, .LANCHOR4
+	beq	.L655
+	adrp	x2, .LANCHOR5
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L644
+	bcs	.L655
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L645
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w23, w22
-	bcs	.L645
-.L646:
-	ldrh	w1, [x25, #:lo12:.LANCHOR79]
+	cbz	w0, .L657
+	add	w5, w23, 1
+	and	w23, w5, 65535
 	cmp	w22, w23
-	adrp	x0, .LANCHOR80
-	bcs	.L648
-	ldrh	w3, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	lsr	w2, w3, 3
+	bcs	.L657
+.L658:
+	cmp	w23, w22
+	adrp	x0, .LANCHOR83
+	bcs	.L660
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x3, .LANCHOR76
+	adrp	x0, .LANCHOR75
+	ldrh	w2, [x25, #:lo12:.LANCHOR82]
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
-	sub	w0, w0, w2
-	cmp	w1, w0
-	bge	.L641
-	add	w1, w1, w2
-	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L641:
+	sub	w0, w0, w1, lsr 2
+	cmp	w2, w0
+	bge	.L653
+	add	w1, w2, w1, lsr 3
+	strh	w1, [x25, #:lo12:.LANCHOR82]
+.L653:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L649
-	cmp	w22, w23
-	bcs	.L649
-	adrp	x25, .LANCHOR81
-	add	x25, x25, :lo12:.LANCHOR81
-	mov	w24, 64
-	adrp	x26, .LANCHOR75
-	mov	w27, 65535
-.L654:
-	ldrh	w6, [x25]
-	ldr	x0, [x26, #:lo12:.LANCHOR75]
-	mov	w1, w6
-	bl	_list_get_gc_head_node.isra.2
+	tbz	x0, 0, .L661
+	cmp	w23, w22
+	bcs	.L661
+	adrp	x24, .LANCHOR84
+	add	x24, x24, :lo12:.LANCHOR84
+	mov	w25, 65535
+.L666:
+	ldrh	w6, [x24]
+	mov	w0, w6
+	bl	zftl_get_gc_node.part.10
 	add	w6, w6, 1
-	strh	w6, [x25]
-	cmp	w27, w0, uxth
-	beq	.L650
+	strh	w6, [x24]
+	cmp	w25, w0, uxth
+	beq	.L662
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L651
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w23, w22
-	bhi	.L651
-.L652:
-	adrp	x1, .LANCHOR62
-	adrp	x2, .LANCHOR80
-	ldrh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
-	cmp	w0, w2, lsr 1
-	bls	.L649
-	sub	w0, w0, #8
-	b	.L728
-.L637:
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L639
-.L635:
+	cbz	w0, .L663
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w22, w23
+	bhi	.L663
+.L664:
+	adrp	x0, .LANCHOR83
+	adrp	x1, .LANCHOR64
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w2, [x1, #:lo12:.LANCHOR64]
+	cmp	w2, w0, lsr 1
+	bls	.L661
+	sub	w0, w2, w0, lsr 3
+	b	.L741
+.L649:
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	b	.L651
+.L647:
 	strh	wzr, [x7]
-	b	.L639
-.L638:
+	b	.L651
+.L650:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L634
-.L644:
-	strh	wzr, [x28]
-	b	.L646
-.L643:
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	b	.L646
-.L645:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L642
-.L648:
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+.L655:
+	strh	wzr, [x24]
+	b	.L658
+.L657:
+	add	w28, w28, 1
+	and	w28, w28, 65535
+	b	.L654
+.L660:
+	ldrh	w1, [x25, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bls	.L641
+	bls	.L653
 	sub	w0, w1, w0, lsr 3
-	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L641
-.L650:
-	strh	wzr, [x25]
-.L653:
-	cmp	w22, w23
-	bcs	.L652
-	adrp	x1, .LANCHOR62
-	adrp	x2, .LANCHOR80
-	ldrh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	strh	w0, [x25, #:lo12:.LANCHOR82]
+	b	.L653
+.L662:
+	strh	wzr, [x24]
+.L665:
+	cmp	w23, w22
+	bcs	.L664
+	adrp	x1, .LANCHOR64
+	adrp	x0, .LANCHOR83
+	ldrh	w2, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w2, w0
-	bls	.L649
-	add	w0, w0, 8
-.L728:
-	strh	w0, [x1, #:lo12:.LANCHOR62]
-.L649:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L676
+	bcs	.L661
+	add	w0, w2, w0, lsr 3
+.L741:
+	strh	w0, [x1, #:lo12:.LANCHOR64]
+.L661:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L688
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC47
+	adrp	x0, .LC48
 	mov	w4, w20
-	mov	w3, w22
+	mov	w3, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC47
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L676:
-	mov	w0, w22
-	b	.L630
-.L651:
-	sub	w24, w24, #1
-	ands	w24, w24, 65535
-	bne	.L654
-	b	.L653
-.L633:
+.L688:
+	mov	w0, w23
+	b	.L642
+.L663:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	cmp	w22, w19
+	bne	.L666
+	b	.L665
+.L645:
+	adrp	x0, .LANCHOR65+318
+	strh	wzr, [x0, #:lo12:.LANCHOR65+318]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	ldr	w0, [x29, 112]
-	adrp	x3, .LANCHOR81
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
-	strh	wzr, [x3, #:lo12:.LANCHOR81]
-	tbz	x0, 0, .L678
-	adrp	x23, .LANCHOR82
-	adrp	x24, .LANCHOR83
-	ldrh	w0, [x23, #:lo12:.LANCHOR82]
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	cmp	w0, w1, lsr 1
-	bcc	.L679
-	adrp	x1, .LANCHOR84
-	mov	w22, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	tbz	x0, 0, .L691
+	adrp	x1, .LANCHOR87
+	adrp	x25, .LANCHOR86
+	str	x1, [x29, 96]
+	adrp	x26, .LANCHOR88
+	ldrh	w0, [x25, #:lo12:.LANCHOR86]
+	ldrh	w2, [x1, #:lo12:.LANCHOR87]
+	cmp	w0, w2, lsr 2
+	bcc	.L668
+	ldrh	w1, [x26, #:lo12:.LANCHOR88]
 	cmp	w1, w0
-	bls	.L657
-.L726:
-	add	x26, x3, :lo12:.LANCHOR81
+	bls	.L692
+.L668:
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	adrp	x22, .LANCHOR84
+	lsr	w0, w0, 2
+	strh	w0, [x22, #:lo12:.LANCHOR84]
+	mov	w0, 0
+	bl	zftl_get_gc_node.part.10
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L694
+	adrp	x2, .LANCHOR5
+	ubfiz	x1, x1, 1, 16
+	ldr	x3, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	ldrh	w1, [x3, x1]
+	cmp	w1, w2, lsr 2
+	bcs	.L694
+	strh	wzr, [x22, #:lo12:.LANCHOR84]
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cmp	w0, 0
+	cset	w23, ne
+.L670:
+	add	x22, x22, :lo12:.LANCHOR84
 	and	w28, w20, 65535
-	mov	w25, 64
+	mov	w24, 64
 	mov	w27, 65535
-.L660:
-	adrp	x0, .LANCHOR75
-	ldrh	w6, [x26]
-	ldr	x0, [x0, #:lo12:.LANCHOR75]
-	mov	w1, w6
-	bl	_list_get_gc_head_node.isra.2
+.L672:
+	ldrh	w6, [x22]
+	mov	w0, w6
+	bl	zftl_get_gc_node.part.10
 	add	w6, w6, 1
-	strh	w6, [x26]
+	strh	w6, [x22]
 	cmp	w27, w0, uxth
-	beq	.L658
+	beq	.L669
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L659
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w22, w28
-	bcc	.L659
-.L657:
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	ldrh	w0, [x23, #:lo12:.LANCHOR82]
-	cmp	w0, w1, lsr 1
-	bls	.L655
-	adrp	x24, .LANCHOR77
-	and	w27, w20, 65535
-	mov	w23, 64
-	mov	w26, 65535
-	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	add	x24, x24, :lo12:.LANCHOR77
-.L662:
+	cbz	w0, .L671
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w23, w28
+	bcs	.L669
+.L671:
+	sub	w24, w24, #1
+	ands	w24, w24, 65535
+	bne	.L672
+.L669:
+	ldr	x0, [x29, 96]
+	ldrh	w1, [x25, #:lo12:.LANCHOR86]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w1, w0, lsr 3
+	bhi	.L689
+	ldrh	w0, [x26, #:lo12:.LANCHOR88]
+	add	w0, w0, 8
+	cmp	w1, w0
+	ble	.L667
+.L689:
+	adrp	x24, .LANCHOR80
+	and	w26, w20, 65535
+	mov	w22, 64
+	mov	w25, 65535
+	strh	wzr, [x24, #:lo12:.LANCHOR80]
+	add	x24, x24, :lo12:.LANCHOR80
+.L674:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
 	strh	w6, [x24]
-	cmp	w26, w0, uxth
-	beq	.L655
+	cmp	w25, w0, uxth
+	beq	.L667
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L661
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w22, w27
-	bcs	.L655
-.L661:
-	sub	w23, w23, #1
-	ands	w23, w23, 65535
-	bne	.L662
-.L655:
+	cbz	w0, .L673
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w23, w26
+	bcs	.L667
+.L673:
+	sub	w22, w22, #1
+	ands	w22, w22, 65535
+	bne	.L674
+.L667:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L663
-	adrp	x28, .LANCHOR78
-	adrp	x24, .LANCHOR85
-	add	x27, x24, :lo12:.LANCHOR85
-	mov	w23, 64
-	strh	wzr, [x28, #:lo12:.LANCHOR78]
-	add	x28, x28, :lo12:.LANCHOR78
-	mov	w25, 65535
-	adrp	x26, .LANCHOR4
-.L668:
-	ldrh	w6, [x28]
+	tbz	x0, 1, .L675
+	adrp	x24, .LANCHOR81
+	adrp	x28, .LANCHOR89
+	adrp	x25, .LANCHOR76
+	add	x26, x24, :lo12:.LANCHOR81
+	add	x27, x28, :lo12:.LANCHOR89
+	add	x25, x25, :lo12:.LANCHOR76
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	mov	w22, 64
+.L680:
+	ldrh	w6, [x26]
 	mov	w1, 5
 	mov	w0, w6
 	bl	zftl_get_gc_node
 	add	w6, w6, 1
-	strh	w6, [x28]
+	strh	w6, [x26]
 	and	w1, w0, 65535
-	cmp	w1, w25
-	beq	.L664
-	ldr	x2, [x26, #:lo12:.LANCHOR4]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L676
+	cmp	w20, 1
+	bne	.L677
+	adrp	x3, .LANCHOR75
+	ldrb	w2, [x25]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	mul	w3, w2, w3
+	adrp	x2, .LANCHOR83
+	ldrh	w2, [x2, #:lo12:.LANCHOR83]
+	sub	w2, w3, w2, lsr 3
+	strh	w2, [x27]
+.L677:
+	adrp	x2, .LANCHOR5
 	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L665
+	bcs	.L678
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L666
-	add	w5, w22, 1
+	cbz	w0, .L679
+	add	w5, w23, 1
 	add	w19, w19, 1
-	and	w22, w5, 65535
+	and	w23, w5, 65535
 	and	w19, w19, 65535
-	cmp	w22, w20
-	bcc	.L666
-.L667:
-	cmp	w22, w20
-	adrp	x4, .LANCHOR80
-	adrp	x2, .LANCHOR72
-	bcc	.L669
-	cbnz	w19, .L670
-	adrp	x0, .LANCHOR86
-	ldrh	w1, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w23, w20
+	bcc	.L679
+.L676:
+	cmp	w23, w20
+	adrp	x0, .LANCHOR83
+	adrp	x3, .LANCHOR76
+	bcc	.L681
+	cbnz	w19, .L682
+	adrp	x1, .LANCHOR90
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	cmp	w2, w1
+	bls	.L682
+.L681:
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR75
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrh	w1, [x28, #:lo12:.LANCHOR89]
+	lsr	w2, w2, 3
+	mul	w0, w0, w3
+	sub	w0, w0, w2
 	cmp	w1, w0
-	bls	.L670
-.L669:
-	adrp	x1, .LANCHOR71
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	ldrh	w0, [x24, #:lo12:.LANCHOR85]
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
-	mul	w2, w1, w2
-	ldrh	w1, [x4, #:lo12:.LANCHOR80]
-	sub	w1, w2, w1, lsr 3
-	cmp	w0, w1
-	bge	.L663
-	add	w0, w0, 4
-.L727:
-	strh	w0, [x24, #:lo12:.LANCHOR85]
-.L663:
+	bge	.L675
+	add	w1, w1, w2
+	strh	w1, [x28, #:lo12:.LANCHOR89]
+.L675:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L649
-	adrp	x25, .LANCHOR78
-	adrp	x23, .LANCHOR88
-	add	x28, x23, :lo12:.LANCHOR88
+	cbz	w0, .L661
+	adrp	x25, .LANCHOR80
+	adrp	x22, .LANCHOR92
+	adrp	x26, .LANCHOR87
+	adrp	x27, .LANCHOR86
+	add	x28, x22, :lo12:.LANCHOR92
+	add	x26, x26, :lo12:.LANCHOR87
+	add	x27, x27, :lo12:.LANCHOR86
+	strh	wzr, [x25, #:lo12:.LANCHOR80]
 	mov	w24, 64
-	strh	wzr, [x25, #:lo12:.LANCHOR78]
-	add	x25, x25, :lo12:.LANCHOR78
-	mov	w26, 65535
-	adrp	x27, .LANCHOR4
-.L674:
-	ldrh	w0, [x25]
+.L686:
+	ldrh	w6, [x25, #:lo12:.LANCHOR80]
 	mov	w1, 3
+	mov	w0, w6
 	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x25, #:lo12:.LANCHOR80]
 	and	w1, w0, 65535
-	cmp	w1, w26
-	beq	.L671
-	ldr	x2, [x27, #:lo12:.LANCHOR4]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L683
+	adrp	x2, .LANCHOR5
 	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L672
+	bls	.L684
 	cmp	w1, 2
-	bhi	.L673
-.L672:
+	bls	.L684
+	ldrh	w2, [x26]
+	ldrh	w1, [x27]
+	cmp	w1, w2, lsr 1
+	bls	.L683
+.L684:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L673
-	add	w5, w22, 1
-	and	w22, w5, 65535
-	cmp	w22, w20
-	bcs	.L671
-.L673:
+	cbz	w0, .L685
+	add	w5, w23, 1
+	and	w23, w5, 65535
+	cmp	w23, w20
+	bcs	.L683
+.L685:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L674
-.L671:
-	cmp	w22, w20
-	adrp	x2, .LANCHOR80
-	bcs	.L675
-	ldrh	w0, [x23, #:lo12:.LANCHOR88]
-	ldrh	w1, [x2, #:lo12:.LANCHOR80]
-	cmp	w0, w1, lsr 1
-	bls	.L649
-	sub	w0, w0, #4
-	strh	w0, [x23, #:lo12:.LANCHOR88]
-	b	.L649
-.L679:
-	mov	w22, 0
-	b	.L726
-.L658:
-	strh	wzr, [x26]
-	b	.L657
-.L659:
-	sub	w4, w25, #1
-	ands	w25, w4, 65535
-	bne	.L660
-	b	.L657
-.L678:
-	mov	w22, 0
-	b	.L655
-.L665:
-	strh	wzr, [x28]
-	b	.L667
-.L664:
-	adrp	x0, .LANCHOR77
-	strh	wzr, [x0, #:lo12:.LANCHOR77]
-	b	.L667
-.L666:
-	sub	w23, w23, #1
-	ands	w23, w23, 65535
-	bne	.L668
+	bne	.L686
+.L683:
+	cmp	w23, w20
+	adrp	x0, .LANCHOR83
+	bcs	.L687
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrh	w1, [x22, #:lo12:.LANCHOR92]
+	cmp	w1, w0, lsr 1
+	bls	.L661
+	sub	w0, w1, w0, lsr 3
+	strh	w0, [x22, #:lo12:.LANCHOR92]
+	b	.L661
+.L694:
+	mov	w23, 0
+	b	.L670
+.L691:
+	mov	w23, 0
 	b	.L667
-.L670:
-	ldrh	w1, [x4, #:lo12:.LANCHOR80]
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	ldrh	w0, [x24, #:lo12:.LANCHOR85]
-	mul	w1, w1, w2
-	cmp	w0, w1
-	ble	.L663
-	sub	w0, w0, #4
-	b	.L727
-.L675:
-	ldrh	w0, [x2, #:lo12:.LANCHOR80]
-	adrp	x2, .LANCHOR72
-	ldrh	w1, [x23, #:lo12:.LANCHOR88]
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	mul	w0, w0, w2
+.L678:
+	strh	wzr, [x24, #:lo12:.LANCHOR81]
+	b	.L676
+.L679:
+	sub	w22, w22, #1
+	ands	w22, w22, 65535
+	bne	.L680
+	b	.L676
+.L682:
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	ldrb	w1, [x3, #:lo12:.LANCHOR76]
+	ldrh	w2, [x28, #:lo12:.LANCHOR89]
+	mul	w1, w1, w0
+	cmp	w2, w1
+	ble	.L675
+	sub	w0, w2, w0, lsr 3
+	strh	w0, [x28, #:lo12:.LANCHOR89]
+	b	.L675
+.L687:
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrh	w2, [x22, #:lo12:.LANCHOR92]
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	mul	w0, w0, w1
 	sub	w0, w0, #32
-	cmp	w1, w0
-	bge	.L649
-	add	w1, w1, 4
-	strh	w1, [x23, #:lo12:.LANCHOR88]
-	b	.L649
+	cmp	w2, w0
+	bge	.L661
+	add	w1, w2, w1, lsr 3
+	strh	w1, [x22, #:lo12:.LANCHOR92]
+	b	.L661
+.L692:
+	mov	w23, 0
+	b	.L669
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -3887,27 +3991,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L730
-	adrp	x2, .LANCHOR89
-	adrp	x0, .LANCHOR90
-	add	x2, x2, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LANCHOR90
-.L732:
-	b	_insert_free_list
-.L730:
-	cmp	w0, 16
-	bne	.L731
-	adrp	x2, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x2, x2, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L732
-.L731:
+	bne	.L743
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L732
+.L745:
+	b	_insert_free_list
+.L743:
+	cmp	w0, 16
+	bne	.L744
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L745
+.L744:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L745
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -3921,94 +4025,235 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L734
-	adrp	x2, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
-.L737:
+	bne	.L747
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
+.L750:
 	b	_insert_data_list
-.L734:
+.L747:
 	cmp	w2, 96
-	bne	.L735
-	adrp	x2, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L737
-.L735:
-	cmp	w2, 160
-	bne	.L733
+	bne	.L748
 	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L737
-.L733:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L750
+.L748:
+	cmp	w2, 160
+	bne	.L746
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L750
+.L746:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
+	.section	.text.zftl_gc_get_free_sblk,"ax",@progbits
+	.align	2
+	.global	zftl_gc_get_free_sblk
+	.type	zftl_gc_get_free_sblk, %function
+zftl_gc_get_free_sblk:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR6
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 65535
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	and	w22, w1, 65535
+	ldrh	w19, [x0, 588]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L752
+	cbnz	w21, .L752
+	mov	w1, w19
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w1, -1
+	strh	w1, [x0, 588]
+.L753:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L752:
+	adrp	x2, .LANCHOR95
+	adrp	x20, .LANCHOR97
+	ldrh	w0, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x20, #:lo12:.LANCHOR97]
+	cmp	w0, w1
+	bls	.L754
+	lsr	w1, w0, 3
+	cmp	w21, 0
+	adrp	x0, .LANCHOR96
+	csel	w1, w1, wzr, ne
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+.L768:
+	bl	_list_pop_index_node
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L759
+	adrp	x0, .LANCHOR93
+	ldrh	w5, [x20, #:lo12:.LANCHOR97]
+	mov	w2, w22
+	mov	w1, w19
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	bl	printf
+.L759:
+	cbz	w21, .L753
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L753
+	adrp	x4, .LANCHOR5
+	adrp	x1, .LANCHOR3
+	uxtw	x3, w19
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	lsl	x0, x3, 2
+	ldr	x6, [x4, #:lo12:.LANCHOR5]
+	add	x2, x1, x0
+	ldr	w4, [x1, x0]
+	ldrh	w6, [x6, x3, lsl 1]
+	ldrb	w2, [x2, 2]
+	ldrh	w5, [x1, x0]
+	ubfx	x4, x4, 11, 8
+	mov	w1, w19
+	adrp	x0, .LC51
+	ubfx	x3, x2, 3, 2
+	and	w5, w5, 2047
+	ubfx	x2, x2, 5, 3
+	add	x0, x0, :lo12:.LC51
+	bl	printf
+	b	.L753
+.L754:
+	cbnz	w21, .L757
+	lsr	w1, w1, 2
+.L758:
+	adrp	x0, .LANCHOR98
+	add	x2, x20, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L768
+.L757:
+	mov	w1, 7
+	mul	w1, w0, w1
+	lsr	w1, w1, 3
+	b	.L758
+	.size	zftl_gc_get_free_sblk, .-zftl_gc_get_free_sblk
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
 	.align	2
 	.global	zftl_get_free_sblk
 	.type	zftl_get_free_sblk, %function
 zftl_get_free_sblk:
 	stp	x29, x30, [sp, -48]!
-	and	w0, w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR93
+	and	w20, w1, 65535
 	str	x21, [sp, 32]
-	and	w21, w1, 65535
-	cmp	w21, 5
-	bne	.L739
-	adrp	x1, .LANCHOR91
-	add	x2, x1, :lo12:.LANCHOR91
-	ldrh	w3, [x1, #:lo12:.LANCHOR91]
-	ldrh	w1, [x20, #:lo12:.LANCHOR93]
+	cmp	w20, 5
+	bne	.L770
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR97
+	ldrh	w3, [x2, #:lo12:.LANCHOR95]
+	ldrh	w1, [x0, #:lo12:.LANCHOR97]
 	cmp	w3, w1
-	bls	.L740
-	mov	w1, w0
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
-.L744:
+	bcc	.L771
+	adrp	x4, .LANCHOR93
+	ldrh	w4, [x4, #:lo12:.LANCHOR93]
+	cmp	w4, w3
+	bls	.L772
+	cbz	w1, .L772
+.L771:
+	add	x2, x0, :lo12:.LANCHOR97
+	lsr	w1, w1, 1
+.L791:
+	adrp	x0, .LANCHOR98
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L790
+.L772:
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	mov	w1, 0
+.L790:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L742
-	adrp	x0, .LANCHOR89
-	ldrh	w5, [x20, #:lo12:.LANCHOR93]
-	mov	w2, w21
+	bne	.L775
+	adrp	x0, .LANCHOR97
+	mov	w2, w20
 	mov	w1, w19
-	ldrh	w4, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR90
-	ldr	x3, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
+	ldrh	w5, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR93
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR94
+	ldr	x3, [x0, #:lo12:.LANCHOR94]
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L742:
+	b	.L775
+.L770:
+	adrp	x21, .LANCHOR6
+	and	w0, w0, 65535
+	ldr	x1, [x21, #:lo12:.LANCHOR6]
+	ldrh	w19, [x1, 590]
+	mov	w1, 65535
+	cmp	w19, w1
+	beq	.L774
+	cmp	w20, 1
+	beq	.L774
+	mov	w1, w19
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	mov	w1, -1
+	strh	w1, [x0, 590]
+.L775:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L740:
+.L774:
+	adrp	x2, .LANCHOR93
+	adrp	x4, .LANCHOR97
+	ldrh	w1, [x2, #:lo12:.LANCHOR93]
+	ldrh	w3, [x4, #:lo12:.LANCHOR97]
+	cmp	w1, w3
+	bcc	.L776
+	adrp	x5, .LANCHOR95
+	ldrh	w5, [x5, #:lo12:.LANCHOR95]
+	cmp	w5, w1
+	bls	.L777
+	cbz	w3, .L777
+.L776:
+	cmp	w20, 1
+	lsr	w3, w3, 1
+	csel	w0, w3, w0, eq
+	add	x2, x4, :lo12:.LANCHOR97
+	mov	w1, w0
+	b	.L791
+.L777:
+	lsr	w1, w1, 1
+	cmp	w20, 1
+	csel	w0, w1, w0, eq
+	add	x2, x2, :lo12:.LANCHOR93
 	mov	w1, w0
-	add	x2, x20, :lo12:.LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L744
-.L739:
-	adrp	x1, .LANCHOR89
-	add	x2, x1, :lo12:.LANCHOR89
-	ldrh	w3, [x1, #:lo12:.LANCHOR89]
-	ldrh	w1, [x20, #:lo12:.LANCHOR93]
-	cmp	w3, w1
-	bls	.L740
-	mov	w1, w0
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	b	.L744
+	b	.L790
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -4022,30 +4267,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L746
-	adrp	x2, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
-.L749:
+	bne	.L793
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
+.L796:
 	b	_list_remove_node
-.L746:
+.L793:
 	cmp	w2, 96
-	bne	.L747
-	adrp	x2, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L749
-.L747:
-	cmp	w2, 160
-	bne	.L745
+	bne	.L794
 	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L749
-.L745:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L796
+.L794:
+	cmp	w2, 160
+	bne	.L792
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L796
+.L792:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -4059,27 +4304,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L751
-	adrp	x2, .LANCHOR89
-	adrp	x0, .LANCHOR90
-	add	x2, x2, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LANCHOR90
-.L753:
-	b	_list_remove_node
-.L751:
-	cmp	w0, 16
-	bne	.L752
-	adrp	x2, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x2, x2, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L753
-.L752:
+	bne	.L798
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L753
+.L800:
+	b	_list_remove_node
+.L798:
+	cmp	w0, 16
+	bne	.L799
+	adrp	x2, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x2, x2, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L800
+.L799:
+	adrp	x2, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x2, x2, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L800
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -4093,30 +4338,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L755
-	adrp	x2, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x2, x2, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
-.L758:
+	bne	.L802
+	adrp	x2, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x2, x2, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
+.L805:
 	b	_list_update_data_list
-.L755:
+.L802:
 	cmp	w2, 96
-	bne	.L756
-	adrp	x2, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x2, x2, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L758
-.L756:
-	cmp	w2, 160
-	bne	.L754
+	bne	.L803
 	adrp	x2, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x2, x2, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L758
-.L754:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L805
+.L803:
+	cmp	w2, 160
+	bne	.L801
+	adrp	x2, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x2, x2, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L805
+.L801:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -4124,7 +4369,7 @@ zftl_list_update_data_list:
 	.global	print_list_info
 	.type	print_list_info, %function
 print_list_info:
-	sub	sp, sp, #112
+	sub	sp, sp, #96
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	ldrh	w2, [x1]
@@ -4132,30 +4377,31 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC49
+	adrp	x0, .LC53
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC49
-	str	x25, [sp, 96]
+	add	x0, x0, :lo12:.LC53
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L759
-	mov	x23, -6148914691236517206
-	adrp	x21, .LC50
-	add	x21, x21, :lo12:.LC50
+	cbz	x19, .L806
+	mov	x24, -6148914691236517206
+	adrp	x22, .LC54
+	adrp	x21, .LANCHOR99
+	add	x22, x22, :lo12:.LC54
+	add	x21, x21, :lo12:.LANCHOR99
 	mov	w20, 0
-	adrp	x22, .LANCHOR0
-	movk	x23, 0xaaab, lsl 0
-	adrp	x24, .LANCHOR3
-	adrp	x25, .LANCHOR4
-.L766:
-	ldr	x2, [x22, #:lo12:.LANCHOR0]
-	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	adrp	x23, .LANCHOR0
+	movk	x24, 0xaaab, lsl 0
+.L810:
+	ldr	x2, [x23, #:lo12:.LANCHOR0]
+	adrp	x1, .LANCHOR3
+	adrp	x8, .LANCHOR5
+	ldrh	w5, [x19, 4]
 	sub	x2, x19, x2
-	ldr	x8, [x25, #:lo12:.LANCHOR4]
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
 	asr	x2, x2, 1
-	ldrh	w5, [x19, 4]
+	ldr	x8, [x8, #:lo12:.LANCHOR5]
 	ldrh	w4, [x19, 2]
-	mul	x2, x2, x23
+	mul	x2, x2, x24
 	and	x7, x2, 65535
 	and	w2, w2, 65535
 	lsl	x0, x7, 2
@@ -4173,25 +4419,26 @@ print_list_info:
 	mov	w1, w20
 	ubfx	x0, x0, 11, 8
 	str	w0, [sp]
-	mov	x0, x21
+	mov	x0, x22
 	bl	printf
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L759
-	ldr	x0, [x22, #:lo12:.LANCHOR0]
+	beq	.L806
+	ldr	x0, [x23, #:lo12:.LANCHOR0]
 	mov	w1, 6
 	add	w20, w20, 1
-	cmp	w20, 33
+	and	w20, w20, 65535
 	umaddl	x19, w19, w1, x0
-	bne	.L766
-.L759:
+	ldrh	w0, [x21]
+	cmp	w0, w20
+	bcs	.L810
+.L806:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
 	ldp	x29, x30, [sp, 32]
-	ldr	x25, [sp, 96]
-	add	sp, sp, 112
+	add	sp, sp, 96
 	ret
 	.size	print_list_info, .-print_list_info
 	.section	.text.dump_all_list_info,"ax",@progbits
@@ -4200,39 +4447,80 @@ print_list_info:
 	.type	dump_all_list_info, %function
 dump_all_list_info:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR89
-	adrp	x0, .LANCHOR90
-	add	x1, x1, :lo12:.LANCHOR89
-	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	print_list_info
-	adrp	x1, .LANCHOR91
-	adrp	x0, .LANCHOR92
-	add	x1, x1, :lo12:.LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR92
-	bl	print_list_info
 	adrp	x1, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x1, x1, :lo12:.LANCHOR93
+	add	x29, sp, 0
 	add	x0, x0, :lo12:.LANCHOR94
 	bl	print_list_info
-	adrp	x1, .LANCHOR84
-	adrp	x0, .LANCHOR75
-	add	x1, x1, :lo12:.LANCHOR84
-	add	x0, x0, :lo12:.LANCHOR75
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LANCHOR96
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR96
 	bl	print_list_info
-	adrp	x1, .LANCHOR82
-	adrp	x0, .LANCHOR76
-	add	x1, x1, :lo12:.LANCHOR82
-	add	x0, x0, :lo12:.LANCHOR76
+	adrp	x1, .LANCHOR97
+	adrp	x0, .LANCHOR98
+	add	x1, x1, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LANCHOR98
+	bl	print_list_info
+	adrp	x1, .LANCHOR88
+	adrp	x0, .LANCHOR8
+	add	x1, x1, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LANCHOR8
 	bl	print_list_info
-	ldp	x29, x30, [sp], 16
 	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR79
 	add	x1, x1, :lo12:.LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR79
+	bl	print_list_info
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR78
 	b	print_list_info
 	.size	dump_all_list_info, .-dump_all_list_info
+	.section	.text.ftl_tmp_into_update,"ax",@progbits
+	.align	2
+	.global	ftl_tmp_into_update
+	.type	ftl_tmp_into_update, %function
+ftl_tmp_into_update:
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	w1, [x0, 16]
+	cmp	w1, 2048
+	bls	.L815
+	ldr	w2, [x0, 20]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 16]
+.L815:
+	ldr	w1, [x0, 24]
+	cmp	w1, 2048
+	bls	.L816
+	ldr	w2, [x0, 28]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 24]
+.L816:
+	ldr	w1, [x0, 32]
+	cmp	w1, 1024
+	bls	.L817
+	ldr	w2, [x0, 36]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 32]
+.L817:
+	ldr	w1, [x0, 40]
+	cmp	w1, 1024
+	bls	.L814
+	ldr	w2, [x0, 44]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 40]
+.L814:
+	ret
+	.size	ftl_tmp_into_update, .-ftl_tmp_into_update
 	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_get_blk_list_in_sblk
@@ -4240,35 +4528,35 @@ dump_all_list_info:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR3
 	and	w0, w0, 65535
-	adrp	x7, .LANCHOR96
-	add	x7, x7, :lo12:.LANCHOR96
+	adrp	x7, .LANCHOR102
+	add	x7, x7, :lo12:.LANCHOR102
 	ldr	x2, [x2, #:lo12:.LANCHOR3]
 	mov	w3, 0
 	mov	w13, 21
 	add	x2, x2, x0, uxth 2
 	ldrb	w12, [x2, 3]
-	adrp	x2, .LANCHOR72
-	ldrb	w10, [x2, #:lo12:.LANCHOR72]
-	adrp	x2, .LANCHOR95
-	ldrb	w6, [x2, #:lo12:.LANCHOR95]
+	adrp	x2, .LANCHOR76
+	ldrb	w10, [x2, #:lo12:.LANCHOR76]
+	adrp	x2, .LANCHOR101
+	ldrb	w6, [x2, #:lo12:.LANCHOR101]
 	and	w2, w6, 65535
 	mul	w0, w0, w2
 	sub	w2, w2, #1
 	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L771:
+.L820:
 	cmp	w3, w10
-	blt	.L775
+	blt	.L824
 	sxtw	x2, w0
 	mov	w3, -1
-.L776:
+.L825:
 	cmp	w10, w2
-	bgt	.L777
+	bgt	.L826
 	ret
-.L775:
+.L824:
 	asr	w2, w12, w3
-	tbnz	x2, 0, .L772
+	tbnz	x2, 0, .L821
 	sdiv	w2, w3, w6
 	ldrh	w8, [x7]
 	sbfiz	x11, x0, 1, 32
@@ -4277,106 +4565,200 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L773
-.L778:
+	bhi	.L822
+.L827:
 	add	w0, w0, 1
 	strh	w2, [x1, x11]
-.L772:
+.L821:
 	add	w3, w3, 1
-	b	.L771
-.L773:
+	b	.L820
+.L822:
 	and	w8, w5, w3
 	add	w2, w2, w8
-	b	.L778
-.L777:
+	b	.L827
+.L826:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L776
+	b	.L825
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_free_sblk
 	.type	ftl_free_sblk, %function
 ftl_free_sblk:
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR3
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	x20, x0, 65535
-	ldr	x2, [x1, #:lo12:.LANCHOR3]
-	lsl	x19, x20, 2
 	stp	x21, x22, [sp, 32]
-	mov	x22, x20
-	add	x0, x2, x19
-	mov	x21, x1
-	ldrb	w3, [x0, 2]
-	tbz	x3, 3, .L780
-	adrp	x1, .LANCHOR97
-	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	ldrh	w1, [x2, x19]
-	ldrh	w4, [x3, 74]
-	ubfx	x1, x1, 0, 11
-	add	w1, w1, w4
-	adrp	x4, .LANCHOR98
-	ldrh	w4, [x4, #:lo12:.LANCHOR98]
-	cmp	w4, w1, uxth
-	bcc	.L781
-	ldr	w1, [x2, x19]
-	ldrh	w2, [x3, 72]
-	ubfx	x1, x1, 11, 8
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR99
-	ldrh	w2, [x2, #:lo12:.LANCHOR99]
-	cmp	w2, w1, uxth
-	bcs	.L780
-.L781:
-	adrp	x1, .LANCHOR86
-	adrp	x2, .LANCHOR91
-	ldrh	w1, [x1, #:lo12:.LANCHOR86]
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR87
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
-	cmp	w1, w2
-	bge	.L782
-	ldrb	w1, [x0, 2]
-	mov	w2, 2
-	bfi	w1, w2, 3, 2
-.L787:
-	strb	w1, [x0, 2]
-.L780:
-	mov	w0, w22
+	adrp	x22, .LANCHOR3
+	str	x23, [sp, 48]
+	and	x23, x0, 65535
+	ldr	x4, [x22, #:lo12:.LANCHOR3]
+	lsl	x21, x23, 2
+	stp	x19, x20, [sp, 16]
+	mov	x19, x23
+	add	x20, x4, x21
+	ldrb	w0, [x20, 2]
+	tbz	x0, 3, .L830
+	adrp	x1, .LANCHOR100
+	ldrh	w2, [x4, x21]
+	adrp	x8, .LANCHOR103
+	ldr	x7, [x1, #:lo12:.LANCHOR100]
+	and	w3, w2, 2047
+	ldr	w2, [x4, x21]
+	ldrh	w8, [x8, #:lo12:.LANCHOR103]
+	ldrh	w1, [x7, 74]
+	ubfx	x6, x2, 11, 8
+	adrp	x2, .LANCHOR4
+	add	w1, w3, w1
+	ldrh	w2, [x2, #:lo12:.LANCHOR4]
+	and	w5, w1, 65535
+	ldrh	w1, [x7, 72]
+	add	w1, w6, w1
+	udiv	w7, w5, w2
+	and	w1, w1, 65535
+	add	w7, w7, w1
+	cmp	w7, w8
+	ble	.L831
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L832
+.L847:
+	mov	w1, 2
+	bfi	w0, w1, 3, 2
+.L845:
+	strb	w0, [x20, 2]
+.L833:
+	ldrb	w0, [x20, 2]
+	ands	w0, w0, 24
+	bne	.L837
+	mul	w2, w6, w2
+	ldrh	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w3, w2, lsr 2
+	ubfx	x2, x2, 2, 9
+	bfi	w0, w2, 0, 11
+	strh	w0, [x4, x21]
+.L830:
+	mov	w0, w19
 	bl	zftl_remove_data_node
-	mov	w0, w22
-	bl	zftl_insert_free_list
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	add	x21, x0, x21
+	ldrb	w0, [x21, 2]
+	and	w0, w0, 31
+	strb	w0, [x21, 2]
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, x23, lsl 1]
+	ldrb	w0, [x20, 2]
+	tbz	x0, 3, .L839
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, 584]
+	cmp	w1, w19
+	bne	.L840
+	mov	w1, -1
+	ldrh	w2, [x0, 588]
+	strh	w1, [x0, 584]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L840
+	strh	w19, [x0, 588]
+	mov	w1, w19
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
+.L846:
+	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	add	x0, x0, x19
-	ldrb	w1, [x0, 2]
-	and	w1, w1, 31
-	strb	w1, [x0, 2]
-	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x20, lsl 1]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	printf
+.L832:
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L847
+.L836:
+	and	w0, w0, -25
+	b	.L845
+.L831:
+	madd	w1, w2, w1, w5
+	adrp	x5, .LANCHOR105
+	ldrh	w5, [x5, #:lo12:.LANCHOR105]
+	cmp	w1, w5
+	ble	.L833
+	adrp	x1, .LANCHOR104
+	adrp	x7, .LANCHOR93
+	ldrh	w5, [x1, #:lo12:.LANCHOR104]
+	adrp	x1, .LANCHOR88
+	ldrh	w7, [x7, #:lo12:.LANCHOR93]
+	ldrh	w1, [x1, #:lo12:.LANCHOR88]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	adrp	x7, .LANCHOR86
+	ldrh	w7, [x7, #:lo12:.LANCHOR86]
+	add	w1, w1, w7
+	cmp	w5, w1
+	bge	.L836
+	adrp	x1, .LANCHOR91
+	adrp	x7, .LANCHOR95
+	ldrh	w5, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR90
+	ldrh	w7, [x7, #:lo12:.LANCHOR95]
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	add	w5, w5, 7
+	add	w1, w1, w7
+	cmp	w5, w1
+	blt	.L836
+	b	.L847
+.L837:
+	cmp	w0, 16
+	bne	.L830
+	sdiv	w2, w3, w2
+	ldr	w0, [x4, x21]
+	add	w2, w2, w2, lsl 1
+	add	w2, w6, w2, lsr 2
+	ubfx	x2, x2, 2, 6
+	bfi	w0, w2, 11, 8
+	str	w0, [x4, x21]
+	b	.L830
+.L840:
+	ldrh	w1, [x0, 586]
+	cmp	w1, w19
+	bne	.L839
+	mov	w1, -1
+	ldrh	w2, [x0, 590]
+	strh	w1, [x0, 586]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L839
+	strh	w19, [x0, 590]
+	mov	w1, w19
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
+	b	.L846
+.L839:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	ret
-.L782:
-	adrp	x1, .LANCHOR84
-	adrp	x2, .LANCHOR89
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
-	ldrh	w2, [x2, #:lo12:.LANCHOR89]
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR82
-	ldrh	w2, [x2, #:lo12:.LANCHOR82]
-	add	w1, w1, w2
-	adrp	x2, .LANCHOR100
-	ldrh	w2, [x2, #:lo12:.LANCHOR100]
-	cmp	w1, w2
-	bge	.L780
-	ldrb	w1, [x0, 2]
-	and	w1, w1, -25
-	b	.L787
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	zftl_insert_free_list
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",@progbits
 	.align	2
@@ -4386,20 +4768,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR63
+	adrp	x21, .LANCHOR65
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC51
-	adrp	x23, .LANCHOR4
-	add	x21, x21, :lo12:.LANCHOR63
+	adrp	x22, .LC57
+	adrp	x23, .LANCHOR5
+	add	x21, x21, :lo12:.LANCHOR65
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC51
+	add	x22, x22, :lo12:.LC57
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L789:
+.L849:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L804
+	bhi	.L863
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4407,121 +4789,114 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L804:
+.L863:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L790
+	cbz	w2, .L850
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L790:
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, x26]
-	cbnz	w0, .L791
+.L850:
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, x26]
 	adrp	x0, .LANCHOR3
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L792
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L851
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC52
+	adrp	x0, .LC58
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC52
+	add	x0, x0, :lo12:.LC58
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L792:
+.L851:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L793
+	beq	.L852
 	tst	w0, 192
-	bne	.L794
-.L793:
-	adrp	x1, .LANCHOR101
+	bne	.L853
+.L852:
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 770
-	add	x1, x1, :lo12:.LANCHOR101
+	mov	w2, 793
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L794:
+.L853:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L795
+	cbz	w2, .L854
 	add	x3, x0, 392
 	mov	w1, 0
-.L797:
+.L856:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L796
+	bne	.L855
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L795:
+.L854:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L798
+	cbz	w2, .L857
 	add	x3, x0, 136
 	mov	w1, 0
-.L800:
+.L859:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L799
+	bne	.L858
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L798:
+.L857:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L801
+	cbz	w2, .L860
 	add	x3, x0, 264
 	mov	w1, 0
-.L803:
+.L862:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L802
+	bne	.L861
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L801:
+.L860:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L789
-.L796:
+	b	.L849
+.L855:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L797
-	b	.L795
-.L799:
+	bne	.L856
+	b	.L854
+.L858:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L800
-	b	.L798
-.L802:
+	bne	.L859
+	b	.L857
+.L861:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L803
-	b	.L801
-.L791:
-	mov	w2, 0
-	mov	w1, 1
-	mov	w0, w19
-	bl	gc_add_sblk
-	b	.L801
+	bne	.L862
+	b	.L860
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4533,29 +4908,29 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR102
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR103
-	ldrh	w1, [x1, #:lo12:.LANCHOR96]
+	adrp	x22, .LANCHOR108
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR102
+	adrp	x0, .LANCHOR107
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L828
-	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbz	w0, .L887
+	ldrh	w2, [x22, #:lo12:.LANCHOR108]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L828:
-	ldrh	w2, [x22, #:lo12:.LANCHOR103]
+.L887:
+	ldrh	w2, [x22, #:lo12:.LANCHOR108]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -4576,56 +4951,56 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	adrp	x25, .LANCHOR104
+	adrp	x25, .LANCHOR109
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
 	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR95
+	adrp	x24, .LANCHOR101
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR104
+	add	x25, x25, :lo12:.LANCHOR109
 	ldrb	w28, [x0, 3]
-	add	x24, x24, :lo12:.LANCHOR95
+	add	x24, x24, :lo12:.LANCHOR101
 	add	x27, x29, 112
 	mov	w19, 0
-.L834:
+.L893:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L845
+	bge	.L904
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR103
+	adrp	x0, .LANCHOR108
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR103]
+	ldrh	w3, [x0, #:lo12:.LANCHOR108]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L846
-.L836:
+	b	.L905
+.L895:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L835
+	tbnz	x2, 0, .L894
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L835:
+.L894:
 	add	w0, w0, 1
-.L846:
+.L905:
 	cmp	w0, w1
-	blt	.L836
+	blt	.L895
 	cmp	w1, 4
-	bne	.L837
+	bne	.L896
 	mov	x3, 0
-.L838:
+.L897:
 	cmp	w21, w3
-	bgt	.L839
-.L840:
+	bgt	.L898
+.L899:
 	add	w19, w19, 1
-	b	.L834
-.L839:
+	b	.L893
+.L898:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -4633,59 +5008,59 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L838
-.L837:
+	b	.L897
+.L896:
 	cmp	w21, 2
-	bne	.L841
-	adrp	x0, .LANCHOR102
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L842
+	bne	.L900
+	adrp	x0, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbz	w0, .L901
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L842:
+.L901:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L840
-.L841:
+	b	.L899
+.L900:
 	cmp	w21, 1
-	bne	.L840
-	adrp	x0, .LANCHOR102
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L844
+	bne	.L899
+	adrp	x0, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbz	w0, .L903
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L844:
+.L903:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L840
-.L845:
-	adrp	x2, .LANCHOR97
+	b	.L899
+.L904:
+	adrp	x2, .LANCHOR100
 	ldr	x3, [x23, #:lo12:.LANCHOR3]
-	cbnz	w20, .L847
+	cbnz	w20, .L906
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L849
+	bge	.L908
 	strh	w0, [x1, 96]
-.L849:
+.L908:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4694,7 +5069,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L847:
+.L906:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -4702,15 +5077,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR97]
+	ldr	x1, [x2, #:lo12:.LANCHOR100]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L849
+	bcs	.L908
 	strh	w0, [x1, 98]
-	b	.L849
+	b	.L908
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -4718,44 +5093,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L859
+	bls	.L918
 	strh	wzr, [x1, 136]
-.L859:
+.L918:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L860
-	adrp	x1, .LANCHOR105
+	cbnz	w0, .L919
+	adrp	x1, .LANCHOR110
 	adrp	x0, .LC0
-	mov	w2, 1012
-	add	x1, x1, :lo12:.LANCHOR105
+	mov	w2, 1118
+	add	x1, x1, :lo12:.LANCHOR110
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L860:
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+.L919:
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	mov	w5, 65535
-.L863:
+.L922:
 	ldrh	w2, [x1, 136]
-.L861:
+.L920:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L862
+	ble	.L921
 	strh	wzr, [x1, 136]
-	b	.L863
-.L862:
+	b	.L922
+.L921:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L866
+	bne	.L925
 	mov	x2, x4
-	b	.L861
-.L866:
+	b	.L920
+.L925:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -4776,40 +5151,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L869
+	bls	.L928
 	strh	wzr, [x1, 138]
-.L869:
+.L928:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L870
-	adrp	x1, .LANCHOR106
+	bls	.L929
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1036
-	add	x1, x1, :lo12:.LANCHOR106
+	mov	w2, 1142
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L870:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L929:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w4, 65535
-.L873:
+.L932:
 	ldrh	w1, [x0, 138]
-.L871:
+.L930:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L872
+	ble	.L931
 	strh	wzr, [x0, 138]
-	b	.L873
-.L872:
+	b	.L932
+.L931:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L874
+	bne	.L933
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -4819,9 +5194,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L874:
+.L933:
 	mov	x1, x3
-	b	.L871
+	b	.L930
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -4831,7 +5206,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L887
+	beq	.L946
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
@@ -4842,25 +5217,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L877
+	bne	.L936
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR97
-	ldr	x3, [x1, #:lo12:.LANCHOR97]
-	tbz	x0, 3, .L881
+	adrp	x1, .LANCHOR100
+	ldr	x3, [x1, #:lo12:.LANCHOR100]
+	tbz	x0, 3, .L940
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L882:
+.L941:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L884
+	bne	.L943
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -4868,44 +5243,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L877:
+.L936:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L881:
+.L940:
 	tst	w0, 24
-	bne	.L883
+	bne	.L942
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L882
-.L883:
+	b	.L941
+.L942:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L882
-.L884:
+	b	.L941
+.L943:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L885
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L944
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L877
-.L885:
+	b	.L936
+.L944:
 	cmp	w0, 96
-	bne	.L877
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	bne	.L936
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L877
-.L887:
+	b	.L936
+.L946:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -4914,20 +5289,20 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR5
-	adrp	x3, .LANCHOR72
+	adrp	x1, .LANCHOR6
+	adrp	x3, .LANCHOR76
 	and	w0, w0, 65535
 	add	x29, sp, 0
-	ldr	x2, [x1, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR80
-	ldrb	w3, [x3, #:lo12:.LANCHOR72]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldr	x2, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR83
+	ldrb	w3, [x3, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L891
+	bge	.L950
 	add	x2, x2, 16
-.L892:
+.L951:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -4935,25 +5310,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L893
-	adrp	x1, .LANCHOR107
+	bne	.L952
+	adrp	x1, .LANCHOR112
 	adrp	x0, .LC0
-	mov	w2, 1421
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1529
+	add	x1, x1, :lo12:.LANCHOR112
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L893:
-	adrp	x0, .LANCHOR103
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+.L952:
+	adrp	x0, .LANCHOR108
+	ldrh	w0, [x0, #:lo12:.LANCHOR108]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L891:
+.L950:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L892
+	b	.L951
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -4961,29 +5336,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR108
-	add	x1, x1, :lo12:.LANCHOR108
+	adrp	x1, .LANCHOR113
+	add	x1, x1, :lo12:.LANCHOR113
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR109
-	ldr	x4, [x2, #:lo12:.LANCHOR109]
-	adrp	x2, .LANCHOR110
-	ldr	x5, [x2, #:lo12:.LANCHOR110]
-.L896:
+	adrp	x2, .LANCHOR114
+	ldr	x4, [x2, #:lo12:.LANCHOR114]
+	adrp	x2, .LANCHOR115
+	ldr	x5, [x2, #:lo12:.LANCHOR115]
+.L955:
 	cmp	w1, w3
-	bne	.L898
+	bne	.L957
 	mov	w0, -1
 	ret
-.L898:
+.L957:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L897
+	bne	.L956
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L897:
+.L956:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L896
+	b	.L955
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -4997,50 +5372,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L900
-	adrp	x1, .LANCHOR111
+	bne	.L959
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1536
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1644
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L900:
-	adrp	x0, .LANCHOR80
+.L959:
+	adrp	x0, .LANCHOR83
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bne	.L901
-	adrp	x1, .LANCHOR111
+	bne	.L960
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1537
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1645
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L901:
+.L960:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L902
-	adrp	x1, .LANCHOR111
+	cbnz	w0, .L961
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
-	mov	w2, 1538
-	add	x1, x1, :lo12:.LANCHOR111
+	mov	w2, 1646
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L902:
+.L961:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	adrp	x0, .LANCHOR72
-	ldrb	w4, [x0, #:lo12:.LANCHOR72]
-.L903:
+	adrp	x0, .LANCHOR76
+	ldrb	w4, [x0, #:lo12:.LANCHOR76]
+.L962:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L905
-	adrp	x0, .LANCHOR103
+	beq	.L964
+	adrp	x0, .LANCHOR108
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	ldrh	w0, [x0, #:lo12:.LANCHOR108]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -5051,29 +5426,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L899
+	bne	.L958
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L899:
+.L958:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L905:
+.L964:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L904
+	bne	.L963
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L904:
+.L963:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L903
+	b	.L962
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5089,22 +5464,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L909
-	adrp	x1, .LANCHOR112
+	bcs	.L968
+	adrp	x1, .LANCHOR117
 	adrp	x0, .LC0
-	mov	w2, 1569
-	add	x1, x1, :lo12:.LANCHOR112
+	mov	w2, 1677
+	add	x1, x1, :lo12:.LANCHOR117
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L909:
-	adrp	x20, .LANCHOR97
+.L968:
+	adrp	x20, .LANCHOR100
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5117,58 +5492,58 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR113
+	adrp	x2, .LANCHOR118
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR113]
+	ldrh	w1, [x2, #:lo12:.LANCHOR118]
 	cmp	w1, 4
-	bhi	.L912
-	cbnz	w0, .L912
+	bhi	.L971
+	cbnz	w0, .L971
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR113]
+	strh	w1, [x2, #:lo12:.LANCHOR118]
 	ret
-.L912:
+.L971:
 	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR113]
+	strh	wzr, [x3, #:lo12:.LANCHOR118]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR2]
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR4]
+	ldr	x6, [x0, #:lo12:.LANCHOR5]
 	adrp	x0, .LANCHOR3
 	ldr	x7, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L914:
+.L973:
 	cmp	w5, w1, uxth
-	bhi	.L917
-	adrp	x1, .LANCHOR5
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	bhi	.L976
+	adrp	x1, .LANCHOR6
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR97
+	adrp	x2, .LANCHOR100
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L911
+	cbz	w2, .L970
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L911:
+.L970:
 	ret
-.L917:
+.L976:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L915
+	beq	.L974
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L916
+	bne	.L975
 	add	w0, w0, w3
-.L915:
+.L974:
 	add	x1, x1, 1
-	b	.L914
-.L916:
+	b	.L973
+.L975:
 	add	w2, w2, w3
-	b	.L915
+	b	.L974
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5189,15 +5564,21 @@ ftl_vpn_update:
 	and	w19, w0, 65535
 	mov	w0, w19
 	bl	zftl_list_update_data_list
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	ubfiz	x19, x19, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, x19]
+	cbnz	w0, .L984
+	adrp	x1, .LANCHOR119
+	mov	w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR119]
+.L982:
 	ldr	x19, [sp, 16]
-	cmp	w0, 0
-	cset	w0, eq
 	ldp	x29, x30, [sp], 32
 	ret
+.L984:
+	mov	w0, 0
+	b	.L982
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
 	.align	2
@@ -5210,39 +5591,51 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L926
-	adrp	x0, .LANCHOR4
+	beq	.L987
+	adrp	x0, .LANCHOR5
 	ubfiz	x1, x19, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR4]
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L927
-	adrp	x0, .LC53
+	cbnz	w0, .L988
+	adrp	x0, .LC59
 	mov	w2, 0
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC53
+	add	x0, x0, :lo12:.LC59
 	bl	printf
-.L930:
+.L993:
 	mov	w0, 0
-	b	.L925
-.L927:
+	b	.L986
+.L988:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L926:
-	adrp	x20, .LANCHOR114
-	ldrh	w0, [x20, #:lo12:.LANCHOR114]
+.L987:
+	adrp	x20, .LANCHOR66
+	ldrh	w0, [x20, #:lo12:.LANCHOR66]
 	cmp	w19, w0
-	beq	.L930
+	beq	.L993
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L929
-	strh	w19, [x20, #:lo12:.LANCHOR114]
-	b	.L930
-.L929:
+	bne	.L990
+	strh	w19, [x20, #:lo12:.LANCHOR66]
+	b	.L993
+.L990:
 	bl	ftl_vpn_update
 	cmp	w0, 0
+	adrp	x1, .LANCHOR120
 	cset	w0, ne
-	strh	w19, [x20, #:lo12:.LANCHOR114]
-.L925:
+	ldrh	w3, [x20, #:lo12:.LANCHOR66]
+	ldrh	w2, [x1, #:lo12:.LANCHOR120]
+	strh	w19, [x20, #:lo12:.LANCHOR66]
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	cmp	w2, 7
+	csel	w2, w2, wzr, ls
+	strh	w2, [x1, #:lo12:.LANCHOR120]
+	and	x2, x2, 65535
+	adrp	x1, .LANCHOR67
+	add	x1, x1, :lo12:.LANCHOR67
+	strh	w3, [x1, x2, lsl 1]
+.L986:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5252,50 +5645,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR108
+	adrp	x3, .LANCHOR113
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR108
+	add	x4, x3, :lo12:.LANCHOR113
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR109
-	ldr	x8, [x4, #:lo12:.LANCHOR109]
-	adrp	x4, .LANCHOR110
-	ldr	x4, [x4, #:lo12:.LANCHOR110]
-.L933:
+	adrp	x4, .LANCHOR114
+	ldr	x8, [x4, #:lo12:.LANCHOR114]
+	adrp	x4, .LANCHOR115
+	ldr	x4, [x4, #:lo12:.LANCHOR115]
+.L996:
 	cmp	w6, w12
-	beq	.L937
+	beq	.L1000
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L934
+	bne	.L997
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L935
-	add	x6, x3, :lo12:.LANCHOR108
+	bne	.L998
+	add	x6, x3, :lo12:.LANCHOR113
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L936:
+.L999:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L937:
+.L1000:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR108
+	add	x3, x3, :lo12:.LANCHOR113
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L944
+	beq	.L1007
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR102
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -5303,22 +5696,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L935:
+.L998:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L936
-.L934:
+	b	.L999
+.L997:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L933
-.L944:
+	b	.L996
+.L1007:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5328,10 +5721,10 @@ lpa_hash_update_ppa:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR96
+	adrp	x1, .LANCHOR102
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR96]
+	ldrh	w3, [x1, #:lo12:.LANCHOR102]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -5340,23 +5733,23 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	and	w19, w2, 65535
-	tbz	x0, 14, .L948
-	adrp	x0, .LC54
+	tbz	x0, 14, .L1011
+	adrp	x0, .LC60
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC60
 	bl	printf
-.L948:
+.L1011:
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L947
+	bls	.L1010
 	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5365,7 +5758,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L947:
+.L1010:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5376,52 +5769,52 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR86
-	adrp	x0, .LANCHOR5
-	adrp	x7, .LANCHOR54
+	adrp	x1, .LANCHOR90
+	adrp	x0, .LANCHOR6
+	adrp	x7, .LANCHOR56
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldrh	w6, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR82
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	ldr	w7, [x7, #:lo12:.LANCHOR54]
-	ldrh	w5, [x1, #:lo12:.LANCHOR82]
-	adrp	x1, .LANCHOR84
+	ldrh	w6, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR86
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	ldr	w7, [x7, #:lo12:.LANCHOR56]
+	ldrh	w5, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR88
 	str	w7, [sp, 8]
-	ldrh	w4, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR93
+	ldrh	w4, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR97
 	ldr	w7, [x0, 528]
-	ldrh	w3, [x1, #:lo12:.LANCHOR93]
-	adrp	x1, .LANCHOR91
+	ldrh	w3, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR95
 	str	w7, [sp]
-	ldrh	w2, [x1, #:lo12:.LANCHOR91]
-	adrp	x1, .LANCHOR89
+	ldrh	w2, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR93
 	ldr	w7, [x0, 524]
-	adrp	x0, .LC55
-	ldrh	w1, [x1, #:lo12:.LANCHOR89]
-	add	x0, x0, :lo12:.LC55
+	adrp	x0, .LC61
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	add	x0, x0, :lo12:.LC61
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x1, .LANCHOR115
-	ldrb	w3, [x1, #:lo12:.LANCHOR115]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	adrp	x1, .LANCHOR121
+	ldrb	w3, [x1, #:lo12:.LANCHOR121]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC56
-	add	x0, x0, :lo12:.LC56
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC57
-	add	x0, x0, :lo12:.LC57
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5434,24 +5827,24 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC58
-	add	x0, x0, :lo12:.LC58
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
 	bl	printf
 	ldr	x19, [sp, 48]
-	adrp	x0, .LANCHOR73
+	adrp	x0, .LANCHOR77
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 64
-	ldrh	w5, [x0, #:lo12:.LANCHOR73]
-	adrp	x0, .LANCHOR79
-	ldrh	w4, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR62
-	ldrh	w3, [x0, #:lo12:.LANCHOR62]
-	adrp	x0, .LANCHOR88
-	ldrh	w2, [x0, #:lo12:.LANCHOR88]
-	adrp	x0, .LANCHOR85
-	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LC59
-	add	x0, x0, :lo12:.LC59
+	ldrh	w5, [x0, #:lo12:.LANCHOR77]
+	adrp	x0, .LANCHOR82
+	ldrh	w4, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR64
+	ldrh	w3, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR92
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR89
+	ldrh	w1, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -5463,65 +5856,65 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L957
-	adrp	x1, .LANCHOR116
-	add	x1, x1, :lo12:.LANCHOR116
-	mov	w2, 639
+	cbnz	x0, .L1020
+	adrp	x1, .LANCHOR122
+	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 652
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L956:
+.L1019:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L960:
+.L1023:
 	mov	x1, x19
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR97
+	adrp	x1, .LANCHOR100
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
+	ldrb	w0, [x21, #:lo12:.LANCHOR55]
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x21, #:lo12:.LANCHOR53]
+	strb	w0, [x21, #:lo12:.LANCHOR55]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L956
-.L957:
+	b	.L1019
+.L1020:
 	mov	x19, x0
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR123
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L962
-	adrp	x1, .LANCHOR116
+	bls	.L1025
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 644
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 657
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L962:
+.L1025:
 	ldrb	w0, [x19, 56]
-	adrp	x21, .LANCHOR53
-	cbz	w0, .L959
-	ldrb	w1, [x20, #:lo12:.LANCHOR117]
+	adrp	x21, .LANCHOR55
+	cbz	w0, .L1022
+	ldrb	w1, [x20, #:lo12:.LANCHOR123]
 	cmp	w1, w0
-	bcs	.L960
-.L959:
+	bcs	.L1023
+.L1022:
 	mov	x0, x19
 	bl	buf_free
-	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	b	.L956
+	ldrb	w0, [x21, #:lo12:.LANCHOR55]
+	b	.L1019
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -5531,26 +5924,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR118
+	adrp	x20, .LANCHOR124
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR46
-	adrp	x22, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR118
-	add	x19, x19, :lo12:.LANCHOR46
-	add	x22, x22, :lo12:.LANCHOR96
+	adrp	x19, .LANCHOR48
+	adrp	x22, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR124
+	add	x19, x19, :lo12:.LANCHOR48
+	add	x22, x22, :lo12:.LANCHOR102
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L968:
+.L1031:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L974
+	bne	.L1037
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L974:
+.L1037:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -5559,7 +5952,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L969
+	bne	.L1032
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -5569,11 +5962,11 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w0
-	adrp	x0, .LC60
-	add	x0, x0, :lo12:.LC60
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
 	and	w24, w1, 65535
 	mov	w1, w24
 	bl	printf
@@ -5581,39 +5974,39 @@ ftl_write_completed:
 	mov	w2, 0
 	mov	w0, w24
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldr	w1, [x0, 556]
 	add	w1, w1, w25
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L970
+	bne	.L1033
 	strh	wzr, [x0, 22]
-.L971:
+.L1034:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L968
-.L970:
+	b	.L1031
+.L1033:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L971
+	bne	.L1034
 	strh	wzr, [x0, 54]
-	b	.L971
-.L969:
+	b	.L1034
+.L1032:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L973
+	tbz	x0, 2, .L1036
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L968
-.L973:
+	b	.L1031
+.L1036:
 	mov	x0, x21
 	bl	buf_free
-	b	.L968
+	b	.L1031
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
@@ -5635,39 +6028,39 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L978
+	beq	.L1041
 	adrp	x0, .LANCHOR3
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR3]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L979
-	adrp	x1, .LANCHOR119
+	beq	.L1042
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	mov	w2, 757
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 827
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L979:
+.L1042:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L980:
+.L1043:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L978:
+.L1041:
 	bl	print_ftl_debug_info
-	adrp	x21, .LC61
+	adrp	x21, .LC67
 	mov	w2, w20
-	add	x21, x21, :lo12:.LC61
+	add	x21, x21, :lo12:.LC67
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
@@ -5680,28 +6073,28 @@ ftl_alloc_sblk:
 	mov	x0, x21
 	bl	printf
 	bl	dump_all_list_info
-	mov	w2, 767
-	adrp	x1, .LANCHOR119
+	mov	w2, 837
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR119
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L980
+	b	.L1043
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR120
+	adrp	x1, .LANCHOR126
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR120]
-	adrp	x1, .LANCHOR118
-	strb	w0, [x1, #:lo12:.LANCHOR118]
-	adrp	x1, .LANCHOR58
-	strb	w0, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR65
-	strb	w0, [x1, #:lo12:.LANCHOR65]
+	strb	w0, [x1, #:lo12:.LANCHOR126]
+	adrp	x1, .LANCHOR124
+	strb	w0, [x1, #:lo12:.LANCHOR124]
+	adrp	x1, .LANCHOR60
+	strb	w0, [x1, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR69
+	strb	w0, [x1, #:lo12:.LANCHOR69]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -5711,25 +6104,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR120
+	adrp	x19, .LANCHOR126
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR120]
+	ldrb	w1, [x19, #:lo12:.LANCHOR126]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR120]
+	ldrb	w19, [x19, #:lo12:.LANCHOR126]
 	cmp	w19, 255
-	beq	.L987
-	adrp	x1, .LANCHOR46
+	beq	.L1050
+	adrp	x1, .LANCHOR48
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR46
-	adrp	x21, .LC63
+	add	x1, x1, :lo12:.LANCHOR48
+	adrp	x21, .LC69
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC63
+	add	x21, x21, :lo12:.LC69
 	mov	x20, x1
-.L989:
+.L1052:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -5737,11 +6130,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L987
+	beq	.L1050
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L989
-.L987:
+	b	.L1052
+.L1050:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -5752,86 +6145,86 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR120
-	ldrb	w2, [x2, #:lo12:.LANCHOR120]
+	adrp	x2, .LANCHOR126
+	ldrb	w2, [x2, #:lo12:.LANCHOR126]
 	cmp	w2, 255
-	beq	.L1006
-	adrp	x3, .LANCHOR96
-	adrp	x7, .LANCHOR46
-	add	x7, x7, :lo12:.LANCHOR46
-	adrp	x10, .L1002
-	ldrh	w8, [x3, #:lo12:.LANCHOR96]
+	beq	.L1069
+	adrp	x3, .LANCHOR102
+	adrp	x7, .LANCHOR48
+	add	x7, x7, :lo12:.LANCHOR48
+	adrp	x10, .L1065
+	ldrh	w8, [x3, #:lo12:.LANCHOR102]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L1002
+	add	x10, x10, :lo12:.L1065
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR95
+	adrp	x4, .LANCHOR101
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR95]
+	ldrb	w6, [x4, #:lo12:.LANCHOR101]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L1005:
+.L1068:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L999
+	bne	.L1062
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L1000
+	bne	.L1063
 	cmp	w1, 1
-	bne	.L997
+	bne	.L1060
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L999
+	beq	.L1062
 	ret
-.L1000:
+.L1063:
 	cmp	w1, 3
-	bhi	.L999
+	bhi	.L1062
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx1002
+	adr	x13, .Lrtx1065
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx1002:
+.Lrtx1065:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L1002:
-	.byte	(.L1001 - .Lrtx1002) / 4
-	.byte	(.L1003 - .Lrtx1002) / 4
-	.byte	(.L1004 - .Lrtx1002) / 4
-	.byte	(.L997 - .Lrtx1002) / 4
+.L1065:
+	.byte	(.L1064 - .Lrtx1065) / 4
+	.byte	(.L1066 - .Lrtx1065) / 4
+	.byte	(.L1067 - .Lrtx1065) / 4
+	.byte	(.L1060 - .Lrtx1065) / 4
 	.section	.text.queue_lun_state
-.L1001:
+.L1064:
 	cmp	w0, 2
-	beq	.L999
+	beq	.L1062
 	ret
-.L1003:
+.L1066:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L999
+	beq	.L1062
 	ret
-.L1004:
+.L1067:
 	cmp	w0, 10
-	bne	.L997
-.L999:
+	bne	.L1060
+.L1062:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L1005
-.L1006:
+	bne	.L1068
+.L1069:
 	mov	w0, 0
-.L997:
+.L1060:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -5839,68 +6232,68 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR120
-	ldrb	w2, [x6, #:lo12:.LANCHOR120]
+	adrp	x6, .LANCHOR126
+	ldrb	w2, [x6, #:lo12:.LANCHOR126]
 	cmp	w2, 255
-	beq	.L1008
-	adrp	x0, .LANCHOR46
+	beq	.L1071
+	adrp	x0, .LANCHOR48
 	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR46
+	add	x5, x0, :lo12:.LANCHOR48
 	add	x3, x5, x4
 	ldrb	w1, [x3, 58]
 	sub	w1, w1, #11
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L1008
+	bhi	.L1071
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR120]
+	strb	w0, [x6, #:lo12:.LANCHOR126]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L1010
+	bne	.L1073
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L1011
-	adrp	x0, .LANCHOR118
-	ldrb	w3, [x0, #:lo12:.LANCHOR118]
-	add	x0, x0, :lo12:.LANCHOR118
-.L1012:
+	cbnz	w0, .L1074
+	adrp	x0, .LANCHOR124
+	ldrb	w3, [x0, #:lo12:.LANCHOR124]
+	add	x0, x0, :lo12:.LANCHOR124
+.L1075:
 	cmp	w3, 255
-	bne	.L1016
-	add	x1, x1, :lo12:.LANCHOR46
+	bne	.L1079
+	add	x1, x1, :lo12:.LANCHOR48
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L1011:
-	adrp	x0, .LANCHOR65
-	ldrb	w3, [x0, #:lo12:.LANCHOR65]
-	add	x0, x0, :lo12:.LANCHOR65
-	b	.L1012
-.L1010:
-	cbnz	w0, .L1008
+.L1074:
+	adrp	x0, .LANCHOR69
+	ldrb	w3, [x0, #:lo12:.LANCHOR69]
+	add	x0, x0, :lo12:.LANCHOR69
+	b	.L1075
+.L1073:
+	cbnz	w0, .L1071
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L1008
-	adrp	x0, .LANCHOR58
-	ldrb	w3, [x0, #:lo12:.LANCHOR58]
-	add	x0, x0, :lo12:.LANCHOR58
-	b	.L1012
-.L1016:
-	add	x0, x1, :lo12:.LANCHOR46
-.L1023:
+	beq	.L1071
+	adrp	x0, .LANCHOR60
+	ldrb	w3, [x0, #:lo12:.LANCHOR60]
+	add	x0, x0, :lo12:.LANCHOR60
+	b	.L1075
+.L1079:
+	add	x0, x1, :lo12:.LANCHOR48
+.L1086:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L1023
+	bne	.L1086
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L1008:
+.L1071:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -5909,42 +6302,42 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR72
+	adrp	x2, .LANCHOR76
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
+	adrp	x20, .LANCHOR100
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1025
+	bls	.L1088
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1026
-.L1025:
-	adrp	x19, .LC64
-	add	x19, x19, :lo12:.LC64
+	bne	.L1089
+.L1088:
+	adrp	x19, .LC70
+	add	x19, x19, :lo12:.LC70
 	adrp	x23, .LANCHOR3
-.L1038:
+.L1101:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR97
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	add	x14, x20, :lo12:.LANCHOR100
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1027
+	bne	.L1090
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -5953,76 +6346,76 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1038
-.L1027:
+	b	.L1101
+.L1090:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR121
+	adrp	x1, .LANCHOR127
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR121]
+	str	w2, [x1, #:lo12:.LANCHOR127]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1029:
+.L1092:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1028
+	beq	.L1091
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1029
-	adrp	x1, .LANCHOR122
+	bne	.L1092
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	mov	w2, 192
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 194
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1028:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1091:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1026:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L1089:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1031
-	adrp	x1, .LANCHOR122
+	bcs	.L1094
+	adrp	x1, .LANCHOR128
 	adrp	x0, .LC0
-	mov	w2, 197
-	add	x1, x1, :lo12:.LANCHOR122
+	mov	w2, 199
+	add	x1, x1, :lo12:.LANCHOR128
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1031:
-	adrp	x1, .LANCHOR96
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L1094:
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	mov	w2, 21
-	ldrh	w1, [x1, #:lo12:.LANCHOR96]
+	ldrh	w1, [x1, #:lo12:.LANCHOR102]
 	sub	w2, w2, w1
 	strh	wzr, [x0, 696]
 	strh	w19, [x0, 692]
 	asr	w4, w19, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1034
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1097
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w3, w19
-	adrp	x0, .LC65
+	adrp	x0, .LC71
 	sub	w2, w2, #1
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC65
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-.L1034:
+.L1097:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -6036,68 +6429,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR123
-	add	x0, x0, :lo12:.LANCHOR123
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1043:
+.L1106:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1042
+	beq	.L1105
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1043
+	bne	.L1106
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1045:
+.L1108:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1044
+	tbnz	x3, 15, .L1107
 	cmp	w3, w4
-	bcs	.L1044
+	bcs	.L1107
 	mov	w4, w3
 	mov	w19, w1
-.L1044:
+.L1107:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1045
+	bne	.L1108
 	cmp	w19, 32
-	bne	.L1042
-	adrp	x1, .LANCHOR124
+	bne	.L1105
+	adrp	x1, .LANCHOR130
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR124]
+	ldrb	w3, [x1, #:lo12:.LANCHOR130]
 	mov	w1, 0
-.L1047:
+.L1110:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1046
+	bcs	.L1109
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1046:
+.L1109:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1047
+	bne	.L1110
 	cmp	w19, 32
-	bne	.L1042
-	adrp	x1, .LANCHOR125
+	bne	.L1105
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC0
-	mov	w2, 295
-	add	x1, x1, :lo12:.LANCHOR125
+	mov	w2, 297
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1042:
+.L1105:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6119,60 +6512,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR27
-	cbnz	w0, .L1054
-	add	x1, x19, :lo12:.LANCHOR27
+	adrp	x19, .LANCHOR29
+	cbnz	w0, .L1117
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	x0, 0
-.L1055:
+.L1118:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1055
-.L1061:
-	adrp	x20, .LANCHOR126
-	add	x20, x20, :lo12:.LANCHOR126
+	bne	.L1118
+.L1124:
+	adrp	x20, .LANCHOR132
+	add	x20, x20, :lo12:.LANCHOR132
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR27
+	add	x19, x19, :lo12:.LANCHOR29
 	bl	ftl_memset
 	mov	x0, 0
-.L1056:
+.L1119:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1056
+	bne	.L1119
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1054:
+.L1117:
 	cmp	w0, 1
-	bne	.L1057
-	add	x3, x19, :lo12:.LANCHOR27
+	bne	.L1120
+	add	x3, x19, :lo12:.LANCHOR29
 	mov	x1, 0
-.L1060:
+.L1123:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1058
+	bls	.L1121
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1058:
+.L1121:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1060
-	b	.L1061
-.L1057:
+	bne	.L1123
+	b	.L1124
+.L1120:
 	cmp	w0, 2
-	bne	.L1062
-	add	x3, x19, :lo12:.LANCHOR27
+	bne	.L1125
+	add	x3, x19, :lo12:.LANCHOR29
 	mov	w1, 65535
 	mov	x0, 0
-.L1064:
+.L1127:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6181,35 +6574,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1064
-	b	.L1061
-.L1062:
+	bne	.L1127
+	b	.L1124
+.L1125:
 	cmp	w0, 3
-	bne	.L1065
-	add	x3, x19, :lo12:.LANCHOR27
+	bne	.L1128
+	add	x3, x19, :lo12:.LANCHOR29
 	mov	x1, 0
-.L1068:
+.L1131:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1066
+	bls	.L1129
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1066:
+.L1129:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1068
-	b	.L1061
-.L1065:
+	bne	.L1131
+	b	.L1124
+.L1128:
 	cmp	w0, 4
-	bne	.L1069
-	add	x1, x19, :lo12:.LANCHOR27
+	bne	.L1132
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR27]
+	strh	wzr, [x19, #:lo12:.LANCHOR29]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -6223,7 +6616,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1071:
+.L1134:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6232,37 +6625,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1071
-	b	.L1061
-.L1069:
+	bne	.L1134
+	b	.L1124
+.L1132:
 	cmp	w0, 5
-	bne	.L1072
-	add	x1, x19, :lo12:.LANCHOR27
+	bne	.L1135
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	x0, 0
-.L1073:
+.L1136:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1073
+	bne	.L1136
 	add	x1, x1, 32
-.L1074:
+.L1137:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1074
-	b	.L1061
-.L1072:
+	bne	.L1137
+	b	.L1124
+.L1135:
 	cmp	w0, 8
-	bne	.L1061
-	add	x1, x19, :lo12:.LANCHOR27
+	bne	.L1124
+	add	x1, x19, :lo12:.LANCHOR29
 	mov	x0, 0
-.L1075:
+.L1138:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1075
-	b	.L1061
+	bne	.L1138
+	b	.L1124
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6270,38 +6663,38 @@ flash_lsb_page_tbl_build:
 	.type	flash_die_info_init, %function
 flash_die_info_init:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1091
-	adrp	x1, .LANCHOR127
+	tbz	x0, 12, .L1154
+	adrp	x1, .LANCHOR133
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR127
+	add	x1, x1, :lo12:.LANCHOR133
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1091:
-	adrp	x23, .LANCHOR32
-	add	x19, x23, :lo12:.LANCHOR32
-	adrp	x25, .LANCHOR26
-	adrp	x26, .LANCHOR12
-	adrp	x22, .LANCHOR24
-	add	x21, x22, :lo12:.LANCHOR24
+.L1154:
+	adrp	x23, .LANCHOR34
+	add	x19, x23, :lo12:.LANCHOR34
+	adrp	x25, .LANCHOR28
+	adrp	x26, .LANCHOR14
+	adrp	x22, .LANCHOR26
+	add	x21, x22, :lo12:.LANCHOR26
 	ldrh	w0, [x19, 26]
 	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR129
-	strh	w0, [x25, #:lo12:.LANCHOR26]
-	add	x20, x24, :lo12:.LANCHOR129
+	adrp	x24, .LANCHOR135
+	strh	w0, [x25, #:lo12:.LANCHOR28]
+	add	x20, x24, :lo12:.LANCHOR135
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR12]
+	strb	wzr, [x26, #:lo12:.LANCHOR14]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR128
-	strh	w0, [x1, #:lo12:.LANCHOR128]
+	adrp	x1, .LANCHOR134
+	strh	w0, [x1, #:lo12:.LANCHOR134]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -6309,34 +6702,34 @@ flash_die_info_init:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR32]
+	ldrb	w13, [x23, #:lo12:.LANCHOR34]
 	mov	x7, x23
-	adrp	x14, .LANCHOR38
-	add	x11, x26, :lo12:.LANCHOR12
-	add	x23, x14, :lo12:.LANCHOR38
+	adrp	x14, .LANCHOR40
+	add	x11, x26, :lo12:.LANCHOR14
+	add	x23, x14, :lo12:.LANCHOR40
 	mov	x8, 0
-.L1093:
+.L1156:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1092
+	cbnz	w0, .L1155
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L1092:
+.L1155:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L1093
-	add	x0, x7, :lo12:.LANCHOR32
+	bne	.L1156
+	add	x0, x7, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1094
-.L1098:
-	add	x7, x7, :lo12:.LANCHOR32
-	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	beq	.L1157
+.L1161:
+	add	x7, x7, :lo12:.LANCHOR34
+	ldrb	w0, [x26, #:lo12:.LANCHOR14]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -6346,30 +6739,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR130
-	strh	w0, [x1, #:lo12:.LANCHOR130]
+	adrp	x1, .LANCHOR136
+	strh	w0, [x1, #:lo12:.LANCHOR136]
 	ret
-.L1094:
-	ldrh	w1, [x25, #:lo12:.LANCHOR26]
-	add	x14, x14, :lo12:.LANCHOR38
+.L1157:
+	ldrh	w1, [x25, #:lo12:.LANCHOR28]
+	add	x14, x14, :lo12:.LANCHOR40
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR12
-	add	x15, x24, :lo12:.LANCHOR129
-	add	x22, x22, :lo12:.LANCHOR24
+	add	x19, x26, :lo12:.LANCHOR14
+	add	x15, x24, :lo12:.LANCHOR135
+	add	x22, x22, :lo12:.LANCHOR26
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L1097:
+.L1160:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1095
+	cbnz	w0, .L1158
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -6377,11 +6770,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L1095:
+.L1158:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1097
-	b	.L1098
+	bne	.L1160
+	b	.L1161
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6391,19 +6784,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR108
+	adrp	x0, .LANCHOR113
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR113
 	bl	ftl_memset
-	adrp	x0, .LANCHOR80
+	adrp	x0, .LANCHOR83
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	ldrh	w2, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR110
-	ldr	x0, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR115
+	ldr	x0, [x0, #:lo12:.LANCHOR115]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6413,64 +6806,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1111
-	adrp	x1, .LANCHOR131
-	adrp	x0, .LC66
+	tbz	x0, 12, .L1174
+	adrp	x1, .LANCHOR137
+	adrp	x0, .LC72
 	mov	w3, 0
-	mov	w2, 218
-	add	x1, x1, :lo12:.LANCHOR131
-	add	x0, x0, :lo12:.LC66
+	mov	w2, 220
+	add	x1, x1, :lo12:.LANCHOR137
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L1111:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR72
-	adrp	x19, .LANCHOR108
-	add	x19, x19, :lo12:.LANCHOR108
+.L1174:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR76
+	adrp	x19, .LANCHOR113
+	add	x19, x19, :lo12:.LANCHOR113
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR110
-	ldrb	w0, [x22, #:lo12:.LANCHOR72]
+	ldrh	w2, [x20, #:lo12:.LANCHOR83]
+	adrp	x21, .LANCHOR115
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR83
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR110]
+	ldr	x0, [x21, #:lo12:.LANCHOR115]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR109
-	ldrb	w3, [x22, #:lo12:.LANCHOR72]
-	ldr	x5, [x21, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR114
+	ldrb	w3, [x22, #:lo12:.LANCHOR76]
+	ldr	x5, [x21, #:lo12:.LANCHOR115]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR109]
-.L1112:
+	ldr	x4, [x0, #:lo12:.LANCHOR114]
+.L1175:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1114
+	blt	.L1177
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1114:
+.L1177:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1113
+	beq	.L1176
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1113:
+.L1176:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1112
+	b	.L1175
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6484,19 +6877,19 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
-	adrp	x0, .LANCHOR26
+	adrp	x1, .LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR28
 	mov	w4, 1
 	ldrb	w3, [x1, 9]
-	ldrh	w0, [x0, #:lo12:.LANCHOR26]
+	ldrh	w0, [x0, #:lo12:.LANCHOR28]
 	mul	w0, w3, w0
 	and	w2, w0, 65535
 	strb	w2, [x19, 4]
 	ubfx	x0, x2, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	strb	w0, [x19, 7]
 	ldrb	w0, [x1, 13]
 	mul	w0, w0, w2
@@ -6512,30 +6905,30 @@ zftl_read_flash_info:
 	ubfx	x2, x0, 16, 8
 	lsr	w0, w0, 24
 	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR24
+	adrp	x2, .LANCHOR26
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR24
+	add	x2, x2, :lo12:.LANCHOR26
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR12
-	ldrb	w3, [x0, #:lo12:.LANCHOR12]
-.L1123:
+	adrp	x0, .LANCHOR14
+	ldrb	w3, [x0, #:lo12:.LANCHOR14]
+.L1186:
 	cmp	w3, w1, uxtb
-	bhi	.L1124
+	bhi	.L1187
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1124:
+.L1187:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1123
+	b	.L1186
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6543,132 +6936,319 @@ zftl_read_flash_info:
 	.type	gc_static_wearleveling, %function
 gc_static_wearleveling:
 	stp	x29, x30, [sp, -160]!
-	mov	w1, 10240
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR97
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR100
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	ldr	w0, [x5, 32]
-	cmp	w0, w1
-	bls	.L1127
-	ldr	w1, [x5, 36]
-	add	w1, w1, w0, lsr 10
-	and	w0, w0, 1023
-	stp	w0, w1, [x5, 32]
-.L1127:
-	adrp	x25, .LANCHOR5
-	ldr	w3, [x5, 36]
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 32]
+	mov	w0, 10240
+	cmp	w1, w0
+	bls	.L1190
+	bl	ftl_tmp_into_update
+.L1190:
+	adrp	x19, .LANCHOR6
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	ldr	w1, [x0, 568]
 	ldr	w2, [x0, 12]
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1128
+	bhi	.L1191
+	ldr	x3, [x25, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
+	ldr	w3, [x3, 36]
 	cmp	w3, w1
-	bls	.L1126
-.L1128:
-	adrp	x21, .LANCHOR3
-	ldrh	w10, [x5, 134]
-	adrp	x23, .LANCHOR2
-	mov	w27, 65535
-	ldr	x8, [x21, #:lo12:.LANCHOR3]
-	mov	w19, w27
-	ldrh	w11, [x23, #:lo12:.LANCHOR2]
-	mov	w12, w27
+	bls	.L1240
+.L1191:
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
+	mov	w20, 65535
+	adrp	x8, .LANCHOR9
+	mov	w21, w20
+	add	x8, x8, :lo12:.LANCHOR9
+	mov	w28, 0
+	mov	w27, 0
+	mov	w22, 0
+	ldr	w3, [x1, 36]
+	adrp	x23, .LANCHOR3
+	ldrh	w24, [x1, 134]
 	str	w2, [x0, 568]
-	mov	w4, 0
-	add	x8, x8, x10, uxth 2
 	str	w3, [x0, 572]
+	adrp	x0, .LANCHOR2
+	add	x10, x0, :lo12:.LANCHOR2
+	str	wzr, [x29, 128]
+	str	wzr, [x29, 136]
+	stp	wzr, wzr, [x29, 148]
+	str	wzr, [x29, 156]
+.L1193:
+	ldrh	w0, [x10]
+	cmp	w0, w24
+	bhi	.L1202
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w2, 128
+	mov	w1, 255
+	adrp	x24, .LANCHOR9
+	add	x0, x0, 264
+	strh	wzr, [x0, -142]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w3, [x24, #:lo12:.LANCHOR9]
+	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	ldrh	w5, [x0, 586]
+	mov	x1, x5
+	lsl	x0, x5, 2
+	add	x26, x2, x0
+	tbz	x3, 10, .L1203
+	adrp	x3, .LANCHOR5
+	ldrb	w4, [x26, 2]
+	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	w3, [x2, x0]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
+	ldrh	w7, [x6, x5, lsl 1]
+	ubfx	x3, x3, 11, 8
+	ldrb	w6, [x26, 3]
+	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1203:
+	ldrb	w0, [x26, 2]
+	tbz	x0, 3, .L1204
+	ldrb	w0, [x26, 2]
+	and	w1, w0, 192
+	cmp	w1, 64
+	bne	.L1205
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	mov	w1, 0
-	mov	w20, 0
-	mov	w26, 0
-	mov	w3, 0
-	mov	w2, 0
-.L1130:
-	cmp	w10, w11
-	bcc	.L1134
-	ldrh	w0, [x5, 96]
-	cmp	w0, w20
-	bcs	.L1135
-	strh	w20, [x5, 96]
-.L1135:
-	ldrh	w0, [x5, 98]
-	cmp	w0, w26
-	bcs	.L1136
-	strh	w26, [x5, 98]
-.L1136:
-	udiv	w3, w3, w1
-	adrp	x24, .LANCHOR7
-	udiv	w4, w4, w2
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	strh	w3, [x5, 88]
-	strh	w4, [x5, 90]
-	tbz	x0, 10, .L1137
-	adrp	x0, .LC67
+	mov	w2, 1
+	ldrh	w0, [x0, 586]
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR65+318
+	mov	w1, 1
+	strh	w1, [x0, #:lo12:.LANCHOR65+318]
+.L1204:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w3, [x24, #:lo12:.LANCHOR9]
+	ldr	x2, [x23, #:lo12:.LANCHOR3]
+	ldrh	w5, [x0, 584]
+	mov	x1, x5
+	lsl	x0, x5, 2
+	add	x26, x2, x0
+	tbz	x3, 10, .L1206
+	adrp	x3, .LANCHOR5
+	ldrb	w4, [x26, 2]
+	ldr	x6, [x3, #:lo12:.LANCHOR5]
+	ldr	w3, [x2, x0]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
+	ldrh	w7, [x6, x5, lsl 1]
+	ubfx	x3, x3, 11, 8
+	ldrb	w6, [x26, 3]
+	ubfx	x5, x4, 5, 3
+	and	w2, w2, 2047
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1206:
+	ldrb	w0, [x26, 2]
+	tbz	x0, 3, .L1207
+	ldrb	w0, [x26, 2]
+	and	w1, w0, 192
+	cmp	w1, 64
+	bne	.L1208
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 0
+	mov	w2, 1
+	ldrh	w0, [x0, 584]
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR65+318
+	mov	w1, 1
+	strh	w1, [x0, #:lo12:.LANCHOR65+318]
+.L1207:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1209
+	ldr	w6, [x29, 128]
+	adrp	x2, .LANCHOR5
+	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	lsl	x0, x6, 2
+	add	x5, x1, x0
+	ldr	w3, [x1, x0]
+	ldrh	w2, [x1, x0]
+	adrp	x0, .LC76
+	ldrh	w7, [x7, x6, lsl 1]
+	add	x0, x0, :lo12:.LC76
+	ldrb	w6, [x5, 3]
+	ubfx	x3, x3, 11, 8
+	ldr	w1, [x29, 128]
+	and	w2, w2, 2047
+	ldrb	w4, [x5, 2]
+	ubfx	x5, x4, 5, 3
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1209:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1210
+	ldr	w6, [x29, 136]
+	adrp	x2, .LANCHOR5
+	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	ldr	x7, [x2, #:lo12:.LANCHOR5]
+	lsl	x0, x6, 2
+	add	x5, x1, x0
+	ldr	w3, [x1, x0]
+	ldrh	w2, [x1, x0]
+	adrp	x0, .LC77
+	ldrh	w7, [x7, x6, lsl 1]
+	add	x0, x0, :lo12:.LC77
+	ldrb	w6, [x5, 3]
+	ubfx	x3, x3, 11, 8
+	ldr	w1, [x29, 136]
+	and	w2, w2, 2047
+	ldrb	w4, [x5, 2]
+	ubfx	x5, x4, 5, 3
+	ubfx	x4, x4, 3, 2
+	bl	printf
+.L1210:
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w1, [x29, 156]
+	strh	w1, [x0, 96]
+	ldr	w1, [x29, 148]
+	strh	w22, [x0, 98]
+	strh	w20, [x0, 92]
+	strh	w21, [x0, 94]
+	udiv	w3, w1, w27
+	ldr	w1, [x29, 152]
+	udiv	w4, w1, w28
+	strh	w3, [x0, 88]
+	strh	w4, [x0, 90]
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1211
+	adrp	x0, .LC78
 	and	w4, w4, 65535
 	and	w3, w3, 65535
-	add	x0, x0, :lo12:.LC67
-	bl	printf
-.L1137:
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	adrp	x28, .LANCHOR132
-	tbz	x0, 10, .L1138
-	adrp	x0, .LANCHOR133
-	ldrh	w6, [x28, #:lo12:.LANCHOR132]
-	mov	w4, w26
-	mov	w3, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR133]
-	mov	w2, w19
-	adrp	x0, .LC68
+	mov	w2, w28
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC68
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L1138:
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
-	mov	w1, 255
-	mov	w2, 128
-	add	x0, x0, 264
-	strh	wzr, [x0, -142]
-	bl	ftl_memset
-	sub	w0, w26, w19
+.L1211:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 10, .L1212
+	adrp	x0, .LANCHOR138
+	ldr	w3, [x29, 156]
+	mov	w4, w22
+	mov	w2, w21
+	ldrh	w6, [x0, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR139
+	mov	w1, w20
+	ldrh	w5, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+.L1212:
+	sub	w0, w22, w21
 	str	w0, [x29, 148]
-	ldrh	w0, [x28, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR138
 	ldr	w1, [x29, 148]
+	ldrh	w0, [x0, #:lo12:.LANCHOR138]
 	cmp	w1, w0
-	bgt	.L1139
-	adrp	x1, .LANCHOR133
-	sub	w0, w20, w27
-	ldrh	w1, [x1, #:lo12:.LANCHOR133]
+	bgt	.L1213
+	adrp	x1, .LANCHOR139
+	ldr	w0, [x29, 156]
+	ldrh	w1, [x1, #:lo12:.LANCHOR139]
+	sub	w0, w0, w20
 	cmp	w0, w1
-	bgt	.L1139
-.L1146:
-	cbnz	w19, .L1140
-.L1148:
-	cbz	w27, .L1126
-	ldr	x2, [x22, #:lo12:.LANCHOR97]
-	ldr	x1, [x21, #:lo12:.LANCHOR3]
-	ldrh	w5, [x23, #:lo12:.LANCHOR2]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L1153:
-	cmp	w0, w5
-	bcc	.L1155
+	ble	.L1241
+.L1213:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	adrp	x28, .LANCHOR65
+	add	x28, x28, :lo12:.LANCHOR65
+	mov	w27, 0
+	mov	w22, 0
+	ldrh	w26, [x0, 580]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w0, [x0, 134]
+	str	w0, [x29, 152]
+	adrp	x0, .LANCHOR2
+	add	x0, x0, :lo12:.LANCHOR2
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR139
+	add	x0, x0, :lo12:.LANCHOR139
+	str	x0, [x29, 128]
+.L1215:
+	ldr	x0, [x29, 136]
+	ldr	w1, [x29, 152]
+	ldrh	w0, [x0]
+	cmp	w1, w0
+	bcc	.L1225
+.L1224:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	str	w26, [x0, 580]
+.L1214:
+	cbz	w21, .L1227
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR2
+	ldrh	w5, [x0, #:lo12:.LANCHOR2]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldrh	w1, [x2, 134]
+	add	x0, x0, x1, uxth 2
+.L1228:
+	cmp	w1, w5
+	bcc	.L1230
+	ldrh	w0, [x2, 72]
+	add	w0, w21, w0
+	strh	w0, [x2, 72]
+	ldrh	w0, [x2, 98]
+	cmp	w21, w0
+	bcs	.L1227
+	sub	w21, w0, w21
+	strh	w21, [x2, 98]
+.L1227:
+	cbz	w20, .L1233
+	ldr	x2, [x25, #:lo12:.LANCHOR100]
+	adrp	x0, .LANCHOR2
+	ldrh	w6, [x0, #:lo12:.LANCHOR2]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	ldrh	w1, [x2, 134]
+	add	x0, x0, x1, uxth 2
+.L1234:
+	cmp	w1, w6
+	bcc	.L1236
 	ldrh	w0, [x2, 74]
-	add	w0, w27, w0
+	add	w0, w20, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
-	cmp	w27, w0
-	bcs	.L1126
-	sub	w7, w0, w27
-	strh	w7, [x2, 96]
-.L1126:
+	cmp	w20, w0
+	bcs	.L1233
+	sub	w20, w0, w20
+	strh	w20, [x2, 96]
+.L1233:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w1, w0, 65535
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1192
+	adrp	x2, .LANCHOR5
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldrh	w2, [x2, x1]
+	adrp	x1, .LANCHOR83
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	cmp	w2, w1
+	bhi	.L1192
+	add	w22, w22, 1
+	mov	w2, 1
+	mov	w1, 0
+	bl	gc_add_sblk
+.L1192:
+	add	w0, w22, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6676,210 +7256,297 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1134:
-	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L1131
-	ldr	w0, [x8]
-	ldrh	w6, [x8]
+.L1202:
+	uxtw	x7, w24
+	ldr	x6, [x23, #:lo12:.LANCHOR3]
+	lsl	x2, x7, 2
+	add	x11, x6, x2
+	ldrb	w0, [x11, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1194
+	ubfx	x4, x0, 3, 2
+	tbz	x4, 0, .L1195
+	ldr	w0, [x6, x2]
+	ldrh	w1, [x6, x2]
 	ubfx	x0, x0, 11, 8
-	and	w6, w6, 2047
-.L1132:
-	cmp	w6, w27
-	add	w1, w1, 1
-	csel	w7, w6, w27, cc
-	cmp	w6, w20
-	csel	w20, w6, w20, hi
-	and	w1, w1, 65535
-	add	w3, w3, w6
-	and	w27, w7, 65535
-	and	w20, w20, 65535
-	cmp	w0, w12
-	bne	.L1156
-	b	.L1157
-.L1131:
+	and	w1, w1, 2047
+.L1196:
+	ldr	w3, [x29, 148]
+	add	w27, w27, 1
+	and	w27, w27, 65535
+	cmp	w20, w1
+	add	w3, w3, w1
+	str	w3, [x29, 148]
+	bls	.L1239
+	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	mov	w20, w1
+	strh	w24, [x3, 586]
+.L1239:
+	ldr	w3, [x29, 156]
+	cmp	w3, w1
+	bcs	.L1199
+	str	w24, [x29, 128]
+	str	w1, [x29, 156]
+.L1199:
+	mov	w3, 65535
+	cmp	w0, w3
+	bne	.L1198
+.L1200:
+	cmp	w0, 9
+	ccmp	w1, 9, 0, hi
+	bhi	.L1194
+	ldr	w0, [x8]
+	tbz	x0, 8, .L1194
+	adrp	x0, .LANCHOR5
+	ldr	w3, [x6, x2]
+	ldrh	w2, [x6, x2]
+	mov	w1, w24
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldrb	w6, [x11, 3]
+	ubfx	x3, x3, 11, 8
+	ldrb	w5, [x11, 2]
+	and	w2, w2, 2047
+	stp	x8, x10, [x29, 112]
+	ldrh	w7, [x0, x7, lsl 1]
+	adrp	x0, .LC73
+	ubfx	x5, x5, 5, 3
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	ldp	x8, x10, [x29, 112]
+.L1194:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L1193
+.L1195:
 	tst	w0, 24
-	bne	.L1133
-	ldrh	w6, [x8]
+	bne	.L1197
+	ldrh	w1, [x6, x2]
 	mov	w0, 65535
-	and	w6, w6, 2047
-	b	.L1132
-.L1133:
-	ldr	w0, [x8]
+	and	w1, w1, 2047
+	b	.L1196
+.L1197:
+	ldr	w0, [x6, x2]
+	mov	w1, 65535
 	ubfx	x0, x0, 11, 8
-.L1156:
-	cmp	w0, w19
-	add	w2, w2, 1
-	csel	w19, w0, w19, cc
-	cmp	w0, w26
-	add	w4, w4, w0
-	csel	w0, w0, w26, hi
-	and	w2, w2, 65535
-	and	w19, w19, 65535
-	and	w26, w0, 65535
-.L1157:
-	add	w10, w10, 1
-	add	x8, x8, 4
-	and	w10, w10, 65535
-	b	.L1130
-.L1139:
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
-	adrp	x25, .LANCHOR63
-	stp	wzr, wzr, [x29, 152]
-	ldrh	w26, [x0, 134]
-	add	x0, x23, :lo12:.LANCHOR2
-	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR133
-	add	x0, x0, :lo12:.LANCHOR133
-	str	x0, [x29, 120]
-	add	x0, x25, :lo12:.LANCHOR63
-	str	x0, [x29, 136]
-.L1142:
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0]
+.L1198:
+	ldr	w3, [x29, 152]
+	add	w28, w28, 1
+	and	w28, w28, 65535
+	cmp	w21, w0
+	add	w3, w3, w0
+	str	w3, [x29, 152]
+	bls	.L1201
+	ldr	x3, [x19, #:lo12:.LANCHOR6]
+	mov	w21, w0
+	strh	w24, [x3, 584]
+.L1201:
+	cmp	w22, w0
+	bcs	.L1200
+	mov	w22, w0
+	str	w24, [x29, 136]
+	b	.L1200
+.L1205:
+	tst	w0, 224
+	bne	.L1204
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 65535
+	ldrh	w2, [x0, 590]
+	cmp	w2, w1
+	bne	.L1204
+	ldrh	w0, [x0, 586]
+	bl	zftl_remove_free_node
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, 586]
+	strh	w1, [x0, 590]
+	mov	w1, -1
+	strh	w1, [x0, 586]
+	b	.L1204
+.L1208:
+	tst	w0, 224
+	bne	.L1207
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w1, 65535
+	ldrh	w2, [x0, 588]
+	cmp	w2, w1
+	bne	.L1207
+	ldrh	w0, [x0, 584]
+	bl	zftl_remove_free_node
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldrh	w1, [x0, 584]
+	strh	w1, [x0, 588]
+	mov	w1, -1
+	strh	w1, [x0, 584]
+	b	.L1207
+.L1225:
+	add	w7, w26, 1
+	ldr	x4, [x23, #:lo12:.LANCHOR3]
+	and	w26, w7, 65535
 	cmp	w0, w26
-	bls	.L1146
-	uxtw	x25, w26
-	ldr	x4, [x21, #:lo12:.LANCHOR3]
-	lsl	x3, x25, 2
+	csel	w26, w26, wzr, hi
+	uxtw	x8, w26
+	lsl	x3, x8, 2
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1143
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L1143
-	tbz	x0, 4, .L1144
-	ldrh	w0, [x28, #:lo12:.LANCHOR132]
-	ldr	w1, [x29, 148]
-	cmp	w1, w0
-	ble	.L1145
+	beq	.L1217
+	and	w2, w0, 224
+	cmp	w2, 224
+	beq	.L1217
+	ubfx	x0, x0, 3, 2
+	and	w1, w0, 1
+	tbz	x0, 0, .L1218
+	cmp	w2, 160
+.L1305:
+	bne	.L1220
+	adrp	x0, .LANCHOR138
+	ldr	w2, [x29, 148]
+	ldrh	w0, [x0, #:lo12:.LANCHOR138]
+	cmp	w2, w0
+	ble	.L1221
 	ldr	w0, [x4, x3]
-	add	w1, w19, 1
+	add	w2, w21, 2
 	ubfx	x0, x0, 11, 8
-	cmp	w0, w1
-	bgt	.L1145
-	stp	x4, x3, [x29, 104]
+	cmp	w0, w2
+	ble	.L1222
+	cbz	w1, .L1221
+	ldrh	w0, [x4, x3]
+	and	w0, w0, 2047
+	cmp	w0, w20
+	bgt	.L1221
+.L1222:
+	stp	x4, x8, [x29, 104]
 	mov	w2, 1
+	str	x3, [x29, 120]
 	mov	w1, 0
 	mov	w0, w26
 	bl	gc_add_sblk
-	ldr	w0, [x29, 156]
-	ldp	x4, x3, [x29, 104]
-	add	w0, w0, 1
-	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1145
-	adrp	x0, .LANCHOR4
+	mov	w0, 1
+	strh	w0, [x28, 318]
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	add	w22, w22, 1
+	ldp	x4, x8, [x29, 104]
+	ldr	x3, [x29, 120]
+	tbz	x0, 10, .L1221
+	adrp	x0, .LANCHOR5
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
 	ubfx	x6, x6, 11, 8
+	ldrh	w4, [x28, 56]
 	and	w5, w5, 2047
 	add	x3, x0, x3
-	ldr	x0, [x29, 136]
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	ldrb	w2, [x3, 2]
-	ldrh	w4, [x0, 56]
-	adrp	x0, .LC69
-	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC69
-	ubfx	x2, x2, 5, 3
+	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
-.L1180:
+	ubfx	x2, x2, 5, 3
+.L1306:
 	bl	printf
-.L1145:
-	ldr	w0, [x29, 156]
-	cmp	w0, 4
+.L1221:
+	cmp	w22, 4
+	ccmp	w27, 4, 2, ls
+	bhi	.L1224
+.L1217:
 	ldr	w0, [x29, 152]
-	ccmp	w0, 4, 2, ls
-	bhi	.L1146
-.L1143:
-	add	w8, w26, 1
-	and	w26, w8, 65535
-	b	.L1142
-.L1144:
-	ldr	x1, [x29, 120]
-	sub	w0, w20, w27
-	ldrh	w1, [x1]
-	cmp	w0, w1
-	ble	.L1145
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w0, [x29, 152]
+	b	.L1215
+.L1218:
+	cmp	w0, 2
+	b	.L1305
+.L1220:
+	ldr	x2, [x29, 128]
+	ldr	w0, [x29, 156]
+	sub	w0, w0, w20
+	ldrh	w2, [x2]
+	cmp	w0, w2
+	ble	.L1221
 	ldrh	w0, [x4, x3]
-	add	w1, w27, 1
+	add	w2, w20, 2
 	and	w0, w0, 2047
+	cmp	w0, w2
+	ble	.L1223
+	cbz	w1, .L1221
+	ldr	w0, [x4, x3]
+	add	w1, w21, 2
+	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1145
-	stp	x4, x3, [x29, 104]
+	bgt	.L1221
+.L1223:
+	stp	x4, x8, [x29, 104]
 	mov	w2, 1
+	str	x3, [x29, 120]
 	mov	w1, 0
 	mov	w0, w26
 	bl	gc_add_sblk
-	ldr	w0, [x29, 152]
-	ldp	x4, x3, [x29, 104]
-	add	w0, w0, 1
-	str	w0, [x29, 152]
-	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1145
-	adrp	x0, .LANCHOR4
+	mov	w0, 1
+	strh	w0, [x28, 318]
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	add	w27, w27, 1
+	ldp	x4, x8, [x29, 104]
+	ldr	x3, [x29, 120]
+	tbz	x0, 10, .L1221
+	adrp	x0, .LANCHOR5
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
 	ubfx	x6, x6, 11, 8
 	and	w5, w5, 2047
+	ldrh	w4, [x28, 56]
 	add	x3, x0, x3
-	ldr	x0, [x29, 136]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
 	ldrb	w2, [x3, 2]
-	ldrh	w4, [x0, 56]
-	adrp	x0, .LC70
-	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC70
-	ubfx	x2, x2, 5, 3
+	ldrh	w3, [x1, x8, lsl 1]
 	mov	w1, w26
-	b	.L1180
-.L1140:
-	ldr	x2, [x22, #:lo12:.LANCHOR97]
-	ldr	x1, [x21, #:lo12:.LANCHOR3]
-	ldrh	w5, [x23, #:lo12:.LANCHOR2]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L1149:
-	cmp	w0, w5
-	bcc	.L1151
-	ldrh	w0, [x2, 72]
-	add	w0, w19, w0
-	strh	w0, [x2, 72]
-	ldrh	w0, [x2, 98]
-	cmp	w19, w0
-	bcs	.L1148
-	sub	w19, w0, w19
-	strh	w19, [x2, 98]
-	b	.L1148
-.L1151:
-	ldr	w3, [x1]
+	ubfx	x2, x2, 5, 3
+	b	.L1306
+.L1241:
+	mov	w27, 0
+	mov	w22, 0
+	b	.L1214
+.L1230:
+	ldr	w3, [x0]
 	ubfx	x4, x3, 11, 8
-	cmp	w19, w4
-	bhi	.L1150
-	sub	w4, w4, w19
+	cmp	w21, w4
+	bhi	.L1229
+	ldrb	w6, [x0, 2]
+	tst	w6, 24
+	beq	.L1229
+	sub	w4, w4, w21
 	bfi	w3, w4, 11, 8
-	str	w3, [x1]
-.L1150:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L1149
-.L1155:
-	ldrh	w3, [x1]
+	str	w3, [x0]
+.L1229:
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 65535
+	b	.L1228
+.L1236:
+	ldrh	w3, [x0]
 	and	w4, w3, 2047
-	cmp	w4, w27
-	blt	.L1154
-	sub	w4, w4, w27
+	cmp	w4, w20
+	blt	.L1235
+	ldrb	w5, [x0, 2]
+	and	w5, w5, 24
+	cmp	w5, 16
+	beq	.L1235
+	sub	w4, w4, w20
 	bfi	w3, w4, 0, 11
-	strh	w3, [x1]
-.L1154:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L1153
+	strh	w3, [x0]
+.L1235:
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 65535
+	b	.L1234
+.L1240:
+	mov	w27, 0
+	mov	w22, 0
+	b	.L1192
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -6895,77 +7562,80 @@ zftl_sblk_list_init:
 	adrp	x28, .LANCHOR0
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x27, #:lo12:.LANCHOR2]
-	adrp	x20, .LANCHOR86
+	adrp	x20, .LANCHOR90
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR82
+	adrp	x19, .LANCHOR86
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR93
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR97
+	adrp	x25, .LANCHOR100
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR0]
-	adrp	x24, .LANCHOR89
-	adrp	x23, .LANCHOR91
-	adrp	x21, .LANCHOR84
+	adrp	x24, .LANCHOR93
+	adrp	x23, .LANCHOR95
+	adrp	x21, .LANCHOR88
 	bl	ftl_memset
 	str	x28, [x29, 168]
-	adrp	x2, .LANCHOR72
-	adrp	x3, .LANCHOR80
-	adrp	x10, .LANCHOR90
-	adrp	x8, .LANCHOR92
-	ldrb	w0, [x2, #:lo12:.LANCHOR72]
-	adrp	x7, .LANCHOR94
-	ldrh	w1, [x3, #:lo12:.LANCHOR80]
-	adrp	x6, .LANCHOR76
-	adrp	x5, .LANCHOR75
-	adrp	x4, .LANCHOR74
-	str	xzr, [x10, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR99
+	adrp	x2, .LANCHOR76
+	adrp	x3, .LANCHOR75
+	mov	w1, 16
+	strh	w1, [x0, #:lo12:.LANCHOR99]
+	adrp	x10, .LANCHOR94
+	ldrb	w0, [x2, #:lo12:.LANCHOR76]
+	adrp	x8, .LANCHOR96
+	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	adrp	x7, .LANCHOR98
+	adrp	x6, .LANCHOR79
+	adrp	x5, .LANCHOR8
+	adrp	x4, .LANCHOR78
+	str	xzr, [x10, #:lo12:.LANCHOR94]
+	str	xzr, [x8, #:lo12:.LANCHOR96]
 	adrp	x28, .LANCHOR3
-	str	xzr, [x8, #:lo12:.LANCHOR92]
 	mul	w1, w0, w1
 	mov	w0, 32768
-	str	xzr, [x7, #:lo12:.LANCHOR94]
-	str	xzr, [x6, #:lo12:.LANCHOR76]
-	str	xzr, [x5, #:lo12:.LANCHOR75]
+	str	xzr, [x7, #:lo12:.LANCHOR98]
+	str	xzr, [x6, #:lo12:.LANCHOR79]
+	str	xzr, [x5, #:lo12:.LANCHOR8]
 	sdiv	w0, w0, w1
-	str	xzr, [x4, #:lo12:.LANCHOR74]
-	strh	wzr, [x24, #:lo12:.LANCHOR89]
-	strh	wzr, [x23, #:lo12:.LANCHOR91]
-	strh	wzr, [x22, #:lo12:.LANCHOR93]
+	str	xzr, [x4, #:lo12:.LANCHOR78]
+	strh	wzr, [x24, #:lo12:.LANCHOR93]
+	strh	wzr, [x23, #:lo12:.LANCHOR95]
+	strh	wzr, [x22, #:lo12:.LANCHOR97]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	strh	wzr, [x21, #:lo12:.LANCHOR84]
-	strh	wzr, [x20, #:lo12:.LANCHOR86]
-	strh	wzr, [x19, #:lo12:.LANCHOR82]
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	strh	wzr, [x21, #:lo12:.LANCHOR88]
+	strh	wzr, [x20, #:lo12:.LANCHOR90]
+	strh	wzr, [x19, #:lo12:.LANCHOR86]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR2
-	adrp	x27, .LC71
-	add	x27, x27, :lo12:.LC71
+	adrp	x27, .LC82
+	add	x27, x27, :lo12:.LC82
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1182:
+.L1308:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1198
-	ldr	x0, [x25, #:lo12:.LANCHOR97]
-	ldrh	w1, [x24, #:lo12:.LANCHOR89]
+	blt	.L1324
+	ldr	x0, [x25, #:lo12:.LANCHOR100]
+	ldrh	w1, [x24, #:lo12:.LANCHOR93]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
-	ldrh	w1, [x23, #:lo12:.LANCHOR91]
+	ldrh	w1, [x23, #:lo12:.LANCHOR95]
 	strh	w1, [x0, 118]
-	ldrh	w1, [x22, #:lo12:.LANCHOR93]
+	ldrh	w1, [x22, #:lo12:.LANCHOR97]
 	strh	w1, [x0, 116]
-	ldrh	w1, [x21, #:lo12:.LANCHOR84]
+	ldrh	w1, [x21, #:lo12:.LANCHOR88]
 	strh	w1, [x0, 122]
-	ldrh	w1, [x20, #:lo12:.LANCHOR86]
+	ldrh	w1, [x20, #:lo12:.LANCHOR90]
 	strh	w1, [x0, 120]
-	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	ldrh	w1, [x19, #:lo12:.LANCHOR86]
 	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6973,27 +7643,28 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1198:
+.L1324:
 	ldr	x4, [x28, #:lo12:.LANCHOR3]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1199
+	cbz	w6, .L1325
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR97]
-	ldrb	w8, [x0, #:lo12:.LANCHOR72]
+	ldr	x7, [x25, #:lo12:.LANCHOR100]
+	ldrb	w8, [x0, #:lo12:.LANCHOR76]
 	ldr	x0, [x29, 104]
-	ldrh	w10, [x0, #:lo12:.LANCHOR80]
+	ldrh	w10, [x0, #:lo12:.LANCHOR75]
 	mov	w0, 0
-.L1184:
+.L1310:
 	cmp	w1, w8
-	blt	.L1187
-	cbz	w0, .L1188
+	blt	.L1313
+	cbz	w0, .L1314
 	mov	w1, 32768
 	sdiv	w0, w1, w0
+	add	w0, w0, 1
 	sxth	w0, w0
-.L1183:
+.L1309:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -7008,120 +7679,120 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1189
-	adrp	x5, .LANCHOR5
-	ldr	x5, [x5, #:lo12:.LANCHOR5]
+	beq	.L1315
+	adrp	x5, .LANCHOR6
+	ldr	x5, [x5, #:lo12:.LANCHOR6]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1189
+	beq	.L1315
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1189
+	beq	.L1315
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1189
+	beq	.L1315
 	cmp	w0, 64
-	bne	.L1190
+	bne	.L1316
 	ldr	x0, [x29, 128]
-	add	x2, x21, :lo12:.LANCHOR84
+	add	x2, x21, :lo12:.LANCHOR88
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR75
-.L1202:
+	add	x0, x0, :lo12:.LANCHOR8
+.L1328:
 	bl	_insert_data_list
-.L1189:
+.L1315:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1182
-.L1187:
+	b	.L1308
+.L1313:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1185
+	tbnz	x5, 0, .L1311
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1186:
+.L1312:
 	add	w1, w1, 1
-	b	.L1184
-.L1185:
+	b	.L1310
+.L1311:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1186
-.L1188:
+	b	.L1312
+.L1314:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
 	strb	w1, [x4, 2]
-	adrp	x1, .LANCHOR4
-	ldr	x1, [x1, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1183
-.L1199:
+	b	.L1309
+.L1325:
 	ldr	w0, [x29, 188]
-	b	.L1183
-.L1190:
+	b	.L1309
+.L1316:
 	cmp	w0, 96
-	bne	.L1191
+	bne	.L1317
 	ldr	x0, [x29, 136]
-	add	x2, x19, :lo12:.LANCHOR82
+	add	x2, x19, :lo12:.LANCHOR86
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1202
-.L1191:
+	add	x0, x0, :lo12:.LANCHOR79
+	b	.L1328
+.L1317:
 	cmp	w0, 160
-	bne	.L1192
+	bne	.L1318
 	ldr	x0, [x29, 120]
-	add	x2, x20, :lo12:.LANCHOR86
+	add	x2, x20, :lo12:.LANCHOR90
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR74
-	b	.L1202
-.L1192:
-	cbnz	w0, .L1189
-	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	add	x0, x0, :lo12:.LANCHOR78
+	b	.L1328
+.L1318:
+	cbnz	w0, .L1315
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1193
+	cbz	w2, .L1319
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1194
+	tbz	x0, 4, .L1320
 	mov	w1, 5
-.L1201:
+.L1327:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1189
-.L1194:
+	b	.L1315
+.L1320:
 	mov	w1, 2
-	b	.L1201
-.L1193:
+	b	.L1327
+.L1319:
 	ands	w1, w1, 24
-	bne	.L1196
+	bne	.L1322
 	ldr	x0, [x29, 160]
-	add	x2, x24, :lo12:.LANCHOR89
+	add	x2, x24, :lo12:.LANCHOR93
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR90
-.L1203:
+	add	x0, x0, :lo12:.LANCHOR94
+.L1329:
 	bl	_insert_free_list
-	b	.L1189
-.L1196:
+	b	.L1315
+.L1322:
 	cmp	w1, 16
-	bne	.L1197
+	bne	.L1323
 	ldr	x0, [x29, 152]
-	add	x2, x23, :lo12:.LANCHOR91
+	add	x2, x23, :lo12:.LANCHOR95
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR92
-	b	.L1203
-.L1197:
+	add	x0, x0, :lo12:.LANCHOR96
+	b	.L1329
+.L1323:
 	ldr	x0, [x29, 144]
-	add	x2, x22, :lo12:.LANCHOR93
+	add	x2, x22, :lo12:.LANCHOR97
 	mov	w1, w26
-	add	x0, x0, :lo12:.LANCHOR94
-	b	.L1203
+	add	x0, x0, :lo12:.LANCHOR98
+	b	.L1329
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7131,19 +7802,19 @@ ftl_open_sblk_init:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR72
+	adrp	x20, .LANCHOR76
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC64
-	adrp	x23, .LANCHOR80
+	adrp	x21, .LC70
+	adrp	x23, .LANCHOR83
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR80
-	add	x20, x20, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LC64
+	add	x23, x23, :lo12:.LANCHOR83
+	add	x20, x20, :lo12:.LANCHOR76
+	add	x21, x21, :lo12:.LC70
 	stp	x25, x26, [sp, 64]
-.L1205:
-.L1208:
+.L1331:
+.L1334:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7163,40 +7834,40 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1209
+	beq	.L1335
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1206:
+.L1332:
 	ldrb	w2, [x20]
-	adrp	x26, .LANCHOR4
+	adrp	x26, .LANCHOR5
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR109
-	ldr	x3, [x1, #:lo12:.LANCHOR109]
+	adrp	x1, .LANCHOR114
+	ldr	x3, [x1, #:lo12:.LANCHOR114]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
 	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	ldr	x0, [x26, #:lo12:.LANCHOR5]
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1204
+	cbnz	w0, .L1330
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	ldr	x0, [x26, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1208
-.L1209:
+	b	.L1334
+.L1335:
 	mov	w0, 0
-	b	.L1206
-.L1204:
+	b	.L1332
+.L1330:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7212,34 +7883,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR134
+	adrp	x20, .LANCHOR140
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR134]
+	ldrh	w0, [x20, #:lo12:.LANCHOR140]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1212
-	adrp	x1, .LANCHOR135
+	bls	.L1338
+	adrp	x1, .LANCHOR141
 	adrp	x0, .LC0
-	mov	w2, 76
-	add	x1, x1, :lo12:.LANCHOR135
+	mov	w2, 78
+	add	x1, x1, :lo12:.LANCHOR141
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1212:
+.L1338:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
-	adrp	x23, .LANCHOR95
-	adrp	x5, .LANCHOR97
-	adrp	x0, .LANCHOR96
+	adrp	x23, .LANCHOR101
+	adrp	x5, .LANCHOR100
+	adrp	x0, .LANCHOR102
 	mov	w2, 21
-	ldrb	w12, [x23, #:lo12:.LANCHOR95]
-	ldr	x7, [x5, #:lo12:.LANCHOR97]
-	ldrh	w11, [x0, #:lo12:.LANCHOR96]
-	ldrh	w13, [x20, #:lo12:.LANCHOR134]
+	ldrb	w12, [x23, #:lo12:.LANCHOR101]
+	ldr	x7, [x5, #:lo12:.LANCHOR100]
+	ldrh	w11, [x0, #:lo12:.LANCHOR102]
+	ldrh	w13, [x20, #:lo12:.LANCHOR140]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -7248,26 +7919,26 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1213:
+.L1339:
 	cmp	x4, x1
-	bne	.L1217
-	adrp	x24, .LANCHOR72
-	adrp	x25, .LANCHOR80
-	adrp	x26, .LANCHOR7
-	adrp	x27, .LC72
-	ldrb	w22, [x24, #:lo12:.LANCHOR72]
-	add	x20, x20, :lo12:.LANCHOR134
-	ldrh	w0, [x25, #:lo12:.LANCHOR80]
-	add	x26, x26, :lo12:.LANCHOR7
-	add	x27, x27, :lo12:.LC72
+	bne	.L1343
+	adrp	x24, .LANCHOR76
+	adrp	x25, .LANCHOR83
+	adrp	x26, .LANCHOR9
+	adrp	x27, .LC83
+	ldrb	w22, [x24, #:lo12:.LANCHOR76]
+	add	x20, x20, :lo12:.LANCHOR140
+	ldrh	w0, [x25, #:lo12:.LANCHOR83]
+	add	x26, x26, :lo12:.LANCHOR9
+	add	x27, x27, :lo12:.LC83
 	mov	w19, 0
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1218:
+.L1344:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1224
+	bhi	.L1350
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7276,7 +7947,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1217:
+.L1343:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -7284,47 +7955,47 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1214:
+.L1340:
 	cmp	w13, w3, uxth
-	bhi	.L1216
+	bhi	.L1342
 	add	x4, x4, 4
-	b	.L1213
-.L1216:
+	b	.L1339
+.L1342:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1215
+	bne	.L1341
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1215:
+.L1341:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1214
-.L1224:
-	ldr	x1, [x5, #:lo12:.LANCHOR97]
+	b	.L1340
+.L1350:
+	ldr	x1, [x5, #:lo12:.LANCHOR100]
 	sxtw	x21, w19
 	add	x0, x21, 208
-	ldrb	w2, [x23, #:lo12:.LANCHOR95]
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	ldrh	w3, [x1, x0, lsl 1]
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1219
-	ldrb	w0, [x24, #:lo12:.LANCHOR72]
-	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	bne	.L1345
+	ldrb	w0, [x24, #:lo12:.LANCHOR76]
+	ldrh	w2, [x25, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1219:
+.L1345:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1220
-	cbnz	w0, .L1225
-.L1222:
+	bls	.L1346
+	cbnz	w0, .L1351
+.L1348:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1221
+	beq	.L1347
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1223
+	tbz	x0, 12, .L1349
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -7332,30 +8003,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1223:
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+.L1349:
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR97]
+	ldr	x0, [x5, #:lo12:.LANCHOR100]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1221
-.L1220:
-	cbz	w0, .L1222
-.L1221:
+	b	.L1347
+.L1346:
+	cbz	w0, .L1348
+.L1347:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1218
-.L1225:
+	b	.L1344
+.L1351:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1221
+	b	.L1347
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -7387,24 +8058,24 @@ ftl_memcpy:
 	.type	flash_into_data_init, %function
 flash_into_data_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1234
-	adrp	x2, .LANCHOR136
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR136
+	tbz	x0, 12, .L1360
+	adrp	x2, .LANCHOR142
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR142
 	mov	w1, 100
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L1234:
-	adrp	x19, .LANCHOR20
+.L1360:
+	adrp	x19, .LANCHOR22
 	mov	w2, 2048
 	mov	w1, 0
-	ldr	x0, [x19, #:lo12:.LANCHOR20]
+	ldr	x0, [x19, #:lo12:.LANCHOR22]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR20]
+	ldr	x0, [x19, #:lo12:.LANCHOR22]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -7414,15 +8085,15 @@ flash_into_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR13
-	add	x1, x1, :lo12:.LANCHOR13
+	adrp	x1, .LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR15
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR20]
+	ldr	x0, [x19, #:lo12:.LANCHOR22]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR32
+	adrp	x1, .LANCHOR34
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR34
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_into_data_init, .-flash_into_data_init
@@ -7432,15 +8103,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1240:
+.L1366:
 	cmp	w2, w3
-	bhi	.L1241
+	bhi	.L1367
 	ret
-.L1241:
+.L1367:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1240
+	b	.L1366
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7476,47 +8147,47 @@ nandc_init:
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR7
+	adrp	x21, .LANCHOR9
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1246
-	adrp	x1, .LANCHOR137
-	adrp	x0, .LC74
+	tbz	x0, 12, .L1372
+	adrp	x1, .LANCHOR143
+	adrp	x0, .LC85
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR137
-	add	x0, x0, :lo12:.LC74
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L1246:
-	adrp	x20, .LANCHOR22
+.L1372:
+	adrp	x20, .LANCHOR24
 	mov	w0, 6
 	ldr	w2, [x19, 352]
 	mov	w1, 12336
-	strb	w0, [x20, #:lo12:.LANCHOR22]
-	adrp	x0, .LANCHOR21
+	strb	w0, [x20, #:lo12:.LANCHOR24]
+	adrp	x0, .LANCHOR23
 	movk	w1, 0x5638, lsl 16
 	mov	x22, x0
-	str	x19, [x0, #:lo12:.LANCHOR21]
+	str	x19, [x0, #:lo12:.LANCHOR23]
 	cmp	w2, w1
-	bne	.L1247
+	bne	.L1373
 	mov	w0, 8
-	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1247:
+	strb	w0, [x20, #:lo12:.LANCHOR24]
+.L1373:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1248
+	bne	.L1374
 	mov	w0, 9
-	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1248:
-	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	strb	w0, [x20, #:lo12:.LANCHOR24]
+.L1374:
+	ldrb	w0, [x20, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR41
-	bne	.L1249
+	adrp	x0, .LANCHOR43
+	bne	.L1375
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR41]
+	strb	w1, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
@@ -7534,38 +8205,38 @@ nandc_init:
 	str	w0, [x19, 84]
 	mov	w0, 39
 	str	w0, [x19, 84]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1251
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1377
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1264:
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+.L1390:
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
 	bl	printf
-.L1251:
-	adrp	x0, .LANCHOR42
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR42]
+.L1377:
 	adrp	x0, .LANCHOR44
-	strh	wzr, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR40
-	strb	wzr, [x0, #:lo12:.LANCHOR40]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1245
-	ldrb	w1, [x20, #:lo12:.LANCHOR22]
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR46
+	strh	wzr, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR42
+	strb	wzr, [x0, #:lo12:.LANCHOR42]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1371
+	ldrb	w1, [x20, #:lo12:.LANCHOR24]
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
 	bl	printf
-.L1245:
+.L1371:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1249:
-	strb	wzr, [x0, #:lo12:.LANCHOR41]
+.L1375:
+	strb	wzr, [x0, #:lo12:.LANCHOR43]
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
 	str	w0, [x29, 56]
@@ -7585,17 +8256,17 @@ nandc_init:
 	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR43
-	str	x0, [x1, #:lo12:.LANCHOR43]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1251
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	adrp	x1, .LANCHOR45
+	str	x0, [x1, #:lo12:.LANCHOR45]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1377
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1264
+	b	.L1390
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -7603,16 +8274,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR46
+	adrp	x0, .LANCHOR48
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR46
+	add	x19, x0, :lo12:.LANCHOR48
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR117
-	add	x22, x22, :lo12:.LANCHOR117
+	adrp	x22, .LANCHOR123
+	add	x22, x22, :lo12:.LANCHOR123
 	mov	w21, 0
-.L1266:
+.L1392:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -7630,15 +8301,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1266
-	add	x0, x20, :lo12:.LANCHOR46
+	bne	.L1392
+	add	x0, x20, :lo12:.LANCHOR48
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR47
-	strb	wzr, [x0, #:lo12:.LANCHOR47]
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
+	strb	wzr, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR48]
+	strb	w21, [x0, #:lo12:.LANCHOR50]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -7649,86 +8320,91 @@ buf_init:
 	.type	gc_init, %function
 gc_init:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR74
 	mov	w2, 328
 	mov	w1, 0
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR138
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR144
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR63
-	add	x19, x20, :lo12:.LANCHOR63
-	strb	wzr, [x0, #:lo12:.LANCHOR138]
+	adrp	x20, .LANCHOR65
+	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR145
+	add	x19, x20, :lo12:.LANCHOR65
+	str	wzr, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR85
+	strh	wzr, [x0, #:lo12:.LANCHOR85]
 	mov	x0, x19
 	bl	ftl_memset
-	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR63]
-	adrp	x0, .LANCHOR80
 	str	xzr, [x19, 8]
-	adrp	x4, .LANCHOR88
-	adrp	x20, .LANCHOR71
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR83
+	adrp	x4, .LANCHOR92
+	adrp	x20, .LANCHOR75
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
 	lsr	w2, w1, 1
 	lsr	w0, w1, 2
 	strh	w2, [x19, 38]
-	adrp	x2, .LANCHOR81
+	adrp	x2, .LANCHOR84
 	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR72
+	adrp	x19, .LANCHOR76
+	strh	wzr, [x2, #:lo12:.LANCHOR84]
+	adrp	x2, .LANCHOR80
+	ldrb	w3, [x19, #:lo12:.LANCHOR76]
+	strh	wzr, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR81
 	strh	wzr, [x2, #:lo12:.LANCHOR81]
-	adrp	x2, .LANCHOR77
-	ldrb	w3, [x19, #:lo12:.LANCHOR72]
-	strh	wzr, [x2, #:lo12:.LANCHOR77]
-	adrp	x2, .LANCHOR78
-	strh	wzr, [x2, #:lo12:.LANCHOR78]
 	mul	w2, w1, w3
 	and	w2, w2, 65535
 	sub	w5, w2, #32
-	strh	w5, [x4, #:lo12:.LANCHOR88]
-	adrp	x4, .LANCHOR85
-	strh	w2, [x4, #:lo12:.LANCHOR85]
-	adrp	x2, .LANCHOR79
-	strh	w1, [x2, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR62
-	strh	w0, [x1, #:lo12:.LANCHOR62]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	strh	w5, [x4, #:lo12:.LANCHOR92]
+	adrp	x4, .LANCHOR89
+	strh	w2, [x4, #:lo12:.LANCHOR89]
+	adrp	x2, .LANCHOR82
+	strh	w1, [x2, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR64
+	strh	w0, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR139
-	str	x0, [x1, #:lo12:.LANCHOR139]
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR146
+	str	x0, [x1, #:lo12:.LANCHOR146]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR140
-	str	x0, [x1, #:lo12:.LANCHOR140]
-	ldrh	w1, [x20, #:lo12:.LANCHOR71]
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR147]
+	ldrh	w1, [x20, #:lo12:.LANCHOR75]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR68
-	str	x0, [x1, #:lo12:.LANCHOR68]
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR72
+	str	x0, [x1, #:lo12:.LANCHOR72]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR64
-	str	x0, [x1, #:lo12:.LANCHOR64]
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR68
+	str	x0, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR76]
+	ldrh	w0, [x20, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR141
+	adrp	x1, .LANCHOR148
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR141]
-	adrp	x0, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR87
+	adrp	x1, .LANCHOR77
 	ldp	x29, x30, [sp], 32
-	ldrh	w1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR73
-	strh	w1, [x0, #:lo12:.LANCHOR73]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR77]
 	ret
 	.size	gc_init, .-gc_init
 	.section	.text.ftl_free,"ax",@progbits
@@ -7747,18 +8423,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1273:
+.L1399:
 	cmp	w1, w3
-	bhi	.L1274
+	bhi	.L1400
 	ret
-.L1274:
+.L1400:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1273
+	b	.L1399
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -7795,8 +8471,8 @@ ftl_get_density:
 	.global	ftl_get_capacity
 	.type	ftl_get_capacity, %function
 ftl_get_capacity:
-	adrp	x0, .LANCHOR59
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR61
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
 	ret
 	.size	ftl_get_capacity, .-ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7807,67 +8483,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC78
+	adrp	x21, .LC89
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC77
+	adrp	x23, .LC88
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC77
-	add	x21, x21, :lo12:.LC78
+	add	x23, x23, :lo12:.LC88
+	add	x21, x21, :lo12:.LC89
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC79
-.L1281:
+	adrp	x27, .LC90
+.L1407:
 	cmp	x25, x19
-	bne	.L1287
+	bne	.L1413
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC79
+	adrp	x1, .LC90
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC79
+	add	x1, x1, :lo12:.LC90
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC80
+	adrp	x0, .LC91
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC80
+	add	x0, x0, :lo12:.LC91
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1287:
-	cbnz	w20, .L1282
+.L1413:
+	cbnz	w20, .L1408
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1282:
+.L1408:
 	cmp	w24, 4
-	bne	.L1283
+	bne	.L1409
 	ldr	w1, [x22, x19, lsl 2]
-.L1289:
+.L1415:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1286
+	bls	.L1412
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC79
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	add	x1, x27, :lo12:.LC90
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1286:
+.L1412:
 	add	x19, x19, 1
-	b	.L1281
-.L1283:
+	b	.L1407
+.L1409:
 	cmp	w24, 2
-	bne	.L1285
+	bne	.L1411
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1289
-.L1285:
+	b	.L1415
+.L1411:
 	ldrb	w1, [x22, x19]
-	b	.L1289
+	b	.L1415
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -7881,9 +8557,9 @@ hynix_get_read_retry_default:
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR22
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR20]
+	ldr	x28, [x0, #:lo12:.LANCHOR22]
 	stp	x23, x24, [sp, 48]
 	add	x0, x28, 112
 	str	x0, [x29, 112]
@@ -7899,43 +8575,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1291
+	bne	.L1417
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR142+17
+	adrp	x0, .LANCHOR149+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR142+17]
-.L1346:
+	strb	w1, [x0, #:lo12:.LANCHOR149+17]
+.L1472:
 	mov	w0, 7
-	b	.L1381
-.L1291:
+	b	.L1507
+.L1417:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1293
+	bne	.L1419
 	mov	x6, 0
-.L1294:
+.L1420:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1294
+	bne	.L1420
 	stp	w6, w6, [x29, 132]
-.L1292:
+.L1418:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1299
-	adrp	x7, .LANCHOR12
-	adrp	x11, .LANCHOR24
-	add	x24, x7, :lo12:.LANCHOR12
-	add	x25, x11, :lo12:.LANCHOR24
+	bhi	.L1425
+	adrp	x7, .LANCHOR14
+	adrp	x11, .LANCHOR26
+	add	x24, x7, :lo12:.LANCHOR14
+	add	x25, x11, :lo12:.LANCHOR26
 	mov	w20, 0
 	mov	w26, 55
-.L1300:
+.L1426:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1306
-.L1307:
+	bhi	.L1432
+.L1433:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -7948,10 +8624,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1293:
+.L1419:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1295
+	bne	.L1421
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -7967,13 +8643,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1382:
+.L1508:
 	str	w0, [x29, 136]
-	b	.L1292
-.L1295:
+	b	.L1418
+.L1421:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1296
+	bne	.L1422
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -7983,14 +8659,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1381:
+.L1507:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1382
-.L1296:
+	b	.L1508
+.L1422:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1297
+	bne	.L1423
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -8000,18 +8676,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1381
-.L1297:
+	b	.L1507
+.L1423:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1346
+	bne	.L1472
 	mov	x0, 0
-.L1298:
+.L1424:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1298
+	bne	.L1424
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -8019,8 +8695,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1382
-.L1306:
+	b	.L1508
+.L1432:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -8029,10 +8705,10 @@ hynix_get_read_retry_default:
 	ldr	x1, [x29, 112]
 	ubfiz	x0, x0, 8, 8
 	add	x19, x1, x2
-	adrp	x1, .LANCHOR21
-	ldr	x4, [x1, #:lo12:.LANCHOR21]
+	adrp	x1, .LANCHOR23
+	ldr	x4, [x1, #:lo12:.LANCHOR23]
 	add	x23, x4, x0
-.L1301:
+.L1427:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -8043,15 +8719,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1301
-	adrp	x3, .LANCHOR142
-	add	x3, x3, :lo12:.LANCHOR142
+	bhi	.L1427
+	adrp	x3, .LANCHOR149
+	add	x3, x3, :lo12:.LANCHOR149
 	mov	x0, 0
-.L1304:
+.L1430:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1303:
+.L1429:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8060,10 +8736,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1303
+	bne	.L1429
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1304
+	bne	.L1430
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8073,15 +8749,15 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1300
-.L1299:
+	b	.L1426
+.L1425:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1307
+	bhi	.L1433
 	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR12
-	add	x19, x19, :lo12:.LANCHOR12
+	adrp	x19, .LANCHOR14
+	add	x19, x19, :lo12:.LANCHOR14
 	sub	w13, w1, #1
 	mul	w15, w0, w1
 	and	x13, x13, 255
@@ -8096,14 +8772,14 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1308:
+.L1434:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1307
+	bls	.L1433
 	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	mov	w10, 160
 	mov	w23, 255
 	ldrb	w4, [x0, w1, sxtw]
@@ -8113,8 +8789,8 @@ hynix_get_read_retry_default:
 	ubfiz	x4, x4, 8, 8
 	add	x0, x0, x10
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR21
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
 	add	x27, x0, x4
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
@@ -8122,22 +8798,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1309
+	bne	.L1435
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1383:
+.L1509:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1384
-.L1309:
+	b	.L1510
+.L1435:
 	cmp	w20, 1
-	bhi	.L1311
+	bhi	.L1437
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1384:
+.L1510:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8152,10 +8828,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1312
+	bne	.L1438
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1313:
+.L1439:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8163,192 +8839,192 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1347
+	bls	.L1473
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1314:
-	adrp	x3, .LANCHOR143
+.L1440:
+	adrp	x3, .LANCHOR150
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR143]
-.L1315:
+	ldr	x0, [x3, #:lo12:.LANCHOR150]
+.L1441:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1315
+	bhi	.L1441
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1316
+	bne	.L1442
 	mov	w1, 0
-.L1318:
+.L1444:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1317
+	beq	.L1443
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1317
+	beq	.L1443
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1318
-.L1319:
-	adrp	x0, .LC81
+	bne	.L1444
+.L1445:
+	adrp	x0, .LC92
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1321:
-	b	.L1321
-.L1311:
+.L1447:
+	b	.L1447
+.L1437:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1383
-.L1312:
+	b	.L1509
+.L1438:
 	str	wzr, [x27, 2052]
-	b	.L1313
-.L1347:
+	b	.L1439
+.L1473:
 	mov	w23, 16
-	b	.L1314
-.L1317:
+	b	.L1440
+.L1443:
 	cmp	w1, 6
-	bhi	.L1319
-.L1320:
-	ldr	x2, [x3, #:lo12:.LANCHOR143]
+	bhi	.L1445
+.L1446:
+	ldr	x2, [x3, #:lo12:.LANCHOR150]
 	mov	x0, 0
-.L1325:
+.L1451:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1326
-	ldr	x1, [x3, #:lo12:.LANCHOR143]
+	bgt	.L1452
+	ldr	x1, [x3, #:lo12:.LANCHOR150]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1328:
+.L1454:
 	mov	x0, 0
-.L1327:
+.L1453:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1327
+	bgt	.L1453
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1328
+	bne	.L1454
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1329:
+.L1455:
 	mov	w3, 0
 	mov	w0, 0
-.L1333:
+.L1459:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1331:
+.L1457:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1331
+	bne	.L1457
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1333
+	bne	.L1459
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1329
+	bgt	.L1455
 	mov	x0, 0
 	mov	w3, 0
-.L1336:
+.L1462:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1336
+	bne	.L1462
 	cmp	w3, 7
-	ble	.L1337
+	ble	.L1463
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
 	bl	rknand_print_hex
-	adrp	x0, .LC81
+	adrp	x0, .LC92
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1338:
-	b	.L1338
-.L1316:
+.L1464:
+	b	.L1464
+.L1442:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1320
+	bne	.L1446
 	mov	x1, 0
-.L1322:
+.L1448:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1320
+	beq	.L1446
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1320
+	beq	.L1446
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1322
-	adrp	x0, .LC81
+	bne	.L1448
+	adrp	x0, .LC92
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC92
 	bl	printf
-.L1324:
-	b	.L1324
-.L1326:
+.L1450:
+	b	.L1450
+.L1452:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1325
-.L1337:
+	b	.L1451
+.L1463:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1349
+	beq	.L1475
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1339:
+.L1465:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1340:
+.L1466:
 	mov	x1, 0
-.L1341:
+.L1467:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1341
+	bhi	.L1467
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1340
+	bgt	.L1466
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1343
+	bhi	.L1469
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -8363,34 +9039,34 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1385:
+.L1511:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1308
-.L1349:
+	b	.L1434
+.L1475:
 	mov	x0, 4
-	b	.L1339
-.L1343:
+	b	.L1465
+.L1469:
 	mov	w0, 56
-	b	.L1385
+	b	.L1511
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR32+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
+	adrp	x0, .LANCHOR34+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR34+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1386
+	bhi	.L1512
 	b	hynix_get_read_retry_default
-.L1386:
+.L1512:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -8399,81 +9075,81 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR144
-	adrp	x1, .LANCHOR22
+	adrp	x0, .LANCHOR151
+	adrp	x1, .LANCHOR24
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR21
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	adrp	x19, .LANCHOR23
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR144]
-	bne	.L1389
-	ldr	x20, [x19, #:lo12:.LANCHOR21]
+	strb	wzr, [x0, #:lo12:.LANCHOR151]
+	bne	.L1515
+	ldr	x20, [x19, #:lo12:.LANCHOR23]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1390
-	adrp	x22, .LC86
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC86
-	add	x23, x23, :lo12:.LC85
-.L1391:
+	tbnz	x0, 1, .L1516
+	adrp	x22, .LC97
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC96
+.L1517:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	tbnz	x0, 20, .L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1391
+	bne	.L1517
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1391
-.L1390:
-	adrp	x22, .LC84
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC84
-	add	x23, x23, :lo12:.LC85
-.L1392:
+	b	.L1517
+.L1516:
+	adrp	x22, .LC95
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC95
+	add	x23, x23, :lo12:.LC96
+.L1518:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	bge	.L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1393
+	tbz	x0, 13, .L1519
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1393
+	tbz	x0, 17, .L1519
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	ubfx	x1, x1, 17, 1
-.L1426:
+.L1552:
 	bl	printf
-	b	.L1394
-.L1393:
+	b	.L1520
+.L1519:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1392
+	bne	.L1518
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8481,82 +9157,82 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	x0, x23
 	mov	w3, 64
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1392
+	tbz	x0, 13, .L1518
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR144]
-.L1394:
-	adrp	x0, .LANCHOR43+32
+	strb	w0, [x24, #:lo12:.LANCHOR151]
+.L1520:
+	adrp	x0, .LANCHOR45+32
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR43+32]
+	str	wzr, [x0, #:lo12:.LANCHOR45+32]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1389:
-	ldr	x20, [x19, #:lo12:.LANCHOR21]
+.L1515:
+	ldr	x20, [x19, #:lo12:.LANCHOR23]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1400
-	adrp	x22, .LC86
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC86
-	add	x23, x23, :lo12:.LC85
-.L1401:
+	tbnz	x0, 1, .L1526
+	adrp	x22, .LC97
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC97
+	add	x23, x23, :lo12:.LC96
+.L1527:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	tbnz	x0, 20, .L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1401
+	bne	.L1527
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1401
-.L1400:
-	adrp	x22, .LC84
-	adrp	x23, .LC85
-	add	x22, x22, :lo12:.LC84
-	add	x23, x23, :lo12:.LC85
-.L1402:
+	b	.L1527
+.L1526:
+	adrp	x22, .LC95
+	adrp	x23, .LC96
+	add	x22, x22, :lo12:.LC95
+	add	x23, x23, :lo12:.LC96
+.L1528:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1394
-	ldr	x0, [x19, #:lo12:.LANCHOR21]
+	bge	.L1520
+	ldr	x0, [x19, #:lo12:.LANCHOR23]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1403
+	tbz	x0, 13, .L1529
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1403
-	adrp	x0, .LC87
+	tbz	x0, 17, .L1529
+	adrp	x0, .LC98
 	ldr	w1, [x29, 72]
-	add	x0, x0, :lo12:.LC87
-	b	.L1426
-.L1403:
+	add	x0, x0, :lo12:.LC98
+	b	.L1552
+.L1529:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1402
+	bne	.L1528
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8564,12 +9240,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	ldr	x1, [x19, #:lo12:.LANCHOR23]
 	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1402
+	b	.L1528
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -8590,20 +9266,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1446
-	adrp	x0, .LANCHOR22
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	cbnz	w22, .L1572
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	bne	.L1429
-	adrp	x22, .LANCHOR21
+	bne	.L1555
+	adrp	x22, .LANCHOR23
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
-	ldr	x5, [x22, #:lo12:.LANCHOR21]
+	ldr	x5, [x22, #:lo12:.LANCHOR23]
 	mov	w0, 0
-.L1430:
+.L1556:
 	cmp	w2, w19
-	bcc	.L1434
+	bcc	.L1560
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -8612,35 +9288,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1436
+	bne	.L1562
 	mov	w1, w19
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1436:
-	tbz	x19, 13, .L1437
-	adrp	x1, .LANCHOR144
-	ldrb	w1, [x1, #:lo12:.LANCHOR144]
-	cbz	w1, .L1437
+.L1562:
+	tbz	x19, 13, .L1563
+	adrp	x1, .LANCHOR151
+	ldrb	w1, [x1, #:lo12:.LANCHOR151]
+	cbz	w1, .L1563
 	mov	w1, w19
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1465:
+.L1591:
 	mov	w0, -1
-.L1428:
+.L1554:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1434:
+.L1560:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -8651,70 +9327,70 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1448
+	tbnz	x1, 2, .L1574
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1448
+	tbnz	x1, 18, .L1574
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1432
+	ble	.L1558
 	ubfx	x1, x1, 3, 7
-.L1433:
+.L1559:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1431:
+.L1557:
 	add	w2, w2, 1
-	b	.L1430
-.L1432:
+	b	.L1556
+.L1558:
 	ubfx	x1, x1, 19, 7
-	b	.L1433
-.L1448:
+	b	.L1559
+.L1574:
 	mov	w0, -1
-	b	.L1431
-.L1429:
-	adrp	x0, .LANCHOR40
+	b	.L1557
+.L1555:
+	adrp	x0, .LANCHOR42
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	mov	w2, 0
-	adrp	x6, .LANCHOR43
+	adrp	x6, .LANCHOR45
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1439:
+.L1565:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1440
-	adrp	x22, .LANCHOR21
+	bcc	.L1566
+	adrp	x22, .LANCHOR23
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR21]
-.L1441:
+	ldr	x4, [x22, #:lo12:.LANCHOR23]
+.L1567:
 	cmp	w3, w19
-	bcc	.L1445
+	bcc	.L1571
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1437
+	bne	.L1563
 	mov	w1, w19
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	x0, [x22, #:lo12:.LANCHOR23]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1465
-.L1440:
-	ldr	x7, [x6, #:lo12:.LANCHOR43]
+	b	.L1591
+.L1566:
+	ldr	x7, [x6, #:lo12:.LANCHOR45]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
@@ -8730,16 +9406,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1439
-.L1445:
+	b	.L1565
+.L1571:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1451
+	tbnz	x1, 2, .L1577
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1451
+	tbnz	x1, 15, .L1577
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -8752,42 +9428,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1443
+	bls	.L1569
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1464:
+.L1590:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1442:
+.L1568:
 	add	w3, w3, 1
-	b	.L1441
-.L1443:
+	b	.L1567
+.L1569:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1464
-.L1451:
+	b	.L1590
+.L1577:
 	mov	w0, -1
-	b	.L1442
-.L1437:
+	b	.L1568
+.L1563:
 	cmn	w0, #1
-	beq	.L1428
+	beq	.L1554
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1428
+	bne	.L1554
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1428
+	bne	.L1554
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1428
-.L1446:
+	b	.L1554
+.L1572:
 	mov	w0, 0
-	b	.L1428
+	b	.L1554
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -8798,35 +9474,35 @@ flash_read_page:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w22, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR21]
-	adrp	x0, .LANCHOR7
+	ldr	x19, [x0, #:lo12:.LANCHOR23]
+	adrp	x0, .LANCHOR9
 	stp	x25, x26, [sp, 64]
 	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	x25, x2
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1467
+	tbz	x0, 4, .L1593
 	mov	w3, w1
-	adrp	x0, .LC91
+	adrp	x0, .LC102
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC91
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L1467:
+.L1593:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR9
-	cbnz	w23, .L1468
+	adrp	x6, .LANCHOR11
+	cbnz	w23, .L1594
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1469:
+.L1595:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -8840,15 +9516,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR9]
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1471
-	cbz	w23, .L1471
+	bne	.L1597
+	cbz	w23, .L1597
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1480:
+.L1606:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -8873,23 +9549,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1468:
-	ldr	x0, [x6, #:lo12:.LANCHOR9]
+.L1594:
+	ldr	x0, [x6, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1470
+	bne	.L1596
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1469
-.L1470:
+	b	.L1595
+.L1596:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1469
-.L1471:
+	b	.L1595
+.L1597:
 	mov	w0, w20
-	b	.L1480
+	b	.L1606
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -8900,7 +9576,7 @@ micron_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w24, w0, 255
-	adrp	x0, .LANCHOR40
+	adrp	x0, .LANCHOR42
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	mov	w22, w1
@@ -8908,31 +9584,31 @@ micron_read_retrial:
 	mov	x25, x2
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
-	ldrb	w20, [x0, #:lo12:.LANCHOR40]
+	ldrb	w20, [x0, #:lo12:.LANCHOR42]
 	and	x19, x24, 255
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR21
+	adrp	x0, .LANCHOR23
 	mov	w21, 0
 	add	w20, w20, w20, lsl 1
 	mov	w28, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	ldr	x0, [x0, #:lo12:.LANCHOR23]
 	asr	w20, w20, 2
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR146
-	add	x0, x0, :lo12:.LANCHOR146
+	adrp	x0, .LANCHOR153
+	add	x0, x0, :lo12:.LANCHOR153
 	str	x0, [x29, 104]
 	ldr	x0, [x29, 120]
 	add	x23, x0, x19, lsl 8
-	adrp	x0, .LANCHOR7
-	add	x0, x0, :lo12:.LANCHOR7
+	adrp	x0, .LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR9
 	str	x0, [x29, 96]
-.L1482:
+.L1608:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1487
-.L1486:
+	bcc	.L1613
+.L1612:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -8946,22 +9622,22 @@ micron_read_retrial:
 	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1488
+	bcc	.L1614
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1488:
+.L1614:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1481
-	adrp	x0, .LC93
+	bne	.L1607
+	adrp	x0, .LC104
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC93
+	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1481:
+.L1607:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8970,7 +9646,7 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1487:
+.L1613:
 	mov	w0, 239
 	str	w0, [x23, 2056]
 	mov	w0, 137
@@ -8991,33 +9667,33 @@ micron_read_retrial:
 	mov	w7, w0
 	ldr	x0, [x29, 96]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1483
+	tbz	x0, 12, .L1609
 	str	w7, [x29, 112]
 	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
 	bl	printf
 	ldr	w7, [x29, 112]
-.L1483:
+.L1609:
 	cmn	w7, #1
-	beq	.L1484
-	adrp	x0, .LANCHOR143
+	beq	.L1610
+	adrp	x0, .LANCHOR150
 	cmn	w28, #1
 	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x25, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x26, [x0, #:lo12:.LANCHOR145]
-	bcc	.L1490
-.L1484:
+	ldr	x25, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x26, [x0, #:lo12:.LANCHOR152]
+	bcc	.L1616
+.L1610:
 	mov	w21, w27
-	b	.L1482
-.L1490:
+	b	.L1608
+.L1616:
 	mov	w28, w7
-	b	.L1486
+	b	.L1612
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -9038,15 +9714,15 @@ toshiba_3d_read_retrial:
 	mov	x27, x3
 	mov	x26, x2
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR21
-	adrp	x22, .LANCHOR17
+	adrp	x0, .LANCHOR23
+	adrp	x22, .LANCHOR19
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x25, [x0, #:lo12:.LANCHOR21]
+	ldr	x25, [x0, #:lo12:.LANCHOR23]
 	and	x0, x24, 255
 	add	x21, x0, 8
 	str	x0, [x29, 128]
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	mov	w19, -1
 	add	x21, x25, x21, lsl 8
 	mov	w20, 1
@@ -9057,18 +9733,18 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 136]
-	add	x0, x22, :lo12:.LANCHOR17
-	cbnz	w4, .L1505
+	add	x0, x22, :lo12:.LANCHOR19
+	cbnz	w4, .L1631
 	str	x0, [x29, 120]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 112]
-.L1512:
+.L1638:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1506
+	bne	.L1632
 	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
@@ -9076,7 +9752,7 @@ toshiba_3d_read_retrial:
 	ldr	x1, [x29, 112]
 	mov	w0, 93
 	str	w0, [x1, 8]
-.L1507:
+.L1633:
 	mov	w4, w28
 	mov	x3, x27
 	mov	x2, x26
@@ -9084,62 +9760,62 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1508
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L1634
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1508:
+.L1634:
 	cmn	w4, #1
-	beq	.L1509
-	adrp	x0, .LANCHOR143
+	beq	.L1635
+	adrp	x0, .LANCHOR150
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x27, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldr	x26, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x27, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1527
-.L1509:
+	bcc	.L1653
+.L1635:
 	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1512
-.L1511:
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+	bne	.L1638
+.L1637:
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	cmp	w0, 36
-	bne	.L1513
+	bne	.L1639
 	mov	w2, 0
-.L1550:
+.L1676:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1514
-.L1506:
+	b	.L1640
+.L1632:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1507
-.L1527:
+	b	.L1633
+.L1653:
 	mov	w19, w4
-	b	.L1511
-.L1513:
+	b	.L1637
+.L1639:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1514:
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+.L1640:
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	cmp	w0, 36
-	bne	.L1523
+	bne	.L1649
 	ldr	x0, [x29, 128]
 	add	x25, x25, x0, lsl 8
 	mov	w0, 85
@@ -9148,27 +9824,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x25, 2052]
 	str	wzr, [x25, 2048]
 	str	w0, [x25, 2056]
-.L1523:
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+.L1649:
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1524
+	bcc	.L1650
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1524:
+.L1650:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1525
-	adrp	x0, .LC96
+	bne	.L1651
+	adrp	x0, .LC107
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC96
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1525:
+.L1651:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9178,23 +9854,23 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1505:
+.L1631:
 	str	x0, [x29, 112]
 	sxtw	x0, w24
 	add	x0, x0, 8
 	add	x0, x25, x0, lsl 8
 	str	x0, [x29, 136]
-.L1521:
+.L1647:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1515
+	bne	.L1641
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1549:
+.L1675:
 	ldr	x1, [x29, 136]
 	mov	w4, w28
 	mov	x3, x27
@@ -9204,56 +9880,56 @@ toshiba_3d_read_retrial:
 	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1517
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L1643
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1517:
+.L1643:
 	cmn	w4, #1
-	beq	.L1518
-	adrp	x0, .LANCHOR143
+	beq	.L1644
+	adrp	x0, .LANCHOR150
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x26, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x27, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldr	x26, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x27, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1528
-.L1518:
+	bcc	.L1654
+.L1644:
 	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1521
-.L1520:
-	ldrb	w0, [x22, #:lo12:.LANCHOR17]
+	bne	.L1647
+.L1646:
+	ldrb	w0, [x22, #:lo12:.LANCHOR19]
 	cmp	w0, 36
-	bne	.L1522
+	bne	.L1648
 	mov	w2, 1
-	b	.L1550
-.L1515:
+	b	.L1676
+.L1641:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1549
-.L1528:
+	b	.L1675
+.L1654:
 	mov	w19, w4
-	b	.L1520
-.L1522:
+	b	.L1646
+.L1648:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1514
+	b	.L1640
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -9273,87 +9949,87 @@ toshiba_read_retrial:
 	mov	x27, x3
 	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR21
-	adrp	x1, .LANCHOR17
+	adrp	x0, .LANCHOR23
+	adrp	x1, .LANCHOR19
 	str	x1, [x29, 120]
-	ldr	x22, [x0, #:lo12:.LANCHOR21]
+	ldr	x22, [x0, #:lo12:.LANCHOR23]
 	and	x0, x19, 255
 	add	x21, x0, 8
 	str	x0, [x29, 104]
-	ldrb	w0, [x1, #:lo12:.LANCHOR17]
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
 	add	x21, x22, x21, lsl 8
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1569
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1570
+	bls	.L1695
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1696
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1553:
+.L1679:
 	and	x0, x19, 255
 	mov	w1, 92
 	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1552:
+.L1678:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 96]
-.L1554:
-	adrp	x0, .LANCHOR146
-	ldrb	w0, [x0, #:lo12:.LANCHOR146]
+.L1680:
+	adrp	x0, .LANCHOR153
+	ldrb	w0, [x0, #:lo12:.LANCHOR153]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1563
+	bcc	.L1689
 	mov	w28, w24
-.L1562:
+.L1688:
 	ldr	x0, [x29, 120]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1564
+	bhi	.L1690
 	bl	sandisk_set_rr_para
-.L1565:
+.L1691:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1566
+	bcc	.L1692
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L1566:
+.L1692:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
-	bne	.L1567
-	adrp	x0, .LC96
+	bne	.L1693
+	adrp	x0, .LC107
 	mov	w4, w28
 	mov	w3, w20
 	mov	w2, w25
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC96
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1567:
+.L1693:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1551
+	cbz	w23, .L1677
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1551:
+.L1677:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9362,36 +10038,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1570:
+.L1696:
 	mov	w23, 0
-	b	.L1553
-.L1569:
+	b	.L1679
+.L1695:
 	mov	w23, 0
-	b	.L1552
-.L1563:
+	b	.L1678
+.L1689:
 	ldr	x0, [x29, 120]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1555
+	bhi	.L1681
 	bl	sandisk_set_rr_para
-.L1556:
+.L1682:
 	ldr	x0, [x29, 120]
-	ldrb	w0, [x0, #:lo12:.LANCHOR17]
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
 	cmp	w0, 34
-	bne	.L1557
-	adrp	x0, .LANCHOR146
-	ldrb	w0, [x0, #:lo12:.LANCHOR146]
+	bne	.L1683
+	adrp	x0, .LANCHOR153
+	ldrb	w0, [x0, #:lo12:.LANCHOR153]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1557
+	bne	.L1683
 	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1557:
+.L1683:
 	ldr	x0, [x29, 104]
 	mov	w1, 38
 	ldr	w4, [x29, 116]
@@ -9406,27 +10082,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1560
+	beq	.L1686
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR143
-	ldr	x26, [x0, #:lo12:.LANCHOR143]
-	adrp	x0, .LANCHOR145
-	ldr	x27, [x0, #:lo12:.LANCHOR145]
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR150
+	ldr	x26, [x0, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR152
+	ldr	x27, [x0, #:lo12:.LANCHOR152]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L1562
-.L1560:
+	bcc	.L1688
+.L1686:
 	add	w20, w20, 1
-	b	.L1554
-.L1555:
+	b	.L1680
+.L1681:
 	bl	toshiba_set_rr_para
-	b	.L1556
-.L1564:
+	b	.L1682
+.L1690:
 	bl	toshiba_set_rr_para
-	b	.L1565
+	b	.L1691
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -9437,11 +10113,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR22
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w4
-	ldr	x28, [x0, #:lo12:.LANCHOR20]
+	ldr	x28, [x0, #:lo12:.LANCHOR22]
 	mov	w22, w1
 	stp	x25, x26, [sp, 64]
 	mov	x25, x2
@@ -9454,37 +10130,37 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR40
-	add	x6, x6, :lo12:.LANCHOR40
+	adrp	x6, .LANCHOR42
+	add	x6, x6, :lo12:.LANCHOR42
 	mov	w5, 0
-	adrp	x7, .LANCHOR143
-	adrp	x8, .LANCHOR145
-.L1584:
+	adrp	x7, .LANCHOR150
+	adrp	x8, .LANCHOR152
+.L1710:
 	cmp	w5, w24
-	bcc	.L1589
-.L1588:
-	adrp	x0, .LANCHOR40
+	bcc	.L1715
+.L1714:
+	adrp	x0, .LANCHOR42
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1590
+	bcc	.L1716
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1590:
+.L1716:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1583
-	adrp	x0, .LC97
+	bne	.L1709
+	adrp	x0, .LC108
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC97
+	add	x0, x0, :lo12:.LC108
 	bl	printf
-.L1583:
+.L1709:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9493,7 +10169,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1589:
+.L1715:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -9514,42 +10190,42 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1586
+	beq	.L1712
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR143]
-	ldr	x26, [x8, #:lo12:.LANCHOR145]
+	ldr	x25, [x7, #:lo12:.LANCHOR150]
+	ldr	x26, [x8, #:lo12:.LANCHOR152]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1592
-.L1586:
+	bcc	.L1718
+.L1712:
 	add	w5, w5, 1
-	b	.L1584
-.L1592:
+	b	.L1710
+.L1718:
 	mov	w19, w0
-	b	.L1588
+	b	.L1714
 	.size	hynix_read_retrial, .-hynix_read_retrial
-	.section	.text.flash_ddr_tunning_read,"ax",@progbits
+	.section	.text.flash_ddr_tuning_read,"ax",@progbits
 	.align	2
-	.global	flash_ddr_tunning_read
-	.type	flash_ddr_tunning_read, %function
-flash_ddr_tunning_read:
+	.global	flash_ddr_tuning_read
+	.type	flash_ddr_tuning_read, %function
+flash_ddr_tuning_read:
 	stp	x29, x30, [sp, -144]!
 	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC98
+	adrp	x21, .LC109
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR40
+	adrp	x22, .LANCHOR42
 	stp	x25, x26, [sp, 64]
-	add	x21, x21, :lo12:.LC98
+	add	x21, x21, :lo12:.LC109
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
 	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR40
+	add	x22, x22, :lo12:.LANCHOR42
 	str	x2, [x29, 128]
 	mov	w28, 0
 	str	w0, [x29, 136]
@@ -9557,14 +10233,14 @@ flash_ddr_tunning_read:
 	mov	w23, 0
 	str	w0, [x29, 124]
 	mov	w24, 0
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	mov	w27, 1024
-	add	x0, x0, :lo12:.LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR9
 	mov	w25, 6
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1608:
+.L1734:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -9576,7 +10252,7 @@ flash_ddr_tunning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1603
+	tbz	x0, 4, .L1729
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -9584,51 +10260,51 @@ flash_ddr_tunning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1603:
+.L1729:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1604
-	adrp	x0, .LANCHOR143
-	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	bhi	.L1730
+	adrp	x0, .LANCHOR150
+	ldr	x0, [x0, #:lo12:.LANCHOR150]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR145
-	ldr	x26, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR152
+	ldr	x26, [x0, #:lo12:.LANCHOR152]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1613
+	bcs	.L1739
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1613
+	bls	.L1739
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1606:
+.L1732:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1607:
-	cbz	w28, .L1609
-	adrp	x0, .LANCHOR40
+.L1733:
+	cbz	w28, .L1735
+	adrp	x0, .LANCHOR42
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1609
+	bls	.L1735
 	mov	w1, w28
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
 	bl	printf
 	mov	w0, w28
-.L1623:
+.L1749:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1602
+	cbz	w19, .L1728
 	ldr	w1, [x29, 136]
-	adrp	x0, .LC100
+	adrp	x0, .LC111
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC100
+	add	x0, x0, :lo12:.LC111
 	mov	w27, w19
 	bl	printf
-.L1602:
+.L1728:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9637,30 +10313,30 @@ flash_ddr_tunning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1604:
+.L1730:
 	cmp	w24, w23
-	bls	.L1614
+	bls	.L1740
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1607
+	bhi	.L1733
 	mov	w23, w24
-.L1614:
+.L1740:
 	mov	w24, 0
-	b	.L1605
-.L1613:
+	b	.L1731
+.L1739:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1605:
+.L1731:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1608
-	b	.L1606
-.L1609:
+	bne	.L1734
+	b	.L1732
+.L1735:
 	ldrb	w0, [x29, 124]
-	b	.L1623
-	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	b	.L1749
+	.size	flash_ddr_tuning_read, .-flash_ddr_tuning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
 	.global	flash_read_page_en
@@ -9670,11 +10346,11 @@ flash_read_page_en:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x22, x2
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
@@ -9682,43 +10358,43 @@ flash_read_page_en:
 	mov	w24, w4
 	ubfx	x21, x19, 24, 2
 	cmp	w0, w20
-	bhi	.L1625
-	adrp	x1, .LANCHOR147
+	bhi	.L1751
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC0
 	mov	w2, 378
-	add	x1, x1, :lo12:.LANCHOR147
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1625:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L1751:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1626
-	adrp	x0, .LC101
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L1752
+	adrp	x0, .LC112
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC101
+	add	x0, x0, :lo12:.LC112
 	bl	printf
-.L1626:
-	cbnz	w21, .L1627
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1628
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1627
-.L1628:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+.L1752:
+	cbnz	w21, .L1753
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L1754
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L1753
+.L1754:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1629
+	cbz	w1, .L1755
 	add	w19, w0, w19, lsl 1
-.L1627:
+.L1753:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9727,26 +10403,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1624
-	adrp	x25, .LANCHOR42
+	bne	.L1750
+	adrp	x25, .LANCHOR44
 	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR42]
-	cbnz	w27, .L1631
-.L1634:
-	adrp	x0, .LANCHOR148
-	ldr	x5, [x0, #:lo12:.LANCHOR148]
-	cbnz	x5, .L1632
-.L1633:
-	ldrb	w4, [x26, #:lo12:.LANCHOR42]
+	ldrb	w27, [x25, #:lo12:.LANCHOR44]
+	cbnz	w27, .L1757
+.L1760:
+	adrp	x0, .LANCHOR155
+	ldr	x5, [x0, #:lo12:.LANCHOR155]
+	cbnz	x5, .L1758
+.L1759:
+	ldrb	w4, [x26, #:lo12:.LANCHOR44]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	printf
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1624
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbz	w0, .L1750
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9758,27 +10434,27 @@ flash_read_page_en:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
-	b	flash_ddr_tunning_read
-.L1629:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+	b	flash_ddr_tuning_read
+.L1755:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1627
-.L1631:
-	strb	wzr, [x25, #:lo12:.LANCHOR42]
+	b	.L1753
+.L1757:
+	strb	wzr, [x25, #:lo12:.LANCHOR44]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR42]
+	strb	w27, [x25, #:lo12:.LANCHOR44]
 	cmn	w0, #1
-	beq	.L1634
-.L1652:
+	beq	.L1760
+.L1778:
 	mov	w21, w0
-.L1624:
+.L1750:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -9787,7 +10463,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1632:
+.L1758:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9795,8 +10471,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x5
 	cmn	w0, #1
-	beq	.L1633
-	b	.L1652
+	beq	.L1759
+	b	.L1778
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -9807,15 +10483,15 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR128
+	adrp	x0, .LANCHOR134
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR128]
-	adrp	x0, .LANCHOR32+26
+	ldrh	w19, [x0, #:lo12:.LANCHOR134]
+	adrp	x0, .LANCHOR34+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
-	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
+	ldrh	w26, [x0, #:lo12:.LANCHOR34+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
 	stp	x27, x28, [sp, 80]
@@ -9826,23 +10502,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1654
+	bne	.L1780
 	mov	w27, 0
 	mov	w28, 2
-.L1655:
+.L1781:
 	cmp	w27, w19
-	ble	.L1658
-.L1654:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1659
+	ble	.L1784
+.L1780:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1785
 	ldr	w3, [x22]
-	adrp	x0, .LC103
+	adrp	x0, .LC114
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC103
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1659:
+.L1785:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9851,7 +10527,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1658:
+.L1784:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -9861,25 +10537,25 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1656
+	bne	.L1782
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1655
-.L1656:
+	b	.L1781
+.L1782:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1655
+	b	.L1781
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
 	.global	flash_get_last_written_page_ext
 	.type	flash_get_last_written_page_ext, %function
 flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR96
+	adrp	x4, .LANCHOR102
 	mov	w6, 21
 	and	w0, w0, 65535
 	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR96]
+	ldrh	w4, [x4, #:lo12:.LANCHOR102]
 	sub	w6, w6, w4
 	mov	w4, w3
 	mov	x3, x2
@@ -9896,55 +10572,55 @@ flash_get_last_written_page_ext:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR20
+	adrp	x20, .LANCHOR22
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1666
-	ldr	x4, [x20, #:lo12:.LANCHOR20]
-	adrp	x2, .LANCHOR149
-	adrp	x0, .LC104
+	tbz	x0, 12, .L1792
+	ldr	x4, [x20, #:lo12:.LANCHOR22]
+	adrp	x2, .LANCHOR156
+	adrp	x0, .LC115
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR149
+	add	x2, x2, :lo12:.LANCHOR156
 	mov	w1, 49
-	add	x0, x0, :lo12:.LC104
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1666:
-	adrp	x21, .LANCHOR150
-	adrp	x23, .LANCHOR26
+.L1792:
+	adrp	x21, .LANCHOR157
+	adrp	x23, .LANCHOR28
 	mov	w24, 21321
-	add	x26, x23, :lo12:.LANCHOR26
+	add	x26, x23, :lo12:.LANCHOR28
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1669:
+.L1795:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR150]
+	ldr	x3, [x21, #:lo12:.LANCHOR157]
 	mov	w0, 0
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
-	add	x27, x21, :lo12:.LANCHOR150
-	add	x25, x20, :lo12:.LANCHOR20
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
+	add	x27, x21, :lo12:.LANCHOR157
+	add	x25, x20, :lo12:.LANCHOR22
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1667
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	beq	.L1793
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1668
-.L1667:
+	beq	.L1794
+.L1793:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1669
-.L1693:
+	bne	.L1795
+.L1819:
 	mov	w0, -1
-.L1665:
+.L1791:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9952,102 +10628,102 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1677:
+.L1803:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1678
+	bne	.L1804
 	ldr	w19, [x0, 4]
-.L1671:
-	add	x24, x21, :lo12:.LANCHOR151
-	ldrh	w0, [x23, #:lo12:.LANCHOR26]
-	ldr	x3, [x22, #:lo12:.LANCHOR150]
+.L1797:
+	add	x24, x21, :lo12:.LANCHOR158
+	ldrh	w0, [x23, #:lo12:.LANCHOR28]
+	ldr	x3, [x22, #:lo12:.LANCHOR157]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	ldrb	w1, [x24, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1672
-	ldr	x0, [x20, #:lo12:.LANCHOR20]
+	beq	.L1798
+	ldr	x0, [x20, #:lo12:.LANCHOR22]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1672
+	bne	.L1798
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1672
+	bcs	.L1798
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR151]
+	strb	w1, [x21, #:lo12:.LANCHOR158]
 	strb	w0, [x24, 1]
-.L1672:
-	ldrb	w1, [x21, #:lo12:.LANCHOR151]
-	add	x24, x21, :lo12:.LANCHOR151
-	ldr	x3, [x22, #:lo12:.LANCHOR150]
+.L1798:
+	ldrb	w1, [x21, #:lo12:.LANCHOR158]
+	add	x24, x21, :lo12:.LANCHOR158
+	ldr	x3, [x22, #:lo12:.LANCHOR157]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR151]
+	ldrb	w21, [x21, #:lo12:.LANCHOR158]
 	strh	w0, [x24, 2]
-	ldrh	w0, [x23, #:lo12:.LANCHOR26]
+	ldrh	w0, [x23, #:lo12:.LANCHOR28]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1673:
-	tbz	w19, #31, .L1675
+.L1799:
+	tbz	w19, #31, .L1801
 	cmn	w19, #1
-	bne	.L1676
-	ldr	x0, [x20, #:lo12:.LANCHOR20]
+	bne	.L1802
+	ldr	x0, [x20, #:lo12:.LANCHOR22]
 	ldr	w1, [x0]
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
-	b	.L1693
-.L1675:
-	ldr	x3, [x22, #:lo12:.LANCHOR150]
+	b	.L1819
+.L1801:
+	ldr	x3, [x22, #:lo12:.LANCHOR157]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1674
-	ldr	x0, [x20, #:lo12:.LANCHOR20]
+	beq	.L1800
+	ldr	x0, [x20, #:lo12:.LANCHOR22]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1674
-.L1676:
+	bne	.L1800
+.L1802:
 	mov	w0, 0
-	b	.L1665
-.L1674:
+	b	.L1791
+.L1800:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1673
-.L1668:
-	adrp	x21, .LANCHOR151
-	add	x1, x21, :lo12:.LANCHOR151
+	b	.L1799
+.L1794:
+	adrp	x21, .LANCHOR158
+	add	x1, x21, :lo12:.LANCHOR158
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR151]
+	strb	w0, [x21, #:lo12:.LANCHOR158]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1677
-.L1678:
+	bne	.L1803
+.L1804:
 	mov	w19, 0
-	b	.L1671
+	b	.L1797
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10057,44 +10733,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR39
+	adrp	x20, .LANCHOR41
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR39]
-	adrp	x19, .LANCHOR14
+	ldrb	w0, [x20, #:lo12:.LANCHOR41]
+	adrp	x19, .LANCHOR16
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR14]
-	adrp	x24, .LANCHOR153
+	strb	w21, [x19, #:lo12:.LANCHOR16]
+	adrp	x24, .LANCHOR160
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR152
-	ldrb	w0, [x20, #:lo12:.LANCHOR39]
+	adrp	x25, .LANCHOR159
+	ldrb	w0, [x20, #:lo12:.LANCHOR41]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR152]
+	ldr	x3, [x25, #:lo12:.LANCHOR159]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR153]
+	ldr	x2, [x24, #:lo12:.LANCHOR160]
 	mov	w1, w23
 	mov	w0, w22
-	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR152]
+	bl	flash_ddr_tuning_read
+	ldr	x3, [x25, #:lo12:.LANCHOR159]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR153]
+	ldr	x2, [x24, #:lo12:.LANCHOR160]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1695
-	ldrb	w1, [x20, #:lo12:.LANCHOR39]
-	tbz	x1, 0, .L1695
+	bne	.L1821
+	ldrb	w1, [x20, #:lo12:.LANCHOR41]
+	tbz	x1, 0, .L1821
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR14]
-.L1696:
+	strb	wzr, [x19, #:lo12:.LANCHOR16]
+.L1822:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10102,10 +10778,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1695:
+.L1821:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR14]
-	b	.L1696
+	strb	w1, [x0, #:lo12:.LANCHOR16]
+	b	.L1822
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -10118,48 +10794,48 @@ flash_complete_page_read:
 	and	w19, w0, 2097151
 	stp	x23, x24, [sp, 48]
 	mov	w23, w0
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	ubfx	x20, x23, 21, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x24, x1
 	stp	x27, x28, [sp, 80]
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1702
-	adrp	x1, .LANCHOR154
+	bhi	.L1828
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
 	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR154
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1702:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L1828:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w20, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x4, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1703
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1704
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1703
-.L1704:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	cbnz	w21, .L1829
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L1830
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L1829
+.L1830:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1705
+	cbz	w1, .L1831
 	add	w19, w0, w19, lsl 1
-.L1703:
+.L1829:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -10174,18 +10850,18 @@ flash_complete_page_read:
 	str	w1, [x0, 2052]
 	mov	w1, 224
 	str	w1, [x0, 2056]
-	adrp	x0, .LANCHOR9
-	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR11
+	ldr	x0, [x0, #:lo12:.LANCHOR11]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1706
-	cbz	w21, .L1706
+	bne	.L1832
+	cbz	w21, .L1832
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1739:
-	adrp	x20, .LANCHOR32
-	add	x28, x20, :lo12:.LANCHOR32
+.L1865:
+	adrp	x20, .LANCHOR34
+	add	x28, x20, :lo12:.LANCHOR34
 	bl	nandc_set_seed
 	mov	x4, x25
 	mov	x3, x24
@@ -10194,36 +10870,36 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1708
-	adrp	x26, .LANCHOR42
-	ldrb	w27, [x26, #:lo12:.LANCHOR42]
-	cbz	w27, .L1709
+	bne	.L1834
+	adrp	x26, .LANCHOR44
+	ldrb	w27, [x26, #:lo12:.LANCHOR44]
+	cbz	w27, .L1835
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR42]
+	strb	wzr, [x26, #:lo12:.LANCHOR44]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR42]
-	cbnz	w21, .L1710
-.L1715:
-	adrp	x1, .LANCHOR11
-	ldrb	w1, [x1, #:lo12:.LANCHOR11]
-	cbz	w1, .L1710
-	adrp	x1, .LANCHOR40
-	ldrb	w1, [x1, #:lo12:.LANCHOR40]
+	strb	w27, [x26, #:lo12:.LANCHOR44]
+	cbnz	w21, .L1836
+.L1841:
+	adrp	x1, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR13]
+	cbz	w1, .L1836
+	adrp	x1, .LANCHOR42
+	ldrb	w1, [x1, #:lo12:.LANCHOR42]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1710
-	add	x20, x20, :lo12:.LANCHOR32
+	blt	.L1836
+	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1701:
+.L1827:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10231,38 +10907,38 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1705:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+.L1831:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1703
-.L1706:
+	b	.L1829
+.L1832:
 	mov	w0, w19
-	b	.L1739
-.L1710:
+	b	.L1865
+.L1836:
 	cmn	w0, #1
-	bne	.L1701
-.L1716:
-	adrp	x0, .LANCHOR148
-	ldr	x5, [x0, #:lo12:.LANCHOR148]
-	cbnz	x5, .L1712
-.L1714:
-	adrp	x0, .LANCHOR42
+	bne	.L1827
+.L1842:
+	adrp	x0, .LANCHOR155
+	ldr	x5, [x0, #:lo12:.LANCHOR155]
+	cbnz	x5, .L1838
+.L1840:
+	adrp	x0, .LANCHOR44
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR42]
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	ldrb	w4, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbnz	w0, .L1713
+	adrp	x0, .LANCHOR16
+	ldrb	w0, [x0, #:lo12:.LANCHOR16]
+	cbnz	w0, .L1839
 	mov	w0, -1
-	b	.L1701
-.L1712:
-	add	x0, x20, :lo12:.LANCHOR32
+	b	.L1827
+.L1838:
+	add	x0, x20, :lo12:.LANCHOR34
 	mov	x3, x25
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
@@ -10270,10 +10946,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x5
 	cmn	w0, #1
-	beq	.L1714
-	b	.L1701
-.L1713:
-	add	x20, x20, :lo12:.LANCHOR32
+	beq	.L1840
+	b	.L1827
+.L1839:
+	add	x20, x20, :lo12:.LANCHOR34
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -10285,68 +10961,68 @@ flash_complete_page_read:
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
-	b	flash_ddr_tunning_read
-.L1709:
-	cbz	w21, .L1715
-	b	.L1716
-.L1708:
-	cbnz	w21, .L1701
-	b	.L1715
+	b	flash_ddr_tuning_read
+.L1835:
+	cbz	w21, .L1841
+	b	.L1842
+.L1834:
+	cbnz	w21, .L1827
+	b	.L1841
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR120
+	adrp	x0, .LANCHOR126
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR126]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1741
-.L1759:
+	bne	.L1867
+.L1885:
 	mov	w21, 0
-	b	.L1740
-.L1741:
-	adrp	x19, .LANCHOR46
+	b	.L1866
+.L1867:
+	adrp	x19, .LANCHOR48
 	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR46
+	add	x1, x19, :lo12:.LANCHOR48
 	add	x1, x1, x22, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1759
-	adrp	x1, .L1744
-	add	x1, x1, :lo12:.L1744
+	bhi	.L1885
+	adrp	x1, .L1870
+	add	x1, x1, :lo12:.L1870
 	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1744
+	adr	x3, .Lrtx1870
 	add	x1, x3, w1, sxtb #2
 	br	x1
-.Lrtx1744:
+.Lrtx1870:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1744:
-	.byte	(.L1743 - .Lrtx1744) / 4
-	.byte	(.L1743 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1746 - .Lrtx1744) / 4
-	.byte	(.L1747 - .Lrtx1744) / 4
-	.byte	(.L1748 - .Lrtx1744) / 4
-	.byte	(.L1745 - .Lrtx1744) / 4
-	.byte	(.L1748 - .Lrtx1744) / 4
+.L1870:
+	.byte	(.L1869 - .Lrtx1870) / 4
+	.byte	(.L1869 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1872 - .Lrtx1870) / 4
+	.byte	(.L1873 - .Lrtx1870) / 4
+	.byte	(.L1874 - .Lrtx1870) / 4
+	.byte	(.L1871 - .Lrtx1870) / 4
+	.byte	(.L1874 - .Lrtx1870) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1743:
+.L1869:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x0, 6, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	add	x19, x19, x22, lsl 6
 	ldp	x1, x0, [x19, 8]
 	ldr	x2, [x19, 24]
@@ -10360,128 +11036,128 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-	b	.L1759
-.L1745:
+	b	.L1885
+.L1871:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x21, 6, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	mov	w0, 5
 	add	x19, x19, x22, lsl 6
 	tst	w21, w0
-	beq	.L1758
+	beq	.L1884
 	ldrb	w1, [x19, 1]
 	mov	w0, 11
 	ldr	w3, [x19, 40]
 	mov	w4, 11
 	ldr	w2, [x19, 52]
 	strb	w0, [x19, 58]
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L1777:
+.L1903:
 	mov	w0, -1
 	str	w0, [x19, 52]
-	b	.L1740
-.L1748:
+	b	.L1866
+.L1874:
 	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR46
+	add	x20, x19, :lo12:.LANCHOR48
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 9
 	add	x0, x20, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x21, 21, 3
-.L1753:
+.L1879:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1757
+	bne	.L1883
 	mov	w21, -1
-	b	.L1740
-.L1757:
+	b	.L1866
+.L1883:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x20, x23, lsl 6
 	add	x0, x20, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1753
+	bne	.L1879
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1753
+	bne	.L1879
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1755
+	tbz	x24, 6, .L1881
 	add	x20, x20, x22, lsl 6
 	ands	w21, w0, 15
-	beq	.L1756
+	beq	.L1882
 	ldrb	w1, [x20, 1]
 	mov	w4, 11
 	ldr	w3, [x20, 40]
-	adrp	x0, .LC107
+	adrp	x0, .LC118
 	ldr	w2, [x20, 52]
-	add	x0, x0, :lo12:.LC107
+	add	x0, x0, :lo12:.LC118
 	mov	w21, w24
 	bl	printf
 	mov	w0, 11
 	strb	w0, [x20, 58]
 	mov	w0, -1
 	str	w0, [x20, 52]
-.L1755:
-	add	x1, x19, :lo12:.LANCHOR46
+.L1881:
+	add	x1, x19, :lo12:.LANCHOR48
 	add	x22, x1, x22, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x22, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x22, 52]
 	str	w0, [x1, 52]
-.L1740:
+.L1866:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1756:
+.L1882:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1755
-.L1746:
+	b	.L1881
+.L1872:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x21, 5, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	tst	x21, 15
 	add	x19, x19, x22, lsl 6
-	beq	.L1758
+	beq	.L1884
 	mov	w0, 11
 	strb	w0, [x19, 58]
-	b	.L1777
-.L1758:
+	b	.L1903
+.L1884:
 	mov	w0, 12
 	str	wzr, [x19, 52]
 	strb	w0, [x19, 58]
-	b	.L1759
-.L1747:
+	b	.L1885
+.L1873:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1759
-	add	x19, x19, :lo12:.LANCHOR46
+	tbz	x0, 6, .L1885
+	add	x19, x19, :lo12:.LANCHOR48
 	add	x19, x19, x22, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1759
+	b	.L1885
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -10491,19 +11167,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR120
-	add	x19, x19, :lo12:.LANCHOR120
-.L1779:
+	adrp	x19, .LANCHOR126
+	add	x19, x19, :lo12:.LANCHOR126
+.L1905:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1780
+	bne	.L1906
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1780:
+.L1906:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1779
+	b	.L1905
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -10556,72 +11232,6 @@ ftl_read_ppa_page:
 	ldp	x29, x30, [sp], 48
 	b	flash_read_page_en
 	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_read_test
-	.type	ftl_open_sblk_read_test, %function
-ftl_open_sblk_read_test:
-	stp	x29, x30, [sp, -96]!
-	and	w14, w0, 65535
-	mov	w0, w14
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR80
-	adrp	x24, .LANCHOR117
-	add	x23, x23, :lo12:.LANCHOR80
-	add	x24, x24, :lo12:.LANCHOR117
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	add	x1, x29, 80
-	mov	w20, 0
-	bl	ftl_get_blk_list_in_sblk
-	strb	w0, [x29, 73]
-	strh	w14, [x29, 64]
-.L1787:
-	ldrh	w0, [x23]
-	cmp	w0, w20
-	bls	.L1786
-	adrp	x22, .LANCHOR72
-	adrp	x21, .LANCHOR155
-	mov	w19, 0
-	add	x22, x22, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LANCHOR155
-	b	.L1789
-.L1792:
-	add	x0, x29, 64
-	mov	w1, 65535
-	add	x0, x0, x19, sxtw 1
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	bne	.L1788
-.L1791:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-.L1789:
-	ldrb	w0, [x22]
-	cmp	w0, w19
-	bhi	.L1792
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1787
-.L1788:
-	adrp	x1, .LANCHOR103
-	ldrb	w3, [x24]
-	mov	x2, x21
-	ldrh	w4, [x1, #:lo12:.LANCHOR103]
-	adrp	x1, ftl_tmp_buffer
-	add	x1, x1, :lo12:ftl_tmp_buffer
-	madd	w0, w4, w0, w20
-	bl	ftl_read_ppa_page
-	cmp	w0, 512
-	bne	.L1791
-.L1786:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
-	ret
-	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
 	.section	.text.sblk_read_page,"ax",@progbits
 	.align	2
 	.global	sblk_read_page
@@ -10635,19 +11245,19 @@ sblk_read_page:
 	mov	w22, w21
 	stp	x23, x24, [sp, 48]
 	mov	x20, x0
-	adrp	x23, .LANCHOR120
-	adrp	x24, .LANCHOR46
+	adrp	x23, .LANCHOR126
+	adrp	x24, .LANCHOR48
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR120
-	add	x24, x24, :lo12:.LANCHOR46
+	add	x23, x23, :lo12:.LANCHOR126
+	add	x24, x24, :lo12:.LANCHOR48
 	stp	x25, x26, [sp, 64]
-.L1798:
-	cbnz	w22, .L1802
-.L1810:
-	adrp	x19, .LANCHOR46
-	add	x19, x19, :lo12:.LANCHOR46
-.L1803:
-	cbnz	w21, .L1806
+.L1913:
+	cbnz	w22, .L1917
+.L1925:
+	adrp	x19, .LANCHOR48
+	add	x19, x19, :lo12:.LANCHOR48
+.L1918:
+	cbnz	w21, .L1921
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10655,14 +11265,14 @@ sblk_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1802:
+.L1917:
 	ldrb	w25, [x19]
 	ldr	w26, [x19, 40]
-.L1799:
+.L1914:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L1800
+	cbnz	w0, .L1915
 	ldr	w1, [x19, 40]
 	mov	w0, 48
 	bl	flash_start_page_read
@@ -10675,26 +11285,26 @@ sblk_read_page:
 	mov	x0, x23
 	bl	buf_add_tail
 	subs	w22, w22, #1
-	beq	.L1810
+	beq	.L1925
 	ubfiz	x19, x25, 6, 8
 	add	x19, x24, x19
-	b	.L1798
-.L1800:
+	b	.L1913
+.L1915:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1799
-.L1806:
+	b	.L1914
+.L1921:
 	ldrb	w0, [x20, 58]
 	cmp	w0, 12
-	bne	.L1804
+	bne	.L1919
 	ldrb	w20, [x20]
 	sub	w21, w21, #1
 	add	x20, x19, x20, lsl 6
-	b	.L1803
-.L1804:
+	b	.L1918
+.L1919:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1803
+	b	.L1918
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -10702,108 +11312,108 @@ sblk_read_page:
 	.type	gc_check_data_one_wl, %function
 gc_check_data_one_wl:
 	sub	sp, sp, #112
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR63
-	add	x20, x19, :lo12:.LANCHOR63
+	adrp	x19, .LANCHOR65
+	add	x20, x19, :lo12:.LANCHOR65
 	stp	x21, x22, [sp, 48]
-	ldr	x21, [x0, #:lo12:.LANCHOR5]
+	ldr	x21, [x0, #:lo12:.LANCHOR6]
 	stp	x23, x24, [sp, 64]
 	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1813
+	cbnz	x0, .L1928
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x20, 8]
-.L1813:
-	add	x0, x19, :lo12:.LANCHOR63
+.L1928:
+	add	x0, x19, :lo12:.LANCHOR65
 	ldr	x20, [x0, 8]
-	cbnz	x20, .L1814
-	adrp	x1, .LANCHOR156
+	cbnz	x20, .L1929
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 348
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 366
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1814:
-	adrp	x26, .LANCHOR103
-	adrp	x27, .LANCHOR67
+.L1929:
+	adrp	x26, .LANCHOR108
+	adrp	x27, .LANCHOR71
 	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR103
-	add	x27, x27, :lo12:.LANCHOR67
+	add	x26, x26, :lo12:.LANCHOR108
+	add	x27, x27, :lo12:.LANCHOR71
 	mov	w24, 0
-.L1815:
+.L1930:
 	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1824
+	bge	.L1939
 	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR63
-	b	.L1825
-.L1823:
+	add	x22, x19, :lo12:.LANCHOR65
+	b	.L1940
+.L1938:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1816
+	bne	.L1931
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1836:
+.L1951:
 	str	w0, [x20, 40]
 	mov	w1, 1
 	mov	x0, x20
 	bl	sblk_read_page
 	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR139
+	adrp	x1, .LANCHOR146
 	cmn	w2, #1
-	beq	.L1819
+	beq	.L1934
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR139]
+	ldr	x4, [x1, #:lo12:.LANCHOR146]
 	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1819
-	adrp	x4, .LANCHOR140
-	ldr	x4, [x4, #:lo12:.LANCHOR140]
+	bne	.L1934
+	adrp	x4, .LANCHOR147
+	ldr	x4, [x4, #:lo12:.LANCHOR147]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1820
-.L1819:
+	beq	.L1935
+.L1934:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR139]
+	ldr	x1, [x1, #:lo12:.LANCHOR146]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1820
-	adrp	x1, .LANCHOR7
-	ldr	w1, [x1, #:lo12:.LANCHOR7]
-	tbz	x1, 10, .L1821
+	beq	.L1935
+	adrp	x1, .LANCHOR9
+	ldr	w1, [x1, #:lo12:.LANCHOR9]
+	tbz	x1, 10, .L1936
 	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR140
-	ldr	x4, [x4, #:lo12:.LANCHOR140]
+	adrp	x4, .LANCHOR147
+	ldr	x4, [x4, #:lo12:.LANCHOR147]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC108
+	adrp	x0, .LC119
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC108
+	add	x0, x0, :lo12:.LC119
 	ldr	w7, [x1, 8]
 	ldr	w1, [x20, 40]
 	bl	printf
-.L1821:
-	adrp	x0, .LANCHOR4
+.L1936:
+	adrp	x0, .LANCHOR5
 	ldrh	w1, [x21, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1812:
+.L1927:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -10812,37 +11422,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1816:
+.L1931:
 	cmp	w2, 2
-	bne	.L1818
+	bne	.L1933
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1836
-.L1818:
+	b	.L1951
+.L1933:
 	add	w0, w0, w1
-	b	.L1836
-.L1820:
+	b	.L1951
+.L1935:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1825:
+.L1940:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1823
+	ble	.L1938
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1815
-.L1824:
-.L1822:
-	add	x19, x19, :lo12:.LANCHOR63
+	b	.L1930
+.L1939:
+.L1937:
+	add	x19, x19, :lo12:.LANCHOR65
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1812
+	b	.L1927
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -10854,12 +11464,12 @@ flash_prog_page:
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x0, .LANCHOR21
-	adrp	x22, .LANCHOR7
+	adrp	x0, .LANCHOR23
+	adrp	x22, .LANCHOR9
 	stp	x25, x26, [sp, 64]
-	ldr	x25, [x0, #:lo12:.LANCHOR21]
+	ldr	x25, [x0, #:lo12:.LANCHOR23]
 	mov	w21, w1
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
 	and	x19, x20, 255
 	stp	x23, x24, [sp, 48]
 	add	x23, x19, 8
@@ -10869,22 +11479,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L1838
-	adrp	x0, .LC109
+	tbz	x0, 4, .L1953
+	adrp	x0, .LC120
 	mov	w3, w4
 	mov	w2, w28
-	add	x0, x0, :lo12:.LC109
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-.L1838:
+.L1953:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L1839
+	cbnz	w28, .L1954
 	bl	zftl_flash_enter_slc_mode
-.L1840:
+.L1955:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -10898,10 +11508,10 @@ flash_prog_page:
 	str	w0, [x19, 2052]
 	mov	w0, w24
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR34+9
 	mov	x3, x27
 	mov	x2, x26
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -10914,15 +11524,15 @@ flash_prog_page:
 	mov	w0, w20
 	bl	nandc_de_cs
 	and	w19, w2, 4
-	tbz	x2, 2, .L1837
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1837
-	adrp	x0, .LC110
+	tbz	x2, 2, .L1952
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L1952
+	adrp	x0, .LC121
 	mov	w2, w19
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC110
+	add	x0, x0, :lo12:.LC121
 	bl	printf
-.L1837:
+.L1952:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10931,9 +11541,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1839:
+.L1954:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1840
+	b	.L1955
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -10947,77 +11557,77 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1853
-	adrp	x0, .LANCHOR157
-	ldrb	w0, [x0, #:lo12:.LANCHOR157]
+	bne	.L1968
+	adrp	x0, .LANCHOR163
+	ldrb	w0, [x0, #:lo12:.LANCHOR163]
 	cmp	w0, w19
-	bhi	.L1857
-.L1853:
-	adrp	x22, .LANCHOR152
-	adrp	x23, .LANCHOR153
+	bhi	.L1972
+.L1968:
+	adrp	x22, .LANCHOR159
+	adrp	x23, .LANCHOR160
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR152]
+	ldr	x0, [x22, #:lo12:.LANCHOR159]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR153]
+	ldr	x0, [x23, #:lo12:.LANCHOR160]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
-	adrp	x0, .LANCHOR26
-	ldrh	w20, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LANCHOR28
+	ldrh	w20, [x0, #:lo12:.LANCHOR28]
 	mov	w0, w21
 	mul	w20, w20, w19
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1855
-	adrp	x19, .LANCHOR32
-	add	x19, x19, :lo12:.LANCHOR32
-	ldr	x3, [x22, #:lo12:.LANCHOR152]
+	beq	.L1970
+	adrp	x19, .LANCHOR34
+	add	x19, x19, :lo12:.LANCHOR34
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR153]
+	ldr	x2, [x23, #:lo12:.LANCHOR160]
 	mov	w0, w21
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L1855
+	beq	.L1970
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR152]
+	ldr	x3, [x22, #:lo12:.LANCHOR159]
 	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR153]
+	ldr	x2, [x23, #:lo12:.LANCHOR160]
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1855
-	ldr	x0, [x23, #:lo12:.LANCHOR153]
+	beq	.L1970
+	ldr	x0, [x23, #:lo12:.LANCHOR160]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L1855
-	ldr	x0, [x22, #:lo12:.LANCHOR152]
+	bne	.L1970
+	ldr	x0, [x22, #:lo12:.LANCHOR159]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L1856
-.L1855:
+	beq	.L1971
+.L1970:
 	mov	w19, -1
-.L1856:
+.L1971:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L1852:
+.L1967:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1857:
+.L1972:
 	mov	w0, 0
-	b	.L1852
+	b	.L1967
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -11028,50 +11638,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR158
+	adrp	x0, .LANCHOR164
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR158]
+	ldrb	w0, [x0, #:lo12:.LANCHOR164]
 	str	x25, [sp, 64]
-	cbnz	w0, .L1868
-	adrp	x20, .LANCHOR32
-	add	x20, x20, :lo12:.LANCHOR32
+	cbnz	w0, .L1983
+	adrp	x20, .LANCHOR34
+	add	x20, x20, :lo12:.LANCHOR34
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1868
+	bhi	.L1983
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1868
-	adrp	x21, .LANCHOR126
+	tbz	x0, 0, .L1983
+	adrp	x21, .LANCHOR132
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR126
+	add	x21, x21, :lo12:.LANCHOR132
 	mov	w25, 65535
-	adrp	x24, .LANCHOR143
-.L1870:
+	adrp	x24, .LANCHOR150
+.L1985:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L1871
-.L1868:
+	bhi	.L1986
+.L1983:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1871:
+.L1986:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L1868
-	ldr	x0, [x24, #:lo12:.LANCHOR143]
+	bne	.L1983
+	ldr	x0, [x24, #:lo12:.LANCHOR150]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR143]
+	ldr	x3, [x24, #:lo12:.LANCHOR150]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -11079,7 +11689,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L1870
+	b	.L1985
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -11096,16 +11706,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1874
+	bls	.L1989
 	cmp	w1, 575
-	bhi	.L1875
-	adrp	x0, .LANCHOR159
+	bhi	.L1990
+	adrp	x0, .LANCHOR165
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR159]
+	str	w2, [x0, #:lo12:.LANCHOR165]
 	adrp	x0, idb_buf
-	bhi	.L1876
+	bhi	.L1991
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -11113,9 +11723,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1952:
+.L2067:
 	bl	ftl_memcpy
-.L1931:
+.L2046:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11124,7 +11734,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L1876:
+.L1991:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -11134,16 +11744,16 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1952
-.L1874:
+	b	.L2067
+.L1989:
 	cmp	w1, 575
-	bls	.L1931
-.L1875:
-	adrp	x0, .LANCHOR159
-	ldr	w0, [x0, #:lo12:.LANCHOR159]
-	cbz	w0, .L1931
-	adrp	x3, .LANCHOR32
-	add	x1, x3, :lo12:.LANCHOR32
+	bls	.L2046
+.L1990:
+	adrp	x0, .LANCHOR165
+	ldr	w0, [x0, #:lo12:.LANCHOR165]
+	cbz	w0, .L2046
+	adrp	x3, .LANCHOR34
+	add	x1, x3, :lo12:.LANCHOR34
 	str	x3, [x29, 176]
 	adrp	x3, idb_buf
 	add	x6, x3, :lo12:idb_buf
@@ -11163,9 +11773,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L1881:
+.L1996:
 	ldr	w5, [x1]
-	cbnz	w5, .L1879
+	cbnz	w5, .L1994
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -11173,40 +11783,40 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1881
-.L1879:
+	bne	.L1996
+.L1994:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
 	stp	wzr, wzr, [x29, 168]
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L1915:
+.L2030:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
 	mov	w2, 512
 	mov	x0, x20
 	bl	ftl_memset
-	adrp	x0, .LANCHOR20
+	adrp	x0, .LANCHOR22
 	ldr	w1, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR20]
+	ldr	x0, [x0, #:lo12:.LANCHOR22]
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L1882
+	beq	.L1997
 	ldr	w1, [x29, 132]
-	adrp	x19, .LANCHOR42
+	adrp	x19, .LANCHOR44
 	mul	w26, w0, w1
 	ldr	x0, [x29, 176]
-	add	x25, x0, :lo12:.LANCHOR32
-	ldrb	w0, [x19, #:lo12:.LANCHOR42]
+	add	x25, x0, :lo12:.LANCHOR34
+	ldrb	w0, [x19, #:lo12:.LANCHOR44]
 	str	w0, [x29, 128]
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	strb	wzr, [x19, #:lo12:.LANCHOR44]
 	mov	w0, 0
 	ldrb	w21, [x25, 9]
 	ldrh	w23, [x25, 10]
@@ -11218,11 +11828,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L1921
-	adrp	x0, .LANCHOR22
-	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	bne	.L2036
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	cmp	w0, 9
-	bne	.L1921
+	bne	.L2036
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -11258,24 +11868,24 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L1883:
+.L1998:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR158
+	adrp	x28, .LANCHOR164
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR158
-	adrp	x25, .LANCHOR27
+	add	x0, x28, :lo12:.LANCHOR164
+	adrp	x25, .LANCHOR29
 	str	x0, [x29, 152]
 	mov	w20, 0
-	add	x0, x25, :lo12:.LANCHOR27
+	add	x0, x25, :lo12:.LANCHOR29
 	str	x0, [x29, 144]
-.L1885:
+.L2000:
 	cmp	w27, w20
-	bhi	.L1896
+	bhi	.L2011
 	ldr	x0, [x29, 176]
-	add	x25, x19, :lo12:.LANCHOR42
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	add	x25, x19, :lo12:.LANCHOR44
+	strb	wzr, [x19, #:lo12:.LANCHOR44]
 	mov	w21, 4
-	add	x0, x0, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR34
 	mov	w22, 0
 	str	wzr, [x29, 144]
 	ldrb	w1, [x0, 9]
@@ -11293,72 +11903,72 @@ idb_write_data:
 	str	w0, [x29, 160]
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
-	adrp	x0, .LANCHOR27
-	add	x0, x0, :lo12:.LANCHOR27
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	str	x0, [x29, 104]
-.L1897:
+.L2012:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L1911
-	adrp	x0, .LANCHOR42
+	bcc	.L2026
+	adrp	x0, .LANCHOR44
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
 	add	x3, x3, :lo12:idb_buf
-	strb	w1, [x0, #:lo12:.LANCHOR42]
+	strb	w1, [x0, #:lo12:.LANCHOR44]
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L1912:
+.L2027:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L1913
+	bcc	.L2028
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L1882
-	b	.L1917
-.L1921:
+	bls	.L1997
+	b	.L2032
+.L2036:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L1883
-.L1896:
+	b	.L1998
+.L2011:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
-	add	x0, x25, :lo12:.LANCHOR27
+	add	x0, x25, :lo12:.LANCHOR29
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L1887
-	adrp	x0, .LANCHOR25
-	ldrb	w3, [x0, #:lo12:.LANCHOR25]
+	cbz	w2, .L2002
+	adrp	x0, .LANCHOR27
+	ldrb	w3, [x0, #:lo12:.LANCHOR27]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L1887:
-	adrp	x1, .LANCHOR22
-	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+.L2002:
+	adrp	x1, .LANCHOR24
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
 	cmp	w1, 9
-	bne	.L1889
-.L1950:
+	bne	.L2004
+.L2065:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L1891
+	cbnz	w2, .L2006
 	mov	w5, w0
-.L1892:
+.L2007:
 	mul	w1, w21, w5
-	adrp	x2, .LANCHOR40
-	adrp	x0, .LANCHOR10
-	cbnz	x6, .L1893
+	adrp	x2, .LANCHOR42
+	adrp	x0, .LANCHOR12
+	cbnz	x6, .L2008
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR40]
-	add	x3, x3, :lo12:.LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	add	x3, x3, :lo12:.LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
 	str	w5, [x29, 140]
 	str	w7, [x29, 160]
 	ldrb	w6, [x3, 9]
@@ -11373,36 +11983,36 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR158]
+	ldrb	w0, [x28, #:lo12:.LANCHOR164]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L1894
+	cbnz	w0, .L2009
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L1894:
+.L2009:
 	add	x22, x22, 2048
-.L1895:
+.L2010:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L1885
-.L1889:
+	b	.L2000
+.L2004:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L1950
-.L1891:
-	adrp	x0, .LANCHOR25
-	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	b	.L2065
+.L2006:
+	adrp	x0, .LANCHOR27
+	ldrb	w1, [x0, #:lo12:.LANCHOR27]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L1892
-.L1893:
+	b	.L2007
+.L2008:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
-	ldrb	w7, [x2, #:lo12:.LANCHOR40]
-	add	x3, x3, :lo12:.LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	ldrb	w7, [x2, #:lo12:.LANCHOR42]
+	add	x3, x3, :lo12:.LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
 	str	w7, [x29, 160]
 	ldrb	w5, [x3, 9]
 	udiv	w5, w1, w5
@@ -11416,41 +12026,41 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L1895
-.L1911:
+	b	.L2010
+.L2026:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR158
+	adrp	x1, .LANCHOR164
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR158]
+	ldrb	w1, [x1, #:lo12:.LANCHOR164]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L1898
+	cbnz	w1, .L2013
 	mov	w19, w0
-.L1899:
-	adrp	x0, .LANCHOR10
+.L2014:
+	adrp	x0, .LANCHOR12
 	ldr	w1, [x29, 136]
-	ldrb	w23, [x0, #:lo12:.LANCHOR10]
+	ldrb	w23, [x0, #:lo12:.LANCHOR12]
 	ldr	w0, [x29, 152]
 	add	w0, w0, w1
 	ldr	w1, [x29, 140]
 	madd	w19, w1, w19, w0
 	ldr	x0, [x29, 176]
-	add	x0, x0, :lo12:.LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR34
 	ldrb	w0, [x0, 9]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR40
-	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
 	str	w0, [x29, 124]
 	mov	w0, w23
 	bl	nandc_bch_sel
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
 	str	x0, [x29, 112]
-.L1900:
+.L2015:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
@@ -11459,32 +12069,32 @@ idb_write_data:
 	bl	flash_read_page
 	mov	w5, w0
 	cmn	w0, #1
-	bne	.L1901
+	bne	.L2016
 	ldrb	w6, [x25]
-	cbnz	w6, .L1902
-.L1905:
-	adrp	x0, .LANCHOR148
-	ldr	x6, [x0, #:lo12:.LANCHOR148]
-	cbnz	x6, .L1903
-.L1904:
+	cbnz	w6, .L2017
+.L2020:
+	adrp	x0, .LANCHOR155
+	ldr	x6, [x0, #:lo12:.LANCHOR155]
+	cbnz	x6, .L2018
+.L2019:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L1901
+	cbz	w0, .L2016
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
-	bl	flash_ddr_tunning_read
-	b	.L1951
-.L1898:
-	adrp	x0, .LANCHOR25
-	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	bl	flash_ddr_tuning_read
+	b	.L2066
+.L2013:
+	adrp	x0, .LANCHOR27
+	ldrb	w1, [x0, #:lo12:.LANCHOR27]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L1899
-.L1902:
+	b	.L2014
+.L2017:
 	str	w6, [x29, 100]
 	mov	w4, w21
 	str	w5, [x29, 120]
@@ -11498,21 +12108,21 @@ idb_write_data:
 	ldr	w6, [x29, 100]
 	strb	w6, [x25]
 	ldr	w5, [x29, 120]
-	beq	.L1905
-.L1951:
+	beq	.L2020
+.L2066:
 	mov	w5, w0
-.L1901:
+.L2016:
 	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L1907
+	beq	.L2022
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L1900
-.L1903:
+	b	.L2015
+.L2018:
 	str	w5, [x29, 120]
 	mov	w4, w21
 	add	x3, x29, 192
@@ -11522,9 +12132,9 @@ idb_write_data:
 	blr	x6
 	cmn	w0, #1
 	ldr	w5, [x29, 120]
-	beq	.L1904
-	b	.L1951
-.L1907:
+	beq	.L2019
+	b	.L2066
+.L2022:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -11534,62 +12144,62 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L1909
+	bne	.L2024
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L1909
+	cbnz	w0, .L2024
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L1909
+	bne	.L2024
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L1910:
+.L2025:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L1897
-.L1909:
+	b	.L2012
+.L2024:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L1910
-.L1913:
+	b	.L2025
+.L2028:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L1912
+	beq	.L2027
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, w19
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
 	bl	printf
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L1882:
+.L1997:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L1915
+	bne	.L2030
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L1917
-	adrp	x0, .LC113
+	cbnz	w0, .L2032
+	adrp	x0, .LC124
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC113
+	add	x0, x0, :lo12:.LC124
 	bl	printf
-.L1917:
-	adrp	x0, .LANCHOR159
-	str	wzr, [x0, #:lo12:.LANCHOR159]
-	b	.L1931
+.L2032:
+	adrp	x0, .LANCHOR165
+	str	wzr, [x0, #:lo12:.LANCHOR165]
+	b	.L2046
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -11600,39 +12210,39 @@ flash_start_tlc_page_prog:
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	and	w19, w3, 255
 	stp	x23, x24, [sp, 48]
 	and	w21, w1, 255
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	and	w22, w2, 255
 	mov	w20, w4
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L1954
-	adrp	x1, .LANCHOR160
+	bhi	.L2069
+	adrp	x1, .LANCHOR166
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR160
+	add	x1, x1, :lo12:.LANCHOR166
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1954:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L2069:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w26, [x0, w19, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x19, [x0, #:lo12:.LANCHOR23]
 	mov	w0, w26
 	bl	nandc_cs
-	cbz	w25, .L1955
+	cbz	w25, .L2070
 	sxtw	x0, w26
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L1955:
+.L2070:
 	ubfiz	x0, x26, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -11650,10 +12260,10 @@ flash_start_tlc_page_prog:
 	sub	w0, w20, #1
 	add	w0, w0, w21
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR34+9
 	mov	x3, x24
 	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -11715,8 +12325,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -11733,21 +12343,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L1963:
+.L2078:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1964
+	cbnz	w0, .L2079
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1964:
+.L2079:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1963
+	b	.L2078
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -11764,13 +12374,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L1967:
+.L2082:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1968
+	cbnz	w0, .L2083
 	cmp	w24, 2
-	bne	.L1969
+	bne	.L2084
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -11847,24 +12457,24 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	bl	buf_add_tail
-.L1970:
+.L2085:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1968:
+.L2083:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1967
-.L1969:
+	b	.L2082
+.L2084:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L1970
+	b	.L2085
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -11874,75 +12484,75 @@ flash_start_page_prog:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR12
+	adrp	x26, .LANCHOR14
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
 	stp	x19, x20, [sp, 16]
 	mov	x24, x2
 	stp	x21, x22, [sp, 32]
 	mov	x25, x3
-	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	ldrb	w0, [x26, #:lo12:.LANCHOR14]
 	and	w19, w1, 2097151
 	str	x27, [sp, 80]
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L1973
-	adrp	x1, .LANCHOR161
+	bhi	.L2088
+	adrp	x1, .LANCHOR167
 	adrp	x0, .LC0
 	mov	w2, 685
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR167
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1973:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L2088:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w21, [x0, w27, sxtw]
-	adrp	x0, .LANCHOR21
-	ldr	x20, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR23
+	ldr	x20, [x0, #:lo12:.LANCHOR23]
 	bl	nandc_rdy_status
-	cbnz	w0, .L1974
-	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	cbnz	w0, .L2089
+	ldrb	w0, [x26, #:lo12:.LANCHOR14]
 	cmp	w0, 1
-	bne	.L1975
+	bne	.L2090
 	bl	nandc_wait_flash_ready
-.L1974:
+.L2089:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L1976
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1977
-	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1978
-.L1977:
-	adrp	x0, .LANCHOR26
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
-	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	cbnz	w22, .L2091
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L2092
+	ldrb	w0, [x1, #:lo12:.LANCHOR27]
+	cbz	w0, .L2093
+.L2092:
+	adrp	x0, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	ldrh	w2, [x0, #:lo12:.LANCHOR28]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1979
+	cbz	w1, .L2094
 	add	w19, w0, w19, lsl 1
-.L1978:
+.L2093:
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L1980
-.L1975:
+	b	.L2095
+.L2090:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L1974
-.L1979:
-	adrp	x1, .LANCHOR27
-	add	x1, x1, :lo12:.LANCHOR27
+	b	.L2089
+.L2094:
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L1980:
+.L2095:
 	ubfiz	x0, x21, 8, 8
 	add	x20, x20, x0
 	mov	w0, 128
@@ -11957,10 +12567,10 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR32+9
+	adrp	x0, .LANCHOR34+9
 	mov	x3, x25
 	mov	x2, x24
-	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
+	ldrb	w1, [x0, #:lo12:.LANCHOR34+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
@@ -11973,10 +12583,10 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs
-.L1976:
+.L2091:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1980
+	b	.L2095
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -11991,27 +12601,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR120
+	adrp	x0, .LANCHOR126
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR120]
+	ldrb	w1, [x0, #:lo12:.LANCHOR126]
 	cmp	w1, 255
-	beq	.L1986
-	adrp	x2, .LANCHOR46
-	add	x2, x2, :lo12:.LANCHOR46
+	beq	.L2101
+	adrp	x2, .LANCHOR48
+	add	x2, x2, :lo12:.LANCHOR48
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L1988:
+.L2103:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L1987
+	bne	.L2102
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L1987
+	bne	.L2102
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L1986:
+.L2101:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -12019,16 +12629,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR126
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L1987:
+.L2102:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L1988
-	b	.L1986
+	bne	.L2103
+	b	.L2101
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -12045,24 +12655,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L1995
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L1995
+	cbz	w0, .L2110
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2110
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC114
+	adrp	x0, .LC125
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC114
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L1995:
-	adrp	x25, .LANCHOR36
-	adrp	x23, .LANCHOR46
-	add	x25, x25, :lo12:.LANCHOR36
-	add	x23, x23, :lo12:.LANCHOR46
+.L2110:
+	adrp	x25, .LANCHOR38
+	adrp	x23, .LANCHOR48
+	add	x25, x25, :lo12:.LANCHOR38
+	add	x23, x23, :lo12:.LANCHOR48
 	mov	w21, 0
 	mov	w24, 1
-.L1996:
-	cbnz	w20, .L2006
+.L2111:
+	cbnz	w20, .L2121
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12071,52 +12681,52 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2006:
+.L2121:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L1997:
+.L2112:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L1998
+	cbnz	w0, .L2113
 	cmp	w20, 1
-	beq	.L1999
+	beq	.L2114
 	ldrb	w0, [x25]
-	cbnz	w0, .L2000
-.L1999:
+	cbnz	w0, .L2115
+.L2114:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L2001:
+.L2116:
 	ubfiz	x19, x26, 6, 8
 	sub	w20, w20, #1
 	add	x19, x23, x19
-	b	.L1996
-.L1998:
+	b	.L2111
+.L2113:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1997
-.L2000:
+	b	.L2112
+.L2115:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L2002
-	adrp	x1, .LANCHOR162
+	bne	.L2117
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC0
 	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR162
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2002:
+.L2117:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L2003
-	adrp	x0, .LANCHOR96
-	ldrh	w2, [x0, #:lo12:.LANCHOR96]
-	adrp	x0, .LANCHOR95
-	ldrb	w3, [x0, #:lo12:.LANCHOR95]
+	bne	.L2118
+	adrp	x0, .LANCHOR102
+	ldrh	w2, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR101
+	ldrb	w3, [x0, #:lo12:.LANCHOR101]
 	mov	w0, 21
 	sub	w0, w0, w2
 	lsl	w1, w24, w2
@@ -12135,9 +12745,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L2003
+	bne	.L2118
 	cmp	w21, w3
-	beq	.L2003
+	beq	.L2118
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -12150,15 +12760,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
 	bl	buf_add_tail
-	b	.L2001
-.L2003:
+	b	.L2116
+.L2118:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L2001
+	b	.L2116
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -12166,22 +12776,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR121
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR115]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR163
-	cbz	w1, .L2018
-	ldrb	w2, [x20, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+	adrp	x20, .LANCHOR169
+	cbz	w1, .L2133
+	ldrb	w2, [x20, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2018:
+.L2133:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR115]
-	strb	w0, [x20, #:lo12:.LANCHOR163]
+	strb	wzr, [x19, #:lo12:.LANCHOR121]
+	strb	w0, [x20, #:lo12:.LANCHOR169]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -12198,55 +12808,55 @@ flash_prog_page_en:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w20, w1
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	mov	x23, x3
 	mov	w25, w4
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2024
-	adrp	x1, .LANCHOR164
+	bhi	.L2139
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2024:
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+.L2139:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2034
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR25
-	cbz	w1, .L2026
-	ldrb	w1, [x0, #:lo12:.LANCHOR25]
-	cbz	w1, .L2034
-.L2026:
-	adrp	x1, .LANCHOR26
-	ldrb	w0, [x0, #:lo12:.LANCHOR25]
-	ldrh	w1, [x1, #:lo12:.LANCHOR26]
+	cbnz	w19, .L2149
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR27
+	cbz	w1, .L2141
+	ldrb	w1, [x0, #:lo12:.LANCHOR27]
+	cbz	w1, .L2149
+.L2141:
+	adrp	x1, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrh	w1, [x1, #:lo12:.LANCHOR28]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2027
+	cbz	w0, .L2142
 	add	w19, w19, w1, lsl 1
-.L2025:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L2028
-	adrp	x0, .LC115
+.L2140:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 4, .L2143
+	adrp	x0, .LC126
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC115
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2028:
+.L2143:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -12254,68 +12864,68 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2029
-	adrp	x26, .LANCHOR152
-	adrp	x21, .LANCHOR153
+	cbz	w21, .L2144
+	adrp	x26, .LANCHOR159
+	adrp	x21, .LANCHOR160
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR152]
+	ldr	x3, [x26, #:lo12:.LANCHOR159]
 	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR153]
+	ldr	x2, [x21, #:lo12:.LANCHOR160]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2030
-	ldr	x0, [x21, #:lo12:.LANCHOR153]
+	beq	.L2145
+	ldr	x0, [x21, #:lo12:.LANCHOR160]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2030
-	ldr	x0, [x26, #:lo12:.LANCHOR152]
+	bne	.L2145
+	ldr	x0, [x26, #:lo12:.LANCHOR159]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2029
-.L2030:
-	ldr	x1, [x26, #:lo12:.LANCHOR152]
+	beq	.L2144
+.L2145:
+	ldr	x1, [x26, #:lo12:.LANCHOR159]
 	mov	w3, 4
-	adrp	x0, .LC116
+	adrp	x0, .LC127
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC116
+	add	x0, x0, :lo12:.LC127
 	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR153]
+	ldr	x1, [x21, #:lo12:.LANCHOR160]
 	mov	w3, 4
-	adrp	x0, .LC117
+	adrp	x0, .LC128
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC117
+	add	x0, x0, :lo12:.LC128
 	bl	rknand_print_hex
-.L2031:
+.L2146:
 	mov	w1, w20
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR170
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR164
+	add	x1, x1, :lo12:.LANCHOR170
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2032
-.L2027:
-	adrp	x0, .LANCHOR27
-	add	x0, x0, :lo12:.LANCHOR27
+	b	.L2147
+.L2142:
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2025
-.L2034:
+	b	.L2140
+.L2149:
 	mov	w19, w20
-	b	.L2025
-.L2029:
+	b	.L2140
+.L2144:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2031
-.L2032:
+	beq	.L2146
+.L2147:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12333,113 +12943,113 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR155
+	adrp	x25, .LANCHOR171
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR104
+	adrp	x26, .LANCHOR109
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR104
+	add	x0, x26, :lo12:.LANCHOR109
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
 	mov	w20, 0
-	adrp	x27, .LANCHOR95
+	adrp	x27, .LANCHOR101
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
-	add	x0, x27, :lo12:.LANCHOR95
-	str	wzr, [x25, #:lo12:.LANCHOR155]
+	add	x0, x27, :lo12:.LANCHOR101
+	str	wzr, [x25, #:lo12:.LANCHOR171]
 	str	x0, [x29, 96]
-.L2046:
+.L2161:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2056
-	add	x0, x27, :lo12:.LANCHOR95
+	bls	.L2171
+	add	x0, x27, :lo12:.LANCHOR101
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR7
-	add	x0, x0, :lo12:.LANCHOR7
+	adrp	x0, .LANCHOR9
+	add	x0, x0, :lo12:.LANCHOR9
 	str	x0, [x29, 104]
-	b	.L2057
-.L2055:
+	b	.L2172
+.L2170:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2047
-	adrp	x0, .LC119
+	tbz	x0, 12, .L2162
+	adrp	x0, .LC130
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2047:
+.L2162:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2048
-	adrp	x0, .LANCHOR20
-	ldr	x0, [x0, #:lo12:.LANCHOR20]
+	cbnz	w20, .L2163
+	adrp	x0, .LANCHOR22
+	ldr	x0, [x0, #:lo12:.LANCHOR22]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2049
-.L2048:
+	bcs	.L2164
+.L2163:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2049
-	adrp	x0, .LANCHOR103
+	cbnz	w0, .L2164
+	adrp	x0, .LANCHOR108
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR103]
+	ldrh	w7, [x0, #:lo12:.LANCHOR108]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2050
-	adrp	x0, .LANCHOR67
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cbz	w0, .L2165
+	adrp	x0, .LANCHOR71
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	bne	.L2072
-	adrp	x0, .LANCHOR11
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L2072
+	bne	.L2187
+	adrp	x0, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR13]
+	cbz	w0, .L2187
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2072
-.L2054:
-	adrp	x0, .LANCHOR67
+	cbnz	w0, .L2187
+.L2169:
+	adrp	x0, .LANCHOR71
 	mov	w23, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	add	w26, w26, w0, lsl 24
-.L2053:
-	adrp	x0, .LANCHOR117
+.L2168:
+	adrp	x0, .LANCHOR123
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR155
+	add	x3, x25, :lo12:.LANCHOR171
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR117]
+	ldrb	w4, [x0, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2049
-.L2072:
+	cbz	w0, .L2164
+.L2187:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2049:
+.L2164:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2057:
+.L2172:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2055
+	bhi	.L2170
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2046
-.L2050:
-	cbz	w23, .L2053
-	b	.L2054
-.L2056:
-	cbz	w23, .L2058
+	b	.L2161
+.L2165:
+	cbz	w23, .L2168
+	b	.L2169
+.L2171:
+	cbz	w23, .L2173
 	adrp	x0, .LANCHOR3
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
@@ -12447,7 +13057,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2058:
+.L2173:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12482,18 +13092,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2073
-	mov	w2, 2052
-	adrp	x1, .LANCHOR165
+	bne	.L2188
+	mov	w2, 2147
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR165
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	adrp	x0, .LC118
+	adrp	x0, .LC129
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC118
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2073:
+.L2188:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -12510,69 +13120,69 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR117
+	adrp	x21, .LANCHOR123
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR167
+	adrp	x22, .LANCHOR174
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR103
+	adrp	x23, .LANCHOR108
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR117]
-	add	x25, x22, :lo12:.LANCHOR167
-	add	x28, x23, :lo12:.LANCHOR103
+	ldrb	w2, [x21, #:lo12:.LANCHOR123]
+	add	x25, x22, :lo12:.LANCHOR174
+	add	x28, x23, :lo12:.LANCHOR108
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR166
+	adrp	x20, .LANCHOR173
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR166
+	add	x0, x20, :lo12:.LANCHOR173
 	bl	ftl_memset
-.L2077:
-	add	x0, x22, :lo12:.LANCHOR167
-	ldrb	w6, [x22, #:lo12:.LANCHOR167]
-	ldrh	w19, [x23, #:lo12:.LANCHOR103]
+.L2192:
+	add	x0, x22, :lo12:.LANCHOR174
+	ldrb	w6, [x22, #:lo12:.LANCHOR174]
+	ldrh	w19, [x23, #:lo12:.LANCHOR108]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR166
-	str	w27, [x20, #:lo12:.LANCHOR166]
+	add	x0, x20, :lo12:.LANCHOR173
+	str	w27, [x20, #:lo12:.LANCHOR173]
 	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2078
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2193
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
-	adrp	x0, .LC120
+	adrp	x0, .LC131
 	str	w6, [x29, 104]
-	add	x0, x0, :lo12:.LC120
+	add	x0, x0, :lo12:.LC131
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2078:
-	adrp	x1, .LANCHOR80
+.L2193:
+	adrp	x1, .LANCHOR83
 	ldrh	w0, [x25, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
 	cmp	w1, w0
-	bhi	.L2079
-	adrp	x19, .LANCHOR168
+	bhi	.L2194
+	adrp	x19, .LANCHOR175
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR168
+	add	x19, x19, :lo12:.LANCHOR175
 	add	x3, x3, :lo12:.LC0
-.L2086:
+.L2201:
 	ldrb	w0, [x25, 1]
-	adrp	x4, .LANCHOR20
+	adrp	x4, .LANCHOR22
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2080
+	bls	.L2195
 	mov	x0, 0
-.L2085:
-	ldr	x2, [x4, #:lo12:.LANCHOR20]
+.L2200:
+	ldr	x2, [x4, #:lo12:.LANCHOR22]
 	add	w1, w0, 8
 	and	w24, w0, 65535
 	add	x1, x2, x1, sxtw
@@ -12580,32 +13190,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2081
+	bhi	.L2196
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
-	mov	w2, 672
+	mov	w2, 742
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2084:
+.L2199:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2080:
-	ldr	x0, [x4, #:lo12:.LANCHOR20]
+.L2195:
+	ldr	x0, [x4, #:lo12:.LANCHOR22]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2086
+	beq	.L2201
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR117]
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR166
+	add	x3, x20, :lo12:.LANCHOR173
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -12613,53 +13223,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2087:
-	ldrb	w4, [x21, #:lo12:.LANCHOR117]
+.L2202:
+	ldrb	w4, [x21, #:lo12:.LANCHOR123]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR166
+	add	x3, x20, :lo12:.LANCHOR173
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR169
+	adrp	x0, .LANCHOR176
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2088
-	ldrb	w1, [x0, #:lo12:.LANCHOR169]
-	cbz	w1, .L2089
-.L2088:
-	strb	wzr, [x0, #:lo12:.LANCHOR169]
-	b	.L2077
-.L2081:
+	beq	.L2203
+	ldrb	w1, [x0, #:lo12:.LANCHOR176]
+	cbz	w1, .L2204
+.L2203:
+	strb	wzr, [x0, #:lo12:.LANCHOR176]
+	b	.L2192
+.L2196:
 	cmp	w2, 255
-	bne	.L2084
+	bne	.L2199
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2085
+	bne	.L2200
 	mov	w24, w0
-	b	.L2084
-.L2079:
+	b	.L2199
+.L2194:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2087
+	cbnz	w0, .L2202
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2087
-.L2089:
-	cbnz	w24, .L2090
-.L2098:
-	adrp	x0, .LANCHOR167
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
+	b	.L2202
+.L2204:
+	cbnz	w24, .L2205
+.L2213:
+	adrp	x0, .LANCHOR174
+	ldrb	w0, [x0, #:lo12:.LANCHOR174]
 	cmp	w0, 255
-	bne	.L2092
-	adrp	x1, .LANCHOR168
+	bne	.L2207
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR168
+	mov	w2, 778
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2092:
+.L2207:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12668,42 +13278,42 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2090:
+.L2205:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR168
+	adrp	x20, .LANCHOR175
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR168
+	add	x20, x20, :lo12:.LANCHOR175
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
-	adrp	x22, .LANCHOR20
-.L2093:
+	adrp	x22, .LANCHOR22
+.L2208:
 	cmp	w19, 7
-	bhi	.L2098
-	ldr	x1, [x22, #:lo12:.LANCHOR20]
+	bhi	.L2213
+	ldr	x1, [x22, #:lo12:.LANCHOR22]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
 	ldrb	w23, [x0, 32]
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2094
-	mov	w2, 701
+	bhi	.L2209
+	mov	w2, 771
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2095:
-	ldrh	w1, [x26, #:lo12:.LANCHOR103]
+.L2210:
+	ldrh	w1, [x26, #:lo12:.LANCHOR108]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2096
-.L2094:
+	b	.L2211
+.L2209:
 	cmp	w23, 255
-	bne	.L2095
-.L2096:
+	bne	.L2210
+.L2211:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2093
+	b	.L2208
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -12711,32 +13321,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR170
-	adrp	x1, .LANCHOR169
+	adrp	x0, .LANCHOR177
+	adrp	x1, .LANCHOR176
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR170]
+	strb	wzr, [x0, #:lo12:.LANCHOR177]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR169]
-	adrp	x1, .LANCHOR171
+	strb	w0, [x1, #:lo12:.LANCHOR176]
+	adrp	x1, .LANCHOR178
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR171]
+	strb	w0, [x1, #:lo12:.LANCHOR178]
 	adrp	x1, .LANCHOR3
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR3]
 	adrp	x1, .LANCHOR2
-	adrp	x22, .LANCHOR97
+	adrp	x22, .LANCHOR100
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR167
+	adrp	x21, .LANCHOR174
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR20
+	adrp	x23, .LANCHOR22
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR103
+	adrp	x26, .LANCHOR108
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR97]
+	str	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -12744,56 +13354,59 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR117
-	ldr	x1, [x23, #:lo12:.LANCHOR20]
-	add	x0, x21, :lo12:.LANCHOR167
+	adrp	x25, .LANCHOR123
+	ldr	x1, [x23, #:lo12:.LANCHOR22]
+	add	x0, x21, :lo12:.LANCHOR174
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR103
-	add	x25, x25, :lo12:.LANCHOR117
+	add	x26, x26, :lo12:.LANCHOR108
+	add	x25, x25, :lo12:.LANCHOR123
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR167]
+	strb	w1, [x21, #:lo12:.LANCHOR174]
 	strh	wzr, [x0, 2]
-.L2114:
-	ldr	x1, [x23, #:lo12:.LANCHOR20]
+.L2229:
+	ldr	x1, [x23, #:lo12:.LANCHOR22]
 	add	w0, w19, 8
 	sxth	w24, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2113
-.L2118:
+	bne	.L2228
+.L2233:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2114
+	bne	.L2229
 	mov	w24, 0
-.L2115:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2119
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+.L2230:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2234
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC122
-	add	x0, x0, :lo12:.LC122
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	bl	printf
-.L2119:
+.L2234:
 	cmn	w19, #1
-	bne	.L2120
+	bne	.L2235
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
+	mov	w1, 8
+	movk	w1, 0x6, lsl 16
+	str	w1, [x0, 12]
 	mov	w0, w19
-.L2112:
+.L2227:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12801,12 +13414,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2113:
+.L2228:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR166
-	add	x7, x7, :lo12:.LANCHOR166
+	adrp	x7, .LANCHOR173
+	add	x7, x7, :lo12:.LANCHOR173
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -12819,7 +13432,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2116
+	bne	.L2231
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -12827,58 +13440,58 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2116:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2117
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+.L2231:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2232
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	mov	w2, w5
 	str	w5, [x29, 124]
-	mov	w3, 580
+	mov	w3, 672
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2117:
+.L2232:
 	cmn	w5, #1
-	beq	.L2118
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2233
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2118
+	bne	.L2233
 	mov	w19, w24
-	b	.L2115
-.L2120:
-	ldr	x1, [x23, #:lo12:.LANCHOR20]
+	b	.L2230
+.L2235:
+	ldr	x1, [x23, #:lo12:.LANCHOR22]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR117
+	adrp	x26, .LANCHOR123
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR117
+	add	x26, x26, :lo12:.LANCHOR123
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR167
-	strb	w1, [x21, #:lo12:.LANCHOR167]
+	add	x0, x21, :lo12:.LANCHOR174
+	strb	w1, [x21, #:lo12:.LANCHOR174]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR166
-	add	x24, x24, :lo12:.LANCHOR166
+	adrp	x24, .LANCHOR173
+	add	x24, x24, :lo12:.LANCHOR173
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR103
-	ldrb	w25, [x21, #:lo12:.LANCHOR167]
-	ldrh	w0, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR108
+	ldrb	w25, [x21, #:lo12:.LANCHOR174]
+	ldrh	w0, [x0, #:lo12:.LANCHOR108]
 	madd	w25, w25, w0, w23
-.L2122:
-	tbnz	w23, #31, .L2127
+.L2237:
+	tbnz	w23, #31, .L2240
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -12886,63 +13499,30 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2123
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	beq	.L2238
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2123
-.L2127:
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
-	add	x21, x21, :lo12:.LANCHOR167
+	bne	.L2238
+.L2240:
+	add	x21, x21, :lo12:.LANCHOR174
 	strh	w19, [x21, 2]
-	ldr	w1, [x0, 16]
-	cmp	w1, 2048
-	bhi	.L2124
-.L2125:
-	ldr	w1, [x0, 24]
-	cmp	w1, 2048
-	bls	.L2128
-	ldr	w2, [x0, 28]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 24]
-.L2128:
-	ldr	w1, [x0, 32]
-	cmp	w1, 1024
-	bls	.L2129
-	ldr	w2, [x0, 36]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 32]
-.L2129:
-	ldr	w1, [x0, 40]
-	cmp	w1, 1024
-	bls	.L2130
-	ldr	w2, [x0, 44]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 40]
-.L2130:
-	ldr	w1, [x0, 64]
-	add	w1, w1, 1
-	str	w1, [x0, 64]
+	bl	ftl_tmp_into_update
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 64]
+	add	w0, w0, 1
+	str	w0, [x1, 64]
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2112
-.L2123:
+	b	.L2227
+.L2238:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2122
-.L2124:
-	ldr	w2, [x0, 20]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 16]
-	b	.L2125
+	b	.L2237
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -12950,57 +13530,57 @@ ftl_info_blk_init:
 	.type	ftl_ext_info_flush, %function
 ftl_ext_info_flush:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR5
+	adrp	x0, .LANCHOR6
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2146
+	cbz	w1, .L2256
 	str	wzr, [x0, 520]
-.L2146:
-	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR172
-	adrp	x21, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR172
-	add	x21, x21, :lo12:.LANCHOR96
+.L2256:
+	adrp	x20, .LANCHOR83
+	adrp	x22, .LANCHOR179
+	adrp	x21, .LANCHOR102
+	add	x20, x20, :lo12:.LANCHOR83
+	add	x22, x22, :lo12:.LANCHOR179
+	add	x21, x21, :lo12:.LANCHOR102
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2147:
-	adrp	x23, .LANCHOR97
+.L2257:
+	adrp	x23, .LANCHOR100
 	mov	x24, x23
-.L2150:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2260:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2148
+	bcc	.L2258
 	bl	ftl_ext_alloc_new_blk
-.L2148:
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+.L2258:
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2149
+	bne	.L2259
 	adrp	x0, .LC0
-	mov	w2, 1639
+	mov	w2, 1747
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2149:
-	ldr	x1, [x24, #:lo12:.LANCHOR97]
+.L2259:
+	ldr	x1, [x24, #:lo12:.LANCHOR100]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR117
-	adrp	x27, .LANCHOR166
-	add	x25, x27, :lo12:.LANCHOR166
+	adrp	x26, .LANCHOR123
+	adrp	x27, .LANCHOR173
+	add	x25, x27, :lo12:.LANCHOR173
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -13008,43 +13588,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR103
-	ldrh	w2, [x0, #:lo12:.LANCHOR103]
+	adrp	x0, .LANCHOR108
+	ldrh	w2, [x0, #:lo12:.LANCHOR108]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR117]
+	ldrb	w2, [x26, #:lo12:.LANCHOR123]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR97]
+	ldr	x0, [x24, #:lo12:.LANCHOR100]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR117]
+	ldrb	w4, [x26, #:lo12:.LANCHOR123]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR166]
+	str	wzr, [x27, #:lo12:.LANCHOR173]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR97]
+	ldr	x2, [x24, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2150
+	beq	.L2260
 	cmn	w0, #1
-	adrp	x0, .LANCHOR171
-	beq	.L2151
-	ldrb	w1, [x0, #:lo12:.LANCHOR171]
-	cbz	w1, .L2152
-.L2151:
-	strb	wzr, [x0, #:lo12:.LANCHOR171]
-	b	.L2147
-.L2152:
+	adrp	x0, .LANCHOR178
+	beq	.L2261
+	ldrb	w1, [x0, #:lo12:.LANCHOR178]
+	cbz	w1, .L2262
+.L2261:
+	strb	wzr, [x0, #:lo12:.LANCHOR178]
+	b	.L2257
+.L2262:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13060,24 +13640,24 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR113
+	adrp	x0, .LANCHOR118
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR97
-	strh	wzr, [x0, #:lo12:.LANCHOR113]
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+	adrp	x23, .LANCHOR100
+	strh	wzr, [x0, #:lo12:.LANCHOR118]
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	stp	x19, x20, [sp, 16]
 	mov	w19, 1
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR166
+	adrp	x25, .LANCHOR173
 	stp	x21, x22, [sp, 32]
 	adrp	x26, ftl_ext_info_data_buffer
 	ldrh	w20, [x0, 130]
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR102
 	stp	x27, x28, [sp, 80]
-	add	x3, x25, :lo12:.LANCHOR166
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	add	x3, x25, :lo12:.LANCHOR173
+	ldrh	w1, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	add	x2, x26, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w0, w1
@@ -13090,32 +13670,32 @@ ftl_ext_info_init:
 	mov	w0, w20
 	bl	flash_get_last_written_page
 	sxth	w22, w0
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2163
-	adrp	x1, .LANCHOR173
-	adrp	x0, .LC66
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2273
+	adrp	x1, .LANCHOR180
+	adrp	x0, .LC72
 	mov	w3, w22
-	mov	w2, 1683
-	add	x1, x1, :lo12:.LANCHOR173
-	add	x0, x0, :lo12:.LC66
+	mov	w2, 1791
+	add	x1, x1, :lo12:.LANCHOR180
+	add	x0, x0, :lo12:.LC72
 	bl	printf
-.L2163:
-	adrp	x27, .LANCHOR117
-	adrp	x28, .LANCHOR103
+.L2273:
+	adrp	x27, .LANCHOR123
+	adrp	x28, .LANCHOR108
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR117
-	add	x28, x28, :lo12:.LANCHOR103
+	add	x27, x27, :lo12:.LANCHOR123
+	add	x28, x28, :lo12:.LANCHOR108
 	mov	w24, 0
 	movk	w5, 0x4549, lsl 16
-.L2164:
+.L2274:
 	and	w21, w22, 65535
 	sub	w0, w21, w24
-	tbnz	x0, 15, .L2169
+	tbnz	x0, 15, .L2279
 	ldrh	w0, [x28]
 	sub	w1, w22, w24
 	ldrb	w4, [x27]
-	add	x3, x25, :lo12:.LANCHOR166
+	add	x3, x25, :lo12:.LANCHOR173
 	str	w5, [x29, 108]
 	add	x2, x26, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w19, w1
@@ -13124,144 +13704,260 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2165
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	beq	.L2275
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2165
-.L2169:
+	bne	.L2275
+.L2279:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w22
-	bgt	.L2167
+	bgt	.L2277
 	add	w21, w21, 1
 	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2167:
-	adrp	x0, .LANCHOR5
+.L2277:
+	adrp	x0, .LANCHOR6
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
+	strh	w1, [x0, 584]
 	ldp	x25, x26, [sp, 64]
+	strh	w1, [x0, 586]
 	ldp	x27, x28, [sp, 80]
+	strh	w1, [x0, 588]
+	strh	w1, [x0, 590]
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR114
-	strh	w1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR66
+	strh	w1, [x0, #:lo12:.LANCHOR66]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2165:
+.L2275:
 	add	w24, w24, 1
-	b	.L2164
+	b	.L2274
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format_data_init,"ax",@progbits
+	.align	2
+	.global	ftl_low_format_data_init
+	.type	ftl_low_format_data_init, %function
+ftl_low_format_data_init:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 16384
+	mov	w1, 0
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	str	x21, [sp, 32]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	adrp	x19, .LANCHOR100
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	mov	w21, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	mov	w0, w21
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2288
+	adrp	x1, .LANCHOR181
+	adrp	x0, .LC0
+	mov	w2, 1974
+	add	x1, x1, :lo12:.LANCHOR181
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2288:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	strh	wzr, [x0, 280]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	adrp	x1, .LANCHOR102
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	ldrh	w2, [x1, #:lo12:.LANCHOR102]
+	mov	w1, 21
+	sub	w1, w1, w2
+	strh	w20, [x0, 692]
+	strh	w21, [x0, 416]
+	asr	w1, w20, w1
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR182
+	adrp	x20, .LANCHOR6
+	ldrh	w1, [x1, #:lo12:.LANCHOR182]
+	strh	w1, [x0, 698]
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w1, 20038
+	movk	w1, 0x4549, lsl 16
+	str	w1, [x0]
+	bl	ftl_alloc_sys_blk
+	mov	w21, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
+	mov	w1, 2
+	strh	w21, [x0, 130]
+	strh	wzr, [x0, 140]
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	str	wzr, [x0, 384]
+	mov	w1, 255
+	str	wzr, [x0, 388]
+	str	wzr, [x0, 392]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x21, [sp, 32]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_low_format_data_init, .-ftl_low_format_data_init
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
 	.global	ftl_low_format
 	.type	ftl_low_format, %function
 ftl_low_format:
 	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR174
+	adrp	x20, .LANCHOR183
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR174
+	add	x20, x20, :lo12:.LANCHOR183
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR20
+	adrp	x22, .LANCHOR22
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
-.L2180:
-	ldr	x0, [x22, #:lo12:.LANCHOR20]
+	bl	printf
+.L2293:
+	ldr	x0, [x22, #:lo12:.LANCHOR22]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2178
-	mov	w2, 1854
+	bhi	.L2291
+	mov	w2, 2024
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2178:
+.L2291:
 	cmp	w21, 255
-	beq	.L2179
-	adrp	x0, .LANCHOR103
-	ldrh	w1, [x0, #:lo12:.LANCHOR103]
+	beq	.L2292
+	adrp	x0, .LANCHOR108
+	ldrh	w1, [x0, #:lo12:.LANCHOR108]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2179:
+.L2292:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2180
+	bne	.L2293
 	bl	sblk_init
-	adrp	x19, .LANCHOR97
-	bl	ftl_info_blk_init
 	adrp	x22, .LANCHOR3
-	mov	w1, 0
+	bl	ftl_info_blk_init
+	adrp	x19, .LANCHOR2
 	mov	w2, 16384
+	mov	w1, 0
 	adrp	x0, ftl_info_data_buffer
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	adrp	x20, .LANCHOR2
-	ldr	x3, [x19, #:lo12:.LANCHOR97]
-	mov	w5, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR3]
-	ldrh	w4, [x20, #:lo12:.LANCHOR2]
-	ldrh	w0, [x3, 134]
-	add	x1, x1, x0, uxth 2
-.L2181:
-	cmp	w0, w4
-	bcc	.L2182
-	mov	w0, 21574
-	adrp	x24, .LANCHOR60
-	add	x24, x24, :lo12:.LANCHOR60
-	movk	w0, 0x494c, lsl 16
-	strh	wzr, [x3, 148]
-	mov	w21, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR3]
+	mov	w3, 1
+	ldrh	w2, [x19, #:lo12:.LANCHOR2]
+	add	x2, x0, x2, lsl 2
+.L2294:
+	cmp	x0, x2
+	bne	.L2295
+	adrp	x21, .LANCHOR100
+	mov	w1, 21574
+	adrp	x24, .LANCHOR62
+	add	x24, x24, :lo12:.LANCHOR62
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
+	movk	w1, 0x494c, lsl 16
+	mov	w20, 0
 	mov	w26, 1
-	str	w0, [x3]
-.L2183:
-	ldrh	w0, [x20, #:lo12:.LANCHOR2]
-	adrp	x23, .LANCHOR95
-	cmp	w0, w21
-	bhi	.L2191
-	adrp	x21, .LANCHOR5
-	mov	w2, 16384
-	mov	w1, 0
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	mov	w1, 20038
-	ldr	x6, [x19, #:lo12:.LANCHOR97]
-	movk	w1, 0x4549, lsl 16
+	strh	wzr, [x0, 148]
+	str	w1, [x0]
+.L2296:
+	ldrh	w0, [x19, #:lo12:.LANCHOR2]
+	adrp	x23, .LANCHOR101
+	cmp	w0, w20
+	bhi	.L2304
+	ldr	x0, [x25, #:lo12:.LANCHOR22]
 	mov	w4, 3
+	ldrb	w2, [x23, #:lo12:.LANCHOR101]
 	mov	w10, 15
-	ldrh	w3, [x6, 148]
-	str	w1, [x0]
-	ldr	x0, [x25, #:lo12:.LANCHOR20]
-	ldrb	w2, [x23, #:lo12:.LANCHOR95]
-	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	ldr	x6, [x21, #:lo12:.LANCHOR100]
 	cmp	w2, 1
-	and	w8, w2, 65535
+	ldr	x1, [x22, #:lo12:.LANCHOR3]
 	ldrb	w0, [x0, 47]
 	csinc	w4, w4, wzr, ne
 	and	w4, w4, 255
+	and	w8, w2, 65535
+	ldrh	w3, [x6, 148]
 	udiv	w0, w0, w2
 	and	w5, w0, 65535
 	ubfiz	x0, x0, 2, 8
 	add	x0, x0, 4
-	add	w24, w5, 1
+	add	w20, w5, 1
 	add	x0, x1, x0
-.L2194:
+.L2307:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -13270,148 +13966,59 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2194
+	bne	.L2307
 	mul	w5, w5, w8
 	mov	w4, 16
-	add	w0, w8, w3
+	add	w0, w3, w8
 	sdiv	w4, w4, w2
 	add	w0, w5, w0, uxth
 	strh	w0, [x6, 148]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	add	w4, w24, w4
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	add	w4, w20, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2195
-	adrp	x0, .LC123
-	mov	w3, w24
+	tbz	x0, 12, .L2308
+	adrp	x0, .LC135
+	mov	w3, w20
 	mov	w2, 128
-	mov	w1, 1901
-	add	x0, x0, :lo12:.LC123
+	mov	w1, 2070
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-.L2195:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2308:
+	ldr	x0, [x21, #:lo12:.LANCHOR100]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
-	ldrb	w6, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR104
-	ldr	x11, [x22, #:lo12:.LANCHOR3]
-	adrp	x22, .LANCHOR96
-	ldr	x8, [x19, #:lo12:.LANCHOR97]
-	and	w7, w6, 65535
-	ldrb	w12, [x0, #:lo12:.LANCHOR104]
-	mov	w2, 21
-	ldrh	w0, [x22, #:lo12:.LANCHOR96]
-	mov	w23, 0
-	mul	w1, w24, w7
-	sub	w0, w2, w0
-	ldrh	w10, [x8, 134]
-	mov	w2, 1
+	adrp	x0, .LANCHOR109
+	ldrb	w13, [x23, #:lo12:.LANCHOR101]
+	ldr	x2, [x21, #:lo12:.LANCHOR100]
+	mov	w4, 21
+	ldrb	w15, [x0, #:lo12:.LANCHOR109]
+	adrp	x0, .LANCHOR102
+	and	w16, w13, 65535
+	ldr	x14, [x22, #:lo12:.LANCHOR3]
+	ldrh	w0, [x0, #:lo12:.LANCHOR102]
+	mov	w3, 0
+	ldrh	w12, [x2, 134]
+	sub	w0, w4, w0
+	mul	w1, w20, w16
+	mov	w4, 1
+	lsl	w4, w4, w0
 	and	w1, w1, 65535
-	lsl	w2, w2, w0
-	and	w2, w2, 65535
-.L2196:
-	cmp	w24, w10
-	bcc	.L2202
-	adrp	x0, .LANCHOR4
-	ldrh	w2, [x20, #:lo12:.LANCHOR2]
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w1, [x20, #:lo12:.LANCHOR2]
-	ldrh	w2, [x0, 134]
-	strh	w23, [x0, 112]
-	sub	w1, w1, w2
-	strh	wzr, [x0, 114]
-	strh	w1, [x0, 116]
-	strh	wzr, [x0, 118]
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w23, w0
-	mov	w1, 0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	mov	w0, w23
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2203
-	adrp	x1, .LANCHOR174
-	adrp	x0, .LC0
-	mov	w2, 1932
-	add	x1, x1, :lo12:.LANCHOR174
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2203:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
-	bl	ftl_memset
-	ldrh	w2, [x22, #:lo12:.LANCHOR96]
-	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	sub	w1, w1, w2
-	asr	w1, w20, w1
-	strh	w1, [x0, 694]
-	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR175
-	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR175]
-	strh	w23, [x0, 416]
-	strh	w1, [x0, 698]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w1, 2
-	strh	w20, [x0, 130]
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
+	and	w4, w4, 65535
+.L2309:
+	cmp	w20, w12
+	bcc	.L2315
+	ldrh	w0, [x19, #:lo12:.LANCHOR2]
+	strh	w3, [x2, 112]
+	sub	w0, w0, w12
+	strh	wzr, [x2, 114]
+	strh	w0, [x2, 116]
+	strh	wzr, [x2, 118]
+	strh	w12, [x2, 132]
+	bl	ftl_low_format_data_init
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13419,39 +14026,37 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2182:
-	ldrb	w2, [x1, 2]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	add	x1, x1, 4
-	and	w2, w2, 31
-	bfi	w2, w5, 3, 2
-	strb	w2, [x1, -2]
-	b	.L2181
-.L2191:
-	strh	w21, [x24]
-	mov	w0, w21
+.L2295:
+	ldrb	w1, [x0, 2]
+	add	x0, x0, 4
+	and	w1, w1, 31
+	bfi	w1, w3, 3, 2
+	strb	w1, [x0, -2]
+	b	.L2294
+.L2304:
+	strh	w20, [x24]
+	mov	w0, w20
 	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR104
+	ldrb	w11, [x23, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR109
 	ldr	x6, [x22, #:lo12:.LANCHOR3]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR104]
+	ldrb	w14, [x0, #:lo12:.LANCHOR109]
 	mov	w10, 0
-	ldr	x13, [x19, #:lo12:.LANCHOR97]
+	ldr	x13, [x21, #:lo12:.LANCHOR100]
 	mov	w8, 0
-	mul	w12, w21, w11
-	add	x6, x6, x21, uxth 2
-.L2184:
+	mul	w12, w20, w11
+	add	x6, x6, x20, uxth 2
+.L2297:
 	cmp	w8, w14
-	bcs	.L2188
+	bcs	.L2301
 	add	w15, w11, w7
-	b	.L2189
-.L2187:
+	b	.L2302
+.L2300:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2185
+	cbz	w0, .L2298
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -13459,241 +14064,141 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2186:
+.L2299:
 	add	w7, w7, 1
-.L2189:
+.L2302:
 	cmp	w7, w15
-	bne	.L2187
+	bne	.L2300
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2184
-.L2185:
+	b	.L2297
+.L2298:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2186
-.L2188:
-	cbnz	w10, .L2190
+	b	.L2299
+.L2301:
+	cbnz	w10, .L2303
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2190:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2183
-.L2202:
-	add	x13, x11, x24, uxth 2
-	mov	w14, 0
-	mov	w15, 0
-	mov	w3, 0
-	ldrb	w0, [x13, 2]
+.L2303:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2296
+.L2315:
+	add	x10, x14, x20, uxth 2
+	mov	w6, 0
+	mov	w8, 0
+	mov	w5, 0
+	ldrb	w0, [x10, 2]
 	orr	w0, w0, -32
-	strb	w0, [x13, 2]
-.L2197:
-	cmp	w3, w12
-	bcc	.L2205
-	add	w24, w24, 1
-	add	w1, w7, w1
-	and	w24, w24, 65535
+	strb	w0, [x10, 2]
+.L2310:
+	cmp	w5, w15
+	bcc	.L2317
+	add	w20, w20, 1
+	add	w1, w16, w1
+	and	w20, w20, 65535
 	and	w1, w1, 65535
-	b	.L2196
-.L2200:
-	ldrb	w5, [x13, 3]
-	add	w16, w15, w4
-	asr	w5, w5, w16
-	tbnz	x5, 0, .L2198
-	cmp	w6, 1
-	bls	.L2204
+	b	.L2309
+.L2313:
+	ldrb	w11, [x10, 3]
+	add	w17, w8, w7
+	asr	w11, w11, w17
+	tbnz	x11, 0, .L2311
+	cmp	w13, 1
+	bls	.L2316
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2199:
-	add	x5, x8, x23, sxtw 1
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	add	w0, w0, w14
-	strh	w0, [x5, 160]
-.L2198:
-	add	x4, x4, 1
-.L2201:
-	and	w0, w4, 65535
-	cmp	w0, w7
-	bcc	.L2200
+.L2312:
+	add	x11, x2, x3, sxtw 1
 	add	w3, w3, 1
-	add	w0, w2, w14
 	and	w3, w3, 65535
-	add	w15, w15, w6
-	and	w14, w0, 65535
-	b	.L2197
-.L2204:
+	add	w0, w0, w6
+	strh	w0, [x11, 160]
+.L2311:
+	add	x7, x7, 1
+.L2314:
+	and	w0, w7, 65535
+	cmp	w0, w16
+	bcc	.L2313
+	add	w5, w5, 1
+	add	w6, w6, w4
+	and	w5, w5, 65535
+	add	w8, w8, w13
+	and	w6, w6, 65535
+	b	.L2310
+.L2316:
 	mov	w0, w1
-	b	.L2199
-.L2205:
-	mov	x4, 0
-	b	.L2201
+	b	.L2312
+.L2317:
+	mov	x7, 0
+	b	.L2314
 	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format_test,"ax",@progbits
+	.section	.text.ftl_re_low_format,"ax",@progbits
 	.align	2
-	.global	ftl_re_low_format_test
-	.type	ftl_re_low_format_test, %function
-ftl_re_low_format_test:
-	stp	x29, x30, [sp, -64]!
+	.global	ftl_re_low_format
+	.type	ftl_re_low_format, %function
+ftl_re_low_format:
+	stp	x29, x30, [sp, -16]!
 	mov	w1, 1
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR97
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR2
-	str	x23, [sp, 48]
 	bl	printf
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	adrp	x3, .LANCHOR3
-	ldrh	w2, [x21, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR100
+	adrp	x2, .LANCHOR2
+	mov	w3, 0
 	mov	w4, 0
-	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	mov	w5, 0
-	mov	w6, 0
+	ldrh	w7, [x2, #:lo12:.LANCHOR2]
+	adrp	x2, .LANCHOR3
+	ldr	x2, [x2, #:lo12:.LANCHOR3]
 	ldrh	w1, [x0, 134]
-	add	x3, x3, x1, uxth 2
-.L2216:
-	cmp	w1, w2
-	bcc	.L2220
-	adrp	x23, .LANCHOR4
-	strh	w6, [x0, 114]
-	strh	w5, [x0, 118]
-	lsl	w2, w2, 1
-	strh	w4, [x0, 116]
-	mov	w1, 0
+	add	x2, x2, x1, uxth 2
+.L2328:
+	cmp	w1, w7
+	bcc	.L2332
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
 	strh	wzr, [x0, 122]
 	strh	wzr, [x0, 120]
 	strh	wzr, [x0, 124]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	bl	ftl_memset
-	bl	zftl_sblk_list_init
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w1, 0
-	mov	w22, w0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	mov	w0, w22
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	mov	w0, 65533
-	sub	w1, w20, #1
-	cmp	w0, w1, uxth
-	bcs	.L2221
-	adrp	x1, .LANCHOR176
-	adrp	x0, .LC0
-	mov	w2, 2004
-	add	x1, x1, :lo12:.LANCHOR176
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2221:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	strh	wzr, [x0, 280]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	mov	w2, 4096
-	mov	w1, 0
-	add	x0, x0, 704
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
-	lsr	w1, w20, 14
-	and	w20, w20, 16383
-	ldrh	w2, [x21, #:lo12:.LANCHOR2]
-	strh	w1, [x0, 694]
-	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR175
-	strh	w20, [x0, 692]
-	adrp	x20, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR175]
-	lsl	w2, w2, 1
-	strh	w22, [x0, 416]
-	strh	w1, [x0, 698]
-	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	mov	w1, 2
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	str	wzr, [x0, 520]
-	str	wzr, [x0, 524]
-	str	wzr, [x0, 528]
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
-	ldr	x23, [sp, 48]
+	bl	ftl_low_format_data_init
 	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	ldp	x29, x30, [sp], 16
 	ret
-.L2220:
-	ldrb	w7, [x3, 2]
-	and	w8, w7, 31
-	strb	w8, [x3, 2]
-	ands	w7, w7, 24
-	bne	.L2217
-	add	w6, w6, 1
-	and	w6, w6, 65535
-.L2218:
-	add	w1, w1, 1
-	add	x3, x3, 4
-	and	w1, w1, 65535
-	b	.L2216
-.L2217:
-	cmp	w7, 16
-	bne	.L2219
+.L2332:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L2329
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L2218
-.L2219:
+.L2330:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L2328
+.L2329:
+	cmp	w6, 16
+	bne	.L2331
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2218
-	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	b	.L2330
+.L2331:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L2330
+	.size	ftl_re_low_format, .-ftl_re_low_format
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
 	.global	ftl_prog_ppa_page
@@ -13714,50 +14219,50 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2226
+	bne	.L2337
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR109
+	adrp	x1, .LANCHOR114
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR109]
+	ldr	x20, [x1, #:lo12:.LANCHOR114]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2227
+	beq	.L2338
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR155
+	adrp	x0, .LANCHOR171
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR155
+	add	x6, x0, :lo12:.LANCHOR171
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR155]
-	adrp	x0, .LANCHOR80
-	ldrh	w1, [x0, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR72
-	ldrb	w0, [x0, #:lo12:.LANCHOR72]
-	mul	w1, w1, w0
-	mov	x0, x20
+	str	w1, [x0, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR83
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR76
+	ldrb	w0, [x0, #:lo12:.LANCHOR76]
+	mul	w1, w1, w0
+	mov	x0, x20
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR123
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR117]
+	ldrb	w3, [x0, #:lo12:.LANCHOR123]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2227:
+.L2338:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2226:
+.L2337:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -13766,309 +14271,286 @@ ftl_write_last_log_page:
 	.global	ftl_open_sblk_recovery
 	.type	ftl_open_sblk_recovery, %function
 ftl_open_sblk_recovery:
-	sub	sp, sp, #192
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x21, x22, [sp, 80]
-	adrp	x22, .LANCHOR7
-	stp	x27, x28, [sp, 128]
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR9
+	stp	x27, x28, [sp, 80]
 	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	stp	x25, x26, [sp, 112]
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	stp	x25, x26, [sp, 64]
 	mov	x25, x1
-	stp	x19, x20, [sp, 64]
-	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L2233
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	tbz	x0, 12, .L2344
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2233:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2234
+.L2344:
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2345
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2234:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2235
+.L2345:
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2346
 	ldrh	w1, [x28]
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2235:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2236
+.L2346:
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2347
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC128
+	adrp	x0, .LC140
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC128
+	add	x0, x0, :lo12:.LC140
 	bl	printf
-.L2236:
+.L2347:
 	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR117
 	strh	w0, [x28, 14]
-	mov	w27, 0
+	adrp	x0, .LANCHOR2
+	ldrh	w1, [x28]
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w1, w0
+	bcs	.L2343
 	mov	w0, 1
-	adrp	x23, .LANCHOR80
 	bl	buf_alloc
 	ldrb	w20, [x28, 5]
-	ldrh	w21, [x28, 2]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR117
+	ldrh	w21, [x28, 2]
+	adrp	x26, .LANCHOR123
+	mov	w27, 0
+	add	x0, x26, :lo12:.LANCHOR123
+	adrp	x23, .LANCHOR83
 	str	x0, [x29, 128]
-.L2237:
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+.L2350:
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
 	cmp	w0, w21
-	bhi	.L2251
-.L2240:
+	bhi	.L2363
+.L2353:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
-	ldrh	w2, [x23, #:lo12:.LANCHOR80]
+	ldrh	w2, [x23, #:lo12:.LANCHOR83]
 	add	w1, w1, w0
 	ldrb	w0, [x28, 9]
 	strh	w21, [x28, 2]
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2252
-	adrp	x1, .LANCHOR177
+	beq	.L2364
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1365
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1473
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2252:
-	adrp	x21, .LANCHOR109
+.L2364:
+	adrp	x21, .LANCHOR114
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR109]
-.L2253:
+	ldr	x5, [x21, #:lo12:.LANCHOR114]
+.L2365:
 	cmp	w1, w3
-	bcc	.L2255
+	bcc	.L2367
 	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR4
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	adrp	x24, .LANCHOR5
+	ldrh	w1, [x23, #:lo12:.LANCHOR83]
 	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2256
+	tbz	x0, 12, .L2368
 	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR4]
+	ldr	x2, [x24, #:lo12:.LANCHOR5]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC130
+	adrp	x0, .LC141
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC130
+	add	x0, x0, :lo12:.LC141
 	bl	printf
-.L2256:
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x25, .LANCHOR117
+.L2368:
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	adrp	x25, .LANCHOR123
 	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR72
-	adrp	x26, .LC131
-	add	x24, x24, :lo12:.LANCHOR72
-	add	x25, x25, :lo12:.LANCHOR117
-	add	x26, x26, :lo12:.LC131
+	adrp	x24, .LANCHOR76
+	adrp	x26, .LC142
+	add	x24, x24, :lo12:.LANCHOR76
+	add	x25, x25, :lo12:.LANCHOR123
+	add	x26, x26, :lo12:.LC142
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2257:
+.L2369:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2260
+	bcc	.L2372
 	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR109]
+	ldr	x1, [x21, #:lo12:.LANCHOR114]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2261
-	adrp	x1, .LANCHOR177
+	beq	.L2373
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1395
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1503
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2261:
+.L2373:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2232
-	ldp	x19, x20, [sp, 64]
+	bne	.L2343
+	ldp	x19, x20, [sp, 16]
 	mov	x0, x28
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 192
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	b	ftl_write_last_log_page
-.L2251:
+.L2363:
 	ldrb	w20, [x28, 5]
-	adrp	x0, .LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR103
+	adrp	x24, .LANCHOR108
+	add	x0, x24, :lo12:.LANCHOR108
 	str	x0, [x29, 136]
-.L2238:
+.L2351:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2250
+	bhi	.L2362
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2237
-.L2250:
+	b	.L2350
+.L2362:
 	add	x0, x28, x20, sxtw 1
-	ldrh	w11, [x0, 16]
-	mov	w0, 65535
-	cmp	w11, w0
-	beq	.L2239
-	ldr	x0, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR117]
-	ldr	x1, [x19, 8]
+	mov	w1, 65535
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	beq	.L2352
+	ldr	x1, [x29, 136]
+	ldrb	w3, [x26, #:lo12:.LANCHOR123]
 	ldr	x2, [x19, 24]
-	ldrh	w10, [x0]
-	madd	w10, w10, w11, w21
-	stp	w11, w10, [x29, 116]
-	mov	w0, w10
+	ldrh	w5, [x1]
+	ldr	x1, [x19, 8]
+	madd	w0, w5, w0, w21
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2240
+	beq	.L2353
 	cmn	w0, #1
-	ldp	w11, w10, [x29, 116]
-	beq	.L2241
+	beq	.L2354
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2241
+	bne	.L2354
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2241
+	bne	.L2354
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2240
-.L2241:
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2242
-	ldr	x1, [x19, 24]
-	mov	w4, w24
-	ldr	x0, [x19, 8]
-	mov	w3, w10
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w21
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w11
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
-	bl	printf
-.L2242:
-	adrp	x0, .LANCHOR170
+	beq	.L2353
+.L2354:
+	adrp	x0, .LANCHOR177
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR170]
+	strb	w1, [x0, #:lo12:.LANCHOR177]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2243
-	adrp	x1, .LANCHOR177
+	beq	.L2355
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1288
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1396
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2243:
+.L2355:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
 	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrh	w0, [x23, #:lo12:.LANCHOR83]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2244
-	adrp	x1, .LANCHOR177
+	beq	.L2356
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 1289
-	add	x1, x1, :lo12:.LANCHOR177
+	mov	w2, 1397
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2244:
+.L2356:
 	cmn	w24, #1
-	beq	.L2246
+	beq	.L2358
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2246
+	beq	.L2358
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2248
+	cbz	x25, .L2360
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2248
+	beq	.L2360
 	cmn	w0, #1
-	beq	.L2248
-	adrp	x4, .LANCHOR96
-	mov	w27, 21
-	mov	w24, 1
-	ldrh	w5, [x4, #:lo12:.LANCHOR96]
-	sub	w1, w27, w5
-	lsr	w2, w0, w5
-	adrp	x5, .LANCHOR95
-	lsl	w1, w24, w1
+	beq	.L2360
+	adrp	x6, .LANCHOR102
+	mov	w5, 21
+	mov	w27, 1
+	ldrh	w7, [x6, #:lo12:.LANCHOR102]
+	sub	w1, w5, w7
+	lsr	w2, w0, w7
+	adrp	x7, .LANCHOR101
+	lsl	w1, w27, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x5, #:lo12:.LANCHOR95]
+	ldrb	w2, [x7, #:lo12:.LANCHOR101]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2248
+	bne	.L2360
 	ldr	x1, [x29, 128]
-	adrp	x6, .LANCHOR166
-	ldr	w7, [x3]
-	add	x2, x6, :lo12:.LANCHOR166
-	str	w7, [x29, 116]
-	str	x6, [x29, 120]
+	adrp	x8, .LANCHOR173
+	ldr	w10, [x3]
+	add	x2, x8, :lo12:.LANCHOR173
+	stp	w5, w10, [x29, 112]
+	str	x8, [x29, 120]
 	ldrb	w3, [x1]
 	ldr	x1, [x19, 8]
-	stp	x5, x4, [x29, 96]
+	stp	x7, x6, [x29, 96]
 	bl	ftl_read_ppa_page
-	ldr	x6, [x29, 120]
-	ldr	w7, [x29, 116]
-	ldr	w0, [x6, #:lo12:.LANCHOR166]
-	cmp	w7, w0
-	bhi	.L2248
+	ldr	x8, [x29, 120]
+	ldr	w10, [x29, 116]
+	ldr	w0, [x8, #:lo12:.LANCHOR173]
+	cmp	w10, w0
+	bhi	.L2360
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2246
-	ldp	x5, x4, [x29, 96]
-	ldrh	w1, [x4, #:lo12:.LANCHOR96]
-	sub	w27, w27, w1
+	beq	.L2358
+	ldp	x7, x6, [x29, 96]
+	ldr	w5, [x29, 112]
+	ldrh	w1, [x6, #:lo12:.LANCHOR102]
+	sub	w5, w5, w1
 	lsr	w0, w0, w1
-	lsl	w24, w24, w27
-	sub	w24, w24, #1
-	and	w24, w24, w0
-	ldrb	w0, [x5, #:lo12:.LANCHOR95]
-	udiv	w0, w24, w0
+	lsl	w27, w27, w5
+	sub	w27, w27, #1
+	and	w27, w27, w0
+	ldrb	w0, [x7, #:lo12:.LANCHOR101]
+	udiv	w0, w27, w0
 	bl	ftl_vpn_decrement
-.L2246:
+.L2358:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14076,41 +14558,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2239:
+.L2352:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2238
-.L2255:
+	b	.L2351
+.L2367:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
-	ldr	w2, [x4, x2, lsl 2]
+	ldr	w2, [x5, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2254
+	beq	.L2366
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2254:
+.L2366:
 	add	w1, w1, 1
-	b	.L2253
-.L2260:
-	cbz	w27, .L2258
+	b	.L2365
+.L2372:
+	cbz	w27, .L2370
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2258
+	bls	.L2370
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2259
+	ldr	w0, [x22, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2371
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2259:
-	adrp	x0, .LANCHOR97
+.L2371:
+	adrp	x0, .LANCHOR100
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -14122,44 +14604,43 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2258:
+.L2370:
 	add	w20, w20, 1
-	b	.L2257
-.L2248:
+	b	.L2369
+.L2360:
 	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR54
-	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR56
+	ldr	w0, [x0, #:lo12:.LANCHOR56]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2246
+	bcs	.L2358
 	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	ldrh	w1, [x23, #:lo12:.LANCHOR83]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2246
-	adrp	x0, .LANCHOR97
+	bge	.L2358
+	adrp	x0, .LANCHOR100
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
-	ldr	w4, [x0, 8]
-	cmp	w1, w4
-	bls	.L2249
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
+	ldr	w5, [x0, 8]
+	cmp	w1, w5
+	bls	.L2361
 	str	w1, [x0, 8]
-.L2249:
+.L2361:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2246
-.L2232:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 192
+	b	.L2358
+.L2343:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
@@ -14172,94 +14653,94 @@ pm_write_page:
 	stp	x19, x20, [sp, 16]
 	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR80
+	adrp	x21, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR103
+	adrp	x22, .LANCHOR108
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR97
+	adrp	x23, .LANCHOR100
 	mov	x25, x1
-	add	x21, x21, :lo12:.LANCHOR80
+	add	x21, x21, :lo12:.LANCHOR83
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR103
+	add	x22, x22, :lo12:.LANCHOR108
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2314:
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2423:
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2315
+	bcs	.L2424
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2316
-.L2315:
+	bne	.L2425
+.L2424:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2316:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+.L2425:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2317
-	adrp	x1, .LANCHOR178
+	bne	.L2426
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
-	mov	w2, 228
-	add	x1, x1, :lo12:.LANCHOR178
+	mov	w2, 230
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2317:
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
-	adrp	x27, .LANCHOR179
+.L2426:
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
+	adrp	x27, .LANCHOR186
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR179]
+	ldr	x0, [x27, #:lo12:.LANCHOR186]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR179]
+	ldr	x3, [x27, #:lo12:.LANCHOR186]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR117
-	ldrb	w4, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR123
+	ldrb	w4, [x1, #:lo12:.LANCHOR123]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR180
-	beq	.L2318
-	ldrb	w3, [x1, #:lo12:.LANCHOR180]
-	cbz	w3, .L2319
-.L2318:
-	strb	wzr, [x1, #:lo12:.LANCHOR180]
-	b	.L2314
-.L2319:
+	adrp	x1, .LANCHOR187
+	beq	.L2427
+	ldrb	w3, [x1, #:lo12:.LANCHOR187]
+	cbz	w3, .L2428
+.L2427:
+	strb	wzr, [x1, #:lo12:.LANCHOR187]
+	b	.L2423
+.L2428:
 	cmn	w0, #1
-	bne	.L2321
+	bne	.L2430
 	mov	w1, w26
-	adrp	x0, .LC132
-	add	x0, x0, :lo12:.LC132
+	adrp	x0, .LC143
+	add	x0, x0, :lo12:.LC143
 	bl	printf
-	b	.L2314
-.L2321:
+	b	.L2423
+.L2430:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2322
+	bcs	.L2431
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2322:
+.L2431:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -14275,51 +14756,51 @@ pm_write_page:
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2328
-	adrp	x2, .LANCHOR181
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR181
+	tbz	x0, 12, .L2437
+	adrp	x2, .LANCHOR188
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR188
 	mov	w1, 251
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2328:
-	adrp	x23, .LANCHOR150
-	adrp	x20, .LANCHOR20
+.L2437:
+	adrp	x23, .LANCHOR157
+	adrp	x20, .LANCHOR22
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR150]
-	adrp	x21, .LANCHOR151
-	adrp	x22, .LANCHOR26
-	adrp	x24, .LC134
-	adrp	x25, .LANCHOR128
-	add	x22, x22, :lo12:.LANCHOR26
-	add	x24, x24, :lo12:.LC134
-	add	x25, x25, :lo12:.LANCHOR128
+	ldr	x0, [x23, #:lo12:.LANCHOR157]
+	adrp	x21, .LANCHOR158
+	adrp	x22, .LANCHOR28
+	adrp	x24, .LC145
+	adrp	x25, .LANCHOR134
+	add	x22, x22, :lo12:.LANCHOR28
+	add	x24, x24, :lo12:.LC145
+	add	x25, x25, :lo12:.LANCHOR134
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR151
-	ldr	x1, [x20, #:lo12:.LANCHOR20]
+	add	x27, x21, :lo12:.LANCHOR158
+	ldr	x1, [x20, #:lo12:.LANCHOR22]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC133
-	add	x0, x0, :lo12:.LC133
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	mov	w26, 0
 	bl	rknand_print_hex
-	ldr	x6, [x20, #:lo12:.LANCHOR20]
+	ldr	x6, [x20, #:lo12:.LANCHOR22]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2329:
-	add	x28, x21, :lo12:.LANCHOR151
-	ldrb	w4, [x21, #:lo12:.LANCHOR151]
+.L2438:
+	add	x28, x21, :lo12:.LANCHOR158
+	ldrb	w4, [x21, #:lo12:.LANCHOR158]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -14332,40 +14813,40 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2330
-	ldr	x6, [x20, #:lo12:.LANCHOR20]
+	blt	.L2439
+	ldr	x6, [x20, #:lo12:.LANCHOR22]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR151]
+	ldrb	w0, [x21, #:lo12:.LANCHOR158]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR151]
+	strb	w7, [x21, #:lo12:.LANCHOR158]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2339:
+.L2448:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2331
-.L2334:
+	b	.L2440
+.L2443:
 	mov	w26, 1
-	b	.L2329
-.L2330:
+	b	.L2438
+.L2439:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2339
-.L2331:
-	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	cbz	w1, .L2448
+.L2440:
+	ldr	x2, [x20, #:lo12:.LANCHOR22]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR150]
+	ldr	x3, [x23, #:lo12:.LANCHOR157]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -14379,14 +14860,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2332
+	bne	.L2441
 	mov	w1, w19
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
 	bl	printf
-	b	.L2329
-.L2332:
-	cbz	w26, .L2334
+	b	.L2438
+.L2441:
+	cbz	w26, .L2443
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14404,49 +14885,49 @@ nand_flash_init:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR7
+	adrp	x21, .LANCHOR9
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2341
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+	tbz	x0, 12, .L2450
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2101
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2341:
-	adrp	x22, .LANCHOR9
-	adrp	x20, .LANCHOR38
-	add	x24, x20, :lo12:.LANCHOR38
+.L2450:
+	adrp	x22, .LANCHOR11
+	adrp	x20, .LANCHOR40
+	add	x24, x20, :lo12:.LANCHOR40
 	mov	x0, x19
-	adrp	x25, .LANCHOR33
+	adrp	x25, .LANCHOR35
 	bl	nandc_init
-	add	x25, x25, :lo12:.LANCHOR33
+	add	x25, x25, :lo12:.LANCHOR35
 	mov	x26, x24
-	adrp	x19, .LANCHOR32
+	adrp	x19, .LANCHOR34
 	mov	x23, 0
-	add	x0, x19, :lo12:.LANCHOR32
+	add	x0, x19, :lo12:.LANCHOR34
 	mov	w27, 2
-	str	x0, [x22, #:lo12:.LANCHOR9]
+	str	x0, [x22, #:lo12:.LANCHOR11]
 	mov	w28, 44
-.L2347:
+.L2456:
 	mov	x1, x24
 	mov	w0, w23
 	bl	flash_read_id
 	strb	w27, [x23, x25]
-	cbnz	x23, .L2342
+	cbnz	x23, .L2451
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2343
-.L2345:
+	bls	.L2452
+.L2454:
 	mov	w19, -2
-.L2340:
+.L2449:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14455,326 +14936,326 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2343:
+.L2452:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2345
-.L2342:
+	beq	.L2454
+.L2451:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2346
+	bne	.L2455
 	strb	w28, [x24]
-.L2346:
+.L2455:
 	add	x23, x23, 1
 	add	x24, x24, 8
 	cmp	x23, 4
-	bne	.L2347
-	adrp	x0, .LANCHOR183
-	add	x8, x0, :lo12:.LANCHOR183
+	bne	.L2456
+	adrp	x0, .LANCHOR190
+	add	x8, x0, :lo12:.LANCHOR190
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR38
+	add	x12, x20, :lo12:.LANCHOR40
 	mov	x10, 0
-.L2350:
+.L2459:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2348
-	add	x0, x7, :lo12:.LANCHOR183
+	cbnz	w0, .L2457
+	add	x0, x7, :lo12:.LANCHOR190
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR184
-	add	x4, x1, :lo12:.LANCHOR184
+	adrp	x1, .LANCHOR191
+	add	x4, x1, :lo12:.LANCHOR191
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2349:
+.L2458:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2351
+	beq	.L2460
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2349
+	bne	.L2458
 	mov	w2, w0
-.L2351:
+.L2460:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR191
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR13
-	add	x0, x0, :lo12:.LANCHOR13
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
 	bl	ftl_memcpy
-	add	x23, x19, :lo12:.LANCHOR32
+	add	x23, x19, :lo12:.LANCHOR34
 	mov	x1, x24
-	adrp	x24, .LANCHOR22
+	adrp	x24, .LANCHOR24
 	mov	w2, 32
 	mov	x0, x23
 	bl	ftl_memcpy
-	ldrb	w0, [x24, #:lo12:.LANCHOR22]
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	cmp	w0, 8
-	bhi	.L2352
+	bhi	.L2461
 	ldrb	w1, [x23, 20]
 	cmp	w1, 60
-	bls	.L2353
+	bls	.L2462
 	mov	w1, 60
 	strb	w1, [x23, 20]
-.L2353:
+.L2462:
 	cmp	w0, 8
-	bne	.L2352
-	ldrb	w0, [x20, #:lo12:.LANCHOR38]
+	bne	.L2461
+	ldrb	w0, [x20, #:lo12:.LANCHOR40]
 	cmp	w0, 44
-	bne	.L2352
-	add	x0, x19, :lo12:.LANCHOR32
+	bne	.L2461
+	add	x0, x19, :lo12:.LANCHOR34
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2352
+	bne	.L2461
 	strb	wzr, [x0, 28]
-.L2352:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2354
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+.L2461:
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2463
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2122
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2354:
+.L2463:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR153
-	adrp	x25, .LANCHOR20
-	add	x20, x19, :lo12:.LANCHOR32
-	adrp	x23, .LANCHOR39
-	str	x0, [x1, #:lo12:.LANCHOR153]
+	adrp	x1, .LANCHOR160
+	adrp	x25, .LANCHOR22
+	add	x20, x19, :lo12:.LANCHOR34
+	adrp	x23, .LANCHOR41
+	str	x0, [x1, #:lo12:.LANCHOR160]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR143
-	str	x0, [x1, #:lo12:.LANCHOR143]
+	adrp	x1, .LANCHOR150
+	str	x0, [x1, #:lo12:.LANCHOR150]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x25, #:lo12:.LANCHOR20]
+	str	x0, [x25, #:lo12:.LANCHOR22]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR152
-	str	x0, [x1, #:lo12:.LANCHOR152]
+	adrp	x1, .LANCHOR159
+	str	x0, [x1, #:lo12:.LANCHOR159]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR145
-	str	x0, [x1, #:lo12:.LANCHOR145]
+	adrp	x1, .LANCHOR152
+	str	x0, [x1, #:lo12:.LANCHOR152]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR150
-	str	x0, [x1, #:lo12:.LANCHOR150]
-	adrp	x0, .LANCHOR157
-	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR157
+	str	x0, [x1, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR163
+	strb	wzr, [x0, #:lo12:.LANCHOR163]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR148
+	adrp	x20, .LANCHOR155
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR148]
-	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	str	xzr, [x20, #:lo12:.LANCHOR155]
+	ldr	x1, [x22, #:lo12:.LANCHOR11]
 	mov	x22, x25
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
-	strb	w2, [x23, #:lo12:.LANCHOR39]
-	adrp	x2, .LANCHOR185
+	strb	w2, [x23, #:lo12:.LANCHOR41]
+	adrp	x2, .LANCHOR192
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR185]
-	adrp	x2, .LANCHOR36
+	strb	w3, [x2, #:lo12:.LANCHOR192]
+	adrp	x2, .LANCHOR38
 	ubfx	x3, x0, 4, 1
-	strb	w3, [x2, #:lo12:.LANCHOR36]
-	adrp	x2, .LANCHOR69
+	strb	w3, [x2, #:lo12:.LANCHOR38]
+	adrp	x2, .LANCHOR73
 	ubfx	x3, x0, 12, 1
-	strb	w3, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR102
+	strb	w3, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR107
 	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR102]
-	adrp	x2, .LANCHOR25
-	strb	w0, [x2, #:lo12:.LANCHOR25]
+	strb	w3, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR27
+	strb	w0, [x2, #:lo12:.LANCHOR27]
 	mov	w2, 60
 	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR11
-	strb	w0, [x1, #:lo12:.LANCHOR11]
-	adrp	x1, .LANCHOR10
-	strb	w2, [x1, #:lo12:.LANCHOR10]
-	ldrb	w2, [x24, #:lo12:.LANCHOR22]
+	adrp	x1, .LANCHOR13
+	strb	w0, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR12
+	strb	w2, [x1, #:lo12:.LANCHOR12]
+	ldrb	w2, [x24, #:lo12:.LANCHOR24]
 	cmp	w2, 9
-	bne	.L2355
+	bne	.L2464
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR10]
-.L2355:
-	add	x19, x19, :lo12:.LANCHOR32
-	adrp	x1, .LANCHOR158
-	adrp	x25, .LANCHOR17
-	strb	w0, [x1, #:lo12:.LANCHOR158]
+	strb	w2, [x1, #:lo12:.LANCHOR12]
+.L2464:
+	add	x19, x19, :lo12:.LANCHOR34
+	adrp	x1, .LANCHOR164
+	adrp	x25, .LANCHOR19
+	strb	w0, [x1, #:lo12:.LANCHOR164]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x25, #:lo12:.LANCHOR17]
-	tbz	x1, 6, .L2357
+	strb	w0, [x25, #:lo12:.LANCHOR19]
+	tbz	x1, 6, .L2466
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2358
+	bhi	.L2467
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR148]
+	str	x1, [x20, #:lo12:.LANCHOR155]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR146
-	beq	.L2359
+	adrp	x0, .LANCHOR153
+	beq	.L2468
 	mov	w1, 7
-.L2402:
-	strb	w1, [x0, #:lo12:.LANCHOR146]
-	b	.L2357
-.L2348:
+.L2511:
+	strb	w1, [x0, #:lo12:.LANCHOR153]
+	b	.L2466
+.L2457:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2350
-	b	.L2345
-.L2359:
+	bne	.L2459
+	b	.L2454
+.L2468:
 	mov	w1, 15
-	b	.L2402
-.L2358:
+	b	.L2511
+.L2467:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2361
+	bhi	.L2470
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR19
+	str	x0, [x20, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR21
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2404:
+	strb	w1, [x0, #:lo12:.LANCHOR21]
+.L2513:
 	mov	w1, 7
-	adrp	x0, .LANCHOR146
-	b	.L2402
-.L2361:
+	adrp	x0, .LANCHOR153
+	b	.L2511
+.L2470:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2362
+	bhi	.L2471
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR148]
+	str	x2, [x20, #:lo12:.LANCHOR155]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR146
-	beq	.L2363
+	adrp	x0, .LANCHOR153
+	beq	.L2472
 	mov	w2, 7
-.L2401:
-	strb	w2, [x0, #:lo12:.LANCHOR146]
+.L2510:
+	strb	w2, [x0, #:lo12:.LANCHOR153]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR19
-	bhi	.L2365
+	adrp	x0, .LANCHOR21
+	bhi	.L2474
 	mov	w1, 4
-.L2403:
-	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2357:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2366
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+.L2512:
+	strb	w1, [x0, #:lo12:.LANCHOR21]
+.L2466:
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2475
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2170
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2366:
-	adrp	x24, .LANCHOR14
-	ldrb	w0, [x23, #:lo12:.LANCHOR39]
-	strb	wzr, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 0, .L2367
+.L2475:
+	adrp	x24, .LANCHOR16
+	ldrb	w0, [x23, #:lo12:.LANCHOR41]
+	strb	wzr, [x24, #:lo12:.LANCHOR16]
+	tbz	x0, 0, .L2476
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2405:
+.L2514:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2369
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2340
-	adrp	x2, .LANCHOR182
+	bne	.L2478
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2449
+	adrp	x2, .LANCHOR189
 	mov	w1, 2190
-	add	x2, x2, :lo12:.LANCHOR182
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
+	add	x2, x2, :lo12:.LANCHOR189
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-	b	.L2340
-.L2363:
+	b	.L2449
+.L2472:
 	mov	w2, 17
-	b	.L2401
-.L2365:
+	b	.L2510
+.L2474:
 	mov	w1, 5
-	b	.L2403
-.L2362:
+	b	.L2512
+.L2471:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2357
+	bhi	.L2466
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR148]
-	b	.L2404
-.L2367:
+	str	x0, [x20, #:lo12:.LANCHOR155]
+	b	.L2513
+.L2476:
 	mov	w0, 4
-	b	.L2405
-.L2369:
-	ldrb	w0, [x25, #:lo12:.LANCHOR17]
+	b	.L2514
+.L2478:
+	ldrb	w0, [x25, #:lo12:.LANCHOR19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2370
+	bhi	.L2479
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR148]
-.L2370:
-	ldrb	w0, [x23, #:lo12:.LANCHOR39]
-	tbz	x0, 2, .L2372
-	ldr	x0, [x22, #:lo12:.LANCHOR20]
+	str	x0, [x20, #:lo12:.LANCHOR155]
+.L2479:
+	ldrb	w0, [x23, #:lo12:.LANCHOR41]
+	tbz	x0, 2, .L2481
+	ldr	x0, [x22, #:lo12:.LANCHOR22]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2372
-	adrp	x0, .LANCHOR151
-	ldrb	w1, [x0, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR26
-	ldrh	w0, [x0, #:lo12:.LANCHOR26]
+	cbz	w0, .L2481
+	adrp	x0, .LANCHOR158
+	ldrb	w1, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR28
+	ldrh	w0, [x0, #:lo12:.LANCHOR28]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x24, #:lo12:.LANCHOR14]
-	cbnz	w0, .L2372
-	ldr	x0, [x22, #:lo12:.LANCHOR20]
+	ldrb	w0, [x24, #:lo12:.LANCHOR16]
+	cbnz	w0, .L2481
+	ldr	x0, [x22, #:lo12:.LANCHOR22]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2372:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2374
-	adrp	x2, .LANCHOR182
-	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR182
+.L2481:
+	ldr	w0, [x21, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2483
+	adrp	x2, .LANCHOR189
+	adrp	x0, .LC84
+	add	x2, x2, :lo12:.LANCHOR189
 	mov	w1, 2243
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC84
 	bl	printf
-.L2374:
+.L2483:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2340
+	b	.L2449
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -14791,31 +15272,31 @@ ftl_sysblk_dump:
 	stp	x25, x26, [sp, 112]
 	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	adrp	x26, .LANCHOR80
+	adrp	x26, .LANCHOR83
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR103
-	adrp	x28, .LANCHOR117
+	adrp	x27, .LANCHOR108
+	adrp	x28, .LANCHOR123
 	mov	x25, x0
-	add	x26, x26, :lo12:.LANCHOR80
-	add	x27, x27, :lo12:.LANCHOR103
-	add	x28, x28, :lo12:.LANCHOR117
+	add	x26, x26, :lo12:.LANCHOR83
+	add	x27, x27, :lo12:.LANCHOR108
+	add	x28, x28, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2407:
+.L2516:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2409
+	bhi	.L2518
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2410
-	adrp	x1, .LANCHOR186
+	cbz	w20, .L2519
+	adrp	x1, .LANCHOR193
 	adrp	x0, .LC0
-	mov	w2, 1232
-	add	x1, x1, :lo12:.LANCHOR186
+	mov	w2, 1339
+	add	x1, x1, :lo12:.LANCHOR193
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2410:
+.L2519:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -14825,7 +15306,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2409:
+.L2518:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -14854,19 +15335,19 @@ ftl_sysblk_dump:
 	mov	w1, w23
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
 	add	x1, x24, 704
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	rknand_print_hex
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2407
+	b	.L2516
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -14874,81 +15355,81 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR50
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR48]
-	adrp	x0, .LC137
+	ldrb	w1, [x0, #:lo12:.LANCHOR50]
+	adrp	x0, .LC149
 	stp	x19, x20, [sp, 16]
-	add	x0, x0, :lo12:.LC137
+	add	x0, x0, :lo12:.LC149
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR97
-	adrp	x19, .LANCHOR5
-	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR100
+	adrp	x19, .LANCHOR6
+	adrp	x20, .LANCHOR83
 	bl	printf
 	adrp	x21, .LANCHOR2
-	adrp	x0, .LANCHOR167
-	add	x1, x0, :lo12:.LANCHOR167
+	adrp	x0, .LANCHOR174
+	add	x1, x0, :lo12:.LANCHOR174
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR167]
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	ldrb	w1, [x0, #:lo12:.LANCHOR174]
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC139
-	add	x0, x0, :lo12:.LC139
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC140
-	add	x0, x0, :lo12:.LC140
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
 	ldrh	w2, [x1, 18]
 	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
 	ldrh	w2, [x1, 50]
 	ldrh	w1, [x1, 48]
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x19, .LANCHOR72
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	adrp	x19, .LANCHOR76
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
 	ldrh	w2, [x1, 82]
 	ldrh	w1, [x1, 80]
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR109
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LC143
+	adrp	x0, .LANCHOR114
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LC155
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC143
+	add	x0, x0, :lo12:.LC155
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	adrp	x0, .LC144
-	add	x0, x0, :lo12:.LC144
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
@@ -14956,28 +15437,28 @@ dump_ftl_info:
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR108
-	adrp	x0, .LC146
-	add	x1, x1, :lo12:.LANCHOR108
-	add	x0, x0, :lo12:.LC146
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LC158
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LC158
 	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	ldrb	w0, [x19, #:lo12:.LANCHOR76]
 	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldrh	w3, [x20, #:lo12:.LANCHOR83]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR115
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR110]
-	adrp	x0, .LC147
-	add	x0, x0, :lo12:.LC147
+	ldr	x1, [x0, #:lo12:.LANCHOR115]
+	adrp	x0, .LC159
+	add	x0, x0, :lo12:.LC159
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -14985,17 +15466,17 @@ dump_ftl_info:
 	.global	pm_ppa_update_check
 	.type	pm_ppa_update_check, %function
 pm_ppa_update_check:
-	adrp	x3, .LANCHOR96
+	adrp	x3, .LANCHOR102
 	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR96]
+	ldrh	w3, [x3, #:lo12:.LANCHOR102]
 	sub	w5, w4, w3
 	mov	w4, 1
 	lsr	w3, w2, w3
 	lsl	w4, w4, w5
 	sub	w4, w4, #1
 	and	w4, w4, w3
-	adrp	x3, .LANCHOR95
-	ldrb	w3, [x3, #:lo12:.LANCHOR95]
+	adrp	x3, .LANCHOR101
+	ldrb	w3, [x3, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w3
 	adrp	x3, .LANCHOR3
 	ldr	x3, [x3, #:lo12:.LANCHOR3]
@@ -15004,20 +15485,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2421
+	bne	.L2530
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC148
-	add	x0, x0, :lo12:.LC148
+	adrp	x0, .LC160
+	add	x0, x0, :lo12:.LC160
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2421:
+.L2530:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -15033,127 +15514,113 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2427
-	adrp	x1, .LANCHOR187
+	bls	.L2536
+	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2427:
-	adrp	x23, .LANCHOR97
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+.L2536:
+	adrp	x22, .LANCHOR100
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2428
+	bcs	.L2537
 	mov	w1, w19
-	adrp	x0, .LC149
-	add	x0, x0, :lo12:.LC149
+	adrp	x0, .LC161
+	add	x0, x0, :lo12:.LC161
 	bl	printf
-	adrp	x0, .LANCHOR188
+	adrp	x0, .LANCHOR195
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR188]
+	ldrh	w2, [x0, #:lo12:.LANCHOR195]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
+	ldr	x0, [x22, #:lo12:.LANCHOR100]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2430
+	bcs	.L2539
 	mov	w2, 35
-.L2435:
-	adrp	x1, .LANCHOR187
+.L2544:
+	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2430
-.L2428:
+	b	.L2539
+.L2537:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR123
-	add	x0, x0, :lo12:.LANCHOR123
-	add	x22, x0, x20
+	adrp	x0, .LANCHOR129
+	add	x0, x0, :lo12:.LANCHOR129
+	add	x23, x0, x20
 	strh	w19, [x0, x20]
-	strh	wzr, [x22, 2]
-	cbnz	w21, .L2431
+	strh	wzr, [x23, 2]
+	cbnz	w21, .L2540
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC150
-	add	x0, x0, :lo12:.LC150
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	printf
-	adrp	x0, .LANCHOR188
+	adrp	x0, .LANCHOR195
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR188]
-	ldr	x0, [x22, 8]
+	ldrh	w2, [x0, #:lo12:.LANCHOR195]
+	ldr	x0, [x23, 8]
 	bl	ftl_memset
-.L2430:
+.L2539:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2431:
-	adrp	x20, .LANCHOR179
-	adrp	x24, .LANCHOR117
-	ldr	x1, [x22, 8]
+.L2540:
+	adrp	x20, .LANCHOR186
+	adrp	x24, .LANCHOR123
+	ldr	x1, [x23, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR179]
-	ldrb	w3, [x24, #:lo12:.LANCHOR117]
+	ldr	x2, [x20, #:lo12:.LANCHOR186]
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR179]
+	ldr	x1, [x20, #:lo12:.LANCHOR186]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2432
+	beq	.L2541
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC151
-	add	x0, x0, :lo12:.LC151
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
+	ldr	x1, [x22, #:lo12:.LANCHOR100]
 	mov	w2, 4
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC164
+	add	x0, x0, :lo12:.LC164
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
-	ldr	x1, [x22, 8]
+	ldr	x1, [x23, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR117]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	ldrb	w3, [x24, #:lo12:.LANCHOR123]
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR179]
-	mov	w2, 4
+	ldr	x1, [x20, #:lo12:.LANCHOR186]
+	adrp	x0, .LC166
 	mov	w3, 16
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC166
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR96
-	ldrh	w2, [x0, #:lo12:.LANCHOR96]
-	mov	w0, 21
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsr	w21, w21, w2
-	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	sub	w0, w0, #1
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
-	and	w0, w0, w21
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2432:
-	ldr	x0, [x20, #:lo12:.LANCHOR179]
+.L2541:
+	ldr	x0, [x20, #:lo12:.LANCHOR186]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2430
-	mov	w2, 57
-	b	.L2435
+	beq	.L2539
+	mov	w2, 59
+	b	.L2544
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15163,73 +15630,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR97
-	adrp	x19, .LANCHOR134
+	adrp	x20, .LANCHOR100
+	adrp	x19, .LANCHOR140
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	ldr	x0, [x20, #:lo12:.LANCHOR100]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR134]
+	ldrh	w0, [x19, #:lo12:.LANCHOR140]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2438
+	blt	.L2547
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR97]
-	ldrh	w1, [x19, #:lo12:.LANCHOR134]
+	ldr	x2, [x20, #:lo12:.LANCHOR100]
+	ldrh	w1, [x19, #:lo12:.LANCHOR140]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2438
+	blt	.L2547
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2440
-	adrp	x1, .LANCHOR189
-	add	x1, x1, :lo12:.LANCHOR189
-	mov	w2, 129
+	bne	.L2549
+	adrp	x1, .LANCHOR196
+	add	x1, x1, :lo12:.LANCHOR196
+	mov	w2, 131
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2440:
+.L2549:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR123
+	adrp	x1, .LANCHOR129
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR123
+	add	x2, x1, :lo12:.LANCHOR129
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2441
+	beq	.L2550
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2441
+	cbz	x1, .L2550
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2441
+	tbz	w2, #31, .L2550
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2441:
-	add	x1, x23, :lo12:.LANCHOR123
-	adrp	x25, .LANCHOR96
+.L2550:
+	add	x1, x23, :lo12:.LANCHOR129
+	adrp	x25, .LANCHOR102
 	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR96
+	add	x25, x25, :lo12:.LANCHOR102
 	mov	w19, 0
-.L2442:
-	ldr	x1, [x20, #:lo12:.LANCHOR97]
+.L2551:
+	ldr	x1, [x20, #:lo12:.LANCHOR100]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2444
+	bhi	.L2553
 	bl	pm_free_sblk
-.L2438:
+.L2547:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -15237,7 +15704,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2444:
+.L2553:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -15248,11 +15715,11 @@ pm_gc:
 	sub	w0, w0, #1
 	lsr	w1, w1, w3
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w1, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2443
+	bne	.L2552
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -15261,10 +15728,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2443:
+.L2552:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2442
+	b	.L2551
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -15273,8 +15740,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR123
-	add	x2, x2, :lo12:.LANCHOR123
+	adrp	x2, .LANCHOR129
+	add	x2, x2, :lo12:.LANCHOR129
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -15284,12 +15751,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR121
-	ldr	w0, [x19, #:lo12:.LANCHOR121]
-	cbz	w0, .L2450
+	adrp	x19, .LANCHOR127
+	ldr	w0, [x19, #:lo12:.LANCHOR127]
+	cbz	w0, .L2559
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR121]
-.L2450:
+	str	wzr, [x19, #:lo12:.LANCHOR127]
+.L2559:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15303,21 +15770,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR123
-	add	x19, x19, :lo12:.LANCHOR123
+	adrp	x19, .LANCHOR129
+	add	x19, x19, :lo12:.LANCHOR129
 	mov	w20, 0
 	add	x19, x19, 2
-.L2457:
+.L2566:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2456
+	tbz	w0, #31, .L2565
 	mov	w0, w20
 	bl	pm_flush_id
-.L2456:
+.L2565:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2457
+	bne	.L2566
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15366,74 +15833,74 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR121
+	adrp	x0, .LANCHOR127
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR123
-	str	wzr, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR180
+	adrp	x20, .LANCHOR129
+	str	wzr, [x0, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR187
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR123
-	strb	w1, [x0, #:lo12:.LANCHOR180]
+	add	x19, x20, :lo12:.LANCHOR129
+	strb	w1, [x0, #:lo12:.LANCHOR187]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR179
-	adrp	x22, .LANCHOR117
+	adrp	x1, .LANCHOR186
+	adrp	x22, .LANCHOR123
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR117
-	str	x0, [x1, #:lo12:.LANCHOR179]
+	add	x22, x22, :lo12:.LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR186]
 	mov	w25, -1
-.L2467:
+.L2576:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2466
+	cbz	w24, .L2575
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2466:
+.L2575:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2467
-	add	x0, x20, :lo12:.LANCHOR123
-	adrp	x19, .LANCHOR97
-	ldr	x24, [x21, #:lo12:.LANCHOR179]
+	bne	.L2576
+	add	x0, x20, :lo12:.LANCHOR129
+	adrp	x19, .LANCHOR100
+	ldr	x24, [x21, #:lo12:.LANCHOR186]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2468
+	bgt	.L2577
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
-	adrp	x27, .LANCHOR103
-	adrp	x28, .LANCHOR117
-	add	x27, x27, :lo12:.LANCHOR103
-	add	x28, x28, :lo12:.LANCHOR117
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	adrp	x27, .LANCHOR108
+	adrp	x28, .LANCHOR123
+	add	x27, x27, :lo12:.LANCHOR108
+	add	x28, x28, :lo12:.LANCHOR123
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	ldrsh	w21, [x0, 696]
-.L2469:
+.L2578:
 	cmp	w21, w26
-	ble	.L2471
-	adrp	x0, .LANCHOR170
+	ble	.L2580
+	adrp	x0, .LANCHOR177
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR123
+	add	x20, x20, :lo12:.LANCHOR129
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR170]
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	strb	w1, [x0, #:lo12:.LANCHOR177]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -15442,7 +15909,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2468:
+.L2577:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -15453,8 +15920,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2471:
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+.L2580:
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -15465,32 +15932,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2470
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2579
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2470
+	bcs	.L2579
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2470:
+.L2579:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2469
+	b	.L2578
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -15501,66 +15968,66 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR123
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR117]
+	ldrb	w1, [x1, #:lo12:.LANCHOR123]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
 	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR54
+	adrp	x1, .LANCHOR56
 	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR54]
+	ldr	w2, [x1, #:lo12:.LANCHOR56]
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2481
+	bcc	.L2590
 	mov	w1, w0
-	adrp	x0, .LC157
-	add	x0, x0, :lo12:.LC157
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
 	bl	printf
 	mov	w0, -1
-.L2480:
+.L2589:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2481:
-	adrp	x24, .LANCHOR123
-	add	x0, x24, :lo12:.LANCHOR123
+.L2590:
+	adrp	x24, .LANCHOR129
+	add	x0, x24, :lo12:.LANCHOR129
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2487:
+.L2596:
 	ldr	x1, [x0]
-	cbz	x1, .L2483
+	cbz	x1, .L2592
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2483
-.L2484:
-	cbnz	w23, .L2485
-	add	x0, x24, :lo12:.LANCHOR123
+	bne	.L2592
+.L2593:
+	cbnz	w23, .L2594
+	add	x0, x24, :lo12:.LANCHOR129
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2486:
-	add	x24, x24, :lo12:.LANCHOR123
+.L2595:
+	add	x24, x24, :lo12:.LANCHOR129
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2489
+	beq	.L2598
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2489:
+.L2598:
 	mov	w0, 0
-	b	.L2480
-.L2485:
-	add	x0, x24, :lo12:.LANCHOR123
+	b	.L2589
+.L2594:
+	add	x0, x24, :lo12:.LANCHOR129
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -15568,35 +16035,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR124
-	strb	w21, [x0, #:lo12:.LANCHOR124]
-	b	.L2486
-.L2483:
+	adrp	x0, .LANCHOR130
+	strb	w21, [x0, #:lo12:.LANCHOR130]
+	b	.L2595
+.L2592:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2487
+	bne	.L2596
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR123
+	add	x2, x24, :lo12:.LANCHOR129
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2488
+	beq	.L2597
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2488
+	tbz	w1, #31, .L2597
 	bl	pm_flush_id
-.L2488:
-	adrp	x0, .LANCHOR190
+.L2597:
+	adrp	x0, .LANCHOR197
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR190]
+	strb	w19, [x0, #:lo12:.LANCHOR197]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2484
+	b	.L2593
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.ftl_read_ahead,"ax",@progbits
 	.align	2
@@ -15606,101 +16073,98 @@ ftl_read_ahead:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR56
+	adrp	x20, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x20, #:lo12:.LANCHOR56]
+	ldr	w0, [x20, #:lo12:.LANCHOR58]
 	stp	x23, x24, [sp, 48]
 	cmn	w0, #1
-	beq	.L2504
+	beq	.L2613
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x19, x0
 	mov	w0, -1
-	cbz	x19, .L2495
-	ldr	w21, [x20, #:lo12:.LANCHOR56]
+	cbz	x19, .L2604
+	ldr	w21, [x20, #:lo12:.LANCHOR58]
 	str	w21, [x19, 36]
-	str	w0, [x20, #:lo12:.LANCHOR56]
+	str	w0, [x20, #:lo12:.LANCHOR58]
 	mov	w0, w21
 	ldr	x20, [x19, 8]
 	ldr	x22, [x19, 24]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2498
+	bne	.L2607
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	pm_log2phys
-.L2498:
+.L2607:
 	ldr	w0, [x29, 76]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2499
-	adrp	x0, .LANCHOR117
+	bne	.L2608
+	adrp	x0, .LANCHOR123
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	mov	x0, x20
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-.L2504:
+.L2613:
 	mov	w0, 0
-.L2495:
+.L2604:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2499:
+.L2608:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w23, [x19, 52]
 	cmn	w23, #1
-	bne	.L2500
-	ldrb	w0, [x19, 2]
-	and	w0, w0, -9
-	strb	w0, [x19, 2]
-	adrp	x0, .LANCHOR5
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	bne	.L2609
+	adrp	x0, .LANCHOR6
+	ldr	x1, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2501:
+.L2610:
 	ldr	w5, [x22, 4]
 	cmp	w21, w5
-	beq	.L2502
+	beq	.L2611
 	ldrb	w1, [x19, 1]
-	adrp	x0, .LC159
+	adrp	x0, .LC171
 	ldr	w4, [x22]
 	mov	w2, w21
 	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC159
+	add	x0, x0, :lo12:.LC171
 	ldr	w3, [x29, 76]
 	bl	printf
-.L2502:
+.L2611:
 	ldr	w0, [x22, 4]
 	cmp	w21, w0
-	bne	.L2503
+	bne	.L2612
 	cmn	w23, #1
-	bne	.L2504
-.L2503:
-	mov	w2, 875
-	adrp	x1, .LANCHOR191
+	bne	.L2613
+.L2612:
+	mov	w2, 892
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2504
-.L2500:
+	b	.L2613
+.L2609:
 	cmp	w23, 256
-	bne	.L2501
-	adrp	x0, .LANCHOR96
+	bne	.L2610
+	adrp	x0, .LANCHOR102
 	mov	w20, 21
 	mov	w24, 1
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR102]
 	ldr	w0, [x29, 76]
 	sub	w20, w20, w1
 	ldp	w2, w3, [x19, 36]
@@ -15708,18 +16172,18 @@ ftl_read_ahead:
 	lsl	w20, w24, w20
 	sub	w20, w20, #1
 	and	w20, w20, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w20, w20, w0
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
 	and	w1, w20, 65535
 	bl	printf
 	mov	w2, 0
 	mov	w1, w24
 	mov	w0, w20
 	bl	gc_add_sblk
-	b	.L2501
+	b	.L2610
 	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -15727,73 +16191,73 @@ ftl_read_ahead:
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
-	adrp	x21, .LANCHOR5
+	adrp	x21, .LANCHOR6
 	stp	x19, x20, [sp, 48]
-	ldr	x20, [x21, #:lo12:.LANCHOR5]
-	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR138
+	ldr	x20, [x21, #:lo12:.LANCHOR6]
+	strb	wzr, [x0, #:lo12:.LANCHOR74]
+	adrp	x0, .LANCHOR144
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR138]
+	strb	wzr, [x0, #:lo12:.LANCHOR144]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
 	add	x0, x20, 80
 	ldrh	w1, [x20, 80]
-	str	x0, [x29, 168]
+	str	x0, [x29, 176]
 	mov	w0, 65535
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	beq	.L2509
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
+	beq	.L2618
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
 	bl	buf_alloc
-	mov	x27, x0
+	mov	x25, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR103
-	adrp	x2, .LANCHOR67
+	adrp	x3, .LANCHOR108
+	adrp	x2, .LANCHOR71
 	sub	w0, w0, #1
-	str	x3, [x29, 128]
+	str	x3, [x29, 152]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR103]
-	str	x2, [x29, 160]
+	ldrh	w1, [x3, #:lo12:.LANCHOR108]
+	str	x2, [x29, 168]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR67]
+	ldrb	w0, [x2, #:lo12:.LANCHOR71]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2510
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2619
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2557:
-	str	w0, [x27, 40]
-.L2511:
+.L2663:
+	str	w0, [x25, 40]
+.L2620:
 	mov	w1, 1
-	mov	x0, x27
+	mov	x0, x25
 	bl	sblk_read_page
-	ldr	w0, [x27, 52]
+	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2512
-	ldr	x0, [x27, 24]
+	beq	.L2621
+	ldr	x0, [x25, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2513
-.L2512:
-	mov	x0, x27
+	beq	.L2622
+.L2621:
+	mov	x0, x25
 	bl	buf_free
-	ldr	x1, [x27, 24]
-	ldr	x0, [x27, 8]
+	ldr	x1, [x25, 24]
+	ldr	x0, [x25, 8]
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 16]
 	ldr	w2, [x1, 8]
@@ -15802,47 +16266,47 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC160
+	adrp	x0, .LC172
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC160
-	ldr	w1, [x27, 40]
-	ldr	w2, [x27, 52]
+	add	x0, x0, :lo12:.LC172
+	ldr	w1, [x25, 40]
+	ldr	w2, [x25, 52]
 	bl	printf
-.L2561:
-	adrp	x0, .LANCHOR4
+.L2667:
+	adrp	x0, .LANCHOR5
 	ldrh	w1, [x20, 80]
-	mov	w22, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	mov	w28, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2514:
+.L2623:
 	ldrh	w1, [x20, 80]
-	mov	w2, w22
-	adrp	x0, .LC163
-	add	x0, x0, :lo12:.LC163
+	mov	w2, w28
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2543
+	beq	.L2650
 	bl	ftl_free_sblk
-.L2543:
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+.L2650:
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	ldr	x1, [x21, #:lo12:.LANCHOR6]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2508:
+.L2617:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -15851,327 +16315,319 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2510:
+.L2619:
 	cmp	w0, 2
-	bne	.L2511
-	adrp	x0, .LANCHOR80
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	bne	.L2620
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2557
-.L2513:
-	adrp	x26, .LANCHOR71
-	adrp	x19, .LANCHOR72
-	adrp	x22, .LANCHOR139
-	ldr	x1, [x27, 8]
-	ldrb	w0, [x19, #:lo12:.LANCHOR72]
-	ldrh	w2, [x26, #:lo12:.LANCHOR71]
+	b	.L2663
+.L2622:
+	adrp	x19, .LANCHOR75
+	adrp	x22, .LANCHOR76
+	adrp	x23, .LANCHOR146
+	ldr	x1, [x25, 8]
+	ldrb	w0, [x22, #:lo12:.LANCHOR76]
+	adrp	x24, .LANCHOR147
+	ldrh	w2, [x19, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	ldr	x0, [x22, #:lo12:.LANCHOR139]
+	ldr	x0, [x23, #:lo12:.LANCHOR146]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR140
-	ldrh	w0, [x26, #:lo12:.LANCHOR71]
+	ldrb	w1, [x22, #:lo12:.LANCHOR76]
+	ldrh	w0, [x19, #:lo12:.LANCHOR75]
 	mul	w0, w0, w1
-	ldr	x1, [x27, 8]
+	ldr	x1, [x25, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x19, #:lo12:.LANCHOR140]
+	ldr	x0, [x24, #:lo12:.LANCHOR147]
 	bl	ftl_memcpy
-	str	x26, [x29, 120]
-	adrp	x0, .LANCHOR80
-	stp	x19, x22, [x29, 144]
-	ldrh	w24, [x0, #:lo12:.LANCHOR80]
-	ldr	x0, [x29, 160]
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	str	x19, [x29, 144]
+	adrp	x0, .LANCHOR83
+	ldrh	w14, [x0, #:lo12:.LANCHOR83]
+	ldr	x0, [x29, 168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 2
-	beq	.L2515
-.L2558:
-	str	w0, [x29, 180]
-	adrp	x23, .LC161
-	ldr	x0, [x29, 128]
-	add	x23, x23, :lo12:.LC161
-	mov	w26, 0
-	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR103
-	str	x0, [x29, 104]
-.L2517:
-	sub	w0, w26, #1
+	beq	.L2624
+.L2664:
 	str	w0, [x29, 184]
-	cmp	w26, w24
-	beq	.L2526
-	mov	x19, 0
-	b	.L2527
-.L2515:
-	lsl	w24, w24, 1
+	adrp	x26, .LC173
+	ldr	x0, [x29, 152]
+	mov	w22, 0
+	mov	w28, 0
+	add	x0, x0, :lo12:.LANCHOR108
+	str	x0, [x29, 128]
+	add	x0, x26, :lo12:.LC173
+	str	x0, [x29, 120]
+.L2626:
+	sub	w0, w22, #1
+	str	w0, [x29, 188]
+	cmp	w22, w14
+	beq	.L2635
+	mov	x27, 0
+	b	.L2636
+.L2624:
+	lsl	w14, w14, 1
 	mov	w0, 1
-	b	.L2558
-.L2523:
-	ldr	x1, [x29, 104]
-	ldr	x0, [x29, 136]
+	b	.L2664
+.L2632:
+	ldr	x1, [x29, 128]
+	ldr	x0, [x29, 160]
 	ldrh	w1, [x1]
 	ldrh	w0, [x0, 96]
 	mul	w0, w0, w1
-	ldr	x1, [x29, 112]
+	ldr	x1, [x29, 136]
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2518
-	add	w0, w26, w0
-	orr	w0, w0, w25, lsl 24
-.L2559:
-	str	w0, [x27, 40]
+	bne	.L2627
+	add	w0, w22, w0
+	orr	w0, w0, w26, lsl 24
+.L2665:
+	str	w0, [x25, 40]
 	mov	w1, 1
-	mov	x0, x27
+	str	w14, [x29, 112]
+	mov	x0, x25
 	bl	sblk_read_page
-	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR139]
-	ldr	w3, [x0, x28]
-	ldr	x0, [x27, 24]
+	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	w14, [x29, 112]
+	ldr	w3, [x0, x19]
+	ldr	x0, [x25, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2521
-	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR140]
-	ldr	w2, [x1, x28]
+	bne	.L2630
+	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	ldr	w2, [x1, x19]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2522
-.L2521:
-	ldr	x1, [x29, 144]
+	beq	.L2631
+.L2630:
+	ldr	x1, [x24, #:lo12:.LANCHOR147]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR140]
+	str	w14, [x29, 112]
+	ldr	w4, [x1, x19]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
-	mov	x0, x23
-	ldr	w2, [x27, 52]
-	ldr	w4, [x1, x28]
-	ldr	w1, [x27, 40]
+	ldr	w1, [x25, 40]
+	ldr	w2, [x25, 52]
+	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR139]
-	ldr	w0, [x0, x28]
+	ldr	x0, [x23, #:lo12:.LANCHOR146]
+	ldr	w14, [x29, 112]
+	ldr	w0, [x0, x19]
 	cmn	w0, #1
-	beq	.L2522
-	mov	x0, x27
+	beq	.L2631
+	mov	x0, x25
 	bl	buf_free
-	b	.L2561
-.L2518:
+	b	.L2667
+.L2627:
 	cmp	w1, 2
-	bne	.L2520
-	ldr	w1, [x29, 184]
+	bne	.L2629
+	ldr	w1, [x29, 188]
 	add	w0, w0, w1
-	add	w0, w0, w25
+	add	w0, w0, w26
 	orr	w0, w0, 33554432
-	b	.L2559
-.L2520:
-	add	w0, w26, w0
-	b	.L2559
-.L2522:
-	add	w22, w22, 1
-	add	w25, w25, 1
-	add	x28, x28, 4
-.L2525:
-	ldr	w0, [x29, 180]
-	cmp	w0, w25
-	bcs	.L2523
-	add	x19, x19, 1
-.L2527:
-	ldr	x0, [x29, 168]
+	b	.L2665
+.L2629:
+	add	w0, w22, w0
+	b	.L2665
+.L2631:
+	add	w28, w28, 1
+	add	w26, w26, 1
+	add	x19, x19, 4
+.L2634:
+	ldr	w0, [x29, 184]
+	cmp	w0, w26
+	bcs	.L2632
+	add	x27, x27, 1
+.L2636:
+	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w19
-	ble	.L2524
-	add	x0, x20, x19, lsl 1
+	cmp	w0, w27
+	ble	.L2633
+	add	x0, x20, x27, lsl 1
+	str	x0, [x29, 160]
+	ldr	x0, [x29, 168]
+	sbfiz	x19, x28, 2, 32
+	mov	w26, 1
+	add	x0, x0, :lo12:.LANCHOR71
 	str	x0, [x29, 136]
-	ldr	x0, [x29, 160]
-	sbfiz	x28, x22, 2, 32
-	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR67
-	str	x0, [x29, 112]
-	b	.L2525
-.L2524:
-	add	w26, w26, 1
-	b	.L2517
-.L2526:
-	mov	x0, x27
+	b	.L2634
+.L2633:
+	add	w22, w22, 1
+	b	.L2626
+.L2635:
+	mov	x0, x25
 	bl	buf_free
-	ldr	x3, [x29, 120]
-	adrp	x24, .LANCHOR4
-	ldr	x0, [x29, 168]
-	mov	w22, 0
+	ldr	x3, [x29, 144]
+	adrp	x25, .LANCHOR5
+	ldr	x0, [x29, 176]
+	mov	w28, 0
 	ldrh	w2, [x20, 80]
-	mov	w23, 0
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
 	mov	w27, 0
-	ldrh	w3, [x3, #:lo12:.LANCHOR71]
+	ldr	x1, [x25, #:lo12:.LANCHOR5]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
 	ldrb	w0, [x0, 9]
+	str	x25, [x29, 144]
+	str	wzr, [x29, 188]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR96
-	add	x0, x0, :lo12:.LANCHOR96
-	str	x0, [x29, 96]
-.L2528:
-	sub	w0, w23, #1
-	str	w0, [x29, 120]
-	cmp	w26, w23
-	beq	.L2541
-	str	xzr, [x29, 184]
-	b	.L2542
-.L2538:
-	ldr	x1, [x29, 152]
-	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR139]
-	ldr	w28, [x1, x0]
-	cmn	w28, #1
-	beq	.L2529
-	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR140]
-	ldr	w0, [x1, x0]
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
+	str	x0, [x29, 112]
+.L2637:
+	sub	w0, w27, #1
 	str	w0, [x29, 136]
-	mov	w0, w28
+	cmp	w22, w27
+	beq	.L2648
+	mov	x26, 0
+	b	.L2649
+.L2645:
+	ldr	w0, [x29, 188]
+	ldr	x1, [x23, #:lo12:.LANCHOR146]
+	sbfiz	x0, x0, 2, 32
+	ldr	w6, [x1, x0]
+	cmn	w6, #1
+	beq	.L2638
+	ldr	x1, [x24, #:lo12:.LANCHOR147]
+	str	w6, [x29, 108]
+	ldr	w0, [x1, x0]
+	str	w0, [x29, 160]
+	mov	w0, w6
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2530
+	ldr	w6, [x29, 108]
+	bne	.L2639
+	mov	w0, w6
+	str	w6, [x29, 108]
 	mov	w2, 0
 	add	x1, x29, 204
-	mov	w0, w28
 	bl	pm_log2phys
-.L2530:
-	ldr	x0, [x29, 112]
-	ldr	x1, [x29, 128]
+	ldr	w6, [x29, 108]
+.L2639:
+	ldr	x0, [x29, 128]
+	ldr	x1, [x29, 152]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR103]
+	ldrh	w1, [x1, #:lo12:.LANCHOR108]
 	mul	w0, w0, w1
-	ldr	x1, [x29, 160]
-	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	ldr	x1, [x29, 168]
+	ldrb	w1, [x1, #:lo12:.LANCHOR71]
 	cmp	w1, 3
-	bne	.L2531
-	add	w0, w23, w0
+	bne	.L2640
+	add	w0, w27, w0
 	orr	w0, w0, w25, lsl 24
-.L2560:
+.L2666:
 	str	w0, [x29, 200]
 	mov	w19, 21
-	ldr	x0, [x29, 96]
-	mov	w4, 1
-	ldr	w1, [x29, 136]
+	ldr	x0, [x29, 112]
+	mov	w2, 1
+	ldr	w1, [x29, 160]
 	ldrh	w0, [x0]
 	sub	w19, w19, w0
 	lsr	w0, w1, w0
-	lsl	w19, w4, w19
+	lsl	w19, w2, w19
 	sub	w19, w19, #1
 	and	w19, w19, w0
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	udiv	w19, w19, w0
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2534
-	ldr	w2, [x29, 200]
-	mov	w1, w28
-	str	w4, [x29, 136]
-	adrp	x0, .LC162
-	add	x0, x0, :lo12:.LC162
-	bl	pm_ppa_update_check
-	ldr	w4, [x29, 136]
-	cbz	w0, .L2535
-.L2555:
-	b	.L2555
-.L2531:
-	cmp	w1, 2
-	bne	.L2533
-	ldr	w1, [x29, 120]
-	add	w0, w0, w1
-	add	w0, w0, w25
-	orr	w0, w0, 33554432
-	b	.L2560
-.L2533:
-	add	w0, w23, w0
-	b	.L2560
-.L2535:
-	mov	w2, w4
+	bne	.L2643
 	add	x1, x29, 200
-	mov	w0, w28
+	mov	w0, w6
 	bl	pm_log2phys
-	add	w22, w22, 1
+	add	w28, w28, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2537:
+.L2644:
+	ldr	w0, [x29, 188]
+	add	w0, w0, 1
+	str	w0, [x29, 188]
 	adrp	x0, .LANCHOR3
-	add	w27, w27, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2529
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	bne	.L2638
+	ldr	x0, [x29, 144]
 	lsl	x19, x19, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2529
+	cbz	w1, .L2638
 	strh	wzr, [x0, x19]
-.L2529:
+.L2638:
 	add	w25, w25, 1
-.L2540:
-	ldr	w0, [x29, 180]
+.L2647:
+	ldr	w0, [x29, 184]
 	cmp	w0, w25
-	bcs	.L2538
-	ldr	x0, [x29, 184]
-	add	x0, x0, 1
-	str	x0, [x29, 184]
-.L2542:
-	ldr	x0, [x29, 168]
-	ldr	w1, [x29, 184]
+	bcs	.L2645
+	add	x26, x26, 1
+.L2649:
+	ldr	x0, [x29, 176]
 	ldrb	w0, [x0, 9]
-	cmp	w0, w1
-	ble	.L2539
-	ldr	x0, [x29, 184]
+	cmp	w0, w26
+	ble	.L2646
+	add	x0, x20, x26, lsl 1
 	mov	w25, 1
-	add	x0, x20, x0, lsl 1
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR95
-	add	x0, x0, :lo12:.LANCHOR95
-	str	x0, [x29, 104]
-	b	.L2540
-.L2534:
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR101
+	add	x0, x0, :lo12:.LANCHOR101
+	str	x0, [x29, 120]
+	b	.L2647
+.L2640:
+	cmp	w1, 2
+	bne	.L2642
+	ldr	w1, [x29, 136]
+	add	w0, w0, w1
+	add	w0, w0, w25
+	orr	w0, w0, 33554432
+	b	.L2666
+.L2642:
+	add	w0, w27, w0
+	b	.L2666
+.L2643:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
-	cinc	w22, w22, eq
-	b	.L2537
-.L2539:
-	add	w23, w23, 1
-	b	.L2528
-.L2541:
+	cinc	w28, w28, eq
+	b	.L2644
+.L2646:
+	add	w27, w27, 1
+	b	.L2637
+.L2648:
+	ldr	x0, [x29, 144]
 	ldrh	w1, [x20, 80]
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	strh	w22, [x0, x1, lsl 1]
-	b	.L2514
-.L2509:
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	strh	w28, [x0, x1, lsl 1]
+	b	.L2623
+.L2618:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2508
-	adrp	x19, .LANCHOR97
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	beq	.L2617
+	adrp	x19, .LANCHOR100
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2545
+	bne	.L2652
 	bl	pm_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	ldr	x0, [x19, #:lo12:.LANCHOR100]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2545:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
+.L2652:
+	ldr	x0, [x21, #:lo12:.LANCHOR6]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2508
+	b	.L2617
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16179,333 +16635,351 @@ gc_recovery:
 	.type	zftl_init, %function
 zftl_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR54
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR52]
-	adrp	x1, .LANCHOR53
+	strb	w0, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR55
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR80
-	strb	wzr, [x1, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR163
+	adrp	x22, .LANCHOR83
+	strb	wzr, [x1, #:lo12:.LANCHOR55]
+	adrp	x1, .LANCHOR169
 	stp	x19, x20, [sp, 16]
-	adrp	x21, .LANCHOR72
-	strb	w0, [x1, #:lo12:.LANCHOR163]
-	adrp	x0, .LANCHOR115
+	adrp	x21, .LANCHOR76
+	strb	w0, [x1, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR121
 	mov	w1, -1
 	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR56
+	strb	wzr, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR58
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR2
-	str	w1, [x0, #:lo12:.LANCHOR56]
-	adrp	x1, .LC164
+	str	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x1, .LC175
 	stp	x27, x28, [sp, 80]
-	add	x1, x1, :lo12:.LC164
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	add	x1, x1, :lo12:.LC175
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-	adrp	x20, .LANCHOR188
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
-	adrp	x0, .LANCHOR67
-	adrp	x2, .LANCHOR117
-	adrp	x7, .LANCHOR95
+	adrp	x20, .LANCHOR195
+	adrp	x1, .LANCHOR34
+	add	x1, x1, :lo12:.LANCHOR34
+	adrp	x0, .LANCHOR71
+	adrp	x2, .LANCHOR123
+	adrp	x3, .LANCHOR75
+	adrp	x4, .LANCHOR101
 	ldrb	w5, [x1, 12]
-	strb	w5, [x0, #:lo12:.LANCHOR67]
+	strb	w5, [x0, #:lo12:.LANCHOR71]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR117]
-	adrp	x2, .LANCHOR71
-	ldrh	w3, [x1, 10]
-	strh	w3, [x2, #:lo12:.LANCHOR71]
-	adrp	x2, .LANCHOR12
-	ldrh	w8, [x1, 14]
-	ubfiz	w11, w0, 9, 7
-	ldrb	w4, [x2, #:lo12:.LANCHOR12]
-	adrp	x2, .LANCHOR104
-	sdiv	w6, w3, w5
-	strh	w8, [x23, #:lo12:.LANCHOR2]
-	strb	w4, [x2, #:lo12:.LANCHOR104]
-	ldrb	w2, [x1, 13]
-	adrp	x1, .LANCHOR26
-	strb	w2, [x7, #:lo12:.LANCHOR95]
-	ldrh	w7, [x1, #:lo12:.LANCHOR26]
-	adrp	x1, .LANCHOR103
-	strh	w6, [x22, #:lo12:.LANCHOR80]
-	mul	w4, w4, w2
-	strh	w7, [x1, #:lo12:.LANCHOR103]
-	strh	w11, [x20, #:lo12:.LANCHOR188]
-	mov	w2, 1
-	and	w4, w4, 255
+	strb	w0, [x2, #:lo12:.LANCHOR123]
+	ldrh	w2, [x1, 10]
+	strh	w2, [x3, #:lo12:.LANCHOR75]
+	adrp	x3, .LANCHOR14
+	ldrh	w7, [x1, 14]
+	ubfiz	w10, w0, 9, 7
+	ldrb	w6, [x3, #:lo12:.LANCHOR14]
+	adrp	x3, .LANCHOR109
+	sdiv	w8, w2, w5
+	strh	w7, [x23, #:lo12:.LANCHOR2]
+	strb	w6, [x3, #:lo12:.LANCHOR109]
+	ldrb	w3, [x1, 13]
+	adrp	x1, .LANCHOR28
+	strb	w3, [x4, #:lo12:.LANCHOR101]
+	ldrh	w4, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR108
+	strh	w8, [x22, #:lo12:.LANCHOR83]
+	mul	w6, w6, w3
+	strh	w4, [x1, #:lo12:.LANCHOR108]
+	strh	w10, [x20, #:lo12:.LANCHOR195]
+	mov	w3, 1
+	and	w6, w6, 255
 	mov	w1, 0
-	strb	w4, [x21, #:lo12:.LANCHOR72]
-.L2563:
-	cmp	w7, w2
-	bcs	.L2564
-	mul	w3, w0, w3
-	adrp	x2, .LANCHOR96
+	strb	w6, [x21, #:lo12:.LANCHOR76]
+.L2669:
+	cmp	w4, w3
+	bcs	.L2670
+	mul	w2, w0, w2
+	adrp	x3, .LANCHOR102
 	sub	w1, w1, #1
-	adrp	x10, .LANCHOR192
-	strh	w1, [x2, #:lo12:.LANCHOR96]
+	mov	w4, 0
+	strh	w1, [x3, #:lo12:.LANCHOR102]
+	mov	w1, 1
+	mul	w3, w2, w7
+	lsr	w11, w3, 21
+.L2671:
+	cmp	w11, w1
+	bcs	.L2672
 	mov	w1, 57344
+	sub	w4, w4, #1
 	movk	w1, 0x1c, lsl 16
-	adrp	x28, .LANCHOR54
-	mul	w7, w3, w8
-	adrp	x24, .LANCHOR175
-	mul	w1, w4, w1
-	adrp	x27, .LANCHOR193
-	mul	w3, w3, w4
-	adrp	x26, .LANCHOR134
-	lsr	w2, w7, 21
-	mul	w6, w6, w4
-	mul	w7, w7, w4
-	sub	w3, w3, #1
-	str	w7, [x10, #:lo12:.LANCHOR192]
-	sub	w7, w11, #1
-	mul	w1, w1, w2
-	adrp	x2, .LANCHOR59
-	adrp	x25, .LANCHOR83
-	str	w1, [x2, #:lo12:.LANCHOR59]
-	add	w2, w1, 24576
-	str	w2, [x27, #:lo12:.LANCHOR193]
-	udiv	w0, w2, w0
-	udiv	w2, w2, w3
-	str	w0, [x28, #:lo12:.LANCHOR54]
-	add	w0, w7, w0, lsl 2
-	add	w2, w2, 8
-	udiv	w0, w0, w11
-	strh	w0, [x24, #:lo12:.LANCHOR175]
+	mul	w3, w3, w6
+	adrp	x28, .LANCHOR56
+	sub	w11, w10, #1
+	mul	w1, w6, w1
+	adrp	x24, .LANCHOR182
+	mul	w8, w8, w6
+	adrp	x27, .LANCHOR200
+	mul	w2, w2, w6
+	adrp	x26, .LANCHOR140
+	lsl	w1, w1, w4
+	adrp	x4, .LANCHOR61
+	sub	w2, w2, #1
+	adrp	x25, .LANCHOR87
+	str	w1, [x4, #:lo12:.LANCHOR61]
+	adrp	x4, .LANCHOR199
+	str	w3, [x4, #:lo12:.LANCHOR199]
+	add	w3, w1, 24576
+	str	w3, [x27, #:lo12:.LANCHOR200]
+	udiv	w0, w3, w0
+	udiv	w3, w3, w2
+	adrp	x2, .LANCHOR104
+	str	w0, [x28, #:lo12:.LANCHOR56]
+	add	w0, w11, w0, lsl 2
+	add	w3, w3, 8
+	udiv	w0, w0, w10
+	strh	w0, [x24, #:lo12:.LANCHOR182]
 	ubfiz	w0, w0, 4, 16
-	sdiv	w0, w0, w6
-	adrp	x6, .LANCHOR87
-	str	x6, [x29, 104]
-	strh	w2, [x6, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR100
-	strh	w0, [x26, #:lo12:.LANCHOR134]
-	add	w0, w8, w8, lsl 1
+	sdiv	w0, w0, w8
+	adrp	x8, .LANCHOR91
+	str	x8, [x29, 104]
+	strh	w3, [x8, #:lo12:.LANCHOR91]
+	strh	w0, [x26, #:lo12:.LANCHOR140]
+	add	w0, w7, w7, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR100]
-	lsr	w0, w8, 4
-	strh	w0, [x25, #:lo12:.LANCHOR83]
+	strh	w0, [x2, #:lo12:.LANCHOR104]
+	lsr	w0, w7, 4
+	strh	w0, [x25, #:lo12:.LANCHOR87]
 	cmp	w0, 79
-	bhi	.L2565
+	bhi	.L2673
 	mov	w0, 80
-	strh	w0, [x25, #:lo12:.LANCHOR83]
-.L2565:
-	adrp	x2, .LANCHOR98
-	mov	w0, 4000
-	adrp	x4, .LANCHOR99
-	mov	w3, 1024
-	strh	w0, [x2, #:lo12:.LANCHOR98]
+	strh	w0, [x25, #:lo12:.LANCHOR87]
+.L2673:
+	adrp	x7, .LANCHOR105
+	mov	w0, 2000
+	adrp	x3, .LANCHOR103
+	adrp	x6, .LANCHOR139
+	strh	w0, [x7, #:lo12:.LANCHOR105]
 	mov	w0, 50
-	strh	w0, [x4, #:lo12:.LANCHOR99]
-	adrp	x0, .LANCHOR133
-	mov	w6, 64
+	adrp	x2, .LANCHOR138
+	strh	w0, [x3, #:lo12:.LANCHOR103]
+	mov	w0, 256
+	strh	w0, [x6, #:lo12:.LANCHOR139]
+	mov	w0, 48
+	strh	w0, [x2, #:lo12:.LANCHOR138]
+	adrp	x0, .LANCHOR4
+	mov	w8, 32
 	cmp	w5, 2
-	strh	w3, [x0, #:lo12:.LANCHOR133]
-	adrp	x3, .LANCHOR132
-	strh	w6, [x3, #:lo12:.LANCHOR132]
-	beq	.L2566
-	adrp	x5, .LANCHOR69
-	ldrb	w5, [x5, #:lo12:.LANCHOR69]
-	cbz	w5, .L2567
-.L2566:
+	strh	w8, [x0, #:lo12:.LANCHOR4]
+	beq	.L2674
+	adrp	x5, .LANCHOR73
+	ldrb	w5, [x5, #:lo12:.LANCHOR73]
+	cbz	w5, .L2675
+.L2674:
 	mov	w5, 150
-	strh	w5, [x4, #:lo12:.LANCHOR99]
-	mov	w4, 128
-	strh	w4, [x3, #:lo12:.LANCHOR132]
-	adrp	x3, .LANCHOR11
-	ldrb	w3, [x3, #:lo12:.LANCHOR11]
-	cbnz	w3, .L2567
-	mov	w3, 600
-	strh	w3, [x2, #:lo12:.LANCHOR98]
-	mov	w2, 512
-	strh	w2, [x0, #:lo12:.LANCHOR133]
-.L2567:
-	adrp	x19, .LANCHOR7
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2569
-	str	x10, [x29, 96]
-	adrp	x0, .LC165
-	add	x0, x0, :lo12:.LC165
-	bl	printf
-	ldr	x10, [x29, 96]
-.L2569:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2570
-	ldr	w1, [x10, #:lo12:.LANCHOR192]
-	adrp	x0, .LC166
-	add	x0, x0, :lo12:.LC166
-	bl	printf
-.L2570:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2571
-	ldr	w1, [x28, #:lo12:.LANCHOR54]
-	adrp	x0, .LC167
-	add	x0, x0, :lo12:.LC167
+	strh	w5, [x3, #:lo12:.LANCHOR103]
+	mov	w3, 64
+	strh	w3, [x2, #:lo12:.LANCHOR138]
+	mov	w2, 12
+	strh	w2, [x0, #:lo12:.LANCHOR4]
+	adrp	x2, .LANCHOR13
+	ldrb	w2, [x2, #:lo12:.LANCHOR13]
+	cbnz	w2, .L2675
+	mov	w2, 4
+	strh	w2, [x0, #:lo12:.LANCHOR4]
+	mov	w0, 600
+	strh	w0, [x7, #:lo12:.LANCHOR105]
+	mov	w0, 128
+	strh	w0, [x6, #:lo12:.LANCHOR139]
+.L2675:
+	adrp	x19, .LANCHOR9
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2677
+	str	x4, [x29, 96]
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
-.L2571:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2572
-	ldr	w1, [x27, #:lo12:.LANCHOR193]
-	adrp	x0, .LC168
-	add	x0, x0, :lo12:.LC168
+	ldr	x4, [x29, 96]
+.L2677:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2678
+	ldr	w1, [x4, #:lo12:.LANCHOR199]
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2572:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2573
-	ldrh	w1, [x24, #:lo12:.LANCHOR175]
-	adrp	x0, .LC169
-	add	x0, x0, :lo12:.LC169
+.L2678:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2679
+	ldr	w1, [x28, #:lo12:.LANCHOR56]
+	adrp	x0, .LC178
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2573:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2574
-	ldrh	w1, [x20, #:lo12:.LANCHOR188]
-	adrp	x0, .LC170
-	add	x0, x0, :lo12:.LC170
+.L2679:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2680
+	ldr	w1, [x27, #:lo12:.LANCHOR200]
+	adrp	x0, .LC179
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2574:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2575
-	ldrh	w1, [x26, #:lo12:.LANCHOR134]
-	adrp	x0, .LC171
-	add	x0, x0, :lo12:.LC171
+.L2680:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2681
+	ldrh	w1, [x24, #:lo12:.LANCHOR182]
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	bl	printf
-.L2575:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2576
-	ldrh	w1, [x25, #:lo12:.LANCHOR83]
-	adrp	x0, .LC172
-	add	x0, x0, :lo12:.LC172
+.L2681:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2682
+	ldrh	w1, [x20, #:lo12:.LANCHOR195]
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2576:
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2577
+.L2682:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2683
+	ldrh	w1, [x26, #:lo12:.LANCHOR140]
+	adrp	x0, .LC182
+	add	x0, x0, :lo12:.LC182
+	bl	printf
+.L2683:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2684
+	ldrh	w1, [x25, #:lo12:.LANCHOR87]
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
+	bl	printf
+.L2684:
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2685
 	ldr	x0, [x29, 104]
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x0, .LC173
-	add	x0, x0, :lo12:.LC173
+	ldrh	w1, [x0, #:lo12:.LANCHOR91]
+	adrp	x0, .LC184
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2577:
+.L2685:
 	bl	buf_init
-	adrp	x25, .LANCHOR5
+	adrp	x25, .LANCHOR6
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrb	w1, [x21, #:lo12:.LANCHOR72]
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR76]
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR110
+	adrp	x1, .LANCHOR115
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR110]
-	adrp	x0, .LANCHOR109
-	ldrh	w1, [x22, #:lo12:.LANCHOR80]
-	str	x2, [x0, #:lo12:.LANCHOR109]
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	str	x0, [x1, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR114
+	ldrh	w1, [x22, #:lo12:.LANCHOR83]
+	str	x2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR4
+	adrp	x1, .LANCHOR5
 	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR4]
+	str	x3, [x1, #:lo12:.LANCHOR5]
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	add	w1, w0, w1, lsr 1
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x25, #:lo12:.LANCHOR5]
-	tbz	x0, 12, .L2578
-	adrp	x0, .LC174
-	add	x0, x0, :lo12:.LC174
+	str	x1, [x25, #:lo12:.LANCHOR6]
+	tbz	x0, 12, .L2686
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2578:
-	ldrh	w0, [x22, #:lo12:.LANCHOR80]
-	ldrb	w21, [x21, #:lo12:.LANCHOR72]
+.L2686:
+	ldrh	w0, [x22, #:lo12:.LANCHOR83]
+	ldrb	w21, [x21, #:lo12:.LANCHOR76]
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	ldrh	w22, [x24, #:lo12:.LANCHOR175]
+	ldrh	w22, [x24, #:lo12:.LANCHOR182]
 	mul	w21, w0, w21
-	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	ldr	w0, [x19, #:lo12:.LANCHOR9]
 	add	w21, w1, w21, lsl 2
 	lsl	w1, w1, 2
 	lsl	w21, w21, 1
 	add	w22, w1, w22, lsl 2
-	add	w21, w21, 612
+	add	w21, w21, 632
 	add	w22, w22, 704
-	tbz	x0, 12, .L2579
-	ldrh	w3, [x20, #:lo12:.LANCHOR188]
-	adrp	x0, .LC175
+	tbz	x0, 12, .L2687
+	ldrh	w3, [x20, #:lo12:.LANCHOR195]
+	adrp	x0, .LC186
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC175
+	add	x0, x0, :lo12:.LC186
 	bl	printf
-.L2579:
-	ldrh	w0, [x20, #:lo12:.LANCHOR188]
+.L2687:
+	ldrh	w0, [x20, #:lo12:.LANCHOR195]
 	cmp	w21, w0
-	bhi	.L2580
+	bhi	.L2688
 	cmp	w22, w0
-	bls	.L2581
-.L2580:
-.L2624:
-	b	.L2624
-.L2564:
+	bls	.L2689
+.L2688:
+.L2732:
+	b	.L2732
+.L2670:
 	add	w1, w1, 1
-	lsl	w2, w2, 1
+	lsl	w3, w3, 1
 	and	w1, w1, 65535
-	b	.L2563
-.L2581:
+	b	.L2669
+.L2672:
+	add	w4, w4, 1
+	lsl	w1, w1, 1
+	and	w4, w4, 65535
+	b	.L2671
+.L2689:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2562
+	beq	.L2668
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR97
+	adrp	x19, .LANCHOR100
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR6]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR170
-	ldrb	w0, [x0, #:lo12:.LANCHOR170]
-	cbz	w0, .L2583
-	ldr	x1, [x19, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR177
+	ldrb	w0, [x0, #:lo12:.LANCHOR177]
+	cbz	w0, .L2691
+	ldr	x1, [x19, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2583:
+.L2691:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2562:
+.L2668:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16523,14 +16997,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2628
+	cbnz	w0, .L2736
 	bl	zftl_init
-.L2628:
+.L2736:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
-	adrp	x0, .LC176
-	add	x0, x0, :lo12:.LC176
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -16543,72 +17017,71 @@ rk_ftl_init:
 	.type	gc_update_l2p_map_new, %function
 gc_update_l2p_map_new:
 	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR5
-	adrp	x1, .LANCHOR71
+	adrp	x0, .LANCHOR6
+	adrp	x1, .LANCHOR75
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	ldr	x20, [x0, #:lo12:.LANCHOR5]
-	stp	x25, x26, [sp, 64]
-	ldrh	w25, [x1, #:lo12:.LANCHOR71]
-	add	x1, x20, 80
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR7
+	ldr	x21, [x0, #:lo12:.LANCHOR6]
+	stp	x25, x26, [sp, 64]
+	ldrh	w26, [x1, #:lo12:.LANCHOR75]
+	add	x1, x21, 80
 	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR9
+	stp	x19, x20, [sp, 16]
 	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
+	stp	x0, x1, [x29, 128]
 	ldrb	w1, [x1, 9]
-	str	x0, [x29, 128]
-	mul	w25, w25, w1
-	ldr	w1, [x21, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L2631
-	ldrh	w1, [x20, 80]
-	adrp	x0, .LC177
-	add	x0, x0, :lo12:.LC177
+	mul	w26, w26, w1
+	ldr	w1, [x24, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L2739
+	ldrh	w1, [x21, 80]
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-.L2631:
-	adrp	x23, .LANCHOR4
-	ldrh	w1, [x20, 80]
-	sub	w2, w25, #1
+.L2739:
+	adrp	x23, .LANCHOR5
+	ldrh	w1, [x21, 80]
+	sub	w2, w26, #1
 	mov	x22, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	mov	w24, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w25, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	str	x0, [x29, 104]
-.L2632:
-	mov	w27, w22
-	cmp	w25, w22
-	bhi	.L2642
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2643
+.L2740:
+	mov	w28, w22
+	cmp	w26, w22
+	bhi	.L2750
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2751
 	ldr	x0, [x29, 128]
-	mov	w3, w24
-	ldr	x1, [x23, #:lo12:.LANCHOR4]
-	ldrh	w2, [x20, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	mov	w3, w25
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	ldrh	w2, [x21, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC181
-	add	x0, x0, :lo12:.LC181
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-.L2643:
-	ldrh	w1, [x20, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
+.L2751:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, x1, lsl 1]
-	cmp	w24, w0
-	beq	.L2644
-	adrp	x1, .LANCHOR194
+	cmp	w25, w0
+	beq	.L2752
+	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
-	mov	w2, 463
-	add	x1, x1, :lo12:.LANCHOR194
+	mov	w2, 483
+	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2644:
-	ldrh	w1, [x20, 80]
-	ldr	x0, [x23, #:lo12:.LANCHOR4]
-	strh	w24, [x0, x1, lsl 1]
-	ldrh	w0, [x20, 80]
+.L2752:
+	ldrh	w1, [x21, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	strh	w25, [x0, x1, lsl 1]
+	ldrh	w0, [x21, 80]
 	bl	zftl_insert_data_list
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16617,129 +17090,112 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2642:
-	adrp	x26, .LANCHOR139
+.L2750:
+	adrp	x27, .LANCHOR146
 	lsl	x19, x22, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR139]
+	ldr	x0, [x27, #:lo12:.LANCHOR146]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2633
-	adrp	x0, .LANCHOR117
-	ldrb	w0, [x0, #:lo12:.LANCHOR117]
-	lsl	w0, w0, 7
-	udiv	w0, w2, w0
-	and	w0, w0, 65535
+	beq	.L2741
+	adrp	x0, .LANCHOR123
+	ldrb	w20, [x0, #:lo12:.LANCHOR123]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w0, w20, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2634
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2742
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC178
+	adrp	x0, .LC189
 	mov	w3, w22
-	add	x0, x0, :lo12:.LC178
+	add	x0, x0, :lo12:.LC189
 	bl	printf
-.L2634:
-	sub	w27, w25, w27
-	add	x27, x27, x22
-	lsl	x0, x27, 2
-	str	x0, [x29, 136]
-	adrp	x0, .LC180
-	add	x0, x0, :lo12:.LC180
+.L2742:
+	sub	w28, w26, w28
+	add	x28, x28, x22
+	lsl	x0, x28, 2
+	str	x0, [x29, 144]
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR96
-	add	x0, x0, :lo12:.LANCHOR96
+	adrp	x0, .LANCHOR102
+	add	x0, x0, :lo12:.LANCHOR102
 	str	x0, [x29, 112]
-.L2635:
-	ldr	x0, [x29, 136]
+.L2743:
+	ldr	x0, [x29, 144]
 	cmp	x0, x19
-	bne	.L2641
-.L2633:
+	bne	.L2749
+.L2741:
 	add	x22, x22, 1
-	b	.L2632
-.L2641:
-	ldr	x0, [x26, #:lo12:.LANCHOR139]
-	ldr	w28, [x0, x19]
-	cmn	w28, #1
-	beq	.L2636
+	b	.L2740
+.L2749:
+	ldr	x0, [x27, #:lo12:.LANCHOR146]
+	ldr	w20, [x0, x19]
+	cmn	w20, #1
+	beq	.L2744
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
-	udiv	w0, w28, w0
+	udiv	w0, w20, w0
 	cmp	w1, w0, uxth
-	bne	.L2636
-	adrp	x0, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR140]
-	ldr	w27, [x0, x19]
-	mov	w0, w28
+	bne	.L2744
+	adrp	x0, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR147]
+	ldr	w28, [x0, x19]
+	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2637
+	bne	.L2745
 	mov	w2, 0
 	add	x1, x29, 172
-	mov	w0, w28
+	mov	w0, w20
 	bl	pm_log2phys
-.L2637:
+.L2745:
 	ldr	w3, [x29, 172]
-	cmp	w27, w3
-	bne	.L2638
-	adrp	x0, .LANCHOR141
+	cmp	w28, w3
+	bne	.L2746
+	adrp	x0, .LANCHOR148
 	mov	w2, 1
 	add	x1, x29, 168
-	add	w24, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR141]
+	add	w25, w25, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR148]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
-	mov	w0, w28
+	mov	w0, w20
 	bl	pm_log2phys
 	ldr	x0, [x29, 112]
-	mov	w1, 21
-	ldrh	w0, [x0]
-	sub	w2, w1, w0
-	mov	w1, 1
-	lsr	w0, w27, w0
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w1, w1, w0
-	and	w1, w1, 65535
-	str	w1, [x29, 152]
-	mov	w0, w1
+	ldrh	w1, [x0]
+	mov	w0, 21
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsr	w28, w28, w1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w28, w0, w28
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
+	udiv	w0, w28, w0
+.L2772:
 	bl	ftl_vpn_decrement
-	ldr	x0, [x29, 144]
-	ldr	w1, [x29, 152]
-	ldrh	w0, [x0]
-	cmp	w0, w1
-	bne	.L2639
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2639
-	ldr	w3, [x29, 172]
-	adrp	x0, .LC179
-	mov	w2, w27
-	mov	w1, w28
-	add	x0, x0, :lo12:.LC179
-	bl	printf
-.L2639:
-	ldr	x0, [x26, #:lo12:.LANCHOR139]
+	ldr	x0, [x27, #:lo12:.LANCHOR146]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2636:
+.L2744:
 	add	x19, x19, 4
-	b	.L2635
-.L2638:
-	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2640
+	b	.L2743
+.L2746:
+	ldr	w0, [x24, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2748
 	ldr	x0, [x29, 120]
-	mov	w2, w27
-	mov	w1, w28
+	mov	w2, w28
+	mov	w1, w20
 	bl	printf
-.L2640:
-	ldr	x0, [x29, 144]
+.L2748:
+	ldr	x0, [x29, 136]
 	ldrh	w0, [x0]
-	bl	ftl_vpn_decrement
-	b	.L2639
+	b	.L2772
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -16752,70 +17208,70 @@ gc_scan_src_blk_one_page:
 	mov	w7, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR63
-	add	x1, x19, :lo12:.LANCHOR63
+	adrp	x19, .LANCHOR65
+	add	x1, x19, :lo12:.LANCHOR65
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x1, 4]
 	add	x2, x1, x0, sxtw 1
 	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR72
-	ldrb	w4, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR76
+	ldrb	w4, [x2, #:lo12:.LANCHOR76]
 	ldrh	w2, [x1, 2]
-.L2668:
+.L2774:
 	cmp	w3, w7
-	beq	.L2670
-	cbz	w6, .L2671
-	add	x1, x19, :lo12:.LANCHOR63
+	beq	.L2776
+	cbz	w6, .L2777
+	add	x1, x19, :lo12:.LANCHOR65
 	strb	w0, [x1, 4]
-.L2671:
-	cbz	w5, .L2672
-	add	x0, x19, :lo12:.LANCHOR63
+.L2777:
+	cbz	w5, .L2778
+	add	x0, x19, :lo12:.LANCHOR65
 	strh	w2, [x0, 2]
-.L2672:
-	adrp	x0, .LANCHOR103
-	ldrh	w22, [x0, #:lo12:.LANCHOR103]
-	adrp	x0, .LANCHOR67
+.L2778:
+	adrp	x0, .LANCHOR108
+	ldrh	w22, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR71
 	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR67]
+	ldrb	w1, [x0, #:lo12:.LANCHOR71]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2673
-	add	x0, x19, :lo12:.LANCHOR63
+	bne	.L2779
+	add	x0, x19, :lo12:.LANCHOR65
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2673
+	cbnz	w1, .L2779
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2674:
-	add	x1, x19, :lo12:.LANCHOR63
+.L2780:
+	add	x1, x19, :lo12:.LANCHOR65
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2675
+	bne	.L2781
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2675:
+.L2781:
 	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR63
+	add	x19, x19, :lo12:.LANCHOR65
 	bl	buf_alloc
-	add	x23, x23, :lo12:.LANCHOR67
+	add	x23, x23, :lo12:.LANCHOR71
 	mov	x21, x0
 	mov	w20, 0
-	adrp	x24, .LANCHOR64
-.L2685:
+	adrp	x24, .LANCHOR68
+.L2791:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2676
-	cbz	w20, .L2677
-.L2676:
+	bne	.L2782
+	cbz	w20, .L2783
+.L2782:
 	cmp	w0, w20
-	bgt	.L2678
-.L2686:
+	bgt	.L2784
+.L2792:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -16824,33 +17280,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2670:
+.L2776:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2669
+	bne	.L2775
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2669:
+.L2775:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2668
-.L2673:
-	add	x0, x19, :lo12:.LANCHOR63
+	b	.L2774
+.L2779:
+	add	x0, x19, :lo12:.LANCHOR65
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2674
-.L2678:
+	b	.L2780
+.L2784:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2679
-	cbnz	w0, .L2679
+	bne	.L2785
+	cbnz	w0, .L2785
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2699:
+.L2805:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -16858,72 +17314,344 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2682
+	beq	.L2788
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2683
+	bne	.L2789
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2683:
+.L2789:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2682
+	bne	.L2788
 	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR64]
+	ldr	x2, [x24, #:lo12:.LANCHOR68]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2682:
+.L2788:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2677:
+.L2783:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2685
-	b	.L2686
-.L2679:
+	bne	.L2791
+	b	.L2792
+.L2785:
 	orr	w0, w22, w20, lsl 24
-	b	.L2699
+	b	.L2805
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
-	.section	.text.gc_scan_static_data,"ax",@progbits
+	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
-	.global	gc_scan_static_data
-	.type	gc_scan_static_data, %function
-gc_scan_static_data:
-	stp	x29, x30, [sp, -80]!
+	.global	gc_scan_src_blk
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	stp	x29, x30, [sp, -96]!
+	mov	w0, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR5
+	adrp	x19, .LANCHOR65
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	ldr	w1, [x0, 544]
-	str	x23, [sp, 48]
-	cmn	w1, #1
-	beq	.L2701
-	adrp	x21, .LANCHOR195
-	adrp	x22, .LC0
-	add	x21, x21, :lo12:.LANCHOR195
-	add	x22, x22, :lo12:.LC0
-	mov	w20, 11
-.L2709:
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	mov	w2, 0
-	add	x1, x29, 76
-	ldr	w0, [x0, 544]
-	bl	pm_log2phys
-	ldr	w0, [x29, 76]
-	cmn	w0, #1
-	beq	.L2702
-	mov	w0, 1
-	bl	buf_alloc
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w1, w0
+	bne	.L2807
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	mov	w2, 920
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2807:
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L2827
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L2809
+	adrp	x2, .LANCHOR5
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC192
+	add	x0, x0, :lo12:.LC192
+	bl	printf
+.L2809:
+	ldrh	w0, [x19, #:lo12:.LANCHOR65]
+	add	x14, x19, :lo12:.LANCHOR65
+	add	x1, x14, 40
+	bl	ftl_get_blk_list_in_sblk
+	and	w1, w0, 255
+	strb	w1, [x14, 5]
+	cbnz	w1, .L2810
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR65]
+.L2827:
+	mov	w0, 0
+	b	.L2806
+.L2810:
+	adrp	x4, .LANCHOR3
+	ldrh	w3, [x19, #:lo12:.LANCHOR65]
+	mov	x22, x4
+	ldr	x1, [x4, #:lo12:.LANCHOR3]
+	mov	x2, x3
+	add	x1, x1, x3, lsl 2
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 32
+	beq	.L2811
+	cmp	w1, 224
+	beq	.L2811
+	cbz	w1, .L2812
+	adrp	x1, .LANCHOR6
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldrh	w3, [x1, 16]
+	cmp	w3, w2
+	beq	.L2811
+	ldrh	w3, [x1, 48]
+	cmp	w3, w2
+	beq	.L2811
+	ldrh	w1, [x1, 80]
+	cmp	w1, w2
+	bne	.L2841
+.L2811:
+	add	x0, x19, :lo12:.LANCHOR65
+	mov	w1, -1
+	strh	w1, [x19, #:lo12:.LANCHOR65]
+	strh	wzr, [x0, 24]
+	b	.L2827
+.L2812:
+	adrp	x0, .LANCHOR5
+	mov	x20, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldrh	w1, [x1, x3, lsl 1]
+	cbz	w1, .L2814
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	mov	w2, 940
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2814:
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, x1, lsl 1]
+	b	.L2811
+.L2841:
+	and	w0, w0, 255
+	sub	w0, w0, #1
+	add	x0, x14, x0, sxtw 1
+	ldrh	w21, [x0, 40]
+	mov	w0, 65535
+	cmp	w21, w0
+	bne	.L2815
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	mov	w2, 948
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2815:
+	adrp	x1, .LANCHOR108
+	ldr	x3, [x22, #:lo12:.LANCHOR3]
+	adrp	x2, .LANCHOR83
+	adrp	x23, .LANCHOR75
+	ldrh	w20, [x1, #:lo12:.LANCHOR108]
+	mov	x24, x2
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	ldrh	w0, [x2, #:lo12:.LANCHOR83]
+	add	x1, x3, x1, lsl 2
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	mul	w20, w20, w21
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2828
+	adrp	x1, .LANCHOR71
+	ldrb	w21, [x1, #:lo12:.LANCHOR71]
+	cmp	w21, 2
+	orr	w20, w20, w21, lsl 24
+	beq	.L2817
+	and	w21, w21, 65535
+.L2816:
+	add	x22, x19, :lo12:.LANCHOR65
+	orr	w20, w0, w20
+	mov	w0, 1
+	strb	w21, [x22, 6]
+	strh	wzr, [x22, 2]
+	strb	wzr, [x22, 4]
+	strh	wzr, [x22, 26]
+	bl	buf_alloc
+	str	w20, [x0, 40]
+	mov	x25, x0
+	mov	w1, 1
+	adrp	x20, .LANCHOR68
+	bl	sblk_read_page
+	ldrh	w2, [x23, #:lo12:.LANCHOR75]
+	adrp	x23, .LANCHOR76
+	mov	w1, 255
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	mul	w2, w2, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR68]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	strh	wzr, [x22, 24]
+	ldr	w0, [x25, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2818
+.L2843:
+	mov	x0, x25
+	bl	buf_free
+	mov	w0, -1
+.L2806:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2817:
+	ldrh	w0, [x23, #:lo12:.LANCHOR75]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	b	.L2816
+.L2828:
+	mov	w21, 1
+	b	.L2816
+.L2818:
+	ldr	x0, [x25, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L2819
+	mov	w2, 980
+	adrp	x1, .LANCHOR202
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR202
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L2843
+.L2819:
+	ldrb	w0, [x23, #:lo12:.LANCHOR76]
+	adrp	x22, .LANCHOR102
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	adrp	x23, .LANCHOR101
+	ldr	x24, [x25, 8]
+	add	x22, x22, :lo12:.LANCHOR102
+	add	x23, x23, :lo12:.LANCHOR101
+	mov	x26, 0
+	mul	w0, w0, w1
+	mul	w21, w21, w0
+	and	w21, w21, 65535
+.L2820:
+	cmp	w21, w26
+	bgt	.L2825
+	mov	x0, x25
+	bl	buf_free
+	adrp	x0, .LANCHOR5
+	ldrh	w1, [x19, #:lo12:.LANCHOR65]
+	add	x3, x19, :lo12:.LANCHOR65
+	mov	x20, x0
+	ldr	x4, [x0, #:lo12:.LANCHOR5]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w3, [x3, 24]
+	ldrh	w2, [x4, x2]
+	cmp	w2, w3
+	beq	.L2826
+	adrp	x0, .LC193
+	add	x0, x0, :lo12:.LC193
+	bl	printf
+.L2826:
+	add	x0, x19, :lo12:.LANCHOR65
+	ldrh	w2, [x19, #:lo12:.LANCHOR65]
+	ldr	x1, [x20, #:lo12:.LANCHOR5]
+	ldrh	w3, [x0, 24]
+	strh	w3, [x1, x2, lsl 1]
+	strh	wzr, [x0, 28]
+	ldrh	w0, [x0, 24]
+	b	.L2806
+.L2825:
+	ldr	w0, [x24, x26, lsl 2]
+	cmn	w0, #1
+	beq	.L2822
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2823
+	ldr	w0, [x24, x26, lsl 2]
+	mov	w2, 0
+	add	x1, x29, 92
+	bl	pm_log2phys
+.L2823:
+	ldrh	w1, [x22]
+	mov	w0, 21
+	ldr	w3, [x29, 92]
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w3, w1
+	and	w0, w0, w1
+	ldrb	w1, [x23]
+	ldrh	w2, [x19, #:lo12:.LANCHOR65]
+	udiv	w0, w0, w1
+	add	x1, x19, :lo12:.LANCHOR65
+	cmp	w0, w2
+	bne	.L2822
+	ldrh	w0, [x1, 24]
+	ldr	x4, [x20, #:lo12:.LANCHOR68]
+	ubfiz	x2, x0, 2, 16
+	add	w0, w0, 1
+	str	w3, [x4, x2]
+	strh	w0, [x1, 24]
+.L2822:
+	add	x26, x26, 1
+	b	.L2820
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.gc_scan_static_data,"ax",@progbits
+	.align	2
+	.global	gc_scan_static_data
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR6
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w1, [x0, 544]
+	str	x23, [sp, 48]
+	cmn	w1, #1
+	beq	.L2845
+	adrp	x21, .LANCHOR203
+	adrp	x22, .LC0
+	add	x21, x21, :lo12:.LANCHOR203
+	add	x22, x22, :lo12:.LC0
+	mov	w20, 11
+.L2853:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	mov	w2, 0
+	add	x1, x29, 76
+	ldr	w0, [x0, 544]
+	bl	pm_log2phys
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	beq	.L2846
+	mov	w0, 1
+	bl	buf_alloc
 	ldr	w1, [x29, 76]
 	mov	x23, x0
 	str	w1, [x0, 40]
@@ -16931,45 +17659,45 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2703
-	adrp	x0, .LANCHOR96
+	bne	.L2847
+	adrp	x0, .LANCHOR102
 	ldr	w2, [x29, 76]
 	mov	w1, 1
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
-	adrp	x2, .LANCHOR95
-	ldrb	w3, [x2, #:lo12:.LANCHOR95]
+	adrp	x2, .LANCHOR101
+	ldrb	w3, [x2, #:lo12:.LANCHOR101]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2703:
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+.L2847:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2704
-	mov	w2, 1369
+	beq	.L2848
+	mov	w2, 1419
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2704:
+.L2848:
 	mov	x0, x23
 	bl	buf_free
-.L2702:
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	adrp	x2, .LANCHOR54
-	ldr	w2, [x2, #:lo12:.LANCHOR54]
+.L2846:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR56
+	ldr	w2, [x2, #:lo12:.LANCHOR56]
 	ldr	w1, [x0, 544]
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2705
+	bcc	.L2849
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -16980,48 +17708,42 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2700:
+.L2844:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2705:
+.L2849:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2700
+	bne	.L2844
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2709
-	b	.L2700
-.L2701:
-	adrp	x1, .LANCHOR97
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
-	ldr	w2, [x1, 40]
-	cmp	w2, 20480
-	bls	.L2711
-	ldr	w3, [x1, 44]
-	add	w3, w3, w2, lsr 10
-	and	w2, w2, 1023
-	stp	w2, w3, [x1, 40]
-.L2711:
-	ldr	w2, [x0, 536]
-	ldr	w3, [x0, 12]
-	add	w2, w2, 12959744
-	add	w2, w2, 256
-	cmp	w3, w2
-	ldr	w2, [x1, 44]
-	bhi	.L2712
+	bne	.L2853
+	b	.L2844
+.L2845:
+	ldr	w1, [x0, 536]
+	adrp	x3, .LANCHOR100
+	ldr	w2, [x0, 12]
+	add	w1, w1, 12959744
+	add	w1, w1, 256
+	cmp	w2, w1
+	bhi	.L2855
+	ldr	x4, [x3, #:lo12:.LANCHOR100]
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
+	ldr	w4, [x4, 44]
 	add	w1, w1, 1696
-	cmp	w2, w1
-	bls	.L2700
-.L2712:
-	str	w3, [x0, 536]
-	str	w2, [x0, 540]
+	cmp	w4, w1
+	bls	.L2844
+.L2855:
+	ldr	x1, [x3, #:lo12:.LANCHOR100]
+	ldr	w1, [x1, 44]
+	str	w1, [x0, 540]
+	str	w2, [x0, 536]
 	str	wzr, [x0, 544]
-	b	.L2700
+	b	.L2844
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -17029,116 +17751,125 @@ gc_scan_static_data:
 	.type	ftl_sblk_dump, %function
 ftl_sblk_dump:
 	sub	sp, sp, #272
+	and	x0, x0, 65535
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	adrp	x24, .LANCHOR3
+	lsl	x23, x0, 2
+	stp	x0, x1, [x29, 144]
 	stp	x21, x22, [sp, 80]
-	and	w21, w0, 65535
+	mov	x21, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR3]
 	stp	x19, x20, [sp, 64]
-	mov	w0, 65535
-	stp	x23, x24, [sp, 96]
-	cmp	w21, w0
+	add	x1, x0, x23
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
-	beq	.L2739
+	ldr	w5, [x0, x23]
+	ldrb	w2, [x1, 2]
+	mov	w1, w21
+	ldrh	w4, [x0, x23]
+	adrp	x0, .LC194
+	ubfx	x5, x5, 11, 8
+	add	x0, x0, :lo12:.LC194
+	ubfx	x3, x2, 3, 2
+	and	w4, w4, 2047
+	ubfx	x2, x2, 5, 3
+	bl	printf
+	mov	w0, 65535
+	cmp	w21, w0
+	beq	.L2882
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w21
-	bls	.L2739
-	uxtw	x0, w21
-	adrp	x25, .LANCHOR3
-	str	x0, [x29, 136]
-	lsl	x0, x0, 2
-	str	x0, [x29, 160]
-	ldr	x0, [x25, #:lo12:.LANCHOR3]
-	ldr	x2, [x29, 160]
-	add	x0, x0, x2
+	bls	.L2882
+	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2740
-	adrp	x0, .LANCHOR67
-	ldrb	w24, [x0, #:lo12:.LANCHOR67]
-.L2720:
+	bne	.L2883
+	adrp	x0, .LANCHOR71
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
+.L2863:
 	add	x28, x29, 224
-	adrp	x19, .LANCHOR80
-	str	x1, [x29, 152]
+	adrp	x19, .LANCHOR83
 	mov	w0, w21
 	mov	w27, 0
 	mov	w20, 0
 	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	ldrh	w2, [x19, #:lo12:.LANCHOR80]
+	ldrh	w2, [x19, #:lo12:.LANCHOR83]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
 	and	w4, w0, 255
 	strb	wzr, [x29, 197]
-	mov	w3, w24
+	mov	w3, w25
 	strh	wzr, [x29, 194]
-	adrp	x0, .LC182
+	adrp	x0, .LC195
 	mul	w1, w1, w2
-	ldr	x2, [x29, 160]
-	strh	w1, [x29, 198]
-	add	x0, x0, :lo12:.LC182
-	ldr	x1, [x25, #:lo12:.LANCHOR3]
 	strh	wzr, [x29, 202]
-	add	x1, x1, x2
+	strh	w1, [x29, 198]
+	add	x0, x0, :lo12:.LC195
+	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	add	x1, x1, x23
 	ldrb	w2, [x1, 2]
 	mov	w1, w21
 	ubfx	x2, x2, 5, 3
 	bl	printf
 	mov	w0, 1
 	bl	buf_alloc
-	str	x19, [x29, 128]
+	str	x19, [x29, 136]
 	mov	x26, x0
-	stp	wzr, wzr, [x29, 168]
-	adrp	x0, .LANCHOR103
-	add	x0, x0, :lo12:.LANCHOR103
-	str	x0, [x29, 104]
-.L2721:
-	ldr	x0, [x29, 128]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	stp	wzr, wzr, [x29, 164]
+	adrp	x0, .LANCHOR108
+	add	x0, x0, :lo12:.LANCHOR108
+	str	x0, [x29, 112]
+.L2864:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	cmp	w0, w20
-	bls	.L2736
+	bls	.L2879
 	lsl	w0, w20, 1
-	mov	w23, 0
+	str	wzr, [x29, 172]
 	sub	w0, w0, #1
-	str	w0, [x29, 148]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
-	str	x0, [x29, 112]
-	b	.L2737
-.L2740:
-	mov	w24, 1
-	b	.L2720
-.L2733:
-	ldr	x0, [x29, 120]
+	str	w0, [x29, 160]
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
+	str	x0, [x29, 120]
+	b	.L2880
+.L2883:
+	mov	w25, 1
+	b	.L2863
+.L2876:
+	ldr	x0, [x29, 128]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2722
-	ldr	x0, [x29, 104]
-	cmp	w24, 3
+	beq	.L2865
+	ldr	x0, [x29, 112]
+	cmp	w25, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2723
+	bne	.L2866
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2724:
+.L2867:
 	str	w19, [x26, 40]
 	mov	w1, 1
-	str	w10, [x29, 100]
+	str	w10, [x29, 104]
 	mov	x0, x26
 	bl	sblk_read_page
 	ldr	x1, [x26, 24]
 	mov	w3, w19
 	ldr	x0, [x26, 8]
 	ldr	w11, [x26, 52]
-	ldr	w10, [x29, 100]
+	ldr	w10, [x29, 104]
 	ldr	w2, [x1, 12]
 	mov	w4, w11
 	str	w2, [sp, 32]
-	str	w11, [x29, 144]
+	str	w11, [x29, 108]
 	ldr	w2, [x1, 8]
 	str	w2, [sp, 24]
 	ldr	w2, [x1, 4]
@@ -17151,130 +17882,132 @@ ftl_sblk_dump:
 	mov	w1, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	ldr	x0, [x29, 112]
+	ldr	x0, [x29, 120]
 	bl	printf
-	ldr	w11, [x29, 144]
-	ldr	w0, [x29, 168]
+	ldr	w11, [x29, 108]
+	mov	w1, 32
+	ldr	w0, [x29, 164]
 	cmp	w11, 512
-	ldr	x1, [x29, 160]
 	ccmn	w11, #1, 4, ne
 	csinc	w0, w0, wzr, ne
-	str	w0, [x29, 168]
-	ldr	x0, [x25, #:lo12:.LANCHOR3]
-	add	x0, x0, x1
-	mov	w1, 32
+	str	w0, [x29, 164]
+	ldr	x0, [x24, #:lo12:.LANCHOR3]
+	add	x0, x0, x23
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2722
+	beq	.L2865
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2727
+	bne	.L2870
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2727:
+.L2870:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2728
-	ldr	w0, [x29, 172]
+	bne	.L2871
+	ldr	w0, [x29, 168]
 	mov	w1, w19
 	add	w0, w0, 1
-	str	w0, [x29, 172]
+	str	w0, [x29, 168]
 	ldr	x0, [x26, 24]
-	ldr	w3, [x29, 172]
+	ldr	w3, [x29, 168]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC183
-	add	x0, x0, :lo12:.LC183
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2728:
+.L2871:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2730
+	cbz	x0, .L2873
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2731
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2731
-	adrp	x0, .LC184
+	beq	.L2874
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2874
+	adrp	x0, .LC197
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC184
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2731:
+.L2874:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2730
+	beq	.L2873
 	cmn	w0, #1
-	beq	.L2730
-	adrp	x1, .LANCHOR196
+	beq	.L2873
+	adrp	x1, .LANCHOR204
 	adrp	x0, .LC0
-	mov	w2, 1193
-	add	x1, x1, :lo12:.LANCHOR196
+	mov	w2, 1300
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2730:
+.L2873:
 	add	w27, w27, 1
-.L2722:
+.L2865:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2735:
-	cmp	w24, w22
-	bcs	.L2733
-	add	w23, w23, 1
-	and	w23, w23, 65535
-.L2737:
+.L2878:
+	cmp	w25, w22
+	bcs	.L2876
+	ldr	w0, [x29, 172]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w0, [x29, 172]
+.L2880:
 	ldrb	w0, [x29, 201]
-	cmp	w0, w23
-	bls	.L2734
-	sxtw	x0, w23
+	ldr	w1, [x29, 172]
+	cmp	w0, w1
+	bls	.L2877
+	ldrsw	x0, [x29, 172]
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
-	str	x0, [x29, 120]
-	b	.L2735
-.L2723:
-	cmp	w24, 2
-	bne	.L2725
-	ldr	w0, [x29, 148]
+	str	x0, [x29, 128]
+	b	.L2878
+.L2866:
+	cmp	w25, 2
+	bne	.L2868
+	ldr	w0, [x29, 160]
 	add	w19, w19, w0
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR71
 	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	orr	w19, w19, w0, lsl 24
-	b	.L2724
-.L2725:
+	b	.L2867
+.L2868:
 	add	w19, w20, w19
-	b	.L2724
-.L2734:
+	b	.L2867
+.L2877:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2721
-.L2736:
+	b	.L2864
+.L2879:
 	mov	x0, x26
 	bl	buf_free
-	adrp	x0, .LANCHOR4
-	ldr	x1, [x29, 136]
-	ldr	w3, [x29, 172]
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR5
+	ldr	x1, [x29, 144]
+	ldr	w3, [x29, 168]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, x1, lsl 1]
 	mov	w1, w21
-	adrp	x0, .LC185
-	add	x0, x0, :lo12:.LC185
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-	ldr	w0, [x29, 168]
-.L2718:
+	ldr	w0, [x29, 164]
+.L2861:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -17283,9 +18016,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2739:
+.L2882:
 	mov	w0, 0
-	b	.L2718
+	b	.L2861
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -17296,40 +18029,40 @@ zftl_read:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w0
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	w24, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	w19, w1
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2751
+	tbz	x0, 12, .L2894
 	mov	w3, w2
-	adrp	x0, .LC186
+	adrp	x0, .LC199
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC186
+	add	x0, x0, :lo12:.LC199
 	mov	w1, w21
 	bl	printf
-.L2751:
-	cbnz	w21, .L2752
-	adrp	x0, .LANCHOR59
+.L2894:
+	cbnz	w21, .L2895
+	adrp	x0, .LANCHOR61
 	mov	w21, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2753:
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+.L2896:
 	add	w1, w19, w24
 	cmp	w0, w1
-	bcc	.L2777
-	adrp	x1, .LANCHOR97
-	adrp	x25, .LANCHOR117
+	bcc	.L2920
+	adrp	x1, .LANCHOR100
+	adrp	x25, .LANCHOR123
 	add	w21, w21, w19
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR97]
+	ldr	x2, [x1, #:lo12:.LANCHOR100]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w24
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR117]
+	ldrb	w0, [x25, #:lo12:.LANCHOR123]
 	add	w2, w24, w21
 	stp	w2, wzr, [x29, 136]
 	sub	w2, w2, #1
@@ -17339,16 +18072,16 @@ zftl_read:
 	sub	w26, w0, w27
 	str	w0, [x29, 132]
 	add	w26, w26, 1
-	adrp	x0, .LANCHOR197
-	add	x0, x0, :lo12:.LANCHOR197
+	adrp	x0, .LANCHOR205
+	add	x0, x0, :lo12:.LANCHOR205
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	str	x0, [x29, 104]
-.L2755:
-	cbnz	w26, .L2775
+.L2898:
+	cbnz	w26, .L2918
 	ldr	w0, [x29, 140]
-.L2750:
+.L2893:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17356,21 +18089,21 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2752:
+.L2895:
 	cmp	w21, 3
-	bhi	.L2777
+	bhi	.L2920
 	lsl	w21, w21, 13
 	mov	w0, 8192
-	b	.L2753
-.L2775:
-	ldrb	w1, [x25, #:lo12:.LANCHOR117]
+	b	.L2896
+.L2918:
+	ldrb	w1, [x25, #:lo12:.LANCHOR123]
 	cmp	w20, w27
 	ldr	w0, [x29, 132]
 	and	w19, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L2778
+	bne	.L2921
 	cmp	w20, w27
-	bne	.L2757
+	bne	.L2900
 	udiv	w22, w21, w1
 	and	w0, w24, 65535
 	msub	w1, w22, w1, w21
@@ -17379,17 +18112,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w24, w19
 	csel	w19, w0, w19, cc
-.L2756:
-	adrp	x0, .LANCHOR46
-	add	x1, x0, :lo12:.LANCHOR46
+.L2899:
+	adrp	x0, .LANCHOR48
+	add	x1, x0, :lo12:.LANCHOR48
 	add	x1, x1, 2
 	mov	w0, 0
-.L2760:
+.L2903:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L2758
+	bne	.L2901
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2758
+	tbz	x2, 3, .L2901
 	ldr	x1, [x29, 104]
 	ubfiz	x0, x0, 6, 32
 	lsl	w2, w19, 9
@@ -17401,104 +18134,104 @@ zftl_read:
 	add	x23, x23, x19
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2759:
+.L2902:
 	add	w20, w20, 1
 	sub	w26, w26, #1
-	b	.L2755
-.L2757:
+	b	.L2898
+.L2900:
 	ldr	w0, [x29, 136]
 	msub	w19, w1, w20, w0
 	and	w19, w19, 255
-.L2778:
+.L2921:
 	mov	w22, 0
-	b	.L2756
-.L2758:
+	b	.L2899
+.L2901:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2760
+	bne	.L2903
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2761
+	bne	.L2904
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w20
 	bl	pm_log2phys
-.L2761:
+.L2904:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2762
-	add	x22, x25, :lo12:.LANCHOR117
+	bne	.L2905
+	add	x22, x25, :lo12:.LANCHOR123
 	mov	w19, 0
-.L2763:
+.L2906:
 	ldrb	w0, [x22]
 	cmp	w19, w0
-	bcs	.L2759
+	bcs	.L2902
 	madd	w0, w20, w0, w19
 	cmp	w21, w0
-	bhi	.L2764
+	bhi	.L2907
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2764
+	bls	.L2907
 	mov	x0, x23
 	add	x23, x23, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2764:
+.L2907:
 	add	w19, w19, 1
-	b	.L2763
-.L2762:
+	b	.L2906
+.L2905:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2766
+	cbnz	x0, .L2909
 	bl	ftl_read_ahead
-	b	.L2755
-.L2766:
+	b	.L2898
+.L2909:
 	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 40]
 	add	w0, w0, 1
 	str	w0, [x1, 40]
 	ldr	w0, [x29, 156]
 	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR117]
+	ldrb	w0, [x25, #:lo12:.LANCHOR123]
 	cmp	w0, w19
-	bne	.L2768
+	bne	.L2911
 	str	x23, [x28, 16]
-.L2768:
+.L2911:
 	mov	w1, 1
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w10, [x28, 52]
 	cmn	w10, #1
-	bne	.L2769
-	adrp	x0, .LANCHOR5
+	bne	.L2912
+	adrp	x0, .LANCHOR6
 	str	w10, [x29, 140]
-	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	x1, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2770:
+.L2913:
 	ldr	x0, [x28, 24]
 	ldr	w5, [x0, 4]
 	cmp	w20, w5
-	beq	.L2771
+	beq	.L2914
 	ldr	w4, [x0]
 	mov	w2, w20
 	ldp	w6, w7, [x0, 8]
 	str	w10, [x29, 128]
 	ldrb	w1, [x28, 1]
-	adrp	x0, .LC159
+	adrp	x0, .LC171
 	ldr	w3, [x29, 156]
-	add	x0, x0, :lo12:.LC159
+	add	x0, x0, :lo12:.LC171
 	bl	printf
-	adrp	x0, .LANCHOR96
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x29, 156]
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	ldrh	w3, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -17506,48 +18239,48 @@ zftl_read:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 128]
-.L2771:
+.L2914:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w20, w0
-	bne	.L2772
+	bne	.L2915
 	cmn	w10, #1
-	bne	.L2773
-.L2772:
+	bne	.L2916
+.L2915:
 	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
-	mov	w2, 1031
+	mov	w2, 1048
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2773:
+.L2916:
 	ldr	x0, [x28, 16]
-	cbnz	x0, .L2774
+	cbnz	x0, .L2917
 	ldr	x1, [x28, 8]
 	ubfiz	x22, x22, 9, 16
 	lsl	w2, w19, 9
 	mov	x0, x23
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2774:
+.L2917:
 	ubfiz	x19, x19, 9, 16
 	mov	x0, x28
 	add	x23, x23, x19
 	bl	buf_free
-	b	.L2759
-.L2769:
+	b	.L2902
+.L2912:
 	cmp	w10, 256
-	bne	.L2770
-	adrp	x0, .LANCHOR96
+	bne	.L2913
+	adrp	x0, .LANCHOR102
 	mov	w4, 21
 	mov	w5, 1
 	stp	w10, w5, [x29, 96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR102]
 	ldr	w0, [x29, 156]
 	sub	w4, w4, w1
 	ldp	w2, w3, [x28, 36]
@@ -17555,11 +18288,11 @@ zftl_read:
 	lsr	w0, w0, w1
 	sub	w4, w4, #1
 	and	w4, w4, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR101
+	ldrb	w0, [x0, #:lo12:.LANCHOR101]
 	udiv	w4, w4, w0
-	adrp	x0, .LC187
-	add	x0, x0, :lo12:.LC187
+	adrp	x0, .LC200
+	add	x0, x0, :lo12:.LC200
 	and	w1, w4, 65535
 	str	w4, [x29, 128]
 	bl	printf
@@ -17570,10 +18303,10 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 96]
-	b	.L2770
-.L2777:
+	b	.L2913
+.L2920:
 	mov	w0, -1
-	b	.L2750
+	b	.L2893
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -17638,883 +18371,102 @@ ftl_read:
 	and	w0, w0, 255
 	b	zftl_read
 	.size	ftl_read, .-ftl_read
-	.section	.text.vpn_check,"ax",@progbits
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
-	.global	vpn_check
-	.type	vpn_check, %function
-vpn_check:
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR5
+	mov	x22, x0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR4
+	adrp	x0, .LANCHOR83
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR54
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR2
 	stp	x27, x28, [sp, 80]
-	bl	dump_ftl_info
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x23, x23, :lo12:.LANCHOR54
-	add	x25, x24, :lo12:.LANCHOR2
-	mov	w22, 0
-	adrp	x20, check_vpc_tbl
-	ldrh	w3, [x0, 80]
-	ldrh	w2, [x0, 48]
-	ldrh	w1, [x0, 16]
-	adrp	x0, .LC188
-	add	x0, x0, :lo12:.LC188
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldr	x3, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x0, 16]
-	ldrh	w2, [x0, 22]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC189
-	add	x0, x0, :lo12:.LC189
-	sub	w4, w3, w2
-	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldr	x3, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x0, 48]
-	ldrh	w2, [x0, 54]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC190
-	add	x0, x0, :lo12:.LC190
-	sub	w4, w3, w2
+	ldrh	w23, [x0, #:lo12:.LANCHOR83]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	mul	w23, w23, w0
+	adrp	x0, .LANCHOR114
+	str	x0, [x29, 104]
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	add	x19, x1, x19, lsl 2
+	add	x1, x19, x23, sxtw 2
+	ldr	w1, [x1, -4]
+	cmn	w1, #1
+	beq	.L2937
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC0
+	mov	w2, 1576
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	mov	w2, 4608
-	mov	w1, 0
-	add	x0, x20, :lo12:check_vpc_tbl
-	bl	ftl_memset
-.L2794:
-	ldr	w0, [x23]
-	cmp	w22, w0
-	bcc	.L2802
-	adrp	x0, .LANCHOR2
-	adrp	x24, .LC193
-	add	x5, x0, :lo12:.LANCHOR2
-	mov	x28, x0
-	add	x24, x24, :lo12:.LC193
-	mov	w23, 0
-	mov	w22, 0
-.L2803:
-	ldrh	w0, [x5]
-	cmp	w0, w22
-	bhi	.L2805
-	adrp	x24, .LANCHOR198
-	adrp	x25, .LC0
-	add	x22, x28, :lo12:.LANCHOR2
-	add	x24, x24, :lo12:.LANCHOR198
-	add	x25, x25, :lo12:.LC0
+.L2937:
+	adrp	x27, .LANCHOR123
+	mov	x24, 0
+	add	x0, x27, :lo12:.LANCHOR123
 	mov	w21, 0
-.L2806:
-	ldrh	w0, [x22]
-	cmp	w0, w21
-	bhi	.L2812
-	mov	w2, w23
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC195
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC195
+	str	x0, [x29, 96]
+.L2938:
+	cmp	w24, w23
+	blt	.L2944
+	adrp	x0, .LANCHOR9
+	adrp	x19, .LANCHOR5
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L2945
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC204
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC204
 	bl	printf
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+.L2945:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
 	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2802:
-	mov	w0, w22
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 124]
-	cmn	w0, #1
-	bne	.L2795
-	mov	w2, 0
-	add	x1, x29, 124
-	mov	w0, w22
-	bl	pm_log2phys
-.L2796:
-	ldr	w2, [x29, 124]
+.L2944:
+	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L2798
-	adrp	x0, .LANCHOR96
-	mov	w3, 21
-	ldrh	w0, [x0, #:lo12:.LANCHOR96]
-	sub	w1, w3, w0
-	mov	w3, 1
-	lsr	w0, w2, w0
-	lsl	w3, w3, w1
-	sub	w3, w3, #1
-	and	w3, w3, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w3, w3, w0
-	ldrh	w0, [x24, #:lo12:.LANCHOR2]
-	and	w26, w3, 65535
-	and	w3, w3, 65535
-	cmp	w0, w26
-	bls	.L2799
-	add	x0, x20, :lo12:check_vpc_tbl
-	sxtw	x3, w3
-	ldrh	w1, [x0, x3, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x0, x3, lsl 1]
-.L2800:
-	ldrh	w0, [x25]
-	cmp	w0, w26
-	bhi	.L2798
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC0
-	mov	w2, 1267
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2798:
-	add	w22, w22, 1
-	b	.L2794
-.L2795:
-	adrp	x1, .LANCHOR96
-	ldrh	w3, [x1, #:lo12:.LANCHOR96]
-	mov	w1, 21
-	sub	w2, w1, w3
-	mov	w1, 1
-	lsr	w0, w0, w3
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w0, w1, w0
-	adrp	x1, .LANCHOR95
-	ldrb	w1, [x1, #:lo12:.LANCHOR95]
-	udiv	w0, w0, w1
-	ldrh	w1, [x24, #:lo12:.LANCHOR2]
-	cmp	w1, w0, uxth
-	bhi	.L2796
-	mov	w2, 1257
-	adrp	x1, .LANCHOR198
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR198
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L2796
-.L2799:
-	mov	w1, w22
-	adrp	x0, .LC191
-	add	x0, x0, :lo12:.LC191
-	bl	printf
-	adrp	x0, .LANCHOR117
-	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LANCHOR123+8
-	ldr	x1, [x0, #:lo12:.LANCHOR123+8]
-	adrp	x0, .LC192
-	lsl	w3, w3, 7
-	add	x0, x0, :lo12:.LC192
-	bl	rknand_print_hex
-	b	.L2800
-.L2805:
-	uxtw	x0, w22
-	ldr	x1, [x19, #:lo12:.LANCHOR4]
-	lsl	x27, x0, 1
-	add	x25, x20, :lo12:check_vpc_tbl
-	sxtw	x26, w22
-	ldrh	w3, [x1, x27]
-	ldrh	w2, [x25, x26, lsl 1]
-	cmp	w3, w2
-	beq	.L2804
-	adrp	x1, .LANCHOR3
-	str	x5, [x29, 104]
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
-	add	x0, x1, x0, lsl 2
-	mov	w1, w22
-	ldrb	w4, [x0, 2]
-	mov	x0, x24
-	ubfx	x4, x4, 5, 3
+	beq	.L2939
+	ldrb	w20, [x27, #:lo12:.LANCHOR123]
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2940
+	adrp	x0, .LC201
+	mov	w3, w24
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC201
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	mov	w1, 65535
-	ldr	x5, [x29, 104]
-	ldrh	w0, [x0, x27]
-	cmp	w0, w1
-	beq	.L2804
-	ldrh	w1, [x25, x26, lsl 1]
-	cmp	w1, w0
-	bls	.L2804
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldrh	w1, [x0, 16]
-	cmp	w1, w22
-	beq	.L2804
-	ldrh	w1, [x0, 80]
-	cmp	w1, w22
-	beq	.L2804
-	ldrh	w0, [x0, 48]
-	cmp	w0, w22
-	csinc	w23, w23, wzr, eq
-.L2804:
-	add	w0, w22, 1
-	and	w22, w0, 65535
-	b	.L2803
-.L2812:
-	adrp	x0, .LANCHOR3
-	uxtw	x26, w21
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
-	add	x0, x0, x26, lsl 2
-	ldrb	w0, [x0, 2]
-	tst	w0, 224
-	bne	.L2808
-	add	x0, x20, :lo12:check_vpc_tbl
-	sxtw	x27, w21
-	ldrh	w0, [x0, x27, lsl 1]
-	cbnz	w0, .L2809
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	lsl	x28, x26, 1
-	ldrh	w0, [x0, x28]
-	cbz	w0, .L2810
-	adrp	x0, .LC194
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC194
-	bl	printf
-.L2810:
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x28]
-.L2809:
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, x26, lsl 1]
-	cbz	w0, .L2808
-	add	x0, x20, :lo12:check_vpc_tbl
-	ldrh	w0, [x0, x27, lsl 1]
-	cbz	w0, .L2808
-	mov	w2, 1299
-	mov	x1, x24
-	mov	x0, x25
-	bl	printf
-.L2808:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2806
-	.size	vpn_check, .-vpn_check
-	.section	.text.gc_scan_src_blk,"ax",@progbits
-	.align	2
-	.global	gc_scan_src_blk
-	.type	gc_scan_src_blk, %function
-gc_scan_src_blk:
-	stp	x29, x30, [sp, -96]!
-	mov	w0, 65535
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR63
-	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w1, w0
-	bne	.L2824
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	mov	w2, 897
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2824:
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	mov	w0, 65535
-	cmp	w1, w0
-	beq	.L2846
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2826
-	adrp	x2, .LANCHOR4
-	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC196
-	add	x0, x0, :lo12:.LC196
-	bl	printf
-.L2826:
-	ldrh	w0, [x19, #:lo12:.LANCHOR63]
-	add	x14, x19, :lo12:.LANCHOR63
-	add	x1, x14, 40
-	bl	ftl_get_blk_list_in_sblk
-	and	w1, w0, 255
-	strb	w1, [x14, 5]
-	cbnz	w1, .L2827
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L2846:
-	mov	w0, 0
-	b	.L2823
-.L2827:
-	adrp	x4, .LANCHOR3
-	ldrh	w3, [x19, #:lo12:.LANCHOR63]
-	mov	x22, x4
-	ldr	x1, [x4, #:lo12:.LANCHOR3]
-	mov	x2, x3
-	add	x1, x1, x3, lsl 2
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 32
-	beq	.L2828
-	cmp	w1, 224
-	beq	.L2828
-	cbz	w1, .L2829
-	adrp	x1, .LANCHOR5
-	ldr	x1, [x1, #:lo12:.LANCHOR5]
-	ldrh	w3, [x1, 16]
-	cmp	w3, w2
-	beq	.L2828
-	ldrh	w3, [x1, 48]
-	cmp	w3, w2
-	beq	.L2828
-	ldrh	w1, [x1, 80]
-	cmp	w1, w2
-	bne	.L2860
-.L2828:
-	add	x0, x19, :lo12:.LANCHOR63
-	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR63]
-	strh	wzr, [x0, 24]
-	b	.L2846
-.L2829:
-	adrp	x0, .LANCHOR4
-	mov	x20, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2831
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	mov	w2, 917
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2831:
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	ldr	x0, [x20, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x1, lsl 1]
-	b	.L2828
-.L2860:
-	and	w0, w0, 255
-	sub	w0, w0, #1
-	add	x0, x14, x0, sxtw 1
-	ldrh	w21, [x0, 40]
-	mov	w0, 65535
-	cmp	w21, w0
-	bne	.L2832
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	mov	w2, 925
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2832:
-	adrp	x1, .LANCHOR103
-	ldr	x3, [x22, #:lo12:.LANCHOR3]
-	adrp	x2, .LANCHOR80
-	adrp	x23, .LANCHOR71
-	ldrh	w20, [x1, #:lo12:.LANCHOR103]
-	mov	x24, x2
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	ldrh	w0, [x2, #:lo12:.LANCHOR80]
-	add	x1, x3, x1, lsl 2
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-	mul	w20, w20, w21
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 160
-	bne	.L2847
-	adrp	x1, .LANCHOR67
-	ldrb	w21, [x1, #:lo12:.LANCHOR67]
-	cmp	w21, 2
-	orr	w20, w20, w21, lsl 24
-	beq	.L2834
-	and	w21, w21, 65535
-.L2833:
-	add	x22, x19, :lo12:.LANCHOR63
-	orr	w20, w0, w20
-	mov	w0, 1
-	strb	w21, [x22, 6]
-	strh	wzr, [x22, 2]
-	strb	wzr, [x22, 4]
-	strh	wzr, [x22, 26]
-	bl	buf_alloc
-	str	w20, [x0, 40]
-	mov	x25, x0
-	mov	w1, 1
-	adrp	x20, .LANCHOR64
-	bl	sblk_read_page
-	ldrh	w2, [x23, #:lo12:.LANCHOR71]
-	adrp	x23, .LANCHOR72
-	mov	w1, 255
-	ldrb	w0, [x23, #:lo12:.LANCHOR72]
-	mul	w2, w2, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR64]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	strh	wzr, [x22, 24]
-	ldr	w0, [x25, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2835
-.L2837:
-	mov	x0, x25
-	bl	buf_free
-	mov	w0, -1
-.L2823:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2834:
-	ldrh	w0, [x23, #:lo12:.LANCHOR71]
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-	b	.L2833
-.L2847:
-	mov	w21, 1
-	b	.L2833
-.L2835:
-	ldr	x0, [x25, 24]
-	mov	w22, 15555
-	movk	w22, 0xf55f, lsl 16
-	ldr	w0, [x0]
-	cmp	w0, w22
-	beq	.L2836
-	ldrh	w0, [x19, #:lo12:.LANCHOR63]
-	mov	x1, 0
-	bl	ftl_sblk_dump
-	ldr	x0, [x25, 24]
-	ldr	w0, [x0]
-	cmp	w0, w22
-	beq	.L2837
-	mov	w2, 955
-	adrp	x1, .LANCHOR199
-	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR199
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-	b	.L2837
-.L2836:
-	ldrb	w0, [x23, #:lo12:.LANCHOR72]
-	adrp	x22, .LANCHOR96
-	ldrh	w1, [x24, #:lo12:.LANCHOR80]
-	adrp	x23, .LANCHOR95
-	ldr	x24, [x25, 8]
-	add	x22, x22, :lo12:.LANCHOR96
-	add	x23, x23, :lo12:.LANCHOR95
-	mov	x26, 0
-	mul	w0, w0, w1
-	mul	w21, w21, w0
-	and	w21, w21, 65535
-.L2838:
-	cmp	w21, w26
-	bgt	.L2843
-	mov	x0, x25
-	bl	buf_free
-	ldrh	w1, [x19, #:lo12:.LANCHOR63]
-	adrp	x20, .LANCHOR4
-	add	x0, x19, :lo12:.LANCHOR63
-	ldr	x3, [x20, #:lo12:.LANCHOR4]
-	ubfiz	x2, x1, 1, 16
-	ldrh	w2, [x3, x2]
-	ldrh	w3, [x0, 24]
-	cmp	w2, w3
-	beq	.L2844
-	adrp	x0, .LC197
-	add	x0, x0, :lo12:.LC197
-	bl	printf
-.L2844:
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
-	add	x0, x19, :lo12:.LANCHOR63
-	ldr	x1, [x20, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, 24]
-	ldrh	w1, [x1, x2, lsl 1]
-	cmp	w1, w0
-	bcs	.L2845
-	bl	vpn_check
-.L2845:
-	add	x0, x19, :lo12:.LANCHOR63
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
-	ldr	x1, [x20, #:lo12:.LANCHOR4]
-	ldrh	w3, [x0, 24]
-	strh	w3, [x1, x2, lsl 1]
-	strh	wzr, [x0, 28]
-	ldrh	w0, [x0, 24]
-	b	.L2823
-.L2843:
-	ldr	w0, [x24, x26, lsl 2]
-	cmn	w0, #1
-	beq	.L2840
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
-	cmn	w0, #1
-	bne	.L2841
-	ldr	w0, [x24, x26, lsl 2]
-	mov	w2, 0
-	add	x1, x29, 92
-	bl	pm_log2phys
-.L2841:
-	ldrh	w1, [x22]
-	mov	w0, 21
-	ldr	w3, [x29, 92]
-	sub	w2, w0, w1
-	mov	w0, 1
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	lsr	w1, w3, w1
-	and	w0, w0, w1
-	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR63]
-	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR63
-	cmp	w0, w2
-	bne	.L2840
-	ldrh	w0, [x1, 24]
-	ldr	x4, [x20, #:lo12:.LANCHOR64]
-	ubfiz	x2, x0, 2, 16
-	add	w0, w0, 1
-	str	w3, [x4, x2]
-	strh	w0, [x1, 24]
-.L2840:
-	add	x26, x26, 1
-	b	.L2838
-	.size	gc_scan_src_blk, .-gc_scan_src_blk
-	.section	.text.ftl_scan_all_data,"ax",@progbits
-	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #160
-	mov	w0, 0
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	mov	w20, 0
-	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR54
-	stp	x27, x28, [sp, 96]
-	add	x28, x23, :lo12:.LANCHOR54
-	stp	x21, x22, [sp, 48]
-	adrp	x24, .LC200
-	stp	x25, x26, [sp, 80]
-	bl	buf_alloc
-	mov	w1, 0
-	mov	x19, x0
-	adrp	x0, .LC198
-	add	x0, x0, :lo12:.LC198
-	bl	printf
-	add	x0, x24, :lo12:.LC200
-	str	x0, [x29, 120]
-.L2863:
-	ldr	w0, [x23, #:lo12:.LANCHOR54]
-	cmp	w20, w0
-	bcc	.L2876
-	mov	x0, x19
-	bl	buf_free
-	ldp	x29, x30, [sp, 16]
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	add	sp, sp, 160
-	ret
-.L2876:
-	mov	w0, -1
-	str	w0, [x19, 36]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2864
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w20
-	bl	pm_log2phys
-.L2864:
-	tst	x20, 4095
-	bne	.L2865
-	ldr	w2, [x29, 140]
-	adrp	x0, .LC199
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC199
-	bl	printf
-.L2865:
-	ldr	w0, [x29, 140]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L2866
-.L2868:
-	add	w20, w20, 1
-	b	.L2863
-.L2866:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w3, [x19, 52]
-	ldr	x0, [x19, 24]
-	cmp	w3, 256
-	ccmn	w3, #1, 4, ne
-	beq	.L2867
-	ldr	w1, [x0, 4]
-	cmp	w20, w1
-	beq	.L2868
-.L2867:
-	ldr	x1, [x19, 8]
-	add	x27, x24, :lo12:.LC200
-	adrp	x25, .LANCHOR117
-	adrp	x26, .LC201
-	adrp	x22, .LANCHOR123
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	bl	printf
-	ldr	x1, [x19, 24]
-	ldr	w0, [x1, 8]
-	cmn	w0, #1
-	bne	.L2869
-.L2871:
-	ldrb	w21, [x25, #:lo12:.LANCHOR117]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR123
-	mov	w4, w0
-	add	x0, x26, :lo12:.LC201
-	lsl	w27, w21, 7
-	ubfiz	w3, w21, 7, 9
-	sub	w3, w3, #1
-	add	x21, x22, 8
-	and	w3, w3, w20
-	adrp	x26, .LC203
-	sdiv	w27, w20, w27
-	and	w3, w3, 65535
-	add	x22, x22, 520
-	add	x26, x26, :lo12:.LC203
-	mov	w1, w20
-	and	w25, w27, 65535
-	mov	w2, w25
-	bl	printf
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w20
-	bl	pm_log2phys
-.L2870:
-	ldr	x1, [x21]
-	cbz	x1, .L2875
-	ldrh	w0, [x21, -8]
-	cmp	w0, w25
-	bne	.L2875
-	mov	w3, 4096
-	mov	w2, 4
-	mov	x0, x26
-	bl	rknand_print_hex
-.L2875:
-	add	x21, x21, 16
-	cmp	x22, x21
-	bne	.L2870
-	b	.L2868
-.L2869:
-	ldr	w21, [x1, 4]
-	ldr	w1, [x28]
-	cmp	w21, w1
-	bcs	.L2871
-	str	w0, [x19, 40]
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
-	bl	printf
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2872
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w21
-	bl	pm_log2phys
-.L2872:
-	ldr	w0, [x29, 140]
-	mov	w1, 1
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w21
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
-	ldr	x0, [x29, 120]
-	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR117]
-	mov	w0, w21
-	str	w3, [x29, 104]
-	lsl	w2, w3, 7
-	udiv	w2, w21, w2
-	and	w27, w2, 65535
-	str	w2, [x29, 112]
-	bl	lpa_hash_get_ppa
-	mov	w4, w0
-	ldr	w3, [x29, 104]
-	mov	w1, w21
-	ldr	w2, [x29, 112]
-	add	x0, x26, :lo12:.LC201
-	ubfiz	w3, w3, 7, 9
-	and	w2, w2, 65535
-	sub	w3, w3, #1
-	and	w3, w3, w21
-	and	w3, w3, 65535
-	bl	printf
-	mov	w0, w21
-	mov	w2, 0
-	add	x1, x29, 140
-	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR123
-	adrp	x5, .LC202
-	add	x21, x0, 8
-	add	x4, x0, 520
-	add	x5, x5, :lo12:.LC202
-.L2874:
-	ldr	x1, [x21]
-	cbz	x1, .L2873
-	ldrh	w0, [x21, -8]
-	cmp	w0, w27
-	bne	.L2873
-	mov	x0, x5
-	stp	x4, x5, [x29, 104]
-	mov	w3, 4096
-	mov	w2, 4
-	bl	rknand_print_hex
-	ldp	x4, x5, [x29, 104]
-.L2873:
-	add	x21, x21, 16
-	cmp	x4, x21
-	bne	.L2874
-	b	.L2871
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
-	.section	.text.ftl_update_l2p_map,"ax",@progbits
-	.align	2
-	.global	ftl_update_l2p_map
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x19, x20, [sp, 16]
-	adrp	x0, .LANCHOR80
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR80]
-	ldrb	w0, [x22, 9]
-	ldrh	w19, [x22, 12]
-	mul	w23, w23, w0
-	adrp	x0, .LANCHOR109
-	str	x0, [x29, 104]
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	add	x19, x1, x19, lsl 2
-	add	x1, x19, x23, sxtw 2
-	ldr	w1, [x1, -4]
-	cmn	w1, #1
-	beq	.L2887
-	adrp	x1, .LANCHOR200
-	adrp	x0, .LC0
-	mov	w2, 1468
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2887:
-	adrp	x27, .LANCHOR117
-	mov	x24, 0
-	add	x0, x27, :lo12:.LANCHOR117
-	mov	w21, 0
-	str	x0, [x29, 96]
-.L2888:
-	cmp	w24, w23
-	blt	.L2894
-	adrp	x0, .LANCHOR7
-	adrp	x19, .LANCHOR4
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2895
-	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC207
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC207
-	bl	printf
-.L2895:
-	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldp	x23, x24, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x25, x26, [sp, 64]
-	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2894:
-	ldr	w2, [x19, x24, lsl 2]
-	cmn	w2, #1
-	beq	.L2889
-	ldrb	w20, [x27, #:lo12:.LANCHOR117]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w20, w20, 65535
-	tbz	x0, 12, .L2890
-	adrp	x0, .LC204
-	mov	w3, w24
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC204
-	bl	printf
-.L2890:
-	adrp	x25, .LANCHOR103
-	adrp	x26, .LC205
+.L2940:
+	adrp	x25, .LANCHOR108
+	adrp	x26, .LC202
 	mov	x28, x24
-	add	x25, x25, :lo12:.LANCHOR103
-	add	x26, x26, :lo12:.LC205
-.L2893:
+	add	x25, x25, :lo12:.LANCHOR108
+	add	x26, x26, :lo12:.LC202
+.L2943:
 	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L2891
+	beq	.L2941
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2891
+	bne	.L2941
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w28, w0
 	msub	w0, w1, w0, w28
@@ -18526,15 +18478,15 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2892
+	cbz	w0, .L2942
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR109]
-	adrp	x0, .LC206
-	add	x0, x0, :lo12:.LC206
+	ldr	x1, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LC203
+	add	x0, x0, :lo12:.LC203
 	bl	rknand_print_hex
-.L2892:
+.L2942:
 	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -18543,13 +18495,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x28, lsl 2]
-.L2891:
+.L2941:
 	add	x28, x28, 1
 	cmp	w23, w28
-	bgt	.L2893
-.L2889:
+	bgt	.L2943
+.L2939:
 	add	x24, x24, 1
-	b	.L2888
+	b	.L2938
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18565,11 +18517,11 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2917
+	beq	.L2967
 	bl	zftl_insert_data_list
-.L2917:
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+.L2967:
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	add	x0, x0, 16
 	cmp	x19, x0
 	mov	x0, x19
@@ -18591,41 +18543,54 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR46
+	adrp	x0, .LANCHOR48
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	add	x26, x0, :lo12:.LANCHOR46
+	stp	x23, x24, [sp, 48]
+	add	x23, x0, :lo12:.LANCHOR48
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L2922:
-	adrp	x3, .LANCHOR53
-	ldrb	w1, [x3, #:lo12:.LANCHOR53]
-	cbz	w1, .L2924
-	adrp	x4, .LANCHOR52
-	adrp	x2, .LANCHOR46
-	add	x2, x2, :lo12:.LANCHOR46
+.L2972:
+	adrp	x2, .LANCHOR55
+	ldrb	w1, [x2, #:lo12:.LANCHOR55]
+	cbz	w1, .L2974
+	adrp	x3, .LANCHOR54
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	sub	w1, w1, #1
-	ldrb	w0, [x4, #:lo12:.LANCHOR52]
-	str	x0, [x29, 104]
-	strb	w1, [x3, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR54
-	ubfiz	x27, x0, 6, 8
-	add	x5, x2, x27
-	str	x5, [x29, 120]
-	lsl	x5, x0, 6
-	ldr	w1, [x1, #:lo12:.LANCHOR54]
-	add	x0, x2, x5
-	ldrb	w5, [x2, x5]
+	ldrb	w4, [x3, #:lo12:.LANCHOR54]
+	strb	w1, [x2, #:lo12:.LANCHOR55]
+	ubfiz	x27, x4, 6, 8
+	add	x5, x0, x27
+	stp	x4, x5, [x29, 112]
+	lsl	x4, x4, 6
+	add	x5, x0, x4
+	ldrb	w0, [x0, x4]
+	strb	w0, [x3, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR56
+	ldr	w2, [x5, 36]
+	mov	x19, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	cmp	w2, w1
+	bcc	.L2976
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC0
+	mov	w2, 487
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2976:
+	ldr	x0, [x29, 112]
+	ldr	w1, [x19, #:lo12:.LANCHOR56]
+	add	x0, x23, x0, lsl 6
 	ldr	w22, [x0, 36]
-	strb	w5, [x4, #:lo12:.LANCHOR52]
 	cmp	w22, w1
-	bcc	.L2926
+	bcc	.L2977
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2921:
+.L2971:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18633,111 +18598,111 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2926:
+.L2977:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
-	ldr	x24, [x0, 8]
+	ldr	x25, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR115
-	str	x0, [x29, 112]
-	ldrb	w1, [x0, #:lo12:.LANCHOR115]
-	cbz	w1, .L2928
-	adrp	x0, .LANCHOR163
-	ldrb	w1, [x0, #:lo12:.LANCHOR163]
-	add	x1, x2, x1, lsl 6
-.L2929:
+	adrp	x0, .LANCHOR121
+	str	x0, [x29, 104]
+	ldrb	w1, [x0, #:lo12:.LANCHOR121]
+	cbz	w1, .L2979
+	adrp	x0, .LANCHOR169
+	ldrb	w1, [x0, #:lo12:.LANCHOR169]
+	add	x1, x23, x1, lsl 6
+.L2980:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2930
+	bne	.L2981
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2928
+	bne	.L2979
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
-	add	x1, x24, x21
+	add	x1, x25, x21
 	add	x0, x0, x21
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2922
-.L2930:
+	b	.L2972
+.L2981:
 	ubfiz	x1, x0, 6, 8
-	add	x1, x26, x1
-	b	.L2929
-.L2928:
+	add	x1, x23, x1
+	b	.L2980
+.L2979:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2932
+	bne	.L2983
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2932:
-	adrp	x25, .LANCHOR5
-	add	x1, x26, 2
+.L2983:
+	adrp	x26, .LANCHOR6
+	add	x1, x23, 2
 	mov	w0, 0
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 16
-.L2935:
+.L2986:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2933
+	bne	.L2984
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2933
+	tbz	x2, 3, .L2984
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
-	add	x0, x26, x0
+	add	x0, x23, x0
 	strb	w2, [x0, 2]
-	ldr	x23, [x0, 8]
+	ldr	x24, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2934:
-	adrp	x0, .LANCHOR117
+.L2985:
+	adrp	x0, .LANCHOR123
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	ldrb	w1, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w1
-	bcs	.L2959
+	bcs	.L3010
 	add	w20, w21, w20
-	cbz	x23, .L2937
-	cbz	w21, .L2938
+	cbz	x24, .L2988
+	cbz	w21, .L2989
 	lsl	w2, w21, 9
-	mov	x1, x23
-	mov	x0, x24
+	mov	x1, x24
+	mov	x0, x25
 	bl	ftl_memcpy
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 48
-.L2938:
+.L2989:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L2939
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	bcc	.L2990
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 16
-.L2959:
-	mov	w23, 0
-	b	.L2936
-.L2933:
+.L3010:
+	mov	w24, 0
+	b	.L2987
+.L2984:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2935
-	mov	x23, 0
-	b	.L2934
-.L2939:
+	bne	.L2986
+	mov	x24, 0
+	b	.L2985
+.L2990:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
-	add	x1, x23, x0
+	add	x1, x24, x0
 	lsl	w2, w2, 9
-	add	x0, x24, x0
+	add	x0, x25, x0
 	bl	ftl_memcpy
-	b	.L2959
-.L2937:
+	b	.L3010
+.L2988:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2940
+	beq	.L2991
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -18746,110 +18711,95 @@ ftl_write_commit:
 	mov	w1, 1
 	bl	sblk_read_page
 	ldr	x0, [x27, 24]
-	ldr	w23, [x0, 12]
+	ldr	w24, [x0, 12]
 	ldr	w0, [x0, 4]
-	add	w23, w23, 1
+	add	w24, w24, 1
 	cmp	w22, w0
-	bne	.L2941
+	bne	.L2992
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2942
-.L2941:
+	bne	.L2993
+.L2992:
 	ldrb	w1, [x27, 1]
 	mov	w3, w22
-	ldr	w4, [x27, 52]
-	adrp	x0, .LC208
 	ldr	w2, [x29, 140]
-	add	x0, x0, :lo12:.LC208
+	adrp	x0, .LC205
+	ldr	w4, [x27, 52]
+	add	x0, x0, :lo12:.LC205
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC154
+	adrp	x0, .LC166
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC166
 	bl	rknand_print_hex
-	adrp	x0, .LANCHOR96
-	ldr	w1, [x29, 140]
-	ldrh	w3, [x0, #:lo12:.LANCHOR96]
-	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2942:
+.L2993:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2943
+	bne	.L2994
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2944
-.L2943:
-	adrp	x1, .LANCHOR201
+	bne	.L2995
+.L2994:
+	adrp	x1, .LANCHOR207
 	adrp	x0, .LC0
-	mov	w2, 544
-	add	x1, x1, :lo12:.LANCHOR201
+	mov	w2, 557
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2944:
-	cbz	w21, .L2945
+.L2995:
+	cbz	w21, .L2996
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2946
+	beq	.L2997
 	ldr	x1, [x27, 8]
-	mov	x0, x24
+	mov	x0, x25
 	bl	ftl_memcpy
-.L2947:
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+.L2998:
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 48
-.L2945:
+.L2996:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	cmp	w20, w2
-	bcc	.L2948
-	bls	.L2949
-	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	bcc	.L2999
+	bls	.L3000
+	ldr	x19, [x26, #:lo12:.LANCHOR6]
 	add	x19, x19, 16
-.L2949:
-	cbz	x27, .L2936
+.L3000:
+	cbz	x27, .L2987
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
 	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR58
-	add	x0, x0, :lo12:.LANCHOR58
+	adrp	x0, .LANCHOR60
+	add	x0, x0, :lo12:.LANCHOR60
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2936:
+.L2987:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2951
+	cbnz	w0, .L3002
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2951:
+.L3002:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
-	ldr	x1, [x29, 104]
-	adrp	x20, .LANCHOR163
+	ldr	x1, [x29, 112]
+	adrp	x20, .LANCHOR169
 	lsl	x2, x1, 6
-	add	x1, x26, x2
+	add	x1, x23, x2
 	ldr	w3, [x1, 32]
 	stp	w3, w22, [x28]
-	str	w23, [x28, 12]
+	str	w24, [x28, 12]
 	ldr	w3, [x29, 140]
 	str	w3, [x28, 8]
 	stp	w0, w3, [x1, 40]
 	mov	w0, -1
-	strb	w0, [x26, x2]
+	strb	w0, [x23, x2]
 	mov	w2, 10
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, w2
@@ -18860,94 +18810,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR163
+	add	x0, x20, :lo12:.LANCHOR169
 	bl	buf_add_tail
-	ldr	x0, [x29, 112]
-	ldrb	w2, [x0, #:lo12:.LANCHOR115]
+	ldr	x0, [x29, 104]
+	ldrb	w2, [x0, #:lo12:.LANCHOR121]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR202
+	strb	w2, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR208
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR202]
+	str	wzr, [x0, #:lo12:.LANCHOR208]
 	ldrh	w0, [x19, 6]
-	bhi	.L2952
+	bhi	.L3003
 	cmp	w0, 1
-	bne	.L2925
-.L2952:
+	bne	.L2975
+.L3003:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR163]
+	ldrb	w0, [x20, #:lo12:.LANCHOR169]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L2956:
+.L3007:
 	cmp	w1, w4
-	bne	.L2957
-	strb	w3, [x20, #:lo12:.LANCHOR163]
+	bne	.L3008
+	strb	w3, [x20, #:lo12:.LANCHOR169]
 	and	w1, w1, 255
-	ldr	x3, [x29, 112]
+	ldr	x3, [x29, 104]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
-	add	x0, x26, x0
-	strb	w2, [x3, #:lo12:.LANCHOR115]
+	add	x0, x23, x0
+	strb	w2, [x3, #:lo12:.LANCHOR121]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2925
+	bne	.L2975
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2925:
-	adrp	x0, .LANCHOR53
-	ldrb	w0, [x0, #:lo12:.LANCHOR53]
-	cbnz	w0, .L2922
-.L2924:
+.L2975:
+	adrp	x0, .LANCHOR55
+	ldrb	w0, [x0, #:lo12:.LANCHOR55]
+	cbnz	w0, .L2972
+.L2974:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2921
-.L2948:
+	b	.L2971
+.L2999:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L2950
+	beq	.L3001
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
-	add	x0, x24, x0
+	add	x0, x25, x0
 	bl	ftl_memcpy
-	b	.L2949
-.L2950:
+	b	.L3000
+.L3001:
 	mov	w1, 0
-	add	x0, x24, x0, lsl 2
+	add	x0, x25, x0, lsl 2
 	bl	ftl_memset
-	b	.L2949
-.L2957:
+	b	.L3000
+.L3008:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
-	ldrb	w3, [x26, x3]
-	b	.L2956
-.L2958:
+	ldrb	w3, [x23, x3]
+	b	.L3007
+.L3009:
 	lsl	w2, w21, 9
 	mov	x27, 0
-	mov	w23, 0
-.L2946:
+	mov	w24, 0
+.L2997:
 	mov	w1, 0
-	mov	x0, x24
+	mov	x0, x25
 	bl	ftl_memset
-	b	.L2947
-.L2940:
-	cbnz	w21, .L2958
-	mov	w23, 0
+	b	.L2998
+.L2991:
+	cbnz	w21, .L3009
+	mov	w24, 0
 	mov	x27, 0
-	b	.L2945
+	b	.L2996
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -18955,21 +18905,21 @@ ftl_write_commit:
 	.type	gc_do_copy_back, %function
 gc_do_copy_back:
 	sub	sp, sp, #224
-	adrp	x0, .LANCHOR70
+	adrp	x0, .LANCHOR74
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
 	stp	x19, x20, [sp, 32]
 	stp	x21, x22, [sp, 48]
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2982
+	cbnz	w0, .L3033
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L2981
-	adrp	x20, .LANCHOR63
-	add	x3, x20, :lo12:.LANCHOR63
+	cbz	x0, .L3032
+	adrp	x20, .LANCHOR65
+	add	x3, x20, :lo12:.LANCHOR65
 	ldrh	w2, [x3, 26]
 	mov	w0, w2
 	bl	gc_get_src_ppa_from_index
@@ -18983,71 +18933,52 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2984
-	adrp	x0, .LANCHOR96
-	ldrh	w1, [x0, #:lo12:.LANCHOR96]
-	mov	w0, 21
-	sub	w2, w0, w1
-	mov	w0, 1
-	lsr	w1, w22, w1
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2984:
-	ldr	w0, [x19, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2985
-	adrp	x1, .LANCHOR203
+	bne	.L3035
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 573
-	add	x1, x1, :lo12:.LANCHOR203
+	mov	w2, 595
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2985:
+.L3035:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L2986
+	bne	.L3036
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L2986:
+.L3036:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L2987
-	adrp	x0, .LANCHOR46
-	add	x0, x0, :lo12:.LANCHOR46
+	bne	.L3037
+	adrp	x0, .LANCHOR48
+	add	x0, x0, :lo12:.LANCHOR48
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L2990:
+.L3040:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2988
+	bne	.L3038
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L2988
+	tbz	x2, 1, .L3038
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2981
-	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LC209
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3032
+	add	x20, x20, :lo12:.LANCHOR65
+	adrp	x0, .LC206
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC209
+	add	x0, x0, :lo12:.LC206
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L2981:
+.L3032:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -19056,14 +18987,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L2988:
+.L3038:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L2990
-	adrp	x0, .LANCHOR117
+	bne	.L3040
+	adrp	x0, .LANCHOR123
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR117]
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19072,67 +19003,67 @@ gc_do_copy_back:
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0]
 	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2991
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3041
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR63
+	add	x1, x20, :lo12:.LANCHOR65
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC207
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC207
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L2991:
+.L3041:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR97
-	ldr	x1, [x0, #:lo12:.LANCHOR97]
+	add	x20, x20, :lo12:.LANCHOR65
+	adrp	x0, .LANCHOR100
+	ldr	x1, [x0, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L2981
-.L2987:
-	adrp	x0, .LANCHOR7
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2992
-	add	x20, x20, :lo12:.LANCHOR63
+	b	.L3032
+.L3037:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3042
+	add	x20, x20, :lo12:.LANCHOR65
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC210
+	adrp	x0, .LC207
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC210
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2992:
+.L3042:
 	mov	x0, x19
 	bl	buf_free
-	b	.L2981
-.L2982:
-	adrp	x1, .LANCHOR5
-	adrp	x0, .LANCHOR67
+	b	.L3032
+.L3033:
+	adrp	x1, .LANCHOR6
+	adrp	x0, .LANCHOR71
 	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR63
-	ldr	x22, [x1, #:lo12:.LANCHOR5]
-	ldrb	w25, [x0, #:lo12:.LANCHOR67]
+	adrp	x24, .LANCHOR65
+	ldr	x22, [x1, #:lo12:.LANCHOR6]
+	ldrb	w25, [x0, #:lo12:.LANCHOR71]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L2993
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2994
-	add	x0, x24, :lo12:.LANCHOR63
+	bne	.L3043
+	adrp	x0, .LANCHOR73
+	ldrb	w0, [x0, #:lo12:.LANCHOR73]
+	cbz	w0, .L3044
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
 	add	w21, w19, w19, lsl 1
@@ -19140,30 +19071,30 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L2995:
-	adrp	x1, .LANCHOR71
+.L3045:
+	adrp	x1, .LANCHOR75
 	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR63
+	add	x4, x24, :lo12:.LANCHOR65
 	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	ldrh	w3, [x1, #:lo12:.LANCHOR75]
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR140
-	ldr	x7, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR147
+	ldr	x7, [x0, #:lo12:.LANCHOR147]
 	sub	w3, w3, #1
-.L2998:
+.L3048:
 	cmp	w2, w8
-	blt	.L3000
-.L3027:
+	blt	.L3050
+.L3077:
 	mov	w23, 1
-	b	.L2996
-.L2994:
-	add	x0, x24, :lo12:.LANCHOR63
+	b	.L3046
+.L3044:
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR204
-	add	x0, x0, :lo12:.LANCHOR204
+	adrp	x0, .LANCHOR210
+	add	x0, x0, :lo12:.LANCHOR210
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -19174,31 +19105,31 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L2995
-.L2996:
-	adrp	x0, .LANCHOR7
+	beq	.L3045
+.L3046:
+	adrp	x0, .LANCHOR9
 	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L3001
-	adrp	x0, .LANCHOR140
+	ldr	w1, [x0, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L3051
+	adrp	x0, .LANCHOR147
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR140]
-	add	x0, x24, :lo12:.LANCHOR63
+	ldr	x2, [x0, #:lo12:.LANCHOR147]
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC211
+	adrp	x0, .LC208
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC211
+	add	x0, x0, :lo12:.LC208
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L3001:
-	adrp	x0, .LANCHOR46
+.L3051:
+	adrp	x0, .LANCHOR48
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR48
 	str	x0, [x29, 120]
-.L3002:
+.L3052:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19206,78 +19137,78 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3014
+	blt	.L3064
 	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3015
+	beq	.L3065
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3016:
+.L3066:
 	cmp	w2, w3
-	blt	.L3022
+	blt	.L3072
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3021
-.L2993:
-	adrp	x0, .LANCHOR102
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbnz	w0, .L2997
-	add	x0, x24, :lo12:.LANCHOR63
+	b	.L3071
+.L3043:
+	adrp	x0, .LANCHOR107
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbnz	w0, .L3047
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2995
-.L2997:
-	add	x0, x24, :lo12:.LANCHOR63
+	b	.L3045
+.L3047:
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
 	ldrh	w20, [x0, 314]
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2995
-.L3000:
+	b	.L3045
+.L3050:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3027
+	beq	.L3077
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L2999
+	bne	.L3049
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L2981
+	bcs	.L3032
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L2999:
+.L3049:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L2998
-.L3014:
+	b	.L3048
+.L3064:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
 	sxtw	x27, w0
-	adrp	x0, .LANCHOR68
-	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L3003
+	bne	.L3053
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3004
+	cbnz	x0, .L3054
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19285,17 +19216,17 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2981
-.L3004:
-	adrp	x0, .LANCHOR68
+	cbz	x0, .L3032
+.L3054:
+	adrp	x0, .LANCHOR72
 	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR71
-	adrp	x6, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	adrp	x5, .LANCHOR75
+	adrp	x6, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR63
+	add	x1, x24, :lo12:.LANCHOR65
 	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR71]
+	ldrh	w7, [x5, #:lo12:.LANCHOR75]
 	ldrb	w0, [x1, 7]
 	add	w0, w0, 1
 	strb	w0, [x1, 7]
@@ -19306,32 +19237,32 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L3005
-	adrp	x0, .LANCHOR139
-	adrp	x4, .LANCHOR72
+	bne	.L3055
+	adrp	x0, .LANCHOR146
+	adrp	x4, .LANCHOR76
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR139]
+	ldr	x1, [x0, #:lo12:.LANCHOR146]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
 	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR72]
+	ldrb	w2, [x4, #:lo12:.LANCHOR76]
 	mul	w2, w2, w7
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldp	x6, x5, [x29, 96]
 	ldr	x4, [x29, 144]
 	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR71]
-	ldrb	w1, [x4, #:lo12:.LANCHOR72]
+	ldrh	w0, [x5, #:lo12:.LANCHOR75]
+	ldrb	w1, [x4, #:lo12:.LANCHOR76]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR140]
+	ldr	x1, [x6, #:lo12:.LANCHOR147]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR123
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR117]
+	ldrb	w2, [x0, #:lo12:.LANCHOR123]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19340,88 +19271,88 @@ gc_do_copy_back:
 	ldr	x5, [x29, 104]
 	movk	w0, 0xf55f, lsl 16
 	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR71]
+	ldrh	w1, [x5, #:lo12:.LANCHOR75]
 	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR72]
+	ldrb	w0, [x4, #:lo12:.LANCHOR76]
 	mul	w1, w1, w0
 	ldr	x0, [x28, 8]
 	lsl	w1, w1, 2
 	bl	js_hash
 	str	w0, [x6, 4]
 	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L3003:
-	adrp	x0, .LANCHOR68
+.L3053:
+	adrp	x0, .LANCHOR72
 	ldr	w5, [x29, 156]
-	add	x3, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR46
-	add	x2, x0, :lo12:.LANCHOR46
-	ldrb	w1, [x4, x27]
-	ubfiz	x0, x1, 6, 8
-	add	x0, x2, x0
-	add	x2, x2, x1, lsl 6
-	str	x0, [x3, w5, sxtw 3]
+	add	x1, x29, 160
+	ldr	x4, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR48
+	add	x3, x0, :lo12:.LANCHOR48
+	ldrb	w2, [x4, x27]
+	ubfiz	x0, x2, 6, 8
+	add	x0, x3, x0
+	add	x3, x3, x2, lsl 6
+	str	x0, [x1, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR141
-	strh	w0, [x2, 50]
+	adrp	x5, .LANCHOR148
+	strh	w0, [x3, 50]
 	ldr	x0, [x29, 128]
-	strb	w23, [x2, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	strb	w23, [x3, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR71]
 	cmp	w0, 3
-	bne	.L3009
+	bne	.L3059
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR103
-	ldrh	w6, [x6, #:lo12:.LANCHOR103]
-	add	w3, w0, w19
+	adrp	x6, .LANCHOR108
+	ldrh	w6, [x6, #:lo12:.LANCHOR108]
+	add	w1, w0, w19
 	add	w0, w0, w0, lsl 1
-	add	x3, x22, x3, sxtw 1
+	add	x1, x22, x1, sxtw 1
 	sub	w0, w26, w0
 	and	w0, w0, 65535
 	add	w0, w0, 1
-	ldrh	w3, [x3, 16]
-	mul	w3, w3, w6
-	ldrh	w6, [x2, 48]
-	orr	w3, w3, w21
-	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR141]
-	orr	w0, w3, w0, lsl 24
-	str	w0, [x2, x6, lsl 2]
-.L3010:
+	ldrh	w1, [x1, 16]
+	mul	w1, w1, w6
+	ldrh	w6, [x3, 48]
+	orr	w1, w1, w21
+	str	w1, [x3, 40]
+	ldr	x3, [x5, #:lo12:.LANCHOR148]
+	orr	w0, w1, w0, lsl 24
+	str	w0, [x3, x6, lsl 2]
+.L3060:
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3013
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3063
 	ldr	x0, [x29, 120]
-	mov	w2, w23
 	ldrb	w4, [x4, x27]
-	add	x1, x0, x1, lsl 6
-	add	x0, x24, :lo12:.LANCHOR63
+	ldr	w1, [x29, 156]
+	add	x2, x0, x2, lsl 6
+	add	x0, x24, :lo12:.LANCHOR65
 	ldrb	w3, [x0, 6]
-	ldr	x0, [x1, 24]
-	ldrb	w7, [x1, 1]
-	ldrh	w6, [x1, 48]
+	ldr	x0, [x2, 24]
+	ldrb	w7, [x2, 1]
+	ldrh	w6, [x2, 48]
 	ldr	w0, [x0, 4]
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC212
-	add	x0, x0, :lo12:.LC212
+	adrp	x0, .LC209
+	add	x0, x0, :lo12:.LC209
 	add	w26, w26, w19
 	str	w26, [sp]
-	ldr	w5, [x1, 40]
-	ldr	w1, [x29, 156]
+	ldr	w5, [x2, 40]
+	mov	w2, w23
 	bl	printf
-.L3013:
+.L3063:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L3002
-.L3005:
+	b	.L3052
+.L3055:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR140]
+	ldr	x0, [x6, #:lo12:.LANCHOR147]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19431,10 +19362,10 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3007
-	adrp	x0, .LANCHOR96
+	bne	.L3057
+	adrp	x0, .LANCHOR102
 	ldr	w1, [x28, 40]
-	ldrh	w4, [x0, #:lo12:.LANCHOR96]
+	ldrh	w4, [x0, #:lo12:.LANCHOR102]
 	mov	w0, 21
 	sub	w2, w0, w4
 	mov	w0, 1
@@ -19442,1137 +19373,1176 @@ gc_do_copy_back:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	adrp	x1, .LANCHOR101
+	ldrb	w2, [x1, #:lo12:.LANCHOR101]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L3007
+	bne	.L3057
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L3007
-	adrp	x1, .LANCHOR203
+	bne	.L3057
+	adrp	x1, .LANCHOR209
 	adrp	x0, .LC0
-	mov	w2, 688
-	add	x1, x1, :lo12:.LANCHOR203
+	mov	w2, 710
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3007:
+.L3057:
 	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR54
-	ldr	w1, [x1, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR56
+	ldr	w1, [x1, #:lo12:.LANCHOR56]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L3008
+	bcc	.L3058
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L3008:
-	adrp	x1, .LANCHOR139
+.L3058:
+	adrp	x1, .LANCHOR146
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR139]
+	ldr	x1, [x1, #:lo12:.LANCHOR146]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L3003
-.L3009:
+	b	.L3053
+.L3059:
 	cmp	w0, 2
-	bne	.L3011
-	adrp	x0, .LANCHOR102
-	adrp	x3, .LANCHOR103
-	ldrb	w0, [x0, #:lo12:.LANCHOR102]
-	cbnz	w0, .L3012
+	bne	.L3061
+	adrp	x0, .LANCHOR107
+	adrp	x1, .LANCHOR108
+	ldrb	w0, [x0, #:lo12:.LANCHOR107]
+	cbnz	w0, .L3062
 	ldr	w0, [x29, 156]
-	ldrh	w3, [x3, #:lo12:.LANCHOR103]
+	ldrh	w1, [x1, #:lo12:.LANCHOR108]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-.L3073:
+	madd	w0, w0, w1, w21
+.L3120:
 	orr	w0, w0, 33554432
-	str	w0, [x2, 40]
-.L3011:
+	str	w0, [x3, 40]
+.L3061:
 	ldr	x0, [x29, 120]
-	add	x0, x0, x1, lsl 6
-	ldrh	w2, [x0, 48]
-	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR141]
-	str	w3, [x0, x2, lsl 2]
-	b	.L3010
-.L3012:
-	add	w0, w19, w26, lsr 1
-	ldrh	w3, [x3, #:lo12:.LANCHOR103]
-	add	x0, x22, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-	and	w3, w26, 1
-	add	w0, w0, w3
-	b	.L3073
-.L3015:
-	adrp	x1, .LANCHOR69
-	ldrb	w3, [x1, #:lo12:.LANCHOR69]
-	ldr	x1, [x29, 160]
-	cbz	w3, .L3017
-.L3020:
-	strb	wzr, [x1, 60]
-	b	.L3018
-.L3017:
-	cmp	w23, 1
-	bne	.L3019
-	mov	w3, 9
-.L3072:
-	strb	w3, [x1, 60]
-.L3018:
-	add	x1, x0, 24
-	bl	sblk_xlc_prog_pages
-.L3021:
-	adrp	x1, .LANCHOR69
-	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR69]
-	and	w0, w3, 65535
-	cbz	w1, .L3023
-	add	w0, w0, w0, lsl 1
-.L3024:
-	adrp	x1, .LANCHOR97
-	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR97]
-	ldr	w2, [x1, 52]
-	add	w2, w2, w0
-	str	w2, [x1, 52]
-	ldrh	w1, [x24, 314]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR71
-	and	w0, w0, 65535
-	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
-	mul	w1, w1, w3
-	cmp	w0, w1
-	blt	.L3025
-	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	strh	wzr, [x0, 86]
-.L3025:
-	bl	gc_write_completed
-	b	.L2981
-.L3019:
-	cmp	w23, 2
-	bne	.L3020
-	mov	w3, 13
-	b	.L3072
-.L3022:
-	ldr	x4, [x0, w2, sxtw 3]
-	add	w2, w2, 1
-	ldr	x5, [x0, w2, sxtw 3]
-	and	w2, w2, 65535
-	ldrb	w5, [x5, 1]
-	strb	w5, [x4]
-	b	.L3016
-.L3023:
-	adrp	x1, .LANCHOR102
-	ldrb	w2, [x1, #:lo12:.LANCHOR102]
-	mov	w1, w0
-	ubfiz	w0, w0, 1, 15
-	cmp	w2, 0
-	csel	w0, w0, w1, ne
-	b	.L3024
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.zftl_discard,"ax",@progbits
-	.align	2
-	.global	zftl_discard
-	.type	zftl_discard, %function
-zftl_discard:
-	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR59
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR59]
-	add	w1, w0, w1
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	cmp	w2, w1
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	bcc	.L3095
-	adrp	x24, .LANCHOR205
-	add	w22, w0, 24576
-	adrp	x0, .LANCHOR7
-	str	x0, [x29, 104]
-	ldr	w1, [x24, #:lo12:.LANCHOR205]
-	ldr	w2, [x0, #:lo12:.LANCHOR7]
-	add	w1, w19, w1
-	str	w1, [x24, #:lo12:.LANCHOR205]
-	tbz	x2, 12, .L3076
-	adrp	x0, .LC213
-	mov	w4, 0
-	mov	w3, w19
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC213
-	bl	printf
-.L3076:
-	adrp	x23, .LANCHOR97
-	adrp	x26, .LANCHOR117
-	ldr	x0, [x23, #:lo12:.LANCHOR97]
-	ldr	w27, [x0, 8]
-	add	w1, w27, 1
-	str	w1, [x0, 8]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR117]
-	udiv	w20, w22, w21
-	msub	w25, w20, w21, w22
-	cbz	w25, .L3077
-	sub	w21, w21, w25
-	mov	w0, w20
-	cmp	w21, w19
-	csel	w21, w21, w19, ls
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L3078
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L3078:
-	ldr	w0, [x29, 120]
-	and	w28, w21, 65535
-	cmn	w0, #1
-	beq	.L3080
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x3, x0
-	cbz	x0, .L3080
-	strb	w25, [x0, 57]
-	ubfiz	x25, x25, 9, 25
-	strb	w21, [x0, 56]
-	mov	w1, 0
-	ldr	x0, [x0, 8]
-	lsl	w2, w28, 9
-	stp	w27, w20, [x3, 32]
-	str	x3, [x29, 96]
-	add	x0, x0, x25
-	bl	ftl_memset
-	ldr	x3, [x29, 96]
-	mov	x0, x3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L3080:
-	add	w20, w20, 1
-	sub	w19, w19, w28
-.L3077:
-	cbz	w19, .L3082
-	bl	ftl_flush
-.L3082:
-	adrp	x25, .LANCHOR96
-	add	x21, x26, :lo12:.LANCHOR117
-	add	x25, x25, :lo12:.LANCHOR96
-	mov	w0, -1
-	str	w0, [x29, 124]
-.L3083:
-	ldrb	w0, [x21]
-	cmp	w19, w0
-	bcs	.L3088
-	cbz	w19, .L3090
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L3091
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L3091:
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L3090
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x21, x0
-	cbz	x0, .L3090
-	strb	wzr, [x0, 57]
-	strb	w19, [x0, 56]
-	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR117]
-	cmp	w19, w0
-	bcc	.L3093
-	adrp	x1, .LANCHOR206
-	adrp	x0, .LC0
-	mov	w2, 1178
-	add	x1, x1, :lo12:.LANCHOR206
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L3093:
-	ldr	x0, [x21, 8]
-	lsl	w2, w19, 9
-	mov	w1, 0
-	bl	ftl_memset
-	mov	x0, x21
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L3090:
-	ldr	w1, [x24, #:lo12:.LANCHOR205]
-	cmp	w1, 8192
-	bls	.L3096
-	ldr	x0, [x29, 104]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L3094
-	adrp	x0, .LC213
-	mov	w4, 0
-	mov	w3, w19
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC213
-	bl	printf
-.L3094:
-	str	wzr, [x24, #:lo12:.LANCHOR205]
-	bl	flt_sys_flush
-	adrp	x0, .LANCHOR207
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR207]
-.L3096:
-	mov	w0, 0
-	b	.L3074
-.L3088:
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L3084
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbz	x0, .L3086
-	ldrb	w2, [x21]
-	mov	w1, 0
-	strb	w2, [x0, 56]
-	strb	wzr, [x0, 57]
-	ldr	x0, [x0, 8]
-	lsl	w2, w2, 9
-	stp	w27, w20, [x28, 32]
-	bl	ftl_memset
-	mov	x0, x28
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-.L3122:
-	ldr	x1, [x23, #:lo12:.LANCHOR97]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L3086:
-	ldrb	w0, [x21]
-	add	w20, w20, 1
-	sub	w19, w19, w0
-	b	.L3083
-.L3084:
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L3086
-	add	x1, x29, 124
-	mov	w2, 1
-	mov	w0, w20
-	bl	pm_log2phys
-	ldrh	w3, [x25]
-	mov	w0, 21
-	ldr	w1, [x29, 120]
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR95
-	ldrb	w1, [x1, #:lo12:.LANCHOR95]
-	udiv	w0, w0, w1
-	bl	ftl_vpn_decrement
-	b	.L3122
-.L3095:
-	mov	w0, -1
+	add	x0, x0, x2, lsl 6
+	ldrh	w1, [x0, 48]
+	ldr	w3, [x0, 40]
+	ldr	x0, [x5, #:lo12:.LANCHOR148]
+	str	w3, [x0, x1, lsl 2]
+	b	.L3060
+.L3062:
+	add	w0, w19, w26, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR108]
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w1, w21
+	and	w1, w26, 1
+	add	w0, w0, w1
+	b	.L3120
+.L3065:
+	adrp	x1, .LANCHOR73
+	ldrb	w3, [x1, #:lo12:.LANCHOR73]
+	ldr	x1, [x29, 160]
+	cbz	w3, .L3067
+.L3070:
+	strb	wzr, [x1, 60]
+	b	.L3068
+.L3067:
+	cmp	w23, 1
+	bne	.L3069
+	mov	w3, 9
+.L3119:
+	strb	w3, [x1, 60]
+.L3068:
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L3071:
+	adrp	x1, .LANCHOR73
+	ldrb	w3, [x22, 9]
+	ldrb	w1, [x1, #:lo12:.LANCHOR73]
+	and	w0, w3, 65535
+	cbz	w1, .L3073
+	add	w0, w0, w0, lsl 1
 .L3074:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-	.size	zftl_discard, .-zftl_discard
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	mov	w0, w1
-	mov	w1, w2
-	b	zftl_discard
-	.size	ftl_discard, .-ftl_discard
+	adrp	x1, .LANCHOR100
+	add	x24, x24, :lo12:.LANCHOR65
+	ldr	x1, [x1, #:lo12:.LANCHOR100]
+	ldr	w2, [x1, 52]
+	add	w2, w2, w0
+	str	w2, [x1, 52]
+	ldrh	w1, [x24, 314]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR75
+	and	w0, w0, 65535
+	strh	w0, [x24, 314]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	mul	w1, w1, w3
+	cmp	w0, w1
+	blt	.L3075
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	strh	wzr, [x0, 86]
+.L3075:
+	bl	gc_write_completed
+	b	.L3032
+.L3069:
+	cmp	w23, 2
+	bne	.L3070
+	mov	w3, 13
+	b	.L3119
+.L3072:
+	ldr	x4, [x0, w2, sxtw 3]
+	add	w2, w2, 1
+	ldr	x5, [x0, w2, sxtw 3]
+	and	w2, w2, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L3066
+.L3073:
+	adrp	x1, .LANCHOR107
+	ldrb	w2, [x1, #:lo12:.LANCHOR107]
+	mov	w1, w0
+	ubfiz	w0, w0, 1, 15
+	cmp	w2, 0
+	csel	w0, w0, w1, ne
+	b	.L3074
+	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
 	.global	zftl_do_gc
 	.type	zftl_do_gc, %function
 zftl_do_gc:
-	sub	sp, sp, #96
-	adrp	x2, .LANCHOR89
-	adrp	x1, .LANCHOR93
+	sub	sp, sp, #128
+	adrp	x1, .LANCHOR97
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
+	stp	x21, x22, [sp, 48]
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR138
+	adrp	x19, .LANCHOR144
+	ldrh	w22, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR93
 	stp	x23, x24, [sp, 64]
-	adrp	x24, .LANCHOR5
-	ldrh	w20, [x2, #:lo12:.LANCHOR89]
-	stp	x21, x22, [sp, 48]
-	ldrb	w2, [x19, #:lo12:.LANCHOR138]
+	adrp	x23, .LANCHOR6
 	ldrh	w21, [x1, #:lo12:.LANCHOR93]
 	stp	x25, x26, [sp, 80]
-	cmp	w2, 6
-	ldr	x23, [x24, #:lo12:.LANCHOR5]
-	add	w20, w21, w20
-	bhi	.L3231
-	mov	w22, w0
-	and	w20, w20, 65535
-	adrp	x0, .L3127
-	mov	x25, x1
-	add	x0, x0, :lo12:.L3127
-	ldrh	w0, [x0,w2,uxtw #1]
-	adr	x1, .Lrtx3127
+	ldrb	w1, [x19, #:lo12:.LANCHOR144]
+	add	w21, w22, w21
+	stp	x27, x28, [sp, 96]
+	ldr	x24, [x23, #:lo12:.LANCHOR6]
+	cmp	w1, 6
+	bhi	.L3226
+	mov	w26, w0
+	and	w21, w21, 65535
+	adrp	x0, .L3124
+	add	x0, x0, :lo12:.L3124
+	ldrh	w0, [x0,w1,uxtw #1]
+	adr	x1, .Lrtx3124
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3127:
+.Lrtx3124:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3127:
-	.2byte	(.L3126 - .Lrtx3127) / 4
-	.2byte	(.L3128 - .Lrtx3127) / 4
-	.2byte	(.L3129 - .Lrtx3127) / 4
-	.2byte	(.L3130 - .Lrtx3127) / 4
-	.2byte	(.L3131 - .Lrtx3127) / 4
-	.2byte	(.L3132 - .Lrtx3127) / 4
-	.2byte	(.L3133 - .Lrtx3127) / 4
+.L3124:
+	.2byte	(.L3123 - .Lrtx3124) / 4
+	.2byte	(.L3125 - .Lrtx3124) / 4
+	.2byte	(.L3126 - .Lrtx3124) / 4
+	.2byte	(.L3127 - .Lrtx3124) / 4
+	.2byte	(.L3128 - .Lrtx3124) / 4
+	.2byte	(.L3129 - .Lrtx3124) / 4
+	.2byte	(.L3130 - .Lrtx3124) / 4
 	.section	.text.zftl_do_gc
-.L3132:
-	adrp	x21, .LANCHOR63
-	add	x25, x21, :lo12:.LANCHOR63
-	mov	w23, 0
-.L3134:
+.L3129:
+	adrp	x20, .LANCHOR65
+	add	x24, x20, :lo12:.LANCHOR65
+	mov	w22, 0
+.L3131:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3199
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	add	x21, x21, :lo12:.LANCHOR63
-	strh	wzr, [x21, 56]
+	cbz	w0, .L3222
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	add	x20, x20, :lo12:.LANCHOR65
+	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
-	ldr	x1, [x24, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR100
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
-	ldr	x0, [x21, 8]
+	ldr	x0, [x20, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	str	xzr, [x21, 8]
-	b	.L3255
-.L3126:
-	adrp	x0, .LANCHOR91
+	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	str	xzr, [x20, 8]
+	b	.L3290
+.L3123:
+	adrp	x0, .LANCHOR95
+	adrp	x28, .LANCHOR88
+	adrp	x27, .LANCHOR86
+	ldrh	w1, [x24, 80]
+	ldrh	w0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w25, [x28, #:lo12:.LANCHOR88]
+	add	w22, w22, w0
+	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	and	w22, w22, 65535
+	add	w25, w25, w0
+	mov	w0, 65535
+	and	w25, w25, 65535
+	cmp	w1, w0
+	beq	.L3132
+	cbnz	w26, .L3133
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	cmp	w21, w0, lsl 1
+	blt	.L3133
+.L3226:
+	mov	w20, 16
+	b	.L3121
+.L3133:
+	adrp	x5, .LANCHOR85
+	mov	w1, 5
+	adrp	x26, .LANCHOR74
+	ldrh	w0, [x5, #:lo12:.LANCHOR85]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x5, #:lo12:.LANCHOR85]
+	bl	zftl_get_gc_node
+	and	w3, w0, 65535
 	mov	w1, 65535
-	ldrh	w4, [x0, #:lo12:.LANCHOR91]
-	ldrh	w0, [x23, 80]
-	add	w21, w21, w4
-	and	w21, w21, 65535
-	cmp	w0, w1
-	beq	.L3135
-	adrp	x1, .LANCHOR7
-	cmp	w21, 7
-	mov	w22, 3
-	adrp	x24, .LANCHOR70
-	ldr	w1, [x1, #:lo12:.LANCHOR7]
-	csinc	w22, w22, wzr, hi
-	tbz	x1, 8, .L3137
-	ldrh	w7, [x23, 122]
-	mov	w4, w21
-	ldrh	w6, [x23, 120]
-	mov	w3, w20
-	ldrh	w5, [x23, 124]
-	mov	w1, 1705
-	ldrb	w2, [x24, #:lo12:.LANCHOR70]
+	cmp	w3, w1
+	beq	.L3134
+	adrp	x4, .LANCHOR5
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR145
+	mov	x20, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR5]
+	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR145]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	cmp	w4, w3
+	bcs	.L3135
+	adrp	x1, .LANCHOR2
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	cmp	w2, w1, lsr 4
+	bls	.L3134
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	cmp	w1, w3
+	bls	.L3134
+.L3135:
+	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L3136
+	mov	w0, 1
+	str	wzr, [x20, #:lo12:.LANCHOR145]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3134:
+	strh	wzr, [x5, #:lo12:.LANCHOR85]
+.L3136:
+	cmp	w22, 15
+	bls	.L3228
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bhi	.L3228
+	cmp	w25, 0
+	cset	w20, eq
+	add	w20, w20, 1
+.L3137:
+	adrp	x0, .LANCHOR9
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 8, .L3138
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	mov	w4, w22
+	ldrb	w2, [x26, #:lo12:.LANCHOR74]
+	mov	w3, w21
+	mov	w1, 1848
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	ldrh	w0, [x24, 80]
 	str	w0, [sp]
-	adrp	x0, .LC214
-	add	x0, x0, :lo12:.LC214
+	adrp	x0, .LC210
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L3137:
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+.L3138:
+	ldrb	w0, [x26, #:lo12:.LANCHOR74]
 	mov	w2, 1
-	mov	w1, w22
+	mov	w1, w20
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3231
-.L3138:
+	ble	.L3139
+.L3140:
 	mov	w0, 1
-.L3254:
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	b	.L3231
-.L3135:
-	adrp	x0, .LANCHOR84
-	cmp	w22, 1
-	ldrh	w25, [x0, #:lo12:.LANCHOR84]
-	adrp	x0, .LANCHOR82
-	ldrh	w26, [x0, #:lo12:.LANCHOR82]
-	bne	.L3139
+.L3292:
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3228:
+	mov	w20, 2
+	b	.L3137
+.L3139:
+	ldrb	w0, [x26, #:lo12:.LANCHOR74]
+	mov	w2, 1
+	mov	w1, 3
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	bgt	.L3140
+	b	.L3226
+.L3132:
+	cmp	w26, 1
+	bne	.L3142
 	bl	gc_scan_static_data
-	bl	gc_static_wearleveling
-.L3140:
-	ldr	x2, [x24, #:lo12:.LANCHOR5]
-	adrp	x1, .LANCHOR70
+	adrp	x24, .LANCHOR74
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldrh	w0, [x0, 122]
+	cbz	w0, .L3143
+.L3144:
 	mov	w0, 1
-	mov	x24, x1
-	strb	w0, [x1, #:lo12:.LANCHOR70]
-	ldrh	w5, [x2, 124]
-	cbz	w5, .L3142
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	adrp	x0, .LANCHOR7
-	strb	wzr, [x1, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3231
-	ldrh	w7, [x2, 122]
-	mov	w4, w21
-	ldrh	w6, [x2, 120]
-	mov	w3, w20
+	strb	w0, [x24, #:lo12:.LANCHOR74]
+	b	.L3292
+.L3143:
+	bl	gc_static_wearleveling
+	mov	w20, w0
+	cbnz	w0, .L3144
+	cbnz	w22, .L3145
+.L3149:
+	mov	w20, 16
+.L3146:
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	adrp	x3, .LANCHOR74
+	mov	w1, 1
+	mov	x23, x3
+	strb	w1, [x3, #:lo12:.LANCHOR74]
+	ldrh	w5, [x0, 124]
+	cbz	w5, .L3154
+	strb	w1, [x19, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR9
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	ldr	w1, [x1, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L3121
+	ldrh	w7, [x0, 122]
+	mov	w4, w22
+	ldrh	w6, [x0, 120]
+	mov	w3, w21
+	adrp	x0, .LC211
 	mov	w2, 0
-	mov	w1, 1762
-	adrp	x0, .LC215
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1946
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-	b	.L3231
-.L3139:
-	adrp	x0, .LANCHOR73
-	ldrh	w0, [x0, #:lo12:.LANCHOR73]
-	cmp	w0, w20
-	bcs	.L3140
-.L3231:
-	mov	w0, 16
+.L3121:
+	mov	w0, w20
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
 	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
 	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 96
+	add	sp, sp, 128
 	ret
-.L3142:
-	adrp	x23, .LANCHOR73
-	ldrh	w1, [x23, #:lo12:.LANCHOR73]
-	cmp	w20, w1
-	bcs	.L3143
-	cmp	w21, 1
-	bls	.L3144
-	cmp	w21, 16
-	bls	.L3145
-	adrp	x1, .LANCHOR86
-	ldrh	w2, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR87
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
-	cmp	w2, w1
-	bcs	.L3145
-	mov	w2, 16
-	mov	w1, 3
-.L3251:
+.L3145:
+	cmp	w21, w25
+	adrp	x1, .LANCHOR90
+	adrp	x2, .LANCHOR87
+	bcs	.L3147
+	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	cmp	w21, w0, lsl 1
+	blt	.L3148
+.L3147:
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	add	w0, w21, w25
+	cmp	w0, w2, lsl 1
+	blt	.L3148
+	adrp	x0, .LANCHOR91
+	ldrh	w2, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	bcc	.L3149
+.L3148:
+	adrp	x5, .LANCHOR145
+	adrp	x2, .LANCHOR2
+	mov	w6, 1
+	strb	w6, [x24, #:lo12:.LANCHOR74]
+	ldr	w0, [x5, #:lo12:.LANCHOR145]
+	ldrh	w2, [x2, #:lo12:.LANCHOR2]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR145]
+	cmp	w0, w2, lsr 5
+	bls	.L3150
+	ldrh	w0, [x1, #:lo12:.LANCHOR90]
+	cmp	w0, w22
+	bls	.L3150
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3149
+	adrp	x1, .LANCHOR5
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR76
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	bgt	.L3149
+	mov	w0, w6
+	str	wzr, [x5, #:lo12:.LANCHOR145]
+	mov	w2, 4
+	mov	w1, 2
+.L3280:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3146:
-	cbnz	w0, .L3138
-	b	.L3231
-.L3145:
-	mov	w2, 2
-	mov	w1, w2
+	cbz	w0, .L3149
+	b	.L3140
+.L3150:
+	adrp	x0, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bcc	.L3152
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
+	b	.L3280
+.L3152:
+	ldrh	w0, [x28, #:lo12:.LANCHOR88]
+	cbnz	w0, .L3153
+	ldrh	w0, [x27, #:lo12:.LANCHOR86]
+	cmp	w0, 8
+	bls	.L3146
+.L3153:
+	mov	w1, 1
+	mov	w2, 4
+	mov	w0, w1
+	b	.L3280
+.L3142:
+	adrp	x0, .LANCHOR77
+	ldrh	w0, [x0, #:lo12:.LANCHOR77]
+	cmp	w0, w21
+	bcc	.L3226
+	b	.L3149
+.L3154:
+	adrp	x2, .LANCHOR77
+	mov	x24, x2
+	ldrh	w4, [x2, #:lo12:.LANCHOR77]
+	cmp	w21, w4
+	bcs	.L3155
+	cbz	w22, .L3156
+	cmp	w22, 16
+	bls	.L3157
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	bhi	.L3157
+	str	x3, [x29, 104]
+	mov	w2, 4
+	mov	w0, w1
+	bl	gc_search_src_blk
+	ldr	x3, [x29, 104]
+	tst	w0, 65535
+	bne	.L3158
+	ldrb	w0, [x3, #:lo12:.LANCHOR74]
+	mov	w2, 4
+	mov	w1, 3
+.L3282:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L3159:
+	cbnz	w0, .L3161
+	b	.L3121
+.L3158:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w3, w0, 65535
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L3161
+	adrp	x4, .LANCHOR5
+	ubfiz	x3, x3, 1, 16
+	adrp	x1, .LANCHOR145
+	mov	x21, x1
+	ldr	x4, [x4, #:lo12:.LANCHOR5]
+	ldr	w2, [x1, #:lo12:.LANCHOR145]
+	add	w2, w2, 1
+	str	w2, [x1, #:lo12:.LANCHOR145]
+	ldrh	w3, [x4, x3]
+	adrp	x4, .LANCHOR83
+	ldrh	w4, [x4, #:lo12:.LANCHOR83]
+	cmp	w4, w3
+	bcs	.L3162
+	adrp	x1, .LANCHOR2
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	cmp	w2, w1, lsr 4
+	bls	.L3161
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	cmp	w1, w3
+	bls	.L3161
+.L3162:
+	ldrb	w2, [x23, #:lo12:.LANCHOR74]
+	mov	w1, 0
+	bl	gc_add_sblk
+	str	wzr, [x21, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR119
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR119]
+.L3161:
 	mov	w0, 1
-.L3257:
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	b	.L3121
+.L3157:
+	mov	w2, 1
+	mov	w0, w2
+	mov	w1, 2
+.L3289:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3138
+	bne	.L3161
 	mov	w2, 2
-	b	.L3252
-.L3144:
-	adrp	x0, .LANCHOR7
-	strb	wzr, [x24, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3148
-	ldrh	w7, [x2, 122]
-	adrp	x0, .LC215
-	ldrh	w6, [x2, 120]
+.L3285:
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
+	b	.L3282
+.L3156:
+	adrp	x1, .LANCHOR9
+	strb	wzr, [x3, #:lo12:.LANCHOR74]
+	ldr	w1, [x1, #:lo12:.LANCHOR9]
+	tbz	x1, 8, .L3164
+	ldrh	w7, [x0, 122]
 	mov	w5, 0
-	mov	w4, w21
-	mov	w3, w20
+	ldrh	w6, [x0, 120]
+	mov	w4, 0
+	adrp	x0, .LC211
+	mov	w3, w21
 	mov	w2, 0
-	mov	w1, 1778
-	add	x0, x0, :lo12:.LC215
+	mov	w1, 1976
+	add	x0, x0, :lo12:.LC211
 	bl	printf
-.L3148:
-	cmp	w20, 16
-	bls	.L3149
+.L3164:
+	cmp	w21, 16
+	bls	.L3165
 	mov	w2, 4
-.L3252:
-	mov	w1, 3
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3251
-.L3149:
+	b	.L3285
+.L3165:
 	mov	w2, 1
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, w2
-	b	.L3257
-.L3143:
+	b	.L3289
+.L3155:
+	cmp	w26, 1
+	bne	.L3121
+	cmp	w21, w4, lsl 1
+	bge	.L3166
+	cmp	w25, w22, lsr 1
+	bcs	.L3167
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bcs	.L3167
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3121
+.L3167:
+	mov	w1, 5
+	mov	w0, 0
+	bl	zftl_get_gc_node
+	and	w26, w0, 65535
+	mov	w1, 65535
+	mov	w3, w26
+	cmp	w26, w1
+	bne	.L3168
+.L3173:
 	cmp	w22, 1
-	lsl	w1, w1, 1
-	bne	.L3151
-	cmp	w20, w1
-	bge	.L3151
-	add	w0, w25, w26
+	bhi	.L3169
+.L3170:
+	cmp	w21, w25
+	adrp	x21, .LANCHOR87
+	bcs	.L3177
+	strb	wzr, [x23, #:lo12:.LANCHOR74]
+	mov	w0, 4
+	bl	zftl_get_gc_node.part.10
 	and	w0, w0, 65535
-	cmp	w0, w21, lsr 1
-	bcs	.L3152
-	adrp	x1, .LANCHOR86
-	ldrh	w2, [x1, #:lo12:.LANCHOR86]
-	adrp	x1, .LANCHOR87
-	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L3177
+	adrp	x1, .LANCHOR5
+	ubfiz	x0, x0, 1, 16
+	adrp	x2, .LANCHOR76
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrb	w2, [x2, #:lo12:.LANCHOR76]
+	ldrh	w1, [x1, x0]
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	mul	w0, w0, w2
+	cmp	w1, w0, lsr 1
+	ble	.L3179
+.L3177:
+	ldrh	w0, [x21, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x24, #:lo12:.LANCHOR77]
+	b	.L3121
+.L3168:
+	adrp	x2, .LANCHOR145
+	adrp	x4, .LANCHOR2
+	uxtw	x26, w26
+	ldr	w1, [x2, #:lo12:.LANCHOR145]
+	ldrh	w4, [x4, #:lo12:.LANCHOR2]
+	add	w1, w1, 1
+	str	w1, [x2, #:lo12:.LANCHOR145]
+	cmp	w1, w4, lsr 4
+	adrp	x4, .LANCHOR5
+	bls	.L3171
+	ldr	x1, [x4, #:lo12:.LANCHOR5]
+	str	wzr, [x2, #:lo12:.LANCHOR145]
+	ldrh	w2, [x1, x26, lsl 1]
+	adrp	x1, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	cmp	w2, w1
-	bcs	.L3152
-.L3156:
+	bcs	.L3171
+	str	x4, [x29, 96]
+	mov	w2, 1
+	str	w3, [x29, 104]
+	mov	w1, 0
+	bl	gc_add_sblk
+	ldr	w3, [x29, 104]
+	ldr	x4, [x29, 96]
+	cbnz	w0, .L3161
+.L3171:
+	ldr	x0, [x4, #:lo12:.LANCHOR5]
+	ldrh	w1, [x0, x26, lsl 1]
 	adrp	x0, .LANCHOR83
 	ldrh	w0, [x0, #:lo12:.LANCHOR83]
-	lsr	w0, w0, 1
-	strh	w0, [x23, #:lo12:.LANCHOR73]
-	b	.L3231
-.L3152:
-	cmp	w21, 1
-	adrp	x22, .LANCHOR83
-	bls	.L3153
-	cmp	w21, 16
-	bls	.L3154
-	mov	w2, 8
+	cmp	w1, w0, lsr 1
+	bhi	.L3172
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w3
+	bl	gc_add_sblk
+	b	.L3161
+.L3172:
+	ldrh	w2, [x27, #:lo12:.LANCHOR86]
+	ldrh	w0, [x28, #:lo12:.LANCHOR88]
+	add	w0, w0, w2
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	cmp	w0, w2, lsl 1
+	ble	.L3173
+	adrp	x0, .LANCHOR89
+	ldrh	w0, [x0, #:lo12:.LANCHOR89]
+	cmp	w0, w1
+	bcc	.L3170
+	b	.L3173
+.L3169:
+	mov	w1, 1
+	strb	w1, [x23, #:lo12:.LANCHOR74]
+	cmp	w22, 16
+	bls	.L3174
+	adrp	x0, .LANCHOR90
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w0
+	bhi	.L3174
+	mov	w2, 4
+	mov	w0, w1
+	bl	gc_search_src_blk
+	ands	w0, w0, 65535
+	bne	.L3175
+	mov	w2, 4
+.L3281:
+	ldrb	w0, [x23, #:lo12:.LANCHOR74]
 	mov	w1, 3
-	mov	w0, 1
-.L3249:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3155:
-	ldrh	w1, [x22, #:lo12:.LANCHOR83]
-	strh	w1, [x23, #:lo12:.LANCHOR73]
-	b	.L3146
-.L3154:
-	mov	w2, 2
-	mov	w0, 1
-	mov	w1, w2
+.L3175:
+	adrp	x1, .LANCHOR87
+	cmp	w21, w25, lsr 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	bls	.L3283
+	lsr	w1, w1, 2
+.L3284:
+	strh	w1, [x24, #:lo12:.LANCHOR77]
+	b	.L3159
+.L3174:
+	mov	w2, 1
+	mov	w1, 2
+	mov	w0, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3155
+	bne	.L3175
 	mov	w2, 2
+	b	.L3281
+.L3179:
 	mov	w1, 3
-	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3249
-.L3153:
-	cmp	w20, w0
-	bcs	.L3156
-	strb	wzr, [x24, #:lo12:.LANCHOR70]
-	mov	w2, 8
-	mov	w1, 3
+	mov	w2, 4
 	mov	w0, 0
-	b	.L3249
-.L3151:
-	cmp	w20, w1
-	bge	.L3156
-	b	.L3231
-.L3128:
-	adrp	x7, .LANCHOR63
+	bl	gc_search_src_blk
+	ldrh	w1, [x21, #:lo12:.LANCHOR87]
+	and	w0, w0, 65535
+.L3283:
+	lsr	w1, w1, 1
+	b	.L3284
+.L3166:
+	adrp	x0, .LANCHOR87
+	mov	w20, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	lsr	w0, w0, 2
+	strh	w0, [x2, #:lo12:.LANCHOR77]
+	b	.L3121
+.L3125:
+	adrp	x7, .LANCHOR65
 	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR63]
+	ldrh	w1, [x7, #:lo12:.LANCHOR65]
 	cmp	w1, w0
-	bne	.L3157
+	bne	.L3180
 	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L3157:
-	ldrh	w3, [x7, #:lo12:.LANCHOR63]
+	strh	w0, [x7, #:lo12:.LANCHOR65]
+.L3180:
+	ldrh	w3, [x7, #:lo12:.LANCHOR65]
 	mov	w0, 65535
-	add	x1, x7, :lo12:.LANCHOR63
+	add	x1, x7, :lo12:.LANCHOR65
 	cmp	w3, w0
-	beq	.L3158
+	beq	.L3291
 	adrp	x0, .LANCHOR3
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR3]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3159
+	cbz	w5, .L3182
 	add	x1, x1, 58
 	mov	w0, 0
-.L3161:
+.L3184:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3160
-.L3165:
-	adrp	x0, .LANCHOR63
+	bne	.L3183
+.L3188:
+	adrp	x0, .LANCHOR65
 	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L3231
-.L3160:
+	strh	w1, [x0, #:lo12:.LANCHOR65]
+	b	.L3226
+.L3183:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3161
-.L3159:
+	bne	.L3184
+.L3182:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3162
+	beq	.L3185
 	tst	w0, 192
-	bne	.L3163
-.L3162:
-	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	bne	.L3186
+.L3185:
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3165
-	mov	w2, 1972
-	adrp	x1, .LANCHOR208
+	cbz	w0, .L3188
+	mov	w2, 2209
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3165
-.L3163:
+	b	.L3188
+.L3186:
 	mov	w0, 2
-	b	.L3254
-.L3158:
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	b	.L3231
-.L3129:
+	b	.L3292
+.L3126:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3166
+	bne	.L3189
 	mov	w0, 3
-	b	.L3254
-.L3166:
-	adrp	x20, .LANCHOR63
+	b	.L3292
+.L3189:
+	adrp	x20, .LANCHOR65
 	mov	w2, 65535
-	add	x1, x20, :lo12:.LANCHOR63
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
-	cmp	w0, w2
-	beq	.L3138
-	ldrh	w2, [x1, 24]
-	cbz	w2, .L3167
-	mov	w0, 4
-	strh	wzr, [x1, 26]
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	b	.L3231
-.L3167:
-	mov	w1, 1
-	strb	w1, [x19, #:lo12:.LANCHOR138]
-	adrp	x19, .LANCHOR4
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x19, #:lo12:.LANCHOR4]
-	ldrh	w0, [x1, x0]
-	cbz	w0, .L3168
-	adrp	x1, .LANCHOR208
+	add	x0, x20, :lo12:.LANCHOR65
+	ldrh	w1, [x20, #:lo12:.LANCHOR65]
+	cmp	w1, w2
+	beq	.L3140
+	ldrh	w2, [x0, 24]
+	cbz	w2, .L3190
+	mov	w1, 4
+	strh	wzr, [x0, 26]
+	strb	w1, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3190:
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR5
+	ubfiz	x1, x1, 1, 16
+	mov	x19, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L3191
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2000
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2237
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3168:
-	ldrh	w0, [x20, #:lo12:.LANCHOR63]
-	add	x21, x20, :lo12:.LANCHOR63
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3165
+.L3191:
+	ldrh	w0, [x20, #:lo12:.LANCHOR65]
+	add	x21, x20, :lo12:.LANCHOR65
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x20, #:lo12:.LANCHOR63]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldrh	w1, [x20, #:lo12:.LANCHOR65]
 	strh	wzr, [x0, x1, lsl 1]
 	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3170
+	bhi	.L3192
 	strh	w0, [x21, 30]
-	b	.L3165
-.L3170:
+	b	.L3188
+.L3192:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3165
-.L3130:
-	adrp	x22, .LANCHOR63
-	adrp	x23, .LANCHOR80
-	add	x21, x22, :lo12:.LANCHOR63
-	add	x23, x23, :lo12:.LANCHOR80
-.L3232:
+	b	.L3188
+.L3127:
+	adrp	x20, .LANCHOR65
+	adrp	x23, .LANCHOR83
+	add	x22, x20, :lo12:.LANCHOR65
+	add	x23, x23, :lo12:.LANCHOR83
+.L3261:
 	bl	gc_scan_src_blk_one_page
-	ldrh	w1, [x21, 2]
+	ldrh	w1, [x22, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3171
-	cmp	w20, 7
-	bls	.L3232
-	b	.L3231
-.L3171:
-	ldrh	w3, [x21, 24]
-	adrp	x0, .LANCHOR7
-	cbz	w3, .L3172
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	bcs	.L3194
+	cmp	w21, 7
+	bls	.L3261
+	b	.L3226
+.L3194:
+	ldrh	w3, [x22, 24]
+	adrp	x0, .LANCHOR9
+	cbz	w3, .L3195
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	w1, 4
-	strh	wzr, [x21, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR138]
-	adrp	x19, .LANCHOR4
-	tbz	x0, 8, .L3173
-	ldrh	w1, [x21]
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	strh	wzr, [x22, 26]
+	strb	w1, [x19, #:lo12:.LANCHOR144]
+	adrp	x19, .LANCHOR5
+	tbz	x0, 8, .L3196
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR5]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC216
-	add	x0, x0, :lo12:.LC216
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	bl	printf
-.L3173:
-	ldrh	w2, [x22, #:lo12:.LANCHOR63]
-	add	x0, x22, :lo12:.LANCHOR63
-	ldr	x1, [x19, #:lo12:.LANCHOR4]
+.L3196:
+	ldrh	w2, [x20, #:lo12:.LANCHOR65]
+	add	x0, x20, :lo12:.LANCHOR65
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3174
-	adrp	x1, .LANCHOR208
+	beq	.L3197
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2034
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2271
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3174:
-	add	x0, x22, :lo12:.LANCHOR63
-	ldrh	w1, [x22, #:lo12:.LANCHOR63]
+.L3197:
+	add	x0, x20, :lo12:.LANCHOR65
+	ldrh	w1, [x20, #:lo12:.LANCHOR65]
 	ldrh	w2, [x0, 24]
-	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3231
-.L3172:
+	b	.L3226
+.L3195:
 	adrp	x2, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	ldrh	w1, [x21]
-	ldr	x20, [x2, #:lo12:.LANCHOR3]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x22]
+	ldr	x21, [x2, #:lo12:.LANCHOR3]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR138]
-	add	x20, x20, x1, uxth 2
-	tbz	x0, 8, .L3175
-	ldrb	w2, [x20, 2]
-	adrp	x0, .LC217
-	add	x0, x0, :lo12:.LC217
+	strb	w2, [x19, #:lo12:.LANCHOR144]
+	add	x21, x21, x1, uxth 2
+	tbz	x0, 8, .L3198
+	ldrb	w2, [x21, 2]
+	adrp	x0, .LC213
+	add	x0, x0, :lo12:.LC213
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3175:
-	ldrb	w0, [x20, 2]
+.L3198:
+	ldrb	w0, [x21, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3176
+	beq	.L3199
 	tst	w0, 192
-	bne	.L3177
-.L3176:
-	adrp	x1, .LANCHOR208
+	bne	.L3200
+.L3199:
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2044
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2281
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3177:
-	ldrh	w0, [x22, #:lo12:.LANCHOR63]
-	add	x19, x22, :lo12:.LANCHOR63
+.L3200:
+	ldrh	w0, [x20, #:lo12:.LANCHOR65]
+	add	x19, x20, :lo12:.LANCHOR65
 	bl	ftl_free_sblk
 	mov	w0, -1
-	strh	w0, [x22, #:lo12:.LANCHOR63]
+	strh	w0, [x20, #:lo12:.LANCHOR65]
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3178
+	bhi	.L3201
 	strh	w0, [x19, 30]
-	b	.L3231
-.L3178:
+	b	.L3226
+.L3201:
 	strh	wzr, [x19, 30]
-.L3255:
+.L3290:
 	bl	flt_sys_flush
-	b	.L3231
-.L3131:
-	ldrh	w1, [x23, 80]
+	b	.L3226
+.L3128:
+	ldrh	w1, [x24, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3179
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	cmp	w0, 1
-	bne	.L3179
+	bne	.L3202
+	adrp	x0, .LANCHOR74
+	ldrb	w22, [x0, #:lo12:.LANCHOR74]
+	cmp	w22, 1
+	bne	.L3202
 	bl	ftl_flush
-	ldrh	w0, [x25, #:lo12:.LANCHOR93]
-	cbz	w0, .L3180
-.L3253:
-	lsr	w0, w0, 1
+	adrp	x0, .LANCHOR65
+	add	x1, x0, :lo12:.LANCHOR65
+	mov	x20, x0
+	ldrh	w1, [x1, 318]
+	cbz	w1, .L3203
+	mov	w0, w22
 	mov	w1, 5
-	bl	zftl_get_free_sblk
-	and	w21, w0, 65535
-	mov	w19, w21
+.L3287:
+	bl	zftl_gc_get_free_sblk
+	and	w19, w0, 65535
 	mov	w0, 65535
-	cmp	w21, w0
-	beq	.L3182
+	cmp	w19, w0
+	beq	.L3205
 	adrp	x0, .LANCHOR3
-	ldr	x20, [x0, #:lo12:.LANCHOR3]
-	add	x20, x20, x21, uxth 2
-	ldrb	w0, [x20, 2]
+	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	add	x21, x21, x19, uxth 2
+	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L3183
-	adrp	x1, .LANCHOR208
+	beq	.L3206
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2069
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2310
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3183:
-	ldrb	w0, [x20, 2]
+.L3206:
+	ldrb	w0, [x21, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
-	strb	w0, [x20, 2]
-.L3202:
+	strb	w0, [x21, 2]
+.L3225:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
-	adrp	x22, .LANCHOR71
+	adrp	x22, .LANCHOR75
 	mov	w0, 5
-	strb	w0, [x23, 84]
-	add	x1, x23, 96
+	strb	w0, [x24, 84]
+	add	x1, x24, 96
 	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
-	adrp	x1, .LANCHOR80
-	adrp	x20, .LANCHOR72
-	strb	w0, [x23, 89]
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
-	strh	w19, [x23, 80]
-	strh	wzr, [x23, 82]
+	adrp	x1, .LANCHOR83
+	adrp	x21, .LANCHOR76
+	strb	w0, [x24, 89]
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	strh	w19, [x24, 80]
+	strh	wzr, [x24, 82]
 	mul	w0, w0, w1
-	strb	wzr, [x23, 85]
-	strh	w0, [x23, 86]
+	strb	wzr, [x24, 85]
+	strh	w0, [x24, 86]
 	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
-	strh	wzr, [x23, 90]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
+	strh	wzr, [x24, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR139
-	ldr	x0, [x0, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR146
+	ldr	x0, [x0, #:lo12:.LANCHOR146]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR147
+	ldr	x0, [x0, #:lo12:.LANCHOR147]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	ldrb	w0, [x21, #:lo12:.LANCHOR76]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR68
-	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR72
+	ldr	x0, [x0, #:lo12:.LANCHOR72]
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
 	mov	w1, -1
-	str	w21, [x0, 132]
+	str	w19, [x0, 132]
 	strh	w1, [x0, 128]
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
+	adrp	x0, .LANCHOR100
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	strh	w19, [x0, 126]
-	adrp	x0, .LANCHOR63
-	add	x0, x0, :lo12:.LANCHOR63
-	str	w1, [x0, 320]
+	add	x0, x20, :lo12:.LANCHOR65
+	str	w1, [x0, 324]
 	strh	wzr, [x0, 314]
 	strh	wzr, [x0, 56]
 	strh	wzr, [x0, 316]
-	strh	wzr, [x0, 318]
+	strh	wzr, [x0, 320]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3231
-.L3180:
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	b	.L3253
-.L3179:
-	cmp	w22, 1
+	b	.L3226
+.L3203:
+	mov	w1, 5
+	mov	w0, 0
+	b	.L3287
+.L3202:
+	cmp	w26, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
-	cmp	w20, 15
+	cmp	w21, 15
 	mov	w0, w22
 	add	w22, w22, 4
-	adrp	x25, .LANCHOR70
-	adrp	x21, .LANCHOR63
+	adrp	x25, .LANCHOR74
+	adrp	x21, .LANCHOR65
 	csel	w22, w22, w0, ls
-	add	x25, x25, :lo12:.LANCHOR70
-	add	x20, x21, :lo12:.LANCHOR63
-	add	x26, x23, 80
-.L3186:
+	add	x25, x25, :lo12:.LANCHOR74
+	add	x20, x21, :lo12:.LANCHOR65
+	add	x26, x24, 80
+.L3209:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3231
+	beq	.L3226
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3187
-	adrp	x0, .LANCHOR48
-	ldrb	w0, [x0, #:lo12:.LANCHOR48]
+	cbnz	w0, .L3210
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
 	cmp	w0, 3
-	bhi	.L3188
+	bhi	.L3211
 	bl	ftl_write_commit
-.L3188:
+.L3211:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3186
+	bcc	.L3209
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR138]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	adrp	x0, .LANCHOR4
+	adrp	x0, .LANCHOR5
 	ldrh	w2, [x20]
-	mov	x20, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3190
-	adrp	x1, .LANCHOR208
+	cbz	w1, .L3213
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	mov	w2, 2144
-	add	x1, x1, :lo12:.LANCHOR208
+	mov	w2, 2385
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3190:
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
-	add	x19, x21, :lo12:.LANCHOR63
-	ldr	x2, [x20, #:lo12:.LANCHOR4]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w2, [x2, x0]
-	cbnz	w2, .L3191
-	mov	w0, w1
+.L3213:
+	ldrh	w0, [x21, #:lo12:.LANCHOR65]
+	ldr	x2, [x19, #:lo12:.LANCHOR5]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3214
 	bl	ftl_free_sblk
-	b	.L3165
-.L3191:
-	ldrh	w3, [x19, 24]
-	adrp	x22, .LANCHOR64
-	adrp	x0, .LC218
-	add	x0, x0, :lo12:.LC218
-	bl	printf
-	ldr	x1, [x22, #:lo12:.LANCHOR64]
-	mov	w2, 4
-	ldrh	w3, [x19, 24]
-	adrp	x0, .LC219
-	add	x0, x0, :lo12:.LC219
-	add	w3, w3, 1
-	bl	rknand_print_hex
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
-	ldr	x2, [x20, #:lo12:.LANCHOR4]
-	ldrh	w5, [x19, 28]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w4, [x19, 26]
-	ldrh	w3, [x19, 24]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC220
-	add	x0, x0, :lo12:.LC220
-	bl	printf
-	ldrh	w0, [x21, #:lo12:.LANCHOR63]
-	mov	x1, 0
-	bl	ftl_sblk_dump
-	bl	gc_scan_src_blk
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
-	ldr	x2, [x20, #:lo12:.LANCHOR4]
-	ldrh	w3, [x19, 24]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC221
-	add	x0, x0, :lo12:.LC221
-	bl	printf
-	ldrh	w3, [x19, 24]
-	mov	w2, 4
-	ldr	x1, [x22, #:lo12:.LANCHOR64]
-	adrp	x0, .LC222
-	add	x0, x0, :lo12:.LC222
-	bl	rknand_print_hex
-	b	.L3165
-.L3187:
-	ldrh	w0, [x20, 318]
-	cbz	w0, .L3192
-	ldr	w0, [x20, 320]
-	strh	wzr, [x20, 318]
+	b	.L3188
+.L3214:
+	mov	w2, 1
+	mov	w1, 0
+	bl	gc_add_sblk
+	b	.L3188
+.L3210:
+	ldrh	w0, [x20, 320]
+	cbz	w0, .L3215
+	ldr	w0, [x20, 324]
+	strh	wzr, [x20, 320]
 	cmn	w0, #1
-	beq	.L3193
+	beq	.L3216
 	bl	ftl_mask_bad_block
-.L3193:
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	add	x20, x21, :lo12:.LANCHOR63
+.L3216:
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	add	x20, x21, :lo12:.LANCHOR65
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
-	str	wzr, [x20, 320]
+	str	wzr, [x20, 324]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR97
-	ldr	x1, [x24, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR100
+	ldr	x1, [x23, #:lo12:.LANCHOR6]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR97]
+	ldr	x2, [x2, #:lo12:.LANCHOR100]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3194
+	cbz	x0, .L3217
 	bl	buf_free
-.L3194:
-	add	x21, x21, :lo12:.LANCHOR63
+.L3217:
+	add	x21, x21, :lo12:.LANCHOR65
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	mov	w2, 2177
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	adrp	x1, .LANCHOR208
+	mov	w2, 2421
+	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3231
-.L3192:
+	b	.L3226
+.L3215:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3195
+	bls	.L3218
 	cmp	w1, w0
-	bcc	.L3186
+	bcc	.L3209
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR138]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20581,12 +20551,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3231
-.L3195:
+	b	.L3226
+.L3218:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR138]
+	strb	w2, [x19, #:lo12:.LANCHOR144]
 	cmp	w1, w0
-	bcc	.L3196
+	bcc	.L3219
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20595,78 +20565,78 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3196:
+.L3219:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	ldrh	w1, [x23, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR6]
+	ldrh	w1, [x24, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x21, :lo12:.LANCHOR63
-	adrp	x1, .LANCHOR80
-	adrp	x2, .LANCHOR67
-	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	ldrb	w2, [x2, #:lo12:.LANCHOR67]
+	add	x0, x21, :lo12:.LANCHOR65
+	adrp	x1, .LANCHOR83
+	adrp	x2, .LANCHOR71
+	ldrh	w1, [x1, #:lo12:.LANCHOR83]
+	ldrb	w2, [x2, #:lo12:.LANCHOR71]
 	strh	wzr, [x0, 16]
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3197
+	bne	.L3220
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3197:
-	add	x21, x21, :lo12:.LANCHOR63
+.L3220:
+	add	x21, x21, :lo12:.LANCHOR65
 	strh	wzr, [x21, 22]
-	b	.L3231
-.L3199:
-	ldrh	w1, [x25, 16]
-	ldrh	w0, [x25, 18]
+	b	.L3226
+.L3222:
+	ldrh	w1, [x24, 16]
+	ldrh	w0, [x24, 18]
 	cmp	w1, w0
-	bcc	.L3200
+	bcc	.L3223
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR138]
-	ldr	x0, [x25, 8]
+	strb	w0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x24, 8]
 	bl	buf_free
-	str	xzr, [x25, 8]
-	b	.L3231
-.L3200:
-	cmp	w20, 7
-	bls	.L3134
-	cmp	w22, 1
-	bne	.L3231
-	add	w23, w23, 1
-	and	w23, w23, 255
-	cmp	w23, 4
-	bls	.L3134
-	b	.L3231
-.L3133:
+	str	xzr, [x24, 8]
+	b	.L3226
+.L3223:
+	cmp	w21, 15
+	bls	.L3131
+	cmp	w26, 1
+	bne	.L3226
+	add	w22, w22, 1
+	and	w22, w22, 255
+	cmp	w22, 4
+	bls	.L3131
+	b	.L3226
+.L3130:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x23, 80]
+	strh	w20, [x24, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR97
-	ldr	x0, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR100
+	ldr	x0, [x0, #:lo12:.LANCHOR100]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-	strb	wzr, [x19, #:lo12:.LANCHOR138]
-	bl	print_ftl_debug_info
-	b	.L3231
-.L3182:
-	mov	w2, 2075
-	adrp	x1, .LANCHOR208
+.L3291:
+	strb	wzr, [x19, #:lo12:.LANCHOR144]
+	b	.L3226
+.L3205:
+	mov	w2, 2316
+	adrp	x1, .LANCHOR211
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR208
+	add	x1, x1, :lo12:.LANCHOR211
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3202
+	b	.L3225
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -20677,38 +20647,38 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
 	mov	w27, w0
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR9
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3259
+	tbz	x0, 12, .L3294
 	mov	w3, w2
-	adrp	x0, .LC223
+	adrp	x0, .LC214
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC223
+	add	x0, x0, :lo12:.LC214
 	mov	w1, w27
 	bl	printf
-.L3259:
-	cbnz	w27, .L3260
-	adrp	x0, .LANCHOR59
+.L3294:
+	cbnz	w27, .L3295
+	adrp	x0, .LANCHOR61
 	mov	w27, 24576
-	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3261:
+	ldr	w0, [x0, #:lo12:.LANCHOR61]
+.L3296:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3275
-	adrp	x23, .LANCHOR117
+	bcc	.L3310
+	adrp	x23, .LANCHOR123
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR97
-	ldrb	w0, [x23, #:lo12:.LANCHOR117]
+	adrp	x25, .LANCHOR100
+	ldrb	w0, [x23, #:lo12:.LANCHOR123]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR117
+	add	x23, x23, :lo12:.LANCHOR123
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -20716,25 +20686,25 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3263:
-	cbnz	w21, .L3271
-	adrp	x20, .LANCHOR89
-	adrp	x19, .LANCHOR93
-	add	x20, x20, :lo12:.LANCHOR89
-	add	x19, x19, :lo12:.LANCHOR93
+.L3298:
+	cbnz	w21, .L3306
+	adrp	x20, .LANCHOR93
+	adrp	x19, .LANCHOR97
+	add	x20, x20, :lo12:.LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR97
 	bl	ftl_write_commit
 	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3272:
+.L3307:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3273
+	ble	.L3308
 	mov	w0, 0
-.L3258:
+.L3293:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20742,28 +20712,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3260:
+.L3295:
 	cmp	w27, 3
-	bhi	.L3275
+	bhi	.L3310
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3261
-.L3271:
+	b	.L3296
+.L3306:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3264
+	cbnz	x0, .L3299
 	bl	ftl_write_commit
-	b	.L3263
-.L3264:
+	b	.L3298
+.L3299:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3267
+	bne	.L3302
 	cmp	w26, w22
-	bne	.L3268
+	bne	.L3303
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -20772,9 +20742,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3280:
+.L3315:
 	strb	w3, [x28, 56]
-.L3267:
+.L3302:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -20784,7 +20754,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR97]
+	ldr	x1, [x25, #:lo12:.LANCHOR100]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -20796,19 +20766,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3263
-.L3268:
+	b	.L3298
+.L3303:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3280
-.L3273:
+	b	.L3315
+.L3308:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3272
-.L3275:
+	b	.L3307
+.L3310:
 	mov	w0, -1
-	b	.L3258
+	b	.L3293
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -20867,12 +20837,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3286
+	bne	.L3321
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3286:
+.L3321:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20882,6 +20852,248 @@ ftl_write:
 	ldp	x29, x30, [sp], 48
 	b	zftl_write
 	.size	ftl_write, .-ftl_write
+	.section	.text.zftl_discard,"ax",@progbits
+	.align	2
+	.global	zftl_discard
+	.type	zftl_discard, %function
+zftl_discard:
+	stp	x29, x30, [sp, -128]!
+	adrp	x2, .LANCHOR61
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	ldr	w2, [x2, #:lo12:.LANCHOR61]
+	add	w1, w0, w1
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w2, w1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bcc	.L3344
+	adrp	x24, .LANCHOR212
+	add	w22, w0, 24576
+	adrp	x0, .LANCHOR9
+	str	x0, [x29, 104]
+	ldr	w1, [x24, #:lo12:.LANCHOR212]
+	ldr	w2, [x0, #:lo12:.LANCHOR9]
+	add	w1, w19, w1
+	str	w1, [x24, #:lo12:.LANCHOR212]
+	tbz	x2, 12, .L3325
+	adrp	x0, .LC215
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC215
+	bl	printf
+.L3325:
+	adrp	x23, .LANCHOR100
+	adrp	x26, .LANCHOR123
+	ldr	x0, [x23, #:lo12:.LANCHOR100]
+	ldr	w27, [x0, 8]
+	add	w1, w27, 1
+	str	w1, [x0, 8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	w21, [x26, #:lo12:.LANCHOR123]
+	udiv	w20, w22, w21
+	msub	w25, w20, w21, w22
+	cbz	w25, .L3326
+	sub	w21, w21, w25
+	mov	w0, w20
+	cmp	w21, w19
+	csel	w21, w21, w19, ls
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3327
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3327:
+	ldr	w0, [x29, 120]
+	and	w28, w21, 65535
+	cmn	w0, #1
+	beq	.L3329
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x3, x0
+	cbz	x0, .L3329
+	strb	w25, [x0, 57]
+	ubfiz	x25, x25, 9, 25
+	strb	w21, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	lsl	w2, w28, 9
+	stp	w27, w20, [x3, 32]
+	str	x3, [x29, 96]
+	add	x0, x0, x25
+	bl	ftl_memset
+	ldr	x3, [x29, 96]
+	mov	x0, x3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3329:
+	add	w20, w20, 1
+	sub	w19, w19, w28
+.L3326:
+	cbz	w19, .L3331
+	bl	ftl_flush
+.L3331:
+	adrp	x25, .LANCHOR102
+	add	x21, x26, :lo12:.LANCHOR123
+	add	x25, x25, :lo12:.LANCHOR102
+	mov	w0, -1
+	str	w0, [x29, 124]
+.L3332:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L3337
+	cbz	w19, .L3339
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3340
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3340:
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3339
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L3339
+	strb	wzr, [x0, 57]
+	strb	w19, [x0, 56]
+	stp	w27, w20, [x21, 32]
+	ldrb	w0, [x26, #:lo12:.LANCHOR123]
+	cmp	w19, w0
+	bcc	.L3342
+	adrp	x1, .LANCHOR213
+	adrp	x0, .LC0
+	mov	w2, 1195
+	add	x1, x1, :lo12:.LANCHOR213
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3342:
+	ldr	x0, [x21, 8]
+	lsl	w2, w19, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3339:
+	ldr	w1, [x24, #:lo12:.LANCHOR212]
+	cmp	w1, 8192
+	bls	.L3345
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR9]
+	tbz	x0, 12, .L3343
+	adrp	x0, .LC215
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC215
+	bl	printf
+.L3343:
+	str	wzr, [x24, #:lo12:.LANCHOR212]
+	bl	flt_sys_flush
+	adrp	x0, .LANCHOR119
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR119]
+.L3345:
+	mov	w0, 0
+	b	.L3323
+.L3337:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3333
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L3335
+	ldrb	w2, [x21]
+	mov	w1, 0
+	strb	w2, [x0, 56]
+	strb	wzr, [x0, 57]
+	ldr	x0, [x0, 8]
+	lsl	w2, w2, 9
+	stp	w27, w20, [x28, 32]
+	bl	ftl_memset
+	mov	x0, x28
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L3371:
+	ldr	x1, [x23, #:lo12:.LANCHOR100]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3335:
+	ldrb	w0, [x21]
+	add	w20, w20, 1
+	sub	w19, w19, w0
+	b	.L3332
+.L3333:
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3335
+	add	x1, x29, 124
+	mov	w2, 1
+	mov	w0, w20
+	bl	pm_log2phys
+	ldrh	w3, [x25]
+	mov	w0, 21
+	ldr	w1, [x29, 120]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR101
+	ldrb	w1, [x1, #:lo12:.LANCHOR101]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+	b	.L3371
+.L3344:
+	mov	w0, -1
+.L3323:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	mov	w0, w1
+	mov	w1, w2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
 	.global	g_pm_spare
 	.global	pm_first_write
 	.global	pm_gc_enable
@@ -20905,11 +21117,14 @@ ftl_write:
 	.global	gp_free_xlc_head
 	.global	gp_free_slc_head
 	.global	gp_sblk_list_tbl
+	.global	zftl_print_list_count
 	.global	ftl_ext_info_first_write
 	.global	ftl_sys_info_first_write
 	.global	ftl_low_format_cur_blk
 	.global	ftl_power_lost_flag
 	.global	ftl_vpn_update_count
+	.global	ftl_sblk_update_list_offset
+	.global	ftl_sblk_update_list
 	.global	ftl_sblk_vpn_update_id
 	.global	ftl_sblk_lpa_tbl
 	.global	ftl_sblk_vpn
@@ -20929,6 +21144,7 @@ ftl_write:
 	.global	gc_pre_ppa_tbl
 	.global	gc_lpa_tbl
 	.global	g_gc_info
+	.global	gc_xlc_search_index
 	.global	gc_xlc_data_index
 	.global	gc_slc_cache_index
 	.global	gc_slc_data_index
@@ -20939,7 +21155,6 @@ ftl_write:
 	.global	gc_tlc_mode_slc_vpn_th
 	.global	gc_state
 	.global	gc_mode
-	.global	check_vpc_tbl
 	.global	p_read_ahead_ext_buf
 	.global	discard_sector_count
 	.global	read_ahead_lpa
@@ -20950,6 +21165,7 @@ ftl_write:
 	.global	ftl_flush_jiffies
 	.global	lpa_hash
 	.global	lpa_hash_index
+	.global	_c_slc_to_xlc_ec_ratio
 	.global	_c_mix_max_xlc_ec_count
 	.global	_c_mix_max_slc_ec_count
 	.global	_c_swl_xlc_gc_th
@@ -21032,7 +21248,7 @@ ftl_write:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -21046,21 +21262,21 @@ _c_ftl_blk_pre_plane:
 	.zero	2
 	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	_c_ftl_block_addr_log2, %object
 	.size	_c_ftl_block_addr_log2, 2
 _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR103,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR188,. + 0
+	.set	.LANCHOR195,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21072,122 +21288,129 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	_c_ftl_nand_planes_num, %object
 	.size	_c_ftl_nand_planes_num, 1
 _c_ftl_nand_planes_num:
 	.zero	1
 	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	_c_ftl_nand_type, %object
 	.size	_c_ftl_nand_type, 1
 _c_ftl_nand_type:
 	.zero	1
 	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	_c_ftl_page_pre_blk, %object
 	.size	_c_ftl_page_pre_blk, 2
 _c_ftl_page_pre_blk:
 	.zero	2
 	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	_c_ftl_page_pre_slc_blk, %object
 	.size	_c_ftl_page_pre_slc_blk, 2
 _c_ftl_page_pre_slc_blk:
 	.zero	2
 	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
+	.zero	2
+	.section	.bss._c_slc_to_xlc_ec_ratio,"aw",@nobits
+	.align	1
+	.set	.LANCHOR4,. + 0
+	.type	_c_slc_to_xlc_ec_ratio, %object
+	.size	_c_slc_to_xlc_ec_ratio, 2
+_c_slc_to_xlc_ec_ratio:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR200,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR199,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR207,. + 0
+	.set	.LANCHOR119,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -21206,75 +21429,69 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
 	.zero	2
-	.section	.bss.check_vpc_tbl,"aw",@nobits
-	.align	3
-	.type	check_vpc_tbl, %object
-	.size	check_vpc_tbl, 4608
-check_vpc_tbl:
-	.zero	4608
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR205,. + 0
+	.set	.LANCHOR212,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
 	.section	.bss.free_mix_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	free_mix_sblk, %object
 	.size	free_mix_sblk, 2
 free_mix_sblk:
 	.zero	2
 	.section	.bss.free_slc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	free_slc_sblk, %object
 	.size	free_slc_sblk, 2
 free_slc_sblk:
 	.zero	2
 	.section	.bss.free_xlc_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR95,. + 0
 	.type	free_xlc_sblk, %object
 	.size	free_xlc_sblk, 2
 free_xlc_sblk:
@@ -21286,14 +21503,14 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
 	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR202,. + 0
+	.set	.LANCHOR208,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -21306,47 +21523,61 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
+	.section	.bss.ftl_sblk_update_list,"aw",@nobits
+	.align	3
+	.set	.LANCHOR67,. + 0
+	.type	ftl_sblk_update_list, %object
+	.size	ftl_sblk_update_list, 16
+ftl_sblk_update_list:
+	.zero	16
+	.section	.bss.ftl_sblk_update_list_offset,"aw",@nobits
+	.align	1
+	.set	.LANCHOR120,. + 0
+	.type	ftl_sblk_update_list_offset, %object
+	.size	ftl_sblk_update_list_offset, 2
+ftl_sblk_update_list_offset:
+	.zero	2
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -21359,248 +21590,248 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR102,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
 	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR186,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -21612,120 +21843,134 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR128,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
 	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	gc_free_slc_sblk_th, %object
 	.size	gc_free_slc_sblk_th, 2
 gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
+	.section	.bss.gc_search_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR145,. + 0
+	.type	gc_search_count, %object
+	.size	gc_search_count, 4
+gc_search_count:
+	.zero	4
 	.section	.bss.gc_slc_cache_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	gc_slc_cache_index, %object
 	.size	gc_slc_cache_index, 2
 gc_slc_cache_index:
 	.zero	2
 	.section	.bss.gc_slc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	gc_slc_data_index, %object
 	.size	gc_slc_data_index, 2
 gc_slc_data_index:
 	.zero	2
 	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	gc_slc_mode_tlc_vpn_th, %object
 	.size	gc_slc_mode_tlc_vpn_th, 2
 gc_slc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR85,. + 0
+	.set	.LANCHOR89,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
 	.section	.bss.gc_xlc_data_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	gc_xlc_data_index, %object
 	.size	gc_xlc_data_index, 2
 gc_xlc_data_index:
+	.zero	2
+	.section	.bss.gc_xlc_search_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR85,. + 0
+	.type	gc_xlc_search_index, %object
+	.size	gc_xlc_search_index, 2
+gc_xlc_search_index:
 	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
@@ -21736,21 +21981,21 @@ gp_blk_info:
 	.zero	8
 	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	gp_data_slc_cache_head, %object
 	.size	gp_data_slc_cache_head, 8
 gp_data_slc_cache_head:
 	.zero	8
 	.section	.bss.gp_data_slc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	gp_data_slc_data_head, %object
 	.size	gp_data_slc_data_head, 8
 gp_data_slc_data_head:
 	.zero	8
 	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	gp_data_xlc_data_head, %object
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
@@ -21763,56 +22008,56 @@ gp_flash_check_buf:
 	.zero	262144
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
 	.zero	8
 	.section	.bss.gp_free_mix_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	gp_free_mix_head, %object
 	.size	gp_free_mix_head, 8
 gp_free_mix_head:
 	.zero	8
 	.section	.bss.gp_free_slc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR94,. + 0
 	.type	gp_free_slc_head, %object
 	.size	gp_free_slc_head, 8
 gp_free_slc_head:
 	.zero	8
 	.section	.bss.gp_free_xlc_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	gp_free_xlc_head, %object
 	.size	gp_free_xlc_head, 8
 gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR6,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
@@ -21832,21 +22077,21 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
@@ -21858,141 +22103,148 @@ lpa_hash_index:
 nandc_ecc_sts:
 	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
 	.zero	1
 	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	p_read_ahead_ext_buf, %object
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR197,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR124,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
 	.section	.bss.slc_cache_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR86,. + 0
 	.type	slc_cache_sblk, %object
 	.size	slc_cache_sblk, 2
 slc_cache_sblk:
 	.zero	2
 	.section	.bss.slc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	slc_data_sblk, %object
 	.size	slc_data_sblk, 2
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
 	.section	.bss.xlc_data_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR90,. + 0
 	.type	xlc_data_sblk, %object
 	.size	xlc_data_sblk, 2
 xlc_data_sblk:
+	.zero	2
+	.section	.bss.zftl_print_list_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	zftl_print_list_count, %object
+	.size	zftl_print_list_count, 2
+zftl_print_list_count:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -22026,7 +22278,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -22060,7 +22312,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22142,7 +22394,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -22173,7 +22425,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -22508,7 +22760,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR204,. + 0
+	.set	.LANCHOR210,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -22898,14 +23150,14 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -23565,8 +23817,8 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	1096
+	.byte	1
+	.hword	2184
 	.hword	9695
 	.byte	5
 	.byte	19
@@ -23593,8 +23845,8 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	1096
+	.byte	1
+	.hword	2184
 	.hword	9695
 	.byte	5
 	.byte	19
@@ -23749,473 +24001,466 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10035,"a",@progbits
+	.section	.rodata.__func__.10025,"a",@progbits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.10035, %object
-	.size	__func__.10035, 18
-__func__.10035:
+	.type	__func__.10025, %object
+	.size	__func__.10025, 18
+__func__.10025:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10060,"a",@progbits
+	.section	.rodata.__func__.10050,"a",@progbits
 	.align	3
-	.set	.LANCHOR6,. + 0
-	.type	__func__.10060, %object
-	.size	__func__.10060, 23
-__func__.10060:
+	.set	.LANCHOR7,. + 0
+	.type	__func__.10050, %object
+	.size	__func__.10050, 23
+__func__.10050:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10159,"a",@progbits
+	.section	.rodata.__func__.10158,"a",@progbits
 	.align	3
-	.set	.LANCHOR168,. + 0
-	.type	__func__.10159, %object
-	.size	__func__.10159, 15
-__func__.10159:
+	.set	.LANCHOR175,. + 0
+	.type	__func__.10158, %object
+	.size	__func__.10158, 15
+__func__.10158:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10191,"a",@progbits
+	.section	.rodata.__func__.10190,"a",@progbits
 	.align	3
-	.set	.LANCHOR119,. + 0
-	.type	__func__.10191, %object
-	.size	__func__.10191, 15
-__func__.10191:
+	.set	.LANCHOR125,. + 0
+	.type	__func__.10190, %object
+	.size	__func__.10190, 15
+__func__.10190:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10233,"a",@progbits
+	.section	.rodata.__func__.10231,"a",@progbits
 	.align	3
-	.set	.LANCHOR105,. + 0
-	.type	__func__.10233, %object
-	.size	__func__.10233, 18
-__func__.10233:
+	.set	.LANCHOR110,. + 0
+	.type	__func__.10231, %object
+	.size	__func__.10231, 18
+__func__.10231:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10243,"a",@progbits
+	.section	.rodata.__func__.10241,"a",@progbits
 	.align	3
-	.set	.LANCHOR106,. + 0
-	.type	__func__.10243, %object
-	.size	__func__.10243, 17
-__func__.10243:
+	.set	.LANCHOR111,. + 0
+	.type	__func__.10241, %object
+	.size	__func__.10241, 17
+__func__.10241:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10278,"a",@progbits
+	.section	.rodata.__func__.10276,"a",@progbits
 	.align	3
-	.set	.LANCHOR196,. + 0
-	.type	__func__.10278, %object
-	.size	__func__.10278, 14
-__func__.10278:
+	.set	.LANCHOR204,. + 0
+	.type	__func__.10276, %object
+	.size	__func__.10276, 14
+__func__.10276:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10302,"a",@progbits
+	.section	.rodata.__func__.10300,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
-	.type	__func__.10302, %object
-	.size	__func__.10302, 16
-__func__.10302:
+	.set	.LANCHOR193,. + 0
+	.type	__func__.10300, %object
+	.size	__func__.10300, 16
+__func__.10300:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10321,"a",@progbits
+	.section	.rodata.__func__.10319,"a",@progbits
 	.align	3
-	.set	.LANCHOR177,. + 0
-	.type	__func__.10321, %object
-	.size	__func__.10321, 23
-__func__.10321:
+	.set	.LANCHOR184,. + 0
+	.type	__func__.10319, %object
+	.size	__func__.10319, 23
+__func__.10319:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10347,"a",@progbits
+	.section	.rodata.__func__.10345,"a",@progbits
 	.align	3
-	.set	.LANCHOR107,. + 0
-	.type	__func__.10347, %object
-	.size	__func__.10347, 23
-__func__.10347:
+	.set	.LANCHOR112,. + 0
+	.type	__func__.10345, %object
+	.size	__func__.10345, 23
+__func__.10345:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10368,"a",@progbits
+	.section	.rodata.__func__.10366,"a",@progbits
 	.align	3
-	.set	.LANCHOR200,. + 0
-	.type	__func__.10368, %object
-	.size	__func__.10368, 19
-__func__.10368:
+	.set	.LANCHOR206,. + 0
+	.type	__func__.10366, %object
+	.size	__func__.10366, 19
+__func__.10366:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10386,"a",@progbits
+	.section	.rodata.__func__.10384,"a",@progbits
 	.align	3
-	.set	.LANCHOR111,. + 0
-	.type	__func__.10386, %object
-	.size	__func__.10386, 22
-__func__.10386:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.10384, %object
+	.size	__func__.10384, 22
+__func__.10384:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10397,"a",@progbits
+	.section	.rodata.__func__.10395,"a",@progbits
 	.align	3
-	.set	.LANCHOR112,. + 0
-	.type	__func__.10397, %object
-	.size	__func__.10397, 22
-__func__.10397:
+	.set	.LANCHOR117,. + 0
+	.type	__func__.10395, %object
+	.size	__func__.10395, 22
+__func__.10395:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10422,"a",@progbits
+	.section	.rodata.__func__.10420,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.10422, %object
-	.size	__func__.10422, 19
-__func__.10422:
+	.set	.LANCHOR179,. + 0
+	.type	__func__.10420, %object
+	.size	__func__.10420, 19
+__func__.10420:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10434,"a",@progbits
+	.section	.rodata.__func__.10432,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.10434, %object
-	.size	__func__.10434, 18
-__func__.10434:
+	.set	.LANCHOR180,. + 0
+	.type	__func__.10432, %object
+	.size	__func__.10432, 18
+__func__.10432:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10480,"a",@progbits
+	.section	.rodata.__func__.10469,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.10480, %object
-	.size	__func__.10480, 15
-__func__.10480:
-	.string	"ftl_low_format"
-	.section	.rodata.__func__.10524,"a",@progbits
+	.set	.LANCHOR181,. + 0
+	.type	__func__.10469, %object
+	.size	__func__.10469, 25
+__func__.10469:
+	.string	"ftl_low_format_data_init"
+	.section	.rodata.__func__.10484,"a",@progbits
 	.align	3
-	.set	.LANCHOR176,. + 0
-	.type	__func__.10524, %object
-	.size	__func__.10524, 23
-__func__.10524:
-	.string	"ftl_re_low_format_test"
-	.section	.rodata.__func__.10534,"a",@progbits
+	.set	.LANCHOR183,. + 0
+	.type	__func__.10484, %object
+	.size	__func__.10484, 15
+__func__.10484:
+	.string	"ftl_low_format"
+	.section	.rodata.__func__.10532,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.10534, %object
-	.size	__func__.10534, 14
-__func__.10534:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.10532, %object
+	.size	__func__.10532, 14
+__func__.10532:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10709,"a",@progbits
+	.section	.rodata.__func__.10692,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
-	.type	__func__.10709, %object
-	.size	__func__.10709, 15
-__func__.10709:
+	.set	.LANCHOR168,. + 0
+	.type	__func__.10692, %object
+	.size	__func__.10692, 15
+__func__.10692:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10769,"a",@progbits
+	.section	.rodata.__func__.10752,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.10769, %object
-	.size	__func__.10769, 16
-__func__.10769:
+	.set	.LANCHOR194,. + 0
+	.type	__func__.10752, %object
+	.size	__func__.10752, 16
+__func__.10752:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10783,"a",@progbits
+	.section	.rodata.__func__.10766,"a",@progbits
 	.align	3
-	.set	.LANCHOR135,. + 0
-	.type	__func__.10783, %object
-	.size	__func__.10783, 13
-__func__.10783:
+	.set	.LANCHOR141,. + 0
+	.type	__func__.10766, %object
+	.size	__func__.10766, 13
+__func__.10766:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10803,"a",@progbits
+	.section	.rodata.__func__.10786,"a",@progbits
 	.align	3
-	.set	.LANCHOR189,. + 0
-	.type	__func__.10803, %object
-	.size	__func__.10803, 6
-__func__.10803:
+	.set	.LANCHOR196,. + 0
+	.type	__func__.10786, %object
+	.size	__func__.10786, 6
+__func__.10786:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10819,"a",@progbits
+	.section	.rodata.__func__.10802,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.10819, %object
-	.size	__func__.10819, 17
-__func__.10819:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.10802, %object
+	.size	__func__.10802, 17
+__func__.10802:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10829,"a",@progbits
+	.section	.rodata.__func__.10812,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.10829, %object
-	.size	__func__.10829, 14
-__func__.10829:
+	.set	.LANCHOR185,. + 0
+	.type	__func__.10812, %object
+	.size	__func__.10812, 14
+__func__.10812:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10847,"a",@progbits
+	.section	.rodata.__func__.10830,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.10847, %object
-	.size	__func__.10847, 21
-__func__.10847:
+	.set	.LANCHOR131,. + 0
+	.type	__func__.10830, %object
+	.size	__func__.10830, 21
+__func__.10830:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8490,"a",@progbits
+	.section	.rodata.__func__.8509,"a",@progbits
 	.align	3
-	.set	.LANCHOR147,. + 0
-	.type	__func__.8490, %object
-	.size	__func__.8490, 19
-__func__.8490:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.8509, %object
+	.size	__func__.8509, 19
+__func__.8509:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8519,"a",@progbits
+	.section	.rodata.__func__.8538,"a",@progbits
 	.align	3
-	.set	.LANCHOR164,. + 0
-	.type	__func__.8519, %object
-	.size	__func__.8519, 19
-__func__.8519:
+	.set	.LANCHOR170,. + 0
+	.type	__func__.8538, %object
+	.size	__func__.8538, 19
+__func__.8538:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8534,"a",@progbits
+	.section	.rodata.__func__.8553,"a",@progbits
 	.align	3
-	.set	.LANCHOR35,. + 0
-	.type	__func__.8534, %object
-	.size	__func__.8534, 26
-__func__.8534:
+	.set	.LANCHOR37,. + 0
+	.type	__func__.8553, %object
+	.size	__func__.8553, 26
+__func__.8553:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8545,"a",@progbits
+	.section	.rodata.__func__.8564,"a",@progbits
 	.align	3
-	.set	.LANCHOR37,. + 0
-	.type	__func__.8545, %object
-	.size	__func__.8545, 21
-__func__.8545:
+	.set	.LANCHOR39,. + 0
+	.type	__func__.8564, %object
+	.size	__func__.8564, 21
+__func__.8564:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8559,"a",@progbits
+	.section	.rodata.__func__.8578,"a",@progbits
 	.align	3
-	.set	.LANCHOR23,. + 0
-	.type	__func__.8559, %object
-	.size	__func__.8559, 28
-__func__.8559:
+	.set	.LANCHOR25,. + 0
+	.type	__func__.8578, %object
+	.size	__func__.8578, 28
+__func__.8578:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8583,"a",@progbits
+	.section	.rodata.__func__.8602,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.8583, %object
-	.size	__func__.8583, 26
-__func__.8583:
+	.set	.LANCHOR166,. + 0
+	.type	__func__.8602, %object
+	.size	__func__.8602, 26
+__func__.8602:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8596,"a",@progbits
+	.section	.rodata.__func__.8615,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.8596, %object
-	.size	__func__.8596, 22
-__func__.8596:
+	.set	.LANCHOR167,. + 0
+	.type	__func__.8615, %object
+	.size	__func__.8615, 22
+__func__.8615:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8609,"a",@progbits
+	.section	.rodata.__func__.8628,"a",@progbits
 	.align	3
-	.set	.LANCHOR34,. + 0
-	.type	__func__.8609, %object
-	.size	__func__.8609, 22
-__func__.8609:
+	.set	.LANCHOR36,. + 0
+	.type	__func__.8628, %object
+	.size	__func__.8628, 22
+__func__.8628:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8624,"a",@progbits
+	.section	.rodata.__func__.8643,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.8624, %object
-	.size	__func__.8624, 25
-__func__.8624:
+	.set	.LANCHOR161,. + 0
+	.type	__func__.8643, %object
+	.size	__func__.8643, 25
+__func__.8643:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.8937,"a",@progbits
+	.section	.rodata.__func__.8956,"a",@progbits
 	.align	3
-	.set	.LANCHOR127,. + 0
-	.type	__func__.8937, %object
-	.size	__func__.8937, 20
-__func__.8937:
+	.set	.LANCHOR133,. + 0
+	.type	__func__.8956, %object
+	.size	__func__.8956, 20
+__func__.8956:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.8947,"a",@progbits
+	.section	.rodata.__func__.8966,"a",@progbits
 	.align	3
-	.set	.LANCHOR8,. + 0
-	.type	__func__.8947, %object
-	.size	__func__.8947, 22
-__func__.8947:
+	.set	.LANCHOR10,. + 0
+	.type	__func__.8966, %object
+	.size	__func__.8966, 22
+__func__.8966:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.8991,"a",@progbits
+	.section	.rodata.__func__.9010,"a",@progbits
 	.align	3
-	.set	.LANCHOR182,. + 0
-	.type	__func__.8991, %object
-	.size	__func__.8991, 16
-__func__.8991:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.9010, %object
+	.size	__func__.9010, 16
+__func__.9010:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9011,"a",@progbits
+	.section	.rodata.__func__.9030,"a",@progbits
 	.align	3
-	.set	.LANCHOR137,. + 0
-	.type	__func__.9011, %object
-	.size	__func__.9011, 11
-__func__.9011:
+	.set	.LANCHOR143,. + 0
+	.type	__func__.9030, %object
+	.size	__func__.9030, 11
+__func__.9030:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9171,"a",@progbits
+	.section	.rodata.__func__.9190,"a",@progbits
 	.align	3
-	.set	.LANCHOR49,. + 0
-	.type	__func__.9171, %object
-	.size	__func__.9171, 13
-__func__.9171:
+	.set	.LANCHOR51,. + 0
+	.type	__func__.9190, %object
+	.size	__func__.9190, 13
+__func__.9190:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9184,"a",@progbits
+	.section	.rodata.__func__.9203,"a",@progbits
 	.align	3
-	.set	.LANCHOR50,. + 0
-	.type	__func__.9184, %object
-	.size	__func__.9184, 10
-__func__.9184:
+	.set	.LANCHOR52,. + 0
+	.type	__func__.9203, %object
+	.size	__func__.9203, 10
+__func__.9203:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9198,"a",@progbits
+	.section	.rodata.__func__.9217,"a",@progbits
 	.align	3
-	.set	.LANCHOR51,. + 0
-	.type	__func__.9198, %object
-	.size	__func__.9198, 16
-__func__.9198:
+	.set	.LANCHOR53,. + 0
+	.type	__func__.9217, %object
+	.size	__func__.9217, 16
+__func__.9217:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9210,"a",@progbits
+	.section	.rodata.__func__.9229,"a",@progbits
 	.align	3
-	.set	.LANCHOR149,. + 0
-	.type	__func__.9210, %object
-	.size	__func__.9210, 20
-__func__.9210:
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9229, %object
+	.size	__func__.9229, 20
+__func__.9229:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9221,"a",@progbits
+	.section	.rodata.__func__.9240,"a",@progbits
 	.align	3
-	.set	.LANCHOR136,. + 0
-	.type	__func__.9221, %object
-	.size	__func__.9221, 21
-__func__.9221:
+	.set	.LANCHOR142,. + 0
+	.type	__func__.9240, %object
+	.size	__func__.9240, 21
+__func__.9240:
 	.string	"flash_into_data_init"
-	.section	.rodata.__func__.9243,"a",@progbits
+	.section	.rodata.__func__.9262,"a",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
-	.type	__func__.9243, %object
-	.size	__func__.9243, 17
-__func__.9243:
+	.set	.LANCHOR188,. + 0
+	.type	__func__.9262, %object
+	.size	__func__.9262, 17
+__func__.9262:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9316,"a",@progbits
+	.section	.rodata.__func__.9336,"a",@progbits
 	.align	3
-	.set	.LANCHOR131,. + 0
-	.type	__func__.9316, %object
-	.size	__func__.9316, 17
-__func__.9316:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.9336, %object
+	.size	__func__.9336, 17
+__func__.9336:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9368,"a",@progbits
+	.section	.rodata.__func__.9383,"a",@progbits
 	.align	3
-	.set	.LANCHOR201,. + 0
-	.type	__func__.9368, %object
-	.size	__func__.9368, 17
-__func__.9368:
+	.set	.LANCHOR207,. + 0
+	.type	__func__.9383, %object
+	.size	__func__.9383, 17
+__func__.9383:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9379,"a",@progbits
+	.section	.rodata.__func__.9401,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.9379, %object
-	.size	__func__.9379, 14
-__func__.9379:
+	.set	.LANCHOR122,. + 0
+	.type	__func__.9401, %object
+	.size	__func__.9401, 14
+__func__.9401:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9430,"a",@progbits
+	.section	.rodata.__func__.9452,"a",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
-	.type	__func__.9430, %object
-	.size	__func__.9430, 15
-__func__.9430:
+	.set	.LANCHOR198,. + 0
+	.type	__func__.9452, %object
+	.size	__func__.9452, 15
+__func__.9452:
 	.string	"ftl_read_ahead"
-	.section	.rodata.__func__.9438,"a",@progbits
+	.section	.rodata.__func__.9460,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.9438, %object
-	.size	__func__.9438, 13
-__func__.9438:
+	.set	.LANCHOR57,. + 0
+	.type	__func__.9460, %object
+	.size	__func__.9460, 13
+__func__.9460:
 	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9476,"a",@progbits
+	.section	.rodata.__func__.9498,"a",@progbits
 	.align	3
-	.set	.LANCHOR197,. + 0
-	.type	__func__.9476, %object
-	.size	__func__.9476, 10
-__func__.9476:
+	.set	.LANCHOR205,. + 0
+	.type	__func__.9498, %object
+	.size	__func__.9498, 10
+__func__.9498:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9502,"a",@progbits
+	.section	.rodata.__func__.9524,"a",@progbits
 	.align	3
-	.set	.LANCHOR206,. + 0
-	.type	__func__.9502, %object
-	.size	__func__.9502, 13
-__func__.9502:
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9524, %object
+	.size	__func__.9524, 13
+__func__.9524:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9543,"a",@progbits
-	.align	3
-	.set	.LANCHOR198,. + 0
-	.type	__func__.9543, %object
-	.size	__func__.9543, 10
-__func__.9543:
-	.string	"vpn_check"
-	.section	.rodata.__func__.9665,"a",@progbits
+	.section	.rodata.__func__.9643,"a",@progbits
 	.align	3
-	.set	.LANCHOR61,. + 0
-	.type	__func__.9665, %object
-	.size	__func__.9665, 12
-__func__.9665:
+	.set	.LANCHOR63,. + 0
+	.type	__func__.9643, %object
+	.size	__func__.9643, 12
+__func__.9643:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9683,"a",@progbits
+	.section	.rodata.__func__.9664,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9683, %object
-	.size	__func__.9683, 21
-__func__.9683:
+	.set	.LANCHOR162,. + 0
+	.type	__func__.9664, %object
+	.size	__func__.9664, 21
+__func__.9664:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9717,"a",@progbits
+	.section	.rodata.__func__.9698,"a",@progbits
 	.align	3
-	.set	.LANCHOR194,. + 0
-	.type	__func__.9717, %object
-	.size	__func__.9717, 22
-__func__.9717:
+	.set	.LANCHOR201,. + 0
+	.type	__func__.9698, %object
+	.size	__func__.9698, 22
+__func__.9698:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9730,"a",@progbits
+	.section	.rodata.__func__.9711,"a",@progbits
 	.align	3
-	.set	.LANCHOR66,. + 0
-	.type	__func__.9730, %object
-	.size	__func__.9730, 19
-__func__.9730:
+	.set	.LANCHOR70,. + 0
+	.type	__func__.9711, %object
+	.size	__func__.9711, 19
+__func__.9711:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9759,"a",@progbits
+	.section	.rodata.__func__.9740,"a",@progbits
 	.align	3
-	.set	.LANCHOR203,. + 0
-	.type	__func__.9759, %object
-	.size	__func__.9759, 16
-__func__.9759:
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9740, %object
+	.size	__func__.9740, 16
+__func__.9740:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9781,"a",@progbits
+	.section	.rodata.__func__.9762,"a",@progbits
 	.align	3
-	.set	.LANCHOR101,. + 0
-	.type	__func__.9781, %object
-	.size	__func__.9781, 16
-__func__.9781:
+	.set	.LANCHOR106,. + 0
+	.type	__func__.9762, %object
+	.size	__func__.9762, 16
+__func__.9762:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9826,"a",@progbits
+	.section	.rodata.__func__.9807,"a",@progbits
 	.align	3
-	.set	.LANCHOR199,. + 0
-	.type	__func__.9826, %object
-	.size	__func__.9826, 16
-__func__.9826:
+	.set	.LANCHOR202,. + 0
+	.type	__func__.9807, %object
+	.size	__func__.9807, 16
+__func__.9807:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9885,"a",@progbits
+	.section	.rodata.__func__.9865,"a",@progbits
 	.align	3
-	.set	.LANCHOR195,. + 0
-	.type	__func__.9885, %object
-	.size	__func__.9885, 20
-__func__.9885:
+	.set	.LANCHOR203,. + 0
+	.type	__func__.9865, %object
+	.size	__func__.9865, 20
+__func__.9865:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9946,"a",@progbits
+	.section	.rodata.__func__.9932,"a",@progbits
 	.align	3
-	.set	.LANCHOR208,. + 0
-	.type	__func__.9946, %object
-	.size	__func__.9946, 11
-__func__.9946:
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9932, %object
+	.size	__func__.9932, 11
+__func__.9932:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC137:
+.LC149:
 	.string	"free_buf_count: %d\n"
-.LC138:
+.LC150:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC139:
+.LC151:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC140:
+.LC152:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC141:
+.LC153:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC142:
+.LC154:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC143:
+.LC155:
 	.string	"lpa:"
-.LC144:
+.LC156:
 	.string	"vpn:"
-.LC145:
+.LC157:
 	.string	"sblk:"
-.LC146:
+.LC158:
 	.string	"lpa_hash:"
-.LC147:
+.LC159:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC62:
+.LC68:
 	.string	"dump_sblk_queue: %d\n"
-.LC63:
+.LC69:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC106:
+.LC117:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
-	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
-.LC98:
-	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
-.LC99:
+	.section	.rodata.flash_ddr_tuning_read.str1.1,"aMS",@progbits,1
+.LC109:
+	.string	"%d flash_ddr_tuning_read %x ecc=%d\n"
+.LC110:
 	.string	"sync para %d\n"
-.LC100:
+.LC111:
 	.string	"DDR mode Read error %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC35:
@@ -24231,50 +24476,50 @@ __func__.9946:
 .LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
-.LC103:
+.LC114:
 	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC104:
+.LC115:
 	.string	"...%d @ %s %d %p\n"
-.LC105:
+.LC116:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC133:
+.LC144:
 	.string	"finfo:"
-.LC134:
+.LC145:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC135:
+.LC146:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
-.LC73:
+.LC84:
 	.string	"...%d @ %s\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
 .LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC109:
+.LC120:
 	.string	"flash_prog_page %x %x %x\n"
-.LC110:
+.LC121:
 	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC115:
+.LC126:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC116:
+.LC127:
 	.string	"spare"
-.LC117:
+.LC128:
 	.string	"data"
-.LC118:
+.LC129:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
 .LC38:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC91:
+.LC102:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC101:
+.LC112:
 	.string	"flash_read_page_en %x %x\n"
-.LC102:
+.LC113:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
 .LC36:
@@ -24282,193 +24527,197 @@ __func__.9946:
 .LC37:
 	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC61:
+.LC67:
 	.string	"alloc sblk %x %d\n"
+	.section	.rodata.ftl_free_sblk.str1.1,"aMS",@progbits,1
+.LC55:
+	.string	"swl_tlc_free_mini_ec_blk sblk %x\n"
+.LC56:
+	.string	"swl_slc_free_mini_ec_blk sblk %x\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC121:
+.LC132:
 	.string	"%d %x @%d %x\n"
-.LC122:
+.LC133:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC120:
+.LC131:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC123:
+.LC134:
+	.string	"ftl_low_format %d\n"
+.LC135:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC54:
+.LC60:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC125:
+.LC137:
 	.string	"saved_active_page  = %x\n"
-.LC126:
+.LC138:
 	.string	"saved_active_plane = %x\n"
-.LC127:
+.LC139:
 	.string	"sblk = %x\n"
-.LC128:
+.LC140:
 	.string	"phy_blk = %x %x\n"
-.LC129:
-	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC130:
+.LC141:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC131:
+.LC142:
 	.string	"dump write = %x\n"
-	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
-.LC124:
+	.section	.rodata.ftl_re_low_format.str1.1,"aMS",@progbits,1
+.LC136:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC158:
+.LC170:
 	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC159:
+.LC171:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC182:
+.LC194:
+	.string	"ftl_sblk_dump = %x %d %d %d %d\n"
+.LC195:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC183:
+.LC196:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC184:
+.LC197:
 	.string	"index= %x, lpa=%x\n"
-.LC185:
-	.string	"block = %x, vpn=%x check vpn = %d\n"
-	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
 .LC198:
-	.string	"ftl_scan_all_data = %x\n"
-.LC199:
-	.string	"scan lpa = %x ppa= %x\n"
-.LC200:
-	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
-.LC201:
-	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
-.LC202:
-	.string	"0pm:"
-.LC203:
-	.string	"1pm:"
+	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC136:
+.LC147:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC148:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC119:
+.LC130:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC204:
+.LC201:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC205:
+.LC202:
 	.string	"ftl_update_l2p_map"
-.LC206:
+.LC203:
 	.string	"lpa_tbl:"
-.LC207:
+.LC204:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC53:
+.LC59:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC208:
+.LC205:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC60:
+.LC66:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
 .LC41:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+.LC42:
+	.string	"gc_add_sblk = %d, %d, %d,last update:%d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC108:
+.LC119:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC209:
+.LC206:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC210:
+.LC207:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC211:
+.LC208:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC212:
+.LC209:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC51:
+.LC57:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC52:
+.LC58:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC44:
+.LC45:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC160:
+.LC172:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC161:
+.LC173:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC162:
-	.string	"gc_recovery"
-.LC163:
+.LC174:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC196:
+.LC192:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC197:
+.LC193:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC46:
-	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
 .LC47:
+	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
+.LC48:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC67:
-	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC68:
-	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC69:
-	.string	"swl add tlc gc = %d, %d, %d, %d, %d, %d\n"
-.LC70:
-	.string	"swl add slc gc  = %d, %d, %d, %d, %d, %d\n"
+.LC73:
+	.string	"gc_static_wearleveling: min blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC74:
+	.string	"gc_static_wearleveling: min slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC75:
+	.string	"gc_static_wearleveling: min tlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC76:
+	.string	"gc_static_wearleveling: max slc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC77:
+	.string	"gc_static_wearleveling: max xlc blk: %x,sec=%d,xec = %d ,mode=%d, func=%x, bbt=%x vpn = %d\n"
+.LC78:
+	.string	"gc_static_wearleveling: slc blk: %x, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
+.LC79:
+	.string	"gc_static_wearleveling: min slc ec: %x, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
+.LC80:
+	.string	"swl add tlc gc = %x, %d, %d, %d, %d, %d\n"
+.LC81:
+	.string	"swl add slc gc  = %x, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC177:
+.LC188:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC178:
+.LC189:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC179:
-	.string	"0lpa: %x %x %x\n"
-.LC180:
+.LC190:
 	.string	"lpa: %x %x %x\n"
-.LC181:
+.LC191:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC42:
-	.string	"status: %x, ppa: %x\n"
 .LC43:
+	.string	"status: %x, ppa: %x\n"
+.LC44:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC81:
+.LC92:
 	.string	"otp error! %d"
-.LC82:
+.LC93:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC97:
+.LC108:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
-.LC111:
+.LC122:
 	.string	"1 write_idblock fix data %x %x %x\n"
-.LC112:
+.LC123:
 	.string	"write_idblock check fail! %x\n"
-.LC113:
+.LC124:
 	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC149:
+.LC161:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC150:
+.LC162:
 	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
-.LC151:
+.LC163:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC152:
+.LC164:
 	.string	"pm_ppa:"
-.LC153:
+.LC165:
 	.string	"data:"
-.LC154:
+.LC166:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC66:
+.LC72:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC92:
+.LC103:
 	.string	"micron %d row=%x,count %d,status=%d\n"
-.LC93:
+.LC104:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
 .LC1:
@@ -24532,77 +24781,77 @@ __func__.9946:
 .LC30:
 	.string	"g_flash_toggle_mode_en: %x\n"
 	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
-.LC74:
+.LC85:
 	.string	"...%s enter... %p\n"
-.LC75:
+.LC86:
 	.string	"0:%x %x %x %x %x\n"
-.LC76:
+.LC87:
 	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC88:
+.LC99:
 	.string	"dqs data abort %x\n"
-.LC89:
+.LC100:
 	.string	"dqs data timeout %x\n"
-.LC90:
+.LC101:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC83:
+.LC94:
 	.string	"flash_abort_clear = %d\n"
-.LC84:
+.LC95:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC85:
+.LC96:
 	.string	"nandc:"
-.LC86:
+.LC97:
 	.string	"%d flReg.d32=%x %x\n"
-.LC87:
+.LC98:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC64:
+.LC70:
 	.string	"blk %x is bad block\n"
-.LC65:
+.LC71:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
-.LC72:
+.LC83:
 	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC155:
+.LC167:
 	.string	"pm_init posr %x %x %x\n"
-.LC156:
+.LC168:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC157:
+.LC169:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC148:
+.LC160:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC132:
+.LC143:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC55:
+.LC61:
 	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC56:
+.LC62:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC57:
+.LC63:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC58:
+.LC64:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC59:
+.LC65:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC45:
+.LC46:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC49:
+.LC53:
 	.string	"list count:%p %d\n"
-.LC50:
+.LC54:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC107:
+.LC118:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -24735,26 +24984,26 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC176:
+.LC187:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC77:
+.LC88:
 	.string	"%s 0x%x:"
-.LC78:
+.LC89:
 	.string	"%x "
-.LC79:
+.LC90:
 	.string	""
-.LC80:
+.LC91:
 	.string	"%s\n"
 	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
 .LC39:
 	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC114:
+.LC125:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -24855,7 +25104,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -24872,7 +25121,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -25276,15 +25525,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC94:
+.LC105:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC95:
+.LC106:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC96:
+.LC107:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -25335,7 +25584,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -25347,82 +25596,62 @@ toshiba_ref_value:
 	.byte	8
 	.byte	12
 	.byte	112
-	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
-.LC188:
-	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
-.LC189:
-	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
-.LC190:
-	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
-.LC191:
-	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
-.LC192:
-	.string	"l2p"
-.LC193:
-	.string	"vpn_check %x = c %x  s %x function: %x\n"
-.LC194:
-	.string	"vpn_check blk = %x fix vpc\n"
-.LC195:
-	.string	"...%s exit...%d\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC213:
+.LC215:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC214:
+.LC210:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC215:
+.LC211:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC216:
+.LC212:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC217:
+.LC213:
 	.string	"gc free %x, %d\n"
-.LC218:
-	.string	"error gc slc free sblk = %x, vpn = %d %d\n"
-.LC219:
-	.string	"vpage0:"
-.LC220:
-	.string	"block %x, vpn = %d %d %d %d\n"
-.LC221:
-	.string	"block %x, vpn = %d %d\n"
-.LC222:
-	.string	"vpage1:"
-	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC48:
+	.section	.rodata.zftl_gc_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC49:
+	.string	"swl_tlc_free_mini_ec_blk alloc sblk %x\n"
+.LC50:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+.LC51:
+	.string	"zftl_gc_get_free_sblk %x %x %x, %d %d %d\n"
+	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC52:
+	.string	"swl_slc_free_mini_ec_blk alloc sblk %x\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC164:
-	.string	"FTL version: 6.0.7 20180411"
-.LC165:
+.LC175:
+	.string	"FTL version: 6.0.8 20180511"
+.LC176:
 	.string	"_c_user_data_density := %d\n"
-.LC166:
+.LC177:
 	.string	"_c_totle_phy_density := %d\n"
-.LC167:
+.LC178:
 	.string	"_c_totle_log_page := %d\n"
-.LC168:
+.LC179:
 	.string	"_c_totle_data_density := %d\n"
-.LC169:
+.LC180:
 	.string	"_c_ftl_pm_page_num := %d\n"
-.LC170:
+.LC181:
 	.string	"_c_ftl_byte_pre_page := %d\n"
-.LC171:
+.LC182:
 	.string	"_c_max_pm_sblk := %d\n"
-.LC172:
+.LC183:
 	.string	"_min_slc_super_block := %d\n"
-.LC173:
+.LC184:
 	.string	"_max_xlc_super_block := %d\n"
-.LC174:
+.LC185:
 	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC175:
+.LC186:
 	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC186:
+.LC199:
 	.string	"ftl_read %x %x %x\n"
-.LC187:
+.LC200:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC71:
+.LC82:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC223:
+.LC214:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit e8290547d257ba53a99c161efc0652b23092353e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 16:13:23 2018 +0800

    rockchip: dts: rk3399: disable pmic/vop in pre-reloc
    
    We do not enable pmic and vop in pre-reloc, so we don't use
    then in SPL and pre-reloc stage in U-Boot with kernel dtb enabled.
    
    Change-Id: I3389069c117996864d2d030bfc5443e91f02314e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 0a81691bcb..38d2a458ef 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -168,6 +168,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -202,7 +203,6 @@
 	clock-frequency = <400000>;
 	i2c-scl-falling-time-ns = <50>;
 	i2c-scl-rising-time-ns = <100>;
-	u-boot,dm-pre-reloc;
 
 	rk808: pmic@1b {
 		compatible = "rockchip,rk808";
@@ -214,7 +214,6 @@
 		reg = <0x1b>;
 		rockchip,system-power-controller;
 		#clock-cells = <1>;
-		u-boot,dm-pre-reloc;
 		status = "okay";
 
 		vcc12-supply = <&vcc3v3_sys>;
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 5d9a8b9157..584f0a58f5 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1404,7 +1404,6 @@
 	};
 
 	vopl: vop@ff8f0000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-vop-lit";
 		reg = <0x0 0xff8f0000 0x0 0x3efc>;
 		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1429,7 +1428,6 @@
 	};
 
 	vopb: vop@ff900000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-vop-big";
 		reg = <0x0 0xff900000 0x0 0x3efc>;
 		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;

commit 2f9723332468633b6a232499ccabf9d819d8cf4d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 16:11:52 2018 +0800

    rockchip: sdhci: phy init convert to use live dt
    
    Change-Id: Iac6f2b6151d977b9ec121828790a1ba75e8c418f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 22fe200863..8de9865ebd 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -15,6 +15,9 @@
 #include <mapmem.h>
 #include <sdhci.h>
 #include <clk.h>
+#include <syscon.h>
+#include <dm/ofnode.h>
+#include <asm/arch/clock.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 /* 400KHz is max freq for card ID etc. Use that as min */
@@ -148,25 +151,21 @@ static int arasan_get_phy(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	priv->phy = (struct rockchip_emmc_phy *)0xff77f780;
 #else
-	int phy_node, grf_node;
-	fdt_addr_t grf_base, grf_phy_offset;
+	ofnode phy_node;
+	void *grf_base;
+	u32 grf_phy_offset, phandle;
 
-	phy_node = fdtdec_lookup_phandle(gd->fdt_blob,
-					 dev_of_offset(dev), "phys");
-	if (phy_node <= 0) {
+	phandle = dev_read_u32_default(dev, "phys", 0);
+	phy_node = ofnode_get_by_phandle(phandle);
+	if (!ofnode_valid(phy_node)) {
 		debug("Not found emmc phy device\n");
 		return -ENODEV;
 	}
 
-	grf_node = fdt_parent_offset(gd->fdt_blob, phy_node);
-	if (grf_node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	grf_base = fdtdec_get_addr(gd->fdt_blob, grf_node, "reg");
-	grf_phy_offset = fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
-				grf_node, phy_node, "reg", 0, NULL, false);
+	grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (grf_base < 0)
+		printf("%s Get syscon grf failed", __func__);
+	grf_phy_offset = ofnode_read_u32_default(phy_node, "reg", 0);
 
 	priv->phy = (struct rockchip_emmc_phy *)(grf_base + grf_phy_offset);
 #endif

commit 27b7c22892d1dec8c110b46dd9b891c4b1f7ff48
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 24 16:37:14 2018 +0800

    pwm-regulator: do not fail if no regulator-init-microvolt found
    
    There are many boards in kernel do not have a regulator-init-microvolt
    in pwm regulator, let's make it available.
    
    Change-Id: Ib8235af4082f3428eb04684617a52bb68a4b2e7a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 29bceb5858..ffa26a1c6c 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -106,7 +106,6 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
 		printf("Cannot find regulator pwm init_voltage\n");
-		return -EINVAL;
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);

commit fc4a6bd40d2ca8f434370cab46361d22d5ea6470
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri May 25 10:24:34 2018 +0800

    clk: rockchip: rk3308: Move pll rate into clk private data
    
    Change-Id: I424259266a4c76031192bf07d52c29cd3e48ec0a
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index e3fb750a39..bf5bf57c8c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -45,7 +45,10 @@ struct pll_div {
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3308_clk_priv {
 	struct rk3308_cru *cru;
-	ulong rate;
+	ulong apll_hz;
+	ulong dpll_hz;
+	ulong vpll0_hz;
+	ulong vpll1_hz;
 };
 
 struct rk3308_cru {
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index cf725596c8..3e39cfba91 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -44,8 +44,6 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
-static ulong apll_hz, dpll_hz, vpll0_hz, vpll1_hz;
-
 /*
  * How to calculate the PLL:
  * Formulas also embedded within the Fractional PLL Verilog model:
@@ -143,8 +141,11 @@ static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
 	}
 }
 
-static void rkclk_init(struct rk3308_cru *cru)
+static void rkclk_init(struct udevice *dev)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+	struct rk3308_cru *cru = priv->cru;
+
 	u32 aclk_div, hclk_div, pclk_div;
 
 	/* init pll */
@@ -155,9 +156,9 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	apll_hz = rkclk_pll_get_rate(cru, APLL);
-	aclk_div = apll_hz / CORE_ACLK_HZ - 1;
-	pclk_div = apll_hz / CORE_DBG_HZ - 1;
+	priv->apll_hz = rkclk_pll_get_rate(cru, APLL);
+	aclk_div = priv->apll_hz / CORE_ACLK_HZ - 1;
+	pclk_div = priv->apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
 		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
@@ -170,10 +171,10 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * select dpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	dpll_hz = rkclk_pll_get_rate(cru, DPLL);
-	aclk_div = dpll_hz / BUS_ACLK_HZ - 1;
-	hclk_div = dpll_hz / BUS_HCLK_HZ - 1;
-	pclk_div = dpll_hz / BUS_PCLK_HZ - 1;
+	priv->dpll_hz = rkclk_pll_get_rate(cru, DPLL);
+	aclk_div = priv->dpll_hz / BUS_ACLK_HZ - 1;
+	hclk_div = priv->dpll_hz / BUS_HCLK_HZ - 1;
+	pclk_div = priv->dpll_hz / BUS_PCLK_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[5],
 		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
 		     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
@@ -187,9 +188,9 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * select dpll as pd_peri bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	aclk_div = dpll_hz / PERI_ACLK_HZ - 1;
-	hclk_div = dpll_hz / PERI_HCLK_HZ - 1;
-	pclk_div = dpll_hz / PERI_PCLK_HZ - 1;
+	aclk_div = priv->dpll_hz / PERI_ACLK_HZ - 1;
+	hclk_div = priv->dpll_hz / PERI_HCLK_HZ - 1;
+	pclk_div = priv->dpll_hz / PERI_PCLK_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[36],
 		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
 		     BUS_PLL_SEL_DPLL << PERI_PLL_SEL_SHIFT |
@@ -199,15 +200,17 @@ static void rkclk_init(struct rk3308_cru *cru)
 		     pclk_div << PERI_PCLK_DIV_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
 
-	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
-	vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
+	priv->vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
+	priv->vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
 }
 
-static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
+static ulong rk3308_i2c_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_I2C0:
 		con_id = 25;
 		break;
@@ -228,17 +231,19 @@ static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
 	con = readl(&cru->clksel_con[con_id]);
 	div = con >> CLK_I2C_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 
-	return DIV_TO_RATE(dpll_hz, div);
+	return DIV_TO_RATE(priv->dpll_hz, div);
 }
 
-static ulong rk3308_i2c_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = dpll_hz / hz;
+	src_clk_div = priv->dpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_I2C0:
 		con_id = 25;
 		break;
@@ -260,14 +265,16 @@ static ulong rk3308_i2c_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
 		     CLK_I2C_PLL_SEL_DPLL << CLK_I2C_PLL_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_I2C_DIV_CON_SHIFT);
 
-	return rk3308_i2c_get_clk(cru, clk_id);
+	return rk3308_i2c_get_clk(clk);
 }
 
-static ulong rk3308_mmc_get_clk(struct rk3308_cru *cru, uint clk_id)
+static ulong rk3308_mmc_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 		con_id = 39;
@@ -288,18 +295,19 @@ static ulong rk3308_mmc_get_clk(struct rk3308_cru *cru, uint clk_id)
 	    == EMMC_SEL_24M)
 		return DIV_TO_RATE(OSC_HZ, div) / 2;
 	else
-		return DIV_TO_RATE(vpll0_hz, div) / 2;
+		return DIV_TO_RATE(priv->vpll0_hz, div) / 2;
 }
 
-static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
-				ulong clk_id, ulong set_rate)
+static ulong rk3308_mmc_set_clk(struct clk *clk, ulong set_rate)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 	u32 con_id;
 
-	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
+	debug("%s %ld %ld\n", __func__, clk->id, set_rate);
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 		con_id = 39;
@@ -313,7 +321,7 @@ static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
 	}
 	/* Select clk_sdmmc/emmc source from VPLL0 by default */
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(vpll0_hz / 2, set_rate);
+	src_clk_div = DIV_ROUND_UP(priv->vpll0_hz / 2, set_rate);
 
 	if (src_clk_div > 127) {
 		/* use 24MHz source for 400KHz clock */
@@ -331,11 +339,13 @@ static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
 			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
 	}
 
-	return rk3308_mmc_get_clk(cru, clk_id);
+	return rk3308_mmc_get_clk(clk);
 }
 
-static ulong rk3308_saradc_get_clk(struct rk3308_cru *cru)
+static ulong rk3308_saradc_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[34]);
@@ -344,8 +354,10 @@ static ulong rk3308_saradc_get_clk(struct rk3308_cru *cru)
 	return DIV_TO_RATE(OSC_HZ, div);
 }
 
-static ulong rk3308_saradc_set_clk(struct rk3308_cru *cru, uint hz)
+static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
 	src_clk_div = OSC_HZ / hz;
@@ -355,14 +367,16 @@ static ulong rk3308_saradc_set_clk(struct rk3308_cru *cru, uint hz)
 		     CLK_SARADC_DIV_CON_MASK,
 		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
 
-	return rk3308_saradc_get_clk(cru);
+	return rk3308_saradc_get_clk(clk);
 }
 
-static ulong rk3308_spi_get_clk(struct rk3308_cru *cru, ulong clk_id)
+static ulong rk3308_spi_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con, con_id;
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_SPI0:
 		con_id = 30;
 		break;
@@ -380,17 +394,19 @@ static ulong rk3308_spi_get_clk(struct rk3308_cru *cru, ulong clk_id)
 	con = readl(&cru->clksel_con[con_id]);
 	div = con >> CLK_SPI_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
 
-	return DIV_TO_RATE(dpll_hz, div);
+	return DIV_TO_RATE(priv->dpll_hz, div);
 }
 
-static ulong rk3308_spi_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+static ulong rk3308_spi_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 src_clk_div, con_id;
 
-	src_clk_div = dpll_hz / hz;
+	src_clk_div = priv->dpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
-	switch (clk_id) {
+	switch (clk->id) {
 	case SCLK_SPI0:
 		con_id = 30;
 		break;
@@ -410,24 +426,28 @@ static ulong rk3308_spi_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
 		     CLK_SPI_PLL_SEL_DPLL << CLK_SPI_PLL_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_SPI_DIV_CON_SHIFT);
 
-	return rk3308_spi_get_clk(cru, clk_id);
+	return rk3308_spi_get_clk(clk);
 }
 
-static ulong rk3308_pwm_get_clk(struct rk3308_cru *cru)
+static ulong rk3308_pwm_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[29]);
 	div = con >> CLK_PWM_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
 
-	return DIV_TO_RATE(dpll_hz, div);
+	return DIV_TO_RATE(priv->dpll_hz, div);
 }
 
-static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
+static ulong rk3308_pwm_set_clk(struct clk *clk, uint hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	int src_clk_div;
 
-	src_clk_div = dpll_hz / hz;
+	src_clk_div = priv->dpll_hz / hz;
 	assert(src_clk_div - 1 < 127);
 
 	rk_clrsetreg(&cru->clksel_con[29],
@@ -435,11 +455,13 @@ static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
 		     CLK_PWM_PLL_SEL_DPLL << CLK_PWM_PLL_SEL_SHIFT |
 		     (src_clk_div - 1) << CLK_PWM_DIV_CON_SHIFT);
 
-	return rk3308_pwm_get_clk(cru);
+	return rk3308_pwm_get_clk(clk);
 }
 
-static ulong rk3308_vop_get_clk(struct rk3308_cru *cru)
+static ulong rk3308_vop_get_clk(struct clk *clk)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	u32 div, pll_sel, vol_sel, con, parent;
 
 	con = readl(&cru->clksel_con[8]);
@@ -472,21 +494,23 @@ static ulong rk3308_vop_get_clk(struct rk3308_cru *cru)
 	return DIV_TO_RATE(parent, div);
 }
 
-static ulong rk3308_vop_set_clk(struct rk3308_cru *cru, ulong hz)
+static ulong rk3308_vop_set_clk(struct clk *clk, ulong hz)
 {
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
 	ulong pll_rate, now, best_rate = 0;
 	u32 i, div, best_div = 0, best_sel = 0;
 
 	for (i = 0; i <= DCLK_VOP_PLL_SEL_VPLL1; i++) {
 		switch (i) {
 		case DCLK_VOP_PLL_SEL_DPLL:
-			pll_rate = dpll_hz;
+			pll_rate = priv->dpll_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL0:
-			pll_rate = vpll0_hz;
+			pll_rate = priv->vpll0_hz;
 			break;
 		case DCLK_VOP_PLL_SEL_VPLL1:
-			pll_rate = vpll1_hz;
+			pll_rate = priv->vpll1_hz;
 			break;
 		default:
 			printf("do not support this vop pll sel\n");
@@ -522,12 +546,11 @@ static ulong rk3308_vop_set_clk(struct rk3308_cru *cru, ulong hz)
 		return -EINVAL;
 	}
 
-	return rk3308_vop_get_clk(cru);
+	return rk3308_vop_get_clk(clk);
 }
 
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
-	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong rate = 0;
 
 	debug("%s id:%ld\n", __func__, clk->id);
@@ -540,26 +563,26 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
 	case SCLK_EMMC_SAMPLE:
-		rate = rk3308_mmc_get_clk(priv->cru, clk->id);
+		rate = rk3308_mmc_get_clk(clk);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		rate = rk3308_i2c_get_clk(priv->cru, clk->id);
+		rate = rk3308_i2c_get_clk(clk);
 		break;
 	case SCLK_SARADC:
-		rate = rk3308_saradc_get_clk(priv->cru);
+		rate = rk3308_saradc_get_clk(clk);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		rate = rk3308_spi_get_clk(priv->cru, clk->id);
+		rate = rk3308_spi_get_clk(clk);
 		break;
 	case SCLK_PWM:
-		rate = rk3308_pwm_get_clk(priv->cru);
+		rate = rk3308_pwm_get_clk(clk);
 		break;
 	case DCLK_VOP:
-		rate = rk3308_vop_get_clk(priv->cru);
+		rate = rk3308_vop_get_clk(clk);
 		break;
 	default:
 		return -ENOENT;
@@ -570,7 +593,6 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 
 static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
 	debug("%s %ld %ld\n", __func__, clk->id, rate);
@@ -581,26 +603,26 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
-		ret = rk3308_mmc_set_clk(priv->cru, clk->id, rate);
+		ret = rk3308_mmc_set_clk(clk, rate);
 		break;
 	case SCLK_I2C0:
 	case SCLK_I2C1:
 	case SCLK_I2C2:
 	case SCLK_I2C3:
-		ret = rk3308_i2c_set_clk(priv->cru, clk->id, rate);
+		ret = rk3308_i2c_set_clk(clk, rate);
 		break;
 	case SCLK_SARADC:
-		ret = rk3308_saradc_set_clk(priv->cru, rate);
+		ret = rk3308_saradc_set_clk(clk, rate);
 		break;
 	case SCLK_SPI0:
 	case SCLK_SPI1:
-		ret = rk3308_spi_set_clk(priv->cru, clk->id, rate);
+		ret = rk3308_spi_set_clk(clk, rate);
 		break;
 	case SCLK_PWM:
-		ret = rk3308_pwm_set_clk(priv->cru, rate);
+		ret = rk3308_pwm_set_clk(clk, rate);
 		break;
 	case DCLK_VOP:
-		ret = rk3308_vop_set_clk(priv->cru, rate);
+		ret = rk3308_vop_set_clk(clk, rate);
 		break;
 	default:
 		return -ENOENT;
@@ -741,9 +763,7 @@ static struct clk_ops rk3308_clk_ops = {
 
 static int rk3308_clk_probe(struct udevice *dev)
 {
-	struct rk3308_clk_priv *priv = dev_get_priv(dev);
-
-	rkclk_init(priv->cru);
+	rkclk_init(dev);
 
 	return 0;
 }

commit df8f8a42aad07a4e0ce72cceba3bc5e6966bd542
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 21 17:42:14 2018 +0800

    clk: rockchip: px30: Add support to set rate for bus and peri clks
    
    Change-Id: Iaef91432628395e9f955d2d08455a53e6034c669
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 64446d3eb2..17effb0239 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -233,8 +233,6 @@ static int pll_para_config(u32 freq_hz, struct pll_div *div)
 static void rkclk_init(struct px30_cru *cru)
 {
 	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
 
 	/* init pll */
 	rkclk_set_pll(cru, APLL, apll_cfgs[APLL_816_MHZ]);
@@ -252,38 +250,6 @@ static void rkclk_init(struct px30_cru *cru)
 		     aclk_div << CORE_ACLK_DIV_SHIFT |
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[23],
-		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->clksel_con[24],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	hclk_div = GPLL_HZ / PERI_HCLK_HZ - 1;
-
-	rk_clrsetreg(&cru->clksel_con[14],
-		     PERI_PLL_SEL_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
 }
 
 static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
@@ -617,6 +583,127 @@ static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 	return hz;
 }
 
+static ulong px30_bus_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		con = readl(&cru->clksel_con[23]);
+		div = (con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case HCLK_BUS_PRE:
+		con = readl(&cru->clksel_con[24]);
+		div = (con & BUS_HCLK_DIV_MASK) >> BUS_HCLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case PCLK_BUS_PRE:
+		parent = px30_bus_get_clk(cru, ACLK_BUS_PRE);
+		con = readl(&cru->clksel_con[24]);
+		div = (con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_bus_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_BUS_PRE:
+		src_clk_div = GPLL_HZ / hz;
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[23],
+			     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_BUS_PRE:
+		src_clk_div = GPLL_HZ / hz;
+		assert(src_clk_div - 1 < 31);
+		rk_clrsetreg(&cru->clksel_con[24],
+			     BUS_PLL_SEL_MASK | BUS_HCLK_DIV_MASK,
+			     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << BUS_HCLK_DIV_SHIFT);
+		break;
+	case PCLK_BUS_PRE:
+		src_clk_div = px30_bus_get_clk(cru, ACLK_BUS_PRE) / hz;
+		assert(src_clk_div - 1 < 3);
+		rk_clrsetreg(&cru->clksel_con[24],
+			     BUS_PCLK_DIV_MASK,
+			     (src_clk_div - 1) << BUS_PCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this bus freq\n");
+		return -EINVAL;
+	}
+
+	return px30_bus_get_clk(cru, clk_id);
+}
+
+static ulong px30_peri_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & PERI_ACLK_DIV_MASK) >> PERI_ACLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	case HCLK_PERI_PRE:
+		con = readl(&cru->clksel_con[14]);
+		div = (con & PERI_HCLK_DIV_MASK) >> PERI_HCLK_DIV_SHIFT;
+		parent = GPLL_HZ;
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_peri_set_clk(struct px30_cru *cru, ulong clk_id, ulong hz)
+{
+	int src_clk_div;
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for HCLK and ACLK clocks.
+	 */
+	switch (clk_id) {
+	case ACLK_PERI_PRE:
+		rk_clrsetreg(&cru->clksel_con[14],
+			     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_ACLK_DIV_SHIFT);
+		break;
+	case HCLK_PERI_PRE:
+		rk_clrsetreg(&cru->clksel_con[14],
+			     PERI_PLL_SEL_MASK | PERI_HCLK_DIV_MASK,
+			     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+			     (src_clk_div - 1) << PERI_HCLK_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this peri freq\n");
+		return -EINVAL;
+	}
+
+	return px30_peri_get_clk(cru, clk_id);
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -653,6 +740,15 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case DCLK_VOPB:
 		rate = px30_vop_get_clk(priv->cru, clk->id);
 		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		rate = px30_bus_get_clk(priv->cru, clk->id);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI_PRE:
+		rate = px30_peri_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -696,6 +792,15 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOPB:
 		ret = px30_vop_set_clk(priv->cru, clk->id, rate);
 		break;
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+		ret = px30_bus_set_clk(priv->cru, clk->id, rate);
+		break;
+	case ACLK_PERI_PRE:
+	case HCLK_PERI_PRE:
+		ret = px30_peri_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 9f8e13d3a0def2dc3298163126cf103d2735551c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 21 15:00:31 2018 +0800

    rockchip: board: probe clks after load kernel dtb
    
    pmucru isn't referenced on some platforms, so pmucru driver can't
    probe that the "assigned-clocks" is unused.
    
    Change-Id: I390b302c9101f87dcd9264fda39e1f2e0e66d2b3
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b9e4f6d6bf..3c7a41f14f 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -164,6 +164,11 @@ int board_init(void)
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif
+	/*
+	 * pmucru isn't referenced on some platforms, so pmucru driver can't
+	 * probe that the "assigned-clocks" is unused.
+	 */
+	clks_probe();
 #ifdef CONFIG_DM_REGULATOR
 	ret = regulators_enable_boot_on(false);
 	if (ret)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 46c690ee79..4b1a177dcc 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -11,6 +11,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <dm/device-internal.h>
 #include <dm/read.h>
 #include <dt-structs.h>
 #include <errno.h>
@@ -368,6 +369,25 @@ int clk_disable(struct clk *clk)
 	return ops->disable(clk);
 }
 
+int clks_probe(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_CLK, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		ret = device_probe(dev);
+		if (ret)
+			printf("%s - probe failed: %d\n", dev->name, ret);
+	}
+
+	return 0;
+}
+
 UCLASS_DRIVER(clk) = {
 	.id		= UCLASS_CLK,
 	.name		= "clk",
diff --git a/include/clk.h b/include/clk.h
index f0598d8f2e..44ca263bc1 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -245,4 +245,6 @@ int clk_disable(struct clk *clk);
 
 int soc_clk_dump(void);
 
+int clks_probe(void);
+
 #endif

commit 2b1aad10d29d2ca577fd61026505e09ebb05e300
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed May 23 20:10:36 2018 +0800

    drivers: rknand: fix rk_ftl_arm_v7 nandc drivers error
    
    1. nandc version change
    2. nandc drivers dcache flush strategy
    
    Change-Id: Ic9d325da6404da3b3c2f6445c315d0d8cf45d0be
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 284102b3f5..0c63064f76 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2016-2018, Fuzhou Rockchip Electronics Co., Ltd
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -17,21 +17,31 @@
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 2
-	.file	"rk_ftl_arm_v7.S"
-	.section	.text.ftl_set_blk_mode.part.9,"ax",%progbits
+	.file	"rk_ftl_arm_v7.c"
+	.text
+.Ltext0:
+	.cfi_sections	.debug_frame
+	.section	.text.ftl_set_blk_mode.part.10,"ax",%progbits
 	.align	1
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ftl_set_blk_mode.part.9, %function
-ftl_set_blk_mode.part.9:
+	.type	ftl_set_blk_mode.part.10, %function
+ftl_set_blk_mode.part.10:
+.LFB507:
+	.file 1 "drivers/rknand/rkftl/FtlSysBlk.c"
+	.loc 1 1501 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL0:
+	.loc 1 1504 0
 	ldr	r3, .L2
 	lsrs	r1, r0, #5
 	and	r0, r0, #31
+.LVL1:
 	ldr	r2, [r3]
 	movs	r3, #1
 	lsl	r0, r3, r0
@@ -43,7 +53,9 @@ ftl_set_blk_mode.part.9:
 	.align	2
 .L2:
 	.word	.LANCHOR0
-	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
+	.cfi_endproc
+.LFE507:
+	.size	ftl_set_blk_mode.part.10, .-ftl_set_blk_mode.part.10
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
 	.global	FlashMemCmp8
@@ -53,35 +65,61 @@ ftl_set_blk_mode.part.9:
 	.fpu softvfp
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
+.LFB203:
+	.file 2 "drivers/rknand/rkftl/flash.c"
+	.loc 2 205 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2:
+	.loc 2 208 0
 	ldr	r3, .L12
+	.loc 2 205 0
 	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 208 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L7
+	.loc 2 209 0
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
 	beq	.L11
 	movs	r3, #0
 .L7:
+.LVL3:
+	.loc 2 212 0 discriminator 1
 	cmp	r3, r2
 	bne	.L9
+.LVL4:
 .L11:
+	.loc 2 210 0
 	movs	r0, #0
+.LVL5:
+	.loc 2 217 0
 	pop	{r4, r5, pc}
+.LVL6:
 .L9:
+	.loc 2 213 0
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
+.LVL7:
 	cmp	r5, r4
 	beq	.L7
+	.loc 2 214 0
 	mov	r0, r3
+.LVL8:
 	pop	{r4, r5, pc}
 .L13:
 	.align	2
 .L12:
 	.word	.LANCHOR1
+	.cfi_endproc
+.LFE203:
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
@@ -92,9 +130,14 @@ FlashMemCmp8:
 	.fpu softvfp
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
+.LFB204:
+	.loc 2 239 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL9:
+	.loc 2 240 0
 	ldr	r3, .L17
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	ldr	r3, .L17+4
@@ -102,18 +145,25 @@ FlashRsvdBlkChk:
 	muls	r3, r2, r3
 	cmp	r3, r1
 	bls	.L16
+	.loc 2 240 0 is_stmt 0 discriminator 1
 	adds	r0, r0, #0
+.LVL10:
 	it	ne
 	movne	r0, #1
 	bx	lr
+.LVL11:
 .L16:
 	movs	r0, #1
+.LVL12:
+	.loc 2 244 0 is_stmt 1
 	bx	lr
 .L18:
 	.align	2
 .L17:
 	.word	.LANCHOR2
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE204:
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
@@ -124,26 +174,46 @@ FlashRsvdBlkChk:
 	.fpu softvfp
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
+.LFB205:
+	.loc 2 247 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL13:
+	.loc 2 250 0
 	ldr	r3, .L27
 	and	r2, r1, #127
+	.loc 2 247 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 250 0
 	ldrh	r4, [r3, r2, lsl #1]
+.LVL14:
+	.loc 2 251 0
 	ldr	r3, .L27+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L19
+	.loc 2 251 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
+.LVL15:
 	cbz	r0, .L19
+	.loc 2 252 0 is_stmt 1
 	orr	r4, r4, #-1073741824
+.LVL16:
 .L19:
+	.loc 2 254 0
 	mov	r0, r4
 	pop	{r4, pc}
+.LVL17:
 .L28:
 	.align	2
 .L27:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
+	.cfi_endproc
+.LFE205:
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
@@ -154,30 +224,60 @@ FlashGetRandomizer:
 	.fpu softvfp
 	.type	FlashSetRandomizer, %function
 FlashSetRandomizer:
+.LFB206:
+	.loc 2 257 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL18:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 260 0
 	and	r2, r1, #127
 	ldr	r3, .L37
+	.loc 2 257 0
 	mov	r5, r0
+	.loc 2 260 0
 	ldrh	r4, [r3, r2, lsl #1]
+.LVL19:
+	.loc 2 261 0
 	ldr	r3, .L37+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L30
+	.loc 2 261 0 is_stmt 0 discriminator 1
 	bl	FlashRsvdBlkChk
+.LVL20:
 	cbz	r0, .L30
+	.loc 2 262 0 is_stmt 1
 	orr	r4, r4, #-1073741824
+.LVL21:
 .L30:
+.LBB134:
+.LBB135:
+	.file 3 "drivers/rknand/rkftl/nandc.c"
+	.loc 3 343 0
 	ldr	r3, .L37+8
 	ldr	r3, [r3, r5, lsl #3]
+.LVL22:
+	.loc 3 344 0
 	str	r4, [r3, #336]
+.LVL23:
 	pop	{r3, r4, r5, pc}
+.LVL24:
 .L38:
 	.align	2
 .L37:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
 	.word	.LANCHOR6
+.LBE135:
+.LBE134:
+	.cfi_endproc
+.LFE206:
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
@@ -188,33 +288,64 @@ FlashSetRandomizer:
 	.fpu softvfp
 	.type	FlashReadCmd, %function
 FlashReadCmd:
+.LFB211:
+	.loc 2 322 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL25:
 	push	{r4, r5}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 5, -4
+	.loc 2 330 0
 	lsrs	r2, r1, #16
+.LBB136:
+.LBB137:
+	.loc 3 123 0
 	ldr	r4, .L40
 	ldr	r3, [r4, r0, lsl #3]
+.LVL26:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+.LVL27:
+.LBE137:
+.LBE136:
+	.loc 2 325 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #0
 	str	r4, [r3, #2056]
+	.loc 2 326 0
 	str	r4, [r3, #2052]
+	.loc 2 327 0
 	str	r4, [r3, #2052]
+	.loc 2 328 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
+	.loc 2 329 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
+	.loc 2 330 0
 	str	r2, [r3, #2052]
+	.loc 2 331 0
 	movs	r2, #48
 	str	r2, [r3, #2056]
+	.loc 2 333 0
 	pop	{r4, r5}
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 332 0
 	b	FlashSetRandomizer
+.LVL28:
 .L41:
 	.align	2
 .L40:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE211:
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
@@ -225,47 +356,98 @@ FlashReadCmd:
 	.fpu softvfp
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
+.LFB212:
+	.loc 2 336 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL29:
+.LBB138:
+.LBB139:
+	.loc 3 123 0
 	ldr	r2, .L46
+.LBE139:
+.LBE138:
+	.loc 2 336 0
 	push	{r4, r5, r6}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 6, -4
 	uxtb	r6, r1
+	.loc 2 340 0
 	ldr	r4, .L46+4
 	lsrs	r5, r1, #8
+.LBB141:
+.LBB140:
+	.loc 3 123 0
 	ldr	r3, [r2, r0, lsl #3]
+.LVL30:
+	.loc 3 124 0
 	add	r2, r2, r0, lsl #3
+.LBE140:
+.LBE141:
+	.loc 2 340 0
 	ldrb	r4, [r4, #16]	@ zero_extendqisi2
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+.LVL31:
 	cmp	r4, #1
 	lsr	r4, r1, #16
 	lsl	r2, r2, #8
+	.loc 2 341 0
 	add	r3, r3, r2
+	.loc 2 340 0
 	bne	.L43
+	.loc 2 341 0
 	movs	r2, #6
 	str	r2, [r3, #2056]
+	.loc 2 342 0
 	movs	r2, #0
 	str	r2, [r3, #2052]
+	.loc 2 343 0
 	str	r2, [r3, #2052]
+	.loc 2 344 0
 	str	r6, [r3, #2052]
+	.loc 2 345 0
 	str	r5, [r3, #2052]
+	.loc 2 346 0
 	str	r4, [r3, #2052]
 .L45:
+	.loc 2 358 0
 	movs	r2, #224
 	str	r2, [r3, #2056]
+	.loc 2 361 0
 	pop	{r4, r5, r6}
+	.cfi_remember_state
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 360 0
 	b	FlashSetRandomizer
+.LVL32:
 .L43:
+	.cfi_restore_state
+	.loc 2 349 0
 	movs	r2, #0
 	str	r2, [r3, #2056]
+	.loc 2 350 0
 	str	r2, [r3, #2052]
+	.loc 2 351 0
 	str	r2, [r3, #2052]
+	.loc 2 352 0
 	str	r6, [r3, #2052]
+	.loc 2 353 0
 	str	r5, [r3, #2052]
+	.loc 2 354 0
 	str	r4, [r3, #2052]
+	.loc 2 355 0
 	movs	r4, #5
 	str	r4, [r3, #2056]
+	.loc 2 356 0
 	str	r2, [r3, #2052]
+	.loc 2 357 0
 	str	r2, [r3, #2052]
 	b	.L45
 .L47:
@@ -273,6 +455,8 @@ FlashReadDpDataOutCmd:
 .L46:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE212:
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
@@ -283,19 +467,38 @@ FlashReadDpDataOutCmd:
 	.fpu softvfp
 	.type	flash_enter_slc_mode, %function
 flash_enter_slc_mode:
+.LFB214:
+	.loc 2 399 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL33:
+	.loc 2 401 0
 	ldr	r3, .L53
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L48
+.LVL34:
+.LBB146:
+.LBB147:
+.LBB148:
+.LBB149:
+	.loc 3 123 0
 	ldr	r3, .L53+4
 	ldr	r2, [r3, r0, lsl #3]
+.LVL35:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL36:
+.LBE149:
+.LBE148:
+	.loc 2 403 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #218
 	str	r2, [r3, #2056]
+.LVL37:
 .L48:
 	bx	lr
 .L54:
@@ -303,6 +506,10 @@ flash_enter_slc_mode:
 .L53:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
+.LBE147:
+.LBE146:
+	.cfi_endproc
+.LFE214:
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
@@ -313,19 +520,38 @@ flash_enter_slc_mode:
 	.fpu softvfp
 	.type	flash_exit_slc_mode, %function
 flash_exit_slc_mode:
+.LFB215:
+	.loc 2 408 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL38:
+	.loc 2 410 0
 	ldr	r3, .L60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L55
+.LVL39:
+.LBB154:
+.LBB155:
+.LBB156:
+.LBB157:
+	.loc 3 123 0
 	ldr	r3, .L60+4
 	ldr	r2, [r3, r0, lsl #3]
+.LVL40:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL41:
+.LBE157:
+.LBE156:
+	.loc 2 412 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #223
 	str	r2, [r3, #2056]
+.LVL42:
 .L55:
 	bx	lr
 .L61:
@@ -333,6 +559,10 @@ flash_exit_slc_mode:
 .L60:
 	.word	.LANCHOR8
 	.word	.LANCHOR6
+.LBE155:
+.LBE154:
+	.cfi_endproc
+.LFE215:
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
@@ -343,32 +573,62 @@ flash_exit_slc_mode:
 	.fpu softvfp
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
+.LFB216:
+	.loc 2 417 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL43:
 	push	{r4, r5}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 5, -4
+	.loc 2 426 0
 	lsrs	r2, r1, #16
+.LBB158:
+.LBB159:
+	.loc 3 123 0
 	ldr	r4, .L63
 	ldr	r3, [r4, r0, lsl #3]
+.LVL44:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+.LVL45:
+.LBE159:
+.LBE158:
+	.loc 2 421 0
 	add	r3, r3, r4, lsl #8
 	movs	r4, #128
 	str	r4, [r3, #2056]
+	.loc 2 422 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
+	.loc 2 423 0
 	str	r4, [r3, #2052]
+	.loc 2 424 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
+	.loc 2 425 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
+	.loc 2 426 0
 	str	r2, [r3, #2052]
+	.loc 2 428 0
 	pop	{r4, r5}
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 427 0
 	b	FlashSetRandomizer
+.LVL46:
 .L64:
 	.align	2
 .L63:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE216:
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
@@ -379,38 +639,70 @@ FlashProgFirstCmd:
 	.fpu softvfp
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
+.LFB217:
+	.loc 2 431 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL47:
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+.LBB160:
+.LBB161:
+	.loc 3 123 0
 	ldr	r4, .L70
 	ldr	r3, [r4, r0, lsl #3]
+.LVL48:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r0, [r4, #4]	@ zero_extendqisi2
+.LVL49:
 	lsls	r0, r0, #8
+.LBE161:
+.LBE160:
+	.loc 2 435 0
 	cbz	r2, .L66
+	.loc 2 436 0
 	adds	r2, r3, r0
+.LVL50:
 	movs	r4, #96
 	str	r4, [r2, #2056]
+	.loc 2 437 0
 	uxtb	r4, r1
 	str	r4, [r2, #2052]
+	.loc 2 438 0
 	lsrs	r4, r1, #8
 	str	r4, [r2, #2052]
+	.loc 2 439 0
 	lsrs	r4, r1, #16
 	str	r4, [r2, #2052]
+	.loc 2 440 0
 	ldr	r2, .L70+4
 	ldr	r2, [r2]
 	add	r1, r1, r2
+.LVL51:
 .L66:
+	.loc 2 442 0
 	add	r3, r3, r0
 	movs	r2, #96
 	str	r2, [r3, #2056]
+	.loc 2 443 0
 	uxtb	r2, r1
 	str	r2, [r3, #2052]
+	.loc 2 444 0
 	lsrs	r2, r1, #8
+	.loc 2 445 0
 	lsrs	r1, r1, #16
+.LVL52:
+	.loc 2 444 0
 	str	r2, [r3, #2052]
+	.loc 2 446 0
 	movs	r2, #208
+	.loc 2 445 0
 	str	r1, [r3, #2052]
+	.loc 2 446 0
 	str	r2, [r3, #2056]
 	pop	{r4, pc}
 .L71:
@@ -418,6 +710,8 @@ FlashEraseCmd:
 .L70:
 	.word	.LANCHOR6
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE217:
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
@@ -428,34 +722,64 @@ FlashEraseCmd:
 	.fpu softvfp
 	.type	FlashProgDpSecondCmd, %function
 FlashProgDpSecondCmd:
+.LFB218:
+	.loc 2 450 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL53:
 	push	{r4, r5}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 5, -4
+	.loc 2 459 0
 	lsrs	r2, r1, #16
+.LBB162:
+.LBB163:
+	.loc 3 123 0
 	ldr	r4, .L73
 	ldr	r3, [r4, r0, lsl #3]
+.LVL54:
+	.loc 3 124 0
 	add	r4, r4, r0, lsl #3
 	ldrb	r5, [r4, #4]	@ zero_extendqisi2
+.LVL55:
+.LBE163:
+.LBE162:
+	.loc 2 454 0
 	ldr	r4, .L73+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
 	add	r3, r3, r5, lsl #8
 	str	r4, [r3, #2056]
+	.loc 2 455 0
 	movs	r4, #0
 	str	r4, [r3, #2052]
+	.loc 2 456 0
 	str	r4, [r3, #2052]
+	.loc 2 457 0
 	uxtb	r4, r1
 	str	r4, [r3, #2052]
+	.loc 2 458 0
 	lsrs	r4, r1, #8
 	str	r4, [r3, #2052]
+	.loc 2 459 0
 	str	r2, [r3, #2052]
+	.loc 2 461 0
 	pop	{r4, r5}
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 460 0
 	b	FlashSetRandomizer
+.LVL56:
 .L74:
 	.align	2
 .L73:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE218:
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
 	.align	1
@@ -466,13 +790,27 @@ FlashProgDpSecondCmd:
 	.fpu softvfp
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
+.LFB219:
+	.loc 2 464 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL57:
+.LBB164:
+.LBB165:
+	.loc 3 123 0
 	ldr	r3, .L76
 	ldr	r2, [r3, r0, lsl #3]
+.LVL58:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL59:
+.LBE165:
+.LBE164:
+	.loc 2 468 0
 	add	r3, r2, r3, lsl #8
 	movs	r2, #16
 	str	r2, [r3, #2056]
@@ -481,6 +819,8 @@ FlashProgSecondCmd:
 	.align	2
 .L76:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE219:
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
@@ -491,15 +831,41 @@ FlashProgSecondCmd:
 	.fpu softvfp
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
+.LFB220:
+	.loc 2 472 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL60:
+.LBB166:
+.LBB167:
+	.loc 3 123 0
 	ldr	r3, .L79
+.LBE167:
+.LBE166:
+	.loc 2 476 0
 	ldr	r1, .L79+4
+.LVL61:
+.LBB170:
+.LBB168:
+	.loc 3 123 0
 	ldr	r2, [r3, r0, lsl #3]
+.LVL62:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+.LBE168:
+.LBE170:
+	.loc 2 476 0
 	ldrb	r1, [r1, #10]	@ zero_extendqisi2
+.LBB171:
+.LBB169:
+	.loc 3 126 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL63:
+.LBE169:
+.LBE171:
+	.loc 2 476 0
 	add	r3, r2, r3, lsl #8
 	str	r1, [r3, #2056]
 	bx	lr
@@ -508,6 +874,8 @@ FlashProgDpFirstCmd:
 .L79:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE220:
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
 	.align	1
@@ -518,26 +886,69 @@ FlashProgDpFirstCmd:
 	.fpu softvfp
 	.type	FlashReadStatus, %function
 FlashReadStatus:
+.LFB221:
+	.loc 2 480 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL64:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 2 484 0
 	movs	r2, #112
+.LBB172:
+.LBB173:
+	.loc 3 123 0
 	ldr	r3, .L82
 	ldr	r5, [r3, r0, lsl #3]
+.LVL65:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+.LBE173:
+.LBE172:
+.LBB175:
+.LBB176:
+	.loc 3 306 0
 	movs	r0, #80
+.LVL66:
+.LBE176:
+.LBE175:
+.LBB178:
+.LBB174:
+	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+.LVL67:
+.LBE174:
+.LBE178:
+	.loc 2 484 0
 	add	r3, r5, r4, lsl #8
+	.loc 2 487 0
 	adds	r4, r4, #8
 	lsls	r4, r4, #8
+	.loc 2 484 0
 	str	r2, [r3, #2056]
+.LVL68:
+.LBB179:
+.LBB177:
+	.loc 3 306 0
 	bl	udelay
+.LVL69:
+.LBE177:
+.LBE179:
+	.loc 2 487 0
 	ldr	r0, [r5, r4]
+	.loc 2 488 0
 	pop	{r3, r4, r5, pc}
 .L83:
 	.align	2
 .L82:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE221:
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.JSHash,"ax",%progbits
 	.align	1
@@ -548,27 +959,47 @@ FlashReadStatus:
 	.fpu softvfp
 	.type	JSHash, %function
 JSHash:
+.LFB229:
+	.loc 2 800 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL70:
+	.loc 2 801 0
 	ldr	r3, .L87
 	add	r1, r1, r0
+.LVL71:
+	.loc 2 800 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+.LVL72:
 .L85:
+	.loc 2 804 0 discriminator 1
 	cmp	r0, r1
 	bne	.L86
+	.loc 2 807 0
 	mov	r0, r3
+.LVL73:
 	pop	{r4, pc}
+.LVL74:
 .L86:
+	.loc 2 805 0 discriminator 3
 	lsrs	r2, r3, #2
 	ldrb	r4, [r0], #1	@ zero_extendqisi2
+.LVL75:
 	add	r2, r2, r3, lsl #5
 	add	r2, r2, r4
 	eors	r3, r3, r2
+.LVL76:
 	b	.L85
 .L88:
 	.align	2
 .L87:
 	.word	1204201446
+	.cfi_endproc
+.LFE229:
 	.size	JSHash, .-JSHash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
@@ -579,11 +1010,17 @@ JSHash:
 	.fpu softvfp
 	.type	FlashLoadIdbInfo, %function
 FlashLoadIdbInfo:
+.LFB232:
+	.loc 2 925 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	.loc 2 927 0
 	movs	r0, #0
 	bx	lr
+	.cfi_endproc
+.LFE232:
 	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
 	.section	.text.FlashPrintInfo,"ax",%progbits
 	.align	1
@@ -594,10 +1031,14 @@ FlashLoadIdbInfo:
 	.fpu softvfp
 	.type	FlashPrintInfo, %function
 FlashPrintInfo:
+.LFB538:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE538:
 	.size	FlashPrintInfo, .-FlashPrintInfo
 	.section	.text.ToshibaSetRRPara,"ax",%progbits
 	.align	1
@@ -608,47 +1049,93 @@ FlashPrintInfo:
 	.fpu softvfp
 	.type	ToshibaSetRRPara, %function
 ToshibaSetRRPara:
+.LFB239:
+	.loc 2 1723 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL77:
+	.loc 2 1723 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
 	add	r7, r1, r1, lsl #2
+	.loc 2 1726 0
 	ldr	r10, .L99+12
+	.loc 2 1723 0
 	mov	r5, r0
 	mov	r6, r1
+	.loc 2 1726 0
 	movs	r4, #0
+	.loc 2 1728 0
 	ldr	r8, .L99+16
+.LVL78:
 .L92:
+	.loc 2 1726 0 discriminator 1
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L96
+	.loc 2 1738 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL79:
 .L96:
+	.loc 2 1727 0
 	movs	r3, #85
+.LBB180:
+.LBB181:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE181:
+.LBE180:
+	.loc 2 1727 0
 	str	r3, [r5, #8]
+	.loc 2 1728 0
 	ldrsb	r3, [r4, r8]
 	str	r3, [r5, #4]
+.LVL80:
+.LBB183:
+.LBB182:
+	.loc 3 306 0
 	bl	udelay
+.LVL81:
+.LBE182:
+.LBE183:
+	.loc 2 1730 0
 	ldr	r3, .L99
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
 	bne	.L93
+	.loc 2 1731 0
 	adds	r3, r4, r7
 	add	r3, r3, r8
 .L98:
+	.loc 2 1733 0
 	ldrsb	r3, [r3, #5]
 .L97:
+	.loc 2 1735 0
 	str	r3, [r5]
+	.loc 2 1726 0
 	adds	r4, r4, #1
+.LVL82:
 	b	.L92
 .L93:
+	.loc 2 1732 0
 	cmp	r3, #35
 	bne	.L95
+	.loc 2 1733 0
 	ldr	r3, .L99+4
 	adds	r2, r4, r7
 	add	r3, r3, r2
 	b	.L98
 .L95:
+	.loc 2 1735 0
 	ldr	r3, .L99+8
 	ldrsb	r3, [r3, r6]
 	b	.L97
@@ -660,6 +1147,8 @@ ToshibaSetRRPara:
 	.word	.LANCHOR12
 	.word	.LANCHOR13
 	.word	.LANCHOR9
+	.cfi_endproc
+.LFE239:
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
@@ -670,38 +1159,82 @@ ToshibaSetRRPara:
 	.fpu softvfp
 	.type	SamsungSetRRPara, %function
 SamsungSetRRPara:
+.LFB241:
+	.loc 2 1807 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL83:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 1807 0
 	mov	r6, r0
 	ldr	r7, .L104
+	.loc 2 1810 0
 	movs	r4, #0
+	.loc 2 1811 0
 	mov	r10, #161
+	.loc 2 1810 0
 	ldr	r8, .L104+4
 	add	r1, r7, r1, lsl #2
+.LVL84:
 	adds	r5, r1, #3
+.LVL85:
 .L102:
+	.loc 2 1810 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L103
+	.loc 2 1817 0 is_stmt 1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL86:
 .L103:
+	.loc 2 1812 0 discriminator 3
 	movs	r3, #0
+	.loc 2 1811 0 discriminator 3
 	str	r10, [r6, #8]
+	.loc 2 1812 0 discriminator 3
 	str	r3, [r6]
+.LBB184:
+.LBB185:
+	.loc 3 306 0 discriminator 3
 	mov	r0, #300
+.LBE185:
+.LBE184:
+	.loc 2 1813 0 discriminator 3
 	ldrsb	r3, [r7, r4]
+	.loc 2 1810 0 discriminator 3
 	adds	r4, r4, #1
+.LVL87:
+	.loc 2 1813 0 discriminator 3
 	str	r3, [r6]
+	.loc 2 1814 0 discriminator 3
 	ldrsb	r3, [r5, #1]!
 	str	r3, [r6]
+.LVL88:
+.LBB187:
+.LBB186:
+	.loc 3 306 0 discriminator 3
 	bl	udelay
+.LVL89:
 	b	.L102
 .L105:
 	.align	2
 .L104:
 	.word	.LANCHOR14
 	.word	.LANCHOR13
+.LBE186:
+.LBE187:
+	.cfi_endproc
+.LFE241:
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
 	.global	__aeabi_uidiv
 	.global	__aeabi_uidivmod
@@ -714,59 +1247,114 @@ SamsungSetRRPara:
 	.fpu softvfp
 	.type	LogAddr2PhyAddr, %function
 LogAddr2PhyAddr:
+.LFB254:
+	.loc 2 2669 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL90:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2669 0
 	mov	r6, r3
+	.loc 2 2671 0
 	ldr	r3, .L111
+.LVL91:
+	.loc 2 2669 0
 	mov	r8, r1
 	mov	r7, r2
 	mov	r5, r0
+	.loc 2 2671 0
 	ldrh	r4, [r3, #14]
 	ldrh	r3, [r3, #12]
 	smulbb	r4, r4, r3
+	.loc 2 2675 0
 	ldr	r3, .L111+4
 	ldrh	fp, [r3]
+	.loc 2 2671 0
 	uxth	r4, r4
+.LVL92:
+	.loc 2 2677 0
 	ldr	r3, .L111+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
+	.loc 2 2680 0
 	ldr	r3, [r0, #4]
+	.loc 2 2678 0
 	it	eq
 	lsleq	r1, fp, #1
+.LVL93:
+	.loc 2 2681 0
 	ubfx	r2, r3, #10, #16
+.LVL94:
+	.loc 2 2678 0
 	it	eq
 	uxtheq	fp, r1
+.LVL95:
+	.loc 2 2682 0
 	mov	r0, r2
+.LVL96:
+	.loc 2 2681 0
 	str	r3, [sp, #4]
+.LVL97:
+	.loc 2 2682 0
 	mov	r1, r4
 	str	r2, [sp]
 	bl	__aeabi_uidiv
+.LVL98:
 	ldr	r2, [sp]
 	uxth	r10, r0
+.LVL99:
 	mov	r1, r4
 	mov	r0, r2
 	bl	__aeabi_uidivmod
+.LVL100:
+	.loc 2 2684 0
 	ldr	r3, [sp, #4]
+	.loc 2 2685 0
 	cmp	r8, #1
 	uxth	r1, r1
+.LVL101:
+	.loc 2 2684 0
 	ubfx	r3, r3, #0, #10
+.LVL102:
+	.loc 2 2685 0
 	bne	.L108
+	.loc 2 2685 0 is_stmt 0 discriminator 1
 	ldr	r2, .L111+12
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cbnz	r2, .L108
+	.loc 2 2686 0 is_stmt 1
 	ldr	r2, .L111+16
 	ldrh	r3, [r2, r3, lsl #1]
+.LVL103:
 .L108:
+	.loc 2 2687 0
 	ldr	r2, .L111+20
 	ldr	r2, [r2, r10, lsl #2]
 	mla	r1, fp, r1, r2
+.LVL104:
 	add	r1, r1, r3
+	.loc 2 2691 0
 	ldrb	r3, [sp, #40]	@ zero_extendqisi2
+.LVL105:
+	.loc 2 2687 0
 	str	r1, [r7]
+	.loc 2 2688 0
 	str	r10, [r6]
+.LVL106:
+	.loc 2 2691 0
 	cmp	r3, #1
 	bls	.L110
+	.loc 2 2692 0
 	ldr	r0, [r5, #4]
 	ldr	r3, [r5, #40]
 	add	r0, r0, #1024
@@ -774,10 +1362,17 @@ LogAddr2PhyAddr:
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 .L109:
+.LVL107:
+	.loc 2 2696 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL108:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL109:
 .L110:
+	.cfi_restore_state
 	movs	r0, #0
 	b	.L109
 .L112:
@@ -789,6 +1384,8 @@ LogAddr2PhyAddr:
 	.word	.LANCHOR8
 	.word	.LANCHOR16
 	.word	.LANCHOR17
+	.cfi_endproc
+.LFE254:
 	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
 	.section	.text.FlashReadStatusEN,"ax",%progbits
 	.align	1
@@ -799,13 +1396,38 @@ LogAddr2PhyAddr:
 	.fpu softvfp
 	.type	FlashReadStatusEN, %function
 FlashReadStatusEN:
+.LFB255:
+	.loc 2 2699 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL110:
+.LBB188:
+.LBB189:
+	.loc 3 123 0
 	ldr	r3, .L125
+.LBE189:
+.LBE188:
+	.loc 2 2699 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+.LBB191:
+.LBB190:
+	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
+.LVL111:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+.LVL112:
+.LBE190:
+.LBE191:
+	.loc 2 2703 0
 	ldr	r3, .L125+4
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
@@ -814,38 +1436,74 @@ FlashReadStatusEN:
 	add	r4, r4, #8
 	bne	.L114
 	ldr	r0, .L125+8
+.LVL113:
+	.loc 2 2704 0
 	cbnz	r2, .L115
+	.loc 2 2705 0
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
+.LVL114:
 .L124:
+	.loc 2 2707 0
 	add	r3, r3, r5
 	str	r2, [r3, #2056]
+	.loc 2 2709 0
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
 	cbz	r0, .L119
+.LBB192:
+	.loc 2 2712 0 discriminator 1
 	add	r6, r5, r4, lsl #8
+.LBE192:
 	movs	r2, #0
 .L118:
+.LVL115:
+.LBB193:
+	.loc 2 2711 0 discriminator 1
 	cmp	r2, r0
 	bcc	.L120
+.LVL116:
 .L119:
+.LBE193:
+	.loc 2 2719 0
 	lsls	r4, r4, #8
+.LBB194:
+.LBB195:
+	.loc 3 306 0
 	movs	r0, #80
 	bl	udelay
+.LVL117:
+.LBE195:
+.LBE194:
+	.loc 2 2719 0
 	ldr	r0, [r5, r4]
+	.loc 2 2720 0
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
+.LVL118:
 .L115:
+	.loc 2 2707 0
 	ldrb	r2, [r0, #14]	@ zero_extendqisi2
+.LVL119:
 	b	.L124
+.LVL120:
 .L120:
+.LBB196:
+	.loc 2 2712 0 discriminator 3
 	lsls	r3, r2, #3
+	.loc 2 2711 0 discriminator 3
 	adds	r2, r2, #1
+.LVL121:
+	.loc 2 2712 0 discriminator 3
 	lsr	r3, r1, r3
 	uxtb	r3, r3
 	str	r3, [r6, #4]
 	b	.L118
+.LVL122:
 .L114:
+.LBE196:
+	.loc 2 2716 0
 	add	r3, r3, r5
 	movs	r2, #112
+.LVL123:
 	str	r2, [r3, #2056]
 	b	.L119
 .L126:
@@ -854,6 +1512,8 @@ FlashReadStatusEN:
 	.word	.LANCHOR6
 	.word	.LANCHOR18
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE255:
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",%progbits
 	.align	1
@@ -864,23 +1524,43 @@ FlashReadStatusEN:
 	.fpu softvfp
 	.type	FlashWaitReadyEN, %function
 FlashWaitReadyEN:
+.LFB256:
+	.loc 2 2723 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL124:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
+.LVL125:
 .L131:
+	.loc 2 2727 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatusEN
+.LVL126:
+	.loc 2 2728 0
 	cmp	r0, #255
+	.loc 2 2727 0
 	mov	r3, r0
+.LVL127:
+	.loc 2 2728 0
 	beq	.L131
+	.loc 2 2730 0
 	lsls	r3, r3, #25
 	bpl	.L131
+	.loc 2 2734 0
 	pop	{r4, r5, r6, pc}
+	.cfi_endproc
+.LFE256:
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
 	.align	1
@@ -891,10 +1571,16 @@ FlashWaitReadyEN:
 	.fpu softvfp
 	.type	NandcReadDontCaseBusyEn, %function
 NandcReadDontCaseBusyEn:
+.LFB268:
+	.loc 3 111 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL128:
 	bx	lr
+	.cfi_endproc
+.LFE268:
 	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
 	.section	.text.NandcGetChipIf,"ax",%progbits
 	.align	1
@@ -905,20 +1591,31 @@ NandcReadDontCaseBusyEn:
 	.fpu softvfp
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
+.LFB269:
+	.loc 3 120 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL129:
+	.loc 3 123 0
 	ldr	r2, .L136
+	.loc 3 124 0
 	add	r3, r2, r0, lsl #3
+	.loc 3 126 0
 	ldr	r0, [r2, r0, lsl #3]
+.LVL130:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	adds	r3, r3, #8
+	.loc 3 128 0
 	add	r0, r0, r3, lsl #8
 	bx	lr
 .L137:
 	.align	2
 .L136:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE269:
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
@@ -929,13 +1626,19 @@ NandcGetChipIf:
 	.fpu softvfp
 	.type	NandcSetDdrPara, %function
 NandcSetDdrPara:
+.LFB270:
+	.loc 3 131 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL131:
+	.loc 3 133 0
 	ldr	r3, .L139
 	ldr	r2, [r3]
 	lsls	r3, r0, #8
 	orr	r0, r3, r0, lsl #16
+.LVL132:
 	orr	r0, r0, #1
 	str	r0, [r2, #304]
 	bx	lr
@@ -943,6 +1646,8 @@ NandcSetDdrPara:
 	.align	2
 .L139:
 	.word	.LANCHOR19
+	.cfi_endproc
+.LFE270:
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
 	.align	1
@@ -953,11 +1658,17 @@ NandcSetDdrPara:
 	.fpu softvfp
 	.type	NandcSetDdrDiv, %function
 NandcSetDdrDiv:
+.LFB271:
+	.loc 3 143 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL133:
+	.loc 3 144 0
 	ldr	r3, .L142
 	orr	r0, r0, #16640
+.LVL134:
 	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
@@ -965,6 +1676,8 @@ NandcSetDdrDiv:
 	.align	2
 .L142:
 	.word	.LANCHOR19
+	.cfi_endproc
+.LFE271:
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
 	.align	1
@@ -975,24 +1688,37 @@ NandcSetDdrDiv:
 	.fpu softvfp
 	.type	NandcSetDdrMode, %function
 NandcSetDdrMode:
+.LFB272:
+	.loc 3 148 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL135:
+	.loc 3 150 0
 	ldr	r3, .L147
 	ldr	r2, [r3]
 	ldr	r3, [r2]
+.LVL136:
+	.loc 3 152 0
 	cbnz	r0, .L145
+	.loc 3 151 0
 	bfi	r3, r0, #13, #1
 .L146:
+	.loc 3 160 0
 	str	r3, [r2]
 	bx	lr
 .L145:
+	.loc 3 158 0
 	orr	r3, r3, #253952
+.LVL137:
 	b	.L146
 .L148:
 	.align	2
 .L147:
 	.word	.LANCHOR19
+	.cfi_endproc
+.LFE272:
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
 	.align	1
@@ -1003,33 +1729,62 @@ NandcSetDdrMode:
 	.fpu softvfp
 	.type	NandcSetMode, %function
 NandcSetMode:
+.LFB273:
+	.loc 3 170 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL138:
+	.loc 3 174 0
 	ldr	r3, .L156
+	.loc 3 175 0
 	ands	r1, r0, #6
+	.loc 3 174 0
 	ldr	r2, [r3]
 	ldr	r3, [r2]
+.LVL139:
+	.loc 3 175 0
 	beq	.L150
+	.loc 3 182 0
 	lsls	r1, r0, #29
+	.loc 3 228 0
 	movw	r1, #16641
 	str	r1, [r2, #344]
+	.loc 3 178 0
 	orr	r3, r3, #24576
+.LVL140:
+	.loc 3 229 0
 	ldr	r1, .L156+4
+	.loc 3 179 0
 	bfc	r3, #15, #1
+.LVL141:
+	.loc 3 181 0
 	orr	r3, r3, #196608
+.LVL142:
+	.loc 3 184 0
 	it	mi
 	orrmi	r3, r3, #32768
+.LVL143:
+	.loc 3 229 0
 	str	r1, [r2, #304]
+	.loc 3 231 0
 	movs	r1, #38
 	str	r1, [r2, #308]
+	.loc 3 232 0
 	movs	r1, #39
 	str	r1, [r2, #308]
+.LVL144:
 .L152:
+	.loc 3 264 0
 	str	r3, [r2]
+	.loc 3 272 0
 	movs	r0, #0
+.LVL145:
 	bx	lr
+.LVL146:
 .L150:
+	.loc 3 262 0
 	bfi	r3, r1, #13, #1
 	b	.L152
 .L157:
@@ -1037,6 +1792,8 @@ NandcSetMode:
 .L156:
 	.word	.LANCHOR19
 	.word	1710595
+	.cfi_endproc
+.LFE273:
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",%progbits
 	.align	1
@@ -1047,23 +1804,41 @@ NandcSetMode:
 	.fpu softvfp
 	.type	NandcFlashCs, %function
 NandcFlashCs:
+.LFB274:
+	.loc 3 275 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL147:
+	.loc 3 278 0
 	ldr	r3, .L159
+	.loc 3 283 0
 	movs	r2, #1
+	.loc 3 278 0
 	ldr	r1, [r3, r0, lsl #3]
+.LVL148:
+	.loc 3 279 0
 	add	r0, r3, r0, lsl #3
+.LVL149:
+	.loc 3 283 0
 	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+.LVL150:
+	.loc 3 282 0
 	ldr	r3, [r1]
+	.loc 3 283 0
 	lsls	r2, r2, r0
 	bfi	r3, r2, #0, #8
+.LVL151:
+	.loc 3 286 0
 	str	r3, [r1]
 	bx	lr
 .L160:
 	.align	2
 .L159:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE274:
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
@@ -1074,20 +1849,34 @@ NandcFlashCs:
 	.fpu softvfp
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
+.LFB275:
+	.loc 3 290 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL152:
+	.loc 3 293 0
 	ldr	r3, .L162
 	ldr	r2, [r3, r0, lsl #3]
+.LVL153:
+	.loc 3 296 0
 	ldr	r3, [r2]
+	.loc 3 297 0
 	bfc	r3, #0, #8
+.LVL154:
+	.loc 3 298 0
 	bfc	r3, #17, #1
+	.loc 3 301 0
 	str	r3, [r2]
+.LVL155:
 	bx	lr
 .L163:
 	.align	2
 .L162:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE275:
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
 	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
@@ -1098,76 +1887,154 @@ NandcFlashDeCs:
 	.fpu softvfp
 	.type	HynixSetRRPara, %function
 HynixSetRRPara:
+.LFB244:
+	.loc 2 1901 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL156:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1901 0
 	mov	r7, r3
+	.loc 2 1906 0
 	ldr	r3, .L171
+.LVL157:
+	.loc 2 1901 0
 	mov	r5, r0
 	mov	r6, r1
 	mov	r10, r2
 	ldr	r4, .L171+4
+	.loc 2 1906 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
 	bne	.L165
+	.loc 2 1908 0
 	movs	r3, #20
 	add	r3, r3, r0, lsl #6
 	add	r3, r3, r7, lsl #2
+.LVL158:
 .L170:
+	.loc 2 1911 0
 	add	r4, r4, r3
+.LVL159:
 .L166:
+.LBB197:
+.LBB198:
+	.loc 3 123 0
 	ldr	r3, .L171+8
+.LBE198:
+.LBE197:
+	.loc 2 1916 0
 	mov	r0, r5
+.LVL160:
 	subs	r6, r6, #1
 	subs	r4, r4, #1
+.LVL161:
 	add	r6, r6, r10
+.LBB200:
+.LBB199:
+	.loc 3 123 0
 	ldr	r8, [r3, r5, lsl #3]
+.LVL162:
+	.loc 3 124 0
 	add	r3, r3, r5, lsl #3
 	ldrb	fp, [r3, #4]	@ zero_extendqisi2
+.LVL163:
+.LBE199:
+.LBE200:
+	.loc 2 1916 0
 	bl	NandcFlashCs
+.LVL164:
+	.loc 2 1917 0
 	movs	r3, #54
 	lsl	fp, fp, #8
 	add	r0, r8, fp
 	str	r3, [r0, #2056]
+.LVL165:
 	add	r3, r10, #-1
 	mov	r10, r0
+.LVL166:
 .L168:
+	.loc 2 1918 0 discriminator 1
 	cmp	r3, r6
 	bne	.L169
+	.loc 2 1923 0
 	movs	r3, #22
+.LVL167:
 	add	r8, r8, fp
 	str	r3, [r8, #2056]
+	.loc 2 1924 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
+.LVL168:
+	.loc 2 1925 0
 	ldr	r3, .L171+12
 	strb	r7, [r3, r5]
+	.loc 2 1926 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL169:
 .L165:
+	.cfi_restore_state
+	.loc 2 1909 0
 	cmp	r3, #7
 	bne	.L167
+	.loc 2 1911 0
 	movs	r3, #160
 	movs	r2, #28
+.LVL170:
 	smlabb	r2, r3, r0, r2
 	movs	r3, #10
 	smlabb	r3, r3, r7, r2
 	b	.L170
+.LVL171:
 .L167:
+	.loc 2 1913 0
 	adds	r3, r7, #2
 	add	r3, r3, r0, lsl #3
 	add	r4, r4, r3, lsl #3
 	adds	r4, r4, #4
+.LVL172:
 	b	.L166
+.LVL173:
 .L169:
+	.loc 2 1919 0 discriminator 3
 	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
+.LVL174:
+.LBB201:
+.LBB202:
+	.loc 3 306 0 discriminator 3
 	movs	r0, #200
+.LBE202:
+.LBE201:
+	.loc 2 1919 0 discriminator 3
 	str	r2, [r10, #2052]
+.LVL175:
 	str	r3, [sp, #4]
+.LBB204:
+.LBB203:
+	.loc 3 306 0 discriminator 3
 	bl	udelay
+.LVL176:
+.LBE203:
+.LBE204:
+	.loc 2 1921 0 discriminator 3
 	ldrsb	r2, [r4, #1]!
 	ldr	r3, [sp, #4]
+.LVL177:
 	str	r2, [r10, #2048]
 	b	.L168
 .L172:
@@ -1177,6 +2044,8 @@ HynixSetRRPara:
 	.word	.LANCHOR20
 	.word	.LANCHOR6
 	.word	.LANCHOR21
+	.cfi_endproc
+.LFE244:
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -1187,30 +2056,57 @@ HynixSetRRPara:
 	.fpu softvfp
 	.type	FlashSetReadRetryDefault, %function
 FlashSetReadRetryDefault:
+.LFB246:
+	.loc 2 1970 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL178:
+	.loc 2 1972 0
 	ldr	r3, .L179
+	.loc 2 1970 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 1972 0
 	ldr	r3, [r3]
+	.loc 2 1974 0
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L173
+.LBB207:
+.LBB208:
+	.loc 2 1977 0
 	ldr	r5, .L179+4
+.LBE208:
+.LBE207:
 	movs	r4, #0
+.LBB210:
+.LBB209:
 	adds	r6, r5, #4
+.LVL179:
 .L176:
+	.loc 2 1976 0
 	ldr	r3, .L179+8
 	uxtb	r0, r4
+.LVL180:
 	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
 	bne	.L175
+	.loc 2 1977 0
 	movs	r3, #0
 	mov	r2, r6
 	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL181:
 .L175:
 	adds	r4, r4, #1
+.LVL182:
+	.loc 2 1975 0
 	cmp	r4, #4
 	bne	.L176
 .L173:
@@ -1221,6 +2117,10 @@ FlashSetReadRetryDefault:
 	.word	.LANCHOR18
 	.word	.LANCHOR20
 	.word	.LANCHOR22
+.LBE209:
+.LBE210:
+	.cfi_endproc
+.LFE246:
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
 	.section	.text.FlashWaitCmdDone,"ax",%progbits
 	.align	1
@@ -1231,18 +2131,36 @@ FlashSetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashWaitCmdDone, %function
 FlashWaitCmdDone:
+.LFB257:
+	.loc 2 2737 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL183:
+	.loc 2 2742 0
 	ldr	r2, .L188
 	lsls	r3, r0, #4
+	.loc 2 2737 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 2737 0
 	mov	r6, r0
+	.loc 2 2742 0
 	adds	r4, r2, r3
 	ldr	r1, [r4, #8]
 	cbz	r1, .L183
+	.loc 2 2739 0
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	.loc 2 2743 0
 	mov	r0, r5
+.LVL184:
 	bl	NandcFlashCs
+.LVL185:
+	.loc 2 2744 0
 	ldr	r3, .L188+4
 	mov	r0, r5
 	ldr	r1, [r4, #4]
@@ -1251,26 +2169,46 @@ FlashWaitCmdDone:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL186:
 	mov	r1, r0
+.LVL187:
+	.loc 2 2745 0
 	mov	r0, r5
+.LVL188:
 	bl	NandcFlashDeCs
+.LVL189:
+	.loc 2 2749 0
 	ldr	r3, [r4, #8]
+	.loc 2 2747 0
 	sbfx	r1, r1, #0, #1
-	ldr	r2, [r4, #12]
+.LVL190:
+	.loc 2 2749 0
 	str	r1, [r3]
+	.loc 2 2750 0
 	movs	r3, #0
+	.loc 2 2751 0
+	ldr	r2, [r4, #12]
+	.loc 2 2750 0
 	str	r3, [r4, #8]
+	.loc 2 2751 0
 	cbz	r2, .L183
+	.loc 2 2752 0
 	str	r1, [r2]
+	.loc 2 2753 0
 	str	r3, [r4, #12]
+.LVL191:
 .L183:
+	.loc 2 2757 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
+.LVL192:
 .L189:
 	.align	2
 .L188:
 	.word	.LANCHOR23
 	.word	.LANCHOR17
+	.cfi_endproc
+.LFE257:
 	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
 	.section	.text.NandcDelayns,"ax",%progbits
 	.align	1
@@ -1281,12 +2219,24 @@ FlashWaitCmdDone:
 	.fpu softvfp
 	.type	NandcDelayns, %function
 NandcDelayns:
+.LFB276:
+	.loc 3 305 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL193:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 3 306 0
 	bl	udelay
+.LVL194:
+	.loc 3 308 0
 	movs	r0, #0
 	pop	{r3, pc}
+	.cfi_endproc
+.LFE276:
 	.size	NandcDelayns, .-NandcDelayns
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
@@ -1297,35 +2247,69 @@ NandcDelayns:
 	.fpu softvfp
 	.type	NandcWaitFlashReady, %function
 NandcWaitFlashReady:
+.LFB277:
+	.loc 3 311 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL195:
+	.loc 3 316 0
 	ldr	r3, .L196
+	.loc 3 311 0
 	push	{r0, r1, r2, r4, r5, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 316 0
 	ldr	r4, .L196+4
 	ldr	r5, [r3, r0, lsl #3]
+.LVL196:
 .L193:
+.LBB211:
+.LBB212:
+	.loc 3 306 0
 	movs	r0, #100
 	bl	udelay
+.LVL197:
+.LBE212:
+.LBE211:
+	.loc 3 322 0
 	ldr	r3, [r5]
 	str	r3, [sp, #4]
+	.loc 3 323 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #22
 	bmi	.L194
+.LVL198:
+	.loc 3 319 0 discriminator 2
 	subs	r4, r4, #1
+.LVL199:
 	bne	.L193
+	.loc 3 333 0
 	mov	r0, #-1
+.LVL200:
 .L191:
+	.loc 3 336 0
 	add	sp, sp, #12
+	.cfi_remember_state
+	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
+.LVL201:
 .L194:
+	.cfi_restore_state
+	.loc 3 318 0
 	movs	r0, #0
+	.loc 3 335 0
 	b	.L191
 .L197:
 	.align	2
 .L196:
 	.word	.LANCHOR6
 	.word	100000
+	.cfi_endproc
+.LFE277:
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
 	.section	.text.FlashReset,"ax",%progbits
 	.align	1
@@ -1336,27 +2320,70 @@ NandcWaitFlashReady:
 	.fpu softvfp
 	.type	FlashReset, %function
 FlashReset:
+.LFB207:
+	.loc 2 267 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL202:
+.LBB213:
+.LBB214:
+	.loc 3 123 0
 	ldr	r3, .L199
+.LBE214:
+.LBE213:
+	.loc 2 267 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 267 0
 	mov	r4, r0
+.LBB216:
+.LBB215:
+	.loc 3 123 0
 	ldr	r5, [r3, r0, lsl #3]
+.LVL203:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
+	.loc 3 126 0
 	ldrb	r6, [r3, #4]	@ zero_extendqisi2
+.LVL204:
+.LBE215:
+.LBE216:
+	.loc 2 271 0
 	bl	NandcFlashCs
+.LVL205:
+	.loc 2 272 0
 	movs	r3, #255
+	.loc 2 273 0
 	mov	r0, r4
+	.loc 2 272 0
 	add	r5, r5, r6, lsl #8
 	str	r3, [r5, #2056]
+	.loc 2 273 0
 	bl	NandcWaitFlashReady
+.LVL206:
+	.loc 2 274 0
 	mov	r0, r4
+	.loc 2 275 0
 	pop	{r4, r5, r6, lr}
+	.cfi_restore 14
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 2 274 0
 	b	NandcFlashDeCs
+.LVL207:
 .L200:
 	.align	2
 .L199:
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE207:
 	.size	FlashReset, .-FlashReset
 	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
@@ -1367,29 +2394,57 @@ FlashReset:
 	.fpu softvfp
 	.type	FlashEraseBlock, %function
 FlashEraseBlock:
+.LFB225:
+	.loc 2 589 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL208:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 589 0
 	mov	r4, r0
 	mov	r5, r1
 	mov	r6, r2
+	.loc 2 593 0
 	bl	NandcWaitFlashReady
+.LVL209:
+	.loc 2 594 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL210:
+	.loc 2 595 0
 	mov	r2, r6
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashEraseCmd
+.LVL211:
+	.loc 2 596 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL212:
+	.loc 2 597 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL213:
 	mov	r1, r0
+.LVL214:
+	.loc 2 598 0
 	mov	r0, r4
+.LVL215:
 	bl	NandcFlashDeCs
+.LVL216:
+	.loc 2 603 0
 	and	r0, r1, #1
+.LVL217:
 	pop	{r4, r5, r6, pc}
+	.cfi_endproc
+.LFE225:
 	.size	FlashEraseBlock, .-FlashEraseBlock
 	.section	.text.FlashSetInterfaceMode,"ax",%progbits
 	.align	1
@@ -1400,94 +2455,175 @@ FlashEraseBlock:
 	.fpu softvfp
 	.type	FlashSetInterfaceMode, %function
 FlashSetInterfaceMode:
+.LFB226:
+	.loc 2 606 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL218:
+	.loc 2 636 0
 	ldr	r3, .L230
+	.loc 2 645 0
 	mov	ip, #128
+	.loc 2 606 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 636 0
 	movs	r5, #0
+	.loc 2 637 0
 	movs	r7, #239
+	.loc 2 642 0
 	mov	lr, #1
+	.loc 2 643 0
 	mov	r8, #35
+	.loc 2 640 0
 	mov	r10, #32
+	.loc 2 636 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	and	r2, r3, #4
 	and	r3, r3, #1
 	str	r2, [sp]
+	.loc 2 648 0
 	mov	r2, r5
 	str	r3, [sp, #4]
+.LVL219:
 .L212:
+	.loc 2 613 0
 	ldr	r3, .L230+4
 	ldrb	r4, [r5, r3]	@ zero_extendqisi2
+.LVL220:
+	.loc 2 614 0
 	cmp	r4, #152
 	beq	.L203
+	.loc 2 614 0 is_stmt 0 discriminator 1
 	cmp	r4, #69
 	beq	.L203
+	.loc 2 614 0 discriminator 2
 	cmp	r4, #173
 	beq	.L203
+	.loc 2 614 0 discriminator 3
 	cmp	r4, #44
 	bne	.L204
 .L203:
+.LBB217:
+.LBB218:
+	.loc 3 123 0 is_stmt 1
 	ldr	r3, .L230+8
+.LBE218:
+.LBE217:
+	.loc 2 615 0
 	cmp	r0, #1
+.LBB220:
+.LBB219:
+	.loc 3 123 0
 	ldr	r1, [r5, r3]
+	.loc 3 124 0
 	add	r3, r3, r5
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LBE219:
+.LBE220:
+	.loc 2 615 0
 	bne	.L205
+	.loc 2 616 0
 	ldr	r6, [sp, #4]
 	cbz	r6, .L204
+	.loc 2 620 0
 	lsls	r3, r3, #8
+	.loc 2 621 0
 	cmp	r4, #173
+	.loc 2 620 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
+	.loc 2 621 0
 	bne	.L206
+	.loc 2 622 0
 	str	r0, [fp, #2052]
 .L229:
+	.loc 2 646 0
 	str	r2, [fp, #2048]
 	b	.L210
 .L206:
+	.loc 2 624 0
 	cmp	r4, #44
+	.loc 2 626 0
 	ittet	eq
 	moveq	r4, #5
+.LVL221:
+	.loc 2 625 0
 	streq	r0, [fp, #2052]
+	.loc 2 628 0
 	strne	ip, [fp, #2052]
+	.loc 2 626 0
 	streq	r4, [fp, #2048]
+	.loc 2 629 0
 	it	ne
 	strne	r0, [fp, #2048]
+.LVL222:
 .L210:
 	add	r3, r3, r1
+	.loc 2 648 0
 	str	r2, [r3, #2048]
+	.loc 2 649 0
 	str	r2, [r3, #2048]
+	.loc 2 650 0
 	str	r2, [r3, #2048]
 .L204:
 	adds	r5, r5, #8
+	.loc 2 611 0 discriminator 2
 	cmp	r5, #32
 	bne	.L212
+	.loc 2 680 0
 	movs	r0, #0
+.LVL223:
 	bl	NandcWaitFlashReady
+.LVL224:
+	.loc 2 682 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL225:
 .L205:
+	.cfi_restore_state
+	.loc 2 636 0
 	ldr	r6, [sp]
 	cmp	r6, #0
 	beq	.L204
+	.loc 2 637 0
 	lsls	r3, r3, #8
+	.loc 2 638 0
 	cmp	r4, #173
+	.loc 2 637 0
 	add	fp, r1, r3
 	str	r7, [fp, #2056]
+	.loc 2 638 0
 	bne	.L209
+	.loc 2 639 0
 	str	lr, [fp, #2052]
+	.loc 2 640 0
 	str	r10, [fp, #2048]
 	b	.L210
 .L209:
+	.loc 2 641 0
 	cmp	r4, #44
 	bne	.L211
+	.loc 2 642 0
 	str	lr, [fp, #2052]
+	.loc 2 643 0
 	str	r8, [fp, #2048]
 	b	.L210
 .L211:
+	.loc 2 645 0
 	str	ip, [fp, #2052]
 	b	.L229
 .L231:
@@ -1496,6 +2632,8 @@ FlashSetInterfaceMode:
 	.word	.LANCHOR24
 	.word	.LANCHOR22
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE226:
 	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
@@ -1506,48 +2644,99 @@ FlashSetInterfaceMode:
 	.fpu softvfp
 	.type	SandiskSetRRPara, %function
 SandiskSetRRPara:
+.LFB238:
+	.loc 2 1706 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL226:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 2 1709 0
 	movs	r3, #239
 	str	r3, [r0, #8]
+	.loc 2 1710 0
 	movs	r3, #17
+	.loc 2 1706 0
 	mov	r5, r0
 	mov	r4, r1
+	.loc 2 1710 0
 	str	r3, [r0, #4]
+.LVL227:
+.LBB221:
+.LBB222:
+	.loc 3 306 0
 	movs	r0, #200
+.LVL228:
 	bl	udelay
-	ldr	r3, .L238
+.LVL229:
+.LBE222:
+.LBE221:
+	.loc 2 1716 0
+	ldr	r6, .L238
 	add	r4, r4, r4, lsl #2
-	ldr	r6, .L238+4
+	.loc 2 1712 0
+	ldr	r1, .L238+4
 	movs	r2, #0
-	ldr	r7, .L238+8
-	ldrb	r1, [r3]	@ zero_extendqisi2
-	ldr	r3, .L238+12
-	ldrb	r0, [r3]	@ zero_extendqisi2
+	.loc 2 1713 0
+	ldr	r0, .L238+8
+	.loc 2 1714 0
+	ldr	r7, .L238+12
+.LVL230:
 .L233:
-	cmp	r2, r1
+	.loc 2 1712 0 discriminator 1
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cmp	r2, r3
 	bcc	.L236
+	.loc 2 1718 0
 	movs	r0, #0
+	.loc 2 1720 0
 	pop	{r3, r4, r5, r6, r7, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LVL231:
+	.loc 2 1718 0
 	b	NandcWaitFlashReady
+.LVL232:
 .L236:
-	adds	r3, r2, r4
-	cmp	r0, #67
+	.cfi_restore_state
+	.loc 2 1713 0
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r3, #67
+	add	r3, r2, r4
+	.loc 2 1714 0
 	ite	eq
 	addeq	r3, r3, r7
+	.loc 2 1716 0
 	addne	r3, r3, r6
 	ldrsb	r3, [r3, #5]
+	.loc 2 1712 0
 	adds	r2, r2, #1
+.LVL233:
+	.loc 2 1716 0
 	str	r3, [r5]
 	b	.L233
 .L239:
 	.align	2
 .L238:
-	.word	.LANCHOR13
 	.word	.LANCHOR11
-	.word	.LANCHOR9
+	.word	.LANCHOR13
 	.word	.LANCHOR10
+	.word	.LANCHOR9
+	.cfi_endproc
+.LFE238:
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
 	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
@@ -1558,23 +2747,48 @@ SandiskSetRRPara:
 	.fpu softvfp
 	.type	FlashEraseSLc2KBlocks, %function
 FlashEraseSLc2KBlocks:
+.LFB260:
+	.loc 2 2901 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL234:
 	push	{r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 28
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
 	mov	r7, r1
+	.loc 2 2911 0
 	ldr	r8, .L250+12
+	.loc 2 2901 0
 	sub	sp, sp, #20
+	.cfi_def_cfa_offset 48
 	mov	r5, r0
+	.loc 2 2909 0
 	movs	r6, #0
+	.loc 2 2915 0
 	ldr	r10, .L250+16
+.LVL235:
 .L241:
+	.loc 2 2909 0 discriminator 1
 	cmp	r6, r7
 	bne	.L246
+	.loc 2 2938 0
 	movs	r0, #0
 	add	sp, sp, #20
+	.cfi_remember_state
+	.cfi_def_cfa_offset 28
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, pc}
+.LVL236:
 .L246:
+	.cfi_restore_state
+	.loc 2 2910 0
 	subs	r3, r7, r6
 	add	r2, sp, #8
 	uxtb	r3, r3
@@ -1583,61 +2797,99 @@ FlashEraseSLc2KBlocks:
 	str	r3, [sp]
 	add	r3, sp, #12
 	bl	LogAddr2PhyAddr
+.LVL237:
+	.loc 2 2911 0
 	ldr	r3, [sp, #12]
 	ldrb	r2, [r8]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L242
+	.loc 2 2912 0
 	mov	r3, #-1
 	str	r3, [r5]
 .L243:
+	.loc 2 2909 0 discriminator 2
 	adds	r6, r6, #1
+.LVL238:
 	adds	r5, r5, #36
 	b	.L241
 .L242:
+	.loc 2 2915 0
 	ldrb	r4, [r10, r3]	@ zero_extendqisi2
+.LVL239:
+	.loc 2 2916 0
 	lsls	r3, r3, #4
 	ldr	r2, .L250
+	.loc 2 2917 0
 	mov	r0, r4
+	.loc 2 2916 0
 	strb	r4, [r2, r3]
+	.loc 2 2917 0
 	bl	NandcWaitFlashReady
+.LVL240:
+	.loc 2 2918 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL241:
+	.loc 2 2919 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashEraseCmd
+.LVL242:
+	.loc 2 2920 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL243:
+	.loc 2 2921 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL244:
+	.loc 2 2927 0
 	ldr	r3, .L250+4
+	.loc 2 2923 0
 	sbfx	r0, r0, #0, #1
+.LVL245:
+	.loc 2 2925 0
 	str	r0, [r5]
+	.loc 2 2927 0
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashEraseCmd
+.LVL246:
+	.loc 2 2928 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL247:
+	.loc 2 2929 0
 	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL248:
+	.loc 2 2931 0
 	lsls	r3, r0, #31
+	.loc 2 2932 0
 	itt	mi
 	movmi	r3, #-1
 	strmi	r3, [r5]
+	.loc 2 2933 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L245
+	.loc 2 2934 0
 	ldr	r1, [sp, #8]
 	ldr	r0, .L250+8
+.LVL249:
 	bl	printf
+.LVL250:
 .L245:
+	.loc 2 2935 0
 	mov	r0, r4
 	bl	NandcFlashDeCs
+.LVL251:
 	b	.L243
 .L251:
 	.align	2
@@ -1647,6 +2899,8 @@ FlashEraseSLc2KBlocks:
 	.word	.LC1
 	.word	.LANCHOR25
 	.word	.LANCHOR26
+	.cfi_endproc
+.LFE260:
 	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
 	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
@@ -1657,38 +2911,82 @@ FlashEraseSLc2KBlocks:
 	.fpu softvfp
 	.type	FlashEraseBlocks, %function
 FlashEraseBlocks:
+.LFB263:
+	.loc 2 3223 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L279
+.LVL252:
+	.loc 2 3233 0
+	ldr	r3, .L283
+	.loc 2 3223 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r8, r0
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 3223 0
 	mov	fp, r1
 	mov	r7, r2
+	.loc 2 3233 0
 	ldrb	r4, [r3]	@ zero_extendqisi2
 	cbnz	r4, .L253
-	ldr	r10, .L279+8
+	.loc 2 3244 0 discriminator 1
+	ldr	r10, .L283+8
+.LVL253:
 .L254:
+	.loc 2 3236 0 discriminator 1
 	cmp	r4, r7
 	bcc	.L263
-	ldr	r5, .L279+4
+	.loc 2 3273 0 discriminator 1
+	ldr	r5, .L283+4
 	movs	r4, #0
-	ldr	r6, .L279+8
+.LVL254:
+	.loc 2 3274 0 discriminator 1
+	ldr	r6, .L283+8
 .L264:
-	ldr	r3, .L279+12
+.LVL255:
+	.loc 2 3271 0 discriminator 1
+	ldr	r3, .L283+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
 	bcc	.L266
+	.loc 2 3278 0
+	ldr	r3, .L283+16
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L267
+.LVL256:
+.L268:
+	.loc 2 3283 0
 	movs	r0, #0
 	b	.L252
+.LVL257:
 .L253:
+	.loc 2 3234 0
 	mov	r1, r2
+.LVL258:
 	bl	FlashEraseSLc2KBlocks
+.LVL259:
 .L252:
+	.loc 2 3284 0
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL260:
 .L263:
+	.cfi_restore_state
+	.loc 2 3237 0
 	movs	r5, #36
 	add	r2, sp, #16
 	muls	r5, r4, r5
@@ -1701,99 +2999,180 @@ FlashEraseBlocks:
 	str	r3, [sp]
 	add	r3, sp, #20
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L279+12
+.LVL261:
+	.loc 2 3238 0
+	ldr	r3, .L283+12
+	.loc 2 3237 0
 	mov	r6, r0
+.LVL262:
+	.loc 2 3238 0
 	ldr	r0, [sp, #20]
+.LVL263:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L256
+	.loc 2 3239 0
 	mov	r3, #-1
 	str	r3, [r8, r5]
 .L257:
+	.loc 2 3236 0 discriminator 2
 	adds	r4, r4, #1
+.LVL264:
 	b	.L254
 .L256:
-	ldr	r3, .L279+16
+	.loc 2 3242 0
+	ldr	r3, .L283+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 3243 0
 	cmp	r3, #0
+	.loc 2 3244 0
 	add	r3, r10, r0, lsl #4
+	.loc 2 3243 0
 	it	eq
 	moveq	r6, #0
+.LVL265:
+	.loc 2 3244 0
 	ldr	r3, [r3, #8]
 	cbz	r3, .L259
+	.loc 2 3245 0
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
+.LVL266:
 .L259:
+	.loc 2 3246 0
 	ldr	r1, [sp, #20]
 	ldr	r0, [sp, #12]
 	lsls	r2, r1, #4
 	add	r3, r10, r2
 	str	r0, [r3, #8]
+	.loc 2 3247 0
 	movs	r0, #0
 	str	r0, [r3, #12]
+	.loc 2 3248 0
 	ldr	r0, [sp, #16]
 	str	r0, [r3, #4]
+	.loc 2 3249 0
 	cbz	r6, .L260
+	.loc 2 3250 0
 	adds	r5, r5, #36
 	add	r5, r5, r8
 	str	r5, [r3, #12]
 .L260:
-	ldr	r3, .L279+20
+	.loc 2 3252 0
+	ldr	r3, .L283+24
 	ldrb	r5, [r3, r1]	@ zero_extendqisi2
+.LVL267:
+	.loc 2 3254 0
 	mov	r0, r5
+	.loc 2 3253 0
 	strb	r5, [r10, r2]
+	.loc 2 3254 0
 	bl	NandcFlashCs
+.LVL268:
+	.loc 2 3255 0
 	cmp	fp, #1
+	.loc 2 3256 0
 	mov	r0, r5
+	.loc 2 3255 0
 	bne	.L261
-	ldr	r3, .L279+4
+	.loc 2 3255 0 is_stmt 0 discriminator 1
+	ldr	r3, .L283+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L261
+	.loc 2 3256 0 is_stmt 1
 	bl	flash_enter_slc_mode
+.LVL269:
 .L262:
-	ldr	r3, .L279+24
+	.loc 2 3260 0
+	ldr	r3, .L283+28
 	mov	r0, r5
 	ldr	r2, [sp, #20]
+	.loc 2 3263 0
 	add	r4, r4, r6
+.LVL270:
+	.loc 2 3260 0
 	ldr	r1, [sp, #16]
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL271:
+	.loc 2 3261 0
 	mov	r2, r6
 	ldr	r1, [sp, #16]
 	mov	r0, r5
 	bl	FlashEraseCmd
+.LVL272:
+	.loc 2 3262 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
+.LVL273:
 	b	.L257
 .L261:
+	.loc 2 3258 0
 	bl	flash_exit_slc_mode
+.LVL274:
 	b	.L262
+.LVL275:
 .L266:
+	.loc 2 3272 0
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
+.LVL276:
+	.loc 2 3273 0
 	cmp	fp, #1
 	bne	.L265
+	.loc 2 3273 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r5]	@ zero_extendqisi2
 	cbz	r3, .L265
+	.loc 2 3274 0 is_stmt 1
 	lsls	r3, r4, #4
 	ldrb	r0, [r6, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
+.LVL277:
 .L265:
+	.loc 2 3271 0 discriminator 2
 	adds	r4, r4, #1
+.LVL278:
 	b	.L264
-.L280:
+.L267:
+	.loc 2 3278 0 discriminator 1
+	ldr	r3, .L283+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #69
+	bne	.L268
+	movs	r3, #0
+	.loc 2 3280 0 discriminator 1
+	movs	r2, #36
+	mov	r1, r3
+.LVL279:
+.L269:
+	.loc 2 3279 0 discriminator 1
+	cmp	r3, r7
+	beq	.L268
+	.loc 2 3280 0 discriminator 3
+	mul	r0, r2, r3
+	.loc 2 3279 0 discriminator 3
+	adds	r3, r3, #1
+.LVL280:
+	.loc 2 3280 0 discriminator 3
+	str	r1, [r8, r0]
+	b	.L269
+.L284:
 	.align	2
-.L279:
+.L283:
 	.word	.LANCHOR1
 	.word	.LANCHOR8
 	.word	.LANCHOR23
 	.word	.LANCHOR25
+	.word	.LANCHOR28
 	.word	.LANCHOR27
 	.word	.LANCHOR26
 	.word	.LANCHOR17
+	.word	.LANCHOR22
+	.cfi_endproc
+.LFE263:
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",%progbits
 	.align	1
@@ -1804,63 +3183,140 @@ FlashEraseBlocks:
 	.fpu softvfp
 	.type	FlashReadDpCmd, %function
 FlashReadDpCmd:
+.LFB213:
+	.loc 2 364 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL281:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 364 0
 	mov	r5, r2
-	ldr	r3, .L285
+.LBB223:
+.LBB224:
+	.loc 3 123 0
+	ldr	r3, .L289
+.LBE224:
+.LBE223:
+	.loc 2 364 0
 	mov	r6, r1
 	uxtb	lr, r1
 	mov	r7, r0
 	lsrs	r1, r1, #8
+.LVL282:
 	uxtb	r8, r5
+.LBB226:
+.LBB225:
+	.loc 3 123 0
 	ldr	r10, [r3, r0, lsl #3]
+.LVL283:
+	.loc 3 124 0
 	add	r3, r3, r0, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L285+4
+.LVL284:
+.LBE225:
+.LBE226:
+	.loc 2 368 0
+	ldr	r3, .L289+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
+.LVL285:
 	lsls	r4, r4, #8
 	ldrb	ip, [r3, #8]	@ zero_extendqisi2
+	.loc 2 369 0
 	add	r4, r4, r10
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	.loc 2 368 0
 	cmp	r2, #1
 	lsr	r2, r6, #16
+	.loc 2 369 0
 	str	ip, [r4, #2056]
-	bne	.L282
+	.loc 2 368 0
+	bne	.L286
+	.loc 2 370 0
 	mov	r10, #0
 	str	r10, [r4, #2052]
+	.loc 2 371 0
 	str	r10, [r4, #2052]
+	.loc 2 372 0
 	str	lr, [r4, #2052]
+	.loc 2 373 0
 	str	r1, [r4, #2052]
+	.loc 2 374 0
 	str	r2, [r4, #2052]
+	.loc 2 375 0
 	str	r3, [r4, #2056]
+	.loc 2 376 0
 	bl	NandcWaitFlashReady
+.LVL286:
+	.loc 2 377 0
 	str	r10, [r4, #2056]
+	.loc 2 378 0
 	str	r10, [r4, #2052]
+	.loc 2 379 0
 	str	r10, [r4, #2052]
-.L284:
+.L288:
+	.loc 2 391 0
 	lsrs	r3, r5, #8
+	.loc 2 392 0
 	lsrs	r5, r5, #16
+.LVL287:
+	.loc 2 390 0
 	str	r8, [r4, #2052]
+	.loc 2 391 0
 	str	r3, [r4, #2052]
+	.loc 2 393 0
 	movs	r3, #48
+	.loc 2 392 0
 	str	r5, [r4, #2052]
+	.loc 2 395 0
 	mov	r1, r6
+	.loc 2 393 0
 	str	r3, [r4, #2056]
+	.loc 2 395 0
 	mov	r0, r7
+	.loc 2 396 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LVL288:
+	.loc 2 395 0
 	b	FlashSetRandomizer
-.L282:
+.LVL289:
+.L286:
+	.cfi_restore_state
+	.loc 2 386 0
 	str	lr, [r4, #2052]
+	.loc 2 387 0
 	str	r1, [r4, #2052]
+	.loc 2 388 0
 	str	r2, [r4, #2052]
+	.loc 2 389 0
 	str	r3, [r4, #2056]
-	b	.L284
-.L286:
+	b	.L288
+.L290:
 	.align	2
-.L285:
+.L289:
 	.word	.LANCHOR6
 	.word	.LANCHOR7
+	.cfi_endproc
+.LFE213:
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
 	.align	1
@@ -1871,37 +3327,70 @@ FlashReadDpCmd:
 	.fpu softvfp
 	.type	FlashDeInit, %function
 FlashDeInit:
+.LFB253:
+	.loc 2 2656 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 2657 0
 	movs	r0, #0
-	ldr	r4, .L295
+	.loc 2 2659 0
+	ldr	r4, .L299
+	.loc 2 2657 0
 	bl	NandcWaitFlashReady
+.LVL290:
+	.loc 2 2658 0
 	bl	FlashSetReadRetryDefault
+.LVL291:
+	.loc 2 2659 0
 	ldrb	r3, [r4]	@ zero_extendqisi2
-	cbz	r3, .L288
-	ldr	r3, .L295+4
+	cbz	r3, .L292
+	.loc 2 2659 0 is_stmt 0 discriminator 1
+	ldr	r3, .L299+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L288
+	bpl	.L292
+	.loc 2 2660 0 is_stmt 1
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
+.LVL292:
+	.loc 2 2661 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL293:
+	.loc 2 2662 0
 	movs	r3, #0
 	strb	r3, [r4]
-.L288:
-	ldr	r3, .L295+8
+.L292:
+.LVL294:
+.LBB227:
+.LBB228:
+	.loc 3 343 0
+	ldr	r3, .L299+8
+	.loc 3 344 0
 	movs	r0, #0
+	.loc 3 343 0
 	ldr	r3, [r3]
+.LVL295:
+	.loc 3 344 0
 	str	r0, [r3, #336]
+.LVL296:
+.LBE228:
+.LBE227:
+	.loc 2 2666 0
 	pop	{r4, pc}
-.L296:
+.L300:
 	.align	2
-.L295:
-	.word	.LANCHOR28
+.L299:
+	.word	.LANCHOR29
 	.word	.LANCHOR24
 	.word	.LANCHOR6
+	.cfi_endproc
+.LFE253:
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
@@ -1912,17 +3401,28 @@ FlashDeInit:
 	.fpu softvfp
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
+.LFB278:
+	.loc 3 339 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L298
+.LVL297:
+.LBB229:
+	.loc 3 343 0
+	ldr	r3, .L302
 	ldr	r3, [r3, r0, lsl #3]
+.LVL298:
+	.loc 3 344 0
 	str	r1, [r3, #336]
 	bx	lr
-.L299:
+.L303:
 	.align	2
-.L298:
+.L302:
 	.word	.LANCHOR6
+.LBE229:
+	.cfi_endproc
+.LFE278:
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
@@ -1933,27 +3433,46 @@ NandcRandmzSel:
 	.fpu softvfp
 	.type	NandcTimeCfg, %function
 NandcTimeCfg:
+.LFB279:
+	.loc 3 349 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L305
+.LVL299:
+	ldr	r3, .L309
+	.loc 3 369 0
 	cmp	r0, #35
+	.loc 3 371 0
 	ldr	r3, [r3]
-	bhi	.L301
+	.loc 3 369 0
+	bhi	.L305
+	.loc 3 371 0
 	movw	r2, #4193
-.L304:
+.L308:
+.LBB232:
+.LBB233:
+	.loc 3 379 0
 	str	r2, [r3, #4]
 	bx	lr
-.L301:
+.L305:
+.LVL300:
+	.loc 3 373 0
 	cmp	r0, #99
+	.loc 3 375 0
 	ite	hi
 	movwhi	r2, #8322
+	.loc 3 379 0
 	movwls	r2, #4225
-	b	.L304
-.L306:
+	b	.L308
+.L310:
 	.align	2
-.L305:
+.L309:
 	.word	.LANCHOR19
+.LBE233:
+.LBE232:
+	.cfi_endproc
+.LFE279:
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
 	.align	1
@@ -1964,16 +3483,25 @@ NandcTimeCfg:
 	.fpu softvfp
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
+.LFB210:
+	.loc 2 308 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L308
+.LVL301:
+	.loc 2 318 0
+	ldr	r3, .L312
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
+.LVL302:
 	b	NandcTimeCfg
-.L309:
+.LVL303:
+.L313:
 	.align	2
-.L308:
-	.word	.LANCHOR29
+.L312:
+	.word	.LANCHOR30
+	.cfi_endproc
+.LFE210:
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
 	.align	1
@@ -1984,44 +3512,83 @@ FlashTimingCfg:
 	.fpu softvfp
 	.type	NandcBchSel, %function
 NandcBchSel:
+.LFB280:
+	.loc 3 400 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L318
+.LVL304:
+	.loc 3 405 0
+	ldr	r3, .L322
+	.loc 3 404 0
 	movs	r1, #0
+.LVL305:
+	.loc 3 400 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 408 0
 	movs	r4, #16
+	.loc 3 411 0
 	cmp	r0, r4
+	.loc 3 405 0
 	ldr	r2, [r3]
 	mov	r3, #1
+.LVL306:
 	str	r3, [r2, #8]
-	ldr	r3, .L318+4
+	.loc 3 406 0
+	ldr	r3, .L322+4
+.LVL307:
 	str	r0, [r3]
+.LVL308:
+	.loc 3 407 0
 	mov	r3, r1
+.LVL309:
+	.loc 3 408 0
 	bfi	r3, r4, #8, #8
+.LVL310:
+	.loc 3 410 0
 	bfi	r3, r1, #18, #1
-	bne	.L311
-.L314:
+	.loc 3 411 0
+	bne	.L315
+.L318:
+	.loc 3 412 0
 	bfc	r3, #4, #1
-.L312:
+.L316:
+	.loc 3 422 0
 	orr	r3, r3, #1
+.LVL311:
+	.loc 3 424 0
 	str	r3, [r2, #12]
 	pop	{r4, pc}
-.L311:
+.L315:
+	.loc 3 413 0
 	cmp	r0, #24
-	bne	.L313
+	bne	.L317
+	.loc 3 414 0
 	orr	r3, r3, #16
-	b	.L312
-.L313:
+.LVL312:
+	b	.L316
+.LVL313:
+.L317:
+	.loc 3 419 0
 	cmp	r0, #40
+	.loc 3 418 0
 	orr	r3, r3, #262144
+.LVL314:
 	orr	r3, r3, #16
-	bne	.L312
-	b	.L314
-.L319:
+.LVL315:
+	.loc 3 419 0
+	bne	.L316
+	b	.L318
+.L323:
 	.align	2
-.L318:
+.L322:
 	.word	.LANCHOR19
-	.word	.LANCHOR30
+	.word	.LANCHOR31
+	.cfi_endproc
+.LFE280:
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",%progbits
 	.align	1
@@ -2032,16 +3599,25 @@ NandcBchSel:
 	.fpu softvfp
 	.type	FlashBchSel, %function
 FlashBchSel:
+.LFB209:
+	.loc 2 302 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L321
+.LVL316:
+	.loc 2 303 0
+	ldr	r3, .L325
 	strb	r0, [r3]
+	.loc 2 304 0
 	b	NandcBchSel
-.L322:
+.LVL317:
+.L326:
 	.align	2
-.L321:
-	.word	.LANCHOR31
+.L325:
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE209:
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
 	.align	1
@@ -2052,10 +3628,14 @@ FlashBchSel:
 	.fpu softvfp
 	.type	NandCIrqEnable, %function
 NandCIrqEnable:
+.LFB546:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE546:
 	.size	NandCIrqEnable, .-NandCIrqEnable
 	.section	.text.NandCIrqDisable,"ax",%progbits
 	.align	1
@@ -2066,10 +3646,16 @@ NandCIrqEnable:
 	.fpu softvfp
 	.type	NandCIrqDisable, %function
 NandCIrqDisable:
+.LFB282:
+	.loc 3 444 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL318:
 	bx	lr
+	.cfi_endproc
+.LFE282:
 	.size	NandCIrqDisable, .-NandCIrqDisable
 	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
 	.align	1
@@ -2080,11 +3666,20 @@ NandCIrqDisable:
 	.fpu softvfp
 	.type	rk_nandc_get_irq_status, %function
 rk_nandc_get_irq_status:
+.LFB283:
+	.loc 3 452 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL319:
+	.loc 3 454 0
 	ldr	r0, [r0, #372]
+.LVL320:
+	.loc 3 455 0
 	bx	lr
+	.cfi_endproc
+.LFE283:
 	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
@@ -2095,10 +3690,14 @@ rk_nandc_get_irq_status:
 	.fpu softvfp
 	.type	rk_nandc_flash_ready, %function
 rk_nandc_flash_ready:
+.LFB542:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE542:
 	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
 	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
 	.align	1
@@ -2109,10 +3708,14 @@ rk_nandc_flash_ready:
 	.fpu softvfp
 	.type	NandcIqrWaitFlashReady, %function
 NandcIqrWaitFlashReady:
+.LFB540:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE540:
 	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
@@ -2123,10 +3726,16 @@ NandcIqrWaitFlashReady:
 	.fpu softvfp
 	.type	rk_nandc_flash_xfer_completed, %function
 rk_nandc_flash_xfer_completed:
+.LFB286:
+	.loc 3 482 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL321:
 	bx	lr
+	.cfi_endproc
+.LFE286:
 	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
 	.section	.text.NandcSendDumpDataStart,"ax",%progbits
 	.align	1
@@ -2137,28 +3746,51 @@ rk_nandc_flash_xfer_completed:
 	.fpu softvfp
 	.type	NandcSendDumpDataStart, %function
 NandcSendDumpDataStart:
+.LFB287:
+	.loc 3 490 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL322:
+	.loc 3 503 0
 	ldr	r2, [r0, #16]
+	.loc 3 490 0
 	sub	sp, sp, #8
-	ldr	r3, .L330
+	.cfi_def_cfa_offset 8
+	.loc 3 501 0
+	ldr	r3, .L334
+.LVL323:
+	.loc 3 503 0
 	str	r2, [sp, #4]
+	.loc 3 504 0
 	ldr	r2, [sp, #4]
+.LVL324:
 	bfc	r2, #2, #1
 	str	r2, [sp, #4]
+	.loc 3 505 0
 	ldr	r2, [sp, #4]
+.LVL325:
 	str	r2, [r0, #16]
+.LVL326:
+	.loc 3 507 0
 	str	r3, [r0, #8]
+	.loc 3 508 0
 	orr	r3, r3, #4
+.LVL327:
+	.loc 3 509 0
 	str	r3, [r0, #8]
+	.loc 3 510 0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
-.L331:
+.L335:
 	.align	2
-.L330:
+.L334:
 	.word	538969130
+	.cfi_endproc
+.LFE287:
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
 	.align	1
@@ -2169,19 +3801,30 @@ NandcSendDumpDataStart:
 	.fpu softvfp
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
+.LFB288:
+	.loc 3 513 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL328:
 	sub	sp, sp, #8
-.L333:
+	.cfi_def_cfa_offset 8
+.L337:
+	.loc 3 517 0 discriminator 1
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
+	.loc 3 518 0 discriminator 1
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #11
-	bpl	.L333
+	bpl	.L337
+	.loc 3 519 0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 0
 	@ sp needed
 	bx	lr
+	.cfi_endproc
+.LFE288:
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
 	.section	.text.NandcXferStart,"ax",%progbits
 	.align	1
@@ -2192,166 +3835,304 @@ NandcSendDumpDataDone:
 	.fpu softvfp
 	.type	NandcXferStart, %function
 NandcXferStart:
+.LFB289:
+	.loc 3 521 0
+	.cfi_startproc
 	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL329:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #24
-	mov	r7, r1
+	.cfi_def_cfa_offset 56
+	.loc 3 521 0
+	mov	r6, r1
+	.loc 3 524 0
 	ldr	r1, [sp, #60]
+.LVL330:
+	.loc 3 521 0
 	str	r2, [sp, #4]
-	ldr	fp, [sp, #56]
+	ldr	r8, [sp, #56]
+	.loc 3 524 0
 	cmp	r1, #0
-	bne	.L350
-	adds	r5, fp, #0
+	bne	.L354
+	.loc 3 524 0 is_stmt 0 discriminator 2
+	adds	ip, r8, #0
 	it	ne
-	movne	r5, #1
-.L337:
-	ldr	r1, .L355
+	movne	ip, #1
+.L341:
+.LVL331:
+	.loc 3 528 0 is_stmt 1 discriminator 6
+	ldr	r1, .L359
+	.loc 3 531 0 discriminator 6
 	movs	r4, #0
-	ldr	r6, [r1, r0, lsl #3]
+.LVL332:
+	.loc 3 528 0 discriminator 6
+	ldr	r5, [r1, r0, lsl #3]
+.LVL333:
+	.loc 3 529 0 discriminator 6
 	add	r1, r1, r0, lsl #3
+	.loc 3 534 0 discriminator 6
 	movs	r0, #16
-	ldr	r8, [r6, #12]
+.LVL334:
+	.loc 3 532 0 discriminator 6
+	ldr	r7, [r5, #12]
+.LVL335:
+	.loc 3 529 0 discriminator 6
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-	bfi	r8, r0, #8, #8
-	bfi	r8, r4, #3, #1
-	bfi	r4, r7, #1, #1
-	bfi	r8, r1, #5, #3
+.LVL336:
+	.loc 3 534 0 discriminator 6
+	bfi	r7, r0, #8, #8
+.LVL337:
+	.loc 3 536 0 discriminator 6
+	bfi	r7, r4, #3, #1
+	.loc 3 541 0 discriminator 6
+	bfi	r4, r6, #1, #1
+	.loc 3 538 0 discriminator 6
+	bfi	r7, r1, #5, #3
+	.loc 3 543 0 discriminator 6
 	orr	r4, r4, #8
+.LVL338:
+	.loc 3 544 0 discriminator 6
 	movs	r1, #1
+.LVL339:
 	bfi	r4, r1, #5, #2
+.LVL340:
+	.loc 3 547 0 discriminator 6
 	lsrs	r3, r3, r1
+.LVL341:
+	.loc 3 546 0 discriminator 6
 	orr	r4, r4, #536870912
+.LVL342:
 	orr	r4, r4, #1024
+.LVL343:
+	.loc 3 547 0 discriminator 6
 	bfi	r4, r3, #4, #1
-	ldr	r3, .L355+4
+.LVL344:
+	.loc 3 549 0 discriminator 6
+	ldr	r3, .L359+4
 	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L338
-	ldr	r3, [r6, #16]
+	bls	.L342
+.LVL345:
+.LBB234:
+	.loc 3 555 0
+	ldr	r3, [r5, #16]
 	str	r3, [sp, #20]
+	.loc 3 556 0
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
-	cmp	r5, #0
-	beq	.L339
-	ldr	r5, .L355+8
-	cmp	r7, #0
-	bne	.L340
-.L348:
+	.loc 3 558 0
+	cmp	ip, #0
+	beq	.L343
+	.loc 3 560 0
+	cmp	r6, #0
+	bne	.L344
+.LVL346:
+.L352:
+	.loc 3 583 0
 	ldr	r2, [sp, #4]
+	ldr	r10, .L359+12
 	adds	r2, r2, #1
 	asrs	r2, r2, #1
 	bfi	r4, r2, #22, #6
-	cmp	fp, #0
-	beq	.L341
-	mov	r0, fp
-.L342:
-	ldr	r3, [r5, #4]
-	ubfx	r10, r4, #22, #5
-	add	r1, r0, r10, lsl #10
-	str	r0, [r5, #8]
-	str	r0, [r5, #16]
-	clz	r7, r7
-	str	r3, [r5, #12]
-	lsrs	r7, r7, #5
-	str	r3, [r5, #20]
+	.loc 3 584 0
+	cmp	r8, #0
+	beq	.L345
+	mov	r0, r8
+.L346:
+	.loc 3 585 0 discriminator 4
+	ldr	r3, [r10, #4]
+	.loc 3 608 0 discriminator 4
+	add	r1, r0, #63
+	ubfx	fp, r4, #22, #5
+	bic	r1, r1, #63
+	.loc 3 584 0 discriminator 4
+	str	r0, [r10, #8]
+	.loc 3 608 0 discriminator 4
+	add	r1, r1, fp, lsl #10
+	.loc 3 604 0 discriminator 4
+	str	r0, [r10, #16]
+	.loc 3 608 0 discriminator 4
+	bic	r0, r0, #63
+	.loc 3 585 0 discriminator 4
+	str	r3, [r10, #12]
+	.loc 3 623 0 discriminator 4
+	clz	r6, r6
+	.loc 3 605 0 discriminator 4
+	str	r3, [r10, #20]
+	.loc 3 623 0 discriminator 4
+	lsrs	r6, r6, #5
+	.loc 3 608 0 discriminator 4
 	bl	flush_dcache_range
-	ldr	r0, [r5, #12]
-	add	r1, r0, r10, lsl #7
+.LVL347:
+	.loc 3 609 0 discriminator 4
+	ldr	r0, [r10, #20]
+.LVL348:
+	.loc 3 610 0 discriminator 4
+	add	r1, r0, #63
+	bic	r0, r0, #63
+.LVL349:
+	bic	r1, r1, #63
+	add	r1, r1, fp, lsl #7
 	bl	flush_dcache_range
+.LVL350:
+	.loc 3 614 0 discriminator 4
 	movs	r3, #1
+	.loc 3 618 0 discriminator 4
 	movs	r2, #16
+	.loc 3 614 0 discriminator 4
+	str	r3, [r10, #24]
+	.loc 3 620 0 discriminator 4
+	tst	r8, #3
+	.loc 3 615 0 discriminator 4
+	ldr	r3, [r10, #16]
+	str	r3, [r5, #20]
+	.loc 3 616 0 discriminator 4
+	ldr	r3, [r10, #20]
 	str	r3, [r5, #24]
-	tst	fp, #3
-	ldr	r3, [r5, #16]
-	str	r3, [r6, #20]
-	ldr	r3, [r5, #20]
-	str	r3, [r6, #24]
+	.loc 3 617 0 discriminator 4
 	mov	r3, #0
 	str	r3, [sp, #20]
+	.loc 3 618 0 discriminator 4
 	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
+	.loc 3 621 0 discriminator 4
 	it	eq
 	moveq	r2, #2
+	.loc 3 618 0 discriminator 4
 	str	r3, [sp, #20]
+	.loc 3 619 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
 	str	r3, [sp, #20]
+	.loc 3 621 0 discriminator 4
 	ittt	eq
 	ldreq	r3, [sp, #20]
 	bfieq	r3, r2, #3, #3
 	streq	r3, [sp, #20]
+	.loc 3 622 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #4
 	str	r3, [sp, #20]
+	.loc 3 623 0 discriminator 4
 	ldr	r3, [sp, #20]
-	bfi	r3, r7, #1, #1
+	bfi	r3, r6, #1, #1
 	str	r3, [sp, #20]
+	.loc 3 624 0 discriminator 4
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L339:
+.L343:
+	.loc 3 627 0
 	ldr	r3, [sp, #20]
-	str	r3, [r6, #16]
-.L338:
-	str	r8, [r6, #12]
-	str	r4, [r6, #8]
+	str	r3, [r5, #16]
+.L342:
+.LBE234:
+	.loc 3 629 0
+	str	r7, [r5, #12]
+	.loc 3 630 0
+	str	r4, [r5, #8]
+	.loc 3 631 0
 	orr	r4, r4, #4
-	str	r4, [r6, #8]
+.LVL351:
+	.loc 3 632 0
+	str	r4, [r5, #8]
+	.loc 3 633 0
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L350:
-	movs	r5, #1
-	b	.L337
-.L340:
-	ldr	r3, .L355+12
-	movs	r1, #0
-	ldr	lr, [r5, #4]
-	mov	r0, r1
+.LVL352:
+.L354:
+	.cfi_restore_state
+	mov	ip, #1
+	b	.L341
+.LVL353:
+.L344:
+.LBB236:
+.LBB235:
+	.loc 3 562 0
+	ldr	r3, .L359+8
+	.loc 3 563 0
+	ldr	r0, [sp, #60]
+	ldr	r10, .L359+12
+	.loc 3 562 0
 	ldr	r3, [r3]
 	cmp	r3, #25
 	ite	cc
 	movcc	r3, #64
 	movcs	r3, #128
 	str	r3, [sp, #8]
+.LVL354:
+	.loc 3 563 0
 	ldr	r3, [sp, #4]
+.LVL355:
 	lsrs	r3, r3, #1
 	str	r3, [sp, #12]
-	ldr	r3, [sp, #60]
-.L344:
+	movs	r3, #0
+	mov	ip, r3
+.LVL356:
+.L348:
+	.loc 3 563 0 is_stmt 0 discriminator 1
 	ldr	r2, [sp, #12]
-	cmp	r0, r2
-	bcs	.L348
-	ldr	r2, [sp, #60]
-	bic	r10, r1, #3
-	cbz	r2, .L345
-	ldrh	ip, [r3]
-	adds	r3, r3, #4
-	ldrh	r2, [r3, #-2]
-	orr	ip, ip, r2, lsl #16
-	str	ip, [lr, r10]
-.L346:
+	cmp	ip, r2
+	bcs	.L352
+	.loc 3 565 0 is_stmt 1
+	ldr	r1, [sp, #60]
+	cbz	r1, .L349
+	.loc 3 567 0
+	ldrh	fp, [r0]
+	.loc 3 568 0
+	adds	r0, r0, #4
+.LVL357:
+	.loc 3 567 0
+	ldrh	r1, [r0, #-2]
+.LVL358:
+	bic	lr, r3, #3
+	ldr	r2, [r10, #4]
+	orr	r1, fp, r1, lsl #16
+	str	r1, [r2, lr]
+.L350:
 	ldr	r2, [sp, #8]
-	adds	r0, r0, #1
-	add	r1, r1, r2
-	b	.L344
-.L345:
+	.loc 3 563 0 discriminator 2
+	add	ip, ip, #1
+.LVL359:
+	add	r3, r3, r2
+	b	.L348
+.L349:
+	.loc 3 571 0
+	ldr	r1, [r10, #4]
+	bic	lr, r3, #3
 	mov	r2, #-1
-	str	r2, [lr, r10]
+	str	r2, [r1, lr]
+	b	.L350
+.LVL360:
+.L345:
+.LBE235:
+	.loc 3 584 0 discriminator 1
+	ldr	r0, [r10]
 	b	.L346
-.L341:
-	ldr	r3, .L355+8
-	ldr	r0, [r3]
-	b	.L342
-.L356:
+.L360:
 	.align	2
-.L355:
+.L359:
 	.word	.LANCHOR6
-	.word	.LANCHOR32
 	.word	.LANCHOR33
-	.word	.LANCHOR30
+	.word	.LANCHOR31
+	.word	.LANCHOR34
+.LBE236:
+	.cfi_endproc
+.LFE289:
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",%progbits
 	.align	1
@@ -2362,95 +4143,130 @@ NandcXferStart:
 	.fpu softvfp
 	.type	NandcXferComp, %function
 NandcXferComp:
+.LFB290:
+	.loc 3 636 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L387
+.LVL361:
+	.loc 3 645 0
+	ldr	r3, .L389
+	.loc 3 636 0
 	push	{r0, r1, r4, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 3 645 0
 	ldr	r1, [r3, r0, lsl #3]
-	ldr	r3, .L387+4
+.LVL362:
+	.loc 3 648 0
+	ldr	r3, .L389+4
 	ldr	r0, [r3]
+.LVL363:
 	cmp	r0, #3
-	bls	.L380
+	bls	.L382
+	.loc 3 648 0 is_stmt 0 discriminator 1
 	ldr	r3, [r1, #16]
 	lsls	r2, r3, #29
-	bpl	.L380
+	bpl	.L382
+.LVL364:
+.LBB237:
+	.loc 3 655 0 is_stmt 1
 	ldr	r3, [r1, #16]
 	tst	r3, #2
+	.loc 3 657 0
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-	beq	.L367
-.L361:
+	.loc 3 655 0
+	beq	.L369
+.L365:
+	.loc 3 658 0
 	ldr	r2, [r1, #28]
 	ldr	r3, [sp]
 	ubfx	r2, r2, #16, #5
 	ubfx	r3, r3, #22, #6
 	cmp	r2, r3
-	bge	.L365
+	bge	.L366
+	.loc 3 660 0
 	cmp	r0, #5
-	bls	.L361
+	bls	.L365
+.LBB238:
+	.loc 3 663 0
 	ldr	r3, [r1]
 	str	r3, [sp, #4]
+	.loc 3 664 0
 	ldr	r3, [sp, #4]
 	lsls	r3, r3, #18
-	bpl	.L361
+	bpl	.L365
+	.loc 3 664 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #4]
 	lsls	r4, r3, #14
-	bpl	.L361
-.L365:
-	ldr	r4, .L387+8
-	ldr	r3, [r4, #24]
-	cbz	r3, .L366
-	ldr	r0, [r4, #16]
-	ldr	r1, [sp]
-	ubfx	r1, r1, #22, #5
-	add	r1, r0, r1, lsl #10
-	bl	invalidate_dcache_range
-	ldr	r0, [r4, #20]
-	ldr	r1, [sp]
-	ubfx	r1, r1, #22, #5
-	add	r1, r0, r1, lsl #7
-	bl	invalidate_dcache_range
+	bpl	.L365
 .L366:
-	ldr	r3, .L387+8
+.LBE238:
+	.loc 3 735 0 is_stmt 1
+	ldr	r3, .L389+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-.L357:
+.LVL365:
+.L361:
+.LBE237:
+	.loc 3 745 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 8
 	@ sp needed
 	pop	{r4, pc}
-.L368:
+.LVL366:
+.L370:
+	.cfi_restore_state
+.LBB239:
+	.loc 3 705 0
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
-.L367:
+.L369:
+	.loc 3 703 0
 	ldr	r3, [sp]
 	lsls	r2, r3, #11
-	bpl	.L368
-	ldr	r4, .L387+12
+	bpl	.L370
+	.loc 3 715 0
+	ldr	r4, .L389+12
 	ldr	r2, [r4]
-	cbz	r2, .L369
+	cbz	r2, .L371
+	.loc 3 716 0
 	mov	r0, r1
 	bl	NandcSendDumpDataStart
-.L369:
+.LVL367:
+.L371:
+	.loc 3 732 0
 	ldr	r3, [r4]
 	cmp	r3, #0
 	beq	.L366
+	.loc 3 733 0
 	mov	r0, r1
 	bl	NandcSendDumpDataDone
+.LVL368:
 	b	.L366
-.L380:
+.LVL369:
+.L382:
+.LBE239:
+	.loc 3 742 0 discriminator 1
 	ldr	r3, [r1, #8]
 	str	r3, [sp]
+	.loc 3 743 0 discriminator 1
 	ldr	r3, [sp]
 	lsls	r3, r3, #11
-	bpl	.L380
-	b	.L357
-.L388:
+	bpl	.L382
+	b	.L361
+.L390:
 	.align	2
-.L387:
+.L389:
 	.word	.LANCHOR6
-	.word	.LANCHOR32
 	.word	.LANCHOR33
 	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.cfi_endproc
+.LFE290:
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
@@ -2461,22 +4277,41 @@ NandcXferComp:
 	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
+.LFB293:
+	.file 4 "drivers/rknand/rkftl/FtlPlat.c"
+	.loc 4 144 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL370:
+	.loc 4 148 0
 	movs	r1, #0
+	.loc 4 146 0
 	movs	r2, #1
-.L390:
+.LVL371:
+.L392:
+	.loc 4 148 0 discriminator 1
 	cmp	r2, r0
 	uxth	r3, r1
+.LVL372:
 	add	r1, r1, #1
-	bls	.L391
+	bls	.L393
+.LVL373:
+	.loc 4 150 0
 	subs	r0, r3, #1
+.LVL374:
+	.loc 4 152 0
 	uxth	r0, r0
 	bx	lr
-.L391:
+.LVL375:
+.L393:
+	.loc 4 149 0 discriminator 3
 	lsls	r2, r2, #1
-	b	.L390
+.LVL376:
+	b	.L392
+	.cfi_endproc
+.LFE293:
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
@@ -2487,10 +4322,16 @@ Ftl_log2:
 	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
+.LFB294:
+	.loc 4 176 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL377:
 	bx	lr
+	.cfi_endproc
+.LFE294:
 	.size	FtlPrintInfo, .-FtlPrintInfo
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
@@ -2501,41 +4342,57 @@ FtlPrintInfo:
 	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
+.LFB295:
+	.loc 4 182 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L394
+.LVL378:
+	.loc 4 185 0
+	ldr	r3, .L396
 	cmp	r0, #24
 	it	cc
 	movcc	r0, #24
-	ldr	r2, .L394+4
+.LVL379:
+	.loc 4 186 0
+	ldr	r2, .L396+4
+	.loc 4 185 0
 	str	r0, [r3]
-	ldr	r3, .L394+8
+	.loc 4 186 0
+	ldr	r3, .L396+8
 	ldrh	r3, [r3]
 	muls	r3, r0, r3
 	str	r3, [r2]
-	ldr	r2, .L394+12
+	.loc 4 187 0
+	ldr	r2, .L396+12
 	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L394+16
+.LVL380:
+	ldr	r2, .L396+16
 	strh	r0, [r2]	@ movhi
+	.loc 4 191 0
 	movs	r0, #0
-	ldr	r2, .L394+20
+	.loc 4 188 0
+	ldr	r2, .L396+20
 	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L394+24
+	ldr	r2, .L396+24
 	str	r3, [r2]
+	.loc 4 191 0
 	bx	lr
-.L395:
+.L397:
 	.align	2
-.L394:
-	.word	.LANCHOR35
-	.word	.LANCHOR37
+.L396:
 	.word	.LANCHOR36
-	.word	.LANCHOR39
 	.word	.LANCHOR38
-	.word	.LANCHOR41
+	.word	.LANCHOR37
 	.word	.LANCHOR40
+	.word	.LANCHOR39
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.cfi_endproc
+.LFE295:
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
@@ -2547,36 +4404,73 @@ FtlSysBlkNumInit:
 	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
+.LFB296:
+	.loc 4 200 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL381:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r10, r0
+	.loc 4 204 0
 	ldrh	r7, [r0, #8]
+	.loc 4 200 0
 	sub	sp, sp, #24
-	ldr	r3, .L424
-	ldr	r1, .L424+4
+	.cfi_def_cfa_offset 56
+	.loc 4 204 0
+	ldr	r3, .L425
+	.loc 4 207 0
+	ldr	r1, .L425+4
 	ldrh	r6, [r10, #14]
-	ldr	r2, .L424+8
+	.loc 4 206 0
+	ldr	r2, .L425+8
+	.loc 4 204 0
 	strh	r7, [r3]	@ movhi
+	.loc 4 205 0
 	ldrh	r3, [r0, #10]
+	.loc 4 206 0
 	ldrh	r0, [r0, #12]
+.LVL382:
+	.loc 4 207 0
 	strh	r6, [r1]	@ movhi
+.LVL383:
 	str	r1, [sp, #20]
-	ldr	r1, .L424+12
-	ldr	r4, .L424+16
+	.loc 4 210 0
+	ldr	r1, .L425+12
+	.loc 4 205 0
+	ldr	r4, .L425+16
+	.loc 4 206 0
 	strh	r0, [r2]	@ movhi
+	.loc 4 209 0
 	movs	r2, #0
+	.loc 4 205 0
 	strh	r3, [r4]	@ movhi
 	str	r4, [sp, #8]
-.L397:
+.LVL384:
+.L399:
+	.loc 4 210 0 discriminator 3
 	strb	r2, [r2, r1]
+	.loc 4 209 0 discriminator 3
 	adds	r2, r2, #1
+.LVL385:
 	cmp	r2, #32
-	bne	.L397
+	bne	.L399
+	.loc 4 211 0
 	ldrh	r1, [r10, #14]
 	ldrh	r2, [r10, #20]
+.LVL386:
 	cmp	r2, r1, lsr #8
-	bcs	.L398
+	bcs	.L400
+	.loc 4 215 0
 	uxtb	r8, r0
 	lsl	r2, r8, #1
 	uxtb	r2, r2
@@ -2584,179 +4478,288 @@ FtlConstantsInit:
 	subs	r2, r3, #1
 	muls	r2, r0, r2
 	str	r2, [sp, #12]
+	.loc 4 213 0
 	movs	r2, #0
-.L399:
+.L401:
+.LVL387:
+	.loc 4 213 0 is_stmt 0 discriminator 1
 	cmp	r2, r0
-	bcs	.L401
+	bcs	.L403
 	ldr	r4, [sp, #12]
+	.loc 4 215 0 is_stmt 1
 	sub	fp, r2, r0
 	uxtb	r1, r2
 	adds	r5, r2, r4
-	ldr	r4, .L424+12
+	ldr	r4, .L425+12
 	add	r4, r4, r5
+	.loc 4 213 0
 	movs	r5, #0
 	mov	lr, r4
-	ldr	r4, .L424+12
+	.loc 4 215 0
+	ldr	r4, .L425+12
+	.loc 4 213 0
 	mov	ip, r5
+	.loc 4 215 0
 	add	fp, fp, r4
-	b	.L402
-.L400:
+	b	.L404
+.LVL388:
+.L402:
+	.loc 4 216 0 discriminator 3
 	add	r4, r8, r1
+	.loc 4 215 0 discriminator 3
 	strb	r1, [fp, r5]
+	.loc 4 216 0 discriminator 3
 	str	r4, [sp, #16]
+	.loc 4 214 0 discriminator 3
 	add	ip, ip, #1
+.LVL389:
+	.loc 4 216 0 discriminator 3
 	ldrb	r4, [sp, #16]	@ zero_extendqisi2
 	strb	r4, [lr, r5]
 	ldr	r4, [sp, #4]
 	add	r1, r1, r4
 	uxtb	r1, r1
-.L402:
+.LVL390:
+.L404:
+	.loc 4 214 0 discriminator 1
 	cmp	ip, r3
 	add	r5, r5, r0
-	bcc	.L400
+	bcc	.L402
+	.loc 4 213 0 discriminator 2
 	adds	r2, r2, #1
-	b	.L399
-.L401:
+.LVL391:
+	b	.L401
+.LVL392:
+.L403:
+	.loc 4 219 0
 	ldr	r2, [sp, #8]
+.LVL393:
 	lsls	r3, r3, #1
+	.loc 4 220 0
 	lsrs	r6, r6, #1
+	.loc 4 219 0
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L424+4
+	.loc 4 220 0
+	ldr	r3, .L425+4
 	strh	r6, [r3]	@ movhi
-.L398:
-	ldr	r3, .L424+20
+.L400:
+	.loc 4 225 0
+	ldr	r3, .L425+20
 	movs	r2, #5
+	.loc 4 227 0
 	cmp	r7, #1
+	.loc 4 226 0
 	mov	r1, #0
+	.loc 4 225 0
 	strh	r2, [r3]	@ movhi
-	ldr	r2, .L424+24
+	.loc 4 226 0
+	ldr	r2, .L425+24
+	.loc 4 228 0
 	it	eq
 	strheq	r7, [r3]	@ movhi
-	ldr	r3, .L424+28
+	.loc 4 229 0
+	ldr	r3, .L425+28
+	.loc 4 226 0
 	strh	r1, [r2]	@ movhi
+	.loc 4 229 0
 	mov	r1, #4352
 	strh	r1, [r3]	@ movhi
-	ldr	r1, .L424+32
+	.loc 4 230 0
+	ldr	r1, .L425+32
 	ldrb	r1, [r1]	@ zero_extendqisi2
 	str	r1, [sp, #4]
-	cbz	r1, .L404
+	cbz	r1, .L406
+	.loc 4 231 0
 	mov	r1, #384
 	strh	r1, [r3]	@ movhi
-.L404:
+.L406:
+	.loc 4 233 0
 	ldr	r3, [sp, #8]
 	str	r2, [sp, #16]
-	ldr	fp, .L424+120
+	.loc 4 236 0
+	ldr	fp, .L425+120
+	.loc 4 233 0
 	ldrh	r5, [r3]
-	ldr	r3, .L424+36
-	ldr	r8, .L424+124
+	ldr	r3, .L425+36
+	.loc 4 239 0
+	ldr	r8, .L425+124
+	.loc 4 233 0
 	smulbb	r5, r5, r0
 	uxth	r5, r5
 	strh	r5, [r3]	@ movhi
+	.loc 4 234 0
 	ldr	r3, [sp, #20]
 	ldrh	r4, [r3]
-	ldr	r3, .L424+40
+	ldr	r3, .L425+40
 	smulbb	r0, r0, r4
 	uxth	r0, r0
 	strh	r0, [r3]	@ movhi
+	.loc 4 235 0
 	bl	Ftl_log2
-	ldr	r3, .L424+44
+.LVL394:
+	ldr	r3, .L425+44
+	.loc 4 236 0
 	ldrh	r6, [r10, #16]
+	.loc 4 237 0
 	ldrh	r1, [r10, #18]
+	.loc 4 235 0
 	strh	r0, [r3]	@ movhi
-	ldr	r3, .L424+48
+	.loc 4 237 0
+	ldr	r3, .L425+48
+	.loc 4 238 0
 	smulbb	r0, r5, r6
+	.loc 4 236 0
 	strh	r6, [fp]	@ movhi
+	.loc 4 237 0
 	str	r1, [sp, #12]
 	strh	r1, [r3]	@ movhi
-	ldr	r3, .L424+52
+	.loc 4 238 0
+	ldr	r3, .L425+52
 	strh	r0, [r3]	@ movhi
+	.loc 4 239 0
 	ldrh	r3, [r10, #20]
+	.loc 4 240 0
 	mov	r0, r3
+	.loc 4 239 0
 	strh	r3, [r8]	@ movhi
+	.loc 4 240 0
 	str	r3, [sp, #8]
 	bl	Ftl_log2
+.LVL395:
+	.loc 4 245 0
 	ldr	r3, [sp, #8]
+	.loc 4 240 0
 	mov	r7, r0
-	ldr	ip, .L424+128
+	ldr	ip, .L425+128
+	.loc 4 257 0
 	cmp	r4, #1024
-	ldr	lr, .L424+132
+	.loc 4 245 0
+	ldr	lr, .L425+132
+	.loc 4 257 0
 	ldr	r2, [sp, #16]
+	.loc 4 240 0
 	strh	r0, [ip]	@ movhi
+	.loc 4 245 0
 	lsl	r0, r3, #9
+	.loc 4 257 0
 	ldr	r1, [sp, #12]
+	.loc 4 245 0
 	uxth	r0, r0
 	strh	r0, [lr]	@ movhi
+	.loc 4 246 0
 	lsr	r0, r0, #8
-	ldr	lr, .L424+136
+	ldr	lr, .L425+136
+	.loc 4 267 0
 	mul	r1, r3, r1
+	.loc 4 246 0
 	strh	r0, [lr]	@ movhi
+	.loc 4 247 0
 	ldrh	lr, [r10, #26]
 	mov	r10, ip
-	ldr	r0, .L424+56
+.LVL396:
+	ldr	r0, .L425+56
 	strh	lr, [r0]	@ movhi
+	.loc 4 249 0
 	mul	lr, r4, r5
-	ldr	r0, .L424+60
+	ldr	r0, .L425+60
 	str	lr, [r0]
+	.loc 4 258 0
 	itt	hi
 	uxtbhi	r0, r4
 	strhhi	r0, [r2]	@ movhi
+	.loc 4 265 0
 	ldrh	r2, [r2]
 	subs	r2, r4, r2
 	muls	r2, r5, r2
 	muls	r2, r3, r2
 	muls	r6, r2, r6
-	ldr	r2, .L424+64
+	ldr	r2, .L425+64
 	asrs	r6, r6, #11
 	str	r6, [r2]
-	ldr	r6, .L424+28
+	.loc 4 267 0
+	ldr	r6, .L425+28
 	ldrh	r0, [r6]
 	lsls	r0, r0, #3
 	bl	__aeabi_idiv
+.LVL397:
 	uxth	r0, r0
 	mov	r3, r6
-	ldr	r6, .L424+68
+	ldr	r6, .L425+68
+	.loc 4 268 0
 	cmp	r0, #4
+	.loc 4 269 0
 	itt	ls
 	movls	r2, #4
 	strhls	r2, [r6]	@ movhi
+	.loc 4 271 0
 	ldr	r2, [sp, #4]
+	.loc 4 267 0
 	it	hi
 	strhhi	r0, [r6]	@ movhi
-	cbz	r2, .L408
+	.loc 4 271 0
+	cbz	r2, .L410
+	.loc 4 272 0
 	mov	r2, #640
 	strh	r2, [r3]	@ movhi
-.L408:
+.L410:
+	.loc 4 273 0
 	ldrh	r3, [r3]
+	.loc 4 275 0
 	lsls	r4, r4, #6
-	ldr	r2, .L424+72
+	.loc 4 273 0
+	ldr	r2, .L425+72
+	.loc 4 281 0
 	mov	r1, r5
 	ldrh	r0, [r6]
+	.loc 4 273 0
 	asrs	r3, r3, r7
+	.loc 4 275 0
 	adds	r7, r7, #9
 	asrs	r4, r4, r7
-	ldr	r7, .L424+76
+	.loc 4 279 0
+	ldr	r7, .L425+76
+	.loc 4 273 0
 	adds	r3, r3, #2
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L424+80
+	.loc 4 275 0
+	ldr	r3, .L425+80
 	strh	r4, [r3]	@ movhi
 	uxth	r4, r4
+	.loc 4 279 0
 	mul	r3, r4, r5
+	.loc 4 281 0
 	adds	r4, r4, #8
+	.loc 4 279 0
 	str	r3, [r7]
+	.loc 4 281 0
 	bl	__aeabi_uidiv
+.LVL398:
 	uxtah	r0, r4, r0
-	ldr	r4, .L424+84
+	ldr	r4, .L425+84
+	.loc 4 282 0
 	cmp	r5, #1
+	.loc 4 300 0
+	ldr	r5, .L425+88
+	.loc 4 283 0
 	it	eq
 	addeq	r0, r0, #4
 	str	r0, [r4]
+	.loc 4 286 0
 	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
+.LVL399:
+	.loc 4 287 0
 	ldr	r2, [r4]
+	.loc 4 294 0
 	movs	r0, #24
-	ldr	r3, .L424+88
+	.loc 4 287 0
+	ldr	r3, .L425+92
+	.loc 4 300 0
+	ldrb	r5, [r5]	@ zero_extendqisi2
+	.loc 4 287 0
 	str	r2, [r3]
-	ldr	r3, .L424+92
+	.loc 4 289 0
+	ldr	r3, .L425+96
 	ldr	r2, [r3]
 	ldrh	r3, [fp]
 	lsls	r2, r2, #2
@@ -2764,85 +4767,117 @@ FtlConstantsInit:
 	ldrh	r2, [r10]
 	adds	r2, r2, #9
 	lsrs	r3, r3, r2
-	ldr	r2, .L424+96
+	ldr	r2, .L425+100
 	adds	r3, r3, #2
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L424+100
+	.loc 4 294 0
+	ldr	r2, .L425+104
 	strh	r0, [r2]	@ movhi
+	.loc 4 296 0
 	movs	r0, #0
-	ldr	r2, .L424+104
+	ldr	r2, .L425+108
 	str	r0, [r2]
+	.loc 4 298 0
 	ldrh	r0, [r6]
 	adds	r2, r0, #3
 	strh	r2, [r6]	@ movhi
+	.loc 4 299 0
 	ldr	r2, [r7]
 	adds	r4, r2, #3
 	str	r4, [r7]
-	ldr	r4, .L424+108
-	ldrb	r4, [r4]	@ zero_extendqisi2
-	cbz	r4, .L411
-	adds	r0, r0, #4
+	.loc 4 300 0
+	cbz	r5, .L413
+	.loc 4 302 0
 	adds	r2, r2, #5
+	.loc 4 301 0
+	adds	r0, r0, #4
 	strh	r0, [r6]	@ movhi
+.L424:
+	.loc 4 304 0
 	str	r2, [r7]
-.L411:
-	ldr	r1, .L424+112
+.L414:
+	.loc 4 307 0
+	ldr	r1, .L425+112
 	movs	r2, #0
 	strh	r2, [r1]	@ movhi
-	ldr	r2, .L424+116
+	.loc 4 308 0
+	ldr	r2, .L425+116
 	ldrh	r0, [r2]
+.LVL400:
+	.loc 4 309 0
 	lsrs	r2, r0, #3
+	.loc 4 308 0
 	add	r2, r2, r0, lsl #1
+	.loc 4 339 0
 	movs	r0, #0
+.LVL401:
+	.loc 4 308 0
 	adds	r2, r2, #52
 	add	r3, r2, r3, lsl #2
+.LVL402:
+	.loc 4 310 0
 	ldrh	r2, [r8]
 	cmp	r3, r2, lsl #9
+	.loc 4 311 0
 	itt	cc
 	movcc	r3, #1
 	strhcc	r3, [r1]	@ movhi
+	.loc 4 339 0
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L425:
+.LVL403:
+.L413:
+	.cfi_restore_state
+	.loc 4 303 0
+	cmp	r4, #7
+	bhi	.L414
+	.loc 4 304 0
+	movs	r2, #8
+	b	.L424
+.L426:
 	.align	2
-.L424:
-	.word	.LANCHOR42
-	.word	.LANCHOR39
-	.word	.LANCHOR44
-	.word	.LANCHOR45
+.L425:
 	.word	.LANCHOR43
+	.word	.LANCHOR40
+	.word	.LANCHOR45
 	.word	.LANCHOR46
+	.word	.LANCHOR44
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR1
-	.word	.LANCHOR36
 	.word	.LANCHOR49
+	.word	.LANCHOR1
+	.word	.LANCHOR37
 	.word	.LANCHOR50
-	.word	.LANCHOR52
+	.word	.LANCHOR51
 	.word	.LANCHOR53
-	.word	.LANCHOR58
-	.word	.LANCHOR41
+	.word	.LANCHOR54
 	.word	.LANCHOR59
+	.word	.LANCHOR42
 	.word	.LANCHOR60
 	.word	.LANCHOR61
-	.word	.LANCHOR63
 	.word	.LANCHOR62
-	.word	.LANCHOR35
 	.word	.LANCHOR64
-	.word	.LANCHOR40
+	.word	.LANCHOR63
+	.word	.LANCHOR36
+	.word	.LANCHOR8
 	.word	.LANCHOR65
+	.word	.LANCHOR41
 	.word	.LANCHOR66
 	.word	.LANCHOR67
-	.word	.LANCHOR8
 	.word	.LANCHOR68
-	.word	.LANCHOR38
-	.word	.LANCHOR51
-	.word	.LANCHOR54
+	.word	.LANCHOR69
+	.word	.LANCHOR39
+	.word	.LANCHOR52
 	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR57
+	.word	.LANCHOR58
+	.cfi_endproc
+.LFE296:
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -2853,35 +4888,61 @@ FtlConstantsInit:
 	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
+.LFB299:
+	.loc 4 640 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L433
+.LVL404:
+	.loc 4 643 0
+	ldr	r3, .L434
 	ldrh	r3, [r3]
-	cbz	r3, .L432
-	ldr	r3, .L433+4
-	ldr	r2, .L433+8
+	cbz	r3, .L433
+.LBB242:
+.LBB243:
+	.loc 4 645 0
+	ldr	r3, .L434+4
+	.loc 4 644 0
+	ldr	r2, .L434+8
+	.loc 4 645 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L428:
+.L429:
+	.loc 4 644 0
 	cmp	r3, r2
-	bne	.L429
-.L432:
+	bne	.L430
+.L433:
+.LBE243:
+.LBE242:
+	.loc 4 650 0
 	movs	r0, #0
+.LVL405:
 	bx	lr
-.L429:
+.LVL406:
+.L430:
+.LBB245:
+.LBB244:
+	.loc 4 645 0
 	ldrh	r1, [r3], #2
 	cmp	r0, r1
-	bne	.L428
+	bne	.L429
+	.loc 4 646 0
 	movs	r0, #1
+.LVL407:
+.LBE244:
+.LBE245:
+	.loc 4 651 0
 	bx	lr
-.L434:
+.L435:
 	.align	2
-.L433:
-	.word	.LANCHOR69
+.L434:
 	.word	.LANCHOR70
-	.word	.LANCHOR60
+	.word	.LANCHOR71
+	.word	.LANCHOR61
+	.cfi_endproc
+.LFE299:
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -2892,16 +4953,20 @@ IsBlkInVendorPart:
 	.fpu softvfp
 	.type	FtlGetCap, %function
 FtlGetCap:
+.LFB534:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L436
+	ldr	r3, .L437
 	ldr	r0, [r3]
 	bx	lr
-.L437:
+.L438:
 	.align	2
-.L436:
-	.word	.LANCHOR67
+.L437:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE534:
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
@@ -2912,16 +4977,20 @@ FtlGetCap:
 	.fpu softvfp
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
+.LFB532:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L439
+	ldr	r3, .L440
 	ldr	r0, [r3]
 	bx	lr
-.L440:
+.L441:
 	.align	2
-.L439:
-	.word	.LANCHOR67
+.L440:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE532:
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
@@ -2932,16 +5001,24 @@ FtlGetCapacity:
 	.fpu softvfp
 	.type	ftl_get_density, %function
 ftl_get_density:
+.LFB312:
+	.loc 4 1835 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L442
+.LVL408:
+	.loc 4 1837 0
+	ldr	r3, .L443
 	ldr	r0, [r3]
+.LVL409:
 	bx	lr
-.L443:
+.L444:
 	.align	2
-.L442:
-	.word	.LANCHOR67
+.L443:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE312:
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
@@ -2952,16 +5029,22 @@ ftl_get_density:
 	.fpu softvfp
 	.type	FtlGetLpn, %function
 FtlGetLpn:
+.LFB313:
+	.loc 4 1840 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L445
+	.loc 4 1842 0
+	ldr	r3, .L446
 	ldr	r0, [r3]
 	bx	lr
-.L446:
+.L447:
 	.align	2
-.L445:
-	.word	.LANCHOR71
+.L446:
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE313:
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -2972,20 +5055,27 @@ FtlGetLpn:
 	.fpu softvfp
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
+.LFB314:
+	.loc 4 1845 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L448
-	ldr	r3, .L448+4
+	.loc 4 1846 0
+	ldr	r2, .L449
+	ldr	r3, .L449+4
 	ldr	r0, [r2]
 	ldrh	r3, [r3]
+	.loc 4 1847 0
 	muls	r0, r3, r0
 	bx	lr
-.L449:
+.L450:
 	.align	2
-.L448:
-	.word	.LANCHOR72
-	.word	.LANCHOR36
+.L449:
+	.word	.LANCHOR73
+	.word	.LANCHOR37
+	.cfi_endproc
+.LFE314:
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
@@ -2996,20 +5086,27 @@ FtlGetCurEraseBlock:
 	.fpu softvfp
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
+.LFB315:
+	.loc 4 1850 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L451
-	ldr	r3, .L451+4
+	.loc 4 1851 0
+	ldr	r2, .L452
+	ldr	r3, .L452+4
 	ldrh	r0, [r2]
 	ldrh	r3, [r3]
+	.loc 4 1852 0
 	muls	r0, r3, r0
 	bx	lr
-.L452:
+.L453:
 	.align	2
-.L451:
-	.word	.LANCHOR36
-	.word	.LANCHOR39
+.L452:
+	.word	.LANCHOR37
+	.word	.LANCHOR40
+	.cfi_endproc
+.LFE315:
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
 	.align	1
@@ -3020,21 +5117,44 @@ FtlGetAllBlockNum:
 	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
+.LFB316:
+	.file 5 "drivers/rknand/rkftl/FtlBbm.c"
+	.loc 5 5 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L454
+.LVL410:
+	.loc 5 12 0
+	ldr	r3, .L455
+	.loc 5 5 0
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 5 5 0
 	mov	r5, r0
+	.loc 5 12 0
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
+.LVL411:
 	mov	r1, r4
-	ldr	r4, .L454+4
+	.loc 5 15 0
+	ldr	r4, .L455+4
+	.loc 5 12 0
 	uxth	r6, r0
+.LVL412:
 	mov	r0, r5
 	bl	__aeabi_uidivmod
+.LVL413:
+	.loc 5 15 0
 	add	r2, r4, r6, lsl #2
 	uxth	r3, r1
+.LVL414:
+	.loc 5 17 0
 	ldr	r2, [r2, #28]
 	lsrs	r1, r3, #5
 	and	r7, r3, #31
@@ -3043,24 +5163,35 @@ FtlBbmMapBadBlock:
 	ldr	r7, [r2, r1, lsl #2]
 	orrs	r0, r0, r7
 	str	r0, [r2, r1, lsl #2]
+.LVL415:
+	.loc 5 18 0
 	mov	r2, r6
 	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L454+8
+	ldr	r0, .L455+8
 	bl	printf
+.LVL416:
+	.loc 5 19 0
 	ldrh	r3, [r4, #6]
+	.loc 5 21 0
 	movs	r0, #0
+	.loc 5 19 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
+	.loc 5 21 0
 	add	sp, sp, #12
+	.cfi_def_cfa_offset 20
 	@ sp needed
 	pop	{r4, r5, r6, r7, pc}
-.L455:
+.LVL417:
+.L456:
 	.align	2
-.L454:
-	.word	.LANCHOR49
-	.word	.LANCHOR73
+.L455:
+	.word	.LANCHOR50
+	.word	.LANCHOR74
 	.word	.LC2
+	.cfi_endproc
+.LFE316:
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
@@ -3071,33 +5202,64 @@ FtlBbmMapBadBlock:
 	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
+.LFB317:
+	.loc 5 26 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L457
+.LVL418:
+	.loc 5 34 0
+	ldr	r3, .L458
+	.loc 5 26 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 5 26 0
 	mov	r6, r0
+	.loc 5 34 0
 	ldrh	r5, [r3]
+.LVL419:
+	.loc 5 35 0
 	mov	r1, r5
 	bl	__aeabi_uidivmod
+.LVL420:
+	.loc 5 34 0
 	mov	r0, r6
+	.loc 5 35 0
 	uxth	r4, r1
+.LVL421:
+	.loc 5 34 0
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L457+4
+.LVL422:
+	.loc 5 37 0
+	ldr	r3, .L458+4
+	.loc 5 34 0
 	uxth	r0, r0
+	.loc 5 38 0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
+.LVL423:
+	.loc 5 37 0
 	add	r0, r3, r0, lsl #2
+	.loc 5 38 0
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
 	lsrs	r0, r0, r4
+	.loc 5 42 0
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L458:
+.LVL424:
+.L459:
 	.align	2
-.L457:
-	.word	.LANCHOR49
-	.word	.LANCHOR73
+.L458:
+	.word	.LANCHOR50
+	.word	.LANCHOR74
+	.cfi_endproc
+.LFE317:
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -3108,10 +5270,14 @@ FtlBbmIsBadBlock:
 	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
+.LFB536:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE536:
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -3122,31 +5288,54 @@ FtlBbtInfoPrint:
 	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
+.LFB325:
+	.loc 1 5 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL425:
+	.loc 1 5 0
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 5 0
 	mov	r5, r1
-	ldr	r3, .L461
+	.loc 1 8 0
+	ldr	r3, .L462
+	.loc 1 5 0
 	mov	r7, r0
+	.loc 1 8 0
 	ldrh	r6, [r3]
+.LVL426:
 	mov	r1, r6
+.LVL427:
 	bl	__aeabi_uidiv
-	ldr	r3, .L461+4
+.LVL428:
+	ldr	r3, .L462+4
 	smulbb	r5, r6, r5
 	mov	r1, r6
 	ldrh	r4, [r3]
 	smulbb	r4, r4, r0
 	mov	r0, r7
 	bl	__aeabi_uidivmod
+.LVL429:
 	adds	r0, r5, r1
 	add	r0, r0, r4
+	.loc 1 10 0
 	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L462:
+.L463:
 	.align	2
-.L461:
-	.word	.LANCHOR44
-	.word	.LANCHOR49
+.L462:
+	.word	.LANCHOR45
+	.word	.LANCHOR50
+	.cfi_endproc
+.LFE325:
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
@@ -3157,27 +5346,46 @@ V2P_block:
 	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
+.LFB326:
+	.loc 1 13 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L464
+.LVL430:
+	.loc 1 16 0
+	ldr	r3, .L465
+	.loc 1 13 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 13 0
 	mov	r6, r0
+	.loc 1 16 0
 	ldrh	r5, [r3]
-	ldr	r3, .L464+4
+.LVL431:
+	ldr	r3, .L465+4
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
+.LVL432:
 	smulbb	r4, r0, r5
 	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
+.LVL433:
 	add	r1, r1, r4
+	.loc 1 18 0
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L465:
+.L466:
 	.align	2
-.L464:
-	.word	.LANCHOR44
-	.word	.LANCHOR49
+.L465:
+	.word	.LANCHOR45
+	.word	.LANCHOR50
+	.cfi_endproc
+.LFE326:
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
@@ -3188,23 +5396,40 @@ P2V_plane:
 	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
+.LFB327:
+	.loc 1 21 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL434:
 	push	{r3, lr}
-	ldr	r3, .L467
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 24 0
+	ldr	r3, .L468
 	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L467+4
+.LVL435:
+	.loc 1 25 0
+	ldr	r3, .L468+4
+	.loc 1 24 0
 	uxth	r0, r1
+.LVL436:
+	.loc 1 25 0
 	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
+.LVL437:
+	.loc 1 27 0
 	uxth	r0, r0
 	pop	{r3, pc}
-.L468:
+.L469:
 	.align	2
-.L467:
-	.word	.LANCHOR49
-	.word	.LANCHOR44
+.L468:
+	.word	.LANCHOR50
+	.word	.LANCHOR45
+	.cfi_endproc
+.LFE327:
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
@@ -3215,24 +5440,38 @@ P2V_block_in_plane:
 	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
+.LFB328:
+	.loc 1 31 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL438:
+	.loc 1 34 0
 	cmp	r0, r1
-	bls	.L470
+	bls	.L471
+	.loc 1 36 0
 	subs	r0, r0, r1
+.LVL439:
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L470:
+.LVL440:
+.L471:
+	.loc 1 40 0
 	subs	r0, r1, r0
+.LVL441:
 	cmp	r0, #-2147483648
 	ite	ls
 	movls	r0, #0
 	movhi	r0, #1
+.LVL442:
+	.loc 1 44 0
 	bx	lr
+	.cfi_endproc
+.LFE328:
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -3243,18 +5482,25 @@ ftl_cmp_data_ver:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
+.LFB331:
+	.loc 1 88 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L473
+	.loc 1 89 0
+	ldr	r3, .L474
 	ldrh	r0, [r3, #6]
+	.loc 1 90 0
 	clz	r0, r0
 	lsrs	r0, r0, #5
 	bx	lr
-.L474:
+.L475:
 	.align	2
-.L473:
-	.word	.LANCHOR74
+.L474:
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE331:
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -3265,19 +5511,26 @@ FtlFreeSysBlkQueueEmpty:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
+.LFB332:
+	.loc 1 93 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L476
+	.loc 1 94 0
+	ldr	r3, .L477
 	ldrh	r0, [r3, #6]
+	.loc 1 95 0
 	sub	r3, r0, #1024
 	rsbs	r0, r3, #0
 	adcs	r0, r0, r3
 	bx	lr
-.L477:
+.L478:
 	.align	2
-.L476:
-	.word	.LANCHOR74
+.L477:
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE332:
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -3288,56 +5541,99 @@ FtlFreeSysBlkQueueFull:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
+.LFB333:
+	.loc 1 98 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL443:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 98 0
 	mov	r5, r0
-	ldr	r4, .L487
+.LBB246:
+.LBB247:
+	.loc 1 94 0
+	ldr	r4, .L488
+.LBE247:
+.LBE246:
+	.loc 1 101 0
 	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L478
-	cbz	r1, .L480
-	ldr	r3, .L487+4
+	beq	.L479
+.LVL444:
+.LBB248:
+	.loc 1 103 0
+	cbz	r1, .L481
+	.loc 1 103 0 is_stmt 0 discriminator 1
+	ldr	r3, .L488+4
 	ldr	r3, [r3]
-	cbnz	r3, .L480
+	cbnz	r3, .L481
+.LBB249:
+	.loc 1 104 0 is_stmt 1
 	bl	P2V_block_in_plane
-	ldr	r3, .L487+8
+.LVL445:
+	.loc 1 105 0
+	ldr	r3, .L488+8
+	.loc 1 104 0
 	mov	r6, r0
+.LVL446:
+	.loc 1 106 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 105 0
 	ldr	r0, [r3]
 	lsls	r3, r5, #10
 	str	r3, [r0, #4]
+	.loc 1 106 0
 	bl	FlashEraseBlocks
-	ldr	r3, .L487+12
+.LVL447:
+	.loc 1 107 0
+	ldr	r3, .L488+12
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	adds	r3, r3, #1
 	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L487+16
+	.loc 1 108 0
+	ldr	r2, .L488+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L480:
+.LVL448:
+.L481:
+.LBE249:
+	.loc 1 110 0
 	ldrh	r3, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
+	.loc 1 111 0
 	ldrh	r3, [r4, #4]
 	adds	r2, r3, #4
+	.loc 1 112 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
+	.loc 1 111 0
 	strh	r5, [r4, r2, lsl #1]	@ movhi
+	.loc 1 112 0
 	strh	r3, [r4, #4]	@ movhi
-.L478:
+.LVL449:
+.L479:
 	pop	{r4, r5, r6, pc}
-.L488:
+.L489:
 	.align	2
-.L487:
-	.word	.LANCHOR74
+.L488:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR77
 	.word	.LANCHOR78
+	.word	.LANCHOR79
+.LBE248:
+	.cfi_endproc
+.LFE333:
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -3348,79 +5644,74 @@ FtlFreeSysBlkQueueIn:
 	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	@ args = 0, pretend = 0, frame = 8
+.LFB334:
+	.loc 1 118 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r4, .L498
-	ldr	r3, .L498+4
-	ldrh	r7, [r4, #2]
-	ldrh	r6, [r4, #6]
-	ldr	r5, [r3]
-	ldr	r3, .L498+8
-	add	r8, r4, r7, lsl #1
-	mov	r10, r5
-	ldr	r3, [r3]
-	add	fp, r5, r6, lsl #2
-	add	r8, r8, #6
+	.loc 1 119 0
+	ldr	r3, .L497
+	.loc 1 123 0
+	movs	r0, #0
+	.loc 1 118 0
+	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 123 0
+	mov	r6, r0
+	.loc 1 119 0
+	ldrh	r5, [r3, #28]
+	ldr	r3, .L497+4
+	and	r5, r5, #31
+.LVL450:
+	ldrh	r1, [r3, #2]
+	ldrh	r2, [r3, #4]
+.LVL451:
+.L491:
+	.loc 1 123 0 discriminator 1
+	uxth	r4, r0
+	adds	r0, r0, #1
+.LVL452:
+	cmp	r5, r4
+	bgt	.L492
+	cbz	r6, .L490
+	strh	r1, [r3, #2]	@ movhi
+	strh	r2, [r3, #4]	@ movhi
 .L490:
-	cmp	r10, fp
-	bne	.L491
-	movs	r3, #0
-	add	lr, r6, #-1
+	pop	{r4, r5, r6, pc}
+.LVL453:
 .L492:
-	cmp	r3, lr
-	blt	.L497
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L491:
-	ldrh	r0, [r8, #2]!
-	str	r3, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r3, [sp, #4]
-	ldrh	r2, [r3, r0, lsl #1]
-	str	r2, [r10], #4
-	b	.L490
-.L497:
-	add	ip, r3, #1
-	mov	r2, r3
-	uxth	ip, ip
-	mov	r8, ip
-.L493:
-	cmp	r8, r6
-	bcc	.L495
-	cmp	r3, r2
-	beq	.L496
-	ldr	r0, [r5, r2, lsl #2]
-	ldr	r1, [r5, r3, lsl #2]
-	str	r1, [r5, r2, lsl #2]
-	add	r2, r2, r7
-	str	r0, [r5, r3, lsl #2]
-	add	r3, r3, r7
-	adds	r2, r2, #4
-	adds	r3, r3, #4
-	ldrh	r1, [r4, r2, lsl #1]
-	ldrh	r0, [r4, r3, lsl #1]
-	strh	r0, [r4, r2, lsl #1]	@ movhi
-	strh	r1, [r4, r3, lsl #1]	@ movhi
-.L496:
-	mov	r3, ip
-	b	.L492
-.L495:
-	ldr	r1, [r5, r8, lsl #2]
-	ldr	r0, [r5, r2, lsl #2]
-	cmp	r0, r1
-	it	hi
-	movhi	r2, r8
-	add	r8, r8, #1
-	uxth	r8, r8
-	b	.L493
-.L499:
-	.align	2
+	.loc 1 124 0 discriminator 3
+	adds	r4, r1, #4
+.LVL454:
+	.loc 1 125 0 discriminator 3
+	adds	r1, r1, #1
+	.loc 1 124 0 discriminator 3
+	ldrh	r6, [r3, r4, lsl #1]
+.LVL455:
+	.loc 1 126 0 discriminator 3
+	adds	r4, r2, #4
+	.loc 1 125 0 discriminator 3
+	ubfx	r1, r1, #0, #10
+	.loc 1 126 0 discriminator 3
+	strh	r6, [r3, r4, lsl #1]	@ movhi
+.LVL456:
+	movs	r6, #1
+.LVL457:
+	.loc 1 127 0 discriminator 3
+	add	r2, r2, r6
+	ubfx	r2, r2, #0, #10
+	b	.L491
 .L498:
-	.word	.LANCHOR74
-	.word	.LANCHOR79
-	.word	.LANCHOR77
+	.align	2
+.L497:
+	.word	.LANCHOR80
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE334:
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
@@ -3431,53 +5722,99 @@ FtlFreeSysBLkSort:
 	.fpu softvfp
 	.type	remove_from_free_sys_Queue, %function
 remove_from_free_sys_Queue:
+.LFB335:
+	.loc 1 161 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL458:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 161 0
 	mov	r1, r0
-	ldr	r5, .L507
+.LBB250:
+.LBB251:
+	.loc 1 89 0
+	ldr	r5, .L506
 	ldrh	r3, [r5, #6]
-	cbz	r3, .L506
+.LBE251:
+.LBE250:
+	.loc 1 166 0
+	cbz	r3, .L505
+	.loc 1 168 0
 	ldrh	r0, [r5, #2]
+.LVL459:
 	movs	r4, #0
-.L502:
+.L501:
+.LVL460:
+	.loc 1 167 0 discriminator 1
 	cmp	r4, r3
-	bcc	.L504
-.L506:
+	bcc	.L503
+.LVL461:
+.L505:
+	.loc 1 162 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L504:
+.LVL462:
+.L503:
+	.loc 1 168 0
 	adds	r2, r4, r0
 	ubfx	r2, r2, #0, #10
 	adds	r2, r2, #4
 	ldrh	r2, [r5, r2, lsl #1]
 	cmp	r2, r1
-	bne	.L503
-	ldr	r0, .L507+4
+	bne	.L502
+.LVL463:
+	.loc 1 170 0
+	ldr	r0, .L506+4
 	bl	printf
+.LVL464:
+	.loc 1 171 0
 	ldrh	r3, [r5, #2]
+	.loc 1 169 0
 	movs	r0, #1
+	.loc 1 171 0
 	adds	r2, r3, #4
 	add	r4, r4, r3
+.LVL465:
+	.loc 1 172 0
 	adds	r3, r3, #1
+	.loc 1 171 0
 	ldrh	r2, [r5, r2, lsl #1]
+	.loc 1 172 0
 	ubfx	r3, r3, #0, #10
+	.loc 1 171 0
 	ubfx	r4, r4, #0, #10
+	.loc 1 172 0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 1 171 0
 	adds	r4, r4, #4
+	.loc 1 173 0
 	ldrh	r3, [r5, #6]
+	.loc 1 171 0
 	strh	r2, [r5, r4, lsl #1]	@ movhi
+	.loc 1 173 0
 	subs	r3, r3, #1
 	strh	r3, [r5, #6]	@ movhi
+	.loc 1 174 0
 	pop	{r3, r4, r5, pc}
-.L503:
+.LVL466:
+.L502:
+	.loc 1 167 0 discriminator 2
 	adds	r4, r4, #1
-	b	.L502
-.L508:
-	.align	2
+.LVL467:
+	b	.L501
 .L507:
-	.word	.LANCHOR74
+	.align	2
+.L506:
+	.word	.LANCHOR75
 	.word	.LC3
+	.cfi_endproc
+.LFE335:
 	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
@@ -3488,65 +5825,135 @@ remove_from_free_sys_Queue:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
+.LFB336:
+	.loc 1 182 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L516
-	push	{r3, r4, r5, r6, r7, lr}
-	ldrh	r1, [r2, #6]
-	cbz	r1, .L512
-	ldrh	r3, [r2, #2]
+.LVL468:
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+.LBB252:
+.LBB253:
+	.loc 1 89 0
+	ldr	r4, .L518
+	mov	r6, r4
+.LVL469:
+.L509:
+	ldrh	r1, [r4, #6]
+.LBE253:
+.LBE252:
+	.loc 1 187 0
+	cmp	r1, #0
+	beq	.L510
+	.loc 1 188 0
+	ldrh	r3, [r4, #2]
+	.loc 1 189 0
 	subs	r1, r1, #1
-	strh	r1, [r2, #6]	@ movhi
-	adds	r0, r3, #4
+	strh	r1, [r4, #6]	@ movhi
+	.loc 1 188 0
+	adds	r2, r3, #4
+	.loc 1 190 0
 	adds	r3, r3, #1
 	ubfx	r3, r3, #0, #10
-	ldrh	r4, [r2, r0, lsl #1]
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L516+4
-	ldr	r7, [r3]
-	cbnz	r7, .L510
-	ldr	r5, .L516+8
-	mov	r0, r4
+	.loc 1 188 0
+	ldrh	r5, [r4, r2, lsl #1]
+.LVL470:
+	.loc 1 190 0
+	strh	r3, [r4, #2]	@ movhi
+	.loc 1 191 0
+	ldr	r3, .L518+4
+	ldr	r10, [r3]
+	cmp	r10, #0
+	bne	.L511
+.LBB254:
+	.loc 1 193 0
+	ldr	r8, .L518+28
+	.loc 1 192 0
+	mov	r0, r5
 	bl	P2V_block_in_plane
-	mov	r6, r0
-	lsls	r2, r4, #10
-	ldr	r0, [r5]
-	str	r2, [r0, #4]
-	ldr	r2, .L516+12
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbz	r2, .L511
+.LVL471:
+	mov	r7, r0
+.LVL472:
+	.loc 1 193 0
+	lsls	r3, r5, #10
+	ldr	r0, [r8]
+	str	r3, [r0, #4]
+	.loc 1 194 0
+	ldr	r3, .L518+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L512
+	.loc 1 195 0
 	movs	r2, #1
-	mov	r1, r7
+	mov	r1, r10
 	bl	FlashEraseBlocks
-.L511:
+.LVL473:
+.L512:
+	.loc 1 196 0
 	movs	r2, #1
-	ldr	r0, [r5]
+	ldr	r0, [r8]
 	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L516+16
+.LVL474:
+	.loc 1 197 0
+	ldr	r3, .L518+12
 	ldr	r2, [r3]
-	ldrh	r3, [r2, r6, lsl #1]
+	ldrh	r3, [r2, r7, lsl #1]
 	adds	r3, r3, #1
-	strh	r3, [r2, r6, lsl #1]	@ movhi
-	ldr	r2, .L516+20
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	.loc 1 198 0
+	ldr	r2, .L518+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
+.LVL475:
+.L511:
+.LBE254:
+	.loc 1 205 0
+	cbnz	r5, .L514
+	.loc 1 206 0
+	ldrh	r2, [r6, #6]
+	mov	r1, r5
+	ldr	r0, .L518+20
+	bl	printf
+.LVL476:
+	.loc 1 208 0
+	b	.L509
+.LVL477:
 .L510:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L512:
-	movw	r4, #65535
-	b	.L510
-.L517:
+	.loc 1 202 0
+	ldr	r0, .L518+24
+	bl	printf
+.LVL478:
+.L513:
+	b	.L513
+.LVL479:
+.L514:
+	.loc 1 211 0
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL480:
+.L519:
 	.align	2
-.L516:
-	.word	.LANCHOR74
+.L518:
 	.word	.LANCHOR75
 	.word	.LANCHOR76
 	.word	.LANCHOR8
-	.word	.LANCHOR77
 	.word	.LANCHOR78
+	.word	.LANCHOR79
+	.word	.LC5
+	.word	.LC4
+	.word	.LANCHOR77
+	.cfi_endproc
+.LFE336:
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
@@ -3557,126 +5964,243 @@ FtlFreeSysBlkQueueOut:
 	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
+.LFB339:
+	.loc 1 256 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL481:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L534
-	ldrh	lr, [r3]
-	cmp	lr, r0
-	bls	.L520
-	ldr	r3, .L534+4
-	movs	r5, #6
-	ldr	r4, [r3]
-	mul	r3, r5, r0
-	str	r3, [sp, #4]
-	adds	r1, r4, r3
-	ldr	r2, [sp, #4]
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 267 0
+	ldr	r5, .L537
+	ldrh	r3, [r5]
+	cmp	r3, r0
+	bls	.L522
+.LVL482:
+.LBB257:
+.LBB258:
+	.loc 1 272 0
+	ldr	r6, .L537+4
+	movs	r4, #6
+	muls	r4, r0, r4
+	.loc 1 275 0
+	ldr	r2, .L537+8
+	.loc 1 273 0
 	movw	r3, #65535
+	.loc 1 272 0
+	ldr	ip, [r6]
+	mov	r8, r6
+	add	r1, ip, r4
+.LVL483:
+	.loc 1 273 0
 	strh	r3, [r1, #2]	@ movhi
-	strh	r3, [r4, r2]	@ movhi
-	ldr	r3, .L534+8
-	ldr	ip, [r3]
-	cmp	ip, #0
-	bne	.L521
+	strh	r3, [ip, r4]	@ movhi
+	.loc 1 275 0
+	ldr	r3, [r2]
+	cbnz	r3, .L523
+.L536:
+	.loc 1 324 0
+	str	r1, [r2]
+	b	.L522
+.L523:
+	.loc 1 280 0
+	ldr	r2, .L537+12
+	lsls	r7, r0, #1
+	.loc 1 281 0
+	ldrh	r6, [r1, #4]
+	.loc 1 280 0
+	ldr	lr, [r2]
+	ldrh	r2, [lr, r0, lsl #1]
+.LVL484:
+	.loc 1 282 0
+	cmp	r6, #0
+	beq	.L533
+	.loc 1 281 0
+	muls	r2, r6, r2
+.LVL485:
+.L535:
+	.loc 1 286 0
+	ldr	fp, [r8]
+	.loc 1 289 0
+	ldrh	r5, [r5]
+	.loc 1 283 0
+	str	r2, [sp, #4]
+.LVL486:
+	.loc 1 286 0
+	sub	r2, r3, fp
+.LVL487:
+	asr	r8, r2, #1
+	ldr	r2, .L537+16
+	.loc 1 289 0
+	str	r5, [sp, #8]
+	.loc 1 301 0
+	ldr	r5, .L537+20
+	.loc 1 286 0
+	mul	r2, r2, r8
+	.loc 1 301 0
+	ldr	r8, [r5]
+	.loc 1 286 0
+	uxth	r2, r2
+.LVL488:
+	.loc 1 301 0
+	add	r5, r8, r7
+	str	r5, [sp, #12]
+	.loc 1 263 0
+	movs	r5, #0
+.LVL489:
+.L531:
+	.loc 1 288 0
+	adds	r5, r5, #1
+.LVL490:
+	.loc 1 289 0
+	ldr	r7, [sp, #8]
+	.loc 1 288 0
+	uxth	r5, r5
+.LVL491:
+	.loc 1 289 0
+	cmp	r5, r7
+	bhi	.L522
+	.loc 1 292 0
+	cmp	r0, r2
+	beq	.L522
+	.loc 1 295 0
+	ldrh	r7, [lr, r2, lsl #1]
+	lsl	r10, r2, #1
+	mov	r6, r7
+.LVL492:
+	.loc 1 296 0
+	ldrh	r7, [r3, #4]
+.LVL493:
+	.loc 1 297 0
+	cbz	r7, .L534
+	.loc 1 296 0
+	muls	r7, r6, r7
+.LVL494:
+.L526:
+	.loc 1 300 0
+	ldr	r6, [sp, #4]
+.LVL495:
+	cmp	r6, r7
+	bne	.L527
+	.loc 1 301 0
+	ldr	r6, [sp, #12]
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r6]
+.LVL496:
+	cmp	r10, r7
+	bcc	.L529
+.L528:
+	.loc 1 319 0
+	strh	r2, [ip, r4]	@ movhi
+.LVL497:
+	.loc 1 320 0
+	ldrh	r2, [r3, #2]
+.LVL498:
+	strh	r2, [r1, #2]	@ movhi
+.LVL499:
+	.loc 1 322 0
+	ldr	r2, .L537+8
+	ldr	r4, [r2]
+	cmp	r3, r4
+	bne	.L532
+	.loc 1 323 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L536
+.LVL500:
 .L533:
+	.loc 1 283 0
+	mov	r2, #-1
+.LVL501:
+	b	.L535
+.LVL502:
+.L534:
+	.loc 1 298 0
+	mov	r7, #-1
+.LVL503:
+	b	.L526
+.LVL504:
+.L527:
+	.loc 1 305 0
+	bcc	.L528
+.LVL505:
+.L529:
+	.loc 1 308 0
+	ldrh	r7, [r3]
+	movw	r6, #65535
+	cmp	r7, r6
+	bne	.L530
+	.loc 1 309 0
+	strh	r2, [r1, #2]	@ movhi
+.LVL506:
+	.loc 1 310 0
+	strh	r0, [r3]	@ movhi
+	.loc 1 311 0
+	ldr	r3, .L537+24
+.LVL507:
 	str	r1, [r3]
-.L520:
+.LVL508:
+.L522:
+.LBE258:
+.LBE257:
+	.loc 1 330 0
 	movs	r0, #0
+.LVL509:
 	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L521:
-	ldr	r3, .L534+12
-	lsls	r2, r0, #1
-	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldrh	r6, [r3, r0, lsl #1]
-	ldrh	r3, [r1, #4]
-	cbz	r3, .L531
-	mul	fp, r3, r6
-.L522:
-	sub	r3, ip, r4
-	asrs	r6, r3, #1
-	ldr	r3, .L534+16
-	muls	r3, r6, r3
-	ldr	r6, .L534+20
-	ldr	r8, [r6]
-	movs	r6, #0
-	uxth	r3, r3
-	add	r2, r8, r2
-	str	r2, [sp, #12]
-	mov	r2, ip
-.L529:
-	adds	r6, r6, #1
-	uxth	r6, r6
-	cmp	lr, r6
-	bcc	.L520
-	cmp	r3, r0
-	beq	.L520
-	ldr	r7, [sp, #8]
-	lsl	r10, r3, #1
-	ldrh	r7, [r7, r3, lsl #1]
-	mov	r5, r7
-	ldrh	r7, [r2, #4]
-	cbz	r7, .L532
-	muls	r7, r5, r7
-.L524:
-	cmp	fp, r7
-	bne	.L525
-	ldr	r5, [sp, #12]
-	ldrh	r10, [r8, r10]
-	ldrh	r7, [r5]
-	cmp	r10, r7
-	bcc	.L527
-.L526:
-	ldr	r5, [sp, #4]
-	cmp	r2, ip
-	strh	r3, [r4, r5]	@ movhi
-	ldrh	r3, [r2, #2]
-	strh	r3, [r1, #2]	@ movhi
-	bne	.L530
-	strh	r0, [r2, #2]	@ movhi
-	ldr	r3, .L534+8
-	b	.L533
-.L531:
-	mov	fp, #-1
-	b	.L522
-.L532:
-	mov	r7, #-1
-	b	.L524
-.L525:
-	bcc	.L526
-.L527:
-	ldrh	r7, [r2]
-	movw	r5, #65535
-	cmp	r7, r5
-	bne	.L528
-	strh	r3, [r1, #2]	@ movhi
-	strh	r0, [r2]	@ movhi
-	ldr	r3, .L534+24
-	b	.L533
-.L528:
-	movs	r3, #6
-	mla	r2, r3, r7, r4
-	mov	r3, r7
-	b	.L529
+.LVL510:
 .L530:
-	ldrh	r1, [r2, #2]
+	.cfi_restore_state
+.LBB260:
+.LBB259:
+	.loc 1 316 0
 	movs	r3, #6
-	muls	r3, r1, r3
-	strh	r0, [r4, r3]	@ movhi
-	strh	r0, [r2, #2]	@ movhi
-	b	.L520
-.L535:
+.LVL511:
+	mov	r2, r7
+.LVL512:
+	mla	r3, r3, r7, fp
+.LVL513:
+	b	.L531
+.LVL514:
+.L532:
+	.loc 1 326 0
+	ldrh	r4, [r3, #2]
+	ldr	r2, .L537+4
+	ldr	r1, [r2]
+.LVL515:
+	movs	r2, #6
+.LVL516:
+	muls	r2, r4, r2
+.LVL517:
+	strh	r0, [r1, r2]	@ movhi
+	.loc 1 327 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L522
+.L538:
 	.align	2
-.L534:
-	.word	.LANCHOR38
-	.word	.LANCHOR80
+.L537:
+	.word	.LANCHOR39
 	.word	.LANCHOR81
 	.word	.LANCHOR82
-	.word	-1431655765
-	.word	.LANCHOR77
 	.word	.LANCHOR83
+	.word	-1431655765
+	.word	.LANCHOR78
+	.word	.LANCHOR84
+.LBE259:
+.LBE260:
+	.cfi_endproc
+.LFE339:
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -3687,38 +6211,69 @@ insert_data_list:
 	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
+.LFB338:
+	.loc 1 225 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL518:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 226 0
 	bl	insert_data_list
-	ldr	r2, .L538
+.LVL519:
+	.loc 1 227 0
+	ldr	r2, .L541
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L538+4
+	.loc 1 228 0
+	ldr	r2, .L541+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L536
-	ldr	r1, .L538+8
-	movs	r2, #205
-	ldr	r0, .L538+12
+	bcs	.L539
+.LVL520:
+.LBB263:
+.LBB264:
+	ldr	r1, .L541+8
+	movs	r2, #228
+	ldr	r0, .L541+12
 	bl	printf
-	ldr	r1, .L538+16
-	ldr	r0, .L538+20
+.LVL521:
+	ldr	r1, .L541+16
+	ldr	r0, .L541+20
+.LBE264:
+.LBE263:
+	.loc 1 229 0
 	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB266:
+.LBB265:
+	.loc 1 228 0
 	b	printf
-.L536:
-	pop	{r3, pc}
+.LVL522:
 .L539:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L542:
 	.align	2
-.L538:
-	.word	.LANCHOR84
-	.word	.LANCHOR38
+.L541:
 	.word	.LANCHOR85
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR39
+	.word	.LANCHOR86
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+.LBE265:
+.LBE266:
+	.cfi_endproc
+.LFE338:
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
@@ -3729,75 +6284,146 @@ INSERT_DATA_LIST:
 	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
-	@ args = 0, pretend = 0, frame = 0
+.LFB340:
+	.loc 1 333 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL523:
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 339 0
 	movw	r1, #65535
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	cmp	r0, r1
-	beq	.L541
-	ldr	r3, .L547
+	beq	.L544
+	.loc 1 342 0
+	ldr	r4, .L550
 	mov	r10, #6
-	mul	r7, r10, r0
-	ldr	r4, [r3]
-	ldr	r3, .L547+4
-	adds	r5, r4, r7
-	ldr	r6, [r3]
-	mov	lr, r3
+	mul	r6, r10, r0
+	.loc 1 345 0
+	ldr	r2, .L550+4
+	.loc 1 342 0
+	ldr	r7, [r4]
+	str	r4, [sp]
+	mov	ip, r2
+	adds	r5, r7, r6
+.LVL524:
+	.loc 1 343 0
 	strh	r1, [r5, #2]	@ movhi
-	strh	r1, [r4, r7]	@ movhi
-	cbnz	r6, .L542
-	str	r5, [r3]
-.L541:
+	strh	r1, [r7, r6]	@ movhi
+	.loc 1 345 0
+	ldr	r3, [r2]
+	cbnz	r3, .L545
+	.loc 1 346 0
+	str	r5, [r2]
+.LVL525:
+.L544:
+	.loc 1 379 0
 	movs	r0, #0
+.LVL526:
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L542:
-	ldr	r3, .L547+8
-	subs	r2, r6, r4
+.LVL527:
+.L545:
+	.cfi_restore_state
+	.loc 1 350 0
+	ldr	r2, .L550+8
+	ldr	r8, [r2]
+	ldrh	r2, [r8, r0, lsl #1]
+	str	r2, [sp, #4]
+.LVL528:
+	.loc 1 352 0
+	ldr	r2, [sp]
+	ldr	lr, [r2]
+	ldr	r2, .L550+12
+	sub	fp, r3, lr
+	asr	fp, fp, #1
+	mul	r2, r2, fp
+	.loc 1 359 0
 	mov	fp, r1
-	ldr	ip, [r3]
-	asrs	r3, r2, #1
-	ldr	r2, .L547+12
-	ldrh	r8, [ip, r0, lsl #1]
-	muls	r2, r3, r2
-	mov	r3, r6
+	.loc 1 352 0
 	uxth	r2, r2
-.L545:
-	ldrh	r1, [ip, r2, lsl #1]
-	cmp	r1, r8
-	bcs	.L543
-	ldrh	r1, [r3]
+.LVL529:
+.L548:
+	.loc 1 356 0
+	ldrh	r1, [r8, r2, lsl #1]
+	mov	r4, r1
+	ldr	r1, [sp, #4]
+	cmp	r4, r1
+	bcs	.L546
+	.loc 1 359 0
+	ldrh	r1, [r3]
 	cmp	r1, fp
-	bne	.L544
+	bne	.L547
+	.loc 1 360 0
 	strh	r2, [r5, #2]	@ movhi
+.LVL530:
+	.loc 1 361 0
 	strh	r0, [r3]	@ movhi
-	b	.L541
-.L544:
-	mla	r3, r10, r1, r4
+	.loc 1 362 0
+	b	.L544
+.LVL531:
+.L547:
+	.loc 1 365 0
+	mla	r3, r10, r1, lr
+.LVL532:
+	.loc 1 355 0
 	mov	r2, r1
-	b	.L545
-.L543:
+.LVL533:
+	b	.L548
+.LVL534:
+.L546:
+	.loc 1 368 0
 	ldrh	r1, [r3, #2]
-	cmp	r3, r6
 	strh	r1, [r5, #2]	@ movhi
-	it	ne
-	ldrhne	r1, [r3, #2]
-	strh	r2, [r4, r7]	@ movhi
-	iteet	ne
-	movne	r2, #6
-	strheq	r0, [r3, #2]	@ movhi
-	streq	r5, [lr]
-	mulne	r2, r2, r1
-	itt	ne
-	strhne	r0, [r4, r2]	@ movhi
-	strhne	r0, [r3, #2]	@ movhi
-	b	.L541
-.L548:
+.LVL535:
+	.loc 1 369 0
+	strh	r2, [r7, r6]	@ movhi
+	.loc 1 371 0
+	ldr	r2, [ip]
+.LVL536:
+	cmp	r3, r2
+	bne	.L549
+	.loc 1 372 0
+	strh	r0, [r3, #2]	@ movhi
+.LVL537:
+	.loc 1 373 0
+	str	r5, [ip]
+	b	.L544
+.LVL538:
+.L549:
+	.loc 1 375 0
+	ldrh	r5, [r3, #2]
+.LVL539:
+	ldr	r2, [sp]
+	ldr	r1, [r2]
+	movs	r2, #6
+	muls	r2, r5, r2
+	strh	r0, [r1, r2]	@ movhi
+.LVL540:
+	.loc 1 376 0
+	strh	r0, [r3, #2]	@ movhi
+	b	.L544
+.L551:
 	.align	2
-.L547:
-	.word	.LANCHOR80
-	.word	.LANCHOR86
-	.word	.LANCHOR77
+.L550:
+	.word	.LANCHOR81
+	.word	.LANCHOR87
+	.word	.LANCHOR78
 	.word	-1431655765
+	.cfi_endproc
+.LFE340:
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
@@ -3808,38 +6434,69 @@ insert_free_list:
 	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
+.LFB337:
+	.loc 1 214 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL541:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 215 0
 	bl	insert_free_list
-	ldr	r2, .L551
+.LVL542:
+	.loc 1 216 0
+	ldr	r2, .L554
 	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L551+4
+	.loc 1 221 0
+	ldr	r2, .L554+4
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L549
-	ldr	r1, .L551+8
-	movs	r2, #198
-	ldr	r0, .L551+12
+	bcs	.L552
+.LVL543:
+.LBB269:
+.LBB270:
+	ldr	r1, .L554+8
+	movs	r2, #221
+	ldr	r0, .L554+12
 	bl	printf
-	ldr	r1, .L551+16
-	ldr	r0, .L551+20
+.LVL544:
+	ldr	r1, .L554+16
+	ldr	r0, .L554+20
+.LBE270:
+.LBE269:
+	.loc 1 222 0
 	pop	{r3, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB272:
+.LBB271:
+	.loc 1 221 0
 	b	printf
-.L549:
-	pop	{r3, pc}
+.LVL545:
 .L552:
+	.cfi_restore_state
+	pop	{r3, pc}
+.L555:
 	.align	2
-.L551:
-	.word	.LANCHOR87
-	.word	.LANCHOR38
+.L554:
 	.word	.LANCHOR88
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR39
+	.word	.LANCHOR89
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+.LBE271:
+.LBE272:
+	.cfi_endproc
+.LFE337:
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
@@ -3850,79 +6507,130 @@ INSERT_FREE_LIST:
 	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
+.LFB341:
+	.loc 1 382 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL546:
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 385 0
 	movs	r6, #6
-	ldr	r5, .L559
+	ldr	r4, .L562
 	muls	r6, r1, r6
+	.loc 1 386 0
 	movw	r3, #65535
+	.loc 1 382 0
 	mov	r8, r0
-	ldr	r7, [r5]
-	adds	r4, r7, r6
-	ldrh	r2, [r4, #2]
+	.loc 1 385 0
+	ldr	r7, [r4]
+	adds	r5, r7, r6
+.LVL547:
+	.loc 1 386 0
+	ldrh	r2, [r5, #2]
 	cmp	r2, r3
-	bne	.L554
+	bne	.L557
+	.loc 1 386 0 is_stmt 0 discriminator 1
 	ldr	r3, [r0]
-	cmp	r4, r3
-	beq	.L554
-	ldr	r1, .L559+4
-	movw	r2, #363
-	ldr	r0, .L559+8
+	cmp	r5, r3
+	beq	.L557
+	.loc 1 386 0 discriminator 2
+	ldr	r1, .L562+4
+.LVL548:
+	mov	r2, #386
+	ldr	r0, .L562+8
+.LVL549:
 	bl	printf
-	ldr	r1, .L559+12
-	ldr	r0, .L559+16
+.LVL550:
+	ldr	r1, .L562+12
+	ldr	r0, .L562+16
 	bl	printf
-.L554:
+.LVL551:
+.L557:
+	.loc 1 388 0 is_stmt 1
 	ldr	r3, [r8]
 	movw	r1, #65535
-	cmp	r4, r3
+	cmp	r5, r3
 	ldrh	r3, [r7, r6]
-	bne	.L555
+	bne	.L558
+	.loc 1 389 0
 	cmp	r3, r1
+	.loc 1 392 0
 	ittee	ne
-	ldrne	r0, [r5]
+	ldrne	r0, [r4]
 	movne	r2, #6
+	.loc 1 390 0
 	moveq	r3, #0
 	streq	r3, [r8]
+	.loc 1 392 0
 	ittt	ne
 	mlane	r3, r2, r3, r0
 	strne	r3, [r8]
+	.loc 1 393 0
 	strhne	r1, [r3, #2]	@ movhi
-.L557:
+.L560:
+	.loc 1 406 0
 	movw	r3, #65535
+	.loc 1 408 0
 	movs	r0, #0
+	.loc 1 406 0
 	strh	r3, [r7, r6]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r5, #2]	@ movhi
+	.loc 1 408 0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L555:
+.LVL552:
+.L558:
+	.loc 1 395 0
 	cmp	r3, r1
-	ldrh	r1, [r4, #2]
-	bne	.L558
+	ldrh	r1, [r5, #2]
+	bne	.L561
+	.loc 1 396 0
 	cmp	r1, r3
-	beq	.L557
+	beq	.L560
+.LVL553:
+	.loc 1 398 0
 	movs	r2, #6
-	ldr	r0, [r5]
+	ldr	r0, [r4]
 	muls	r1, r2, r1
+.LVL554:
 	strh	r3, [r0, r1]	@ movhi
-	b	.L557
-.L558:
-	ldr	r0, [r5]
+.LVL555:
+	b	.L560
+.L561:
+.LVL556:
+	.loc 1 402 0
+	ldr	r0, [r4]
 	movs	r2, #6
-	mla	r5, r2, r3, r0
-	strh	r1, [r5, #2]	@ movhi
-	ldrh	r1, [r4, #2]
-	muls	r2, r1, r2
-	strh	r3, [r0, r2]	@ movhi
-	b	.L557
-.L560:
+	mla	r3, r2, r3, r0
+.LVL557:
+	strh	r1, [r3, #2]	@ movhi
+.LVL558:
+	.loc 1 403 0
+	ldrh	r0, [r5, #2]
+	.loc 1 404 0
+	ldrh	r1, [r7, r6]
+	ldr	r3, [r4]
+	muls	r2, r0, r2
+	strh	r1, [r3, r2]	@ movhi
+.LVL559:
+	b	.L560
+.L563:
 	.align	2
-.L559:
-	.word	.LANCHOR80
-	.word	.LANCHOR89
-	.word	.LC4
-	.word	.LC5
+.L562:
+	.word	.LANCHOR81
+	.word	.LANCHOR90
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE341:
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
@@ -3933,42 +6641,79 @@ List_remove_node:
 	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
+.LFB342:
+	.loc 1 411 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0]
+.LVL560:
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L567
-	ldr	r2, .L568
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 416 0
+	ldr	r3, [r0]
+	cbz	r3, .L570
+	.loc 1 431 0
+	ldr	r2, .L571
+.LVL561:
+	.loc 1 430 0
 	movw	r5, #65535
+	.loc 1 431 0
 	movs	r6, #6
 	ldr	r2, [r2]
-.L563:
-	cbnz	r1, .L564
+.LVL562:
 .L566:
-	ldr	r4, .L568+4
+	.loc 1 430 0
+	cbnz	r1, .L567
+.L569:
+	.loc 1 446 0
+	ldr	r4, .L571+4
 	subs	r3, r3, r2
+.LVL563:
 	asrs	r3, r3, #1
 	muls	r4, r3, r4
+.LVL564:
+	.loc 1 447 0
 	uxth	r1, r4
+.LVL565:
 	bl	List_remove_node
+.LVL566:
 	uxth	r0, r4
+	.loc 1 453 0
 	pop	{r4, r5, r6, pc}
-.L564:
+.LVL567:
+.L567:
+	.loc 1 430 0 discriminator 1
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L566
+	beq	.L569
+	.loc 1 432 0
 	subs	r1, r1, #1
+.LVL568:
+	.loc 1 431 0
 	mla	r3, r6, r4, r2
+.LVL569:
+	.loc 1 432 0
 	uxth	r1, r1
-	b	.L563
-.L567:
+.LVL570:
+	b	.L566
+.LVL571:
+.L570:
+	.loc 1 417 0
 	movw	r0, #65535
+.LVL572:
+	.loc 1 454 0
 	pop	{r4, r5, r6, pc}
-.L569:
+.L572:
 	.align	2
-.L568:
-	.word	.LANCHOR80
+.L571:
+	.word	.LANCHOR81
 	.word	-1431655765
+	.cfi_endproc
+.LFE342:
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
@@ -3979,42 +6724,73 @@ List_pop_index_node:
 	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
+.LFB343:
+	.loc 1 462 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L576
+.LVL573:
+	.loc 1 466 0
+	ldr	r3, .L579
+	.loc 1 462 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 1 466 0
 	ldr	r3, [r3]
-	cbz	r3, .L575
-	ldr	r2, .L576+4
+	cbz	r3, .L578
+	.loc 1 471 0
+	ldr	r2, .L579+4
 	movs	r4, #6
 	ldr	r1, [r2]
+	.loc 1 470 0
 	movw	r2, #65535
-.L572:
-	cbz	r0, .L573
+.L575:
+.LVL574:
+	cbz	r0, .L576
+	.loc 1 470 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r3]
+.LVL575:
 	cmp	r3, r2
-	bne	.L574
-.L575:
+	bne	.L577
+.L578:
+	.loc 1 467 0 is_stmt 1
 	movw	r0, #65535
+.LVL576:
 	pop	{r4, pc}
-.L574:
+.LVL577:
+.L577:
+	.loc 1 472 0
 	subs	r0, r0, #1
+.LVL578:
+	.loc 1 471 0
 	mla	r3, r4, r3, r1
+.LVL579:
+	.loc 1 472 0
 	uxth	r0, r0
-	b	.L572
-.L573:
-	ldr	r0, .L576+8
+.LVL580:
+	b	.L575
+.L576:
+.LVL581:
+	.loc 1 476 0
+	ldr	r0, .L579+8
+.LVL582:
 	subs	r3, r3, r1
+.LVL583:
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	uxth	r0, r3
+	.loc 1 479 0
 	pop	{r4, pc}
-.L577:
+.L580:
 	.align	2
-.L576:
+.L579:
+	.word	.LANCHOR82
 	.word	.LANCHOR81
-	.word	.LANCHOR80
 	.word	-1431655765
+	.cfi_endproc
+.LFE343:
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
@@ -4025,114 +6801,200 @@ List_get_gc_head_node:
 	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
+.LFB344:
+	.loc 1 482 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L587
+.LVL584:
+	.loc 1 491 0
+	ldr	r3, .L592
+	.loc 1 482 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 482 0
 	mov	r4, r0
+	.loc 1 491 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L580
-	ldr	r3, .L587+4
+	beq	.L583
+	.loc 1 491 0 is_stmt 0 discriminator 1
+	ldr	r3, .L592+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L580
-	ldr	r3, .L587+8
+	beq	.L583
+	.loc 1 491 0 discriminator 2
+	ldr	r3, .L592+8
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L580
-	ldr	r7, .L587+12
+	beq	.L583
+.LVL585:
+.LBB275:
+.LBB276:
+	.loc 1 494 0 is_stmt 1
+	ldr	r7, .L592+12
 	movs	r6, #6
-	ldr	r3, .L587+16
+	.loc 1 496 0
+	ldr	r3, .L592+16
+	.loc 1 494 0
 	muls	r6, r0, r6
 	ldr	fp, [r7]
+	.loc 1 496 0
 	ldr	r3, [r3]
+	.loc 1 494 0
 	add	r10, fp, r6
+.LVL586:
+	.loc 1 496 0
 	cmp	r10, r3
-	beq	.L580
-	ldr	r2, .L587+20
+	beq	.L583
+	.loc 1 499 0
+	ldr	r3, .L592+20
+	.loc 1 500 0
 	ldrh	r5, [r10, #4]
-	ldr	r3, [r2]
-	mov	r8, r2
-	movw	r2, #65535
-	ldrh	r3, [r3, r0, lsl #1]
-	muls	r5, r3, r5
+	.loc 1 499 0
+	ldr	r2, [r3]
+	mov	r8, r3
+	ldrh	r2, [r2, r0, lsl #1]
+.LVL587:
+	.loc 1 501 0
+	cmp	r5, #0
+	beq	.L590
+	.loc 1 500 0
+	muls	r5, r2, r5
+.LVL588:
+.L585:
+	.loc 1 504 0
 	ldrh	r3, [r10, #2]
-	it	eq
-	moveq	r5, #-1
+	movw	r2, #65535
+.LVL589:
 	cmp	r3, r2
-	bne	.L583
+	bne	.L586
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L583
-	ldr	r1, .L587+24
-	movw	r2, #481
-	ldr	r0, .L587+28
+	bne	.L586
+	ldr	r1, .L592+24
+	mov	r2, #504
+	ldr	r0, .L592+28
+.LVL590:
 	bl	printf
-	ldr	r1, .L587+32
-	ldr	r0, .L587+36
+.LVL591:
+	ldr	r1, .L592+32
+	ldr	r0, .L592+36
 	bl	printf
-.L583:
+.LVL592:
+.L586:
+	.loc 1 505 0
 	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L584
+	bne	.L587
 	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L580
-.L584:
+	beq	.L583
+.L587:
+	.loc 1 507 0
 	movs	r2, #6
 	muls	r2, r3, r2
-	ldr	r3, .L587+40
+.LVL593:
+	.loc 1 508 0
+	ldr	r3, .L592+40
 	asrs	r1, r2, #1
 	muls	r3, r1, r3
+	.loc 1 509 0
 	ldr	r1, [r8]
 	ldrh	r0, [r1, r3, lsl #1]
+.LVL594:
+	.loc 1 510 0
 	ldr	r1, [r7]
 	add	r2, r2, r1
+.LVL595:
 	ldrh	r3, [r2, #4]
+.LVL596:
+	.loc 1 511 0
+	cbz	r3, .L591
+	.loc 1 510 0
 	muls	r3, r0, r3
-	it	eq
-	moveq	r3, #-1
+.LVL597:
+.L588:
+	.loc 1 514 0
 	cmp	r5, r3
-	bcs	.L580
-	ldr	r5, .L587+44
+	bcs	.L583
+	.loc 1 515 0
+	ldr	r5, .L592+44
+.LVL598:
 	mov	r1, r4
-	ldr	r0, .L587+16
+	ldr	r0, .L592+16
+.LVL599:
 	bl	List_remove_node
+.LVL600:
 	ldrh	r3, [r5]
-	cbnz	r3, .L586
-	ldr	r1, .L587+24
-	mov	r2, #492
-	ldr	r0, .L587+28
+	cbnz	r3, .L589
+	ldr	r1, .L592+24
+	movw	r2, #515
+	ldr	r0, .L592+28
 	bl	printf
-	ldr	r1, .L587+32
-	ldr	r0, .L587+36
+.LVL601:
+	ldr	r1, .L592+32
+	ldr	r0, .L592+36
 	bl	printf
-.L586:
+.LVL602:
+.L589:
 	ldrh	r3, [r5]
+	.loc 1 516 0
 	mov	r0, r4
+	.loc 1 515 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
+	.loc 1 516 0
 	bl	INSERT_DATA_LIST
-.L580:
+.LVL603:
+.L583:
+.LBE276:
+.LBE275:
+	.loc 1 519 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L588:
+.LVL604:
+.L590:
+.LBB278:
+.LBB277:
+	.loc 1 502 0
+	mov	r5, #-1
+.LVL605:
+	b	.L585
+.LVL606:
+.L591:
+	.loc 1 512 0
+	mov	r3, #-1
+.LVL607:
+	b	.L588
+.L593:
 	.align	2
-.L587:
-	.word	.LANCHOR90
+.L592:
 	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR80
+	.word	.LANCHOR93
 	.word	.LANCHOR81
 	.word	.LANCHOR82
-	.word	.LANCHOR93
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR83
+	.word	.LANCHOR94
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	-1431655765
-	.word	.LANCHOR84
+	.word	.LANCHOR85
+.LBE277:
+.LBE278:
+	.cfi_endproc
+.LFE344:
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
@@ -4143,58 +7005,110 @@ List_update_data_list:
 	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
+.LFB347:
+	.loc 1 601 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r1, [r0, #10]
-	ldr	r2, [r0, #12]
+.LVL608:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 601 0
 	mov	r4, r0
+	.loc 1 605 0
+	ldrh	r1, [r0, #10]
 	movs	r3, #0
-.L590:
+	ldr	r2, [r0, #12]
+.LVL609:
+.L595:
 	uxth	r5, r3
+.LVL610:
+	.loc 1 605 0 is_stmt 0 discriminator 1
 	cmp	r5, r1
-	bcc	.L592
-.L593:
-	movw	r2, #594
-	ldr	r1, .L599
-	ldr	r0, .L599+4
-	bl	printf
-	ldr	r1, .L599+8
-	ldr	r0, .L599+12
-	bl	printf
-	b	.L594
-.L592:
+	bcs	.L598
+	.loc 1 606 0 is_stmt 1
 	mov	r7, r2
 	adds	r3, r3, #1
 	ldrh	r6, [r7]
 	adds	r2, r2, #2
 	cmp	r6, #0
-	bne	.L590
+	bne	.L595
+	.loc 1 607 0
 	bl	FtlFreeSysBlkQueueOut
+.LVL611:
+	.loc 1 608 0
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	.loc 1 607 0
+	mov	r1, r0
 	strh	r0, [r7]	@ movhi
-	cbz	r0, .L591
+	.loc 1 608 0
+	cmp	r3, r2
+	bls	.L596
+	.loc 1 609 0
+	ldr	r3, .L602
+	ldr	r0, .L602+4
+	ldrh	r2, [r3, #6]
+	bl	printf
+.LVL612:
+.L597:
+	b	.L597
+.L596:
+	.loc 1 622 0
 	ldr	r3, [r4, #28]
+	.loc 1 620 0
 	strh	r6, [r4, #2]	@ movhi
+	.loc 1 621 0
 	strh	r5, [r4]	@ movhi
+	.loc 1 622 0
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
+	.loc 1 623 0
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-.L591:
+.L598:
+	.loc 1 627 0
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bls	.L593
-.L594:
+	bhi	.L600
+.LVL613:
+.LBB281:
+.LBB282:
+	ldr	r1, .L602+8
+	movw	r2, #627
+	ldr	r0, .L602+12
+	bl	printf
+.LVL614:
+	ldr	r1, .L602+16
+	ldr	r0, .L602+20
+	bl	printf
+.LVL615:
+.L600:
+.LBE282:
+.LBE281:
+	.loc 1 629 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L600:
+.LVL616:
+.L603:
 	.align	2
-.L599:
-	.word	.LANCHOR94
-	.word	.LC4
-	.word	.LC5
+.L602:
+	.word	.LANCHOR75
+	.word	.LC9
+	.word	.LANCHOR95
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE347:
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
@@ -4205,93 +7119,144 @@ ftl_map_blk_alloc_new_blk:
 	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
+.LFB352:
+	.loc 1 824 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL617:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 829 0
 	movs	r1, #0
-	ldr	r3, .L611
+	ldr	r3, .L614
+	.loc 1 830 0
 	movs	r0, #12
 	movw	r5, #65535
+	.loc 1 829 0
 	ldrh	r2, [r3]
-	ldr	r3, .L611+4
+	.loc 1 830 0
+	ldr	r3, .L614+4
 	ldr	r3, [r3]
-.L602:
+.LVL618:
+.L605:
 	uxth	r4, r1
+.LVL619:
+	.loc 1 829 0 discriminator 1
 	cmp	r4, r2
-	bcc	.L604
+	bcc	.L607
 	mov	r4, r2
+.LVL620:
 	movs	r1, #0
+.LVL621:
 	mov	r6, #-2147483648
+	.loc 1 840 0
 	movs	r7, #12
-.L605:
+.L608:
 	uxth	r5, r1
+.LVL622:
+	.loc 1 839 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L607
+	bcc	.L610
+	.loc 1 848 0
 	cmp	r4, r2
-	bcc	.L603
-	ldr	r1, .L611+8
+	bcc	.L606
+	.loc 1 854 0
+	ldr	r1, .L614+8
 	mov	r4, r2
 	mov	r0, #-1
 	ldrh	r7, [r1]
 	movs	r1, #0
-.L608:
+.LVL623:
+.L611:
 	uxth	r5, r1
+.LVL624:
+	.loc 1 853 0 discriminator 1
 	cmp	r5, r2
-	bcc	.L610
+	bcc	.L613
+	.loc 1 859 0
 	cmp	r4, r2
-	bcc	.L603
-	movw	r2, #826
-	ldr	r1, .L611+12
-	ldr	r0, .L611+16
+	bcc	.L606
+	.loc 1 859 0 is_stmt 0 discriminator 1
+	movw	r2, #859
+	ldr	r1, .L614+12
+	ldr	r0, .L614+16
+.LVL625:
 	bl	printf
-	ldr	r1, .L611+20
-	ldr	r0, .L611+24
+.LVL626:
+	ldr	r1, .L614+20
+	ldr	r0, .L614+24
 	bl	printf
-	b	.L603
-.L604:
+.LVL627:
+	b	.L606
+.LVL628:
+.L607:
 	adds	r1, r1, #1
+	.loc 1 830 0 is_stmt 1
 	mla	r6, r0, r1, r3
 	ldrh	r6, [r6, #-12]
 	cmp	r6, r5
-	bne	.L602
-.L603:
+	bne	.L605
+.LVL629:
+.L606:
+	.loc 1 861 0
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L607:
+.LVL630:
+.L610:
+	.loc 1 840 0
 	mla	r0, r7, r1, r3
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L606
+	blt	.L609
+	.loc 1 841 0
 	cmp	r6, r0
 	itt	hi
 	movhi	r6, r0
+.LVL631:
 	movhi	r4, r5
-.L606:
+.L609:
+.LVL632:
 	adds	r1, r1, #1
-	b	.L605
-.L610:
+.LVL633:
+	b	.L608
+.LVL634:
+.L613:
+	.loc 1 854 0
 	ldr	r6, [r3, #4]
 	cmp	r0, r6
-	bls	.L609
+	bls	.L612
+	.loc 1 854 0 is_stmt 0 discriminator 1
 	ldrh	ip, [r3]
 	cmp	ip, r7
 	itt	ne
 	movne	r0, r6
+.LVL635:
 	movne	r4, r5
-.L609:
+.LVL636:
+.L612:
 	adds	r1, r1, #1
+.LVL637:
 	adds	r3, r3, #12
-	b	.L608
-.L612:
+	b	.L611
+.L615:
 	.align	2
-.L611:
-	.word	.LANCHOR66
-	.word	.LANCHOR95
+.L614:
+	.word	.LANCHOR67
 	.word	.LANCHOR96
 	.word	.LANCHOR97
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR98
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE352:
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
@@ -4302,51 +7267,83 @@ select_l2p_ram_region:
 	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
+.LFB358:
+	.loc 1 1010 0 is_stmt 1
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L623
-	push	{r4, r5, r6, lr}
+.LVL638:
+	.loc 1 1013 0
+	ldr	r2, .L622
+	.loc 1 1010 0
+	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
 	mov	r1, r2
+	.loc 1 1013 0
 	ldrh	r3, [r2]
 	cmp	r3, #4
-	bhi	.L614
-	cbnz	r0, .L614
+	bhi	.L617
+	.loc 1 1013 0 is_stmt 0 discriminator 1
+	cbnz	r0, .L617
+	.loc 1 1013 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	pop	{r4, r5, r6, pc}
-.L614:
-	movs	r3, #0
-	ldr	r0, .L623+4
-	strh	r3, [r1]	@ movhi
-	movw	r6, #65535
-	ldr	r1, .L623+8
-	ldrh	r4, [r0]
-	mov	r0, r3
-	ldr	r2, .L623+12
-	ldr	r1, [r1]
-	str	r3, [r2]
-	add	r4, r1, r4, lsl #1
-.L615:
-	cmp	r1, r4
-	bne	.L617
-	cbz	r3, .L613
-	str	r0, [r2]
-.L613:
-	pop	{r4, r5, r6, pc}
+	.loc 1 1022 0 is_stmt 1
+	pop	{r4, r5, pc}
 .L617:
-	ldrh	r5, [r1], #2
-	cmp	r5, r6
-	itt	ne
-	addne	r0, r0, r5
-	movne	r3, #1
-	b	.L615
-.L624:
-	.align	2
+	.loc 1 1015 0
+	ldr	r3, .L622+4
+	.loc 1 1014 0
+	movs	r2, #0
+	strh	r2, [r1]	@ movhi
+.LBB285:
+.LBB286:
+	.loc 1 1018 0
+	movw	r5, #65535
+	.loc 1 1016 0
+	ldr	r1, .L622+8
+.LBE286:
+.LBE285:
+	.loc 1 1015 0
+	str	r2, [r3]
+.LVL639:
+.LBB288:
+.LBB287:
+	.loc 1 1018 0
+	ldr	r2, .L622+12
+	ldrh	r1, [r1]
+	ldr	r2, [r2]
+	add	r1, r2, r1, lsl #1
+.LVL640:
+.L618:
+	.loc 1 1016 0
+	cmp	r2, r1
+	bne	.L620
+	pop	{r4, r5, pc}
+.L620:
+	.loc 1 1018 0
+	ldrh	r4, [r2], #2
+	cmp	r4, r5
+	.loc 1 1019 0
+	ittt	ne
+	ldrne	r0, [r3]
+	addne	r0, r0, r4
+	strne	r0, [r3]
+	b	.L618
 .L623:
-	.word	.LANCHOR98
-	.word	.LANCHOR38
-	.word	.LANCHOR82
+	.align	2
+.L622:
 	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.word	.LANCHOR39
+	.word	.LANCHOR83
+.LBE287:
+.LBE288:
+	.cfi_endproc
+.LFE358:
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -4357,27 +7354,39 @@ FtlUpdateVaildLpn:
 	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
+.LFB363:
+	.loc 1 1502 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL641:
+	.loc 1 1502 0
 	mov	r3, r0
-	cbz	r1, .L626
-	b	ftl_set_blk_mode.part.9
-.L626:
-	ldr	r2, .L627
+	.loc 1 1503 0
+	cbz	r1, .L625
+	b	ftl_set_blk_mode.part.10
+.LVL642:
+.L625:
+	.loc 1 1506 0
+	ldr	r2, .L626
 	lsrs	r0, r0, #5
+.LVL643:
 	and	r3, r3, #31
 	ldr	r1, [r2]
+.LVL644:
 	movs	r2, #1
 	lsl	r3, r2, r3
 	ldr	r2, [r1, r0, lsl #2]
 	bic	r2, r2, r3
 	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L628:
-	.align	2
 .L627:
+	.align	2
+.L626:
 	.word	.LANCHOR0
+	.cfi_endproc
+.LFE363:
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -4388,21 +7397,30 @@ ftl_set_blk_mode:
 	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
+.LFB364:
+	.loc 1 1510 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L630
+.LVL645:
+	.loc 1 1511 0
+	ldr	r3, .L629
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
+.LVL646:
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
+	.loc 1 1512 0
 	and	r0, r0, #1
 	bx	lr
-.L631:
-	.align	2
 .L630:
+	.align	2
+.L629:
 	.word	.LANCHOR0
+	.cfi_endproc
+.LFE364:
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -4413,59 +7431,96 @@ ftl_get_blk_mode:
 	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
+.LFB370:
+	.loc 1 1831 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL647:
+	.loc 1 1833 0
 	movs	r3, #0
+	.loc 1 1831 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 1833 0
 	strh	r3, [r0, #4]	@ movhi
+.LVL648:
+	.loc 1 1836 0
 	movw	r6, #65535
-	ldr	r3, .L639
+	.loc 1 1834 0
+	ldr	r3, .L638
 	ldrh	r4, [r3]
 	add	r3, r0, r2, lsl #1
 	adds	r3, r3, #14
-.L633:
+.LVL649:
+.L632:
+	.loc 1 1834 0 is_stmt 0 discriminator 1
 	cmp	r2, r4
-	bcc	.L635
-	ldr	r3, .L639+4
+	bcc	.L634
+	.loc 1 1845 0 is_stmt 1
+	ldr	r3, .L638+4
 	add	r5, r0, #16
+	.loc 1 1843 0
 	movw	r6, #65535
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	subs	r1, r3, r1
+.LVL650:
+	.loc 1 1845 0
 	movs	r3, #0
 	uxth	r1, r1
-.L636:
+.LVL651:
+.L635:
+	.loc 1 1841 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L638
+	bhi	.L637
+	.loc 1 1848 0
 	pop	{r4, r5, r6, pc}
-.L635:
+.LVL652:
+.L634:
+	.loc 1 1836 0
 	ldrh	r5, [r3, #2]!
+	.loc 1 1834 0
 	adds	r2, r2, #1
+.LVL653:
 	uxth	r2, r2
+.LVL654:
+	.loc 1 1836 0
 	cmp	r5, r6
+	.loc 1 1838 0
 	ittt	ne
 	ldrhne	r5, [r0, #4]
 	addne	r5, r5, #1
 	strhne	r5, [r0, #4]	@ movhi
-	b	.L633
-.L638:
+	b	.L632
+.LVL655:
+.L637:
+	.loc 1 1843 0
 	ldrh	r2, [r5], #2
 	adds	r3, r3, #1
+.LVL656:
 	cmp	r2, r6
+	.loc 1 1845 0
 	ittt	ne
 	ldrhne	r2, [r0, #4]
 	addne	r2, r2, r1
 	strhne	r2, [r0, #4]	@ movhi
-	b	.L636
-.L640:
-	.align	2
+	b	.L635
 .L639:
-	.word	.LANCHOR36
-	.word	.LANCHOR51
-	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
-	.section	.text.make_superblock,"ax",%progbits
-	.align	1
+	.align	2
+.L638:
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.cfi_endproc
+.LFE370:
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",%progbits
+	.align	1
 	.global	make_superblock
 	.syntax unified
 	.thumb
@@ -4473,92 +7528,144 @@ ftl_sb_update_avl_pages:
 	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
+.LFB375:
+	.loc 1 2332 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L654
-	ldrh	r2, [r0]
+.LVL657:
+	.loc 1 2335 0
+	ldr	r3, .L653
+	.loc 1 2332 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 2332 0
 	mov	r4, r0
+	.loc 1 2335 0
+	ldrh	r2, [r0]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L642
-	ldr	r1, .L654+4
-	movw	r2, #2298
-	ldr	r0, .L654+8
+	bcc	.L641
+	.loc 1 2335 0 is_stmt 0 discriminator 1
+	ldr	r1, .L653+4
+	movw	r2, #2335
+	ldr	r0, .L653+8
+.LVL658:
 	bl	printf
-	ldr	r1, .L654+12
-	ldr	r0, .L654+16
+.LVL659:
+	ldr	r1, .L653+12
+	ldr	r0, .L653+16
 	bl	printf
-.L642:
-	ldr	r3, .L654+20
+.LVL660:
+.L641:
+	.loc 1 2338 0 is_stmt 1
+	ldr	r3, .L653+20
 	add	r6, r4, #16
-	ldr	r10, .L654+40
+	.loc 1 2339 0
+	ldr	r10, .L653+40
+	.loc 1 2340 0
 	movw	r7, #65535
+	.loc 1 2336 0
 	movs	r5, #0
+	.loc 1 2338 0
 	ldrh	r8, [r3]
+	.loc 1 2336 0
 	strh	r5, [r4, #4]	@ movhi
+	.loc 1 2337 0
 	strb	r5, [r4, #7]
-.L643:
+.LVL661:
+.L642:
+	.loc 1 2338 0 discriminator 1
 	uxth	r3, r5
 	cmp	r8, r3
-	bhi	.L645
-	ldr	r2, .L654+24
+	bhi	.L644
+	.loc 1 2348 0
+	ldr	r2, .L653+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2]
 	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2349 0
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L654+28
+	.loc 1 2350 0
+	ldr	r3, .L653+28
 	ldr	r3, [r3]
-	cbz	r3, .L646
-	ldr	r3, .L654+32
+	cbz	r3, .L645
+	.loc 1 2350 0 is_stmt 0 discriminator 1
+	ldr	r3, .L653+32
 	ldrh	r2, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #59
+	.loc 1 2351 0 is_stmt 1 discriminator 1
 	itt	ls
 	movls	r3, #1
 	strbls	r3, [r4, #9]
-.L646:
-	ldr	r3, .L654+36
+.L645:
+	.loc 1 2354 0
+	ldr	r3, .L653+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L647
+	cbz	r3, .L646
+	.loc 1 2355 0
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L647:
+.L646:
+	.loc 1 2357 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L645:
+.LVL662:
+.L644:
+	.loc 1 2339 0
 	ldrh	r1, [r4]
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
+.LVL663:
+	.loc 1 2340 0
 	strh	r7, [r6]	@ movhi
+	.loc 1 2339 0
 	mov	fp, r0
+.LVL664:
+	.loc 1 2341 0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L644
+.LVL665:
+	cbnz	r0, .L643
+	.loc 1 2342 0
 	strh	fp, [r6]	@ movhi
+	.loc 1 2343 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L644:
+.L643:
+.LVL666:
 	adds	r5, r5, #1
+.LVL667:
 	adds	r6, r6, #2
-	b	.L643
-.L655:
-	.align	2
+	b	.L642
 .L654:
-	.word	.LANCHOR38
-	.word	.LANCHOR100
-	.word	.LC4
-	.word	.LC5
-	.word	.LC6
-	.word	.LANCHOR36
-	.word	.LANCHOR51
+	.align	2
+.L653:
+	.word	.LANCHOR39
 	.word	.LANCHOR101
-	.word	.LANCHOR77
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.word	.LANCHOR28
+	.word	.LANCHOR78
 	.word	.LANCHOR1
-	.word	.LANCHOR45
+	.word	.LANCHOR46
+	.cfi_endproc
+.LFE375:
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
@@ -4569,54 +7676,93 @@ make_superblock:
 	.fpu softvfp
 	.type	update_multiplier_value, %function
 update_multiplier_value:
+.LFB382:
+	.loc 1 2710 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL668:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 2714 0
 	movs	r5, #0
-	ldr	r3, .L662
+	ldr	r3, .L661
+	.loc 1 2710 0
 	mov	r6, r0
+	.loc 1 2712 0
 	mov	r4, r5
-	ldr	r10, .L662+12
+	.loc 1 2715 0
+	ldr	r10, .L661+12
+	.loc 1 2714 0
 	ldrh	r7, [r3]
-	ldr	r3, .L662+4
+	.loc 1 2717 0
+	ldr	r3, .L661+4
 	ldrh	r8, [r3]
-.L657:
+.LVL669:
+.L656:
+	.loc 1 2714 0 discriminator 1
 	uxth	r3, r5
 	cmp	r7, r3
-	bhi	.L659
-	cbz	r4, .L661
+	bhi	.L658
+	.loc 1 2719 0
+	cbz	r4, .L660
+	.loc 1 2720 0
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
-.L660:
-	ldr	r3, .L662+8
+.LVL670:
+.L659:
+	.loc 1 2721 0
+	ldr	r3, .L661+8
 	movs	r2, #6
 	ldr	r3, [r3]
 	mla	r6, r2, r6, r3
 	strh	r0, [r6, #4]	@ movhi
+	.loc 1 2723 0
 	movs	r0, #0
+.LVL671:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L659:
+.LVL672:
+.L658:
+	.loc 1 2715 0
 	mov	r1, r6
 	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
+.LVL673:
+	.loc 1 2716 0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L658
+.LVL674:
+	cbnz	r0, .L657
+	.loc 1 2717 0
 	add	r4, r4, r8
+.LVL675:
 	uxth	r4, r4
-.L658:
+.LVL676:
+.L657:
 	adds	r5, r5, #1
-	b	.L657
-.L661:
+.LVL677:
+	b	.L656
+.LVL678:
+.L660:
 	mov	r0, r4
-	b	.L660
-.L663:
-	.align	2
+	b	.L659
 .L662:
-	.word	.LANCHOR36
-	.word	.LANCHOR51
-	.word	.LANCHOR80
-	.word	.LANCHOR45
+	.align	2
+.L661:
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.word	.LANCHOR81
+	.word	.LANCHOR46
+	.cfi_endproc
+.LFE382:
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
@@ -4627,31 +7773,41 @@ update_multiplier_value:
 	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
+.LFB383:
+	.loc 1 2726 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L667
+.LVL679:
+	.loc 1 2729 0
+	ldr	r3, .L666
 	ldr	r0, [r3]
-	cbz	r0, .L665
-	ldr	r3, .L667+4
+	cbz	r0, .L664
+	.loc 1 2730 0
+	ldr	r3, .L666+4
 	ldr	r3, [r3]
 	subs	r0, r0, r3
-	ldr	r3, .L667+8
+	ldr	r3, .L666+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L667+12
+	ldr	r3, .L666+12
 	ldr	r3, [r3]
 	uxth	r0, r0
 	ldrh	r0, [r3, r0, lsl #1]
-.L665:
+.LVL680:
+.L664:
+	.loc 1 2732 0
 	bx	lr
-.L668:
-	.align	2
 .L667:
-	.word	.LANCHOR86
-	.word	.LANCHOR80
+	.align	2
+.L666:
+	.word	.LANCHOR87
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.cfi_endproc
+.LFE383:
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -4662,57 +7818,90 @@ GetFreeBlockMinEraseCount:
 	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
+.LFB384:
+	.loc 1 2735 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L677
+.LVL681:
+	.loc 1 2740 0
+	ldr	r3, .L676
+	.loc 1 2735 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 2740 0
 	ldr	r3, [r3]
-	cbz	r3, .L675
-	ldr	r2, .L677+4
+	cbz	r3, .L674
+	.loc 1 2741 0
+	ldr	r2, .L676+4
+	.loc 1 2745 0
 	movs	r5, #6
 	movw	r6, #65535
+	.loc 1 2741 0
 	ldrh	r2, [r2]
 	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
+	.loc 1 2742 0
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L677+8
+.LVL682:
+	.loc 1 2743 0
+	ldr	r2, .L676+8
 	ldr	r1, [r2]
-	ldr	r2, .L677+12
+	ldr	r2, .L676+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
+	.loc 1 2744 0
 	movs	r2, #0
+	.loc 1 2743 0
 	uxth	r3, r3
-.L672:
+.LVL683:
+.L671:
+	.loc 1 2744 0 discriminator 1
 	uxth	r4, r2
 	cmp	r0, r4
-	bls	.L674
+	bls	.L673
+	.loc 1 2745 0
 	mul	r4, r5, r3
 	adds	r2, r2, #1
+.LVL684:
 	ldrh	r4, [r1, r4]
 	cmp	r4, r6
-	bne	.L676
-.L674:
-	ldr	r2, .L677+16
+	bne	.L675
+.L673:
+	.loc 1 2749 0
+	ldr	r2, .L676+16
 	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
+.LVL685:
 	pop	{r4, r5, r6, pc}
-.L676:
-	mov	r3, r4
-	b	.L672
+.LVL686:
 .L675:
+	mov	r3, r4
+.LVL687:
+	b	.L671
+.L674:
+	.loc 1 2736 0
 	mov	r0, r3
+.LVL688:
+	.loc 1 2752 0
 	pop	{r4, r5, r6, pc}
-.L678:
-	.align	2
 .L677:
-	.word	.LANCHOR86
+	.align	2
+.L676:
 	.word	.LANCHOR87
-	.word	.LANCHOR80
+	.word	.LANCHOR88
+	.word	.LANCHOR81
 	.word	-1431655765
-	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.cfi_endproc
+.LFE384:
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -4723,24 +7912,45 @@ GetFreeBlockMaxEraseCount:
 	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
+.LFB385:
+	.loc 1 2843 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL689:
+	.loc 1 2844 0
 	movw	r2, #65535
+	.loc 1 2843 0
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 2844 0
 	cmp	r0, r2
-	beq	.L680
-	ldr	r2, .L681
+	beq	.L679
+.LVL690:
+.LBB291:
+.LBB292:
+	.loc 1 2846 0
+	ldr	r2, .L680
 	movs	r1, #0
 	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
+	.loc 1 2847 0
 	bl	INSERT_FREE_LIST
-.L680:
+.LVL691:
+.L679:
+.LBE292:
+.LBE291:
+	.loc 1 2849 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L682:
-	.align	2
 .L681:
-	.word	.LANCHOR82
+	.align	2
+.L680:
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE385:
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -4751,100 +7961,154 @@ free_data_superblock:
 	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
-	@ args = 0, pretend = 0, frame = 8
+.LFB391:
+	.file 6 "drivers/rknand/rkftl/FtlGc.c"
+	.loc 6 21 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 26 0
+	movs	r5, #12
+	ldr	r0, .L687
+	.loc 6 24 0
 	movs	r3, #0
-	ldr	r1, .L688
-	mov	fp, #1
-	ldr	r2, .L688+4
-	ldr	r5, [r1]
-	ldr	r1, .L688+8
+	.loc 6 27 0
+	ldr	r6, .L687+4
+	ldr	r7, .L687+8
+	.loc 6 28 0
+	ldr	ip, .L687+28
+	.loc 6 29 0
+	ldr	r8, .L687+32
+	.loc 6 24 0
+	ldr	r2, .L687+12
 	str	r3, [r2]
-	ldr	r2, .L688+12
-	mov	r0, r5
-	ldr	r1, [r1]
+.LVL692:
+.L683:
+	.loc 6 25 0 discriminator 1
+	ldr	r2, .L687+16
+	uxth	r1, r3
+	add	lr, r3, #1
 	ldrh	r2, [r2]
-	str	r1, [sp, #4]
-	ldr	r1, .L688+16
-	ldrh	r1, [r1]
-	str	r1, [sp]
-	ldr	r1, .L688+20
-	ldr	r10, [r1]
-	ldr	r1, .L688+24
-	ldrh	r7, [r1]
-	ldr	r1, .L688+28
-	ldr	r4, [r1]
-	movs	r1, #12
-	mla	r1, r2, r1, r1
-	adds	r4, r4, #8
-	add	r8, r5, r1
-	mov	r1, r3
+	cmp	r1, r2
+	bcc	.L684
+	.loc 6 33 0 discriminator 1
+	ldr	r0, .L687+20
+	.loc 6 34 0 discriminator 1
+	movs	r4, #12
+	ldr	r1, .L687
+	movs	r5, #0
+	.loc 6 35 0 discriminator 1
+	ldr	r6, .L687+4
+	ldr	r7, .L687+8
+	.loc 6 36 0 discriminator 1
+	ldr	ip, .L687+28
+	ldr	lr, .L687+24
+.LVL693:
+.L685:
+	.loc 6 33 0 discriminator 1
+	ldr	r3, [r0]
+	cmp	r2, r3
+	bcc	.L686
+	.loc 6 38 0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL694:
 .L684:
-	adds	r0, r0, #12
-	ldr	r6, [sp]
-	cmp	r0, r8
-	add	ip, r3, r7
-	add	r4, r4, #36
-	add	lr, r1, r6
-	bne	.L685
-	ldr	r3, .L688+32
-	mov	lr, #12
-	mov	r8, #0
-	ldr	r0, [r3]
-	ldr	r3, .L688+8
-	ldr	r4, [r3]
-	ldr	r3, .L688+20
-	ldr	ip, [r3]
+	uxth	r3, r3
+	.loc 6 26 0 discriminator 3
+	ldr	r10, [r0]
+	movs	r4, #1
+	mul	r2, r5, r3
+	add	r1, r10, r2
+	str	r4, [r1, #8]
+	.loc 6 27 0 discriminator 3
+	ldrh	r4, [r7]
+	ldr	r1, [r6]
+	muls	r4, r3, r4
+	bic	r4, r4, #3
+	add	r1, r1, r4
+	str	r1, [r10, r2]
+	.loc 6 28 0 discriminator 3
+	ldr	r1, .L687+24
+	ldr	r10, [r0]
+	ldrh	fp, [r1]
+	ldr	r1, [ip]
+	add	r4, r10, r2
+	mul	fp, r3, fp
+	bic	fp, fp, #3
+	add	r1, r1, fp
+	.loc 6 29 0 discriminator 3
+	mov	fp, #36
+	.loc 6 28 0 discriminator 3
+	str	r1, [r4, #4]
+	.loc 6 29 0 discriminator 3
+	ldr	r1, [r8]
+	ldr	r2, [r10, r2]
+	mla	r3, fp, r3, r1
+.LVL695:
+	str	r2, [r3, #8]
+	.loc 6 30 0 discriminator 3
+	ldr	r2, [r4, #4]
+	str	r2, [r3, #12]
+.LVL696:
+	mov	r3, lr
+	b	.L683
+.LVL697:
 .L686:
-	cmp	r2, r0
-	bcc	.L687
-	add	sp, sp, #8
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L685:
-	bic	r1, r1, #3
-	bic	r3, r3, #3
-	mov	r6, r1
-	ldr	r1, [sp, #4]
+	.loc 6 35 0 discriminator 3
+	ldrh	r10, [r7]
+	.loc 6 34 0 discriminator 3
+	mul	r8, r4, r2
+	ldr	fp, [r1]
+	.loc 6 35 0 discriminator 3
+	mul	r10, r2, r10
+	.loc 6 34 0 discriminator 3
+	add	r3, fp, r8
+	str	r5, [r3, #8]
+	.loc 6 35 0 discriminator 3
+	ldr	r3, [r6]
+	bic	r10, r10, #3
 	add	r3, r3, r10
-	str	fp, [r0, #-4]
-	str	r3, [r0, #-8]
-	add	r6, r6, r1
-	mov	r1, lr
-	str	r6, [r0, #-12]
-	str	r3, [r4, #-32]
-	mov	r3, ip
-	str	r6, [r4, #-36]
-	b	.L684
-.L687:
-	ldr	r3, [sp]
-	mul	r10, lr, r2
-	muls	r3, r2, r3
-	add	r1, r5, r10
-	str	r8, [r1, #8]
-	bic	r3, r3, #3
-	add	r3, r3, r4
-	str	r3, [r5, r10]
-	mul	r3, r2, r7
+	str	r3, [fp, r8]
+	.loc 6 36 0 discriminator 3
+	ldrh	r10, [lr]
+	ldr	r3, [r1]
+	mul	r10, r2, r10
+	add	r8, r8, r3
+	ldr	r3, [ip]
+	.loc 6 33 0 discriminator 3
 	adds	r2, r2, #1
+.LVL698:
 	uxth	r2, r2
-	bic	r3, r3, #3
-	add	r3, r3, ip
-	str	r3, [r1, #4]
-	b	.L686
-.L689:
-	.align	2
+.LVL699:
+	.loc 6 36 0 discriminator 3
+	bic	r10, r10, #3
+	add	r3, r3, r10
+	str	r3, [r8, #4]
+	b	.L685
 .L688:
+	.align	2
+.L687:
 	.word	.LANCHOR103
-	.word	.LANCHOR102
 	.word	.LANCHOR104
-	.word	.LANCHOR36
-	.word	.LANCHOR56
-	.word	.LANCHOR105
 	.word	.LANCHOR57
-	.word	.LANCHOR106
+	.word	.LANCHOR102
+	.word	.LANCHOR37
 	.word	.LANCHOR107
+	.word	.LANCHOR58
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.cfi_endproc
+.LFE391:
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -4855,45 +8119,80 @@ FtlGcBufInit:
 	.fpu softvfp
 	.type	FtlGcBufFree, %function
 FtlGcBufFree:
+.LFB392:
+	.loc 6 41 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L697
+.LVL700:
+	.loc 6 46 0
+	ldr	r3, .L696
+	.loc 6 47 0
 	mov	ip, #12
+	.loc 6 41 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 45 0
 	movs	r4, #0
+	.loc 6 47 0
 	mov	fp, #36
+	.loc 6 48 0
 	mov	lr, r4
+	.loc 6 46 0
 	ldr	r7, [r3]
-	ldr	r3, .L697+4
+	.loc 6 47 0
+	ldr	r3, .L696+4
 	ldr	r5, [r3]
-.L691:
+.LVL701:
+.L690:
 	uxth	r3, r4
+	.loc 6 45 0 discriminator 1
 	cmp	r1, r3
-	bls	.L690
+	bls	.L689
+	.loc 6 47 0
 	mla	r8, fp, r3, r0
 	movs	r2, #0
-.L692:
+.L691:
+.LVL702:
 	uxth	r3, r2
+	.loc 6 46 0 discriminator 1
 	cmp	r7, r3
-	bls	.L693
+	bls	.L692
+	.loc 6 47 0
 	mul	r3, ip, r3
 	ldr	r6, [r8, #8]
 	adds	r2, r2, #1
+.LVL703:
 	add	r10, r5, r3
 	ldr	r3, [r5, r3]
 	cmp	r3, r6
-	bne	.L692
+	bne	.L691
+	.loc 6 48 0
 	str	lr, [r10, #8]
-.L693:
+.L692:
+.LVL704:
 	adds	r4, r4, #1
-	b	.L691
-.L690:
+.LVL705:
+	b	.L690
+.LVL706:
+.L689:
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L698:
-	.align	2
+.LVL707:
 .L697:
+	.align	2
+.L696:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
+	.cfi_endproc
+.LFE392:
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -4904,47 +8203,82 @@ FtlGcBufFree:
 	.fpu softvfp
 	.type	FtlGcBufAlloc, %function
 FtlGcBufAlloc:
+.LFB393:
+	.loc 6 56 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L706
+.LVL708:
+	.loc 6 61 0
+	ldr	r3, .L705
+	.loc 6 60 0
 	movs	r2, #0
+	.loc 6 56 0
 	push	{r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 28
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 6 62 0
 	mov	ip, #12
+	.loc 6 63 0
 	movs	r7, #1
+	.loc 6 64 0
 	mov	lr, #36
+	.loc 6 61 0
 	ldr	r4, [r3]
-	ldr	r3, .L706+4
+	.loc 6 62 0
+	ldr	r3, .L705+4
 	ldr	r5, [r3]
-.L700:
+.LVL709:
+.L699:
 	uxth	r8, r2
+	.loc 6 60 0 discriminator 1
 	cmp	r1, r8
-	bhi	.L704
+	bhi	.L703
+	.loc 6 70 0
 	pop	{r4, r5, r6, r7, r8, r10, pc}
-.L704:
+.L703:
 	mov	r10, #0
-.L701:
+.L700:
+.LVL710:
 	uxth	r3, r10
+	.loc 6 61 0 discriminator 1
 	cmp	r4, r3
-	bls	.L702
+	bls	.L701
+	.loc 6 62 0
 	mla	r3, ip, r3, r5
 	add	r10, r10, #1
+.LVL711:
 	ldr	r6, [r3, #8]
 	cmp	r6, #0
-	bne	.L701
+	bne	.L700
+	.loc 6 64 0
 	mla	r8, lr, r8, r0
-	str	r7, [r3, #8]
 	ldr	r6, [r3]
-	ldr	r3, [r3, #4]
+	.loc 6 63 0
+	str	r7, [r3, #8]
+	.loc 6 64 0
 	str	r6, [r8, #8]
+	.loc 6 65 0
+	ldr	r3, [r3, #4]
 	str	r3, [r8, #12]
-.L702:
+.L701:
+.LVL712:
 	adds	r2, r2, #1
-	b	.L700
-.L707:
-	.align	2
+.LVL713:
+	b	.L699
 .L706:
+	.align	2
+.L705:
 	.word	.LANCHOR107
 	.word	.LANCHOR103
+	.cfi_endproc
+.LFE393:
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -4955,30 +8289,48 @@ FtlGcBufAlloc:
 	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
+.LFB394:
+	.loc 6 73 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L713
-	ldr	r2, .L713+4
+.LVL714:
+	.loc 6 77 0
+	ldr	r3, .L712
+	.loc 6 76 0
+	ldr	r2, .L712+4
+	.loc 6 77 0
 	ldr	r3, [r3]
 	ldrh	r2, [r2]
 	add	r2, r3, r2, lsl #1
-.L709:
+.LVL715:
+.L708:
+	.loc 6 76 0 discriminator 1
 	cmp	r3, r2
-	bne	.L711
+	bne	.L710
+	.loc 6 80 0
 	movs	r0, #0
+.LVL716:
 	bx	lr
-.L711:
+.LVL717:
+.L710:
+	.loc 6 77 0
 	ldrh	r1, [r3], #2
 	cmp	r1, r0
-	bne	.L709
+	bne	.L708
+	.loc 6 78 0
 	movs	r0, #1
+.LVL718:
+	.loc 6 81 0
 	bx	lr
-.L714:
-	.align	2
 .L713:
+	.align	2
+.L712:
 	.word	.LANCHOR108
 	.word	.LANCHOR109
+	.cfi_endproc
+.LFE394:
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -4989,56 +8341,95 @@ IsBlkInGcList:
 	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
+.LFB395:
+	.loc 6 84 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL719:
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 6 84 0
 	mov	r5, r0
-	ldr	r4, .L719
+	.loc 6 90 0
+	ldr	r4, .L718
+	.loc 6 87 0
 	ubfx	r0, r0, #10, #16
+.LVL720:
+	.loc 6 84 0
 	mov	r6, r1
 	mov	r7, r2
+	.loc 6 87 0
 	bl	P2V_block_in_plane
-	ldr	r3, .L719+4
+.LVL721:
+	.loc 6 91 0
+	ldr	r3, .L718+4
+	.loc 6 90 0
 	ldrh	r1, [r4]
+	.loc 6 91 0
 	ldr	r2, [r3]
+	.loc 6 90 0
 	movs	r3, #0
-.L716:
+.LVL722:
+.L715:
 	uxth	ip, r3
+.LVL723:
+	.loc 6 90 0 is_stmt 0 discriminator 1
 	cmp	ip, r1
-	bcc	.L718
-	bne	.L717
+	bcc	.L717
+	.loc 6 95 0 is_stmt 1
+	bne	.L716
+	.loc 6 96 0
 	strh	r0, [r2, ip, lsl #1]	@ movhi
+	.loc 6 97 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L717
-.L718:
+	b	.L716
+.L717:
 	adds	r3, r3, #1
+	.loc 6 91 0
 	add	ip, r2, r3, lsl #1
+.LVL724:
 	ldrh	ip, [ip, #-2]
 	cmp	ip, r0
-	bne	.L716
-.L717:
-	ldr	r2, .L719+8
-	movs	r0, #12
-	ldr	r1, .L719+12
-	ldrh	r3, [r2]
-	ldr	r1, [r1]
-	muls	r0, r3, r0
+	bne	.L715
+.L716:
+	.loc 6 100 0
+	ldr	r0, .L718+8
+.LVL725:
+	movs	r3, #12
+	ldrh	r2, [r0]
+	muls	r3, r2, r3
+	ldr	r2, .L718+12
+	ldr	r2, [r2]
+	adds	r1, r2, r3
+	str	r6, [r1, #4]
+	.loc 6 101 0
+	str	r7, [r1, #8]
+	.loc 6 102 0
+	str	r5, [r2, r3]
+	.loc 6 106 0
+	ldrh	r3, [r0]
 	adds	r3, r3, #1
-	adds	r4, r1, r0
-	str	r6, [r4, #4]
-	str	r7, [r4, #8]
-	str	r5, [r1, r0]
-	strh	r3, [r2]	@ movhi
+	strh	r3, [r0]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L720:
-	.align	2
+.LVL726:
 .L719:
+	.align	2
+.L718:
 	.word	.LANCHOR109
 	.word	.LANCHOR108
-	.word	.LANCHOR110
 	.word	.LANCHOR111
+	.word	.LANCHOR110
+	.cfi_endproc
+.LFE395:
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
@@ -5049,34 +8440,53 @@ FtlGcUpdatePage:
 	.fpu softvfp
 	.type	FtlGcRefreshBlock, %function
 FtlGcRefreshBlock:
+.LFB403:
+	.loc 6 380 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL727:
 	push	{r4, r5, lr}
-	ldr	r4, .L724
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 384 0
+	ldr	r4, .L723
 	ldrh	r5, [r4]
 	cmp	r5, r0
-	beq	.L722
-	ldr	r3, .L724+4
+	beq	.L721
+	.loc 6 384 0 is_stmt 0 discriminator 1
+	ldr	r3, .L723+4
 	ldrh	r1, [r3]
 	cmp	r0, r1
-	beq	.L722
+	beq	.L721
+	.loc 6 386 0 is_stmt 1
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L723
+	bne	.L722
+	.loc 6 387 0
 	strh	r0, [r4]	@ movhi
-.L722:
+.L721:
+	.loc 6 400 0
 	movs	r0, #0
+.LVL728:
 	pop	{r4, r5, pc}
-.L723:
+.LVL729:
+.L722:
+	.loc 6 388 0
 	cmp	r1, r2
+	.loc 6 389 0
 	it	eq
 	strheq	r0, [r3]	@ movhi
-	b	.L722
-.L725:
-	.align	2
+	b	.L721
 .L724:
+	.align	2
+.L723:
 	.word	.LANCHOR112
 	.word	.LANCHOR113
+	.cfi_endproc
+.LFE403:
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
@@ -5087,10 +8497,14 @@ FtlGcRefreshBlock:
 	.fpu softvfp
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
+.LFB544:
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	b	FtlGcRefreshBlock
+	.cfi_endproc
+.LFE544:
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -5101,55 +8515,91 @@ FtlGcRefreshOpenBlock:
 	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
+.LFB404:
+	.loc 6 403 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL730:
+	.loc 6 403 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 403 0
 	mov	r4, r0
+	.loc 6 405 0
 	bl	P2V_block_in_plane
+.LVL731:
 	mov	r5, r0
+.LVL732:
+	.loc 6 410 0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L735
+.LVL733:
+	.loc 6 411 0
+	ldr	r3, .L734
 	ldr	r3, [r3]
-	cbz	r3, .L728
-	ldr	r3, .L735+4
+	cbz	r3, .L727
+	.loc 6 412 0
+	ldr	r3, .L734+4
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r5, lsl #1]
 	cmp	r3, #29
+	.loc 6 413 0
 	itt	hi
 	subhi	r3, r3, #30
 	strhhi	r3, [r2, r5, lsl #1]	@ movhi
-.L728:
-	ldr	r2, .L735+8
+.L727:
+.LVL734:
+	.loc 6 416 0
+	ldr	r2, .L734+8
 	movs	r1, #0
-	ldr	r5, .L735+12
+	.loc 6 417 0
+	ldr	r5, .L734+12
+.LVL735:
+	.loc 6 416 0
 	ldrh	r3, [r2]
-.L729:
+.LVL736:
+.L728:
+	.loc 6 416 0 is_stmt 0 discriminator 1
 	uxth	r0, r1
 	cmp	r3, r0
-	bhi	.L731
+	bhi	.L730
+	.loc 6 420 0 is_stmt 1
 	cmp	r3, #15
+	.loc 6 421 0
 	itttt	ls
 	addls	r1, r3, #1
+.LVL737:
 	strhls	r1, [r2]	@ movhi
-	ldrls	r2, .L735+12
+	ldrls	r2, .L734+12
 	strhls	r4, [r2, r3, lsl #1]	@ movhi
-	b	.L730
-.L731:
+	b	.L729
+.LVL738:
+.L730:
 	adds	r1, r1, #1
+.LVL739:
+	.loc 6 417 0
 	add	r0, r5, r1, lsl #1
+.LVL740:
 	ldrh	r0, [r0, #-2]
 	cmp	r0, r4
-	bne	.L729
-.L730:
+	bne	.L728
+.L729:
+	.loc 6 423 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L736:
-	.align	2
 .L735:
-	.word	.LANCHOR101
-	.word	.LANCHOR77
+	.align	2
+.L734:
+	.word	.LANCHOR28
+	.word	.LANCHOR78
 	.word	.LANCHOR114
 	.word	.LANCHOR115
+	.cfi_endproc
+.LFE404:
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -5160,41 +8610,64 @@ FtlGcMarkBadPhyBlk:
 	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
+.LFB405:
+	.loc 6 427 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L743
+	.loc 6 428 0
+	ldr	r3, .L742
+	.loc 6 427 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 6 428 0
 	ldrh	r3, [r3]
-	cbz	r3, .L738
-	ldr	r2, .L743+4
+	cbz	r3, .L737
+	.loc 6 428 0 is_stmt 0 discriminator 1
+	ldr	r2, .L742+4
 	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L738
-	ldr	r4, .L743+8
+	bne	.L737
+	.loc 6 429 0 is_stmt 1
+	ldr	r4, .L742+8
 	ldrh	r2, [r4]
 	cmp	r2, r3
+	.loc 6 430 0
 	itt	cs
 	movcs	r3, #0
 	strhcs	r3, [r4]	@ movhi
-	ldr	r3, .L743+12
+.LBB295:
+.LBB296:
+	.loc 6 431 0
+	ldr	r3, .L742+12
 	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
+.LVL741:
 	bl	FtlGcRefreshBlock
+.LVL742:
+	.loc 6 432 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-.L738:
+.L737:
+.LBE296:
+.LBE295:
+	.loc 6 435 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L744:
-	.align	2
 .L743:
+	.align	2
+.L742:
 	.word	.LANCHOR114
 	.word	.LANCHOR112
 	.word	.LANCHOR116
 	.word	.LANCHOR115
+	.cfi_endproc
+.LFE405:
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -5205,10 +8678,19 @@ FtlGcReFreshBadBlk:
 	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
+.LFB480:
+	.file 7 "drivers/rknand/rkftl/FTL_OSDepend_3.10.c"
+	.loc 7 27 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL743:
+	.loc 7 28 0
 	b	memset
+.LVL744:
+	.cfi_endproc
+.LFE480:
 	.size	ftl_memset, .-ftl_memset
 	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
 	.align	1
@@ -5219,172 +8701,273 @@ ftl_memset:
 	.fpu softvfp
 	.type	BuildFlashLsbPageTable, %function
 BuildFlashLsbPageTable:
+.LFB233:
+	.loc 2 930 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL745:
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 2 930 0
 	mov	r4, r1
-	cbnz	r0, .L747
-	ldr	r3, .L784
-.L748:
+	.loc 2 933 0
+	cbnz	r0, .L746
+	.loc 2 935 0 discriminator 3
+	ldr	r3, .L783
+.LVL746:
+.L747:
 	strh	r0, [r3, r0, lsl #1]	@ movhi
+.LVL747:
 	adds	r0, r0, #1
+.LVL748:
+	.loc 2 934 0 discriminator 3
 	cmp	r0, #256
-	bne	.L748
-.L754:
+	bne	.L747
+.LVL749:
+.L753:
+	.loc 2 966 0
 	movs	r1, #255
 	mov	r2, #1024
-	ldr	r0, .L784+4
+	ldr	r0, .L783+4
+	.loc 2 967 0
 	uxth	r4, r4
+.LVL750:
+	.loc 2 966 0
 	bl	ftl_memset
-	ldr	r1, .L784
+.LVL751:
+	.loc 2 969 0
+	ldr	r1, .L783
+	.loc 2 968 0
 	movs	r3, #0
-	ldr	r0, .L784+4
-.L749:
+	.loc 2 969 0
+	ldr	r0, .L783+4
+.LVL752:
+.L748:
+	.loc 2 968 0 discriminator 1
 	uxth	r2, r3
 	cmp	r4, r2
-	bhi	.L771
+	bhi	.L770
+	.loc 2 974 0
 	pop	{r4, pc}
-.L747:
+.LVL753:
+.L746:
+	.loc 2 936 0
 	cmp	r0, #1
-	bne	.L750
-	ldr	r1, .L784
+	bne	.L749
+	.loc 2 939 0
+	ldr	r1, .L783
+.LVL754:
 	movs	r3, #0
-.L753:
+.LVL755:
+.L752:
 	cmp	r3, #3
 	uxth	r2, r3
-	bls	.L751
+.LVL756:
+	bls	.L750
+	.loc 2 939 0 is_stmt 0 discriminator 1
 	tst	r2, #1
 	ite	ne
 	movne	r0, #3
 	moveq	r0, #2
 	rsb	r2, r0, r2, lsl #1
+.LVL757:
 	uxth	r2, r2
-.L751:
+.L750:
+	.loc 2 939 0 discriminator 8
 	strh	r2, [r1, r3, lsl #1]	@ movhi
+.LVL758:
 	adds	r3, r3, #1
+.LVL759:
+	.loc 2 938 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L753
-	b	.L754
-.L750:
+	bne	.L752
+	b	.L753
+.LVL760:
+.L749:
+	.loc 2 940 0
 	cmp	r0, #2
-	bne	.L755
-	ldr	r1, .L784
+	bne	.L754
+	.loc 2 943 0
+	ldr	r1, .L783
+.LVL761:
 	movs	r2, #0
-.L757:
+.L756:
 	uxth	r3, r2
+.LVL762:
 	cmp	r2, #1
 	ittt	hi
 	lslhi	r3, r3, #1
+.LVL763:
 	addhi	r3, r3, #-1
 	uxthhi	r3, r3
 	strh	r3, [r1, r2, lsl #1]	@ movhi
+.LVL764:
 	adds	r2, r2, #1
+.LVL765:
+	.loc 2 942 0
 	cmp	r2, #256
-	bne	.L757
-	b	.L754
-.L755:
+	bne	.L756
+	b	.L753
+.LVL766:
+.L754:
+	.loc 2 944 0
 	cmp	r0, #3
-	bne	.L758
-	ldr	r1, .L784
+	bne	.L757
+	.loc 2 947 0
+	ldr	r1, .L783
+.LVL767:
 	movs	r3, #0
-.L761:
+.LVL768:
+.L760:
 	cmp	r3, #5
 	uxth	r2, r3
-	bls	.L759
+.LVL769:
+	bls	.L758
+	.loc 2 947 0 is_stmt 0 discriminator 1
 	tst	r2, #1
 	ite	ne
 	movne	r0, #5
 	moveq	r0, #4
 	rsb	r2, r0, r2, lsl #1
+.LVL770:
 	uxth	r2, r2
-.L759:
+.L758:
+	.loc 2 947 0 discriminator 8
 	strh	r2, [r1, r3, lsl #1]	@ movhi
+.LVL771:
 	adds	r3, r3, #1
+.LVL772:
+	.loc 2 946 0 is_stmt 1 discriminator 8
 	cmp	r3, #256
-	bne	.L761
-	b	.L754
-.L758:
+	bne	.L760
+	b	.L753
+.LVL773:
+.L757:
+	.loc 2 948 0
 	cmp	r0, #4
 	mov	r3, #0
-	bne	.L762
-	ldr	r2, .L784
+	bne	.L761
+.LVL774:
+	.loc 2 951 0 discriminator 2
+	ldr	r2, .L783
 	strh	r3, [r2]	@ movhi
+.LVL775:
 	movs	r3, #1
 	strh	r3, [r2, #2]	@ movhi
+.LVL776:
 	movs	r3, #2
 	strh	r3, [r2, #4]	@ movhi
+.LVL777:
 	movs	r3, #3
 	strh	r3, [r2, #6]	@ movhi
+.LVL778:
 	movs	r3, #5
 	strh	r3, [r2, #10]	@ movhi
 	movs	r3, #7
 	strh	r3, [r2, #12]	@ movhi
 	movs	r3, #8
 	strh	r0, [r2, #8]	@ movhi
+.LVL779:
 	strh	r3, [r2, #14]!	@ movhi
-.L764:
+.LVL780:
+.L763:
+	.loc 2 953 0
 	tst	r3, #1
 	ite	ne
 	movne	r1, #7
 	moveq	r1, #6
 	rsb	r1, r1, r3, lsl #1
+	.loc 2 952 0
 	adds	r3, r3, #1
+.LVL781:
 	uxth	r3, r3
+.LVL782:
+	.loc 2 953 0
 	strh	r1, [r2, #2]!	@ movhi
+	.loc 2 952 0
 	cmp	r3, #256
-	bne	.L764
-	b	.L754
-.L762:
+	bne	.L763
+	b	.L753
+.LVL783:
+.L761:
+	.loc 2 954 0
 	cmp	r0, #5
-	bne	.L765
-	ldr	r2, .L784
-.L766:
+	bne	.L764
+	.loc 2 957 0 discriminator 3
+	ldr	r2, .L783
+.L765:
+.LVL784:
 	strh	r3, [r2, r3, lsl #1]	@ movhi
+.LVL785:
 	adds	r3, r3, #1
+.LVL786:
+	.loc 2 956 0 discriminator 3
 	cmp	r3, #16
-	bne	.L766
-	ldr	r2, .L784+8
-.L767:
+	bne	.L765
+	ldr	r2, .L783+8
+.LVL787:
+.L766:
+	.loc 2 959 0 discriminator 2
 	strh	r3, [r2, #2]!	@ movhi
 	adds	r3, r3, #2
 	uxth	r3, r3
+	.loc 2 958 0 discriminator 2
 	cmp	r3, #496
-	bne	.L767
-	b	.L754
-.L765:
+	bne	.L766
+	b	.L753
+.L764:
+	.loc 2 960 0
 	cmp	r0, #6
-	bne	.L754
-	ldr	r0, .L784
+	bne	.L753
+	.loc 2 963 0
+	ldr	r0, .L783
+.LVL788:
 	mov	r1, r3
-.L770:
+.LVL789:
+.L769:
 	cmp	r1, #5
 	uxth	r2, r1
-	bls	.L768
+.LVL790:
+	bls	.L767
+	.loc 2 963 0 is_stmt 0 discriminator 1
 	tst	r2, #1
 	ite	ne
 	movne	r2, #12
+.LVL791:
 	moveq	r2, #10
 	subs	r2, r3, r2
 	uxth	r2, r2
-.L768:
+.L767:
+	.loc 2 963 0 discriminator 8
 	strh	r2, [r0, r1, lsl #1]	@ movhi
+.LVL792:
 	adds	r1, r1, #1
+.LVL793:
+	.loc 2 962 0 is_stmt 1 discriminator 8
 	cmp	r1, #256
 	add	r3, r3, #3
 	uxth	r3, r3
-	bne	.L770
-	b	.L754
-.L771:
+	bne	.L769
+	b	.L753
+.LVL794:
+.L770:
+	.loc 2 969 0 discriminator 3
 	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
+.LVL795:
 	strh	r2, [r0, r2, lsl #1]	@ movhi
-	b	.L749
-.L785:
-	.align	2
+	b	.L748
 .L784:
+	.align	2
+.L783:
 	.word	.LANCHOR16
 	.word	.LANCHOR117
 	.word	.LANCHOR16+30
+	.cfi_endproc
+.LFE233:
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",%progbits
 	.align	1
@@ -5395,129 +8978,191 @@ BuildFlashLsbPageTable:
 	.fpu softvfp
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
+.LFB248:
+	.loc 2 2048 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2051 0
 	movs	r3, #0
-	ldr	r2, .L804
-	ldr	r4, .L804+4
+	.loc 2 2052 0
+	ldr	r2, .L803
+	.loc 2 2051 0
+	ldr	r5, .L803+4
+	.loc 2 2052 0
 	strb	r3, [r2]
-	str	r2, [sp]
-	strb	r3, [r4]
-	ldr	r3, .L804+8
-	ldr	r7, .L804+12
+	mov	fp, r2
+	ldr	r7, .L803+8
+	.loc 2 2051 0
+	strb	r3, [r5]
+	.loc 2 2053 0
+	ldr	r3, .L803+12
 	ldrh	r3, [r3, #10]
+	.loc 2 2054 0
 	cmp	r3, #256
-	bls	.L787
+	bls	.L786
+	.loc 2 2055 0
 	mov	r3, #512
-.L803:
+.L802:
+	.loc 2 2059 0
 	movs	r2, #8
 	movs	r1, #0
-	ldr	r0, .L804+16
+	ldr	r0, .L803+16
+	.loc 2 2066 0
 	movs	r6, #0
+	.loc 2 2057 0
 	str	r3, [r7]
+	.loc 2 2059 0
 	bl	ftl_memset
+.LVL796:
+	.loc 2 2060 0
 	movs	r2, #32
 	movs	r1, #0
-	ldr	r0, .L804+20
+	ldr	r0, .L803+20
 	bl	ftl_memset
+.LVL797:
+	.loc 2 2061 0
 	movs	r2, #128
 	movs	r1, #0
-	ldr	r0, .L804+24
+	ldr	r0, .L803+24
 	bl	ftl_memset
-	ldr	r3, .L804+28
-	ldr	fp, .L804+36
-	ldr	r5, [r3]
-	ldr	r3, .L804+16
-	ldrb	r10, [r5]	@ zero_extendqisi2
-	add	r8, r5, #1
-.L791:
-	mov	r2, r10
-	add	r1, fp, r6, lsl #3
+.LVL798:
+	.loc 2 2067 0
+	ldr	r3, .L803+28
+	ldr	r10, .L803+36
+	ldr	r4, [r3]
+	.loc 2 2069 0
+	ldr	r3, .L803+16
+	.loc 2 2067 0
+	add	r8, r4, #1
+.LVL799:
+.L790:
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	add	r1, r10, r6, lsl #3
 	mov	r0, r8
 	str	r3, [sp, #4]
+.LVL800:
 	bl	FlashMemCmp8
+.LVL801:
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L790
-	ldrb	r2, [r4]	@ zero_extendqisi2
-	ldr	r1, .L804+20
+	cbnz	r0, .L789
+	.loc 2 2068 0
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldr	r1, .L803+20
+	.loc 2 2069 0
 	strb	r6, [r3, r2]
+	.loc 2 2068 0
 	str	r0, [r1, r2, lsl #2]
+	.loc 2 2069 0
 	adds	r1, r2, #1
-	strb	r1, [r4]
-.L790:
+	strb	r1, [r5]
+.L789:
+	.loc 2 2066 0 discriminator 2
 	adds	r6, r6, #1
+.LVL802:
 	cmp	r6, #4
-	bne	.L791
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	ldr	r2, [sp]
-	strb	r3, [r2]
-	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	bne	.L790
+	.loc 2 2076 0
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	strb	r3, [fp]
+	.loc 2 2077 0
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #2
-	beq	.L792
-.L796:
-	ldrh	r2, [r5, #14]
-	ldrb	r3, [r4]	@ zero_extendqisi2
+	beq	.L791
+.L795:
+	.loc 2 2087 0
+	ldrh	r2, [r4, #14]
+	ldrb	r3, [r5]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
 	smulbb	r3, r3, r2
-	ldr	r2, .L804+32
+	ldr	r2, .L803+32
 	strh	r3, [r2]	@ movhi
+	.loc 2 2088 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L787:
+.LVL803:
+.L786:
+	.cfi_restore_state
+	.loc 2 2056 0
 	cmp	r3, #128
+	.loc 2 2057 0
 	it	hi
 	movhi	r3, #256
-	b	.L803
-.L792:
-	ldr	fp, [r7]
+	b	.L802
+.LVL804:
+.L791:
+	.loc 2 2080 0
+	ldr	r10, [r7]
 	movs	r6, #0
-	ldr	r7, .L804+20
-	ldr	r3, .L804+16
-.L795:
-	str	r3, [sp]
-	mov	r2, r10
-	ldr	r3, .L804+36
+.LVL805:
+	ldr	r7, .L803+20
+	.loc 2 2083 0
+	ldr	fp, .L803+16
+.L794:
+.LVL806:
+	.loc 2 2079 0
+	ldr	r3, .L803+36
 	mov	r0, r8
+	ldrb	r2, [r4]	@ zero_extendqisi2
 	add	r1, r3, r6, lsl #3
 	bl	FlashMemCmp8
-	ldr	r3, [sp]
-	cbnz	r0, .L793
-	ldrh	r2, [r5, #14]
-	ldrb	r1, [r4]	@ zero_extendqisi2
-	and	r0, r2, #65280
-	ldrb	r2, [r5, #13]	@ zero_extendqisi2
-	mul	r2, fp, r2
-	muls	r2, r0, r2
-	str	r2, [r7, r1, lsl #2]
-	ldrb	r0, [r5, #23]	@ zero_extendqisi2
-	cbz	r0, .L794
-	lsls	r2, r2, #1
-	str	r2, [r7, r1, lsl #2]
-.L794:
-	adds	r2, r1, #1
-	strb	r6, [r3, r1]
-	strb	r2, [r4]
+.LVL807:
+	cbnz	r0, .L792
+	.loc 2 2080 0
+	ldrh	r3, [r4, #14]
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	and	r1, r3, #65280
+	ldrb	r3, [r4, #13]	@ zero_extendqisi2
+	mul	r3, r10, r3
+	muls	r3, r1, r3
+	str	r3, [r7, r2, lsl #2]
+	.loc 2 2081 0
+	ldrb	r1, [r4, #23]	@ zero_extendqisi2
+	cbz	r1, .L793
+	.loc 2 2082 0
+	lsls	r3, r3, #1
+	str	r3, [r7, r2, lsl #2]
 .L793:
+	.loc 2 2083 0
+	adds	r3, r2, #1
+	strb	r6, [fp, r2]
+	strb	r3, [r5]
+.L792:
+	.loc 2 2078 0 discriminator 2
 	adds	r6, r6, #1
+.LVL808:
 	cmp	r6, #4
-	bne	.L795
-	b	.L796
-.L805:
-	.align	2
+	bne	.L794
+	b	.L795
 .L804:
+	.align	2
+.L803:
 	.word	.LANCHOR118
 	.word	.LANCHOR25
-	.word	.LANCHOR29
 	.word	.LANCHOR3
+	.word	.LANCHOR30
 	.word	.LANCHOR26
 	.word	.LANCHOR17
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR119
 	.word	.LANCHOR22
+	.cfi_endproc
+.LFE248:
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
@@ -5528,69 +9173,111 @@ FlashDieInfoInit:
 	.fpu softvfp
 	.type	ReadFlashInfo, %function
 ReadFlashInfo:
+.LFB266:
+	.loc 2 3343 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL809:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 2 3346 0
 	movs	r2, #11
 	movs	r1, #0
+	.loc 2 3343 0
 	mov	r4, r0
+.LVL810:
+	.loc 2 3360 0
+	movs	r5, #1
+	.loc 2 3346 0
 	bl	ftl_memset
-	ldr	r3, .L809
+.LVL811:
+	.loc 2 3348 0
+	ldr	r1, .L808
+	ldr	r2, .L808+4
+	ldr	r3, [r1]
+	ldr	r2, [r2]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
 	movs	r2, #0
-	ldr	r1, [r3]
-	ldr	r3, .L809+4
-	ldrb	r0, [r1, #9]	@ zero_extendqisi2
-	ldr	r3, [r3]
-	smulbb	r3, r3, r0
 	uxth	r3, r3
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
 	strb	r3, [r4, #5]
-	ldr	r3, .L809+8
+	.loc 2 3349 0
+	ldr	r3, .L808+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	ldr	r3, .L809+12
-	ldrb	r5, [r3]	@ zero_extendqisi2
-	strb	r5, [r4]
-	ldrb	r5, [r3, #1]	@ zero_extendqisi2
-	strb	r5, [r4, #1]
-	ldrb	r5, [r3, #2]	@ zero_extendqisi2
-	ldrb	r3, [r3, #3]	@ zero_extendqisi2
-	strb	r0, [r4, #6]
-	strb	r5, [r4, #2]
-	movs	r5, #1
+.LBB297:
+.LBB298:
+	.loc 4 1826 0
+	ldr	r3, .L808+12
+	ldr	r3, [r3]
+.LBE298:
+.LBE297:
+	.loc 2 3351 0
+	ubfx	r0, r3, #8, #8
+	strb	r3, [r4]
+	strb	r0, [r4, #1]
+	ubfx	r0, r3, #16, #8
+	lsrs	r3, r3, #24
+	strb	r0, [r4, #2]
+	.loc 2 3360 0
+	ldr	r0, .L808+16
+	.loc 2 3351 0
 	strb	r3, [r4, #3]
-	movs	r3, #32
-	strb	r3, [r4, #8]
-	ldrb	r3, [r1, #7]	@ zero_extendqisi2
-	ldr	r0, .L809+16
+	.loc 2 3355 0
+	ldr	r3, [r1]
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	strb	r1, [r4, #6]
+	.loc 2 3356 0
+	movs	r1, #32
+	strb	r1, [r4, #8]
+	.loc 2 3357 0
+	ldrb	r3, [r3, #7]	@ zero_extendqisi2
+	.loc 2 3358 0
 	strb	r2, [r4, #10]
+.LVL812:
+	.loc 2 3357 0
 	strb	r3, [r4, #9]
-	ldr	r3, .L809+20
+	.loc 2 3359 0
+	ldr	r3, .L808+20
 	ldrb	r1, [r3]	@ zero_extendqisi2
 	mov	r3, r2
-.L807:
+.LVL813:
+.L806:
+	.loc 2 3359 0 is_stmt 0 discriminator 1
 	uxtb	r2, r3
 	cmp	r1, r2
-	bhi	.L808
+	bhi	.L807
+	.loc 2 3361 0 is_stmt 1
 	pop	{r4, r5, r6, pc}
-.L808:
+.LVL814:
+.L807:
+	.loc 2 3360 0 discriminator 3
 	ldrb	r2, [r3, r0]	@ zero_extendqisi2
 	adds	r3, r3, #1
+.LVL815:
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
 	lsl	r2, r5, r2
 	orrs	r2, r2, r6
 	strb	r2, [r4, #10]
-	b	.L807
-.L810:
-	.align	2
+	b	.L806
 .L809:
+	.align	2
+.L808:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
-	.word	.LANCHOR31
-	.word	.LANCHOR67
+	.word	.LANCHOR32
+	.word	.LANCHOR68
 	.word	.LANCHOR26
 	.word	.LANCHOR25
+	.cfi_endproc
+.LFE266:
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
@@ -5601,58 +9288,92 @@ ReadFlashInfo:
 	.fpu softvfp
 	.type	FtlBbt2Bitmap, %function
 FtlBbt2Bitmap:
+.LFB319:
+	.loc 5 72 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L817
+.LVL816:
+	.loc 5 74 0
+	ldr	r3, .L816
+	.loc 5 72 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 5 72 0
 	mov	r5, r0
-	ldr	r7, .L817+4
+	.loc 5 79 0
+	ldr	r7, .L816+4
+	.loc 5 72 0
 	mov	r6, r1
 	subs	r4, r5, #2
 	addw	r5, r5, #1022
+	.loc 5 74 0
 	ldrh	r2, [r3]
 	movs	r1, #0
-	ldr	r8, .L817+20
+.LVL817:
+	.loc 5 79 0
+	ldr	r8, .L816+20
+	.loc 5 74 0
 	mov	r0, r6
+.LVL818:
 	lsls	r2, r2, #2
 	bl	ftl_memset
-.L814:
+.LVL819:
+.L813:
+	.loc 5 77 0
 	ldrh	r3, [r4, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L811
+	beq	.L810
+	.loc 5 79 0
 	ldrh	r2, [r7]
 	cmp	r2, r3
-	bhi	.L813
+	bhi	.L812
+	.loc 5 79 0 is_stmt 0 discriminator 1
 	mov	r1, r8
 	movs	r2, #79
-	ldr	r0, .L817+8
+	ldr	r0, .L816+8
 	bl	printf
-	ldr	r1, .L817+12
-	ldr	r0, .L817+16
+.LVL820:
+	ldr	r1, .L816+12
+	ldr	r0, .L816+16
 	bl	printf
-.L813:
+.LVL821:
+.L812:
+	.loc 5 80 0 is_stmt 1 discriminator 2
 	ldrh	r3, [r4, #2]!
 	movs	r2, #1
+	.loc 5 75 0 discriminator 2
 	cmp	r5, r4
+	.loc 5 80 0 discriminator 2
 	lsr	r1, r3, #5
 	and	r3, r3, #31
 	lsl	r3, r2, r3
 	ldr	r2, [r6, r1, lsl #2]
 	orr	r2, r2, r3
 	str	r2, [r6, r1, lsl #2]
-	bne	.L814
-.L811:
+	.loc 5 75 0 discriminator 2
+	bne	.L813
+.L810:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L818:
-	.align	2
+.LVL822:
 .L817:
+	.align	2
+.L816:
 	.word	.LANCHOR120
-	.word	.LANCHOR49
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR50
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR121
+	.cfi_endproc
+.LFE319:
 	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
 	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
@@ -5663,22 +9384,33 @@ FtlBbt2Bitmap:
 	.fpu softvfp
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
+.LFB322:
+	.loc 5 225 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L820
+	.loc 5 226 0
+	ldr	r0, .L819
 	movw	r3, #65535
+	.loc 5 228 0
 	movs	r2, #16
 	movs	r1, #255
+	.loc 5 226 0
 	strh	r3, [r0]	@ movhi
+	.loc 5 227 0
 	movs	r3, #0
 	strh	r3, [r0, #6]	@ movhi
+	.loc 5 228 0
 	adds	r0, r0, #12
 	b	ftl_memset
-.L821:
-	.align	2
+.LVL823:
 .L820:
-	.word	.LANCHOR73
+	.align	2
+.L819:
+	.word	.LANCHOR74
+	.cfi_endproc
+.LFE322:
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
@@ -5689,25 +9421,47 @@ FtlBbtMemInit:
 	.fpu softvfp
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
+.LFB330:
+	.loc 1 76 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L823
+.LVL824:
+	.loc 1 79 0
+	ldr	r3, .L822
+	.loc 1 83 0
 	mov	r2, #2048
+	.loc 1 76 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 1 79 0
 	movs	r4, #0
+	.loc 1 83 0
 	mov	r1, r4
+	.loc 1 79 0
 	strh	r4, [r3, #2]	@ movhi
+	.loc 1 80 0
 	strh	r4, [r3, #4]	@ movhi
+	.loc 1 81 0
 	strh	r4, [r3, #6]	@ movhi
+	.loc 1 82 0
 	strh	r0, [r3], #8	@ movhi
+	.loc 1 83 0
 	mov	r0, r3
+.LVL825:
 	bl	ftl_memset
+.LVL826:
+	.loc 1 85 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L824:
-	.align	2
 .L823:
-	.word	.LANCHOR74
+	.align	2
+.L822:
+	.word	.LANCHOR75
+	.cfi_endproc
+.LFE330:
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -5718,96 +9472,166 @@ FtlFreeSysBlkQueueInit:
 	.fpu softvfp
 	.type	ftl_free_no_use_map_blk, %function
 ftl_free_no_use_map_blk:
+.LFB346:
+	.loc 1 561 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
+.LVL827:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 561 0
 	mov	r4, r0
-	ldr	r5, [r0, #20]
+	.loc 1 570 0
+	ldrh	r2, [r0, #10]
 	movs	r1, #0
+	.loc 1 564 0
+	ldr	r5, [r0, #20]
+	.loc 1 562 0
 	ldr	r10, [r0, #12]
-	lsls	r2, r2, #1
+.LVL828:
+	.loc 1 563 0
 	ldr	r6, [r0, #24]
+.LVL829:
+	.loc 1 570 0
+	lsls	r2, r2, #1
 	mov	r0, r5
+.LVL830:
 	bl	ftl_memset
+.LVL831:
+	.loc 1 571 0
 	movs	r3, #0
-.L826:
+.LVL832:
+.L825:
+	.loc 1 571 0 is_stmt 0 discriminator 1
 	ldrh	r1, [r4, #6]
 	uxth	r2, r3
 	cmp	r1, r2
-	bhi	.L830
+	bhi	.L829
+	.loc 1 579 0 is_stmt 1
 	ldrh	r3, [r5]
+.LVL833:
+	.loc 1 582 0
 	movs	r6, #0
-	ldr	r2, .L839
+.LVL834:
+	.loc 1 583 0
+	ldr	r2, .L838
+.LVL835:
+	.loc 1 580 0
 	mov	fp, r6
-.L831:
+.LVL836:
+.L830:
+	.loc 1 582 0 discriminator 1
 	ldrh	r0, [r4, #10]
 	uxth	r1, r6
+.LVL837:
 	cmp	r0, r1
-	bhi	.L835
+	bhi	.L834
+	.loc 1 598 0
 	mov	r0, fp
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L830:
+.LVL838:
+.L829:
+	.cfi_restore_state
+	.loc 1 572 0
 	uxth	r2, r3
 	ldr	r1, [r6, r2, lsl #2]
+	.loc 1 573 0
 	movs	r2, #0
+	.loc 1 572 0
 	ubfx	r1, r1, #10, #16
-.L827:
+.LVL839:
+.L826:
+	.loc 1 573 0 discriminator 1
 	ldrh	r7, [r4, #10]
 	uxth	r0, r2
 	cmp	r7, r0
-	bhi	.L829
+	bhi	.L828
+.LVL840:
 	adds	r3, r3, #1
-	b	.L826
-.L829:
+.LVL841:
+	b	.L825
+.LVL842:
+.L828:
+	.loc 1 574 0
 	uxth	r0, r2
 	adds	r2, r2, #1
+.LVL843:
 	ldrh	r7, [r10, r0, lsl #1]
 	cmp	r7, r1
+	.loc 1 575 0
 	ittt	eq
 	ldrheq	r7, [r5, r0, lsl #1]
 	addeq	r7, r7, #1
 	strheq	r7, [r5, r0, lsl #1]	@ movhi
-	b	.L827
-.L835:
+.LVL844:
+	b	.L826
+.LVL845:
+.L834:
+	.loc 1 583 0
 	ldrh	r0, [r4]
 	uxth	r7, r6
 	cmp	r0, r1
-	bne	.L832
+	bne	.L831
+	.loc 1 583 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r2]
 	ldrh	ip, [r4, #2]
 	cmp	ip, r0
+	.loc 1 584 0 is_stmt 1 discriminator 1
 	it	cc
 	strhcc	r0, [r5, r7, lsl #1]	@ movhi
-.L832:
+.L831:
+	.loc 1 585 0
 	ldrh	r8, [r5, r7, lsl #1]
 	cmp	r3, r8
 	itt	hi
 	movhi	fp, r1
 	movhi	r3, r8
+.LVL846:
+	.loc 1 589 0
 	cmp	r8, #0
-	bne	.L834
+	bne	.L833
+	.loc 1 589 0 is_stmt 0 discriminator 1
 	ldrh	r0, [r10, r7, lsl #1]
-	cbz	r0, .L834
+	cbz	r0, .L833
+	.loc 1 591 0 is_stmt 1
 	movs	r1, #1
+.LVL847:
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	FtlFreeSysBlkQueueIn
+.LVL848:
+	.loc 1 592 0
 	strh	r8, [r10, r7, lsl #1]	@ movhi
+	.loc 1 593 0
 	ldr	r2, [sp, #4]
 	ldrh	r1, [r4, #8]
 	ldr	r3, [sp]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.L834:
+.LVL849:
+.L833:
 	adds	r6, r6, #1
-	b	.L831
-.L840:
-	.align	2
+.LVL850:
+	b	.L830
 .L839:
-	.word	.LANCHOR52
+	.align	2
+.L838:
+	.word	.LANCHOR53
+	.cfi_endproc
+.LFE346:
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -5818,90 +9642,152 @@ ftl_free_no_use_map_blk:
 	.fpu softvfp
 	.type	FtlL2PDataInit, %function
 FtlL2PDataInit:
-	@ args = 0, pretend = 0, frame = 0
+.LFB368:
+	.loc 1 1796 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1798 0
 	movs	r1, #0
-	ldr	r5, .L844
-	ldr	r4, .L844+4
-	ldr	r2, [r5]
-	ldr	r7, .L844+8
-	ldr	r6, .L844+12
-	ldr	r0, [r4]
+	ldr	r8, .L843+40
+	.loc 1 1802 0
+	mov	r10, #12
+	.loc 1 1798 0
+	ldr	r7, .L843
+	ldr	r2, [r8]
+	.loc 1 1799 0
+	ldr	r5, .L843+4
+	ldr	r4, .L843+8
+	.loc 1 1798 0
+	ldr	r0, [r7]
 	lsls	r2, r2, #1
-	ldr	r8, .L844+44
+	.loc 1 1799 0
+	ldr	r6, .L843+12
+	.loc 1 1798 0
 	bl	ftl_memset
-	ldrh	r3, [r7]
+.LVL851:
+	.loc 1 1799 0
+	ldrh	r3, [r5]
 	movs	r1, #255
-	ldrh	r2, [r6]
-	ldr	r0, [r8]
+	ldrh	r2, [r4]
+	ldr	r0, [r6]
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L844+16
-	movw	r0, #65535
-	ldrh	r1, [r6]
-	ldr	ip, [r8]
-	ldr	r2, [r3]
-	movs	r3, #12
-	ldrh	r7, [r7]
-	mla	r3, r1, r3, r3
-	adds	r1, r2, r3
+.LVL852:
+	.loc 1 1802 0
+	ldr	ip, .L843+44
+	.loc 1 1800 0
 	movs	r3, #0
-	mov	lr, r3
-.L842:
-	adds	r2, r2, #12
-	adds	r6, r3, r7
-	cmp	r2, r1
-	bne	.L843
-	ldr	r3, .L844+20
-	ldr	r2, [r5]
-	strh	r0, [r3, #2]	@ movhi
+	movw	r1, #65535
+	str	r7, [sp, #4]
+.LVL853:
+.L841:
+	.loc 1 1800 0 is_stmt 0 discriminator 1
+	ldrh	r7, [r4]
+	uxth	r2, r3
+	add	lr, r3, #1
+	cmp	r7, r2
+	bhi	.L842
+	.loc 1 1806 0 is_stmt 1
+	ldr	r3, .L843+16
+.LVL854:
+	.loc 1 1808 0
+	ldr	r2, [r8]
+.LVL855:
+	.loc 1 1806 0
+	strh	r1, [r3, #2]	@ movhi
+	.loc 1 1808 0
 	strh	r2, [r3, #10]	@ movhi
+	.loc 1 1809 0
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L844+24
-	strh	r0, [r3]	@ movhi
-	strh	r0, [r3, #40]	@ movhi
+	.loc 1 1810 0
+	ldr	r2, .L843+20
+	.loc 1 1807 0
+	strh	r1, [r3]	@ movhi
+	.loc 1 1816 0
+	strh	r1, [r3, #40]	@ movhi
+	.loc 1 1810 0
 	ldrh	r2, [r2]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L844+28
+	.loc 1 1811 0
+	ldr	r2, .L843+24
 	ldrh	r2, [r2]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L844+32
+	.loc 1 1812 0
+	ldr	r2, .L843+28
 	ldr	r2, [r2]
 	str	r2, [r3, #12]
-	ldr	r2, .L844+36
+	.loc 1 1813 0
+	ldr	r2, .L843+32
 	ldr	r2, [r2]
 	str	r2, [r3, #16]
-	ldr	r2, [r4]
+	.loc 1 1814 0
+	ldr	r2, [sp, #4]
+	ldr	r2, [r2]
 	str	r2, [r3, #20]
-	ldr	r2, .L844+40
+	.loc 1 1815 0
+	ldr	r2, .L843+36
 	ldr	r2, [r2]
 	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L843:
+	.loc 1 1817 0
+	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL856:
+.L842:
+	.cfi_restore_state
+	.loc 1 1802 0 discriminator 3
+	uxth	r3, r3
+	ldr	r7, [ip]
+	movs	r0, #0
+	mul	r2, r10, r3
+	add	fp, r7, r2
+	str	r0, [fp, #4]
+	.loc 1 1803 0 discriminator 3
+	strh	r1, [r7, r2]	@ movhi
+	.loc 1 1804 0 discriminator 3
+	ldr	r7, [ip]
+	add	r2, r2, r7
+	ldrh	r7, [r5]
+	muls	r3, r7, r3
+.LVL857:
+	ldr	r7, [r6]
 	bic	r3, r3, #3
-	str	lr, [r2, #-8]
-	add	r3, r3, ip
-	strh	r0, [r2, #-12]	@ movhi
-	str	r3, [r2, #-4]
-	mov	r3, r6
-	b	.L842
-.L845:
-	.align	2
+	add	r3, r3, r7
+	str	r3, [r2, #8]
+.LVL858:
+	mov	r3, lr
+	b	.L841
 .L844:
-	.word	.LANCHOR63
+	.align	2
+.L843:
 	.word	.LANCHOR122
-	.word	.LANCHOR56
-	.word	.LANCHOR66
-	.word	.LANCHOR95
+	.word	.LANCHOR57
+	.word	.LANCHOR67
+	.word	.LANCHOR123
 	.word	.LANCHOR124
 	.word	.LANCHOR125
-	.word	.LANCHOR65
+	.word	.LANCHOR66
 	.word	.LANCHOR126
 	.word	.LANCHOR127
 	.word	.LANCHOR128
-	.word	.LANCHOR123
+	.word	.LANCHOR64
+	.word	.LANCHOR96
+	.cfi_endproc
+.LFE368:
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -5912,75 +9798,112 @@ FtlL2PDataInit:
 	.fpu softvfp
 	.type	FtlVariablesInit, %function
 FtlVariablesInit:
+.LFB298:
+	.loc 4 614 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 4 617 0
 	movs	r4, #0
-	ldr	r3, .L847
+	ldr	r3, .L846
+	.loc 4 618 0
 	movw	r2, #65535
+	.loc 4 628 0
 	mov	r1, r4
-	ldr	r5, .L847+4
+	.loc 4 629 0
+	ldr	r5, .L846+4
+	.loc 4 617 0
 	str	r4, [r3]
-	ldr	r3, .L847+8
+	.loc 4 618 0
+	ldr	r3, .L846+8
 	strh	r2, [r3]	@ movhi
+	.loc 4 621 0
 	mov	r2, #-1
-	ldr	r3, .L847+12
+	.loc 4 619 0
+	ldr	r3, .L846+12
 	str	r4, [r3]
-	ldr	r3, .L847+16
+	.loc 4 620 0
+	ldr	r3, .L846+16
 	str	r4, [r3]
-	ldr	r3, .L847+20
+	.loc 4 621 0
+	ldr	r3, .L846+20
 	str	r2, [r3]
-	ldr	r3, .L847+24
+	.loc 4 625 0
+	ldr	r3, .L846+24
 	str	r4, [r3]
-	ldr	r3, .L847+28
+	.loc 4 627 0
+	ldr	r3, .L846+28
 	strh	r4, [r3]	@ movhi
-	ldr	r3, .L847+32
+	.loc 4 628 0
+	ldr	r3, .L846+32
 	ldrh	r2, [r3]
-	ldr	r3, .L847+36
+	ldr	r3, .L846+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL859:
+	.loc 4 629 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L847+40
+	ldr	r3, .L846+40
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL860:
+	.loc 4 630 0
 	ldrh	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L847+44
+	ldr	r3, .L846+44
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL861:
+	.loc 4 631 0
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L847+48
+	ldr	r0, .L846+48
 	bl	ftl_memset
+.LVL862:
+	.loc 4 632 0
 	mov	r2, #512
 	mov	r1, r4
-	ldr	r0, .L847+52
+	ldr	r0, .L846+52
 	bl	ftl_memset
+.LVL863:
+	.loc 4 633 0
 	bl	FtlGcBufInit
+.LVL864:
+	.loc 4 634 0
 	bl	FtlL2PDataInit
+.LVL865:
+	.loc 4 636 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L848:
-	.align	2
 .L847:
+	.align	2
+.L846:
 	.word	.LANCHOR129
-	.word	.LANCHOR39
+	.word	.LANCHOR40
 	.word	.LANCHOR130
 	.word	.LANCHOR131
 	.word	.LANCHOR132
 	.word	.LANCHOR133
-	.word	.LANCHOR101
-	.word	.LANCHOR69
-	.word	.LANCHOR60
+	.word	.LANCHOR28
 	.word	.LANCHOR70
-	.word	.LANCHOR77
+	.word	.LANCHOR61
+	.word	.LANCHOR71
+	.word	.LANCHOR78
 	.word	.LANCHOR134
+	.word	.LANCHOR80
 	.word	.LANCHOR135
-	.word	.LANCHOR136
+	.cfi_endproc
+.LFE298:
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
@@ -5991,161 +9914,258 @@ FtlVariablesInit:
 	.fpu softvfp
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
+.LFB376:
+	.loc 1 2360 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L860
+	.loc 1 2364 0
+	ldr	r3, .L859
 	movs	r2, #6
+	.loc 1 2360 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 2364 0
 	movs	r1, #0
-	ldr	r6, .L860+4
+	ldr	r6, .L859+4
+	.loc 1 2360 0
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 1 2365 0
 	movs	r4, #0
+	.loc 1 2364 0
 	ldrh	r3, [r3]
+	.loc 1 2371 0
 	mov	r8, r4
+	.loc 1 2364 0
 	ldr	r0, [r6]
+	.loc 1 2371 0
 	mov	r5, r4
 	mov	r10, r6
+	.loc 1 2364 0
 	muls	r2, r3, r2
 	bl	ftl_memset
-	ldr	r3, .L860+8
-	ldr	r2, .L860+12
-	ldr	r1, .L860+16
+.LVL866:
+	.loc 1 2365 0
+	ldr	r3, .L859+8
+	.loc 1 2368 0
+	ldr	r2, .L859+12
+	.loc 1 2370 0
+	ldr	r1, .L859+16
+	.loc 1 2365 0
 	str	r4, [r3]
-	ldr	r3, .L860+20
+	.loc 1 2366 0
+	ldr	r3, .L859+20
+	.loc 1 2368 0
 	strh	r4, [r2]	@ movhi
+	.loc 1 2370 0
 	strh	r4, [r1]	@ movhi
+.LVL867:
+	.loc 1 2366 0
 	str	r4, [r3]
-	ldr	r3, .L860+24
+	.loc 1 2367 0
+	ldr	r3, .L859+24
 	str	r2, [sp, #8]
 	str	r4, [r3]
-	ldr	r3, .L860+28
+	.loc 1 2369 0
+	ldr	r3, .L859+28
 	mov	fp, r3
 	strh	r4, [r3]	@ movhi
-.L850:
-	ldr	r3, .L860+32
+.LVL868:
+.L849:
+	.loc 1 2373 0 discriminator 1
+	ldr	r3, .L859+32
 	sxth	r7, r4
+.LVL869:
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bge	.L857
-	ldr	r3, .L860+36
+	bge	.L856
+	.loc 1 2375 0
+	ldr	r3, .L859+36
+	.loc 1 2376 0
 	uxth	r1, r4
 	str	r1, [sp, #12]
+	.loc 1 2375 0
 	ldrh	r2, [r3]
-	ldr	r3, .L860+40
+	.loc 1 2378 0
+	ldr	r3, .L859+40
 	ldrh	r3, [r3]
 	str	r3, [sp, #4]
 	movs	r3, #0
 	mov	r6, r3
-	b	.L858
-.L852:
+	b	.L857
+.LVL870:
+.L851:
 	str	r3, [sp, #20]
-	ldr	r3, .L860+44
+	.loc 1 2376 0
+	ldr	r3, .L859+44
+.LVL871:
 	ldr	r1, [sp, #12]
 	str	r2, [sp, #16]
 	ldrb	r0, [r3, r0]	@ zero_extendqisi2
+.LVL872:
 	bl	V2P_block
+.LVL873:
+	.loc 1 2377 0
 	bl	FtlBbmIsBadBlock
+.LVL874:
 	ldr	r2, [sp, #16]
 	ldr	r3, [sp, #20]
-	cbnz	r0, .L851
+	cbnz	r0, .L850
+	.loc 1 2378 0
 	ldr	r1, [sp, #4]
 	add	r6, r6, r1
+.LVL875:
 	sxth	r6, r6
-.L851:
+.LVL876:
+.L850:
 	adds	r3, r3, #1
-.L858:
+.LVL877:
+.L857:
+	.loc 1 2375 0 discriminator 1
 	sxth	r0, r3
 	cmp	r0, r2
-	blt	.L852
+	blt	.L851
 	lsls	r3, r7, #1
-	cbz	r6, .L853
+.LVL878:
+	.loc 1 2380 0
+	cbz	r6, .L852
+	.loc 1 2381 0
 	mov	r1, r6
 	str	r3, [sp, #4]
 	mov	r0, #32768
+.LVL879:
 	bl	__aeabi_idiv
+.LVL880:
 	ldr	r3, [sp, #4]
 	sxth	r6, r0
-.L854:
+.LVL881:
+.L853:
+	.loc 1 2385 0
 	ldr	r2, [r10]
 	add	r3, r3, r7
 	add	r2, r2, r3, lsl #1
-	ldr	r3, .L860+48
+	.loc 1 2387 0
+	ldr	r3, .L859+48
+	.loc 1 2385 0
 	strh	r6, [r2, #4]	@ movhi
+	.loc 1 2387 0
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	beq	.L855
-	ldr	r3, .L860+52
+	beq	.L854
+	.loc 1 2388 0 discriminator 1
+	ldr	r3, .L859+52
 	ldrh	r3, [r3]
+	.loc 1 2387 0 discriminator 1
 	cmp	r7, r3
-	beq	.L855
-	ldr	r3, .L860+56
+	beq	.L854
+	.loc 1 2389 0
+	ldr	r3, .L859+56
 	ldrh	r3, [r3]
+	.loc 1 2388 0
 	cmp	r7, r3
-	beq	.L855
-	ldr	r3, .L860+60
+	beq	.L854
+	.loc 1 2391 0
+	ldr	r3, .L859+60
 	uxth	r0, r4
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r7, lsl #1]
-	cbnz	r3, .L856
+	cbnz	r3, .L855
+	.loc 1 2392 0
 	add	r8, r8, #1
+.LVL882:
 	uxth	r8, r8
+.LVL883:
+	.loc 1 2393 0
 	bl	INSERT_FREE_LIST
-.L855:
+.LVL884:
+.L854:
 	adds	r4, r4, #1
-	b	.L850
-.L853:
-	ldr	r2, .L860+60
+.LVL885:
+	b	.L849
+.LVL886:
+.L852:
+	.loc 1 2383 0
+	ldr	r2, .L859+60
 	movw	r1, #65535
 	ldr	r2, [r2]
 	strh	r1, [r2, r7, lsl #1]	@ movhi
-	b	.L854
-.L856:
+	b	.L853
+.LVL887:
+.L855:
+	.loc 1 2395 0
 	adds	r5, r5, #1
+.LVL888:
 	uxth	r5, r5
+.LVL889:
+	.loc 1 2396 0
 	bl	INSERT_DATA_LIST
-	b	.L855
-.L857:
+.LVL890:
+	b	.L854
+.LVL891:
+.L856:
+	.loc 1 2400 0
 	ldr	r2, [sp, #8]
+	.loc 1 2401 0
 	strh	r8, [fp]	@ movhi
+	.loc 1 2400 0
 	strh	r5, [r2]	@ movhi
+	.loc 1 2405 0
 	add	r5, r5, r8
+.LVL892:
 	cmp	r3, r5
-	bge	.L859
-	ldr	r1, .L860+64
-	mov	r2, #2368
-	ldr	r0, .L860+68
+	bge	.L858
+	.loc 1 2405 0 is_stmt 0 discriminator 1
+	ldr	r1, .L859+64
+	movw	r2, #2405
+	ldr	r0, .L859+68
 	bl	printf
-	ldr	r1, .L860+72
-	ldr	r0, .L860+76
+.LVL893:
+	ldr	r1, .L859+72
+	ldr	r0, .L859+76
 	bl	printf
-.L859:
+.LVL894:
+.L858:
+	.loc 1 2407 0 is_stmt 1
 	movs	r0, #0
 	add	sp, sp, #24
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L861:
-	.align	2
+.LVL895:
 .L860:
-	.word	.LANCHOR39
-	.word	.LANCHOR80
-	.word	.LANCHOR86
-	.word	.LANCHOR84
-	.word	.LANCHOR137
+	.align	2
+.L859:
+	.word	.LANCHOR40
 	.word	.LANCHOR81
-	.word	.LANCHOR83
 	.word	.LANCHOR87
-	.word	.LANCHOR38
-	.word	.LANCHOR36
-	.word	.LANCHOR51
-	.word	.LANCHOR45
-	.word	.LANCHOR90
-	.word	.LANCHOR91
-	.word	.LANCHOR92
+	.word	.LANCHOR85
+	.word	.LANCHOR136
 	.word	.LANCHOR82
-	.word	.LANCHOR138
-	.word	.LC4
-	.word	.LC5
+	.word	.LANCHOR84
+	.word	.LANCHOR88
+	.word	.LANCHOR39
+	.word	.LANCHOR37
+	.word	.LANCHOR52
+	.word	.LANCHOR46
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR83
+	.word	.LANCHOR137
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE376:
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -6156,38 +10176,61 @@ SupperBlkListInit:
 	.fpu softvfp
 	.type	FtlGcPageVarInit, %function
 FtlGcPageVarInit:
+.LFB397:
+	.loc 6 218 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L863
+	.loc 6 219 0
+	ldr	r2, .L862
 	movs	r3, #0
+	.loc 6 218 0
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 6 221 0
 	movs	r1, #255
-	ldr	r4, .L863+4
+	ldr	r4, .L862+4
+	.loc 6 219 0
 	strh	r3, [r2]	@ movhi
-	ldr	r2, .L863+8
+	.loc 6 220 0
+	ldr	r2, .L862+8
 	strh	r3, [r2]	@ movhi
+	.loc 6 221 0
 	ldrh	r2, [r4]
-	ldr	r3, .L863+12
+	ldr	r3, .L862+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL896:
+	.loc 6 222 0
 	ldrh	r3, [r4]
 	movs	r2, #12
 	movs	r1, #255
 	muls	r2, r3, r2
-	ldr	r3, .L863+16
+	ldr	r3, .L862+16
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL897:
+	.loc 6 224 0
 	pop	{r4, lr}
+	.cfi_restore 14
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+	.loc 6 223 0
 	b	FtlGcBufInit
-.L864:
-	.align	2
+.LVL898:
 .L863:
+	.align	2
+.L862:
 	.word	.LANCHOR109
-	.word	.LANCHOR53
-	.word	.LANCHOR110
-	.word	.LANCHOR108
+	.word	.LANCHOR54
 	.word	.LANCHOR111
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.cfi_endproc
+.LFE397:
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
 	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
@@ -6198,10 +10241,18 @@ FtlGcPageVarInit:
 	.fpu softvfp
 	.type	ftl_memcpy, %function
 ftl_memcpy:
+.LFB481:
+	.loc 7 32 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL899:
+	.loc 7 33 0
 	b	memcpy
+.LVL900:
+	.cfi_endproc
+.LFE481:
 	.size	ftl_memcpy, .-ftl_memcpy
 	.section	.text.FlashReadIdbData,"ax",%progbits
 	.align	1
@@ -6212,18 +10263,30 @@ ftl_memcpy:
 	.fpu softvfp
 	.type	FlashReadIdbData, %function
 FlashReadIdbData:
+.LFB250:
+	.loc 2 2139 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL901:
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 2 2140 0
 	mov	r2, #2048
-	ldr	r1, .L867
+	ldr	r1, .L866
 	bl	ftl_memcpy
+.LVL902:
+	.loc 2 2142 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L868:
-	.align	2
 .L867:
-	.word	.LANCHOR139
+	.align	2
+.L866:
+	.word	.LANCHOR138
+	.cfi_endproc
+.LFE250:
 	.size	FlashReadIdbData, .-FlashReadIdbData
 	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
 	.align	1
@@ -6234,62 +10297,98 @@ FlashReadIdbData:
 	.fpu softvfp
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
+.LFB251:
+	.loc 2 2145 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL903:
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 2149 0
 	movs	r6, #0
-	ldr	r7, .L877
-	ldr	r5, .L877+4
-.L872:
+	ldr	r7, .L876
+	.loc 2 2150 0
+	ldr	r5, .L876+4
+.LVL904:
+.L871:
 	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
 	mov	r1, r5
 	mov	r0, r7
 	lsl	r8, r6, #5
 	bl	FlashMemCmp8
+.LVL905:
 	mov	r4, r0
-	cbnz	r0, .L870
-	ldr	r5, .L877+8
+	cbnz	r0, .L869
+	.loc 2 2151 0
+	ldr	r5, .L876+8
+	.loc 2 2159 0
 	mov	r3, r4
-	ldr	r2, .L877+12
+	ldr	r2, .L876+12
+	.loc 2 2151 0
 	add	r5, r5, r8
+.LVL906:
+	.loc 2 2159 0
 	ldrb	r0, [r5, #22]	@ zero_extendqisi2
 	mov	r1, r2
-.L871:
+.LVL907:
+.L870:
 	lsls	r6, r3, #5
 	ldrb	r6, [r6, r2]	@ zero_extendqisi2
 	cmp	r6, r0
-	beq	.L874
+	beq	.L873
+	.loc 2 2158 0 discriminator 2
 	adds	r3, r3, #1
+.LVL908:
 	cmp	r3, #4
-	bne	.L871
-.L874:
+	bne	.L870
+.L873:
+	.loc 2 2162 0
 	add	r1, r1, r3, lsl #5
 	movs	r2, #32
-	ldr	r0, .L877+16
+	ldr	r0, .L876+16
 	bl	ftl_memcpy
+.LVL909:
+	.loc 2 2163 0
 	movs	r2, #32
 	mov	r1, r5
-	ldr	r0, .L877+20
+	ldr	r0, .L876+20
 	bl	ftl_memcpy
-	b	.L869
-.L870:
+.LVL910:
+	.loc 2 2164 0
+	b	.L868
+.LVL911:
+.L869:
+	.loc 2 2149 0 discriminator 2
 	adds	r6, r6, #1
+.LVL912:
 	adds	r7, r7, #32
-	cmp	r6, #73
-	bne	.L872
+	cmp	r6, #74
+	bne	.L871
+	.loc 2 2157 0
 	mov	r4, #-1
-.L869:
+.LVL913:
+.L868:
+	.loc 2 2165 0
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, pc}
-.L878:
-	.align	2
 .L877:
-	.word	.LANCHOR140+1
+	.align	2
+.L876:
+	.word	.LANCHOR139+1
 	.word	.LANCHOR22
+	.word	.LANCHOR139
 	.word	.LANCHOR140
-	.word	.LANCHOR141
 	.word	.LANCHOR7
-	.word	.LANCHOR29
+	.word	.LANCHOR30
+	.cfi_endproc
+.LFE251:
 	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
 	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
@@ -6300,19 +10399,36 @@ FlashLoadPhyInfoInRam:
 	.fpu softvfp
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
+.LFB482:
+	.loc 7 37 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL914:
+	.loc 7 40 0
 	movs	r3, #0
+	.loc 7 37 0
 	push	{r4, lr}
-.L880:
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+.LVL915:
+.L879:
+	.loc 7 40 0 discriminator 1
 	cmp	r3, r2
-	bne	.L881
+	bne	.L880
+	.loc 7 43 0
 	pop	{r4, pc}
-.L881:
+.L880:
+	.loc 7 41 0 discriminator 3
 	ldr	r4, [r1, r3, lsl #2]
 	str	r4, [r0, r3, lsl #2]
+	.loc 7 40 0 discriminator 3
 	adds	r3, r3, #1
-	b	.L880
+.LVL916:
+	b	.L879
+	.cfi_endproc
+.LFE482:
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -6323,70 +10439,134 @@ ftl_memcpy32:
 	.fpu softvfp
 	.type	NandcCopy1KB, %function
 NandcCopy1KB:
+.LFB291:
+	.loc 3 748 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL917:
+	.loc 3 759 0
 	cmp	r1, #1
+	.loc 3 748 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 3 748 0
 	mov	r4, r2
+.LVL918:
+	.loc 3 754 0
 	add	r2, r0, #4096
+.LVL919:
+	.loc 3 755 0
 	add	r6, r0, #512
+.LVL920:
+	.loc 3 757 0
 	add	r0, r2, r4, lsl #9
+.LVL921:
+	.loc 3 748 0
 	ldr	r5, [sp, #16]
-	bne	.L883
-	cbz	r3, .L884
+	.loc 3 759 0
+	bne	.L882
+	.loc 3 761 0
+	cbz	r3, .L883
+	.loc 3 762 0
 	lsls	r1, r3, #30
-	bne	.L885
+.LVL922:
+	bne	.L884
+	.loc 3 763 0
 	mov	r2, #256
 	mov	r1, r3
 	bl	ftl_memcpy32
-.L884:
-	cbz	r5, .L882
+.LVL923:
+.L883:
+	.loc 3 767 0
+	cbz	r5, .L881
+	.loc 3 769 0
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	.loc 3 771 0
 	lsrs	r4, r4, #1
+.LVL924:
+	.loc 3 769 0
 	ldrb	r3, [r5]	@ zero_extendqisi2
+	.loc 3 771 0
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
+	.loc 3 769 0
 	orr	r3, r3, r2, lsl #8
 	ldrb	r2, [r5, #2]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #16
 	ldrb	r2, [r5, #3]	@ zero_extendqisi2
 	orr	r3, r3, r2, lsl #24
+.LVL925:
+	.loc 3 771 0
 	str	r3, [r6, r4]
+.LVL926:
 	pop	{r4, r5, r6, pc}
-.L885:
+.LVL927:
+.L884:
+	.loc 3 765 0
 	mov	r2, #1024
 	mov	r1, r3
 	bl	ftl_memcpy
-	b	.L884
-.L883:
-	cbz	r3, .L888
+.LVL928:
+	b	.L883
+.LVL929:
+.L882:
+	.loc 3 776 0
+	cbz	r3, .L887
+	.loc 3 777 0
 	lsls	r2, r3, #30
-	bne	.L889
+	bne	.L888
+	.loc 3 778 0
 	mov	r1, r0
+.LVL930:
 	mov	r2, #256
 	mov	r0, r3
+.LVL931:
 	bl	ftl_memcpy32
-.L888:
-	cbz	r5, .L882
+.LVL932:
+.L887:
+	.loc 3 782 0
+	cbz	r5, .L881
+	.loc 3 784 0
 	lsrs	r4, r4, #1
+.LVL933:
 	add	r4, r4, r4, lsl #1
 	lsls	r4, r4, #4
 	ldr	r3, [r6, r4]
+.LVL934:
+	.loc 3 785 0
 	strb	r3, [r5]
+	.loc 3 786 0
 	lsrs	r2, r3, #8
 	strb	r2, [r5, #1]
+	.loc 3 787 0
 	lsrs	r2, r3, #16
+	.loc 3 788 0
 	lsrs	r3, r3, #24
+.LVL935:
+	.loc 3 787 0
 	strb	r2, [r5, #2]
+	.loc 3 788 0
 	strb	r3, [r5, #3]
-.L882:
+.L881:
 	pop	{r4, r5, r6, pc}
-.L889:
+.LVL936:
+.L888:
+	.loc 3 780 0
 	mov	r1, r0
+.LVL937:
 	mov	r2, #1024
 	mov	r0, r3
+.LVL938:
 	bl	ftl_memcpy
-	b	.L888
+.LVL939:
+	b	.L887
+	.cfi_endproc
+.LFE291:
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
@@ -6397,26 +10577,60 @@ NandcCopy1KB:
 	.fpu softvfp
 	.type	NandcXferData, %function
 NandcXferData:
+.LFB292:
+	.loc 3 794 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL940:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r7, r3
-	ldr	r3, .L936
+.LVL941:
+	.loc 3 801 0
+	ldr	r3, .L935
+.LVL942:
+	.loc 3 794 0
 	sub	sp, sp, #96
+	.cfi_def_cfa_offset 128
+	.loc 3 794 0
 	mov	r6, r0
 	mov	r10, r2
 	str	r1, [sp, #12]
+	.loc 3 801 0
 	ldr	r5, [r3, r0, lsl #3]
+.LVL943:
+	.loc 3 804 0
 	lsls	r3, r7, #26
+	.loc 3 794 0
 	ldr	r4, [sp, #128]
-	bne	.L901
-	cbnz	r4, .L902
+	.loc 3 804 0
+	bne	.L900
+	.loc 3 806 0
+	cbnz	r4, .L901
+.LVL944:
+	.loc 3 808 0
 	add	r4, sp, #32
+.LVL945:
+	.loc 3 809 0
 	movs	r2, #64
+.LVL946:
 	movs	r1, #255
+.LVL947:
 	add	r0, sp, #32
+.LVL948:
 	bl	ftl_memset
-.L902:
+.LVL949:
+.L901:
+	.loc 3 811 0
 	movs	r3, #0
 	mov	r2, r10
 	ldr	r1, [sp, #12]
@@ -6424,85 +10638,160 @@ NandcXferData:
 	str	r4, [sp, #4]
 	str	r7, [sp]
 	bl	NandcXferStart
+.LVL950:
+	.loc 3 812 0
 	mov	r0, r6
 	bl	NandcXferComp
+.LVL951:
+	.loc 3 813 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L926
-	ldr	r2, .L936+4
+	bne	.L925
+.LBB299:
+	.loc 3 817 0
+	ldr	r2, .L935+4
+	.loc 3 820 0
 	lsr	r0, r10, #1
-	ldr	ip, .L936+12
+	.loc 3 822 0
+	ldr	ip, .L935+12
+	.loc 3 817 0
 	ldr	r3, [r2]
 	cmp	r3, #25
+	.loc 3 820 0
 	ldr	r3, [sp, #12]
+	.loc 3 817 0
 	ite	cc
 	movcc	r7, #64
+.LVL952:
 	movcs	r7, #128
+.LVL953:
+	.loc 3 820 0
 	mov	r1, r3
-.L905:
+.LVL954:
+.L904:
+	.loc 3 820 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
 	add	r4, r4, #4
+.LVL955:
 	add	r6, r7, r3
-	bcc	.L906
-	ldr	r3, .L936+8
+	bcc	.L905
+.LBE299:
+.LBB300:
+	.loc 3 838 0 is_stmt 1
+	ldr	r3, .L935+8
+.LBE300:
+	.loc 3 829 0
 	lsr	r4, r10, #2
+.LVL956:
 	ldr	r0, [r2]
+.LBB301:
+	.loc 3 838 0
 	movs	r2, #0
 	mov	r8, r2
 	ldr	r1, [r3]
-.L907:
+.LVL957:
+.L906:
+.LBE301:
+	.loc 3 829 0 discriminator 1
 	cmp	r2, r4
-	bcs	.L903
-	cbnz	r0, .L913
-.L903:
+	bcs	.L902
+	.loc 3 829 0 is_stmt 0 discriminator 3
+	cbnz	r0, .L912
+.LVL958:
+.L902:
+	.loc 3 851 0 is_stmt 1
 	movs	r3, #0
 	str	r3, [r5, #16]
-.L914:
-	ldr	r3, .L936+8
+.LVL959:
+.L913:
+	.loc 3 901 0
+	ldr	r3, .L935+8
 	ldr	r3, [r3]
 	cmp	r3, #5
-	bls	.L900
+	bls	.L899
+	.loc 3 901 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L900
+	cbnz	r3, .L899
+.LBB302:
+	.loc 3 904 0 is_stmt 1
 	ldr	r3, [r5]
+	.loc 3 905 0
 	and	r2, r3, #139264
 	cmp	r2, #139264
+.LVL960:
+	.loc 3 908 0
 	ittt	eq
 	moveq	r8, #-1
+	.loc 3 909 0
 	orreq	r3, r3, #131072
+.LVL961:
+	.loc 3 910 0
 	streq	r3, [r5]
-.L900:
+.LVL962:
+.L899:
+.LBE302:
+	.loc 3 923 0
 	mov	r0, r8
 	add	sp, sp, #96
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L906:
+.LVL963:
+.L905:
+	.cfi_restore_state
+.LBB303:
+	.loc 3 822 0 discriminator 3
 	bic	lr, r3, #3
 	ldr	r3, [ip, #4]
+	.loc 3 820 0 discriminator 3
 	adds	r1, r1, #1
+.LVL964:
+	.loc 3 822 0 discriminator 3
 	ldr	r3, [r3, lr]
+.LVL965:
+	.loc 3 823 0 discriminator 3
 	strb	r3, [r4, #-4]
+.LVL966:
+	.loc 3 824 0 discriminator 3
 	lsr	lr, r3, #8
 	strb	lr, [r4, #-3]
+.LVL967:
+	.loc 3 825 0 discriminator 3
 	lsr	lr, r3, #16
+	.loc 3 826 0 discriminator 3
 	lsrs	r3, r3, #24
+.LVL968:
+	.loc 3 825 0 discriminator 3
 	strb	lr, [r4, #-2]
+.LVL969:
+	.loc 3 826 0 discriminator 3
 	strb	r3, [r4, #-1]
+	.loc 3 820 0 discriminator 3
 	mov	r3, r6
-	b	.L905
-.L913:
+	b	.L904
+.LVL970:
+.L912:
+.LBE303:
+	.loc 3 831 0
 	add	r3, r2, #8
 	ldr	r3, [r5, r3, lsl #2]
 	str	r3, [sp, #28]
+	.loc 3 833 0
 	ldr	r3, [sp, #28]
 	lsls	r6, r3, #29
-	bmi	.L929
+	bmi	.L928
+	.loc 3 833 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #28]
 	ubfx	r3, r3, #15, #1
 	cmp	r3, #0
-	bne	.L929
+	bne	.L928
+.LVL971:
+.LBB304:
+	.loc 3 838 0 is_stmt 1
 	cmp	r1, #5
-	bls	.L909
+	bls	.L908
+	.loc 3 840 0
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6523,18 +10812,29 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #27, #1
 	ubfxls	r6, r6, #29, #1
-.L935:
+.L934:
+	.loc 3 844 0 discriminator 2
 	orr	r3, r3, r6, lsl #5
-.L911:
+.L910:
+.LVL972:
+	.loc 3 846 0
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L908:
+.LVL973:
+.L907:
+.LBE304:
+	.loc 3 829 0 discriminator 2
 	adds	r2, r2, #1
-	b	.L907
-.L909:
+.LVL974:
+	b	.L906
+.LVL975:
+.L908:
+.LBB305:
+	.loc 3 842 0
 	cmp	r1, #3
-	bls	.L911
+	bls	.L910
+	.loc 3 844 0
 	ldr	r6, [sp, #28]
 	ldr	r3, [sp, #28]
 	ubfx	r6, r6, #3, #5
@@ -6555,38 +10855,55 @@ NandcXferData:
 	ite	hi
 	ubfxhi	r6, r6, #28, #1
 	ubfxls	r6, r6, #30, #1
-	b	.L935
-.L929:
+	b	.L934
+.LVL976:
+.L928:
+.LBE305:
+	.loc 3 834 0
 	mov	r8, #-1
-	b	.L908
-.L926:
+.LVL977:
+	b	.L907
+.LVL978:
+.L925:
+	.loc 3 795 0
 	mov	r8, #0
-	b	.L903
-.L901:
+	b	.L902
+.LVL979:
+.L900:
+	.loc 3 856 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
-	bne	.L915
+	bne	.L914
 	cmp	r4, #0
 	mov	r8, #0
 	ite	ne
 	movne	r3, #4
 	moveq	r3, #0
 	str	r3, [sp, #16]
-.L916:
+.LVL980:
+.L915:
+	.loc 3 858 0 discriminator 2
 	cmp	r8, r10
-	bcc	.L918
+	bcc	.L917
+	.loc 3 795 0
 	mov	r8, #0
-	b	.L914
-.L918:
+.LVL981:
+	b	.L913
+.LVL982:
+.L917:
+	.loc 3 860 0
 	and	fp, r8, #3
-	cbz	r7, .L931
+	cbz	r7, .L930
 	add	r3, r7, r8, lsl #9
-.L917:
+.L916:
+	.loc 3 860 0 is_stmt 0 discriminator 4
 	str	r4, [sp]
 	mov	r2, fp
 	movs	r1, #1
 	mov	r0, r5
 	bl	NandcCopy1KB
+.LVL983:
+	.loc 3 861 0 is_stmt 1 discriminator 4
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6594,24 +10911,36 @@ NandcXferData:
 	str	r3, [sp]
 	mov	r0, r6
 	mov	r3, fp
+	.loc 3 858 0 discriminator 4
 	add	r8, r8, #2
+.LVL984:
+	.loc 3 861 0 discriminator 4
 	bl	NandcXferStart
+.LVL985:
+	.loc 3 862 0 discriminator 4
 	mov	r0, r6
 	bl	NandcXferComp
+.LVL986:
 	ldr	r3, [sp, #16]
 	add	r4, r4, r3
-	b	.L916
-.L931:
+	b	.L915
+.L930:
 	mov	r3, r7
-	b	.L917
-.L915:
+	b	.L916
+.LVL987:
+.L914:
+	.loc 3 867 0
 	mov	r8, #0
 	movs	r2, #2
+.LVL988:
 	mov	r3, r8
 	str	r8, [sp, #4]
 	str	r8, [sp]
 	mov	r1, r8
+.LVL989:
 	bl	NandcXferStart
+.LVL990:
+	.loc 3 868 0
 	mov	fp, r7
 	cmp	r4, r8
 	str	r4, [sp, #16]
@@ -6620,16 +10949,28 @@ NandcXferData:
 	movne	r3, #4
 	moveq	r3, r8
 	str	r3, [sp, #20]
-.L919:
+.LVL991:
+.L918:
+	.loc 3 868 0 is_stmt 0 discriminator 2
 	cmp	r4, r10
-	bcs	.L914
+	bcs	.L913
+	.loc 3 871 0 is_stmt 1
 	mov	r0, r6
+	.loc 3 873 0
 	adds	r4, r4, #2
+.LVL992:
+	.loc 3 871 0
 	bl	NandcXferComp
+.LVL993:
+	.loc 3 872 0
 	ldr	r3, [r5, #32]
+	.loc 3 873 0
 	cmp	r10, r4
+	.loc 3 872 0
 	str	r3, [sp, #28]
-	bls	.L920
+	.loc 3 873 0
+	bls	.L919
+	.loc 3 874 0
 	movs	r3, #0
 	movs	r2, #2
 	str	r3, [sp, #4]
@@ -6638,19 +10979,28 @@ NandcXferData:
 	mov	r0, r6
 	and	r3, r4, #3
 	bl	NandcXferStart
-.L920:
+.LVL994:
+.L919:
+	.loc 3 876 0
 	ldr	r3, [sp, #28]
 	lsls	r3, r3, #29
-	bmi	.L932
+	bmi	.L931
+.LBB306:
+	.loc 3 885 0
 	ldr	r3, [sp, #28]
 	ldr	r2, [sp, #28]
 	ubfx	r3, r3, #3, #5
 	ubfx	r2, r2, #27, #1
+.LVL995:
 	orr	r3, r3, r2, lsl #5
+	.loc 3 887 0
 	cmp	r8, r3
 	it	cc
 	movcc	r8, r3
-.L921:
+.LVL996:
+.L920:
+.LBE306:
+	.loc 3 896 0
 	ldr	r3, [sp, #16]
 	cmp	r7, #0
 	sub	r2, r4, #2
@@ -6663,21 +11013,27 @@ NandcXferData:
 	moveq	r3, #0
 	add	fp, fp, #1024
 	bl	NandcCopy1KB
+.LVL997:
 	ldr	r3, [sp, #16]
 	ldr	r2, [sp, #20]
 	add	r3, r3, r2
 	str	r3, [sp, #16]
-	b	.L919
-.L932:
+	b	.L918
+.LVL998:
+.L931:
+	.loc 3 878 0
 	mov	r8, #-1
-	b	.L921
-.L937:
-	.align	2
+.LVL999:
+	b	.L920
 .L936:
+	.align	2
+.L935:
 	.word	.LANCHOR6
-	.word	.LANCHOR30
-	.word	.LANCHOR32
+	.word	.LANCHOR31
 	.word	.LANCHOR33
+	.word	.LANCHOR34
+	.cfi_endproc
+.LFE292:
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
@@ -6688,53 +11044,96 @@ NandcXferData:
 	.fpu softvfp
 	.type	FlashReadRawPage, %function
 FlashReadRawPage:
+.LFB222:
+	.loc 2 491 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1000:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 491 0
 	mov	r8, r3
-	ldr	r3, .L940
+	.loc 2 494 0
+	ldr	r3, .L939
+.LVL1001:
+	.loc 2 491 0
 	mov	r6, r1
 	mov	r7, r2
+	.loc 2 497 0
 	mov	r4, r0
+	.loc 2 494 0
 	ldrb	r5, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L939
-	ldr	r3, .L940+4
-	ldr	r2, .L940+8
+.LVL1002:
+	.loc 2 497 0
+	cbnz	r0, .L938
+	.loc 2 497 0 is_stmt 0 discriminator 1
+	ldr	r3, .L939+4
+	ldr	r2, .L939+8
+.LVL1003:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r0, [r2]
+.LVL1004:
 	muls	r0, r3, r0
+	.loc 2 498 0 is_stmt 1 discriminator 1
 	cmp	r0, r1
 	it	hi
 	movhi	r5, #4
-.L939:
+.LVL1005:
+.L938:
+	.loc 2 499 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1006:
+	.loc 2 500 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL1007:
+	.loc 2 501 0
 	mov	r1, r6
 	mov	r0, r4
 	bl	FlashReadCmd
+.LVL1008:
+	.loc 2 502 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1009:
+	.loc 2 503 0
 	mov	r3, r7
 	mov	r2, r5
 	str	r8, [sp]
 	movs	r1, #0
 	mov	r0, r4
 	bl	NandcXferData
+.LVL1010:
 	mov	r1, r0
+.LVL1011:
+	.loc 2 513 0
 	mov	r0, r4
+.LVL1012:
 	bl	NandcFlashDeCs
+.LVL1013:
+	.loc 2 515 0
 	mov	r0, r1
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L941:
-	.align	2
+.LVL1014:
 .L940:
-	.word	.LANCHOR29
+	.align	2
+.L939:
+	.word	.LANCHOR30
 	.word	.LANCHOR2
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE222:
 	.size	FlashReadRawPage, .-FlashReadRawPage
 	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
@@ -6745,158 +11144,274 @@ FlashReadRawPage:
 	.fpu softvfp
 	.type	FlashDdrTunningRead, %function
 FlashDdrTunningRead:
+.LFB227:
+	.loc 2 685 0
+	.cfi_startproc
 	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1015:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r7, r3
-	ldr	r3, .L967
+	.loc 2 695 0
+	ldr	r3, .L966
+.LVL1016:
+	.loc 2 685 0
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 685 0
 	str	r0, [sp, #8]
+	.loc 2 695 0
 	ldr	r3, [r3]
+	.loc 2 685 0
 	str	r1, [sp, #12]
 	str	r2, [sp, #4]
+	.loc 2 695 0
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L967+4
+.LVL1017:
+	.loc 2 696 0
+	ldr	r3, .L966+4
+.LVL1018:
 	ldr	r3, [r3]
+	.loc 2 697 0
 	cmp	r3, #8
+	.loc 2 698 0
 	ldr	r3, [sp, #56]
+	.loc 2 697 0
 	ite	cc
 	movcc	fp, #6
 	movcs	fp, #12
+.LVL1019:
+	.loc 2 698 0
 	cmp	r3, #0
-	beq	.L956
+	beq	.L955
+	.loc 2 699 0
 	movs	r0, #1
-	ldr	r4, .L967+8
+.LVL1020:
+	.loc 2 703 0
+	ldr	r4, .L966+8
+	.loc 2 699 0
 	bl	FlashSetInterfaceMode
+.LVL1021:
+	.loc 2 700 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL1022:
+	.loc 2 701 0
 	ldr	r0, [sp, #8]
 	bl	FlashReset
+.LVL1023:
+	.loc 2 702 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
+.LVL1024:
 	mov	r6, r0
+.LVL1025:
+	.loc 2 703 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
+.LVL1026:
 	bl	FlashSetInterfaceMode
+.LVL1027:
+	.loc 2 704 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
+.LVL1028:
+	.loc 2 705 0
 	adds	r3, r6, #1
-	bne	.L945
-.L954:
+	bne	.L944
+.LVL1029:
+.L953:
+	.loc 2 759 0
 	mov	r6, #-1
-.L942:
+.L941:
+	.loc 2 778 0
 	mov	r0, r6
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L945:
+.LVL1030:
+.L944:
+	.cfi_restore_state
+	.loc 2 708 0
 	mov	r2, r6
 	ldr	r1, [sp, #12]
-	ldr	r0, .L967+12
+	ldr	r0, .L966+12
 	bl	printf
-	ldr	r2, .L967+16
+.LVL1031:
+	.loc 2 722 0
+	ldr	r2, .L966+16
 	ldr	r3, [r2]
 	adds	r3, r3, #1
+	.loc 2 723 0
 	cmp	r3, #2048
-	bcs	.L947
+	bcs	.L946
+	.loc 2 722 0
 	str	r3, [r2]
-	b	.L942
-.L947:
+	b	.L941
+.L946:
+	.loc 2 726 0
 	movs	r7, #0
 	str	r7, [r2]
+.LVL1032:
+	.loc 2 709 0
 	str	r7, [sp, #4]
-.L944:
+.LVL1033:
+.L943:
 	mov	r10, #0
 	mov	r8, #-1
 	mov	r5, r10
 	mov	r4, r10
 	str	r10, [sp, #16]
-.L952:
+.LVL1034:
+.L951:
+	.loc 2 731 0
 	uxtb	r0, fp
 	bl	NandcSetDdrPara
+.LVL1035:
+	.loc 2 732 0
 	mov	r3, r7
 	ldr	r2, [sp, #4]
 	ldr	r1, [sp, #12]
 	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
+.LVL1036:
+	.loc 2 734 0
 	adds	r3, r6, #1
 	cmp	r0, r3
-	bhi	.L948
+	bhi	.L947
+.LVL1037:
+	.loc 2 740 0
 	cmp	r0, #2
-	bhi	.L958
+	bhi	.L957
+	.loc 2 741 0
 	adds	r4, r4, #1
+.LVL1038:
+	.loc 2 742 0
 	cmp	r4, #9
-	bls	.L958
+	bls	.L957
+.LVL1039:
+	.loc 2 744 0
 	mov	r3, r5
+	.loc 2 732 0
 	mov	r6, r0
+	.loc 2 743 0
 	sub	r5, fp, r4
+.LVL1040:
+	.loc 2 737 0
 	mov	r8, #0
-.L950:
+.LVL1041:
+.L949:
+	.loc 2 759 0
 	ldr	r2, [sp, #16]
 	cmp	r4, r2
 	it	ls
 	movls	r5, r3
-.L951:
-	cbz	r5, .L953
+.LVL1042:
+.L950:
+	.loc 2 762 0
+	cbz	r5, .L952
+	.loc 2 763 0
 	mov	r1, r5
-	ldr	r0, .L967+20
+	ldr	r0, .L966+20
+.LVL1043:
 	bl	printf
+.LVL1044:
+	.loc 2 764 0
 	uxtb	r0, r5
 	bl	NandcSetDdrPara
-.L953:
+.LVL1045:
+.L952:
+	.loc 2 767 0
 	cmp	r8, #0
-	beq	.L942
+	beq	.L941
+	.loc 2 768 0
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #8]
-	ldr	r0, .L967+24
+	ldr	r0, .L966+24
 	bl	printf
+.LVL1046:
+	.loc 2 769 0
 	ldr	r3, [sp, #56]
 	cmp	r3, #0
-	beq	.L954
+	beq	.L953
+	.loc 2 771 0
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L942
-.L956:
+.LVL1047:
+	b	.L941
+.LVL1048:
+.L955:
+	.loc 2 688 0
 	mov	r6, #1024
-	b	.L944
-.L948:
+	b	.L943
+.LVL1049:
+.L947:
+	.loc 2 748 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	bls	.L959
+	bls	.L958
+.LVL1050:
+	.loc 2 751 0
 	cmp	r4, #7
+	.loc 2 750 0
 	sub	r5, r10, r4
-	bhi	.L951
+.LVL1051:
+	.loc 2 751 0
+	bhi	.L950
 	str	r4, [sp, #16]
-.L959:
-	movs	r4, #0
-	b	.L949
+.LVL1052:
 .L958:
+	.loc 2 754 0
+	movs	r4, #0
+.LVL1053:
+	b	.L948
+.LVL1054:
+.L957:
+	.loc 2 737 0
 	mov	r8, #0
 	mov	r10, fp
 	mov	r6, r0
+	.loc 2 736 0
 	mov	r7, r8
+	.loc 2 735 0
 	str	r8, [sp, #4]
-.L949:
+.LVL1055:
+.L948:
+	.loc 2 730 0 discriminator 2
 	add	fp, fp, #2
+.LVL1056:
 	cmp	fp, #69
-	bls	.L952
+	bls	.L951
 	mov	r3, r5
 	mov	r5, r10
-	b	.L950
-.L968:
-	.align	2
+	b	.L949
 .L967:
+	.align	2
+.L966:
 	.word	.LANCHOR19
-	.word	.LANCHOR32
+	.word	.LANCHOR33
 	.word	.LANCHOR24
-	.word	.LC7
-	.word	.LANCHOR142
-	.word	.LC8
-	.word	.LC9
+	.word	.LC10
+	.word	.LANCHOR141
+	.word	.LC11
+	.word	.LC12
+	.cfi_endproc
+.LFE227:
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
@@ -6907,107 +11422,189 @@ FlashDdrTunningRead:
 	.fpu softvfp
 	.type	FlashReadPage, %function
 FlashReadPage:
+.LFB223:
+	.loc 2 518 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1057:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 518 0
 	mov	r7, r2
 	mov	r5, r0
 	mov	r6, r1
 	mov	r8, r3
+	.loc 2 519 0
 	bl	FlashReadRawPage
+.LVL1058:
+	.loc 2 522 0
 	adds	r2, r0, #1
+	.loc 2 519 0
 	mov	r4, r0
-	bne	.L970
-	ldr	r10, .L988+20
+.LVL1059:
+	.loc 2 522 0
+	bne	.L969
+	.loc 2 522 0 is_stmt 0 discriminator 1
+	ldr	r10, .L987+20
 	ldrb	fp, [r10]	@ zero_extendqisi2
 	cmp	fp, #0
-	bne	.L971
-.L973:
-	ldr	r3, .L988
+	bne	.L970
+.L972:
+.LVL1060:
+	.loc 2 529 0 is_stmt 1
+	ldr	r3, .L987
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L970
-	ldr	r3, .L988+4
+	cbz	r3, .L969
+.LBB307:
+	.loc 2 530 0
+	ldr	r3, .L987+4
+	.loc 2 531 0
 	mov	r1, r6
 	mov	r2, r7
 	mov	r0, r5
+	.loc 2 530 0
 	ldr	r3, [r3]
 	ldr	r10, [r3, #304]
+.LVL1061:
+	.loc 2 531 0
 	movs	r3, #1
 	str	r3, [sp]
 	mov	r3, r8
 	bl	FlashDdrTunningRead
+.LVL1062:
+	.loc 2 532 0
 	adds	r1, r0, #1
+	.loc 2 531 0
 	mov	r4, r0
-	beq	.L974
-	ldr	r3, .L988+8
+.LVL1063:
+	.loc 2 532 0
+	beq	.L973
+	.loc 2 532 0 is_stmt 0 discriminator 1
+	ldr	r3, .L987+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L970
-.L974:
+	bls	.L969
+.L973:
+	.loc 2 533 0 is_stmt 1
 	ubfx	r0, r10, #8, #8
+.LVL1064:
 	bl	NandcSetDdrPara
-	b	.L970
-.L971:
+.LVL1065:
+	b	.L969
+.LVL1066:
+.L970:
+.LBE307:
+.LBB308:
+	.loc 2 524 0
 	movs	r3, #0
+	.loc 2 525 0
 	mov	r2, r7
+	.loc 2 524 0
 	strb	r3, [r10]
+	.loc 2 525 0
 	mov	r1, r6
 	mov	r3, r8
 	mov	r0, r5
+.LVL1067:
 	bl	FlashReadRawPage
+.LVL1068:
+.LBE308:
+	.loc 2 529 0
 	adds	r3, r0, #1
+.LBB309:
+	.loc 2 526 0
 	strb	fp, [r10]
-	beq	.L973
+.LBE309:
+	.loc 2 529 0
+	beq	.L972
+.LBB310:
 	mov	r4, r0
-.L970:
-	ldr	r10, .L988+24
+.LVL1069:
+.L969:
+.LBE310:
+	.loc 2 536 0
+	ldr	r10, .L987+24
 	ldr	fp, [r10]
 	cmp	fp, #0
-	beq	.L969
+	beq	.L968
+	.loc 2 536 0 is_stmt 0 discriminator 1
 	adds	r2, r4, #1
-	bne	.L969
+	bne	.L968
+	.loc 2 537 0 is_stmt 1
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	fp
+.LVL1070:
+	.loc 2 538 0
 	mov	r3, r6
+	.loc 2 537 0
 	mov	r4, r0
+.LVL1071:
+	.loc 2 538 0
 	mov	r1, r0
 	mov	r2, r5
-	ldr	r0, .L988+12
+	ldr	r0, .L987+12
+.LVL1072:
 	bl	printf
+.LVL1073:
+	.loc 2 539 0
 	adds	r3, r4, #1
-	bne	.L969
-	ldr	r3, .L988+16
+	bne	.L968
+	.loc 2 539 0 is_stmt 0 discriminator 1
+	ldr	r3, .L987+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L969
+	cbz	r3, .L968
+	.loc 2 540 0 is_stmt 1
 	mov	r0, r5
 	bl	flash_enter_slc_mode
+.LVL1074:
+	.loc 2 541 0
 	ldr	r4, [r10]
+.LVL1075:
 	mov	r3, r8
 	mov	r2, r7
 	mov	r1, r6
 	mov	r0, r5
 	blx	r4
+.LVL1076:
 	mov	r4, r0
+.LVL1077:
+	.loc 2 542 0
 	mov	r0, r5
+.LVL1078:
 	bl	flash_exit_slc_mode
-.L969:
+.LVL1079:
+.L968:
+	.loc 2 547 0
 	mov	r0, r4
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L989:
-	.align	2
+.LVL1080:
 .L988:
-	.word	.LANCHOR28
+	.align	2
+.L987:
+	.word	.LANCHOR29
 	.word	.LANCHOR19
-	.word	.LANCHOR31
-	.word	.LC10
+	.word	.LANCHOR32
+	.word	.LC13
 	.word	.LANCHOR8
 	.word	.LANCHOR5
-	.word	.LANCHOR143
+	.word	.LANCHOR142
+	.cfi_endproc
+.LFE223:
 	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
@@ -7018,57 +11615,110 @@ FlashReadPage:
 	.fpu softvfp
 	.type	FlashDdrParaScan, %function
 FlashDdrParaScan:
+.LFB228:
+	.loc 2 781 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1081:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 781 0
 	mov	r6, r0
-	ldr	r4, .L1001
+.LVL1082:
+	.loc 2 784 0
+	ldr	r4, .L1000
+	.loc 2 786 0
 	movs	r5, #0
+	.loc 2 781 0
 	mov	r7, r1
+	.loc 2 784 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
+.LVL1083:
 	bl	FlashSetInterfaceMode
+.LVL1084:
+	.loc 2 785 0
 	ldrb	r0, [r4]	@ zero_extendqisi2
 	bl	NandcSetMode
+.LVL1085:
+	.loc 2 786 0
 	mov	r3, r5
 	mov	r2, r5
 	str	r5, [sp]
 	mov	r1, r7
 	mov	r0, r6
 	bl	FlashDdrTunningRead
+.LVL1086:
+	.loc 2 787 0
 	mov	r3, r5
 	mov	r2, r5
+	.loc 2 786 0
 	mov	r8, r0
+.LVL1087:
+	.loc 2 787 0
 	mov	r1, r7
 	mov	r0, r6
-	ldr	r5, .L1001+4
+.LVL1088:
+	ldr	r5, .L1000+4
 	bl	FlashReadRawPage
+.LVL1089:
 	adds	r0, r0, #1
-	beq	.L991
+	beq	.L990
+	.loc 2 789 0
 	cmp	r8, #-1
-	bne	.L992
-.L991:
+	bne	.L991
+.L990:
+.LVL1090:
+	.loc 2 789 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r4]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L992
+	bpl	.L991
+.LVL1091:
+.LBB313:
+.LBB314:
+	.loc 2 790 0 is_stmt 1
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
+.LVL1092:
+	.loc 2 791 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL1093:
+	.loc 2 792 0
 	movs	r3, #0
-.L1000:
+.LVL1094:
+.L999:
+.LBE314:
+.LBE313:
+	.loc 2 797 0
 	movs	r0, #0
+	.loc 2 794 0
 	strb	r3, [r5]
+	.loc 2 797 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L992:
+.LVL1095:
+.L991:
+	.cfi_restore_state
+	.loc 2 794 0
 	movs	r3, #1
-	b	.L1000
-.L1002:
-	.align	2
+	b	.L999
 .L1001:
+	.align	2
+.L1000:
 	.word	.LANCHOR24
-	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.cfi_endproc
+.LFE228:
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
@@ -7079,146 +11729,244 @@ FlashDdrParaScan:
 	.fpu softvfp
 	.type	FlashLoadPhyInfo, %function
 FlashLoadPhyInfo:
+.LFB230:
+	.loc 2 810 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1096:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 817 0
 	movs	r3, #60
+	.loc 2 810 0
 	sub	sp, sp, #24
-	ldr	fp, .L1018+8
+	.cfi_def_cfa_offset 56
+	.loc 2 824 0
+	ldr	fp, .L1017+8
+	.loc 2 827 0
 	movs	r4, #0
+	.loc 2 829 0
 	movs	r7, #4
+	.loc 2 817 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
 	movs	r3, #24
 	strb	r3, [sp, #22]
 	movs	r3, #16
-	ldr	r1, .L1018
+	.loc 2 826 0
+	ldr	r1, .L1017
+	.loc 2 829 0
 	mov	r0, r4
+	.loc 2 817 0
 	strb	r3, [sp, #23]
+	.loc 2 813 0
 	mov	r6, #-1
+	.loc 2 824 0
 	ldrh	r3, [fp, #10]
-	ldr	r8, .L1018+36
-	ldr	r5, .L1018+4
+	.loc 2 827 0
+	ldr	r8, .L1017+36
+	.loc 2 826 0
+	ldr	r5, .L1017+4
+	.loc 2 824 0
 	str	r3, [sp, #4]
+.LVL1097:
+	.loc 2 826 0
 	ldr	r3, [r1]
+.LVL1098:
+	.loc 2 827 0
 	str	r4, [r8]
+	.loc 2 826 0
 	str	r3, [r5]
+	.loc 2 829 0
 	bl	flash_enter_slc_mode
+.LVL1099:
+	.loc 2 833 0
 	mov	r10, r1
 	str	r8, [sp, #12]
-.L1004:
+.LVL1100:
+.L1003:
+	.loc 2 810 0
 	mov	r8, #0
 	adds	r3, r4, #1
 	str	r3, [sp, #8]
-.L1006:
+.LVL1101:
+.L1005:
+	.loc 2 832 0
 	add	r3, sp, #20
 	ldrb	r0, [r3, r8]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1102:
+	.loc 2 833 0
 	movs	r3, #0
 	ldr	r2, [r10]
 	mov	r1, r4
 	mov	r0, r3
 	bl	FlashReadRawPage
+.LVL1103:
+	.loc 2 834 0
 	adds	r0, r0, #1
-	bne	.L1005
+.LVL1104:
+	bne	.L1004
+	.loc 2 835 0
 	movs	r3, #0
 	ldr	r2, [r10]
 	ldr	r1, [sp, #8]
 	mov	r0, r3
+.LVL1105:
 	bl	FlashReadRawPage
+.LVL1106:
+	.loc 2 836 0
 	adds	r0, r0, #1
-	bne	.L1005
+.LVL1107:
+	bne	.L1004
+	.loc 2 831 0
 	add	r8, r8, #1
+.LVL1108:
 	cmp	r8, #4
-	bne	.L1006
-.L1007:
+	bne	.L1005
+.LVL1109:
+.L1006:
 	ldr	r3, [sp, #4]
+	.loc 2 830 0 discriminator 2
 	subs	r7, r7, #1
+.LVL1110:
 	add	r4, r4, r3
-	bne	.L1004
+	bne	.L1003
+	.loc 2 865 0
 	mov	r0, r7
-	b	.L1017
-.L1008:
+	b	.L1016
+.L1007:
+	.loc 2 850 0
 	movw	r1, #2036
 	add	r0, r8, #12
 	bl	JSHash
+.LVL1111:
 	ldr	r3, [r8, #8]
 	cmp	r3, r0
-	bne	.L1014
+	bne	.L1013
+	.loc 2 851 0
 	movs	r2, #32
 	add	r1, r8, #160
-	ldr	r0, .L1018+8
+	ldr	r0, .L1017+8
 	bl	ftl_memcpy
+.LVL1112:
+	.loc 2 852 0
 	ldr	r1, [r5]
 	movs	r2, #32
-	ldr	r0, .L1018+12
+	ldr	r0, .L1017+12
 	adds	r1, r1, #192
 	bl	ftl_memcpy
+.LVL1113:
+	.loc 2 853 0
 	ldr	r1, [r5]
 	mov	r2, #852
-	ldr	r0, .L1018+16
+	ldr	r0, .L1017+16
 	adds	r1, r1, #224
 	bl	ftl_memcpy
+.LVL1114:
+	.loc 2 854 0
 	ldr	r6, [r5]
+.LVL1115:
+	.loc 2 857 0
 	mov	r0, r4
-	ldr	r3, .L1018+20
+	.loc 2 854 0
+	ldr	r3, .L1017+20
+	.loc 2 857 0
 	ldrh	r1, [fp, #10]
+	.loc 2 854 0
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3]
+	.loc 2 856 0
 	ldr	r3, [sp, #12]
 	str	r4, [r3]
+	.loc 2 857 0
 	bl	__aeabi_uidiv
-	ldr	r3, .L1018+24
+.LVL1116:
+	ldr	r3, .L1017+24
+	.loc 2 858 0
 	adds	r2, r0, #1
-	cbz	r0, .L1010
-.L1016:
+	cbz	r0, .L1009
+.L1015:
+	.loc 2 859 0
 	str	r2, [r3]
+	.loc 2 860 0
 	ldrh	r2, [r6, #14]
+	.loc 2 861 0
 	movs	r6, #0
-	ldr	r3, .L1018+28
+	.loc 2 860 0
+	ldr	r3, .L1017+28
 	strb	r2, [r3]
-	b	.L1007
-.L1010:
+.LVL1117:
+	b	.L1006
+.LVL1118:
+.L1009:
+	.loc 2 859 0
 	movs	r2, #2
-	b	.L1016
-.L1014:
+	b	.L1015
+.LVL1119:
+.L1013:
 	mov	r6, #-1
-	b	.L1007
-.L1005:
+.LVL1120:
+	b	.L1006
+.LVL1121:
+.L1004:
+	.loc 2 844 0
 	ldr	r8, [r5]
-	ldr	r2, .L1018+32
+.LVL1122:
+	ldr	r2, .L1017+32
 	ldr	r3, [r8]
 	cmp	r3, r2
-	bne	.L1007
+	bne	.L1006
+	.loc 2 845 0
 	cmp	r6, #0
-	bne	.L1008
+	bne	.L1007
+	.loc 2 846 0
 	ldrh	r1, [fp, #10]
 	mov	r0, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L1018+24
+.LVL1123:
+	ldr	r3, .L1017+24
 	adds	r0, r0, #1
 	str	r0, [r3]
+	.loc 2 847 0
 	mov	r0, r6
-.L1017:
+.LVL1124:
+.L1016:
+	.loc 2 865 0
 	bl	flash_exit_slc_mode
+.LVL1125:
+	.loc 2 867 0
 	mov	r0, r6
 	add	sp, sp, #24
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1019:
-	.align	2
+.LVL1126:
 .L1018:
-	.word	.LANCHOR145
+	.align	2
+.L1017:
 	.word	.LANCHOR144
-	.word	.LANCHOR29
+	.word	.LANCHOR143
+	.word	.LANCHOR30
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR146
 	.word	.LANCHOR147
-	.word	.LANCHOR148
 	.word	1312902724
-	.word	.LANCHOR146
+	.word	.LANCHOR145
+	.cfi_endproc
+.LFE230:
 	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
 	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
@@ -7229,168 +11977,288 @@ FlashLoadPhyInfo:
 	.fpu softvfp
 	.type	ToshibaReadRetrial, %function
 ToshibaReadRetrial:
+.LFB240:
+	.loc 2 1741 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1127:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 1741 0
 	mov	r6, r0
 	str	r2, [sp, #12]
 	mov	fp, r3
 	str	r1, [sp, #20]
+	.loc 2 1748 0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1047
-	ldr	r2, .L1047+4
+.LVL1128:
+.LBB315:
+.LBB316:
+	.loc 3 123 0
+	ldr	r3, .L1046
+.LBE316:
+.LBE315:
+	.loc 2 1751 0
+	ldr	r2, .L1046+4
+.LBB320:
+.LBB317:
+	.loc 3 123 0
 	ldr	r4, [r3, r6, lsl #3]
+.LVL1129:
+	.loc 3 124 0
 	add	r3, r3, r6, lsl #3
 	str	r2, [sp, #16]
 	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+.LBE317:
+.LBE320:
+	.loc 2 1751 0
 	ldrb	r3, [r2]	@ zero_extendqisi2
+.LBB321:
+.LBB318:
+	.loc 3 126 0
 	add	r5, r7, #8
+.LBE318:
+.LBE321:
+	.loc 2 1751 0
 	subs	r3, r3, #67
+.LBB322:
+.LBB319:
+	.loc 3 126 0
 	add	r5, r4, r5, lsl #8
+.LVL1130:
+.LBE319:
+.LBE322:
+	.loc 2 1751 0
 	cmp	r3, #1
-	bls	.L1037
-	ldr	r3, .L1047+8
+	bls	.L1036
+	.loc 2 1753 0
+	ldr	r3, .L1046+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1038
+	cbz	r3, .L1037
+.LVL1131:
+	.loc 2 1755 0
 	movs	r0, #0
 	bl	NandcSetDdrMode
+.LVL1132:
+	.loc 2 1754 0
 	movs	r3, #1
-.L1038:
+.LVL1133:
+.L1037:
+	.loc 2 1744 0
 	str	r3, [sp, #8]
+.LVL1134:
+	.loc 2 1757 0
 	add	r3, r4, r7, lsl #8
+.LVL1135:
 	movs	r2, #92
 	str	r2, [r3, #2056]
+	.loc 2 1758 0
 	movs	r2, #197
 	str	r2, [r3, #2056]
-.L1021:
+.LVL1136:
+.L1020:
+	.loc 2 1760 0
 	mov	r8, #1
+	.loc 2 1743 0
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1023:
-	ldr	r3, .L1047+12
+.LVL1137:
+.L1022:
+	.loc 2 1760 0 discriminator 1
+	ldr	r3, .L1046+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r8, r3
-	bcc	.L1032
+	bcc	.L1031
 	ldr	r10, [sp, #4]
-.L1031:
+.LVL1138:
+.L1030:
+	.loc 2 1791 0
 	ldr	r3, [sp, #16]
+	.loc 2 1792 0
 	movs	r1, #0
 	mov	r0, r5
+	.loc 2 1791 0
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	subs	r2, r2, #67
 	cmp	r2, #1
-	bhi	.L1033
+	bhi	.L1032
+	.loc 2 1792 0
 	bl	SandiskSetRRPara
-.L1034:
+.LVL1139:
+.L1033:
+	.loc 2 1795 0
 	add	r4, r4, r7, lsl #8
 	movs	r2, #255
 	str	r2, [r4, #2056]
-	ldr	r2, .L1047+16
+	.loc 2 1798 0
+	ldr	r2, .L1046+16
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1035
+	bcc	.L1034
+	.loc 2 1799 0 discriminator 1
 	cmp	r10, #-1
 	it	ne
 	movne	r10, #256
-.L1035:
+.LVL1140:
+.L1034:
+	.loc 2 1800 0
 	mov	r0, r6
 	bl	NandcWaitFlashReady
+.LVL1141:
+	.loc 2 1801 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1020
+	cbz	r3, .L1019
+	.loc 2 1802 0
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L1020:
+.LVL1142:
+.L1019:
+	.loc 2 1804 0
 	mov	r0, r10
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1037:
+.LVL1143:
+.L1036:
+	.cfi_restore_state
+	.loc 2 1744 0
 	movs	r3, #0
 	str	r3, [sp, #8]
-	b	.L1021
-.L1032:
+	b	.L1020
+.LVL1144:
+.L1031:
+	.loc 2 1761 0
 	ldr	r3, [sp, #16]
+	.loc 2 1762 0
 	mov	r0, r5
 	uxtb	r1, r8
+	.loc 2 1761 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L1024
+	bhi	.L1023
+	.loc 2 1762 0
 	bl	SandiskSetRRPara
-.L1025:
+.LVL1145:
+.L1024:
+	.loc 2 1765 0
 	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L1026
-	ldr	r3, .L1047+12
+	bne	.L1025
+	.loc 2 1765 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1046+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r8, r3
+	.loc 2 1766 0 is_stmt 1 discriminator 1
 	ittt	eq
 	addeq	r3, r4, r7, lsl #8
 	moveq	r2, #179
 	streq	r2, [r3, #2056]
-.L1026:
+.L1025:
+	.loc 2 1768 0
 	add	r3, r4, r7, lsl #8
 	movs	r2, #38
 	str	r2, [r3, #2056]
+	.loc 2 1769 0
 	movs	r2, #93
 	str	r2, [r3, #2056]
+	.loc 2 1771 0
 	ldr	r3, [sp, #8]
-	cbz	r3, .L1027
+	cbz	r3, .L1026
+	.loc 2 1772 0
 	movs	r0, #4
 	bl	NandcSetDdrMode
+.LVL1146:
+	.loc 2 1773 0
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
+.LVL1147:
 	mov	r10, r0
+.LVL1148:
+	.loc 2 1774 0
 	movs	r0, #0
+.LVL1149:
 	bl	NandcSetDdrMode
-.L1028:
+.LVL1150:
+.L1027:
+	.loc 2 1780 0
 	cmp	r10, #-1
-	beq	.L1029
-	ldr	r2, .L1047+16
+	beq	.L1028
+	.loc 2 1785 0
+	ldr	r2, .L1046+16
 	ldr	r3, [sp, #4]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r3, #-1
 	it	eq
 	moveq	r3, r10
 	str	r3, [sp, #4]
+.LVL1151:
 	add	r2, r2, r2, lsl #1
 	cmp	r10, r2, asr #2
-	bcc	.L1031
+	bcc	.L1030
+	.loc 2 1784 0
 	mov	fp, #0
+	.loc 2 1783 0
 	str	fp, [sp, #12]
-.L1029:
+.LVL1152:
+.L1028:
+	.loc 2 1760 0 discriminator 2
 	add	r8, r8, #1
-	b	.L1023
-.L1024:
+.LVL1153:
+	b	.L1022
+.LVL1154:
+.L1023:
+	.loc 2 1764 0
 	bl	ToshibaSetRRPara
-	b	.L1025
-.L1027:
+.LVL1155:
+	b	.L1024
+.L1026:
+	.loc 2 1776 0
 	mov	r3, fp
 	ldr	r2, [sp, #12]
 	ldr	r1, [sp, #20]
 	mov	r0, r6
 	bl	FlashReadRawPage
+.LVL1156:
 	mov	r10, r0
-	b	.L1028
-.L1033:
+.LVL1157:
+	b	.L1027
+.LVL1158:
+.L1032:
+	.loc 2 1794 0
 	bl	ToshibaSetRRPara
-	b	.L1034
-.L1048:
-	.align	2
+.LVL1159:
+	b	.L1033
 .L1047:
+	.align	2
+.L1046:
 	.word	.LANCHOR6
 	.word	.LANCHOR10
-	.word	.LANCHOR28
-	.word	.LANCHOR149
-	.word	.LANCHOR31
+	.word	.LANCHOR29
+	.word	.LANCHOR148
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE240:
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
@@ -7401,76 +12269,132 @@ ToshibaReadRetrial:
 	.fpu softvfp
 	.type	SamsungReadRetrial, %function
 SamsungReadRetrial:
+.LFB242:
+	.loc 2 1820 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1160:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1820 0
 	mov	r7, r0
 	mov	r10, r2
 	mov	r8, r3
 	mov	fp, r1
+	.loc 2 1828 0
 	movs	r6, #1
+	.loc 2 1826 0
 	bl	NandcWaitFlashReady
-	ldr	r2, .L1062
+.LVL1161:
+.LBB323:
+.LBB324:
+	.loc 3 123 0
+	ldr	r2, .L1061
+.LBE324:
+.LBE323:
+	.loc 2 1822 0
 	mov	r4, #-1
+.LBB326:
+.LBB325:
+	.loc 3 124 0
 	add	r3, r2, r7, lsl #3
+	.loc 3 126 0
 	ldrb	r5, [r3, #4]	@ zero_extendqisi2
 	add	r3, r5, #8
 	ldr	r5, [r2, r7, lsl #3]
 	add	r5, r5, r3, lsl #8
-.L1050:
-	ldr	r3, .L1062+4
+.LVL1162:
+.L1049:
+.LBE325:
+.LBE326:
+	.loc 2 1828 0 discriminator 1
+	ldr	r3, .L1061+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L1054
-.L1053:
+	bcc	.L1053
+.LVL1163:
+.L1052:
+	.loc 2 1843 0
 	movs	r1, #0
 	mov	r0, r5
 	bl	SamsungSetRRPara
-	ldr	r3, .L1062+8
+.LVL1164:
+	.loc 2 1844 0
+	ldr	r3, .L1061+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, asr #2
-	bcc	.L1049
+	bcc	.L1048
+	.loc 2 1845 0 discriminator 1
 	adds	r3, r4, #1
 	it	ne
 	movne	r4, #256
-.L1049:
+.LVL1165:
+.L1048:
+	.loc 2 1848 0
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1054:
+.LVL1166:
+.L1053:
+	.loc 2 1829 0
 	uxtb	r1, r6
 	mov	r0, r5
 	bl	SamsungSetRRPara
+.LVL1167:
+	.loc 2 1830 0
 	mov	r2, r10
 	mov	r3, r8
 	mov	r1, fp
 	mov	r0, r7
 	bl	FlashReadRawPage
+.LVL1168:
+	.loc 2 1832 0
 	adds	r2, r0, #1
-	beq	.L1051
-	ldr	r3, .L1062+8
+	beq	.L1050
+	.loc 2 1837 0
+	ldr	r3, .L1061+8
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
+.LVL1169:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1057
+	bcc	.L1056
+	.loc 2 1836 0
 	mov	r8, #0
+	.loc 2 1835 0
 	mov	r10, r8
-.L1051:
+.LVL1170:
+.L1050:
+	.loc 2 1828 0 discriminator 2
 	adds	r6, r6, #1
-	b	.L1050
-.L1057:
+.LVL1171:
+	b	.L1049
+.LVL1172:
+.L1056:
+	.loc 2 1830 0
 	mov	r4, r0
-	b	.L1053
-.L1063:
-	.align	2
+.LVL1173:
+	b	.L1052
 .L1062:
+	.align	2
+.L1061:
 	.word	.LANCHOR6
-	.word	.LANCHOR149
-	.word	.LANCHOR31
+	.word	.LANCHOR148
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE242:
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
@@ -7481,125 +12405,251 @@ SamsungReadRetrial:
 	.fpu softvfp
 	.type	MicronReadRetrial, %function
 MicronReadRetrial:
+.LFB243:
+	.loc 2 1851 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1174:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r10, r3
-	ldr	r3, .L1079
+	.loc 2 1856 0
+	ldr	r3, .L1078
+.LVL1175:
+	.loc 2 1851 0
 	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 2 1851 0
 	mov	r7, r0
 	mov	fp, r2
 	str	r1, [sp, #16]
+	.loc 2 1856 0
 	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1079+4
+.LVL1176:
+	.loc 2 1858 0
+	ldr	r3, .L1078+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1065
+	bne	.L1064
+	.loc 2 1856 0
 	add	r4, r4, r4, lsl #1
+.LVL1177:
 	asrs	r4, r4, #2
-.L1066:
+.LVL1178:
+.L1065:
+	.loc 2 1861 0
 	mov	r0, r7
+.LVL1179:
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1079+8
+.LVL1180:
+.LBB327:
+.LBB328:
+	.loc 3 123 0
+	ldr	r3, .L1078+8
+.LBE328:
+.LBE327:
+	.loc 2 1863 0
 	movs	r6, #0
+	.loc 2 1853 0
 	mov	r5, #-1
+.LBB330:
+.LBB329:
+	.loc 3 123 0
 	ldr	r2, [r3, r7, lsl #3]
+	.loc 3 124 0
 	add	r3, r3, r7, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	.loc 3 123 0
 	str	r2, [sp, #8]
+.LVL1181:
 	str	r3, [sp, #12]
+.LVL1182:
+.LBE329:
+.LBE330:
+	.loc 2 1864 0
 	lsls	r3, r3, #8
 	str	r3, [sp, #24]
-.L1067:
-	ldr	r3, .L1079+12
+.LVL1183:
+.L1066:
+	.loc 2 1863 0 discriminator 1
+	ldr	r3, .L1078+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r6, r3
-	bcc	.L1071
-.L1070:
+	bcc	.L1070
+.LVL1184:
+.L1069:
+	.loc 2 1884 0
 	ldr	r3, [sp, #8]
+.LBB331:
+.LBB332:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE332:
+.LBE331:
+	.loc 2 1884 0
 	ldr	r2, [sp, #12]
 	add	r7, r3, r2, lsl #8
 	movs	r3, #239
 	str	r3, [r7, #2056]
+	.loc 2 1885 0
 	movs	r3, #137
 	str	r3, [r7, #2052]
+.LVL1185:
+.LBB334:
+.LBB333:
+	.loc 3 306 0
 	bl	udelay
+.LVL1186:
+.LBE333:
+.LBE334:
+	.loc 2 1891 0
 	cmp	r5, r4
+	.loc 2 1887 0
 	mov	r3, #0
 	str	r3, [r7, #2048]
+	.loc 2 1888 0
 	str	r3, [r7, #2048]
+	.loc 2 1889 0
 	str	r3, [r7, #2048]
+	.loc 2 1890 0
 	str	r3, [r7, #2048]
-	bcc	.L1064
+	.loc 2 1891 0
+	bcc	.L1063
+	.loc 2 1892 0 discriminator 1
 	adds	r3, r5, #1
+	.loc 2 1895 0 discriminator 1
 	ldr	r2, [sp, #16]
+	.loc 2 1892 0 discriminator 1
 	it	ne
 	movne	r5, #256
+.LVL1187:
+	.loc 2 1895 0 discriminator 1
 	mov	r3, r6
+.LVL1188:
 	str	r5, [sp]
 	mov	r1, r6
-	ldr	r0, .L1079+16
+	ldr	r0, .L1078+16
 	bl	printf
-.L1064:
+.LVL1189:
+.L1063:
+	.loc 2 1898 0
 	mov	r0, r5
 	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1065:
-	ldr	r3, .L1079+20
+.LVL1190:
+.L1064:
+	.cfi_restore_state
+	.loc 2 1859 0
+	ldr	r3, .L1078+20
 	smull	r4, r5, r4, r3
+.LVL1191:
 	mov	r4, r5
-	b	.L1066
-.L1071:
+.LVL1192:
+	b	.L1065
+.LVL1193:
+.L1070:
+	.loc 2 1864 0
 	ldr	r2, [sp, #24]
+.LBB335:
+.LBB336:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE336:
+.LBE335:
+	.loc 2 1864 0
 	ldr	r3, [sp, #8]
+	.loc 2 1868 0
 	mov	r8, #0
+	.loc 2 1864 0
 	add	r3, r3, r2
 	movs	r2, #239
 	str	r2, [r3, #2056]
+	.loc 2 1865 0
 	movs	r2, #137
 	str	r2, [r3, #2052]
 	str	r3, [sp, #28]
+.LVL1194:
+.LBB338:
+.LBB337:
+	.loc 3 306 0
 	bl	udelay
+.LVL1195:
+.LBE337:
+.LBE338:
+	.loc 2 1867 0
 	adds	r3, r6, #1
+	.loc 2 1871 0
 	ldr	r1, [sp, #16]
+	.loc 2 1867 0
 	mov	r2, r3
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #28]
+	.loc 2 1871 0
 	mov	r0, r7
+	.loc 2 1867 0
 	str	r2, [r3, #2048]
+	.loc 2 1871 0
 	mov	r2, fp
+	.loc 2 1868 0
 	str	r8, [r3, #2048]
+	.loc 2 1869 0
 	str	r8, [r3, #2048]
+	.loc 2 1870 0
 	str	r8, [r3, #2048]
+	.loc 2 1871 0
 	mov	r3, r10
 	bl	FlashReadRawPage
+.LVL1196:
+	.loc 2 1873 0
 	adds	r2, r0, #1
-	beq	.L1068
+	beq	.L1067
+	.loc 2 1874 0
 	cmp	r5, #-1
 	it	eq
 	moveq	r5, r0
+.LVL1197:
+	.loc 2 1878 0
 	cmp	r0, r4
-	bcc	.L1074
+	bcc	.L1073
+	.loc 2 1877 0
 	mov	r10, r8
+	.loc 2 1876 0
 	mov	fp, r8
-.L1068:
+.LVL1198:
+.L1067:
+	.loc 2 1876 0 is_stmt 0 discriminator 1
 	ldr	r6, [sp, #20]
-	b	.L1067
-.L1074:
+.LVL1199:
+	b	.L1066
+.LVL1200:
+.L1073:
+	.loc 2 1871 0 is_stmt 1
 	mov	r5, r0
-	b	.L1070
-.L1080:
-	.align	2
+.LVL1201:
+	b	.L1069
 .L1079:
-	.word	.LANCHOR31
+	.align	2
+.L1078:
+	.word	.LANCHOR32
 	.word	.LANCHOR8
 	.word	.LANCHOR6
-	.word	.LANCHOR149
-	.word	.LC11
+	.word	.LANCHOR148
+	.word	.LC14
 	.word	1431655766
+	.cfi_endproc
+.LFE243:
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
@@ -7610,95 +12660,168 @@ MicronReadRetrial:
 	.fpu softvfp
 	.type	HynixReadRetrial, %function
 HynixReadRetrial:
+.LFB245:
+	.loc 2 1929 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1202:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1929 0
 	mov	fp, r2
-	ldr	r4, .L1098
+	.loc 2 1933 0
+	ldr	r4, .L1097
+	.loc 2 1940 0
 	mov	r8, #0
+	.loc 2 1931 0
 	mov	r6, #-1
+	.loc 2 1929 0
 	mov	r10, r3
 	mov	r7, r0
 	str	r1, [sp, #4]
+	.loc 2 1934 0
 	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+.LVL1203:
+	.loc 2 1933 0
 	adds	r3, r4, r0
+.LVL1204:
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+.LVL1205:
+	.loc 2 1934 0
 	str	r2, [sp]
-	ldr	r2, .L1098+4
+.LVL1206:
+	.loc 2 1936 0
+	ldr	r2, .L1097+4
 	ldr	r2, [r2]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
 	cmp	r2, #7
+	.loc 2 1937 0
 	it	eq
 	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+.LVL1207:
+	.loc 2 1939 0
 	bl	NandcWaitFlashReady
-.L1083:
+.LVL1208:
+.L1082:
+	.loc 2 1940 0 discriminator 1
 	ldr	r3, [sp]
 	cmp	r8, r3
-	bcc	.L1088
-.L1087:
-	ldr	r3, .L1098+4
+	bcc	.L1087
+.LVL1209:
+.L1086:
+	.loc 2 1958 0
+	ldr	r3, .L1097+4
+	.loc 2 1959 0
 	add	r4, r4, r7
+	.loc 2 1958 0
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	ldr	r3, .L1098+8
+	.loc 2 1962 0
+	ldr	r3, .L1097+8
+	.loc 2 1959 0
 	ite	eq
 	strbeq	r5, [r4, #20]
+	.loc 2 1961 0
 	strbne	r5, [r4, #12]
+	.loc 2 1962 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
-	bcc	.L1081
+	bcc	.L1080
+	.loc 2 1963 0 discriminator 1
 	adds	r3, r6, #1
 	it	ne
 	movne	r6, #256
-.L1081:
+.LVL1210:
+.L1080:
+	.loc 2 1967 0
 	mov	r0, r6
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL1211:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1088:
+.LVL1212:
+.L1087:
+	.cfi_restore_state
+	.loc 2 1943 0
 	ldr	r3, [sp]
+	.loc 2 1941 0
 	adds	r5, r5, #1
+.LVL1213:
 	uxtb	r5, r5
-	ldr	r2, .L1098+12
+.LVL1214:
+	.loc 2 1944 0
+	ldr	r2, .L1097+12
 	ldrb	r1, [r4, #1]	@ zero_extendqisi2
 	mov	r0, r7
+	.loc 2 1943 0
 	cmp	r3, r5
 	it	ls
 	movls	r5, #0
+.LVL1215:
+	.loc 2 1944 0
 	mov	r3, r5
 	bl	HynixSetRRPara
+.LVL1216:
+	.loc 2 1945 0
 	mov	r2, fp
 	mov	r3, r10
 	ldr	r1, [sp, #4]
 	mov	r0, r7
 	bl	FlashReadRawPage
+.LVL1217:
+	.loc 2 1947 0
 	adds	r2, r0, #1
-	beq	.L1085
-	ldr	r3, .L1098+8
+	beq	.L1084
+	.loc 2 1952 0
+	ldr	r3, .L1097+8
+	.loc 2 1948 0
 	cmp	r6, #-1
 	it	eq
 	moveq	r6, r0
+.LVL1218:
+	.loc 2 1952 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, asr #2
-	bcc	.L1092
+	bcc	.L1091
+	.loc 2 1951 0
 	mov	r10, #0
+	.loc 2 1950 0
 	mov	fp, r10
-.L1085:
+.LVL1219:
+.L1084:
+	.loc 2 1940 0 discriminator 2
 	add	r8, r8, #1
-	b	.L1083
-.L1092:
+.LVL1220:
+	b	.L1082
+.LVL1221:
+.L1091:
+	.loc 2 1945 0
 	mov	r6, r0
-	b	.L1087
-.L1099:
-	.align	2
+.LVL1222:
+	b	.L1086
 .L1098:
+	.align	2
+.L1097:
 	.word	.LANCHOR20
 	.word	.LANCHOR18
-	.word	.LANCHOR31
+	.word	.LANCHOR32
 	.word	.LANCHOR20+4
+	.cfi_endproc
+.LFE245:
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
@@ -7709,66 +12832,120 @@ HynixReadRetrial:
 	.fpu softvfp
 	.type	FlashProgPage, %function
 FlashProgPage:
+.LFB224:
+	.loc 2 562 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1223:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 562 0
 	mov	r8, r3
-	ldr	r3, .L1103
+	.loc 2 566 0
+	ldr	r3, .L1102
+.LVL1224:
+	.loc 2 562 0
 	mov	r5, r1
 	mov	r7, r2
+	.loc 2 568 0
 	mov	r4, r0
+	.loc 2 566 0
 	ldrb	r6, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L1101
-	ldr	r3, .L1103+4
-	ldr	r2, .L1103+8
+.LVL1225:
+	.loc 2 568 0
+	cbnz	r0, .L1100
+	.loc 2 568 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1102+4
+	ldr	r2, .L1102+8
+.LVL1226:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	ldr	r1, [r2]
+.LVL1227:
 	muls	r1, r3, r1
 	cmp	r1, r5
-	bls	.L1101
-	ldr	r3, .L1103+12
+	bls	.L1100
+	.loc 2 569 0 is_stmt 1
+	ldr	r3, .L1102+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L1102
+	cbnz	r3, .L1101
+	.loc 2 572 0
 	subs	r6, r6, #2
-.L1101:
+.LVL1228:
+.L1100:
+	.loc 2 574 0
 	mov	r0, r4
+.LVL1229:
 	bl	NandcWaitFlashReady
+.LVL1230:
+	.loc 2 575 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL1231:
+	.loc 2 576 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgFirstCmd
+.LVL1232:
+	.loc 2 577 0
 	mov	r3, r7
 	uxtb	r2, r6
 	str	r8, [sp]
 	movs	r1, #1
 	mov	r0, r4
 	bl	NandcXferData
+.LVL1233:
+	.loc 2 578 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashProgSecondCmd
+.LVL1234:
+	.loc 2 579 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1235:
+	.loc 2 580 0
 	mov	r1, r5
 	mov	r0, r4
 	bl	FlashReadStatus
+.LVL1236:
 	mov	r1, r0
+.LVL1237:
+	.loc 2 581 0
 	mov	r0, r4
+.LVL1238:
 	bl	NandcFlashDeCs
+.LVL1239:
+	.loc 2 586 0
 	and	r0, r1, #1
+.LVL1240:
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1102:
+.LVL1241:
+.L1101:
+	.cfi_restore_state
+	.loc 2 570 0
 	movs	r6, #4
-	b	.L1101
-.L1104:
-	.align	2
+.LVL1242:
+	b	.L1100
 .L1103:
-	.word	.LANCHOR29
+	.align	2
+.L1102:
+	.word	.LANCHOR30
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.word	.LANCHOR1
+	.cfi_endproc
+.LFE224:
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
@@ -7779,89 +12956,149 @@ FlashProgPage:
 	.fpu softvfp
 	.type	FlashSavePhyInfo, %function
 FlashSavePhyInfo:
+.LFB231:
+	.loc 2 870 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1243:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r7, .L1114
-	ldr	r4, .L1114+4
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 873 0
+	ldr	r7, .L1113
+	ldr	r4, .L1113+4
 	ldr	r3, [r7]
-	ldr	r10, .L1114+60
-	ldr	r8, .L1114+64
+	.loc 2 886 0
+	ldr	r10, .L1113+60
+	.loc 2 903 0
+	ldr	r8, .L1113+64
+	.loc 2 873 0
 	str	r3, [r4]
-	ldr	r3, .L1114+8
+	.loc 2 877 0
+	ldr	r3, .L1113+8
 	ldrb	r0, [r3]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1244:
+	.loc 2 885 0
 	mov	r2, #2048
 	movs	r1, #0
 	ldr	r0, [r7]
 	bl	ftl_memset
-	ldr	r0, [r4]
+.LVL1245:
+	.loc 2 886 0
+	ldr	r3, [r4]
+	.loc 2 891 0
 	movs	r2, #32
-	ldr	r3, .L1114+12
-	ldr	r1, .L1114+16
-	str	r10, [r0]
-	adds	r0, r0, #16
+	ldr	r1, .L1113+12
+	.loc 2 886 0
+	str	r10, [r3]
+	.loc 2 887 0
+	ldr	r3, .L1113+16
+	ldr	r0, [r4]
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 891 0
+	adds	r0, r0, #16
+	.loc 2 887 0
 	strh	r3, [r0, #-4]	@ movhi
-	ldr	r3, .L1114+20
+	.loc 2 888 0
+	ldr	r3, .L1113+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r0, #-2]	@ movhi
-	ldr	r3, .L1114+24
+	.loc 2 889 0
+	ldr	r3, .L1113+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [r0, #1060]
+	.loc 2 891 0
 	bl	ftl_memcpy
+.LVL1246:
+	.loc 2 892 0
 	ldr	r0, [r4]
 	movs	r2, #8
-	ldr	r1, .L1114+28
+	ldr	r1, .L1113+28
 	adds	r0, r0, #80
 	bl	ftl_memcpy
+.LVL1247:
+	.loc 2 893 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1114+32
+	ldr	r1, .L1113+32
 	adds	r0, r0, #96
 	bl	ftl_memcpy
+.LVL1248:
+	.loc 2 895 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1114+36
+	ldr	r1, .L1113+36
 	adds	r0, r0, #160
 	bl	ftl_memcpy
+.LVL1249:
+	.loc 2 896 0
 	ldr	r0, [r4]
 	movs	r2, #32
-	ldr	r1, .L1114+40
+	ldr	r1, .L1113+40
 	adds	r0, r0, #192
 	bl	ftl_memcpy
+.LVL1250:
+	.loc 2 897 0
 	ldr	r0, [r4]
 	mov	r2, #852
-	ldr	r1, .L1114+44
+	ldr	r1, .L1113+44
 	adds	r0, r0, #224
 	bl	ftl_memcpy
+.LVL1251:
+	.loc 2 898 0
 	ldr	r5, [r4]
 	movw	r1, #2036
 	add	r0, r5, #12
 	bl	JSHash
-	ldr	r1, .L1114+48
+.LVL1252:
+	.loc 2 900 0
+	ldr	r1, .L1113+48
+	.loc 2 899 0
 	mov	r3, #1592
 	str	r3, [r5, #4]
+	.loc 2 898 0
 	str	r0, [r5, #8]
+	.loc 2 901 0
 	movs	r0, #0
+	.loc 2 900 0
 	ldr	r3, [r1]
+	.loc 2 872 0
 	movs	r5, #0
+	.loc 2 902 0
 	mov	r6, r5
+	.loc 2 900 0
 	str	r3, [r4]
+	.loc 2 901 0
 	bl	flash_enter_slc_mode
+.LVL1253:
 	mov	fp, r1
-.L1108:
+.LVL1254:
+.L1107:
+	.loc 2 903 0
 	ldr	r1, [r8]
 	movs	r2, #0
 	mov	r0, r2
 	muls	r1, r6, r1
 	bl	FlashEraseBlock
+.LVL1255:
+	.loc 2 904 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashProgPage
+.LVL1256:
+	.loc 2 905 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [r7]
@@ -7869,74 +13106,104 @@ FlashSavePhyInfo:
 	muls	r1, r6, r1
 	adds	r1, r1, #1
 	bl	FlashProgPage
+.LVL1257:
+	.loc 2 906 0
 	ldr	r1, [r8]
 	movs	r3, #0
 	ldr	r2, [fp]
 	mov	r0, r3
 	muls	r1, r6, r1
 	bl	FlashReadRawPage
+.LVL1258:
 	adds	r0, r0, #1
 	add	r2, r6, #1
-	beq	.L1106
+	beq	.L1105
+	.loc 2 907 0
 	ldr	r3, [r4]
 	ldr	r1, [r3]
 	cmp	r1, r10
-	bne	.L1106
+	bne	.L1105
+	.loc 2 908 0 discriminator 1
 	add	r0, r3, #12
 	movw	r1, #2036
 	str	r2, [sp, #4]
 	str	r3, [sp]
 	bl	JSHash
+.LVL1259:
+	.loc 2 907 0 discriminator 1
 	ldr	r3, [sp]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, #8]
 	cmp	r3, r0
-	bne	.L1106
-	ldr	r3, .L1114+52
+	bne	.L1105
+	.loc 2 909 0
+	ldr	r3, .L1113+52
+	.loc 2 914 0
 	cmp	r5, #1
+	.loc 2 909 0
 	str	r2, [r3]
+	.loc 2 910 0
 	ldr	r3, [r8]
 	mul	r6, r6, r3
-	ldr	r3, .L1114+56
+.LVL1260:
+	ldr	r3, .L1113+56
 	str	r6, [r3]
-	beq	.L1109
+.LVL1261:
+	.loc 2 914 0
+	beq	.L1108
 	movs	r5, #1
-.L1106:
+.LVL1262:
+.L1105:
+	.loc 2 902 0 discriminator 2
 	cmp	r2, #4
 	mov	r6, r2
-	bne	.L1108
-.L1107:
+.LVL1263:
+	bne	.L1107
+.LVL1264:
+.L1106:
+	.loc 2 917 0
 	movs	r0, #0
 	bl	flash_exit_slc_mode
+.LVL1265:
+	.loc 2 918 0
 	clz	r0, r5
 	lsrs	r0, r0, #5
+	.loc 2 922 0
 	negs	r0, r0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1109:
+.LVL1266:
+.L1108:
+	.cfi_restore_state
+	.loc 2 911 0
 	movs	r5, #2
-	b	.L1107
-.L1115:
-	.align	2
+.LVL1267:
+	b	.L1106
 .L1114:
-	.word	.LANCHOR145
+	.align	2
+.L1113:
 	.word	.LANCHOR144
-	.word	.LANCHOR150
-	.word	.LANCHOR25
+	.word	.LANCHOR143
+	.word	.LANCHOR149
 	.word	.LANCHOR22
+	.word	.LANCHOR25
 	.word	.LANCHOR2
-	.word	.LANCHOR28
+	.word	.LANCHOR29
 	.word	.LANCHOR26
 	.word	.LANCHOR17
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR7
 	.word	.LANCHOR20
-	.word	.LANCHOR151
-	.word	.LANCHOR147
+	.word	.LANCHOR150
 	.word	.LANCHOR146
+	.word	.LANCHOR145
 	.word	1312902724
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE231:
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
@@ -7947,13 +13214,32 @@ FlashSavePhyInfo:
 	.fpu softvfp
 	.type	FlashReadIdbDataRaw, %function
 FlashReadIdbDataRaw:
+.LFB249:
+	.loc 2 2091 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1268:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 2095 0
 	movs	r3, #60
+	.loc 2 2091 0
 	sub	sp, sp, #24
-	ldr	r2, .L1128
+	.cfi_def_cfa_offset 56
+	.loc 2 2105 0
+	ldr	r2, .L1127
+	.loc 2 2091 0
 	mov	r10, r0
+	.loc 2 2095 0
 	strb	r3, [sp, #20]
 	movs	r3, #40
 	strb	r3, [sp, #21]
@@ -7961,107 +13247,160 @@ FlashReadIdbDataRaw:
 	strb	r3, [sp, #22]
 	movs	r3, #16
 	strb	r3, [sp, #23]
-	ldr	r3, .L1128+4
+.LVL1269:
+	.loc 2 2103 0
+	ldr	r3, .L1127+4
+	.loc 2 2105 0
 	ldr	r1, [r2]
 	str	r2, [sp, #8]
+	.loc 2 2103 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-	ldr	r3, .L1128+8
+.LVL1270:
+	.loc 2 2105 0
+	ldr	r3, .L1127+8
 	cmp	r1, r3
 	str	r3, [sp, #12]
-	bne	.L1117
+	bne	.L1116
+	.loc 2 2106 0
 	movs	r0, #0
+.LVL1271:
 	bl	flash_enter_slc_mode
-.L1117:
+.LVL1272:
+.L1116:
+	.loc 2 2102 0
 	mov	r7, #-1
+	.loc 2 2108 0
 	movs	r4, #2
+	.loc 2 2107 0
 	mov	r2, #2048
 	movs	r1, #0
 	mov	r0, r10
 	bl	ftl_memset
-.L1118:
-	ldr	r3, .L1128+12
+.LVL1273:
+.L1117:
+	.loc 2 2108 0 discriminator 1
+	ldr	r3, .L1127+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1123
-.L1122:
+	bcc	.L1122
+.L1121:
+.LVL1274:
+	.loc 2 2132 0
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
+.LVL1275:
+	.loc 2 2133 0
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3]
 	cmp	r3, r2
-	bne	.L1116
+	bne	.L1115
+	.loc 2 2134 0
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L1116:
+.LVL1276:
+.L1115:
+	.loc 2 2136 0
 	mov	r0, r7
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1123:
-	ldr	r5, .L1128+16
+.LVL1277:
+.L1122:
+	.cfi_restore_state
+	.loc 2 2111 0
+	ldr	r5, .L1127+16
 	movs	r6, #0
-	ldr	fp, .L1128+32
-.L1120:
+	ldr	fp, .L1127+32
+.L1119:
+.LVL1278:
+	.loc 2 2110 0
 	add	r3, sp, #20
 	ldrb	r8, [r6, r3]	@ zero_extendqisi2
 	mov	r0, r8
 	bl	FlashBchSel
+.LVL1279:
+	.loc 2 2111 0
 	ldr	r1, [fp]
 	movs	r3, #0
 	ldr	r2, [r5]
 	mov	r0, r3
 	muls	r1, r4, r1
 	bl	FlashReadRawPage
+.LVL1280:
 	adds	r0, r0, #1
-	bne	.L1119
+	bne	.L1118
+	.loc 2 2109 0 discriminator 2
 	adds	r6, r6, #1
+.LVL1281:
 	cmp	r6, #4
-	bne	.L1120
-.L1121:
+	bne	.L1119
+.L1120:
+	.loc 2 2108 0 discriminator 2
 	adds	r4, r4, #1
-	b	.L1118
-.L1126:
+.LVL1282:
+	b	.L1117
+.LVL1283:
+.L1125:
+	.loc 2 2123 0
 	movs	r7, #0
-	b	.L1122
-.L1119:
+	b	.L1121
+.LVL1284:
+.L1118:
+	.loc 2 2117 0
 	ldr	r3, [r5]
 	ldr	r2, [r3]
-	ldr	r3, .L1128+20
+	ldr	r3, .L1127+20
 	cmp	r2, r3
-	bne	.L1121
+	bne	.L1120
+	.loc 2 2119 0
 	mov	r1, r8
-	ldr	r0, .L1128+24
+	ldr	r0, .L1127+24
 	bl	printf
+.LVL1285:
+	.loc 2 2121 0
 	mov	r2, #2048
 	ldr	r1, [r5]
 	mov	r0, r10
 	bl	ftl_memcpy
+.LVL1286:
+	.loc 2 2122 0
 	ldr	r3, [r5]
-	ldr	r2, .L1128+12
+	ldr	r2, .L1127+12
 	ldr	r3, [r3, #512]
 	strb	r3, [r2]
-	ldr	r3, .L1128+28
+.LVL1287:
+	.loc 2 2124 0
+	ldr	r3, .L1127+28
 	ldr	r2, [r3]
 	cmp	r4, r2
-	bcs	.L1126
+	bcs	.L1125
+	.loc 2 2125 0
 	str	r4, [r3]
+	.loc 2 2123 0
 	movs	r7, #0
+	.loc 2 2126 0
 	bl	FlashSavePhyInfo
-	b	.L1121
-.L1129:
-	.align	2
+.LVL1288:
+	.loc 2 2127 0
+	b	.L1120
 .L1128:
-	.word	.LANCHOR152
-	.word	.LANCHOR31
+	.align	2
+.L1127:
+	.word	.LANCHOR151
+	.word	.LANCHOR32
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LANCHOR145
+	.word	.LANCHOR144
 	.word	-52655045
-	.word	.LC12
-	.word	.LANCHOR147
+	.word	.LC15
+	.word	.LANCHOR146
 	.word	.LANCHOR3
+	.cfi_endproc
+.LFE249:
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
@@ -8072,74 +13411,116 @@ FlashReadIdbDataRaw:
 	.fpu softvfp
 	.type	FlashPageProgMsbFFData, %function
 FlashPageProgMsbFFData:
+.LFB247:
+	.loc 2 1984 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1289:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 2 1984 0
 	mov	r4, r2
-	ldr	r5, .L1140
+	.loc 2 1985 0
+	ldr	r5, .L1139
+	.loc 2 1984 0
 	mov	r6, r0
 	mov	r7, r1
+	.loc 2 1985 0
 	ldr	r3, [r5]
 	ldrb	r2, [r3, #19]	@ zero_extendqisi2
-	ldr	r3, .L1140+4
+.LVL1290:
+	.loc 2 1987 0
+	ldr	r3, .L1139+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1131
-	ldr	r3, .L1140+8
+	cbz	r3, .L1130
+	.loc 2 1987 0 is_stmt 0 discriminator 1
+	ldr	r3, .L1139+8
 	ldr	r1, [r3]
-	ldr	r3, .L1140+12
+.LVL1291:
+	ldr	r3, .L1139+12
 	cmp	r1, r3
-	beq	.L1130
-.L1131:
+	beq	.L1129
+.L1130:
+	.loc 2 1989 0 is_stmt 1
 	subs	r3, r2, #5
 	uxtb	r3, r3
 	cmp	r3, #30
-	bhi	.L1132
-	ldr	r2, .L1140+16
+	bhi	.L1131
+	ldr	r2, .L1139+16
+.LVL1292:
 	lsr	r3, r2, r3
 	lsls	r3, r3, #31
-	bmi	.L1134
+	bmi	.L1133
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1135:
+.LVL1293:
+.L1134:
+	.loc 2 1993 0
 	ldrh	r2, [r10, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1130
+	bne	.L1129
+	.loc 2 1994 0
 	mov	r2, #32768
 	movs	r1, #255
 	ldr	r0, [r8]
 	bl	ftl_memset
+.LVL1294:
+	.loc 2 2038 0
 	adds	r1, r4, r7
+	.loc 2 1991 0
 	adds	r4, r4, #1
+.LVL1295:
 	uxth	r4, r4
+	.loc 2 2038 0
 	movs	r3, #0
 	ldr	r2, [r8]
 	mov	r0, r6
 	bl	FlashProgPage
-.L1136:
+.LVL1296:
+.L1135:
+	.loc 2 1991 0 discriminator 1
 	ldr	r3, [r5]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L1135
+	bhi	.L1134
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1132:
+.LVL1297:
+.L1131:
+	.loc 2 1989 0
 	cmp	r2, #68
-	bne	.L1130
-.L1134:
-	ldr	r10, .L1140+20
-	ldr	r8, .L1140+24
-	b	.L1136
-.L1130:
+	bne	.L1129
+.LVL1298:
+.L1133:
+	.loc 2 1993 0 discriminator 1
+	ldr	r10, .L1139+20
+	.loc 2 1994 0 discriminator 1
+	ldr	r8, .L1139+24
+	b	.L1135
+.LVL1299:
+.L1129:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1141:
-	.align	2
+.LVL1300:
 .L1140:
+	.align	2
+.L1139:
 	.word	.LANCHOR18
 	.word	.LANCHOR8
-	.word	.LANCHOR152
+	.word	.LANCHOR151
 	.word	1446522928
 	.word	1073758215
 	.word	.LANCHOR117
-	.word	.LANCHOR151
+	.word	.LANCHOR150
+	.cfi_endproc
+.LFE247:
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
@@ -8150,10 +13531,18 @@ FlashPageProgMsbFFData:
 	.fpu softvfp
 	.type	ftl_memcmp, %function
 ftl_memcmp:
+.LFB483:
+	.loc 7 47 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1301:
+	.loc 7 48 0
 	b	memcmp
+.LVL1302:
+	.cfi_endproc
+.LFE483:
 	.size	ftl_memcmp, .-ftl_memcmp
 	.section	.text.rknand_get_clk_rate,"ax",%progbits
 	.align	1
@@ -8164,15 +13553,23 @@ ftl_memcmp:
 	.fpu softvfp
 	.type	rknand_get_clk_rate, %function
 rknand_get_clk_rate:
+.LFB484:
+	.loc 7 52 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L1144
+.LVL1303:
+	.loc 7 54 0
+	ldr	r0, .L1143
+.LVL1304:
 	bx	lr
-.L1145:
-	.align	2
 .L1144:
+	.align	2
+.L1143:
 	.word	148000000
+	.cfi_endproc
+.LFE484:
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
 	.align	1
@@ -8183,11 +13580,19 @@ rknand_get_clk_rate:
 	.fpu softvfp
 	.type	ftl_malloc, %function
 ftl_malloc:
+.LFB485:
+	.loc 7 57 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1305:
+	.loc 7 58 0
 	movs	r1, #0
 	b	kmalloc
+.LVL1306:
+	.cfi_endproc
+.LFE485:
 	.size	ftl_malloc, .-ftl_malloc
 	.section	.text.NandcInit,"ax",%progbits
 	.align	1
@@ -8198,69 +13603,148 @@ ftl_malloc:
 	.fpu softvfp
 	.type	NandcInit, %function
 NandcInit:
+.LFB267:
+	.loc 3 16 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1148
+.LVL1307:
+	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 3 41 0
 	movs	r2, #1
-	push	{r4, lr}
-	movs	r4, #0
+	ldr	r3, .L1148
+	movs	r1, #0
+	.loc 3 62 0
+	ldr	r4, .L1148+4
+	.loc 3 41 0
 	str	r2, [r3, #12]
 	movs	r2, #2
 	str	r2, [r3, #20]
 	movs	r2, #3
-	stm	r3, {r0, r4}
+	str	r2, [r3, #28]
+	.loc 3 45 0
+	ldr	r2, .L1148+8
+	.loc 3 42 0
+	stm	r3, {r0, r1}
+.LVL1308:
 	str	r0, [r3, #8]
+.LVL1309:
+	.loc 3 45 0
+	str	r0, [r2]
+	.loc 3 42 0
 	str	r0, [r3, #16]
-	str	r2, [r3, #28]
+.LVL1310:
 	str	r0, [r3, #24]
-	ldr	r3, .L1148+4
-	ldr	r2, .L1148+8
-	str	r0, [r3]
+.LVL1311:
+	.loc 3 53 0
 	ldr	r3, [r0]
 	and	r3, r3, #253952
-	ubfx	r1, r3, #13, #1
-	and	r3, r3, #245760
-	str	r1, [r2]
+.LVL1312:
+	.loc 3 62 0
+	ubfx	r5, r3, #13, #1
+	.loc 3 63 0
+	bfi	r3, r1, #13, #1
+	.loc 3 66 0
+	ldr	r1, [r0, #352]
+	.loc 3 65 0
 	orr	r3, r3, #256
-	ldr	r2, [r0, #352]
-	ldr	r1, .L1148+12
-	ubfx	r2, r2, #16, #4
-	str	r2, [r1]
+.LVL1313:
+	.loc 3 62 0
+	str	r5, [r4]
+	.loc 3 66 0
+	ldr	r4, .L1148+12
+	ubfx	r1, r1, #16, #4
+	.loc 3 67 0
+	ldr	r5, .L1148+16
+	.loc 3 66 0
+	str	r1, [r4]
+	.loc 3 67 0
 	ldr	r1, [r0, #352]
-	ldr	r2, .L1148+16
-	str	r1, [r2]
+	str	r1, [r5]
+	.loc 3 68 0
+	movw	r5, #2049
+	cmp	r1, r5
+	.loc 3 69 0
+	itt	eq
+	moveq	r1, #8
+	streq	r1, [r4]
+	.loc 3 71 0
+	movs	r4, #0
+.LVL1314:
+	.loc 3 70 0
 	str	r3, [r0]
-	movw	r3, #4225
-	str	r4, [r0, #336]
-	str	r3, [r0, #4]
-	movw	r3, #8322
-	str	r3, [r0, #344]
-	ldr	r3, .L1148+20
-	str	r3, [r0, #304]
+	.loc 3 101 0
 	mov	r0, #36864
+.LVL1315:
+	.loc 3 71 0
+	ldr	r3, [r2]
+.LVL1316:
+.LBB343:
+.LBB344:
+.LBB345:
+.LBB346:
+	.loc 3 379 0
+	movw	r2, #4225
+.LBE346:
+.LBE345:
+.LBE344:
+.LBE343:
+	.loc 3 71 0
+	str	r4, [r3, #336]
+.LVL1317:
+.LBB350:
+.LBB349:
+.LBB348:
+.LBB347:
+	.loc 3 379 0
+	str	r2, [r3, #4]
+.LVL1318:
+.LBE347:
+.LBE348:
+.LBE349:
+.LBE350:
+	.loc 3 74 0
+	movw	r2, #8322
+	str	r2, [r3, #344]
+	.loc 3 83 0
+	ldr	r2, .L1148+20
+	str	r2, [r3, #304]
+	.loc 3 101 0
 	bl	ftl_malloc
+.LVL1319:
 	ldr	r3, .L1148+24
 	str	r0, [r3]
+	.loc 3 102 0
 	ldr	r3, .L1148+28
 	str	r0, [r3]
+	.loc 3 103 0
 	add	r0, r0, #32768
 	str	r0, [r3, #4]
+	.loc 3 104 0
 	str	r4, [r3, #24]
+	.loc 3 106 0
 	ldr	r3, .L1148+32
 	str	r4, [r3]
-	pop	{r4, pc}
+	pop	{r3, r4, r5, pc}
 .L1149:
 	.align	2
 .L1148:
 	.word	.LANCHOR6
-	.word	.LANCHOR19
-	.word	.LANCHOR153
-	.word	.LANCHOR32
 	.word	.LANCHOR152
-	.word	1710593
-	.word	.LANCHOR154
+	.word	.LANCHOR19
 	.word	.LANCHOR33
+	.word	.LANCHOR151
+	.word	1710593
+	.word	.LANCHOR153
 	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.cfi_endproc
+.LFE267:
 	.size	NandcInit, .-NandcInit
 	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
@@ -8271,295 +13755,502 @@ NandcInit:
 	.fpu softvfp
 	.type	FtlMemInit, %function
 FtlMemInit:
+.LFB297:
+	.loc 4 355 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 4 359 0
 	ldr	r3, .L1155
+	.loc 4 355 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 359 0
 	movs	r4, #0
+	.loc 4 377 0
 	ldr	r2, .L1155+4
+	.loc 4 399 0
 	movs	r6, #12
+	.loc 4 359 0
 	strh	r4, [r3]	@ movhi
+	.loc 4 360 0
 	ldr	r3, .L1155+8
+	.loc 4 398 0
 	ldr	r5, .L1155+12
+	.loc 4 400 0
 	ldr	r10, .L1155+296
+	.loc 4 360 0
 	str	r4, [r3]
+	.loc 4 361 0
 	ldr	r3, .L1155+16
+	.loc 4 398 0
 	ldrh	r0, [r5]
+	.loc 4 411 0
 	ldr	r8, .L1155+300
+	.loc 4 361 0
 	str	r4, [r3]
+	.loc 4 362 0
 	ldr	r3, .L1155+20
+	.loc 4 398 0
 	lsls	r0, r0, #1
+	.loc 4 423 0
 	ldr	fp, .L1155+304
+	.loc 4 362 0
 	str	r4, [r3]
+	.loc 4 363 0
 	ldr	r3, .L1155+24
 	str	r4, [r3]
+	.loc 4 364 0
 	ldr	r3, .L1155+28
 	str	r4, [r3]
+	.loc 4 365 0
 	ldr	r3, .L1155+32
 	str	r4, [r3]
+	.loc 4 366 0
 	ldr	r3, .L1155+36
 	str	r4, [r3]
+	.loc 4 367 0
 	ldr	r3, .L1155+40
 	str	r4, [r3]
+	.loc 4 368 0
 	ldr	r3, .L1155+44
 	str	r4, [r3]
+	.loc 4 369 0
 	ldr	r3, .L1155+48
 	str	r4, [r3]
+	.loc 4 370 0
 	ldr	r3, .L1155+52
 	str	r4, [r3]
+	.loc 4 371 0
 	ldr	r3, .L1155+56
 	str	r4, [r3]
+	.loc 4 372 0
 	ldr	r3, .L1155+60
 	str	r4, [r3]
+	.loc 4 373 0
 	ldr	r3, .L1155+64
 	str	r4, [r3]
+	.loc 4 374 0
 	ldr	r3, .L1155+68
 	str	r4, [r3]
+	.loc 4 375 0
 	ldr	r3, .L1155+72
 	str	r4, [r3]
+	.loc 4 376 0
 	ldr	r3, .L1155+76
 	str	r4, [r3]
+	.loc 4 377 0
 	movw	r3, #65535
 	str	r3, [r2]
+	.loc 4 378 0
 	ldr	r2, .L1155+80
 	str	r4, [r2]
+	.loc 4 379 0
 	ldr	r2, .L1155+84
 	str	r4, [r2]
+	.loc 4 380 0
 	ldr	r2, .L1155+88
 	str	r4, [r2]
+	.loc 4 381 0
 	ldr	r2, .L1155+92
 	strh	r3, [r2]	@ movhi
+	.loc 4 382 0
 	ldr	r2, .L1155+96
 	strh	r3, [r2]	@ movhi
+	.loc 4 383 0
 	movs	r2, #32
 	ldr	r3, .L1155+100
 	strh	r2, [r3]	@ movhi
+	.loc 4 384 0
 	movs	r2, #128
 	ldr	r3, .L1155+104
 	strh	r2, [r3]	@ movhi
+	.loc 4 385 0
 	ldr	r3, .L1155+108
 	strh	r4, [r3]	@ movhi
+	.loc 4 386 0
 	ldr	r3, .L1155+112
 	strh	r4, [r3]	@ movhi
+	.loc 4 387 0
 	ldr	r3, .L1155+116
 	strh	r4, [r3]	@ movhi
+	.loc 4 388 0
 	ldr	r3, .L1155+120
 	strh	r4, [r3]	@ movhi
+	.loc 4 398 0
 	bl	ftl_malloc
+.LVL1320:
 	ldr	r3, .L1155+124
 	str	r0, [r3]
+	.loc 4 399 0
 	ldrh	r0, [r5]
+	.loc 4 400 0
 	movs	r5, #36
+	.loc 4 399 0
 	muls	r0, r6, r0
 	bl	ftl_malloc
+.LVL1321:
 	ldr	r3, .L1155+128
 	str	r0, [r3]
+	.loc 4 400 0
 	ldrh	r3, [r10]
 	muls	r5, r3, r5
+.LVL1322:
+	.loc 4 401 0
 	lsls	r7, r5, #2
 	mov	r0, r7
 	bl	ftl_malloc
+.LVL1323:
 	ldr	r3, .L1155+132
 	str	r0, [r3]
+	.loc 4 402 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1324:
 	ldr	r3, .L1155+136
 	str	r0, [r3]
+	.loc 4 403 0
 	mov	r0, r7
 	bl	ftl_malloc
+.LVL1325:
 	ldr	r3, .L1155+140
+	.loc 4 410 0
 	ldr	r7, .L1155+144
+	.loc 4 403 0
 	str	r0, [r3]
+	.loc 4 404 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1326:
 	ldr	r3, .L1155+148
 	str	r0, [r3]
+	.loc 4 405 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1327:
 	ldr	r3, .L1155+152
+	.loc 4 410 0
 	ldrh	r5, [r7]
+.LVL1328:
+	.loc 4 405 0
 	str	r0, [r3]
+	.loc 4 411 0
 	ldrh	r3, [r10]
+	.loc 4 412 0
 	mov	r0, r5
+	.loc 4 411 0
 	lsls	r3, r3, #1
 	adds	r3, r3, #1
 	str	r3, [r8]
+	.loc 4 412 0
 	bl	ftl_malloc
+.LVL1329:
 	ldr	r3, .L1155+156
 	str	r0, [r3]
+	.loc 4 413 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1330:
 	ldr	r3, .L1155+160
 	str	r0, [r3]
+	.loc 4 414 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1331:
 	ldr	r3, .L1155+164
 	str	r0, [r3]
+	.loc 4 415 0
 	ldr	r0, [r8]
 	muls	r0, r5, r0
 	bl	ftl_malloc
+.LVL1332:
 	ldr	r3, .L1155+168
 	str	r0, [r3]
+	.loc 4 419 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1333:
 	ldr	r3, .L1155+172
 	str	r0, [r3]
+	.loc 4 420 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1334:
 	ldr	r3, .L1155+176
 	str	r0, [r3]
+	.loc 4 421 0
 	ldr	r0, [r8]
 	muls	r0, r6, r0
 	bl	ftl_malloc
+.LVL1335:
 	ldr	r3, .L1155+180
+	.loc 4 423 0
 	ldrh	r5, [r10]
+.LVL1336:
+	.loc 4 447 0
 	ldr	r10, .L1155+308
+	.loc 4 421 0
 	str	r0, [r3]
+	.loc 4 423 0
 	ldrh	r3, [fp]
 	muls	r5, r3, r5
+.LVL1337:
+	.loc 4 424 0
 	mov	r0, r5
 	bl	ftl_malloc
+.LVL1338:
 	ldr	r3, .L1155+184
 	str	r0, [r3]
+	.loc 4 425 0
 	lsls	r0, r5, #2
+	.loc 4 432 0
 	ldr	r5, .L1155+188
+.LVL1339:
+	.loc 4 425 0
 	bl	ftl_malloc
+.LVL1340:
 	ldr	r3, .L1155+192
 	str	r0, [r3]
+	.loc 4 426 0
 	ldrh	r3, [fp]
 	ldr	r0, [r8]
+	.loc 4 432 0
 	ldr	r8, .L1155+312
+	.loc 4 426 0
 	muls	r0, r3, r0
 	bl	ftl_malloc
+.LVL1341:
 	ldr	r3, .L1155+196
 	str	r0, [r3]
+	.loc 4 432 0
 	ldrh	r0, [r5]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r8]	@ movhi
+	.loc 4 433 0
 	bl	ftl_malloc
+.LVL1342:
 	ldr	r3, .L1155+200
 	str	r0, [r3]
+	.loc 4 434 0
 	ldrh	r3, [r8]
+	.loc 4 435 0
 	ldr	r0, .L1155+204
+	.loc 4 434 0
 	addw	r3, r3, #547
 	lsrs	r3, r3, #9
+	.loc 4 435 0
 	and	r0, r0, r3, lsl #9
+	.loc 4 434 0
 	strh	r3, [r8]	@ movhi
+	.loc 4 435 0
 	bl	ftl_malloc
+.LVL1343:
 	ldr	r3, .L1155+208
 	str	r0, [r3]
+	.loc 4 436 0
 	adds	r0, r0, #32
 	ldr	r3, .L1155+212
 	str	r0, [r3]
+.LVL1344:
+	.loc 4 442 0
 	ldrh	r0, [r5]
+	.loc 4 446 0
 	lsls	r0, r0, #1
+.LVL1345:
 	bl	ftl_malloc
+.LVL1346:
 	ldr	r3, .L1155+216
 	str	r0, [r3]
+.LVL1347:
+	.loc 4 447 0
 	ldr	r3, [r10]
 	lsl	r8, r3, #1
+.LVL1348:
+	.loc 4 448 0
 	mov	r0, r8
 	bl	ftl_malloc
+.LVL1349:
 	ldr	r3, .L1155+220
 	str	r0, [r3]
+	.loc 4 449 0
 	mov	r0, r8
 	bl	ftl_malloc
+.LVL1350:
 	ldr	r3, .L1155+224
+	.loc 4 451 0
 	ldr	r8, .L1155+316
+.LVL1351:
+	.loc 4 449 0
 	str	r0, [r3]
+	.loc 4 450 0
 	ldrh	r0, [r5]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
+.LVL1352:
 	ldr	r3, .L1155+228
 	str	r0, [r3]
+	.loc 4 451 0
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
+.LVL1353:
 	ldr	r3, .L1155+232
 	str	r0, [r3]
+	.loc 4 452 0
 	ldrh	r0, [r8]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
+.LVL1354:
 	ldr	r3, .L1155+236
 	str	r0, [r3]
+	.loc 4 453 0
 	ldrh	r0, [r8]
+	.loc 4 454 0
 	ldr	r8, .L1155+320
+	.loc 4 453 0
 	lsls	r0, r0, #2
 	bl	ftl_malloc
+.LVL1355:
 	ldr	r3, .L1155+240
 	str	r0, [r3]
+	.loc 4 454 0
 	ldrh	r0, [r8]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
+.LVL1356:
+	.loc 4 455 0
 	ldrh	r2, [r8]
 	mov	r1, r4
+	.loc 4 454 0
 	ldr	r3, .L1155+244
+	.loc 4 455 0
 	lsls	r2, r2, #2
+	.loc 4 454 0
 	str	r0, [r3]
+	.loc 4 455 0
 	bl	ftl_memset
+.LVL1357:
+	.loc 4 457 0
 	ldr	r3, .L1155+248
 	ldrh	r4, [r3]
 	lsls	r4, r4, #2
+.LVL1358:
+	.loc 4 458 0
 	mov	r0, r4
 	bl	ftl_malloc
+.LVL1359:
 	ldr	r3, .L1155+252
 	str	r0, [r3]
+	.loc 4 459 0
 	mov	r0, r4
 	bl	ftl_malloc
+.LVL1360:
 	ldr	r3, .L1155+256
+	.loc 4 462 0
 	ldr	r4, .L1155+260
+.LVL1361:
+	.loc 4 459 0
 	str	r0, [r3]
+.LVL1362:
+	.loc 4 460 0
 	ldr	r0, [r10]
+	.loc 4 461 0
 	lsls	r0, r0, #2
+.LVL1363:
 	bl	ftl_malloc
+.LVL1364:
 	ldr	r3, .L1155+264
 	str	r0, [r3]
+.LVL1365:
+	.loc 4 462 0
 	ldrh	r0, [r4]
+	.loc 4 463 0
 	muls	r0, r6, r0
+.LVL1366:
+	.loc 4 469 0
 	ldr	r6, .L1155+268
+	.loc 4 463 0
 	bl	ftl_malloc
+.LVL1367:
 	ldr	r3, .L1155+272
 	str	r0, [r3]
+.LVL1368:
+	.loc 4 464 0
 	ldrh	r3, [r4]
 	ldrh	r0, [r7]
+	.loc 4 465 0
 	muls	r0, r3, r0
+.LVL1369:
 	bl	ftl_malloc
+.LVL1370:
 	ldr	r3, .L1155+276
 	str	r0, [r3]
+.LVL1371:
+	.loc 4 467 0
 	movs	r0, #6
+	.loc 4 466 0
 	ldrh	r3, [r5]
+	.loc 4 468 0
 	ldr	r5, .L1155+280
+	.loc 4 467 0
 	muls	r0, r3, r0
+.LVL1372:
 	bl	ftl_malloc
+.LVL1373:
 	ldr	r3, .L1155+284
 	str	r0, [r3]
+	.loc 4 468 0
 	ldr	r3, .L1155+288
 	ldrh	r0, [r3]
+	.loc 4 469 0
 	ldrh	r3, [r6]
+	.loc 4 468 0
 	adds	r0, r0, #31
 	asrs	r0, r0, #5
 	strh	r0, [r5]	@ movhi
+.LVL1374:
+	.loc 4 469 0
 	muls	r0, r3, r0
+.LVL1375:
+	.loc 4 470 0
 	lsls	r0, r0, #2
+.LVL1376:
 	bl	ftl_malloc
+.LVL1377:
+	.loc 4 473 0
 	ldrh	r1, [r5]
+	.loc 4 471 0
 	movs	r2, #1
+	.loc 4 470 0
 	ldr	r3, .L1155+292
+	.loc 4 471 0
 	ldrh	r6, [r6]
 	lsls	r1, r1, #2
+	.loc 4 470 0
 	mov	r4, r3
 	str	r0, [r4, #28]!
+.LVL1378:
+	.loc 4 471 0
 	mov	r0, r1
 	b	.L1156
 .L1157:
 	.align	2
 .L1155:
-	.word	.LANCHOR137
-	.word	.LANCHOR171
+	.word	.LANCHOR136
+	.word	.LANCHOR170
+	.word	.LANCHOR154
+	.word	.LANCHOR54
 	.word	.LANCHOR155
-	.word	.LANCHOR53
 	.word	.LANCHOR156
 	.word	.LANCHOR157
 	.word	.LANCHOR158
@@ -8570,32 +14261,31 @@ FtlMemInit:
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR165
+	.word	.LANCHOR79
 	.word	.LANCHOR166
-	.word	.LANCHOR78
 	.word	.LANCHOR167
 	.word	.LANCHOR168
 	.word	.LANCHOR169
-	.word	.LANCHOR170
+	.word	.LANCHOR171
 	.word	.LANCHOR172
-	.word	.LANCHOR173
-	.word	.LANCHOR72
+	.word	.LANCHOR73
 	.word	.LANCHOR112
 	.word	.LANCHOR113
+	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR176
 	.word	.LANCHOR114
-	.word	.LANCHOR177
+	.word	.LANCHOR176
 	.word	.LANCHOR116
 	.word	.LANCHOR108
-	.word	.LANCHOR111
+	.word	.LANCHOR110
+	.word	.LANCHOR177
 	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR180
-	.word	.LANCHOR56
-	.word	.LANCHOR76
+	.word	.LANCHOR57
+	.word	.LANCHOR77
 	.word	.LANCHOR106
-	.word	.LANCHOR79
+	.word	.LANCHOR180
 	.word	.LANCHOR181
 	.word	.LANCHOR182
 	.word	.LANCHOR104
@@ -8603,67 +14293,82 @@ FtlMemInit:
 	.word	.LANCHOR184
 	.word	.LANCHOR103
 	.word	.LANCHOR185
-	.word	.LANCHOR39
+	.word	.LANCHOR40
 	.word	.LANCHOR186
 	.word	.LANCHOR105
 	.word	.LANCHOR134
 	.word	33553920
 	.word	.LANCHOR188
-	.word	.LANCHOR77
-	.word	.LANCHOR82
+	.word	.LANCHOR78
+	.word	.LANCHOR83
 	.word	.LANCHOR126
 	.word	.LANCHOR122
 	.word	.LANCHOR0
-	.word	.LANCHOR70
+	.word	.LANCHOR71
 	.word	.LANCHOR189
 	.word	.LANCHOR190
 	.word	.LANCHOR191
-	.word	.LANCHOR65
+	.word	.LANCHOR66
 	.word	.LANCHOR128
 	.word	.LANCHOR192
-	.word	.LANCHOR66
+	.word	.LANCHOR67
 	.word	.LANCHOR127
-	.word	.LANCHOR43
-	.word	.LANCHOR95
+	.word	.LANCHOR44
+	.word	.LANCHOR96
 	.word	.LANCHOR123
 	.word	.LANCHOR120
-	.word	.LANCHOR80
-	.word	.LANCHOR49
-	.word	.LANCHOR73
-	.word	.LANCHOR36
+	.word	.LANCHOR81
+	.word	.LANCHOR50
+	.word	.LANCHOR74
+	.word	.LANCHOR37
 	.word	.LANCHOR107
-	.word	.LANCHOR57
-	.word	.LANCHOR63
+	.word	.LANCHOR58
+	.word	.LANCHOR64
 	.word	.LANCHOR187
-	.word	.LANCHOR60
 	.word	.LANCHOR61
+	.word	.LANCHOR62
 .L1156:
+.LVL1379:
 .L1151:
+	.loc 4 471 0 is_stmt 0 discriminator 1
 	cmp	r2, r6
 	bcc	.L1152
 	add	r3, r3, r2, lsl #2
 	ldr	r2, .L1158
+.LVL1380:
+	.loc 4 478 0 is_stmt 1
 	movs	r1, #0
 	adds	r3, r3, #24
 .L1153:
+	.loc 4 476 0 discriminator 1
 	cmp	r3, r2
 	bne	.L1154
+	.loc 4 605 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1381:
 .L1152:
+	.loc 4 473 0 discriminator 3
 	ldr	r5, [r3, #28]
+	.loc 4 471 0 discriminator 3
 	adds	r2, r2, #1
+.LVL1382:
+	.loc 4 473 0 discriminator 3
 	add	r5, r5, r0
 	add	r0, r0, r1
 	str	r5, [r4, #4]!
 	b	.L1151
+.LVL1383:
 .L1154:
+	.loc 4 478 0 discriminator 2
 	str	r1, [r3, #4]!
 	b	.L1153
 .L1159:
 	.align	2
 .L1158:
-	.word	.LANCHOR73+56
+	.word	.LANCHOR74+56
+	.cfi_endproc
+.LFE297:
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",%progbits
 	.align	1
@@ -8674,10 +14379,23 @@ FtlMemInit:
 	.fpu softvfp
 	.type	ftl_free, %function
 ftl_free:
+.LFB486:
+	.loc 7 62 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1384:
+.LBB351:
+.LBB352:
+	.file 8 "include/linux/compat.h"
+	.loc 8 80 0
 	b	free
+.LVL1385:
+.LBE352:
+.LBE351:
+	.cfi_endproc
+.LFE486:
 	.size	ftl_free, .-ftl_free
 	.section	.text.StorageSysDataLoad,"ax",%progbits
 	.align	1
@@ -8688,21 +14406,47 @@ ftl_free:
 	.fpu softvfp
 	.type	StorageSysDataLoad, %function
 StorageSysDataLoad:
+.LFB487:
+	.loc 7 67 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1386:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 7 67 0
 	mov	r4, r1
 	mov	r5, r0
+	.loc 7 70 0
 	mov	r2, #512
 	movs	r1, #0
+.LVL1387:
 	mov	r0, r4
+.LVL1388:
 	bl	memset
+.LVL1389:
+	.loc 7 71 0
 	mov	r3, r4
 	add	r1, r5, #256
 	movs	r2, #1
 	movs	r0, #16
+	.loc 7 73 0
 	pop	{r4, r5, r6, lr}
+	.cfi_restore 14
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL1390:
+	.loc 7 71 0
 	b	FtlRead
+.LVL1391:
+	.cfi_endproc
+.LFE487:
 	.size	StorageSysDataLoad, .-StorageSysDataLoad
 	.section	.text.StorageSysDataStore,"ax",%progbits
 	.align	1
@@ -8713,15 +14457,83 @@ StorageSysDataLoad:
 	.fpu softvfp
 	.type	StorageSysDataStore, %function
 StorageSysDataStore:
+.LFB488:
+	.loc 7 76 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1392:
+	.loc 7 79 0
 	mov	r3, r1
 	movs	r2, #1
 	add	r1, r0, #256
+.LVL1393:
 	movs	r0, #16
+.LVL1394:
 	b	FtlWrite
+.LVL1395:
+	.cfi_endproc
+.LFE488:
 	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorRead,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+.LFB489:
+	.loc 7 84 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1396:
+	.loc 7 87 0
+	mov	r3, r2
+	mov	r1, r0
+.LVL1397:
+	movs	r2, #1
+.LVL1398:
+	movs	r0, #16
+.LVL1399:
+	b	FtlRead
+.LVL1400:
+	.cfi_endproc
+.LFE489:
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.FlashBootVendorWrite,"ax",%progbits
+	.align	1
+	.global	FlashBootVendorWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+.LFB490:
+	.loc 7 92 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+.LVL1401:
+	.loc 7 95 0
+	mov	r3, r2
+	mov	r1, r0
+.LVL1402:
+	movs	r2, #1
+.LVL1403:
+	movs	r0, #16
+.LVL1404:
+	b	FtlWrite
+.LVL1405:
+	.cfi_endproc
+.LFE490:
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
 	.section	.text.FlashCs123Init,"ax",%progbits
 	.align	1
 	.global	FlashCs123Init
@@ -8731,10 +14543,15 @@ StorageSysDataStore:
 	.fpu softvfp
 	.type	FlashCs123Init, %function
 FlashCs123Init:
+.LFB491:
+	.loc 7 101 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	bx	lr
+	.cfi_endproc
+.LFE491:
 	.size	FlashCs123Init, .-FlashCs123Init
 	.section	.text.rk_nand_de_init,"ax",%progbits
 	.align	1
@@ -8745,10 +14562,17 @@ FlashCs123Init:
 	.fpu softvfp
 	.type	rk_nand_de_init, %function
 rk_nand_de_init:
+.LFB493:
+	.loc 7 116 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	.loc 7 117 0
 	b	FlashDeInit
+.LVL1406:
+	.cfi_endproc
+.LFE493:
 	.size	rk_nand_de_init, .-rk_nand_de_init
 	.section	.text.rk_ftl_get_capacity,"ax",%progbits
 	.align	1
@@ -8759,16 +14583,22 @@ rk_nand_de_init:
 	.fpu softvfp
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
+.LFB495:
+	.loc 7 128 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L1166
+	.loc 7 130 0
+	ldr	r3, .L1168
 	ldr	r0, [r3]
 	bx	lr
-.L1167:
+.L1169:
 	.align	2
-.L1166:
-	.word	.LANCHOR67
+.L1168:
+	.word	.LANCHOR68
+	.cfi_endproc
+.LFE495:
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -8779,59 +14609,116 @@ rk_ftl_get_capacity:
 	.fpu softvfp
 	.type	rknand_print_hex, %function
 rknand_print_hex:
+.LFB496:
+	.loc 7 133 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1407:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 7 141 0
 	movs	r5, #0
-	ldr	r7, .L1177
+	.loc 7 154 0
+	ldr	r7, .L1179
+	.loc 7 133 0
 	mov	fp, r0
 	mov	r6, r1
 	mov	r8, r2
 	mov	r10, r3
+	.loc 7 142 0
 	mov	r4, r5
-.L1169:
+.LVL1408:
+.L1171:
+	.loc 7 142 0 is_stmt 0 discriminator 1
 	cmp	r4, r10
-	bne	.L1175
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	bne	.L1177
+	.loc 7 162 0 is_stmt 1
+	ldr	r1, .L1179+4
+	ldr	r0, .L1179+8
+	.loc 7 164 0
 	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 11
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_def_cfa_offset 0
+.LVL1409:
+	.loc 7 162 0
 	b	printf
-.L1175:
-	cbnz	r5, .L1170
+.LVL1410:
+.L1177:
+	.cfi_restore_state
+	.loc 7 144 0
+	cbnz	r5, .L1172
+	.loc 7 146 0
 	mov	r2, r4
 	mov	r1, fp
-	ldr	r0, .L1177+12
+	ldr	r0, .L1179+12
 	bl	printf
-.L1170:
+.LVL1411:
+.L1172:
+	.loc 7 149 0
 	cmp	r8, #4
-	bne	.L1171
+	bne	.L1173
+	.loc 7 150 0
 	ldr	r1, [r6, r4, lsl #2]
-.L1176:
+.L1178:
+	.loc 7 154 0
 	mov	r0, r7
+	.loc 7 156 0
 	adds	r5, r5, #1
+.LVL1412:
+	.loc 7 154 0
 	bl	printf
+.LVL1413:
+	.loc 7 156 0
 	cmp	r5, #15
-	bls	.L1174
+	bls	.L1176
+.LVL1414:
+	.loc 7 158 0
 	movs	r5, #0
-	ldr	r1, .L1177+4
-	ldr	r0, .L1177+8
+	.loc 7 159 0
+	ldr	r1, .L1179+4
+	ldr	r0, .L1179+8
 	bl	printf
-.L1174:
+.LVL1415:
+.L1176:
+	.loc 7 142 0 discriminator 2
 	adds	r4, r4, #1
-	b	.L1169
-.L1171:
+.LVL1416:
+	b	.L1171
+.L1173:
+	.loc 7 151 0
 	cmp	r8, #2
+	.loc 7 152 0
 	ite	eq
 	ldrsheq	r1, [r6, r4, lsl #1]
+	.loc 7 154 0
 	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
-	b	.L1176
-.L1178:
+	b	.L1178
+.L1180:
 	.align	2
-.L1177:
-	.word	.LC14
-	.word	.LC15
-	.word	.LC6
-	.word	.LC13
+.L1179:
+	.word	.LC17
+	.word	.LC18
+	.word	.LC8
+	.word	.LC16
+	.cfi_endproc
+.LFE496:
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -8842,355 +14729,642 @@ rknand_print_hex:
 	.fpu softvfp
 	.type	HynixGetReadRetryDefault, %function
 HynixGetReadRetryDefault:
-	@ args = 0, pretend = 0, frame = 56
+.LFB236:
+	.loc 2 1362 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1417:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 2 1377 0
 	movs	r3, #172
+	.loc 2 1375 0
 	ldr	r5, .L1278
+	.loc 2 1379 0
 	cmp	r0, #2
+	.loc 2 1377 0
 	mov	r1, #173
 	mov	r2, #174
-	sub	sp, sp, #56
+	.loc 2 1362 0
+	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 2 1362 0
 	mov	r4, r0
+	.loc 2 1377 0
 	strb	r3, [r5, #4]
 	mov	r3, #175
+	.loc 2 1375 0
 	strb	r0, [r5]
+.LVL1418:
+	.loc 2 1377 0
 	strb	r1, [r5, #5]
+.LVL1419:
 	strb	r2, [r5, #6]
+.LVL1420:
 	strb	r3, [r5, #7]
-	bne	.L1180
+.LVL1421:
+	.loc 2 1379 0
+	bne	.L1182
+	.loc 2 1380 0
 	movs	r3, #167
+	.loc 2 1381 0
 	movs	r2, #247
+	.loc 2 1380 0
 	strb	r3, [r5, #4]
+	.loc 2 1381 0
 	ldr	r3, .L1278+4
 	strb	r2, [r3, #17]
-.L1236:
+.L1238:
+	.loc 2 1368 0
 	mov	r10, #7
-	b	.L1272
-.L1180:
+	b	.L1273
+.L1182:
+	.loc 2 1382 0
 	cmp	r0, #3
-	bne	.L1182
+	bne	.L1184
+.LVL1422:
+	.loc 2 1388 0 discriminator 1
 	movs	r3, #176
 	strb	r3, [r5, #4]
+.LVL1423:
 	movs	r3, #177
 	strb	r3, [r5, #5]
+.LVL1424:
 	movs	r3, #178
 	strb	r3, [r5, #6]
+.LVL1425:
 	movs	r3, #179
 	strb	r3, [r5, #7]
+.LVL1426:
 	movs	r3, #180
 	strb	r3, [r5, #8]
+.LVL1427:
 	movs	r3, #181
 	strb	r3, [r5, #9]
+.LVL1428:
 	movs	r3, #182
 	strb	r3, [r5, #10]
+.LVL1429:
 	movs	r3, #183
-.L1273:
+.LVL1430:
+.L1274:
+	.loc 2 1392 0
 	mov	r10, #8
+	.loc 2 1400 0
 	strb	r3, [r5, #11]
+	.loc 2 1391 0
 	mov	fp, r10
-.L1181:
+.L1183:
+.LVL1431:
+	.loc 2 1426 0
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L1186
+	bhi	.L1188
 	mov	r8, #0
-.L1187:
+.LVL1432:
+.L1189:
+	.loc 2 1427 0 discriminator 1
 	ldr	r3, .L1278+8
 	ldrb	r2, [r3]	@ zero_extendqisi2
 	uxtb	r3, r8
 	cmp	r2, r3
-	bhi	.L1193
-.L1194:
+	bhi	.L1195
+.LVL1433:
+.L1196:
+	.loc 2 1600 0
 	ldr	r3, .L1278
 	strb	fp, [r3, #1]
+	.loc 2 1601 0
 	strb	r10, [r3, #2]
-	add	sp, sp, #56
+	.loc 2 1602 0
+	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1182:
+.LVL1434:
+.L1184:
+	.cfi_restore_state
+	.loc 2 1389 0
 	cmp	r0, #4
-	bne	.L1183
+	bne	.L1185
+.LVL1435:
+	.loc 2 1393 0
 	movs	r0, #204
+.LVL1436:
+	.loc 2 1398 0
 	strb	r1, [r5, #9]
+	.loc 2 1393 0
 	strb	r0, [r5, #4]
+	.loc 2 1394 0
 	movs	r0, #191
 	strb	r0, [r5, #5]
+	.loc 2 1395 0
 	movs	r0, #170
 	strb	r0, [r5, #6]
+	.loc 2 1396 0
 	movs	r0, #171
 	strb	r0, [r5, #7]
+	.loc 2 1397 0
 	movs	r0, #205
 	strb	r0, [r5, #8]
+	.loc 2 1399 0
 	strb	r2, [r5, #10]
-	b	.L1273
-.L1183:
+	b	.L1274
+.LVL1437:
+.L1185:
+	.loc 2 1401 0
 	cmp	r0, #5
-	bne	.L1184
+	bne	.L1186
+.LVL1438:
+	.loc 2 1405 0
 	movs	r3, #56
+	.loc 2 1404 0
 	mov	r10, #8
+	.loc 2 1405 0
 	strb	r3, [r5, #4]
+	.loc 2 1406 0
 	movs	r3, #57
 	strb	r3, [r5, #5]
+	.loc 2 1407 0
 	movs	r3, #58
 	strb	r3, [r5, #6]
+	.loc 2 1408 0
 	movs	r3, #59
 	strb	r3, [r5, #7]
-.L1272:
+.LVL1439:
+.L1273:
+	.loc 2 1367 0
 	mov	fp, #4
-	b	.L1181
-.L1184:
+	b	.L1183
+.LVL1440:
+.L1186:
+	.loc 2 1409 0
 	cmp	r0, #6
-	bne	.L1185
+	bne	.L1187
+.LVL1441:
+	.loc 2 1413 0
 	movs	r3, #14
+	.loc 2 1412 0
 	mov	r10, #12
+	.loc 2 1413 0
 	strb	r3, [r5, #4]
+	.loc 2 1414 0
 	movs	r3, #15
 	strb	r3, [r5, #5]
+	.loc 2 1415 0
 	movs	r3, #16
 	strb	r3, [r5, #6]
+	.loc 2 1416 0
 	movs	r3, #17
 	strb	r3, [r5, #7]
-	b	.L1272
-.L1185:
+	b	.L1273
+.LVL1442:
+.L1187:
+	.loc 2 1417 0
 	cmp	r0, #7
-	bne	.L1236
+	bne	.L1238
+.LVL1443:
+	.loc 2 1421 0 discriminator 1
 	movs	r3, #176
+	.loc 2 1419 0 discriminator 1
 	mov	r10, #12
+	.loc 2 1421 0 discriminator 1
 	strb	r3, [r5, #4]
+.LVL1444:
 	movs	r3, #177
 	strb	r3, [r5, #5]
+.LVL1445:
 	movs	r3, #178
 	strb	r3, [r5, #6]
+.LVL1446:
 	movs	r3, #179
 	strb	r3, [r5, #7]
+.LVL1447:
 	movs	r3, #180
 	strb	r3, [r5, #8]
+.LVL1448:
 	movs	r3, #181
 	strb	r3, [r5, #9]
+.LVL1449:
 	movs	r3, #182
 	strb	r3, [r5, #10]
+.LVL1450:
 	movs	r3, #183
 	strb	r3, [r5, #11]
+.LVL1451:
+	.loc 2 1422 0 discriminator 1
 	movs	r3, #212
 	strb	r3, [r5, #12]
+	.loc 2 1423 0 discriminator 1
 	movs	r3, #213
 	strb	r3, [r5, #13]
+	.loc 2 1418 0 discriminator 1
 	mov	fp, #10
-	b	.L1181
-.L1193:
+	b	.L1183
+.LVL1452:
+.L1195:
+.LBB353:
+	.loc 2 1429 0
 	ldr	r2, .L1278+12
+.LBB354:
+.LBB355:
+	.loc 3 126 0
 	movs	r6, #0
+.LBE355:
+.LBE354:
+	.loc 2 1429 0
 	ldrb	r2, [r2, r3]	@ zero_extendqisi2
+.LVL1453:
+.LBB359:
+.LBB356:
+	.loc 3 123 0
 	ldr	r3, .L1278+16
 	ldr	r7, [r3, r2, lsl #3]
+.LBE356:
+.LBE359:
+	.loc 2 1430 0
 	add	r4, r5, r2, lsl #6
+.LBB360:
+.LBB357:
+	.loc 3 124 0
 	add	r3, r3, r2, lsl #3
+.LBE357:
+.LBE360:
+	.loc 2 1434 0
 	movs	r2, #55
+.LVL1454:
+	.loc 2 1430 0
 	adds	r4, r4, #20
+.LVL1455:
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+.LVL1456:
+	.loc 2 1434 0
 	add	r7, r7, r3, lsl #8
 	addw	r3, r7, #2056
-.L1188:
+.LVL1457:
+.L1190:
+	.loc 2 1435 0 discriminator 3
 	adds	r1, r5, r6
+	.loc 2 1434 0 discriminator 3
 	str	r2, [r3]
+	.loc 2 1435 0 discriminator 3
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+.LBB361:
+.LBB362:
+	.loc 3 306 0 discriminator 3
 	movs	r0, #80
-	str	r2, [sp, #8]
-	str	r3, [sp, #4]
+.LBE362:
+.LBE361:
+	.loc 2 1434 0 discriminator 3
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	.loc 2 1435 0 discriminator 3
 	str	r1, [r7, #2052]
+.LVL1458:
+.LBB364:
+.LBB363:
+	.loc 3 306 0 discriminator 3
 	bl	udelay
+.LVL1459:
+.LBE363:
+.LBE364:
+	.loc 2 1437 0 discriminator 3
 	ldr	r1, [r7, #2048]
-	ldr	r3, [sp, #4]
-	ldr	r2, [sp, #8]
+	.loc 2 1433 0 discriminator 3
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
+	.loc 2 1437 0 discriminator 3
 	strb	r1, [r4, r6]
+.LVL1460:
 	adds	r6, r6, #1
+.LVL1461:
+	.loc 2 1433 0 discriminator 3
 	uxtb	r1, r6
 	cmp	fp, r1
-	bhi	.L1188
+	bhi	.L1190
+	.loc 2 1442 0
 	ldr	r7, .L1278+4
 	mov	r1, r4
+	.loc 2 1433 0
 	movs	r2, #0
-.L1191:
+.L1193:
+.LVL1462:
+.LBB365:
+.LBB358:
+	.loc 3 126 0
 	movs	r3, #1
+.LBE358:
+.LBE365:
+	.loc 2 1442 0
 	adds	r6, r7, r2
-.L1190:
+.LVL1463:
+.L1192:
+	.loc 2 1442 0 is_stmt 0 discriminator 3
 	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
 	ldrb	ip, [r1]	@ zero_extendqisi2
 	add	r0, r0, ip
 	strb	r0, [r1, r3, lsl #3]
+	.loc 2 1441 0 is_stmt 1 discriminator 3
 	adds	r3, r3, #1
+.LVL1464:
 	cmp	r3, #7
-	bne	.L1190
+	bne	.L1192
+.LVL1465:
 	adds	r2, r2, #1
+.LVL1466:
 	adds	r1, r1, #1
+	.loc 2 1440 0 discriminator 2
 	cmp	r2, #4
-	bne	.L1191
+	bne	.L1193
+	.loc 2 1445 0 discriminator 2
 	movs	r3, #0
+.LVL1467:
 	add	r8, r8, #1
+.LVL1468:
 	strb	r3, [r4, #16]
+	.loc 2 1446 0 discriminator 2
 	strb	r3, [r4, #24]
+	.loc 2 1447 0 discriminator 2
 	strb	r3, [r4, #32]
+	.loc 2 1448 0 discriminator 2
 	strb	r3, [r4, #40]
+	.loc 2 1449 0 discriminator 2
 	strb	r3, [r4, #48]
+	.loc 2 1451 0 discriminator 2
 	strb	r3, [r4, #41]
+	.loc 2 1452 0 discriminator 2
 	strb	r3, [r4, #49]
-	b	.L1187
-.L1186:
+	b	.L1189
+.LVL1469:
+.L1188:
+.LBE353:
+	.loc 2 1454 0
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L1194
+	bhi	.L1196
+.LBB366:
+.LBB367:
+	.loc 2 1534 0 discriminator 1
 	smulbb	r3, r10, fp
+	.loc 2 1506 0 discriminator 1
+	ldr	r8, .L1278+24
+	.loc 2 1534 0 discriminator 1
 	asrs	r2, r3, #2
+	.loc 2 1536 0 discriminator 1
 	lsls	r3, r3, #4
-	str	r3, [sp, #52]
+	str	r3, [sp, #56]
 	lsls	r3, r2, #3
-	str	r2, [sp, #12]
+	.loc 2 1534 0 discriminator 1
+	str	r2, [sp, #8]
 	str	r3, [sp, #48]
 	lsls	r3, r2, #2
-	str	r3, [sp, #32]
+	str	r3, [sp, #24]
+	.loc 2 1536 0 discriminator 1
 	movs	r3, #0
-.L1277:
-	str	r3, [sp, #28]
-	ldrb	r3, [sp, #28]	@ zero_extendqisi2
-	str	r3, [sp, #16]
+	str	r3, [sp, #20]
+.L1197:
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+.LVL1470:
+.LBE367:
+	.loc 2 1457 0 discriminator 1
 	ldr	r3, .L1278+8
-	ldr	r2, [sp, #16]
+	ldr	r2, [sp, #12]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r2
-	bls	.L1194
-	ldr	r2, [sp, #16]
+	bls	.L1196
+.LBB377:
+	.loc 2 1460 0
+	ldr	r2, [sp, #12]
 	ldr	r3, .L1278+12
-	ldrb	r8, [r3, r2]	@ zero_extendqisi2
+	ldrb	r7, [r3, r2]	@ zero_extendqisi2
+.LVL1471:
+.LBB368:
+.LBB369:
+	.loc 3 123 0
 	ldr	r3, .L1278+16
-	mov	r0, r8
-	ldr	r2, [r3, r8, lsl #3]
-	add	r3, r3, r8, lsl #3
+.LBE369:
+.LBE368:
+	.loc 2 1464 0
+	mov	r0, r7
+.LBB371:
+.LBB370:
+	.loc 3 123 0
+	ldr	r2, [r3, r7, lsl #3]
+	.loc 3 124 0
+	add	r3, r3, r7, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r2, [sp, #4]
-	str	r3, [sp, #8]
+	.loc 3 123 0
+	str	r2, [sp]
+.LVL1472:
+	str	r3, [sp, #4]
+.LVL1473:
+.LBE370:
+.LBE371:
+	.loc 2 1463 0
 	mov	r3, r2
-	ldr	r2, [sp, #8]
+	ldr	r2, [sp, #4]
 	add	r3, r3, r2, lsl #8
 	movs	r2, #255
 	str	r2, [r3, #2056]
+	.loc 2 1464 0
 	bl	NandcWaitFlashReady
+.LVL1474:
 	ldr	r1, .L1278
+	.loc 2 1465 0
 	cmp	r4, #7
+	.loc 2 1466 0
 	it	eq
 	moveq	r3, #160
-	ldr	r2, [sp, #8]
+	.loc 2 1468 0
+	ldr	r2, [sp, #4]
+	.loc 2 1466 0
 	itete	eq
-	mlaeq	r1, r3, r8, r1
-	addne	r1, r1, r8, lsl #6
+	mlaeq	r1, r3, r7, r1
+	.loc 2 1461 0
+	addne	r1, r1, r7, lsl #6
+	.loc 2 1466 0
 	addeq	r3, r1, #28
+	.loc 2 1461 0
 	addne	r3, r1, #20
-	str	r3, [sp, #36]
+	.loc 2 1466 0
+	str	r3, [sp, #28]
+.LVL1475:
+	.loc 2 1469 0
 	cmp	r4, #4
-	ldr	r3, [sp, #4]
+	.loc 2 1468 0
+	ldr	r3, [sp]
+.LVL1476:
 	add	r3, r3, r2, lsl #8
 	mov	r2, #54
 	str	r2, [r3, #2056]
-	bne	.L1198
+	.loc 2 1469 0
+	bne	.L1200
+	.loc 2 1470 0
 	movs	r2, #255
 	str	r2, [r3, #2052]
+	.loc 2 1471 0
 	movs	r2, #64
 	str	r2, [r3, #2048]
+	.loc 2 1472 0
 	movs	r2, #204
-.L1275:
+.L1276:
+	.loc 2 1480 0
 	str	r2, [r3, #2052]
+.LVL1477:
+	.loc 2 1481 0
 	movs	r2, #77
-	b	.L1276
-.L1198:
+	b	.L1277
+.LVL1478:
+.L1200:
+	.loc 2 1474 0
 	subs	r2, r4, #5
 	cmp	r2, #1
-	bhi	.L1200
+	bhi	.L1202
+	.loc 2 1475 0
 	ldr	r2, .L1278
 	ldrb	r2, [r2, #4]	@ zero_extendqisi2
 	str	r2, [r3, #2052]
+	.loc 2 1476 0
 	movs	r2, #82
-.L1276:
+.LVL1479:
+.L1277:
+	.loc 2 1481 0
 	str	r2, [r3, #2048]
+	.loc 2 1490 0
 	cmp	r4, #6
-	ldr	r3, [sp, #4]
-	mov	r0, r8
-	ldr	r2, [sp, #8]
+	.loc 2 1483 0
+	ldr	r3, [sp]
+	.loc 2 1497 0
+	mov	r0, r7
+	.loc 2 1483 0
+	ldr	r2, [sp, #4]
 	add	r5, r3, r2, lsl #8
 	mov	r3, #22
-	ldr	r2, [sp, #8]
 	str	r3, [r5, #2056]
+	.loc 2 1484 0
 	mov	r3, #23
 	str	r3, [r5, #2056]
+	.loc 2 1485 0
 	mov	r3, #4
 	str	r3, [r5, #2056]
+	.loc 2 1486 0
 	mov	r3, #25
 	str	r3, [r5, #2056]
+	.loc 2 1487 0
 	mov	r3, #0
 	str	r3, [r5, #2056]
+	.loc 2 1488 0
 	str	r3, [r5, #2052]
+	.loc 2 1489 0
 	str	r3, [r5, #2052]
+	.loc 2 1491 0
 	it	eq
 	moveq	r3, #31
+	.loc 2 1493 0
 	str	r3, [r5, #2052]
+	.loc 2 1494 0
 	movs	r3, #2
 	str	r3, [r5, #2052]
+	.loc 2 1495 0
 	movs	r3, #0
 	str	r3, [r5, #2052]
-	ldr	r3, [sp, #4]
+	.loc 2 1496 0
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
 	add	r3, r3, r2, lsl #8
 	movs	r2, #48
 	str	r2, [r3, #2056]
+	.loc 2 1497 0
 	bl	NandcWaitFlashReady
+.LVL1480:
+	.loc 2 1501 0
 	subs	r3, r4, #5
 	cmp	r3, #1
-	str	r3, [sp, #40]
-	bls	.L1237
+	str	r3, [sp, #32]
+	bls	.L1239
+	.loc 2 1500 0
 	cmp	r4, #7
 	ite	eq
 	moveq	r2, #32
 	movne	r2, #2
-.L1203:
-	ldr	r3, .L1278+20
+.L1205:
+.LVL1481:
+	.loc 2 1506 0
+	ldr	r3, [r8]
+.LVL1482:
 	subs	r2, r2, #1
-	ldr	r3, [r3]
+.LVL1483:
 	subs	r1, r3, #1
 	uxtab	r2, r3, r2
 	mov	r0, r1
-.L1204:
+.LVL1484:
+.L1206:
+	.loc 2 1508 0 discriminator 3
 	ldr	r6, [r5, #2048]
 	strb	r6, [r0, #1]!
-	cmp	r2, r0
-	bne	.L1204
+.LVL1485:
+	.loc 2 1507 0 discriminator 3
+	cmp	r0, r2
+	bne	.L1206
+	.loc 2 1511 0
 	cmp	r4, #7
-	bne	.L1205
+	bne	.L1207
 	movs	r2, #0
-.L1207:
+.LVL1486:
+.L1209:
+	.loc 2 1513 0
 	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
 	uxtb	r1, r2
+.LVL1487:
 	cmp	r0, #12
-	beq	.L1206
+	beq	.L1208
+	.loc 2 1515 0
 	add	r0, r3, r2, lsl #2
 	ldrb	r0, [r0, #1]	@ zero_extendqisi2
 	cmp	r0, #10
-	beq	.L1206
+	beq	.L1208
+.LVL1488:
 	adds	r2, r2, #1
+.LVL1489:
+	.loc 2 1512 0 discriminator 2
 	cmp	r2, #8
-	bne	.L1207
-.L1208:
+	bne	.L1209
+.LVL1490:
+.L1210:
+	.loc 2 1519 0
 	movs	r1, #0
-	ldr	r0, .L1278+24
+	ldr	r0, .L1278+20
 	bl	printf
-.L1210:
-	b	.L1210
-.L1200:
+.LVL1491:
+.L1212:
+	b	.L1212
+.LVL1492:
+.L1202:
+	.loc 2 1478 0
 	movs	r2, #174
 	str	r2, [r3, #2052]
+	.loc 2 1479 0
 	movs	r2, #0
 	str	r2, [r3, #2048]
+	.loc 2 1480 0
 	movs	r2, #176
-	b	.L1275
-.L1237:
+	b	.L1276
+.LVL1493:
+.L1239:
+	.loc 2 1502 0
 	movs	r2, #16
-	b	.L1203
+	b	.L1205
 .L1279:
 	.align	2
 .L1278:
@@ -9199,194 +15373,333 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR6
-	.word	.LANCHOR145
-	.word	.LC16
-.L1206:
+	.word	.LC19
+	.word	.LANCHOR144
+.LVL1494:
+.L1208:
+	.loc 2 1518 0
 	cmp	r1, #6
-	bhi	.L1208
-.L1209:
-	ldr	r3, .L1280
-	ldr	lr, [r3]
+	bhi	.L1210
+.LVL1495:
+.L1211:
+	.loc 2 1535 0
+	ldr	lr, [r8]
+.LVL1496:
+	.loc 2 1536 0
 	mov	r3, lr
-.L1214:
-	ldr	r1, [sp, #52]
+.LVL1497:
+.L1216:
+	.loc 2 1536 0 is_stmt 0 discriminator 1
+	ldr	r1, [sp, #56]
 	sub	r2, r3, lr
-	cmp	r1, r2
-	bgt	.L1215
-	ldr	r3, .L1280
-	ldr	r1, [r3]
-	ldr	r3, [sp, #32]
-	adds	r0, r1, r3
+.LVL1498:
+	cmp	r2, r1
+	blt	.L1217
+.LVL1499:
+	ldr	r3, [r8]
+	ldr	r2, [sp, #24]
+	adds	r1, r3, r2
+	.loc 2 1539 0 is_stmt 1
 	movs	r3, #8
-.L1217:
-	mov	r7, r0
-	movs	r6, #0
-.L1216:
-	ldr	r2, [r7]
-	adds	r6, r6, #1
+.LVL1500:
+.L1219:
+	mov	r6, r1
+.LBB372:
+	.loc 2 1542 0
+	movs	r0, #0
+.LVL1501:
+.L1218:
+	.loc 2 1543 0 discriminator 3
+	ldr	r2, [r6]
+	.loc 2 1542 0 discriminator 3
+	adds	r0, r0, #1
+.LVL1502:
+	.loc 2 1543 0 discriminator 3
 	mvns	r2, r2
-	str	r2, [r7], #4
-	ldr	r2, [sp, #12]
-	cmp	r2, r6
-	bgt	.L1216
+	str	r2, [r6], #4
+	.loc 2 1542 0 discriminator 3
+	ldr	r2, [sp, #8]
+	cmp	r2, r0
+	bgt	.L1218
+.LVL1503:
 	ldr	r2, [sp, #48]
+.LBE372:
+	.loc 2 1540 0 discriminator 2
 	subs	r3, r3, #1
-	add	r0, r0, r2
-	bne	.L1217
-	str	r1, [sp, #20]
-	str	r3, [sp, #24]
-.L1223:
+.LVL1504:
+	add	r1, r1, r2
+	bne	.L1219
+.LVL1505:
+.L1225:
+	lsls	r2, r3, #2
+	lsls	r1, r3, #2
+	str	r2, [sp, #60]
+	ldr	r2, [r8]
+	str	r2, [sp, #44]
+	add	r2, r2, r1
+.LBB373:
+.LBB374:
+	.loc 2 1555 0
+	movs	r1, #0
+	str	r2, [sp, #52]
+	mov	r2, r1
+.LVL1506:
+.L1224:
+	.loc 2 1553 0
+	movs	r0, #1
+	ldr	ip, [sp, #52]
+	lsls	r0, r0, r2
+	str	r0, [sp, #36]
+.LVL1507:
+	movs	r0, #16
+.LVL1508:
+	str	r0, [sp, #40]
+	.loc 2 1552 0
 	movs	r0, #0
-	mov	r2, r0
+	str	r0, [sp, #16]
+.LVL1509:
 .L1222:
-	movs	r3, #1
-	mov	ip, #0
-	lsl	r7, r3, r2
-	movs	r3, #16
-	str	r3, [sp, #44]
-	mov	r6, r7
-	ldr	r7, [sp, #20]
-.L1220:
-	ldr	r3, [r7]
-	bics	r3, r6, r3
-	ldr	r3, [sp, #32]
+	.loc 2 1555 0
+	ldr	r6, [sp, #36]
+	mov	r0, r6
+	ldr	r6, [ip]
+	bics	r0, r0, r6
+	ldr	r6, [sp, #24]
+	.loc 2 1556 0
 	it	eq
-	addeq	ip, ip, #1
-	add	r7, r7, r3
-	ldr	r3, [sp, #44]
-	subs	r3, r3, #1
-	str	r3, [sp, #44]
-	bne	.L1220
-	cmp	ip, #8
-	add	r2, r2, #1
+	ldreq	r0, [sp, #16]
+	add	ip, ip, r6
+	itt	eq
+	addeq	r0, r0, #1
+	streq	r0, [sp, #16]
+.LVL1510:
+	.loc 2 1554 0
+	ldr	r0, [sp, #40]
+	subs	r0, r0, #1
+	str	r0, [sp, #40]
+.LVL1511:
+	bne	.L1222
+	.loc 2 1558 0
+	ldr	r0, [sp, #16]
+.LVL1512:
+.LBE374:
+	.loc 2 1551 0
+	adds	r2, r2, #1
+.LVL1513:
+.LBB375:
+	.loc 2 1558 0
+	cmp	r0, #8
+	.loc 2 1559 0
 	itt	hi
-	movhi	r3, r6
-	orrhi	r0, r0, r3
+	ldrhi	r0, [sp, #36]
+	orrhi	r1, r1, r0
+.LVL1514:
+.LBE375:
+	.loc 2 1551 0
 	cmp	r2, #32
-	bne	.L1222
-	ldr	r3, [sp, #20]
-	str	r0, [r3], #4
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #24]
+	bne	.L1224
+	.loc 2 1561 0 discriminator 2
+	ldr	r2, [sp, #44]
+.LVL1515:
+.LBE373:
+	.loc 2 1546 0 discriminator 2
 	adds	r3, r3, #1
-	str	r3, [sp, #24]
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #12]
-	cmp	r3, r2
-	bgt	.L1223
+.LVL1516:
+.LBB376:
+	.loc 2 1561 0 discriminator 2
+	ldr	r0, [sp, #60]
+	str	r1, [r2, r0]
+.LBE376:
+	.loc 2 1546 0 discriminator 2
+	ldr	r2, [sp, #8]
+	cmp	r2, r3
+	bgt	.L1225
+	.loc 2 1566 0
+	ldr	r1, [r8]
+.LVL1517:
+	movs	r3, #0
+.LVL1518:
 	subs	r2, r1, #4
 	add	r0, r1, #28
-	movs	r3, #0
-.L1226:
+.LVL1519:
+.L1228:
 	ldr	r6, [r2, #4]!
-	cbnz	r6, .L1225
+	cbnz	r6, .L1227
+	.loc 2 1567 0
 	adds	r3, r3, #1
-.L1225:
+.LVL1520:
+.L1227:
+	.loc 2 1565 0 discriminator 2
 	cmp	r0, r2
-	bne	.L1226
+	bne	.L1228
+	.loc 2 1569 0
 	cmp	r3, #7
-	ble	.L1227
-	ldr	r0, .L1280+4
+	ble	.L1229
+	.loc 2 1570 0
+	ldr	r0, .L1280
 	mov	r3, #1024
+.LVL1521:
 	movs	r2, #1
 	bl	rknand_print_hex
+.LVL1522:
+	.loc 2 1571 0
 	movs	r1, #0
-	ldr	r0, .L1280+8
+	ldr	r0, .L1280+4
 	bl	printf
-.L1228:
-	b	.L1228
-.L1205:
+.LVL1523:
+.L1230:
+	b	.L1230
+.LVL1524:
+.L1207:
+	.loc 2 1522 0
 	cmp	r4, #6
-	bne	.L1209
+	bne	.L1211
 	adds	r3, r3, #7
-.L1211:
+.LVL1525:
+.L1213:
+	.loc 2 1524 0
 	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+.LVL1526:
 	cmp	r2, #12
-	beq	.L1209
+	beq	.L1211
+	.loc 2 1526 0
 	ldrb	r2, [r1, #8]	@ zero_extendqisi2
 	cmp	r2, #4
-	beq	.L1209
-	cmp	r3, r1
-	bne	.L1211
+	beq	.L1211
+.LVL1527:
+	.loc 2 1523 0 discriminator 2
+	cmp	r1, r3
+	bne	.L1213
+	.loc 2 1530 0
 	movs	r1, #0
-	ldr	r0, .L1280+8
+.LVL1528:
+	ldr	r0, .L1280+4
 	bl	printf
-.L1213:
-	b	.L1213
+.LVL1529:
 .L1215:
+	b	.L1215
+.LVL1530:
+.L1217:
+	.loc 2 1537 0 discriminator 3
 	ldr	r2, [r5, #2048]
 	strb	r2, [r3], #1
-	b	.L1214
-.L1227:
+	b	.L1216
+.LVL1531:
+.L1229:
+	.loc 2 1576 0
 	cmp	r4, #6
-	beq	.L1239
+	beq	.L1241
+	.loc 2 1575 0
 	cmp	r4, #7
 	ite	eq
 	moveq	ip, #10
 	movne	ip, #8
-.L1229:
+.L1231:
+.LVL1532:
 	add	r3, fp, #-1
-	ldr	r1, [sp, #36]
+.LVL1533:
+	ldr	r1, [sp, #28]
 	uxtb	r3, r3
+	.loc 2 1580 0
 	movs	r0, #0
 	adds	r3, r3, #1
-.L1230:
-	mov	r7, r1
+	str	r3, [sp, #16]
+.LVL1534:
+.L1232:
+	.loc 2 1579 0
+	mov	r3, r1
 	mov	r2, lr
-.L1231:
+.LVL1535:
+.L1233:
+	.loc 2 1582 0 discriminator 3
 	ldrb	r6, [r2], #1	@ zero_extendqisi2
-	strb	r6, [r7], #1
+.LVL1536:
+	strb	r6, [r3], #1
+.LVL1537:
+	.loc 2 1581 0 discriminator 3
 	sub	r6, r2, lr
 	uxtb	r6, r6
 	cmp	fp, r6
-	bhi	.L1231
+	bhi	.L1233
+	ldr	r3, [sp, #16]
+	.loc 2 1580 0 discriminator 2
 	adds	r0, r0, #1
-	add	lr, lr, r3
+.LVL1538:
 	cmp	r10, r0
 	add	r1, r1, ip
-	bgt	.L1230
-	ldr	r3, [sp, #4]
-	mov	r0, r8
-	ldr	r2, [sp, #8]
+	add	lr, lr, r3
+.LVL1539:
+	bgt	.L1232
+	.loc 2 1586 0
+	ldr	r3, [sp]
+	.loc 2 1587 0
+	mov	r0, r7
+.LVL1540:
+	.loc 2 1586 0
+	ldr	r2, [sp, #4]
 	add	r6, r3, r2, lsl #8
 	movs	r3, #255
 	str	r3, [r6, #2056]
+	.loc 2 1587 0
 	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #40]
+.LVL1541:
+	.loc 2 1588 0
+	ldr	r3, [sp, #32]
 	cmp	r3, #1
-	bhi	.L1233
+	bhi	.L1235
+	.loc 2 1589 0
 	movs	r3, #54
+	.loc 2 1593 0
 	mov	r1, #-1
+	.loc 2 1589 0
 	str	r3, [r6, #2056]
-	ldr	r3, .L1280+12
-	ldr	r0, [sp, #16]
+	.loc 2 1590 0
+	ldr	r3, .L1280+8
+	.loc 2 1593 0
+	ldr	r0, [sp, #12]
+	.loc 2 1590 0
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r5, #2052]
+	.loc 2 1591 0
 	movs	r3, #0
 	str	r3, [r5, #2048]
+	.loc 2 1592 0
 	movs	r3, #22
 	str	r3, [r6, #2056]
+	.loc 2 1593 0
 	bl	FlashReadCmd
-.L1234:
-	mov	r0, r8
+.LVL1542:
+.L1236:
+	.loc 2 1597 0 discriminator 2
+	mov	r0, r7
 	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #28]
+.LVL1543:
+	ldr	r3, [sp, #20]
 	adds	r3, r3, #1
-	b	.L1277
-.L1239:
+	str	r3, [sp, #20]
+.LVL1544:
+	b	.L1197
+.LVL1545:
+.L1241:
+	.loc 2 1577 0
 	mov	ip, #4
-	b	.L1229
-.L1233:
+	b	.L1231
+.LVL1546:
+.L1235:
+	.loc 2 1595 0
 	movs	r3, #56
 	str	r3, [r6, #2056]
-	b	.L1234
+	b	.L1236
 .L1281:
 	.align	2
 .L1280:
-	.word	.LANCHOR145
-	.word	.LC17
-	.word	.LC16
+	.word	.LC20
+	.word	.LC19
 	.word	.LANCHOR20
+.LBE377:
+.LBE366:
+	.cfi_endproc
+.LFE236:
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -9397,71 +15710,120 @@ HynixGetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
+.LFB237:
+	.loc 2 1674 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+.LVL1547:
+	.loc 2 1675 0
 	mov	r3, r0
 	cbz	r0, .L1282
+	.loc 2 1677 0
 	subs	r2, r0, #1
 	cmp	r2, #6
 	bhi	.L1284
+	.loc 2 1678 0
 	b	HynixGetReadRetryDefault
+.LVL1548:
 .L1284:
+	.loc 2 1679 0
 	cmp	r0, #49
 	bne	.L1285
+	.loc 2 1680 0
 	ldr	r0, .L1305
+.LVL1549:
+	.loc 2 1683 0
 	movs	r2, #64
 	ldr	r1, .L1305+4
+	.loc 2 1680 0
 	strb	r3, [r0]
+	.loc 2 1681 0
 	movs	r3, #4
+.LVL1550:
 	strb	r3, [r0, #1]
+	.loc 2 1682 0
 	movs	r3, #15
 	strb	r3, [r0, #2]
 .L1303:
+.LBB380:
+.LBB381:
+	.loc 2 1701 0
 	adds	r0, r0, #4
 	b	ftl_memcpy
+.LVL1551:
 .L1285:
+.LBE381:
+.LBE380:
+	.loc 2 1684 0
 	cmp	r0, #33
 	beq	.L1286
+	.loc 2 1684 0 is_stmt 0 discriminator 1
 	sub	r2, r0, #65
 	cmp	r2, #1
 	bhi	.L1287
 .L1286:
+	.loc 2 1686 0 is_stmt 1
 	ldr	r0, .L1305
+.LVL1552:
 	strb	r3, [r0]
+	.loc 2 1687 0
 	movs	r3, #4
+.LVL1553:
 .L1304:
+.LBB383:
+.LBB382:
+	.loc 2 1693 0
 	strb	r3, [r0, #1]
+	.loc 2 1694 0
 	movs	r3, #7
 	strb	r3, [r0, #2]
+	.loc 2 1695 0
 	movs	r2, #45
 	ldr	r1, .L1305+8
 	b	.L1303
+.LVL1554:
 .L1287:
+	.loc 2 1690 0
 	cmp	r0, #34
 	beq	.L1288
 	cmp	r0, #67
 	bne	.L1289
 .L1288:
+	.loc 2 1692 0
 	ldr	r0, .L1305
+.LVL1555:
 	strb	r3, [r0]
+	.loc 2 1693 0
 	movs	r3, #5
+.LVL1556:
 	b	.L1304
+.LVL1557:
 .L1289:
+	.loc 2 1696 0
 	cmp	r0, #35
 	beq	.L1290
 	cmp	r0, #68
 	bne	.L1282
 .L1290:
+	.loc 2 1698 0
 	ldr	r0, .L1305
+.LVL1558:
+	.loc 2 1701 0
 	movs	r2, #95
 	ldr	r1, .L1305+12
+	.loc 2 1698 0
 	strb	r3, [r0]
+	.loc 2 1699 0
 	movs	r3, #5
+.LVL1559:
 	strb	r3, [r0, #1]
+	.loc 2 1700 0
 	movs	r3, #17
 	strb	r3, [r0, #2]
 	b	.L1303
+.LVL1560:
 .L1282:
 	bx	lr
 .L1306:
@@ -9471,6 +15833,10 @@ FlashGetReadRetryDefault:
 	.word	.LANCHOR14
 	.word	.LANCHOR9
 	.word	.LANCHOR11
+.LBE382:
+.LBE383:
+	.cfi_endproc
+.LFE237:
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",%progbits
 	.align	1
@@ -9481,100 +15847,208 @@ FlashGetReadRetryDefault:
 	.fpu softvfp
 	.type	FlashInit, %function
 FlashInit:
+.LFB252:
+	.loc 2 2193 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1561:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #32
+	.cfi_def_cfa_offset 64
+	.loc 2 2199 0
 	mov	r0, #32768
+.LVL1562:
+	.loc 2 2207 0
 	movs	r5, #0
+	.loc 2 2199 0
 	bl	ftl_malloc
+.LVL1563:
 	ldr	r3, .L1399
+	.loc 2 2205 0
 	ldr	r10, .L1399+132
+	.loc 2 2211 0
 	ldr	r8, .L1399+136
+	.loc 2 2199 0
 	str	r0, [r3]
+	.loc 2 2200 0
 	mov	r0, #32768
 	bl	ftl_malloc
+.LVL1564:
 	ldr	r3, .L1399+4
+	.loc 2 2213 0
 	ldr	r6, .L1399+8
+	.loc 2 2209 0
 	ldr	r7, .L1399+12
+	.loc 2 2200 0
 	str	r0, [r3]
+	.loc 2 2201 0
 	mov	r0, #4096
 	bl	ftl_malloc
+.LVL1565:
 	ldr	r3, .L1399+16
 	str	r0, [r3]
+	.loc 2 2202 0
 	mov	r0, #32768
 	bl	ftl_malloc
+.LVL1566:
 	ldr	r3, .L1399+20
 	str	r0, [r3]
+	.loc 2 2203 0
 	mov	r0, #4096
 	bl	ftl_malloc
+.LVL1567:
 	ldr	r3, .L1399+24
+	.loc 2 2206 0
 	ldr	r2, .L1399+28
+	.loc 2 2211 0
 	strb	r5, [r8]
+	.loc 2 2203 0
 	str	r0, [r3]
+	.loc 2 2205 0
 	movs	r3, #50
 	strb	r3, [r10]
+	.loc 2 2215 0
 	mov	r0, r4
+	.loc 2 2206 0
 	strb	r3, [r2]
+	.loc 2 2208 0
 	movs	r2, #128
+	.loc 2 2207 0
 	ldr	r3, .L1399+32
 	ldr	r4, .L1399+36
+.LVL1568:
+	.loc 2 2209 0
 	strb	r5, [r7]
+	.loc 2 2207 0
 	str	r5, [r3]
+	.loc 2 2208 0
 	ldr	r3, .L1399+40
 	str	r2, [r3]
+	.loc 2 2210 0
 	ldr	r3, .L1399+44
 	str	r5, [r3]
+	.loc 2 2213 0
 	movs	r3, #60
 	strb	r3, [r6]
+	.loc 2 2215 0
 	bl	NandcInit
+.LVL1569:
 	str	r10, [sp, #20]
+.LBB392:
+.LBB393:
+.LBB394:
+.LBB395:
+	.loc 3 123 0
 	ldr	r10, .L1399+140
 	str	r8, [sp, #16]
 	mov	r8, r6
 	mov	r6, r4
+.LVL1570:
 .L1312:
+.LBE395:
+.LBE394:
+.LBE393:
+.LBE392:
+	.loc 2 2217 0
 	uxtb	fp, r5
+.LVL1571:
+.LBB405:
+.LBB404:
+	.loc 2 282 0
 	mov	r0, fp
 	bl	FlashReset
+.LVL1572:
+.LBB398:
+.LBB396:
+	.loc 3 124 0
 	add	r1, r10, r5, lsl #3
+	.loc 3 123 0
 	ldr	r3, [r10, r5, lsl #3]
+.LBE396:
+.LBE398:
+	.loc 2 284 0
 	mov	r0, fp
 	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+.LBB399:
+.LBB397:
+	.loc 3 123 0
 	str	r3, [sp, #28]
+.LVL1573:
 	str	r1, [sp, #24]
+.LVL1574:
+.LBE397:
+.LBE399:
+	.loc 2 284 0
 	bl	NandcFlashCs
+.LVL1575:
+	.loc 2 285 0
 	ldr	r1, [sp, #24]
+.LBB400:
+.LBB401:
+	.loc 3 306 0
 	movs	r0, #200
+.LBE401:
+.LBE400:
+	.loc 2 285 0
 	ldr	r3, [sp, #28]
 	add	r3, r3, r1, lsl #8
 	movs	r1, #144
 	str	r1, [r3, #2056]
+	.loc 2 286 0
 	movs	r1, #0
 	str	r1, [r3, #2052]
 	str	r3, [sp, #24]
+.LVL1576:
+.LBB403:
+.LBB402:
+	.loc 3 306 0
 	bl	udelay
+.LVL1577:
+.LBE402:
+.LBE403:
+	.loc 2 288 0
 	ldr	r3, [sp, #24]
+	.loc 2 296 0
 	mov	r0, fp
+	.loc 2 288 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4]
+	.loc 2 289 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #1]
+	.loc 2 290 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #2]
+	.loc 2 291 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #3]
+	.loc 2 292 0
 	ldr	r1, [r3, #2048]
 	strb	r1, [r4, #4]
+	.loc 2 293 0
 	ldr	r3, [r3, #2048]
 	strb	r3, [r4, #5]
+	.loc 2 296 0
 	bl	NandcFlashDeCs
+.LVL1578:
+	.loc 2 297 0
 	ldrb	r2, [r4]	@ zero_extendqisi2
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
 	bhi	.L1308
+	.loc 2 298 0
 	ldrb	r1, [r4, #5]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
 	ldr	r0, .L1399+48
@@ -9587,137 +16061,213 @@ FlashInit:
 	str	r1, [sp]
 	adds	r1, r5, #1
 	bl	printf
+.LVL1579:
 .L1308:
+.LBE404:
+.LBE405:
+	.loc 2 2218 0
 	cbnz	r5, .L1309
+	.loc 2 2219 0
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
 	bhi	.L1352
+	.loc 2 2219 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #255
 	beq	.L1352
 .L1309:
+	.loc 2 2223 0 is_stmt 1
 	ldrb	r3, [r4]	@ zero_extendqisi2
+	.loc 2 2216 0
 	adds	r5, r5, #1
+.LVL1580:
 	adds	r4, r4, #8
+.LVL1581:
+	.loc 2 2223 0
 	cmp	r3, #181
+	.loc 2 2224 0
 	itt	eq
 	moveq	r3, #44
 	strbeq	r3, [r4, #-8]
+	.loc 2 2216 0
 	cmp	r5, #4
 	bne	.L1312
+	.loc 2 2234 0
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #173
 	beq	.L1313
+	.loc 2 2235 0
 	ldr	r3, .L1399+52
 	ldr	r0, [r3]
 	bl	NandcSetDdrMode
+.LVL1582:
 .L1313:
+	.loc 2 2242 0
 	mov	r2, #852
 	movs	r1, #0
 	ldr	r0, .L1399+56
 	bl	ftl_memset
+.LVL1583:
+	.loc 2 2243 0
 	ldr	r4, .L1399+60
+.LVL1584:
 	ldr	r3, .L1399+64
+	.loc 2 2244 0
 	ldr	r5, .L1399+68
+.LVL1585:
+	.loc 2 2243 0
 	str	r3, [r4]
+	.loc 2 2244 0
 	movs	r3, #0
 	strb	r3, [r5]
+	.loc 2 2246 0
 	ldrb	r3, [r6, #1]	@ zero_extendqisi2
 	cmp	r3, #161
 	beq	.L1314
+	.loc 2 2246 0 is_stmt 0 discriminator 2
 	cmp	r3, #218
 	beq	.L1314
+	.loc 2 2246 0 discriminator 3
 	and	r2, r3, #223
 	cmp	r2, #209
 	beq	.L1314
+	.loc 2 2247 0 is_stmt 1
 	cmp	r3, #220
 	bne	.L1315
+	.loc 2 2247 0 is_stmt 0 discriminator 1
 	ldrb	r2, [r6, #3]	@ zero_extendqisi2
 	cmp	r2, #149
 	bne	.L1315
 .L1314:
+	.loc 2 2248 0 is_stmt 1
 	ldr	r1, [sp, #16]
 	movs	r2, #1
 	strb	r2, [r1]
+	.loc 2 2249 0
 	movs	r2, #16
 	ldr	r1, [sp, #20]
+	.loc 2 2250 0
 	strb	r2, [r8]
+	.loc 2 2249 0
 	strb	r2, [r1]
+	.loc 2 2251 0
 	ldrb	r1, [r6]	@ zero_extendqisi2
 	ldr	r2, .L1399+72
+	.loc 2 2253 0
 	cmp	r1, #152
+	.loc 2 2251 0
 	strb	r1, [r2, #1]
+	.loc 2 2252 0
 	strb	r3, [r2, #2]
+	.loc 2 2253 0
 	bne	.L1316
+	.loc 2 2253 0 is_stmt 0 discriminator 1
 	ldrsb	r1, [r6, #4]
 	cmp	r1, #0
+	.loc 2 2254 0 is_stmt 1 discriminator 1
 	itt	ge
 	movge	r1, #24
 	strbge	r1, [r8]
 .L1316:
+	.loc 2 2255 0
 	ldr	r1, .L1399+76
 	ldr	r0, [r1]
 	ldr	r1, .L1399+80
 	cmp	r0, r1
+	.loc 2 2256 0
 	itt	eq
 	moveq	r1, #16
 	strbeq	r1, [r8]
+	.loc 2 2257 0
 	cmp	r3, #218
 	bne	.L1318
+	.loc 2 2258 0
 	mov	r1, #2048
 .L1395:
+	.loc 2 2261 0
 	strh	r1, [r2, #14]	@ movhi
+	.loc 2 2262 0
 	strb	r3, [r2, #2]
 .L1319:
+	.loc 2 2264 0
 	movs	r2, #32
 	ldr	r1, .L1399+84
 	ldr	r0, .L1399+88
 	bl	ftl_memcpy
+.LVL1586:
+	.loc 2 2265 0
 	movs	r2, #32
 	ldr	r1, .L1399+72
 	ldr	r0, .L1399+64
 	bl	ftl_memcpy
+.LVL1587:
 .L1315:
+	.loc 2 2268 0
 	ldr	r3, [sp, #16]
 	ldr	r8, .L1399+144
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1321
+	.loc 2 2269 0
 	bl	FlashLoadPhyInfoInRam
+.LVL1588:
 	cbnz	r0, .L1323
+	.loc 2 2270 0
 	ldr	r3, [r4]
 	ldr	r10, .L1399+100
 	ldrh	r3, [r3, #16]
 	lsrs	r3, r3, #8
+	.loc 2 2271 0
 	lsls	r1, r3, #31
+	.loc 2 2270 0
 	and	r0, r3, #7
 	strb	r0, [r10]
+	.loc 2 2271 0
 	bmi	.L1323
+	.loc 2 2272 0
 	movs	r3, #1
 	strb	r3, [r7]
+	.loc 2 2273 0
 	bl	FlashSetInterfaceMode
+.LVL1589:
+	.loc 2 2274 0
 	ldrb	r0, [r10]	@ zero_extendqisi2
 	bl	NandcSetMode
+.LVL1590:
 .L1323:
+	.loc 2 2277 0
 	ldr	r3, [r4]
 	ldrb	r3, [r3, #26]	@ zero_extendqisi2
 	strb	r3, [r8]
+	.loc 2 2282 0
 	bl	FlashLoadPhyInfo
+.LVL1591:
+	.loc 2 2299 0
 	cmp	r0, #0
 	beq	.L1321
+	.loc 2 2300 0
 	ldr	r3, [r4]
 	ldr	r0, .L1399+92
+.LVL1592:
 	ldrh	r1, [r3, #14]
 	bl	printf
+.LVL1593:
+	.loc 2 2301 0
 	bl	FlashLoadPhyInfoInRam
+.LVL1594:
 	adds	r2, r0, #1
 	beq	.L1307
+	.loc 2 2303 0
 	bl	FlashDieInfoInit
+.LVL1595:
+	.loc 2 2304 0
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
+.LVL1596:
+	.loc 2 2306 0
 	ldr	r3, [r4]
 	ldr	r2, .L1399+96
 	ldrb	r1, [r3, #9]	@ zero_extendqisi2
@@ -9725,106 +16275,145 @@ FlashInit:
 	addw	r2, r2, #4095
 	cmp	r1, r2, asr #12
 	blt	.L1326
+	.loc 2 2307 0 discriminator 1
 	ldrh	r2, [r3, #14]
 	adds	r2, r2, #255
+	.loc 2 2306 0 discriminator 1
 	cmp	r1, r2, asr #8
 	bge	.L1327
 .L1326:
+	.loc 2 2309 0
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
 .L1327:
+	.loc 2 2316 0
 	ldr	r3, .L1399+100
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	tst	r3, #6
 	beq	.L1328
+	.loc 2 2321 0
 	bl	FlashSavePhyInfo
+.LVL1597:
+	.loc 2 2322 0
 	ldr	r3, .L1399+104
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
+.LVL1598:
 .L1328:
+	.loc 2 2329 0
 	bl	FlashSavePhyInfo
+.LVL1599:
 .L1321:
+	.loc 2 2333 0
 	ldr	fp, [r4]
+	.loc 2 2337 0
 	ldr	r10, .L1399+100
+	.loc 2 2333 0
 	ldrb	r3, [fp, #26]	@ zero_extendqisi2
+	.loc 2 2349 0
 	ldrh	r0, [fp, #10]
+	.loc 2 2333 0
 	strb	r3, [r8]
+	.loc 2 2334 0
 	ldrh	r3, [fp, #16]
 	ubfx	r2, r3, #7, #1
+	.loc 2 2335 0
 	ubfx	r1, r3, #3, #1
+	.loc 2 2334 0
 	strb	r2, [r5]
+	.loc 2 2335 0
 	ldr	r2, .L1399+108
+	.loc 2 2338 0
 	ldr	r5, .L1399+112
+	.loc 2 2335 0
 	strb	r1, [r2]
+	.loc 2 2336 0
 	ubfx	r1, r3, #4, #1
 	ldr	r2, .L1399+116
+	.loc 2 2337 0
 	ubfx	r3, r3, #8, #3
 	strb	r3, [r10]
+	.loc 2 2338 0
 	movs	r3, #0
 	str	r3, [r5]
+	.loc 2 2336 0
 	strb	r1, [r2]
+	.loc 2 2349 0
 	ldrb	r1, [fp, #12]	@ zero_extendqisi2
 	bl	__aeabi_idiv
+.LVL1600:
 	mov	r1, r0
 	ldrb	r0, [fp, #18]	@ zero_extendqisi2
 	bl	BuildFlashLsbPageTable
+.LVL1601:
+	.loc 2 2350 0
 	bl	FlashDieInfoInit
+.LVL1602:
+	.loc 2 2351 0
 	ldr	r3, [r4]
 	mov	ip, r5
 	ldrh	r2, [r3, #16]
 	tst	r2, #64
 	beq	.L1330
+	.loc 2 2352 0
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	ldr	r3, .L1399+120
+	.loc 2 2353 0
 	ldr	r2, .L1399+124
+	.loc 2 2352 0
 	strb	r0, [r3]
+	.loc 2 2353 0
 	ldr	r3, .L1399+56
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	.loc 2 2354 0
 	ldrb	lr, [r3, #2]	@ zero_extendqisi2
+	.loc 2 2353 0
 	strb	r1, [r2]
+	.loc 2 2354 0
 	ldr	r1, .L1399+128
 	strb	lr, [r1]
+	.loc 2 2356 0
 	add	lr, r0, #-1
 	cmp	lr, #6
 	b	.L1400
 .L1401:
 	.align	2
 .L1399:
-	.word	.LANCHOR145
-	.word	.LANCHOR151
+	.word	.LANCHOR144
 	.word	.LANCHOR150
-	.word	.LANCHOR28
+	.word	.LANCHOR149
+	.word	.LANCHOR29
 	.word	.LANCHOR194
 	.word	.LANCHOR195
 	.word	.LANCHOR196
-	.word	.LANCHOR148
 	.word	.LANCHOR147
+	.word	.LANCHOR146
 	.word	.LANCHOR22
 	.word	.LANCHOR3
-	.word	.LANCHOR142
-	.word	.LC18
-	.word	.LANCHOR153
+	.word	.LANCHOR141
+	.word	.LC21
+	.word	.LANCHOR152
 	.word	.LANCHOR20
 	.word	.LANCHOR18
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR5
 	.word	.LANCHOR197
-	.word	.LANCHOR152
+	.word	.LANCHOR151
 	.word	1446522928
-	.word	.LANCHOR141+32
+	.word	.LANCHOR140+32
 	.word	.LANCHOR7
-	.word	.LC19
+	.word	.LC22
 	.word	.LANCHOR119
 	.word	.LANCHOR24
-	.word	.LANCHOR146
+	.word	.LANCHOR145
 	.word	.LANCHOR198
-	.word	.LANCHOR143
+	.word	.LANCHOR142
 	.word	.LANCHOR27
 	.word	.LANCHOR10
 	.word	.LANCHOR13
-	.word	.LANCHOR149
+	.word	.LANCHOR148
 	.word	.LANCHOR2
 	.word	.LANCHOR1
 	.word	.LANCHOR6
@@ -9832,217 +16421,352 @@ FlashInit:
 .L1400:
 	mov	lr, r1
 	bhi	.L1331
+.LBB406:
+	.loc 2 2359 0
 	ldr	r2, .L1402
 	str	r2, [r5]
+	.loc 2 2360 0
 	subs	r2, r0, #5
 	cmp	r2, #1
 	bhi	.L1332
+	.loc 2 2361 0
 	ldr	r2, .L1402+4
+	.loc 2 2363 0
 	adds	r3, r3, #20
+	.loc 2 2361 0
 	movs	r1, #1
 	str	r1, [r2]
+.LVL1603:
 .L1333:
 	subs	r1, r3, #1
+	.loc 2 2366 0
 	movs	r2, #0
 	adds	r3, r3, #31
+.LVL1604:
 .L1335:
+	.loc 2 2368 0
 	ldrsb	r5, [r1, #1]!
 	cbnz	r5, .L1334
+	.loc 2 2369 0
 	adds	r2, r2, #1
+.LVL1605:
 .L1334:
+	.loc 2 2367 0 discriminator 2
 	cmp	r3, r1
 	bne	.L1335
+	.loc 2 2372 0
 	cmp	r2, #27
 	bls	.L1330
+	.loc 2 2373 0
 	bl	FlashGetReadRetryDefault
+.LVL1606:
+	.loc 2 2374 0
 	bl	FlashSavePhyInfo
+.LVL1607:
 .L1330:
+.LBE406:
+	.loc 2 2399 0
 	ldr	r3, .L1402+8
 	ldr	r2, [r3]
 	ldr	r3, .L1402+12
 	cmp	r2, r3
 	bne	.L1346
+	.loc 2 2399 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r8]	@ zero_extendqisi2
 	cbz	r3, .L1346
+	.loc 2 2400 0 is_stmt 1
 	ldr	r3, [r4]
 	movs	r2, #0
 	strb	r2, [r3, #18]
 .L1346:
+	.loc 2 2406 0
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r3, #44
 	bne	.L1347
+	.loc 2 2406 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	cbz	r3, .L1347
+	.loc 2 2409 0 is_stmt 1
 	movs	r3, #0
+	.loc 2 2410 0
 	movs	r0, #1
+	.loc 2 2409 0
 	strb	r3, [r7]
+	.loc 2 2410 0
 	bl	FlashSetInterfaceMode
+.LVL1608:
+	.loc 2 2411 0
 	movs	r0, #1
 	bl	NandcSetMode
+.LVL1609:
 .L1347:
+	.loc 2 2428 0
 	movs	r0, #0
 	bl	flash_enter_slc_mode
+.LVL1610:
+	.loc 2 2429 0
 	ldrb	r3, [r10]	@ zero_extendqisi2
 	tst	r3, #6
 	beq	.L1348
+	.loc 2 2430 0
 	ldrb	r2, [r7]	@ zero_extendqisi2
 	cbnz	r2, .L1349
+	.loc 2 2430 0 is_stmt 0 discriminator 1
 	lsls	r3, r3, #31
 	bmi	.L1348
 .L1349:
+	.loc 2 2431 0 is_stmt 1
 	ldr	r3, .L1402+16
 	movs	r0, #0
 	ldr	r1, [r3]
 	bl	FlashDdrParaScan
+.LVL1611:
 .L1348:
+	.loc 2 2438 0
 	movs	r0, #0
+	.loc 2 2544 0
 	movs	r7, #16
+	.loc 2 2438 0
 	bl	flash_exit_slc_mode
+.LVL1612:
+	.loc 2 2531 0
 	ldr	r3, [r4]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1613:
+	.loc 2 2532 0
 	ldr	r0, .L1402+20
 	bl	FlashReadIdbDataRaw
-	ldr	r8, [r4]
+.LVL1614:
+.LBB407:
+	.loc 2 2551 0
+	ldr	r5, [r4]
+.LBE407:
+	.loc 2 2544 0
 	ldr	r3, [sp, #20]
+.LBB408:
+	.loc 2 2551 0
 	ldr	r4, .L1402+24
-	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+.LBE408:
+	.loc 2 2544 0
 	strb	r7, [r3]
-	ldrh	r5, [r8, #10]
-	strh	r1, [r4, #8]	@ movhi
-	ldrb	r3, [r8, #7]	@ zero_extendqisi2
-	mov	r0, r5
+.LVL1615:
+.LBB409:
+	.loc 2 2551 0
+	ldrb	r3, [r5, #12]	@ zero_extendqisi2
+	strh	r3, [r4, #8]	@ movhi
+	.loc 2 2552 0
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	str	r3, [r4, #4]
+	.loc 2 2553 0
 	ldr	r3, [r6]
-	ldrh	r6, [r8, #14]
+	.loc 2 2556 0
+	ldrh	r6, [r5, #14]
+	.loc 2 2553 0
 	str	r3, [r4]
+	.loc 2 2554 0
 	ldr	r3, .L1402+28
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
-	ldrb	r3, [r8, #13]	@ zero_extendqisi2
-	strh	r5, [r4, #16]	@ movhi
+	.loc 2 2555 0
+	ldrb	r3, [r5, #13]	@ zero_extendqisi2
+	.loc 2 2556 0
 	strh	r6, [r4, #14]	@ movhi
+	.loc 2 2555 0
 	strh	r3, [r4, #12]	@ movhi
+	.loc 2 2557 0
+	ldrh	r3, [r5, #10]
+	strh	r3, [r4, #16]	@ movhi
+	.loc 2 2558 0
+	ldrb	r1, [r5, #12]	@ zero_extendqisi2
+	ldrh	r0, [r5, #10]
 	bl	__aeabi_idiv
-	mov	r2, #512
+.LVL1616:
 	strh	r0, [r4, #18]	@ movhi
-	ldrb	r3, [r8, #9]	@ zero_extendqisi2
-	strh	r2, [r4, #24]	@ movhi
-	ldr	r2, [sp, #16]
-	strh	r3, [r4, #20]	@ movhi
-	smulbb	r5, r5, r3
+	.loc 2 2559 0
+	ldrb	r2, [r5, #9]	@ zero_extendqisi2
+	strh	r2, [r4, #20]	@ movhi
+	.loc 2 2560 0
+	ldrh	r1, [r5, #10]
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	.loc 2 2562 0
 	strh	r7, [r4, #26]	@ movhi
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	uxth	r5, r5
-	cmp	r2, #1
-	strh	r5, [r4, #22]	@ movhi
+	.loc 2 2560 0
+	smulbb	r3, r3, r1
+	.loc 2 2561 0
+	mov	r1, #512
+	strh	r1, [r4, #24]	@ movhi
+	.loc 2 2563 0
+	ldr	r1, [sp, #16]
+	.loc 2 2560 0
+	uxth	r3, r3
+	.loc 2 2563 0
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	.loc 2 2560 0
+	strh	r3, [r4, #22]	@ movhi
+	.loc 2 2563 0
+	cmp	r1, #1
 	bne	.L1350
+	.loc 2 2568 0
 	lsls	r3, r3, #1
-	lsrs	r2, r6, #1
-	lsls	r5, r5, #1
-	strh	r3, [r4, #20]	@ movhi
+	.loc 2 2566 0
+	lsrs	r1, r6, #1
+	.loc 2 2567 0
+	lsls	r2, r2, #1
+	.loc 2 2568 0
+	strh	r3, [r4, #22]	@ movhi
+	.loc 2 2569 0
 	movs	r3, #8
-	strh	r2, [r4, #14]	@ movhi
-	strh	r5, [r4, #22]	@ movhi
+	.loc 2 2566 0
+	strh	r1, [r4, #14]	@ movhi
+	.loc 2 2567 0
+	strh	r2, [r4, #20]	@ movhi
+	.loc 2 2569 0
 	strh	r3, [r4, #26]	@ movhi
 .L1350:
-	ldrb	r0, [r8, #20]	@ zero_extendqisi2
+.LBE409:
+	.loc 2 2588 0
+	ldrb	r0, [r5, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
+.LVL1617:
+	.loc 2 2592 0
 	movs	r0, #0
+.LVL1618:
 .L1307:
+	.loc 2 2593 0
 	add	sp, sp, #32
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1318:
+	.cfi_restore_state
+	.loc 2 2260 0
 	cmp	r3, #220
 	bne	.L1319
+	.loc 2 2261 0
 	mov	r1, #4096
 	b	.L1395
 .L1332:
+.LVL1619:
+.LBB410:
+	.loc 2 2363 0
 	add	r2, r3, #28
 	adds	r3, r3, #20
 	cmp	r0, #7
 	it	eq
 	moveq	r3, r2
 	b	.L1333
+.LVL1620:
 .L1331:
+.LBE410:
+	.loc 2 2376 0
 	sub	r3, r0, #17
 	cmp	r3, #2
 	bhi	.L1337
+	.loc 2 2377 0
 	ldr	r3, .L1402+32
+	.loc 2 2379 0
 	cmp	r0, #19
+	.loc 2 2377 0
 	str	r3, [r5]
+	.loc 2 2378 0
 	ite	ne
 	movne	r3, #7
+	.loc 2 2380 0
 	moveq	r3, #15
 	strb	r3, [r1]
 	b	.L1330
 .L1337:
+	.loc 2 2381 0
 	cmp	r0, #33
 	beq	.L1339
+	.loc 2 2381 0 is_stmt 0 discriminator 1
 	sub	r3, r0, #65
 	cmp	r3, #1
 	bhi	.L1340
 .L1339:
+	.loc 2 2382 0 is_stmt 1
 	ldr	r3, .L1402+36
 	str	r3, [ip]
+	.loc 2 2383 0
 	movs	r3, #4
 	strb	r3, [r2]
+	.loc 2 2384 0
 	movs	r3, #7
 	strb	r3, [lr]
 	b	.L1330
 .L1340:
+	.loc 2 2385 0
 	sub	r3, r0, #67
 	uxtb	r3, r3
 	cmp	r3, #1
 	bls	.L1341
+	.loc 2 2385 0 is_stmt 0 discriminator 1
 	sub	r1, r0, #34
 	cmp	r1, #1
 	bhi	.L1342
 .L1341:
+	.loc 2 2386 0 is_stmt 1
 	ldr	r1, .L1402+36
+	.loc 2 2388 0
 	cmp	r0, #35
+	.loc 2 2386 0
 	str	r1, [ip]
 	ldr	r1, .L1402+40
+	.loc 2 2388 0
 	beq	.L1343
+	.loc 2 2388 0 is_stmt 0 discriminator 1
 	cmp	r0, #68
 	beq	.L1343
+	.loc 2 2387 0 is_stmt 1
 	movs	r0, #7
 .L1396:
+	.loc 2 2390 0
 	cmp	r3, #1
+	.loc 2 2389 0
 	strb	r0, [r1]
+	.loc 2 2391 0
 	ite	ls
 	movls	r3, #4
+	.loc 2 2393 0
 	movhi	r3, #5
 	strb	r3, [r2]
 	b	.L1330
 .L1343:
+	.loc 2 2389 0
 	movs	r0, #17
 	b	.L1396
 .L1342:
+	.loc 2 2394 0
 	cmp	r0, #49
+	.loc 2 2395 0
 	itt	eq
 	ldreq	r3, .L1402+44
 	streq	r3, [r5]
 	b	.L1330
+.LVL1621:
 .L1352:
+	.loc 2 2220 0
 	mvn	r0, #1
 	b	.L1307
 .L1403:
 	.align	2
 .L1402:
 	.word	HynixReadRetrial
-	.word	.LANCHOR34
-	.word	.LANCHOR152
+	.word	.LANCHOR35
+	.word	.LANCHOR151
 	.word	1446522928
-	.word	.LANCHOR146
-	.word	.LANCHOR139
+	.word	.LANCHOR145
+	.word	.LANCHOR138
 	.word	.LANCHOR15
 	.word	.LANCHOR25
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-	.word	.LANCHOR149
+	.word	.LANCHOR148
 	.word	SamsungReadRetrial
+	.cfi_endproc
+.LFE252:
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
@@ -10053,54 +16777,102 @@ FlashInit:
 	.fpu softvfp
 	.type	FlashReadSlc2KPages, %function
 FlashReadSlc2KPages:
-	@ args = 0, pretend = 0, frame = 8
+.LFB258:
+	.loc 2 2761 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r8, r1
+.LVL1622:
+	.loc 2 2767 0
 	ldr	r3, .L1433
-	mov	fp, r2
+	.loc 2 2761 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	mov	r8, r1
+	.loc 2 2794 0
+	ldr	fp, .L1433+28
 	mov	r4, r0
+	.loc 2 2771 0
 	movs	r7, #0
+	.loc 2 2761 0
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 2 2767 0
 	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.LVL1623:
+	.loc 2 2761 0
+	str	r2, [sp, #12]
+.LVL1624:
 .L1405:
+	.loc 2 2771 0 discriminator 1
 	cmp	r7, r8
 	bne	.L1418
+	.loc 2 2815 0
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1625:
 .L1418:
+	.cfi_restore_state
+	.loc 2 2772 0
 	sub	r3, r8, r7
-	add	r2, sp, #12
+	add	r2, sp, #20
 	uxtb	r3, r3
-	mov	r1, fp
+	ldr	r1, [sp, #12]
 	mov	r0, r4
 	str	r3, [sp]
-	add	r3, sp, #8
+	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
+.LVL1626:
+	.loc 2 2773 0
 	ldr	r2, .L1433+4
-	ldr	r3, [sp, #8]
+	ldr	r3, [sp, #16]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L1406
+	.loc 2 2774 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L1407:
+	.loc 2 2771 0 discriminator 2
 	adds	r7, r7, #1
+.LVL1627:
 	adds	r4, r4, #36
 	b	.L1405
 .L1406:
+	.loc 2 2777 0
 	ldr	r2, .L1433+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+.LVL1628:
+	.loc 2 2778 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1629:
+	.loc 2 2779 0
 	mov	r0, r5
 	bl	NandcFlashCs
-	ldr	r1, [sp, #12]
+.LVL1630:
+	.loc 2 2780 0
+	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadCmd
+.LVL1631:
+	.loc 2 2781 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1632:
+	.loc 2 2782 0
 	ldr	r3, [r4, #12]
 	mov	r2, r10
 	movs	r1, #0
@@ -10108,88 +16880,129 @@ FlashReadSlc2KPages:
 	str	r3, [sp]
 	ldr	r3, [r4, #8]
 	bl	NandcXferData
+.LVL1633:
+	.loc 2 2785 0
 	ldr	r3, .L1433+12
+	.loc 2 2782 0
 	mov	r6, r0
-	ldr	r1, [sp, #12]
+.LVL1634:
+	.loc 2 2785 0
+	ldr	r1, [sp, #20]
 	mov	r0, r5
+.LVL1635:
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashReadCmd
+.LVL1636:
+	.loc 2 2787 0
 	ldr	r3, [r4, #8]
+	.loc 2 2786 0
 	cbz	r3, .L1408
+	.loc 2 2786 0 is_stmt 0 discriminator 1
 	add	r3, r3, #2048
 .L1408:
+	.loc 2 2788 0 is_stmt 1 discriminator 4
 	ldr	r2, [r4, #12]
+	.loc 2 2786 0 discriminator 4
 	cbz	r2, .L1409
+	.loc 2 2786 0 is_stmt 0 discriminator 5
 	adds	r2, r2, #8
 .L1409:
+	.loc 2 2786 0 discriminator 8
 	str	r2, [sp]
 	movs	r1, #0
 	mov	r2, r10
 	mov	r0, r5
 	bl	NandcXferData
+.LVL1637:
 	mov	r1, r0
+.LVL1638:
+	.loc 2 2789 0 is_stmt 1 discriminator 8
 	mov	r0, r5
+.LVL1639:
 	bl	NandcFlashDeCs
-	ldr	r3, .L1433+16
+.LVL1640:
+	.loc 2 2794 0 discriminator 8
+	ldrb	r3, [fp]	@ zero_extendqisi2
 	cmp	r6, r1
 	it	cc
 	movcc	r6, r1
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	add	r3, r2, r2, lsl #1
+.LVL1641:
+	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
 	bls	.L1410
-	adds	r5, r6, #1
+	.loc 2 2795 0 discriminator 1
+	adds	r0, r6, #1
 	it	ne
 	movne	r6, #256
+	.loc 2 2798 0 discriminator 1
 	str	r6, [r4]
 .L1413:
+	.loc 2 2801 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L1414
-	ldr	r1, [r3, #8]
-	adds	r0, r1, #1
+	.loc 2 2802 0
+	ldr	r2, [r3, #8]
+	adds	r1, r2, #1
+.LVL1642:
 	bne	.L1414
+	.loc 2 2802 0 is_stmt 0 discriminator 1
 	ldr	r3, [r3]
 	adds	r3, r3, #1
+	.loc 2 2803 0 is_stmt 1 discriminator 1
 	it	ne
-	strne	r1, [r4]
+	strne	r2, [r4]
 .L1414:
+	.loc 2 2806 0
 	ldr	r3, [r4]
-	adds	r1, r3, #1
+	adds	r2, r3, #1
 	bne	.L1407
+	.loc 2 2807 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1433+20
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	ldr	r0, .L1433+16
 	bl	printf
+.LVL1643:
+	.loc 2 2808 0
 	ldr	r1, [r4, #8]
 	cbz	r1, .L1416
+	.loc 2 2809 0
 	movs	r3, #8
 	movs	r2, #4
-	ldr	r0, .L1433+24
+	ldr	r0, .L1433+20
 	bl	rknand_print_hex
+.LVL1644:
 .L1416:
+	.loc 2 2810 0
 	ldr	r1, [r4, #12]
 	cmp	r1, #0
 	beq	.L1407
+	.loc 2 2811 0
 	movs	r3, #4
-	ldr	r0, .L1433+28
+	ldr	r0, .L1433+24
 	mov	r2, r3
 	bl	rknand_print_hex
+.LVL1645:
 	b	.L1407
+.LVL1646:
 .L1410:
+	.loc 2 2800 0
 	movs	r3, #0
 	str	r3, [r4]
 	b	.L1413
 .L1434:
 	.align	2
 .L1433:
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR3
-	.word	.LANCHOR31
-	.word	.LC20
-	.word	.LC21
-	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LC25
+	.word	.LANCHOR32
+	.cfi_endproc
+.LFE258:
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
@@ -10200,132 +17013,230 @@ FlashReadSlc2KPages:
 	.fpu softvfp
 	.type	FlashReadPages, %function
 FlashReadPages:
+.LFB261:
+	.loc 2 2941 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1647:
+	.loc 2 2956 0
 	ldr	r3, .L1526
+	.loc 2 2941 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 2 2941 0
 	mov	r10, r0
 	str	r1, [sp, #24]
+	.loc 2 2956 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 2941 0
 	str	r2, [sp, #12]
+	.loc 2 2956 0
 	cbnz	r3, .L1436
+	.loc 2 2948 0
 	ldr	r2, .L1526+4
+.LVL1648:
+	.loc 2 2949 0
 	mov	r8, r3
 	str	r3, [sp, #8]
+	.loc 2 2948 0
 	ldrb	r2, [r2, #9]	@ zero_extendqisi2
 	str	r2, [sp, #20]
+	.loc 2 2949 0
 	ldr	r2, .L1526+8
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	str	r2, [sp, #28]
+.LVL1649:
 .L1437:
+	.loc 2 2962 0 discriminator 1
 	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #24]
 	cmp	r3, r2
 	bcc	.L1475
+	.loc 2 3081 0
 	movs	r0, #0
 	b	.L1435
+.LVL1650:
 .L1436:
+	.loc 2 2957 0
 	bl	FlashReadSlc2KPages
+.LVL1651:
 .L1435:
+	.loc 2 3082 0
 	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1652:
 .L1475:
+	.cfi_restore_state
+	.loc 2 2963 0
 	ldr	r2, [sp, #8]
 	movs	r3, #36
+.LVL1653:
+	.loc 2 2964 0
 	ldr	r1, [sp, #12]
+	.loc 2 2963 0
 	mul	fp, r3, r2
 	add	r7, r10, fp
 	ldr	r3, [r7, #4]
+	.loc 2 2964 0
 	mov	r0, r7
+	.loc 2 2963 0
 	str	r3, [sp, #16]
+.LVL1654:
+	.loc 2 2964 0
 	ldr	r3, [sp, #24]
+.LVL1655:
 	subs	r3, r3, r2
 	add	r2, sp, #36
 	uxtb	r3, r3
 	str	r3, [sp]
+.LVL1656:
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
+.LVL1657:
+	.loc 2 2965 0
 	ldr	r2, .L1526+12
+	.loc 2 2964 0
 	mov	r5, r0
+.LVL1658:
+	.loc 2 2965 0
 	ldr	r3, [sp, #32]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L1439
+	.loc 2 2966 0
 	mov	r3, #-1
 	str	r3, [r10, fp]
+.LVL1659:
 .L1440:
+	.loc 2 2962 0 discriminator 2
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
 	str	r3, [sp, #8]
+.LVL1660:
 	b	.L1437
+.LVL1661:
 .L1439:
+	.loc 2 2969 0
 	ldr	r2, .L1526+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+.LVL1662:
+	.loc 2 2970 0
 	ldr	r3, .L1526+20
+	.loc 2 2973 0
 	mov	r0, r4
+.LVL1663:
+	.loc 2 2970 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 2971 0
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #0
+.LVL1664:
+	.loc 2 2973 0
 	bl	NandcWaitFlashReady
+.LVL1665:
+	.loc 2 2974 0
 	ldr	r3, .L1526+24
 	ldr	r3, [r3]
 	ldrb	r1, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r1, #1
 	cmp	r3, #6
 	bhi	.L1442
+.LBB411:
+	.loc 2 2975 0
 	ldr	r3, .L1526+28
+	.loc 2 2976 0
 	cmp	r1, #7
+	.loc 2 2975 0
 	add	r2, r3, r4
 	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+.LVL1666:
+	.loc 2 2977 0
 	it	eq
 	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
+.LVL1667:
+	.loc 2 2978 0
 	ldr	r2, .L1526+32
 	ldrb	r2, [r2, r4]	@ zero_extendqisi2
 	cmp	r2, r3
 	beq	.L1442
+	.loc 2 2979 0
 	ldr	r2, .L1526+36
 	mov	r0, r4
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL1668:
 .L1442:
+.LBE411:
+	.loc 2 2982 0
 	mov	r0, r4
 	bl	NandcFlashCs
+.LVL1669:
+	.loc 2 2984 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #1
 	beq	.L1444
+	.loc 2 2984 0 is_stmt 0 discriminator 2
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
 	bge	.L1445
 .L1444:
+	.loc 2 2984 0 discriminator 3
 	ldr	r3, .L1526+40
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L1445
+	.loc 2 2985 0 is_stmt 1
 	mov	r0, r4
 	bl	flash_enter_slc_mode
+.LVL1670:
 .L1452:
+	.loc 2 2989 0
 	ldr	r1, [sp, #36]
 	adds	r6, r1, #1
 	bne	.L1447
+	.loc 2 2989 0 is_stmt 0 discriminator 1
 	cmp	r4, #255
 	beq	.L1477
 .L1447:
+.LVL1671:
+	.loc 2 2991 0 is_stmt 1
 	cbz	r5, .L1449
+	.loc 2 2992 0
 	ldr	r3, .L1526+44
 	mov	r0, r4
 	ldr	r2, [r3]
 	add	r2, r2, r1
 	bl	FlashReadDpCmd
+.LVL1672:
 .L1450:
+	.loc 2 3001 0
 	mov	r0, r4
 	bl	NandcWaitFlashReady
+.LVL1673:
+	.loc 2 3002 0
 	cbz	r5, .L1448
+.LVL1674:
+	.loc 2 3003 0
 	ldr	r1, [sp, #36]
 	mov	r0, r4
 	bl	FlashReadDpDataOutCmd
+.LVL1675:
 .L1448:
+	.loc 2 3004 0
 	ldr	r3, [r7, #12]
 	movs	r1, #0
 	ldr	r2, [sp, #20]
@@ -10333,112 +17244,182 @@ FlashReadPages:
 	str	r3, [sp]
 	ldr	r3, [r7, #8]
 	bl	NandcXferData
+.LVL1676:
+	.loc 2 3008 0
 	ldr	r3, .L1526+8
+	.loc 2 3004 0
 	mov	r6, r0
+.LVL1677:
+	.loc 2 3008 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L1451
+	.loc 2 3008 0 is_stmt 0 discriminator 1
 	adds	r0, r0, #1
+.LVL1678:
 	bne	.L1451
+	.loc 2 3009 0 is_stmt 1
 	ldr	r3, .L1526+8
 	movs	r5, #0
 	strb	r5, [r3]
+.LVL1679:
+	.loc 2 3011 0
 	b	.L1452
+.LVL1680:
 .L1445:
+	.loc 2 2987 0
 	mov	r0, r4
 	bl	flash_exit_slc_mode
+.LVL1681:
 	b	.L1452
+.LVL1682:
 .L1449:
+	.loc 2 2994 0
 	mov	r0, r4
 	bl	FlashReadCmd
+.LVL1683:
 	b	.L1450
+.LVL1684:
 .L1477:
+	.loc 2 2997 0
 	movs	r5, #0
+.LVL1685:
 	b	.L1448
+.LVL1686:
 .L1451:
+	.loc 2 3013 0
 	cbz	r5, .L1453
+	.loc 2 3014 0
 	ldr	r3, .L1526+44
 	mov	r0, r4
 	ldr	r1, [sp, #36]
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashReadDpDataOutCmd
+.LVL1687:
+	.loc 2 3016 0
 	add	r3, fp, #36
+	.loc 2 3015 0
 	movs	r1, #0
+	.loc 2 3016 0
 	add	r3, r3, r10
+	.loc 2 3015 0
 	mov	r0, r4
 	ldr	r2, [r3, #12]
 	str	r2, [sp]
 	ldr	r2, [sp, #20]
 	ldr	r3, [r3, #8]
 	bl	NandcXferData
+.LVL1688:
+	.loc 2 3019 0
 	cmp	r0, #-1
+	.loc 2 3015 0
 	mov	r8, r0
+.LVL1689:
+	.loc 2 3019 0
 	it	eq
 	moveq	r5, #0
+.LVL1690:
 .L1453:
+	.loc 2 3021 0
 	mov	r0, r4
 	bl	NandcFlashDeCs
+.LVL1691:
+	.loc 2 3022 0
 	ldr	r3, .L1526+8
+	.loc 2 3023 0
 	adds	r1, r6, #1
+	.loc 2 3022 0
 	ldrb	r2, [sp, #28]	@ zero_extendqisi2
 	strb	r2, [r3]
+	.loc 2 3023 0
 	bne	.L1454
+	.loc 2 3023 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1526+48
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbnz	r3, .L1455
+.LVL1692:
 .L1459:
+	.loc 2 3032 0 is_stmt 1
 	ldr	r3, .L1526+52
 	ldr	r5, [r3]
 	cmp	r5, #0
 	bne	.L1456
+	.loc 2 3049 0
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
+.LVL1693:
 	b	.L1525
+.LVL1694:
 .L1455:
+.LBB412:
+	.loc 2 3024 0
 	ldr	r3, .L1526+56
+	.loc 2 3026 0
 	mov	r0, r4
 	ldr	r1, [sp, #36]
+	.loc 2 3024 0
 	ldr	r3, [r3]
 	ldr	r5, [r3, #304]
+.LVL1695:
+	.loc 2 3026 0
 	movs	r3, #1
 	str	r3, [sp]
 	ldr	r2, [r7, #8]
 	ldr	r3, [r7, #12]
 	bl	FlashDdrTunningRead
+.LVL1696:
+	.loc 2 3027 0
 	adds	r2, r0, #1
+	.loc 2 3026 0
 	mov	r6, r0
+.LVL1697:
+	.loc 2 3027 0
 	beq	.L1458
+	.loc 2 3027 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1526+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
 	bls	.L1478
 .L1458:
+	.loc 2 3028 0 is_stmt 1
 	ubfx	r0, r5, #8, #8
+.LVL1698:
 	bl	NandcSetDdrPara
+.LVL1699:
+.LBE412:
+	.loc 2 3030 0
 	adds	r3, r6, #1
 	beq	.L1459
 .L1478:
+.LBB413:
+	.loc 2 3025 0
 	movs	r5, #0
+.LVL1700:
 .L1454:
+.LBE413:
+	.loc 2 3051 0
 	ldr	r3, .L1526+60
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r6, r3, asr #2
 	bls	.L1467
+	.loc 2 3051 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1526+52
 	ldr	r3, [r3]
 	cmp	r3, #0
 	bne	.L1467
+	.loc 2 3052 0 is_stmt 1
 	mov	r6, #256
+.LVL1701:
 	b	.L1462
 .L1527:
 	.align	2
 .L1526:
 	.word	.LANCHOR1
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR5
 	.word	.LANCHOR25
 	.word	.LANCHOR26
@@ -10449,58 +17430,86 @@ FlashReadPages:
 	.word	.LANCHOR20+4
 	.word	.LANCHOR8
 	.word	.LANCHOR3
-	.word	.LANCHOR28
-	.word	.LANCHOR143
+	.word	.LANCHOR29
+	.word	.LANCHOR142
 	.word	.LANCHOR19
-	.word	.LANCHOR31
+	.word	.LANCHOR32
+.LVL1702:
 .L1456:
+	.loc 2 3034 0
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	blx	r5
+.LVL1703:
+	.loc 2 3035 0
 	adds	r5, r0, #1
+	.loc 2 3034 0
 	mov	r6, r0
+.LVL1704:
+	.loc 2 3035 0
 	bne	.L1460
+	.loc 2 3036 0
 	ldr	r3, .L1528
 	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L1461
+	.loc 2 3037 0
 	ldr	r2, .L1528+4
 	movs	r3, #0
 	mov	r0, r4
+.LVL1705:
 	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL1706:
 .L1461:
+	.loc 2 3038 0
 	ldr	r3, [r7, #12]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r1, [sp, #36]
 	bl	FlashReadRawPage
+.LVL1707:
+	.loc 2 3039 0
 	ldr	r2, .L1528+8
+	.loc 2 3038 0
 	mov	r6, r0
+.LVL1708:
+	.loc 2 3039 0
 	mov	r3, r0
 	ldr	r1, [r7, #4]
 	ldr	r0, .L1528+12
+.LVL1709:
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
+.LVL1710:
+	.loc 2 3040 0
 	adds	r0, r6, #1
 	bne	.L1460
+	.loc 2 3040 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1528+16
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	cbz	r5, .L1462
+	.loc 2 3041 0 is_stmt 1
 	ldr	r3, [sp, #12]
+	.loc 2 3042 0
 	mov	r0, r4
+	.loc 2 3041 0
 	cmp	r3, #1
 	beq	.L1463
+	.loc 2 3041 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
 	bge	.L1464
 .L1463:
+	.loc 2 3042 0 is_stmt 1
 	bl	flash_enter_slc_mode
+.LVL1711:
 .L1465:
+	.loc 2 3045 0
 	ldr	r3, .L1528+20
 	mov	r0, r4
 	ldr	r2, [r7, #8]
@@ -10508,75 +17517,113 @@ FlashReadPages:
 	ldr	r5, [r3]
 	ldr	r3, [r7, #12]
 	blx	r5
+.LVL1712:
 .L1525:
+	.loc 2 3059 0
 	adds	r1, r0, #1
+	.loc 2 3049 0
 	mov	r6, r0
+.LVL1713:
 	mov	r5, #0
+	.loc 2 3059 0
 	bne	.L1467
+.LVL1714:
 .L1462:
+	.loc 2 3058 0
 	str	r6, [r10, fp]
 .L1468:
+	.loc 2 3062 0
 	ldr	r3, [r10, fp]
 	adds	r2, r3, #1
 	bne	.L1470
+	.loc 2 3063 0
 	ldr	r2, .L1528+8
 	ldr	r1, [r7, #4]
 	ldr	r0, .L1528+24
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
+.LVL1715:
+	.loc 2 3066 0
 	ldr	r1, [r7, #12]
 	cbz	r1, .L1470
+	.loc 2 3067 0
 	movs	r3, #4
 	ldr	r0, .L1528+28
 	mov	r2, r3
 	bl	rknand_print_hex
+.LVL1716:
 .L1470:
+	.loc 2 3069 0
 	cbz	r5, .L1472
+	.loc 2 3070 0
 	ldr	r3, .L1528+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r8, r3, asr #2
 	bls	.L1473
+	.loc 2 3070 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1528+20
 	ldr	r3, [r3]
+	.loc 2 3071 0 is_stmt 1 discriminator 1
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #256
+.LVL1717:
 .L1473:
+	.loc 2 3074 0
 	cmp	r8, #-1
+	.loc 2 3073 0
 	add	r3, fp, #36
 	str	r8, [r10, r3]
+	.loc 2 3074 0
 	beq	.L1472
+	.loc 2 3074 0 is_stmt 0 discriminator 1
 	cmp	r8, #256
+	.loc 2 3075 0 is_stmt 1 discriminator 1
 	itt	ne
 	movne	r2, #0
 	strne	r2, [r10, r3]
 .L1472:
+	.loc 2 3077 0
 	ldr	r3, [sp, #8]
 	add	r3, r3, r5
 	str	r3, [sp, #8]
+.LVL1718:
+	.loc 2 3078 0
 	ldr	r3, [sp, #12]
+.LVL1719:
 	cmp	r3, #1
 	beq	.L1474
+	.loc 2 3078 0 is_stmt 0 discriminator 2
 	ldr	r3, [sp, #16]
 	cmp	r3, #0
 	bge	.L1440
 .L1474:
+	.loc 2 3078 0 discriminator 3
 	ldr	r3, .L1528+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	beq	.L1440
+	.loc 2 3079 0 is_stmt 1
 	mov	r0, r4
 	bl	flash_exit_slc_mode
+.LVL1720:
 	b	.L1440
+.LVL1721:
 .L1464:
+	.loc 2 3044 0
 	bl	flash_exit_slc_mode
+.LVL1722:
 	b	.L1465
 .L1460:
+	.loc 2 3031 0
 	movs	r5, #0
+.LVL1723:
 .L1467:
+	.loc 2 3059 0 discriminator 1
 	cmp	r6, #256
 	beq	.L1462
+	.loc 2 3060 0
 	movs	r3, #0
 	str	r3, [r10, fp]
 	b	.L1468
@@ -10585,12 +17632,14 @@ FlashReadPages:
 .L1528:
 	.word	.LANCHOR18
 	.word	.LANCHOR20+4
-	.word	.LANCHOR31
-	.word	.LC23
+	.word	.LANCHOR32
+	.word	.LC26
 	.word	.LANCHOR8
-	.word	.LANCHOR143
-	.word	.LC20
-	.word	.LC22
+	.word	.LANCHOR142
+	.word	.LC23
+	.word	.LC25
+	.cfi_endproc
+.LFE261:
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
@@ -10601,207 +17650,338 @@ FlashReadPages:
 	.fpu softvfp
 	.type	FlashProgSlc2KPages, %function
 FlashProgSlc2KPages:
+.LFB259:
+	.loc 2 2818 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1724:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 2 2818 0
 	str	r3, [sp, #12]
-	mov	r8, r1
+	mov	r10, r1
+	mov	r8, r2
 	mov	r4, r0
-	mov	r6, r0
+	.loc 2 2825 0
 	ldr	r3, .L1559
-	movs	r7, #0
+.LVL1725:
+	.loc 2 2827 0
+	mov	r6, r0
+	.loc 2 2852 0
 	ldr	fp, .L1559+28
-	str	r2, [sp, #8]
-	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+	.loc 2 2827 0
+	movs	r7, #0
+	.loc 2 2825 0
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+.LVL1726:
 .L1531:
-	cmp	r7, r8
+	.loc 2 2827 0 discriminator 1
+	cmp	r7, r10
 	bne	.L1537
+	.loc 2 2866 0
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
 	bne	.L1548
+.LVL1727:
 .L1558:
+	.loc 2 2899 0
 	movs	r0, #0
 	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1728:
 .L1537:
-	sub	r3, r8, r7
+	.cfi_restore_state
+	.loc 2 2832 0
+	sub	r3, r10, r7
 	add	r2, sp, #20
 	uxtb	r3, r3
-	ldr	r1, [sp, #8]
+	mov	r1, r8
 	mov	r0, r6
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
+.LVL1729:
+	.loc 2 2834 0
 	ldr	r2, .L1559+4
 	ldr	r3, [sp, #24]
 	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
 	bhi	.L1532
+	.loc 2 2835 0
 	mov	r3, #-1
 	str	r3, [r6]
 .L1533:
+	.loc 2 2827 0 discriminator 2
 	adds	r7, r7, #1
+.LVL1730:
 	adds	r6, r6, #36
 	b	.L1531
 .L1532:
+	.loc 2 2838 0
 	ldr	r2, .L1559+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+.LVL1731:
+	.loc 2 2839 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1732:
+	.loc 2 2840 0
 	mov	r0, r5
 	bl	NandcFlashCs
+.LVL1733:
+	.loc 2 2841 0
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
+.LVL1734:
+	.loc 2 2842 0
 	ldr	r3, [r6, #12]
-	mov	r2, r10
 	movs	r1, #1
+	ldr	r2, [sp, #8]
 	mov	r0, r5
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
+.LVL1735:
+	.loc 2 2843 0
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
+.LVL1736:
+	.loc 2 2844 0
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1737:
+	.loc 2 2845 0
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadStatus
+.LVL1738:
+	.loc 2 2847 0
 	sbfx	r0, r0, #0, #1
+.LVL1739:
+	.loc 2 2852 0
 	ldr	r1, [sp, #20]
+	.loc 2 2850 0
 	str	r0, [r6]
+	.loc 2 2852 0
 	mov	r0, r5
 	ldr	r3, [fp]
 	add	r1, r1, r3
 	bl	FlashProgFirstCmd
+.LVL1740:
+	.loc 2 2854 0
 	ldr	r3, [r6, #8]
+	.loc 2 2853 0
 	cbz	r3, .L1534
+	.loc 2 2853 0 is_stmt 0 discriminator 1
 	add	r3, r3, #2048
 .L1534:
+	.loc 2 2855 0 is_stmt 1 discriminator 4
 	ldr	r2, [r6, #12]
+	.loc 2 2853 0 discriminator 4
 	cbz	r2, .L1535
+	.loc 2 2853 0 is_stmt 0 discriminator 5
 	adds	r2, r2, #8
 .L1535:
+	.loc 2 2853 0 discriminator 8
 	str	r2, [sp]
 	movs	r1, #1
-	mov	r2, r10
+	ldr	r2, [sp, #8]
 	mov	r0, r5
 	bl	NandcXferData
+.LVL1741:
+	.loc 2 2856 0 is_stmt 1 discriminator 8
 	ldr	r3, [fp]
 	mov	r0, r5
 	ldr	r1, [sp, #20]
 	add	r1, r1, r3
 	bl	FlashProgSecondCmd
+.LVL1742:
+	.loc 2 2857 0 discriminator 8
 	mov	r0, r5
 	bl	NandcWaitFlashReady
+.LVL1743:
+	.loc 2 2858 0 discriminator 8
 	ldr	r1, [sp, #20]
 	mov	r0, r5
 	bl	FlashReadStatus
+.LVL1744:
+	.loc 2 2860 0 discriminator 8
 	lsls	r2, r0, #31
+	.loc 2 2863 0 discriminator 8
 	mov	r0, r5
+.LVL1745:
+	.loc 2 2861 0 discriminator 8
 	itt	mi
 	movmi	r3, #-1
 	strmi	r3, [r6]
+	.loc 2 2863 0 discriminator 8
 	bl	NandcFlashDeCs
+.LVL1746:
 	b	.L1533
+.LVL1747:
 .L1544:
+.LBB414:
+	.loc 2 2869 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1539
+	.loc 2 2870 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+12
 	bl	printf
+.LVL1748:
 .L1540:
-	add	r8, r8, #1
+.LBE414:
+	.loc 2 2867 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1749:
 	adds	r4, r4, #36
+.LVL1750:
 .L1538:
-	cmp	r7, r8
+	.loc 2 2867 0 is_stmt 0 discriminator 1
+	cmp	r7, r6
 	bne	.L1544
 	b	.L1558
 .L1539:
-	sub	r3, r7, r8
-	ldr	fp, .L1559+32
-	uxtb	r3, r3
+.LBB415:
+	.loc 2 2873 0 is_stmt 1
+	subs	r3, r7, r6
 	add	r2, sp, #20
-	ldr	r1, [sp, #8]
+	uxtb	r3, r3
+	mov	r1, r8
 	mov	r0, r4
+	.loc 2 2875 0
+	ldr	fp, .L1559+32
+	.loc 2 2873 0
 	str	r3, [sp]
 	add	r3, sp, #24
 	bl	LogAddr2PhyAddr
-	ldr	lr, [r10]
+.LVL1751:
+	.loc 2 2874 0
+	ldr	r2, [r10]
 	movs	r3, #0
-	ldr	ip, [fp]
-	mov	r6, r4
+	.loc 2 2876 0
+	mov	ip, r4
 	add	r5, sp, #28
-	str	r3, [lr]
-	str	r3, [ip]
-	ldmia	r6!, {r0, r1, r2, r3}
+	.loc 2 2874 0
+	str	r3, [r2]
+	.loc 2 2875 0
+	ldr	r2, [fp]
+	str	r3, [r2]
+	.loc 2 2876 0
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
-	str	lr, [sp, #36]
-	ldmia	r6!, {r0, r1, r2, r3}
-	str	ip, [sp, #40]
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
+	.loc 2 2879 0
+	mov	r2, r8
+	.loc 2 2876 0
+	ldr	r3, [ip]
+	.loc 2 2879 0
 	movs	r1, #1
-	ldr	r3, [r6]
 	add	r0, sp, #28
-	ldr	r2, [sp, #8]
+	.loc 2 2876 0
 	str	r3, [r5]
+	.loc 2 2877 0
+	ldr	r3, [r10]
+	str	r3, [sp, #36]
+	.loc 2 2878 0
+	ldr	r3, [fp]
+	str	r3, [sp, #40]
+	.loc 2 2879 0
 	bl	FlashReadPages
+.LVL1752:
+	.loc 2 2880 0
 	ldr	r5, [sp, #28]
 	adds	r3, r5, #1
 	bne	.L1541
+	.loc 2 2881 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+16
 	bl	printf
+.LVL1753:
+	.loc 2 2882 0
 	str	r5, [r4]
 .L1541:
+	.loc 2 2884 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L1542
+	.loc 2 2885 0
 	ldr	r2, [r3]
 	ldr	r3, [fp]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1542
+	.loc 2 2886 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+20
 	bl	printf
+.LVL1754:
+	.loc 2 2887 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L1542:
+	.loc 2 2890 0
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
 	beq	.L1540
+	.loc 2 2891 0
 	ldr	r2, [r3]
 	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1540
+	.loc 2 2892 0
 	ldr	r1, [r4, #4]
 	ldr	r0, .L1559+24
 	bl	printf
+.LVL1755:
+	.loc 2 2893 0
 	mov	r3, #-1
 	str	r3, [r4]
 	b	.L1540
+.LVL1756:
 .L1548:
-	mov	r8, #0
+.LBE415:
+	movs	r6, #0
+.LBB416:
+	.loc 2 2874 0
 	ldr	r10, .L1559+36
+.LVL1757:
 	b	.L1538
 .L1560:
 	.align	2
 .L1559:
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR25
 	.word	.LANCHOR26
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
 	.word	.LC27
+	.word	.LC28
+	.word	.LC29
+	.word	.LC30
 	.word	.LANCHOR3
 	.word	.LANCHOR196
 	.word	.LANCHOR195
+.LBE416:
+	.cfi_endproc
+.LFE259:
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
@@ -10812,48 +17992,90 @@ FlashProgSlc2KPages:
 	.fpu softvfp
 	.type	FlashProgPages, %function
 FlashProgPages:
+.LFB262:
+	.loc 2 3108 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1758:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #72
+	.cfi_def_cfa_offset 104
+	.loc 2 3115 0
 	ldr	r5, .L1613
+	.loc 2 3108 0
 	mov	r4, r0
 	mov	r8, r2
 	str	r1, [sp, #8]
+	.loc 2 3115 0
 	ldr	r5, [r5]
+	.loc 2 3108 0
 	str	r3, [sp, #20]
+	.loc 2 3115 0
 	ldrb	r5, [r5, #19]	@ zero_extendqisi2
 	str	r5, [sp, #16]
+.LVL1759:
+	.loc 2 3120 0
 	ldr	r5, .L1613+4
+.LVL1760:
 	ldrb	r7, [r5]	@ zero_extendqisi2
 	cbnz	r7, .L1562
+	.loc 2 3116 0
 	ldr	r3, .L1613+8
+.LVL1761:
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r3, [sp, #12]
+.LVL1762:
 .L1563:
+	.loc 2 3123 0 discriminator 1
 	ldr	r3, [sp, #8]
 	cmp	r7, r3
 	bcc	.L1576
+	.loc 2 3180 0 discriminator 1
 	ldr	r6, .L1613+12
 	movs	r5, #0
+	.loc 2 3182 0 discriminator 1
 	ldr	r7, .L1613+16
+.LVL1763:
 .L1577:
+	.loc 2 3180 0 discriminator 1
 	ldrb	r3, [r6]	@ zero_extendqisi2
 	cmp	r5, r3
 	bcc	.L1579
+	.loc 2 3186 0
 	ldr	r3, [sp, #20]
 	cmp	r3, #0
 	bne	.L1580
+.LVL1764:
 .L1588:
+	.loc 2 3218 0
 	movs	r0, #0
 	b	.L1561
+.LVL1765:
 .L1562:
+	.loc 2 3121 0
 	bl	FlashProgSlc2KPages
+.LVL1766:
 .L1561:
+	.loc 2 3219 0
 	add	sp, sp, #72
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1767:
 .L1576:
+	.cfi_restore_state
+	.loc 2 3124 0
 	ldr	r3, [sp, #8]
 	movs	r6, #36
 	muls	r6, r7, r6
@@ -10866,84 +18088,133 @@ FlashProgPages:
 	mov	r0, fp
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
+.LVL1768:
+	.loc 2 3125 0
 	ldr	r3, .L1613+12
+	.loc 2 3124 0
 	mov	r10, r0
+.LVL1769:
+	.loc 2 3125 0
 	ldr	r0, [sp, #32]
+.LVL1770:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, r0
 	bhi	.L1565
+	.loc 2 3126 0
 	mov	r3, #-1
 	str	r3, [r4, r6]
 .L1566:
+	.loc 2 3123 0 discriminator 2
 	adds	r7, r7, #1
+.LVL1771:
 	b	.L1563
 .L1565:
+	.loc 2 3129 0
 	ldr	r3, .L1613+20
 	ldrb	r3, [r3]	@ zero_extendqisi2
+	.loc 2 3130 0
 	cmp	r3, #0
+	.loc 2 3131 0
 	ldr	r3, .L1613+24
+	.loc 2 3130 0
 	it	eq
 	moveq	r10, #0
+.LVL1772:
+	.loc 2 3131 0
 	add	r3, r3, r0, lsl #4
 	ldr	r3, [r3, #8]
 	cbz	r3, .L1568
+	.loc 2 3134 0
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
+.LVL1773:
 .L1568:
+	.loc 2 3136 0
 	ldr	r3, [sp, #32]
+	.loc 2 3137 0
 	movs	r1, #0
+	.loc 2 3136 0
 	ldr	r2, .L1613+24
 	add	r2, r2, r3, lsl #4
+	.loc 2 3137 0
 	str	r1, [r2, #12]
+	.loc 2 3138 0
 	ldr	r1, [sp, #28]
+	.loc 2 3136 0
 	str	fp, [r2, #8]
+	.loc 2 3138 0
 	str	r1, [r2, #4]
+	.loc 2 3141 0
 	cmp	r10, #0
 	beq	.L1569
+	.loc 2 3142 0
 	add	r1, r6, #36
 	add	r1, r1, r4
 	str	r1, [r2, #12]
 .L1569:
+	.loc 2 3143 0
 	ldr	r2, .L1613+28
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+.LVL1774:
+	.loc 2 3144 0
 	lsls	r3, r3, #4
 	ldr	r2, .L1613+24
+	.loc 2 3146 0
 	mov	r0, r5
+	.loc 2 3144 0
 	strb	r5, [r2, r3]
+	.loc 2 3145 0
 	ldr	r3, .L1613+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #1
 	bne	.L1570
+	.loc 2 3146 0
 	bl	NandcWaitFlashReady
+.LVL1775:
 .L1571:
+	.loc 2 3152 0
 	ldr	r3, [sp, #16]
 	subs	r3, r3, #1
 	cmp	r3, #6
 	bhi	.L1572
+	.loc 2 3153 0
 	ldr	r3, .L1613+32
 	ldrb	r3, [r3, r5]	@ zero_extendqisi2
 	cbz	r3, .L1572
+	.loc 2 3154 0
 	ldr	r1, .L1613+36
 	movs	r3, #0
 	mov	r0, r5
 	adds	r2, r1, #4
 	ldrb	r1, [r1, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
+.LVL1776:
 .L1572:
+	.loc 2 3156 0
 	mov	r0, r5
 	bl	NandcFlashCs
+.LVL1777:
+	.loc 2 3157 0
 	cmp	r8, #1
+	.loc 2 3158 0
 	mov	r0, r5
+	.loc 2 3157 0
 	bne	.L1573
+	.loc 2 3157 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1613+16
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	beq	.L1573
+	.loc 2 3158 0 is_stmt 1
 	bl	flash_enter_slc_mode
+.LVL1778:
 .L1574:
+	.loc 2 3161 0
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgFirstCmd
+.LVL1779:
+	.loc 2 3162 0
 	ldr	r3, [fp, #12]
 	movs	r1, #1
 	ldr	r2, [sp, #12]
@@ -10951,28 +18222,41 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [fp, #8]
 	bl	NandcXferData
+.LVL1780:
+	.loc 2 3163 0
 	cmp	r10, #0
 	beq	.L1575
+	.loc 2 3164 0
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgDpFirstCmd
+.LVL1781:
+	.loc 2 3165 0
 	ldr	r3, .L1613+40
 	mov	r0, r5
 	ldr	r2, [sp, #32]
+	.loc 2 3167 0
 	adds	r6, r6, #36
+	.loc 2 3165 0
 	ldr	r1, [sp, #28]
+	.loc 2 3167 0
 	add	r6, r6, r4
+	.loc 2 3165 0
 	ldr	r2, [r3, r2, lsl #2]
 	adds	r2, r2, #0
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL1782:
+	.loc 2 3166 0
 	ldr	r3, .L1613+44
 	mov	r0, r5
 	ldr	r1, [sp, #28]
 	ldr	r3, [r3]
 	add	r1, r1, r3
 	bl	FlashProgDpSecondCmd
+.LVL1783:
+	.loc 2 3167 0
 	ldr	r3, [r6, #12]
 	movs	r1, #1
 	ldr	r2, [sp, #12]
@@ -10980,16 +18264,27 @@ FlashProgPages:
 	str	r3, [sp]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
+.LVL1784:
 .L1575:
+	.loc 2 3169 0
 	ldr	r1, [sp, #28]
 	mov	r0, r5
 	bl	FlashProgSecondCmd
+.LVL1785:
+	.loc 2 3170 0
 	mov	r0, r5
+	.loc 2 3171 0
 	add	r7, r7, r10
+.LVL1786:
+	.loc 2 3170 0
 	bl	NandcFlashDeCs
+.LVL1787:
 	b	.L1566
 .L1570:
+	.loc 2 3148 0
 	bl	NandcFlashCs
+.LVL1788:
+	.loc 2 3149 0
 	ldr	r2, [sp, #32]
 	mov	r0, r5
 	ldr	r3, .L1613+40
@@ -10999,105 +18294,167 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
+.LVL1789:
+	.loc 2 3150 0
 	mov	r0, r5
 	bl	NandcFlashDeCs
+.LVL1790:
 	b	.L1571
 .L1573:
+	.loc 2 3160 0
 	bl	flash_exit_slc_mode
+.LVL1791:
 	b	.L1574
+.LVL1792:
 .L1579:
+	.loc 2 3181 0
 	uxtb	r0, r5
 	bl	FlashWaitCmdDone
+.LVL1793:
+	.loc 2 3182 0
 	cmp	r8, #1
 	bne	.L1578
+	.loc 2 3182 0 is_stmt 0 discriminator 1
 	ldrb	r3, [r7]	@ zero_extendqisi2
 	cbz	r3, .L1578
+	.loc 2 3183 0 is_stmt 1
 	ldr	r2, .L1613+24
 	lsls	r3, r5, #4
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
+.LVL1794:
 .L1578:
+	.loc 2 3180 0 discriminator 2
 	adds	r5, r5, #1
+.LVL1795:
 	b	.L1577
 .L1580:
-	ldr	r10, .L1613+64
-	movs	r7, #0
+.LBB417:
+	.loc 2 3194 0
+	ldr	r7, .L1613+48
+.LBE417:
+	.loc 2 3186 0
+	movs	r6, #0
+.LVL1796:
 .L1581:
+	.loc 2 3187 0 discriminator 1
 	ldr	r3, [sp, #8]
-	cmp	r7, r3
+	cmp	r6, r3
 	beq	.L1588
+.LBB418:
+	.loc 2 3189 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1582
+	.loc 2 3190 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+48
+	ldr	r0, .L1613+52
 	bl	printf
+.LVL1797:
 .L1583:
-	adds	r7, r7, #1
+.LBE418:
+	.loc 2 3187 0 discriminator 2
+	adds	r6, r6, #1
+.LVL1798:
 	adds	r4, r4, #36
 	b	.L1581
 .L1582:
+.LBB419:
+	.loc 2 3193 0
 	ldr	r3, [sp, #8]
 	add	r2, sp, #28
-	ldr	fp, .L1613+68
 	mov	r1, r8
 	mov	r0, r4
-	mov	r6, r4
-	subs	r3, r3, r7
+	.loc 2 3195 0
+	ldr	r10, .L1613+68
+	.loc 2 3196 0
 	add	r5, sp, #36
+	.loc 2 3193 0
+	subs	r3, r3, r6
 	uxtb	r3, r3
 	str	r3, [sp]
 	add	r3, sp, #32
 	bl	LogAddr2PhyAddr
-	ldr	lr, [r10]
+.LVL1799:
+	.loc 2 3194 0
+	ldr	r2, [r7]
 	movs	r3, #0
-	ldr	ip, [fp]
-	str	r3, [lr]
-	str	r3, [ip]
-	ldmia	r6!, {r0, r1, r2, r3}
+	.loc 2 3196 0
+	mov	ip, r4
+	.loc 2 3194 0
+	str	r3, [r2]
+	.loc 2 3195 0
+	ldr	r2, [r10]
+	str	r3, [r2]
+	.loc 2 3196 0
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
-	str	lr, [sp, #44]
-	ldmia	r6!, {r0, r1, r2, r3}
-	str	ip, [sp, #48]
+	ldmia	ip!, {r0, r1, r2, r3}
 	stmia	r5!, {r0, r1, r2, r3}
+	.loc 2 3199 0
 	mov	r2, r8
-	ldr	r3, [r6]
+	.loc 2 3196 0
+	ldr	r3, [ip]
+	.loc 2 3199 0
 	movs	r1, #1
 	add	r0, sp, #36
+	.loc 2 3196 0
 	str	r3, [r5]
+	.loc 2 3197 0
+	ldr	r3, [r7]
+	str	r3, [sp, #44]
+	.loc 2 3198 0
+	ldr	r3, [r10]
+	str	r3, [sp, #48]
+	.loc 2 3199 0
 	bl	FlashReadPages
+.LVL1800:
+	.loc 2 3200 0
 	ldr	r5, [sp, #36]
 	adds	r3, r5, #1
 	bne	.L1584
+	.loc 2 3201 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+52
+	ldr	r0, .L1613+56
 	bl	printf
+.LVL1801:
+	.loc 2 3202 0
 	str	r5, [r4]
 .L1584:
+	.loc 2 3204 0
 	ldr	r3, [r4, #12]
 	cbz	r3, .L1585
+	.loc 2 3205 0
 	ldr	r2, [r3]
-	ldr	r3, [fp]
+	ldr	r3, [r10]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1585
+	.loc 2 3206 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+56
+	ldr	r0, .L1613+60
 	bl	printf
+.LVL1802:
+	.loc 2 3207 0
 	mov	r3, #-1
 	str	r3, [r4]
 .L1585:
+	.loc 2 3210 0
 	ldr	r3, [r4, #8]
 	cmp	r3, #0
 	beq	.L1583
+	.loc 2 3211 0
 	ldr	r2, [r3]
-	ldr	r3, [r10]
+	ldr	r3, [r7]
 	ldr	r3, [r3]
 	cmp	r2, r3
 	beq	.L1583
+	.loc 2 3212 0
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1613+60
+	ldr	r0, .L1613+64
 	bl	printf
+.LVL1803:
+	.loc 2 3213 0
 	mov	r3, #-1
 	str	r3, [r4]
 	b	.L1583
@@ -11106,7 +18463,7 @@ FlashProgPages:
 .L1613:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
-	.word	.LANCHOR29
+	.word	.LANCHOR30
 	.word	.LANCHOR25
 	.word	.LANCHOR8
 	.word	.LANCHOR27
@@ -11116,12 +18473,15 @@ FlashProgPages:
 	.word	.LANCHOR20
 	.word	.LANCHOR17
 	.word	.LANCHOR3
-	.word	.LC24
-	.word	.LC25
-	.word	.LC26
-	.word	.LC27
 	.word	.LANCHOR195
+	.word	.LC27
+	.word	.LC28
+	.word	.LC29
+	.word	.LC30
 	.word	.LANCHOR196
+.LBE419:
+	.cfi_endproc
+.LFE262:
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
@@ -11132,60 +18492,110 @@ FlashProgPages:
 	.fpu softvfp
 	.type	FlashTestBlk, %function
 FlashTestBlk:
+.LFB235:
+	.loc 2 1053 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1804:
+	.loc 2 1058 0
 	ldr	r3, .L1618
+	.loc 2 1053 0
 	push	{r4, r5, lr}
+	.cfi_def_cfa_offset 12
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #108
+	.cfi_def_cfa_offset 120
+	.loc 2 1058 0
 	ldr	r3, [r3]
 	cmp	r0, r3
 	bcc	.L1617
+.LVL1805:
+.LBB422:
+.LBB423:
+	.loc 2 1061 0
 	ldr	r5, .L1618+4
+	.loc 2 1062 0
 	add	r0, sp, #40
+.LVL1806:
+	.loc 2 1063 0
 	movs	r2, #32
 	movs	r1, #165
+	.loc 2 1062 0
 	str	r0, [sp, #16]
+	.loc 2 1065 0
 	lsls	r4, r4, #10
+.LVL1807:
+	.loc 2 1061 0
 	ldr	r3, [r5]
 	str	r3, [sp, #12]
+	.loc 2 1063 0
 	bl	ftl_memset
+.LVL1808:
+	.loc 2 1064 0
 	movs	r2, #8
 	movs	r1, #90
 	ldr	r0, [r5]
 	bl	ftl_memset
+.LVL1809:
+	.loc 2 1066 0
 	movs	r2, #1
 	add	r0, sp, #4
 	mov	r1, r2
+	.loc 2 1065 0
 	str	r4, [sp, #8]
+	.loc 2 1066 0
 	bl	FlashEraseBlocks
+.LVL1810:
+	.loc 2 1067 0
 	movs	r3, #1
 	add	r0, sp, #4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL1811:
+	.loc 2 1068 0
 	ldr	r4, [sp, #4]
+	.loc 2 1074 0
 	movs	r2, #1
 	movs	r1, #0
 	add	r0, sp, #4
+	.loc 2 1068 0
 	adds	r4, r4, #0
 	it	ne
 	movne	r4, #1
 	negs	r4, r4
+.LDL1:
+.LVL1812:
+	.loc 2 1074 0
 	bl	FlashEraseBlocks
+.LVL1813:
 .L1615:
+.LBE423:
+.LBE422:
+	.loc 2 1076 0
 	mov	r0, r4
 	add	sp, sp, #108
+	.cfi_remember_state
+	.cfi_def_cfa_offset 12
 	@ sp needed
 	pop	{r4, r5, pc}
+.LVL1814:
 .L1617:
+	.cfi_restore_state
+	.loc 2 1059 0
 	movs	r4, #0
 	b	.L1615
 .L1619:
 	.align	2
 .L1618:
-	.word	.LANCHOR147
-	.word	.LANCHOR151
+	.word	.LANCHOR146
+	.word	.LANCHOR150
+	.cfi_endproc
+.LFE235:
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -11196,279 +18606,467 @@ FlashTestBlk:
 	.fpu softvfp
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 32
+.LFB300:
+	.loc 4 654 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1815:
+	.loc 4 663 0
 	ldr	r3, .L1665
+	.loc 4 654 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	str	r0, [sp, #4]
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 4 654 0
+	str	r0, [sp, #8]
+	.loc 4 663 0
 	ldr	r3, [r3]
-	str	r1, [sp]
+	.loc 4 654 0
+	str	r1, [sp, #4]
+	.loc 4 663 0
 	cmp	r3, #0
 	bne	.L1647
-	ldr	r2, .L1665+4
-	mov	fp, r3
-	ldr	r7, .L1665+8
+	.loc 4 661 0
+	ldr	r1, .L1665+4
+.LVL1816:
+	.loc 4 672 0
+	mov	r10, r3
+	.loc 4 671 0
+	ldr	r4, [sp, #8]
+	.loc 4 666 0
 	mov	r5, r3
-	mov	r4, r3
-	mov	r10, #36
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	ldr	r8, [r7]
-	str	r2, [sp, #8]
-	ldr	r2, .L1665+12
-	str	r0, [r2]
-	ldr	r2, .L1665+16
-	ldrh	r2, [r2]
+	.loc 4 673 0
+	ldr	r7, .L1665+8
+	mov	r8, #36
+	.loc 4 661 0
+	ldrb	r2, [r1]	@ zero_extendqisi2
+	mov	fp, r1
 	str	r2, [sp, #20]
-	ldr	r2, .L1665+20
-	ldr	r2, [r2]
-	str	r2, [sp, #12]
-	ldr	r2, .L1665+24
-	ldrh	r2, [r2]
+.LVL1817:
+	.loc 4 668 0
+	ldr	r2, .L1665+12
+	ldrb	r0, [r2]	@ zero_extendqisi2
+.LVL1818:
 	str	r2, [sp, #16]
+	str	r0, [sp, #12]
+.LVL1819:
+	.loc 4 671 0
+	ldr	r0, .L1665+16
+	str	r4, [r0]
+.LVL1820:
+	.loc 4 667 0
+	mov	r4, r3
+.LVL1821:
 .L1622:
-	ldr	r3, [sp, #20]
-	uxth	r2, fp
-	cmp	r3, r2
+	.loc 4 672 0 discriminator 1
+	ldr	r3, .L1665+20
+	uxth	r2, r10
+	ldrh	r1, [r3]
+	cmp	r1, r2
 	bhi	.L1626
+	.loc 4 692 0
 	cmp	r5, #0
 	beq	.L1620
-	ldr	r3, [sp, #8]
-	mov	r0, r8
-	mov	r10, #36
-	mov	r8, #0
+	.loc 4 668 0
+	ldr	r3, [sp, #12]
+	.loc 4 696 0
+	movs	r7, #0
+	.loc 4 697 0
+	ldr	r8, .L1665+8
 	mov	r2, r5
+	.loc 4 696 0
+	strb	r7, [fp]
+	.loc 4 701 0
+	mov	r10, #36
+.LVL1822:
+	.loc 4 668 0
 	adds	r6, r3, #0
 	it	ne
 	movne	r6, #1
+	.loc 4 697 0
+	ldr	r0, [r8]
 	mov	r1, r6
 	bl	FlashEraseBlocks
+.LVL1823:
+	.loc 4 698 0
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	strb	r3, [fp]
+.LVL1824:
 .L1628:
-	uxth	r3, r8
+	.loc 4 700 0 discriminator 1
+	uxth	r3, r7
 	cmp	r5, r3
 	bhi	.L1630
-	ldr	r3, [sp]
+	.loc 4 708 0
+	ldr	r3, [sp, #4]
 	cmp	r3, #0
 	bne	.L1631
+	.loc 4 660 0
 	uxth	r6, r6
-	mov	r10, #6
+	.loc 4 659 0
+	movs	r3, #6
+	str	r3, [sp, #16]
+	.loc 4 657 0
 	movs	r3, #1
-	str	r3, [sp, #8]
+	str	r3, [sp, #12]
+.LVL1825:
 .L1632:
-	movs	r7, #0
+	.loc 4 720 0
+	ldr	r8, .L1665+8
+	mov	r10, #0
+.LVL1826:
 .L1641:
-	ldr	r3, .L1665+16
-	mov	r8, #0
-	mov	r5, r8
-	ldrh	r3, [r3]
-	str	r3, [sp, #28]
-	ldr	r3, .L1665+8
-	ldr	fp, [r3]
-	ldr	r3, .L1665+28
-	ldr	r3, [r3]
-	str	r3, [sp, #16]
-	ldr	r3, .L1665+32
-	ldr	r3, [r3]
-	str	r3, [sp, #20]
-	ldr	r3, .L1665+24
-	ldrh	r3, [r3]
-	str	r3, [sp, #24]
+	.loc 4 719 0
+	mov	fp, #0
+	.loc 4 718 0
+	mov	r5, fp
+.LVL1827:
 .L1633:
-	ldr	r3, [sp, #28]
-	uxth	r2, r8
-	cmp	r3, r2
+	.loc 4 719 0 discriminator 1
+	ldr	r3, .L1665+20
+	uxth	r2, fp
+	ldrh	r1, [r3]
+	cmp	r1, r2
 	bhi	.L1636
+	.loc 4 734 0
 	cbz	r5, .L1620
-	mov	r0, fp
-	ldr	fp, .L1665+8
+	.loc 4 737 0
+	ldr	fp, .L1665+4
+.LVL1828:
+	.loc 4 738 0
 	movs	r3, #1
+	.loc 4 737 0
+	movs	r7, #0
+	.loc 4 738 0
 	mov	r2, r6
+.LVL1829:
 	mov	r1, r5
-	mov	r8, #0
+	ldr	r0, [r8]
+	.loc 4 737 0
+	strb	r7, [fp]
+	.loc 4 738 0
 	bl	FlashProgPages
-	movs	r3, #36
+.LVL1830:
+	.loc 4 739 0
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	strb	r3, [fp]
+.LVL1831:
+	.loc 4 742 0
+	mov	fp, #36
+.LVL1832:
 .L1638:
-	uxth	r2, r8
-	cmp	r5, r2
+	.loc 4 741 0 discriminator 1
+	uxth	r3, r7
+	cmp	r5, r3
 	bhi	.L1640
-	add	r7, r7, r10
-	ldr	r3, [sp, #8]
-	uxth	r7, r7
-	cmp	r7, r3
-	bcc	.L1641
-	ldr	r8, .L1665+8
+	.loc 4 748 0
+	ldr	r3, [sp, #16]
+	add	r10, r10, r3
+.LVL1833:
+	.loc 4 749 0
+	ldr	r3, [sp, #12]
+	.loc 4 748 0
+	uxth	r10, r10
+.LVL1834:
+	.loc 4 749 0
+	cmp	r3, r10
+	bhi	.L1641
 	movs	r7, #0
+.LVL1835:
+	.loc 4 755 0 discriminator 1
 	mov	r10, #36
+.LVL1836:
 .L1642:
+	.loc 4 754 0 discriminator 1
 	uxth	r3, r7
 	cmp	r5, r3
 	bhi	.L1644
-	ldr	r3, [sp, #4]
+	.loc 4 759 0
+	ldr	r3, [sp, #8]
 	cmp	r3, #63
 	bls	.L1645
-	ldr	r3, [sp]
+	.loc 4 759 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #4]
 	cbz	r3, .L1620
 .L1645:
-	ldr	r3, .L1665+8
+	.loc 4 760 0 is_stmt 1
 	mov	r2, r5
 	mov	r1, r6
-	ldr	r0, [r3]
+	ldr	r0, [r8]
 	bl	FlashEraseBlocks
+.LVL1837:
 .L1620:
+	.loc 4 763 0
 	mov	r0, r4
-	add	sp, sp, #32
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1838:
 .L1626:
-	mul	r2, r10, fp
+	.cfi_restore_state
+	.loc 4 673 0
+	uxth	r2, r10
+	ldr	r0, [r7]
 	movs	r3, #0
-	ldr	r1, [sp, #4]
-	str	r3, [r8, r2]
-	ldr	r3, .L1665+36
-	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	mul	r1, r8, r2
+	str	r3, [r0, r1]
+	.loc 4 674 0
+	ldr	r3, .L1665+24
+	ldr	r1, [sp, #8]
+	ldrb	r0, [r3, r2]	@ zero_extendqisi2
 	bl	V2P_block
-	ldr	r3, [sp]
+.LVL1839:
+	.loc 4 676 0
+	ldr	r3, [sp, #4]
+	.loc 4 674 0
 	mov	r6, r0
+.LVL1840:
+	.loc 4 676 0
 	cbz	r3, .L1623
+	.loc 4 677 0
 	bl	IsBlkInVendorPart
+.LVL1841:
 	cbnz	r0, .L1624
 .L1623:
+	.loc 4 681 0
 	mov	r0, r6
 	bl	FtlBbmIsBadBlock
+.LVL1842:
 	cbnz	r0, .L1625
-	ldr	r3, [sp, #16]
-	mla	r1, r10, r5, r8
+	.loc 4 684 0
+	ldr	r3, .L1665+28
+	.loc 4 682 0
 	lsls	r6, r6, #10
-	mul	r2, r3, r5
-	ldr	r3, [sp, #12]
+	ldr	r2, [r7]
+	.loc 4 684 0
+	ldrh	r1, [r3]
+	ldr	r3, .L1665+32
+	.loc 4 682 0
+	mla	r2, r8, r5, r2
+	.loc 4 684 0
+	muls	r1, r5, r1
+	.loc 4 685 0
 	adds	r5, r5, #1
-	str	r6, [r1, #4]
+.LVL1843:
 	uxth	r5, r5
-	str	r0, [r1, #8]
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
+.LVL1844:
+	.loc 4 683 0
+	str	r0, [r2, #8]
+	.loc 4 684 0
+	ldr	r0, [r3]
+	bic	r1, r1, #3
+	.loc 4 682 0
+	str	r6, [r2, #4]
+	.loc 4 684 0
+	add	r1, r1, r0
+	str	r1, [r2, #12]
 .L1624:
-	add	fp, fp, #1
+.LVL1845:
+	add	r10, r10, #1
+.LVL1846:
 	b	.L1622
+.LVL1847:
 .L1625:
+	.loc 4 687 0
 	adds	r4, r4, #1
+.LVL1848:
 	uxth	r4, r4
+.LVL1849:
 	b	.L1624
+.LVL1850:
 .L1630:
-	mul	r3, r10, r8
-	ldr	r2, [r7]
+	.loc 4 701 0
+	mul	r3, r10, r7
+	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
 	bne	.L1629
+	.loc 4 703 0
 	ldr	r0, [r1, #4]
+	.loc 4 702 0
 	adds	r4, r4, #1
+.LVL1851:
 	uxth	r4, r4
+.LVL1852:
+	.loc 4 703 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
+.LVL1853:
 .L1629:
-	add	r8, r8, #1
+	adds	r7, r7, #1
+.LVL1854:
 	b	.L1628
+.LVL1855:
 .L1631:
-	ldr	r3, .L1665+40
+	.loc 4 710 0
+	ldr	r3, .L1665+36
 	ldrh	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L1665+4
+	str	r3, [sp, #12]
+.LVL1856:
+	.loc 4 712 0
+	ldr	r3, [sp, #16]
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbnz	r3, .L1648
-	ldr	r3, [sp, #8]
+	.loc 4 711 0
+	ldr	r3, [sp, #12]
+	.loc 4 709 0
 	movs	r6, #1
-	lsr	r10, r3, #2
+	.loc 4 711 0
+	lsrs	r3, r3, #2
+	str	r3, [sp, #16]
 	b	.L1632
 .L1648:
+	.loc 4 709 0
 	movs	r6, #1
-	mov	r10, r6
+	.loc 4 713 0
+	str	r6, [sp, #16]
 	b	.L1632
+.LVL1857:
 .L1636:
+	.loc 4 720 0
+	uxth	r2, fp
 	movs	r3, #36
-	ldr	r1, [sp, #4]
-	mul	r2, r3, r8
-	movs	r3, #0
-	str	r3, [fp, r2]
-	ldr	r3, .L1665+36
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	ldr	r0, [r8]
+	movs	r7, #0
+	mul	r1, r3, r2
+	.loc 4 721 0
+	ldr	r3, .L1665+24
+	.loc 4 720 0
+	str	r7, [r0, r1]
+	.loc 4 721 0
+	ldr	r1, [sp, #8]
+	ldrb	r0, [r3, r2]	@ zero_extendqisi2
 	bl	V2P_block
-	ldr	r3, [sp]
-	str	r0, [sp, #12]
+.LVL1858:
+	.loc 4 722 0
+	ldr	r3, [sp, #4]
+	.loc 4 721 0
+	mov	r7, r0
+.LVL1859:
+	.loc 4 722 0
 	cbz	r3, .L1634
+	.loc 4 723 0
 	bl	IsBlkInVendorPart
+.LVL1860:
 	cbnz	r0, .L1635
 .L1634:
-	ldr	r0, [sp, #12]
+	.loc 4 726 0
+	mov	r0, r7
 	bl	FtlBbmIsBadBlock
+.LVL1861:
 	cbnz	r0, .L1635
+	.loc 4 727 0
+	ldr	r2, [r8]
 	movs	r3, #36
-	mla	r1, r3, r5, fp
-	ldr	r3, [sp, #12]
-	add	r2, r7, r3, lsl #10
-	ldr	r3, [sp, #16]
-	str	r2, [r1, #4]
-	str	r3, [r1, #8]
-	ldr	r3, [sp, #24]
-	mul	r2, r3, r5
-	ldr	r3, [sp, #20]
+	add	r7, r10, r7, lsl #10
+	mla	r2, r3, r5, r2
+	.loc 4 728 0
+	ldr	r3, .L1665+40
+	ldr	r1, [r3]
+	.loc 4 729 0
+	ldr	r3, .L1665+28
+	.loc 4 727 0
+	str	r7, [r2, #4]
+	.loc 4 728 0
+	str	r1, [r2, #8]
+	.loc 4 729 0
+	ldrh	r1, [r3]
+	ldr	r3, .L1665+44
+	muls	r1, r5, r1
+	ldr	r0, [r3]
+	.loc 4 730 0
 	adds	r5, r5, #1
+.LVL1862:
 	uxth	r5, r5
-	bic	r2, r2, #3
-	add	r2, r2, r3
-	str	r2, [r1, #12]
+.LVL1863:
+	.loc 4 729 0
+	bic	r1, r1, #3
+	add	r1, r1, r0
+	str	r1, [r2, #12]
 .L1635:
-	add	r8, r8, #1
+.LVL1864:
+	add	fp, fp, #1
+.LVL1865:
 	b	.L1633
+.LVL1866:
 .L1640:
-	mul	r2, r3, r8
-	ldr	r1, [fp]
-	add	ip, r1, r2
-	ldr	r2, [r1, r2]
-	cbz	r2, .L1639
-	ldr	r0, [ip, #4]
+	.loc 4 742 0
+	mul	r3, fp, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbz	r3, .L1639
+	.loc 4 744 0
+	ldr	r0, [r1, #4]
+	.loc 4 743 0
 	adds	r4, r4, #1
-	str	r3, [sp, #12]
+.LVL1867:
 	uxth	r4, r4
+.LVL1868:
+	.loc 4 744 0
 	ubfx	r0, r0, #10, #16
 	bl	FtlBbmMapBadBlock
-	ldr	r3, [sp, #12]
+.LVL1869:
 .L1639:
-	add	r8, r8, #1
+	adds	r7, r7, #1
+.LVL1870:
 	b	.L1638
+.LVL1871:
 .L1644:
-	ldr	r3, [sp]
+	.loc 4 755 0
+	ldr	r3, [sp, #4]
 	cbz	r3, .L1643
+	.loc 4 755 0 is_stmt 0 discriminator 1
 	mul	r3, r10, r7
 	ldr	r2, [r8]
 	adds	r1, r2, r3
 	ldr	r3, [r2, r3]
 	cbnz	r3, .L1643
+	.loc 4 756 0 is_stmt 1
 	ldr	r0, [r1, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
+.LVL1872:
 .L1643:
 	adds	r7, r7, #1
+.LVL1873:
 	b	.L1642
+.LVL1874:
 .L1647:
+	.loc 4 664 0
 	movs	r4, #0
 	b	.L1620
 .L1666:
 	.align	2
 .L1665:
-	.word	.LANCHOR75
-	.word	.LANCHOR8
 	.word	.LANCHOR76
-	.word	.LANCHOR72
-	.word	.LANCHOR36
+	.word	.LANCHOR27
+	.word	.LANCHOR77
+	.word	.LANCHOR8
+	.word	.LANCHOR73
+	.word	.LANCHOR37
+	.word	.LANCHOR46
+	.word	.LANCHOR58
 	.word	.LANCHOR186
-	.word	.LANCHOR57
+	.word	.LANCHOR53
 	.word	.LANCHOR183
 	.word	.LANCHOR184
-	.word	.LANCHOR45
-	.word	.LANCHOR52
+	.cfi_endproc
+.LFE300:
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -11479,167 +19077,283 @@ FtlLowFormatEraseBlock:
 	.fpu softvfp
 	.type	FtlBbmTblFlush, %function
 FtlBbmTblFlush:
+.LFB320:
+	.loc 5 104 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1875:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 111 0
 	ldr	r3, .L1678
 	ldr	r4, [r3]
 	str	r3, [sp, #12]
 	cmp	r4, #0
 	bne	.L1669
+.LBB426:
+.LBB427:
+	.loc 5 114 0
 	ldr	r3, .L1678+4
+	.loc 5 115 0
 	mov	r1, r4
+	.loc 5 113 0
 	ldr	r7, .L1678+8
 	ldr	r5, .L1678+12
+	.loc 5 114 0
 	ldr	r3, [r3]
+	.loc 5 113 0
 	ldr	r0, [r7]
 	mov	r8, r7
 	ldr	r6, .L1678+16
+	.loc 5 114 0
 	str	r3, [r5, #12]
+	.loc 5 117 0
 	ldr	r7, .L1678+20
+	.loc 5 115 0
 	ldr	r3, .L1678+24
+	.loc 5 118 0
 	ldr	r10, .L1678+56
+	.loc 5 113 0
 	str	r0, [r5, #8]
+	.loc 5 115 0
 	ldrh	r2, [r3]
 	bl	ftl_memset
+.LVL1876:
 .L1670:
+	.loc 5 117 0
 	ldrh	r3, [r7]
 	cmp	r4, r3
 	blt	.L1671
+	.loc 5 120 0
 	ldr	r6, [r5, #12]
+.LVL1877:
+	.loc 5 121 0
 	movs	r2, #16
+	.loc 5 124 0
 	ldr	r4, .L1678+28
+.LVL1878:
+	.loc 5 121 0
 	movs	r1, #255
+	.loc 5 108 0
 	movs	r7, #0
+	.loc 5 121 0
 	mov	r0, r6
 	bl	ftl_memset
+.LVL1879:
+	.loc 5 123 0
 	movw	r3, #61649
 	mov	r10, r4
 	strh	r3, [r6]	@ movhi
+	.loc 5 124 0
 	ldr	r3, [r4, #8]
+	.loc 5 106 0
 	str	r7, [sp, #8]
+	.loc 5 124 0
 	str	r3, [r6, #4]
+	.loc 5 125 0
 	ldrh	r3, [r4]
 	strh	r3, [r6, #2]	@ movhi
+	.loc 5 126 0
 	ldrh	r3, [r4, #4]
 	strh	r3, [r6, #8]	@ movhi
+	.loc 5 127 0
 	ldrh	r3, [r4, #6]
 	strh	r3, [r6, #10]	@ movhi
+	.loc 5 128 0
 	ldr	r3, .L1678+32
 	ldr	r3, [r3]
 	strh	r3, [r6, #12]	@ movhi
 .L1672:
+.LVL1880:
+	.loc 5 130 0
 	ldr	r3, [r8]
+	.loc 5 132 0
 	mov	fp, #0
+	.loc 5 133 0
 	ldrh	r1, [r4]
 	ldrh	r2, [r4, #2]
+	.loc 5 130 0
 	str	r3, [r5, #8]
+	.loc 5 131 0
 	ldr	r3, .L1678+4
-	ldrh	r0, [r6, #10]
+	.loc 5 132 0
 	str	fp, [r5]
+	.loc 5 131 0
 	ldr	r3, [r3]
 	str	r3, [r5, #12]
+	.loc 5 133 0
 	orr	r3, r2, r1, lsl #10
+	.loc 5 134 0
+	ldrh	r0, [r6, #10]
+	.loc 5 133 0
 	str	r3, [r5, #4]
+	.loc 5 134 0
 	ldrh	r3, [r4, #4]
 	str	r0, [sp]
 	ldr	r0, .L1678+36
 	bl	printf
+.LVL1881:
+	.loc 5 135 0
 	movs	r3, #1
 	ldr	r0, .L1678+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL1882:
+	.loc 5 136 0
 	ldr	r3, .L1678+40
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	blt	.L1673
+	.loc 5 139 0
 	ldr	r3, [r4, #8]
+	.loc 5 141 0
 	ldrh	r2, [r4]
+	.loc 5 143 0
 	strh	fp, [r4, #2]	@ movhi
+	.loc 5 139 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
+	.loc 5 140 0
 	str	r3, [r6, #4]
+	.loc 5 141 0
 	strh	r2, [r6, #8]	@ movhi
+	.loc 5 142 0
 	ldrh	r3, [r4, #4]
+	.loc 5 144 0
 	strh	r2, [r4, #4]	@ movhi
+	.loc 5 147 0
 	ldr	r2, .L1678+44
+	.loc 5 142 0
 	strh	r3, [r4]	@ movhi
+	.loc 5 145 0
 	lsls	r3, r3, #10
+	.loc 5 147 0
 	ldr	r0, [r2]
+	.loc 5 148 0
 	movs	r2, #1
+	.loc 5 145 0
 	str	r3, [r5, #4]
+	.loc 5 148 0
 	mov	r1, r2
+	.loc 5 147 0
 	str	r3, [r0, #4]
+	.loc 5 148 0
 	bl	FlashEraseBlocks
+.LVL1883:
+	.loc 5 149 0
 	movs	r3, #1
 	ldr	r0, .L1678+12
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL1884:
 .L1673:
+	.loc 5 157 0
 	ldrh	r3, [r10, #2]
 	adds	r3, r3, #1
 	strh	r3, [r10, #2]	@ movhi
+	.loc 5 158 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L1674
+	.loc 5 161 0
 	adds	r7, r7, #1
+.LVL1885:
+	.loc 5 160 0
 	ldr	r1, [r5, #4]
+	.loc 5 161 0
 	uxth	r7, r7
+	.loc 5 160 0
 	ldr	r0, .L1678+48
 	bl	printf
+.LVL1886:
+	.loc 5 162 0
 	cmp	r7, #3
 	bls	.L1672
+	.loc 5 163 0
 	mov	r2, r7
 	ldr	r1, [r5, #4]
 	ldr	r0, .L1678+52
 	bl	printf
+.LVL1887:
+	.loc 5 165 0
 	ldr	r2, [sp, #12]
 	movs	r3, #1
 	str	r3, [r2]
+.LVL1888:
 .L1669:
+.LBE427:
+.LBE426:
+	.loc 5 179 0
 	movs	r0, #0
 	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1889:
 .L1671:
+	.cfi_restore_state
+.LBB429:
+.LBB428:
+	.loc 5 118 0
 	ldrh	r2, [r10]
 	ldr	r3, [r5, #8]
 	ldr	r1, [r6, #4]!
 	mul	r0, r4, r2
 	lsls	r2, r2, #2
+	.loc 5 117 0
 	adds	r4, r4, #1
+.LVL1890:
+	.loc 5 118 0
 	add	r0, r3, r0, lsl #2
 	bl	ftl_memcpy
+.LVL1891:
 	b	.L1670
+.LVL1892:
 .L1674:
+	.loc 5 172 0
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
 	bne	.L1669
 	movs	r3, #1
 	str	r3, [sp, #8]
+.LVL1893:
 	b	.L1672
 .L1679:
 	.align	2
 .L1678:
-	.word	.LANCHOR75
+	.word	.LANCHOR76
 	.word	.LANCHOR185
-	.word	.LANCHOR79
+	.word	.LANCHOR180
 	.word	.LANCHOR199
-	.word	.LANCHOR73+24
-	.word	.LANCHOR43
-	.word	.LANCHOR56
-	.word	.LANCHOR73
-	.word	.LANCHOR35
-	.word	.LC28
-	.word	.LANCHOR52
-	.word	.LANCHOR76
-	.word	.LC29
-	.word	.LC30
+	.word	.LANCHOR74+24
+	.word	.LANCHOR44
+	.word	.LANCHOR57
+	.word	.LANCHOR74
+	.word	.LANCHOR36
+	.word	.LC31
+	.word	.LANCHOR53
+	.word	.LANCHOR77
+	.word	.LC32
+	.word	.LC33
 	.word	.LANCHOR120
+.LBE428:
+.LBE429:
+	.cfi_endproc
+.LFE320:
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
@@ -11650,16 +19364,37 @@ FtlBbmTblFlush:
 	.fpu softvfp
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 16
+.LFB386:
+	.loc 1 2852 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r4, r0
+.LVL1894:
+	.loc 1 2858 0
 	ldr	r3, .L1743
+	.loc 1 2852 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 2852 0
+	mov	r4, r0
+	.loc 1 2858 0
 	ldr	r3, [r3]
 	cmp	r3, #0
 	bne	.L1682
 	ldr	r7, .L1743+4
+.LVL1895:
 .L1681:
+.LBB434:
+.LBB435:
+	.loc 1 2861 0
 	ldr	r3, .L1743+4
 	ldr	r6, .L1743+8
 	ldrh	r3, [r3]
@@ -11670,17 +19405,21 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1683
 	ldr	r1, .L1743+16
-	movw	r2, #2822
+	movw	r2, #2861
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1896:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1897:
 .L1683:
+	.loc 1 2863 0
 	ldr	r3, .L1743+32
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
 	bne	.L1684
+	.loc 1 2864 0
 	ldr	r3, .L1743+36
 	ldrh	r5, [r7]
 	ldr	r3, [r3]
@@ -11688,8 +19427,12 @@ allocate_data_superblock:
 	mul	ip, r3, r5
 	adds	r1, r0, #1
 	add	r1, r1, ip, lsr #2
+	.loc 1 2865 0
 	ldr	ip, .L1743+48
+	.loc 1 2864 0
 	uxth	r1, r1
+.LVL1898:
+	.loc 1 2865 0
 	ldr	ip, [ip]
 	cmp	ip, #0
 	beq	.L1685
@@ -11697,6 +19440,7 @@ allocate_data_superblock:
 	ldr	ip, [ip]
 	cmp	ip, #29
 	bhi	.L1685
+	.loc 1 2866 0
 	cmp	ip, #2
 	bls	.L1718
 	lsls	r5, r5, #31
@@ -11704,9 +19448,13 @@ allocate_data_superblock:
 	cmp	r3, #0
 	beq	.L1718
 .L1714:
+	.loc 1 2869 0
 	mov	r1, r0
+.LVL1899:
 	b	.L1685
+.LVL1900:
 .L1684:
+	.loc 1 2873 0
 	cmp	r2, #1
 	bne	.L1718
 	ldr	r3, .L1743+40
@@ -11717,49 +19465,74 @@ allocate_data_superblock:
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
 	bne	.L1718
+	.loc 1 2875 0
 	ldr	r0, .L1743+48
+	.loc 1 2874 0
 	ldrh	r3, [r7]
+	.loc 1 2875 0
 	ldr	r0, [r0]
+	.loc 1 2874 0
 	lsrs	r1, r3, #3
+.LVL1901:
+	.loc 1 2875 0
 	cbz	r0, .L1685
 	ldr	r0, .L1743+52
 	ldr	r0, [r0]
 	cmp	r0, #1
 	bhi	.L1685
+	.loc 1 2876 0
 	rsb	r3, r3, r3, lsl #3
 	ubfx	r1, r3, #3, #16
+.LVL1902:
 .L1685:
+	.loc 1 2879 0
 	cbz	r1, .L1686
+	.loc 1 2880 0
 	subs	r1, r1, #1
+.LVL1903:
 	uxth	r1, r1
+.LVL1904:
 .L1686:
+	.loc 1 2881 0
 	ldr	r0, .L1743+56
 	bl	List_pop_index_node
+.LVL1905:
 	ldrh	r3, [r7]
 	mov	r5, r0
 	uxth	r8, r0
+.LVL1906:
 	cbnz	r3, .L1687
 	ldr	r1, .L1743+16
-	movw	r2, #2842
+	movw	r2, #2881
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1907:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1908:
 .L1687:
 	ldrh	r3, [r7]
+	.loc 1 2886 0
 	mov	r0, r4
+	.loc 1 2881 0
 	subs	r3, r3, #1
 	strh	r3, [r7]	@ movhi
+	.loc 1 2885 0
 	strh	r8, [r4]	@ movhi
+	.loc 1 2886 0
 	bl	make_superblock
+.LVL1909:
+	.loc 1 2887 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1688
+	.loc 1 2891 0
 	ldr	r3, .L1743+60
 	uxth	r5, r5
 	movw	r2, #65535
 	ldr	r3, [r3]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
+	.loc 1 2893 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
@@ -11767,18 +19540,24 @@ allocate_data_superblock:
 	ldrh	r2, [r2]
 	cmp	r3, r2
 	ble	.L1681
-	movw	r2, #2854
+	movw	r2, #2893
 	ldr	r1, .L1743+16
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1910:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1911:
 	b	.L1681
+.LVL1912:
 .L1718:
+	.loc 1 2873 0
 	movs	r1, #0
 	b	.L1686
+.LVL1913:
 .L1688:
+	.loc 1 2896 0
 	ldrh	r2, [r6]
 	ldrh	r3, [r7]
 	add	r3, r3, r2
@@ -11787,155 +19566,210 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1690
 	ldr	r1, .L1743+16
-	movw	r2, #2857
+	mov	r2, #2896
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1914:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1915:
 .L1690:
+	.loc 1 2899 0
 	ldr	r2, .L1743+64
+	.loc 1 2900 0
 	movs	r6, #0
-	ldr	fp, .L1743+100
+	ldr	r10, .L1743+104
 	add	ip, r4, #16
 	mov	lr, r6
-	movw	r10, #65535
 	ldrh	r1, [r2]
 	movs	r2, #36
-	ldr	r0, [fp]
-	str	r2, [sp, #4]
+	ldr	r0, [r10]
 	mov	r3, r0
 	mla	r1, r2, r1, r0
 	str	r1, [sp]
 .L1691:
-	ldr	r2, [sp]
-	cmp	r2, r3
+.LVL1916:
+	.loc 1 2899 0
+	ldr	r1, [sp]
+	cmp	r1, r3
 	bne	.L1693
+	.loc 1 2908 0
 	cbnz	r6, .L1694
 	ldr	r1, .L1743+16
-	movw	r2, #2869
+	movw	r2, #2908
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1917:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1918:
 .L1694:
+	.loc 1 2910 0
 	ldr	r3, .L1743+48
 	uxth	r5, r5
-	ldr	r10, .L1743+104
+	ldr	fp, .L1743+108
 	ldr	r3, [r3]
 	cbz	r3, .L1695
 	ldr	r3, .L1743+68
 	cmp	r4, r3
 	bne	.L1695
-	ldr	r3, [r10]
+	.loc 1 2911 0
+	ldr	r3, [fp]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #30
+	.loc 1 2912 0
 	itt	hi
 	movhi	r3, #0
 	strbhi	r3, [r4, #8]
 .L1695:
+	.loc 1 2915 0
 	ldr	r3, .L1743+72
 	ldrh	r3, [r3]
 	cmp	r3, r8
 	bne	.L1696
 	ldr	r1, .L1743+16
-	movw	r2, #2876
+	movw	r2, #2915
 	ldr	r0, .L1743+20
 	bl	printf
+.LVL1919:
 	ldr	r1, .L1743+24
 	ldr	r0, .L1743+28
 	bl	printf
+.LVL1920:
 .L1696:
+	.loc 1 2916 0
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	ldr	r2, .L1743+76
 	ldr	r3, .L1743+80
 	cmp	r1, #0
 	bne	.L1697
-	ldr	r0, [r10]
+	.loc 1 2917 0
+	ldr	r0, [fp]
 	ldrh	lr, [r0, r5, lsl #1]
 	cmp	lr, #0
 	beq	.L1698
+	.loc 1 2918 0
 	ldr	r1, .L1743+84
 	ldrh	ip, [r1]
 	add	r1, lr, ip
 .L1741:
+	.loc 1 2920 0
 	strh	r1, [r0, r5, lsl #1]	@ movhi
+	.loc 1 2922 0
 	mov	r0, r8
+	.loc 1 2921 0
 	ldr	r1, [r2]
 	str	r3, [sp, #4]
 	str	r2, [sp]
 	adds	r1, r1, #1
 	str	r1, [r2]
+	.loc 1 2922 0
 	movs	r1, #0
 	bl	ftl_set_blk_mode
+.LVL1921:
 	ldm	sp, {r2, r3}
 .L1700:
-	lsls	r1, r5, #1
+	.loc 1 2929 0
+	ldr	r1, [fp]
+	.loc 1 2932 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
-	str	r1, [sp]
-	ldr	r1, [r10]
+	.loc 1 2929 0
 	ldrh	ip, [r1, r5, lsl #1]
 	ldr	r1, .L1743+88
 	ldr	r0, [r1]
 	cmp	ip, r0
+	.loc 1 2930 0
 	it	hi
 	strhi	ip, [r1]
+	.loc 1 2932 0
 	ldr	r1, .L1743+84
 	ldrh	r0, [r1]
 	ldr	r1, .L1743+12
 	mla	r0, r2, r0, r3
 	ldrh	r1, [r1]
 	bl	__aeabi_uidiv
+.LVL1922:
 	ldr	r3, .L1743+92
-	ldr	ip, .L1743+108
 	str	r0, [r3]
+	.loc 1 2933 0
 	ldr	r3, .L1743+96
-	ldr	r0, [fp]
+	.loc 1 2936 0
+	ldr	r0, .L1743+100
+	.loc 1 2933 0
 	ldr	r2, [r3]
-	adds	r1, r0, #4
 	ldr	r3, [r2, #16]
 	adds	r3, r3, #1
 	str	r3, [r2, #16]
+.LVL1923:
 	movs	r3, #36
-	mla	r3, r3, r6, r0
+	.loc 1 2936 0
+	ldr	r2, [r10]
+	adds	r1, r2, #4
+	mla	r3, r3, r6, r2
 	adds	r3, r3, #40
+.LVL1924:
 .L1702:
 	adds	r1, r1, #36
+	.loc 1 2935 0
 	cmp	r3, r1
 	bne	.L1703
+	.loc 1 2937 0
 	ldr	r3, .L1743+44
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L1704
+	.loc 1 2938 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	.loc 1 2939 0
 	mov	r2, r6
+	.loc 1 2941 0
+	ldr	r0, [r10]
+	.loc 1 2938 0
 	cmp	r3, #1
+	.loc 1 2939 0
 	ite	eq
 	moveq	r1, #0
+	.loc 1 2941 0
 	movne	r1, #1
 	bl	FlashEraseBlocks
+.LVL1925:
 .L1704:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	.loc 1 2943 0
 	mov	r2, r6
-	ldr	r0, [fp]
+	ldr	r0, [r10]
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r10, #0
 	bl	FlashEraseBlocks
-	mov	r3, r10
-	movs	r1, #36
+.LVL1926:
+	.loc 1 2944 0
+	mov	fp, r10
+	.loc 1 2946 0
+	movs	r2, #36
+.LVL1927:
 .L1706:
-	uxth	r2, r10
-	cmp	r6, r2
+	.loc 1 2945 0
+	uxth	r3, r10
+	cmp	r6, r3
 	bhi	.L1708
-	cbz	r3, .L1709
+	.loc 1 2956 0
+	cmp	fp, #0
+	beq	.L1709
+	.loc 1 2957 0
 	mov	r0, r8
 	bl	update_multiplier_value
+.LVL1928:
+	.loc 1 2958 0
 	bl	FtlBbmTblFlush
+.LVL1929:
 .L1709:
+	.loc 1 2961 0
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
 	ldr	r1, .L1743+60
 	cmp	r2, #0
 	bne	.L1710
+	.loc 1 2963 0
 	ldr	r3, [r1]
 	movw	r2, #65535
 	strh	r2, [r3, r5, lsl #1]	@ movhi
@@ -11943,143 +19777,205 @@ allocate_data_superblock:
 .L1744:
 	.align	2
 .L1743:
-	.word	.LANCHOR75
-	.word	.LANCHOR87
-	.word	.LANCHOR84
-	.word	.LANCHOR38
+	.word	.LANCHOR76
+	.word	.LANCHOR88
+	.word	.LANCHOR85
+	.word	.LANCHOR39
 	.word	.LANCHOR200
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR92
-	.word	.LANCHOR170
-	.word	.LANCHOR42
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR93
+	.word	.LANCHOR169
+	.word	.LANCHOR43
 	.word	.LANCHOR8
-	.word	.LANCHOR101
-	.word	.LANCHOR168
-	.word	.LANCHOR86
-	.word	.LANCHOR82
-	.word	.LANCHOR36
-	.word	.LANCHOR90
+	.word	.LANCHOR28
+	.word	.LANCHOR167
+	.word	.LANCHOR87
+	.word	.LANCHOR83
+	.word	.LANCHOR37
+	.word	.LANCHOR91
 	.word	.LANCHOR201
+	.word	.LANCHOR164
 	.word	.LANCHOR165
+	.word	.LANCHOR47
 	.word	.LANCHOR166
-	.word	.LANCHOR46
-	.word	.LANCHOR167
 	.word	.LANCHOR202
 	.word	.LANCHOR188
-	.word	.LANCHOR76
-	.word	.LANCHOR77
 	.word	-1024
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+.LVL1930:
 .L1693:
-	ldrh	r1, [ip], #2
+	.loc 1 2900 0
 	str	lr, [r3, #8]
+	.loc 1 2903 0
+	movw	fp, #65535
+	.loc 1 2901 0
 	str	lr, [r3, #12]
-	cmp	r1, r10
+	.loc 1 2903 0
+	ldrh	r1, [ip], #2
+	cmp	r1, fp
 	beq	.L1692
-	ldr	r2, [sp, #4]
-	lsls	r1, r1, #10
-	mla	r2, r2, r6, r0
+	.loc 1 2904 0
+	mla	fp, r2, r6, r0
+	.loc 1 2905 0
 	adds	r6, r6, #1
+.LVL1931:
+	.loc 1 2904 0
+	lsls	r1, r1, #10
+	.loc 1 2905 0
 	uxth	r6, r6
-	str	r1, [r2, #4]
+.LVL1932:
+	.loc 1 2904 0
+	str	r1, [fp, #4]
 .L1692:
 	adds	r3, r3, #36
 	b	.L1691
 .L1698:
+	.loc 1 2920 0
 	movs	r1, #2
 	b	.L1741
 .L1697:
-	ldr	r0, [r10]
+	.loc 1 2924 0
+	ldr	r0, [fp]
 	str	r2, [sp, #4]
+	.loc 1 2925 0
 	str	r3, [sp]
+.LVL1933:
+	.loc 1 2924 0
 	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
 	strh	r1, [r0, r5, lsl #1]	@ movhi
+.LBB436:
+.LBB437:
 	mov	r0, r8
+.LBE437:
+.LBE436:
+	.loc 1 2925 0
 	ldr	r1, [r3]
 	adds	r1, r1, #1
 	str	r1, [r3]
-	bl	ftl_set_blk_mode.part.9
+.LBB439:
+.LBB438:
+	bl	ftl_set_blk_mode.part.10
+.LVL1934:
 	ldr	r2, [sp, #4]
 	ldr	r3, [sp]
 	b	.L1700
+.LVL1935:
 .L1703:
+.LBE438:
+.LBE439:
+	.loc 1 2936 0
 	ldr	r2, [r1, #-36]
-	and	r2, r2, ip
+	ands	r2, r2, r0
 	str	r2, [r1, #-36]
 	b	.L1702
+.LVL1936:
 .L1708:
-	ldr	r0, .L1745
-	mul	r2, r1, r10
-	ldr	r0, [r0]
-	add	ip, r0, r2
-	ldr	r2, [r0, r2]
-	adds	r0, r2, #1
+	.loc 1 2946 0
+	ldr	r1, .L1745
+	mul	r3, r2, r10
+	ldr	r1, [r1]
+	adds	r0, r1, r3
+	ldr	r3, [r1, r3]
+	adds	r1, r3, #1
 	bne	.L1707
-	ldr	r0, [ip, #4]
-	adds	r3, r3, #1
-	str	r1, [sp, #12]
-	str	r2, [sp, #8]
+	.loc 1 2948 0
+	ldr	r0, [r0, #4]
+	.loc 1 2947 0
+	add	fp, fp, #1
+.LVL1937:
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	.loc 1 2949 0
 	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
-	ldr	r2, [sp, #8]
-	add	r0, r4, r10, lsl #1
-	ldr	r1, [sp, #12]
-	ldr	r3, [sp, #4]
-	strh	r2, [r0, #16]	@ movhi
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	subs	r2, r2, #1
-	strb	r2, [r4, #7]
+.LVL1938:
+	.loc 1 2950 0
+	ldr	r3, [sp]
+	add	r1, r4, r10, lsl #1
+	.loc 1 2951 0
+	ldr	r2, [sp, #4]
+	.loc 1 2950 0
+	strh	r3, [r1, #16]	@ movhi
+	.loc 1 2951 0
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r4, #7]
 .L1707:
+.LVL1939:
 	add	r10, r10, #1
+.LVL1940:
 	b	.L1706
+.LVL1941:
 .L1710:
+	.loc 1 2968 0
 	ldr	r3, .L1745+4
+	.loc 1 2972 0
 	ldr	r0, .L1745+8
+	.loc 1 2968 0
 	ldrh	r3, [r3]
+	.loc 1 2969 0
 	strh	r8, [r4]	@ movhi
+	.loc 1 2968 0
 	smulbb	r3, r3, r2
+	.loc 1 2970 0
 	movs	r2, #0
 	strh	r2, [r4, #2]	@ movhi
+	.loc 1 2971 0
 	strb	r2, [r4, #6]
+	.loc 1 2972 0
 	ldr	r2, [r0]
+	.loc 1 2968 0
 	uxth	r3, r3
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2972 0
 	str	r2, [r4, #12]
 	adds	r2, r2, #1
 	str	r2, [r0]
+	.loc 1 2973 0
 	ldr	r2, [r1]
-	ldr	r1, [sp]
-	strh	r3, [r2, r1]	@ movhi
+	ldrh	r0, [r4]
+	strh	r3, [r2, r0, lsl #1]	@ movhi
+	.loc 1 2974 0
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1711
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cbnz	r3, .L1682
 .L1711:
 	ldr	r1, .L1745+12
-	movw	r2, #2935
+	movw	r2, #2974
 	ldr	r0, .L1745+16
 	bl	printf
+.LVL1942:
 	ldr	r1, .L1745+20
 	ldr	r0, .L1745+24
 	bl	printf
+.LVL1943:
 .L1682:
+.LBE435:
+.LBE434:
+	.loc 1 2976 0
 	movs	r0, #0
-	add	sp, sp, #16
+	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1944:
 .L1746:
 	.align	2
 .L1745:
-	.word	.LANCHOR76
-	.word	.LANCHOR51
-	.word	.LANCHOR157
+	.word	.LANCHOR77
+	.word	.LANCHOR52
+	.word	.LANCHOR156
 	.word	.LANCHOR200
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.cfi_endproc
+.LFE386:
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -12090,75 +19986,138 @@ allocate_data_superblock:
 	.fpu softvfp
 	.type	FtlGcFreeBadSuperBlk, %function
 FtlGcFreeBadSuperBlk:
+.LFB406:
+	.loc 6 438 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1945:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 438 0
 	mov	r10, r0
+	.loc 6 443 0
 	ldr	r4, .L1759
 	ldrh	r3, [r4]
 	cbz	r3, .L1748
+.LBB442:
+.LBB443:
+	.loc 6 447 0
 	ldr	r8, .L1759+12
+.LBE443:
+.LBE442:
 	movs	r7, #0
+.LVL1946:
 .L1749:
+.LBB446:
+.LBB444:
+	.loc 6 444 0
 	ldr	r3, .L1759+4
 	ldrh	r2, [r3]
 	uxth	r3, r7
 	cmp	r2, r3
 	bhi	.L1755
+	.loc 6 460 0
 	bl	FtlGcReFreshBadBlk
+.LVL1947:
 .L1748:
+.LBE444:
+.LBE446:
+	.loc 6 477 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL1948:
 .L1755:
+	.cfi_restore_state
+.LBB447:
+.LBB445:
+	.loc 6 445 0
 	ldr	r2, .L1759+8
 	uxth	r3, r7
 	mov	r1, r10
 	mov	fp, #0
 	ldrb	r0, [r2, r3]	@ zero_extendqisi2
 	bl	V2P_block
+.LVL1949:
 	mov	r1, r0
+.LVL1950:
 .L1750:
+	.loc 6 446 0
 	ldrh	r3, [r4]
 	uxth	r5, fp
+.LVL1951:
 	cmp	r3, r5
 	bhi	.L1754
+.LVL1952:
 	adds	r7, r7, #1
+.LVL1953:
 	b	.L1749
+.LVL1954:
 .L1754:
+	.loc 6 447 0
 	uxth	r6, fp
 	ldrh	r3, [r8, r6, lsl #1]
 	cmp	r3, r1
 	bne	.L1751
+	.loc 6 451 0
 	mov	r0, r1
 	str	r1, [sp, #4]
 	bl	FtlBbmMapBadBlock
+.LVL1955:
+	.loc 6 452 0
 	bl	FtlBbmTblFlush
+.LVL1956:
+	.loc 6 453 0
 	ldrh	r2, [r4]
 	add	r3, r8, r6, lsl #1
 	ldr	r1, [sp, #4]
+.LVL1957:
 .L1752:
 	cmp	r5, r2
 	bcc	.L1753
+	.loc 6 455 0
 	subs	r2, r2, #1
 	strh	r2, [r4]	@ movhi
+.LVL1958:
 .L1751:
 	add	fp, fp, #1
+.LVL1959:
 	b	.L1750
+.LVL1960:
 .L1753:
+	.loc 6 454 0
 	ldrh	r0, [r3, #2]!
+	.loc 6 453 0
 	adds	r5, r5, #1
+.LVL1961:
 	uxth	r5, r5
+.LVL1962:
+	.loc 6 454 0
 	strh	r0, [r3, #-2]	@ movhi
 	b	.L1752
 .L1760:
 	.align	2
 .L1759:
 	.word	.LANCHOR114
-	.word	.LANCHOR36
-	.word	.LANCHOR45
+	.word	.LANCHOR37
+	.word	.LANCHOR46
 	.word	.LANCHOR115
+.LBE445:
+.LBE447:
+	.cfi_endproc
+.LFE406:
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -12169,43 +20128,71 @@ FtlGcFreeBadSuperBlk:
 	.fpu softvfp
 	.type	update_vpc_list, %function
 update_vpc_list:
+.LFB389:
+	.loc 1 3076 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1963:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 3076 0
 	mov	r4, r0
+	.loc 1 3077 0
 	ldr	r3, .L1771
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
 	bne	.L1762
+	.loc 1 3078 0
 	ldr	r2, .L1771+4
 	ldrh	r1, [r2]
 	cmp	r1, r0
 	bne	.L1763
+	.loc 1 3080 0
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
 .L1764:
+.LVL1964:
+.LBB450:
+.LBB451:
+	.loc 1 3085 0
 	ldr	r5, .L1771+8
 	mov	r1, r4
 	ldr	r0, .L1771+12
+.LVL1965:
 	bl	List_remove_node
+.LVL1966:
 	ldrh	r3, [r5]
 	cbnz	r3, .L1766
 	ldr	r1, .L1771+16
-	movw	r2, #3046
+	movw	r2, #3085
 	ldr	r0, .L1771+20
 	bl	printf
+.LVL1967:
 	ldr	r1, .L1771+24
 	ldr	r0, .L1771+28
 	bl	printf
+.LVL1968:
 .L1766:
 	ldrh	r3, [r5]
+	.loc 1 3086 0
 	mov	r0, r4
+	.loc 1 3085 0
 	subs	r3, r3, #1
 	strh	r3, [r5]	@ movhi
+	.loc 1 3086 0
 	bl	free_data_superblock
+.LVL1969:
+	.loc 1 3087 0
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
+.LVL1970:
+	.loc 1 3088 0
 	ldr	r3, .L1771+32
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
@@ -12215,51 +20202,67 @@ update_vpc_list:
 	cmp	r3, r2
 	ble	.L1770
 	ldr	r1, .L1771+16
-	movw	r2, #3049
+	mov	r2, #3088
 	ldr	r0, .L1771+20
 	bl	printf
+.LVL1971:
 	ldr	r1, .L1771+24
 	ldr	r0, .L1771+28
 	bl	printf
+.LVL1972:
 .L1770:
 	movs	r3, #1
 	b	.L1761
+.LVL1973:
 .L1763:
+.LBE451:
+.LBE450:
+	.loc 1 3081 0
 	ldr	r2, .L1771+40
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1761
+	.loc 1 3081 0 is_stmt 0 discriminator 1
 	ldr	r2, .L1771+44
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	beq	.L1761
+	.loc 1 3081 0 discriminator 2
 	ldr	r2, .L1771+48
 	ldrh	r2, [r2]
 	cmp	r2, r0
 	bne	.L1764
+.LVL1974:
 .L1761:
+	.loc 1 3094 0 is_stmt 1
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
+.LVL1975:
 .L1762:
+	.loc 1 3091 0
 	bl	List_update_data_list
+.LVL1976:
+	.loc 1 3093 0
 	movs	r3, #0
 	b	.L1761
 .L1772:
 	.align	2
 .L1771:
-	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.word	.LANCHOR201
-	.word	.LANCHOR84
-	.word	.LANCHOR81
+	.word	.LANCHOR85
+	.word	.LANCHOR82
 	.word	.LANCHOR203
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR87
-	.word	.LANCHOR38
-	.word	.LANCHOR90
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR88
+	.word	.LANCHOR39
 	.word	.LANCHOR91
 	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.cfi_endproc
+.LFE389:
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -12270,59 +20273,102 @@ update_vpc_list:
 	.fpu softvfp
 	.type	decrement_vpc_count, %function
 decrement_vpc_count:
+.LFB390:
+	.loc 1 3097 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL1977:
+	.loc 1 3100 0
 	movw	r3, #65535
+	.loc 1 3097 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 3100 0
 	cmp	r0, r3
+	.loc 1 3097 0
 	mov	r4, r0
+	.loc 1 3100 0
 	beq	.L1774
+	.loc 1 3101 0
 	ldr	r5, .L1782
 	ldr	r3, [r5]
 	ldrh	r2, [r3, r0, lsl #1]
 	cbnz	r2, .L1775
+	.loc 1 3102 0
 	mov	r1, r0
 	ldr	r0, .L1782+4
+.LVL1978:
 	bl	printf
+.LVL1979:
+	.loc 1 3103 0
 	ldr	r3, [r5]
 	ldrh	r5, [r3, r4, lsl #1]
 	cbz	r5, .L1776
 .L1780:
+	.loc 1 3118 0
 	movs	r5, #0
+.LVL1980:
 .L1773:
+	.loc 1 3128 0
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
+.LVL1981:
 .L1776:
-	movw	r2, #3064
+	.loc 1 3103 0 discriminator 1
+	movw	r2, #3103
+.LVL1982:
 .L1781:
+	.loc 1 3125 0 discriminator 2
 	ldr	r1, .L1782+8
 	ldr	r0, .L1782+12
 	bl	printf
+.LVL1983:
 	ldr	r1, .L1782+16
 	ldr	r0, .L1782+20
 	bl	printf
+.LVL1984:
 	b	.L1773
+.LVL1985:
 .L1775:
+	.loc 1 3112 0
 	subs	r2, r2, #1
 	strh	r2, [r3, r0, lsl #1]	@ movhi
 .L1774:
+	.loc 1 3116 0
 	ldr	r6, .L1782+24
 	movw	r3, #65535
 	ldrh	r0, [r6]
+.LVL1986:
 	cmp	r0, r3
 	bne	.L1778
+	.loc 1 3117 0
 	strh	r4, [r6]	@ movhi
 	b	.L1780
 .L1778:
+	.loc 1 3119 0
 	cmp	r4, r0
 	beq	.L1780
+	.loc 1 3122 0
 	bl	update_vpc_list
+.LVL1987:
+	.loc 1 3125 0
 	ldr	r3, .L1782+28
+	.loc 1 3122 0
 	adds	r5, r0, #0
+	.loc 1 3125 0
 	ldr	r2, .L1782+32
+	.loc 1 3122 0
 	it	ne
 	movne	r5, #1
+.LVL1988:
+	.loc 1 3124 0
 	strh	r4, [r6]	@ movhi
+	.loc 1 3125 0
 	ldr	r3, [r3]
 	ldr	r2, [r2]
 	subs	r3, r3, r2
@@ -12335,23 +20381,27 @@ decrement_vpc_count:
 	ldrh	r2, [r2, r1, lsl #1]
 	cmp	r2, #0
 	bne	.L1773
+	.loc 1 3125 0 is_stmt 0 discriminator 1
 	cmp	r4, r1
 	beq	.L1773
-	movw	r2, #3086
+	.loc 1 3125 0 discriminator 2
+	movw	r2, #3125
 	b	.L1781
 .L1783:
 	.align	2
 .L1782:
-	.word	.LANCHOR82
-	.word	.LC31
+	.word	.LANCHOR83
+	.word	.LC34
 	.word	.LANCHOR204
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR130
+	.word	.LANCHOR82
 	.word	.LANCHOR81
-	.word	.LANCHOR80
 	.word	-1431655765
+	.cfi_endproc
+.LFE390:
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -12362,76 +20412,125 @@ decrement_vpc_count:
 	.fpu softvfp
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
+.LFB373:
+	.loc 1 2278 0 is_stmt 1
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0, #4]
+.LVL1989:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 2278 0
 	mov	r4, r0
+	.loc 1 2281 0
+	ldrh	r3, [r0, #4]
 	cmp	r3, #0
 	beq	.L1784
+	.loc 1 2283 0
 	ldrh	r2, [r0]
 	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1784
+.LVL1990:
+.LBB454:
+.LBB455:
+	.loc 1 2285 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	ldr	r5, .L1795
+	.loc 1 2297 0
 	ldr	r6, .L1795+4
+	.loc 1 2285 0
 	adds	r3, r3, #8
 	ldrh	r3, [r0, r3, lsl #1]
+.LVL1991:
 .L1788:
+	.loc 1 2286 0
 	movw	r2, #65535
 	cmp	r3, r2
 	beq	.L1790
+	.loc 1 2296 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+.LVL1992:
 	cmp	r3, #1
 	bne	.L1791
 	ldrb	r1, [r5]	@ zero_extendqisi2
 	cbnz	r1, .L1791
+	.loc 1 2297 0
 	ldrh	r1, [r4, #2]
+	.loc 1 2296 0
 	ldrh	r1, [r6, r1, lsl #1]
 	cmp	r1, r2
 	bne	.L1791
+	.loc 1 2298 0
 	ldrh	r3, [r4, #4]
+	.loc 1 2299 0
 	ldrh	r0, [r4]
+	.loc 1 2298 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2299 0
 	bl	decrement_vpc_count
+.LVL1993:
+	.loc 1 2300 0
 	ldrh	r2, [r4, #4]
 	cbnz	r2, .L1790
+	.loc 1 2301 0
 	ldrh	r3, [r4, #2]
+	.loc 1 2302 0
 	strb	r2, [r4, #6]
+	.loc 1 2301 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r4, r5, r6, pc}
+.LVL1994:
 .L1790:
+.LDL2:
+	.loc 1 2288 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 2289 0
 	ldr	r2, .L1795+8
+	.loc 1 2288 0
 	adds	r3, r3, #1
+	.loc 1 2289 0
 	ldrh	r2, [r2]
+	.loc 1 2288 0
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
+	.loc 1 2289 0
 	cmp	r2, r3
 	bne	.L1789
+	.loc 1 2290 0
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 2291 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
 .L1789:
+	.loc 1 2293 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
+.LVL1995:
 	b	.L1788
+.LVL1996:
 .L1791:
+	.loc 1 2308 0
 	ldrb	r2, [r5]	@ zero_extendqisi2
 	cbz	r2, .L1784
 	cmp	r3, #1
 	bne	.L1784
+	.loc 1 2309 0
 	ldr	r3, .L1795+12
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bcc	.L1784
+	.loc 1 2310 0
 	ldr	r3, .L1795+16
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -12439,23 +20538,34 @@ FtlSlcSuperblockCheck:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 1 2311 0
 	movs	r3, #0
+	.loc 1 2312 0
 	ldr	r2, .L1795+20
+	.loc 1 2311 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2313 0
 	strb	r3, [r4, #6]
+	.loc 1 2312 0
 	ldrh	r2, [r2]
 	strh	r2, [r4, #2]	@ movhi
+.LVL1997:
 .L1784:
 	pop	{r4, r5, r6, pc}
+.LVL1998:
 .L1796:
 	.align	2
 .L1795:
 	.word	.LANCHOR8
 	.word	.LANCHOR117
-	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR53
+	.word	.LANCHOR83
 	.word	.LANCHOR52
-	.word	.LANCHOR82
-	.word	.LANCHOR51
+.LBE455:
+.LBE454:
+	.cfi_endproc
+.LFE373:
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
@@ -12466,135 +20576,209 @@ FtlSlcSuperblockCheck:
 	.fpu softvfp
 	.type	get_new_active_ppa, %function
 get_new_active_ppa:
+.LFB388:
+	.loc 1 3021 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0]
-	movw	r3, #65535
+.LVL1999:
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 3025 0
+	movw	r3, #65535
+	ldrh	r2, [r0]
+	.loc 1 3021 0
 	mov	r4, r0
+	.loc 1 3025 0
 	cmp	r2, r3
 	bne	.L1798
+	.loc 1 3025 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1819
-	movw	r2, #2986
+	movw	r2, #3025
 	ldr	r0, .L1819+4
+.LVL2000:
 	bl	printf
+.LVL2001:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2002:
 .L1798:
+	.loc 1 3026 0 is_stmt 1
 	ldr	r5, .L1819+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
 	bne	.L1799
+	.loc 1 3026 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1819
-	movw	r2, #2987
+	movw	r2, #3026
 	ldr	r0, .L1819+4
 	bl	printf
+.LVL2003:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2004:
 .L1799:
+	.loc 1 3027 0 is_stmt 1
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1800
+	.loc 1 3027 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1819
-	movw	r2, #2988
+	movw	r2, #3027
 	ldr	r0, .L1819+4
 	bl	printf
+.LVL2005:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2006:
 .L1800:
+	.loc 1 3028 0 is_stmt 1
 	movs	r3, #0
 	ldr	r7, .L1819+20
 	strb	r3, [r4, #10]
+	.loc 1 3029 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 3039 0
 	ldr	r6, .L1819+24
+	.loc 1 3029 0
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
+.LVL2007:
 .L1801:
+	.loc 1 3030 0
 	movw	r0, #65535
 	cmp	r2, r0
 	beq	.L1802
+	.loc 1 3039 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldrh	r1, [r4, #2]
 	cmp	r3, #1
 	ldrh	r3, [r4, #4]
 	bne	.L1804
+	.loc 1 3039 0 is_stmt 0 discriminator 1
 	ldrb	ip, [r6]	@ zero_extendqisi2
 	cmp	ip, #0
 	bne	.L1804
+	.loc 1 3039 0 discriminator 2
 	ldr	ip, .L1819+28
 	ldrh	ip, [ip, r1, lsl #1]
 	cmp	ip, r0
 	bne	.L1804
+	.loc 1 3040 0 is_stmt 1
 	subs	r3, r3, #1
+	.loc 1 3041 0
 	ldrh	r0, [r4]
+	.loc 1 3040 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 3041 0
 	bl	decrement_vpc_count
+.LVL2008:
 .L1802:
+	.loc 1 3032 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 3033 0
 	ldrh	r2, [r7]
+	.loc 1 3032 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
+	.loc 1 3033 0
 	cmp	r2, r3
+	.loc 1 3032 0
 	strb	r3, [r4, #6]
+	.loc 1 3033 0
 	bne	.L1803
+	.loc 1 3034 0
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 3035 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
 .L1803:
+	.loc 1 3037 0
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r2, [r4, r3, lsl #1]
+.LVL2009:
 	b	.L1801
 .L1804:
+	.loc 1 3055 0
 	ldr	r8, .L1819+24
+	.loc 1 3044 0
 	orr	r6, r1, r2, lsl #10
+.LVL2010:
+	.loc 1 3045 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
+.LVL2011:
 .L1805:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	.loc 1 3053 0
 	movw	r2, #65535
+	.loc 1 3049 0
 	ldrh	r0, [r7]
 .L1807:
+	.loc 1 3048 0
 	adds	r3, r3, #1
 	uxtb	r3, r3
+	.loc 1 3049 0
 	cmp	r3, r0
+	.loc 1 3050 0
 	itttt	eq
 	ldrheq	r3, [r4, #2]
 	addeq	r3, r3, #1
 	strheq	r3, [r4, #2]	@ movhi
+	.loc 1 3051 0
 	moveq	r3, #0
+	.loc 1 3053 0
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r2
 	beq	.L1807
 	strb	r3, [r4, #6]
+	.loc 1 3055 0
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
 	bne	.L1808
+	.loc 1 3055 0 is_stmt 0 discriminator 1
 	ldrb	r1, [r8]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
 	cbnz	r1, .L1809
+	.loc 1 3055 0 discriminator 2
 	ldr	r1, .L1819+28
 	ldrh	r3, [r1, r3, lsl #1]
 	cmp	r3, r2
 	bne	.L1808
+	.loc 1 3055 0 discriminator 3
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1808
+	.loc 1 3057 0 is_stmt 1
 	subs	r3, r3, #1
+	.loc 1 3058 0
 	ldrh	r0, [r4]
+	.loc 1 3057 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 3058 0
 	bl	decrement_vpc_count
+.LVL2012:
+	.loc 1 3059 0
 	b	.L1805
 .L1809:
+	.loc 1 3063 0
 	ldr	r2, .L1819+32
 	ldrh	r2, [r2]
 	cmp	r3, r2
 	bcc	.L1808
+	.loc 1 3064 0
 	ldr	r3, .L1819+36
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -12602,41 +20786,55 @@ get_new_active_ppa:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 1 3065 0
 	movs	r3, #0
+	.loc 1 3066 0
 	ldrh	r2, [r5]
+	.loc 1 3065 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 3067 0
 	strb	r3, [r4, #6]
+	.loc 1 3066 0
 	strh	r2, [r4, #2]	@ movhi
 .L1808:
+	.loc 1 3071 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r5]
 	cmp	r2, r3
 	bne	.L1797
+	.loc 1 3071 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1797
+	.loc 1 3071 0 discriminator 2
 	ldr	r1, .L1819
-	movw	r2, #3032
+	movw	r2, #3071
 	ldr	r0, .L1819+4
 	bl	printf
+.LVL2013:
 	ldr	r1, .L1819+8
 	ldr	r0, .L1819+12
 	bl	printf
+.LVL2014:
 .L1797:
+	.loc 1 3073 0 is_stmt 1
 	mov	r0, r6
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2015:
 .L1820:
 	.align	2
 .L1819:
 	.word	.LANCHOR205
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR51
-	.word	.LANCHOR36
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR52
+	.word	.LANCHOR37
 	.word	.LANCHOR8
 	.word	.LANCHOR117
-	.word	.LANCHOR52
-	.word	.LANCHOR82
+	.word	.LANCHOR53
+	.word	.LANCHOR83
+	.cfi_endproc
+.LFE388:
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
@@ -12647,94 +20845,172 @@ get_new_active_ppa:
 	.fpu softvfp
 	.type	FtlVpcTblFlush, %function
 FtlVpcTblFlush:
+.LFB360:
+	.loc 1 1135 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2016:
+	.loc 1 1140 0
 	ldr	r3, .L1841
+	.loc 1 1135 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r1, [r3]
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1140 0
+	ldr	r2, [r3]
 	str	r3, [sp]
-	cmp	r1, #0
+	cmp	r2, #0
 	bne	.L1823
-	ldr	r3, .L1841+4
+.LBB459:
+.LBB460:
+	.loc 1 1143 0
+	ldr	r8, .L1841+108
+	ldr	r4, .L1841+4
+	.loc 1 1144 0
 	ldr	r7, .L1841+8
-	ldr	r8, .L1841+104
-	ldr	r4, .L1841+12
+	.loc 1 1143 0
+	ldr	r3, [r8]
+	.loc 1 1152 0
+	ldr	r5, .L1841+12
+	.loc 1 1144 0
 	ldr	r6, [r7]
-	ldr	r0, [r8]
-	ldrh	r2, [r3]
+	.loc 1 1143 0
+	str	r3, [r4, #8]
+	.loc 1 1146 0
+	ldr	r3, .L1841+16
+	.loc 1 1144 0
 	str	r6, [r4, #12]
-	str	r0, [r4, #8]
-	strh	r2, [r6, #2]	@ movhi
-	movw	r2, #61604
-	ldr	r5, .L1841+16
-	strh	r2, [r6]	@ movhi
-	ldr	r2, [r3, #8]
+.LVL2017:
+	.loc 1 1153 0
+	ldr	r0, .L1841+20
+	.loc 1 1146 0
+	ldrh	r1, [r3]
+	.loc 1 1150 0
+	str	r2, [r6, #12]
+	.loc 1 1146 0
+	strh	r1, [r6, #2]	@ movhi
+	.loc 1 1147 0
+	movw	r1, #61604
+	strh	r1, [r6]	@ movhi
+	.loc 1 1148 0
+	ldr	r1, [r3, #8]
+	.loc 1 1149 0
+	str	r2, [r6, #8]
+	.loc 1 1153 0
+	ldr	r2, .L1841+24
+	.loc 1 1148 0
+	str	r1, [r6, #4]
+	.loc 1 1154 0
 	ldrh	r3, [r3, #6]
-	str	r1, [r6, #8]
-	str	r2, [r6, #4]
+	.loc 1 1153 0
+	stm	r5, {r0, r2}
+	.loc 1 1154 0
 	strh	r3, [r5, #8]	@ movhi
-	ldr	r3, .L1841+20
-	ldr	ip, .L1841+108
-	ldr	r2, .L1841+24
+	.loc 1 1155 0
+	ldr	r3, .L1841+28
 	ldrh	r3, [r3]
-	str	r1, [r6, #12]
-	stm	r5, {r2, ip}
 	strb	r3, [r5, #10]
-	ldr	r3, .L1841+28
+	.loc 1 1157 0
+	ldr	r3, .L1841+32
 	ldrh	r2, [r3]
+	.loc 1 1158 0
 	ldrh	r1, [r3, #2]
+	.loc 1 1157 0
 	strh	r2, [r5, #14]	@ movhi
+	.loc 1 1158 0
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	.loc 1 1159 0
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r5, #11]
+	.loc 1 1158 0
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1841+32
+	.loc 1 1161 0
+	ldr	r3, .L1841+36
+	.loc 1 1158 0
 	strh	r2, [r5, #16]	@ movhi
+	.loc 1 1161 0
 	ldrh	r2, [r3]
+	.loc 1 1162 0
 	ldrh	r1, [r3, #2]
+	.loc 1 1161 0
 	strh	r2, [r5, #18]	@ movhi
+	.loc 1 1162 0
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	.loc 1 1163 0
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	strb	r3, [r5, #12]
+	.loc 1 1162 0
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1841+36
+	.loc 1 1165 0
+	ldr	r3, .L1841+40
+	.loc 1 1162 0
 	strh	r2, [r5, #20]	@ movhi
+	.loc 1 1165 0
 	ldrh	r2, [r3]
 	strh	r2, [r5, #22]	@ movhi
+	.loc 1 1166 0
 	ldrh	r1, [r3, #2]
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	.loc 1 1167 0
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	.loc 1 1180 0
+	ldr	r0, [r4, #8]
+	.loc 1 1167 0
 	strb	r3, [r5, #13]
+	.loc 1 1166 0
 	orr	r2, r2, r1, lsl #6
-	ldr	r3, .L1841+40
+	.loc 1 1169 0
+	ldr	r3, .L1841+44
+	.loc 1 1180 0
 	movs	r1, #255
+	.loc 1 1166 0
 	strh	r2, [r5, #24]	@ movhi
+	.loc 1 1169 0
 	ldr	r3, [r3]
 	str	r3, [r5, #32]
-	ldr	r3, .L1841+44
+	.loc 1 1174 0
+	ldr	r3, .L1841+48
 	ldr	r3, [r3]
 	str	r3, [r5, #40]
-	ldr	r3, .L1841+48
+	.loc 1 1175 0
+	ldr	r3, .L1841+52
 	ldr	r3, [r3]
 	str	r3, [r5, #36]
-	ldr	r3, .L1841+52
+	.loc 1 1180 0
+	ldr	r3, .L1841+56
 	ldrh	r2, [r3]
 	bl	ftl_memset
+.LVL2018:
+	.loc 1 1181 0
 	mov	r1, r5
-	ldr	r5, .L1841+56
+	.loc 1 1182 0
+	ldr	r5, .L1841+60
+	.loc 1 1181 0
 	movs	r2, #48
 	ldr	r0, [r4, #8]
 	bl	ftl_memcpy
+.LVL2019:
+	.loc 1 1182 0
 	ldrh	r2, [r5]
-	ldr	r3, .L1841+60
+	ldr	r3, .L1841+64
 	ldr	r0, [r4, #8]
 	ldr	r1, [r3]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	ftl_memcpy
+.LVL2020:
+	.loc 1 1183 0
 	ldrh	r0, [r5]
 	ldr	r3, [r4, #8]
-	ldr	r1, .L1841+64
+	ldr	r1, .L1841+68
 	lsrs	r2, r0, #3
 	adds	r0, r0, #24
 	lsls	r0, r0, #1
@@ -12743,156 +21019,239 @@ FtlVpcTblFlush:
 	bic	r0, r0, #3
 	add	r0, r0, r3
 	bl	ftl_memcpy
-	ldr	r3, .L1841+68
+.LVL2021:
+	.loc 1 1184 0
+	ldr	r3, .L1841+72
 	str	r7, [sp, #4]
 	ldrh	r3, [r3]
 	cbz	r3, .L1824
+.LBB461:
+	.loc 1 1185 0
 	ldrh	r0, [r5]
-	ldr	r3, .L1841+72
-	ldr	r1, .L1841+76
+.LVL2022:
+	.loc 1 1186 0
+	ldr	r3, .L1841+76
+	ldr	r1, .L1841+80
 	ldrh	r2, [r3]
+	.loc 1 1185 0
 	lsrs	r3, r0, #3
+	.loc 1 1186 0
 	ldr	r1, [r1]
+	.loc 1 1185 0
 	add	r3, r3, r0, lsl #1
+	.loc 1 1186 0
 	ldr	r0, [r4, #8]
+.LVL2023:
+	.loc 1 1185 0
 	adds	r3, r3, #52
+	.loc 1 1186 0
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r0, r0, r3, lsl #2
 	bl	ftl_memcpy
+.LVL2024:
 .L1824:
-	ldr	r5, .L1841+4
+.LBE461:
+	.loc 1 1193 0
+	ldr	r5, .L1841+16
+	.loc 1 1138 0
 	movs	r7, #0
+	.loc 1 1136 0
 	movw	fp, #65535
+	.loc 1 1189 0
 	movs	r0, #0
 	bl	FtlUpdateVaildLpn
+.LVL2025:
 	mov	r10, r5
 .L1825:
+.LVL2026:
+	.loc 1 1191 0
 	ldr	r3, [r8]
+	.loc 1 1193 0
 	ldrh	r2, [r5]
-	ldr	r0, .L1841+12
+	.loc 1 1194 0
+	ldr	r0, .L1841+4
+	.loc 1 1191 0
 	str	r3, [r4, #8]
+	.loc 1 1192 0
 	ldr	r3, [sp, #4]
 	ldr	r3, [r3]
 	str	r3, [r4, #12]
+	.loc 1 1193 0
 	ldrh	r3, [r5, #2]
 	orr	r3, r3, r2, lsl #10
 	str	r3, [r4, #4]
+	.loc 1 1194 0
 	movs	r3, #1
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
-	ldr	r3, .L1841+80
+.LVL2027:
+	.loc 1 1195 0
+	ldr	r3, .L1841+84
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r3]
 	subs	r3, r3, #1
 	cmp	r2, r3
 	blt	.L1826
+	.loc 1 1197 0
 	ldrh	r3, [r5]
+	.loc 1 1196 0
 	ldrh	fp, [r5, #4]
+.LVL2028:
+	.loc 1 1197 0
 	strh	r3, [r5, #4]	@ movhi
+	.loc 1 1198 0
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 1 1199 0
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1841+44
+.LVL2029:
+	.loc 1 1204 0
+	ldr	r2, .L1841+48
+	.loc 1 1199 0
 	strh	r0, [r5]	@ movhi
+	.loc 1 1204 0
 	ldr	r3, [r2]
 	adds	r1, r3, #1
 	str	r3, [r5, #8]
 	str	r1, [r2]
+	.loc 1 1205 0
 	lsls	r2, r0, #10
 	str	r2, [r4, #4]
+	.loc 1 1206 0
 	str	r3, [r6, #4]
+	.loc 1 1208 0
 	movs	r3, #1
+	.loc 1 1207 0
 	strh	r0, [r6, #2]	@ movhi
+	.loc 1 1208 0
 	mov	r2, r3
 	mov	r1, r3
-	ldr	r0, .L1841+12
+	ldr	r0, .L1841+4
 	bl	FlashProgPages
+.LVL2030:
 .L1826:
+	.loc 1 1210 0
 	ldrh	r3, [r10, #2]
+	.loc 1 1211 0
 	ldr	r2, [r4]
+	.loc 1 1210 0
 	adds	r3, r3, #1
 	uxth	r3, r3
+	.loc 1 1211 0
 	adds	r1, r2, #1
+	.loc 1 1210 0
 	strh	r3, [r10, #2]	@ movhi
+	.loc 1 1211 0
 	bne	.L1827
+	.loc 1 1213 0
 	cmp	r3, #1
 	bne	.L1828
-	ldr	r1, .L1841+84
-	movw	r2, #1180
-	ldr	r0, .L1841+88
+	ldr	r1, .L1841+88
+	movw	r2, #1213
+	ldr	r0, .L1841+92
 	bl	printf
-	ldr	r1, .L1841+92
-	ldr	r0, .L1841+96
+.LVL2031:
+	ldr	r1, .L1841+96
+	ldr	r0, .L1841+100
 	bl	printf
+.LVL2032:
 .L1828:
+	.loc 1 1214 0
 	ldrh	r3, [r10, #2]
+	.loc 1 1216 0
 	adds	r7, r7, #1
+.LVL2033:
 	uxth	r7, r7
+.LVL2034:
+	.loc 1 1214 0
 	cmp	r3, #1
+	.loc 1 1215 0
 	itttt	eq
-	ldreq	r3, .L1841+80
+	ldreq	r3, .L1841+84
 	ldrheq	r3, [r3]
 	addeq	r3, r3, #-1
 	strheq	r3, [r10, #2]	@ movhi
+	.loc 1 1217 0
 	cmp	r7, #3
 	bls	.L1825
+	.loc 1 1218 0
 	mov	r2, r7
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1841+100
+	ldr	r0, .L1841+104
 	bl	printf
+.LVL2035:
+	.loc 1 1220 0
 	ldr	r2, [sp]
 	movs	r3, #1
 	str	r3, [r2]
+.LVL2036:
 .L1823:
+.LBE460:
+.LBE459:
+	.loc 1 1232 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2037:
 .L1827:
+	.cfi_restore_state
+.LBB463:
+.LBB462:
+	.loc 1 1226 0
 	cmp	r3, #1
 	beq	.L1825
 	cmp	r2, #256
 	beq	.L1825
+	.loc 1 1229 0
 	movw	r3, #65535
 	cmp	fp, r3
 	beq	.L1823
+	.loc 1 1230 0
 	movs	r1, #1
 	mov	r0, fp
 	bl	FtlFreeSysBlkQueueIn
+.LVL2038:
 	b	.L1823
 .L1842:
 	.align	2
 .L1841:
-	.word	.LANCHOR75
-	.word	.LANCHOR206
-	.word	.LANCHOR185
+	.word	.LANCHOR76
 	.word	.LANCHOR199
-	.word	.LANCHOR135
-	.word	.LANCHOR43
+	.word	.LANCHOR185
+	.word	.LANCHOR80
+	.word	.LANCHOR206
 	.word	1179929683
-	.word	.LANCHOR90
+	.word	1342177352
+	.word	.LANCHOR44
 	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LANCHOR165
+	.word	.LANCHOR93
+	.word	.LANCHOR164
+	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR56
-	.word	.LANCHOR38
-	.word	.LANCHOR82
+	.word	.LANCHOR57
+	.word	.LANCHOR39
+	.word	.LANCHOR83
 	.word	.LANCHOR0
-	.word	.LANCHOR68
-	.word	.LANCHOR65
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR128
-	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR207
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC32
-	.word	.LANCHOR79
-	.word	1342177351
+	.word	.LC7
+	.word	.LC8
+	.word	.LC35
+	.word	.LANCHOR180
+.LBE462:
+.LBE463:
+	.cfi_endproc
+.LFE360:
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -12903,27 +21262,55 @@ FtlVpcTblFlush:
 	.fpu softvfp
 	.type	FtlSuperblockPowerLostFix, %function
 FtlSuperblockPowerLostFix:
+.LFB380:
+	.loc 1 2531 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2039:
+	.loc 1 2537 0
 	ldr	r3, .L1858
+	.loc 1 2531 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
 	mov	r4, r0
 	sub	sp, sp, #40
+	.cfi_def_cfa_offset 64
+	.loc 1 2537 0
 	ldrb	r5, [r3]	@ zero_extendqisi2
 	cbz	r5, .L1857
+	.loc 1 2537 0 is_stmt 0 discriminator 1
 	ldrb	r5, [r0, #8]	@ zero_extendqisi2
 	cmp	r5, #1
 	bne	.L1852
+.LVL2040:
+	.loc 1 2540 0 is_stmt 1
 	ldrh	r6, [r0, #4]
+.LVL2041:
 .L1844:
+	.loc 1 2550 0
 	ldr	r7, .L1858+4
+	.loc 1 2551 0
 	ldr	r8, .L1858+20
+.LVL2042:
 .L1845:
+	.loc 1 2543 0
 	adds	r6, r6, #-1
+.LVL2043:
 	bcc	.L1847
+.LVL2044:
+	.loc 1 2544 0
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1846
+.LVL2045:
 .L1847:
+	.loc 1 2564 0
 	ldr	r3, .L1858+8
 	ldrh	r1, [r4]
 	ldrh	r0, [r4, #4]
@@ -12931,62 +21318,99 @@ FtlSuperblockPowerLostFix:
 	ldrh	r3, [r2, r1, lsl #1]
 	subs	r3, r3, r0
 	strh	r3, [r2, r1, lsl #1]	@ movhi
+	.loc 1 2565 0
 	ldr	r3, .L1858+12
 	ldrh	r3, [r3]
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 2566 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
+	.loc 1 2567 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 1 2569 0
 	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2046:
 .L1852:
+	.cfi_restore_state
+	.loc 1 2535 0
 	movs	r5, #0
 .L1857:
+	.loc 1 2534 0
 	movs	r6, #12
 	b	.L1844
+.LVL2047:
 .L1846:
+	.loc 1 2546 0
 	mov	r0, r4
 	bl	get_new_active_ppa
+.LVL2048:
 	str	r0, [sp, #8]
+	.loc 1 2547 0
 	adds	r0, r0, #1
 	beq	.L1847
+	.loc 1 2551 0
 	ldr	r1, [r8]
+	.loc 1 2549 0
 	mov	r3, #-1
+	.loc 1 2550 0
 	ldr	r2, [r7]
-	ldr	r0, .L1858+16
+	.loc 1 2549 0
 	str	r3, [sp, #20]
+	.loc 1 2551 0
 	str	r1, [sp, #16]
+.LVL2049:
+	.loc 1 2550 0
 	str	r2, [sp, #12]
+	.loc 1 2555 0
 	str	r3, [r1, #12]
-	ldr	r2, [r0]
+	.loc 1 2554 0
 	str	r3, [r1, #8]
+	.loc 1 2556 0
 	ldrh	r3, [r4]
-	str	r2, [r1, #4]
-	adds	r2, r2, #1
+	.loc 1 2559 0
+	ldr	r0, .L1858+16
+	.loc 1 2556 0
 	strh	r3, [r1, #2]	@ movhi
+	.loc 1 2557 0
 	movs	r3, #0
 	strh	r3, [r1]	@ movhi
+	.loc 1 2559 0
+	ldr	r2, [r0]
+	str	r2, [r1, #4]
+	adds	r2, r2, #1
 	adds	r1, r2, #1
+.LVL2050:
+	.loc 1 2560 0
+	mov	r1, #1
+	.loc 1 2559 0
 	it	eq
 	moveq	r2, r3
-	movs	r1, #1
 	str	r2, [r0]
+	.loc 1 2560 0
 	mov	r2, r5
 	add	r0, sp, #4
 	bl	FlashProgPages
+.LVL2051:
+	.loc 1 2561 0
 	ldrh	r0, [r4]
 	bl	decrement_vpc_count
+.LVL2052:
 	b	.L1845
 .L1859:
 	.align	2
 .L1858:
 	.word	.LANCHOR8
-	.word	.LANCHOR79
-	.word	.LANCHOR82
-	.word	.LANCHOR51
-	.word	.LANCHOR158
+	.word	.LANCHOR180
+	.word	.LANCHOR83
+	.word	.LANCHOR52
+	.word	.LANCHOR157
 	.word	.LANCHOR185
+	.cfi_endproc
+.LFE380:
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -12997,69 +21421,118 @@ FtlSuperblockPowerLostFix:
 	.fpu softvfp
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
+.LFB321:
+	.loc 5 182 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	.loc 5 188 0
 	ldr	r3, .L1870
+	.loc 5 182 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 191 0
 	movs	r6, #0
+	.loc 5 188 0
 	ldr	r5, .L1870+4
 	ldr	r3, [r3]
 	ldr	r7, .L1870+8
+	.loc 5 195 0
 	ldr	r10, .L1870+20
+	.loc 5 188 0
 	str	r3, [r5, #8]
+	.loc 5 189 0
 	ldr	r3, .L1870+12
 	ldr	r8, [r3]
 	str	r8, [r5, #12]
+.LVL2053:
 .L1861:
+	.loc 5 191 0 discriminator 1
 	ldr	r3, .L1870+16
 	ldrh	r3, [r3]
 	cmp	r6, r3
 	bcc	.L1866
+	.loc 5 222 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2054:
 .L1866:
+	.loc 5 195 0
 	ldrh	r4, [r10]
+	.loc 5 194 0
 	movw	r3, #65535
+	.loc 5 199 0
 	ldr	fp, .L1870+4
+	.loc 5 194 0
 	strh	r3, [r7, #2]!	@ movhi
+	.loc 5 195 0
 	subs	r4, r4, #1
 	uxth	r4, r4
+.LVL2055:
 .L1862:
+	.loc 5 195 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	sub	r2, r3, #15
 	cmp	r2, r4
 	bgt	.L1864
+.LVL2056:
+	.loc 5 197 0 is_stmt 1
 	mla	r3, r6, r3, r4
+.LVL2057:
+	.loc 5 199 0
 	movs	r2, #1
+.LVL2058:
 	mov	r1, r2
 	mov	r0, fp
+	.loc 5 197 0
 	lsls	r3, r3, #10
+	.loc 5 198 0
 	str	r3, [r5, #4]
+	.loc 5 199 0
 	bl	FlashReadPages
+.LVL2059:
+	.loc 5 200 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	beq	.L1863
+	.loc 5 208 0
 	ldrh	r2, [r8]
 	movw	r3, #61664
 	cmp	r2, r3
 	bne	.L1863
+	.loc 5 210 0
 	strh	r4, [r7]	@ movhi
 .L1864:
+	.loc 5 191 0 discriminator 2
 	adds	r6, r6, #1
+.LVL2060:
 	b	.L1861
 .L1863:
+	.loc 5 195 0 discriminator 2
 	subs	r4, r4, #1
+.LVL2061:
 	uxth	r4, r4
+.LVL2062:
 	b	.L1862
 .L1871:
 	.align	2
 .L1870:
-	.word	.LANCHOR79
+	.word	.LANCHOR180
 	.word	.LANCHOR199
-	.word	.LANCHOR73+10
+	.word	.LANCHOR74+10
 	.word	.LANCHOR185
-	.word	.LANCHOR43
-	.word	.LANCHOR49
+	.word	.LANCHOR44
+	.word	.LANCHOR50
+	.cfi_endproc
+.LFE321:
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
@@ -13070,73 +21543,138 @@ FtlLoadFactoryBbt:
 	.fpu softvfp
 	.type	FtlGetLastWrittenPage, %function
 FtlGetLastWrittenPage:
+.LFB329:
+	.loc 1 47 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2063:
+	.loc 1 51 0
 	cmp	r1, #1
+	.loc 1 47 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 51 0
 	it	eq
 	ldreq	r3, .L1884
+	.loc 1 47 0
 	sub	sp, sp, #104
+	.cfi_def_cfa_offset 128
+	.loc 1 57 0
 	lsl	r7, r0, #10
+	.loc 1 58 0
 	mov	r2, r1
+	.loc 1 51 0
 	it	ne
 	ldrne	r3, .L1884+4
+	.loc 1 47 0
 	mov	r8, r1
+	.loc 1 53 0
 	movs	r6, #0
+	.loc 1 58 0
 	movs	r1, #1
+.LVL2064:
 	add	r0, sp, #4
+.LVL2065:
+	.loc 1 51 0
 	ldrh	r5, [r3]
+.LVL2066:
+	.loc 1 54 0
 	add	r3, sp, #40
 	str	r3, [sp, #16]
+.LVL2067:
+	.loc 1 53 0
 	str	r6, [sp, #12]
+	.loc 1 56 0
 	subs	r5, r5, #1
+.LVL2068:
 	sxth	r5, r5
+.LVL2069:
+	.loc 1 57 0
 	orr	r3, r5, r7
 	str	r3, [sp, #8]
+	.loc 1 58 0
 	bl	FlashReadPages
+.LVL2070:
+	.loc 1 59 0
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
 	bne	.L1875
+.LVL2071:
 .L1876:
+	.loc 1 60 0
 	cmp	r6, r5
 	ble	.L1879
+.LVL2072:
 .L1875:
+	.loc 1 73 0
 	mov	r0, r5
 	add	sp, sp, #104
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2073:
 .L1879:
+	.cfi_restore_state
+	.loc 1 61 0
 	adds	r3, r6, r5
+	.loc 1 63 0
 	mov	r2, r8
+	.loc 1 61 0
 	add	r3, r3, r3, lsr #31
+	.loc 1 63 0
 	movs	r1, #1
 	add	r0, sp, #4
+	.loc 1 61 0
 	asrs	r4, r3, #1
+.LVL2074:
+	.loc 1 62 0
 	sxth	r3, r4
 	orrs	r3, r3, r7
 	str	r3, [sp, #8]
+	.loc 1 63 0
 	bl	FlashReadPages
+.LVL2075:
+	.loc 1 65 0
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
 	bne	.L1877
+	.loc 1 65 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
 	bne	.L1877
+	.loc 1 65 0 discriminator 2
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
 	beq	.L1877
+	.loc 1 66 0 is_stmt 1
 	subs	r4, r4, #1
+.LVL2076:
 	sxth	r5, r4
+.LVL2077:
 	b	.L1876
+.LVL2078:
 .L1877:
+	.loc 1 68 0
 	adds	r4, r4, #1
+.LVL2079:
 	sxth	r6, r4
+.LVL2080:
 	b	.L1876
 .L1885:
 	.align	2
 .L1884:
+	.word	.LANCHOR53
 	.word	.LANCHOR52
-	.word	.LANCHOR51
+	.cfi_endproc
+.LFE329:
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -13147,190 +21685,299 @@ FtlGetLastWrittenPage:
 	.fpu softvfp
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
+.LFB323:
+	.loc 5 249 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	movs	r3, #0
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 5 257 0
+	ldr	r8, .L1915+48
 	ldr	r4, .L1915
+	ldr	r3, [r8]
+	.loc 5 261 0
 	ldr	r7, .L1915+4
+	.loc 5 264 0
+	mov	r10, r4
+	.loc 5 257 0
 	str	r3, [r4, #8]
-	mov	r8, r4
+	.loc 5 258 0
 	ldr	r3, .L1915+8
 	ldr	r6, [r3]
 	str	r6, [r4, #12]
+.LVL2081:
+	.loc 5 260 0
 	bl	FtlBbtMemInit
+.LVL2082:
+	.loc 5 261 0
 	ldrh	r5, [r7]
 	subs	r5, r5, #1
 	uxth	r5, r5
+.LVL2083:
 .L1887:
+	.loc 5 261 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r7]
 	subs	r3, r3, #47
 	cmp	r3, r5
 	bgt	.L1890
+	.loc 5 263 0 is_stmt 1
 	lsls	r3, r5, #10
+	.loc 5 264 0
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r8
+	mov	r0, r10
+	.loc 5 263 0
 	str	r3, [r4, #4]
+	.loc 5 264 0
 	bl	FlashReadPages
+.LVL2084:
+	.loc 5 265 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	bne	.L1888
+	.loc 5 267 0
 	ldr	r3, [r4, #4]
+	.loc 5 268 0
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r8
+	mov	r0, r10
+	.loc 5 267 0
 	adds	r3, r3, #1
 	str	r3, [r4, #4]
+	.loc 5 268 0
 	bl	FlashReadPages
+.LVL2085:
 .L1888:
+	.loc 5 270 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1889
+	.loc 5 278 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1889
+	.loc 5 280 0
 	ldr	r3, .L1915+12
+	.loc 5 281 0
 	ldr	r2, [r6, #4]
+	.loc 5 280 0
 	strh	r5, [r3]	@ movhi
+	.loc 5 281 0
 	str	r2, [r3, #8]
+	.loc 5 282 0
 	ldrh	r2, [r6, #8]
 	strh	r2, [r3, #4]	@ movhi
 .L1890:
+	.loc 5 298 0
 	ldr	r5, .L1915+12
+.LVL2086:
 	movw	r2, #65535
 	ldrh	r3, [r5]
 	cmp	r3, r2
 	beq	.L1904
+	.loc 5 304 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, r2
 	beq	.L1894
+	.loc 5 306 0
 	lsls	r3, r3, #10
+	.loc 5 307 0
 	movs	r2, #1
 	mov	r1, r2
 	ldr	r0, .L1915
+	.loc 5 306 0
 	str	r3, [r4, #4]
+	.loc 5 307 0
 	bl	FlashReadPages
+.LVL2087:
+	.loc 5 308 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1894
+	.loc 5 311 0
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	bne	.L1894
+	.loc 5 311 0 is_stmt 0 discriminator 1
 	ldr	r3, [r6, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
 	bls	.L1894
+	.loc 5 313 0 is_stmt 1
 	ldrh	r2, [r5, #4]
+	.loc 5 314 0
 	str	r3, [r5, #8]
+	.loc 5 315 0
 	ldrh	r3, [r6, #8]
+	.loc 5 313 0
 	strh	r2, [r5]	@ movhi
+	.loc 5 315 0
 	strh	r3, [r5, #4]	@ movhi
 .L1894:
-	ldr	r8, .L1915+48
-	movs	r1, #1
+	.loc 5 327 0
 	ldr	r10, .L1915
+	.loc 5 320 0
+	movs	r1, #1
 	ldrh	r0, [r5]
 	bl	FtlGetLastWrittenPage
+.LVL2088:
 	sxth	r7, r0
+.LVL2089:
+	.loc 5 321 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
 .L1896:
+	.loc 5 323 0
 	cmp	r7, #0
 	bge	.L1899
+	.loc 5 336 0
 	ldr	r1, .L1915+16
-	movw	r2, #335
+	mov	r2, #336
 	ldr	r0, .L1915+20
 	bl	printf
+.LVL2090:
 	ldr	r1, .L1915+24
 	ldr	r0, .L1915+28
 	bl	printf
+.LVL2091:
 .L1898:
+	.loc 5 337 0
 	ldrh	r3, [r6, #10]
+	.loc 5 339 0
 	ldrh	r0, [r6, #12]
+	.loc 5 337 0
 	strh	r3, [r5, #6]	@ movhi
+	.loc 5 339 0
 	movw	r3, #65535
 	cmp	r0, r3
 	beq	.L1901
+	.loc 5 341 0
 	ldr	r3, .L1915+32
 	ldr	r2, [r3]
 	cmp	r0, r2
 	beq	.L1901
+	.loc 5 341 0 is_stmt 0 discriminator 1
 	ldr	r3, .L1915+36
 	ldrh	r3, [r3]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
 	bcs	.L1901
+	.loc 5 343 0 is_stmt 1
 	cmp	r0, r3
 	bcs	.L1901
+	.loc 5 345 0
 	bl	FtlSysBlkNumInit
+.LVL2092:
 .L1901:
 	ldr	r6, .L1915+40
+.LVL2093:
+	.loc 5 249 0 discriminator 1
 	movs	r5, #0
+	.loc 5 350 0 discriminator 1
 	ldr	r7, .L1915+44
+.LVL2094:
+	.loc 5 351 0 discriminator 1
 	ldr	r8, .L1915+52
 .L1902:
+.LVL2095:
+	.loc 5 350 0 discriminator 1
 	ldrh	r3, [r7]
 	cmp	r5, r3
 	bcc	.L1903
+	.loc 5 357 0
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL2096:
 .L1889:
+	.loc 5 261 0 discriminator 2
 	subs	r5, r5, #1
+.LVL2097:
 	uxth	r5, r5
+.LVL2098:
 	b	.L1887
+.LVL2099:
 .L1899:
+	.loc 5 325 0
 	ldrh	r3, [r5]
+	.loc 5 327 0
 	movs	r2, #1
 	mov	r1, r2
 	mov	r0, r10
+	.loc 5 325 0
 	orr	r3, r7, r3, lsl #10
 	str	r3, [r4, #4]
+	.loc 5 326 0
 	ldr	r3, [r8]
 	str	r3, [r4, #8]
+	.loc 5 327 0
 	bl	FlashReadPages
+.LVL2100:
+	.loc 5 329 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
 	beq	.L1897
+	.loc 5 329 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r6]
 	movw	r3, #61649
 	cmp	r2, r3
 	beq	.L1898
 .L1897:
 	subs	r7, r7, #1
+.LVL2101:
 	sxth	r7, r7
+.LVL2102:
 	b	.L1896
+.LVL2103:
 .L1903:
+	.loc 5 351 0 is_stmt 1 discriminator 3
 	ldrh	r2, [r8]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r6, #4]!
 	lsls	r2, r2, #2
 	mla	r1, r5, r2, r1
+	.loc 5 350 0 discriminator 3
 	adds	r5, r5, #1
+.LVL2104:
+	.loc 5 351 0 discriminator 3
 	bl	ftl_memcpy
+.LVL2105:
 	b	.L1902
+.LVL2106:
 .L1904:
+	.loc 5 300 0
 	mov	r0, #-1
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.LVL2107:
 .L1916:
 	.align	2
 .L1915:
 	.word	.LANCHOR199
-	.word	.LANCHOR49
+	.word	.LANCHOR50
 	.word	.LANCHOR185
-	.word	.LANCHOR73
+	.word	.LANCHOR74
 	.word	.LANCHOR208
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR35
-	.word	.LANCHOR39
-	.word	.LANCHOR73+24
-	.word	.LANCHOR43
-	.word	.LANCHOR79
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR36
+	.word	.LANCHOR40
+	.word	.LANCHOR74+24
+	.word	.LANCHOR44
+	.word	.LANCHOR180
 	.word	.LANCHOR120
+	.cfi_endproc
+.LFE323:
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
@@ -13341,14 +21988,34 @@ FtlLoadBbt:
 	.fpu softvfp
 	.type	ftl_map_blk_gc, %function
 ftl_map_blk_gc:
+.LFB348:
+	.loc 1 632 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
+.LVL2108:
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 632 0
 	mov	r4, r0
+	.loc 1 637 0
 	ldr	r5, [r0, #12]
-	str	r3, [sp]
+.LVL2109:
+	.loc 1 638 0
+	ldr	fp, [r0, #24]
+.LVL2110:
+	.loc 1 641 0
 	bl	ftl_free_no_use_map_blk
+.LVL2111:
+	.loc 1 643 0
 	ldrh	ip, [r4, #10]
 	ldrh	r2, [r4, #8]
 	ldrh	r1, [r4, #40]
@@ -13356,155 +22023,236 @@ ftl_map_blk_gc:
 	ldr	r6, .L1937
 	cmp	r2, r3
 	bge	.L1918
+	.loc 1 644 0
 	movw	r3, #65535
 	cmp	r1, r3
 	beq	.L1920
+	.loc 1 644 0 is_stmt 0 discriminator 1
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r6]
 	cmp	r2, r3
 	bcc	.L1921
 .L1918:
+	.loc 1 645 0 is_stmt 1
 	movw	r3, #65535
+	.loc 1 641 0
 	uxth	r0, r0
+	.loc 1 645 0
 	cmp	r1, r3
 	beq	.L1922
+	.loc 1 645 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #2]
 	ldrh	r2, [r6]
 	cmp	r2, r3
 	bls	.L1923
+.LVL2112:
 .L1922:
-	ldrh	r8, [r5, r0, lsl #1]
+	.loc 1 655 0 is_stmt 1
+	ldrh	r10, [r5, r0, lsl #1]
+.LVL2113:
 	lsls	r2, r0, #1
-	cmp	r8, #0
+	.loc 1 656 0
+	cmp	r10, #0
 	beq	.L1920
+	.loc 1 656 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #32]
 	cbnz	r3, .L1920
+	.loc 1 657 0 is_stmt 1
 	movs	r1, #1
 	str	r1, [r4, #32]
+	.loc 1 658 0
 	strh	r3, [r5, r2]	@ movhi
+	.loc 1 659 0
 	ldrh	r3, [r4, #8]
+	.loc 1 660 0
 	ldrh	r2, [r4, #2]
+	.loc 1 659 0
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
+	.loc 1 660 0
 	ldrh	r3, [r6]
 	cmp	r2, r3
 	bcc	.L1928
+	.loc 1 661 0
 	mov	r0, r4
+.LVL2114:
 	bl	ftl_map_blk_alloc_new_blk
+.LVL2115:
 .L1928:
+	.loc 1 665 0 discriminator 1
 	ldr	r5, .L1937+4
+.LVL2116:
+	.loc 1 653 0 discriminator 1
 	movs	r7, #0
 .L1929:
+	.loc 1 663 0 discriminator 1
 	ldrh	r2, [r4, #6]
 	uxth	r3, r7
+.LVL2117:
 	cmp	r2, r3
 	bhi	.L1933
+	.loc 1 681 0
 	movs	r1, #1
-	mov	r0, r8
+	mov	r0, r10
 	bl	FtlFreeSysBlkQueueIn
+.LVL2118:
+	.loc 1 682 0
 	movs	r3, #0
 	str	r3, [r4, #32]
+.LVL2119:
 .L1920:
+	.loc 1 686 0
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r6]
 	cmp	r2, r3
 	bcc	.L1921
+	.loc 1 687 0
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
+.LVL2120:
 .L1921:
+	.loc 1 689 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2121:
 .L1926:
+	.cfi_restore_state
+	.loc 1 647 0
 	ldrh	r8, [r5, r2, lsl #1]
 	add	lr, r2, #1
 	cmp	r8, r1
 	beq	.L1924
 	mov	r2, lr
+.LVL2122:
 .L1925:
 	uxth	r7, r2
+.LVL2123:
+	.loc 1 646 0 discriminator 1
 	cmp	r7, ip
 	bcc	.L1926
+	.loc 1 641 0
 	mov	r7, r0
+.LVL2124:
 .L1924:
+	.loc 1 652 0
 	uxth	r2, r2
 	ldr	r0, .L1937+8
 	ldrh	r2, [r5, r2, lsl #1]
+.LVL2125:
 	bl	printf
+.LVL2126:
+	.loc 1 653 0
 	movw	r3, #65535
 	mov	r0, r7
 	strh	r3, [r4, #40]	@ movhi
 	b	.L1922
+.LVL2127:
 .L1923:
 	movs	r2, #0
 	b	.L1925
+.LVL2128:
 .L1933:
-	ldr	r2, [sp]
-	uxth	r10, r7
-	ldr	r2, [r2, r10, lsl #2]
-	cmp	r8, r2, lsr #10
+	uxth	r8, r7
+	.loc 1 664 0
+	ldr	r2, [fp, r8, lsl #2]
+	cmp	r10, r2, lsr #10
 	bne	.L1930
 	str	r3, [sp, #4]
+	.loc 1 665 0
 	ldr	r3, .L1937+12
+.LVL2129:
+	.loc 1 669 0
+	ldr	r0, .L1937+4
+	.loc 1 665 0
+	ldr	r2, [r3]
+	str	r2, [r5, #8]
+	.loc 1 666 0
+	ldr	r2, .L1937+16
+	ldr	r3, [r2]
+	str	r3, [r5, #12]
+	.loc 1 667 0
+	ldr	r2, [fp, r8, lsl #2]
+	.loc 1 666 0
+	str	r3, [sp]
+	.loc 1 667 0
 	str	r2, [r5, #4]
+.LVL2130:
+	.loc 1 669 0
 	movs	r2, #1
-	ldr	r0, .L1937+4
-	ldr	r1, [r3]
-	str	r1, [r5, #8]
-	ldr	r1, .L1937+16
-	ldr	fp, [r1]
 	mov	r1, r2
-	str	fp, [r5, #12]
 	bl	FlashReadPages
-	ldrh	r2, [fp, #8]
+.LVL2131:
+	.loc 1 671 0
+	ldr	r3, [sp]
+	ldrh	r2, [r3, #8]
 	ldr	r3, [sp, #4]
 	cmp	r2, r3
 	beq	.L1931
+	.loc 1 671 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1937+20
-	movw	r2, #638
+	movw	r2, #671
 	ldr	r0, .L1937+24
 	bl	printf
+.LVL2132:
 	ldr	r1, .L1937+28
 	ldr	r0, .L1937+32
 	bl	printf
+.LVL2133:
 .L1931:
+	.loc 1 672 0 is_stmt 1
 	ldr	r3, [r5]
 	adds	r3, r3, #1
 	bne	.L1932
-	ldr	r2, [sp]
+	.loc 1 673 0
 	movs	r3, #0
+	.loc 1 674 0
 	ldr	r0, .L1937+36
-	str	r3, [r2, r10, lsl #2]
-	ldrh	r2, [fp, #8]
+	.loc 1 673 0
+	str	r3, [fp, r8, lsl #2]
+	.loc 1 674 0
+	ldr	r3, [sp]
 	ldr	r1, [r5, #4]
+	ldrh	r2, [r3, #8]
 	bl	printf
+.LVL2134:
+	.loc 1 675 0
 	ldr	r3, .L1937+40
 	movs	r2, #1
 	str	r2, [r3]
+.LVL2135:
 .L1930:
 	adds	r7, r7, #1
+.LVL2136:
 	b	.L1929
+.LVL2137:
 .L1932:
+	.loc 1 677 0
 	ldr	r2, [r5, #8]
-	mov	r1, r10
+	mov	r1, r8
 	mov	r0, r4
 	bl	FtlMapWritePage
+.LVL2138:
 	b	.L1930
 .L1938:
 	.align	2
 .L1937:
-	.word	.LANCHOR52
+	.word	.LANCHOR53
 	.word	.LANCHOR199
-	.word	.LC33
+	.word	.LC36
 	.word	.LANCHOR181
 	.word	.LANCHOR185
 	.word	.LANCHOR209
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC34
-	.word	.LANCHOR75
+	.word	.LC7
+	.word	.LC8
+	.word	.LC37
+	.word	.LANCHOR76
+	.cfi_endproc
+.LFE348:
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -13515,111 +22263,193 @@ ftl_map_blk_gc:
 	.fpu softvfp
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
+.LFB349:
+	.loc 1 692 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2139:
+	.loc 1 700 0
 	ldr	r3, .L1949
+	.loc 1 692 0
 	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 692 0
 	mov	r4, r0
+	.loc 1 700 0
 	ldr	r5, [r3]
 	cbnz	r5, .L1940
+	.loc 1 702 0
 	ldrh	r3, [r0]
 	movw	r2, #65535
+	.loc 1 695 0
 	ldr	r6, [r0, #12]
+	.loc 1 702 0
 	cmp	r3, r2
 	bne	.L1941
+	.loc 1 703 0
 	ldrh	r3, [r0, #8]
 	cbz	r3, .L1942
+	.loc 1 703 0 is_stmt 0 discriminator 1
 	ldr	r1, .L1949+4
-	movw	r2, #670
+	movw	r2, #703
 	ldr	r0, .L1949+8
+.LVL2140:
 	bl	printf
+.LVL2141:
 	ldr	r1, .L1949+12
 	ldr	r0, .L1949+16
 	bl	printf
+.LVL2142:
 .L1942:
+	.loc 1 704 0 is_stmt 1
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
+	.loc 1 705 0
 	bl	FtlFreeSysBlkQueueOut
+.LVL2143:
+	.loc 1 706 0
 	movs	r3, #0
+	.loc 1 705 0
 	strh	r0, [r6]	@ movhi
+	.loc 1 706 0
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 707 0
 	strh	r3, [r4]	@ movhi
+	.loc 1 708 0
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
 .L1940:
+	.loc 1 739 0
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
+.LVL2144:
 .L1941:
-	ldrh	r6, [r6, r3, lsl #1]
+	.loc 1 712 0
+	ldrh	r7, [r6, r3, lsl #1]
+	.loc 1 723 0
 	movs	r1, #255
+	.loc 1 713 0
 	ldrh	r3, [r0, #2]
 	ldr	r2, .L1949+20
-	ldr	r8, .L1949+32
-	ldr	r7, [r0, #24]
-	orr	r3, r3, r6, lsl #10
-	ldr	r0, [r8]
+	.loc 1 714 0
+	ldr	r6, .L1949+24
+	.loc 1 696 0
+	ldr	r8, [r0, #24]
+	.loc 1 713 0
+	orr	r3, r3, r7, lsl #10
 	str	r3, [r2, #4]
-	ldr	r3, .L1949+24
-	str	r0, [r2, #8]
+	.loc 1 714 0
+	ldr	r3, [r6]
+	str	r3, [r2, #8]
+	.loc 1 715 0
+	ldr	r3, .L1949+28
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
+.LVL2145:
+	.loc 1 718 0
+	ldr	r2, [r0, #28]
 	str	r2, [r3, #4]
+.LVL2146:
+	.loc 1 719 0
 	movw	r2, #64245
 	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r6, [r3, #2]	@ movhi
+	.loc 1 720 0
+	ldrh	r2, [r0, #4]
+	.loc 1 721 0
+	strh	r7, [r3, #2]	@ movhi
+	.loc 1 720 0
 	strh	r2, [r3]	@ movhi
-	ldr	r3, .L1949+28
+	.loc 1 723 0
+	ldr	r3, .L1949+32
+.LVL2147:
+	ldr	r0, [r6]
+.LVL2148:
 	ldrh	r2, [r3]
 	lsls	r2, r2, #3
 	bl	ftl_memset
-	ldrh	ip, [r4, #6]
-	mov	r3, r5
-	ldr	r1, [r8]
+.LVL2149:
+	.loc 1 725 0
 	mov	r2, r5
+	.loc 1 724 0
+	mov	r3, r5
+.LVL2150:
 .L1943:
-	uxth	r0, r3
-	cmp	ip, r0
+	.loc 1 725 0 discriminator 1
+	ldrh	r0, [r4, #6]
+	uxth	r1, r2
+	cmp	r0, r1
 	bhi	.L1945
+	.loc 1 732 0
 	movs	r2, #1
+.LVL2151:
 	movs	r3, #0
+.LVL2152:
 	mov	r1, r2
+.LVL2153:
 	ldr	r0, .L1949+20
 	bl	FlashProgPages
+.LVL2154:
+	.loc 1 733 0
 	ldrh	r3, [r4, #2]
+	.loc 1 737 0
 	mov	r0, r4
+	.loc 1 733 0
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
+	.loc 1 737 0
 	bl	ftl_map_blk_gc
+.LVL2155:
+	.loc 1 738 0
 	b	.L1940
+.LVL2156:
 .L1945:
-	ldr	r0, [r7, r3, lsl #2]
-	cmp	r6, r0, lsr #10
+	uxth	r1, r2
+	.loc 1 726 0
+	ldr	r0, [r8, r1, lsl #2]
+	cmp	r7, r0, lsr #10
 	bne	.L1944
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r5, r1, r2, lsl #3
-	ldr	r0, [r7, r3, lsl #2]
-	str	r0, [r5, #4]
-.L1944:
+	.loc 1 728 0
+	ldr	r0, [r6]
+	.loc 1 727 0
 	adds	r3, r3, #1
+.LVL2157:
+	uxth	r3, r3
+.LVL2158:
+	.loc 1 728 0
+	str	r1, [r0, r3, lsl #3]
+	.loc 1 729 0
+	ldr	r0, [r8, r1, lsl #2]
+	ldr	r1, [r6]
+	add	r1, r1, r3, lsl #3
+	str	r0, [r1, #4]
+.L1944:
+.LVL2159:
+	adds	r2, r2, #1
+.LVL2160:
 	b	.L1943
 .L1950:
 	.align	2
 .L1949:
-	.word	.LANCHOR75
+	.word	.LANCHOR76
 	.word	.LANCHOR210
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR199
+	.word	.LANCHOR180
 	.word	.LANCHOR185
-	.word	.LANCHOR52
-	.word	.LANCHOR79
+	.word	.LANCHOR53
+	.cfi_endproc
+.LFE349:
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
@@ -13630,23 +22460,46 @@ Ftl_write_map_blk_to_last_page:
 	.fpu softvfp
 	.type	FtlMapWritePage, %function
 FtlMapWritePage:
+.LFB350:
+	.loc 1 742 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2161:
+	.loc 1 747 0
 	ldr	r3, .L1974
+	.loc 1 742 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 742 0
 	mov	r4, r0
 	mov	r8, r1
 	str	r2, [sp]
+	.loc 1 747 0
 	ldr	r5, [r3]
 	str	r3, [sp, #4]
 	cmp	r5, #0
 	bne	.L1969
+.LBB466:
+.LBB467:
+	.loc 1 752 0
 	ldr	r10, .L1974+36
+.LVL2162:
 .L1953:
+	.loc 1 751 0
 	ldr	r2, .L1974+4
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
+	.loc 1 752 0
 	ldrh	r3, [r10]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
@@ -13657,123 +22510,191 @@ FtlMapWritePage:
 	cmp	r2, r3
 	bne	.L1955
 .L1954:
+	.loc 1 753 0
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
+.LVL2163:
 .L1955:
+	.loc 1 764 0
 	ldrh	r2, [r4]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
 	cbnz	r3, .L1956
 	ldr	r1, .L1974+8
-	movw	r2, #731
+	mov	r2, #764
 	ldr	r0, .L1974+12
 	bl	printf
+.LVL2164:
 	ldr	r1, .L1974+16
 	ldr	r0, .L1974+20
 	bl	printf
+.LVL2165:
 .L1956:
+	.loc 1 765 0
 	ldrh	r2, [r4]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
 	bcc	.L1957
 	ldr	r1, .L1974+8
-	mov	r2, #732
+	movw	r2, #765
 	ldr	r0, .L1974+12
 	bl	printf
+.LVL2166:
 	ldr	r1, .L1974+16
 	ldr	r0, .L1974+20
 	bl	printf
+.LVL2167:
 .L1957:
+	.loc 1 766 0
 	ldrh	r2, [r4]
+	.loc 1 772 0
 	movs	r1, #0
+	.loc 1 766 0
 	ldr	r3, [r4, #12]
+	.loc 1 768 0
 	ldr	r6, .L1974+24
+	.loc 1 766 0
 	ldrh	r7, [r3, r2, lsl #1]
+.LVL2168:
+	.loc 1 772 0
 	movs	r2, #16
+	.loc 1 768 0
 	ldrh	r3, [r4, #2]
 	mov	fp, r6
 	orr	r3, r3, r7, lsl #10
 	str	r3, [r6, #4]
+	.loc 1 769 0
 	ldr	r3, [sp]
 	str	r3, [r6, #8]
+	.loc 1 770 0
 	ldr	r3, .L1974+28
 	ldr	r0, [r3]
 	str	r0, [r6, #12]
+	.loc 1 772 0
 	bl	ftl_memset
+.LVL2169:
+	.loc 1 773 0
 	ldr	r3, [r6, #12]
+.LVL2170:
+	.loc 1 778 0
 	mov	r0, r6
+	.loc 1 774 0
 	ldr	r2, [r4, #28]
+	.loc 1 775 0
 	strh	r8, [r3, #8]	@ movhi
+	.loc 1 774 0
 	str	r2, [r3, #4]
+	.loc 1 776 0
 	ldrh	r2, [r4, #4]
+	.loc 1 777 0
 	strh	r7, [r3, #2]	@ movhi
+	.loc 1 776 0
 	strh	r2, [r3]	@ movhi
+	.loc 1 778 0
 	movs	r3, #1
+.LVL2171:
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL2172:
+	.loc 1 779 0
 	ldrh	r2, [r4, #2]
-	ldr	r1, [r6]
 	adds	r2, r2, #1
 	uxth	r2, r2
-	adds	r3, r1, #1
 	strh	r2, [r4, #2]	@ movhi
+	.loc 1 781 0
+	ldr	r1, [r6]
+	adds	r3, r1, #1
 	bne	.L1958
+	.loc 1 782 0
 	ldr	r1, [r6, #4]
+	.loc 1 783 0
 	adds	r5, r5, #1
+.LVL2173:
+	.loc 1 782 0
 	ldr	r0, .L1974+32
+	.loc 1 783 0
 	uxth	r5, r5
+	.loc 1 782 0
 	bl	printf
+.LVL2174:
+	.loc 1 784 0
 	ldrh	r2, [r4, #2]
 	cmp	r2, #2
+	.loc 1 785 0
 	itttt	ls
 	ldrls	r3, .L1974+36
 	ldrhls	r2, [r3]
 	addls	r2, r2, #-1
 	strhls	r2, [r4, #2]	@ movhi
+	.loc 1 787 0
 	cmp	r5, #3
 	bls	.L1953
+	.loc 1 788 0
 	mov	r2, r5
 	ldr	r1, [r6, #4]
 	ldr	r0, .L1974+40
 	bl	printf
+.LVL2175:
+	.loc 1 790 0
 	ldr	r2, [sp, #4]
 	movs	r3, #1
 	str	r3, [r2]
+.LVL2176:
 .L1969:
+.LBE467:
+.LBE466:
+	.loc 1 811 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL2177:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2178:
 .L1958:
+	.cfi_restore_state
+.LBB469:
+.LBB468:
+	.loc 1 803 0
 	cbz	r1, .L1961
+	.loc 1 806 0
 	cmp	r2, #1
+	.loc 1 804 0
 	strh	r7, [r4, #40]	@ movhi
+	.loc 1 806 0
 	beq	.L1953
 	cmp	r1, #256
 .L1973:
 	beq	.L1953
+	.loc 1 809 0
 	ldr	r2, [fp, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r8, lsl #2]
 	b	.L1969
 .L1961:
+	.loc 1 806 0
 	cmp	r2, #1
 	b	.L1973
 .L1975:
 	.align	2
 .L1974:
-	.word	.LANCHOR75
-	.word	.LANCHOR163
+	.word	.LANCHOR76
+	.word	.LANCHOR162
 	.word	.LANCHOR211
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR199
 	.word	.LANCHOR185
-	.word	.LC35
-	.word	.LANCHOR52
-	.word	.LC36
+	.word	.LC38
+	.word	.LANCHOR53
+	.word	.LC39
+.LBE468:
+.LBE469:
+	.cfi_endproc
+.LFE350:
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -13784,30 +22705,53 @@ FtlMapWritePage:
 	.fpu softvfp
 	.type	flush_l2p_region, %function
 flush_l2p_region:
+.LFB351:
+	.loc 1 814 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2179:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 817 0
 	movs	r4, #12
 	ldr	r5, .L1977
 	muls	r4, r0, r4
+	.loc 1 818 0
 	ldr	r0, .L1977+4
+.LVL2180:
+	.loc 1 817 0
 	ldr	r3, [r5]
 	adds	r2, r3, r4
+.LVL2181:
+	.loc 1 818 0
 	ldrh	r1, [r3, r4]
+.LVL2182:
 	ldr	r2, [r2, #8]
 	bl	FtlMapWritePage
+.LVL2183:
+	.loc 1 819 0
 	ldr	r3, [r5]
+	.loc 1 821 0
 	movs	r0, #0
+	.loc 1 819 0
 	add	r4, r4, r3
 	ldr	r3, [r4, #4]
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
+	.loc 1 821 0
 	pop	{r3, r4, r5, pc}
 .L1978:
 	.align	2
 .L1977:
-	.word	.LANCHOR95
+	.word	.LANCHOR96
 	.word	.LANCHOR124
+	.cfi_endproc
+.LFE351:
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
@@ -13818,20 +22762,38 @@ flush_l2p_region:
 	.fpu softvfp
 	.type	l2p_flush, %function
 l2p_flush:
+.LFB353:
+	.loc 1 864 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2184:
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 871 0
 	movs	r4, #0
 	ldr	r5, .L1983
+	.loc 1 872 0
 	ldr	r6, .L1983+4
+.LVL2185:
 .L1980:
+	.loc 1 871 0 discriminator 1
 	ldrh	r3, [r5]
 	uxth	r0, r4
+.LVL2186:
 	cmp	r3, r0
 	bhi	.L1982
+	.loc 1 875 0
 	movs	r0, #0
+.LVL2187:
 	pop	{r4, r5, r6, pc}
+.LVL2188:
 .L1982:
+	.loc 1 872 0
 	ldr	r2, [r6]
 	uxth	r3, r4
 	movs	r1, #12
@@ -13839,336 +22801,515 @@ l2p_flush:
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
 	bge	.L1981
+	.loc 1 873 0
 	bl	flush_l2p_region
+.LVL2189:
 .L1981:
 	adds	r4, r4, #1
+.LVL2190:
 	b	.L1980
 .L1984:
 	.align	2
 .L1983:
-	.word	.LANCHOR66
-	.word	.LANCHOR95
+	.word	.LANCHOR67
+	.word	.LANCHOR96
+	.cfi_endproc
+.LFE353:
 	.size	l2p_flush, .-l2p_flush
-	.section	.text.load_l2p_region,"ax",%progbits
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	log2phys
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.type	log2phys, %function
+log2phys:
+.LFB354:
+	.loc 1 878 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, r10, lr}
-	mov	r7, r0
-	ldr	r3, .L1991
-	mov	r10, r1
-	ldrh	r3, [r3]
-	cmp	r3, r0
-	bcs	.L1986
-	ldr	r1, .L1991+4
-	movw	r2, #503
-	ldr	r0, .L1991+8
+.LVL2191:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 881 0
+	ldr	r3, .L2003
+	.loc 1 878 0
+	str	r1, [sp, #4]
+	.loc 1 881 0
+	ldrh	r6, [r3]
+	.loc 1 878 0
+	str	r2, [sp, #12]
+	.loc 1 881 0
+	adds	r3, r6, #7
+	.loc 1 882 0
+	movs	r6, #1
+	.loc 1 881 0
+	lsr	fp, r0, r3
+	.loc 1 882 0
+	lsls	r6, r6, r3
+	.loc 1 884 0
+	ldr	r3, .L2003+4
+	.loc 1 882 0
+	subs	r6, r6, #1
+	.loc 1 881 0
+	uxth	r8, fp
+.LVL2192:
+	.loc 1 882 0
+	ands	r6, r6, r0
+	.loc 1 884 0
+	ldr	r3, [r3]
+	.loc 1 882 0
+	uxth	r6, r6
+.LVL2193:
+	.loc 1 884 0
+	cmp	r0, r3
+	bcc	.L1986
+	.loc 1 884 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2003+8
+.LVL2194:
+	mov	r2, #884
+.LVL2195:
+	ldr	r0, .L2003+12
+.LVL2196:
 	bl	printf
-	ldr	r1, .L1991+12
-	ldr	r0, .L1991+16
+.LVL2197:
+	ldr	r1, .L2003+16
+	ldr	r0, .L2003+20
 	bl	printf
+.LVL2198:
 .L1986:
-	ldr	r3, .L1991+20
+	.loc 1 887 0 is_stmt 1
+	ldr	r5, .L2003+24
 	movs	r4, #12
-	ldr	r8, .L1991+44
+	.loc 1 886 0
+	ldr	r3, .L2003+28
+	.loc 1 887 0
+	ldr	r1, [r5]
+	.loc 1 886 0
+	ldrh	r2, [r3]
+	movs	r3, #0
+.LVL2199:
+.L1987:
+	uxth	r10, r3
+.LVL2200:
+	.loc 1 886 0 is_stmt 0 discriminator 1
+	cmp	r10, r2
+	bcc	.L1992
+	.loc 1 901 0 is_stmt 1
+	bl	select_l2p_ram_region
+.LVL2201:
+	.loc 1 902 0
+	muls	r4, r0, r4
+	ldr	r3, [r5]
+	.loc 1 901 0
+	mov	r10, r0
+.LVL2202:
+	.loc 1 902 0
+	ldrh	r1, [r3, r4]
+	adds	r2, r3, r4
+	movw	r3, #65535
+	cmp	r1, r3
+	beq	.L1993
+	.loc 1 902 0 is_stmt 0 discriminator 1
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L1993
+	.loc 1 903 0 is_stmt 1
+	bl	flush_l2p_region
+.LVL2203:
+.L1993:
+.LBB472:
+.LBB473:
+	.loc 1 526 0
+	ldr	r3, .L2003+32
+	ldrh	r3, [r3]
+	cmp	r3, r8
+	bcs	.L1994
+	ldr	r1, .L2003+36
+	movw	r2, #526
+	ldr	r0, .L2003+12
+	bl	printf
+.LVL2204:
+	ldr	r1, .L2003+16
+	ldr	r0, .L2003+20
+	bl	printf
+.LVL2205:
+.L1994:
+	.loc 1 527 0
+	ldr	r3, .L2003+40
+	uxth	fp, fp
 	ldr	r3, [r3]
-	ldr	r5, [r3, r7, lsl #2]
-	cbnz	r5, .L1987
-	mul	r4, r4, r10
-	ldr	r3, [r8]
-	ldr	r2, .L1991+24
+	ldr	r7, [r3, fp, lsl #2]
+.LVL2206:
+	.loc 1 529 0
+	cmp	r7, #0
+	bne	.L1995
+	.loc 1 530 0
+	ldr	r3, [r5]
 	movs	r1, #255
+	ldr	r2, .L2003+44
 	add	r3, r3, r4
-	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
+	ldrh	r2, [r2]
 	bl	ftl_memset
-	ldr	r3, [r8]
-	adds	r2, r3, r4
-	strh	r7, [r3, r4]	@ movhi
-	str	r5, [r2, #4]
+.LVL2207:
+	.loc 1 531 0
+	ldr	r3, [r5]
+	strh	r8, [r3, r4]	@ movhi
+	.loc 1 532 0
+	ldr	r3, [r5]
+	add	r4, r4, r3
+	str	r7, [r4, #4]
+	b	.L1988
+.LVL2208:
+.L1992:
+	adds	r3, r3, #1
+.LBE473:
+.LBE472:
+	.loc 1 887 0
+	mla	r0, r4, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r8
+	bne	.L1987
+.LVL2209:
 .L1988:
+	.loc 1 889 0
+	ldr	r2, [sp, #12]
+	movs	r3, #12
+	ldr	r1, .L2003+24
+	cbnz	r2, .L1989
+	.loc 1 890 0
+	ldr	r2, [r1]
+	mla	r3, r3, r10, r2
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r6, lsl #2]
+	str	r3, [r2]
+.L1990:
+	.loc 1 896 0
+	ldr	r2, [r1]
+	movs	r3, #12
+	mla	r10, r3, r10, r2
+.LVL2210:
+	ldr	r3, [r10, #4]
+	adds	r2, r3, #1
+	beq	.L2000
+	.loc 1 897 0
+	adds	r3, r3, #1
+	str	r3, [r10, #4]
+.L2000:
+	.loc 1 908 0
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L1987:
-	mul	r4, r4, r10
-	ldr	r3, [r8]
-	ldr	r6, .L1991+28
+	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.LVL2211:
+.L1989:
+	.cfi_restore_state
+	.loc 1 892 0
+	ldr	r2, [sp, #4]
+	mul	r3, r3, r10
+	ldr	r0, [r2]
+	ldr	r2, [r5]
+	add	r2, r2, r3
+	ldr	r2, [r2, #8]
+	str	r0, [r2, r6, lsl #2]
+	.loc 1 893 0
+	ldr	r2, [r5]
+	add	r3, r3, r2
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	.loc 1 894 0
+	ldr	r3, .L2003+48
+	strh	r8, [r3]	@ movhi
+	b	.L1990
+.LVL2212:
+.L1995:
+.LBB475:
+.LBB474:
+	.loc 1 536 0
+	ldr	r2, [r5]
+	.loc 1 535 0
+	ldr	r3, .L2003+52
+	.loc 1 536 0
+	add	r2, r2, r4
+	ldr	r2, [r2, #8]
+	.loc 1 538 0
+	mov	r0, r3
+	.loc 1 535 0
+	str	r7, [r3, #4]
+	.loc 1 538 0
+	str	r3, [sp, #8]
+	.loc 1 536 0
+	str	r2, [r3, #8]
+	.loc 1 537 0
+	ldr	r2, .L2003+56
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	.loc 1 538 0
 	movs	r2, #1
 	mov	r1, r2
-	add	r3, r3, r4
-	mov	r0, r6
-	ldr	r3, [r3, #8]
-	str	r5, [r6, #4]
-	str	r3, [r6, #8]
-	ldr	r3, .L1991+32
-	ldr	r3, [r3]
-	str	r3, [r6, #12]
 	bl	FlashReadPages
-	ldr	r3, [r6]
-	ldr	r10, [r6, #12]
+.LVL2213:
+	.loc 1 539 0
+	ldr	r3, [sp, #8]
+	ldr	r2, [r3, #12]
+	.loc 1 540 0
+	ldr	r3, [r3]
+	.loc 1 539 0
+	str	r2, [sp, #8]
+.LVL2214:
+	.loc 1 540 0
 	cmp	r3, #256
-	bne	.L1989
-	mov	r2, r5
-	mov	r1, r7
-	ldr	r0, .L1991+36
-	lsrs	r5, r5, #10
+	bne	.L1996
+	.loc 1 541 0
+	mov	r2, r7
+.LVL2215:
+	mov	r1, fp
+	ldr	r0, .L2003+60
+	.loc 1 542 0
+	lsrs	r7, r7, #10
+.LVL2216:
+	.loc 1 541 0
 	bl	printf
-	ldr	r3, [r8]
-	mov	r1, r7
-	ldr	r0, .L1991+40
+.LVL2217:
+	.loc 1 543 0
+	ldr	r3, [r5]
+	mov	r1, fp
+	.loc 1 542 0
+	ldr	r0, .L2003+64
+	.loc 1 543 0
 	add	r3, r3, r4
+	.loc 1 542 0
+	strh	r7, [r0, #40]	@ movhi
+	.loc 1 543 0
 	ldr	r2, [r3, #8]
-	strh	r5, [r0, #40]	@ movhi
 	bl	FtlMapWritePage
-.L1989:
-	ldrh	r3, [r10, #8]
-	cmp	r3, r7
-	beq	.L1990
-	ldr	r1, .L1991+4
-	movw	r2, #529
-	ldr	r0, .L1991+8
+.LVL2218:
+.L1996:
+	.loc 1 552 0
+	ldr	r3, [sp, #8]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r8
+	beq	.L1997
+	ldr	r1, .L2003+36
+	mov	r2, #552
+	ldr	r0, .L2003+12
 	bl	printf
-	ldr	r1, .L1991+12
-	ldr	r0, .L1991+16
+.LVL2219:
+	ldr	r1, .L2003+16
+	ldr	r0, .L2003+20
 	bl	printf
-.L1990:
-	ldr	r3, [r8]
+.LVL2220:
+.L1997:
+	.loc 1 555 0
+	ldr	r3, .L2003+24
 	movs	r1, #0
+	ldr	r3, [r3]
 	adds	r2, r3, r4
 	str	r1, [r2, #4]
-	strh	r7, [r3, r4]	@ movhi
+	.loc 1 556 0
+	strh	r8, [r3, r4]	@ movhi
 	b	.L1988
-.L1992:
+.L2004:
 	.align	2
-.L1991:
-	.word	.LANCHOR65
+.L2003:
+	.word	.LANCHOR56
+	.word	.LANCHOR72
 	.word	.LANCHOR212
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR96
+	.word	.LANCHOR67
+	.word	.LANCHOR66
+	.word	.LANCHOR213
 	.word	.LANCHOR128
-	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR97
 	.word	.LANCHOR199
 	.word	.LANCHOR185
-	.word	.LC37
+	.word	.LC40
 	.word	.LANCHOR124
-	.word	.LANCHOR95
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.log2phys,"ax",%progbits
+.LBE474:
+.LBE475:
+	.cfi_endproc
+.LFE354:
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	FtlReUsePrevPpa
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2007
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r1
-	mov	r10, r2
-	ldrh	r4, [r3]
-	adds	r3, r4, #7
-	movs	r4, #1
-	lsr	r8, r0, r3
-	lsls	r4, r4, r3
-	ldr	r3, .L2007+4
-	subs	r4, r4, #1
-	uxth	r8, r8
-	ands	r4, r4, r0
-	ldr	r3, [r3]
-	uxth	r4, r4
-	cmp	r0, r3
-	bcc	.L1994
-	ldr	r1, .L2007+8
-	movw	r2, #851
-	ldr	r0, .L2007+12
-	bl	printf
-	ldr	r1, .L2007+16
-	ldr	r0, .L2007+20
-	bl	printf
-.L1994:
-	ldr	r6, .L2007+24
-	mov	fp, #12
-	ldr	r3, .L2007+28
-	ldr	r1, [r6]
-	ldrh	r2, [r3]
-	movs	r3, #0
-.L1995:
-	uxth	r5, r3
-	cmp	r5, r2
-	bcc	.L2000
-	bl	select_l2p_ram_region
-	mul	fp, fp, r0
-	ldr	r3, [r6]
-	mov	r5, r0
-	ldrh	r1, [r3, fp]
-	add	r2, r3, fp
-	movw	r3, #65535
-	cmp	r1, r3
-	beq	.L2001
-	ldr	r3, [r2, #4]
-	cmp	r3, #0
-	bge	.L2001
-	bl	flush_l2p_region
-.L2001:
-	mov	r1, r5
-	mov	r0, r8
-	bl	load_l2p_region
-	b	.L1996
-.L2000:
-	adds	r3, r3, #1
-	mla	r0, fp, r3, r1
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r8
-	bne	.L1995
-.L1996:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r3, r3, r5, r2
-	cmp	r10, #0
-	bne	.L1997
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r4, lsl #2]
-	str	r3, [r7]
-.L1998:
-	ldr	r2, [r6]
-	movs	r3, #12
-	mla	r5, r3, r5, r2
-	ldr	r3, [r5, #4]
-	adds	r2, r3, #1
-	beq	.L2004
-	adds	r3, r3, #1
-	str	r3, [r5, #4]
-.L2004:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1997:
-	ldr	r1, [r7]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r4, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L2007+32
-	strh	r8, [r3]	@ movhi
-	b	.L1998
-.L2008:
-	.align	2
-.L2007:
-	.word	.LANCHOR55
-	.word	.LANCHOR71
-	.word	.LANCHOR213
-	.word	.LC4
-	.word	.LC5
-	.word	.LC6
-	.word	.LANCHOR95
-	.word	.LANCHOR66
-	.word	.LANCHOR96
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
-	.align	1
-	.global	FtlReUsePrevPpa
-	.syntax unified
-	.thumb
-	.thumb_func
-	.fpu softvfp
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+.LFB371:
+	.loc 1 1851 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2221:
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 1 1851 0
 	mov	r6, r0
-	ldr	r5, .L2019
+	.loc 1 1854 0
+	ldr	r5, .L2015
+	.loc 1 1852 0
 	ubfx	r0, r1, #10, #16
+.LVL2222:
+	.loc 1 1851 0
 	str	r1, [sp, #4]
+	.loc 1 1852 0
 	bl	P2V_block_in_plane
+.LVL2223:
+	.loc 1 1854 0
 	ldr	r2, [r5]
+	.loc 1 1852 0
 	mov	r7, r0
+.LVL2224:
+	.loc 1 1854 0
 	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L2010
-	ldr	r2, .L2019+4
+	bne	.L2006
+	.loc 1 1855 0
+	ldr	r2, .L2015+4
 	ldr	r4, [r2]
 	cmp	r4, #0
-	beq	.L2011
-	ldr	r2, .L2019+8
+	beq	.L2007
+.LBB476:
+	.loc 1 1859 0
+	ldr	r2, .L2015+8
+	.loc 1 1867 0
 	movw	lr, #65535
-	ldr	ip, .L2019+32
-	ldr	r0, .L2019+12
+	.loc 1 1859 0
+	ldr	ip, .L2015+32
+	.loc 1 1858 0
+	ldr	r0, .L2015+12
+.LVL2225:
+	.loc 1 1859 0
 	ldr	r2, [r2]
+	.loc 1 1858 0
 	ldrh	r1, [r0]
+.LVL2226:
 	mov	r8, r0
+	.loc 1 1859 0
 	subs	r4, r4, r2
 	asrs	r4, r4, #1
 	mul	r4, ip, r4
+	.loc 1 1867 0
 	mov	ip, #6
+	.loc 1 1859 0
 	uxth	r4, r4
-.L2012:
+.LVL2227:
+.L2008:
+	.loc 1 1860 0 discriminator 1
 	uxth	r0, r3
 	cmp	r1, r0
-	bls	.L2011
+	bls	.L2007
+	.loc 1 1861 0
 	cmp	r4, r7
-	bne	.L2013
+	bne	.L2009
+	.loc 1 1862 0
 	mov	r1, r4
-	ldr	r0, .L2019+4
+.LVL2228:
+	ldr	r0, .L2015+4
 	bl	List_remove_node
+.LVL2229:
 	ldrh	r3, [r8]
-	cbnz	r3, .L2014
-	ldr	r1, .L2019+16
-	movw	r2, #1825
-	ldr	r0, .L2019+20
+	cbnz	r3, .L2010
+	.loc 1 1862 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2015+16
+	movw	r2, #1862
+	ldr	r0, .L2015+20
 	bl	printf
-	ldr	r1, .L2019+24
-	ldr	r0, .L2019+28
+.LVL2230:
+	ldr	r1, .L2015+24
+	ldr	r0, .L2015+28
 	bl	printf
-.L2014:
+.LVL2231:
+.L2010:
+	.loc 1 1862 0 discriminator 3
 	ldrh	r3, [r8]
+	.loc 1 1863 0 is_stmt 1 discriminator 3
 	mov	r0, r4
+	.loc 1 1862 0 discriminator 3
 	subs	r3, r3, #1
 	strh	r3, [r8]	@ movhi
+	.loc 1 1863 0 discriminator 3
 	bl	INSERT_DATA_LIST
+.LVL2232:
+	.loc 1 1864 0 discriminator 3
 	ldr	r2, [r5]
 	ldrh	r3, [r2, r7, lsl #1]
-.L2010:
+.LVL2233:
+.L2006:
+.LBE476:
+	.loc 1 1873 0
 	adds	r3, r3, #1
 	strh	r3, [r2, r7, lsl #1]	@ movhi
-	b	.L2011
-.L2013:
+	b	.L2007
+.LVL2234:
+.L2009:
+.LBB477:
+	.loc 1 1867 0
 	mul	r4, ip, r4
+.LVL2235:
 	adds	r3, r3, #1
+.LVL2236:
 	ldrh	r4, [r2, r4]
 	cmp	r4, lr
-	bne	.L2012
-.L2011:
+	bne	.L2008
+.LVL2237:
+.L2007:
+.LBE477:
+	.loc 1 1875 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r6
 	bl	log2phys
+.LVL2238:
+	.loc 1 1876 0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2020:
+.LVL2239:
+.L2016:
 	.align	2
-.L2019:
-	.word	.LANCHOR82
-	.word	.LANCHOR86
-	.word	.LANCHOR80
+.L2015:
+	.word	.LANCHOR83
 	.word	.LANCHOR87
+	.word	.LANCHOR81
+	.word	.LANCHOR88
 	.word	.LANCHOR214
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
+	.word	.LC7
+	.word	.LC8
 	.word	-1431655765
+	.cfi_endproc
+.LFE371:
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -14179,107 +23320,191 @@ FtlReUsePrevPpa:
 	.fpu softvfp
 	.type	FtlVendorPartWrite, %function
 FtlVendorPartWrite:
+.LFB355:
+	.loc 1 911 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2033
+.LVL2240:
+	.loc 1 918 0
+	ldr	r3, .L2029
+	.loc 1 911 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 911 0
 	str	r2, [sp]
+	.loc 1 918 0
 	adds	r2, r0, r1
+.LVL2241:
+	.loc 1 911 0
 	mov	r7, r0
 	mov	r5, r1
+	.loc 1 918 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2029
-	ldr	r3, .L2033+4
+	bhi	.L2025
+	.loc 1 916 0
+	ldr	r3, .L2029+4
 	mov	r8, #0
 	ldrh	r6, [r3]
 	lsr	r6, r0, r6
 	lsl	fp, r6, #2
-.L2023:
-	cbnz	r5, .L2028
-.L2021:
+.LVL2242:
+.L2019:
+	.loc 1 921 0
+	cbnz	r5, .L2024
+.LVL2243:
+.L2017:
+	.loc 1 944 0
 	mov	r0, r8
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL2244:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2028:
-	ldr	r3, .L2033+8
+.LVL2245:
+.L2024:
+	.cfi_restore_state
+	.loc 1 922 0
+	ldr	r3, .L2029+8
+	.loc 1 923 0
 	mov	r0, r7
-	ldr	r10, .L2033+24
+	ldr	r10, .L2029+24
+	.loc 1 922 0
 	ldr	r3, [r3]
 	ldr	r2, [r3, fp]
-	ldr	r3, .L2033+12
+	.loc 1 923 0
+	ldr	r3, .L2029+12
+	.loc 1 922 0
 	str	r2, [sp, #12]
+.LVL2246:
+	.loc 1 923 0
 	ldrh	r3, [r3]
 	mov	r1, r3
 	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
+.LVL2247:
+	.loc 1 924 0
 	ldr	r3, [sp, #8]
+	.loc 1 925 0
 	ldr	r2, [sp, #12]
+	.loc 1 923 0
 	str	r1, [sp, #4]
+.LVL2248:
+	.loc 1 924 0
 	subs	r4, r3, r1
 	uxth	r4, r4
+.LVL2249:
+	.loc 1 925 0
 	cmp	r5, r4
+	.loc 1 926 0
 	it	cc
 	uxthcc	r4, r5
-	cbz	r2, .L2025
+.LVL2250:
+	.loc 1 927 0
+	cbz	r2, .L2021
+	.loc 1 927 0 is_stmt 0 discriminator 1
 	cmp	r4, r3
-	beq	.L2025
+	beq	.L2021
+	.loc 1 929 0 is_stmt 1
 	ldr	r3, [r10]
+	.loc 1 931 0
 	add	r0, sp, #20
+	.loc 1 928 0
 	str	r2, [sp, #24]
+	.loc 1 931 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 929 0
 	str	r3, [sp, #28]
+	.loc 1 930 0
 	movs	r3, #0
 	str	r3, [sp, #32]
+	.loc 1 931 0
 	bl	FlashReadPages
-.L2026:
+.LVL2251:
+.L2022:
+	.loc 1 935 0
 	lsls	r3, r4, #9
 	ldr	r0, [r10]
+	.loc 1 939 0
 	subs	r5, r5, r4
+.LVL2252:
+	.loc 1 935 0
 	mov	r2, r3
 	str	r3, [sp, #8]
 	ldm	sp, {r1, r3}
+	.loc 1 940 0
 	add	r7, r7, r4
+.LVL2253:
 	add	fp, fp, #4
+	.loc 1 935 0
 	add	r0, r0, r3, lsl #9
 	bl	ftl_memcpy
+.LVL2254:
+	.loc 1 936 0
 	ldr	r2, [r10]
 	mov	r1, r6
-	ldr	r0, .L2033+16
+	ldr	r0, .L2029+16
+	.loc 1 938 0
 	adds	r6, r6, #1
+.LVL2255:
+	.loc 1 936 0
 	bl	FtlMapWritePage
+.LVL2256:
+	.loc 1 941 0
 	ldr	r3, [sp]
+	.loc 1 937 0
 	adds	r0, r0, #1
 	it	eq
 	moveq	r8, #-1
+.LVL2257:
+	.loc 1 941 0
 	mov	r2, r3
 	ldr	r3, [sp, #8]
 	add	r2, r2, r3
 	str	r2, [sp]
-	b	.L2023
-.L2025:
-	ldr	r3, .L2033+20
+.LVL2258:
+	b	.L2019
+.LVL2259:
+.L2021:
+	.loc 1 933 0
+	ldr	r3, .L2029+20
 	movs	r1, #0
 	ldr	r0, [r10]
 	ldrh	r2, [r3]
+.LVL2260:
 	bl	ftl_memset
-	b	.L2026
-.L2029:
+.LVL2261:
+	b	.L2022
+.LVL2262:
+.L2025:
+	.loc 1 919 0
 	mov	r8, #-1
-	b	.L2021
-.L2034:
+	b	.L2017
+.L2030:
 	.align	2
-.L2033:
-	.word	.LANCHOR48
-	.word	.LANCHOR55
+.L2029:
+	.word	.LANCHOR49
+	.word	.LANCHOR56
 	.word	.LANCHOR191
-	.word	.LANCHOR54
+	.word	.LANCHOR55
 	.word	.LANCHOR215
-	.word	.LANCHOR56
+	.word	.LANCHOR57
 	.word	.LANCHOR182
+	.cfi_endproc
+.LFE355:
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -14290,83 +23515,112 @@ FtlVendorPartWrite:
 	.fpu softvfp
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
+.LFB377:
+	.loc 1 2410 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L2037
-	ldr	r3, .L2037+4
+	.loc 1 2411 0
+	ldr	r2, .L2033
+	ldr	r3, .L2033+4
 	ldr	r1, [r2]
 	cmp	r1, r3
-	bne	.L2035
-	ldr	r3, .L2037+8
+	bne	.L2031
+.LBB480:
+.LBB481:
+	.loc 1 2412 0
+	ldr	r3, .L2033+8
+	.loc 1 2427 0
 	movs	r1, #1
 	movs	r0, #0
+	.loc 1 2412 0
 	str	r3, [r2, #4]
-	ldr	r3, .L2037+12
+	.loc 1 2413 0
+	ldr	r3, .L2033+12
 	ldr	r3, [r3]
 	str	r3, [r2, #88]
-	ldr	r3, .L2037+16
+	.loc 1 2414 0
+	ldr	r3, .L2033+16
 	ldr	r3, [r3]
 	str	r3, [r2, #92]
-	ldr	r3, .L2037+20
+	.loc 1 2415 0
+	ldr	r3, .L2033+20
 	ldr	r3, [r3]
 	str	r3, [r2, #8]
-	ldr	r3, .L2037+24
+	.loc 1 2416 0
+	ldr	r3, .L2033+24
 	ldr	r3, [r3]
 	str	r3, [r2, #12]
-	ldr	r3, .L2037+28
+	.loc 1 2417 0
+	ldr	r3, .L2033+28
 	ldr	r3, [r3]
 	str	r3, [r2, #16]
-	ldr	r3, .L2037+32
+	.loc 1 2418 0
+	ldr	r3, .L2033+32
 	ldr	r3, [r3]
 	str	r3, [r2, #20]
-	ldr	r3, .L2037+36
+	.loc 1 2419 0
+	ldr	r3, .L2033+36
 	ldr	r3, [r3]
 	str	r3, [r2, #28]
-	ldr	r3, .L2037+40
+	.loc 1 2420 0
+	ldr	r3, .L2033+40
 	ldr	r3, [r3]
 	str	r3, [r2, #32]
-	ldr	r3, .L2037+44
+	.loc 1 2421 0
+	ldr	r3, .L2033+44
 	ldr	r3, [r3]
 	str	r3, [r2, #36]
-	ldr	r3, .L2037+48
+	.loc 1 2422 0
+	ldr	r3, .L2033+48
 	ldr	r3, [r3]
 	str	r3, [r2, #40]
-	ldr	r3, .L2037+52
+	.loc 1 2423 0
+	ldr	r3, .L2033+52
 	ldr	r3, [r3]
 	str	r3, [r2, #44]
-	ldr	r3, .L2037+56
+	.loc 1 2424 0
+	ldr	r3, .L2033+56
 	ldr	r3, [r3]
 	str	r3, [r2, #48]
-	ldr	r3, .L2037+60
+	.loc 1 2425 0
+	ldr	r3, .L2033+60
 	ldr	r3, [r3]
 	str	r3, [r2, #60]
-	ldr	r3, .L2037+64
+	.loc 1 2426 0
+	ldr	r3, .L2033+64
 	ldr	r3, [r3]
 	str	r3, [r2, #64]
+	.loc 1 2427 0
 	b	FtlVendorPartWrite
-.L2035:
+.LVL2263:
+.L2031:
 	bx	lr
-.L2038:
+.L2034:
 	.align	2
-.L2037:
-	.word	.LANCHOR136
+.L2033:
+	.word	.LANCHOR135
 	.word	1179929683
-	.word	1342177351
+	.word	1342177352
 	.word	.LANCHOR216
 	.word	.LANCHOR217
+	.word	.LANCHOR158
 	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR164
 	.word	.LANCHOR163
-	.word	.LANCHOR166
-	.word	.LANCHOR78
-	.word	.LANCHOR161
 	.word	.LANCHOR162
+	.word	.LANCHOR165
+	.word	.LANCHOR79
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
 	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR156
 	.word	.LANCHOR155
+	.word	.LANCHOR154
+.LBE481:
+.LBE480:
+	.cfi_endproc
+.LFE377:
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -14377,68 +23631,106 @@ Ftl_save_ext_data:
 	.fpu softvfp
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
+.LFB357:
+	.loc 1 988 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2264:
 	push	{r3, lr}
-	ldr	r3, .L2046
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 990 0
+	ldr	r3, .L2042
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2044
-	ldr	r3, .L2046+4
+	beq	.L2040
+	.loc 1 990 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2042+4
 	ldr	r3, [r3]
 	cmp	r3, #29
+	.loc 1 991 0 is_stmt 1 discriminator 1
 	ite	hi
 	movhi	r3, #32
 	movls	r3, #4
-.L2040:
-	ldr	r1, .L2046+8
+.L2036:
+.LVL2265:
+	.loc 1 992 0
+	ldr	r1, .L2042+8
 	ldrh	r2, [r1]
 	cmp	r2, #31
+	.loc 1 993 0
 	ittt	ls
 	addls	r2, r2, #1
+	.loc 1 994 0
 	movls	r3, #1
+.LVL2266:
+	.loc 1 993 0
 	strhls	r2, [r1]	@ movhi
-	ldr	r2, .L2046+12
-	cbnz	r0, .L2042
+.LVL2267:
+	ldr	r2, .L2042+12
+	.loc 1 996 0
+	cbnz	r0, .L2038
+	.loc 1 996 0 is_stmt 0 discriminator 1
 	ldr	r1, [r2]
 	ldr	r0, [r1, #20]
+.LVL2268:
 	ldr	r1, [r1, #16]
 	add	r3, r3, r0
+.LVL2269:
 	cmp	r1, r3
-	bcc	.L2043
-.L2042:
-	ldr	r2, [r2]
+	bcc	.L2039
+.L2038:
+	.loc 1 998 0 is_stmt 1
+	ldr	r3, [r2]
+	.loc 1 1003 0
 	movs	r0, #64
-	ldr	r3, [r2, #16]
-	str	r3, [r2, #20]
-	ldr	r3, .L2046+16
-	str	r3, [r2]
-	ldr	r3, .L2046+20
+	.loc 1 998 0
+	ldr	r1, [r3, #16]
+	str	r1, [r3, #20]
+	.loc 1 999 0
+	ldr	r1, .L2042+16
+	str	r1, [r3]
+	.loc 1 1000 0
+	ldr	r3, .L2042+20
+	ldr	r2, [r2]
 	ldrh	r1, [r3]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
+	.loc 1 1001 0
 	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
 	str	r3, [r2, #8]
+	.loc 1 1002 0
 	movs	r3, #0
 	str	r3, [r2, #4]
+	.loc 1 1003 0
 	bl	FtlVendorPartWrite
+.LVL2270:
+	.loc 1 1004 0
 	bl	Ftl_save_ext_data
-.L2043:
+.LVL2271:
+.L2039:
+	.loc 1 1006 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2044:
+.LVL2272:
+.L2040:
+	.loc 1 989 0
 	movs	r3, #32
-	b	.L2040
-.L2047:
+	b	.L2036
+.L2043:
 	.align	2
-.L2046:
-	.word	.LANCHOR101
-	.word	.LANCHOR168
+.L2042:
+	.word	.LANCHOR28
+	.word	.LANCHOR167
 	.word	.LANCHOR218
 	.word	.LANCHOR188
 	.word	1112818501
 	.word	.LANCHOR187
+	.cfi_endproc
+.LFE357:
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -14449,125 +23741,183 @@ FtlEctTblFlush:
 	.fpu softvfp
 	.type	allocate_new_data_superblock, %function
 allocate_new_data_superblock:
+.LFB387:
+	.loc 1 2979 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2075
+.LVL2273:
+	.loc 1 2982 0
+	ldr	r3, .L2071
+	.loc 1 2979 0
 	push	{r4, r5, r6, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 4, -16
+	.cfi_offset 5, -12
+	.cfi_offset 6, -8
+	.cfi_offset 14, -4
+	.loc 1 2979 0
 	mov	r4, r0
+	.loc 1 2980 0
 	ldrh	r5, [r0]
+.LVL2274:
+	.loc 1 2982 0
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bcs	.L2049
-	ldr	r1, .L2075+4
-	movw	r2, #2943
-	ldr	r0, .L2075+8
+	bcs	.L2045
+	.loc 1 2982 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2071+4
+	movw	r2, #2982
+	ldr	r0, .L2071+8
+.LVL2275:
 	bl	printf
-	ldr	r1, .L2075+12
-	ldr	r0, .L2075+16
+.LVL2276:
+	ldr	r1, .L2071+12
+	ldr	r0, .L2071+16
 	bl	printf
-.L2049:
-	ldr	r3, .L2075+20
+.LVL2277:
+.L2045:
+	.loc 1 2983 0 is_stmt 1
+	ldr	r3, .L2071+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2050
+	bne	.L2046
+	.loc 1 2985 0
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L2051
-	ldr	r3, .L2075+24
+	beq	.L2047
+	.loc 1 2986 0
+	ldr	r3, .L2071+24
+	.loc 1 2987 0
 	mov	r0, r5
+	.loc 1 2986 0
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L2052
+	cbz	r3, .L2048
+	.loc 1 2987 0
 	bl	INSERT_DATA_LIST
-.L2051:
+.LVL2278:
+.L2047:
+	.loc 1 2991 0
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L2075+28
+	.loc 1 2993 0
+	ldr	r3, .L2071+28
 	cmp	r4, r3
-	beq	.L2053
-	ldr	r3, .L2075+32
+	beq	.L2049
+	.loc 1 2993 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2071+32
 	ldrh	r2, [r3]
 	cmp	r2, #1
-	beq	.L2053
-	ldr	r3, .L2075+36
+	beq	.L2049
+	.loc 1 2993 0 discriminator 2
+	ldr	r3, .L2071+36
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2054
-.L2053:
+	cbz	r3, .L2050
+.L2049:
+	.loc 1 2994 0 is_stmt 1
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2055:
-	ldr	r6, .L2075+40
+.L2051:
+	.loc 1 3005 0
+	ldr	r6, .L2071+40
 	movw	r2, #65535
 	ldrh	r0, [r6]
 	cmp	r0, r2
-	beq	.L2060
+	beq	.L2056
+	.loc 1 3009 0
 	cmp	r5, r0
-	bne	.L2061
-	ldr	r3, .L2075+24
+	bne	.L2057
+	.loc 1 3009 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2071+24
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L2062
-.L2061:
+	cbz	r3, .L2058
+.L2057:
+	.loc 1 3010 0 is_stmt 1
 	bl	update_vpc_list
-.L2062:
+.LVL2279:
+.L2058:
+	.loc 1 3011 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2060:
+.L2056:
+	.loc 1 3013 0
 	mov	r0, r4
 	bl	allocate_data_superblock
+.LVL2280:
+	.loc 1 3014 0
 	bl	l2p_flush
+.LVL2281:
+	.loc 1 3015 0
 	movs	r0, #0
 	bl	FtlEctTblFlush
+.LVL2282:
+	.loc 1 3016 0
 	bl	FtlVpcTblFlush
-.L2050:
+.LVL2283:
+.L2046:
+	.loc 1 3018 0
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L2052:
+.LVL2284:
+.L2048:
+	.loc 1 2989 0
 	bl	INSERT_FREE_LIST
-	b	.L2051
-.L2054:
-	ldr	r3, .L2075+44
+.LVL2285:
+	b	.L2047
+.L2050:
+	.loc 1 2995 0
+	ldr	r3, .L2071+44
 	cmp	r4, r3
-	bne	.L2055
+	bne	.L2051
+	.loc 1 2996 0
 	cmp	r2, #3
-	beq	.L2057
-	ldr	r2, .L2075+48
+	beq	.L2053
+	.loc 1 2996 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2071+48
 	ldr	r2, [r2]
 	cmp	r2, #1
-	bne	.L2058
-.L2057:
+	bne	.L2054
+.L2053:
+	.loc 1 2997 0 is_stmt 1
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L2058:
-	ldr	r2, .L2075+52
+.L2054:
+	.loc 1 2998 0
+	ldr	r2, .L2071+52
 	ldr	r2, [r2]
 	cmp	r2, #0
-	beq	.L2055
-	ldr	r2, .L2075+56
+	beq	.L2051
+	.loc 1 2998 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2071+56
 	ldr	r2, [r2]
 	cmp	r2, #29
+	.loc 1 2999 0 is_stmt 1 discriminator 1
 	itt	ls
 	movls	r2, #1
 	strbls	r2, [r3, #8]
-	b	.L2055
-.L2076:
+	b	.L2051
+.L2072:
 	.align	2
-.L2075:
-	.word	.LANCHOR38
+.L2071:
+	.word	.LANCHOR39
 	.word	.LANCHOR219
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR75
-	.word	.LANCHOR82
-	.word	.LANCHOR91
-	.word	.LANCHOR42
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR76
+	.word	.LANCHOR83
+	.word	.LANCHOR92
+	.word	.LANCHOR43
 	.word	.LANCHOR8
 	.word	.LANCHOR130
-	.word	.LANCHOR90
-	.word	.LANCHOR156
-	.word	.LANCHOR101
-	.word	.LANCHOR168
+	.word	.LANCHOR91
+	.word	.LANCHOR155
+	.word	.LANCHOR28
+	.word	.LANCHOR167
+	.cfi_endproc
+.LFE387:
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -14578,151 +23928,239 @@ allocate_new_data_superblock:
 	.fpu softvfp
 	.type	FtlProgPages, %function
 FtlProgPages:
+.LFB306:
+	.loc 4 1531 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2286:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 1531 0
 	mov	r4, r3
-	ldr	r3, .L2096
+	.loc 4 1539 0
+	ldr	r3, .L2092
+.LVL2287:
+	.loc 4 1531 0
 	mov	r5, r0
 	mov	r8, r1
+	.loc 4 1539 0
 	ldrb	r6, [r3]	@ zero_extendqisi2
-	cbz	r6, .L2078
+	cbz	r6, .L2074
+	.loc 4 1539 0 is_stmt 0 discriminator 1
 	ldrb	r6, [r4, #8]	@ zero_extendqisi2
 	subs	r3, r6, #1
 	rsbs	r6, r3, #0
 	adcs	r6, r6, r3
-.L2078:
-	ldr	r10, .L2096+32
+.L2074:
+.LVL2288:
+	.loc 4 1548 0 is_stmt 1 discriminator 6
+	ldr	r10, .L2092+32
+	.loc 4 1544 0 discriminator 6
 	movs	r7, #0
+	.loc 4 1542 0 discriminator 6
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r2, r6
+.LVL2289:
 	mov	r1, r8
+.LVL2290:
 	mov	r0, r5
+.LVL2291:
 	bl	FlashProgPages
-.L2079:
+.LVL2292:
+.L2075:
+	.loc 4 1544 0 discriminator 1
 	cmp	r7, r8
-	beq	.L2088
-	ldr	fp, .L2096+36
-	b	.L2089
-.L2082:
+	beq	.L2084
+	.loc 4 1549 0
+	ldr	fp, .L2092+36
+	b	.L2085
+.L2078:
+	.loc 4 1546 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
+.LVL2293:
+	.loc 4 1547 0
 	ldrh	r3, [r4]
 	cmp	r3, r0
-	bne	.L2080
+	bne	.L2076
+	.loc 4 1548 0
 	ldr	r1, [r10]
 	ldrh	r0, [r4, #4]
+.LVL2294:
 	ldrh	r2, [r1, r3, lsl #1]
 	subs	r2, r2, r0
 	strh	r2, [r1, r3, lsl #1]	@ movhi
+	.loc 4 1549 0
 	ldrh	r3, [fp]
 	strh	r3, [r4, #2]	@ movhi
+	.loc 4 1550 0
 	movs	r3, #0
 	strb	r3, [r4, #6]
+	.loc 4 1551 0
 	strh	r3, [r4, #4]	@ movhi
-.L2080:
+.L2076:
+	.loc 4 1553 0
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2081
+	cbnz	r3, .L2077
+	.loc 4 1554 0
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L2081:
-	ldr	r2, .L2096+4
+.LVL2295:
+.L2077:
+	.loc 4 1557 0
+	ldr	r2, .L2092+4
 	ldr	r3, [r2, #96]
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
+	.loc 4 1558 0
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	FtlGcMarkBadPhyBlk
+.LVL2296:
+	.loc 4 1559 0
 	mov	r0, r4
 	bl	get_new_active_ppa
+.LVL2297:
+	.loc 4 1561 0
 	mov	r2, r6
+	.loc 4 1560 0
 	str	r0, [r5, #4]
+	.loc 4 1559 0
 	str	r0, [sp, #12]
+	.loc 4 1561 0
 	movs	r1, #1
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	FlashProgPages
-.L2089:
+.LVL2298:
+.L2085:
+	.loc 4 1545 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2082
-	ldr	r3, .L2096+8
+	beq	.L2078
+	.loc 4 1564 0
+	ldr	r3, .L2092+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2083
-	ldr	r1, .L2096+12
-	mov	r2, #1552
-	ldr	r0, .L2096+16
+	bcc	.L2079
+	.loc 4 1564 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2092+12
+	movw	r2, #1564
+	ldr	r0, .L2092+16
 	bl	printf
-	ldr	r1, .L2096+20
-	ldr	r0, .L2096+24
+.LVL2299:
+	ldr	r1, .L2092+20
+	ldr	r0, .L2092+24
 	bl	printf
-.L2083:
+.LVL2300:
+.L2079:
+	.loc 4 1565 0 is_stmt 1
 	ldr	r3, [r5, #4]
-	cbnz	r6, .L2084
-.L2095:
+	.loc 4 1566 0
+	cbnz	r6, .L2080
+.L2091:
+	.loc 4 1568 0
 	movs	r2, #1
 	add	r1, sp, #12
 	ldr	r0, [r5, #16]
+	.loc 4 1567 0
 	str	r3, [sp, #12]
+	.loc 4 1568 0
 	bl	log2phys
+.LVL2301:
+	.loc 4 1570 0
 	ldr	r3, [r5, #12]
 	ldr	r3, [r3, #12]
+.LVL2302:
+	.loc 4 1572 0
 	ubfx	r0, r3, #10, #16
 	str	r3, [sp, #4]
 	bl	P2V_block_in_plane
+.LVL2303:
+	.loc 4 1573 0
 	ldr	r3, [sp, #4]
+	.loc 4 1572 0
 	mov	fp, r0
+.LVL2304:
+	.loc 4 1573 0
 	adds	r3, r3, #1
-	beq	.L2086
+	beq	.L2082
+	.loc 4 1575 0
 	ldr	r3, [r10]
 	ldrh	r2, [r3, r0, lsl #1]
-	cbnz	r2, .L2087
+	cbnz	r2, .L2083
+	.loc 4 1576 0
 	mov	r1, r0
-	ldr	r0, .L2096+28
+	ldr	r0, .L2092+28
+.LVL2305:
 	bl	printf
-.L2087:
+.LVL2306:
+.L2083:
+	.loc 4 1577 0
 	mov	r0, fp
 	bl	decrement_vpc_count
-.L2086:
+.LVL2307:
+.L2082:
+	.loc 4 1544 0 discriminator 2
 	adds	r7, r7, #1
+.LVL2308:
 	adds	r5, r5, #36
-	b	.L2079
-.L2084:
+	b	.L2075
+.LVL2309:
+.L2080:
+	.loc 4 1567 0
 	orr	r3, r3, #-2147483648
-	b	.L2095
-.L2088:
-	ldr	r3, .L2096+8
+	b	.L2091
+.L2084:
+	.loc 4 1581 0
+	ldr	r3, .L2092+8
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2077
-	ldr	r1, .L2096+12
-	movw	r2, #1569
-	ldr	r0, .L2096+16
+	bcc	.L2073
+	.loc 4 1581 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2092+12
+	movw	r2, #1581
+	ldr	r0, .L2092+16
 	bl	printf
-	ldr	r1, .L2096+20
-	ldr	r0, .L2096+24
+.LVL2310:
+	ldr	r1, .L2092+20
+	ldr	r0, .L2092+24
 	bl	printf
-.L2077:
+.LVL2311:
+.L2073:
+	.loc 4 1582 0 is_stmt 1
 	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2097:
+.LVL2312:
+.L2093:
 	.align	2
-.L2096:
+.L2092:
 	.word	.LANCHOR8
-	.word	.LANCHOR136
-	.word	.LANCHOR36
+	.word	.LANCHOR135
+	.word	.LANCHOR37
 	.word	.LANCHOR220
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC38
-	.word	.LANCHOR82
-	.word	.LANCHOR51
+	.word	.LC7
+	.word	.LC8
+	.word	.LC41
+	.word	.LANCHOR83
+	.word	.LANCHOR52
+	.cfi_endproc
+.LFE306:
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -14733,27 +24171,40 @@ FtlProgPages:
 	.fpu softvfp
 	.type	FtlCacheWriteBack, %function
 FtlCacheWriteBack:
+.LFB307:
+	.loc 4 1585 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L2103
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 4 1586 0
+	ldr	r4, .L2099
 	ldr	r0, [r4]
-	cbz	r0, .L2099
-	ldr	r3, .L2103+4
+	cbz	r0, .L2095
+	.loc 4 1587 0
+	ldr	r3, .L2099+4
 	movs	r2, #0
 	movs	r1, #1
 	ldr	r3, [r3]
 	bl	FtlProgPages
+.LVL2313:
+	.loc 4 1588 0
 	movs	r3, #0
 	str	r3, [r4]
-.L2099:
+.L2095:
+	.loc 4 1591 0
 	movs	r0, #0
 	pop	{r4, pc}
-.L2104:
+.L2100:
 	.align	2
-.L2103:
+.L2099:
 	.word	.LANCHOR129
 	.word	.LANCHOR221
+	.cfi_endproc
+.LFE307:
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
@@ -14764,98 +24215,179 @@ FtlCacheWriteBack:
 	.fpu softvfp
 	.type	ftl_discard, %function
 ftl_discard:
+.LFB309:
+	.loc 4 1779 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2120
+.LVL2314:
+	.loc 4 1786 0
+	ldr	r3, .L2116
+	.loc 4 1779 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 4 1779 0
 	mov	r5, r2
+	.loc 4 1786 0
 	adds	r2, r1, r2
+.LVL2315:
+	.loc 4 1779 0
 	mov	r6, r1
+	.loc 4 1786 0
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2113
+	bhi	.L2109
+	.loc 4 1789 0
 	cmp	r5, #31
-	bhi	.L2107
-.L2112:
+	bhi	.L2103
+.LVL2316:
+.L2108:
+	.loc 4 1790 0
 	movs	r0, #0
-.L2105:
+.L2101:
+	.loc 4 1823 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L2107:
-	ldr	r8, .L2120+12
+.LVL2317:
+.L2103:
+	.cfi_restore_state
+	.loc 4 1794 0
+	ldr	r8, .L2116+12
+	.loc 4 1792 0
 	bl	FtlCacheWriteBack
+.LVL2318:
+	.loc 4 1794 0
 	mov	r0, r6
 	ldrh	r4, [r8]
 	mov	r1, r4
 	bl	__aeabi_uidiv
+.LVL2319:
+	.loc 4 1795 0
 	smulbb	r3, r0, r4
+	.loc 4 1794 0
 	mov	r7, r0
+.LVL2320:
+	.loc 4 1795 0
 	subs	r6, r6, r3
+.LVL2321:
 	uxth	r6, r6
-	cbz	r6, .L2108
+.LVL2322:
+	.loc 4 1796 0
+	cbz	r6, .L2104
+.LVL2323:
+	.loc 4 1797 0
 	subs	r4, r4, r6
+.LVL2324:
+	.loc 4 1798 0
 	adds	r7, r7, #1
+.LVL2325:
+	.loc 4 1797 0
 	cmp	r4, r5
 	it	cs
 	movcs	r4, r5
 	uxth	r4, r4
+	.loc 4 1799 0
 	subs	r5, r5, r4
-.L2108:
-	ldr	r4, .L2120+4
+.LVL2326:
+.L2104:
+	.loc 4 1806 0
+	ldr	r4, .L2116+4
+	.loc 4 1802 0
 	mov	r3, #-1
-	ldr	r6, .L2120+8
+	.loc 4 1807 0
+	ldr	r6, .L2116+8
+.LVL2327:
+	.loc 4 1802 0
 	str	r3, [sp, #4]
-.L2109:
+.L2105:
+	.loc 4 1803 0
 	ldrh	r3, [r8]
 	cmp	r5, r3
-	bcs	.L2111
-	ldr	r3, .L2120+4
+	bcs	.L2107
+	.loc 4 1816 0
+	ldr	r3, .L2116+4
 	ldr	r2, [r3]
 	cmp	r2, #32
-	bls	.L2112
+	bls	.L2108
+	.loc 4 1818 0
 	movs	r4, #0
 	str	r4, [r3]
+	.loc 4 1819 0
 	bl	l2p_flush
+.LVL2328:
+	.loc 4 1820 0
 	bl	FtlVpcTblFlush
-	b	.L2112
-.L2111:
+.LVL2329:
+	b	.L2108
+.L2107:
+	.loc 4 1804 0
 	movs	r2, #0
 	mov	r1, sp
 	mov	r0, r7
 	bl	log2phys
+.LVL2330:
+	.loc 4 1805 0
 	ldr	r3, [sp]
 	adds	r3, r3, #1
-	beq	.L2110
+	beq	.L2106
+	.loc 4 1806 0
 	ldr	r3, [r4]
+	.loc 4 1808 0
 	movs	r2, #1
 	add	r1, sp, #4
 	mov	r0, r7
+	.loc 4 1806 0
 	adds	r3, r3, #1
 	str	r3, [r4]
+	.loc 4 1807 0
 	ldr	r3, [r6]
 	adds	r3, r3, #1
 	str	r3, [r6]
+	.loc 4 1808 0
 	bl	log2phys
+.LVL2331:
+	.loc 4 1809 0
 	ldr	r0, [sp]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
+.LVL2332:
+	.loc 4 1810 0
 	bl	decrement_vpc_count
-.L2110:
+.LVL2333:
+.L2106:
+	.loc 4 1813 0
 	ldrh	r3, [r8]
+	.loc 4 1812 0
 	adds	r7, r7, #1
+.LVL2334:
+	.loc 4 1813 0
 	subs	r5, r5, r3
-	b	.L2109
-.L2113:
-	mov	r0, #-1
+.LVL2335:
 	b	.L2105
-.L2121:
+.LVL2336:
+.L2109:
+	.loc 4 1787 0
+	mov	r0, #-1
+.LVL2337:
+	b	.L2101
+.L2117:
 	.align	2
-.L2120:
-	.word	.LANCHOR67
+.L2116:
+	.word	.LANCHOR68
 	.word	.LANCHOR222
-	.word	.LANCHOR161
-	.word	.LANCHOR54
+	.word	.LANCHOR160
+	.word	.LANCHOR55
+	.cfi_endproc
+.LFE309:
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
@@ -14866,24 +24398,46 @@ ftl_discard:
 	.fpu softvfp
 	.type	FtlSysFlush, %function
 FtlSysFlush:
+.LFB303:
+	.loc 4 1003 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2124
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 4 1004 0
+	ldr	r3, .L2120
 	ldr	r3, [r3]
-	cbnz	r3, .L2123
+	cbnz	r3, .L2119
+.LBB484:
+.LBB485:
+	.loc 4 1007 0
 	bl	FtlCacheWriteBack
+.LVL2338:
+	.loc 4 1008 0
 	bl	l2p_flush
+.LVL2339:
+	.loc 4 1009 0
 	movs	r0, #1
 	bl	FtlEctTblFlush
+.LVL2340:
+	.loc 4 1010 0
 	bl	FtlVpcTblFlush
-.L2123:
+.LVL2341:
+.L2119:
+.LBE485:
+.LBE484:
+	.loc 4 1012 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2125:
+.L2121:
 	.align	2
-.L2124:
-	.word	.LANCHOR75
+.L2120:
+	.word	.LANCHOR76
+	.cfi_endproc
+.LFE303:
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
@@ -14894,21 +24448,33 @@ FtlSysFlush:
 	.fpu softvfp
 	.type	FtlDeInit, %function
 FtlDeInit:
+.LFB304:
+	.loc 4 1015 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2128
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 4 1016 0
+	ldr	r3, .L2124
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2127
+	bne	.L2123
+	.loc 4 1017 0
 	bl	FtlSysFlush
-.L2127:
+.LVL2342:
+.L2123:
+	.loc 4 1019 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2129:
+.L2125:
 	.align	2
-.L2128:
+.L2124:
 	.word	.LANCHOR223
+	.cfi_endproc
+.LFE304:
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
 	.align	1
@@ -14919,13 +24485,39 @@ FtlDeInit:
 	.fpu softvfp
 	.type	rk_ftl_de_init, %function
 rk_ftl_de_init:
+.LFB494:
+	.loc 7 121 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+.LBB486:
+.LBB487:
+	.loc 7 117 0
 	bl	FlashDeInit
+.LVL2343:
+.LBE487:
+.LBE486:
+	.loc 7 123 0
 	bl	FtlDeInit
+.LVL2344:
+	.loc 7 125 0
 	pop	{r3, lr}
+	.cfi_restore 14
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LBB488:
+.LBB489:
+	.loc 7 117 0
 	b	FlashDeInit
+.LVL2345:
+.LBE489:
+.LBE488:
+	.cfi_endproc
+.LFE494:
 	.size	rk_ftl_de_init, .-rk_ftl_de_init
 	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
@@ -14936,118 +24528,204 @@ rk_ftl_de_init:
 	.fpu softvfp
 	.type	FtlVendorPartRead, %function
 FtlVendorPartRead:
+.LFB356:
+	.loc 1 947 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2141
+.LVL2346:
+	.loc 1 955 0
+	ldr	r3, .L2137
+	.loc 1 947 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	r10, r2
+	.loc 1 955 0
 	adds	r2, r0, r1
+.LVL2347:
+	.loc 1 947 0
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 947 0
 	mov	r7, r0
 	mov	r6, r1
+	.loc 1 955 0
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2140
-	ldr	r3, .L2141+4
+	bhi	.L2136
+	.loc 1 952 0
+	ldr	r3, .L2137+4
 	mov	r8, #0
-	ldr	fp, .L2141+28
+	.loc 1 965 0
+	ldr	fp, .L2137+28
+	.loc 1 952 0
 	ldrh	r5, [r3]
 	lsr	r5, r0, r5
 	lsls	r3, r5, #2
 	str	r3, [sp]
-.L2133:
-	cbnz	r6, .L2139
-.L2131:
+.LVL2348:
+.L2129:
+	.loc 1 957 0
+	cbnz	r6, .L2135
+.LVL2349:
+.L2127:
+	.loc 1 984 0
 	mov	r0, r8
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2139:
-	ldr	r3, .L2141+8
+.LVL2350:
+.L2135:
+	.cfi_restore_state
+	.loc 1 958 0
+	ldr	r3, .L2137+8
+	.loc 1 959 0
 	mov	r0, r7
+	.loc 1 958 0
 	ldr	r2, [sp]
 	ldr	r3, [r3]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L2141+12
+	.loc 1 959 0
+	ldr	r2, .L2137+12
+	.loc 1 958 0
 	str	r3, [sp, #8]
+.LVL2351:
+	.loc 1 959 0
 	ldrh	r4, [r2]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
+.LVL2352:
+	.loc 1 960 0
 	subs	r4, r4, r1
+	.loc 1 961 0
 	ldr	r3, [sp, #8]
+	.loc 1 960 0
 	uxth	r4, r4
+	.loc 1 959 0
 	str	r1, [sp, #4]
+.LVL2353:
+	.loc 1 961 0
 	cmp	r6, r4
+	.loc 1 962 0
 	it	cc
 	uxthcc	r4, r6
+.LVL2354:
 	lsls	r2, r4, #9
 	str	r2, [sp, #8]
+.LVL2355:
+	.loc 1 963 0
 	cmp	r3, #0
-	beq	.L2135
+	beq	.L2131
+	.loc 1 965 0
 	ldr	r2, [fp]
+	.loc 1 967 0
 	add	r0, sp, #20
+	.loc 1 964 0
 	str	r3, [sp, #24]
 	str	r3, [sp, #12]
+	.loc 1 965 0
 	str	r2, [sp, #28]
+	.loc 1 966 0
 	movs	r2, #0
 	str	r2, [sp, #32]
+	.loc 1 967 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL2356:
+	.loc 1 968 0
 	ldr	r2, [sp, #20]
+	.loc 1 970 0
 	ldr	r3, [sp, #12]
+	.loc 1 969 0
 	adds	r2, r2, #1
-	ldr	r2, .L2141+16
+	.loc 1 970 0
+	ldr	r2, .L2137+16
+	.loc 1 969 0
 	it	eq
 	moveq	r8, #-1
+.LVL2357:
+	.loc 1 970 0
 	ldr	r2, [r2]
 	cmp	r2, #256
-	bne	.L2137
+	bne	.L2133
+	.loc 1 971 0
 	mov	r2, r3
 	mov	r1, r5
-	ldr	r0, .L2141+20
+	ldr	r0, .L2137+20
 	bl	printf
+.LVL2358:
+	.loc 1 972 0
 	ldr	r2, [fp]
 	mov	r1, r5
-	ldr	r0, .L2141+24
+	ldr	r0, .L2137+24
 	bl	FtlMapWritePage
-.L2137:
+.LVL2359:
+.L2133:
+	.loc 1 974 0
 	ldr	r1, [fp]
 	lsls	r2, r4, #9
 	ldr	r3, [sp, #4]
 	mov	r0, r10
 	add	r1, r1, r3, lsl #9
 	bl	ftl_memcpy
-.L2138:
+.LVL2360:
+.L2134:
+	.loc 1 981 0
 	ldr	r3, [sp, #8]
+	.loc 1 978 0
 	adds	r5, r5, #1
+.LVL2361:
+	.loc 1 979 0
 	subs	r6, r6, r4
+.LVL2362:
+	.loc 1 980 0
 	add	r7, r7, r4
+.LVL2363:
+	.loc 1 981 0
 	add	r10, r10, r3
+.LVL2364:
 	ldr	r3, [sp]
 	adds	r3, r3, #4
 	str	r3, [sp]
-	b	.L2133
-.L2135:
+	b	.L2129
+.LVL2365:
+.L2131:
+	.loc 1 976 0
 	lsls	r2, r4, #9
 	mov	r1, r3
 	mov	r0, r10
 	bl	ftl_memset
-	b	.L2138
-.L2140:
+.LVL2366:
+	b	.L2134
+.LVL2367:
+.L2136:
+	.loc 1 956 0
 	mov	r8, #-1
-	b	.L2131
-.L2142:
+	b	.L2127
+.L2138:
 	.align	2
-.L2141:
-	.word	.LANCHOR48
-	.word	.LANCHOR55
+.L2137:
+	.word	.LANCHOR49
+	.word	.LANCHOR56
 	.word	.LANCHOR191
-	.word	.LANCHOR54
+	.word	.LANCHOR55
 	.word	.LANCHOR199
-	.word	.LC39
+	.word	.LC42
 	.word	.LANCHOR215
 	.word	.LANCHOR182
+	.cfi_endproc
+.LFE356:
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
@@ -15058,39 +24736,61 @@ FtlVendorPartRead:
 	.fpu softvfp
 	.type	FtlLoadEctTbl, %function
 FtlLoadEctTbl:
+.LFB362:
+	.loc 1 1489 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 1490 0
 	movs	r0, #64
-	ldr	r4, .L2145
-	ldr	r5, .L2145+4
+	ldr	r4, .L2141
+	ldr	r5, .L2141+4
 	ldr	r2, [r4]
 	ldrh	r1, [r5]
 	bl	FtlVendorPartRead
+.LVL2368:
+	.loc 1 1491 0
 	ldr	r3, [r4]
 	ldr	r2, [r3]
-	ldr	r3, .L2145+8
+	ldr	r3, .L2141+8
 	cmp	r2, r3
-	beq	.L2144
-	ldr	r1, .L2145+12
-	ldr	r0, .L2145+16
+	beq	.L2140
+.LBB492:
+.LBB493:
+	.loc 1 1493 0
+	ldr	r1, .L2141+12
+	ldr	r0, .L2141+16
 	bl	printf
+.LVL2369:
+	.loc 1 1494 0
 	ldrh	r2, [r5]
 	movs	r1, #0
 	ldr	r0, [r4]
 	lsls	r2, r2, #9
 	bl	ftl_memset
-.L2144:
+.LVL2370:
+.L2140:
+.LBE493:
+.LBE492:
+	.loc 1 1499 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2146:
+.L2142:
 	.align	2
-.L2145:
+.L2141:
 	.word	.LANCHOR188
 	.word	.LANCHOR187
 	.word	1112818501
-	.word	.LC40
-	.word	.LC6
+	.word	.LC43
+	.word	.LC8
+	.cfi_endproc
+.LFE362:
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
@@ -15101,120 +24801,163 @@ FtlLoadEctTbl:
 	.fpu softvfp
 	.type	Ftl_load_ext_data, %function
 Ftl_load_ext_data:
+.LFB378:
+	.loc 1 2432 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 2433 0
 	movs	r1, #1
-	ldr	r4, .L2151
+	ldr	r4, .L2147
 	movs	r0, #0
-	ldr	r5, .L2151+4
+	.loc 1 2434 0
+	ldr	r5, .L2147+4
+	.loc 1 2433 0
 	mov	r2, r4
 	bl	FtlVendorPartRead
+.LVL2371:
+	.loc 1 2434 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	beq	.L2148
+	beq	.L2144
+	.loc 1 2435 0
 	mov	r2, #512
 	movs	r1, #0
 	mov	r0, r4
 	bl	ftl_memset
+.LVL2372:
+	.loc 1 2436 0
 	str	r5, [r4]
-.L2148:
+.L2144:
+	.loc 1 2439 0
 	ldr	r3, [r4]
 	cmp	r3, r5
-	ldr	r5, .L2151+8
-	bne	.L2149
+	ldr	r5, .L2147+8
+	bne	.L2145
+	.loc 1 2440 0
 	ldr	r2, [r4, #88]
-	ldr	r3, .L2151+12
+	ldr	r3, .L2147+12
 	str	r2, [r3]
+	.loc 1 2441 0
 	ldr	r2, [r4, #92]
-	ldr	r3, .L2151+16
+	ldr	r3, .L2147+16
 	str	r2, [r3]
+	.loc 1 2442 0
 	ldr	r2, [r4, #8]
-	ldr	r3, .L2151+20
+	ldr	r3, .L2147+20
 	str	r2, [r3]
+	.loc 1 2443 0
 	ldr	r2, [r4, #12]
-	ldr	r3, .L2151+24
+	ldr	r3, .L2147+24
 	str	r2, [r3]
+	.loc 1 2444 0
 	ldr	r2, [r4, #16]
-	ldr	r3, .L2151+28
+	ldr	r3, .L2147+28
 	str	r2, [r3]
+	.loc 1 2445 0
 	ldr	r2, [r4, #20]
-	ldr	r3, .L2151+32
+	ldr	r3, .L2147+32
 	str	r2, [r3]
+	.loc 1 2446 0
 	ldr	r3, [r4, #28]
+	.loc 1 2447 0
 	ldr	r2, [r4, #32]
+	.loc 1 2446 0
 	str	r3, [r5]
-	ldr	r3, .L2151+36
+	.loc 1 2447 0
+	ldr	r3, .L2147+36
 	str	r2, [r3]
+	.loc 1 2448 0
 	ldr	r2, [r4, #36]
-	ldr	r3, .L2151+40
+	ldr	r3, .L2147+40
 	str	r2, [r3]
+	.loc 1 2449 0
 	ldr	r2, [r4, #40]
-	ldr	r3, .L2151+44
+	ldr	r3, .L2147+44
 	str	r2, [r3]
+	.loc 1 2450 0
 	ldr	r2, [r4, #44]
-	ldr	r3, .L2151+48
+	ldr	r3, .L2147+48
 	str	r2, [r3]
+	.loc 1 2451 0
 	ldr	r2, [r4, #48]
-	ldr	r3, .L2151+52
+	ldr	r3, .L2147+52
 	str	r2, [r3]
+	.loc 1 2452 0
 	ldr	r2, [r4, #60]
-	ldr	r3, .L2151+56
+	ldr	r3, .L2147+56
 	str	r2, [r3]
-.L2149:
-	ldr	r3, .L2151+60
+.L2145:
+	.loc 1 2462 0
+	ldr	r3, .L2147+60
 	movs	r2, #0
 	str	r2, [r3]
+	.loc 1 2472 0
 	ldr	r2, [r4, #68]
-	ldr	r3, .L2151+64
+	ldr	r3, .L2147+64
 	cmp	r2, r3
-	bne	.L2150
-	ldr	r3, .L2151+68
+	bne	.L2146
+	.loc 1 2473 0
+	ldr	r3, .L2147+68
 	movs	r2, #1
-	ldr	r1, .L2151+72
-	ldr	r0, .L2151+76
+	.loc 1 2474 0
+	ldr	r1, .L2147+72
+	ldr	r0, .L2147+76
+	.loc 1 2473 0
 	str	r2, [r3]
+	.loc 1 2474 0
 	bl	printf
-.L2150:
-	ldr	r3, .L2151+80
-	ldr	r1, .L2151+84
+.LVL2373:
+.L2146:
+	.loc 1 2479 0
+	ldr	r3, .L2147+80
+	ldr	r1, .L2147+84
 	ldrh	r2, [r3]
-	ldr	r3, .L2151+88
+	ldr	r3, .L2147+88
 	ldrh	r1, [r1]
 	ldr	r0, [r3]
 	ldr	r3, [r5]
 	mla	r0, r0, r2, r3
 	bl	__aeabi_uidiv
-	ldr	r3, .L2151+92
+.LVL2374:
+	ldr	r3, .L2147+92
 	str	r0, [r3]
 	pop	{r3, r4, r5, pc}
-.L2152:
+.L2148:
 	.align	2
-.L2151:
-	.word	.LANCHOR136
+.L2147:
+	.word	.LANCHOR135
 	.word	1179929683
-	.word	.LANCHOR166
+	.word	.LANCHOR165
 	.word	.LANCHOR216
 	.word	.LANCHOR217
+	.word	.LANCHOR158
 	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR164
 	.word	.LANCHOR163
-	.word	.LANCHOR78
-	.word	.LANCHOR161
 	.word	.LANCHOR162
+	.word	.LANCHOR79
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
 	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR156
 	.word	.LANCHOR155
+	.word	.LANCHOR154
 	.word	305432421
-	.word	.LANCHOR101
-	.word	.LC41
-	.word	.LC6
-	.word	.LANCHOR46
-	.word	.LANCHOR38
-	.word	.LANCHOR165
+	.word	.LANCHOR28
+	.word	.LC44
+	.word	.LC8
+	.word	.LANCHOR47
+	.word	.LANCHOR39
+	.word	.LANCHOR164
 	.word	.LANCHOR202
+	.cfi_endproc
+.LFE378:
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
 	.align	1
@@ -15225,95 +24968,172 @@ Ftl_load_ext_data:
 	.fpu softvfp
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
+.LFB359:
+	.loc 1 1025 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2375:
 	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 3, -32
+	.cfi_offset 4, -28
+	.cfi_offset 5, -24
+	.cfi_offset 6, -20
+	.cfi_offset 7, -16
+	.cfi_offset 8, -12
+	.cfi_offset 10, -8
+	.cfi_offset 14, -4
+	.loc 1 1025 0
 	mov	r4, r0
+	.loc 1 1031 0
 	ldr	r3, [r0, #36]
 	cmp	r3, #0
-	beq	.L2153
+	beq	.L2149
+	.loc 1 1033 0
 	movs	r3, #0
+	.loc 1 1027 0
 	ldrh	r6, [r0, #6]
+	.loc 1 1033 0
 	str	r3, [r0, #36]
-	ldr	r3, .L2167
+	.loc 1 1034 0
+	ldr	r3, .L2163
+	.loc 1 1028 0
 	ldr	r10, [r0, #24]
+	.loc 1 1034 0
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2153
-	ldr	r3, .L2167+4
-	ldr	r5, .L2167+8
+	bne	.L2149
+	.loc 1 1036 0
+	ldr	r3, .L2163+4
+	ldr	r5, .L2163+8
 	ldr	r3, [r3]
 	mov	r7, r5
 	str	r3, [r5, #8]
-	ldr	r3, .L2167+12
+.LVL2376:
+	.loc 1 1037 0
+	ldr	r3, .L2163+12
 	ldr	r8, [r3]
-	ldrh	r3, [r0, #2]
 	str	r8, [r5, #12]
-	cbz	r3, .L2157
-	ldr	r2, .L2167+16
+	.loc 1 1040 0
+	ldrh	r3, [r0, #2]
+	cbz	r3, .L2153
+	.loc 1 1040 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2163+16
 	ldrh	r2, [r2]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L2157
+	bge	.L2153
+	.loc 1 1040 0 discriminator 2
 	ldrh	r2, [r0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L2157
+	beq	.L2153
+.LVL2377:
+.LBB494:
+	.loc 1 1044 0 is_stmt 1
 	ldr	r1, [r0, #12]
+	.loc 1 1046 0
 	subs	r3, r3, #1
+	.loc 1 1048 0
 	mov	r0, r5
+.LVL2378:
+	.loc 1 1044 0
 	ldrh	r2, [r1, r2, lsl #1]
+.LVL2379:
+	.loc 1 1046 0
 	orr	r3, r3, r2, lsl #10
+	.loc 1 1048 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1046 0
 	str	r3, [r5, #4]
+.LVL2380:
+	.loc 1 1048 0
 	bl	FlashReadPages
+.LVL2381:
+	.loc 1 1050 0
 	ldr	r3, [r5]
 	adds	r3, r3, #1
-	beq	.L2157
+	beq	.L2153
+	.loc 1 1050 0 is_stmt 0 discriminator 1
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r8, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L2157
+	bne	.L2153
+	.loc 1 1053 0 is_stmt 1
 	ldr	r2, [r5, #8]
-.L2166:
+.LVL2382:
+.L2162:
+.LBE494:
+	.loc 1 1070 0
 	mov	r0, r4
+	.loc 1 1072 0
 	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	.cfi_remember_state
+	.cfi_restore 14
+	.cfi_restore 10
+	.cfi_restore 8
+	.cfi_restore 7
+	.cfi_restore 6
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+.LVL2383:
+	.loc 1 1070 0
 	b	FtlMapWritePage
-.L2157:
+.LVL2384:
+.L2153:
+	.cfi_restore_state
+	.loc 1 1027 0
 	subs	r6, r6, #1
+	.loc 1 1059 0
 	uxth	r6, r6
 	ldr	r3, [r10, r6, lsl #2]
+.LVL2385:
+	.loc 1 1060 0
 	str	r3, [r7, #4]
-	cbz	r3, .L2158
+	.loc 1 1061 0
+	cbz	r3, .L2154
+	.loc 1 1063 0
 	movs	r2, #1
-	ldr	r0, .L2167+8
+	ldr	r0, .L2163+8
 	mov	r1, r2
 	bl	FlashReadPages
-.L2159:
+.LVL2386:
+.L2155:
+	.loc 1 1070 0
 	ldr	r2, [r7, #8]
 	mov	r1, r6
-	b	.L2166
-.L2158:
-	ldr	r3, .L2167+20
+	b	.L2162
+.LVL2387:
+.L2154:
+	.loc 1 1067 0
+	ldr	r3, .L2163+20
+.LVL2388:
 	movs	r1, #255
 	ldr	r0, [r7, #8]
 	ldrh	r2, [r3]
 	bl	ftl_memset
-	b	.L2159
-.L2153:
+.LVL2389:
+	b	.L2155
+.LVL2390:
+.L2149:
 	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
-.L2168:
+.L2164:
 	.align	2
-.L2167:
-	.word	.LANCHOR75
+.L2163:
+	.word	.LANCHOR76
 	.word	.LANCHOR181
 	.word	.LANCHOR199
 	.word	.LANCHOR185
-	.word	.LANCHOR52
-	.word	.LANCHOR56
+	.word	.LANCHOR53
+	.word	.LANCHOR57
+	.cfi_endproc
+.LFE359:
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -15324,544 +25144,793 @@ FtlMapBlkWriteDumpData:
 	.fpu softvfp
 	.type	FtlScanSysBlk, %function
 FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 32
+.LFB361:
+	.loc 1 1235 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1241 0
 	movs	r4, #0
-	ldr	r5, .L2251
-	sub	sp, sp, #32
+	.loc 1 1243 0
+	ldr	r5, .L2248
+	.loc 1 1235 0
+	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 1 1243 0
 	mov	r1, r4
-	ldr	r3, .L2251+4
+	ldr	r3, .L2248+4
 	ldr	r2, [r5]
-	ldr	r6, .L2251+8
-	strh	r4, [r3]	@ movhi
-	ldr	r3, .L2251+12
+	.loc 1 1242 0
+	ldr	r7, .L2248+8
+	.loc 1 1241 0
+	ldr	r6, .L2248+12
+	.loc 1 1243 0
+	ldr	r0, [r3]
 	lsls	r2, r2, #2
+	.loc 1 1242 0
+	strh	r4, [r7]	@ movhi
+	.loc 1 1241 0
 	strh	r4, [r6]	@ movhi
-	ldr	r7, .L2251+16
-	ldr	r0, [r3]
+	.loc 1 1243 0
 	bl	ftl_memset
+.LVL2391:
+	.loc 1 1244 0
 	ldr	r2, [r5]
 	mov	r1, r4
-	ldr	r3, .L2251+20
+	ldr	r5, .L2248+16
+	.loc 1 1245 0
+	ldr	r8, .L2248+88
+	.loc 1 1244 0
 	lsls	r2, r2, #1
-	ldr	r0, [r3]
+	ldr	r0, [r5]
 	bl	ftl_memset
-	ldrh	r2, [r7]
+.LVL2392:
+	.loc 1 1245 0
+	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L2251+24
+	ldr	r3, .L2248+20
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldrh	r2, [r7]
+.LVL2393:
+	.loc 1 1246 0
+	ldrh	r2, [r8]
 	mov	r1, r4
-	ldr	r3, .L2251+28
+	ldr	r3, .L2248+24
 	lsls	r2, r2, #1
 	ldr	r0, [r3]
 	bl	ftl_memset
+.LVL2394:
+	.loc 1 1247 0
 	movs	r2, #12
 	movs	r1, #255
-	ldr	r0, .L2251+32
+	ldr	r0, .L2248+28
 	bl	ftl_memset
-	ldr	r3, .L2251+36
-	str	r6, [sp, #12]
-	str	r5, [sp, #16]
+.LVL2395:
+	.loc 1 1249 0
+	ldr	r3, .L2248+32
+	str	r7, [sp, #12]
+	str	r5, [sp, #8]
 	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-.L2170:
-	ldr	r3, .L2251+40
-	ldr	r2, [sp, #4]
+	str	r3, [sp]
+.LVL2396:
+.L2166:
+	.loc 1 1249 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2248+36
+	ldr	r2, [sp]
 	ldrh	r3, [r3]
 	cmp	r3, r2
-	bls	.L2212
-	ldr	r3, .L2251+44
-	movs	r5, #0
-	ldr	r1, .L2251+48
-	mov	fp, r5
-	movs	r7, #36
-	ldrh	r8, [r3]
-	ldr	r3, .L2251+52
+	bls	.L2208
+	.loc 1 1253 0 is_stmt 1 discriminator 1
+	ldr	r3, .L2248+40
+	.loc 1 1260 0 discriminator 1
+	movs	r4, #0
+	ldr	r1, .L2248+44
+	mov	r7, r4
+	.loc 1 1258 0 discriminator 1
+	mov	r8, #36
+	.loc 1 1253 0 discriminator 1
+	ldrh	fp, [r3]
+	.loc 1 1258 0 discriminator 1
+	ldr	r3, .L2248+48
+	.loc 1 1260 0 discriminator 1
 	ldr	r2, [r1]
-	ldr	r1, .L2251+56
-	ldr	r6, [r3]
-	ldr	r3, .L2251+60
-	str	r2, [sp, #8]
+	ldr	r1, .L2248+52
+	.loc 1 1258 0 discriminator 1
+	ldr	r5, [r3]
+	.loc 1 1259 0 discriminator 1
+	ldr	r3, .L2248+56
+	.loc 1 1260 0 discriminator 1
 	ldrh	r10, [r1]
+	.loc 1 1259 0 discriminator 1
 	ldr	r3, [r3]
-	ldr	r2, .L2251+64
-	b	.L2213
-.L2172:
-	ldrb	r0, [r2, r5]	@ zero_extendqisi2
-	ldr	r1, [sp, #4]
-	str	r3, [sp, #28]
-	str	r2, [sp, #24]
+	b	.L2209
+.LVL2397:
+.L2168:
+	str	r3, [sp, #16]
+	.loc 1 1255 0
+	ldr	r3, .L2248+60
+	ldr	r1, [sp]
+	str	r2, [sp, #20]
+	ldrb	r0, [r3, r4]	@ zero_extendqisi2
 	bl	V2P_block
-	str	r0, [sp, #20]
+.LVL2398:
+	str	r0, [sp, #4]
+.LVL2399:
+	.loc 1 1256 0
 	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #24]
-	ldr	r3, [sp, #28]
-	cbnz	r0, .L2171
-	ldr	r1, [sp, #20]
-	mla	r0, r7, fp, r6
-	ldr	r4, [sp, #8]
+.LVL2400:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	cbnz	r0, .L2167
+	.loc 1 1258 0
+	ldr	r1, [sp, #4]
+	mla	r0, r8, r7, r5
 	lsls	r1, r1, #10
+	.loc 1 1259 0
 	str	r3, [r0, #8]
+	.loc 1 1258 0
 	str	r1, [r0, #4]
-	mul	r1, r10, fp
+	.loc 1 1260 0
+	mul	r1, r10, r7
+	.loc 1 1261 0
+	adds	r7, r7, #1
+.LVL2401:
+	uxth	r7, r7
+.LVL2402:
+	.loc 1 1260 0
 	bic	r1, r1, #3
-	add	r1, r1, r4
+	add	r1, r1, r2
 	str	r1, [r0, #12]
-	add	r1, fp, #1
-	uxth	fp, r1
-.L2171:
-	adds	r5, r5, #1
-.L2213:
-	uxth	r1, r5
-	cmp	r8, r1
-	bhi	.L2172
-	cmp	fp, #0
-	bne	.L2173
-.L2211:
-	ldr	r3, [sp, #4]
+.L2167:
+.LVL2403:
+	adds	r4, r4, #1
+.LVL2404:
+.L2209:
+	.loc 1 1253 0 discriminator 1
+	uxth	r1, r4
+	cmp	fp, r1
+	bhi	.L2168
+	.loc 1 1264 0
+	cbnz	r7, .L2169
+.LVL2405:
+.L2207:
+	.loc 1 1249 0
+	ldr	r3, [sp]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	str	r3, [sp, #4]
-	b	.L2170
-.L2173:
-	movs	r7, #0
+	str	r3, [sp]
+.LVL2406:
+	b	.L2166
+.LVL2407:
+.L2169:
+	.loc 1 1267 0
 	movs	r2, #1
-	mov	r1, fp
-	mov	r0, r6
+	mov	r1, r7
+	mov	r0, r5
 	bl	FlashReadPages
-.L2174:
-	uxth	r3, r7
-	cmp	fp, r3
-	bls	.L2211
-	ldr	r3, .L2251+52
+.LVL2408:
+	.loc 1 1268 0
+	movs	r3, #0
+.LVL2409:
+.L2246:
+	str	r3, [sp, #4]
+.LVL2410:
+	.loc 1 1268 0 is_stmt 0 discriminator 2
+	ldrh	r3, [sp, #4]
+	cmp	r7, r3
+	bls	.L2207
+	ldr	r3, [sp, #4]
 	mov	r8, #36
-	mul	r8, r8, r7
-	ldr	r3, [r3]
+	.loc 1 1269 0 is_stmt 1
+	ldr	fp, .L2248+48
+	mul	r8, r8, r3
+	ldr	r3, [fp]
 	add	r2, r3, r8
+	.loc 1 1272 0
 	ldr	r3, [r3, r8]
-	ldr	r5, [r2, #4]
-	ldr	r6, [r2, #12]
+	.loc 1 1269 0
+	ldr	r4, [r2, #4]
+	.loc 1 1270 0
+	ldr	r5, [r2, #12]
+	.loc 1 1272 0
 	adds	r3, r3, #1
-	ubfx	r5, r5, #10, #16
-	bne	.L2177
+	.loc 1 1269 0
+	ubfx	r4, r4, #10, #16
+.LVL2411:
+	.loc 1 1272 0
+	bne	.L2173
 	mov	r10, #16
-.L2179:
-	ldr	r3, .L2251+52
-	movs	r2, #1
-	mov	r1, r2
+	.loc 1 1274 0
+	mov	r3, fp
+.L2175:
+.LVL2412:
 	ldr	r0, [r3]
+	str	r3, [sp, #16]
 	add	r0, r0, r8
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
+	ldr	r2, [r0, #4]
+	adds	r2, r2, #1
+	str	r2, [r0, #4]
+	.loc 1 1275 0
+	movs	r2, #1
+	mov	r1, r2
 	bl	FlashReadPages
-	ldrh	r2, [r6]
-	movw	r3, #65535
-	cmp	r2, r3
-	ldr	r3, .L2251+52
-	ldr	r3, [r3]
-	bne	.L2176
+.LVL2413:
+	.loc 1 1276 0
+	ldrh	r1, [r5]
+	movw	r2, #65535
+	ldr	r3, [sp, #16]
+	cmp	r1, r2
+	bne	.L2172
+	.loc 1 1277 0
+	ldr	r3, [fp]
 	mov	r2, #-1
 	str	r2, [r3, r8]
-	ldr	r3, .L2251+52
-	ldr	r3, [r3]
+	.loc 1 1285 0
+	ldr	r3, [fp]
 	ldr	r3, [r3, r8]
 	cmp	r3, r2
-	beq	.L2178
-.L2177:
-	ldr	r3, .L2251+68
+	beq	.L2174
+.LVL2414:
+.L2173:
+	.loc 1 1287 0
+	ldr	r3, .L2248+64
 	ldr	r2, [r3]
-	ldr	r3, [r6, #4]
+	ldr	r3, [r5, #4]
 	adds	r1, r2, #1
-	beq	.L2180
+	beq	.L2176
+	.loc 1 1287 0 is_stmt 0 discriminator 1
 	cmp	r2, r3
-	bhi	.L2181
-.L2180:
+	bhi	.L2177
+.L2176:
+	.loc 1 1289 0 is_stmt 1
 	adds	r2, r3, #1
+	.loc 1 1292 0
 	ittt	ne
-	ldrne	r1, .L2251+68
+	ldrne	r1, .L2248+64
 	addne	r2, r3, #1
 	strne	r2, [r1]
-.L2181:
-	ldrh	r2, [r6]
+.L2177:
+	.loc 1 1297 0
+	ldrh	r2, [r5]
 	movw	r1, #61604
 	cmp	r2, r1
-	beq	.L2183
-	bhi	.L2184
+	beq	.L2179
+	bhi	.L2180
 	movw	r3, #61574
 	cmp	r2, r3
-	beq	.L2185
-.L2182:
-	adds	r7, r7, #1
-	b	.L2174
-.L2176:
-	ldr	r3, [r3, r8]
+	beq	.L2181
+.LVL2415:
+.L2178:
+	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L2177
+	b	.L2246
+.LVL2416:
+.L2172:
+	.loc 1 1279 0
+	ldr	r2, [r3]
+	ldr	r2, [r2, r8]
+	adds	r2, r2, #1
+	bne	.L2173
+.LVL2417:
 	add	r10, r10, #-1
+.LVL2418:
 	uxth	r10, r10
+	.loc 1 1273 0 discriminator 2
 	cmp	r10, #0
-	bne	.L2179
-.L2178:
-	ldr	r3, .L2251+72
+	bne	.L2175
+.L2174:
+	.loc 1 1439 0
+	ldr	r3, .L2248+68
 	ldrb	r1, [r3]	@ zero_extendqisi2
-	cbnz	r1, .L2250
-.L2209:
-	mov	r0, r5
+	cbnz	r1, .L2247
+.L2205:
+	.loc 1 1442 0
+	mov	r0, r4
 	bl	FtlFreeSysBlkQueueIn
-	b	.L2182
-.L2184:
+.LVL2419:
+	b	.L2178
+.L2180:
+	.loc 1 1297 0
 	movw	r3, #61634
 	cmp	r2, r3
-	beq	.L2186
+	beq	.L2182
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2182
-.L2250:
+	bne	.L2178
+.L2247:
+	.loc 1 1440 0
 	movs	r1, #0
-	b	.L2209
-.L2186:
-	ldr	r3, .L2251+8
-	ldrh	r2, [r3]
-	ldr	r3, .L2251
-	ldr	r3, [r3]
+	b	.L2205
+.L2182:
+	.loc 1 1302 0
+	ldr	r8, .L2248
+	ldrh	r2, [r6]
+	ldr	r3, [r8]
 	cmp	r2, r3
-	bls	.L2188
-	ldr	r1, .L2251+76
-	movw	r2, #1269
-	ldr	r0, .L2251+80
+	bls	.L2184
+	.loc 1 1302 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2248+72
+	movw	r2, #1302
+	ldr	r0, .L2248+76
 	bl	printf
-	ldr	r1, .L2251+84
-	ldr	r0, .L2251+88
+.LVL2420:
+	ldr	r1, .L2248+80
+	ldr	r0, .L2248+84
 	bl	printf
-.L2188:
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #12]
-	ldr	r1, [r3]
-	ldrh	r0, [r2]
-	ldr	r2, .L2251+12
-	uxth	r10, r1
-	ldr	ip, [r2]
-	add	r3, r10, #-1
-	sub	r10, r10, r0
-	add	r10, r10, #-1
+.LVL2421:
+.L2184:
+	.loc 1 1303 0 is_stmt 1
+	ldr	r1, [r8]
+	ldrh	r0, [r6]
+	.loc 1 1305 0
+	ldr	r2, .L2248+4
+	.loc 1 1303 0
+	uxth	ip, r1
+	.loc 1 1305 0
+	ldr	r10, [r2]
+	.loc 1 1303 0
+	add	r3, ip, #-1
+	sub	ip, ip, r0
+	add	ip, ip, #-1
 	sxth	r3, r3
-	sxth	r10, r10
-.L2189:
-	cmp	r3, r10
-	bgt	.L2195
+.LVL2422:
+	sxth	ip, ip
+.L2185:
+	.loc 1 1303 0 is_stmt 0 discriminator 1
+	cmp	r3, ip
+	bgt	.L2191
+	.loc 1 1329 0 is_stmt 1
 	cmp	r3, #0
-	bge	.L2228
-	b	.L2182
-.L2195:
-	ldr	r2, [ip, r3, lsl #2]
-	add	r8, ip, r3, lsl #2
-	ldr	r4, [r6, #4]
-	cmp	r4, r2
-	bls	.L2190
-	ldr	r2, [ip]
-	cbnz	r2, .L2191
+	bge	.L2224
+	b	.L2178
+.L2191:
+	.loc 1 1305 0
+	ldr	r2, [r5, #4]
+	lsl	r8, r3, #2
+	mov	lr, r2
+	ldr	r2, [r10, r3, lsl #2]
+	cmp	lr, r2
+	bls	.L2186
+	.loc 1 1307 0
+	ldr	r2, [r10]
+	cbnz	r2, .L2187
+	.loc 1 1307 0 is_stmt 0 discriminator 1
 	cmp	r1, r0
-	ittt	ne
-	ldrne	r2, .L2251+8
+	.loc 1 1315 0 is_stmt 1 discriminator 1
+	itt	ne
 	addne	r0, r0, #1
-	strhne	r0, [r2]	@ movhi
-.L2191:
-	ldr	r2, .L2251+20
+	strhne	r0, [r6]	@ movhi
+.L2187:
+	ldr	ip, .L2248+4
+	.loc 1 1318 0 discriminator 1
 	uxth	r10, r3
-	ldr	r0, [r2]
+	ldr	r0, .L2248+16
 	movs	r2, #0
-.L2192:
+.L2188:
 	uxth	lr, r2
 	sxth	r1, r2
+.LVL2423:
 	cmp	r10, lr
-	bhi	.L2193
-	ldr	r2, [r6, #4]
+	bhi	.L2189
+	.loc 1 1323 0
+	ldr	r2, [r5, #4]
+	.loc 1 1329 0
 	cmp	r3, #0
-	str	r2, [r8]
-	strh	r5, [r0, r3, lsl #1]	@ movhi
-	blt	.L2182
-	ldr	r2, .L2251+8
-	ldrh	r0, [r2]
-	ldr	r2, .L2251
+	.loc 1 1323 0
+	ldr	r1, [ip]
+.LVL2424:
+	str	r2, [r1, r8]
+	.loc 1 1324 0
+	ldr	r2, [r0]
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+	.loc 1 1329 0
+	blt	.L2178
+	.loc 1 1339 0
+	ldr	r2, .L2248
+	ldrh	r0, [r6]
 	ldr	r2, [r2]
 	subs	r2, r2, r0
 	subs	r2, r2, #1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2182
-.L2228:
-	ldr	r2, .L2251+8
+	bgt	.L2178
+.LVL2425:
+.L2224:
+	.loc 1 1342 0
+	ldr	r2, .L2248+4
+	.loc 1 1341 0
 	adds	r0, r0, #1
-	strh	r0, [r2]	@ movhi
-	ldr	r2, [r6, #4]
-	str	r2, [ip, r3, lsl #2]
-	ldr	r2, .L2251+20
-.L2248:
+	.loc 1 1342 0
+	ldr	r1, [r5, #4]
+	.loc 1 1341 0
+	strh	r0, [r6]	@ movhi
+	.loc 1 1342 0
 	ldr	r2, [r2]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L2182
-.L2193:
-	add	lr, ip, r1, lsl #2
+	str	r1, [r2, r3, lsl #2]
+	.loc 1 1343 0
+	ldr	r2, .L2248+16
+.L2244:
+	.loc 1 1393 0
+	ldr	r2, [r2]
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+.LVL2426:
+	b	.L2178
+.LVL2427:
+.L2189:
+	.loc 1 1320 0 discriminator 3
+	ldr	lr, [ip]
 	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, r0, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [ip, r1, lsl #2]
-	strh	lr, [r0, r1, lsl #1]	@ movhi
-	b	.L2192
-.L2190:
+	add	fp, lr, r1, lsl #2
+	ldr	fp, [fp, #4]
+	str	fp, [lr, r1, lsl #2]
+	.loc 1 1321 0 discriminator 3
+	ldr	lr, [r0]
+	add	fp, lr, r1, lsl #1
+	ldrh	fp, [fp, #2]
+	strh	fp, [lr, r1, lsl #1]	@ movhi
+.LVL2428:
+	b	.L2188
+.L2186:
 	subs	r3, r3, #1
+.LVL2429:
 	sxth	r3, r3
-	b	.L2189
-.L2252:
+.LVL2430:
+	b	.L2185
+.L2249:
 	.align	2
-.L2251:
-	.word	.LANCHOR63
-	.word	.LANCHOR69
-	.word	.LANCHOR125
+.L2248:
+	.word	.LANCHOR64
 	.word	.LANCHOR127
-	.word	.LANCHOR60
+	.word	.LANCHOR70
+	.word	.LANCHOR125
 	.word	.LANCHOR126
 	.word	.LANCHOR190
-	.word	.LANCHOR70
+	.word	.LANCHOR71
 	.word	.LANCHOR206
-	.word	.LANCHOR38
 	.word	.LANCHOR39
-	.word	.LANCHOR36
+	.word	.LANCHOR40
+	.word	.LANCHOR37
 	.word	.LANCHOR105
-	.word	.LANCHOR178
-	.word	.LANCHOR57
+	.word	.LANCHOR177
+	.word	.LANCHOR58
 	.word	.LANCHOR104
-	.word	.LANCHOR45
-	.word	.LANCHOR157
+	.word	.LANCHOR46
+	.word	.LANCHOR156
 	.word	.LANCHOR8
 	.word	.LANCHOR224
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-.L2185:
-	ldr	r8, .L2253+20
-	ldr	r10, .L2253+28
-	ldrh	r2, [r8]
-	ldrh	r3, [r10]
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR61
+.LVL2431:
+.L2181:
+	.loc 1 1349 0
+	ldr	r3, [sp, #12]
+	ldr	r8, .L2250+28
+	ldrh	r2, [r3]
+	ldrh	r3, [r8]
 	cmp	r2, r3
-	bls	.L2198
-	ldr	r1, .L2253
-	movw	r2, #1316
-	ldr	r0, .L2253+4
+	bls	.L2194
+	.loc 1 1349 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2250
+	movw	r2, #1349
+	ldr	r0, .L2250+4
 	bl	printf
-	ldr	r1, .L2253+8
-	ldr	r0, .L2253+12
+.LVL2432:
+	ldr	r1, .L2250+8
+	ldr	r0, .L2250+12
 	bl	printf
-.L2198:
-	ldr	r2, .L2253+16
-	ldrh	lr, [r10]
-	ldrh	ip, [r8]
-	ldr	r0, [r2]
-	add	r10, lr, #-1
-	sxth	r3, r10
-	sub	r10, r10, ip
-.L2199:
-	cmp	r3, r10
-	ble	.L2204
-	ldr	r1, [r6, #4]
-	add	r8, r0, r3, lsl #2
-	ldr	r2, [r0, r3, lsl #2]
-	cmp	r1, r2
-	bls	.L2200
-	ldr	r2, [r0]
-	cbnz	r2, .L2201
-	cmp	lr, ip
+.LVL2433:
+.L2194:
+	.loc 1 1350 0 is_stmt 1
+	ldr	r2, .L2250+16
+	ldrh	lr, [r8]
+	ldrh	r0, [r2]
+	.loc 1 1352 0
+	ldr	r2, .L2250+20
+	.loc 1 1350 0
+	add	ip, lr, #-1
+	sxth	r3, ip
+.LVL2434:
+	sub	ip, ip, r0
+	.loc 1 1352 0
+	ldr	r10, [r2]
+.L2195:
+	.loc 1 1350 0 discriminator 1
+	cmp	r3, ip
+	ble	.L2200
+	.loc 1 1352 0
+	ldr	r2, [r5, #4]
+	lsl	r8, r3, #2
+	ldr	r1, [r10, r3, lsl #2]
+	cmp	r2, r1
+	bls	.L2196
+	.loc 1 1354 0
+	ldr	r2, [r10]
+	cbnz	r2, .L2197
+	.loc 1 1354 0 is_stmt 0 discriminator 1
+	cmp	lr, r0
+	.loc 1 1365 0 is_stmt 1 discriminator 1
 	ittt	ne
-	ldrne	r2, .L2253+20
-	addne	ip, ip, #1
-	strhne	ip, [r2]	@ movhi
-.L2201:
-	ldr	r2, .L2253+24
+	ldrne	r2, .L2250+16
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L2197:
+	ldr	ip, .L2250+20
+	.loc 1 1367 0 discriminator 1
 	uxth	r10, r3
-	ldr	ip, [r2]
+	ldr	r0, .L2250+24
 	movs	r2, #0
-.L2202:
+.L2198:
 	uxth	lr, r2
 	sxth	r1, r2
+.LVL2435:
 	cmp	r10, lr
-	bhi	.L2203
-	ldr	r2, [r6, #4]
-	str	r2, [r8]
-	strh	r5, [ip, r3, lsl #1]	@ movhi
-.L2204:
+	bhi	.L2199
+	.loc 1 1372 0
+	ldr	r2, [r5, #4]
+	ldr	r1, [ip]
+.LVL2436:
+	str	r2, [r1, r8]
+	.loc 1 1373 0
+	ldr	r2, [r0]
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+.LVL2437:
+.L2200:
+	.loc 1 1378 0
 	cmp	r3, #0
-	blt	.L2182
-	ldr	r2, .L2253+28
-	ldr	ip, .L2253+20
+	blt	.L2178
+	.loc 1 1389 0
+	ldr	r2, .L2250+28
+	ldr	r0, .L2250+16
 	ldrh	r2, [r2]
-	ldrh	r1, [ip]
+	ldrh	r1, [r0]
 	subs	r2, r2, #1
 	subs	r2, r2, r1
 	sxth	r2, r2
 	cmp	r3, r2
-	bgt	.L2182
-	ldr	r2, [r6, #4]
+	bgt	.L2178
+	.loc 1 1392 0
+	ldr	r2, .L2250+20
+	.loc 1 1391 0
 	adds	r1, r1, #1
-	strh	r1, [ip]	@ movhi
-	str	r2, [r0, r3, lsl #2]
-	ldr	r2, .L2253+24
-	b	.L2248
-.L2203:
-	add	lr, r0, r1, lsl #2
+	strh	r1, [r0]	@ movhi
+	.loc 1 1392 0
+	ldr	r1, [r5, #4]
+	ldr	r2, [r2]
+	str	r1, [r2, r3, lsl #2]
+	.loc 1 1393 0
+	ldr	r2, .L2250+24
+	b	.L2244
+.LVL2438:
+.L2199:
+	.loc 1 1369 0 discriminator 3
+	ldr	lr, [ip]
 	adds	r2, r2, #1
-	ldr	r4, [lr, #4]
-	add	lr, ip, r1, lsl #1
-	ldrh	lr, [lr, #2]
-	str	r4, [r0, r1, lsl #2]
-	strh	lr, [ip, r1, lsl #1]	@ movhi
-	b	.L2202
-.L2200:
+	add	fp, lr, r1, lsl #2
+	ldr	fp, [fp, #4]
+	str	fp, [lr, r1, lsl #2]
+	.loc 1 1370 0 discriminator 3
+	ldr	lr, [r0]
+	add	fp, lr, r1, lsl #1
+	ldrh	fp, [fp, #2]
+	strh	fp, [lr, r1, lsl #1]	@ movhi
+.LVL2439:
+	b	.L2198
+.L2196:
 	subs	r3, r3, #1
+.LVL2440:
 	sxth	r3, r3
-	b	.L2199
-.L2183:
-	ldr	r8, .L2253+48
+.LVL2441:
+	b	.L2195
+.LVL2442:
+.L2179:
+	.loc 1 1400 0
+	ldr	r8, .L2250+44
 	movw	r2, #65535
 	ldrh	r1, [r8]
 	cmp	r1, r2
-	bne	.L2206
-.L2249:
-	strh	r5, [r8]	@ movhi
+	bne	.L2202
+	.loc 1 1402 0
+	strh	r4, [r8]	@ movhi
+.L2245:
+	.loc 1 1413 0
 	str	r3, [r8, #8]
-	b	.L2182
-.L2206:
+	b	.L2178
+.L2202:
+	.loc 1 1407 0
 	ldrh	r0, [r8, #4]
 	cmp	r0, r2
-	beq	.L2207
+	beq	.L2203
+	.loc 1 1408 0
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L2207:
-	ldr	r3, [r6, #4]
+.LVL2443:
+.L2203:
+	.loc 1 1409 0
 	ldr	r2, [r8, #8]
+	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bcs	.L2208
-	ldrh	r2, [r8]
-	strh	r2, [r8, #4]	@ movhi
-	b	.L2249
+	bcs	.L2204
+	.loc 1 1411 0
+	ldrh	r3, [r8]
+	.loc 1 1412 0
+	strh	r4, [r8]	@ movhi
+	.loc 1 1411 0
+	strh	r3, [r8, #4]	@ movhi
+	.loc 1 1413 0
+	ldr	r3, [r5, #4]
+	b	.L2245
+.L2204:
+	.loc 1 1417 0
+	strh	r4, [r8, #4]	@ movhi
+	b	.L2178
+.LVL2444:
 .L2208:
-	strh	r5, [r8, #4]	@ movhi
-	b	.L2182
-.L2212:
-	ldr	r3, .L2253+32
+	.loc 1 1447 0
+	ldr	r3, .L2250+32
 	ldr	r2, [r3]
 	ldrh	r3, [r2]
-	cbz	r3, .L2214
-.L2217:
-	ldr	r3, .L2253+24
-	ldr	r4, [r3]
-	ldrh	r2, [r4]
+	cbz	r3, .L2210
+.L2213:
+	.loc 1 1465 0
+	ldr	r1, .L2250+24
+	ldr	r0, [r1]
+	ldrh	r2, [r0]
 	cmp	r2, #0
-	beq	.L2215
-.L2216:
-	ldr	r3, .L2253+36
-	ldrh	r2, [r3]
-	ldr	r3, .L2253+40
+	beq	.L2211
+.L2212:
+	.loc 1 1483 0
+	ldr	r3, .L2250+36
+	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bls	.L2247
-	ldr	r1, .L2253
-	movw	r2, #1450
-	ldr	r0, .L2253+4
+	bls	.L2243
+	.loc 1 1483 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2250
+	movw	r2, #1483
+	ldr	r0, .L2250+4
 	bl	printf
-	ldr	r1, .L2253+8
-	ldr	r0, .L2253+12
+.LVL2445:
+	ldr	r1, .L2250+8
+	ldr	r0, .L2250+12
 	bl	printf
-.L2247:
+.LVL2446:
+.L2243:
+	.loc 1 1485 0 is_stmt 1
 	movs	r0, #0
-	add	sp, sp, #32
+	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
+.LVL2447:
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2214:
-	ldr	r1, .L2253+36
-	ldrh	r1, [r1]
+.LVL2448:
+.L2210:
+	.cfi_restore_state
+	.loc 1 1447 0 discriminator 1
+	ldrh	r1, [r6]
 	cmp	r1, #0
-	beq	.L2217
-	ldr	r5, .L2253+40
+	beq	.L2213
+	.loc 1 1449 0 discriminator 1
+	ldr	r5, .L2250+36
 	ldr	r0, [r5]
-.L2218:
-	sxth	r1, r3
-	cmp	r1, r0
-	bcs	.L2217
-	ldrh	r4, [r2, r1, lsl #1]
+.L2214:
+	sxth	r4, r3
+.LVL2449:
+	cmp	r4, r0
+	bcs	.L2213
+	.loc 1 1451 0
+	ldrh	r1, [r2, r4, lsl #1]
 	adds	r3, r3, #1
-	cmp	r4, #0
-	beq	.L2218
-	ldr	r3, .L2253+44
-	movs	r6, #0
-	ldr	r0, [r3]
-	mov	r3, r1
-.L2219:
-	ldr	r4, [r5]
-	cmp	r3, r4
-	bcs	.L2217
-	ldrh	r7, [r2, r3, lsl #1]
-	subs	r4, r3, r1
-	strh	r7, [r2, r4, lsl #1]	@ movhi
-	ldr	r7, [r0, r3, lsl #2]
-	str	r7, [r0, r4, lsl #2]
-	strh	r6, [r2, r3, lsl #1]	@ movhi
+	cmp	r1, #0
+	beq	.L2214
+	.loc 1 1456 0 discriminator 1
+	ldr	r7, .L2250+40
+	mov	r3, r4
+	.loc 1 1457 0 discriminator 1
+	mov	ip, #0
+.L2215:
+.LVL2450:
+	.loc 1 1453 0 discriminator 1
+	ldr	r2, [r5]
+	cmp	r3, r2
+	bcs	.L2213
+	.loc 1 1455 0 discriminator 3
+	ldr	r2, [sp, #8]
+	subs	r1, r3, r4
+	ldr	r2, [r2]
+	ldrh	r0, [r2, r3, lsl #1]
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	.loc 1 1456 0 discriminator 3
+	ldr	r2, [r7]
+	ldr	r0, [r2, r3, lsl #2]
+	str	r0, [r2, r1, lsl #2]
+	.loc 1 1457 0 discriminator 3
+	ldr	r2, [sp, #8]
+	ldr	r2, [r2]
+	strh	ip, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
+.LVL2451:
 	sxth	r3, r3
-	b	.L2219
-.L2215:
-	ldr	r3, .L2253+20
+.LVL2452:
+	b	.L2215
+.LVL2453:
+.L2211:
+	.loc 1 1465 0 discriminator 1
+	ldr	r3, .L2250+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2216
-	ldr	r5, .L2253+28
-	ldrh	r1, [r5]
-.L2224:
+	beq	.L2212
+	.loc 1 1467 0 discriminator 1
+	ldr	r4, .L2250+28
+	ldrh	r5, [r4]
+.L2220:
 	sxth	r3, r2
-	cmp	r3, r1
-	mov	r6, r3
-	bge	.L2216
-	ldrh	r0, [r4, r3, lsl #1]
+.LVL2454:
+	cmp	r3, r5
+	mov	r7, r3
+	bge	.L2212
+	.loc 1 1469 0
+	ldrh	ip, [r0, r3, lsl #1]
 	adds	r2, r2, #1
-	cmp	r0, #0
-	beq	.L2224
-	ldr	r2, .L2253+16
-	movs	r0, #0
-	ldr	r2, [r2]
-.L2225:
-	ldrh	r1, [r5]
-	cmp	r3, r1
-	bge	.L2216
-	ldrh	r7, [r4, r3, lsl #1]
-	subs	r1, r3, r6
-	strh	r7, [r4, r1, lsl #1]	@ movhi
-	ldr	r7, [r2, r3, lsl #2]
-	str	r7, [r2, r1, lsl #2]
-	adds	r1, r3, #1
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-	sxth	r3, r1
-	b	.L2225
-.L2254:
+	cmp	ip, #0
+	beq	.L2220
+	.loc 1 1474 0 discriminator 1
+	ldr	ip, .L2250+20
+	.loc 1 1475 0 discriminator 1
+	mov	lr, #0
+.LVL2455:
+.L2221:
+	.loc 1 1471 0 discriminator 1
+	ldrh	r2, [r4]
+	cmp	r3, r2
+	bge	.L2212
+	.loc 1 1473 0 discriminator 3
+	ldr	r2, [r1]
+	subs	r0, r3, r7
+	ldrh	r5, [r2, r3, lsl #1]
+	strh	r5, [r2, r0, lsl #1]	@ movhi
+	.loc 1 1474 0 discriminator 3
+	ldr	r2, [ip]
+	ldr	r5, [r2, r3, lsl #2]
+	str	r5, [r2, r0, lsl #2]
+	.loc 1 1475 0 discriminator 3
+	ldr	r2, [r1]
+	strh	lr, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+.LVL2456:
+	sxth	r3, r3
+.LVL2457:
+	b	.L2221
+.L2251:
 	.align	2
-.L2253:
+.L2250:
 	.word	.LANCHOR224
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR190
-	.word	.LANCHOR69
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR70
-	.word	.LANCHOR60
+	.word	.LANCHOR190
+	.word	.LANCHOR71
+	.word	.LANCHOR61
 	.word	.LANCHOR126
-	.word	.LANCHOR125
-	.word	.LANCHOR63
+	.word	.LANCHOR64
 	.word	.LANCHOR127
 	.word	.LANCHOR206
+	.cfi_endproc
+.LFE361:
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -15872,76 +25941,127 @@ FtlScanSysBlk:
 	.fpu softvfp
 	.type	FtlLoadSysInfo, %function
 FtlLoadSysInfo:
+.LFB365:
+	.loc 1 1515 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1520 0
 	movs	r1, #0
-	ldr	r6, .L2280
-	ldr	r10, .L2280+156
+	.loc 1 1523 0
+	ldr	r6, .L2277
+	.loc 1 1521 0
+	ldr	r10, .L2277+156
+	.loc 1 1523 0
 	ldrh	r2, [r6]
-	ldr	r7, .L2280+4
+	ldr	r7, .L2277+4
+	.loc 1 1521 0
 	ldr	r3, [r10]
-	ldr	r4, .L2280+8
-	ldr	r5, .L2280+12
+	.loc 1 1520 0
+	ldr	r4, .L2277+8
+	.loc 1 1524 0
+	ldr	r5, .L2277+12
+	.loc 1 1523 0
 	lsls	r2, r2, #1
 	ldr	r0, [r7]
 	mov	r8, r7
+	.loc 1 1521 0
 	str	r3, [r4, #12]
+	.loc 1 1520 0
 	str	r1, [r4, #8]
+	.loc 1 1523 0
 	bl	ftl_memset
+.LVL2458:
+	.loc 1 1524 0
 	ldrh	r0, [r5]
 	movw	r3, #65535
 	cmp	r0, r3
-	bne	.L2256
-.L2265:
+	bne	.L2253
+.L2262:
+	.loc 1 1525 0
 	mov	r0, #-1
-.L2255:
+.L2252:
+	.loc 1 1623 0
 	add	sp, sp, #8
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2256:
+.L2253:
+	.cfi_restore_state
+	.loc 1 1527 0
 	movs	r1, #1
-	ldr	fp, .L2280+160
+	.loc 1 1532 0
+	ldr	fp, .L2277+160
+	.loc 1 1527 0
 	bl	FtlGetLastWrittenPage
-	ldr	r3, .L2280+16
+.LVL2459:
+	.loc 1 1536 0
+	ldr	r3, .L2277+16
+	.loc 1 1527 0
 	sxth	r7, r0
+.LVL2460:
+	.loc 1 1528 0
 	adds	r0, r0, #1
 	strh	r0, [r5, #2]	@ movhi
-.L2258:
+.L2255:
+	.loc 1 1530 0
 	cmp	r7, #0
-	bge	.L2261
-	ldr	r1, .L2280+20
-	movw	r2, #1510
-	ldr	r0, .L2280+24
+	bge	.L2258
+	.loc 1 1543 0
+	ldr	r1, .L2277+20
+	movw	r2, #1543
+	ldr	r0, .L2277+24
 	bl	printf
-	ldr	r1, .L2280+28
-	ldr	r0, .L2280+32
+.LVL2461:
+	ldr	r1, .L2277+28
+	ldr	r0, .L2277+32
 	bl	printf
-.L2260:
-	ldr	r2, .L2280+36
+.LVL2462:
+.L2257:
+	.loc 1 1545 0
+	ldr	r2, .L2277+36
 	ldrh	r3, [r6]
 	ldrh	r2, [r2]
 	adds	r3, r3, #24
 	cmp	r2, r3, lsl #1
-	bcs	.L2263
-	ldr	r1, .L2280+20
-	mov	r2, #1512
-	ldr	r0, .L2280+24
+	bcs	.L2260
+	.loc 1 1545 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2277+20
+	movw	r2, #1545
+	ldr	r0, .L2277+24
 	bl	printf
-	ldr	r1, .L2280+28
-	ldr	r0, .L2280+32
+.LVL2463:
+	ldr	r1, .L2277+28
+	ldr	r0, .L2277+32
 	bl	printf
-.L2263:
+.LVL2464:
+.L2260:
+	.loc 1 1547 0 is_stmt 1
 	movs	r2, #48
 	ldr	r1, [r4, #8]
-	ldr	r0, .L2280+40
+	ldr	r0, .L2277+40
 	bl	ftl_memcpy
+.LVL2465:
+	.loc 1 1548 0
 	ldrh	r2, [r6]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r8]
 	lsls	r2, r2, #1
 	adds	r1, r1, #48
 	bl	ftl_memcpy
+.LVL2466:
+	.loc 1 1549 0
 	ldrh	r1, [r6]
 	ldr	r3, [r4, #8]
 	lsrs	r2, r1, #3
@@ -15950,240 +26070,347 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	bic	r1, r1, #3
 	add	r1, r1, r3
-	ldr	r3, .L2280+44
+	ldr	r3, .L2277+44
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-	ldr	r3, .L2280+48
+.LVL2467:
+	.loc 1 1550 0
+	ldr	r3, .L2277+48
 	ldrh	r3, [r3]
-	cbz	r3, .L2264
+	cbz	r3, .L2261
+.LBB495:
+	.loc 1 1551 0
 	ldrh	r1, [r6]
-	ldr	r3, .L2280+52
+.LVL2468:
+	.loc 1 1552 0
+	ldr	r3, .L2277+52
 	ldrh	r2, [r3]
+	.loc 1 1551 0
 	lsrs	r3, r1, #3
 	add	r3, r3, r1, lsl #1
+	.loc 1 1552 0
 	ldr	r1, [r4, #8]
+.LVL2469:
+	.loc 1 1551 0
 	adds	r3, r3, #52
+	.loc 1 1552 0
 	lsls	r2, r2, #2
 	ubfx	r3, r3, #2, #14
 	add	r1, r1, r3, lsl #2
-	ldr	r3, .L2280+56
+	ldr	r3, .L2277+56
 	ldr	r0, [r3]
 	bl	ftl_memcpy
-.L2264:
-	ldr	r4, .L2280+40
-	ldr	r3, .L2280+16
+.LVL2470:
+.L2261:
+.LBE495:
+	.loc 1 1556 0
+	ldr	r4, .L2277+40
+	ldr	r3, .L2277+16
 	ldr	r2, [r4]
 	cmp	r2, r3
-	bne	.L2265
-	ldr	r3, .L2280+60
+	bne	.L2262
+	.loc 1 1560 0
+	ldr	r3, .L2277+60
 	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	.loc 1 1559 0
 	ldrh	r6, [r4, #8]
+	.loc 1 1560 0
 	ldrh	r3, [r3]
+	.loc 1 1559 0
 	strh	r6, [r5, #6]	@ movhi
+	.loc 1 1560 0
 	cmp	r2, r3
-	bne	.L2265
-	ldr	r3, .L2280+64
-	ldr	r2, .L2280+68
+	bne	.L2262
+	.loc 1 1563 0
+	ldr	r3, .L2277+64
+	.loc 1 1564 0
+	ldr	r2, .L2277+68
+	.loc 1 1563 0
 	str	r6, [r3]
-	ldr	r3, .L2280+72
+	.loc 1 1564 0
+	ldr	r3, .L2277+72
 	ldrh	r3, [r3]
 	muls	r3, r6, r3
 	str	r3, [r2]
-	ldr	r2, .L2280+76
+	.loc 1 1565 0
+	ldr	r2, .L2277+76
 	ldrh	r2, [r2]
 	muls	r3, r2, r3
-	ldr	r2, .L2280+80
+	ldr	r2, .L2277+80
 	str	r3, [r2]
-	ldr	r3, .L2280+84
+	.loc 1 1566 0
+	ldr	r3, .L2277+84
 	ldr	r5, [r3]
-	ldr	r3, .L2280+88
+	ldr	r3, .L2277+88
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L2280+92
+	ldr	r3, .L2277+92
 	subs	r0, r5, r0
 	ldrh	r1, [r3]
 	subs	r0, r0, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L2280+96
+.LVL2471:
+	ldr	r3, .L2277+96
+	.loc 1 1572 0
 	cmp	r6, r5
+	.loc 1 1566 0
 	strh	r0, [r3]	@ movhi
-	bls	.L2266
-	ldr	r1, .L2280+20
-	movw	r2, #1539
-	ldr	r0, .L2280+24
+	.loc 1 1572 0
+	bls	.L2263
+	.loc 1 1572 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2277+20
+	movw	r2, #1572
+	ldr	r0, .L2277+24
 	bl	printf
-	ldr	r1, .L2280+28
-	ldr	r0, .L2280+32
+.LVL2472:
+	ldr	r1, .L2277+28
+	ldr	r0, .L2277+32
 	bl	printf
-.L2266:
+.LVL2473:
+.L2263:
+	.loc 1 1575 0 is_stmt 1
 	ldrh	r2, [r4, #16]
-	ldr	r3, .L2280+100
+	.loc 1 1574 0
+	ldr	r3, .L2277+100
 	ldrh	ip, [r4, #14]
-	ldr	r7, .L2280+104
+	.loc 1 1579 0
+	ldr	r7, .L2277+104
+.LVL2474:
+	.loc 1 1575 0
 	lsrs	r1, r2, #6
+	.loc 1 1576 0
 	and	r2, r2, #63
 	strb	r2, [r3, #6]
+	.loc 1 1577 0
 	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	.loc 1 1575 0
 	strh	r1, [r3, #2]	@ movhi
-	ldr	r1, .L2280+108
+	.loc 1 1584 0
+	ldr	r1, .L2277+108
+	.loc 1 1577 0
 	strb	r2, [r3, #8]
+	.loc 1 1584 0
 	ldrh	r2, [r4, #18]
+	.loc 1 1574 0
 	strh	ip, [r3]	@ movhi
+	.loc 1 1579 0
 	movw	r3, #65535
 	strh	r3, [r7]	@ movhi
+	.loc 1 1580 0
 	movs	r3, #0
+	.loc 1 1584 0
 	strh	r2, [r1]	@ movhi
+	.loc 1 1585 0
 	ldrh	r2, [r4, #20]
+	.loc 1 1580 0
 	strh	r3, [r7, #2]	@ movhi
+	.loc 1 1581 0
 	strb	r3, [r7, #6]
+	.loc 1 1582 0
 	strb	r3, [r7, #8]
+	.loc 1 1585 0
 	lsrs	r5, r2, #6
+	.loc 1 1586 0
 	and	r2, r2, #63
 	strb	r2, [r1, #6]
+	.loc 1 1587 0
 	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	.loc 1 1585 0
 	strh	r5, [r1, #2]	@ movhi
+	.loc 1 1589 0
 	ldrh	r5, [r4, #22]
+	.loc 1 1587 0
 	strb	r2, [r1, #8]
-	ldr	r2, .L2280+112
+	.loc 1 1589 0
+	ldr	r2, .L2277+112
 	strh	r5, [r2]	@ movhi
+	.loc 1 1590 0
 	ldrh	r5, [r4, #24]
 	lsrs	r6, r5, #6
+	.loc 1 1591 0
 	and	r5, r5, #63
 	strb	r5, [r2, #6]
+	.loc 1 1592 0
 	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	.loc 1 1590 0
 	strh	r6, [r2, #2]	@ movhi
+	.loc 1 1599 0
 	ldr	r6, [r4, #32]
+	.loc 1 1592 0
 	strb	r5, [r2, #8]
-	ldr	r5, .L2280+116
+	.loc 1 1594 0
+	ldr	r5, .L2277+116
 	str	r3, [r5]
-	ldr	r5, .L2280+120
+	.loc 1 1595 0
+	ldr	r5, .L2277+120
 	str	r3, [r5]
-	ldr	r5, .L2280+124
+	.loc 1 1596 0
+	ldr	r5, .L2277+124
 	str	r3, [r5]
-	ldr	r5, .L2280+128
+	.loc 1 1597 0
+	ldr	r5, .L2277+128
 	str	r3, [r5]
-	ldr	r5, .L2280+132
+	.loc 1 1599 0
+	ldr	r5, .L2277+132
 	str	r6, [r5]
 	mov	r6, r1
-	ldr	r5, .L2280+136
+	.loc 1 1600 0
+	ldr	r5, .L2277+136
 	str	r3, [r5]
-	ldr	r5, .L2280+140
+	.loc 1 1601 0
+	ldr	r5, .L2277+140
 	str	r3, [r5]
-	ldr	r5, .L2280+144
+	.loc 1 1602 0
+	ldr	r5, .L2277+144
+	.loc 1 1604 0
 	ldr	lr, [r4, #40]
+	.loc 1 1602 0
 	str	r3, [r5]
-	ldr	r3, .L2280+148
+	.loc 1 1604 0
+	ldr	r3, .L2277+148
 	ldr	r5, [r3]
 	cmp	lr, r5
 	mov	r5, r2
+	.loc 1 1605 0
 	it	hi
 	strhi	lr, [r3]
-	ldr	r3, .L2280+152
+	.loc 1 1607 0
+	ldr	r3, .L2277+152
 	ldr	r2, [r4, #36]
 	ldr	r1, [r3]
 	cmp	r2, r1
+	.loc 1 1608 0
 	it	hi
 	strhi	r2, [r3]
+	.loc 1 1610 0
 	movw	r3, #65535
 	cmp	ip, r3
-	beq	.L2269
-	ldr	r0, .L2280+100
+	beq	.L2266
+	.loc 1 1611 0
+	ldr	r0, .L2277+100
 	bl	make_superblock
-.L2269:
+.LVL2475:
+.L2266:
+	.loc 1 1613 0
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2270
-	ldr	r0, .L2280+108
+	beq	.L2267
+	.loc 1 1614 0
+	ldr	r0, .L2277+108
 	bl	make_superblock
-.L2270:
+.LVL2476:
+.L2267:
+	.loc 1 1616 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2271
-	ldr	r0, .L2280+112
+	beq	.L2268
+	.loc 1 1617 0
+	ldr	r0, .L2277+112
 	bl	make_superblock
-.L2271:
+.LVL2477:
+.L2268:
+	.loc 1 1619 0
 	ldrh	r2, [r7]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2272
-	ldr	r0, .L2280+104
+	beq	.L2269
+	.loc 1 1620 0
+	ldr	r0, .L2277+104
 	bl	make_superblock
-.L2272:
+.LVL2478:
+.L2269:
+	.loc 1 1622 0
 	movs	r0, #0
-	b	.L2255
-.L2261:
+	b	.L2252
+.LVL2479:
+.L2258:
+	.loc 1 1531 0
 	ldrh	r2, [r5]
-	ldr	r0, .L2280+8
+	.loc 1 1533 0
+	ldr	r0, .L2277+8
 	str	r3, [sp, #4]
+	.loc 1 1531 0
 	orr	r2, r7, r2, lsl #10
 	str	r2, [r4, #4]
+	.loc 1 1532 0
 	ldr	r2, [fp]
 	str	r2, [r4, #8]
+	.loc 1 1533 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL2480:
+	.loc 1 1536 0
 	ldr	r2, [r4]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2259
+	beq	.L2256
+	.loc 1 1537 0 discriminator 1
 	ldr	r2, [fp]
+	.loc 1 1536 0 discriminator 1
 	ldr	r2, [r2]
 	cmp	r2, r3
-	bne	.L2259
+	bne	.L2256
+	.loc 1 1538 0
 	ldr	r2, [r10]
 	ldrh	r1, [r2]
+	.loc 1 1537 0
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L2260
-.L2259:
+	beq	.L2257
+.L2256:
 	subs	r7, r7, #1
+.LVL2481:
 	sxth	r7, r7
-	b	.L2258
-.L2281:
+.LVL2482:
+	b	.L2255
+.L2278:
 	.align	2
-.L2280:
-	.word	.LANCHOR38
-	.word	.LANCHOR82
+.L2277:
+	.word	.LANCHOR39
+	.word	.LANCHOR83
 	.word	.LANCHOR199
 	.word	.LANCHOR206
 	.word	1179929683
 	.word	.LANCHOR225
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR56
-	.word	.LANCHOR135
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR57
+	.word	.LANCHOR80
 	.word	.LANCHOR0
-	.word	.LANCHOR68
-	.word	.LANCHOR65
+	.word	.LANCHOR69
+	.word	.LANCHOR66
 	.word	.LANCHOR192
-	.word	.LANCHOR43
+	.word	.LANCHOR44
 	.word	.LANCHOR226
-	.word	.LANCHOR71
-	.word	.LANCHOR51
-	.word	.LANCHOR54
-	.word	.LANCHOR67
-	.word	.LANCHOR40
-	.word	.LANCHOR73
-	.word	.LANCHOR36
+	.word	.LANCHOR72
+	.word	.LANCHOR52
+	.word	.LANCHOR55
+	.word	.LANCHOR68
+	.word	.LANCHOR41
+	.word	.LANCHOR74
+	.word	.LANCHOR37
 	.word	.LANCHOR227
-	.word	.LANCHOR90
-	.word	.LANCHOR201
 	.word	.LANCHOR91
+	.word	.LANCHOR201
 	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR158
 	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR164
 	.word	.LANCHOR163
+	.word	.LANCHOR162
+	.word	.LANCHOR164
 	.word	.LANCHOR165
 	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR162
+	.word	.LANCHOR161
+	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR158
 	.word	.LANCHOR185
-	.word	.LANCHOR79
+	.word	.LANCHOR180
+	.cfi_endproc
+.LFE365:
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -16194,322 +26421,541 @@ FtlLoadSysInfo:
 	.fpu softvfp
 	.type	FtlMapTblRecovery, %function
 FtlMapTblRecovery:
-	@ args = 0, pretend = 0, frame = 24
+.LFB366:
+	.loc 1 1626 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #24]
-	movs	r1, #0
+.LVL2483:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
-	ldrh	r7, [r0, #6]
-	mov	fp, r0
-	movs	r4, #0
-	str	r3, [sp, #12]
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 1 1630 0
+	ldr	r3, [r0, #24]
+	.loc 1 1626 0
+	mov	r4, r0
+	.loc 1 1637 0
+	movs	r1, #0
+	.loc 1 1643 0
+	movs	r5, #0
+	.loc 1 1633 0
+	ldrh	fp, [r0, #6]
+	.loc 1 1630 0
+	str	r3, [sp, #20]
+.LVL2484:
+	.loc 1 1631 0
 	ldr	r3, [r0, #12]
-	lsls	r2, r7, #2
-	str	r3, [sp, #8]
+.LVL2485:
+	.loc 1 1637 0
+	lsl	r2, fp, #2
+	.loc 1 1631 0
+	str	r3, [sp, #12]
+.LVL2486:
+	.loc 1 1632 0
 	ldr	r3, [r0, #16]
-	str	r3, [sp, #20]
+.LVL2487:
+	str	r3, [sp, #28]
+.LVL2488:
+	.loc 1 1634 0
 	ldrh	r3, [r0, #8]
-	ldr	r0, [sp, #12]
-	str	r3, [sp, #16]
+.LVL2489:
+	.loc 1 1637 0
+	ldr	r0, [sp, #20]
+.LVL2490:
+	.loc 1 1634 0
+	str	r3, [sp, #24]
+.LVL2491:
+	.loc 1 1637 0
 	bl	ftl_memset
-	ldr	r2, .L2322
-	ldr	r3, .L2322+4
-	str	r4, [fp, #32]
+.LVL2492:
+	.loc 1 1638 0
+	ldr	r2, .L2321
+	ldr	r3, .L2321+4
+	.loc 1 1643 0
+	str	r5, [r4, #32]
+	.loc 1 1638 0
 	ldr	r1, [r2]
-	mov	r10, r2
-	mov	r8, r3
-	str	r4, [fp, #28]
+	.loc 1 1644 0
+	str	r5, [r4, #28]
+	str	r3, [sp, #16]
+	.loc 1 1638 0
 	str	r1, [r3, #8]
-	ldr	r1, .L2322+8
-	ldr	r5, [r1]
+	.loc 1 1639 0
+	ldr	r1, .L2321+8
+	str	r2, [sp, #36]
+	ldr	r6, [r1]
+	.loc 1 1641 0
 	movw	r1, #65535
-	str	r5, [r3, #12]
-	strh	r1, [fp]	@ movhi
-	strh	r1, [fp, #2]	@ movhi
+	.loc 1 1639 0
+	str	r6, [r3, #12]
+.LVL2493:
+	.loc 1 1641 0
+	strh	r1, [r4]	@ movhi
+	.loc 1 1642 0
+	strh	r1, [r4, #2]	@ movhi
+	.loc 1 1645 0
 	movs	r1, #1
-	str	r1, [fp, #36]
-.L2283:
-	ldr	r2, [sp, #16]
-	sxth	r3, r4
-	cmp	r3, r2
-	bge	.L2301
-	ldr	r2, [sp, #16]
-	lsls	r6, r3, #1
-	subs	r2, r2, #1
-	cmp	r3, r2
-	bne	.L2284
-	ldr	r2, [sp, #8]
+	str	r1, [r4, #36]
+.LVL2494:
+.L2280:
+	.loc 1 1646 0 discriminator 1
+	ldr	r3, [sp, #24]
+	sxth	r10, r5
+.LVL2495:
+	cmp	r10, r3
+	bge	.L2298
+	.loc 1 1648 0
+	ldr	r3, [sp, #24]
+	lsl	r7, r10, #1
+	subs	r3, r3, #1
+	cmp	r10, r3
+	bne	.L2281
+	.loc 1 1650 0
+	ldr	r3, [sp, #12]
 	movs	r1, #1
-	str	r3, [sp, #16]
-	ldr	r10, .L2322+4
-	ldrh	r0, [r2, r3, lsl #1]
-	add	r6, r6, r2
+	ldrh	r0, [r3, r10, lsl #1]
+	add	r7, r7, r3
 	bl	FtlGetLastWrittenPage
-	ldr	r3, [sp, #20]
+.LVL2496:
+	.loc 1 1653 0
+	ldr	r3, [sp, #28]
+	.loc 1 1650 0
 	sxth	r8, r0
-	strh	r4, [fp]	@ movhi
-	movs	r4, #0
+.LVL2497:
+	.loc 1 1651 0
 	adds	r0, r0, #1
-	mov	r2, r3
-	ldr	r3, [sp, #16]
-	strh	r0, [fp, #2]	@ movhi
-	ldr	r3, [r2, r3, lsl #2]
-	str	r3, [fp, #28]
-.L2285:
-	sxth	r3, r4
+	.loc 1 1652 0
+	strh	r5, [r4]	@ movhi
+	.loc 1 1651 0
+	strh	r0, [r4, #2]	@ movhi
+	.loc 1 1655 0
+	movs	r5, #0
+	.loc 1 1653 0
+	ldr	r3, [r3, r10, lsl #2]
+	.loc 1 1657 0
+	ldr	r10, .L2321+4
+.LVL2498:
+	.loc 1 1653 0
+	str	r3, [r4, #28]
+.LVL2499:
+.L2282:
+	sxth	r3, r5
+.LVL2500:
+	.loc 1 1655 0 discriminator 1
 	cmp	r3, r8
-	ble	.L2288
-.L2301:
-	ldr	r3, .L2322+12
-	cmp	fp, r3
-	str	r3, [sp, #12]
-	bne	.L2290
-	ldr	r3, .L2322+16
+	ble	.L2285
+.LVL2501:
+.L2298:
+	.loc 1 1712 0
+	ldr	r7, .L2321+12
+	cmp	r4, r7
+	bne	.L2287
+	.loc 1 1712 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2321+16
 	ldrh	r3, [r3]
-	cbz	r3, .L2290
-	movs	r5, #0
-.L2304:
-	ldr	r3, .L2322+20
+	cbz	r3, .L2287
+.LBB496:
+.LBB497:
+	.loc 1 1746 0 is_stmt 1 discriminator 1
+	ldr	r8, .L2321+40
+.LBE497:
+.LBE496:
+	movs	r6, #0
+.LVL2502:
+.L2301:
+.LBB500:
+	.loc 1 1717 0 discriminator 1
+	ldr	r3, .L2321+20
 	ldrh	r3, [r3]
-	cmp	r5, r3
-	bcc	.L2310
-.L2290:
-	mov	r0, fp
+	cmp	r6, r3
+	bcc	.L2309
+.LVL2503:
+.L2287:
+.LBE500:
+	.loc 1 1766 0
+	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L2322+24
-	ldrh	r2, [fp, #2]
+.LVL2504:
+	.loc 1 1767 0
+	ldr	r3, .L2321+24
+	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2303
-	mov	r0, fp
+	bne	.L2300
+	.loc 1 1769 0
+	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L2303:
-	mov	r0, fp
+.LVL2505:
+.L2300:
+	.loc 1 1772 0
+	mov	r0, r4
 	bl	ftl_map_blk_gc
-	mov	r0, fp
+.LVL2506:
+	.loc 1 1774 0
+	mov	r0, r4
 	bl	ftl_map_blk_gc
+.LVL2507:
+	.loc 1 1776 0
 	movs	r0, #0
-	add	sp, sp, #32
+	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2288:
-	ldrh	r2, [r6]
-	ldr	r0, .L2322+4
+.LVL2508:
+.L2285:
+	.cfi_restore_state
+	.loc 1 1657 0
+	ldrh	r2, [r7]
+	.loc 1 1658 0
+	ldr	r0, .L2321+4
+	.loc 1 1657 0
 	orr	r3, r3, r2, lsl #10
+.LVL2509:
+	.loc 1 1658 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1657 0
 	str	r3, [r10, #4]
+	.loc 1 1658 0
 	bl	FlashReadPages
+.LVL2510:
+	.loc 1 1661 0
 	ldr	r3, [r10]
 	adds	r3, r3, #1
-	beq	.L2286
-	ldrh	r3, [r5, #8]
-	cmp	r7, r3
-	bls	.L2287
-	ldrh	r1, [r5]
-	ldrh	r2, [fp, #4]
+	beq	.L2283
+	.loc 1 1663 0
+	ldrh	r3, [r6, #8]
+	cmp	fp, r3
+	bls	.L2284
+	.loc 1 1663 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r6]
+	ldrh	r2, [r4, #4]
 	cmp	r1, r2
-	bne	.L2287
+	bne	.L2284
+	.loc 1 1665 0 is_stmt 1
 	ldr	r2, [r10, #4]
-	ldr	r1, [sp, #12]
+	ldr	r1, [sp, #20]
 	str	r2, [r1, r3, lsl #2]
-.L2287:
-	adds	r4, r4, #1
-	b	.L2285
-.L2286:
-	ldrh	r3, [r6]
-	strh	r3, [fp, #40]	@ movhi
-	b	.L2287
 .L2284:
-	ldr	r2, [r10]
-	ldr	r0, .L2322+4
-	str	r2, [r8, #8]
-	ldr	r2, [sp, #8]
-	add	r2, r2, r6
-	ldr	r6, .L2322+24
-	str	r2, [sp, #24]
-	ldr	r2, [sp, #8]
-	ldrh	r2, [r2, r3, lsl #1]
-	ldrh	r3, [r6]
+.LVL2511:
+	adds	r5, r5, #1
+.LVL2512:
+	b	.L2282
+.LVL2513:
+.L2283:
+	.loc 1 1668 0
+	ldrh	r3, [r7]
+	strh	r3, [r4, #40]	@ movhi
+	b	.L2284
+.LVL2514:
+.L2281:
+	.loc 1 1674 0
+	ldr	r3, .L2321
+	ldr	r8, .L2321+4
+	ldr	r3, [r3]
+	.loc 1 1676 0
+	mov	r0, r8
+	.loc 1 1674 0
+	str	r3, [r8, #8]
+	.loc 1 1675 0
+	ldr	r3, [sp, #12]
+	add	r3, r3, r7
+	ldr	r7, .L2321+24
+	str	r3, [sp, #32]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r3, r10, lsl #1]
+	ldrh	r3, [r7]
 	subs	r3, r3, #1
 	orr	r3, r3, r2, lsl #10
+	.loc 1 1676 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1675 0
 	str	r3, [r8, #4]
+	.loc 1 1676 0
 	bl	FlashReadPages
+.LVL2515:
+	.loc 1 1679 0
 	ldr	r3, [r8]
 	adds	r3, r3, #1
-	beq	.L2312
-	ldrh	r2, [r5]
-	ldrh	r3, [fp, #4]
+	beq	.L2311
+	.loc 1 1679 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r6]
+	ldrh	r3, [r4, #4]
 	cmp	r2, r3
-	bne	.L2312
-	ldrh	r2, [r5, #8]
+	bne	.L2311
+	.loc 1 1679 0 discriminator 2
+	ldrh	r2, [r6, #8]
 	movw	r3, #64245
 	cmp	r2, r3
-	beq	.L2292
-.L2312:
-	ldr	r3, .L2322+24
-	movs	r6, #0
-.L2293:
-	ldrh	r1, [r3]
-	sxth	r2, r6
-	cmp	r2, r1
-	bge	.L2299
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #24]
-	ldr	r0, .L2322+4
-	ldrh	r1, [r3]
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r8, #4]
+	beq	.L2289
+.L2311:
+	.loc 1 1695 0 is_stmt 1
+	ldr	r10, .L2321+24
+.LVL2516:
+	movs	r7, #0
+	.loc 1 1697 0
+	ldr	r8, .L2321+4
+.L2290:
+.LVL2517:
+	.loc 1 1695 0 discriminator 1
+	ldrh	r2, [r10]
+	sxth	r3, r7
+	cmp	r3, r2
+	bge	.L2296
+	.loc 1 1697 0
+	ldr	r2, [sp, #32]
+	.loc 1 1698 0
+	ldr	r0, .L2321+4
+	.loc 1 1697 0
+	ldrh	r2, [r2]
+	orr	r3, r3, r2, lsl #10
+	.loc 1 1698 0
 	movs	r2, #1
 	mov	r1, r2
+	.loc 1 1697 0
+	str	r3, [r8, #4]
+	.loc 1 1698 0
 	bl	FlashReadPages
-	ldr	r2, [r8]
-	ldr	r3, [sp, #28]
-	adds	r2, r2, #1
-	beq	.L2297
-	ldrh	r2, [r5, #8]
-	cmp	r7, r2
-	bls	.L2297
-	ldrh	r0, [r5]
-	ldrh	r1, [fp, #4]
-	cmp	r0, r1
+.LVL2518:
+	.loc 1 1701 0
+	ldr	r3, [r8]
+	adds	r3, r3, #1
+	beq	.L2294
+	.loc 1 1703 0
+	ldrh	r3, [r6, #8]
+	cmp	fp, r3
+	bls	.L2294
+	.loc 1 1703 0 is_stmt 0 discriminator 1
+	ldrh	r1, [r6]
+	ldrh	r2, [r4, #4]
+	cmp	r1, r2
+	.loc 1 1705 0 is_stmt 1 discriminator 1
 	ittt	eq
-	ldreq	r1, [r8, #4]
-	ldreq	r0, [sp, #12]
-	streq	r1, [r0, r2, lsl #2]
-.L2297:
-	adds	r6, r6, #1
-	b	.L2293
-.L2292:
-	ldrh	r2, [r6]
-	movs	r1, #0
-	ldr	r6, [r10]
-	subs	r2, r2, #1
+	ldreq	r2, [r8, #4]
+	ldreq	r1, [sp, #20]
+	streq	r2, [r1, r3, lsl #2]
 .L2294:
+.LVL2519:
+	adds	r7, r7, #1
+.LVL2520:
+	b	.L2290
+.LVL2521:
+.L2289:
+	movs	r1, #0
+.L2291:
+	.loc 1 1682 0 discriminator 1
+	ldrh	r2, [r7]
 	sxth	r3, r1
+.LVL2522:
+	subs	r2, r2, #1
 	cmp	r3, r2
-	blt	.L2296
-.L2299:
-	adds	r4, r4, #1
-	b	.L2283
+	blt	.L2293
+.LVL2523:
 .L2296:
+	adds	r5, r5, #1
+.LVL2524:
+	b	.L2280
+.LVL2525:
+.L2293:
+	.loc 1 1684 0
+	ldr	r2, .L2321
 	lsls	r0, r3, #3
-	ldr	r3, [r6, r3, lsl #3]
-	adds	r1, r1, #1
+	ldr	r2, [r2]
+	ldr	r3, [r2, r3, lsl #3]
+.LVL2526:
+	.loc 1 1685 0
 	uxth	ip, r3
-	cmp	r7, ip
-	itttt	hi
-	addhi	r0, r0, r6
-	ldrhi	r3, [sp, #12]
-	ldrhi	r0, [r0, #4]
-	strhi	r0, [r3, ip, lsl #2]
-	b	.L2294
-.L2310:
-	ldr	r10, .L2322+44
-	lsls	r6, r5, #2
-	ldr	r3, [r10]
-	ldr	r3, [r3, r5, lsl #2]
-	subs	r2, r3, #1
-	adds	r2, r2, #3
-	bhi	.L2306
-	ldr	r7, .L2322+28
-	ldr	r2, [r7]
-	ldr	r2, [r2, r5, lsl #2]
-	cmp	r3, r2
-	beq	.L2306
-	ldr	r2, .L2322
-	ldr	r4, .L2322+4
+	cmp	fp, ip
+	bls	.L2292
+	.loc 1 1687 0
+	add	r2, r2, r0
+	ldr	r0, [sp, #20]
+	ldr	r2, [r2, #4]
+	str	r2, [r0, ip, lsl #2]
+.L2292:
+.LVL2527:
+	adds	r1, r1, #1
+.LVL2528:
+	b	.L2291
+.LVL2529:
+.L2309:
+.LBB501:
+	.loc 1 1718 0
+	ldr	r3, .L2321+28
+	lsls	r5, r6, #2
+	ldr	r3, [r3]
+	ldr	r2, [r3, r6, lsl #2]
+	subs	r1, r2, #1
+	adds	r1, r1, #3
+	bhi	.L2303
+	.loc 1 1719 0 discriminator 1
+	ldr	fp, .L2321+44
+	ldr	r1, [fp]
+	.loc 1 1718 0 discriminator 1
+	ldr	r1, [r1, r6, lsl #2]
+	cmp	r2, r1
+	beq	.L2303
+	.loc 1 1721 0
+	ldr	r2, [sp, #36]
+	ldr	r1, [sp, #16]
+	.loc 1 1725 0
+	ldr	r0, .L2321+4
+	.loc 1 1721 0
 	ldr	r2, [r2]
-	mov	r0, r4
-	str	r3, [r4, #4]
-	str	r2, [r4, #8]
-	ldr	r2, .L2322+8
-	ldr	r8, [r2]
+	str	r2, [r1, #8]
+	.loc 1 1722 0
+	ldr	r2, .L2321+8
+	ldr	r10, [r2]
+	.loc 1 1725 0
 	movs	r2, #1
+	.loc 1 1722 0
+	str	r10, [r1, #12]
+.LVL2530:
+	.loc 1 1724 0
+	ldr	r3, [r3, r5]
+	str	r3, [r1, #4]
+	.loc 1 1725 0
 	mov	r1, r2
-	str	r8, [r4, #12]
 	bl	FlashReadPages
-	ldr	r3, [r4]
+.LVL2531:
+	.loc 1 1727 0
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2306
-	ldr	r3, [sp, #12]
-	ldrh	r2, [r8]
-	ldrh	r3, [r3, #4]
+	beq	.L2303
+	.loc 1 1727 0 is_stmt 0 discriminator 1
+	ldrh	r2, [r10]
+	ldrh	r3, [r7, #4]
 	cmp	r2, r3
-	bne	.L2306
-	ldr	r2, [r7]
-	mov	r0, r4
-	ldr	r3, [r8, #4]
-	ldr	r2, [r2, r6]
-	str	r3, [sp, #16]
-	str	r2, [r4, #4]
-	movs	r2, #1
-	mov	r1, r2
-	bl	FlashReadPages
-	ldr	r2, [r8, #4]
-	ldr	r3, [sp, #16]
+	bne	.L2303
+	.loc 1 1733 0 is_stmt 1
+	ldr	r2, [fp]
+	ldr	r0, [sp, #16]
+	.loc 1 1728 0
+	ldr	r3, [r10, #4]
+.LVL2532:
+	.loc 1 1733 0
+	ldr	r1, [r2, r5]
+	str	r1, [r0, #4]
+	.loc 1 1734 0
+	ldr	r2, [r2, r5]
+	cbnz	r2, .L2305
+	.loc 1 1735 0
+	str	r2, [r10, #4]
+.LVL2533:
+.L2306:
+	.loc 1 1740 0
+	ldr	r2, [r10, #4]
 	cmp	r3, r2
-	bls	.L2306
-	ldr	r0, [r7]
+	bls	.L2303
+.LBB498:
+	.loc 1 1742 0
+	ldr	r10, .L2321+28
+.LVL2534:
+	ldr	fp, .L2321+44
 	ldr	r1, [r10]
+	ldr	r0, [fp]
 	str	r2, [sp]
-	ldr	r2, [r0, r6]
-	ldr	r1, [r1, r6]
-	ldr	r0, .L2322+32
+	ldr	r1, [r1, r5]
+	ldr	r2, [r0, r5]
+	ldr	r0, .L2321+32
 	bl	printf
+.LVL2535:
+	.loc 1 1744 0
 	ldr	r3, [r10]
-	ldr	r2, [r7]
-	ldr	r1, [r3, r6]
-	str	r1, [r2, r6]
+	ldr	r2, [r3, r5]
+	ldr	r3, [fp]
+	str	r2, [r3, r5]
+	.loc 1 1746 0
 	movs	r2, #0
-	ldr	r0, [r3, r6]
-	ldr	r3, .L2322+36
+	.loc 1 1745 0
+	ldr	r3, [r10]
+	ldr	r0, [r3, r5]
+	.loc 1 1746 0
+	ldrh	r3, [r8]
+	.loc 1 1745 0
 	ubfx	r0, r0, #10, #16
-	ldrh	r3, [r3]
-.L2308:
+.LVL2536:
+.L2307:
 	sxth	r1, r2
+.LVL2537:
+	.loc 1 1746 0 discriminator 1
 	cmp	r1, r3
-	blt	.L2309
-	ldr	r2, .L2322+40
+	blt	.L2308
+	.loc 1 1751 0 discriminator 1
+	ldr	r2, .L2321+36
 	ldr	r2, [r2]
 	cmp	r3, r2
-	bcs	.L2306
-	ldr	r2, [sp, #8]
+	bcs	.L2303
+	.loc 1 1752 0
+	ldr	r2, [sp, #12]
 	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L2322+36
-	ldr	r2, .L2322+36
-	ldrh	r3, [r3]
+	.loc 1 1753 0
+	ldrh	r3, [r8]
 	adds	r3, r3, #1
-	strh	r3, [r2]	@ movhi
+	strh	r3, [r8]	@ movhi
+	.loc 1 1755 0
 	bl	remove_from_free_sys_Queue
+.LVL2538:
+	b	.L2303
+.LVL2539:
+.L2305:
+.LBE498:
+	.loc 1 1737 0
+	movs	r2, #1
+	ldr	r0, .L2321+4
+	mov	r1, r2
+	str	r3, [sp, #20]
+	bl	FlashReadPages
+.LVL2540:
+	ldr	r3, [sp, #20]
 	b	.L2306
-.L2309:
-	ldr	r4, [sp, #8]
+.LVL2541:
+.L2308:
+.LBB499:
+	.loc 1 1747 0
+	ldr	r5, [sp, #12]
 	adds	r2, r2, #1
-	ldrh	r1, [r4, r1, lsl #1]
+	ldrh	r1, [r5, r1, lsl #1]
+.LVL2542:
 	cmp	r1, r0
-	bne	.L2308
-.L2306:
-	adds	r5, r5, #1
-	b	.L2304
-.L2323:
-	.align	2
+	bne	.L2307
+.LVL2543:
+.L2303:
+.LBE499:
+	.loc 1 1717 0 discriminator 2
+	adds	r6, r6, #1
+.LVL2544:
+	b	.L2301
 .L2322:
-	.word	.LANCHOR79
+	.align	2
+.L2321:
+	.word	.LANCHOR180
 	.word	.LANCHOR199
 	.word	.LANCHOR185
 	.word	.LANCHOR124
-	.word	.LANCHOR68
-	.word	.LANCHOR65
-	.word	.LANCHOR52
-	.word	.LANCHOR128
-	.word	.LC42
-	.word	.LANCHOR125
-	.word	.LANCHOR63
+	.word	.LANCHOR69
+	.word	.LANCHOR66
+	.word	.LANCHOR53
 	.word	.LANCHOR192
+	.word	.LC45
+	.word	.LANCHOR64
+	.word	.LANCHOR125
+	.word	.LANCHOR128
+.LBE501:
+	.cfi_endproc
+.LFE366:
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -16520,49 +26966,69 @@ FtlMapTblRecovery:
 	.fpu softvfp
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
+.LFB367:
+	.loc 1 1779 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L2325
-	ldr	r0, .L2325+4
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 1780 0
+	ldr	r3, .L2324
+	ldr	r0, .L2324+4
 	ldrh	r3, [r3]
 	strh	r3, [r0, #10]	@ movhi
+	.loc 1 1781 0
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L2325+8
+	.loc 1 1782 0
+	ldr	r3, .L2324+8
 	ldrh	r3, [r3]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L2325+12
+	.loc 1 1783 0
+	ldr	r3, .L2324+12
 	ldrh	r3, [r3]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L2325+16
+	.loc 1 1784 0
+	ldr	r3, .L2324+16
 	ldr	r3, [r3]
 	str	r3, [r0, #12]
-	ldr	r3, .L2325+20
+	.loc 1 1785 0
+	ldr	r3, .L2324+20
 	ldr	r3, [r3]
 	str	r3, [r0, #16]
-	ldr	r3, .L2325+24
+	.loc 1 1786 0
+	ldr	r3, .L2324+24
 	ldr	r3, [r3]
 	str	r3, [r0, #20]
-	ldr	r3, .L2325+28
+	.loc 1 1787 0
+	ldr	r3, .L2324+28
 	ldr	r3, [r3]
 	str	r3, [r0, #24]
+	.loc 1 1788 0
 	movw	r3, #65535
 	strh	r3, [r0, #40]	@ movhi
+	.loc 1 1790 0
 	bl	FtlMapTblRecovery
+.LVL2545:
+	.loc 1 1793 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2326:
-	.align	2
 .L2325:
-	.word	.LANCHOR60
-	.word	.LANCHOR215
-	.word	.LANCHOR69
+	.align	2
+.L2324:
 	.word	.LANCHOR61
+	.word	.LANCHOR215
 	.word	.LANCHOR70
+	.word	.LANCHOR62
+	.word	.LANCHOR71
 	.word	.LANCHOR190
 	.word	.LANCHOR189
 	.word	.LANCHOR191
+	.cfi_endproc
+.LFE367:
 	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
 	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
@@ -16573,18 +27039,31 @@ FtlLoadVonderInfo:
 	.fpu softvfp
 	.type	FtlLoadMapInfo, %function
 FtlLoadMapInfo:
+.LFB369:
+	.loc 1 1820 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 3, -8
+	.cfi_offset 14, -4
+	.loc 1 1821 0
 	bl	FtlL2PDataInit
-	ldr	r0, .L2328
+.LVL2546:
+	.loc 1 1823 0
+	ldr	r0, .L2327
 	bl	FtlMapTblRecovery
+.LVL2547:
+	.loc 1 1828 0
 	movs	r0, #0
 	pop	{r3, pc}
-.L2329:
-	.align	2
 .L2328:
+	.align	2
+.L2327:
 	.word	.LANCHOR124
+	.cfi_endproc
+.LFE369:
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
@@ -16595,836 +27074,1320 @@ FtlLoadMapInfo:
 	.fpu softvfp
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
+.LFB372:
+	.loc 1 1879 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r3, [r0]
-	movw	r2, #65535
+.LVL2548:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r0
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 1 1893 0
+	movw	r2, #65535
+	ldrh	r3, [r0]
+	.loc 1 1879 0
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 1879 0
+	mov	r8, r0
+	.loc 1 1893 0
 	cmp	r3, r2
-	beq	.L2491
+	beq	.L2484
+	.loc 1 1898 0
 	ldrh	r3, [r0, #2]
-	str	r3, [sp, #12]
+	str	r3, [sp, #8]
+.LVL2549:
+	.loc 1 1899 0
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	str	r3, [sp, #28]
-	ldr	r3, .L2500
+	.loc 1 1904 0
+	ldr	r1, [sp, #8]
+	.loc 1 1899 0
+	str	r3, [sp, #24]
+.LVL2550:
+	.loc 1 1904 0
+	ldr	r3, .L2493
 	ldrh	r3, [r3]
 	cmp	r3, r1
 	mov	r3, #0
-	bne	.L2333
+	bne	.L2332
+	.loc 1 1905 0
 	strh	r3, [r0, #4]	@ movhi
-.L2498:
-	strb	r3, [r10, #6]
+.LVL2551:
 .L2491:
+	.loc 1 2254 0
+	strb	r3, [r8, #6]
+.LVL2552:
+.L2484:
+	.loc 1 2275 0
 	movs	r0, #0
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2333:
+.LVL2553:
+.L2332:
+	.cfi_restore_state
+	.loc 1 1912 0
 	ldrh	r0, [r0, #16]
-.L2334:
+.LVL2554:
+.L2333:
+	.loc 1 1913 0
 	cmp	r0, r2
 	uxth	r5, r3
+.LVL2555:
 	add	r3, r3, #1
-	beq	.L2335
-	ldrb	r1, [r10, #8]	@ zero_extendqisi2
+	beq	.L2334
+	.loc 1 1919 0
+	ldrb	r1, [r8, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L2336
+	bne	.L2335
+	.loc 1 1920 0
 	bl	FtlGetLastWrittenPage
+.LVL2556:
+	.loc 1 1922 0
 	adds	r6, r0, #1
+	.loc 1 1920 0
 	mov	r4, r0
-	beq	.L2337
-	ldr	r3, .L2500+4
+.LVL2557:
+	.loc 1 1922 0
+	beq	.L2336
+	.loc 1 1922 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2493+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2415
-	ldr	r3, .L2500+8
-	ldrh	r6, [r3, r0, lsl #1]
-.L2338:
-	ldr	r3, .L2500+12
-	movw	lr, #65535
-	mov	r8, #36
-	ldrh	fp, [r3]
-	ldr	r3, .L2500+16
+	bne	.L2413
+	.loc 1 1923 0 is_stmt 1
+	ldr	r3, .L2493+8
+	ldrh	r5, [r3, r0, lsl #1]
+.LVL2558:
+.L2337:
+	.loc 1 1944 0 discriminator 1
+	ldr	r3, .L2493+12
+	.loc 1 1946 0 discriminator 1
+	movw	fp, #65535
+	.loc 1 1947 0 discriminator 1
+	mov	r10, #36
+	.loc 1 1944 0 discriminator 1
+	ldrh	ip, [r3]
+	.loc 1 1947 0 discriminator 1
+	ldr	r3, .L2493+16
 	ldr	r0, [r3]
-	ldr	r3, .L2500+20
+	.loc 1 1949 0 discriminator 1
+	ldr	r3, .L2493+20
 	ldr	r3, [r3]
-	str	r3, [sp, #8]
-	ldr	r3, .L2500+24
-	ldrh	ip, [r3]
-	add	r3, r10, #16
-	str	r3, [sp, #20]
 	str	r3, [sp, #4]
+	ldr	r3, .L2493+24
+	ldrh	lr, [r3]
+	add	r3, r8, #16
+	str	r3, [sp, #20]
+	str	r3, [sp]
 	movs	r3, #0
-	mov	r7, r3
-.L2339:
+	mov	r6, r3
+.L2338:
+.LVL2559:
+	.loc 1 1944 0 discriminator 1
 	uxth	r2, r3
-	cmp	fp, r2
-	bhi	.L2343
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cmp	ip, r2
+	bhi	.L2342
+	.loc 1 1953 0
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+.LVL2560:
 	cmp	r3, #1
-	bne	.L2416
-	ldr	r3, .L2500+4
+	bne	.L2414
+	.loc 1 1953 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2493+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-.L2492:
-	str	r3, [sp, #36]
-	mov	r1, r7
-	ldr	r2, [sp, #36]
-	movs	r5, #0
+.L2485:
+	str	r3, [sp, #32]
+.LVL2561:
+	.loc 1 1956 0 is_stmt 1
+	mov	r1, r6
+	ldr	r2, [sp, #32]
+.LVL2562:
+	.loc 1 1958 0
+	movs	r7, #0
+	.loc 1 1956 0
 	bl	FlashReadPages
-	ldr	r3, .L2500+28
-	movw	fp, #65535
-	ldr	r8, .L2500+16
+.LVL2563:
+	.loc 1 1957 0
+	ldr	r3, .L2493+28
+	.loc 1 1889 0
+	movw	r10, #65535
+	ldr	fp, .L2493+16
+	.loc 1 1957 0
 	ldr	r3, [r3]
 	subs	r3, r3, #1
-	str	r3, [sp, #4]
-.L2345:
-	uxth	r3, r5
-	cmp	r7, r3
-	bhi	.L2350
-	bne	.L2348
+	str	r3, [sp]
+.LVL2564:
+.L2344:
+	uxth	r3, r7
+.LVL2565:
+	.loc 1 1958 0 discriminator 1
+	cmp	r6, r3
+	bhi	.L2349
+	.loc 1 1975 0
+	bne	.L2347
+	.loc 1 1977 0
 	adds	r4, r4, #1
+.LVL2566:
 	uxth	r3, r4
-	str	r3, [sp, #8]
-	ldr	r3, [r8]
+.LVL2567:
+	str	r3, [sp, #4]
+.LVL2568:
+	.loc 1 1979 0
+	ldr	r3, [fp]
 	ldr	r0, [r3, #4]
-.L2493:
+.LVL2569:
+.L2486:
+	.loc 1 1983 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	str	r0, [sp, #16]
+.LVL2570:
+	.loc 1 1986 0
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	.loc 1 1983 0
+	str	r0, [sp, #12]
+.LVL2571:
+	.loc 1 1986 0
 	cmp	r3, #1
-	bne	.L2352
-	ldr	r2, .L2500+4
+	bne	.L2351
+	.loc 1 1986 0 is_stmt 0 discriminator 1
+	ldr	r2, .L2493+4
 	ldrb	r2, [r2]	@ zero_extendqisi2
-	cbnz	r2, .L2352
-	ldr	r1, [sp, #8]
-	ldr	r2, .L2500+8
+	cbnz	r2, .L2351
+	.loc 1 1987 0 is_stmt 1
+	ldr	r1, [sp, #4]
+	ldr	r2, .L2493+8
 	ldrh	r2, [r2, r1, lsl #1]
-	str	r2, [sp, #8]
-.L2352:
-	ldr	r2, .L2500
-	ldr	r1, [sp, #8]
+	str	r2, [sp, #4]
+.LVL2572:
+.L2351:
+	.loc 1 1990 0
+	ldr	r2, .L2493
+	ldr	r1, [sp, #4]
 	ldrh	r2, [r2]
 	cmp	r2, r1
-	bne	.L2353
-	ldrh	r2, [sp, #8]
-	strh	r2, [r10, #2]	@ movhi
+	bne	.L2352
+	.loc 1 1991 0
+	ldrh	r2, [sp, #4]
+	strh	r2, [r8, #2]	@ movhi
+	.loc 1 1992 0
 	movs	r2, #0
-	strb	r2, [r10, #6]
-	strh	r2, [r10, #4]	@ movhi
-.L2353:
-	ldr	r2, [sp, #8]
-	ldr	r1, [sp, #12]
+	strb	r2, [r8, #6]
+	.loc 1 1993 0
+	strh	r2, [r8, #4]	@ movhi
+.L2352:
+	.loc 1 1996 0
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #8]
 	cmp	r2, r1
-	bne	.L2354
-	ldr	r2, [sp, #16]
-	ldr	r1, [sp, #28]
+	bne	.L2353
+	.loc 1 1996 0 is_stmt 0 discriminator 1
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #24]
 	cmp	r2, r1
-	bne	.L2354
-.L2499:
-	ldr	r1, [sp, #8]
-	mov	r0, r10
+	bne	.L2353
+.LVL2573:
+.L2492:
+	.loc 1 2269 0 is_stmt 1
+	ldr	r1, [sp, #4]
+	mov	r0, r8
 	bl	ftl_sb_update_avl_pages
-	b	.L2491
-.L2335:
+.LVL2574:
+	b	.L2484
+.LVL2575:
+.L2334:
+	.loc 1 1915 0
 	uxth	r1, r3
 	adds	r1, r1, #8
-	ldrh	r0, [r10, r1, lsl #1]
-	b	.L2334
-.L2336:
+	ldrh	r0, [r8, r1, lsl #1]
+.LVL2576:
+	b	.L2333
+.LVL2577:
+.L2335:
+	.loc 1 1927 0
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
+.LVL2578:
 	mov	r4, r0
+.LVL2579:
+	.loc 1 1932 0
 	adds	r0, r0, #1
-	beq	.L2337
-.L2415:
-	mov	r6, r4
-	b	.L2338
-.L2337:
-	ldr	r3, [sp, #12]
-	cbz	r3, .L2340
-	ldr	r1, .L2500+32
-	mov	r2, #1896
-	ldr	r0, .L2500+36
+.LVL2580:
+	beq	.L2336
+.L2413:
+	mov	r5, r4
+.LVL2581:
+	b	.L2337
+.LVL2582:
+.L2336:
+	.loc 1 1933 0
+	ldr	r3, [sp, #8]
+	cbz	r3, .L2339
+	.loc 1 1933 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2493+32
+	movw	r2, #1933
+	ldr	r0, .L2493+36
 	bl	printf
-	ldr	r1, .L2500+40
-	ldr	r0, .L2500+44
+.LVL2583:
+	ldr	r1, .L2493+40
+	ldr	r0, .L2493+44
 	bl	printf
-.L2340:
-	ldr	r3, [sp, #28]
-	cbz	r3, .L2341
+.LVL2584:
+.L2339:
+	.loc 1 1934 0 is_stmt 1
+	ldr	r3, [sp, #24]
+	cbz	r3, .L2340
+	.loc 1 1934 0 is_stmt 0 discriminator 1
 	cmp	r5, r3
-	beq	.L2341
-	ldr	r1, .L2500+32
-	movw	r2, #1897
-	ldr	r0, .L2500+36
+	beq	.L2340
+	.loc 1 1934 0 discriminator 2
+	ldr	r1, .L2493+32
+	movw	r2, #1934
+	ldr	r0, .L2493+36
 	bl	printf
-	ldr	r1, .L2500+40
-	ldr	r0, .L2500+44
+.LVL2585:
+	ldr	r1, .L2493+40
+	ldr	r0, .L2493+44
 	bl	printf
-.L2341:
+.LVL2586:
+.L2340:
+	.loc 1 1935 0 is_stmt 1
 	movs	r3, #0
-	strh	r3, [r10, #2]	@ movhi
-	b	.L2498
-.L2343:
-	ldr	r1, [sp, #4]
+	strh	r3, [r8, #2]	@ movhi
+	b	.L2491
+.LVL2587:
+.L2342:
+	.loc 1 1945 0
+	ldr	r1, [sp]
 	ldrh	r2, [r1], #2
-	cmp	r2, lr
-	str	r1, [sp, #4]
-	beq	.L2342
-	mla	r1, r8, r7, r0
-	orr	r2, r6, r2, lsl #10
+	.loc 1 1946 0
+	cmp	r2, fp
+	.loc 1 1945 0
+	str	r1, [sp]
+.LVL2588:
+	.loc 1 1946 0
+	beq	.L2341
+	.loc 1 1947 0
+	mla	r1, r10, r6, r0
+	orr	r2, r5, r2, lsl #10
+.LVL2589:
 	str	r2, [r1, #4]
+.LVL2590:
+	.loc 1 1948 0
 	movs	r2, #0
 	str	r2, [r1, #8]
-	mul	r2, ip, r7
-	adds	r7, r7, #1
-	uxth	r7, r7
+	.loc 1 1949 0
+	mul	r2, lr, r6
+	.loc 1 1950 0
+	adds	r6, r6, #1
+.LVL2591:
+	uxth	r6, r6
+.LVL2592:
+	.loc 1 1949 0
 	bic	r2, r2, #3
-	mov	r5, r2
-	ldr	r2, [sp, #8]
-	add	r5, r5, r2
-	str	r5, [r1, #12]
-.L2342:
+	mov	r7, r2
+	ldr	r2, [sp, #4]
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2341:
+.LVL2593:
 	adds	r3, r3, #1
-	b	.L2339
-.L2416:
+.LVL2594:
+	b	.L2338
+.LVL2595:
+.L2414:
 	movs	r3, #0
-	b	.L2492
-.L2350:
+	b	.L2485
+.LVL2596:
+.L2349:
+	.loc 1 1959 0
 	movs	r3, #36
-	ldr	r1, [r8]
-	muls	r3, r5, r3
+.LVL2597:
+	ldr	r1, [fp]
+	muls	r3, r7, r3
 	adds	r2, r1, r3
 	ldr	r3, [r1, r3]
-	cbnz	r3, .L2346
+	cbnz	r3, .L2345
+	.loc 1 1960 0
 	ldr	r2, [r2, #12]
+.LVL2598:
+	.loc 1 1961 0
 	ldr	r3, [r2, #4]
 	adds	r1, r3, #1
-	beq	.L2347
-	ldr	r1, .L2500+28
+	beq	.L2346
+	.loc 1 1962 0
+	ldr	r1, .L2493+28
 	mov	r0, r3
 	ldr	r1, [r1]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2347
-	ldr	r1, .L2500+28
+.LVL2599:
+	cbz	r0, .L2346
+	.loc 1 1964 0
+	ldr	r1, .L2493+28
 	adds	r3, r3, #1
 	str	r3, [r1]
-.L2347:
+.L2346:
+	.loc 1 1967 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
-	bne	.L2349
-.L2348:
+	bne	.L2348
+.LVL2600:
+.L2347:
+	.loc 1 1982 0
 	uxth	r3, r4
-	uxth	r5, r5
-	str	r3, [sp, #8]
+	.loc 1 1983 0
+	uxth	r7, r7
+	.loc 1 1982 0
+	str	r3, [sp, #4]
+.LVL2601:
+	.loc 1 1983 0
 	movs	r2, #36
-	ldr	r3, [r8]
-	mla	r5, r2, r5, r3
-	ldr	r0, [r5, #4]
-	b	.L2493
-.L2346:
+	ldr	r3, [fp]
+	mla	r7, r2, r7, r3
+.LVL2602:
+	ldr	r0, [r7, #4]
+	b	.L2486
+.LVL2603:
+.L2345:
+	.loc 1 1970 0
 	ldr	r1, [r2, #4]
-	uxth	fp, r6
-	ldr	r0, .L2500+48
+	.loc 1 1971 0
+	uxth	r10, r5
+	.loc 1 1970 0
+	ldr	r0, .L2493+48
 	bl	printf
-	ldrh	r2, [r10]
-	ldr	r3, .L2500+52
+.LVL2604:
+	.loc 1 1972 0
+	ldrh	r2, [r8]
+	ldr	r3, .L2493+52
 	strh	r2, [r3]	@ movhi
-.L2349:
-	adds	r5, r5, #1
-	b	.L2345
-.L2354:
+.LVL2605:
+.L2348:
+	adds	r7, r7, #1
+.LVL2606:
+	b	.L2344
+.LVL2607:
+.L2353:
+	.loc 1 2002 0
 	movw	r2, #65535
-	cmp	fp, r2
-	bne	.L2355
+	cmp	r10, r2
+	bne	.L2354
+	.loc 1 2002 0 is_stmt 0 discriminator 1
 	cmp	r3, #0
-	bne	.L2356
-.L2355:
-	ldr	r3, .L2500+56
-	uxth	fp, r6
-	uxth	r6, r6
+	bne	.L2355
+.L2354:
+.LVL2608:
+.LBB502:
+	.loc 1 2008 0 is_stmt 1
+	ldr	r3, .L2493+56
+	.loc 1 2007 0
+	uxth	r10, r5
+.LVL2609:
+	.loc 1 2012 0
+	uxth	r5, r5
+.LVL2610:
+	.loc 1 2030 0
+	ldr	fp, .L2493+56
+	.loc 1 2034 0
 	mov	r7, #-1
+	.loc 1 2008 0
 	ldr	r2, [r3]
+	.loc 1 2034 0
+	mov	r6, r7
+.LVL2611:
+	.loc 1 2008 0
 	adds	r2, r2, #1
+	.loc 1 2009 0
 	itt	eq
-	ldreq	r2, [sp, #4]
+	ldreq	r2, [sp]
 	streq	r2, [r3]
+	.loc 1 2010 0
 	ldr	r3, [r3]
-	str	r3, [sp, #24]
-	ldr	r3, [sp, #12]
+	str	r3, [sp, #28]
+.LVL2612:
+	.loc 1 2012 0
+	ldr	r3, [sp, #8]
+.LVL2613:
 	adds	r3, r3, #7
-	cmp	r6, r3
-	mov	r6, r7
+	cmp	r5, r3
+	.loc 1 2013 0
 	itet	gt
-	subgt	r4, fp, #7
-	ldrle	r4, [sp, #12]
+	subgt	r4, r10, #7
+	ldrle	r4, [sp, #8]
 	uxthgt	r4, r4
-.L2359:
-	cmp	r4, fp
-	bhi	.L2374
-	ldr	r3, .L2500+12
+.LVL2614:
+.L2358:
+	.loc 1 2014 0 discriminator 1
+	cmp	r4, r10
+	bhi	.L2371
+	.loc 1 2016 0
+	ldr	r3, .L2493+12
+	.loc 1 2018 0
 	movw	lr, #65535
+	.loc 1 2019 0
 	mov	ip, #36
-	ldrh	r8, [r3]
-	ldr	r3, .L2500+16
+	.loc 1 2016 0
+	ldrh	r3, [r3]
+	str	r3, [sp, #36]
+	.loc 1 2019 0
+	ldr	r3, .L2493+16
 	ldr	r0, [r3]
 	ldr	r3, [sp, #20]
-	str	r3, [sp, #32]
+	str	r3, [sp, #16]
 	movs	r3, #0
 	mov	r5, r3
-	b	.L2375
-.L2361:
-	ldr	r1, [sp, #32]
+	b	.L2372
+.LVL2615:
+.L2360:
+	.loc 1 2017 0
+	ldr	r1, [sp, #16]
 	ldrh	r2, [r1], #2
+	.loc 1 2018 0
 	cmp	r2, lr
-	str	r1, [sp, #32]
-	beq	.L2360
+	.loc 1 2017 0
+	str	r1, [sp, #16]
+.LVL2616:
+	.loc 1 2018 0
+	beq	.L2359
+	.loc 1 2019 0
 	mla	r1, ip, r5, r0
+	.loc 1 2020 0
 	adds	r5, r5, #1
+.LVL2617:
+	.loc 1 2019 0
 	orr	r2, r4, r2, lsl #10
+.LVL2618:
+	.loc 1 2020 0
 	uxth	r5, r5
+.LVL2619:
+	.loc 1 2019 0
 	str	r2, [r1, #4]
-.L2360:
+.LVL2620:
+.L2359:
 	adds	r3, r3, #1
-.L2375:
+.LVL2621:
+.L2372:
+	.loc 1 2016 0 discriminator 1
+	ldr	r1, [sp, #36]
 	uxth	r2, r3
-	cmp	r8, r2
-	bhi	.L2361
+	cmp	r2, r1
+	bcc	.L2360
+	.loc 1 2023 0
 	mov	r1, r5
-	ldr	r2, [sp, #36]
+	ldr	r2, [sp, #32]
 	bl	FlashReadPages
-	ldr	r2, .L2500+4
-	movs	r1, #36
-	ldr	r3, .L2500+56
-	movs	r0, #0
-	movw	ip, #65535
-	ldrb	lr, [r2]	@ zero_extendqisi2
-	ldr	r2, .L2500+16
+.LVL2622:
+	.loc 1 2033 0
+	ldr	r3, .L2493+4
+	movs	r2, #36
+	ldr	ip, .L2493+60
+	.loc 1 2027 0
+	movw	r1, #65535
+	.loc 1 2033 0
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2493+16
 	ldr	r3, [r3]
-	ldr	r2, [r2]
-	mla	r5, r1, r5, r2
-.L2362:
-	cmp	r2, r5
-	bne	.L2372
-	cbz	r0, .L2373
-	ldr	r2, .L2500+56
-	str	r3, [r2]
-.L2373:
+	mla	r5, r2, r5, r3
+.LVL2623:
+.L2361:
+	.loc 1 2024 0 discriminator 1
+	cmp	r5, r3
+	bne	.L2370
+	.loc 1 2014 0
 	adds	r4, r4, #1
+.LVL2624:
 	uxth	r4, r4
-	b	.L2359
-.L2501:
+.LVL2625:
+	b	.L2358
+.L2494:
 	.align	2
-.L2500:
-	.word	.LANCHOR51
+.L2493:
+	.word	.LANCHOR52
 	.word	.LANCHOR8
 	.word	.LANCHOR16
-	.word	.LANCHOR36
-	.word	.LANCHOR178
+	.word	.LANCHOR37
+	.word	.LANCHOR177
 	.word	.LANCHOR105
-	.word	.LANCHOR57
-	.word	.LANCHOR158
+	.word	.LANCHOR58
+	.word	.LANCHOR157
 	.word	.LANCHOR228
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LC43
+	.word	.LC7
+	.word	.LC8
+	.word	.LC46
 	.word	.LANCHOR229
 	.word	.LANCHOR133
-.L2372:
-	ldr	r1, [r2]
-	cbnz	r1, .L2363
-	ldr	r1, [r2, #12]
-	ldrh	r8, [r1]
-	cmp	r8, ip
-	beq	.L2419
-	ldr	r1, [r1, #4]
-	cmp	r1, #-1
-	beq	.L2419
-	adds	r0, r7, #1
-	bne	.L2421
-	ldr	r0, .L2502
-	ldrh	r0, [r0, r4, lsl #1]
-	cmp	r0, ip
-	bne	.L2365
-	cmp	lr, #0
-	beq	.L2421
-.L2365:
-	ldr	r0, [sp, #4]
-	cmp	r0, r3
+	.word	.LANCHOR117
+.L2370:
+	.loc 1 2025 0
+	ldr	r2, [r3]
+	cbnz	r2, .L2362
+	.loc 1 2026 0
+	ldr	r2, [r3, #12]
+.LVL2626:
+	.loc 1 2027 0
+	ldrh	lr, [r2]
+	cmp	lr, r1
+	beq	.L2363
+	.loc 1 2029 0
+	ldr	r2, [r2, #4]
+.LVL2627:
+	cmp	r2, #-1
+	beq	.L2363
+	.loc 1 2030 0
+	ldr	r6, [fp]
+.LVL2628:
+	.loc 1 2031 0
+	str	r2, [fp]
+.LVL2629:
+	.loc 1 2032 0
+	adds	r2, r7, #1
+	bne	.L2363
+	.loc 1 2032 0 is_stmt 0 discriminator 1
+	ldrh	r2, [ip, r4, lsl #1]
+	cmp	r2, r1
+	bne	.L2364
+	.loc 1 2033 0 is_stmt 1
+	cbz	r0, .L2363
+.L2364:
+	.loc 1 2034 0
+	ldr	r2, [sp]
+	cmp	r2, r6
 	it	ne
-	movne	r7, r3
-.L2421:
-	movs	r0, #1
-	b	.L2364
+	movne	r7, r6
+.LVL2630:
 .L2363:
-	cbz	r0, .L2366
-	ldr	r2, .L2502+4
-	str	r3, [r2]
-.L2366:
-	ldr	r3, .L2502+8
-	ldrh	r2, [r10]
+	adds	r3, r3, #36
+	b	.L2361
+.L2362:
+	.loc 1 2040 0
+	ldr	r3, .L2495
+	ldrh	r2, [r8]
 	strh	r2, [r3]	@ movhi
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
-	cbnz	r3, .L2356
-	ldr	r3, .L2502
+	.loc 1 2041 0
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	cbnz	r3, .L2355
+	.loc 1 2043 0
+	ldr	r3, .L2495+4
 	ldrh	r2, [r3, r4, lsl #1]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2368
-	adds	r1, r7, #1
-	ldr	r3, .L2502+4
-	beq	.L2369
+	bne	.L2366
+	.loc 1 2045 0
+	adds	r2, r7, #1
+	ldr	r3, .L2495+8
+	beq	.L2367
+	.loc 1 2046 0
 	str	r7, [r3]
-.L2356:
-	ldr	r3, .L2502+12
+.LVL2631:
+.L2355:
+.LBE502:
+	.loc 1 2069 0
+	ldr	r3, .L2495+12
 	movs	r2, #1
-	ldr	r0, .L2502+16
-	ldr	r6, .L2502+20
+	.loc 1 2070 0
+	ldr	r0, .L2495+16
+	.loc 1 2079 0
+	ldr	r10, .L2495+64
+	.loc 1 2069 0
 	strh	r2, [r3]	@ movhi
+	.loc 1 2070 0
 	bl	FtlMapBlkWriteDumpData
-	ldr	fp, [sp, #12]
-.L2376:
-	ldr	r3, .L2502+24
-	movw	ip, #65535
-	ldr	r0, [r6]
-	mov	lr, #36
+.LVL2632:
+	ldr	fp, [sp, #8]
+.LVL2633:
+.L2373:
+	.loc 1 2076 0
+	ldr	r3, .L2495+20
+	.loc 1 2078 0
+	movw	r7, #65535
+	.loc 1 2079 0
+	ldr	r0, [r10]
+	mov	ip, #36
+	.loc 1 2076 0
 	ldr	r1, [sp, #20]
 	movs	r2, #0
 	ldrh	r5, [r3]
-	ldr	r3, .L2502+28
-	str	r2, [sp, #24]
-	ldrb	r7, [r3]	@ zero_extendqisi2
-.L2377:
+	.loc 1 2080 0
+	ldr	r3, .L2495+24
+	.loc 1 2075 0
+	str	r2, [sp, #16]
+	.loc 1 2080 0
+	ldrb	r6, [r3]	@ zero_extendqisi2
+.LVL2634:
+.L2374:
+	.loc 1 2076 0 discriminator 1
 	uxth	r3, r2
-	cmp	r3, r5
-	bcc	.L2380
-	ldr	r2, [sp, #36]
-	ldr	r1, [sp, #24]
+	cmp	r5, r3
+	bhi	.L2377
+	.loc 1 2085 0
+	ldr	r2, [sp, #32]
+.LVL2635:
+	ldr	r1, [sp, #16]
 	bl	FlashReadPages
+.LVL2636:
+	.loc 1 2086 0
 	movs	r3, #0
-.L2497:
-	str	r3, [sp, #32]
-	ldr	r2, [sp, #24]
-	ldrh	r3, [sp, #32]
+.LVL2637:
+.L2490:
+	str	r3, [sp, #28]
+.LVL2638:
+	.loc 1 2086 0 is_stmt 0 discriminator 2
+	ldr	r2, [sp, #16]
+	ldrh	r3, [sp, #28]
 	cmp	r2, r3
-	bhi	.L2409
-	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	bhi	.L2407
+	.loc 1 2243 0 is_stmt 1
+	ldrb	r3, [r8, #8]	@ zero_extendqisi2
+	.loc 1 2242 0
 	add	fp, fp, #1
+.LVL2639:
 	uxth	fp, fp
+.LVL2640:
+	.loc 1 2243 0
 	cmp	r3, #1
-	bne	.L2410
-	ldr	r3, .L2502+28
+	bne	.L2408
+	.loc 1 2243 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2495+24
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2410
-	ldr	r3, .L2502+32
+	cbz	r3, .L2408
+	.loc 1 2244 0 is_stmt 1
+	ldr	r3, .L2495+28
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2410
-	ldr	r3, [sp, #8]
+	bne	.L2408
+	.loc 1 2244 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #4]
 	cmp	r3, fp
-	beq	.L2385
-.L2410:
-	ldr	r3, .L2502+36
+	beq	.L2382
+.L2408:
+	.loc 1 2248 0 is_stmt 1
+	ldr	r3, .L2495+32
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2376
-	ldr	r2, .L2502+24
+	bne	.L2373
+	.loc 1 2251 0
+	ldr	r2, .L2495+20
+	.loc 1 2253 0
 	movw	r0, #65535
+	.loc 1 2250 0
 	movs	r3, #0
-	strh	fp, [r10, #2]	@ movhi
-	strh	r3, [r10, #4]	@ movhi
+	.loc 1 2249 0
+	strh	fp, [r8, #2]	@ movhi
+	.loc 1 2250 0
+	strh	r3, [r8, #4]	@ movhi
+.LVL2641:
+	.loc 1 2251 0
 	ldrh	r2, [r2]
-.L2411:
+.LVL2642:
+.L2409:
+	.loc 1 2251 0 is_stmt 0 discriminator 1
 	uxth	r1, r3
 	cmp	r1, r2
-	bcs	.L2491
+	bcs	.L2484
+	.loc 1 2252 0 is_stmt 1
 	ldr	r1, [sp, #20]
 	ldrh	r4, [r1], #2
+	.loc 1 2253 0
 	cmp	r4, r0
+	.loc 1 2252 0
 	str	r1, [sp, #20]
+.LVL2643:
 	add	r1, r3, #1
-	bne	.L2498
+	.loc 1 2253 0
+	bne	.L2491
 	mov	r3, r1
-	b	.L2411
-.L2369:
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #24]
+.LVL2644:
+	b	.L2409
+.LVL2645:
+.L2367:
+.LBB503:
+	.loc 1 2047 0
+	ldr	r2, [sp]
+	ldr	r1, [sp, #28]
 	cmp	r2, r1
+	.loc 1 2050 0
 	itet	eq
 	ldreq	r2, [r3]
+	.loc 1 2048 0
 	movne	r2, r1
+	.loc 1 2050 0
 	addeq	r2, r2, #-1
-.L2494:
+.L2487:
+	.loc 1 2064 0
 	str	r2, [r3]
-	b	.L2356
-.L2368:
-	ldr	r3, [sp, #4]
+	b	.L2355
+.L2366:
+	.loc 1 2052 0
+	ldr	r3, [sp]
 	cmp	r6, r3
-	beq	.L2371
-	adds	r2, r6, #1
-	beq	.L2356
-	ldr	r3, .L2502+4
+	beq	.L2369
+	.loc 1 2053 0
+	adds	r3, r6, #1
+	beq	.L2355
+	.loc 1 2054 0
+	ldr	r3, .L2495+8
 	str	r6, [r3]
-	b	.L2356
-.L2371:
-	ldr	r2, .L2502+4
-	ldr	r1, [sp, #4]
+	b	.L2355
+.L2369:
+	.loc 1 2055 0
+	ldr	r2, .L2495+8
+	ldr	r1, [sp]
 	ldr	r3, [r2]
 	cmp	r1, r3
-	beq	.L2356
+	beq	.L2355
+	.loc 1 2056 0
 	subs	r3, r3, #1
 	str	r3, [r2]
-	b	.L2356
-.L2419:
-	mov	r1, r3
-	mov	r3, r6
-.L2364:
-	mov	r6, r3
-	adds	r2, r2, #36
-	mov	r3, r1
-	b	.L2362
-.L2374:
+	b	.L2355
+.L2371:
+	.loc 1 2064 0
 	mov	r2, #-1
-	ldr	r3, .L2502+4
-	b	.L2494
-.L2380:
+	ldr	r3, .L2495+8
+	b	.L2487
+.LVL2646:
+.L2377:
+.LBE503:
+	.loc 1 2077 0
 	ldrh	r3, [r1], #2
-	cmp	r3, ip
-	beq	.L2378
-	ldr	r4, [sp, #24]
+.LVL2647:
+	.loc 1 2078 0
+	cmp	r3, r7
+	beq	.L2375
+	.loc 1 2079 0
+	ldr	r4, [sp, #16]
 	orr	r3, fp, r3, lsl #10
-	mla	r4, lr, r4, r0
+.LVL2648:
+	mla	r4, ip, r4, r0
 	str	r3, [r4, #4]
-	ldrb	r8, [r10, #8]	@ zero_extendqisi2
-	cmp	r8, #1
-	bne	.L2379
-	cbz	r7, .L2379
+.LVL2649:
+	.loc 1 2080 0
+	ldrb	lr, [r8, #8]	@ zero_extendqisi2
+	cmp	lr, #1
+	bne	.L2376
+	.loc 1 2080 0 is_stmt 0 discriminator 1
+	cbz	r6, .L2376
+	.loc 1 2081 0 is_stmt 1
 	orr	r3, r3, #-2147483648
 	str	r3, [r4, #4]
-.L2379:
-	ldr	r3, [sp, #24]
+.L2376:
+	.loc 1 2082 0
+	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	str	r3, [sp, #24]
-.L2378:
+	str	r3, [sp, #16]
+.LVL2650:
+.L2375:
 	adds	r2, r2, #1
-	b	.L2377
-.L2409:
-	ldr	r3, [sp, #32]
+.LVL2651:
+	b	.L2374
+.LVL2652:
+.L2407:
+	ldr	r3, [sp, #28]
 	movs	r5, #36
-	ldr	r8, [r6]
+	.loc 1 2087 0
+	ldr	r7, [r10]
 	muls	r5, r3, r5
-	add	r7, r8, r5
-	ldr	r4, [r7, #4]
+	adds	r6, r7, r5
+	ldr	r4, [r6, #4]
+	.loc 1 2088 0
 	ubfx	r0, r4, #10, #16
+	.loc 1 2087 0
 	str	r4, [sp, #52]
+	.loc 1 2088 0
 	bl	P2V_plane
-	ldr	r3, [sp, #12]
+.LVL2653:
+	.loc 1 2090 0
+	ldr	r3, [sp, #8]
 	cmp	fp, r3
-	bcc	.L2382
-	bne	.L2383
-	ldr	r3, [sp, #28]
+	bcc	.L2379
+	.loc 1 2090 0 is_stmt 0 discriminator 1
+	bne	.L2380
+	.loc 1 2091 0 is_stmt 1
+	ldr	r3, [sp, #24]
 	cmp	r3, r0
-	bhi	.L2382
-.L2383:
-	ldr	r3, [sp, #8]
+	bhi	.L2379
+.L2380:
+	.loc 1 2094 0
+	ldr	r3, [sp, #4]
 	cmp	fp, r3
-	bne	.L2384
-	ldr	r3, [sp, #16]
+	bne	.L2381
+	.loc 1 2094 0 is_stmt 0 discriminator 1
+	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	beq	.L2385
-.L2384:
-	ldr	r3, [r8, r5]
+	beq	.L2382
+.L2381:
+.LVL2654:
+	.loc 1 2098 0 is_stmt 1
+	ldr	r3, [r7, r5]
 	adds	r3, r3, #1
-	beq	.L2386
-	ldr	r3, [r7, #12]
-	movw	r2, #61589
-	ldrh	r1, [r3]
-	cmp	r1, r2
-	beq	.L2387
-.L2393:
-	ldrh	r0, [r10]
-.L2496:
+	beq	.L2383
+	.loc 1 2101 0
+	ldr	r6, [r6, #12]
+.LVL2655:
+	.loc 1 2102 0
+	movw	r3, #61589
+	ldrh	r2, [r6]
+	cmp	r2, r3
+	beq	.L2384
+.LVL2656:
+.L2391:
+.LBB504:
+	.loc 1 2135 0
+	ldrh	r0, [r8]
+.LVL2657:
+.L2489:
+.LBE504:
+	.loc 1 2219 0
 	bl	decrement_vpc_count
-.L2382:
-	ldr	r3, [sp, #32]
+.LVL2658:
+.L2379:
+	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
-	b	.L2497
-.L2387:
-	ldr	r2, [r3, #4]
-	str	r2, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2388
-	ldr	r2, .L2502+40
-	ldr	r0, [sp, #4]
-	ldr	r1, [r2]
+	b	.L2490
+.LVL2659:
+.L2384:
+	.loc 1 2108 0
+	ldr	r3, [r6, #4]
+	str	r3, [sp]
+.LVL2660:
+	.loc 1 2109 0
+	adds	r3, r3, #1
+.LVL2661:
+	beq	.L2385
+	.loc 1 2110 0 discriminator 1
+	ldr	r3, .L2495+36
+	ldr	r0, [sp]
+.LVL2662:
+	ldr	r1, [r3]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L2388
-	ldr	r1, [sp, #4]
-	adds	r1, r1, #1
-	str	r1, [r2]
-.L2388:
-	ldr	r4, [r3, #8]
+.LVL2663:
+	.loc 1 2109 0 discriminator 1
+	cbz	r0, .L2385
+	.loc 1 2112 0
+	ldr	r2, [sp]
+	adds	r2, r2, #1
+	str	r2, [r3]
+.L2385:
+	.loc 1 2115 0
+	ldrh	r2, [r6]
+	movw	r3, #61589
+	cmp	r2, r3
+	beq	.L2386
+	.loc 1 2115 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2495+40
+	movw	r2, #2115
+	ldr	r0, .L2495+44
+	bl	printf
+.LVL2664:
+	ldr	r1, .L2495+48
+	ldr	r0, .L2495+52
+	bl	printf
+.LVL2665:
+.L2386:
+	.loc 1 2116 0 is_stmt 1
+	ldr	r4, [r6, #8]
+.LVL2666:
+	.loc 1 2118 0
 	add	r1, sp, #48
-	ldr	r3, [r3, #12]
+	.loc 1 2117 0
+	ldr	r3, [r6, #12]
+	.loc 1 2118 0
 	movs	r2, #0
 	mov	r0, r4
+	.loc 1 2117 0
 	str	r3, [sp, #44]
+	.loc 1 2118 0
 	bl	log2phys
-	ldr	r3, .L2502+4
+.LVL2667:
+	.loc 1 2119 0
+	ldr	r3, .L2495+8
 	ldr	r1, [r3]
-	adds	r3, r1, #1
-	beq	.L2389
-	ldr	r0, [sp, #4]
+	adds	r7, r1, #1
+	beq	.L2387
+	.loc 1 2120 0 discriminator 1
+	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
+.LVL2668:
+	.loc 1 2119 0 discriminator 1
 	cmp	r0, #0
-	beq	.L2389
+	beq	.L2387
+.LBB505:
+	.loc 1 2124 0
 	ldr	r3, [sp, #44]
-	adds	r7, r3, #1
-	beq	.L2390
-	ldr	r0, [r6]
+	adds	r6, r3, #1
+.LVL2669:
+	beq	.L2388
+	.loc 1 2125 0
+	ldr	r0, [r10]
+	.loc 1 2127 0
 	movs	r2, #0
 	movs	r1, #1
+	.loc 1 2125 0
 	add	r0, r0, r5
+	.loc 1 2126 0
 	str	r3, [r0, #4]
-	ldr	r7, [r0, #12]
+	.loc 1 2125 0
+	ldr	r6, [r0, #12]
+.LVL2670:
+	.loc 1 2127 0
 	bl	FlashReadPages
-	ldr	r2, [r6]
+.LVL2671:
+	.loc 1 2140 0
+	ldr	r2, [r10]
 	ldr	r1, [r2, r5]
 	adds	r3, r2, r5
 	adds	r1, r1, #1
-	bne	.L2391
-.L2392:
+	bne	.L2389
+.LVL2672:
+.L2390:
+	.loc 1 2172 0
 	mov	r3, #-1
-	ldrh	r0, [r10]
+	.loc 1 2173 0
+	ldrh	r0, [r8]
+	.loc 1 2172 0
 	str	r3, [sp, #44]
+	.loc 1 2173 0
 	bl	decrement_vpc_count
-.L2400:
-	ldr	r7, [sp, #44]
-	adds	r0, r7, #1
-	beq	.L2382
-.L2414:
-	ubfx	r0, r7, #10, #16
+.LVL2673:
+.L2398:
+.LBE505:
+	.loc 1 2213 0
+	ldr	r6, [sp, #44]
+	adds	r0, r6, #1
+	beq	.L2379
+.L2412:
+	.loc 1 2215 0
+	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2502+44
+.LVL2674:
+	.loc 1 2216 0
+	ldr	r3, .L2495+56
+	.loc 1 2215 0
 	mov	r4, r0
+.LVL2675:
+	.loc 1 2216 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bhi	.L2405
-	ldr	r1, .L2502+48
-	movw	r2, #2179
-	ldr	r0, .L2502+52
+	bhi	.L2403
+	.loc 1 2216 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2495+40
+	movw	r2, #2216
+	ldr	r0, .L2495+44
+.LVL2676:
 	bl	printf
-	ldr	r1, .L2502+56
-	ldr	r0, .L2502+60
+.LVL2677:
+	ldr	r1, .L2495+48
+	ldr	r0, .L2495+52
 	bl	printf
-.L2405:
-	ldr	r3, .L2502+64
+.LVL2678:
+.L2403:
+	.loc 1 2217 0 is_stmt 1
+	ldr	r3, .L2495+60
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r4, lsl #1]
 	cmp	r3, #0
-	beq	.L2406
+	beq	.L2404
+	.loc 1 2219 0
 	mov	r0, r4
-	b	.L2496
-.L2390:
+	b	.L2489
+.LVL2679:
+.L2388:
+.LBB506:
+	.loc 1 2131 0
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	bne	.L2393
+	bne	.L2391
+	.loc 1 2132 0
 	movs	r2, #1
 	add	r1, sp, #44
 	mov	r0, r4
 	bl	log2phys
-	b	.L2393
-.L2503:
-	.align	2
-.L2502:
-	.word	.LANCHOR117
-	.word	.LANCHOR133
-	.word	.LANCHOR229
-	.word	.LANCHOR230
-	.word	.LANCHOR124
-	.word	.LANCHOR178
-	.word	.LANCHOR36
-	.word	.LANCHOR8
-	.word	.LANCHOR52
-	.word	.LANCHOR51
-	.word	.LANCHOR158
-	.word	.LANCHOR38
-	.word	.LANCHOR228
-	.word	.LC4
-	.word	.LC5
-	.word	.LC6
-	.word	.LANCHOR82
-.L2391:
-	ldr	r1, [r7, #8]
+.LVL2680:
+	b	.L2391
+.LVL2681:
+.L2389:
+	.loc 1 2140 0 discriminator 1
+	ldr	r1, [r6, #8]
 	cmp	r4, r1
-	bne	.L2392
-	ldr	r8, [r7, #4]
-	ldr	r0, .L2504
-	mov	r1, r8
+	bne	.L2390
+	.loc 1 2128 0 discriminator 2
+	ldr	r7, [r6, #4]
+	.loc 1 2141 0 discriminator 2
+	ldr	r0, .L2495+8
+	mov	r1, r7
 	ldr	r0, [r0]
 	bl	ftl_cmp_data_ver
+.LVL2682:
+	.loc 1 2140 0 discriminator 2
 	cmp	r0, #0
-	beq	.L2392
+	beq	.L2390
+	.loc 1 2142 0
 	ldr	r1, [sp, #48]
 	ldr	r0, [sp, #52]
 	cmp	r1, r0
-	bne	.L2395
-.L2398:
+	bne	.L2393
+.L2396:
+	.loc 1 2168 0
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	bl	FtlReUsePrevPpa
-	b	.L2392
-.L2395:
+.LVL2683:
+	b	.L2390
+.L2496:
+	.align	2
+.L2495:
+	.word	.LANCHOR229
+	.word	.LANCHOR117
+	.word	.LANCHOR133
+	.word	.LANCHOR230
+	.word	.LANCHOR124
+	.word	.LANCHOR37
+	.word	.LANCHOR8
+	.word	.LANCHOR53
+	.word	.LANCHOR52
+	.word	.LANCHOR157
+	.word	.LANCHOR228
+	.word	.LC6
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR39
+	.word	.LANCHOR83
+	.word	.LANCHOR177
+.L2393:
+	.loc 1 2145 0
 	ldr	r0, [sp, #44]
 	cmp	r1, r0
-	beq	.L2392
+	beq	.L2390
+	.loc 1 2146 0
 	adds	r0, r1, #1
-	beq	.L2396
+	beq	.L2394
+	.loc 1 2148 0
 	str	r1, [r3, #4]
+	.loc 1 2149 0
 	movs	r2, #0
 	movs	r1, #1
 	mov	r0, r3
-	ldr	r7, [r3, #12]
+	.loc 1 2147 0
+	ldr	r6, [r3, #12]
+.LVL2684:
+	.loc 1 2149 0
 	bl	FlashReadPages
-.L2397:
-	ldr	r3, [r6]
+.LVL2685:
+.L2395:
+	.loc 1 2154 0
+	ldr	r3, [r10]
 	ldr	r3, [r3, r5]
 	adds	r3, r3, #1
-	beq	.L2398
-	ldr	r3, [r7, #4]
-	ldr	r2, .L2504
+	beq	.L2396
+	.loc 1 2155 0
+	ldr	r3, [r6, #4]
+.LVL2686:
+	.loc 1 2156 0
+	ldr	r2, .L2497
 	mov	r1, r3
 	ldr	r0, [r2]
 	bl	ftl_cmp_data_ver
+.LVL2687:
 	cmp	r0, #0
-	beq	.L2398
+	beq	.L2396
+	.loc 1 2157 0
 	mov	r1, r3
-	mov	r0, r8
+	mov	r0, r7
 	bl	ftl_cmp_data_ver
+.LVL2688:
 	cmp	r0, #0
-	beq	.L2392
-	b	.L2398
-.L2396:
+	beq	.L2390
+.LVL2689:
+	b	.L2396
+.LVL2690:
+.L2394:
+	.loc 1 2151 0
 	str	r1, [r2, r5]
-	b	.L2397
-.L2389:
+	b	.L2395
+.L2387:
+.LBE506:
+	.loc 1 2174 0
 	ldr	r3, [sp, #52]
 	ldr	r2, [sp, #48]
 	cmp	r2, r3
-	beq	.L2400
+	beq	.L2398
+	.loc 1 2176 0
 	movs	r2, #1
 	add	r1, sp, #52
 	mov	r0, r4
 	bl	log2phys
-	ldr	r7, [sp, #48]
-	adds	r5, r7, #1
-	beq	.L2400
+.LVL2691:
+	.loc 1 2177 0
+	ldr	r6, [sp, #48]
+.LVL2692:
+	adds	r5, r6, #1
+	beq	.L2398
+	.loc 1 2177 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #44]
-	cmp	r7, r3
-	beq	.L2414
-	ubfx	r0, r7, #10, #16
+	cmp	r6, r3
+	beq	.L2412
+	.loc 1 2178 0 is_stmt 1
+	ubfx	r0, r6, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L2504+4
+.LVL2693:
+	.loc 1 2180 0
+	ldr	r3, .L2497+4
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2404
-	ldr	r3, .L2504+8
+	beq	.L2402
+	.loc 1 2181 0 discriminator 1
+	ldr	r3, .L2497+8
+	.loc 1 2180 0 discriminator 1
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L2404
-	ldr	r3, .L2504+12
+	beq	.L2402
+	.loc 1 2182 0
+	ldr	r3, .L2497+12
+	.loc 1 2181 0
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2400
-.L2404:
-	ldr	r0, [r6]
+	bne	.L2398
+.L2402:
+.LVL2694:
+.LBB507:
+	.loc 1 2186 0
+	ldr	r0, [r10]
+.LVL2695:
+	.loc 1 2189 0
 	movs	r2, #0
 	movs	r1, #1
-	str	r7, [r0, #4]
+	.loc 1 2188 0
+	str	r6, [r0, #4]
+	.loc 1 2186 0
 	ldr	r5, [r0, #12]
+.LVL2696:
+	.loc 1 2189 0
 	bl	FlashReadPages
-	ldr	r3, [r6]
+.LVL2697:
+	.loc 1 2192 0
+	ldr	r3, [r10]
 	ldr	r3, [r3]
 	adds	r3, r3, #1
-	beq	.L2400
+	beq	.L2398
+	.loc 1 2193 0
 	ldr	r1, [r5, #4]
-	ldr	r0, [sp, #4]
+	ldr	r0, [sp]
 	bl	ftl_cmp_data_ver
+.LVL2698:
 	cmp	r0, #0
-	bne	.L2400
+	bne	.L2398
+	.loc 1 2200 0
 	movs	r2, #1
 	add	r1, sp, #48
+.LVL2699:
 	mov	r0, r4
 	bl	log2phys
-	b	.L2400
-.L2406:
+.LVL2700:
+	b	.L2398
+.LVL2701:
+.L2404:
+.LBE507:
+	.loc 1 2221 0
 	mov	r1, r4
-	ldr	r0, .L2504+16
+	ldr	r0, .L2497+16
 	bl	printf
-	b	.L2382
-.L2386:
-	ldrh	r3, [r10]
+.LVL2702:
+	b	.L2379
+.LVL2703:
+.L2383:
+	.loc 1 2227 0
+	ldrh	r3, [r8]
+	.loc 1 2228 0
 	mov	r1, r4
-	ldr	r2, .L2504+20
-	ldr	r0, .L2504+24
+	.loc 1 2227 0
+	ldr	r2, .L2497+20
+	.loc 1 2228 0
+	ldr	r0, .L2497+24
+.LVL2704:
+	.loc 1 2227 0
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [sp, #4]
+	.loc 1 2228 0
+	ldr	r2, [sp]
 	bl	printf
-	ldr	r2, .L2504+28
+.LVL2705:
+	.loc 1 2229 0
+	ldr	r2, .L2497+28
 	ldr	r3, [r2]
 	cmp	r3, #31
-	bhi	.L2407
+	bhi	.L2405
+	.loc 1 2230 0
 	ldr	r0, [sp, #52]
-	ldr	r1, .L2504+32
+	ldr	r1, .L2497+32
 	str	r0, [r1, r3, lsl #2]
+	.loc 1 2231 0
 	adds	r3, r3, #1
 	str	r3, [r2]
-.L2407:
-	ldrh	r0, [r10]
+.L2405:
+	.loc 1 2233 0
+	ldrh	r0, [r8]
 	bl	decrement_vpc_count
-	ldr	r3, .L2504
+.LVL2706:
+	.loc 1 2235 0
+	ldr	r3, .L2497
 	ldr	r2, [r3]
 	adds	r1, r2, #1
-	bne	.L2408
-	ldr	r2, [sp, #4]
-.L2495:
+	bne	.L2406
+	.loc 1 2236 0
+	ldr	r2, [sp]
+.L2488:
+	.loc 1 2238 0
 	str	r2, [r3]
-	b	.L2382
-.L2408:
-	ldr	r1, [sp, #4]
+	b	.L2379
+.L2406:
+	.loc 1 2237 0
+	ldr	r1, [sp]
 	cmp	r1, r2
-	bcs	.L2382
+	bcs	.L2379
+	.loc 1 2238 0
 	mov	r2, r1
-	b	.L2495
-.L2385:
-	ldrb	r3, [sp, #16]	@ zero_extendqisi2
-	ldr	r2, [sp, #16]
-	strb	r3, [r10, #6]
-	ldrh	r3, [sp, #8]
-	strh	r3, [r10, #2]	@ movhi
-	b	.L2499
-.L2505:
+	b	.L2488
+.LVL2707:
+.L2382:
+.LDL3:
+	.loc 1 2267 0
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+	.loc 1 2269 0
+	ldr	r2, [sp, #12]
+	.loc 1 2267 0
+	strb	r3, [r8, #6]
+	.loc 1 2268 0
+	ldrh	r3, [sp, #4]
+	strh	r3, [r8, #2]	@ movhi
+	b	.L2492
+.L2498:
 	.align	2
-.L2504:
+.L2497:
 	.word	.LANCHOR133
-	.word	.LANCHOR90
 	.word	.LANCHOR91
 	.word	.LANCHOR92
-	.word	.LC44
+	.word	.LANCHOR93
+	.word	.LC47
 	.word	.LANCHOR229
-	.word	.LC45
+	.word	.LC48
 	.word	.LANCHOR231
 	.word	.LANCHOR232
+	.cfi_endproc
+.LFE372:
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
 	.align	1
@@ -17435,194 +28398,320 @@ FtlRecoverySuperblock:
 	.fpu softvfp
 	.type	FtlGcScanTempBlk, %function
 FtlGcScanTempBlk:
+.LFB398:
+	.loc 6 227 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2533
+.LVL2708:
+	.loc 6 236 0
+	ldr	r3, .L2526
+	.loc 6 237 0
 	movw	r2, #65535
+	.loc 6 227 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #24
+	.cfi_def_cfa_offset 56
+	.loc 6 227 0
 	mov	r5, r0
+	.loc 6 236 0
 	ldrh	r4, [r3]
+.LVL2709:
 	str	r3, [sp, #16]
+	.loc 6 237 0
 	cmp	r4, r2
-	beq	.L2524
-	cbnz	r4, .L2507
-.L2508:
+	beq	.L2517
+	.loc 6 239 0
+	cbnz	r4, .L2500
+.L2501:
+	.loc 6 240 0
 	bl	FtlGcPageVarInit
-	b	.L2509
-.L2524:
+.LVL2710:
+	b	.L2502
+.LVL2711:
+.L2517:
+	.loc 6 238 0
 	movs	r4, #0
-.L2507:
-	ldr	r3, .L2533+4
+.LVL2712:
+.L2500:
+	.loc 6 239 0 discriminator 1
+	ldr	r3, .L2526+4
 	ldrh	r3, [r3]
 	cmp	r3, r1
-	beq	.L2508
-.L2509:
-	ldr	fp, .L2533+44
+	beq	.L2501
+.LVL2713:
+.L2502:
+	.loc 6 250 0
+	ldr	fp, .L2526+44
+	.loc 6 238 0
 	mov	r3, #-1
 	str	r3, [sp, #8]
-.L2521:
+.LVL2714:
+.L2514:
+	.loc 6 244 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
+	.loc 6 242 0
 	movs	r0, #0
 	strb	r0, [r5, #8]
+.LVL2715:
+	.loc 6 244 0
 	cmp	r2, r3
-	beq	.L2510
-.L2523:
-	ldr	r3, .L2533+8
+	beq	.L2503
+.L2516:
+.LVL2716:
+	.loc 6 247 0
+	ldr	r3, .L2526+8
+	.loc 6 249 0
 	movw	ip, #65535
+	.loc 6 250 0
 	ldr	r0, [fp]
 	mov	lr, #36
+	.loc 6 247 0
 	ldrh	r8, [r3]
-	ldr	r3, .L2533+12
+	.loc 6 252 0
+	ldr	r3, .L2526+12
 	ldr	r3, [r3]
 	str	r3, [sp, #12]
-	ldr	r3, .L2533+16
+	ldr	r3, .L2526+16
 	ldrh	r10, [r3]
 	add	r3, r5, #16
 	str	r3, [sp, #4]
+	.loc 6 247 0
 	movs	r3, #0
+	.loc 6 246 0
 	mov	r6, r3
-.L2511:
+.LVL2717:
+.L2504:
+	.loc 6 247 0 discriminator 1
 	uxth	r2, r3
 	cmp	r8, r2
-	bhi	.L2513
+	bhi	.L2506
+	.loc 6 257 0
 	movs	r7, #0
 	mov	r10, #36
+	.loc 6 256 0
 	movs	r2, #0
 	mov	r1, r6
 	bl	FlashReadPages
-.L2514:
+.LVL2718:
+.L2507:
+	.loc 6 257 0 discriminator 1
 	uxth	r3, r7
 	cmp	r6, r3
-	bhi	.L2522
-	ldr	r3, .L2533+4
+	bhi	.L2515
+	.loc 6 292 0
+	ldr	r3, .L2526+4
+	.loc 6 282 0
 	adds	r4, r4, #1
+.LVL2719:
 	uxth	r4, r4
+.LVL2720:
+	.loc 6 292 0
 	ldrh	r3, [r3]
 	cmp	r3, r4
-	bhi	.L2523
+	bhi	.L2516
+	.loc 6 283 0
 	movs	r0, #0
-	b	.L2510
-.L2513:
+	b	.L2503
+.LVL2721:
+.L2506:
+	.loc 6 248 0
 	ldr	r1, [sp, #4]
 	ldrh	r2, [r1], #2
+	.loc 6 249 0
 	cmp	r2, ip
+	.loc 6 248 0
 	str	r1, [sp, #4]
-	beq	.L2512
+.LVL2722:
+	.loc 6 249 0
+	beq	.L2505
+	.loc 6 250 0
 	mla	r1, lr, r6, r0
 	orr	r2, r4, r2, lsl #10
+.LVL2723:
 	str	r2, [r1, #4]
+.LVL2724:
+	.loc 6 251 0
 	movs	r2, #0
 	str	r2, [r1, #8]
+	.loc 6 252 0
 	mul	r2, r10, r6
+	.loc 6 253 0
 	adds	r6, r6, #1
+.LVL2725:
 	uxth	r6, r6
+.LVL2726:
+	.loc 6 252 0
 	bic	r2, r2, #3
 	mov	r7, r2
 	ldr	r2, [sp, #12]
 	add	r7, r7, r2
 	str	r7, [r1, #12]
-.L2512:
+.L2505:
+.LVL2727:
 	adds	r3, r3, #1
-	b	.L2511
-.L2522:
+.LVL2728:
+	b	.L2504
+.LVL2729:
+.L2515:
 	mul	r8, r10, r7
+	.loc 6 258 0
 	ldr	r2, [fp]
 	str	r2, [sp, #20]
 	add	r3, r2, r8
 	ldr	r1, [r3, #4]
 	str	r3, [sp, #12]
+.LVL2730:
+	.loc 6 259 0
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_plane
+.LVL2731:
+	.loc 6 261 0
 	ldr	r2, [sp, #20]
 	ldr	r1, [sp, #4]
 	ldr	r2, [r2, r8]
-	cbnz	r2, .L2515
+	cbnz	r2, .L2508
+	.loc 6 263 0
 	ldr	r3, [sp, #12]
+	.loc 6 264 0
 	movw	ip, #65535
 	adds	r7, r7, #1
+.LVL2732:
+	.loc 6 263 0
 	ldr	r3, [r3, #12]
+.LVL2733:
+	.loc 6 264 0
 	ldrh	r2, [r3]
 	cmp	r2, ip
-	bne	.L2516
-	ldr	r3, .L2533+20
+	bne	.L2509
+	.loc 6 265 0
+	ldr	r3, .L2526+20
+.LVL2734:
 	movs	r2, #1
 	str	r2, [r3]
-.L2510:
+.LVL2735:
+.L2503:
+	.loc 6 299 0
 	ldr	r2, [sp, #16]
 	movw	r3, #65535
+	.loc 6 301 0
 	strb	r0, [r5, #6]
+	.loc 6 302 0
 	mov	r1, r4
+	.loc 6 300 0
 	strh	r4, [r5, #2]	@ movhi
+	.loc 6 299 0
 	strh	r3, [r2]	@ movhi
+	.loc 6 302 0
 	mov	r2, r0
 	mov	r0, r5
+.LVL2736:
 	bl	ftl_sb_update_avl_pages
+.LVL2737:
+	.loc 6 304 0
 	ldr	r0, [sp, #8]
 	add	sp, sp, #24
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2516:
+.LVL2738:
+.L2509:
+	.cfi_restore_state
+	.loc 6 268 0
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
+.LVL2739:
 	bl	FtlGcUpdatePage
-	b	.L2514
-.L2515:
+.LVL2740:
+	b	.L2507
+.LVL2741:
+.L2508:
+	.loc 6 271 0
 	mov	r2, r1
-	ldr	r0, .L2533+24
+	ldr	r0, .L2526+24
+.LVL2742:
 	ldrh	r1, [r5]
+.LVL2743:
 	bl	printf
-	ldr	r3, .L2533+28
+.LVL2744:
+	.loc 6 272 0
+	ldr	r3, .L2526+28
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
-	cbnz	r3, .L2517
-	ldr	r3, .L2533+32
+	cbnz	r3, .L2510
+	.loc 6 272 0 is_stmt 0 discriminator 2
+	ldr	r3, .L2526+32
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2518
-.L2517:
-	ldr	r3, .L2533+36
+	cbz	r3, .L2511
+.L2510:
+	.loc 6 272 0 discriminator 3
+	ldr	r3, .L2526+36
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #119
-	bls	.L2519
-.L2518:
+	bls	.L2512
+.L2511:
+	.loc 6 272 0 discriminator 5
 	ldr	r3, [fp]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L2520
-.L2519:
+	bne	.L2513
+.L2512:
+	.loc 6 273 0 is_stmt 1
 	ldr	r3, [fp]
 	add	r3, r3, r8
 	ldr	r3, [r3, #4]
 	str	r3, [sp, #8]
-.L2520:
-	ldr	r3, .L2533+40
+.LVL2745:
+.L2513:
+	.loc 6 274 0
+	ldr	r3, .L2526+40
 	movs	r4, #0
+.LVL2746:
 	ldr	r3, [r3]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 6 275 0
 	ldrh	r0, [r5]
 	bl	INSERT_FREE_LIST
+.LVL2747:
+	.loc 6 276 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
+.LVL2748:
+	.loc 6 278 0
 	bl	FtlGcPageVarInit
-	b	.L2521
-.L2534:
+.LVL2749:
+	.loc 6 279 0
+	b	.L2514
+.L2527:
 	.align	2
-.L2533:
+.L2526:
 	.word	.LANCHOR233
-	.word	.LANCHOR51
-	.word	.LANCHOR36
+	.word	.LANCHOR52
+	.word	.LANCHOR37
 	.word	.LANCHOR105
-	.word	.LANCHOR57
+	.word	.LANCHOR58
 	.word	.LANCHOR132
-	.word	.LC46
-	.word	.LANCHOR101
+	.word	.LC49
+	.word	.LANCHOR28
 	.word	.LANCHOR8
-	.word	.LANCHOR77
-	.word	.LANCHOR82
-	.word	.LANCHOR178
+	.word	.LANCHOR78
+	.word	.LANCHOR83
+	.word	.LANCHOR177
+	.cfi_endproc
+.LFE398:
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
 	.align	1
@@ -17633,214 +28722,336 @@ FtlGcScanTempBlk:
 	.fpu softvfp
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
+.LFB396:
+	.loc 6 111 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2750:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
-	ldr	r3, .L2558
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 6 118 0
+	ldr	r3, .L2551
 	ldr	r3, [r3]
-	cbz	r3, .L2536
-.L2541:
+	cbz	r3, .L2529
+.LVL2751:
+.L2534:
+	.loc 6 119 0
 	movs	r0, #0
-.L2535:
+.L2528:
+	.loc 6 215 0
 	add	sp, sp, #16
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2536:
-	ldr	r0, .L2558+4
+.LVL2752:
+.L2529:
+	.cfi_restore_state
+	.loc 6 120 0
+	ldr	r0, .L2551+4
+.LVL2753:
 	movw	r3, #65535
-	ldr	r5, .L2558+8
+	ldr	r5, .L2551+8
 	ldrh	r6, [r0]
 	mov	r4, r0
 	cmp	r6, r3
-	beq	.L2538
-	ldr	r3, .L2558+12
+	beq	.L2531
+.LVL2754:
+	.loc 6 132 0
+	ldr	r3, .L2551+12
 	ldrh	r1, [r3]
 	bl	FtlGcScanTempBlk
+.LVL2755:
 	str	r0, [sp, #12]
+	.loc 6 133 0
 	adds	r0, r0, #1
-	beq	.L2538
-	ldr	r3, .L2558+16
+	beq	.L2531
+	.loc 6 136 0
+	ldr	r3, .L2551+16
 	ldr	r2, [r3]
 	ldrh	r3, [r2, r6, lsl #1]
 	cmp	r3, #4
-	bls	.L2539
+	bls	.L2532
+	.loc 6 137 0
 	subs	r3, r3, #5
+	.loc 6 138 0
 	movs	r0, #1
+	.loc 6 137 0
 	strh	r3, [r2, r6, lsl #1]	@ movhi
+	.loc 6 138 0
 	bl	FtlEctTblFlush
-.L2539:
+.LVL2756:
+.L2532:
+	.loc 6 140 0
 	ldr	r3, [r5]
-	cbnz	r3, .L2540
-	ldr	r2, .L2558+20
+	cbnz	r3, .L2533
+	.loc 6 141 0
+	ldr	r2, .L2551+20
+	.loc 6 142 0
 	ldr	r0, [sp, #12]
+	.loc 6 141 0
 	ldr	r3, [r2, #96]
+	.loc 6 142 0
 	ubfx	r0, r0, #10, #16
+	.loc 6 141 0
 	adds	r3, r3, #1
 	str	r3, [r2, #96]
+	.loc 6 142 0
 	bl	FtlBbmMapBadBlock
+.LVL2757:
+	.loc 6 143 0
 	bl	FtlBbmTblFlush
-.L2540:
+.LVL2758:
+.L2533:
+	.loc 6 145 0
 	movs	r3, #0
+	.loc 6 146 0
 	movs	r0, #1
+	.loc 6 145 0
 	str	r3, [r5]
-	b	.L2535
-.L2538:
+	.loc 6 146 0
+	b	.L2528
+.LVL2759:
+.L2531:
+	.loc 6 154 0
 	ldrh	r2, [r4]
+	.loc 6 153 0
 	movs	r3, #0
 	str	r3, [r5]
+	.loc 6 154 0
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2541
-	ldr	r6, .L2558+12
+	beq	.L2534
+.LVL2760:
+	.loc 6 163 0
+	ldr	r6, .L2551+12
+	.loc 6 161 0
 	bl	FtlCacheWriteBack
+.LVL2761:
+	.loc 6 163 0
 	ldrb	r0, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6]
-	ldr	r5, .L2558+24
+	ldr	r5, .L2551+24
 	muls	r2, r0, r2
 	ldrh	r1, [r5]
 	cmp	r1, r2
-	beq	.L2542
-	ldr	r1, .L2558+28
+	beq	.L2535
+	.loc 6 163 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2551+28
 	movs	r2, #163
-	ldr	r0, .L2558+32
+	ldr	r0, .L2551+32
 	bl	printf
-	ldr	r1, .L2558+36
-	ldr	r0, .L2558+40
+.LVL2762:
+	ldr	r1, .L2551+36
+	ldr	r0, .L2551+40
 	bl	printf
-.L2542:
+.LVL2763:
+.L2535:
+	.loc 6 164 0 is_stmt 1
 	ldrh	r6, [r6]
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldr	r2, .L2558+44
+	ldr	r2, .L2551+44
 	ldrh	r0, [r4]
-	ldr	fp, .L2558+84
+	.loc 6 168 0
+	ldr	fp, .L2551+84
+	.loc 6 164 0
 	smulbb	r3, r3, r6
 	ldr	r1, [r2]
+	.loc 6 166 0
 	movs	r6, #0
 	str	r2, [sp, #4]
+	.loc 6 164 0
 	strh	r3, [r1, r0, lsl #1]	@ movhi
-	ldr	r1, .L2558+48
+	.loc 6 165 0
+	ldr	r1, .L2551+48
 	ldrh	r3, [r5]
 	ldr	r0, [r1]
 	add	r3, r3, r0
 	str	r3, [r1]
-.L2543:
+.LVL2764:
+.L2536:
+	.loc 6 166 0 discriminator 1
 	ldrh	r2, [r5]
 	uxth	r3, r6
 	cmp	r2, r3
-	bhi	.L2547
+	bhi	.L2540
+	.loc 6 181 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
-	ldr	r3, .L2558+52
+.LVL2765:
+	.loc 6 182 0
+	ldr	r3, .L2551+52
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2548
+	cbz	r3, .L2541
+	.loc 6 183 0
 	ldrh	r1, [r4]
-	ldr	r0, .L2558+56
+	ldr	r0, .L2551+56
 	bl	printf
-.L2548:
+.LVL2766:
+.L2541:
+	.loc 6 184 0
 	ldr	r3, [sp, #4]
 	ldrh	r0, [r4]
 	ldr	r3, [r3]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L2549
+	beq	.L2542
+	.loc 6 185 0
 	bl	INSERT_DATA_LIST
-.L2550:
-	ldr	r3, .L2558+60
+.LVL2767:
+.L2543:
+	.loc 6 190 0
+	ldr	r3, .L2551+60
+	.loc 6 188 0
 	movw	r6, #65535
+.LVL2768:
 	strh	r6, [r4]	@ movhi
+	.loc 6 189 0
 	movs	r4, #0
 	strh	r4, [r5]	@ movhi
+	.loc 6 190 0
 	strh	r4, [r3]	@ movhi
+	.loc 6 191 0
 	bl	l2p_flush
+.LVL2769:
+	.loc 6 192 0
 	bl	FtlVpcTblFlush
-	ldr	r3, .L2558+64
+.LVL2770:
+	.loc 6 206 0
+	ldr	r3, .L2551+64
 	ldrh	r2, [r3]
-	ldr	r3, .L2558+68
+	ldr	r3, .L2551+68
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	cmp	r2, r3, asr #2
-	ble	.L2541
-	ldr	r3, .L2558+72
+	ble	.L2534
+	.loc 6 207 0
+	ldr	r3, .L2551+72
+	.loc 6 208 0
 	movs	r2, #20
+	.loc 6 214 0
 	mov	r0, r4
+	.loc 6 207 0
 	strh	r6, [r3]	@ movhi
-	ldr	r3, .L2558+76
+	.loc 6 208 0
+	ldr	r3, .L2551+76
 	strh	r2, [r3]	@ movhi
-	b	.L2535
-.L2547:
+	b	.L2528
+.LVL2771:
+.L2540:
+	.loc 6 167 0
 	uxth	r3, r6
 	movs	r7, #12
+	.loc 6 168 0
 	ldr	r2, [fp]
+	.loc 6 167 0
 	muls	r7, r3, r7
-	ldr	r3, .L2558+80
+	ldr	r3, .L2551+80
 	ldr	r8, [r3]
 	add	r10, r8, r7
+.LVL2772:
+	.loc 6 168 0
 	ldr	r1, [r10, #8]
 	cmp	r1, r2
-	bcc	.L2544
-	ldr	r1, .L2558+28
+	bcc	.L2537
+	.loc 6 168 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2551+28
 	movs	r2, #168
-	ldr	r0, .L2558+32
+	ldr	r0, .L2551+32
 	bl	printf
-	ldr	r1, .L2558+36
-	ldr	r0, .L2558+40
+.LVL2773:
+	ldr	r1, .L2551+36
+	ldr	r0, .L2551+40
 	bl	printf
-.L2544:
+.LVL2774:
+.L2537:
+	.loc 6 169 0 is_stmt 1
 	movs	r2, #0
 	add	r1, sp, #12
 	ldr	r0, [r10, #8]
 	bl	log2phys
+.LVL2775:
+	.loc 6 170 0
 	ldr	r2, [sp, #12]
 	ldr	r0, [r8, r7]
 	cmp	r0, r2
-	bne	.L2545
+	bne	.L2538
+	.loc 6 171 0
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
+.LVL2776:
+	.loc 6 172 0
 	movs	r2, #1
+	.loc 6 171 0
 	mov	r7, r0
+.LVL2777:
+	.loc 6 172 0
 	add	r1, r10, #4
 	ldr	r0, [r10, #8]
 	bl	log2phys
+.LVL2778:
+	.loc 6 173 0
 	mov	r0, r7
-.L2557:
+.LVL2779:
+.L2550:
+	.loc 6 177 0
 	bl	decrement_vpc_count
-.L2546:
+.LVL2780:
+.L2539:
 	adds	r6, r6, #1
-	b	.L2543
-.L2545:
+.LVL2781:
+	b	.L2536
+.LVL2782:
+.L2538:
+	.loc 6 175 0
 	ldr	r3, [r10, #4]
 	cmp	r2, r3
-	beq	.L2546
+	beq	.L2539
+	.loc 6 177 0
 	ldrh	r0, [r4]
-	b	.L2557
-.L2549:
-	bl	INSERT_FREE_LIST
 	b	.L2550
-.L2559:
+.LVL2783:
+.L2542:
+	.loc 6 187 0
+	bl	INSERT_FREE_LIST
+.LVL2784:
+	b	.L2543
+.L2552:
 	.align	2
-.L2558:
-	.word	.LANCHOR75
-	.word	.LANCHOR92
+.L2551:
+	.word	.LANCHOR76
+	.word	.LANCHOR93
 	.word	.LANCHOR132
-	.word	.LANCHOR51
-	.word	.LANCHOR77
-	.word	.LANCHOR136
-	.word	.LANCHOR110
+	.word	.LANCHOR52
+	.word	.LANCHOR78
+	.word	.LANCHOR135
+	.word	.LANCHOR111
 	.word	.LANCHOR234
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR82
-	.word	.LANCHOR159
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR83
+	.word	.LANCHOR158
 	.word	.LANCHOR8
-	.word	.LC47
+	.word	.LC50
 	.word	.LANCHOR109
-	.word	.LANCHOR87
+	.word	.LANCHOR88
 	.word	.LANCHOR227
 	.word	.LANCHOR201
-	.word	.LANCHOR174
-	.word	.LANCHOR111
-	.word	.LANCHOR71
+	.word	.LANCHOR173
+	.word	.LANCHOR110
+	.word	.LANCHOR72
+	.cfi_endproc
+.LFE396:
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -17851,42 +29062,81 @@ FtlGcFreeTempBlock:
 	.fpu softvfp
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
+.LFB400:
+	.loc 6 318 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 319 0
 	movw	r3, #65535
-	ldr	r4, .L2563
+	ldr	r4, .L2556
 	ldrh	r2, [r4]
 	cmp	r2, r3
-	beq	.L2561
+	beq	.L2554
+	.loc 6 319 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L2562
-.L2561:
+	cbnz	r3, .L2555
+.L2554:
+	.loc 6 320 0 is_stmt 1
 	bl	FtlCacheWriteBack
+.LVL2785:
+	.loc 6 321 0
 	movs	r0, #0
+	.loc 6 322 0
 	movs	r5, #0
+	.loc 6 321 0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L2563
+.LVL2786:
+	.loc 6 323 0
+	ldr	r0, .L2556
+	.loc 6 322 0
 	strb	r5, [r4, #8]
+	.loc 6 323 0
 	bl	allocate_data_superblock
-	ldr	r3, .L2563+4
+.LVL2787:
+	.loc 6 324 0
+	ldr	r3, .L2556+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2563+8
+	.loc 6 325 0
+	ldr	r3, .L2556+8
 	strh	r5, [r3]	@ movhi
+	.loc 6 326 0
 	bl	l2p_flush
+.LVL2788:
+	.loc 6 327 0
 	mov	r0, r5
 	bl	FtlEctTblFlush
+.LVL2789:
+	.loc 6 328 0
 	bl	FtlVpcTblFlush
-.L2562:
-	ldr	r0, .L2563
+.LVL2790:
+.L2555:
+	.loc 6 330 0
+	ldr	r0, .L2556
+	.loc 6 331 0
 	pop	{r3, r4, r5, lr}
+	.cfi_restore 14
+	.cfi_restore 5
+	.cfi_restore 4
+	.cfi_restore 3
+	.cfi_def_cfa_offset 0
+	.loc 6 330 0
 	b	get_new_active_ppa
-.L2564:
+.LVL2791:
+.L2557:
 	.align	2
-.L2563:
-	.word	.LANCHOR92
+.L2556:
+	.word	.LANCHOR93
 	.word	.LANCHOR109
-	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.cfi_endproc
+.LFE400:
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
@@ -17897,90 +29147,149 @@ Ftl_get_new_temp_ppa:
 	.fpu softvfp
 	.type	Ftl_gc_temp_data_write_back, %function
 Ftl_gc_temp_data_write_back:
+.LFB401:
+	.loc 6 334 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L2582
-	ldr	r5, .L2582+4
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 6 338 0
+	ldr	r3, .L2575
+	ldr	r5, .L2575+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2566
+	cbz	r3, .L2559
+	.loc 6 338 0 is_stmt 0 discriminator 1
 	ldr	r3, [r5]
-	lsls	r2, r3, #31
-	bpl	.L2566
-	ldr	r3, .L2582+8
+	lsls	r1, r3, #31
+	bpl	.L2559
+	.loc 6 338 0 discriminator 2
+	ldr	r3, .L2575+8
 	ldrh	r3, [r3, #4]
-	cbz	r3, .L2566
-.L2571:
+	cbz	r3, .L2559
+.L2564:
+	.loc 6 339 0 is_stmt 1
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2566:
-	ldr	r4, .L2582+12
+.L2559:
+	.loc 6 341 0
+	ldr	r4, .L2575+12
 	movs	r3, #0
 	movs	r6, #0
+.LBB510:
+.LBB511:
+	.loc 6 343 0
 	movs	r7, #36
+.LBE511:
+.LBE510:
+	.loc 6 341 0
 	mov	r2, r3
 	ldr	r1, [r5]
 	ldr	r0, [r4]
 	bl	FlashProgPages
-.L2568:
+.LVL2792:
+.L2561:
+.LBB514:
+.LBB512:
+	.loc 6 342 0
 	ldr	r1, [r5]
 	uxth	r3, r6
 	cmp	r3, r1
-	bcc	.L2570
+	bcc	.L2563
+	.loc 6 356 0
 	ldr	r0, [r4]
 	bl	FtlGcBufFree
+.LVL2793:
+	.loc 6 357 0
 	movs	r3, #0
 	str	r3, [r5]
-	ldr	r3, .L2582+8
+	.loc 6 358 0
+	ldr	r3, .L2575+8
 	ldrh	r3, [r3, #4]
 	cmp	r3, #0
-	bne	.L2571
+	bne	.L2564
+	.loc 6 359 0
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-	b	.L2581
-.L2570:
+.LVL2794:
+	b	.L2574
+.L2563:
+	.loc 6 343 0
 	muls	r3, r7, r3
 	ldr	r2, [r4]
 	adds	r6, r6, #1
+.LVL2795:
+	ldr	r0, [r2, r3]
 	adds	r1, r2, r3
-	ldr	r2, [r2, r3]
-	adds	r3, r2, #1
-	bne	.L2569
-	ldr	r3, .L2582+8
-	movs	r5, #0
-	ldr	r0, .L2582+16
-	ldrh	r4, [r3]
-	ldr	r0, [r0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r2, [r3]	@ movhi
-	ldr	r2, .L2582+20
-	ldr	r0, [r1, #4]
-	ldr	r3, [r2, #96]
+	adds	r2, r0, #1
+	bne	.L2562
+	.loc 6 344 0
+	ldr	r2, .L2575+8
+	movs	r6, #0
+	ldr	r1, .L2575+16
+	ldrh	r5, [r2]
+	ldr	r1, [r1]
+	strh	r6, [r1, r5, lsl #1]	@ movhi
+	.loc 6 346 0
+	ldr	r1, .L2575+20
+	.loc 6 345 0
+	strh	r0, [r2]	@ movhi
+	.loc 6 346 0
+	ldr	r2, [r1, #96]
+	adds	r2, r2, #1
+	str	r2, [r1, #96]
+	.loc 6 347 0
+	ldr	r2, [r4]
+	add	r3, r3, r2
+	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [r2, #96]
 	bl	FtlBbmMapBadBlock
+.LVL2796:
+	.loc 6 348 0
 	bl	FtlBbmTblFlush
+.LVL2797:
+	.loc 6 349 0
 	bl	FtlGcPageVarInit
-.L2581:
+.LVL2798:
+.L2574:
+	.loc 6 360 0
 	movs	r0, #1
+.LBE512:
+.LBE514:
+	.loc 6 363 0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2569:
+.L2562:
+.LBB515:
+.LBB513:
+	.loc 6 352 0
 	ldr	r3, [r1, #12]
+.LVL2799:
+	.loc 6 353 0
 	ldr	r1, [r1, #4]
 	ldr	r2, [r3, #8]
 	ldr	r0, [r3, #12]
 	bl	FtlGcUpdatePage
-	b	.L2568
-.L2583:
+.LVL2800:
+	b	.L2561
+.L2576:
 	.align	2
-.L2582:
+.L2575:
 	.word	.LANCHOR8
 	.word	.LANCHOR102
-	.word	.LANCHOR92
-	.word	.LANCHOR179
-	.word	.LANCHOR82
-	.word	.LANCHOR136
+	.word	.LANCHOR93
+	.word	.LANCHOR178
+	.word	.LANCHOR83
+	.word	.LANCHOR135
+.LBE513:
+.LBE515:
+	.cfi_endproc
+.LFE401:
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -17991,34 +29300,56 @@ Ftl_gc_temp_data_write_back:
 	.fpu softvfp
 	.type	FtlGcPageRecovery, %function
 FtlGcPageRecovery:
+.LFB399:
+	.loc 6 307 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L2586
-	ldr	r5, .L2586+4
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 6 308 0
+	ldr	r4, .L2579
+	ldr	r5, .L2579+4
 	ldrh	r1, [r4]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
+.LVL2801:
+	.loc 6 309 0
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4]
 	cmp	r2, r3
-	bcc	.L2584
-	ldr	r0, .L2586+8
+	bcc	.L2577
+.LBB518:
+.LBB519:
+	.loc 6 311 0
+	ldr	r0, .L2579+8
 	bl	FtlMapBlkWriteDumpData
+.LVL2802:
+	.loc 6 312 0
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L2586+12
+.LVL2803:
+	.loc 6 313 0
+	ldr	r3, .L2579+12
 	movs	r2, #0
 	str	r2, [r3]
-.L2584:
+.L2577:
 	pop	{r3, r4, r5, pc}
-.L2587:
+.L2580:
 	.align	2
-.L2586:
-	.word	.LANCHOR51
-	.word	.LANCHOR92
+.L2579:
+	.word	.LANCHOR52
+	.word	.LANCHOR93
 	.word	.LANCHOR124
 	.word	.LANCHOR132
+.LBE519:
+.LBE518:
+	.cfi_endproc
+.LFE399:
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -18029,33 +29360,63 @@ FtlGcPageRecovery:
 	.fpu softvfp
 	.type	FtlPowerLostRecovery, %function
 FtlPowerLostRecovery:
+.LFB374:
+	.loc 1 2319 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 1 2320 0
 	movs	r4, #0
-	ldr	r5, .L2589
-	ldr	r3, .L2589+4
+	.loc 1 2322 0
+	ldr	r5, .L2582
+	.loc 1 2320 0
+	ldr	r3, .L2582+4
+	.loc 1 2322 0
 	mov	r0, r5
+	.loc 1 2320 0
 	str	r4, [r3]
+	.loc 1 2322 0
 	bl	FtlRecoverySuperblock
+.LVL2804:
+	.loc 1 2323 0
 	mov	r0, r5
-	ldr	r5, .L2589+8
+	.loc 1 2324 0
+	ldr	r5, .L2582+8
+	.loc 1 2323 0
 	bl	FtlSlcSuperblockCheck
+.LVL2805:
+	.loc 1 2324 0
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
+.LVL2806:
+	.loc 1 2325 0
 	mov	r0, r5
 	bl	FtlSlcSuperblockCheck
+.LVL2807:
+	.loc 1 2326 0
 	bl	FtlGcPageRecovery
+.LVL2808:
+	.loc 1 2327 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
+.LVL2809:
+	.loc 1 2329 0
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L2590:
+.L2583:
 	.align	2
-.L2589:
-	.word	.LANCHOR90
-	.word	.LANCHOR231
+.L2582:
 	.word	.LANCHOR91
+	.word	.LANCHOR231
+	.word	.LANCHOR92
+	.cfi_endproc
+.LFE374:
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -18066,118 +29427,210 @@ FtlPowerLostRecovery:
 	.fpu softvfp
 	.type	FtlSysBlkInit, %function
 FtlSysBlkInit:
+.LFB381:
+	.loc 1 2603 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 3, -24
+	.cfi_offset 4, -20
+	.cfi_offset 5, -16
+	.cfi_offset 6, -12
+	.cfi_offset 7, -8
+	.cfi_offset 14, -4
+	.loc 1 2607 0
 	movs	r3, #0
-	ldr	r4, .L2601
+	ldr	r4, .L2594
+	.loc 1 2608 0
 	movw	r5, #65535
+	.loc 1 2607 0
 	strh	r3, [r4]	@ movhi
-	ldr	r3, .L2601+4
+	.loc 1 2608 0
+	ldr	r3, .L2594+4
 	strh	r5, [r3]	@ movhi
-	ldr	r3, .L2601+8
+	.loc 1 2610 0
+	ldr	r3, .L2594+8
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
+.LVL2810:
+	.loc 1 2611 0
 	bl	FtlScanSysBlk
-	ldr	r3, .L2601+12
+.LVL2811:
+	.loc 1 2612 0
+	ldr	r3, .L2594+12
 	ldrh	r3, [r3]
 	cmp	r3, r5
-	bne	.L2592
-.L2594:
+	bne	.L2585
+.L2587:
+	.loc 1 2613 0
 	mov	r6, #-1
-.L2591:
+.L2584:
+	.loc 1 2707 0
 	mov	r0, r6
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2592:
+.L2585:
+	.loc 1 2615 0
 	bl	FtlLoadSysInfo
+.LVL2812:
 	mov	r6, r0
 	cmp	r0, #0
-	bne	.L2594
+	bne	.L2587
+	.loc 1 2618 0
 	bl	FtlLoadMapInfo
+.LVL2813:
+	.loc 1 2619 0
 	bl	FtlLoadVonderInfo
+.LVL2814:
+	.loc 1 2620 0
 	bl	Ftl_load_ext_data
+.LVL2815:
+	.loc 1 2622 0
 	bl	FtlLoadEctTbl
+.LVL2816:
+	.loc 1 2623 0
 	bl	FtlFreeSysBLkSort
+.LVL2817:
+	.loc 1 2625 0
 	bl	SupperBlkListInit
+.LVL2818:
+	.loc 1 2626 0
 	bl	FtlPowerLostRecovery
+.LVL2819:
+	.loc 1 2628 0
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L2601+16
+.LVL2820:
+.LBB523:
+.LBB524:
+	.loc 1 2630 0
+	ldr	r3, .L2594+16
+	.loc 1 2631 0
 	movs	r0, #12
+	.loc 1 2630 0
 	ldrh	r2, [r3]
-	ldr	r3, .L2601+20
+	.loc 1 2631 0
+	ldr	r3, .L2594+20
 	ldr	r1, [r3]
+	.loc 1 2630 0
 	mov	r3, r6
-.L2595:
+.L2588:
+.LVL2821:
 	cmp	r3, r2
-	blt	.L2597
+	blt	.L2590
+	.loc 1 2636 0
 	ldrh	r3, [r4]
+.LVL2822:
 	cmp	r3, #0
-	beq	.L2591
-.L2596:
-	ldr	r5, .L2601+24
-	ldr	r4, .L2601+28
+	beq	.L2584
+.L2589:
+	.loc 1 2637 0
+	ldr	r5, .L2594+24
+	.loc 1 2638 0
+	ldr	r4, .L2594+28
+	.loc 1 2637 0
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
+.LVL2823:
+	.loc 1 2638 0
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L2601+32
-	ldrh	r1, [r5]
-	ldrh	r0, [r5, #4]
-	ldr	r2, [r3]
-	ldrh	r3, [r2, r1, lsl #1]
-	subs	r3, r3, r0
-	ldr	r0, .L2601+36
-	strh	r3, [r2, r1, lsl #1]	@ movhi
+.LVL2824:
+.LBB525:
+	.loc 1 2643 0
+	ldr	r2, .L2594+32
+	ldrh	r0, [r5]
+	ldrh	r7, [r5, #4]
+	ldr	r1, [r2]
+	ldrh	r3, [r1, r0, lsl #1]
+	subs	r3, r3, r7
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	.loc 1 2644 0
+	ldr	r1, .L2594+36
+	.loc 1 2649 0
+	ldr	r0, [r2]
 	ldrh	r7, [r4, #4]
-	ldrh	r3, [r0]
+	.loc 1 2644 0
+	ldrh	r3, [r1]
 	strh	r3, [r5, #2]	@ movhi
+	.loc 1 2645 0
 	movs	r3, #0
 	strb	r3, [r5, #6]
+	.loc 1 2646 0
 	strh	r3, [r5, #4]	@ movhi
+.LVL2825:
+	.loc 1 2649 0
 	ldrh	r5, [r4]
-	ldrh	r1, [r2, r5, lsl #1]
-	subs	r1, r1, r7
-	strh	r1, [r2, r5, lsl #1]	@ movhi
-	ldrh	r2, [r0]
-	ldr	r0, .L2601+40
+	ldrh	r2, [r0, r5, lsl #1]
+	subs	r2, r2, r7
+	strh	r2, [r0, r5, lsl #1]	@ movhi
+	.loc 1 2650 0
+	ldrh	r2, [r1]
+.LBE525:
+	.loc 1 2662 0
+	ldr	r0, .L2594+40
+.LBB526:
+	.loc 1 2651 0
 	strb	r3, [r4, #6]
+	.loc 1 2650 0
 	strh	r2, [r4, #2]	@ movhi
+	.loc 1 2652 0
 	strh	r3, [r4, #4]	@ movhi
+.LBE526:
+	.loc 1 2662 0
 	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L2601+44
+.LVL2826:
+	.loc 1 2663 0
+	ldr	r0, .L2594+44
 	bl	FtlMapBlkWriteDumpData
-	ldr	r2, .L2601+48
+.LVL2827:
+	.loc 1 2675 0
+	ldr	r2, .L2594+48
 	ldrh	r3, [r2, #30]
 	adds	r3, r3, #1
 	strh	r3, [r2, #30]	@ movhi
+	.loc 1 2676 0
 	bl	l2p_flush
+.LVL2828:
+	.loc 1 2677 0
 	bl	FtlVpcTblFlush
+.LVL2829:
+	.loc 1 2678 0
 	bl	FtlVpcTblFlush
-	b	.L2591
-.L2597:
+.LVL2830:
+	b	.L2584
+.LVL2831:
+.L2590:
+	.loc 1 2631 0
 	mla	r5, r0, r3, r1
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	blt	.L2596
+	blt	.L2589
+	.loc 1 2630 0
 	adds	r3, r3, #1
-	b	.L2595
-.L2602:
+.LVL2832:
+	b	.L2588
+.L2595:
 	.align	2
-.L2601:
+.L2594:
 	.word	.LANCHOR230
 	.word	.LANCHOR229
-	.word	.LANCHOR37
+	.word	.LANCHOR38
 	.word	.LANCHOR206
-	.word	.LANCHOR66
-	.word	.LANCHOR95
-	.word	.LANCHOR90
+	.word	.LANCHOR67
+	.word	.LANCHOR96
 	.word	.LANCHOR91
-	.word	.LANCHOR82
-	.word	.LANCHOR51
+	.word	.LANCHOR92
+	.word	.LANCHOR83
+	.word	.LANCHOR52
 	.word	.LANCHOR124
 	.word	.LANCHOR215
-	.word	.LANCHOR135
+	.word	.LANCHOR80
+.LBE524:
+.LBE523:
+	.cfi_endproc
+.LFE381:
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -18188,605 +29641,887 @@ FtlSysBlkInit:
 	.fpu softvfp
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	@ args = 0, pretend = 0, frame = 32
+.LFB407:
+	.loc 6 533 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2693
+.LVL2833:
+	.loc 6 541 0
+	ldr	r3, .L2686
+	.loc 6 533 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #32
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	sub	sp, sp, #40
+	.cfi_def_cfa_offset 72
+	.loc 6 541 0
 	ldr	r2, [r3]
 	cmp	r2, #0
-	bne	.L2655
-	ldr	r3, .L2693+4
+	bne	.L2648
+	.loc 6 544 0
+	ldr	r3, .L2686+4
 	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2655
-	ldr	r2, .L2693+8
+	bne	.L2648
+	.loc 6 547 0
+	ldr	r2, .L2686+8
 	ldrh	r2, [r2]
 	cmp	r2, #47
-	bls	.L2657
-	ldr	r3, .L2693+12
+	bls	.L2650
+.LVL2834:
+.LBB529:
+.LBB530:
+	.loc 6 555 0
+	ldr	r3, .L2686+12
 	movw	r5, #65535
 	ldrh	r4, [r3]
 	cmp	r4, r5
-	beq	.L2605
-	ldr	r1, .L2693+16
+	beq	.L2598
+	ldr	r1, .L2686+16
+.LVL2835:
 	ldrh	r2, [r1]
 	cmp	r2, r5
+	.loc 6 556 0
 	itt	eq
 	strheq	r4, [r1]	@ movhi
+	.loc 6 557 0
 	strheq	r2, [r3]	@ movhi
-.L2605:
+.L2598:
+	.loc 6 676 0
 	cmp	r0, #0
-	bne	.L2658
-	ldr	r3, .L2693+20
+	bne	.L2651
+	.loc 6 677 0
+	ldr	r3, .L2686+20
 	ldrh	r3, [r3]
 	cmp	r3, #24
-	bhi	.L2659
-	ldr	r2, .L2693+24
+	bhi	.L2652
+	ldr	r2, .L2686+24
+	.loc 6 679 0
 	cmp	r3, #16
+	.loc 6 680 0
 	ldrh	r4, [r2]
-	bls	.L2608
+	.loc 6 679 0
+	bls	.L2601
+	.loc 6 680 0
 	lsrs	r4, r4, #5
-.L2607:
-	ldr	r2, .L2693+28
+.LVL2836:
+.L2600:
+	.loc 6 688 0
+	ldr	r2, .L2686+28
 	ldrh	r1, [r2]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L2611
-	ldr	r3, .L2693+32
+	bcs	.L2604
+	.loc 6 689 0
+	ldr	r3, .L2686+32
 	movw	r0, #65535
+.LVL2837:
 	ldrh	r3, [r3]
 	cmp	r3, r0
-	bne	.L2612
-	ldr	r0, .L2693+16
+	bne	.L2605
+	ldr	r0, .L2686+16
 	ldrh	r0, [r0]
 	cmp	r0, r3
-	bne	.L2612
-	ldr	r3, .L2693+36
+	bne	.L2605
+	.loc 6 691 0
+	ldr	r3, .L2686+36
 	ldrh	r0, [r3]
-	cbnz	r0, .L2613
-	ldr	r3, .L2693+40
-	ldr	r4, .L2693+44
+	cbnz	r0, .L2606
+	ldr	r3, .L2686+40
+	ldr	r4, .L2686+44
+.LVL2838:
 	ldr	r3, [r3]
 	ldr	r4, [r4]
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcs	.L2614
-.L2613:
-	ldr	r3, .L2693+48
+	bcs	.L2607
+.L2606:
+	.loc 6 692 0
+	ldr	r3, .L2686+48
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2615:
-	ldr	r3, .L2693+52
+.L2608:
+	.loc 6 695 0
+	ldr	r3, .L2686+52
 	movs	r2, #0
 	str	r2, [r3]
-.L2603:
-	add	sp, sp, #32
+.LVL2839:
+.L2596:
+.LBE530:
+.LBE529:
+	.loc 6 934 0
+	add	sp, sp, #40
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2608:
+.LVL2840:
+.L2601:
+	.cfi_restore_state
+.LBB532:
+.LBB531:
+	.loc 6 681 0
 	cmp	r3, #12
-	bls	.L2609
+	bls	.L2602
+	.loc 6 682 0
 	lsrs	r4, r4, #4
-	b	.L2607
-.L2609:
+.LVL2841:
+	b	.L2600
+.LVL2842:
+.L2602:
+	.loc 6 683 0
 	cmp	r3, #8
-	bls	.L2607
+	bls	.L2600
+	.loc 6 684 0
 	lsrs	r4, r4, #2
-	b	.L2607
-.L2659:
+.LVL2843:
+	b	.L2600
+.LVL2844:
+.L2652:
+	.loc 6 678 0
 	movs	r4, #1
-	b	.L2607
-.L2614:
+	b	.L2600
+.LVL2845:
+.L2607:
+	.loc 6 694 0
 	movs	r3, #18
 	strh	r3, [r2]	@ movhi
-	b	.L2615
-.L2612:
-	ldr	r3, .L2693+48
+	b	.L2608
+.LVL2846:
+.L2605:
+	.loc 6 698 0
+	ldr	r3, .L2686+48
 	ldrh	r3, [r3]
 	add	r3, r3, r3, lsl #1
 	asrs	r3, r3, #2
 	strh	r3, [r1]	@ movhi
-.L2611:
-	ldr	r3, .L2693+56
+.L2604:
+	.loc 6 704 0
+	ldr	r3, .L2686+56
 	ldrh	r3, [r3]
-	cbz	r3, .L2606
+	cbz	r3, .L2599
+	.loc 6 705 0
 	adds	r4, r4, #32
+.LVL2847:
 	uxth	r4, r4
-.L2606:
-	ldr	r5, .L2693+60
+.LVL2848:
+.L2599:
+	.loc 6 753 0
+	ldr	r5, .L2686+60
 	movw	r3, #65535
 	ldrh	r2, [r5]
 	cmp	r2, r3
-	bne	.L2618
-	ldr	r3, .L2693+16
+	bne	.L2611
+	.loc 6 756 0
+	ldr	r3, .L2686+16
 	ldrh	r1, [r3]
 	cmp	r1, r2
-	beq	.L2619
-	ldr	r0, .L2693+64
+	beq	.L2612
+	.loc 6 760 0
+	ldr	r0, .L2686+64
 	ldr	r0, [r0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L2620
+	cbnz	r1, .L2613
+	.loc 6 761 0
 	strh	r2, [r3]	@ movhi
-.L2620:
+.L2613:
+	.loc 6 762 0
 	ldrh	r2, [r3]
 	strh	r2, [r5]	@ movhi
+	.loc 6 763 0
 	movw	r2, #65535
 	strh	r2, [r3]	@ movhi
-.L2619:
+.L2612:
+	.loc 6 767 0
 	ldrh	r0, [r5]
 	movw	r6, #65535
+	.loc 6 766 0
 	movs	r3, #0
 	strb	r3, [r5, #8]
+	.loc 6 767 0
 	cmp	r0, r6
-	beq	.L2618
+	beq	.L2611
+	.loc 6 768 0
 	bl	IsBlkInGcList
-	cbz	r0, .L2622
+.LVL2849:
+	cbz	r0, .L2615
+	.loc 6 769 0
 	strh	r6, [r5]	@ movhi
-.L2622:
-	ldr	r3, .L2693+68
+.L2615:
+	.loc 6 771 0
+	ldr	r3, .L2686+68
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2623
+	cbz	r3, .L2616
+	.loc 6 772 0
 	ldrh	r0, [r5]
 	bl	ftl_get_blk_mode
+.LVL2850:
 	strb	r0, [r5, #8]
-.L2623:
+.L2616:
+	.loc 6 775 0
 	ldrh	r2, [r5]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L2618
-	ldr	r0, .L2693+60
+	beq	.L2611
+	.loc 6 776 0
+	ldr	r0, .L2686+60
 	bl	make_superblock
-	ldr	r2, .L2693+72
+.LVL2851:
+	.loc 6 779 0
+	ldr	r2, .L2686+72
+	.loc 6 777 0
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 6 778 0
 	strb	r3, [r5, #6]
+	.loc 6 779 0
 	strh	r3, [r2]	@ movhi
-	ldr	r3, .L2693+64
+	.loc 6 780 0
+	ldr	r3, .L2686+64
 	ldrh	r2, [r5]
 	ldr	r3, [r3]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L2693+76
+	ldr	r3, .L2686+76
 	strh	r2, [r3]	@ movhi
-.L2618:
-	ldr	r2, .L2693+80
+.L2611:
+	.loc 6 785 0
+	ldr	r2, .L2686+80
 	ldrh	r3, [r5]
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2624
-	ldr	r2, .L2693+84
+	beq	.L2617
+	ldr	r2, .L2686+84
 	ldrh	r2, [r2]
 	cmp	r2, r3
-	beq	.L2624
-	ldr	r6, .L2693+60
+	beq	.L2617
+	.loc 6 791 0
+	ldr	r6, .L2686+60
 	mov	r5, r6
-.L2625:
+.L2618:
 	ldrh	r2, [r6]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L2626
-	ldr	r10, .L2693+92
+	bne	.L2619
+	.loc 6 795 0
+	ldr	r10, .L2686+92
+	.loc 6 792 0
 	movs	r2, #0
-	ldr	r3, .L2693+52
+	ldr	r3, .L2686+52
 	mov	r7, r10
 	str	r2, [r3]
-.L2627:
+.L2620:
+	.loc 6 795 0
 	ldrh	r8, [r10]
 	mov	r0, r8
 	bl	List_get_gc_head_node
+.LVL2852:
 	uxth	fp, r0
+	.loc 6 796 0
 	movw	r3, #65535
 	cmp	fp, r3
+	.loc 6 795 0
 	strh	fp, [r5]	@ movhi
-	bne	.L2628
+	.loc 6 796 0
+	bne	.L2621
+	.loc 6 797 0
 	movs	r3, #0
+	.loc 6 798 0
 	movs	r0, #8
+	.loc 6 797 0
 	strh	r3, [r10]	@ movhi
-	b	.L2603
-.L2658:
+	b	.L2596
+.LVL2853:
+.L2651:
+	.loc 6 534 0
 	movs	r4, #1
-	b	.L2606
-.L2624:
+	b	.L2599
+.LVL2854:
+.L2617:
+	.loc 6 786 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
-.L2691:
-	ldr	r3, .L2693+36
+.LVL2855:
+.L2684:
+	.loc 6 822 0
+	ldr	r3, .L2686+36
 	ldrh	r0, [r3]
-	b	.L2603
-.L2628:
-	str	r0, [sp]
+	b	.L2596
+.LVL2856:
+.L2621:
+	str	r0, [sp, #4]
+	.loc 6 800 0
 	mov	r0, fp
 	bl	IsBlkInGcList
+.LVL2857:
 	add	r3, r8, #1
-	ldr	r2, [sp]
-	cbz	r0, .L2629
+	ldr	r2, [sp, #4]
+	cbz	r0, .L2622
+	.loc 6 801 0
 	strh	r3, [r10]	@ movhi
-	b	.L2627
-.L2629:
-	ldr	r1, .L2693+24
+	b	.L2620
+.L2622:
+	.loc 6 814 0
+	ldr	r1, .L2686+24
+	.loc 6 804 0
 	uxth	r3, r3
-	ldr	lr, .L2693+96
+	.loc 6 814 0
+	ldr	lr, .L2686+96
 	uxth	r2, r2
-	ldr	r8, .L2693+64
+	ldr	r8, .L2686+64
 	ldrh	r1, [r1]
 	ldrh	lr, [lr]
 	ldr	r0, [r8]
+	.loc 6 804 0
 	strh	r3, [r10]	@ movhi
+	.loc 6 814 0
 	mul	r1, lr, r1
 	ldrh	ip, [r0, r2, lsl #1]
 	cmp	ip, r1, asr #1
-	bgt	.L2631
+	bgt	.L2624
+	.loc 6 815 0
 	cmp	r3, #48
-	bls	.L2632
+	bls	.L2625
 	cmp	ip, #8
-	bls	.L2632
-	ldr	r3, .L2693+88
+	bls	.L2625
+	ldr	r3, .L2686+88
 	ldrh	r3, [r3]
 	cmp	r3, #35
-	bhi	.L2632
-.L2631:
+	bhi	.L2625
+.L2624:
+	.loc 6 816 0
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-.L2632:
+.L2625:
+	.loc 6 819 0
 	ldrh	r3, [r0, r2, lsl #1]
 	cmp	r1, r3
-	bgt	.L2633
+	bgt	.L2626
+	.loc 6 820 0
 	movw	r3, #65535
 	strh	r3, [r5]	@ movhi
+	.loc 6 821 0
 	movs	r3, #0
 	strh	r3, [r7]	@ movhi
-	b	.L2691
-.L2633:
-	cbnz	r3, .L2634
+	b	.L2684
+.L2626:
+	.loc 6 825 0
+	cbnz	r3, .L2627
+	.loc 6 826 0
 	movw	r0, #65535
 	bl	decrement_vpc_count
+.LVL2858:
+	.loc 6 827 0
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2627
-.L2694:
+	b	.L2620
+.L2687:
 	.align	2
-.L2693:
-	.word	.LANCHOR75
-	.word	.LANCHOR169
-	.word	.LANCHOR84
+.L2686:
+	.word	.LANCHOR76
+	.word	.LANCHOR168
+	.word	.LANCHOR85
 	.word	.LANCHOR113
 	.word	.LANCHOR112
-	.word	.LANCHOR87
-	.word	.LANCHOR51
-	.word	.LANCHOR174
-	.word	.LANCHOR92
+	.word	.LANCHOR88
+	.word	.LANCHOR52
+	.word	.LANCHOR173
+	.word	.LANCHOR93
 	.word	.LANCHOR235
-	.word	.LANCHOR71
-	.word	.LANCHOR99
+	.word	.LANCHOR72
+	.word	.LANCHOR100
 	.word	.LANCHOR227
-	.word	.LANCHOR170
+	.word	.LANCHOR169
 	.word	.LANCHOR114
 	.word	.LANCHOR201
-	.word	.LANCHOR82
+	.word	.LANCHOR83
 	.word	.LANCHOR8
 	.word	.LANCHOR236
 	.word	.LANCHOR237
-	.word	.LANCHOR90
 	.word	.LANCHOR91
+	.word	.LANCHOR92
 	.word	.LANCHOR109
-	.word	.LANCHOR176
-	.word	.LANCHOR36
-.L2634:
+	.word	.LANCHOR175
+	.word	.LANCHOR37
+.L2627:
+	.loc 6 830 0
 	movs	r3, #0
 	strb	r3, [r5, #8]
-	ldr	r3, .L2695
+	.loc 6 831 0
+	ldr	r3, .L2688
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2635
+	cbz	r3, .L2628
+	.loc 6 832 0
 	mov	r0, fp
 	bl	ftl_get_blk_mode
+.LVL2859:
 	strb	r0, [r5, #8]
-.L2635:
-	ldr	r3, .L2695+4
+.L2628:
+	.loc 6 835 0
+	ldr	r3, .L2688+4
 	ldrh	r3, [r3]
 	cmp	r3, fp
-	bne	.L2636
-	ldr	r1, .L2695+8
+	bne	.L2629
+	ldr	r1, .L2688+8
 	movw	r2, #835
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2860:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2636:
-	ldr	r3, .L2695+24
+.LVL2861:
+.L2629:
+	.loc 6 836 0
+	ldr	r3, .L2688+24
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2637
-	ldr	r1, .L2695+8
+	bne	.L2630
+	ldr	r1, .L2688+8
 	mov	r2, #836
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2862:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2637:
-	ldr	r3, .L2695+28
+.LVL2863:
+.L2630:
+	.loc 6 837 0
+	ldr	r3, .L2688+28
 	ldrh	r2, [r5]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bne	.L2638
-	ldr	r1, .L2695+8
+	bne	.L2631
+	ldr	r1, .L2688+8
 	movw	r2, #837
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2864:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2638:
+.LVL2865:
+.L2631:
+	.loc 6 838 0
 	mov	r0, r6
 	bl	make_superblock
-	ldr	r2, .L2695+32
+.LVL2866:
+	.loc 6 839 0
+	ldr	r2, .L2688+32
 	movs	r3, #0
+	.loc 6 840 0
 	ldrh	r1, [r5]
+	.loc 6 839 0
 	strh	r3, [r2]	@ movhi
+	.loc 6 840 0
 	ldr	r2, [r8]
 	ldrh	r1, [r2, r1, lsl #1]
-	ldr	r2, .L2695+36
+	ldr	r2, .L2688+36
+	.loc 6 841 0
 	strh	r3, [r5, #2]	@ movhi
+	.loc 6 842 0
 	strb	r3, [r5, #6]
+	.loc 6 840 0
 	strh	r1, [r2]	@ movhi
-.L2626:
-	ldr	r3, .L2695+40
+.L2619:
+	.loc 6 852 0
+	ldr	r3, .L2688+40
 	movs	r2, #1
 	str	r2, [r3]
-	ldr	r3, .L2695+44
+	.loc 6 853 0
+	ldr	r3, .L2688+44
 	ldrh	r3, [r3]
-	str	r3, [sp, #4]
-	ldr	r3, .L2695
+	str	r3, [sp, #12]
+.LVL2867:
+	.loc 6 854 0
+	ldr	r3, .L2688
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2639
+	cbz	r3, .L2632
 	ldrb	r3, [r5, #8]	@ zero_extendqisi2
 	cmp	r3, r2
+	.loc 6 855 0
 	ittt	eq
-	ldreq	r3, .L2695+48
+	ldreq	r3, .L2688+48
 	ldrheq	r3, [r3]
-	streq	r3, [sp, #4]
-.L2639:
+	streq	r3, [sp, #12]
+.LVL2868:
+.L2632:
+	.loc 6 856 0
 	ldrh	r3, [r5, #2]
-	ldr	r1, [sp, #4]
-	ldr	fp, .L2695+80
+	ldr	r1, [sp, #12]
+	.loc 6 864 0
+	ldr	fp, .L2688+80
+	.loc 6 856 0
 	adds	r2, r3, r4
 	cmp	r2, r1
+	.loc 6 857 0
 	itt	gt
 	movgt	r2, r1
 	subgt	r4, r2, r3
+.LVL2869:
+	.loc 6 869 0
 	mov	r3, #0
+	.loc 6 857 0
 	it	gt
 	uxthgt	r4, r4
-	str	r3, [sp, #12]
-.L2641:
-	ldrh	r3, [sp, #12]
+.LVL2870:
+	.loc 6 869 0
+	str	r3, [sp, #8]
+.LVL2871:
+.L2634:
+	.loc 6 859 0
+	ldrh	r3, [sp, #8]
 	cmp	r4, r3
-	bls	.L2649
-	ldr	r3, .L2695+52
+	bls	.L2642
+	.loc 6 861 0
+	ldr	r3, .L2688+52
+	.loc 6 863 0
 	movw	r8, #65535
+	.loc 6 864 0
 	ldrh	lr, [r6, #2]
 	mov	r10, #36
 	ldr	r0, [fp]
+	.loc 6 861 0
 	ldrh	r7, [r3]
-	ldr	r3, [sp, #12]
+	.loc 6 864 0
+	ldr	r3, [sp, #8]
 	add	lr, lr, r3
-	ldr	r3, .L2695+56
-	str	r3, [sp, #8]
+	ldr	r3, .L2688+56
+	str	r3, [sp, #16]
 	movs	r3, #0
-	str	r3, [sp]
-	b	.L2650
-.L2643:
-	ldr	r1, [sp, #8]
+	str	r3, [sp, #4]
+	b	.L2643
+.LVL2872:
+.L2636:
+	.loc 6 862 0
+	ldr	r1, [sp, #16]
 	ldrh	r2, [r1, #2]!
+	.loc 6 863 0
 	cmp	r2, r8
-	str	r1, [sp, #8]
-	beq	.L2642
-	ldr	r1, [sp]
+	.loc 6 862 0
+	str	r1, [sp, #16]
+.LVL2873:
+	.loc 6 863 0
+	beq	.L2635
+	.loc 6 864 0
+	ldr	r1, [sp, #4]
 	orr	r2, lr, r2, lsl #10
+.LVL2874:
 	mla	ip, r10, r1, r0
 	str	r2, [ip, #4]
+.LVL2875:
+	.loc 6 865 0
 	mov	r2, r1
 	adds	r2, r2, #1
 	uxth	r2, r2
-	str	r2, [sp]
-.L2642:
+	str	r2, [sp, #4]
+.LVL2876:
+.L2635:
 	adds	r3, r3, #1
-.L2650:
+.LVL2877:
+.L2643:
+	.loc 6 861 0
 	uxth	r2, r3
-	cmp	r2, r7
-	bcc	.L2643
+	cmp	r7, r2
+	bhi	.L2636
+	.loc 6 869 0
 	ldrb	r2, [r6, #8]	@ zero_extendqisi2
-	ldr	r1, [sp]
+	ldr	r1, [sp, #4]
 	bl	FlashReadPages
+.LVL2878:
 	movs	r3, #0
-.L2690:
-	str	r3, [sp, #8]
-	ldr	r2, [sp]
-	ldrh	r3, [sp, #8]
+.LVL2879:
+.L2683:
+	str	r3, [sp, #16]
+.LVL2880:
+	.loc 6 871 0
+	ldr	r2, [sp, #4]
+	ldrh	r3, [sp, #16]
 	cmp	r2, r3
-	bhi	.L2648
-	ldr	r3, [sp, #12]
-	adds	r3, r3, #1
-	str	r3, [sp, #12]
-	b	.L2641
-.L2648:
+	bhi	.L2641
+.LVL2881:
 	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+.LVL2882:
+	b	.L2634
+.LVL2883:
+.L2641:
+	ldr	r3, [sp, #16]
 	movs	r7, #36
 	muls	r7, r3, r7
+	.loc 6 872 0
 	ldr	r3, [fp]
 	adds	r2, r3, r7
+.LVL2884:
+	.loc 6 873 0
 	ldr	r3, [r3, r7]
 	adds	r3, r3, #1
-	beq	.L2645
-	ldr	r8, [r2, #12]
+	beq	.L2638
+	.loc 6 872 0
+	ldr	r10, [r2, #12]
+	.loc 6 873 0
 	movw	r3, #61589
-	ldrh	r2, [r8]
+	ldrh	r2, [r10]
+.LVL2885:
 	cmp	r2, r3
-	bne	.L2645
-	ldr	r10, [r8, #8]
-	cmp	r10, #-1
-	bne	.L2646
-	ldr	r1, .L2695+8
+	bne	.L2638
+	.loc 6 875 0
+	ldr	r8, [r10, #8]
+.LVL2886:
+	.loc 6 876 0
+	cmp	r8, #-1
+	bne	.L2639
+	ldr	r1, .L2688+8
 	mov	r2, #876
-	ldr	r0, .L2695+12
+	ldr	r0, .L2688+12
 	bl	printf
-	ldr	r1, .L2695+16
-	ldr	r0, .L2695+20
+.LVL2887:
+	ldr	r1, .L2688+16
+	ldr	r0, .L2688+20
 	bl	printf
-.L2646:
+.LVL2888:
+.L2639:
+	.loc 6 877 0
 	movs	r2, #0
-	add	r1, sp, #28
-	mov	r0, r10
+	add	r1, sp, #36
+	mov	r0, r8
 	bl	log2phys
+.LVL2889:
+	.loc 6 878 0
 	ldr	r0, [fp]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #36]
 	add	r0, r0, r7
 	ldr	r2, [r0, #4]
 	bic	r3, r3, #-2147483648
 	cmp	r3, r2
-	bne	.L2645
-	ldr	r2, .L2695+32
-	ldr	r1, .L2695+60
-	ldr	r10, .L2695+68
+	bne	.L2638
+	.loc 6 880 0
+	ldr	r2, .L2688+32
+	.loc 6 881 0
+	ldr	r8, .L2688+68
+.LVL2890:
+	ldr	r1, .L2688+60
+	.loc 6 880 0
 	ldrh	r3, [r2]
-	str	r1, [sp, #20]
+	.loc 6 881 0
+	ldr	r0, [r0, #16]
+	str	r1, [sp, #28]
+	.loc 6 880 0
 	adds	r3, r3, #1
 	strh	r3, [r2]	@ movhi
-	ldr	r2, [r1]
-	movs	r1, #36
-	ldr	r3, [r10]
-	mla	r3, r1, r3, r2
-	ldr	r2, [r0, #16]
-	str	r2, [r3, #16]
-	str	r3, [sp, #16]
-	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #16]
+	.loc 6 881 0
+	movs	r2, #36
+	ldr	r3, [r8]
+	str	r2, [sp, #24]
+	str	r3, [sp, #20]
+	ldr	r3, [r1]
 	ldr	r1, [sp, #20]
+	mla	r3, r2, r1, r3
+	str	r0, [r3, #16]
+	str	r3, [sp, #20]
+	.loc 6 882 0
+	bl	Ftl_get_new_temp_ppa
+.LVL2891:
+	ldr	r3, [sp, #20]
+	.loc 6 883 0
+	ldr	r1, [sp, #28]
+	ldr	r2, [sp, #24]
+	.loc 6 882 0
 	str	r0, [r3, #4]
-	ldr	r2, [r1]
-	movs	r1, #36
-	ldr	r3, [r10]
-	ldr	r0, [fp]
-	mla	r2, r1, r3, r2
-	add	r0, r0, r7
-	ldr	r7, .L2695+28
-	ldr	r1, [r0, #8]
-	adds	r3, r3, #1
-	str	r1, [r2, #8]
-	ldr	r1, [r0, #12]
-	str	r1, [r2, #12]
+	.loc 6 883 0
+	ldr	r1, [r1]
+	ldr	r3, [r8]
+	mla	r1, r2, r3, r1
+	ldr	r3, [fp]
+	add	r3, r3, r7
+	ldr	r2, [r3, #8]
+	str	r2, [r1, #8]
+	.loc 6 884 0
+	ldr	r3, [r3, #12]
+	str	r3, [r1, #12]
+	.loc 6 892 0
 	movs	r1, #1
-	ldr	r2, [sp, #28]
-	str	r2, [r8, #12]
-	ldrh	r2, [r7]
-	strh	r2, [r8, #2]	@ movhi
-	ldr	r2, .L2695+64
-	str	r3, [r10]
+	.loc 6 885 0
+	ldr	r3, [sp, #36]
+	str	r3, [r10, #12]
+	.loc 6 886 0
+	ldr	r3, .L2688+28
+	ldrh	r2, [r3]
+	str	r3, [sp, #20]
+	strh	r2, [r10, #2]	@ movhi
+	.loc 6 889 0
+	ldr	r2, .L2688+64
+	.loc 6 892 0
+	ldr	r0, [fp]
+	.loc 6 889 0
 	ldr	r2, [r2]
-	str	r2, [r8, #4]
+	.loc 6 892 0
+	add	r0, r0, r7
+	.loc 6 889 0
+	str	r2, [r10, #4]
+	.loc 6 891 0
+	ldr	r2, [r8]
+	adds	r2, r2, #1
+	str	r2, [r8]
+	.loc 6 892 0
 	bl	FtlGcBufAlloc
-	ldr	r3, .L2695
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbnz	r3, .L2647
-	ldrb	r2, [r7, #7]	@ zero_extendqisi2
-	ldr	r3, [r10]
-	cmp	r2, r3
-	beq	.L2647
-	ldrh	r3, [r7, #4]
-	cbnz	r3, .L2645
-.L2647:
+.LVL2892:
+	.loc 6 893 0
+	ldr	r2, .L2688
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2640
+	ldr	r3, [sp, #20]
+	ldr	r2, [r8]
+	ldrb	r1, [r3, #7]	@ zero_extendqisi2
+	cmp	r1, r2
+	beq	.L2640
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L2638
+.L2640:
+	.loc 6 894 0
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L2645
-.L2692:
-	ldr	r3, .L2695+40
+.LVL2893:
+	cbz	r0, .L2638
+.LVL2894:
+.L2685:
+	.loc 6 909 0
+	ldr	r3, .L2688+40
 	movs	r2, #0
 	str	r2, [r3]
-	b	.L2691
-.L2645:
-	ldr	r3, [sp, #8]
+	b	.L2684
+.LVL2895:
+.L2638:
+	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
-	b	.L2690
-.L2649:
+	b	.L2683
+.LVL2896:
+.L2642:
+	.loc 6 903 0
 	ldrh	r3, [r6, #2]
 	add	r4, r4, r3
-	ldr	r3, [sp, #4]
+.LVL2897:
+	.loc 6 905 0
+	ldr	r3, [sp, #12]
+	.loc 6 903 0
 	uxth	r4, r4
+	.loc 6 905 0
 	cmp	r3, r4
+	.loc 6 903 0
 	strh	r4, [r6, #2]	@ movhi
-	bhi	.L2651
-	ldr	r3, .L2695+68
+	.loc 6 905 0
+	bhi	.L2644
+	.loc 6 907 0
+	ldr	r3, .L2688+68
 	ldr	r3, [r3]
-	cbz	r3, .L2652
+	cbz	r3, .L2645
+	.loc 6 908 0
 	bl	Ftl_gc_temp_data_write_back
+.LVL2898:
 	cmp	r0, #0
-	bne	.L2692
-.L2652:
-	ldr	r3, .L2695+32
+	bne	.L2685
+.L2645:
+	.loc 6 913 0
+	ldr	r3, .L2688+32
 	ldrh	r1, [r3]
-	cbnz	r1, .L2653
-	ldr	r3, .L2695+72
+	cbnz	r1, .L2646
+	ldr	r3, .L2688+72
 	ldrh	r2, [r6]
 	ldr	r3, [r3]
 	ldrh	r0, [r3, r2, lsl #1]
-	cbz	r0, .L2653
+	cbz	r0, .L2646
+	.loc 6 915 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 6 916 0
 	ldrh	r0, [r6]
 	bl	update_vpc_list
+.LVL2899:
+	.loc 6 917 0
 	bl	FtlCacheWriteBack
+.LVL2900:
+	.loc 6 918 0
 	bl	l2p_flush
+.LVL2901:
+	.loc 6 919 0
 	bl	FtlVpcTblFlush
-.L2653:
+.LVL2902:
+.L2646:
+	.loc 6 921 0
 	movw	r3, #65535
 	strh	r3, [r6]	@ movhi
-.L2651:
-	ldr	r3, .L2695+76
+.L2644:
+	.loc 6 923 0
+	ldr	r3, .L2688+76
 	ldrh	r0, [r3]
 	cmp	r0, #2
-	bhi	.L2654
-	ldr	r3, .L2695+44
+	bhi	.L2647
+	.loc 6 925 0
+	ldr	r3, .L2688+44
 	ldrh	r4, [r3]
-	b	.L2625
-.L2654:
-	ldr	r3, .L2695+40
+.LVL2903:
+	b	.L2618
+.LVL2904:
+.L2647:
+	.loc 6 928 0
+	ldr	r3, .L2688+40
 	movs	r2, #0
+	.loc 6 933 0
 	adds	r0, r0, #1
+.LVL2905:
+	.loc 6 928 0
 	str	r2, [r3]
-	b	.L2603
-.L2655:
+	b	.L2596
+.LVL2906:
+.L2648:
+.LBE531:
+.LBE532:
+	.loc 6 542 0
 	movs	r0, #0
-	b	.L2603
-.L2657:
-	mov	r0, r3
-	b	.L2603
-.L2696:
+.LVL2907:
+	b	.L2596
+.L2689:
 	.align	2
-.L2695:
+.L2688:
 	.word	.LANCHOR8
-	.word	.LANCHOR90
+	.word	.LANCHOR91
 	.word	.LANCHOR238
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR91
+	.word	.LC7
+	.word	.LC8
 	.word	.LANCHOR92
+	.word	.LANCHOR93
 	.word	.LANCHOR236
 	.word	.LANCHOR237
-	.word	.LANCHOR169
-	.word	.LANCHOR51
+	.word	.LANCHOR168
 	.word	.LANCHOR52
-	.word	.LANCHOR36
+	.word	.LANCHOR53
+	.word	.LANCHOR37
 	.word	.LANCHOR201+14
-	.word	.LANCHOR179
-	.word	.LANCHOR158
+	.word	.LANCHOR178
+	.word	.LANCHOR157
 	.word	.LANCHOR102
-	.word	.LANCHOR82
-	.word	.LANCHOR87
+	.word	.LANCHOR83
+	.word	.LANCHOR88
 	.word	.LANCHOR106
+.LVL2908:
+.L2650:
+	mov	r0, r3
+.LVL2909:
+	b	.L2596
+	.cfi_endproc
+.LFE407:
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -18797,73 +30532,130 @@ rk_ftl_garbage_collect:
 	.fpu softvfp
 	.type	FtlInit, %function
 FtlInit:
+.LFB302:
+	.loc 4 915 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2910:
 	push	{r3, r4, r5, lr}
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	.cfi_offset 4, -12
+	.cfi_offset 5, -8
+	.cfi_offset 14, -4
+	.loc 4 916 0
 	mov	r3, #-1
-	ldr	r4, .L2706
+	ldr	r4, .L2699
+	.loc 4 915 0
 	mov	r5, r0
-	ldr	r2, .L2706+4
+	.loc 4 917 0
+	ldr	r2, .L2699+4
+	.loc 4 916 0
 	str	r3, [r4]
+	.loc 4 917 0
 	movs	r3, #0
-	ldr	r1, .L2706+8
+	.loc 4 928 0
+	ldr	r1, .L2699+8
+	.loc 4 917 0
 	str	r3, [r2]
-	ldr	r2, .L2706+12
-	ldr	r0, .L2706+16
+	.loc 4 918 0
+	ldr	r2, .L2699+12
+	.loc 4 928 0
+	ldr	r0, .L2699+16
+.LVL2911:
+	.loc 4 918 0
 	str	r3, [r2]
+	.loc 4 928 0
 	bl	printf
+.LVL2912:
+	.loc 4 930 0
 	mov	r0, r5
 	bl	FtlConstantsInit
+.LVL2913:
+	.loc 4 931 0
 	bl	FtlMemInit
+.LVL2914:
+	.loc 4 932 0
 	bl	FtlVariablesInit
-	ldr	r3, .L2706+20
+.LVL2915:
+	.loc 4 933 0
+	ldr	r3, .L2699+20
 	ldrh	r0, [r3]
 	bl	FtlFreeSysBlkQueueInit
+.LVL2916:
+	.loc 4 948 0
 	bl	FtlLoadBbt
-	cbz	r0, .L2698
-	ldr	r1, .L2706+24
-	ldr	r0, .L2706+28
-.L2705:
+.LVL2917:
+	cbz	r0, .L2691
+	.loc 4 949 0
+	ldr	r1, .L2699+24
+	ldr	r0, .L2699+28
+.L2698:
+	.loc 4 956 0
 	bl	printf
-.L2699:
+.LVL2918:
+.L2692:
+	.loc 4 1000 0
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L2698:
+.LVL2919:
+.L2691:
+	.loc 4 954 0
 	bl	FtlSysBlkInit
-	cbz	r0, .L2700
-	ldr	r1, .L2706+24
-	ldr	r0, .L2706+32
-	b	.L2705
-.L2700:
+.LVL2920:
+	cbz	r0, .L2693
+	.loc 4 956 0
+	ldr	r1, .L2699+24
+	ldr	r0, .L2699+32
+	b	.L2698
+.L2693:
+	.loc 4 961 0
 	movs	r1, #1
 	str	r1, [r4]
+	.loc 4 965 0
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L2706+36
+.LVL2921:
+	.loc 4 967 0
+	ldr	r3, .L2699+36
 	ldrh	r3, [r3]
 	cmp	r3, #15
-	bhi	.L2699
+	bhi	.L2692
 	mov	r4, #1024
-.L2702:
+.L2695:
+.LVL2922:
+.LBB537:
+.LBB538:
+.LBB539:
+	.loc 4 987 0
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
+.LVL2923:
+	.loc 4 986 0
 	subs	r4, r4, #1
-	bne	.L2702
-	b	.L2699
-.L2707:
+.LVL2924:
+	bne	.L2695
+	b	.L2692
+.L2700:
 	.align	2
-.L2706:
+.L2699:
 	.word	.LANCHOR223
 	.word	.LANCHOR239
-	.word	.LC48
-	.word	.LANCHOR75
-	.word	.LC6
-	.word	.LANCHOR37
+	.word	.LC51
+	.word	.LANCHOR76
+	.word	.LC8
+	.word	.LANCHOR38
 	.word	.LANCHOR240
-	.word	.LC49
-	.word	.LC50
-	.word	.LANCHOR87
-	.size	FtlInit, .-FtlInit
+	.word	.LC52
+	.word	.LC53
+	.word	.LANCHOR88
+.LBE539:
+.LBE538:
+.LBE537:
+	.cfi_endproc
+.LFE302:
+	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",%progbits
 	.align	1
 	.global	rk_ftl_init
@@ -18873,25 +30665,44 @@ FtlInit:
 	.fpu softvfp
 	.type	rk_ftl_init, %function
 rk_ftl_init:
+.LFB492:
+	.loc 7 105 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2925:
 	push	{r4, lr}
+	.cfi_def_cfa_offset 8
+	.cfi_offset 4, -8
+	.cfi_offset 14, -4
+	.loc 7 108 0
 	bl	FlashInit
+.LVL2926:
+	.loc 7 109 0
 	mov	r4, r0
-	cbnz	r0, .L2709
-	ldr	r0, .L2710
+	cbnz	r0, .L2702
+	.loc 7 110 0
+	ldr	r0, .L2703
+.LVL2927:
 	bl	FtlInit
-.L2709:
+.LVL2928:
+.L2702:
+	.loc 7 111 0
 	mov	r1, r4
-	ldr	r0, .L2710+4
+	ldr	r0, .L2703+4
 	bl	printf
+.LVL2929:
+	.loc 7 113 0
 	mov	r0, r4
 	pop	{r4, pc}
-.L2711:
+.LVL2930:
+.L2704:
 	.align	2
-.L2710:
+.L2703:
 	.word	.LANCHOR15
-	.word	.LC51
+	.word	.LC54
+	.cfi_endproc
+.LFE492:
 	.size	rk_ftl_init, .-rk_ftl_init
 	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
 	.align	1
@@ -18902,117 +30713,219 @@ rk_ftl_init:
 	.fpu softvfp
 	.type	ftl_fix_nand_power_lost_error, %function
 ftl_fix_nand_power_lost_error:
+.LFB379:
+	.loc 1 2483 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2726
+	.loc 1 2484 0
+	ldr	r3, .L2719
+	.loc 1 2483 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #56
+	.cfi_def_cfa_offset 88
+	.loc 1 2484 0
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L2712
-	ldr	r7, .L2726+4
-	ldr	r6, .L2726+8
-	ldr	r10, .L2726+32
+	beq	.L2705
+.LVL2931:
+.LBB540:
+	.loc 1 2486 0
+	ldr	r7, .L2719+4
+	.loc 1 2488 0
+	ldr	r6, .L2719+8
+	.loc 1 2491 0
+	ldr	r10, .L2719+32
+	.loc 1 2486 0
 	ldrh	r5, [r7]
+.LVL2932:
+	.loc 1 2488 0
 	ldr	r3, [r6]
-	ldr	r4, .L2726+12
+	.loc 1 2492 0
+	ldr	r4, .L2719+12
+	.loc 1 2488 0
 	mov	r1, r5
-	ldr	r0, .L2726+16
+	ldr	r0, .L2719+16
 	ldrh	r2, [r3, r5, lsl #1]
 	lsl	r8, r5, #1
 	bl	printf
+.LVL2933:
+	.loc 1 2491 0
 	ldrh	r0, [r10]
 	bl	FtlGcRefreshBlock
+.LVL2934:
+	.loc 1 2492 0
 	ldrh	r0, [r4]
 	bl	FtlGcRefreshBlock
+.LVL2935:
+	.loc 1 2493 0
 	mov	r0, r10
 	bl	allocate_new_data_superblock
+.LVL2936:
+	.loc 1 2494 0
 	mov	r0, r4
+	.loc 1 2496 0
 	movw	r4, #4097
+	.loc 1 2494 0
 	bl	allocate_new_data_superblock
+.LVL2937:
 	str	r7, [sp, #4]
-.L2714:
+.LVL2938:
+.L2707:
+	.loc 1 2496 0
 	subs	r4, r4, #1
-	beq	.L2718
+.LVL2939:
+	beq	.L2711
+.LVL2940:
+	.loc 1 2497 0
 	movs	r1, #1
 	mov	r0, r1
 	bl	rk_ftl_garbage_collect
+.LVL2941:
+	.loc 1 2498 0
 	ldr	r3, [r6]
 	ldrh	r3, [r3, r8]
 	cmp	r3, #0
-	bne	.L2714
-.L2718:
+	bne	.L2707
+.LVL2942:
+.L2711:
+	.loc 1 2501 0
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2726+16
+	ldr	r0, .L2719+16
 	ldrh	r2, [r3, r5, lsl #1]
 	bl	printf
+.LVL2943:
+	.loc 1 2502 0
 	ldr	r3, [r6]
 	ldrh	r4, [r3, r5, lsl #1]
-	cbnz	r4, .L2716
+	cbnz	r4, .L2709
+.LVL2944:
+.LBB541:
+	.loc 1 2509 0
 	add	r0, sp, #56
-	ldr	r7, .L2726+20
+	.loc 1 2516 0
+	ldr	r7, .L2719+20
+	.loc 1 2509 0
 	strh	r5, [r0, #-48]!	@ movhi
+	.loc 1 2515 0
 	movw	r10, #65535
+	.loc 1 2510 0
 	bl	make_superblock
-	ldr	r3, .L2726+24
+.LVL2945:
+	.loc 1 2513 0
+	ldr	r3, .L2719+24
 	add	r0, sp, #22
+	.loc 1 2516 0
 	ldr	r8, [r7]
+	.loc 1 2513 0
 	mov	r2, r4
+	.loc 1 2516 0
 	mov	fp, #36
+	.loc 1 2517 0
 	mov	ip, r4
+	.loc 1 2513 0
 	ldrh	lr, [r3]
-.L2719:
+.LVL2946:
+.L2712:
+	.loc 1 2513 0 is_stmt 0 discriminator 1
 	uxth	r3, r2
 	cmp	lr, r3
-	bhi	.L2721
+	bhi	.L2714
+	.loc 1 2522 0 is_stmt 1
 	ldr	r3, [r6]
 	mov	r1, r5
-	ldr	r0, .L2726+28
+	ldr	r0, .L2719+28
 	ldrh	r2, [r3, r5, lsl #1]
+.LVL2947:
 	bl	printf
+.LVL2948:
+	.loc 1 2523 0
 	mov	r2, r4
 	movs	r1, #0
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
+.LVL2949:
+	.loc 1 2524 0
 	mov	r2, r4
 	movs	r1, #1
 	ldr	r0, [r7]
 	bl	FlashEraseBlocks
-.L2716:
+.LVL2950:
+.L2709:
+.LBE541:
+	.loc 1 2526 0
 	ldr	r2, [sp, #4]
 	movw	r3, #65535
 	strh	r3, [r2]	@ movhi
-.L2712:
+.LVL2951:
+.L2705:
+.LBE540:
+	.loc 1 2528 0
 	add	sp, sp, #56
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2721:
+.LVL2952:
+.L2714:
+	.cfi_restore_state
+.LBB543:
+.LBB542:
+	.loc 1 2514 0
 	ldrh	r3, [r0, #2]!
+.LVL2953:
+	.loc 1 2515 0
 	cmp	r3, r10
-	beq	.L2720
+	beq	.L2713
+	.loc 1 2516 0
 	mla	r1, fp, r4, r8
+	.loc 1 2519 0
 	adds	r4, r4, #1
+.LVL2954:
+	.loc 1 2516 0
 	lsls	r3, r3, #10
+.LVL2955:
+	.loc 1 2519 0
 	uxth	r4, r4
+.LVL2956:
+	.loc 1 2516 0
 	str	r3, [r1, #4]
+.LVL2957:
+	.loc 1 2517 0
 	str	ip, [r1, #8]
+	.loc 1 2518 0
 	str	ip, [r1, #12]
-.L2720:
+.L2713:
+.LVL2958:
 	adds	r2, r2, #1
-	b	.L2719
-.L2727:
+.LVL2959:
+	b	.L2712
+.L2720:
 	.align	2
-.L2726:
+.L2719:
 	.word	.LANCHOR8
 	.word	.LANCHOR229
-	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR92
+	.word	.LC55
+	.word	.LANCHOR77
+	.word	.LANCHOR37
+	.word	.LC56
 	.word	.LANCHOR91
-	.word	.LC52
-	.word	.LANCHOR76
-	.word	.LANCHOR36
-	.word	.LC53
-	.word	.LANCHOR90
+.LBE542:
+.LBE543:
+	.cfi_endproc
+.LFE379:
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -19023,297 +30936,477 @@ ftl_fix_nand_power_lost_error:
 	.fpu softvfp
 	.type	ftl_read, %function
 ftl_read:
+.LFB305:
+	.loc 4 1430 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL2960:
+	.loc 4 1440 0
 	cmp	r0, #16
+	.loc 4 1430 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #64
+	.cfi_def_cfa_offset 96
+	.loc 4 1430 0
 	mov	r6, r1
 	mov	r7, r3
 	str	r2, [sp, #28]
-	bne	.L2729
+	.loc 4 1440 0
+	bne	.L2722
+	.loc 4 1441 0
 	mov	r2, r3
+.LVL2961:
 	ldr	r1, [sp, #28]
+.LVL2962:
 	add	r0, r6, #256
+.LVL2963:
 	bl	FtlVendorPartRead
+.LVL2964:
 	str	r0, [sp, #8]
-.L2728:
+.LVL2965:
+.L2721:
+	.loc 4 1529 0
 	ldr	r0, [sp, #8]
 	add	sp, sp, #64
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2729:
+.LVL2966:
+.L2722:
+	.cfi_restore_state
+	.loc 4 1446 0
 	ldr	r3, [sp, #28]
+.LVL2967:
 	adds	r3, r1, r3
 	str	r3, [sp, #12]
-	ldr	r3, .L2766
+	ldr	r3, .L2759
 	ldr	r2, [sp, #12]
+.LVL2968:
 	ldr	r3, [r3]
 	cmp	r2, r3
-	bhi	.L2751
-	ldr	r3, .L2766+4
+	bhi	.L2744
+	.loc 4 1446 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2759+4
 	ldr	r3, [r3]
-	adds	r4, r3, #1
-	beq	.L2752
+	adds	r0, r3, #1
+.LVL2969:
+	beq	.L2745
+	.loc 4 1449 0 is_stmt 1
 	bl	FtlCacheWriteBack
-	ldr	r3, .L2766+8
+.LVL2970:
+	.loc 4 1451 0
+	ldr	r3, .L2759+8
 	mov	r0, r6
-	ldr	r8, .L2766+48
 	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
+.LVL2971:
+	.loc 4 1452 0
 	ldr	r3, [sp, #12]
 	mov	r1, r4
+	.loc 4 1451 0
 	str	r0, [sp, #16]
+.LVL2972:
+	.loc 4 1452 0
 	subs	r0, r3, #1
+.LVL2973:
 	bl	__aeabi_uidiv
+.LVL2974:
+	.loc 4 1453 0
 	ldr	r3, [sp, #16]
-	ldr	r2, .L2766+12
+	.loc 4 1457 0
+	ldr	r2, .L2759+12
+	.loc 4 1451 0
 	ldr	r4, [sp, #16]
+	.loc 4 1453 0
 	rsb	r3, r3, #1
+	.loc 4 1452 0
 	str	r0, [sp, #20]
+.LVL2975:
+	.loc 4 1453 0
 	add	r3, r3, r0
 	str	r3, [sp, #4]
+.LVL2976:
+	.loc 4 1457 0
 	ldr	r1, [sp, #4]
 	ldr	r3, [r2]
+.LVL2977:
 	add	r3, r3, r1
 	str	r3, [r2]
+	.loc 4 1444 0
 	movs	r3, #0
+	.loc 4 1456 0
 	mov	r5, r3
+	.loc 4 1444 0
 	str	r3, [sp]
 	str	r3, [sp, #24]
+	.loc 4 1431 0
 	str	r3, [sp, #8]
-.L2731:
+.LVL2978:
+.L2724:
+	.loc 4 1458 0
 	ldr	r3, [sp, #4]
-	cbnz	r3, .L2750
-	ldr	r3, .L2766+16
+	cbnz	r3, .L2743
+	.loc 4 1526 0
+	ldr	r3, .L2759+16
 	ldrh	r3, [r3]
 	cmp	r3, #0
-	beq	.L2728
+	beq	.L2721
+	.loc 4 1527 0
 	movs	r1, #1
 	ldr	r0, [sp, #4]
 	bl	rk_ftl_garbage_collect
-	b	.L2728
-.L2750:
-	movs	r2, #0
+.LVL2979:
+	b	.L2721
+.LVL2980:
+.L2743:
+	.loc 4 1459 0
 	add	r1, sp, #60
+	movs	r2, #0
 	mov	r0, r4
 	bl	log2phys
+.LVL2981:
+	.loc 4 1460 0
 	ldr	r3, [sp, #60]
-	adds	r0, r3, #1
-	bne	.L2732
-	ldr	fp, .L2766+8
-	mov	r10, #0
-.L2733:
-	ldrh	r0, [fp]
-	cmp	r10, r0
-	bcc	.L2735
-.L2736:
+	adds	r1, r3, #1
+	bne	.L2725
+	.loc 4 1461 0 discriminator 1
+	ldr	r10, .L2759+8
+	mov	r8, #0
+.L2726:
+.LVL2982:
+	ldrh	r0, [r10]
+	cmp	r8, r0
+	bcc	.L2728
+.LVL2983:
+.L2729:
+	.loc 4 1490 0
 	ldr	r3, [sp, #4]
+	.loc 4 1488 0
 	adds	r4, r4, #1
+.LVL2984:
+	.loc 4 1490 0
 	subs	r3, r3, #1
+.LVL2985:
 	str	r3, [sp, #4]
-	beq	.L2740
-	ldr	r3, .L2766+20
+	beq	.L2733
+	.loc 4 1490 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2759+20
+.LVL2986:
 	ldrh	r3, [r3]
 	cmp	r5, r3, lsl #2
-	bne	.L2731
-.L2740:
+	bne	.L2724
+.L2733:
+	.loc 4 1491 0 is_stmt 1
 	cmp	r5, #0
-	beq	.L2731
+	beq	.L2724
+	.loc 4 1492 0
+	ldr	r3, .L2759+24
 	movs	r2, #0
 	mov	r1, r5
-	ldr	r0, [r8]
-	mov	r10, #0
+	.loc 4 1498 0
+	ldr	r10, .L2759+48
+	.loc 4 1493 0
+	mov	r8, #0
+	.loc 4 1492 0
+	ldr	r0, [r3]
 	bl	FlashReadPages
+.LVL2987:
+	.loc 4 1499 0
 	ldr	r3, [sp]
 	lsls	r3, r3, #9
 	str	r3, [sp, #44]
+	.loc 4 1496 0
 	ldr	r3, [sp, #32]
 	lsls	r3, r3, #9
 	str	r3, [sp, #36]
 	ldr	r3, [sp, #24]
 	lsls	r3, r3, #9
 	str	r3, [sp, #40]
-.L2749:
+.LVL2988:
+.L2742:
+	.loc 4 1494 0
+	ldr	r3, .L2759+24
 	mov	fp, #36
-	ldr	r3, [r8]
-	mul	fp, fp, r10
+	mul	fp, fp, r8
 	ldr	r1, [sp, #16]
+	ldr	r3, [r3]
 	add	r3, r3, fp
 	ldr	r2, [r3, #16]
 	cmp	r1, r2
-	bne	.L2742
+	bne	.L2735
+	.loc 4 1495 0
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2766+24
+	ldr	r3, .L2759+28
 	ldr	r3, [r3]
 	cmp	r1, r3
-	bne	.L2743
+	bne	.L2736
+	.loc 4 1496 0
 	ldr	r3, [sp, #36]
 	mov	r0, r7
 	ldr	r2, [sp, #40]
 	add	r1, r1, r3
-.L2765:
+.L2758:
+	.loc 4 1499 0
 	bl	ftl_memcpy
-.L2743:
-	ldr	r3, [r8]
-	add	r2, r3, fp
-	ldr	r3, [r3, fp]
-	adds	r1, r3, #1
-	bne	.L2744
-	ldr	r1, .L2766+28
-	str	r3, [sp, #8]
-	ldr	r2, [r1, #72]
+.LVL2989:
+.L2736:
+	.loc 4 1501 0
+	ldr	r3, .L2759+24
+	ldr	r3, [r3]
+	ldr	r1, [r3, fp]
+	add	ip, r3, fp
+	adds	r2, r1, #1
+	bne	.L2737
+	.loc 4 1502 0
+	ldr	r0, .L2759+32
+	.loc 4 1503 0
+	str	r1, [sp, #8]
+	.loc 4 1502 0
+	ldr	r2, [r0, #72]
 	adds	r2, r2, #1
-	str	r2, [r1, #72]
-.L2745:
-	add	r10, r10, #1
-	cmp	r5, r10
-	bne	.L2749
+	str	r2, [r0, #72]
+.LVL2990:
+.L2737:
+	.loc 4 1505 0
+	ldr	r3, [r3, fp]
+	cmp	r3, #256
+	bne	.L2738
+.LBB544:
+	.loc 4 1507 0
+	ldr	r0, [ip, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+.LVL2991:
+	mov	fp, r0
+.LVL2992:
+	.loc 4 1508 0
+	bl	FtlGcRefreshBlock
+.LVL2993:
+	.loc 4 1517 0
+	ldr	r2, .L2759+36
+	.loc 4 1508 0
+	movw	r3, #2049
+.LVL2994:
+.L2740:
+	.loc 4 1514 0
+	subs	r3, r3, #1
+.LVL2995:
+	bne	.L2739
+.LVL2996:
+.L2741:
+	.loc 4 1518 0
+	bl	FtlSysFlush
+.LVL2997:
+.L2738:
+.LBE544:
+	.loc 4 1493 0 discriminator 2
+	add	r8, r8, #1
+.LVL2998:
+	cmp	r5, r8
+	bne	.L2742
+	.loc 4 1522 0
 	movs	r5, #0
-	b	.L2731
-.L2735:
-	mla	r0, r0, r4, r10
+.LVL2999:
+	b	.L2724
+.LVL3000:
+.L2728:
+	.loc 4 1462 0
+	mla	r0, r0, r4, r8
+.LVL3001:
+	.loc 4 1463 0
 	cmp	r6, r0
-	bhi	.L2734
+	bhi	.L2727
+	.loc 4 1463 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #12]
 	cmp	r3, r0
-	bls	.L2734
+	bls	.L2727
+	.loc 4 1464 0 is_stmt 1
 	subs	r0, r0, r6
+.LVL3002:
 	mov	r2, #512
 	movs	r1, #0
 	add	r0, r7, r0, lsl #9
 	bl	ftl_memset
-.L2734:
-	add	r10, r10, #1
-	b	.L2733
-.L2732:
-	ldr	r2, [r8]
-	mov	r10, #36
-	mla	r10, r10, r5, r2
-	str	r3, [r10, #4]
+.LVL3003:
+.L2727:
+	.loc 4 1461 0 discriminator 2
+	add	r8, r8, #1
+.LVL3004:
+	b	.L2726
+.LVL3005:
+.L2725:
+	.loc 4 1467 0
+	ldr	r2, .L2759+24
+	mov	r8, #36
+	ldr	r2, [r2]
+	mla	r8, r8, r5, r2
+	str	r3, [r8, #4]
+	.loc 4 1468 0
 	ldr	r3, [sp, #16]
 	cmp	r4, r3
-	ldr	r3, .L2766+8
-	bne	.L2737
-	ldr	r2, .L2766+24
+	ldr	r3, .L2759+8
+	bne	.L2730
+	.loc 4 1469 0
+	ldr	r2, .L2759+28
+	.loc 4 1470 0
 	mov	r0, r6
-	ldrh	fp, [r3]
+	ldrh	r10, [r3]
+	.loc 4 1469 0
 	ldr	r2, [r2]
-	mov	r1, fp
-	str	r2, [r10, #8]
+	.loc 4 1470 0
+	mov	r1, r10
+	.loc 4 1469 0
+	str	r2, [r8, #8]
+	.loc 4 1470 0
 	bl	__aeabi_uidivmod
+.LVL3006:
 	ldr	r2, [sp, #28]
-	sub	r3, fp, r1
+	.loc 4 1471 0
+	sub	r3, r10, r1
+	.loc 4 1470 0
 	str	r1, [sp, #32]
+.LVL3007:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
-	cmp	fp, r3
+.LVL3008:
+	.loc 4 1473 0
+	cmp	r3, r10
 	str	r3, [sp, #24]
-	bne	.L2738
-	str	r7, [r10, #8]
-.L2738:
-	ldr	r3, .L2766+32
-	ldr	r2, .L2766+36
-	str	r4, [r10, #16]
+.LVL3009:
+	bne	.L2731
+	.loc 4 1474 0
+	str	r7, [r8, #8]
+.LVL3010:
+.L2731:
+	.loc 4 1483 0
+	ldr	r3, .L2759+40
+	ldr	r2, .L2759+44
+	.loc 4 1484 0
+	str	r4, [r8, #16]
+	.loc 4 1483 0
 	ldrh	r3, [r3]
 	ldr	r2, [r2]
 	muls	r3, r5, r3
+	.loc 4 1485 0
 	adds	r5, r5, #1
+.LVL3011:
+	.loc 4 1483 0
 	bic	r3, r3, #3
 	add	r3, r3, r2
-	str	r3, [r10, #12]
-	b	.L2736
-.L2737:
+	str	r3, [r8, #12]
+	b	.L2729
+.L2730:
+	.loc 4 1475 0
 	ldr	r2, [sp, #20]
 	cmp	r4, r2
-	bne	.L2739
-	ldr	r2, .L2766+40
+	bne	.L2732
+	.loc 4 1476 0
+	ldr	r2, .L2759+48
+	.loc 4 1477 0
 	ldr	r1, [sp, #12]
+	.loc 4 1476 0
 	ldr	r2, [r2]
-	str	r2, [r10, #8]
+	str	r2, [r8, #8]
+	.loc 4 1477 0
 	ldrh	r2, [r3]
 	mul	r3, r2, r4
 	subs	r1, r1, r3
+	.loc 4 1478 0
 	cmp	r2, r1
+	.loc 4 1477 0
 	str	r1, [sp]
-	bne	.L2738
-.L2764:
+.LVL3012:
+	.loc 4 1478 0
+	bne	.L2731
+.LVL3013:
+.L2757:
+	.loc 4 1481 0
 	subs	r3, r3, r6
 	add	r3, r7, r3, lsl #9
-	str	r3, [r10, #8]
-	b	.L2738
-.L2739:
+	str	r3, [r8, #8]
+	b	.L2731
+.L2732:
 	ldrh	r3, [r3]
 	muls	r3, r4, r3
-	b	.L2764
-.L2742:
+	b	.L2757
+.LVL3014:
+.L2735:
+	.loc 4 1497 0
 	ldr	r1, [sp, #20]
 	cmp	r1, r2
-	bne	.L2743
+	bne	.L2736
+	.loc 4 1498 0
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2766+40
-	ldr	r3, [r3]
+	ldr	r3, [r10]
 	cmp	r1, r3
-	bne	.L2743
-	ldr	r3, .L2766+8
+	bne	.L2736
+	.loc 4 1499 0
+	ldr	r3, .L2759+8
 	ldr	r2, [sp, #44]
 	ldrh	r0, [r3]
 	ldr	r3, [sp, #20]
 	muls	r0, r3, r0
 	subs	r0, r0, r6
 	add	r0, r7, r0, lsl #9
-	b	.L2765
-.L2744:
-	cmp	r3, #256
-	bne	.L2745
-	ldr	r0, [r2, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	mov	fp, r0
-	bl	FtlGcRefreshBlock
-	ldr	r2, .L2766+44
-	movw	r3, #2049
-.L2747:
-	subs	r3, r3, #1
-	bne	.L2746
-.L2748:
-	bl	FtlSysFlush
-	b	.L2745
-.L2746:
+	b	.L2758
+.LVL3015:
+.L2739:
+.LBB545:
+	.loc 4 1516 0
 	movs	r1, #1
 	str	r2, [sp, #52]
 	mov	r0, r1
 	str	r3, [sp, #48]
+.LVL3016:
 	bl	rk_ftl_garbage_collect
+.LVL3017:
+	.loc 4 1517 0
 	ldr	r2, [sp, #52]
 	ldr	r3, [sp, #48]
 	ldrh	r1, [r2]
 	cmp	r1, fp
-	beq	.L2747
-	b	.L2748
-.L2751:
+	beq	.L2740
+	b	.L2741
+.LVL3018:
+.L2744:
+.LBE545:
+	.loc 4 1447 0
 	mov	r3, #-1
-.L2752:
+.LVL3019:
+.L2745:
 	str	r3, [sp, #8]
-	b	.L2728
-.L2767:
+	b	.L2721
+.L2760:
 	.align	2
-.L2766:
-	.word	.LANCHOR67
+.L2759:
+	.word	.LANCHOR68
 	.word	.LANCHOR223
-	.word	.LANCHOR54
-	.word	.LANCHOR164
+	.word	.LANCHOR55
+	.word	.LANCHOR163
 	.word	.LANCHOR114
-	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR177
 	.word	.LANCHOR183
-	.word	.LANCHOR136
-	.word	.LANCHOR57
+	.word	.LANCHOR135
+	.word	.LANCHOR201
+	.word	.LANCHOR58
 	.word	.LANCHOR186
 	.word	.LANCHOR184
-	.word	.LANCHOR201
-	.word	.LANCHOR178
+	.cfi_endproc
+.LFE305:
 	.size	ftl_read, .-ftl_read
 	.section	.text.ftl_write,"ax",%progbits
 	.align	1
@@ -19324,91 +31417,163 @@ ftl_read:
 	.fpu softvfp
 	.type	ftl_write, %function
 ftl_write:
+.LFB308:
+	.loc 4 1594 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 80
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL3020:
+	.loc 4 1602 0
 	cmp	r0, #16
+	.loc 4 1594 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	sub	sp, sp, #80
+	.cfi_def_cfa_offset 112
+	.loc 4 1594 0
 	mov	r7, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	bne	.L2769
+	.loc 4 1602 0
+	bne	.L2762
+	.loc 4 1603 0
 	mov	r2, r3
+.LVL3021:
 	ldr	r1, [sp, #12]
+.LVL3022:
 	add	r0, r7, #256
+.LVL3023:
 	bl	FtlVendorPartWrite
-.L2768:
+.LVL3024:
+.L2761:
+	.loc 4 1775 0
 	add	sp, sp, #80
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2769:
+.LVL3025:
+.L2762:
+	.cfi_restore_state
+	.loc 4 1606 0
 	ldr	r3, [sp, #12]
+.LVL3026:
 	adds	r5, r1, r3
-	ldr	r3, .L2823
+	ldr	r3, .L2816
 	ldr	r3, [r3]
 	cmp	r5, r3
-	bhi	.L2803
-	ldr	r3, .L2823+4
+	bhi	.L2796
+	.loc 4 1606 0 is_stmt 0 discriminator 1
+	ldr	r3, .L2816+4
 	ldr	r0, [r3]
+.LVL3027:
 	adds	r4, r0, #1
-	beq	.L2768
-	ldr	r3, .L2823+8
+	beq	.L2761
+	.loc 4 1609 0 is_stmt 1
+	ldr	r3, .L2816+8
 	mov	r2, #2048
+.LVL3028:
+	.loc 4 1610 0
 	mov	r0, r7
+	.loc 4 1609 0
 	str	r2, [r3]
-	ldr	r3, .L2823+12
+	.loc 4 1610 0
+	ldr	r3, .L2816+12
 	ldrh	r4, [r3]
 	mov	r1, r4
+.LVL3029:
 	bl	__aeabi_uidiv
+.LVL3030:
+	.loc 4 1611 0
 	mov	r1, r4
+	.loc 4 1610 0
 	mov	r10, r0
+.LVL3031:
+	.loc 4 1611 0
 	subs	r0, r5, #1
+.LVL3032:
 	bl	__aeabi_uidiv
-	ldr	r2, .L2823+16
+.LVL3033:
+	.loc 4 1614 0
+	ldr	r2, .L2816+16
+	.loc 4 1612 0
 	sub	r5, r0, r10
 	adds	r3, r5, #1
+	.loc 4 1614 0
 	adds	r1, r5, #1
+	.loc 4 1612 0
 	str	r3, [sp, #8]
+	.loc 4 1614 0
 	ldr	r3, [r2]
+	.loc 4 1611 0
 	str	r0, [sp, #20]
+.LVL3034:
+	.loc 4 1614 0
 	add	r3, r3, r1
 	str	r3, [r2]
-	ldr	r3, .L2823+20
+	.loc 4 1615 0
+	ldr	r3, .L2816+20
 	ldr	r8, [r3]
 	cmp	r8, #0
-	beq	.L2771
+	beq	.L2764
+	.loc 4 1616 0
 	ldr	r3, [r8, #16]
 	cmp	r10, r3
-	beq	.L2772
+	beq	.L2765
+	.loc 4 1617 0
 	bl	FtlCacheWriteBack
-.L2771:
-	ldr	r5, .L2823+24
+.LVL3035:
+.L2764:
+	.loc 4 1644 0
+	ldr	r5, .L2816+24
+	.loc 4 1643 0
 	mov	r4, r10
-.L2773:
+.LVL3036:
+.L2766:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	beq	.L2802
-	ldr	r6, .L2823+28
+	beq	.L2795
+	.loc 4 1644 0
+	ldr	r6, .L2816+28
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r6]
 	cmp	r2, r3
-	bcc	.L2774
-	ldr	r1, .L2823+32
-	mov	r2, #1632
-	ldr	r0, .L2823+36
+	bcc	.L2767
+	.loc 4 1644 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2816+32
+	movw	r2, #1644
+	ldr	r0, .L2816+36
 	bl	printf
-	ldr	r1, .L2823+40
-	ldr	r0, .L2823+44
+.LVL3037:
+	ldr	r1, .L2816+40
+	ldr	r0, .L2816+44
 	bl	printf
-.L2774:
+.LVL3038:
+.L2767:
+	.loc 4 1645 0 is_stmt 1
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L2775
+	cbnz	r3, .L2768
+	.loc 4 1646 0
 	bl	FtlCacheWriteBack
+.LVL3039:
+	.loc 4 1668 0
 	mov	r0, r5
 	bl	allocate_new_data_superblock
-.L2775:
+.LVL3040:
+.L2768:
+	.loc 4 1673 0
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	.loc 4 1675 0
 	ldrh	r2, [r5, #4]
+	.loc 4 1673 0
 	lsls	r3, r3, #2
 	cmp	r3, r2
 	it	cs
@@ -19417,113 +31582,188 @@ ftl_write:
 	cmp	r3, r2
 	it	cs
 	movcs	r3, r2
+	.loc 4 1677 0
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	str	r3, [sp, #36]
+.LVL3041:
 	ldrh	r3, [r6]
+.LVL3042:
 	cmp	r2, r3
-	bcc	.L2776
-	ldr	r1, .L2823+32
-	movw	r2, #1665
-	ldr	r0, .L2823+36
+	bcc	.L2769
+	.loc 4 1677 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2816+32
+	movw	r2, #1677
+	ldr	r0, .L2816+36
 	bl	printf
-	ldr	r1, .L2823+40
-	ldr	r0, .L2823+44
+.LVL3043:
+	ldr	r1, .L2816+40
+	ldr	r0, .L2816+44
 	bl	printf
-.L2776:
+.LVL3044:
+.L2769:
+	.loc 4 1700 0 is_stmt 1 discriminator 1
 	mov	r8, #0
-.L2777:
+.LVL3045:
+.L2770:
+	.loc 4 1678 0 discriminator 1
 	ldr	r3, [sp, #36]
 	cmp	r8, r3
-	bne	.L2798
-.L2778:
-	ldr	r3, .L2823+20
+	bne	.L2791
+.L2771:
+.LVL3046:
+	.loc 4 1759 0
+	ldr	r3, .L2816+20
 	ldr	r3, [r3]
 	cmp	r3, #0
-	beq	.L2799
+	beq	.L2792
+.LVL3047:
+	.loc 4 1761 0
 	ldr	r3, [sp, #8]
+	.loc 4 1762 0
 	subs	r8, r8, #1
+.LVL3048:
+	.loc 4 1761 0
 	add	r3, r3, #-1
 	str	r3, [sp, #8]
-	bne	.L2799
-.L2802:
+.LVL3049:
+	.loc 4 1762 0
+	bne	.L2792
+.LVL3050:
+.L2795:
+	.loc 4 1769 0
 	ldr	r3, [sp, #20]
+.LVL3051:
 	movs	r0, #0
 	sub	r1, r3, r10
 	bl	rk_ftl_garbage_collect
+.LVL3052:
+	.loc 4 1774 0
 	movs	r0, #0
-	b	.L2768
-.L2772:
-	ldr	r2, .L2823+48
+	b	.L2761
+.LVL3053:
+.L2765:
+	.loc 4 1619 0
+	ldr	r2, .L2816+48
+	.loc 4 1620 0
 	mov	r1, r4
+.LVL3054:
 	mov	r0, r7
+.LVL3055:
+	.loc 4 1619 0
 	ldr	r3, [r2]
 	adds	r3, r3, #1
 	str	r3, [r2]
+	.loc 4 1620 0
 	bl	__aeabi_uidivmod
+.LVL3056:
 	ldr	r2, [sp, #12]
+	.loc 4 1621 0
 	subs	r4, r4, r1
+	.loc 4 1624 0
 	ldr	r0, [r8, #8]
+	.loc 4 1620 0
 	mov	r3, r1
+.LVL3057:
+	.loc 4 1624 0
 	ldr	r1, [sp, #4]
+.LVL3058:
 	cmp	r4, r2
 	it	cs
 	movcs	r4, r2
+.LVL3059:
 	lsls	r6, r4, #9
 	add	r0, r0, r3, lsl #9
 	mov	r2, r6
 	bl	ftl_memcpy
+.LVL3060:
+	.loc 4 1626 0
 	cmp	r5, #0
-	beq	.L2805
+	beq	.L2798
+	.loc 4 1628 0
 	ldr	r3, [sp, #12]
+	.loc 4 1629 0
 	add	r7, r7, r4
+.LVL3061:
+	.loc 4 1631 0
 	add	r10, r10, #1
+.LVL3062:
+	.loc 4 1628 0
 	subs	r3, r3, r4
 	str	r3, [sp, #12]
+.LVL3063:
+	.loc 4 1630 0
 	ldr	r3, [sp, #4]
+.LVL3064:
 	add	r3, r3, r6
 	str	r3, [sp, #4]
+.LVL3065:
+	.loc 4 1632 0
 	bl	FtlCacheWriteBack
+.LVL3066:
 	str	r5, [sp, #8]
-	b	.L2771
-.L2798:
+	b	.L2764
+.LVL3067:
+.L2791:
+	.loc 4 1679 0
 	ldrh	r3, [r5, #4]
 	cmp	r3, #0
-	beq	.L2778
+	beq	.L2771
+	.loc 4 1683 0
 	movs	r2, #0
 	add	r1, sp, #40
 	mov	r0, r4
 	movs	r6, #36
 	bl	log2phys
+.LVL3068:
+	.loc 4 1684 0
 	mov	r0, r5
 	mul	r6, r6, r8
 	bl	get_new_active_ppa
-	ldr	r3, .L2823+52
-	ldr	r2, .L2823+56
+.LVL3069:
+	.loc 4 1686 0
+	ldr	r3, .L2816+52
+	.loc 4 1687 0
+	ldr	r2, .L2816+56
+	.loc 4 1686 0
 	ldr	r1, [r3]
+	.loc 4 1687 0
 	ldrh	r2, [r2]
+	.loc 4 1686 0
 	str	r3, [sp, #16]
 	add	r1, r1, r6
 	str	r0, [r1, #4]
+	.loc 4 1687 0
 	mul	r0, r2, r8
+.LVL3070:
+	.loc 4 1688 0
 	str	r4, [r1, #16]
+	.loc 4 1687 0
 	bic	r3, r0, #3
-	ldr	r0, .L2823+60
+	ldr	r0, .L2816+60
 	str	r3, [sp, #28]
 	ldr	r3, [r0]
 	ldr	r0, [sp, #28]
 	str	r3, [sp, #32]
 	add	fp, r3, r0
+.LVL3071:
 	str	fp, [r1, #12]
+	.loc 4 1691 0
 	mov	r0, fp
 	movs	r1, #0
+.LVL3072:
 	bl	ftl_memset
+.LVL3073:
+	.loc 4 1693 0
 	cmp	r4, r10
-	ldr	r1, .L2823+12
-	beq	.L2779
+	ldr	r1, .L2816+12
+	beq	.L2772
+	.loc 4 1693 0 is_stmt 0 discriminator 1
 	ldr	r3, [sp, #20]
 	cmp	r4, r3
 	ldr	r3, [sp, #16]
-	bne	.L2818
+	bne	.L2811
+.LVL3074:
+	.loc 4 1701 0 is_stmt 1
 	ldr	r3, [sp, #12]
 	adds	r2, r7, r3
 	ldrh	r3, [r1]
@@ -19531,68 +31771,107 @@ ftl_write:
 	subs	r2, r2, r3
 	uxth	r3, r2
 	str	r3, [sp, #16]
+.LVL3075:
+	.loc 4 1700 0
 	movs	r3, #0
+.LVL3076:
 	str	r3, [sp, #24]
-	b	.L2782
-.L2779:
+	b	.L2775
+.LVL3077:
+.L2772:
+	.loc 4 1695 0
 	ldrh	r2, [r1]
 	mov	r0, r7
 	mov	r1, r2
 	str	r2, [sp, #16]
 	bl	__aeabi_uidivmod
+.LVL3078:
+	.loc 4 1696 0
 	ldr	r2, [sp, #16]
+	.loc 4 1695 0
 	str	r1, [sp, #24]
+.LVL3079:
+	.loc 4 1696 0
 	subs	r2, r2, r1
+.LVL3080:
 	ldr	r1, [sp, #12]
+.LVL3081:
 	mov	r3, r2
 	cmp	r2, r1
 	it	cs
 	movcs	r3, r1
 	str	r3, [sp, #16]
-.L2782:
-	ldr	r3, .L2823+12
+.LVL3082:
+.L2775:
+	.loc 4 1704 0
+	ldr	r3, .L2816+12
 	ldr	r2, [sp, #16]
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	ldr	r3, .L2823+52
+	ldr	r3, .L2816+52
+	.loc 4 1706 0
 	ldr	r3, [r3]
-	bne	.L2783
+	.loc 4 1704 0
+	bne	.L2776
+	.loc 4 1705 0
 	cmp	r4, r10
+	.loc 4 1706 0
 	add	r6, r6, r3
-	bne	.L2784
+	.loc 4 1705 0
+	bne	.L2777
+	.loc 4 1706 0
 	ldr	r3, [sp, #4]
-.L2821:
+.LVL3083:
+.L2814:
+	.loc 4 1749 0
 	str	r3, [r6, #8]
-	b	.L2785
-.L2784:
+	b	.L2778
+.LVL3084:
+.L2777:
+	.loc 4 1708 0
 	ldr	r2, [sp, #16]
+.LVL3085:
 	ldr	r3, [sp, #4]
 	muls	r2, r4, r2
 	subs	r2, r2, r7
 	add	r2, r3, r2, lsl #9
 	str	r2, [r6, #8]
-.L2785:
-	ldr	r3, .L2823+28
+.LVL3086:
+.L2778:
+	.loc 4 1751 0
+	ldr	r3, .L2816+28
 	ldrb	r2, [r5, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L2795
-	ldr	r1, .L2823+32
-	movw	r2, #1739
-	ldr	r0, .L2823+36
+	bcc	.L2788
+	.loc 4 1751 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2816+32
+	movw	r2, #1751
+	ldr	r0, .L2816+36
 	bl	printf
-	ldr	r1, .L2823+40
-	ldr	r0, .L2823+44
+.LVL3087:
+	ldr	r1, .L2816+40
+	ldr	r0, .L2816+44
 	bl	printf
-.L2795:
+.LVL3088:
+.L2788:
+	.loc 4 1752 0 is_stmt 1
 	ldr	r2, [sp, #32]
 	movw	r3, #61589
 	ldr	r1, [sp, #28]
+	.loc 4 1678 0
 	add	r8, r8, #1
+.LVL3089:
+	.loc 4 1752 0
 	strh	r3, [r2, r1]	@ movhi
-	ldr	r2, .L2823+64
+	.loc 4 1753 0
+	ldr	r2, .L2816+64
+	.loc 4 1754 0
 	str	r4, [fp, #8]
+	.loc 4 1757 0
 	adds	r4, r4, #1
+.LVL3090:
+	.loc 4 1753 0
 	ldr	r3, [r2]
 	str	r3, [fp, #4]
 	adds	r3, r3, #1
@@ -19600,68 +31879,95 @@ ftl_write:
 	it	eq
 	moveq	r3, #0
 	str	r3, [r2]
+	.loc 4 1755 0
 	ldr	r3, [sp, #40]
 	str	r3, [fp, #12]
+	.loc 4 1756 0
 	ldrh	r3, [r5]
 	strh	r3, [fp, #2]	@ movhi
-	b	.L2777
-.L2824:
+	b	.L2770
+.L2817:
 	.align	2
-.L2823:
-	.word	.LANCHOR67
+.L2816:
+	.word	.LANCHOR68
 	.word	.LANCHOR223
 	.word	.LANCHOR241
-	.word	.LANCHOR54
-	.word	.LANCHOR160
+	.word	.LANCHOR55
+	.word	.LANCHOR159
 	.word	.LANCHOR129
-	.word	.LANCHOR90
-	.word	.LANCHOR36
+	.word	.LANCHOR91
+	.word	.LANCHOR37
 	.word	.LANCHOR242
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR162
-	.word	.LANCHOR180
-	.word	.LANCHOR57
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR161
+	.word	.LANCHOR179
+	.word	.LANCHOR58
 	.word	.LANCHOR186
-	.word	.LANCHOR158
-.L2783:
+	.word	.LANCHOR157
+.LVL3091:
+.L2776:
+	.loc 4 1711 0
 	cmp	r4, r10
+	.loc 4 1712 0
 	add	r3, r3, r6
 	ite	eq
-	ldreq	r2, .L2825
-	ldrne	r2, .L2825+4
+	ldreq	r2, .L2818
+.LVL3092:
+	.loc 4 1714 0
+	ldrne	r2, .L2818+4
 	ldr	r2, [r2]
 	str	r2, [r3, #8]
+.LVL3093:
+	.loc 4 1716 0
 	ldr	r2, [sp, #40]
-	ldr	r3, .L2825+8
+	ldr	r3, .L2818+8
 	adds	r0, r2, #1
-	beq	.L2788
+	beq	.L2781
+.LBB546:
+	.loc 4 1720 0
 	ldr	r3, [r3]
+	.loc 4 1722 0
 	movs	r1, #1
-	str	r2, [sp, #48]
-	add	r0, sp, #44
+	.loc 4 1719 0
 	str	r4, [sp, #60]
+	.loc 4 1722 0
+	add	r0, sp, #44
+	.loc 4 1718 0
+	str	r2, [sp, #48]
+	.loc 4 1720 0
 	add	r3, r3, r6
 	ldr	r2, [r3, #8]
+	.loc 4 1721 0
 	ldr	r3, [r3, #12]
+	.loc 4 1720 0
 	str	r2, [sp, #52]
+	.loc 4 1722 0
 	movs	r2, #0
+	.loc 4 1721 0
 	str	r3, [sp, #56]
+	.loc 4 1722 0
 	bl	FlashReadPages
+.LVL3094:
+	.loc 4 1723 0
 	ldr	r3, [sp, #44]
 	adds	r3, r3, #1
-	bne	.L2789
-	ldr	r2, .L2825+12
+	bne	.L2782
+	.loc 4 1724 0
+	ldr	r2, .L2818+12
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
-.L2792:
+.L2785:
 	ldr	r2, [sp, #16]
+.LBE546:
+	.loc 4 1736 0
 	cmp	r4, r10
-	ldr	r3, .L2825+8
+	ldr	r3, .L2818+8
 	lsl	r2, r2, #9
-	bne	.L2793
+	bne	.L2786
+	.loc 4 1737 0
 	ldr	r1, [r3]
 	str	r3, [sp, #16]
 	ldr	r3, [sp, #24]
@@ -19669,56 +31975,80 @@ ftl_write:
 	ldr	r0, [r1, #8]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-.L2820:
+.L2813:
+	.loc 4 1739 0
 	bl	ftl_memcpy
+.LVL3095:
+	.loc 4 1741 0
 	ldr	r2, [sp, #20]
+	.loc 4 1739 0
 	ldr	r3, [sp, #16]
+	.loc 4 1741 0
 	cmp	r4, r2
-	bne	.L2785
+	bne	.L2778
+	.loc 4 1742 0
 	ldrh	r2, [r5, #4]
 	cmp	r2, #0
-	beq	.L2785
+	beq	.L2778
+	.loc 4 1743 0
 	ldr	r3, [r3]
 	add	r6, r6, r3
-	ldr	r3, .L2825+16
+	ldr	r3, .L2818+16
 	str	r6, [r3]
-	ldr	r3, .L2825+20
+	.loc 4 1744 0
+	ldr	r3, .L2818+20
 	str	r5, [r3]
-	b	.L2785
-.L2789:
-	ldr	r1, [fp, #8]
-	cmp	r4, r1
-	beq	.L2791
-	ldr	r2, .L2825+12
-	ldr	r0, .L2825+24
+	b	.L2778
+.L2782:
+.LBB547:
+	.loc 4 1726 0
+	ldr	r3, [fp, #8]
+	cmp	r4, r3
+	beq	.L2784
+	.loc 4 1727 0
+	ldr	r2, .L2818+12
+	.loc 4 1728 0
+	ldr	r0, .L2818+24
+	.loc 4 1727 0
 	ldr	r3, [r2, #72]
 	adds	r3, r3, #1
 	str	r3, [r2, #72]
+	.loc 4 1728 0
 	mov	r2, r4
+	ldr	r1, [fp, #8]
 	bl	printf
-.L2791:
+.LVL3096:
+.L2784:
+	.loc 4 1730 0
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
-	beq	.L2792
-	movw	r2, #1718
-	ldr	r1, .L2825+28
-	ldr	r0, .L2825+32
+	beq	.L2785
+	.loc 4 1730 0 is_stmt 0 discriminator 1
+	movw	r2, #1730
+	ldr	r1, .L2818+28
+	ldr	r0, .L2818+32
 	bl	printf
-	ldr	r1, .L2825+36
-	ldr	r0, .L2825+40
+.LVL3097:
+	ldr	r1, .L2818+36
+	ldr	r0, .L2818+40
 	bl	printf
-	b	.L2792
-.L2788:
+.LVL3098:
+	b	.L2785
+.L2781:
+.LBE547:
+	.loc 4 1733 0 is_stmt 1
 	ldr	r3, [r3]
 	movs	r1, #0
-	ldr	r2, .L2825+44
+	ldr	r2, .L2818+44
 	add	r3, r3, r6
 	ldrh	r2, [r2]
 	ldr	r0, [r3, #8]
 	bl	ftl_memset
-	b	.L2792
-.L2793:
-	ldr	r1, .L2825+48
+.LVL3099:
+	b	.L2785
+.L2786:
+	.loc 4 1739 0
+	ldr	r1, .L2818+48
 	ldr	r0, [r3]
 	str	r3, [sp, #16]
 	ldrh	r1, [r1]
@@ -19728,8 +32058,9 @@ ftl_write:
 	muls	r1, r4, r1
 	subs	r1, r1, r7
 	add	r1, r3, r1, lsl #9
-	b	.L2820
-.L2818:
+	b	.L2813
+.L2811:
+	.loc 4 1749 0
 	ldr	r3, [r3]
 	ldr	r2, [sp, #4]
 	add	r6, r6, r3
@@ -19737,51 +32068,67 @@ ftl_write:
 	muls	r3, r4, r3
 	subs	r3, r3, r7
 	add	r3, r2, r3, lsl #9
-	b	.L2821
-.L2799:
-	ldr	r0, .L2825+8
+	b	.L2814
+.LVL3100:
+.L2792:
+	.loc 4 1765 0
+	ldr	r0, .L2818+8
 	mov	r3, r5
 	movs	r2, #0
 	mov	r1, r8
 	ldr	r0, [r0]
 	bl	FtlProgPages
+.LVL3101:
+	.loc 4 1766 0
 	ldr	r3, [sp, #8]
 	cmp	r3, r8
-	bcs	.L2800
-	ldr	r1, .L2825+28
-	movw	r2, #1754
-	ldr	r0, .L2825+32
+	bcs	.L2793
+	.loc 4 1766 0 is_stmt 0 discriminator 1
+	ldr	r1, .L2818+28
+	movw	r2, #1766
+	ldr	r0, .L2818+32
 	bl	printf
-	ldr	r1, .L2825+36
-	ldr	r0, .L2825+40
+.LVL3102:
+	ldr	r1, .L2818+36
+	ldr	r0, .L2818+40
 	bl	printf
-.L2800:
+.LVL3103:
+.L2793:
+	.loc 4 1767 0 is_stmt 1
 	ldr	r3, [sp, #8]
 	sub	r3, r3, r8
 	str	r3, [sp, #8]
-	b	.L2773
-.L2803:
+.LVL3104:
+	b	.L2766
+.LVL3105:
+.L2796:
+	.loc 4 1607 0
 	mov	r0, #-1
-	b	.L2768
-.L2805:
+.LVL3106:
+	b	.L2761
+.LVL3107:
+.L2798:
+	.loc 4 1627 0
 	mov	r0, r5
-	b	.L2768
-.L2826:
+	b	.L2761
+.L2819:
 	.align	2
-.L2825:
+.L2818:
 	.word	.LANCHOR183
 	.word	.LANCHOR184
-	.word	.LANCHOR180
-	.word	.LANCHOR136
+	.word	.LANCHOR179
+	.word	.LANCHOR135
 	.word	.LANCHOR129
 	.word	.LANCHOR221
-	.word	.LC54
+	.word	.LC57
 	.word	.LANCHOR242
-	.word	.LC4
-	.word	.LC5
 	.word	.LC6
-	.word	.LANCHOR56
-	.word	.LANCHOR54
+	.word	.LC7
+	.word	.LC8
+	.word	.LANCHOR57
+	.word	.LANCHOR55
+	.cfi_endproc
+.LFE308:
 	.size	ftl_write, .-ftl_write
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
@@ -19792,101 +32139,186 @@ ftl_write:
 	.fpu softvfp
 	.type	FlashReadFacBbtData, %function
 FlashReadFacBbtData:
+.LFB264:
+	.loc 2 3288 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
+.LVL3108:
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 32
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
 	mov	fp, r2
-	ldr	r2, .L2840
+	.loc 2 3293 0
+	ldr	r2, .L2832
+.LVL3109:
+	.loc 2 3288 0
 	sub	sp, sp, #48
+	.cfi_def_cfa_offset 80
+	.loc 2 3288 0
 	mov	r6, r1
 	mov	r4, r0
-	ldr	r7, .L2840+4
+	.loc 2 3295 0
+	ldr	r7, .L2832+4
+	.loc 2 3293 0
 	ldrh	r3, [r2, #14]
 	ldrh	r2, [r2, #12]
 	smulbb	r3, r3, r2
+	.loc 2 3295 0
 	ldr	r2, [r7]
+	.loc 2 3293 0
 	uxth	r3, r3
+.LVL3110:
+	.loc 2 3295 0
 	str	r2, [sp, #20]
-	ldr	r2, .L2840+8
+	.loc 2 3296 0
+	ldr	r2, .L2832+8
+	.loc 2 3297 0
 	subs	r5, r3, #1
+	.loc 2 3298 0
 	mul	r10, r6, r3
+	.loc 2 3297 0
 	uxth	r5, r5
+.LVL3111:
 	subs	r3, r3, #15
+.LVL3112:
+	.loc 2 3296 0
 	ldr	r1, [r2]
+.LVL3113:
 	mov	r8, r2
 	str	r1, [sp, #24]
-.L2828:
+.LVL3114:
+.L2821:
+	.loc 2 3297 0 discriminator 1
 	cmp	r3, r5
-	ble	.L2835
+	ble	.L2827
+	.loc 2 3289 0
 	mov	r0, #-1
-	b	.L2827
-.L2835:
+	b	.L2820
+.L2827:
+	.loc 2 3298 0
 	add	r2, r5, r10
+	.loc 2 3300 0
 	add	r0, sp, #12
+	.loc 2 3298 0
 	lsls	r2, r2, #10
 	str	r3, [sp, #4]
+.LVL3115:
+	.loc 2 3299 0
 	str	r2, [sp, #16]
+	.loc 2 3300 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL3116:
+	.loc 2 3301 0
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2829
+	beq	.L2822
+	.loc 2 3302 0
 	ldr	r2, [r8]
 	ldrh	r1, [r2]
 	movw	r2, #61664
 	cmp	r1, r2
-	bne	.L2829
-	cbz	r4, .L2836
-	cbz	r6, .L2831
-.L2834:
+	bne	.L2822
+.LVL3117:
+	.loc 2 3304 0
+	cbz	r4, .L2828
+.LVL3118:
+.LBB550:
+.LBB551:
+	.loc 2 3305 0
+	cbnz	r6, .L2824
+	.loc 2 3306 0
+	ldr	r0, .L2832+12
+	.loc 2 3307 0
+	movs	r5, #1
+.LVL3119:
+.L2825:
+	.loc 2 3306 0
+	ldr	r1, [r0]
+	uxth	r3, r6
+.LVL3120:
+	adds	r6, r6, #1
+	cmp	r3, r1
+	bcc	.L2826
+.LVL3121:
+.L2824:
+	.loc 2 3309 0
 	mov	r2, fp
 	ldr	r1, [r7]
 	mov	r0, r4
 	bl	ftl_memcpy
+.LVL3122:
+	.loc 2 3310 0
 	movs	r3, #4
-	ldr	r0, .L2840+12
+	ldr	r0, .L2832+16
 	mov	r2, r3
 	mov	r1, r4
 	bl	rknand_print_hex
+.LVL3123:
 	movs	r0, #0
-.L2827:
+.LVL3124:
+.L2820:
+.LBE551:
+.LBE550:
+	.loc 2 3317 0
 	add	sp, sp, #48
+	.cfi_remember_state
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2831:
+.LVL3125:
+.L2826:
+	.cfi_restore_state
+.LBB553:
+.LBB552:
+	.loc 2 3307 0
 	ldr	r1, [r7]
-	mov	ip, #1
-	ldr	r5, .L2840+16
-.L2832:
-	ldr	r0, [r5]
-	uxth	r3, r6
-	adds	r6, r6, #1
-	cmp	r3, r0
-	bcs	.L2834
-	lsrs	r0, r3, #5
+	lsr	ip, r3, #5
 	and	r3, r3, #31
-	lsl	r3, ip, r3
-	ldr	r2, [r1, r0, lsl #2]
+.LVL3126:
+	lsl	r3, r5, r3
+	ldr	r2, [r1, ip, lsl #2]
 	orrs	r3, r3, r2
-	str	r3, [r1, r0, lsl #2]
-	b	.L2832
-.L2829:
+	str	r3, [r1, ip, lsl #2]
+.LVL3127:
+	b	.L2825
+.LVL3128:
+.L2822:
+.LBE552:
+.LBE553:
+	.loc 2 3297 0 discriminator 2
 	subs	r5, r5, #1
+.LVL3129:
 	uxth	r5, r5
-	b	.L2828
-.L2836:
+.LVL3130:
+	b	.L2821
+.LVL3131:
+.L2828:
+	.loc 2 3303 0
 	mov	r0, r4
-	b	.L2827
-.L2841:
+.LVL3132:
+	.loc 2 3316 0
+	b	.L2820
+.L2833:
 	.align	2
-.L2840:
+.L2832:
 	.word	.LANCHOR15
-	.word	.LANCHOR145
+	.word	.LANCHOR144
 	.word	.LANCHOR194
-	.word	.LC55
-	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LC58
+	.cfi_endproc
+.LFE264:
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -19897,59 +32329,104 @@ FlashReadFacBbtData:
 	.fpu softvfp
 	.type	FlashGetBadBlockList, %function
 FlashGetBadBlockList:
+.LFB265:
+	.loc 2 3320 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+.LVL3133:
+	.loc 2 3323 0
+	ldr	r3, .L2844
+	.loc 2 3320 0
+	push	{r4, r5, r6, r7, r8, lr}
+	.cfi_def_cfa_offset 24
+	.cfi_offset 4, -24
+	.cfi_offset 5, -20
+	.cfi_offset 6, -16
+	.cfi_offset 7, -12
+	.cfi_offset 8, -8
+	.cfi_offset 14, -4
+	.loc 2 3320 0
 	mov	r5, r0
-	ldr	r3, .L2852
-	ldr	r6, .L2852+4
+	.loc 2 3326 0
+	ldr	r6, .L2844+4
+	.loc 2 3323 0
 	ldr	r3, [r3]
+	.loc 2 3326 0
 	ldr	r0, [r6]
+.LVL3134:
+	.loc 2 3323 0
 	ldrb	r4, [r3, #13]	@ zero_extendqisi2
 	ldrh	r3, [r3, #14]
 	smulbb	r4, r4, r3
 	uxth	r4, r4
+	.loc 2 3326 0
 	adds	r2, r4, #7
 	asrs	r2, r2, #3
 	bl	FlashReadFacBbtData
+.LVL3135:
+	.loc 2 3327 0
 	adds	r0, r0, #1
-	bne	.L2843
-.L2847:
+.LVL3136:
+	mov	ip, r6
+	bne	.L2835
+.LVL3137:
+.L2839:
+	.loc 2 3321 0
 	movs	r3, #0
-.L2844:
+.L2836:
+.LVL3138:
+	.loc 2 3338 0
 	movw	r2, #65535
+	.loc 2 3340 0
 	movs	r0, #0
+	.loc 2 3338 0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2843:
-	ldr	r7, [r6]
+	.loc 2 3340 0
+	pop	{r4, r5, r6, r7, r8, pc}
+.LVL3139:
+.L2835:
+	.loc 2 3332 0
 	movs	r2, #0
-	lsr	ip, r4, #4
+	lsr	lr, r4, #4
 	mov	r3, r2
+	.loc 2 3328 0
 	subs	r4, r4, #1
-	mov	lr, #1
-.L2845:
+	.loc 2 3329 0
+	mov	r8, #1
+.LVL3140:
+.L2837:
 	uxth	r1, r2
+.LVL3141:
+	.loc 2 3328 0 discriminator 1
 	cmp	r1, r4
-	bge	.L2844
-	lsrs	r6, r1, #5
+	bge	.L2836
+	.loc 2 3329 0
+	ldr	r6, [ip]
+	lsrs	r7, r1, #5
 	and	r0, r1, #31
-	lsl	r0, lr, r0
+	lsl	r0, r8, r0
 	adds	r2, r2, #1
-	ldr	r6, [r7, r6, lsl #2]
+	ldr	r6, [r6, r7, lsl #2]
 	tst	r0, r6
+	.loc 2 3330 0
 	ittt	ne
 	addne	r0, r3, #1
+.LVL3142:
 	strhne	r1, [r5, r3, lsl #1]	@ movhi
 	uxthne	r3, r0
-	cmp	r3, ip
-	bcc	.L2845
-	b	.L2847
-.L2853:
+.LVL3143:
+	.loc 2 3332 0
+	cmp	r3, lr
+	bcc	.L2837
+	b	.L2839
+.L2845:
 	.align	2
-.L2852:
+.L2844:
 	.word	.LANCHOR18
-	.word	.LANCHOR151
+	.word	.LANCHOR150
+	.cfi_endproc
+.LFE265:
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -19960,77 +32437,135 @@ FlashGetBadBlockList:
 	.fpu softvfp
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
+.LFB324:
+	.loc 5 361 0
+	.cfi_startproc
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2874
+	.loc 5 369 0
+	ldr	r3, .L2866
+	.loc 5 361 0
 	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 40
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 5 369 0
 	ldr	r7, [r3]
 	cmp	r7, #0
-	bne	.L2855
-	ldr	r8, .L2874+40
-	ldr	r4, .L2874+4
+	bne	.L2847
+	ldr	r8, .L2866+40
+.LBB556:
+.LBB557:
+	.loc 5 375 0
+	ldr	r4, .L2866+4
+	.loc 5 371 0
 	bl	FtlBbtMemInit
+.LVL3144:
 	sub	r10, r8, #18
+	.loc 5 372 0
 	bl	FtlLoadFactoryBbt
-.L2856:
-	ldr	r3, .L2874+8
+.LVL3145:
+.L2848:
+	.loc 5 373 0
+	ldr	r3, .L2866+8
 	ldrh	r3, [r3]
 	cmp	r7, r3
-	bcc	.L2862
-	ldr	r5, .L2874+12
+	bcc	.L2854
+	.loc 5 427 0
+	ldr	r5, .L2866+12
+	.loc 5 373 0
 	movs	r4, #0
-.L2863:
+.L2855:
+	.loc 5 427 0
 	ldrh	r3, [r5]
 	uxth	r0, r4
+.LVL3146:
 	adds	r4, r4, #1
 	cmp	r3, r0
-	bhi	.L2864
-	ldr	r4, .L2874+16
+	bhi	.L2856
+	.loc 5 433 0
+	ldr	r4, .L2866+16
+	.loc 5 442 0
 	movw	r6, #65535
+	.loc 5 433 0
 	ldrh	r5, [r4, #12]
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2865:
+.LVL3147:
+.L2857:
 	ldrh	r3, [r4, #12]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	bgt	.L2869
+	bgt	.L2861
+	.loc 5 435 0
 	mov	r0, r5
 	bl	FtlBbmIsBadBlock
+.LVL3148:
 	cmp	r0, #1
-	beq	.L2866
+	beq	.L2858
+	.loc 5 437 0
 	mov	r0, r5
 	bl	FlashTestBlk
+.LVL3149:
 	cmp	r0, #0
-	beq	.L2867
+	beq	.L2859
+	.loc 5 439 0
 	mov	r0, r5
 	bl	FtlBbmMapBadBlock
-.L2866:
+.LVL3150:
+.L2858:
+	.loc 5 433 0
 	subs	r5, r5, #1
+.LVL3151:
 	uxth	r5, r5
-	b	.L2865
-.L2862:
-	ldr	r3, .L2874+20
+.LVL3152:
+	b	.L2857
+.LVL3153:
+.L2854:
+	.loc 5 375 0
+	ldr	r3, .L2866+20
+	.loc 5 378 0
 	movw	r1, #65535
 	ldrh	r2, [r10, #2]!
+	.loc 5 375 0
 	ldr	r0, [r3]
-	ldr	r3, .L2874+24
+	.loc 5 376 0
+	ldr	r3, .L2866+24
+	.loc 5 378 0
 	cmp	r2, r1
+	.loc 5 375 0
 	str	r0, [r4, #8]
+	.loc 5 376 0
 	ldr	fp, [r3]
 	str	r3, [sp, #4]
-	ldr	r3, .L2874+28
+	ldr	r3, .L2866+28
 	str	fp, [r4, #12]
-	beq	.L2857
+.LVL3154:
+	.loc 5 378 0
+	beq	.L2849
+	.loc 5 380 0
 	ldrh	r6, [r3]
+	.loc 5 382 0
 	mov	r0, r4
+	.loc 5 380 0
 	str	r3, [sp]
 	mla	r6, r7, r6, r2
+.LVL3155:
+	.loc 5 381 0
 	lsls	r2, r6, #10
 	str	r2, [r4, #4]
+	.loc 5 382 0
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+.LVL3156:
+	.loc 5 383 0
 	ldr	r3, [sp]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r8]
@@ -20038,129 +32573,206 @@ FtlMakeBbt:
 	adds	r2, r2, #7
 	asrs	r2, r2, #3
 	bl	ftl_memcpy
-.L2858:
+.LVL3157:
+.L2850:
+	.loc 5 422 0
 	uxth	r0, r6
+	.loc 5 373 0
 	adds	r7, r7, #1
+.LVL3158:
 	add	r8, r8, #4
+	.loc 5 422 0
 	bl	FtlBbmMapBadBlock
-	b	.L2856
-.L2857:
+.LVL3159:
+	b	.L2848
+.LVL3160:
+.L2849:
+	.loc 5 387 0
 	mov	r1, r7
 	str	r3, [sp]
 	bl	FlashGetBadBlockList
+.LVL3161:
+	.loc 5 388 0
 	ldr	r1, [r8]
 	ldr	r0, [r4, #8]
 	bl	FtlBbt2Bitmap
+.LVL3162:
+	.loc 5 390 0
 	ldr	r3, [sp]
 	ldrh	r5, [r3]
-.L2860:
+.L2852:
+	.loc 5 394 0
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2859:
+.LVL3163:
+.L2851:
+	.loc 5 392 0
 	ldr	r3, [sp]
 	ldrh	r0, [r3]
 	smlabb	r0, r0, r7, r5
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
+.LVL3164:
 	cmp	r0, #1
-	beq	.L2860
+	beq	.L2852
+	.loc 5 397 0
 	ldr	r3, [sp, #4]
 	movs	r2, #16
 	movs	r1, #0
+	.loc 5 396 0
 	strh	r5, [r10]	@ movhi
+	.loc 5 397 0
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r2, [sp]
+.LVL3165:
+	.loc 5 398 0
 	movw	r3, #61664
 	strh	r3, [fp]	@ movhi
+	.loc 5 399 0
 	movs	r3, #0
 	str	r3, [fp, #4]
-	ldrh	r6, [r2]
+	.loc 5 400 0
 	ldrh	r3, [r10]
+	strh	r3, [fp, #2]	@ movhi
+	.loc 5 401 0
+	ldr	r3, [sp]
+	.loc 5 403 0
 	ldr	r1, [r8]
 	ldr	r0, [r4, #8]
-	strh	r3, [fp, #2]	@ movhi
+	.loc 5 401 0
+	ldrh	r6, [r3]
+	ldrh	r3, [r10]
 	mla	r6, r7, r6, r3
+.LVL3166:
+	.loc 5 402 0
 	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2874+32
+	.loc 5 403 0
+	ldr	r3, .L2866+32
 	ldrh	r2, [r3]
 	lsls	r2, r2, #2
 	bl	ftl_memcpy
+.LVL3167:
+	.loc 5 404 0
 	movs	r2, #1
 	mov	r0, r4
 	mov	r1, r2
 	bl	FlashEraseBlocks
+.LVL3168:
+	.loc 5 405 0
 	movs	r3, #1
 	mov	r0, r4
 	mov	r2, r3
 	mov	r1, r3
 	bl	FlashProgPages
+.LVL3169:
+	.loc 5 406 0
 	ldr	r3, [r4]
 	adds	r3, r3, #1
-	bne	.L2858
+	bne	.L2850
+	.loc 5 408 0
 	uxth	r0, r6
 	bl	FtlBbmMapBadBlock
-	b	.L2859
-.L2864:
+.LVL3170:
+	b	.L2851
+.LVL3171:
+.L2856:
+	.loc 5 429 0
 	bl	FtlBbmMapBadBlock
-	b	.L2863
-.L2867:
+.LVL3172:
+	b	.L2855
+.LVL3173:
+.L2859:
+	.loc 5 442 0
 	ldrh	r3, [r4]
 	cmp	r3, r6
-	bne	.L2868
+	bne	.L2860
+	.loc 5 444 0
 	strh	r5, [r4]	@ movhi
-	b	.L2866
-.L2868:
+	b	.L2858
+.L2860:
+	.loc 5 448 0
 	strh	r5, [r4, #4]	@ movhi
-.L2869:
-	ldr	r3, .L2874+36
+.L2861:
+	.loc 5 460 0
+	ldr	r3, .L2866+36
+	.loc 5 457 0
 	movs	r5, #0
+.LVL3174:
+	.loc 5 459 0
 	str	r5, [r4, #8]
+	.loc 5 462 0
 	movs	r2, #2
 	movs	r1, #1
+	.loc 5 457 0
 	strh	r5, [r4, #2]	@ movhi
+	.loc 5 460 0
 	ldr	r0, [r3]
 	ldrh	r3, [r4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #4]
+	.loc 5 461 0
 	ldrh	r3, [r4, #4]
 	lsls	r3, r3, #10
 	str	r3, [r0, #40]
+	.loc 5 462 0
 	bl	FlashEraseBlocks
+.LVL3175:
+	.loc 5 464 0
 	ldrh	r0, [r4]
 	bl	FtlBbmMapBadBlock
+.LVL3176:
+	.loc 5 465 0
 	ldrh	r0, [r4, #4]
 	bl	FtlBbmMapBadBlock
+.LVL3177:
+	.loc 5 467 0
 	bl	FtlBbmTblFlush
+.LVL3178:
+	.loc 5 468 0
 	ldr	r3, [r4, #8]
+	.loc 5 471 0
 	ldrh	r2, [r4, #4]
+	.loc 5 472 0
 	strh	r5, [r4, #2]	@ movhi
+	.loc 5 468 0
 	adds	r3, r3, #1
 	str	r3, [r4, #8]
+	.loc 5 470 0
 	ldrh	r3, [r4]
+.LVL3179:
+	.loc 5 471 0
 	strh	r2, [r4]	@ movhi
+	.loc 5 473 0
 	strh	r3, [r4, #4]	@ movhi
+	.loc 5 475 0
 	bl	FtlBbmTblFlush
-.L2855:
+.LVL3180:
+.L2847:
+.LBE557:
+.LBE556:
+	.loc 5 478 0
 	movs	r0, #0
 	add	sp, sp, #8
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2875:
+.L2867:
 	.align	2
-.L2874:
-	.word	.LANCHOR75
+.L2866:
+	.word	.LANCHOR76
 	.word	.LANCHOR199
-	.word	.LANCHOR43
-	.word	.LANCHOR58
-	.word	.LANCHOR73
-	.word	.LANCHOR79
+	.word	.LANCHOR44
+	.word	.LANCHOR59
+	.word	.LANCHOR74
+	.word	.LANCHOR180
 	.word	.LANCHOR185
-	.word	.LANCHOR49
+	.word	.LANCHOR50
 	.word	.LANCHOR120
-	.word	.LANCHOR76
-	.word	.LANCHOR73+28
+	.word	.LANCHOR77
+	.word	.LANCHOR74+28
+	.cfi_endproc
+.LFE324:
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -20171,359 +32783,559 @@ FtlMakeBbt:
 	.fpu softvfp
 	.type	FtlLowFormat, %function
 FtlLowFormat:
-	@ args = 0, pretend = 0, frame = 24
+.LFB301:
+	.loc 4 767 0
+	.cfi_startproc
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2907
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	ldrh	r2, [r3]
-	ldr	r3, .L2907+4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	.cfi_def_cfa_offset 48
+	.cfi_offset 4, -32
+	.cfi_offset 5, -28
+	.cfi_offset 6, -24
+	.cfi_offset 7, -20
+	.cfi_offset 8, -16
+	.cfi_offset 10, -12
+	.cfi_offset 11, -8
+	.cfi_offset 14, -4
+	.loc 4 774 0
+	ldr	r3, .L2899
+	ldr	r4, [r3]
+	cmp	r4, #0
+	bne	.L2870
+	.loc 4 776 0
+	ldr	r5, .L2899+4
+	mov	r1, r4
+	ldr	r3, .L2899+8
+	.loc 4 780 0
+	ldr	r6, .L2899+12
+	.loc 4 776 0
+	ldrh	r2, [r5]
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.LVL3181:
+	.loc 4 777 0
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2899+16
+	.loc 4 778 0
+	ldr	r5, .L2899+20
+	.loc 4 777 0
 	lsls	r2, r2, #2
 	ldr	r0, [r3]
 	bl	ftl_memset
-	ldr	r3, .L2907+8
-	ldr	r3, [r3]
-	cmp	r3, #0
-	bne	.L2878
-	ldr	r6, .L2907+12
-	ldr	r2, .L2907+16
-	ldr	r5, .L2907+20
+.LVL3182:
+	.loc 4 779 0
+	ldr	r3, .L2899+24
+	.loc 4 780 0
 	ldrh	r0, [r6]
-	str	r3, [r2]
-	str	r3, [r5]
+	.loc 4 778 0
+	str	r4, [r5]
+	.loc 4 779 0
+	str	r4, [r3]
+	.loc 4 780 0
 	bl	FtlFreeSysBlkQueueInit
+.LVL3183:
+	.loc 4 781 0
 	bl	FtlLoadBbt
-	cbz	r0, .L2879
+.LVL3184:
+	cbz	r0, .L2871
+	.loc 4 782 0
 	bl	FtlMakeBbt
-.L2879:
-	ldr	r3, .L2907+24
-	ldr	r2, .L2907+28
-	ldr	ip, .L2907+108
-	ldrh	r1, [r3]
-	ldr	r4, [r2]
-	ldr	r2, .L2907+32
-	str	r3, [sp, #12]
-	lsls	r1, r1, #7
-	ldr	r7, [r2]
+.LVL3185:
+.L2871:
+	.loc 4 784 0 discriminator 1
+	ldr	ip, .L2899+80
+	.loc 4 767 0 discriminator 1
 	movs	r2, #0
-.L2880:
+	.loc 4 785 0 discriminator 1
+	ldr	r7, .L2899+28
+	.loc 4 786 0 discriminator 1
+	ldr	r4, .L2899+32
+	ldr	lr, .L2899+112
+.L2872:
+.LVL3186:
+	.loc 4 784 0 discriminator 1
+	ldrh	r1, [ip]
 	uxth	r3, r2
 	adds	r2, r2, #1
-	cmp	r3, r1
-	blt	.L2881
-	ldr	r3, .L2907+36
+.LVL3187:
+	cmp	r3, r1, lsl #7
+	blt	.L2873
+.LVL3188:
+	.loc 4 791 0
+	ldr	r3, .L2899+36
+.LVL3189:
+	.loc 4 790 0
 	movs	r7, #0
-	ldr	fp, .L2907+112
+	.loc 4 791 0
+	ldr	fp, .L2899+116
 	ldrh	r4, [r3]
+.LVL3190:
 	mov	r8, r3
 	mov	r10, fp
-.L2882:
+.LVL3191:
+.L2874:
+	.loc 4 791 0 is_stmt 0 discriminator 1
 	ldrh	r3, [fp]
 	cmp	r3, r4
-	bhi	.L2883
-	ldr	r4, .L2907+40
+	bhi	.L2875
+	.loc 4 794 0 is_stmt 1
+	ldr	r4, .L2899+40
+.LVL3192:
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
-	bgt	.L2884
-.L2888:
+	bgt	.L2876
+.LVL3193:
+.L2880:
+	.loc 4 790 0
 	movs	r7, #0
 	mov	r6, r7
-.L2885:
+.L2877:
+	.loc 4 805 0 discriminator 1
 	ldrh	r3, [r8]
 	uxth	r0, r7
+.LVL3194:
 	adds	r7, r7, #1
 	cmp	r3, r0
-	bhi	.L2889
+	bhi	.L2881
+	.loc 4 807 0
 	ldrh	r2, [r10]
-	ldr	r3, .L2907+44
+	ldr	r3, .L2899+44
+	.loc 4 810 0
 	ldrh	r4, [r4]
-	ldr	r7, .L2907+48
+	ldr	r7, .L2899+48
+	.loc 4 807 0
 	str	r2, [r3]
-	ldr	r3, .L2907+52
+	.loc 4 810 0
+	ldr	r3, .L2899+52
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
-	str	r3, [sp, #16]
+.LVL3195:
+	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2907+56
+.LVL3196:
+	.loc 4 811 0
+	ldr	r1, .L2899+56
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
+	.loc 4 810 0
 	mov	fp, r0
 	str	r0, [r7]
+	.loc 4 811 0
 	strh	r2, [r1]	@ movhi
+	.loc 4 812 0
 	movs	r2, #24
 	muls	r2, r4, r2
-	str	r3, [sp, #4]
-	str	r1, [sp, #8]
+	.loc 4 811 0
+	str	r3, [sp]
+	str	r1, [sp, #4]
+	.loc 4 812 0
 	cmp	r6, r2
-	ble	.L2890
-	ldr	r3, [sp, #16]
+	ble	.L2882
+	.loc 4 813 0
+	ldr	r3, [sp, #8]
 	mov	r1, r4
 	subs	r0, r3, r6
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #8]
+.LVL3197:
+	.loc 4 814 0
+	ldr	r3, [sp, #4]
+	.loc 4 813 0
 	str	r0, [r7]
+	.loc 4 814 0
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
-.L2890:
-	ldr	r3, .L2907+60
+.L2882:
+	.loc 4 817 0
+	ldr	r3, .L2899+60
 	ldr	r3, [r3]
 	cmp	r3, #1
-	bne	.L2891
-	ldr	r2, .L2907+56
+	bne	.L2883
+	.loc 4 818 0
+	ldr	r2, .L2899+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
+	str	r2, [sp, #12]
+	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
+.LVL3198:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2891:
-	ldr	r3, .L2907+64
+.L2883:
+	.loc 4 820 0
+	ldr	r3, .L2899+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L2892
-	ldr	r2, .L2907+56
+	cbz	r3, .L2884
+	.loc 4 821 0
+	ldr	r2, .L2899+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
-	str	r2, [sp, #20]
-	str	r3, [sp, #16]
+	str	r2, [sp, #12]
+	str	r3, [sp, #8]
 	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	ldr	r2, [sp, #20]
+.LVL3199:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #12]
 	uxtah	r0, r3, r0
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
-.L2892:
-	ldr	r3, .L2907+68
+.L2884:
+	.loc 4 823 0
+	ldr	r3, .L2899+68
 	ldrh	r3, [r3]
-	cbz	r3, .L2894
-	ldr	r2, .L2907+56
+	cbz	r3, .L2886
+	.loc 4 824 0
+	ldr	r2, .L2899+56
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
+	.loc 4 825 0
 	mul	r1, r4, r3
 	cmp	r6, r1
-	bge	.L2894
-	ldr	r1, [sp, #4]
+	bge	.L2886
+	.loc 4 827 0
+	ldr	r1, [sp]
 	adds	r3, r3, #32
+	.loc 4 826 0
 	str	fp, [r7]
+	.loc 4 827 0
 	add	r1, r1, r3
 	strh	r1, [r2]	@ movhi
-.L2894:
-	ldr	r3, [sp, #8]
-	ldr	r6, .L2907+72
+.L2886:
+	.loc 4 836 0
+	ldr	r3, [sp, #4]
+	ldr	r6, .L2899+72
+.LVL3200:
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2907+76
+	.loc 4 837 0
+	ldr	r3, .L2899+76
 	ldrh	r3, [r3]
+	.loc 4 836 0
 	str	r4, [r6]
+	.loc 4 837 0
 	muls	r4, r3, r4
-	ldr	r3, [sp, #12]
+	.loc 4 838 0
+	ldr	r3, .L2899+80
 	ldrh	r3, [r3]
+	.loc 4 837 0
 	str	r4, [r7]
-	ldr	r7, .L2907+80
+	.loc 4 857 0
+	ldr	r7, .L2899+84
+	.loc 4 838 0
 	muls	r4, r3, r4
-	ldr	r3, .L2907+84
+	ldr	r3, .L2899+88
 	str	r4, [r3]
+	.loc 4 852 0
 	movw	r4, #65535
+	.loc 4 843 0
 	bl	FtlBbmTblFlush
+.LVL3201:
+	.loc 4 850 0
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2907+116
+	ldr	r10, .L2899+120
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2907+88
+.LVL3202:
+	.loc 4 851 0
+	ldr	r2, .L2899+92
 	movs	r3, #0
+	.loc 4 857 0
 	strh	r3, [r7, #2]	@ movhi
+	.loc 4 861 0
 	movs	r1, #255
+	.loc 4 858 0
 	strb	r3, [r7, #6]
+	.loc 4 851 0
 	str	r3, [r2]
-	ldr	r2, .L2907+92
+	.loc 4 852 0
+	ldr	r2, .L2899+96
+	.loc 4 859 0
 	strh	r3, [r7]	@ movhi
+	.loc 4 853 0
 	strh	r3, [r2, #2]	@ movhi
+	.loc 4 854 0
 	strb	r3, [r2, #6]
+	.loc 4 855 0
 	strb	r3, [r2, #8]
+	.loc 4 860 0
 	movs	r3, #1
+	.loc 4 852 0
 	strh	r4, [r2]	@ movhi
+	.loc 4 861 0
 	ldrh	r2, [r8]
 	mov	r8, r10
+	.loc 4 860 0
 	strb	r3, [r7, #8]
+	.loc 4 870 0
 	mov	r10, r7
-	ldr	r3, .L2907+96
+	.loc 4 861 0
+	ldr	r3, .L2899+100
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
-.L2896:
+.LVL3203:
+.L2888:
+	.loc 4 870 0
 	mov	r0, r10
 	bl	make_superblock
+.LVL3204:
+	.loc 4 871 0
 	ldrb	r3, [r7, #7]	@ zero_extendqisi2
 	ldrh	r2, [r7]
 	cmp	r3, #0
-	bne	.L2897
+	bne	.L2889
+	.loc 4 874 0
 	ldr	r3, [r8]
 	strh	r4, [r3, r2, lsl #1]	@ movhi
+	.loc 4 875 0
 	ldrh	r3, [r7]
 	adds	r3, r3, #1
 	strh	r3, [r7]	@ movhi
-	b	.L2896
-.L2881:
-	mvns	r0, r3
-	orr	r0, r3, r0, lsl #16
-	str	r0, [r4, r3, lsl #2]
-	str	ip, [r7, r3, lsl #2]
-	b	.L2880
-.L2883:
+	.loc 4 876 0
+	b	.L2888
+.LVL3205:
+.L2873:
+	.loc 4 785 0 discriminator 3
+	ldr	r0, [r7]
+	mvns	r1, r3
+	orr	r1, r3, r1, lsl #16
+	str	r1, [r0, r3, lsl #2]
+	.loc 4 786 0 discriminator 3
+	ldr	r1, [r4]
+	str	lr, [r1, r3, lsl #2]
+.LVL3206:
+	b	.L2872
+.LVL3207:
+.L2875:
+	.loc 4 792 0 discriminator 3
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
+.LVL3208:
+	.loc 4 791 0 discriminator 3
 	adds	r4, r4, #1
+.LVL3209:
+	.loc 4 792 0 discriminator 3
 	add	r7, r7, r0
+.LVL3210:
 	uxth	r7, r7
+.LVL3211:
+	.loc 4 791 0 discriminator 3
 	uxth	r4, r4
-	b	.L2882
-.L2884:
+.LVL3212:
+	b	.L2874
+.LVL3213:
+.L2876:
+	.loc 4 796 0
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2907+100
+.LVL3214:
+	ldr	r3, .L2899+104
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
+.LVL3215:
+	.loc 4 797 0
 	ldrh	r0, [r6]
 	bl	FtlFreeSysBlkQueueInit
+.LVL3216:
+	.loc 4 799 0
 	ldrh	r6, [r8]
-.L2886:
+.LVL3217:
+.L2878:
+	.loc 4 799 0 is_stmt 0 discriminator 1
 	ldrh	r3, [r10]
 	cmp	r3, r6
-	bls	.L2888
+	bls	.L2880
+	.loc 4 800 0 is_stmt 1 discriminator 3
 	mov	r0, r6
 	movs	r1, #1
+	.loc 4 799 0 discriminator 3
 	adds	r6, r6, #1
+.LVL3218:
+	.loc 4 800 0 discriminator 3
 	bl	FtlLowFormatEraseBlock
+.LVL3219:
+	.loc 4 799 0 discriminator 3
 	uxth	r6, r6
-	b	.L2886
-.L2889:
+.LVL3220:
+	b	.L2878
+.LVL3221:
+.L2881:
+	.loc 4 806 0 discriminator 3
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
+.LVL3222:
 	add	r6, r6, r0
+.LVL3223:
 	uxth	r6, r6
-	b	.L2885
-.L2897:
+.LVL3224:
+	b	.L2877
+.LVL3225:
+.L2889:
+	.loc 4 878 0
 	ldr	r3, [r5]
+	.loc 4 879 0
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2907+104
+	.loc 4 881 0
+	ldr	r4, .L2899+108
+	.loc 4 878 0
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
+	.loc 4 879 0
 	ldr	r3, [r8]
+	.loc 4 886 0
 	mov	r10, r4
+	.loc 4 879 0
 	strh	r1, [r3, r2, lsl #1]	@ movhi
+	.loc 4 881 0
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
+	.loc 4 882 0
 	strb	r3, [r4, #6]
+	.loc 4 883 0
 	ldrh	r3, [r7]
+	.loc 4 890 0
 	movw	r7, #65535
+	.loc 4 883 0
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
+	.loc 4 884 0
 	movs	r3, #1
 	strb	r3, [r4, #8]
-.L2898:
+.L2890:
+	.loc 4 886 0
 	mov	r0, r10
 	bl	make_superblock
+.LVL3226:
+	.loc 4 887 0
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
 	cmp	r3, #0
-	bne	.L2899
+	bne	.L2891
+	.loc 4 890 0
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
+	.loc 4 891 0
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
-	b	.L2898
-.L2908:
+	.loc 4 892 0
+	b	.L2890
+.L2900:
 	.align	2
-.L2907:
-	.word	.LANCHOR65
+.L2899:
+	.word	.LANCHOR76
+	.word	.LANCHOR66
 	.word	.LANCHOR192
-	.word	.LANCHOR75
-	.word	.LANCHOR37
-	.word	.LANCHOR158
+	.word	.LANCHOR38
+	.word	.LANCHOR128
+	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR54
 	.word	.LANCHOR183
 	.word	.LANCHOR184
-	.word	.LANCHOR38
-	.word	.LANCHOR36
+	.word	.LANCHOR39
+	.word	.LANCHOR37
+	.word	.LANCHOR73
 	.word	.LANCHOR72
-	.word	.LANCHOR71
-	.word	.LANCHOR40
+	.word	.LANCHOR41
 	.word	.LANCHOR227
-	.word	.LANCHOR101
+	.word	.LANCHOR28
 	.word	.LANCHOR8
-	.word	.LANCHOR47
+	.word	.LANCHOR48
 	.word	.LANCHOR226
-	.word	.LANCHOR51
-	.word	.LANCHOR90
-	.word	.LANCHOR67
-	.word	.LANCHOR99
+	.word	.LANCHOR52
+	.word	.LANCHOR55
+	.word	.LANCHOR91
+	.word	.LANCHOR68
+	.word	.LANCHOR100
 	.word	.LANCHOR201
 	.word	.LANCHOR0
-	.word	.LANCHOR64
-	.word	.LANCHOR91
+	.word	.LANCHOR65
+	.word	.LANCHOR92
 	.word	168778952
-	.word	.LANCHOR39
-	.word	.LANCHOR82
-.L2899:
+	.word	.LANCHOR40
+	.word	.LANCHOR83
+.L2891:
+	.loc 4 894 0
 	ldr	r3, [r5]
+	.loc 4 895 0
 	ldrh	r1, [r4, #4]
+	.loc 4 894 0
 	str	r3, [r4, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
+	.loc 4 896 0
 	movw	r4, #65535
+	.loc 4 895 0
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2909
+	.loc 4 896 0
+	ldr	r3, .L2901
 	strh	r4, [r3]	@ movhi
+	.loc 4 899 0
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2909+4
+.LVL3227:
+	ldr	r3, .L2901+4
+	.loc 4 900 0
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
+	.loc 4 902 0
 	ldr	r2, [r6]
+	.loc 4 899 0
 	strh	r0, [r3]	@ movhi
+	.loc 4 901 0
 	strh	r4, [r3, #4]	@ movhi
+	.loc 4 902 0
 	strh	r2, [r3, #6]	@ movhi
+	.loc 4 903 0
 	ldr	r2, [r5]
 	str	r2, [r3, #8]
 	adds	r2, r2, #1
 	str	r2, [r5]
+	.loc 4 904 0
 	bl	FtlVpcTblFlush
+.LVL3228:
+	.loc 4 905 0
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2878
-	ldr	r3, .L2909+8
+.LVL3229:
+	cbnz	r0, .L2870
+	.loc 4 906 0
+	ldr	r3, .L2901+8
 	movs	r2, #1
 	str	r2, [r3]
-.L2878:
+.L2870:
+	.loc 4 908 0
 	movs	r0, #0
-	add	sp, sp, #24
+	add	sp, sp, #16
+	.cfi_def_cfa_offset 32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2910:
+.L2902:
 	.align	2
-.L2909:
-	.word	.LANCHOR92
+.L2901:
+	.word	.LANCHOR93
 	.word	.LANCHOR206
 	.word	.LANCHOR223
+	.cfi_endproc
+.LFE301:
 	.size	FtlLowFormat, .-FtlLowFormat
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -20542,7 +33354,6 @@ FtlLowFormat:
 	.global	random_seed
 	.global	gSlcNandParaInfo
 	.global	gNandParaInfo
-	.global	NandFlashParaTbl
 	.global	g_page_map_check_enable
 	.global	g_power_lost_ecc_error_blk
 	.global	g_power_lost_recovery_flag
@@ -20749,7 +33560,7 @@ FtlLowFormat:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -20770,7 +33581,7 @@ DieCsIndex:
 	.space	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -20789,7 +33600,7 @@ FtlMallocBuffer:
 	.space	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -20810,42 +33621,42 @@ c_ftl_nand_bbm_buf_size:
 	.space	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
@@ -20859,161 +33670,161 @@ c_ftl_nand_data_op_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.space	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.space	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.space	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
 	.align	2
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.space	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.space	4
 	.section	.bss.c_ftl_nand_type,"aw",%nobits
 	.align	1
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.space	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.space	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
@@ -21027,7 +33838,7 @@ c_gc_page_buf_num:
 	.space	4
 	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
 	.align	1
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
@@ -21041,7 +33852,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
@@ -21055,7 +33866,7 @@ gBlockPageAlignSize:
 	.space	4
 	.section	.bss.gBootDdrMode,"aw",%nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -21080,14 +33891,14 @@ gFlashOnfiModeEn:
 	.space	1
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 4
 gFlashPageBuffer0:
 	.space	4
 	.section	.bss.gFlashPageBuffer1,"aw",%nobits
 	.align	2
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 4
 gFlashPageBuffer1:
@@ -21125,7 +33936,7 @@ gFlashSlcMode:
 gFlashSpareBuffer:
 	.space	4
 	.section	.bss.gFlashToggleModeEn,"aw",%nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	gFlashToggleModeEn, %object
 	.size	gFlashToggleModeEn, 1
 gFlashToggleModeEn:
@@ -21139,14 +33950,14 @@ gL2pMapInfo:
 	.space	44
 	.section	.bss.gMasterInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 32
 gMasterInfo:
 	.space	32
 	.section	.bss.gMasterTempBuf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 4
 gMasterTempBuf:
@@ -21171,27 +33982,27 @@ gMultiPageReadEn:
 gNandChipMap:
 	.space	32
 	.section	.bss.gNandFlashEccBits,"aw",%nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	gNandFlashEccBits, %object
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.space	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.space	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.space	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -21214,14 +34025,14 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.space	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.space	1
 	.section	.bss.gNandIDataBuf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
@@ -21259,21 +34070,21 @@ gNandRandomizer:
 	.space	1
 	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	gNandcDumpWriteEn, %object
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.space	4
 	.section	.bss.gNandcEccBits,"aw",%nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	gNandcEccBits, %object
 	.size	gNandcEccBits, 4
 gNandcEccBits:
 	.space	4
 	.section	.bss.gNandcVer,"aw",%nobits
 	.align	2
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	gNandcVer, %object
 	.size	gNandcVer, 4
 gNandcVer:
@@ -21286,7 +34097,7 @@ gReadRetryInfo:
 	.space	852
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -21320,14 +34131,14 @@ gVendorBlkInfo:
 	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -21341,7 +34152,7 @@ g_LowFormat:
 	.space	4
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -21355,49 +34166,49 @@ g_MaxLbn:
 	.space	4
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.space	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.space	4
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.space	4
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -21418,14 +34229,14 @@ g_ect_tbl_power_up_flush:
 	.space	2
 	.section	.bss.g_flash_read_only_en,"aw",%nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.space	4
 	.section	.bss.g_free_slc_blk_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
@@ -21460,7 +34271,7 @@ g_gc_bad_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
@@ -21488,28 +34299,28 @@ g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
@@ -21537,14 +34348,14 @@ g_gc_num_req:
 	.space	4
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -21557,7 +34368,7 @@ g_gc_refresh_block_temp_tbl:
 	.space	34
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
@@ -21571,35 +34382,35 @@ g_gc_superblock:
 	.space	48
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.space	48
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.space	4
 	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
 	.space	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
@@ -21611,49 +34422,49 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.g_page_map_check_enable,"aw",%nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
@@ -21714,14 +34525,14 @@ g_slc2KBNand:
 	.space	1
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -21742,28 +34553,28 @@ g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.space	4
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -21777,14 +34588,14 @@ g_totle_map_block:
 	.space	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
@@ -21798,7 +34609,7 @@ g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
@@ -21812,21 +34623,21 @@ g_totle_swl_count:
 	.space	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.space	2
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
@@ -21854,7 +34665,7 @@ gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gpFlashSaveInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 4
 gpFlashSaveInfo:
@@ -21881,7 +34692,7 @@ gpNandc1:
 	.space	4
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
@@ -21923,35 +34734,35 @@ p_blk_mode_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
 	.space	4
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -21972,7 +34783,7 @@ p_gc_data_buf:
 	.space	4
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
@@ -22014,7 +34825,7 @@ p_l2p_map_buf:
 	.space	4
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -22055,7 +34866,7 @@ p_map_region_ppn_check_table:
 p_map_region_ppn_table:
 	.space	4
 	.section	.bss.p_plane_order_table,"aw",%nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
@@ -22069,7 +34880,7 @@ p_swl_mul_table:
 	.space	4
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
@@ -22096,14 +34907,14 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
@@ -22144,7 +34955,7 @@ read_retry_cur_offset:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
@@ -22158,21 +34969,21 @@ req_gc:
 	.space	4
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
@@ -22199,9 +35010,9 @@ FtlMallocOffset:
 	.word	64
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2336
+	.size	NandFlashParaTbl, 2368
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -22699,6 +35510,32 @@ NandFlashParaTbl:
 	.space	4
 	.byte	5
 	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1096
+	.short	1503
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
 	.byte	100
 	.byte	68
 	.byte	50
@@ -24102,7 +36939,7 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.section	.data.NandOptPara,"aw",%progbits
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -24430,7 +37267,7 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.gNandParaInfo,"aw",%progbits
 	.align	1
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	gNandParaInfo, %object
 	.size	gNandParaInfo, 32
 gNandParaInfo:
@@ -24662,328 +37499,56714 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
-.LC7:
+.LC10:
 	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC8:
+.LC11:
 	.ascii	"sync para %d\012\000"
-.LC9:
+.LC12:
 	.ascii	"TOG mode Read error %x %x\012\000"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
 .LC1:
 	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
 	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
-.LC18:
+.LC21:
 	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
-.LC19:
+.LC22:
 	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
-.LC24:
+.LC27:
 	.ascii	"prog error: = %x\012\000"
-.LC25:
+.LC28:
 	.ascii	"prog read error: = %x\012\000"
-.LC26:
+.LC29:
 	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC27:
+.LC30:
 	.ascii	"prog read d error: = %x %x %x\012\000"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
-.LC55:
+.LC58:
 	.ascii	"BBT:\000"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
-.LC12:
+.LC15:
 	.ascii	"ECC:%d\012\000"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
-.LC10:
+.LC13:
 	.ascii	"read retry status %x %x %x\012\000"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
-.LC23:
+.LC26:
 	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
-.LC20:
+.LC23:
 	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
-.LC21:
+.LC24:
 	.ascii	"data:\000"
-.LC22:
+.LC25:
 	.ascii	"spare:\000"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
 .LC2:
 	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
 	.ascii	"\000"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
-.LC28:
+.LC31:
 	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC29:
+.LC32:
 	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC30:
+.LC33:
 	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",%progbits,1
+.LC4:
+	.ascii	"FtlFreeSysBlkQueueOut free count = %d\012\000"
+.LC5:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+	.ascii	"\000"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
-.LC47:
+.LC50:
 	.ascii	"GC des block %x done\012\000"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
-.LC46:
+.LC49:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
-.LC48:
-	.ascii	"FTL version: 5.0.47 20180208\000"
-.LC49:
+.LC51:
+	.ascii	"FTL version: 5.0.48 20180408\000"
+.LC52:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
-.LC50:
+.LC53:
 	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
-.LC40:
+.LC43:
 	.ascii	"no ect\000"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
-.LC42:
+.LC45:
 	.ascii	"page map lost %x %x %x %x\012\000"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
-.LC35:
+.LC38:
 	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC36:
+.LC39:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
-.LC38:
+.LC41:
 	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
-.LC43:
+.LC46:
 	.ascii	"RSB refresh addr %x\012\000"
-.LC44:
+.LC47:
 	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC45:
+.LC48:
 	.ascii	"g_recovery_ppa %x ver %x\012 \000"
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
-.LC39:
+.LC42:
 	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
-.LC32:
+.LC35:
 	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
-.LC41:
+.LC44:
 	.ascii	"slc mode\000"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
-.LC16:
+.LC19:
 	.ascii	"otp error! %d\000"
-.LC17:
+.LC20:
 	.ascii	"rr\000"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
-.LC4:
+.LC6:
 	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-.LC5:
+.LC7:
 	.ascii	"!!!!! FTL sys Error !!!!!\000"
-.LC6:
+.LC8:
 	.ascii	"%s\012\000"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
-.LC11:
+.LC14:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10401,"a",%progbits
+	.section	.rodata.__func__.10397,"a",%progbits
 	.set	.LANCHOR240,. + 0
-	.type	__func__.10401, %object
-	.size	__func__.10401, 8
-__func__.10401:
+	.type	__func__.10397, %object
+	.size	__func__.10397, 8
+__func__.10397:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10461,"a",%progbits
+	.section	.rodata.__func__.10457,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10461, %object
-	.size	__func__.10461, 13
-__func__.10461:
+	.type	__func__.10457, %object
+	.size	__func__.10457, 13
+__func__.10457:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10487,"a",%progbits
+	.section	.rodata.__func__.10483,"a",%progbits
 	.set	.LANCHOR242,. + 0
-	.type	__func__.10487, %object
-	.size	__func__.10487, 10
-__func__.10487:
+	.type	__func__.10483, %object
+	.size	__func__.10483, 10
+__func__.10483:
 	.ascii	"ftl_write\000"
-	.section	.rodata.__func__.10550,"a",%progbits
+	.section	.rodata.__func__.10546,"a",%progbits
 	.set	.LANCHOR121,. + 0
-	.type	__func__.10550, %object
-	.size	__func__.10550, 14
-__func__.10550:
+	.type	__func__.10546, %object
+	.size	__func__.10546, 14
+__func__.10546:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10596,"a",%progbits
+	.section	.rodata.__func__.10592,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10596, %object
-	.size	__func__.10596, 11
-__func__.10596:
+	.type	__func__.10592, %object
+	.size	__func__.10592, 11
+__func__.10592:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10705,"a",%progbits
-	.set	.LANCHOR88,. + 0
-	.type	__func__.10705, %object
-	.size	__func__.10705, 17
-__func__.10705:
+	.section	.rodata.__func__.10694,"a",%progbits
+	.set	.LANCHOR89,. + 0
+	.type	__func__.10694, %object
+	.size	__func__.10694, 17
+__func__.10694:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10709,"a",%progbits
-	.set	.LANCHOR85,. + 0
-	.type	__func__.10709, %object
-	.size	__func__.10709, 17
-__func__.10709:
+	.section	.rodata.__func__.10698,"a",%progbits
+	.set	.LANCHOR86,. + 0
+	.type	__func__.10698, %object
+	.size	__func__.10698, 17
+__func__.10698:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10739,"a",%progbits
-	.set	.LANCHOR89,. + 0
-	.type	__func__.10739, %object
-	.size	__func__.10739, 17
-__func__.10739:
+	.section	.rodata.__func__.10728,"a",%progbits
+	.set	.LANCHOR90,. + 0
+	.type	__func__.10728, %object
+	.size	__func__.10728, 17
+__func__.10728:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10769,"a",%progbits
-	.set	.LANCHOR93,. + 0
-	.type	__func__.10769, %object
-	.size	__func__.10769, 22
-__func__.10769:
-	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10776,"a",%progbits
-	.set	.LANCHOR212,. + 0
-	.type	__func__.10776, %object
-	.size	__func__.10776, 16
-__func__.10776:
-	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.10806,"a",%progbits
+	.section	.rodata.__func__.10758,"a",%progbits
 	.set	.LANCHOR94,. + 0
-	.type	__func__.10806, %object
-	.size	__func__.10806, 26
-__func__.10806:
+	.type	__func__.10758, %object
+	.size	__func__.10758, 22
+__func__.10758:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.10765,"a",%progbits
+	.set	.LANCHOR213,. + 0
+	.type	__func__.10765, %object
+	.size	__func__.10765, 20
+__func__.10765:
+	.ascii	"ftl_load_l2p_region\000"
+	.section	.rodata.__func__.10796,"a",%progbits
+	.set	.LANCHOR95,. + 0
+	.type	__func__.10796, %object
+	.size	__func__.10796, 26
+__func__.10796:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10820,"a",%progbits
+	.section	.rodata.__func__.10810,"a",%progbits
 	.set	.LANCHOR209,. + 0
-	.type	__func__.10820, %object
-	.size	__func__.10820, 15
-__func__.10820:
+	.type	__func__.10810, %object
+	.size	__func__.10810, 15
+__func__.10810:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10833,"a",%progbits
+	.section	.rodata.__func__.10823,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.10833, %object
-	.size	__func__.10833, 31
-__func__.10833:
+	.type	__func__.10823, %object
+	.size	__func__.10823, 31
+__func__.10823:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10846,"a",%progbits
+	.section	.rodata.__func__.10836,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10846, %object
-	.size	__func__.10846, 16
-__func__.10846:
+	.type	__func__.10836, %object
+	.size	__func__.10836, 16
+__func__.10836:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10866,"a",%progbits
-	.set	.LANCHOR97,. + 0
-	.type	__func__.10866, %object
-	.size	__func__.10866, 22
-__func__.10866:
+	.section	.rodata.__func__.10856,"a",%progbits
+	.set	.LANCHOR98,. + 0
+	.type	__func__.10856, %object
+	.size	__func__.10856, 22
+__func__.10856:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10882,"a",%progbits
-	.set	.LANCHOR213,. + 0
-	.type	__func__.10882, %object
-	.size	__func__.10882, 9
-__func__.10882:
+	.section	.rodata.__func__.10872,"a",%progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10872, %object
+	.size	__func__.10872, 9
+__func__.10872:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10944,"a",%progbits
+	.section	.rodata.__func__.10934,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10944, %object
-	.size	__func__.10944, 15
-__func__.10944:
+	.type	__func__.10934, %object
+	.size	__func__.10934, 15
+__func__.10934:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10963,"a",%progbits
+	.section	.rodata.__func__.10953,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.10963, %object
-	.size	__func__.10963, 14
-__func__.10963:
+	.type	__func__.10953, %object
+	.size	__func__.10953, 14
+__func__.10953:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11017,"a",%progbits
+	.section	.rodata.__func__.11007,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11017, %object
-	.size	__func__.11017, 15
-__func__.11017:
+	.type	__func__.11007, %object
+	.size	__func__.11007, 15
+__func__.11007:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11087,"a",%progbits
+	.section	.rodata.__func__.11077,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.11087, %object
-	.size	__func__.11087, 16
-__func__.11087:
+	.type	__func__.11077, %object
+	.size	__func__.11077, 16
+__func__.11077:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11120,"a",%progbits
+	.section	.rodata.__func__.11110,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.11120, %object
-	.size	__func__.11120, 22
-__func__.11120:
+	.type	__func__.11110, %object
+	.size	__func__.11110, 22
+__func__.11110:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11174,"a",%progbits
-	.set	.LANCHOR100,. + 0
-	.type	__func__.11174, %object
-	.size	__func__.11174, 16
-__func__.11174:
+	.section	.rodata.__func__.11164,"a",%progbits
+	.set	.LANCHOR101,. + 0
+	.type	__func__.11164, %object
+	.size	__func__.11164, 16
+__func__.11164:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11194,"a",%progbits
-	.set	.LANCHOR138,. + 0
-	.type	__func__.11194, %object
-	.size	__func__.11194, 18
-__func__.11194:
+	.section	.rodata.__func__.11184,"a",%progbits
+	.set	.LANCHOR137,. + 0
+	.type	__func__.11184, %object
+	.size	__func__.11184, 18
+__func__.11184:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11271,"a",%progbits
+	.section	.rodata.__func__.11261,"a",%progbits
 	.set	.LANCHOR200,. + 0
-	.type	__func__.11271, %object
-	.size	__func__.11271, 25
-__func__.11271:
+	.type	__func__.11261, %object
+	.size	__func__.11261, 25
+__func__.11261:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11285,"a",%progbits
+	.section	.rodata.__func__.11275,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11285, %object
-	.size	__func__.11285, 29
-__func__.11285:
+	.type	__func__.11275, %object
+	.size	__func__.11275, 29
+__func__.11275:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11291,"a",%progbits
+	.section	.rodata.__func__.11281,"a",%progbits
 	.set	.LANCHOR205,. + 0
-	.type	__func__.11291, %object
-	.size	__func__.11291, 19
-__func__.11291:
+	.type	__func__.11281, %object
+	.size	__func__.11281, 19
+__func__.11281:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11302,"a",%progbits
+	.section	.rodata.__func__.11292,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11302, %object
-	.size	__func__.11302, 16
-__func__.11302:
+	.type	__func__.11292, %object
+	.size	__func__.11292, 16
+__func__.11292:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11307,"a",%progbits
+	.section	.rodata.__func__.11297,"a",%progbits
 	.set	.LANCHOR204,. + 0
-	.type	__func__.11307, %object
-	.size	__func__.11307, 20
-__func__.11307:
+	.type	__func__.11297, %object
+	.size	__func__.11297, 20
+__func__.11297:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11375,"a",%progbits
+	.section	.rodata.__func__.11365,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11375, %object
-	.size	__func__.11375, 19
-__func__.11375:
+	.type	__func__.11365, %object
+	.size	__func__.11365, 19
+__func__.11365:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11469,"a",%progbits
+	.section	.rodata.__func__.11459,"a",%progbits
 	.set	.LANCHOR238,. + 0
-	.type	__func__.11469, %object
-	.size	__func__.11469, 23
-__func__.11469:
+	.type	__func__.11459, %object
+	.size	__func__.11459, 23
+__func__.11459:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
-.LC31:
+.LC34:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
-.LC52:
+.LC55:
 	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC53:
+.LC56:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC9:
+	.ascii	"FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
-.LC33:
+.LC36:
 	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC34:
+.LC37:
 	.ascii	"page map lost: %x %x\012\000"
 	.section	.rodata.ftl_write.str1.1,"aMS",%progbits,1
-.LC54:
+.LC57:
 	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
-.LC37:
+	.section	.rodata.log2phys.str1.1,"aMS",%progbits,1
+.LC40:
 	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",%progbits,1
 .LC3:
 	.ascii	"remove_from_free_sys_Queue %x\012\000"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
-.LC51:
+.LC54:
 	.ascii	"FtlInit %x\012\000"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
-.LC13:
+.LC16:
 	.ascii	"%s 0x%x:\000"
-.LC14:
+.LC17:
 	.ascii	"%x \000"
-.LC15:
+.LC18:
 	.ascii	"\000"
+	.text
+.Letext0:
+	.file 9 "drivers/rknand/rkftl/ftl_typedef.h"
+	.file 10 "drivers/rknand/rkftl/flash_com.h"
+	.file 11 "drivers/rknand/rkftl/flash.h"
+	.file 12 "drivers/rknand/rkftl/nandc.h"
+	.file 13 "include/common.h"
+	.file 14 "include/errno.h"
+	.file 15 "./arch/arm/include/asm/types.h"
+	.file 16 "./arch/arm/include/asm/posix_types.h"
+	.file 17 "include/linux/types.h"
+	.file 18 "include/linux/string.h"
+	.file 19 "include/efi.h"
+	.file 20 "include/ide.h"
+	.file 21 "include/linux/list.h"
+	.file 22 "include/part.h"
+	.file 23 "include/flash.h"
+	.file 24 "include/lmb.h"
+	.file 25 "include/asm-generic/u-boot.h"
+	.file 26 "./arch/arm/include/asm/u-boot-arm.h"
+	.file 27 "include/../scripts/dtc/libfdt/fdt.h"
+	.file 28 "include/libfdt_env.h"
+	.file 29 "include/image.h"
+	.file 30 "include/dm/uclass-id.h"
+	.file 31 "include/net.h"
+	.file 32 "drivers/rknand/rkftl/FtlStruct.h"
+	.file 33 "drivers/rknand/rkftl/FtlGlobal.h"
+	.file 34 "drivers/rknand/rkftl/FtlInc.h"
+	.file 35 "include/malloc.h"
+	.file 36 "include/linux/rbtree.h"
+	.file 37 "include/mtd/mtd-abi.h"
+	.file 38 "include/linux/mtd/mtd.h"
+	.file 39 "include/../drivers/mtd/ubi/ubi-media.h"
+	.file 40 "include/../drivers/mtd/ubi/ubi.h"
+	.file 41 "include/ubi_uboot.h"
+	.file 42 "include/stdio.h"
+	.file 43 "include/linux/delay.h"
+	.file 44 "include/log.h"
+	.section	.debug_info,"",%progbits
+.Ldebug_info0:
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+	.byte	0xb
+	.byte	0x86
+	.4byte	0x3c9
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF26
+	.byte	0xb
+	.byte	0x87
+	.4byte	0x3a
+	.byte	0x7
+	.uleb128 0xa
+	.4byte	.LASF57
+	.byte	0xb
+	.byte	0x89
+	.4byte	0x3a
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF58
+	.byte	0xb
+	.byte	0x8a
+	.4byte	0x3a
+	.byte	0x9
+	.uleb128 0xa
+	.4byte	.LASF59
+	.byte	0xb
+	.byte	0x8b
+	.4byte	0x57
+	.byte	0xa
+	.uleb128 0xa
+	.4byte	.LASF60
+	.byte	0xb
+	.byte	0x8d
+	.4byte	0x3a
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF61
+	.byte	0xb
+	.byte	0x8e
+	.4byte	0x3a
+	.byte	0xd
+	.uleb128 0xa
+	.4byte	.LASF62
+	.byte	0xb
+	.byte	0x8f
+	.4byte	0x57
+	.byte	0xe
+	.uleb128 0xa
+	.4byte	.LASF63
+	.byte	0xb
+	.byte	0x91
+	.4byte	0x57
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF64
+	.byte	0xb
+	.byte	0x92
+	.4byte	0x3a
+	.byte	0x12
+	.uleb128 0xa
+	.4byte	.LASF65
+	.byte	0xb
+	.byte	0x93
+	.4byte	0x3a
+	.byte	0x13
+	.uleb128 0xa
+	.4byte	.LASF66
+	.byte	0xb
+	.byte	0x95
+	.4byte	0x3a
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF67
+	.byte	0xb
+	.byte	0x96
+	.4byte	0x3a
+	.byte	0x15
+	.uleb128 0xa
+	.4byte	.LASF68
+	.byte	0xb
+	.byte	0x97
+	.4byte	0x3a
+	.byte	0x16
+	.uleb128 0xa
+	.4byte	.LASF69
+	.byte	0xb
+	.byte	0x98
+	.4byte	0x3a
+	.byte	0x17
+	.uleb128 0xa
+	.4byte	.LASF70
+	.byte	0xb
+	.byte	0x9a
+	.4byte	0x3a
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF71
+	.byte	0xb
+	.byte	0x9b
+	.4byte	0x3a
+	.byte	0x19
+	.uleb128 0xa
+	.4byte	.LASF72
+	.byte	0xb
+	.byte	0x9c
+	.4byte	0x3a
+	.byte	0x1a
+	.uleb128 0xa
+	.4byte	.LASF73
+	.byte	0xb
+	.byte	0x9d
+	.4byte	0x3d9
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x3d9
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x5
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x3e9
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x4
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF74
+	.byte	0xb
+	.byte	0x9e
+	.4byte	0x2cc
+	.uleb128 0xe
+	.2byte	0x354
+	.byte	0xb
+	.byte	0xa2
+	.4byte	0x46c
+	.uleb128 0xa
+	.4byte	.LASF75
+	.byte	0xb
+	.byte	0xa4
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF76
+	.byte	0xb
+	.byte	0xa5
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF77
+	.byte	0xb
+	.byte	0xa6
+	.4byte	0x3a
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xa7
+	.4byte	0x3a
+	.byte	0x3
+	.uleb128 0xa
+	.4byte	.LASF78
+	.byte	0xb
+	.byte	0xa9
+	.4byte	0x46c
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF79
+	.byte	0xb
+	.byte	0xaa
+	.4byte	0x46c
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF80
+	.byte	0xb
+	.byte	0xac
+	.4byte	0x47c
+	.byte	0x14
+	.uleb128 0xf
+	.4byte	.LASF81
+	.byte	0xb
+	.byte	0xad
+	.4byte	0x498
+	.2byte	0x214
+	.uleb128 0xf
+	.4byte	.LASF51
+	.byte	0xb
+	.byte	0xaf
+	.4byte	0x4ae
+	.2byte	0x254
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x47c
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x498
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x4ae
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x4be
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xff
+	.byte	0
+	.uleb128 0xe
+	.2byte	0x29c
+	.byte	0xb
+	.byte	0xb2
+	.4byte	0x51c
+	.uleb128 0xa
+	.4byte	.LASF75
+	.byte	0xb
+	.byte	0xb4
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF76
+	.byte	0xb
+	.byte	0xb5
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF77
+	.byte	0xb
+	.byte	0xb6
+	.4byte	0x3a
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xb7
+	.4byte	0x3a
+	.byte	0x3
+	.uleb128 0xa
+	.4byte	.LASF78
+	.byte	0xb
+	.byte	0xb9
+	.4byte	0x51c
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF79
+	.byte	0xb
+	.byte	0xba
+	.4byte	0x46c
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF80
+	.byte	0xb
+	.byte	0xbc
+	.4byte	0x52c
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x52c
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x542
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x10
+	.byte	0x84
+	.byte	0xb
+	.byte	0xbf
+	.4byte	0x587
+	.uleb128 0xa
+	.4byte	.LASF75
+	.byte	0xb
+	.byte	0xc1
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF76
+	.byte	0xb
+	.byte	0xc2
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF77
+	.byte	0xb
+	.byte	0xc3
+	.4byte	0x3a
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xc4
+	.4byte	0x3a
+	.byte	0x3
+	.uleb128 0xa
+	.4byte	.LASF80
+	.byte	0xb
+	.byte	0xc6
+	.4byte	0x587
+	.byte	0x4
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x597
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x10
+	.byte	0x84
+	.byte	0xb
+	.byte	0xc9
+	.4byte	0x5dc
+	.uleb128 0xa
+	.4byte	.LASF75
+	.byte	0xb
+	.byte	0xcb
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF76
+	.byte	0xb
+	.byte	0xcc
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF77
+	.byte	0xb
+	.byte	0xcd
+	.4byte	0x3a
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xce
+	.4byte	0x3a
+	.byte	0x3
+	.uleb128 0xa
+	.4byte	.LASF80
+	.byte	0xb
+	.byte	0xcf
+	.4byte	0x587
+	.byte	0x4
+	.byte	0
+	.uleb128 0x11
+	.4byte	.LASF173
+	.2byte	0x354
+	.byte	0xb
+	.byte	0xa0
+	.4byte	0x616
+	.uleb128 0x12
+	.4byte	.LASF82
+	.byte	0xb
+	.byte	0xb0
+	.4byte	0x3f4
+	.uleb128 0x12
+	.4byte	.LASF83
+	.byte	0xb
+	.byte	0xbd
+	.4byte	0x4be
+	.uleb128 0x12
+	.4byte	.LASF84
+	.byte	0xb
+	.byte	0xc7
+	.4byte	0x542
+	.uleb128 0x12
+	.4byte	.LASF85
+	.byte	0xb
+	.byte	0xd0
+	.4byte	0x597
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF86
+	.byte	0xb
+	.byte	0xd1
+	.4byte	0x5dc
+	.uleb128 0x9
+	.4byte	.LASF87
+	.byte	0x10
+	.byte	0xb
+	.byte	0xd3
+	.4byte	0x676
+	.uleb128 0xa
+	.4byte	.LASF88
+	.byte	0xb
+	.byte	0xd5
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF89
+	.byte	0xb
+	.byte	0xd6
+	.4byte	0x3a
+	.byte	0x1
+	.uleb128 0xa
+	.4byte	.LASF90
+	.byte	0xb
+	.byte	0xd7
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF16
+	.byte	0xb
+	.byte	0xd8
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF91
+	.byte	0xb
+	.byte	0xd9
+	.4byte	0x676
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF92
+	.byte	0xb
+	.byte	0xda
+	.4byte	0x676
+	.byte	0xc
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0xc5
+	.uleb128 0x13
+	.4byte	.LASF93
+	.2byte	0x638
+	.byte	0xb
+	.byte	0xdd
+	.4byte	0x728
+	.uleb128 0xb
+	.ascii	"tag\000"
+	.byte	0xb
+	.byte	0xdf
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0xb
+	.byte	0xe0
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF94
+	.byte	0xb
+	.byte	0xe1
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF95
+	.byte	0xb
+	.byte	0xe2
+	.4byte	0x57
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF96
+	.byte	0xb
+	.byte	0xe3
+	.4byte	0x57
+	.byte	0xe
+	.uleb128 0xa
+	.4byte	.LASF97
+	.byte	0xb
+	.byte	0xe4
+	.4byte	0x728
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF98
+	.byte	0xb
+	.byte	0xe5
+	.4byte	0x51c
+	.byte	0x50
+	.uleb128 0xa
+	.4byte	.LASF99
+	.byte	0xb
+	.byte	0xe6
+	.4byte	0x73e
+	.byte	0x60
+	.uleb128 0xa
+	.4byte	.LASF100
+	.byte	0xb
+	.byte	0xe8
+	.4byte	0x3e9
+	.byte	0xa0
+	.uleb128 0xa
+	.4byte	.LASF101
+	.byte	0xb
+	.byte	0xe9
+	.4byte	0x2c1
+	.byte	0xc0
+	.uleb128 0xa
+	.4byte	.LASF102
+	.byte	0xb
+	.byte	0xea
+	.4byte	0x616
+	.byte	0xe0
+	.uleb128 0xf
+	.4byte	.LASF103
+	.byte	0xb
+	.byte	0xec
+	.4byte	0x74
+	.2byte	0x434
+	.uleb128 0xf
+	.4byte	.LASF40
+	.byte	0xb
+	.byte	0xed
+	.4byte	0x74e
+	.2byte	0x438
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x73e
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x74e
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x75f
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF104
+	.byte	0xb
+	.byte	0xee
+	.4byte	0x67c
+	.uleb128 0x9
+	.4byte	.LASF105
+	.byte	0xb
+	.byte	0xb
+	.byte	0xf0
+	.4byte	0x7cb
+	.uleb128 0xa
+	.4byte	.LASF106
+	.byte	0xb
+	.byte	0xf2
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF107
+	.byte	0xb
+	.byte	0xf3
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF108
+	.byte	0xb
+	.byte	0xf4
+	.4byte	0x3a
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF109
+	.byte	0xb
+	.byte	0xf5
+	.4byte	0x3a
+	.byte	0x7
+	.uleb128 0xa
+	.4byte	.LASF110
+	.byte	0xb
+	.byte	0xf6
+	.4byte	0x3a
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF111
+	.byte	0xb
+	.byte	0xf7
+	.4byte	0x3a
+	.byte	0x9
+	.uleb128 0xa
+	.4byte	.LASF112
+	.byte	0xb
+	.byte	0xf8
+	.4byte	0x3a
+	.byte	0xa
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF113
+	.byte	0xb
+	.byte	0xf9
+	.4byte	0x7d6
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x76a
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x7ec
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF114
+	.byte	0xb
+	.2byte	0x107
+	.4byte	0x7dc
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	read_retry_cur_offset
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x814
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF97
+	.byte	0xb
+	.2byte	0x108
+	.4byte	0x7fe
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	IDByte
+	.uleb128 0x15
+	.4byte	.LASF98
+	.byte	0xb
+	.2byte	0x109
+	.4byte	0x46c
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DieCsIndex
+	.uleb128 0x6
+	.4byte	0x621
+	.4byte	0x848
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF115
+	.byte	0xb
+	.2byte	0x10a
+	.4byte	0x838
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gDieOp
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x86a
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF99
+	.byte	0xb
+	.2byte	0x10b
+	.4byte	0x85a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DieAddrs
+	.uleb128 0x16
+	.4byte	0xba
+	.byte	0xb
+	.2byte	0x10c
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	slcPageToMlcPageTbl
+	.uleb128 0x16
+	.4byte	0xaf
+	.byte	0xb
+	.2byte	0x10d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	mlcPageToSlcPageTbl
+	.uleb128 0x17
+	.4byte	0x74
+	.4byte	0x8b6
+	.uleb128 0x18
+	.4byte	0x3a
+	.uleb128 0x18
+	.4byte	0x74
+	.uleb128 0x18
+	.4byte	0x8b6
+	.uleb128 0x18
+	.4byte	0x8b6
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3a
+	.uleb128 0x15
+	.4byte	.LASF116
+	.byte	0xb
+	.2byte	0x10e
+	.4byte	0x8ce
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpReadRetrial
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x898
+	.uleb128 0x15
+	.4byte	.LASF117
+	.byte	0xb
+	.2byte	0x10f
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMultiPageReadEn
+	.uleb128 0x15
+	.4byte	.LASF118
+	.byte	0xb
+	.2byte	0x110
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMultiPageProgEn
+	.uleb128 0x15
+	.4byte	.LASF119
+	.byte	0xb
+	.2byte	0x111
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashSdrModeEn
+	.uleb128 0x15
+	.4byte	.LASF120
+	.byte	0xb
+	.2byte	0x112
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashToggleModeEn
+	.uleb128 0x15
+	.4byte	.LASF121
+	.byte	0xb
+	.2byte	0x113
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashOnfiModeEn
+	.uleb128 0x15
+	.4byte	.LASF122
+	.byte	0xb
+	.2byte	0x115
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashSlcMode
+	.uleb128 0x15
+	.4byte	.LASF123
+	.byte	0xb
+	.2byte	0x116
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashInterfaceMode
+	.uleb128 0x15
+	.4byte	.LASF124
+	.byte	0xb
+	.2byte	0x117
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandMaxDie
+	.uleb128 0x15
+	.4byte	.LASF125
+	.byte	0xb
+	.2byte	0x118
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandMaxChip
+	.uleb128 0x15
+	.4byte	.LASF126
+	.byte	0xb
+	.2byte	0x119
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gTotleBlock
+	.uleb128 0x15
+	.4byte	.LASF127
+	.byte	0xb
+	.2byte	0x11a
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBlockPageAlignSize
+	.uleb128 0x15
+	.4byte	.LASF128
+	.byte	0xb
+	.2byte	0x11b
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandRandomizer
+	.uleb128 0x15
+	.4byte	.LASF129
+	.byte	0xb
+	.2byte	0x11c
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashEccBits
+	.uleb128 0x15
+	.4byte	.LASF130
+	.byte	0xb
+	.2byte	0x11d
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashIDBEccBits
+	.uleb128 0x15
+	.4byte	.LASF131
+	.byte	0xb
+	.2byte	0x11e
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashInfoBlockEcc
+	.uleb128 0x15
+	.4byte	.LASF132
+	.byte	0xb
+	.2byte	0x11f
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashIdbBlockAddr
+	.uleb128 0x15
+	.4byte	.LASF133
+	.byte	0xb
+	.2byte	0x120
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashInfoBlockAddr
+	.uleb128 0x15
+	.4byte	.LASF134
+	.byte	0xb
+	.2byte	0x121
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandFlashResEndPageAddr
+	.uleb128 0x15
+	.4byte	.LASF135
+	.byte	0xb
+	.2byte	0x122
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandIDBResBlkNum
+	.uleb128 0x15
+	.4byte	.LASF136
+	.byte	0xb
+	.2byte	0x123
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandIDBResBlkNumSaveInFlash
+	.uleb128 0x15
+	.4byte	.LASF137
+	.byte	0xb
+	.2byte	0x124
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_retryMode
+	.uleb128 0x15
+	.4byte	.LASF138
+	.byte	0xb
+	.2byte	0x125
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_maxRegNum
+	.uleb128 0x15
+	.4byte	.LASF139
+	.byte	0xb
+	.2byte	0x126
+	.4byte	0x3a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_maxRetryCount
+	.uleb128 0x16
+	.4byte	0x1e6
+	.byte	0xb
+	.2byte	0x127
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_slc2KBNand
+	.uleb128 0x19
+	.4byte	.LASF140
+	.byte	0xb
+	.2byte	0x128
+	.4byte	0x3e9
+	.uleb128 0x15
+	.4byte	.LASF141
+	.byte	0xb
+	.2byte	0x129
+	.4byte	0x2c1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandOptPara
+	.uleb128 0x15
+	.4byte	.LASF142
+	.byte	0xb
+	.2byte	0x12a
+	.4byte	0xab0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3e9
+	.uleb128 0x15
+	.4byte	.LASF143
+	.byte	0xb
+	.2byte	0x12c
+	.4byte	0x616
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gReadRetryInfo
+	.uleb128 0x15
+	.4byte	.LASF144
+	.byte	0xb
+	.2byte	0x12d
+	.4byte	0xada
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpFlashSaveInfo
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x75f
+	.uleb128 0x15
+	.4byte	.LASF145
+	.byte	0xb
+	.2byte	0x131
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashPageBuffer0
+	.uleb128 0x15
+	.4byte	.LASF146
+	.byte	0xb
+	.2byte	0x132
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashPageBuffer1
+	.uleb128 0x15
+	.4byte	.LASF147
+	.byte	0xb
+	.2byte	0x133
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashSpareBuffer
+	.uleb128 0x15
+	.4byte	.LASF148
+	.byte	0xb
+	.2byte	0x134
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashProgCheckBuffer
+	.uleb128 0x15
+	.4byte	.LASF149
+	.byte	0xb
+	.2byte	0x135
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFlashProgCheckSpareBuffer
+	.uleb128 0x15
+	.4byte	.LASF150
+	.byte	0xb
+	.2byte	0x137
+	.4byte	0x144
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandPhyInfo
+	.uleb128 0x15
+	.4byte	.LASF151
+	.byte	0xb
+	.2byte	0x138
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FlashWaitBusyScheduleEn
+	.uleb128 0x15
+	.4byte	.LASF152
+	.byte	0xb
+	.2byte	0x139
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FlashDdrTunningReadCount
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0xb81
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF153
+	.byte	0xb
+	.2byte	0x13b
+	.4byte	0xb70
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandIDataBuf
+	.uleb128 0x1a
+	.4byte	.LASF441
+	.byte	0x4
+	.4byte	0x2c
+	.byte	0xc
+	.byte	0x15
+	.4byte	0xbc2
+	.uleb128 0x1b
+	.4byte	.LASF154
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF155
+	.byte	0x1
+	.uleb128 0x1b
+	.4byte	.LASF156
+	.byte	0x2
+	.uleb128 0x1b
+	.4byte	.LASF157
+	.byte	0x3
+	.uleb128 0x1b
+	.4byte	.LASF158
+	.byte	0x4
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF159
+	.byte	0xc
+	.byte	0x1c
+	.4byte	0xb93
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x24
+	.4byte	0xc69
+	.uleb128 0x1c
+	.ascii	"cs\000"
+	.byte	0xc
+	.byte	0x26
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"wp\000"
+	.byte	0xc
+	.byte	0x27
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0x28
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF160
+	.byte	0xc
+	.byte	0x29
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF161
+	.byte	0xc
+	.byte	0x2a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF162
+	.byte	0xc
+	.byte	0x2b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"tm\000"
+	.byte	0xc
+	.byte	0x2c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF163
+	.byte	0xc
+	.byte	0x2d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF164
+	.byte	0xc
+	.byte	0x2e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF165
+	.byte	0xc
+	.byte	0x2f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x10
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x31
+	.4byte	0xd41
+	.uleb128 0x1c
+	.ascii	"cs\000"
+	.byte	0xc
+	.byte	0x33
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"wp\000"
+	.byte	0xc
+	.byte	0x34
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0x35
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF166
+	.byte	0xc
+	.byte	0x36
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF167
+	.byte	0xc
+	.byte	0x37
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF162
+	.byte	0xc
+	.byte	0x38
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"tm\000"
+	.byte	0xc
+	.byte	0x39
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF163
+	.byte	0xc
+	.byte	0x3a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF164
+	.byte	0xc
+	.byte	0x3b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF168
+	.byte	0xc
+	.byte	0x3c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF169
+	.byte	0xc
+	.byte	0x3d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF170
+	.byte	0xc
+	.byte	0x3e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF171
+	.byte	0xc
+	.byte	0x3f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF172
+	.byte	0xc
+	.byte	0x40
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF174
+	.byte	0x4
+	.byte	0xc
+	.byte	0x21
+	.4byte	0xd6d
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0x23
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0x30
+	.4byte	0xbcd
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0x41
+	.4byte	0xc69
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF175
+	.byte	0xc
+	.byte	0x42
+	.4byte	0xd41
+	.uleb128 0x20
+	.4byte	0xd6d
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x57
+	.4byte	0xe85
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x59
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdn\000"
+	.byte	0xc
+	.byte	0x5a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF176
+	.byte	0xc
+	.byte	0x5b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"dma\000"
+	.byte	0xc
+	.byte	0x5c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF177
+	.byte	0xc
+	.byte	0x5d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF178
+	.byte	0xc
+	.byte	0x5e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x19
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF179
+	.byte	0xc
+	.byte	0x5f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF180
+	.byte	0xc
+	.byte	0x60
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF181
+	.byte	0xc
+	.byte	0x61
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF182
+	.byte	0xc
+	.byte	0x62
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF183
+	.byte	0xc
+	.byte	0x63
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF184
+	.byte	0xc
+	.byte	0x64
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x6
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF185
+	.byte	0xc
+	.byte	0x65
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0xc
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF186
+	.byte	0xc
+	.byte	0x66
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF187
+	.byte	0xc
+	.byte	0x67
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xa
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF188
+	.byte	0xc
+	.byte	0x68
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF172
+	.byte	0xc
+	.byte	0x69
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x6b
+	.4byte	0xf9c
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x6d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdn\000"
+	.byte	0xc
+	.byte	0x6e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF176
+	.byte	0xc
+	.byte	0x6f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"dma\000"
+	.byte	0xc
+	.byte	0x70
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF177
+	.byte	0xc
+	.byte	0x71
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF178
+	.byte	0xc
+	.byte	0x72
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x19
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF179
+	.byte	0xc
+	.byte	0x73
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF189
+	.byte	0xc
+	.byte	0x76
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x16
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF182
+	.byte	0xc
+	.byte	0x77
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x15
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF183
+	.byte	0xc
+	.byte	0x78
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x14
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF184
+	.byte	0xc
+	.byte	0x79
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x7
+	.byte	0xd
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF190
+	.byte	0xc
+	.byte	0x7a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xc
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF186
+	.byte	0xc
+	.byte	0x7b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF187
+	.byte	0xc
+	.byte	0x7c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xa
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF188
+	.byte	0xc
+	.byte	0x7d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x6
+	.byte	0x4
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF191
+	.byte	0xc
+	.byte	0x7e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x3
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF192
+	.byte	0xc
+	.byte	0x7f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x2
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF193
+	.byte	0xc
+	.byte	0x80
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF194
+	.byte	0x4
+	.byte	0xc
+	.byte	0x54
+	.4byte	0xfc8
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0x56
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0x6a
+	.4byte	0xd7d
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0x81
+	.4byte	0xe85
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF195
+	.byte	0xc
+	.byte	0x82
+	.4byte	0xf9c
+	.uleb128 0x20
+	.4byte	0xfc8
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x87
+	.4byte	0x1086
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x89
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF196
+	.byte	0xc
+	.byte	0x8a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF197
+	.byte	0xc
+	.byte	0x8b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF198
+	.byte	0xc
+	.byte	0x8c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF199
+	.byte	0xc
+	.byte	0x8d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF200
+	.byte	0xc
+	.byte	0x8e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF201
+	.byte	0xc
+	.byte	0x8f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF202
+	.byte	0xc
+	.byte	0x90
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF203
+	.byte	0xc
+	.byte	0x91
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF204
+	.byte	0xc
+	.byte	0x92
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xd
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF205
+	.byte	0xc
+	.byte	0x93
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0xd
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0x95
+	.4byte	0x1143
+	.uleb128 0x1c
+	.ascii	"rst\000"
+	.byte	0xc
+	.byte	0x97
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF196
+	.byte	0xc
+	.byte	0x98
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF197
+	.byte	0xc
+	.byte	0x99
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF198
+	.byte	0xc
+	.byte	0x9a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF199
+	.byte	0xc
+	.byte	0x9b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF200
+	.byte	0xc
+	.byte	0x9c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF201
+	.byte	0xc
+	.byte	0x9d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF202
+	.byte	0xc
+	.byte	0x9e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xf
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF203
+	.byte	0xc
+	.byte	0x9f
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xe
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF204
+	.byte	0xc
+	.byte	0xa0
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0xd
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF206
+	.byte	0xc
+	.byte	0xa1
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x8
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF172
+	.byte	0xc
+	.byte	0xa2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF207
+	.byte	0x4
+	.byte	0xc
+	.byte	0x84
+	.4byte	0x116f
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0x86
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0x94
+	.4byte	0xfd8
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xa3
+	.4byte	0x1086
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF208
+	.byte	0xc
+	.byte	0xa4
+	.4byte	0x1143
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xa9
+	.4byte	0x1273
+	.uleb128 0x1d
+	.4byte	.LASF209
+	.byte	0xc
+	.byte	0xab
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF210
+	.byte	0xc
+	.byte	0xac
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF211
+	.byte	0xc
+	.byte	0xad
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF212
+	.byte	0xc
+	.byte	0xae
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF213
+	.byte	0xc
+	.byte	0xaf
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF214
+	.byte	0xc
+	.byte	0xb0
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF215
+	.byte	0xc
+	.byte	0xb1
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF216
+	.byte	0xc
+	.byte	0xb2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF217
+	.byte	0xc
+	.byte	0xb3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF218
+	.byte	0xc
+	.byte	0xb4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x6
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0xb5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"cnt\000"
+	.byte	0xc
+	.byte	0xb6
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x4
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF219
+	.byte	0xc
+	.byte	0xb7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x3
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF220
+	.byte	0xc
+	.byte	0xb8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x2
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF221
+	.byte	0xc
+	.byte	0xb9
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF222
+	.byte	0xc
+	.byte	0xba
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xbc
+	.4byte	0x136c
+	.uleb128 0x1d
+	.4byte	.LASF209
+	.byte	0xc
+	.byte	0xbe
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF210
+	.byte	0xc
+	.byte	0xbf
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF211
+	.byte	0xc
+	.byte	0xc0
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF212
+	.byte	0xc
+	.byte	0xc1
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x18
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF213
+	.byte	0xc
+	.byte	0xc2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x13
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF214
+	.byte	0xc
+	.byte	0xc3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF215
+	.byte	0xc
+	.byte	0xc4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF216
+	.byte	0xc
+	.byte	0xc5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF217
+	.byte	0xc
+	.byte	0xc6
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF218
+	.byte	0xc
+	.byte	0xc7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x6
+	.byte	0
+	.uleb128 0x1c
+	.ascii	"rdy\000"
+	.byte	0xc
+	.byte	0xc8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x5
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF219
+	.byte	0xc
+	.byte	0xca
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x4
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF220
+	.byte	0xc
+	.byte	0xcb
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x3
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF221
+	.byte	0xc
+	.byte	0xcc
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x2
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF222
+	.byte	0xc
+	.byte	0xcd
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF223
+	.byte	0xc
+	.byte	0xce
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF224
+	.byte	0x4
+	.byte	0xc
+	.byte	0xa6
+	.4byte	0x1398
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0xa8
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0xbb
+	.4byte	0x117a
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xcf
+	.4byte	0x1273
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x136c
+	.uleb128 0x3
+	.4byte	.LASF225
+	.byte	0xc
+	.byte	0xd0
+	.4byte	0x1398
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xd5
+	.4byte	0x1429
+	.uleb128 0x1d
+	.4byte	.LASF226
+	.byte	0xc
+	.byte	0xd7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF227
+	.byte	0xc
+	.byte	0xd8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF228
+	.byte	0xc
+	.byte	0xd9
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF229
+	.byte	0xc
+	.byte	0xda
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF230
+	.byte	0xc
+	.byte	0xdb
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF231
+	.byte	0xc
+	.byte	0xdc
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF232
+	.byte	0xc
+	.byte	0xdd
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF233
+	.byte	0xc
+	.byte	0xde
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x11
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xe0
+	.4byte	0x14b9
+	.uleb128 0x1d
+	.4byte	.LASF226
+	.byte	0xc
+	.byte	0xe2
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF227
+	.byte	0xc
+	.byte	0xe3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF228
+	.byte	0xc
+	.byte	0xe4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF229
+	.byte	0xc
+	.byte	0xe5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF230
+	.byte	0xc
+	.byte	0xe6
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x3
+	.byte	0x17
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF231
+	.byte	0xc
+	.byte	0xe7
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0x12
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF232
+	.byte	0xc
+	.byte	0xe8
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x11
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF234
+	.byte	0xc
+	.byte	0xe9
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF165
+	.byte	0xc
+	.byte	0xea
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x10
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF235
+	.byte	0x4
+	.byte	0xc
+	.byte	0xd2
+	.4byte	0x14e5
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0xd4
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V4\000"
+	.byte	0xc
+	.byte	0xdf
+	.4byte	0x13a8
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xeb
+	.4byte	0x1429
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x14b9
+	.uleb128 0x3
+	.4byte	.LASF236
+	.byte	0xc
+	.byte	0xec
+	.4byte	0x14e5
+	.uleb128 0x10
+	.byte	0x4
+	.byte	0xc
+	.byte	0xf1
+	.4byte	0x152b
+	.uleb128 0x1d
+	.4byte	.LASF237
+	.byte	0xc
+	.byte	0xf3
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x10
+	.byte	0x10
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF238
+	.byte	0xc
+	.byte	0xf4
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x5
+	.byte	0xb
+	.byte	0
+	.uleb128 0x1d
+	.4byte	.LASF239
+	.byte	0xc
+	.byte	0xf5
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0xb
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x1e
+	.4byte	.LASF240
+	.byte	0x4
+	.byte	0xc
+	.byte	0xee
+	.4byte	0x154d
+	.uleb128 0x1f
+	.ascii	"d32\000"
+	.byte	0xc
+	.byte	0xf0
+	.4byte	0x74
+	.uleb128 0x1f
+	.ascii	"V6\000"
+	.byte	0xc
+	.byte	0xf6
+	.4byte	0x14f5
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x152b
+	.uleb128 0x3
+	.4byte	.LASF241
+	.byte	0xc
+	.byte	0xf7
+	.4byte	0x154d
+	.uleb128 0x13
+	.4byte	.LASF242
+	.2byte	0x100
+	.byte	0xc
+	.byte	0xfa
+	.4byte	0x159b
+	.uleb128 0xa
+	.4byte	.LASF243
+	.byte	0xc
+	.byte	0xfc
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF201
+	.byte	0xc
+	.byte	0xfd
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xb
+	.ascii	"cmd\000"
+	.byte	0xc
+	.byte	0xfe
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF244
+	.byte	0xc
+	.byte	0xff
+	.4byte	0x15a0
+	.byte	0xc
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x155d
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x15b0
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF245
+	.byte	0xc
+	.2byte	0x100
+	.4byte	0x159b
+	.uleb128 0x21
+	.4byte	.LASF246
+	.byte	0xc
+	.2byte	0x100
+	.4byte	0x15c8
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x159b
+	.uleb128 0x22
+	.2byte	0x1800
+	.byte	0xc
+	.2byte	0x105
+	.4byte	0x1781
+	.uleb128 0x23
+	.4byte	.LASF247
+	.byte	0xc
+	.2byte	0x107
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF248
+	.byte	0xc
+	.2byte	0x108
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF249
+	.byte	0xc
+	.2byte	0x109
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF250
+	.byte	0xc
+	.2byte	0x10a
+	.4byte	0x74
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF236
+	.byte	0xc
+	.2byte	0x10b
+	.4byte	0x74
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF251
+	.byte	0xc
+	.2byte	0x10c
+	.4byte	0x74
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF252
+	.byte	0xc
+	.2byte	0x10d
+	.4byte	0x74
+	.byte	0x18
+	.uleb128 0x23
+	.4byte	.LASF241
+	.byte	0xc
+	.2byte	0x10e
+	.4byte	0x74
+	.byte	0x1c
+	.uleb128 0x23
+	.4byte	.LASF253
+	.byte	0xc
+	.2byte	0x110
+	.4byte	0x85a
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF254
+	.byte	0xc
+	.2byte	0x111
+	.4byte	0x1786
+	.byte	0x40
+	.uleb128 0x24
+	.4byte	.LASF255
+	.byte	0xc
+	.2byte	0x112
+	.4byte	0x74
+	.2byte	0x130
+	.uleb128 0x24
+	.4byte	.LASF256
+	.byte	0xc
+	.2byte	0x113
+	.4byte	0x74
+	.2byte	0x134
+	.uleb128 0x24
+	.4byte	.LASF257
+	.byte	0xc
+	.2byte	0x114
+	.4byte	0x74
+	.2byte	0x138
+	.uleb128 0x24
+	.4byte	.LASF258
+	.byte	0xc
+	.2byte	0x115
+	.4byte	0x1796
+	.2byte	0x13c
+	.uleb128 0x24
+	.4byte	.LASF259
+	.byte	0xc
+	.2byte	0x117
+	.4byte	0x74
+	.2byte	0x150
+	.uleb128 0x24
+	.4byte	.LASF260
+	.byte	0xc
+	.2byte	0x118
+	.4byte	0x74
+	.2byte	0x154
+	.uleb128 0x24
+	.4byte	.LASF261
+	.byte	0xc
+	.2byte	0x119
+	.4byte	0x74
+	.2byte	0x158
+	.uleb128 0x24
+	.4byte	.LASF244
+	.byte	0xc
+	.2byte	0x11a
+	.4byte	0x74
+	.2byte	0x15c
+	.uleb128 0x24
+	.4byte	.LASF262
+	.byte	0xc
+	.2byte	0x11b
+	.4byte	0x74
+	.2byte	0x160
+	.uleb128 0x24
+	.4byte	.LASF263
+	.byte	0xc
+	.2byte	0x11d
+	.4byte	0x74
+	.2byte	0x164
+	.uleb128 0x24
+	.4byte	.LASF264
+	.byte	0xc
+	.2byte	0x11e
+	.4byte	0x74
+	.2byte	0x168
+	.uleb128 0x24
+	.4byte	.LASF265
+	.byte	0xc
+	.2byte	0x11f
+	.4byte	0x74
+	.2byte	0x16c
+	.uleb128 0x24
+	.4byte	.LASF266
+	.byte	0xc
+	.2byte	0x120
+	.4byte	0x74
+	.2byte	0x170
+	.uleb128 0x24
+	.4byte	.LASF267
+	.byte	0xc
+	.2byte	0x121
+	.4byte	0x74
+	.2byte	0x174
+	.uleb128 0x24
+	.4byte	.LASF268
+	.byte	0xc
+	.2byte	0x122
+	.4byte	0x17a6
+	.2byte	0x178
+	.uleb128 0x24
+	.4byte	.LASF269
+	.byte	0xc
+	.2byte	0x123
+	.4byte	0x73e
+	.2byte	0x180
+	.uleb128 0x24
+	.4byte	.LASF270
+	.byte	0xc
+	.2byte	0x124
+	.4byte	0x73e
+	.2byte	0x1c0
+	.uleb128 0x24
+	.4byte	.LASF271
+	.byte	0xc
+	.2byte	0x125
+	.4byte	0x17b6
+	.2byte	0x200
+	.uleb128 0x24
+	.4byte	.LASF272
+	.byte	0xc
+	.2byte	0x126
+	.4byte	0x17c6
+	.2byte	0x400
+	.uleb128 0x24
+	.4byte	.LASF273
+	.byte	0xc
+	.2byte	0x127
+	.4byte	0x17e6
+	.2byte	0x800
+	.uleb128 0x25
+	.ascii	"buf\000"
+	.byte	0xc
+	.2byte	0x128
+	.4byte	0xb70
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x15ce
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x1796
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3b
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17a6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x4
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17b6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17c6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x17d6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xff
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x15b0
+	.4byte	0x17e6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x17d6
+	.uleb128 0x26
+	.4byte	.LASF274
+	.2byte	0x1800
+	.byte	0xc
+	.2byte	0x103
+	.4byte	0x1805
+	.uleb128 0x27
+	.ascii	"V6\000"
+	.byte	0xc
+	.2byte	0x129
+	.4byte	0x1781
+	.byte	0
+	.uleb128 0x20
+	.4byte	0x17eb
+	.uleb128 0x21
+	.4byte	.LASF275
+	.byte	0xc
+	.2byte	0x12a
+	.4byte	0x1816
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1805
+	.uleb128 0x28
+	.4byte	.LASF276
+	.byte	0x20
+	.byte	0xc
+	.2byte	0x12c
+	.4byte	0x1892
+	.uleb128 0x23
+	.4byte	.LASF277
+	.byte	0xc
+	.2byte	0x12e
+	.4byte	0x13e
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF278
+	.byte	0xc
+	.2byte	0x12f
+	.4byte	0x13e
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF279
+	.byte	0xc
+	.2byte	0x130
+	.4byte	0x13e
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF280
+	.byte	0xc
+	.2byte	0x131
+	.4byte	0x13e
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF281
+	.byte	0xc
+	.2byte	0x132
+	.4byte	0x74
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF282
+	.byte	0xc
+	.2byte	0x133
+	.4byte	0x74
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF283
+	.byte	0xc
+	.2byte	0x134
+	.4byte	0x74
+	.byte	0x18
+	.uleb128 0x29
+	.ascii	"cnt\000"
+	.byte	0xc
+	.2byte	0x135
+	.4byte	0x74
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF284
+	.byte	0xc
+	.2byte	0x136
+	.4byte	0x181c
+	.uleb128 0x28
+	.4byte	.LASF285
+	.byte	0x8
+	.byte	0xc
+	.2byte	0x138
+	.4byte	0x18c6
+	.uleb128 0x23
+	.4byte	.LASF286
+	.byte	0xc
+	.2byte	0x13a
+	.4byte	0x13e
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF287
+	.byte	0xc
+	.2byte	0x13b
+	.4byte	0x74
+	.byte	0x4
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF288
+	.byte	0xc
+	.2byte	0x13c
+	.4byte	0x189e
+	.uleb128 0x6
+	.4byte	0x18c6
+	.4byte	0x18e2
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF289
+	.byte	0xc
+	.2byte	0x14a
+	.4byte	0x18d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandChipMap
+	.uleb128 0x15
+	.4byte	.LASF290
+	.byte	0xc
+	.2byte	0x14c
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandcVer
+	.uleb128 0x15
+	.4byte	.LASF291
+	.byte	0xc
+	.2byte	0x14d
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_nandc_version_data
+	.uleb128 0x15
+	.4byte	.LASF292
+	.byte	0xc
+	.2byte	0x14e
+	.4byte	0x180a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpNandc
+	.uleb128 0x15
+	.4byte	.LASF293
+	.byte	0xc
+	.2byte	0x14f
+	.4byte	0x180a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gpNandc1
+	.uleb128 0x15
+	.4byte	.LASF294
+	.byte	0xc
+	.2byte	0x150
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandcEccBits
+	.uleb128 0x15
+	.4byte	.LASF295
+	.byte	0xc
+	.2byte	0x151
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBootDdrMode
+	.uleb128 0x15
+	.4byte	.LASF296
+	.byte	0xc
+	.2byte	0x152
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gToggleModeClkDiv
+	.uleb128 0x15
+	.4byte	.LASF297
+	.byte	0xc
+	.2byte	0x153
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandcDumpWriteEn
+	.uleb128 0x15
+	.4byte	.LASF298
+	.byte	0xc
+	.2byte	0x155
+	.4byte	0x1892
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMasterInfo
+	.uleb128 0x15
+	.4byte	.LASF299
+	.byte	0xc
+	.2byte	0x156
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gMasterTempBuf
+	.uleb128 0x3
+	.4byte	.LASF300
+	.byte	0xd
+	.byte	0xd
+	.4byte	0x33
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x7
+	.4byte	.LASF301
+	.uleb128 0x8
+	.4byte	.LASF302
+	.byte	0xe
+	.byte	0xc
+	.4byte	0x8f
+	.uleb128 0x3
+	.4byte	.LASF303
+	.byte	0xf
+	.byte	0xc
+	.4byte	0x33
+	.uleb128 0x3
+	.4byte	.LASF304
+	.byte	0xf
+	.byte	0xf
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF305
+	.byte	0xf
+	.byte	0x12
+	.4byte	0x2c
+	.uleb128 0x3
+	.4byte	.LASF306
+	.byte	0xf
+	.byte	0x16
+	.4byte	0x96
+	.uleb128 0x2a
+	.ascii	"u8\000"
+	.byte	0xf
+	.byte	0x1f
+	.4byte	0x33
+	.uleb128 0x4
+	.4byte	0x19f1
+	.uleb128 0x2a
+	.ascii	"u32\000"
+	.byte	0xf
+	.byte	0x25
+	.4byte	0x2c
+	.uleb128 0x3
+	.4byte	.LASF307
+	.byte	0xf
+	.byte	0x35
+	.4byte	0x19b3
+	.uleb128 0x3
+	.4byte	.LASF308
+	.byte	0xf
+	.byte	0x36
+	.4byte	0x19b3
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a2e
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x8
+	.4byte	.LASF309
+	.uleb128 0x4
+	.4byte	0x1a27
+	.uleb128 0x3
+	.4byte	.LASF310
+	.byte	0x10
+	.byte	0x16
+	.4byte	0x25
+	.uleb128 0x2
+	.byte	0x4
+	.byte	0x5
+	.4byte	.LASF311
+	.uleb128 0x3
+	.4byte	.LASF312
+	.byte	0x10
+	.byte	0x25
+	.4byte	0x2c
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a27
+	.uleb128 0x3
+	.4byte	.LASF313
+	.byte	0x10
+	.byte	0x38
+	.4byte	0x9d
+	.uleb128 0x3
+	.4byte	.LASF314
+	.byte	0x11
+	.byte	0xb
+	.4byte	0x1a33
+	.uleb128 0x3
+	.4byte	.LASF315
+	.byte	0x11
+	.byte	0x2c
+	.4byte	0x1a56
+	.uleb128 0x3
+	.4byte	.LASF316
+	.byte	0x11
+	.byte	0x35
+	.4byte	0x1a45
+	.uleb128 0x3
+	.4byte	.LASF317
+	.byte	0x11
+	.byte	0x52
+	.4byte	0x33
+	.uleb128 0x4
+	.4byte	0x1a82
+	.uleb128 0x3
+	.4byte	.LASF318
+	.byte	0x11
+	.byte	0x55
+	.4byte	0x19b3
+	.uleb128 0x3
+	.4byte	.LASF319
+	.byte	0x11
+	.byte	0x59
+	.4byte	0x25
+	.uleb128 0x3
+	.4byte	.LASF320
+	.byte	0x11
+	.byte	0x5b
+	.4byte	0x19b3
+	.uleb128 0x3
+	.4byte	.LASF321
+	.byte	0x11
+	.byte	0x69
+	.4byte	0x19c5
+	.uleb128 0x3
+	.4byte	.LASF322
+	.byte	0x11
+	.byte	0x6b
+	.4byte	0x19db
+	.uleb128 0x3
+	.4byte	.LASF323
+	.byte	0x11
+	.byte	0x6f
+	.4byte	0x19e6
+	.uleb128 0x3
+	.4byte	.LASF324
+	.byte	0x11
+	.byte	0x95
+	.4byte	0x19d0
+	.uleb128 0x3
+	.4byte	.LASF325
+	.byte	0x11
+	.byte	0x97
+	.4byte	0x19db
+	.uleb128 0x2b
+	.byte	0x4
+	.uleb128 0x8
+	.4byte	.LASF326
+	.byte	0x12
+	.byte	0xb
+	.4byte	0x1a50
+	.uleb128 0x2
+	.byte	0x1
+	.byte	0x2
+	.4byte	.LASF327
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x1b09
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF328
+	.byte	0x13
+	.2byte	0x140
+	.4byte	0x1afe
+	.uleb128 0x19
+	.4byte	.LASF329
+	.byte	0x13
+	.2byte	0x143
+	.4byte	0x1afe
+	.uleb128 0x19
+	.4byte	.LASF330
+	.byte	0x13
+	.2byte	0x143
+	.4byte	0x1afe
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x1b3d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.byte	0
+	.uleb128 0x2c
+	.4byte	.LASF851
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1b3d
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1b4e
+	.uleb128 0x2d
+	.uleb128 0x6
+	.4byte	0x1aa8
+	.4byte	0x1b5a
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF331
+	.byte	0x14
+	.byte	0x10
+	.4byte	0x1b4f
+	.uleb128 0x6
+	.4byte	0x33
+	.4byte	0x1b75
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x5
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF332
+	.byte	0x8
+	.byte	0x15
+	.byte	0x16
+	.4byte	0x1b9a
+	.uleb128 0xa
+	.4byte	.LASF333
+	.byte	0x15
+	.byte	0x17
+	.4byte	0x1b9a
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF334
+	.byte	0x15
+	.byte	0x17
+	.4byte	0x1b9a
+	.byte	0x4
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1b75
+	.uleb128 0x9
+	.4byte	.LASF335
+	.byte	0x8
+	.byte	0x16
+	.byte	0xf
+	.4byte	0x1bc5
+	.uleb128 0xa
+	.4byte	.LASF336
+	.byte	0x16
+	.byte	0x10
+	.4byte	0x1a50
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF337
+	.byte	0x16
+	.byte	0x11
+	.4byte	0x1bde
+	.byte	0x4
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x1ba0
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x1bde
+	.uleb128 0x18
+	.4byte	0x8f
+	.uleb128 0x18
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1bca
+	.uleb128 0x6
+	.4byte	0x1bc5
+	.4byte	0x1bef
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x1be4
+	.uleb128 0x8
+	.4byte	.LASF335
+	.byte	0x16
+	.byte	0xcd
+	.4byte	0x1bef
+	.uleb128 0xe
+	.2byte	0xa0c
+	.byte	0x17
+	.byte	0x13
+	.4byte	0x1c46
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x17
+	.byte	0x14
+	.4byte	0x1aa8
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF339
+	.byte	0x17
+	.byte	0x15
+	.4byte	0x1a9d
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF340
+	.byte	0x17
+	.byte	0x16
+	.4byte	0x1aa8
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF176
+	.byte	0x17
+	.byte	0x17
+	.4byte	0x1c46
+	.byte	0xc
+	.uleb128 0xf
+	.4byte	.LASF341
+	.byte	0x17
+	.byte	0x18
+	.4byte	0x1c57
+	.2byte	0x80c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1aa8
+	.4byte	0x1c57
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x19a8
+	.4byte	0x1c68
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x1ff
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF342
+	.byte	0x17
+	.byte	0x32
+	.4byte	0x1bff
+	.uleb128 0x6
+	.4byte	0x1c68
+	.4byte	0x1c7e
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF343
+	.byte	0x17
+	.byte	0x34
+	.4byte	0x1c73
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4
+	.4byte	.LASF344
+	.uleb128 0x9
+	.4byte	.LASF345
+	.byte	0x8
+	.byte	0x18
+	.byte	0x10
+	.4byte	0x1cb5
+	.uleb128 0xa
+	.4byte	.LASF346
+	.byte	0x18
+	.byte	0x11
+	.4byte	0x1a0b
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x18
+	.byte	0x12
+	.4byte	0x1a16
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF347
+	.byte	0x50
+	.byte	0x18
+	.byte	0x15
+	.4byte	0x1ce6
+	.uleb128 0xb
+	.ascii	"cnt\000"
+	.byte	0x18
+	.byte	0x16
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x18
+	.byte	0x17
+	.4byte	0x1a16
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF200
+	.byte	0x18
+	.byte	0x18
+	.4byte	0x1ce6
+	.byte	0x8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1c90
+	.4byte	0x1cf6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.byte	0
+	.uleb128 0x2e
+	.ascii	"lmb\000"
+	.byte	0xa0
+	.byte	0x18
+	.byte	0x1b
+	.4byte	0x1d1b
+	.uleb128 0xa
+	.4byte	.LASF348
+	.byte	0x18
+	.byte	0x1c
+	.4byte	0x1cb5
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF196
+	.byte	0x18
+	.byte	0x1d
+	.4byte	0x1cb5
+	.byte	0x50
+	.byte	0
+	.uleb128 0x2f
+	.ascii	"lmb\000"
+	.byte	0x18
+	.byte	0x20
+	.4byte	0x1cf6
+	.uleb128 0x10
+	.byte	0x8
+	.byte	0x19
+	.byte	0x5a
+	.4byte	0x1d47
+	.uleb128 0xa
+	.4byte	.LASF176
+	.byte	0x19
+	.byte	0x5b
+	.4byte	0x1a0b
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x19
+	.byte	0x5c
+	.4byte	0x1a16
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF349
+	.byte	0x58
+	.byte	0x19
+	.byte	0x1b
+	.4byte	0x1e38
+	.uleb128 0xa
+	.4byte	.LASF350
+	.byte	0x19
+	.byte	0x1c
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF351
+	.byte	0x19
+	.byte	0x1d
+	.4byte	0x1a16
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF352
+	.byte	0x19
+	.byte	0x1e
+	.4byte	0x19b3
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF353
+	.byte	0x19
+	.byte	0x1f
+	.4byte	0x19b3
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF354
+	.byte	0x19
+	.byte	0x20
+	.4byte	0x19b3
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF355
+	.byte	0x19
+	.byte	0x21
+	.4byte	0x19b3
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF356
+	.byte	0x19
+	.byte	0x22
+	.4byte	0x19b3
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF357
+	.byte	0x19
+	.byte	0x24
+	.4byte	0x19b3
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF358
+	.byte	0x19
+	.byte	0x25
+	.4byte	0x19b3
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF359
+	.byte	0x19
+	.byte	0x26
+	.4byte	0x19b3
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF360
+	.byte	0x19
+	.byte	0x31
+	.4byte	0x19b3
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF361
+	.byte	0x19
+	.byte	0x32
+	.4byte	0x19b3
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF362
+	.byte	0x19
+	.byte	0x33
+	.4byte	0x1b65
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF363
+	.byte	0x19
+	.byte	0x34
+	.4byte	0x25
+	.byte	0x36
+	.uleb128 0xa
+	.4byte	.LASF364
+	.byte	0x19
+	.byte	0x35
+	.4byte	0x19b3
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF365
+	.byte	0x19
+	.byte	0x36
+	.4byte	0x19b3
+	.byte	0x3c
+	.uleb128 0xa
+	.4byte	.LASF366
+	.byte	0x19
+	.byte	0x57
+	.4byte	0x1aa8
+	.byte	0x40
+	.uleb128 0xa
+	.4byte	.LASF367
+	.byte	0x19
+	.byte	0x58
+	.4byte	0x1aa8
+	.byte	0x44
+	.uleb128 0xa
+	.4byte	.LASF368
+	.byte	0x19
+	.byte	0x5d
+	.4byte	0x1e38
+	.byte	0x48
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1d26
+	.4byte	0x1e48
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF369
+	.byte	0x19
+	.byte	0x5f
+	.4byte	0x1d47
+	.uleb128 0x8
+	.4byte	.LASF370
+	.byte	0x1a
+	.byte	0x13
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF371
+	.byte	0x1a
+	.byte	0x14
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF372
+	.byte	0x1a
+	.byte	0x15
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF373
+	.byte	0x1a
+	.byte	0x16
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF374
+	.byte	0x1a
+	.byte	0x17
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF375
+	.byte	0x1a
+	.byte	0x18
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF376
+	.byte	0x1a
+	.byte	0x19
+	.4byte	0x1aa8
+	.uleb128 0x9
+	.4byte	.LASF377
+	.byte	0x28
+	.byte	0x1b
+	.byte	0x39
+	.4byte	0x1f25
+	.uleb128 0xa
+	.4byte	.LASF378
+	.byte	0x1b
+	.byte	0x3a
+	.4byte	0x1f36
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF379
+	.byte	0x1b
+	.byte	0x3b
+	.4byte	0x1f36
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF380
+	.byte	0x1b
+	.byte	0x3c
+	.4byte	0x1f36
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF381
+	.byte	0x1b
+	.byte	0x3d
+	.4byte	0x1f36
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF382
+	.byte	0x1b
+	.byte	0x3e
+	.4byte	0x1f36
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x1b
+	.byte	0x3f
+	.4byte	0x1f36
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF384
+	.byte	0x1b
+	.byte	0x40
+	.4byte	0x1f36
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF385
+	.byte	0x1b
+	.byte	0x43
+	.4byte	0x1f36
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF386
+	.byte	0x1b
+	.byte	0x46
+	.4byte	0x1f36
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF387
+	.byte	0x1b
+	.byte	0x49
+	.4byte	0x1f36
+	.byte	0x24
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF388
+	.byte	0x1c
+	.byte	0xf
+	.4byte	0x1f30
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1ea0
+	.uleb128 0x3
+	.4byte	.LASF389
+	.byte	0x1c
+	.byte	0x12
+	.4byte	0x1adf
+	.uleb128 0x28
+	.4byte	.LASF390
+	.byte	0x40
+	.byte	0x1d
+	.2byte	0x133
+	.4byte	0x1feb
+	.uleb128 0x23
+	.4byte	.LASF391
+	.byte	0x1d
+	.2byte	0x134
+	.4byte	0x1adf
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF392
+	.byte	0x1d
+	.2byte	0x135
+	.4byte	0x1adf
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF393
+	.byte	0x1d
+	.2byte	0x136
+	.4byte	0x1adf
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF394
+	.byte	0x1d
+	.2byte	0x137
+	.4byte	0x1adf
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF395
+	.byte	0x1d
+	.2byte	0x138
+	.4byte	0x1adf
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF396
+	.byte	0x1d
+	.2byte	0x139
+	.4byte	0x1adf
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF397
+	.byte	0x1d
+	.2byte	0x13a
+	.4byte	0x1adf
+	.byte	0x18
+	.uleb128 0x23
+	.4byte	.LASF398
+	.byte	0x1d
+	.2byte	0x13b
+	.4byte	0x1ab3
+	.byte	0x1c
+	.uleb128 0x23
+	.4byte	.LASF399
+	.byte	0x1d
+	.2byte	0x13c
+	.4byte	0x1ab3
+	.byte	0x1d
+	.uleb128 0x23
+	.4byte	.LASF400
+	.byte	0x1d
+	.2byte	0x13d
+	.4byte	0x1ab3
+	.byte	0x1e
+	.uleb128 0x23
+	.4byte	.LASF401
+	.byte	0x1d
+	.2byte	0x13e
+	.4byte	0x1ab3
+	.byte	0x1f
+	.uleb128 0x23
+	.4byte	.LASF402
+	.byte	0x1d
+	.2byte	0x13f
+	.4byte	0x1feb
+	.byte	0x20
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1ab3
+	.4byte	0x1ffb
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF403
+	.byte	0x1d
+	.2byte	0x140
+	.4byte	0x1f41
+	.uleb128 0x28
+	.4byte	.LASF404
+	.byte	0x18
+	.byte	0x1d
+	.2byte	0x142
+	.4byte	0x2089
+	.uleb128 0x23
+	.4byte	.LASF176
+	.byte	0x1d
+	.2byte	0x143
+	.4byte	0x1aa8
+	.byte	0
+	.uleb128 0x29
+	.ascii	"end\000"
+	.byte	0x1d
+	.2byte	0x143
+	.4byte	0x1aa8
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF405
+	.byte	0x1d
+	.2byte	0x144
+	.4byte	0x1aa8
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF406
+	.byte	0x1d
+	.2byte	0x144
+	.4byte	0x1aa8
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF407
+	.byte	0x1d
+	.2byte	0x145
+	.4byte	0x1aa8
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF408
+	.byte	0x1d
+	.2byte	0x146
+	.4byte	0x1ab3
+	.byte	0x14
+	.uleb128 0x23
+	.4byte	.LASF409
+	.byte	0x1d
+	.2byte	0x146
+	.4byte	0x1ab3
+	.byte	0x15
+	.uleb128 0x29
+	.ascii	"os\000"
+	.byte	0x1d
+	.2byte	0x146
+	.4byte	0x1ab3
+	.byte	0x16
+	.uleb128 0x23
+	.4byte	.LASF410
+	.byte	0x1d
+	.2byte	0x147
+	.4byte	0x1ab3
+	.byte	0x17
+	.byte	0
+	.uleb128 0x21
+	.4byte	.LASF411
+	.byte	0x1d
+	.2byte	0x148
+	.4byte	0x2007
+	.uleb128 0x30
+	.4byte	.LASF412
+	.2byte	0x164
+	.byte	0x1d
+	.2byte	0x14e
+	.4byte	0x2228
+	.uleb128 0x23
+	.4byte	.LASF413
+	.byte	0x1d
+	.2byte	0x154
+	.4byte	0x2228
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF414
+	.byte	0x1d
+	.2byte	0x155
+	.4byte	0x1ffb
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF415
+	.byte	0x1d
+	.2byte	0x156
+	.4byte	0x1aa8
+	.byte	0x44
+	.uleb128 0x23
+	.4byte	.LASF416
+	.byte	0x1d
+	.2byte	0x159
+	.4byte	0x1a21
+	.byte	0x48
+	.uleb128 0x23
+	.4byte	.LASF417
+	.byte	0x1d
+	.2byte	0x15b
+	.4byte	0x1aea
+	.byte	0x4c
+	.uleb128 0x23
+	.4byte	.LASF418
+	.byte	0x1d
+	.2byte	0x15c
+	.4byte	0x1a21
+	.byte	0x50
+	.uleb128 0x23
+	.4byte	.LASF419
+	.byte	0x1d
+	.2byte	0x15d
+	.4byte	0x8f
+	.byte	0x54
+	.uleb128 0x23
+	.4byte	.LASF420
+	.byte	0x1d
+	.2byte	0x15f
+	.4byte	0x1aea
+	.byte	0x58
+	.uleb128 0x23
+	.4byte	.LASF421
+	.byte	0x1d
+	.2byte	0x160
+	.4byte	0x1a21
+	.byte	0x5c
+	.uleb128 0x23
+	.4byte	.LASF422
+	.byte	0x1d
+	.2byte	0x161
+	.4byte	0x8f
+	.byte	0x60
+	.uleb128 0x23
+	.4byte	.LASF423
+	.byte	0x1d
+	.2byte	0x163
+	.4byte	0x1aea
+	.byte	0x64
+	.uleb128 0x23
+	.4byte	.LASF424
+	.byte	0x1d
+	.2byte	0x164
+	.4byte	0x1a21
+	.byte	0x68
+	.uleb128 0x23
+	.4byte	.LASF425
+	.byte	0x1d
+	.2byte	0x165
+	.4byte	0x8f
+	.byte	0x6c
+	.uleb128 0x23
+	.4byte	.LASF426
+	.byte	0x1d
+	.2byte	0x167
+	.4byte	0x1aea
+	.byte	0x70
+	.uleb128 0x23
+	.4byte	.LASF427
+	.byte	0x1d
+	.2byte	0x168
+	.4byte	0x1a21
+	.byte	0x74
+	.uleb128 0x23
+	.4byte	.LASF428
+	.byte	0x1d
+	.2byte	0x169
+	.4byte	0x8f
+	.byte	0x78
+	.uleb128 0x29
+	.ascii	"os\000"
+	.byte	0x1d
+	.2byte	0x16d
+	.4byte	0x2089
+	.byte	0x7c
+	.uleb128 0x29
+	.ascii	"ep\000"
+	.byte	0x1d
+	.2byte	0x16e
+	.4byte	0x1aa8
+	.byte	0x94
+	.uleb128 0x23
+	.4byte	.LASF429
+	.byte	0x1d
+	.2byte	0x170
+	.4byte	0x1aa8
+	.byte	0x98
+	.uleb128 0x23
+	.4byte	.LASF430
+	.byte	0x1d
+	.2byte	0x170
+	.4byte	0x1aa8
+	.byte	0x9c
+	.uleb128 0x23
+	.4byte	.LASF431
+	.byte	0x1d
+	.2byte	0x172
+	.4byte	0x1a50
+	.byte	0xa0
+	.uleb128 0x23
+	.4byte	.LASF432
+	.byte	0x1d
+	.2byte	0x173
+	.4byte	0x1aa8
+	.byte	0xa4
+	.uleb128 0x23
+	.4byte	.LASF433
+	.byte	0x1d
+	.2byte	0x175
+	.4byte	0x1aa8
+	.byte	0xa8
+	.uleb128 0x23
+	.4byte	.LASF434
+	.byte	0x1d
+	.2byte	0x176
+	.4byte	0x1aa8
+	.byte	0xac
+	.uleb128 0x23
+	.4byte	.LASF435
+	.byte	0x1d
+	.2byte	0x177
+	.4byte	0x1aa8
+	.byte	0xb0
+	.uleb128 0x23
+	.4byte	.LASF436
+	.byte	0x1d
+	.2byte	0x178
+	.4byte	0x1aa8
+	.byte	0xb4
+	.uleb128 0x29
+	.ascii	"kbd\000"
+	.byte	0x1d
+	.2byte	0x179
+	.4byte	0x222e
+	.byte	0xb8
+	.uleb128 0x23
+	.4byte	.LASF437
+	.byte	0x1d
+	.2byte	0x17c
+	.4byte	0x8f
+	.byte	0xbc
+	.uleb128 0x23
+	.4byte	.LASF438
+	.byte	0x1d
+	.2byte	0x189
+	.4byte	0x8f
+	.byte	0xc0
+	.uleb128 0x29
+	.ascii	"lmb\000"
+	.byte	0x1d
+	.2byte	0x18c
+	.4byte	0x1cf6
+	.byte	0xc4
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1ffb
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1e48
+	.uleb128 0x21
+	.4byte	.LASF439
+	.byte	0x1d
+	.2byte	0x18e
+	.4byte	0x2095
+	.uleb128 0x19
+	.4byte	.LASF440
+	.byte	0x1d
+	.2byte	0x190
+	.4byte	0x2234
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1ab3
+	.uleb128 0x1a
+	.4byte	.LASF442
+	.byte	0x4
+	.4byte	0x8f
+	.byte	0x1e
+	.byte	0xe
+	.4byte	0x244f
+	.uleb128 0x1b
+	.4byte	.LASF443
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF444
+	.byte	0x1
+	.uleb128 0x1b
+	.4byte	.LASF445
+	.byte	0x2
+	.uleb128 0x1b
+	.4byte	.LASF446
+	.byte	0x3
+	.uleb128 0x1b
+	.4byte	.LASF447
+	.byte	0x4
+	.uleb128 0x1b
+	.4byte	.LASF448
+	.byte	0x5
+	.uleb128 0x1b
+	.4byte	.LASF449
+	.byte	0x6
+	.uleb128 0x1b
+	.4byte	.LASF450
+	.byte	0x7
+	.uleb128 0x1b
+	.4byte	.LASF451
+	.byte	0x8
+	.uleb128 0x1b
+	.4byte	.LASF452
+	.byte	0x9
+	.uleb128 0x1b
+	.4byte	.LASF453
+	.byte	0xa
+	.uleb128 0x1b
+	.4byte	.LASF454
+	.byte	0xb
+	.uleb128 0x1b
+	.4byte	.LASF455
+	.byte	0xc
+	.uleb128 0x1b
+	.4byte	.LASF456
+	.byte	0xd
+	.uleb128 0x1b
+	.4byte	.LASF457
+	.byte	0xe
+	.uleb128 0x1b
+	.4byte	.LASF458
+	.byte	0xf
+	.uleb128 0x1b
+	.4byte	.LASF459
+	.byte	0x10
+	.uleb128 0x1b
+	.4byte	.LASF460
+	.byte	0x11
+	.uleb128 0x1b
+	.4byte	.LASF461
+	.byte	0x12
+	.uleb128 0x1b
+	.4byte	.LASF462
+	.byte	0x13
+	.uleb128 0x1b
+	.4byte	.LASF463
+	.byte	0x14
+	.uleb128 0x1b
+	.4byte	.LASF464
+	.byte	0x15
+	.uleb128 0x1b
+	.4byte	.LASF465
+	.byte	0x16
+	.uleb128 0x1b
+	.4byte	.LASF466
+	.byte	0x17
+	.uleb128 0x1b
+	.4byte	.LASF467
+	.byte	0x18
+	.uleb128 0x1b
+	.4byte	.LASF468
+	.byte	0x19
+	.uleb128 0x1b
+	.4byte	.LASF469
+	.byte	0x1a
+	.uleb128 0x1b
+	.4byte	.LASF470
+	.byte	0x1b
+	.uleb128 0x1b
+	.4byte	.LASF471
+	.byte	0x1c
+	.uleb128 0x1b
+	.4byte	.LASF472
+	.byte	0x1d
+	.uleb128 0x1b
+	.4byte	.LASF473
+	.byte	0x1e
+	.uleb128 0x1b
+	.4byte	.LASF474
+	.byte	0x1f
+	.uleb128 0x1b
+	.4byte	.LASF475
+	.byte	0x20
+	.uleb128 0x1b
+	.4byte	.LASF476
+	.byte	0x21
+	.uleb128 0x1b
+	.4byte	.LASF477
+	.byte	0x22
+	.uleb128 0x1b
+	.4byte	.LASF478
+	.byte	0x23
+	.uleb128 0x1b
+	.4byte	.LASF479
+	.byte	0x24
+	.uleb128 0x1b
+	.4byte	.LASF480
+	.byte	0x25
+	.uleb128 0x1b
+	.4byte	.LASF481
+	.byte	0x26
+	.uleb128 0x1b
+	.4byte	.LASF482
+	.byte	0x27
+	.uleb128 0x1b
+	.4byte	.LASF483
+	.byte	0x28
+	.uleb128 0x1b
+	.4byte	.LASF484
+	.byte	0x29
+	.uleb128 0x1b
+	.4byte	.LASF485
+	.byte	0x2a
+	.uleb128 0x1b
+	.4byte	.LASF486
+	.byte	0x2b
+	.uleb128 0x1b
+	.4byte	.LASF487
+	.byte	0x2c
+	.uleb128 0x1b
+	.4byte	.LASF488
+	.byte	0x2d
+	.uleb128 0x1b
+	.4byte	.LASF489
+	.byte	0x2e
+	.uleb128 0x1b
+	.4byte	.LASF490
+	.byte	0x2f
+	.uleb128 0x1b
+	.4byte	.LASF491
+	.byte	0x30
+	.uleb128 0x1b
+	.4byte	.LASF492
+	.byte	0x31
+	.uleb128 0x1b
+	.4byte	.LASF493
+	.byte	0x32
+	.uleb128 0x1b
+	.4byte	.LASF494
+	.byte	0x33
+	.uleb128 0x1b
+	.4byte	.LASF495
+	.byte	0x34
+	.uleb128 0x1b
+	.4byte	.LASF496
+	.byte	0x35
+	.uleb128 0x1b
+	.4byte	.LASF497
+	.byte	0x36
+	.uleb128 0x1b
+	.4byte	.LASF498
+	.byte	0x37
+	.uleb128 0x1b
+	.4byte	.LASF499
+	.byte	0x38
+	.uleb128 0x1b
+	.4byte	.LASF500
+	.byte	0x39
+	.uleb128 0x1b
+	.4byte	.LASF501
+	.byte	0x3a
+	.uleb128 0x1b
+	.4byte	.LASF502
+	.byte	0x3b
+	.uleb128 0x1b
+	.4byte	.LASF503
+	.byte	0x3c
+	.uleb128 0x1b
+	.4byte	.LASF504
+	.byte	0x3d
+	.uleb128 0x1b
+	.4byte	.LASF505
+	.byte	0x3e
+	.uleb128 0x1b
+	.4byte	.LASF506
+	.byte	0x3f
+	.uleb128 0x1b
+	.4byte	.LASF507
+	.byte	0x40
+	.uleb128 0x1b
+	.4byte	.LASF508
+	.byte	0x41
+	.uleb128 0x1b
+	.4byte	.LASF509
+	.byte	0x42
+	.uleb128 0x1b
+	.4byte	.LASF510
+	.byte	0x43
+	.uleb128 0x1b
+	.4byte	.LASF511
+	.byte	0x44
+	.uleb128 0x1b
+	.4byte	.LASF512
+	.byte	0x45
+	.uleb128 0x1b
+	.4byte	.LASF513
+	.byte	0x46
+	.uleb128 0x1b
+	.4byte	.LASF514
+	.byte	0x47
+	.uleb128 0x1b
+	.4byte	.LASF515
+	.byte	0x48
+	.uleb128 0x1b
+	.4byte	.LASF516
+	.byte	0x49
+	.uleb128 0x1b
+	.4byte	.LASF517
+	.byte	0x4a
+	.uleb128 0x1b
+	.4byte	.LASF518
+	.byte	0x4b
+	.uleb128 0x1b
+	.4byte	.LASF519
+	.byte	0x4c
+	.uleb128 0x1b
+	.4byte	.LASF520
+	.byte	0x4d
+	.uleb128 0x1b
+	.4byte	.LASF521
+	.byte	0x4e
+	.uleb128 0x1b
+	.4byte	.LASF522
+	.byte	0x4f
+	.uleb128 0x1b
+	.4byte	.LASF523
+	.byte	0x50
+	.uleb128 0x31
+	.4byte	.LASF524
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x32
+	.byte	0x4
+	.4byte	0x2c
+	.byte	0x2c
+	.byte	0xe0
+	.4byte	0x2462
+	.uleb128 0x1b
+	.4byte	.LASF525
+	.byte	0x5
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x2472
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF526
+	.byte	0xd
+	.byte	0xa6
+	.4byte	0x1aa8
+	.uleb128 0x6
+	.4byte	0x19f1
+	.4byte	0x2488
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF527
+	.byte	0xd
+	.byte	0xa8
+	.4byte	0x247d
+	.uleb128 0x8
+	.4byte	.LASF528
+	.byte	0xd
+	.byte	0xa9
+	.4byte	0x247d
+	.uleb128 0x8
+	.4byte	.LASF529
+	.byte	0xd
+	.byte	0xf7
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF530
+	.byte	0xd
+	.byte	0xf8
+	.4byte	0x1aa8
+	.uleb128 0x8
+	.4byte	.LASF531
+	.byte	0xd
+	.byte	0xf9
+	.4byte	0x1aa8
+	.uleb128 0x9
+	.4byte	.LASF532
+	.byte	0x4
+	.byte	0x1f
+	.byte	0x2e
+	.4byte	0x24d8
+	.uleb128 0xa
+	.4byte	.LASF533
+	.byte	0x1f
+	.byte	0x2f
+	.4byte	0x1adf
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x19a8
+	.uleb128 0x9
+	.4byte	.LASF534
+	.byte	0x40
+	.byte	0x1f
+	.byte	0xa6
+	.4byte	0x257b
+	.uleb128 0xa
+	.4byte	.LASF336
+	.byte	0x1f
+	.byte	0xa8
+	.4byte	0x257b
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF535
+	.byte	0x1f
+	.byte	0xa9
+	.4byte	0x1b65
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF536
+	.byte	0x1f
+	.byte	0xaa
+	.4byte	0x1a0b
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF438
+	.byte	0x1f
+	.byte	0xab
+	.4byte	0x8f
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF537
+	.byte	0x1f
+	.byte	0xad
+	.4byte	0x25a5
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF538
+	.byte	0x1f
+	.byte	0xae
+	.4byte	0x25c4
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF539
+	.byte	0x1f
+	.byte	0xaf
+	.4byte	0x25d9
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF540
+	.byte	0x1f
+	.byte	0xb0
+	.4byte	0x25ea
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF541
+	.byte	0x1f
+	.byte	0xb4
+	.4byte	0x25d9
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF333
+	.byte	0x1f
+	.byte	0xb5
+	.4byte	0x259f
+	.byte	0x34
+	.uleb128 0xa
+	.4byte	.LASF542
+	.byte	0x1f
+	.byte	0xb6
+	.4byte	0x8f
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF543
+	.byte	0x1f
+	.byte	0xb7
+	.4byte	0x1aea
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x258b
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x17
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+	.uleb128 0x18
+	.4byte	0x259f
+	.uleb128 0x18
+	.4byte	0x222e
+	.byte	0
+	.uleb128 0xc
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+	.4byte	0x24de
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x258b
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x25c4
+	.uleb128 0x18
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+	.uleb128 0x18
+	.4byte	0x1aea
+	.uleb128 0x18
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x25ab
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x25d9
+	.uleb128 0x18
+	.4byte	0x259f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x25ca
+	.uleb128 0x33
+	.4byte	0x25ea
+	.uleb128 0x18
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+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x25df
+	.uleb128 0x8
+	.4byte	.LASF544
+	.byte	0x1f
+	.byte	0xbd
+	.4byte	0x259f
+	.uleb128 0x33
+	.4byte	0x260b
+	.uleb128 0x18
+	.4byte	0x1aea
+	.uleb128 0x18
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF545
+	.byte	0x1f
+	.2byte	0x11e
+	.4byte	0x2617
+	.uleb128 0xc
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+	.4byte	0x25fb
+	.uleb128 0x6
+	.4byte	0x19f1
+	.4byte	0x262d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x5
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF546
+	.byte	0x1f
+	.2byte	0x1fd
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF547
+	.byte	0x1f
+	.2byte	0x1fe
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF548
+	.byte	0x1f
+	.2byte	0x200
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF549
+	.byte	0x1f
+	.2byte	0x205
+	.4byte	0x2462
+	.uleb128 0x19
+	.4byte	.LASF550
+	.byte	0x1f
+	.2byte	0x206
+	.4byte	0x2462
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x2679
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3f
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF551
+	.byte	0x1f
+	.2byte	0x207
+	.4byte	0x2669
+	.uleb128 0x19
+	.4byte	.LASF552
+	.byte	0x1f
+	.2byte	0x209
+	.4byte	0x261d
+	.uleb128 0x19
+	.4byte	.LASF553
+	.byte	0x1f
+	.2byte	0x20a
+	.4byte	0x261d
+	.uleb128 0x19
+	.4byte	.LASF554
+	.byte	0x1f
+	.2byte	0x20b
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF555
+	.byte	0x1f
+	.2byte	0x20c
+	.4byte	0x24bf
+	.uleb128 0x19
+	.4byte	.LASF556
+	.byte	0x1f
+	.2byte	0x20d
+	.4byte	0x24d8
+	.uleb128 0x6
+	.4byte	0x24d8
+	.4byte	0x26d1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF557
+	.byte	0x1f
+	.2byte	0x20e
+	.4byte	0x26c1
+	.uleb128 0x19
+	.4byte	.LASF558
+	.byte	0x1f
+	.2byte	0x20f
+	.4byte	0x24d8
+	.uleb128 0x19
+	.4byte	.LASF559
+	.byte	0x1f
+	.2byte	0x210
+	.4byte	0x8f
+	.uleb128 0x6
+	.4byte	0x19fb
+	.4byte	0x2705
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x5
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x26f5
+	.uleb128 0x19
+	.4byte	.LASF560
+	.byte	0x1f
+	.2byte	0x211
+	.4byte	0x2705
+	.uleb128 0x19
+	.4byte	.LASF561
+	.byte	0x1f
+	.2byte	0x212
+	.4byte	0x2705
+	.uleb128 0x19
+	.4byte	.LASF562
+	.byte	0x1f
+	.2byte	0x216
+	.4byte	0x1a9d
+	.uleb128 0x19
+	.4byte	.LASF563
+	.byte	0x1f
+	.2byte	0x217
+	.4byte	0x1a9d
+	.uleb128 0x19
+	.4byte	.LASF564
+	.byte	0x1f
+	.2byte	0x219
+	.4byte	0x8f
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x2757
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF565
+	.byte	0x1f
+	.2byte	0x220
+	.4byte	0x2746
+	.uleb128 0x19
+	.4byte	.LASF566
+	.byte	0x1f
+	.2byte	0x222
+	.4byte	0x1a00
+	.uleb128 0x19
+	.4byte	.LASF567
+	.byte	0x1f
+	.2byte	0x224
+	.4byte	0x1a00
+	.uleb128 0x19
+	.4byte	.LASF568
+	.byte	0x1f
+	.2byte	0x230
+	.4byte	0x24bf
+	.uleb128 0x34
+	.4byte	.LASF569
+	.byte	0x4
+	.4byte	0x2c
+	.byte	0x1f
+	.2byte	0x286
+	.4byte	0x27b1
+	.uleb128 0x1b
+	.4byte	.LASF570
+	.byte	0
+	.uleb128 0x1b
+	.4byte	.LASF571
+	.byte	0x1
+	.uleb128 0x1b
+	.4byte	.LASF572
+	.byte	0x2
+	.uleb128 0x1b
+	.4byte	.LASF573
+	.byte	0x3
+	.byte	0
+	.uleb128 0x19
+	.4byte	.LASF574
+	.byte	0x1f
+	.2byte	0x28c
+	.4byte	0x2787
+	.uleb128 0x9
+	.4byte	.LASF575
+	.byte	0x3c
+	.byte	0x20
+	.byte	0x2b
+	.4byte	0x281d
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0x2d
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF576
+	.byte	0x20
+	.byte	0x2e
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF577
+	.byte	0x20
+	.byte	0x2f
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xb
+	.ascii	"cnt\000"
+	.byte	0x20
+	.byte	0x30
+	.4byte	0x57
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x31
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF578
+	.byte	0x20
+	.byte	0x32
+	.4byte	0x281d
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF579
+	.byte	0x20
+	.byte	0x33
+	.4byte	0x282d
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x282d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x13e
+	.4byte	0x283d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF580
+	.byte	0xc
+	.byte	0x20
+	.byte	0x3f
+	.4byte	0x2885
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0x41
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF576
+	.byte	0x20
+	.byte	0x42
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF577
+	.byte	0x20
+	.byte	0x43
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF581
+	.byte	0x20
+	.byte	0x44
+	.4byte	0x57
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x45
+	.4byte	0x74
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF582
+	.byte	0x2c
+	.byte	0x20
+	.byte	0x48
+	.4byte	0x293a
+	.uleb128 0xa
+	.4byte	.LASF542
+	.byte	0x20
+	.byte	0x4a
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF576
+	.byte	0x20
+	.byte	0x4b
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF583
+	.byte	0x20
+	.byte	0x4d
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF584
+	.byte	0x20
+	.byte	0x4e
+	.4byte	0x57
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF585
+	.byte	0x20
+	.byte	0x50
+	.4byte	0x57
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF586
+	.byte	0x20
+	.byte	0x51
+	.4byte	0x57
+	.byte	0xa
+	.uleb128 0xa
+	.4byte	.LASF587
+	.byte	0x20
+	.byte	0x53
+	.4byte	0x293a
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF588
+	.byte	0x20
+	.byte	0x54
+	.4byte	0x13e
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF589
+	.byte	0x20
+	.byte	0x55
+	.4byte	0x293a
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF590
+	.byte	0x20
+	.byte	0x56
+	.4byte	0x13e
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x58
+	.4byte	0x74
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF591
+	.byte	0x20
+	.byte	0x59
+	.4byte	0x74
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF592
+	.byte	0x20
+	.byte	0x5a
+	.4byte	0x74
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF593
+	.byte	0x20
+	.byte	0x5b
+	.4byte	0x57
+	.byte	0x28
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x57
+	.uleb128 0x9
+	.4byte	.LASF594
+	.byte	0xc
+	.byte	0x20
+	.byte	0x5e
+	.4byte	0x297d
+	.uleb128 0xa
+	.4byte	.LASF595
+	.byte	0x20
+	.byte	0x60
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF196
+	.byte	0x20
+	.byte	0x61
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xb
+	.ascii	"hit\000"
+	.byte	0x20
+	.byte	0x62
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF596
+	.byte	0x20
+	.byte	0x63
+	.4byte	0x13e
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF597
+	.byte	0x24
+	.byte	0x20
+	.byte	0x66
+	.4byte	0x29ea
+	.uleb128 0xa
+	.4byte	.LASF583
+	.byte	0x20
+	.byte	0x68
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF94
+	.byte	0x20
+	.byte	0x69
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x6a
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0x20
+	.byte	0x6b
+	.4byte	0x74
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF598
+	.byte	0x20
+	.byte	0x6c
+	.4byte	0x74
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF599
+	.byte	0x20
+	.byte	0x6d
+	.4byte	0x74
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF600
+	.byte	0x20
+	.byte	0x6e
+	.4byte	0x17a6
+	.byte	0x18
+	.uleb128 0xb
+	.ascii	"tbl\000"
+	.byte	0x20
+	.byte	0x6f
+	.4byte	0x29ea
+	.byte	0x20
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x29fa
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF601
+	.byte	0x10
+	.byte	0x20
+	.byte	0x73
+	.4byte	0x2a5a
+	.uleb128 0xa
+	.4byte	.LASF583
+	.byte	0x20
+	.byte	0x75
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0x76
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x77
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF577
+	.byte	0x20
+	.byte	0x78
+	.4byte	0x57
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF602
+	.byte	0x20
+	.byte	0x79
+	.4byte	0x57
+	.byte	0xa
+	.uleb128 0xa
+	.4byte	.LASF603
+	.byte	0x20
+	.byte	0x7a
+	.4byte	0x57
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF600
+	.byte	0x20
+	.byte	0x7b
+	.4byte	0x29a
+	.byte	0xe
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF604
+	.byte	0x10
+	.byte	0x20
+	.byte	0x7e
+	.4byte	0x2aa2
+	.uleb128 0xa
+	.4byte	.LASF583
+	.byte	0x20
+	.byte	0x80
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0x81
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x82
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xb
+	.ascii	"lpa\000"
+	.byte	0x20
+	.byte	0x83
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF605
+	.byte	0x20
+	.byte	0x84
+	.4byte	0x74
+	.byte	0xc
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF606
+	.byte	0x10
+	.byte	0x20
+	.byte	0x90
+	.4byte	0x2aea
+	.uleb128 0xa
+	.4byte	.LASF583
+	.byte	0x20
+	.byte	0x92
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0x93
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x94
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF607
+	.byte	0x20
+	.byte	0x95
+	.4byte	0x57
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF600
+	.byte	0x20
+	.byte	0x96
+	.4byte	0x3c9
+	.byte	0xa
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF608
+	.byte	0x10
+	.byte	0x20
+	.byte	0x99
+	.4byte	0x2b32
+	.uleb128 0xa
+	.4byte	.LASF583
+	.byte	0x20
+	.byte	0x9b
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0x9c
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+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF383
+	.byte	0x20
+	.byte	0x9d
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF609
+	.byte	0x20
+	.byte	0x9e
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+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF610
+	.byte	0x20
+	.byte	0x9f
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+	.byte	0xc
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF611
+	.byte	0x30
+	.byte	0x20
+	.byte	0xa2
+	.4byte	0x2c2f
+	.uleb128 0xb
+	.ascii	"tag\000"
+	.byte	0x20
+	.byte	0xa4
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xb
+	.ascii	"ver\000"
+	.byte	0x20
+	.byte	0xa5
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF581
+	.byte	0x20
+	.byte	0xa7
+	.4byte	0x57
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF612
+	.byte	0x20
+	.byte	0xa8
+	.4byte	0x3a
+	.byte	0xa
+	.uleb128 0xa
+	.4byte	.LASF613
+	.byte	0x20
+	.byte	0xa9
+	.4byte	0x3a
+	.byte	0xb
+	.uleb128 0xa
+	.4byte	.LASF614
+	.byte	0x20
+	.byte	0xaa
+	.4byte	0x3a
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF615
+	.byte	0x20
+	.byte	0xab
+	.4byte	0x3a
+	.byte	0xd
+	.uleb128 0xa
+	.4byte	.LASF616
+	.byte	0x20
+	.byte	0xac
+	.4byte	0x57
+	.byte	0xe
+	.uleb128 0xa
+	.4byte	.LASF617
+	.byte	0x20
+	.byte	0xae
+	.4byte	0x57
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF618
+	.byte	0x20
+	.byte	0xaf
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+	.byte	0x12
+	.uleb128 0xa
+	.4byte	.LASF619
+	.byte	0x20
+	.byte	0xb0
+	.4byte	0x57
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF620
+	.byte	0x20
+	.byte	0xb1
+	.4byte	0x57
+	.byte	0x16
+	.uleb128 0xa
+	.4byte	.LASF621
+	.byte	0x20
+	.byte	0xb3
+	.4byte	0x57
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF622
+	.byte	0x20
+	.byte	0xb4
+	.4byte	0x57
+	.byte	0x1a
+	.uleb128 0xa
+	.4byte	.LASF623
+	.byte	0x20
+	.byte	0xb5
+	.4byte	0x57
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF624
+	.byte	0x20
+	.byte	0xb6
+	.4byte	0x57
+	.byte	0x1e
+	.uleb128 0xa
+	.4byte	.LASF625
+	.byte	0x20
+	.byte	0xb8
+	.4byte	0x74
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF626
+	.byte	0x20
+	.byte	0xb9
+	.4byte	0x74
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF627
+	.byte	0x20
+	.byte	0xba
+	.4byte	0x74
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF600
+	.byte	0x20
+	.byte	0xbb
+	.4byte	0x29ea
+	.byte	0x2c
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF628
+	.2byte	0x200
+	.byte	0x20
+	.byte	0xbf
+	.4byte	0x2d75
+	.uleb128 0xb
+	.ascii	"tag\000"
+	.byte	0x20
+	.byte	0xc1
+	.4byte	0x74
+	.byte	0
+	.uleb128 0xb
+	.ascii	"ver\000"
+	.byte	0x20
+	.byte	0xc2
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF629
+	.byte	0x20
+	.byte	0xc4
+	.4byte	0x74
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF630
+	.byte	0x20
+	.byte	0xc5
+	.4byte	0x74
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF631
+	.byte	0x20
+	.byte	0xc6
+	.4byte	0x74
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF632
+	.byte	0x20
+	.byte	0xc7
+	.4byte	0x74
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF625
+	.byte	0x20
+	.byte	0xc9
+	.4byte	0x74
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF633
+	.byte	0x20
+	.byte	0xca
+	.4byte	0x74
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF634
+	.byte	0x20
+	.byte	0xcb
+	.4byte	0x74
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF635
+	.byte	0x20
+	.byte	0xcc
+	.4byte	0x74
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF622
+	.byte	0x20
+	.byte	0xce
+	.4byte	0x74
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF636
+	.byte	0x20
+	.byte	0xcf
+	.4byte	0x74
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF637
+	.byte	0x20
+	.byte	0xd0
+	.4byte	0x74
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF638
+	.byte	0x20
+	.byte	0xd1
+	.4byte	0x74
+	.byte	0x34
+	.uleb128 0xa
+	.4byte	.LASF639
+	.byte	0x20
+	.byte	0xd3
+	.4byte	0x74
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF640
+	.byte	0x20
+	.byte	0xd4
+	.4byte	0x74
+	.byte	0x3c
+	.uleb128 0xa
+	.4byte	.LASF641
+	.byte	0x20
+	.byte	0xd5
+	.4byte	0x74
+	.byte	0x40
+	.uleb128 0xa
+	.4byte	.LASF642
+	.byte	0x20
+	.byte	0xd6
+	.4byte	0x74
+	.byte	0x44
+	.uleb128 0xa
+	.4byte	.LASF643
+	.byte	0x20
+	.byte	0xd8
+	.4byte	0x74
+	.byte	0x48
+	.uleb128 0xa
+	.4byte	.LASF644
+	.byte	0x20
+	.byte	0xd9
+	.4byte	0x74
+	.byte	0x4c
+	.uleb128 0xa
+	.4byte	.LASF645
+	.byte	0x20
+	.byte	0xda
+	.4byte	0x74
+	.byte	0x50
+	.uleb128 0xa
+	.4byte	.LASF646
+	.byte	0x20
+	.byte	0xdb
+	.4byte	0x74
+	.byte	0x54
+	.uleb128 0xa
+	.4byte	.LASF647
+	.byte	0x20
+	.byte	0xdd
+	.4byte	0x74
+	.byte	0x58
+	.uleb128 0xa
+	.4byte	.LASF648
+	.byte	0x20
+	.byte	0xde
+	.4byte	0x74
+	.byte	0x5c
+	.uleb128 0xa
+	.4byte	.LASF649
+	.byte	0x20
+	.byte	0xdf
+	.4byte	0x74
+	.byte	0x60
+	.uleb128 0xa
+	.4byte	.LASF600
+	.byte	0x20
+	.byte	0xe1
+	.4byte	0x2d75
+	.byte	0x64
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x2d85
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x66
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF650
+	.byte	0x6
+	.byte	0x20
+	.byte	0xe5
+	.4byte	0x2db6
+	.uleb128 0xa
+	.4byte	.LASF333
+	.byte	0x20
+	.byte	0xe7
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF334
+	.byte	0x20
+	.byte	0xe8
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF651
+	.byte	0x20
+	.byte	0xe9
+	.4byte	0x57
+	.byte	0x4
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF652
+	.2byte	0x808
+	.byte	0x20
+	.byte	0xec
+	.4byte	0x2e00
+	.uleb128 0xb
+	.ascii	"max\000"
+	.byte	0x20
+	.byte	0xee
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF653
+	.byte	0x20
+	.byte	0xef
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF654
+	.byte	0x20
+	.byte	0xf0
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF602
+	.byte	0x20
+	.byte	0xf1
+	.4byte	0x57
+	.byte	0x6
+	.uleb128 0xb
+	.ascii	"arr\000"
+	.byte	0x20
+	.byte	0xf2
+	.4byte	0x2e00
+	.byte	0x8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x2e11
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x3ff
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF655
+	.byte	0x30
+	.byte	0x20
+	.byte	0xf6
+	.4byte	0x2ea4
+	.uleb128 0xb
+	.ascii	"id\000"
+	.byte	0x20
+	.byte	0xf8
+	.4byte	0x57
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF656
+	.byte	0x20
+	.byte	0xf9
+	.4byte	0x57
+	.byte	0x2
+	.uleb128 0xa
+	.4byte	.LASF657
+	.byte	0x20
+	.byte	0xfa
+	.4byte	0x57
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF658
+	.byte	0x20
+	.byte	0xfb
+	.4byte	0x3a
+	.byte	0x6
+	.uleb128 0xa
+	.4byte	.LASF659
+	.byte	0x20
+	.byte	0xfc
+	.4byte	0x3a
+	.byte	0x7
+	.uleb128 0xa
+	.4byte	.LASF660
+	.byte	0x20
+	.byte	0xfd
+	.4byte	0x3a
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF661
+	.byte	0x20
+	.byte	0xfe
+	.4byte	0x3a
+	.byte	0x9
+	.uleb128 0xa
+	.4byte	.LASF662
+	.byte	0x20
+	.byte	0xff
+	.4byte	0x3a
+	.byte	0xa
+	.uleb128 0x23
+	.4byte	.LASF663
+	.byte	0x20
+	.2byte	0x100
+	.4byte	0x3a
+	.byte	0xb
+	.uleb128 0x23
+	.4byte	.LASF383
+	.byte	0x20
+	.2byte	0x101
+	.4byte	0x74
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF664
+	.byte	0x20
+	.2byte	0x102
+	.4byte	0x2ea4
+	.byte	0x10
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x2eb4
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF665
+	.byte	0xc
+	.byte	0x20
+	.2byte	0x106
+	.4byte	0x2ee9
+	.uleb128 0x23
+	.4byte	.LASF666
+	.byte	0x20
+	.2byte	0x108
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF667
+	.byte	0x20
+	.2byte	0x109
+	.4byte	0x74
+	.byte	0x4
+	.uleb128 0x29
+	.ascii	"lpa\000"
+	.byte	0x20
+	.2byte	0x10a
+	.4byte	0x74
+	.byte	0x8
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF668
+	.byte	0xc
+	.byte	0x20
+	.2byte	0x10d
+	.4byte	0x2f1e
+	.uleb128 0x23
+	.4byte	.LASF17
+	.byte	0x20
+	.2byte	0x10f
+	.4byte	0x13e
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF18
+	.byte	0x20
+	.2byte	0x110
+	.4byte	0x13e
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF669
+	.byte	0x20
+	.2byte	0x111
+	.4byte	0x74
+	.byte	0x8
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF670
+	.byte	0x21
+	.byte	0x12
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_type
+	.uleb128 0x35
+	.4byte	.LASF671
+	.byte	0x21
+	.byte	0x13
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.uleb128 0x35
+	.4byte	.LASF672
+	.byte	0x21
+	.byte	0x14
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.uleb128 0x35
+	.4byte	.LASF673
+	.byte	0x21
+	.byte	0x15
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.uleb128 0x35
+	.4byte	.LASF674
+	.byte	0x21
+	.byte	0x16
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die_shift
+	.uleb128 0x35
+	.4byte	.LASF675
+	.byte	0x21
+	.byte	0x17
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_num
+	.uleb128 0x35
+	.4byte	.LASF676
+	.byte	0x21
+	.byte	0x18
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.uleb128 0x35
+	.4byte	.LASF677
+	.byte	0x21
+	.byte	0x19
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_ext_blk_pre_plane
+	.uleb128 0x35
+	.4byte	.LASF678
+	.byte	0x21
+	.byte	0x1a
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_bbm_buf_size
+	.uleb128 0x35
+	.4byte	.LASF679
+	.byte	0x21
+	.byte	0x1c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.uleb128 0x35
+	.4byte	.LASF680
+	.byte	0x21
+	.byte	0x1d
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_slc_blk
+	.uleb128 0x35
+	.4byte	.LASF681
+	.byte	0x21
+	.byte	0x1e
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_super_blk
+	.uleb128 0x35
+	.4byte	.LASF682
+	.byte	0x21
+	.byte	0x1f
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.uleb128 0x35
+	.4byte	.LASF683
+	.byte	0x21
+	.byte	0x20
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.uleb128 0x35
+	.4byte	.LASF684
+	.byte	0x21
+	.byte	0x26
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.uleb128 0x35
+	.4byte	.LASF685
+	.byte	0x21
+	.byte	0x27
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_oob
+	.uleb128 0x35
+	.4byte	.LASF686
+	.byte	0x21
+	.byte	0x28
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_reserved_blks
+	.uleb128 0x35
+	.4byte	.LASF687
+	.byte	0x21
+	.byte	0x29
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_totle_phy_blks
+	.uleb128 0x35
+	.4byte	.LASF688
+	.byte	0x21
+	.byte	0x2b
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.uleb128 0x35
+	.4byte	.LASF689
+	.byte	0x21
+	.byte	0x2c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.uleb128 0x35
+	.4byte	.LASF690
+	.byte	0x21
+	.byte	0x2e
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_vendor_region_num
+	.uleb128 0x35
+	.4byte	.LASF691
+	.byte	0x21
+	.byte	0x30
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_map_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF692
+	.byte	0x21
+	.byte	0x31
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.uleb128 0x35
+	.4byte	.LASF693
+	.byte	0x21
+	.byte	0x32
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_vendor_blks
+	.uleb128 0x35
+	.4byte	.LASF694
+	.byte	0x21
+	.byte	0x33
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_vendor_part_size
+	.uleb128 0x35
+	.4byte	.LASF695
+	.byte	0x21
+	.byte	0x34
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF696
+	.byte	0x21
+	.byte	0x35
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_init_sys_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF697
+	.byte	0x21
+	.byte	0x36
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_sys_blks
+	.uleb128 0x35
+	.4byte	.LASF698
+	.byte	0x21
+	.byte	0x37
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF699
+	.byte	0x21
+	.byte	0x38
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_data_op_blks_per_plane
+	.uleb128 0x35
+	.4byte	.LASF700
+	.byte	0x21
+	.byte	0x39
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_max_data_blks
+	.uleb128 0x35
+	.4byte	.LASF701
+	.byte	0x21
+	.byte	0x3a
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_power_lost_recovery_flag
+	.uleb128 0x35
+	.4byte	.LASF702
+	.byte	0x21
+	.byte	0x3c
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalSysVersion
+	.uleb128 0x35
+	.4byte	.LASF703
+	.byte	0x21
+	.byte	0x3d
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_GlobalDataVersion
+	.uleb128 0x35
+	.4byte	.LASF704
+	.byte	0x21
+	.byte	0x3e
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbaSector
+	.uleb128 0x35
+	.4byte	.LASF705
+	.byte	0x21
+	.byte	0x3f
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLpn
+	.uleb128 0x35
+	.4byte	.LASF706
+	.byte	0x21
+	.byte	0x40
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_VaildLpn
+	.uleb128 0x35
+	.4byte	.LASF707
+	.byte	0x21
+	.byte	0x41
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_MaxLbn
+	.uleb128 0x35
+	.4byte	.LASF708
+	.byte	0x21
+	.byte	0x42
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_SlcPartLbaEndSector
+	.uleb128 0x35
+	.4byte	.LASF709
+	.byte	0x21
+	.byte	0x43
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_inkDie_check_enable
+	.uleb128 0x35
+	.4byte	.LASF710
+	.byte	0x21
+	.byte	0x44
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_flash_read_only_en
+	.uleb128 0x35
+	.4byte	.LASF711
+	.byte	0x21
+	.byte	0x46
+	.4byte	0x27bd
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gBbtInfo
+	.uleb128 0x35
+	.4byte	.LASF712
+	.byte	0x21
+	.byte	0x47
+	.4byte	0x283d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysInfo
+	.uleb128 0x35
+	.4byte	.LASF713
+	.byte	0x21
+	.byte	0x48
+	.4byte	0x2db6
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.uleb128 0x35
+	.4byte	.LASF714
+	.byte	0x21
+	.byte	0x49
+	.4byte	0x2885
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gL2pMapInfo
+	.uleb128 0x35
+	.4byte	.LASF715
+	.byte	0x21
+	.byte	0x4a
+	.4byte	0x2885
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gVendorBlkInfo
+	.uleb128 0x35
+	.4byte	.LASF716
+	.byte	0x21
+	.byte	0x4b
+	.4byte	0xc5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_sys
+	.uleb128 0x35
+	.4byte	.LASF717
+	.byte	0x21
+	.byte	0x4c
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_read
+	.uleb128 0x35
+	.4byte	.LASF718
+	.byte	0x21
+	.byte	0x4d
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_prgm
+	.uleb128 0x35
+	.4byte	.LASF719
+	.byte	0x21
+	.byte	0x4e
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_erase
+	.uleb128 0x35
+	.4byte	.LASF720
+	.byte	0x21
+	.byte	0x4f
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc
+	.uleb128 0x35
+	.4byte	.LASF721
+	.byte	0x21
+	.byte	0x50
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	req_gc_dst
+	.uleb128 0x35
+	.4byte	.LASF722
+	.byte	0x21
+	.byte	0x52
+	.4byte	0x676
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_req_cache
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x32b3
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF723
+	.byte	0x21
+	.byte	0x54
+	.4byte	0x32a3
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_plane_order_table
+	.uleb128 0x35
+	.4byte	.LASF724
+	.byte	0x21
+	.byte	0x5e
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf
+	.uleb128 0x35
+	.4byte	.LASF725
+	.byte	0x21
+	.byte	0x5f
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_data_buf_1
+	.uleb128 0x35
+	.4byte	.LASF726
+	.byte	0x21
+	.byte	0x60
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_data_buf
+	.uleb128 0x35
+	.4byte	.LASF727
+	.byte	0x21
+	.byte	0x61
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_sys_spare_buf
+	.uleb128 0x35
+	.4byte	.LASF728
+	.byte	0x21
+	.byte	0x62
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_0
+	.uleb128 0x35
+	.4byte	.LASF729
+	.byte	0x21
+	.byte	0x63
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_data_buf_1
+	.uleb128 0x35
+	.4byte	.LASF730
+	.byte	0x21
+	.byte	0x64
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_io_spare_buf
+	.uleb128 0x35
+	.4byte	.LASF731
+	.byte	0x21
+	.byte	0x65
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_spare_buf
+	.uleb128 0x35
+	.4byte	.LASF732
+	.byte	0x21
+	.byte	0x66
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_data_buf
+	.uleb128 0x35
+	.4byte	.LASF733
+	.byte	0x21
+	.byte	0x67
+	.4byte	0x336e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_gc_page_buf_info
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2ee9
+	.uleb128 0x35
+	.4byte	.LASF734
+	.byte	0x21
+	.byte	0x68
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_gc_page_buf_num
+	.uleb128 0x35
+	.4byte	.LASF735
+	.byte	0x21
+	.byte	0x69
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_num_req
+	.uleb128 0x35
+	.4byte	.LASF736
+	.byte	0x21
+	.byte	0x6b
+	.4byte	0x33a7
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_ect_tbl_info
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x297d
+	.uleb128 0x35
+	.4byte	.LASF737
+	.byte	0x21
+	.byte	0x6c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_info_size
+	.uleb128 0x35
+	.4byte	.LASF738
+	.byte	0x21
+	.byte	0x70
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_erase_count_table
+	.uleb128 0x35
+	.4byte	.LASF739
+	.byte	0x21
+	.byte	0x72
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_swl_mul_table
+	.uleb128 0x35
+	.4byte	.LASF740
+	.byte	0x21
+	.byte	0x73
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_swl_count
+	.uleb128 0x35
+	.4byte	.LASF741
+	.byte	0x21
+	.byte	0x74
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.uleb128 0x35
+	.4byte	.LASF742
+	.byte	0x21
+	.byte	0x75
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_valid_page_count_check_table
+	.uleb128 0x35
+	.4byte	.LASF743
+	.byte	0x21
+	.byte	0x76
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_blk_mode_table
+	.uleb128 0x35
+	.4byte	.LASF744
+	.byte	0x21
+	.byte	0x78
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_table
+	.uleb128 0x35
+	.4byte	.LASF745
+	.byte	0x21
+	.byte	0x79
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_valid_page_count
+	.uleb128 0x35
+	.4byte	.LASF746
+	.byte	0x21
+	.byte	0x7a
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_block_ver_table
+	.uleb128 0x35
+	.4byte	.LASF747
+	.byte	0x21
+	.byte	0x7b
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_region_ppn_table
+	.uleb128 0x35
+	.4byte	.LASF748
+	.byte	0x21
+	.byte	0x7c
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_map_region_ppn_check_table
+	.uleb128 0x35
+	.4byte	.LASF749
+	.byte	0x21
+	.byte	0x7d
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_map_block
+	.uleb128 0x35
+	.4byte	.LASF750
+	.byte	0x21
+	.byte	0x7f
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_table
+	.uleb128 0x35
+	.4byte	.LASF751
+	.byte	0x21
+	.byte	0x80
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_valid_page_count
+	.uleb128 0x35
+	.4byte	.LASF752
+	.byte	0x21
+	.byte	0x81
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_block_ver_table
+	.uleb128 0x35
+	.4byte	.LASF753
+	.byte	0x21
+	.byte	0x82
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_vendor_region_ppn_table
+	.uleb128 0x35
+	.4byte	.LASF754
+	.byte	0x21
+	.byte	0x83
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_vendor_block
+	.uleb128 0x35
+	.4byte	.LASF755
+	.byte	0x21
+	.byte	0x85
+	.4byte	0x34f0
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_ram_map
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2940
+	.uleb128 0x35
+	.4byte	.LASF756
+	.byte	0x21
+	.byte	0x86
+	.4byte	0x13e
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_l2p_map_buf
+	.uleb128 0x35
+	.4byte	.LASF757
+	.byte	0x21
+	.byte	0x87
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_l2p_last_update_region_id
+	.uleb128 0x35
+	.4byte	.LASF758
+	.byte	0x21
+	.byte	0x8e
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2d85
+	.uleb128 0x35
+	.4byte	.LASF759
+	.byte	0x21
+	.byte	0x8f
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_free_data_block_list_head
+	.uleb128 0x35
+	.4byte	.LASF760
+	.byte	0x21
+	.byte	0x91
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_head
+	.uleb128 0x35
+	.4byte	.LASF761
+	.byte	0x21
+	.byte	0x92
+	.4byte	0x3529
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_data_block_list_tail
+	.uleb128 0x35
+	.4byte	.LASF762
+	.byte	0x21
+	.byte	0x93
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.uleb128 0x35
+	.4byte	.LASF763
+	.byte	0x21
+	.byte	0x94
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.uleb128 0x35
+	.4byte	.LASF764
+	.byte	0x21
+	.byte	0x95
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_active_superblock
+	.uleb128 0x35
+	.4byte	.LASF765
+	.byte	0x21
+	.byte	0x96
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.uleb128 0x35
+	.4byte	.LASF766
+	.byte	0x21
+	.byte	0x97
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.uleb128 0x35
+	.4byte	.LASF767
+	.byte	0x21
+	.byte	0x98
+	.4byte	0x2e11
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_superblock
+	.uleb128 0x35
+	.4byte	.LASF768
+	.byte	0x21
+	.byte	0x99
+	.4byte	0x35d9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gp_last_act_superblock
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2e11
+	.uleb128 0x35
+	.4byte	.LASF769
+	.byte	0x21
+	.byte	0x9a
+	.4byte	0x2b32
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_save_data
+	.uleb128 0x35
+	.4byte	.LASF770
+	.byte	0x21
+	.byte	0x9b
+	.4byte	0x2c2f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_sys_ext_data
+	.uleb128 0x35
+	.4byte	.LASF771
+	.byte	0x21
+	.byte	0x9d
+	.4byte	0x3612
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_page_info
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2eb4
+	.uleb128 0x35
+	.4byte	.LASF772
+	.byte	0x21
+	.byte	0x9e
+	.4byte	0x293a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	p_gc_blk_tbl
+	.uleb128 0x35
+	.4byte	.LASF773
+	.byte	0x21
+	.byte	0x9f
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_num
+	.uleb128 0x35
+	.4byte	.LASF774
+	.byte	0x21
+	.byte	0xa0
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_page_offset
+	.uleb128 0x35
+	.4byte	.LASF775
+	.byte	0x21
+	.byte	0xa1
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_valid_pages
+	.uleb128 0x35
+	.4byte	.LASF776
+	.byte	0x21
+	.byte	0xa2
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_cur_blk_max_valid_pages
+	.uleb128 0x35
+	.4byte	.LASF777
+	.byte	0x21
+	.byte	0xa3
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk
+	.uleb128 0x35
+	.4byte	.LASF778
+	.byte	0x21
+	.byte	0xa4
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_next_blk_1
+	.uleb128 0x35
+	.4byte	.LASF779
+	.byte	0x21
+	.byte	0xa5
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_num
+	.uleb128 0x35
+	.4byte	.LASF780
+	.byte	0x21
+	.byte	0xa6
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_gc_index
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x36c1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x10
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF781
+	.byte	0x21
+	.byte	0xa7
+	.4byte	0x36b1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_bad_block_temp_tbl
+	.uleb128 0x35
+	.4byte	.LASF782
+	.byte	0x21
+	.byte	0xa8
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_refresh_block_temp_num
+	.uleb128 0x35
+	.4byte	.LASF783
+	.byte	0x21
+	.byte	0xa9
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_free_slc_blk_num
+	.uleb128 0x35
+	.4byte	.LASF784
+	.byte	0x21
+	.byte	0xaa
+	.4byte	0x36b1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_refresh_block_temp_tbl
+	.uleb128 0x35
+	.4byte	.LASF785
+	.byte	0x21
+	.byte	0xac
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_free_blk_threshold
+	.uleb128 0x35
+	.4byte	.LASF786
+	.byte	0x21
+	.byte	0xad
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_merge_free_blk_threshold
+	.uleb128 0x35
+	.4byte	.LASF787
+	.byte	0x21
+	.byte	0xae
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_blk_index
+	.uleb128 0x35
+	.4byte	.LASF788
+	.byte	0x21
+	.byte	0xb0
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_gc_page_count
+	.uleb128 0x35
+	.4byte	.LASF789
+	.byte	0x21
+	.byte	0xb1
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_page_count
+	.uleb128 0x35
+	.4byte	.LASF790
+	.byte	0x21
+	.byte	0xb2
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_write_sector
+	.uleb128 0x35
+	.4byte	.LASF791
+	.byte	0x21
+	.byte	0xb3
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_sector
+	.uleb128 0x35
+	.4byte	.LASF792
+	.byte	0x21
+	.byte	0xb5
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_discard_page_count
+	.uleb128 0x35
+	.4byte	.LASF793
+	.byte	0x21
+	.byte	0xb6
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_read_page_count
+	.uleb128 0x35
+	.4byte	.LASF794
+	.byte	0x21
+	.byte	0xb7
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_tmp_data_superblock_id
+	.uleb128 0x35
+	.4byte	.LASF795
+	.byte	0x21
+	.byte	0xb8
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_cache_write_count
+	.uleb128 0x35
+	.4byte	.LASF796
+	.byte	0x21
+	.byte	0xb9
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_l2p_write_count
+	.uleb128 0x35
+	.4byte	.LASF797
+	.byte	0x21
+	.byte	0xbb
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_mlc_erase_count
+	.uleb128 0x35
+	.4byte	.LASF798
+	.byte	0x21
+	.byte	0xbc
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_avg_erase_count
+	.uleb128 0x35
+	.4byte	.LASF799
+	.byte	0x21
+	.byte	0xbd
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_min_erase_count
+	.uleb128 0x35
+	.4byte	.LASF800
+	.byte	0x21
+	.byte	0xbe
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_slc_erase_count
+	.uleb128 0x35
+	.4byte	.LASF801
+	.byte	0x21
+	.byte	0xbf
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_totle_sys_slc_erase_count
+	.uleb128 0x35
+	.4byte	.LASF802
+	.byte	0x21
+	.byte	0xc0
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_max_erase_count
+	.uleb128 0x35
+	.4byte	.LASF803
+	.byte	0x21
+	.byte	0xc1
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_all_blk_used_slc_mode
+	.uleb128 0x35
+	.4byte	.LASF804
+	.byte	0x21
+	.byte	0xc3
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_gc_progress
+	.uleb128 0x35
+	.4byte	.LASF805
+	.byte	0x21
+	.byte	0xc4
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_in_swl_replace
+	.uleb128 0x35
+	.4byte	.LASF806
+	.byte	0x21
+	.byte	0xc5
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ftl_nand_free_count
+	.uleb128 0x35
+	.4byte	.LASF807
+	.byte	0x21
+	.byte	0xc6
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block
+	.uleb128 0x35
+	.4byte	.LASF808
+	.byte	0x21
+	.byte	0xc7
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_head_data_block_count
+	.uleb128 0x35
+	.4byte	.LASF809
+	.byte	0x21
+	.byte	0xc8
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_gc_skip_write_count
+	.uleb128 0x35
+	.4byte	.LASF810
+	.byte	0x21
+	.byte	0xc9
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_cur_erase_blk
+	.uleb128 0x35
+	.4byte	.LASF811
+	.byte	0x21
+	.byte	0xcb
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_num
+	.uleb128 0x35
+	.4byte	.LASF812
+	.byte	0x21
+	.byte	0xcc
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_page_min_ver
+	.uleb128 0x6
+	.4byte	0x74
+	.4byte	0x38f1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF813
+	.byte	0x21
+	.byte	0xcd
+	.4byte	0x38e1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_recovery_ppa_tbl
+	.uleb128 0x35
+	.4byte	.LASF814
+	.byte	0x21
+	.byte	0xce
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	c_mlc_erase_count_value
+	.uleb128 0x35
+	.4byte	.LASF815
+	.byte	0x21
+	.byte	0xcf
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_power_lost_recovery_flag
+	.uleb128 0x35
+	.4byte	.LASF816
+	.byte	0x21
+	.byte	0xd0
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_power_lost_ecc_error_blk
+	.uleb128 0x35
+	.4byte	.LASF817
+	.byte	0x21
+	.byte	0xd1
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_page_map_check_enable
+	.uleb128 0x8
+	.4byte	.LASF818
+	.byte	0x22
+	.byte	0xe
+	.4byte	0x74
+	.uleb128 0x6
+	.4byte	0x2c1
+	.4byte	0x3961
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x36
+	.4byte	.LASF101
+	.byte	0x2
+	.byte	0x10
+	.4byte	0x3951
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	NandOptPara
+	.uleb128 0x6
+	.4byte	0x3e9
+	.4byte	0x3982
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x49
+	.byte	0
+	.uleb128 0x36
+	.4byte	.LASF819
+	.byte	0x2
+	.byte	0x5f
+	.4byte	0x3972
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	NandFlashParaTbl
+	.uleb128 0x37
+	.4byte	0xa80
+	.byte	0x2
+	.byte	0xca
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gNandParaInfo
+	.uleb128 0x35
+	.4byte	.LASF820
+	.byte	0x2
+	.byte	0xcb
+	.4byte	0x3e9
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gSlcNandParaInfo
+	.uleb128 0x6
+	.4byte	0x57
+	.4byte	0x39c1
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF821
+	.byte	0x2
+	.byte	0xdb
+	.4byte	0x39b1
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	random_seed
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x39e8
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x6
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF822
+	.byte	0x2
+	.2byte	0x547
+	.4byte	0x39d2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	refValueDefault
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a10
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x3
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF823
+	.byte	0x2
+	.2byte	0x644
+	.4byte	0x39fa
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	SamsungRefValue
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a38
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x4
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF824
+	.byte	0x2
+	.2byte	0x65a
+	.4byte	0x3a22
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ToshibaA19RefValue
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a60
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x12
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x4
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF825
+	.byte	0x2
+	.2byte	0x670
+	.4byte	0x3a4a
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	Toshiba15RefValue
+	.uleb128 0x6
+	.4byte	0x45
+	.4byte	0x3a82
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x15
+	.4byte	.LASF826
+	.byte	0x2
+	.2byte	0x688
+	.4byte	0x3a72
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ToshibaRefValue
+	.uleb128 0x35
+	.4byte	.LASF827
+	.byte	0x4
+	.byte	0x6
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	DeviceCapacity
+	.uleb128 0x35
+	.4byte	.LASF828
+	.byte	0x4
+	.byte	0x7
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gFtlInitStatus
+	.uleb128 0x16
+	.4byte	0x3946
+	.byte	0x4
+	.2byte	0x38f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_LowFormat
+	.uleb128 0x15
+	.4byte	.LASF829
+	.byte	0x4
+	.2byte	0x638
+	.4byte	0x8f
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	power_up_flag
+	.uleb128 0x38
+	.4byte	.LASF830
+	.byte	0x4
+	.2byte	0x6f1
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_discard_updated
+	.uleb128 0x15
+	.4byte	.LASF831
+	.byte	0x1
+	.2byte	0x3da
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	g_ect_tbl_power_up_flush
+	.uleb128 0x15
+	.4byte	.LASF832
+	.byte	0x1
+	.2byte	0x3f0
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlUpdateVaildLpnCount
+	.uleb128 0x36
+	.4byte	.LASF833
+	.byte	0x6
+	.byte	0x6c
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	ftl_gc_temp_block_bops_scan_page_addr
+	.uleb128 0x15
+	.4byte	.LASF834
+	.byte	0x6
+	.2byte	0x213
+	.4byte	0x57
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	gc_ink_free_return_value
+	.uleb128 0x19
+	.4byte	.LASF835
+	.byte	0x23
+	.2byte	0x3ba
+	.4byte	0x1aa8
+	.uleb128 0x19
+	.4byte	.LASF836
+	.byte	0x23
+	.2byte	0x3bb
+	.4byte	0x1aa8
+	.uleb128 0x19
+	.4byte	.LASF837
+	.byte	0x23
+	.2byte	0x3bc
+	.4byte	0x1aa8
+	.uleb128 0x39
+	.4byte	.LASF1582
+	.byte	0
+	.byte	0x8
+	.byte	0x9
+	.uleb128 0x3
+	.4byte	.LASF838
+	.byte	0x8
+	.byte	0xa
+	.4byte	0x3b53
+	.uleb128 0x9
+	.4byte	.LASF839
+	.byte	0x4
+	.byte	0x8
+	.byte	0xc
+	.4byte	0x3b7f
+	.uleb128 0xb
+	.ascii	"pid\000"
+	.byte	0x8
+	.byte	0xd
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF840
+	.byte	0x8
+	.byte	0x10
+	.4byte	0x3b8a
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3b66
+	.uleb128 0x9
+	.4byte	.LASF841
+	.byte	0x4
+	.byte	0x8
+	.byte	0x57
+	.4byte	0x3ba8
+	.uleb128 0xb
+	.ascii	"sz\000"
+	.byte	0x8
+	.byte	0x57
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x3
+	.4byte	.LASF842
+	.byte	0x8
+	.byte	0xd8
+	.4byte	0x3b5b
+	.uleb128 0x9
+	.4byte	.LASF843
+	.byte	0x4
+	.byte	0x8
+	.byte	0xfa
+	.4byte	0x3bca
+	.uleb128 0xb
+	.ascii	"i\000"
+	.byte	0x8
+	.byte	0xfa
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF844
+	.byte	0x18
+	.byte	0x8
+	.byte	0xff
+	.4byte	0x3c25
+	.uleb128 0x23
+	.4byte	.LASF845
+	.byte	0x8
+	.2byte	0x100
+	.4byte	0x3c25
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF846
+	.byte	0x8
+	.2byte	0x101
+	.4byte	0x3c30
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF847
+	.byte	0x8
+	.2byte	0x102
+	.4byte	0x1a61
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF848
+	.byte	0x8
+	.2byte	0x103
+	.4byte	0x3c41
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF849
+	.byte	0x8
+	.2byte	0x105
+	.4byte	0x1aea
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF850
+	.byte	0x8
+	.2byte	0x106
+	.4byte	0x1aea
+	.byte	0x14
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3bca
+	.uleb128 0x2c
+	.4byte	.LASF846
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3c2b
+	.uleb128 0x33
+	.4byte	0x3c41
+	.uleb128 0x18
+	.4byte	0x3c25
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3c36
+	.uleb128 0x28
+	.4byte	.LASF852
+	.byte	0x4
+	.byte	0x8
+	.2byte	0x108
+	.4byte	0x3c60
+	.uleb128 0x29
+	.ascii	"i\000"
+	.byte	0x8
+	.2byte	0x108
+	.4byte	0x8f
+	.byte	0
+	.byte	0
+	.uleb128 0x28
+	.4byte	.LASF853
+	.byte	0x8
+	.byte	0x8
+	.2byte	0x10b
+	.4byte	0x3c88
+	.uleb128 0x23
+	.4byte	.LASF854
+	.byte	0x8
+	.2byte	0x10c
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x8
+	.2byte	0x10d
+	.4byte	0x1a61
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF855
+	.byte	0xc
+	.byte	0x24
+	.byte	0x19
+	.4byte	0x3cb9
+	.uleb128 0xa
+	.4byte	.LASF856
+	.byte	0x24
+	.byte	0x1a
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF857
+	.byte	0x24
+	.byte	0x1b
+	.4byte	0x3cb9
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF858
+	.byte	0x24
+	.byte	0x1c
+	.4byte	0x3cb9
+	.byte	0x8
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3c88
+	.uleb128 0x9
+	.4byte	.LASF859
+	.byte	0x4
+	.byte	0x24
+	.byte	0x20
+	.4byte	0x3cd8
+	.uleb128 0xa
+	.4byte	.LASF855
+	.byte	0x24
+	.byte	0x21
+	.4byte	0x3cb9
+	.byte	0
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF860
+	.byte	0xc
+	.byte	0x25
+	.byte	0x87
+	.4byte	0x3d09
+	.uleb128 0xa
+	.4byte	.LASF176
+	.byte	0x25
+	.byte	0x88
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF861
+	.byte	0x25
+	.byte	0x89
+	.4byte	0x19db
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF862
+	.byte	0x25
+	.byte	0x8a
+	.4byte	0x19db
+	.byte	0x8
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF863
+	.byte	0x8
+	.byte	0x25
+	.byte	0xd1
+	.4byte	0x3d2e
+	.uleb128 0xa
+	.4byte	.LASF864
+	.byte	0x25
+	.byte	0xd2
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF861
+	.byte	0x25
+	.byte	0xd3
+	.4byte	0x19db
+	.byte	0x4
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF865
+	.byte	0x10
+	.byte	0x25
+	.byte	0xef
+	.4byte	0x3d6b
+	.uleb128 0xa
+	.4byte	.LASF866
+	.byte	0x25
+	.byte	0xf0
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF867
+	.byte	0x25
+	.byte	0xf1
+	.4byte	0x19db
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF868
+	.byte	0x25
+	.byte	0xf2
+	.4byte	0x19db
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF869
+	.byte	0x25
+	.byte	0xf3
+	.4byte	0x19db
+	.byte	0xc
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF870
+	.byte	0x48
+	.byte	0x26
+	.byte	0x2a
+	.4byte	0x3e14
+	.uleb128 0xb
+	.ascii	"mtd\000"
+	.byte	0x26
+	.byte	0x2b
+	.4byte	0x4067
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF201
+	.byte	0x26
+	.byte	0x2c
+	.4byte	0x1ac9
+	.byte	0x8
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0x26
+	.byte	0x2d
+	.4byte	0x1ac9
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF871
+	.byte	0x26
+	.byte	0x2e
+	.4byte	0x1ac9
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF872
+	.byte	0x26
+	.byte	0x2f
+	.4byte	0x1a92
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF873
+	.byte	0x26
+	.byte	0x30
+	.4byte	0x1a92
+	.byte	0x24
+	.uleb128 0xb
+	.ascii	"dev\000"
+	.byte	0x26
+	.byte	0x31
+	.4byte	0x2c
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF874
+	.byte	0x26
+	.byte	0x32
+	.4byte	0x2c
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF875
+	.byte	0x26
+	.byte	0x33
+	.4byte	0x407e
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF543
+	.byte	0x26
+	.byte	0x34
+	.4byte	0x1a92
+	.byte	0x34
+	.uleb128 0xa
+	.4byte	.LASF438
+	.byte	0x26
+	.byte	0x35
+	.4byte	0x1a82
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF333
+	.byte	0x26
+	.byte	0x36
+	.4byte	0x4078
+	.byte	0x3c
+	.uleb128 0xa
+	.4byte	.LASF876
+	.byte	0x26
+	.byte	0x37
+	.4byte	0x8f
+	.byte	0x40
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF877
+	.byte	0xd0
+	.byte	0x26
+	.byte	0x7a
+	.4byte	0x4067
+	.uleb128 0xa
+	.4byte	.LASF409
+	.byte	0x26
+	.byte	0x7b
+	.4byte	0x1a82
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF878
+	.byte	0x26
+	.byte	0x7c
+	.4byte	0x1abe
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF338
+	.byte	0x26
+	.byte	0x7d
+	.4byte	0x1ac9
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF879
+	.byte	0x26
+	.byte	0x83
+	.4byte	0x1abe
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF880
+	.byte	0x26
+	.byte	0x8b
+	.4byte	0x1abe
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF881
+	.byte	0x26
+	.byte	0x96
+	.4byte	0x1abe
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF882
+	.byte	0x26
+	.byte	0x98
+	.4byte	0x1abe
+	.byte	0x1c
+	.uleb128 0xa
+	.4byte	.LASF883
+	.byte	0x26
+	.byte	0x99
+	.4byte	0x1abe
+	.byte	0x20
+	.uleb128 0xa
+	.4byte	.LASF884
+	.byte	0x26
+	.byte	0x9f
+	.4byte	0x2c
+	.byte	0x24
+	.uleb128 0xa
+	.4byte	.LASF885
+	.byte	0x26
+	.byte	0xa0
+	.4byte	0x2c
+	.byte	0x28
+	.uleb128 0xa
+	.4byte	.LASF886
+	.byte	0x26
+	.byte	0xa2
+	.4byte	0x2c
+	.byte	0x2c
+	.uleb128 0xa
+	.4byte	.LASF887
+	.byte	0x26
+	.byte	0xa3
+	.4byte	0x2c
+	.byte	0x30
+	.uleb128 0xa
+	.4byte	.LASF888
+	.byte	0x26
+	.byte	0xac
+	.4byte	0x2c
+	.byte	0x34
+	.uleb128 0xa
+	.4byte	.LASF336
+	.byte	0x26
+	.byte	0xb2
+	.4byte	0x1a50
+	.byte	0x38
+	.uleb128 0xa
+	.4byte	.LASF542
+	.byte	0x26
+	.byte	0xb4
+	.4byte	0x8f
+	.byte	0x3c
+	.uleb128 0xa
+	.4byte	.LASF889
+	.byte	0x26
+	.byte	0xb7
+	.4byte	0x4195
+	.byte	0x40
+	.uleb128 0xa
+	.4byte	.LASF890
+	.byte	0x26
+	.byte	0xba
+	.4byte	0x2c
+	.byte	0x44
+	.uleb128 0xa
+	.4byte	.LASF891
+	.byte	0x26
+	.byte	0xbd
+	.4byte	0x2c
+	.byte	0x48
+	.uleb128 0xa
+	.4byte	.LASF892
+	.byte	0x26
+	.byte	0xc2
+	.4byte	0x8f
+	.byte	0x4c
+	.uleb128 0xa
+	.4byte	.LASF893
+	.byte	0x26
+	.byte	0xc3
+	.4byte	0x419b
+	.byte	0x50
+	.uleb128 0xa
+	.4byte	.LASF894
+	.byte	0x26
+	.byte	0xc9
+	.4byte	0x41b5
+	.byte	0x54
+	.uleb128 0xa
+	.4byte	.LASF895
+	.byte	0x26
+	.byte	0xcf
+	.4byte	0x41d9
+	.byte	0x58
+	.uleb128 0xa
+	.4byte	.LASF896
+	.byte	0x26
+	.byte	0xd3
+	.4byte	0x420e
+	.byte	0x5c
+	.uleb128 0xa
+	.4byte	.LASF897
+	.byte	0x26
+	.byte	0xd5
+	.4byte	0x423d
+	.byte	0x60
+	.uleb128 0xa
+	.4byte	.LASF898
+	.byte	0x26
+	.byte	0xd7
+	.4byte	0x423d
+	.byte	0x64
+	.uleb128 0xa
+	.4byte	.LASF899
+	.byte	0x26
+	.byte	0xd9
+	.4byte	0x4262
+	.byte	0x68
+	.uleb128 0xa
+	.4byte	.LASF900
+	.byte	0x26
+	.byte	0xdb
+	.4byte	0x4262
+	.byte	0x6c
+	.uleb128 0xa
+	.4byte	.LASF901
+	.byte	0x26
+	.byte	0xdd
+	.4byte	0x428c
+	.byte	0x70
+	.uleb128 0xa
+	.4byte	.LASF902
+	.byte	0x26
+	.byte	0xdf
+	.4byte	0x420e
+	.byte	0x74
+	.uleb128 0xa
+	.4byte	.LASF903
+	.byte	0x26
+	.byte	0xe1
+	.4byte	0x428c
+	.byte	0x78
+	.uleb128 0xa
+	.4byte	.LASF904
+	.byte	0x26
+	.byte	0xe3
+	.4byte	0x420e
+	.byte	0x7c
+	.uleb128 0xa
+	.4byte	.LASF905
+	.byte	0x26
+	.byte	0xe5
+	.4byte	0x420e
+	.byte	0x80
+	.uleb128 0xa
+	.4byte	.LASF906
+	.byte	0x26
+	.byte	0xe7
+	.4byte	0x42ab
+	.byte	0x84
+	.uleb128 0xa
+	.4byte	.LASF907
+	.byte	0x26
+	.byte	0xed
+	.4byte	0x42bc
+	.byte	0x88
+	.uleb128 0xa
+	.4byte	.LASF908
+	.byte	0x26
+	.byte	0xee
+	.4byte	0x42db
+	.byte	0x8c
+	.uleb128 0xa
+	.4byte	.LASF909
+	.byte	0x26
+	.byte	0xef
+	.4byte	0x42db
+	.byte	0x90
+	.uleb128 0xa
+	.4byte	.LASF910
+	.byte	0x26
+	.byte	0xf0
+	.4byte	0x42db
+	.byte	0x94
+	.uleb128 0xa
+	.4byte	.LASF911
+	.byte	0x26
+	.byte	0xf1
+	.4byte	0x42f5
+	.byte	0x98
+	.uleb128 0xa
+	.4byte	.LASF912
+	.byte	0x26
+	.byte	0xf2
+	.4byte	0x42f5
+	.byte	0x9c
+	.uleb128 0xa
+	.4byte	.LASF913
+	.byte	0x26
+	.byte	0xf3
+	.4byte	0x42f5
+	.byte	0xa0
+	.uleb128 0xa
+	.4byte	.LASF914
+	.byte	0x26
+	.byte	0xfd
+	.4byte	0x430a
+	.byte	0xa4
+	.uleb128 0xa
+	.4byte	.LASF915
+	.byte	0x26
+	.byte	0xfe
+	.4byte	0x42bc
+	.byte	0xa8
+	.uleb128 0x23
+	.4byte	.LASF916
+	.byte	0x26
+	.2byte	0x10a
+	.4byte	0x3d2e
+	.byte	0xac
+	.uleb128 0x23
+	.4byte	.LASF917
+	.byte	0x26
+	.2byte	0x10c
+	.4byte	0x8f
+	.byte	0xbc
+	.uleb128 0x23
+	.4byte	.LASF543
+	.byte	0x26
+	.2byte	0x10e
+	.4byte	0x1aea
+	.byte	0xc0
+	.uleb128 0x23
+	.4byte	.LASF854
+	.byte	0x26
+	.2byte	0x110
+	.4byte	0x4315
+	.byte	0xc4
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x26
+	.2byte	0x114
+	.4byte	0x1b42
+	.byte	0xc8
+	.uleb128 0x23
+	.4byte	.LASF918
+	.byte	0x26
+	.2byte	0x116
+	.4byte	0x8f
+	.byte	0xcc
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3e14
+	.uleb128 0x33
+	.4byte	0x4078
+	.uleb128 0x18
+	.4byte	0x4078
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3d6b
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x406d
+	.uleb128 0x9
+	.4byte	.LASF919
+	.byte	0x18
+	.byte	0x26
+	.byte	0x3a
+	.4byte	0x40c1
+	.uleb128 0xa
+	.4byte	.LASF864
+	.byte	0x26
+	.byte	0x3b
+	.4byte	0x1ac9
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF879
+	.byte	0x26
+	.byte	0x3c
+	.4byte	0x1abe
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF920
+	.byte	0x26
+	.byte	0x3d
+	.4byte	0x1abe
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF921
+	.byte	0x26
+	.byte	0x3e
+	.4byte	0x40c1
+	.byte	0x10
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x19b3
+	.uleb128 0x9
+	.4byte	.LASF922
+	.byte	0x20
+	.byte	0x26
+	.byte	0x54
+	.4byte	0x4134
+	.uleb128 0xa
+	.4byte	.LASF923
+	.byte	0x26
+	.byte	0x55
+	.4byte	0x2c
+	.byte	0
+	.uleb128 0xb
+	.ascii	"len\000"
+	.byte	0x26
+	.byte	0x56
+	.4byte	0x1a77
+	.byte	0x4
+	.uleb128 0xa
+	.4byte	.LASF924
+	.byte	0x26
+	.byte	0x57
+	.4byte	0x1a77
+	.byte	0x8
+	.uleb128 0xa
+	.4byte	.LASF925
+	.byte	0x26
+	.byte	0x58
+	.4byte	0x1a77
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF926
+	.byte	0x26
+	.byte	0x59
+	.4byte	0x1a77
+	.byte	0x10
+	.uleb128 0xa
+	.4byte	.LASF927
+	.byte	0x26
+	.byte	0x5a
+	.4byte	0x1abe
+	.byte	0x14
+	.uleb128 0xa
+	.4byte	.LASF928
+	.byte	0x26
+	.byte	0x5b
+	.4byte	0x224c
+	.byte	0x18
+	.uleb128 0xa
+	.4byte	.LASF929
+	.byte	0x26
+	.byte	0x5c
+	.4byte	0x224c
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF930
+	.2byte	0xba8
+	.byte	0x26
+	.byte	0x71
+	.4byte	0x4174
+	.uleb128 0xa
+	.4byte	.LASF931
+	.byte	0x26
+	.byte	0x72
+	.4byte	0x19db
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF932
+	.byte	0x26
+	.byte	0x73
+	.4byte	0x4174
+	.byte	0x4
+	.uleb128 0xf
+	.4byte	.LASF883
+	.byte	0x26
+	.byte	0x74
+	.4byte	0x19db
+	.2byte	0xaa4
+	.uleb128 0xf
+	.4byte	.LASF933
+	.byte	0x26
+	.byte	0x75
+	.4byte	0x4185
+	.2byte	0xaa8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x19db
+	.4byte	0x4185
+	.uleb128 0x14
+	.4byte	0x2aa
+	.2byte	0x2a7
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x3d09
+	.4byte	0x4195
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4134
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4084
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x41b5
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x4078
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x41a1
+	.uleb128 0x17
+	.4byte	0x19b3
+	.4byte	0x41d9
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x19b3
+	.uleb128 0x18
+	.4byte	0x19b3
+	.uleb128 0x18
+	.4byte	0x19b3
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x41bb
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1a77
+	.uleb128 0x18
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4208
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a77
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a82
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x41df
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x4237
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1a77
+	.uleb128 0x18
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4237
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1a8d
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4214
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x425c
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x425c
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x40c7
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4243
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x4286
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a77
+	.uleb128 0x18
+	.4byte	0x4202
+	.uleb128 0x18
+	.4byte	0x4286
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3cd8
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4268
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x42ab
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1a77
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4292
+	.uleb128 0x33
+	.4byte	0x42bc
+	.uleb128 0x18
+	.4byte	0x4067
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42b1
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x42db
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.uleb128 0x18
+	.4byte	0x1ac9
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42c2
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x42f5
+	.uleb128 0x18
+	.4byte	0x4067
+	.uleb128 0x18
+	.4byte	0x1a6c
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42e1
+	.uleb128 0x17
+	.4byte	0x8f
+	.4byte	0x430a
+	.uleb128 0x18
+	.4byte	0x4067
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x42fb
+	.uleb128 0x2c
+	.4byte	.LASF934
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4310
+	.uleb128 0x28
+	.4byte	.LASF935
+	.byte	0xac
+	.byte	0x27
+	.2byte	0x161
+	.4byte	0x43ab
+	.uleb128 0x23
+	.4byte	.LASF936
+	.byte	0x27
+	.2byte	0x162
+	.4byte	0x1adf
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF937
+	.byte	0x27
+	.2byte	0x163
+	.4byte	0x1adf
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF938
+	.byte	0x27
+	.2byte	0x164
+	.4byte	0x1adf
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF939
+	.byte	0x27
+	.2byte	0x165
+	.4byte	0x19c5
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF940
+	.byte	0x27
+	.2byte	0x166
+	.4byte	0x19c5
+	.byte	0xd
+	.uleb128 0x23
+	.4byte	.LASF941
+	.byte	0x27
+	.2byte	0x167
+	.4byte	0x1ad4
+	.byte	0xe
+	.uleb128 0x23
+	.4byte	.LASF336
+	.byte	0x27
+	.2byte	0x16b
+	.4byte	0x43ab
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF878
+	.byte	0x27
+	.2byte	0x16d
+	.4byte	0x19c5
+	.byte	0x90
+	.uleb128 0x23
+	.4byte	.LASF600
+	.byte	0x27
+	.2byte	0x16e
+	.4byte	0x43bb
+	.byte	0x91
+	.uleb128 0x29
+	.ascii	"crc\000"
+	.byte	0x27
+	.2byte	0x16f
+	.4byte	0x1adf
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x43bb
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7f
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x19c5
+	.4byte	0x43cb
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x16
+	.byte	0
+	.uleb128 0x3a
+	.byte	0xc
+	.byte	0x28
+	.byte	0xae
+	.4byte	0x43e9
+	.uleb128 0x1f
+	.ascii	"rb\000"
+	.byte	0x28
+	.byte	0xaf
+	.4byte	0x3c88
+	.uleb128 0x12
+	.4byte	.LASF942
+	.byte	0x28
+	.byte	0xb0
+	.4byte	0x1b75
+	.byte	0
+	.uleb128 0x9
+	.4byte	.LASF943
+	.byte	0x14
+	.byte	0x28
+	.byte	0xad
+	.4byte	0x4417
+	.uleb128 0xb
+	.ascii	"u\000"
+	.byte	0x28
+	.byte	0xb1
+	.4byte	0x43cb
+	.byte	0
+	.uleb128 0xb
+	.ascii	"ec\000"
+	.byte	0x28
+	.byte	0xb2
+	.4byte	0x8f
+	.byte	0xc
+	.uleb128 0xa
+	.4byte	.LASF944
+	.byte	0x28
+	.byte	0xb3
+	.4byte	0x8f
+	.byte	0x10
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF945
+	.2byte	0x10c
+	.byte	0x28
+	.byte	0xeb
+	.4byte	0x4462
+	.uleb128 0xb
+	.ascii	"e\000"
+	.byte	0x28
+	.byte	0xec
+	.4byte	0x4462
+	.byte	0
+	.uleb128 0xa
+	.4byte	.LASF946
+	.byte	0x28
+	.byte	0xed
+	.4byte	0x4478
+	.byte	0x80
+	.uleb128 0xf
+	.4byte	.LASF947
+	.byte	0x28
+	.byte	0xee
+	.4byte	0x8f
+	.2byte	0x100
+	.uleb128 0xf
+	.4byte	.LASF948
+	.byte	0x28
+	.byte	0xef
+	.4byte	0x8f
+	.2byte	0x104
+	.uleb128 0xf
+	.4byte	.LASF949
+	.byte	0x28
+	.byte	0xf0
+	.4byte	0x8f
+	.2byte	0x108
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x4472
+	.4byte	0x4472
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x43e9
+	.uleb128 0x6
+	.4byte	0x8f
+	.4byte	0x4488
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x13
+	.4byte	.LASF950
+	.2byte	0x40c
+	.byte	0x28
+	.byte	0xff
+	.4byte	0x44cd
+	.uleb128 0x23
+	.4byte	.LASF951
+	.byte	0x28
+	.2byte	0x100
+	.4byte	0x44cd
+	.byte	0
+	.uleb128 0x24
+	.4byte	.LASF952
+	.byte	0x28
+	.2byte	0x101
+	.4byte	0x8f
+	.2byte	0x400
+	.uleb128 0x24
+	.4byte	.LASF338
+	.byte	0x28
+	.2byte	0x102
+	.4byte	0x8f
+	.2byte	0x404
+	.uleb128 0x24
+	.4byte	.LASF953
+	.byte	0x28
+	.2byte	0x103
+	.4byte	0x8f
+	.2byte	0x408
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x8f
+	.4byte	0x44dd
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xff
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF954
+	.2byte	0x110
+	.byte	0x28
+	.2byte	0x138
+	.4byte	0x4699
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x28
+	.2byte	0x139
+	.4byte	0x3bca
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF853
+	.byte	0x28
+	.2byte	0x13a
+	.4byte	0x3c60
+	.byte	0x18
+	.uleb128 0x29
+	.ascii	"ubi\000"
+	.byte	0x28
+	.2byte	0x13b
+	.4byte	0x4b06
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF955
+	.byte	0x28
+	.2byte	0x13c
+	.4byte	0x8f
+	.byte	0x24
+	.uleb128 0x23
+	.4byte	.LASF956
+	.byte	0x28
+	.2byte	0x13d
+	.4byte	0x8f
+	.byte	0x28
+	.uleb128 0x23
+	.4byte	.LASF957
+	.byte	0x28
+	.2byte	0x13e
+	.4byte	0x8f
+	.byte	0x2c
+	.uleb128 0x23
+	.4byte	.LASF958
+	.byte	0x28
+	.2byte	0x13f
+	.4byte	0x8f
+	.byte	0x30
+	.uleb128 0x23
+	.4byte	.LASF959
+	.byte	0x28
+	.2byte	0x140
+	.4byte	0x8f
+	.byte	0x34
+	.uleb128 0x23
+	.4byte	.LASF960
+	.byte	0x28
+	.2byte	0x141
+	.4byte	0x8f
+	.byte	0x38
+	.uleb128 0x23
+	.4byte	.LASF936
+	.byte	0x28
+	.2byte	0x143
+	.4byte	0x8f
+	.byte	0x3c
+	.uleb128 0x23
+	.4byte	.LASF939
+	.byte	0x28
+	.2byte	0x144
+	.4byte	0x8f
+	.byte	0x40
+	.uleb128 0x23
+	.4byte	.LASF961
+	.byte	0x28
+	.2byte	0x145
+	.4byte	0x8f
+	.byte	0x44
+	.uleb128 0x23
+	.4byte	.LASF962
+	.byte	0x28
+	.2byte	0x146
+	.4byte	0x8f
+	.byte	0x48
+	.uleb128 0x23
+	.4byte	.LASF963
+	.byte	0x28
+	.2byte	0x14a
+	.4byte	0x1a00
+	.byte	0x4c
+	.uleb128 0x23
+	.4byte	.LASF964
+	.byte	0x28
+	.2byte	0x14c
+	.4byte	0x9d
+	.byte	0x50
+	.uleb128 0x23
+	.4byte	.LASF937
+	.byte	0x28
+	.2byte	0x14d
+	.4byte	0x8f
+	.byte	0x58
+	.uleb128 0x23
+	.4byte	.LASF938
+	.byte	0x28
+	.2byte	0x14e
+	.4byte	0x8f
+	.byte	0x5c
+	.uleb128 0x23
+	.4byte	.LASF941
+	.byte	0x28
+	.2byte	0x14f
+	.4byte	0x8f
+	.byte	0x60
+	.uleb128 0x23
+	.4byte	.LASF336
+	.byte	0x28
+	.2byte	0x150
+	.4byte	0x43ab
+	.byte	0x64
+	.uleb128 0x23
+	.4byte	.LASF965
+	.byte	0x28
+	.2byte	0x152
+	.4byte	0x8f
+	.byte	0xe4
+	.uleb128 0x23
+	.4byte	.LASF966
+	.byte	0x28
+	.2byte	0x153
+	.4byte	0x8f
+	.byte	0xe8
+	.uleb128 0x23
+	.4byte	.LASF967
+	.byte	0x28
+	.2byte	0x154
+	.4byte	0x9d
+	.byte	0xf0
+	.uleb128 0x23
+	.4byte	.LASF968
+	.byte	0x28
+	.2byte	0x155
+	.4byte	0x9d
+	.byte	0xf8
+	.uleb128 0x24
+	.4byte	.LASF969
+	.byte	0x28
+	.2byte	0x156
+	.4byte	0x1aea
+	.2byte	0x100
+	.uleb128 0x24
+	.4byte	.LASF970
+	.byte	0x28
+	.2byte	0x158
+	.4byte	0x4b0c
+	.2byte	0x104
+	.uleb128 0x3b
+	.4byte	.LASF971
+	.byte	0x28
+	.2byte	0x159
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF972
+	.byte	0x28
+	.2byte	0x15a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF940
+	.byte	0x28
+	.2byte	0x15b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF973
+	.byte	0x28
+	.2byte	0x15c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF974
+	.byte	0x28
+	.2byte	0x15d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.2byte	0x108
+	.uleb128 0x3b
+	.4byte	.LASF975
+	.byte	0x28
+	.2byte	0x15e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1a
+	.2byte	0x108
+	.byte	0
+	.uleb128 0x30
+	.4byte	.LASF976
+	.2byte	0xc08
+	.byte	0x28
+	.2byte	0x212
+	.4byte	0x4b06
+	.uleb128 0x23
+	.4byte	.LASF853
+	.byte	0x28
+	.2byte	0x213
+	.4byte	0x3c60
+	.byte	0
+	.uleb128 0x29
+	.ascii	"dev\000"
+	.byte	0x28
+	.2byte	0x214
+	.4byte	0x3bca
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF977
+	.byte	0x28
+	.2byte	0x215
+	.4byte	0x8f
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF978
+	.byte	0x28
+	.2byte	0x216
+	.4byte	0x1b2d
+	.byte	0x24
+	.uleb128 0x23
+	.4byte	.LASF979
+	.byte	0x28
+	.2byte	0x217
+	.4byte	0x8f
+	.byte	0x30
+	.uleb128 0x23
+	.4byte	.LASF980
+	.byte	0x28
+	.2byte	0x218
+	.4byte	0x4c67
+	.byte	0x34
+	.uleb128 0x24
+	.4byte	.LASF981
+	.byte	0x28
+	.2byte	0x219
+	.4byte	0x3ba8
+	.2byte	0x238
+	.uleb128 0x24
+	.4byte	.LASF956
+	.byte	0x28
+	.2byte	0x21a
+	.4byte	0x8f
+	.2byte	0x238
+	.uleb128 0x24
+	.4byte	.LASF982
+	.byte	0x28
+	.2byte	0x21b
+	.4byte	0x8f
+	.2byte	0x23c
+	.uleb128 0x24
+	.4byte	.LASF983
+	.byte	0x28
+	.2byte	0x21d
+	.4byte	0x8f
+	.2byte	0x240
+	.uleb128 0x24
+	.4byte	.LASF984
+	.byte	0x28
+	.2byte	0x21e
+	.4byte	0x8f
+	.2byte	0x244
+	.uleb128 0x24
+	.4byte	.LASF985
+	.byte	0x28
+	.2byte	0x21f
+	.4byte	0x8f
+	.2byte	0x248
+	.uleb128 0x24
+	.4byte	.LASF986
+	.byte	0x28
+	.2byte	0x220
+	.4byte	0x8f
+	.2byte	0x24c
+	.uleb128 0x24
+	.4byte	.LASF987
+	.byte	0x28
+	.2byte	0x221
+	.4byte	0x8f
+	.2byte	0x250
+	.uleb128 0x24
+	.4byte	.LASF988
+	.byte	0x28
+	.2byte	0x223
+	.4byte	0x8f
+	.2byte	0x254
+	.uleb128 0x24
+	.4byte	.LASF989
+	.byte	0x28
+	.2byte	0x224
+	.4byte	0x8f
+	.2byte	0x258
+	.uleb128 0x24
+	.4byte	.LASF990
+	.byte	0x28
+	.2byte	0x225
+	.4byte	0x8f
+	.2byte	0x25c
+	.uleb128 0x24
+	.4byte	.LASF991
+	.byte	0x28
+	.2byte	0x226
+	.4byte	0x4c77
+	.2byte	0x260
+	.uleb128 0x24
+	.4byte	.LASF992
+	.byte	0x28
+	.2byte	0x227
+	.4byte	0x3c47
+	.2byte	0x264
+	.uleb128 0x24
+	.4byte	.LASF993
+	.byte	0x28
+	.2byte	0x229
+	.4byte	0x8f
+	.2byte	0x268
+	.uleb128 0x24
+	.4byte	.LASF994
+	.byte	0x28
+	.2byte	0x22b
+	.4byte	0x8f
+	.2byte	0x26c
+	.uleb128 0x24
+	.4byte	.LASF995
+	.byte	0x28
+	.2byte	0x22e
+	.4byte	0x96
+	.2byte	0x270
+	.uleb128 0x24
+	.4byte	.LASF996
+	.byte	0x28
+	.2byte	0x22f
+	.4byte	0x3ba8
+	.2byte	0x278
+	.uleb128 0x24
+	.4byte	.LASF997
+	.byte	0x28
+	.2byte	0x230
+	.4byte	0x3cbf
+	.2byte	0x278
+	.uleb128 0x24
+	.4byte	.LASF998
+	.byte	0x28
+	.2byte	0x231
+	.4byte	0x3c47
+	.2byte	0x27c
+	.uleb128 0x24
+	.4byte	.LASF999
+	.byte	0x28
+	.2byte	0x234
+	.4byte	0x8f
+	.2byte	0x280
+	.uleb128 0x25
+	.ascii	"fm\000"
+	.byte	0x28
+	.2byte	0x235
+	.4byte	0x4c7d
+	.2byte	0x284
+	.uleb128 0x24
+	.4byte	.LASF1000
+	.byte	0x28
+	.2byte	0x236
+	.4byte	0x4488
+	.2byte	0x288
+	.uleb128 0x24
+	.4byte	.LASF1001
+	.byte	0x28
+	.2byte	0x237
+	.4byte	0x4488
+	.2byte	0x694
+	.uleb128 0x24
+	.4byte	.LASF1002
+	.byte	0x28
+	.2byte	0x238
+	.4byte	0x3bb3
+	.2byte	0xaa0
+	.uleb128 0x24
+	.4byte	.LASF1003
+	.byte	0x28
+	.2byte	0x239
+	.4byte	0x3bb3
+	.2byte	0xaa4
+	.uleb128 0x24
+	.4byte	.LASF1004
+	.byte	0x28
+	.2byte	0x23a
+	.4byte	0x1aea
+	.2byte	0xaa8
+	.uleb128 0x24
+	.4byte	.LASF1005
+	.byte	0x28
+	.2byte	0x23b
+	.4byte	0x1a77
+	.2byte	0xaac
+	.uleb128 0x24
+	.4byte	.LASF1006
+	.byte	0x28
+	.2byte	0x23f
+	.4byte	0x8f
+	.2byte	0xab0
+	.uleb128 0x24
+	.4byte	.LASF952
+	.byte	0x28
+	.2byte	0x242
+	.4byte	0x3cbf
+	.2byte	0xab4
+	.uleb128 0x24
+	.4byte	.LASF1007
+	.byte	0x28
+	.2byte	0x243
+	.4byte	0x3cbf
+	.2byte	0xab8
+	.uleb128 0x24
+	.4byte	.LASF1008
+	.byte	0x28
+	.2byte	0x244
+	.4byte	0x3cbf
+	.2byte	0xabc
+	.uleb128 0x24
+	.4byte	.LASF1009
+	.byte	0x28
+	.2byte	0x245
+	.4byte	0x8f
+	.2byte	0xac0
+	.uleb128 0x24
+	.4byte	.LASF876
+	.byte	0x28
+	.2byte	0x246
+	.4byte	0x3cbf
+	.2byte	0xac4
+	.uleb128 0x25
+	.ascii	"pq\000"
+	.byte	0x28
+	.2byte	0x247
+	.4byte	0x4c83
+	.2byte	0xac8
+	.uleb128 0x24
+	.4byte	.LASF1010
+	.byte	0x28
+	.2byte	0x248
+	.4byte	0x8f
+	.2byte	0xb18
+	.uleb128 0x24
+	.4byte	.LASF1011
+	.byte	0x28
+	.2byte	0x249
+	.4byte	0x3ba8
+	.2byte	0xb1c
+	.uleb128 0x24
+	.4byte	.LASF1012
+	.byte	0x28
+	.2byte	0x24a
+	.4byte	0x3c47
+	.2byte	0xb1c
+	.uleb128 0x24
+	.4byte	.LASF1013
+	.byte	0x28
+	.2byte	0x24b
+	.4byte	0x3bb3
+	.2byte	0xb20
+	.uleb128 0x24
+	.4byte	.LASF1014
+	.byte	0x28
+	.2byte	0x24c
+	.4byte	0x8f
+	.2byte	0xb24
+	.uleb128 0x24
+	.4byte	.LASF1015
+	.byte	0x28
+	.2byte	0x24d
+	.4byte	0x4c93
+	.2byte	0xb28
+	.uleb128 0x24
+	.4byte	.LASF1016
+	.byte	0x28
+	.2byte	0x24e
+	.4byte	0x4472
+	.2byte	0xb2c
+	.uleb128 0x24
+	.4byte	.LASF1017
+	.byte	0x28
+	.2byte	0x24f
+	.4byte	0x4472
+	.2byte	0xb30
+	.uleb128 0x24
+	.4byte	.LASF1018
+	.byte	0x28
+	.2byte	0x250
+	.4byte	0x8f
+	.2byte	0xb34
+	.uleb128 0x24
+	.4byte	.LASF1019
+	.byte	0x28
+	.2byte	0x251
+	.4byte	0x1b75
+	.2byte	0xb38
+	.uleb128 0x24
+	.4byte	.LASF1020
+	.byte	0x28
+	.2byte	0x252
+	.4byte	0x8f
+	.2byte	0xb40
+	.uleb128 0x24
+	.4byte	.LASF1021
+	.byte	0x28
+	.2byte	0x253
+	.4byte	0x4c9e
+	.2byte	0xb44
+	.uleb128 0x24
+	.4byte	.LASF1022
+	.byte	0x28
+	.2byte	0x254
+	.4byte	0x8f
+	.2byte	0xb48
+	.uleb128 0x24
+	.4byte	.LASF1023
+	.byte	0x28
+	.2byte	0x255
+	.4byte	0x4ca4
+	.2byte	0xb4c
+	.uleb128 0x24
+	.4byte	.LASF1024
+	.byte	0x28
+	.2byte	0x258
+	.4byte	0x9d
+	.2byte	0xb60
+	.uleb128 0x24
+	.4byte	.LASF1025
+	.byte	0x28
+	.2byte	0x259
+	.4byte	0x8f
+	.2byte	0xb68
+	.uleb128 0x24
+	.4byte	.LASF1026
+	.byte	0x28
+	.2byte	0x25a
+	.4byte	0x8f
+	.2byte	0xb6c
+	.uleb128 0x24
+	.4byte	.LASF1027
+	.byte	0x28
+	.2byte	0x25b
+	.4byte	0x8f
+	.2byte	0xb70
+	.uleb128 0x24
+	.4byte	.LASF1028
+	.byte	0x28
+	.2byte	0x25c
+	.4byte	0x8f
+	.2byte	0xb74
+	.uleb128 0x24
+	.4byte	.LASF1029
+	.byte	0x28
+	.2byte	0x25d
+	.4byte	0x8f
+	.2byte	0xb78
+	.uleb128 0x24
+	.4byte	.LASF1030
+	.byte	0x28
+	.2byte	0x25e
+	.4byte	0x8f
+	.2byte	0xb7c
+	.uleb128 0x24
+	.4byte	.LASF1031
+	.byte	0x28
+	.2byte	0x25f
+	.4byte	0x8f
+	.2byte	0xb80
+	.uleb128 0x24
+	.4byte	.LASF1032
+	.byte	0x28
+	.2byte	0x260
+	.4byte	0x8f
+	.2byte	0xb84
+	.uleb128 0x24
+	.4byte	.LASF1033
+	.byte	0x28
+	.2byte	0x261
+	.4byte	0x8f
+	.2byte	0xb88
+	.uleb128 0x24
+	.4byte	.LASF1034
+	.byte	0x28
+	.2byte	0x262
+	.4byte	0x8f
+	.2byte	0xb8c
+	.uleb128 0x24
+	.4byte	.LASF1035
+	.byte	0x28
+	.2byte	0x263
+	.4byte	0x8f
+	.2byte	0xb90
+	.uleb128 0x24
+	.4byte	.LASF1036
+	.byte	0x28
+	.2byte	0x264
+	.4byte	0x8f
+	.2byte	0xb94
+	.uleb128 0x24
+	.4byte	.LASF1037
+	.byte	0x28
+	.2byte	0x265
+	.4byte	0x8f
+	.2byte	0xb98
+	.uleb128 0x24
+	.4byte	.LASF1038
+	.byte	0x28
+	.2byte	0x266
+	.4byte	0x8f
+	.2byte	0xb9c
+	.uleb128 0x24
+	.4byte	.LASF1039
+	.byte	0x28
+	.2byte	0x267
+	.4byte	0x8f
+	.2byte	0xba0
+	.uleb128 0x24
+	.4byte	.LASF1040
+	.byte	0x28
+	.2byte	0x268
+	.4byte	0x8f
+	.2byte	0xba4
+	.uleb128 0x24
+	.4byte	.LASF1041
+	.byte	0x28
+	.2byte	0x269
+	.4byte	0x8f
+	.2byte	0xba8
+	.uleb128 0x3b
+	.4byte	.LASF1042
+	.byte	0x28
+	.2byte	0x26a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.2byte	0xbac
+	.uleb128 0x3b
+	.4byte	.LASF1043
+	.byte	0x28
+	.2byte	0x26b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.2byte	0xbac
+	.uleb128 0x24
+	.4byte	.LASF1044
+	.byte	0x28
+	.2byte	0x26c
+	.4byte	0x8f
+	.2byte	0xbb0
+	.uleb128 0x25
+	.ascii	"mtd\000"
+	.byte	0x28
+	.2byte	0x26d
+	.4byte	0x4067
+	.2byte	0xbb4
+	.uleb128 0x24
+	.4byte	.LASF1045
+	.byte	0x28
+	.2byte	0x26f
+	.4byte	0x1aea
+	.2byte	0xbb8
+	.uleb128 0x24
+	.4byte	.LASF1046
+	.byte	0x28
+	.2byte	0x270
+	.4byte	0x3c47
+	.2byte	0xbbc
+	.uleb128 0x24
+	.4byte	.LASF1047
+	.byte	0x28
+	.2byte	0x271
+	.4byte	0x3c47
+	.2byte	0xbc0
+	.uleb128 0x25
+	.ascii	"dbg\000"
+	.byte	0x28
+	.2byte	0x273
+	.4byte	0x4b18
+	.2byte	0xbc4
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4699
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x8f
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x44dd
+	.uleb128 0x28
+	.4byte	.LASF1048
+	.byte	0x40
+	.byte	0x28
+	.2byte	0x187
+	.4byte	0x4c4c
+	.uleb128 0x3c
+	.4byte	.LASF1049
+	.byte	0x28
+	.2byte	0x188
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1f
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF1050
+	.byte	0x28
+	.2byte	0x189
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF1051
+	.byte	0x28
+	.2byte	0x18a
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1d
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF1052
+	.byte	0x28
+	.2byte	0x18b
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF1053
+	.byte	0x28
+	.2byte	0x18c
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1b
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF1054
+	.byte	0x28
+	.2byte	0x18d
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x1
+	.byte	0x1a
+	.byte	0
+	.uleb128 0x3c
+	.4byte	.LASF1055
+	.byte	0x28
+	.2byte	0x18e
+	.4byte	0x2c
+	.byte	0x4
+	.byte	0x2
+	.byte	0x18
+	.byte	0
+	.uleb128 0x23
+	.4byte	.LASF1056
+	.byte	0x28
+	.2byte	0x18f
+	.4byte	0x2c
+	.byte	0x4
+	.uleb128 0x23
+	.4byte	.LASF1057
+	.byte	0x28
+	.2byte	0x190
+	.4byte	0x2c
+	.byte	0x8
+	.uleb128 0x23
+	.4byte	.LASF1058
+	.byte	0x28
+	.2byte	0x191
+	.4byte	0x2c
+	.byte	0xc
+	.uleb128 0x23
+	.4byte	.LASF1059
+	.byte	0x28
+	.2byte	0x192
+	.4byte	0x4c4c
+	.byte	0x10
+	.uleb128 0x23
+	.4byte	.LASF1060
+	.byte	0x28
+	.2byte	0x193
+	.4byte	0x4c61
+	.byte	0x18
+	.uleb128 0x23
+	.4byte	.LASF1061
+	.byte	0x28
+	.2byte	0x194
+	.4byte	0x4c61
+	.byte	0x1c
+	.uleb128 0x23
+	.4byte	.LASF1062
+	.byte	0x28
+	.2byte	0x195
+	.4byte	0x4c61
+	.byte	0x20
+	.uleb128 0x23
+	.4byte	.LASF1063
+	.byte	0x28
+	.2byte	0x196
+	.4byte	0x4c61
+	.byte	0x24
+	.uleb128 0x23
+	.4byte	.LASF1064
+	.byte	0x28
+	.2byte	0x197
+	.4byte	0x4c61
+	.byte	0x28
+	.uleb128 0x23
+	.4byte	.LASF1065
+	.byte	0x28
+	.2byte	0x198
+	.4byte	0x4c61
+	.byte	0x2c
+	.uleb128 0x23
+	.4byte	.LASF1066
+	.byte	0x28
+	.2byte	0x199
+	.4byte	0x4c61
+	.byte	0x30
+	.uleb128 0x23
+	.4byte	.LASF1067
+	.byte	0x28
+	.2byte	0x19a
+	.4byte	0x4c61
+	.byte	0x34
+	.uleb128 0x23
+	.4byte	.LASF1068
+	.byte	0x28
+	.2byte	0x19b
+	.4byte	0x4c61
+	.byte	0x38
+	.uleb128 0x23
+	.4byte	.LASF1069
+	.byte	0x28
+	.2byte	0x19c
+	.4byte	0x4c61
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x4c5c
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x6
+	.byte	0
+	.uleb128 0x2c
+	.4byte	.LASF1070
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4c5c
+	.uleb128 0x6
+	.4byte	0x4b12
+	.4byte	0x4c77
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x80
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x431b
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4417
+	.uleb128 0x6
+	.4byte	0x1b75
+	.4byte	0x4c93
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x9
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4472
+	.uleb128 0x2c
+	.4byte	.LASF1071
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x4c99
+	.uleb128 0x6
+	.4byte	0x1a27
+	.4byte	0x4cb4
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xc
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3b90
+	.uleb128 0x19
+	.4byte	.LASF1072
+	.byte	0x28
+	.2byte	0x309
+	.4byte	0x4cb4
+	.uleb128 0x2c
+	.4byte	.LASF1073
+	.uleb128 0x4
+	.4byte	0x4cc6
+	.uleb128 0x19
+	.4byte	.LASF1074
+	.byte	0x28
+	.2byte	0x30a
+	.4byte	0x4ccb
+	.uleb128 0x19
+	.4byte	.LASF1075
+	.byte	0x28
+	.2byte	0x30b
+	.4byte	0x4ccb
+	.uleb128 0x19
+	.4byte	.LASF1076
+	.byte	0x28
+	.2byte	0x30c
+	.4byte	0x4ccb
+	.uleb128 0x19
+	.4byte	.LASF1077
+	.byte	0x28
+	.2byte	0x30d
+	.4byte	0x3c2b
+	.uleb128 0x19
+	.4byte	.LASF1078
+	.byte	0x28
+	.2byte	0x30e
+	.4byte	0x3c47
+	.uleb128 0x2c
+	.4byte	.LASF1079
+	.uleb128 0x19
+	.4byte	.LASF1080
+	.byte	0x28
+	.2byte	0x30f
+	.4byte	0x4d0c
+	.uleb128 0x6
+	.4byte	0x4b06
+	.4byte	0x4d28
+	.uleb128 0x7
+	.byte	0
+	.uleb128 0x8
+	.4byte	.LASF1081
+	.byte	0x29
+	.byte	0x4d
+	.4byte	0x4d1d
+	.uleb128 0x6
+	.4byte	0x3a
+	.4byte	0x4d46
+	.uleb128 0x3d
+	.4byte	0x2aa
+	.4byte	0x13ffff
+	.byte	0
+	.uleb128 0x35
+	.4byte	.LASF1082
+	.byte	0x7
+	.byte	0x17
+	.4byte	0x4d33
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlMallocBuffer
+	.uleb128 0x35
+	.4byte	.LASF1083
+	.byte	0x7
+	.byte	0x18
+	.4byte	0x74
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	FtlMallocOffset
+	.uleb128 0x3e
+	.4byte	.LASF1085
+	.byte	0x7
+	.byte	0x84
+	.4byte	.LFB496
+	.4byte	.LFE496-.LFB496
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4e71
+	.uleb128 0x3f
+	.ascii	"s\000"
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x1a50
+	.4byte	.LLST443
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x1aea
+	.4byte	.LLST444
+	.uleb128 0x40
+	.4byte	.LASF1084
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x74
+	.4byte	.LLST445
+	.uleb128 0x3f
+	.ascii	"len\000"
+	.byte	0x7
+	.byte	0x84
+	.4byte	0x74
+	.4byte	.LLST446
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x7
+	.byte	0x89
+	.4byte	0x74
+	.4byte	.LLST447
+	.uleb128 0x41
+	.ascii	"j\000"
+	.byte	0x7
+	.byte	0x89
+	.4byte	0x74
+	.4byte	.LLST448
+	.uleb128 0x41
+	.ascii	"p8\000"
+	.byte	0x7
+	.byte	0x8a
+	.4byte	0x1a50
+	.4byte	.LLST449
+	.uleb128 0x41
+	.ascii	"p16\000"
+	.byte	0x7
+	.byte	0x8b
+	.4byte	0x4e71
+	.4byte	.LLST450
+	.uleb128 0x41
+	.ascii	"p32\000"
+	.byte	0x7
+	.byte	0x8c
+	.4byte	0x13e
+	.4byte	.LLST451
+	.uleb128 0x42
+	.4byte	.LVL1410
+	.4byte	0x103ff
+	.4byte	0x4e1d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1411
+	.4byte	0x103ff
+	.4byte	0x4e40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC16
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1413
+	.4byte	0x103ff
+	.4byte	0x4e54
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1415
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC18
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x6d
+	.uleb128 0x46
+	.4byte	.LASF1124
+	.byte	0x7
+	.byte	0x7f
+	.4byte	0x2c
+	.byte	0x1
+	.uleb128 0x3e
+	.4byte	.LASF1086
+	.byte	0x7
+	.byte	0x78
+	.4byte	.LFB494
+	.4byte	.LFE494-.LFB494
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4edc
+	.uleb128 0x47
+	.4byte	0x4edc
+	.4byte	.LBB486
+	.4byte	.LBE486-.LBB486
+	.byte	0x7
+	.byte	0x7a
+	.4byte	0x4eb5
+	.uleb128 0x48
+	.4byte	.LVL2343
+	.4byte	0xbed1
+	.byte	0
+	.uleb128 0x47
+	.4byte	0x4edc
+	.4byte	.LBB488
+	.4byte	.LBE488-.LBB488
+	.byte	0x7
+	.byte	0x7c
+	.4byte	0x4ed2
+	.uleb128 0x49
+	.4byte	.LVL2345
+	.4byte	0xbed1
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2344
+	.4byte	0x9884
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF1088
+	.byte	0x7
+	.byte	0x73
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1090
+	.byte	0x7
+	.byte	0x68
+	.4byte	0x84
+	.4byte	.LFB492
+	.4byte	.LFE492-.LFB492
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4f61
+	.uleb128 0x40
+	.4byte	.LASF1087
+	.byte	0x7
+	.byte	0x68
+	.4byte	0x13e
+	.4byte	.LLST738
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x6a
+	.4byte	0x84
+	.4byte	.LLST739
+	.uleb128 0x44
+	.4byte	.LVL2926
+	.4byte	0xbf65
+	.4byte	0x4f30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2928
+	.4byte	0x98b5
+	.4byte	0x4f47
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR15
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2929
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC54
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF1089
+	.byte	0x7
+	.byte	0x64
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1091
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x74
+	.4byte	.LFB490
+	.4byte	.LFE490-.LFB490
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x4fde
+	.uleb128 0x40
+	.4byte	.LASF542
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x74
+	.4byte	.LLST440
+	.uleb128 0x40
+	.4byte	.LASF1092
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x74
+	.4byte	.LLST441
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x5b
+	.4byte	0x1aea
+	.4byte	.LLST442
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x5d
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x4d
+	.4byte	.LVL1405
+	.4byte	0x1040b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1093
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LFB489
+	.4byte	.LFE489-.LFB489
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5053
+	.uleb128 0x40
+	.4byte	.LASF542
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST437
+	.uleb128 0x40
+	.4byte	.LASF1092
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST438
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x53
+	.4byte	0x1aea
+	.4byte	.LLST439
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x55
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x4d
+	.4byte	.LVL1400
+	.4byte	0x10417
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1094
+	.byte	0x7
+	.byte	0x4b
+	.4byte	0x74
+	.4byte	.LFB488
+	.4byte	.LFE488-.LFB488
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x50bc
+	.uleb128 0x40
+	.4byte	.LASF1095
+	.byte	0x7
+	.byte	0x4b
+	.4byte	0x74
+	.4byte	.LLST435
+	.uleb128 0x3f
+	.ascii	"Buf\000"
+	.byte	0x7
+	.byte	0x4b
+	.4byte	0x1aea
+	.4byte	.LLST436
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x4d
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x4d
+	.4byte	.LVL1395
+	.4byte	0x1040b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x23
+	.uleb128 0x100
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1096
+	.byte	0x7
+	.byte	0x42
+	.4byte	0x74
+	.4byte	.LFB487
+	.4byte	.LFE487-.LFB487
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5145
+	.uleb128 0x40
+	.4byte	.LASF1095
+	.byte	0x7
+	.byte	0x42
+	.4byte	0x74
+	.4byte	.LLST433
+	.uleb128 0x3f
+	.ascii	"Buf\000"
+	.byte	0x7
+	.byte	0x42
+	.4byte	0x1aea
+	.4byte	.LLST434
+	.uleb128 0x4c
+	.ascii	"ret\000"
+	.byte	0x7
+	.byte	0x44
+	.4byte	0x74
+	.sleb128 -1
+	.uleb128 0x44
+	.4byte	.LVL1389
+	.4byte	0x10423
+	.4byte	0x511f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL1391
+	.4byte	0x10417
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x6
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x23
+	.uleb128 0x100
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1097
+	.byte	0x7
+	.byte	0x3d
+	.4byte	.LFB486
+	.4byte	.LFE486-.LFB486
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5194
+	.uleb128 0x3f
+	.ascii	"buf\000"
+	.byte	0x7
+	.byte	0x3d
+	.4byte	0x1aea
+	.4byte	.LLST431
+	.uleb128 0x4e
+	.4byte	0x536b
+	.4byte	.LBB351
+	.4byte	.LBE351-.LBB351
+	.byte	0x7
+	.byte	0x3f
+	.uleb128 0x4f
+	.4byte	0x5377
+	.4byte	.LLST432
+	.uleb128 0x4d
+	.4byte	.LVL1385
+	.4byte	0x10430
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1098
+	.byte	0x7
+	.byte	0x38
+	.4byte	0x1aea
+	.4byte	.LFB485
+	.4byte	.LFE485-.LFB485
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x51d3
+	.uleb128 0x40
+	.4byte	.LASF338
+	.byte	0x7
+	.byte	0x38
+	.4byte	0x8f
+	.4byte	.LLST423
+	.uleb128 0x4d
+	.4byte	.LVL1306
+	.4byte	0x1043d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1109
+	.byte	0x7
+	.byte	0x33
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x51ef
+	.uleb128 0x51
+	.4byte	.LASF1107
+	.byte	0x7
+	.byte	0x33
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1099
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x8f
+	.4byte	.LFB483
+	.4byte	.LFE483-.LFB483
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5255
+	.uleb128 0x40
+	.4byte	.LASF1100
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x1aea
+	.4byte	.LLST419
+	.uleb128 0x40
+	.4byte	.LASF1101
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x1aea
+	.4byte	.LLST420
+	.uleb128 0x40
+	.4byte	.LASF602
+	.byte	0x7
+	.byte	0x2e
+	.4byte	0x2c
+	.4byte	.LLST421
+	.uleb128 0x4d
+	.4byte	.LVL1302
+	.4byte	0x10449
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1102
+	.byte	0x7
+	.byte	0x24
+	.4byte	.LFB482
+	.4byte	.LFE482-.LFB482
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x529f
+	.uleb128 0x52
+	.4byte	.LASF1103
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x13e
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x52
+	.4byte	.LASF1104
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x529f
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x52
+	.4byte	.LASF338
+	.byte	0x7
+	.byte	0x24
+	.4byte	0x2c
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x7
+	.byte	0x26
+	.4byte	0x74
+	.4byte	.LLST310
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x7f
+	.uleb128 0x4b
+	.4byte	.LASF1105
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x1aea
+	.4byte	.LFB481
+	.4byte	.LFE481-.LFB481
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x530b
+	.uleb128 0x40
+	.4byte	.LASF1103
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x1aea
+	.4byte	.LLST304
+	.uleb128 0x40
+	.4byte	.LASF1104
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x1b48
+	.4byte	.LLST305
+	.uleb128 0x40
+	.4byte	.LASF338
+	.byte	0x7
+	.byte	0x1f
+	.4byte	0x2c
+	.4byte	.LLST306
+	.uleb128 0x4d
+	.4byte	.LVL900
+	.4byte	0x10455
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1106
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x1aea
+	.4byte	.LFB480
+	.4byte	.LFE480-.LFB480
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x536b
+	.uleb128 0x3f
+	.ascii	"s\000"
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x1aea
+	.4byte	.LLST276
+	.uleb128 0x3f
+	.ascii	"c\000"
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x8f
+	.4byte	.LLST277
+	.uleb128 0x3f
+	.ascii	"n\000"
+	.byte	0x7
+	.byte	0x1a
+	.4byte	0x2c
+	.4byte	.LLST278
+	.uleb128 0x4d
+	.4byte	.LVL744
+	.4byte	0x10423
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.byte	0
+	.uleb128 0x53
+	.4byte	.LASF1562
+	.byte	0x8
+	.byte	0x4e
+	.byte	0x3
+	.4byte	0x5383
+	.uleb128 0x51
+	.4byte	.LASF1108
+	.byte	0x8
+	.byte	0x4e
+	.4byte	0x1b48
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1110
+	.byte	0x6
+	.2byte	0x214
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5442
+	.uleb128 0x55
+	.4byte	.LASF923
+	.byte	0x6
+	.2byte	0x214
+	.4byte	0x74
+	.uleb128 0x55
+	.4byte	.LASF1111
+	.byte	0x6
+	.2byte	0x214
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1112
+	.byte	0x6
+	.2byte	0x216
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"lpa\000"
+	.byte	0x6
+	.2byte	0x217
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"ppa\000"
+	.byte	0x6
+	.2byte	0x217
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1113
+	.byte	0x6
+	.2byte	0x218
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF576
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1114
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1115
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1116
+	.byte	0x6
+	.2byte	0x219
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1117
+	.byte	0x6
+	.2byte	0x21a
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1118
+	.byte	0x6
+	.2byte	0x21b
+	.4byte	0x5442
+	.uleb128 0x58
+	.4byte	.LASF1119
+	.byte	0x6
+	.2byte	0x316
+	.uleb128 0x58
+	.4byte	.LASF1120
+	.byte	0x6
+	.2byte	0x319
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5458
+	.4byte	.LASF1110
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2a5a
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5458
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x16
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5448
+	.uleb128 0x54
+	.4byte	.LASF1122
+	.byte	0x6
+	.2byte	0x1b5
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x54a7
+	.uleb128 0x55
+	.4byte	.LASF1123
+	.byte	0x6
+	.2byte	0x1b5
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1114
+	.byte	0x6
+	.2byte	0x1b7
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x6
+	.2byte	0x1b8
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"j\000"
+	.byte	0x6
+	.2byte	0x1b8
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF664
+	.byte	0x6
+	.2byte	0x1b9
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1125
+	.byte	0x6
+	.2byte	0x1aa
+	.4byte	0x8f
+	.byte	0x1
+	.uleb128 0x5b
+	.4byte	.LASF1126
+	.byte	0x6
+	.2byte	0x192
+	.4byte	0x8f
+	.4byte	.LFB404
+	.4byte	.LFE404-.LFB404
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5521
+	.uleb128 0x5c
+	.4byte	.LASF664
+	.byte	0x6
+	.2byte	0x192
+	.4byte	0x57
+	.4byte	.LLST273
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x6
+	.2byte	0x194
+	.4byte	0x57
+	.4byte	.LLST274
+	.uleb128 0x5e
+	.4byte	.LASF1127
+	.byte	0x6
+	.2byte	0x195
+	.4byte	0x57
+	.4byte	.LLST275
+	.uleb128 0x44
+	.4byte	.LVL731
+	.4byte	0x8958
+	.4byte	0x5510
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL733
+	.4byte	0x5521
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1128
+	.byte	0x6
+	.2byte	0x17b
+	.4byte	0x8f
+	.4byte	.LFB403
+	.4byte	.LFE403-.LFB403
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x554c
+	.uleb128 0x5c
+	.4byte	.LASF1108
+	.byte	0x6
+	.2byte	0x17b
+	.4byte	0x57
+	.4byte	.LLST272
+	.byte	0
+	.uleb128 0x5f
+	.4byte	.LASF1193
+	.byte	0x6
+	.2byte	0x16d
+	.4byte	0x8f
+	.4byte	0x5569
+	.uleb128 0x55
+	.4byte	.LASF1108
+	.byte	0x6
+	.2byte	0x16d
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1129
+	.byte	0x6
+	.2byte	0x14d
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0x5591
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x6
+	.2byte	0x14f
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1118
+	.byte	0x6
+	.2byte	0x150
+	.4byte	0x5442
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1130
+	.byte	0x6
+	.2byte	0x13d
+	.4byte	0x74
+	.4byte	.LFB400
+	.4byte	.LFE400-.LFB400
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5616
+	.uleb128 0x48
+	.4byte	.LVL2785
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL2786
+	.4byte	0x57df
+	.4byte	0x55c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2787
+	.4byte	0x5ef1
+	.4byte	0x55dc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2788
+	.4byte	0x7c46
+	.uleb128 0x44
+	.4byte	.LVL2789
+	.4byte	0x7759
+	.4byte	0x55f9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2790
+	.4byte	0x75f4
+	.uleb128 0x4d
+	.4byte	.LVL2791
+	.4byte	0x5c52
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR93
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF1131
+	.byte	0x6
+	.2byte	0x132
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1132
+	.byte	0x6
+	.byte	0xe2
+	.4byte	0x74
+	.4byte	.LFB398
+	.4byte	.LFE398-.LFB398
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5798
+	.uleb128 0x40
+	.4byte	.LASF1133
+	.byte	0x6
+	.byte	0xe2
+	.4byte	0x35d9
+	.4byte	.LLST706
+	.uleb128 0x40
+	.4byte	.LASF1134
+	.byte	0x6
+	.byte	0xe2
+	.4byte	0x74
+	.4byte	.LLST707
+	.uleb128 0x61
+	.4byte	.LASF1116
+	.byte	0x6
+	.byte	0xe4
+	.4byte	0x57
+	.4byte	.LLST708
+	.uleb128 0x61
+	.4byte	.LASF1135
+	.byte	0x6
+	.byte	0xe5
+	.4byte	0x57
+	.4byte	.LLST709
+	.uleb128 0x41
+	.ascii	"req\000"
+	.byte	0x6
+	.byte	0xe5
+	.4byte	0x57
+	.4byte	.LLST710
+	.uleb128 0x61
+	.4byte	.LASF1114
+	.byte	0x6
+	.byte	0xe6
+	.4byte	0x57
+	.4byte	.LLST711
+	.uleb128 0x61
+	.4byte	.LASF658
+	.byte	0x6
+	.byte	0xe6
+	.4byte	0x57
+	.4byte	.LLST712
+	.uleb128 0x61
+	.4byte	.LASF656
+	.byte	0x6
+	.byte	0xe6
+	.4byte	0x57
+	.4byte	.LLST713
+	.uleb128 0x61
+	.4byte	.LASF1136
+	.byte	0x6
+	.byte	0xe7
+	.4byte	0x74
+	.4byte	.LLST714
+	.uleb128 0x61
+	.4byte	.LASF1137
+	.byte	0x6
+	.byte	0xe8
+	.4byte	0x74
+	.4byte	.LLST715
+	.uleb128 0x61
+	.4byte	.LASF1138
+	.byte	0x6
+	.byte	0xe9
+	.4byte	0x74
+	.4byte	.LLST716
+	.uleb128 0x61
+	.4byte	.LASF1118
+	.byte	0x6
+	.byte	0xea
+	.4byte	0x5442
+	.4byte	.LLST717
+	.uleb128 0x62
+	.4byte	.LASF1139
+	.byte	0x6
+	.byte	0xf1
+	.uleb128 0x62
+	.4byte	.LASF1140
+	.byte	0x6
+	.byte	0xf5
+	.uleb128 0x63
+	.4byte	.LASF1162
+	.byte	0x6
+	.2byte	0x129
+	.4byte	.L2503
+	.uleb128 0x48
+	.4byte	.LVL2710
+	.4byte	0x5798
+	.uleb128 0x44
+	.4byte	.LVL2718
+	.4byte	0xb17b
+	.4byte	0x5729
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2731
+	.4byte	0x8990
+	.4byte	0x5744
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2737
+	.4byte	0x6dbf
+	.4byte	0x575e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2740
+	.4byte	0x59e7
+	.uleb128 0x44
+	.4byte	.LVL2744
+	.4byte	0x103ff
+	.4byte	0x5785
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2747
+	.4byte	0x8565
+	.uleb128 0x48
+	.4byte	.LVL2749
+	.4byte	0x5798
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1141
+	.byte	0x6
+	.byte	0xd9
+	.4byte	.LFB397
+	.4byte	.LFE397-.LFB397
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x57df
+	.uleb128 0x44
+	.4byte	.LVL896
+	.4byte	0x530b
+	.4byte	0x57c1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL897
+	.4byte	0x530b
+	.4byte	0x57d5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x49
+	.4byte	.LVL898
+	.4byte	0x5b2a
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1142
+	.byte	0x6
+	.byte	0x6e
+	.4byte	0x8f
+	.4byte	.LFB396
+	.4byte	.LFE396-.LFB396
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x59d2
+	.uleb128 0x40
+	.4byte	.LASF1143
+	.byte	0x6
+	.byte	0x6e
+	.4byte	0x8f
+	.4byte	.LLST718
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x70
+	.4byte	0x57
+	.4byte	.LLST719
+	.uleb128 0x61
+	.4byte	.LASF1144
+	.byte	0x6
+	.byte	0x70
+	.4byte	0x57
+	.4byte	.LLST720
+	.uleb128 0x36
+	.4byte	.LASF1145
+	.byte	0x6
+	.byte	0x71
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x61
+	.4byte	.LASF1146
+	.byte	0x6
+	.byte	0x72
+	.4byte	0x74
+	.4byte	.LLST721
+	.uleb128 0x36
+	.4byte	.LASF1133
+	.byte	0x6
+	.byte	0x73
+	.4byte	0x35d9
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	g_gc_temp_superblock
+	.byte	0x9f
+	.uleb128 0x61
+	.4byte	.LASF1147
+	.byte	0x6
+	.byte	0x74
+	.4byte	0x3612
+	.4byte	.LLST722
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x59e2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11365
+	.uleb128 0x44
+	.4byte	.LVL2755
+	.4byte	0x561f
+	.4byte	0x5884
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2756
+	.4byte	0x7759
+	.4byte	0x5897
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2757
+	.4byte	0x8dc2
+	.uleb128 0x48
+	.4byte	.LVL2758
+	.4byte	0x8c64
+	.uleb128 0x48
+	.4byte	.LVL2761
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL2762
+	.4byte	0x103ff
+	.4byte	0x58d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR234
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa3
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2763
+	.4byte	0x103ff
+	.4byte	0x58f8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2765
+	.4byte	0x5b4d
+	.4byte	0x590c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2766
+	.4byte	0x103ff
+	.4byte	0x5923
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC50
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2767
+	.4byte	0x8540
+	.uleb128 0x48
+	.4byte	.LVL2769
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2770
+	.4byte	0x75f4
+	.uleb128 0x44
+	.4byte	.LVL2773
+	.4byte	0x103ff
+	.4byte	0x5964
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR234
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa8
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2774
+	.4byte	0x103ff
+	.4byte	0x5984
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2775
+	.4byte	0x7a04
+	.4byte	0x599d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2776
+	.4byte	0x8958
+	.uleb128 0x44
+	.4byte	.LVL2778
+	.4byte	0x7a04
+	.4byte	0x59bf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2780
+	.4byte	0x5b4d
+	.uleb128 0x48
+	.4byte	.LVL2784
+	.4byte	0x8565
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x59e2
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x12
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x59d2
+	.uleb128 0x3e
+	.4byte	.LASF1148
+	.byte	0x6
+	.byte	0x53
+	.4byte	.LFB395
+	.4byte	.LFE395-.LFB395
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a5c
+	.uleb128 0x40
+	.4byte	.LASF1149
+	.byte	0x6
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST267
+	.uleb128 0x40
+	.4byte	.LASF667
+	.byte	0x6
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST268
+	.uleb128 0x3f
+	.ascii	"lpa\000"
+	.byte	0x6
+	.byte	0x53
+	.4byte	0x74
+	.4byte	.LLST269
+	.uleb128 0x61
+	.4byte	.LASF1150
+	.byte	0x6
+	.byte	0x55
+	.4byte	0x57
+	.4byte	.LLST270
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x56
+	.4byte	0x57
+	.4byte	.LLST271
+	.uleb128 0x45
+	.4byte	.LVL721
+	.4byte	0x8958
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1151
+	.byte	0x6
+	.byte	0x48
+	.4byte	0x74
+	.4byte	.LFB394
+	.4byte	.LFE394-.LFB394
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5a92
+	.uleb128 0x3f
+	.ascii	"blk\000"
+	.byte	0x6
+	.byte	0x48
+	.4byte	0x57
+	.4byte	.LLST265
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x4a
+	.4byte	0x57
+	.4byte	.LLST266
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1152
+	.byte	0x6
+	.byte	0x37
+	.4byte	.LFB393
+	.4byte	.LFE393-.LFB393
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5ade
+	.uleb128 0x65
+	.ascii	"req\000"
+	.byte	0x6
+	.byte	0x37
+	.4byte	0x676
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x52
+	.4byte	.LASF1153
+	.byte	0x6
+	.byte	0x37
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x39
+	.4byte	0x57
+	.4byte	.LLST263
+	.uleb128 0x61
+	.4byte	.LASF1154
+	.byte	0x6
+	.byte	0x3a
+	.4byte	0x57
+	.4byte	.LLST264
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1155
+	.byte	0x6
+	.byte	0x28
+	.4byte	.LFB392
+	.4byte	.LFE392-.LFB392
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b2a
+	.uleb128 0x65
+	.ascii	"req\000"
+	.byte	0x6
+	.byte	0x28
+	.4byte	0x676
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x52
+	.4byte	.LASF1153
+	.byte	0x6
+	.byte	0x28
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x2a
+	.4byte	0x57
+	.4byte	.LLST261
+	.uleb128 0x61
+	.4byte	.LASF1154
+	.byte	0x6
+	.byte	0x2b
+	.4byte	0x57
+	.4byte	.LLST262
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1156
+	.byte	0x6
+	.byte	0x14
+	.4byte	.LFB391
+	.4byte	.LFE391-.LFB391
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5b4d
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x6
+	.byte	0x16
+	.4byte	0x57
+	.4byte	.LLST260
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1157
+	.byte	0x1
+	.2byte	0xc18
+	.4byte	0x8f
+	.4byte	.LFB390
+	.4byte	.LFE390-.LFB390
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5bfd
+	.uleb128 0x5c
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xc18
+	.4byte	0x57
+	.4byte	.LLST554
+	.uleb128 0x5d
+	.ascii	"ret\000"
+	.byte	0x1
+	.2byte	0xc1a
+	.4byte	0x8f
+	.4byte	.LLST555
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5c0d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11297
+	.uleb128 0x44
+	.4byte	.LVL1979
+	.4byte	0x103ff
+	.4byte	0x5bb3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1983
+	.4byte	0x103ff
+	.4byte	0x5bd3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR204
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1984
+	.4byte	0x103ff
+	.4byte	0x5bf3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1987
+	.4byte	0x5c12
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5c0d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x13
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5bfd
+	.uleb128 0x54
+	.4byte	.LASF1158
+	.byte	0x1
+	.2byte	0xc03
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5c3d
+	.uleb128 0x55
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xc03
+	.4byte	0x57
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.4byte	.LASF1158
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5c4d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xf
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5c3d
+	.uleb128 0x5b
+	.4byte	.LASF1159
+	.byte	0x1
+	.2byte	0xbcc
+	.4byte	0x74
+	.4byte	.LFB388
+	.4byte	.LFE388-.LFB388
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5dee
+	.uleb128 0x5c
+	.4byte	.LASF1160
+	.byte	0x1
+	.2byte	0xbcc
+	.4byte	0x35d9
+	.4byte	.LLST559
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0xbce
+	.4byte	0x57
+	.4byte	.LLST560
+	.uleb128 0x5e
+	.4byte	.LASF1161
+	.byte	0x1
+	.2byte	0xbcf
+	.4byte	0x74
+	.4byte	.LLST561
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x59e2
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11281
+	.uleb128 0x63
+	.4byte	.LASF1163
+	.byte	0x1
+	.2byte	0xbd7
+	.4byte	.L1802
+	.uleb128 0x63
+	.4byte	.LASF1164
+	.byte	0x1
+	.2byte	0xbe6
+	.4byte	.L1805
+	.uleb128 0x44
+	.4byte	.LVL2001
+	.4byte	0x103ff
+	.4byte	0x5cea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbd1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2002
+	.4byte	0x103ff
+	.4byte	0x5d0a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2003
+	.4byte	0x103ff
+	.4byte	0x5d31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbd2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2004
+	.4byte	0x103ff
+	.4byte	0x5d51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2005
+	.4byte	0x103ff
+	.4byte	0x5d78
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbd3
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2006
+	.4byte	0x103ff
+	.4byte	0x5d98
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2008
+	.4byte	0x5b4d
+	.uleb128 0x48
+	.4byte	.LVL2012
+	.4byte	0x5b4d
+	.uleb128 0x44
+	.4byte	.LVL2013
+	.4byte	0x103ff
+	.4byte	0x5dd1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xbff
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2014
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1165
+	.byte	0x1
+	.2byte	0xba2
+	.4byte	0x8f
+	.4byte	.LFB387
+	.4byte	.LFE387-.LFB387
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x5edc
+	.uleb128 0x5c
+	.4byte	.LASF1160
+	.byte	0x1
+	.2byte	0xba2
+	.4byte	0x35d9
+	.4byte	.LLST624
+	.uleb128 0x38
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xba4
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5eec
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11275
+	.uleb128 0x44
+	.4byte	.LVL2276
+	.4byte	0x103ff
+	.4byte	0x5e5c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR219
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xba6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2277
+	.4byte	0x103ff
+	.4byte	0x5e7c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2278
+	.4byte	0x8540
+	.4byte	0x5e90
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2279
+	.4byte	0x5c12
+	.uleb128 0x44
+	.4byte	.LVL2280
+	.4byte	0x5ef1
+	.4byte	0x5ead
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2281
+	.4byte	0x7c46
+	.uleb128 0x44
+	.4byte	.LVL2282
+	.4byte	0x7759
+	.4byte	0x5ec9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2283
+	.4byte	0x75f4
+	.uleb128 0x48
+	.4byte	.LVL2285
+	.4byte	0x8565
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5eec
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5edc
+	.uleb128 0x54
+	.4byte	.LASF1166
+	.byte	0x1
+	.2byte	0xb23
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5f74
+	.uleb128 0x66
+	.ascii	"p\000"
+	.byte	0x1
+	.2byte	0xb23
+	.4byte	0x35d9
+	.uleb128 0x56
+	.4byte	.LASF1167
+	.byte	0x1
+	.2byte	0xb25
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"n\000"
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0xb26
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1168
+	.byte	0x1
+	.2byte	0xb27
+	.4byte	0x8f
+	.uleb128 0x56
+	.4byte	.LASF1169
+	.byte	0x1
+	.2byte	0xb28
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1170
+	.byte	0x1
+	.2byte	0xb2c
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5f84
+	.4byte	.LASF1166
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x5f84
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x18
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x5f74
+	.uleb128 0x54
+	.4byte	.LASF1171
+	.byte	0x1
+	.2byte	0xb1a
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x5fa7
+	.uleb128 0x55
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xb1a
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1172
+	.byte	0x1
+	.2byte	0xaae
+	.4byte	0x57
+	.4byte	.LFB384
+	.4byte	.LFE384-.LFB384
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6000
+	.uleb128 0x5c
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0xaae
+	.4byte	0x57
+	.4byte	.LLST254
+	.uleb128 0x5e
+	.4byte	.LASF993
+	.byte	0x1
+	.2byte	0xab0
+	.4byte	0x57
+	.4byte	.LLST255
+	.uleb128 0x5e
+	.4byte	.LASF1108
+	.byte	0x1
+	.2byte	0xab1
+	.4byte	0x57
+	.4byte	.LLST256
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0xab2
+	.4byte	0x57
+	.4byte	.LLST257
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1173
+	.byte	0x1
+	.2byte	0xaa5
+	.4byte	0x57
+	.4byte	.LFB383
+	.4byte	.LFE383-.LFB383
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x602b
+	.uleb128 0x5e
+	.4byte	.LASF1174
+	.byte	0x1
+	.2byte	0xaa7
+	.4byte	0x57
+	.4byte	.LLST253
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1175
+	.byte	0x1
+	.2byte	0xa95
+	.4byte	0x8f
+	.4byte	.LFB382
+	.4byte	.LFE382-.LFB382
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x60a3
+	.uleb128 0x5c
+	.4byte	.LASF1144
+	.byte	0x1
+	.2byte	0xa95
+	.4byte	0x57
+	.4byte	.LLST249
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0xa97
+	.4byte	0x57
+	.4byte	.LLST250
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0xa97
+	.4byte	0x57
+	.4byte	.LLST251
+	.uleb128 0x5e
+	.4byte	.LASF651
+	.byte	0x1
+	.2byte	0xa98
+	.4byte	0x57
+	.4byte	.LLST252
+	.uleb128 0x44
+	.4byte	.LVL673
+	.4byte	0x89c8
+	.4byte	0x6099
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL674
+	.4byte	0x8d5f
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1176
+	.byte	0x1
+	.2byte	0xa2a
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x60cd
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0xa2c
+	.4byte	0x8f
+	.uleb128 0x68
+	.uleb128 0x56
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0xa51
+	.4byte	0x35d9
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1177
+	.byte	0x1
+	.2byte	0x9e2
+	.4byte	.LFB380
+	.4byte	.LFE380-.LFB380
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6174
+	.uleb128 0x5c
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0x9e2
+	.4byte	0x35d9
+	.4byte	.LLST564
+	.uleb128 0x38
+	.4byte	.LASF1178
+	.byte	0x1
+	.2byte	0x9e4
+	.4byte	0xc5
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x1
+	.2byte	0x9e5
+	.4byte	0x5442
+	.4byte	.LLST565
+	.uleb128 0x5e
+	.4byte	.LASF1179
+	.byte	0x1
+	.2byte	0x9e6
+	.4byte	0x8f
+	.4byte	.LLST566
+	.uleb128 0x5e
+	.4byte	.LASF660
+	.byte	0x1
+	.2byte	0x9e7
+	.4byte	0x74
+	.4byte	.LLST567
+	.uleb128 0x44
+	.4byte	.LVL2048
+	.4byte	0x5c52
+	.4byte	0x6146
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2051
+	.4byte	0xae0d
+	.4byte	0x616a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -60
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2052
+	.4byte	0x5b4d
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1180
+	.byte	0x1
+	.2byte	0x9b2
+	.4byte	.LFB379
+	.4byte	.LFE379-.LFB379
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x62f6
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x640
+	.uleb128 0x5e
+	.4byte	.LASF1181
+	.byte	0x1
+	.2byte	0x9b5
+	.4byte	0x74
+	.4byte	.LLST740
+	.uleb128 0x5e
+	.4byte	.LASF1182
+	.byte	0x1
+	.2byte	0x9b6
+	.4byte	0x57
+	.4byte	.LLST741
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x658
+	.4byte	0x6269
+	.uleb128 0x38
+	.4byte	.LASF1183
+	.byte	0x1
+	.2byte	0x9c7
+	.4byte	0x2e11
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x5e
+	.4byte	.LASF1184
+	.byte	0x1
+	.2byte	0x9c8
+	.4byte	0x35d9
+	.4byte	.LLST742
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x9c9
+	.4byte	0x57
+	.4byte	.LLST743
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x9ca
+	.4byte	0x57
+	.4byte	.LLST744
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0x9cb
+	.4byte	0x57
+	.4byte	.LLST745
+	.uleb128 0x44
+	.4byte	.LVL2945
+	.4byte	0x64a2
+	.4byte	0x621d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2948
+	.4byte	0x103ff
+	.4byte	0x623a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC56
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2949
+	.4byte	0xac82
+	.4byte	0x6253
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2950
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2933
+	.4byte	0x103ff
+	.4byte	0x6286
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2934
+	.4byte	0x5521
+	.uleb128 0x48
+	.4byte	.LVL2935
+	.4byte	0x5521
+	.uleb128 0x44
+	.4byte	.LVL2936
+	.4byte	0x5dee
+	.4byte	0x62ac
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2937
+	.4byte	0x5dee
+	.4byte	0x62c3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR92
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2941
+	.4byte	0x5383
+	.4byte	0x62db
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2943
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.4byte	.LASF1185
+	.byte	0x1
+	.2byte	0x97f
+	.4byte	.LFB378
+	.4byte	.LFE378-.LFB378
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6367
+	.uleb128 0x44
+	.4byte	.LVL2371
+	.4byte	0x77b1
+	.4byte	0x632a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2372
+	.4byte	0x530b
+	.4byte	0x634a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2373
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC44
+	.byte	0
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF1186
+	.byte	0x1
+	.2byte	0x969
+	.byte	0x1
+	.uleb128 0x67
+	.4byte	.LASF1187
+	.byte	0x1
+	.2byte	0x937
+	.4byte	0x8f
+	.4byte	.LFB376
+	.4byte	.LFE376-.LFB376
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x648d
+	.uleb128 0x5e
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST298
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST299
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST300
+	.uleb128 0x5e
+	.4byte	.LASF651
+	.byte	0x1
+	.2byte	0x939
+	.4byte	0x62
+	.4byte	.LLST301
+	.uleb128 0x5e
+	.4byte	.LASF1189
+	.byte	0x1
+	.2byte	0x93a
+	.4byte	0x57
+	.4byte	.LLST302
+	.uleb128 0x5e
+	.4byte	.LASF1190
+	.byte	0x1
+	.2byte	0x93a
+	.4byte	0x57
+	.4byte	.LLST303
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x649d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11184
+	.uleb128 0x44
+	.4byte	.LVL866
+	.4byte	0x530b
+	.4byte	0x640d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL873
+	.4byte	0x89c8
+	.4byte	0x6423
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL874
+	.4byte	0x8d5f
+	.uleb128 0x44
+	.4byte	.LVL884
+	.4byte	0x8565
+	.4byte	0x6440
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL890
+	.4byte	0x8540
+	.uleb128 0x44
+	.4byte	.LVL893
+	.4byte	0x103ff
+	.4byte	0x6470
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR137
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x965
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL894
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x649d
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x11
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x648d
+	.uleb128 0x5b
+	.4byte	.LASF1191
+	.byte	0x1
+	.2byte	0x91b
+	.4byte	0x8f
+	.4byte	.LFB375
+	.4byte	.LFE375-.LFB375
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6558
+	.uleb128 0x6d
+	.ascii	"p\000"
+	.byte	0x1
+	.2byte	0x91b
+	.4byte	0x35d9
+	.4byte	.LLST247
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x91d
+	.4byte	0x57
+	.4byte	.LLST248
+	.uleb128 0x38
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x91d
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11164
+	.uleb128 0x44
+	.4byte	.LVL659
+	.4byte	0x103ff
+	.4byte	0x651e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR101
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x91f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL660
+	.4byte	0x103ff
+	.4byte	0x653e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL663
+	.4byte	0x89c8
+	.uleb128 0x45
+	.4byte	.LVL665
+	.4byte	0x8d5f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1192
+	.byte	0x1
+	.2byte	0x90e
+	.4byte	0x8f
+	.4byte	.LFB374
+	.4byte	.LFE374-.LFB374
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x65df
+	.uleb128 0x44
+	.4byte	.LVL2804
+	.4byte	0x660d
+	.4byte	0x6586
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2805
+	.4byte	0x65df
+	.4byte	0x659d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR91
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2806
+	.4byte	0x660d
+	.4byte	0x65b1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2807
+	.4byte	0x65df
+	.4byte	0x65c5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2808
+	.4byte	0x5616
+	.uleb128 0x45
+	.4byte	.LVL2809
+	.4byte	0x5b4d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1194
+	.byte	0x1
+	.2byte	0x8e5
+	.byte	0x1
+	.4byte	0x660d
+	.uleb128 0x55
+	.4byte	.LASF1160
+	.byte	0x1
+	.2byte	0x8e5
+	.4byte	0x35d9
+	.uleb128 0x56
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x8e7
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1163
+	.byte	0x1
+	.2byte	0x8ef
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1195
+	.byte	0x1
+	.2byte	0x756
+	.4byte	0x8f
+	.4byte	.LFB372
+	.4byte	.LFE372-.LFB372
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6c72
+	.uleb128 0x5c
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0x756
+	.4byte	0x35d9
+	.4byte	.LLST678
+	.uleb128 0x5e
+	.4byte	.LASF1196
+	.byte	0x1
+	.2byte	0x758
+	.4byte	0x57
+	.4byte	.LLST679
+	.uleb128 0x5e
+	.4byte	.LASF1197
+	.byte	0x1
+	.2byte	0x758
+	.4byte	0x57
+	.4byte	.LLST680
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x759
+	.4byte	0x57
+	.4byte	.LLST681
+	.uleb128 0x5e
+	.4byte	.LASF658
+	.byte	0x1
+	.2byte	0x759
+	.4byte	0x57
+	.4byte	.LLST682
+	.uleb128 0x5e
+	.4byte	.LASF656
+	.byte	0x1
+	.2byte	0x759
+	.4byte	0x57
+	.4byte	.LLST683
+	.uleb128 0x5e
+	.4byte	.LASF1198
+	.byte	0x1
+	.2byte	0x75a
+	.4byte	0x57
+	.4byte	.LLST684
+	.uleb128 0x5e
+	.4byte	.LASF1199
+	.byte	0x1
+	.2byte	0x75a
+	.4byte	0x57
+	.4byte	.LLST685
+	.uleb128 0x5e
+	.4byte	.LASF1116
+	.byte	0x1
+	.2byte	0x75b
+	.4byte	0x57
+	.4byte	.LLST686
+	.uleb128 0x5e
+	.4byte	.LASF1200
+	.byte	0x1
+	.2byte	0x75c
+	.4byte	0x8f
+	.4byte	.LLST687
+	.uleb128 0x5e
+	.4byte	.LASF1201
+	.byte	0x1
+	.2byte	0x75c
+	.4byte	0x8f
+	.4byte	.LLST688
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0x75d
+	.4byte	0x57
+	.4byte	.LLST689
+	.uleb128 0x5d
+	.ascii	"n\000"
+	.byte	0x1
+	.2byte	0x75d
+	.4byte	0x57
+	.4byte	.LLST690
+	.uleb128 0x5d
+	.ascii	"req\000"
+	.byte	0x1
+	.2byte	0x75d
+	.4byte	0x57
+	.4byte	.LLST691
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.4byte	.LLST692
+	.uleb128 0x38
+	.4byte	.LASF1202
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x38
+	.4byte	.LASF1145
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x38
+	.4byte	.LASF1136
+	.byte	0x1
+	.2byte	0x75e
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1150
+	.byte	0x1
+	.2byte	0x75f
+	.4byte	0x57
+	.4byte	.LLST693
+	.uleb128 0x5e
+	.4byte	.LASF1203
+	.byte	0x1
+	.2byte	0x75f
+	.4byte	0x57
+	.4byte	.LLST694
+	.uleb128 0x5e
+	.4byte	.LASF1204
+	.byte	0x1
+	.2byte	0x760
+	.4byte	0x74
+	.4byte	.LLST695
+	.uleb128 0x5e
+	.4byte	.LASF1205
+	.byte	0x1
+	.2byte	0x761
+	.4byte	0x57
+	.4byte	.LLST696
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x1
+	.2byte	0x762
+	.4byte	0x5442
+	.4byte	.LLST697
+	.uleb128 0x5e
+	.4byte	.LASF1206
+	.byte	0x1
+	.2byte	0x763
+	.4byte	0x74
+	.4byte	.LLST698
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x6c82
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11110
+	.uleb128 0x63
+	.4byte	.LASF1207
+	.byte	0x1
+	.2byte	0x812
+	.4byte	.L2355
+	.uleb128 0x63
+	.4byte	.LASF1140
+	.byte	0x1
+	.2byte	0x81a
+	.4byte	.L2373
+	.uleb128 0x63
+	.4byte	.LASF1208
+	.byte	0x1
+	.2byte	0x8d7
+	.4byte	.LDL3
+	.uleb128 0x58
+	.4byte	.LASF1209
+	.byte	0x1
+	.2byte	0x8e1
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x5b8
+	.4byte	0x682e
+	.uleb128 0x5e
+	.4byte	.LASF1210
+	.byte	0x1
+	.2byte	0x7d3
+	.4byte	0x74
+	.4byte	.LLST699
+	.uleb128 0x5e
+	.4byte	.LASF1211
+	.byte	0x1
+	.2byte	0x7d4
+	.4byte	0x74
+	.4byte	.LLST700
+	.uleb128 0x5e
+	.4byte	.LASF1212
+	.byte	0x1
+	.2byte	0x7d5
+	.4byte	0x74
+	.4byte	.LLST701
+	.uleb128 0x45
+	.4byte	.LVL2622
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x5d0
+	.4byte	0x6902
+	.uleb128 0x5e
+	.4byte	.LASF1213
+	.byte	0x1
+	.2byte	0x849
+	.4byte	0x74
+	.4byte	.LLST702
+	.uleb128 0x5e
+	.4byte	.LASF1214
+	.byte	0x1
+	.2byte	0x84a
+	.4byte	0x74
+	.4byte	.LLST703
+	.uleb128 0x44
+	.4byte	.LVL2671
+	.4byte	0xb17b
+	.4byte	0x686f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2673
+	.4byte	0x5b4d
+	.uleb128 0x44
+	.4byte	.LVL2680
+	.4byte	0x7a04
+	.4byte	0x6897
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -44
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2682
+	.4byte	0x8913
+	.4byte	0x68ab
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2683
+	.4byte	0x6c87
+	.4byte	0x68bf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2685
+	.4byte	0xb17b
+	.4byte	0x68d7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2687
+	.4byte	0x8913
+	.4byte	0x68eb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2688
+	.4byte	0x8913
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB507
+	.4byte	.LBE507-.LBB507
+	.4byte	0x697e
+	.uleb128 0x5e
+	.4byte	.LASF1215
+	.byte	0x1
+	.2byte	0x888
+	.4byte	0x74
+	.4byte	.LLST704
+	.uleb128 0x5e
+	.4byte	.LASF1214
+	.byte	0x1
+	.2byte	0x889
+	.4byte	0x74
+	.4byte	.LLST705
+	.uleb128 0x44
+	.4byte	.LVL2697
+	.4byte	0xb17b
+	.4byte	0x6947
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2698
+	.4byte	0x8913
+	.4byte	0x6962
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2700
+	.4byte	0x7a04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2556
+	.4byte	0x8847
+	.uleb128 0x44
+	.4byte	.LVL2563
+	.4byte	0xb17b
+	.4byte	0x69a2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2570
+	.4byte	0x8990
+	.uleb128 0x44
+	.4byte	.LVL2574
+	.4byte	0x6dbf
+	.4byte	0x69c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -84
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2578
+	.4byte	0x8847
+	.4byte	0x69db
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2583
+	.4byte	0x103ff
+	.4byte	0x6a02
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x78d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2584
+	.4byte	0x103ff
+	.4byte	0x6a22
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2585
+	.4byte	0x103ff
+	.4byte	0x6a49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x78e
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2586
+	.4byte	0x103ff
+	.4byte	0x6a69
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2599
+	.4byte	0x8913
+	.4byte	0x6a83
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x73
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2604
+	.4byte	0x103ff
+	.4byte	0x6a9a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC46
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2632
+	.4byte	0x7653
+	.4byte	0x6ab1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2636
+	.4byte	0xb17b
+	.4byte	0x6ace
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -72
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2653
+	.4byte	0x8990
+	.4byte	0x6ae8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x74
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2658
+	.4byte	0x5b4d
+	.uleb128 0x44
+	.4byte	.LVL2663
+	.4byte	0x8913
+	.4byte	0x6b0c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2664
+	.4byte	0x103ff
+	.4byte	0x6b33
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x843
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2665
+	.4byte	0x103ff
+	.4byte	0x6b53
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2667
+	.4byte	0x7a04
+	.4byte	0x6b72
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2668
+	.4byte	0x8913
+	.4byte	0x6b8d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2674
+	.4byte	0x8958
+	.4byte	0x6ba7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x76
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2677
+	.4byte	0x103ff
+	.4byte	0x6bce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8a8
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2678
+	.4byte	0x103ff
+	.4byte	0x6bee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2691
+	.4byte	0x7a04
+	.4byte	0x6c0d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2693
+	.4byte	0x8958
+	.4byte	0x6c27
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x76
+	.sleb128 0
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2702
+	.4byte	0x103ff
+	.4byte	0x6c44
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC47
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2705
+	.4byte	0x103ff
+	.4byte	0x6c68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC48
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2706
+	.4byte	0x5b4d
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x6c82
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x15
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x6c72
+	.uleb128 0x69
+	.4byte	.LASF1216
+	.byte	0x1
+	.2byte	0x73a
+	.4byte	.LFB371
+	.4byte	.LFE371-.LFB371
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6dbf
+	.uleb128 0x6d
+	.ascii	"lpa\000"
+	.byte	0x1
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LLST608
+	.uleb128 0x5c
+	.4byte	.LASF1202
+	.byte	0x1
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LLST609
+	.uleb128 0x5e
+	.4byte	.LASF1150
+	.byte	0x1
+	.2byte	0x73c
+	.4byte	0x57
+	.4byte	.LLST610
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11077
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x560
+	.4byte	0x6d88
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x740
+	.4byte	0x57
+	.4byte	.LLST611
+	.uleb128 0x5e
+	.4byte	.LASF1108
+	.byte	0x1
+	.2byte	0x741
+	.4byte	0x57
+	.4byte	.LLST612
+	.uleb128 0x5e
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0x742
+	.4byte	0x57
+	.4byte	.LLST613
+	.uleb128 0x44
+	.4byte	.LVL2229
+	.4byte	0x838c
+	.4byte	0x6d30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR87
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2230
+	.4byte	0x103ff
+	.4byte	0x6d57
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR214
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x746
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2231
+	.4byte	0x103ff
+	.4byte	0x6d77
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2232
+	.4byte	0x8540
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2223
+	.4byte	0x8958
+	.4byte	0x6da3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2238
+	.4byte	0x7a04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1217
+	.byte	0x1
+	.2byte	0x726
+	.4byte	.LFB370
+	.4byte	.LFE370-.LFB370
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e14
+	.uleb128 0x70
+	.4byte	.LASF1133
+	.byte	0x1
+	.2byte	0x726
+	.4byte	0x35d9
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5c
+	.4byte	.LASF656
+	.byte	0x1
+	.2byte	0x726
+	.4byte	0x57
+	.4byte	.LLST244
+	.uleb128 0x5c
+	.4byte	.LASF658
+	.byte	0x1
+	.2byte	0x726
+	.4byte	0x57
+	.4byte	.LLST245
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x728
+	.4byte	0x57
+	.4byte	.LLST246
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1218
+	.byte	0x1
+	.2byte	0x71b
+	.4byte	0x8f
+	.4byte	.LFB369
+	.4byte	.LFE369-.LFB369
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e4b
+	.uleb128 0x48
+	.4byte	.LVL2546
+	.4byte	0x6e4b
+	.uleb128 0x45
+	.4byte	.LVL2547
+	.4byte	0x6ec3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1219
+	.byte	0x1
+	.2byte	0x703
+	.4byte	.LFB368
+	.4byte	.LFE368-.LFB368
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6e95
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x705
+	.4byte	0x57
+	.4byte	.LLST297
+	.uleb128 0x44
+	.4byte	.LVL851
+	.4byte	0x530b
+	.4byte	0x6e84
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL852
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1220
+	.byte	0x1
+	.2byte	0x6f2
+	.4byte	0x8f
+	.4byte	.LFB367
+	.4byte	.LFE367-.LFB367
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x6ec3
+	.uleb128 0x45
+	.4byte	.LVL2545
+	.4byte	0x6ec3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1221
+	.byte	0x1
+	.2byte	0x659
+	.4byte	0x8f
+	.4byte	.LFB366
+	.4byte	.LFE366-.LFB366
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7105
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x659
+	.4byte	0x7105
+	.4byte	.LLST665
+	.uleb128 0x5e
+	.4byte	.LASF1223
+	.byte	0x1
+	.2byte	0x65b
+	.4byte	0x62
+	.4byte	.LLST666
+	.uleb128 0x5e
+	.4byte	.LASF576
+	.byte	0x1
+	.2byte	0x65b
+	.4byte	0x62
+	.4byte	.LLST667
+	.uleb128 0x5e
+	.4byte	.LASF1224
+	.byte	0x1
+	.2byte	0x65c
+	.4byte	0x62
+	.4byte	.LLST668
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x65d
+	.4byte	0x57
+	.4byte	.LLST669
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x65e
+	.4byte	0x13e
+	.4byte	.LLST670
+	.uleb128 0x5e
+	.4byte	.LASF587
+	.byte	0x1
+	.2byte	0x65f
+	.4byte	0x293a
+	.4byte	.LLST671
+	.uleb128 0x5e
+	.4byte	.LASF588
+	.byte	0x1
+	.2byte	0x660
+	.4byte	0x13e
+	.4byte	.LLST672
+	.uleb128 0x5e
+	.4byte	.LASF584
+	.byte	0x1
+	.2byte	0x661
+	.4byte	0x57
+	.4byte	.LLST673
+	.uleb128 0x38
+	.4byte	.LASF1226
+	.byte	0x1
+	.2byte	0x662
+	.4byte	0x57
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -48
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x663
+	.4byte	0x710b
+	.4byte	.LLST674
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x578
+	.4byte	0x7028
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x6b1
+	.4byte	0x74
+	.4byte	.LLST675
+	.uleb128 0x5e
+	.4byte	.LASF383
+	.byte	0x1
+	.2byte	0x6b1
+	.4byte	0x74
+	.4byte	.LLST676
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x598
+	.4byte	0x6fed
+	.uleb128 0x5e
+	.4byte	.LASF1228
+	.byte	0x1
+	.2byte	0x6cd
+	.4byte	0x57
+	.4byte	.LLST677
+	.uleb128 0x44
+	.4byte	.LVL2535
+	.4byte	0x103ff
+	.4byte	0x6fe3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC45
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2538
+	.4byte	0x8671
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2531
+	.4byte	0xb17b
+	.4byte	0x700c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2540
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2492
+	.4byte	0x530b
+	.4byte	0x704b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x32
+	.byte	0x24
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2496
+	.4byte	0x8847
+	.4byte	0x705e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2504
+	.4byte	0x8113
+	.4byte	0x7072
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2505
+	.4byte	0x80bb
+	.4byte	0x7086
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2506
+	.4byte	0x7f15
+	.4byte	0x709a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2507
+	.4byte	0x7f15
+	.4byte	0x70ae
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2510
+	.4byte	0xb17b
+	.4byte	0x70cc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2515
+	.4byte	0xb17b
+	.4byte	0x70ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2518
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2885
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2aa2
+	.uleb128 0x67
+	.4byte	.LASF1229
+	.byte	0x1
+	.2byte	0x5ea
+	.4byte	0x8f
+	.4byte	.LFB365
+	.4byte	.LFE365-.LFB365
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7309
+	.uleb128 0x5e
+	.4byte	.LASF1224
+	.byte	0x1
+	.2byte	0x5ec
+	.4byte	0x62
+	.4byte	.LLST663
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.11007
+	.uleb128 0x6f
+	.4byte	.LBB495
+	.4byte	.LBE495-.LBB495
+	.4byte	0x7171
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x60f
+	.4byte	0x57
+	.4byte	.LLST664
+	.uleb128 0x48
+	.4byte	.LVL2470
+	.4byte	0x52a5
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2458
+	.4byte	0x530b
+	.4byte	0x7184
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2459
+	.4byte	0x8847
+	.4byte	0x7197
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2461
+	.4byte	0x103ff
+	.4byte	0x71be
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x607
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2462
+	.4byte	0x103ff
+	.4byte	0x71de
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2463
+	.4byte	0x103ff
+	.4byte	0x7205
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x609
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2464
+	.4byte	0x103ff
+	.4byte	0x7225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2465
+	.4byte	0x52a5
+	.4byte	0x7242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2466
+	.4byte	0x52a5
+	.uleb128 0x48
+	.4byte	.LVL2467
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL2472
+	.4byte	0x103ff
+	.4byte	0x727b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR225
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x624
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2473
+	.4byte	0x103ff
+	.4byte	0x729b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2475
+	.4byte	0x64a2
+	.4byte	0x72b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR91
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2476
+	.4byte	0x64a2
+	.4byte	0x72c6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2477
+	.4byte	0x64a2
+	.4byte	0x72da
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2478
+	.4byte	0x64a2
+	.4byte	0x72ee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2480
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x7319
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xe
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x7309
+	.uleb128 0x5b
+	.4byte	.LASF1230
+	.byte	0x1
+	.2byte	0x5e5
+	.4byte	0x8f
+	.4byte	.LFB364
+	.4byte	.LFE364-.LFB364
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7349
+	.uleb128 0x5c
+	.4byte	.LASF1231
+	.byte	0x1
+	.2byte	0x5e5
+	.4byte	0x57
+	.4byte	.LLST243
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1232
+	.byte	0x1
+	.2byte	0x5dd
+	.byte	0x1
+	.4byte	0x736f
+	.uleb128 0x55
+	.4byte	.LASF1231
+	.byte	0x1
+	.2byte	0x5dd
+	.4byte	0x57
+	.uleb128 0x55
+	.4byte	.LASF923
+	.byte	0x1
+	.2byte	0x5dd
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1233
+	.byte	0x1
+	.2byte	0x5d0
+	.4byte	0x8f
+	.byte	0x1
+	.uleb128 0x5b
+	.4byte	.LASF1234
+	.byte	0x1
+	.2byte	0x4d2
+	.4byte	0x8f
+	.4byte	.LFB361
+	.4byte	.LFE361-.LFB361
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x75df
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x1
+	.2byte	0x4d4
+	.4byte	0x57
+	.4byte	.LLST656
+	.uleb128 0x5e
+	.4byte	.LASF1235
+	.byte	0x1
+	.2byte	0x4d4
+	.4byte	0x57
+	.4byte	.LLST657
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x4d5
+	.4byte	0x57
+	.4byte	.LLST658
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x1
+	.2byte	0x4d5
+	.4byte	0x57
+	.4byte	.LLST659
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x4d6
+	.4byte	0x62
+	.4byte	.LLST660
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x1
+	.2byte	0x4d6
+	.4byte	0x62
+	.4byte	.LLST661
+	.uleb128 0x5e
+	.4byte	.LASF1236
+	.byte	0x1
+	.2byte	0x4d7
+	.4byte	0x710b
+	.4byte	.LLST662
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x75ef
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10953
+	.uleb128 0x44
+	.4byte	.LVL2391
+	.4byte	0x530b
+	.4byte	0x7425
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2392
+	.4byte	0x530b
+	.4byte	0x7439
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2393
+	.4byte	0x530b
+	.4byte	0x744d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2394
+	.4byte	0x530b
+	.4byte	0x7461
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2395
+	.4byte	0x530b
+	.4byte	0x7483
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR206
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2398
+	.4byte	0x89c8
+	.4byte	0x7499
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2400
+	.4byte	0x8d5f
+	.4byte	0x74af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2408
+	.4byte	0xb17b
+	.4byte	0x74ce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2413
+	.4byte	0xb17b
+	.4byte	0x74e6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2419
+	.4byte	0x8737
+	.4byte	0x74fa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2420
+	.4byte	0x103ff
+	.4byte	0x7521
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR224
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x516
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2421
+	.4byte	0x103ff
+	.4byte	0x7541
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2432
+	.4byte	0x103ff
+	.4byte	0x7568
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR224
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x545
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2433
+	.4byte	0x103ff
+	.4byte	0x7588
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2443
+	.4byte	0x8737
+	.4byte	0x759b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2445
+	.4byte	0x103ff
+	.4byte	0x75c2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR224
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x5cb
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2446
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x75ef
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xd
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x75df
+	.uleb128 0x54
+	.4byte	.LASF1237
+	.byte	0x1
+	.2byte	0x46e
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x764d
+	.uleb128 0x56
+	.4byte	.LASF577
+	.byte	0x1
+	.2byte	0x470
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1238
+	.byte	0x1
+	.2byte	0x471
+	.4byte	0x764d
+	.uleb128 0x56
+	.4byte	.LASF1239
+	.byte	0x1
+	.2byte	0x472
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1240
+	.byte	0x1
+	.2byte	0x4a6
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.4byte	.LASF1237
+	.uleb128 0x68
+	.uleb128 0x56
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x4a1
+	.4byte	0x57
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2aea
+	.uleb128 0x69
+	.4byte	.LASF1241
+	.byte	0x1
+	.2byte	0x400
+	.4byte	.LFB359
+	.4byte	.LFE359-.LFB359
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7735
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x400
+	.4byte	0x7105
+	.4byte	.LLST650
+	.uleb128 0x5d
+	.ascii	"ppa\000"
+	.byte	0x1
+	.2byte	0x402
+	.4byte	0x74
+	.4byte	.LLST651
+	.uleb128 0x5e
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x403
+	.4byte	0x57
+	.4byte	.LLST652
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x404
+	.4byte	0x13e
+	.4byte	.LLST653
+	.uleb128 0x6f
+	.4byte	.LBB494
+	.4byte	.LBE494-.LBB494
+	.4byte	0x76f1
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x412
+	.4byte	0x74
+	.4byte	.LLST654
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x413
+	.4byte	0x710b
+	.4byte	.LLST655
+	.uleb128 0x45
+	.4byte	.LVL2381
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x42
+	.4byte	.LVL2384
+	.4byte	0x7d61
+	.4byte	0x7706
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2386
+	.4byte	0xb17b
+	.4byte	0x7724
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2389
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1242
+	.byte	0x1
+	.2byte	0x3f1
+	.byte	0x1
+	.4byte	0x7759
+	.uleb128 0x55
+	.4byte	.LASF669
+	.byte	0x1
+	.2byte	0x3f1
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x3f3
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1243
+	.byte	0x1
+	.2byte	0x3db
+	.4byte	0x8f
+	.4byte	.LFB357
+	.4byte	.LFE357-.LFB357
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x77b1
+	.uleb128 0x5c
+	.4byte	.LASF1244
+	.byte	0x1
+	.2byte	0x3db
+	.4byte	0x74
+	.4byte	.LLST622
+	.uleb128 0x5e
+	.4byte	.LASF1245
+	.byte	0x1
+	.2byte	0x3dd
+	.4byte	0x74
+	.4byte	.LLST623
+	.uleb128 0x44
+	.4byte	.LVL2270
+	.4byte	0x78f1
+	.4byte	0x77a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2271
+	.4byte	0x6367
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1246
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x74
+	.4byte	.LFB356
+	.4byte	.LFE356-.LFB356
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x78f1
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x74
+	.4byte	.LLST642
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x74
+	.4byte	.LLST643
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x1
+	.2byte	0x3b2
+	.4byte	0x8b6
+	.4byte	.LLST644
+	.uleb128 0x5d
+	.ascii	"len\000"
+	.byte	0x1
+	.2byte	0x3b4
+	.4byte	0x57
+	.4byte	.LLST645
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x3b4
+	.4byte	0x57
+	.4byte	.LLST646
+	.uleb128 0x5d
+	.ascii	"ppn\000"
+	.byte	0x1
+	.2byte	0x3b5
+	.4byte	0x74
+	.4byte	.LLST647
+	.uleb128 0x5e
+	.4byte	.LASF1249
+	.byte	0x1
+	.2byte	0x3b6
+	.4byte	0x74
+	.4byte	.LLST648
+	.uleb128 0x71
+	.ascii	"req\000"
+	.byte	0x1
+	.2byte	0x3b7
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x5e
+	.4byte	.LASF1250
+	.byte	0x1
+	.2byte	0x3b8
+	.4byte	0x74
+	.4byte	.LLST649
+	.uleb128 0x44
+	.4byte	.LVL2356
+	.4byte	0xb17b
+	.4byte	0x787a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2358
+	.4byte	0x103ff
+	.4byte	0x789f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC42
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -76
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2359
+	.4byte	0x7d61
+	.4byte	0x78bc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2360
+	.4byte	0x52a5
+	.4byte	0x78d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2366
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1251
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x74
+	.4byte	.LFB355
+	.4byte	.LFE355-.LFB355
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7a04
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x74
+	.4byte	.LLST614
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x74
+	.4byte	.LLST615
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x1
+	.2byte	0x38e
+	.4byte	0x8b6
+	.4byte	.LLST616
+	.uleb128 0x5d
+	.ascii	"len\000"
+	.byte	0x1
+	.2byte	0x390
+	.4byte	0x57
+	.4byte	.LLST617
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x1
+	.2byte	0x390
+	.4byte	0x57
+	.4byte	.LLST618
+	.uleb128 0x5d
+	.ascii	"ppn\000"
+	.byte	0x1
+	.2byte	0x391
+	.4byte	0x74
+	.4byte	.LLST619
+	.uleb128 0x5e
+	.4byte	.LASF1249
+	.byte	0x1
+	.2byte	0x392
+	.4byte	0x74
+	.4byte	.LLST620
+	.uleb128 0x71
+	.ascii	"req\000"
+	.byte	0x1
+	.2byte	0x393
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x5e
+	.4byte	.LASF1250
+	.byte	0x1
+	.2byte	0x394
+	.4byte	0x74
+	.4byte	.LLST621
+	.uleb128 0x44
+	.4byte	.LVL2251
+	.4byte	0xb17b
+	.4byte	0x79ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2254
+	.4byte	0x52a5
+	.4byte	0x79d7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2256
+	.4byte	0x7d61
+	.4byte	0x79f4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2261
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1252
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x8f
+	.4byte	.LFB354
+	.4byte	.LFE354-.LFB354
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7c31
+	.uleb128 0x6d
+	.ascii	"lpn\000"
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x74
+	.4byte	.LLST600
+	.uleb128 0x6d
+	.ascii	"ppn\000"
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x13e
+	.4byte	.LLST601
+	.uleb128 0x5c
+	.4byte	.LASF1253
+	.byte	0x1
+	.2byte	0x36d
+	.4byte	0x8f
+	.4byte	.LLST602
+	.uleb128 0x5e
+	.4byte	.LASF1254
+	.byte	0x1
+	.2byte	0x36f
+	.4byte	0x57
+	.4byte	.LLST603
+	.uleb128 0x38
+	.4byte	.LASF1255
+	.byte	0x1
+	.2byte	0x36f
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x38
+	.4byte	.LASF1256
+	.byte	0x1
+	.2byte	0x36f
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7c41
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10872
+	.uleb128 0x63
+	.4byte	.LASF1257
+	.byte	0x1
+	.2byte	0x378
+	.4byte	.L1988
+	.uleb128 0x72
+	.4byte	0x81e2
+	.4byte	.LBB472
+	.4byte	.Ldebug_ranges0+0x548
+	.byte	0x1
+	.2byte	0x38a
+	.4byte	0x7bd0
+	.uleb128 0x4f
+	.4byte	0x81ff
+	.4byte	.LLST604
+	.uleb128 0x4f
+	.4byte	0x81f3
+	.4byte	.LLST605
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x548
+	.uleb128 0x73
+	.4byte	0x820b
+	.4byte	.LLST606
+	.uleb128 0x73
+	.4byte	0x8217
+	.4byte	.LLST607
+	.uleb128 0x74
+	.4byte	0x8223
+	.uleb128 0x44
+	.4byte	.LVL2204
+	.4byte	0x103ff
+	.4byte	0x7afe
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR213
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x20e
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2205
+	.4byte	0x103ff
+	.4byte	0x7b1e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2207
+	.4byte	0x530b
+	.4byte	0x7b32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2213
+	.4byte	0xb17b
+	.4byte	0x7b51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -40
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2217
+	.4byte	0x103ff
+	.4byte	0x7b6e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2218
+	.4byte	0x7d61
+	.4byte	0x7b8b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2219
+	.4byte	0x103ff
+	.4byte	0x7bb2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR213
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x228
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2220
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2197
+	.4byte	0x103ff
+	.4byte	0x7bf7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR212
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x374
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2198
+	.4byte	0x103ff
+	.4byte	0x7c17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2201
+	.4byte	0x7c78
+	.uleb128 0x45
+	.4byte	.LVL2203
+	.4byte	0x7d13
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x7c41
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x8
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x7c31
+	.uleb128 0x5b
+	.4byte	.LASF1258
+	.byte	0x1
+	.2byte	0x35f
+	.4byte	0x8f
+	.4byte	.LFB353
+	.4byte	.LFE353-.LFB353
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7c78
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x361
+	.4byte	0x57
+	.4byte	.LLST599
+	.uleb128 0x48
+	.4byte	.LVL2189
+	.4byte	0x7d13
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1259
+	.byte	0x1
+	.2byte	0x337
+	.4byte	0x57
+	.4byte	.LFB352
+	.4byte	.LFE352-.LFB352
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7d13
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x1
+	.2byte	0x339
+	.4byte	0x57
+	.4byte	.LLST236
+	.uleb128 0x5e
+	.4byte	.LASF1260
+	.byte	0x1
+	.2byte	0x33a
+	.4byte	0x57
+	.4byte	.LLST237
+	.uleb128 0x5e
+	.4byte	.LASF1261
+	.byte	0x1
+	.2byte	0x33b
+	.4byte	0x74
+	.4byte	.LLST238
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x6c82
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10856
+	.uleb128 0x44
+	.4byte	.LVL626
+	.4byte	0x103ff
+	.4byte	0x7cf6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR98
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x35b
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL627
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1262
+	.byte	0x1
+	.2byte	0x32d
+	.4byte	0x8f
+	.4byte	.LFB351
+	.4byte	.LFE351-.LFB351
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7d61
+	.uleb128 0x5c
+	.4byte	.LASF1254
+	.byte	0x1
+	.2byte	0x32d
+	.4byte	0x57
+	.4byte	.LLST597
+	.uleb128 0x5e
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x32f
+	.4byte	0x74
+	.4byte	.LLST598
+	.uleb128 0x45
+	.4byte	.LVL2183
+	.4byte	0x7d61
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1263
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x7dd0
+	.uleb128 0x55
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x7105
+	.uleb128 0x55
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x74
+	.uleb128 0x55
+	.4byte	.LASF1248
+	.byte	0x1
+	.2byte	0x2e5
+	.4byte	0x13e
+	.uleb128 0x56
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x2e7
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x2e8
+	.4byte	0x710b
+	.uleb128 0x56
+	.4byte	.LASF1239
+	.byte	0x1
+	.2byte	0x2e9
+	.4byte	0x57
+	.uleb128 0x58
+	.4byte	.LASF1264
+	.byte	0x1
+	.2byte	0x2ee
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5c4d
+	.4byte	.LASF1263
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1265
+	.byte	0x1
+	.2byte	0x2b3
+	.4byte	0x8f
+	.4byte	.LFB349
+	.4byte	.LFE349-.LFB349
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x7f00
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x2b3
+	.4byte	0x7105
+	.4byte	.LLST586
+	.uleb128 0x56
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x2b5
+	.4byte	0x57
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x2b5
+	.4byte	0x57
+	.4byte	.LLST587
+	.uleb128 0x5e
+	.4byte	.LASF1266
+	.byte	0x1
+	.2byte	0x2b6
+	.4byte	0x57
+	.4byte	.LLST588
+	.uleb128 0x5e
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x2b7
+	.4byte	0x293a
+	.4byte	.LLST589
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x2b8
+	.4byte	0x13e
+	.4byte	.LLST590
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x2b9
+	.4byte	0x710b
+	.4byte	.LLST591
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7f10
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10823
+	.uleb128 0x44
+	.4byte	.LVL2141
+	.4byte	0x103ff
+	.4byte	0x7e8c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR210
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2bf
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2142
+	.4byte	0x103ff
+	.4byte	0x7eac
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2143
+	.4byte	0x858a
+	.uleb128 0x44
+	.4byte	.LVL2149
+	.4byte	0x530b
+	.4byte	0x7ec9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2154
+	.4byte	0xae0d
+	.4byte	0x7eef
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR199
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2155
+	.4byte	0x7f15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x7f10
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x1e
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x7f00
+	.uleb128 0x5b
+	.4byte	.LASF1268
+	.byte	0x1
+	.2byte	0x277
+	.4byte	0x8f
+	.4byte	.LFB348
+	.4byte	.LFE348-.LFB348
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x80bb
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x277
+	.4byte	0x7105
+	.4byte	.LLST579
+	.uleb128 0x5e
+	.4byte	.LASF1269
+	.byte	0x1
+	.2byte	0x279
+	.4byte	0x57
+	.4byte	.LLST580
+	.uleb128 0x5e
+	.4byte	.LASF1270
+	.byte	0x1
+	.2byte	0x27a
+	.4byte	0x57
+	.4byte	.LLST581
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x27b
+	.4byte	0x57
+	.4byte	.LLST582
+	.uleb128 0x5e
+	.4byte	.LASF1271
+	.byte	0x1
+	.2byte	0x27c
+	.4byte	0x57
+	.4byte	.LLST583
+	.uleb128 0x5e
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x27d
+	.4byte	0x293a
+	.4byte	.LLST584
+	.uleb128 0x38
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x27e
+	.4byte	0x13e
+	.uleb128 0x1
+	.byte	0x5b
+	.uleb128 0x5e
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x27f
+	.4byte	0x710b
+	.4byte	.LLST585
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10810
+	.uleb128 0x44
+	.4byte	.LVL2111
+	.4byte	0x8113
+	.4byte	0x7fd0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2115
+	.4byte	0x80bb
+	.4byte	0x7fe4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2118
+	.4byte	0x8737
+	.4byte	0x7ffd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2120
+	.4byte	0x80bb
+	.4byte	0x8011
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2126
+	.4byte	0x103ff
+	.4byte	0x8028
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC36
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2131
+	.4byte	0xb17b
+	.4byte	0x8046
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2132
+	.4byte	0x103ff
+	.4byte	0x806d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR209
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x29f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2133
+	.4byte	0x103ff
+	.4byte	0x808d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2134
+	.4byte	0x103ff
+	.4byte	0x80a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC37
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2138
+	.4byte	0x7d61
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1272
+	.byte	0x1
+	.2byte	0x258
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x80fe
+	.uleb128 0x55
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x258
+	.4byte	0x7105
+	.uleb128 0x56
+	.4byte	.LASF1271
+	.byte	0x1
+	.2byte	0x25a
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x25b
+	.4byte	0x293a
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x810e
+	.4byte	.LASF1272
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x810e
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x19
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x80fe
+	.uleb128 0x5b
+	.4byte	.LASF1273
+	.byte	0x1
+	.2byte	0x230
+	.4byte	0x8f
+	.4byte	.LFB346
+	.4byte	.LFE346-.LFB346
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x81e2
+	.uleb128 0x5c
+	.4byte	.LASF1222
+	.byte	0x1
+	.2byte	0x230
+	.4byte	0x7105
+	.4byte	.LLST290
+	.uleb128 0x38
+	.4byte	.LASF1267
+	.byte	0x1
+	.2byte	0x232
+	.4byte	0x293a
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x5e
+	.4byte	.LASF1225
+	.byte	0x1
+	.2byte	0x233
+	.4byte	0x13e
+	.4byte	.LLST291
+	.uleb128 0x38
+	.4byte	.LASF1274
+	.byte	0x1
+	.2byte	0x234
+	.4byte	0x293a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x1
+	.2byte	0x235
+	.4byte	0x57
+	.4byte	.LLST292
+	.uleb128 0x5e
+	.4byte	.LASF607
+	.byte	0x1
+	.2byte	0x235
+	.4byte	0x57
+	.4byte	.LLST293
+	.uleb128 0x5e
+	.4byte	.LASF1271
+	.byte	0x1
+	.2byte	0x236
+	.4byte	0x57
+	.4byte	.LLST294
+	.uleb128 0x5e
+	.4byte	.LASF1275
+	.byte	0x1
+	.2byte	0x237
+	.4byte	0x57
+	.4byte	.LLST295
+	.uleb128 0x5e
+	.4byte	.LASF1270
+	.byte	0x1
+	.2byte	0x238
+	.4byte	0x57
+	.4byte	.LLST296
+	.uleb128 0x44
+	.4byte	.LVL831
+	.4byte	0x530b
+	.4byte	0x81d2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL848
+	.4byte	0x8737
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x75
+	.4byte	.LASF1276
+	.byte	0x1
+	.2byte	0x209
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x8231
+	.uleb128 0x55
+	.4byte	.LASF595
+	.byte	0x1
+	.2byte	0x209
+	.4byte	0x57
+	.uleb128 0x55
+	.4byte	.LASF1254
+	.byte	0x1
+	.2byte	0x209
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1227
+	.byte	0x1
+	.2byte	0x20b
+	.4byte	0x710b
+	.uleb128 0x56
+	.4byte	.LASF21
+	.byte	0x1
+	.2byte	0x20c
+	.4byte	0x74
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x5c0d
+	.4byte	.LASF1276
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1277
+	.byte	0x1
+	.2byte	0x1e1
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x82b0
+	.uleb128 0x55
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x1e1
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1278
+	.byte	0x1
+	.2byte	0x1e3
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1279
+	.byte	0x1
+	.2byte	0x1e4
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1280
+	.byte	0x1
+	.2byte	0x1e5
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1281
+	.byte	0x1
+	.2byte	0x1e7
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1282
+	.byte	0x1
+	.2byte	0x1e8
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x1e9
+	.4byte	0x3529
+	.uleb128 0x56
+	.4byte	.LASF1284
+	.byte	0x1
+	.2byte	0x1e9
+	.4byte	0x3529
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x6c82
+	.4byte	.LASF1277
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1285
+	.byte	0x1
+	.2byte	0x1cd
+	.4byte	0x8f
+	.4byte	.LFB343
+	.4byte	.LFE343-.LFB343
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x82fb
+	.uleb128 0x5c
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0x1cd
+	.4byte	0x57
+	.4byte	.LLST220
+	.uleb128 0x5e
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x1cf
+	.4byte	0x57
+	.4byte	.LLST221
+	.uleb128 0x5e
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x1d0
+	.4byte	0x3529
+	.4byte	.LLST222
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1286
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x8f
+	.4byte	.LFB342
+	.4byte	.LFE342-.LFB342
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8386
+	.uleb128 0x5c
+	.4byte	.LASF1287
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x8386
+	.4byte	.LLST214
+	.uleb128 0x5c
+	.4byte	.LASF542
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x57
+	.4byte	.LLST215
+	.uleb128 0x5c
+	.4byte	.LASF660
+	.byte	0x1
+	.2byte	0x19a
+	.4byte	0x57
+	.4byte	.LLST216
+	.uleb128 0x5e
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x19c
+	.4byte	0x57
+	.4byte	.LLST217
+	.uleb128 0x5e
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x19d
+	.4byte	0x3529
+	.4byte	.LLST218
+	.uleb128 0x5e
+	.4byte	.LASF1288
+	.byte	0x1
+	.2byte	0x19e
+	.4byte	0x74
+	.4byte	.LLST219
+	.uleb128 0x45
+	.4byte	.LVL566
+	.4byte	0x838c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x3529
+	.uleb128 0x5b
+	.4byte	.LASF1289
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x8f
+	.4byte	.LFB341
+	.4byte	.LFE341-.LFB341
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8437
+	.uleb128 0x5c
+	.4byte	.LASF1287
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x8386
+	.4byte	.LLST211
+	.uleb128 0x5c
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x17d
+	.4byte	0x57
+	.4byte	.LLST212
+	.uleb128 0x38
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x17f
+	.4byte	0x3529
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x5e
+	.4byte	.LASF1290
+	.byte	0x1
+	.2byte	0x17f
+	.4byte	0x3529
+	.4byte	.LLST213
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x8447
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10728
+	.uleb128 0x44
+	.4byte	.LVL550
+	.4byte	0x103ff
+	.4byte	0x841a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR90
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x182
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL551
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x8447
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x10
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x8437
+	.uleb128 0x5b
+	.4byte	.LASF1291
+	.byte	0x1
+	.2byte	0x14c
+	.4byte	0x8f
+	.4byte	.LFB340
+	.4byte	.LFE340-.LFB340
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x84c4
+	.uleb128 0x5c
+	.4byte	.LASF1188
+	.byte	0x1
+	.2byte	0x14c
+	.4byte	0x57
+	.4byte	.LLST206
+	.uleb128 0x5e
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x14e
+	.4byte	0x3529
+	.4byte	.LLST207
+	.uleb128 0x38
+	.4byte	.LASF1290
+	.byte	0x1
+	.2byte	0x14e
+	.4byte	0x3529
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
+	.4byte	.LASF1292
+	.byte	0x1
+	.2byte	0x14f
+	.4byte	0x57
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1293
+	.byte	0x1
+	.2byte	0x150
+	.4byte	0x57
+	.4byte	.LLST208
+	.uleb128 0x5e
+	.4byte	.LASF1294
+	.byte	0x1
+	.2byte	0x151
+	.4byte	0x57
+	.4byte	.LLST209
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1295
+	.byte	0x1
+	.byte	0xff
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x8540
+	.uleb128 0x51
+	.4byte	.LASF1188
+	.byte	0x1
+	.byte	0xff
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1283
+	.byte	0x1
+	.2byte	0x101
+	.4byte	0x3529
+	.uleb128 0x56
+	.4byte	.LASF1290
+	.byte	0x1
+	.2byte	0x101
+	.4byte	0x3529
+	.uleb128 0x56
+	.4byte	.LASF1296
+	.byte	0x1
+	.2byte	0x102
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1297
+	.byte	0x1
+	.2byte	0x103
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1280
+	.byte	0x1
+	.2byte	0x104
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1298
+	.byte	0x1
+	.2byte	0x105
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1294
+	.byte	0x1
+	.2byte	0x106
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF602
+	.byte	0x1
+	.2byte	0x107
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x76
+	.4byte	.LASF1299
+	.byte	0x1
+	.byte	0xe0
+	.byte	0x1
+	.4byte	0x8565
+	.uleb128 0x51
+	.4byte	.LASF1188
+	.byte	0x1
+	.byte	0xe0
+	.4byte	0x57
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x8447
+	.4byte	.LASF1299
+	.byte	0
+	.uleb128 0x76
+	.4byte	.LASF1300
+	.byte	0x1
+	.byte	0xd5
+	.byte	0x1
+	.4byte	0x858a
+	.uleb128 0x51
+	.4byte	.LASF1188
+	.byte	0x1
+	.byte	0xd5
+	.4byte	0x57
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x8447
+	.4byte	.LASF1300
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1301
+	.byte	0x1
+	.byte	0xb5
+	.4byte	0x57
+	.4byte	.LFB336
+	.4byte	.LFE336-.LFB336
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x866b
+	.uleb128 0x41
+	.ascii	"tmp\000"
+	.byte	0x1
+	.byte	0xb7
+	.4byte	0x57
+	.4byte	.LLST194
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0xb8
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x78
+	.4byte	.LASF1302
+	.byte	0x1
+	.byte	0xba
+	.4byte	.L509
+	.uleb128 0x6f
+	.4byte	.LBB254
+	.4byte	.LBE254-.LBB254
+	.4byte	0x862b
+	.uleb128 0x61
+	.4byte	.LASF1303
+	.byte	0x1
+	.byte	0xc0
+	.4byte	0x57
+	.4byte	.LLST195
+	.uleb128 0x44
+	.4byte	.LVL471
+	.4byte	0x8958
+	.4byte	0x85fd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL473
+	.4byte	0xac82
+	.4byte	0x8616
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL474
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x79
+	.4byte	0x87e2
+	.4byte	.LBB252
+	.4byte	.LBE252-.LBB252
+	.byte	0x1
+	.byte	0xbb
+	.uleb128 0x44
+	.4byte	.LVL476
+	.4byte	0x103ff
+	.4byte	0x8657
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL478
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC4
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x2db6
+	.uleb128 0x4b
+	.4byte	.LASF1304
+	.byte	0x1
+	.byte	0xa0
+	.4byte	0x8f
+	.4byte	.LFB335
+	.4byte	.LFE335-.LFB335
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x86e8
+	.uleb128 0x3f
+	.ascii	"blk\000"
+	.byte	0x1
+	.byte	0xa0
+	.4byte	0x57
+	.4byte	.LLST191
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x1
+	.byte	0xa2
+	.4byte	0x8f
+	.4byte	.LLST192
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0xa3
+	.4byte	0x74
+	.4byte	.LLST193
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0xa4
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x79
+	.4byte	0x87e2
+	.4byte	.LBB250
+	.4byte	.LBE250-.LBB250
+	.byte	0x1
+	.byte	0xa6
+	.uleb128 0x45
+	.4byte	.LVL464
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC3
+	.byte	0
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1305
+	.byte	0x1
+	.byte	0x75
+	.4byte	.LFB334
+	.4byte	.LFE334-.LFB334
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8737
+	.uleb128 0x36
+	.4byte	.LASF602
+	.byte	0x1
+	.byte	0x77
+	.4byte	0x84
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x1
+	.byte	0x78
+	.4byte	0x57
+	.4byte	.LLST189
+	.uleb128 0x41
+	.ascii	"blk\000"
+	.byte	0x1
+	.byte	0x78
+	.4byte	0x57
+	.4byte	.LLST190
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0x79
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1306
+	.byte	0x1
+	.byte	0x61
+	.4byte	.LFB333
+	.4byte	.LFE333-.LFB333
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x87d6
+	.uleb128 0x3f
+	.ascii	"blk\000"
+	.byte	0x1
+	.byte	0x61
+	.4byte	0x57
+	.4byte	.LLST185
+	.uleb128 0x40
+	.4byte	.LASF1307
+	.byte	0x1
+	.byte	0x61
+	.4byte	0x57
+	.4byte	.LLST186
+	.uleb128 0x6f
+	.4byte	.LBB248
+	.4byte	.LBE248-.LBB248
+	.4byte	0x87c6
+	.uleb128 0x41
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0x66
+	.4byte	0x866b
+	.4byte	.LLST187
+	.uleb128 0x7a
+	.4byte	.LBB249
+	.4byte	.LBE249-.LBB249
+	.uleb128 0x61
+	.4byte	.LASF1303
+	.byte	0x1
+	.byte	0x68
+	.4byte	0x57
+	.4byte	.LLST188
+	.uleb128 0x44
+	.4byte	.LVL445
+	.4byte	0x8958
+	.4byte	0x87b0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL447
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x79
+	.4byte	0x87d6
+	.4byte	.LBB246
+	.4byte	.LBE246-.LBB246
+	.byte	0x1
+	.byte	0x65
+	.byte	0
+	.uleb128 0x46
+	.4byte	.LASF1308
+	.byte	0x1
+	.byte	0x5c
+	.4byte	0x57
+	.byte	0x1
+	.uleb128 0x46
+	.4byte	.LASF1309
+	.byte	0x1
+	.byte	0x57
+	.4byte	0x57
+	.byte	0x1
+	.uleb128 0x4b
+	.4byte	.LASF1310
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0x57
+	.4byte	.LFB330
+	.4byte	.LFE330-.LFB330
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8847
+	.uleb128 0x3f
+	.ascii	"max\000"
+	.byte	0x1
+	.byte	0x4b
+	.4byte	0x57
+	.4byte	.LLST289
+	.uleb128 0x77
+	.ascii	"Q\000"
+	.byte	0x1
+	.byte	0x4d
+	.4byte	0x866b
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.uleb128 0x45
+	.4byte	.LVL826
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR75+8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1311
+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x8f
+	.4byte	.LFB329
+	.4byte	.LFE329-.LFB329
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8913
+	.uleb128 0x40
+	.4byte	.LASF664
+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x74
+	.4byte	.LLST570
+	.uleb128 0x40
+	.4byte	.LASF1312
+	.byte	0x1
+	.byte	0x2e
+	.4byte	0x8f
+	.4byte	.LLST571
+	.uleb128 0x77
+	.ascii	"req\000"
+	.byte	0x1
+	.byte	0x30
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -124
+	.uleb128 0x41
+	.ascii	"low\000"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x62
+	.4byte	.LLST572
+	.uleb128 0x36
+	.4byte	.LASF1313
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x62
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x41
+	.ascii	"mid\000"
+	.byte	0x1
+	.byte	0x31
+	.4byte	0x62
+	.4byte	.LLST573
+	.uleb128 0x36
+	.4byte	.LASF278
+	.byte	0x1
+	.byte	0x32
+	.4byte	0x73e
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -88
+	.uleb128 0x61
+	.4byte	.LASF1314
+	.byte	0x1
+	.byte	0x33
+	.4byte	0x57
+	.4byte	.LLST574
+	.uleb128 0x44
+	.4byte	.LVL2070
+	.4byte	0xb17b
+	.4byte	0x88f6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -124
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2075
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -124
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1315
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0x74
+	.4byte	.LFB328
+	.4byte	.LFE328-.LFB328
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8958
+	.uleb128 0x40
+	.4byte	.LASF1316
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0x74
+	.4byte	.LLST183
+	.uleb128 0x52
+	.4byte	.LASF1317
+	.byte	0x1
+	.byte	0x1e
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x41
+	.ascii	"ret\000"
+	.byte	0x1
+	.byte	0x20
+	.4byte	0x74
+	.4byte	.LLST184
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1318
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x57
+	.4byte	.LFB327
+	.4byte	.LFE327-.LFB327
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8990
+	.uleb128 0x40
+	.4byte	.LASF1116
+	.byte	0x1
+	.byte	0x14
+	.4byte	0x57
+	.4byte	.LLST181
+	.uleb128 0x61
+	.4byte	.LASF1235
+	.byte	0x1
+	.byte	0x16
+	.4byte	0x57
+	.4byte	.LLST182
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1319
+	.byte	0x1
+	.byte	0xc
+	.4byte	0x57
+	.4byte	.LFB326
+	.4byte	.LFE326-.LFB326
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x89c8
+	.uleb128 0x40
+	.4byte	.LASF1116
+	.byte	0x1
+	.byte	0xc
+	.4byte	0x57
+	.4byte	.LLST179
+	.uleb128 0x61
+	.4byte	.LASF1114
+	.byte	0x1
+	.byte	0xe
+	.4byte	0x57
+	.4byte	.LLST180
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1320
+	.byte	0x1
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LFB325
+	.4byte	.LFE325-.LFB325
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8a0f
+	.uleb128 0x40
+	.4byte	.LASF1114
+	.byte	0x1
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LLST176
+	.uleb128 0x40
+	.4byte	.LASF1235
+	.byte	0x1
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LLST177
+	.uleb128 0x61
+	.4byte	.LASF1108
+	.byte	0x1
+	.byte	0x6
+	.4byte	0x57
+	.4byte	.LLST178
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1321
+	.byte	0x5
+	.2byte	0x168
+	.4byte	0x84
+	.byte	0x1
+	.4byte	0x8a59
+	.uleb128 0x57
+	.ascii	"die\000"
+	.byte	0x5
+	.2byte	0x16a
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"blk\000"
+	.byte	0x5
+	.2byte	0x16b
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1322
+	.byte	0x5
+	.2byte	0x16c
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1323
+	.byte	0x5
+	.2byte	0x16e
+	.4byte	0x8a59
+	.uleb128 0x58
+	.4byte	.LASF1324
+	.byte	0x5
+	.2byte	0x187
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x29fa
+	.uleb128 0x4b
+	.4byte	.LASF1325
+	.byte	0x5
+	.byte	0xf8
+	.4byte	0x8f
+	.4byte	.LFB323
+	.4byte	.LFE323-.LFB323
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8baf
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0xfa
+	.4byte	0x74
+	.4byte	.LLST575
+	.uleb128 0x41
+	.ascii	"blk\000"
+	.byte	0x5
+	.byte	0xfb
+	.4byte	0x57
+	.4byte	.LLST576
+	.uleb128 0x61
+	.4byte	.LASF1224
+	.byte	0x5
+	.byte	0xfd
+	.4byte	0x62
+	.4byte	.LLST577
+	.uleb128 0x61
+	.4byte	.LASF1323
+	.byte	0x5
+	.byte	0xfe
+	.4byte	0x8a59
+	.4byte	.LLST578
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x8bbf
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10592
+	.uleb128 0x48
+	.4byte	.LVL2082
+	.4byte	0x8bc4
+	.uleb128 0x44
+	.4byte	.LVL2084
+	.4byte	0xb17b
+	.4byte	0x8ae8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2085
+	.4byte	0xb17b
+	.4byte	0x8b06
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2087
+	.4byte	0xb17b
+	.4byte	0x8b24
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2088
+	.4byte	0x8847
+	.4byte	0x8b37
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2090
+	.4byte	0x103ff
+	.4byte	0x8b5e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR208
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x150
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2091
+	.4byte	0x103ff
+	.4byte	0x8b7e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2092
+	.4byte	0x9fb4
+	.uleb128 0x44
+	.4byte	.LVL2100
+	.4byte	0xb17b
+	.4byte	0x8ba5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2105
+	.4byte	0x52a5
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x8bbf
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xa
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x8baf
+	.uleb128 0x3e
+	.4byte	.LASF1326
+	.byte	0x5
+	.byte	0xe0
+	.4byte	.LFB322
+	.4byte	.LFE322-.LFB322
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8bf8
+	.uleb128 0x4d
+	.4byte	.LVL823
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR74+12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1327
+	.byte	0x5
+	.byte	0xb5
+	.4byte	0x8f
+	.4byte	.LFB321
+	.4byte	.LFE321-.LFB321
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8c64
+	.uleb128 0x77
+	.ascii	"die\000"
+	.byte	0x5
+	.byte	0xb7
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x41
+	.ascii	"blk\000"
+	.byte	0x5
+	.byte	0xb8
+	.4byte	0x57
+	.4byte	.LLST568
+	.uleb128 0x61
+	.4byte	.LASF1328
+	.byte	0x5
+	.byte	0xb9
+	.4byte	0x74
+	.4byte	.LLST569
+	.uleb128 0x36
+	.4byte	.LASF1323
+	.byte	0x5
+	.byte	0xba
+	.4byte	0x8a59
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x45
+	.4byte	.LVL2059
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1329
+	.byte	0x5
+	.byte	0x67
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x8cb3
+	.uleb128 0x7c
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x69
+	.4byte	0x8f
+	.uleb128 0x7d
+	.4byte	.LASF1330
+	.byte	0x5
+	.byte	0x6a
+	.4byte	0x8f
+	.uleb128 0x7d
+	.4byte	.LASF1323
+	.byte	0x5
+	.byte	0x6b
+	.4byte	0x8a59
+	.uleb128 0x7d
+	.4byte	.LASF1239
+	.byte	0x5
+	.byte	0x6c
+	.4byte	0x57
+	.uleb128 0x62
+	.4byte	.LASF1331
+	.byte	0x5
+	.byte	0x81
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x7319
+	.4byte	.LASF1329
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1332
+	.byte	0x5
+	.byte	0x47
+	.4byte	.LFB319
+	.4byte	.LFE319-.LFB319
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8d57
+	.uleb128 0x40
+	.4byte	.LASF1267
+	.byte	0x5
+	.byte	0x47
+	.4byte	0x293a
+	.4byte	.LLST287
+	.uleb128 0x40
+	.4byte	.LASF1333
+	.byte	0x5
+	.byte	0x47
+	.4byte	0x13e
+	.4byte	.LLST288
+	.uleb128 0x7c
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x49
+	.4byte	0x74
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x75ef
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10546
+	.uleb128 0x44
+	.4byte	.LVL819
+	.4byte	0x530b
+	.4byte	0x8d17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL820
+	.4byte	0x103ff
+	.4byte	0x8d3a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x4f
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL821
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x4a
+	.4byte	.LASF1334
+	.byte	0x5
+	.byte	0x2c
+	.byte	0x1
+	.uleb128 0x7b
+	.4byte	.LASF1335
+	.byte	0x5
+	.byte	0x19
+	.4byte	0x8f
+	.4byte	.LFB317
+	.4byte	.LFE317-.LFB317
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8dc2
+	.uleb128 0x40
+	.4byte	.LASF664
+	.byte	0x5
+	.byte	0x19
+	.4byte	0x57
+	.4byte	.LLST171
+	.uleb128 0x41
+	.ascii	"die\000"
+	.byte	0x5
+	.byte	0x1b
+	.4byte	0x74
+	.4byte	.LLST172
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x5
+	.byte	0x1c
+	.4byte	0x74
+	.4byte	.LLST173
+	.uleb128 0x61
+	.4byte	.LASF1333
+	.byte	0x5
+	.byte	0x1d
+	.4byte	0x13e
+	.4byte	.LLST174
+	.uleb128 0x61
+	.4byte	.LASF1336
+	.byte	0x5
+	.byte	0x1e
+	.4byte	0x57
+	.4byte	.LLST175
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1337
+	.byte	0x5
+	.byte	0x4
+	.4byte	0x8f
+	.4byte	.LFB316
+	.4byte	.LFE316-.LFB316
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8e37
+	.uleb128 0x40
+	.4byte	.LASF664
+	.byte	0x5
+	.byte	0x4
+	.4byte	0x57
+	.4byte	.LLST167
+	.uleb128 0x41
+	.ascii	"die\000"
+	.byte	0x5
+	.byte	0x6
+	.4byte	0x74
+	.4byte	.LLST168
+	.uleb128 0x61
+	.4byte	.LASF1333
+	.byte	0x5
+	.byte	0x7
+	.4byte	0x13e
+	.4byte	.LLST169
+	.uleb128 0x61
+	.4byte	.LASF1336
+	.byte	0x5
+	.byte	0x8
+	.4byte	0x57
+	.4byte	.LLST170
+	.uleb128 0x45
+	.4byte	.LVL416
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x7e
+	.4byte	.LASF1338
+	.byte	0x4
+	.2byte	0x739
+	.4byte	0x74
+	.4byte	.LFB315
+	.4byte	.LFE315-.LFB315
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x7e
+	.4byte	.LASF1339
+	.byte	0x4
+	.2byte	0x734
+	.4byte	0x74
+	.4byte	.LFB314
+	.4byte	.LFE314-.LFB314
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x7e
+	.4byte	.LASF1340
+	.byte	0x4
+	.2byte	0x72f
+	.4byte	0x74
+	.4byte	.LFB313
+	.4byte	.LFE313-.LFB313
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x54
+	.4byte	.LASF1341
+	.byte	0x4
+	.2byte	0x72a
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0x8e97
+	.uleb128 0x66
+	.ascii	"lun\000"
+	.byte	0x4
+	.2byte	0x72a
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1342
+	.byte	0x4
+	.2byte	0x725
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0x8eb5
+	.uleb128 0x66
+	.ascii	"LUN\000"
+	.byte	0x4
+	.2byte	0x725
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1343
+	.byte	0x4
+	.2byte	0x720
+	.4byte	0x74
+	.byte	0x1
+	.uleb128 0x67
+	.4byte	.LASF1344
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x8f
+	.4byte	.LFB309
+	.4byte	.LFE309-.LFB309
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x8fd6
+	.uleb128 0x6d
+	.ascii	"lun\000"
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x19f1
+	.4byte	.LLST635
+	.uleb128 0x5c
+	.4byte	.LASF176
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x1a00
+	.4byte	.LLST636
+	.uleb128 0x5c
+	.4byte	.LASF1345
+	.byte	0x4
+	.2byte	0x6f2
+	.4byte	0x1a00
+	.4byte	.LLST637
+	.uleb128 0x5e
+	.4byte	.LASF864
+	.byte	0x4
+	.2byte	0x6f4
+	.4byte	0x57
+	.4byte	.LLST638
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x4
+	.2byte	0x6f5
+	.4byte	0x57
+	.4byte	.LLST639
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x4
+	.2byte	0x6f6
+	.4byte	0x74
+	.4byte	.LLST640
+	.uleb128 0x38
+	.4byte	.LASF1202
+	.byte	0x4
+	.2byte	0x6f7
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -32
+	.uleb128 0x38
+	.4byte	.LASF1161
+	.byte	0x4
+	.2byte	0x6f7
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x5e
+	.4byte	.LASF1150
+	.byte	0x4
+	.2byte	0x6f8
+	.4byte	0x57
+	.4byte	.LLST641
+	.uleb128 0x48
+	.4byte	.LVL2318
+	.4byte	0x93da
+	.uleb128 0x48
+	.4byte	.LVL2328
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2329
+	.4byte	0x75f4
+	.uleb128 0x44
+	.4byte	.LVL2330
+	.4byte	0x7a04
+	.4byte	0x8fa4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2331
+	.4byte	0x7a04
+	.4byte	0x8fc3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -28
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2332
+	.4byte	0x8958
+	.uleb128 0x48
+	.4byte	.LVL2333
+	.4byte	0x5b4d
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1346
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x8f
+	.4byte	.LFB308
+	.4byte	.LFE308-.LFB308
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x93c5
+	.uleb128 0x6d
+	.ascii	"LUN\000"
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x3a
+	.4byte	.LLST764
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x74
+	.4byte	.LLST765
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x74
+	.4byte	.LLST766
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x4
+	.2byte	0x639
+	.4byte	0x8b6
+	.4byte	.LLST767
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x4
+	.2byte	0x63b
+	.4byte	0x5442
+	.4byte	.LLST768
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x4
+	.2byte	0x63c
+	.4byte	0x74
+	.4byte	.LLST769
+	.uleb128 0x5e
+	.4byte	.LASF1347
+	.byte	0x4
+	.2byte	0x63c
+	.4byte	0x74
+	.4byte	.LLST770
+	.uleb128 0x5e
+	.4byte	.LASF1348
+	.byte	0x4
+	.2byte	0x63c
+	.4byte	0x74
+	.4byte	.LLST771
+	.uleb128 0x38
+	.4byte	.LASF1202
+	.byte	0x4
+	.2byte	0x63d
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x5d
+	.ascii	"ppa\000"
+	.byte	0x4
+	.2byte	0x63d
+	.4byte	0x74
+	.4byte	.LLST772
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x63e
+	.4byte	0x74
+	.4byte	.LLST773
+	.uleb128 0x5e
+	.4byte	.LASF1349
+	.byte	0x4
+	.2byte	0x63e
+	.4byte	0x74
+	.4byte	.LLST774
+	.uleb128 0x5e
+	.4byte	.LASF1115
+	.byte	0x4
+	.2byte	0x63e
+	.4byte	0x74
+	.4byte	.LLST775
+	.uleb128 0x5e
+	.4byte	.LASF1350
+	.byte	0x4
+	.2byte	0x63f
+	.4byte	0x74
+	.4byte	.LLST776
+	.uleb128 0x5e
+	.4byte	.LASF1351
+	.byte	0x4
+	.2byte	0x63f
+	.4byte	0x74
+	.4byte	.LLST777
+	.uleb128 0x5e
+	.4byte	.LASF1160
+	.byte	0x4
+	.2byte	0x640
+	.4byte	0x35d9
+	.4byte	.LLST778
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x93d5
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10483
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x688
+	.4byte	0x9196
+	.uleb128 0x38
+	.4byte	.LASF1352
+	.byte	0x4
+	.2byte	0x6b5
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x44
+	.4byte	.LVL3094
+	.4byte	0xb17b
+	.4byte	0x9135
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3096
+	.4byte	0x103ff
+	.4byte	0x9152
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC57
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3097
+	.4byte	0x103ff
+	.4byte	0x9179
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6c2
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3098
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3024
+	.4byte	0x78f1
+	.4byte	0x91bb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x77
+	.sleb128 256
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -100
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -108
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3035
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL3037
+	.4byte	0x103ff
+	.4byte	0x91eb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x66c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3038
+	.4byte	0x103ff
+	.4byte	0x920b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3039
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL3040
+	.4byte	0x5dee
+	.4byte	0x9228
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3043
+	.4byte	0x103ff
+	.4byte	0x924f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x68d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3044
+	.4byte	0x103ff
+	.4byte	0x926f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3052
+	.4byte	0x5383
+	.4byte	0x928d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3060
+	.4byte	0x52a5
+	.4byte	0x92a9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -108
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3066
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL3068
+	.4byte	0x7a04
+	.4byte	0x92d2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3069
+	.4byte	0x5c52
+	.4byte	0x92e6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3073
+	.4byte	0x530b
+	.4byte	0x92ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3087
+	.4byte	0x103ff
+	.4byte	0x9326
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6d7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3088
+	.4byte	0x103ff
+	.4byte	0x9346
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3095
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL3099
+	.4byte	0x530b
+	.4byte	0x9362
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3101
+	.4byte	0x9409
+	.4byte	0x9381
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3102
+	.4byte	0x103ff
+	.4byte	0x93a8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR242
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x6e6
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3103
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x93d5
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x9
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x93c5
+	.uleb128 0x5b
+	.4byte	.LASF1353
+	.byte	0x4
+	.2byte	0x630
+	.4byte	0x8f
+	.4byte	.LFB307
+	.4byte	.LFE307-.LFB307
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9409
+	.uleb128 0x45
+	.4byte	.LVL2313
+	.4byte	0x9409
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1354
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	.LFB306
+	.4byte	.LFE306-.LFB306
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9644
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x676
+	.4byte	.LLST625
+	.uleb128 0x5c
+	.4byte	.LASF1115
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x74
+	.4byte	.LLST626
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x74
+	.4byte	.LLST627
+	.uleb128 0x5c
+	.4byte	.LASF1160
+	.byte	0x4
+	.2byte	0x5fa
+	.4byte	0x35d9
+	.4byte	.LLST628
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x5fc
+	.4byte	0x74
+	.4byte	.LLST629
+	.uleb128 0x71
+	.ascii	"ppa\000"
+	.byte	0x4
+	.2byte	0x5fd
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1202
+	.byte	0x4
+	.2byte	0x5fd
+	.4byte	0x74
+	.4byte	.LLST630
+	.uleb128 0x5e
+	.4byte	.LASF1144
+	.byte	0x4
+	.2byte	0x5fe
+	.4byte	0x57
+	.4byte	.LLST631
+	.uleb128 0x5e
+	.4byte	.LASF72
+	.byte	0x4
+	.2byte	0x5ff
+	.4byte	0x57
+	.4byte	.LLST632
+	.uleb128 0x5e
+	.4byte	.LASF1118
+	.byte	0x4
+	.2byte	0x600
+	.4byte	0x5442
+	.4byte	.LLST633
+	.uleb128 0x5e
+	.4byte	.LASF1206
+	.byte	0x4
+	.2byte	0x601
+	.4byte	0x74
+	.4byte	.LLST634
+	.uleb128 0x64
+	.4byte	.LASF1121
+	.4byte	0x9654
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	__func__.10457
+	.uleb128 0x44
+	.4byte	.LVL2292
+	.4byte	0xae0d
+	.4byte	0x94fb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2293
+	.4byte	0x8958
+	.uleb128 0x44
+	.4byte	.LVL2295
+	.4byte	0x5dee
+	.4byte	0x9518
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2296
+	.4byte	0x54b4
+	.uleb128 0x44
+	.4byte	.LVL2297
+	.4byte	0x5c52
+	.4byte	0x9535
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2298
+	.4byte	0xae0d
+	.4byte	0x9554
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2299
+	.4byte	0x103ff
+	.4byte	0x957b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR220
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x61c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2300
+	.4byte	0x103ff
+	.4byte	0x959b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2301
+	.4byte	0x7a04
+	.4byte	0x95b4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2303
+	.4byte	0x8958
+	.4byte	0x95cf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x9
+	.byte	0xea
+	.byte	0x24
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x25
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2306
+	.4byte	0x103ff
+	.4byte	0x95ec
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC41
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2307
+	.4byte	0x5b4d
+	.4byte	0x9600
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2310
+	.4byte	0x103ff
+	.4byte	0x9627
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR220
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x62d
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2311
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x9654
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0xc
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x9644
+	.uleb128 0x67
+	.4byte	.LASF1356
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x8f
+	.4byte	.LFB305
+	.4byte	.LFE305-.LFB305
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9884
+	.uleb128 0x6d
+	.ascii	"LUN\000"
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x3a
+	.4byte	.LLST746
+	.uleb128 0x5c
+	.4byte	.LASF1095
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x74
+	.4byte	.LLST747
+	.uleb128 0x5c
+	.4byte	.LASF1247
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x74
+	.4byte	.LLST748
+	.uleb128 0x5c
+	.4byte	.LASF1248
+	.byte	0x4
+	.2byte	0x595
+	.4byte	0x8b6
+	.4byte	.LLST749
+	.uleb128 0x5d
+	.ascii	"ret\000"
+	.byte	0x4
+	.2byte	0x597
+	.4byte	0x8f
+	.4byte	.LLST750
+	.uleb128 0x5e
+	.4byte	.LASF1347
+	.byte	0x4
+	.2byte	0x598
+	.4byte	0x74
+	.4byte	.LLST751
+	.uleb128 0x5e
+	.4byte	.LASF1348
+	.byte	0x4
+	.2byte	0x598
+	.4byte	0x74
+	.4byte	.LLST752
+	.uleb128 0x5e
+	.4byte	.LASF1357
+	.byte	0x4
+	.2byte	0x598
+	.4byte	0x74
+	.4byte	.LLST753
+	.uleb128 0x5d
+	.ascii	"lpa\000"
+	.byte	0x4
+	.2byte	0x599
+	.4byte	0x74
+	.4byte	.LLST754
+	.uleb128 0x71
+	.ascii	"ppa\000"
+	.byte	0x4
+	.2byte	0x599
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5d
+	.ascii	"n\000"
+	.byte	0x4
+	.2byte	0x59b
+	.4byte	0x74
+	.4byte	.LLST755
+	.uleb128 0x5e
+	.4byte	.LASF1115
+	.byte	0x4
+	.2byte	0x59b
+	.4byte	0x74
+	.4byte	.LLST756
+	.uleb128 0x5e
+	.4byte	.LASF1349
+	.byte	0x4
+	.2byte	0x59b
+	.4byte	0x74
+	.4byte	.LLST757
+	.uleb128 0x5e
+	.4byte	.LASF1358
+	.byte	0x4
+	.2byte	0x59c
+	.4byte	0x74
+	.4byte	.LLST758
+	.uleb128 0x5e
+	.4byte	.LASF1359
+	.byte	0x4
+	.2byte	0x59c
+	.4byte	0x74
+	.4byte	.LLST759
+	.uleb128 0x5e
+	.4byte	.LASF1360
+	.byte	0x4
+	.2byte	0x59d
+	.4byte	0x74
+	.4byte	.LLST760
+	.uleb128 0x5e
+	.4byte	.LASF1361
+	.byte	0x4
+	.2byte	0x59e
+	.4byte	0x74
+	.4byte	.LLST761
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x670
+	.4byte	0x97e4
+	.uleb128 0x5e
+	.4byte	.LASF1181
+	.byte	0x4
+	.2byte	0x5e2
+	.4byte	0x74
+	.4byte	.LLST762
+	.uleb128 0x5e
+	.4byte	.LASF1108
+	.byte	0x4
+	.2byte	0x5e3
+	.4byte	0x57
+	.4byte	.LLST763
+	.uleb128 0x48
+	.4byte	.LVL2991
+	.4byte	0x8958
+	.uleb128 0x44
+	.4byte	.LVL2993
+	.4byte	0x5521
+	.4byte	0x97c6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2997
+	.4byte	0x98a8
+	.uleb128 0x45
+	.4byte	.LVL3017
+	.4byte	0x5383
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2964
+	.4byte	0x77b1
+	.4byte	0x9807
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x76
+	.sleb128 256
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2970
+	.4byte	0x93da
+	.uleb128 0x44
+	.4byte	.LVL2979
+	.4byte	0x5383
+	.4byte	0x982b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2981
+	.4byte	0x7a04
+	.4byte	0x984a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2987
+	.4byte	0xb17b
+	.4byte	0x9864
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2989
+	.4byte	0x52a5
+	.uleb128 0x45
+	.4byte	.LVL3003
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1362
+	.byte	0x4
+	.2byte	0x3f6
+	.4byte	0x8f
+	.4byte	.LFB304
+	.4byte	.LFE304-.LFB304
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x98a8
+	.uleb128 0x48
+	.4byte	.LVL2342
+	.4byte	0x98a8
+	.byte	0
+	.uleb128 0x5a
+	.4byte	.LASF1363
+	.byte	0x4
+	.2byte	0x3ea
+	.4byte	0x8f
+	.byte	0x1
+	.uleb128 0x54
+	.4byte	.LASF1364
+	.byte	0x4
+	.2byte	0x392
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x98ec
+	.uleb128 0x55
+	.4byte	.LASF1365
+	.byte	0x4
+	.2byte	0x392
+	.4byte	0x98ec
+	.uleb128 0x59
+	.4byte	.LASF1121
+	.4byte	0x9902
+	.4byte	.LASF1364
+	.uleb128 0x68
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x3c8
+	.4byte	0x74
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1e1
+	.uleb128 0x6
+	.4byte	0x1a2e
+	.4byte	0x9902
+	.uleb128 0xd
+	.4byte	0x2aa
+	.byte	0x7
+	.byte	0
+	.uleb128 0x4
+	.4byte	0x98f2
+	.uleb128 0x67
+	.4byte	.LASF1366
+	.byte	0x4
+	.2byte	0x2fe
+	.4byte	0x8f
+	.4byte	.LFB301
+	.4byte	.LFE301-.LFB301
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9a85
+	.uleb128 0x5e
+	.4byte	.LASF1235
+	.byte	0x4
+	.2byte	0x300
+	.4byte	0x57
+	.4byte	.LLST798
+	.uleb128 0x5e
+	.4byte	.LASF1367
+	.byte	0x4
+	.2byte	0x300
+	.4byte	0x57
+	.4byte	.LLST799
+	.uleb128 0x5e
+	.4byte	.LASF1368
+	.byte	0x4
+	.2byte	0x301
+	.4byte	0x57
+	.4byte	.LLST800
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x302
+	.4byte	0x57
+	.4byte	.LLST801
+	.uleb128 0x63
+	.4byte	.LASF1369
+	.byte	0x4
+	.2byte	0x365
+	.4byte	.L2888
+	.uleb128 0x63
+	.4byte	.LASF1370
+	.byte	0x4
+	.2byte	0x375
+	.4byte	.L2890
+	.uleb128 0x44
+	.4byte	.LVL3181
+	.4byte	0x530b
+	.4byte	0x998b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3182
+	.4byte	0x530b
+	.4byte	0x999f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3183
+	.4byte	0x87ee
+	.uleb128 0x48
+	.4byte	.LVL3184
+	.4byte	0x8a5f
+	.uleb128 0x48
+	.4byte	.LVL3185
+	.4byte	0x8a0f
+	.uleb128 0x48
+	.4byte	.LVL3201
+	.4byte	0x8c64
+	.uleb128 0x44
+	.4byte	.LVL3202
+	.4byte	0x530b
+	.4byte	0x99d6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3203
+	.4byte	0x530b
+	.4byte	0x99ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3204
+	.4byte	0x64a2
+	.4byte	0x99fe
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3208
+	.4byte	0x9a85
+	.4byte	0x9a17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3215
+	.4byte	0x9fb4
+	.uleb128 0x48
+	.4byte	.LVL3216
+	.4byte	0x87ee
+	.uleb128 0x44
+	.4byte	.LVL3219
+	.4byte	0x9a85
+	.4byte	0x9a42
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3222
+	.4byte	0x9a85
+	.4byte	0x9a55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3226
+	.4byte	0x64a2
+	.4byte	0x9a69
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3227
+	.4byte	0x858a
+	.uleb128 0x48
+	.4byte	.LVL3228
+	.4byte	0x75f4
+	.uleb128 0x48
+	.4byte	.LVL3229
+	.4byte	0x60a3
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1371
+	.byte	0x4
+	.2byte	0x28d
+	.4byte	0x8f
+	.4byte	.LFB300
+	.4byte	.LFE300-.LFB300
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9c4c
+	.uleb128 0x5c
+	.4byte	.LASF1235
+	.byte	0x4
+	.2byte	0x28d
+	.4byte	0x57
+	.4byte	.LLST528
+	.uleb128 0x5c
+	.4byte	.LASF1372
+	.byte	0x4
+	.2byte	0x28d
+	.4byte	0x3a
+	.4byte	.LLST529
+	.uleb128 0x5e
+	.4byte	.LASF1367
+	.byte	0x4
+	.2byte	0x28f
+	.4byte	0x57
+	.4byte	.LLST530
+	.uleb128 0x5e
+	.4byte	.LASF1135
+	.byte	0x4
+	.2byte	0x28f
+	.4byte	0x57
+	.4byte	.LLST531
+	.uleb128 0x5e
+	.4byte	.LASF1114
+	.byte	0x4
+	.2byte	0x290
+	.4byte	0x57
+	.4byte	.LLST532
+	.uleb128 0x5e
+	.4byte	.LASF664
+	.byte	0x4
+	.2byte	0x290
+	.4byte	0x57
+	.4byte	.LLST533
+	.uleb128 0x5e
+	.4byte	.LASF1373
+	.byte	0x4
+	.2byte	0x291
+	.4byte	0x57
+	.4byte	.LLST534
+	.uleb128 0x5e
+	.4byte	.LASF1374
+	.byte	0x4
+	.2byte	0x292
+	.4byte	0x57
+	.4byte	.LLST535
+	.uleb128 0x5e
+	.4byte	.LASF1375
+	.byte	0x4
+	.2byte	0x293
+	.4byte	0x57
+	.4byte	.LLST536
+	.uleb128 0x5e
+	.4byte	.LASF1376
+	.byte	0x4
+	.2byte	0x294
+	.4byte	0x57
+	.4byte	.LLST537
+	.uleb128 0x5e
+	.4byte	.LASF1377
+	.byte	0x4
+	.2byte	0x295
+	.4byte	0x3a
+	.4byte	.LLST538
+	.uleb128 0x63
+	.4byte	.LASF1378
+	.byte	0x4
+	.2byte	0x2cd
+	.4byte	.L1632
+	.uleb128 0x44
+	.4byte	.LVL1823
+	.4byte	0xac82
+	.4byte	0x9b75
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1830
+	.4byte	0xae0d
+	.4byte	0x9b94
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1837
+	.4byte	0xac82
+	.4byte	0x9bae
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1839
+	.4byte	0x89c8
+	.4byte	0x9bc4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1841
+	.4byte	0x9c4c
+	.4byte	0x9bd8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1842
+	.4byte	0x8d5f
+	.4byte	0x9bec
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1853
+	.4byte	0x8dc2
+	.uleb128 0x44
+	.4byte	.LVL1858
+	.4byte	0x89c8
+	.4byte	0x9c0b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1860
+	.4byte	0x9c4c
+	.4byte	0x9c1f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1861
+	.4byte	0x8d5f
+	.4byte	0x9c33
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1869
+	.4byte	0x8dc2
+	.uleb128 0x45
+	.4byte	.LVL1872
+	.4byte	0x8737
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1379
+	.byte	0x4
+	.2byte	0x27f
+	.4byte	0x8f
+	.byte	0x1
+	.4byte	0x9c76
+	.uleb128 0x55
+	.4byte	.LASF664
+	.byte	0x4
+	.2byte	0x27f
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1380
+	.byte	0x4
+	.2byte	0x281
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1381
+	.byte	0x4
+	.2byte	0x265
+	.4byte	0x8f
+	.4byte	.LFB298
+	.4byte	.LFE298-.LFB298
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9d26
+	.uleb128 0x44
+	.4byte	.LVL859
+	.4byte	0x530b
+	.4byte	0x9ca4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL860
+	.4byte	0x530b
+	.4byte	0x9cb8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL861
+	.4byte	0x530b
+	.4byte	0x9ccc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL862
+	.4byte	0x530b
+	.4byte	0x9cef
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL863
+	.4byte	0x530b
+	.4byte	0x9d13
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR135
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x200
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL864
+	.4byte	0x5b2a
+	.uleb128 0x48
+	.4byte	.LVL865
+	.4byte	0x6e4b
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1382
+	.byte	0x4
+	.2byte	0x162
+	.4byte	0x8f
+	.4byte	.LFB297
+	.4byte	.LFE297-.LFB297
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9f4a
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x4
+	.2byte	0x164
+	.4byte	0x74
+	.4byte	.LLST429
+	.uleb128 0x5e
+	.4byte	.LASF1383
+	.byte	0x4
+	.2byte	0x165
+	.4byte	0x74
+	.4byte	.LLST430
+	.uleb128 0x48
+	.4byte	.LVL1320
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1321
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1323
+	.4byte	0x5194
+	.4byte	0x9d84
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1324
+	.4byte	0x5194
+	.4byte	0x9d98
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1325
+	.4byte	0x5194
+	.4byte	0x9dac
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1326
+	.4byte	0x5194
+	.4byte	0x9dc0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1327
+	.4byte	0x5194
+	.4byte	0x9dd4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1329
+	.4byte	0x5194
+	.4byte	0x9de8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1330
+	.4byte	0x5194
+	.4byte	0x9dfc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1331
+	.4byte	0x5194
+	.4byte	0x9e10
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1332
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1333
+	.4byte	0x5194
+	.4byte	0x9e2d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1334
+	.4byte	0x5194
+	.4byte	0x9e41
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1335
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1338
+	.4byte	0x5194
+	.4byte	0x9e5e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1340
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1341
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1342
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1343
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1346
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1349
+	.4byte	0x5194
+	.4byte	0x9e9f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1350
+	.4byte	0x5194
+	.4byte	0x9eb3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1352
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1353
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1354
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1355
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1356
+	.4byte	0x5194
+	.uleb128 0x44
+	.4byte	.LVL1357
+	.4byte	0x530b
+	.4byte	0x9ef4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1359
+	.4byte	0x5194
+	.4byte	0x9f08
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1360
+	.4byte	0x5194
+	.4byte	0x9f1c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1364
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1367
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1370
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1373
+	.4byte	0x5194
+	.uleb128 0x48
+	.4byte	.LVL1377
+	.4byte	0x5194
+	.byte	0
+	.uleb128 0x7b
+	.4byte	.LASF1384
+	.byte	0x4
+	.byte	0xc7
+	.4byte	0x8f
+	.4byte	.LFB296
+	.4byte	.LFE296-.LFB296
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9fb4
+	.uleb128 0x40
+	.4byte	.LASF1365
+	.byte	0x4
+	.byte	0xc7
+	.4byte	0x98ec
+	.4byte	.LLST162
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0xc9
+	.4byte	0x74
+	.4byte	.LLST163
+	.uleb128 0x41
+	.ascii	"j\000"
+	.byte	0x4
+	.byte	0xc9
+	.4byte	0x74
+	.4byte	.LLST164
+	.uleb128 0x48
+	.4byte	.LVL394
+	.4byte	0xa000
+	.uleb128 0x44
+	.4byte	.LVL395
+	.4byte	0xa000
+	.4byte	0x9faa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL399
+	.4byte	0x9fb4
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1385
+	.byte	0x4
+	.byte	0xb5
+	.4byte	0x8f
+	.4byte	.LFB295
+	.4byte	.LFE295-.LFB295
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x9fdd
+	.uleb128 0x40
+	.4byte	.LASF1386
+	.byte	0x4
+	.byte	0xb5
+	.4byte	0x57
+	.4byte	.LLST161
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1387
+	.byte	0x4
+	.byte	0xaf
+	.4byte	.LFB294
+	.4byte	.LFE294-.LFB294
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa000
+	.uleb128 0x52
+	.4byte	.LASF1388
+	.byte	0x4
+	.byte	0xaf
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1389
+	.byte	0x4
+	.byte	0x8f
+	.4byte	0x57
+	.4byte	.LFB293
+	.4byte	.LFE293-.LFB293
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa045
+	.uleb128 0x3f
+	.ascii	"num\000"
+	.byte	0x4
+	.byte	0x8f
+	.4byte	0x74
+	.4byte	.LLST158
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x4
+	.byte	0x91
+	.4byte	0x57
+	.4byte	.LLST159
+	.uleb128 0x61
+	.4byte	.LASF1390
+	.byte	0x4
+	.byte	0x92
+	.4byte	0x74
+	.4byte	.LLST160
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1391
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x74
+	.4byte	.LFB292
+	.4byte	.LFE292-.LFB292
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa335
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x3a
+	.4byte	.LLST319
+	.uleb128 0x6d
+	.ascii	"dir\000"
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x3a
+	.4byte	.LLST320
+	.uleb128 0x5c
+	.4byte	.LASF1393
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x3a
+	.4byte	.LLST321
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x8b6
+	.4byte	.LLST322
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x3
+	.2byte	0x319
+	.4byte	0x8b6
+	.4byte	.LLST323
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x3
+	.2byte	0x31b
+	.4byte	0x74
+	.4byte	.LLST324
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x31c
+	.4byte	0x74
+	.4byte	.LLST325
+	.uleb128 0x38
+	.4byte	.LASF271
+	.byte	0x3
+	.2byte	0x31d
+	.4byte	0x73e
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -96
+	.uleb128 0x38
+	.4byte	.LASF1394
+	.byte	0x3
+	.2byte	0x31e
+	.4byte	0x139d
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -100
+	.uleb128 0x5e
+	.4byte	.LASF1395
+	.byte	0x3
+	.2byte	0x31f
+	.4byte	0x74
+	.4byte	.LLST326
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x320
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x220
+	.4byte	0xa145
+	.uleb128 0x5e
+	.4byte	.LASF1396
+	.byte	0x3
+	.2byte	0x331
+	.4byte	0x74
+	.4byte	.LLST327
+	.uleb128 0x5e
+	.4byte	.LASF1397
+	.byte	0x3
+	.2byte	0x332
+	.4byte	0x74
+	.4byte	.LLST328
+	.uleb128 0x5e
+	.4byte	.LASF1398
+	.byte	0x3
+	.2byte	0x333
+	.4byte	0x8b6
+	.4byte	.LLST329
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x238
+	.4byte	0xa15f
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x345
+	.4byte	0x74
+	.4byte	.LLST330
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB306
+	.4byte	.LBE306-.LBB306
+	.4byte	0xa179
+	.uleb128 0x57
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x372
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB302
+	.4byte	.LBE302-.LBB302
+	.4byte	0xa197
+	.uleb128 0x5e
+	.4byte	.LASF1399
+	.byte	0x3
+	.2byte	0x387
+	.4byte	0xd6d
+	.4byte	.LLST331
+	.byte	0
+	.uleb128 0x7f
+	.4byte	0xa1a9
+	.uleb128 0x56
+	.4byte	.LASF1400
+	.byte	0x3
+	.2byte	0x395
+	.4byte	0x116f
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL949
+	.4byte	0x530b
+	.4byte	0xa1c9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL950
+	.4byte	0xa514
+	.4byte	0xa1ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -116
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL951
+	.4byte	0xa45d
+	.4byte	0xa213
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL983
+	.4byte	0xa335
+	.4byte	0xa239
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL985
+	.4byte	0xa514
+	.4byte	0xa269
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL986
+	.4byte	0xa45d
+	.4byte	0xa27d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL990
+	.4byte	0xa514
+	.4byte	0xa2aa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL993
+	.4byte	0xa45d
+	.4byte	0xa2be
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL994
+	.4byte	0xa514
+	.4byte	0xa2f0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 0
+	.byte	0x33
+	.byte	0x1a
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 4
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL997
+	.4byte	0xa335
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x33
+	.byte	0x1a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1a
+	.byte	0x30
+	.byte	0x7b
+	.sleb128 -1024
+	.byte	0x91
+	.sleb128 -112
+	.byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x77
+	.sleb128 0
+	.byte	0x30
+	.byte	0x29
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -112
+	.byte	0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1401
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	.LFB291
+	.4byte	.LFE291-.LFB291
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa45d
+	.uleb128 0x5c
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x180a
+	.4byte	.LLST311
+	.uleb128 0x6d
+	.ascii	"dir\000"
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x3a
+	.4byte	.LLST312
+	.uleb128 0x5c
+	.4byte	.LASF1402
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x3a
+	.4byte	.LLST313
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x8b6
+	.4byte	.LLST314
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x3
+	.2byte	0x2eb
+	.4byte	0x8b6
+	.4byte	.LLST315
+	.uleb128 0x5e
+	.4byte	.LASF1403
+	.byte	0x3
+	.2byte	0x2ed
+	.4byte	0x13e
+	.4byte	.LLST316
+	.uleb128 0x38
+	.4byte	.LASF1404
+	.byte	0x3
+	.2byte	0x2ee
+	.4byte	0x13e
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x2ef
+	.4byte	0x74
+	.4byte	.LLST317
+	.uleb128 0x5e
+	.4byte	.LASF1290
+	.byte	0x3
+	.2byte	0x2f0
+	.4byte	0x8b6
+	.4byte	.LLST318
+	.uleb128 0x44
+	.4byte	.LVL923
+	.4byte	0x5255
+	.4byte	0xa3f9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL928
+	.4byte	0x52a5
+	.4byte	0xa415
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL932
+	.4byte	0x5255
+	.4byte	0xa435
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL939
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1405
+	.byte	0x3
+	.2byte	0x27b
+	.4byte	.LFB290
+	.4byte	.LFE290-.LFB290
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa508
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x27b
+	.4byte	0x3a
+	.4byte	.LLST156
+	.uleb128 0x38
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x27d
+	.4byte	0xfd3
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -16
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x27e
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x38
+	.4byte	.LASF1407
+	.byte	0x3
+	.2byte	0x280
+	.4byte	0xa508
+	.uleb128 0x3
+	.byte	0x71
+	.sleb128 16
+	.byte	0x9f
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x178
+	.uleb128 0x5e
+	.4byte	.LASF1408
+	.byte	0x3
+	.2byte	0x28a
+	.4byte	0xa50e
+	.4byte	.LLST157
+	.uleb128 0x6f
+	.4byte	.LBB238
+	.4byte	.LBE238-.LBB238
+	.4byte	0xa4e2
+	.uleb128 0x38
+	.4byte	.LASF1399
+	.byte	0x3
+	.2byte	0x296
+	.4byte	0xd78
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -12
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL367
+	.4byte	0xa672
+	.4byte	0xa4f6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL368
+	.4byte	0xa63e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x14ea
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x1552
+	.uleb128 0x69
+	.4byte	.LASF1409
+	.byte	0x3
+	.2byte	0x208
+	.4byte	.LFB289
+	.4byte	.LFE289-.LFB289
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa63e
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST142
+	.uleb128 0x6d
+	.ascii	"dir\000"
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST143
+	.uleb128 0x5c
+	.4byte	.LASF1393
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST144
+	.uleb128 0x5c
+	.4byte	.LASF1402
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x3a
+	.4byte	.LLST145
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x8b6
+	.4byte	.LLST146
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x3
+	.2byte	0x208
+	.4byte	0x8b6
+	.4byte	.LLST147
+	.uleb128 0x5e
+	.4byte	.LASF1400
+	.byte	0x3
+	.2byte	0x20a
+	.4byte	0x116f
+	.4byte	.LLST148
+	.uleb128 0x5e
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x20b
+	.4byte	0xfc8
+	.4byte	.LLST149
+	.uleb128 0x5e
+	.4byte	.LASF1410
+	.byte	0x3
+	.2byte	0x20c
+	.4byte	0x3a
+	.4byte	.LLST150
+	.uleb128 0x5e
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x20d
+	.4byte	0x180a
+	.4byte	.LLST151
+	.uleb128 0x5e
+	.4byte	.LASF1411
+	.byte	0x3
+	.2byte	0x20e
+	.4byte	0x19b3
+	.4byte	.LLST152
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x160
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x227
+	.4byte	0x74
+	.4byte	.LLST153
+	.uleb128 0x38
+	.4byte	.LASF1407
+	.byte	0x3
+	.2byte	0x228
+	.4byte	0x14ea
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1412
+	.byte	0x3
+	.2byte	0x229
+	.4byte	0x293a
+	.4byte	.LLST154
+	.uleb128 0x6f
+	.4byte	.LBB235
+	.4byte	.LBE235-.LBB235
+	.4byte	0xa62a
+	.uleb128 0x5e
+	.4byte	.LASF1396
+	.byte	0x3
+	.2byte	0x232
+	.4byte	0x74
+	.4byte	.LLST155
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL347
+	.4byte	0x10462
+	.uleb128 0x48
+	.4byte	.LVL350
+	.4byte	0x10462
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1413
+	.byte	0x3
+	.2byte	0x200
+	.4byte	.LFB288
+	.4byte	.LFE288-.LFB288
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa672
+	.uleb128 0x70
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x200
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x38
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x202
+	.4byte	0xfd3
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1414
+	.byte	0x3
+	.2byte	0x1e9
+	.4byte	.LFB287
+	.4byte	.LFE287-.LFB287
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa6b6
+	.uleb128 0x70
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1e9
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5e
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x1eb
+	.4byte	0xfc8
+	.4byte	.LLST141
+	.uleb128 0x38
+	.4byte	.LASF1407
+	.byte	0x3
+	.2byte	0x1ec
+	.4byte	0x14ea
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -4
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1415
+	.byte	0x3
+	.2byte	0x1e1
+	.byte	0x1
+	.4byte	0xa6d0
+	.uleb128 0x55
+	.4byte	.LASF1416
+	.byte	0x3
+	.2byte	0x1e1
+	.4byte	0x1aea
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1417
+	.byte	0x3
+	.2byte	0x1cf
+	.byte	0x1
+	.4byte	0xa6ea
+	.uleb128 0x55
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1cf
+	.4byte	0x180a
+	.byte	0
+	.uleb128 0x80
+	.4byte	.LASF1421
+	.byte	0x3
+	.2byte	0x1c9
+	.4byte	0xa710
+	.uleb128 0x55
+	.4byte	.LASF1416
+	.byte	0x3
+	.2byte	0x1c9
+	.4byte	0x1aea
+	.uleb128 0x56
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1cb
+	.4byte	0x180a
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1418
+	.byte	0x3
+	.2byte	0x1c3
+	.4byte	0x74
+	.4byte	.LFB283
+	.4byte	.LFE283-.LFB283
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa74b
+	.uleb128 0x5c
+	.4byte	.LASF1416
+	.byte	0x3
+	.2byte	0x1c3
+	.4byte	0x1aea
+	.4byte	.LLST139
+	.uleb128 0x5e
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1c5
+	.4byte	0x180a
+	.4byte	.LLST140
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1419
+	.byte	0x3
+	.2byte	0x1bb
+	.byte	0x1
+	.4byte	0xa771
+	.uleb128 0x55
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1bb
+	.4byte	0x180a
+	.uleb128 0x55
+	.4byte	.LASF1420
+	.byte	0x3
+	.2byte	0x1bb
+	.4byte	0xbc2
+	.byte	0
+	.uleb128 0x80
+	.4byte	.LASF1422
+	.byte	0x3
+	.2byte	0x1b3
+	.4byte	0xa797
+	.uleb128 0x55
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x1b3
+	.4byte	0x180a
+	.uleb128 0x55
+	.4byte	.LASF1420
+	.byte	0x3
+	.2byte	0x1b3
+	.4byte	0xbc2
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1423
+	.byte	0x3
+	.2byte	0x18f
+	.4byte	.LFB280
+	.4byte	.LFE280-.LFB280
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa7dc
+	.uleb128 0x70
+	.4byte	.LASF1424
+	.byte	0x3
+	.2byte	0x18f
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5d
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x191
+	.4byte	0x116f
+	.4byte	.LLST137
+	.uleb128 0x5e
+	.4byte	.LASF1406
+	.byte	0x3
+	.2byte	0x192
+	.4byte	0xfc8
+	.4byte	.LLST138
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1425
+	.byte	0x3
+	.2byte	0x15c
+	.byte	0x1
+	.4byte	0xa801
+	.uleb128 0x66
+	.ascii	"ns\000"
+	.byte	0x3
+	.2byte	0x15c
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF1426
+	.byte	0x3
+	.2byte	0x15e
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1427
+	.byte	0x3
+	.2byte	0x152
+	.byte	0x1
+	.4byte	0xa835
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x152
+	.4byte	0x3a
+	.uleb128 0x55
+	.4byte	.LASF1428
+	.byte	0x3
+	.2byte	0x152
+	.4byte	0x74
+	.uleb128 0x68
+	.uleb128 0x56
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x156
+	.4byte	0x180a
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1429
+	.byte	0x3
+	.2byte	0x136
+	.4byte	0x74
+	.4byte	.LFB277
+	.4byte	.LFE277-.LFB277
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa8c4
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x136
+	.4byte	0x3a
+	.4byte	.LLST101
+	.uleb128 0x71
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x138
+	.4byte	0xd78
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -20
+	.uleb128 0x81
+	.4byte	.LASF15
+	.byte	0x3
+	.2byte	0x139
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x3
+	.2byte	0x13a
+	.4byte	0x74
+	.4byte	.LLST102
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x13b
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x82
+	.4byte	0xa8c4
+	.4byte	.LBB211
+	.4byte	.LBE211-.LBB211
+	.byte	0x3
+	.2byte	0x141
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST103
+	.uleb128 0x45
+	.4byte	.LVL197
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x64
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1430
+	.byte	0x3
+	.2byte	0x130
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0xa8e2
+	.uleb128 0x55
+	.4byte	.LASF602
+	.byte	0x3
+	.2byte	0x130
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1431
+	.byte	0x3
+	.2byte	0x121
+	.4byte	.LFB275
+	.4byte	.LFE275-.LFB275
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa925
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x121
+	.4byte	0x3a
+	.4byte	.LLST85
+	.uleb128 0x71
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x123
+	.4byte	0xd6d
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x124
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1432
+	.byte	0x3
+	.2byte	0x112
+	.4byte	.LFB274
+	.4byte	.LFE274-.LFB274
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa968
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x3
+	.2byte	0x112
+	.4byte	0x3a
+	.4byte	.LLST84
+	.uleb128 0x71
+	.ascii	"tmp\000"
+	.byte	0x3
+	.2byte	0x114
+	.4byte	0xd6d
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x38
+	.4byte	.LASF20
+	.byte	0x3
+	.2byte	0x115
+	.4byte	0x180a
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1433
+	.byte	0x3
+	.byte	0xa9
+	.4byte	0x8f
+	.4byte	.LFB273
+	.4byte	.LFE273-.LFB273
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa9ad
+	.uleb128 0x40
+	.4byte	.LASF923
+	.byte	0x3
+	.byte	0xa9
+	.4byte	0x3a
+	.4byte	.LLST82
+	.uleb128 0x83
+	.4byte	.LASF1434
+	.byte	0x3
+	.byte	0xac
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x41
+	.ascii	"tmp\000"
+	.byte	0x3
+	.byte	0xad
+	.4byte	0xd6d
+	.4byte	.LLST83
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1435
+	.byte	0x3
+	.byte	0x93
+	.4byte	.LFB272
+	.4byte	.LFE272-.LFB272
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xa9df
+	.uleb128 0x52
+	.4byte	.LASF1436
+	.byte	0x3
+	.byte	0x93
+	.4byte	0x8f
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x41
+	.ascii	"tmp\000"
+	.byte	0x3
+	.byte	0x95
+	.4byte	0xd6d
+	.4byte	.LLST81
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1437
+	.byte	0x3
+	.byte	0x8e
+	.4byte	.LFB271
+	.4byte	.LFE271-.LFB271
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xaa04
+	.uleb128 0x3f
+	.ascii	"div\000"
+	.byte	0x3
+	.byte	0x8e
+	.4byte	0x3a
+	.4byte	.LLST80
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1438
+	.byte	0x3
+	.byte	0x82
+	.4byte	.LFB270
+	.4byte	.LFE270-.LFB270
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xaa29
+	.uleb128 0x40
+	.4byte	.LASF1439
+	.byte	0x3
+	.byte	0x82
+	.4byte	0x3a
+	.4byte	.LLST79
+	.byte	0
+	.uleb128 0x50
+	.4byte	.LASF1440
+	.byte	0x3
+	.byte	0x77
+	.4byte	0x15bc
+	.byte	0x1
+	.4byte	0xaa5b
+	.uleb128 0x51
+	.4byte	.LASF1392
+	.byte	0x3
+	.byte	0x77
+	.4byte	0x3a
+	.uleb128 0x7c
+	.ascii	"tmp\000"
+	.byte	0x3
+	.byte	0x79
+	.4byte	0x15bc
+	.uleb128 0x7d
+	.4byte	.LASF20
+	.byte	0x3
+	.byte	0x7a
+	.4byte	0x180a
+	.byte	0
+	.uleb128 0x76
+	.4byte	.LASF1441
+	.byte	0x3
+	.byte	0x6e
+	.byte	0x1
+	.4byte	0xaa73
+	.uleb128 0x84
+	.ascii	"en\000"
+	.byte	0x3
+	.byte	0x6e
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x3e
+	.4byte	.LASF1442
+	.byte	0x3
+	.byte	0xf
+	.4byte	.LFB267
+	.4byte	.LFE267-.LFB267
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xab08
+	.uleb128 0x40
+	.4byte	.LASF1443
+	.byte	0x3
+	.byte	0xf
+	.4byte	0x13e
+	.4byte	.LLST424
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x3
+	.byte	0x11
+	.4byte	0x74
+	.4byte	.LLST425
+	.uleb128 0x61
+	.4byte	.LASF1444
+	.byte	0x3
+	.byte	0x12
+	.4byte	0xd6d
+	.4byte	.LLST426
+	.uleb128 0x85
+	.4byte	0xa7dc
+	.4byte	.LBB343
+	.4byte	.Ldebug_ranges0+0x318
+	.byte	0x3
+	.byte	0x48
+	.4byte	0xaaf6
+	.uleb128 0x4f
+	.4byte	0xa7e9
+	.4byte	.LLST427
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x318
+	.uleb128 0x74
+	.4byte	0xe852
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x318
+	.uleb128 0x4f
+	.4byte	0xa7e9
+	.4byte	.LLST427
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x318
+	.uleb128 0x74
+	.4byte	0xe852
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1319
+	.4byte	0x5194
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x9000
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1445
+	.byte	0x2
+	.2byte	0xd0e
+	.4byte	.LFB266
+	.4byte	.LFE266-.LFB266
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xab78
+	.uleb128 0x6d
+	.ascii	"buf\000"
+	.byte	0x2
+	.2byte	0xd0e
+	.4byte	0x1aea
+	.4byte	.LLST284
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xd10
+	.4byte	0x3a
+	.4byte	.LLST285
+	.uleb128 0x5e
+	.4byte	.LASF1446
+	.byte	0x2
+	.2byte	0xd11
+	.4byte	0x7cb
+	.4byte	.LLST286
+	.uleb128 0x86
+	.4byte	0x8eb5
+	.4byte	.LBB297
+	.4byte	.LBE297-.LBB297
+	.byte	0x2
+	.2byte	0xd17
+	.uleb128 0x45
+	.4byte	.LVL811
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x3b
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1447
+	.byte	0x2
+	.2byte	0xcf7
+	.4byte	0x84
+	.4byte	.LFB265
+	.4byte	.LFE265-.LFB265
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xac06
+	.uleb128 0x5c
+	.4byte	.LASF1448
+	.byte	0x2
+	.2byte	0xcf7
+	.4byte	0x293a
+	.4byte	.LLST790
+	.uleb128 0x6d
+	.ascii	"die\000"
+	.byte	0x2
+	.2byte	0xcf7
+	.4byte	0x74
+	.4byte	.LLST791
+	.uleb128 0x5e
+	.4byte	.LASF1449
+	.byte	0x2
+	.2byte	0xcf9
+	.4byte	0x57
+	.4byte	.LLST792
+	.uleb128 0x71
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0xcfa
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF1450
+	.byte	0x2
+	.2byte	0xcfb
+	.4byte	0x57
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xcfc
+	.4byte	0x84
+	.4byte	.LLST793
+	.uleb128 0x45
+	.4byte	.LVL3135
+	.4byte	0xac06
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x74
+	.sleb128 7
+	.byte	0x33
+	.byte	0x26
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1451
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x84
+	.byte	0x1
+	.4byte	0xac82
+	.uleb128 0x55
+	.4byte	.LASF1452
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x8b6
+	.uleb128 0x66
+	.ascii	"die\000"
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x74
+	.uleb128 0x66
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0xcd7
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xcd9
+	.4byte	0x84
+	.uleb128 0x56
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xcda
+	.4byte	0x74
+	.uleb128 0x57
+	.ascii	"blk\000"
+	.byte	0x2
+	.2byte	0xcdb
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xcdb
+	.4byte	0x57
+	.uleb128 0x56
+	.4byte	.LASF1178
+	.byte	0x2
+	.2byte	0xcdc
+	.4byte	0xc5
+	.uleb128 0x56
+	.4byte	.LASF1450
+	.byte	0x2
+	.2byte	0xcdd
+	.4byte	0x57
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1453
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x84
+	.4byte	.LFB263
+	.4byte	.LFE263-.LFB263
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xae0d
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x1aea
+	.4byte	.LLST122
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x74
+	.4byte	.LLST123
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xc96
+	.4byte	0x74
+	.4byte	.LLST124
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xc98
+	.4byte	0x74
+	.4byte	.LLST125
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xc99
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xc9a
+	.4byte	0x676
+	.4byte	.LLST122
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xc9b
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xc9c
+	.4byte	0x74
+	.4byte	.LLST127
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xc9d
+	.4byte	0x3a
+	.4byte	.LLST128
+	.uleb128 0x44
+	.4byte	.LVL259
+	.4byte	0xb575
+	.4byte	0xad3c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL261
+	.4byte	0xbdec
+	.4byte	0xad6c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL266
+	.4byte	0xbc12
+	.uleb128 0x44
+	.4byte	.LVL268
+	.4byte	0xa925
+	.4byte	0xad89
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL269
+	.4byte	0xe19b
+	.4byte	0xad9d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL271
+	.4byte	0xbcab
+	.4byte	0xadb1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL272
+	.4byte	0xe067
+	.4byte	0xadcb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL273
+	.4byte	0xa8e2
+	.4byte	0xaddf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL274
+	.4byte	0xe175
+	.uleb128 0x44
+	.4byte	.LVL276
+	.4byte	0xbc12
+	.4byte	0xadfc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL277
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1456
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x84
+	.4byte	.LFB262
+	.4byte	.LFE262-.LFB262
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xb17b
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x1aea
+	.4byte	.LLST516
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x74
+	.4byte	.LLST517
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x74
+	.4byte	.LLST518
+	.uleb128 0x5c
+	.4byte	.LASF1457
+	.byte	0x2
+	.2byte	0xc23
+	.4byte	0x74
+	.4byte	.LLST519
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xc25
+	.4byte	0x74
+	.4byte	.LLST520
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xc26
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xc27
+	.4byte	0x676
+	.4byte	.LLST521
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xc28
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xc29
+	.4byte	0x74
+	.4byte	.LLST522
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xc2a
+	.4byte	0x3a
+	.4byte	.LLST523
+	.uleb128 0x5e
+	.4byte	.LASF65
+	.byte	0x2
+	.2byte	0xc2b
+	.4byte	0x74
+	.4byte	.LLST524
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xc2c
+	.4byte	0x74
+	.4byte	.LLST525
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x4a8
+	.4byte	0xafaa
+	.uleb128 0x38
+	.4byte	.LASF1458
+	.byte	0x2
+	.2byte	0xc74
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x44
+	.4byte	.LVL1797
+	.4byte	0x103ff
+	.4byte	0xaf15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC27
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1799
+	.4byte	0xbdec
+	.4byte	0xaf49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -96
+	.byte	0x6
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1800
+	.4byte	0xb17b
+	.4byte	0xaf68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 -32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1801
+	.4byte	0x103ff
+	.4byte	0xaf7f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC28
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1802
+	.4byte	0x103ff
+	.4byte	0xaf96
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC29
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1803
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC30
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1766
+	.4byte	0xb70a
+	.uleb128 0x44
+	.4byte	.LVL1768
+	.4byte	0xbdec
+	.4byte	0xafe7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -96
+	.byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1773
+	.4byte	0xbc12
+	.uleb128 0x44
+	.4byte	.LVL1775
+	.4byte	0xa835
+	.4byte	0xb004
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1776
+	.4byte	0xc7c8
+	.4byte	0xb026
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1777
+	.4byte	0xa925
+	.4byte	0xb03a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1778
+	.4byte	0xe19b
+	.4byte	0xb04e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1779
+	.4byte	0xe0ed
+	.4byte	0xb068
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1780
+	.4byte	0xa045
+	.4byte	0xb08a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1781
+	.4byte	0xdefd
+	.4byte	0xb09e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1782
+	.4byte	0xbcab
+	.4byte	0xb0b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1783
+	.4byte	0xdfdf
+	.4byte	0xb0cc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1784
+	.4byte	0xa045
+	.4byte	0xb0ee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1785
+	.4byte	0xdf6d
+	.4byte	0xb108
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1787
+	.4byte	0xa8e2
+	.4byte	0xb11c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1788
+	.4byte	0xa925
+	.uleb128 0x44
+	.4byte	.LVL1789
+	.4byte	0xbcab
+	.4byte	0xb139
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1790
+	.4byte	0xa8e2
+	.4byte	0xb14d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1791
+	.4byte	0xe175
+	.uleb128 0x44
+	.4byte	.LVL1793
+	.4byte	0xbc12
+	.4byte	0xb16a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1794
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1459
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x84
+	.4byte	.LFB261
+	.4byte	.LFE261-.LFB261
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xb575
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x1aea
+	.4byte	.LLST493
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x74
+	.4byte	.LLST494
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xb7c
+	.4byte	0x74
+	.4byte	.LLST495
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xb7e
+	.4byte	0x74
+	.4byte	.LLST496
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xb7f
+	.4byte	0x676
+	.4byte	.LLST493
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xb80
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xb81
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x56
+	.4byte	.LASF1460
+	.byte	0x2
+	.2byte	0xb81
+	.4byte	0x74
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xb82
+	.4byte	0x74
+	.4byte	.LLST498
+	.uleb128 0x81
+	.4byte	.LASF1461
+	.byte	0x2
+	.2byte	0xb82
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x38
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xb83
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x5e
+	.4byte	.LASF1462
+	.byte	0x2
+	.2byte	0xb83
+	.4byte	0x3a
+	.4byte	.LLST499
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xb84
+	.4byte	0x74
+	.4byte	.LLST500
+	.uleb128 0x5e
+	.4byte	.LASF1463
+	.byte	0x2
+	.2byte	0xb85
+	.4byte	0x3a
+	.4byte	.LLST501
+	.uleb128 0x5e
+	.4byte	.LASF1464
+	.byte	0x2
+	.2byte	0xb86
+	.4byte	0x74
+	.4byte	.LLST502
+	.uleb128 0x5e
+	.4byte	.LASF1465
+	.byte	0x2
+	.2byte	0xb87
+	.4byte	0x74
+	.4byte	.LLST503
+	.uleb128 0x5e
+	.4byte	.LASF1466
+	.byte	0x2
+	.2byte	0xb88
+	.4byte	0x74
+	.4byte	.LLST504
+	.uleb128 0x5e
+	.4byte	.LASF72
+	.byte	0x2
+	.2byte	0xb89
+	.4byte	0x74
+	.4byte	.LLST505
+	.uleb128 0x58
+	.4byte	.LASF1467
+	.byte	0x2
+	.2byte	0xbac
+	.uleb128 0x6f
+	.4byte	.LBB411
+	.4byte	.LBE411-.LBB411
+	.4byte	0xb2e8
+	.uleb128 0x5e
+	.4byte	.LASF79
+	.byte	0x2
+	.2byte	0xb9f
+	.4byte	0x3a
+	.4byte	.LLST506
+	.uleb128 0x45
+	.4byte	.LVL1668
+	.4byte	0xc7c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x470
+	.4byte	0xb332
+	.uleb128 0x5e
+	.4byte	.LASF1468
+	.byte	0x2
+	.2byte	0xbd0
+	.4byte	0x74
+	.4byte	.LLST507
+	.uleb128 0x44
+	.4byte	.LVL1696
+	.4byte	0xd687
+	.4byte	0xb31b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1699
+	.4byte	0xaa04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x24
+	.byte	0x9
+	.byte	0xfc
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1651
+	.4byte	0xba02
+	.uleb128 0x44
+	.4byte	.LVL1657
+	.4byte	0xbdec
+	.4byte	0xb36e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x7
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -64
+	.byte	0x6
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1665
+	.4byte	0xa835
+	.4byte	0xb382
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1669
+	.4byte	0xa925
+	.4byte	0xb396
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1670
+	.4byte	0xe19b
+	.4byte	0xb3aa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1672
+	.4byte	0xe1c1
+	.4byte	0xb3c4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 -1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1673
+	.4byte	0xa835
+	.4byte	0xb3d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1675
+	.4byte	0xe266
+	.4byte	0xb3f2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1676
+	.4byte	0xa045
+	.4byte	0xb413
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1681
+	.4byte	0xe175
+	.4byte	0xb427
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1683
+	.4byte	0xe2e2
+	.4byte	0xb43b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1687
+	.4byte	0xe266
+	.4byte	0xb455
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1688
+	.4byte	0xa045
+	.4byte	0xb476
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1691
+	.4byte	0xa8e2
+	.4byte	0xb48a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1693
+	.4byte	0xdd4c
+	.4byte	0xb49e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x87
+	.4byte	.LVL1703
+	.4byte	0xb4af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1706
+	.4byte	0xc7c8
+	.4byte	0xb4d1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1707
+	.4byte	0xdd4c
+	.4byte	0xb4e5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1710
+	.4byte	0x103ff
+	.4byte	0xb502
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1711
+	.4byte	0xe19b
+	.uleb128 0x88
+	.4byte	.LVL1712
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.4byte	0xb51f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1715
+	.4byte	0x103ff
+	.4byte	0xb536
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1716
+	.4byte	0x4d68
+	.4byte	0xb557
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC25
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1720
+	.4byte	0xe175
+	.4byte	0xb56b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1722
+	.4byte	0xe175
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1469
+	.byte	0x2
+	.2byte	0xb54
+	.4byte	0x84
+	.4byte	.LFB260
+	.4byte	.LFE260-.LFB260
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xb70a
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xb54
+	.4byte	0x1aea
+	.4byte	.LLST117
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xb54
+	.4byte	0x74
+	.4byte	.LLST118
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xb56
+	.4byte	0x74
+	.4byte	.LLST119
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xb57
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xb58
+	.4byte	0x676
+	.4byte	.LLST120
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xb59
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x38
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xb5a
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xb5b
+	.4byte	0x74
+	.4byte	.LLST121
+	.uleb128 0x44
+	.4byte	.LVL237
+	.4byte	0xbdec
+	.4byte	0xb638
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL240
+	.4byte	0xa835
+	.4byte	0xb64c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL241
+	.4byte	0xa925
+	.4byte	0xb660
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL242
+	.4byte	0xe067
+	.4byte	0xb679
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL243
+	.4byte	0xa835
+	.4byte	0xb68d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL244
+	.4byte	0xde59
+	.4byte	0xb6a1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL246
+	.4byte	0xe067
+	.4byte	0xb6ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL247
+	.4byte	0xa835
+	.4byte	0xb6ce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL248
+	.4byte	0xde59
+	.4byte	0xb6e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL250
+	.4byte	0x103ff
+	.4byte	0xb6f9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC1
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL251
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1470
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x84
+	.4byte	.LFB259
+	.4byte	.LFE259-.LFB259
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xba02
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x1aea
+	.4byte	.LLST508
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x74
+	.4byte	.LLST509
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x74
+	.4byte	.LLST510
+	.uleb128 0x5c
+	.4byte	.LASF1457
+	.byte	0x2
+	.2byte	0xb01
+	.4byte	0x74
+	.4byte	.LLST511
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xb03
+	.4byte	0x74
+	.4byte	.LLST512
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xb04
+	.4byte	0x74
+	.4byte	.LLST513
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xb05
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xb06
+	.4byte	0x676
+	.4byte	.LLST514
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xb07
+	.4byte	0x74
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xb08
+	.4byte	0x3a
+	.4byte	.LLST515
+	.uleb128 0x38
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xb09
+	.4byte	0x74
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x488
+	.4byte	0xb89b
+	.uleb128 0x38
+	.4byte	.LASF1458
+	.byte	0x2
+	.2byte	0xb34
+	.4byte	0xc5
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x44
+	.4byte	.LVL1748
+	.4byte	0x103ff
+	.4byte	0xb808
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC27
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1751
+	.4byte	0xbdec
+	.4byte	0xb83a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1752
+	.4byte	0xb17b
+	.4byte	0xb859
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 -32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1753
+	.4byte	0x103ff
+	.4byte	0xb870
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC28
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1754
+	.4byte	0x103ff
+	.4byte	0xb887
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC29
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1755
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC30
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1729
+	.4byte	0xbdec
+	.4byte	0xb8cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -76
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -72
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1732
+	.4byte	0xa835
+	.4byte	0xb8e1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1733
+	.4byte	0xa925
+	.4byte	0xb8f5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1734
+	.4byte	0xe0ed
+	.4byte	0xb90f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1735
+	.4byte	0xa045
+	.4byte	0xb931
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1736
+	.4byte	0xdf6d
+	.4byte	0xb94b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1737
+	.4byte	0xa835
+	.4byte	0xb95f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1738
+	.4byte	0xde59
+	.4byte	0xb973
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1740
+	.4byte	0xe0ed
+	.4byte	0xb98d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1741
+	.4byte	0xa045
+	.4byte	0xb9af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -88
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1742
+	.4byte	0xdf6d
+	.4byte	0xb9c9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1743
+	.4byte	0xa835
+	.4byte	0xb9dd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1744
+	.4byte	0xde59
+	.4byte	0xb9f1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1746
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1471
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x84
+	.4byte	.LFB258
+	.4byte	.LFE258-.LFB258
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbc12
+	.uleb128 0x6d
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x1aea
+	.4byte	.LLST486
+	.uleb128 0x5c
+	.4byte	.LASF1153
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x74
+	.4byte	.LLST487
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xac8
+	.4byte	0x74
+	.4byte	.LLST488
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xaca
+	.4byte	0x74
+	.4byte	.LLST489
+	.uleb128 0x5e
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xacb
+	.4byte	0x676
+	.4byte	.LLST490
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xacc
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x38
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xacd
+	.4byte	0x74
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x38
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xace
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x55
+	.uleb128 0x38
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0xacf
+	.4byte	0x74
+	.uleb128 0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.uleb128 0x5e
+	.4byte	.LASF1465
+	.byte	0x2
+	.2byte	0xad0
+	.4byte	0x74
+	.4byte	.LLST491
+	.uleb128 0x5e
+	.4byte	.LASF1466
+	.byte	0x2
+	.2byte	0xad1
+	.4byte	0x74
+	.4byte	.LLST492
+	.uleb128 0x44
+	.4byte	.LVL1626
+	.4byte	0xbdec
+	.4byte	0xbafa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -40
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x5
+	.byte	0x78
+	.sleb128 0
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1629
+	.4byte	0xa835
+	.4byte	0xbb0e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1630
+	.4byte	0xa925
+	.4byte	0xbb22
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1631
+	.4byte	0xe2e2
+	.4byte	0xbb3c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1632
+	.4byte	0xa835
+	.4byte	0xbb50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1633
+	.4byte	0xa045
+	.4byte	0xbb6f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1636
+	.4byte	0xe2e2
+	.4byte	0xbb89
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1637
+	.4byte	0xa045
+	.4byte	0xbba8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1640
+	.4byte	0xa8e2
+	.4byte	0xbbbc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1643
+	.4byte	0x103ff
+	.4byte	0xbbd3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC23
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1644
+	.4byte	0x4d68
+	.4byte	0xbbf4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC24
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1645
+	.4byte	0x4d68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC25
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1472
+	.byte	0x2
+	.2byte	0xab0
+	.4byte	0x74
+	.4byte	.LFB257
+	.4byte	.LFE257-.LFB257
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbca5
+	.uleb128 0x5c
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xab0
+	.4byte	0x3a
+	.4byte	.LLST96
+	.uleb128 0x5e
+	.4byte	.LASF1473
+	.byte	0x2
+	.2byte	0xab2
+	.4byte	0xbca5
+	.4byte	.LLST97
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xab3
+	.4byte	0x3a
+	.4byte	.LLST98
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xab4
+	.4byte	0x74
+	.4byte	.LLST99
+	.uleb128 0x44
+	.4byte	.LVL185
+	.4byte	0xa925
+	.4byte	0xbc80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL186
+	.4byte	0xbcab
+	.4byte	0xbc94
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL189
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x621
+	.uleb128 0x5b
+	.4byte	.LASF1474
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x74
+	.4byte	.LFB256
+	.4byte	.LFE256-.LFB256
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbd20
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x3a
+	.4byte	.LLST73
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x74
+	.4byte	.LLST74
+	.uleb128 0x5c
+	.4byte	.LASF1475
+	.byte	0x2
+	.2byte	0xaa2
+	.4byte	0x3a
+	.4byte	.LLST75
+	.uleb128 0x38
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0xaa4
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x45
+	.4byte	.LVL126
+	.4byte	0xbd20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1476
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x74
+	.4byte	.LFB255
+	.4byte	.LFE255-.LFB255
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbdec
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x3a
+	.4byte	.LLST66
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x74
+	.4byte	.LLST67
+	.uleb128 0x5c
+	.4byte	.LASF1475
+	.byte	0x2
+	.2byte	0xa8a
+	.4byte	0x3a
+	.4byte	.LLST68
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0xa8c
+	.4byte	0x15bc
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0xb0
+	.4byte	0xbd8e
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0xa96
+	.4byte	0x74
+	.4byte	.LLST71
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB188
+	.4byte	.Ldebug_ranges0+0x98
+	.byte	0x2
+	.2byte	0xa8d
+	.4byte	0xbdc0
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST69
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x98
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST70
+	.byte	0
+	.byte	0
+	.uleb128 0x82
+	.4byte	0xa8c4
+	.4byte	.LBB194
+	.4byte	.LBE194-.LBB194
+	.byte	0x2
+	.2byte	0xa9e
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST72
+	.uleb128 0x45
+	.4byte	.LVL117
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1477
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x74
+	.4byte	.LFB254
+	.4byte	.LFE254-.LFB254
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbed1
+	.uleb128 0x5c
+	.4byte	.LASF1454
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x676
+	.4byte	.LLST56
+	.uleb128 0x5c
+	.4byte	.LASF1355
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x74
+	.4byte	.LLST57
+	.uleb128 0x5c
+	.4byte	.LASF1478
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x13e
+	.4byte	.LLST58
+	.uleb128 0x5c
+	.4byte	.LASF1479
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x13e
+	.4byte	.LLST59
+	.uleb128 0x5c
+	.4byte	.LASF1135
+	.byte	0x2
+	.2byte	0xa6c
+	.4byte	0x3a
+	.4byte	.LLST60
+	.uleb128 0x5e
+	.4byte	.LASF1480
+	.byte	0x2
+	.2byte	0xa6e
+	.4byte	0x57
+	.4byte	.LLST61
+	.uleb128 0x5e
+	.4byte	.LASF1481
+	.byte	0x2
+	.2byte	0xa6e
+	.4byte	0x57
+	.4byte	.LLST62
+	.uleb128 0x5e
+	.4byte	.LASF1482
+	.byte	0x2
+	.2byte	0xa6e
+	.4byte	0x57
+	.4byte	.LLST63
+	.uleb128 0x38
+	.4byte	.LASF1483
+	.byte	0x2
+	.2byte	0xa6f
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x38
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0xa70
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x5a
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0xa71
+	.4byte	0x74
+	.4byte	.LLST64
+	.uleb128 0x5e
+	.4byte	.LASF1484
+	.byte	0x2
+	.2byte	0xa72
+	.4byte	0x74
+	.4byte	.LLST65
+	.uleb128 0x38
+	.4byte	.LASF1314
+	.byte	0x2
+	.2byte	0xa73
+	.4byte	0x57
+	.uleb128 0x1
+	.byte	0x5b
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1485
+	.byte	0x2
+	.2byte	0xa5f
+	.4byte	0x74
+	.4byte	.LFB253
+	.4byte	.LFE253-.LFB253
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xbf65
+	.uleb128 0x89
+	.4byte	0xa801
+	.4byte	.LBB227
+	.4byte	.LBE227-.LBB227
+	.byte	0x2
+	.2byte	0xa68
+	.4byte	0xbf26
+	.uleb128 0x4f
+	.4byte	0xa81a
+	.4byte	.LLST133
+	.uleb128 0x4f
+	.4byte	0xa80e
+	.4byte	.LLST133
+	.uleb128 0x7a
+	.4byte	.LBB228
+	.4byte	.LBE228-.LBB228
+	.uleb128 0x73
+	.4byte	0xa827
+	.4byte	.LLST135
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL290
+	.4byte	0xa835
+	.4byte	0xbf39
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL291
+	.4byte	0xc6a1
+	.uleb128 0x44
+	.4byte	.LVL292
+	.4byte	0xd8d7
+	.4byte	0xbf55
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL293
+	.4byte	0xa968
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1486
+	.byte	0x2
+	.2byte	0x890
+	.4byte	0x74
+	.4byte	.LFB252
+	.4byte	.LFE252-.LFB252
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc328
+	.uleb128 0x5c
+	.4byte	.LASF286
+	.byte	0x2
+	.2byte	0x890
+	.4byte	0x13e
+	.4byte	.LLST474
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x892
+	.4byte	0x74
+	.4byte	.LLST475
+	.uleb128 0x5d
+	.ascii	"ret\000"
+	.byte	0x2
+	.2byte	0x893
+	.4byte	0x74
+	.4byte	.LLST476
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x438
+	.4byte	0xbff7
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x935
+	.4byte	0x74
+	.4byte	.LLST482
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x935
+	.4byte	0x74
+	.4byte	.LLST483
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x936
+	.4byte	0xc328
+	.4byte	.LLST484
+	.uleb128 0x48
+	.4byte	.LVL1606
+	.4byte	0xced6
+	.uleb128 0x48
+	.4byte	.LVL1607
+	.4byte	0xd2cb
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x450
+	.4byte	0xc011
+	.uleb128 0x5e
+	.4byte	.LASF1487
+	.byte	0x2
+	.2byte	0x9f6
+	.4byte	0xc32e
+	.4byte	.LLST485
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xe3cf
+	.4byte	.LBB392
+	.4byte	.Ldebug_ranges0+0x3e8
+	.byte	0x2
+	.2byte	0x8a9
+	.4byte	0xc0fd
+	.uleb128 0x4f
+	.4byte	0xe3e9
+	.4byte	.LLST477
+	.uleb128 0x4f
+	.4byte	0xe3dd
+	.4byte	.LLST478
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x3e8
+	.uleb128 0x73
+	.4byte	0xe3f5
+	.4byte	.LLST479
+	.uleb128 0x74
+	.4byte	0xe401
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB394
+	.4byte	.Ldebug_ranges0+0x400
+	.byte	0x2
+	.2byte	0x11b
+	.4byte	0xc078
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST480
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x400
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB400
+	.4byte	.Ldebug_ranges0+0x420
+	.byte	0x2
+	.2byte	0x11f
+	.4byte	0xc0a6
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST481
+	.uleb128 0x45
+	.4byte	.LVL1577
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1572
+	.4byte	0xe40e
+	.4byte	0xc0ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1575
+	.4byte	0xa925
+	.4byte	0xc0ce
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1578
+	.4byte	0xa8e2
+	.4byte	0xc0e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1579
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC21
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 1
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1563
+	.4byte	0x5194
+	.4byte	0xc112
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1564
+	.4byte	0x5194
+	.4byte	0xc127
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1565
+	.4byte	0x5194
+	.4byte	0xc13c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1566
+	.4byte	0x5194
+	.4byte	0xc151
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1567
+	.4byte	0x5194
+	.4byte	0xc166
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1569
+	.4byte	0xaa73
+	.4byte	0xc17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1582
+	.4byte	0xa9ad
+	.4byte	0xc18f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1583
+	.4byte	0x530b
+	.4byte	0xc1b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x354
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1586
+	.4byte	0x52a5
+	.4byte	0xc1d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR140+32
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1587
+	.4byte	0x52a5
+	.4byte	0xc1fe
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR197
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1588
+	.4byte	0xc334
+	.uleb128 0x48
+	.4byte	.LVL1589
+	.4byte	0xd8d7
+	.uleb128 0x48
+	.4byte	.LVL1590
+	.4byte	0xa968
+	.uleb128 0x48
+	.4byte	.LVL1591
+	.4byte	0xd49d
+	.uleb128 0x44
+	.4byte	.LVL1593
+	.4byte	0x103ff
+	.4byte	0xc239
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC22
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1594
+	.4byte	0xc334
+	.uleb128 0x48
+	.4byte	.LVL1595
+	.4byte	0xc54f
+	.uleb128 0x48
+	.4byte	.LVL1596
+	.4byte	0xced6
+	.uleb128 0x48
+	.4byte	.LVL1597
+	.4byte	0xd2cb
+	.uleb128 0x44
+	.4byte	.LVL1598
+	.4byte	0xd651
+	.4byte	0xc270
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1599
+	.4byte	0xd2cb
+	.uleb128 0x48
+	.4byte	.LVL1601
+	.4byte	0xd242
+	.uleb128 0x48
+	.4byte	.LVL1602
+	.4byte	0xc54f
+	.uleb128 0x44
+	.4byte	.LVL1608
+	.4byte	0xd8d7
+	.4byte	0xc29e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1609
+	.4byte	0xa968
+	.4byte	0xc2b1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1610
+	.4byte	0xe19b
+	.4byte	0xc2c5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1611
+	.4byte	0xd651
+	.4byte	0xc2d8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1612
+	.4byte	0xe175
+	.4byte	0xc2ec
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1613
+	.4byte	0xe3a1
+	.4byte	0xc300
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1614
+	.4byte	0xc415
+	.4byte	0xc317
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR138
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1617
+	.4byte	0xe3a1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x45
+	.uleb128 0xc
+	.byte	0x4
+	.4byte	0x144
+	.uleb128 0x5b
+	.4byte	.LASF1488
+	.byte	0x2
+	.2byte	0x860
+	.4byte	0x74
+	.4byte	.LFB251
+	.4byte	.LFE251-.LFB251
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc3c9
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x862
+	.4byte	0x74
+	.4byte	.LLST308
+	.uleb128 0x5e
+	.4byte	.LASF1489
+	.byte	0x2
+	.2byte	0x863
+	.4byte	0xab0
+	.4byte	.LLST309
+	.uleb128 0x44
+	.4byte	.LVL905
+	.4byte	0xe5c8
+	.4byte	0xc38c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL909
+	.4byte	0x52a5
+	.4byte	0xc3a9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL910
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1490
+	.byte	0x2
+	.2byte	0x85a
+	.4byte	0x74
+	.4byte	.LFB250
+	.4byte	.LFE250-.LFB250
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc415
+	.uleb128 0x5c
+	.4byte	.LASF1491
+	.byte	0x2
+	.2byte	0x85a
+	.4byte	0x8b6
+	.4byte	.LLST307
+	.uleb128 0x45
+	.4byte	.LVL902
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR138
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1492
+	.byte	0x2
+	.2byte	0x82a
+	.4byte	0x74
+	.4byte	.LFB249
+	.4byte	.LFE249-.LFB249
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc54f
+	.uleb128 0x5c
+	.4byte	.LASF1491
+	.byte	0x2
+	.2byte	0x82a
+	.4byte	0x8b6
+	.4byte	.LLST413
+	.uleb128 0x71
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x82c
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x54
+	.uleb128 0x71
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x82c
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x38
+	.4byte	.LASF1493
+	.byte	0x2
+	.2byte	0x82f
+	.4byte	0x7dc
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1249
+	.byte	0x2
+	.2byte	0x836
+	.4byte	0x74
+	.4byte	.LLST414
+	.uleb128 0x38
+	.4byte	.LASF1494
+	.byte	0x2
+	.2byte	0x837
+	.4byte	0x3a
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -52
+	.uleb128 0x44
+	.4byte	.LVL1272
+	.4byte	0xe19b
+	.4byte	0xc499
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1273
+	.4byte	0x530b
+	.4byte	0xc4b9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1275
+	.4byte	0xe3a1
+	.4byte	0xc4cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1276
+	.4byte	0xe175
+	.4byte	0xc4e1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1279
+	.4byte	0xe3a1
+	.4byte	0xc4f5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1280
+	.4byte	0xdd4c
+	.4byte	0xc50d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1285
+	.4byte	0x103ff
+	.4byte	0xc52a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1286
+	.4byte	0x52a5
+	.4byte	0xc545
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1288
+	.4byte	0xd2cb
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1495
+	.byte	0x2
+	.2byte	0x7ff
+	.4byte	.LFB248
+	.4byte	.LFE248-.LFB248
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc61a
+	.uleb128 0x5e
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x801
+	.4byte	0x74
+	.4byte	.LLST283
+	.uleb128 0x44
+	.4byte	.LVL796
+	.4byte	0x530b
+	.4byte	0xc597
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL797
+	.4byte	0x530b
+	.4byte	0xc5ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL798
+	.4byte	0x530b
+	.4byte	0xc5dd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR23
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x80
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL801
+	.4byte	0xe5c8
+	.4byte	0xc5fd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL807
+	.4byte	0xe5c8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x72
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1496
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	.LFB247
+	.4byte	.LFE247-.LFB247
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc6a1
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	0x3a
+	.4byte	.LLST415
+	.uleb128 0x5c
+	.4byte	.LASF1497
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	0x74
+	.4byte	.LLST416
+	.uleb128 0x5c
+	.4byte	.LASF1498
+	.byte	0x2
+	.2byte	0x7bf
+	.4byte	0x57
+	.4byte	.LLST417
+	.uleb128 0x5e
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x7c1
+	.4byte	0x3a
+	.4byte	.LLST418
+	.uleb128 0x44
+	.4byte	.LVL1294
+	.4byte	0x530b
+	.4byte	0xc68b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x8000
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1296
+	.4byte	0xda49
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1499
+	.byte	0x2
+	.2byte	0x7b1
+	.byte	0x1
+	.4byte	0xc6c7
+	.uleb128 0x56
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x7b3
+	.4byte	0x3a
+	.uleb128 0x56
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x7b4
+	.4byte	0x3a
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1500
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x74
+	.4byte	.LFB245
+	.4byte	.LFE245-.LFB245
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc7c8
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x3a
+	.4byte	.LLST397
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x74
+	.4byte	.LLST398
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x8b6
+	.4byte	.LLST399
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x788
+	.4byte	0x8b6
+	.4byte	.LLST400
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x78a
+	.4byte	0x74
+	.4byte	.LLST401
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x78b
+	.4byte	0x74
+	.4byte	.LLST402
+	.uleb128 0x71
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x78c
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x58
+	.uleb128 0x5e
+	.4byte	.LASF79
+	.byte	0x2
+	.2byte	0x78d
+	.4byte	0x3a
+	.4byte	.LLST403
+	.uleb128 0x5e
+	.4byte	.LASF77
+	.byte	0x2
+	.2byte	0x78e
+	.4byte	0x3a
+	.4byte	.LLST404
+	.uleb128 0x44
+	.4byte	.LVL1208
+	.4byte	0xa835
+	.4byte	0xc781
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1216
+	.4byte	0xc7c8
+	.4byte	0xc7a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1217
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1502
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	.LFB244
+	.4byte	.LFE244-.LFB244
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xc8cb
+	.uleb128 0x5c
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x3a
+	.4byte	.LLST86
+	.uleb128 0x5c
+	.4byte	.LASF76
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x3a
+	.4byte	.LLST87
+	.uleb128 0x5c
+	.4byte	.LASF78
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x8b6
+	.4byte	.LLST88
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x76c
+	.4byte	0x3a
+	.4byte	.LLST89
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x76e
+	.4byte	0x15bc
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x76f
+	.4byte	0x3a
+	.4byte	.LLST90
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x770
+	.4byte	0xc328
+	.4byte	.LLST91
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB197
+	.4byte	.Ldebug_ranges0+0xd0
+	.byte	0x2
+	.2byte	0x77b
+	.4byte	0xc878
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST92
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0xd0
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB201
+	.4byte	.Ldebug_ranges0+0xe8
+	.byte	0x2
+	.2byte	0x780
+	.4byte	0xc8a6
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST93
+	.uleb128 0x45
+	.4byte	.LVL176
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL164
+	.4byte	0xa925
+	.4byte	0xc8ba
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL168
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1503
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LFB243
+	.4byte	.LFE243-.LFB243
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xca62
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x3a
+	.4byte	.LLST386
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x74
+	.4byte	.LLST387
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x8b6
+	.4byte	.LLST388
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x73a
+	.4byte	0x8b6
+	.4byte	.LLST389
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x73c
+	.4byte	0x74
+	.4byte	.LLST390
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x73d
+	.4byte	0x74
+	.4byte	.LLST391
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x73e
+	.4byte	0x74
+	.4byte	.LLST392
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x73f
+	.4byte	0x15bc
+	.uleb128 0x5e
+	.4byte	.LASF1504
+	.byte	0x2
+	.2byte	0x740
+	.4byte	0x3a
+	.4byte	.LLST393
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB327
+	.4byte	.Ldebug_ranges0+0x2d0
+	.byte	0x2
+	.2byte	0x746
+	.4byte	0xc99d
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST394
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x2d0
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB331
+	.4byte	.Ldebug_ranges0+0x2e8
+	.byte	0x2
+	.2byte	0x75e
+	.4byte	0xc9cb
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST395
+	.uleb128 0x45
+	.4byte	.LVL1186
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xa8c4
+	.4byte	.LBB335
+	.4byte	.Ldebug_ranges0+0x300
+	.byte	0x2
+	.2byte	0x74a
+	.4byte	0xc9f9
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST396
+	.uleb128 0x45
+	.4byte	.LVL1195
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1180
+	.4byte	0xa835
+	.4byte	0xca0d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1189
+	.4byte	0x103ff
+	.4byte	0xca3e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC14
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1196
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1505
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x74
+	.4byte	.LFB242
+	.4byte	.LFE242-.LFB242
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xcb8c
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x3a
+	.4byte	.LLST379
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x74
+	.4byte	.LLST380
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x8b6
+	.4byte	.LLST381
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x71b
+	.4byte	0x8b6
+	.4byte	.LLST382
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x71d
+	.4byte	0x74
+	.4byte	.LLST383
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x71e
+	.4byte	0x74
+	.4byte	.LLST384
+	.uleb128 0x71
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x71f
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x56
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x720
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB323
+	.4byte	.Ldebug_ranges0+0x2b8
+	.byte	0x2
+	.2byte	0x723
+	.4byte	0xcb22
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST385
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x2b8
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1161
+	.4byte	0xa835
+	.4byte	0xcb36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1164
+	.4byte	0xcb8c
+	.4byte	0xcb4f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1167
+	.4byte	0xcb8c
+	.4byte	0xcb69
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1168
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1506
+	.byte	0x2
+	.2byte	0x70e
+	.4byte	.LFB241
+	.4byte	.LFE241-.LFB241
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xcbff
+	.uleb128 0x5c
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x70e
+	.4byte	0x15bc
+	.4byte	.LLST52
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x70e
+	.4byte	0x3a
+	.4byte	.LLST53
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x710
+	.4byte	0x74
+	.4byte	.LLST54
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB184
+	.4byte	.Ldebug_ranges0+0x80
+	.byte	0x2
+	.2byte	0x717
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST55
+	.uleb128 0x45
+	.4byte	.LVL89
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x12c
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1507
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x74
+	.4byte	.LFB240
+	.4byte	.LFE240-.LFB240
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xcddf
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x3a
+	.4byte	.LLST370
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x74
+	.4byte	.LLST371
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x8b6
+	.4byte	.LLST372
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x6cc
+	.4byte	0x8b6
+	.4byte	.LLST373
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x6ce
+	.4byte	0x74
+	.4byte	.LLST374
+	.uleb128 0x5e
+	.4byte	.LASF1501
+	.byte	0x2
+	.2byte	0x6cf
+	.4byte	0x74
+	.4byte	.LLST375
+	.uleb128 0x5e
+	.4byte	.LASF1508
+	.byte	0x2
+	.2byte	0x6d0
+	.4byte	0x74
+	.4byte	.LLST376
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x6d1
+	.4byte	0x74
+	.4byte	.LLST377
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x6d2
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB315
+	.4byte	.Ldebug_ranges0+0x290
+	.byte	0x2
+	.2byte	0x6d5
+	.4byte	0xccd1
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST378
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x290
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1128
+	.4byte	0xa835
+	.4byte	0xcce5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1132
+	.4byte	0xa9ad
+	.4byte	0xccf9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1139
+	.4byte	0xce51
+	.4byte	0xcd12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1141
+	.4byte	0xa835
+	.4byte	0xcd26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1142
+	.4byte	0xa9ad
+	.4byte	0xcd3a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1145
+	.4byte	0xce51
+	.4byte	0xcd54
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1146
+	.4byte	0xa9ad
+	.4byte	0xcd68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1147
+	.4byte	0xdd4c
+	.4byte	0xcd90
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1150
+	.4byte	0xa9ad
+	.4byte	0xcda4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1155
+	.4byte	0xcddf
+	.uleb128 0x44
+	.4byte	.LVL1156
+	.4byte	0xdd4c
+	.4byte	0xcdd5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1159
+	.4byte	0xcddf
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1509
+	.byte	0x2
+	.2byte	0x6ba
+	.4byte	.LFB239
+	.4byte	.LFE239-.LFB239
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xce51
+	.uleb128 0x5c
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x6ba
+	.4byte	0x15bc
+	.4byte	.LLST48
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x6ba
+	.4byte	0x3a
+	.4byte	.LLST49
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x6bc
+	.4byte	0x74
+	.4byte	.LLST50
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB180
+	.4byte	.Ldebug_ranges0+0x68
+	.byte	0x2
+	.2byte	0x6c1
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST51
+	.uleb128 0x45
+	.4byte	.LVL81
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1510
+	.byte	0x2
+	.2byte	0x6a9
+	.4byte	.LFB238
+	.4byte	.LFE238-.LFB238
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xced6
+	.uleb128 0x5c
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x6a9
+	.4byte	0x15bc
+	.4byte	.LLST113
+	.uleb128 0x5c
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x6a9
+	.4byte	0x3a
+	.4byte	.LLST114
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x6ab
+	.4byte	0x74
+	.4byte	.LLST115
+	.uleb128 0x89
+	.4byte	0xa8c4
+	.4byte	.LBB221
+	.4byte	.LBE221-.LBB221
+	.byte	0x2
+	.2byte	0x6af
+	.4byte	0xcec6
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST116
+	.uleb128 0x45
+	.4byte	.LVL229
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xc8
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL232
+	.4byte	0xa835
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1511
+	.byte	0x2
+	.2byte	0x689
+	.byte	0x1
+	.4byte	0xcef0
+	.uleb128 0x55
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x689
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1512
+	.byte	0x2
+	.2byte	0x551
+	.4byte	.LFB236
+	.4byte	.LFE236-.LFB236
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd1ee
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x551
+	.4byte	0x8f
+	.4byte	.LLST452
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x553
+	.4byte	0x84
+	.4byte	.LLST453
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x553
+	.4byte	0x84
+	.4byte	.LLST454
+	.uleb128 0x5d
+	.ascii	"reg\000"
+	.byte	0x2
+	.2byte	0x554
+	.4byte	0x3a
+	.4byte	.LLST455
+	.uleb128 0x5e
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x555
+	.4byte	0x3a
+	.4byte	.LLST456
+	.uleb128 0x5e
+	.4byte	.LASF1455
+	.byte	0x2
+	.2byte	0x556
+	.4byte	0x3a
+	.4byte	.LLST457
+	.uleb128 0x5e
+	.4byte	.LASF76
+	.byte	0x2
+	.2byte	0x557
+	.4byte	0x3a
+	.4byte	.LLST458
+	.uleb128 0x5e
+	.4byte	.LASF77
+	.byte	0x2
+	.2byte	0x558
+	.4byte	0x3a
+	.4byte	.LLST459
+	.uleb128 0x38
+	.4byte	.LASF78
+	.byte	0x2
+	.2byte	0x559
+	.4byte	0x8b6
+	.uleb128 0x6
+	.byte	0x3
+	.4byte	gReadRetryInfo+4
+	.byte	0x9f
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x55a
+	.4byte	0x15bc
+	.uleb128 0x5e
+	.4byte	.LASF1513
+	.byte	0x2
+	.2byte	0x55b
+	.4byte	0x8b6
+	.4byte	.LLST460
+	.uleb128 0x5e
+	.4byte	.LASF1514
+	.byte	0x2
+	.2byte	0x55c
+	.4byte	0x13e
+	.4byte	.LLST461
+	.uleb128 0x5e
+	.4byte	.LASF1515
+	.byte	0x2
+	.2byte	0x55d
+	.4byte	0x8f
+	.4byte	.LLST462
+	.uleb128 0x6f
+	.4byte	.LBB353
+	.4byte	.LBE353-.LBB353
+	.4byte	0xd045
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x594
+	.4byte	0xc328
+	.4byte	.LLST463
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB354
+	.4byte	.Ldebug_ranges0+0x330
+	.byte	0x2
+	.2byte	0x597
+	.4byte	0xd019
+	.uleb128 0x8b
+	.4byte	0xaa39
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x330
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB361
+	.4byte	.Ldebug_ranges0+0x358
+	.byte	0x2
+	.2byte	0x59c
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST464
+	.uleb128 0x45
+	.4byte	.LVL1459
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x7a
+	.4byte	.LBB366
+	.4byte	.LBE366-.LBB366
+	.uleb128 0x5e
+	.4byte	.LASF1516
+	.byte	0x2
+	.2byte	0x5af
+	.4byte	0x3a
+	.4byte	.LLST465
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x370
+	.uleb128 0x5e
+	.4byte	.LASF80
+	.byte	0x2
+	.2byte	0x5b2
+	.4byte	0xc328
+	.4byte	.LLST466
+	.uleb128 0x6f
+	.4byte	.LBB372
+	.4byte	.LBE372-.LBB372
+	.4byte	0xd08d
+	.uleb128 0x56
+	.4byte	.LASF864
+	.byte	0x2
+	.2byte	0x605
+	.4byte	0x8f
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x3a0
+	.4byte	0xd0dd
+	.uleb128 0x5e
+	.4byte	.LASF1517
+	.byte	0x2
+	.2byte	0x60b
+	.4byte	0x8f
+	.4byte	.LLST468
+	.uleb128 0x5d
+	.ascii	"mod\000"
+	.byte	0x2
+	.2byte	0x60c
+	.4byte	0x74
+	.4byte	.LLST469
+	.uleb128 0x5e
+	.4byte	.LASF243
+	.byte	0x2
+	.2byte	0x60d
+	.4byte	0x74
+	.4byte	.LLST470
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x3b8
+	.uleb128 0x5e
+	.4byte	.LASF1518
+	.byte	0x2
+	.2byte	0x610
+	.4byte	0x74
+	.4byte	.LLST471
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB368
+	.4byte	.Ldebug_ranges0+0x388
+	.byte	0x2
+	.2byte	0x5b6
+	.4byte	0xd10b
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST467
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x388
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1474
+	.4byte	0xa835
+	.4byte	0xd11f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1480
+	.4byte	0xa835
+	.4byte	0xd133
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1491
+	.4byte	0x103ff
+	.4byte	0xd14f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1522
+	.4byte	0x4d68
+	.4byte	0xd172
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1523
+	.4byte	0x103ff
+	.4byte	0xd18e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1529
+	.4byte	0x103ff
+	.4byte	0xd1aa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC19
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1541
+	.4byte	0xa835
+	.4byte	0xd1be
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1542
+	.4byte	0xe2e2
+	.4byte	0xd1db
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x91
+	.sleb128 -84
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1543
+	.4byte	0xa835
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1519
+	.byte	0x2
+	.2byte	0x41c
+	.4byte	0x84
+	.byte	0x1
+	.4byte	0xd239
+	.uleb128 0x55
+	.4byte	.LASF1322
+	.byte	0x2
+	.2byte	0x41c
+	.4byte	0x57
+	.uleb128 0x57
+	.ascii	"sts\000"
+	.byte	0x2
+	.2byte	0x41e
+	.4byte	0x84
+	.uleb128 0x56
+	.4byte	.LASF271
+	.byte	0x2
+	.2byte	0x41f
+	.4byte	0x73e
+	.uleb128 0x57
+	.ascii	"req\000"
+	.byte	0x2
+	.2byte	0x420
+	.4byte	0xc5
+	.uleb128 0x8c
+	.ascii	"out\000"
+	.byte	0x2
+	.2byte	0x431
+	.byte	0
+	.uleb128 0x60
+	.4byte	.LASF1520
+	.byte	0x2
+	.2byte	0x3d0
+	.byte	0x1
+	.uleb128 0x69
+	.4byte	.LASF1521
+	.byte	0x2
+	.2byte	0x3a1
+	.4byte	.LFB233
+	.4byte	.LFE233-.LFB233
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd2b5
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x3a1
+	.4byte	0x74
+	.4byte	.LLST279
+	.uleb128 0x5c
+	.4byte	.LASF1522
+	.byte	0x2
+	.2byte	0x3a1
+	.4byte	0x74
+	.4byte	.LLST280
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x3a3
+	.4byte	0x57
+	.4byte	.LLST281
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x3a3
+	.4byte	0x57
+	.4byte	.LLST282
+	.uleb128 0x45
+	.4byte	.LVL751
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR117
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x400
+	.byte	0
+	.byte	0
+	.uleb128 0x7e
+	.4byte	.LASF1523
+	.byte	0x2
+	.2byte	0x39c
+	.4byte	0x74
+	.4byte	.LFB232
+	.4byte	.LFE232-.LFB232
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x5b
+	.4byte	.LASF1524
+	.byte	0x2
+	.2byte	0x365
+	.4byte	0x74
+	.4byte	.LFB231
+	.4byte	.LFE231-.LFB231
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd49d
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x367
+	.4byte	0x74
+	.4byte	.LLST411
+	.uleb128 0x5e
+	.4byte	.LASF1525
+	.byte	0x2
+	.2byte	0x368
+	.4byte	0x74
+	.4byte	.LLST412
+	.uleb128 0x44
+	.4byte	.LVL1244
+	.4byte	0xe3a1
+	.4byte	0xd317
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1245
+	.4byte	0x530b
+	.4byte	0xd331
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x800
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1246
+	.4byte	0x52a5
+	.4byte	0xd34e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR22
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1247
+	.4byte	0x52a5
+	.4byte	0xd36a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR26
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1248
+	.4byte	0x52a5
+	.4byte	0xd387
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1249
+	.4byte	0x52a5
+	.4byte	0xd3a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1250
+	.4byte	0x52a5
+	.4byte	0xd3c1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1251
+	.4byte	0x52a5
+	.4byte	0xd3df
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x354
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1252
+	.4byte	0xd5f8
+	.4byte	0xd3fa
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7f4
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1253
+	.4byte	0xe19b
+	.4byte	0xd40e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1255
+	.4byte	0xd968
+	.4byte	0xd426
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1256
+	.4byte	0xda49
+	.4byte	0xd43e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1257
+	.4byte	0xda49
+	.4byte	0xd456
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1258
+	.4byte	0xdd4c
+	.4byte	0xd46e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1259
+	.4byte	0xd5f8
+	.4byte	0xd48c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0xc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7f4
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1265
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x67
+	.4byte	.LASF1526
+	.byte	0x2
+	.2byte	0x329
+	.4byte	0x74
+	.4byte	.LFB230
+	.4byte	.LFE230-.LFB230
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd5f8
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x32b
+	.4byte	0x74
+	.4byte	.LLST365
+	.uleb128 0x5d
+	.ascii	"j\000"
+	.byte	0x2
+	.2byte	0x32c
+	.4byte	0x74
+	.4byte	.LLST366
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x32d
+	.4byte	0x74
+	.4byte	.LLST367
+	.uleb128 0x5e
+	.4byte	.LASF1527
+	.byte	0x2
+	.2byte	0x32e
+	.4byte	0x74
+	.4byte	.LLST368
+	.uleb128 0x38
+	.4byte	.LASF1493
+	.byte	0x2
+	.2byte	0x331
+	.4byte	0x7dc
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x5e
+	.4byte	.LASF1528
+	.byte	0x2
+	.2byte	0x338
+	.4byte	0x74
+	.4byte	.LLST369
+	.uleb128 0x44
+	.4byte	.LVL1099
+	.4byte	0xe19b
+	.4byte	0xd526
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1102
+	.4byte	0xe3a1
+	.4byte	0xd53a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1103
+	.4byte	0xdd4c
+	.4byte	0xd558
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1106
+	.4byte	0xdd4c
+	.4byte	0xd577
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1111
+	.4byte	0xd5f8
+	.4byte	0xd592
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x7f4
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1112
+	.4byte	0x52a5
+	.4byte	0xd5b3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x78
+	.sleb128 160
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1113
+	.4byte	0x52a5
+	.4byte	0xd5d0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1114
+	.4byte	0x52a5
+	.4byte	0xd5ee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x354
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1125
+	.4byte	0xe175
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1529
+	.byte	0x2
+	.2byte	0x31f
+	.4byte	0x74
+	.4byte	.LFB229
+	.4byte	.LFE229-.LFB229
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd651
+	.uleb128 0x6d
+	.ascii	"buf\000"
+	.byte	0x2
+	.2byte	0x31f
+	.4byte	0x8b6
+	.4byte	.LLST44
+	.uleb128 0x6d
+	.ascii	"len\000"
+	.byte	0x2
+	.2byte	0x31f
+	.4byte	0x74
+	.4byte	.LLST45
+	.uleb128 0x5e
+	.4byte	.LASF94
+	.byte	0x2
+	.2byte	0x321
+	.4byte	0x74
+	.4byte	.LLST46
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x322
+	.4byte	0x74
+	.4byte	.LLST47
+	.byte	0
+	.uleb128 0x54
+	.4byte	.LASF1530
+	.byte	0x2
+	.2byte	0x30c
+	.4byte	0x74
+	.byte	0x1
+	.4byte	0xd687
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x30c
+	.4byte	0x3a
+	.uleb128 0x55
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x30c
+	.4byte	0x74
+	.uleb128 0x56
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x30e
+	.4byte	0x74
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1531
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x74
+	.4byte	.LFB227
+	.4byte	.LFE227-.LFB227
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd8d7
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x3a
+	.4byte	.LLST338
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x74
+	.4byte	.LLST339
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x8b6
+	.4byte	.LLST340
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x8b6
+	.4byte	.LLST341
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x2ac
+	.4byte	0x74
+	.4byte	.LLST342
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x2ae
+	.4byte	0x74
+	.4byte	.LLST343
+	.uleb128 0x5d
+	.ascii	"i\000"
+	.byte	0x2
+	.2byte	0x2af
+	.4byte	0x74
+	.4byte	.LLST344
+	.uleb128 0x5e
+	.4byte	.LASF1532
+	.byte	0x2
+	.2byte	0x2b0
+	.4byte	0x74
+	.4byte	.LLST345
+	.uleb128 0x5e
+	.4byte	.LASF1533
+	.byte	0x2
+	.2byte	0x2b1
+	.4byte	0x74
+	.4byte	.LLST346
+	.uleb128 0x5e
+	.4byte	.LASF1534
+	.byte	0x2
+	.2byte	0x2b2
+	.4byte	0x74
+	.4byte	.LLST347
+	.uleb128 0x5e
+	.4byte	.LASF1535
+	.byte	0x2
+	.2byte	0x2b3
+	.4byte	0x74
+	.4byte	.LLST348
+	.uleb128 0x5e
+	.4byte	.LASF1536
+	.byte	0x2
+	.2byte	0x2b4
+	.4byte	0x74
+	.4byte	.LLST349
+	.uleb128 0x5e
+	.4byte	.LASF1537
+	.byte	0x2
+	.2byte	0x2b5
+	.4byte	0x74
+	.4byte	.LLST350
+	.uleb128 0x5e
+	.4byte	.LASF1538
+	.byte	0x2
+	.2byte	0x2b6
+	.4byte	0x74
+	.4byte	.LLST351
+	.uleb128 0x5e
+	.4byte	.LASF1468
+	.byte	0x2
+	.2byte	0x2b7
+	.4byte	0x74
+	.4byte	.LLST352
+	.uleb128 0x44
+	.4byte	.LVL1021
+	.4byte	0xd8d7
+	.4byte	0xd7a2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1022
+	.4byte	0xa968
+	.4byte	0xd7b5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1023
+	.4byte	0xe40e
+	.4byte	0xd7cb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x1
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1024
+	.4byte	0xdd4c
+	.4byte	0xd7f5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1027
+	.4byte	0xd8d7
+	.uleb128 0x48
+	.4byte	.LVL1028
+	.4byte	0xa968
+	.uleb128 0x44
+	.4byte	.LVL1031
+	.4byte	0x103ff
+	.4byte	0xd82b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC10
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1035
+	.4byte	0xaa04
+	.4byte	0xd83f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1036
+	.4byte	0xdd4c
+	.4byte	0xd869
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x94
+	.byte	0x1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1044
+	.4byte	0x103ff
+	.4byte	0xd886
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC11
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1045
+	.4byte	0xaa04
+	.4byte	0xd89a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1046
+	.4byte	0x103ff
+	.4byte	0xd8bf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC12
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1047
+	.4byte	0xaa04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x9
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x24
+	.byte	0x9
+	.byte	0xfc
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1539
+	.byte	0x2
+	.2byte	0x25d
+	.4byte	0x74
+	.4byte	.LFB226
+	.4byte	.LFE226-.LFB226
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xd968
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x25d
+	.4byte	0x74
+	.4byte	.LLST110
+	.uleb128 0x5e
+	.4byte	.LASF22
+	.byte	0x2
+	.2byte	0x25f
+	.4byte	0x3a
+	.4byte	.LLST111
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x260
+	.4byte	0x15bc
+	.uleb128 0x5e
+	.4byte	.LASF1540
+	.byte	0x2
+	.2byte	0x261
+	.4byte	0x3a
+	.4byte	.LLST112
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB217
+	.4byte	.Ldebug_ranges0+0x130
+	.byte	0x2
+	.2byte	0x264
+	.4byte	0xd958
+	.uleb128 0x8b
+	.4byte	0xaa39
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x130
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL224
+	.4byte	0xa835
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1541
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x74
+	.4byte	.LFB225
+	.4byte	.LFE225-.LFB225
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xda49
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x3a
+	.4byte	.LLST106
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x74
+	.4byte	.LLST107
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x24c
+	.4byte	0x74
+	.4byte	.LLST108
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x250
+	.4byte	0x74
+	.4byte	.LLST109
+	.uleb128 0x44
+	.4byte	.LVL209
+	.4byte	0xa835
+	.4byte	0xd9d6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL210
+	.4byte	0xa925
+	.4byte	0xd9ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL211
+	.4byte	0xe067
+	.4byte	0xda0a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL212
+	.4byte	0xa835
+	.4byte	0xda1e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL213
+	.4byte	0xde59
+	.4byte	0xda38
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL216
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1542
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x74
+	.4byte	.LFB224
+	.4byte	.LFE224-.LFB224
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdb8a
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x3a
+	.4byte	.LLST405
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x74
+	.4byte	.LLST406
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x8b6
+	.4byte	.LLST407
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x231
+	.4byte	0x8b6
+	.4byte	.LLST408
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x235
+	.4byte	0x74
+	.4byte	.LLST409
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0x236
+	.4byte	0x74
+	.4byte	.LLST410
+	.uleb128 0x44
+	.4byte	.LVL1230
+	.4byte	0xa835
+	.4byte	0xdad7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1231
+	.4byte	0xa925
+	.4byte	0xdaeb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1232
+	.4byte	0xe0ed
+	.4byte	0xdb05
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1233
+	.4byte	0xa045
+	.4byte	0xdb31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1234
+	.4byte	0xdf6d
+	.4byte	0xdb4b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1235
+	.4byte	0xa835
+	.4byte	0xdb5f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1236
+	.4byte	0xde59
+	.4byte	0xdb79
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1239
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1543
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x74
+	.4byte	.LFB223
+	.4byte	.LFE223-.LFB223
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdd4c
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x3a
+	.4byte	.LLST353
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x74
+	.4byte	.LLST354
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x8b6
+	.4byte	.LLST355
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x205
+	.4byte	0x8b6
+	.4byte	.LLST356
+	.uleb128 0x5e
+	.4byte	.LASF15
+	.byte	0x2
+	.2byte	0x207
+	.4byte	0x74
+	.4byte	.LLST357
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x278
+	.4byte	0xdc30
+	.uleb128 0x5e
+	.4byte	.LASF1463
+	.byte	0x2
+	.2byte	0x20b
+	.4byte	0x3a
+	.4byte	.LLST359
+	.uleb128 0x45
+	.4byte	.LVL1068
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x260
+	.4byte	0xdc8c
+	.uleb128 0x5e
+	.4byte	.LASF1468
+	.byte	0x2
+	.2byte	0x212
+	.4byte	0x74
+	.4byte	.LLST358
+	.uleb128 0x44
+	.4byte	.LVL1062
+	.4byte	0xd687
+	.4byte	0xdc75
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1065
+	.4byte	0xaa04
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x8
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x9
+	.byte	0xf4
+	.byte	0x24
+	.byte	0x9
+	.byte	0xfc
+	.byte	0x25
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1058
+	.4byte	0xdd4c
+	.4byte	0xdcb2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x88
+	.4byte	.LVL1070
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.4byte	0xdcd8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1073
+	.4byte	0x103ff
+	.4byte	0xdd01
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC13
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1074
+	.4byte	0xe19b
+	.4byte	0xdd15
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x88
+	.4byte	.LVL1076
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.4byte	0xdd3b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1079
+	.4byte	0xe175
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1544
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x74
+	.4byte	.LFB222
+	.4byte	.LFE222-.LFB222
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xde59
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x3a
+	.4byte	.LLST332
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x74
+	.4byte	.LLST333
+	.uleb128 0x5c
+	.4byte	.LASF17
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x8b6
+	.4byte	.LLST334
+	.uleb128 0x5c
+	.4byte	.LASF18
+	.byte	0x2
+	.2byte	0x1ea
+	.4byte	0x8b6
+	.4byte	.LLST335
+	.uleb128 0x5e
+	.4byte	.LASF1545
+	.byte	0x2
+	.2byte	0x1ed
+	.4byte	0x74
+	.4byte	.LLST336
+	.uleb128 0x5e
+	.4byte	.LASF58
+	.byte	0x2
+	.2byte	0x1ee
+	.4byte	0x74
+	.4byte	.LLST337
+	.uleb128 0x44
+	.4byte	.LVL1006
+	.4byte	0xa835
+	.4byte	0xddda
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1007
+	.4byte	0xa925
+	.4byte	0xddee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1008
+	.4byte	0xe2e2
+	.4byte	0xde08
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1009
+	.4byte	0xa835
+	.4byte	0xde1c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1010
+	.4byte	0xa045
+	.4byte	0xde48
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1013
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x5b
+	.4byte	.LASF1546
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x74
+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdefd
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x3a
+	.4byte	.LLST39
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1df
+	.4byte	0x74
+	.4byte	.LLST40
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1e1
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB172
+	.4byte	.Ldebug_ranges0+0x38
+	.byte	0x2
+	.2byte	0x1e3
+	.4byte	0xded1
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST41
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x38
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST42
+	.byte	0
+	.byte	0
+	.uleb128 0x8a
+	.4byte	0xa8c4
+	.4byte	.LBB175
+	.4byte	.Ldebug_ranges0+0x50
+	.byte	0x2
+	.2byte	0x1e5
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST43
+	.uleb128 0x45
+	.4byte	.LVL69
+	.4byte	0x1046f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1547
+	.byte	0x2
+	.2byte	0x1d7
+	.4byte	.LFB220
+	.4byte	.LFE220-.LFB220
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdf6d
+	.uleb128 0x70
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1d7
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1d7
+	.4byte	0x74
+	.4byte	.LLST36
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1d9
+	.4byte	0x15bc
+	.uleb128 0x8a
+	.4byte	0xaa29
+	.4byte	.LBB166
+	.4byte	.Ldebug_ranges0+0x18
+	.byte	0x2
+	.2byte	0x1db
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST37
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x18
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST38
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1548
+	.byte	0x2
+	.2byte	0x1cf
+	.4byte	.LFB219
+	.4byte	.LFE219-.LFB219
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xdfdf
+	.uleb128 0x70
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1cf
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1cf
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1d1
+	.4byte	0x15bc
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB164
+	.4byte	.LBE164-.LBB164
+	.byte	0x2
+	.2byte	0x1d3
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST34
+	.uleb128 0x7a
+	.4byte	.LBB165
+	.4byte	.LBE165-.LBB165
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST35
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1549
+	.byte	0x2
+	.2byte	0x1c1
+	.4byte	.LFB218
+	.4byte	.LFE218-.LFB218
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe067
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1c1
+	.4byte	0x3a
+	.4byte	.LLST31
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1c1
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1c3
+	.4byte	0x15bc
+	.uleb128 0x89
+	.4byte	0xaa29
+	.4byte	.LBB162
+	.4byte	.LBE162-.LBB162
+	.byte	0x2
+	.2byte	0x1c5
+	.4byte	0xe056
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST32
+	.uleb128 0x7a
+	.4byte	.LBB163
+	.4byte	.LBE163-.LBB163
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST33
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL56
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1550
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe0ed
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	0x3a
+	.4byte	.LLST26
+	.uleb128 0x5c
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	0x74
+	.4byte	.LLST27
+	.uleb128 0x5c
+	.4byte	.LASF923
+	.byte	0x2
+	.2byte	0x1ae
+	.4byte	0x74
+	.4byte	.LLST28
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1b0
+	.4byte	0x15bc
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB160
+	.4byte	.LBE160-.LBB160
+	.byte	0x2
+	.2byte	0x1b2
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST29
+	.uleb128 0x7a
+	.4byte	.LBB161
+	.4byte	.LBE161-.LBB161
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST30
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1551
+	.byte	0x2
+	.2byte	0x1a0
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe175
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x1a0
+	.4byte	0x3a
+	.4byte	.LLST23
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x1a0
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x1a2
+	.4byte	0x15bc
+	.uleb128 0x89
+	.4byte	0xaa29
+	.4byte	.LBB158
+	.4byte	.LBE158-.LBB158
+	.byte	0x2
+	.2byte	0x1a4
+	.4byte	0xe164
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST24
+	.uleb128 0x7a
+	.4byte	.LBB159
+	.4byte	.LBE159-.LBB159
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST25
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL46
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1552
+	.byte	0x2
+	.2byte	0x197
+	.byte	0x1
+	.4byte	0xe19b
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x197
+	.4byte	0x3a
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x199
+	.4byte	0x15bc
+	.byte	0
+	.uleb128 0x6e
+	.4byte	.LASF1553
+	.byte	0x2
+	.2byte	0x18e
+	.byte	0x1
+	.4byte	0xe1c1
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x18e
+	.4byte	0x3a
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x190
+	.4byte	0x15bc
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1554
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	.LFB213
+	.4byte	.LFE213-.LFB213
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe266
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	0x3a
+	.4byte	.LLST129
+	.uleb128 0x5c
+	.4byte	.LASF1555
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	0x74
+	.4byte	.LLST130
+	.uleb128 0x5c
+	.4byte	.LASF1556
+	.byte	0x2
+	.2byte	0x16b
+	.4byte	0x74
+	.4byte	.LLST131
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x16d
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB223
+	.4byte	.Ldebug_ranges0+0x148
+	.byte	0x2
+	.2byte	0x16e
+	.4byte	0xe241
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST132
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x148
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL286
+	.4byte	0xa835
+	.4byte	0xe255
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL289
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1557
+	.byte	0x2
+	.2byte	0x14f
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe2e2
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x14f
+	.4byte	0x3a
+	.4byte	.LLST14
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x14f
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x151
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB138
+	.4byte	.Ldebug_ranges0+0
+	.byte	0x2
+	.2byte	0x153
+	.4byte	0xe2d8
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST15
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST16
+	.byte	0
+	.byte	0
+	.uleb128 0x49
+	.4byte	.LVL32
+	.4byte	0xe4a7
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1558
+	.byte	0x2
+	.2byte	0x141
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe36a
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x141
+	.4byte	0x3a
+	.4byte	.LLST11
+	.uleb128 0x70
+	.4byte	.LASF16
+	.byte	0x2
+	.2byte	0x141
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x143
+	.4byte	0x15bc
+	.uleb128 0x89
+	.4byte	0xaa29
+	.4byte	.LBB136
+	.4byte	.LBE136-.LBB136
+	.byte	0x2
+	.2byte	0x144
+	.4byte	0xe359
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST12
+	.uleb128 0x7a
+	.4byte	.LBB137
+	.4byte	.LBE137-.LBB137
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST13
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL28
+	.4byte	0xe4a7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1559
+	.byte	0x2
+	.2byte	0x133
+	.4byte	.LFB210
+	.4byte	.LFE210-.LFB210
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe3a1
+	.uleb128 0x5c
+	.4byte	.LASF1560
+	.byte	0x2
+	.2byte	0x133
+	.4byte	0x74
+	.4byte	.LLST136
+	.uleb128 0x4d
+	.4byte	.LVL303
+	.4byte	0xa7dc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1561
+	.byte	0x2
+	.2byte	0x12d
+	.4byte	.LFB209
+	.4byte	.LFE209-.LFB209
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe3cf
+	.uleb128 0x70
+	.4byte	.LASF1424
+	.byte	0x2
+	.2byte	0x12d
+	.4byte	0x3a
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x49
+	.4byte	.LVL317
+	.4byte	0xa797
+	.byte	0
+	.uleb128 0x8d
+	.4byte	.LASF1563
+	.byte	0x2
+	.2byte	0x115
+	.byte	0x1
+	.4byte	0xe40e
+	.uleb128 0x55
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x115
+	.4byte	0x3a
+	.uleb128 0x66
+	.ascii	"buf\000"
+	.byte	0x2
+	.2byte	0x115
+	.4byte	0x8b6
+	.uleb128 0x57
+	.ascii	"ptr\000"
+	.byte	0x2
+	.2byte	0x117
+	.4byte	0x8b6
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x118
+	.4byte	0x15bc
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1564
+	.byte	0x2
+	.2byte	0x10a
+	.4byte	.LFB207
+	.4byte	.LFE207-.LFB207
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe4a7
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x10a
+	.4byte	0x3a
+	.4byte	.LLST104
+	.uleb128 0x56
+	.4byte	.LASF273
+	.byte	0x2
+	.2byte	0x10c
+	.4byte	0x15bc
+	.uleb128 0x72
+	.4byte	0xaa29
+	.4byte	.LBB213
+	.4byte	.Ldebug_ranges0+0x118
+	.byte	0x2
+	.2byte	0x10e
+	.4byte	0xe46e
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST105
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x118
+	.uleb128 0x74
+	.4byte	0xe76b
+	.uleb128 0x74
+	.4byte	0xe774
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL205
+	.4byte	0xa925
+	.4byte	0xe482
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL206
+	.4byte	0xa835
+	.4byte	0xe496
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL207
+	.4byte	0xa8e2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.4byte	.LASF1565
+	.byte	0x2
+	.2byte	0x100
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe53d
+	.uleb128 0x5c
+	.4byte	.LASF1392
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0x3a
+	.4byte	.LLST6
+	.uleb128 0x70
+	.4byte	.LASF1566
+	.byte	0x2
+	.2byte	0x100
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5e
+	.4byte	.LASF1428
+	.byte	0x2
+	.2byte	0x102
+	.4byte	0x74
+	.4byte	.LLST7
+	.uleb128 0x89
+	.4byte	0xa801
+	.4byte	.LBB134
+	.4byte	.LBE134-.LBB134
+	.byte	0x2
+	.2byte	0x107
+	.4byte	0xe526
+	.uleb128 0x4f
+	.4byte	0xa81a
+	.4byte	.LLST8
+	.uleb128 0x4f
+	.4byte	0xa80e
+	.4byte	.LLST9
+	.uleb128 0x7a
+	.4byte	.LBB135
+	.4byte	.LBE135-.LBB135
+	.uleb128 0x73
+	.4byte	0xa827
+	.4byte	.LLST10
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL20
+	.4byte	0xe592
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1567
+	.byte	0x2
+	.byte	0xf6
+	.4byte	0x74
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe592
+	.uleb128 0x40
+	.4byte	.LASF1392
+	.byte	0x2
+	.byte	0xf6
+	.4byte	0x3a
+	.4byte	.LLST4
+	.uleb128 0x52
+	.4byte	.LASF1566
+	.byte	0x2
+	.byte	0xf6
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x61
+	.4byte	.LASF1428
+	.byte	0x2
+	.byte	0xf8
+	.4byte	0x74
+	.4byte	.LLST5
+	.uleb128 0x45
+	.4byte	.LVL15
+	.4byte	0xe592
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1568
+	.byte	0x2
+	.byte	0xee
+	.4byte	0x74
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe5c8
+	.uleb128 0x40
+	.4byte	.LASF1392
+	.byte	0x2
+	.byte	0xee
+	.4byte	0x3a
+	.4byte	.LLST3
+	.uleb128 0x52
+	.4byte	.LASF1566
+	.byte	0x2
+	.byte	0xee
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.uleb128 0x4b
+	.4byte	.LASF1569
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x74
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe618
+	.uleb128 0x40
+	.4byte	.LASF1100
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x8b6
+	.4byte	.LLST1
+	.uleb128 0x52
+	.4byte	.LASF1101
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x8b6
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x65
+	.ascii	"len\000"
+	.byte	0x2
+	.byte	0xcc
+	.4byte	0x74
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x41
+	.ascii	"i\000"
+	.byte	0x2
+	.byte	0xce
+	.4byte	0x74
+	.4byte	.LLST2
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x7349
+	.4byte	.LFB507
+	.4byte	.LFE507-.LFB507
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe643
+	.uleb128 0x4f
+	.4byte	0x7356
+	.4byte	.LLST0
+	.uleb128 0x8f
+	.4byte	0x7362
+	.uleb128 0x6
+	.byte	0xfa
+	.4byte	0x7362
+	.byte	0x9f
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xe19b
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe6ba
+	.uleb128 0x8f
+	.4byte	0xe1a8
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x74
+	.4byte	0xe1b4
+	.uleb128 0x7a
+	.4byte	.LBB146
+	.4byte	.LBE146-.LBB146
+	.uleb128 0x4f
+	.4byte	0xe1a8
+	.4byte	.LLST17
+	.uleb128 0x7a
+	.4byte	.LBB147
+	.4byte	.LBE147-.LBB147
+	.uleb128 0x74
+	.4byte	0xe65f
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB148
+	.4byte	.LBE148-.LBB148
+	.byte	0x2
+	.2byte	0x192
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST18
+	.uleb128 0x7a
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+	.4byte	.LBE149-.LBB149
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST19
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xe175
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+	.4byte	.LFE215-.LFB215
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe731
+	.uleb128 0x8f
+	.4byte	0xe182
+	.uleb128 0x1
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+	.uleb128 0x74
+	.4byte	0xe18e
+	.uleb128 0x7a
+	.4byte	.LBB154
+	.4byte	.LBE154-.LBB154
+	.uleb128 0x4f
+	.4byte	0xe182
+	.4byte	.LLST20
+	.uleb128 0x7a
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+	.4byte	.LBE155-.LBB155
+	.uleb128 0x74
+	.4byte	0xe6d6
+	.uleb128 0x82
+	.4byte	0xaa29
+	.4byte	.LBB156
+	.4byte	.LBE156-.LBB156
+	.byte	0x2
+	.2byte	0x19b
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST21
+	.uleb128 0x7a
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+	.4byte	.LBE157-.LBB157
+	.uleb128 0x74
+	.4byte	0xaa44
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST22
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xaa5b
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+	.4byte	.LFE268-.LFB268
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe74e
+	.uleb128 0x8f
+	.4byte	0xaa67
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xaa29
+	.4byte	.LFB269
+	.4byte	.LFE269-.LFB269
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe77e
+	.uleb128 0x4f
+	.4byte	0xaa39
+	.4byte	.LLST76
+	.uleb128 0x73
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+	.4byte	.LLST77
+	.uleb128 0x73
+	.4byte	0xaa4f
+	.4byte	.LLST78
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xc6a1
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+	.4byte	.LFE246-.LFB246
+	.uleb128 0x1
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+	.4byte	0xe7d0
+	.uleb128 0x74
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+	.uleb128 0x73
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+	.uleb128 0x6a
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+	.uleb128 0x73
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+	.4byte	.LLST95
+	.uleb128 0x74
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+	.4byte	.LVL181
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.sleb128 0
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xa8c4
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+	.4byte	.LFE276-.LFB276
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xe7ff
+	.uleb128 0x4f
+	.4byte	0xa8d5
+	.4byte	.LLST100
+	.uleb128 0x45
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+	.4byte	0x1046f
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+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE278-.LFB278
+	.uleb128 0x1
+	.byte	0x9c
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+	.uleb128 0x8f
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+	.uleb128 0x1
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+	.uleb128 0x8f
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+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x7a
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+	.4byte	.LBE229-.LBB229
+	.uleb128 0x90
+	.4byte	0xa827
+	.uleb128 0x1
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+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE279-.LFB279
+	.uleb128 0x1
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+	.uleb128 0x8f
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+	.uleb128 0x1
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+	.uleb128 0x7a
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+	.4byte	.LBE232-.LBB232
+	.uleb128 0x8f
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+	.uleb128 0x1
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+	.uleb128 0x7a
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+	.uleb128 0x74
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+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE282-.LFB282
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+	.uleb128 0x1
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+	.uleb128 0x1
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+	.uleb128 0x8e
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+	.uleb128 0x92
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.uleb128 0x4f
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+	.uleb128 0x3
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+	.uleb128 0x2
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+	.uleb128 0x3
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+	.uleb128 0x1
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+	.uleb128 0x74
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+	.4byte	0xec68
+	.uleb128 0x74
+	.4byte	0xec71
+	.uleb128 0x44
+	.4byte	.LVL614
+	.4byte	0x103ff
+	.4byte	0xeccb
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR95
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x273
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL615
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL611
+	.4byte	0x858a
+	.uleb128 0x45
+	.4byte	.LVL612
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC9
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x7735
+	.4byte	.LFB358
+	.4byte	.LFE358-.LFB358
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xed45
+	.uleb128 0x4f
+	.4byte	0x7742
+	.4byte	.LLST239
+	.uleb128 0x91
+	.4byte	0x774e
+	.byte	0
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x208
+	.uleb128 0x4f
+	.4byte	0x7742
+	.4byte	.LLST240
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x208
+	.uleb128 0x74
+	.4byte	0xed23
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x7349
+	.4byte	.LFB363
+	.4byte	.LFE363-.LFB363
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xed80
+	.uleb128 0x4f
+	.4byte	0x7356
+	.4byte	.LLST241
+	.uleb128 0x4f
+	.4byte	0x7362
+	.4byte	.LLST242
+	.uleb128 0x4d
+	.4byte	.LVL642
+	.4byte	0xe618
+	.uleb128 0x93
+	.4byte	0x7362
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5f89
+	.4byte	.LFB385
+	.4byte	.LFE385-.LFB385
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xedba
+	.uleb128 0x4f
+	.4byte	0x5f9a
+	.4byte	.LLST258
+	.uleb128 0x7a
+	.4byte	.LBB291
+	.4byte	.LBE291-.LBB291
+	.uleb128 0x4f
+	.4byte	0x5f9a
+	.4byte	.LLST259
+	.uleb128 0x48
+	.4byte	.LVL691
+	.4byte	0x8565
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x54a7
+	.4byte	.LFB405
+	.4byte	.LFE405-.LFB405
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xede1
+	.uleb128 0x48
+	.4byte	.LVL741
+	.4byte	0x8958
+	.uleb128 0x48
+	.4byte	.LVL742
+	.4byte	0x5521
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xd651
+	.4byte	.LFB228
+	.4byte	.LFE228-.LFB228
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xeec1
+	.uleb128 0x4f
+	.4byte	0xd662
+	.4byte	.LLST360
+	.uleb128 0x4f
+	.4byte	0xd66e
+	.4byte	.LLST361
+	.uleb128 0x73
+	.4byte	0xd67a
+	.4byte	.LLST362
+	.uleb128 0x6f
+	.4byte	.LBB313
+	.4byte	.LBE313-.LBB313
+	.4byte	0xee61
+	.uleb128 0x4f
+	.4byte	0xd662
+	.4byte	.LLST363
+	.uleb128 0x4f
+	.4byte	0xd66e
+	.4byte	.LLST364
+	.uleb128 0x7a
+	.4byte	.LBB314
+	.4byte	.LBE314-.LBB314
+	.uleb128 0x74
+	.4byte	0xee07
+	.uleb128 0x44
+	.4byte	.LVL1092
+	.4byte	0xd8d7
+	.4byte	0xee50
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1093
+	.4byte	0xa968
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1084
+	.4byte	0xd8d7
+	.uleb128 0x48
+	.4byte	.LVL1085
+	.4byte	0xa968
+	.uleb128 0x44
+	.4byte	.LVL1086
+	.4byte	0xd687
+	.4byte	0xeea0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x2
+	.byte	0x7d
+	.sleb128 0
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1089
+	.4byte	0xdd4c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x51d3
+	.4byte	.LFB484
+	.4byte	.LFE484-.LFB484
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xeedf
+	.uleb128 0x4f
+	.4byte	0x51e3
+	.4byte	.LLST422
+	.byte	0
+	.uleb128 0x92
+	.4byte	0x4f61
+	.4byte	.LFB491
+	.4byte	.LFE491-.LFB491
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x8e
+	.4byte	0x4edc
+	.4byte	.LFB493
+	.4byte	.LFE493-.LFB493
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xef0d
+	.uleb128 0x49
+	.4byte	.LVL1406
+	.4byte	0xbed1
+	.byte	0
+	.uleb128 0x92
+	.4byte	0x4e77
+	.4byte	.LFB495
+	.4byte	.LFE495-.LFB495
+	.uleb128 0x1
+	.byte	0x9c
+	.uleb128 0x8e
+	.4byte	0xced6
+	.4byte	.LFB237
+	.4byte	.LFE237-.LFB237
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xef72
+	.uleb128 0x4f
+	.4byte	0xcee3
+	.4byte	.LLST472
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x3d0
+	.4byte	0xef60
+	.uleb128 0x4f
+	.4byte	0xcee3
+	.4byte	.LLST473
+	.uleb128 0x4d
+	.4byte	.LVL1551
+	.4byte	0x52a5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR20+4
+	.byte	0
+	.byte	0
+	.uleb128 0x4d
+	.4byte	.LVL1548
+	.4byte	0xcef0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xd1ee
+	.4byte	.LFB235
+	.4byte	.LFE235-.LFB235
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf079
+	.uleb128 0x4f
+	.4byte	0xd1ff
+	.4byte	.LLST526
+	.uleb128 0x91
+	.4byte	0xd20b
+	.byte	0
+	.uleb128 0x74
+	.4byte	0xd217
+	.uleb128 0x74
+	.4byte	0xd223
+	.uleb128 0x7a
+	.4byte	.LBB422
+	.4byte	.LBE422-.LBB422
+	.uleb128 0x4f
+	.4byte	0xd1ff
+	.4byte	.LLST527
+	.uleb128 0x7a
+	.4byte	.LBB423
+	.4byte	.LBE423-.LBB423
+	.uleb128 0x74
+	.4byte	0xef8f
+	.uleb128 0x90
+	.4byte	0xef96
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x90
+	.4byte	0xef9b
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x94
+	.4byte	0xd22f
+	.4byte	.LDL1
+	.uleb128 0x44
+	.4byte	.LVL1808
+	.4byte	0x530b
+	.4byte	0xefff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -80
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xa5
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x20
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1809
+	.4byte	0x530b
+	.4byte	0xf018
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x5a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x38
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1810
+	.4byte	0xac82
+	.4byte	0xf037
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1811
+	.4byte	0xae0d
+	.4byte	0xf05b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1813
+	.4byte	0xac82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -116
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x8c64
+	.4byte	.LFB320
+	.4byte	.LFE320-.LFB320
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf1bd
+	.uleb128 0x74
+	.4byte	0x8c74
+	.uleb128 0x91
+	.4byte	0x8c7d
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x8c88
+	.uleb128 0x91
+	.4byte	0x8c93
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x8ca5
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x4c8
+	.uleb128 0x73
+	.4byte	0xf08d
+	.4byte	.LLST539
+	.uleb128 0x74
+	.4byte	0xf092
+	.uleb128 0x73
+	.4byte	0xf099
+	.4byte	.LLST540
+	.uleb128 0x74
+	.4byte	0xf09e
+	.uleb128 0x95
+	.4byte	0x8c9e
+	.uleb128 0x74
+	.4byte	0xf0a5
+	.uleb128 0x44
+	.4byte	.LVL1876
+	.4byte	0x530b
+	.4byte	0xf0ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1879
+	.4byte	0x530b
+	.4byte	0xf109
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0xff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1881
+	.4byte	0x103ff
+	.4byte	0xf120
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1882
+	.4byte	0xae0d
+	.4byte	0xf143
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1883
+	.4byte	0xac82
+	.4byte	0xf15b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1884
+	.4byte	0xae0d
+	.4byte	0xf17e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1886
+	.4byte	0x103ff
+	.4byte	0xf195
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC32
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1887
+	.4byte	0x103ff
+	.4byte	0xf1b2
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC33
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1891
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+	.byte	0
+	.byte	0
+	.uleb128 0x96
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+	.4byte	.LFE386-.LFB386
+	.uleb128 0x1
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+	.4byte	0xf51b
+	.uleb128 0x4f
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+	.4byte	.LLST541
+	.uleb128 0x74
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+	.uleb128 0x74
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+	.uleb128 0x74
+	.4byte	0x5f24
+	.uleb128 0x74
+	.4byte	0x5f30
+	.uleb128 0x74
+	.4byte	0x5f3a
+	.uleb128 0x74
+	.4byte	0x5f46
+	.uleb128 0x91
+	.4byte	0x5f52
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x5f66
+	.uleb128 0x7a
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+	.uleb128 0x8b
+	.4byte	0x5f02
+	.uleb128 0x7a
+	.4byte	.LBB435
+	.4byte	.LBE435-.LBB435
+	.uleb128 0x73
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+	.4byte	.LLST542
+	.uleb128 0x74
+	.4byte	0xf1df
+	.uleb128 0x73
+	.4byte	0xf1e4
+	.4byte	.LLST543
+	.uleb128 0x73
+	.4byte	0xf1e9
+	.4byte	.LLST544
+	.uleb128 0x74
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+	.uleb128 0x73
+	.4byte	0xf1f3
+	.4byte	.LLST545
+	.uleb128 0x74
+	.4byte	0xf1f8
+	.uleb128 0x95
+	.4byte	0x5f5e
+	.uleb128 0x74
+	.4byte	0xf1ff
+	.uleb128 0x72
+	.4byte	0x7349
+	.4byte	.LBB436
+	.4byte	.Ldebug_ranges0+0x4e0
+	.byte	0x1
+	.2byte	0xb6e
+	.4byte	0xf299
+	.uleb128 0x4f
+	.4byte	0x7362
+	.4byte	.LLST546
+	.uleb128 0x4f
+	.4byte	0x7356
+	.4byte	.LLST547
+	.uleb128 0x45
+	.4byte	.LVL1934
+	.4byte	0xe618
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x93
+	.4byte	0x7362
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1896
+	.4byte	0x103ff
+	.4byte	0xf2c0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb2d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1897
+	.4byte	0x103ff
+	.4byte	0xf2e0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1905
+	.4byte	0x82fb
+	.4byte	0xf2f7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR87
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1907
+	.4byte	0x103ff
+	.4byte	0xf31e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb41
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1908
+	.4byte	0x103ff
+	.4byte	0xf33e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1909
+	.4byte	0x64a2
+	.4byte	0xf352
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1910
+	.4byte	0x103ff
+	.4byte	0xf379
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb4d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1911
+	.4byte	0x103ff
+	.4byte	0xf399
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1914
+	.4byte	0x103ff
+	.4byte	0xf3c0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb50
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1915
+	.4byte	0x103ff
+	.4byte	0xf3e0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1917
+	.4byte	0x103ff
+	.4byte	0xf407
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb5c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1918
+	.4byte	0x103ff
+	.4byte	0xf427
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1919
+	.4byte	0x103ff
+	.4byte	0xf44e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb63
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1920
+	.4byte	0x103ff
+	.4byte	0xf46e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1921
+	.4byte	0x7349
+	.4byte	0xf487
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1925
+	.4byte	0xac82
+	.4byte	0xf49b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1926
+	.4byte	0xac82
+	.4byte	0xf4af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1928
+	.4byte	0x602b
+	.4byte	0xf4c3
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1929
+	.4byte	0x8c64
+	.uleb128 0x48
+	.4byte	.LVL1938
+	.4byte	0x8dc2
+	.uleb128 0x44
+	.4byte	.LVL1942
+	.4byte	0x103ff
+	.4byte	0xf4fc
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR200
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xb9e
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1943
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x545d
+	.4byte	.LFB406
+	.4byte	.LFE406-.LFB406
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf5bb
+	.uleb128 0x4f
+	.4byte	0x546e
+	.4byte	.LLST548
+	.uleb128 0x74
+	.4byte	0x547a
+	.uleb128 0x74
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+	.uleb128 0x74
+	.4byte	0x5490
+	.uleb128 0x74
+	.4byte	0x549a
+	.uleb128 0x6a
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+	.uleb128 0x8b
+	.4byte	0x546e
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x4f8
+	.uleb128 0x73
+	.4byte	0xf538
+	.4byte	.LLST549
+	.uleb128 0x73
+	.4byte	0xf53d
+	.4byte	.LLST550
+	.uleb128 0x73
+	.4byte	0xf542
+	.4byte	.LLST551
+	.uleb128 0x74
+	.4byte	0xf547
+	.uleb128 0x48
+	.4byte	.LVL1947
+	.4byte	0x54a7
+	.uleb128 0x44
+	.4byte	.LVL1949
+	.4byte	0x89c8
+	.4byte	0xf599
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x7a
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1955
+	.4byte	0x8dc2
+	.4byte	0xf5af
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x94
+	.byte	0x2
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1956
+	.4byte	0x8c64
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5c12
+	.4byte	.LFB389
+	.4byte	.LFE389-.LFB389
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf6dc
+	.uleb128 0x4f
+	.4byte	0x5c23
+	.4byte	.LLST552
+	.uleb128 0x74
+	.4byte	0x5c2f
+	.uleb128 0x6f
+	.4byte	.LBB450
+	.4byte	.LBE450-.LBB450
+	.4byte	0xf6d2
+	.uleb128 0x4f
+	.4byte	0x5c23
+	.4byte	.LLST553
+	.uleb128 0x7a
+	.4byte	.LBB451
+	.4byte	.LBE451-.LBB451
+	.uleb128 0x74
+	.4byte	0xf5d8
+	.uleb128 0x44
+	.4byte	.LVL1966
+	.4byte	0x838c
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR82
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1967
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR203
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0xc0d
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1968
+	.4byte	0x103ff
+	.4byte	0xf665
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1969
+	.4byte	0x5f89
+	.4byte	0xf679
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL1970
+	.4byte	0x545d
+	.4byte	0xf68d
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
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+	.uleb128 0x44
+	.4byte	.LVL1971
+	.4byte	0x103ff
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR203
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
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+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL1972
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+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL1976
+	.4byte	0x8231
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x65df
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+	.4byte	.LFE373-.LFB373
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xf738
+	.uleb128 0x4f
+	.4byte	0x65ec
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+	.uleb128 0x74
+	.4byte	0x65f8
+	.uleb128 0x7a
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+	.4byte	.LBE454-.LBB454
+	.uleb128 0x4f
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+	.4byte	.LLST557
+	.uleb128 0x7a
+	.4byte	.LBB455
+	.4byte	.LBE455-.LBB455
+	.uleb128 0x73
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+	.4byte	.LLST558
+	.uleb128 0x94
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+	.uleb128 0x48
+	.4byte	.LVL1993
+	.4byte	0x5b4d
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+	.byte	0
+	.byte	0
+	.uleb128 0x8e
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+	.4byte	.LFE360-.LFB360
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+	.uleb128 0x6a
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+	.uleb128 0x74
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+	.uleb128 0x6f
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+	.4byte	.LBE461-.LBB461
+	.4byte	0xf7a7
+	.uleb128 0x73
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+	.4byte	0x52a5
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+	.uleb128 0x1
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+	.uleb128 0x2
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+	.4byte	.LVL2019
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+	.4byte	0xf7d8
+	.uleb128 0x43
+	.uleb128 0x1
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+	.uleb128 0x5
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+	.uleb128 0x2
+	.byte	0x8
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+	.4byte	.LVL2025
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+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
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+	.uleb128 0x1
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+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2029
+	.4byte	0x858a
+	.uleb128 0x44
+	.4byte	.LVL2030
+	.4byte	0xae0d
+	.4byte	0xf84d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2031
+	.4byte	0x103ff
+	.4byte	0xf874
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR207
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x4bd
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2032
+	.4byte	0x103ff
+	.4byte	0xf894
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2035
+	.4byte	0x103ff
+	.4byte	0xf8b1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC35
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2038
+	.4byte	0x8737
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x7d61
+	.4byte	.LFB350
+	.4byte	.LFE350-.LFB350
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfa5b
+	.uleb128 0x4f
+	.4byte	0x7d72
+	.4byte	.LLST592
+	.uleb128 0x4f
+	.4byte	0x7d7e
+	.4byte	.LLST593
+	.uleb128 0x4f
+	.4byte	0x7d8a
+	.4byte	.LLST594
+	.uleb128 0x74
+	.4byte	0x7d96
+	.uleb128 0x74
+	.4byte	0x7da2
+	.uleb128 0x91
+	.4byte	0x7dae
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x7dc2
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x530
+	.uleb128 0x8b
+	.4byte	0x7d8a
+	.uleb128 0x8b
+	.4byte	0x7d7e
+	.uleb128 0x8b
+	.4byte	0x7d72
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x530
+	.uleb128 0x73
+	.4byte	0xf8f7
+	.4byte	.LLST595
+	.uleb128 0x73
+	.4byte	0xf8fc
+	.4byte	.LLST596
+	.uleb128 0x74
+	.4byte	0xf901
+	.uleb128 0x95
+	.4byte	0x7dba
+	.uleb128 0x74
+	.4byte	0xf908
+	.uleb128 0x44
+	.4byte	.LVL2163
+	.4byte	0x7dd0
+	.4byte	0xf95f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2164
+	.4byte	0x103ff
+	.4byte	0xf986
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR211
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2fc
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2165
+	.4byte	0x103ff
+	.4byte	0xf9a6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2166
+	.4byte	0x103ff
+	.4byte	0xf9cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR211
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x2fd
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2167
+	.4byte	0x103ff
+	.4byte	0xf9ed
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2169
+	.4byte	0x530b
+	.4byte	0xfa05
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2172
+	.4byte	0xae0d
+	.4byte	0xfa28
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2174
+	.4byte	0x103ff
+	.4byte	0xfa3f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC38
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2175
+	.4byte	0x103ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC39
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x6367
+	.4byte	.LFB377
+	.4byte	.LFE377-.LFB377
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfa8d
+	.uleb128 0x4d
+	.4byte	.LVL2263
+	.4byte	0x78f1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR135
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x98a8
+	.4byte	.LFB303
+	.4byte	.LFE303-.LFB303
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfad0
+	.uleb128 0x48
+	.4byte	.LVL2338
+	.4byte	0x93da
+	.uleb128 0x48
+	.4byte	.LVL2339
+	.4byte	0x7c46
+	.uleb128 0x44
+	.4byte	.LVL2340
+	.4byte	0x7759
+	.4byte	0xfac6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2341
+	.4byte	0x75f4
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x736f
+	.4byte	.LFB362
+	.4byte	.LFE362-.LFB362
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfb28
+	.uleb128 0x44
+	.4byte	.LVL2368
+	.4byte	0x77b1
+	.4byte	0xfaf8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x8
+	.byte	0x40
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2369
+	.4byte	0x103ff
+	.4byte	0xfb18
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC43
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2370
+	.4byte	0x530b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5569
+	.4byte	.LFB401
+	.4byte	.LFE401-.LFB401
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfbc8
+	.uleb128 0x91
+	.4byte	0x557a
+	.byte	0
+	.uleb128 0x74
+	.4byte	0x5584
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x5f0
+	.4byte	0xfbb1
+	.uleb128 0x74
+	.4byte	0xfb3c
+	.uleb128 0x73
+	.4byte	0xfb43
+	.4byte	.LLST723
+	.uleb128 0x44
+	.4byte	.LVL2793
+	.4byte	0x5ade
+	.4byte	0xfb79
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2794
+	.4byte	0x57df
+	.4byte	0xfb8c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2796
+	.4byte	0x8dc2
+	.uleb128 0x48
+	.4byte	.LVL2797
+	.4byte	0x8c64
+	.uleb128 0x48
+	.4byte	.LVL2798
+	.4byte	0x5798
+	.uleb128 0x48
+	.4byte	.LVL2800
+	.4byte	0x59e7
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2792
+	.4byte	0xae0d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5616
+	.4byte	.LFB399
+	.4byte	.LFE399-.LFB399
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfc17
+	.uleb128 0x44
+	.4byte	.LVL2801
+	.4byte	0x561f
+	.4byte	0xfbf0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2802
+	.4byte	0x7653
+	.4byte	0xfc07
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL2803
+	.4byte	0x57df
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x60a3
+	.4byte	.LFB381
+	.4byte	.LFE381-.LFB381
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0xfd33
+	.uleb128 0x91
+	.4byte	0x60b4
+	.byte	0
+	.uleb128 0x6f
+	.4byte	.LBB524
+	.4byte	.LBE524-.LBB524
+	.4byte	0xfcc9
+	.uleb128 0x74
+	.4byte	0xfc2b
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x610
+	.4byte	0xfc57
+	.uleb128 0x73
+	.4byte	0x60bf
+	.4byte	.LLST724
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2823
+	.4byte	0x60cd
+	.4byte	0xfc6b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2824
+	.4byte	0x60cd
+	.4byte	0xfc7f
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2826
+	.4byte	0x7653
+	.4byte	0xfc96
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR124
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2827
+	.4byte	0x7653
+	.4byte	0xfcad
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR215
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2828
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2829
+	.4byte	0x75f4
+	.uleb128 0x48
+	.4byte	.LVL2830
+	.4byte	0x75f4
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2810
+	.4byte	0x87ee
+	.uleb128 0x48
+	.4byte	.LVL2811
+	.4byte	0x737c
+	.uleb128 0x48
+	.4byte	.LVL2812
+	.4byte	0x7111
+	.uleb128 0x48
+	.4byte	.LVL2813
+	.4byte	0x6e14
+	.uleb128 0x48
+	.4byte	.LVL2814
+	.4byte	0x6e95
+	.uleb128 0x48
+	.4byte	.LVL2815
+	.4byte	0x62f6
+	.uleb128 0x48
+	.4byte	.LVL2816
+	.4byte	0x736f
+	.uleb128 0x48
+	.4byte	.LVL2817
+	.4byte	0x86e8
+	.uleb128 0x48
+	.4byte	.LVL2818
+	.4byte	0x6370
+	.uleb128 0x48
+	.4byte	.LVL2819
+	.4byte	0x6558
+	.uleb128 0x45
+	.4byte	.LVL2820
+	.4byte	0x7735
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x5383
+	.4byte	.LFB407
+	.4byte	.LFE407-.LFB407
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x1004a
+	.uleb128 0x4f
+	.4byte	0x5394
+	.4byte	.LLST725
+	.uleb128 0x4f
+	.4byte	0x53a0
+	.4byte	.LLST726
+	.uleb128 0x91
+	.4byte	0x53ac
+	.byte	0x1
+	.uleb128 0x74
+	.4byte	0x53b8
+	.uleb128 0x74
+	.4byte	0x53c4
+	.uleb128 0x97
+	.4byte	0x53d0
+	.sleb128 -1
+	.uleb128 0x74
+	.4byte	0x53dc
+	.uleb128 0x74
+	.4byte	0x53e8
+	.uleb128 0x74
+	.4byte	0x53f4
+	.uleb128 0x74
+	.4byte	0x5400
+	.uleb128 0x74
+	.4byte	0x540c
+	.uleb128 0x74
+	.4byte	0x5418
+	.uleb128 0x74
+	.4byte	0x5434
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x628
+	.uleb128 0x4f
+	.4byte	0x53a0
+	.4byte	.LLST727
+	.uleb128 0x4f
+	.4byte	0x5394
+	.4byte	.LLST728
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x628
+	.uleb128 0x74
+	.4byte	0xfd59
+	.uleb128 0x73
+	.4byte	0xfd60
+	.4byte	.LLST729
+	.uleb128 0x90
+	.4byte	0xfd65
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x74
+	.4byte	0xfd6a
+	.uleb128 0x73
+	.4byte	0xfd71
+	.4byte	.LLST730
+	.uleb128 0x73
+	.4byte	0xfd76
+	.4byte	.LLST731
+	.uleb128 0x73
+	.4byte	0xfd7b
+	.4byte	.LLST732
+	.uleb128 0x73
+	.4byte	0xfd80
+	.4byte	.LLST733
+	.uleb128 0x73
+	.4byte	0xfd85
+	.4byte	.LLST734
+	.uleb128 0x73
+	.4byte	0xfd8a
+	.4byte	.LLST735
+	.uleb128 0x95
+	.4byte	0x5424
+	.uleb128 0x95
+	.4byte	0x542c
+	.uleb128 0x74
+	.4byte	0xfd8f
+	.uleb128 0x48
+	.4byte	.LVL2849
+	.4byte	0x5a5c
+	.uleb128 0x48
+	.4byte	.LVL2850
+	.4byte	0x731e
+	.uleb128 0x44
+	.4byte	.LVL2851
+	.4byte	0x64a2
+	.4byte	0xfe39
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2852
+	.4byte	0x82b0
+	.4byte	0xfe4d
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2857
+	.4byte	0x5a5c
+	.4byte	0xfe61
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2858
+	.4byte	0x5b4d
+	.4byte	0xfe75
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x9
+	.byte	0xff
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2859
+	.4byte	0x731e
+	.4byte	0xfe89
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2860
+	.4byte	0x103ff
+	.4byte	0xfeb0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x343
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2861
+	.4byte	0x103ff
+	.4byte	0xfed0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2862
+	.4byte	0x103ff
+	.4byte	0xfef7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x344
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2863
+	.4byte	0x103ff
+	.4byte	0xff17
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2864
+	.4byte	0x103ff
+	.4byte	0xff3e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x345
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2865
+	.4byte	0x103ff
+	.4byte	0xff5e
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2866
+	.4byte	0x64a2
+	.4byte	0xff72
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2878
+	.4byte	0xb17b
+	.4byte	0xff88
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x4
+	.byte	0x91
+	.sleb128 -68
+	.byte	0x6
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2887
+	.4byte	0x103ff
+	.4byte	0xffaf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LANCHOR238
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x3
+	.byte	0xa
+	.2byte	0x36c
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2888
+	.4byte	0x103ff
+	.4byte	0xffcf
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC7
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2889
+	.4byte	0x7a04
+	.4byte	0xffee
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x78
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x91
+	.sleb128 -36
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x30
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2891
+	.4byte	0x5591
+	.uleb128 0x44
+	.4byte	.LVL2892
+	.4byte	0x5a92
+	.4byte	0x10011
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x70
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x71
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2893
+	.4byte	0x5569
+	.uleb128 0x48
+	.4byte	.LVL2898
+	.4byte	0x5569
+	.uleb128 0x48
+	.4byte	.LVL2899
+	.4byte	0x5c12
+	.uleb128 0x48
+	.4byte	.LVL2900
+	.4byte	0x93da
+	.uleb128 0x48
+	.4byte	.LVL2901
+	.4byte	0x7c46
+	.uleb128 0x48
+	.4byte	.LVL2902
+	.4byte	0x75f4
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x98b5
+	.4byte	.LFB302
+	.4byte	.LFE302-.LFB302
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x10130
+	.uleb128 0x4f
+	.4byte	0x98c6
+	.4byte	.LLST736
+	.uleb128 0x74
+	.4byte	0x98d2
+	.uleb128 0x6f
+	.4byte	.LBB537
+	.4byte	.LBE537-.LBB537
+	.4byte	0x100b6
+	.uleb128 0x8b
+	.4byte	0x98c6
+	.uleb128 0x7a
+	.4byte	.LBB538
+	.4byte	.LBE538-.LBB538
+	.uleb128 0x74
+	.4byte	0x10067
+	.uleb128 0x7a
+	.4byte	.LBB539
+	.4byte	.LBE539-.LBB539
+	.uleb128 0x73
+	.4byte	0x98e0
+	.4byte	.LLST737
+	.uleb128 0x45
+	.4byte	.LVL2923
+	.4byte	0x5383
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2912
+	.4byte	0x103ff
+	.4byte	0x100d6
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC8
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC51
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL2913
+	.4byte	0x9f4a
+	.4byte	0x100ea
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL2914
+	.4byte	0x9d26
+	.uleb128 0x48
+	.4byte	.LVL2915
+	.4byte	0x9c76
+	.uleb128 0x48
+	.4byte	.LVL2916
+	.4byte	0x87ee
+	.uleb128 0x48
+	.4byte	.LVL2917
+	.4byte	0x8a5f
+	.uleb128 0x48
+	.4byte	.LVL2918
+	.4byte	0x103ff
+	.uleb128 0x48
+	.4byte	.LVL2920
+	.4byte	0x60a3
+	.uleb128 0x45
+	.4byte	.LVL2921
+	.4byte	0x5383
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0xac06
+	.4byte	.LFB264
+	.4byte	.LFE264-.LFB264
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x10238
+	.uleb128 0x4f
+	.4byte	0xac17
+	.4byte	.LLST779
+	.uleb128 0x4f
+	.4byte	0xac23
+	.4byte	.LLST780
+	.uleb128 0x4f
+	.4byte	0xac2f
+	.4byte	.LLST781
+	.uleb128 0x73
+	.4byte	0xac3b
+	.4byte	.LLST782
+	.uleb128 0x73
+	.4byte	0xac47
+	.4byte	.LLST783
+	.uleb128 0x73
+	.4byte	0xac53
+	.4byte	.LLST784
+	.uleb128 0x74
+	.4byte	0xac5f
+	.uleb128 0x90
+	.4byte	0xac69
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x73
+	.4byte	0xac75
+	.4byte	.LLST785
+	.uleb128 0x6b
+	.4byte	.Ldebug_ranges0+0x6a0
+	.4byte	0x1021c
+	.uleb128 0x4f
+	.4byte	0xac2f
+	.4byte	.LLST786
+	.uleb128 0x4f
+	.4byte	0xac23
+	.4byte	.LLST787
+	.uleb128 0x4f
+	.4byte	0xac17
+	.4byte	.LLST788
+	.uleb128 0x6a
+	.4byte	.Ldebug_ranges0+0x6a0
+	.uleb128 0x74
+	.4byte	0x1015f
+	.uleb128 0x74
+	.4byte	0x10168
+	.uleb128 0x74
+	.4byte	0x10171
+	.uleb128 0x73
+	.4byte	0x1017a
+	.4byte	.LLST789
+	.uleb128 0x74
+	.4byte	0x1017f
+	.uleb128 0x74
+	.4byte	0x10189
+	.uleb128 0x44
+	.4byte	.LVL3122
+	.4byte	0x52a5
+	.4byte	0x101f7
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x2
+	.byte	0x7b
+	.sleb128 0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3123
+	.4byte	0x4d68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x5
+	.byte	0x3
+	.4byte	.LC58
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x34
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x53
+	.uleb128 0x1
+	.byte	0x34
+	.byte	0
+	.byte	0
+	.byte	0
+	.uleb128 0x45
+	.4byte	.LVL3116
+	.4byte	0xb17b
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x3
+	.byte	0x91
+	.sleb128 -68
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.4byte	0x8a0f
+	.4byte	.LFB324
+	.4byte	.LFE324-.LFB324
+	.uleb128 0x1
+	.byte	0x9c
+	.4byte	0x103ff
+	.uleb128 0x74
+	.4byte	0x8a20
+	.uleb128 0x74
+	.4byte	0x8a2c
+	.uleb128 0x74
+	.4byte	0x8a38
+	.uleb128 0x74
+	.4byte	0x8a44
+	.uleb128 0x7a
+	.4byte	.LBB557
+	.4byte	.LBE557-.LBB557
+	.uleb128 0x73
+	.4byte	0x1024c
+	.4byte	.LLST794
+	.uleb128 0x73
+	.4byte	0x10251
+	.4byte	.LLST795
+	.uleb128 0x73
+	.4byte	0x10256
+	.4byte	.LLST796
+	.uleb128 0x73
+	.4byte	0x1025b
+	.4byte	.LLST797
+	.uleb128 0x95
+	.4byte	0x8a50
+	.uleb128 0x48
+	.4byte	.LVL3144
+	.4byte	0x8bc4
+	.uleb128 0x48
+	.4byte	.LVL3145
+	.4byte	0x8bf8
+	.uleb128 0x44
+	.4byte	.LVL3148
+	.4byte	0x8d5f
+	.4byte	0x102b9
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3149
+	.4byte	0xd1ee
+	.4byte	0x102cd
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3150
+	.4byte	0x8dc2
+	.4byte	0x102e1
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x75
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3156
+	.4byte	0xb17b
+	.4byte	0x102ff
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3157
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL3159
+	.4byte	0x8dc2
+	.4byte	0x1031c
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x76
+	.sleb128 0
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3161
+	.4byte	0xab78
+	.4byte	0x10330
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x2
+	.byte	0x77
+	.sleb128 0
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3162
+	.4byte	0x8cb3
+	.uleb128 0x48
+	.4byte	.LVL3164
+	.4byte	0x8d5f
+	.uleb128 0x44
+	.4byte	.LVL3165
+	.4byte	0x530b
+	.4byte	0x1035a
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x30
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x40
+	.byte	0
+	.uleb128 0x48
+	.4byte	.LVL3167
+	.4byte	0x52a5
+	.uleb128 0x44
+	.4byte	.LVL3168
+	.4byte	0xac82
+	.4byte	0x10381
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
+	.byte	0
+	.uleb128 0x44
+	.4byte	.LVL3169
+	.4byte	0xae0d
+	.4byte	0x103a4
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x50
+	.uleb128 0x2
+	.byte	0x74
+	.sleb128 0
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x51
+	.uleb128 0x1
+	.byte	0x31
+	.uleb128 0x43
+	.uleb128 0x1
+	.byte	0x52
+	.uleb128 0x1
+	.byte	0x31
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+	.section	.debug_abbrev,"",%progbits
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+	.byte	0
+	.byte	0
+	.uleb128 0x69
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6a
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x6b
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6c
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2116
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6d
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x6e
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x6f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x70
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x71
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x72
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x73
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x17
+	.byte	0
+	.byte	0
+	.uleb128 0x74
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x75
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x76
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x77
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x78
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x79
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x7a
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.byte	0
+	.byte	0
+	.uleb128 0x7b
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2116
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7c
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7d
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x7e
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x7f
+	.uleb128 0xb
+	.byte	0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x80
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x81
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x82
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x83
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x84
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.uleb128 0x49
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x85
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x86
+	.uleb128 0x1d
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x87
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x88
+	.uleb128 0x4109
+	.byte	0x1
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x2113
+	.uleb128 0x18
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x89
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8a
+	.uleb128 0x1d
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x52
+	.uleb128 0x1
+	.uleb128 0x55
+	.uleb128 0x17
+	.uleb128 0x58
+	.uleb128 0xb
+	.uleb128 0x59
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x8b
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8c
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x3
+	.uleb128 0x8
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.uleb128 0x8d
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.uleb128 0x27
+	.uleb128 0x19
+	.uleb128 0x20
+	.uleb128 0xb
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8e
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x8f
+	.uleb128 0x5
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x90
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x91
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x92
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2117
+	.uleb128 0x19
+	.byte	0
+	.byte	0
+	.uleb128 0x93
+	.uleb128 0x410a
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x2111
+	.uleb128 0x18
+	.byte	0
+	.byte	0
+	.uleb128 0x94
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.byte	0
+	.byte	0
+	.uleb128 0x95
+	.uleb128 0xa
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x96
+	.uleb128 0x2e
+	.byte	0x1
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x11
+	.uleb128 0x1
+	.uleb128 0x12
+	.uleb128 0x6
+	.uleb128 0x40
+	.uleb128 0x18
+	.uleb128 0x2116
+	.uleb128 0x19
+	.uleb128 0x1
+	.uleb128 0x13
+	.byte	0
+	.byte	0
+	.uleb128 0x97
+	.uleb128 0x34
+	.byte	0
+	.uleb128 0x31
+	.uleb128 0x13
+	.uleb128 0x1c
+	.uleb128 0xd
+	.byte	0
+	.byte	0
+	.uleb128 0x98
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0xb
+	.byte	0
+	.byte	0
+	.uleb128 0x99
+	.uleb128 0x2e
+	.byte	0
+	.uleb128 0x3f
+	.uleb128 0x19
+	.uleb128 0x3c
+	.uleb128 0x19
+	.uleb128 0x6e
+	.uleb128 0xe
+	.uleb128 0x3
+	.uleb128 0xe
+	.uleb128 0x3a
+	.uleb128 0xb
+	.uleb128 0x3b
+	.uleb128 0x5
+	.byte	0
+	.byte	0
+	.byte	0
+	.section	.debug_loc,"",%progbits
+.Ldebug_loc0:
+.LLST443:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST444:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST445:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST446:
+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x2
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+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
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+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1408
+	.4byte	.LVL1409
+	.2byte	0x1
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+	.4byte	.LVL1410
+	.4byte	.LVL1412
+	.2byte	0x1
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+	.4byte	.LVL1412
+	.4byte	.LVL1413
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1413
+	.4byte	.LVL1414
+	.2byte	0x1
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+	.4byte	.LVL1414
+	.4byte	.LVL1415
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1415
+	.4byte	.LFE496
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
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+	.4byte	.LVL1408
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+	.2byte	0x1
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+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
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+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
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+	.2byte	0x1
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+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
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+	.4byte	0
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+	.4byte	.LVL1407
+	.4byte	.LVL1408
+	.2byte	0x1
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+	.2byte	0x1
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+	.4byte	.LVL1409
+	.4byte	.LVL1410
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1410
+	.4byte	.LFE496
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL2925
+	.4byte	.LVL2926-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2926-1
+	.4byte	.LFE492
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL2926
+	.4byte	.LVL2927
+	.2byte	0x1
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+	.4byte	.LVL2927
+	.4byte	.LVL2930
+	.2byte	0x1
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+	.4byte	.LVL2930
+	.4byte	.LFE492
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1401
+	.4byte	.LVL1404
+	.2byte	0x1
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+	.4byte	.LVL1404
+	.4byte	.LVL1405-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1405-1
+	.4byte	.LFE490
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1401
+	.4byte	.LVL1402
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1402
+	.4byte	.LFE490
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1401
+	.4byte	.LVL1403
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1403
+	.4byte	.LVL1405-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1405-1
+	.4byte	.LFE490
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1396
+	.4byte	.LVL1399
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1399
+	.4byte	.LVL1400-1
+	.2byte	0x1
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+	.4byte	.LVL1400-1
+	.4byte	.LFE489
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1396
+	.4byte	.LVL1397
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1397
+	.4byte	.LFE489
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1396
+	.4byte	.LVL1398
+	.2byte	0x1
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+	.4byte	.LVL1398
+	.4byte	.LVL1400-1
+	.2byte	0x1
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+	.4byte	.LVL1400-1
+	.4byte	.LFE489
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
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+	.4byte	0
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+	.4byte	.LVL1392
+	.4byte	.LVL1394
+	.2byte	0x1
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+	.4byte	.LVL1395-1
+	.2byte	0x4
+	.byte	0x71
+	.sleb128 -256
+	.byte	0x9f
+	.4byte	.LVL1395-1
+	.4byte	.LFE488
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
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+	.4byte	.LVL1392
+	.4byte	.LVL1393
+	.2byte	0x1
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+	.4byte	.LVL1393
+	.4byte	.LVL1395-1
+	.2byte	0x1
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+	.4byte	.LFE488
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
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+	.4byte	.LVL1386
+	.4byte	.LVL1388
+	.2byte	0x1
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+	.4byte	.LVL1390
+	.2byte	0x1
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+	.4byte	.LVL1390
+	.4byte	.LVL1391-1
+	.2byte	0x4
+	.byte	0x71
+	.sleb128 -256
+	.byte	0x9f
+	.4byte	.LVL1391-1
+	.4byte	.LFE487
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
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+	.4byte	.LVL1386
+	.4byte	.LVL1387
+	.2byte	0x1
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+	.4byte	.LVL1387
+	.4byte	.LVL1390
+	.2byte	0x1
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+	.4byte	.LVL1391-1
+	.2byte	0x1
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+	.4byte	.LFE487
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
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+	.4byte	0
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+	.4byte	.LVL1384
+	.4byte	.LVL1385-1
+	.2byte	0x1
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+	.4byte	.LVL1385-1
+	.4byte	.LFE486
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
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+	.4byte	.LVL1384
+	.4byte	.LVL1385-1
+	.2byte	0x1
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+	.4byte	.LVL1385-1
+	.4byte	.LFE486
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
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+	.4byte	0
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+	.4byte	.LVL1305
+	.4byte	.LVL1306-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1306-1
+	.4byte	.LFE485
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+	.byte	0xf3
+	.uleb128 0x1
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+	.4byte	0
+	.4byte	0
+.LLST419:
+	.4byte	.LVL1301
+	.4byte	.LVL1302-1
+	.2byte	0x1
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+	.4byte	.LVL1302-1
+	.4byte	.LFE483
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1301
+	.4byte	.LVL1302-1
+	.2byte	0x1
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+	.4byte	.LVL1302-1
+	.4byte	.LFE483
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
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+	.4byte	.LVL1301
+	.4byte	.LVL1302-1
+	.2byte	0x1
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+	.4byte	.LVL1302-1
+	.4byte	.LFE483
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
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+	.4byte	.LVL914
+	.4byte	.LVL915
+	.2byte	0x2
+	.byte	0x30
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+	.4byte	.LFE482
+	.2byte	0x1
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+	.4byte	0
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+	.4byte	.LVL899
+	.4byte	.LVL900-1
+	.2byte	0x1
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+	.4byte	.LVL900-1
+	.4byte	.LFE481
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
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+	.4byte	.LVL899
+	.4byte	.LVL900-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL900-1
+	.4byte	.LFE481
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.4byte	0
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+	.4byte	.LVL899
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+	.2byte	0x1
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+	.4byte	.LFE481
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.4byte	.LVL743
+	.4byte	.LVL744-1
+	.2byte	0x1
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+	.4byte	.LVL744-1
+	.4byte	.LFE480
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.4byte	.LVL743
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+	.2byte	0x1
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+	.4byte	.LVL744-1
+	.4byte	.LFE480
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
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+	.4byte	.LVL743
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+	.2byte	0x1
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+	.4byte	.LVL744-1
+	.4byte	.LFE480
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
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+	.4byte	.LVL730
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+	.2byte	0x1
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+	.4byte	.LFE404
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
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+	.4byte	.LVL734
+	.4byte	.LVL736
+	.2byte	0x2
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+	.2byte	0x1
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+	.4byte	.LVL738
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+	.4byte	.LVL739
+	.2byte	0x1
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+	.4byte	.LVL739
+	.4byte	.LVL740
+	.2byte	0x1
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+	.4byte	0
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+	.4byte	.LVL732
+	.4byte	.LVL735
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL727
+	.4byte	.LVL728
+	.2byte	0x1
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL729
+	.4byte	.LFE403
+	.2byte	0x1
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+	.4byte	0
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+	.4byte	.LVL2708
+	.4byte	.LVL2710-1
+	.2byte	0x1
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+	.2byte	0x1
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+	.2byte	0x1
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+	.4byte	.LFE398
+	.2byte	0x1
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+	.4byte	0
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+	.4byte	.LVL2708
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+	.2byte	0x1
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+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
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+	.2byte	0x1
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+	.4byte	.LFE398
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
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+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL2722
+	.4byte	.LVL2723
+	.2byte	0x1
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+	.4byte	.LVL2723
+	.4byte	.LVL2724
+	.2byte	0x5
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	0
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+	.4byte	.LVL2716
+	.4byte	.LVL2717
+	.2byte	0x2
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+	.4byte	.LVL2725
+	.2byte	0x1
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+	.4byte	.LVL2726
+	.4byte	.LVL2735
+	.2byte	0x1
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+	.4byte	.LFE398
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL2718
+	.4byte	.LVL2721
+	.2byte	0x1
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+	.4byte	.LVL2732
+	.2byte	0x1
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+	.4byte	.LVL2740
+	.4byte	.LFE398
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL2716
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+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2717
+	.4byte	.LVL2718-1
+	.2byte	0x1
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+	.4byte	.LVL2727
+	.2byte	0x1
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+	.4byte	.LVL2727
+	.4byte	.LVL2728
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL2715
+	.4byte	.LVL2718
+	.2byte	0x2
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+	.2byte	0x2
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+	.2byte	0x1
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+	.4byte	.LVL2739
+	.2byte	0x1
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+	.4byte	.LVL2742
+	.2byte	0x1
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+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL2709
+	.4byte	.LVL2719
+	.2byte	0x1
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+	.4byte	.LVL2746
+	.2byte	0x1
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+	.4byte	.LVL2748
+	.4byte	.LFE398
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST714:
+	.4byte	.LVL2730
+	.4byte	.LVL2731-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2731-1
+	.4byte	.LVL2735
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2738
+	.4byte	.LVL2740-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2740-1
+	.4byte	.LVL2741
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2741
+	.4byte	.LVL2743
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2743
+	.4byte	.LFE398
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST715:
+	.4byte	.LVL2708
+	.4byte	.LVL2714
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST716:
+	.4byte	.LVL2708
+	.4byte	.LVL2714
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST717:
+	.4byte	.LVL2733
+	.4byte	.LVL2734
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2734
+	.4byte	.LVL2735
+	.2byte	0x5
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0xc
+	.4byte	.LVL2738
+	.4byte	.LVL2740-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST718:
+	.4byte	.LVL2750
+	.4byte	.LVL2751
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2751
+	.4byte	.LVL2752
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2752
+	.4byte	.LVL2753
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2753
+	.4byte	.LFE396
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST719:
+	.4byte	.LVL2760
+	.4byte	.LVL2764
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2764
+	.4byte	.LVL2768
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2771
+	.4byte	.LVL2780
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2780
+	.4byte	.LVL2781
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2782
+	.4byte	.LFE396
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST720:
+	.4byte	.LVL2754
+	.4byte	.LVL2759
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2777
+	.4byte	.LVL2779
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST721:
+	.4byte	.LVL2750
+	.4byte	.LVL2751
+	.2byte	0xc
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2752
+	.4byte	.LVL2755-1
+	.2byte	0xc
+	.byte	0x3
+	.4byte	c_ftl_nand_page_pre_blk
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST722:
+	.4byte	.LVL2772
+	.4byte	.LVL2783
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST267:
+	.4byte	.LVL719
+	.4byte	.LVL720
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL720
+	.4byte	.LVL726
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL726
+	.4byte	.LFE395
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST268:
+	.4byte	.LVL719
+	.4byte	.LVL721-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL721-1
+	.4byte	.LVL726
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL726
+	.4byte	.LFE395
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST269:
+	.4byte	.LVL719
+	.4byte	.LVL721-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL721-1
+	.4byte	.LVL726
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL726
+	.4byte	.LFE395
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 8
+	.4byte	0
+	.4byte	0
+.LLST270:
+	.4byte	.LVL721
+	.4byte	.LVL725
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST271:
+	.4byte	.LVL721
+	.4byte	.LVL722
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL723
+	.4byte	.LVL724
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST265:
+	.4byte	.LVL714
+	.4byte	.LVL716
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL716
+	.4byte	.LVL717
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL717
+	.4byte	.LVL718
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL718
+	.4byte	.LFE394
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST266:
+	.4byte	.LVL714
+	.4byte	.LVL715
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST263:
+	.4byte	.LVL710
+	.4byte	.LVL711
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST264:
+	.4byte	.LVL708
+	.4byte	.LVL709
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL709
+	.4byte	.LVL712
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL712
+	.4byte	.LVL713
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST261:
+	.4byte	.LVL702
+	.4byte	.LVL703
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST262:
+	.4byte	.LVL700
+	.4byte	.LVL701
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL701
+	.4byte	.LVL704
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL704
+	.4byte	.LVL705
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL706
+	.4byte	.LVL707
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL707
+	.4byte	.LFE392
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST260:
+	.4byte	.LVL692
+	.4byte	.LVL693
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL693
+	.4byte	.LVL694
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL694
+	.4byte	.LVL695
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL696
+	.4byte	.LVL697
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL697
+	.4byte	.LVL698
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL699
+	.4byte	.LFE391
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST554:
+	.4byte	.LVL1977
+	.4byte	.LVL1978
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1978
+	.4byte	.LVL1985
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1985
+	.4byte	.LVL1986
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1986
+	.4byte	.LFE390
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST555:
+	.4byte	.LVL1977
+	.4byte	.LVL1980
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1981
+	.4byte	.LVL1982
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1985
+	.4byte	.LVL1988
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1988
+	.4byte	.LFE390
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST559:
+	.4byte	.LVL1999
+	.4byte	.LVL2000
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2000
+	.4byte	.LVL2015
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2015
+	.4byte	.LFE388
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST560:
+	.4byte	.LVL2007
+	.4byte	.LVL2008-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2009
+	.4byte	.LVL2011
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST561:
+	.4byte	.LVL1999
+	.4byte	.LVL2010
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2010
+	.4byte	.LVL2015
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2015
+	.4byte	.LFE388
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST624:
+	.4byte	.LVL2273
+	.4byte	.LVL2275
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2275
+	.4byte	.LFE387
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST254:
+	.4byte	.LVL681
+	.4byte	.LVL682
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL682
+	.4byte	.LVL685
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL686
+	.4byte	.LVL688
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL688
+	.4byte	.LFE384
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST255:
+	.4byte	.LVL681
+	.4byte	.LVL685
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL685
+	.4byte	.LVL686
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL686
+	.4byte	.LVL688
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL688
+	.4byte	.LFE384
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST256:
+	.4byte	.LVL683
+	.4byte	.LVL687
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST257:
+	.4byte	.LVL683
+	.4byte	.LVL684
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST253:
+	.4byte	.LVL679
+	.4byte	.LVL680
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL680
+	.4byte	.LFE383
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST249:
+	.4byte	.LVL668
+	.4byte	.LVL669
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL669
+	.4byte	.LFE382
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST250:
+	.4byte	.LVL668
+	.4byte	.LVL669
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL669
+	.4byte	.LVL676
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL676
+	.4byte	.LVL677
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL678
+	.4byte	.LFE382
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST251:
+	.4byte	.LVL673
+	.4byte	.LVL674-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST252:
+	.4byte	.LVL668
+	.4byte	.LVL669
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL669
+	.4byte	.LVL670
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL670
+	.4byte	.LVL671
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL671
+	.4byte	.LVL672
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	.LVL672
+	.4byte	.LVL675
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL676
+	.4byte	.LFE382
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST564:
+	.4byte	.LVL2039
+	.4byte	.LVL2042
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2042
+	.4byte	.LVL2046
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2047
+	.4byte	.LFE380
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST565:
+	.4byte	.LVL2049
+	.4byte	.LVL2050
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST566:
+	.4byte	.LVL2039
+	.4byte	.LVL2041
+	.2byte	0x2
+	.byte	0x3c
+	.byte	0x9f
+	.4byte	.LVL2042
+	.4byte	.LVL2043
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2043
+	.4byte	.LVL2044
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2044
+	.4byte	.LVL2045
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.2byte	0x2
+	.byte	0x3c
+	.byte	0x9f
+	.4byte	.LVL2047
+	.4byte	.LFE380
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST567:
+	.4byte	.LVL2039
+	.4byte	.LVL2040
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2040
+	.4byte	.LVL2041
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL2046
+	.4byte	.LVL2047
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST740:
+	.4byte	.LVL2931
+	.4byte	.LVL2938
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x1000
+	.byte	0x9f
+	.4byte	.LVL2938
+	.4byte	.LVL2939
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL2939
+	.4byte	.LVL2940
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2940
+	.4byte	.LVL2942
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST741:
+	.4byte	.LVL2932
+	.4byte	.LVL2951
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2952
+	.4byte	.LFE379
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST742:
+	.4byte	.LVL2944
+	.4byte	.LVL2950
+	.2byte	0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x9f
+	.4byte	.LVL2952
+	.4byte	.LFE379
+	.2byte	0x4
+	.byte	0x91
+	.sleb128 -80
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST743:
+	.4byte	.LVL2945
+	.4byte	.LVL2946
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2946
+	.4byte	.LVL2947
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2952
+	.4byte	.LVL2958
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2958
+	.4byte	.LVL2959
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST744:
+	.4byte	.LVL2953
+	.4byte	.LVL2955
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2955
+	.4byte	.LVL2957
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST745:
+	.4byte	.LVL2945
+	.4byte	.LVL2946
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2946
+	.4byte	.LVL2950
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2952
+	.4byte	.LVL2954
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2956
+	.4byte	.LFE379
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST298:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL869
+	.4byte	.LVL884
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL884
+	.4byte	.LVL885
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL885
+	.4byte	.LVL886
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL886
+	.4byte	.LVL895
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST299:
+	.4byte	.LVL870
+	.4byte	.LVL871
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL871
+	.4byte	.LVL872
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL876
+	.4byte	.LVL877
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL877
+	.4byte	.LVL878
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL878
+	.4byte	.LVL879
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL886
+	.4byte	.LVL887
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST300:
+	.4byte	.LVL873
+	.4byte	.LVL874-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST301:
+	.4byte	.LVL870
+	.4byte	.LVL875
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL876
+	.4byte	.LVL891
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST302:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL869
+	.4byte	.LVL888
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL889
+	.4byte	.LVL892
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL892
+	.4byte	.LVL893-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_data_superblocks
+	.4byte	0
+	.4byte	0
+.LLST303:
+	.4byte	.LVL867
+	.4byte	.LVL868
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL869
+	.4byte	.LVL882
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL883
+	.4byte	.LVL895
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST247:
+	.4byte	.LVL657
+	.4byte	.LVL658
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL658
+	.4byte	.LFE375
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST248:
+	.4byte	.LVL661
+	.4byte	.LVL666
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL666
+	.4byte	.LVL667
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST678:
+	.4byte	.LVL2548
+	.4byte	.LVL2551
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2551
+	.4byte	.LVL2553
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2553
+	.4byte	.LVL2554
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2554
+	.4byte	.LFE372
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST679:
+	.4byte	.LVL2549
+	.4byte	.LVL2552
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2553
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST680:
+	.4byte	.LVL2550
+	.4byte	.LVL2552
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL2553
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST681:
+	.4byte	.LVL2553
+	.4byte	.LVL2554
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2555
+	.4byte	.LVL2558
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2559
+	.4byte	.LVL2560
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2560
+	.4byte	.LVL2562
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2575
+	.4byte	.LVL2577
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2577
+	.4byte	.LVL2581
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2582
+	.4byte	.LVL2587
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2587
+	.4byte	.LVL2593
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2593
+	.4byte	.LVL2594
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2595
+	.4byte	.LVL2596
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2615
+	.4byte	.LVL2620
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2620
+	.4byte	.LVL2621
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2621
+	.4byte	.LVL2622-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2633
+	.4byte	.LVL2634
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2634
+	.4byte	.LVL2635
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2635
+	.4byte	.LVL2636-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2641
+	.4byte	.LVL2642
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2642
+	.4byte	.LVL2644
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2646
+	.4byte	.LVL2650
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2650
+	.4byte	.LVL2651
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST682:
+	.4byte	.LVL2632
+	.4byte	.LVL2633
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL2653
+	.4byte	.LVL2656
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2659
+	.4byte	.LVL2662
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2703
+	.4byte	.LVL2704
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST683:
+	.4byte	.LVL2612
+	.4byte	.LVL2614
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2614
+	.4byte	.LVL2624
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2625
+	.4byte	.LVL2631
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2632
+	.4byte	.LVL2633
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2633
+	.4byte	.LVL2639
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL2640
+	.4byte	.LVL2645
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2646
+	.4byte	.LFE372
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST684:
+	.4byte	.LVL2571
+	.4byte	.LVL2575
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL2607
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST685:
+	.4byte	.LVL2568
+	.4byte	.LVL2575
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL2601
+	.4byte	.LVL2603
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL2607
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST686:
+	.4byte	.LVL2554
+	.4byte	.LVL2556-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2575
+	.4byte	.LVL2578-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2588
+	.4byte	.LVL2589
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2589
+	.4byte	.LVL2590
+	.2byte	0x5
+	.byte	0x7d
+	.sleb128 0
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL2616
+	.4byte	.LVL2618
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2618
+	.4byte	.LVL2620
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -72
+	.byte	0x6
+	.byte	0x32
+	.byte	0x1c
+	.4byte	.LVL2643
+	.4byte	.LVL2645
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2647
+	.4byte	.LVL2648
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2648
+	.4byte	.LVL2649
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 -2
+	.4byte	0
+	.4byte	0
+.LLST687:
+	.4byte	.LVL2557
+	.4byte	.LVL2558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2558
+	.4byte	.LVL2566
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2566
+	.4byte	.LVL2569
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2579
+	.4byte	.LVL2580
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2580
+	.4byte	.LVL2582
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2587
+	.4byte	.LVL2607
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST688:
+	.4byte	.LVL2557
+	.4byte	.LVL2558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2558
+	.4byte	.LVL2573
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2579
+	.4byte	.LVL2580
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2580
+	.4byte	.LVL2582
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2587
+	.4byte	.LVL2610
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST689:
+	.4byte	.LVL2559
+	.4byte	.LVL2573
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2587
+	.4byte	.LVL2591
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2592
+	.4byte	.LVL2611
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2615
+	.4byte	.LVL2617
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2619
+	.4byte	.LVL2623
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2633
+	.4byte	.LVL2634
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2634
+	.4byte	.LVL2645
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL2646
+	.4byte	.LFE372
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	0
+	.4byte	0
+.LLST690:
+	.4byte	.LVL2565
+	.4byte	.LVL2567
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2567
+	.4byte	.LVL2569
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2596
+	.4byte	.LVL2597
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2597
+	.4byte	.LVL2602
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2603
+	.4byte	.LVL2605
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2605
+	.4byte	.LVL2606
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST691:
+	.4byte	.LVL2622
+	.4byte	.LVL2623
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2636
+	.4byte	.LVL2637
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2638
+	.4byte	.LVL2645
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL2652
+	.4byte	.LVL2658
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL2658
+	.4byte	.LVL2659
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -60
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL2659
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST692:
+	.4byte	.LVL2666
+	.4byte	.LVL2675
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2679
+	.4byte	.LVL2701
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST693:
+	.4byte	.LVL2654
+	.4byte	.LVL2657
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2659
+	.4byte	.LVL2675
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2675
+	.4byte	.LVL2676
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2679
+	.4byte	.LVL2701
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2703
+	.4byte	.LVL2707
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST694:
+	.4byte	.LVL2654
+	.4byte	.LVL2657
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2659
+	.4byte	.LVL2673
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2679
+	.4byte	.LVL2693
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2693
+	.4byte	.LVL2695
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2703
+	.4byte	.LVL2707
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST695:
+	.4byte	.LVL2564
+	.4byte	.LVL2575
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2596
+	.4byte	.LVL2660
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2660
+	.4byte	.LVL2661
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2661
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST696:
+	.4byte	.LVL2548
+	.4byte	.LVL2551
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2553
+	.4byte	.LVL2564
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2575
+	.4byte	.LVL2596
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2604
+	.4byte	.LVL2605
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2609
+	.4byte	.LVL2631
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST697:
+	.4byte	.LVL2598
+	.4byte	.LVL2600
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2626
+	.4byte	.LVL2627
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2627
+	.4byte	.LVL2629
+	.2byte	0x2
+	.byte	0x73
+	.sleb128 12
+	.4byte	.LVL2655
+	.4byte	.LVL2656
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2659
+	.4byte	.LVL2669
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2670
+	.4byte	.LVL2673
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2681
+	.4byte	.LVL2692
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2696
+	.4byte	.LVL2701
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST698:
+	.4byte	.LVL2548
+	.4byte	.LVL2551
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2553
+	.4byte	.LVL2561
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2561
+	.4byte	.LVL2563-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2563-1
+	.4byte	.LVL2575
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL2575
+	.4byte	.LVL2596
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2596
+	.4byte	.LFE372
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	0
+	.4byte	0
+.LLST699:
+	.4byte	.LVL2608
+	.4byte	.LVL2614
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2628
+	.4byte	.LVL2630
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST700:
+	.4byte	.LVL2608
+	.4byte	.LVL2614
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL2614
+	.4byte	.LVL2631
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST701:
+	.4byte	.LVL2612
+	.4byte	.LVL2613
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2613
+	.4byte	.LVL2614
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_recovery_page_min_ver
+	.4byte	.LVL2614
+	.4byte	.LVL2631
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL2645
+	.4byte	.LVL2646
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST702:
+	.4byte	.LVL2671
+	.4byte	.LVL2672
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	.LVL2681
+	.4byte	.LVL2682-1
+	.2byte	0x2
+	.byte	0x76
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST703:
+	.4byte	.LVL2686
+	.4byte	.LVL2689
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2689
+	.4byte	.LVL2690
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST704:
+	.4byte	.LVL2694
+	.4byte	.LVL2701
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST705:
+	.4byte	.LVL2697
+	.4byte	.LVL2698-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 4
+	.4byte	.LVL2698-1
+	.4byte	.LVL2699
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST608:
+	.4byte	.LVL2221
+	.4byte	.LVL2222
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2222
+	.4byte	.LVL2239
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2239
+	.4byte	.LFE371
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST609:
+	.4byte	.LVL2221
+	.4byte	.LVL2223-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST610:
+	.4byte	.LVL2224
+	.4byte	.LVL2225
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST611:
+	.4byte	.LVL2227
+	.4byte	.LVL2229-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2234
+	.4byte	.LVL2236
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2236
+	.4byte	.LVL2237
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST612:
+	.4byte	.LVL2227
+	.4byte	.LVL2233
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2234
+	.4byte	.LVL2235
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST613:
+	.4byte	.LVL2226
+	.4byte	.LVL2228
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2228
+	.4byte	.LVL2229-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	g_num_free_superblocks
+	.4byte	.LVL2234
+	.4byte	.LVL2237
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST244:
+	.4byte	.LVL647
+	.4byte	.LVL650
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL650
+	.4byte	.LVL652
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL652
+	.4byte	.LVL655
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL655
+	.4byte	.LFE370
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST245:
+	.4byte	.LVL647
+	.4byte	.LVL649
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL649
+	.4byte	.LFE370
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST246:
+	.4byte	.LVL648
+	.4byte	.LVL651
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL651
+	.4byte	.LVL652
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL652
+	.4byte	.LVL653
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL654
+	.4byte	.LVL655
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL655
+	.4byte	.LVL656
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST297:
+	.4byte	.LVL852
+	.4byte	.LVL853
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL853
+	.4byte	.LVL854
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL854
+	.4byte	.LVL855
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL856
+	.4byte	.LVL857
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL858
+	.4byte	.LFE368
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	0
+	.4byte	0
+.LLST665:
+	.4byte	.LVL2483
+	.4byte	.LVL2490
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2490
+	.4byte	.LFE366
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST666:
+	.4byte	.LVL2495
+	.4byte	.LVL2498
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2498
+	.4byte	.LVL2499
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 0
+	.4byte	.LVL2514
+	.4byte	.LVL2516
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2516
+	.4byte	.LVL2521
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2521
+	.4byte	.LVL2523
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2523
+	.4byte	.LVL2524
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2525
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2537
+	.4byte	.LVL2538-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2541
+	.4byte	.LVL2542
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST667:
+	.4byte	.LVL2500
+	.4byte	.LVL2501
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2508
+	.4byte	.LVL2509
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2509
+	.4byte	.LVL2511
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2511
+	.4byte	.LVL2512
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2513
+	.4byte	.LVL2514
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2517
+	.4byte	.LVL2519
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2519
+	.4byte	.LVL2520
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2522
+	.4byte	.LVL2523
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2525
+	.4byte	.LVL2526
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2526
+	.4byte	.LVL2527
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2527
+	.4byte	.LVL2528
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST668:
+	.4byte	.LVL2497
+	.4byte	.LVL2501
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2508
+	.4byte	.LVL2514
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST669:
+	.4byte	.LVL2526
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST670:
+	.4byte	.LVL2484
+	.4byte	.LVL2485
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2485
+	.4byte	.LVL2490
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL2490
+	.4byte	.LVL2492-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2492-1
+	.4byte	.LVL2502
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2508
+	.4byte	.LVL2529
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST671:
+	.4byte	.LVL2486
+	.4byte	.LVL2487
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2487
+	.4byte	.LVL2490
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL2490
+	.4byte	.LVL2492-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 12
+	.4byte	.LVL2492-1
+	.4byte	.LFE366
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST672:
+	.4byte	.LVL2488
+	.4byte	.LVL2489
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2489
+	.4byte	.LVL2490
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 16
+	.4byte	.LVL2490
+	.4byte	.LVL2492-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 16
+	.4byte	.LVL2492-1
+	.4byte	.LFE366
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST673:
+	.4byte	.LVL2488
+	.4byte	.LVL2502
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL2508
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST674:
+	.4byte	.LVL2493
+	.4byte	.LVL2502
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2508
+	.4byte	.LVL2529
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2530
+	.4byte	.LVL2534
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2539
+	.4byte	.LVL2541
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST675:
+	.4byte	.LVL2502
+	.4byte	.LVL2503
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2529
+	.4byte	.LFE366
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST676:
+	.4byte	.LVL2531
+	.4byte	.LVL2532
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2532
+	.4byte	.LVL2533
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2539
+	.4byte	.LVL2540-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2540-1
+	.4byte	.LVL2541
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST677:
+	.4byte	.LVL2536
+	.4byte	.LVL2538-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2541
+	.4byte	.LVL2543
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST663:
+	.4byte	.LVL2460
+	.4byte	.LVL2474
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2479
+	.4byte	.LVL2481
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2482
+	.4byte	.LFE365
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST664:
+	.4byte	.LVL2468
+	.4byte	.LVL2469
+	.2byte	0x12
+	.byte	0x71
+	.sleb128 0
+	.byte	0x33
+	.byte	0x25
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL2469
+	.4byte	.LVL2470-1
+	.2byte	0x1c
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST243:
+	.4byte	.LVL645
+	.4byte	.LVL646
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL646
+	.4byte	.LFE364
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST656:
+	.4byte	.LVL2397
+	.4byte	.LVL2403
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2403
+	.4byte	.LVL2404
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2404
+	.4byte	.LVL2405
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2407
+	.4byte	.LVL2408
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2408
+	.4byte	.LVL2409
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2410
+	.4byte	.LVL2415
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2415
+	.4byte	.LVL2416
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL2416
+	.4byte	.LVL2426
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2427
+	.4byte	.LVL2444
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST657:
+	.4byte	.LVL2396
+	.4byte	.LVL2405
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2406
+	.4byte	.LVL2409
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2444
+	.4byte	.LVL2447
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2447
+	.4byte	.LVL2448
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL2448
+	.4byte	.LFE361
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST658:
+	.4byte	.LVL2399
+	.4byte	.LVL2404
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL2411
+	.4byte	.LVL2444
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST659:
+	.4byte	.LVL2397
+	.4byte	.LVL2401
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2402
+	.4byte	.LVL2444
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST660:
+	.4byte	.LVL2423
+	.4byte	.LVL2424
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2424
+	.4byte	.LVL2425
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL2427
+	.4byte	.LVL2428
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2435
+	.4byte	.LVL2436
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2436
+	.4byte	.LVL2437
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL2438
+	.4byte	.LVL2439
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2449
+	.4byte	.LVL2453
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2454
+	.4byte	.LVL2455
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2455
+	.4byte	.LFE361
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST661:
+	.4byte	.LVL2412
+	.4byte	.LVL2414
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2416
+	.4byte	.LVL2417
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2417
+	.4byte	.LVL2418
+	.2byte	0x5
+	.byte	0x41
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2422
+	.4byte	.LVL2429
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2430
+	.4byte	.LVL2431
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2434
+	.4byte	.LVL2440
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2441
+	.4byte	.LVL2442
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2450
+	.4byte	.LVL2451
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2452
+	.4byte	.LVL2453
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2455
+	.4byte	.LVL2456
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2457
+	.4byte	.LFE361
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST662:
+	.4byte	.LVL2411
+	.4byte	.LVL2444
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST650:
+	.4byte	.LVL2375
+	.4byte	.LVL2378
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2378
+	.4byte	.LVL2383
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2383
+	.4byte	.LVL2384-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2384-1
+	.4byte	.LVL2384
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2384
+	.4byte	.LVL2390
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2390
+	.4byte	.LFE359
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST651:
+	.4byte	.LVL2385
+	.4byte	.LVL2386-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2387
+	.4byte	.LVL2388
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2388
+	.4byte	.LVL2389-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	req_sys+4
+	.4byte	0
+	.4byte	0
+.LLST652:
+	.4byte	.LVL2375
+	.4byte	.LVL2376
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2390
+	.4byte	.LFE359
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 6
+	.byte	0x94
+	.byte	0x2
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST653:
+	.4byte	.LVL2375
+	.4byte	.LVL2378
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL2378
+	.4byte	.LVL2381-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	.LVL2390
+	.4byte	.LFE359
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST654:
+	.4byte	.LVL2377
+	.4byte	.LVL2378
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x70
+	.sleb128 12
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2378
+	.4byte	.LVL2379
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x74
+	.sleb128 12
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2379
+	.4byte	.LVL2380
+	.2byte	0x15
+	.byte	0x74
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x74
+	.sleb128 12
+	.byte	0x6
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST655:
+	.4byte	.LVL2380
+	.4byte	.LVL2382
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST622:
+	.4byte	.LVL2264
+	.4byte	.LVL2268
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2268
+	.4byte	.LVL2272
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2272
+	.4byte	.LFE357
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST623:
+	.4byte	.LVL2264
+	.4byte	.LVL2265
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.4byte	.LVL2265
+	.4byte	.LVL2266
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2267
+	.4byte	.LVL2269
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2272
+	.4byte	.LFE357
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x20
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST642:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2348
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST643:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2348
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST644:
+	.4byte	.LVL2346
+	.4byte	.LVL2347
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2347
+	.4byte	.LFE356
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST645:
+	.4byte	.LVL2353
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST646:
+	.4byte	.LVL2353
+	.4byte	.LVL2367
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST647:
+	.4byte	.LVL2351
+	.4byte	.LVL2352-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2352-1
+	.4byte	.LVL2355
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2355
+	.4byte	.LVL2356-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2356-1
+	.4byte	.LVL2360
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL2365
+	.4byte	.LVL2366-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST648:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2348
+	.4byte	.LVL2349
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2350
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST649:
+	.4byte	.LVL2346
+	.4byte	.LVL2348
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL2348
+	.4byte	.LVL2349
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2350
+	.4byte	.LVL2367
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2367
+	.4byte	.LFE356
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST614:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2242
+	.4byte	.LVL2253
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2257
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST615:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2242
+	.4byte	.LVL2252
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2257
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST616:
+	.4byte	.LVL2240
+	.4byte	.LVL2241
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2241
+	.4byte	.LVL2244
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2244
+	.4byte	.LVL2245
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL2245
+	.4byte	.LVL2258
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2258
+	.4byte	.LVL2259
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2259
+	.4byte	.LFE355
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST617:
+	.4byte	.LVL2249
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST618:
+	.4byte	.LVL2248
+	.4byte	.LVL2262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST619:
+	.4byte	.LVL2246
+	.4byte	.LVL2247-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2247-1
+	.4byte	.LVL2259
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL2259
+	.4byte	.LVL2260
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2260
+	.4byte	.LVL2262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST620:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2242
+	.4byte	.LVL2243
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2245
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST621:
+	.4byte	.LVL2240
+	.4byte	.LVL2242
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL2242
+	.4byte	.LVL2243
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2245
+	.4byte	.LVL2255
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2255
+	.4byte	.LVL2256-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2256-1
+	.4byte	.LVL2257
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2257
+	.4byte	.LVL2262
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2262
+	.4byte	.LFE355
+	.2byte	0xf
+	.byte	0x70
+	.sleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page_shift
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST600:
+	.4byte	.LVL2191
+	.4byte	.LVL2196
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2196
+	.4byte	.LFE354
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST601:
+	.4byte	.LVL2191
+	.4byte	.LVL2194
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2194
+	.4byte	.LFE354
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST602:
+	.4byte	.LVL2191
+	.4byte	.LVL2195
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2195
+	.4byte	.LFE354
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST603:
+	.4byte	.LVL2198
+	.4byte	.LVL2199
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2200
+	.4byte	.LVL2202
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2202
+	.4byte	.LVL2203-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2208
+	.4byte	.LVL2210
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2211
+	.4byte	.LVL2212
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST604:
+	.4byte	.LVL2203
+	.4byte	.LVL2208
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2212
+	.4byte	.LFE354
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST605:
+	.4byte	.LVL2203
+	.4byte	.LVL2208
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2212
+	.4byte	.LFE354
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST606:
+	.4byte	.LVL2214
+	.4byte	.LVL2215
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2215
+	.4byte	.LFE354
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	0
+	.4byte	0
+.LLST607:
+	.4byte	.LVL2206
+	.4byte	.LVL2208
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2212
+	.4byte	.LVL2216
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2216
+	.4byte	.LVL2217-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST599:
+	.4byte	.LVL2184
+	.4byte	.LVL2185
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2186
+	.4byte	.LVL2187
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2187
+	.4byte	.LVL2188
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2188
+	.4byte	.LVL2189-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2189-1
+	.4byte	.LVL2189
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2189
+	.4byte	.LVL2190
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST236:
+	.4byte	.LVL617
+	.4byte	.LVL618
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL619
+	.4byte	.LVL620
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL620
+	.4byte	.LVL621
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL622
+	.4byte	.LVL623
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL624
+	.4byte	.LVL628
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL628
+	.4byte	.LVL629
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL630
+	.4byte	.LVL632
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL632
+	.4byte	.LVL633
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL633
+	.4byte	.LVL634
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL634
+	.4byte	.LVL636
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL636
+	.4byte	.LVL637
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL637
+	.4byte	.LFE352
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST237:
+	.4byte	.LVL624
+	.4byte	.LVL628
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL634
+	.4byte	.LFE352
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST238:
+	.4byte	.LVL622
+	.4byte	.LVL623
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL624
+	.4byte	.LVL625
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL630
+	.4byte	.LVL631
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL632
+	.4byte	.LVL634
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL634
+	.4byte	.LVL635
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL636
+	.4byte	.LFE352
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST597:
+	.4byte	.LVL2179
+	.4byte	.LVL2180
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2180
+	.4byte	.LFE351
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST598:
+	.4byte	.LVL2181
+	.4byte	.LVL2182
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2182
+	.4byte	.LVL2183-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST586:
+	.4byte	.LVL2139
+	.4byte	.LVL2140
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2140
+	.4byte	.LVL2144
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2144
+	.4byte	.LVL2148
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2148
+	.4byte	.LFE349
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST587:
+	.4byte	.LVL2149
+	.4byte	.LVL2150
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2150
+	.4byte	.LVL2151
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2151
+	.4byte	.LVL2153
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2156
+	.4byte	.LVL2159
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2159
+	.4byte	.LVL2160
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST588:
+	.4byte	.LVL2149
+	.4byte	.LVL2150
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2150
+	.4byte	.LVL2152
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2156
+	.4byte	.LVL2157
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2158
+	.4byte	.LFE349
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST589:
+	.4byte	.LVL2139
+	.4byte	.LVL2140
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	.LVL2140
+	.4byte	.LVL2141-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 12
+	.4byte	.LVL2144
+	.4byte	.LVL2145
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST590:
+	.4byte	.LVL2139
+	.4byte	.LVL2140
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	.LVL2140
+	.4byte	.LVL2141-1
+	.2byte	0x2
+	.byte	0x74
+	.sleb128 24
+	.4byte	.LVL2144
+	.4byte	.LVL2146
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 24
+	.4byte	0
+	.4byte	0
+.LLST591:
+	.4byte	.LVL2145
+	.4byte	.LVL2147
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST579:
+	.4byte	.LVL2108
+	.4byte	.LVL2111-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2111-1
+	.4byte	.LFE348
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST580:
+	.4byte	.LVL2113
+	.4byte	.LVL2119
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL2128
+	.4byte	.LFE348
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST581:
+	.4byte	.LVL2111
+	.4byte	.LVL2114
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2121
+	.4byte	.LVL2124
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2124
+	.4byte	.LVL2127
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2127
+	.4byte	.LVL2128
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST582:
+	.4byte	.LVL2117
+	.4byte	.LVL2118-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2118-1
+	.4byte	.LVL2119
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2128
+	.4byte	.LVL2129
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2129
+	.4byte	.LVL2135
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL2135
+	.4byte	.LVL2136
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2136
+	.4byte	.LVL2137
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2137
+	.4byte	.LFE348
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST583:
+	.4byte	.LVL2121
+	.4byte	.LVL2122
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2123
+	.4byte	.LVL2124
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2124
+	.4byte	.LVL2125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST584:
+	.4byte	.LVL2109
+	.4byte	.LVL2116
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2121
+	.4byte	.LVL2128
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST585:
+	.4byte	.LVL2130
+	.4byte	.LVL2131-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2131-1
+	.4byte	.LVL2135
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2137
+	.4byte	.LFE348
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST290:
+	.4byte	.LVL827
+	.4byte	.LVL830
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL830
+	.4byte	.LFE346
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST291:
+	.4byte	.LVL829
+	.4byte	.LVL834
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL838
+	.4byte	.LVL845
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST292:
+	.4byte	.LVL839
+	.4byte	.LVL845
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST293:
+	.4byte	.LVL831
+	.4byte	.LVL832
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL832
+	.4byte	.LVL833
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL833
+	.4byte	.LVL835
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL838
+	.4byte	.LVL840
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL840
+	.4byte	.LVL841
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL842
+	.4byte	.LVL845
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST294:
+	.4byte	.LVL833
+	.4byte	.LVL836
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL837
+	.4byte	.LVL838
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL839
+	.4byte	.LVL843
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL843
+	.4byte	.LVL844
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL845
+	.4byte	.LVL847
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL847
+	.4byte	.LVL849
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL849
+	.4byte	.LVL850
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL850
+	.4byte	.LFE346
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST295:
+	.4byte	.LVL833
+	.4byte	.LVL836
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL837
+	.4byte	.LVL838
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL845
+	.4byte	.LVL848-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL848-1
+	.4byte	.LVL849
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST296:
+	.4byte	.LVL833
+	.4byte	.LVL836
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST220:
+	.4byte	.LVL573
+	.4byte	.LVL576
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL577
+	.4byte	.LVL578
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL580
+	.4byte	.LVL582
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST221:
+	.4byte	.LVL573
+	.4byte	.LVL581
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL581
+	.4byte	.LVL583
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST222:
+	.4byte	.LVL574
+	.4byte	.LVL575
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL579
+	.4byte	.LVL583
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST214:
+	.4byte	.LVL560
+	.4byte	.LVL566-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL566-1
+	.4byte	.LVL567
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL567
+	.4byte	.LVL572
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL572
+	.4byte	.LFE342
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST215:
+	.4byte	.LVL560
+	.4byte	.LVL565
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL567
+	.4byte	.LVL568
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL570
+	.4byte	.LFE342
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST216:
+	.4byte	.LVL560
+	.4byte	.LVL561
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL561
+	.4byte	.LVL571
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL571
+	.4byte	.LFE342
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST217:
+	.4byte	.LVL560
+	.4byte	.LVL564
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL564
+	.4byte	.LVL567
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL567
+	.4byte	.LFE342
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST218:
+	.4byte	.LVL562
+	.4byte	.LVL563
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL567
+	.4byte	.LVL571
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST219:
+	.4byte	.LVL560
+	.4byte	.LVL562
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL571
+	.4byte	.LFE342
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST211:
+	.4byte	.LVL546
+	.4byte	.LVL549
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL549
+	.4byte	.LFE341
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST212:
+	.4byte	.LVL546
+	.4byte	.LVL548
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL548
+	.4byte	.LFE341
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST213:
+	.4byte	.LVL553
+	.4byte	.LVL554
+	.2byte	0x10
+	.byte	0x71
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL554
+	.4byte	.LVL555
+	.2byte	0x12
+	.byte	0x75
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL556
+	.4byte	.LVL557
+	.2byte	0x10
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL558
+	.4byte	.LVL559
+	.2byte	0x12
+	.byte	0x75
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST206:
+	.4byte	.LVL523
+	.4byte	.LVL526
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL526
+	.4byte	.LVL527
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL527
+	.4byte	.LFE340
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST207:
+	.4byte	.LVL524
+	.4byte	.LVL525
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL527
+	.4byte	.LVL539
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL539
+	.4byte	.LFE340
+	.2byte	0x6
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST208:
+	.4byte	.LVL529
+	.4byte	.LVL530
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL531
+	.4byte	.LVL533
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL534
+	.4byte	.LVL535
+	.2byte	0xb
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST209:
+	.4byte	.LVL529
+	.4byte	.LVL531
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL531
+	.4byte	.LVL534
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL534
+	.4byte	.LVL536
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL536
+	.4byte	.LVL537
+	.2byte	0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL538
+	.4byte	.LVL540
+	.2byte	0x5
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST194:
+	.4byte	.LVL468
+	.4byte	.LVL469
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL470
+	.4byte	.LVL477
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL479
+	.4byte	.LVL480
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL480
+	.4byte	.LFE336
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST195:
+	.4byte	.LVL472
+	.4byte	.LVL475
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST191:
+	.4byte	.LVL458
+	.4byte	.LVL459
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL459
+	.4byte	.LFE335
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST192:
+	.4byte	.LVL458
+	.4byte	.LVL463
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL463
+	.4byte	.LVL466
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL466
+	.4byte	.LFE335
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST193:
+	.4byte	.LVL460
+	.4byte	.LVL461
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL462
+	.4byte	.LVL465
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL466
+	.4byte	.LFE335
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST189:
+	.4byte	.LVL450
+	.4byte	.LVL451
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL451
+	.4byte	.LVL452
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL452
+	.4byte	.LVL454
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL456
+	.4byte	.LFE334
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST190:
+	.4byte	.LVL455
+	.4byte	.LVL457
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL457
+	.4byte	.LFE334
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST185:
+	.4byte	.LVL443
+	.4byte	.LVL445-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL445-1
+	.4byte	.LFE333
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST186:
+	.4byte	.LVL443
+	.4byte	.LVL445-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL445-1
+	.4byte	.LFE333
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST187:
+	.4byte	.LVL444
+	.4byte	.LVL449
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST188:
+	.4byte	.LVL446
+	.4byte	.LVL448
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST289:
+	.4byte	.LVL824
+	.4byte	.LVL825
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL825
+	.4byte	.LVL826-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gSysFreeQueue
+	.4byte	.LVL826-1
+	.4byte	.LFE330
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST570:
+	.4byte	.LVL2063
+	.4byte	.LVL2065
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2065
+	.4byte	.LFE329
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST571:
+	.4byte	.LVL2063
+	.4byte	.LVL2064
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2064
+	.4byte	.LVL2070-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2070-1
+	.4byte	.LFE329
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST572:
+	.4byte	.LVL2067
+	.4byte	.LVL2071
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2071
+	.4byte	.LVL2072
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2073
+	.4byte	.LFE329
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST573:
+	.4byte	.LVL2074
+	.4byte	.LVL2076
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2076
+	.4byte	.LVL2078
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2078
+	.4byte	.LVL2079
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2079
+	.4byte	.LFE329
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST574:
+	.4byte	.LVL2066
+	.4byte	.LVL2068
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2068
+	.4byte	.LVL2069
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST183:
+	.4byte	.LVL438
+	.4byte	.LVL439
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL439
+	.4byte	.LVL440
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL440
+	.4byte	.LVL441
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL441
+	.4byte	.LFE328
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST184:
+	.4byte	.LVL438
+	.4byte	.LVL440
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL440
+	.4byte	.LVL442
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL442
+	.4byte	.LFE328
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST181:
+	.4byte	.LVL434
+	.4byte	.LVL435-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL435-1
+	.4byte	.LFE327
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST182:
+	.4byte	.LVL436
+	.4byte	.LVL437-1
+	.2byte	0x11
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_planes_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST179:
+	.4byte	.LVL430
+	.4byte	.LVL432-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL432-1
+	.4byte	.LFE326
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST180:
+	.4byte	.LVL431
+	.4byte	.LVL432-1
+	.2byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST176:
+	.4byte	.LVL425
+	.4byte	.LVL428-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL428-1
+	.4byte	.LFE325
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST177:
+	.4byte	.LVL425
+	.4byte	.LVL427
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL427
+	.4byte	.LFE325
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST178:
+	.4byte	.LVL426
+	.4byte	.LVL428-1
+	.2byte	0x20
+	.byte	0x77
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0x1e
+	.byte	0x76
+	.sleb128 0
+	.byte	0x75
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x77
+	.sleb128 0
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1d
+	.byte	0x22
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST575:
+	.4byte	.LVL2095
+	.4byte	.LVL2096
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2103
+	.4byte	.LVL2104
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2104
+	.4byte	.LVL2105
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2105
+	.4byte	.LVL2106
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST576:
+	.4byte	.LVL2083
+	.4byte	.LVL2086
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2096
+	.4byte	.LVL2097
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2098
+	.4byte	.LVL2099
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST577:
+	.4byte	.LVL2089
+	.4byte	.LVL2094
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2099
+	.4byte	.LVL2101
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2102
+	.4byte	.LVL2103
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST578:
+	.4byte	.LVL2081
+	.4byte	.LVL2093
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2096
+	.4byte	.LVL2103
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2106
+	.4byte	.LVL2107
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST568:
+	.4byte	.LVL2055
+	.4byte	.LVL2061
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2062
+	.4byte	.LFE321
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST569:
+	.4byte	.LVL2056
+	.4byte	.LVL2057
+	.2byte	0x13
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL2057
+	.4byte	.LVL2058
+	.2byte	0x13
+	.byte	0x72
+	.sleb128 15
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL2058
+	.4byte	.LVL2059-1
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST287:
+	.4byte	.LVL816
+	.4byte	.LVL818
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL818
+	.4byte	.LVL822
+	.2byte	0x4
+	.byte	0x75
+	.sleb128 -1022
+	.byte	0x9f
+	.4byte	.LVL822
+	.4byte	.LFE319
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST288:
+	.4byte	.LVL816
+	.4byte	.LVL817
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL817
+	.4byte	.LVL822
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL822
+	.4byte	.LFE319
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST171:
+	.4byte	.LVL418
+	.4byte	.LVL420-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL420-1
+	.4byte	.LFE317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST172:
+	.4byte	.LVL419
+	.4byte	.LVL424
+	.2byte	0x10
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST173:
+	.4byte	.LVL421
+	.4byte	.LVL422-1
+	.2byte	0x32
+	.byte	0x74
+	.sleb128 0
+	.byte	0x35
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x6
+	.byte	0x74
+	.sleb128 0
+	.byte	0x4f
+	.byte	0x1a
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x25
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST174:
+	.4byte	.LVL421
+	.4byte	.LVL422-1
+	.2byte	0x19
+	.byte	0x76
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x75
+	.sleb128 0
+	.byte	0xf7
+	.uleb128 0x25
+	.byte	0x1b
+	.byte	0xf7
+	.uleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST175:
+	.4byte	.LVL421
+	.4byte	.LVL423
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST167:
+	.4byte	.LVL410
+	.4byte	.LVL411-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL411-1
+	.4byte	.LFE316
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST168:
+	.4byte	.LVL412
+	.4byte	.LVL417
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST169:
+	.4byte	.LVL414
+	.4byte	.LVL415
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x3
+	.4byte	gBbtInfo+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST170:
+	.4byte	.LVL414
+	.4byte	.LVL416-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST635:
+	.4byte	.LVL2314
+	.4byte	.LVL2316
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2316
+	.4byte	.LVL2317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2317
+	.4byte	.LVL2318-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2318-1
+	.4byte	.LVL2336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2336
+	.4byte	.LVL2337
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2337
+	.4byte	.LFE309
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST636:
+	.4byte	.LVL2314
+	.4byte	.LVL2316
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2316
+	.4byte	.LVL2317
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2317
+	.4byte	.LVL2318-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2318-1
+	.4byte	.LVL2321
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2321
+	.4byte	.LVL2336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2336
+	.4byte	.LFE309
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST637:
+	.4byte	.LVL2314
+	.4byte	.LVL2315
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2315
+	.4byte	.LFE309
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST638:
+	.4byte	.LVL2322
+	.4byte	.LVL2327
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST639:
+	.4byte	.LVL2323
+	.4byte	.LVL2324
+	.2byte	0x21
+	.byte	0x74
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1c
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x75
+	.sleb128 0
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST640:
+	.4byte	.LVL2320
+	.4byte	.LVL2325
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2325
+	.4byte	.LVL2336
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST641:
+	.4byte	.LVL2332
+	.4byte	.LVL2333-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST764:
+	.4byte	.LVL3020
+	.4byte	.LVL3023
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3023
+	.4byte	.LVL3025
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL3025
+	.4byte	.LVL3027
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3027
+	.4byte	.LVL3105
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL3105
+	.4byte	.LVL3106
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3106
+	.4byte	.LFE308
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST765:
+	.4byte	.LVL3020
+	.4byte	.LVL3022
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3022
+	.4byte	.LVL3025
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3025
+	.4byte	.LVL3029
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3029
+	.4byte	.LVL3061
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3061
+	.4byte	.LVL3063
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL3063
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3105
+	.4byte	.LVL3107
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST766:
+	.4byte	.LVL3020
+	.4byte	.LVL3021
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3021
+	.4byte	.LVL3024
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3025
+	.4byte	.LVL3028
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3028
+	.4byte	.LVL3036
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3053
+	.4byte	.LVL3063
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3063
+	.4byte	.LVL3064
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3064
+	.4byte	.LVL3067
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	.LVL3105
+	.4byte	.LVL3107
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -100
+	.4byte	0
+	.4byte	0
+.LLST767:
+	.4byte	.LVL3020
+	.4byte	.LVL3024-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3024-1
+	.4byte	.LVL3024
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3025
+	.4byte	.LVL3026
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3026
+	.4byte	.LVL3036
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3053
+	.4byte	.LVL3065
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3065
+	.4byte	.LVL3066-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3066-1
+	.4byte	.LVL3067
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	.LVL3105
+	.4byte	.LFE308
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -108
+	.4byte	0
+	.4byte	0
+.LLST768:
+	.4byte	.LVL3071
+	.4byte	.LVL3100
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST769:
+	.4byte	.LVL3035
+	.4byte	.LVL3036
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL3036
+	.4byte	.LVL3053
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3067
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST770:
+	.4byte	.LVL3031
+	.4byte	.LVL3032
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3032
+	.4byte	.LVL3062
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL3062
+	.4byte	.LVL3065
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3065
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST771:
+	.4byte	.LVL3034
+	.4byte	.LVL3035-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3035-1
+	.4byte	.LVL3036
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL3053
+	.4byte	.LVL3055
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3055
+	.4byte	.LVL3067
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST772:
+	.4byte	.LVL3069
+	.4byte	.LVL3070
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3070
+	.4byte	.LVL3072
+	.2byte	0x2
+	.byte	0x71
+	.sleb128 4
+	.4byte	.LVL3072
+	.4byte	.LVL3073-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	req_prgm
+	.byte	0x6
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.4byte	0
+	.4byte	0
+.LLST773:
+	.4byte	.LVL3045
+	.4byte	.LVL3048
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3048
+	.4byte	.LVL3050
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL3067
+	.4byte	.LVL3089
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3089
+	.4byte	.LVL3090
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3090
+	.4byte	.LVL3100
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST774:
+	.4byte	.LVL3034
+	.4byte	.LVL3035-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3035-1
+	.4byte	.LVL3045
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3049
+	.4byte	.LVL3051
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3051
+	.4byte	.LVL3053
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3053
+	.4byte	.LVL3054
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3054
+	.4byte	.LVL3060
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3060
+	.4byte	.LVL3067
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3100
+	.4byte	.LVL3104
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -104
+	.4byte	.LVL3104
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST775:
+	.4byte	.LVL3040
+	.4byte	.LVL3041
+	.2byte	0x22
+	.byte	0x3
+	.4byte	g_active_superblock+7
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x12
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x91
+	.sleb128 -104
+	.byte	0x6
+	.byte	0x16
+	.byte	0x14
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x22
+	.byte	0x2d
+	.byte	0x28
+	.2byte	0x1
+	.byte	0x16
+	.byte	0x13
+	.byte	0x9f
+	.4byte	.LVL3041
+	.4byte	.LVL3042
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3042
+	.4byte	.LVL3045
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	.LVL3046
+	.4byte	.LVL3047
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3047
+	.4byte	.LVL3048
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3048
+	.4byte	.LVL3050
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3100
+	.4byte	.LVL3105
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST776:
+	.4byte	.LVL3035
+	.4byte	.LVL3036
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3057
+	.4byte	.LVL3058
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3058
+	.4byte	.LVL3060-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3074
+	.4byte	.LVL3077
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3079
+	.4byte	.LVL3081
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3081
+	.4byte	.LVL3083
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL3084
+	.4byte	.LVL3086
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	.LVL3091
+	.4byte	.LVL3093
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	0
+	.4byte	0
+.LLST777:
+	.4byte	.LVL3035
+	.4byte	.LVL3036
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3057
+	.4byte	.LVL3067
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3075
+	.4byte	.LVL3076
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3076
+	.4byte	.LVL3077
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3079
+	.4byte	.LVL3080
+	.2byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3080
+	.4byte	.LVL3082
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3082
+	.4byte	.LVL3083
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3084
+	.4byte	.LVL3085
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3085
+	.4byte	.LVL3086
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3091
+	.4byte	.LVL3092
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3092
+	.4byte	.LVL3093
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL3107
+	.4byte	.LFE308
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST778:
+	.4byte	.LVL3035
+	.4byte	.LVL3053
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL3067
+	.4byte	.LVL3105
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST625:
+	.4byte	.LVL2286
+	.4byte	.LVL2291
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2291
+	.4byte	.LVL2292
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL2292
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST626:
+	.4byte	.LVL2286
+	.4byte	.LVL2290
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2290
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL2312
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST627:
+	.4byte	.LVL2286
+	.4byte	.LVL2289
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2289
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST628:
+	.4byte	.LVL2286
+	.4byte	.LVL2287
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2287
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL2312
+	.4byte	.LFE306
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST629:
+	.4byte	.LVL2292
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST630:
+	.4byte	.LVL2302
+	.4byte	.LVL2303-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2303-1
+	.4byte	.LVL2309
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST631:
+	.4byte	.LVL2293
+	.4byte	.LVL2294
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2304
+	.4byte	.LVL2305
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST632:
+	.4byte	.LVL2288
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST633:
+	.4byte	.LVL2301
+	.4byte	.LVL2303-1
+	.2byte	0x2
+	.byte	0x75
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST634:
+	.4byte	.LVL2286
+	.4byte	.LVL2288
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2288
+	.4byte	.LVL2312
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST746:
+	.4byte	.LVL2960
+	.4byte	.LVL2963
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2963
+	.4byte	.LVL2966
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2966
+	.4byte	.LVL2969
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2969
+	.4byte	.LVL3018
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL3018
+	.4byte	.LVL3019
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3019
+	.4byte	.LFE305
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST747:
+	.4byte	.LVL2960
+	.4byte	.LVL2962
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2962
+	.4byte	.LVL2966
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2966
+	.4byte	.LVL2970-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2970-1
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST748:
+	.4byte	.LVL2960
+	.4byte	.LVL2961
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2961
+	.4byte	.LVL2966
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL2966
+	.4byte	.LVL2968
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2968
+	.4byte	.LFE305
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST749:
+	.4byte	.LVL2960
+	.4byte	.LVL2964-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2964-1
+	.4byte	.LVL2966
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL2966
+	.4byte	.LVL2967
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2967
+	.4byte	.LFE305
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST750:
+	.4byte	.LVL2960
+	.4byte	.LVL2965
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2966
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST751:
+	.4byte	.LVL2972
+	.4byte	.LVL2973
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2973
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST752:
+	.4byte	.LVL2975
+	.4byte	.LVL2978
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2978
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -76
+	.4byte	0
+	.4byte	0
+.LLST753:
+	.4byte	.LVL3001
+	.4byte	.LVL3002
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3002
+	.4byte	.LVL3003-1
+	.2byte	0x12
+	.byte	0x3
+	.4byte	c_ftl_nand_sec_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x78
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST754:
+	.4byte	.LVL2976
+	.4byte	.LVL2978
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL2978
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST755:
+	.4byte	.LVL2987
+	.4byte	.LVL2988
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2988
+	.4byte	.LVL3000
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3014
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST756:
+	.4byte	.LVL2976
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2978
+	.4byte	.LVL2999
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3000
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST757:
+	.4byte	.LVL2976
+	.4byte	.LVL2977
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2977
+	.4byte	.LVL2978
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2978
+	.4byte	.LVL2980
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL2980
+	.4byte	.LVL2981-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2981-1
+	.4byte	.LVL2984
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	.LVL2984
+	.4byte	.LVL2985
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL2985
+	.4byte	.LVL2986
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2986
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -92
+	.4byte	0
+	.4byte	0
+.LLST758:
+	.4byte	.LVL2978
+	.4byte	.LVL3007
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL3007
+	.4byte	.LVL3010
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3010
+	.4byte	.LVL3018
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST759:
+	.4byte	.LVL2966
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2978
+	.4byte	.LVL3007
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL3007
+	.4byte	.LVL3008
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3008
+	.4byte	.LVL3009
+	.2byte	0x6
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x71
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3009
+	.4byte	.LVL3010
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3010
+	.4byte	.LVL3018
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -72
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST760:
+	.4byte	.LVL2966
+	.4byte	.LVL2978
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2978
+	.4byte	.LVL3012
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL3012
+	.4byte	.LVL3013
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3013
+	.4byte	.LVL3018
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL3018
+	.4byte	.LFE305
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST761:
+	.4byte	.LVL2982
+	.4byte	.LVL2983
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL3000
+	.4byte	.LVL3005
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST762:
+	.4byte	.LVL2993
+	.4byte	.LVL2994
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2994
+	.4byte	.LVL2995
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x802
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2995
+	.4byte	.LVL2996
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3015
+	.4byte	.LVL3016
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x801
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL3016
+	.4byte	.LVL3018
+	.2byte	0x8
+	.byte	0xa
+	.2byte	0x802
+	.byte	0x91
+	.sleb128 -48
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST763:
+	.4byte	.LVL2992
+	.4byte	.LVL2997
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL3015
+	.4byte	.LVL3018
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST798:
+	.4byte	.LVL3190
+	.4byte	.LVL3192
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3194
+	.4byte	.LVL3195
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3207
+	.4byte	.LVL3209
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3212
+	.4byte	.LVL3213
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3217
+	.4byte	.LVL3218
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3220
+	.4byte	.LVL3221
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3221
+	.4byte	.LVL3222-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3224
+	.4byte	.LVL3225
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST799:
+	.4byte	.LVL3194
+	.4byte	.LVL3200
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3221
+	.4byte	.LVL3223
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3224
+	.4byte	.LVL3225
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST800:
+	.4byte	.LVL3188
+	.4byte	.LVL3191
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3191
+	.4byte	.LVL3193
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3207
+	.4byte	.LVL3210
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3211
+	.4byte	.LVL3216
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3216
+	.4byte	.LVL3217
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST801:
+	.4byte	.LVL3186
+	.4byte	.LVL3187
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3187
+	.4byte	.LVL3189
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3205
+	.4byte	.LVL3206
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3206
+	.4byte	.LVL3207
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST528:
+	.4byte	.LVL1815
+	.4byte	.LVL1818
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1818
+	.4byte	.LVL1874
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST529:
+	.4byte	.LVL1815
+	.4byte	.LVL1816
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1816
+	.4byte	.LVL1874
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST530:
+	.4byte	.LVL1817
+	.4byte	.LVL1821
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1837
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1838
+	.4byte	.LVL1848
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1849
+	.4byte	.LVL1851
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1852
+	.4byte	.LVL1867
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1868
+	.4byte	.LVL1874
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST531:
+	.4byte	.LVL1817
+	.4byte	.LVL1821
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1826
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1826
+	.4byte	.LVL1827
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1827
+	.4byte	.LVL1837
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1838
+	.4byte	.LVL1843
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1844
+	.4byte	.LVL1862
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1863
+	.4byte	.LVL1874
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST532:
+	.4byte	.LVL1820
+	.4byte	.LVL1821
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1821
+	.4byte	.LVL1822
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1824
+	.4byte	.LVL1826
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1826
+	.4byte	.LVL1827
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1827
+	.4byte	.LVL1828
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1828
+	.4byte	.LVL1829
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1831
+	.4byte	.LVL1832
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1832
+	.4byte	.LVL1835
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1836
+	.4byte	.LVL1837
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1838
+	.4byte	.LVL1845
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1845
+	.4byte	.LVL1846
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1847
+	.4byte	.LVL1850
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1850
+	.4byte	.LVL1853
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1853
+	.4byte	.LVL1854
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1855
+	.4byte	.LVL1857
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1857
+	.4byte	.LVL1864
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1864
+	.4byte	.LVL1865
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1866
+	.4byte	.LVL1869
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1869
+	.4byte	.LVL1870
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1871
+	.4byte	.LVL1872
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1872
+	.4byte	.LVL1873
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST533:
+	.4byte	.LVL1840
+	.4byte	.LVL1841-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1859
+	.4byte	.LVL1860-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST534:
+	.4byte	.LVL1815
+	.4byte	.LVL1825
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1856
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST535:
+	.4byte	.LVL1815
+	.4byte	.LVL1826
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1826
+	.4byte	.LVL1833
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1834
+	.4byte	.LVL1836
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1838
+	.4byte	.LVL1857
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1857
+	.4byte	.LVL1871
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST536:
+	.4byte	.LVL1815
+	.4byte	.LVL1825
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1856
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1856
+	.4byte	.LVL1857
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x2
+	.byte	0x32
+	.byte	0x25
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST537:
+	.4byte	.LVL1815
+	.4byte	.LVL1819
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1819
+	.4byte	.LVL1825
+	.2byte	0xa
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x1
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1838
+	.4byte	.LVL1855
+	.2byte	0xa
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x94
+	.byte	0x1
+	.byte	0x30
+	.byte	0x2e
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1855
+	.4byte	.LVL1857
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST538:
+	.4byte	.LVL1815
+	.4byte	.LVL1821
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gMultiPageProgEn
+	.4byte	.LVL1821
+	.4byte	.LVL1837
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL1838
+	.4byte	.LVL1874
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	.LVL1874
+	.4byte	.LFE300
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gMultiPageProgEn
+	.4byte	0
+	.4byte	0
+.LLST429:
+	.4byte	.LVL1378
+	.4byte	.LVL1379
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1379
+	.4byte	.LVL1380
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1381
+	.4byte	.LVL1383
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST430:
+	.4byte	.LVL1322
+	.4byte	.LVL1328
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1328
+	.4byte	.LVL1336
+	.2byte	0x7
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1337
+	.4byte	.LVL1339
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1344
+	.4byte	.LVL1345
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1345
+	.4byte	.LVL1346-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1347
+	.4byte	.LVL1348
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x31
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1348
+	.4byte	.LVL1351
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1357
+	.4byte	.LVL1358
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1358
+	.4byte	.LVL1361
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1362
+	.4byte	.LVL1363
+	.2byte	0x9
+	.byte	0x3
+	.4byte	c_ftl_nand_max_map_blks
+	.byte	0x6
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1363
+	.4byte	.LVL1364-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1365
+	.4byte	.LVL1366
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3c
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL1366
+	.4byte	.LVL1367-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1368
+	.4byte	.LVL1369
+	.2byte	0x18
+	.byte	0x3
+	.4byte	c_ftl_nand_l2pmap_ram_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x3
+	.4byte	c_ftl_nand_byte_pre_page
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL1369
+	.4byte	.LVL1370-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1371
+	.4byte	.LVL1372
+	.2byte	0xe
+	.byte	0x3
+	.4byte	c_ftl_nand_blk_pre_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL1372
+	.4byte	.LVL1373-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1374
+	.4byte	.LVL1375
+	.2byte	0x11
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1375
+	.4byte	.LVL1376
+	.2byte	0x1e
+	.byte	0x3
+	.4byte	c_ftl_nand_blks_per_die
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x1f
+	.byte	0x35
+	.byte	0x26
+	.byte	0x3
+	.4byte	c_ftl_nand_die_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL1376
+	.4byte	.LVL1377-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST162:
+	.4byte	.LVL381
+	.4byte	.LVL382
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL382
+	.4byte	.LVL396
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL396
+	.4byte	.LFE296
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST163:
+	.4byte	.LVL383
+	.4byte	.LVL384
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL384
+	.4byte	.LVL386
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL387
+	.4byte	.LVL393
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL400
+	.4byte	.LVL401
+	.2byte	0x1f
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL401
+	.4byte	.LVL402
+	.2byte	0x29
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL402
+	.4byte	.LVL403
+	.2byte	0x2e
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	c_ftl_nand_map_region_num
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x32
+	.byte	0x24
+	.byte	0x22
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST164:
+	.4byte	.LVL388
+	.4byte	.LVL392
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST161:
+	.4byte	.LVL378
+	.4byte	.LVL379
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL379
+	.4byte	.LVL380
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL380
+	.4byte	.LFE295
+	.2byte	0x5
+	.byte	0x3
+	.4byte	c_ftl_nand_sys_blks_per_plane
+	.4byte	0
+	.4byte	0
+.LLST158:
+	.4byte	.LVL370
+	.4byte	.LVL374
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL374
+	.4byte	.LVL375
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL375
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST159:
+	.4byte	.LVL370
+	.4byte	.LVL371
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL372
+	.4byte	.LVL373
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL373
+	.4byte	.LVL375
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL375
+	.4byte	.LVL376
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL376
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST160:
+	.4byte	.LVL370
+	.4byte	.LVL371
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL372
+	.4byte	.LFE293
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST319:
+	.4byte	.LVL940
+	.4byte	.LVL948
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL948
+	.4byte	.LVL979
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL979
+	.4byte	.LVL980
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL980
+	.4byte	.LVL987
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL987
+	.4byte	.LVL990-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL990-1
+	.4byte	.LFE292
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST320:
+	.4byte	.LVL940
+	.4byte	.LVL947
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL947
+	.4byte	.LVL979
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL979
+	.4byte	.LVL980
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL980
+	.4byte	.LVL987
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL987
+	.4byte	.LVL989
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL989
+	.4byte	.LFE292
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST321:
+	.4byte	.LVL940
+	.4byte	.LVL946
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL946
+	.4byte	.LVL979
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL979
+	.4byte	.LVL980
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL980
+	.4byte	.LVL987
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL987
+	.4byte	.LVL988
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL988
+	.4byte	.LFE292
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST322:
+	.4byte	.LVL940
+	.4byte	.LVL942
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL942
+	.4byte	.LVL952
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL952
+	.4byte	.LVL978
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL978
+	.4byte	.LFE292
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST323:
+	.4byte	.LVL940
+	.4byte	.LVL944
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL944
+	.4byte	.LVL945
+	.2byte	0x4
+	.byte	0x91
+	.sleb128 -96
+	.byte	0x9f
+	.4byte	.LVL945
+	.4byte	.LVL954
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL978
+	.4byte	.LVL979
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL979
+	.4byte	.LFE292
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST324:
+	.4byte	.LVL940
+	.4byte	.LVL957
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL957
+	.4byte	.LVL960
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL960
+	.4byte	.LVL962
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL963
+	.4byte	.LVL970
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL970
+	.4byte	.LVL977
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL978
+	.4byte	.LVL991
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL991
+	.4byte	.LVL999
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST325:
+	.4byte	.LVL953
+	.4byte	.LVL954
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL954
+	.4byte	.LVL957
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL957
+	.4byte	.LVL958
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL963
+	.4byte	.LVL964
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL964
+	.4byte	.LVL969
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL969
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL970
+	.4byte	.LVL978
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL980
+	.4byte	.LVL981
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL982
+	.4byte	.LVL984
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL984
+	.4byte	.LVL986
+	.2byte	0x3
+	.byte	0x78
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL986
+	.4byte	.LVL987
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL990
+	.4byte	.LVL991
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL991
+	.4byte	.LVL992
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL992
+	.4byte	.LVL997
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL997
+	.4byte	.LVL998
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL998
+	.4byte	.LFE292
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST326:
+	.4byte	.LVL941
+	.4byte	.LVL942
+	.2byte	0xb
+	.byte	0x73
+	.sleb128 0
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL942
+	.4byte	.LVL952
+	.2byte	0xb
+	.byte	0x77
+	.sleb128 0
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL952
+	.4byte	.LVL978
+	.2byte	0xc
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL978
+	.4byte	.LFE292
+	.2byte	0xb
+	.byte	0x77
+	.sleb128 0
+	.byte	0x8
+	.byte	0x3f
+	.byte	0x1a
+	.byte	0x30
+	.byte	0x29
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST327:
+	.4byte	.LVL953
+	.4byte	.LVL957
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL963
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST328:
+	.4byte	.LVL965
+	.4byte	.LVL968
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST329:
+	.4byte	.LVL953
+	.4byte	.LVL955
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL955
+	.4byte	.LVL956
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -4
+	.byte	0x9f
+	.4byte	.LVL963
+	.4byte	.LVL965
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -4
+	.byte	0x9f
+	.4byte	.LVL965
+	.4byte	.LVL966
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -3
+	.byte	0x9f
+	.4byte	.LVL966
+	.4byte	.LVL967
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -2
+	.byte	0x9f
+	.4byte	.LVL967
+	.4byte	.LVL969
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL969
+	.4byte	.LVL970
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST330:
+	.4byte	.LVL971
+	.4byte	.LVL972
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL972
+	.4byte	.LVL973
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL975
+	.4byte	.LVL976
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST331:
+	.4byte	.LVL961
+	.4byte	.LVL963
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST311:
+	.4byte	.LVL917
+	.4byte	.LVL921
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL921
+	.4byte	.LVL927
+	.2byte	0x4
+	.byte	0x76
+	.sleb128 -512
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST312:
+	.4byte	.LVL917
+	.4byte	.LVL922
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL922
+	.4byte	.LVL929
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL929
+	.4byte	.LVL930
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL930
+	.4byte	.LVL936
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL936
+	.4byte	.LVL937
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL937
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST313:
+	.4byte	.LVL917
+	.4byte	.LVL919
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL919
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST314:
+	.4byte	.LVL917
+	.4byte	.LVL923-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL923-1
+	.4byte	.LVL923
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL923
+	.4byte	.LVL927
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LVL928-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL928-1
+	.4byte	.LVL929
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL929
+	.4byte	.LVL932-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL932-1
+	.4byte	.LVL932
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL932
+	.4byte	.LVL936
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL936
+	.4byte	.LVL939-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL939-1
+	.4byte	.LFE291
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST315:
+	.4byte	.LVL917
+	.4byte	.LVL927
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL927
+	.4byte	.LFE291
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST316:
+	.4byte	.LVL919
+	.4byte	.LVL921
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL921
+	.4byte	.LVL923
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL923
+	.4byte	.LVL924
+	.2byte	0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0x76
+	.sleb128 0
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0xe00
+	.byte	0x9f
+	.4byte	.LVL927
+	.4byte	.LVL928-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL928-1
+	.4byte	.LVL929
+	.2byte	0xc
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.byte	0x9f
+	.4byte	.LVL929
+	.4byte	.LVL931
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL931
+	.4byte	.LVL932
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL932
+	.4byte	.LVL933
+	.2byte	0xc
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.byte	0x9f
+	.4byte	.LVL936
+	.4byte	.LVL938
+	.2byte	0x1
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+	.4byte	.LVL938
+	.4byte	.LVL939-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL939-1
+	.4byte	.LFE291
+	.2byte	0xc
+	.byte	0x74
+	.sleb128 0
+	.byte	0x39
+	.byte	0x24
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x1000
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST317:
+	.4byte	.LVL925
+	.4byte	.LVL926
+	.2byte	0x30
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x2
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x40
+	.byte	0x24
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x38
+	.byte	0x24
+	.byte	0x21
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x3
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x48
+	.byte	0x24
+	.byte	0x21
+	.byte	0x91
+	.sleb128 0
+	.byte	0x6
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x21
+	.byte	0x9f
+	.4byte	.LVL934
+	.4byte	.LVL935
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST318:
+	.4byte	.LVL918
+	.4byte	.LVL927
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL927
+	.4byte	.LFE291
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST156:
+	.4byte	.LVL361
+	.4byte	.LVL363
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL363
+	.4byte	.LFE290
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST157:
+	.4byte	.LVL364
+	.4byte	.LVL365
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 28
+	.byte	0x9f
+	.4byte	.LVL366
+	.4byte	.LVL369
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 28
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST142:
+	.4byte	.LVL329
+	.4byte	.LVL334
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL334
+	.4byte	.LVL336
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL336
+	.4byte	.LVL339
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL352
+	.4byte	.LVL353
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST143:
+	.4byte	.LVL329
+	.4byte	.LVL330
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL330
+	.4byte	.LFE289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL329
+	.4byte	.LVL346
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL346
+	.4byte	.LVL352
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL352
+	.4byte	.LVL356
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL356
+	.4byte	.LFE289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL329
+	.4byte	.LVL341
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL341
+	.4byte	.LVL352
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	.LVL352
+	.4byte	.LVL353
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST146:
+	.4byte	.LVL329
+	.4byte	.LVL352
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL352
+	.4byte	.LFE289
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST147:
+	.4byte	.LVL329
+	.4byte	.LVL352
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL352
+	.4byte	.LFE289
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	0
+	.4byte	0
+.LLST148:
+	.4byte	.LVL335
+	.4byte	.LVL352
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL337
+	.4byte	.LVL338
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL340
+	.4byte	.LVL343
+	.2byte	0x1
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+	.4byte	.LVL344
+	.4byte	.LVL352
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST150:
+	.4byte	.LVL331
+	.4byte	.LVL346
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL353
+	.4byte	.LVL356
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL333
+	.4byte	.LVL352
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL353
+	.4byte	.LFE289
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST152:
+	.4byte	.LVL348
+	.4byte	.LVL349
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL349
+	.4byte	.LVL350-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gMasterInfo+20
+	.4byte	0
+	.4byte	0
+.LLST153:
+	.4byte	.LVL354
+	.4byte	.LVL356
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL356
+	.4byte	.LVL360
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	0
+	.4byte	0
+.LLST154:
+	.4byte	.LVL345
+	.4byte	.LVL346
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL353
+	.4byte	.LVL356
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 4
+	.4byte	.LVL356
+	.4byte	.LVL357
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL357
+	.4byte	.LVL358
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -4
+	.byte	0x9f
+	.4byte	.LVL358
+	.4byte	.LVL360
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST155:
+	.4byte	.LVL354
+	.4byte	.LVL355
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL355
+	.4byte	.LVL360
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST141:
+	.4byte	.LVL324
+	.4byte	.LVL325
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL326
+	.4byte	.LFE287
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST139:
+	.4byte	.LVL319
+	.4byte	.LVL320
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL320
+	.4byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST140:
+	.4byte	.LVL319
+	.4byte	.LVL320
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL320
+	.4byte	.LFE283
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST137:
+	.4byte	.LVL310
+	.4byte	.LVL312
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL313
+	.4byte	.LVL315
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST138:
+	.4byte	.LVL306
+	.4byte	.LVL307
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL308
+	.4byte	.LFE280
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST101:
+	.4byte	.LVL195
+	.4byte	.LVL196
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL196
+	.4byte	.LFE277
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST102:
+	.4byte	.LVL196
+	.4byte	.LVL198
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL198
+	.4byte	.LVL199
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a1
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL199
+	.4byte	.LVL200
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL201
+	.4byte	.LFE277
+	.2byte	0x9
+	.byte	0xc
+	.4byte	0x186a0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST103:
+	.4byte	.LVL196
+	.4byte	.LVL197
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x64
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST85:
+	.4byte	.LVL152
+	.4byte	.LVL153
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL153
+	.4byte	.LVL155
+	.2byte	0xd
+	.byte	0x70
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST84:
+	.4byte	.LVL147
+	.4byte	.LVL149
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL149
+	.4byte	.LVL150
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 4
+	.4byte	.LVL150
+	.4byte	.LFE274
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST82:
+	.4byte	.LVL138
+	.4byte	.LVL145
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL145
+	.4byte	.LVL146
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL146
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST83:
+	.4byte	.LVL139
+	.4byte	.LVL140
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL141
+	.4byte	.LVL143
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL144
+	.4byte	.LFE273
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST81:
+	.4byte	.LVL136
+	.4byte	.LVL137
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST80:
+	.4byte	.LVL133
+	.4byte	.LVL134
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL134
+	.4byte	.LFE271
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST79:
+	.4byte	.LVL131
+	.4byte	.LVL132
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL132
+	.4byte	.LFE270
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST424:
+	.4byte	.LVL1307
+	.4byte	.LVL1315
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1315
+	.4byte	.LFE267
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST425:
+	.4byte	.LVL1307
+	.4byte	.LVL1308
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1308
+	.4byte	.LVL1309
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1309
+	.4byte	.LVL1310
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1310
+	.4byte	.LVL1311
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1311
+	.4byte	.LFE267
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST426:
+	.4byte	.LVL1312
+	.4byte	.LVL1313
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1314
+	.4byte	.LVL1316
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST427:
+	.4byte	.LVL1317
+	.4byte	.LVL1318
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x28
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL809
+	.4byte	.LVL811-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL811-1
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST285:
+	.4byte	.LVL812
+	.4byte	.LVL813
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL813
+	.4byte	.LVL815
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST286:
+	.4byte	.LVL810
+	.4byte	.LVL811-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL811-1
+	.4byte	.LFE266
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST790:
+	.4byte	.LVL3133
+	.4byte	.LVL3134
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3134
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST791:
+	.4byte	.LVL3133
+	.4byte	.LVL3135-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3135-1
+	.4byte	.LFE265
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST792:
+	.4byte	.LVL3133
+	.4byte	.LVL3137
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3138
+	.4byte	.LVL3139
+	.2byte	0x1
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+	.4byte	.LVL3139
+	.4byte	.LVL3140
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3141
+	.4byte	.LVL3142
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3142
+	.4byte	.LVL3143
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3143
+	.4byte	.LFE265
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL3135
+	.4byte	.LVL3136
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3136
+	.4byte	.LVL3137
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3139
+	.4byte	.LVL3140
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL252
+	.4byte	.LVL253
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL253
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL257
+	.4byte	.LVL259-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL259-1
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL252
+	.4byte	.LVL253
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL253
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL257
+	.4byte	.LVL258
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL258
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL252
+	.4byte	.LVL253
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL253
+	.4byte	.LVL257
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL257
+	.4byte	.LVL259-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL259-1
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL253
+	.4byte	.LVL254
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL255
+	.4byte	.LVL256
+	.2byte	0x1
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+	.4byte	.LVL260
+	.4byte	.LVL270
+	.2byte	0x1
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+	.4byte	.LVL273
+	.4byte	.LVL279
+	.2byte	0x1
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+	.4byte	.LVL279
+	.4byte	.LFE263
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL262
+	.4byte	.LVL263
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL263
+	.4byte	.LVL275
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST128:
+	.4byte	.LVL267
+	.4byte	.LVL275
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1762
+	.4byte	.LVL1764
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1764
+	.4byte	.LVL1765
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1766-1
+	.4byte	.LVL1766
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1766
+	.4byte	.LVL1767
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1767
+	.4byte	.LVL1796
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1796
+	.4byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1762
+	.4byte	.LVL1765
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1766-1
+	.4byte	.LFE262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -96
+	.4byte	0
+	.4byte	0
+.LLST518:
+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1762
+	.4byte	.LVL1765
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1766-1
+	.4byte	.LFE262
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST519:
+	.4byte	.LVL1758
+	.4byte	.LVL1761
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1761
+	.4byte	.LVL1765
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1766-1
+	.4byte	.LFE262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST520:
+	.4byte	.LVL1762
+	.4byte	.LVL1763
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1763
+	.4byte	.LVL1764
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1767
+	.4byte	.LVL1786
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1787
+	.4byte	.LVL1792
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1792
+	.4byte	.LVL1796
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1796
+	.4byte	.LFE262
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST521:
+	.4byte	.LVL1758
+	.4byte	.LVL1762
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1762
+	.4byte	.LVL1764
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1764
+	.4byte	.LVL1765
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1766-1
+	.4byte	.LVL1766
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1766
+	.4byte	.LVL1767
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1767
+	.4byte	.LVL1796
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1796
+	.4byte	.LFE262
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST522:
+	.4byte	.LVL1769
+	.4byte	.LVL1770
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1770
+	.4byte	.LVL1792
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST523:
+	.4byte	.LVL1774
+	.4byte	.LVL1792
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST524:
+	.4byte	.LVL1759
+	.4byte	.LVL1760
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1760
+	.4byte	.LFE262
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -88
+	.4byte	0
+	.4byte	0
+.LLST525:
+	.4byte	.LVL1759
+	.4byte	.LVL1762
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1762
+	.4byte	.LVL1765
+	.2byte	0x9
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1765
+	.4byte	.LVL1766-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1767
+	.4byte	.LFE262
+	.2byte	0x9
+	.byte	0x91
+	.sleb128 -92
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST493:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1651-1
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST494:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1651-1
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST495:
+	.4byte	.LVL1647
+	.4byte	.LVL1648
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1648
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1651-1
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST496:
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1652
+	.4byte	.LVL1653
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1653
+	.4byte	.LVL1660
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1660
+	.4byte	.LVL1661
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1661
+	.4byte	.LVL1718
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL1718
+	.4byte	.LVL1719
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1719
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST498:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1650
+	.4byte	.LVL1651
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1658
+	.4byte	.LVL1659
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1661
+	.4byte	.LVL1663
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1663
+	.4byte	.LVL1674
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1679
+	.4byte	.LVL1680
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1680
+	.4byte	.LVL1685
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1690
+	.4byte	.LVL1692
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1692
+	.4byte	.LVL1694
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1694
+	.4byte	.LVL1695
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1695
+	.4byte	.LVL1700
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1700
+	.4byte	.LVL1702
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1702
+	.4byte	.LVL1714
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1721
+	.4byte	.LVL1723
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1723
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST499:
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1652
+	.4byte	.LFE261
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST500:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x8
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1652
+	.4byte	.LFE261
+	.2byte	0x8
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST501:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gNandRandomizer
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1650
+	.4byte	.LVL1651-1
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gNandRandomizer
+	.4byte	.LVL1652
+	.4byte	.LFE261
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST502:
+	.4byte	.LVL1671
+	.4byte	.LVL1675
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1682
+	.4byte	.LVL1684
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST503:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1650
+	.4byte	.LVL1651
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1677
+	.4byte	.LVL1678
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1678
+	.4byte	.LVL1680
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1686
+	.4byte	.LVL1692
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1694
+	.4byte	.LVL1697
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1697
+	.4byte	.LVL1698
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1698
+	.4byte	.LVL1701
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1704
+	.4byte	.LVL1705
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1705
+	.4byte	.LVL1708
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1708
+	.4byte	.LVL1709
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1709
+	.4byte	.LVL1710-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1710-1
+	.4byte	.LVL1712
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1713
+	.4byte	.LVL1714
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1721
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST504:
+	.4byte	.LVL1647
+	.4byte	.LVL1649
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1649
+	.4byte	.LVL1650
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1650
+	.4byte	.LVL1651
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1652
+	.4byte	.LVL1689
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1689
+	.4byte	.LVL1690
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1690
+	.4byte	.LFE261
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST505:
+	.4byte	.LVL1654
+	.4byte	.LVL1655
+	.2byte	0x8
+	.byte	0x73
+	.sleb128 0
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x1f
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1655
+	.4byte	.LVL1656
+	.2byte	0x9
+	.byte	0x70
+	.sleb128 4
+	.byte	0x6
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x1f
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1656
+	.4byte	.LFE261
+	.2byte	0x9
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x40
+	.byte	0x4b
+	.byte	0x24
+	.byte	0x1f
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST506:
+	.4byte	.LVL1666
+	.4byte	.LVL1668-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST507:
+	.4byte	.LVL1695
+	.4byte	.LVL1700
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST117:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST118:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST119:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST120:
+	.4byte	.LVL234
+	.4byte	.LVL235
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL235
+	.4byte	.LFE260
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST121:
+	.4byte	.LVL244
+	.4byte	.LVL245
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x1f
+	.byte	0x9f
+	.4byte	.LVL248
+	.4byte	.LVL249
+	.2byte	0x5
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST508:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1727
+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1756
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST509:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1727
+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL1756
+	.4byte	.LVL1757
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1757
+	.4byte	.LFE259
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST510:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1726
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST511:
+	.4byte	.LVL1724
+	.4byte	.LVL1725
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1725
+	.4byte	.LFE259
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	0
+	.4byte	0
+.LLST512:
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1756
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST513:
+	.4byte	.LVL1738
+	.4byte	.LVL1739
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x1f
+	.byte	0x9f
+	.4byte	.LVL1744
+	.4byte	.LVL1745
+	.2byte	0x5
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST514:
+	.4byte	.LVL1724
+	.4byte	.LVL1726
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1726
+	.4byte	.LVL1727
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1727
+	.4byte	.LVL1728
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1728
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1747
+	.4byte	.LVL1756
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1756
+	.4byte	.LFE259
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST515:
+	.4byte	.LVL1731
+	.4byte	.LVL1747
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST486:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST487:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST488:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST489:
+	.4byte	.LVL1623
+	.4byte	.LVL1624
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST490:
+	.4byte	.LVL1622
+	.4byte	.LVL1624
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1624
+	.4byte	.LFE258
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST491:
+	.4byte	.LVL1623
+	.4byte	.LVL1624
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1634
+	.4byte	.LVL1635
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1635
+	.4byte	.LVL1641
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST492:
+	.4byte	.LVL1623
+	.4byte	.LVL1624
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1638
+	.4byte	.LVL1639
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1639
+	.4byte	.LVL1642
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1646
+	.4byte	.LFE258
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST96:
+	.4byte	.LVL183
+	.4byte	.LVL184
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL184
+	.4byte	.LFE257
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST97:
+	.4byte	.LVL183
+	.4byte	.LVL184
+	.2byte	0xb
+	.byte	0x70
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL184
+	.4byte	.LVL192
+	.2byte	0xb
+	.byte	0x76
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST98:
+	.4byte	.LVL183
+	.4byte	.LVL184
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.4byte	.LVL184
+	.4byte	.LVL185-1
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 0
+	.byte	0x34
+	.byte	0x24
+	.byte	0x3
+	.4byte	gDieOp
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST99:
+	.4byte	.LVL187
+	.4byte	.LVL188
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL188
+	.4byte	.LVL189
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL189
+	.4byte	.LVL190
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL190
+	.4byte	.LVL191
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST73:
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL125
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST74:
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL125
+	.4byte	.LFE256
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST75:
+	.4byte	.LVL124
+	.4byte	.LVL125
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL125
+	.4byte	.LFE256
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST66:
+	.4byte	.LVL110
+	.4byte	.LVL113
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL113
+	.4byte	.LVL122
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL122
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST67:
+	.4byte	.LVL110
+	.4byte	.LVL117-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL117-1
+	.4byte	.LVL118
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL118
+	.4byte	.LFE255
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST68:
+	.4byte	.LVL110
+	.4byte	.LVL114
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL114
+	.4byte	.LVL118
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL118
+	.4byte	.LVL119
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL119
+	.4byte	.LVL122
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL122
+	.4byte	.LVL123
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL123
+	.4byte	.LFE255
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST71:
+	.4byte	.LVL115
+	.4byte	.LVL116
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL120
+	.4byte	.LVL122
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST69:
+	.4byte	.LVL110
+	.4byte	.LVL111
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL111
+	.4byte	.LVL112
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST70:
+	.4byte	.LVL111
+	.4byte	.LVL112
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST72:
+	.4byte	.LVL116
+	.4byte	.LVL117
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST56:
+	.4byte	.LVL90
+	.4byte	.LVL96
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL96
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST57:
+	.4byte	.LVL90
+	.4byte	.LVL93
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL93
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST58:
+	.4byte	.LVL90
+	.4byte	.LVL94
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL94
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST59:
+	.4byte	.LVL90
+	.4byte	.LVL91
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL91
+	.4byte	.LFE254
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST60:
+	.4byte	.LVL90
+	.4byte	.LVL109
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL109
+	.4byte	.LFE254
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST61:
+	.4byte	.LVL97
+	.4byte	.LVL98-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL98-1
+	.4byte	.LVL108
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL108
+	.4byte	.LVL109
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL109
+	.4byte	.LFE254
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST62:
+	.4byte	.LVL102
+	.4byte	.LVL105
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST63:
+	.4byte	.LVL101
+	.4byte	.LVL104
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST64:
+	.4byte	.LVL106
+	.4byte	.LVL107
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL107
+	.4byte	.LVL109
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL109
+	.4byte	.LFE254
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST65:
+	.4byte	.LVL95
+	.4byte	.LVL98-1
+	.2byte	0x9
+	.byte	0x73
+	.sleb128 0
+	.byte	0xc
+	.4byte	0x7fffffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL98-1
+	.4byte	.LFE254
+	.2byte	0xa
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0xc
+	.4byte	0x7fffffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST133:
+	.4byte	.LVL294
+	.4byte	.LVL296
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST135:
+	.4byte	.LVL295
+	.4byte	.LVL296
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST474:
+	.4byte	.LVL1561
+	.4byte	.LVL1562
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1562
+	.4byte	.LVL1568
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1568
+	.4byte	.LVL1569-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1569-1
+	.4byte	.LFE252
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST475:
+	.4byte	.LVL1569
+	.4byte	.LVL1570
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1570
+	.4byte	.LVL1585
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1621
+	.4byte	.LFE252
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST476:
+	.4byte	.LVL1591
+	.4byte	.LVL1592
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST482:
+	.4byte	.LVL1603
+	.4byte	.LVL1604
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST483:
+	.4byte	.LVL1603
+	.4byte	.LVL1604
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1604
+	.4byte	.LVL1606-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST484:
+	.4byte	.LVL1619
+	.4byte	.LVL1620
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gReadRetryInfo+20
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST485:
+	.4byte	.LVL1615
+	.4byte	.LVL1618
+	.2byte	0x6
+	.byte	0x3
+	.4byte	gNandPhyInfo
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST477:
+	.4byte	.LVL1571
+	.4byte	.LVL1579
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST478:
+	.4byte	.LVL1571
+	.4byte	.LVL1579
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST479:
+	.4byte	.LVL1571
+	.4byte	.LVL1581
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1581
+	.4byte	.LVL1584
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -8
+	.byte	0x9f
+	.4byte	.LVL1621
+	.4byte	.LFE252
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST480:
+	.4byte	.LVL1572
+	.4byte	.LVL1573
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1573
+	.4byte	.LVL1574
+	.2byte	0xa
+	.byte	0x75
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST481:
+	.4byte	.LVL1576
+	.4byte	.LVL1577
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST308:
+	.4byte	.LVL903
+	.4byte	.LVL904
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL904
+	.4byte	.LVL906
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL906
+	.4byte	.LVL907
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL907
+	.4byte	.LVL909-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL911
+	.4byte	.LVL913
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST309:
+	.4byte	.LVL903
+	.4byte	.LVL906
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL906
+	.4byte	.LVL911
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL911
+	.4byte	.LVL913
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST307:
+	.4byte	.LVL901
+	.4byte	.LVL902-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL902-1
+	.4byte	.LFE250
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST413:
+	.4byte	.LVL1268
+	.4byte	.LVL1271
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1271
+	.4byte	.LFE249
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST414:
+	.4byte	.LVL1269
+	.4byte	.LVL1273
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1274
+	.4byte	.LVL1277
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1283
+	.4byte	.LVL1284
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1287
+	.4byte	.LFE249
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST283:
+	.4byte	.LVL798
+	.4byte	.LVL799
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL800
+	.4byte	.LVL803
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL804
+	.4byte	.LVL805
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL806
+	.4byte	.LFE248
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST415:
+	.4byte	.LVL1289
+	.4byte	.LVL1293
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1293
+	.4byte	.LVL1297
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1297
+	.4byte	.LVL1299
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1299
+	.4byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST416:
+	.4byte	.LVL1289
+	.4byte	.LVL1291
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1291
+	.4byte	.LVL1300
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1300
+	.4byte	.LFE247
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST417:
+	.4byte	.LVL1289
+	.4byte	.LVL1290
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1290
+	.4byte	.LVL1293
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL1293
+	.4byte	.LVL1295
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1296
+	.4byte	.LVL1297
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1297
+	.4byte	.LVL1299
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST418:
+	.4byte	.LVL1290
+	.4byte	.LVL1292
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1292
+	.4byte	.LVL1293
+	.2byte	0x8
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x13
+	.4byte	.LVL1297
+	.4byte	.LVL1298
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1298
+	.4byte	.LVL1299
+	.2byte	0x8
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x13
+	.4byte	0
+	.4byte	0
+.LLST397:
+	.4byte	.LVL1202
+	.4byte	.LVL1208-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1208-1
+	.4byte	.LFE245
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST398:
+	.4byte	.LVL1202
+	.4byte	.LVL1208-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1208-1
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST399:
+	.4byte	.LVL1202
+	.4byte	.LVL1203
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1203
+	.4byte	.LVL1209
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1212
+	.4byte	.LVL1218
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1218
+	.4byte	.LVL1219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1219
+	.4byte	.LVL1221
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1221
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST400:
+	.4byte	.LVL1202
+	.4byte	.LVL1204
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1204
+	.4byte	.LVL1209
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1212
+	.4byte	.LVL1218
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1218
+	.4byte	.LVL1219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1219
+	.4byte	.LVL1221
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1221
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST401:
+	.4byte	.LVL1202
+	.4byte	.LVL1208
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1217
+	.4byte	.LFE245
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST402:
+	.4byte	.LVL1202
+	.4byte	.LVL1208
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1208
+	.4byte	.LVL1210
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1212
+	.4byte	.LVL1222
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST403:
+	.4byte	.LVL1205
+	.4byte	.LVL1213
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1214
+	.4byte	.LFE245
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST404:
+	.4byte	.LVL1206
+	.4byte	.LVL1211
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL1211
+	.4byte	.LVL1212
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL1212
+	.4byte	.LFE245
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST86:
+	.4byte	.LVL156
+	.4byte	.LVL160
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL160
+	.4byte	.LVL169
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL169
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL173
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST87:
+	.4byte	.LVL156
+	.4byte	.LVL164-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL164-1
+	.4byte	.LVL169
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL169
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL173
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST88:
+	.4byte	.LVL156
+	.4byte	.LVL158
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL158
+	.4byte	.LVL166
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL166
+	.4byte	.LVL169
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL169
+	.4byte	.LVL170
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL170
+	.4byte	.LVL171
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL171
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL173
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST89:
+	.4byte	.LVL156
+	.4byte	.LVL157
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL157
+	.4byte	.LFE244
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST90:
+	.4byte	.LVL165
+	.4byte	.LVL166
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL166
+	.4byte	.LVL167
+	.2byte	0x9
+	.byte	0x73
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL173
+	.4byte	.LVL174
+	.2byte	0x9
+	.byte	0x73
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL177
+	.4byte	.LFE244
+	.2byte	0xb
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x94
+	.byte	0x1
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST91:
+	.4byte	.LVL159
+	.4byte	.LVL161
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL161
+	.4byte	.LVL166
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL172
+	.4byte	.LVL173
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST92:
+	.4byte	.LVL159
+	.4byte	.LVL162
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL162
+	.4byte	.LVL163
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST93:
+	.4byte	.LVL175
+	.4byte	.LVL176
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST386:
+	.4byte	.LVL1174
+	.4byte	.LVL1179
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1179
+	.4byte	.LVL1190
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1193
+	.4byte	.LFE243
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST387:
+	.4byte	.LVL1174
+	.4byte	.LVL1180-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1180-1
+	.4byte	.LVL1190
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1193
+	.4byte	.LFE243
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST388:
+	.4byte	.LVL1174
+	.4byte	.LVL1180-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1180-1
+	.4byte	.LVL1184
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1193
+	.4byte	.LVL1197
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1197
+	.4byte	.LVL1198
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1200
+	.4byte	.LFE243
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST389:
+	.4byte	.LVL1174
+	.4byte	.LVL1175
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1175
+	.4byte	.LVL1184
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1190
+	.4byte	.LVL1197
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1197
+	.4byte	.LVL1198
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1200
+	.4byte	.LFE243
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST390:
+	.4byte	.LVL1174
+	.4byte	.LVL1183
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1196
+	.4byte	.LFE243
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST391:
+	.4byte	.LVL1174
+	.4byte	.LVL1183
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1183
+	.4byte	.LVL1187
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1187
+	.4byte	.LVL1188
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1190
+	.4byte	.LVL1193
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1193
+	.4byte	.LVL1201
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST392:
+	.4byte	.LVL1182
+	.4byte	.LVL1183
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1183
+	.4byte	.LVL1190
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1193
+	.4byte	.LVL1199
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1199
+	.4byte	.LVL1200
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -44
+	.byte	0x6
+	.byte	0x31
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1200
+	.4byte	.LFE243
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST393:
+	.4byte	.LVL1176
+	.4byte	.LVL1177
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1177
+	.4byte	.LVL1178
+	.2byte	0xf
+	.byte	0x3
+	.4byte	gNandFlashEccBits
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1178
+	.4byte	.LVL1190
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1190
+	.4byte	.LVL1191
+	.2byte	0x7
+	.byte	0x74
+	.sleb128 0
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1191
+	.4byte	.LVL1192
+	.2byte	0xf
+	.byte	0x3
+	.4byte	gNandFlashEccBits
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x33
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1192
+	.4byte	.LFE243
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST394:
+	.4byte	.LVL1180
+	.4byte	.LVL1181
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1181
+	.4byte	.LVL1182
+	.2byte	0xa
+	.byte	0x77
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST395:
+	.4byte	.LVL1185
+	.4byte	.LVL1186
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST396:
+	.4byte	.LVL1194
+	.4byte	.LVL1195
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST379:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1161-1
+	.4byte	.LFE242
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST380:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1161-1
+	.4byte	.LFE242
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST381:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1161-1
+	.4byte	.LVL1163
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1166
+	.4byte	.LVL1169
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1169
+	.4byte	.LVL1170
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1170
+	.4byte	.LVL1172
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1172
+	.4byte	.LFE242
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST382:
+	.4byte	.LVL1160
+	.4byte	.LVL1161-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1161-1
+	.4byte	.LVL1163
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1166
+	.4byte	.LVL1169
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1169
+	.4byte	.LVL1170
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1170
+	.4byte	.LVL1172
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1172
+	.4byte	.LFE242
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST383:
+	.4byte	.LVL1160
+	.4byte	.LVL1162
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1168
+	.4byte	.LFE242
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST384:
+	.4byte	.LVL1160
+	.4byte	.LVL1162
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1162
+	.4byte	.LVL1165
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1166
+	.4byte	.LVL1173
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST385:
+	.4byte	.LVL1161
+	.4byte	.LVL1162
+	.2byte	0xa
+	.byte	0x77
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST52:
+	.4byte	.LVL83
+	.4byte	.LVL85
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL85
+	.4byte	.LFE241
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST53:
+	.4byte	.LVL83
+	.4byte	.LVL84
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL84
+	.4byte	.LFE241
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST54:
+	.4byte	.LVL83
+	.4byte	.LVL85
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL85
+	.4byte	.LVL87
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL87
+	.4byte	.LVL89
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL89
+	.4byte	.LFE241
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST55:
+	.4byte	.LVL88
+	.4byte	.LVL89
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x12c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST370:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1128-1
+	.4byte	.LFE240
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST371:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1128-1
+	.4byte	.LFE240
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST372:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1128-1
+	.4byte	.LVL1138
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1143
+	.4byte	.LVL1151
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1151
+	.4byte	.LVL1152
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1152
+	.4byte	.LVL1158
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST373:
+	.4byte	.LVL1127
+	.4byte	.LVL1128-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1128-1
+	.4byte	.LVL1138
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1143
+	.4byte	.LVL1151
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1151
+	.4byte	.LVL1152
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1152
+	.4byte	.LVL1158
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST374:
+	.4byte	.LVL1127
+	.4byte	.LVL1137
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1143
+	.4byte	.LVL1144
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1148
+	.4byte	.LVL1149
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1149
+	.4byte	.LVL1154
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1157
+	.4byte	.LVL1158
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST375:
+	.4byte	.LVL1127
+	.4byte	.LVL1137
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1137
+	.4byte	.LVL1138
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1138
+	.4byte	.LVL1143
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1143
+	.4byte	.LVL1144
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1144
+	.4byte	.LVL1151
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1151
+	.4byte	.LVL1152
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1152
+	.4byte	.LVL1158
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1158
+	.4byte	.LFE240
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST376:
+	.4byte	.LVL1127
+	.4byte	.LVL1131
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1131
+	.4byte	.LVL1133
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1134
+	.4byte	.LVL1135
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1135
+	.4byte	.LVL1143
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	.LVL1143
+	.4byte	.LVL1144
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1144
+	.4byte	.LFE240
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -48
+	.4byte	0
+	.4byte	0
+.LLST377:
+	.4byte	.LVL1136
+	.4byte	.LVL1137
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1137
+	.4byte	.LVL1143
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1144
+	.4byte	.LFE240
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST378:
+	.4byte	.LVL1128
+	.4byte	.LVL1129
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1129
+	.4byte	.LVL1130
+	.2byte	0xa
+	.byte	0x76
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST48:
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL78
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST49:
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL78
+	.4byte	.LFE239
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST50:
+	.4byte	.LVL77
+	.4byte	.LVL78
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL78
+	.4byte	.LFE239
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST51:
+	.4byte	.LVL80
+	.4byte	.LVL81
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST113:
+	.4byte	.LVL226
+	.4byte	.LVL228
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL228
+	.4byte	.LVL231
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL231
+	.4byte	.LVL232
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL232
+	.4byte	.LFE238
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST114:
+	.4byte	.LVL226
+	.4byte	.LVL229-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL229-1
+	.4byte	.LFE238
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST115:
+	.4byte	.LVL229
+	.4byte	.LVL230
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL230
+	.4byte	.LVL232-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL232
+	.4byte	.LFE238
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST116:
+	.4byte	.LVL227
+	.4byte	.LVL229
+	.2byte	0x3
+	.byte	0x8
+	.byte	0xc8
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST452:
+	.4byte	.LVL1417
+	.4byte	.LVL1430
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1430
+	.4byte	.LVL1432
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1432
+	.4byte	.LVL1434
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1434
+	.4byte	.LVL1436
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1436
+	.4byte	.LVL1437
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1437
+	.4byte	.LVL1452
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1452
+	.4byte	.LVL1469
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1469
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST453:
+	.4byte	.LVL1418
+	.4byte	.LVL1419
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1419
+	.4byte	.LVL1420
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1420
+	.4byte	.LVL1421
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1421
+	.4byte	.LVL1422
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1422
+	.4byte	.LVL1423
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1423
+	.4byte	.LVL1424
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1424
+	.4byte	.LVL1425
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1425
+	.4byte	.LVL1426
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1426
+	.4byte	.LVL1427
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1427
+	.4byte	.LVL1428
+	.2byte	0x2
+	.byte	0x35
+	.byte	0x9f
+	.4byte	.LVL1428
+	.4byte	.LVL1429
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1429
+	.4byte	.LVL1430
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1434
+	.4byte	.LVL1443
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1443
+	.4byte	.LVL1444
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1444
+	.4byte	.LVL1445
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1445
+	.4byte	.LVL1446
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1446
+	.4byte	.LVL1447
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL1447
+	.4byte	.LVL1448
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1448
+	.4byte	.LVL1449
+	.2byte	0x2
+	.byte	0x35
+	.byte	0x9f
+	.4byte	.LVL1449
+	.4byte	.LVL1450
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1450
+	.4byte	.LVL1451
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1451
+	.4byte	.LVL1452
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1462
+	.4byte	.LVL1463
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL1463
+	.4byte	.LVL1467
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1496
+	.4byte	.LVL1497
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1497
+	.4byte	.LVL1498
+	.2byte	0x6
+	.byte	0x73
+	.sleb128 0
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1498
+	.4byte	.LVL1499
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1499
+	.4byte	.LVL1500
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1500
+	.4byte	.LVL1503
+	.2byte	0x5
+	.byte	0x38
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1503
+	.4byte	.LVL1504
+	.2byte	0x5
+	.byte	0x39
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1504
+	.4byte	.LVL1505
+	.2byte	0x5
+	.byte	0x38
+	.byte	0x73
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1505
+	.4byte	.LVL1518
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1532
+	.4byte	.LVL1534
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1534
+	.4byte	.LVL1538
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1538
+	.4byte	.LVL1539
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1539
+	.4byte	.LVL1540
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST454:
+	.4byte	.LVL1500
+	.4byte	.LVL1501
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1501
+	.4byte	.LVL1505
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1507
+	.4byte	.LVL1509
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1509
+	.4byte	.LVL1510
+	.2byte	0x6
+	.byte	0x40
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1510
+	.4byte	.LVL1511
+	.2byte	0x6
+	.byte	0x41
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1511
+	.4byte	.LVL1512
+	.2byte	0x5
+	.byte	0x40
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1512
+	.4byte	.LVL1519
+	.2byte	0x6
+	.byte	0x40
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1519
+	.4byte	.LVL1521
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1531
+	.4byte	.LVL1533
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST455:
+	.4byte	.LVL1456
+	.4byte	.LVL1457
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1457
+	.4byte	.LVL1460
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1460
+	.4byte	.LVL1461
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1462
+	.4byte	.LVL1465
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1465
+	.4byte	.LVL1466
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1482
+	.4byte	.LVL1484
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1484
+	.4byte	.LVL1486
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1487
+	.4byte	.LVL1488
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1488
+	.4byte	.LVL1489
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1489
+	.4byte	.LVL1490
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1494
+	.4byte	.LVL1495
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1524
+	.4byte	.LVL1525
+	.2byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1525
+	.4byte	.LVL1526
+	.2byte	0x6
+	.byte	0x71
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -8
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1527
+	.4byte	.LVL1528
+	.2byte	0x6
+	.byte	0x71
+	.sleb128 0
+	.byte	0x73
+	.sleb128 -8
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1534
+	.4byte	.LVL1535
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1535
+	.4byte	.LVL1536
+	.2byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1537
+	.4byte	.LVL1539
+	.2byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST456:
+	.4byte	.LVL1453
+	.4byte	.LVL1454
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1454
+	.4byte	.LVL1457
+	.2byte	0xb
+	.byte	0x78
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x3
+	.4byte	.LANCHOR26
+	.byte	0x22
+	.4byte	.LVL1471
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST457:
+	.4byte	.LVL1432
+	.4byte	.LVL1433
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1452
+	.4byte	.LVL1468
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1470
+	.4byte	.LVL1477
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1478
+	.4byte	.LVL1479
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1492
+	.4byte	.LVL1493
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -84
+	.4byte	.LVL1543
+	.4byte	.LVL1544
+	.2byte	0x8
+	.byte	0x91
+	.sleb128 -76
+	.byte	0x94
+	.byte	0x1
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST458:
+	.4byte	.LVL1417
+	.4byte	.LVL1430
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1431
+	.4byte	.LVL1434
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1434
+	.4byte	.LVL1435
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1435
+	.4byte	.LVL1437
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1437
+	.4byte	.LVL1452
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL1452
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST459:
+	.4byte	.LVL1417
+	.4byte	.LVL1430
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1431
+	.4byte	.LVL1434
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1434
+	.4byte	.LVL1435
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1435
+	.4byte	.LVL1437
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1437
+	.4byte	.LVL1438
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1438
+	.4byte	.LVL1439
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1440
+	.4byte	.LVL1441
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1441
+	.4byte	.LVL1442
+	.2byte	0x2
+	.byte	0x3c
+	.byte	0x9f
+	.4byte	.LVL1442
+	.4byte	.LVL1452
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL1452
+	.4byte	.LFE236
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST460:
+	.4byte	.LVL1482
+	.4byte	.LVL1491-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1494
+	.4byte	.LVL1495
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1496
+	.4byte	.LVL1522-1
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL1524
+	.4byte	.LVL1525
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1525
+	.4byte	.LVL1529-1
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -7
+	.byte	0x9f
+	.4byte	.LVL1530
+	.4byte	.LVL1535
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL1535
+	.4byte	.LVL1536
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1536
+	.4byte	.LVL1537
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1537
+	.4byte	.LVL1539
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1539
+	.4byte	.LVL1541-1
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x1
+	.byte	0x5e
+	.4byte	0
+	.4byte	0
+.LLST461:
+	.4byte	.LVL1499
+	.4byte	.LVL1500
+	.2byte	0x5
+	.byte	0x3
+	.4byte	gFlashPageBuffer0
+	.4byte	0
+	.4byte	0
+.LLST462:
+	.4byte	.LVL1495
+	.4byte	.LVL1524
+	.2byte	0x10
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1530
+	.4byte	.LVL1531
+	.2byte	0x10
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x40
+	.byte	0x24
+	.byte	0x40
+	.byte	0x26
+	.byte	0x1e
+	.byte	0x32
+	.byte	0x26
+	.byte	0x9f
+	.4byte	.LVL1531
+	.4byte	.LVL1532
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	.LVL1532
+	.4byte	.LVL1541-1
+	.2byte	0x1
+	.byte	0x5c
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x2
+	.byte	0x38
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST463:
+	.4byte	.LVL1455
+	.4byte	.LVL1469
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST464:
+	.4byte	.LVL1458
+	.4byte	.LVL1459
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST465:
+	.4byte	.LVL1480
+	.4byte	.LVL1481
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL1481
+	.4byte	.LVL1483
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1493
+	.4byte	.LVL1494
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST466:
+	.4byte	.LVL1471
+	.4byte	.LVL1475
+	.2byte	0xe
+	.byte	0x77
+	.sleb128 0
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x24
+	.byte	0x3
+	.4byte	gReadRetryInfo+20
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL1475
+	.4byte	.LVL1476
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1476
+	.4byte	.LVL1477
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL1478
+	.4byte	.LVL1479
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL1492
+	.4byte	.LVL1493
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST468:
+	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1506
+	.4byte	.LVL1513
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1513
+	.4byte	.LVL1514
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1514
+	.4byte	.LVL1515
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST469:
+	.4byte	.LVL1507
+	.4byte	.LVL1508
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1508
+	.4byte	.LVL1524
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	.LVL1531
+	.4byte	.LFE236
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST470:
+	.4byte	.LVL1505
+	.4byte	.LVL1506
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1506
+	.4byte	.LVL1517
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1517
+	.4byte	.LVL1519
+	.2byte	0x6
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL1519
+	.4byte	.LVL1522-1
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL1531
+	.4byte	.LVL1534
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -52
+	.byte	0x6
+	.byte	0x91
+	.sleb128 -36
+	.byte	0x6
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST471:
+	.4byte	.LVL1506
+	.4byte	.LVL1509
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1509
+	.4byte	.LVL1524
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1531
+	.4byte	.LVL1534
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	.LVL1545
+	.4byte	.LVL1546
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -80
+	.4byte	0
+	.4byte	0
+.LLST467:
+	.4byte	.LVL1471
+	.4byte	.LVL1472
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1472
+	.4byte	.LVL1473
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST279:
+	.4byte	.LVL745
+	.4byte	.LVL746
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL746
+	.4byte	.LVL753
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL753
+	.4byte	.LVL755
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL755
+	.4byte	.LVL760
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL760
+	.4byte	.LVL768
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL768
+	.4byte	.LVL773
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL773
+	.4byte	.LVL788
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL788
+	.4byte	.LFE233
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST280:
+	.4byte	.LVL745
+	.4byte	.LVL749
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL749
+	.4byte	.LVL750
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL750
+	.4byte	.LVL753
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL753
+	.4byte	.LVL754
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL754
+	.4byte	.LVL760
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL760
+	.4byte	.LVL761
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL761
+	.4byte	.LVL766
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL766
+	.4byte	.LVL767
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL767
+	.4byte	.LVL773
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL773
+	.4byte	.LVL780
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL780
+	.4byte	.LVL783
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL783
+	.4byte	.LVL789
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL789
+	.4byte	.LVL794
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL794
+	.4byte	.LFE233
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST281:
+	.4byte	.LVL746
+	.4byte	.LVL747
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL747
+	.4byte	.LVL748
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL748
+	.4byte	.LVL749
+	.2byte	0xc
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x31
+	.byte	0x24
+	.byte	0x73
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL751
+	.4byte	.LVL752
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL752
+	.4byte	.LVL753
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL756
+	.4byte	.LVL757
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL757
+	.4byte	.LVL758
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL758
+	.4byte	.LVL759
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL762
+	.4byte	.LVL763
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL763
+	.4byte	.LVL764
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL764
+	.4byte	.LVL765
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL769
+	.4byte	.LVL770
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL770
+	.4byte	.LVL771
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL771
+	.4byte	.LVL772
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL774
+	.4byte	.LVL775
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL775
+	.4byte	.LVL776
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	.LVL776
+	.4byte	.LVL777
+	.2byte	0x2
+	.byte	0x32
+	.byte	0x9f
+	.4byte	.LVL777
+	.4byte	.LVL778
+	.2byte	0x2
+	.byte	0x33
+	.byte	0x9f
+	.4byte	.LVL778
+	.4byte	.LVL779
+	.2byte	0x2
+	.byte	0x34
+	.byte	0x9f
+	.4byte	.LVL779
+	.4byte	.LVL780
+	.2byte	0x2
+	.byte	0x37
+	.byte	0x9f
+	.4byte	.LVL780
+	.4byte	.LVL781
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL782
+	.4byte	.LVL783
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL784
+	.4byte	.LVL785
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL785
+	.4byte	.LVL786
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL786
+	.4byte	.LVL787
+	.2byte	0xc
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x31
+	.byte	0x24
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL790
+	.4byte	.LVL791
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL791
+	.4byte	.LVL792
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL792
+	.4byte	.LVL793
+	.2byte	0x3
+	.byte	0x71
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL794
+	.4byte	.LVL795
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST282:
+	.4byte	.LVL751
+	.4byte	.LVL753
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL794
+	.4byte	.LFE233
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST411:
+	.4byte	.LVL1253
+	.4byte	.LVL1254
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1254
+	.4byte	.LVL1260
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1260
+	.4byte	.LVL1263
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1263
+	.4byte	.LVL1264
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1266
+	.4byte	.LFE231
+	.2byte	0x3
+	.byte	0x72
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST412:
+	.4byte	.LVL1243
+	.4byte	.LVL1254
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1254
+	.4byte	.LVL1261
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1261
+	.4byte	.LVL1262
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1262
+	.4byte	.LVL1266
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1266
+	.4byte	.LVL1267
+	.2byte	0x3
+	.byte	0x75
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST365:
+	.4byte	.LVL1099
+	.4byte	.LVL1100
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1100
+	.4byte	.LVL1109
+	.2byte	0x5
+	.byte	0x34
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1109
+	.4byte	.LVL1110
+	.2byte	0x5
+	.byte	0x35
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1110
+	.4byte	.LVL1124
+	.2byte	0x5
+	.byte	0x34
+	.byte	0x77
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST366:
+	.4byte	.LVL1100
+	.4byte	.LVL1101
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1101
+	.4byte	.LVL1109
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1121
+	.4byte	.LVL1122
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST367:
+	.4byte	.LVL1096
+	.4byte	.LVL1100
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1100
+	.4byte	.LVL1115
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1117
+	.4byte	.LVL1118
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1119
+	.4byte	.LVL1120
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1121
+	.4byte	.LVL1126
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1126
+	.4byte	.LFE230
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST368:
+	.4byte	.LVL1096
+	.4byte	.LVL1100
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1103
+	.4byte	.LVL1104
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1104
+	.4byte	.LVL1105
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1106
+	.4byte	.LVL1107
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1107
+	.4byte	.LVL1109
+	.2byte	0x3
+	.byte	0x70
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST369:
+	.4byte	.LVL1097
+	.4byte	.LVL1098
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1098
+	.4byte	.LVL1126
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1126
+	.4byte	.LFE230
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST44:
+	.4byte	.LVL70
+	.4byte	.LVL72
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL72
+	.4byte	.LFE229
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST45:
+	.4byte	.LVL70
+	.4byte	.LVL71
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL71
+	.4byte	.LFE229
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST46:
+	.4byte	.LVL70
+	.4byte	.LVL72
+	.2byte	0x6
+	.byte	0xc
+	.4byte	0x47c6a7e6
+	.byte	0x9f
+	.4byte	.LVL72
+	.4byte	.LFE229
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST47:
+	.4byte	.LVL70
+	.4byte	.LVL72
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL72
+	.4byte	.LVL73
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL74
+	.4byte	.LVL75
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL75
+	.4byte	.LVL76
+	.2byte	0x8
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x20
+	.byte	0x70
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL76
+	.4byte	.LFE229
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST338:
+	.4byte	.LVL1015
+	.4byte	.LVL1020
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1020
+	.4byte	.LVL1048
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST339:
+	.4byte	.LVL1015
+	.4byte	.LVL1021-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1021-1
+	.4byte	.LVL1048
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST340:
+	.4byte	.LVL1015
+	.4byte	.LVL1021-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1021-1
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1030
+	.4byte	.LVL1031
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1031
+	.4byte	.LVL1033
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1049
+	.4byte	.LVL1054
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -52
+	.4byte	0
+	.4byte	0
+.LLST341:
+	.4byte	.LVL1015
+	.4byte	.LVL1016
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1016
+	.4byte	.LVL1029
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1030
+	.4byte	.LVL1031
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1031
+	.4byte	.LVL1033
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1048
+	.4byte	.LVL1054
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST342:
+	.4byte	.LVL1015
+	.4byte	.LVL1030
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	.LVL1030
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST343:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1041
+	.4byte	.LVL1042
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1047
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST344:
+	.4byte	.LVL1034
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST345:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1032
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x9f
+	.4byte	.LVL1032
+	.4byte	.LVL1033
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1037
+	.4byte	.LVL1041
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1041
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x4
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1054
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST346:
+	.4byte	.LVL1025
+	.4byte	.LVL1026
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1026
+	.4byte	.LVL1029
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1030
+	.4byte	.LVL1033
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1036
+	.4byte	.LVL1043
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1049
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST347:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1053
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1054
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST348:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1042
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1050
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL1050
+	.4byte	.LVL1052
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1052
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	0
+	.4byte	0
+.LLST349:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1041
+	.4byte	.LVL1042
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1051
+	.4byte	.LVL1052
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST350:
+	.4byte	.LVL1015
+	.4byte	.LVL1029
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1034
+	.4byte	.LVL1037
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1037
+	.4byte	.LVL1039
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1039
+	.4byte	.LVL1040
+	.2byte	0x6
+	.byte	0x7b
+	.sleb128 0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL1040
+	.4byte	.LVL1048
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1049
+	.4byte	.LVL1054
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1054
+	.4byte	.LVL1055
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1055
+	.4byte	.LFE227
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST351:
+	.4byte	.LVL1015
+	.4byte	.LVL1019
+	.2byte	0x2
+	.byte	0x36
+	.byte	0x9f
+	.4byte	.LVL1019
+	.4byte	.LVL1029
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1030
+	.4byte	.LVL1034
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1048
+	.4byte	.LVL1049
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST352:
+	.4byte	.LVL1017
+	.4byte	.LVL1018
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1018
+	.4byte	.LFE227
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -36
+	.4byte	0
+	.4byte	0
+.LLST110:
+	.4byte	.LVL218
+	.4byte	.LVL223
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL223
+	.4byte	.LVL225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL225
+	.4byte	.LFE226
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST111:
+	.4byte	.LVL218
+	.4byte	.LVL219
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST112:
+	.4byte	.LVL220
+	.4byte	.LVL221
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL221
+	.4byte	.LVL222
+	.2byte	0x8
+	.byte	0x75
+	.sleb128 0
+	.byte	0x3
+	.4byte	.LANCHOR22
+	.byte	0x22
+	.4byte	.LVL225
+	.4byte	.LFE226
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST106:
+	.4byte	.LVL208
+	.4byte	.LVL209-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL209-1
+	.4byte	.LFE225
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST107:
+	.4byte	.LVL208
+	.4byte	.LVL209-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL209-1
+	.4byte	.LFE225
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST108:
+	.4byte	.LVL208
+	.4byte	.LVL209-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL209-1
+	.4byte	.LFE225
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST109:
+	.4byte	.LVL214
+	.4byte	.LVL215
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL215
+	.4byte	.LVL216
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL216
+	.4byte	.LVL217
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL217
+	.4byte	.LFE225
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST405:
+	.4byte	.LVL1223
+	.4byte	.LVL1229
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1229
+	.4byte	.LVL1241
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1241
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST406:
+	.4byte	.LVL1223
+	.4byte	.LVL1227
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1227
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST407:
+	.4byte	.LVL1223
+	.4byte	.LVL1226
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1226
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST408:
+	.4byte	.LVL1223
+	.4byte	.LVL1224
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1224
+	.4byte	.LFE224
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST409:
+	.4byte	.LVL1237
+	.4byte	.LVL1238
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1238
+	.4byte	.LVL1239
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1239
+	.4byte	.LVL1240
+	.2byte	0x5
+	.byte	0x71
+	.sleb128 0
+	.byte	0x31
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL1240
+	.4byte	.LVL1241
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST410:
+	.4byte	.LVL1225
+	.4byte	.LVL1242
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1242
+	.4byte	.LFE224
+	.2byte	0xb
+	.byte	0x3
+	.4byte	gNandParaInfo+9
+	.byte	0x94
+	.byte	0x1
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST353:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1058-1
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST354:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1058-1
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST355:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1058-1
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST356:
+	.4byte	.LVL1057
+	.4byte	.LVL1058-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1058-1
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST357:
+	.4byte	.LVL1059
+	.4byte	.LVL1060
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1063
+	.4byte	.LVL1064
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1064
+	.4byte	.LVL1066
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1066
+	.4byte	.LVL1067
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1067
+	.4byte	.LVL1068
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1068
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1069
+	.4byte	.LVL1071
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1071
+	.4byte	.LVL1072
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1072
+	.4byte	.LVL1073-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1073-1
+	.4byte	.LVL1075
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1077
+	.4byte	.LVL1078
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1078
+	.4byte	.LVL1080
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1080
+	.4byte	.LFE223
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST359:
+	.4byte	.LVL1066
+	.4byte	.LVL1069
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST358:
+	.4byte	.LVL1061
+	.4byte	.LVL1066
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST332:
+	.4byte	.LVL1000
+	.4byte	.LVL1004
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1004
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST333:
+	.4byte	.LVL1000
+	.4byte	.LVL1006-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1006-1
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1014
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST334:
+	.4byte	.LVL1000
+	.4byte	.LVL1003
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL1003
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1014
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST335:
+	.4byte	.LVL1000
+	.4byte	.LVL1001
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1001
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1014
+	.4byte	.LFE222
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x53
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST336:
+	.4byte	.LVL1011
+	.4byte	.LVL1012
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1012
+	.4byte	.LFE222
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST337:
+	.4byte	.LVL1002
+	.4byte	.LVL1014
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST39:
+	.4byte	.LVL64
+	.4byte	.LVL66
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL66
+	.4byte	.LFE221
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST40:
+	.4byte	.LVL64
+	.4byte	.LVL69-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL69-1
+	.4byte	.LFE221
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST41:
+	.4byte	.LVL64
+	.4byte	.LVL65
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL65
+	.4byte	.LVL66
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST42:
+	.4byte	.LVL65
+	.4byte	.LVL67
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST43:
+	.4byte	.LVL68
+	.4byte	.LVL69
+	.2byte	0x3
+	.byte	0x8
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST36:
+	.4byte	.LVL60
+	.4byte	.LVL61
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL61
+	.4byte	.LFE220
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST37:
+	.4byte	.LVL60
+	.4byte	.LVL62
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL62
+	.4byte	.LVL63
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST38:
+	.4byte	.LVL62
+	.4byte	.LVL63
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST34:
+	.4byte	.LVL57
+	.4byte	.LVL58
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL58
+	.4byte	.LVL59
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST35:
+	.4byte	.LVL58
+	.4byte	.LVL59
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST31:
+	.4byte	.LVL53
+	.4byte	.LVL56-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL56-1
+	.4byte	.LFE218
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST32:
+	.4byte	.LVL53
+	.4byte	.LVL54
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST33:
+	.4byte	.LVL54
+	.4byte	.LVL55
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST26:
+	.4byte	.LVL47
+	.4byte	.LVL49
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL49
+	.4byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST27:
+	.4byte	.LVL47
+	.4byte	.LVL51
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL51
+	.4byte	.LVL52
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST28:
+	.4byte	.LVL47
+	.4byte	.LVL50
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL50
+	.4byte	.LFE217
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST29:
+	.4byte	.LVL47
+	.4byte	.LVL48
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL48
+	.4byte	.LVL49
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST30:
+	.4byte	.LVL48
+	.4byte	.LVL49
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST23:
+	.4byte	.LVL43
+	.4byte	.LVL46-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL46-1
+	.4byte	.LFE216
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST24:
+	.4byte	.LVL43
+	.4byte	.LVL44
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL44
+	.4byte	.LVL45
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST25:
+	.4byte	.LVL44
+	.4byte	.LVL45
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST129:
+	.4byte	.LVL281
+	.4byte	.LVL286-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL286-1
+	.4byte	.LVL289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL289
+	.4byte	.LFE213
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST130:
+	.4byte	.LVL281
+	.4byte	.LVL282
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL282
+	.4byte	.LVL288
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL288
+	.4byte	.LVL289
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL289
+	.4byte	.LFE213
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST131:
+	.4byte	.LVL281
+	.4byte	.LVL285
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL285
+	.4byte	.LVL287
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL287
+	.4byte	.LVL289
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x52
+	.byte	0x9f
+	.4byte	.LVL289
+	.4byte	.LFE213
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST132:
+	.4byte	.LVL281
+	.4byte	.LVL283
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL283
+	.4byte	.LVL284
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST14:
+	.4byte	.LVL29
+	.4byte	.LVL32-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL32-1
+	.4byte	.LVL32
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL32
+	.4byte	.LFE212
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST15:
+	.4byte	.LVL29
+	.4byte	.LVL30
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL30
+	.4byte	.LVL31
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST16:
+	.4byte	.LVL30
+	.4byte	.LVL31
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST11:
+	.4byte	.LVL25
+	.4byte	.LVL28-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL28-1
+	.4byte	.LFE211
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST12:
+	.4byte	.LVL25
+	.4byte	.LVL26
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL26
+	.4byte	.LVL27
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST13:
+	.4byte	.LVL26
+	.4byte	.LVL27
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST136:
+	.4byte	.LVL301
+	.4byte	.LVL302
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL302
+	.4byte	.LFE210
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST104:
+	.4byte	.LVL202
+	.4byte	.LVL205-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL205-1
+	.4byte	.LFE207
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST105:
+	.4byte	.LVL202
+	.4byte	.LVL203
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL203
+	.4byte	.LVL204
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST6:
+	.4byte	.LVL18
+	.4byte	.LVL20-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL20-1
+	.4byte	.LFE206
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST7:
+	.4byte	.LVL19
+	.4byte	.LVL24
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST8:
+	.4byte	.LVL21
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST9:
+	.4byte	.LVL21
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST10:
+	.4byte	.LVL22
+	.4byte	.LVL23
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST4:
+	.4byte	.LVL13
+	.4byte	.LVL15-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL15-1
+	.4byte	.LFE205
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST5:
+	.4byte	.LVL14
+	.4byte	.LVL17
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL17
+	.4byte	.LFE205
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST3:
+	.4byte	.LVL9
+	.4byte	.LVL10
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL10
+	.4byte	.LVL11
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL11
+	.4byte	.LVL12
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL12
+	.4byte	.LFE204
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST1:
+	.4byte	.LVL2
+	.4byte	.LVL5
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL5
+	.4byte	.LVL6
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL6
+	.4byte	.LVL8
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL8
+	.4byte	.LFE203
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST2:
+	.4byte	.LVL3
+	.4byte	.LVL4
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL6
+	.4byte	.LVL7
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL7
+	.4byte	.LFE203
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST0:
+	.4byte	.LVL0
+	.4byte	.LVL1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1
+	.4byte	.LFE507
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST17:
+	.4byte	.LVL34
+	.4byte	.LVL37
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST18:
+	.4byte	.LVL34
+	.4byte	.LVL35
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL35
+	.4byte	.LVL36
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST19:
+	.4byte	.LVL35
+	.4byte	.LVL36
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST20:
+	.4byte	.LVL39
+	.4byte	.LVL42
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST21:
+	.4byte	.LVL39
+	.4byte	.LVL40
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL40
+	.4byte	.LVL41
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST22:
+	.4byte	.LVL40
+	.4byte	.LVL41
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST76:
+	.4byte	.LVL129
+	.4byte	.LVL129
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST77:
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0x1f
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap+4
+	.byte	0x22
+	.byte	0x6
+	.byte	0x8
+	.byte	0xff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x8
+	.byte	0x38
+	.byte	0x24
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap
+	.byte	0x22
+	.byte	0x6
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST78:
+	.4byte	.LVL129
+	.4byte	.LVL130
+	.2byte	0xa
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x24
+	.byte	0x3
+	.4byte	gNandChipMap
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST94:
+	.4byte	.LVL178
+	.4byte	.LVL179
+	.2byte	0x8
+	.byte	0x3
+	.4byte	gpNandParaInfo
+	.byte	0x6
+	.byte	0x23
+	.uleb128 0x13
+	.4byte	0
+	.4byte	0
+.LLST95:
+	.4byte	.LVL180
+	.4byte	.LVL181-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL181-1
+	.4byte	.LVL181
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL181
+	.4byte	.LVL182
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST100:
+	.4byte	.LVL193
+	.4byte	.LVL194-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL194-1
+	.4byte	.LFE276
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST165:
+	.4byte	.LVL404
+	.4byte	.LVL405
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL405
+	.4byte	.LVL406
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL406
+	.4byte	.LVL407
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL407
+	.4byte	.LFE299
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST166:
+	.4byte	.LVL408
+	.4byte	.LVL409
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL409
+	.4byte	.LFE312
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST196:
+	.4byte	.LVL481
+	.4byte	.LVL509
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL509
+	.4byte	.LVL510
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL510
+	.4byte	.LFE339
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST197:
+	.4byte	.LVL482
+	.4byte	.LVL508
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL510
+	.4byte	.LFE339
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST198:
+	.4byte	.LVL483
+	.4byte	.LVL508
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL510
+	.4byte	.LVL515
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL515
+	.4byte	.LVL516
+	.2byte	0x8
+	.byte	0x70
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL516
+	.4byte	.LVL517
+	.2byte	0x9
+	.byte	0x72
+	.sleb128 0
+	.byte	0x70
+	.sleb128 0
+	.byte	0x1e
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL517
+	.4byte	.LFE339
+	.2byte	0x8
+	.byte	0x70
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST199:
+	.4byte	.LVL486
+	.4byte	.LVL500
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL502
+	.4byte	.LVL507
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL510
+	.4byte	.LVL511
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL513
+	.4byte	.LFE339
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST200:
+	.4byte	.LVL484
+	.4byte	.LVL485
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL485
+	.4byte	.LVL497
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL500
+	.4byte	.LVL501
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL501
+	.4byte	.LVL506
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL510
+	.4byte	.LVL514
+	.2byte	0x7
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST201:
+	.4byte	.LVL492
+	.4byte	.LVL495
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL495
+	.4byte	.LVL497
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL502
+	.4byte	.LVL504
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL504
+	.4byte	.LVL506
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL510
+	.4byte	.LVL512
+	.2byte	0x7
+	.byte	0x72
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.4byte	0
+	.4byte	0
+.LLST202:
+	.4byte	.LVL484
+	.4byte	.LVL485
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL485
+	.4byte	.LVL486
+	.2byte	0x15
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL486
+	.4byte	.LVL487
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL487
+	.4byte	.LVL500
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL500
+	.4byte	.LVL501
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL501
+	.4byte	.LVL502
+	.2byte	0x15
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x7e
+	.sleb128 0
+	.byte	0x22
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL502
+	.4byte	.LVL508
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	.LVL510
+	.4byte	.LFE339
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -44
+	.4byte	0
+	.4byte	0
+.LLST203:
+	.4byte	.LVL493
+	.4byte	.LVL494
+	.2byte	0xe
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL494
+	.4byte	.LVL496
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL502
+	.4byte	.LVL503
+	.2byte	0xe
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL503
+	.4byte	.LVL504
+	.2byte	0x10
+	.byte	0x76
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL504
+	.4byte	.LVL505
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST204:
+	.4byte	.LVL488
+	.4byte	.LVL498
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL498
+	.4byte	.LVL499
+	.2byte	0x5
+	.byte	0x7c
+	.sleb128 0
+	.byte	0x74
+	.sleb128 0
+	.byte	0x22
+	.4byte	.LVL502
+	.4byte	.LVL508
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL510
+	.4byte	.LVL514
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST205:
+	.4byte	.LVL518
+	.4byte	.LVL519-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL519-1
+	.4byte	.LFE338
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST210:
+	.4byte	.LVL541
+	.4byte	.LVL542-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL542-1
+	.4byte	.LFE337
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST223:
+	.4byte	.LVL584
+	.4byte	.LVL590
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL590
+	.4byte	.LVL604
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST224:
+	.4byte	.LVL585
+	.4byte	.LVL590
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL590
+	.4byte	.LVL603
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST225:
+	.4byte	.LVL593
+	.4byte	.LVL595
+	.2byte	0x5
+	.byte	0x72
+	.sleb128 0
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL595
+	.4byte	.LVL600-1
+	.2byte	0xd
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0xd
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x36
+	.byte	0x1b
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST226:
+	.4byte	.LVL587
+	.4byte	.LVL589
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL589
+	.4byte	.LVL590
+	.2byte	0xb
+	.byte	0x70
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL590
+	.4byte	.LVL591-1
+	.2byte	0xb
+	.byte	0x74
+	.sleb128 0
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL604
+	.4byte	.LVL606
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST227:
+	.4byte	.LVL587
+	.4byte	.LVL588
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL588
+	.4byte	.LVL598
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL604
+	.4byte	.LVL605
+	.2byte	0xe
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL605
+	.4byte	.LVL606
+	.2byte	0x10
+	.byte	0x72
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x7a
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST228:
+	.4byte	.LVL594
+	.4byte	.LVL599
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL599
+	.4byte	.LVL600-1
+	.2byte	0x1c
+	.byte	0x7a
+	.sleb128 2
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x36
+	.byte	0x1e
+	.byte	0x31
+	.byte	0x26
+	.byte	0x11
+	.sleb128 -1431655765
+	.byte	0x1e
+	.byte	0x31
+	.byte	0x24
+	.byte	0x3
+	.4byte	p_valid_page_count_table
+	.byte	0x6
+	.byte	0x22
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST229:
+	.4byte	.LVL596
+	.4byte	.LVL597
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL597
+	.4byte	.LVL600-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL606
+	.4byte	.LVL607
+	.2byte	0xe
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x73
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	.LVL607
+	.4byte	.LFE344
+	.2byte	0x10
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x72
+	.sleb128 4
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x1e
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST230:
+	.4byte	.LVL586
+	.4byte	.LVL603
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL604
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST231:
+	.4byte	.LVL593
+	.4byte	.LVL595
+	.2byte	0xa
+	.byte	0x3
+	.4byte	p_data_block_list_table
+	.byte	0x6
+	.byte	0x72
+	.sleb128 0
+	.byte	0x22
+	.byte	0x9f
+	.4byte	.LVL595
+	.4byte	.LVL600-1
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL606
+	.4byte	.LFE344
+	.2byte	0x1
+	.byte	0x52
+	.4byte	0
+	.4byte	0
+.LLST232:
+	.4byte	.LVL608
+	.4byte	.LVL611-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL611-1
+	.4byte	.LVL616
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL616
+	.4byte	.LFE347
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST233:
+	.4byte	.LVL608
+	.4byte	.LVL609
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL610
+	.4byte	.LVL616
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST234:
+	.4byte	.LVL608
+	.4byte	.LVL611-1
+	.2byte	0x2
+	.byte	0x70
+	.sleb128 12
+	.4byte	0
+	.4byte	0
+.LLST235:
+	.4byte	.LVL613
+	.4byte	.LVL615
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST239:
+	.4byte	.LVL638
+	.4byte	.LVL640
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL640
+	.4byte	.LFE358
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST240:
+	.4byte	.LVL639
+	.4byte	.LVL640
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL640
+	.4byte	.LFE358
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST241:
+	.4byte	.LVL641
+	.4byte	.LVL642-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL642-1
+	.4byte	.LVL642
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL643
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL643
+	.4byte	.LFE363
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST242:
+	.4byte	.LVL641
+	.4byte	.LVL642-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL642-1
+	.4byte	.LVL642
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL642
+	.4byte	.LVL644
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL644
+	.4byte	.LFE363
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST258:
+	.4byte	.LVL689
+	.4byte	.LVL691-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL691-1
+	.4byte	.LFE385
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST259:
+	.4byte	.LVL690
+	.4byte	.LVL691-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL691-1
+	.4byte	.LVL691
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST360:
+	.4byte	.LVL1081
+	.4byte	.LVL1083
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1083
+	.4byte	.LFE228
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST361:
+	.4byte	.LVL1081
+	.4byte	.LVL1084-1
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL1084-1
+	.4byte	.LFE228
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST362:
+	.4byte	.LVL1082
+	.4byte	.LVL1087
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL1087
+	.4byte	.LVL1088
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1088
+	.4byte	.LVL1090
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST363:
+	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST364:
+	.4byte	.LVL1091
+	.4byte	.LVL1094
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST422:
+	.4byte	.LVL1303
+	.4byte	.LVL1304
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1304
+	.4byte	.LFE484
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST472:
+	.4byte	.LVL1547
+	.4byte	.LVL1548-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1548-1
+	.4byte	.LVL1548
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1548
+	.4byte	.LVL1549
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1549
+	.4byte	.LVL1550
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1550
+	.4byte	.LVL1551
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1551
+	.4byte	.LVL1552
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1552
+	.4byte	.LVL1553
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1553
+	.4byte	.LVL1554
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1554
+	.4byte	.LVL1555
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1555
+	.4byte	.LVL1556
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1556
+	.4byte	.LVL1557
+	.2byte	0x4
+	.byte	0x72
+	.sleb128 65
+	.byte	0x9f
+	.4byte	.LVL1557
+	.4byte	.LVL1558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1558
+	.4byte	.LVL1559
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1559
+	.4byte	.LVL1560
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1560
+	.4byte	.LFE237
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST473:
+	.4byte	.LVL1554
+	.4byte	.LVL1555
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1555
+	.4byte	.LVL1556
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1556
+	.4byte	.LVL1557
+	.2byte	0x4
+	.byte	0x72
+	.sleb128 65
+	.byte	0x9f
+	.4byte	.LVL1557
+	.4byte	.LVL1558
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1558
+	.4byte	.LVL1559
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1559
+	.4byte	.LVL1560
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST526:
+	.4byte	.LVL1804
+	.4byte	.LVL1806
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1806
+	.4byte	.LVL1814
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1814
+	.4byte	.LFE235
+	.2byte	0x1
+	.byte	0x50
+	.4byte	0
+	.4byte	0
+.LLST527:
+	.4byte	.LVL1805
+	.4byte	.LVL1807
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST539:
+	.4byte	.LVL1876
+	.4byte	.LVL1878
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1889
+	.4byte	.LVL1890
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1890
+	.4byte	.LVL1891
+	.2byte	0x3
+	.byte	0x74
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL1891
+	.4byte	.LVL1892
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST540:
+	.4byte	.LVL1877
+	.4byte	.LVL1888
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1892
+	.4byte	.LFE320
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST541:
+	.4byte	.LVL1894
+	.4byte	.LVL1895
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1895
+	.4byte	.LVL1944
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1944
+	.4byte	.LFE386
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST542:
+	.4byte	.LVL1906
+	.4byte	.LVL1912
+	.2byte	0x1
+	.byte	0x58
+	.4byte	.LVL1913
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST543:
+	.4byte	.LVL1916
+	.4byte	.LVL1931
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL1932
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST544:
+	.4byte	.LVL1923
+	.4byte	.LVL1924
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1926
+	.4byte	.LVL1927
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1927
+	.4byte	.LVL1930
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1936
+	.4byte	.LVL1939
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	.LVL1939
+	.4byte	.LVL1940
+	.2byte	0x3
+	.byte	0x7a
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1941
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST545:
+	.4byte	.LVL1926
+	.4byte	.LVL1927
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL1927
+	.4byte	.LVL1930
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1936
+	.4byte	.LVL1943
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST546:
+	.4byte	.LVL1933
+	.4byte	.LVL1935
+	.2byte	0x2
+	.byte	0x31
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST547:
+	.4byte	.LVL1933
+	.4byte	.LVL1935
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST548:
+	.4byte	.LVL1945
+	.4byte	.LVL1946
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1946
+	.4byte	.LFE406
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST549:
+	.4byte	.LVL1946
+	.4byte	.LVL1947
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1948
+	.4byte	.LVL1952
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL1952
+	.4byte	.LVL1953
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1954
+	.4byte	.LFE406
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
+.LLST550:
+	.4byte	.LVL1951
+	.4byte	.LVL1957
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1957
+	.4byte	.LVL1958
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL1958
+	.4byte	.LVL1959
+	.2byte	0x3
+	.byte	0x7b
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1959
+	.4byte	.LVL1960
+	.2byte	0x3
+	.byte	0x76
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL1960
+	.4byte	.LFE406
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST551:
+	.4byte	.LVL1956
+	.4byte	.LVL1958
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1960
+	.4byte	.LVL1961
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL1962
+	.4byte	.LFE406
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST552:
+	.4byte	.LVL1963
+	.4byte	.LVL1965
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1965
+	.4byte	.LVL1973
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1973
+	.4byte	.LVL1974
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1974
+	.4byte	.LVL1975
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL1975
+	.4byte	.LVL1976-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1976-1
+	.4byte	.LFE389
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST553:
+	.4byte	.LVL1964
+	.4byte	.LVL1973
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST556:
+	.4byte	.LVL1989
+	.4byte	.LVL1991
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1991
+	.4byte	.LVL1998
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL1998
+	.4byte	.LFE373
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST557:
+	.4byte	.LVL1990
+	.4byte	.LVL1991
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL1991
+	.4byte	.LVL1997
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST558:
+	.4byte	.LVL1991
+	.4byte	.LVL1992
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL1995
+	.4byte	.LVL1996
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST562:
+	.4byte	.LVL2017
+	.4byte	.LVL2036
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL2037
+	.4byte	.LFE360
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST563:
+	.4byte	.LVL2022
+	.4byte	.LVL2023
+	.2byte	0x12
+	.byte	0x70
+	.sleb128 0
+	.byte	0x33
+	.byte	0x25
+	.byte	0x70
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	.LVL2023
+	.4byte	.LVL2024-1
+	.2byte	0x1c
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0x33
+	.byte	0x25
+	.byte	0x3
+	.4byte	c_ftl_nand_data_blks_per_plane
+	.byte	0x94
+	.byte	0x2
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x23
+	.uleb128 0x18
+	.byte	0x31
+	.byte	0x24
+	.byte	0x22
+	.byte	0x23
+	.uleb128 0x4
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST592:
+	.4byte	.LVL2161
+	.4byte	.LVL2162
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2162
+	.4byte	.LFE350
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST593:
+	.4byte	.LVL2161
+	.4byte	.LVL2162
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2162
+	.4byte	.LFE350
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST594:
+	.4byte	.LVL2161
+	.4byte	.LVL2162
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2162
+	.4byte	.LVL2177
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	.LVL2177
+	.4byte	.LVL2178
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -40
+	.4byte	.LVL2178
+	.4byte	.LFE350
+	.2byte	0x2
+	.byte	0x7d
+	.sleb128 0
+	.4byte	0
+	.4byte	0
+.LLST595:
+	.4byte	.LVL2168
+	.4byte	.LVL2176
+	.2byte	0x7
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	.LVL2178
+	.4byte	.LFE350
+	.2byte	0x7
+	.byte	0x77
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST596:
+	.4byte	.LVL2170
+	.4byte	.LVL2171
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST723:
+	.4byte	.LVL2799
+	.4byte	.LVL2800-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST724:
+	.4byte	.LVL2824
+	.4byte	.LVL2825
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_active_superblock
+	.byte	0x9f
+	.4byte	.LVL2825
+	.4byte	.LVL2831
+	.2byte	0x6
+	.byte	0x3
+	.4byte	g_buffer_superblock
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST725:
+	.4byte	.LVL2833
+	.4byte	.LVL2837
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2837
+	.4byte	.LVL2840
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2840
+	.4byte	.LVL2845
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2845
+	.4byte	.LVL2853
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2853
+	.4byte	.LVL2854
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2854
+	.4byte	.LVL2906
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2906
+	.4byte	.LVL2907
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2907
+	.4byte	.LVL2908
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2908
+	.4byte	.LVL2909
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2909
+	.4byte	.LFE407
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST726:
+	.4byte	.LVL2833
+	.4byte	.LVL2835
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2835
+	.4byte	.LVL2906
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2906
+	.4byte	.LFE407
+	.2byte	0x1
+	.byte	0x51
+	.4byte	0
+	.4byte	0
+.LLST727:
+	.4byte	.LVL2834
+	.4byte	.LVL2835
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL2835
+	.4byte	.LVL2839
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL2840
+	.4byte	.LVL2905
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST728:
+	.4byte	.LVL2834
+	.4byte	.LVL2837
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2837
+	.4byte	.LVL2839
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2840
+	.4byte	.LVL2845
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2845
+	.4byte	.LVL2853
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	.LVL2853
+	.4byte	.LVL2854
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2854
+	.4byte	.LVL2905
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x50
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST729:
+	.4byte	.LVL2886
+	.4byte	.LVL2890
+	.2byte	0x1
+	.byte	0x58
+	.4byte	0
+	.4byte	0
+.LLST730:
+	.4byte	.LVL2870
+	.4byte	.LVL2871
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2871
+	.4byte	.LVL2881
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	.LVL2881
+	.4byte	.LVL2882
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -64
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	.LVL2883
+	.4byte	.LVL2905
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -64
+	.4byte	0
+	.4byte	0
+.LLST731:
+	.4byte	.LVL2872
+	.4byte	.LVL2876
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2876
+	.4byte	.LVL2877
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 1
+	.byte	0x9f
+	.4byte	.LVL2877
+	.4byte	.LVL2878-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL2878
+	.4byte	.LVL2879
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL2880
+	.4byte	.LVL2894
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -56
+	.4byte	.LVL2895
+	.4byte	.LVL2896
+	.2byte	0x7
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x94
+	.byte	0x2
+	.byte	0x23
+	.uleb128 0x1
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST732:
+	.4byte	.LVL2872
+	.4byte	.LVL2894
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	.LVL2895
+	.4byte	.LVL2896
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -68
+	.4byte	0
+	.4byte	0
+.LLST733:
+	.4byte	.LVL2873
+	.4byte	.LVL2874
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL2874
+	.4byte	.LVL2875
+	.2byte	0x3
+	.byte	0x91
+	.sleb128 -56
+	.byte	0x6
+	.4byte	0
+	.4byte	0
+.LLST734:
+	.4byte	.LVL2867
+	.4byte	.LVL2905
+	.2byte	0x2
+	.byte	0x91
+	.sleb128 -60
+	.4byte	0
+	.4byte	0
+.LLST735:
+	.4byte	.LVL2884
+	.4byte	.LVL2885
+	.2byte	0x2
+	.byte	0x72
+	.sleb128 12
+	.4byte	.LVL2885
+	.4byte	.LVL2894
+	.2byte	0x1
+	.byte	0x5a
+	.4byte	0
+	.4byte	0
+.LLST736:
+	.4byte	.LVL2910
+	.4byte	.LVL2911
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL2911
+	.4byte	.LFE302
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST737:
+	.4byte	.LVL2922
+	.4byte	.LVL2923
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2923
+	.4byte	.LVL2924
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x401
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	.LVL2924
+	.4byte	.LFE302
+	.2byte	0x7
+	.byte	0xa
+	.2byte	0x400
+	.byte	0x74
+	.sleb128 0
+	.byte	0x1c
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST779:
+	.4byte	.LVL3108
+	.4byte	.LVL3114
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3114
+	.4byte	.LFE264
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST780:
+	.4byte	.LVL3108
+	.4byte	.LVL3113
+	.2byte	0x1
+	.byte	0x51
+	.4byte	.LVL3113
+	.4byte	.LVL3119
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3119
+	.4byte	.LVL3128
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL3128
+	.4byte	.LFE264
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST781:
+	.4byte	.LVL3108
+	.4byte	.LVL3109
+	.2byte	0x1
+	.byte	0x52
+	.4byte	.LVL3109
+	.4byte	.LFE264
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST782:
+	.4byte	.LVL3108
+	.4byte	.LVL3117
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL3117
+	.4byte	.LVL3124
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3125
+	.4byte	.LVL3128
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3128
+	.4byte	.LVL3131
+	.2byte	0x3
+	.byte	0x9
+	.byte	0xff
+	.byte	0x9f
+	.4byte	.LVL3131
+	.4byte	.LVL3132
+	.2byte	0x2
+	.byte	0x30
+	.byte	0x9f
+	.4byte	.LVL3132
+	.4byte	.LFE264
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
+.LLST783:
+	.4byte	.LVL3115
+	.4byte	.LVL3119
+	.2byte	0xc
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL3128
+	.4byte	.LVL3129
+	.2byte	0xc
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	.LVL3131
+	.4byte	.LFE264
+	.2byte	0xc
+	.byte	0x75
+	.sleb128 0
+	.byte	0xa
+	.2byte	0xffff
+	.byte	0x1a
+	.byte	0x7a
+	.sleb128 0
+	.byte	0x22
+	.byte	0x3a
+	.byte	0x24
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST784:
+	.4byte	.LVL3111
+	.4byte	.LVL3119
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3128
+	.4byte	.LVL3129
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3130
+	.4byte	.LFE264
+	.2byte	0x1
+	.byte	0x55
+	.4byte	0
+	.4byte	0
+.LLST785:
+	.4byte	.LVL3110
+	.4byte	.LVL3112
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3112
+	.4byte	.LVL3114
+	.2byte	0x3
+	.byte	0x73
+	.sleb128 15
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST786:
+	.4byte	.LVL3118
+	.4byte	.LVL3123
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	.LVL3125
+	.4byte	.LVL3128
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+.LLST787:
+	.4byte	.LVL3118
+	.4byte	.LVL3119
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3119
+	.4byte	.LVL3123
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	.LVL3125
+	.4byte	.LVL3128
+	.2byte	0x4
+	.byte	0xf3
+	.uleb128 0x1
+	.byte	0x51
+	.byte	0x9f
+	.4byte	0
+	.4byte	0
+.LLST788:
+	.4byte	.LVL3118
+	.4byte	.LVL3123
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3125
+	.4byte	.LVL3128
+	.2byte	0x1
+	.byte	0x54
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL3120
+	.4byte	.LVL3121
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3125
+	.4byte	.LVL3126
+	.2byte	0x1
+	.byte	0x53
+	.4byte	.LVL3127
+	.4byte	.LVL3128
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST794:
+	.4byte	.LVL3145
+	.4byte	.LVL3158
+	.2byte	0x1
+	.byte	0x57
+	.4byte	.LVL3158
+	.4byte	.LVL3159
+	.2byte	0x3
+	.byte	0x77
+	.sleb128 -1
+	.byte	0x9f
+	.4byte	.LVL3159
+	.4byte	.LVL3180
+	.2byte	0x1
+	.byte	0x57
+	.4byte	0
+	.4byte	0
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+	.4byte	.LVL3146
+	.4byte	.LVL3147
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3147
+	.4byte	.LVL3151
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3152
+	.4byte	.LVL3153
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3163
+	.4byte	.LVL3171
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3171
+	.4byte	.LVL3172-1
+	.2byte	0x1
+	.byte	0x50
+	.4byte	.LVL3172
+	.4byte	.LVL3173
+	.2byte	0x1
+	.byte	0x54
+	.4byte	.LVL3173
+	.4byte	.LVL3174
+	.2byte	0x1
+	.byte	0x55
+	.4byte	.LVL3179
+	.4byte	.LVL3180-1
+	.2byte	0x1
+	.byte	0x53
+	.4byte	0
+	.4byte	0
+.LLST796:
+	.4byte	.LVL3155
+	.4byte	.LVL3160
+	.2byte	0x1
+	.byte	0x56
+	.4byte	.LVL3166
+	.4byte	.LVL3171
+	.2byte	0x1
+	.byte	0x56
+	.4byte	0
+	.4byte	0
+.LLST797:
+	.4byte	.LVL3154
+	.4byte	.LVL3171
+	.2byte	0x1
+	.byte	0x5b
+	.4byte	0
+	.4byte	0
+	.section	.debug_aranges,"",%progbits
+	.4byte	0x6bc
+	.2byte	0x2
+	.4byte	.Ldebug_info0
+	.byte	0x4
+	.byte	0
+	.2byte	0
+	.2byte	0
+	.4byte	.LFB507
+	.4byte	.LFE507-.LFB507
+	.4byte	.LFB203
+	.4byte	.LFE203-.LFB203
+	.4byte	.LFB204
+	.4byte	.LFE204-.LFB204
+	.4byte	.LFB205
+	.4byte	.LFE205-.LFB205
+	.4byte	.LFB206
+	.4byte	.LFE206-.LFB206
+	.4byte	.LFB211
+	.4byte	.LFE211-.LFB211
+	.4byte	.LFB212
+	.4byte	.LFE212-.LFB212
+	.4byte	.LFB214
+	.4byte	.LFE214-.LFB214
+	.4byte	.LFB215
+	.4byte	.LFE215-.LFB215
+	.4byte	.LFB216
+	.4byte	.LFE216-.LFB216
+	.4byte	.LFB217
+	.4byte	.LFE217-.LFB217
+	.4byte	.LFB218
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+	.4byte	.LFB219
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+	.4byte	.LFB220
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+	.4byte	.LFB221
+	.4byte	.LFE221-.LFB221
+	.4byte	.LFB229
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+	.4byte	.LFB232
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+	.4byte	.LFB239
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+	.4byte	.LFB241
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+	.4byte	.LFB254
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+	.4byte	.LFB255
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+	.4byte	.LFB256
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+	.4byte	.LFB268
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+	.4byte	.LFB269
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+	.4byte	.LFB271
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+	.4byte	.LFB272
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+	.4byte	.LFB273
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+	.4byte	.LFB275
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+	.4byte	.LFB246
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+	.4byte	.LFB257
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+	.4byte	.LFB276
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+	.4byte	.LFB277
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+	.4byte	.LFB207
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+	.4byte	.LFB225
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+	.4byte	.LFB226
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+	.4byte	.LFB238
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+	.4byte	.LFB260
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+	.4byte	.LFB263
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+	.4byte	.LFB213
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+	.4byte	.LFB253
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+	.4byte	.LFB278
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+	.4byte	.LFB279
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+	.4byte	.LFB210
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+	.4byte	.LFB280
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+	.4byte	.LFB209
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+	.4byte	.LFB283
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+	.4byte	.LFB286
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+	.4byte	.LFB287
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+	.4byte	.LFB289
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+	.4byte	.LFB293
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+	.4byte	.LFB296
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+	.4byte	.LFB312
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+	.4byte	.LFB391
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+	.4byte	.LFB392
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+	.4byte	.LFB393
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+	.4byte	.LFB394
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+	.4byte	.LFB395
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+	.4byte	.LFB403
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+	.4byte	.LFB405
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+	.4byte	.LFB480
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+	.4byte	.LFB233
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+	.4byte	0
+	.4byte	0
+	.section	.debug_line,"",%progbits
+.Ldebug_line0:
+	.section	.debug_str,"MS",%progbits,1
+.LASF152:
+	.ascii	"FlashDdrTunningReadCount\000"
+.LASF1112:
+	.ascii	"gc_page_num\000"
+.LASF1086:
+	.ascii	"rk_ftl_de_init\000"
+.LASF1011:
+	.ascii	"wl_lock\000"
+.LASF173:
+	.ascii	"READ_RETRY_PARA_T\000"
+.LASF1127:
+	.ascii	"superBlk\000"
+.LASF250:
+	.ascii	"BCHCTL\000"
+.LASF888:
+	.ascii	"bitflip_threshold\000"
+.LASF640:
+	.ascii	"all_blk_used_slc_mode\000"
+.LASF1482:
+	.ascii	"blockInDie\000"
+.LASF196:
+	.ascii	"reserved\000"
+.LASF1265:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+.LASF1080:
+	.ascii	"ubi_notifiers\000"
+.LASF865:
+	.ascii	"mtd_ecc_stats\000"
+.LASF132:
+	.ascii	"gNandFlashIdbBlockAddr\000"
+.LASF791:
+	.ascii	"g_totle_read_sector\000"
+.LASF1121:
+	.ascii	"__func__\000"
+.LASF695:
+	.ascii	"c_ftl_nand_sys_blks_per_plane\000"
+.LASF1460:
+	.ascii	"nextPageAddr\000"
+.LASF1247:
+	.ascii	"nSec\000"
+.LASF1004:
+	.ascii	"fm_buf\000"
+.LASF1081:
+	.ascii	"ubi_devices\000"
+.LASF933:
+	.ascii	"oobfree\000"
+.LASF1244:
+	.ascii	"forceFlush\000"
+.LASF412:
+	.ascii	"bootm_headers\000"
+.LASF732:
+	.ascii	"p_gc_data_buf\000"
+.LASF1164:
+	.ascii	"get_page_for_next\000"
+.LASF430:
+	.ascii	"rd_end\000"
+.LASF72:
+	.ascii	"slc_mode\000"
+.LASF1301:
+	.ascii	"FtlFreeSysBlkQueueOut\000"
+.LASF601:
+	.ascii	"ftl_bbt_blk_header\000"
+.LASF1541:
+	.ascii	"FlashEraseBlock\000"
+.LASF48:
+	.ascii	"InterLun1StatusCmd\000"
+.LASF534:
+	.ascii	"eth_device\000"
+.LASF1413:
+	.ascii	"NandcSendDumpDataDone\000"
+.LASF210:
+	.ascii	"done0\000"
+.LASF215:
+	.ascii	"done1\000"
+.LASF1572:
+	.ascii	"FtlRead\000"
+.LASF1518:
+	.ascii	"bit1_count\000"
+.LASF983:
+	.ascii	"rsvd_pebs\000"
+.LASF583:
+	.ascii	"sign\000"
+.LASF1350:
+	.ascii	"sctidx\000"
+.LASF963:
+	.ascii	"last_eb_bytes\000"
+.LASF1185:
+	.ascii	"Ftl_load_ext_data\000"
+.LASF401:
+	.ascii	"ih_comp\000"
+.LASF1195:
+	.ascii	"FtlRecoverySuperblock\000"
+.LASF1108:
+	.ascii	"block\000"
+.LASF286:
+	.ascii	"NandcAddr\000"
+.LASF327:
+	.ascii	"_Bool\000"
+.LASF295:
+	.ascii	"gBootDdrMode\000"
+.LASF708:
+	.ascii	"g_SlcPartLbaEndSector\000"
+.LASF1548:
+	.ascii	"FlashProgSecondCmd\000"
+.LASF1480:
+	.ascii	"BlockIndex\000"
+.LASF1352:
+	.ascii	"req_read_temp\000"
+.LASF452:
+	.ascii	"UCLASS_USB_EMUL\000"
+.LASF1204:
+	.ascii	"recovery_cur_page_ver\000"
+.LASF789:
+	.ascii	"g_totle_write_page_count\000"
+.LASF867:
+	.ascii	"failed\000"
+.LASF1193:
+	.ascii	"FtlGcRefreshOpenBlock\000"
+.LASF1428:
+	.ascii	"randmzSeed\000"
+.LASF551:
+	.ascii	"net_root_path\000"
+.LASF1241:
+	.ascii	"FtlMapBlkWriteDumpData\000"
+.LASF1145:
+	.ascii	"lookup_ppa\000"
+.LASF862:
+	.ascii	"locked\000"
+.LASF1394:
+	.ascii	"bchStReg\000"
+.LASF1329:
+	.ascii	"FtlBbmTblFlush\000"
+.LASF1507:
+	.ascii	"ToshibaReadRetrial\000"
+.LASF914:
+	.ascii	"_get_device\000"
+.LASF122:
+	.ascii	"gFlashSlcMode\000"
+.LASF604:
+	.ascii	"ftl_data_blk_header\000"
+.LASF899:
+	.ascii	"_read_oob\000"
+.LASF637:
+	.ascii	"min_erase_count\000"
+.LASF17:
+	.ascii	"pData\000"
+.LASF419:
+	.ascii	"fit_noffset_os\000"
+.LASF896:
+	.ascii	"_read\000"
+.LASF172:
+	.ascii	"reserved27_31\000"
+.LASF667:
+	.ascii	"des_ppa\000"
+.LASF842:
+	.ascii	"spinlock_t\000"
+.LASF543:
+	.ascii	"priv\000"
+.LASF928:
+	.ascii	"datbuf\000"
+.LASF1291:
+	.ascii	"insert_free_list\000"
+.LASF42:
+	.ascii	"ReadCacheRandomCmd\000"
+.LASF1287:
+	.ascii	"pHead\000"
+.LASF326:
+	.ascii	"___strtok\000"
+.LASF505:
+	.ascii	"UCLASS_SPI_GENERIC\000"
+.LASF757:
+	.ascii	"g_l2p_last_update_region_id\000"
+.LASF1217:
+	.ascii	"ftl_sb_update_avl_pages\000"
+.LASF1456:
+	.ascii	"FlashProgPages\000"
+.LASF1465:
+	.ascii	"req_status_0\000"
+.LASF1374:
+	.ascii	"test_page_num\000"
+.LASF1203:
+	.ascii	"lookup_superblock_id\000"
+.LASF696:
+	.ascii	"c_ftl_nand_init_sys_blks_per_plane\000"
+.LASF1384:
+	.ascii	"FtlConstantsInit\000"
+.LASF1000:
+	.ascii	"fm_pool\000"
+.LASF128:
+	.ascii	"gNandRandomizer\000"
+.LASF891:
+	.ascii	"ecc_strength\000"
+.LASF1115:
+	.ascii	"num_io\000"
+.LASF136:
+	.ascii	"gNandIDBResBlkNumSaveInFlash\000"
+.LASF975:
+	.ascii	"direct_writes\000"
+.LASF1387:
+	.ascii	"FtlPrintInfo\000"
+.LASF1515:
+	.ascii	"step\000"
+.LASF1258:
+	.ascii	"l2p_flush\000"
+.LASF1555:
+	.ascii	"pageAddr0\000"
+.LASF1556:
+	.ascii	"pageAddr1\000"
+.LASF654:
+	.ascii	"rear\000"
+.LASF958:
+	.ascii	"writers\000"
+.LASF1412:
+	.ascii	"pSpareTmp\000"
+.LASF1036:
+	.ascii	"leb_start\000"
+.LASF582:
+	.ascii	"ftl_l2p_map_info\000"
+.LASF805:
+	.ascii	"g_in_swl_replace\000"
+.LASF1537:
+	.ascii	"mini_ecc_ddrPara\000"
+.LASF680:
+	.ascii	"c_ftl_nand_page_pre_slc_blk\000"
+.LASF549:
+	.ascii	"net_nis_domain\000"
+.LASF1277:
+	.ascii	"List_update_data_list\000"
+.LASF1370:
+	.ascii	"create_first_buffer_superblock\000"
+.LASF786:
+	.ascii	"g_gc_merge_free_blk_threshold\000"
+.LASF1499:
+	.ascii	"FlashSetReadRetryDefault\000"
+.LASF1211:
+	.ascii	"last_mlc_page_version\000"
+.LASF1151:
+	.ascii	"IsBlkInGcList\000"
+.LASF333:
+	.ascii	"next\000"
+.LASF1575:
+	.ascii	"memcmp\000"
+.LASF589:
+	.ascii	"pBlkVpcTbl\000"
+.LASF861:
+	.ascii	"length\000"
+.LASF1216:
+	.ascii	"FtlReUsePrevPpa\000"
+.LASF1175:
+	.ascii	"update_multiplier_value\000"
+.LASF1044:
+	.ascii	"max_write_size\000"
+.LASF687:
+	.ascii	"c_ftl_nand_totle_phy_blks\000"
+.LASF988:
+	.ascii	"autoresize_vol_id\000"
+.LASF1288:
+	.ascii	"scan_count\000"
+.LASF1538:
+	.ascii	"start_dll\000"
+.LASF697:
+	.ascii	"c_ftl_nand_max_sys_blks\000"
+.LASF1322:
+	.ascii	"PhyBlk\000"
+.LASF1459:
+	.ascii	"FlashReadPages\000"
+.LASF981:
+	.ascii	"volumes_lock\000"
+.LASF759:
+	.ascii	"p_free_data_block_list_head\000"
+.LASF455:
+	.ascii	"UCLASS_AHCI\000"
+.LASF468:
+	.ascii	"UCLASS_I2C_MUX\000"
+.LASF229:
+	.ascii	"hsize\000"
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+.LASF987:
+	.ascii	"bad_peb_limit\000"
+.LASF1194:
+	.ascii	"FtlSlcSuperblockCheck\000"
+.LASF798:
+	.ascii	"g_totle_avg_erase_count\000"
+.LASF1355:
+	.ascii	"flashType\000"
+.LASF1305:
+	.ascii	"FtlFreeSysBLkSort\000"
+.LASF871:
+	.ascii	"fail_addr\000"
+.LASF269:
+	.ascii	"LLP_LLI\000"
+.LASF1373:
+	.ascii	"max_test_page_num\000"
+.LASF240:
+	.ascii	"tagMTRANS_STAT\000"
+.LASF388:
+	.ascii	"working_fdt\000"
+.LASF1381:
+	.ascii	"FtlVariablesInit\000"
+.LASF668:
+	.ascii	"ftl_gc_page_buffer\000"
+.LASF545:
+	.ascii	"push_packet\000"
+.LASF1227:
+	.ascii	"pMapBlkHeader\000"
+.LASF387:
+	.ascii	"size_dt_struct\000"
+.LASF1549:
+	.ascii	"FlashProgDpSecondCmd\000"
+.LASF753:
+	.ascii	"p_vendor_region_ppn_table\000"
+.LASF1535:
+	.ascii	"last_error_ecc0_count\000"
+.LASF226:
+	.ascii	"ahb_wr_st\000"
+.LASF1191:
+	.ascii	"make_superblock\000"
+.LASF402:
+	.ascii	"ih_name\000"
+.LASF493:
+	.ascii	"UCLASS_PWRSEQ\000"
+.LASF89:
+	.ascii	"cur_op\000"
+.LASF972:
+	.ascii	"corrupted\000"
+.LASF8:
+	.ascii	"short int\000"
+.LASF1079:
+	.ascii	"blocking_notifier_head\000"
+.LASF1184:
+	.ascii	"p_super_blk\000"
+.LASF379:
+	.ascii	"totalsize\000"
+.LASF1181:
+	.ascii	"time_out\000"
+.LASF1272:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+.LASF106:
+	.ascii	"FlashSize\000"
+.LASF968:
+	.ascii	"upd_received\000"
+.LASF661:
+	.ascii	"check_en\000"
+.LASF721:
+	.ascii	"req_gc_dst\000"
+.LASF334:
+	.ascii	"prev\000"
+.LASF193:
+	.ascii	"reserved30_31\000"
+.LASF699:
+	.ascii	"c_ftl_nand_data_op_blks_per_plane\000"
+.LASF1077:
+	.ascii	"ubi_class\000"
+.LASF821:
+	.ascii	"random_seed\000"
+.LASF782:
+	.ascii	"g_gc_refresh_block_temp_num\000"
+.LASF664:
+	.ascii	"phyBlk\000"
+.LASF566:
+	.ascii	"net_boot_file_size\000"
+.LASF688:
+	.ascii	"c_ftl_nand_map_region_num\000"
+.LASF432:
+	.ascii	"ft_len\000"
+.LASF1243:
+	.ascii	"FtlEctTblFlush\000"
+.LASF1434:
+	.ascii	"dll_mode\000"
+.LASF277:
+	.ascii	"pageBuf\000"
+.LASF100:
+	.ascii	"NandParaInfo\000"
+.LASF495:
+	.ascii	"UCLASS_REGULATOR\000"
+.LASF588:
+	.ascii	"pBlkVerTbl\000"
+.LASF769:
+	.ascii	"g_sys_save_data\000"
+.LASF1075:
+	.ascii	"ubi_cdev_operations\000"
+.LASF77:
+	.ascii	"maxRetryCount\000"
+.LASF1281:
+	.ascii	"prev_valid_page_count\000"
+.LASF878:
+	.ascii	"flags\000"
+.LASF429:
+	.ascii	"rd_start\000"
+.LASF982:
+	.ascii	"image_seq\000"
+.LASF1580:
+	.ascii	"drivers/rknand/rkftl/rk_ftl_arm_v7.c\000"
+.LASF288:
+	.ascii	"CHIP_MAP_INFO\000"
+.LASF912:
+	.ascii	"_block_isbad\000"
 	.hidden	free

commit 45c78162f30b32e6dc9be5c59ea508e7a589b526
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue May 22 20:16:10 2018 +0800

    dm: regmap: use devfdt_get_addr_size_index get reg
    
    fdtdec_get_addr_size() hard-codes the number of cells used to represent
    an address or size in DT. This is incorrect in many cases depending on
    the DT binding for a particular node or property (e.g. it is incorrect
    for the "reg" property). In most cases, DT parsing code must use the
    properties #address-cells and #size-cells to parse addres properties.
    
    Change-Id: I736cf41f48eaac5d6b82510a037f447ff874a9e4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 0f1d30820c..1f9d8b4a3e 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -96,9 +96,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp)
 			range->start = r.start;
 			range->size = r.end - r.start + 1;
 		} else {
-			range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob,
-					dev_of_offset(dev), "reg", index,
-					addr_len, size_len, &sz, true);
+			range->start = devfdt_get_addr_size_index(dev, index, &sz);
 			range->size = sz;
 		}
 	}

commit 7a5fbf5e5eab41d9f711a20be418cea3268e6701
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri May 18 14:04:23 2018 +0800

    board: evb-rk3308: compatible different adc key channle on board
    
    The RK3308 EVB has two variants: V10 & V11, and V10 bind the
    Recovery key on adc channel 0, but V11 bind to channel 1.
    Fortunately, the two variants use adc channel 3 to identify
    one from another as board id information. So we identify
    the board id by adc channel 3, then get the Recovery key
    status according to it's corresponding adc channel.
    
    Change-Id: Ib04fb1aad08f69fcdb493258e25c748fb45468d4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
index 4bf86117df..fad6b81f37 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -5,7 +5,41 @@
  */
 
 #include <common.h>
-#include <dm.h>
-#include <asm/io.h>
+#include <adc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
+#define KEY_DOWN_MIN_VAL        0
+#define KEY_DOWN_MAX_VAL        30
+
+/*
+ * Two board variants whith adc channel 3 is for board id
+ * v10: 1024, v11: 512
+ * v10: adc channel 0 for dnl key
+ * v11: adc channel 1 for dnl key
+ */
+int rockchip_dnl_key_pressed(void)
+{
+	unsigned int key_val, id_val;
+	int key_ch;
+
+	if (adc_channel_single_shot("saradc", 3, &id_val)) {
+		printf("%s read board id failed\n", __func__);
+		return false;
+	}
+
+	if (abs(id_val - 1024) <= 30)
+		key_ch = 0;
+	else
+		key_ch = 1;
+
+	if (adc_channel_single_shot("saradc", key_ch, &key_val)) {
+		printf("%s read adc key val failed\n", __func__);
+		return false;
+	}
+
+	if ((key_val >= KEY_DOWN_MIN_VAL) && (key_val <= KEY_DOWN_MAX_VAL))
+		return true;
+	else
+		return false;
+}

commit fd262f5b6d452a8d2a35ee4237a85e8a0d56617a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 11 15:19:43 2018 +0800

    rockchip: rkimg: rksfc use the storagemedia type 'nand'
    
    The device node for rksfc and rknand are the same in kernel, so
    we can use the same storage media type.
    
    Change-Id: I3eb70bc1a502e516fbf538ac274ee856a98ba556
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 2f95d75ea2..1e33a5e335 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -173,7 +173,7 @@ int get_bootdev_type(void)
 		boot_media = "nand";
 	} else if (!strcmp(devtype, "rksfc")) {
 		type = IF_TYPE_RKSFC;
-		boot_media = "spi flash";
+		boot_media = "nand"; /* kernel treat sfc nand as nand device */
 	} else {
 		/* Add new to support */
 	}

commit 083c304ab823e3a777ec4abd92f5e32e5bdcada8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu May 10 16:59:35 2018 +0800

    rockchip: rkimg: add 'sd' type for storagemedia
    
    mmc1 is sd card in U-Boot.
    
    Change-Id: I9f57d0029dcf0af043bc6b7c2e184e6e02482d89
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 9e421a2175..2f95d75ea2 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -148,11 +148,13 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
+	ulong devnum = 0;
 	char *boot_media = NULL, *devtype = NULL;
 	char boot_options[128] = {0};
 	static int appended;
 
 	devtype = env_get("devtype");
+	devnum = env_get_ulong("devnum", 10, 0);
 
 	/* For current use(Only EMMC support!) */
 	if (!devtype) {
@@ -162,7 +164,10 @@ int get_bootdev_type(void)
 
 	if (!strcmp(devtype, "mmc")) {
 		type = IF_TYPE_MMC;
-		boot_media = "emmc";
+		if (devnum == 1)
+			boot_media = "sd";
+		else
+			boot_media = "emmc";
 	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";

commit 65bd6b6a61a5742a0f2ebe56dbba7448714e4583
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 23 20:51:38 2018 +0800

    configs: evb-rk3399: use CONFIG_ENV_IS_NOWHERE
    
    Change-Id: I870b3d18508946301183f4de4127727c86a8c778
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 5cd17d2754..ccd490fbb2 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -38,7 +38,6 @@ CONFIG_CMD_TIME=y
 CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
@@ -99,3 +98,4 @@ CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_ENV_IS_NOWHERE=y

commit 5e8d3e945eaebb365ac0facbdeee7297ff3f9cfc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed May 23 21:26:19 2018 +0800

    rockchip: evb-rk3328: use RKIMG_BOOTCOMMAND
    
    Change-Id: If56d53ff6c7eba3a32a868d63cf5b754c5291790
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index 93b18b8c46..87f2c9e21a 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -15,4 +15,9 @@
 
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #endif

commit fb345bf21fda070b3963c64466382a4910dceef2
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Fri May 11 14:17:45 2018 +0800

    rockchip: add px3se evb board
    
    Add px3se evb board defconfig and dts.
    
    Change-Id: Ibd28b8ff74facf14209b3c563e2ee437226bd525
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
new file mode 100644
index 0000000000..b434b922f7
--- /dev/null
+++ b/arch/arm/dts/px3se-evb.dts
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
+
+/ {
+	model = "Rockchip PX3SE Evaluation board";
+	compatible = "rockchip,px3se-evb", "rockchip,px3se";
+
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	vcc50_otg: vcc50-otg {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc50_otg";
+		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+};
+
+&emmc {
+	fifo-mode;
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&uart1 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	vbus-supply = <&vcc50_otg>;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_drv: otg-drv {
+			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
new file mode 100644
index 0000000000..791a90b2cd
--- /dev/null
+++ b/configs/evb-px3se_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_FASTBOOT is not set
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0x20064000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 783d9bcb613d5cd59dea86f3531bb120cfc93f27
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Fri May 11 14:02:03 2018 +0800

    rockchip: dts: rk312x: Enable uart2 in dts instead of dtsi
    
    In most of case, uart2 is the cpu debug port, but there are boards
    that use the other uart as debug port.
    
    Enable uart2 is the job of specify dts, so moving it from
    rk3128-u-boot.dtsi.
    
    Change-Id: I9c2d071bf9edc18eef4c5753e69f769a3bbc0d7f
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index a49504b5f1..c940b8d219 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -361,6 +361,12 @@
 	status = "okay";
 };
 
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 4982b82c17..b2cd3b73ea 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -350,6 +350,12 @@
 	status = "okay";
 };
 
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 9546bdad03..b6cee9b105 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -63,6 +63,12 @@
 	status = "okay";
 };
 
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 039aeef456..3b225ad16f 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -9,12 +9,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
 &emmc {
 	u-boot,dm-pre-reloc;
 };

commit 80fb8d2c3522ed3c9f6440f7b70f00de09a83de0
Author: Shunqian Zheng <zhengsq@rock-chips.com>
Date:   Wed May 16 16:46:22 2018 +0800

    Revert "rockchip: add px3se evb board support"
    
    Another px3se evb dts/config will upload instead.
    
    This reverts commit a5c82e2bba8b66cfb14dc945c7f97dddec92542c.
    
    Change-Id: Iad3878b1cb1feb032c14252a90a59fc3070dafff
    Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 50ebeba724..087b721eea 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -57,8 +57,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3399-puma-ddr1333.dtb \
 	rk3399-puma-ddr1600.dtb \
 	rk3399-puma-ddr1866.dtb \
-	rv1108-evb.dtb	\
-	px3se-evb.dtb
+	rv1108-evb.dtb
 dtb-$(CONFIG_ARCH_MESON) += \
 	meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
deleted file mode 100644
index 9546bdad03..0000000000
--- a/arch/arm/dts/px3se-evb.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-/dts-v1/;
-
-#include "rk3128.dtsi"
-#include "rk3128-u-boot.dtsi"
-
-/ {
-	model = "Rockchip RK3128 Evaluation board";
-	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
-
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	vcc5v0_otg: vcc5v0-otg-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_otg";
-		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&otg_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
-	vcc5v0_host: vcc5v0-host-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_host";
-		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-};
-
-&i2c1 {
-	status = "okay";
-
-        hym8563: hym8563@51 {
-		compatible = "haoyu,hym8563";
-		reg = <0x51>;
-		#clock-cells = <0>;
-		clock-frequency = <32768>;
-		clock-output-names = "xin32k";
-	};
-};
-
-&u2phy {
-	status = "okay";
-};
-
-&u2phy_otg {
-	status = "okay";
-};
-
-&u2phy_host {
-	status = "okay";
-};
-
-&usb_host_ehci {
-	status = "okay";
-};
-
-&usb_host_ohci {
-	status = "okay";
-};
-
-&usb_otg {
-	vbus-supply = <&vcc5v0_otg>;
-	status = "okay";
-};
-
-&emmc {
-	fifo-mode;
-	status = "okay";
-};
-
-&pinctrl {
-	usb_otg {
-		otg_vbus_drv: otg-vbus-drv {
-			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb_host {
-		host_vbus_drv: host-vbus-drv {
-			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
deleted file mode 100644
index 7ddc4932cd..0000000000
--- a/configs/evb-px3se_defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RK3128=y
-CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
-CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
-CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_MMC_DW=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_PHY=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PINCTRL=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_RAM=y
-CONFIG_DM_RESET=y
-CONFIG_DEBUG_UART_BASE=0x20068000
-CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x310c
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
diff --git a/make.sh b/make.sh
index 3551d27b93..62419d277a 100755
--- a/make.sh
+++ b/make.sh
@@ -2,9 +2,8 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKTRUST_CHIP=${BOARD##*-}
-RKTRUST_CHIP=$(echo ${RKTRUST_CHIP} | tr '[a-z]' '[A-Z]')
-RKBOOT_CHIP=$RKTRUST_CHIP
+RKCHIP=${BOARD##*-}
+RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
 
@@ -130,12 +129,8 @@ sub_commands()
 
 fixup_chip_name()
 {
-	if [ "$RKTRUST_CHIP" = 'RK3228' -o "$RKTRUST_CHIP" = 'RK3229' ]; then
-		RKBOOT_CHIP=RK322X
-		RKTRUST_CHIP=RK322X
-	elif [ "$RKTRUST_CHIP" = 'PX3SE' ]; then
-		RKBOOT_CHIP=PX3SE
-		RKTRUST_CHIP=RK3126
+	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
+		RKCHIP=RK322X
 	fi
 }
 
@@ -159,26 +154,26 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	if [ ! -f ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
+	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
-	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini
+	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
-	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
+	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
 pack_mass_trust_image()
 {
 	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
 # OP-TEE is 132M(0x8400000) offset from DRAM base.
 	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
@@ -188,10 +183,10 @@ pack_mass_trust_image()
 	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 # Parse orignal path
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
 # replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
@@ -218,30 +213,30 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
 
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-		if [ $RKTRUST_CHIP = "PX30" -o $RKTRUST_CHIP = "RK3326" -o $RKTRUST_CHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
+		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		# RK3368 use rk big endian SHA256, it's pack magic is "2"
-		elif [ $RKTRUST_CHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
+		elif [ $RKCHIP = "RK3368" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		fi
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
 			return
 		fi
 
@@ -253,8 +248,8 @@ pack_trust_image()
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
 		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
@@ -275,7 +270,7 @@ pack_trust_image()
 			pack_mass_trust_image
 		fi
 
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
 	fi
 }
 

commit 328b7e77a21a34b046eaf9a7cf41c7d7c1a82047
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu May 10 19:59:25 2018 +0800

    Makefile: clean generated bin file when run make clean
    
    We may generate loader bin file like rkxxx_loader_xxx.bin
    by make.sh. It's better to clean it when run make clean
    command.
    
    Change-Id: Ic5347f1fac74c2d38c2922c7e704d892da0dce1f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/Makefile b/Makefile
index a1b28de1ef..f81ac1f9f9 100644
--- a/Makefile
+++ b/Makefile
@@ -1488,7 +1488,7 @@ CLEAN_DIRS  += $(MODVERDIR) \
 			$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
 
 CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
-	       boot* u-boot* MLO* SPL System.map fit-dtb.blob
+	       boot* u-boot* MLO* SPL System.map fit-dtb.blob *.bin
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl \

commit 154ef777074cea23d58a095100750f6b3be0a3d0
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu May 17 14:30:01 2018 +0800

    video/drm: lvds: default bypass rgb data sync on px30
    
    Change-Id: Ic1a8590da16dcc68fe457a9bc011e40e64298c75
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 3f73573525..4d221bdf5f 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -220,7 +220,7 @@ static void px30_output_ttl(struct display_state *state)
 	u32 val = 0;
 
 	/* enable lvds mode */
-	val = PX30_LVDS_PHY_MODE(0) | PX30_DPHY_FORCERXMODE(1);
+	val = PX30_RGB_SYNC_BYPASS(1) | PX30_DPHY_FORCERXMODE(1);
 	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
 
 	/* enable lane */
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 339a04dc3a..a77db720e7 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -118,6 +118,8 @@
 #define PX30_LVDS_PHY_MODE(x)		(BITS_MASK(x, 0x1, 12) | BITS_EN(0x1, 12))
 #define PX30_LVDS_MSBSEL(x)		(BITS_MASK(x, 0x1, 11) | BITS_EN(0x1, 11))
 #define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
+#define PX30_LCDC_DCLK_INV(x)		(BITS_MASK(x, 0x1,  4) | BITS_EN(0x1,  4))
+#define PX30_RGB_SYNC_BYPASS(x)		(BITS_MASK(x, 0x1,  3) | BITS_EN(0x1,  3))
 #define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
 #define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
 

commit f3f5bcc0a3b0a968b769e215810a09960d4bb418
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu May 17 16:05:28 2018 +0800

    video/drm: lvds: set clock lane enable for ttl mode
    
    Change-Id: I8881fa649d6c3108cbd2a9aa75881adc8fd1eaf2
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 4f3c0af80b..3f73573525 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -196,6 +196,9 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 		lvds_msk_reg(lvds, MIPIPHY_REGE3,
 			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 			     v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
+
+		/* set clock lane enable */
+		lvds_ctrl_writel(lvds, 0xa0, 0x4);
 	}
 	/* delay for waitting pll lock on */
 	while (delay_times--) {

commit a5c82e2bba8b66cfb14dc945c7f97dddec92542c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed May 16 10:51:42 2018 +0800

    rockchip: add px3se evb board support
    
    Change-Id: If1ab2bc8f166833ea882a0d4d134eb5c05151462
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 087b721eea..50ebeba724 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -57,7 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3399-puma-ddr1333.dtb \
 	rk3399-puma-ddr1600.dtb \
 	rk3399-puma-ddr1866.dtb \
-	rv1108-evb.dtb
+	rv1108-evb.dtb	\
+	px3se-evb.dtb
 dtb-$(CONFIG_ARCH_MESON) += \
 	meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
diff --git a/arch/arm/dts/px3se-evb.dts b/arch/arm/dts/px3se-evb.dts
new file mode 100644
index 0000000000..9546bdad03
--- /dev/null
+++ b/arch/arm/dts/px3se-evb.dts
@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
+
+/ {
+	model = "Rockchip RK3128 Evaluation board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+        hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
+	status = "okay";
+};
+
+&emmc {
+	fifo-mode;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/configs/evb-px3se_defconfig b/configs/evb-px3se_defconfig
new file mode 100644
index 0000000000..7ddc4932cd
--- /dev/null
+++ b/configs/evb-px3se_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_DEFAULT_DEVICE_TREE="px3se-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
diff --git a/make.sh b/make.sh
index 62419d277a..3551d27b93 100755
--- a/make.sh
+++ b/make.sh
@@ -2,8 +2,9 @@
 set -e
 BOARD=$1
 SUBCMD=$2
-RKCHIP=${BOARD##*-}
-RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
+RKTRUST_CHIP=${BOARD##*-}
+RKTRUST_CHIP=$(echo ${RKTRUST_CHIP} | tr '[a-z]' '[A-Z]')
+RKBOOT_CHIP=$RKTRUST_CHIP
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
 
@@ -129,8 +130,12 @@ sub_commands()
 
 fixup_chip_name()
 {
-	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
-		RKCHIP=RK322X
+	if [ "$RKTRUST_CHIP" = 'RK3228' -o "$RKTRUST_CHIP" = 'RK3229' ]; then
+		RKBOOT_CHIP=RK322X
+		RKTRUST_CHIP=RK322X
+	elif [ "$RKTRUST_CHIP" = 'PX3SE' ]; then
+		RKBOOT_CHIP=PX3SE
+		RKTRUST_CHIP=RK3126
 	fi
 }
 
@@ -154,26 +159,26 @@ pack_uboot_image()
 
 pack_loader_image()
 {
-	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
-		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	if [ ! -f ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
 		return
 	fi
 
 	cd ${RKBIN}
-	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
-	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKBOOT_CHIP}MINIALL.ini"
 }
 
 pack_mass_trust_image()
 {
 	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
 
 # OP-TEE is 132M(0x8400000) offset from DRAM base.
 	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
@@ -183,10 +188,10 @@ pack_mass_trust_image()
 	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 # Parse orignal path
-	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
 
 # replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
@@ -213,30 +218,30 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
 			return
 		fi
 
 		cd ${RKBIN}
 
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
-		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		if [ $RKTRUST_CHIP = "PX30" -o $RKTRUST_CHIP = "RK3326" -o $RKTRUST_CHIP = "RK3308" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
 		# RK3368 use rk big endian SHA256, it's pack magic is "2"
-		elif [ $RKCHIP = "RK3368" ]; then
-			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		elif [ $RKTRUST_CHIP = "RK3368" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
 		else
-			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini
 		fi
 
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
-		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		if [ ! -f ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
 			return
 		fi
 
@@ -248,8 +253,8 @@ pack_trust_image()
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
 		# Parse orignal path
-		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
-		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini|tr -d '\r'`
 
 		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
@@ -270,7 +275,7 @@ pack_trust_image()
 			pack_mass_trust_image
 		fi
 
-		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKTRUST_CHIP}TOS.ini"
 	fi
 }
 

commit b45ec7ccd833efcd005fe4a9630a532d0341cf65
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon May 14 17:28:03 2018 +0800

    make.sh: support rk312x trust.img pack
    
    generate both trust_nand.img and trust_emmc.img
    
    Change-Id: I736679f1544d1804487995d6eafbc876bec78bbe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 53d993ecf9..62419d277a 100755
--- a/make.sh
+++ b/make.sh
@@ -166,6 +166,47 @@ pack_loader_image()
 	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
+pack_mass_trust_image()
+{
+	local TOS0 TOS1 IMG0 IMG1 DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+
+# OP-TEE is 132M(0x8400000) offset from DRAM base.
+	DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+
+# Convert Dec to Hex
+	TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
+
+# Parse orignal path
+	TOS0=`sed -n "/TOS0=/s/TOS0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	TOS1=`sed -n "/TOS1=/s/TOS1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG0=`sed -n "/PATH0=/s/PATH0=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+	IMG1=`sed -n "/PATH1=/s/PATH1=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+
+# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
+	TOS0=$(echo ${TOS0} | sed "s/tools\/rk_tools\//\.\//g")
+	TOS1=$(echo ${TOS1} | sed "s/tools\/rk_tools\//\.\//g")
+
+	if [ "$TOS0" ]; then
+		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS0} ./${IMG0} ${TEE_LOAD_ADDR}
+		echo "${IMG0} is ready"
+	fi
+
+	if [ "$TOS1" ]; then
+		${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS1} ./${IMG1} ${TEE_LOAD_ADDR}
+		echo "${IMG1} is ready"
+	fi
+
+	if [ -z "$TOS0" -a -z "$TOS1" ]; then
+		echo "pack trust failed! Can't find any tee bin"
+	fi
+}
+
 pack_trust_image()
 {
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
@@ -214,7 +255,7 @@ pack_trust_image()
 		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
-		if [ $TOS_TA -a $TOS ]; then
+		if [ "$TOS_TA" -a "$TOS" ]; then
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
 			echo "Both trust.img and trust_with_ta.img are ready"
@@ -225,8 +266,8 @@ pack_trust_image()
 			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img with ta is ready"
 		else
-			echo "Can't find any tee bin"
-			exit 1
+			# Only RK312X need it to pack trust_emmc.img trust_nand.img
+			pack_mass_trust_image
 		fi
 
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"

commit 3929c02703ced13f754fcb7e3576fd0892831c92
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 2 15:13:54 2018 +0800

    dm: pmic: add child node status verify
    
    Ignore disabled child node when bind driver
    
    Change-Id: Ib817bf643efa6c8511d4619993444dddaac7d6bd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 5fb1ef5e60..8ef0d8bc71 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -13,6 +13,7 @@
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
+#include <dm/of_access.h>
 #include <power/pmic.h>
 #include <linux/ctype.h>
 
@@ -31,6 +32,7 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	ofnode node;
 	int prefix_len;
 	int ret;
+	bool enable;
 
 	debug("%s for '%s' at node offset: %d\n", __func__, pmic->name,
 	      dev_of_offset(pmic));
@@ -40,6 +42,16 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 
 		debug("* Found child node: '%s'\n", node_name);
 
+		if (ofnode_is_np(node))
+			enable = of_device_is_available(ofnode_to_np(node));
+		else
+			enable = fdtdec_get_is_enabled(gd->fdt_blob,
+						       ofnode_to_offset(node));
+		if (!enable) {
+			debug("* But '%s' is disabled\n", node_name);
+			continue;
+		}
+
 		child = NULL;
 		for (info = child_info; info->prefix && info->driver; info++) {
 			debug("  - compatible prefix: '%s'\n", info->prefix);

commit ad3a6a15738d38c546791ef0d23db6e5156f1d92
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Wed May 16 14:40:52 2018 +0800

    config: firefly-rk3399: support android boot image
    
    The boot.img will instead of the kernel.img and resource.img on linux
    platform.
    
    Change-Id: I392beb9b79b8c6c1a8974e70f7f0b3be43f42692
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index fd655a0f32..f0931266aa 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -9,11 +9,12 @@ CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -25,6 +26,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

commit 7f3c4f741c2880a831b4d7b6b0fcc5480158af1b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri May 11 11:05:13 2018 +0800

    make.sh: use rk big endian SHA256 for rk3368 trust.img pack
    
    rk big endian sha256 pack magic is "2", so use "--sha 2" subcmd
    
    Change-Id: I1a31712f808aaff7f9213ea6f1a7ca15fe3012c2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 51dfb3f4ff..53d993ecf9 100755
--- a/make.sh
+++ b/make.sh
@@ -182,6 +182,9 @@ pack_trust_image()
 		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
 		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
 			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		# RK3368 use rk big endian SHA256, it's pack magic is "2"
+		elif [ $RKCHIP = "RK3368" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --sha 2 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		else
 			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		fi

commit e5e978b341e471aa1cbedf1c00fcae9dd41e4ff6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 10 16:16:46 2018 +0800

    make.sh: use RSA PKCS1 V2.1 for RK3308/PX30/RK3326 trust.img pack
    
    RSA PKCS1 V2.1 pack magic is "3", so use "--rsa 3" subcmd
    
    Change-Id: Ic35445445121d765385f5cf9673473b061633a3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0366d4cbde..51dfb3f4ff 100755
--- a/make.sh
+++ b/make.sh
@@ -178,7 +178,14 @@ pack_trust_image()
 		fi
 
 		cd ${RKBIN}
-		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+
+		# RK3308/PX30/RK3326 use RSA-PKCS1 V2.1, it's pack magic is "3"
+		if [ $RKCHIP = "PX30" -o $RKCHIP = "RK3326" -o $RKCHIP = "RK3308" ]; then
+			${TOOLCHAIN_RKBIN}/trust_merger --rsa 3 --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		else
+			${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		fi
+
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
 		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"

commit 78b2d46dbc94ac6efa706a2e41b9966dfe734d40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 3 20:07:45 2018 +0800

    rockchip: px30: enable all gpio in pre-reloc
    
    support muilt dtb dynamically loading by gpio value,
    set status disabled, we just want its property.
    
    Change-Id: Ic636c9f42e5e3bc134e29f06d124644b7e5a3349
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 1372da433c..0204cede7b 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -42,3 +42,23 @@
 	u-boot,dm-pre-reloc;
 	status = "okay";
 };
+
+&gpio0 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
+&gpio1 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
+&gpio2 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+	status = "disabled";
+};

commit 73f99ea810566e73bfb31c7196ce303b098c8260
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 3 20:06:03 2018 +0800

    rockchip: dts: px30: enable saradc in pre-reloc
    
    support multi dtb dynamically loading by adc value.
    
    Change-Id: I12ec2a32e4055c2ccfc999d7ab3b3d209db12242
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 1a113cbff6..1372da433c 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -37,3 +37,8 @@
 &cru {
 	u-boot,dm-pre-reloc;
 };
+
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};

commit 740107bb19724c07d85af578139cd5aa9b00a2bd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu May 3 19:52:53 2018 +0800

    rockchip: support alternative kernel dtb depends on adc/gpio
    
    1. support adc value recognize;
    2. support gpio value recognize;
    
    Change-Id: I8bcbdd914405184d46029c4995c09b09e36c7ea3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index 0e4ea83fe9..b90ae272de 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -18,4 +18,5 @@ int rockchip_read_resource_file(void *buf, const char *name,
 				int offset, int len);
 int rockchip_get_resource_file(void *buf, const char *name);
 
+int rockchip_read_dtb_file(void *fdt_addr);
 #endif
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b1521e88b5..b9e4f6d6bf 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -103,7 +103,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_USING_KERNEL_DTB
 #include <asm/arch/resource_img.h>
-#define DTB_FILE                        "rk-kernel.dtb"
+
 int init_kernel_dtb(void)
 {
 	int ret = 0;
@@ -137,7 +137,7 @@ init_dtb:
 		return -1;
 	}
 
-	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
+	ret = rockchip_read_dtb_file((void *)fdt_addr);
 	if (ret < 0) {
 		printf("%s dtb in resource read fail\n", __func__);
 		return 0;
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 62db314389..0766f15bcc 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -4,10 +4,13 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
+#include <adc.h>
+#include <asm/io.h>
 #include <malloc.h>
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
 #include <boot_rkimg.h>
+#include <dm/ofnode.h>
 #ifdef CONFIG_ANDROID_AB
 #include <android_avb/libavb_ab.h>
 #include <android_avb/rk_avb_ops_user.h>
@@ -17,6 +20,8 @@
 #include <android_image.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #define PART_RESOURCE			"resource"
 #define RESOURCE_MAGIC			"RSCE"
 #define RESOURCE_MAGIC_SIZE		4
@@ -330,3 +335,239 @@ int rockchip_read_resource_file(void *buf, const char *name,
 
 	return ret;
 }
+
+#define is_digit(c)		((c) >= '0' && (c) <= '9')
+#define is_abcd(c)		((c) >= 'a' && (c) <= 'd')
+#define is_equal(c)		((c) == '=')
+
+#define DTB_FILE		"rk-kernel.dtb"
+#define KEY_WORDS_ADC_CTRL	"#_"
+#define KEY_WORDS_ADC_CH	"_ch"
+#define KEY_WORDS_GPIO		"#gpio"
+#define GPIO_EXT_PORT		0x50
+#define MAX_ADC_CH_NR		10
+#define MAX_GPIO_NR		10
+
+/*
+ * How to make it works ?
+ *
+ * 1. pack dtb into rockchip resource.img, require:
+ *    (1) file name end with ".dtb";
+ *    (2) file name contains key words, like: ...#_[controller]_ch[channel]=[value]...dtb
+ *	  @controller: adc controller name in dts, eg. "saradc", ...;
+ *	  @channel: adc channel;
+ *	  @value: adc value;
+ *    eg: ...#_saradc_ch1=223#_saradc_ch2=650....dtb
+ *
+ * 2. U-Boot dtsi about adc controller node:
+ *    (1) enable "u-boot,dm-pre-reloc;";
+ *    (2) must set status "okay";
+ */
+static int rockchip_read_dtb_by_adc(const char *file_name)
+{
+	static int cached_v[MAX_ADC_CH_NR];
+	int offset_ctrl = strlen(KEY_WORDS_ADC_CTRL);
+	int offset_ch = strlen(KEY_WORDS_ADC_CH);
+	int ret, channel, len = 0, found = 0, margin = 30;
+	uint32_t raw_adc;
+	unsigned long dtb_adc;
+	char *stradc, *strch, *p;
+	char adc_v_string[10];
+	char dev_name[32];
+
+	debug("%s: %s\n", __func__, file_name);
+
+	/* Invalid format ? */
+	stradc = strstr(file_name, KEY_WORDS_ADC_CTRL);
+	while (stradc) {
+		debug("   - substr: %s\n", stradc);
+
+		/* Parse controller name */
+		strch = strstr(stradc, KEY_WORDS_ADC_CH);
+		len = strch - (stradc + offset_ctrl);
+		strlcpy(dev_name, stradc + offset_ctrl, len + 1);
+
+		/* Parse adc channel */
+		p = strch + offset_ch;
+		if (is_digit(*p) && is_equal(*(p + 1))) {
+			channel = *p - '0';
+		} else {
+			debug("   - invalid format: %s\n", stradc);
+			return -EINVAL;
+		}
+
+		/* Read raw adc value */
+		if (cached_v[channel] == 0) {
+			ret = adc_channel_single_shot(dev_name,
+						      channel, &raw_adc);
+			if (ret) {
+				debug("   - failed to read adc, ret=%d\n", ret);
+				return ret;
+			}
+			cached_v[channel] = raw_adc;
+		}
+
+		/* Parse dtb adc value */
+		p = strch + offset_ch + 2;	/* 2: channel and '=' */
+		while (*p && is_digit(*p)) {
+			len++;
+			p++;
+		}
+		strlcpy(adc_v_string, strch + offset_ch + 2, len + 1);
+		dtb_adc = simple_strtoul(adc_v_string, NULL, 10);
+
+		if (abs(dtb_adc - cached_v[channel]) <= margin) {
+			found = 1;
+			stradc = strstr(p, KEY_WORDS_ADC_CTRL);
+		} else {
+			found = 0;
+			break;
+		}
+
+		debug("   - parse: controller=%s, channel=%d, dtb_adc=%ld, read=%d %s\n",
+		      dev_name, channel, dtb_adc, cached_v[channel], found ? "(Y)" : "");
+	}
+
+	return found ? 0 : -ENOENT;
+}
+
+static int gpio_parse_base_address(fdt_addr_t *gpio_base_addr)
+{
+	static int initial;
+	ofnode parent, node;
+	int i = 0;
+
+	if (initial)
+		return 0;
+
+	parent = ofnode_path("/pinctrl");
+	if (!ofnode_valid(parent)) {
+		debug("   - Can't find pinctrl node\n");
+		return -EINVAL;
+	}
+
+	ofnode_for_each_subnode(node, parent) {
+		if (!ofnode_get_property(node, "gpio-controller", NULL)) {
+			debug("   - Can't find gpio-controller\n");
+			continue;
+		}
+
+		gpio_base_addr[i++] = ofnode_get_addr(node);
+		debug("   - gpio%d: 0x%x\n", i - 1, (uint32_t)gpio_base_addr[i - 1]);
+	}
+
+	if (i == 0) {
+		debug("   - parse gpio address failed\n");
+		return -EINVAL;
+	}
+
+	initial = 1;
+
+	return 0;
+}
+
+/*
+ * How to make it works ?
+ *
+ * 1. pack dtb into rockchip resource.img, require:
+ *    (1) file name end with ".dtb";
+ *    (2) file name contains key words, like: ...#gpio[pin]=[value]...dtb
+ *	  @pin: gpio name, eg. 0a2 means GPIO0A2;
+ *	  @value: gpio level, 0 or 1;
+ *    eg: ...#gpio0a6=1#gpio1c2=0....dtb
+ *
+ * 2. U-Boot dtsi about gpio node:
+ *    (1) enable "u-boot,dm-pre-reloc;" for all gpio node;
+ *    (2) set all gpio status "disabled"(Because we just want their property);
+ */
+static int rockchip_read_dtb_by_gpio(const char *file_name)
+{
+	static uint32_t cached_v[MAX_GPIO_NR];
+	fdt_addr_t gpio_base_addr[MAX_GPIO_NR];
+	int ret, found = 0, offset = strlen(KEY_WORDS_GPIO);
+	uint8_t port, pin, bank, lvl, val;
+	char *strgpio, *p;
+	uint32_t bit;
+
+	debug("%s\n", file_name);
+
+	strgpio = strstr(file_name, KEY_WORDS_GPIO);
+	while (strgpio) {
+		debug("   - substr: %s\n", strgpio);
+
+		p = strgpio + offset;
+
+		/* Invalid format ? */
+		if (!(is_digit(*(p + 0)) && is_abcd(*(p + 1)) &&
+		      is_digit(*(p + 2)) && is_equal(*(p + 3)) &&
+		      is_digit(*(p + 4)))) {
+			debug("   - invalid format: %s\n", strgpio);
+			return -EINVAL;
+		}
+
+		/* Parse gpio address */
+		ret = gpio_parse_base_address(gpio_base_addr);
+		if (ret) {
+			debug("   - Can't parse gpio base address: %d\n", ret);
+			return ret;
+		}
+
+		/* Read gpio value */
+		port = *(p + 0) - '0';
+		bank = *(p + 1) - 'a';
+		pin  = *(p + 2) - '0';
+		lvl  = *(p + 4) - '0';
+
+		if (cached_v[port] == 0)
+			cached_v[port] =
+				readl(gpio_base_addr[port] + GPIO_EXT_PORT);
+
+		/* Verify result */
+		bit = bank * 32 + pin;
+		val = cached_v[port] & (1 << bit) ? 1 : 0;
+
+		if (val == !!lvl) {
+			found = 1;
+			strgpio = strstr(p, KEY_WORDS_GPIO);
+		} else {
+			found = 0;
+			break;
+		}
+
+		debug("   - parse: gpio%d%c%d=%d, read=%d %s\n",
+		      port, bank + 'a', pin, lvl, val, found ? "(Y)" : "");
+	}
+
+	return found ? 0 : -ENOENT;
+}
+
+int rockchip_read_dtb_file(void *fdt_addr)
+{
+	struct resource_file *file;
+	struct list_head *node;
+	char *dtb_name = DTB_FILE;
+
+	if (list_empty(&entrys_head))
+		init_resource_list(NULL);
+
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		if (!strstr(file->name, ".dtb"))
+			continue;
+
+		if (strstr(file->name, KEY_WORDS_ADC_CTRL) &&
+		    strstr(file->name, KEY_WORDS_ADC_CH) &&
+		    !rockchip_read_dtb_by_adc(file->name)) {
+			dtb_name = file->name;
+			break;
+		} else if (strstr(file->name, KEY_WORDS_GPIO) &&
+			   !rockchip_read_dtb_by_gpio(file->name)) {
+			dtb_name = file->name;
+			break;
+		}
+	}
+
+	printf("DTB: %s\n", dtb_name);
+
+	return rockchip_read_resource_file((void *)fdt_addr, dtb_name, 0, 0);
+}
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 2545ca90d4..9e421a2175 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -380,8 +380,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	}
 
 	if (gd->fdt_blob != (void *)fdt_addr_r) {
-		fdt_size = rockchip_read_resource_file((void *)fdt_addr_r,
-						       DTB_FILE, 0, 0);
+		fdt_size = rockchip_read_dtb_file((void *)fdt_addr_r);
 		if (fdt_size < 0) {
 			printf("%s fdt read error\n", __func__);
 			ret = -EINVAL;

commit 7c19369d038571ed89e55b92f04ac4f937fc7def
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 23 16:18:54 2018 +0800

    make.sh: delete unused similar files and add support list show
    
    Change-Id: I24b1a05f6a321d2f409c25822b7dbbba5e1ae6d6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 5c896931b3..0366d4cbde 100755
--- a/make.sh
+++ b/make.sh
@@ -5,6 +5,7 @@ SUBCMD=$2
 RKCHIP=${BOARD##*-}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
+SUPPROT_LIST=`ls configs/*-r[v,k][0-9][0-9][0-9][0-9]_defconfig`
 
 # Declare global default output dir and cmd, update in prepare()
 OUTDIR=.
@@ -42,6 +43,11 @@ prepare()
 		exit 1
 	elif [ ! -f configs/${BOARD}_defconfig ]; then
 		echo "Can't find: configs/${BOARD}_defconfig"
+		echo
+		echo "*************** Support list ***************"
+		echo "$SUPPROT_LIST"
+		echo "********************************************"
+		echo
 		exit 1
 	fi
 
@@ -134,7 +140,15 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
-	rm ${OUTDIR}/u-boot.img ${OUTDIR}/u-boot-dtb.img
+
+	if [ -f ${OUTDIR}/u-boot.img ]; then
+		rm ${OUTDIR}/u-boot.img
+	fi
+
+	if [ -f ${OUTDIR}/u-boot-dtb.img ]; then
+		rm ${OUTDIR}/u-boot-dtb.img
+	fi
+
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 

commit 147a6b4de7233bd4252480f6977e316139961d61
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 15:01:13 2018 +0800

    arm: rockchip: rk3308: add sfc node for rk3308
    
    Change-Id: I66524230fd5a460aebafe1878154673770510b86
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index d4f016af16..1502276446 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -407,6 +407,16 @@
 		status = "disabled";
 	};
 
+
+	sfc: sfc@ff4c0000 {
+		compatible = "rockchip,rksfc";
+		reg = <0x0 0xff4c0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+		clock-names = "clk_sfc", "hclk_sfc";
+		status = "disabled";
+	};
+
 	cru: clock-controller@ff500000 {
 		compatible = "rockchip,rk3308-cru";
 		reg = <0x0 0xff500000 0x0 0x1000>;

commit bc0b8cd41bbb4e84adbfd0b75d9df9b56bc8abbb
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue May 8 22:02:25 2018 +0800

    rockchip: config: add rksfc dev scan
    
    Change-Id: I68e4205db9000bd254f3cdcf1d69aef508fdc468
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index e285700747..4c8220e8bd 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -93,6 +93,8 @@
 		"setenv devtype mmc; setenv devnum 0;" \
 	"elif rknand dev 0; then " \
 		"setenv devtype rknand; setenv devnum 0;" \
+        "elif rksfc dev 0; then " \
+                "setenv devtype rksfc; setenv devnum 0;" \
 	"fi; \0"
 
 #define RKIMG_BOOTCOMMAND \

commit c2717d6fedadb58d1aec551ecbb9373f875a1e7e
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:45:09 2018 +0800

    common: boot_rkimg: add boot devtype rksfc
    
    Change-Id: I2ec14959aa1cc83ef7edf82944f8235f4db17690
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index cc92903e47..2545ca90d4 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -166,6 +166,9 @@ int get_bootdev_type(void)
 	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";
+	} else if (!strcmp(devtype, "rksfc")) {
+		type = IF_TYPE_RKSFC;
+		boot_media = "spi flash";
 	} else {
 		/* Add new to support */
 	}
@@ -177,7 +180,7 @@ int get_bootdev_type(void)
 		 * 2. rknand doesn't need "androidboot.mode=";
 		 */
 		if (env_exist("bootargs", "androidboot.mode=charger") ||
-		    (type == IF_TYPE_RKNAND))
+		    (type == IF_TYPE_RKNAND) || (type == IF_TYPE_RKSFC))
 			snprintf(boot_options, sizeof(boot_options),
 				 "storagemedia=%s", boot_media);
 		else

commit ae20a02c8e79fc892e3ba29b760a0625cbf6a1e8
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:41:42 2018 +0800

    disk: part: add rksfc description print
    
    Change-Id: I61fb8817fba3d4ddf799a17abb504c4e37c796d3
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 49cda42e09..72d1146c94 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -151,6 +151,12 @@ void dev_print (struct blk_desc *dev_desc)
 			dev_desc->revision,
 			dev_desc->product);
 		break;
+	case IF_TYPE_RKSFC:
+		printf ("Vendor: %s Rev: %s Prod: %s\n",
+			dev_desc->vendor,
+			dev_desc->revision,
+			dev_desc->product);
+		break;
 	case IF_TYPE_DOC:
 		puts("device type DOC\n");
 		return;
@@ -285,6 +291,9 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_RKNAND:
 		puts("RKNAND");
 		break;
+	case IF_TYPE_RKSFC:
+		puts("RKSFC");
+		break;
 	default:
 		puts ("UNKNOWN");
 		break;

commit 2c3e7d2a8304f9743deb33c835601dc3432ea09c
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:40:18 2018 +0800

    drvers: block: blk-uclass: add rksfc block interface
    
    Change-Id: Ia9244aa6d5829b7a67fadab18f655fa7a7c5cfe1
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 58cf81703e..4e000b9e8a 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -25,6 +25,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_SYSTEMACE]	= "ace",
 	[IF_TYPE_NVME]		= "nvme",
 	[IF_TYPE_RKNAND]	= "rknand",
+	[IF_TYPE_RKSFC]		= "rksfc",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -39,6 +40,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_HOST]		= UCLASS_ROOT,
 	[IF_TYPE_NVME]		= UCLASS_NVME,
 	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
+	[IF_TYPE_RKSFC]		= UCLASS_SPI_FLASH,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/include/blk.h b/include/blk.h
index d8e3825454..f925832237 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -35,6 +35,7 @@ enum if_type {
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
 	IF_TYPE_RKNAND,
+	IF_TYPE_RKSFC,
 	IF_TYPE_SPINAND,
 	IF_TYPE_SPINOR,
 

commit d5f538dc02e53c7267fcd4a914104071fca889b5
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Thu Apr 26 14:09:07 2018 +0800

    cmd: rksfc: add sfc u-boot command
    
    rksfc driver with block interface
    
    Change-Id: I395cf78e939ce9ddbd07a9afad794474f0482542
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6afb4fd64f..f7f78c6361 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -898,6 +898,13 @@ config CMD_RKNAND
 	help
 	  Rockchip NAND FLASH device support
 
+config CMD_RKSFC
+	bool "rksfc"
+	depends on (RKSFC_NOR || RKSFC_NAND)
+	default y if (RKSFC_NOR || RKSFC_NAND)
+	help
+	  Rockchip SFC device support
+
 config CMD_SATA
 	bool "sata - Access SATA subsystem"
 	select SATA
diff --git a/cmd/Makefile b/cmd/Makefile
index 82817e2943..4f12f6fdbe 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -115,6 +115,7 @@ obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
 obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RKNAND) += rknand.o
+obj-$(CONFIG_CMD_RKSFC) += rksfc.o
 obj-$(CONFIG_CMD_SF) += sf.o
 obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
 obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
diff --git a/cmd/rksfc.c b/cmd/rksfc.c
new file mode 100644
index 0000000000..f4b4a317d7
--- /dev/null
+++ b/cmd/rksfc.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <rksfc.h>
+
+static int rksfc_curr_dev;
+static int do_rksfc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	int ret;
+
+	if (argc == 2) {
+		if (strncmp(argv[1], "scan", 4) == 0) {
+			ret = rksfc_scan_namespace();
+			if (ret)
+				return CMD_RET_FAILURE;
+
+			return ret;
+		}
+	}
+
+	return blk_common_cmd(argc, argv, IF_TYPE_RKSFC, &rksfc_curr_dev);
+}
+
+U_BOOT_CMD(
+	rksfc, 8, 1, do_rksfc,
+	"rockchip sfc sub-system",
+	"scan - scan Sfc devices\n"
+	"rksfc info - show all available Sfc devices\n"
+	"rksfc device [dev] - show or set current Sfc device\n"
+	"rksfc part [dev] - print partition table of one or all Sfc devices\n"
+	"rksfc read addr blk# cnt - read `cnt' blocks starting at block\n"
+	"     `blk#' to memory address `addr'\n"
+	"rksfc write addr blk# cnt - write `cnt' blocks starting at block\n"
+	"     `blk#' from memory address `addr'"
+);
diff --git a/doc/README.rksfc b/doc/README.rksfc
new file mode 100644
index 0000000000..447c8a6174
--- /dev/null
+++ b/doc/README.rksfc
@@ -0,0 +1,29 @@
+rksfc (Rockchip SPI FLASH SFC drivers)
+=====================================================
+
+Overview
+--------
+
+The rksfc is used for Rockchip Soc sfc devices with
+block interface.
+
+Status
+------
+It supprot SFC SPI NOR.
+
+Usage in U-Boot
+---------------
+
+To list all of the rksfc hard disks, try:
+
+  => rksfc info
+  Device 0: Vendor: 0x0308 Rev: V1.00 Prod: rksfc
+	    Type: Hard Disk
+	    Capacity: 32.0 MB = 0.0 GB (65600 x 512)
+
+To find and initialize sfc devices, try:
+  => rksfc dev 0
+  Device 0: Vendor: 0x0308 Rev: V1.00 Prod: rksfc
+	    Type: Hard Disk
+	    Capacity: 32.0 MB = 0.0 GB (65600 x 512)
+... is now current device
diff --git a/include/rksfc.h b/include/rksfc.h
new file mode 100644
index 0000000000..03a457b8bb
--- /dev/null
+++ b/include/rksfc.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RKSFC_H__
+#define __RKSFC_H__
+/**
+ * rksfc_scan_namespace - scan all namespaces attached to RK SFC
+ * controllers
+ *
+ * This probes all registered RK SFC uclass device drivers in the
+ * system,and tries to find all namespaces attached to the RK SFC
+ * controllers.
+ *
+ * @return:	0 on success, -ve on error
+ */
+int rksfc_scan_namespace(void);
+#endif

commit ad309a883b81622573c8021d60b4eb676f57d5c2
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Tue May 8 21:32:34 2018 +0800

    rockchip: rkflash: add rk small capacity flash storage support with block interface
    
    Currently only support spi nor flash, but slc nand flash and spi nand flash will be
    supported in next step;
    The code includes block layer, ftl layer(nand flash), controller layer and flash layer.
    
    Change-Id: Iaa56294ee2a5a6dfec2d0172efc35de30c88365a
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 11d7fb2ed0..a18ba97135 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -76,6 +76,8 @@ source "drivers/reset/Kconfig"
 
 source "drivers/rknand/Kconfig"
 
+source "drivers/rkflash/Kconfig"
+
 source "drivers/rtc/Kconfig"
 
 source "drivers/scsi/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index b00a2ca1ae..e806aec2cf 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -77,6 +77,7 @@ obj-y += misc/
 obj-$(CONFIG_MMC) += mmc/
 obj-$(CONFIG_NVME) += nvme/
 obj-$(CONFIG_RKNAND) += rknand/
+obj-$(CONFIG_RKFLASH) += rkflash/
 obj-y += pcmcia/
 obj-y += dfu/
 obj-$(CONFIG_X86) += pch/
diff --git a/drivers/rkflash/Kconfig b/drivers/rkflash/Kconfig
new file mode 100644
index 0000000000..ab6fce36a0
--- /dev/null
+++ b/drivers/rkflash/Kconfig
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#
+if ARCH_ROCKCHIP
+
+menuconfig RKFLASH
+	tristate "Rockchip Flash Devices Support"
+	default n
+	help
+	  Enable rockchip flash devices support.
+	  rkflash driver support 3-type flash devices: NANDC NAND, SFC_NOR
+	  and SFC_NAND.
+	  Say Y when you have a board with one of them.
+
+if RKFLASH
+
+comment "Rockchip Flash Devices"
+
+config RKSFC_NOR
+	bool "Rockchip SFC NOR flash support"
+	depends on BLK
+	help
+	  This option enables support for Rockchip SFC nor devices.
+	  It's block interface.
+	  512Kb/sector.
+	  Say y here to enable rockchip spi nor flash driver.
+
+endif # RKFLASH
+
+endif # ARCH_ROCKCHIP
diff --git a/drivers/rkflash/Makefile b/drivers/rkflash/Makefile
new file mode 100644
index 0000000000..164c7e9d7f
--- /dev/null
+++ b/drivers/rkflash/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#
+
+obj-y += rkflash_debug.o
+obj-$(CONFIG_RKSFC_NOR) += sfc.o sfc_nor.o rkflash_api.o rksfc_base.o rkflash_blk.o
\ No newline at end of file
diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c
new file mode 100644
index 0000000000..bc7b4c839e
--- /dev/null
+++ b/drivers/rkflash/rkflash_api.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+#include <common.h>
+#include <dm.h>
+
+#include "rkflash_api.h"
+#include "rkflash_blk.h"
+
+#ifdef CONFIG_RKSFC_NOR
+int rk_snor_init(struct udevice *udev)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_init(p_dev);
+}
+
+u32 rk_snor_get_capacity(struct udevice *udev)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_get_capacity(p_dev);
+}
+
+int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_read(p_dev, sec, n_sec, p_data);
+}
+
+int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data)
+{
+	struct rkflash_info *priv = dev_get_priv(udev);
+	struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info;
+
+	return snor_write(p_dev, sec, n_sec, p_data);
+}
+#endif
+
diff --git a/drivers/rkflash/rkflash_api.h b/drivers/rkflash/rkflash_api.h
new file mode 100644
index 0000000000..ece56c0944
--- /dev/null
+++ b/drivers/rkflash/rkflash_api.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef __RKFLASH_API_H
+#define __RKFLASH_API_H
+
+#ifdef CONFIG_RKSFC_NOR
+#include "sfc_nor.h"
+#include "sfc.h"
+
+int rk_snor_init(struct udevice *udev);
+u32 rk_snor_get_capacity(struct udevice *udev);
+int rk_snor_read(struct udevice *udev, u32 sec, u32 n_sec, void *p_data);
+int rk_snor_write(struct udevice *udev, u32 sec, u32 n_sec, const void *p_data);
+#endif
+
+#endif
diff --git a/drivers/rkflash/rkflash_blk.c b/drivers/rkflash/rkflash_blk.c
new file mode 100644
index 0000000000..702fc1aed1
--- /dev/null
+++ b/drivers/rkflash/rkflash_blk.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+
+#include "rkflash_blk.h"
+#include "rkflash_debug.h"
+
+ulong rkflash_bread(struct udevice *udev, lbaint_t start,
+		    lbaint_t blkcnt, void *dst)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (!priv->read)
+		return 0;
+
+	return (ulong)priv->read(udev->parent, (u32)start, (u32)blkcnt, dst);
+}
+
+ulong rkflash_bwrite(struct udevice *udev, lbaint_t start,
+		     lbaint_t blkcnt, const void *src)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (!priv->write)
+		return 0;
+
+	return (ulong)priv->write(udev->parent, (u32)start, (u32)blkcnt, src);
+}
+
+ulong rkflash_berase(struct udevice *udev, lbaint_t start,
+		     lbaint_t blkcnt)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (!priv->erase)
+		return 0;
+
+	return (ulong)priv->erase(udev->parent, (u32)start, (u32)blkcnt);
+}
+
+static int rkflash_blk_probe(struct udevice *udev)
+{
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	debug("%s %d %p ndev = %p %p\n", __func__, __LINE__,
+	      udev, priv, udev->parent);
+	priv->child_dev = udev;
+	if (priv->flash_con_type == FLASH_CON_TYPE_SFC)
+		desc->if_type = IF_TYPE_RKSFC;
+	desc->lba = priv->density;
+	desc->log2blksz = 9;
+	desc->blksz = 512;
+	desc->bdev = udev;
+	desc->devnum = 0;
+	sprintf(desc->vendor, "0x%.4x", 0x0308);
+	memcpy(desc->product, "rkflash", sizeof("rkflash"));
+	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+	part_init(desc);
+	rkflash_test(udev);
+
+	return 0;
+}
+
+static const struct blk_ops rkflash_blk_ops = {
+	.read	= rkflash_bread,
+	.write	= rkflash_bwrite,
+	.erase	= rkflash_berase,
+};
+
+U_BOOT_DRIVER(rkflash_blk) = {
+	.name		= "rkflash_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &rkflash_blk_ops,
+	.probe		= rkflash_blk_probe,
+};
+
diff --git a/drivers/rkflash/rkflash_blk.h b/drivers/rkflash/rkflash_blk.h
new file mode 100644
index 0000000000..9384b0ac49
--- /dev/null
+++ b/drivers/rkflash/rkflash_blk.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef __RKFLASH_BLK_H__
+#define __RKFLASH_BLK_H__
+
+enum flash_con_type {
+	FLASH_CON_TYPE_NANDC = 0,
+	FLASH_CON_TYPE_SFC,
+	FLASH_CON_TYPE_MAX,
+};
+
+enum flash_type {
+	FLASH_TYPE_NANDC_NAND = 0,
+	FLASH_TYPE_SFC_NOR,
+	FLASH_TYPE_SFC_NAND,
+	FLASH_TYPE_MAX,
+};
+
+struct flash_operation {
+	int id;
+	int (*flash_init)(struct udevice *udev);
+	u32 (*flash_get_capacity)(struct udevice *udev);
+	int (*flash_read)(struct udevice *udev,
+			  u32 start,
+			  u32 blkcnt,
+			  void *buffer);
+	int (*flash_write)(struct udevice *udev,
+			   u32 start,
+			   u32 blkcnt,
+			   const void *buffer);
+};
+
+struct rkflash_dev {
+	u8 reserved[128];
+};
+
+struct rkflash_info {
+	void *ioaddr;
+	u32 flash_con_type;
+	u32 freq;
+	u32 density;
+	struct udevice *child_dev;
+	struct rkflash_dev flash_dev_info;
+	/*
+	 * read() - read from a block device
+	 *
+	 * @start:	Start block number to read (0=first)
+	 * @blkcnt:	Number of blocks to read
+	 * @buffer:	Destination buffer for data read
+	 * @return 0 is OK, -1 is error.
+	 */
+	int (*read)(struct udevice *udev,
+		    u32 start,
+		    u32 blkcnt,
+		    void *buffer);
+	/*
+	 * write() - write to a block device
+	 *
+	 * @dev:	Device to write to
+	 * @start:	Start block number to write (0=first)
+	 * @blkcnt:	Number of blocks to write
+	 * @buffer:	Source buffer for data to write
+	 * @return 0 is OK, -1 is error.
+	 */
+	int (*write)(struct udevice *udev,
+		     u32 start,
+		     u32 blkcnt,
+		     const void *buffer);
+	/*
+	 * erase() - erase a section of a block device
+	 *
+	 * @dev:	Device to (partially) erase
+	 * @start:	Start block number to erase (0=first)
+	 * @blkcnt:	Number of blocks to erase
+	 * @return 0 is OK, -1 is error.
+	 */
+	int (*erase)(struct udevice *udev,
+		     u32 start,
+		     u32 blkcnt);
+};
+
+struct rkflash_uclass_priv {
+	struct rkflash_info *ndev;
+};
+
+#endif /* __RKSFC_BLK_H__ */
diff --git a/drivers/rkflash/rkflash_debug.c b/drivers/rkflash/rkflash_debug.c
new file mode 100644
index 0000000000..8321522fec
--- /dev/null
+++ b/drivers/rkflash/rkflash_debug.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <blk.h>
+
+#include "rkflash_debug.h"
+#include "rkflash_blk.h"
+
+void rkflash_print_hex(char *s, void *buf, u32 width, u32 len)
+{
+	u32 i, j;
+	char *p8 = (char *)buf;
+	short *p16 = (short *)buf;
+	u32 *p32 = (u32 *)buf;
+
+	j = 0;
+	for (i = 0; i < len; i++) {
+		if (j == 0)
+			printf("%s 0x%x:", s, i * width);
+
+		if (width == 4)
+			printf("%x ", p32[i]);
+		else if (width == 2)
+			printf("%x ", p16[i]);
+		else
+			printf("%02x ", p8[i]);
+		if (++j >= 16) {
+			j = 0;
+			printf("\n");
+		}
+	}
+	printf("\n");
+}
+
+#if (BLK_STRESS_TEST_EN)
+#define max_test_sector 64
+u8 pwrite[max_test_sector * 512];
+u8 pread[max_test_sector * 512];
+u32 *pwrite32;
+void blk_stress_test(struct udevice *udev)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rkflash_info *priv = dev_get_priv(udev->parent);
+	u16 i, j, loop = 0;
+	u32 test_end_lba;
+	u32 test_lba = 0;
+	u16 test_sec_count = 1;
+	u16 print_flag;
+
+	if (!priv || !block_dev) {
+		printf("device unknown\n");
+		return;
+	}
+
+	test_end_lba = priv->density;
+	pwrite32 = (u32 *)pwrite;
+	for (i = 0; i < (max_test_sector * 512); i++)
+		pwrite[i] = i;
+	for (loop = 0; loop < 10; loop++) {
+		printf("---------Test loop = %d---------\n", loop);
+		printf("---------Test ftl write---------\n");
+		test_sec_count = 1;
+		printf("test_end_lba = %x\n", test_end_lba);
+		printf("test_lba = %x\n", test_lba);
+		for (test_lba = 0;
+		     (test_lba + test_sec_count) < test_end_lba;) {
+			pwrite32[0] = test_lba;
+			blk_dwrite(block_dev, test_lba, test_sec_count, pwrite);
+			blk_dread(block_dev, test_lba, test_sec_count, pread);
+			for (j = 0; j < test_sec_count * 512; j++) {
+				if (pwrite[j] != pread[j]) {
+					rkflash_print_hex("w:",
+							  pwrite,
+							  4,
+							  test_sec_count * 128);
+					rkflash_print_hex("r:",
+							  pread,
+							  4,
+							  test_sec_count * 128);
+					printf("r=%x, n=%x, w=%x, r=%x\n",
+					       test_lba,
+					       j,
+					       pwrite[j],
+					       pread[j]);
+					while (1)
+						;
+					break;
+				}
+			}
+			print_flag = test_lba & 0x1FF;
+			if (print_flag < test_sec_count)
+				printf("test_lba = %x\n", test_lba);
+			test_lba += test_sec_count;
+			test_sec_count++;
+			if (test_sec_count > max_test_sector)
+				test_sec_count = 1;
+		}
+		printf("---------Test ftl check---------\n");
+
+		test_sec_count = 1;
+		for (test_lba = 0;
+		     (test_lba + test_sec_count) < test_end_lba;) {
+			pwrite32[0] = test_lba;
+			blk_dread(block_dev, test_lba, test_sec_count, pread);
+			print_flag = test_lba & 0x7FF;
+			if (print_flag < test_sec_count)
+				printf("test_lba = %x\n", test_lba);
+
+			for (j = 0; j < test_sec_count * 512; j++) {
+				if (pwrite[j] != pread[j]) {
+					printf("r=%x, n=%x, w=%x, r=%x\n",
+					       test_lba,
+					       j,
+					       pwrite[j],
+					       pread[j]);
+					/* while(1); */
+					break;
+				}
+			}
+			test_lba += test_sec_count;
+			test_sec_count++;
+			if (test_sec_count > max_test_sector)
+				test_sec_count = 1;
+		}
+	}
+	printf("---------Test end---------\n");
+	/* while(1); */
+}
+#endif
+
+void rkflash_test(struct udevice *udev)
+{
+#if (BLK_STRESS_TEST_EN)
+	blk_stress_test(udev);
+#endif
+}
+
diff --git a/drivers/rkflash/rkflash_debug.h b/drivers/rkflash/rkflash_debug.h
new file mode 100644
index 0000000000..d9a968ec4a
--- /dev/null
+++ b/drivers/rkflash/rkflash_debug.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _RKFLASH_DEBUG_H
+#define _RKFLASH_DEBUG_H
+
+#include <common.h>
+#include <dm.h>
+
+/*
+ * Print switch, set to 1 if needed
+ * I - info
+ * E - error
+ * HEX - multiline print
+ */
+
+#define	PRINT_SWI_SFC_I		0
+#define	PRINT_SWI_SFC_E		1
+#define PRINT_SWI_SFC_HEX	1
+
+/*
+ * Test switch
+ */
+#define BLK_STRESS_TEST_EN	0
+
+#if (RINT_SWI_SFC_I)
+#define PRINT_SFC_I(...) printf(__VA_ARGS__)
+#else
+#define PRINT_SFC_I(...)
+#endif
+
+#if (PRINT_SWI_SFC_E)
+#define PRINT_SFC_E(...) printf(__VA_ARGS__)
+#else
+#define PRINT_SFC_E(...)
+#endif
+
+#if (PRINT_SWI_SFC_HEX)
+#define PRINT_SFC_HEX(s, buf, width, len)\
+		rkflash_print_hex(s, buf, width, len)
+#else
+#define PRINT_SFC_HEX(s, buf, width, len)
+#endif
+
+void rkflash_print_hex(char *s, void *buf, u32 width, u32 len);
+void rkflash_test(struct udevice *p_dev);
+
+#endif
diff --git a/drivers/rkflash/rksfc_base.c b/drivers/rkflash/rksfc_base.c
new file mode 100644
index 0000000000..713b6b5b3b
--- /dev/null
+++ b/drivers/rkflash/rksfc_base.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <asm/arch/clock.h>
+
+#include "rkflash_blk.h"
+#include "rkflash_api.h"
+
+static struct flash_operation spi_flash_op = {
+#ifdef	CONFIG_RKSFC_NOR
+	FLASH_TYPE_SFC_NOR,
+	rk_snor_init,
+	rk_snor_get_capacity,
+	rk_snor_read,
+	rk_snor_write,
+#else
+	-1, NULL, NULL, NULL, NULL,
+#endif
+};
+
+int rksfc_scan_namespace(void)
+{
+	struct uclass *uc;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get(UCLASS_SPI_FLASH, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		debug("%s %d %p\n", __func__, __LINE__, dev);
+		ret = device_probe(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rksfc_blk_bind(struct udevice *udev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(udev, "rkflash_blk", "blk",
+				 IF_TYPE_RKSFC,
+				 0, 512, 0, &bdev);
+	if (ret) {
+		debug("Cannot create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_rksfc_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rkflash_info *priv = dev_get_priv(dev);
+
+	priv->ioaddr = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rockchip_rksfc_probe(struct udevice *udev)
+{
+	int ret;
+	struct rkflash_info *priv = dev_get_priv(udev);
+
+	debug("%s %d %p ndev = %p\n", __func__, __LINE__, udev, priv);
+
+	sfc_init(priv->ioaddr);
+	if (spi_flash_op.id == -1) {
+		debug("%s no optional spi flash\n", __func__);
+		return 0;
+	}
+	ret = spi_flash_op.flash_init(udev);
+	if (!ret) {
+		priv->flash_con_type = FLASH_CON_TYPE_SFC;
+		priv->density = spi_flash_op.flash_get_capacity(udev);
+		priv->read = spi_flash_op.flash_read;
+		priv->write = spi_flash_op.flash_write;
+	}
+
+	return ret;
+}
+
+UCLASS_DRIVER(rksfc) = {
+	.id		= UCLASS_SPI_FLASH,
+	.name		= "rksfc",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+};
+
+static const struct udevice_id rockchip_sfc_ids[] = {
+	{ .compatible = "rockchip,rksfc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rksfc) = {
+	.name		= "rksfc",
+	.id		= UCLASS_SPI_FLASH,
+	.of_match	= rockchip_sfc_ids,
+	.bind		= rksfc_blk_bind,
+	.probe		= rockchip_rksfc_probe,
+	.priv_auto_alloc_size = sizeof(struct rkflash_info),
+	.ofdata_to_platdata = rockchip_rksfc_ofdata_to_platdata,
+};
+
diff --git a/drivers/rkflash/sfc.c b/drivers/rkflash/sfc.c
new file mode 100644
index 0000000000..b0f50defb7
--- /dev/null
+++ b/drivers/rkflash/sfc.c
@@ -0,0 +1,195 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <common.h>
+#include <linux/delay.h>
+#include <bouncebuf.h>
+#include <asm/io.h>
+
+#include "sfc.h"
+
+static void __iomem *g_sfc_reg;
+
+static void sfc_reset(void)
+{
+	int timeout = 10000;
+
+	writel(SFC_RESET, g_sfc_reg + SFC_RCVR);
+	while ((readl(g_sfc_reg + SFC_RCVR) == SFC_RESET) && (timeout > 0)) {
+		sfc_delay(1);
+		timeout--;
+	}
+	writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+}
+
+u16 sfc_get_version(void)
+{
+	return  (u32)(readl(g_sfc_reg + SFC_VER) & 0xffff);
+}
+
+int sfc_init(void __iomem *reg_addr)
+{
+	g_sfc_reg = reg_addr;
+	sfc_reset();
+	writel(0, g_sfc_reg + SFC_CTRL);
+
+	return SFC_OK;
+}
+
+void sfc_clean_irq(void)
+{
+	writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+	writel(0xFFFFFFFF, g_sfc_reg + SFC_IMR);
+}
+
+int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data)
+{
+	int ret = SFC_OK;
+	union SFCCMD_DATA cmd;
+	int reg;
+	int timeout = 0;
+
+	reg = readl(g_sfc_reg + SFC_FSR);
+	if (!(reg & SFC_TXEMPTY) || !(reg & SFC_RXEMPTY) ||
+	    (readl(g_sfc_reg + SFC_SR) & SFC_BUSY))
+		sfc_reset();
+
+	cmd.d32 = sfcmd;
+	if (cmd.b.addrbits == SFC_ADDR_XBITS) {
+		union SFCCTRL_DATA ctrl;
+
+		ctrl.d32 = sfctrl;
+		if (!ctrl.b.addrbits)
+			return SFC_PARAM_ERR;
+		/* Controller plus 1 automatically */
+		writel(ctrl.b.addrbits - 1, g_sfc_reg + SFC_ABIT);
+	}
+	/* shift in the data at negedge sclk_out */
+	sfctrl |= 0x2;
+
+	writel(sfctrl, g_sfc_reg + SFC_CTRL);
+	writel(sfcmd, g_sfc_reg + SFC_CMD);
+	if (cmd.b.addrbits)
+		writel(addr, g_sfc_reg + SFC_ADDR);
+	if (!cmd.b.datasize)
+		goto exit_wait;
+	if (SFC_ENABLE_DMA & sfctrl) {
+		struct bounce_buffer bb;
+		unsigned int bb_flags;
+
+		if (cmd.b.rw == SFC_WRITE)
+			bb_flags = GEN_BB_READ;
+		else
+			bb_flags = GEN_BB_WRITE;
+
+		ret = bounce_buffer_start(&bb, data, cmd.b.datasize, bb_flags);
+		if (ret)
+			return ret;
+
+		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+		writel(~((u32)FINISH_INT), g_sfc_reg + SFC_IMR);
+		writel((u64)bb.bounce_buffer, g_sfc_reg + SFC_DMA_ADDR);
+		writel(SFC_DMA_START, g_sfc_reg + SFC_DMA_TRIGGER);
+
+		timeout = cmd.b.datasize * 10;
+		while ((readl(g_sfc_reg + SFC_SR) & SFC_BUSY) &&
+		       (timeout-- > 0))
+			sfc_delay(1);
+		writel(0xFFFFFFFF, g_sfc_reg + SFC_ICLR);
+		if (timeout <= 0)
+			ret = SFC_WAIT_TIMEOUT;
+		bounce_buffer_stop(&bb);
+	} else {
+		u32 i, words, count, bytes;
+		union SFCFSR_DATA    fifostat;
+		u32 *p_data = (u32 *)data;
+
+		if (cmd.b.rw == SFC_WRITE) {
+			words  = (cmd.b.datasize + 3) >> 2;
+			while (words) {
+				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+				if (fifostat.b.txlevel > 0) {
+					count = words < fifostat.b.txlevel ?
+						words : fifostat.b.txlevel;
+					for (i = 0; i < count; i++) {
+						writel(*p_data++,
+						       g_sfc_reg + SFC_DATA);
+						words--;
+					}
+					if (words == 0)
+						break;
+					timeout = 0;
+				} else {
+					sfc_delay(1);
+					if (timeout++ > 10000) {
+						ret = SFC_TX_TIMEOUT;
+						break;
+					}
+				}
+			}
+		} else {
+			/* SFC_READ == cmd.b.rw */
+			bytes = cmd.b.datasize & 0x3;
+			words = cmd.b.datasize >> 2;
+			while (words) {
+				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+				if (fifostat.b.rxlevel > 0) {
+					u32 count;
+
+					count = words < fifostat.b.rxlevel ?
+						words : fifostat.b.rxlevel;
+
+					for (i = 0; i < count; i++) {
+						*p_data++ = readl(g_sfc_reg +
+								  SFC_DATA);
+						words--;
+					}
+					if (words == 0)
+						break;
+					timeout = 0;
+				} else {
+					sfc_delay(1);
+					if (timeout++ > 10000) {
+						ret = SFC_RX_TIMEOUT;
+						break;
+					}
+				}
+			}
+
+			timeout = 0;
+			while (bytes) {
+				fifostat.d32 = readl(g_sfc_reg + SFC_FSR);
+				if (fifostat.b.rxlevel > 0) {
+					u8 *p_data1 = (u8 *)p_data;
+
+					words = readl(g_sfc_reg + SFC_DATA);
+					for (i = 0; i < bytes; i++)
+						p_data1[i] =
+						(u8)((words >> (i * 8)) & 0xFF);
+					break;
+				}
+
+				sfc_delay(1);
+				if (timeout++ > 10000) {
+					ret = SFC_RX_TIMEOUT;
+					break;
+				}
+			}
+		}
+	}
+
+exit_wait:
+	timeout = 0;    /* wait cmd or data send complete */
+	while (!(readl(g_sfc_reg + SFC_FSR) & SFC_TXEMPTY)) {
+		sfc_delay(1);
+		if (timeout++ > 100000) {         /* wait 100ms */
+			ret = SFC_TX_TIMEOUT;
+			break;
+		}
+	}
+	sfc_delay(1); /* CS# High Time (read/write) >100ns */
+	return ret;
+}
diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h
new file mode 100644
index 0000000000..9a9095470a
--- /dev/null
+++ b/drivers/rkflash/sfc.h
@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _SFC_H
+#define _SFC_H
+
+#define SFC_VER_3		0x3 /* ver 3, else ver 1 */
+
+#define SFC_MAX_IOSIZE		(1024 * 8)    /* 8K byte */
+#define SFC_EN_INT		(0)         /* enable interrupt */
+#define SFC_EN_DMA		(1)         /* enable dma */
+#define SFC_FIFO_DEPTH		(0x10)      /* 16 words */
+
+/* FIFO watermark */
+#define SFC_RX_WMARK		(SFC_FIFO_DEPTH)	/* RX watermark level */
+#define SFC_TX_WMARK		(SFC_FIFO_DEPTH)	/* TX watermark level */
+#define SFC_RX_WMARK_SHIFT	(8)
+#define SFC_TX_WMARK_SHIFT	(0)
+
+/*return value*/
+#define SFC_OK                      (0)
+#define SFC_ERROR                   (-1)
+#define SFC_PARAM_ERR               (-2)
+#define SFC_TX_TIMEOUT              (-3)
+#define SFC_RX_TIMEOUT              (-4)
+#define SFC_WAIT_TIMEOUT            (-5)
+#define SFC_BUSY_TIMEOUT            (-6)
+#define SFC_ECC_FAIL                (-7)
+#define SFC_PROG_FAIL               (-8)
+#define SFC_ERASE_FAIL              (-9)
+
+/* SFC_CMD Register */
+#define SFC_ADDR_0BITS              (0)
+#define SFC_ADDR_24BITS             (1)
+#define SFC_ADDR_32BITS             (2)
+#define SFC_ADDR_XBITS              (3)
+
+#define SFC_WRITE                   (1)
+#define SFC_READ                    (0)
+
+/* SFC_CTRL Register */
+#define SFC_1BITS_LINE              (0)
+#define SFC_2BITS_LINE              (1)
+#define SFC_4BITS_LINE              (2)
+
+#define SFC_ENABLE_DMA              BIT(14)
+#define sfc_delay(us)	udelay(us)
+
+#define DMA_INT		BIT(7)      /* dma interrupt */
+#define NSPIERR_INT	BIT(6)      /* Nspi error interrupt */
+#define AHBERR_INT	BIT(5)      /* Ahb bus error interrupt */
+#define FINISH_INT	BIT(4)      /* Transfer finish interrupt */
+#define TXEMPTY_INT	BIT(3)      /* Tx fifo empty interrupt */
+#define TXOF_INT	BIT(2)      /* Tx fifo overflow interrupt */
+#define RXUF_INT	BIT(1)      /* Rx fifo underflow interrupt */
+#define RXFULL_INT	BIT(0)      /* Rx fifo full interrupt */
+
+/* SFC_FSR Register*/
+#define SFC_RXFULL	BIT(3)      /* rx fifo full */
+#define SFC_RXEMPTY	BIT(2)      /* rx fifo empty */
+#define SFC_TXEMPTY	BIT(1)      /* tx fifo empty */
+#define SFC_TXFULL	BIT(0)      /* tx fifo full */
+
+/* SFC_RCVR Register */
+#define SFC_RESET	BIT(0)     /* controller reset */
+
+/* SFC_SR Register */
+/* sfc busy flag. When busy, don't try to set the control register */
+#define SFC_BUSY	BIT(0)
+
+/* SFC_DMA_TRIGGER Register */
+/* Dma start trigger signal. Auto cleared after write */
+#define SFC_DMA_START	BIT(0)
+
+#define SFC_CTRL	0x00
+#define SFC_IMR		0x04
+#define SFC_ICLR	0x08
+#define SFC_FTLR	0x0C
+#define SFC_RCVR	0x10
+#define SFC_AX		0x14
+#define SFC_ABIT	0x18
+#define SFC_MASKISR	0x1C
+#define SFC_FSR		0x20
+#define SFC_SR		0x24
+#define SFC_RAWISR	0x28
+#define SFC_VER		0x2C
+#define SFC_QOP		0x30
+#define SFC_DMA_TRIGGER	0x80
+#define SFC_DMA_ADDR	0x84
+#define SFC_CMD		0x100
+#define SFC_ADDR	0x104
+#define SFC_DATA	0x108
+
+union SFCFSR_DATA {
+	u32 d32;
+	struct {
+		unsigned txempty : 1;
+		unsigned txfull :  1;
+		unsigned rxempty : 1;
+		unsigned rxfull :  1;
+		unsigned reserved7_4 : 4;
+		unsigned txlevel : 5;
+		unsigned reserved15_13 : 3;
+		unsigned rxlevel : 5;
+		unsigned reserved31_21 : 11;
+	} b;
+};
+
+/*------------------------------ Global Typedefs -----------------------------*/
+enum SFC_DATA_LINES {
+	DATA_LINES_X1 = 0,
+	DATA_LINES_X2,
+	DATA_LINES_X4
+};
+
+union SFCCTRL_DATA {
+	/* raw register data */
+	u32 d32;
+	/* register bits */
+	struct {
+		/* spi mode select */
+		unsigned mode : 1;
+		/*
+		 * Shift in phase selection
+		 * 0: shift in the flash data at posedge sclk_out
+		 * 1: shift in the flash data at negedge sclk_out
+		 */
+		unsigned sps : 1;
+		unsigned reserved3_2 : 2;
+		/* sclk_idle_level_cycles */
+		unsigned scic : 4;
+		/* Cmd bits number */
+		unsigned cmdlines : 2;
+		/* Address bits number */
+		unsigned addrlines : 2;
+		/* Data bits number */
+		unsigned datalines : 2;
+		/* this bit is not exit in regiseter, just use for code param */
+		unsigned enbledma : 1;
+		unsigned reserved15 : 1;
+		unsigned addrbits : 5;
+		unsigned reserved31_21 : 11;
+	} b;
+};
+
+union SFCCMD_DATA {
+	/* raw register data */
+	u32 d32;
+	/* register bits */
+	struct {
+		/* Command that will send to Serial Flash */
+		unsigned cmd : 8;
+		/* Dummy bits number */
+		unsigned dummybits : 4;
+		/* 0: read, 1: write */
+		unsigned rw : 1;
+		/* Continuous read mode */
+		unsigned readmode : 1;
+		/* Address bits number */
+		unsigned addrbits : 2;
+		/* Transferred bytes number */
+		unsigned datasize : 14;
+		/* Chip select */
+		unsigned cs : 2;
+	} b;
+};
+
+int sfc_init(void __iomem *reg_addr);
+int sfc_request(u32 sfcmd, u32 sfctrl, u32 addr, void *data);
+u16 sfc_get_version(void);
+void sfc_clean_irq(void);
+int rksfc_get_reg_addr(unsigned long *p_sfc_addr);
+
+#endif
diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c
new file mode 100644
index 0000000000..bff5cdf8d3
--- /dev/null
+++ b/drivers/rkflash/sfc_nor.c
@@ -0,0 +1,612 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <linux/delay.h>
+#include <linux/compat.h>
+#include <linux/string.h>
+
+#include "sfc_nor.h"
+#include "rkflash_debug.h"
+#include "rkflash_blk.h"
+
+static struct flash_info spi_flash_tbl[] = {
+	/* GD25Q32B */
+	{0xc84016, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 13, 9, 0},
+	/* GD25Q64B */
+	{0xc84017, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0D, 14, 9, 0},
+	/* GD25Q127C and GD25Q128C*/
+	{0xc84018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
+	/* GD25Q256B */
+	{0xc84019, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 16, 6, 0},
+	/* GD25Q512MC */
+	{0xc84020, 128, 8, 0x13, 0x12, 0x6C, 0x3E, 0x21, 0xDC, 0x1C, 17, 6, 0},
+	/* 25Q128FV */
+	{0xef4018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x0C, 15, 9, 0},
+	/* 25Q256FV */
+	{0xef4019, 128, 8, 0x13, 0x02, 0x6C, 0x32, 0x20, 0xD8, 0x3C, 16, 9, 0},
+	/* XT25F128A */
+	{0x207018, 128, 8, 0x03, 0x02, 0x6B, 0x32, 0x20, 0xD8, 0x00, 15, 0, 0},
+	/* MX25L25635E/F */
+	{0xc22019, 128, 8, 0x03, 0x02, 0x6B, 0x38, 0x20, 0xD8, 0x30, 16, 6, 0},
+};
+
+static const u8 sfnor_dev_code[] = {
+	0x11,
+	0x12,
+	0x13,
+	0x14,
+	0x15,
+	0x16,
+	0x17,
+	0x18,
+	0x19
+};
+
+static const u32 sfnor_capacity[] = {
+	0x20000,        /* 128k-byte */
+	0x40000,        /* 256k-byte */
+	0x80000,        /* 512k-byte */
+	0x100000,       /* 1M-byte */
+	0x200000,       /* 2M-byte */
+	0x400000,       /* 4M-byte */
+	0x800000,       /* 8M-byte */
+	0x1000000,      /* 16M-byte */
+	0x2000000       /* 32M-byte */
+};
+
+static struct flash_info *g_spi_flash_info;
+
+static int snor_write_en(void)
+{
+	int ret;
+	union SFCCMD_DATA     sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_WRITE_EN;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+
+	return ret;
+}
+
+static int snor_enter_4byte_mode(void)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_ENTER_4BYTE_MODE;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, NULL);
+	return ret;
+}
+
+static int snor_read_status(u32 reg_index, u8 *status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 read_stat_cmd[] = {CMD_READ_STATUS,
+				CMD_READ_STATUS2, CMD_READ_STATUS3};
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = read_stat_cmd[reg_index];
+	sfcmd.b.datasize = 1;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, status);
+
+	return ret;
+}
+
+static int snor_wait_busy(int timeout)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u32 i, status;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_STATUS;
+	sfcmd.b.datasize = 1;
+
+	for (i = 0; i < timeout; i++) {
+		ret = sfc_request(sfcmd.d32, 0, 0, &status);
+		if (ret != SFC_OK)
+			return ret;
+
+		if ((status & 0x01) == 0)
+			return SFC_OK;
+
+		sfc_delay(1);
+	}
+	PRINT_SFC_E("%s  error %x\n", __func__, timeout);
+
+	return SFC_BUSY_TIMEOUT;
+}
+
+static int snor_write_status2(u32 reg_index, u8 status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 status2[2];
+	u8 read_index;
+
+	status2[reg_index] = status;
+	read_index = (reg_index == 0) ? 1 : 0;
+	ret = snor_read_status(read_index, &status2[read_index]);
+	if (ret != SFC_OK)
+		return ret;
+
+	snor_write_en();
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_WRITE_STATUS;
+	sfcmd.b.datasize = 2;
+	sfcmd.b.rw = SFC_WRITE;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, &status2[0]);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(10000);    /* 10ms */
+
+	return ret;
+}
+
+static int snor_write_status(u32 reg_index, u8 status)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	u8 write_stat_cmd[] = {CMD_WRITE_STATUS,
+			       CMD_WRITE_STATUS2, CMD_WRITE_STATUS3};
+	snor_write_en();
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = write_stat_cmd[reg_index];
+	sfcmd.b.datasize = 1;
+	sfcmd.b.rw = SFC_WRITE;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, &status);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(10000);    /* 10ms */
+
+	return ret;
+}
+
+static int snor_erase(struct SFNOR_DEV *p_dev,
+		      u32 addr,
+		      enum NOR_ERASE_TYPE erase_type)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	int timeout[] = {400, 2000, 40000};   /* ms */
+
+	if (erase_type > ERASE_CHIP)
+		return SFC_PARAM_ERR;
+
+	sfcmd.d32 = 0;
+	if (erase_type == ERASE_BLOCK64K)
+		sfcmd.b.cmd = p_dev->blk_erase_cmd;
+	else if (erase_type == ERASE_SECTOR)
+		sfcmd.b.cmd = p_dev->sec_erase_cmd;
+	else
+		sfcmd.b.cmd = CMD_CHIP_ERASE;
+
+	sfcmd.b.addrbits = (erase_type != ERASE_CHIP) ?
+				SFC_ADDR_24BITS : SFC_ADDR_0BITS;
+	if ((p_dev->addr_mode == ADDR_MODE_4BYTE) && (erase_type != ERASE_CHIP))
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+
+	snor_write_en();
+
+	ret = sfc_request(sfcmd.d32, 0, addr, NULL);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(timeout[erase_type] * 1000);
+	return ret;
+}
+
+static int snor_prog_page(struct SFNOR_DEV *p_dev,
+			  u32 addr,
+			  void *p_data,
+			  u32 size)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_dev->prog_cmd;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfcmd.b.datasize = size;
+	sfcmd.b.rw = SFC_WRITE;
+
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = p_dev->prog_lines;
+	sfctrl.b.enbledma = 0;
+	if (p_dev->prog_cmd == CMD_PAGE_PROG_A4)
+		sfctrl.b.addrlines = SFC_4BITS_LINE;
+
+	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+
+	snor_write_en();
+
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, addr, p_data);
+	if (ret != SFC_OK)
+		return ret;
+
+	ret = snor_wait_busy(10000);
+
+	return ret;
+}
+
+static int snor_prog(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size)
+{
+	int ret = SFC_OK;
+	u32 page_size, len;
+	u8 *p_buf =  (u8 *)p_data;
+
+	page_size = NOR_PAGE_SIZE;
+	while (size) {
+		len = page_size < size ? page_size : size;
+		ret = snor_prog_page(p_dev, addr, p_buf, len);
+		if (ret != SFC_OK)
+			return ret;
+
+		size -= len;
+		addr += len;
+		p_buf += len;
+	}
+
+	return ret;
+}
+
+static int snor_enable_QE(struct SFNOR_DEV *p_dev)
+{
+	int ret = SFC_OK;
+	int reg_index;
+	int bit_offset;
+	u8 status;
+
+	if (p_dev->manufacturer == MID_GIGADEV ||
+	    p_dev->manufacturer == MID_WINBOND) {
+		reg_index = p_dev->QE_bits >> 3;
+		bit_offset = p_dev->QE_bits & 0x7;
+		ret = snor_read_status(reg_index, &status);
+		if (ret != SFC_OK)
+			return ret;
+
+		if (status & (1 << bit_offset))   /* is QE bit set */
+			return SFC_OK;
+
+		status |= (1 << bit_offset);
+		return p_dev->write_status(reg_index, status);
+	}
+
+	return ret;
+}
+
+#if (SNOR_4BIT_DATA_DETECT_EN)
+static int snor_set_dlines(struct SFNOR_DEV *p_dev, enum SFC_DATA_LINES lines)
+{
+	int ret;
+	u8 read_cmd[] = {CMD_FAST_READ_X1, CMD_FAST_READ_X2, CMD_FAST_READ_X4};
+
+	if (lines == DATA_LINES_X4) {
+		ret = snor_enable_QE(p_dev);
+		if (ret != SFC_OK)
+			return ret;
+	}
+
+	p_dev->read_lines = lines;
+	p_dev->read_cmd = read_cmd[lines];
+
+	if (p_dev->manufacturer == MID_GIGADEV ||
+	    p_dev->manufacturer == MID_WINBOND ||
+	    p_dev->manufacturer == MID_MACRONIX) {
+		p_dev->prog_lines = (lines != DATA_LINES_X2) ?
+				     lines : DATA_LINES_X1;
+		if (lines == DATA_LINES_X1) {
+			p_dev->prog_cmd = CMD_PAGE_PROG;
+		} else {
+			if (p_dev->manufacturer == MID_GIGADEV ||
+			    p_dev->manufacturer == MID_WINBOND)
+				p_dev->prog_cmd = CMD_PAGE_PROG_X4;
+			else
+				p_dev->prog_cmd = CMD_PAGE_PROG_A4;
+		}
+	}
+
+	return SFC_OK;
+}
+#endif
+
+static int snor_read_data(struct SFNOR_DEV *p_dev,
+			  u32 addr,
+			  void *p_data,
+			  u32 size)
+{
+	int ret;
+	union SFCCMD_DATA sfcmd;
+	union SFCCTRL_DATA sfctrl;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = p_dev->read_cmd;
+	sfcmd.b.datasize = size;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+
+	sfctrl.d32 = 0;
+	sfctrl.b.datalines = p_dev->read_lines;
+	if (!(size & 0x3) && size >= 4)
+		sfctrl.b.enbledma = 0;
+
+	if (p_dev->read_cmd == CMD_FAST_READ_X1 ||
+	    p_dev->read_cmd == CMD_FAST_READ_X4 ||
+	    p_dev->read_cmd == CMD_FAST_READ_X2 ||
+	    p_dev->read_cmd == CMD_FAST_4READ_X4) {
+		sfcmd.b.dummybits = 8;
+	} else if (p_dev->read_cmd == CMD_FAST_READ_A4) {
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+		addr = (addr << 8) | 0xFF;	/* Set M[7:0] = 0xFF */
+		sfcmd.b.dummybits = 4;
+		sfctrl.b.addrlines = SFC_4BITS_LINE;
+	}
+
+	if (p_dev->addr_mode == ADDR_MODE_4BYTE)
+		sfcmd.b.addrbits = SFC_ADDR_32BITS;
+
+	ret = sfc_request(sfcmd.d32, sfctrl.d32, addr, p_data);
+
+	return ret;
+}
+
+int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data)
+{
+	int ret = SFC_OK;
+	u32 addr, size, len;
+	u8 *p_buf =  (u8 *)p_data;
+
+	if ((sec + n_sec) > p_dev->capacity)
+		return SFC_PARAM_ERR;
+
+	mutex_lock(&p_dev->lock);
+	addr = sec << 9;
+	size = n_sec << 9;
+	while (size) {
+		len = size < SFC_MAX_IOSIZE ? size : SFC_MAX_IOSIZE;
+		ret = snor_read_data(p_dev, addr, p_buf, len);
+		if (ret != SFC_OK) {
+			PRINT_SFC_E("snor_read_data %x ret= %x\n",
+				    addr >> 9, ret);
+			goto out;
+		}
+
+		size -= len;
+		addr += len;
+		p_buf += len;
+	}
+out:
+	mutex_unlock(&p_dev->lock);
+	if (!ret)
+		ret = n_sec;
+
+	return ret;
+}
+
+int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data)
+{
+	int ret = SFC_OK;
+	u32 len, blk_size, offset;
+	u8 *p_buf =  (u8 *)p_data;
+
+	if ((sec + n_sec) > p_dev->capacity)
+		return SFC_PARAM_ERR;
+
+	mutex_lock(&p_dev->lock);
+	while (n_sec) {
+		if (sec < 512 || sec >= p_dev->capacity  - 512)
+			blk_size = 8;
+		else
+			blk_size = p_dev->blk_size;
+
+		offset = (sec & (blk_size - 1));
+		if (!offset) {
+			ret = snor_erase(p_dev, sec << 9, (blk_size == 8) ?
+				ERASE_SECTOR : ERASE_BLOCK64K);
+			if (ret != SFC_OK) {
+				PRINT_SFC_E("snor_erase %x ret= %x\n",
+					    sec, ret);
+				goto out;
+			}
+		}
+		len = (blk_size - offset) < n_sec ?
+		      (blk_size - offset) : n_sec;
+		ret = snor_prog(p_dev, sec << 9, p_buf, len << 9);
+		if (ret != SFC_OK) {
+			PRINT_SFC_E("snor_prog %x ret= %x\n", sec, ret);
+			goto out;
+		}
+		n_sec -= len;
+		sec += len;
+		p_buf += len << 9;
+	}
+out:
+	mutex_unlock(&p_dev->lock);
+	if (!ret)
+		ret = n_sec;
+
+	return ret;
+}
+
+static int snor_read_id(u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA     sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_JEDECID;
+	sfcmd.b.datasize = 3;
+
+	ret = sfc_request(sfcmd.d32, 0, 0, data);
+
+	return ret;
+}
+
+static int snor_read_parameter(u32 addr, u8 *data)
+{
+	int ret;
+	union SFCCMD_DATA     sfcmd;
+
+	sfcmd.d32 = 0;
+	sfcmd.b.cmd = CMD_READ_PARAMETER;
+	sfcmd.b.datasize = 1;
+	sfcmd.b.addrbits = SFC_ADDR_24BITS;
+	sfcmd.b.dummybits = 8;
+
+	ret = sfc_request(sfcmd.d32, 0, addr, data);
+
+	return ret;
+}
+
+u32 snor_get_capacity(struct SFNOR_DEV *p_dev)
+{
+	return p_dev->capacity;
+}
+
+static void snor_print_spi_chip_info(struct SFNOR_DEV *p_dev)
+{
+	PRINT_SFC_I("addr_mode: %x\n", p_dev->addr_mode);
+	PRINT_SFC_I("read_lines: %x\n", p_dev->read_lines);
+	PRINT_SFC_I("prog_lines: %x\n", p_dev->prog_lines);
+	PRINT_SFC_I("read_cmd: %x\n", p_dev->read_cmd);
+	PRINT_SFC_I("prog_cmd: %x\n", p_dev->prog_cmd);
+	PRINT_SFC_I("blk_erase_cmd: %x\n", p_dev->blk_erase_cmd);
+	PRINT_SFC_I("sec_erase_cmd: %x\n", p_dev->sec_erase_cmd);
+}
+
+static struct flash_info *snor_get_flash_info(u8 *flash_id)
+{
+	u32 i;
+	u32 id = (flash_id[0] << 16) | (flash_id[1] << 8) | (flash_id[2] << 0);
+
+	for (i = 0;
+		i < (sizeof(spi_flash_tbl) / sizeof(struct flash_info));
+		i++) {
+		if (spi_flash_tbl[i].id == id)
+			return &spi_flash_tbl[i];
+	}
+	return NULL;
+}
+
+/* Adjust flash info in ram base on parameter */
+static void *snor_flash_info_adjust(struct flash_info *spi_flash_info)
+{
+	u32 addr;
+	u8 para_version;
+
+	if (spi_flash_info->id == 0xc84019) {
+		addr = 0x09;
+		snor_read_parameter(addr, &para_version);
+		if (para_version == 0x06) {
+			spi_flash_info->QE_bits = 9;
+			spi_flash_info->prog_cmd_4 = 0x34;
+		}
+	}
+	return 0;
+}
+
+int snor_init(struct SFNOR_DEV *p_dev)
+{
+	int i;
+	u8 id_byte[5];
+	int err;
+
+	memset(p_dev, 0, sizeof(struct SFNOR_DEV));
+	snor_read_id(id_byte);
+	PRINT_SFC_E("sfc nor id: %x %x %x\n",
+		    id_byte[0], id_byte[1], id_byte[2]);
+	if (0xFF == id_byte[0] || 0x00 == id_byte[0]) {
+		err = SFC_ERROR;
+		goto err_out;
+	}
+
+	p_dev->manufacturer = id_byte[0];
+	p_dev->mem_type = id_byte[1];
+
+	mutex_init(&p_dev->lock);
+	g_spi_flash_info = snor_get_flash_info(id_byte);
+	if (g_spi_flash_info) {
+		snor_flash_info_adjust(g_spi_flash_info);
+		p_dev->capacity = 1 << g_spi_flash_info->density;
+		p_dev->blk_size = g_spi_flash_info->block_size;
+		p_dev->page_size = NOR_SECS_PAGE;
+		p_dev->read_cmd = g_spi_flash_info->read_cmd;
+		p_dev->prog_cmd = g_spi_flash_info->prog_cmd;
+		p_dev->sec_erase_cmd = g_spi_flash_info->sector_erase_cmd;
+		p_dev->blk_erase_cmd = g_spi_flash_info->block_erase_cmd;
+		p_dev->prog_lines = DATA_LINES_X1;
+		p_dev->read_lines = DATA_LINES_X1;
+		p_dev->QE_bits = g_spi_flash_info->QE_bits;
+
+		i = g_spi_flash_info->feature & FEA_READ_STATUE_MASK;
+		if (i == 0)
+			p_dev->write_status = snor_write_status;
+		else
+			p_dev->write_status = snor_write_status2;
+		if (g_spi_flash_info->feature & FEA_4BIT_READ) {
+			if (snor_enable_QE(p_dev) == SFC_OK) {
+				p_dev->read_lines = DATA_LINES_X4;
+				p_dev->read_cmd = g_spi_flash_info->read_cmd_4;
+			}
+		}
+		if ((g_spi_flash_info->feature & FEA_4BIT_PROG) &&
+		    (p_dev->read_lines == DATA_LINES_X4)) {
+			p_dev->prog_lines = DATA_LINES_X4;
+			p_dev->prog_cmd = g_spi_flash_info->prog_cmd_4;
+		}
+
+		if (g_spi_flash_info->feature & FEA_4BYTE_ADDR)
+			p_dev->addr_mode = ADDR_MODE_4BYTE;
+
+		if ((g_spi_flash_info->feature & FEA_4BYTE_ADDR_MODE))
+			snor_enter_4byte_mode();
+
+		goto normal_out;
+	}
+
+	for (i = 0; i < sizeof(sfnor_dev_code); i++) {
+		if (id_byte[2] == sfnor_dev_code[i]) {
+			p_dev->capacity = sfnor_capacity[i] >> 9;
+			break;
+		}
+	}
+
+	if (i >= sizeof(sfnor_dev_code)) {
+		err = SFC_ERROR;
+		goto err_out;
+	}
+
+	p_dev->QE_bits = 9;
+	p_dev->blk_size = NOR_SECS_BLK;
+	p_dev->page_size = NOR_SECS_PAGE;
+	p_dev->read_cmd = CMD_READ_DATA;
+	p_dev->prog_cmd = CMD_PAGE_PROG;
+	p_dev->sec_erase_cmd = CMD_SECTOR_ERASE;
+	p_dev->blk_erase_cmd = CMD_BLOCK_ERASE;
+	p_dev->write_status = snor_write_status2;
+	#if (SNOR_4BIT_DATA_DETECT_EN)
+	snor_set_dlines(p_dev, DATA_LINES_X4);
+	#endif
+
+normal_out:
+	snor_print_spi_chip_info(p_dev);
+
+	return SFC_OK;
+
+err_out:
+	return err;
+}
+
diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h
new file mode 100644
index 0000000000..6f36358898
--- /dev/null
+++ b/drivers/rkflash/sfc_nor.h
@@ -0,0 +1,154 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef _SFNOR_H
+#define _SFNOR_H
+
+#include "sfc.h"
+
+/* Four line data transmission detection */
+#define SNOR_4BIT_DATA_DETECT_EN	0
+
+#define NOR_PAGE_SIZE		256
+#define NOR_BLOCK_SIZE		(64 * 1024)
+#define NOR_SECS_BLK		(NOR_BLOCK_SIZE / 512)
+#define NOR_SECS_PAGE		4
+
+#define FEA_READ_STATUE_MASK	(0x3 << 0)
+#define FEA_STATUE_MODE1	0
+#define FEA_STATUE_MODE2	1
+#define FEA_4BIT_READ		BIT(2)
+#define FEA_4BIT_PROG		BIT(3)
+#define FEA_4BYTE_ADDR		BIT(4)
+#define FEA_4BYTE_ADDR_MODE	BIT(5)
+
+/*Manufactory ID*/
+#define MID_WINBOND             0xEF
+#define MID_GIGADEV             0xC8
+#define MID_MICRON              0x2C
+#define MID_MACRONIX            0xC2
+#define MID_SPANSION            0x01
+#define MID_EON                 0x1C
+#define MID_ST                  0x20
+
+/*Command Set*/
+#define CMD_READ_JEDECID        (0x9F)
+#define CMD_READ_DATA           (0x03)
+#define CMD_READ_STATUS         (0x05)
+#define CMD_WRITE_STATUS        (0x01)
+#define CMD_PAGE_PROG           (0x02)
+#define CMD_SECTOR_ERASE        (0x20)
+#define CMD_BLK64K_ERASE        (0xD8)
+#define CMD_BLK32K_ERASE        (0x52)
+#define CMD_CHIP_ERASE          (0xC7)
+#define CMD_WRITE_EN            (0x06)
+#define CMD_WRITE_DIS           (0x04)
+#define CMD_PAGE_READ           (0x13)
+#define CMD_GET_FEATURE         (0x0F)
+#define CMD_SET_FEATURE         (0x1F)
+#define CMD_PROG_LOAD           (0x02)
+#define CMD_PROG_EXEC           (0x10)
+#define CMD_BLOCK_ERASE         (0xD8)
+#define CMD_READ_DATA_X2        (0x3B)
+#define CMD_READ_DATA_X4        (0x6B)
+#define CMD_PROG_LOAD_X4        (0x32)
+#define CMD_READ_STATUS2        (0x35)
+#define CMD_READ_STATUS3        (0x15)
+#define CMD_WRITE_STATUS2       (0x31)
+#define CMD_WRITE_STATUS3       (0x11)
+/* X1 cmd, X1 addr, X1 data */
+#define CMD_FAST_READ_X1        (0x0B)
+/* X1 cmd, X1 addr, X2 data */
+#define CMD_FAST_READ_X2        (0x3B)
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_READ_X4        (0x6B)
+/* X1 cmd, X1 addr, X4 data SUPPORT GD MARCONIX WINBOND */
+#define CMD_FAST_4READ_X4       (0x6C)
+/* X1 cmd, X4 addr, X4 data SUPPORT EON GD MARCONIX WINBOND */
+#define CMD_FAST_READ_A4        (0xEB)
+/* X1 cmd, X1 addr, X4 data, SUPPORT GD WINBOND */
+#define CMD_PAGE_PROG_X4        (0x32)
+/* X1 cmd, X4 addr, X4 data, SUPPORT MARCONIX */
+#define CMD_PAGE_PROG_A4        (0x38)
+#define CMD_RESET_NAND          (0xFF)
+#define CMD_ENTER_4BYTE_MODE    (0xB7)
+#define CMD_EXIT_4BYTE_MODE     (0xE9)
+#define CMD_ENABLE_RESER	(0x66)
+#define CMD_RESET_DEVICE	(0x99)
+#define CMD_READ_PARAMETER	(0x5A)
+
+enum NOR_ERASE_TYPE {
+	ERASE_SECTOR = 0,
+	ERASE_BLOCK64K,
+	ERASE_CHIP
+};
+
+enum SNOR_IO_MODE {
+	IO_MODE_SPI = 0,
+	IO_MODE_QPI
+};
+
+enum SNOR_READ_MODE {
+	READ_MODE_NOMAL = 0,
+	READ_MODE_FAST
+};
+
+enum SNOR_ADDR_MODE {
+	ADDR_MODE_3BYTE = 0,
+	ADDR_MODE_4BYTE
+};
+
+typedef int (*SNOR_WRITE_STATUS)(u32 reg_index, u8 status);
+
+struct SFNOR_DEV {
+	u32	capacity;
+	u8	manufacturer;
+	u8	mem_type;
+	u16	page_size;
+	u32	blk_size;
+
+	u8	read_cmd;
+	u8	prog_cmd;
+	u8	sec_erase_cmd;
+	u8	blk_erase_cmd;
+	u8	QE_bits;
+
+	enum SNOR_READ_MODE  read_mode;
+	enum SNOR_ADDR_MODE  addr_mode;
+	enum SNOR_IO_MODE    io_mode;
+
+	enum SFC_DATA_LINES read_lines;
+	enum SFC_DATA_LINES prog_lines;
+
+	SNOR_WRITE_STATUS write_status;
+	struct mutex	lock; /* to lock this object */
+};
+
+struct flash_info {
+	u32 id;
+
+	u8 block_size;
+	u8 sector_size;
+	u8 read_cmd;
+	u8 prog_cmd;
+
+	u8 read_cmd_4;
+	u8 prog_cmd_4;
+	u8 sector_erase_cmd;
+	u8 block_erase_cmd;
+
+	u8 feature;
+	u8 density;  /* (1 << density) sectors*/
+	u8 QE_bits;
+	u8 reserved2;
+};
+
+int snor_init(struct SFNOR_DEV *p_dev);
+u32 snor_get_capacity(struct SFNOR_DEV *p_dev);
+int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data);
+int snor_write(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, const void *p_data);
+
+#endif

commit 31c3ca322364af828f27d3bddf70a3e2d957d1d8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 9 17:12:42 2018 +0800

    rockchip: config: add RKIMG_DET_BOOTDEV in soc headers
    
    Change-Id: Ibf535e9b40b019888bdf8af1a660f8453d19db7d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index ca4a21cfce..9d1df8360d 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -62,6 +62,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 4eb2c702b2..b0eed9b4eb 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -85,6 +85,7 @@
 	"partitions=" PARTS_DEFAULT \
 	ENV_MEM_LAYOUT_SETTINGS \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 #endif
 
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index ae78a2a521..37e8128bf3 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -60,6 +60,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 05415be6d7..2f582a150a 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -68,6 +68,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif

commit 8bce816a34a9c3d49d338cecd353bbf476382e3b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 9 17:03:26 2018 +0800

    rockchip: boot-mode: set default dev type/num if command fail
    
    The 'rkimg_bootdev' may fail or not defined, we need to set a
    default value for dev type/num in this case.
    
    Change-Id: Ied768bca0b1a555baa413d11ed0bee92897684dd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 223f823336..9aa425a31d 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -68,13 +68,20 @@ __weak int rockchip_dnl_key_pressed(void)
 void devtype_num_envset(void)
 {
 	static int done = 0;
+	int ret = 0;
 
 	if (done)
 		return;
 
 	const char *devtype_num_set = "run rkimg_bootdev";
 
-	run_command_list(devtype_num_set, -1, 0);
+	ret = run_command_list(devtype_num_set, -1, 0);
+	if (ret) {
+		/* Set default dev type/num if command not valid */
+		env_set("devtype", "mmc");
+		env_set("devnum", "0");
+	}
+
 	done = 1;
 }
 

commit a66fd6dcbc6344967fabd3e7a5f8ec6bb585d0e2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue May 8 16:15:27 2018 +0800

    rockchip: px30: do not switch UART iomux in U-Boot proper
    
    pre-loader should already set the correct UART iomux, but not set the
    m0/m1 select;
    The UART2 and SD card share the IO in PX30, so we can not swith it in
    case the SD card is using it and pinctrl does not work properly at
    very beginning.
    
    Change-Id: I9c757b6e14dbe671c121b0068db0c21c1b670545
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index e23e456bd3..42c9d5f5e2 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -48,11 +48,14 @@ int arch_cpu_init(void)
 void board_debug_uart_init(void)
 {
 static struct px30_grf * const grf = (void *)GRF_BASE;
+#ifdef CONFIG_SPL_BUILD
+	/* Do not set the iomux in U-Boot proper because SD card may using it */
 	/* Enable early UART2 channel m0 on the px30 */
 	rk_clrsetreg(&grf->gpio1dl_iomux,
 		     GPIO1D3_MASK | GPIO1D2_MASK,
 		     GPIO1D3_UART2_RXM0 << GPIO1D3_SHIFT |
 		     GPIO1D2_UART2_TXM0 << GPIO1D2_SHIFT);
+#endif
 	/* Set channel C as UART2 input */
 	rk_clrsetreg(&grf->iofunc_con0,
 		     CON_IOMUX_UART2SEL_MASK,

commit 299df30d6dc56f85d1cf0b4702ed8f407b660928
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Apr 28 16:56:12 2018 +0800

    rockchip: boot_mode: get the bootdev detect command from env
    
    Define command list in header env instead of C source.
    
    Change-Id: I781d86588f4981347233f4e1b6c63b0dbef98e08
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index a0c4919611..223f823336 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -72,10 +72,7 @@ void devtype_num_envset(void)
 	if (done)
 		return;
 
-	const char *devtype_num_set =
-	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
-	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
-	"fi;";
+	const char *devtype_num_set = "run rkimg_bootdev";
 
 	run_command_list(devtype_num_set, -1, 0);
 	done = 1;
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index f2bbef6371..9b93951315 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -60,6 +60,7 @@
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
 	ROCKCHIP_DEVICE_SETTINGS \
+	RKIMG_DET_BOOTDEV \
 	BOOTENV
 
 #endif
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 368a970162..e285700747 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -84,6 +84,17 @@
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
+#define RKIMG_DET_BOOTDEV \
+	"rkimg_bootdev=" \
+	"if mmc dev 1; then " \
+		"if rkimgtest mmc 1; then " \
+		"setenv devtype mmc; setenv devnum 1; echo Boot from SDcard; fi;" \
+	"elif mmc dev 0; then " \
+		"setenv devtype mmc; setenv devnum 0;" \
+	"elif rknand dev 0; then " \
+		"setenv devtype rknand; setenv devnum 0;" \
+	"fi; \0"
+
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;" \

commit 3671d25201a55d7f16b403083e70f056d8ea4f80
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue May 8 16:01:50 2018 +0800

    cmd: bootrkp: fix check blk_dread return value error
    
    Change-Id: Ib283c2eeb982479914f8c806f7b54bf081f4c9be
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index cf8d2f81a2..c97e44f4db 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -93,7 +93,7 @@ static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
 	buffer = memalign(ARCH_DMA_MINALIGN, 1024);
 	/* Read one block from begining of IDB data */
 	ret = blk_dread(dev_desc, 64, 2, buffer);
-	if (ret != 1) {
+	if (ret != 2) {
 		printf("%s fail to read data from IDB\n", __func__);
 		free(buffer);
 		return CMD_RET_FAILURE;

commit c0ef3541fa9a294ba36809fd677529ed44baf867
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 4 09:25:00 2018 +0800

    arm: dts: rockchip: add display demo for rk3308 evb
    
    Change-Id: Ie1edd2bdc10a11fbce264b6508d69bcfe567cc44
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index b787ef8687..3ee81a23f4 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include "rk3308.dtsi"
 #include <dt-bindings/input/input.h>
+#include <linux/media-bus-format.h>
 
 / {
 	model = "Rockchip RK3308 EVB";
@@ -68,6 +69,192 @@
 		};
 	};
 
+	backlight: backlight {
+		status = "disabled";
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+
+	panel: panel {
+		compatible = "simple-panel";
+		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
+		backlight = <&backlight>;
+		/* enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; */
+		enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+		enable-delay-ms = <20>;
+		reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
+		reset-value = <0>;
+		reset-delay-ms = <10>;
+		prepare-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+		disable-delay-ms = <20>;
+		/* spi-sdo-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; */
+		spi-sdi-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
+		spi-scl-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+		spi-cs-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+		width-mm = <217>;
+		height-mm = <136>;
+		rockchip,data-mapping = "vesa";
+		rockchip,data-width = <18>;
+		rockchip,output = "rgb";
+		status = "disabled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi_init_cmd>;
+		rockchip,cmd-type = "spi";
+
+		/* type:0 is cmd, 1 is data */
+		panel-init-sequence = [
+			/* type delay num val1 val2 val3 */
+			  00   00  01  e0
+			  01   00  01  00
+			  01   00  01  07
+			  01   00  01  0f
+			  01   00  01  0d
+			  01   00  01  1b
+			  01   00  01  0a
+			  01   00  01  3c
+			  01   00  01  78
+			  01   00  01  4a
+			  01   00  01  07
+			  01   00  01  0e
+			  01   00  01  09
+			  01   00  01  1b
+			  01   00  01  1e
+			  01   00  01  0f
+			  00   00  01  e1
+			  01   00  01  00
+			  01   00  01  22
+			  01   00  01  24
+			  01   00  01  06
+			  01   00  01  12
+			  01   00  01  07
+			  01   00  01  36
+			  01   00  01  47
+			  01   00  01  47
+			  01   00  01  06
+			  01   00  01  0a
+			  01   00  01  07
+			  01   00  01  30
+			  01   00  01  37
+			  01   00  01  0f
+
+			  00   00  01  c0
+			  01   00  01  10
+			  01   00  01  10
+
+			  00   00  01  c1
+			  01   00  01  41
+
+			  00   00  01  c5
+			  01   00  01  00
+			  01   00  01  22
+			  01   00  01  80
+
+			  00   00  01  36
+			  01   00  01  48
+
+			  00   00  01  3a  /* interface mode control */
+			  01   00  01  66
+
+			  00   00  01  b0  /* interface mode control */
+			  01   00  01  00
+
+			  00   00  01  b1  /* frame rate 70hz */
+			  01   00  01  b0
+			  01   00  01  11
+			  00   00  01  b4
+			  01   00  01  02
+			  00   00  01  B6  /* RGB/MCU Interface Control */
+			  01   00  01  32  /* 02 mcu, 32 rgb */
+			  01   00  01  02
+
+			  00   00  01  b7
+			  01   00  01  c6
+
+			  00   00  01  be
+			  01   00  01  00
+			  01   00  01  04
+
+			  00   00  01  e9
+			  01   00  01  00
+
+			  00   00  01  f7
+			  01   00  01  a9
+			  01   00  01  51
+			  01   00  01  2c
+			  01   00  01  82
+
+			  00   78  01  11
+			  00   00  01  29
+		];
+
+		panel-exit-sequence = [
+			/* type delay num val1 val2 val3 */
+			00   0a  01  28
+			00   78  01  10
+		];
+
+		display-timings {
+			native-mode = <&kd050fwfba002_timing>;
+
+			kd050fwfba002_timing: timing0 {
+				clock-frequency = <11000000>;
+				hactive = <320>;
+				vactive = <480>;
+				hback-porch = <10>;
+				hfront-porch = <4>;
+				vback-porch = <10>;
+				vfront-porch = <4>;
+				hsync-len = <20>;
+				vsync-len = <20>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		port {
+			panel_in_rgb: endpoint {
+				remote-endpoint = <&rgb_out_panel>;
+			};
+		};
+	};
+
 	vdd_log: vdd_core: vdd-core {
 		compatible = "pwm-regulator";
 		pwms = <&pwm0 0 5000 1>;
@@ -122,3 +309,46 @@
 &usb20_otg {
 	status = "okay";
 };
+
+&rgb {
+	status = "disabled";
+};
+
+&route_rgb {
+	status = "disabled";
+};
+
+&vop {
+	status = "disabled";
+};
+
+&rgb {
+	status = "disabled";
+
+	ports {
+		rgb_out: port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			rgb_out_panel: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&panel_in_rgb>;
+			};
+		};
+	};
+};
+
+&pinctrl {
+	spi_panel {
+		spi_init_cmd: spi-init-cmd {
+			rockchip,pins =
+				/* spi sdi */
+				<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* spi scl */
+				<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
+				/* spi cs */
+				<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};

commit d776bc4b9d68b96ea198f9ed88763b6c408de697
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri May 4 16:48:35 2018 +0800

    rockchip: update emmc/sd index
    
    We define emmc/sdcard index in dts alias, emmc is 0 and sdcard is 1.
    
    Change-Id: If0adb46298bf10f7a829a456ad147efd863792d0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 9503f65e8a..368a970162 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -19,11 +19,11 @@
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
-/* First try to boot from SD (index 0), then eMMC (index 1) */
+/* First try to boot from SD (index 1), then eMMC (index 0) */
 #if CONFIG_IS_ENABLED(CMD_MMC)
 	#define BOOT_TARGET_MMC(func) \
-		func(MMC, mmc, 0) \
-		func(MMC, mmc, 1)
+		func(MMC, mmc, 1) \
+		func(MMC, mmc, 0)
 #else
 	#define BOOT_TARGET_MMC(func)
 #endif

commit f457a3ac95ee7460febc559b4783c04c4219eff2
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Thu May 3 17:51:36 2018 +0800

    rockchip: fixes the kernel/ramdisk base address for rk3399
    
    For the arm64 SoCs, the kernel base address must aligh the 0x80000 with
    kernel bringing up when it run the boot android way.
    
    And increase the ramdisk base address for leaving enough space.
    
    Change-Id: Iaecf507cbe1906942be74e5b218ba20eaaf2b766
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 44b5af290d..05415be6d7 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -60,8 +60,8 @@
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
-	"kernel_addr_r=0x02000000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x0a200000\\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 8646e3269803a3b50c01ff7bf9016c4e77e7e605
Author: zain wang <wzz@rock-chips.com>
Date:   Mon May 7 17:33:22 2018 +0800

    evb-rk3308_defconfig: support android boot image
    
    Change-Id: I28d163bba0920110c7c85d59ba8ac86a84c77431
    Signed-off-by: zain wang <wzz@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 30c4df0124..956d8385d7 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -9,14 +9,16 @@ CONFIG_TARGET_EVB_RK3308=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_USB_FUNCTION_FASTBOOT is not set
+# CONFIG_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set

commit 67191cb0fa32b4c8e6967a7169707b343ccf1161
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed May 2 15:32:04 2018 +0800

    make.sh: add prefix / for u-boot.img & u-boot-dtb.img
    
    We can set a special build output dir for ${OUTDIR}
    by argument -o, so the correct way to locate a output
    object is ${OUTDIR}/obj.
    
    Change-Id: I894b44d703afe2d21fcf7dddfbb82ae943835021
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/make.sh b/make.sh
index 10c1d8514c..5c896931b3 100755
--- a/make.sh
+++ b/make.sh
@@ -134,7 +134,7 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
-	rm u-boot.img u-boot-dtb.img
+	rm ${OUTDIR}/u-boot.img ${OUTDIR}/u-boot-dtb.img
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 

commit dc588d96b8e725340aeaddd3e0399a8b3f598391
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu May 3 11:36:49 2018 +0800

    common: boot_rkimg: make devnum alterable
    
    make devnum alterable when get blk_desc
    
    Change-Id: I0bd7387003c78cae058b85c93c3de266d90e9ee7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 6b75046ad4..cc92903e47 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -152,7 +152,6 @@ int get_bootdev_type(void)
 	char boot_options[128] = {0};
 	static int appended;
 
-	devtype_num_envset();
 	devtype = env_get("devtype");
 
 	/* For current use(Only EMMC support!) */
@@ -195,9 +194,13 @@ struct blk_desc *rockchip_get_bootdev(void)
 {
 	struct blk_desc *dev_desc;
 	int dev_type;
+	int devnum;
 
+	devtype_num_envset();
 	dev_type = get_bootdev_type();
-	dev_desc = blk_get_devnum_by_type(dev_type, 0);
+	devnum = env_get_ulong("devnum", 10, 0);
+
+	dev_desc = blk_get_devnum_by_type(dev_type, devnum);
 
 	return dev_desc;
 }

commit 6caa0333659101835ed60c5102c81b3c71e7affe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Apr 28 16:54:21 2018 +0800

    rockchip: add rkimgtest cmd to get boot dev
    
    We need to check if the storage(sdmmc) have IDB data so that
    we can use it as boot device.
    
    Change-Id: I7373b8f1a6c4c41c1d2cb1c94cd5d20c0780b5db
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 1fe4fe3d3a..cf8d2f81a2 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <malloc.h>
 #include <android_bootloader.h>
 #include <attestation_key.h>
 #include <boot_rkimg.h>
@@ -79,3 +80,39 @@ U_BOOT_CMD(
 	"boot.img: ramdisk\n"
 	"resource.img: dtb, u-boot logo, kernel logo"
 );
+
+static int do_rkimg_test(cmd_tbl_t *cmdtp, int flag, int argc,
+		      char * const argv[])
+{
+	struct blk_desc *dev_desc;
+	u32* buffer;
+	int ret = 0;
+
+	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
+
+	buffer = memalign(ARCH_DMA_MINALIGN, 1024);
+	/* Read one block from begining of IDB data */
+	ret = blk_dread(dev_desc, 64, 2, buffer);
+	if (ret != 1) {
+		printf("%s fail to read data from IDB\n", __func__);
+		free(buffer);
+		return CMD_RET_FAILURE;
+	}
+
+	if (buffer[0] == 0xFCDC8C3B){
+		printf("%s found IDB in SDcard\n", __func__);
+		ret = CMD_RET_SUCCESS;
+		if (0 == buffer[128 + 104 / 4]) /* TAG in IDB */
+			env_update("bootargs", "sdfwupdate");
+	}
+
+	free(buffer);
+
+	return ret;
+}
+
+U_BOOT_CMD(
+	rkimgtest, 3, 0,    do_rkimg_test,
+	"Test if storage media have rockchip image",
+	""
+);

commit 3bea61eda065b2754cdb741ec504e7c3d7d3db0e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon May 7 16:37:05 2018 +0800

    rockchip: resource: try resource part if no boot part found
    
    In some project, eg.Linux OS, RKIMG do not have a ramdisk, we don't
    need boot.img and boot partition in this case, so we need to get
    the resource from resource.img instead of error return.
    
    Change-Id: I88a1f8d7c532e9021f7dfa6c320049ed99f8f764
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b9f8d15e47..62db314389 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -200,7 +200,9 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 					 &part_info);
 	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
-		goto out;
+		/* RKIMG can support part table without 'boot' */
+		mode = 0;
+		goto next;
 	}
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
@@ -222,6 +224,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		/* Set mode to 0 in for recovery is not valid AOSP img */
 		mode = 0;
 	}
+next:
 #endif
 	if (!mode) {
 		/* Read resource from Rockchip Resource partition */

commit d49682643c6f207bbc408ebcc6d13cd61306012f
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu May 3 18:58:00 2018 +0800

    fuel gauge: improve the storage accuracy of dsoc
    
    The save dsoc accuracy is not enough to cause the display soc
    to be reduced by 1 when system reboot.
    
    Change-Id: I35dbb0d1b2d123f65f7cd6ef74216bc1a6384d34
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 7c8ae372e4..e23d0034df 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -109,9 +109,9 @@ static int dbg_enable = 0;
 #define IOFFSET_H		0x0097
 #define IOFFSET_L		0x0098
 #define BAT_R0			0x0099
-#define BAT_R1			0x009a
-#define BAT_R2			0x009b
-#define BAT_R3			0x009c
+#define SOC_REG0		0x009a
+#define SOC_REG1		0x009b
+#define SOC_REG2		0x009c
 #define REMAIN_CAP_REG0		0x9d
 #define REMAIN_CAP_REG1		0x9e
 #define REMAIN_CAP_REG2		0x9f
@@ -134,7 +134,6 @@ static int dbg_enable = 0;
 #define CUR_ADC_K0		0x00b0
 #define BAT_DISCHRG		0x00ec
 #define BAT_CON			BIT(4)
-#define SOC_REG			0xa5
 
 #define USB_CTRL_REG		0x00E5
 #define PMIC_SYS_STS		0x00f0
@@ -551,22 +550,28 @@ static int rk817_bat_vol_to_cap(struct rk817_battery_device *battery,
 }
 
 static void rk817_bat_save_dsoc(struct rk817_battery_device *battery,
-				u8 save_soc)
+				int save_soc)
 {
 	static int last_soc = -1;
-	int value;
 
-	value = rk817_bat_read(battery, SOC_REG);
-	value &= 0x80;
 	if (last_soc != save_soc) {
-		rk817_bat_write(battery, SOC_REG, value | save_soc);
+		rk817_bat_write(battery, SOC_REG0, save_soc & 0xff);
+		rk817_bat_write(battery, SOC_REG1, (save_soc >> 8) & 0xff);
+		rk817_bat_write(battery, SOC_REG2, (save_soc >> 16) & 0xff);
+
 		last_soc = save_soc;
 	}
 }
 
 static int rk817_bat_get_prev_dsoc(struct rk817_battery_device *battery)
 {
-	return (rk817_bat_read(battery, SOC_REG) & 0x7f);
+	int value;
+
+	value = rk817_bat_read(battery, SOC_REG0);
+	value |= rk817_bat_read(battery, SOC_REG1) << 8;
+	value |= rk817_bat_read(battery, SOC_REG2) << 16;
+
+	return value;
 }
 
 static int rk817_bat_get_prev_cap(struct rk817_battery_device *battery)
@@ -729,7 +734,6 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 	battery->is_halt = is_rk817_bat_last_halt(battery);
 	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
 
-	pre_soc *= 1000;
 	if (battery->is_halt) {
 		DBG("system halt last time... cap: pre=%d, now=%d\n",
 		    pre_cap, now_cap);
@@ -769,7 +773,7 @@ static void rk817_bat_rsoc_init(struct rk817_battery_device *battery)
 	else
 		rk817_bat_not_first_pwron(battery);
 
-	 rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	 rk817_bat_save_dsoc(battery, battery->dsoc);
 	 rk817_bat_save_cap(battery, battery->nac);
 }
 
@@ -1049,7 +1053,7 @@ static void rk817_bat_smooth_charge(struct rk817_battery_device *battery)
 	else if (battery->dsoc < 0)
 		battery->dsoc = 0;
 
-	rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	rk817_bat_save_dsoc(battery, battery->dsoc);
 	rk817_bat_save_cap(battery, battery->remain_cap / 1000);
 out:
 	return;

commit a7de8a5ca7ff0b6d3a3a25fcba8d1e4becb88c4a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 2 16:35:15 2018 +0800

    part: rkparm: fix issue when find the last part
    
    The 'next' will be NULL if next ',' is not found, and access to
    '*next' will end with "Synchronous Abort" in 64 bit system because
    the memory space is reserved for Trust area.
    
    Change-Id: Id8ee9d6f7815977d7c5996d67a3b72feb74d00cf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 57fd941a51..0398e4d5ab 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -33,7 +33,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 {
 	struct rkparm_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
-	const char *blkdev_parts, *blkdev_def;
+	const char *blkdev_parts;
 	char *cmdline_end, *next, *pend;
 	int len, offset = 0;
 	unsigned long size, start;
@@ -44,8 +44,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	}
 
 	blkdev_parts = strstr(cmdline, "mtdparts");
-	blkdev_def = strchr(blkdev_parts, ':') + 1;
-	next = (char *)blkdev_def;
+	next = strchr(blkdev_parts, ':');
 	cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	*cmdline_end = '\0';
 	/* skip "CMDLINE:" */
@@ -57,13 +56,16 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	 */
 	env_delete("bootargs", "initrd=");
 
-	while (*next) {
+	while (next) {
+		/* Skip ':' and ',' */
+		next++;
 		if (*next == '-') {
 			size = (~0UL);
 			next++;
 		} else {
 			size = simple_strtoul(next, &next, 16);
 		}
+		/* Skip '@' */
 		next++;
 		start = simple_strtoul(next, &next, 16);
 		next++;
@@ -82,9 +84,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';
-		next = strchr(next, ',');
-		next++;
 		list_add_tail(&part->node, parts_head);
+		next = strchr(next, ',');
 	}
 
 	return 0;

commit 0fa03761e78f811548f1ee5361a4b6d0e2025123
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Wed May 2 09:29:37 2018 +0800

    evb-rk3399_defconfig: support android boot image
    
    Change-Id: Ie574b91b0dfa9d0cbfcd46699684f34f27323d53
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index b8fca544c2..5cd17d2754 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -6,10 +6,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
@@ -25,6 +26,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

commit 877f3f47b5516ed8edd2ea49f29ceab635d87e54
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 27 15:18:54 2018 +0800

    rockchip: part_rkparm: fix issue when parameter not valid
    
    If the param has no data, the cmdline is NULL, and system get abort:
    "Synchronous Abort" handler, esr 0x96000010
    
    Change-Id: Ia52594073287d55a7fd0b35b66d87ffe7f880fea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index d8b8389a4b..57fd941a51 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -33,11 +33,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 {
 	struct rkparm_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
-	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
-	const char *blkdev_parts = strstr(cmdline, "mtdparts");
-	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
-	char *next = (char *)blkdev_def;
-	char *pend;
+	const char *blkdev_parts, *blkdev_def;
+	char *cmdline_end, *next, *pend;
 	int len, offset = 0;
 	unsigned long size, start;
 
@@ -46,6 +43,10 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 		return -EINVAL;
 	}
 
+	blkdev_parts = strstr(cmdline, "mtdparts");
+	blkdev_def = strchr(blkdev_parts, ':') + 1;
+	next = (char *)blkdev_def;
+	cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	*cmdline_end = '\0';
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));

commit 080fc76243d4b5410bc87afe8247c481df0f5ec4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 27 14:54:31 2018 +0800

    rockchip: px30: add sdmmc support
    
    Sync the sdmmc related dts node from kernel.
    
    Change-Id: I1fad10f9c38e566eb8276eca9777570c85e02063
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 10b39e2cb1..6a21a99012 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -265,7 +265,7 @@
 			vccio_sd: LDO_REG5 {
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
+				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <3300000>;
 
 				regulator-name = "vccio_sd";
@@ -375,6 +375,23 @@
 	};
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 	fifo-mode;
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index bcd74f8240..1a113cbff6 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -4,6 +4,12 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+};
 
 &uart2 {
 	clock-frequency = <24000000>;
@@ -16,6 +22,10 @@
 	status = "okay";
 };
 
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 793d60d0cd..85c6460f60 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -798,10 +798,13 @@
 		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff370000 0x0 0x4000>;
 		max-frequency = <150000000>;
-		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
-		clock-names = "biu", "ciu";
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
-		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
 		status = "disabled";
 	};
 
@@ -1780,31 +1783,36 @@
 			};
 		};
 
-		sdmmc0 {
-			sdmmc0_clk: sdmmc0-clk {
+		sdmmc {
+			sdmmc_clk: sdmmc-clk {
 				rockchip,pins =
-					<1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_4ma>;
+					<1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_8ma>;
 			};
 
-			sdmmc0_cmd: sdmmc0-cmd {
+			sdmmc_cmd: sdmmc-cmd {
 				rockchip,pins =
-					<1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+					<1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_8ma>;
 			};
 
-			sdmmc0_bus1: sdmmc0-bus1 {
+			sdmmc_det: sdmmc-det {
 				rockchip,pins =
-					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>;
+					<0 RK_PA3 RK_FUNC_1 &pcfg_pull_up_8ma>;
 			};
 
-			sdmmc0_bus4: sdmmc0-bus4 {
+			sdmmc_bus1: sdmmc-bus1 {
 				rockchip,pins =
-					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_4ma>;
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_8ma>;
 			};
 
-			sdmmc0_gpio: sdmmc0-gpio {
+			sdmmc_bus4: sdmmc-bus4 {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc_gpio: sdmmc-gpio {
 				rockchip,pins =
 					<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
 					<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -1815,38 +1823,33 @@
 			};
 		};
 
-		sdmmc1 {
-			sdmmc1_clk: sdmmc1-clk {
-				rockchip,pins =
-					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>;
-			};
-
-			sdmmc1_cmd: sdmmc1-cmd {
+		sdio {
+			sdio_clk: sdio-clk {
 				rockchip,pins =
-					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up_8ma>;
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
 			};
 
-			sdmmc1_bus1: sdmmc1-bus1 {
+			sdio_cmd: sdio-cmd {
 				rockchip,pins =
-					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>;
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
 			};
 
-			sdmmc1_bus4: sdmmc1-bus4 {
+			sdio_bus4: sdio-bus4 {
 				rockchip,pins =
-					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_up_8ma>;
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_up>;
 			};
 
-			sdmmc1_gpio: sdmmc1-gpio {
+			sdio_gpio: sdio-gpio {
 				rockchip,pins =
-					<1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+					<1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>,
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
 			};
 		};
 
diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index eca91526e3..f9c7488ce6 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -265,7 +265,7 @@
 			vccio_sd: LDO_REG5 {
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-min-microvolt = <3300000>;
+				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <3300000>;
 
 				regulator-name = "vccio_sd";
@@ -375,6 +375,23 @@
 	};
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	supports-sd;
+	card-detect-delay = <800>;
+	ignore-pm-notify;
+	/*cd-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; [> CD GPIO <]*/
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vqmmc-supply = <&vccio_sd>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 	fifo-mode;

commit 9f2a90a85710de7e278ae815d77dcf0e3ce22949
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:55:14 2018 +0800

    rockchip: rk3188: disable arch timer support
    
    RK3188 do not have a ARMv7 ARCH timer.
    
    Change-Id: If76fb126b16057160ece72df533c43d6b2b5bc0b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index d95ce978b1..d93f9adcf4 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -17,6 +17,8 @@
 #define CONFIG_SYS_CBSIZE		1024
 
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
+/* RK3188 do not have a ARMv7 ARCH timer */
+#undef CONFIG_SYS_ARCH_TIMER
 
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */

commit 48f99b37686b346c523bf75bb8f3162a91755627
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:48:57 2018 +0800

    rockchip: rock-rk3188 enable rockchip DM timer
    
    Use DM rockchip timer for spl and U-Boot.
    
    Change-Id: I2d93106e3769ac51ab0acbcc3dd635e803a1ef6b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 781a53c200..d2f3d6ecb7 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -5,6 +5,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3188=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_ROCKCHIP_TIMER=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_TARGET_ROCK=y

commit 040db82c36e62c76b0dffb11f2cc27b73cba0ceb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:51:53 2018 +0800

    rockchip: spl: init stimer only when generic timer available
    
    Some SoCs like rk3188 do not have a generic timer.
    
    Change-Id: Ief0e78d6939ac76eec0ffe08650e1a0d930f2f86
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 27ab566d15..53ff85b00a 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -64,6 +64,7 @@ u32 spl_boot_mode(const u32 boot_device)
 
 __weak void rockchip_stimer_init(void)
 {
+#ifdef CONFIG_SYS_ARCH_TIMER
 #ifndef CONFIG_ARM64
 	asm volatile("mcr p15, 0, %0, c14, c0, 0"
 		     : : "r"(COUNTER_FREQUENCY));
@@ -72,6 +73,7 @@ __weak void rockchip_stimer_init(void)
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+#endif
 }
 
 __weak int arch_cpu_init(void)

commit b5f1eff77680b221cf298007b06b66950e8e2570
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:43:12 2018 +0800

    rockchip: rk3188: add -u-boot.dtsi for rock-rk3188
    
    We should a -u-boot.dtsi for those config need by U-Boot only,
    and other part sync with kernel.
    
    Change-Id: I7c9f9c2824b759bcfd7e5c137ca0da207443d553
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3188-radxarock-u-boot.dtsi b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
new file mode 100644
index 0000000000..26f5707bb8
--- /dev/null
+++ b/arch/arm/dts/rk3188-radxarock-u-boot.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+&cru {
+	u-boot,dm-spl;
+};
+
+&pinctrl {
+	u-boot,dm-spl;
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-spl;
+};
+
+&timer3 {
+	compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
+	u-boot,dm-spl;
+	clock-frequency = <24000000>;
+};
diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts
index 2930f81320..c796918167 100644
--- a/arch/arm/dts/rk3188-radxarock.dts
+++ b/arch/arm/dts/rk3188-radxarock.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <dt-bindings/input/input.h>
 #include "rk3188.dtsi"
+#include "rk3188-radxarock-u-boot.dtsi"
 
 / {
 	model = "Radxa Rock";
@@ -360,11 +361,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	status = "okay";
-	u-boot,dm-spl;
-};
-
 &uart3 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index ae65fd9717..4bc38c1621 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -105,7 +105,6 @@
 		compatible = "rockchip,rk3188-cru";
 		reg = <0x20000000 0x1000>;
 		rockchip,grf = <&grf>;
-		u-boot,dm-spl;
 
 		#clock-cells = <1>;
 		#reset-cells = <1>;
@@ -172,7 +171,6 @@
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
-		u-boot,dm-spl;
 
 		gpio0: gpio0@2000a000 {
 			compatible = "rockchip,gpio-bank";

commit 1f0861773df7e836c0183525c0b0a8fafc604b55
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 17 17:16:33 2018 +0800

    rockchip: rk3188: add timer3 node
    
    Add dts node for timer3.
    
    Change-Id: I0af3f4e2fea26ceda82566846db15ec2337da43e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index 5178b3df85..ae65fd9717 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -134,6 +134,12 @@
 		status = "disabled";
 	};
 
+	timer3: timer@2000e000 {
+		compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
+		reg = <0x2000e000 0x20>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	usbphy: phy {
 		compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy";
 		rockchip,grf = <&grf>;

commit d30aacafd1143a7d806c0f2e03319a3a7ce08380
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Apr 27 10:31:09 2018 +0800

    lib: optee_client: updata keymaster TA
    
    compile form keymaster 8.1/develop-next commit:9d05fa8a
    Features:
            9d05fa8a keymaster: uboot write data delete old obj
            ff399cf0 ta keymaster: fix null point input panic
            186df0e4 keymaster & gatekeeper: rk3326 use partition storage
    
    Change-Id: Id15168f8782d4ab3680b9a424f8eee3843b6aa45
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 66cda56bd1..53809c04ff 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ

commit 3a06149e72bece72a6fae0ffd48b1832bc05feb9
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Apr 20 11:28:39 2018 +0800

    drm/rockchip: vop: add support dclk polarity invert config
    
    some platform like rk3288,rk3368 and px30, the rgb/lvds dclk
    polarity need to config grf config, other platform can config
    vop register to set dclk invert.
    
    Change-Id: Ica3b7b388d7650628c08007b327753caeeba3b0e
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 6980c137e3..d192193476 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -305,6 +305,8 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
 	FDT_GET_INT(val, "vsync-active");
 	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+	FDT_GET_INT(val, "pixelclk-active");
+	flags |= val ? DRM_MODE_FLAG_PPIXDATA : 0;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hfront_porch;
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index f8c0bd79b9..739595d782 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -19,6 +19,7 @@
 #include <linux/err.h>
 #include <dm/device.h>
 #include <dm/read.h>
+#include <syscon.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -200,6 +201,7 @@ static int rockchip_vop_init(struct display_state *state)
 	int ret;
 	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
 	u16 post_csc_mode;
+	bool dclk_inv;
 
 	vop = malloc(sizeof(*vop));
 	if (!vop)
@@ -212,6 +214,12 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->win = vop_data->win;
 	vop->win_offset = vop_data->win_offset;
 	vop->ctrl = vop_data->ctrl;
+	vop->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (vop->grf <= 0)
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, vop->grf);
+
+	vop->grf_ctrl = vop_data->grf_ctrl;
 	vop->line_flag = vop_data->line_flag;
 	vop->version = vop_data->version;
 	vop->max_output = vop_data->max_output;
@@ -250,6 +258,9 @@ static int rockchip_vop_init(struct display_state *state)
 	VOP_CTRL_SET(vop, win_channel[2], 0x56);
 	VOP_CTRL_SET(vop, dsp_blank, 0);
 
+	dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
+	VOP_CTRL_SET(vop, dclk_pol, dclk_inv);
+
 	val = 0x8;
 	val |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1;
 	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1);
@@ -259,23 +270,37 @@ static int rockchip_vop_init(struct display_state *state)
 	case DRM_MODE_CONNECTOR_LVDS:
 		VOP_CTRL_SET(vop, rgb_en, 1);
 		VOP_CTRL_SET(vop, rgb_pin_pol, val);
+		VOP_CTRL_SET(vop, rgb_dclk_pol, dclk_inv);
+		VOP_CTRL_SET(vop, lvds_en, 1);
+		VOP_CTRL_SET(vop, lvds_pin_pol, val);
+		VOP_CTRL_SET(vop, lvds_dclk_pol, dclk_inv);
+		if (!IS_ERR_OR_NULL(vop->grf))
+			VOP_GRF_SET(vop, grf_dclk_inv, !dclk_inv);
 		break;
 	case DRM_MODE_CONNECTOR_eDP:
 		VOP_CTRL_SET(vop, edp_en, 1);
 		VOP_CTRL_SET(vop, edp_pin_pol, val);
+		VOP_CTRL_SET(vop, edp_dclk_pol, dclk_inv);
 		break;
 	case DRM_MODE_CONNECTOR_HDMIA:
 		VOP_CTRL_SET(vop, hdmi_en, 1);
 		VOP_CTRL_SET(vop, hdmi_pin_pol, val);
+		VOP_CTRL_SET(vop, hdmi_dclk_pol, 1);
 		break;
 	case DRM_MODE_CONNECTOR_DSI:
 		VOP_CTRL_SET(vop, mipi_en, 1);
 		VOP_CTRL_SET(vop, mipi_pin_pol, val);
+		VOP_CTRL_SET(vop, mipi_dclk_pol, dclk_inv);
 		VOP_CTRL_SET(vop, mipi_dual_channel_en,
 			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL));
 		VOP_CTRL_SET(vop, data01_swap,
 			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK));
 		break;
+	case DRM_MODE_CONNECTOR_DisplayPort:
+		VOP_CTRL_SET(vop, dp_dclk_pol, 0);
+		VOP_CTRL_SET(vop, dp_pin_pol, val);
+		VOP_CTRL_SET(vop, dp_en, 1);
+		break;
 	case DRM_MODE_CONNECTOR_TV:
 		if (vdisplay == CVBS_PAL_VDISPLAY)
 			VOP_CTRL_SET(vop, tve_sw_mode, 1);
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 0ab9d52e8c..8662ed1400 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -64,6 +64,13 @@
 #define VOP_WIN_GET(x, name) \
 		vop_read_reg(x, vop->win->offset, &vop->win->name)
 
+#define VOP_GRF_SET(vop, name, v) \
+	do { \
+		if (vop->grf_ctrl) { \
+			vop_grf_writel(vop, vop->grf_ctrl->name, v); \
+		} \
+	} while (0)
+
 #define CVBS_PAL_VDISPLAY              288
 
 enum alpha_mode {
@@ -412,6 +419,10 @@ struct vop_line_flag {
 	struct vop_reg line_flag_num[2];
 };
 
+struct vop_grf_ctrl {
+	struct vop_reg grf_dclk_inv;
+};
+
 struct vop_rect {
 	int width;
 	int height;
@@ -424,6 +435,7 @@ struct vop_data {
 	const struct vop_ctrl *ctrl;
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
+	const struct vop_grf_ctrl *grf_ctrl;
 	int win_offset;
 	int reg_len;
 	u64 feature;
@@ -433,11 +445,13 @@ struct vop_data {
 struct vop {
 	u32 *regsbak;
 	void *regs;
+	void *grf;
 
 	uint32_t version;
 	const struct vop_ctrl *ctrl;
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
+	const struct vop_grf_ctrl *grf_ctrl;
 	int win_offset;
 	struct vop_rect max_output;
 };
@@ -483,6 +497,16 @@ static inline void vop_cfg_done(struct vop *vop)
 	VOP_CTRL_SET(vop, cfg_done, 1);
 }
 
+static inline void vop_grf_writel(struct vop *vop, struct vop_reg reg, u32 v)
+{
+	u32 val = 0;
+
+	if (VOP_REG_SUPPORT(vop, reg)) {
+		val = (v << reg.shift) | (reg.mask << (reg.shift + 16));
+		writel(val, vop->grf + reg.offset);
+	}
+}
+
 /**
  * drm_format_horz_chroma_subsampling - get the horizontal chroma subsampling factor
  * @format: pixel format (DRM_FORMAT_*)
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 31541cf2d7..9445fb5d8d 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -116,12 +116,23 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
 	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
 	.data01_swap = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 17, 3, 5, -1),
+	.dclk_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0x1, 7, 3, 0, 1),
 	.pin_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0xf, 4, 3, 0, 1),
-	.dp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
-	.rgb_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
-	.hdmi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 20, 3, 2, -1),
-	.edp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 24, 3, 2, -1),
-	.mipi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 28, 3, 2, -1),
+	.dp_dclk_pol = VOP_REG_VER(RK3399_DSP_CTRL1, 0x1, 19, 3, 5, -1),
+	.dp_pin_pol = VOP_REG_VER(RK3399_DSP_CTRL1, 0x7, 16, 3, 5, -1),
+	.rgb_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 19, 3, 2, -1),
+	.rgb_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 16, 3, 2, -1),
+	.tve_dclk_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 24),
+	.tve_dclk_pol = VOP_REG(RK3288_SYS_CTRL, 0x1, 25),
+	.tve_sw_mode = VOP_REG(RK3288_SYS_CTRL, 0x1, 26),
+	.sw_uv_offset_en  = VOP_REG(RK3288_SYS_CTRL, 0x1, 27),
+	.sw_genlock   = VOP_REG(RK3288_SYS_CTRL, 0x1, 28),
+	.hdmi_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 23, 3, 2, -1),
+	.hdmi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 20, 3, 2, -1),
+	.edp_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 27, 3, 2, -1),
+	.edp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 24, 3, 2, -1),
+	.mipi_dclk_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x1, 31, 3, 2, -1),
+	.mipi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0x7, 28, 3, 2, -1),
 
 	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
@@ -161,11 +172,20 @@ static const struct vop_line_flag rk3288_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
 };
 
+static const struct vop_grf_ctrl rk3288_vop_big_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 12),
+};
+
+static const struct vop_grf_ctrl rk3288_vop_lit_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 14),
+};
+
 const struct vop_data rk3288_vop_big = {
 	.version = VOP_VERSION(3, 1),
 	.max_output = {3840, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
+	.grf_ctrl = &rk3288_vop_big_grf_ctrl,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3288_vop_line_flag,
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
@@ -176,6 +196,7 @@ const struct vop_data rk3288_vop_lit = {
 	.max_output = {2560, 1600},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
+	.grf_ctrl = &rk3288_vop_lit_grf_ctrl,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3288_vop_line_flag,
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
@@ -186,10 +207,15 @@ static const struct vop_line_flag rk3368_vop_line_flag = {
 	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
 };
 
+static const struct vop_grf_ctrl rk3368_vop_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(RK3368_GRF_SOC_CON6, 0x1, 5),
+};
+
 const struct vop_data rk3368_vop = {
 	.version = VOP_VERSION(3, 2),
 	.max_output = {4096, 2160},
 	.ctrl = &rk3288_ctrl_data,
+	.grf_ctrl = &rk3368_vop_grf_ctrl,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3368_vop_line_flag,
 	.reg_len = RK3368_DSP_VACT_ST_END_F1 * 4,
@@ -356,6 +382,7 @@ static const struct vop_ctrl rk3036_ctrl_data = {
 	.standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30),
 	.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
 	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
+	.dclk_pol = VOP_REG(RK3036_DSP_CTRL0, 0x1, 7),
 	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
 	.dsp_layer_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 8),
 	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
@@ -485,10 +512,15 @@ static const struct vop_line_flag rk3366_vop_lite_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3366_LIT_LINE_FLAG, 0xfff, 0),
 };
 
+static const struct vop_grf_ctrl px30_grf_ctrl = {
+	.grf_dclk_inv = VOP_REG(PX30_GRF_PD_VO_CON1, 0x1, 4),
+};
+
 const struct vop_data px30_vop_lit = {
 	.version = VOP_VERSION(2, 5),
 	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
+	.grf_ctrl = &px30_grf_ctrl,
 	.win = &rk3366_win1_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
@@ -498,6 +530,7 @@ const struct vop_data px30_vop_big = {
 	.version = VOP_VERSION(2, 6),
 	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
+	.grf_ctrl = &px30_grf_ctrl,
 	.win = &rk3366_win0_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 675616240e..f300e7be63 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -116,6 +116,7 @@
 #define RK3288_BCSH_COLOR_BAR			0x01b0
 #define RK3288_BCSH_BCS				0x01b4
 #define RK3288_BCSH_H				0x01b8
+#define RK3288_GRF_SOC_CON15			0x03a4
 /* register definition end */
 
 /* rk3368 register definition */
@@ -303,6 +304,7 @@
 #define RK3368_CABC_GAMMA_LUT_ADDR		0x1800
 #define RK3368_MCU_BYPASS_WPORT			0x2200
 #define RK3368_MCU_BYPASS_RPORT			0x2300
+#define RK3368_GRF_SOC_CON6			0x0418
 /* rk3368 register definition end */
 
 #define RK3366_REG_CFG_DONE			0x0000
@@ -955,5 +957,6 @@
 #define PX30_AFBCD0_PIC_SIZE			0x00248
 #define PX30_AFBCD0_PIC_OFFSET			0x0024c
 #define PX30_AFBCD0_AXI_CTRL			0x00250
+#define PX30_GRF_PD_VO_CON1			0x00438
 /* px30 register definition end */
 #endif /* _ROCKCHIP_VOP_REG_H */
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 78cfcdc2b6..d71f562ddb 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -36,6 +36,7 @@
 #define DRM_MODE_FLAG_PIXMUX			(1 << 11)
 #define DRM_MODE_FLAG_DBLCLK			(1 << 12)
 #define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
+#define DRM_MODE_FLAG_PPIXDATA			(1 << 31)
 
 #define DRM_MODE_CONNECTOR_Unknown	0
 #define DRM_MODE_CONNECTOR_VGA		1

commit 55a89bc67a8219df1210e52f877b9fe7bb424b62
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Apr 17 14:21:09 2018 +0800

    pinctrl: rockchip: Add DRV_TYPE_WRITABLE_32BIT and PULL_TYPE_WRITABLE_32BIT for rk3288 gpio0
    
    Change-Id: Ib17e1b1c3d0aafa437014cc2cb5fb18d13319753
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 13e55f7e5a..9f83c15723 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -50,6 +50,9 @@ struct rockchip_iomux {
 	int				offset;
 };
 
+#define DRV_TYPE_IO_MASK		GENMASK(31, 16)
+#define DRV_TYPE_WRITABLE_32BIT		BIT(31)
+
 /**
  * enum type index corresponding to rockchip_perpin_drv_list arrays index.
  */
@@ -62,6 +65,9 @@ enum rockchip_pin_drv_type {
 	DRV_TYPE_MAX
 };
 
+#define PULL_TYPE_IO_MASK		GENMASK(31, 16)
+#define PULL_TYPE_WRITABLE_32BIT	BIT(31)
+
 /**
  * enum type index corresponding to rockchip_pull_list arrays index.
  */
@@ -201,6 +207,32 @@ struct rockchip_pin_bank {
 		},							\
 	}
 
+#define PIN_BANK_IOMUX_DRV_PULL_FLAGS(id, pins, label, iom0, iom1,	\
+				      iom2, iom3, drv0, drv1, drv2,	\
+				      drv3, pull0, pull1, pull2,	\
+				      pull3)				\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = -1 },		\
+			{ .drv_type = drv1, .offset = -1 },		\
+			{ .drv_type = drv2, .offset = -1 },		\
+			{ .drv_type = drv3, .offset = -1 },		\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
 #define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins,	\
 					      label, iom0, iom1, iom2,  \
 					      iom3, drv0, drv1, drv2,   \
@@ -1665,7 +1697,7 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 	int reg, ret, i;
 	u32 data, rmask_bits, temp;
 	u8 bit;
-	int drv_type = bank->drv[pin_num / 8].drv_type;
+	int drv_type = bank->drv[pin_num / 8].drv_type & DRV_TYPE_IO_MASK;
 
 	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
 	      pin_num, strength);
@@ -1737,10 +1769,15 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
 		return -EINVAL;
 	}
 
-	/* enable the write to the equivalent lower bits */
-	data = ((1 << rmask_bits) - 1) << (bit + 16);
-	data |= (ret << bit);
+	if (bank->drv[pin_num / 8].drv_type & DRV_TYPE_WRITABLE_32BIT) {
+		regmap_read(regmap, reg, &data);
+		data &= ~(((1 << rmask_bits) - 1) << bit);
+	} else {
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << rmask_bits) - 1) << (bit + 16);
+	}
 
+	data |= (ret << bit);
 	ret = regmap_write(regmap, reg, data);
 	return ret;
 }
@@ -1794,7 +1831,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RK3308:
 	case RK3368:
 	case RK3399:
-		pull_type = bank->pull_type[pin_num / 8];
+		pull_type = bank->pull_type[pin_num / 8] & PULL_TYPE_IO_MASK;
 		ret = -EINVAL;
 		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
 			i++) {
@@ -1809,10 +1846,15 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 			return ret;
 		}
 
-		/* enable the write to the equivalent lower bits */
-		data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
-		data |= (ret << bit);
+		if (bank->pull_type[pin_num / 8] & PULL_TYPE_WRITABLE_32BIT) {
+			regmap_read(regmap, reg, &data);
+			data &= ~(((1 << RK3188_PULL_BITS_PER_PIN) - 1) << bit);
+		} else {
+			/* enable the write to the equivalent lower bits */
+			data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+		}
 
+		data |= (ret << bit);
 		ret = regmap_write(regmap, reg, data);
 		break;
 	default:
@@ -2414,10 +2456,19 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 };
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
-					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
-					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
-					     IOMUX_UNROUTED
+	PIN_BANK_IOMUX_DRV_PULL_FLAGS(0, 24, "gpio0",
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+				      IOMUX_UNROUTED,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      DRV_TYPE_WRITABLE_32BIT,
+				      0,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      PULL_TYPE_WRITABLE_32BIT,
+				      0
 			    ),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
 					     IOMUX_UNROUTED,

commit a43a18b23bdfe6b4d142f5529d5e1046aa79edb0
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 23 15:41:31 2018 +0800

    make.sh: add subcmd to pack trust and loader
    
    We don't want uboot.img compile everytime if we just want to
    pack trust or loader.
    
    Example:
            ./make.sh evb-rk3308 trust      ------ only pack trust
            ./make.sh evb-rk3308 loader     ------ only pack loader
    
    Change-Id: I9d940eefba99074c155c978cbc0ba838160f65d9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index bb8772258b..10c1d8514c 100755
--- a/make.sh
+++ b/make.sh
@@ -112,6 +112,12 @@ sub_commands()
 			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
+	elif [ "$SUBCMD" = 'trust' ]; then
+		pack_trust_image
+		exit 0
+	elif [ "$SUBCMD" = 'loader' ]; then
+		pack_loader_image
+		exit 0
 	fi
 }
 
@@ -207,9 +213,9 @@ prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig ${OUTOPT}
 select_toolchain
+fixup_chip_name
 sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
-fixup_chip_name
 pack_uboot_image
 pack_loader_image
 pack_trust_image

commit d6cf38088b055736636320583a677bf5a107760a
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Mon Apr 23 10:19:51 2018 +0800

    drivers: rknand: add cache flush ops after data write
    
    The FTL cache the last page of the write data, it will lose
    after reboot. Here need to add a cache flush operation after
    write the data to resolve it.
    
    Change-Id: Ie197fad9f9e23ce5337be87f5d8380decad731b7
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 602fa3ddbb..ec6c5a4cc2 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-11
+ * date: 2018-04-23
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -2825,7 +2825,7 @@ ftl_read_buf:
 	bhi	.L525
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 887
+	mov	w2, 888
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -15687,7 +15687,7 @@ ftl_read_ahead:
 	cmn	w23, #1
 	bne	.L2504
 .L2503:
-	mov	w2, 874
+	mov	w2, 875
 	adrp	x1, .LANCHOR191
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR191
@@ -17522,7 +17522,7 @@ zftl_read:
 .L2772:
 	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
-	mov	w2, 1030
+	mov	w2, 1031
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 .L2773:
@@ -17770,7 +17770,7 @@ vpn_check:
 	bhi	.L2798
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	mov	w2, 1266
+	mov	w2, 1267
 	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -17793,7 +17793,7 @@ vpn_check:
 	ldrh	w1, [x24, #:lo12:.LANCHOR2]
 	cmp	w1, w0, uxth
 	bhi	.L2796
-	mov	w2, 1256
+	mov	w2, 1257
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR198
@@ -17887,7 +17887,7 @@ vpn_check:
 	add	x0, x20, :lo12:check_vpc_tbl
 	ldrh	w0, [x0, x27, lsl 1]
 	cbz	w0, .L2808
-	mov	w2, 1298
+	mov	w2, 1299
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
@@ -19710,7 +19710,7 @@ zftl_discard:
 	bcc	.L3093
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
-	mov	w2, 1177
+	mov	w2, 1178
 	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
@@ -20723,6 +20723,7 @@ zftl_write:
 	add	x20, x20, :lo12:.LANCHOR89
 	add	x19, x19, :lo12:.LANCHOR93
 	bl	ftl_write_commit
+	bl	ftl_flush
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc

commit 4bafc2da2ded5e0dcfd8c097a501e301c8eeea9f
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Apr 16 11:22:21 2018 +0800

    pinctrl: rockchip: Change the flag's name from IOMUX_UNMASKED to IOMUX_WRITABLE_32BIT
    
    Using the name IOMUX_UNMASKED of flag is not so suitable, pickup the
    IOMUX_WRITABLE_32BIT name. And need to clean the value when set the
    iomux.
    
    Change-Id: I3e2d69702f4669770ff933ba2c40a641a924b55e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 3fbd974f66..13e55f7e5a 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -37,7 +37,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
 #define IOMUX_8WIDTH_2BIT	BIT(5)
-#define IOMUX_UNMASKED		BIT(6)
+#define IOMUX_WRITABLE_32BIT	BIT(6)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -1114,10 +1114,12 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	if (mux_type & IOMUX_UNMASKED)
+	if (mux_type & IOMUX_WRITABLE_32BIT) {
 		regmap_read(regmap, reg, &data);
-	else
+		data &= ~(mask << bit);
+	} else {
 		data = (mask << (bit + 16));
+	}
 
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
@@ -2412,9 +2414,9 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 };
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
-					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
-					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
+	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+					     IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
 					     IOMUX_UNROUTED
 			    ),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,

commit 1d2570d36f237580300f6dce95f4d5315ab39977
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Wed Apr 18 14:56:13 2018 +0800

    clk: rockchip/rk3399: fixes the correct clock init
    
    We will use the rkclk_init() for rk3399 without SPL/TPL way.
    
    Change-Id: I73a4d694ff2cb0e18f390c293971985f41d2b03d
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 955112d6ff..c19912ab69 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -50,13 +50,11 @@ struct pll_div {
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
-#if defined(CONFIG_SPL_BUILD)
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
-#else
+#if !defined(CONFIG_SPL_BUILD)
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
-
 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
@@ -1033,7 +1031,6 @@ static struct clk_ops rk3399_clk_ops = {
 	.enable = rk3399_clk_enable,
 };
 
-#ifdef CONFIG_SPL_BUILD
 static void rkclk_init(struct rk3399_cru *cru)
 {
 	u32 aclk_div;
@@ -1111,11 +1108,9 @@ static void rkclk_init(struct rk3399_cru *cru)
 		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
 		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
 }
-#endif
 
 static int rk3399_clk_probe(struct udevice *dev)
 {
-#ifdef CONFIG_SPL_BUILD
 	struct rk3399_clk_priv *priv = dev_get_priv(dev);
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -1124,7 +1119,6 @@ static int rk3399_clk_probe(struct udevice *dev)
 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 	rkclk_init(priv->cru);
-#endif
 	return 0;
 }
 

commit 9b07af4c220da13a743a7384a84e8056427a4cd9
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Wed Apr 11 17:33:14 2018 +0800

    fuel gauge: rk817: disable the bat discharge current limit function
    
    Change-Id: Iec99275fbbd3ff2d6ba76d8ef3327c4c3312ef76
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index fddc31a4e4..7c8ae372e4 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -132,6 +132,7 @@ static int dbg_enable = 0;
 #define CUR_ADC_K2		0x00ae
 #define CUR_ADC_K1		0x00af
 #define CUR_ADC_K0		0x00b0
+#define BAT_DISCHRG		0x00ec
 #define BAT_CON			BIT(4)
 #define SOC_REG			0xa5
 
@@ -167,6 +168,7 @@ static int dbg_enable = 0;
 #define CHRG_CT_EN		BIT(1)
 #define MIN_FCC			500
 #define CAP_INVALID		BIT(7)
+#define DIS_ILIM_EN		BIT(3)
 
 /* USB_CTRL_REG */
 #define INPUT_CUR_MSK		0x0f
@@ -1159,6 +1161,8 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 
 	value = rk817_bat_read(battery, GG_CON);
 	rk817_bat_write(battery, GG_CON, value | VOL_OUPUT_INSTANT_MODE);
+	value =  rk817_bat_read(battery, BAT_DISCHRG);
+	rk817_bat_write(battery, GG_CON, value & (~DIS_ILIM_EN));
 
 	rk817_bat_gas_gaugle_enable(battery);
 	rk817_bat_init_voltage_kb(battery);

commit 90b0cf64a77dd500dadfda79875338d905d40b95
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 20:38:01 2018 +0800

    make.sh: delete u-boot.img and u-boot-dtb.img
    
    this avoids users to be confused with uboot.img
    
    Change-Id: Ifdbb1c483825ef065708ca81da3496bde3358e21
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index cc3176f2ee..bb8772258b 100755
--- a/make.sh
+++ b/make.sh
@@ -128,6 +128,7 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	rm u-boot.img u-boot-dtb.img
 	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 

commit 02e4afbde621dbeac5ef3374207aadbd8b7046af
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 19:21:15 2018 +0800

    sysreset: Kconfig: default enable SYSRESET_PSCI for rockchip platforms
    
    Change-Id: I158416f90432faae0beb5b6e36712b43ed28882b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index a61a7d37c6..e272a9990f 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -36,6 +36,7 @@ if SYSRESET
 config SYSRESET_PSCI
 	bool "Enable support for PSCI System Reset"
 	depends on ARM_PSCI_FW
+	default y if ARCH_ROCKCHIP
 	help
 	  Enable PSCI SYSTEM_RESET function call.  To use this, PSCI firmware
 	  must be running on your system.

commit 6ba2d5cbca2d52a2a1a0a82eda47b1102848424b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 19:11:52 2018 +0800

    rockchip: Kconfig: enable ARM_SMCCC for most platforms
    
    including platforms:
      rk3036, rk322x, rk3288, rk3308, rk3328, rk3368, rk3399
    
    we enable ARM_SMCCC mainly for PSCI system reset since these
    platforms can provided PSCI implementation.
    
    Change-Id: If566b189fc58bec77bd045c5b2b99ff29dba578a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bf418da8ab..d295c83750 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -33,6 +33,7 @@ config ROCKCHIP_RK3036
 	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
 	select TPL_NEEDS_SEPARATE_STACK if TPL
 	select DEBUG_UART_BOARD_INIT
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -114,6 +115,7 @@ config ROCKCHIP_RK322X
 	select TPL_LIBCOMMON_SUPPORT
 	select TPL_LIBGENERIC_SUPPORT
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
@@ -127,6 +129,7 @@ config ROCKCHIP_RK3288
 	select SUPPORT_SPL
 	select SPL
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -138,6 +141,7 @@ config ROCKCHIP_RK3308
 	bool "Support Rockchip RK3308"
 	select ARM64
 	select DEBUG_UART_BOARD_INIT
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
 	  Cortex-A35 and highly integrated audio interfaces.
@@ -156,6 +160,7 @@ config ROCKCHIP_RK3328
 	imply TPL_SERIAL_SUPPORT
 	imply SPL_SEPARATE_BSS
 	select DEBUG_UART_BOARD_INIT
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -191,6 +196,7 @@ config ROCKCHIP_RK3368
 	imply TPL_SERIAL_SUPPORT
 	select DEBUG_UART_BOARD_INIT
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
 	  into a big and little cluster with 4 cores each) Cortex-A53 including
@@ -230,6 +236,7 @@ config ROCKCHIP_RK3399
 	select GICV3
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.

commit 7a484f5f253b345b708a1be408bf90c8aa56a0b3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Apr 16 20:00:37 2018 +0800

    firmware: psci: use dev_read_prop() to parse "method"
    
    Change-Id: I77141c1d9763f4b6d4d5a1d51d27ea3a31c7f695
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index 451fbdebba..ab72b984fc 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -56,11 +56,9 @@ static int psci_bind(struct udevice *dev)
 
 static int psci_probe(struct udevice *dev)
 {
-	DECLARE_GLOBAL_DATA_PTR;
 	const char *method;
 
-	method = fdt_stringlist_get(gd->fdt_blob, dev_of_offset(dev), "method",
-				    0, NULL);
+	method = dev_read_prop(dev, "method", NULL);
 	if (!method) {
 		printf("missing \"method\" property\n");
 		return -ENXIO;

commit 33cde59d361c31559603e72f14ff0d74f4f5dab1
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Apr 16 17:02:28 2018 +0800

    rockchip/rk3288: modify CONFIG_BOOTCOMMAND
    
    Support boot with resource.img kernel.img.
    
    Change-Id: Ifbf4180322bde0c55f312e05c0eaebaed71406e5
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index b031baa5ed..15a374cca7 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -7,11 +7,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#ifndef CONFIG_SPL_BUILD
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
-#endif
-
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index b031baa5ed..15a374cca7 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -7,11 +7,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#ifndef CONFIG_SPL_BUILD
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
-#endif
-
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 6d5d0b5106..4eb2c702b2 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -10,6 +10,11 @@
 #include <asm/arch/hardware.h>
 #include "rockchip-common.h"
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024

commit 7add7997881eff69fb874c31fed023d8631414fe
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Thu Apr 12 15:20:42 2018 +0800

    rockchip/rk3288: update the config to support the RK bootloader
    
    Change-Id: Ic09cf541323d6a998061c0898d43ff2cded0f28e
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 3caf2c1280..8d2809b6aa 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_FIREFLY_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
@@ -12,12 +13,11 @@ CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -66,7 +66,6 @@ CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index f902ecf44b..7c4cbfc7e1 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_MIQI_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
@@ -12,12 +13,11 @@ CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -61,7 +61,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 4cc038b026..d0ecf3ad6e 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_PHYCORE_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
@@ -15,12 +16,11 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -65,7 +65,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 064d83df7f..c9f958b1f0 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_POPMETAL_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal"
@@ -13,12 +14,11 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -61,7 +61,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 8db265b252..e44384e9dd 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_TINKER_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker"
@@ -14,12 +15,11 @@ CONFIG_CONSOLE_MUX=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -64,7 +64,6 @@ CONFIG_SPL_RAM=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y

commit 82a6f86b02d11e130bb04ce25c2aa7f5a7e2600e
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Mon Apr 16 16:30:58 2018 +0800

    rockchip/rk3288: delete unused CONFIG_RKPARM_PARTITION
    
    Change-Id: I8702d405c8d9d1f91294c6753a6f229706f44243
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index d88ca692fb..11c323dae5 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -30,7 +30,6 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
-CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index ad5cb4bfc6..64c4827879 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
-CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y

commit 7b6cb9267b0eb163aea1a1dce15a9c90b8055b79
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Apr 16 16:11:07 2018 +0800

    rockchip: px30: remove RKPAM partition
    
    The new SoC is not going to support legacy partition type.
    
    Change-Id: If606de1f55d84f3d57b5c7eceddcf64c5c2526e5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 133c3a840d..421784c4ba 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -26,7 +26,6 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 164fdd0d48b22b43dfb6f2a781e8cc32141b035e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 16 16:58:55 2018 +0800

    configs: rockchip: rk3308: disable RKPARM_PARTITION
    
    We use GPT partition on rk3308 platform.
    
    Change-Id: Ic359016cd9181b574d45a2bc6953a09134a2497e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 65c45baf79..30c4df0124 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -20,7 +20,6 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y

commit 10f950baa82a3381b89b5319d0084a6fedbad793
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Mon Apr 16 14:40:13 2018 +0800

    rockchip: sdram: updata ddr config to v1.08
    
    1.Add more ddr rows support,such as 12 rows and 17 rows.
    2.Support different column for different cs.
    
    Change-Id: Iacb9b8545433c7172ff3f1090987f7d1d5699381
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index 55c6b81b2f..8be19c6ccb 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -14,19 +14,27 @@
  * [27]		rank_ch1
  * [26:25]	col_ch1
  * [24]		bk_ch1
- * [23:22]	cs0_row_ch1
- * [21:20]	cs1_row_ch1
+ * [23:22]	low bits of cs0_row_ch1
+ * [21:20]	low bits of cs1_row_ch1
  * [19:18]	bw_ch1
  * [17:16]	dbw_ch1;
  * [15:13]	ddrtype
  * [12]		channelnum
  * [11]		rank_ch0
- * [10:9]	col_ch0
+ * [10:9]	col_ch0,
  * [8]		bk_ch0
- * [7:6]	cs0_row_ch0
- * [5:4]	cs1_row_ch0
+ * [7:6]	low bits of cs0_row_ch0
+ * [5:4]	low bits of cs1_row_ch0
  * [3:2]	bw_ch0
  * [1:0]	dbw_ch0
+ *
+ * sys_reg1 bitfield struct
+ * [7]		high bit of cs0_row_ch1
+ * [6]		high bit of cs1_row_ch1
+ * [5]		high bit of cs0_row_ch0
+ * [4]		high bit of cs1_row_ch0
+ * [3:2]	cs1_col_ch1
+ * [1:0]	cs1_col_ch0
 */
 #define SYS_REG_DDRTYPE_SHIFT		13
 #define SYS_REG_DDRTYPE_MASK		7
@@ -50,6 +58,15 @@
 #define SYS_REG_DBW_SHIFT(ch)		((ch) * 16)
 #define SYS_REG_DBW_MASK		3
 
+#define SYS_REG1_VERSION_SHIFT			28
+#define SYS_REG1_VERSION_MASK			0xf
+#define SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch)	(5 + (ch) * 2)
+#define SYS_REG1_EXTEND_CS0_ROW_MASK		1
+#define SYS_REG1_EXTEND_CS1_ROW_SHIFT(ch)	(4 + (ch) * 2)
+#define SYS_REG1_EXTEND_CS1_ROW_MASK		1
+#define SYS_REG1_CS1_COL_SHIFT(ch)		(0 + (ch) * 2)
+#define SYS_REG1_CS1_COL_MASK			3
+
 /* Get sdram size decode from reg */
 size_t rockchip_sdram_size(phys_addr_t reg);
 
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index f40edcce43..50828deff1 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -92,12 +92,14 @@ int dram_init_banksize(void)
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
-	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
+	u32 rank, cs0_col, bk, cs0_row, cs1_row, bw, row_3_4;
 	size_t chipsize_mb = 0;
 	size_t size_mb = 0;
 	u32 ch;
+	u32 cs1_col = 0;
 
 	u32 sys_reg = readl(reg);
+	u32 sys_reg1 = readl(reg + 4);
 	u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT)
 		       & SYS_REG_NUM_CH_MASK);
 
@@ -105,26 +107,67 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	for (ch = 0; ch < ch_num; ch++) {
 		rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
 			SYS_REG_RANK_MASK);
-		col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
+		cs0_col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
+		cs1_col = cs0_col;
 		bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
-		cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
+		if ((sys_reg1 >> SYS_REG1_VERSION_SHIFT &
+		     SYS_REG1_VERSION_MASK) == 0x2) {
+			cs1_col = 9 + (sys_reg1 >> SYS_REG1_CS1_COL_SHIFT(ch) &
+				  SYS_REG1_CS1_COL_MASK);
+			if (((sys_reg1 >> SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch) &
+			    SYS_REG1_EXTEND_CS0_ROW_MASK) << 2) + (sys_reg >>
+			    SYS_REG_CS0_ROW_SHIFT(ch) &
+			    SYS_REG_CS0_ROW_MASK) == 7)
+				cs0_row = 12;
+			else
+				cs0_row = 13 + (sys_reg >>
+					  SYS_REG_CS0_ROW_SHIFT(ch) &
+					  SYS_REG_CS0_ROW_MASK) +
+					  ((sys_reg1 >>
+					  SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch) &
+					  SYS_REG1_EXTEND_CS0_ROW_MASK) << 2);
+			if (((sys_reg1 >> SYS_REG1_EXTEND_CS1_ROW_SHIFT(ch) &
+			    SYS_REG1_EXTEND_CS1_ROW_MASK) << 2) + (sys_reg >>
+			    SYS_REG_CS1_ROW_SHIFT(ch) &
+			    SYS_REG_CS1_ROW_MASK) == 7)
+				cs1_row = 12;
+			else
+				cs1_row = 13 + (sys_reg >>
+					  SYS_REG_CS1_ROW_SHIFT(ch) &
+					  SYS_REG_CS1_ROW_MASK) +
+					  ((sys_reg1 >>
+					  SYS_REG1_EXTEND_CS1_ROW_SHIFT(ch) &
+					  SYS_REG1_EXTEND_CS1_ROW_MASK) << 2);
+		}
+		else {
+			cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
 				SYS_REG_CS0_ROW_MASK);
-		cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
+			cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
 				SYS_REG_CS1_ROW_MASK);
+		}
 		bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
 			SYS_REG_BW_MASK));
 		row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
 			SYS_REG_ROW_3_4_MASK;
 
-		chipsize_mb = (1 << (cs0_row + col + bk + bw - 20));
+		chipsize_mb = (1 << (cs0_row + cs0_col + bk + bw - 20));
 
 		if (rank > 1)
-			chipsize_mb += chipsize_mb >> (cs0_row - cs1_row);
+			chipsize_mb += chipsize_mb >> ((cs0_row - cs1_row) +
+				       (cs0_col - cs1_col));
 		if (row_3_4)
 			chipsize_mb = chipsize_mb * 3 / 4;
 		size_mb += chipsize_mb;
-		debug("rank %d col %d bk %d cs0_row %d bw %d row_3_4 %d\n",
-		      rank, col, bk, cs0_row, bw, row_3_4);
+		if (rank > 1)
+			debug("rank %d cs0_col %d cs1_col %d bk %d cs0_row %d\
+			       cs1_row %d bw %d row_3_4 %d\n",
+			       rank, cs0_col, cs1_col, bk, cs0_row,
+			       cs1_row, bw, row_3_4);
+		else
+			debug("rank %d cs0_col %d bk %d cs0_row %d\
+                               bw %d row_3_4 %d\n",
+                               rank, cs0_col, bk, cs0_row,
+                               bw, row_3_4);
 	}
 
 	/* Handle 4GB size, or else size will be 0 after <<20 in 32bit system */

commit 65e3ea686583c60865e01c99f9af50953ca2e559
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Mon Apr 9 10:07:46 2018 +0800

    drivers: rknand: update ftl for rk3308
    
    The NANDC version number definition is not compatible with the
    original. So the detect code need to update.
    
    Change-Id: I9a062158a1bd20b83050d17f02661cb429b55092
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
index bb62e2bc66..51dcc9aa25 100644
--- a/drivers/rknand/rk_ftl_arm_v8.S
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-08
+ * date: 2018-04-08
  */
 	.arch armv8-a
 	.file	"rk_ftl_arm_v8.S"
@@ -1356,23 +1356,27 @@ FlashEraseBlocks:
 	stp	x25, x26, [sp, 64]
 	cbnz	w1, .L199
 	adrp	x25, .LANCHOR23
-	mov	x23, x0
+	mov	x19, x0
 	add	x26, x25, :lo12:.LANCHOR23
-	mov	w19, 0
+	mov	w20, 0
 .L200:
-	cmp	w19, w22
+	cmp	w20, w22
 	adrp	x13, .LANCHOR25
 	bcc	.L209
-	adrp	x20, .LANCHOR8
-	adrp	x21, .LANCHOR23
-	add	x22, x13, :lo12:.LANCHOR25
-	add	x20, x20, :lo12:.LANCHOR8
-	add	x21, x21, :lo12:.LANCHOR23
-	mov	x19, 0
+	adrp	x21, .LANCHOR8
+	adrp	x23, .LANCHOR23
+	add	x25, x13, :lo12:.LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR23
+	mov	x20, 0
 .L210:
-	ldrb	w0, [x22]
-	cmp	w0, w19
+	ldrb	w0, [x25]
+	cmp	w0, w20
 	bhi	.L212
+	adrp	x0, .LANCHOR28
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbnz	w0, .L213
+.L214:
 	mov	w0, 0
 	b	.L198
 .L199:
@@ -1388,22 +1392,22 @@ FlashEraseBlocks:
 .L209:
 	mov	w12, 56
 	mov	w1, 0
-	sub	w4, w22, w19
+	sub	w4, w22, w20
 	add	x3, x29, 92
-	umull	x12, w19, w12
+	umull	x12, w20, w12
 	add	x2, x29, 88
-	add	x20, x23, x12
-	mov	x0, x20
+	add	x21, x19, x12
+	mov	x0, x21
 	bl	LogAddr2PhyAddr
-	mov	w21, w0
+	mov	w23, w0
 	ldrb	w1, [x13, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 92]
 	cmp	w1, w0
 	bhi	.L202
 	mov	w0, -1
-	str	w0, [x23, x12]
+	str	w0, [x19, x12]
 .L203:
-	add	w19, w19, 1
+	add	w20, w20, 1
 	b	.L200
 .L202:
 	adrp	x1, .LANCHOR27
@@ -1412,7 +1416,7 @@ FlashEraseBlocks:
 	ldrb	w1, [x1, #:lo12:.LANCHOR27]
 	cmp	w1, 0
 	uxtw	x1, w0
-	csel	w21, w21, wzr, ne
+	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
 	cbz	x1, .L205
@@ -1422,64 +1426,76 @@ FlashEraseBlocks:
 	mov	x0, 24
 	madd	x0, x1, x0, x26
 	str	w2, [x0, 4]
-	stp	x20, xzr, [x0, 8]
-	cbz	w21, .L206
-	add	w2, w19, 1
+	stp	x21, xzr, [x0, 8]
+	cbz	w23, .L206
+	add	w2, w20, 1
 	mov	w3, 56
-	umaddl	x2, w2, w3, x23
+	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
 .L206:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
-	ldrb	w20, [x0, x1]
+	ldrb	w21, [x0, x1]
 	mov	x0, 24
 	mul	x1, x1, x0
-	mov	w0, w20
-	strb	w20, [x26, x1]
+	mov	w0, w21
+	strb	w21, [x26, x1]
 	bl	NandcFlashCs
 	cmp	w24, 1
 	bne	.L207
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	cbz	w0, .L207
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_enter_slc_mode
 .L208:
 	ldr	w1, [x29, 92]
 	adrp	x0, .LANCHOR17
 	add	x0, x0, :lo12:.LANCHOR17
-	add	w19, w19, w21
+	add	w20, w20, w23
 	ldr	w0, [x0, x1, lsl 2]
 	ldr	w1, [x29, 88]
 	cmp	w0, 0
-	mov	w0, w20
+	mov	w0, w21
 	cset	w2, ne
 	bl	FlashWaitReadyEN
 	ldr	w1, [x29, 88]
-	mov	w2, w21
-	mov	w0, w20
+	mov	w2, w23
+	mov	w0, w21
 	bl	FlashEraseCmd
-	mov	w0, w20
+	mov	w0, w21
 	bl	NandcFlashDeCs
 	b	.L203
 .L207:
-	mov	w0, w20
+	mov	w0, w21
 	bl	flash_exit_slc_mode
 	b	.L208
 .L212:
-	mov	w0, w19
+	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w24, 1
 	bne	.L211
-	ldrb	w0, [x20]
+	ldrb	w0, [x21]
 	cbz	w0, .L211
 	mov	x0, 24
-	mul	x0, x19, x0
-	ldrb	w0, [x0, x21]
+	mul	x0, x20, x0
+	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
 .L211:
-	add	x19, x19, 1
+	add	x20, x20, 1
 	b	.L210
+.L213:
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	cmp	w0, 69
+	bne	.L214
+	mov	w0, 56
+	umaddl	x22, w22, w0, x19
+.L215:
+	cmp	x22, x19
+	beq	.L214
+	str	wzr, [x19], 56
+	b	.L215
 	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",@progbits
 	.align	2
@@ -1513,7 +1529,7 @@ FlashReadDpCmd:
 	str	w5, [x19, 2056]
 	cmp	w1, 1
 	lsr	w1, w21, 16
-	bne	.L227
+	bne	.L231
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w4, [x19, 2052]
@@ -1525,7 +1541,7 @@ FlashReadDpCmd:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-.L230:
+.L234:
 	str	w24, [x19, 2052]
 	mov	w0, 48
 	str	w23, [x19, 2052]
@@ -1538,12 +1554,12 @@ FlashReadDpCmd:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	b	FlashSetRandomizer
-.L227:
+.L231:
 	str	w4, [x19, 2052]
 	str	w3, [x19, 2052]
 	str	w1, [x19, 2052]
 	str	w0, [x19, 2056]
-	b	.L230
+	b	.L234
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",@progbits
 	.align	2
@@ -1555,19 +1571,19 @@ FlashDeInit:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	NandcWaitFlashReady
-	adrp	x19, .LANCHOR28
+	adrp	x19, .LANCHOR29
 	bl	FlashSetReadRetryDefault
-	ldrb	w0, [x19, #:lo12:.LANCHOR28]
-	cbz	w0, .L232
+	ldrb	w0, [x19, #:lo12:.LANCHOR29]
+	cbz	w0, .L236
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L232
+	tbz	x0, 0, .L236
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x19, #:lo12:.LANCHOR28]
-.L232:
+	strb	wzr, [x19, #:lo12:.LANCHOR29]
+.L236:
 	adrp	x0, .LANCHOR6
 	ldr	x0, [x0, #:lo12:.LANCHOR6]
 	str	wzr, [x0, 336]
@@ -1595,29 +1611,29 @@ NandcRandmzSel:
 NandcTimeCfg:
 	cmp	w0, 35
 	adrp	x1, .LANCHOR19
-	bhi	.L242
+	bhi	.L246
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 4193
-.L245:
+.L249:
 	str	w1, [x0, 4]
 	ret
-.L242:
+.L246:
 	cmp	w0, 99
 	ldr	x0, [x1, #:lo12:.LANCHOR19]
-	bls	.L244
+	bls	.L248
 	mov	w1, 8322
-	b	.L245
-.L244:
+	b	.L249
+.L248:
 	mov	w1, 4225
-	b	.L245
+	b	.L249
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",@progbits
 	.align	2
 	.global	FlashTimingCfg
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
-	adrp	x0, .LANCHOR29+21
-	ldrb	w0, [x0, #:lo12:.LANCHOR29+21]
+	adrp	x0, .LANCHOR30+21
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+21]
 	b	NandcTimeCfg
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",@progbits
@@ -1631,36 +1647,36 @@ NandcBchSel:
 	ldr	x2, [x1, #:lo12:.LANCHOR19]
 	mov	w1, 1
 	str	w1, [x2, 8]
-	adrp	x1, .LANCHOR30
-	str	w0, [x1, #:lo12:.LANCHOR30]
+	adrp	x1, .LANCHOR31
+	str	w0, [x1, #:lo12:.LANCHOR31]
 	mov	w1, 4096
-	bne	.L248
-.L251:
+	bne	.L252
+.L255:
 	and	w1, w1, -17
-.L249:
+.L253:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L248:
+.L252:
 	cmp	w0, 24
-	bne	.L250
+	bne	.L254
 	orr	w1, w1, 16
-	b	.L249
-.L250:
+	b	.L253
+.L254:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L249
-	b	.L251
+	bne	.L253
+	b	.L255
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",@progbits
 	.align	2
 	.global	FlashBchSel
 	.type	FlashBchSel, %function
 FlashBchSel:
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR31]
+	strb	w0, [x1, #:lo12:.LANCHOR32]
 	b	NandcBchSel
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",@progbits
@@ -1733,11 +1749,11 @@ NandcSendDumpDataStart:
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	sub	sp, sp, #16
-.L265:
+.L269:
 	ldr	w1, [x0, 8]
 	str	w1, [sp, 8]
 	ldr	w1, [sp, 8]
-	tbz	x1, 20, .L265
+	tbz	x1, 20, .L269
 	add	sp, sp, 16
 	ret
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
@@ -1751,13 +1767,13 @@ NandcXferStart:
 	ubfx	x3, x3, 1, 7
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	and	w23, w1, 255
+	and	w24, w1, 255
 	adrp	x1, .LANCHOR6
 	add	x1, x1, :lo12:.LANCHOR6
 	add	x6, x1, x0
 	stp	x21, x22, [sp, 32]
 	stp	x19, x20, [sp, 16]
-	ubfiz	w19, w23, 1, 1
+	ubfiz	w19, w24, 1, 1
 	ldr	x21, [x1, x0]
 	mov	w1, 16
 	ldrb	w0, [x6, 8]
@@ -1769,13 +1785,13 @@ NandcXferStart:
 	bfi	w22, w0, 5, 3
 	mov	w0, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR32
+	adrp	x0, .LANCHOR33
 	orr	w19, w19, 536870912
 	orr	w19, w19, 1024
-	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	bfi	w19, w3, 4, 1
 	cmp	w0, 3
-	bls	.L270
+	bls	.L274
 	ldr	w0, [x21, 16]
 	cmp	x5, 0
 	str	w0, [x29, 88]
@@ -1783,36 +1799,43 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	and	w0, w0, -5
 	str	w0, [x29, 88]
-	beq	.L271
+	beq	.L275
 	and	w2, w2, 255
-	adrp	x20, .LANCHOR33
-	cbnz	w23, .L272
-.L280:
+	adrp	x20, .LANCHOR34
+	cbnz	w24, .L276
+.L284:
+	ldr	x0, [x20, #:lo12:.LANCHOR34]
 	add	w2, w2, 1
-	ldr	x0, [x20, #:lo12:.LANCHOR33]
-	asr	w2, w2, 1
-	add	x20, x20, :lo12:.LANCHOR33
 	cmp	x4, 0
-	mov	x24, x4
-	bfi	w19, w2, 22, 6
+	asr	w2, w2, 1
 	csel	x0, x4, x0, ne
+	add	x20, x20, :lo12:.LANCHOR34
+	bfi	w19, w2, 22, 6
+	and	x2, x0, 4294967295
+	add	x2, x2, 63
+	mov	x25, x4
+	and	x2, x2, -64
 	ldr	x1, [x20, 8]
-	ubfx	x25, x19, 22, 5
+	ubfx	x23, x19, 22, 5
 	stp	x0, x1, [x20, 16]
 	stp	w0, w1, [x20, 32]
-	add	w1, w0, w25, lsl 10
-	uxtw	x0, w0
+	ubfiz	x1, x23, 10, 5
+	add	x1, x2, x1
+	and	x0, x0, 4294967232
 	bl	flush_dcache_range
-	ldr	x0, [x20, 24]
-	add	w1, w0, w25, lsl 7
-	uxtw	x0, w0
+	ubfiz	x23, x23, 7, 5
+	ldr	w0, [x20, 36]
+	add	x1, x0, 63
+	and	x0, x0, 4294967232
+	and	x1, x1, -64
+	add	x1, x1, x23
 	bl	flush_dcache_range
 	mov	w0, 1
 	str	w0, [x20, 40]
 	ldr	w0, [x20, 32]
 	mov	w1, 16
 	str	w0, [x21, 20]
-	tst	x24, 3
+	tst	x25, 3
 	ldr	w0, [x20, 36]
 	str	w0, [x21, 24]
 	str	wzr, [x29, 88]
@@ -1822,14 +1845,14 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 448
 	str	w0, [x29, 88]
-	bne	.L281
+	bne	.L285
 	ldr	w0, [x29, 88]
 	mov	w1, 2
 	bfi	w0, w1, 3, 3
 	str	w0, [x29, 88]
-.L281:
+.L285:
 	ldr	w0, [x29, 88]
-	cmp	w23, 0
+	cmp	w24, 0
 	cset	w1, eq
 	orr	w0, w0, 4
 	str	w0, [x29, 88]
@@ -1839,10 +1862,10 @@ NandcXferStart:
 	ldr	w0, [x29, 88]
 	orr	w0, w0, 1
 	str	w0, [x29, 88]
-.L271:
+.L275:
 	ldr	w0, [x29, 88]
 	str	w0, [x21, 16]
-.L270:
+.L274:
 	str	w22, [x21, 12]
 	str	w19, [x21, 8]
 	orr	w19, w19, 4
@@ -1853,38 +1876,38 @@ NandcXferStart:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L272:
-	adrp	x0, .LANCHOR30
+.L276:
+	adrp	x0, .LANCHOR31
 	mov	w6, 64
 	lsr	w11, w2, 1
 	mov	x1, x5
-	ldr	w0, [x0, #:lo12:.LANCHOR30]
+	ldr	w0, [x0, #:lo12:.LANCHOR31]
 	mov	w7, 0
 	mov	w3, 0
 	mov	w12, -1
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w6, w6, w0, cc
-	add	x0, x20, :lo12:.LANCHOR33
+	add	x0, x20, :lo12:.LANCHOR34
 	ldr	x10, [x0, 8]
-.L276:
+.L280:
 	cmp	w3, w11
-	bcs	.L280
+	bcs	.L284
 	lsr	w0, w7, 2
 	lsl	w0, w0, 2
-	cbz	x5, .L277
+	cbz	x5, .L281
 	ldrh	w13, [x1]
 	add	x1, x1, 4
 	ldrh	w8, [x1, -2]
 	orr	x8, x13, x8, lsl 16
 	str	w8, [x10, x0]
-.L278:
+.L282:
 	add	w3, w3, 1
 	add	w7, w7, w6
-	b	.L276
-.L277:
+	b	.L280
+.L281:
 	str	w12, [x10, x0]
-	b	.L278
+	b	.L282
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",@progbits
 	.align	2
@@ -1894,82 +1917,63 @@ NandcXferComp:
 	ubfiz	x0, x0, 4, 8
 	adrp	x1, .LANCHOR6
 	add	x1, x1, :lo12:.LANCHOR6
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	ldr	x3, [x1, x0]
-	adrp	x0, .LANCHOR32
-	str	x19, [sp, 16]
-	ldr	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldr	w2, [x0, #:lo12:.LANCHOR33]
 	cmp	w2, 3
-	bls	.L311
+	bls	.L313
 	ldr	w0, [x3, 16]
-	tbz	x0, 2, .L311
+	tbz	x0, 2, .L313
 	ldr	w0, [x3, 16]
-	tbz	x0, 1, .L299
+	tbz	x0, 1, .L301
 	ldr	w0, [x3, 8]
-	str	w0, [x29, 32]
-.L292:
+	str	w0, [x29, 16]
+.L296:
 	ldr	w1, [x3, 28]
-	ldr	w0, [x29, 32]
+	ldr	w0, [x29, 16]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L296
+	bge	.L297
 	cmp	w2, 5
-	bls	.L292
+	bls	.L296
 	ldr	w0, [x3]
-	str	w0, [x29, 40]
-	ldr	w0, [x29, 40]
-	tbz	x0, 13, .L292
-	ldr	w0, [x29, 40]
-	tbz	x0, 17, .L292
-.L296:
-	adrp	x19, .LANCHOR33
-	add	x19, x19, :lo12:.LANCHOR33
-	ldr	w0, [x19, 40]
-	cbz	w0, .L297
-	ldr	w1, [x29, 32]
-	ldr	w0, [x19, 32]
-	ubfx	x1, x1, 22, 5
-	add	w1, w0, w1, lsl 10
-	uxtw	x0, w0
-	bl	invalidate_dcache_range
-	ldr	w1, [x29, 32]
-	ldr	w0, [x19, 36]
-	ubfx	x1, x1, 22, 5
-	add	w1, w0, w1, lsl 7
-	uxtw	x0, w0
-	bl	invalidate_dcache_range
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbz	x0, 13, .L296
+	ldr	w0, [x29, 24]
+	tbz	x0, 17, .L296
 .L297:
-	adrp	x0, .LANCHOR33+40
-	str	wzr, [x0, #:lo12:.LANCHOR33+40]
-.L288:
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	adrp	x0, .LANCHOR34+40
+	str	wzr, [x0, #:lo12:.LANCHOR34+40]
+.L292:
+	ldp	x29, x30, [sp], 32
 	ret
-.L299:
+.L301:
 	ldr	w0, [x3, 8]
-	str	w0, [x29, 32]
-	ldr	w0, [x29, 32]
-	tbz	x0, 20, .L299
-	adrp	x0, .LANCHOR34
+	str	w0, [x29, 16]
+	ldr	w0, [x29, 16]
+	tbz	x0, 20, .L301
+	adrp	x0, .LANCHOR35
 	mov	x4, x0
-	ldr	w1, [x0, #:lo12:.LANCHOR34]
-	cbz	w1, .L300
+	ldr	w1, [x0, #:lo12:.LANCHOR35]
+	cbz	w1, .L302
 	mov	x0, x3
 	bl	NandcSendDumpDataStart
-.L300:
-	ldr	w0, [x4, #:lo12:.LANCHOR34]
+.L302:
+	ldr	w0, [x4, #:lo12:.LANCHOR35]
 	cbz	w0, .L297
 	mov	x0, x3
 	bl	NandcSendDumpDataDone
 	b	.L297
-.L311:
+.L313:
 	ldr	w0, [x3, 8]
-	str	w0, [x29, 32]
-	ldr	w0, [x29, 32]
-	tbz	x0, 20, .L311
-	b	.L288
+	str	w0, [x29, 16]
+	ldr	w0, [x29, 16]
+	tbz	x0, 20, .L313
+	b	.L292
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",@progbits
 	.align	2
@@ -1978,16 +1982,16 @@ NandcXferComp:
 Ftl_log2:
 	mov	w2, 1
 	mov	w1, 0
-.L320:
+.L322:
 	cmp	w2, w0
-	bls	.L321
+	bls	.L323
 	sub	w0, w1, #1
 	ret
-.L321:
+.L323:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L320
+	b	.L322
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",@progbits
 	.align	2
@@ -2004,25 +2008,25 @@ FtlSysBlkNumInit:
 	and	w0, w0, 65535
 	mov	w1, 24
 	cmp	w0, 24
-	adrp	x2, .LANCHOR37
+	adrp	x2, .LANCHOR38
 	csel	w0, w0, w1, cs
-	adrp	x1, .LANCHOR35
-	and	w0, w0, 65535
-	str	w0, [x1, #:lo12:.LANCHOR35]
 	adrp	x1, .LANCHOR36
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	and	w0, w0, 65535
+	str	w0, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR37
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	mul	w1, w1, w0
-	str	w1, [x2, #:lo12:.LANCHOR37]
-	adrp	x2, .LANCHOR39
-	ldrh	w2, [x2, #:lo12:.LANCHOR39]
+	str	w1, [x2, #:lo12:.LANCHOR38]
+	adrp	x2, .LANCHOR40
+	ldrh	w2, [x2, #:lo12:.LANCHOR40]
 	sub	w0, w2, w0
-	adrp	x2, .LANCHOR38
-	strh	w0, [x2, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR41
-	ldr	w0, [x0, #:lo12:.LANCHOR41]
+	adrp	x2, .LANCHOR39
+	strh	w0, [x2, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR42
+	ldr	w0, [x0, #:lo12:.LANCHOR42]
 	sub	w1, w0, w1
-	adrp	x0, .LANCHOR40
-	str	w1, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR41
+	str	w1, [x0, #:lo12:.LANCHOR41]
 	mov	w0, 0
 	ret
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
@@ -2033,45 +2037,45 @@ FtlSysBlkNumInit:
 FtlConstantsInit:
 	stp	x29, x30, [sp, -32]!
 	mov	x5, x0
-	adrp	x1, .LANCHOR44
-	adrp	x4, .LANCHOR43
+	adrp	x1, .LANCHOR45
+	adrp	x4, .LANCHOR44
 	add	x29, sp, 0
 	ldrh	w11, [x0, 8]
-	adrp	x0, .LANCHOR42
-	adrp	x6, .LANCHOR39
+	adrp	x0, .LANCHOR43
+	adrp	x6, .LANCHOR40
 	ldrh	w2, [x5, 10]
-	strh	w11, [x0, #:lo12:.LANCHOR42]
+	strh	w11, [x0, #:lo12:.LANCHOR43]
 	mov	x3, 0
 	ldrh	w0, [x5, 12]
 	ldrh	w8, [x5, 14]
-	strh	w0, [x1, #:lo12:.LANCHOR44]
-	adrp	x1, .LANCHOR45
-	add	x7, x1, :lo12:.LANCHOR45
-	strh	w2, [x4, #:lo12:.LANCHOR43]
-	strh	w8, [x6, #:lo12:.LANCHOR39]
+	strh	w0, [x1, #:lo12:.LANCHOR45]
+	adrp	x1, .LANCHOR46
+	add	x7, x1, :lo12:.LANCHOR46
+	strh	w2, [x4, #:lo12:.LANCHOR44]
+	strh	w8, [x6, #:lo12:.LANCHOR40]
 	str	x19, [sp, 16]
-.L325:
+.L327:
 	strb	w3, [x3, x7]
 	add	x3, x3, 1
 	cmp	x3, 32
-	bne	.L325
+	bne	.L327
 	ldrh	w7, [x5, 20]
 	ldrb	w3, [x5, 15]
 	cmp	w7, w3
-	bcs	.L326
+	bcs	.L328
 	and	w13, w0, 255
 	mul	w15, w0, w2
 	ubfiz	w14, w13, 1, 7
-	add	x1, x1, :lo12:.LANCHOR45
+	add	x1, x1, :lo12:.LANCHOR46
 	mov	w7, 0
-.L327:
+.L329:
 	cmp	w7, w0
-	bcs	.L329
+	bcs	.L331
 	and	w3, w7, 255
 	mov	w10, w7
 	mov	w12, 0
-	b	.L330
-.L328:
+	b	.L332
+.L330:
 	add	w16, w15, w10
 	strb	w3, [x1, w10, uxtw]
 	add	w17, w13, w3
@@ -2080,217 +2084,223 @@ FtlConstantsInit:
 	and	w3, w3, 255
 	add	w10, w10, w0
 	strb	w17, [x1, x16]
-.L330:
+.L332:
 	cmp	w12, w2
-	bcc	.L328
+	bcc	.L330
 	add	w7, w7, 1
-	b	.L327
-.L329:
+	b	.L329
+.L331:
 	ubfiz	w2, w2, 1, 15
 	lsr	w8, w8, 1
-	strh	w2, [x4, #:lo12:.LANCHOR43]
-	strh	w8, [x6, #:lo12:.LANCHOR39]
-.L326:
-	adrp	x1, .LANCHOR46
-	adrp	x13, .LANCHOR47
+	strh	w2, [x4, #:lo12:.LANCHOR44]
+	strh	w8, [x6, #:lo12:.LANCHOR40]
+.L328:
+	adrp	x1, .LANCHOR47
+	adrp	x13, .LANCHOR48
 	mov	w2, 5
 	cmp	w11, 1
-	strh	w2, [x1, #:lo12:.LANCHOR46]
-	strh	wzr, [x13, #:lo12:.LANCHOR47]
-	bne	.L331
-	strh	w11, [x1, #:lo12:.LANCHOR46]
-.L331:
-	adrp	x8, .LANCHOR48
+	strh	w2, [x1, #:lo12:.LANCHOR47]
+	strh	wzr, [x13, #:lo12:.LANCHOR48]
+	bne	.L333
+	strh	w11, [x1, #:lo12:.LANCHOR47]
+.L333:
+	adrp	x8, .LANCHOR49
 	mov	w1, 4352
-	strh	w1, [x8, #:lo12:.LANCHOR48]
+	strh	w1, [x8, #:lo12:.LANCHOR49]
 	adrp	x1, .LANCHOR1
 	ldrb	w11, [x1, #:lo12:.LANCHOR1]
-	cbz	w11, .L332
+	cbz	w11, .L334
 	mov	w1, 384
-	strh	w1, [x8, #:lo12:.LANCHOR48]
-.L332:
-	ldrh	w4, [x4, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR36
-	ldrh	w3, [x6, #:lo12:.LANCHOR39]
+	strh	w1, [x8, #:lo12:.LANCHOR49]
+.L334:
+	ldrh	w4, [x4, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR37
+	ldrh	w3, [x6, #:lo12:.LANCHOR40]
 	mul	w4, w0, w4
 	mul	w0, w0, w3
 	and	w4, w4, 65535
-	strh	w4, [x1, #:lo12:.LANCHOR36]
-	adrp	x1, .LANCHOR49
+	strh	w4, [x1, #:lo12:.LANCHOR37]
+	adrp	x1, .LANCHOR50
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR49]
+	strh	w0, [x1, #:lo12:.LANCHOR50]
 	bl	Ftl_log2
 	ldrh	w19, [x5, 16]
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR51
 	ldrh	w10, [x5, 20]
-	adrp	x7, .LANCHOR51
-	strh	w0, [x1, #:lo12:.LANCHOR50]
-	adrp	x0, .LANCHOR52
+	adrp	x7, .LANCHOR52
+	strh	w0, [x1, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR53
 	ldrh	w14, [x5, 18]
-	adrp	x15, .LANCHOR54
+	adrp	x15, .LANCHOR55
 	mul	w1, w4, w19
-	strh	w14, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR53
-	strh	w19, [x7, #:lo12:.LANCHOR51]
-	strh	w10, [x15, #:lo12:.LANCHOR54]
-	strh	w1, [x0, #:lo12:.LANCHOR53]
+	strh	w14, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR54
+	strh	w19, [x7, #:lo12:.LANCHOR52]
+	strh	w10, [x15, #:lo12:.LANCHOR55]
+	strh	w1, [x0, #:lo12:.LANCHOR54]
 	mov	w0, w10
 	bl	Ftl_log2
 	and	w12, w0, 65535
-	adrp	x6, .LANCHOR55
+	adrp	x6, .LANCHOR56
 	ubfiz	w2, w10, 9, 7
 	ldrh	w1, [x5, 26]
 	cmp	w3, 1024
-	strh	w0, [x6, #:lo12:.LANCHOR55]
-	adrp	x0, .LANCHOR56
-	strh	w2, [x0, #:lo12:.LANCHOR56]
+	strh	w0, [x6, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	ubfx	w2, w2, 8, 8
 	strh	w2, [x0, #:lo12:.LANCHOR57]
 	adrp	x0, .LANCHOR58
-	strh	w1, [x0, #:lo12:.LANCHOR58]
-	adrp	x0, .LANCHOR41
+	ubfx	w2, w2, 8, 8
+	strh	w2, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR59
+	strh	w1, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LANCHOR42
 	mul	w1, w4, w3
-	str	w1, [x0, #:lo12:.LANCHOR41]
-	bls	.L333
+	str	w1, [x0, #:lo12:.LANCHOR42]
+	bls	.L335
 	and	w0, w3, 255
-	strh	w0, [x13, #:lo12:.LANCHOR47]
-.L333:
-	ldrh	w0, [x13, #:lo12:.LANCHOR47]
-	adrp	x1, .LANCHOR59
+	strh	w0, [x13, #:lo12:.LANCHOR48]
+.L335:
+	ldrh	w0, [x13, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR60
 	sub	w0, w3, w0
 	mul	w0, w0, w4
 	mul	w0, w0, w10
 	mul	w0, w0, w19
 	asr	w0, w0, 11
-	str	w0, [x1, #:lo12:.LANCHOR59]
-	ldrh	w0, [x8, #:lo12:.LANCHOR48]
+	str	w0, [x1, #:lo12:.LANCHOR60]
+	ldrh	w0, [x8, #:lo12:.LANCHOR49]
 	mul	w1, w14, w10
-	adrp	x10, .LANCHOR60
+	adrp	x10, .LANCHOR61
 	lsl	w0, w0, 3
 	sdiv	w0, w0, w1
 	and	w0, w0, 65535
 	cmp	w0, 4
-	bls	.L334
+	bls	.L336
 .L352:
-	strh	w0, [x10, #:lo12:.LANCHOR60]
-	cbz	w11, .L336
+	strh	w0, [x10, #:lo12:.LANCHOR61]
+	cbz	w11, .L338
 	mov	w0, 640
-	strh	w0, [x8, #:lo12:.LANCHOR48]
-.L336:
-	ldrh	w0, [x8, #:lo12:.LANCHOR48]
-	adrp	x1, .LANCHOR61
+	strh	w0, [x8, #:lo12:.LANCHOR49]
+.L338:
+	ldrh	w0, [x8, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR62
 	lsl	w3, w3, 6
 	cmp	w4, 1
-	adrp	x8, .LANCHOR35
+	adrp	x8, .LANCHOR36
 	asr	w0, w0, w12
 	add	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR61]
+	strh	w0, [x1, #:lo12:.LANCHOR62]
 	add	w0, w12, 9
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR64
 	asr	w3, w3, w0
-	adrp	x0, .LANCHOR62
-	strh	w3, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR63
+	strh	w3, [x0, #:lo12:.LANCHOR63]
 	and	w3, w3, 65535
 	mul	w0, w4, w3
 	add	w3, w3, 8
-	str	w0, [x1, #:lo12:.LANCHOR63]
-	ldrh	w0, [x10, #:lo12:.LANCHOR60]
+	str	w0, [x1, #:lo12:.LANCHOR64]
+	ldrh	w0, [x10, #:lo12:.LANCHOR61]
 	udiv	w0, w0, w4
 	mov	x4, x1
 	add	w3, w0, w3
-	beq	.L337
+	beq	.L339
 .L353:
-	str	w3, [x8, #:lo12:.LANCHOR35]
-	ldrh	w0, [x8, #:lo12:.LANCHOR35]
+	str	w3, [x8, #:lo12:.LANCHOR36]
+	ldrh	w0, [x8, #:lo12:.LANCHOR36]
 	bl	FtlSysBlkNumInit
-	ldr	w1, [x8, #:lo12:.LANCHOR35]
-	adrp	x0, .LANCHOR64
+	ldr	w1, [x8, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR65
 	mov	w2, 24
-	str	w1, [x0, #:lo12:.LANCHOR64]
-	adrp	x0, .LANCHOR40
-	ldrh	w1, [x7, #:lo12:.LANCHOR51]
-	ldr	w0, [x0, #:lo12:.LANCHOR40]
+	str	w1, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR41
+	ldrh	w1, [x7, #:lo12:.LANCHOR52]
+	ldr	w0, [x0, #:lo12:.LANCHOR41]
 	lsl	w0, w0, 2
 	mul	w0, w0, w1
-	ldrh	w1, [x6, #:lo12:.LANCHOR55]
+	ldrh	w1, [x6, #:lo12:.LANCHOR56]
+	adrp	x6, .LANCHOR8
 	add	w1, w1, 9
+	ldrb	w6, [x6, #:lo12:.LANCHOR8]
 	lsr	w0, w0, w1
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR66
 	add	w0, w0, 2
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR65]
-	adrp	x1, .LANCHOR66
-	strh	w2, [x1, #:lo12:.LANCHOR66]
+	strh	w0, [x1, #:lo12:.LANCHOR66]
 	adrp	x1, .LANCHOR67
-	ldrh	w2, [x10, #:lo12:.LANCHOR60]
-	str	wzr, [x1, #:lo12:.LANCHOR67]
+	strh	w2, [x1, #:lo12:.LANCHOR67]
+	adrp	x1, .LANCHOR68
+	ldrh	w2, [x10, #:lo12:.LANCHOR61]
+	str	wzr, [x1, #:lo12:.LANCHOR68]
 	add	w1, w2, 3
-	strh	w1, [x10, #:lo12:.LANCHOR60]
-	ldr	w1, [x4, #:lo12:.LANCHOR63]
+	strh	w1, [x10, #:lo12:.LANCHOR61]
+	ldr	w1, [x4, #:lo12:.LANCHOR64]
 	add	w3, w1, 3
-	str	w3, [x4, #:lo12:.LANCHOR63]
-	adrp	x3, .LANCHOR8
-	ldrb	w3, [x3, #:lo12:.LANCHOR8]
-	cbz	w3, .L339
-	add	w2, w2, 4
+	str	w3, [x4, #:lo12:.LANCHOR64]
+	cbz	w6, .L341
 	add	w1, w1, 5
-	strh	w2, [x10, #:lo12:.LANCHOR60]
-	str	w1, [x4, #:lo12:.LANCHOR63]
-.L339:
-	adrp	x1, .LANCHOR38
-	adrp	x3, .LANCHOR68
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
-	strh	wzr, [x3, #:lo12:.LANCHOR68]
+	add	w2, w2, 4
+	strh	w2, [x10, #:lo12:.LANCHOR61]
+.L354:
+	str	w1, [x4, #:lo12:.LANCHOR64]
+.L342:
+	adrp	x1, .LANCHOR39
+	adrp	x3, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	strh	wzr, [x3, #:lo12:.LANCHOR69]
 	lsl	w2, w1, 1
 	lsr	w1, w1, 3
 	add	w2, w2, 48
 	add	w1, w1, 4
 	add	w0, w2, w0, lsl 2
 	add	w0, w0, w1
-	ldrh	w1, [x15, #:lo12:.LANCHOR54]
+	ldrh	w1, [x15, #:lo12:.LANCHOR55]
 	cmp	w0, w1, lsl 9
-	bcs	.L340
+	bcs	.L343
 	mov	w0, 1
-	strh	w0, [x3, #:lo12:.LANCHOR68]
-.L340:
+	strh	w0, [x3, #:lo12:.LANCHOR69]
+.L343:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L334:
+.L336:
 	mov	w0, 4
 	b	.L352
-.L337:
+.L339:
 	add	w3, w3, 4
 	b	.L353
+.L341:
+	cmp	w3, 7
+	bhi	.L342
+	mov	w1, 8
+	b	.L354
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",@progbits
 	.align	2
 	.global	IsBlkInVendorPart
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
-	adrp	x1, .LANCHOR69
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR69]
-	cbz	w1, .L358
-	adrp	x1, .LANCHOR60
-	ldrh	w2, [x1, #:lo12:.LANCHOR60]
 	adrp	x1, .LANCHOR70
-	ldr	x3, [x1, #:lo12:.LANCHOR70]
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
+	cbz	w1, .L359
+	adrp	x1, .LANCHOR61
+	ldrh	w2, [x1, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR71
+	ldr	x3, [x1, #:lo12:.LANCHOR71]
 	mov	x1, 0
-.L356:
+.L357:
 	cmp	w2, w1, uxth
-	bhi	.L357
-.L358:
+	bhi	.L358
+.L359:
 	mov	w0, 0
 	ret
-.L357:
+.L358:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L356
+	bne	.L357
 	mov	w0, 1
 	ret
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -2299,8 +2309,8 @@ IsBlkInVendorPart:
 	.global	FtlGetCap
 	.type	FtlGetCap, %function
 FtlGetCap:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",@progbits
@@ -2308,8 +2318,8 @@ FtlGetCap:
 	.global	FtlGetCapacity
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",@progbits
@@ -2317,8 +2327,8 @@ FtlGetCapacity:
 	.global	ftl_get_density
 	.type	ftl_get_density, %function
 ftl_get_density:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",@progbits
@@ -2326,8 +2336,8 @@ ftl_get_density:
 	.global	FtlGetLpn
 	.type	FtlGetLpn, %function
 FtlGetLpn:
-	adrp	x0, .LANCHOR71
-	ldr	w0, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR72
+	ldr	w0, [x0, #:lo12:.LANCHOR72]
 	ret
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
@@ -2335,10 +2345,10 @@ FtlGetLpn:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR36
-	ldrh	w1, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR72
-	ldr	w0, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR37
+	ldrh	w1, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR73
+	ldr	w0, [x0, #:lo12:.LANCHOR73]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
@@ -2347,10 +2357,10 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR39
-	ldrh	w1, [x0, #:lo12:.LANCHOR39]
-	adrp	x0, .LANCHOR36
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR40
+	ldrh	w1, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	mul	w0, w1, w0
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -2361,13 +2371,13 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	stp	x29, x30, [sp, -32]!
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR49
+	adrp	x0, .LANCHOR50
 	mov	w4, 1
 	add	x29, sp, 0
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR73
-	add	x19, x19, :lo12:.LANCHOR73
+	adrp	x19, .LANCHOR74
+	add	x19, x19, :lo12:.LANCHOR74
 	udiv	w3, w1, w0
 	and	w2, w3, 65535
 	msub	w3, w3, w0, w1
@@ -2397,13 +2407,13 @@ FtlBbmMapBadBlock:
 	.global	FtlBbmIsBadBlock
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
-	adrp	x1, .LANCHOR49
+	adrp	x1, .LANCHOR50
 	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR49]
+	ldrh	w1, [x1, #:lo12:.LANCHOR50]
 	udiv	w2, w0, w1
 	msub	w0, w2, w1, w0
-	adrp	x1, .LANCHOR73
-	add	x1, x1, :lo12:.LANCHOR73
+	adrp	x1, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR74
 	add	x2, x1, x2, uxth 3
 	and	w0, w0, 65535
 	ubfx	x3, x0, 5, 11
@@ -2426,12 +2436,12 @@ FtlBbtInfoPrint:
 	.global	V2P_block
 	.type	V2P_block, %function
 V2P_block:
-	adrp	x2, .LANCHOR44
+	adrp	x2, .LANCHOR45
 	and	w0, w0, 65535
-	adrp	x4, .LANCHOR49
+	adrp	x4, .LANCHOR50
 	and	w1, w1, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR44]
-	ldrh	w4, [x4, #:lo12:.LANCHOR49]
+	ldrh	w2, [x2, #:lo12:.LANCHOR45]
+	ldrh	w4, [x4, #:lo12:.LANCHOR50]
 	udiv	w3, w0, w2
 	msub	w0, w3, w2, w0
 	madd	w2, w2, w1, w0
@@ -2444,10 +2454,10 @@ V2P_block:
 	.type	P2V_plane, %function
 P2V_plane:
 	and	w3, w0, 65535
-	adrp	x0, .LANCHOR44
-	ldrh	w1, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR49
-	ldrh	w2, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR45
+	ldrh	w1, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR50
+	ldrh	w2, [x0, #:lo12:.LANCHOR50]
 	udiv	w0, w3, w1
 	udiv	w2, w3, w2
 	msub	w0, w0, w1, w3
@@ -2460,12 +2470,12 @@ P2V_plane:
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	and	w2, w0, 65535
-	adrp	x0, .LANCHOR49
-	ldrh	w1, [x0, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
+	ldrh	w1, [x0, #:lo12:.LANCHOR50]
 	udiv	w0, w2, w1
 	msub	w0, w0, w1, w2
-	adrp	x1, .LANCHOR44
-	ldrh	w1, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	ldrh	w1, [x1, #:lo12:.LANCHOR45]
 	and	w0, w0, 65535
 	udiv	w0, w0, w1
 	ret
@@ -2477,12 +2487,12 @@ P2V_block_in_plane:
 ftl_cmp_data_ver:
 	cmp	w0, w1
 	mov	w2, -2147483648
-	bls	.L374
+	bls	.L375
 	sub	w1, w0, w1
 	cmp	w1, w2
 	cset	w0, ls
 	ret
-.L374:
+.L375:
 	sub	w1, w1, w0
 	cmp	w1, w2
 	cset	w0, hi
@@ -2493,8 +2503,8 @@ ftl_cmp_data_ver:
 	.global	FtlFreeSysBlkQueueEmpty
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
-	adrp	x0, .LANCHOR74+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 0
 	cset	w0, eq
 	ret
@@ -2504,8 +2514,8 @@ FtlFreeSysBlkQueueEmpty:
 	.global	FtlFreeSysBlkQueueFull
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
-	adrp	x0, .LANCHOR74+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	adrp	x0, .LANCHOR75+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR75+6]
 	cmp	w0, 1024
 	cset	w0, eq
 	ret
@@ -2519,40 +2529,40 @@ FtlFreeSysBlkQueueIn:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 65535
-	adrp	x0, .LANCHOR74
-	add	x2, x0, :lo12:.LANCHOR74
+	adrp	x0, .LANCHOR75
+	add	x2, x0, :lo12:.LANCHOR75
 	stp	x19, x20, [sp, 16]
 	ldrh	w2, [x2, 6]
 	cmp	w2, 1024
-	beq	.L378
+	beq	.L379
 	and	w1, w1, 65535
 	mov	x19, x0
-	cbz	w1, .L380
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L380
+	cbz	w1, .L381
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L381
 	mov	w0, w21
 	bl	P2V_block_in_plane
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	lsl	w1, w21, 10
 	mov	w2, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x0, 4]
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR78
-	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR78]
-.L380:
-	add	x0, x19, :lo12:.LANCHOR74
+	str	w0, [x1, #:lo12:.LANCHOR79]
+.L381:
+	add	x0, x19, :lo12:.LANCHOR75
 	ldrh	w1, [x0, 6]
 	add	w1, w1, 1
 	strh	w1, [x0, 6]
@@ -2562,7 +2572,7 @@ FtlFreeSysBlkQueueIn:
 	and	w1, w1, 1023
 	strh	w1, [x0, 4]
 	strh	w21, [x2, 8]
-.L378:
+.L379:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -2573,77 +2583,37 @@ FtlFreeSysBlkQueueIn:
 	.global	FtlFreeSysBLkSort
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR74
-	adrp	x1, .LANCHOR79
-	add	x0, x2, :lo12:.LANCHOR74
-	add	x29, sp, 0
-	ldr	x3, [x1, #:lo12:.LANCHOR79]
-	adrp	x1, .LANCHOR77
-	ldrh	w8, [x0, 2]
-	mov	x4, x2
-	ldrh	w7, [x0, 6]
-	mov	x6, x0
-	ldr	x10, [x1, #:lo12:.LANCHOR77]
-	and	x11, x8, 65535
-	mov	x5, 0
+	adrp	x0, .LANCHOR80+28
+	mov	w6, 0
+	mov	w4, 0
+	ldrh	w5, [x0, #:lo12:.LANCHOR80+28]
+	adrp	x0, .LANCHOR75
+	add	x3, x0, :lo12:.LANCHOR75
+	and	w5, w5, 31
+	ldrh	w2, [x3, 2]
+	ldrh	w1, [x3, 4]
+.L390:
+	cmp	w5, w4
+	bgt	.L391
+	cbz	w6, .L389
+	add	x0, x0, :lo12:.LANCHOR75
+	strh	w2, [x0, 2]
+	strh	w1, [x0, 4]
 .L389:
-	cmp	w7, w5, uxth
-	bhi	.L390
-	sub	w10, w7, #1
-	add	x2, x4, :lo12:.LANCHOR74
-	mov	w0, 0
-.L391:
-	cmp	w0, w10
-	blt	.L396
-	ldp	x29, x30, [sp], 16
 	ret
-.L390:
-	add	x0, x11, x5
-	add	x0, x6, x0, lsl 1
-	ldrh	w0, [x0, 8]
-	bl	P2V_block_in_plane
-	ubfiz	x0, x0, 1, 16
-	ldrh	w0, [x10, x0]
-	str	w0, [x3, x5, lsl 2]
-	add	x5, x5, 1
-	b	.L389
-.L396:
-	add	w5, w0, 1
-	mov	w1, w0
-	and	w5, w5, 65535
-	mov	w4, w5
-.L392:
-	cmp	w4, w7
-	bcc	.L394
-	cmp	w0, w1
-	beq	.L395
-	ubfiz	x4, x0, 2, 16
-	ubfiz	x6, x1, 2, 32
-	add	w0, w8, w0
-	add	w1, w1, w8
-	add	x0, x2, x0, sxtw 1
-	add	x1, x2, x1, sxtw 1
-	ldr	w12, [x3, x4]
-	ldr	w11, [x3, x6]
-	str	w12, [x3, x6]
-	str	w11, [x3, x4]
-	ldrh	w6, [x0, 8]
-	ldrh	w4, [x1, 8]
-	strh	w6, [x1, 8]
-	strh	w4, [x0, 8]
-.L395:
-	mov	w0, w5
-	b	.L391
-.L394:
-	ubfiz	x6, x4, 2, 16
-	ldr	w11, [x3, w1, uxtw 2]
-	ldr	w6, [x3, x6]
-	cmp	w11, w6
-	csel	w1, w1, w4, ls
+.L391:
+	add	x6, x3, x2, sxtw 1
 	add	w4, w4, 1
+	add	w2, w2, 1
 	and	w4, w4, 65535
-	b	.L392
+	and	w2, w2, 1023
+	ldrh	w7, [x6, 8]
+	add	x6, x3, x1, sxtw 1
+	strh	w7, [x6, 8]
+	mov	w6, 1
+	add	w1, w1, w6
+	and	w1, w1, 1023
+	b	.L390
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.remove_from_free_sys_Queue,"ax",@progbits
 	.align	2
@@ -2653,26 +2623,26 @@ remove_from_free_sys_Queue:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR74
-	add	x19, x19, :lo12:.LANCHOR74
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
 	ldrh	w3, [x19, 6]
-	cbz	w3, .L403
+	cbz	w3, .L401
 	and	w1, w0, 65535
 	ldrh	w0, [x19, 2]
 	mov	w20, 0
-.L400:
+.L398:
 	cmp	w20, w3
-	bcc	.L402
-.L403:
+	bcc	.L400
+.L401:
 	mov	w0, 0
-	b	.L398
-.L402:
+	b	.L396
+.L400:
 	add	w2, w20, w0
 	ubfiz	x2, x2, 1, 10
 	add	x2, x19, x2
 	ldrh	w2, [x2, 8]
 	cmp	w2, w1
-	bne	.L401
+	bne	.L399
 	adrp	x0, .LC3
 	add	x0, x0, :lo12:.LC3
 	bl	printf
@@ -2690,45 +2660,49 @@ remove_from_free_sys_Queue:
 	strh	w1, [x20, 8]
 	strh	w0, [x19, 6]
 	mov	w0, 1
-.L398:
+.L396:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L401:
+.L399:
 	add	w20, w20, 1
-	b	.L400
+	b	.L398
 	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
 	.align	2
 	.global	FtlFreeSysBlkQueueOut
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
-	adrp	x0, .LANCHOR74
-	add	x0, x0, :lo12:.LANCHOR74
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	ldrh	w2, [x0, 6]
 	stp	x19, x20, [sp, 16]
-	str	x21, [sp, 32]
-	cbz	w2, .L408
-	ldrh	w1, [x0, 2]
-	sub	w2, w2, #1
-	strh	w2, [x0, 6]
-	add	x3, x0, x1, sxtw 1
-	add	w1, w1, 1
-	and	w1, w1, 1023
-	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR75
-	ldrh	w19, [x3, 8]
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	adrp	x19, .LANCHOR75
+	add	x19, x19, :lo12:.LANCHOR75
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR76
+	mov	x23, x19
+	add	x22, x22, :lo12:.LANCHOR76
+.L404:
+	ldrh	w1, [x19, 6]
+	cbz	w1, .L405
+	ldrh	w0, [x19, 2]
+	sub	w1, w1, #1
+	strh	w1, [x19, 6]
+	add	x2, x19, x0, sxtw 1
+	add	w0, w0, 1
+	and	w0, w0, 1023
+	strh	w0, [x19, 2]
+	ldr	w0, [x22]
+	ldrh	w20, [x2, 8]
 	cbnz	w0, .L406
-	mov	w0, w19
+	mov	w0, w20
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR76
-	and	w20, w0, 65535
-	lsl	w2, w19, 10
-	mov	x21, x1
-	ldr	x0, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR77
+	and	w21, w0, 65535
+	lsl	w2, w20, 10
+	mov	x24, x1
+	ldr	x0, [x1, #:lo12:.LANCHOR77]
 	str	w2, [x0, 4]
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
@@ -2737,63 +2711,76 @@ FtlFreeSysBlkQueueOut:
 	mov	w1, 0
 	bl	FlashEraseBlocks
 .L407:
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashEraseBlocks
-	adrp	x1, .LANCHOR77
-	ubfiz	x0, x20, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR78
+	ubfiz	x0, x21, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	adrp	x1, .LANCHOR78
-	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR79
+	ldr	w0, [x1, #:lo12:.LANCHOR79]
 	add	w0, w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR78]
+	str	w0, [x1, #:lo12:.LANCHOR79]
 .L406:
-	mov	w0, w19
-	ldr	x21, [sp, 32]
+	cbnz	w20, .L409
+	ldrh	w2, [x23, 6]
+	mov	w1, 0
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+	b	.L404
+.L405:
+	adrp	x0, .LC4
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.L408:
+	b	.L408
+.L409:
+	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L408:
-	mov	w19, 65535
-	b	.L406
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",@progbits
 	.align	2
 	.global	insert_data_list
 	.type	insert_data_list, %function
 insert_data_list:
-	adrp	x1, .LANCHOR38
+	adrp	x1, .LANCHOR39
 	and	w0, w0, 65535
-	ldrh	w14, [x1, #:lo12:.LANCHOR38]
+	ldrh	w14, [x1, #:lo12:.LANCHOR39]
 	cmp	w14, w0
-	bls	.L429
-	adrp	x1, .LANCHOR80
+	bls	.L430
+	adrp	x1, .LANCHOR81
 	mov	w3, 6
-	ldr	x6, [x1, #:lo12:.LANCHOR80]
+	ldr	x6, [x1, #:lo12:.LANCHOR81]
 	umull	x13, w0, w3
 	mov	w1, -1
 	add	x5, x6, x13
 	strh	w1, [x5, 2]
 	strh	w1, [x6, x13]
-	adrp	x1, .LANCHOR81
+	adrp	x1, .LANCHOR82
 	mov	x15, x1
-	ldr	x12, [x1, #:lo12:.LANCHOR81]
-	cbnz	x12, .L416
-	str	x5, [x1, #:lo12:.LANCHOR81]
-.L429:
+	ldr	x12, [x1, #:lo12:.LANCHOR82]
+	cbnz	x12, .L417
+	str	x5, [x1, #:lo12:.LANCHOR82]
+.L430:
 	mov	w0, 0
 	ret
-.L416:
+.L417:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ubfiz	x2, x0, 1, 16
 	mov	x4, -6148914691236517206
 	add	x29, sp, 0
-	ldr	x16, [x1, #:lo12:.LANCHOR82]
+	ldr	x16, [x1, #:lo12:.LANCHOR83]
 	movk	x4, 0xaaab, lsl 0
 	ldrh	w1, [x5, 4]
 	mov	w8, -1
@@ -2808,19 +2795,19 @@ insert_data_list:
 	csel	w7, w7, w8, ne
 	mov	w8, w3
 	mul	x1, x1, x4
-	adrp	x4, .LANCHOR77
-	ldr	x17, [x4, #:lo12:.LANCHOR77]
+	adrp	x4, .LANCHOR78
+	ldr	x17, [x4, #:lo12:.LANCHOR78]
 	and	w1, w1, 65535
 	mov	x4, x12
 	add	x10, x17, x2
 	mov	w2, 0
-.L424:
+.L425:
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	cmp	w14, w2
-	bcc	.L415
+	bcc	.L416
 	cmp	w1, w0
-	beq	.L415
+	beq	.L416
 	ubfiz	x30, x1, 1, 16
 	ldrh	w19, [x4, 4]
 	cmp	w19, 0
@@ -2828,46 +2815,46 @@ insert_data_list:
 	mul	w3, w3, w19
 	csel	w3, w3, w11, ne
 	cmp	w7, w3
-	bne	.L420
+	bne	.L421
 	ldrh	w19, [x17, x30]
 	ldrh	w3, [x10]
 	cmp	w19, w3
-	bcc	.L422
-.L421:
+	bcc	.L423
+.L422:
 	strh	w1, [x6, x13]
 	cmp	x4, x12
 	ldrh	w1, [x4, 2]
 	strh	w1, [x5, 2]
-	bne	.L425
+	bne	.L426
 	strh	w0, [x4, 2]
-	str	x5, [x15, #:lo12:.LANCHOR81]
-	b	.L415
-.L420:
-	bcc	.L421
-.L422:
+	str	x5, [x15, #:lo12:.LANCHOR82]
+	b	.L416
+.L421:
+	bcc	.L422
+.L423:
 	ldrh	w3, [x4]
 	cmp	w3, w20
-	bne	.L423
+	bne	.L424
 	strh	w1, [x5, 2]
 	strh	w0, [x4]
-	adrp	x0, .LANCHOR83
-	str	x5, [x0, #:lo12:.LANCHOR83]
-.L415:
+	adrp	x0, .LANCHOR84
+	str	x5, [x0, #:lo12:.LANCHOR84]
+.L416:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L423:
+.L424:
 	umaddl	x4, w3, w8, x6
 	mov	w1, w3
-	b	.L424
-.L425:
+	b	.L425
+.L426:
 	ldrh	w1, [x4, 2]
 	mov	w2, 6
 	umull	x1, w1, w2
 	strh	w0, [x6, x1]
 	strh	w0, [x4, 2]
-	b	.L415
+	b	.L416
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",@progbits
 	.align	2
@@ -2877,28 +2864,28 @@ INSERT_DATA_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_data_list
-	adrp	x1, .LANCHOR84
-	ldrh	w0, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR85
+	ldrh	w0, [x1, #:lo12:.LANCHOR85]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR84]
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	strh	w0, [x1, #:lo12:.LANCHOR85]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	cmp	w1, w0
-	bcs	.L431
-	mov	w2, 205
-	adrp	x1, .LANCHOR85
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR85
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC5
+	bcs	.L432
+	mov	w2, 228
+	adrp	x1, .LANCHOR86
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	b	printf
-.L431:
+.L432:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -2910,28 +2897,28 @@ insert_free_list:
 	and	w0, w0, 65535
 	mov	w7, 65535
 	cmp	w0, w7
-	beq	.L435
-	adrp	x1, .LANCHOR80
+	beq	.L436
+	adrp	x1, .LANCHOR81
 	mov	w6, 6
-	ldr	x3, [x1, #:lo12:.LANCHOR80]
+	ldr	x3, [x1, #:lo12:.LANCHOR81]
 	umull	x8, w0, w6
 	mov	w1, -1
 	add	x4, x3, x8
 	strh	w1, [x4, 2]
 	strh	w1, [x3, x8]
-	adrp	x1, .LANCHOR86
+	adrp	x1, .LANCHOR87
 	mov	x12, x1
-	ldr	x5, [x1, #:lo12:.LANCHOR86]
-	cbnz	x5, .L436
-	str	x4, [x1, #:lo12:.LANCHOR86]
-.L435:
+	ldr	x5, [x1, #:lo12:.LANCHOR87]
+	cbnz	x5, .L437
+	str	x4, [x1, #:lo12:.LANCHOR87]
+.L436:
 	mov	w0, 0
 	ret
-.L436:
-	adrp	x1, .LANCHOR77
+.L437:
+	adrp	x1, .LANCHOR78
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	ldr	x11, [x1, #:lo12:.LANCHOR77]
+	ldr	x11, [x1, #:lo12:.LANCHOR78]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w13, [x11, x1]
 	sub	x1, x5, x3
@@ -2939,37 +2926,37 @@ insert_free_list:
 	mul	x1, x1, x2
 	mov	x2, x5
 	and	w1, w1, 65535
-.L439:
+.L440:
 	ubfiz	x10, x1, 1, 16
 	ldrh	w10, [x11, x10]
 	cmp	w10, w13
-	bcs	.L437
+	bcs	.L438
 	ldrh	w10, [x2]
 	cmp	w10, w7
-	bne	.L438
+	bne	.L439
 	strh	w1, [x4, 2]
 	strh	w0, [x2]
-	b	.L435
-.L438:
+	b	.L436
+.L439:
 	umaddl	x2, w10, w6, x3
 	mov	w1, w10
-	b	.L439
-.L437:
+	b	.L440
+.L438:
 	ldrh	w6, [x2, 2]
 	cmp	x2, x5
 	strh	w6, [x4, 2]
 	strh	w1, [x3, x8]
-	bne	.L440
+	bne	.L441
 	strh	w0, [x2, 2]
-	str	x4, [x12, #:lo12:.LANCHOR86]
-	b	.L435
-.L440:
+	str	x4, [x12, #:lo12:.LANCHOR87]
+	b	.L436
+.L441:
 	ldrh	w1, [x2, 2]
 	mov	w4, 6
 	umull	x1, w1, w4
 	strh	w0, [x3, x1]
 	strh	w0, [x2, 2]
-	b	.L435
+	b	.L436
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",@progbits
 	.align	2
@@ -2979,28 +2966,28 @@ INSERT_FREE_LIST:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	insert_free_list
-	adrp	x1, .LANCHOR87
-	ldrh	w0, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR88
+	ldrh	w0, [x1, #:lo12:.LANCHOR88]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x1, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	strh	w0, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	cmp	w1, w0
-	bcs	.L441
-	mov	w2, 198
-	adrp	x1, .LANCHOR88
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR88
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	ldp	x29, x30, [sp], 16
-	adrp	x1, .LC5
+	bcs	.L442
+	mov	w2, 221
+	adrp	x1, .LANCHOR89
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	b	printf
-.L441:
+.L442:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -3013,42 +3000,42 @@ List_remove_node:
 	and	w1, w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR80
+	adrp	x20, .LANCHOR81
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	mov	w0, 6
 	str	x23, [sp, 48]
-	ldr	x23, [x20, #:lo12:.LANCHOR80]
+	ldr	x23, [x20, #:lo12:.LANCHOR81]
 	umull	x21, w1, w0
 	mov	w0, 65535
 	add	x19, x23, x21
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bne	.L445
+	bne	.L446
 	ldr	x0, [x22]
 	cmp	x19, x0
-	beq	.L445
-	mov	w2, 363
-	adrp	x1, .LANCHOR89
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR89
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	beq	.L446
+	mov	w2, 386
+	adrp	x1, .LANCHOR90
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR90
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L445:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L446:
 	ldr	x0, [x22]
 	mov	w1, 65535
 	cmp	x19, x0
 	ldrh	w0, [x23, x21]
-	bne	.L446
-	cmp	w0, w1
 	bne	.L447
+	cmp	w0, w1
+	bne	.L448
 	str	xzr, [x22]
-.L448:
+.L449:
 	mov	w0, -1
 	strh	w0, [x23, x21]
 	strh	w0, [x19, 2]
@@ -3058,35 +3045,35 @@ List_remove_node:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L447:
-	ldr	x1, [x20, #:lo12:.LANCHOR80]
+.L448:
+	ldr	x1, [x20, #:lo12:.LANCHOR81]
 	mov	w2, 6
 	umaddl	x0, w0, w2, x1
 	mov	w1, -1
 	str	x0, [x22]
 	strh	w1, [x0, 2]
-	b	.L448
-.L446:
+	b	.L449
+.L447:
 	cmp	w0, w1
 	ldrh	w1, [x19, 2]
-	bne	.L449
+	bne	.L450
 	cmp	w1, w0
-	beq	.L448
+	beq	.L449
 	mov	w0, 6
 	mov	w2, -1
 	umull	x1, w1, w0
-	ldr	x0, [x20, #:lo12:.LANCHOR80]
+	ldr	x0, [x20, #:lo12:.LANCHOR81]
 	strh	w2, [x0, x1]
-	b	.L448
-.L449:
-	ldr	x2, [x20, #:lo12:.LANCHOR80]
+	b	.L449
+.L450:
+	ldr	x2, [x20, #:lo12:.LANCHOR81]
 	mov	w3, 6
 	umaddl	x4, w0, w3, x2
 	strh	w1, [x4, 2]
 	ldrh	w1, [x19, 2]
 	umull	x1, w1, w3
 	strh	w0, [x2, x1]
-	b	.L448
+	b	.L449
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",@progbits
 	.align	2
@@ -3094,18 +3081,18 @@ List_remove_node:
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	ldr	x2, [x0]
-	cbz	x2, .L457
+	cbz	x2, .L458
 	stp	x29, x30, [sp, -32]!
-	adrp	x3, .LANCHOR80
+	adrp	x3, .LANCHOR81
 	and	w1, w1, 65535
 	mov	w4, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	w5, 6
-	ldr	x19, [x3, #:lo12:.LANCHOR80]
-.L453:
-	cbnz	w1, .L454
-.L456:
+	ldr	x19, [x3, #:lo12:.LANCHOR81]
+.L454:
+	cbnz	w1, .L455
+.L457:
 	sub	x19, x2, x19
 	mov	x2, -6148914691236517206
 	asr	x19, x19, 1
@@ -3118,15 +3105,15 @@ List_pop_index_node:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L454:
+.L455:
 	ldrh	w3, [x2]
 	cmp	w3, w4
-	beq	.L456
+	beq	.L457
 	sub	w1, w1, #1
 	umaddl	x2, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L453
-.L457:
+	b	.L454
+.L458:
 	mov	w0, 65535
 	ret
 	.size	List_pop_index_node, .-List_pop_index_node
@@ -3136,28 +3123,28 @@ List_pop_index_node:
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	and	w2, w0, 65535
+	adrp	x0, .LANCHOR82
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	cbz	x1, .L468
 	adrp	x0, .LANCHOR81
-	ldr	x1, [x0, #:lo12:.LANCHOR81]
-	cbz	x1, .L467
-	adrp	x0, .LANCHOR80
 	mov	w4, 6
-	ldr	x3, [x0, #:lo12:.LANCHOR80]
+	ldr	x3, [x0, #:lo12:.LANCHOR81]
 	mov	w0, 65535
-.L464:
-	cbz	w2, .L465
+.L465:
+	cbz	w2, .L466
 	ldrh	w1, [x1]
 	cmp	w1, w0
-	bne	.L466
+	bne	.L467
 	ret
-.L466:
+.L467:
 	sub	w2, w2, #1
 	umaddl	x1, w1, w4, x3
 	and	w2, w2, 65535
-	b	.L464
-.L467:
+	b	.L465
+.L468:
 	mov	w0, 65535
 	ret
-.L465:
+.L466:
 	sub	x0, x1, x3
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -3175,108 +3162,107 @@ List_update_data_list:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR90
+	adrp	x0, .LANCHOR91
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	stp	x25, x26, [sp, 64]
-	cmp	w0, w19
-	beq	.L470
-	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	stp	x25, x26, [sp, 64]
 	cmp	w0, w19
-	beq	.L470
+	beq	.L471
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	beq	.L470
-	adrp	x1, .LANCHOR80
-	mov	w21, 6
+	beq	.L471
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w0, w19
+	beq	.L471
 	adrp	x0, .LANCHOR81
-	mov	x26, x1
+	mov	w21, 6
+	adrp	x24, .LANCHOR82
+	mov	x26, x0
 	umull	x21, w19, w21
-	ldr	x23, [x1, #:lo12:.LANCHOR80]
-	ldr	x2, [x0, #:lo12:.LANCHOR81]
-	mov	x25, x0
+	ldr	x23, [x0, #:lo12:.LANCHOR81]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
 	add	x22, x23, x21
-	cmp	x22, x2
-	beq	.L470
-	adrp	x1, .LANCHOR82
+	cmp	x22, x1
+	beq	.L471
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x19, 1, 16
-	mov	x24, x1
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	mov	x25, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	mov	w1, 65535
 	ldrh	w20, [x2, x0]
 	ldrh	w0, [x22, 4]
+	cmp	w0, 0
 	mul	w20, w20, w0
 	ldrh	w0, [x22, 2]
-	cmp	w20, 0
 	csinv	w20, w20, wzr, ne
 	cmp	w0, w1
-	bne	.L473
+	bne	.L474
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	bne	.L473
-	mov	w2, 481
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bne	.L474
+	mov	w2, 504
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L473:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L474:
 	ldrh	w0, [x22, 2]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L474
+	bne	.L475
 	ldrh	w1, [x23, x21]
 	cmp	w1, w0
-	beq	.L470
-.L474:
+	beq	.L471
+.L475:
 	mov	w1, 6
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
-	umull	x1, w0, w1
-	asr	x0, x1, 1
-	mul	x0, x0, x2
-	ldr	x2, [x24, #:lo12:.LANCHOR82]
-	ldrh	w0, [x2, x0, lsl 1]
-	ldr	x2, [x26, #:lo12:.LANCHOR80]
-	add	x1, x2, x1
-	ldrh	w1, [x1, 4]
-	mul	w0, w0, w1
-	cmp	w0, 0
+	umull	x0, w0, w1
+	asr	x1, x0, 1
+	mul	x1, x1, x2
+	ldr	x2, [x25, #:lo12:.LANCHOR83]
+	ldrh	w1, [x2, x1, lsl 1]
+	ldr	x2, [x26, #:lo12:.LANCHOR81]
+	add	x0, x2, x0
+	ldrh	w2, [x0, 4]
+	cmp	w2, 0
+	mul	w0, w1, w2
 	csinv	w0, w0, wzr, ne
 	cmp	w20, w0
-	bcs	.L470
-	adrp	x20, .LANCHOR84
+	bcs	.L471
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	add	x0, x25, :lo12:.LANCHOR81
+	add	x0, x24, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
-	cbnz	w0, .L476
-	mov	w2, 492
-	adrp	x1, .LANCHOR93
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR93
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L477
+	mov	w2, 515
+	adrp	x1, .LANCHOR94
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR94
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L476:
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L477:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR84]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-.L470:
+.L471:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3298,30 +3284,27 @@ ftl_map_blk_alloc_new_blk:
 	mov	w20, 0
 	ldr	x0, [x0, 16]
 	str	x21, [sp, 32]
-.L479:
-	cmp	w20, w1
-	bne	.L482
-.L483:
-	mov	w2, 594
-	adrp	x1, .LANCHOR94
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR94
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-	b	.L484
 .L482:
+	cmp	w20, w1
+	beq	.L486
 	mov	x21, x0
 	ldrh	w2, [x0], 2
-	cbnz	w2, .L480
+	cbnz	w2, .L483
 	bl	FtlFreeSysBlkQueueOut
+	and	w1, w0, 65535
 	strh	w0, [x21]
-	tst	w0, 65535
-	beq	.L481
+	sub	w2, w1, #1
+	mov	w0, 65533
+	cmp	w0, w2, uxth
+	bcs	.L484
+	adrp	x0, .LANCHOR75+6
+	ldrh	w2, [x0, #:lo12:.LANCHOR75+6]
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+.L485:
+	b	.L485
+.L484:
 	ldr	w0, [x19, 48]
 	strh	wzr, [x19, 2]
 	add	w0, w0, 1
@@ -3330,20 +3313,31 @@ ftl_map_blk_alloc_new_blk:
 	strh	w20, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
-.L481:
+.L486:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bls	.L483
-.L484:
+	bhi	.L488
+	mov	w2, 627
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L488:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L480:
+.L483:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L479
+	b	.L482
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",@progbits
 	.align	2
@@ -3351,128 +3345,128 @@ ftl_map_blk_alloc_new_blk:
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR66
+	adrp	x0, .LANCHOR67
 	mov	x1, 0
 	mov	w3, 65535
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR66]
-	adrp	x0, .LANCHOR95
+	ldrh	w2, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR96
 	str	x19, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR95]
-.L490:
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
+.L491:
 	and	w19, w1, 65535
 	cmp	w19, w2
-	bcc	.L492
+	bcc	.L493
 	add	x3, x0, 4
 	mov	w19, w2
 	mov	w5, -2147483648
 	mov	w1, 0
-.L493:
+.L494:
 	cmp	w1, w2
-	bne	.L495
+	bne	.L496
 	cmp	w19, w2
-	bcc	.L491
-	adrp	x1, .LANCHOR96
+	bcc	.L492
+	adrp	x1, .LANCHOR97
 	mov	w19, w2
 	mov	w3, -1
-	ldrh	w4, [x1, #:lo12:.LANCHOR96]
+	ldrh	w4, [x1, #:lo12:.LANCHOR97]
 	mov	w1, 0
-.L496:
+.L497:
 	cmp	w1, w2
-	bne	.L498
+	bne	.L499
 	cmp	w19, w1
-	bcc	.L491
-	mov	w2, 826
-	adrp	x1, .LANCHOR97
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR97
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bcc	.L492
+	mov	w2, 859
+	adrp	x1, .LANCHOR98
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR98
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L491
-.L492:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L492
+.L493:
 	add	x1, x1, 1
 	add	x4, x0, x1, lsl 4
 	ldrh	w4, [x4, -16]
 	cmp	w4, w3
-	bne	.L490
-.L491:
+	bne	.L491
+.L492:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L495:
+.L496:
 	ldr	w4, [x3]
-	tbnz	w4, #31, .L494
+	tbnz	w4, #31, .L495
 	cmp	w5, w4
-	bls	.L494
+	bls	.L495
 	mov	w5, w4
 	mov	w19, w1
-.L494:
+.L495:
 	add	w1, w1, 1
 	add	x3, x3, 16
 	and	w1, w1, 65535
-	b	.L493
-.L498:
+	b	.L494
+.L499:
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bls	.L497
+	bls	.L498
 	ldrh	w5, [x0]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w19, w19, w1, eq
-.L497:
+.L498:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
-	b	.L496
+	b	.L497
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
 	.align	2
 	.global	FtlUpdateVaildLpn
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
-	adrp	x2, .LANCHOR98
+	adrp	x2, .LANCHOR99
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR98]
+	ldrh	w1, [x2, #:lo12:.LANCHOR99]
 	cmp	w1, 4
-	bhi	.L501
-	cbnz	w0, .L501
+	bhi	.L502
+	cbnz	w0, .L502
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR98]
+	strh	w1, [x2, #:lo12:.LANCHOR99]
 	ret
-.L501:
-	adrp	x1, .LANCHOR38
-	adrp	x0, .LANCHOR99
-	strh	wzr, [x3, #:lo12:.LANCHOR98]
+.L502:
+	adrp	x1, .LANCHOR39
+	adrp	x0, .LANCHOR100
+	strh	wzr, [x3, #:lo12:.LANCHOR99]
 	mov	w2, 0
-	ldrh	w5, [x1, #:lo12:.LANCHOR38]
-	adrp	x1, .LANCHOR82
-	str	wzr, [x0, #:lo12:.LANCHOR99]
+	ldrh	w5, [x1, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR83
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	mov	w3, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR82]
+	ldr	x6, [x1, #:lo12:.LANCHOR83]
 	mov	w7, 65535
 	mov	x1, 0
-.L502:
+.L503:
 	cmp	w5, w1, uxth
-	bhi	.L504
-	cbz	w3, .L500
-	str	w2, [x0, #:lo12:.LANCHOR99]
-.L500:
+	bhi	.L505
+	cbz	w3, .L501
+	str	w2, [x0, #:lo12:.LANCHOR100]
+.L501:
 	ret
-.L504:
+.L505:
 	ldrh	w4, [x6, x1, lsl 1]
 	cmp	w4, w7
-	beq	.L503
+	beq	.L504
 	add	w2, w2, w4
 	mov	w3, 1
-.L503:
+.L504:
 	add	x1, x1, 1
-	b	.L502
+	b	.L503
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",@progbits
 	.align	2
@@ -3480,9 +3474,9 @@ FtlUpdateVaildLpn:
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	and	w0, w0, 65535
-	cbz	w1, .L511
+	cbz	w1, .L512
 	b	ftl_set_blk_mode.part.9
-.L511:
+.L512:
 	adrp	x1, .LANCHOR0
 	ubfx	x2, x0, 5, 11
 	lsl	x2, x2, 2
@@ -3518,51 +3512,51 @@ ftl_sb_update_avl_pages:
 	and	w2, w2, 65535
 	and	w6, w1, 65535
 	ubfiz	x4, x2, 1, 16
-	adrp	x1, .LANCHOR36
+	adrp	x1, .LANCHOR37
 	add	x4, x4, 16
 	strh	wzr, [x0, 4]
 	add	x4, x0, x4
-	ldrh	w3, [x1, #:lo12:.LANCHOR36]
+	ldrh	w3, [x1, #:lo12:.LANCHOR37]
 	mov	w1, 65535
-.L514:
+.L515:
 	cmp	w2, w3
-	bcc	.L516
-	adrp	x1, .LANCHOR51
+	bcc	.L517
+	adrp	x1, .LANCHOR52
 	ubfiz	x3, x3, 1, 16
 	add	x3, x3, 16
 	add	x2, x0, 16
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	add	x3, x0, x3
 	mov	w5, 65535
 	sub	w1, w1, #1
 	and	w1, w1, 65535
 	sub	w1, w1, w6
-.L517:
+.L518:
 	cmp	x2, x3
-	bne	.L519
+	bne	.L520
 	ret
-.L516:
+.L517:
 	ldrh	w5, [x4]
 	cmp	w5, w1
-	beq	.L515
+	beq	.L516
 	ldrh	w5, [x0, 4]
 	add	w5, w5, 1
 	strh	w5, [x0, 4]
-.L515:
+.L516:
 	add	w2, w2, 1
 	add	x4, x4, 2
 	and	w2, w2, 65535
-	b	.L514
-.L519:
+	b	.L515
+.L520:
 	ldrh	w4, [x2]
 	cmp	w4, w5
-	beq	.L518
+	beq	.L519
 	ldrh	w4, [x0, 4]
 	add	w4, w1, w4
 	strh	w4, [x0, 4]
-.L518:
+.L519:
 	add	x2, x2, 2
-	b	.L517
+	b	.L518
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",@progbits
 	.align	2
@@ -3574,78 +3568,78 @@ make_superblock:
 	ldrh	w1, [x0]
 	str	x19, [sp, 16]
 	mov	x19, x0
-	adrp	x0, .LANCHOR38
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR39
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	cmp	w1, w0
-	bcc	.L521
-	mov	w2, 2298
-	adrp	x1, .LANCHOR100
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR100
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bcc	.L522
+	mov	w2, 2335
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L521:
-	adrp	x0, .LANCHOR36
-	adrp	x7, .LANCHOR45
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L522:
+	adrp	x0, .LANCHOR37
+	adrp	x7, .LANCHOR46
 	add	x6, x19, 16
-	add	x7, x7, :lo12:.LANCHOR45
-	ldrh	w8, [x0, #:lo12:.LANCHOR36]
+	add	x7, x7, :lo12:.LANCHOR46
+	ldrh	w8, [x0, #:lo12:.LANCHOR37]
 	mov	x5, 0
 	strh	wzr, [x19, 4]
 	mov	w10, -1
 	strb	wzr, [x19, 7]
-.L522:
+.L523:
 	cmp	w8, w5, uxth
-	bhi	.L524
-	adrp	x1, .LANCHOR51
+	bhi	.L525
+	adrp	x1, .LANCHOR52
 	ldrb	w0, [x19, 7]
 	strb	wzr, [x19, 9]
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
 	strh	w0, [x19, 4]
-	adrp	x0, .LANCHOR101
-	ldr	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L525
-	adrp	x0, .LANCHOR77
+	adrp	x0, .LANCHOR28
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L526
+	adrp	x0, .LANCHOR78
 	ldrh	w1, [x19]
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w0, 59
-	bhi	.L525
+	bhi	.L526
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L525:
+.L526:
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbz	w0, .L526
+	cbz	w0, .L527
 	mov	w0, 1
 	strb	w0, [x19, 9]
-.L526:
+.L527:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L524:
+.L525:
 	ldrh	w1, [x19]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	mov	w4, w0
 	strh	w10, [x6]
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L523
+	cbnz	w0, .L524
 	strh	w4, [x6]
 	ldrb	w0, [x19, 7]
 	add	w0, w0, 1
 	strb	w0, [x19, 7]
-.L523:
+.L524:
 	add	x5, x5, 1
 	add	x6, x6, 2
-	b	.L522
+	b	.L523
 	.size	make_superblock, .-make_superblock
 	.section	.text.update_multiplier_value,"ax",@progbits
 	.align	2
@@ -3653,55 +3647,55 @@ make_superblock:
 	.type	update_multiplier_value, %function
 update_multiplier_value:
 	and	w6, w0, 65535
-	adrp	x0, .LANCHOR36
+	adrp	x0, .LANCHOR37
 	mov	x7, 0
-	adrp	x8, .LANCHOR45
-	ldrh	w10, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR51
+	adrp	x8, .LANCHOR46
+	ldrh	w10, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR52
 	mov	w5, 0
-	add	x8, x8, :lo12:.LANCHOR45
-	ldrh	w11, [x0, #:lo12:.LANCHOR51]
+	add	x8, x8, :lo12:.LANCHOR46
+	ldrh	w11, [x0, #:lo12:.LANCHOR52]
 	cmp	w10, w7, uxth
-	bhi	.L546
-	cbz	w5, .L544
+	bhi	.L547
+	cbz	w5, .L545
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L545:
-	adrp	x0, .LANCHOR80
+.L546:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
 	ret
-.L539:
+.L540:
 	mov	w5, 0
-	b	.L538
-.L544:
+	b	.L539
+.L545:
 	mov	w5, 0
-	b	.L545
-.L546:
+	b	.L546
+.L547:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L537:
+.L538:
 	ldrb	w0, [x8, x7]
 	mov	w1, w6
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L536
+	cbnz	w0, .L537
 	add	w5, w5, w11
 	and	w5, w5, 65535
-.L536:
+.L537:
 	add	x7, x7, 1
 	cmp	w10, w7, uxth
-	bhi	.L537
-	cbz	w5, .L539
+	bhi	.L538
+	cbz	w5, .L540
 	mov	w0, 32768
 	sdiv	w5, w0, w5
-.L538:
-	adrp	x0, .LANCHOR80
+.L539:
+	adrp	x0, .LANCHOR81
 	mov	w1, 6
-	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
 	umaddl	x6, w6, w1, x0
 	mov	w0, 0
 	strh	w5, [x6, 4]
@@ -3713,22 +3707,22 @@ update_multiplier_value:
 	.global	GetFreeBlockMinEraseCount
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
-	adrp	x0, .LANCHOR86
-	ldr	x0, [x0, #:lo12:.LANCHOR86]
-	cbz	x0, .L549
-	adrp	x1, .LANCHOR80
-	ldr	x1, [x1, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR87
+	ldr	x0, [x0, #:lo12:.LANCHOR87]
+	cbz	x0, .L550
+	adrp	x1, .LANCHOR81
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR77
-	ldr	x1, [x1, #:lo12:.LANCHOR77]
+	adrp	x1, .LANCHOR78
+	ldr	x1, [x1, #:lo12:.LANCHOR78]
 	and	x0, x0, 65535
 	ldrh	w0, [x1, x0, lsl 1]
 	ret
-.L549:
+.L550:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
@@ -3737,21 +3731,21 @@ GetFreeBlockMinEraseCount:
 	.global	GetFreeBlockMaxEraseCount
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
-	adrp	x1, .LANCHOR86
+	adrp	x1, .LANCHOR87
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR86]
-	cbz	x1, .L557
-	adrp	x2, .LANCHOR87
+	ldr	x1, [x1, #:lo12:.LANCHOR87]
+	cbz	x1, .L558
+	adrp	x2, .LANCHOR88
 	mov	w3, 7
 	mov	w5, 6
 	mov	w6, 65535
-	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	ldrh	w2, [x2, #:lo12:.LANCHOR88]
 	mul	w2, w2, w3
 	asr	w2, w2, 3
 	cmp	w0, w2
 	csel	w0, w2, w0, gt
-	adrp	x2, .LANCHOR80
-	ldr	x3, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR81
+	ldr	x3, [x2, #:lo12:.LANCHOR81]
 	mov	x2, -6148914691236517206
 	movk	x2, 0xaaab, lsl 0
 	sub	x1, x1, x3
@@ -3759,25 +3753,25 @@ GetFreeBlockMaxEraseCount:
 	mul	x1, x1, x2
 	mov	w2, 0
 	and	w1, w1, 65535
-.L553:
+.L554:
 	cmp	w0, w2
-	beq	.L556
+	beq	.L557
 	umull	x4, w1, w5
 	ldrh	w4, [x3, x4]
 	cmp	w4, w6
-	bne	.L554
-.L556:
-	adrp	x0, .LANCHOR77
+	bne	.L555
+.L557:
+	adrp	x0, .LANCHOR78
 	ubfiz	x1, x1, 1, 16
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x1]
 	ret
-.L554:
+.L555:
 	add	w2, w2, 1
 	mov	w1, w4
 	and	w2, w2, 65535
-	b	.L553
-.L557:
+	b	.L554
+.L558:
 	mov	w0, 0
 	ret
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
@@ -3789,18 +3783,18 @@ free_data_superblock:
 	and	w0, w0, 65535
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L561
+	beq	.L562
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR82
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	strh	wzr, [x2, x1]
 	bl	INSERT_FREE_LIST
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L561:
+.L562:
 	mov	w0, 0
 	ret
 	.size	free_data_superblock, .-free_data_superblock
@@ -3814,14 +3808,14 @@ FtlGcBufInit:
 	adrp	x7, .LANCHOR104
 	adrp	x6, .LANCHOR105
 	ldr	x5, [x1, #:lo12:.LANCHOR103]
-	adrp	x1, .LANCHOR56
-	str	wzr, [x0, #:lo12:.LANCHOR102]
-	adrp	x0, .LANCHOR36
-	ldrh	w10, [x1, #:lo12:.LANCHOR56]
 	adrp	x1, .LANCHOR57
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	str	wzr, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR37
+	ldrh	w10, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR58
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	mov	w8, 24
-	ldrh	w11, [x1, #:lo12:.LANCHOR57]
+	ldrh	w11, [x1, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR106
 	ldr	x14, [x7, #:lo12:.LANCHOR104]
 	mov	x3, x5
@@ -3833,21 +3827,21 @@ FtlGcBufInit:
 	add	x4, x4, 8
 	mov	w1, 0
 	mov	w16, 1
-.L565:
+.L566:
 	add	w13, w2, w10
 	add	w12, w1, w11
 	cmp	x3, x8
-	bne	.L566
+	bne	.L567
 	adrp	x1, .LANCHOR107
 	ldr	x7, [x7, #:lo12:.LANCHOR104]
 	ldr	x6, [x6, #:lo12:.LANCHOR105]
 	mov	w8, 24
 	ldr	w4, [x1, #:lo12:.LANCHOR107]
-.L567:
+.L568:
 	cmp	w0, w4
-	bcc	.L568
+	bcc	.L569
 	ret
-.L566:
+.L567:
 	asr	w2, w2, 2
 	asr	w1, w1, 2
 	add	x2, x14, x2, sxtw 2
@@ -3859,8 +3853,8 @@ FtlGcBufInit:
 	add	x4, x4, 56
 	mov	w1, w12
 	mov	w2, w13
-	b	.L565
-.L568:
+	b	.L566
+.L569:
 	umull	x3, w0, w8
 	mul	w1, w10, w0
 	add	x2, x5, x3
@@ -3874,7 +3868,7 @@ FtlGcBufInit:
 	asr	w1, w1, 2
 	add	x1, x6, x1, sxtw 2
 	str	x1, [x2, 8]
-	b	.L567
+	b	.L568
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlGcBufFree,"ax",@progbits
 	.align	2
@@ -3888,30 +3882,30 @@ FtlGcBufFree:
 	ldr	w8, [x2, #:lo12:.LANCHOR107]
 	adrp	x2, .LANCHOR103
 	ldr	x4, [x2, #:lo12:.LANCHOR103]
-.L570:
+.L571:
 	cmp	w3, w1
-	bcs	.L569
+	bcs	.L570
 	umaddl	x6, w3, w7, x0
 	mov	w2, 0
-	b	.L575
-.L571:
+	b	.L576
+.L572:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L575:
+.L576:
 	cmp	w2, w8
-	bcs	.L572
+	bcs	.L573
 	umull	x5, w2, w10
 	add	x11, x4, x5
 	ldr	x12, [x4, x5]
 	ldr	x5, [x6, 8]
 	cmp	x12, x5
-	bne	.L571
+	bne	.L572
 	str	wzr, [x11, 16]
-.L572:
+.L573:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L570
-.L569:
+	b	.L571
+.L570:
 	ret
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",@progbits
@@ -3927,30 +3921,30 @@ FtlGcBufAlloc:
 	adrp	x2, .LANCHOR103
 	mov	w10, 56
 	ldr	x6, [x2, #:lo12:.LANCHOR103]
-.L577:
+.L578:
 	cmp	w3, w1
-	bcs	.L576
+	bcs	.L577
 	mov	w2, 0
-	b	.L582
-.L578:
+	b	.L583
+.L579:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-.L582:
+.L583:
 	cmp	w2, w5
-	bcs	.L579
+	bcs	.L580
 	umaddl	x4, w2, w7, x6
 	ldr	w11, [x4, 16]
-	cbnz	w11, .L578
+	cbnz	w11, .L579
 	umaddl	x2, w3, w10, x0
 	ldr	x11, [x4]
 	str	w8, [x4, 16]
 	ldr	x4, [x4, 8]
 	stp	x11, x4, [x2, 8]
-.L579:
+.L580:
 	add	w3, w3, 1
 	and	w3, w3, 65535
-	b	.L577
-.L576:
+	b	.L578
+.L577:
 	ret
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",@progbits
@@ -3964,17 +3958,17 @@ IsBlkInGcList:
 	adrp	x1, .LANCHOR109
 	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	x1, 0
-.L584:
+.L585:
 	cmp	w2, w1, uxth
-	bhi	.L586
+	bhi	.L587
 	mov	w0, 0
 	ret
-.L586:
+.L587:
 	add	x1, x1, 1
 	add	x4, x3, x1, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w0
-	bne	.L584
+	bne	.L585
 	mov	w0, 1
 	ret
 	.size	IsBlkInGcList, .-IsBlkInGcList
@@ -3996,24 +3990,24 @@ FtlGcUpdatePage:
 	mov	x3, 0
 	ldrh	w1, [x4, #:lo12:.LANCHOR108]
 	ldr	x5, [x2, #:lo12:.LANCHOR109]
-.L589:
+.L590:
 	and	w2, w3, 65535
 	cmp	w2, w1
-	bcc	.L591
-	bne	.L590
+	bcc	.L592
+	bne	.L591
 	and	x3, x3, 65535
 	strh	w0, [x5, x3, lsl 1]
 	ldrh	w0, [x4, #:lo12:.LANCHOR108]
 	add	w0, w0, 1
 	strh	w0, [x4, #:lo12:.LANCHOR108]
-	b	.L590
-.L591:
+	b	.L591
+.L592:
 	add	x3, x3, 1
 	add	x2, x5, x3, lsl 1
 	ldrh	w2, [x2, -2]
 	cmp	w2, w7
-	bne	.L589
-.L590:
+	bne	.L590
+.L591:
 	adrp	x4, .LANCHOR110
 	adrp	x1, .LANCHOR111
 	mov	w3, 12
@@ -4037,23 +4031,23 @@ FtlGcRefreshBlock:
 	and	w0, w0, 65535
 	ldrh	w5, [x4, #:lo12:.LANCHOR112]
 	cmp	w5, w0
-	beq	.L594
+	beq	.L595
 	adrp	x1, .LANCHOR113
 	ldrh	w3, [x1, #:lo12:.LANCHOR113]
 	cmp	w0, w3
-	beq	.L594
+	beq	.L595
 	mov	w2, 65535
 	cmp	w5, w2
-	bne	.L595
+	bne	.L596
 	strh	w0, [x4, #:lo12:.LANCHOR112]
-.L594:
+.L595:
 	mov	w0, 0
 	ret
-.L595:
+.L596:
 	cmp	w3, w2
-	bne	.L594
+	bne	.L595
 	strh	w0, [x1, #:lo12:.LANCHOR113]
-	b	.L594
+	b	.L595
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
 	.align	2
@@ -4074,41 +4068,41 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	and	w6, w0, 65535
 	bl	FtlGcRefreshBlock
-	adrp	x0, .LANCHOR101
-	ldr	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L598
-	adrp	x1, .LANCHOR77
+	adrp	x0, .LANCHOR28
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L599
+	adrp	x1, .LANCHOR78
 	ubfiz	x0, x6, 1, 16
-	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldr	x2, [x1, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x0]
 	cmp	w1, 29
-	bls	.L598
+	bls	.L599
 	sub	w1, w1, #30
 	strh	w1, [x2, x0]
-.L598:
+.L599:
 	adrp	x1, .LANCHOR114
 	adrp	x3, .LANCHOR115
 	add	x3, x3, :lo12:.LANCHOR115
 	mov	x2, 0
 	ldrh	w0, [x1, #:lo12:.LANCHOR114]
-.L599:
+.L600:
 	cmp	w0, w2, uxth
-	bhi	.L601
+	bhi	.L602
 	cmp	w0, 15
-	bhi	.L600
+	bhi	.L601
 	add	w2, w0, 1
 	strh	w2, [x1, #:lo12:.LANCHOR114]
 	adrp	x1, .LANCHOR115
 	add	x1, x1, :lo12:.LANCHOR115
 	strh	w7, [x1, w0, sxtw 1]
-	b	.L600
-.L601:
+	b	.L601
+.L602:
 	add	x2, x2, 1
 	add	x4, x3, x2, lsl 1
 	ldrh	w4, [x4, -2]
 	cmp	w4, w7
-	bne	.L599
-.L600:
+	bne	.L600
+.L601:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
@@ -4120,20 +4114,20 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	adrp	x0, .LANCHOR114
 	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L613
+	cbz	w0, .L614
 	adrp	x1, .LANCHOR112
 	ldrh	w2, [x1, #:lo12:.LANCHOR112]
 	mov	w1, 65535
 	cmp	w2, w1
-	bne	.L613
+	bne	.L614
 	stp	x29, x30, [sp, -16]!
 	adrp	x6, .LANCHOR116
 	add	x29, sp, 0
 	ldrh	w1, [x6, #:lo12:.LANCHOR116]
 	cmp	w1, w0
-	bcc	.L608
+	bcc	.L609
 	strh	wzr, [x6, #:lo12:.LANCHOR116]
-.L608:
+.L609:
 	ldrh	w1, [x6, #:lo12:.LANCHOR116]
 	adrp	x0, .LANCHOR115
 	add	x0, x0, :lo12:.LANCHOR115
@@ -4146,7 +4140,7 @@ FtlGcReFreshBadBlk:
 	strh	w0, [x6, #:lo12:.LANCHOR116]
 	mov	w0, 0
 	ret
-.L613:
+.L614:
 	mov	w0, 0
 	ret
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -4167,16 +4161,16 @@ BuildFlashLsbPageTable:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	cbnz	w0, .L618
+	cbnz	w0, .L619
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L619:
+.L620:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L619
-.L625:
+	bne	.L620
+.L626:
 	adrp	x19, .LANCHOR117
 	add	x19, x19, :lo12:.LANCHOR117
 	mov	w1, 255
@@ -4187,41 +4181,41 @@ BuildFlashLsbPageTable:
 	and	w20, w20, 65535
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L620:
+.L621:
 	cmp	w20, w0, uxth
-	bhi	.L642
+	bhi	.L643
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L618:
+.L619:
 	cmp	w0, 1
-	bne	.L621
+	bne	.L622
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L624:
+.L625:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L622
+	bls	.L623
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L622:
+.L623:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L624
-	b	.L625
-.L621:
+	bne	.L625
+	b	.L626
+.L622:
 	cmp	w0, 2
-	bne	.L626
+	bne	.L627
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	w1, 65535
 	mov	x0, 0
-.L628:
+.L629:
 	cmp	x0, 2
 	and	w3, w0, 65535
 	csel	w3, w3, w1, cc
@@ -4230,32 +4224,32 @@ BuildFlashLsbPageTable:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L628
-	b	.L625
-.L626:
-	cmp	w0, 3
 	bne	.L629
+	b	.L626
+.L627:
+	cmp	w0, 3
+	bne	.L630
 	adrp	x2, .LANCHOR16
 	add	x2, x2, :lo12:.LANCHOR16
 	mov	x1, 0
-.L632:
+.L633:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L630
+	bls	.L631
 	ubfiz	w3, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w3, w0
 	and	w0, w0, 65535
-.L630:
+.L631:
 	strh	w0, [x2, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L632
-	b	.L625
-.L629:
-	cmp	w0, 4
 	bne	.L633
+	b	.L626
+.L630:
+	cmp	w0, 4
+	bne	.L634
 	adrp	x2, .LANCHOR16
 	add	x1, x2, :lo12:.LANCHOR16
 	add	x1, x1, 16
@@ -4274,7 +4268,7 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L635:
+.L636:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4283,57 +4277,57 @@ BuildFlashLsbPageTable:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L635
-	b	.L625
-.L633:
-	cmp	w0, 5
 	bne	.L636
+	b	.L626
+.L634:
+	cmp	w0, 5
+	bne	.L637
 	adrp	x1, .LANCHOR16
 	add	x1, x1, :lo12:.LANCHOR16
 	mov	x0, 0
-.L637:
+.L638:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L637
+	bne	.L638
 	add	x1, x1, 32
-.L638:
+.L639:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L638
-	b	.L625
-.L636:
+	bne	.L639
+	b	.L626
+.L637:
 	cmp	w0, 6
-	bne	.L625
+	bne	.L626
 	adrp	x3, .LANCHOR16
 	add	x3, x3, :lo12:.LANCHOR16
 	mov	w1, 0
 	mov	x2, 0
 	mov	w4, 12
 	mov	w5, 10
-.L641:
+.L642:
 	and	w0, w2, 65535
 	cmp	x2, 5
-	bls	.L639
+	bls	.L640
 	tst	x0, 1
 	csel	w0, w4, w5, ne
 	sub	w0, w1, w0
 	and	w0, w0, 65535
-.L639:
+.L640:
 	strh	w0, [x3, x2, lsl 1]
 	add	w1, w1, 3
 	and	w1, w1, 65535
 	add	x2, x2, 1
 	cmp	w1, 768
-	bne	.L641
-	b	.L625
-.L642:
+	bne	.L642
+	b	.L626
+.L643:
 	ldrh	w2, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	strh	w2, [x19, w2, sxtw 1]
-	b	.L620
+	b	.L621
 	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
 	.section	.text.FlashDieInfoInit,"ax",@progbits
 	.align	2
@@ -4341,22 +4335,22 @@ BuildFlashLsbPageTable:
 	.type	FlashDieInfoInit, %function
 FlashDieInfoInit:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR29+10
+	adrp	x0, .LANCHOR30+10
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR25
 	adrp	x20, .LANCHOR118
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR29+10]
+	ldrh	w0, [x0, #:lo12:.LANCHOR30+10]
 	adrp	x23, .LANCHOR3
 	stp	x21, x22, [sp, 32]
 	strb	wzr, [x19, #:lo12:.LANCHOR25]
 	cmp	w0, 256
 	strb	wzr, [x20, #:lo12:.LANCHOR118]
 	str	x25, [sp, 64]
-	bls	.L658
+	bls	.L659
 	mov	w0, 512
-.L675:
+.L676:
 	adrp	x25, .LANCHOR26
 	add	x22, x25, :lo12:.LANCHOR26
 	str	w0, [x23, #:lo12:.LANCHOR3]
@@ -4383,27 +4377,27 @@ FlashDieInfoInit:
 	mov	x8, 0
 	add	x10, x7, 1
 	ldrb	w11, [x7]
-.L662:
+.L663:
 	mov	w2, w11
 	add	x1, x15, x8, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L661
+	cbnz	w0, .L662
 	ldrb	w1, [x14]
 	add	w0, w1, 1
 	strb	w0, [x14]
 	str	wzr, [x21, x1, lsl 2]
 	strb	w8, [x22, x1]
-.L661:
+.L662:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L662
+	bne	.L663
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	strb	w0, [x20, #:lo12:.LANCHOR118]
 	ldrb	w0, [x7, 8]
 	cmp	w0, 2
-	beq	.L663
-.L667:
+	beq	.L664
+.L668:
 	ldrb	w0, [x19, #:lo12:.LANCHOR25]
 	ldrh	w1, [x7, 14]
 	ldp	x19, x20, [sp, 16]
@@ -4417,24 +4411,24 @@ FlashDieInfoInit:
 	ldp	x29, x30, [sp], 80
 	strh	w0, [x1, #:lo12:.LANCHOR119]
 	ret
-.L658:
+.L659:
 	cmp	w0, 128
-	bls	.L675
+	bls	.L676
 	mov	w0, 256
-	b	.L675
-.L663:
+	b	.L676
+.L664:
 	ldr	w20, [x23, #:lo12:.LANCHOR3]
 	add	x12, x12, :lo12:.LANCHOR22
 	add	x14, x19, :lo12:.LANCHOR25
 	add	x24, x24, :lo12:.LANCHOR17
 	add	x13, x25, :lo12:.LANCHOR26
 	mov	x15, 0
-.L666:
+.L667:
 	mov	w2, w11
 	add	x1, x12, x15, lsl 3
 	mov	x0, x10
 	bl	FlashMemCmp8
-	cbnz	w0, .L664
+	cbnz	w0, .L665
 	ldrb	w2, [x7, 13]
 	ldrh	w0, [x7, 14]
 	ldrb	w1, [x14]
@@ -4444,18 +4438,18 @@ FlashDieInfoInit:
 	sxtw	x2, w1
 	str	w0, [x24, x2, lsl 2]
 	ldrb	w3, [x7, 23]
-	cbz	w3, .L665
+	cbz	w3, .L666
 	lsl	w0, w0, 1
 	str	w0, [x24, x2, lsl 2]
-.L665:
+.L666:
 	add	w1, w1, 1
 	strb	w15, [x13, x2]
 	strb	w1, [x14]
-.L664:
+.L665:
 	add	x15, x15, 1
 	cmp	x15, 4
-	bne	.L666
-	b	.L667
+	bne	.L667
+	b	.L668
 	.size	FlashDieInfoInit, .-FlashDieInfoInit
 	.section	.text.ReadFlashInfo,"ax",@progbits
 	.align	2
@@ -4470,7 +4464,7 @@ ReadFlashInfo:
 	mov	x19, x0
 	bl	ftl_memset
 	adrp	x0, .LANCHOR18
-	adrp	x3, .LANCHOR67
+	adrp	x3, .LANCHOR68
 	mov	w4, 1
 	ldr	x1, [x0, #:lo12:.LANCHOR18]
 	adrp	x0, .LANCHOR3
@@ -4480,11 +4474,11 @@ ReadFlashInfo:
 	strb	w0, [x19, 4]
 	ubfx	x0, x0, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	strb	w0, [x19, 7]
-	add	x0, x3, :lo12:.LANCHOR67
-	ldrb	w3, [x3, #:lo12:.LANCHOR67]
+	add	x0, x3, :lo12:.LANCHOR68
+	ldrb	w3, [x3, #:lo12:.LANCHOR68]
 	strb	w3, [x19]
 	ldrb	w3, [x0, 1]
 	strb	w3, [x19, 1]
@@ -4503,20 +4497,20 @@ ReadFlashInfo:
 	adrp	x0, .LANCHOR25
 	strb	wzr, [x19, 10]
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
-.L677:
+.L678:
 	cmp	w3, w1, uxtb
-	bhi	.L678
+	bhi	.L679
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L678:
+.L679:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L677
+	b	.L678
 	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.FtlBbt2Bitmap,"ax",@progbits
 	.align	2
@@ -4529,10 +4523,10 @@ FtlBbt2Bitmap:
 	mov	x21, x0
 	adrp	x0, .LANCHOR120
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR49
+	adrp	x22, .LANCHOR50
 	adrp	x23, .LANCHOR121
 	ldrh	w2, [x0, #:lo12:.LANCHOR120]
-	add	x22, x22, :lo12:.LANCHOR49
+	add	x22, x22, :lo12:.LANCHOR50
 	add	x23, x23, :lo12:.LANCHOR121
 	stp	x19, x20, [sp, 16]
 	mov	w24, 65535
@@ -4542,24 +4536,24 @@ FtlBbt2Bitmap:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-.L683:
+.L684:
 	ldrh	w0, [x21, x19]
 	cmp	w0, w24
-	beq	.L680
+	beq	.L681
 	ldrh	w1, [x22]
 	cmp	w1, w0
-	bhi	.L682
+	bhi	.L683
 	mov	w2, 79
 	mov	x1, x23
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L682:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L683:
 	ldrh	w1, [x21, x19]
 	mov	w2, 1
 	add	x19, x19, 2
@@ -4571,8 +4565,8 @@ FtlBbt2Bitmap:
 	ldr	w1, [x20, x0]
 	orr	w1, w1, w2
 	str	w1, [x20, x0]
-	bne	.L683
-.L680:
+	bne	.L684
+.L681:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -4584,11 +4578,11 @@ FtlBbt2Bitmap:
 	.global	FtlBbtMemInit
 	.type	FtlBbtMemInit, %function
 FtlBbtMemInit:
-	adrp	x1, .LANCHOR73
-	add	x0, x1, :lo12:.LANCHOR73
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
 	mov	w2, -1
 	add	x0, x0, 12
-	strh	w2, [x1, #:lo12:.LANCHOR73]
+	strh	w2, [x1, #:lo12:.LANCHOR74]
 	mov	w2, 16
 	strh	wzr, [x0, -6]
 	mov	w1, 255
@@ -4600,11 +4594,11 @@ FtlBbtMemInit:
 	.type	FtlFreeSysBlkQueueInit, %function
 FtlFreeSysBlkQueueInit:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR74
-	add	x3, x1, :lo12:.LANCHOR74
+	adrp	x1, .LANCHOR75
+	add	x3, x1, :lo12:.LANCHOR75
 	mov	w2, 2048
 	add	x29, sp, 0
-	strh	w0, [x1, #:lo12:.LANCHOR74]
+	strh	w0, [x1, #:lo12:.LANCHOR75]
 	mov	w1, 0
 	strh	wzr, [x3, 2]
 	add	x0, x3, 8
@@ -4635,19 +4629,19 @@ ftl_free_no_use_map_blk:
 	mov	x0, x21
 	bl	ftl_memset
 	mov	w0, 0
-.L691:
+.L692:
 	ldrh	w1, [x19, 6]
 	cmp	w1, w0
-	bhi	.L695
+	bhi	.L696
 	ldrh	w26, [x21]
-	adrp	x24, .LANCHOR52
-	add	x24, x24, :lo12:.LANCHOR52
+	adrp	x24, .LANCHOR53
+	add	x24, x24, :lo12:.LANCHOR53
 	mov	w25, 0
 	mov	w20, 0
-.L696:
+.L697:
 	ldrh	w0, [x19, 10]
 	cmp	w0, w20
-	bhi	.L700
+	bhi	.L701
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4655,61 +4649,61 @@ ftl_free_no_use_map_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L695:
+.L696:
 	ubfiz	x1, x0, 2, 16
 	ldr	w2, [x20, x1]
 	mov	w1, 0
 	ubfx	x2, x2, 10, 16
-.L692:
+.L693:
 	ldrh	w3, [x19, 10]
 	cmp	w3, w1
-	bhi	.L694
+	bhi	.L695
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L691
-.L694:
+	b	.L692
+.L695:
 	ubfiz	x3, x1, 1, 16
 	ldrh	w4, [x23, x3]
 	cmp	w4, w2
-	bne	.L693
+	bne	.L694
 	ldrh	w4, [x21, x3]
 	add	w4, w4, 1
 	strh	w4, [x21, x3]
-.L693:
+.L694:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L692
-.L700:
+	b	.L693
+.L701:
 	ldrh	w0, [x19]
 	uxtw	x22, w20
 	cmp	w0, w20
-	bne	.L697
+	bne	.L698
 	ldrh	w0, [x24]
 	ldrh	w1, [x19, 2]
 	cmp	w1, w0
-	bcs	.L697
+	bcs	.L698
 	strh	w0, [x21, x22, lsl 1]
-.L697:
+.L698:
 	lsl	x22, x22, 1
 	ldrh	w0, [x21, x22]
 	cmp	w26, w0
-	bls	.L698
+	bls	.L699
 	mov	w25, w20
 	mov	w26, w0
-.L698:
-	cbnz	w0, .L699
+.L699:
+	cbnz	w0, .L700
 	ldrh	w0, [x23, x22]
-	cbz	w0, .L699
+	cbz	w0, .L700
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
 	strh	wzr, [x23, x22]
 	ldrh	w0, [x19, 8]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-.L699:
+.L700:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L696
+	b	.L697
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.FtlL2PDataInit,"ax",@progbits
 	.align	2
@@ -4721,39 +4715,39 @@ FtlL2PDataInit:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR122
-	adrp	x20, .LANCHOR63
+	adrp	x20, .LANCHOR64
 	stp	x21, x22, [sp, 32]
 	ldr	x0, [x19, #:lo12:.LANCHOR122]
-	adrp	x22, .LANCHOR56
-	ldr	w2, [x20, #:lo12:.LANCHOR63]
-	adrp	x21, .LANCHOR66
+	adrp	x22, .LANCHOR57
+	ldr	w2, [x20, #:lo12:.LANCHOR64]
+	adrp	x21, .LANCHOR67
 	str	x23, [sp, 48]
 	adrp	x23, .LANCHOR123
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w0, [x21, #:lo12:.LANCHOR66]
+	ldrh	w0, [x21, #:lo12:.LANCHOR67]
 	mov	w1, 255
-	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	ldrh	w2, [x22, #:lo12:.LANCHOR57]
 	mul	w2, w2, w0
 	ldr	x0, [x23, #:lo12:.LANCHOR123]
 	bl	ftl_memset
-	adrp	x0, .LANCHOR95
-	ldrh	w3, [x21, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR96
+	ldrh	w3, [x21, #:lo12:.LANCHOR67]
 	ldr	x6, [x23, #:lo12:.LANCHOR123]
 	mov	x1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	mov	w2, -1
-	ldrh	w5, [x22, #:lo12:.LANCHOR56]
+	ldrh	w5, [x22, #:lo12:.LANCHOR57]
 	add	x3, x0, x3, lsl 4
-.L706:
+.L707:
 	add	x4, x1, x5
 	cmp	x0, x3
-	bne	.L707
+	bne	.L708
 	adrp	x1, .LANCHOR124
 	add	x0, x1, :lo12:.LANCHOR124
 	ldp	x21, x22, [sp, 32]
 	strh	w2, [x1, #:lo12:.LANCHOR124]
-	ldr	w1, [x20, #:lo12:.LANCHOR63]
+	ldr	w1, [x20, #:lo12:.LANCHOR64]
 	strh	w1, [x0, 10]
 	mov	w1, -3902
 	strh	w1, [x0, 4]
@@ -4762,9 +4756,9 @@ FtlL2PDataInit:
 	strh	w2, [x0, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR125]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR65
+	adrp	x1, .LANCHOR66
 	strh	w2, [x0, 60]
-	ldrh	w1, [x1, #:lo12:.LANCHOR65]
+	ldrh	w1, [x1, #:lo12:.LANCHOR66]
 	strh	w1, [x0, 6]
 	adrp	x1, .LANCHOR126
 	ldr	x1, [x1, #:lo12:.LANCHOR126]
@@ -4780,7 +4774,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 40]
 	ldp	x29, x30, [sp], 64
 	ret
-.L707:
+.L708:
 	and	x1, x1, -4
 	strh	w2, [x0]
 	add	x1, x6, x1
@@ -4788,7 +4782,7 @@ FtlL2PDataInit:
 	str	x1, [x0, 8]
 	add	x0, x0, 16
 	mov	x1, x4
-	b	.L706
+	b	.L707
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.FtlVariablesInit,"ax",@progbits
 	.align	2
@@ -4802,7 +4796,7 @@ FtlVariablesInit:
 	str	xzr, [x0, #:lo12:.LANCHOR129]
 	adrp	x0, .LANCHOR130
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR39
+	adrp	x19, .LANCHOR40
 	strh	w1, [x0, #:lo12:.LANCHOR130]
 	adrp	x0, .LANCHOR131
 	mov	w1, -1
@@ -4811,38 +4805,38 @@ FtlVariablesInit:
 	str	wzr, [x0, #:lo12:.LANCHOR132]
 	adrp	x0, .LANCHOR133
 	str	w1, [x0, #:lo12:.LANCHOR133]
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR28
 	mov	w1, 0
-	str	wzr, [x0, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR69
-	strh	wzr, [x0, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR60
-	ldrh	w2, [x0, #:lo12:.LANCHOR60]
+	str	wzr, [x0, #:lo12:.LANCHOR28]
 	adrp	x0, .LANCHOR70
-	ldr	x0, [x0, #:lo12:.LANCHOR70]
+	strh	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR61
+	ldrh	w2, [x0, #:lo12:.LANCHOR61]
+	adrp	x0, .LANCHOR71
+	ldr	x0, [x0, #:lo12:.LANCHOR71]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR77
-	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR78
+	ldrh	w2, [x19, #:lo12:.LANCHOR40]
 	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldr	x0, [x0, #:lo12:.LANCHOR78]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	adrp	x0, .LANCHOR134
-	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	ldrh	w2, [x19, #:lo12:.LANCHOR40]
 	mov	w1, 0
 	ldr	x0, [x0, #:lo12:.LANCHOR134]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 48
 	mov	w1, 0
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	bl	ftl_memset
 	mov	w2, 512
 	mov	w1, 0
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	bl	ftl_memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
@@ -4857,127 +4851,127 @@ FtlVariablesInit:
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
 	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR39
+	adrp	x0, .LANCHOR40
 	mov	w1, 0
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR39]
+	ldrh	w2, [x0, #:lo12:.LANCHOR40]
 	mov	w0, 6
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR80
+	adrp	x24, .LANCHOR81
 	stp	x19, x20, [sp, 16]
-	adrp	x23, .LANCHOR84
+	adrp	x23, .LANCHOR85
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR87
+	adrp	x22, .LANCHOR88
 	mul	w2, w2, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR80]
+	ldr	x0, [x24, #:lo12:.LANCHOR81]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR38
+	adrp	x25, .LANCHOR39
 	str	x27, [sp, 80]
-	adrp	x26, .LANCHOR45
-	add	x25, x25, :lo12:.LANCHOR38
-	add	x26, x26, :lo12:.LANCHOR45
+	adrp	x26, .LANCHOR46
+	add	x25, x25, :lo12:.LANCHOR39
+	add	x26, x26, :lo12:.LANCHOR46
 	bl	ftl_memset
 	mov	w21, 0
-	adrp	x0, .LANCHOR86
+	adrp	x0, .LANCHOR87
 	mov	w20, 0
 	mov	w19, 0
-	strh	wzr, [x23, #:lo12:.LANCHOR84]
-	str	xzr, [x0, #:lo12:.LANCHOR86]
-	adrp	x0, .LANCHOR81
-	strh	wzr, [x22, #:lo12:.LANCHOR87]
-	adrp	x27, .LANCHOR36
-	str	xzr, [x0, #:lo12:.LANCHOR81]
-	adrp	x0, .LANCHOR83
-	str	xzr, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR137
-	strh	wzr, [x0, #:lo12:.LANCHOR137]
-.L712:
+	strh	wzr, [x23, #:lo12:.LANCHOR85]
+	str	xzr, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR82
+	strh	wzr, [x22, #:lo12:.LANCHOR88]
+	adrp	x27, .LANCHOR37
+	str	xzr, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LANCHOR84
+	str	xzr, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR136
+	strh	wzr, [x0, #:lo12:.LANCHOR136]
+.L713:
 	ldrh	w0, [x25]
 	cmp	w19, w0
-	bge	.L719
-	adrp	x0, .LANCHOR51
-	ldrh	w8, [x27, #:lo12:.LANCHOR36]
+	bge	.L720
+	adrp	x0, .LANCHOR52
+	ldrh	w8, [x27, #:lo12:.LANCHOR37]
 	mov	w5, 0
 	mov	w6, 0
-	ldrh	w7, [x0, #:lo12:.LANCHOR51]
-	b	.L720
-.L714:
+	ldrh	w7, [x0, #:lo12:.LANCHOR52]
+	b	.L721
+.L715:
 	ldrb	w0, [x26, w6, sxtw]
 	mov	w1, w19
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L713
+	cbnz	w0, .L714
 	add	w5, w7, w5
 	sxth	w5, w5
-.L713:
+.L714:
 	add	w6, w6, 1
 	sxth	w6, w6
-.L720:
+.L721:
 	cmp	w6, w8
-	blt	.L714
-	cbz	w5, .L715
+	blt	.L715
+	cbz	w5, .L716
 	mov	w0, 32768
 	sdiv	w5, w0, w5
 	sxth	w5, w5
-.L716:
-	ldr	x1, [x24, #:lo12:.LANCHOR80]
+.L717:
+	ldr	x1, [x24, #:lo12:.LANCHOR81]
 	mov	w0, 6
 	smaddl	x0, w19, w0, x1
 	strh	w5, [x0, 4]
-	adrp	x0, .LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	cmp	w19, w0
-	beq	.L717
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w19, w0
-	beq	.L717
+	beq	.L718
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w19, w0
-	beq	.L717
-	adrp	x0, .LANCHOR82
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	beq	.L718
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w19, w0
+	beq	.L718
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w0, .L718
+	cbnz	w0, .L719
 	add	w21, w21, 1
 	mov	w0, w19
 	and	w21, w21, 65535
 	bl	INSERT_FREE_LIST
-.L717:
+.L718:
 	add	w19, w19, 1
 	sxth	w19, w19
-	b	.L712
-.L715:
-	adrp	x0, .LANCHOR82
+	b	.L713
+.L716:
+	adrp	x0, .LANCHOR83
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, w19, sxtw 1]
-	b	.L716
-.L718:
+	b	.L717
+.L719:
 	add	w20, w20, 1
 	mov	w0, w19
 	and	w20, w20, 65535
 	bl	INSERT_DATA_LIST
-	b	.L717
-.L719:
-	strh	w20, [x23, #:lo12:.LANCHOR84]
+	b	.L718
+.L720:
+	strh	w20, [x23, #:lo12:.LANCHOR85]
 	add	w20, w20, w21
-	strh	w21, [x22, #:lo12:.LANCHOR87]
+	strh	w21, [x22, #:lo12:.LANCHOR88]
 	cmp	w0, w20
-	bge	.L721
-	mov	w2, 2368
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	bge	.L722
+	mov	w2, 2405
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L721:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L722:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -4999,14 +4993,14 @@ FtlGcPageVarInit:
 	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	adrp	x0, .LANCHOR110
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR54
 	strh	wzr, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LANCHOR109
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
 	ldr	x0, [x0, #:lo12:.LANCHOR109]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	ldrh	w2, [x19, #:lo12:.LANCHOR54]
 	mov	w0, 12
 	mov	w1, 255
 	mul	w2, w2, w0
@@ -5032,8 +5026,8 @@ ftl_memcpy:
 FlashReadIdbData:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 2048
-	adrp	x1, .LANCHOR139
-	add	x1, x1, :lo12:.LANCHOR139
+	adrp	x1, .LANCHOR138
+	add	x1, x1, :lo12:.LANCHOR138
 	add	x29, sp, 0
 	bl	ftl_memcpy
 	mov	w0, 0
@@ -5046,8 +5040,8 @@ FlashReadIdbData:
 	.type	FlashLoadPhyInfoInRam, %function
 FlashLoadPhyInfoInRam:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR140
-	add	x8, x0, :lo12:.LANCHOR140
+	adrp	x0, .LANCHOR139
+	add	x8, x0, :lo12:.LANCHOR139
 	adrp	x11, .LANCHOR22
 	add	x29, sp, 0
 	add	x8, x8, 1
@@ -5055,7 +5049,7 @@ FlashLoadPhyInfoInRam:
 	add	x11, x11, :lo12:.LANCHOR22
 	stp	x19, x20, [sp, 16]
 	mov	x10, 0
-.L731:
+.L732:
 	ldrb	w2, [x8, -1]
 	mov	w12, w10
 	lsl	x20, x10, 5
@@ -5063,28 +5057,28 @@ FlashLoadPhyInfoInRam:
 	mov	x0, x8
 	bl	FlashMemCmp8
 	mov	w19, w0
-	cbnz	w0, .L729
-	add	x0, x7, :lo12:.LANCHOR140
+	cbnz	w0, .L730
+	add	x0, x7, :lo12:.LANCHOR139
 	ubfiz	x12, x12, 5, 32
 	add	x20, x0, x20
 	add	x0, x0, x12
-	adrp	x1, .LANCHOR141
-	add	x4, x1, :lo12:.LANCHOR141
+	adrp	x1, .LANCHOR140
+	add	x4, x1, :lo12:.LANCHOR140
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L730:
+.L731:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L733
+	beq	.L734
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L730
+	bne	.L731
 	mov	w2, w0
-.L733:
+.L734:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR140
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR7
@@ -5092,17 +5086,17 @@ FlashLoadPhyInfoInRam:
 	bl	ftl_memcpy
 	mov	w2, 32
 	mov	x1, x20
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	bl	ftl_memcpy
-	b	.L728
-.L729:
+	b	.L729
+.L730:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 73
-	bne	.L731
+	cmp	x10, 74
+	bne	.L732
 	mov	w19, -1
-.L728:
+.L729:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -5114,15 +5108,15 @@ FlashLoadPhyInfoInRam:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L738:
+.L739:
 	cmp	w2, w3
-	bhi	.L739
+	bhi	.L740
 	ret
-.L739:
+.L740:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L738
+	b	.L739
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.NandcCopy1KB,"ax",@progbits
 	.align	2
@@ -5141,15 +5135,15 @@ NandcCopy1KB:
 	ubfiz	x0, x19, 9, 8
 	mov	x20, x4
 	add	x0, x2, x0
-	bne	.L741
-	cbz	x3, .L742
+	bne	.L742
+	cbz	x3, .L743
 	tst	x3, 3
-	bne	.L743
+	bne	.L744
 	mov	w2, 256
 	mov	x1, x3
 	bl	ftl_memcpy32
-.L742:
-	cbz	x20, .L740
+.L743:
+	cbz	x20, .L741
 	ldrb	w0, [x20]
 	lsr	w19, w19, 1
 	ldrb	w1, [x20, 1]
@@ -5161,26 +5155,26 @@ NandcCopy1KB:
 	mov	w1, 12
 	mul	w19, w19, w1
 	str	w0, [x21, w19, sxtw 2]
-.L740:
+.L741:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L743:
+.L744:
 	mov	w2, 1024
 	mov	x1, x3
 	bl	ftl_memcpy
-	b	.L742
-.L741:
-	cbz	x3, .L746
+	b	.L743
+.L742:
+	cbz	x3, .L747
 	tst	x3, 3
-	bne	.L747
+	bne	.L748
 	mov	x1, x0
 	mov	w2, 256
 	mov	x0, x3
 	bl	ftl_memcpy32
-.L746:
-	cbz	x20, .L740
+.L747:
+	cbz	x20, .L741
 	lsr	w19, w19, 1
 	mov	w0, 12
 	mul	w19, w19, w0
@@ -5192,13 +5186,13 @@ NandcCopy1KB:
 	lsr	w0, w0, 24
 	strb	w1, [x20, 2]
 	strb	w0, [x20, 3]
-	b	.L740
-.L747:
+	b	.L741
+.L748:
 	mov	x1, x0
 	mov	w2, 1024
 	mov	x0, x3
 	bl	ftl_memcpy
-	b	.L746
+	b	.L747
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",@progbits
 	.align	2
@@ -5222,14 +5216,14 @@ NandcXferData:
 	and	w24, w2, 255
 	mov	x21, x4
 	ldr	x19, [x0, x1]
-	bne	.L760
-	cbnz	x4, .L761
+	bne	.L761
+	cbnz	x4, .L762
 	add	x21, x29, 128
 	mov	w2, 64
 	mov	w1, 255
 	add	x0, x29, 128
 	bl	ftl_memset
-.L761:
+.L762:
 	mov	x5, x21
 	mov	x4, x26
 	mov	w2, w24
@@ -5239,12 +5233,12 @@ NandcXferData:
 	bl	NandcXferStart
 	mov	w0, w25
 	bl	NandcXferComp
-	cbnz	w20, .L785
-	adrp	x0, .LANCHOR30
-	adrp	x4, .LANCHOR33
+	cbnz	w20, .L786
+	adrp	x0, .LANCHOR31
+	adrp	x4, .LANCHOR34
 	mov	x1, x0
-	add	x4, x4, :lo12:.LANCHOR33
-	ldr	w2, [x0, #:lo12:.LANCHOR30]
+	add	x4, x4, :lo12:.LANCHOR34
+	ldr	w2, [x0, #:lo12:.LANCHOR31]
 	mov	w0, 128
 	mov	w3, 64
 	cmp	w2, 25
@@ -5252,38 +5246,38 @@ NandcXferData:
 	add	x2, x21, x2, lsl 2
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L764:
+.L765:
 	add	w5, w3, w0
 	cmp	x21, x2
-	bne	.L765
-	adrp	x0, .LANCHOR32
-	ldr	w4, [x1, #:lo12:.LANCHOR30]
+	bne	.L766
+	adrp	x0, .LANCHOR33
+	ldr	w4, [x1, #:lo12:.LANCHOR31]
 	lsr	w24, w24, 2
 	mov	w2, 0
-	ldr	w3, [x0, #:lo12:.LANCHOR32]
+	ldr	w3, [x0, #:lo12:.LANCHOR33]
 	mov	w22, 0
-.L766:
+.L767:
 	cmp	w2, w24
-	bcs	.L762
-	cbnz	w4, .L772
-.L762:
+	bcs	.L763
+	cbnz	w4, .L773
+.L763:
 	str	wzr, [x19, 16]
-.L773:
-	adrp	x0, .LANCHOR32
-	ldr	w0, [x0, #:lo12:.LANCHOR32]
+.L774:
+	adrp	x0, .LANCHOR33
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w0, 5
-	bls	.L759
-	cbnz	w20, .L759
+	bls	.L760
+	cbnz	w20, .L760
 	ldr	w0, [x19]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	and	w1, w0, w1
 	cmp	w1, 139264
-	bne	.L759
+	bne	.L760
 	orr	w0, w0, 131072
 	mov	w22, -1
 	str	w0, [x19]
-.L759:
+.L760:
 	mov	w0, w22
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5292,7 +5286,7 @@ NandcXferData:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L765:
+.L766:
 	ldr	x6, [x4, 8]
 	and	x0, x0, 4294967292
 	add	x21, x21, 4
@@ -5305,18 +5299,18 @@ NandcXferData:
 	lsr	w0, w0, 24
 	strb	w0, [x21, -1]
 	mov	w0, w5
-	b	.L764
-.L772:
+	b	.L765
+.L773:
 	uxtw	x0, w2
 	add	x0, x0, 8
 	ldr	w0, [x19, x0, lsl 2]
 	str	w0, [x29, 120]
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L788
+	tbnz	x0, 2, .L789
 	ldr	w0, [x29, 120]
-	tbnz	x0, 15, .L788
+	tbnz	x0, 15, .L789
 	cmp	w3, 5
-	bls	.L768
+	bls	.L769
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5329,26 +5323,26 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L769
+	bls	.L770
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 27, 1
-.L794:
+.L795:
 	orr	w0, w1, w0, lsl 5
-.L770:
+.L771:
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L767:
+.L768:
 	add	w2, w2, 1
-	b	.L766
-.L769:
+	b	.L767
+.L770:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 29, 1
-	b	.L794
-.L768:
+	b	.L795
+.L769:
 	cmp	w3, 3
-	bls	.L789
+	bls	.L790
 	ldr	w1, [x29, 120]
 	ubfx	x6, x1, 3, 5
 	ldr	w1, [x29, 120]
@@ -5361,45 +5355,45 @@ NandcXferData:
 	orr	w0, w5, w0, lsl 5
 	cmp	w1, w0
 	ldr	w0, [x29, 120]
-	bls	.L771
+	bls	.L772
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 28, 1
-	b	.L794
-.L771:
+	b	.L795
+.L772:
 	ubfx	x1, x0, 16, 5
 	ldr	w0, [x29, 120]
 	ubfx	x0, x0, 30, 1
-	b	.L794
-.L789:
+	b	.L795
+.L790:
 	mov	w0, 0
-	b	.L770
-.L788:
+	b	.L771
+.L789:
 	mov	w22, -1
-	b	.L767
-.L785:
+	b	.L768
+.L786:
 	mov	w22, 0
-	b	.L762
-.L760:
+	b	.L763
+.L761:
 	cmp	w20, 1
-	bne	.L774
+	bne	.L775
 	cmp	x4, 0
 	mov	w23, 2
 	csel	w23, w23, wzr, ne
 	mov	w27, 0
 	lsl	w23, w23, 1
 	mov	w22, 0
-.L775:
+.L776:
 	cmp	w22, w24
-	bcc	.L777
+	bcc	.L778
 	mov	w22, 0
-	b	.L773
-.L777:
+	b	.L774
+.L778:
 	and	w28, w22, 3
-	cbz	x26, .L790
+	cbz	x26, .L791
 	lsl	w3, w22, 9
 	add	x3, x26, x3
-.L776:
+.L777:
 	add	x4, x21, x27, uxtw
 	mov	w2, w28
 	mov	w1, 1
@@ -5416,11 +5410,11 @@ NandcXferData:
 	add	w27, w27, w23
 	mov	w0, w25
 	bl	NandcXferComp
-	b	.L775
-.L790:
-	mov	x3, 0
 	b	.L776
-.L774:
+.L791:
+	mov	x3, 0
+	b	.L777
+.L775:
 	mov	w0, w25
 	mov	x5, 0
 	mov	x4, 0
@@ -5436,16 +5430,16 @@ NandcXferData:
 	lsl	w0, w27, 1
 	mov	w22, 0
 	str	w0, [x29, 108]
-.L778:
+.L779:
 	cmp	w24, w23
-	bls	.L773
+	bls	.L774
 	mov	w0, w25
 	bl	NandcXferComp
 	ldr	w0, [x19, 32]
 	add	w27, w23, 2
 	str	w0, [x29, 120]
 	cmp	w24, w27
-	bls	.L779
+	bls	.L780
 	mov	x5, 0
 	mov	x4, 0
 	and	w3, w27, 3
@@ -5453,9 +5447,9 @@ NandcXferData:
 	mov	w1, 0
 	mov	w0, w25
 	bl	NandcXferStart
-.L779:
+.L780:
 	ldr	w0, [x29, 120]
-	tbnz	x0, 2, .L791
+	tbnz	x0, 2, .L792
 	ldr	w0, [x29, 120]
 	ubfx	x1, x0, 3, 5
 	ldr	w0, [x29, 120]
@@ -5463,12 +5457,12 @@ NandcXferData:
 	orr	w0, w1, w0, lsl 5
 	cmp	w22, w0
 	csel	w22, w22, w0, cs
-.L780:
+.L781:
 	and	w2, w23, 3
-	cbz	x26, .L792
+	cbz	x26, .L793
 	lsl	w3, w23, 9
 	add	x3, x26, x3
-.L781:
+.L782:
 	add	x4, x21, x28, uxtw
 	mov	x0, x19
 	mov	w1, 0
@@ -5476,13 +5470,13 @@ NandcXferData:
 	ldr	w0, [x29, 108]
 	mov	w23, w27
 	add	w28, w28, w0
-	b	.L778
-.L791:
-	mov	w22, -1
-	b	.L780
+	b	.L779
 .L792:
-	mov	x3, 0
+	mov	w22, -1
 	b	.L781
+.L793:
+	mov	x3, 0
+	b	.L782
 	.size	NandcXferData, .-NandcXferData
 	.section	.text.FlashReadRawPage,"ax",@progbits
 	.align	2
@@ -5496,11 +5490,11 @@ FlashReadRawPage:
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
 	str	x23, [sp, 48]
-	adrp	x1, .LANCHOR29+9
+	adrp	x1, .LANCHOR30+9
 	mov	x22, x2
 	mov	x23, x3
-	ldrb	w20, [x1, #:lo12:.LANCHOR29+9]
-	bne	.L796
+	ldrb	w20, [x1, #:lo12:.LANCHOR30+9]
+	bne	.L797
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
@@ -5509,7 +5503,7 @@ FlashReadRawPage:
 	cmp	w0, w21
 	mov	w0, 4
 	csel	w20, w20, w0, ls
-.L796:
+.L797:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -5557,12 +5551,12 @@ FlashDdrTunningRead:
 	mov	w26, w4
 	ldr	w0, [x0, 304]
 	str	w0, [x29, 108]
-	adrp	x0, .LANCHOR32
-	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR33
+	ldr	w0, [x0, #:lo12:.LANCHOR33]
 	cmp	w0, 8
 	mov	w0, 12
 	csel	w22, w22, w0, cc
-	cbz	w4, .L812
+	cbz	w4, .L813
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
@@ -5581,10 +5575,10 @@ FlashDdrTunningRead:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
 	cmn	w21, #1
-	bne	.L801
-.L810:
+	bne	.L802
+.L811:
 	mov	w21, -1
-.L798:
+.L799:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -5593,30 +5587,30 @@ FlashDdrTunningRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L801:
+.L802:
 	mov	w1, w25
 	mov	w2, w21
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
 	bl	printf
-	adrp	x1, .LANCHOR142
-	ldr	w0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR141
+	ldr	w0, [x1, #:lo12:.LANCHOR141]
 	add	w0, w0, 1
 	cmp	w0, 2047
-	bhi	.L803
-	str	w0, [x1, #:lo12:.LANCHOR142]
-	b	.L798
-.L803:
-	str	wzr, [x1, #:lo12:.LANCHOR142]
+	bhi	.L804
+	str	w0, [x1, #:lo12:.LANCHOR141]
+	b	.L799
+.L804:
+	str	wzr, [x1, #:lo12:.LANCHOR141]
 	mov	x28, 0
 	mov	x23, 0
-.L800:
+.L801:
 	mov	w5, 0
 	mov	w20, 0
 	mov	w6, 0
 	mov	w19, 0
 	mov	w27, -1
-.L808:
+.L809:
 	stp	w5, w6, [x29, 100]
 	mov	w0, w22
 	bl	NandcSetDdrPara
@@ -5628,65 +5622,65 @@ FlashDdrTunningRead:
 	add	w1, w21, 1
 	cmp	w0, w1
 	ldp	w5, w6, [x29, 100]
-	bhi	.L804
+	bhi	.L805
 	cmp	w0, 2
-	bhi	.L814
+	bhi	.L815
 	add	w19, w19, 1
 	cmp	w19, 9
-	bls	.L814
+	bls	.L815
 	mov	w1, w20
 	mov	w21, w0
 	sub	w20, w22, w19
 	mov	w27, 0
-.L806:
+.L807:
 	cmp	w19, w6
 	csel	w20, w20, w1, hi
-.L807:
-	cbz	w20, .L809
+.L808:
+	cbz	w20, .L810
 	mov	w1, w20
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
 	bl	printf
 	mov	w0, w20
 	bl	NandcSetDdrPara
-.L809:
-	cbz	w27, .L798
-	adrp	x0, .LC9
+.L810:
+	cbz	w27, .L799
+	adrp	x0, .LC12
 	mov	w2, w25
 	mov	w1, w24
-	add	x0, x0, :lo12:.LC9
+	add	x0, x0, :lo12:.LC12
 	bl	printf
-	cbz	w26, .L810
+	cbz	w26, .L811
 	ldr	w1, [x29, 108]
 	lsr	w0, w1, 8
 	bl	NandcSetDdrPara
-	b	.L798
-.L812:
+	b	.L799
+.L813:
 	mov	w21, 1024
-	b	.L800
-.L804:
+	b	.L801
+.L805:
 	cmp	w19, w6
-	bls	.L815
+	bls	.L816
 	sub	w20, w5, w19
 	cmp	w19, 7
-	bhi	.L807
+	bhi	.L808
 	mov	w6, w19
-.L815:
+.L816:
 	mov	w19, 0
-	b	.L805
-.L814:
+	b	.L806
+.L815:
 	mov	w5, w22
 	mov	w21, w0
 	mov	w27, 0
 	mov	x28, 0
 	mov	x23, 0
-.L805:
+.L806:
 	add	w22, w22, 2
 	cmp	w22, 69
-	bls	.L808
+	bls	.L809
 	mov	w1, w20
 	mov	w20, w5
-	b	.L806
+	b	.L807
 	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
 	.section	.text.FlashReadPage,"ax",@progbits
 	.align	2
@@ -5707,14 +5701,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L825
+	bne	.L826
 	adrp	x24, .LANCHOR5
 	ldrb	w25, [x24, #:lo12:.LANCHOR5]
-	cbnz	w25, .L826
-.L828:
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L825
+	cbnz	w25, .L827
+.L829:
+	adrp	x0, .LANCHOR29
+	ldrb	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L826
 	adrp	x0, .LANCHOR19
 	mov	w4, 1
 	mov	x3, x23
@@ -5726,16 +5720,16 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L829
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	beq	.L830
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	cmp	w19, w0, lsr 1
-	bls	.L825
-.L829:
+	bls	.L826
+.L830:
 	lsr	w0, w24, 8
 	bl	NandcSetDdrPara
-	b	.L825
-.L826:
+	b	.L826
+.L827:
 	strb	wzr, [x24, #:lo12:.LANCHOR5]
 	mov	x3, x23
 	mov	x2, x22
@@ -5744,14 +5738,14 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	w25, [x24, #:lo12:.LANCHOR5]
 	cmn	w0, #1
-	beq	.L828
+	beq	.L829
 	mov	w19, w0
-.L825:
-	adrp	x24, .LANCHOR143
-	ldr	x4, [x24, #:lo12:.LANCHOR143]
-	cbz	x4, .L824
+.L826:
+	adrp	x24, .LANCHOR142
+	ldr	x4, [x24, #:lo12:.LANCHOR142]
+	cbz	x4, .L825
 	cmn	w19, #1
-	bne	.L824
+	bne	.L825
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5761,17 +5755,17 @@ FlashReadPage:
 	mov	w1, w0
 	mov	w3, w21
 	mov	w2, w20
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
 	bl	printf
 	cmn	w19, #1
-	bne	.L824
+	bne	.L825
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L824
+	cbz	w0, .L825
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-	ldr	x4, [x24, #:lo12:.LANCHOR143]
+	ldr	x4, [x24, #:lo12:.LANCHOR142]
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w21
@@ -5780,7 +5774,7 @@ FlashReadPage:
 	mov	w19, w0
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-.L824:
+.L825:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -5816,30 +5810,30 @@ FlashDdrParaScan:
 	mov	x2, 0
 	mov	w0, w20
 	mov	w1, w21
-	adrp	x20, .LANCHOR28
+	adrp	x20, .LANCHOR29
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L845
+	beq	.L846
 	cmn	w22, #1
-	bne	.L846
-.L845:
+	bne	.L847
+.L846:
 	ldrb	w0, [x19, #:lo12:.LANCHOR24]
-	tbz	x0, 0, .L846
+	tbz	x0, 0, .L847
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-	strb	wzr, [x20, #:lo12:.LANCHOR28]
-.L847:
+	strb	wzr, [x20, #:lo12:.LANCHOR29]
+.L848:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L846:
+.L847:
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR28]
-	b	.L847
+	strb	w0, [x20, #:lo12:.LANCHOR29]
+	b	.L848
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
 	.section	.text.FlashLoadPhyInfo,"ax",@progbits
 	.align	2
@@ -5850,9 +5844,9 @@ FlashLoadPhyInfo:
 	mov	w0, 60
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR29
+	adrp	x20, .LANCHOR30
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR145
+	adrp	x22, .LANCHOR144
 	strb	w0, [x29, 120]
 	mov	w0, 40
 	strb	w0, [x29, 121]
@@ -5860,116 +5854,116 @@ FlashLoadPhyInfo:
 	strb	w0, [x29, 122]
 	mov	w0, 16
 	strb	w0, [x29, 123]
-	add	x0, x20, :lo12:.LANCHOR29
+	add	x0, x20, :lo12:.LANCHOR30
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR144
-	adrp	x24, .LANCHOR146
+	adrp	x21, .LANCHOR143
+	adrp	x24, .LANCHOR145
 	stp	x25, x26, [sp, 64]
 	ldrh	w0, [x0, 10]
 	adrp	x26, .LANCHOR7
 	str	w0, [x29, 108]
 	mov	w19, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	ldr	x0, [x22, #:lo12:.LANCHOR144]
 	mov	w25, 4
-	str	x0, [x21, #:lo12:.LANCHOR144]
+	str	x0, [x21, #:lo12:.LANCHOR143]
 	mov	w23, -1
 	stp	x27, x28, [sp, 80]
 	add	x26, x26, :lo12:.LANCHOR7
-	str	wzr, [x24, #:lo12:.LANCHOR146]
+	str	wzr, [x24, #:lo12:.LANCHOR145]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L856:
+.L857:
 	add	w28, w19, 1
 	mov	x27, 0
-.L858:
+.L859:
 	add	x0, x29, 120
 	ldrb	w0, [x0, x27]
 	bl	FlashBchSel
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	x3, 0
 	mov	w1, w19
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L857
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	bne	.L858
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	x3, 0
 	mov	w1, w28
 	mov	w0, 0
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	bne	.L857
+	bne	.L858
 	add	x27, x27, 1
 	cmp	x27, 4
-	bne	.L858
-.L859:
+	bne	.L859
+.L860:
 	ldr	w0, [x29, 108]
 	subs	w25, w25, #1
 	add	w19, w19, w0
-	bne	.L856
-	b	.L864
-.L860:
+	bne	.L857
+	b	.L865
+.L861:
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L866
-	add	x23, x20, :lo12:.LANCHOR29
+	bne	.L867
+	add	x23, x20, :lo12:.LANCHOR30
 	add	x1, x6, 160
 	mov	w2, 32
 	mov	x0, x23
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	ldr	x1, [x21, #:lo12:.LANCHOR143]
 	mov	w2, 32
 	mov	x0, x26
 	add	x1, x1, 192
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	ldr	x1, [x21, #:lo12:.LANCHOR143]
 	mov	w2, 852
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x1, x1, 224
 	bl	ftl_memcpy
-	ldr	x1, [x21, #:lo12:.LANCHOR144]
-	adrp	x0, .LANCHOR28
-	str	w19, [x24, #:lo12:.LANCHOR146]
+	ldr	x1, [x21, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR29
+	str	w19, [x24, #:lo12:.LANCHOR145]
 	ldr	w2, [x1, 1076]
-	strb	w2, [x0, #:lo12:.LANCHOR28]
+	strb	w2, [x0, #:lo12:.LANCHOR29]
 	ldrh	w0, [x23, 10]
-	adrp	x2, .LANCHOR147
+	adrp	x2, .LANCHOR146
 	udiv	w0, w19, w0
 	add	w3, w0, 1
-	cbz	w0, .L862
-	str	w3, [x2, #:lo12:.LANCHOR147]
-.L863:
-	adrp	x0, .LANCHOR148
+	cbz	w0, .L863
+	str	w3, [x2, #:lo12:.LANCHOR146]
+.L864:
+	adrp	x0, .LANCHOR147
 	ldrh	w1, [x1, 14]
 	mov	w23, 0
-	strb	w1, [x0, #:lo12:.LANCHOR148]
-	b	.L859
-.L862:
+	strb	w1, [x0, #:lo12:.LANCHOR147]
+	b	.L860
+.L863:
 	mov	w0, 2
-	str	w0, [x2, #:lo12:.LANCHOR147]
-	b	.L863
-.L866:
+	str	w0, [x2, #:lo12:.LANCHOR146]
+	b	.L864
+.L867:
 	mov	w23, -1
-	b	.L859
-.L857:
-	ldr	x6, [x21, #:lo12:.LANCHOR144]
+	b	.L860
+.L858:
+	ldr	x6, [x21, #:lo12:.LANCHOR143]
 	mov	w1, 20036
 	movk	w1, 0x4e41, lsl 16
 	ldr	w0, [x6]
 	cmp	w0, w1
-	bne	.L859
-	cbnz	w23, .L860
-	add	x20, x20, :lo12:.LANCHOR29
+	bne	.L860
+	cbnz	w23, .L861
+	add	x20, x20, :lo12:.LANCHOR30
 	ldrh	w0, [x20, 10]
 	udiv	w19, w19, w0
-	adrp	x0, .LANCHOR147
+	adrp	x0, .LANCHOR146
 	add	w19, w19, 1
-	str	w19, [x0, #:lo12:.LANCHOR147]
-.L864:
+	str	w19, [x0, #:lo12:.LANCHOR146]
+.L865:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	mov	w0, w23
@@ -6014,34 +6008,34 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	add	x19, x22, x19, lsl 8
 	cmp	w0, 1
-	bls	.L886
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	cbz	w0, .L887
+	bls	.L887
+	adrp	x0, .LANCHOR29
+	ldrb	w0, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L888
 	mov	w23, 1
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L871:
+.L872:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L870:
+.L871:
 	ldrsw	x0, [x29, 124]
 	mov	w20, 1
 	mov	w24, -1
 	add	x0, x0, 8
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L872:
-	adrp	x0, .LANCHOR149
-	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+.L873:
+	adrp	x0, .LANCHOR148
+	ldrb	w0, [x0, #:lo12:.LANCHOR148]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L881
+	bcc	.L882
 	mov	w28, w24
-.L880:
+.L881:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6049,29 +6043,29 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L882
+	bhi	.L883
 	bl	SandiskSetRRPara
-.L883:
+.L884:
 	ldrsw	x0, [x29, 124]
 	add	x0, x0, 8
 	add	x22, x22, x0, lsl 8
 	mov	w0, 255
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L884
+	bcc	.L885
 	cmn	w28, #1
 	mov	w0, 256
 	csel	w28, w28, w0, eq
-.L884:
+.L885:
 	mov	w0, w21
 	bl	NandcWaitFlashReady
-	cbz	w23, .L869
+	cbz	w23, .L870
 	mov	w0, 4
 	bl	NandcSetDdrMode
-.L869:
+.L870:
 	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6080,13 +6074,13 @@ ToshibaReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
+.L888:
+	mov	w23, 0
+	b	.L872
 .L887:
 	mov	w23, 0
 	b	.L871
-.L886:
-	mov	w23, 0
-	b	.L870
-.L881:
+.L882:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
@@ -6094,28 +6088,28 @@ ToshibaReadRetrial:
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x19
-	bhi	.L873
+	bhi	.L874
 	bl	SandiskSetRRPara
-.L874:
+.L875:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
 	cmp	w0, 34
-	bne	.L875
-	adrp	x0, .LANCHOR149
-	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	bne	.L876
+	adrp	x0, .LANCHOR148
+	ldrb	w0, [x0, #:lo12:.LANCHOR148]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L875
+	bne	.L876
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L875:
+.L876:
 	add	x0, x22, x27, lsl 8
 	mov	w1, 38
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
-	cbz	w23, .L876
+	cbz	w23, .L877
 	mov	w0, 4
 	bl	NandcSetDdrMode
 	ldr	w1, [x29, 120]
@@ -6126,35 +6120,35 @@ ToshibaReadRetrial:
 	mov	w28, w0
 	mov	w0, 0
 	bl	NandcSetDdrMode
-.L877:
+.L878:
 	cmn	w28, #1
-	beq	.L878
-	adrp	x0, .LANCHOR31
+	beq	.L879
+	adrp	x0, .LANCHOR32
 	cmn	w24, #1
 	csel	w24, w24, w28, ne
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bcc	.L880
+	bcc	.L881
 	mov	x26, 0
 	mov	x25, 0
-.L878:
+.L879:
 	add	w20, w20, 1
-	b	.L872
-.L873:
+	b	.L873
+.L874:
 	bl	ToshibaSetRRPara
-	b	.L874
-.L876:
+	b	.L875
+.L877:
 	ldr	w1, [x29, 120]
 	mov	x3, x26
 	mov	x2, x25
 	mov	w0, w21
 	bl	FlashReadRawPage
 	mov	w28, w0
-	b	.L877
-.L882:
+	b	.L878
+.L883:
 	bl	ToshibaSetRRPara
-	b	.L883
+	b	.L884
 	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
 	.section	.text.SamsungReadRetrial,"ax",@progbits
 	.align	2
@@ -6174,38 +6168,38 @@ SamsungReadRetrial:
 	str	x27, [sp, 80]
 	mov	x25, x3
 	bl	NandcWaitFlashReady
-	adrp	x26, .LANCHOR149
+	adrp	x26, .LANCHOR148
 	sbfiz	x1, x22, 4, 32
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x27, .LANCHOR31
+	adrp	x27, .LANCHOR32
 	add	x2, x0, x1
-	add	x26, x26, :lo12:.LANCHOR149
-	add	x27, x27, :lo12:.LANCHOR31
+	add	x26, x26, :lo12:.LANCHOR148
+	add	x27, x27, :lo12:.LANCHOR32
 	mov	w21, 1
 	ldr	x0, [x0, x1]
 	mov	w19, -1
 	ldrb	w20, [x2, 8]
 	add	x20, x20, 8
 	add	x20, x0, x20, lsl 8
-.L898:
+.L899:
 	ldrb	w0, [x26]
 	add	w0, w0, 1
 	cmp	w21, w0
-	bcc	.L902
-.L901:
+	bcc	.L903
+.L902:
 	mov	x0, x20
 	mov	w1, 0
 	bl	SamsungSetRRPara
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L897
+	bcc	.L898
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L897:
+.L898:
 	mov	w0, w19
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -6214,7 +6208,7 @@ SamsungReadRetrial:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L902:
+.L903:
 	mov	w1, w21
 	mov	x0, x20
 	bl	SamsungSetRRPara
@@ -6224,21 +6218,21 @@ SamsungReadRetrial:
 	mov	w0, w22
 	bl	FlashReadRawPage
 	cmn	w0, #1
-	beq	.L899
+	beq	.L900
 	ldrb	w1, [x27]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L904
+	bcc	.L905
 	mov	x25, 0
 	mov	x24, 0
-.L899:
+.L900:
 	add	w21, w21, 1
-	b	.L898
-.L904:
+	b	.L899
+.L905:
 	mov	w19, w0
-	b	.L901
+	b	.L902
 	.size	SamsungReadRetrial, .-SamsungReadRetrial
 	.section	.text.MicronReadRetrial,"ax",@progbits
 	.align	2
@@ -6249,29 +6243,29 @@ MicronReadRetrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	w24, w1
-	ldrb	w20, [x0, #:lo12:.LANCHOR31]
+	ldrb	w20, [x0, #:lo12:.LANCHOR32]
 	adrp	x0, .LANCHOR8
 	stp	x21, x22, [sp, 32]
 	mov	x25, x2
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	mov	x26, x3
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L912
+	cbnz	w0, .L913
 	add	w20, w20, w20, lsl 1
 	asr	w20, w20, 2
-.L913:
+.L914:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	sbfiz	x1, x23, 4, 32
 	adrp	x0, .LANCHOR6
 	add	x0, x0, :lo12:.LANCHOR6
-	adrp	x28, .LANCHOR149
+	adrp	x28, .LANCHOR148
 	add	x2, x0, x1
-	add	x28, x28, :lo12:.LANCHOR149
+	add	x28, x28, :lo12:.LANCHOR148
 	mov	w27, 0
 	mov	w19, -1
 	ldr	x4, [x0, x1]
@@ -6279,11 +6273,11 @@ MicronReadRetrial:
 	ldrb	w21, [x2, 8]
 	mov	w7, 137
 	add	x22, x4, x21, lsl 8
-.L914:
+.L915:
 	ldrb	w0, [x28]
 	cmp	w27, w0
-	bcc	.L918
-.L917:
+	bcc	.L919
+.L918:
 	add	x21, x4, x21, lsl 8
 	mov	w0, 239
 	str	w0, [x21, 2056]
@@ -6296,22 +6290,22 @@ MicronReadRetrial:
 	cmp	w19, w20
 	str	wzr, [x21, 2048]
 	str	wzr, [x21, 2048]
-	bcc	.L919
+	bcc	.L920
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L919:
+.L920:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L911
-	adrp	x0, .LC11
+	bne	.L912
+	adrp	x0, .LC14
 	mov	w4, w19
 	mov	w3, w27
 	mov	w2, w24
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC11
+	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L911:
+.L912:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6320,11 +6314,11 @@ MicronReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L912:
+.L913:
 	mov	w0, 3
 	sdiv	w20, w20, w0
-	b	.L913
-.L918:
+	b	.L914
+.L919:
 	str	w6, [x22, 2056]
 	mov	x0, 200
 	str	w7, [x22, 2052]
@@ -6346,19 +6340,19 @@ MicronReadRetrial:
 	ldp	w6, w7, [x29, 116]
 	ldr	w5, [x29, 124]
 	ldr	x4, [x29, 104]
-	beq	.L915
+	beq	.L916
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
 	cmp	w0, w20
-	bcc	.L921
+	bcc	.L922
 	mov	x26, 0
 	mov	x25, 0
-.L915:
+.L916:
 	mov	w27, w5
-	b	.L914
-.L921:
+	b	.L915
+.L922:
 	mov	w19, w0
-	b	.L917
+	b	.L918
 	.size	MicronReadRetrial, .-MicronReadRetrial
 	.section	.text.HynixReadRetrial,"ax",@progbits
 	.align	2
@@ -6386,38 +6380,38 @@ HynixReadRetrial:
 	ldrb	w20, [x0, 12]
 	ldrb	w1, [x1, 19]
 	cmp	w1, 7
-	bne	.L932
+	bne	.L933
 	ldrb	w20, [x0, 20]
-.L932:
+.L933:
 	mov	w0, w23
 	bl	NandcWaitFlashReady
 	add	x6, x19, :lo12:.LANCHOR20
-	adrp	x5, .LANCHOR31
+	adrp	x5, .LANCHOR32
 	add	x7, x6, 4
-	add	x5, x5, :lo12:.LANCHOR31
+	add	x5, x5, :lo12:.LANCHOR32
 	mov	w4, 0
 	mov	w21, -1
-.L933:
+.L934:
 	cmp	w4, w24
-	bcc	.L938
-.L937:
+	bcc	.L939
+.L938:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	add	x19, x19, :lo12:.LANCHOR20
 	add	x19, x19, x28
 	ldrb	w0, [x0, 19]
 	cmp	w0, 7
-	bne	.L939
+	bne	.L940
 	strb	w20, [x19, 20]
-.L940:
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+.L941:
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w21, w0, lsr 2
-	bcc	.L931
+	bcc	.L932
 	cmn	w21, #1
 	mov	w0, 256
 	csel	w21, w21, w0, eq
-.L931:
+.L932:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6426,7 +6420,7 @@ HynixReadRetrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L938:
+.L939:
 	add	w20, w20, 1
 	ldrb	w1, [x6, 1]
 	and	w20, w20, 255
@@ -6448,24 +6442,24 @@ HynixReadRetrial:
 	ldr	w4, [x29, 108]
 	ldr	x5, [x29, 96]
 	ldp	x7, x6, [x29, 112]
-	beq	.L935
+	beq	.L936
 	ldrb	w1, [x5]
 	cmn	w21, #1
 	csel	w21, w21, w0, ne
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L942
+	bcc	.L943
 	mov	x27, 0
 	mov	x26, 0
-.L935:
+.L936:
 	add	w4, w4, 1
-	b	.L933
-.L942:
+	b	.L934
+.L943:
 	mov	w21, w0
-	b	.L937
-.L939:
+	b	.L938
+.L940:
 	strb	w20, [x19, 12]
-	b	.L940
+	b	.L941
 	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",@progbits
 	.align	2
@@ -6477,25 +6471,25 @@ FlashProgPage:
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x1, .LANCHOR29+9
+	adrp	x1, .LANCHOR30+9
 	str	x23, [sp, 48]
 	mov	x22, x2
-	ldrb	w21, [x1, #:lo12:.LANCHOR29+9]
+	ldrb	w21, [x1, #:lo12:.LANCHOR30+9]
 	ands	w19, w0, 255
 	mov	x23, x3
-	bne	.L950
+	bne	.L951
 	adrp	x0, .LANCHOR2
 	adrp	x1, .LANCHOR3
 	ldrb	w0, [x0, #:lo12:.LANCHOR2]
 	ldr	w1, [x1, #:lo12:.LANCHOR3]
 	mul	w0, w0, w1
 	cmp	w0, w20
-	bls	.L950
+	bls	.L951
 	adrp	x0, .LANCHOR1
 	ldrb	w0, [x0, #:lo12:.LANCHOR1]
-	cbnz	w0, .L951
+	cbnz	w0, .L952
 	sub	w21, w21, #2
-.L950:
+.L951:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
 	mov	w0, w19
@@ -6526,9 +6520,9 @@ FlashProgPage:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L951:
+.L952:
 	mov	w21, 4
-	b	.L950
+	b	.L951
 	.size	FlashProgPage, .-FlashProgPage
 	.section	.text.FlashSavePhyInfo,"ax",@progbits
 	.align	2
@@ -6538,30 +6532,30 @@ FlashSavePhyInfo:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR145
+	adrp	x22, .LANCHOR144
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR144
-	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	adrp	x19, .LANCHOR143
+	ldr	x0, [x22, #:lo12:.LANCHOR144]
 	adrp	x21, .LANCHOR3
-	str	x0, [x19, #:lo12:.LANCHOR144]
+	str	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w20, 0
-	adrp	x0, .LANCHOR150
+	adrp	x0, .LANCHOR149
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	mov	w25, 20036
-	ldrb	w0, [x0, #:lo12:.LANCHOR150]
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
 	movk	w25, 0x4e41, lsl 16
-	adrp	x24, .LANCHOR151
-	adrp	x26, .LANCHOR147
+	adrp	x24, .LANCHOR150
+	adrp	x26, .LANCHOR146
 	mov	w23, 0
 	add	x21, x21, :lo12:.LANCHOR3
-	add	x26, x26, :lo12:.LANCHOR147
+	add	x26, x26, :lo12:.LANCHOR146
 	bl	FlashBchSel
-	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	ldr	x0, [x22, #:lo12:.LANCHOR144]
 	mov	w2, 2048
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	adrp	x1, .LANCHOR25
 	mov	w2, 32
 	add	x0, x0, 16
@@ -6571,54 +6565,54 @@ FlashSavePhyInfo:
 	adrp	x1, .LANCHOR2
 	ldrb	w1, [x1, #:lo12:.LANCHOR2]
 	strh	w1, [x0, -2]
-	adrp	x1, .LANCHOR28
-	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR29
+	ldrb	w1, [x1, #:lo12:.LANCHOR29]
 	str	w1, [x0, 1060]
 	adrp	x1, .LANCHOR22
 	add	x1, x1, :lo12:.LANCHOR22
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 8
 	adrp	x1, .LANCHOR26
 	add	x1, x1, :lo12:.LANCHOR26
 	add	x0, x0, 80
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 32
 	adrp	x1, .LANCHOR17
 	add	x1, x1, :lo12:.LANCHOR17
 	add	x0, x0, 96
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 32
-	adrp	x1, .LANCHOR29
-	add	x1, x1, :lo12:.LANCHOR29
+	adrp	x1, .LANCHOR30
+	add	x1, x1, :lo12:.LANCHOR30
 	add	x0, x0, 160
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 32
 	adrp	x1, .LANCHOR7
 	add	x1, x1, :lo12:.LANCHOR7
 	add	x0, x0, 192
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w2, 852
 	adrp	x1, .LANCHOR20
 	add	x1, x1, :lo12:.LANCHOR20
 	add	x0, x0, 224
 	bl	ftl_memcpy
-	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	ldr	x6, [x19, #:lo12:.LANCHOR143]
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	str	w0, [x6, 8]
 	mov	w0, 1592
 	str	w0, [x6, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR151]
-	str	x0, [x19, #:lo12:.LANCHOR144]
+	ldr	x0, [x24, #:lo12:.LANCHOR150]
+	str	x0, [x19, #:lo12:.LANCHOR143]
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L956:
+.L957:
 	ldr	w1, [x21]
 	mov	w2, 0
 	mov	w0, 0
@@ -6626,49 +6620,49 @@ FlashSavePhyInfo:
 	bl	FlashEraseBlock
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	ldr	x2, [x22, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	mul	w1, w20, w1
 	add	w1, w1, 1
 	bl	FlashProgPage
 	ldr	w1, [x21]
 	mov	x3, 0
-	ldr	x2, [x24, #:lo12:.LANCHOR151]
+	ldr	x2, [x24, #:lo12:.LANCHOR150]
 	mov	w0, 0
 	mul	w1, w20, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	add	w7, w20, 1
-	beq	.L954
-	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	beq	.L955
+	ldr	x6, [x19, #:lo12:.LANCHOR143]
 	ldr	w0, [x6]
 	cmp	w0, w25
-	bne	.L954
+	bne	.L955
 	mov	w1, 2036
 	add	x0, x6, 12
 	bl	JSHash
 	ldr	w1, [x6, 8]
 	cmp	w1, w0
-	bne	.L954
+	bne	.L955
 	ldr	w0, [x21]
 	cmp	w23, 1
 	str	w7, [x26]
 	mul	w20, w0, w20
-	adrp	x0, .LANCHOR146
-	str	w20, [x0, #:lo12:.LANCHOR146]
-	beq	.L957
+	adrp	x0, .LANCHOR145
+	str	w20, [x0, #:lo12:.LANCHOR145]
+	beq	.L958
 	mov	w23, 1
-.L954:
+.L955:
 	mov	w20, w7
 	cmp	w7, 4
-	bne	.L956
-.L955:
+	bne	.L957
+.L956:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	cmp	w23, 0
@@ -6679,9 +6673,9 @@ FlashSavePhyInfo:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L957:
+.L958:
 	mov	w23, 2
-	b	.L955
+	b	.L956
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
 	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
 	.align	2
@@ -6703,19 +6697,19 @@ FlashReadIdbDataRaw:
 	strb	w0, [x29, 138]
 	mov	w0, 16
 	strb	w0, [x29, 139]
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	stp	x19, x20, [sp, 16]
-	ldrb	w26, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LANCHOR152
+	ldrb	w26, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LANCHOR151
 	stp	x21, x22, [sp, 32]
-	ldr	w2, [x0, #:lo12:.LANCHOR152]
+	ldr	w2, [x0, #:lo12:.LANCHOR151]
 	stp	x27, x28, [sp, 80]
 	str	x0, [x29, 120]
 	cmp	w2, w1
-	bne	.L964
+	bne	.L965
 	mov	w0, 0
 	bl	flash_enter_slc_mode
-.L964:
+.L965:
 	adrp	x24, .LANCHOR2
 	adrp	x22, .LANCHOR3
 	add	x27, x29, 136
@@ -6727,22 +6721,22 @@ FlashReadIdbDataRaw:
 	mov	w1, 0
 	mov	x0, x23
 	bl	ftl_memset
-.L965:
+.L966:
 	ldrb	w0, [x24, #:lo12:.LANCHOR2]
 	cmp	w19, w0
-	bcc	.L970
-.L969:
+	bcc	.L971
+.L970:
 	mov	w0, w26
 	bl	FlashBchSel
 	ldr	x0, [x29, 120]
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L963
+	bne	.L964
 	mov	w0, 0
 	bl	flash_exit_slc_mode
-.L963:
+.L964:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -6751,45 +6745,45 @@ FlashReadIdbDataRaw:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L970:
+.L971:
 	mov	x4, 0
-	adrp	x25, .LANCHOR145
-.L967:
+	adrp	x25, .LANCHOR144
+.L968:
 	ldrb	w5, [x4, x27]
-	add	x21, x25, :lo12:.LANCHOR145
+	add	x21, x25, :lo12:.LANCHOR144
 	str	w5, [x29, 116]
 	mov	w0, w5
 	str	x4, [x29, 104]
 	bl	FlashBchSel
 	ldr	w1, [x22]
 	mov	x3, 0
-	ldr	x2, [x25, #:lo12:.LANCHOR145]
+	ldr	x2, [x25, #:lo12:.LANCHOR144]
 	mov	w0, 0
 	mul	w1, w19, w1
 	bl	FlashReadRawPage
 	cmn	w0, #1
 	ldr	w5, [x29, 116]
-	bne	.L966
+	bne	.L967
 	ldr	x4, [x29, 104]
 	add	x4, x4, 1
 	cmp	x4, 4
-	bne	.L967
-.L968:
+	bne	.L968
+.L969:
 	add	w19, w19, 1
-	b	.L965
-.L973:
+	b	.L966
+.L974:
 	mov	w20, 0
-	b	.L969
-.L966:
+	b	.L970
+.L967:
 	ldr	x0, [x21]
 	ldr	w1, [x0]
 	mov	w0, 35899
 	movk	w0, 0xfcdc, lsl 16
 	cmp	w1, w0
-	bne	.L968
+	bne	.L969
 	mov	w1, w5
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
 	bl	printf
 	ldr	x1, [x21]
 	mov	w2, 2048
@@ -6798,14 +6792,14 @@ FlashReadIdbDataRaw:
 	ldr	x0, [x21]
 	ldr	w0, [x0, 512]
 	strb	w0, [x28]
-	adrp	x0, .LANCHOR147
-	ldr	w1, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR146
+	ldr	w1, [x0, #:lo12:.LANCHOR146]
 	cmp	w19, w1
-	bcs	.L973
-	str	w19, [x0, #:lo12:.LANCHOR147]
+	bcs	.L974
+	str	w19, [x0, #:lo12:.LANCHOR146]
 	mov	w20, 0
 	bl	FlashSavePhyInfo
-	b	.L968
+	b	.L969
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
 	.align	2
@@ -6826,56 +6820,56 @@ FlashPageProgMsbFFData:
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
 	ldrb	w0, [x0, 19]
-	cbz	w3, .L977
-	adrp	x2, .LANCHOR152
-	ldr	w3, [x2, #:lo12:.LANCHOR152]
+	cbz	w3, .L978
+	adrp	x2, .LANCHOR151
+	ldr	w3, [x2, #:lo12:.LANCHOR151]
 	mov	w2, 12336
 	movk	w2, 0x5638, lsl 16
 	cmp	w3, w2
-	beq	.L976
-.L977:
+	beq	.L977
+.L978:
 	sub	w0, w0, #5
 	and	w0, w0, 255
 	cmp	w0, 63
-	bhi	.L976
+	bhi	.L977
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x0
-	tbz	x0, 0, .L976
+	tbz	x0, 0, .L977
 	adrp	x20, .LANCHOR117
 	mov	w24, w1
 	add	x20, x20, :lo12:.LANCHOR117
 	mov	w23, 65535
-	adrp	x25, .LANCHOR151
-.L979:
+	adrp	x25, .LANCHOR150
+.L980:
 	ldr	x0, [x22, #:lo12:.LANCHOR18]
 	ldrh	w0, [x0, 10]
 	cmp	w0, w19
-	bhi	.L980
-.L976:
+	bhi	.L981
+.L977:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L980:
+.L981:
 	ldrh	w0, [x20, w19, sxtw 1]
 	cmp	w0, w23
-	bne	.L976
-	ldr	x0, [x25, #:lo12:.LANCHOR151]
+	bne	.L977
+	ldr	x0, [x25, #:lo12:.LANCHOR150]
 	mov	w2, 32768
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x2, [x25, #:lo12:.LANCHOR151]
+	ldr	x2, [x25, #:lo12:.LANCHOR150]
 	add	w1, w19, w24
 	add	w19, w19, 1
 	mov	x3, 0
 	mov	w0, w21
 	and	w19, w19, 65535
 	bl	FlashProgPage
-	b	.L979
+	b	.L980
 	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -6911,33 +6905,38 @@ NandcInit:
 	stp	x29, x30, [sp, -16]!
 	adrp	x2, .LANCHOR6
 	add	x1, x2, :lo12:.LANCHOR6
+	adrp	x4, .LANCHOR151
 	add	x29, sp, 0
 	str	x0, [x2, #:lo12:.LANCHOR6]
 	mov	w2, 1
 	str	w2, [x1, 24]
 	mov	w2, 2
-	str	x0, [x1, 16]
-	str	x0, [x1, 32]
-	str	x0, [x1, 48]
+	str	wzr, [x1, 8]
 	str	w2, [x1, 40]
 	mov	w2, 3
-	str	wzr, [x1, 8]
+	str	x0, [x1, 16]
 	str	w2, [x1, 56]
+	adrp	x2, .LANCHOR152
+	str	x0, [x1, 32]
+	str	x0, [x1, 48]
 	adrp	x1, .LANCHOR19
-	adrp	x2, .LANCHOR153
 	str	x0, [x1, #:lo12:.LANCHOR19]
 	ldr	w1, [x0]
 	ubfx	x3, x1, 13, 1
-	str	w3, [x2, #:lo12:.LANCHOR153]
+	str	w3, [x2, #:lo12:.LANCHOR152]
 	ldr	w2, [x0, 352]
-	adrp	x3, .LANCHOR32
+	adrp	x3, .LANCHOR33
 	and	w1, w1, 245760
 	orr	w1, w1, 256
 	ubfx	x2, x2, 16, 4
-	str	w2, [x3, #:lo12:.LANCHOR32]
-	adrp	x2, .LANCHOR152
-	ldr	w3, [x0, 352]
-	str	w3, [x2, #:lo12:.LANCHOR152]
+	str	w2, [x3, #:lo12:.LANCHOR33]
+	ldr	w2, [x0, 352]
+	str	w2, [x4, #:lo12:.LANCHOR151]
+	cmp	w2, 2049
+	bne	.L990
+	mov	w2, 8
+	str	w2, [x3, #:lo12:.LANCHOR33]
+.L990:
 	str	w1, [x0]
 	mov	w1, 4225
 	str	wzr, [x0, 336]
@@ -6949,17 +6948,17 @@ NandcInit:
 	str	w1, [x0, 304]
 	mov	w0, 36864
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR154
-	adrp	x2, .LANCHOR33
-	str	x0, [x1, #:lo12:.LANCHOR154]
-	add	x1, x2, :lo12:.LANCHOR33
-	str	x0, [x2, #:lo12:.LANCHOR33]
+	adrp	x1, .LANCHOR153
+	adrp	x2, .LANCHOR34
+	str	x0, [x1, #:lo12:.LANCHOR153]
+	add	x1, x2, :lo12:.LANCHOR34
+	str	x0, [x2, #:lo12:.LANCHOR34]
 	add	x0, x0, 32768
 	str	wzr, [x1, 40]
 	str	x0, [x1, 8]
-	adrp	x0, .LANCHOR34
+	adrp	x0, .LANCHOR35
 	ldp	x29, x30, [sp], 16
-	str	wzr, [x0, #:lo12:.LANCHOR34]
+	str	wzr, [x0, #:lo12:.LANCHOR35]
 	ret
 	.size	NandcInit, .-NandcInit
 	.section	.text.FtlMemInit,"ax",@progbits
@@ -6968,24 +6967,26 @@ NandcInit:
 	.type	FtlMemInit, %function
 FtlMemInit:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR137
+	adrp	x0, .LANCHOR136
 	mov	w1, 65535
 	add	x29, sp, 0
-	strh	wzr, [x0, #:lo12:.LANCHOR137]
-	adrp	x0, .LANCHOR155
+	strh	wzr, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR154
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR54
+	str	wzr, [x0, #:lo12:.LANCHOR154]
+	adrp	x0, .LANCHOR155
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR37
 	str	wzr, [x0, #:lo12:.LANCHOR155]
 	adrp	x0, .LANCHOR156
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR36
+	str	x23, [sp, 48]
+	adrp	x21, .LANCHOR57
 	str	wzr, [x0, #:lo12:.LANCHOR156]
 	adrp	x0, .LANCHOR157
-	str	x23, [sp, 48]
-	adrp	x21, .LANCHOR56
+	adrp	x23, .LANCHOR58
 	str	wzr, [x0, #:lo12:.LANCHOR157]
 	adrp	x0, .LANCHOR158
-	adrp	x23, .LANCHOR57
 	str	wzr, [x0, #:lo12:.LANCHOR158]
 	adrp	x0, .LANCHOR159
 	str	wzr, [x0, #:lo12:.LANCHOR159]
@@ -7001,10 +7002,10 @@ FtlMemInit:
 	str	wzr, [x0, #:lo12:.LANCHOR164]
 	adrp	x0, .LANCHOR165
 	str	wzr, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR79
+	str	wzr, [x0, #:lo12:.LANCHOR79]
 	adrp	x0, .LANCHOR166
 	str	wzr, [x0, #:lo12:.LANCHOR166]
-	adrp	x0, .LANCHOR78
-	str	wzr, [x0, #:lo12:.LANCHOR78]
 	adrp	x0, .LANCHOR167
 	str	wzr, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LANCHOR168
@@ -7012,44 +7013,42 @@ FtlMemInit:
 	adrp	x0, .LANCHOR169
 	str	wzr, [x0, #:lo12:.LANCHOR169]
 	adrp	x0, .LANCHOR170
-	str	wzr, [x0, #:lo12:.LANCHOR170]
+	str	w1, [x0, #:lo12:.LANCHOR170]
 	adrp	x0, .LANCHOR171
-	str	w1, [x0, #:lo12:.LANCHOR171]
-	adrp	x0, .LANCHOR172
 	adrp	x1, .LANCHOR112
+	str	wzr, [x0, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR172
 	str	wzr, [x0, #:lo12:.LANCHOR172]
-	adrp	x0, .LANCHOR173
-	str	wzr, [x0, #:lo12:.LANCHOR173]
-	adrp	x0, .LANCHOR72
-	str	wzr, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR73
+	str	wzr, [x0, #:lo12:.LANCHOR73]
 	mov	w0, -1
 	strh	w0, [x1, #:lo12:.LANCHOR112]
 	adrp	x1, .LANCHOR113
 	strh	w0, [x1, #:lo12:.LANCHOR113]
-	adrp	x0, .LANCHOR174
+	adrp	x0, .LANCHOR173
 	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LANCHOR174
+	mov	w1, 128
 	strh	w1, [x0, #:lo12:.LANCHOR174]
 	adrp	x0, .LANCHOR175
-	mov	w1, 128
-	strh	w1, [x0, #:lo12:.LANCHOR175]
-	adrp	x0, .LANCHOR176
-	strh	wzr, [x0, #:lo12:.LANCHOR176]
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
 	adrp	x0, .LANCHOR114
 	strh	wzr, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR177
-	strh	wzr, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR176
+	strh	wzr, [x0, #:lo12:.LANCHOR176]
 	adrp	x0, .LANCHOR116
 	strh	wzr, [x0, #:lo12:.LANCHOR116]
-	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	ldrh	w0, [x19, #:lo12:.LANCHOR54]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR109
 	str	x0, [x1, #:lo12:.LANCHOR109]
 	mov	w0, 12
-	ldrh	w1, [x19, #:lo12:.LANCHOR53]
+	ldrh	w1, [x19, #:lo12:.LANCHOR54]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x22, #:lo12:.LANCHOR36]
+	ldrh	w19, [x22, #:lo12:.LANCHOR37]
 	adrp	x1, .LANCHOR111
 	str	x0, [x1, #:lo12:.LANCHOR111]
 	mov	w0, 56
@@ -7057,34 +7056,34 @@ FtlMemInit:
 	lsl	w20, w19, 2
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR178
-	str	x0, [x1, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR177
+	str	x0, [x1, #:lo12:.LANCHOR177]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR179
-	str	x0, [x1, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR178
+	str	x0, [x1, #:lo12:.LANCHOR178]
 	mov	w0, w20
 	bl	ftl_malloc
 	adrp	x20, .LANCHOR107
-	adrp	x1, .LANCHOR180
-	str	x0, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR179
+	str	x0, [x1, #:lo12:.LANCHOR179]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR76
-	str	x0, [x1, #:lo12:.LANCHOR76]
+	adrp	x1, .LANCHOR77
+	str	x0, [x1, #:lo12:.LANCHOR77]
 	mov	w0, w19
 	bl	ftl_malloc
-	ldrh	w19, [x21, #:lo12:.LANCHOR56]
+	ldrh	w19, [x21, #:lo12:.LANCHOR57]
 	adrp	x1, .LANCHOR106
 	str	x0, [x1, #:lo12:.LANCHOR106]
-	ldrh	w0, [x22, #:lo12:.LANCHOR36]
+	ldrh	w0, [x22, #:lo12:.LANCHOR37]
 	lsl	w0, w0, 1
 	add	w0, w0, 1
 	str	w0, [x20, #:lo12:.LANCHOR107]
 	mov	w0, w19
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR79
-	str	x0, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR180
+	str	x0, [x1, #:lo12:.LANCHOR180]
 	mov	w0, w19
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR181
@@ -7110,11 +7109,11 @@ FtlMemInit:
 	ldr	w1, [x20, #:lo12:.LANCHOR107]
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	ldrh	w19, [x23, #:lo12:.LANCHOR57]
+	ldrh	w19, [x23, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR103
 	str	x0, [x1, #:lo12:.LANCHOR103]
-	ldrh	w0, [x22, #:lo12:.LANCHOR36]
-	adrp	x22, .LANCHOR63
+	ldrh	w0, [x22, #:lo12:.LANCHOR37]
+	adrp	x22, .LANCHOR64
 	mul	w19, w19, w0
 	mov	w0, w19
 	bl	ftl_malloc
@@ -7122,17 +7121,17 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR185]
 	lsl	w0, w19, 2
 	bl	ftl_malloc
-	adrp	x19, .LANCHOR39
+	adrp	x19, .LANCHOR40
 	adrp	x1, .LANCHOR186
 	str	x0, [x1, #:lo12:.LANCHOR186]
-	ldrh	w1, [x23, #:lo12:.LANCHOR57]
+	ldrh	w1, [x23, #:lo12:.LANCHOR58]
 	ldr	w0, [x20, #:lo12:.LANCHOR107]
 	adrp	x20, .LANCHOR187
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR105
 	str	x0, [x1, #:lo12:.LANCHOR105]
-	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	ldrh	w0, [x19, #:lo12:.LANCHOR40]
 	ubfiz	w0, w0, 1, 15
 	strh	w0, [x20, #:lo12:.LANCHOR187]
 	and	w0, w0, 65534
@@ -7147,15 +7146,15 @@ FtlMemInit:
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR188
 	str	x0, [x1, #:lo12:.LANCHOR188]
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR78
 	add	x0, x0, 32
-	str	x0, [x1, #:lo12:.LANCHOR77]
-	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	str	x0, [x1, #:lo12:.LANCHOR78]
+	ldrh	w0, [x19, #:lo12:.LANCHOR40]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	ldr	w20, [x22, #:lo12:.LANCHOR63]
-	adrp	x1, .LANCHOR82
-	str	x0, [x1, #:lo12:.LANCHOR82]
+	ldr	w20, [x22, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR83
+	str	x0, [x1, #:lo12:.LANCHOR83]
 	lsl	w20, w20, 1
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7163,42 +7162,42 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR126]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR60
+	adrp	x20, .LANCHOR61
 	adrp	x1, .LANCHOR122
 	str	x0, [x1, #:lo12:.LANCHOR122]
-	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	ldrh	w0, [x19, #:lo12:.LANCHOR40]
 	lsr	w0, w0, 3
 	add	w0, w0, 4
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR70
-	str	x0, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR71
+	str	x0, [x1, #:lo12:.LANCHOR71]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
 	lsl	w0, w0, 1
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR189
 	str	x0, [x1, #:lo12:.LANCHOR189]
-	ldrh	w0, [x20, #:lo12:.LANCHOR60]
-	adrp	x20, .LANCHOR61
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	adrp	x20, .LANCHOR62
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR190
 	str	x0, [x1, #:lo12:.LANCHOR190]
-	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	ldrh	w0, [x20, #:lo12:.LANCHOR62]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	ldrh	w2, [x20, #:lo12:.LANCHOR61]
+	ldrh	w2, [x20, #:lo12:.LANCHOR62]
 	adrp	x1, .LANCHOR191
 	str	x0, [x1, #:lo12:.LANCHOR191]
 	mov	w1, 0
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR65
-	ldrh	w20, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR66
+	ldrh	w20, [x0, #:lo12:.LANCHOR66]
 	lsl	w20, w20, 2
 	mov	w0, w20
 	bl	ftl_malloc
@@ -7206,80 +7205,80 @@ FtlMemInit:
 	str	x0, [x1, #:lo12:.LANCHOR128]
 	mov	w0, w20
 	bl	ftl_malloc
-	adrp	x20, .LANCHOR66
+	adrp	x20, .LANCHOR67
 	adrp	x1, .LANCHOR192
 	str	x0, [x1, #:lo12:.LANCHOR192]
-	ldr	w0, [x22, #:lo12:.LANCHOR63]
+	ldr	w0, [x22, #:lo12:.LANCHOR64]
 	lsl	w0, w0, 2
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR127
 	str	x0, [x1, #:lo12:.LANCHOR127]
-	ldrh	w0, [x20, #:lo12:.LANCHOR66]
+	ldrh	w0, [x20, #:lo12:.LANCHOR67]
 	lsl	w0, w0, 4
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR95
-	str	x0, [x1, #:lo12:.LANCHOR95]
-	ldrh	w1, [x20, #:lo12:.LANCHOR66]
-	adrp	x20, .LANCHOR43
-	ldrh	w0, [x21, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR96
+	str	x0, [x1, #:lo12:.LANCHOR96]
+	ldrh	w1, [x20, #:lo12:.LANCHOR67]
+	adrp	x20, .LANCHOR44
+	ldrh	w0, [x21, #:lo12:.LANCHOR57]
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR123
 	str	x0, [x1, #:lo12:.LANCHOR123]
 	mov	w0, 6
-	ldrh	w1, [x19, #:lo12:.LANCHOR39]
+	ldrh	w1, [x19, #:lo12:.LANCHOR40]
 	adrp	x19, .LANCHOR120
 	mul	w0, w1, w0
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR80
-	str	x0, [x1, #:lo12:.LANCHOR80]
-	adrp	x0, .LANCHOR49
-	ldrh	w1, [x20, #:lo12:.LANCHOR43]
-	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR81
+	str	x0, [x1, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR50
+	ldrh	w1, [x20, #:lo12:.LANCHOR44]
+	ldrh	w0, [x0, #:lo12:.LANCHOR50]
 	add	w0, w0, 31
 	asr	w0, w0, 5
 	strh	w0, [x19, #:lo12:.LANCHOR120]
 	mul	w0, w1, w0
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR73
+	adrp	x1, .LANCHOR74
 	ldrh	w5, [x19, #:lo12:.LANCHOR120]
-	add	x2, x1, :lo12:.LANCHOR73
-	ldrh	w7, [x20, #:lo12:.LANCHOR43]
+	add	x2, x1, :lo12:.LANCHOR74
+	ldrh	w7, [x20, #:lo12:.LANCHOR44]
 	add	x6, x2, 40
 	mov	w3, w5
 	str	x0, [x2, 32]
 	mov	x0, 1
-.L991:
+.L993:
 	cmp	w0, w7
-	bcc	.L992
+	bcc	.L994
 	mov	w2, 8
 	sub	w2, w2, w0
 	add	x2, x2, 1
-	add	x1, x1, :lo12:.LANCHOR73
+	add	x1, x1, :lo12:.LANCHOR74
 	mov	x3, 0
-.L993:
+.L995:
 	add	x3, x3, 1
 	cmp	x2, x3
-	bne	.L994
+	bne	.L996
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L992:
+.L994:
 	ldr	x4, [x2, 32]
 	add	w0, w0, 1
 	add	x4, x4, x3, uxtw 2
 	add	w3, w3, w5
 	str	x4, [x6], 8
-	b	.L991
-.L994:
+	b	.L993
+.L996:
 	add	x4, x0, x3
 	add	x4, x1, x4, lsl 3
 	str	xzr, [x4, 24]
-	b	.L993
+	b	.L995
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.ftl_free,"ax",@progbits
 	.align	2
@@ -7321,6 +7320,28 @@ StorageSysDataStore:
 	mov	w0, 16
 	b	FtlWrite
 	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorRead,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorRead
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	mov	x3, x2
+	mov	w1, w0
+	mov	w2, 1
+	mov	w0, 16
+	b	FtlRead
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w1, w0
+	mov	w2, 1
+	mov	w0, 16
+	b	FtlWrite
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
 	.section	.text.FlashCs123Init,"ax",@progbits
 	.align	2
 	.global	FlashCs123Init
@@ -7340,8 +7361,8 @@ rk_nand_de_init:
 	.global	rk_ftl_get_capacity
 	.type	rk_ftl_get_capacity, %function
 rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR67
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	ret
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",@progbits
@@ -7352,67 +7373,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC14
+	adrp	x21, .LC17
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC13
+	adrp	x23, .LC16
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC13
-	add	x21, x21, :lo12:.LC14
+	add	x23, x23, :lo12:.LC16
+	add	x21, x21, :lo12:.LC17
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC15
-.L1004:
+	adrp	x27, .LC18
+.L1008:
 	cmp	x25, x19
-	bne	.L1010
+	bne	.L1014
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC15
+	adrp	x1, .LC18
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC15
+	add	x1, x1, :lo12:.LC18
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC6
+	adrp	x0, .LC8
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC6
+	add	x0, x0, :lo12:.LC8
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1010:
-	cbnz	w20, .L1005
+.L1014:
+	cbnz	w20, .L1009
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1005:
+.L1009:
 	cmp	w24, 4
-	bne	.L1006
+	bne	.L1010
 	ldr	w1, [x22, x19, lsl 2]
-.L1012:
+.L1016:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1009
+	bls	.L1013
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC15
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	add	x1, x27, :lo12:.LC18
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L1009:
+.L1013:
 	add	x19, x19, 1
-	b	.L1004
-.L1006:
+	b	.L1008
+.L1010:
 	cmp	w24, 2
-	bne	.L1008
+	bne	.L1012
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1012
-.L1008:
+	b	.L1016
+.L1012:
 	ldrb	w1, [x22, x19]
-	b	.L1012
+	b	.L1016
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7439,18 +7460,18 @@ HynixGetReadRetryDefault:
 	strb	w4, [x0, 5]
 	strb	w3, [x0, 6]
 	strb	w1, [x0, 7]
-	bne	.L1014
+	bne	.L1018
 	mov	w1, -89
 	strb	w1, [x0, 4]
 	adrp	x0, .LANCHOR193+17
 	mov	w1, -9
 	strb	w1, [x0, #:lo12:.LANCHOR193+17]
-.L1070:
+.L1074:
 	mov	w27, 7
-	b	.L1105
-.L1014:
+	b	.L1109
+.L1018:
 	cmp	w26, 3
-	bne	.L1016
+	bne	.L1020
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7466,14 +7487,14 @@ HynixGetReadRetryDefault:
 	mov	w1, -74
 	strb	w1, [x0, 10]
 	mov	w1, -73
-.L1106:
+.L1110:
 	mov	w27, 8
 	mov	w28, w27
 	strb	w1, [x0, 11]
-.L1015:
+.L1019:
 	sub	w0, w26, #1
 	cmp	w0, 1
-	bhi	.L1020
+	bhi	.L1024
 	adrp	x26, .LANCHOR25
 	adrp	x0, .LANCHOR26
 	adrp	x25, .LANCHOR6
@@ -7481,11 +7502,11 @@ HynixGetReadRetryDefault:
 	add	x4, x0, :lo12:.LANCHOR26
 	add	x25, x25, :lo12:.LANCHOR6
 	mov	w24, 0
-.L1021:
+.L1025:
 	ldrb	w0, [x26]
 	cmp	w0, w24
-	bhi	.L1027
-.L1028:
+	bhi	.L1031
+.L1032:
 	add	x20, x20, :lo12:.LANCHOR20
 	ldp	x21, x22, [sp, 32]
 	strb	w28, [x20, 1]
@@ -7496,9 +7517,9 @@ HynixGetReadRetryDefault:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1016:
+.L1020:
 	cmp	w26, 4
-	bne	.L1017
+	bne	.L1021
 	mov	w5, -52
 	strb	w5, [x0, 4]
 	mov	w5, -65
@@ -7511,10 +7532,10 @@ HynixGetReadRetryDefault:
 	mov	w5, -51
 	strb	w3, [x0, 10]
 	strb	w5, [x0, 8]
-	b	.L1106
-.L1017:
+	b	.L1110
+.L1021:
 	cmp	w26, 5
-	bne	.L1018
+	bne	.L1022
 	mov	w1, 56
 	strb	w1, [x0, 4]
 	mov	w1, 57
@@ -7524,12 +7545,12 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 59
 	strb	w1, [x0, 7]
-.L1105:
+.L1109:
 	mov	w28, 4
-	b	.L1015
-.L1018:
+	b	.L1019
+.L1022:
 	cmp	w26, 6
-	bne	.L1019
+	bne	.L1023
 	mov	w1, 14
 	strb	w1, [x0, 4]
 	mov	w1, 15
@@ -7539,10 +7560,10 @@ HynixGetReadRetryDefault:
 	strb	w1, [x0, 6]
 	mov	w1, 17
 	strb	w1, [x0, 7]
-	b	.L1105
-.L1019:
+	b	.L1109
+.L1023:
 	cmp	w26, 7
-	bne	.L1070
+	bne	.L1074
 	mov	w1, -80
 	strb	w1, [x0, 4]
 	mov	w1, -79
@@ -7565,8 +7586,8 @@ HynixGetReadRetryDefault:
 	mov	w28, 10
 	mov	w1, -43
 	strb	w1, [x0, 13]
-	b	.L1015
-.L1027:
+	b	.L1019
+.L1031:
 	ldrb	w1, [x4, w24, sxtw]
 	add	x0, x20, :lo12:.LANCHOR20
 	mov	x21, x0
@@ -7580,7 +7601,7 @@ HynixGetReadRetryDefault:
 	ldrb	w23, [x2, 8]
 	add	x23, x1, x23, lsl 8
 	mov	w1, 55
-.L1022:
+.L1026:
 	add	x0, x21, x22
 	str	w1, [x23, 2056]
 	str	x4, [x29, 128]
@@ -7595,15 +7616,15 @@ HynixGetReadRetryDefault:
 	cmp	w28, w22, uxtb
 	ldr	w1, [x29, 140]
 	ldr	x4, [x29, 128]
-	bhi	.L1022
+	bhi	.L1026
 	adrp	x2, .LANCHOR193
 	add	x2, x2, :lo12:.LANCHOR193
 	mov	x0, 0
-.L1025:
+.L1029:
 	add	x7, x19, x0
 	add	x6, x2, x0
 	mov	x1, 1
-.L1024:
+.L1028:
 	lsl	x3, x1, 2
 	lsl	x8, x1, 3
 	ldrb	w10, [x19, x0]
@@ -7612,10 +7633,10 @@ HynixGetReadRetryDefault:
 	ldrb	w3, [x6, x3]
 	add	w3, w3, w10
 	strb	w3, [x7, x8]
-	bne	.L1024
+	bne	.L1028
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1025
+	bne	.L1029
 	add	w24, w24, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -7625,11 +7646,11 @@ HynixGetReadRetryDefault:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1021
-.L1020:
+	b	.L1025
+.L1024:
 	sub	w0, w26, #3
 	cmp	w0, 4
-	bhi	.L1028
+	bhi	.L1032
 	mul	w24, w27, w28
 	adrp	x25, .LANCHOR25
 	sub	w22, w28, #1
@@ -7646,11 +7667,11 @@ HynixGetReadRetryDefault:
 	str	x0, [x29, 120]
 	add	x0, x22, 1
 	str	x0, [x29, 112]
-.L1029:
+.L1033:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w21
-	bls	.L1028
+	bls	.L1032
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w22, [x0, w21, sxtw]
@@ -7667,37 +7688,37 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	add	x1, x20, :lo12:.LANCHOR20
 	cmp	w26, 7
-	beq	.L1030
+	beq	.L1034
 	ubfiz	x0, x22, 6, 8
 	add	x0, x0, 20
-.L1107:
+.L1111:
 	add	x3, x1, x0
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	cmp	w26, 4
-	bne	.L1032
+	bne	.L1036
 	mov	w0, 255
 	str	w0, [x19, 2052]
 	mov	w0, 64
 	str	w0, [x19, 2048]
 	mov	w0, 204
-.L1108:
+.L1112:
 	str	w0, [x19, 2052]
 	mov	w0, 77
-	b	.L1109
-.L1030:
+	b	.L1113
+.L1034:
 	mov	x3, 28
 	mov	w0, 160
 	umaddl	x0, w0, w22, x3
-	b	.L1107
-.L1032:
+	b	.L1111
+.L1036:
 	cmp	w25, 1
-	bhi	.L1034
+	bhi	.L1038
 	add	x0, x20, :lo12:.LANCHOR20
 	ldrb	w0, [x0, 4]
 	str	w0, [x19, 2052]
 	mov	w0, 82
-.L1109:
+.L1113:
 	str	w0, [x19, 2048]
 	mov	w0, 22
 	str	w0, [x19, 2056]
@@ -7711,10 +7732,10 @@ HynixGetReadRetryDefault:
 	str	wzr, [x19, 2056]
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	bne	.L1035
+	bne	.L1039
 	mov	w0, 31
 	str	w0, [x19, 2052]
-.L1036:
+.L1040:
 	mov	w7, 2
 	str	w7, [x19, 2052]
 	str	wzr, [x19, 2052]
@@ -7726,187 +7747,187 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
 	ldr	x3, [x29, 104]
-	bls	.L1071
+	bls	.L1075
 	ldr	w7, [x29, 136]
 	cmp	w26, 7
 	mov	w1, 32
 	csel	w1, w1, w7, eq
-.L1037:
-	adrp	x8, .LANCHOR145
+.L1041:
+	adrp	x8, .LANCHOR144
 	mov	x7, 0
-	ldr	x0, [x8, #:lo12:.LANCHOR145]
-.L1038:
+	ldr	x0, [x8, #:lo12:.LANCHOR144]
+.L1042:
 	ldr	w10, [x19, 2048]
 	strb	w10, [x0, x7]
 	add	x7, x7, 1
 	cmp	w1, w7, uxtb
-	bhi	.L1038
+	bhi	.L1042
 	cmp	w26, 7
-	bne	.L1039
+	bne	.L1043
 	mov	w1, 0
-.L1041:
+.L1045:
 	ldrb	w7, [x0]
 	cmp	w7, 12
-	beq	.L1040
+	beq	.L1044
 	ldrb	w7, [x0, 1]
 	cmp	w7, 10
-	beq	.L1040
+	beq	.L1044
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1041
-.L1042:
-	adrp	x0, .LC16
+	bne	.L1045
+.L1046:
+	adrp	x0, .LC19
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	bl	printf
-.L1044:
-	b	.L1044
-.L1034:
+.L1048:
+	b	.L1048
+.L1038:
 	mov	w0, 174
 	str	w0, [x19, 2052]
 	str	wzr, [x19, 2048]
 	mov	w0, 176
-	b	.L1108
-.L1035:
+	b	.L1112
+.L1039:
 	str	wzr, [x19, 2052]
-	b	.L1036
-.L1071:
+	b	.L1040
+.L1075:
 	mov	w1, 16
-	b	.L1037
-.L1040:
+	b	.L1041
+.L1044:
 	cmp	w1, 6
-	bhi	.L1042
-.L1043:
-	ldr	x7, [x8, #:lo12:.LANCHOR145]
+	bhi	.L1046
+.L1047:
+	ldr	x7, [x8, #:lo12:.LANCHOR144]
 	mov	x0, 0
-.L1048:
+.L1052:
 	ldr	w1, [x29, 128]
 	cmp	w1, w0
-	bgt	.L1049
-	ldr	x1, [x8, #:lo12:.LANCHOR145]
+	bgt	.L1053
+	ldr	x1, [x8, #:lo12:.LANCHOR144]
 	mov	w10, 8
 	add	x8, x1, x24
-.L1051:
+.L1055:
 	mov	x0, 0
-.L1050:
+.L1054:
 	ldr	w11, [x8, x0, lsl 2]
 	mvn	w11, w11
 	str	w11, [x8, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w23, w0
-	bgt	.L1050
+	bgt	.L1054
 	ldr	w0, [x29, 140]
 	subs	w10, w10, #1
 	add	x8, x8, x0, uxtw 2
-	bne	.L1051
+	bne	.L1055
 	mov	x11, x1
 	mov	w12, 0
 	mov	w16, 1
-.L1057:
+.L1061:
 	mov	w8, 0
 	mov	w0, 0
-.L1056:
+.L1060:
 	mov	x15, x11
 	lsl	w10, w16, w0
 	mov	w14, 16
 	mov	w13, 0
-.L1054:
+.L1058:
 	ldr	w17, [x15]
 	add	x15, x15, x24
 	bics	wzr, w10, w17
 	cinc	w13, w13, eq
 	subs	w14, w14, #1
-	bne	.L1054
+	bne	.L1058
 	cmp	w13, 9
 	orr	w10, w8, w10
 	add	w0, w0, 1
 	csel	w8, w10, w8, cs
 	cmp	w0, 32
-	bne	.L1056
+	bne	.L1060
 	str	w8, [x11], 4
 	add	w12, w12, 1
 	cmp	w23, w12
-	bgt	.L1057
+	bgt	.L1061
 	mov	x0, 0
 	mov	w8, 0
-.L1060:
+.L1064:
 	ldr	w10, [x1, x0]
 	add	x0, x0, 4
 	cmp	w10, 0
 	cinc	w8, w8, eq
 	cmp	x0, 32
-	bne	.L1060
+	bne	.L1064
 	cmp	w8, 7
-	ble	.L1061
+	ble	.L1065
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC17
-	add	x0, x0, :lo12:.LC17
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
 	bl	rknand_print_hex
-	adrp	x0, .LC16
+	adrp	x0, .LC19
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	bl	printf
-.L1062:
-	b	.L1062
-.L1039:
+.L1066:
+	b	.L1066
+.L1043:
 	cmp	w26, 6
-	bne	.L1043
+	bne	.L1047
 	mov	x1, 0
-.L1045:
+.L1049:
 	ldrb	w7, [x0, x1]
 	cmp	w7, 12
-	beq	.L1043
+	beq	.L1047
 	add	x7, x0, x1
 	ldrb	w7, [x7, 8]
 	cmp	w7, 4
-	beq	.L1043
+	beq	.L1047
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1045
-	adrp	x0, .LC16
+	bne	.L1049
+	adrp	x0, .LC19
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	bl	printf
-.L1047:
-	b	.L1047
-.L1049:
+.L1051:
+	b	.L1051
+.L1053:
 	ldr	w1, [x19, 2048]
 	strb	w1, [x7, x0]
 	add	x0, x0, 1
-	b	.L1048
-.L1061:
+	b	.L1052
+.L1065:
 	cmp	w26, 6
-	beq	.L1073
+	beq	.L1077
 	cmp	w26, 7
 	mov	x1, 8
 	mov	x0, 10
 	csel	x0, x0, x1, eq
-.L1063:
+.L1067:
 	mov	x1, x3
 	mov	w8, 0
-.L1064:
+.L1068:
 	mov	x3, 0
-.L1065:
+.L1069:
 	ldrb	w10, [x7, x3]
 	strb	w10, [x1, x3]
 	add	x3, x3, 1
 	cmp	w28, w3, uxtb
-	bhi	.L1065
+	bhi	.L1069
 	ldr	x2, [x29, 112]
 	add	w8, w8, 1
 	add	x1, x1, x0
 	cmp	w27, w8
 	add	x7, x7, x2
-	bgt	.L1064
+	bgt	.L1068
 	mov	w0, 255
 	str	w0, [x19, 2056]
 	mov	w0, w22
 	bl	NandcWaitFlashReady
 	cmp	w25, 1
-	bhi	.L1067
+	bhi	.L1071
 	mov	w0, 54
 	str	w0, [x19, 2056]
 	adrp	x0, .LANCHOR20+4
@@ -7918,19 +7939,19 @@ HynixGetReadRetryDefault:
 	str	w0, [x19, 2056]
 	mov	w0, w21
 	bl	FlashReadCmd
-.L1068:
+.L1072:
 	add	w21, w21, 1
 	mov	w0, w22
 	and	w21, w21, 255
 	bl	NandcWaitFlashReady
-	b	.L1029
-.L1073:
+	b	.L1033
+.L1077:
 	mov	x0, 4
-	b	.L1063
-.L1067:
+	b	.L1067
+.L1071:
 	mov	w0, 56
 	str	w0, [x19, 2056]
-	b	.L1068
+	b	.L1072
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
 	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
 	.align	2
@@ -7938,14 +7959,14 @@ HynixGetReadRetryDefault:
 	.type	FlashGetReadRetryDefault, %function
 FlashGetReadRetryDefault:
 	mov	w1, w0
-	cbz	w0, .L1110
+	cbz	w0, .L1114
 	sub	w2, w0, #1
 	cmp	w2, 6
-	bhi	.L1112
+	bhi	.L1116
 	b	HynixGetReadRetryDefault
-.L1112:
+.L1116:
 	cmp	w0, 49
-	bne	.L1113
+	bne	.L1117
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -7956,41 +7977,41 @@ FlashGetReadRetryDefault:
 	adrp	x1, .LANCHOR14
 	add	x1, x1, :lo12:.LANCHOR14
 	mov	w2, 64
-.L1122:
+.L1126:
 	add	x0, x0, 4
 	b	ftl_memcpy
-.L1113:
+.L1117:
 	sub	w0, w0, #65
 	cmp	w1, 33
 	ccmp	w0, 1, 0, ne
-	bhi	.L1114
+	bhi	.L1118
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 4
-.L1123:
+.L1127:
 	strb	w1, [x0, 1]
 	mov	w1, 7
 	mov	w2, 45
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR10
 	add	x1, x1, :lo12:.LANCHOR10
-	b	.L1122
-.L1114:
+	b	.L1126
+.L1118:
 	cmp	w1, 34
 	mov	w0, 67
 	ccmp	w1, w0, 4, ne
-	bne	.L1115
+	bne	.L1119
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
 	mov	w1, 5
-	b	.L1123
-.L1115:
+	b	.L1127
+.L1119:
 	cmp	w1, 35
 	mov	w0, 68
 	ccmp	w1, w0, 4, ne
-	bne	.L1110
+	bne	.L1114
 	adrp	x2, .LANCHOR20
 	add	x0, x2, :lo12:.LANCHOR20
 	strb	w1, [x2, #:lo12:.LANCHOR20]
@@ -8001,8 +8022,8 @@ FlashGetReadRetryDefault:
 	strb	w1, [x0, 2]
 	adrp	x1, .LANCHOR9
 	add	x1, x1, :lo12:.LANCHOR9
-	b	.L1122
-.L1110:
+	b	.L1126
+.L1114:
 	ret
 	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
 	.section	.text.FlashInit,"ax",@progbits
@@ -8019,22 +8040,22 @@ FlashInit:
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR2
 	stp	x25, x26, [sp, 64]
-	adrp	x24, .LANCHOR150
+	adrp	x24, .LANCHOR149
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR145
-	adrp	x21, .LANCHOR28
+	adrp	x1, .LANCHOR144
+	adrp	x21, .LANCHOR29
 	adrp	x22, .LANCHOR1
 	adrp	x20, .LANCHOR22
-	str	x0, [x1, #:lo12:.LANCHOR145]
+	str	x0, [x1, #:lo12:.LANCHOR144]
 	mov	w0, 32768
 	bl	ftl_malloc
 	adrp	x25, .LANCHOR6
-	adrp	x1, .LANCHOR151
+	adrp	x1, .LANCHOR150
 	add	x25, x25, :lo12:.LANCHOR6
-	adrp	x26, .LC18
+	adrp	x26, .LC21
 	mov	w28, 0
-	str	x0, [x1, #:lo12:.LANCHOR151]
+	str	x0, [x1, #:lo12:.LANCHOR150]
 	mov	w0, 4096
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR194
@@ -8045,30 +8066,30 @@ FlashInit:
 	str	x0, [x1, #:lo12:.LANCHOR195]
 	mov	w0, 4096
 	bl	ftl_malloc
-	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	strb	wzr, [x21, #:lo12:.LANCHOR29]
 	adrp	x1, .LANCHOR196
 	strb	wzr, [x22, #:lo12:.LANCHOR1]
 	str	x0, [x1, #:lo12:.LANCHOR196]
-	adrp	x1, .LANCHOR148
+	adrp	x1, .LANCHOR147
 	mov	w0, 50
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x1, #:lo12:.LANCHOR148]
-	adrp	x0, .LANCHOR147
+	strb	w0, [x1, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR146
 	mov	w1, 128
-	str	wzr, [x0, #:lo12:.LANCHOR147]
+	str	wzr, [x0, #:lo12:.LANCHOR146]
 	adrp	x0, .LANCHOR3
 	str	w1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LANCHOR142
-	str	wzr, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR141
+	str	wzr, [x0, #:lo12:.LANCHOR141]
 	mov	w0, 60
-	strb	w0, [x24, #:lo12:.LANCHOR150]
+	strb	w0, [x24, #:lo12:.LANCHOR149]
 	mov	x0, x19
 	add	x19, x20, :lo12:.LANCHOR22
 	bl	NandcInit
 	mov	x27, x19
-	add	x0, x26, :lo12:.LC18
+	add	x0, x26, :lo12:.LC21
 	str	x0, [x29, 104]
-.L1129:
+.L1133:
 	and	w26, w28, 255
 	mov	w0, w26
 	bl	FlashReset
@@ -8103,7 +8124,7 @@ FlashInit:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1125
+	bhi	.L1129
 	ldrb	w7, [x19, 5]
 	add	w1, w28, 1
 	ldrb	w6, [x19, 4]
@@ -8112,99 +8133,99 @@ FlashInit:
 	ldrb	w3, [x19, 1]
 	ldr	x0, [x29, 104]
 	bl	printf
-.L1125:
-	cbnz	w28, .L1126
+.L1129:
+	cbnz	w28, .L1130
 	ldrb	w0, [x27]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L1167
+	bhi	.L1171
 	ldrb	w0, [x27, 1]
 	cmp	w0, 255
-	beq	.L1167
-.L1126:
+	beq	.L1171
+.L1130:
 	ldrb	w0, [x19]
 	cmp	w0, 181
-	bne	.L1128
+	bne	.L1132
 	mov	w0, 44
 	strb	w0, [x19]
-.L1128:
+.L1132:
 	add	w28, w28, 1
 	add	x25, x25, 16
 	add	x19, x19, 8
 	cmp	w28, 4
-	bne	.L1129
+	bne	.L1133
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 173
-	beq	.L1130
-	adrp	x0, .LANCHOR153
-	ldr	w0, [x0, #:lo12:.LANCHOR153]
+	beq	.L1134
+	adrp	x0, .LANCHOR152
+	ldr	w0, [x0, #:lo12:.LANCHOR152]
 	bl	NandcSetDdrMode
-.L1130:
+.L1134:
 	mov	w2, 852
 	adrp	x26, .LANCHOR20
 	mov	w1, 0
 	add	x0, x26, :lo12:.LANCHOR20
 	adrp	x19, .LANCHOR18
 	bl	ftl_memset
-	adrp	x28, .LANCHOR29
-	add	x0, x28, :lo12:.LANCHOR29
+	adrp	x28, .LANCHOR30
+	add	x0, x28, :lo12:.LANCHOR30
 	str	x0, [x19, #:lo12:.LANCHOR18]
 	add	x0, x20, :lo12:.LANCHOR22
 	adrp	x27, .LANCHOR5
 	ldrb	w2, [x0, 1]
 	strb	wzr, [x27, #:lo12:.LANCHOR5]
 	cmp	w2, 161
-	beq	.L1131
+	beq	.L1135
 	cmp	w2, 218
-	beq	.L1131
+	beq	.L1135
 	and	w1, w2, -33
 	cmp	w1, 209
-	beq	.L1131
+	beq	.L1135
 	cmp	w2, 220
-	bne	.L1132
+	bne	.L1136
 	ldrb	w0, [x0, 3]
 	cmp	w0, 149
-	bne	.L1132
-.L1131:
+	bne	.L1136
+.L1135:
 	mov	w0, 1
 	adrp	x25, .LANCHOR197
 	add	x1, x25, :lo12:.LANCHOR197
 	strb	w0, [x22, #:lo12:.LANCHOR1]
 	mov	w0, 16
 	strb	w0, [x23, #:lo12:.LANCHOR2]
-	strb	w0, [x24, #:lo12:.LANCHOR150]
+	strb	w0, [x24, #:lo12:.LANCHOR149]
 	add	x3, x20, :lo12:.LANCHOR22
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	strb	w0, [x1, 1]
 	strb	w2, [x1, 2]
 	cmp	w0, 152
-	bne	.L1133
+	bne	.L1137
 	ldrsb	w0, [x3, 4]
-	tbnz	w0, #31, .L1133
+	tbnz	w0, #31, .L1137
 	mov	w0, 24
-	strb	w0, [x24, #:lo12:.LANCHOR150]
-.L1133:
-	adrp	x0, .LANCHOR152
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	strb	w0, [x24, #:lo12:.LANCHOR149]
+.L1137:
+	adrp	x0, .LANCHOR151
+	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1134
+	bne	.L1138
 	mov	w0, 16
-	strb	w0, [x24, #:lo12:.LANCHOR150]
-.L1134:
+	strb	w0, [x24, #:lo12:.LANCHOR149]
+.L1138:
 	cmp	w2, 218
-	bne	.L1135
+	bne	.L1139
 	add	x0, x25, :lo12:.LANCHOR197
 	mov	w1, 2048
 	strh	w1, [x0, 14]
 	mov	w1, -38
-.L1202:
+.L1206:
 	strb	w1, [x0, 2]
-.L1136:
-	adrp	x1, .LANCHOR141
-	add	x1, x1, :lo12:.LANCHOR141
+.L1140:
+	adrp	x1, .LANCHOR140
+	add	x1, x1, :lo12:.LANCHOR140
 	mov	w2, 32
 	add	x1, x1, 32
 	adrp	x0, .LANCHOR7
@@ -8212,39 +8233,39 @@ FlashInit:
 	bl	ftl_memcpy
 	mov	w2, 32
 	add	x1, x25, :lo12:.LANCHOR197
-	add	x0, x28, :lo12:.LANCHOR29
+	add	x0, x28, :lo12:.LANCHOR30
 	bl	ftl_memcpy
-.L1132:
+.L1136:
 	ldrb	w0, [x22, #:lo12:.LANCHOR1]
 	adrp	x25, .LANCHOR8
-	cbnz	w0, .L1138
+	cbnz	w0, .L1142
 	bl	FlashLoadPhyInfoInRam
-	cbnz	w0, .L1140
+	cbnz	w0, .L1144
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 17]
 	and	w0, w1, 7
 	strb	w0, [x24, #:lo12:.LANCHOR24]
-	tbnz	x1, 0, .L1140
+	tbnz	x1, 0, .L1144
 	mov	w1, 1
-	strb	w1, [x21, #:lo12:.LANCHOR28]
+	strb	w1, [x21, #:lo12:.LANCHOR29]
 	bl	FlashSetInterfaceMode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	bl	NandcSetMode
-.L1140:
+.L1144:
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 26]
 	strb	w0, [x25, #:lo12:.LANCHOR8]
 	bl	FlashLoadPhyInfo
-	cbz	w0, .L1138
+	cbz	w0, .L1142
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 14]
-	adrp	x0, .LC19
-	add	x0, x0, :lo12:.LC19
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	cmn	w0, #1
-	beq	.L1124
+	beq	.L1128
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
@@ -8255,28 +8276,28 @@ FlashInit:
 	ldrb	w2, [x0, 9]
 	add	w1, w1, 4095
 	cmp	w2, w1, lsr 12
-	blt	.L1143
+	blt	.L1147
 	ldrh	w1, [x0, 14]
 	add	w1, w1, 255
 	cmp	w2, w1, lsr 8
-	bge	.L1144
-.L1143:
+	bge	.L1148
+.L1147:
 	ldrh	w1, [x0, 14]
 	and	w1, w1, -256
 	strh	w1, [x0, 14]
-.L1144:
+.L1148:
 	adrp	x0, .LANCHOR24
 	ldrb	w0, [x0, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1145
+	beq	.L1149
 	bl	FlashSavePhyInfo
-	adrp	x0, .LANCHOR146
-	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	adrp	x0, .LANCHOR145
+	ldr	w1, [x0, #:lo12:.LANCHOR145]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1145:
+.L1149:
 	bl	FlashSavePhyInfo
-.L1138:
+.L1142:
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	adrp	x24, .LANCHOR24
 	ldrb	w0, [x2, 26]
@@ -8286,7 +8307,7 @@ FlashInit:
 	strb	w1, [x27, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR198
 	ubfx	x3, x0, 3, 1
-	adrp	x27, .LANCHOR143
+	adrp	x27, .LANCHOR142
 	strb	w3, [x1, #:lo12:.LANCHOR198]
 	adrp	x1, .LANCHOR27
 	ubfx	x3, x0, 4, 1
@@ -8295,14 +8316,14 @@ FlashInit:
 	strb	w0, [x24, #:lo12:.LANCHOR24]
 	ldrh	w1, [x2, 10]
 	ldrb	w0, [x2, 12]
-	str	xzr, [x27, #:lo12:.LANCHOR143]
+	str	xzr, [x27, #:lo12:.LANCHOR142]
 	sdiv	w1, w1, w0
 	ldrb	w0, [x2, 18]
 	bl	BuildFlashLsbPageTable
 	bl	FlashDieInfoInit
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrh	w1, [x0, 16]
-	tbz	x1, 6, .L1147
+	tbz	x1, 6, .L1151
 	adrp	x1, .LANCHOR11
 	ldrb	w0, [x0, 19]
 	adrp	x3, .LANCHOR13
@@ -8310,83 +8331,83 @@ FlashInit:
 	add	x1, x26, :lo12:.LANCHOR20
 	ldrb	w2, [x1, 1]
 	strb	w2, [x3, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR149
+	adrp	x2, .LANCHOR148
 	ldrb	w4, [x1, 2]
-	strb	w4, [x2, #:lo12:.LANCHOR149]
+	strb	w4, [x2, #:lo12:.LANCHOR148]
 	sub	w4, w0, #1
 	and	w4, w4, 255
 	cmp	w4, 6
 	mov	x4, x3
-	bhi	.L1148
+	bhi	.L1152
 	adrp	x2, HynixReadRetrial
 	add	x2, x2, :lo12:HynixReadRetrial
-	str	x2, [x27, #:lo12:.LANCHOR143]
+	str	x2, [x27, #:lo12:.LANCHOR142]
 	sub	w2, w0, #5
 	and	w2, w2, 255
 	cmp	w2, 1
-	bhi	.L1149
-	adrp	x2, .LANCHOR34
+	bhi	.L1153
+	adrp	x2, .LANCHOR35
 	add	x1, x1, 20
 	mov	w3, 1
-	str	w3, [x2, #:lo12:.LANCHOR34]
-.L1150:
+	str	w3, [x2, #:lo12:.LANCHOR35]
+.L1154:
 	mov	x2, 0
 	mov	w3, 0
-.L1152:
+.L1156:
 	ldrsb	w4, [x1, x2]
 	add	x2, x2, 1
 	cmp	w4, 0
 	cinc	w3, w3, eq
 	cmp	x2, 32
-	bne	.L1152
+	bne	.L1156
 	cmp	w3, 27
-	bls	.L1147
+	bls	.L1151
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-.L1147:
-	adrp	x0, .LANCHOR152
-	ldr	w1, [x0, #:lo12:.LANCHOR152]
+.L1151:
+	adrp	x0, .LANCHOR151
+	ldr	w1, [x0, #:lo12:.LANCHOR151]
 	mov	w0, 12336
 	movk	w0, 0x5638, lsl 16
 	cmp	w1, w0
-	bne	.L1161
+	bne	.L1165
 	ldrb	w0, [x25, #:lo12:.LANCHOR8]
-	cbz	w0, .L1161
+	cbz	w0, .L1165
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	strb	wzr, [x0, 18]
-.L1161:
+.L1165:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 44
-	bne	.L1162
-	ldrb	w0, [x21, #:lo12:.LANCHOR28]
-	cbz	w0, .L1162
-	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	bne	.L1166
+	ldrb	w0, [x21, #:lo12:.LANCHOR29]
+	cbz	w0, .L1166
+	strb	wzr, [x21, #:lo12:.LANCHOR29]
 	mov	w0, 1
 	bl	FlashSetInterfaceMode
 	mov	w0, 1
 	bl	NandcSetMode
-.L1162:
+.L1166:
 	mov	w0, 0
 	bl	flash_enter_slc_mode
 	ldrb	w0, [x24, #:lo12:.LANCHOR24]
 	tst	w0, 6
-	beq	.L1163
-	ldrb	w1, [x21, #:lo12:.LANCHOR28]
-	cbnz	w1, .L1164
-	tbnz	x0, 0, .L1163
-.L1164:
-	adrp	x0, .LANCHOR146
-	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	beq	.L1167
+	ldrb	w1, [x21, #:lo12:.LANCHOR29]
+	cbnz	w1, .L1168
+	tbnz	x0, 0, .L1167
+.L1168:
+	adrp	x0, .LANCHOR145
+	ldr	w1, [x0, #:lo12:.LANCHOR145]
 	mov	w0, 0
 	bl	FlashDdrParaScan
-.L1163:
+.L1167:
 	mov	w0, 0
 	bl	flash_exit_slc_mode
 	ldr	x0, [x19, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 20]
 	bl	FlashBchSel
-	adrp	x0, .LANCHOR139
-	add	x0, x0, :lo12:.LANCHOR139
+	adrp	x0, .LANCHOR138
+	add	x0, x0, :lo12:.LANCHOR138
 	bl	FlashReadIdbDataRaw
 	ldr	x2, [x19, #:lo12:.LANCHOR18]
 	mov	w0, 16
@@ -8422,7 +8443,7 @@ FlashInit:
 	strh	w1, [x0, 22]
 	ldrb	w5, [x22, #:lo12:.LANCHOR1]
 	cmp	w5, 1
-	bne	.L1165
+	bne	.L1169
 	ubfiz	w1, w1, 1, 15
 	lsr	w4, w4, 1
 	ubfiz	w3, w3, 1, 15
@@ -8431,11 +8452,11 @@ FlashInit:
 	mov	w1, 8
 	strh	w3, [x0, 20]
 	strh	w1, [x0, 26]
-.L1165:
+.L1169:
 	ldrb	w0, [x2, 20]
 	bl	FlashBchSel
 	mov	w0, 0
-.L1124:
+.L1128:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8443,90 +8464,90 @@ FlashInit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1135:
+.L1139:
 	cmp	w2, 220
-	bne	.L1136
+	bne	.L1140
 	add	x0, x25, :lo12:.LANCHOR197
 	mov	w1, 4096
 	strh	w1, [x0, 14]
 	mov	w1, -36
-	b	.L1202
-.L1149:
+	b	.L1206
+.L1153:
 	add	x2, x1, 20
 	cmp	w0, 7
 	add	x1, x1, 28
 	csel	x1, x1, x2, eq
-	b	.L1150
-.L1148:
+	b	.L1154
+.L1152:
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L1154
+	bhi	.L1158
 	adrp	x1, MicronReadRetrial
 	add	x1, x1, :lo12:MicronReadRetrial
-	str	x1, [x27, #:lo12:.LANCHOR143]
+	str	x1, [x27, #:lo12:.LANCHOR142]
 	cmp	w0, 19
-	beq	.L1155
-.L1206:
+	beq	.L1159
+.L1210:
 	mov	w0, 7
-	b	.L1204
-.L1155:
+	b	.L1208
+.L1159:
 	mov	w0, 15
-.L1204:
-	strb	w0, [x2, #:lo12:.LANCHOR149]
-	b	.L1147
-.L1154:
+.L1208:
+	strb	w0, [x2, #:lo12:.LANCHOR148]
+	b	.L1151
+.L1158:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L1156
+	bhi	.L1160
 	adrp	x0, ToshibaReadRetrial
 	add	x0, x0, :lo12:ToshibaReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR143]
+	str	x0, [x27, #:lo12:.LANCHOR142]
 	mov	w0, 4
 	strb	w0, [x3, #:lo12:.LANCHOR13]
-	b	.L1206
-.L1156:
+	b	.L1210
+.L1160:
 	sub	w3, w0, #34
 	sub	w1, w0, #67
 	and	w3, w3, 255
 	and	w1, w1, 255
 	cmp	w3, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L1157
+	bhi	.L1161
 	adrp	x3, ToshibaReadRetrial
 	add	x3, x3, :lo12:ToshibaReadRetrial
-	str	x3, [x27, #:lo12:.LANCHOR143]
+	str	x3, [x27, #:lo12:.LANCHOR142]
 	cmp	w0, 35
 	mov	w3, 68
 	ccmp	w0, w3, 4, ne
-	beq	.L1158
+	beq	.L1162
 	mov	w0, 7
-.L1203:
-	strb	w0, [x2, #:lo12:.LANCHOR149]
+.L1207:
+	strb	w0, [x2, #:lo12:.LANCHOR148]
 	cmp	w1, 1
-	bhi	.L1160
+	bhi	.L1164
 	mov	w0, 4
-.L1205:
+.L1209:
 	strb	w0, [x4, #:lo12:.LANCHOR13]
-	b	.L1147
-.L1158:
+	b	.L1151
+.L1162:
 	mov	w0, 17
-	b	.L1203
-.L1160:
+	b	.L1207
+.L1164:
 	mov	w0, 5
-	b	.L1205
-.L1157:
+	b	.L1209
+.L1161:
 	cmp	w0, 49
-	bne	.L1147
+	bne	.L1151
 	adrp	x0, SamsungReadRetrial
 	add	x0, x0, :lo12:SamsungReadRetrial
-	str	x0, [x27, #:lo12:.LANCHOR143]
-	b	.L1147
-.L1167:
+	str	x0, [x27, #:lo12:.LANCHOR142]
+	b	.L1151
+.L1171:
 	mov	w0, -2
-	b	.L1124
+	b	.L1128
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",@progbits
 	.align	2
@@ -8539,21 +8560,21 @@ FlashReadSlc2KPages:
 	mov	w22, 56
 	stp	x25, x26, [sp, 64]
 	mov	w25, w2
-	adrp	x2, .LANCHOR29+9
+	adrp	x2, .LANCHOR30+9
 	stp	x23, x24, [sp, 48]
 	nop // between mem op and mult-accumulate
 	umaddl	x22, w1, w22, x0
 	stp	x19, x20, [sp, 16]
-	ldrb	w24, [x2, #:lo12:.LANCHOR29+9]
+	ldrb	w24, [x2, #:lo12:.LANCHOR30+9]
 	adrp	x23, .LANCHOR25
 	mov	x19, x0
 	and	w21, w1, 255
 	add	x23, x23, :lo12:.LANCHOR25
 	adrp	x26, .LANCHOR26
 	str	x27, [sp, 80]
-.L1208:
+.L1212:
 	cmp	x22, x19
-	bne	.L1220
+	bne	.L1224
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -8562,7 +8583,7 @@ FlashReadSlc2KPages:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1220:
+.L1224:
 	mov	w1, w25
 	mov	w4, w21
 	add	x3, x29, 104
@@ -8572,15 +8593,15 @@ FlashReadSlc2KPages:
 	ldrb	w1, [x23]
 	ldr	w0, [x29, 104]
 	cmp	w1, w0
-	bhi	.L1209
+	bhi	.L1213
 	mov	w0, -1
 	str	w0, [x19]
-.L1210:
+.L1214:
 	sub	w21, w21, #1
 	add	x19, x19, 56
 	and	w21, w21, 255
-	b	.L1208
-.L1209:
+	b	.L1212
+.L1213:
 	add	x1, x26, :lo12:.LANCHOR26
 	ldrb	w27, [x1, w0, uxtw]
 	mov	w0, w27
@@ -8620,53 +8641,53 @@ FlashReadSlc2KPages:
 	mov	w0, w27
 	bl	NandcFlashDeCs
 	cmp	w20, w2
-	adrp	x1, .LANCHOR31
+	adrp	x1, .LANCHOR32
 	csel	w0, w20, w2, cs
-	ldrb	w2, [x1, #:lo12:.LANCHOR31]
+	ldrb	w2, [x1, #:lo12:.LANCHOR32]
 	add	w1, w2, w2, lsl 1
 	cmp	w0, w1, lsr 2
-	bls	.L1213
+	bls	.L1217
 	cmn	w0, #1
 	mov	w1, 256
 	csel	w0, w0, w1, eq
-.L1213:
+.L1217:
 	cmp	w0, 256
 	ccmn	w0, #1, 4, ne
 	csel	w0, w0, wzr, eq
 	str	w0, [x19]
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1216
+	cbz	x0, .L1220
 	ldr	w1, [x0, 8]
 	cmn	w1, #1
-	bne	.L1216
+	bne	.L1220
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1216
+	beq	.L1220
 	str	w1, [x19]
-.L1216:
+.L1220:
 	ldr	w3, [x19]
 	cmn	w3, #1
-	bne	.L1210
+	bne	.L1214
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
 	bl	printf
 	ldr	x1, [x19, 8]
-	cbz	x1, .L1218
-	adrp	x0, .LC21
+	cbz	x1, .L1222
+	adrp	x0, .LC24
 	mov	w3, 8
 	mov	w2, 4
-	add	x0, x0, :lo12:.LC21
+	add	x0, x0, :lo12:.LC24
 	bl	rknand_print_hex
-.L1218:
+.L1222:
 	ldr	x1, [x19, 16]
-	cbz	x1, .L1210
+	cbz	x1, .L1214
 	mov	w3, 4
-	adrp	x0, .LC22
+	adrp	x0, .LC25
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-	b	.L1210
+	b	.L1214
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",@progbits
 	.align	2
@@ -8683,12 +8704,12 @@ FlashReadPages:
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	stp	w2, w1, [x29, 148]
-	cbnz	w3, .L1239
+	cbnz	w3, .L1243
 	mov	x25, x0
-	adrp	x0, .LANCHOR29+9
+	adrp	x0, .LANCHOR30+9
 	adrp	x27, .LANCHOR20
 	mov	w23, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
 	mov	w22, 0
 	str	w0, [x29, 156]
 	adrp	x0, .LANCHOR5
@@ -8699,15 +8720,15 @@ FlashReadPages:
 	str	x0, [x29, 104]
 	add	x0, x0, 4
 	str	x0, [x29, 96]
-.L1240:
+.L1244:
 	ldr	w0, [x29, 152]
 	cmp	w22, w0
-	bcc	.L1274
+	bcc	.L1278
 	mov	w0, 0
-	b	.L1238
-.L1239:
+	b	.L1242
+.L1243:
 	bl	FlashReadSlc2KPages
-.L1238:
+.L1242:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8715,7 +8736,7 @@ FlashReadPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1274:
+.L1278:
 	mov	w26, 56
 	add	x3, x29, 168
 	ldp	w1, w0, [x29, 148]
@@ -8731,13 +8752,13 @@ FlashReadPages:
 	ldr	w1, [x29, 168]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1242
+	bhi	.L1246
 	mov	w0, -1
 	str	w0, [x25, x26]
-.L1243:
+.L1247:
 	add	w22, w22, 1
-	b	.L1240
-.L1242:
+	b	.L1244
+.L1246:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -8754,65 +8775,65 @@ FlashReadPages:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1245
+	bhi	.L1249
 	add	x0, x27, :lo12:.LANCHOR20
 	sxtw	x1, w19
 	add	x0, x0, x1
 	cmp	w2, 7
 	ldrb	w3, [x0, 12]
-	bne	.L1246
+	bne	.L1250
 	ldrb	w3, [x0, 20]
-.L1246:
+.L1250:
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, x1]
 	cmp	w0, w3
-	beq	.L1245
+	beq	.L1249
 	ldp	x2, x0, [x29, 96]
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1245:
+.L1249:
 	mov	w0, w19
 	bl	NandcFlashCs
 	ldr	w0, [x29, 148]
 	cmp	w0, 1
 	cset	w0, eq
 	orr	w24, w0, w24, lsr 31
-	cbz	w24, .L1247
+	cbz	w24, .L1251
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1247
+	cbz	w0, .L1251
 	mov	w0, w19
 	bl	flash_enter_slc_mode
-.L1248:
+.L1252:
 	adrp	x0, .LANCHOR3
 	add	x0, x0, :lo12:.LANCHOR3
 	str	x0, [x29, 112]
 	ldr	x0, [x29, 128]
 	add	x0, x0, :lo12:.LANCHOR5
 	str	x0, [x29, 136]
-.L1254:
+.L1258:
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L1249
+	bne	.L1253
 	cmp	w19, 255
-	beq	.L1276
-.L1249:
-	cbz	w20, .L1251
+	beq	.L1280
+.L1253:
+	cbz	w20, .L1255
 	ldr	x0, [x29, 112]
 	ldr	w2, [x0]
 	mov	w0, w19
 	add	w2, w1, w2
 	bl	FlashReadDpCmd
-.L1252:
+.L1256:
 	mov	w0, w19
 	bl	NandcWaitFlashReady
-	cbz	w20, .L1250
+	cbz	w20, .L1254
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	bl	FlashReadDpDataOutCmd
-.L1250:
+.L1254:
 	ldrb	w2, [x29, 156]
 	mov	w1, 0
 	ldp	x3, x4, [x21, 8]
@@ -8821,26 +8842,26 @@ FlashReadPages:
 	mov	w28, w0
 	ldr	x0, [x29, 136]
 	ldrb	w0, [x0]
-	cbz	w0, .L1253
+	cbz	w0, .L1257
 	cmn	w28, #1
-	bne	.L1253
+	bne	.L1257
 	ldr	x0, [x29, 136]
 	mov	w20, 0
 	strb	wzr, [x0]
-	b	.L1254
-.L1247:
+	b	.L1258
+.L1251:
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1248
-.L1251:
+	b	.L1252
+.L1255:
 	mov	w0, w19
 	bl	FlashReadCmd
-	b	.L1252
-.L1276:
+	b	.L1256
+.L1280:
 	mov	w20, 0
-	b	.L1250
-.L1253:
-	cbz	w20, .L1255
+	b	.L1254
+.L1257:
+	cbz	w20, .L1259
 	adrp	x0, .LANCHOR3
 	ldr	w1, [x29, 172]
 	ldr	w0, [x0, #:lo12:.LANCHOR3]
@@ -8859,27 +8880,27 @@ FlashReadPages:
 	cmn	w0, #1
 	mov	w23, w0
 	csel	w20, w20, wzr, ne
-.L1255:
+.L1259:
 	mov	w0, w19
 	bl	NandcFlashDeCs
 	ldr	x0, [x29, 128]
 	cmn	w28, #1
 	ldrb	w1, [x29, 144]
 	strb	w1, [x0, #:lo12:.LANCHOR5]
-	bne	.L1256
-	adrp	x0, .LANCHOR28
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
-	cbnz	w0, .L1257
-.L1261:
-	adrp	x20, .LANCHOR143
-	ldr	x4, [x20, #:lo12:.LANCHOR143]
-	cbnz	x4, .L1258
+	bne	.L1260
+	adrp	x0, .LANCHOR29
+	ldrb	w0, [x0, #:lo12:.LANCHOR29]
+	cbnz	w0, .L1261
+.L1265:
+	adrp	x20, .LANCHOR142
+	ldr	x4, [x20, #:lo12:.LANCHOR142]
+	cbnz	x4, .L1262
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	bl	FlashReadRawPage
-	b	.L1313
-.L1257:
+	b	.L1317
+.L1261:
 	adrp	x0, .LANCHOR19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
@@ -8890,62 +8911,62 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1260
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	beq	.L1264
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	cmp	w28, w0, lsr 1
-	bls	.L1277
-.L1260:
+	bls	.L1281
+.L1264:
 	lsr	w0, w20, 8
 	bl	NandcSetDdrPara
 	cmn	w28, #1
-	beq	.L1261
-.L1277:
+	beq	.L1265
+.L1281:
 	mov	w20, 0
-.L1256:
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+.L1260:
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w28, w0, lsr 2
-	bls	.L1262
-	adrp	x0, .LANCHOR143
-	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	bls	.L1266
+	adrp	x0, .LANCHOR142
+	ldr	x0, [x0, #:lo12:.LANCHOR142]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w28, w28, w0, ne
-.L1262:
+.L1266:
 	cmp	w28, 256
 	ccmn	w28, #1, 4, ne
 	csel	w3, w28, wzr, eq
 	str	w3, [x25, x26]
 	cmn	w3, #1
-	bne	.L1269
-	adrp	x0, .LANCHOR31
+	bne	.L1273
+	adrp	x0, .LANCHOR32
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
 	bl	printf
 	ldr	x1, [x21, 16]
-	cbz	x1, .L1269
+	cbz	x1, .L1273
 	mov	w3, 4
-	adrp	x0, .LC22
+	adrp	x0, .LC25
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC25
 	bl	rknand_print_hex
-.L1269:
-	cbz	w20, .L1271
-	adrp	x0, .LANCHOR31
-	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+.L1273:
+	cbz	w20, .L1275
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
 	add	w0, w0, w0, lsl 1
 	cmp	w23, w0, lsr 2
-	bls	.L1272
-	adrp	x0, .LANCHOR143
-	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	bls	.L1276
+	adrp	x0, .LANCHOR142
+	ldr	x0, [x0, #:lo12:.LANCHOR142]
 	cmp	x0, 0
 	mov	w0, 256
 	csel	w23, w23, w0, ne
-.L1272:
+.L1276:
 	add	w0, w22, 1
 	mov	w1, 56
 	cmp	w23, 256
@@ -8953,71 +8974,71 @@ FlashReadPages:
 	umull	x0, w0, w1
 	csel	w1, w23, wzr, eq
 	str	w1, [x25, x0]
-.L1271:
+.L1275:
 	add	w22, w22, w20
-	cbz	w24, .L1243
+	cbz	w24, .L1247
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1243
+	cbz	w0, .L1247
 	mov	w0, w19
 	bl	flash_exit_slc_mode
-	b	.L1243
-.L1258:
+	b	.L1247
+.L1262:
 	ldr	w1, [x29, 172]
 	mov	w0, w19
 	ldp	x2, x3, [x21, 8]
 	blr	x4
 	mov	w28, w0
 	cmn	w0, #1
-	bne	.L1280
+	bne	.L1284
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrb	w0, [x0, 19]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L1263
+	bhi	.L1267
 	add	x0, x27, :lo12:.LANCHOR20
 	mov	w3, 0
 	add	x2, x0, 4
 	ldrb	w1, [x0, 1]
 	mov	w0, w19
 	bl	HynixSetRRPara
-.L1263:
+.L1267:
 	ldp	x2, x3, [x21, 8]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	bl	FlashReadRawPage
 	mov	w28, w0
 	mov	w3, w0
-	adrp	x0, .LANCHOR31
+	adrp	x0, .LANCHOR32
 	ldr	w1, [x21, 4]
-	ldrb	w2, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
-	bl	printf
+	ldrb	w2, [x0, #:lo12:.LANCHOR32]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	bl	printf
 	cmn	w28, #1
-	bne	.L1280
+	bne	.L1284
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1280
+	cbz	w0, .L1284
 	mov	w0, w19
-	cbz	w24, .L1264
+	cbz	w24, .L1268
 	bl	flash_enter_slc_mode
-.L1265:
-	ldr	x4, [x20, #:lo12:.LANCHOR143]
+.L1269:
+	ldr	x4, [x20, #:lo12:.LANCHOR142]
 	mov	w0, w19
 	ldr	w1, [x29, 172]
 	ldp	x2, x3, [x21, 8]
 	blr	x4
-.L1313:
+.L1317:
 	mov	w28, w0
-.L1280:
+.L1284:
 	mov	w20, 0
-	b	.L1262
-.L1264:
+	b	.L1266
+.L1268:
 	bl	flash_exit_slc_mode
-	b	.L1265
+	b	.L1269
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FlashProgSlc2KPages,"ax",@progbits
 	.align	2
@@ -9029,13 +9050,13 @@ FlashProgSlc2KPages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	mov	w23, 56
-	adrp	x2, .LANCHOR29+9
+	adrp	x2, .LANCHOR30+9
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 255
 	stp	x25, x26, [sp, 64]
 	nop // between mem op and mult-accumulate
 	umaddl	x23, w1, w23, x0
-	ldrb	w25, [x2, #:lo12:.LANCHOR29+9]
+	ldrb	w25, [x2, #:lo12:.LANCHOR30+9]
 	adrp	x26, .LANCHOR3
 	stp	x27, x28, [sp, 80]
 	mov	w22, w21
@@ -9044,12 +9065,12 @@ FlashProgSlc2KPages:
 	mov	x20, x0
 	add	x28, x26, :lo12:.LANCHOR3
 	str	w3, [x29, 108]
-.L1315:
+.L1319:
 	cmp	x20, x23
-	bne	.L1321
+	bne	.L1325
 	ldr	w0, [x29, 108]
-	cbnz	w0, .L1322
-.L1341:
+	cbnz	w0, .L1326
+.L1345:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -9058,7 +9079,7 @@ FlashProgSlc2KPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1321:
+.L1325:
 	mov	w1, w24
 	mov	w4, w22
 	add	x3, x29, 116
@@ -9069,15 +9090,15 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 116]
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	cmp	w0, w1
-	bhi	.L1316
+	bhi	.L1320
 	mov	w0, -1
 	str	w0, [x20]
-.L1317:
+.L1321:
 	sub	w22, w22, #1
 	add	x20, x20, 56
 	and	w22, w22, 255
-	b	.L1315
-.L1316:
+	b	.L1319
+.L1320:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w19, [x0, w1, uxtw]
@@ -9130,30 +9151,30 @@ FlashProgSlc2KPages:
 	ldr	w1, [x29, 112]
 	mov	w0, w19
 	bl	FlashReadStatus
-	tbz	x0, 0, .L1320
+	tbz	x0, 0, .L1324
 	mov	w0, -1
 	str	w0, [x20]
-.L1320:
+.L1324:
 	mov	w0, w19
 	bl	NandcFlashDeCs
-	b	.L1317
-.L1328:
+	b	.L1321
+.L1332:
 	ldr	w0, [x27]
 	cmn	w0, #1
-	bne	.L1323
+	bne	.L1327
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
 	bl	printf
-.L1324:
+.L1328:
 	sub	w21, w21, #1
 	add	x27, x27, 56
 	and	w21, w21, 255
-.L1342:
+.L1346:
 	cmp	x27, x20
-	bne	.L1328
-	b	.L1341
-.L1323:
+	bne	.L1332
+	b	.L1345
+.L1327:
 	adrp	x19, .LANCHOR196
 	mov	w4, w21
 	add	x3, x29, 116
@@ -9176,45 +9197,45 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	w25, [x29, 120]
 	cmn	w25, #1
-	bne	.L1325
+	bne	.L1329
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 	str	w25, [x27]
-.L1325:
+.L1329:
 	ldr	x0, [x27, 16]
-	cbz	x0, .L1326
+	cbz	x0, .L1330
 	ldr	w2, [x0]
 	ldr	x0, [x19, #:lo12:.LANCHOR196]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1326
+	beq	.L1330
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-.L1326:
+.L1330:
 	ldr	x0, [x27, 8]
-	cbz	x0, .L1324
+	cbz	x0, .L1328
 	ldr	w2, [x0]
 	ldr	x0, [x23, #:lo12:.LANCHOR195]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1324
+	beq	.L1328
 	ldr	w1, [x27, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	mov	w0, -1
 	str	w0, [x27]
-	b	.L1324
-.L1322:
+	b	.L1328
+.L1326:
 	adrp	x22, .LANCHOR195
 	mov	x23, x22
-	b	.L1342
+	b	.L1346
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",@progbits
 	.align	2
@@ -9234,38 +9255,38 @@ FlashProgPages:
 	stp	w3, w4, [x29, 100]
 	adrp	x4, .LANCHOR1
 	ldrb	w4, [x4, #:lo12:.LANCHOR1]
-	cbnz	w4, .L1345
+	cbnz	w4, .L1349
 	mov	x19, x0
-	adrp	x0, .LANCHOR29+9
+	adrp	x0, .LANCHOR30+9
 	adrp	x27, .LANCHOR23
 	mov	w24, w1
-	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR30+9]
 	mov	w22, w2
 	add	x28, x27, :lo12:.LANCHOR23
 	mov	w21, 0
 	str	w0, [x29, 108]
-.L1346:
+.L1350:
 	cmp	w21, w24
 	adrp	x26, .LANCHOR25
-	bcc	.L1359
+	bcc	.L1363
 	adrp	x21, .LANCHOR8
 	adrp	x23, .LANCHOR23
 	add	x25, x26, :lo12:.LANCHOR25
 	add	x21, x21, :lo12:.LANCHOR8
 	add	x23, x23, :lo12:.LANCHOR23
 	mov	x20, 0
-.L1360:
+.L1364:
 	ldrb	w0, [x25]
 	cmp	w0, w20
-	bhi	.L1362
+	bhi	.L1366
 	ldr	w0, [x29, 100]
-	cbnz	w0, .L1363
-.L1371:
+	cbnz	w0, .L1367
+.L1375:
 	mov	w0, 0
-	b	.L1344
-.L1345:
+	b	.L1348
+.L1349:
 	bl	FlashProgSlc2KPages
-.L1344:
+.L1348:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9273,7 +9294,7 @@ FlashProgPages:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1359:
+.L1363:
 	mov	w12, 56
 	mov	w1, w22
 	sub	w4, w24, w21
@@ -9287,13 +9308,13 @@ FlashProgPages:
 	ldrb	w1, [x26, #:lo12:.LANCHOR25]
 	ldr	w0, [x29, 116]
 	cmp	w1, w0
-	bhi	.L1348
+	bhi	.L1352
 	mov	w0, -1
 	str	w0, [x19, x12]
-.L1349:
+.L1353:
 	add	w21, w21, 1
-	b	.L1346
-.L1348:
+	b	.L1350
+.L1352:
 	adrp	x1, .LANCHOR27
 	add	x2, x27, :lo12:.LANCHOR23
 	mov	x3, 24
@@ -9303,20 +9324,20 @@ FlashProgPages:
 	csel	w23, w23, wzr, ne
 	madd	x1, x1, x3, x2
 	ldr	x1, [x1, 8]
-	cbz	x1, .L1351
+	cbz	x1, .L1355
 	bl	FlashWaitCmdDone
-.L1351:
+.L1355:
 	ldp	w2, w1, [x29, 112]
 	mov	x0, 24
 	madd	x0, x1, x0, x28
 	str	w2, [x0, 4]
 	stp	x25, xzr, [x0, 8]
-	cbz	w23, .L1352
+	cbz	w23, .L1356
 	add	w2, w21, 1
 	mov	w3, 56
 	umaddl	x2, w2, w3, x19
 	str	x2, [x0, 16]
-.L1352:
+.L1356:
 	adrp	x0, .LANCHOR26
 	add	x0, x0, :lo12:.LANCHOR26
 	ldrb	w20, [x0, x1]
@@ -9326,17 +9347,17 @@ FlashProgPages:
 	cmp	w0, 1
 	mov	w0, w20
 	strb	w20, [x28, x1]
-	bne	.L1353
+	bne	.L1357
 	bl	NandcWaitFlashReady
-.L1354:
+.L1358:
 	ldr	w0, [x29, 104]
 	sub	w0, w0, #1
 	cmp	w0, 6
-	bhi	.L1355
+	bhi	.L1359
 	adrp	x0, .LANCHOR21
 	add	x0, x0, :lo12:.LANCHOR21
 	ldrb	w0, [x0, w20, sxtw]
-	cbz	w0, .L1355
+	cbz	w0, .L1359
 	adrp	x0, .LANCHOR20
 	add	x0, x0, :lo12:.LANCHOR20
 	add	x2, x0, 4
@@ -9344,17 +9365,17 @@ FlashProgPages:
 	ldrb	w1, [x0, 1]
 	mov	w0, w20
 	bl	HynixSetRRPara
-.L1355:
+.L1359:
 	mov	w0, w20
 	bl	NandcFlashCs
 	cmp	w22, 1
-	bne	.L1356
+	bne	.L1360
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1356
+	cbz	w0, .L1360
 	mov	w0, w20
 	bl	flash_enter_slc_mode
-.L1357:
+.L1361:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgFirstCmd
@@ -9363,7 +9384,7 @@ FlashProgPages:
 	ldp	x3, x4, [x25, 8]
 	mov	w0, w20
 	bl	NandcXferData
-	cbz	w23, .L1358
+	cbz	w23, .L1362
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	bl	FlashProgDpFirstCmd
@@ -9391,15 +9412,15 @@ FlashProgPages:
 	ldp	x3, x4, [x0, 8]
 	mov	w0, w20
 	bl	NandcXferData
-.L1358:
+.L1362:
 	ldr	w1, [x29, 112]
 	mov	w0, w20
 	add	w21, w21, w23
 	bl	FlashProgSecondCmd
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1349
-.L1353:
+	b	.L1353
+.L1357:
 	bl	NandcFlashCs
 	ldr	w1, [x29, 116]
 	adrp	x0, .LANCHOR17
@@ -9412,47 +9433,47 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	w0, w20
 	bl	NandcFlashDeCs
-	b	.L1354
-.L1356:
+	b	.L1358
+.L1360:
 	mov	w0, w20
 	bl	flash_exit_slc_mode
-	b	.L1357
-.L1362:
+	b	.L1361
+.L1366:
 	mov	w0, w20
 	bl	FlashWaitCmdDone
 	cmp	w22, 1
-	bne	.L1361
+	bne	.L1365
 	ldrb	w0, [x21]
-	cbz	w0, .L1361
+	cbz	w0, .L1365
 	mov	x0, 24
 	mul	x0, x20, x0
 	ldrb	w0, [x0, x23]
 	bl	flash_exit_slc_mode
-.L1361:
+.L1365:
 	add	x20, x20, 1
-	b	.L1360
-.L1363:
+	b	.L1364
+.L1367:
 	mov	w0, 56
 	and	w20, w24, 255
 	adrp	x23, .LANCHOR195
 	mov	x25, x23
 	umaddl	x24, w24, w0, x19
-.L1364:
+.L1368:
 	cmp	x24, x19
-	beq	.L1371
+	beq	.L1375
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1365
+	bne	.L1369
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
 	bl	printf
-.L1366:
+.L1370:
 	sub	w20, w20, #1
 	add	x19, x19, 56
 	and	w20, w20, 255
-	b	.L1364
-.L1365:
+	b	.L1368
+.L1369:
 	adrp	x21, .LANCHOR196
 	mov	w4, w20
 	add	x3, x29, 116
@@ -9475,41 +9496,41 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	w26, [x29, 120]
 	cmn	w26, #1
-	bne	.L1367
+	bne	.L1371
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
 	bl	printf
 	str	w26, [x19]
-.L1367:
+.L1371:
 	ldr	x0, [x19, 16]
-	cbz	x0, .L1368
+	cbz	x0, .L1372
 	ldr	w2, [x0]
 	ldr	x0, [x21, #:lo12:.LANCHOR196]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1368
+	beq	.L1372
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-.L1368:
+.L1372:
 	ldr	x0, [x19, 8]
-	cbz	x0, .L1366
+	cbz	x0, .L1370
 	ldr	w2, [x0]
 	ldr	x0, [x25, #:lo12:.LANCHOR195]
 	ldr	w3, [x0]
 	cmp	w2, w3
-	beq	.L1366
+	beq	.L1370
 	ldr	w1, [x19, 4]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
 	bl	printf
 	mov	w0, -1
 	str	w0, [x19]
-	b	.L1366
+	b	.L1370
 	.size	FlashProgPages, .-FlashProgPages
 	.section	.text.FlashTestBlk,"ax",@progbits
 	.align	2
@@ -9520,20 +9541,20 @@ FlashTestBlk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR147
-	ldr	w0, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR146
+	ldr	w0, [x0, #:lo12:.LANCHOR146]
 	cmp	w19, w0
-	bcc	.L1399
-	adrp	x20, .LANCHOR151
+	bcc	.L1403
+	adrp	x20, .LANCHOR150
 	mov	w2, 32
 	mov	w1, 165
 	lsl	w19, w19, 10
-	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	ldr	x0, [x20, #:lo12:.LANCHOR150]
 	str	x0, [x29, 48]
 	add	x0, x29, 96
 	str	x0, [x29, 56]
 	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	ldr	x0, [x20, #:lo12:.LANCHOR150]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -9554,227 +9575,239 @@ FlashTestBlk:
 	add	x0, x29, 40
 	csetm	w19, ne
 	bl	FlashEraseBlocks
-.L1397:
+.L1401:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1399:
+.L1403:
 	mov	w19, 0
-	b	.L1397
+	b	.L1401
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
 	.align	2
 	.global	FtlLowFormatEraseBlock
 	.type	FtlLowFormatEraseBlock, %function
 FtlLowFormatEraseBlock:
-	stp	x29, x30, [sp, -128]!
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	adrp	x0, .LANCHOR75
+	and	w26, w0, 65535
+	adrp	x0, .LANCHOR76
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1424
-	adrp	x0, .LANCHOR72
-	and	w24, w1, 255
-	adrp	x23, .LANCHOR8
-	adrp	x1, .LANCHOR36
-	str	w25, [x0, #:lo12:.LANCHOR72]
+	cbnz	w0, .L1428
+	adrp	x23, .LANCHOR27
+	and	w25, w1, 255
+	adrp	x20, .LANCHOR8
+	adrp	x1, .LANCHOR37
+	ldrb	w0, [x23, #:lo12:.LANCHOR27]
+	adrp	x21, .LANCHOR77
+	str	w0, [x29, 136]
+	mov	x8, 56
+	adrp	x0, .LANCHOR73
+	ldrb	w10, [x20, #:lo12:.LANCHOR8]
+	ldrh	w11, [x1, #:lo12:.LANCHOR37]
+	adrp	x7, .LANCHOR46
+	str	w26, [x0, #:lo12:.LANCHOR73]
 	adrp	x0, .LANCHOR186
-	adrp	x21, .LANCHOR76
-	ldrb	w10, [x23, #:lo12:.LANCHOR8]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
+	add	x7, x7, :lo12:.LANCHOR46
 	ldr	x12, [x0, #:lo12:.LANCHOR186]
-	adrp	x0, .LANCHOR57
-	ldrh	w11, [x1, #:lo12:.LANCHOR36]
-	mov	x8, 56
-	ldr	x6, [x21, #:lo12:.LANCHOR76]
-	adrp	x7, .LANCHOR45
-	ldrh	w13, [x0, #:lo12:.LANCHOR57]
-	add	x7, x7, :lo12:.LANCHOR45
+	adrp	x0, .LANCHOR58
 	mov	w14, w8
 	mov	x5, 0
-	mov	w20, 0
+	ldrh	w13, [x0, #:lo12:.LANCHOR58]
+	mov	w24, 0
 	mov	w19, 0
-	stp	x0, x1, [x29, 112]
-.L1403:
+	str	x1, [x29, 128]
+	str	x0, [x29, 120]
+.L1407:
 	cmp	w11, w5, uxth
-	bhi	.L1407
-	cbz	w20, .L1401
+	bhi	.L1411
+	cbz	w24, .L1405
 	cmp	w10, 0
-	mov	w2, w20
+	mov	w2, w24
 	cset	w22, ne
-	mov	x0, x6
+	strb	wzr, [x23, #:lo12:.LANCHOR27]
 	mov	w1, w22
-	mov	x26, 0
+	mov	x0, x6
 	bl	FlashEraseBlocks
+	mov	x27, 0
+	ldrb	w0, [x29, 136]
+	strb	w0, [x23, #:lo12:.LANCHOR27]
 	mov	w0, 56
-	umull	x20, w20, w0
-.L1410:
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
-	add	x1, x0, x26
-	ldr	w0, [x0, x26]
+	umull	x24, w24, w0
+.L1414:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
+	add	x1, x0, x27
+	ldr	w0, [x0, x27]
 	cmn	w0, #1
-	bne	.L1409
+	bne	.L1413
 	ldr	w0, [x1, 4]
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-.L1409:
-	add	x26, x26, 56
-	cmp	x26, x20
-	bne	.L1410
-	cbnz	w24, .L1411
+.L1413:
+	add	x27, x27, 56
+	cmp	x27, x24
+	bne	.L1414
+	cbnz	w25, .L1415
 	and	w22, w22, 65535
-	mov	w27, 6
-	mov	w26, 1
-.L1412:
-	adrp	x28, .LANCHOR45
-	mov	w23, 0
-	add	x0, x28, :lo12:.LANCHOR45
-	str	x0, [x29, 104]
-.L1420:
-	ldr	x0, [x29, 120]
+	mov	w28, 6
+	mov	w27, 1
+.L1416:
+	adrp	x0, .LANCHOR46
+	mov	w24, 0
+	add	x0, x0, :lo12:.LANCHOR46
+	str	x0, [x29, 112]
+.L1424:
+	ldr	x0, [x29, 128]
 	mov	x5, 0
-	ldr	x6, [x21, #:lo12:.LANCHOR76]
+	ldr	x6, [x21, #:lo12:.LANCHOR77]
 	mov	w20, 0
 	mov	w12, 56
-	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	ldrh	w7, [x0, #:lo12:.LANCHOR37]
 	adrp	x0, .LANCHOR183
 	ldr	x8, [x0, #:lo12:.LANCHOR183]
 	adrp	x0, .LANCHOR184
 	ldr	x10, [x0, #:lo12:.LANCHOR184]
-	ldr	x0, [x29, 112]
-	ldrh	w11, [x0, #:lo12:.LANCHOR57]
-.L1413:
+	ldr	x0, [x29, 120]
+	ldrh	w11, [x0, #:lo12:.LANCHOR58]
+.L1417:
 	cmp	w7, w5, uxth
-	bhi	.L1416
-	cbz	w20, .L1401
+	bhi	.L1420
+	cbz	w20, .L1405
+	mov	w2, w22
 	mov	w1, w20
+	strb	wzr, [x23, #:lo12:.LANCHOR27]
 	mov	w3, 1
-	mov	w2, w22
 	mov	x0, x6
 	bl	FlashProgPages
-	mov	x28, 0
 	mov	w1, 56
+	ldrb	w0, [x29, 136]
+	strb	w0, [x23, #:lo12:.LANCHOR27]
+	mov	x2, 0
 	umull	x1, w20, w1
-.L1419:
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
-	add	x3, x0, x28
-	ldr	w0, [x0, x28]
-	cbz	w0, .L1418
+.L1423:
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
+	add	x3, x0, x2
+	ldr	w0, [x0, x2]
+	cbz	w0, .L1422
 	ldr	w0, [x3, 4]
 	add	w19, w19, 1
-	str	x1, [x29, 96]
+	stp	x2, x1, [x29, 96]
 	and	w19, w19, 65535
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
-	ldr	x1, [x29, 96]
-.L1418:
-	add	x28, x28, 56
-	cmp	x1, x28
-	bne	.L1419
-	add	w23, w23, w27
-	and	w23, w23, 65535
-	cmp	w23, w26
-	bcc	.L1420
-	mov	x23, 0
+	ldp	x2, x1, [x29, 96]
 .L1422:
-	cbz	w24, .L1421
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x2, x2, 56
+	cmp	x1, x2
+	bne	.L1423
+	add	w24, w24, w28
+	and	w24, w24, 65535
+	cmp	w27, w24
+	bhi	.L1424
+	mov	x23, 0
+.L1426:
+	cbz	w25, .L1425
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	add	x1, x0, x23
 	ldr	w0, [x0, x23]
-	cbnz	w0, .L1421
+	cbnz	w0, .L1425
 	ldr	w0, [x1, 4]
 	mov	w1, 1
+	str	x2, [x29, 136]
 	lsr	w0, w0, 10
 	bl	FtlFreeSysBlkQueueIn
-.L1421:
+	ldr	x2, [x29, 136]
+.L1425:
 	add	x23, x23, 56
-	cmp	x23, x28
-	bne	.L1422
-	cmp	w25, 63
-	ccmp	w24, 0, 0, hi
-	beq	.L1401
-	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	cmp	x23, x2
+	bne	.L1426
+	cmp	w26, 63
+	ccmp	w25, 0, 0, hi
+	beq	.L1405
+	ldr	x0, [x21, #:lo12:.LANCHOR77]
 	mov	w2, w20
 	mov	w1, w22
 	bl	FlashEraseBlocks
-.L1401:
+.L1405:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 144
 	ret
-.L1407:
+.L1411:
 	mul	x0, x5, x8
-	mov	w1, w25
+	mov	w1, w26
 	str	wzr, [x6, x0]
 	ldrb	w0, [x7, x5]
 	bl	V2P_block
 	and	w15, w0, 65535
 	mov	w22, w15
-	cbz	w24, .L1404
+	cbz	w25, .L1408
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1405
-.L1404:
+	cbnz	w0, .L1409
+.L1408:
 	mov	w0, w22
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1406
-	umaddl	x1, w20, w14, x6
+	cbnz	w0, .L1410
+	umaddl	x1, w24, w14, x6
 	lsl	w15, w15, 10
-	mul	w0, w20, w13
-	add	w20, w20, 1
-	and	w20, w20, 65535
+	mul	w0, w24, w13
+	add	w24, w24, 1
+	and	w24, w24, 65535
 	asr	w0, w0, 2
 	str	w15, [x1, 4]
 	add	x0, x12, x0, sxtw 2
 	stp	xzr, x0, [x1, 8]
-.L1405:
+.L1409:
 	add	x5, x5, 1
-	b	.L1403
-.L1406:
+	b	.L1407
+.L1410:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1405
-.L1411:
-	adrp	x0, .LANCHOR52
-	ldrh	w26, [x0, #:lo12:.LANCHOR52]
-	ldrb	w0, [x23, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1425
-	lsr	w27, w26, 2
+	b	.L1409
+.L1415:
+	adrp	x0, .LANCHOR53
+	ldrh	w27, [x0, #:lo12:.LANCHOR53]
+	ldrb	w0, [x20, #:lo12:.LANCHOR8]
+	cbnz	w0, .L1429
+	lsr	w28, w27, 2
 	mov	w22, 1
-	b	.L1412
-.L1425:
+	b	.L1416
+.L1429:
 	mov	w22, 1
-	mov	w27, w22
-	b	.L1412
-.L1416:
+	mov	w28, w22
+	b	.L1416
+.L1420:
 	mov	x0, 56
-	mov	w1, w25
+	mov	w1, w26
 	mul	x0, x5, x0
 	str	wzr, [x6, x0]
-	ldr	x0, [x29, 104]
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0, x5]
 	bl	V2P_block
 	and	w13, w0, 65535
 	mov	w14, w13
-	cbz	w24, .L1414
+	cbz	w25, .L1418
 	bl	IsBlkInVendorPart
-	cbnz	w0, .L1415
-.L1414:
+	cbnz	w0, .L1419
+.L1418:
 	mov	w0, w14
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1415
+	cbnz	w0, .L1419
 	umaddl	x1, w20, w12, x6
-	add	w13, w23, w13, lsl 10
+	add	w13, w24, w13, lsl 10
 	mul	w0, w20, w11
 	add	w20, w20, 1
 	and	w20, w20, 65535
@@ -9782,12 +9815,12 @@ FtlLowFormatEraseBlock:
 	str	w13, [x1, 4]
 	add	x0, x10, x0, sxtw 2
 	stp	x8, x0, [x1, 8]
-.L1415:
+.L1419:
 	add	x5, x5, 1
-	b	.L1413
-.L1424:
+	b	.L1417
+.L1428:
 	mov	w19, 0
-	b	.L1401
+	b	.L1405
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FtlBbmTblFlush,"ax",@progbits
 	.align	2
@@ -9797,45 +9830,45 @@ FtlBbmTblFlush:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR75
+	adrp	x22, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x22, #:lo12:.LANCHOR75]
+	ldr	w0, [x22, #:lo12:.LANCHOR76]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L1448
+	cbnz	w0, .L1452
 	adrp	x24, .LANCHOR185
-	adrp	x23, .LANCHOR79
+	adrp	x23, .LANCHOR180
 	adrp	x19, .LANCHOR199
 	add	x20, x19, :lo12:.LANCHOR199
 	ldr	x1, [x24, #:lo12:.LANCHOR185]
-	adrp	x21, .LANCHOR73
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
-	add	x26, x21, :lo12:.LANCHOR73
+	adrp	x21, .LANCHOR74
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	add	x26, x21, :lo12:.LANCHOR74
 	stp	x0, x1, [x20, 8]
-	adrp	x1, .LANCHOR56
-	adrp	x27, .LANCHOR43
+	adrp	x1, .LANCHOR57
+	adrp	x27, .LANCHOR44
 	adrp	x28, .LANCHOR120
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	add	x26, x26, 32
 	mov	w25, 0
-	add	x27, x27, :lo12:.LANCHOR43
+	add	x27, x27, :lo12:.LANCHOR44
 	add	x28, x28, :lo12:.LANCHOR120
 	mov	w1, 0
 	bl	ftl_memset
-.L1449:
+.L1453:
 	ldrh	w0, [x27]
 	cmp	w25, w0
-	blt	.L1450
+	blt	.L1454
 	add	x19, x19, :lo12:.LANCHOR199
-	add	x20, x21, :lo12:.LANCHOR73
+	add	x20, x21, :lo12:.LANCHOR74
 	mov	w2, 16
 	mov	w1, 255
-	adrp	x25, .LC28
-	adrp	x27, .LANCHOR52
+	adrp	x25, .LC31
+	adrp	x27, .LANCHOR53
 	ldr	x28, [x19, 16]
-	add	x25, x25, :lo12:.LC28
-	add	x27, x27, :lo12:.LANCHOR52
+	add	x25, x25, :lo12:.LC31
+	add	x27, x27, :lo12:.LANCHOR53
 	mov	w26, 0
 	mov	x0, x28
 	bl	ftl_memset
@@ -9843,22 +9876,22 @@ FtlBbmTblFlush:
 	strh	w0, [x28]
 	ldr	w0, [x20, 8]
 	str	w0, [x28, 4]
-	ldrh	w0, [x21, #:lo12:.LANCHOR73]
+	ldrh	w0, [x21, #:lo12:.LANCHOR74]
 	mov	w21, 0
 	strh	w0, [x28, 2]
 	ldrh	w0, [x20, 4]
 	strh	w0, [x28, 8]
 	ldrh	w0, [x20, 6]
 	strh	w0, [x28, 10]
-	adrp	x0, .LANCHOR35
-	ldr	w0, [x0, #:lo12:.LANCHOR35]
+	adrp	x0, .LANCHOR36
+	ldr	w0, [x0, #:lo12:.LANCHOR36]
 	strh	w0, [x28, 12]
-.L1451:
+.L1455:
 	ldrh	w4, [x28, 10]
 	ldrh	w1, [x20]
 	ldrh	w2, [x20, 2]
 	ldrh	w3, [x20, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	str	x0, [x19, 8]
 	ldr	x0, [x24, #:lo12:.LANCHOR185]
 	str	x0, [x19, 16]
@@ -9876,7 +9909,7 @@ FtlBbmTblFlush:
 	ldrh	w1, [x20, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1452
+	blt	.L1456
 	ldr	w0, [x20, 8]
 	mov	w2, 1
 	ldrh	w1, [x20, 4]
@@ -9886,10 +9919,10 @@ FtlBbmTblFlush:
 	ldrh	w0, [x20]
 	strh	w0, [x28, 8]
 	strh	w0, [x20, 4]
-	adrp	x0, .LANCHOR76
+	adrp	x0, .LANCHOR77
 	strh	w1, [x20]
 	lsl	w1, w1, 10
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	w1, [x19, 4]
 	strh	wzr, [x20, 2]
 	str	w1, [x0, 4]
@@ -9900,29 +9933,29 @@ FtlBbmTblFlush:
 	mov	w2, w3
 	mov	w1, w3
 	bl	FlashProgPages
-.L1452:
+.L1456:
 	ldrh	w0, [x20, 2]
 	add	w0, w0, 1
 	strh	w0, [x20, 2]
 	ldr	w0, [x19]
 	cmn	w0, #1
-	bne	.L1453
+	bne	.L1457
 	ldr	w1, [x19, 4]
 	add	w21, w21, 1
-	adrp	x0, .LC29
+	adrp	x0, .LC32
 	and	w21, w21, 65535
-	add	x0, x0, :lo12:.LC29
+	add	x0, x0, :lo12:.LC32
 	bl	printf
 	cmp	w21, 3
-	bls	.L1451
+	bls	.L1455
 	ldr	w1, [x19, 4]
 	mov	w2, w21
-	adrp	x0, .LC30
-	add	x0, x0, :lo12:.LC30
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
 	bl	printf
 	mov	w0, 1
-	str	w0, [x22, #:lo12:.LANCHOR75]
-.L1448:
+	str	w0, [x22, #:lo12:.LANCHOR76]
+.L1452:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9931,7 +9964,7 @@ FtlBbmTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1450:
+.L1454:
 	ldrh	w2, [x28]
 	ldr	x1, [x26], 8
 	ldr	x0, [x20, 8]
@@ -9940,128 +9973,128 @@ FtlBbmTblFlush:
 	add	w25, w25, 1
 	add	x0, x0, x3, sxtw 2
 	bl	ftl_memcpy
-	b	.L1449
-.L1453:
-	cbnz	w26, .L1448
+	b	.L1453
+.L1457:
+	cbnz	w26, .L1452
 	mov	w26, 1
-	b	.L1451
+	b	.L1455
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.allocate_data_superblock,"ax",@progbits
 	.align	2
 	.global	allocate_data_superblock
 	.type	allocate_data_superblock, %function
 allocate_data_superblock:
-	adrp	x1, .LANCHOR75
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
-	cbnz	w1, .L1521
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1525
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x27, x28, [sp, 80]
-	adrp	x27, .LANCHOR84
-	add	x0, x27, :lo12:.LANCHOR84
+	adrp	x27, .LANCHOR85
+	add	x0, x27, :lo12:.LANCHOR85
 	stp	x23, x24, [sp, 48]
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR87
-	add	x23, x0, :lo12:.LANCHOR87
+	adrp	x0, .LANCHOR88
+	add	x23, x0, :lo12:.LANCHOR88
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-.L1512:
+.L1516:
 	ldr	x1, [x29, 120]
-	adrp	x0, .LANCHOR87
-	adrp	x25, .LANCHOR38
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	adrp	x25, .LANCHOR39
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	ldrh	w1, [x1]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1461
-	mov	w2, 2822
+	ble	.L1465
+	mov	w2, 2861
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1461:
-	adrp	x0, .LANCHOR92
-	add	x0, x0, :lo12:.LANCHOR92
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1465:
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
 	cmp	x19, x0
-	bne	.L1462
-	adrp	x1, .LANCHOR170
+	bne	.L1466
+	adrp	x1, .LANCHOR169
 	ldrh	w2, [x23]
-	ldr	w3, [x1, #:lo12:.LANCHOR170]
+	ldr	w3, [x1, #:lo12:.LANCHOR169]
 	lsr	w0, w2, 1
 	add	w4, w0, 1
 	mul	w1, w2, w3
 	add	w1, w4, w1, lsr 2
-	adrp	x4, .LANCHOR101
+	adrp	x4, .LANCHOR28
 	and	w1, w1, 65535
-	ldr	w4, [x4, #:lo12:.LANCHOR101]
-	cbz	w4, .L1463
-	adrp	x4, .LANCHOR168
-	ldr	w4, [x4, #:lo12:.LANCHOR168]
+	ldr	w4, [x4, #:lo12:.LANCHOR28]
+	cbz	w4, .L1467
+	adrp	x4, .LANCHOR167
+	ldr	w4, [x4, #:lo12:.LANCHOR167]
 	cmp	w4, 29
-	bhi	.L1463
+	bhi	.L1467
 	cmp	w4, 2
-	bls	.L1496
-	tbz	x2, 0, .L1492
-	cbz	w3, .L1496
-.L1492:
+	bls	.L1500
+	tbz	x2, 0, .L1496
+	cbz	w3, .L1500
+.L1496:
 	mov	w1, w0
-	b	.L1463
-.L1462:
+	b	.L1467
+.L1466:
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1496
-	adrp	x0, .LANCHOR42
-	ldrh	w0, [x0, #:lo12:.LANCHOR42]
+	bne	.L1500
+	adrp	x0, .LANCHOR43
+	ldrh	w0, [x0, #:lo12:.LANCHOR43]
 	cmp	w0, 1
-	beq	.L1496
+	beq	.L1500
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L1496
-	adrp	x2, .LANCHOR101
+	cbnz	w0, .L1500
+	adrp	x2, .LANCHOR28
 	ldrh	w0, [x23]
-	ldr	w2, [x2, #:lo12:.LANCHOR101]
+	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	lsr	w1, w0, 3
-	cbz	w2, .L1463
-	adrp	x2, .LANCHOR168
-	ldr	w2, [x2, #:lo12:.LANCHOR168]
+	cbz	w2, .L1467
+	adrp	x2, .LANCHOR167
+	ldr	w2, [x2, #:lo12:.LANCHOR167]
 	cmp	w2, 1
-	bhi	.L1463
+	bhi	.L1467
 	mov	w1, 7
 	mul	w1, w0, w1
 	lsr	w1, w1, 3
-.L1463:
-	cbz	w1, .L1464
+.L1467:
+	cbz	w1, .L1468
 	sub	w1, w1, #1
 	and	w1, w1, 65535
-.L1464:
+.L1468:
 	ldrb	w2, [x19, 8]
-	adrp	x0, .LANCHOR86
-	add	x0, x0, :lo12:.LANCHOR86
+	adrp	x0, .LANCHOR87
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_pop_index_node
 	and	w21, w0, 65535
 	ldrh	w0, [x23]
-	cbnz	w0, .L1465
-	mov	w2, 2842
+	cbnz	w0, .L1469
+	mov	w2, 2881
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1465:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1469:
 	ldrh	w0, [x23]
 	sub	w0, w0, #1
 	strh	w0, [x23]
@@ -10069,147 +10102,147 @@ allocate_data_superblock:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1466
-	adrp	x0, .LANCHOR82
+	cbnz	w0, .L1470
+	adrp	x0, .LANCHOR83
 	ubfiz	x21, x21, 1, 16
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	strh	w1, [x0, x21]
-	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1512
-	mov	w2, 2854
+	ble	.L1516
+	mov	w2, 2893
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L1512
-.L1496:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L1516
+.L1500:
 	mov	w1, 0
-	b	.L1464
-.L1466:
-	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	b	.L1468
+.L1470:
+	ldrh	w1, [x27, #:lo12:.LANCHOR85]
 	ldrh	w0, [x23]
 	add	w0, w0, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1468
-	mov	w2, 2857
+	ble	.L1472
+	mov	w2, 2896
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1468:
-	adrp	x1, .LANCHOR36
-	adrp	x24, .LANCHOR76
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1472:
+	adrp	x1, .LANCHOR37
+	adrp	x24, .LANCHOR77
 	mov	w2, 56
 	mov	x3, 8
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	add	x26, x19, 16
-	ldr	x4, [x24, #:lo12:.LANCHOR76]
+	ldr	x4, [x24, #:lo12:.LANCHOR77]
 	mov	x5, x26
 	mov	w20, 0
 	mov	w6, 65535
 	add	x0, x4, 8
 	umaddl	x1, w2, w1, x3
 	add	x1, x4, x1
-.L1469:
+.L1473:
 	cmp	x1, x0
-	bne	.L1471
-	cbnz	w20, .L1472
-	mov	w2, 2869
+	bne	.L1475
+	cbnz	w20, .L1476
+	mov	w2, 2908
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1472:
-	adrp	x0, .LANCHOR101
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1476:
+	adrp	x0, .LANCHOR28
 	uxtw	x22, w21
-	adrp	x28, .LANCHOR77
-	ldr	w0, [x0, #:lo12:.LANCHOR101]
-	cbz	w0, .L1473
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
+	adrp	x28, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L1477
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
 	cmp	x19, x0
-	bne	.L1473
-	ldr	x0, [x28, #:lo12:.LANCHOR77]
+	bne	.L1477
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	ldrh	w0, [x0, x22, lsl 1]
 	cmp	w0, 30
-	bls	.L1473
+	bls	.L1477
 	strb	wzr, [x19, 8]
-.L1473:
+.L1477:
 	adrp	x0, .LANCHOR201
 	ldrh	w0, [x0, #:lo12:.LANCHOR201]
 	cmp	w0, w21
-	bne	.L1474
-	mov	w2, 2876
+	bne	.L1478
+	mov	w2, 2915
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1474:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1478:
 	ldrb	w0, [x19, 8]
-	adrp	x6, .LANCHOR46
-	adrp	x5, .LANCHOR165
-	adrp	x4, .LANCHOR166
-	cbnz	w0, .L1475
-	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	adrp	x6, .LANCHOR47
+	adrp	x5, .LANCHOR164
+	adrp	x4, .LANCHOR165
+	cbnz	w0, .L1479
+	ldr	x2, [x28, #:lo12:.LANCHOR78]
 	lsl	x1, x22, 1
 	ldrh	w0, [x2, x1]
-	cbz	w0, .L1476
-	ldrh	w7, [x6, #:lo12:.LANCHOR46]
+	cbz	w0, .L1480
+	ldrh	w7, [x6, #:lo12:.LANCHOR47]
 	add	w0, w0, w7
-.L1524:
+.L1528:
 	strh	w0, [x2, x1]
 	mov	w1, 0
-	ldr	w0, [x5, #:lo12:.LANCHOR165]
+	ldr	w0, [x5, #:lo12:.LANCHOR164]
 	add	w0, w0, 1
-	str	w0, [x5, #:lo12:.LANCHOR165]
+	str	w0, [x5, #:lo12:.LANCHOR164]
 	mov	w0, w21
 	bl	ftl_set_blk_mode
-.L1478:
-	ldr	x0, [x28, #:lo12:.LANCHOR77]
+.L1482:
+	ldr	x0, [x28, #:lo12:.LANCHOR78]
 	lsl	x22, x22, 1
 	ldrh	w1, [x0, x22]
-	adrp	x0, .LANCHOR167
-	ldr	w2, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR166
+	ldr	w2, [x0, #:lo12:.LANCHOR166]
 	cmp	w1, w2
-	bls	.L1479
-	str	w1, [x0, #:lo12:.LANCHOR167]
-.L1479:
-	ldr	w2, [x5, #:lo12:.LANCHOR165]
+	bls	.L1483
+	str	w1, [x0, #:lo12:.LANCHOR166]
+.L1483:
+	ldr	w2, [x5, #:lo12:.LANCHOR164]
 	mov	x3, 4
-	ldr	w1, [x4, #:lo12:.LANCHOR166]
-	ldrh	w0, [x6, #:lo12:.LANCHOR46]
+	ldr	w1, [x4, #:lo12:.LANCHOR165]
+	ldrh	w0, [x6, #:lo12:.LANCHOR47]
 	madd	w0, w0, w2, w1
-	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	ldrh	w1, [x25, #:lo12:.LANCHOR39]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR202
 	str	w0, [x1, #:lo12:.LANCHOR202]
@@ -10219,91 +10252,91 @@ allocate_data_superblock:
 	add	w0, w0, 1
 	str	w0, [x1, 16]
 	mov	w1, 56
-	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	nop // between mem op and mult-accumulate
 	umaddl	x1, w1, w20, x3
 	add	x2, x0, 4
 	add	x1, x0, x1
-.L1480:
+.L1484:
 	cmp	x1, x2
-	bne	.L1481
+	bne	.L1485
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L1482
+	cbz	w1, .L1486
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
 	cmp	w1, 1
-	bne	.L1483
+	bne	.L1487
 	mov	w1, 0
-.L1525:
+.L1529:
 	bl	FlashEraseBlocks
-.L1482:
+.L1486:
 	ldrb	w1, [x19, 8]
 	mov	w2, w20
-	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	ldr	x0, [x24, #:lo12:.LANCHOR77]
 	mov	x25, 0
 	bl	FlashEraseBlocks
 	mov	w1, 0
 	mov	x3, 56
-.L1484:
+.L1488:
 	cmp	w20, w25, uxth
-	bhi	.L1486
-	cbz	w1, .L1487
+	bhi	.L1490
+	cbz	w1, .L1491
 	mov	w0, w21
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1487:
+.L1491:
 	ldrb	w0, [x19, 7]
-	adrp	x2, .LANCHOR82
-	cbnz	w0, .L1488
-	ldr	x0, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR83
+	cbnz	w0, .L1492
+	ldr	x0, [x2, #:lo12:.LANCHOR83]
 	mov	w1, -1
 	strh	w1, [x0, x22]
-	b	.L1512
-.L1471:
+	b	.L1516
+.L1475:
 	ldrh	w3, [x5]
 	stp	xzr, xzr, [x0]
 	cmp	w3, w6
-	beq	.L1470
+	beq	.L1474
 	umaddl	x7, w20, w2, x4
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	lsl	w3, w3, 10
 	str	w3, [x7, 4]
-.L1470:
+.L1474:
 	add	x0, x0, 56
 	add	x5, x5, 2
-	b	.L1469
-.L1476:
+	b	.L1473
+.L1480:
 	mov	w0, 2
-	b	.L1524
-.L1475:
-	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	b	.L1528
+.L1479:
+	ldr	x2, [x28, #:lo12:.LANCHOR78]
 	lsl	x0, x22, 1
 	ldrh	w1, [x2, x0]
 	add	w1, w1, 1
 	strh	w1, [x2, x0]
-	ldr	w0, [x4, #:lo12:.LANCHOR166]
+	ldr	w0, [x4, #:lo12:.LANCHOR165]
 	add	w0, w0, 1
-	str	w0, [x4, #:lo12:.LANCHOR166]
+	str	w0, [x4, #:lo12:.LANCHOR165]
 	mov	w0, w21
 	bl	ftl_set_blk_mode.part.9
-	b	.L1478
-.L1481:
+	b	.L1482
+.L1485:
 	ldr	w3, [x2]
 	and	w3, w3, -1024
 	str	w3, [x2], 56
-	b	.L1480
-.L1483:
+	b	.L1484
+.L1487:
 	mov	w1, 1
-	b	.L1525
-.L1486:
+	b	.L1529
+.L1490:
 	mul	x0, x25, x3
-	ldr	x2, [x24, #:lo12:.LANCHOR76]
+	ldr	x2, [x24, #:lo12:.LANCHOR77]
 	add	x4, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L1485
+	bne	.L1489
 	add	w1, w1, 1
 	ldr	w0, [x4, 4]
 	str	x3, [x29, 104]
@@ -10316,43 +10349,43 @@ allocate_data_superblock:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-.L1485:
+.L1489:
 	add	x25, x25, 1
 	add	x26, x26, 2
-	b	.L1484
-.L1488:
-	adrp	x1, .LANCHOR51
-	adrp	x3, .LANCHOR157
+	b	.L1488
+.L1492:
+	adrp	x1, .LANCHOR52
+	adrp	x3, .LANCHOR156
 	strb	wzr, [x19, 6]
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	strh	wzr, [x19, 2]
 	strh	w21, [x19]
 	mul	w0, w0, w1
-	ldr	w1, [x3, #:lo12:.LANCHOR157]
+	ldr	w1, [x3, #:lo12:.LANCHOR156]
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x3, #:lo12:.LANCHOR157]
-	ldr	x1, [x2, #:lo12:.LANCHOR82]
+	str	w1, [x3, #:lo12:.LANCHOR156]
+	ldr	x1, [x2, #:lo12:.LANCHOR83]
 	and	w0, w0, 65535
 	strh	w0, [x19, 4]
 	strh	w0, [x1, x22]
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1489
+	cbz	w0, .L1493
 	ldrb	w0, [x19, 7]
-	cbnz	w0, .L1460
-.L1489:
-	mov	w2, 2935
+	cbnz	w0, .L1464
+.L1493:
+	mov	w2, 2974
 	adrp	x1, .LANCHOR200
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR200
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1460:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1464:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -10361,7 +10394,7 @@ allocate_data_superblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1521:
+.L1525:
 	mov	w0, 0
 	ret
 	.size	allocate_data_superblock, .-allocate_data_superblock
@@ -10380,17 +10413,17 @@ FtlGcFreeBadSuperBlk:
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	str	x27, [sp, 80]
-	cbz	w0, .L1527
+	cbz	w0, .L1531
 	adrp	x23, .LANCHOR115
 	add	x24, x23, :lo12:.LANCHOR115
 	mov	w19, 0
-.L1528:
-	adrp	x0, .LANCHOR36
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+.L1532:
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w0, w19
-	bhi	.L1534
+	bhi	.L1538
 	bl	FtlGcReFreshBadBlk
-.L1527:
+.L1531:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -10399,28 +10432,28 @@ FtlGcFreeBadSuperBlk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1534:
-	adrp	x0, .LANCHOR45
-	add	x0, x0, :lo12:.LANCHOR45
+.L1538:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	mov	w1, w25
 	add	x22, x21, :lo12:.LANCHOR114
 	mov	w20, 0
 	ldrb	w0, [x0, w19, sxtw]
 	bl	V2P_block
 	and	w26, w0, 65535
-.L1529:
+.L1533:
 	ldrh	w0, [x22]
 	cmp	w0, w20
-	bhi	.L1533
+	bhi	.L1537
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1528
-.L1533:
+	b	.L1532
+.L1537:
 	add	x0, x23, :lo12:.LANCHOR115
 	add	w27, w20, 1
 	ldrh	w0, [x0, w20, sxtw 1]
 	cmp	w0, w26
-	bne	.L1530
+	bne	.L1534
 	mov	w0, w26
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
@@ -10428,22 +10461,22 @@ FtlGcFreeBadSuperBlk:
 	sxtw	x3, w27
 	and	x4, x20, 65535
 	mov	x0, 0
-.L1531:
+.L1535:
 	add	w2, w20, w0
 	cmp	w1, w2, uxth
-	bhi	.L1532
+	bhi	.L1536
 	sub	w1, w1, #1
 	strh	w1, [x22]
-.L1530:
+.L1534:
 	and	w20, w27, 65535
-	b	.L1529
-.L1532:
+	b	.L1533
+.L1536:
 	add	x2, x3, x0
 	ldrh	w5, [x24, x2, lsl 1]
 	add	x2, x4, x0
 	add	x0, x0, 1
 	strh	w5, [x24, x2, lsl 1]
-	b	.L1531
+	b	.L1535
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",@progbits
 	.align	2
@@ -10451,92 +10484,92 @@ FtlGcFreeBadSuperBlk:
 	.type	update_vpc_list, %function
 update_vpc_list:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ubfiz	x0, x19, 1, 16
 	ldrh	w0, [x1, x0]
-	cbnz	w0, .L1540
+	cbnz	w0, .L1544
 	adrp	x0, .LANCHOR201
 	ldrh	w1, [x0, #:lo12:.LANCHOR201]
 	cmp	w1, w19
-	bne	.L1541
+	bne	.L1545
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR201]
-.L1542:
-	adrp	x20, .LANCHOR84
+.L1546:
+	adrp	x20, .LANCHOR85
 	mov	w1, w19
-	adrp	x0, .LANCHOR81
-	add	x0, x0, :lo12:.LANCHOR81
+	adrp	x0, .LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR82
 	bl	List_remove_node
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
-	cbnz	w0, .L1544
-	mov	w2, 3046
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
+	cbnz	w0, .L1548
+	mov	w2, 3085
 	adrp	x1, .LANCHOR203
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1544:
-	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1548:
+	ldrh	w0, [x20, #:lo12:.LANCHOR85]
 	sub	w0, w0, #1
-	strh	w0, [x20, #:lo12:.LANCHOR84]
+	strh	w0, [x20, #:lo12:.LANCHOR85]
 	mov	w0, w19
 	bl	free_data_superblock
 	mov	w0, w19
 	bl	FtlGcFreeBadSuperBlk
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x20, #:lo12:.LANCHOR84]
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x20, #:lo12:.LANCHOR85]
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	add	w0, w0, w1
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	cmp	w0, w1
-	ble	.L1548
-	mov	w2, 3049
+	ble	.L1552
+	mov	w2, 3088
 	adrp	x1, .LANCHOR203
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR203
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1548:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1552:
 	mov	w0, 1
-	b	.L1539
-.L1541:
-	adrp	x0, .LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	cmp	w0, w19
-	beq	.L1547
+	b	.L1543
+.L1545:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w19
-	beq	.L1547
+	beq	.L1551
 	adrp	x0, .LANCHOR92
 	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w0, w19
-	bne	.L1542
-.L1547:
+	beq	.L1551
+	adrp	x0, .LANCHOR93
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
+	cmp	w0, w19
+	bne	.L1546
+.L1551:
 	mov	w0, 0
-.L1539:
+.L1543:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1540:
+.L1544:
 	mov	w0, w19
 	bl	List_update_data_list
-	b	.L1547
+	b	.L1551
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",@progbits
 	.align	2
@@ -10550,87 +10583,87 @@ decrement_vpc_count:
 	str	x21, [sp, 32]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L1551
-	adrp	x21, .LANCHOR82
+	beq	.L1555
+	adrp	x21, .LANCHOR83
 	ubfiz	x20, x19, 1, 16
-	ldr	x1, [x21, #:lo12:.LANCHOR82]
+	ldr	x1, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x20]
-	cbnz	w0, .L1552
+	cbnz	w0, .L1556
 	mov	w2, 0
 	mov	w1, w19
-	adrp	x0, .LC31
-	add	x0, x0, :lo12:.LC31
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x20]
-	cbz	w0, .L1553
-.L1558:
+	cbz	w0, .L1557
+.L1562:
 	mov	w20, 0
-.L1550:
+.L1554:
 	mov	w0, w20
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1553:
-	mov	w2, 3064
+.L1557:
+	mov	w2, 3103
 	adrp	x1, .LANCHOR204
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L1558
-.L1552:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L1562
+.L1556:
 	sub	w0, w0, #1
 	strh	w0, [x1, x20]
-.L1551:
+.L1555:
 	adrp	x21, .LANCHOR130
 	mov	w1, 65535
 	ldrh	w0, [x21, #:lo12:.LANCHOR130]
 	cmp	w0, w1
-	bne	.L1555
+	bne	.L1559
 	strh	w19, [x21, #:lo12:.LANCHOR130]
-	b	.L1558
-.L1555:
+	b	.L1562
+.L1559:
 	cmp	w19, w0
-	beq	.L1558
+	beq	.L1562
 	bl	update_vpc_list
 	cmp	w0, 0
-	adrp	x1, .LANCHOR80
-	adrp	x0, .LANCHOR81
+	adrp	x1, .LANCHOR81
+	adrp	x0, .LANCHOR82
 	strh	w19, [x21, #:lo12:.LANCHOR130]
 	cset	w20, ne
-	ldr	x1, [x1, #:lo12:.LANCHOR80]
-	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	ldr	x1, [x1, #:lo12:.LANCHOR81]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
 	sub	x0, x0, x1
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
 	movk	x1, 0xaaab, lsl 0
 	mul	x0, x0, x1
-	adrp	x1, .LANCHOR82
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR83
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	and	x2, x0, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	cbnz	w1, .L1550
+	cbnz	w1, .L1554
 	cmp	w19, w0, uxth
-	beq	.L1550
-	mov	w2, 3086
+	beq	.L1554
+	mov	w2, 3125
 	adrp	x1, .LANCHOR204
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR204
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR204
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L1550
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L1554
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
 	.align	2
@@ -10638,7 +10671,7 @@ decrement_vpc_count:
 	.type	FtlSlcSuperblockCheck, %function
 FtlSlcSuperblockCheck:
 	ldrh	w1, [x0, 4]
-	cbz	w1, .L1571
+	cbz	w1, .L1575
 	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -10647,7 +10680,7 @@ FtlSlcSuperblockCheck:
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w20
-	beq	.L1559
+	beq	.L1563
 	mov	x19, x0
 	ldrb	w0, [x0, 6]
 	adrp	x22, .LANCHOR8
@@ -10656,77 +10689,77 @@ FtlSlcSuperblockCheck:
 	add	x23, x22, :lo12:.LANCHOR8
 	add	x21, x21, :lo12:.LANCHOR117
 	ldrh	w0, [x19, x0, lsl 1]
-.L1563:
+.L1567:
 	cmp	w0, w20
-	beq	.L1565
+	beq	.L1569
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1566
+	bne	.L1570
 	ldrb	w1, [x23]
-	cbnz	w1, .L1566
+	cbnz	w1, .L1570
 	ldrh	w1, [x19, 2]
 	ldrh	w1, [x21, x1, lsl 1]
 	cmp	w1, w20
-	bne	.L1566
+	bne	.L1570
 	ldrh	w0, [x19, 4]
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1565
+	cbnz	w0, .L1569
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
-.L1574:
+.L1578:
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1559:
+.L1563:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1565:
+.L1569:
 	ldrb	w0, [x19, 6]
-	adrp	x1, .LANCHOR36
+	adrp	x1, .LANCHOR37
 	add	w0, w0, 1
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1564
+	bne	.L1568
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1564:
+.L1568:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w0, [x19, x0, lsl 1]
-	b	.L1563
-.L1566:
+	b	.L1567
+.L1570:
 	ldrb	w1, [x22, #:lo12:.LANCHOR8]
-	cbz	w1, .L1559
+	cbz	w1, .L1563
 	cmp	w0, 1
-	bne	.L1559
-	adrp	x0, .LANCHOR52
+	bne	.L1563
+	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1559
+	bcc	.L1563
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
-	b	.L1574
-.L1571:
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	b	.L1578
+.L1575:
 	ret
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.get_new_active_ppa,"ax",@progbits
@@ -10744,96 +10777,96 @@ get_new_active_ppa:
 	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
 	str	x25, [sp, 64]
-	bne	.L1576
-	mov	w2, 2986
+	bne	.L1580
+	mov	w2, 3025
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1576:
-	adrp	x20, .LANCHOR51
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1580:
+	adrp	x20, .LANCHOR52
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1577
-	mov	w2, 2987
+	bne	.L1581
+	mov	w2, 3026
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1577:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1581:
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1578
-	mov	w2, 2988
+	cbnz	w0, .L1582
+	mov	w2, 3027
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR205
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1578:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1582:
 	ldrb	w0, [x19, 6]
-	adrp	x21, .LANCHOR36
+	adrp	x21, .LANCHOR37
 	strb	wzr, [x19, 10]
 	adrp	x23, .LANCHOR8
 	add	x0, x0, 8
 	adrp	x24, .LANCHOR117
 	add	x23, x23, :lo12:.LANCHOR8
 	add	x24, x24, :lo12:.LANCHOR117
-	add	x25, x21, :lo12:.LANCHOR36
+	add	x25, x21, :lo12:.LANCHOR37
 	ldrh	w22, [x19, x0, lsl 1]
-.L1579:
+.L1583:
 	mov	w2, 65535
 	cmp	w22, w2
-	beq	.L1580
+	beq	.L1584
 	ldrb	w0, [x19, 8]
 	ldrh	w1, [x19, 4]
 	cmp	w0, 1
 	ldrh	w0, [x19, 2]
-	bne	.L1582
+	bne	.L1586
 	ldrb	w3, [x23]
-	cbnz	w3, .L1582
+	cbnz	w3, .L1586
 	ldrh	w3, [x24, w0, sxtw 1]
 	cmp	w3, w2
-	bne	.L1582
+	bne	.L1586
 	ldrh	w0, [x19]
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
 	bl	decrement_vpc_count
-.L1580:
+.L1584:
 	ldrb	w0, [x19, 6]
 	ldrh	w1, [x25]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x19, 6]
 	cmp	w1, w0
-	bne	.L1581
+	bne	.L1585
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L1581:
+.L1585:
 	ldrb	w0, [x19, 6]
 	add	x0, x0, 8
 	ldrh	w22, [x19, x0, lsl 1]
-	b	.L1579
-.L1582:
+	b	.L1583
+.L1586:
 	adrp	x23, .LANCHOR8
 	adrp	x24, .LANCHOR117
 	orr	w22, w0, w22, lsl 10
@@ -10841,77 +10874,77 @@ get_new_active_ppa:
 	add	x24, x24, :lo12:.LANCHOR117
 	sub	w1, w1, #1
 	strh	w1, [x19, 4]
-.L1583:
+.L1587:
 	ldrb	w0, [x19, 6]
 	mov	w1, 65535
-	ldrh	w3, [x21, #:lo12:.LANCHOR36]
-.L1585:
+	ldrh	w3, [x21, #:lo12:.LANCHOR37]
+.L1589:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w3
-	bne	.L1584
+	bne	.L1588
 	ldrh	w0, [x19, 2]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
 	mov	w0, 0
-.L1584:
+.L1588:
 	add	x2, x19, x0, sxtw 1
 	ldrh	w2, [x2, 16]
 	cmp	w2, w1
-	beq	.L1585
+	beq	.L1589
 	strb	w0, [x19, 6]
 	ldrb	w0, [x19, 8]
 	cmp	w0, 1
-	bne	.L1586
+	bne	.L1590
 	ldrb	w2, [x23]
 	ldrh	w0, [x19, 2]
-	cbnz	w2, .L1587
+	cbnz	w2, .L1591
 	ldrh	w0, [x24, w0, sxtw 1]
 	cmp	w0, w1
-	bne	.L1586
+	bne	.L1590
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1586
+	cbz	w0, .L1590
 	sub	w0, w0, #1
 	strh	w0, [x19, 4]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1583
-.L1587:
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	b	.L1587
+.L1591:
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	cmp	w0, w1
-	bcc	.L1586
+	bcc	.L1590
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strb	wzr, [x19, 6]
-.L1586:
+.L1590:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bne	.L1575
+	bne	.L1579
 	ldrh	w0, [x19, 4]
-	cbz	w0, .L1575
-	mov	w2, 3032
+	cbz	w0, .L1579
+	mov	w2, 3071
 	adrp	x1, .LANCHOR205
-	adrp	x0, .LC4
+	adrp	x0, .LC6
 	add	x1, x1, :lo12:.LANCHOR205
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1575:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1579:
 	mov	w0, w22
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10928,48 +10961,48 @@ FtlVpcTblFlush:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR75
+	adrp	x23, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w0, [x23, #:lo12:.LANCHOR75]
+	ldr	w0, [x23, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	str	x23, [x29, 104]
-	cbnz	w0, .L1600
+	cbnz	w0, .L1604
 	adrp	x25, .LANCHOR185
 	adrp	x28, .LANCHOR199
 	adrp	x27, .LANCHOR206
 	add	x21, x28, :lo12:.LANCHOR199
 	ldr	x20, [x25, #:lo12:.LANCHOR185]
-	adrp	x24, .LANCHOR79
+	adrp	x24, .LANCHOR180
 	ldrh	w2, [x27, #:lo12:.LANCHOR206]
 	add	x1, x27, :lo12:.LANCHOR206
-	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	ldr	x0, [x24, #:lo12:.LANCHOR180]
 	mov	w3, 19539
 	stp	x0, x20, [x21, 8]
 	movk	w3, 0x4654, lsl 16
 	strh	w2, [x20, 2]
 	mov	w2, -3932
 	strh	w2, [x20]
-	adrp	x22, .LANCHOR157
+	adrp	x22, .LANCHOR156
 	ldr	w2, [x1, 8]
-	adrp	x26, .LANCHOR38
+	adrp	x26, .LANCHOR39
 	ldrh	w1, [x1, 6]
 	stp	w2, wzr, [x20, 4]
-	adrp	x2, .LANCHOR135
-	add	x19, x2, :lo12:.LANCHOR135
+	adrp	x2, .LANCHOR80
+	add	x19, x2, :lo12:.LANCHOR80
 	str	wzr, [x20, 12]
-	str	w3, [x2, #:lo12:.LANCHOR135]
-	mov	w2, 71
+	str	w3, [x2, #:lo12:.LANCHOR80]
+	mov	w2, 72
 	movk	w2, 0x5000, lsl 16
 	strh	w1, [x19, 8]
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR44
 	str	w2, [x19, 4]
-	adrp	x2, .LANCHOR90
-	ldrh	w1, [x1, #:lo12:.LANCHOR43]
+	adrp	x2, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR44]
 	strb	w1, [x19, 10]
-	add	x1, x2, :lo12:.LANCHOR90
-	ldrh	w2, [x2, #:lo12:.LANCHOR90]
+	add	x1, x2, :lo12:.LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
 	strh	w2, [x19, 14]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
@@ -10977,9 +11010,9 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 11]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 16]
-	adrp	x2, .LANCHOR91
-	add	x1, x2, :lo12:.LANCHOR91
-	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	adrp	x2, .LANCHOR92
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
 	ldrb	w3, [x1, 6]
 	strh	w2, [x19, 18]
 	ldrh	w2, [x1, 2]
@@ -10987,26 +11020,26 @@ FtlVpcTblFlush:
 	strb	w1, [x19, 12]
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 20]
-	adrp	x2, .LANCHOR92
-	add	x1, x2, :lo12:.LANCHOR92
-	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	adrp	x2, .LANCHOR93
+	add	x1, x2, :lo12:.LANCHOR93
+	ldrh	w2, [x2, #:lo12:.LANCHOR93]
 	strh	w2, [x19, 22]
 	ldrb	w3, [x1, 6]
 	ldrh	w2, [x1, 2]
 	ldrb	w1, [x1, 8]
 	strb	w1, [x19, 13]
-	adrp	x1, .LANCHOR165
+	adrp	x1, .LANCHOR164
 	orr	w2, w3, w2, lsl 6
 	strh	w2, [x19, 24]
-	ldr	w1, [x1, #:lo12:.LANCHOR165]
+	ldr	w1, [x1, #:lo12:.LANCHOR164]
 	str	w1, [x19, 32]
-	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	ldr	w1, [x22, #:lo12:.LANCHOR156]
 	str	w1, [x19, 40]
-	adrp	x1, .LANCHOR158
-	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR157
+	ldr	w1, [x1, #:lo12:.LANCHOR157]
 	str	w1, [x19, 36]
-	adrp	x1, .LANCHOR56
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR57
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
 	ldr	x0, [x21, 8]
@@ -11014,14 +11047,14 @@ FtlVpcTblFlush:
 	mov	w2, 48
 	mov	x19, x28
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR82
-	ldrh	w2, [x26, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR83
+	ldrh	w2, [x26, #:lo12:.LANCHOR39]
 	ldr	x0, [x21, 8]
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	w2, w2, 1
 	add	x0, x0, 48
 	bl	ftl_memcpy
-	ldrh	w0, [x26, #:lo12:.LANCHOR38]
+	ldrh	w0, [x26, #:lo12:.LANCHOR39]
 	adrp	x1, .LANCHOR0
 	ldr	x3, [x21, 8]
 	ldr	x1, [x1, #:lo12:.LANCHOR0]
@@ -11032,13 +11065,13 @@ FtlVpcTblFlush:
 	and	x0, x0, -4
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	cbz	w0, .L1601
-	ldrh	w0, [x26, #:lo12:.LANCHOR38]
-	adrp	x1, .LANCHOR65
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L1605
+	ldrh	w0, [x26, #:lo12:.LANCHOR39]
+	adrp	x1, .LANCHOR66
 	ldr	x3, [x21, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR65]
+	ldrh	w2, [x1, #:lo12:.LANCHOR66]
 	lsr	w1, w0, 3
 	add	w0, w1, w0, lsl 1
 	adrp	x1, .LANCHOR128
@@ -11048,18 +11081,18 @@ FtlVpcTblFlush:
 	and	x0, x0, 65532
 	add	x0, x3, x0
 	bl	ftl_memcpy
-.L1601:
+.L1605:
 	mov	w0, 0
 	add	x28, x19, :lo12:.LANCHOR199
 	bl	FtlUpdateVaildLpn
 	add	x23, x27, :lo12:.LANCHOR206
 	mov	w21, 0
-	adrp	x27, .LANCHOR52
+	adrp	x27, .LANCHOR53
 	mov	w26, 65535
-	add	x0, x27, :lo12:.LANCHOR52
+	add	x0, x27, :lo12:.LANCHOR53
 	str	x0, [x29, 96]
-.L1602:
-	ldr	x0, [x24, #:lo12:.LANCHOR79]
+.L1606:
+	ldr	x0, [x24, #:lo12:.LANCHOR180]
 	mov	w3, 1
 	str	x0, [x28, 8]
 	mov	w2, w3
@@ -11072,22 +11105,22 @@ FtlVpcTblFlush:
 	str	w0, [x28, 4]
 	mov	x0, x28
 	bl	FlashProgPages
-	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	ldrh	w1, [x23, 2]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L1603
+	blt	.L1607
 	ldrh	w0, [x23]
 	ldrh	w26, [x23, 4]
 	strh	wzr, [x23, 2]
 	strh	w0, [x23, 4]
 	bl	FtlFreeSysBlkQueueOut
 	strh	w0, [x23]
-	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	ldr	w1, [x22, #:lo12:.LANCHOR156]
 	mov	w3, 1
 	str	w1, [x23, 8]
 	add	w2, w1, 1
-	str	w2, [x22, #:lo12:.LANCHOR157]
+	str	w2, [x22, #:lo12:.LANCHOR156]
 	ubfiz	w2, w0, 10, 16
 	str	w2, [x28, 4]
 	strh	w0, [x20, 2]
@@ -11096,50 +11129,50 @@ FtlVpcTblFlush:
 	mov	x0, x28
 	mov	w1, w3
 	bl	FlashProgPages
-.L1603:
+.L1607:
 	ldrh	w0, [x23, 2]
 	ldr	w1, [x28]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x23, 2]
 	cmn	w1, #1
-	bne	.L1604
+	bne	.L1608
 	cmp	w0, 1
-	bne	.L1605
-	mov	w2, 1180
+	bne	.L1609
+	mov	w2, 1213
 	adrp	x1, .LANCHOR207
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR207
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR207
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1605:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1609:
 	ldrh	w0, [x23, 2]
 	cmp	w0, 1
-	bne	.L1606
+	bne	.L1610
 	ldr	x0, [x29, 96]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x23, 2]
-.L1606:
+.L1610:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	cmp	w21, 3
-	bls	.L1602
+	bls	.L1606
 	add	x19, x19, :lo12:.LANCHOR199
 	mov	w2, w21
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
 	ldr	w1, [x19, 4]
 	bl	printf
 	ldr	x1, [x29, 104]
 	mov	w0, 1
-	str	w0, [x1, #:lo12:.LANCHOR75]
-.L1600:
+	str	w0, [x1, #:lo12:.LANCHOR76]
+.L1604:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11148,18 +11181,18 @@ FtlVpcTblFlush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1604:
+.L1608:
 	cmp	w0, 1
-	beq	.L1602
+	beq	.L1606
 	cmp	w1, 256
-	beq	.L1602
+	beq	.L1606
 	mov	w0, 65535
 	cmp	w26, w0
-	beq	.L1600
+	beq	.L1604
 	mov	w1, 1
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1600
+	b	.L1604
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
 	.align	2
@@ -11174,52 +11207,52 @@ FtlSuperblockPowerLostFix:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1628
+	cbz	w0, .L1632
 	ldrb	w20, [x19, 8]
 	cmp	w20, 1
-	bne	.L1628
+	bne	.L1632
 	ldrh	w21, [x19, 4]
-.L1620:
-	adrp	x22, .LANCHOR158
-	add	x22, x22, :lo12:.LANCHOR158
+.L1624:
+	adrp	x22, .LANCHOR157
+	add	x22, x22, :lo12:.LANCHOR157
 	mov	w24, -1
-	adrp	x23, .LANCHOR79
-.L1621:
+	adrp	x23, .LANCHOR180
+.L1625:
 	sub	w21, w21, #1
 	cmn	w21, #1
-	beq	.L1623
+	beq	.L1627
 	ldrh	w0, [x19, 4]
-	cbnz	w0, .L1622
-.L1623:
+	cbnz	w0, .L1626
+.L1627:
 	ldrh	w0, [x19]
-	adrp	x1, .LANCHOR82
+	adrp	x1, .LANCHOR83
 	ldrh	w3, [x19, 4]
-	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	ldr	x2, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w1, [x2, x0]
 	sub	w1, w1, w3
 	strh	w1, [x2, x0]
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1628:
+.L1632:
 	mov	w20, 0
 	mov	w21, 12
-	b	.L1620
-.L1622:
+	b	.L1624
+.L1626:
 	mov	x0, x19
 	bl	get_new_active_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L1623
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	beq	.L1627
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	mov	w3, 0
 	str	x0, [x29, 80]
 	mov	w2, w20
@@ -11242,7 +11275,7 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-	b	.L1621
+	b	.L1625
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
 	.align	2
@@ -11250,34 +11283,34 @@ FtlSuperblockPowerLostFix:
 	.type	FtlLoadFactoryBbt, %function
 FtlLoadFactoryBbt:
 	stp	x29, x30, [sp, -112]!
-	adrp	x2, .LANCHOR79
+	adrp	x2, .LANCHOR180
 	adrp	x0, .LANCHOR199
 	add	x1, x0, :lo12:.LANCHOR199
 	add	x29, sp, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR79]
+	ldr	x2, [x2, #:lo12:.LANCHOR180]
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR49
+	adrp	x26, .LANCHOR50
 	stp	x27, x28, [sp, 80]
-	add	x28, x26, :lo12:.LANCHOR49
+	add	x28, x26, :lo12:.LANCHOR50
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR73
+	adrp	x20, .LANCHOR74
 	stp	x23, x24, [sp, 48]
-	add	x20, x20, :lo12:.LANCHOR73
+	add	x20, x20, :lo12:.LANCHOR74
 	str	x2, [x1, 8]
 	adrp	x2, .LANCHOR185
-	adrp	x23, .LANCHOR43
+	adrp	x23, .LANCHOR44
 	add	x20, x20, 12
 	ldr	x25, [x2, #:lo12:.LANCHOR185]
-	add	x23, x23, :lo12:.LANCHOR43
+	add	x23, x23, :lo12:.LANCHOR44
 	mov	w21, 0
 	mov	w27, -1
 	str	x25, [x1, 16]
-.L1635:
+.L1639:
 	ldrh	w0, [x23]
 	cmp	w21, w0
-	bcc	.L1640
+	bcc	.L1644
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11286,18 +11319,18 @@ FtlLoadFactoryBbt:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1640:
-	ldrh	w19, [x26, #:lo12:.LANCHOR49]
+.L1644:
+	ldrh	w19, [x26, #:lo12:.LANCHOR50]
 	add	x24, x22, :lo12:.LANCHOR199
 	strh	w27, [x20]
 	mov	w3, 61664
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1636:
+.L1640:
 	ldrh	w0, [x28]
 	sub	w1, w0, #15
 	cmp	w1, w19
-	bgt	.L1638
+	bgt	.L1642
 	madd	w0, w0, w21, w19
 	mov	w2, 1
 	str	w3, [x29, 108]
@@ -11309,19 +11342,19 @@ FtlLoadFactoryBbt:
 	ldr	w0, [x24]
 	ldr	w3, [x29, 108]
 	cmn	w0, #1
-	beq	.L1637
+	beq	.L1641
 	ldrh	w0, [x25]
 	cmp	w0, w3
-	bne	.L1637
+	bne	.L1641
 	strh	w19, [x20]
-.L1638:
+.L1642:
 	add	w21, w21, 1
 	add	x20, x20, 2
-	b	.L1635
-.L1637:
+	b	.L1639
+.L1641:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1636
+	b	.L1640
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
 	.align	2
@@ -11335,10 +11368,10 @@ FtlGetLastWrittenPage:
 	mov	w23, w1
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	bne	.L1646
-	adrp	x1, .LANCHOR52
-	ldrh	w19, [x1, #:lo12:.LANCHOR52]
-.L1647:
+	bne	.L1650
+	adrp	x1, .LANCHOR53
+	ldrh	w19, [x1, #:lo12:.LANCHOR53]
+.L1651:
 	sub	w19, w19, #1
 	lsl	w21, w0, 10
 	sxth	w19, w19
@@ -11352,24 +11385,24 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1648
+	bne	.L1652
 	mov	w22, 0
 	mov	w24, 2
-.L1649:
+.L1653:
 	cmp	w22, w19
-	ble	.L1652
-.L1648:
+	ble	.L1656
+.L1652:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1646:
-	adrp	x1, .LANCHOR51
-	ldrh	w19, [x1, #:lo12:.LANCHOR51]
-	b	.L1647
-.L1652:
+.L1650:
+	adrp	x1, .LANCHOR52
+	ldrh	w19, [x1, #:lo12:.LANCHOR52]
+	b	.L1651
+.L1656:
 	add	w20, w22, w19
 	mov	w2, w23
 	mov	w1, 1
@@ -11381,20 +11414,20 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	w0, [x29, 128]
 	cmn	w0, #1
-	bne	.L1650
+	bne	.L1654
 	ldr	w0, [x29, 132]
 	cmn	w0, #1
-	bne	.L1650
+	bne	.L1654
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1650
+	beq	.L1654
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1649
-.L1650:
+	b	.L1653
+.L1654:
 	add	w20, w20, 1
 	sxth	w22, w20
-	b	.L1649
+	b	.L1653
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadBbt,"ax",@progbits
 	.align	2
@@ -11402,28 +11435,31 @@ FtlGetLastWrittenPage:
 	.type	FtlLoadBbt, %function
 FtlLoadBbt:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR185
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR180
 	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR50
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR199
 	add	x20, x22, :lo12:.LANCHOR199
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR49
-	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	str	x25, [sp, 64]
-	mov	w24, 61649
-	stp	xzr, x21, [x20, 8]
+	mov	w25, 61649
+	str	x0, [x20, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	str	x21, [x20, 16]
 	bl	FtlBbtMemInit
-	ldrh	w19, [x23, #:lo12:.LANCHOR49]
-	add	x23, x23, :lo12:.LANCHOR49
+	ldrh	w19, [x24, #:lo12:.LANCHOR50]
+	add	x24, x24, :lo12:.LANCHOR50
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L1658:
-	ldrh	w0, [x23]
+.L1662:
+	ldrh	w0, [x24]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L1661
+	bgt	.L1665
 	lsl	w0, w19, 10
 	mov	w2, 1
 	str	w0, [x20, 4]
@@ -11432,7 +11468,7 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x20]
 	cmn	w0, #1
-	bne	.L1659
+	bne	.L1663
 	ldr	w0, [x20, 4]
 	mov	w2, 1
 	mov	w1, w2
@@ -11440,30 +11476,30 @@ FtlLoadBbt:
 	str	w0, [x20, 4]
 	mov	x0, x20
 	bl	FlashReadPages
-.L1659:
+.L1663:
 	ldr	w0, [x20]
 	cmn	w0, #1
-	beq	.L1660
+	beq	.L1664
 	ldrh	w0, [x21]
-	cmp	w0, w24
-	bne	.L1660
-	adrp	x1, .LANCHOR73
-	add	x0, x1, :lo12:.LANCHOR73
-	strh	w19, [x1, #:lo12:.LANCHOR73]
+	cmp	w0, w25
+	bne	.L1664
+	adrp	x1, .LANCHOR74
+	add	x0, x1, :lo12:.LANCHOR74
+	strh	w19, [x1, #:lo12:.LANCHOR74]
 	ldr	w1, [x21, 4]
 	str	w1, [x0, 8]
 	ldrh	w1, [x21, 8]
 	strh	w1, [x0, 4]
-.L1661:
-	adrp	x19, .LANCHOR73
+.L1665:
+	adrp	x19, .LANCHOR74
 	mov	w0, 65535
-	add	x20, x19, :lo12:.LANCHOR73
-	ldrh	w1, [x19, #:lo12:.LANCHOR73]
+	add	x20, x19, :lo12:.LANCHOR74
+	ldrh	w1, [x19, #:lo12:.LANCHOR74]
 	cmp	w1, w0
-	beq	.L1675
+	beq	.L1679
 	ldrh	w1, [x20, 4]
 	cmp	w1, w0
-	beq	.L1665
+	beq	.L1669
 	add	x0, x22, :lo12:.LANCHOR199
 	lsl	w1, w1, 10
 	mov	w2, 1
@@ -11472,110 +11508,109 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	w0, [x22, #:lo12:.LANCHOR199]
 	cmn	w0, #1
-	beq	.L1665
+	beq	.L1669
 	ldrh	w1, [x21]
 	mov	w0, 61649
 	cmp	w1, w0
-	bne	.L1665
+	bne	.L1669
 	ldr	w1, [x20, 8]
 	ldr	w0, [x21, 4]
 	cmp	w0, w1
-	bls	.L1665
+	bls	.L1669
 	ldrh	w1, [x20, 4]
 	str	w0, [x20, 8]
 	ldrh	w0, [x21, 8]
-	strh	w1, [x19, #:lo12:.LANCHOR73]
+	strh	w1, [x19, #:lo12:.LANCHOR74]
 	strh	w0, [x20, 4]
-.L1665:
-	ldrh	w0, [x19, #:lo12:.LANCHOR73]
-	add	x23, x19, :lo12:.LANCHOR73
+.L1669:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
+	add	x24, x19, :lo12:.LANCHOR74
 	mov	w1, 1
-	adrp	x24, .LANCHOR79
 	mov	w25, 61649
 	bl	FtlGetLastWrittenPage
 	sxth	w20, w0
 	add	w0, w0, 1
-	strh	w0, [x23, 2]
-	add	x23, x22, :lo12:.LANCHOR199
-.L1667:
-	tbz	w20, #31, .L1670
-	mov	w2, 335
+	strh	w0, [x24, 2]
+	add	x24, x22, :lo12:.LANCHOR199
+.L1671:
+	tbz	w20, #31, .L1674
+	mov	w2, 336
 	adrp	x1, .LANCHOR208
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR208
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1669:
-	add	x0, x19, :lo12:.LANCHOR73
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1673:
+	add	x0, x19, :lo12:.LANCHOR74
 	ldrh	w1, [x21, 10]
 	strh	w1, [x0, 6]
 	mov	w1, 65535
 	ldrh	w0, [x21, 12]
 	cmp	w0, w1
-	beq	.L1672
-	adrp	x1, .LANCHOR35
-	ldr	w2, [x1, #:lo12:.LANCHOR35]
+	beq	.L1676
+	adrp	x1, .LANCHOR36
+	ldr	w2, [x1, #:lo12:.LANCHOR36]
 	cmp	w0, w2
-	beq	.L1672
-	adrp	x1, .LANCHOR39
-	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	beq	.L1676
+	adrp	x1, .LANCHOR40
+	ldrh	w1, [x1, #:lo12:.LANCHOR40]
 	lsr	w1, w1, 2
 	cmp	w2, w1
-	bcs	.L1672
+	bcs	.L1676
 	cmp	w0, w1
-	bcs	.L1672
+	bcs	.L1676
 	bl	FtlSysBlkNumInit
-.L1672:
-	add	x19, x19, :lo12:.LANCHOR73
-	adrp	x21, .LANCHOR43
+.L1676:
+	add	x19, x19, :lo12:.LANCHOR74
+	adrp	x21, .LANCHOR44
 	adrp	x23, .LANCHOR120
 	add	x19, x19, 32
-	add	x21, x21, :lo12:.LANCHOR43
+	add	x21, x21, :lo12:.LANCHOR44
 	add	x23, x23, :lo12:.LANCHOR120
 	add	x22, x22, :lo12:.LANCHOR199
 	mov	w20, 0
-.L1673:
+.L1677:
 	ldrh	w0, [x21]
 	cmp	w20, w0
-	bcc	.L1674
+	bcc	.L1678
 	mov	w0, 0
-.L1657:
+.L1661:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1660:
+.L1664:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L1658
-.L1670:
-	ldrh	w0, [x19, #:lo12:.LANCHOR73]
+	b	.L1662
+.L1674:
+	ldrh	w0, [x19, #:lo12:.LANCHOR74]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w20, w0, lsl 10
-	str	w0, [x23, 4]
-	ldr	x0, [x24, #:lo12:.LANCHOR79]
-	str	x0, [x23, 8]
-	mov	x0, x23
+	str	w0, [x24, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
+	str	x0, [x24, 8]
+	mov	x0, x24
 	bl	FlashReadPages
-	ldr	w0, [x23]
+	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L1668
+	beq	.L1672
 	ldrh	w0, [x21]
 	cmp	w0, w25
-	beq	.L1669
-.L1668:
+	beq	.L1673
+.L1672:
 	sub	w20, w20, #1
 	sxth	w20, w20
-	b	.L1667
-.L1674:
+	b	.L1671
+.L1678:
 	ldrh	w2, [x23]
 	ldr	x0, [x22, 8]
 	mul	w1, w2, w20
@@ -11584,10 +11619,10 @@ FtlLoadBbt:
 	add	x1, x0, x1, lsl 2
 	ldr	x0, [x19], 8
 	bl	ftl_memcpy
-	b	.L1673
-.L1675:
+	b	.L1677
+.L1679:
 	mov	w0, -1
-	b	.L1657
+	b	.L1661
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.ftl_map_blk_gc,"ax",@progbits
 	.align	2
@@ -11599,7 +11634,7 @@ ftl_map_blk_gc:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR52
+	adrp	x21, .LANCHOR53
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
@@ -11611,29 +11646,29 @@ ftl_map_blk_gc:
 	sub	w1, w4, #4
 	cmp	w2, w1
 	ldrh	w1, [x19, 60]
-	bge	.L1688
+	bge	.L1692
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1690
+	beq	.L1694
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	cmp	w3, w2
-	bcc	.L1691
-.L1688:
+	bcc	.L1695
+.L1692:
 	mov	w2, 65535
 	and	w0, w0, 65535
 	cmp	w1, w2
-	beq	.L1692
+	beq	.L1696
 	ldrh	w3, [x19, 2]
-	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	ldrh	w2, [x21, #:lo12:.LANCHOR53]
 	cmp	w2, w3
-	bls	.L1693
-.L1692:
+	bls	.L1697
+.L1696:
 	ubfiz	x0, x0, 1, 32
 	ldrh	w23, [x20, x0]
-	cbz	w23, .L1690
+	cbz	w23, .L1694
 	ldr	w1, [x19, 52]
-	cbnz	w1, .L1690
+	cbnz	w1, .L1694
 	mov	w1, 1
 	str	w1, [x19, 52]
 	strh	wzr, [x20, x0]
@@ -11641,33 +11676,33 @@ ftl_map_blk_gc:
 	ldrh	w1, [x19, 2]
 	sub	w0, w0, #1
 	strh	w0, [x19, 8]
-	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	ldrh	w0, [x21, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1698
+	bcc	.L1702
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1698:
+.L1702:
 	adrp	x26, .LANCHOR199
-	adrp	x25, .LC34
+	adrp	x25, .LC37
 	add	x24, x26, :lo12:.LANCHOR199
-	add	x25, x25, :lo12:.LC34
+	add	x25, x25, :lo12:.LC37
 	mov	w20, 0
-.L1699:
+.L1703:
 	ldrh	w0, [x19, 6]
 	cmp	w0, w20
-	bhi	.L1703
+	bhi	.L1707
 	mov	w1, 1
 	mov	w0, w23
 	bl	FtlFreeSysBlkQueueIn
 	str	wzr, [x19, 52]
-.L1690:
+.L1694:
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	ldrh	w0, [x21, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bcc	.L1691
+	bcc	.L1695
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L1691:
+.L1695:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -11676,35 +11711,35 @@ ftl_map_blk_gc:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1696:
+.L1700:
 	ldrh	w6, [x20, x2, lsl 1]
 	add	x5, x2, 1
 	cmp	w6, w1
-	beq	.L1694
+	beq	.L1698
 	mov	x2, x5
-.L1695:
+.L1699:
 	and	w23, w2, 65535
 	cmp	w23, w4
-	bcc	.L1696
+	bcc	.L1700
 	mov	w23, w0
-.L1694:
+.L1698:
 	and	x2, x2, 65535
-	adrp	x0, .LC33
-	add	x0, x0, :lo12:.LC33
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
 	ldrh	w2, [x20, x2, lsl 1]
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x19, 60]
 	mov	w0, w23
-	b	.L1692
-.L1693:
+	b	.L1696
+.L1697:
 	mov	x2, 0
-	b	.L1695
-.L1703:
+	b	.L1699
+.L1707:
 	ubfiz	x27, x20, 2, 16
 	ldr	w1, [x22, x27]
 	cmp	w23, w1, lsr 10
-	bne	.L1700
+	bne	.L1704
 	adrp	x2, .LANCHOR181
 	add	x0, x26, :lo12:.LANCHOR199
 	ldr	x2, [x2, #:lo12:.LANCHOR181]
@@ -11718,49 +11753,49 @@ ftl_map_blk_gc:
 	bl	FlashReadPages
 	ldrh	w0, [x28, 8]
 	cmp	w0, w20
-	beq	.L1701
-	mov	w2, 638
+	beq	.L1705
+	mov	w2, 671
 	adrp	x1, .LANCHOR209
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR209
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR209
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1701:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1705:
 	ldr	w0, [x24]
 	cmn	w0, #1
-	bne	.L1702
+	bne	.L1706
 	str	wzr, [x22, x27]
 	mov	x0, x25
 	ldrh	w2, [x28, 8]
 	ldr	w1, [x24, 4]
 	bl	printf
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR76
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR75]
-.L1700:
+	str	w1, [x0, #:lo12:.LANCHOR76]
+.L1704:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1699
-.L1702:
+	b	.L1703
+.L1706:
 	ldr	x2, [x24, 8]
 	mov	w1, w20
 	mov	x0, x19
 	bl	FtlMapWritePage
-	b	.L1700
+	b	.L1704
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
 	.align	2
 	.global	Ftl_write_map_blk_to_last_page
 	.type	Ftl_write_map_blk_to_last_page, %function
 Ftl_write_map_blk_to_last_page:
-	adrp	x1, .LANCHOR75
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
-	cbnz	w1, .L1719
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L1723
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 65535
 	add	x29, sp, 0
@@ -11771,21 +11806,21 @@ Ftl_write_map_blk_to_last_page:
 	ldr	x20, [x19, 16]
 	str	x23, [sp, 48]
 	cmp	w0, w1
-	bne	.L1710
+	bne	.L1714
 	ldrh	w0, [x19, 8]
-	cbz	w0, .L1711
-	mov	w2, 670
+	cbz	w0, .L1715
+	mov	w2, 703
 	adrp	x1, .LANCHOR210
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR210
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR210
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1711:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1715:
 	ldrh	w0, [x19, 8]
 	add	w0, w0, 1
 	strh	w0, [x19, 8]
@@ -11796,17 +11831,17 @@ Ftl_write_map_blk_to_last_page:
 	add	w0, w0, 1
 	strh	wzr, [x19]
 	str	w0, [x19, 48]
-.L1709:
+.L1713:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1710:
+.L1714:
 	ubfiz	x0, x0, 1, 16
 	adrp	x1, .LANCHOR185
-	adrp	x23, .LANCHOR79
+	adrp	x23, .LANCHOR180
 	ldr	x22, [x19, 40]
 	ldr	x1, [x1, #:lo12:.LANCHOR185]
 	ldrh	w21, [x20, x0]
@@ -11815,7 +11850,7 @@ Ftl_write_map_blk_to_last_page:
 	add	x2, x20, :lo12:.LANCHOR199
 	orr	w0, w0, w21, lsl 10
 	str	w0, [x2, 4]
-	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	ldr	x0, [x23, #:lo12:.LANCHOR180]
 	str	x1, [x2, 16]
 	str	x0, [x2, 8]
 	ldr	w2, [x19, 48]
@@ -11825,18 +11860,18 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1]
 	strh	w21, [x1, 2]
-	adrp	x1, .LANCHOR52
-	ldrh	w2, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR53
+	ldrh	w2, [x1, #:lo12:.LANCHOR53]
 	mov	w1, 255
 	lsl	w2, w2, 3
 	bl	ftl_memset
 	ldrh	w4, [x19, 6]
 	mov	x1, 0
-	ldr	x3, [x23, #:lo12:.LANCHOR79]
+	ldr	x3, [x23, #:lo12:.LANCHOR180]
 	mov	w2, 0
-.L1712:
+.L1716:
 	cmp	w4, w1, uxth
-	bhi	.L1714
+	bhi	.L1718
 	mov	w2, 1
 	mov	w3, 0
 	mov	w1, w2
@@ -11847,11 +11882,11 @@ Ftl_write_map_blk_to_last_page:
 	strh	w0, [x19, 2]
 	mov	x0, x19
 	bl	ftl_map_blk_gc
-	b	.L1709
-.L1714:
+	b	.L1713
+.L1718:
 	ldr	w0, [x22, x1, lsl 2]
 	cmp	w21, w0, lsr 10
-	bne	.L1713
+	bne	.L1717
 	add	w2, w2, 1
 	and	w2, w2, 65535
 	ubfiz	x0, x2, 1, 16
@@ -11859,10 +11894,10 @@ Ftl_write_map_blk_to_last_page:
 	add	x0, x0, 1
 	ldr	w5, [x22, x1, lsl 2]
 	str	w5, [x3, x0, lsl 2]
-.L1713:
+.L1717:
 	add	x1, x1, 1
-	b	.L1712
-.L1719:
+	b	.L1716
+.L1723:
 	mov	w0, 0
 	ret
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
@@ -11874,70 +11909,70 @@ FtlMapWritePage:
 	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR75
+	adrp	x24, .LANCHOR76
 	stp	x19, x20, [sp, 16]
-	ldr	w3, [x24, #:lo12:.LANCHOR75]
+	ldr	w3, [x24, #:lo12:.LANCHOR76]
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w3, .L1737
-	adrp	x23, .LANCHOR163
+	cbnz	w3, .L1741
+	adrp	x23, .LANCHOR162
 	adrp	x25, .LANCHOR211
 	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR163
+	add	x23, x23, :lo12:.LANCHOR162
 	add	x25, x25, :lo12:.LANCHOR211
 	mov	x19, x0
-	adrp	x27, .LANCHOR52
+	adrp	x27, .LANCHOR53
 	mov	w21, 0
-	add	x0, x27, :lo12:.LANCHOR52
+	add	x0, x27, :lo12:.LANCHOR53
 	stp	x2, x0, [x29, 96]
-.L1724:
+.L1728:
 	ldr	w0, [x23]
 	ldrh	w1, [x19, 2]
 	add	w0, w0, 1
 	str	w0, [x23]
-	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	ldrh	w0, [x27, #:lo12:.LANCHOR53]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bge	.L1725
+	bge	.L1729
 	ldrh	w1, [x19]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1726
-.L1725:
+	bne	.L1730
+.L1729:
 	mov	x0, x19
 	bl	Ftl_write_map_blk_to_last_page
-.L1726:
+.L1730:
 	ldrh	w1, [x19]
 	ldr	x0, [x19, 16]
 	ldrh	w0, [x0, x1, lsl 1]
-	cbnz	w0, .L1727
-	mov	w2, 731
+	cbnz	w0, .L1731
+	mov	w2, 764
 	mov	x1, x25
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1727:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1731:
 	ldrh	w1, [x19]
 	ldrh	w0, [x19, 10]
 	cmp	w1, w0
-	bcc	.L1728
-	mov	w2, 732
+	bcc	.L1732
+	mov	w2, 765
 	mov	x1, x25
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1728:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1732:
 	ldrh	w1, [x19]
 	adrp	x20, .LANCHOR199
 	ldr	x0, [x19, 16]
@@ -11972,32 +12007,32 @@ FtlMapWritePage:
 	and	w0, w0, 65535
 	strh	w0, [x19, 2]
 	cmn	w1, #1
-	bne	.L1729
+	bne	.L1733
 	ldr	w1, [x28, 4]
-	adrp	x0, .LC35
-	add	x0, x0, :lo12:.LC35
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	bl	printf
 	ldrh	w0, [x19, 2]
 	cmp	w0, 2
-	bhi	.L1730
+	bhi	.L1734
 	ldr	x0, [x29, 104]
 	ldrh	w0, [x0]
 	sub	w0, w0, #1
 	strh	w0, [x19, 2]
-.L1730:
+.L1734:
 	cmp	w21, 3
-	bls	.L1724
+	bls	.L1728
 	add	x20, x20, :lo12:.LANCHOR199
 	mov	w2, w21
-	adrp	x0, .LC36
-	add	x0, x0, :lo12:.LC36
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
 	ldr	w1, [x20, 4]
 	bl	printf
 	mov	w0, 1
-	str	w0, [x24, #:lo12:.LANCHOR75]
-.L1737:
+	str	w0, [x24, #:lo12:.LANCHOR76]
+.L1741:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12006,22 +12041,22 @@ FtlMapWritePage:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L1729:
-	cbz	w1, .L1732
+.L1733:
+	cbz	w1, .L1736
 	strh	w26, [x19, 60]
 	cmp	w0, 1
-	beq	.L1724
+	beq	.L1728
 	cmp	w1, 256
-.L1745:
-	beq	.L1724
+.L1749:
+	beq	.L1728
 	add	x20, x20, :lo12:.LANCHOR199
 	ldr	x0, [x19, 40]
 	ldr	w1, [x20, 4]
 	str	w1, [x0, w22, uxtw 2]
-	b	.L1737
-.L1732:
+	b	.L1741
+.L1736:
 	cmp	w0, 1
-	b	.L1745
+	b	.L1749
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.flush_l2p_region,"ax",@progbits
 	.align	2
@@ -12031,16 +12066,16 @@ flush_l2p_region:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR95
+	adrp	x20, .LANCHOR96
 	ubfiz	x19, x0, 4, 16
-	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x1, x0, x19
 	ldr	x2, [x1, 8]
 	ldrh	w1, [x0, x19]
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
 	bl	FtlMapWritePage
-	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	ldr	x0, [x20, #:lo12:.LANCHOR96]
 	add	x0, x0, x19
 	ldp	x19, x20, [sp, 16]
 	ldr	w1, [x0, 4]
@@ -12058,247 +12093,225 @@ l2p_flush:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR66
-	add	x20, x20, :lo12:.LANCHOR66
+	adrp	x20, .LANCHOR67
+	add	x20, x20, :lo12:.LANCHOR67
 	str	x21, [sp, 32]
 	mov	w19, 0
-	adrp	x21, .LANCHOR95
-.L1749:
+	adrp	x21, .LANCHOR96
+.L1753:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1751
+	bhi	.L1755
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1751:
-	ldr	x1, [x21, #:lo12:.LANCHOR95]
+.L1755:
+	ldr	x1, [x21, #:lo12:.LANCHOR96]
 	ubfiz	x0, x19, 4, 16
 	add	x0, x1, x0
 	ldr	w0, [x0, 4]
-	tbz	w0, #31, .L1750
+	tbz	w0, #31, .L1754
 	mov	w0, w19
 	bl	flush_l2p_region
-.L1750:
+.L1754:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1749
+	b	.L1753
 	.size	l2p_flush, .-l2p_flush
-	.section	.text.load_l2p_region,"ax",@progbits
+	.section	.text.log2phys,"ax",@progbits
 	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
-	stp	x29, x30, [sp, -64]!
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -112]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	x25, x1
+	adrp	x1, .LANCHOR56
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 65535
-	adrp	x0, .LANCHOR65
-	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	and	x19, x1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR65]
-	cmp	w0, w20
-	bcs	.L1754
-	mov	w2, 503
+	mov	w26, w2
+	ldrh	w20, [x1, #:lo12:.LANCHOR56]
+	stp	x21, x22, [sp, 32]
+	add	w1, w20, 7
+	mov	x20, 1
+	stp	x27, x28, [sp, 80]
+	lsr	w24, w0, w1
+	and	w23, w24, 65535
+	lsl	x20, x20, x1
+	adrp	x1, .LANCHOR72
+	sub	w20, w20, #1
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	and	w20, w20, w0
+	and	x20, x20, 65535
+	cmp	w0, w1
+	bcc	.L1758
+	mov	w2, 884
 	adrp	x1, .LANCHOR212
-	adrp	x0, .LC4
+	adrp	x0, .LC6
 	add	x1, x1, :lo12:.LANCHOR212
-	add	x0, x0, :lo12:.LC4
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-	adrp	x1, .LC5
+.L1758:
+	adrp	x19, .LANCHOR96
+	adrp	x0, .LANCHOR67
+	ldr	x2, [x19, #:lo12:.LANCHOR96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR67]
+	mov	x0, 0
+.L1759:
+	and	x21, x0, 65535
+	cmp	w21, w1
+	bcc	.L1764
+	bl	select_l2p_ram_region
+	and	x21, x0, 65535
+	ldr	x1, [x19, #:lo12:.LANCHOR96]
+	ubfiz	x22, x21, 4, 16
+	add	x2, x1, x22
+	ldrh	w3, [x1, x22]
+	mov	w1, 65535
+	cmp	w3, w1
+	beq	.L1765
+	ldr	w1, [x2, 4]
+	tbz	w1, #31, .L1765
+	bl	flush_l2p_region
+.L1765:
+	adrp	x0, .LANCHOR66
+	ldrh	w0, [x0, #:lo12:.LANCHOR66]
+	cmp	w0, w23
+	bcs	.L1766
+	mov	w2, 526
+	adrp	x1, .LANCHOR213
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1754:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1766:
 	adrp	x1, .LANCHOR128
-	ubfiz	x0, x20, 2, 16
-	adrp	x22, .LANCHOR95
+	ubfiz	x0, x23, 2, 16
 	ldr	x1, [x1, #:lo12:.LANCHOR128]
-	ldr	w21, [x1, x0]
-	cbnz	w21, .L1755
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	lsl	x19, x19, 4
-	adrp	x1, .LANCHOR56
-	add	x0, x0, x19
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldr	w27, [x1, x0]
+	cbnz	w27, .L1767
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	adrp	x1, .LANCHOR57
+	add	x0, x0, x22
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	add	x1, x0, x19
-	strh	w20, [x0, x19]
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x22
+	strh	w23, [x0, x22]
 	str	wzr, [x1, 4]
-.L1756:
-	mov	w0, 0
+	b	.L1760
+.L1764:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w23
+	bne	.L1759
+.L1760:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x0, x0, x21, lsl 4
+	cbnz	w26, .L1761
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x25]
+.L1762:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x21, x0, x21, lsl 4
+	ldr	w0, [x21, 4]
+	cmn	w0, #1
+	beq	.L1771
+	add	w0, w0, 1
+	str	w0, [x21, 4]
+.L1771:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1755:
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	lsl	x19, x19, 4
-	adrp	x24, .LANCHOR199
-	add	x23, x24, :lo12:.LANCHOR199
-	add	x0, x0, x19
+.L1761:
+	ldr	x1, [x0, 8]
+	ldr	w2, [x25]
+	str	w2, [x1, x20, lsl 2]
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	adrp	x0, .LANCHOR97
+	strh	w23, [x0, #:lo12:.LANCHOR97]
+	b	.L1762
+.L1767:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	adrp	x3, .LANCHOR199
+	add	x28, x3, :lo12:.LANCHOR199
 	mov	w2, 1
+	add	x0, x0, x22
+	str	x3, [x29, 104]
 	mov	w1, w2
-	str	w21, [x23, 4]
+	str	w27, [x28, 4]
 	ldr	x0, [x0, 8]
-	str	x0, [x23, 8]
+	str	x0, [x28, 8]
 	adrp	x0, .LANCHOR185
 	ldr	x0, [x0, #:lo12:.LANCHOR185]
-	str	x0, [x23, 16]
-	mov	x0, x23
+	str	x0, [x28, 16]
+	mov	x0, x28
 	bl	FlashReadPages
-	ldr	x23, [x23, 16]
-	ldr	w0, [x24, #:lo12:.LANCHOR199]
+	ldr	x28, [x28, 16]
+	ldr	x3, [x29, 104]
+	ldr	w0, [x3, #:lo12:.LANCHOR199]
 	cmp	w0, 256
-	bne	.L1757
-	mov	w2, w21
-	mov	w1, w20
-	adrp	x0, .LC37
-	add	x0, x0, :lo12:.LC37
+	bne	.L1768
+	and	w24, w24, 65535
+	mov	w2, w27
+	mov	w1, w24
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	bl	printf
-	lsr	w21, w21, 10
-	ldr	x1, [x22, #:lo12:.LANCHOR95]
+	ldr	x1, [x19, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
-	add	x1, x1, x19
-	strh	w21, [x0, 60]
+	lsr	w27, w27, 10
+	add	x1, x1, x22
+	strh	w27, [x0, 60]
 	ldr	x2, [x1, 8]
-	mov	w1, w20
+	mov	w1, w24
 	bl	FtlMapWritePage
-.L1757:
-	ldrh	w0, [x23, 8]
-	cmp	w0, w20
-	beq	.L1758
-	mov	w2, 529
-	adrp	x1, .LANCHOR212
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR212
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
-	add	x0, x0, :lo12:.LC6
-	bl	printf
-.L1758:
-	ldr	x0, [x22, #:lo12:.LANCHOR95]
-	add	x1, x0, x19
-	str	wzr, [x1, 4]
-	strh	w20, [x0, x19]
-	b	.L1756
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.log2phys,"ax",@progbits
-	.align	2
-	.global	log2phys
-	.type	log2phys, %function
-log2phys:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	x23, x1
-	adrp	x1, .LANCHOR55
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	mov	w24, w2
-	ldrh	w19, [x1, #:lo12:.LANCHOR55]
-	str	x25, [sp, 64]
-	add	w1, w19, 7
-	mov	x19, 1
-	lsr	w22, w0, w1
-	and	w22, w22, 65535
-	lsl	x19, x19, x1
-	adrp	x1, .LANCHOR71
-	sub	w19, w19, #1
-	ldr	w1, [x1, #:lo12:.LANCHOR71]
-	and	w19, w19, w0
-	and	x19, x19, 65535
-	cmp	w0, w1
-	bcc	.L1761
-	mov	w2, 851
+.L1768:
+	ldrh	w0, [x28, 8]
+	cmp	w0, w23
+	beq	.L1769
+	mov	w2, 552
 	adrp	x1, .LANCHOR213
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR213
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR213
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1761:
-	adrp	x21, .LANCHOR95
-	adrp	x0, .LANCHOR66
-	ldr	x2, [x21, #:lo12:.LANCHOR95]
-	ldrh	w1, [x0, #:lo12:.LANCHOR66]
-	mov	x0, 0
-.L1762:
-	and	x20, x0, 65535
-	cmp	w20, w1
-	bcc	.L1767
-	bl	select_l2p_ram_region
-	and	x20, x0, 65535
-	ldr	x2, [x21, #:lo12:.LANCHOR95]
-	ubfiz	x1, x20, 4, 16
-	mov	w25, w0
-	add	x3, x2, x1
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L1768
-	ldr	w1, [x3, 4]
-	tbz	w1, #31, .L1768
-	bl	flush_l2p_region
-.L1768:
-	mov	w1, w25
-	mov	w0, w22
-	bl	load_l2p_region
-	b	.L1763
-.L1767:
-	add	x0, x0, 1
-	add	x3, x2, x0, lsl 4
-	ldrh	w3, [x3, -16]
-	cmp	w3, w22
-	bne	.L1762
-.L1763:
-	ldr	x0, [x21, #:lo12:.LANCHOR95]
-	add	x0, x0, x20, lsl 4
-	cbnz	w24, .L1764
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x19, lsl 2]
-	str	w0, [x23]
-.L1765:
-	ldr	x0, [x21, #:lo12:.LANCHOR95]
-	add	x20, x0, x20, lsl 4
-	ldr	w0, [x20, 4]
-	cmn	w0, #1
-	beq	.L1770
-	add	w0, w0, 1
-	str	w0, [x20, 4]
-.L1770:
-	mov	w0, 0
-	ldr	x25, [sp, 64]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1764:
-	ldr	x1, [x0, 8]
-	ldr	w2, [x23]
-	str	w2, [x1, x19, lsl 2]
-	ldr	w1, [x0, 4]
-	orr	w1, w1, -2147483648
-	str	w1, [x0, 4]
-	adrp	x0, .LANCHOR96
-	strh	w22, [x0, #:lo12:.LANCHOR96]
-	b	.L1765
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1769:
+	ldr	x0, [x19, #:lo12:.LANCHOR96]
+	add	x1, x0, x22
+	str	wzr, [x1, 4]
+	strh	w23, [x0, x22]
+	b	.L1760
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",@progbits
 	.align	2
@@ -12308,65 +12321,65 @@ FtlReUsePrevPpa:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR82
+	adrp	x22, .LANCHOR83
 	stp	x19, x20, [sp, 16]
 	mov	w21, w0
 	str	w1, [x29, 76]
 	lsr	w0, w1, 10
 	str	x23, [sp, 48]
 	bl	P2V_block_in_plane
-	ldr	x2, [x22, #:lo12:.LANCHOR82]
+	ldr	x2, [x22, #:lo12:.LANCHOR83]
 	and	w3, w0, 65535
 	ubfiz	x20, x3, 1, 16
 	ldrh	w1, [x2, x20]
-	cbnz	w1, .L1776
-	adrp	x0, .LANCHOR86
-	ldr	x19, [x0, #:lo12:.LANCHOR86]
-	cbz	x19, .L1777
-	adrp	x2, .LANCHOR80
+	cbnz	w1, .L1777
+	adrp	x0, .LANCHOR87
+	ldr	x19, [x0, #:lo12:.LANCHOR87]
+	cbz	x19, .L1778
+	adrp	x2, .LANCHOR81
 	mov	x5, -6148914691236517206
 	movk	x5, 0xaaab, lsl 0
-	adrp	x23, .LANCHOR87
-	ldr	x2, [x2, #:lo12:.LANCHOR80]
+	adrp	x23, .LANCHOR88
+	ldr	x2, [x2, #:lo12:.LANCHOR81]
 	mov	w6, 65535
-	ldrh	w4, [x23, #:lo12:.LANCHOR87]
+	ldrh	w4, [x23, #:lo12:.LANCHOR88]
 	sub	x19, x19, x2
 	asr	x19, x19, 1
 	mul	x19, x19, x5
 	mov	w5, 6
 	and	w19, w19, 65535
-.L1778:
+.L1779:
 	cmp	w1, w4
-	beq	.L1777
+	beq	.L1778
 	cmp	w19, w3
-	bne	.L1779
+	bne	.L1780
 	mov	w1, w19
-	add	x0, x0, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR87
 	bl	List_remove_node
-	ldrh	w0, [x23, #:lo12:.LANCHOR87]
-	cbnz	w0, .L1780
-	mov	w2, 1825
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
+	cbnz	w0, .L1781
+	mov	w2, 1862
 	adrp	x1, .LANCHOR214
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR214
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR214
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1780:
-	ldrh	w0, [x23, #:lo12:.LANCHOR87]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1781:
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	sub	w0, w0, #1
-	strh	w0, [x23, #:lo12:.LANCHOR87]
+	strh	w0, [x23, #:lo12:.LANCHOR88]
 	mov	w0, w19
 	bl	INSERT_DATA_LIST
-	ldr	x1, [x22, #:lo12:.LANCHOR82]
+	ldr	x1, [x22, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x20]
 	add	w0, w0, 1
 	strh	w0, [x1, x20]
-.L1777:
+.L1778:
 	add	x1, x29, 76
 	mov	w2, 1
 	mov	w0, w21
@@ -12376,18 +12389,18 @@ FtlReUsePrevPpa:
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1779:
+.L1780:
 	umull	x19, w19, w5
 	ldrh	w19, [x2, x19]
 	cmp	w19, w6
-	beq	.L1777
+	beq	.L1778
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1778
-.L1776:
+	b	.L1779
+.L1777:
 	add	w1, w1, 1
 	strh	w1, [x2, x20]
-	b	.L1777
+	b	.L1778
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlVendorPartWrite,"ax",@progbits
 	.align	2
@@ -12401,25 +12414,25 @@ FtlVendorPartWrite:
 	stp	x21, x22, [sp, 32]
 	add	w1, w0, w1
 	mov	w22, w0
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1794
-	adrp	x0, .LANCHOR55
-	adrp	x26, .LANCHOR54
-	adrp	x27, .LANCHOR56
+	bhi	.L1795
+	adrp	x0, .LANCHOR56
+	adrp	x26, .LANCHOR55
+	adrp	x27, .LANCHOR57
 	mov	x25, x2
-	ldrh	w21, [x0, #:lo12:.LANCHOR55]
-	add	x26, x26, :lo12:.LANCHOR54
-	add	x27, x27, :lo12:.LANCHOR56
+	ldrh	w21, [x0, #:lo12:.LANCHOR56]
+	add	x26, x26, :lo12:.LANCHOR55
+	add	x27, x27, :lo12:.LANCHOR57
 	mov	w24, 0
 	lsr	w21, w22, w21
-.L1788:
-	cbnz	w20, .L1793
-.L1786:
+.L1789:
+	cbnz	w20, .L1794
+.L1787:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12428,7 +12441,7 @@ FtlVendorPartWrite:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1793:
+.L1794:
 	ldrh	w1, [x26]
 	adrp	x0, .LANCHOR191
 	adrp	x28, .LANCHOR182
@@ -12441,9 +12454,9 @@ FtlVendorPartWrite:
 	and	w19, w19, 65535
 	cmp	w20, w19
 	csel	w19, w0, w19, cc
-	cbz	w2, .L1790
+	cbz	w2, .L1791
 	cmp	w19, w1
-	beq	.L1790
+	beq	.L1791
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	str	w2, [x29, 124]
 	mov	w2, 1
@@ -12451,7 +12464,7 @@ FtlVendorPartWrite:
 	mov	w1, w2
 	add	x0, x29, 120
 	bl	FlashReadPages
-.L1791:
+.L1792:
 	lsl	w3, w19, 9
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	lsl	w23, w23, 7
@@ -12472,30 +12485,30 @@ FtlVendorPartWrite:
 	ldr	w3, [x29, 108]
 	csinv	w24, w24, wzr, ne
 	add	x25, x25, x3, sxtw
-	b	.L1788
-.L1790:
+	b	.L1789
+.L1791:
 	ldrh	w2, [x27]
 	mov	w1, 0
 	ldr	x0, [x28, #:lo12:.LANCHOR182]
 	bl	ftl_memset
-	b	.L1791
-.L1794:
+	b	.L1792
+.L1795:
 	mov	w24, -1
-	b	.L1786
+	b	.L1787
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",@progbits
 	.align	2
 	.global	Ftl_save_ext_data
 	.type	Ftl_save_ext_data, %function
 Ftl_save_ext_data:
-	adrp	x0, .LANCHOR136
-	add	x2, x0, :lo12:.LANCHOR136
-	ldr	w1, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR135
+	add	x2, x0, :lo12:.LANCHOR135
+	ldr	w1, [x0, #:lo12:.LANCHOR135]
 	mov	w0, 19539
 	movk	w0, 0x4654, lsl 16
 	cmp	w1, w0
-	bne	.L1799
-	mov	w0, 71
+	bne	.L1800
+	mov	w0, 72
 	mov	w1, 1
 	movk	w0, 0x5000, lsl 16
 	str	w0, [x2, 4]
@@ -12505,45 +12518,45 @@ Ftl_save_ext_data:
 	adrp	x0, .LANCHOR217
 	ldr	w0, [x0, #:lo12:.LANCHOR217]
 	str	w0, [x2, 92]
+	adrp	x0, .LANCHOR158
+	ldr	w0, [x0, #:lo12:.LANCHOR158]
+	str	w0, [x2, 8]
 	adrp	x0, .LANCHOR159
 	ldr	w0, [x0, #:lo12:.LANCHOR159]
-	str	w0, [x2, 8]
-	adrp	x0, .LANCHOR160
-	ldr	w0, [x0, #:lo12:.LANCHOR160]
 	str	w0, [x2, 12]
-	adrp	x0, .LANCHOR164
-	ldr	w0, [x0, #:lo12:.LANCHOR164]
-	str	w0, [x2, 16]
 	adrp	x0, .LANCHOR163
 	ldr	w0, [x0, #:lo12:.LANCHOR163]
+	str	w0, [x2, 16]
+	adrp	x0, .LANCHOR162
+	ldr	w0, [x0, #:lo12:.LANCHOR162]
 	str	w0, [x2, 20]
-	adrp	x0, .LANCHOR166
-	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR165
+	ldr	w0, [x0, #:lo12:.LANCHOR165]
 	str	w0, [x2, 28]
-	adrp	x0, .LANCHOR78
-	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR79
+	ldr	w0, [x0, #:lo12:.LANCHOR79]
 	str	w0, [x2, 32]
+	adrp	x0, .LANCHOR160
+	ldr	w0, [x0, #:lo12:.LANCHOR160]
+	str	w0, [x2, 36]
 	adrp	x0, .LANCHOR161
 	ldr	w0, [x0, #:lo12:.LANCHOR161]
-	str	w0, [x2, 36]
-	adrp	x0, .LANCHOR162
-	ldr	w0, [x0, #:lo12:.LANCHOR162]
 	str	w0, [x2, 40]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	str	w0, [x2, 44]
 	adrp	x0, .LANCHOR167
 	ldr	w0, [x0, #:lo12:.LANCHOR167]
-	str	w0, [x2, 44]
-	adrp	x0, .LANCHOR168
-	ldr	w0, [x0, #:lo12:.LANCHOR168]
 	str	w0, [x2, 48]
-	adrp	x0, .LANCHOR156
-	ldr	w0, [x0, #:lo12:.LANCHOR156]
-	str	w0, [x2, 60]
 	adrp	x0, .LANCHOR155
 	ldr	w0, [x0, #:lo12:.LANCHOR155]
+	str	w0, [x2, 60]
+	adrp	x0, .LANCHOR154
+	ldr	w0, [x0, #:lo12:.LANCHOR154]
 	str	w0, [x2, 64]
 	mov	w0, 0
 	b	FtlVendorPartWrite
-.L1799:
+.L1800:
 	ret
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",@progbits
@@ -12551,33 +12564,33 @@ Ftl_save_ext_data:
 	.global	FtlEctTblFlush
 	.type	FtlEctTblFlush, %function
 FtlEctTblFlush:
-	adrp	x1, .LANCHOR101
-	ldr	w1, [x1, #:lo12:.LANCHOR101]
-	cbz	w1, .L1806
-	adrp	x1, .LANCHOR168
+	adrp	x1, .LANCHOR28
+	ldr	w1, [x1, #:lo12:.LANCHOR28]
+	cbz	w1, .L1807
+	adrp	x1, .LANCHOR167
 	mov	w2, 4
-	ldr	w1, [x1, #:lo12:.LANCHOR168]
+	ldr	w1, [x1, #:lo12:.LANCHOR167]
 	cmp	w1, 29
 	mov	w1, 32
 	csel	w1, w1, w2, hi
-.L1802:
+.L1803:
 	adrp	x3, .LANCHOR218
 	ldrh	w2, [x3, #:lo12:.LANCHOR218]
 	cmp	w2, 31
-	bhi	.L1803
+	bhi	.L1804
 	add	w2, w2, 1
 	mov	w1, 1
 	strh	w2, [x3, #:lo12:.LANCHOR218]
-.L1803:
+.L1804:
 	adrp	x2, .LANCHOR188
-	cbnz	w0, .L1804
+	cbnz	w0, .L1805
 	ldr	x0, [x2, #:lo12:.LANCHOR188]
 	ldr	w3, [x0, 20]
 	ldr	w0, [x0, 16]
 	add	w1, w1, w3
 	cmp	w0, w1
-	bcc	.L1809
-.L1804:
+	bcc	.L1810
+.L1805:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	ldr	x2, [x2, #:lo12:.LANCHOR188]
@@ -12600,10 +12613,10 @@ FtlEctTblFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1806:
+.L1807:
 	mov	w1, 32
-	b	.L1802
-.L1809:
+	b	.L1803
+.L1810:
 	mov	w0, 0
 	ret
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
@@ -12617,115 +12630,115 @@ allocate_new_data_superblock:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	ldrh	w20, [x0]
-	adrp	x0, .LANCHOR38
+	adrp	x0, .LANCHOR39
 	str	x21, [sp, 32]
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	cmp	w0, w20
-	bcs	.L1812
-	mov	w2, 2943
+	bcs	.L1813
+	mov	w2, 2982
 	adrp	x1, .LANCHOR219
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR219
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR219
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1812:
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L1813
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1813:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1814
 	mov	w0, 65535
 	cmp	w20, w0
-	beq	.L1814
-	adrp	x1, .LANCHOR82
+	beq	.L1815
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x20, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L1815
+	cbz	w0, .L1816
 	mov	w0, w20
 	bl	INSERT_DATA_LIST
-.L1814:
+.L1815:
 	strb	wzr, [x19, 8]
-	adrp	x0, .LANCHOR91
-	add	x0, x0, :lo12:.LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
 	cmp	x19, x0
-	beq	.L1816
-	adrp	x0, .LANCHOR42
-	ldrh	w1, [x0, #:lo12:.LANCHOR42]
+	beq	.L1817
+	adrp	x0, .LANCHOR43
+	ldrh	w1, [x0, #:lo12:.LANCHOR43]
 	cmp	w1, 1
-	beq	.L1816
+	beq	.L1817
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L1817
-.L1816:
+	cbz	w0, .L1818
+.L1817:
 	mov	w0, 1
 	strb	w0, [x19, 8]
-.L1818:
+.L1819:
 	adrp	x1, .LANCHOR130
 	mov	w2, 65535
 	mov	x21, x1
 	ldrh	w0, [x1, #:lo12:.LANCHOR130]
 	cmp	w0, w2
-	beq	.L1823
+	beq	.L1824
 	cmp	w20, w0
-	bne	.L1824
-	adrp	x2, .LANCHOR82
+	bne	.L1825
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L1825
-.L1824:
-	bl	update_vpc_list
+	cbz	w1, .L1826
 .L1825:
+	bl	update_vpc_list
+.L1826:
 	mov	w0, -1
 	strh	w0, [x21, #:lo12:.LANCHOR130]
-.L1823:
+.L1824:
 	mov	x0, x19
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1813:
+.L1814:
 	mov	w0, 0
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1815:
+.L1816:
 	mov	w0, w20
 	bl	INSERT_FREE_LIST
-	b	.L1814
-.L1817:
-	adrp	x0, .LANCHOR90
-	add	x2, x0, :lo12:.LANCHOR90
+	b	.L1815
+.L1818:
+	adrp	x0, .LANCHOR91
+	add	x2, x0, :lo12:.LANCHOR91
 	cmp	x19, x2
-	bne	.L1818
+	bne	.L1819
 	cmp	w1, 3
-	beq	.L1820
-	adrp	x1, .LANCHOR156
-	ldr	w1, [x1, #:lo12:.LANCHOR156]
+	beq	.L1821
+	adrp	x1, .LANCHOR155
+	ldr	w1, [x1, #:lo12:.LANCHOR155]
 	cmp	w1, 1
-	bne	.L1821
-.L1820:
-	add	x1, x0, :lo12:.LANCHOR90
+	bne	.L1822
+.L1821:
+	add	x1, x0, :lo12:.LANCHOR91
 	mov	w2, 1
 	strb	w2, [x1, 8]
-.L1821:
-	adrp	x1, .LANCHOR101
-	ldr	w1, [x1, #:lo12:.LANCHOR101]
-	cbz	w1, .L1818
-	adrp	x1, .LANCHOR168
-	ldr	w1, [x1, #:lo12:.LANCHOR168]
+.L1822:
+	adrp	x1, .LANCHOR28
+	ldr	w1, [x1, #:lo12:.LANCHOR28]
+	cbz	w1, .L1819
+	adrp	x1, .LANCHOR167
+	ldr	w1, [x1, #:lo12:.LANCHOR167]
 	cmp	w1, 29
-	bhi	.L1818
-	add	x0, x0, :lo12:.LANCHOR90
+	bhi	.L1819
+	add	x0, x0, :lo12:.LANCHOR91
 	mov	w1, 1
 	strb	w1, [x0, 8]
-	b	.L1818
+	b	.L1819
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlProgPages,"ax",@progbits
 	.align	2
@@ -12743,38 +12756,38 @@ FtlProgPages:
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	mov	x20, x3
 	str	x25, [sp, 64]
-	cbz	w0, .L1853
+	cbz	w0, .L1854
 	ldrb	w0, [x3, 8]
 	cmp	w0, 1
 	cset	w22, eq
-.L1840:
+.L1841:
 	ldrb	w3, [x20, 9]
 	mov	w1, w21
 	mov	w2, w22
 	mov	x0, x19
-	adrp	x24, .LANCHOR51
-	adrp	x23, .LANCHOR136
-	add	x24, x24, :lo12:.LANCHOR51
-	add	x23, x23, :lo12:.LANCHOR136
+	adrp	x24, .LANCHOR52
+	adrp	x23, .LANCHOR135
+	add	x24, x24, :lo12:.LANCHOR52
+	add	x23, x23, :lo12:.LANCHOR135
 	bl	FlashProgPages
 	mov	w0, 56
 	umaddl	x21, w21, w0, x19
-.L1841:
+.L1842:
 	cmp	x21, x19
-	beq	.L1850
-	adrp	x25, .LANCHOR82
-	b	.L1851
-.L1853:
+	beq	.L1851
+	adrp	x25, .LANCHOR83
+	b	.L1852
+.L1854:
 	mov	w22, 0
-	b	.L1840
-.L1844:
+	b	.L1841
+.L1845:
 	ldr	w0, [x19, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	ldrh	w2, [x20]
 	cmp	w2, w0, uxth
-	bne	.L1842
-	ldr	x1, [x25, #:lo12:.LANCHOR82]
+	bne	.L1843
+	ldr	x1, [x25, #:lo12:.LANCHOR83]
 	ubfiz	x2, x2, 1, 16
 	ldrh	w3, [x20, 4]
 	ldrh	w0, [x1, x2]
@@ -12784,12 +12797,12 @@ FtlProgPages:
 	ldrh	w0, [x24]
 	strh	w0, [x20, 2]
 	strh	wzr, [x20, 4]
-.L1842:
+.L1843:
 	ldrh	w0, [x20, 4]
-	cbnz	w0, .L1843
+	cbnz	w0, .L1844
 	mov	x0, x20
 	bl	allocate_new_data_superblock
-.L1843:
+.L1844:
 	ldr	w0, [x23, 96]
 	add	w0, w0, 1
 	str	w0, [x23, 96]
@@ -12805,30 +12818,30 @@ FtlProgPages:
 	ldrb	w3, [x20, 9]
 	mov	x0, x19
 	bl	FlashProgPages
-.L1851:
+.L1852:
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L1844
-	adrp	x0, .LANCHOR36
+	beq	.L1845
+	adrp	x0, .LANCHOR37
 	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L1845
-	mov	w2, 1552
+	bcc	.L1846
+	mov	w2, 1564
 	adrp	x1, .LANCHOR220
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1845:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1846:
 	ldr	w0, [x19, 4]
-	cbnz	w22, .L1846
-.L1858:
+	cbnz	w22, .L1847
+.L1859:
 	str	w0, [x29, 92]
 	add	x1, x29, 92
 	ldr	w0, [x19, 24]
@@ -12841,43 +12854,43 @@ FtlProgPages:
 	and	w1, w0, 65535
 	mov	w25, w1
 	cmn	w3, #1
-	beq	.L1848
-	adrp	x2, .LANCHOR82
+	beq	.L1849
+	adrp	x2, .LANCHOR83
 	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w0, [x2, x0]
-	cbnz	w0, .L1849
-	adrp	x0, .LC38
+	cbnz	w0, .L1850
+	adrp	x0, .LC41
 	mov	w2, 0
-	add	x0, x0, :lo12:.LC38
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L1849:
+.L1850:
 	mov	w0, w25
 	bl	decrement_vpc_count
-.L1848:
+.L1849:
 	add	x19, x19, 56
-	b	.L1841
-.L1846:
+	b	.L1842
+.L1847:
 	orr	w0, w0, -2147483648
-	b	.L1858
-.L1850:
-	adrp	x0, .LANCHOR36
+	b	.L1859
+.L1851:
+	adrp	x0, .LANCHOR37
 	ldrb	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L1839
-	mov	w2, 1569
+	bcc	.L1840
+	mov	w2, 1581
 	adrp	x1, .LANCHOR220
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR220
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR220
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1839:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1840:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12895,14 +12908,14 @@ FtlCacheWriteBack:
 	str	x19, [sp, 16]
 	adrp	x19, .LANCHOR129
 	ldr	x0, [x19, #:lo12:.LANCHOR129]
-	cbz	x0, .L1860
+	cbz	x0, .L1861
 	adrp	x1, .LANCHOR221
 	mov	w2, 0
 	ldr	x3, [x1, #:lo12:.LANCHOR221]
 	mov	w1, 1
 	bl	FtlProgPages
 	str	xzr, [x19, #:lo12:.LANCHOR129]
-.L1860:
+.L1861:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -12914,67 +12927,67 @@ FtlCacheWriteBack:
 	.type	ftl_discard, %function
 ftl_discard:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR68
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	add	w1, w1, w2
 	stp	x21, x22, [sp, 32]
 	str	x23, [sp, 48]
 	cmp	w1, w0
-	bhi	.L1873
+	bhi	.L1874
 	mov	w19, w2
 	cmp	w2, 31
-	bhi	.L1867
-.L1881:
+	bhi	.L1868
+.L1882:
 	mov	w0, 0
-.L1865:
+.L1866:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1867:
-	adrp	x22, .LANCHOR54
+.L1868:
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	udiv	w21, w20, w0
 	msub	w20, w0, w21, w20
 	ands	w20, w20, 65535
-	beq	.L1868
+	beq	.L1869
 	sub	w0, w0, w20
 	add	w21, w21, 1
 	cmp	w0, w19
 	csel	w0, w0, w19, ls
 	sub	w19, w19, w0, uxth
-.L1868:
+.L1869:
 	adrp	x20, .LANCHOR222
-	adrp	x23, .LANCHOR161
+	adrp	x23, .LANCHOR160
 	add	x20, x20, :lo12:.LANCHOR222
-	add	x23, x23, :lo12:.LANCHOR161
+	add	x23, x23, :lo12:.LANCHOR160
 	mov	w0, -1
 	str	w0, [x29, 76]
-.L1869:
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+.L1870:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	cmp	w19, w0
-	bcs	.L1871
+	bcs	.L1872
 	adrp	x0, .LANCHOR222
 	ldr	w1, [x0, #:lo12:.LANCHOR222]
 	cmp	w1, 32
-	bls	.L1881
+	bls	.L1882
 	str	wzr, [x0, #:lo12:.LANCHOR222]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1881
-.L1871:
+	b	.L1882
+.L1872:
 	mov	w2, 0
 	add	x1, x29, 72
 	mov	w0, w21
 	bl	log2phys
 	ldr	w0, [x29, 72]
 	cmn	w0, #1
-	beq	.L1870
+	beq	.L1871
 	ldr	w0, [x20]
 	mov	w2, 1
 	add	x1, x29, 76
@@ -12989,23 +13002,23 @@ ftl_discard:
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1870:
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+.L1871:
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	add	w21, w21, 1
 	sub	w19, w19, w0
-	b	.L1869
-.L1873:
+	b	.L1870
+.L1874:
 	mov	w0, -1
-	b	.L1865
+	b	.L1866
 	.size	ftl_discard, .-ftl_discard
 	.section	.text.FtlSysFlush,"ax",@progbits
 	.align	2
 	.global	FtlSysFlush
 	.type	FtlSysFlush, %function
 FtlSysFlush:
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L1885
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L1886
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlCacheWriteBack
@@ -13016,7 +13029,7 @@ FtlSysFlush:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1885:
+.L1886:
 	mov	w0, 0
 	ret
 	.size	FtlSysFlush, .-FtlSysFlush
@@ -13028,14 +13041,14 @@ FtlDeInit:
 	adrp	x0, .LANCHOR223
 	ldr	w0, [x0, #:lo12:.LANCHOR223]
 	cmp	w0, 1
-	bne	.L1891
+	bne	.L1892
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	FtlSysFlush
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L1891:
+.L1892:
 	mov	w0, 0
 	ret
 	.size	FtlDeInit, .-FtlDeInit
@@ -13062,27 +13075,27 @@ FtlVendorPartRead:
 	mov	w22, w0
 	mov	w21, w1
 	add	w1, w0, w1
-	adrp	x0, .LANCHOR48
+	adrp	x0, .LANCHOR49
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	cmp	w1, w0
-	bhi	.L1905
-	adrp	x0, .LANCHOR55
+	bhi	.L1906
+	adrp	x0, .LANCHOR56
 	adrp	x26, .LANCHOR182
 	mov	x25, x2
 	mov	x28, x26
-	ldrh	w20, [x0, #:lo12:.LANCHOR55]
+	ldrh	w20, [x0, #:lo12:.LANCHOR56]
 	mov	w24, 0
-	adrp	x0, .LANCHOR54
-	add	x0, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR55
+	add	x0, x0, :lo12:.LANCHOR55
 	str	x0, [x29, 104]
 	lsr	w20, w22, w20
-.L1898:
-	cbnz	w21, .L1904
-.L1896:
+.L1899:
+	cbnz	w21, .L1905
+.L1897:
 	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -13091,7 +13104,7 @@ FtlVendorPartRead:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1904:
+.L1905:
 	adrp	x0, .LANCHOR191
 	ldr	x0, [x0, #:lo12:.LANCHOR191]
 	ldr	w3, [x0, w20, uxtw 2]
@@ -13105,7 +13118,7 @@ FtlVendorPartRead:
 	cmp	w21, w19
 	csel	w19, w0, w19, cc
 	lsl	w27, w19, 9
-	cbz	w3, .L1900
+	cbz	w3, .L1901
 	ldr	x0, [x26, #:lo12:.LANCHOR182]
 	mov	w2, 1
 	str	w3, [x29, 100]
@@ -13121,39 +13134,39 @@ FtlVendorPartRead:
 	csinv	w24, w24, wzr, ne
 	ldr	w0, [x0, #:lo12:.LANCHOR199]
 	cmp	w0, 256
-	bne	.L1902
+	bne	.L1903
 	mov	w2, w3
 	mov	w1, w20
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	ldr	x2, [x26, #:lo12:.LANCHOR182]
 	adrp	x0, .LANCHOR215
 	mov	w1, w20
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapWritePage
-.L1902:
+.L1903:
 	ldr	x1, [x28, #:lo12:.LANCHOR182]
 	lsl	w23, w23, 7
 	mov	w2, w27
 	mov	x0, x25
 	add	x1, x1, x23, sxtw 2
 	bl	ftl_memcpy
-.L1903:
+.L1904:
 	add	w20, w20, 1
 	sub	w21, w21, w19
 	add	w22, w22, w19
 	add	x25, x25, x27, sxtw
-	b	.L1898
-.L1900:
+	b	.L1899
+.L1901:
 	mov	w2, w27
 	mov	w1, 0
 	mov	x0, x25
 	bl	ftl_memset
-	b	.L1903
-.L1905:
+	b	.L1904
+.L1906:
 	mov	w24, -1
-	b	.L1896
+	b	.L1897
 	.size	FtlVendorPartRead, .-FtlVendorPartRead
 	.section	.text.FtlLoadEctTbl,"ax",@progbits
 	.align	2
@@ -13174,18 +13187,18 @@ FtlLoadEctTbl:
 	mov	w0, 17221
 	movk	w0, 0x4254, lsl 16
 	cmp	w1, w0
-	beq	.L1908
-	adrp	x1, .LC40
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC40
-	add	x0, x0, :lo12:.LC6
+	beq	.L1909
+	adrp	x1, .LC43
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC43
+	add	x0, x0, :lo12:.LC8
 	bl	printf
 	ldr	x0, [x19, #:lo12:.LANCHOR188]
 	mov	w1, 0
 	ldrh	w2, [x20, #:lo12:.LANCHOR187]
 	lsl	w2, w2, 9
 	bl	ftl_memset
-.L1908:
+.L1909:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13201,93 +13214,93 @@ Ftl_load_ext_data:
 	mov	w0, 0
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR136
+	adrp	x19, .LANCHOR135
 	str	x21, [sp, 32]
-	add	x21, x19, :lo12:.LANCHOR136
+	add	x21, x19, :lo12:.LANCHOR135
 	mov	x2, x21
 	bl	FtlVendorPartRead
-	ldr	w0, [x19, #:lo12:.LANCHOR136]
+	ldr	w0, [x19, #:lo12:.LANCHOR135]
 	mov	w20, 19539
 	movk	w20, 0x4654, lsl 16
 	cmp	w0, w20
-	beq	.L1911
+	beq	.L1912
 	mov	w2, 512
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
-	str	w20, [x19, #:lo12:.LANCHOR136]
-.L1911:
-	ldr	w1, [x19, #:lo12:.LANCHOR136]
-	add	x0, x19, :lo12:.LANCHOR136
+	str	w20, [x19, #:lo12:.LANCHOR135]
+.L1912:
+	ldr	w1, [x19, #:lo12:.LANCHOR135]
+	add	x0, x19, :lo12:.LANCHOR135
 	cmp	w1, w20
-	adrp	x20, .LANCHOR166
-	bne	.L1912
+	adrp	x20, .LANCHOR165
+	bne	.L1913
 	adrp	x1, .LANCHOR216
 	ldr	w2, [x0, 88]
 	str	w2, [x1, #:lo12:.LANCHOR216]
 	adrp	x1, .LANCHOR217
 	ldr	w2, [x0, 92]
 	str	w2, [x1, #:lo12:.LANCHOR217]
-	adrp	x1, .LANCHOR159
+	adrp	x1, .LANCHOR158
 	ldr	w2, [x0, 8]
-	str	w2, [x1, #:lo12:.LANCHOR159]
-	adrp	x1, .LANCHOR160
+	str	w2, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR159
 	ldr	w2, [x0, 12]
-	str	w2, [x1, #:lo12:.LANCHOR160]
-	adrp	x1, .LANCHOR164
-	ldr	w2, [x0, 16]
-	str	w2, [x1, #:lo12:.LANCHOR164]
+	str	w2, [x1, #:lo12:.LANCHOR159]
 	adrp	x1, .LANCHOR163
-	ldr	w2, [x0, 20]
+	ldr	w2, [x0, 16]
 	str	w2, [x1, #:lo12:.LANCHOR163]
+	adrp	x1, .LANCHOR162
+	ldr	w2, [x0, 20]
+	str	w2, [x1, #:lo12:.LANCHOR162]
 	ldp	w1, w2, [x0, 28]
-	str	w1, [x20, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR78
-	str	w2, [x1, #:lo12:.LANCHOR78]
-	adrp	x1, .LANCHOR161
+	str	w1, [x20, #:lo12:.LANCHOR165]
+	adrp	x1, .LANCHOR79
+	str	w2, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR160
 	ldr	w2, [x0, 36]
-	str	w2, [x1, #:lo12:.LANCHOR161]
-	adrp	x1, .LANCHOR162
+	str	w2, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR161
 	ldr	w2, [x0, 40]
-	str	w2, [x1, #:lo12:.LANCHOR162]
-	adrp	x1, .LANCHOR167
+	str	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR166
 	ldr	w2, [x0, 44]
-	str	w2, [x1, #:lo12:.LANCHOR167]
-	adrp	x1, .LANCHOR168
+	str	w2, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR167
 	ldr	w2, [x0, 48]
-	str	w2, [x1, #:lo12:.LANCHOR168]
+	str	w2, [x1, #:lo12:.LANCHOR167]
 	ldr	w1, [x0, 60]
-	adrp	x0, .LANCHOR156
-	str	w1, [x0, #:lo12:.LANCHOR156]
-.L1912:
-	add	x19, x19, :lo12:.LANCHOR136
 	adrp	x0, .LANCHOR155
-	str	wzr, [x0, #:lo12:.LANCHOR155]
+	str	w1, [x0, #:lo12:.LANCHOR155]
+.L1913:
+	add	x19, x19, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR154
+	str	wzr, [x0, #:lo12:.LANCHOR154]
 	mov	w0, 34661
 	ldr	w1, [x19, 68]
 	movk	w0, 0x1234, lsl 16
 	cmp	w1, w0
-	bne	.L1913
-	adrp	x0, .LANCHOR101
+	bne	.L1914
+	adrp	x0, .LANCHOR28
 	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR101]
-	adrp	x1, .LC41
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC41
-	add	x0, x0, :lo12:.LC6
+	str	w1, [x0, #:lo12:.LANCHOR28]
+	adrp	x1, .LC44
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC44
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L1913:
-	adrp	x1, .LANCHOR165
-	adrp	x0, .LANCHOR46
+.L1914:
+	adrp	x1, .LANCHOR164
+	adrp	x0, .LANCHOR47
 	ldr	x21, [sp, 32]
-	ldr	w2, [x1, #:lo12:.LANCHOR165]
-	ldrh	w0, [x0, #:lo12:.LANCHOR46]
-	ldr	w1, [x20, #:lo12:.LANCHOR166]
+	ldr	w2, [x1, #:lo12:.LANCHOR164]
+	ldrh	w0, [x0, #:lo12:.LANCHOR47]
+	ldr	w1, [x20, #:lo12:.LANCHOR165]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	madd	w0, w0, w2, w1
-	adrp	x1, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
 	udiv	w0, w0, w1
 	adrp	x1, .LANCHOR202
 	str	w0, [x1, #:lo12:.LANCHOR202]
@@ -13299,11 +13312,11 @@ Ftl_load_ext_data:
 	.type	FtlMapBlkWriteDumpData, %function
 FtlMapBlkWriteDumpData:
 	ldr	w1, [x0, 56]
-	cbz	w1, .L1929
+	cbz	w1, .L1930
 	stp	x29, x30, [sp, -80]!
-	adrp	x1, .LANCHOR75
+	adrp	x1, .LANCHOR76
 	add	x29, sp, 0
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
@@ -13311,7 +13324,7 @@ FtlMapBlkWriteDumpData:
 	str	x25, [sp, 64]
 	str	wzr, [x0, 56]
 	ldr	x25, [x0, 40]
-	cbnz	w1, .L1915
+	cbnz	w1, .L1916
 	mov	x19, x0
 	adrp	x0, .LANCHOR181
 	adrp	x23, .LANCHOR199
@@ -13323,16 +13336,16 @@ FtlMapBlkWriteDumpData:
 	ldr	x24, [x0, #:lo12:.LANCHOR185]
 	ldrh	w0, [x19, 2]
 	str	x24, [x21, 16]
-	cbz	w0, .L1919
-	adrp	x1, .LANCHOR52
-	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cbz	w0, .L1920
+	adrp	x1, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	cmp	w0, w1
-	bge	.L1919
+	bge	.L1920
 	ldrh	w1, [x19]
 	mov	w2, 65535
 	cmp	w1, w2
-	beq	.L1919
+	beq	.L1920
 	ldr	x2, [x19, 16]
 	ubfiz	x1, x1, 1, 16
 	sub	w0, w0, #1
@@ -13345,16 +13358,16 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	w0, [x23, #:lo12:.LANCHOR199]
 	cmn	w0, #1
-	beq	.L1919
+	beq	.L1920
 	ldrh	w1, [x24, 8]
 	ldr	x2, [x19, 40]
 	ubfiz	x0, x1, 2, 16
 	ldr	w2, [x2, x0]
 	ldr	w0, [x21, 4]
 	cmp	w2, w0
-	bne	.L1919
+	bne	.L1920
 	ldr	x2, [x21, 8]
-.L1932:
+.L1933:
 	mov	x0, x19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13362,37 +13375,37 @@ FtlMapBlkWriteDumpData:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	b	FtlMapWritePage
-.L1919:
+.L1920:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
 	ubfiz	x0, x20, 2, 16
 	ldr	w1, [x25, x0]
 	add	x0, x22, :lo12:.LANCHOR199
 	str	w1, [x0, 4]
-	cbz	w1, .L1920
+	cbz	w1, .L1921
 	mov	w2, 1
 	mov	w1, w2
 	bl	FlashReadPages
-.L1921:
+.L1922:
 	add	x22, x22, :lo12:.LANCHOR199
 	mov	w1, w20
 	ldr	x2, [x22, 8]
-	b	.L1932
-.L1920:
-	adrp	x1, .LANCHOR56
+	b	.L1933
+.L1921:
+	adrp	x1, .LANCHOR57
 	ldr	x0, [x0, 8]
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 255
 	bl	ftl_memset
-	b	.L1921
-.L1915:
+	b	.L1922
+.L1916:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1929:
+.L1930:
 	ret
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlScanSysBlk,"ax",@progbits
@@ -13406,82 +13419,82 @@ FtlScanSysBlk:
 	stp	x25, x26, [sp, 64]
 	adrp	x25, .LANCHOR127
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR63
+	adrp	x21, .LANCHOR64
 	ldr	x0, [x25, #:lo12:.LANCHOR127]
 	adrp	x22, .LANCHOR190
-	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR125
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR69
+	adrp	x23, .LANCHOR70
 	stp	x27, x28, [sp, 80]
 	adrp	x27, .LANCHOR126
 	lsl	w2, w2, 2
 	strh	wzr, [x20, #:lo12:.LANCHOR125]
-	strh	wzr, [x23, #:lo12:.LANCHOR69]
+	strh	wzr, [x23, #:lo12:.LANCHOR70]
 	bl	ftl_memset
 	ldr	x0, [x27, #:lo12:.LANCHOR126]
 	mov	w1, 0
-	ldr	w2, [x21, #:lo12:.LANCHOR63]
-	adrp	x19, .LANCHOR60
-	adrp	x28, .LANCHOR70
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
+	adrp	x19, .LANCHOR61
+	adrp	x28, .LANCHOR71
 	adrp	x24, .LANCHOR206
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldr	x0, [x22, #:lo12:.LANCHOR190]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldr	x0, [x28, #:lo12:.LANCHOR70]
+	ldr	x0, [x28, #:lo12:.LANCHOR71]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	mov	w2, 12
 	mov	w1, 255
 	add	x0, x24, :lo12:.LANCHOR206
 	bl	ftl_memset
-	adrp	x0, .LANCHOR38
+	adrp	x0, .LANCHOR39
 	stp	x22, x25, [x29, 144]
 	str	x27, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	str	w0, [x29, 172]
-	adrp	x0, .LANCHOR39
-	add	x0, x0, :lo12:.LANCHOR39
+	adrp	x0, .LANCHOR40
+	add	x0, x0, :lo12:.LANCHOR40
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR157
-	add	x0, x0, :lo12:.LANCHOR157
+	adrp	x0, .LANCHOR156
+	add	x0, x0, :lo12:.LANCHOR156
 	str	x0, [x29, 112]
-.L1934:
+.L1935:
 	ldr	x0, [x29, 120]
 	ldr	w1, [x29, 172]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bls	.L1975
-	adrp	x0, .LANCHOR36
-	adrp	x25, .LANCHOR178
-	adrp	x6, .LANCHOR45
+	bls	.L1976
+	adrp	x0, .LANCHOR37
+	adrp	x25, .LANCHOR177
+	adrp	x6, .LANCHOR46
 	mov	x5, 0
-	ldrh	w13, [x0, #:lo12:.LANCHOR36]
+	ldrh	w13, [x0, #:lo12:.LANCHOR37]
 	adrp	x0, .LANCHOR104
-	ldr	x7, [x25, #:lo12:.LANCHOR178]
+	ldr	x7, [x25, #:lo12:.LANCHOR177]
 	mov	w22, 0
 	ldr	x12, [x0, #:lo12:.LANCHOR104]
 	adrp	x0, .LANCHOR105
-	add	x6, x6, :lo12:.LANCHOR45
+	add	x6, x6, :lo12:.LANCHOR46
 	mov	w8, 56
 	ldr	x11, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LANCHOR57
-	ldrh	w10, [x0, #:lo12:.LANCHOR57]
-	b	.L1976
-.L1936:
+	adrp	x0, .LANCHOR58
+	ldrh	w10, [x0, #:lo12:.LANCHOR58]
+	b	.L1977
+.L1937:
 	ldrh	w1, [x29, 172]
 	ldrb	w0, [x6, x5]
 	bl	V2P_block
 	and	w4, w0, 65535
 	bl	FtlBbmIsBadBlock
-	cbnz	w0, .L1935
+	cbnz	w0, .L1936
 	umaddl	x1, w22, w8, x7
 	lsl	w4, w4, 10
 	mul	w0, w22, w10
@@ -13491,19 +13504,19 @@ FtlScanSysBlk:
 	str	w4, [x1, 4]
 	add	x0, x11, x0, sxtw 2
 	stp	x12, x0, [x1, 8]
-.L1935:
+.L1936:
 	add	x5, x5, 1
-.L1976:
+.L1977:
 	cmp	w13, w5, uxth
-	bhi	.L1936
-	cbnz	w22, .L1937
-.L1974:
+	bhi	.L1937
+	cbnz	w22, .L1938
+.L1975:
 	ldr	w0, [x29, 172]
 	add	w26, w0, 1
 	and	w0, w26, 65535
 	str	w0, [x29, 172]
-	b	.L1934
-.L1937:
+	b	.L1935
+.L1938:
 	mov	w1, w22
 	mov	w2, 1
 	mov	x0, x7
@@ -13515,20 +13528,20 @@ FtlScanSysBlk:
 	adrp	x0, .LANCHOR224
 	add	x0, x0, :lo12:.LANCHOR224
 	str	x0, [x29, 136]
-.L1973:
-	ldr	x0, [x25, #:lo12:.LANCHOR178]
+.L1974:
+	ldr	x0, [x25, #:lo12:.LANCHOR177]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	ldr	w3, [x1, 4]
 	cmn	w0, #1
 	ldr	x27, [x1, 16]
 	ubfx	x26, x3, 10, 16
-	bne	.L1940
+	bne	.L1941
 	mov	w5, 16
 	mov	w7, 65535
-.L1942:
-	ldr	x0, [x25, #:lo12:.LANCHOR178]
-	add	x6, x25, :lo12:.LANCHOR178
+.L1943:
+	ldr	x0, [x25, #:lo12:.LANCHOR177]
+	add	x6, x25, :lo12:.LANCHOR177
 	mov	w2, 1
 	str	w7, [x29, 100]
 	add	x0, x0, x22
@@ -13544,81 +13557,81 @@ FtlScanSysBlk:
 	ldr	w5, [x29, 168]
 	cmp	w0, w7
 	ldr	x6, [x29, 104]
-	bne	.L1939
+	bne	.L1940
 	ldr	x0, [x6]
 	mov	w1, -1
 	str	w1, [x0, x22]
 	ldr	x0, [x6]
 	ldr	w0, [x0, x22]
 	cmp	w0, w1
-	beq	.L2012
-.L1940:
-	adrp	x0, .LANCHOR157
-	ldr	w1, [x0, #:lo12:.LANCHOR157]
+	beq	.L2013
+.L1941:
+	adrp	x0, .LANCHOR156
+	ldr	w1, [x0, #:lo12:.LANCHOR156]
 	ldr	w0, [x27, 4]
 	cmn	w1, #1
-	beq	.L1943
+	beq	.L1944
 	cmp	w1, w0
-	bhi	.L1944
-.L1943:
+	bhi	.L1945
+.L1944:
 	cmn	w0, #1
-	beq	.L1944
+	beq	.L1945
 	ldr	x2, [x29, 112]
 	add	w1, w0, 1
 	str	w1, [x2]
-.L1944:
+.L1945:
 	ldrh	w1, [x27]
 	mov	w2, 61604
 	cmp	w1, w2
-	beq	.L1946
-	bhi	.L1947
+	beq	.L1947
+	bhi	.L1948
 	mov	w0, 61574
 	cmp	w1, w0
-	beq	.L1948
-.L1945:
+	beq	.L1949
+.L1946:
 	ldr	x0, [x29, 128]
 	add	x22, x22, 56
 	cmp	x0, x22
-	bne	.L1973
-	b	.L1974
-.L1939:
-	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	bne	.L1974
+	b	.L1975
+.L1940:
+	ldr	x0, [x25, #:lo12:.LANCHOR177]
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	bne	.L1940
+	bne	.L1941
 	sub	w5, w5, #1
 	ands	w5, w5, 65535
-	bne	.L1942
-.L2012:
+	bne	.L1943
+.L2013:
 	mov	w1, 0
 	mov	w0, w26
 	bl	FtlFreeSysBlkQueueIn
-	b	.L1945
-.L1947:
+	b	.L1946
+.L1948:
 	mov	w0, 61634
 	cmp	w1, w0
-	beq	.L1949
+	beq	.L1950
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2012
-	b	.L1945
-.L1949:
+	beq	.L2013
+	b	.L1946
+.L1950:
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L1951
+	bls	.L1952
 	ldr	x1, [x29, 136]
-	mov	w2, 1269
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	mov	w2, 1302
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1951:
-	ldr	w6, [x21, #:lo12:.LANCHOR63]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1952:
+	ldr	w6, [x21, #:lo12:.LANCHOR64]
 	ldr	x3, [x29, 152]
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
 	and	w2, w6, 65535
@@ -13628,53 +13641,53 @@ FtlScanSysBlk:
 	sub	w2, w2, #1
 	ldr	x5, [x3, #:lo12:.LANCHOR127]
 	sxth	w2, w2
-.L1952:
+.L1953:
 	cmp	w0, w2
-	bgt	.L1958
-	tbz	w0, #31, .L1993
-	b	.L1945
-.L1958:
+	bgt	.L1959
+	tbz	w0, #31, .L1994
+	b	.L1946
+.L1959:
 	sxtw	x8, w0
 	ldr	w11, [x27, 4]
 	lsl	x7, x8, 2
 	add	x10, x5, x7
 	ldr	w7, [x5, x7]
 	cmp	w11, w7
-	bls	.L1953
+	bls	.L1954
 	ldr	w2, [x5]
-	cbnz	w2, .L1954
+	cbnz	w2, .L1955
 	cmp	w6, w1
-	beq	.L1954
+	beq	.L1955
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR125]
-.L1954:
+.L1955:
 	ldr	x1, [x29, 160]
 	ldr	x6, [x1, #:lo12:.LANCHOR126]
 	mov	w1, 0
-.L1955:
+.L1956:
 	cmp	w1, w0
-	bne	.L1956
+	bne	.L1957
 	ldr	w1, [x27, 4]
 	str	w1, [x10]
 	strh	w26, [x6, x8, lsl 1]
-	tbnz	w0, #31, .L1945
+	tbnz	w0, #31, .L1946
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	ldr	w2, [x21, #:lo12:.LANCHOR64]
 	sub	w2, w2, w1
 	sub	w2, w2, #1
 	cmp	w0, w2, sxth
-	bgt	.L1945
-.L1993:
+	bgt	.L1946
+.L1994:
 	add	w1, w1, 1
 	strh	w1, [x20, #:lo12:.LANCHOR125]
 	ldr	w1, [x27, 4]
 	str	w1, [x5, x0, lsl 2]
 	ldr	x1, [x29, 160]
 	ldr	x1, [x1, #:lo12:.LANCHOR126]
-.L2011:
+.L2012:
 	strh	w26, [x1, x0, lsl 1]
-	b	.L1945
-.L1956:
+	b	.L1946
+.L1957:
 	sxtw	x2, w1
 	add	w1, w1, 1
 	lsl	x7, x2, 2
@@ -13686,74 +13699,74 @@ FtlScanSysBlk:
 	add	x7, x6, x2
 	ldrh	w7, [x7, 2]
 	strh	w7, [x6, x2]
-	b	.L1955
-.L1953:
+	b	.L1956
+.L1954:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1952
-.L1948:
-	ldrh	w1, [x23, #:lo12:.LANCHOR69]
-	ldrh	w0, [x19, #:lo12:.LANCHOR60]
+	b	.L1953
+.L1949:
+	ldrh	w1, [x23, #:lo12:.LANCHOR70]
+	ldrh	w0, [x19, #:lo12:.LANCHOR61]
 	cmp	w1, w0
-	bls	.L1961
+	bls	.L1962
 	ldr	x1, [x29, 136]
-	mov	w2, 1316
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	mov	w2, 1349
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L1961:
-	ldrh	w6, [x19, #:lo12:.LANCHOR60]
-	ldrh	w2, [x23, #:lo12:.LANCHOR69]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L1962:
+	ldrh	w6, [x19, #:lo12:.LANCHOR61]
+	ldrh	w2, [x23, #:lo12:.LANCHOR70]
 	sub	w1, w6, #1
 	sxth	x0, w1
 	sub	w5, w1, w2
 	ldr	x1, [x29, 144]
 	ldr	x1, [x1, #:lo12:.LANCHOR190]
-.L1962:
+.L1963:
 	cmp	w0, w5
-	ble	.L1967
+	ble	.L1968
 	sxtw	x7, w0
 	ldr	w11, [x27, 4]
 	lsl	x8, x7, 2
 	add	x10, x1, x8
 	ldr	w8, [x1, x8]
 	cmp	w11, w8
-	bls	.L1963
+	bls	.L1964
 	ldr	w5, [x1]
-	cbnz	w5, .L1964
+	cbnz	w5, .L1965
 	cmp	w6, w2
-	beq	.L1964
+	beq	.L1965
 	add	w2, w2, 1
-	strh	w2, [x23, #:lo12:.LANCHOR69]
-.L1964:
-	ldr	x6, [x28, #:lo12:.LANCHOR70]
-	mov	w2, 0
+	strh	w2, [x23, #:lo12:.LANCHOR70]
 .L1965:
+	ldr	x6, [x28, #:lo12:.LANCHOR71]
+	mov	w2, 0
+.L1966:
 	cmp	w2, w0
-	bne	.L1966
+	bne	.L1967
 	ldr	w2, [x27, 4]
 	str	w2, [x10]
 	strh	w26, [x6, x7, lsl 1]
-.L1967:
-	tbnz	w0, #31, .L1945
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
-	ldrh	w5, [x23, #:lo12:.LANCHOR69]
+.L1968:
+	tbnz	w0, #31, .L1946
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
+	ldrh	w5, [x23, #:lo12:.LANCHOR70]
 	sub	w2, w2, #1
 	sub	w2, w2, w5
 	cmp	w0, w2, sxth
-	bgt	.L1945
+	bgt	.L1946
 	add	w5, w5, 1
 	ldr	w2, [x27, 4]
-	strh	w5, [x23, #:lo12:.LANCHOR69]
+	strh	w5, [x23, #:lo12:.LANCHOR70]
 	str	w2, [x1, x0, lsl 2]
-	ldr	x1, [x28, #:lo12:.LANCHOR70]
-	b	.L2011
-.L1966:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	b	.L2012
+.L1967:
 	sxtw	x5, w2
 	add	w2, w2, 1
 	lsl	x8, x5, 2
@@ -13765,66 +13778,66 @@ FtlScanSysBlk:
 	add	x8, x6, x5
 	ldrh	w8, [x8, 2]
 	strh	w8, [x6, x5]
-	b	.L1965
-.L1963:
+	b	.L1966
+.L1964:
 	sub	w0, w0, #1
 	sxth	x0, w0
-	b	.L1962
-.L1946:
+	b	.L1963
+.L1947:
 	ldrh	w5, [x24, #:lo12:.LANCHOR206]
 	mov	w1, 65535
 	add	x2, x24, :lo12:.LANCHOR206
 	cmp	w5, w1
-	bne	.L1969
+	bne	.L1970
 	strh	w26, [x24, #:lo12:.LANCHOR206]
 	str	w0, [x2, 8]
-	b	.L1945
-.L1969:
+	b	.L1946
+.L1970:
 	ldrh	w0, [x2, 4]
 	cmp	w0, w1
-	beq	.L1970
+	beq	.L1971
 	mov	w1, 1
 	bl	FtlFreeSysBlkQueueIn
-.L1970:
+.L1971:
 	add	x0, x24, :lo12:.LANCHOR206
 	ldr	w1, [x27, 4]
 	ldr	w2, [x0, 8]
 	cmp	w2, w1
-	bcs	.L1971
+	bcs	.L1972
 	ldrh	w2, [x24, #:lo12:.LANCHOR206]
 	strh	w2, [x0, 4]
 	strh	w26, [x24, #:lo12:.LANCHOR206]
 	str	w1, [x0, 8]
-	b	.L1945
-.L1971:
+	b	.L1946
+.L1972:
 	strh	w26, [x0, 4]
-	b	.L1945
-.L1975:
+	b	.L1946
+.L1976:
 	ldr	x0, [x29, 160]
 	ldr	x2, [x0, #:lo12:.LANCHOR126]
 	ldrh	w0, [x2]
-	cbz	w0, .L1977
-.L1980:
-	ldr	x1, [x28, #:lo12:.LANCHOR70]
-	ldrh	w0, [x1]
 	cbz	w0, .L1978
-.L1979:
+.L1981:
+	ldr	x1, [x28, #:lo12:.LANCHOR71]
+	ldrh	w0, [x1]
+	cbz	w0, .L1979
+.L1980:
 	ldrh	w1, [x20, #:lo12:.LANCHOR125]
-	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	ldr	w0, [x21, #:lo12:.LANCHOR64]
 	cmp	w1, w0
-	bls	.L2009
-	mov	w2, 1450
+	bls	.L2010
+	mov	w2, 1483
 	adrp	x1, .LANCHOR224
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR224
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR224
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2009:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2010:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13833,24 +13846,24 @@ FtlScanSysBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L1977:
+.L1978:
 	ldrh	w0, [x20, #:lo12:.LANCHOR125]
-	cbz	w0, .L1980
-	ldr	w1, [x21, #:lo12:.LANCHOR63]
+	cbz	w0, .L1981
+	ldr	w1, [x21, #:lo12:.LANCHOR64]
 	mov	w0, 0
-.L1981:
+.L1982:
 	cmp	w0, w1
-	bcs	.L1980
+	bcs	.L1981
 	ldrh	w3, [x2, w0, sxtw 1]
-	cbz	w3, .L1982
+	cbz	w3, .L1983
 	ldr	x1, [x29, 152]
-	add	x7, x21, :lo12:.LANCHOR63
+	add	x7, x21, :lo12:.LANCHOR64
 	ldr	x4, [x1, #:lo12:.LANCHOR127]
 	mov	w1, w0
-.L1983:
+.L1984:
 	ldr	w3, [x7]
 	cmp	w1, w3
-	bcs	.L1980
+	bcs	.L1981
 	sxtw	x6, w1
 	sub	w3, w1, w0
 	lsl	x5, x6, 1
@@ -13862,29 +13875,29 @@ FtlScanSysBlk:
 	strh	w8, [x2, x3, lsl 1]
 	str	w6, [x4, x3, lsl 2]
 	strh	wzr, [x2, x5]
-	b	.L1983
-.L1982:
+	b	.L1984
+.L1983:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1981
-.L1978:
-	ldrh	w0, [x23, #:lo12:.LANCHOR69]
-	cbz	w0, .L1979
-	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	b	.L1982
+.L1979:
+	ldrh	w0, [x23, #:lo12:.LANCHOR70]
+	cbz	w0, .L1980
+	ldrh	w2, [x19, #:lo12:.LANCHOR61]
 	mov	w0, 0
-.L1988:
+.L1989:
 	mov	w6, w0
 	cmp	w0, w2
-	bge	.L1979
+	bge	.L1980
 	ldrh	w3, [x1, w0, sxtw 1]
-	cbz	w3, .L1989
+	cbz	w3, .L1990
 	ldr	x2, [x29, 144]
-	add	x19, x19, :lo12:.LANCHOR60
+	add	x19, x19, :lo12:.LANCHOR61
 	ldr	x3, [x2, #:lo12:.LANCHOR190]
-.L1990:
+.L1991:
 	ldrh	w2, [x19]
 	cmp	w0, w2
-	bge	.L1979
+	bge	.L1980
 	sxtw	x5, w0
 	sub	w2, w0, w6
 	lsl	x4, x5, 1
@@ -13896,11 +13909,11 @@ FtlScanSysBlk:
 	strh	w7, [x1, x2, lsl 1]
 	str	w5, [x3, x2, lsl 2]
 	strh	wzr, [x1, x4]
-	b	.L1990
-.L1989:
+	b	.L1991
+.L1990:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L1988
+	b	.L1989
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlLoadSysInfo,"ax",@progbits
 	.align	2
@@ -13917,23 +13930,23 @@ FtlLoadSysInfo:
 	stp	x25, x26, [sp, 64]
 	add	x19, x23, :lo12:.LANCHOR199
 	adrp	x25, .LANCHOR185
-	adrp	x24, .LANCHOR82
+	adrp	x24, .LANCHOR83
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR38
+	adrp	x21, .LANCHOR39
 	ldr	x0, [x25, #:lo12:.LANCHOR185]
 	stp	x27, x28, [sp, 80]
 	stp	xzr, x0, [x19, 8]
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
-	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x21, #:lo12:.LANCHOR39]
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	ldrh	w0, [x20, #:lo12:.LANCHOR206]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L2014
-.L2023:
+	bne	.L2015
+.L2024:
 	mov	w0, -1
-.L2013:
+.L2014:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -13941,7 +13954,7 @@ FtlLoadSysInfo:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2014:
+.L2015:
 	add	x26, x20, :lo12:.LANCHOR206
 	mov	w27, 19539
 	mov	w1, 1
@@ -13951,52 +13964,52 @@ FtlLoadSysInfo:
 	sxth	w22, w0
 	add	w0, w0, 1
 	strh	w0, [x26, 2]
-	adrp	x26, .LANCHOR79
-.L2016:
-	tbz	w22, #31, .L2019
-	mov	w2, 1510
+	adrp	x26, .LANCHOR180
+.L2017:
+	tbz	w22, #31, .L2020
+	mov	w2, 1543
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2018:
-	adrp	x1, .LANCHOR56
-	ldrh	w0, [x21, #:lo12:.LANCHOR38]
-	ldrh	w1, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2019:
+	adrp	x1, .LANCHOR57
+	ldrh	w0, [x21, #:lo12:.LANCHOR39]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
 	add	x0, x0, 24
 	cmp	x1, x0, lsl 1
-	bcs	.L2021
-	mov	w2, 1512
+	bcs	.L2022
+	mov	w2, 1545
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2021:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2022:
 	add	x23, x23, :lo12:.LANCHOR199
 	mov	w2, 48
-	adrp	x19, .LANCHOR135
-	add	x0, x19, :lo12:.LANCHOR135
+	adrp	x19, .LANCHOR80
+	add	x0, x19, :lo12:.LANCHOR80
 	ldr	x1, [x23, 8]
 	bl	ftl_memcpy
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
-	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
+	ldrh	w2, [x21, #:lo12:.LANCHOR39]
 	ldr	x1, [x23, 8]
 	lsl	w2, w2, 1
 	add	x1, x1, 48
 	bl	ftl_memcpy
-	ldrh	w1, [x21, #:lo12:.LANCHOR38]
+	ldrh	w1, [x21, #:lo12:.LANCHOR39]
 	ldr	x0, [x23, 8]
 	lsr	w2, w1, 3
 	ubfiz	x1, x1, 1, 16
@@ -14007,12 +14020,12 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR0
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	cbz	w0, .L2022
-	ldrh	w1, [x21, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR65
-	ldrh	w2, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2023
+	ldrh	w1, [x21, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR66
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
 	lsr	w0, w1, 3
 	add	w1, w0, w1, lsl 1
 	ldr	x0, [x23, 8]
@@ -14023,66 +14036,66 @@ FtlLoadSysInfo:
 	adrp	x0, .LANCHOR192
 	ldr	x0, [x0, #:lo12:.LANCHOR192]
 	bl	ftl_memcpy
-.L2022:
-	ldr	w2, [x19, #:lo12:.LANCHOR135]
+.L2023:
+	ldr	w2, [x19, #:lo12:.LANCHOR80]
 	mov	w1, 19539
 	movk	w1, 0x4654, lsl 16
-	add	x0, x19, :lo12:.LANCHOR135
+	add	x0, x19, :lo12:.LANCHOR80
 	cmp	w2, w1
-	bne	.L2023
+	bne	.L2024
 	add	x20, x20, :lo12:.LANCHOR206
 	ldrh	w1, [x0, 8]
 	ldrb	w2, [x0, 10]
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR44
 	strh	w1, [x20, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR43]
+	ldrh	w0, [x0, #:lo12:.LANCHOR44]
 	cmp	w2, w0
-	bne	.L2023
+	bne	.L2024
 	adrp	x0, .LANCHOR226
-	adrp	x2, .LANCHOR71
-	adrp	x3, .LANCHOR36
+	adrp	x2, .LANCHOR72
+	adrp	x3, .LANCHOR37
 	str	w1, [x0, #:lo12:.LANCHOR226]
-	adrp	x0, .LANCHOR51
-	ldrh	w3, [x3, #:lo12:.LANCHOR36]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	adrp	x0, .LANCHOR52
+	ldrh	w3, [x3, #:lo12:.LANCHOR37]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	mul	w0, w0, w1
-	str	w0, [x2, #:lo12:.LANCHOR71]
-	adrp	x2, .LANCHOR54
-	ldrh	w2, [x2, #:lo12:.LANCHOR54]
+	str	w0, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR55
+	ldrh	w2, [x2, #:lo12:.LANCHOR55]
 	mul	w0, w2, w0
-	adrp	x2, .LANCHOR67
-	str	w0, [x2, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR40
-	ldr	w2, [x0, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR73+6
-	ldrh	w0, [x0, #:lo12:.LANCHOR73+6]
+	adrp	x2, .LANCHOR68
+	str	w0, [x2, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR41
+	ldr	w2, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
 	cmp	w1, w2
 	sub	w0, w2, w0
 	sub	w0, w0, w1
 	udiv	w0, w0, w3
 	adrp	x3, .LANCHOR227
 	strh	w0, [x3, #:lo12:.LANCHOR227]
-	bls	.L2024
-	mov	w2, 1539
+	bls	.L2025
+	mov	w2, 1572
 	adrp	x1, .LANCHOR225
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR225
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR225
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2024:
-	add	x1, x19, :lo12:.LANCHOR135
-	adrp	x0, .LANCHOR90
-	add	x3, x0, :lo12:.LANCHOR90
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2025:
+	add	x1, x19, :lo12:.LANCHOR80
+	adrp	x0, .LANCHOR91
+	add	x3, x0, :lo12:.LANCHOR91
 	adrp	x5, .LANCHOR201
 	mov	x22, x5
 	ldrh	w2, [x1, 16]
 	ldrh	w7, [x1, 14]
-	strh	w7, [x0, #:lo12:.LANCHOR90]
+	strh	w7, [x0, #:lo12:.LANCHOR91]
 	lsr	w4, w2, 6
 	and	w2, w2, 63
 	strb	w2, [x3, 6]
@@ -14095,10 +14108,10 @@ FtlLoadSysInfo:
 	strh	wzr, [x2, 2]
 	strb	wzr, [x2, 6]
 	strb	wzr, [x2, 8]
-	adrp	x2, .LANCHOR91
+	adrp	x2, .LANCHOR92
 	ldrh	w3, [x1, 18]
-	add	x4, x2, :lo12:.LANCHOR91
-	strh	w3, [x2, #:lo12:.LANCHOR91]
+	add	x4, x2, :lo12:.LANCHOR92
+	strh	w3, [x2, #:lo12:.LANCHOR92]
 	mov	x20, x2
 	ldrh	w3, [x1, 20]
 	lsr	w6, w3, 6
@@ -14107,10 +14120,10 @@ FtlLoadSysInfo:
 	ldrb	w3, [x1, 12]
 	strh	w6, [x4, 2]
 	strb	w3, [x4, 8]
-	adrp	x4, .LANCHOR92
+	adrp	x4, .LANCHOR93
 	ldrh	w3, [x1, 22]
-	add	x6, x4, :lo12:.LANCHOR92
-	strh	w3, [x4, #:lo12:.LANCHOR92]
+	add	x6, x4, :lo12:.LANCHOR93
+	strh	w3, [x4, #:lo12:.LANCHOR93]
 	mov	x21, x4
 	ldrh	w3, [x1, 24]
 	lsr	w8, w3, 6
@@ -14118,93 +14131,93 @@ FtlLoadSysInfo:
 	strb	w3, [x6, 6]
 	ldrb	w3, [x1, 13]
 	strb	w3, [x6, 8]
-	adrp	x3, .LANCHOR159
+	adrp	x3, .LANCHOR158
 	strh	w8, [x6, 2]
 	ldr	w6, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR158]
+	adrp	x3, .LANCHOR159
 	str	wzr, [x3, #:lo12:.LANCHOR159]
-	adrp	x3, .LANCHOR160
-	str	wzr, [x3, #:lo12:.LANCHOR160]
-	adrp	x3, .LANCHOR164
-	str	wzr, [x3, #:lo12:.LANCHOR164]
 	adrp	x3, .LANCHOR163
 	str	wzr, [x3, #:lo12:.LANCHOR163]
+	adrp	x3, .LANCHOR162
+	str	wzr, [x3, #:lo12:.LANCHOR162]
+	adrp	x3, .LANCHOR164
+	str	w6, [x3, #:lo12:.LANCHOR164]
 	adrp	x3, .LANCHOR165
-	str	w6, [x3, #:lo12:.LANCHOR165]
+	str	wzr, [x3, #:lo12:.LANCHOR165]
 	adrp	x3, .LANCHOR166
 	str	wzr, [x3, #:lo12:.LANCHOR166]
-	adrp	x3, .LANCHOR167
-	str	wzr, [x3, #:lo12:.LANCHOR167]
-	adrp	x3, .LANCHOR162
-	str	wzr, [x3, #:lo12:.LANCHOR162]
+	adrp	x3, .LANCHOR161
+	str	wzr, [x3, #:lo12:.LANCHOR161]
 	ldr	w3, [x1, 40]
-	adrp	x1, .LANCHOR157
-	ldr	w6, [x1, #:lo12:.LANCHOR157]
+	adrp	x1, .LANCHOR156
+	ldr	w6, [x1, #:lo12:.LANCHOR156]
 	cmp	w3, w6
-	bls	.L2025
-	str	w3, [x1, #:lo12:.LANCHOR157]
-.L2025:
-	add	x19, x19, :lo12:.LANCHOR135
-	adrp	x1, .LANCHOR158
-	ldr	w3, [x1, #:lo12:.LANCHOR158]
-	ldr	w2, [x19, 36]
-	cmp	w2, w3
 	bls	.L2026
-	str	w2, [x1, #:lo12:.LANCHOR158]
+	str	w3, [x1, #:lo12:.LANCHOR156]
 .L2026:
-	mov	w1, 65535
-	cmp	w7, w1
-	beq	.L2027
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	make_superblock
+	add	x19, x19, :lo12:.LANCHOR80
+	adrp	x1, .LANCHOR157
+	ldr	w3, [x1, #:lo12:.LANCHOR157]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L2027
+	str	w2, [x1, #:lo12:.LANCHOR157]
 .L2027:
-	ldrh	w2, [x20, #:lo12:.LANCHOR91]
 	mov	w1, 65535
-	add	x0, x20, :lo12:.LANCHOR91
-	cmp	w2, w1
+	cmp	w7, w1
 	beq	.L2028
+	add	x0, x0, :lo12:.LANCHOR91
 	bl	make_superblock
 .L2028:
-	ldrh	w2, [x21, #:lo12:.LANCHOR92]
+	ldrh	w2, [x20, #:lo12:.LANCHOR92]
 	mov	w1, 65535
-	add	x0, x21, :lo12:.LANCHOR92
+	add	x0, x20, :lo12:.LANCHOR92
 	cmp	w2, w1
 	beq	.L2029
 	bl	make_superblock
 .L2029:
-	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+	ldrh	w2, [x21, #:lo12:.LANCHOR93]
 	mov	w1, 65535
-	add	x0, x22, :lo12:.LANCHOR201
+	add	x0, x21, :lo12:.LANCHOR93
 	cmp	w2, w1
 	beq	.L2030
 	bl	make_superblock
 .L2030:
+	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR201
+	cmp	w2, w1
+	beq	.L2031
+	bl	make_superblock
+.L2031:
 	mov	w0, 0
-	b	.L2013
-.L2019:
+	b	.L2014
+.L2020:
 	ldrh	w0, [x20, #:lo12:.LANCHOR206]
 	mov	w2, 1
 	mov	w1, w2
 	orr	w0, w22, w0, lsl 10
 	str	w0, [x19, 4]
-	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	str	x0, [x19, 8]
 	mov	x0, x19
 	bl	FlashReadPages
 	ldr	w0, [x19]
 	cmn	w0, #1
-	beq	.L2017
-	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	beq	.L2018
+	ldr	x0, [x26, #:lo12:.LANCHOR180]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2017
+	bne	.L2018
 	ldr	x0, [x25, #:lo12:.LANCHOR185]
 	ldrh	w0, [x0]
 	cmp	w0, w28
-	beq	.L2018
-.L2017:
+	beq	.L2019
+.L2018:
 	sub	w22, w22, #1
 	sxth	w22, w22
-	b	.L2016
+	b	.L2017
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlMapTblRecovery,"ax",@progbits
 	.align	2
@@ -14217,7 +14230,7 @@ FtlMapTblRecovery:
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR79
+	adrp	x21, .LANCHOR180
 	stp	x23, x24, [sp, 48]
 	adrp	x20, .LANCHOR199
 	ldrh	w23, [x0, 6]
@@ -14229,7 +14242,7 @@ FtlMapTblRecovery:
 	str	x0, [x29, 136]
 	ldrh	w0, [x19, 8]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR52
+	adrp	x25, .LANCHOR53
 	stp	x27, x28, [sp, 80]
 	mov	w26, 0
 	str	w0, [x29, 144]
@@ -14237,7 +14250,7 @@ FtlMapTblRecovery:
 	bl	ftl_memset
 	stp	wzr, wzr, [x19, 48]
 	add	x3, x20, :lo12:.LANCHOR199
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	mov	w1, -1
 	mov	x24, x3
 	str	x0, [x3, 8]
@@ -14251,17 +14264,17 @@ FtlMapTblRecovery:
 	strh	w1, [x19, 2]
 	mov	w1, 1
 	str	w0, [x29, 120]
-	add	x0, x25, :lo12:.LANCHOR52
+	add	x0, x25, :lo12:.LANCHOR53
 	str	w1, [x19, 56]
 	str	x0, [x29, 112]
-.L2040:
+.L2041:
 	ldr	w0, [x29, 144]
 	cmp	w26, w0
-	bge	.L2058
+	bge	.L2059
 	ldr	w0, [x29, 120]
 	sxtw	x28, w26
 	cmp	w26, w0
-	bne	.L2041
+	bne	.L2042
 	ldr	x2, [x29, 152]
 	lsl	x0, x28, 1
 	ldr	x1, [x29, 152]
@@ -14278,41 +14291,41 @@ FtlMapTblRecovery:
 	add	x26, x20, :lo12:.LANCHOR199
 	ldr	w0, [x0, x28, lsl 2]
 	str	w0, [x19, 48]
-.L2042:
+.L2043:
 	cmp	w25, w3
-	ble	.L2045
-.L2058:
+	ble	.L2046
+.L2059:
 	adrp	x23, .LANCHOR124
 	str	x23, [x29, 136]
 	add	x0, x23, :lo12:.LANCHOR124
 	cmp	x19, x0
-	bne	.L2047
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	cbz	w0, .L2047
-	adrp	x26, .LANCHOR125
-	add	x27, x26, :lo12:.LANCHOR125
-	adrp	x24, .LANCHOR65
+	bne	.L2048
+	adrp	x0, .LANCHOR69
+	ldrh	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2048
+	adrp	x25, .LANCHOR125
+	add	x26, x25, :lo12:.LANCHOR125
+	adrp	x28, .LANCHOR66
 	mov	w22, 0
-	add	x0, x24, :lo12:.LANCHOR65
-	adrp	x25, .LANCHOR192
+	add	x0, x28, :lo12:.LANCHOR66
+	adrp	x24, .LANCHOR192
 	str	x0, [x29, 144]
-.L2061:
+.L2062:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0]
 	cmp	w22, w0
-	bcc	.L2067
-.L2047:
+	bcc	.L2070
+.L2048:
 	mov	x0, x19
 	bl	ftl_free_no_use_map_blk
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR53
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w1, w0
-	bne	.L2060
+	bne	.L2061
 	mov	x0, x19
 	bl	ftl_map_blk_alloc_new_blk
-.L2060:
+.L2061:
 	mov	x0, x19
 	bl	ftl_map_blk_gc
 	mov	x0, x19
@@ -14325,7 +14338,7 @@ FtlMapTblRecovery:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2045:
+.L2046:
 	ldrh	w0, [x24]
 	mov	w2, 1
 	str	w3, [x29, 144]
@@ -14337,34 +14350,34 @@ FtlMapTblRecovery:
 	ldr	w0, [x26]
 	ldr	w3, [x29, 144]
 	cmn	w0, #1
-	beq	.L2043
+	beq	.L2044
 	ldrh	w0, [x27, 8]
 	cmp	w23, w0
-	bls	.L2044
+	bls	.L2045
 	ldrh	w2, [x27]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2044
+	bne	.L2045
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x26, 4]
 	str	w1, [x22, x0]
-.L2044:
+.L2045:
 	add	w25, w25, 1
 	sxth	w25, w25
-	b	.L2042
-.L2043:
+	b	.L2043
+.L2044:
 	ldrh	w0, [x24]
 	strh	w0, [x19, 60]
-	b	.L2044
-.L2041:
+	b	.L2045
+.L2042:
 	ldr	x1, [x29, 152]
 	mov	w2, 1
-	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	ldr	x0, [x21, #:lo12:.LANCHOR180]
 	str	x0, [x24, 8]
 	lsl	x0, x28, 1
 	add	x28, x1, x0
 	ldrh	w0, [x1, x0]
-	ldrh	w1, [x25, #:lo12:.LANCHOR52]
+	ldrh	w1, [x25, #:lo12:.LANCHOR53]
 	sub	w1, w1, #1
 	orr	w0, w1, w0, lsl 10
 	mov	w1, w2
@@ -14373,22 +14386,22 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x24]
 	cmn	w0, #1
-	beq	.L2069
+	beq	.L2072
 	ldrh	w1, [x27]
 	ldrh	w0, [x19, 4]
 	cmp	w1, w0
-	bne	.L2069
+	bne	.L2072
 	ldrh	w1, [x27, 8]
 	mov	w0, 64245
 	cmp	w1, w0
-	beq	.L2049
-.L2069:
+	beq	.L2050
+.L2072:
 	mov	w6, 0
-.L2050:
+.L2051:
 	ldr	x0, [x29, 112]
 	ldrh	w0, [x0]
 	cmp	w6, w0
-	bge	.L2056
+	bge	.L2057
 	ldrh	w0, [x28]
 	mov	w2, 1
 	str	w6, [x29, 108]
@@ -14400,62 +14413,64 @@ FtlMapTblRecovery:
 	ldr	w0, [x24]
 	ldr	w6, [x29, 108]
 	cmn	w0, #1
-	beq	.L2054
+	beq	.L2055
 	ldrh	w0, [x27, 8]
 	cmp	w23, w0
-	bls	.L2054
+	bls	.L2055
 	ldrh	w2, [x27]
 	ldrh	w1, [x19, 4]
 	cmp	w2, w1
-	bne	.L2054
+	bne	.L2055
 	ubfiz	x0, x0, 2, 16
 	ldr	w1, [x24, 4]
 	str	w1, [x22, x0]
-.L2054:
+.L2055:
 	add	w6, w6, 1
 	sxth	w6, w6
-	b	.L2050
-.L2049:
-	ldrh	w6, [x25, #:lo12:.LANCHOR52]
+	b	.L2051
+.L2050:
+	ldrh	w6, [x25, #:lo12:.LANCHOR53]
 	mov	w0, 0
-	ldr	x10, [x21, #:lo12:.LANCHOR79]
+	ldr	x10, [x21, #:lo12:.LANCHOR180]
 	sub	w6, w6, #1
-.L2051:
+.L2052:
 	cmp	w0, w6
-	blt	.L2053
-.L2056:
+	blt	.L2054
+.L2057:
 	add	w4, w26, 1
 	sxth	w26, w4
-	b	.L2040
-.L2053:
+	b	.L2041
+.L2054:
 	lsl	w2, w0, 1
 	sxtw	x2, w2
 	lsl	x1, x2, 2
 	ldrh	w1, [x10, x1]
 	cmp	w23, w1
-	bls	.L2052
+	bls	.L2053
 	add	x2, x2, 1
 	ubfiz	x1, x1, 2, 16
 	ldr	w2, [x10, x2, lsl 2]
 	str	w2, [x22, x1]
-.L2052:
+.L2053:
 	add	w0, w0, 1
 	sxth	w0, w0
-	b	.L2051
-.L2067:
-	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	b	.L2052
+.L2070:
+	ldr	x0, [x24, #:lo12:.LANCHOR192]
 	ubfiz	x28, x22, 2, 32
 	ldr	w0, [x0, x28]
 	sub	w1, w0, #1
 	cmn	w1, #3
-	bhi	.L2063
-	adrp	x24, .LANCHOR128
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	bhi	.L2064
+	adrp	x8, .LANCHOR128
+	str	x8, [x29, 112]
+	mov	x27, x8
+	ldr	x1, [x8, #:lo12:.LANCHOR128]
 	ldr	w1, [x1, x28]
 	cmp	w0, w1
-	beq	.L2063
+	beq	.L2064
 	add	x4, x20, :lo12:.LANCHOR199
-	ldr	x1, [x21, #:lo12:.LANCHOR79]
+	ldr	x1, [x21, #:lo12:.LANCHOR180]
 	mov	w2, 1
 	str	x4, [x29, 120]
 	str	x1, [x4, 8]
@@ -14468,67 +14483,73 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	w0, [x20, #:lo12:.LANCHOR199]
 	cmn	w0, #1
-	beq	.L2063
+	beq	.L2064
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x23]
 	add	x0, x0, :lo12:.LANCHOR124
-	ldr	x4, [x29, 120]
+	ldp	x8, x4, [x29, 112]
 	ldrh	w0, [x0, 4]
 	cmp	w1, w0
-	bne	.L2063
-	ldr	x0, [x24, #:lo12:.LANCHOR128]
-	mov	w2, 1
+	bne	.L2064
+	ldr	x0, [x8, #:lo12:.LANCHOR128]
 	ldr	w3, [x23, 4]
-	mov	w1, w2
-	str	w3, [x29, 120]
+	ldr	w1, [x0, x28]
+	str	w1, [x4, 4]
 	ldr	w0, [x0, x28]
-	str	w0, [x4, 4]
-	mov	x0, x4
-	bl	FlashReadPages
+	cbnz	w0, .L2066
+	str	wzr, [x23, 4]
+.L2067:
 	ldr	w4, [x23, 4]
-	ldr	w3, [x29, 120]
 	cmp	w3, w4
-	bls	.L2063
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
-	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	bls	.L2064
+	ldr	x1, [x27, #:lo12:.LANCHOR128]
+	ldr	x0, [x24, #:lo12:.LANCHOR192]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, x28]
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	bl	printf
-	ldr	x0, [x25, #:lo12:.LANCHOR192]
-	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	x0, [x24, #:lo12:.LANCHOR192]
+	ldr	x1, [x27, #:lo12:.LANCHOR128]
 	ldr	w2, [x0, x28]
 	str	w2, [x1, x28]
 	mov	w1, 0
-	ldrh	w2, [x26, #:lo12:.LANCHOR125]
+	ldrh	w2, [x25, #:lo12:.LANCHOR125]
 	ldr	w0, [x0, x28]
 	ubfx	x0, x0, 10, 16
-.L2065:
+.L2068:
 	cmp	w1, w2
-	blt	.L2066
-	adrp	x1, .LANCHOR63
-	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	blt	.L2069
+	adrp	x1, .LANCHOR64
+	ldr	w1, [x1, #:lo12:.LANCHOR64]
 	cmp	w2, w1
-	bcs	.L2063
+	bcs	.L2064
 	ldr	x1, [x29, 152]
 	ubfiz	x2, x2, 1, 16
 	strh	w0, [x1, x2]
-	ldrh	w1, [x27]
+	ldrh	w1, [x26]
 	add	w1, w1, 1
-	strh	w1, [x27]
+	strh	w1, [x26]
 	bl	remove_from_free_sys_Queue
-.L2063:
+.L2064:
 	add	w22, w22, 1
-	b	.L2061
+	b	.L2062
 .L2066:
+	mov	w2, 1
+	str	w3, [x29, 120]
+	mov	w1, w2
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	w3, [x29, 120]
+	b	.L2067
+.L2069:
 	ldr	x3, [x29, 152]
 	ldrh	w3, [x3, w1, sxtw 1]
 	cmp	w3, w0
-	beq	.L2063
+	beq	.L2064
 	add	w1, w1, 1
 	sxth	w1, w1
-	b	.L2065
+	b	.L2068
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",@progbits
 	.align	2
@@ -14536,22 +14557,22 @@ FtlMapTblRecovery:
 	.type	FtlLoadVonderInfo, %function
 FtlLoadVonderInfo:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR60
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	add	x29, sp, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR60]
+	ldrh	w1, [x1, #:lo12:.LANCHOR61]
 	strh	w1, [x0, 10]
 	mov	w1, -3962
 	strh	w1, [x0, 4]
-	adrp	x1, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR69]
+	adrp	x1, .LANCHOR70
+	ldrh	w1, [x1, #:lo12:.LANCHOR70]
 	strh	w1, [x0, 8]
-	adrp	x1, .LANCHOR61
-	ldrh	w1, [x1, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR62
+	ldrh	w1, [x1, #:lo12:.LANCHOR62]
 	strh	w1, [x0, 6]
-	adrp	x1, .LANCHOR70
-	ldr	x1, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR71
+	ldr	x1, [x1, #:lo12:.LANCHOR71]
 	str	x1, [x0, 16]
 	adrp	x1, .LANCHOR190
 	ldr	x1, [x1, #:lo12:.LANCHOR190]
@@ -14600,19 +14621,19 @@ FtlRecoverySuperblock:
 	stp	x25, x26, [sp, 64]
 	cmp	w0, w1
 	stp	x27, x28, [sp, 80]
-	beq	.L2243
+	beq	.L2246
 	ldrb	w0, [x19, 6]
 	str	w0, [x29, 180]
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	ldrh	w26, [x19, 2]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR51]
+	ldrh	w2, [x0, #:lo12:.LANCHOR52]
 	cmp	w2, w26
-	bne	.L2087
+	bne	.L2090
 	strh	wzr, [x19, 4]
-.L2250:
+.L2253:
 	strb	wzr, [x19, 6]
-.L2243:
+.L2246:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14621,163 +14642,163 @@ FtlRecoverySuperblock:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 208
 	ret
-.L2087:
+.L2090:
 	ldrh	w0, [x19, 16]
 	mov	w21, 0
-.L2088:
+.L2091:
 	cmp	w0, w1
-	beq	.L2089
+	beq	.L2092
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2090
+	bne	.L2093
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2091
+	beq	.L2094
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2168
+	cbnz	w0, .L2171
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w23, [x0, w20, sxtw 1]
-.L2092:
+.L2095:
 	adrp	x1, .LANCHOR105
-	adrp	x2, .LANCHOR36
-	adrp	x22, .LANCHOR178
+	adrp	x2, .LANCHOR37
+	adrp	x22, .LANCHOR177
 	add	x4, x19, 16
 	ldr	x6, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR57
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR58
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w27, 0
-	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	ldrh	w7, [x1, #:lo12:.LANCHOR58]
 	add	x1, x19, 16
 	str	x1, [x29, 184]
 	mov	w8, 65535
-	ldrh	w1, [x2, #:lo12:.LANCHOR36]
+	ldrh	w1, [x2, #:lo12:.LANCHOR37]
 	mov	w10, 56
 	str	x2, [x29, 160]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-.L2093:
+.L2096:
 	cmp	x1, x4
-	bne	.L2097
+	bne	.L2100
 	ldrb	w1, [x19, 8]
 	cmp	w1, 1
-	bne	.L2169
+	bne	.L2172
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
 	cmp	w1, 0
 	cset	w1, ne
 	str	w1, [x29, 176]
-.L2098:
+.L2101:
 	ldr	w2, [x29, 176]
 	mov	w1, w27
-	adrp	x24, .LC43
+	adrp	x24, .LC46
 	adrp	x25, .LANCHOR229
-	add	x24, x24, :lo12:.LC43
+	add	x24, x24, :lo12:.LC46
 	add	x25, x25, :lo12:.LANCHOR229
 	mov	x28, 0
 	bl	FlashReadPages
-	adrp	x0, .LANCHOR158
+	adrp	x0, .LANCHOR157
 	mov	w5, 65535
 	str	x0, [x29, 168]
-	ldr	w21, [x0, #:lo12:.LANCHOR158]
+	ldr	w21, [x0, #:lo12:.LANCHOR157]
 	sub	w21, w21, #1
-.L2099:
+.L2102:
 	and	w0, w28, 65535
 	cmp	w27, w0
-	bhi	.L2104
-	bne	.L2102
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	bhi	.L2107
+	bne	.L2105
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	add	w20, w20, 1
 	and	w20, w20, 65535
 	ldr	w0, [x0, 4]
-.L2245:
+.L2248:
 	lsr	w0, w0, 10
 	bl	P2V_plane
 	ldrb	w1, [x19, 8]
 	and	w27, w0, 65535
 	cmp	w1, 1
-	bne	.L2106
+	bne	.L2109
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2106
+	cbnz	w0, .L2109
 	adrp	x0, .LANCHOR16
 	add	x0, x0, :lo12:.LANCHOR16
 	ldrh	w20, [x0, w20, sxtw 1]
-.L2106:
+.L2109:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w20
-	bne	.L2107
+	bne	.L2110
 	strh	w20, [x19, 2]
 	strb	wzr, [x19, 6]
 	strh	wzr, [x19, 4]
-.L2107:
+.L2110:
 	ldr	w0, [x29, 180]
 	cmp	w20, w26
 	cset	w2, eq
 	cmp	w27, w0
 	cset	w0, eq
 	tst	w2, w0
-	beq	.L2108
-.L2251:
+	beq	.L2111
+.L2254:
 	mov	w2, w27
 	mov	w1, w20
 	mov	x0, x19
 	bl	ftl_sb_update_avl_pages
-	b	.L2243
-.L2089:
+	b	.L2246
+.L2092:
 	add	w21, w21, 1
 	and	w21, w21, 65535
 	add	x0, x19, x21, sxtw 1
 	ldrh	w0, [x0, 16]
-	b	.L2088
-.L2090:
+	b	.L2091
+.L2093:
 	mov	w1, 0
 	bl	FtlGetLastWrittenPage
 	mov	w20, w0
 	cmn	w0, #1
-	beq	.L2091
-.L2168:
+	beq	.L2094
+.L2171:
 	mov	w23, w20
-	b	.L2092
-.L2091:
-	cbz	w26, .L2094
-	mov	w2, 1896
-	adrp	x1, .LANCHOR228
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
+	b	.L2095
+.L2094:
+	cbz	w26, .L2097
+	mov	w2, 1933
+	adrp	x1, .LANCHOR228
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2094:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2097:
 	ldr	w0, [x29, 180]
 	cmp	w0, 0
 	ccmp	w21, w0, 4, ne
-	beq	.L2095
-	mov	w2, 1897
+	beq	.L2098
+	mov	w2, 1934
 	adrp	x1, .LANCHOR228
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR228
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2095:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2098:
 	strh	wzr, [x19, 2]
-	b	.L2250
-.L2097:
+	b	.L2253
+.L2100:
 	ldrh	w2, [x4]
 	cmp	w2, w8
-	beq	.L2096
+	beq	.L2099
 	umaddl	x5, w27, w10, x0
 	orr	w2, w23, w2, lsl 10
 	add	w3, w27, 1
@@ -14788,107 +14809,107 @@ FtlRecoverySuperblock:
 	asr	w2, w2, 2
 	add	x2, x6, x2, sxtw 2
 	str	x2, [x5, 16]
-.L2096:
+.L2099:
 	add	x4, x4, 2
-	b	.L2093
-.L2169:
+	b	.L2096
+.L2172:
 	str	wzr, [x29, 176]
-	b	.L2098
-.L2104:
+	b	.L2101
+.L2107:
 	mov	x0, 56
-	ldr	x2, [x22, #:lo12:.LANCHOR178]
+	ldr	x2, [x22, #:lo12:.LANCHOR177]
 	mul	x0, x28, x0
 	add	x1, x2, x0
 	ldr	w0, [x2, x0]
-	cbnz	w0, .L2100
+	cbnz	w0, .L2103
 	ldr	x6, [x1, 16]
 	ldr	w4, [x6, 4]
 	cmn	w4, #1
-	beq	.L2101
+	beq	.L2104
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	ldr	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, w4
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2101
+	cbz	w0, .L2104
 	ldr	x0, [x29, 168]
 	add	w4, w4, 1
-	str	w4, [x0, #:lo12:.LANCHOR158]
-.L2101:
+	str	w4, [x0, #:lo12:.LANCHOR157]
+.L2104:
 	ldr	w0, [x6]
 	cmn	w0, #1
-	bne	.L2103
-.L2102:
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	bne	.L2106
+.L2105:
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	and	x28, x28, 65535
 	mov	x1, 56
 	and	w20, w20, 65535
 	madd	x28, x28, x1, x0
 	ldr	w0, [x28, 4]
-	b	.L2245
-.L2100:
+	b	.L2248
+.L2103:
 	ldr	w1, [x1, 4]
 	mov	x0, x24
 	bl	printf
 	ldrh	w0, [x19]
 	and	w5, w23, 65535
 	strh	w0, [x25]
-.L2103:
+.L2106:
 	add	x28, x28, 1
-	b	.L2099
-.L2108:
+	b	.L2102
+.L2111:
 	mov	w0, 65535
 	cmp	w5, w0
-	bne	.L2109
-	cbnz	w1, .L2110
-.L2109:
+	bne	.L2112
+	cbnz	w1, .L2113
+.L2112:
 	adrp	x24, .LANCHOR133
 	and	w6, w23, 65535
 	ldr	w0, [x24, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L2111
+	bne	.L2114
 	str	w21, [x24, #:lo12:.LANCHOR133]
-.L2111:
+.L2114:
 	add	w0, w26, 7
 	ldr	w7, [x24, #:lo12:.LANCHOR133]
 	cmp	w0, w23, uxth
-	bge	.L2170
+	bge	.L2173
 	sub	w23, w6, #7
 	and	w23, w23, 65535
-.L2112:
+.L2115:
 	mov	w3, -1
 	adrp	x5, .LANCHOR117
 	mov	w28, w3
 	add	x5, x5, :lo12:.LANCHOR117
 	mov	w4, 65535
-.L2113:
+.L2116:
 	cmp	w23, w6
-	bhi	.L2128
+	bhi	.L2131
 	ldr	x1, [x29, 160]
 	mov	w25, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w10, 56
 	ldr	x2, [x29, 184]
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	add	x1, x1, 8
 	add	x1, x19, x1, lsl 1
-	b	.L2129
-.L2170:
+	b	.L2132
+.L2173:
 	mov	w23, w26
-	b	.L2112
-.L2115:
+	b	.L2115
+.L2118:
 	ldrh	w8, [x2]
 	cmp	w8, w4
-	beq	.L2114
+	beq	.L2117
 	umaddl	x11, w25, w10, x0
 	add	w25, w25, 1
 	and	w25, w25, 65535
 	orr	w8, w23, w8, lsl 10
 	str	w8, [x11, 4]
-.L2114:
+.L2117:
 	add	x2, x2, 2
-.L2129:
+.L2132:
 	cmp	x2, x1
-	bne	.L2115
+	bne	.L2118
 	ldr	w2, [x29, 176]
 	mov	w1, w25
 	str	x5, [x29, 112]
@@ -14903,7 +14924,7 @@ FtlRecoverySuperblock:
 	sxtw	x12, w23
 	ldrb	w10, [x1, #:lo12:.LANCHOR8]
 	mov	w11, 1
-	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	ldr	x1, [x22, #:lo12:.LANCHOR177]
 	ldr	w4, [x29, 120]
 	ldr	w7, [x29, 128]
 	ldr	w6, [x29, 136]
@@ -14912,59 +14933,59 @@ FtlRecoverySuperblock:
 	umaddl	x25, w25, w2, x1
 	ldr	x5, [x29, 112]
 	mov	w2, 0
-.L2116:
+.L2119:
 	cmp	x25, x1
-	bne	.L2126
-	cbz	w2, .L2127
+	bne	.L2129
+	cbz	w2, .L2130
 	str	w0, [x24, #:lo12:.LANCHOR133]
-.L2127:
+.L2130:
 	add	w23, w23, 1
 	and	w23, w23, 65535
-	b	.L2113
-.L2126:
+	b	.L2116
+.L2129:
 	ldr	w8, [x1]
-	cbnz	w8, .L2117
+	cbnz	w8, .L2120
 	ldr	x8, [x1, 16]
 	ldrh	w13, [x8]
 	cmp	w13, w4
-	beq	.L2172
+	beq	.L2175
 	ldr	w8, [x8, 4]
 	cmn	w8, #1
-	beq	.L2172
+	beq	.L2175
 	cmn	w3, #1
-	bne	.L2174
+	bne	.L2177
 	ldrh	w2, [x5, x12, lsl 1]
 	cmp	w2, w4
-	bne	.L2119
-	cbz	w10, .L2174
-.L2119:
+	bne	.L2122
+	cbz	w10, .L2177
+.L2122:
 	cmp	w21, w0
 	mov	w2, w11
 	csel	w3, w3, w0, eq
-.L2118:
+.L2121:
 	mov	w28, w0
 	add	x1, x1, 56
 	mov	w0, w8
-	b	.L2116
-.L2117:
-	cbz	w2, .L2120
-	str	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L2119
 .L2120:
+	cbz	w2, .L2123
+	str	w0, [x24, #:lo12:.LANCHOR133]
+.L2123:
 	adrp	x0, .LANCHOR229
 	ldrh	w1, [x19]
 	strh	w1, [x0, #:lo12:.LANCHOR229]
 	ldrb	w0, [x19, 8]
-	cbnz	w0, .L2110
+	cbnz	w0, .L2113
 	adrp	x0, .LANCHOR117
 	add	x0, x0, :lo12:.LANCHOR117
 	ldrh	w1, [x0, w23, sxtw 1]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2122
+	bne	.L2125
 	cmn	w3, #1
-	beq	.L2123
+	beq	.L2126
 	str	w3, [x24, #:lo12:.LANCHOR133]
-.L2110:
+.L2113:
 	mov	w1, 1
 	adrp	x0, .LANCHOR230
 	mov	w23, w26
@@ -14975,21 +14996,21 @@ FtlRecoverySuperblock:
 	bl	FtlMapBlkWriteDumpData
 	add	x0, x28, :lo12:.LANCHOR133
 	str	x0, [x29, 112]
-.L2130:
+.L2133:
 	ldr	x2, [x29, 160]
 	adrp	x1, .LANCHOR8
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w24, 0
 	ldrb	w5, [x1, #:lo12:.LANCHOR8]
 	mov	w6, 65535
 	ldr	x3, [x29, 184]
-	ldrh	w2, [x2, #:lo12:.LANCHOR36]
+	ldrh	w2, [x2, #:lo12:.LANCHOR37]
 	str	x1, [x29, 128]
 	add	x2, x2, 8
 	add	x2, x19, x2, lsl 1
-.L2131:
+.L2134:
 	cmp	x2, x3
-	bne	.L2134
+	bne	.L2137
 	ldr	w2, [x29, 176]
 	mov	w1, w24
 	mov	x25, 0
@@ -15000,101 +15021,101 @@ FtlRecoverySuperblock:
 	adrp	x0, .LANCHOR229
 	add	x0, x0, :lo12:.LANCHOR229
 	str	x0, [x29, 120]
-.L2135:
+.L2138:
 	ldr	x0, [x29, 136]
 	cmp	x25, x0
-	bne	.L2161
+	bne	.L2164
 	ldrb	w0, [x19, 8]
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	cmp	w0, 1
-	bne	.L2162
+	bne	.L2165
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2162
-	adrp	x0, .LANCHOR52
-	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cbz	w0, .L2165
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
 	cmp	w0, w23
-	bne	.L2162
+	bne	.L2165
 	cmp	w20, w23
-	beq	.L2137
-.L2162:
+	beq	.L2140
+.L2165:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w23
-	bne	.L2130
+	bne	.L2133
 	ldr	x0, [x29, 160]
 	mov	w2, 65535
 	strh	w23, [x19, 2]
 	strh	wzr, [x19, 4]
-	ldrh	w1, [x0, #:lo12:.LANCHOR36]
+	ldrh	w1, [x0, #:lo12:.LANCHOR37]
 	mov	w0, 0
-.L2163:
+.L2166:
 	cmp	w0, w1
-	beq	.L2243
+	beq	.L2246
 	ldr	x4, [x29, 184]
 	ldrh	w3, [x4], 2
 	str	x4, [x29, 184]
 	cmp	w3, w2
-	beq	.L2164
+	beq	.L2167
 	strb	w0, [x19, 6]
-	b	.L2243
-.L2123:
+	b	.L2246
+.L2126:
 	cmp	w21, w7
-	beq	.L2124
+	beq	.L2127
 	str	w7, [x24, #:lo12:.LANCHOR133]
-	b	.L2110
-.L2124:
+	b	.L2113
+.L2127:
 	ldr	w0, [x24, #:lo12:.LANCHOR133]
-.L2252:
+.L2255:
 	sub	w0, w0, #1
-.L2246:
+.L2249:
 	str	w0, [x24, #:lo12:.LANCHOR133]
-	b	.L2110
-.L2122:
+	b	.L2113
+.L2125:
 	cmp	w28, w21
-	beq	.L2125
+	beq	.L2128
 	cmn	w28, #1
-	beq	.L2110
+	beq	.L2113
 	str	w28, [x24, #:lo12:.LANCHOR133]
-	b	.L2110
-.L2125:
+	b	.L2113
+.L2128:
 	ldr	w0, [x24, #:lo12:.LANCHOR133]
 	cmp	w21, w0
-	bne	.L2252
-	b	.L2110
-.L2172:
+	bne	.L2255
+	b	.L2113
+.L2175:
 	mov	w8, w0
 	mov	w0, w28
-	b	.L2118
-.L2174:
+	b	.L2121
+.L2177:
 	mov	w2, 1
-	b	.L2118
-.L2128:
+	b	.L2121
+.L2131:
 	mov	w0, -1
-	b	.L2246
-.L2134:
+	b	.L2249
+.L2137:
 	ldrh	w1, [x3]
 	cmp	w1, w6
-	beq	.L2132
+	beq	.L2135
 	mov	w4, 56
 	orr	w1, w23, w1, lsl 10
 	umaddl	x4, w24, w4, x0
 	str	w1, [x4, 4]
 	ldrb	w7, [x19, 8]
 	cmp	w7, 1
-	bne	.L2133
-	cbz	w5, .L2133
+	bne	.L2136
+	cbz	w5, .L2136
 	orr	w1, w1, -2147483648
 	str	w1, [x4, 4]
-.L2133:
+.L2136:
 	add	w24, w24, 1
 	and	w24, w24, 65535
-.L2132:
+.L2135:
 	add	x3, x3, 2
-	b	.L2131
-.L2161:
-	ldr	x4, [x22, #:lo12:.LANCHOR178]
+	b	.L2134
+.L2164:
+	ldr	x4, [x22, #:lo12:.LANCHOR177]
 	add	x4, x4, x25
 	ldr	w5, [x4, 4]
 	str	w5, [x29, 204]
@@ -15102,41 +15123,41 @@ FtlRecoverySuperblock:
 	bl	P2V_plane
 	and	w0, w0, 65535
 	cmp	w23, w26
-	bcc	.L2136
+	bcc	.L2139
 	ldr	w1, [x29, 180]
 	ccmp	w1, w0, 0, eq
-	bhi	.L2136
+	bhi	.L2139
 	cmp	w23, w20
 	ccmp	w27, w0, 0, eq
-	beq	.L2137
+	beq	.L2140
 	ldr	w0, [x4]
 	cmn	w0, #1
-	beq	.L2138
+	beq	.L2141
 	ldr	x3, [x4, 16]
 	mov	w0, 61589
 	ldrh	w1, [x3]
 	cmp	w1, w0
-	beq	.L2139
-.L2145:
+	beq	.L2142
+.L2148:
 	ldrh	w0, [x19]
-.L2249:
+.L2252:
 	bl	decrement_vpc_count
-.L2136:
-	add	x25, x25, 56
-	b	.L2135
 .L2139:
+	add	x25, x25, 56
+	b	.L2138
+.L2142:
 	ldr	w21, [x3, 4]
 	cmn	w21, #1
-	beq	.L2140
+	beq	.L2143
 	ldr	x0, [x29, 168]
-	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	ldr	w1, [x0, #:lo12:.LANCHOR157]
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2140
+	cbz	w0, .L2143
 	ldr	x1, [x29, 168]
 	add	w0, w21, 1
-	str	w0, [x1, #:lo12:.LANCHOR158]
-.L2140:
+	str	w0, [x1, #:lo12:.LANCHOR157]
+.L2143:
 	ldp	w24, w0, [x3, 8]
 	add	x1, x29, 200
 	str	w0, [x29, 196]
@@ -15145,14 +15166,14 @@ FtlRecoverySuperblock:
 	bl	log2phys
 	ldr	w1, [x28, #:lo12:.LANCHOR133]
 	cmn	w1, #1
-	beq	.L2141
+	beq	.L2144
 	mov	w0, w21
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2141
+	cbz	w0, .L2144
 	ldr	w1, [x29, 196]
 	cmn	w1, #1
-	beq	.L2142
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	beq	.L2145
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w2, 0
 	add	x0, x0, x25
 	ldr	x3, [x0, 16]
@@ -15160,85 +15181,85 @@ FtlRecoverySuperblock:
 	mov	w1, 1
 	str	x3, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	ldr	x3, [x29, 152]
 	add	x4, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2143
-.L2144:
+	bne	.L2146
+.L2147:
 	mov	w0, -1
 	str	w0, [x29, 196]
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
-.L2152:
+.L2155:
 	ldr	w3, [x29, 196]
 	cmn	w3, #1
-	beq	.L2136
-.L2167:
+	beq	.L2139
+.L2170:
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
 	and	w24, w0, 65535
-	adrp	x0, .LANCHOR38
+	adrp	x0, .LANCHOR39
 	mov	w3, w24
-	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	ldrh	w0, [x0, #:lo12:.LANCHOR39]
 	cmp	w0, w24
-	bhi	.L2157
-	mov	w2, 2179
+	bhi	.L2160
+	mov	w2, 2216
 	adrp	x1, .LANCHOR228
-	adrp	x0, .LC4
+	adrp	x0, .LC6
 	add	x1, x1, :lo12:.LANCHOR228
-	add	x0, x0, :lo12:.LC4
+	add	x0, x0, :lo12:.LC6
 	str	w24, [x29, 152]
 	bl	printf
-	adrp	x1, .LC5
-	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
-	add	x0, x0, :lo12:.LC6
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
 	bl	printf
 	ldr	w3, [x29, 152]
-.L2157:
-	adrp	x1, .LANCHOR82
+.L2160:
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x24, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L2158
+	cbz	w0, .L2161
 	mov	w0, w3
-	b	.L2249
-.L2142:
+	b	.L2252
+.L2145:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	bne	.L2145
+	bne	.L2148
 	mov	w2, 1
 	add	x1, x29, 196
 	mov	w0, w24
 	bl	log2phys
-	b	.L2145
-.L2143:
+	b	.L2148
+.L2146:
 	ldr	w0, [x3, 8]
 	cmp	w24, w0
-	bne	.L2144
+	bne	.L2147
 	ldr	w0, [x3, 4]
 	str	w0, [x29, 152]
 	str	x3, [x29, 104]
 	uxtw	x1, w0
 	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2144
+	cbz	w0, .L2147
 	ldp	w0, w1, [x29, 200]
 	ldr	x3, [x29, 104]
 	cmp	w0, w1
 	ldr	w1, [x29, 196]
-	bne	.L2147
-.L2247:
+	bne	.L2150
+.L2250:
 	mov	w0, w24
 	bl	FtlReUsePrevPpa
-	b	.L2144
-.L2147:
+	b	.L2147
+.L2150:
 	cmp	w0, w1
-	beq	.L2144
+	beq	.L2147
 	cmn	w0, #1
-	beq	.L2148
+	beq	.L2151
 	ldr	x3, [x4, 16]
 	mov	w2, 0
 	str	w0, [x4, 4]
@@ -15247,124 +15268,124 @@ FtlRecoverySuperblock:
 	mov	x0, x4
 	bl	FlashReadPages
 	ldr	x3, [x29, 104]
-.L2149:
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+.L2152:
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	beq	.L2150
+	beq	.L2153
 	ldr	x0, [x29, 112]
 	ldr	w3, [x3, 4]
 	mov	w1, w3
 	ldr	w0, [x0]
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2150
+	cbz	w0, .L2153
 	ldr	w0, [x29, 152]
 	mov	w1, w3
 	bl	ftl_cmp_data_ver
-	cbz	w0, .L2144
-.L2150:
+	cbz	w0, .L2147
+.L2153:
 	ldr	w1, [x29, 196]
-	b	.L2247
-.L2148:
+	b	.L2250
+.L2151:
 	str	w0, [x4]
-	b	.L2149
-.L2141:
+	b	.L2152
+.L2144:
 	ldp	w1, w0, [x29, 200]
 	cmp	w1, w0
-	beq	.L2152
+	beq	.L2155
 	mov	w2, 1
 	add	x1, x29, 204
 	mov	w0, w24
 	bl	log2phys
 	ldr	w3, [x29, 200]
 	cmn	w3, #1
-	beq	.L2152
+	beq	.L2155
 	ldr	w0, [x29, 196]
 	cmp	w3, w0
-	beq	.L2167
+	beq	.L2170
 	lsr	w0, w3, 10
 	bl	P2V_block_in_plane
-	adrp	x1, .LANCHOR90
-	and	w0, w0, 65535
-	ldrh	w1, [x1, #:lo12:.LANCHOR90]
-	cmp	w1, w0
-	beq	.L2156
 	adrp	x1, .LANCHOR91
+	and	w0, w0, 65535
 	ldrh	w1, [x1, #:lo12:.LANCHOR91]
 	cmp	w1, w0
-	beq	.L2156
+	beq	.L2159
 	adrp	x1, .LANCHOR92
 	ldrh	w1, [x1, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2152
-.L2156:
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	beq	.L2159
+	adrp	x1, .LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
+	cmp	w1, w0
+	bne	.L2155
+.L2159:
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w2, 0
 	mov	w1, 1
 	ldr	x4, [x0, 16]
 	str	w3, [x0, 4]
 	str	x4, [x29, 152]
 	bl	FlashReadPages
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2152
+	beq	.L2155
 	ldr	x4, [x29, 152]
 	mov	w0, w21
 	ldr	w1, [x4, 4]
 	bl	ftl_cmp_data_ver
-	cbnz	w0, .L2152
+	cbnz	w0, .L2155
 	mov	w2, 1
 	add	x1, x29, 200
 	mov	w0, w24
 	bl	log2phys
-	b	.L2152
-.L2158:
+	b	.L2155
+.L2161:
 	mov	w1, w24
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
 	bl	printf
-	b	.L2136
-.L2138:
+	b	.L2139
+.L2141:
 	ldr	x1, [x29, 120]
 	mov	w2, w21
 	ldrh	w0, [x19]
 	strh	w0, [x1]
 	mov	w1, w5
-	adrp	x0, .LC45
-	add	x0, x0, :lo12:.LC45
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
 	adrp	x2, .LANCHOR231
 	ldr	w0, [x2, #:lo12:.LANCHOR231]
 	cmp	w0, 31
-	bhi	.L2159
+	bhi	.L2162
 	adrp	x1, .LANCHOR232
 	add	x1, x1, :lo12:.LANCHOR232
 	ldr	w3, [x29, 204]
 	str	w3, [x1, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w0, [x2, #:lo12:.LANCHOR231]
-.L2159:
+.L2162:
 	ldrh	w0, [x19]
 	bl	decrement_vpc_count
 	ldr	w0, [x28, #:lo12:.LANCHOR133]
 	cmn	w0, #1
-	bne	.L2160
-.L2248:
+	bne	.L2163
+.L2251:
 	str	w21, [x28, #:lo12:.LANCHOR133]
-	b	.L2136
-.L2160:
+	b	.L2139
+.L2163:
 	cmp	w21, w0
-	bcs	.L2136
-	b	.L2248
-.L2164:
+	bcs	.L2139
+	b	.L2251
+.L2167:
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	b	.L2163
-.L2137:
+	b	.L2166
+.L2140:
 	strb	w27, [x19, 6]
 	strh	w20, [x19, 2]
-	b	.L2251
+	b	.L2254
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlGcScanTempBlk,"ax",@progbits
 	.align	2
@@ -15383,65 +15404,65 @@ FtlGcScanTempBlk:
 	stp	x25, x26, [sp, 64]
 	cmp	w19, w0
 	stp	x27, x28, [sp, 80]
-	beq	.L2271
-	cbnz	w19, .L2254
-.L2255:
+	beq	.L2274
+	cbnz	w19, .L2257
+.L2258:
 	bl	FtlGcPageVarInit
-	b	.L2256
-.L2271:
+	b	.L2259
+.L2274:
 	mov	w19, 0
-.L2254:
-	adrp	x0, .LANCHOR51
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+.L2257:
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w1
-	beq	.L2255
-.L2256:
-	adrp	x25, .LANCHOR57
-	add	x25, x25, :lo12:.LANCHOR57
+	beq	.L2258
+.L2259:
+	adrp	x25, .LANCHOR58
+	add	x25, x25, :lo12:.LANCHOR58
 	mov	w26, -1
 	mov	w24, 65535
-.L2268:
+.L2271:
 	ldrh	w0, [x20]
 	strb	wzr, [x20, 8]
 	cmp	w0, w24
-	beq	.L2272
+	beq	.L2275
 	mov	w27, 56
-.L2270:
+.L2273:
 	adrp	x1, .LANCHOR105
-	adrp	x22, .LANCHOR178
+	adrp	x22, .LANCHOR177
 	ldrh	w6, [x25]
 	add	x3, x20, 16
 	ldr	x5, [x1, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR36
-	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	adrp	x1, .LANCHOR37
+	ldr	x0, [x22, #:lo12:.LANCHOR177]
 	mov	w21, 0
-	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	ldrh	w1, [x1, #:lo12:.LANCHOR37]
 	add	x1, x1, 8
 	add	x1, x20, x1, lsl 1
-.L2258:
+.L2261:
 	cmp	x3, x1
-	bne	.L2260
+	bne	.L2263
 	mov	w1, w21
 	umull	x21, w21, w27
 	mov	x28, 0
 	mov	w2, 0
 	bl	FlashReadPages
-.L2261:
+.L2264:
 	cmp	x28, x21
-	bne	.L2269
-	adrp	x0, .LANCHOR51
+	bne	.L2272
+	adrp	x0, .LANCHOR52
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
 	cmp	w0, w19
-	bhi	.L2270
-.L2272:
+	bhi	.L2273
+.L2275:
 	mov	w2, 0
-	b	.L2257
-.L2260:
+	b	.L2260
+.L2263:
 	ldrh	w2, [x3]
 	cmp	w2, w24
-	beq	.L2259
+	beq	.L2262
 	umaddl	x4, w21, w27, x0
 	orr	w2, w19, w2, lsl 10
 	str	w2, [x4, 4]
@@ -15452,27 +15473,27 @@ FtlGcScanTempBlk:
 	asr	w2, w2, 2
 	add	x2, x5, x2, sxtw 2
 	str	x2, [x4, 16]
-.L2259:
+.L2262:
 	add	x3, x3, 2
-	b	.L2258
-.L2269:
-	ldr	x6, [x22, #:lo12:.LANCHOR178]
+	b	.L2261
+.L2272:
+	ldr	x6, [x22, #:lo12:.LANCHOR177]
 	add	x5, x6, x28
 	ldr	w4, [x5, 4]
 	lsr	w0, w4, 10
 	bl	P2V_plane
 	and	w2, w0, 65535
 	ldr	w0, [x6, x28]
-	cbnz	w0, .L2262
+	cbnz	w0, .L2265
 	ldr	x0, [x5, 16]
 	add	x28, x28, 56
 	ldrh	w1, [x0]
 	cmp	w1, w24
-	bne	.L2263
+	bne	.L2266
 	adrp	x0, .LANCHOR132
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR132]
-.L2257:
+.L2260:
 	strb	w2, [x20, 6]
 	mov	w0, -1
 	strh	w19, [x20, 2]
@@ -15488,99 +15509,99 @@ FtlGcScanTempBlk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2263:
+.L2266:
 	ldp	w2, w0, [x0, 8]
 	mov	w1, w4
 	bl	FtlGcUpdatePage
-	b	.L2261
-.L2262:
+	b	.L2264
+.L2265:
 	ldrh	w1, [x20]
 	mov	w2, w4
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
 	bl	printf
-	adrp	x0, .LANCHOR101
-	ldr	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR28
+	ldr	w1, [x0, #:lo12:.LANCHOR28]
 	ldrh	w0, [x20]
-	cbnz	w1, .L2264
+	cbnz	w1, .L2267
 	adrp	x1, .LANCHOR8
 	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	cbz	w1, .L2265
-.L2264:
-	adrp	x2, .LANCHOR77
+	cbz	w1, .L2268
+.L2267:
+	adrp	x2, .LANCHOR78
 	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR77]
+	ldr	x2, [x2, #:lo12:.LANCHOR78]
 	ldrh	w1, [x2, x1]
 	cmp	w1, 119
-	bls	.L2266
-.L2265:
-	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	bls	.L2269
+.L2268:
+	ldr	x1, [x22, #:lo12:.LANCHOR177]
 	ldr	w1, [x1, x28]
 	cmn	w1, #1
-	bne	.L2267
-.L2266:
-	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	bne	.L2270
+.L2269:
+	ldr	x1, [x22, #:lo12:.LANCHOR177]
 	add	x28, x1, x28
 	ldr	w26, [x28, 4]
-.L2267:
-	adrp	x1, .LANCHOR82
+.L2270:
+	adrp	x1, .LANCHOR83
 	ubfiz	x0, x0, 1, 16
 	mov	w19, 0
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x20]
 	bl	INSERT_FREE_LIST
 	mov	w0, -1
 	strh	w0, [x20]
 	bl	FtlGcPageVarInit
-	b	.L2268
+	b	.L2271
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
 	.align	2
 	.global	FtlGcFreeTempBlock
 	.type	FtlGcFreeTempBlock, %function
 FtlGcFreeTempBlock:
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbz	w0, .L2282
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbz	w0, .L2285
 	mov	w0, 0
 	ret
-.L2282:
+.L2285:
 	stp	x29, x30, [sp, -112]!
 	mov	w1, 65535
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR92
+	adrp	x19, .LANCHOR93
 	stp	x21, x22, [sp, 32]
-	add	x0, x19, :lo12:.LANCHOR92
-	ldrh	w20, [x19, #:lo12:.LANCHOR92]
+	add	x0, x19, :lo12:.LANCHOR93
+	ldrh	w20, [x19, #:lo12:.LANCHOR93]
 	adrp	x21, .LANCHOR132
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w20, w1
 	str	x27, [sp, 80]
-	beq	.L2284
-	adrp	x1, .LANCHOR51
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	beq	.L2287
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	bl	FtlGcScanTempBlk
 	str	w0, [x29, 108]
 	cmn	w0, #1
-	beq	.L2284
-	adrp	x0, .LANCHOR77
+	beq	.L2287
+	adrp	x0, .LANCHOR78
 	ubfiz	x20, x20, 1, 16
-	ldr	x1, [x0, #:lo12:.LANCHOR77]
+	ldr	x1, [x0, #:lo12:.LANCHOR78]
 	ldrh	w0, [x1, x20]
 	cmp	w0, 4
-	bls	.L2285
+	bls	.L2288
 	sub	w0, w0, #5
 	strh	w0, [x1, x20]
 	mov	w0, 1
 	bl	FtlEctTblFlush
-.L2285:
+.L2288:
 	ldr	w0, [x21, #:lo12:.LANCHOR132]
-	cbnz	w0, .L2286
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	cbnz	w0, .L2289
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 96]
 	add	w1, w1, 1
 	str	w1, [x0, 96]
@@ -15588,10 +15609,10 @@ FtlGcFreeTempBlock:
 	lsr	w0, w0, 10
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L2286:
+.L2289:
 	str	wzr, [x21, #:lo12:.LANCHOR132]
 	mov	w0, 1
-.L2281:
+.L2284:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15599,97 +15620,97 @@ FtlGcFreeTempBlock:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2284:
+.L2287:
 	str	wzr, [x21, #:lo12:.LANCHOR132]
 	mov	w0, 65535
-	ldrh	w1, [x19, #:lo12:.LANCHOR92]
-	add	x21, x19, :lo12:.LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	add	x21, x19, :lo12:.LANCHOR93
 	cmp	w1, w0
-	beq	.L2307
+	beq	.L2310
 	bl	FtlCacheWriteBack
 	adrp	x20, .LANCHOR110
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR52
 	ldrb	w1, [x21, 7]
 	ldrh	w2, [x20, #:lo12:.LANCHOR110]
 	mov	x21, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR51]
+	ldrh	w3, [x0, #:lo12:.LANCHOR52]
 	mul	w1, w1, w3
 	cmp	w2, w1
-	beq	.L2288
+	beq	.L2291
 	mov	w2, 163
 	adrp	x1, .LANCHOR234
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR234
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR234
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2288:
-	add	x0, x19, :lo12:.LANCHOR92
-	adrp	x23, .LANCHOR82
-	ldrh	w3, [x21, #:lo12:.LANCHOR51]
-	adrp	x25, .LANCHOR71
-	ldrh	w2, [x19, #:lo12:.LANCHOR92]
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2291:
+	add	x0, x19, :lo12:.LANCHOR93
+	adrp	x23, .LANCHOR83
+	ldrh	w3, [x21, #:lo12:.LANCHOR52]
+	adrp	x25, .LANCHOR72
+	ldrh	w2, [x19, #:lo12:.LANCHOR93]
 	adrp	x26, .LANCHOR234
 	ldrb	w0, [x0, 7]
-	add	x25, x25, :lo12:.LANCHOR71
-	ldr	x1, [x23, #:lo12:.LANCHOR82]
+	add	x25, x25, :lo12:.LANCHOR72
+	ldr	x1, [x23, #:lo12:.LANCHOR83]
 	add	x26, x26, :lo12:.LANCHOR234
 	mov	w21, 0
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x1, .LANCHOR159
+	adrp	x1, .LANCHOR158
 	ldrh	w0, [x20, #:lo12:.LANCHOR110]
-	ldr	w2, [x1, #:lo12:.LANCHOR159]
+	ldr	w2, [x1, #:lo12:.LANCHOR158]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR159]
-.L2289:
+	str	w0, [x1, #:lo12:.LANCHOR158]
+.L2292:
 	ldrh	w0, [x20, #:lo12:.LANCHOR110]
 	cmp	w0, w21
-	bhi	.L2293
+	bhi	.L2296
 	mov	w0, -1
 	bl	decrement_vpc_count
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2294
-	ldrh	w1, [x19, #:lo12:.LANCHOR92]
-	adrp	x0, .LC47
-	add	x0, x0, :lo12:.LC47
+	cbz	w0, .L2297
+	ldrh	w1, [x19, #:lo12:.LANCHOR93]
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
 	bl	printf
-.L2294:
-	ldrh	w0, [x19, #:lo12:.LANCHOR92]
-	ldr	x2, [x23, #:lo12:.LANCHOR82]
+.L2297:
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	ldr	x2, [x23, #:lo12:.LANCHOR83]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbz	w1, .L2295
+	cbz	w1, .L2298
 	bl	INSERT_DATA_LIST
-.L2296:
+.L2299:
 	adrp	x0, .LANCHOR108
 	mov	w21, -1
 	strh	wzr, [x20, #:lo12:.LANCHOR110]
-	strh	w21, [x19, #:lo12:.LANCHOR92]
+	strh	w21, [x19, #:lo12:.LANCHOR93]
 	strh	wzr, [x0, #:lo12:.LANCHOR108]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	adrp	x0, .LANCHOR87
-	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w1, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LANCHOR227
 	ldrh	w0, [x0, #:lo12:.LANCHOR227]
 	add	w0, w0, w0, lsl 1
 	cmp	w1, w0, lsr 2
-	ble	.L2307
+	ble	.L2310
 	adrp	x0, .LANCHOR201
 	mov	w1, 20
 	strh	w21, [x0, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR174
-	strh	w1, [x0, #:lo12:.LANCHOR174]
-.L2307:
+	adrp	x0, .LANCHOR173
+	strh	w1, [x0, #:lo12:.LANCHOR173]
+.L2310:
 	mov	w0, 0
-	b	.L2281
-.L2293:
+	b	.L2284
+.L2296:
 	adrp	x0, .LANCHOR111
 	mov	w24, 12
 	ldr	x27, [x0, #:lo12:.LANCHOR111]
@@ -15698,18 +15719,18 @@ FtlGcFreeTempBlock:
 	add	x22, x27, x24
 	ldr	w1, [x22, 8]
 	cmp	w1, w0
-	bcc	.L2290
+	bcc	.L2293
 	mov	w2, 168
 	mov	x1, x26
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2290:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2293:
 	ldr	w0, [x22, 8]
 	add	x1, x29, 108
 	mov	w2, 0
@@ -15717,7 +15738,7 @@ FtlGcFreeTempBlock:
 	ldr	w0, [x27, x24]
 	ldr	w1, [x29, 108]
 	cmp	w0, w1
-	bne	.L2291
+	bne	.L2294
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
 	mov	w24, w0
@@ -15726,21 +15747,21 @@ FtlGcFreeTempBlock:
 	add	x1, x22, 4
 	bl	log2phys
 	mov	w0, w24
-.L2306:
+.L2309:
 	bl	decrement_vpc_count
-.L2292:
+.L2295:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2289
-.L2291:
+	b	.L2292
+.L2294:
 	ldr	w0, [x22, 4]
 	cmp	w1, w0
-	beq	.L2292
-	ldrh	w0, [x19, #:lo12:.LANCHOR92]
-	b	.L2306
-.L2295:
+	beq	.L2295
+	ldrh	w0, [x19, #:lo12:.LANCHOR93]
+	b	.L2309
+.L2298:
 	bl	INSERT_FREE_LIST
-	b	.L2296
+	b	.L2299
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
 	.align	2
@@ -15748,22 +15769,22 @@ FtlGcFreeTempBlock:
 	.type	Ftl_get_new_temp_ppa, %function
 Ftl_get_new_temp_ppa:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR92
+	adrp	x0, .LANCHOR93
 	mov	w2, 65535
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	mov	x19, x0
-	ldrh	w3, [x0, #:lo12:.LANCHOR92]
+	ldrh	w3, [x0, #:lo12:.LANCHOR93]
 	cmp	w3, w2
-	beq	.L2309
-	add	x1, x0, :lo12:.LANCHOR92
+	beq	.L2312
+	add	x1, x0, :lo12:.LANCHOR93
 	ldrh	w0, [x1, 4]
-	cbnz	w0, .L2310
-.L2309:
+	cbnz	w0, .L2313
+.L2312:
 	bl	FtlCacheWriteBack
 	mov	w0, 0
 	bl	FtlGcFreeTempBlock
-	add	x0, x19, :lo12:.LANCHOR92
+	add	x0, x19, :lo12:.LANCHOR93
 	strb	wzr, [x0, 8]
 	bl	allocate_data_superblock
 	adrp	x0, .LANCHOR108
@@ -15774,8 +15795,8 @@ Ftl_get_new_temp_ppa:
 	mov	w0, 0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L2310:
-	add	x0, x19, :lo12:.LANCHOR92
+.L2313:
+	add	x0, x19, :lo12:.LANCHOR93
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	get_new_active_ppa
@@ -15791,56 +15812,56 @@ Ftl_gc_temp_data_write_back:
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR102
-	cbz	w0, .L2313
+	cbz	w0, .L2316
 	ldr	w0, [x19, #:lo12:.LANCHOR102]
-	tbz	x0, 0, .L2313
-	adrp	x0, .LANCHOR92+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
-	cbz	w0, .L2313
-.L2318:
+	tbz	x0, 0, .L2316
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbz	w0, .L2316
+.L2321:
 	mov	w0, 0
-.L2312:
+.L2315:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2313:
-	adrp	x20, .LANCHOR179
+.L2316:
+	adrp	x20, .LANCHOR178
 	ldr	w1, [x19, #:lo12:.LANCHOR102]
 	mov	w3, 0
 	mov	w2, 0
-	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	ldr	x0, [x20, #:lo12:.LANCHOR178]
 	add	x19, x19, :lo12:.LANCHOR102
 	bl	FlashProgPages
 	mov	w11, 0
 	mov	w12, 56
-.L2315:
+.L2318:
 	ldr	w1, [x19]
 	cmp	w11, w1
-	bcc	.L2317
-	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	bcc	.L2320
+	ldr	x0, [x20, #:lo12:.LANCHOR178]
 	bl	FtlGcBufFree
 	str	wzr, [x19]
-	adrp	x0, .LANCHOR92+4
-	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
-	cbnz	w0, .L2318
+	adrp	x0, .LANCHOR93+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR93+4]
+	cbnz	w0, .L2321
 	mov	w0, 1
 	bl	FtlGcFreeTempBlock
-	b	.L2329
-.L2317:
+	b	.L2332
+.L2320:
 	umull	x0, w11, w12
-	ldr	x2, [x20, #:lo12:.LANCHOR179]
+	ldr	x2, [x20, #:lo12:.LANCHOR178]
 	add	x1, x2, x0
 	ldr	w2, [x2, x0]
 	cmn	w2, #1
-	bne	.L2316
-	adrp	x0, .LANCHOR92
-	adrp	x3, .LANCHOR82
-	ldrh	w4, [x0, #:lo12:.LANCHOR92]
-	ldr	x3, [x3, #:lo12:.LANCHOR82]
+	bne	.L2319
+	adrp	x0, .LANCHOR93
+	adrp	x3, .LANCHOR83
+	ldrh	w4, [x0, #:lo12:.LANCHOR93]
+	ldr	x3, [x3, #:lo12:.LANCHOR83]
 	strh	wzr, [x3, x4, lsl 1]
-	strh	w2, [x0, #:lo12:.LANCHOR92]
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	strh	w2, [x0, #:lo12:.LANCHOR93]
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 96]
 	add	w2, w2, 1
 	str	w2, [x0, 96]
@@ -15849,17 +15870,17 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-.L2329:
+.L2332:
 	mov	w0, 1
-	b	.L2312
-.L2316:
+	b	.L2315
+.L2319:
 	ldr	x0, [x1, 16]
 	ldr	w1, [x1, 4]
 	ldp	w2, w0, [x0, 8]
 	bl	FtlGcUpdatePage
 	add	w11, w11, 1
 	and	w11, w11, 65535
-	b	.L2315
+	b	.L2318
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.FtlGcPageRecovery,"ax",@progbits
 	.align	2
@@ -15869,16 +15890,16 @@ FtlGcPageRecovery:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR51
-	adrp	x19, .LANCHOR92
-	add	x19, x19, :lo12:.LANCHOR92
-	ldrh	w1, [x20, #:lo12:.LANCHOR51]
+	adrp	x20, .LANCHOR52
+	adrp	x19, .LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR93
+	ldrh	w1, [x20, #:lo12:.LANCHOR52]
 	mov	x0, x19
 	bl	FtlGcScanTempBlk
 	ldrh	w1, [x19, 2]
-	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	ldrh	w0, [x20, #:lo12:.LANCHOR52]
 	cmp	w1, w0
-	bcc	.L2330
+	bcc	.L2333
 	adrp	x0, .LANCHOR124
 	add	x0, x0, :lo12:.LANCHOR124
 	bl	FtlMapBlkWriteDumpData
@@ -15886,7 +15907,7 @@ FtlGcPageRecovery:
 	bl	FtlGcFreeTempBlock
 	adrp	x0, .LANCHOR132
 	str	wzr, [x0, #:lo12:.LANCHOR132]
-.L2330:
+.L2333:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -15900,15 +15921,15 @@ FtlPowerLostRecovery:
 	adrp	x0, .LANCHOR231
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR90
-	add	x19, x19, :lo12:.LANCHOR90
+	adrp	x19, .LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR91
 	str	wzr, [x0, #:lo12:.LANCHOR231]
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
-	adrp	x19, .LANCHOR91
+	adrp	x19, .LANCHOR92
 	bl	FtlSlcSuperblockCheck
-	add	x19, x19, :lo12:.LANCHOR91
+	add	x19, x19, :lo12:.LANCHOR92
 	mov	x0, x19
 	bl	FtlRecoverySuperblock
 	mov	x0, x19
@@ -15931,10 +15952,10 @@ FtlSysBlkInit:
 	mov	w1, -1
 	add	x29, sp, 0
 	strh	w1, [x0, #:lo12:.LANCHOR229]
-	adrp	x0, .LANCHOR37
+	adrp	x0, .LANCHOR38
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR230
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	stp	x21, x22, [sp, 32]
 	strh	wzr, [x19, #:lo12:.LANCHOR230]
 	str	x23, [sp, 48]
@@ -15944,20 +15965,20 @@ FtlSysBlkInit:
 	ldrh	w1, [x0, #:lo12:.LANCHOR206]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2336
-.L2338:
+	bne	.L2339
+.L2341:
 	mov	w23, -1
-.L2335:
+.L2338:
 	mov	w0, w23
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2336:
+.L2339:
 	bl	FtlLoadSysInfo
 	mov	w23, w0
-	cbnz	w0, .L2338
+	cbnz	w0, .L2341
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -15967,45 +15988,45 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	mov	w0, 1
 	bl	FtlUpdateVaildLpn
-	adrp	x2, .LANCHOR66
-	adrp	x0, .LANCHOR95
+	adrp	x2, .LANCHOR67
+	adrp	x0, .LANCHOR96
 	mov	x3, 4
-	ldrh	w2, [x2, #:lo12:.LANCHOR66]
-	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	ldrh	w2, [x2, #:lo12:.LANCHOR67]
+	ldr	x0, [x0, #:lo12:.LANCHOR96]
 	add	x2, x3, x2, uxtw 4
 	add	x1, x0, 4
 	add	x0, x0, x2
-.L2339:
+.L2342:
 	cmp	x1, x0
-	bne	.L2341
+	bne	.L2344
 	ldrh	w0, [x19, #:lo12:.LANCHOR230]
-	cbnz	w0, .L2340
-	b	.L2335
-.L2341:
+	cbnz	w0, .L2343
+	b	.L2338
+.L2344:
 	ldr	w2, [x1], 16
-	tbz	w2, #31, .L2339
-.L2340:
-	adrp	x22, .LANCHOR90
-	add	x20, x22, :lo12:.LANCHOR90
+	tbz	w2, #31, .L2342
+.L2343:
+	adrp	x22, .LANCHOR91
+	add	x20, x22, :lo12:.LANCHOR91
 	mov	x0, x20
-	adrp	x21, .LANCHOR91
+	adrp	x21, .LANCHOR92
 	bl	FtlSuperblockPowerLostFix
-	add	x19, x21, :lo12:.LANCHOR91
+	add	x19, x21, :lo12:.LANCHOR92
 	mov	x0, x19
 	bl	FtlSuperblockPowerLostFix
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR83
 	ldrh	w3, [x20, 4]
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	ldrh	w0, [x22, #:lo12:.LANCHOR90]
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	ldrh	w0, [x22, #:lo12:.LANCHOR91]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
 	sub	w2, w2, w3
-	adrp	x3, .LANCHOR51
+	adrp	x3, .LANCHOR52
 	strh	w2, [x1, x0]
 	strb	wzr, [x20, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	ldrh	w0, [x3, #:lo12:.LANCHOR52]
 	strh	w0, [x20, 2]
-	ldrh	w0, [x21, #:lo12:.LANCHOR91]
+	ldrh	w0, [x21, #:lo12:.LANCHOR92]
 	strh	wzr, [x20, 4]
 	ldrh	w4, [x19, 4]
 	lsl	x0, x0, 1
@@ -16013,7 +16034,7 @@ FtlSysBlkInit:
 	sub	w2, w2, w4
 	strh	w2, [x1, x0]
 	strb	wzr, [x19, 6]
-	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	ldrh	w0, [x3, #:lo12:.LANCHOR52]
 	strh	w0, [x19, 2]
 	strh	wzr, [x19, 4]
 	adrp	x0, .LANCHOR124
@@ -16022,96 +16043,96 @@ FtlSysBlkInit:
 	adrp	x0, .LANCHOR215
 	add	x0, x0, :lo12:.LANCHOR215
 	bl	FtlMapBlkWriteDumpData
-	adrp	x0, .LANCHOR135
-	add	x0, x0, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR80
+	add	x0, x0, :lo12:.LANCHOR80
 	ldrh	w1, [x0, 30]
 	add	w1, w1, 1
 	strh	w1, [x0, 30]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	b	.L2335
+	b	.L2338
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
 	.align	2
 	.global	rk_ftl_garbage_collect
 	.type	rk_ftl_garbage_collect, %function
 rk_ftl_garbage_collect:
-	adrp	x1, .LANCHOR75
-	ldr	w1, [x1, #:lo12:.LANCHOR75]
-	cbnz	w1, .L2398
+	adrp	x1, .LANCHOR76
+	ldr	w1, [x1, #:lo12:.LANCHOR76]
+	cbnz	w1, .L2401
 	stp	x29, x30, [sp, -192]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR169
+	adrp	x21, .LANCHOR168
 	stp	x19, x20, [sp, 16]
-	ldr	w1, [x21, #:lo12:.LANCHOR169]
+	ldr	w1, [x21, #:lo12:.LANCHOR168]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w1, .L2400
-	adrp	x1, .LANCHOR84
-	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	cbnz	w1, .L2403
+	adrp	x1, .LANCHOR85
+	ldrh	w1, [x1, #:lo12:.LANCHOR85]
 	cmp	w1, 47
-	bls	.L2400
+	bls	.L2403
 	adrp	x1, .LANCHOR113
 	mov	w4, 65535
 	ldrh	w3, [x1, #:lo12:.LANCHOR113]
 	cmp	w3, w4
-	beq	.L2348
+	beq	.L2351
 	adrp	x2, .LANCHOR112
 	ldrh	w5, [x2, #:lo12:.LANCHOR112]
 	cmp	w5, w4
-	bne	.L2348
+	bne	.L2351
 	strh	w3, [x2, #:lo12:.LANCHOR112]
 	mov	w2, -1
 	strh	w2, [x1, #:lo12:.LANCHOR113]
-.L2348:
-	cbnz	w0, .L2401
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+.L2351:
+	cbnz	w0, .L2404
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 24
-	bhi	.L2402
-	adrp	x1, .LANCHOR51
+	bhi	.L2405
+	adrp	x1, .LANCHOR52
 	cmp	w0, 16
-	ldrh	w20, [x1, #:lo12:.LANCHOR51]
-	bls	.L2351
+	ldrh	w20, [x1, #:lo12:.LANCHOR52]
+	bls	.L2354
 	lsr	w20, w20, 5
-.L2350:
-	adrp	x2, .LANCHOR174
+.L2353:
+	adrp	x2, .LANCHOR173
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR174]
+	ldrh	w1, [x2, #:lo12:.LANCHOR173]
 	cmp	w1, w0
-	bcs	.L2354
-	adrp	x0, .LANCHOR92
+	bcs	.L2357
+	adrp	x0, .LANCHOR93
 	mov	w1, 65535
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w0, w1
-	bne	.L2355
+	bne	.L2358
 	adrp	x1, .LANCHOR112
 	ldrh	w1, [x1, #:lo12:.LANCHOR112]
 	cmp	w1, w0
-	bne	.L2355
+	bne	.L2358
 	adrp	x0, .LANCHOR235
 	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	cbnz	w0, .L2356
-	adrp	x1, .LANCHOR71
-	adrp	x4, .LANCHOR99
-	ldr	w1, [x1, #:lo12:.LANCHOR71]
-	ldr	w4, [x4, #:lo12:.LANCHOR99]
+	cbnz	w0, .L2359
+	adrp	x1, .LANCHOR72
+	adrp	x4, .LANCHOR100
+	ldr	w1, [x1, #:lo12:.LANCHOR72]
+	ldr	w4, [x4, #:lo12:.LANCHOR100]
 	add	w1, w1, w1, lsl 1
 	cmp	w4, w1, lsr 2
-	bcs	.L2357
-.L2356:
+	bcs	.L2360
+.L2359:
 	adrp	x1, .LANCHOR227
 	ldrh	w1, [x1, #:lo12:.LANCHOR227]
 	add	w1, w1, w1, lsl 1
 	asr	w1, w1, 2
-	strh	w1, [x3, #:lo12:.LANCHOR174]
-.L2358:
-	adrp	x1, .LANCHOR170
-	str	wzr, [x1, #:lo12:.LANCHOR170]
-.L2346:
+	strh	w1, [x3, #:lo12:.LANCHOR173]
+.L2361:
+	adrp	x1, .LANCHOR169
+	str	wzr, [x1, #:lo12:.LANCHOR169]
+.L2349:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16119,183 +16140,183 @@ rk_ftl_garbage_collect:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L2351:
+.L2354:
 	cmp	w0, 12
-	bls	.L2352
+	bls	.L2355
 	lsr	w20, w20, 4
-	b	.L2350
-.L2352:
+	b	.L2353
+.L2355:
 	cmp	w0, 8
-	bls	.L2350
+	bls	.L2353
 	lsr	w20, w20, 2
-	b	.L2350
-.L2402:
+	b	.L2353
+.L2405:
 	mov	w20, 1
-	b	.L2350
-.L2357:
+	b	.L2353
+.L2360:
 	mov	w1, 18
-	strh	w1, [x2, #:lo12:.LANCHOR174]
-	b	.L2358
-.L2355:
+	strh	w1, [x2, #:lo12:.LANCHOR173]
+	b	.L2361
+.L2358:
 	adrp	x0, .LANCHOR227
 	ldrh	w0, [x0, #:lo12:.LANCHOR227]
 	add	w0, w0, w0, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x3, #:lo12:.LANCHOR174]
-.L2354:
+	strh	w0, [x3, #:lo12:.LANCHOR173]
+.L2357:
 	adrp	x0, .LANCHOR114
 	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2349
+	cbz	w0, .L2352
 	add	w20, w20, 32
 	and	w20, w20, 65535
-.L2349:
+.L2352:
 	adrp	x19, .LANCHOR201
 	mov	w0, 65535
 	ldrh	w2, [x19, #:lo12:.LANCHOR201]
 	cmp	w2, w0
-	bne	.L2361
+	bne	.L2364
 	adrp	x0, .LANCHOR112
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	cmp	w1, w2
-	beq	.L2362
-	adrp	x2, .LANCHOR82
+	beq	.L2365
+	adrp	x2, .LANCHOR83
 	ubfiz	x1, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldr	x2, [x2, #:lo12:.LANCHOR83]
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L2363
+	cbnz	w1, .L2366
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2363:
+.L2366:
 	ldrh	w1, [x0, #:lo12:.LANCHOR112]
 	strh	w1, [x19, #:lo12:.LANCHOR201]
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR112]
-.L2362:
+.L2365:
 	add	x0, x19, :lo12:.LANCHOR201
 	mov	w1, 65535
 	strb	wzr, [x0, 8]
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
 	cmp	w0, w1
-	beq	.L2361
+	beq	.L2364
 	bl	IsBlkInGcList
-	cbz	w0, .L2365
+	cbz	w0, .L2368
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2365:
+.L2368:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2366
+	cbz	w0, .L2369
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
 	add	x3, x19, :lo12:.LANCHOR201
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2366:
+.L2369:
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	mov	w0, 65535
 	add	x22, x19, :lo12:.LANCHOR201
 	cmp	w1, w0
-	beq	.L2361
+	beq	.L2364
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR236
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	strh	wzr, [x22, 2]
 	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	adrp	x0, .LANCHOR82
+	adrp	x0, .LANCHOR83
 	strb	wzr, [x22, 6]
-	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR237
 	strh	w1, [x0, #:lo12:.LANCHOR237]
-.L2361:
-	adrp	x0, .LANCHOR90
+.L2364:
+	adrp	x0, .LANCHOR91
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	str	x0, [x29, 144]
-	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
 	cmp	w2, w1
-	beq	.L2367
-	adrp	x0, .LANCHOR91
+	beq	.L2370
+	adrp	x0, .LANCHOR92
 	str	x0, [x29, 136]
-	ldrh	w2, [x0, #:lo12:.LANCHOR91]
+	ldrh	w2, [x0, #:lo12:.LANCHOR92]
 	cmp	w2, w1
-	beq	.L2367
-	adrp	x23, .LANCHOR176
-	add	x0, x23, :lo12:.LANCHOR176
+	beq	.L2370
+	adrp	x23, .LANCHOR175
+	add	x0, x23, :lo12:.LANCHOR175
 	str	x0, [x29, 168]
-.L2368:
+.L2371:
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2369
-	adrp	x0, .LANCHOR170
-	adrp	x22, .LANCHOR51
-	add	x22, x22, :lo12:.LANCHOR51
-	str	wzr, [x0, #:lo12:.LANCHOR170]
-.L2370:
-	ldrh	w5, [x23, #:lo12:.LANCHOR176]
-	add	x7, x23, :lo12:.LANCHOR176
+	bne	.L2372
+	adrp	x0, .LANCHOR169
+	adrp	x22, .LANCHOR52
+	add	x22, x22, :lo12:.LANCHOR52
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+.L2373:
+	ldrh	w5, [x23, #:lo12:.LANCHOR175]
+	add	x7, x23, :lo12:.LANCHOR175
 	mov	w0, w5
 	bl	List_get_gc_head_node
 	and	w6, w0, 65535
 	strh	w6, [x19, #:lo12:.LANCHOR201]
 	mov	w0, 65535
 	cmp	w6, w0
-	bne	.L2371
+	bne	.L2374
 	strh	wzr, [x7]
 	mov	w0, 8
-	b	.L2346
-.L2401:
-	mov	w20, 1
 	b	.L2349
-.L2367:
+.L2404:
+	mov	w20, 1
+	b	.L2352
+.L2370:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2437:
+.L2440:
 	adrp	x0, .LANCHOR235
 	ldrh	w0, [x0, #:lo12:.LANCHOR235]
-	b	.L2346
-.L2371:
+	b	.L2349
+.L2374:
 	mov	w0, w6
 	bl	IsBlkInGcList
 	add	w5, w5, 1
-	cbz	w0, .L2372
-	strh	w5, [x23, #:lo12:.LANCHOR176]
-	b	.L2370
-.L2372:
-	adrp	x24, .LANCHOR82
-	adrp	x4, .LANCHOR36
+	cbz	w0, .L2375
+	strh	w5, [x23, #:lo12:.LANCHOR175]
+	b	.L2373
+.L2375:
+	adrp	x24, .LANCHOR83
+	adrp	x4, .LANCHOR37
 	ldrh	w0, [x22]
 	ubfiz	x1, x6, 1, 16
-	ldr	x2, [x24, #:lo12:.LANCHOR82]
+	ldr	x2, [x24, #:lo12:.LANCHOR83]
 	and	w5, w5, 65535
-	ldrh	w4, [x4, #:lo12:.LANCHOR36]
-	strh	w5, [x23, #:lo12:.LANCHOR176]
+	ldrh	w4, [x4, #:lo12:.LANCHOR37]
+	strh	w5, [x23, #:lo12:.LANCHOR175]
 	ldrh	w3, [x2, x1]
 	mul	w0, w0, w4
 	cmp	w3, w0, asr 1
-	bgt	.L2374
+	bgt	.L2377
 	cmp	w5, 48
-	bls	.L2375
+	bls	.L2378
 	cmp	w3, 8
-	bls	.L2375
+	bls	.L2378
 	adrp	x3, .LANCHOR108
 	ldrh	w3, [x3, #:lo12:.LANCHOR108]
 	cmp	w3, 35
-	bhi	.L2375
-.L2374:
+	bhi	.L2378
+.L2377:
 	ldr	x3, [x29, 168]
 	strh	wzr, [x3]
-.L2375:
+.L2378:
 	ldrh	w1, [x2, x1]
 	cmp	w0, w1
-	bgt	.L2376
+	bgt	.L2379
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x0, .LANCHOR176
-	strh	wzr, [x0, #:lo12:.LANCHOR176]
-	b	.L2437
-.L2376:
-	cbnz	w1, .L2377
+	adrp	x0, .LANCHOR175
+	strh	wzr, [x0, #:lo12:.LANCHOR175]
+	b	.L2440
+.L2379:
+	cbnz	w1, .L2380
 	mov	w0, -1
 	bl	decrement_vpc_count
 	ldr	x0, [x29, 168]
@@ -16303,115 +16324,115 @@ rk_ftl_garbage_collect:
 	ldrh	w0, [x0]
 	add	w0, w0, 1
 	strh	w0, [x1]
-	b	.L2370
-.L2377:
+	b	.L2373
+.L2380:
 	adrp	x0, .LANCHOR8
 	add	x3, x19, :lo12:.LANCHOR201
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
 	strb	wzr, [x3, 8]
-	cbz	w0, .L2378
+	cbz	w0, .L2381
 	mov	w0, w6
 	bl	ftl_get_blk_mode
 	strb	w0, [x3, 8]
-.L2378:
+.L2381:
 	ldr	x0, [x29, 144]
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	cmp	w0, w6
-	bne	.L2379
+	bne	.L2382
 	mov	w2, 835
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2379:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2382:
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
 	cmp	w1, w0
-	bne	.L2380
+	bne	.L2383
 	mov	w2, 836
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2380:
-	adrp	x0, .LANCHOR92
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2383:
+	adrp	x0, .LANCHOR93
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
-	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	ldrh	w0, [x0, #:lo12:.LANCHOR93]
 	cmp	w1, w0
-	bne	.L2381
+	bne	.L2384
 	mov	w2, 837
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2381:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2384:
 	add	x22, x19, :lo12:.LANCHOR201
 	mov	x0, x22
 	bl	make_superblock
 	adrp	x0, .LANCHOR236
 	ldrh	w1, [x19, #:lo12:.LANCHOR201]
 	strh	wzr, [x0, #:lo12:.LANCHOR236]
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	ldrh	w1, [x0, x1, lsl 1]
 	adrp	x0, .LANCHOR237
 	strh	wzr, [x22, 2]
 	strh	w1, [x0, #:lo12:.LANCHOR237]
 	strb	wzr, [x22, 6]
-.L2369:
+.L2372:
 	mov	w0, 1
-	str	w0, [x21, #:lo12:.LANCHOR169]
+	str	w0, [x21, #:lo12:.LANCHOR168]
 	adrp	x0, .LANCHOR8
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	stp	x0, x1, [x29, 120]
 	ldrb	w2, [x0, #:lo12:.LANCHOR8]
-	ldrh	w26, [x1, #:lo12:.LANCHOR51]
-	cbz	w2, .L2382
+	ldrh	w26, [x1, #:lo12:.LANCHOR52]
+	cbz	w2, .L2385
 	add	x0, x19, :lo12:.LANCHOR201
 	ldrb	w0, [x0, 8]
 	cmp	w0, 1
-	bne	.L2382
-	adrp	x0, .LANCHOR52
-	ldrh	w26, [x0, #:lo12:.LANCHOR52]
-.L2382:
+	bne	.L2385
+	adrp	x0, .LANCHOR53
+	ldrh	w26, [x0, #:lo12:.LANCHOR53]
+.L2385:
 	add	x0, x19, :lo12:.LANCHOR201
 	ldrh	w0, [x0, 2]
 	add	w1, w0, w20
 	cmp	w1, w26
-	ble	.L2383
+	ble	.L2386
 	sub	w20, w26, w0
 	and	w20, w20, 65535
-.L2383:
+.L2386:
 	adrp	x0, .LANCHOR236
 	mov	w27, 0
 	add	x0, x0, :lo12:.LANCHOR236
 	str	x0, [x29, 160]
-.L2384:
+.L2387:
 	cmp	w20, w27, uxth
-	bls	.L2392
+	bls	.L2395
 	add	x1, x19, :lo12:.LANCHOR201
-	adrp	x0, .LANCHOR36
+	adrp	x0, .LANCHOR37
 	adrp	x24, .LANCHOR106
 	add	x1, x1, 16
-	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	ldrh	w7, [x0, #:lo12:.LANCHOR37]
 	mov	w22, 0
 	ldrh	w4, [x1, -14]
 	mov	w2, 0
@@ -16419,23 +16440,23 @@ rk_ftl_garbage_collect:
 	mov	w6, 65535
 	add	w4, w4, w27
 	mov	w5, 56
-	b	.L2393
-.L2386:
+	b	.L2396
+.L2389:
 	ldrh	w3, [x1]
 	cmp	w3, w6
-	beq	.L2385
+	beq	.L2388
 	umaddl	x8, w22, w5, x0
 	add	w22, w22, 1
 	and	w22, w22, 65535
 	orr	w3, w4, w3, lsl 10
 	str	w3, [x8, 4]
-.L2385:
+.L2388:
 	add	w2, w2, 1
 	add	x1, x1, 2
 	and	w2, w2, 65535
-.L2393:
+.L2396:
 	cmp	w2, w7
-	bne	.L2386
+	bne	.L2389
 	add	x1, x19, :lo12:.LANCHOR201
 	adrp	x25, .LANCHOR102
 	add	x25, x25, :lo12:.LANCHOR102
@@ -16446,40 +16467,40 @@ rk_ftl_garbage_collect:
 	umull	x0, w22, w0
 	mov	x22, 0
 	str	x0, [x29, 152]
-.L2387:
+.L2390:
 	ldr	x0, [x29, 152]
 	cmp	x22, x0
-	bne	.L2391
+	bne	.L2394
 	add	w27, w27, 1
-	b	.L2384
-.L2391:
+	b	.L2387
+.L2394:
 	ldr	x0, [x24, #:lo12:.LANCHOR106]
 	add	x1, x0, x22
 	ldr	w0, [x0, x22]
 	cmn	w0, #1
-	beq	.L2388
+	beq	.L2391
 	ldr	x28, [x1, 16]
 	mov	w0, 61589
 	ldrh	w1, [x28]
 	cmp	w1, w0
-	bne	.L2388
+	bne	.L2391
 	ldr	w4, [x28, 8]
 	cmn	w4, #1
-	bne	.L2389
+	bne	.L2392
 	mov	w2, 876
 	str	w4, [x29, 112]
 	adrp	x1, .LANCHOR238
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR238
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR238
 	add	x0, x0, :lo12:.LC6
 	bl	printf
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
 	ldr	w4, [x29, 112]
-.L2389:
+.L2392:
 	mov	w2, 0
 	add	x1, x29, 188
 	mov	w0, w4
@@ -16490,11 +16511,11 @@ rk_ftl_garbage_collect:
 	and	w1, w1, 2147483647
 	ldr	w2, [x0, 4]
 	cmp	w1, w2
-	bne	.L2388
+	bne	.L2391
 	ldr	x1, [x29, 160]
-	adrp	x4, .LANCHOR179
+	adrp	x4, .LANCHOR178
 	ldr	x2, [x29, 160]
-	ldr	x5, [x4, #:lo12:.LANCHOR179]
+	ldr	x5, [x4, #:lo12:.LANCHOR178]
 	ldr	w0, [x0, 24]
 	ldrh	w1, [x1]
 	str	x4, [x29, 96]
@@ -16512,7 +16533,7 @@ rk_ftl_garbage_collect:
 	ldr	x2, [x29, 112]
 	ldr	w1, [x29, 108]
 	str	w0, [x2, 4]
-	ldr	x0, [x4, #:lo12:.LANCHOR179]
+	ldr	x0, [x4, #:lo12:.LANCHOR178]
 	ldr	w2, [x25]
 	umaddl	x1, w2, w1, x0
 	ldr	x0, [x24, #:lo12:.LANCHOR106]
@@ -16524,84 +16545,84 @@ rk_ftl_garbage_collect:
 	str	x4, [x1, 16]
 	ldr	w1, [x29, 188]
 	str	w1, [x28, 12]
-	adrp	x1, .LANCHOR92
-	add	x12, x1, :lo12:.LANCHOR92
-	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	adrp	x1, .LANCHOR93
+	add	x12, x1, :lo12:.LANCHOR93
+	ldrh	w1, [x1, #:lo12:.LANCHOR93]
 	strh	w1, [x28, 2]
-	adrp	x1, .LANCHOR158
+	adrp	x1, .LANCHOR157
 	str	w2, [x25]
-	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	ldr	w1, [x1, #:lo12:.LANCHOR157]
 	str	w1, [x28, 4]
 	mov	w1, 1
 	bl	FtlGcBufAlloc
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbnz	w0, .L2390
+	cbnz	w0, .L2393
 	ldrb	w1, [x12, 7]
 	ldr	w0, [x25]
 	cmp	w1, w0
-	beq	.L2390
+	beq	.L2393
 	ldrh	w0, [x12, 4]
-	cbnz	w0, .L2388
-.L2390:
+	cbnz	w0, .L2391
+.L2393:
 	bl	Ftl_gc_temp_data_write_back
-	cbz	w0, .L2388
-.L2438:
-	str	wzr, [x21, #:lo12:.LANCHOR169]
-	b	.L2437
-.L2388:
+	cbz	w0, .L2391
+.L2441:
+	str	wzr, [x21, #:lo12:.LANCHOR168]
+	b	.L2440
+.L2391:
 	add	x22, x22, 56
-	b	.L2387
-.L2392:
+	b	.L2390
+.L2395:
 	add	x1, x19, :lo12:.LANCHOR201
 	ldrh	w0, [x1, 2]
 	add	w20, w20, w0
 	and	w20, w20, 65535
 	strh	w20, [x1, 2]
 	cmp	w26, w20
-	bhi	.L2394
+	bhi	.L2397
 	adrp	x0, .LANCHOR102
 	ldr	w0, [x0, #:lo12:.LANCHOR102]
-	cbz	w0, .L2395
+	cbz	w0, .L2398
 	bl	Ftl_gc_temp_data_write_back
-	cbnz	w0, .L2438
-.L2395:
+	cbnz	w0, .L2441
+.L2398:
 	adrp	x0, .LANCHOR236
 	ldrh	w0, [x0, #:lo12:.LANCHOR236]
-	cbnz	w0, .L2396
+	cbnz	w0, .L2399
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
-	adrp	x1, .LANCHOR82
-	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR83
+	ldr	x1, [x1, #:lo12:.LANCHOR83]
 	lsl	x0, x0, 1
 	ldrh	w2, [x1, x0]
-	cbz	w2, .L2396
+	cbz	w2, .L2399
 	strh	wzr, [x1, x0]
 	ldrh	w0, [x19, #:lo12:.LANCHOR201]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L2396:
+.L2399:
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR201]
-.L2394:
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+.L2397:
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 2
-	bhi	.L2397
+	bhi	.L2400
 	ldr	x0, [x29, 128]
-	ldrh	w20, [x0, #:lo12:.LANCHOR51]
-	b	.L2368
-.L2397:
-	str	wzr, [x21, #:lo12:.LANCHOR169]
+	ldrh	w20, [x0, #:lo12:.LANCHOR52]
+	b	.L2371
+.L2400:
+	str	wzr, [x21, #:lo12:.LANCHOR168]
 	add	w0, w0, 1
-	b	.L2346
-.L2398:
+	b	.L2349
+.L2401:
 	mov	w0, 0
 	ret
-.L2400:
+.L2403:
 	mov	w0, 0
-	b	.L2346
+	b	.L2349
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
 	.section	.text.FtlInit,"ax",@progbits
 	.align	2
@@ -16609,8 +16630,8 @@ rk_ftl_garbage_collect:
 	.type	FtlInit, %function
 FtlInit:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LC48
-	add	x1, x1, :lo12:.LC48
+	adrp	x1, .LC51
+	add	x1, x1, :lo12:.LC51
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR223
@@ -16619,55 +16640,55 @@ FtlInit:
 	str	w0, [x19, #:lo12:.LANCHOR223]
 	adrp	x0, .LANCHOR239
 	str	wzr, [x0, #:lo12:.LANCHOR239]
-	adrp	x0, .LANCHOR75
-	str	wzr, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	adrp	x0, .LANCHOR76
+	str	wzr, [x0, #:lo12:.LANCHOR76]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
 	mov	x0, x20
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	adrp	x0, .LANCHOR37
-	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2440
+	cbz	w0, .L2443
 	adrp	x1, .LANCHOR240
-	adrp	x0, .LC49
+	adrp	x0, .LC52
 	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC49
-.L2448:
+	add	x0, x0, :lo12:.LC52
+.L2451:
 	bl	printf
-.L2441:
+.L2444:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L2440:
+.L2443:
 	bl	FtlSysBlkInit
-	cbz	w0, .L2442
+	cbz	w0, .L2445
 	adrp	x1, .LANCHOR240
-	adrp	x0, .LC50
+	adrp	x0, .LC53
 	add	x1, x1, :lo12:.LANCHOR240
-	add	x0, x0, :lo12:.LC50
-	b	.L2448
-.L2442:
+	add	x0, x0, :lo12:.LC53
+	b	.L2451
+.L2445:
 	mov	w1, 1
 	str	w1, [x19, #:lo12:.LANCHOR223]
 	bl	rk_ftl_garbage_collect
-	adrp	x0, .LANCHOR87
-	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR88
+	ldrh	w0, [x0, #:lo12:.LANCHOR88]
 	cmp	w0, 15
-	bhi	.L2441
+	bhi	.L2444
 	mov	w19, 1024
-.L2444:
+.L2447:
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
 	subs	w19, w19, #1
-	bne	.L2444
-	b	.L2441
+	bne	.L2447
+	b	.L2444
 	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
@@ -16679,14 +16700,14 @@ rk_ftl_init:
 	str	x19, [sp, 16]
 	bl	FlashInit
 	mov	w19, w0
-	cbnz	w0, .L2450
+	cbnz	w0, .L2453
 	adrp	x0, .LANCHOR15
 	add	x0, x0, :lo12:.LANCHOR15
 	bl	FtlInit
-.L2450:
+.L2453:
 	mov	w1, w19
-	adrp	x0, .LC51
-	add	x0, x0, :lo12:.LC51
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -16700,84 +16721,84 @@ rk_ftl_init:
 ftl_fix_nand_power_lost_error:
 	adrp	x0, .LANCHOR8
 	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	cbz	w0, .L2467
+	cbz	w0, .L2470
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	str	x25, [sp, 64]
 	adrp	x25, .LANCHOR229
 	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR82
+	adrp	x21, .LANCHOR83
 	ldrh	w23, [x25, #:lo12:.LANCHOR229]
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	stp	x19, x20, [sp, 16]
 	ubfiz	x24, x23, 1, 16
-	adrp	x19, .LC52
+	adrp	x19, .LC55
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC52
+	add	x0, x19, :lo12:.LC55
 	bl	printf
-	adrp	x0, .LANCHOR90
-	add	x6, x0, :lo12:.LANCHOR90
-	ldrh	w0, [x0, #:lo12:.LANCHOR90]
-	bl	FtlGcRefreshBlock
 	adrp	x0, .LANCHOR91
-	add	x20, x0, :lo12:.LANCHOR91
+	add	x6, x0, :lo12:.LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
 	bl	FtlGcRefreshBlock
+	adrp	x0, .LANCHOR92
+	add	x20, x0, :lo12:.LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	bl	FtlGcRefreshBlock
 	mov	x0, x6
 	bl	allocate_new_data_superblock
 	mov	x0, x20
 	mov	w20, 4097
 	bl	allocate_new_data_superblock
-.L2454:
+.L2457:
 	subs	w20, w20, #1
-	beq	.L2458
+	beq	.L2461
 	mov	w1, 1
 	mov	w0, w1
 	bl	rk_ftl_garbage_collect
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w0, [x0, x24]
-	cbnz	w0, .L2454
-.L2458:
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	cbnz	w0, .L2457
+.L2461:
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	add	x0, x19, :lo12:.LC52
+	add	x0, x19, :lo12:.LC55
 	bl	printf
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	ldrh	w19, [x0, x24]
-	cbnz	w19, .L2456
+	cbnz	w19, .L2459
 	add	x20, x29, 128
-	adrp	x22, .LANCHOR76
+	adrp	x22, .LANCHOR77
 	strh	w23, [x20, -48]!
 	mov	x0, x20
 	bl	make_superblock
-	adrp	x0, .LANCHOR36
-	ldr	x4, [x22, #:lo12:.LANCHOR76]
+	adrp	x0, .LANCHOR37
+	ldr	x4, [x22, #:lo12:.LANCHOR77]
 	add	x20, x20, 16
 	mov	w5, 65535
-	ldrh	w3, [x0, #:lo12:.LANCHOR36]
+	ldrh	w3, [x0, #:lo12:.LANCHOR37]
 	mov	w6, 56
 	mov	w0, 0
-.L2459:
+.L2462:
 	cmp	w0, w3
-	bne	.L2461
-	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	bne	.L2464
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
 	mov	w1, w23
 	ldrh	w2, [x0, x24]
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 0
 	bl	FlashEraseBlocks
-	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	ldr	x0, [x22, #:lo12:.LANCHOR77]
 	mov	w2, w19
 	mov	w1, 1
 	bl	FlashEraseBlocks
-.L2456:
+.L2459:
 	mov	w0, -1
 	strh	w0, [x25, #:lo12:.LANCHOR229]
 	ldp	x19, x20, [sp, 16]
@@ -16786,22 +16807,22 @@ ftl_fix_nand_power_lost_error:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2461:
+.L2464:
 	ldrh	w1, [x20]
 	cmp	w1, w5
-	beq	.L2460
+	beq	.L2463
 	umaddl	x2, w19, w6, x4
 	add	w19, w19, 1
 	and	w19, w19, 65535
 	lsl	w1, w1, 10
 	stp	xzr, xzr, [x2, 8]
 	str	w1, [x2, 4]
-.L2460:
+.L2463:
 	add	w0, w0, 1
 	add	x20, x20, 2
 	and	w0, w0, 65535
-	b	.L2459
-.L2467:
+	b	.L2462
+.L2470:
 	ret
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.ftl_read,"ax",@progbits
@@ -16821,13 +16842,13 @@ ftl_read:
 	mov	w26, w2
 	stp	x21, x22, [sp, 32]
 	stp	x27, x28, [sp, 80]
-	bne	.L2471
+	bne	.L2474
 	mov	x2, x3
 	mov	w1, w26
 	add	w0, w19, 256
 	bl	FtlVendorPartRead
 	mov	w21, w0
-.L2470:
+.L2473:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16836,77 +16857,77 @@ ftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2471:
+.L2474:
 	add	w0, w1, w2
 	str	w0, [x29, 136]
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR68
 	add	w1, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w1, w0
-	bhi	.L2493
+	bhi	.L2496
 	adrp	x0, .LANCHOR223
 	ldr	w21, [x0, #:lo12:.LANCHOR223]
 	cmn	w21, #1
-	beq	.L2470
-	adrp	x22, .LANCHOR54
+	beq	.L2473
+	adrp	x22, .LANCHOR55
 	bl	FtlCacheWriteBack
 	mov	w25, 0
 	mov	w21, 0
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
-	adrp	x27, .LANCHOR178
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
+	adrp	x27, .LANCHOR177
 	stp	wzr, wzr, [x29, 144]
 	udiv	w1, w19, w0
 	str	w1, [x29, 152]
 	add	w1, w19, w26
 	sub	w24, w1, #1
-	adrp	x1, .LANCHOR164
+	adrp	x1, .LANCHOR163
 	ldr	w20, [x29, 152]
 	udiv	w24, w24, w0
 	ldr	w0, [x29, 152]
 	sub	w0, w24, w0
 	add	w0, w0, 1
 	str	w0, [x29, 156]
-	ldr	w0, [x1, #:lo12:.LANCHOR164]
+	ldr	w0, [x1, #:lo12:.LANCHOR163]
 	ldr	w2, [x29, 156]
 	add	w0, w0, w2
-	str	w0, [x1, #:lo12:.LANCHOR164]
-.L2473:
+	str	w0, [x1, #:lo12:.LANCHOR163]
+.L2476:
 	ldr	w0, [x29, 156]
-	cbnz	w0, .L2492
+	cbnz	w0, .L2495
 	adrp	x0, .LANCHOR114
 	ldrh	w0, [x0, #:lo12:.LANCHOR114]
-	cbz	w0, .L2470
+	cbz	w0, .L2473
 	mov	w1, 1
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-	b	.L2470
-.L2492:
+	b	.L2473
+.L2495:
 	add	x1, x29, 172
 	mov	w2, 0
 	mov	w0, w20
 	bl	log2phys
 	ldr	w1, [x29, 172]
 	cmn	w1, #1
-	bne	.L2474
-	add	x3, x22, :lo12:.LANCHOR54
+	bne	.L2477
+	add	x3, x22, :lo12:.LANCHOR55
 	mov	w28, 0
-.L2475:
+.L2478:
 	ldrh	w0, [x3]
 	cmp	w28, w0
-	bcc	.L2477
-.L2478:
+	bcc	.L2480
+.L2481:
 	ldr	w0, [x29, 156]
 	add	w20, w20, 1
 	subs	w0, w0, #1
 	str	w0, [x29, 156]
-	beq	.L2482
-	adrp	x0, .LANCHOR36
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	beq	.L2485
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w25, w0, lsl 2
-	bne	.L2473
-.L2482:
-	cbz	w25, .L2473
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	bne	.L2476
+.L2485:
+	cbz	w25, .L2476
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	mov	w1, w25
 	mov	w2, 0
 	bl	FlashReadPages
@@ -16923,50 +16944,50 @@ ftl_read:
 	umull	x0, w25, w0
 	mov	x25, 0
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR136
-	add	x28, x0, :lo12:.LANCHOR136
-.L2491:
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	adrp	x0, .LANCHOR135
+	add	x28, x0, :lo12:.LANCHOR135
+.L2494:
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	ldr	w2, [x29, 152]
 	add	x0, x0, x25
 	ldr	w1, [x0, 24]
 	cmp	w2, w1
-	bne	.L2484
+	bne	.L2487
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR183
 	ldr	x0, [x0, #:lo12:.LANCHOR183]
 	cmp	x1, x0
-	bne	.L2485
+	bne	.L2488
 	ldr	x0, [x29, 128]
 	ldr	w2, [x29, 124]
 	add	x1, x1, x0
 	mov	x0, x23
-.L2508:
+.L2511:
 	bl	ftl_memcpy
-.L2485:
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+.L2488:
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	add	x1, x0, x25
 	ldr	w0, [x0, x25]
 	cmn	w0, #1
-	bne	.L2486
+	bne	.L2489
 	ldr	w1, [x28, 72]
 	mov	w21, w0
 	add	w1, w1, 1
 	str	w1, [x28, 72]
-.L2487:
+.L2490:
 	ldr	x0, [x29, 104]
 	add	x25, x25, 56
 	cmp	x0, x25
-	bne	.L2491
+	bne	.L2494
 	mov	w25, 0
-	b	.L2473
-.L2477:
+	b	.L2476
+.L2480:
 	madd	w0, w20, w0, w28
 	cmp	w19, w0
-	bhi	.L2476
+	bhi	.L2479
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2476
+	bls	.L2479
 	sub	w0, w0, w19
 	str	x3, [x29, 128]
 	lsl	w0, w0, 9
@@ -16975,21 +16996,21 @@ ftl_read:
 	add	x0, x23, x0
 	bl	ftl_memset
 	ldr	x3, [x29, 128]
-.L2476:
+.L2479:
 	add	w28, w28, 1
-	b	.L2475
-.L2474:
-	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	b	.L2478
+.L2477:
+	ldr	x0, [x27, #:lo12:.LANCHOR177]
 	mov	w2, 56
 	umaddl	x0, w25, w2, x0
 	str	w1, [x0, 4]
 	ldr	w1, [x29, 152]
 	cmp	w20, w1
-	bne	.L2479
+	bne	.L2482
 	adrp	x1, .LANCHOR183
 	ldr	x1, [x1, #:lo12:.LANCHOR183]
 	str	x1, [x0, 8]
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	udiv	w2, w19, w1
 	msub	w2, w2, w1, w19
 	str	w2, [x29, 140]
@@ -16998,24 +17019,24 @@ ftl_read:
 	csel	w2, w26, w2, ls
 	str	w2, [x29, 148]
 	cmp	w1, w2
-	bne	.L2480
+	bne	.L2483
 	str	x23, [x0, 8]
-.L2480:
-	adrp	x1, .LANCHOR57
+.L2483:
+	adrp	x1, .LANCHOR58
 	adrp	x2, .LANCHOR186
 	str	w20, [x0, 24]
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
 	ldr	x2, [x2, #:lo12:.LANCHOR186]
 	mul	w1, w1, w25
 	add	w25, w25, 1
 	and	x1, x1, 4294967292
 	add	x1, x2, x1
 	str	x1, [x0, 16]
-	b	.L2478
-.L2479:
+	b	.L2481
+.L2482:
 	cmp	w20, w24
-	bne	.L2481
-	ldrh	w2, [x22, #:lo12:.LANCHOR54]
+	bne	.L2484
+	ldrh	w2, [x22, #:lo12:.LANCHOR55]
 	adrp	x1, .LANCHOR184
 	ldr	w3, [x29, 136]
 	ldr	x1, [x1, #:lo12:.LANCHOR184]
@@ -17024,35 +17045,35 @@ ftl_read:
 	sub	w3, w3, w1
 	str	w3, [x29, 144]
 	cmp	w2, w3
-	bne	.L2480
-.L2507:
+	bne	.L2483
+.L2510:
 	sub	w1, w1, w19
 	lsl	w1, w1, 9
 	add	x1, x23, x1
 	str	x1, [x0, 8]
-	b	.L2480
-.L2481:
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	mul	w1, w1, w20
-	b	.L2507
+	b	.L2483
 .L2484:
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
+	mul	w1, w1, w20
+	b	.L2510
+.L2487:
 	cmp	w24, w1
-	bne	.L2485
+	bne	.L2488
 	ldr	x1, [x0, 8]
 	adrp	x0, .LANCHOR184
 	ldr	x0, [x0, #:lo12:.LANCHOR184]
 	cmp	x1, x0
-	bne	.L2485
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	bne	.L2488
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	ldr	w2, [x29, 120]
 	mul	w0, w0, w24
 	sub	w0, w0, w19
 	lsl	w0, w0, 9
 	add	x0, x23, x0
-	b	.L2508
-.L2486:
+	b	.L2511
+.L2489:
 	cmp	w0, 256
-	bne	.L2487
+	bne	.L2490
 	ldr	w0, [x1, 4]
 	lsr	w0, w0, 10
 	bl	P2V_block_in_plane
@@ -17060,13 +17081,13 @@ ftl_read:
 	str	w1, [x29, 116]
 	bl	FtlGcRefreshBlock
 	mov	w2, 2049
-.L2489:
+.L2492:
 	subs	w2, w2, #1
-	bne	.L2488
-.L2490:
+	bne	.L2491
+.L2493:
 	bl	FtlSysFlush
-	b	.L2487
-.L2488:
+	b	.L2490
+.L2491:
 	mov	w1, 1
 	str	w2, [x29, 112]
 	mov	w0, w1
@@ -17075,11 +17096,11 @@ ftl_read:
 	ldp	w2, w1, [x29, 112]
 	ldrh	w0, [x0, #:lo12:.LANCHOR201]
 	cmp	w0, w1
-	beq	.L2489
-	b	.L2490
-.L2493:
+	beq	.L2492
+	b	.L2493
+.L2496:
 	mov	w21, -1
-	b	.L2470
+	b	.L2473
 	.size	ftl_read, .-ftl_read
 	.section	.text.ftl_write,"ax",@progbits
 	.align	2
@@ -17098,12 +17119,12 @@ ftl_write:
 	mov	w22, w1
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	bne	.L2510
+	bne	.L2513
 	mov	x2, x3
 	mov	w1, w25
 	add	w0, w22, 256
 	bl	FtlVendorPartWrite
-.L2509:
+.L2512:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17111,72 +17132,72 @@ ftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 240
 	ret
-.L2510:
-	adrp	x0, .LANCHOR67
+.L2513:
+	adrp	x0, .LANCHOR68
 	add	w2, w1, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ldr	w0, [x0, #:lo12:.LANCHOR68]
 	cmp	w2, w0
-	bhi	.L2544
+	bhi	.L2547
 	adrp	x0, .LANCHOR223
 	ldr	w0, [x0, #:lo12:.LANCHOR223]
 	cmn	w0, #1
-	beq	.L2509
+	beq	.L2512
 	adrp	x0, .LANCHOR241
-	adrp	x3, .LANCHOR54
+	adrp	x3, .LANCHOR55
 	mov	w1, 2048
 	sub	w2, w2, #1
 	str	w1, [x0, #:lo12:.LANCHOR241]
-	ldrh	w1, [x3, #:lo12:.LANCHOR54]
+	ldrh	w1, [x3, #:lo12:.LANCHOR55]
 	str	x3, [x29, 160]
 	udiv	w0, w2, w1
-	adrp	x2, .LANCHOR160
+	adrp	x2, .LANCHOR159
 	udiv	w21, w22, w1
 	str	w0, [x29, 152]
 	sub	w23, w0, w21
-	ldr	w0, [x2, #:lo12:.LANCHOR160]
+	ldr	w0, [x2, #:lo12:.LANCHOR159]
 	add	w24, w23, 1
 	add	w0, w0, w24
-	str	w0, [x2, #:lo12:.LANCHOR160]
+	str	w0, [x2, #:lo12:.LANCHOR159]
 	adrp	x0, .LANCHOR129
 	str	x0, [x29, 120]
 	ldr	x2, [x0, #:lo12:.LANCHOR129]
-	cbz	x2, .L2512
+	cbz	x2, .L2515
 	ldr	w0, [x2, 24]
 	cmp	w21, w0
-	beq	.L2513
+	beq	.L2516
 	bl	FtlCacheWriteBack
-.L2512:
-	adrp	x0, .LANCHOR90
+.L2515:
+	adrp	x0, .LANCHOR91
 	mov	w19, w21
-	add	x23, x0, :lo12:.LANCHOR90
-.L2514:
-	cbz	w24, .L2543
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	adrp	x1, .LANCHOR36
+	add	x23, x0, :lo12:.LANCHOR91
+.L2517:
+	cbz	w24, .L2546
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
+	adrp	x1, .LANCHOR37
 	str	x1, [x29, 112]
 	ldrb	w2, [x0, 6]
-	ldrh	w0, [x1, #:lo12:.LANCHOR36]
+	ldrh	w0, [x1, #:lo12:.LANCHOR37]
 	cmp	w2, w0
-	bcc	.L2515
-	mov	w2, 1632
+	bcc	.L2518
+	mov	w2, 1644
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2515:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2518:
 	ldrh	w0, [x23, 4]
-	cbnz	w0, .L2516
+	cbnz	w0, .L2519
 	bl	FtlCacheWriteBack
 	mov	x0, x23
 	bl	allocate_new_data_superblock
-.L2516:
+.L2519:
 	ldrb	w0, [x23, 7]
 	ldrh	w1, [x23, 4]
 	lsl	w0, w0, 2
@@ -17187,52 +17208,52 @@ ftl_write:
 	csel	w0, w0, w24, ls
 	str	w0, [x29, 144]
 	ldr	x0, [x29, 112]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L2517
-	mov	w2, 1665
+	bcc	.L2520
+	mov	w2, 1677
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2517:
-	adrp	x0, .LANCHOR57
-	adrp	x28, .LANCHOR180
-	add	x0, x0, :lo12:.LANCHOR57
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2520:
+	adrp	x0, .LANCHOR58
+	adrp	x28, .LANCHOR179
+	add	x0, x0, :lo12:.LANCHOR58
 	str	xzr, [x29, 168]
 	str	x0, [x29, 104]
-.L2518:
+.L2521:
 	ldr	w1, [x29, 144]
 	ldr	w27, [x29, 168]
 	cmp	w27, w1
-	bcc	.L2539
+	bcc	.L2542
 	mov	x27, x1
-.L2519:
+.L2522:
 	ldr	x0, [x29, 120]
 	ldr	x0, [x0, #:lo12:.LANCHOR129]
-	cbz	x0, .L2540
+	cbz	x0, .L2543
 	sub	w24, w24, #1
 	subs	w27, w27, #1
-	bne	.L2540
-.L2543:
+	bne	.L2543
+.L2546:
 	ldr	w0, [x29, 152]
 	sub	w1, w0, w21
 	mov	w0, 0
 	bl	rk_ftl_garbage_collect
-.L2546:
+.L2549:
 	mov	w0, 0
-	b	.L2509
-.L2513:
-	adrp	x3, .LANCHOR162
-	ldr	w0, [x3, #:lo12:.LANCHOR162]
+	b	.L2512
+.L2516:
+	adrp	x3, .LANCHOR161
+	ldr	w0, [x3, #:lo12:.LANCHOR161]
 	add	w0, w0, 1
-	str	w0, [x3, #:lo12:.LANCHOR162]
+	str	w0, [x3, #:lo12:.LANCHOR161]
 	msub	w0, w21, w1, w22
 	ldr	x3, [x2, 8]
 	sub	w1, w1, w0
@@ -17244,17 +17265,17 @@ ftl_write:
 	mov	x1, x26
 	mov	w2, w20
 	bl	ftl_memcpy
-	cbz	w23, .L2546
+	cbz	w23, .L2549
 	sub	w25, w25, w19
 	add	w22, w22, w19
 	add	x26, x26, x20
 	add	w21, w21, 1
 	bl	FtlCacheWriteBack
 	mov	w24, w23
-	b	.L2512
-.L2539:
+	b	.L2515
+.L2542:
 	ldrh	w0, [x23, 4]
-	cbz	w0, .L2519
+	cbz	w0, .L2522
 	add	x1, x29, 180
 	mov	w2, 0
 	mov	w0, w19
@@ -17264,8 +17285,8 @@ ftl_write:
 	bl	get_new_active_ppa
 	ldr	x1, [x29, 168]
 	mul	x20, x1, x20
-	adrp	x1, .LANCHOR180
-	ldr	x1, [x1, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR179
+	ldr	x1, [x1, #:lo12:.LANCHOR179]
 	add	x1, x1, x20
 	str	w0, [x1, 4]
 	ldr	x0, [x29, 104]
@@ -17286,11 +17307,11 @@ ftl_write:
 	ldr	w0, [x29, 152]
 	cmp	w19, w21
 	ccmp	w19, w0, 4, ne
-	bne	.L2520
+	bne	.L2523
 	cmp	w19, w21
-	bne	.L2521
+	bne	.L2524
 	ldr	x0, [x29, 160]
-	ldrh	w2, [x0, #:lo12:.LANCHOR54]
+	ldrh	w2, [x0, #:lo12:.LANCHOR55]
 	udiv	w0, w22, w2
 	msub	w0, w0, w2, w22
 	str	w0, [x29, 148]
@@ -17298,46 +17319,46 @@ ftl_write:
 	cmp	w2, w25
 	csel	w0, w2, w25, ls
 	str	w0, [x29, 156]
-.L2522:
+.L2525:
 	ldr	x0, [x29, 160]
 	ldr	w1, [x29, 156]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	cmp	w1, w0
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
-	bne	.L2523
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
+	bne	.L2526
 	add	x20, x0, x20
 	cmp	w19, w21
-	bne	.L2524
+	bne	.L2527
 	str	x26, [x20, 8]
-.L2525:
+.L2528:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x23, 6]
-	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
 	cmp	w1, w0
-	bcc	.L2536
-	mov	w2, 1739
+	bcc	.L2539
+	mov	w2, 1751
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2536:
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L2539:
 	ldp	x1, x2, [x29, 128]
 	mov	w0, -3947
 	strh	w0, [x1, x2]
-	adrp	x1, .LANCHOR158
-	ldr	w0, [x1, #:lo12:.LANCHOR158]
+	adrp	x1, .LANCHOR157
+	ldr	w0, [x1, #:lo12:.LANCHOR157]
 	stp	w0, w19, [x27, 4]
 	add	w19, w19, 1
 	add	w0, w0, 1
 	cmn	w0, #1
 	csel	w0, w0, wzr, ne
-	str	w0, [x1, #:lo12:.LANCHOR158]
+	str	w0, [x1, #:lo12:.LANCHOR157]
 	ldr	w0, [x29, 180]
 	str	w0, [x27, 12]
 	ldrh	w0, [x23]
@@ -17345,39 +17366,39 @@ ftl_write:
 	ldr	x0, [x29, 168]
 	add	x0, x0, 1
 	str	x0, [x29, 168]
-	b	.L2518
-.L2521:
+	b	.L2521
+.L2524:
 	ldr	x0, [x29, 160]
 	add	w2, w22, w25
 	str	wzr, [x29, 148]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
 	msub	w2, w19, w0, w2
 	and	w0, w2, 65535
 	str	w0, [x29, 156]
-	b	.L2522
-.L2524:
+	b	.L2525
+.L2527:
 	ldr	w0, [x29, 156]
-.L2561:
+.L2564:
 	mul	w0, w0, w19
 	sub	w0, w0, w22
 	lsl	w0, w0, 9
 	add	x0, x26, x0
 	str	x0, [x20, 8]
-	b	.L2525
-.L2523:
+	b	.L2528
+.L2526:
 	add	x0, x0, x20
 	cmp	w19, w21
-	bne	.L2526
+	bne	.L2529
 	adrp	x1, .LANCHOR183
 	ldr	x1, [x1, #:lo12:.LANCHOR183]
-.L2560:
+.L2563:
 	str	x1, [x0, 8]
 	ldr	w0, [x29, 180]
 	cmn	w0, #1
-	beq	.L2528
+	beq	.L2531
 	str	w0, [x29, 188]
 	mov	w2, 0
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
 	str	w19, [x29, 208]
 	add	x0, x0, x20
 	ldp	x1, x0, [x0, 8]
@@ -17387,18 +17408,18 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	w0, [x29, 184]
 	cmn	w0, #1
-	bne	.L2529
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	bne	.L2532
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w1, [x0, 72]
 	add	w1, w1, 1
 	str	w1, [x0, 72]
-.L2532:
+.L2535:
 	ldr	w0, [x29, 156]
 	cmp	w19, w21
 	lsl	w2, w0, 9
-	bne	.L2533
-	ldr	x1, [x28, #:lo12:.LANCHOR180]
+	bne	.L2536
+	ldr	x1, [x28, #:lo12:.LANCHOR179]
 	ldr	w0, [x29, 148]
 	add	x1, x1, x20
 	lsl	w0, w0, 9
@@ -17408,104 +17429,104 @@ ftl_write:
 	bl	ftl_memcpy
 	ldr	w0, [x29, 152]
 	cmp	w19, w0
-	bne	.L2525
-.L2534:
+	bne	.L2528
+.L2537:
 	ldrh	w0, [x23, 4]
-	cbz	w0, .L2525
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	cbz	w0, .L2528
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
 	add	x20, x0, x20
 	ldr	x0, [x29, 120]
 	str	x20, [x0, #:lo12:.LANCHOR129]
 	adrp	x0, .LANCHOR221
 	str	x23, [x0, #:lo12:.LANCHOR221]
-	b	.L2525
-.L2526:
+	b	.L2528
+.L2529:
 	adrp	x1, .LANCHOR184
 	ldr	x1, [x1, #:lo12:.LANCHOR184]
-	b	.L2560
-.L2529:
+	b	.L2563
+.L2532:
 	ldr	w1, [x27, 8]
 	cmp	w19, w1
-	beq	.L2531
-	adrp	x0, .LANCHOR136
-	add	x0, x0, :lo12:.LANCHOR136
+	beq	.L2534
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
 	ldr	w2, [x0, 72]
 	add	w2, w2, 1
 	str	w2, [x0, 72]
-	adrp	x0, .LC54
+	adrp	x0, .LC57
 	mov	w2, w19
-	add	x0, x0, :lo12:.LC54
+	add	x0, x0, :lo12:.LC57
 	bl	printf
-.L2531:
+.L2534:
 	ldr	w0, [x27, 8]
 	cmp	w19, w0
-	beq	.L2532
-	mov	w2, 1718
+	beq	.L2535
+	mov	w2, 1730
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-	b	.L2532
-.L2528:
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
-	adrp	x1, .LANCHOR56
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	b	.L2535
+.L2531:
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR57
 	add	x0, x0, x20
-	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
 	mov	w1, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	b	.L2532
-.L2533:
+	b	.L2535
+.L2536:
 	ldr	x0, [x29, 160]
-	ldrh	w1, [x0, #:lo12:.LANCHOR54]
-	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	ldrh	w1, [x0, #:lo12:.LANCHOR55]
+	ldr	x0, [x28, #:lo12:.LANCHOR179]
 	add	x0, x0, x20
 	mul	w1, w1, w19
 	ldr	x0, [x0, 8]
 	sub	w1, w1, w22
 	lsl	w1, w1, 9
-	add	x1, x26, x1
-	bl	ftl_memcpy
-	b	.L2534
-.L2520:
-	adrp	x0, .LANCHOR180
-	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	add	x1, x26, x1
+	bl	ftl_memcpy
+	b	.L2537
+.L2523:
+	adrp	x0, .LANCHOR179
+	ldr	x0, [x0, #:lo12:.LANCHOR179]
 	add	x20, x0, x20
 	ldr	x0, [x29, 160]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
-	b	.L2561
-.L2540:
-	adrp	x0, .LANCHOR180
+	ldrh	w0, [x0, #:lo12:.LANCHOR55]
+	b	.L2564
+.L2543:
+	adrp	x0, .LANCHOR179
 	mov	x3, x23
 	mov	w2, 0
 	mov	w1, w27
-	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	ldr	x0, [x0, #:lo12:.LANCHOR179]
 	bl	FtlProgPages
 	cmp	w24, w27
-	bcs	.L2541
-	mov	w2, 1754
+	bcs	.L2544
+	mov	w2, 1766
 	adrp	x1, .LANCHOR242
-	adrp	x0, .LC4
-	add	x1, x1, :lo12:.LANCHOR242
-	add	x0, x0, :lo12:.LC4
-	bl	printf
-	adrp	x1, .LC5
 	adrp	x0, .LC6
-	add	x1, x1, :lo12:.LC5
+	add	x1, x1, :lo12:.LANCHOR242
 	add	x0, x0, :lo12:.LC6
 	bl	printf
-.L2541:
-	sub	w24, w24, w27
-	b	.L2514
+	adrp	x1, .LC7
+	adrp	x0, .LC8
+	add	x1, x1, :lo12:.LC7
+	add	x0, x0, :lo12:.LC8
+	bl	printf
 .L2544:
+	sub	w24, w24, w27
+	b	.L2517
+.L2547:
 	mov	w0, -1
-	b	.L2509
+	b	.L2512
 	.size	ftl_write, .-ftl_write
 	.section	.text.FlashReadFacBbtData,"ax",@progbits
 	.align	2
@@ -17521,7 +17542,7 @@ FlashReadFacBbtData:
 	stp	x23, x24, [sp, 48]
 	mov	x23, x0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR145
+	adrp	x21, .LANCHOR144
 	ldrh	w0, [x1, 14]
 	mov	w24, w2
 	ldrh	w1, [x1, 12]
@@ -17529,7 +17550,7 @@ FlashReadFacBbtData:
 	str	x27, [sp, 80]
 	mov	w27, 61664
 	mul	w0, w0, w1
-	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
 	str	x1, [x29, 112]
 	and	w0, w0, 65535
 	adrp	x1, .LANCHOR194
@@ -17540,11 +17561,11 @@ FlashReadFacBbtData:
 	mul	w26, w0, w25
 	mov	x22, x1
 	str	x2, [x29, 120]
-.L2563:
+.L2566:
 	cmp	w19, w20
-	ble	.L2570
+	ble	.L2573
 	mov	w0, -1
-.L2562:
+.L2565:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17552,7 +17573,7 @@ FlashReadFacBbtData:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2570:
+.L2573:
 	add	w0, w20, w26
 	mov	w2, 1
 	lsl	w0, w0, 10
@@ -17562,37 +17583,37 @@ FlashReadFacBbtData:
 	bl	FlashReadPages
 	ldr	w0, [x29, 104]
 	cmn	w0, #1
-	beq	.L2564
+	beq	.L2567
 	ldr	x0, [x22, #:lo12:.LANCHOR194]
 	ldrh	w0, [x0]
 	cmp	w0, w27
-	bne	.L2564
-	cbz	x23, .L2571
-	cbz	w25, .L2566
-.L2569:
-	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	bne	.L2567
+	cbz	x23, .L2574
+	cbz	w25, .L2569
+.L2572:
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
 	mov	w2, w24
 	mov	x0, x23
 	bl	ftl_memcpy
 	mov	w3, 4
-	adrp	x0, .LC55
+	adrp	x0, .LC58
 	mov	w2, w3
 	mov	x1, x23
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC58
 	bl	rknand_print_hex
-.L2571:
+.L2574:
 	mov	w0, 0
-	b	.L2562
-.L2566:
-	ldr	x5, [x21, #:lo12:.LANCHOR145]
-	adrp	x2, .LANCHOR147
-	add	x2, x2, :lo12:.LANCHOR147
+	b	.L2565
+.L2569:
+	ldr	x5, [x21, #:lo12:.LANCHOR144]
+	adrp	x2, .LANCHOR146
+	add	x2, x2, :lo12:.LANCHOR146
 	mov	w0, 0
 	mov	w6, 1
-.L2567:
+.L2570:
 	ldr	w1, [x2]
 	cmp	w0, w1
-	bcs	.L2569
+	bcs	.L2572
 	ubfx	x1, x0, 5, 11
 	and	w3, w0, 31
 	lsl	x1, x1, 2
@@ -17602,11 +17623,11 @@ FlashReadFacBbtData:
 	ldr	w3, [x5, x1]
 	orr	w3, w3, w4
 	str	w3, [x5, x1]
-	b	.L2567
-.L2564:
+	b	.L2570
+.L2567:
 	sub	w20, w20, #1
 	and	w20, w20, 65535
-	b	.L2563
+	b	.L2566
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",@progbits
 	.align	2
@@ -17621,19 +17642,19 @@ FlashGetBadBlockList:
 	ldr	x0, [x0, #:lo12:.LANCHOR18]
 	ldrh	w19, [x0, 14]
 	str	x21, [sp, 32]
-	adrp	x21, .LANCHOR151
+	adrp	x21, .LANCHOR150
 	ldrb	w2, [x0, 13]
-	ldr	x0, [x21, #:lo12:.LANCHOR151]
+	ldr	x0, [x21, #:lo12:.LANCHOR150]
 	mul	w19, w19, w2
 	and	w19, w19, 65535
 	add	w2, w19, 7
 	lsr	w2, w2, 3
 	bl	FlashReadFacBbtData
 	cmn	w0, #1
-	bne	.L2577
-.L2581:
+	bne	.L2580
+.L2584:
 	mov	w0, 0
-.L2578:
+.L2581:
 	ubfiz	x0, x0, 1, 16
 	mov	w1, -1
 	ldr	x21, [sp, 32]
@@ -17642,32 +17663,32 @@ FlashGetBadBlockList:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2577:
-	ldr	x4, [x21, #:lo12:.LANCHOR151]
+.L2580:
+	ldr	x4, [x21, #:lo12:.LANCHOR150]
 	lsr	w5, w19, 4
 	sub	w19, w19, #1
 	mov	w1, 0
 	mov	w0, 0
 	mov	w6, 1
-.L2579:
+.L2582:
 	cmp	w1, w19
-	bge	.L2578
+	bge	.L2581
 	ubfx	x3, x1, 5, 11
 	and	w2, w1, 31
 	lsl	w2, w6, w2
 	ldr	w3, [x4, x3, lsl 2]
 	tst	w2, w3
-	beq	.L2580
+	beq	.L2583
 	add	w2, w0, 1
 	ubfiz	x0, x0, 1, 16
 	strh	w1, [x20, x0]
 	and	w0, w2, 65535
-.L2580:
+.L2583:
 	cmp	w0, w5
-	bcs	.L2581
+	bcs	.L2584
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L2579
+	b	.L2582
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",@progbits
 	.align	2
@@ -17675,75 +17696,75 @@ FlashGetBadBlockList:
 	.type	FtlMakeBbt, %function
 FtlMakeBbt:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR76
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	ldr	w21, [x0, #:lo12:.LANCHOR75]
+	ldr	w21, [x0, #:lo12:.LANCHOR76]
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbnz	w21, .L2588
+	cbnz	w21, .L2591
 	bl	FtlBbtMemInit
-	adrp	x20, .LANCHOR73
-	add	x22, x20, :lo12:.LANCHOR73
+	adrp	x20, .LANCHOR74
+	add	x22, x20, :lo12:.LANCHOR74
 	bl	FtlLoadFactoryBbt
 	add	x24, x22, 32
 	adrp	x28, .LANCHOR199
 	add	x22, x22, 12
 	add	x25, x28, :lo12:.LANCHOR199
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR44
+	add	x0, x0, :lo12:.LANCHOR44
 	str	x0, [x29, 120]
-.L2589:
+.L2592:
 	ldr	x0, [x29, 120]
 	ldrh	w0, [x0]
 	cmp	w21, w0
-	bcc	.L2595
-	adrp	x21, .LANCHOR58
-	add	x21, x21, :lo12:.LANCHOR58
+	bcc	.L2598
+	adrp	x21, .LANCHOR59
+	add	x21, x21, :lo12:.LANCHOR59
 	mov	w19, 0
-.L2596:
+.L2599:
 	ldrh	w0, [x21]
 	cmp	w0, w19
-	bhi	.L2597
-	add	x21, x20, :lo12:.LANCHOR73
+	bhi	.L2600
+	add	x21, x20, :lo12:.LANCHOR74
 	mov	w22, 65535
 	ldrh	w19, [x21, 12]
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-.L2598:
+.L2601:
 	ldrh	w0, [x21, 12]
 	sub	w0, w0, #47
 	cmp	w0, w19
-	bgt	.L2602
+	bgt	.L2605
 	mov	w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2599
+	beq	.L2602
 	mov	w0, w19
 	bl	FlashTestBlk
-	cbz	w0, .L2600
+	cbz	w0, .L2603
 	mov	w0, w19
 	bl	FtlBbmMapBadBlock
-.L2599:
+.L2602:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2598
-.L2595:
+	b	.L2601
+.L2598:
 	adrp	x2, .LANCHOR185
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR180
 	add	x19, x28, :lo12:.LANCHOR199
 	ldrh	w1, [x22]
-	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x0, #:lo12:.LANCHOR180]
 	mov	w3, 65535
 	ldr	x26, [x2, #:lo12:.LANCHOR185]
 	cmp	w1, w3
 	stp	x0, x26, [x19, 8]
-	adrp	x23, .LANCHOR49
+	adrp	x23, .LANCHOR50
 	str	x2, [x29, 112]
-	beq	.L2590
-	ldrh	w4, [x23, #:lo12:.LANCHOR49]
+	beq	.L2593
+	ldrh	w4, [x23, #:lo12:.LANCHOR50]
 	mov	w2, 1
 	madd	w27, w4, w21, w1
 	mov	w1, w2
@@ -17753,36 +17774,36 @@ FtlMakeBbt:
 	bl	FlashReadPages
 	ldr	x1, [x19, 8]
 	ldr	x0, [x24]
-	ldrh	w2, [x23, #:lo12:.LANCHOR49]
+	ldrh	w2, [x23, #:lo12:.LANCHOR50]
 	add	w2, w2, 7
 	lsr	w2, w2, 3
 	bl	ftl_memcpy
-.L2591:
+.L2594:
 	mov	w0, w27
 	add	w21, w21, 1
 	bl	FtlBbmMapBadBlock
 	add	x24, x24, 8
 	add	x22, x22, 2
-	b	.L2589
-.L2590:
+	b	.L2592
+.L2593:
 	mov	w1, w21
 	bl	FlashGetBadBlockList
 	ldr	x0, [x19, 8]
 	adrp	x27, .LANCHOR120
 	ldr	x1, [x24]
 	bl	FtlBbt2Bitmap
-	ldrh	w19, [x23, #:lo12:.LANCHOR49]
-	add	x23, x23, :lo12:.LANCHOR49
+	ldrh	w19, [x23, #:lo12:.LANCHOR50]
+	add	x23, x23, :lo12:.LANCHOR50
 	add	x0, x27, :lo12:.LANCHOR120
 	sub	w19, w19, #1
 	str	x0, [x29, 104]
 	and	w19, w19, 65535
-.L2592:
+.L2595:
 	ldrh	w0, [x23]
 	madd	w0, w21, w0, w19
 	bl	FtlBbmIsBadBlock
 	cmp	w0, 1
-	beq	.L2593
+	beq	.L2596
 	ldr	x0, [x29, 112]
 	mov	w2, 16
 	strh	w19, [x22]
@@ -17815,34 +17836,34 @@ FtlMakeBbt:
 	bl	FlashProgPages
 	ldr	w0, [x25]
 	cmn	w0, #1
-	bne	.L2591
+	bne	.L2594
 	mov	w0, w27
 	bl	FtlBbmMapBadBlock
-	b	.L2592
-.L2593:
+	b	.L2595
+.L2596:
 	sub	w19, w19, #1
 	and	w19, w19, 65535
-	b	.L2592
-.L2597:
+	b	.L2595
+.L2600:
 	mov	w0, w19
 	add	w19, w19, 1
 	bl	FtlBbmMapBadBlock
 	and	w19, w19, 65535
-	b	.L2596
-.L2600:
+	b	.L2599
+.L2603:
 	ldrh	w0, [x21]
 	cmp	w0, w22
-	bne	.L2601
+	bne	.L2604
 	strh	w19, [x21]
-	b	.L2599
-.L2601:
+	b	.L2602
+.L2604:
 	strh	w19, [x21, 4]
-.L2602:
-	adrp	x0, .LANCHOR76
-	add	x19, x20, :lo12:.LANCHOR73
-	ldrh	w1, [x20, #:lo12:.LANCHOR73]
+.L2605:
+	adrp	x0, .LANCHOR77
+	add	x19, x20, :lo12:.LANCHOR74
+	ldrh	w1, [x20, #:lo12:.LANCHOR74]
 	mov	w2, 2
-	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
 	str	wzr, [x19, 8]
 	lsl	w1, w1, 10
 	strh	wzr, [x19, 2]
@@ -17852,7 +17873,7 @@ FtlMakeBbt:
 	str	w1, [x0, 60]
 	mov	w1, 1
 	bl	FlashEraseBlocks
-	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmMapBadBlock
 	ldrh	w0, [x19, 4]
 	bl	FtlBbmMapBadBlock
@@ -17862,11 +17883,11 @@ FtlMakeBbt:
 	ldrh	w1, [x19, 4]
 	add	w0, w0, 1
 	str	w0, [x19, 8]
-	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	ldrh	w0, [x20, #:lo12:.LANCHOR74]
 	strh	w0, [x19, 4]
-	strh	w1, [x20, #:lo12:.LANCHOR73]
+	strh	w1, [x20, #:lo12:.LANCHOR74]
 	bl	FtlBbmTblFlush
-.L2588:
+.L2591:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -17881,151 +17902,157 @@ FtlMakeBbt:
 	.global	FtlLowFormat
 	.type	FtlLowFormat, %function
 FtlLowFormat:
+	adrp	x0, .LANCHOR76
+	ldr	w0, [x0, #:lo12:.LANCHOR76]
+	cbnz	w0, .L2643
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR65
+	adrp	x0, .LANCHOR192
 	mov	w1, 0
 	add	x29, sp, 0
-	ldrh	w2, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR192
 	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR66
 	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	adrp	x20, .LANCHOR156
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR38
 	stp	x21, x22, [sp, 32]
-	lsl	w2, w2, 2
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
+	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR75
-	ldr	w0, [x0, #:lo12:.LANCHOR75]
-	cbnz	w0, .L2610
-	adrp	x0, .LANCHOR158
-	adrp	x25, .LANCHOR37
-	adrp	x20, .LANCHOR157
-	str	wzr, [x0, #:lo12:.LANCHOR158]
-	ldrh	w0, [x25, #:lo12:.LANCHOR37]
-	str	wzr, [x20, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR128
+	ldrh	w2, [x19, #:lo12:.LANCHOR66]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR128]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	str	wzr, [x20, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR157
+	str	wzr, [x0, #:lo12:.LANCHOR157]
+	ldrh	w0, [x25, #:lo12:.LANCHOR38]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	w0, .L2611
+	cbz	w0, .L2614
 	bl	FtlMakeBbt
-.L2611:
-	adrp	x22, .LANCHOR54
+.L2614:
+	adrp	x22, .LANCHOR55
 	adrp	x0, .LANCHOR183
 	mov	w6, 23752
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	ldrh	w1, [x22, #:lo12:.LANCHOR55]
 	movk	w6, 0xa0f, lsl 16
 	ldr	x4, [x0, #:lo12:.LANCHOR183]
 	adrp	x0, .LANCHOR184
 	lsl	w1, w1, 7
 	ldr	x5, [x0, #:lo12:.LANCHOR184]
 	mov	w0, 0
-.L2612:
+.L2615:
 	cmp	w0, w1
-	blt	.L2613
-	adrp	x21, .LANCHOR38
-	adrp	x19, .LANCHOR39
-	add	x26, x19, :lo12:.LANCHOR39
+	blt	.L2616
+	adrp	x21, .LANCHOR39
+	adrp	x19, .LANCHOR40
+	add	x26, x19, :lo12:.LANCHOR40
 	mov	w23, 0
-	ldrh	w24, [x21, #:lo12:.LANCHOR38]
-.L2614:
+	ldrh	w24, [x21, #:lo12:.LANCHOR39]
+.L2617:
 	ldrh	w0, [x26]
 	cmp	w0, w24
-	bhi	.L2615
-	adrp	x24, .LANCHOR36
+	bhi	.L2618
+	adrp	x24, .LANCHOR37
 	sub	w1, w23, #2
-	ldrh	w0, [x24, #:lo12:.LANCHOR36]
+	ldrh	w0, [x24, #:lo12:.LANCHOR37]
 	cmp	w1, w0, lsl 1
-	bgt	.L2616
-.L2620:
-	add	x26, x21, :lo12:.LANCHOR38
+	bgt	.L2619
+.L2623:
+	add	x26, x21, :lo12:.LANCHOR39
 	mov	w23, 0
 	mov	w25, 0
-.L2617:
+.L2620:
 	ldrh	w0, [x26]
 	cmp	w0, w25
-	bhi	.L2621
-	adrp	x0, .LANCHOR72
-	ldrh	w1, [x19, #:lo12:.LANCHOR39]
-	ldrh	w3, [x24, #:lo12:.LANCHOR36]
-	str	w1, [x0, #:lo12:.LANCHOR72]
-	adrp	x0, .LANCHOR40
+	bhi	.L2624
+	adrp	x0, .LANCHOR73
+	ldrh	w1, [x19, #:lo12:.LANCHOR40]
+	ldrh	w3, [x24, #:lo12:.LANCHOR37]
+	str	w1, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR41
 	adrp	x1, .LANCHOR227
-	ldr	w2, [x0, #:lo12:.LANCHOR40]
-	adrp	x0, .LANCHOR71
+	ldr	w2, [x0, #:lo12:.LANCHOR41]
+	adrp	x0, .LANCHOR72
 	udiv	w6, w2, w3
 	ubfx	x5, x6, 5, 16
-	str	w6, [x0, #:lo12:.LANCHOR71]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w4, w5, 36
 	strh	w4, [x1, #:lo12:.LANCHOR227]
 	mov	w4, 24
 	mul	w4, w3, w4
 	cmp	w23, w4
-	ble	.L2622
+	ble	.L2625
 	sub	w2, w2, w23
 	udiv	w2, w2, w3
-	str	w2, [x0, #:lo12:.LANCHOR71]
+	str	w2, [x0, #:lo12:.LANCHOR72]
 	lsr	w2, w2, 5
 	add	w2, w2, 24
 	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2622:
-	adrp	x2, .LANCHOR101
-	ldr	w2, [x2, #:lo12:.LANCHOR101]
+.L2625:
+	adrp	x2, .LANCHOR28
+	ldr	w2, [x2, #:lo12:.LANCHOR28]
 	cmp	w2, 1
-	bne	.L2623
+	bne	.L2626
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR227]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2623:
+.L2626:
 	adrp	x2, .LANCHOR8
 	ldrb	w2, [x2, #:lo12:.LANCHOR8]
-	cbz	w2, .L2624
+	cbz	w2, .L2627
 	udiv	w4, w23, w3
 	ldrh	w2, [x1, #:lo12:.LANCHOR227]
 	add	w4, w4, w2
 	add	w4, w2, w4, asr 2
 	strh	w4, [x1, #:lo12:.LANCHOR227]
-.L2624:
-	adrp	x2, .LANCHOR47
-	ldrh	w2, [x2, #:lo12:.LANCHOR47]
-	cbz	w2, .L2626
+.L2627:
+	adrp	x2, .LANCHOR48
+	ldrh	w2, [x2, #:lo12:.LANCHOR48]
+	cbz	w2, .L2629
 	ldrh	w4, [x1, #:lo12:.LANCHOR227]
 	add	w4, w4, w2, lsr 1
 	strh	w4, [x1, #:lo12:.LANCHOR227]
 	mul	w4, w2, w3
 	cmp	w23, w4
-	bge	.L2626
+	bge	.L2629
 	add	w2, w2, 32
-	str	w6, [x0, #:lo12:.LANCHOR71]
+	str	w6, [x0, #:lo12:.LANCHOR72]
 	add	w2, w5, w2
 	strh	w2, [x1, #:lo12:.LANCHOR227]
-.L2626:
+.L2629:
 	ldrh	w2, [x1, #:lo12:.LANCHOR227]
 	adrp	x25, .LANCHOR226
-	ldr	w1, [x0, #:lo12:.LANCHOR71]
-	adrp	x24, .LANCHOR82
+	ldr	w1, [x0, #:lo12:.LANCHOR72]
+	adrp	x24, .LANCHOR83
 	mov	w23, -1
 	sub	w1, w1, w2
 	mul	w3, w1, w3
-	adrp	x1, .LANCHOR51
+	adrp	x1, .LANCHOR52
 	str	w3, [x25, #:lo12:.LANCHOR226]
-	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
 	mul	w3, w1, w3
-	str	w3, [x0, #:lo12:.LANCHOR71]
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	str	w3, [x0, #:lo12:.LANCHOR72]
+	ldrh	w0, [x22, #:lo12:.LANCHOR55]
 	mul	w3, w0, w3
-	adrp	x0, .LANCHOR67
-	str	w3, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR68
+	str	w3, [x0, #:lo12:.LANCHOR68]
 	bl	FtlBbmTblFlush
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldr	x0, [x24, #:lo12:.LANCHOR83]
 	mov	w1, 0
-	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	ldrh	w2, [x19, #:lo12:.LANCHOR40]
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR100
 	adrp	x1, .LANCHOR201
-	ldrh	w2, [x21, #:lo12:.LANCHOR38]
-	str	wzr, [x0, #:lo12:.LANCHOR99]
+	ldrh	w2, [x21, #:lo12:.LANCHOR39]
+	str	wzr, [x0, #:lo12:.LANCHOR100]
 	add	x0, x1, :lo12:.LANCHOR201
 	strh	w23, [x1, #:lo12:.LANCHOR201]
 	mov	w1, 255
@@ -18033,9 +18060,9 @@ FtlLowFormat:
 	strh	wzr, [x0, 2]
 	strb	wzr, [x0, 6]
 	strb	wzr, [x0, 8]
-	adrp	x0, .LANCHOR90
-	add	x19, x0, :lo12:.LANCHOR90
-	strh	wzr, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LANCHOR91
+	add	x19, x0, :lo12:.LANCHOR91
+	strh	wzr, [x0, #:lo12:.LANCHOR91]
 	mov	w0, 1
 	strb	w0, [x19, 8]
 	adrp	x0, .LANCHOR0
@@ -18043,20 +18070,20 @@ FtlLowFormat:
 	ldr	x0, [x0, #:lo12:.LANCHOR0]
 	strb	wzr, [x19, 6]
 	bl	ftl_memset
-.L2628:
+.L2631:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2629
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	cbnz	w1, .L2632
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2628
-.L2613:
+	b	.L2631
+.L2616:
 	ubfiz	x3, x0, 2, 16
 	mvn	w2, w0
 	orr	w2, w0, w2, lsl 16
@@ -18064,8 +18091,8 @@ FtlLowFormat:
 	and	w0, w0, 65535
 	str	w2, [x4, x3]
 	str	w6, [x5, x3]
-	b	.L2612
-.L2615:
+	b	.L2615
+.L2618:
 	mov	w0, w24
 	mov	w1, 1
 	add	w24, w24, 1
@@ -18073,28 +18100,28 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w24, w24, 65535
 	and	w23, w23, 65535
-	b	.L2614
-.L2616:
+	b	.L2617
+.L2619:
 	udiv	w0, w23, w0
-	adrp	x1, .LANCHOR64
-	ldr	w23, [x1, #:lo12:.LANCHOR64]
+	adrp	x1, .LANCHOR65
+	ldr	w23, [x1, #:lo12:.LANCHOR65]
 	add	w0, w0, w23
 	bl	FtlSysBlkNumInit
-	ldrh	w0, [x25, #:lo12:.LANCHOR37]
-	add	x25, x19, :lo12:.LANCHOR39
+	ldrh	w0, [x25, #:lo12:.LANCHOR38]
+	add	x25, x19, :lo12:.LANCHOR40
 	bl	FtlFreeSysBlkQueueInit
-	ldrh	w23, [x21, #:lo12:.LANCHOR38]
-.L2618:
+	ldrh	w23, [x21, #:lo12:.LANCHOR39]
+.L2621:
 	ldrh	w0, [x25]
 	cmp	w0, w23
-	bls	.L2620
+	bls	.L2623
 	mov	w0, w23
 	add	w23, w23, 1
 	mov	w1, 1
 	and	w23, w23, 65535
 	bl	FtlLowFormatEraseBlock
-	b	.L2618
-.L2621:
+	b	.L2621
+.L2624:
 	mov	w0, w25
 	mov	w1, 0
 	add	w25, w25, 1
@@ -18102,71 +18129,71 @@ FtlLowFormat:
 	add	w23, w23, w0
 	and	w25, w25, 65535
 	and	w23, w23, 65535
-	b	.L2617
-.L2629:
-	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	b	.L2620
+.L2632:
+	ldr	w1, [x20, #:lo12:.LANCHOR156]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	mov	w23, -1
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR157]
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	str	w1, [x20, #:lo12:.LANCHOR156]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x19, 4]
 	strh	w2, [x1, x0]
-	adrp	x2, .LANCHOR91
-	add	x0, x2, :lo12:.LANCHOR91
+	adrp	x2, .LANCHOR92
+	add	x0, x2, :lo12:.LANCHOR92
 	ldrh	w1, [x19]
 	mov	x19, x0
 	add	w1, w1, 1
 	strh	wzr, [x0, 2]
-	strh	w1, [x2, #:lo12:.LANCHOR91]
+	strh	w1, [x2, #:lo12:.LANCHOR92]
 	mov	w1, 1
 	strb	wzr, [x0, 6]
 	strb	w1, [x0, 8]
-.L2630:
+.L2633:
 	mov	x0, x19
 	bl	make_superblock
 	ldrb	w1, [x19, 7]
 	ldrh	w0, [x19]
-	cbnz	w1, .L2631
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	cbnz	w1, .L2634
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ubfiz	x0, x0, 1, 16
 	strh	w23, [x1, x0]
 	ldrh	w0, [x19]
 	add	w0, w0, 1
 	strh	w0, [x19]
-	b	.L2630
-.L2631:
-	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	b	.L2633
+.L2634:
+	ldr	w1, [x20, #:lo12:.LANCHOR156]
 	ubfiz	x0, x0, 1, 16
 	str	w1, [x19, 12]
 	add	w1, w1, 1
-	str	w1, [x20, #:lo12:.LANCHOR157]
-	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	str	w1, [x20, #:lo12:.LANCHOR156]
+	ldr	x1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w2, [x19, 4]
 	mov	w19, -1
 	strh	w2, [x1, x0]
-	adrp	x0, .LANCHOR92
-	strh	w19, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR93
+	strh	w19, [x0, #:lo12:.LANCHOR93]
 	bl	FtlFreeSysBlkQueueOut
 	adrp	x2, .LANCHOR206
 	add	x1, x2, :lo12:.LANCHOR206
 	strh	w0, [x2, #:lo12:.LANCHOR206]
 	ldr	w0, [x25, #:lo12:.LANCHOR226]
 	strh	w0, [x1, 6]
-	ldr	w0, [x20, #:lo12:.LANCHOR157]
+	ldr	w0, [x20, #:lo12:.LANCHOR156]
 	str	w0, [x1, 8]
 	add	w0, w0, 1
 	strh	wzr, [x1, 2]
 	strh	w19, [x1, 4]
-	str	w0, [x20, #:lo12:.LANCHOR157]
+	str	w0, [x20, #:lo12:.LANCHOR156]
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	w0, .L2610
+	cbnz	w0, .L2613
 	adrp	x0, .LANCHOR223
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR223]
-.L2610:
+.L2613:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -18174,6 +18201,9 @@ FtlLowFormat:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
+.L2643:
+	mov	w0, 0
+	ret
 	.size	FtlLowFormat, .-FtlLowFormat
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -18192,7 +18222,6 @@ FtlLowFormat:
 	.global	random_seed
 	.global	gSlcNandParaInfo
 	.global	gNandParaInfo
-	.global	NandFlashParaTbl
 	.global	g_page_map_check_enable
 	.global	g_power_lost_ecc_error_blk
 	.global	g_power_lost_recovery_flag
@@ -18399,7 +18428,7 @@ FtlLowFormat:
 	.global	read_retry_cur_offset
 	.section	.bss.DeviceCapacity,"aw",@nobits
 	.align	2
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -18420,7 +18449,7 @@ DieCsIndex:
 	.zero	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",@nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -18439,7 +18468,7 @@ FtlMallocBuffer:
 	.zero	1310720
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
 	.align	1
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
@@ -18460,42 +18489,42 @@ c_ftl_nand_bbm_buf_size:
 	.zero	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR51,. + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.zero	2
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
@@ -18509,161 +18538,161 @@ c_ftl_nand_data_op_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR64,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR67,. + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
 	.align	1
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.zero	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR66,. + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR40,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR63,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR61,. + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
 	.zero	2
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
 	.align	1
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.zero	2
 	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	c_ftl_nand_reserved_blks, %object
 	.size	c_ftl_nand_reserved_blks, 2
 c_ftl_nand_reserved_blks:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR54,. + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.zero	2
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
 	.align	1
-	.set	.LANCHOR55,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.zero	2
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
 	.align	2
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.zero	4
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
 	.align	2
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.zero	4
 	.section	.bss.c_ftl_nand_type,"aw",@nobits
 	.align	1
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.zero	2
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
 	.zero	2
 	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR48,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
@@ -18677,7 +18706,7 @@ c_gc_page_buf_num:
 	.zero	4
 	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
 	.align	1
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
@@ -18691,7 +18720,7 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.zero	4
 	.section	.bss.gBbtInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR73,. + 0
+	.set	.LANCHOR74,. + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 96
 gBbtInfo:
@@ -18705,7 +18734,7 @@ gBlockPageAlignSize:
 	.zero	4
 	.section	.bss.gBootDdrMode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR153,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -18730,14 +18759,14 @@ gFlashOnfiModeEn:
 	.zero	1
 	.section	.bss.gFlashPageBuffer0,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 8
 gFlashPageBuffer0:
 	.zero	8
 	.section	.bss.gFlashPageBuffer1,"aw",@nobits
 	.align	3
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	gFlashPageBuffer1, %object
 	.size	gFlashPageBuffer1, 8
 gFlashPageBuffer1:
@@ -18775,7 +18804,7 @@ gFlashSlcMode:
 gFlashSpareBuffer:
 	.zero	8
 	.section	.bss.gFlashToggleModeEn,"aw",@nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	gFlashToggleModeEn, %object
 	.size	gFlashToggleModeEn, 1
 gFlashToggleModeEn:
@@ -18789,14 +18818,14 @@ gL2pMapInfo:
 	.zero	64
 	.section	.bss.gMasterInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 48
 gMasterInfo:
 	.zero	48
 	.section	.bss.gMasterTempBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	gMasterTempBuf, %object
 	.size	gMasterTempBuf, 8
 gMasterTempBuf:
@@ -18821,27 +18850,27 @@ gMultiPageReadEn:
 gNandChipMap:
 	.zero	64
 	.section	.bss.gNandFlashEccBits,"aw",@nobits
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	gNandFlashEccBits, %object
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",@nobits
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.zero	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.zero	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -18864,14 +18893,14 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.zero	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",@nobits
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
 	.zero	1
 	.section	.bss.gNandIDataBuf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gNandIDataBuf, %object
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
@@ -18910,21 +18939,21 @@ gNandRandomizer:
 	.zero	1
 	.section	.bss.gNandcDumpWriteEn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	gNandcDumpWriteEn, %object
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.zero	4
 	.section	.bss.gNandcEccBits,"aw",@nobits
 	.align	2
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	gNandcEccBits, %object
 	.size	gNandcEccBits, 4
 gNandcEccBits:
 	.zero	4
 	.section	.bss.gNandcVer,"aw",@nobits
 	.align	2
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR33,. + 0
 	.type	gNandcVer, %object
 	.size	gNandcVer, 4
 gNandcVer:
@@ -18938,7 +18967,7 @@ gReadRetryInfo:
 	.zero	852
 	.section	.bss.gSysFreeQueue,"aw",@nobits
 	.align	3
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR75,. + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -18972,14 +19001,14 @@ gVendorBlkInfo:
 	.zero	64
 	.section	.bss.g_GlobalDataVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR158,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.zero	4
 	.section	.bss.g_GlobalSysVersion,"aw",@nobits
 	.align	2
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR156,. + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
@@ -18993,7 +19022,7 @@ g_LowFormat:
 	.zero	4
 	.section	.bss.g_MaxLbaSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
@@ -19007,49 +19036,49 @@ g_MaxLbn:
 	.zero	4
 	.section	.bss.g_MaxLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR71,. + 0
+	.set	.LANCHOR72,. + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
 	.zero	4
 	.section	.bss.g_SlcPartLbaEndSector,"aw",@nobits
 	.align	2
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.zero	4
 	.section	.bss.g_VaildLpn,"aw",@nobits
 	.align	2
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.zero	4
 	.section	.bss.g_active_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR91,. + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.zero	48
 	.section	.bss.g_all_blk_used_slc_mode,"aw",@nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.zero	4
 	.section	.bss.g_buffer_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR92,. + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.zero	48
 	.section	.bss.g_cur_erase_blk,"aw",@nobits
 	.align	2
-	.set	.LANCHOR72,. + 0
+	.set	.LANCHOR73,. + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
@@ -19070,14 +19099,14 @@ g_ect_tbl_power_up_flush:
 	.zero	2
 	.section	.bss.g_flash_read_only_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR75,. + 0
+	.set	.LANCHOR76,. + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.zero	4
 	.section	.bss.g_free_slc_blk_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
@@ -19112,7 +19141,7 @@ g_gc_bad_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_blk_index,"aw",@nobits
 	.align	1
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
@@ -19140,28 +19169,28 @@ g_gc_cur_blk_valid_pages:
 	.zero	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR174,. + 0
+	.set	.LANCHOR173,. + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.zero	2
 	.section	.bss.g_gc_head_data_block,"aw",@nobits
 	.align	2
-	.set	.LANCHOR171,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.zero	4
 	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.zero	4
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
 	.align	1
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR174,. + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
@@ -19196,7 +19225,7 @@ g_gc_page_offset:
 	.zero	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
@@ -19209,7 +19238,7 @@ g_gc_refresh_block_temp_tbl:
 	.zero	34
 	.section	.bss.g_gc_skip_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
@@ -19223,35 +19252,35 @@ g_gc_superblock:
 	.zero	48
 	.section	.bss.g_gc_temp_superblock,"aw",@nobits
 	.align	3
-	.set	.LANCHOR92,. + 0
+	.set	.LANCHOR93,. + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.zero	48
 	.section	.bss.g_in_gc_progress,"aw",@nobits
 	.align	2
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
 	.zero	4
 	.section	.bss.g_in_swl_replace,"aw",@nobits
 	.align	2
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
 	.zero	4
 	.section	.bss.g_inkDie_check_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
 	.zero	4
 	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
@@ -19263,49 +19292,49 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_max_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.zero	4
 	.section	.bss.g_min_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.zero	4
 	.section	.bss.g_nandc_version_data,"aw",@nobits
 	.align	2
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.zero	4
 	.section	.bss.g_num_data_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR84,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.zero	2
 	.section	.bss.g_num_free_superblocks,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.zero	2
 	.section	.bss.g_page_map_check_enable,"aw",@nobits
 	.align	1
-	.set	.LANCHOR68,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
@@ -19366,14 +19395,14 @@ g_slc2KBNand:
 	.zero	1
 	.section	.bss.g_sys_ext_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.zero	512
 	.section	.bss.g_sys_save_data,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR80,. + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
@@ -19394,28 +19423,28 @@ g_totle_avg_erase_count:
 	.zero	4
 	.section	.bss.g_totle_cache_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
 	.zero	4
 	.section	.bss.g_totle_discard_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.zero	4
 	.section	.bss.g_totle_gc_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR159,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.zero	4
 	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR162,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
@@ -19429,14 +19458,14 @@ g_totle_map_block:
 	.zero	2
 	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_read_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
@@ -19450,7 +19479,7 @@ g_totle_read_sector:
 	.zero	4
 	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
@@ -19464,21 +19493,21 @@ g_totle_swl_count:
 	.zero	4
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR78,. + 0
+	.set	.LANCHOR79,. + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.zero	4
 	.section	.bss.g_totle_vendor_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR69,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.zero	2
 	.section	.bss.g_totle_write_page_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
@@ -19506,7 +19535,7 @@ gc_ink_free_return_value:
 	.zero	2
 	.section	.bss.gpFlashSaveInfo,"aw",@nobits
 	.align	3
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 8
 gpFlashSaveInfo:
@@ -19533,7 +19562,7 @@ gpNandc1:
 	.zero	8
 	.section	.bss.gpReadRetrial,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 8
 gpReadRetrial:
@@ -19575,35 +19604,35 @@ p_blk_mode_table:
 	.zero	8
 	.section	.bss.p_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR82,. + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 8
 p_data_block_list_head:
 	.zero	8
 	.section	.bss.p_data_block_list_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR80,. + 0
+	.set	.LANCHOR81,. + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 8
 p_data_block_list_table:
 	.zero	8
 	.section	.bss.p_data_block_list_tail,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR84,. + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 8
 p_data_block_list_tail:
 	.zero	8
 	.section	.bss.p_erase_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR77,. + 0
+	.set	.LANCHOR78,. + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 8
 p_erase_count_table:
 	.zero	8
 	.section	.bss.p_free_data_block_list_head,"aw",@nobits
 	.align	3
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 8
 p_free_data_block_list_head:
@@ -19666,7 +19695,7 @@ p_l2p_map_buf:
 	.zero	8
 	.section	.bss.p_l2p_ram_map,"aw",@nobits
 	.align	3
-	.set	.LANCHOR95,. + 0
+	.set	.LANCHOR96,. + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 8
 p_l2p_ram_map:
@@ -19708,7 +19737,7 @@ p_map_region_ppn_table:
 	.zero	8
 	.section	.bss.p_plane_order_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
@@ -19722,7 +19751,7 @@ p_swl_mul_table:
 	.zero	8
 	.section	.bss.p_sys_data_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR79,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 8
 p_sys_data_buf:
@@ -19749,14 +19778,14 @@ p_valid_page_count_check_table:
 	.zero	8
 	.section	.bss.p_valid_page_count_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 8
 p_valid_page_count_table:
 	.zero	8
 	.section	.bss.p_vendor_block_table,"aw",@nobits
 	.align	3
-	.set	.LANCHOR70,. + 0
+	.set	.LANCHOR71,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 8
 p_vendor_block_table:
@@ -19798,7 +19827,7 @@ read_retry_cur_offset:
 	.zero	4
 	.section	.bss.req_erase,"aw",@nobits
 	.align	3
-	.set	.LANCHOR76,. + 0
+	.set	.LANCHOR77,. + 0
 	.type	req_erase, %object
 	.size	req_erase, 8
 req_erase:
@@ -19812,21 +19841,21 @@ req_gc:
 	.zero	8
 	.section	.bss.req_gc_dst,"aw",@nobits
 	.align	3
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 8
 req_gc_dst:
 	.zero	8
 	.section	.bss.req_prgm,"aw",@nobits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 8
 req_prgm:
 	.zero	8
 	.section	.bss.req_read,"aw",@nobits
 	.align	3
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	req_read, %object
 	.size	req_read, 8
 req_read:
@@ -19853,9 +19882,9 @@ FtlMallocOffset:
 	.word	64
 	.section	.data.NandFlashParaTbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2336
+	.size	NandFlashParaTbl, 2368
 NandFlashParaTbl:
 	.byte	6
 	.byte	44
@@ -20353,6 +20382,32 @@ NandFlashParaTbl:
 	.zero	4
 	.byte	5
 	.byte	44
+	.byte	-124
+	.byte	68
+	.byte	50
+	.byte	-86
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1096
+	.hword	1503
+	.byte	5
+	.byte	19
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.zero	4
+	.byte	5
+	.byte	44
 	.byte	100
 	.byte	68
 	.byte	50
@@ -21757,7 +21812,7 @@ NandFlashParaTbl:
 	.zero	4
 	.section	.data.NandOptPara,"aw",@progbits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	NandOptPara, %object
 	.size	NandOptPara, 128
 NandOptPara:
@@ -22089,7 +22144,7 @@ gFtlInitStatus:
 	.word	-1
 	.section	.data.gNandParaInfo,"aw",@progbits
 	.align	3
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	gNandParaInfo, %object
 	.size	gNandParaInfo, 32
 gNandParaInfo:
@@ -22322,358 +22377,364 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",@progbits,1
-.LC7:
+.LC10:
 	.string	"sdr read ok %x ecc=%d\n"
-.LC8:
+.LC11:
 	.string	"sync para %d\n"
-.LC9:
+.LC12:
 	.string	"TOG mode Read error %x %x\n"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",@progbits,1
 .LC1:
 	.string	"FlashEraseBlocks pageAddr error %x\n"
 	.section	.rodata.FlashInit.str1.1,"aMS",@progbits,1
-.LC18:
+.LC21:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
-.LC19:
+.LC22:
 	.string	"FlashLoadPhyInfo fail %x!!\n"
 	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",@progbits,1
-.LC24:
+.LC27:
 	.string	"prog error: = %x\n"
-.LC25:
+.LC28:
 	.string	"prog read error: = %x\n"
-.LC26:
+.LC29:
 	.string	"prog read s error: = %x %x %x\n"
-.LC27:
+.LC30:
 	.string	"prog read d error: = %x %x %x\n"
 	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
-.LC55:
+.LC58:
 	.string	"BBT:"
 	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
-.LC12:
+.LC15:
 	.string	"ECC:%d\n"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",@progbits,1
-.LC10:
+.LC13:
 	.string	"read retry status %x %x %x\n"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
-.LC23:
+.LC26:
 	.string	"ReadRetry pageadd=%x ecc=%x err=%x\n"
 	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",@progbits,1
-.LC20:
+.LC23:
 	.string	"Read pageadd=%x  ecc=%x err=%x\n"
-.LC21:
+.LC24:
 	.string	"data:"
-.LC22:
+.LC25:
 	.string	"spare:"
 	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
 .LC2:
 	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
 	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
-.LC28:
+.LC31:
 	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
-.LC29:
+.LC32:
 	.string	"FtlBbmTblFlush error:%x\n"
-.LC30:
+.LC33:
 	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlFreeSysBlkQueueOut.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"FtlFreeSysBlkQueueOut free count = %d\n"
+.LC5:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d, error\n"
 	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
-.LC47:
+.LC50:
 	.string	"GC des block %x done\n"
 	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
-.LC46:
+.LC49:
 	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
 	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
-.LC48:
-	.string	"FTL version: 5.0.47 20180208"
-.LC49:
+.LC51:
+	.string	"FTL version: 5.0.48 20180408"
+.LC52:
 	.string	"...%s: no bad block mapping table, format device\n"
-.LC50:
+.LC53:
 	.string	"...%s FtlSysBlkInit error ,format device!\n"
 	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
-.LC40:
+.LC43:
 	.string	"no ect"
 	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
-.LC42:
+.LC45:
 	.string	"page map lost %x %x %x %x\n"
 	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
-.LC35:
+.LC38:
 	.string	"FtlMapWritePage error = %x\n"
-.LC36:
+.LC39:
 	.string	"FtlMapWritePage error = %x error count = %d\n"
 	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
-.LC38:
+.LC41:
 	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
 	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
-.LC43:
+.LC46:
 	.string	"RSB refresh addr %x\n"
-.LC44:
+.LC47:
 	.string	"spuer block %x vpn is 0\n "
-.LC45:
+.LC48:
 	.string	"g_recovery_ppa %x ver %x\n "
 	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
-.LC39:
+.LC42:
 	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
 	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
-.LC32:
+.LC35:
 	.string	"FtlVpcTblFlush error = %x error count = %d\n"
 	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
-.LC41:
+.LC44:
 	.string	"slc mode"
 	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
-.LC16:
+.LC19:
 	.string	"otp error! %d"
-.LC17:
+.LC20:
 	.string	"rr"
 	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
-.LC4:
+.LC6:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
-.LC5:
+.LC7:
 	.string	"!!!!! FTL sys Error !!!!!"
-.LC6:
+.LC8:
 	.string	"%s\n"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
-.LC11:
+.LC14:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
-	.section	.rodata.__func__.10004,"a",@progbits
+	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
 	.set	.LANCHOR214,. + 0
-	.type	__func__.10004, %object
-	.size	__func__.10004, 16
-__func__.10004:
+	.type	__func__.10041, %object
+	.size	__func__.10041, 16
+__func__.10041:
 	.string	"FtlReUsePrevPpa"
-	.section	.rodata.__func__.10037,"a",@progbits
+	.section	.rodata.__func__.10074,"a",@progbits
 	.align	3
 	.set	.LANCHOR228,. + 0
-	.type	__func__.10037, %object
-	.size	__func__.10037, 22
-__func__.10037:
+	.type	__func__.10074, %object
+	.size	__func__.10074, 22
+__func__.10074:
 	.string	"FtlRecoverySuperblock"
-	.section	.rodata.__func__.10091,"a",@progbits
+	.section	.rodata.__func__.10128,"a",@progbits
 	.align	3
-	.set	.LANCHOR100,. + 0
-	.type	__func__.10091, %object
-	.size	__func__.10091, 16
-__func__.10091:
+	.set	.LANCHOR101,. + 0
+	.type	__func__.10128, %object
+	.size	__func__.10128, 16
+__func__.10128:
 	.string	"make_superblock"
-	.section	.rodata.__func__.10111,"a",@progbits
+	.section	.rodata.__func__.10148,"a",@progbits
 	.align	3
-	.set	.LANCHOR138,. + 0
-	.type	__func__.10111, %object
-	.size	__func__.10111, 18
-__func__.10111:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.10148, %object
+	.size	__func__.10148, 18
+__func__.10148:
 	.string	"SupperBlkListInit"
-	.section	.rodata.__func__.10188,"a",@progbits
+	.section	.rodata.__func__.10225,"a",@progbits
 	.align	3
 	.set	.LANCHOR200,. + 0
-	.type	__func__.10188, %object
-	.size	__func__.10188, 25
-__func__.10188:
+	.type	__func__.10225, %object
+	.size	__func__.10225, 25
+__func__.10225:
 	.string	"allocate_data_superblock"
-	.section	.rodata.__func__.10202,"a",@progbits
+	.section	.rodata.__func__.10239,"a",@progbits
 	.align	3
 	.set	.LANCHOR219,. + 0
-	.type	__func__.10202, %object
-	.size	__func__.10202, 29
-__func__.10202:
+	.type	__func__.10239, %object
+	.size	__func__.10239, 29
+__func__.10239:
 	.string	"allocate_new_data_superblock"
-	.section	.rodata.__func__.10208,"a",@progbits
+	.section	.rodata.__func__.10245,"a",@progbits
 	.align	3
 	.set	.LANCHOR205,. + 0
-	.type	__func__.10208, %object
-	.size	__func__.10208, 19
-__func__.10208:
+	.type	__func__.10245, %object
+	.size	__func__.10245, 19
+__func__.10245:
 	.string	"get_new_active_ppa"
-	.section	.rodata.__func__.10219,"a",@progbits
+	.section	.rodata.__func__.10256,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.10219, %object
-	.size	__func__.10219, 16
-__func__.10219:
+	.type	__func__.10256, %object
+	.size	__func__.10256, 16
+__func__.10256:
 	.string	"update_vpc_list"
-	.section	.rodata.__func__.10224,"a",@progbits
+	.section	.rodata.__func__.10261,"a",@progbits
 	.align	3
 	.set	.LANCHOR204,. + 0
-	.type	__func__.10224, %object
-	.size	__func__.10224, 20
-__func__.10224:
+	.type	__func__.10261, %object
+	.size	__func__.10261, 20
+__func__.10261:
 	.string	"decrement_vpc_count"
-	.section	.rodata.__func__.10292,"a",@progbits
+	.section	.rodata.__func__.10329,"a",@progbits
 	.align	3
 	.set	.LANCHOR234,. + 0
-	.type	__func__.10292, %object
-	.size	__func__.10292, 19
-__func__.10292:
+	.type	__func__.10329, %object
+	.size	__func__.10329, 19
+__func__.10329:
 	.string	"FtlGcFreeTempBlock"
-	.section	.rodata.__func__.10386,"a",@progbits
+	.section	.rodata.__func__.10423,"a",@progbits
 	.align	3
 	.set	.LANCHOR238,. + 0
-	.type	__func__.10386, %object
-	.size	__func__.10386, 23
-__func__.10386:
+	.type	__func__.10423, %object
+	.size	__func__.10423, 23
+__func__.10423:
 	.string	"rk_ftl_garbage_collect"
-	.section	.rodata.__func__.9318,"a",@progbits
+	.section	.rodata.__func__.9361,"a",@progbits
 	.align	3
 	.set	.LANCHOR240,. + 0
-	.type	__func__.9318, %object
-	.size	__func__.9318, 8
-__func__.9318:
+	.type	__func__.9361, %object
+	.size	__func__.9361, 8
+__func__.9361:
 	.string	"FtlInit"
-	.section	.rodata.__func__.9378,"a",@progbits
+	.section	.rodata.__func__.9421,"a",@progbits
 	.align	3
 	.set	.LANCHOR220,. + 0
-	.type	__func__.9378, %object
-	.size	__func__.9378, 13
-__func__.9378:
+	.type	__func__.9421, %object
+	.size	__func__.9421, 13
+__func__.9421:
 	.string	"FtlProgPages"
-	.section	.rodata.__func__.9404,"a",@progbits
+	.section	.rodata.__func__.9447,"a",@progbits
 	.align	3
 	.set	.LANCHOR242,. + 0
-	.type	__func__.9404, %object
-	.size	__func__.9404, 10
-__func__.9404:
+	.type	__func__.9447, %object
+	.size	__func__.9447, 10
+__func__.9447:
 	.string	"ftl_write"
-	.section	.rodata.__func__.9467,"a",@progbits
+	.section	.rodata.__func__.9510,"a",@progbits
 	.align	3
 	.set	.LANCHOR121,. + 0
-	.type	__func__.9467, %object
-	.size	__func__.9467, 14
-__func__.9467:
+	.type	__func__.9510, %object
+	.size	__func__.9510, 14
+__func__.9510:
 	.string	"FtlBbt2Bitmap"
-	.section	.rodata.__func__.9513,"a",@progbits
+	.section	.rodata.__func__.9556,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.9513, %object
-	.size	__func__.9513, 11
-__func__.9513:
+	.type	__func__.9556, %object
+	.size	__func__.9556, 11
+__func__.9556:
 	.string	"FtlLoadBbt"
-	.section	.rodata.__func__.9622,"a",@progbits
+	.section	.rodata.__func__.9658,"a",@progbits
 	.align	3
-	.set	.LANCHOR88,. + 0
-	.type	__func__.9622, %object
-	.size	__func__.9622, 17
-__func__.9622:
+	.set	.LANCHOR89,. + 0
+	.type	__func__.9658, %object
+	.size	__func__.9658, 17
+__func__.9658:
 	.string	"INSERT_FREE_LIST"
-	.section	.rodata.__func__.9626,"a",@progbits
+	.section	.rodata.__func__.9662,"a",@progbits
 	.align	3
-	.set	.LANCHOR85,. + 0
-	.type	__func__.9626, %object
-	.size	__func__.9626, 17
-__func__.9626:
+	.set	.LANCHOR86,. + 0
+	.type	__func__.9662, %object
+	.size	__func__.9662, 17
+__func__.9662:
 	.string	"INSERT_DATA_LIST"
-	.section	.rodata.__func__.9656,"a",@progbits
+	.section	.rodata.__func__.9692,"a",@progbits
 	.align	3
-	.set	.LANCHOR89,. + 0
-	.type	__func__.9656, %object
-	.size	__func__.9656, 17
-__func__.9656:
+	.set	.LANCHOR90,. + 0
+	.type	__func__.9692, %object
+	.size	__func__.9692, 17
+__func__.9692:
 	.string	"List_remove_node"
-	.section	.rodata.__func__.9686,"a",@progbits
+	.section	.rodata.__func__.9722,"a",@progbits
 	.align	3
-	.set	.LANCHOR93,. + 0
-	.type	__func__.9686, %object
-	.size	__func__.9686, 22
-__func__.9686:
+	.set	.LANCHOR94,. + 0
+	.type	__func__.9722, %object
+	.size	__func__.9722, 22
+__func__.9722:
 	.string	"List_update_data_list"
-	.section	.rodata.__func__.9693,"a",@progbits
+	.section	.rodata.__func__.9729,"a",@progbits
 	.align	3
-	.set	.LANCHOR212,. + 0
-	.type	__func__.9693, %object
-	.size	__func__.9693, 16
-__func__.9693:
-	.string	"load_l2p_region"
-	.section	.rodata.__func__.9723,"a",@progbits
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9729, %object
+	.size	__func__.9729, 20
+__func__.9729:
+	.string	"ftl_load_l2p_region"
+	.section	.rodata.__func__.9760,"a",@progbits
 	.align	3
-	.set	.LANCHOR94,. + 0
-	.type	__func__.9723, %object
-	.size	__func__.9723, 26
-__func__.9723:
+	.set	.LANCHOR95,. + 0
+	.type	__func__.9760, %object
+	.size	__func__.9760, 26
+__func__.9760:
 	.string	"ftl_map_blk_alloc_new_blk"
-	.section	.rodata.__func__.9737,"a",@progbits
+	.section	.rodata.__func__.9774,"a",@progbits
 	.align	3
 	.set	.LANCHOR209,. + 0
-	.type	__func__.9737, %object
-	.size	__func__.9737, 15
-__func__.9737:
+	.type	__func__.9774, %object
+	.size	__func__.9774, 15
+__func__.9774:
 	.string	"ftl_map_blk_gc"
-	.section	.rodata.__func__.9750,"a",@progbits
+	.section	.rodata.__func__.9787,"a",@progbits
 	.align	3
 	.set	.LANCHOR210,. + 0
-	.type	__func__.9750, %object
-	.size	__func__.9750, 31
-__func__.9750:
+	.type	__func__.9787, %object
+	.size	__func__.9787, 31
+__func__.9787:
 	.string	"Ftl_write_map_blk_to_last_page"
-	.section	.rodata.__func__.9763,"a",@progbits
+	.section	.rodata.__func__.9800,"a",@progbits
 	.align	3
 	.set	.LANCHOR211,. + 0
-	.type	__func__.9763, %object
-	.size	__func__.9763, 16
-__func__.9763:
+	.type	__func__.9800, %object
+	.size	__func__.9800, 16
+__func__.9800:
 	.string	"FtlMapWritePage"
-	.section	.rodata.__func__.9783,"a",@progbits
+	.section	.rodata.__func__.9820,"a",@progbits
 	.align	3
-	.set	.LANCHOR97,. + 0
-	.type	__func__.9783, %object
-	.size	__func__.9783, 22
-__func__.9783:
+	.set	.LANCHOR98,. + 0
+	.type	__func__.9820, %object
+	.size	__func__.9820, 22
+__func__.9820:
 	.string	"select_l2p_ram_region"
-	.section	.rodata.__func__.9799,"a",@progbits
+	.section	.rodata.__func__.9836,"a",@progbits
 	.align	3
-	.set	.LANCHOR213,. + 0
-	.type	__func__.9799, %object
-	.size	__func__.9799, 9
-__func__.9799:
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9836, %object
+	.size	__func__.9836, 9
+__func__.9836:
 	.string	"log2phys"
-	.section	.rodata.__func__.9861,"a",@progbits
+	.section	.rodata.__func__.9898,"a",@progbits
 	.align	3
 	.set	.LANCHOR207,. + 0
-	.type	__func__.9861, %object
-	.size	__func__.9861, 15
-__func__.9861:
+	.type	__func__.9898, %object
+	.size	__func__.9898, 15
+__func__.9898:
 	.string	"FtlVpcTblFlush"
-	.section	.rodata.__func__.9880,"a",@progbits
+	.section	.rodata.__func__.9917,"a",@progbits
 	.align	3
 	.set	.LANCHOR224,. + 0
-	.type	__func__.9880, %object
-	.size	__func__.9880, 14
-__func__.9880:
+	.type	__func__.9917, %object
+	.size	__func__.9917, 14
+__func__.9917:
 	.string	"FtlScanSysBlk"
-	.section	.rodata.__func__.9934,"a",@progbits
+	.section	.rodata.__func__.9971,"a",@progbits
 	.align	3
 	.set	.LANCHOR225,. + 0
-	.type	__func__.9934, %object
-	.size	__func__.9934, 15
-__func__.9934:
+	.type	__func__.9971, %object
+	.size	__func__.9971, 15
+__func__.9971:
 	.string	"FtlLoadSysInfo"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
-.LC31:
+.LC34:
 	.string	"decrement_vpc_count %x = %d\n"
 	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
-.LC52:
+.LC55:
 	.string	"fix power lost blk = %x vpc=%x\n"
-.LC53:
+.LC56:
 	.string	"erase power lost blk = %x vpc=%x\n"
+	.section	.rodata.ftl_map_blk_alloc_new_blk.str1.1,"aMS",@progbits,1
+.LC9:
+	.string	"FtlFreeSysBlkQueueOut = %x, free count = %d\n"
 	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
-.LC33:
+.LC36:
 	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
-.LC34:
+.LC37:
 	.string	"page map lost: %x %x\n"
 	.section	.rodata.ftl_write.str1.1,"aMS",@progbits,1
-.LC54:
+.LC57:
 	.string	"FtlWrite: lpa error:%x %x\n"
-	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC37:
+	.section	.rodata.log2phys.str1.1,"aMS",@progbits,1
+.LC40:
 	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
 	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",@progbits,1
 .LC3:
 	.string	"remove_from_free_sys_Queue %x\n"
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC51:
+.LC54:
 	.string	"FtlInit %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC13:
+.LC16:
 	.string	"%s 0x%x:"
-.LC14:
+.LC17:
 	.string	"%x "
-.LC15:
+.LC18:
 	.string	""
 	.hidden	free
-	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
-	.section	.note.GNU-stack,"",@progbits

commit 390759ed402c30865ebbe76c9ed8c0b817dbc2f0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 13 10:46:07 2018 +0800

    rockchip: add distro boot for rockchip boot cmd
    
    The boot image scan sequence will be:
    - Android AOSP with rockchip extention(resource.img as second)
    - RKIMG(kernel.img, resource.img, boot.img)
    - Linux distro
    
    Change-Id: I534f7944b1927544b5571353894e724307b2d26f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index f1b87ffbc4..9503f65e8a 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -86,7 +86,8 @@
 
 #define RKIMG_BOOTCOMMAND \
 	"boot_android ${devtype} ${devnum};" \
-	"bootrkp;"
+	"bootrkp;" \
+	"run distro_bootcmd;"
 
 #endif
 

commit 70878a45d374e24882704b9761cded184e09252d
Author: Meng Dongyang <daniel.meng@rock-chips.com>
Date:   Fri Mar 30 15:54:00 2018 +0800

    phy: phy-rockchip-inno-usb2: make CDP connect to PC
    
    The CDP is a charger type combine with USB host, so allow
    gadget work when detect CDP charger type.
    
    Change-Id: I9a6a39cd0b3c22139827c8cee15ba4b32526d5a2
    Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index f157c52f8a..ee06ae21eb 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -350,7 +350,12 @@ out:
 
 int rockchip_u2phy_vbus_detect(void)
 {
-	return (rockchip_chg_get_type() == POWER_SUPPLY_TYPE_USB) ? 1 : 0;
+	int chg_type;
+
+	chg_type = rockchip_chg_get_type();
+
+	return (chg_type == POWER_SUPPLY_TYPE_USB ||
+		chg_type == POWER_SUPPLY_TYPE_USB_CDP) ? 1 : 0;
 }
 
 void otg_phy_init(struct dwc2_udc *dev)

commit 33dccc23dbee237803db28d138708cd2a4916be0
Author: Yifeng Zhao <zyf@rock-chips.com>
Date:   Thu Apr 12 09:35:41 2018 +0800

    drivers: rk_nand: improve the processing mechanism of nand flash read and write exception
    
    When NAND FLASH reads and writes with UECC, it may lose data.
    Add a additional reading process to restore the data.
    
    Change-Id: I3345d4889775547e342db41a0aa3457356b1c605
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index e85b4c2bc4..602fa3ddbb 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-04-02
+ * date: 2018-04-11
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -4298,26 +4298,85 @@ ftl_get_blk_list_in_sblk:
 	.global	ftl_free_sblk
 	.type	ftl_free_sblk, %function
 ftl_free_sblk:
-	stp	x29, x30, [sp, -32]!
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	and	x19, x0, 65535
-	mov	w0, w19
+	stp	x19, x20, [sp, 16]
+	and	x20, x0, 65535
+	ldr	x2, [x1, #:lo12:.LANCHOR3]
+	lsl	x19, x20, 2
+	stp	x21, x22, [sp, 32]
+	mov	x22, x20
+	add	x0, x2, x19
+	mov	x21, x1
+	ldrb	w3, [x0, 2]
+	tbz	x3, 3, .L780
+	adrp	x1, .LANCHOR97
+	ldr	x3, [x1, #:lo12:.LANCHOR97]
+	ldrh	w1, [x2, x19]
+	ldrh	w4, [x3, 74]
+	ubfx	x1, x1, 0, 11
+	add	w1, w1, w4
+	adrp	x4, .LANCHOR98
+	ldrh	w4, [x4, #:lo12:.LANCHOR98]
+	cmp	w4, w1, uxth
+	bcc	.L781
+	ldr	w1, [x2, x19]
+	ldrh	w2, [x3, 72]
+	ubfx	x1, x1, 11, 8
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR99
+	ldrh	w2, [x2, #:lo12:.LANCHOR99]
+	cmp	w2, w1, uxth
+	bcs	.L780
+.L781:
+	adrp	x1, .LANCHOR86
+	adrp	x2, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR86]
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR87
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	cmp	w1, w2
+	bge	.L782
+	ldrb	w1, [x0, 2]
+	mov	w2, 2
+	bfi	w1, w2, 3, 2
+.L787:
+	strb	w1, [x0, 2]
+.L780:
+	mov	w0, w22
 	bl	zftl_remove_data_node
-	mov	w0, w19
+	mov	w0, w22
 	bl	zftl_insert_free_list
-	adrp	x0, .LANCHOR3
-	ldr	x0, [x0, #:lo12:.LANCHOR3]
-	add	x0, x0, x19, lsl 2
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ldp	x21, x22, [sp, 32]
+	add	x0, x0, x19
 	ldrb	w1, [x0, 2]
 	and	w1, w1, 31
 	strb	w1, [x0, 2]
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	strh	wzr, [x0, x19, lsl 1]
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	strh	wzr, [x0, x20, lsl 1]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
+.L782:
+	adrp	x1, .LANCHOR84
+	adrp	x2, .LANCHOR89
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	ldrh	w2, [x2, #:lo12:.LANCHOR89]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR82
+	ldrh	w2, [x2, #:lo12:.LANCHOR82]
+	add	w1, w1, w2
+	adrp	x2, .LANCHOR100
+	ldrh	w2, [x2, #:lo12:.LANCHOR100]
+	cmp	w1, w2
+	bge	.L780
+	ldrb	w1, [x0, 2]
+	and	w1, w1, -25
+	b	.L787
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",@progbits
 	.align	2
@@ -4337,10 +4396,10 @@ gc_free_src_blk:
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L782:
+.L789:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L797
+	bhi	.L804
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4348,121 +4407,121 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L797:
+.L804:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L783
+	cbz	w2, .L790
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L783:
+.L790:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26]
-	cbnz	w0, .L784
+	cbnz	w0, .L791
 	adrp	x0, .LANCHOR3
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L785
+	tbz	x0, 8, .L792
 	ldrb	w2, [x25, 2]
 	adrp	x0, .LC52
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC52
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L785:
+.L792:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L786
+	beq	.L793
 	tst	w0, 192
-	bne	.L787
-.L786:
-	adrp	x1, .LANCHOR97
+	bne	.L794
+.L793:
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC0
 	mov	w2, 770
-	add	x1, x1, :lo12:.LANCHOR97
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L787:
+.L794:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L788
+	cbz	w2, .L795
 	add	x3, x0, 392
 	mov	w1, 0
-.L790:
+.L797:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L789
+	bne	.L796
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L788:
+.L795:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L791
+	cbz	w2, .L798
 	add	x3, x0, 136
 	mov	w1, 0
-.L793:
+.L800:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L792
+	bne	.L799
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L791:
+.L798:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L794
+	cbz	w2, .L801
 	add	x3, x0, 264
 	mov	w1, 0
-.L796:
+.L803:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L795
+	bne	.L802
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L794:
+.L801:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L782
-.L789:
+	b	.L789
+.L796:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L790
-	b	.L788
-.L792:
+	bne	.L797
+	b	.L795
+.L799:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L793
-	b	.L791
-.L795:
+	bne	.L800
+	b	.L798
+.L802:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L796
-	b	.L794
-.L784:
+	bne	.L803
+	b	.L801
+.L791:
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L794
+	b	.L801
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4477,7 +4536,7 @@ ftl_erase_phy_blk:
 	adrp	x1, .LANCHOR96
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR99
+	adrp	x22, .LANCHOR103
 	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	sub	w1, w19, w1
 	mov	w19, 1
@@ -4485,18 +4544,18 @@ ftl_erase_phy_blk:
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR98
+	adrp	x0, .LANCHOR102
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L821
-	ldrh	w2, [x22, #:lo12:.LANCHOR99]
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L828
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L821:
-	ldrh	w2, [x22, #:lo12:.LANCHOR99]
+.L828:
+	ldrh	w2, [x22, #:lo12:.LANCHOR103]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -4517,7 +4576,7 @@ ftl_erase_sblk:
 	stp	x25, x26, [sp, 64]
 	and	w26, w0, 65535
 	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	adrp	x25, .LANCHOR100
+	adrp	x25, .LANCHOR104
 	stp	x21, x22, [sp, 32]
 	ubfiz	x22, x26, 2, 16
 	add	x0, x0, x22
@@ -4525,48 +4584,48 @@ ftl_erase_sblk:
 	stp	x19, x20, [sp, 16]
 	adrp	x24, .LANCHOR95
 	mov	w20, w1
-	add	x25, x25, :lo12:.LANCHOR100
+	add	x25, x25, :lo12:.LANCHOR104
 	ldrb	w28, [x0, 3]
 	add	x24, x24, :lo12:.LANCHOR95
 	add	x27, x29, 112
 	mov	w19, 0
-.L827:
+.L834:
 	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L838
+	bge	.L845
 	ldrb	w1, [x24]
-	adrp	x0, .LANCHOR99
+	adrp	x0, .LANCHOR103
 	mov	w21, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	ldrh	w3, [x0, #:lo12:.LANCHOR103]
 	sub	w4, w1, #1
 	mov	w0, 0
 	mul	w6, w19, w1
 	mul	w5, w26, w1
-	b	.L839
-.L829:
+	b	.L846
+.L836:
 	add	w2, w0, w6
 	asr	w2, w28, w2
-	tbnz	x2, 0, .L828
+	tbnz	x2, 0, .L835
 	and	w2, w0, w4
 	add	w2, w2, w5
 	mul	w2, w2, w3
 	str	w2, [x27, w21, sxtw 2]
 	add	w21, w21, 1
-.L828:
+.L835:
 	add	w0, w0, 1
-.L839:
+.L846:
 	cmp	w0, w1
-	blt	.L829
+	blt	.L836
 	cmp	w1, 4
-	bne	.L830
+	bne	.L837
 	mov	x3, 0
-.L831:
+.L838:
 	cmp	w21, w3
-	bgt	.L832
-.L833:
+	bgt	.L839
+.L840:
 	add	w19, w19, 1
-	b	.L827
-.L832:
+	b	.L834
+.L839:
 	ldr	w2, [x27, x3, lsl 2]
 	mov	w1, w20
 	str	x3, [x29, 104]
@@ -4574,59 +4633,59 @@ ftl_erase_sblk:
 	bl	flash_erase_block_en
 	ldr	x3, [x29, 104]
 	add	x3, x3, 1
-	b	.L831
-.L830:
+	b	.L838
+.L837:
 	cmp	w21, 2
-	bne	.L834
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L835
+	bne	.L841
+	adrp	x0, .LANCHOR102
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L842
 	ldp	w2, w3, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L835:
+.L842:
 	ldp	w2, w3, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-	b	.L833
-.L834:
+	b	.L840
+.L841:
 	cmp	w21, 1
-	bne	.L833
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L837
+	bne	.L840
+	adrp	x0, .LANCHOR102
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L844
 	ldr	w2, [x29, 112]
 	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L837:
+.L844:
 	ldr	w2, [x29, 112]
 	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L833
-.L838:
-	adrp	x2, .LANCHOR101
+	b	.L840
+.L845:
+	adrp	x2, .LANCHOR97
 	ldr	x3, [x23, #:lo12:.LANCHOR3]
-	cbnz	w20, .L840
+	cbnz	w20, .L847
 	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x22]
-	ldr	x1, [x2, #:lo12:.LANCHOR101]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L842
+	bge	.L849
 	strh	w0, [x1, 96]
-.L842:
+.L849:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -4635,7 +4694,7 @@ ftl_erase_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L840:
+.L847:
 	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -4643,15 +4702,15 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR101]
+	ldr	x1, [x2, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L842
+	bcs	.L849
 	strh	w0, [x1, 98]
-	b	.L842
+	b	.L849
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
@@ -4659,44 +4718,44 @@ ftl_erase_sblk:
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR97
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 136]
 	str	x19, [sp, 16]
 	mov	x19, x0
 	cmp	w2, 63
-	bls	.L852
+	bls	.L859
 	strh	wzr, [x1, 136]
-.L852:
+.L859:
 	ldrh	w0, [x1, 112]
-	cbnz	w0, .L853
-	adrp	x1, .LANCHOR102
+	cbnz	w0, .L860
+	adrp	x1, .LANCHOR105
 	adrp	x0, .LC0
-	mov	w2, 994
-	add	x1, x1, :lo12:.LANCHOR102
+	mov	w2, 1012
+	add	x1, x1, :lo12:.LANCHOR105
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L853:
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+.L860:
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 65535
-.L856:
+.L863:
 	ldrh	w2, [x1, 136]
-.L854:
+.L861:
 	mov	w3, w2
 	cmp	w2, 63
-	ble	.L855
+	ble	.L862
 	strh	wzr, [x1, 136]
-	b	.L856
-.L855:
+	b	.L863
+.L862:
 	add	x4, x2, 1
 	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w5
-	bne	.L859
+	bne	.L866
 	mov	x2, x4
-	b	.L854
-.L859:
+	b	.L861
+.L866:
 	add	x3, x1, x3, sxtw 1
 	mov	w4, -1
 	ldr	x19, [sp, 16]
@@ -4717,40 +4776,40 @@ ftl_free_sys_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 65535
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR97
 	mov	x19, x0
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L862
+	bls	.L869
 	strh	wzr, [x1, 138]
-.L862:
+.L869:
 	ldrh	w0, [x1, 112]
 	cmp	w0, 63
-	bls	.L863
-	adrp	x1, .LANCHOR103
+	bls	.L870
+	adrp	x1, .LANCHOR106
 	adrp	x0, .LC0
-	mov	w2, 1018
-	add	x1, x1, :lo12:.LANCHOR103
+	mov	w2, 1036
+	add	x1, x1, :lo12:.LANCHOR106
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L863:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L870:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w4, 65535
-.L866:
+.L873:
 	ldrh	w1, [x0, 138]
-.L864:
+.L871:
 	mov	w2, w1
 	cmp	w1, 63
-	ble	.L865
+	ble	.L872
 	strh	wzr, [x0, 138]
-	b	.L866
-.L865:
+	b	.L873
+.L872:
 	add	x3, x1, 1
 	add	x5, x0, x3, lsl 1
 	ldrh	w5, [x5, 158]
 	cmp	w5, w4
-	bne	.L867
+	bne	.L874
 	add	x2, x0, x2, sxtw 1
 	strh	w20, [x2, 160]
 	strh	w1, [x0, 138]
@@ -4760,9 +4819,9 @@ ftl_free_sys_blk:
 	strh	w1, [x0, 112]
 	ldp	x29, x30, [sp], 32
 	ret
-.L867:
+.L874:
 	mov	x1, x3
-	b	.L864
+	b	.L871
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -4772,7 +4831,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L880
+	beq	.L887
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
@@ -4783,25 +4842,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L870
+	bne	.L877
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR101
-	ldr	x3, [x1, #:lo12:.LANCHOR101]
-	tbz	x0, 3, .L874
+	adrp	x1, .LANCHOR97
+	ldr	x3, [x1, #:lo12:.LANCHOR97]
+	tbz	x0, 3, .L881
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L875:
+.L882:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L877
+	bne	.L884
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -4809,44 +4868,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L870:
+.L877:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L874:
+.L881:
 	tst	w0, 24
-	bne	.L876
+	bne	.L883
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L875
-.L876:
+	b	.L882
+.L883:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L875
-.L877:
+	b	.L882
+.L884:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L878
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	bne	.L885
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L870
-.L878:
+	b	.L877
+.L885:
 	cmp	w0, 96
-	bne	.L870
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	bne	.L877
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L870
-.L880:
+	b	.L877
+.L887:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -4866,9 +4925,9 @@ ftl_get_ppa_from_index:
 	stp	x19, x20, [sp, 16]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	bge	.L884
+	bge	.L891
 	add	x2, x2, 16
-.L885:
+.L892:
 	ldrb	w1, [x2, 9]
 	sdiv	w19, w0, w1
 	msub	w0, w19, w1, w0
@@ -4876,25 +4935,25 @@ ftl_get_ppa_from_index:
 	ldrh	w20, [x0, 16]
 	mov	w0, 65535
 	cmp	w20, w0
-	bne	.L886
-	adrp	x1, .LANCHOR104
+	bne	.L893
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 1403
-	add	x1, x1, :lo12:.LANCHOR104
+	mov	w2, 1421
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L886:
-	adrp	x0, .LANCHOR99
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+.L893:
+	adrp	x0, .LANCHOR103
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	madd	w0, w0, w20, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L884:
+.L891:
 	sub	w0, w0, w1
 	add	x2, x2, 48
 	and	w0, w0, 65535
-	b	.L885
+	b	.L892
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -4902,29 +4961,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR105
-	add	x1, x1, :lo12:.LANCHOR105
+	adrp	x1, .LANCHOR108
+	add	x1, x1, :lo12:.LANCHOR108
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR106
-	ldr	x4, [x2, #:lo12:.LANCHOR106]
-	adrp	x2, .LANCHOR107
-	ldr	x5, [x2, #:lo12:.LANCHOR107]
-.L889:
+	adrp	x2, .LANCHOR109
+	ldr	x4, [x2, #:lo12:.LANCHOR109]
+	adrp	x2, .LANCHOR110
+	ldr	x5, [x2, #:lo12:.LANCHOR110]
+.L896:
 	cmp	w1, w3
-	bne	.L891
+	bne	.L898
 	mov	w0, -1
 	ret
-.L891:
+.L898:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L890
+	bne	.L897
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L890:
+.L897:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L889
+	b	.L896
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -4938,50 +4997,50 @@ ftl_get_new_free_page:
 	mov	x19, x0
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L893
-	adrp	x1, .LANCHOR108
+	bne	.L900
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1518
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1536
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L893:
+.L900:
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bne	.L894
-	adrp	x1, .LANCHOR108
+	bne	.L901
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1519
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1537
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L894:
+.L901:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L895
-	adrp	x1, .LANCHOR108
+	cbnz	w0, .L902
+	adrp	x1, .LANCHOR111
 	adrp	x0, .LC0
-	mov	w2, 1520
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1538
+	add	x1, x1, :lo12:.LANCHOR111
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L895:
+.L902:
 	ldrb	w0, [x19, 5]
 	mov	w2, 65535
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR72
 	ldrb	w4, [x0, #:lo12:.LANCHOR72]
-.L896:
+.L903:
 	cmp	w3, w2
 	ldrb	w1, [x19, 5]
-	beq	.L898
-	adrp	x0, .LANCHOR99
+	beq	.L905
+	adrp	x0, .LANCHOR103
 	add	w1, w1, 1
 	and	w1, w1, 255
 	ldrh	w2, [x19, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	cmp	w4, w1
 	strb	w1, [x19, 5]
 	mul	w0, w0, w3
@@ -4992,29 +5051,29 @@ ftl_get_new_free_page:
 	orr	w0, w0, w2
 	add	w3, w3, 1
 	strh	w3, [x19, 10]
-	bne	.L892
+	bne	.L899
 	add	w2, w2, 1
 	strb	wzr, [x19, 5]
 	strh	w2, [x19, 2]
-.L892:
+.L899:
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L898:
+.L905:
 	add	w1, w1, 1
 	and	w1, w1, 255
 	strb	w1, [x19, 5]
 	cmp	w1, w4
-	bne	.L897
+	bne	.L904
 	ldrh	w0, [x19, 2]
 	strb	wzr, [x19, 5]
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L897:
+.L904:
 	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
 	ldrh	w3, [x19, x0, lsl 1]
-	b	.L896
+	b	.L903
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -5030,22 +5089,22 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w0
 	sub	w0, w0, #1
 	cmp	w1, w0, uxth
-	bcs	.L902
-	adrp	x1, .LANCHOR109
+	bcs	.L909
+	adrp	x1, .LANCHOR112
 	adrp	x0, .LC0
-	mov	w2, 1551
-	add	x1, x1, :lo12:.LANCHOR109
+	mov	w2, 1569
+	add	x1, x1, :lo12:.LANCHOR112
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L902:
-	adrp	x20, .LANCHOR101
+.L909:
+	adrp	x20, .LANCHOR97
 	mov	w1, 0
 	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -5058,18 +5117,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR110
+	adrp	x2, .LANCHOR113
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR110]
+	ldrh	w1, [x2, #:lo12:.LANCHOR113]
 	cmp	w1, 4
-	bhi	.L905
-	cbnz	w0, .L905
+	bhi	.L912
+	cbnz	w0, .L912
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR110]
+	strh	w1, [x2, #:lo12:.LANCHOR113]
 	ret
-.L905:
+.L912:
 	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR110]
+	strh	wzr, [x3, #:lo12:.LANCHOR113]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR2]
@@ -5079,37 +5138,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR3
 	ldr	x7, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L907:
+.L914:
 	cmp	w5, w1, uxth
-	bhi	.L910
+	bhi	.L917
 	adrp	x1, .LANCHOR5
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR101
+	adrp	x2, .LANCHOR97
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR101]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L904
+	cbz	w2, .L911
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L904:
+.L911:
 	ret
-.L910:
+.L917:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L908
+	beq	.L915
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L909
+	bne	.L916
 	add	w0, w0, w3
-.L908:
+.L915:
 	add	x1, x1, 1
-	b	.L907
-.L909:
+	b	.L914
+.L916:
 	add	w2, w2, w3
-	b	.L908
+	b	.L915
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -5151,39 +5210,39 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L919
+	beq	.L926
 	adrp	x0, .LANCHOR4
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L920
+	cbnz	w0, .L927
 	adrp	x0, .LC53
 	mov	w2, 0
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC53
 	bl	printf
-.L923:
+.L930:
 	mov	w0, 0
-	b	.L918
-.L920:
+	b	.L925
+.L927:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L919:
-	adrp	x20, .LANCHOR111
-	ldrh	w0, [x20, #:lo12:.LANCHOR111]
+.L926:
+	adrp	x20, .LANCHOR114
+	ldrh	w0, [x20, #:lo12:.LANCHOR114]
 	cmp	w19, w0
-	beq	.L923
+	beq	.L930
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L922
-	strh	w19, [x20, #:lo12:.LANCHOR111]
-	b	.L923
-.L922:
+	bne	.L929
+	strh	w19, [x20, #:lo12:.LANCHOR114]
+	b	.L930
+.L929:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	cset	w0, ne
-	strh	w19, [x20, #:lo12:.LANCHOR111]
-.L918:
+	strh	w19, [x20, #:lo12:.LANCHOR114]
+.L925:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5193,46 +5252,46 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR105
+	adrp	x3, .LANCHOR108
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR105
+	add	x4, x3, :lo12:.LANCHOR108
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR106
-	ldr	x8, [x4, #:lo12:.LANCHOR106]
-	adrp	x4, .LANCHOR107
-	ldr	x4, [x4, #:lo12:.LANCHOR107]
-.L926:
+	adrp	x4, .LANCHOR109
+	ldr	x8, [x4, #:lo12:.LANCHOR109]
+	adrp	x4, .LANCHOR110
+	ldr	x4, [x4, #:lo12:.LANCHOR110]
+.L933:
 	cmp	w6, w12
-	beq	.L930
+	beq	.L937
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L927
+	bne	.L934
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L928
-	add	x6, x3, :lo12:.LANCHOR105
+	bne	.L935
+	add	x6, x3, :lo12:.LANCHOR108
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L929:
+.L936:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L930:
+.L937:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR105
+	add	x3, x3, :lo12:.LANCHOR108
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L937
+	beq	.L944
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR96
 	add	x29, sp, 0
@@ -5251,15 +5310,15 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L928:
+.L935:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L929
-.L927:
+	b	.L936
+.L934:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L926
-.L937:
+	b	.L933
+.L944:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -5286,27 +5345,27 @@ ftl_mask_bad_block:
 	udiv	w2, w2, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	and	w19, w2, 255
-	tbz	x0, 14, .L941
+	and	w19, w2, 65535
+	tbz	x0, 14, .L948
 	adrp	x0, .LC54
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC54
 	bl	printf
-.L941:
+.L948:
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L940
+	bls	.L947
 	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
-	add	x19, x0, x19, uxtb 2
+	add	x19, x0, x19, uxth 2
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L940:
+.L947:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5342,11 +5401,11 @@ print_ftl_debug_info:
 	ldrh	w1, [x1, #:lo12:.LANCHOR89]
 	add	x0, x0, :lo12:.LC55
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
-	adrp	x1, .LANCHOR112
-	ldrb	w3, [x1, #:lo12:.LANCHOR112]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR115
+	ldrb	w3, [x1, #:lo12:.LANCHOR115]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
@@ -5354,7 +5413,7 @@ print_ftl_debug_info:
 	adrp	x0, .LC56
 	add	x0, x0, :lo12:.LC56
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
@@ -5362,7 +5421,7 @@ print_ftl_debug_info:
 	add	x0, x0, :lo12:.LC57
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5404,29 +5463,29 @@ ftl_write_buf:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	str	x21, [sp, 32]
-	cbnz	x0, .L950
-	adrp	x1, .LANCHOR113
-	add	x1, x1, :lo12:.LANCHOR113
+	cbnz	x0, .L957
+	adrp	x1, .LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR116
 	mov	w2, 639
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	print_ftl_debug_info
 	mov	w0, -1
-.L949:
+.L956:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L953:
+.L960:
 	mov	x1, x19
 	adrp	x0, .LANCHOR52
 	add	x0, x0, :lo12:.LANCHOR52
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR101
+	adrp	x1, .LANCHOR97
 	ldrb	w3, [x19, 56]
 	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x21, #:lo12:.LANCHOR53]
@@ -5436,33 +5495,33 @@ ftl_write_buf:
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L949
-.L950:
+	b	.L956
+.L957:
 	mov	x19, x0
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	x20, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
 	ldrb	w2, [x19, 56]
 	cmp	w2, w1
-	bls	.L955
-	adrp	x1, .LANCHOR113
+	bls	.L962
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
 	mov	w2, 644
-	add	x1, x1, :lo12:.LANCHOR113
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L955:
+.L962:
 	ldrb	w0, [x19, 56]
 	adrp	x21, .LANCHOR53
-	cbz	w0, .L952
-	ldrb	w1, [x20, #:lo12:.LANCHOR114]
+	cbz	w0, .L959
+	ldrb	w1, [x20, #:lo12:.LANCHOR117]
 	cmp	w1, w0
-	bcs	.L953
-.L952:
+	bcs	.L960
+.L959:
 	mov	x0, x19
 	bl	buf_free
 	ldrb	w0, [x21, #:lo12:.LANCHOR53]
-	b	.L949
+	b	.L956
 	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
@@ -5472,26 +5531,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR115
+	adrp	x20, .LANCHOR118
 	stp	x21, x22, [sp, 32]
 	adrp	x19, .LANCHOR46
 	adrp	x22, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR115
+	add	x20, x20, :lo12:.LANCHOR118
 	add	x19, x19, :lo12:.LANCHOR46
 	add	x22, x22, :lo12:.LANCHOR96
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L961:
+.L968:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L967
+	bne	.L974
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L967:
+.L974:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -5500,7 +5559,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L962
+	bne	.L969
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -5529,32 +5588,32 @@ ftl_write_completed:
 	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L963
+	bne	.L970
 	strh	wzr, [x0, 22]
-.L964:
+.L971:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L961
-.L963:
+	b	.L968
+.L970:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L964
+	bne	.L971
 	strh	wzr, [x0, 54]
-	b	.L964
-.L962:
+	b	.L971
+.L969:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L966
+	tbz	x0, 2, .L973
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L961
-.L966:
+	b	.L968
+.L973:
 	mov	x0, x21
 	bl	buf_free
-	b	.L961
+	b	.L968
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_alloc_sblk,"ax",@progbits
 	.align	2
@@ -5576,35 +5635,35 @@ ftl_alloc_sblk:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L971
+	beq	.L978
 	adrp	x0, .LANCHOR3
 	lsl	w22, w22, 1
 	ldr	x21, [x0, #:lo12:.LANCHOR3]
 	add	x21, x21, x19, uxth 2
 	ldrb	w0, [x21, 2]
 	tst	w0, 224
-	beq	.L972
-	adrp	x1, .LANCHOR116
+	beq	.L979
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
 	mov	w2, 757
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L972:
+.L979:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w20, 5, 3
 	ubfx	x1, x0, 3, 2
 	orr	w22, w22, w1
 	bfi	w0, w22, 3, 2
 	strb	w0, [x21, 2]
-.L973:
+.L980:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L971:
+.L978:
 	bl	print_ftl_debug_info
 	adrp	x21, .LC61
 	mov	w2, w20
@@ -5622,23 +5681,23 @@ ftl_alloc_sblk:
 	bl	printf
 	bl	dump_all_list_info
 	mov	w2, 767
-	adrp	x1, .LANCHOR116
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR116
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L973
+	b	.L980
 	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR120
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR117]
-	adrp	x1, .LANCHOR115
-	strb	w0, [x1, #:lo12:.LANCHOR115]
+	strb	w0, [x1, #:lo12:.LANCHOR120]
+	adrp	x1, .LANCHOR118
+	strb	w0, [x1, #:lo12:.LANCHOR118]
 	adrp	x1, .LANCHOR58
 	strb	w0, [x1, #:lo12:.LANCHOR58]
 	adrp	x1, .LANCHOR65
@@ -5656,13 +5715,13 @@ dump_sblk_queue:
 	add	x0, x0, :lo12:.LC62
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR117
+	adrp	x19, .LANCHOR120
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR117]
+	ldrb	w1, [x19, #:lo12:.LANCHOR120]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR117]
+	ldrb	w19, [x19, #:lo12:.LANCHOR120]
 	cmp	w19, 255
-	beq	.L980
+	beq	.L987
 	adrp	x1, .LANCHOR46
 	ubfiz	x19, x19, 6, 8
 	add	x1, x1, :lo12:.LANCHOR46
@@ -5670,7 +5729,7 @@ dump_sblk_queue:
 	add	x19, x1, x19
 	add	x21, x21, :lo12:.LC63
 	mov	x20, x1
-.L982:
+.L989:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -5678,11 +5737,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L980
+	beq	.L987
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L982
-.L980:
+	b	.L989
+.L987:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -5693,18 +5752,18 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR117
-	ldrb	w2, [x2, #:lo12:.LANCHOR117]
+	adrp	x2, .LANCHOR120
+	ldrb	w2, [x2, #:lo12:.LANCHOR120]
 	cmp	w2, 255
-	beq	.L999
+	beq	.L1006
 	adrp	x3, .LANCHOR96
 	adrp	x7, .LANCHOR46
 	add	x7, x7, :lo12:.LANCHOR46
-	adrp	x10, .L995
+	adrp	x10, .L1002
 	ldrh	w8, [x3, #:lo12:.LANCHOR96]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L995
+	add	x10, x10, :lo12:.L1002
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
@@ -5718,61 +5777,61 @@ queue_lun_state:
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L998:
+.L1005:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L992
+	bne	.L999
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L993
+	bne	.L1000
 	cmp	w1, 1
-	bne	.L990
+	bne	.L997
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L992
+	beq	.L999
 	ret
-.L993:
+.L1000:
 	cmp	w1, 3
-	bhi	.L992
+	bhi	.L999
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx995
+	adr	x13, .Lrtx1002
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx995:
+.Lrtx1002:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L995:
-	.byte	(.L994 - .Lrtx995) / 4
-	.byte	(.L996 - .Lrtx995) / 4
-	.byte	(.L997 - .Lrtx995) / 4
-	.byte	(.L990 - .Lrtx995) / 4
+.L1002:
+	.byte	(.L1001 - .Lrtx1002) / 4
+	.byte	(.L1003 - .Lrtx1002) / 4
+	.byte	(.L1004 - .Lrtx1002) / 4
+	.byte	(.L997 - .Lrtx1002) / 4
 	.section	.text.queue_lun_state
-.L994:
+.L1001:
 	cmp	w0, 2
-	beq	.L992
+	beq	.L999
 	ret
-.L996:
+.L1003:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L992
+	beq	.L999
 	ret
-.L997:
+.L1004:
 	cmp	w0, 10
-	bne	.L990
-.L992:
+	bne	.L997
+.L999:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L998
-.L999:
+	bne	.L1005
+.L1006:
 	mov	w0, 0
-.L990:
+.L997:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -5780,10 +5839,10 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR117
-	ldrb	w2, [x6, #:lo12:.LANCHOR117]
+	adrp	x6, .LANCHOR120
+	ldrb	w2, [x6, #:lo12:.LANCHOR120]
 	cmp	w2, 255
-	beq	.L1001
+	beq	.L1008
 	adrp	x0, .LANCHOR46
 	lsl	x4, x2, 6
 	add	x5, x0, :lo12:.LANCHOR46
@@ -5793,55 +5852,55 @@ queue_remove_completed_req:
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L1001
+	bhi	.L1008
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR117]
+	strb	w0, [x6, #:lo12:.LANCHOR120]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L1003
+	bne	.L1010
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L1004
-	adrp	x0, .LANCHOR115
-	ldrb	w3, [x0, #:lo12:.LANCHOR115]
-	add	x0, x0, :lo12:.LANCHOR115
-.L1005:
+	cbnz	w0, .L1011
+	adrp	x0, .LANCHOR118
+	ldrb	w3, [x0, #:lo12:.LANCHOR118]
+	add	x0, x0, :lo12:.LANCHOR118
+.L1012:
 	cmp	w3, 255
-	bne	.L1009
+	bne	.L1016
 	add	x1, x1, :lo12:.LANCHOR46
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L1004:
+.L1011:
 	adrp	x0, .LANCHOR65
 	ldrb	w3, [x0, #:lo12:.LANCHOR65]
 	add	x0, x0, :lo12:.LANCHOR65
-	b	.L1005
-.L1003:
-	cbnz	w0, .L1001
+	b	.L1012
+.L1010:
+	cbnz	w0, .L1008
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L1001
+	beq	.L1008
 	adrp	x0, .LANCHOR58
 	ldrb	w3, [x0, #:lo12:.LANCHOR58]
 	add	x0, x0, :lo12:.LANCHOR58
-	b	.L1005
-.L1009:
-	add	x0, x1, :lo12:.LANCHOR46
+	b	.L1012
 .L1016:
+	add	x0, x1, :lo12:.LANCHOR46
+.L1023:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L1016
+	bne	.L1023
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L1001:
+.L1008:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -5853,9 +5912,9 @@ pm_alloc_new_blk:
 	adrp	x2, .LANCHOR72
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR101
+	adrp	x20, .LANCHOR97
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
@@ -5863,29 +5922,29 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L1018
+	bls	.L1025
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L1019
-.L1018:
+	bne	.L1026
+.L1025:
 	adrp	x19, .LC64
 	add	x19, x19, :lo12:.LC64
 	adrp	x23, .LANCHOR3
-.L1031:
+.L1038:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x14, x20, :lo12:.LANCHOR101
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	add	x14, x20, :lo12:.LANCHOR97
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L1020
+	bne	.L1027
 	mov	w1, w21
 	mov	x0, x19
 	bl	printf
@@ -5894,56 +5953,56 @@ pm_alloc_new_blk:
 	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
 	strb	w0, [x1, 2]
-	b	.L1031
-.L1020:
+	b	.L1038
+.L1027:
 	ldr	x0, [x14]
-	adrp	x1, .LANCHOR118
+	adrp	x1, .LANCHOR121
 	mov	w2, 1
 	mov	w19, 0
 	add	x0, x0, 416
-	str	w2, [x1, #:lo12:.LANCHOR118]
+	str	w2, [x1, #:lo12:.LANCHOR121]
 	mov	w1, 65535
 	strh	wzr, [x0, 274]
-.L1022:
+.L1029:
 	ldrh	w2, [x0]
 	cmp	w2, w1
-	beq	.L1021
+	beq	.L1028
 	add	w19, w19, 1
 	add	x0, x0, 2
 	and	w19, w19, 65535
 	cmp	w19, 128
-	bne	.L1022
-	adrp	x1, .LANCHOR119
+	bne	.L1029
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
 	mov	w2, 192
-	add	x1, x1, :lo12:.LANCHOR119
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1021:
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+.L1028:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	add	x19, x0, x19, sxtw 1
 	ldrh	w1, [x0, 688]
 	strh	w21, [x19, 416]
 	add	w1, w1, 1
 	strh	w1, [x0, 688]
-.L1019:
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+.L1026:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 690]
 	add	x0, x0, 336
 	ldrh	w19, [x1, x0, lsl 1]
 	mov	w0, 65533
 	sub	w1, w19, #1
 	cmp	w0, w1, uxth
-	bcs	.L1024
-	adrp	x1, .LANCHOR119
+	bcs	.L1031
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
 	mov	w2, 197
-	add	x1, x1, :lo12:.LANCHOR119
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1024:
+.L1031:
 	adrp	x1, .LANCHOR96
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	mov	w2, 21
 	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	sub	w2, w2, w1
@@ -5953,7 +6012,7 @@ pm_alloc_new_blk:
 	strh	w4, [x0, 694]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1027
+	tbz	x0, 12, .L1034
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
@@ -5963,7 +6022,7 @@ pm_alloc_new_blk:
 	mov	w1, w19
 	add	x0, x0, :lo12:.LC65
 	bl	printf
-.L1027:
+.L1034:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -5977,68 +6036,68 @@ pm_alloc_new_blk:
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	mov	x1, 0
 	add	x29, sp, 0
 	mov	w2, 65535
 	str	x19, [sp, 16]
-.L1036:
+.L1043:
 	lsl	x3, x1, 4
 	and	w19, w1, 65535
 	ldrh	w3, [x3, x0]
 	cmp	w3, w2
-	beq	.L1035
+	beq	.L1042
 	add	x1, x1, 1
 	cmp	x1, 32
-	bne	.L1036
+	bne	.L1043
 	add	x0, x0, 2
 	mov	w19, w1
 	mov	x2, x0
 	mov	w4, 32768
 	mov	w1, 0
-.L1038:
+.L1045:
 	ldrh	w3, [x2]
-	tbnz	x3, 15, .L1037
+	tbnz	x3, 15, .L1044
 	cmp	w3, w4
-	bcs	.L1037
+	bcs	.L1044
 	mov	w4, w3
 	mov	w19, w1
-.L1037:
+.L1044:
 	add	w1, w1, 1
 	add	x2, x2, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1038
+	bne	.L1045
 	cmp	w19, 32
-	bne	.L1035
-	adrp	x1, .LANCHOR121
+	bne	.L1042
+	adrp	x1, .LANCHOR124
 	mov	w2, -1
-	ldrb	w3, [x1, #:lo12:.LANCHOR121]
+	ldrb	w3, [x1, #:lo12:.LANCHOR124]
 	mov	w1, 0
-.L1040:
+.L1047:
 	ldrh	w5, [x0]
 	cmp	w5, w2
-	bcs	.L1039
+	bcs	.L1046
 	ldrh	w4, [x0, -2]
 	cmp	w4, w3
 	csel	w2, w2, w5, eq
 	csel	w19, w19, w1, eq
-.L1039:
+.L1046:
 	add	w1, w1, 1
 	add	x0, x0, 16
 	and	w1, w1, 65535
 	cmp	w1, 32
-	bne	.L1040
+	bne	.L1047
 	cmp	w19, 32
-	bne	.L1035
-	adrp	x1, .LANCHOR122
+	bne	.L1042
+	adrp	x1, .LANCHOR125
 	adrp	x0, .LC0
 	mov	w2, 295
-	add	x1, x1, :lo12:.LANCHOR122
+	add	x1, x1, :lo12:.LANCHOR125
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1035:
+.L1042:
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -6061,59 +6120,59 @@ flash_lsb_page_tbl_build:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	adrp	x19, .LANCHOR27
-	cbnz	w0, .L1047
+	cbnz	w0, .L1054
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L1048:
+.L1055:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L1048
-.L1054:
-	adrp	x20, .LANCHOR123
-	add	x20, x20, :lo12:.LANCHOR123
+	bne	.L1055
+.L1061:
+	adrp	x20, .LANCHOR126
+	add	x20, x20, :lo12:.LANCHOR126
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
 	add	x19, x19, :lo12:.LANCHOR27
 	bl	ftl_memset
 	mov	x0, 0
-.L1049:
+.L1056:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L1049
+	bne	.L1056
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1047:
+.L1054:
 	cmp	w0, 1
-	bne	.L1050
+	bne	.L1057
 	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L1053:
+.L1060:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L1051
+	bls	.L1058
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1051:
+.L1058:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1053
-	b	.L1054
-.L1050:
+	bne	.L1060
+	b	.L1061
+.L1057:
 	cmp	w0, 2
-	bne	.L1055
+	bne	.L1062
 	add	x3, x19, :lo12:.LANCHOR27
 	mov	w1, 65535
 	mov	x0, 0
-.L1057:
+.L1064:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -6122,31 +6181,31 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L1057
-	b	.L1054
-.L1055:
+	bne	.L1064
+	b	.L1061
+.L1062:
 	cmp	w0, 3
-	bne	.L1058
+	bne	.L1065
 	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L1061:
+.L1068:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L1059
+	bls	.L1066
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L1059:
+.L1066:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L1061
-	b	.L1054
-.L1058:
+	bne	.L1068
+	b	.L1061
+.L1065:
 	cmp	w0, 4
-	bne	.L1062
+	bne	.L1069
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	w2, 1
 	add	x1, x1, 16
@@ -6164,7 +6223,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L1064:
+.L1071:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -6173,37 +6232,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L1064
-	b	.L1054
-.L1062:
+	bne	.L1071
+	b	.L1061
+.L1069:
 	cmp	w0, 5
-	bne	.L1065
+	bne	.L1072
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L1066:
+.L1073:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L1066
+	bne	.L1073
 	add	x1, x1, 32
-.L1067:
+.L1074:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L1067
-	b	.L1054
-.L1065:
+	bne	.L1074
+	b	.L1061
+.L1072:
 	cmp	w0, 8
-	bne	.L1054
+	bne	.L1061
 	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L1068:
+.L1075:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L1068
-	b	.L1054
+	bne	.L1075
+	b	.L1061
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -6218,13 +6277,13 @@ flash_die_info_init:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L1084
-	adrp	x1, .LANCHOR124
+	tbz	x0, 12, .L1091
+	adrp	x1, .LANCHOR127
 	adrp	x0, .LC1
-	add	x1, x1, :lo12:.LANCHOR124
+	add	x1, x1, :lo12:.LANCHOR127
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L1084:
+.L1091:
 	adrp	x23, .LANCHOR32
 	add	x19, x23, :lo12:.LANCHOR32
 	adrp	x25, .LANCHOR26
@@ -6234,15 +6293,15 @@ flash_die_info_init:
 	ldrh	w0, [x19, 26]
 	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR126
+	adrp	x24, .LANCHOR129
 	strh	w0, [x25, #:lo12:.LANCHOR26]
-	add	x20, x24, :lo12:.LANCHOR126
+	add	x20, x24, :lo12:.LANCHOR129
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
 	strb	wzr, [x26, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR125
-	strh	w0, [x1, #:lo12:.LANCHOR125]
+	adrp	x1, .LANCHOR128
+	strh	w0, [x1, #:lo12:.LANCHOR128]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -6256,26 +6315,26 @@ flash_die_info_init:
 	add	x11, x26, :lo12:.LANCHOR12
 	add	x23, x14, :lo12:.LANCHOR38
 	mov	x8, 0
-.L1086:
+.L1093:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1085
+	cbnz	w0, .L1092
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L1085:
+.L1092:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L1086
+	bne	.L1093
 	add	x0, x7, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L1087
-.L1091:
+	beq	.L1094
+.L1098:
 	add	x7, x7, :lo12:.LANCHOR32
 	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	ldp	x19, x20, [sp, 16]
@@ -6287,17 +6346,17 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR127
-	strh	w0, [x1, #:lo12:.LANCHOR127]
+	adrp	x1, .LANCHOR130
+	strh	w0, [x1, #:lo12:.LANCHOR130]
 	ret
-.L1087:
+.L1094:
 	ldrh	w1, [x25, #:lo12:.LANCHOR26]
 	add	x14, x14, :lo12:.LANCHOR38
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
 	add	x19, x26, :lo12:.LANCHOR12
-	add	x15, x24, :lo12:.LANCHOR126
+	add	x15, x24, :lo12:.LANCHOR129
 	add	x22, x22, :lo12:.LANCHOR24
 	mov	x12, 0
 	mul	w11, w11, w1
@@ -6305,12 +6364,12 @@ flash_die_info_init:
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L1090:
+.L1097:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L1088
+	cbnz	w0, .L1095
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -6318,11 +6377,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L1088:
+.L1095:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L1090
-	b	.L1091
+	bne	.L1097
+	b	.L1098
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -6332,9 +6391,9 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR108
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LANCHOR108
 	bl	ftl_memset
 	adrp	x0, .LANCHOR80
 	mov	w1, 255
@@ -6343,8 +6402,8 @@ lpa_hash_init:
 	adrp	x0, .LANCHOR72
 	ldrb	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR107
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR110
+	ldr	x0, [x0, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -6359,59 +6418,59 @@ lpa_rebuild_hash:
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L1104
-	adrp	x1, .LANCHOR128
+	tbz	x0, 12, .L1111
+	adrp	x1, .LANCHOR131
 	adrp	x0, .LC66
 	mov	w3, 0
 	mov	w2, 218
-	add	x1, x1, :lo12:.LANCHOR128
+	add	x1, x1, :lo12:.LANCHOR131
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1104:
+.L1111:
 	adrp	x20, .LANCHOR80
 	adrp	x22, .LANCHOR72
-	adrp	x19, .LANCHOR105
-	add	x19, x19, :lo12:.LANCHOR105
+	adrp	x19, .LANCHOR108
+	add	x19, x19, :lo12:.LANCHOR108
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR107
+	adrp	x21, .LANCHOR110
 	ldrb	w0, [x22, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR107]
+	ldr	x0, [x21, #:lo12:.LANCHOR110]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR109
 	ldrb	w3, [x22, #:lo12:.LANCHOR72]
-	ldr	x5, [x21, #:lo12:.LANCHOR107]
+	ldr	x5, [x21, #:lo12:.LANCHOR110]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR106]
-.L1105:
+	ldr	x4, [x0, #:lo12:.LANCHOR109]
+.L1112:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L1107
+	blt	.L1114
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1107:
+.L1114:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L1106
+	beq	.L1113
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L1106:
+.L1113:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L1105
+	b	.L1112
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6463,20 +6522,20 @@ zftl_read_flash_info:
 	strb	w0, [x19, 9]
 	adrp	x0, .LANCHOR12
 	ldrb	w3, [x0, #:lo12:.LANCHOR12]
-.L1116:
+.L1123:
 	cmp	w3, w1, uxtb
-	bhi	.L1117
+	bhi	.L1124
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1117:
+.L1124:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1116
+	b	.L1123
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6487,20 +6546,20 @@ gc_static_wearleveling:
 	mov	w1, 10240
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR101
+	adrp	x22, .LANCHOR97
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x22, #:lo12:.LANCHOR101]
+	ldr	x5, [x22, #:lo12:.LANCHOR97]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w0, [x5, 32]
 	cmp	w0, w1
-	bls	.L1120
+	bls	.L1127
 	ldr	w1, [x5, 36]
 	add	w1, w1, w0, lsr 10
 	and	w0, w0, 1023
 	stp	w0, w1, [x5, 32]
-.L1120:
+.L1127:
 	adrp	x25, .LANCHOR5
 	ldr	w3, [x5, 36]
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
@@ -6509,12 +6568,12 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1121
+	bhi	.L1128
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	cmp	w3, w1
-	bls	.L1119
-.L1121:
+	bls	.L1126
+.L1128:
 	adrp	x21, .LANCHOR3
 	ldrh	w10, [x5, 134]
 	adrp	x23, .LANCHOR2
@@ -6532,46 +6591,46 @@ gc_static_wearleveling:
 	mov	w26, 0
 	mov	w3, 0
 	mov	w2, 0
-.L1123:
+.L1130:
 	cmp	w10, w11
-	bcc	.L1127
+	bcc	.L1134
 	ldrh	w0, [x5, 96]
 	cmp	w0, w20
-	bcs	.L1128
+	bcs	.L1135
 	strh	w20, [x5, 96]
-.L1128:
+.L1135:
 	ldrh	w0, [x5, 98]
 	cmp	w0, w26
-	bcs	.L1129
+	bcs	.L1136
 	strh	w26, [x5, 98]
-.L1129:
+.L1136:
 	udiv	w3, w3, w1
 	adrp	x24, .LANCHOR7
 	udiv	w4, w4, w2
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
 	strh	w3, [x5, 88]
 	strh	w4, [x5, 90]
-	tbz	x0, 10, .L1130
+	tbz	x0, 10, .L1137
 	adrp	x0, .LC67
 	and	w4, w4, 65535
 	and	w3, w3, 65535
 	add	x0, x0, :lo12:.LC67
 	bl	printf
-.L1130:
+.L1137:
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	adrp	x28, .LANCHOR129
-	tbz	x0, 10, .L1131
-	adrp	x0, .LANCHOR130
-	ldrh	w6, [x28, #:lo12:.LANCHOR129]
+	adrp	x28, .LANCHOR132
+	tbz	x0, 10, .L1138
+	adrp	x0, .LANCHOR133
+	ldrh	w6, [x28, #:lo12:.LANCHOR132]
 	mov	w4, w26
 	mov	w3, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR130]
+	ldrh	w5, [x0, #:lo12:.LANCHOR133]
 	mov	w2, w19
 	adrp	x0, .LC68
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC68
 	bl	printf
-.L1131:
+.L1138:
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	mov	w1, 255
 	mov	w2, 128
@@ -6580,36 +6639,36 @@ gc_static_wearleveling:
 	bl	ftl_memset
 	sub	w0, w26, w19
 	str	w0, [x29, 148]
-	ldrh	w0, [x28, #:lo12:.LANCHOR129]
+	ldrh	w0, [x28, #:lo12:.LANCHOR132]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bgt	.L1132
-	adrp	x1, .LANCHOR130
+	bgt	.L1139
+	adrp	x1, .LANCHOR133
 	sub	w0, w20, w27
-	ldrh	w1, [x1, #:lo12:.LANCHOR130]
+	ldrh	w1, [x1, #:lo12:.LANCHOR133]
 	cmp	w0, w1
-	bgt	.L1132
-.L1139:
-	cbnz	w19, .L1133
-.L1141:
-	cbz	w27, .L1119
-	ldr	x2, [x22, #:lo12:.LANCHOR101]
+	bgt	.L1139
+.L1146:
+	cbnz	w19, .L1140
+.L1148:
+	cbz	w27, .L1126
+	ldr	x2, [x22, #:lo12:.LANCHOR97]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1146:
+.L1153:
 	cmp	w0, w5
-	bcc	.L1148
+	bcc	.L1155
 	ldrh	w0, [x2, 74]
 	add	w0, w27, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w27, w0
-	bcs	.L1119
+	bcs	.L1126
 	sub	w7, w0, w27
 	strh	w7, [x2, 96]
-.L1119:
+.L1126:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6617,14 +6676,14 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1127:
+.L1134:
 	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L1124
+	tbz	x0, 3, .L1131
 	ldr	w0, [x8]
 	ldrh	w6, [x8]
 	ubfx	x0, x0, 11, 8
 	and	w6, w6, 2047
-.L1125:
+.L1132:
 	cmp	w6, w27
 	add	w1, w1, 1
 	csel	w7, w6, w27, cc
@@ -6635,19 +6694,19 @@ gc_static_wearleveling:
 	and	w27, w7, 65535
 	and	w20, w20, 65535
 	cmp	w0, w12
-	bne	.L1149
-	b	.L1150
-.L1124:
+	bne	.L1156
+	b	.L1157
+.L1131:
 	tst	w0, 24
-	bne	.L1126
+	bne	.L1133
 	ldrh	w6, [x8]
 	mov	w0, 65535
 	and	w6, w6, 2047
-	b	.L1125
-.L1126:
+	b	.L1132
+.L1133:
 	ldr	w0, [x8]
 	ubfx	x0, x0, 11, 8
-.L1149:
+.L1156:
 	cmp	w0, w19
 	add	w2, w2, 1
 	csel	w19, w0, w19, cc
@@ -6657,48 +6716,48 @@ gc_static_wearleveling:
 	and	w2, w2, 65535
 	and	w19, w19, 65535
 	and	w26, w0, 65535
-.L1150:
+.L1157:
 	add	w10, w10, 1
 	add	x8, x8, 4
 	and	w10, w10, 65535
-	b	.L1123
-.L1132:
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	b	.L1130
+.L1139:
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	adrp	x25, .LANCHOR63
 	stp	wzr, wzr, [x29, 152]
 	ldrh	w26, [x0, 134]
 	add	x0, x23, :lo12:.LANCHOR2
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR130
-	add	x0, x0, :lo12:.LANCHOR130
+	adrp	x0, .LANCHOR133
+	add	x0, x0, :lo12:.LANCHOR133
 	str	x0, [x29, 120]
 	add	x0, x25, :lo12:.LANCHOR63
 	str	x0, [x29, 136]
-.L1135:
+.L1142:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0]
 	cmp	w0, w26
-	bls	.L1139
+	bls	.L1146
 	uxtw	x25, w26
 	ldr	x4, [x21, #:lo12:.LANCHOR3]
 	lsl	x3, x25, 2
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1136
+	beq	.L1143
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1136
-	tbz	x0, 4, .L1137
-	ldrh	w0, [x28, #:lo12:.LANCHOR129]
+	beq	.L1143
+	tbz	x0, 4, .L1144
+	ldrh	w0, [x28, #:lo12:.LANCHOR132]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	ble	.L1138
+	ble	.L1145
 	ldr	w0, [x4, x3]
 	add	w1, w19, 1
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1138
+	bgt	.L1145
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6709,7 +6768,7 @@ gc_static_wearleveling:
 	add	w0, w0, 1
 	str	w0, [x29, 156]
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1138
+	tbz	x0, 10, .L1145
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6726,29 +6785,29 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC69
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-.L1173:
+.L1180:
 	bl	printf
-.L1138:
+.L1145:
 	ldr	w0, [x29, 156]
 	cmp	w0, 4
 	ldr	w0, [x29, 152]
 	ccmp	w0, 4, 2, ls
-	bhi	.L1139
-.L1136:
+	bhi	.L1146
+.L1143:
 	add	w8, w26, 1
 	and	w26, w8, 65535
-	b	.L1135
-.L1137:
+	b	.L1142
+.L1144:
 	ldr	x1, [x29, 120]
 	sub	w0, w20, w27
 	ldrh	w1, [x1]
 	cmp	w0, w1
-	ble	.L1138
+	ble	.L1145
 	ldrh	w0, [x4, x3]
 	add	w1, w27, 1
 	and	w0, w0, 2047
 	cmp	w0, w1
-	bgt	.L1138
+	bgt	.L1145
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6759,7 +6818,7 @@ gc_static_wearleveling:
 	add	w0, w0, 1
 	str	w0, [x29, 152]
 	ldr	w0, [x24, #:lo12:.LANCHOR7]
-	tbz	x0, 10, .L1138
+	tbz	x0, 10, .L1145
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6776,51 +6835,51 @@ gc_static_wearleveling:
 	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-	b	.L1173
-.L1133:
-	ldr	x2, [x22, #:lo12:.LANCHOR101]
+	b	.L1180
+.L1140:
+	ldr	x2, [x22, #:lo12:.LANCHOR97]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1142:
+.L1149:
 	cmp	w0, w5
-	bcc	.L1144
+	bcc	.L1151
 	ldrh	w0, [x2, 72]
 	add	w0, w19, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w19, w0
-	bcs	.L1141
+	bcs	.L1148
 	sub	w19, w0, w19
 	strh	w19, [x2, 98]
-	b	.L1141
-.L1144:
+	b	.L1148
+.L1151:
 	ldr	w3, [x1]
 	ubfx	x4, x3, 11, 8
 	cmp	w19, w4
-	bhi	.L1143
+	bhi	.L1150
 	sub	w4, w4, w19
 	bfi	w3, w4, 11, 8
 	str	w3, [x1]
-.L1143:
+.L1150:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1142
-.L1148:
+	b	.L1149
+.L1155:
 	ldrh	w3, [x1]
 	and	w4, w3, 2047
 	cmp	w4, w27
-	blt	.L1147
+	blt	.L1154
 	sub	w4, w4, w27
 	bfi	w3, w4, 0, 11
 	strh	w3, [x1]
-.L1147:
+.L1154:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1146
+	b	.L1153
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -6842,7 +6901,7 @@ zftl_sblk_list_init:
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR93
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR101
+	adrp	x25, .LANCHOR97
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR0]
 	adrp	x24, .LANCHOR89
@@ -6875,7 +6934,7 @@ zftl_sblk_list_init:
 	strh	wzr, [x22, #:lo12:.LANCHOR93]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR101]
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	strh	wzr, [x21, #:lo12:.LANCHOR84]
 	strh	wzr, [x20, #:lo12:.LANCHOR86]
 	strh	wzr, [x19, #:lo12:.LANCHOR82]
@@ -6889,12 +6948,12 @@ zftl_sblk_list_init:
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1175:
+.L1182:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1191
-	ldr	x0, [x25, #:lo12:.LANCHOR101]
+	blt	.L1198
+	ldr	x0, [x25, #:lo12:.LANCHOR97]
 	ldrh	w1, [x24, #:lo12:.LANCHOR89]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
@@ -6914,27 +6973,27 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1191:
+.L1198:
 	ldr	x4, [x28, #:lo12:.LANCHOR3]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1192
+	cbz	w6, .L1199
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR101]
+	ldr	x7, [x25, #:lo12:.LANCHOR97]
 	ldrb	w8, [x0, #:lo12:.LANCHOR72]
 	ldr	x0, [x29, 104]
 	ldrh	w10, [x0, #:lo12:.LANCHOR80]
 	mov	w0, 0
-.L1177:
+.L1184:
 	cmp	w1, w8
-	blt	.L1180
-	cbz	w0, .L1181
+	blt	.L1187
+	cbz	w0, .L1188
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	sxth	w0, w0
-.L1176:
+.L1183:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -6949,44 +7008,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1182
+	beq	.L1189
 	adrp	x5, .LANCHOR5
 	ldr	x5, [x5, #:lo12:.LANCHOR5]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1182
+	beq	.L1189
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1182
+	beq	.L1189
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1182
+	beq	.L1189
 	cmp	w0, 64
-	bne	.L1183
+	bne	.L1190
 	ldr	x0, [x29, 128]
 	add	x2, x21, :lo12:.LANCHOR84
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR75
-.L1195:
+.L1202:
 	bl	_insert_data_list
-.L1182:
+.L1189:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1175
-.L1180:
+	b	.L1182
+.L1187:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1178
+	tbnz	x5, 0, .L1185
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1179:
+.L1186:
 	add	w1, w1, 1
-	b	.L1177
-.L1178:
+	b	.L1184
+.L1185:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1179
-.L1181:
+	b	.L1186
+.L1188:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -6994,75 +7053,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR4
 	ldr	x1, [x1, #:lo12:.LANCHOR4]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1176
-.L1192:
+	b	.L1183
+.L1199:
 	ldr	w0, [x29, 188]
-	b	.L1176
-.L1183:
+	b	.L1183
+.L1190:
 	cmp	w0, 96
-	bne	.L1184
+	bne	.L1191
 	ldr	x0, [x29, 136]
 	add	x2, x19, :lo12:.LANCHOR82
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1195
-.L1184:
+	b	.L1202
+.L1191:
 	cmp	w0, 160
-	bne	.L1185
+	bne	.L1192
 	ldr	x0, [x29, 120]
 	add	x2, x20, :lo12:.LANCHOR86
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L1195
-.L1185:
-	cbnz	w0, .L1182
+	b	.L1202
+.L1192:
+	cbnz	w0, .L1189
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1186
+	cbz	w2, .L1193
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1187
+	tbz	x0, 4, .L1194
 	mov	w1, 5
-.L1194:
+.L1201:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1182
-.L1187:
+	b	.L1189
+.L1194:
 	mov	w1, 2
-	b	.L1194
-.L1186:
+	b	.L1201
+.L1193:
 	ands	w1, w1, 24
-	bne	.L1189
+	bne	.L1196
 	ldr	x0, [x29, 160]
 	add	x2, x24, :lo12:.LANCHOR89
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR90
-.L1196:
+.L1203:
 	bl	_insert_free_list
-	b	.L1182
-.L1189:
+	b	.L1189
+.L1196:
 	cmp	w1, 16
-	bne	.L1190
+	bne	.L1197
 	ldr	x0, [x29, 152]
 	add	x2, x23, :lo12:.LANCHOR91
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L1196
-.L1190:
+	b	.L1203
+.L1197:
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR93
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L1196
+	b	.L1203
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -7083,8 +7142,8 @@ ftl_open_sblk_init:
 	add	x20, x20, :lo12:.LANCHOR72
 	add	x21, x21, :lo12:.LC64
 	stp	x25, x26, [sp, 64]
-.L1198:
-.L1201:
+.L1205:
+.L1208:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -7104,18 +7163,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1202
+	beq	.L1209
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1199:
+.L1206:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR4
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR106
-	ldr	x3, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -7124,7 +7183,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1197
+	cbnz	w0, .L1204
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -7133,11 +7192,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1201
-.L1202:
+	b	.L1208
+.L1209:
 	mov	w0, 0
-	b	.L1199
-.L1197:
+	b	.L1206
+.L1204:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -7153,34 +7212,34 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR131
+	adrp	x20, .LANCHOR134
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR131]
+	ldrh	w0, [x20, #:lo12:.LANCHOR134]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1205
-	adrp	x1, .LANCHOR132
+	bls	.L1212
+	adrp	x1, .LANCHOR135
 	adrp	x0, .LC0
 	mov	w2, 76
-	add	x1, x1, :lo12:.LANCHOR132
+	add	x1, x1, :lo12:.LANCHOR135
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1205:
+.L1212:
 	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
 	mov	x0, x28
 	bl	ftl_memset
 	adrp	x23, .LANCHOR95
-	adrp	x5, .LANCHOR101
+	adrp	x5, .LANCHOR97
 	adrp	x0, .LANCHOR96
 	mov	w2, 21
 	ldrb	w12, [x23, #:lo12:.LANCHOR95]
-	ldr	x7, [x5, #:lo12:.LANCHOR101]
+	ldr	x7, [x5, #:lo12:.LANCHOR97]
 	ldrh	w11, [x0, #:lo12:.LANCHOR96]
-	ldrh	w13, [x20, #:lo12:.LANCHOR131]
+	ldrh	w13, [x20, #:lo12:.LANCHOR134]
 	add	x4, x7, 704
 	sub	w0, w2, w11
 	mov	w2, 1
@@ -7189,15 +7248,15 @@ pm_free_sblk:
 	sub	w2, w2, #1
 	add	x1, x1, 176
 	add	x1, x7, x1, lsl 2
-.L1206:
+.L1213:
 	cmp	x4, x1
-	bne	.L1210
+	bne	.L1217
 	adrp	x24, .LANCHOR72
 	adrp	x25, .LANCHOR80
 	adrp	x26, .LANCHOR7
 	adrp	x27, .LC72
 	ldrb	w22, [x24, #:lo12:.LANCHOR72]
-	add	x20, x20, :lo12:.LANCHOR131
+	add	x20, x20, :lo12:.LANCHOR134
 	ldrh	w0, [x25, #:lo12:.LANCHOR80]
 	add	x26, x26, :lo12:.LANCHOR7
 	add	x27, x27, :lo12:.LC72
@@ -7205,10 +7264,10 @@ pm_free_sblk:
 	str	wzr, [x29, 108]
 	mul	w22, w22, w0
 	and	w22, w22, 65535
-.L1211:
+.L1218:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1217
+	bhi	.L1224
 	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -7217,7 +7276,7 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1210:
+.L1217:
 	ldr	w0, [x4]
 	add	x8, x7, 416
 	mov	x3, 0
@@ -7225,24 +7284,24 @@ pm_free_sblk:
 	and	w0, w0, w2
 	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1207:
+.L1214:
 	cmp	w13, w3, uxth
-	bhi	.L1209
+	bhi	.L1216
 	add	x4, x4, 4
-	b	.L1206
-.L1209:
+	b	.L1213
+.L1216:
 	ldrh	w10, [x8]
 	cmp	w10, w0
-	bne	.L1208
+	bne	.L1215
 	ldrh	w10, [x28, x3, lsl 1]
 	add	w10, w10, 1
 	strh	w10, [x28, x3, lsl 1]
-.L1208:
+.L1215:
 	add	x3, x3, 1
 	add	x8, x8, 2
-	b	.L1207
-.L1217:
-	ldr	x1, [x5, #:lo12:.LANCHOR101]
+	b	.L1214
+.L1224:
+	ldr	x1, [x5, #:lo12:.LANCHOR97]
 	sxtw	x21, w19
 	add	x0, x21, 208
 	ldrb	w2, [x23, #:lo12:.LANCHOR95]
@@ -7250,22 +7309,22 @@ pm_free_sblk:
 	ldrh	w0, [x1, 692]
 	sdiv	w0, w0, w2
 	cmp	w0, w3
-	bne	.L1212
+	bne	.L1219
 	ldrb	w0, [x24, #:lo12:.LANCHOR72]
 	ldrh	w2, [x25, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	strh	w0, [x28, x21, lsl 1]
-.L1212:
+.L1219:
 	ldrh	w0, [x28, x21, lsl 1]
 	cmp	w22, w0
-	bls	.L1213
-	cbnz	w0, .L1218
-.L1215:
+	bls	.L1220
+	cbnz	w0, .L1225
+.L1222:
 	mov	w0, 65535
 	cmp	w3, w0
-	beq	.L1214
+	beq	.L1221
 	ldr	w0, [x26]
-	tbz	x0, 12, .L1216
+	tbz	x0, 12, .L1223
 	ldrh	w4, [x1, 688]
 	mov	w2, 0
 	str	x5, [x29, 96]
@@ -7273,30 +7332,30 @@ pm_free_sblk:
 	mov	x0, x27
 	bl	printf
 	ldr	x5, [x29, 96]
-.L1216:
-	ldr	x0, [x5, #:lo12:.LANCHOR101]
+.L1223:
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	add	x21, x21, 208
 	str	x5, [x29, 96]
 	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
 	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	x0, [x5, #:lo12:.LANCHOR101]
+	ldr	x0, [x5, #:lo12:.LANCHOR97]
 	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1214
-.L1213:
-	cbz	w0, .L1215
-.L1214:
+	b	.L1221
+.L1220:
+	cbz	w0, .L1222
+.L1221:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1211
-.L1218:
+	b	.L1218
+.L1225:
 	mov	w22, w0
 	str	w19, [x29, 108]
-	b	.L1214
+	b	.L1221
 	.size	pm_free_sblk, .-pm_free_sblk
 	.section	.text.idb_init,"ax",@progbits
 	.align	2
@@ -7332,14 +7391,14 @@ flash_into_data_init:
 	add	x29, sp, 0
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	str	x19, [sp, 16]
-	tbz	x0, 12, .L1227
-	adrp	x2, .LANCHOR133
+	tbz	x0, 12, .L1234
+	adrp	x2, .LANCHOR136
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR133
+	add	x2, x2, :lo12:.LANCHOR136
 	mov	w1, 100
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L1227:
+.L1234:
 	adrp	x19, .LANCHOR20
 	mov	w2, 2048
 	mov	w1, 0
@@ -7373,15 +7432,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1233:
+.L1240:
 	cmp	w2, w3
-	bhi	.L1234
+	bhi	.L1241
 	ret
-.L1234:
+.L1241:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1233
+	b	.L1240
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -7422,14 +7481,14 @@ nandc_init:
 	mov	x19, x0
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
 	str	wzr, [x29, 56]
-	tbz	x0, 12, .L1239
-	adrp	x1, .LANCHOR134
+	tbz	x0, 12, .L1246
+	adrp	x1, .LANCHOR137
 	adrp	x0, .LC74
 	mov	x2, x19
-	add	x1, x1, :lo12:.LANCHOR134
+	add	x1, x1, :lo12:.LANCHOR137
 	add	x0, x0, :lo12:.LC74
 	bl	printf
-.L1239:
+.L1246:
 	adrp	x20, .LANCHOR22
 	mov	w0, 6
 	ldr	w2, [x19, 352]
@@ -7440,22 +7499,22 @@ nandc_init:
 	mov	x22, x0
 	str	x19, [x0, #:lo12:.LANCHOR21]
 	cmp	w2, w1
-	bne	.L1240
+	bne	.L1247
 	mov	w0, 8
 	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1240:
+.L1247:
 	ldr	w1, [x19, 128]
 	mov	w0, 12336
 	movk	w0, 0x5639, lsl 16
 	cmp	w1, w0
-	bne	.L1241
+	bne	.L1248
 	mov	w0, 9
 	strb	w0, [x20, #:lo12:.LANCHOR22]
-.L1241:
+.L1248:
 	ldrb	w0, [x20, #:lo12:.LANCHOR22]
 	cmp	w0, 9
 	adrp	x0, .LANCHOR41
-	bne	.L1242
+	bne	.L1249
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR41]
 	ldr	w0, [x29, 56]
@@ -7476,17 +7535,17 @@ nandc_init:
 	mov	w0, 39
 	str	w0, [x19, 84]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1244
+	tbz	x0, 12, .L1251
 	ldr	w1, [x19]
 	ldr	w2, [x19, 8]
 	ldr	w3, [x19, 80]
 	ldr	w4, [x19, 84]
 	ldr	w5, [x19, 88]
-.L1257:
+.L1264:
 	adrp	x0, .LC75
 	add	x0, x0, :lo12:.LC75
 	bl	printf
-.L1244:
+.L1251:
 	adrp	x0, .LANCHOR42
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR42]
@@ -7495,17 +7554,17 @@ nandc_init:
 	adrp	x0, .LANCHOR40
 	strb	wzr, [x0, #:lo12:.LANCHOR40]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1238
+	tbz	x0, 12, .L1245
 	ldrb	w1, [x20, #:lo12:.LANCHOR22]
 	adrp	x0, .LC76
 	add	x0, x0, :lo12:.LC76
 	bl	printf
-.L1238:
+.L1245:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1242:
+.L1249:
 	strb	wzr, [x0, #:lo12:.LANCHOR41]
 	ldr	w0, [x29, 56]
 	orr	w0, w0, 256
@@ -7529,14 +7588,14 @@ nandc_init:
 	adrp	x1, .LANCHOR43
 	str	x0, [x1, #:lo12:.LANCHOR43]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1244
+	tbz	x0, 12, .L1251
 	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	ldr	w1, [x0]
 	ldr	w2, [x0, 344]
 	ldr	w3, [x0, 304]
 	ldr	w4, [x0, 308]
 	ldr	w5, [x0, 312]
-	b	.L1257
+	b	.L1264
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -7550,10 +7609,10 @@ buf_init:
 	add	x19, x0, :lo12:.LANCHOR46
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR114
-	add	x22, x22, :lo12:.LANCHOR114
+	adrp	x22, .LANCHOR117
+	add	x22, x22, :lo12:.LANCHOR117
 	mov	w21, 0
-.L1259:
+.L1266:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -7571,7 +7630,7 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1259
+	bne	.L1266
 	add	x0, x20, :lo12:.LANCHOR46
 	mov	w1, -1
 	strb	w1, [x0, 1984]
@@ -7595,11 +7654,11 @@ gc_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR135
+	adrp	x0, .LANCHOR138
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR63
 	add	x19, x20, :lo12:.LANCHOR63
-	strb	wzr, [x0, #:lo12:.LANCHOR135]
+	strb	wzr, [x0, #:lo12:.LANCHOR138]
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, -1
@@ -7635,15 +7694,15 @@ gc_init:
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR136
-	str	x0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR139
+	str	x0, [x1, #:lo12:.LANCHOR139]
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
 	ldrh	w0, [x20, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR137
-	str	x0, [x1, #:lo12:.LANCHOR137]
+	adrp	x1, .LANCHOR140
+	str	x0, [x1, #:lo12:.LANCHOR140]
 	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w0, w1, w0
@@ -7662,9 +7721,9 @@ gc_init:
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR138
+	adrp	x1, .LANCHOR141
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR138]
+	str	x0, [x1, #:lo12:.LANCHOR141]
 	adrp	x0, .LANCHOR83
 	ldp	x29, x30, [sp], 32
 	ldrh	w1, [x0, #:lo12:.LANCHOR83]
@@ -7688,18 +7747,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1266:
+.L1273:
 	cmp	w1, w3
-	bhi	.L1267
+	bhi	.L1274
 	ret
-.L1267:
+.L1274:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1266
+	b	.L1273
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -7763,9 +7822,9 @@ rknand_print_hex:
 	mov	x19, 0
 	mov	w20, 0
 	adrp	x27, .LC79
-.L1274:
+.L1281:
 	cmp	x25, x19
-	bne	.L1280
+	bne	.L1287
 	ldp	x19, x20, [sp, 16]
 	adrp	x1, .LC79
 	ldp	x21, x22, [sp, 32]
@@ -7777,38 +7836,38 @@ rknand_print_hex:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1280:
-	cbnz	w20, .L1275
+.L1287:
+	cbnz	w20, .L1282
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1275:
+.L1282:
 	cmp	w24, 4
-	bne	.L1276
+	bne	.L1283
 	ldr	w1, [x22, x19, lsl 2]
-.L1282:
+.L1289:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1279
+	bls	.L1286
 	mov	w20, 0
 	add	x1, x27, :lo12:.LC79
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-.L1279:
+.L1286:
 	add	x19, x19, 1
-	b	.L1274
-.L1276:
+	b	.L1281
+.L1283:
 	cmp	w24, 2
-	bne	.L1278
+	bne	.L1285
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1282
-.L1278:
+	b	.L1289
+.L1285:
 	ldrb	w1, [x22, x19]
-	b	.L1282
+	b	.L1289
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -7840,43 +7899,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1284
+	bne	.L1291
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR139+17
+	adrp	x0, .LANCHOR142+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR139+17]
-.L1339:
+	strb	w1, [x0, #:lo12:.LANCHOR142+17]
+.L1346:
 	mov	w0, 7
-	b	.L1374
-.L1284:
+	b	.L1381
+.L1291:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1286
+	bne	.L1293
 	mov	x6, 0
-.L1287:
+.L1294:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1287
+	bne	.L1294
 	stp	w6, w6, [x29, 132]
-.L1285:
+.L1292:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1292
+	bhi	.L1299
 	adrp	x7, .LANCHOR12
 	adrp	x11, .LANCHOR24
 	add	x24, x7, :lo12:.LANCHOR12
 	add	x25, x11, :lo12:.LANCHOR24
 	mov	w20, 0
 	mov	w26, 55
-.L1293:
+.L1300:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1299
-.L1300:
+	bhi	.L1306
+.L1307:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -7889,10 +7948,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1286:
+.L1293:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1288
+	bne	.L1295
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -7908,13 +7967,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1375:
+.L1382:
 	str	w0, [x29, 136]
-	b	.L1285
-.L1288:
+	b	.L1292
+.L1295:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1289
+	bne	.L1296
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -7924,14 +7983,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1374:
+.L1381:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1375
-.L1289:
+	b	.L1382
+.L1296:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1290
+	bne	.L1297
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -7941,18 +8000,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1374
-.L1290:
+	b	.L1381
+.L1297:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1339
+	bne	.L1346
 	mov	x0, 0
-.L1291:
+.L1298:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1291
+	bne	.L1298
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -7960,8 +8019,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1375
-.L1299:
+	b	.L1382
+.L1306:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -7973,7 +8032,7 @@ hynix_get_read_retry_default:
 	adrp	x1, .LANCHOR21
 	ldr	x4, [x1, #:lo12:.LANCHOR21]
 	add	x23, x4, x0
-.L1294:
+.L1301:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -7984,15 +8043,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1294
-	adrp	x3, .LANCHOR139
-	add	x3, x3, :lo12:.LANCHOR139
+	bhi	.L1301
+	adrp	x3, .LANCHOR142
+	add	x3, x3, :lo12:.LANCHOR142
 	mov	x0, 0
-.L1297:
+.L1304:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1296:
+.L1303:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -8001,10 +8060,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1296
+	bne	.L1303
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1297
+	bne	.L1304
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -8014,12 +8073,12 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1293
-.L1292:
+	b	.L1300
+.L1299:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1300
+	bhi	.L1307
 	ldp	w0, w1, [x29, 132]
 	adrp	x19, .LANCHOR12
 	add	x19, x19, :lo12:.LANCHOR12
@@ -8037,11 +8096,11 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1301:
+.L1308:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1300
+	bls	.L1307
 	ldr	w1, [x29, 128]
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
@@ -8063,22 +8122,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1302
+	bne	.L1309
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1376:
+.L1383:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1377
-.L1302:
+	b	.L1384
+.L1309:
 	cmp	w20, 1
-	bhi	.L1304
+	bhi	.L1311
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1377:
+.L1384:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -8093,10 +8152,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1305
+	bne	.L1312
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1306:
+.L1313:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -8104,122 +8163,122 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1340
+	bls	.L1347
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1307:
-	adrp	x3, .LANCHOR140
+.L1314:
+	adrp	x3, .LANCHOR143
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR140]
-.L1308:
+	ldr	x0, [x3, #:lo12:.LANCHOR143]
+.L1315:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1308
+	bhi	.L1315
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1309
+	bne	.L1316
 	mov	w1, 0
-.L1311:
+.L1318:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1310
+	beq	.L1317
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1310
+	beq	.L1317
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1311
-.L1312:
+	bne	.L1318
+.L1319:
 	adrp	x0, .LC81
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1314:
-	b	.L1314
-.L1304:
+.L1321:
+	b	.L1321
+.L1311:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1376
-.L1305:
+	b	.L1383
+.L1312:
 	str	wzr, [x27, 2052]
-	b	.L1306
-.L1340:
+	b	.L1313
+.L1347:
 	mov	w23, 16
-	b	.L1307
-.L1310:
+	b	.L1314
+.L1317:
 	cmp	w1, 6
-	bhi	.L1312
-.L1313:
-	ldr	x2, [x3, #:lo12:.LANCHOR140]
+	bhi	.L1319
+.L1320:
+	ldr	x2, [x3, #:lo12:.LANCHOR143]
 	mov	x0, 0
-.L1318:
+.L1325:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1319
-	ldr	x1, [x3, #:lo12:.LANCHOR140]
+	bgt	.L1326
+	ldr	x1, [x3, #:lo12:.LANCHOR143]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1321:
+.L1328:
 	mov	x0, 0
-.L1320:
+.L1327:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1320
+	bgt	.L1327
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1321
+	bne	.L1328
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1322:
+.L1329:
 	mov	w3, 0
 	mov	w0, 0
-.L1326:
+.L1333:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1324:
+.L1331:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1324
+	bne	.L1331
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1326
+	bne	.L1333
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1322
+	bgt	.L1329
 	mov	x0, 0
 	mov	w3, 0
-.L1329:
+.L1336:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1329
+	bne	.L1336
 	cmp	w3, 7
-	ble	.L1330
+	ble	.L1337
 	mov	w3, 1024
 	mov	w2, 1
 	adrp	x0, .LC82
@@ -8229,67 +8288,67 @@ hynix_get_read_retry_default:
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1331:
-	b	.L1331
-.L1309:
+.L1338:
+	b	.L1338
+.L1316:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1313
+	bne	.L1320
 	mov	x1, 0
-.L1315:
+.L1322:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1313
+	beq	.L1320
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1313
+	beq	.L1320
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1315
+	bne	.L1322
 	adrp	x0, .LC81
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1317:
-	b	.L1317
-.L1319:
+.L1324:
+	b	.L1324
+.L1326:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1318
-.L1330:
+	b	.L1325
+.L1337:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1342
+	beq	.L1349
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1332:
+.L1339:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1333:
+.L1340:
 	mov	x1, 0
-.L1334:
+.L1341:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1334
+	bhi	.L1341
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1333
+	bgt	.L1340
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1336
+	bhi	.L1343
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -8304,20 +8363,20 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1378:
+.L1385:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1301
-.L1342:
+	b	.L1308
+.L1349:
 	mov	x0, 4
-	b	.L1332
-.L1336:
+	b	.L1339
+.L1343:
 	mov	w0, 56
-	b	.L1378
+	b	.L1385
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
@@ -8329,9 +8388,9 @@ flash_get_read_retry_tbl:
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1379
+	bhi	.L1386
 	b	hynix_get_read_retry_default
-.L1379:
+.L1386:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -8340,7 +8399,7 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR141
+	adrp	x0, .LANCHOR144
 	adrp	x1, .LANCHOR22
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
@@ -8349,28 +8408,28 @@ nandc_xfer_done:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w1, 9
-	strb	wzr, [x0, #:lo12:.LANCHOR141]
-	bne	.L1382
+	strb	wzr, [x0, #:lo12:.LANCHOR144]
+	bne	.L1389
 	ldr	x20, [x19, #:lo12:.LANCHOR21]
 	mov	x24, x0
 	mov	w21, 0
 	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1383
+	tbnz	x0, 1, .L1390
 	adrp	x22, .LC86
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC86
 	add	x23, x23, :lo12:.LC85
-.L1384:
+.L1391:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1387
+	tbnz	x0, 20, .L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1384
+	bne	.L1391
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
@@ -8382,39 +8441,39 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1384
-.L1383:
+	b	.L1391
+.L1390:
 	adrp	x22, .LC84
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC84
 	add	x23, x23, :lo12:.LC85
-.L1385:
+.L1392:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1387
+	bge	.L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1386
+	tbz	x0, 13, .L1393
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1386
+	tbz	x0, 17, .L1393
 	ldr	w1, [x29, 72]
 	adrp	x0, .LC83
 	add	x0, x0, :lo12:.LC83
 	ubfx	x1, x1, 17, 1
-.L1419:
+.L1426:
 	bl	printf
-	b	.L1387
-.L1386:
+	b	.L1394
+.L1393:
 	ldr	w0, [x29, 64]
 	add	w21, w21, 1
 	ubfx	x0, x0, 22, 6
 	cmp	w21, w0, lsl 12
-	bne	.L1385
+	bne	.L1392
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8428,10 +8487,10 @@ nandc_xfer_done:
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1385
+	tbz	x0, 13, .L1392
 	mov	w0, 1
-	strb	w0, [x24, #:lo12:.LANCHOR141]
-.L1387:
+	strb	w0, [x24, #:lo12:.LANCHOR144]
+.L1394:
 	adrp	x0, .LANCHOR43+32
 	ldp	x19, x20, [sp, 16]
 	str	wzr, [x0, #:lo12:.LANCHOR43+32]
@@ -8439,26 +8498,26 @@ nandc_xfer_done:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1382:
+.L1389:
 	ldr	x20, [x19, #:lo12:.LANCHOR21]
 	mov	w21, 0
 	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1393
+	tbnz	x0, 1, .L1400
 	adrp	x22, .LC86
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC86
 	add	x23, x23, :lo12:.LC85
-.L1394:
+.L1401:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1387
+	tbnz	x0, 20, .L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1394
+	bne	.L1401
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
@@ -8470,34 +8529,34 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1394
-.L1393:
+	b	.L1401
+.L1400:
 	adrp	x22, .LC84
 	adrp	x23, .LC85
 	add	x22, x22, :lo12:.LC84
 	add	x23, x23, :lo12:.LC85
-.L1395:
+.L1402:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1387
+	bge	.L1394
 	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1396
+	tbz	x0, 13, .L1403
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1396
+	tbz	x0, 17, .L1403
 	adrp	x0, .LC87
 	ldr	w1, [x29, 72]
 	add	x0, x0, :lo12:.LC87
-	b	.L1419
-.L1396:
+	b	.L1426
+.L1403:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1395
+	bne	.L1402
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -8510,7 +8569,7 @@ nandc_xfer_done:
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1395
+	b	.L1402
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -8531,20 +8590,20 @@ nandc_xfer:
 	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1439
+	cbnz	w22, .L1446
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	bne	.L1422
+	bne	.L1429
 	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
 	mov	w3, 1
 	mov	w2, 0
 	ldr	x5, [x22, #:lo12:.LANCHOR21]
 	mov	w0, 0
-.L1423:
+.L1430:
 	cmp	w2, w19
-	bcc	.L1427
+	bcc	.L1434
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -8553,7 +8612,7 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1429
+	bne	.L1436
 	mov	w1, w19
 	adrp	x0, .LC88
 	add	x0, x0, :lo12:.LC88
@@ -8562,11 +8621,11 @@ nandc_xfer:
 	orr	w19, w19, 131072
 	str	w19, [x0]
 	mov	w0, -1
-.L1429:
-	tbz	x19, 13, .L1430
-	adrp	x1, .LANCHOR141
-	ldrb	w1, [x1, #:lo12:.LANCHOR141]
-	cbz	w1, .L1430
+.L1436:
+	tbz	x19, 13, .L1437
+	adrp	x1, .LANCHOR144
+	ldrb	w1, [x1, #:lo12:.LANCHOR144]
+	cbz	w1, .L1437
 	mov	w1, w19
 	adrp	x0, .LC89
 	add	x0, x0, :lo12:.LC89
@@ -8574,14 +8633,14 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	mov	w1, 1
 	str	w1, [x0, 16]
-.L1458:
+.L1465:
 	mov	w0, -1
-.L1421:
+.L1428:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1427:
+.L1434:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -8592,30 +8651,30 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1441
+	tbnz	x1, 2, .L1448
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1441
+	tbnz	x1, 18, .L1448
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1425
+	ble	.L1432
 	ubfx	x1, x1, 3, 7
-.L1426:
+.L1433:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1424:
+.L1431:
 	add	w2, w2, 1
-	b	.L1423
-.L1425:
+	b	.L1430
+.L1432:
 	ubfx	x1, x1, 19, 7
-	b	.L1426
-.L1441:
+	b	.L1433
+.L1448:
 	mov	w0, -1
-	b	.L1424
-.L1422:
+	b	.L1431
+.L1429:
 	adrp	x0, .LANCHOR40
 	lsr	w4, w19, 1
 	mov	w3, 64
@@ -8627,25 +8686,25 @@ nandc_xfer:
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1432:
+.L1439:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1433
+	bcc	.L1440
 	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
 	ldr	x4, [x22, #:lo12:.LANCHOR21]
-.L1434:
+.L1441:
 	cmp	w3, w19
-	bcc	.L1438
+	bcc	.L1445
 	str	wzr, [x4, 16]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
 	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1430
+	bne	.L1437
 	mov	w1, w19
 	adrp	x0, .LC90
 	add	x0, x0, :lo12:.LC90
@@ -8653,8 +8712,8 @@ nandc_xfer:
 	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	orr	w19, w19, 131072
 	str	w19, [x0]
-	b	.L1458
-.L1433:
+	b	.L1465
+.L1440:
 	ldr	x7, [x6, #:lo12:.LANCHOR43]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
@@ -8671,16 +8730,16 @@ nandc_xfer:
 	add	w1, w1, 4
 	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1432
-.L1438:
+	b	.L1439
+.L1445:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1444
+	tbnz	x1, 2, .L1451
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1444
+	tbnz	x1, 15, .L1451
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -8693,42 +8752,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1436
+	bls	.L1443
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1457:
+.L1464:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1435:
+.L1442:
 	add	w3, w3, 1
-	b	.L1434
-.L1436:
+	b	.L1441
+.L1443:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1457
-.L1444:
+	b	.L1464
+.L1451:
 	mov	w0, -1
-	b	.L1435
-.L1430:
+	b	.L1442
+.L1437:
 	cmn	w0, #1
-	beq	.L1421
+	beq	.L1428
 	ldr	w1, [x21]
 	cmn	w1, #1
-	bne	.L1421
+	bne	.L1428
 	ldr	w1, [x21, 4]
 	cmn	w1, #1
-	bne	.L1421
+	bne	.L1428
 	ldr	w1, [x20]
 	cmn	w1, #1
 	mov	w1, 512
 	csel	w0, w0, w1, ne
-	b	.L1421
-.L1439:
+	b	.L1428
+.L1446:
 	mov	w0, 0
-	b	.L1421
+	b	.L1428
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -8752,22 +8811,22 @@ flash_read_page:
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1460
+	tbz	x0, 4, .L1467
 	mov	w3, w1
 	adrp	x0, .LC91
 	mov	w2, w23
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1460:
+.L1467:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
 	adrp	x6, .LANCHOR9
-	cbnz	w23, .L1461
+	cbnz	w23, .L1468
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1462:
+.L1469:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -8784,12 +8843,12 @@ flash_read_page:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1464
-	cbz	w23, .L1464
+	bne	.L1471
+	cbz	w23, .L1471
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1473:
+.L1480:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -8814,23 +8873,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1461:
+.L1468:
 	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1463
+	bne	.L1470
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1462
-.L1463:
+	b	.L1469
+.L1470:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1462
-.L1464:
+	b	.L1469
+.L1471:
 	mov	w0, w20
-	b	.L1473
+	b	.L1480
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -8838,41 +8897,42 @@ flash_read_page:
 	.type	micron_read_retrial, %function
 micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
-	and	w0, w0, 255
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR40
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	mov	w22, w2
-	stp	w5, w0, [x29, 112]
-	adrp	x0, .LANCHOR40
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR7
+	mov	w22, w1
 	stp	x25, x26, [sp, 64]
-	mov	x26, x3
+	mov	x25, x2
 	stp	x27, x28, [sp, 80]
-	mov	x27, x4
+	mov	x26, x3
 	ldrb	w20, [x0, #:lo12:.LANCHOR40]
+	and	x19, x24, 255
+	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR21
-	ldrb	w19, [x29, 116]
-	add	x23, x23, :lo12:.LANCHOR7
 	mov	w21, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	add	w20, w20, w20, lsl 1
-	str	x0, [x29, 120]
+	mov	w28, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	asr	w20, w20, 2
-	adrp	x0, .LANCHOR143
-	add	x0, x0, :lo12:.LANCHOR143
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR146
+	add	x0, x0, :lo12:.LANCHOR146
 	str	x0, [x29, 104]
-	mov	w24, -1
 	ldr	x0, [x29, 120]
-	add	x25, x0, x19, lsl 8
-.L1475:
+	add	x23, x0, x19, lsl 8
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
+	str	x0, [x29, 96]
+.L1482:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w21, w0
-	bcc	.L1480
-.L1479:
+	bcc	.L1487
+.L1486:
 	ldr	x0, [x29, 120]
 	add	x19, x0, x19, lsl 8
 	mov	w0, 239
@@ -8883,26 +8943,26 @@ micron_read_retrial:
 	bl	timer_delay_ns
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	cmp	w24, w20
+	cmp	w28, w20
 	str	wzr, [x19, 2048]
 	str	wzr, [x19, 2048]
-	bcc	.L1481
-	cmn	w24, #1
+	bcc	.L1488
+	cmn	w28, #1
 	mov	w0, 256
-	csel	w24, w24, w0, eq
-.L1481:
-	cmp	w24, 256
-	ccmn	w24, #1, 4, ne
-	bne	.L1474
+	csel	w28, w28, w0, eq
+.L1488:
+	cmp	w28, 256
+	ccmn	w28, #1, 4, ne
+	bne	.L1481
 	adrp	x0, .LC93
-	mov	w4, w24
+	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1474:
-	mov	w0, w24
+.L1481:
+	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8910,194 +8970,197 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1480:
+.L1487:
 	mov	w0, 239
-	str	w0, [x25, 2056]
+	str	w0, [x23, 2056]
 	mov	w0, 137
-	str	w0, [x25, 2052]
-	add	w28, w21, 1
+	str	w0, [x23, 2052]
+	add	w27, w21, 1
 	mov	w0, 200
 	bl	timer_delay_ns
-	str	w28, [x25, 2048]
-	str	wzr, [x25, 2048]
-	mov	x3, x27
-	ldrb	w0, [x29, 116]
-	mov	x2, x26
-	ldr	w4, [x29, 112]
+	str	w27, [x23, 2048]
+	str	wzr, [x23, 2048]
+	mov	x3, x26
+	ldr	w4, [x29, 116]
+	mov	x2, x25
+	str	wzr, [x23, 2048]
 	mov	w1, w22
-	str	wzr, [x25, 2048]
-	str	wzr, [x25, 2048]
+	str	wzr, [x23, 2048]
+	mov	w0, w24
 	bl	flash_read_page
 	mov	w7, w0
-	ldr	w0, [x23]
-	tbz	x0, 12, .L1476
-	str	w7, [x29, 100]
-	mov	w4, w24
+	ldr	x0, [x29, 96]
+	ldr	w0, [x0]
+	tbz	x0, 12, .L1483
+	str	w7, [x29, 112]
+	mov	w4, w28
 	mov	w3, w21
 	mov	w2, w22
 	mov	w1, w21
 	adrp	x0, .LC92
 	add	x0, x0, :lo12:.LC92
 	bl	printf
-	ldr	w7, [x29, 100]
-.L1476:
+	ldr	w7, [x29, 112]
+.L1483:
 	cmn	w7, #1
-	beq	.L1477
-	adrp	x0, .LANCHOR140
-	cmn	w24, #1
-	csel	w24, w24, w7, ne
+	beq	.L1484
+	adrp	x0, .LANCHOR143
+	cmn	w28, #1
+	csel	w28, w28, w7, ne
 	cmp	w7, w20
-	ldr	x26, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x27, [x0, #:lo12:.LANCHOR142]
-	bcc	.L1483
-.L1477:
-	mov	w21, w28
-	b	.L1475
-.L1483:
-	mov	w24, w7
-	b	.L1479
+	ldr	x25, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x26, [x0, #:lo12:.LANCHOR145]
+	bcc	.L1490
+.L1484:
+	mov	w21, w27
+	b	.L1482
+.L1490:
+	mov	w28, w7
+	b	.L1486
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
 	.global	toshiba_3d_read_retrial
 	.type	toshiba_3d_read_retrial, %function
 toshiba_3d_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	and	w6, w1, 255
+	stp	x29, x30, [sp, -144]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x27, x28, [sp, 80]
+	mov	w28, w4
+	ubfx	x4, x23, 24, 2
+	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR17
+	and	w24, w0, 255
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	stp	x27, x28, [sp, 80]
 	mov	x27, x3
-	stp	x23, x24, [sp, 48]
-	mov	x28, x4
-	mov	w23, w2
-	stp	x19, x20, [sp, 16]
-	str	w5, [x29, 124]
+	mov	x26, x2
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR21
+	adrp	x22, .LANCHOR17
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x26, [x0, #:lo12:.LANCHOR21]
-	and	x0, x25, 255
+	ldr	x25, [x0, #:lo12:.LANCHOR21]
+	and	x0, x24, 255
 	add	x21, x0, 8
-	str	x0, [x29, 112]
+	str	x0, [x29, 128]
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
-	add	x21, x26, x21, lsl 8
+	mov	w19, -1
+	add	x21, x25, x21, lsl 8
+	mov	w20, 1
 	cmp	w0, 36
 	mov	w0, 26
 	csel	w1, w2, w1, ne
-	str	w1, [x29, 96]
+	str	w1, [x29, 120]
 	mov	w1, 10
 	csel	w0, w1, w0, ne
-	str	w0, [x29, 104]
-	cbnz	w6, .L1498
-	sxtw	x24, w25
+	str	w0, [x29, 136]
 	add	x0, x22, :lo12:.LANCHOR17
-	add	x24, x24, 8
-	mov	w19, -1
-	add	x24, x26, x24, lsl 8
-	mov	w20, 1
-	str	x0, [x29, 96]
-.L1505:
-	ldr	x0, [x29, 96]
+	cbnz	w4, .L1505
+	str	x0, [x29, 120]
+	sxtw	x0, w24
+	add	x0, x0, 8
+	add	x0, x25, x0, lsl 8
+	str	x0, [x29, 112]
+.L1512:
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1499
+	bne	.L1506
+	mov	w1, w20
 	mov	x0, x21
 	mov	w2, 0
-	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
+	ldr	x1, [x29, 112]
 	mov	w0, 93
-	str	w0, [x24, 8]
-.L1500:
-	ldr	w4, [x29, 124]
-	mov	x3, x28
-	mov	x2, x27
+	str	w0, [x1, 8]
+.L1507:
+	mov	w4, w28
+	mov	x3, x27
+	mov	x2, x26
 	mov	w1, w23
-	mov	w0, w25
+	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1501
+	tbz	x0, 4, .L1508
 	mov	w3, w4
-	str	w4, [x29, 120]
+	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC94
 	add	x0, x0, :lo12:.LC94
 	bl	printf
-	ldr	w4, [x29, 120]
-.L1501:
+	ldr	w4, [x29, 108]
+.L1508:
 	cmn	w4, #1
-	beq	.L1502
-	adrp	x0, .LANCHOR140
+	beq	.L1509
+	adrp	x0, .LANCHOR143
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	ldr	x26, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x27, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1520
-.L1502:
-	ldr	w0, [x29, 104]
+	bcc	.L1527
+.L1509:
+	ldr	w0, [x29, 136]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1505
-.L1504:
+	bne	.L1512
+.L1511:
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1506
+	bne	.L1513
 	mov	w2, 0
-.L1543:
+.L1550:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1507
-.L1499:
+	b	.L1514
+.L1506:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1500
-.L1520:
+	b	.L1507
+.L1527:
 	mov	w19, w4
-	b	.L1504
-.L1506:
+	b	.L1511
+.L1513:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1507:
+.L1514:
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1516
-	ldr	x0, [x29, 112]
-	add	x26, x26, x0, lsl 8
+	bne	.L1523
+	ldr	x0, [x29, 128]
+	add	x25, x25, x0, lsl 8
 	mov	w0, 85
-	str	w0, [x26, 2056]
+	str	w0, [x25, 2056]
 	mov	w0, 255
-	str	wzr, [x26, 2052]
-	str	wzr, [x26, 2048]
-	str	w0, [x26, 2056]
-.L1516:
+	str	wzr, [x25, 2052]
+	str	wzr, [x25, 2048]
+	str	w0, [x25, 2056]
+.L1523:
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1517
+	bcc	.L1524
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1517:
+.L1524:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1518
+	bne	.L1525
 	adrp	x0, .LC96
 	mov	w4, w19
 	mov	w3, w20
@@ -9105,7 +9168,7 @@ toshiba_3d_read_retrial:
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1518:
+.L1525:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -9113,86 +9176,84 @@ toshiba_3d_read_retrial:
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 144
 	ret
-.L1498:
-	sxtw	x24, w25
-	orr	w23, w23, w6, lsl 24
-	add	x24, x24, 8
-	add	x0, x22, :lo12:.LANCHOR17
-	add	x24, x26, x24, lsl 8
-	mov	w19, -1
-	mov	w20, 1
-	str	x0, [x29, 104]
-.L1514:
-	ldr	x0, [x29, 104]
+.L1505:
+	str	x0, [x29, 112]
+	sxtw	x0, w24
+	add	x0, x0, 8
+	add	x0, x25, x0, lsl 8
+	str	x0, [x29, 136]
+.L1521:
+	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1508
+	bne	.L1515
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1542:
-	str	w0, [x24, 8]
-	mov	x3, x28
-	mov	x2, x27
+.L1549:
+	ldr	x1, [x29, 136]
+	mov	w4, w28
+	mov	x3, x27
+	mov	x2, x26
+	str	w0, [x1, 8]
 	mov	w1, w23
-	ldr	w4, [x29, 124]
-	mov	w0, w25
+	mov	w0, w24
 	bl	flash_read_page
 	mov	w4, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1510
+	tbz	x0, 4, .L1517
 	mov	w3, w4
-	str	w4, [x29, 120]
+	str	w4, [x29, 108]
 	mov	w2, w23
 	mov	w1, w20
 	adrp	x0, .LC95
 	add	x0, x0, :lo12:.LC95
 	bl	printf
-	ldr	w4, [x29, 120]
-.L1510:
+	ldr	w4, [x29, 108]
+.L1517:
 	cmn	w4, #1
-	beq	.L1511
-	adrp	x0, .LANCHOR140
+	beq	.L1518
+	adrp	x0, .LANCHOR143
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	ldr	x26, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x27, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1521
-.L1511:
-	ldr	w0, [x29, 96]
+	bcc	.L1528
+.L1518:
+	ldr	w0, [x29, 120]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1514
-.L1513:
+	bne	.L1521
+.L1520:
 	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1515
+	bne	.L1522
 	mov	w2, 1
-	b	.L1543
-.L1508:
+	b	.L1550
+.L1515:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1542
-.L1521:
+	b	.L1549
+.L1528:
 	mov	w19, w4
-	b	.L1513
-.L1515:
+	b	.L1520
+.L1522:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1507
+	b	.L1514
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -9202,64 +9263,67 @@ toshiba_read_retrial:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	mov	x27, x3
-	stp	x19, x20, [sp, 16]
-	mov	x28, x4
 	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	stp	x19, x20, [sp, 16]
+	mov	x26, x2
+	stp	x27, x28, [sp, 80]
 	and	w19, w0, 255
 	stp	x23, x24, [sp, 48]
-	and	x26, x19, 255
-	stp	w5, w2, [x29, 120]
+	mov	x27, x3
+	str	w4, [x29, 116]
 	bl	nandc_wait_flash_ready
 	adrp	x0, .LANCHOR21
 	adrp	x1, .LANCHOR17
-	str	x1, [x29, 112]
-	add	x21, x26, 8
+	str	x1, [x29, 120]
 	ldr	x22, [x0, #:lo12:.LANCHOR21]
+	and	x0, x19, 255
+	add	x21, x0, 8
+	str	x0, [x29, 104]
 	ldrb	w0, [x1, #:lo12:.LANCHOR17]
-	sub	w0, w0, #67
 	add	x21, x22, x21, lsl 8
+	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1562
+	bls	.L1569
 	adrp	x0, .LANCHOR14
 	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1563
+	cbz	w0, .L1570
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1546:
-	add	x0, x22, x26, lsl 8
+.L1553:
+	and	x0, x19, 255
 	mov	w1, 92
+	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1545:
+.L1552:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
-	str	x0, [x29, 104]
-.L1547:
-	adrp	x0, .LANCHOR143
-	ldrb	w0, [x0, #:lo12:.LANCHOR143]
+	str	x0, [x29, 96]
+.L1554:
+	adrp	x0, .LANCHOR146
+	ldrb	w0, [x0, #:lo12:.LANCHOR146]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1556
-	mov	w25, w24
-.L1555:
-	ldr	x0, [x29, 112]
+	bcc	.L1563
+	mov	w28, w24
+.L1562:
+	ldr	x0, [x29, 120]
 	mov	w1, 0
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1557
+	bhi	.L1564
 	bl	sandisk_set_rr_para
-.L1558:
+.L1565:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
@@ -9268,29 +9332,29 @@ toshiba_read_retrial:
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1559
-	cmn	w25, #1
+	cmp	w28, w0, lsr 2
+	bcc	.L1566
+	cmn	w28, #1
 	mov	w0, 256
-	csel	w25, w25, w0, eq
-.L1559:
-	cmp	w25, 256
-	ccmn	w25, #1, 4, ne
-	bne	.L1560
-	ldr	w2, [x29, 124]
+	csel	w28, w28, w0, eq
+.L1566:
+	cmp	w28, 256
+	ccmn	w28, #1, 4, ne
+	bne	.L1567
 	adrp	x0, .LC96
-	mov	w4, w25
+	mov	w4, w28
 	mov	w3, w20
+	mov	w2, w25
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1560:
+.L1567:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1544
+	cbz	w23, .L1551
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1544:
-	mov	w0, w25
+.L1551:
+	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9298,70 +9362,71 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1563:
+.L1570:
 	mov	w23, 0
-	b	.L1546
-.L1562:
+	b	.L1553
+.L1569:
 	mov	w23, 0
-	b	.L1545
-.L1556:
-	ldr	x0, [x29, 112]
+	b	.L1552
+.L1563:
+	ldr	x0, [x29, 120]
 	mov	w1, w20
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1548
+	bhi	.L1555
 	bl	sandisk_set_rr_para
-.L1549:
-	ldr	x0, [x29, 112]
+.L1556:
+	ldr	x0, [x29, 120]
 	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	cmp	w0, 34
-	bne	.L1550
-	adrp	x0, .LANCHOR143
-	ldrb	w0, [x0, #:lo12:.LANCHOR143]
+	bne	.L1557
+	adrp	x0, .LANCHOR146
+	ldrb	w0, [x0, #:lo12:.LANCHOR146]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1550
-	ldr	x1, [x29, 104]
+	bne	.L1557
+	ldr	x1, [x29, 96]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1550:
-	add	x0, x22, x26, lsl 8
+.L1557:
+	ldr	x0, [x29, 104]
 	mov	w1, 38
-	ldr	w4, [x29, 120]
-	mov	x3, x28
-	mov	x2, x27
+	ldr	w4, [x29, 116]
+	mov	x3, x27
+	mov	x2, x26
+	add	x0, x22, x0, lsl 8
 	str	w1, [x0, 2056]
 	mov	w1, 93
 	str	w1, [x0, 2056]
+	mov	w1, w25
 	mov	w0, w19
-	ldr	w1, [x29, 124]
 	bl	flash_read_page
-	mov	w25, w0
+	mov	w28, w0
 	cmn	w0, #1
-	beq	.L1553
+	beq	.L1560
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR140
-	ldr	x27, [x0, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR142
-	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR143
+	ldr	x26, [x0, #:lo12:.LANCHOR143]
+	adrp	x0, .LANCHOR145
+	ldr	x27, [x0, #:lo12:.LANCHOR145]
 	adrp	x0, .LANCHOR40
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1555
-.L1553:
+	cmp	w28, w0, lsr 2
+	bcc	.L1562
+.L1560:
 	add	w20, w20, 1
-	b	.L1547
-.L1548:
+	b	.L1554
+.L1555:
 	bl	toshiba_set_rr_para
-	b	.L1549
-.L1557:
+	b	.L1556
+.L1564:
 	bl	toshiba_set_rr_para
-	b	.L1558
+	b	.L1565
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -9375,15 +9440,15 @@ hynix_read_retrial:
 	adrp	x0, .LANCHOR20
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
-	mov	w27, w5
+	mov	w27, w4
 	ldr	x28, [x0, #:lo12:.LANCHOR20]
-	mov	w22, w2
+	mov	w22, w1
 	stp	x25, x26, [sp, 64]
-	mov	x25, x3
+	mov	x25, x2
 	add	x28, x28, 112
 	stp	x19, x20, [sp, 16]
 	add	x0, x28, x23
-	mov	x26, x4
+	mov	x26, x3
 	mov	x21, x23
 	mov	w19, -1
 	ldrb	w24, [x28, 2]
@@ -9392,26 +9457,26 @@ hynix_read_retrial:
 	adrp	x6, .LANCHOR40
 	add	x6, x6, :lo12:.LANCHOR40
 	mov	w5, 0
-	adrp	x7, .LANCHOR140
-	adrp	x8, .LANCHOR142
-.L1577:
+	adrp	x7, .LANCHOR143
+	adrp	x8, .LANCHOR145
+.L1584:
 	cmp	w5, w24
-	bcc	.L1582
-.L1581:
+	bcc	.L1589
+.L1588:
 	adrp	x0, .LANCHOR40
 	add	x23, x28, x23
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1583
+	bcc	.L1590
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1583:
+.L1590:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1576
+	bne	.L1583
 	adrp	x0, .LC97
 	mov	w4, w19
 	mov	w3, w5
@@ -9419,7 +9484,7 @@ hynix_read_retrial:
 	mov	w1, w5
 	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1576:
+.L1583:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9428,7 +9493,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1582:
+.L1589:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -9449,21 +9514,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1579
+	beq	.L1586
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR140]
-	ldr	x26, [x8, #:lo12:.LANCHOR142]
+	ldr	x25, [x7, #:lo12:.LANCHOR143]
+	ldr	x26, [x8, #:lo12:.LANCHOR145]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1585
-.L1579:
+	bcc	.L1592
+.L1586:
 	add	w5, w5, 1
-	b	.L1577
-.L1585:
+	b	.L1584
+.L1592:
 	mov	w19, w0
-	b	.L1581
+	b	.L1588
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tunning_read,"ax",@progbits
 	.align	2
@@ -9499,7 +9564,7 @@ flash_ddr_tunning_read:
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1601:
+.L1608:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -9511,7 +9576,7 @@ flash_ddr_tunning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1596
+	tbz	x0, 4, .L1603
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -9519,51 +9584,51 @@ flash_ddr_tunning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1596:
+.L1603:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1597
-	adrp	x0, .LANCHOR140
-	ldr	x0, [x0, #:lo12:.LANCHOR140]
+	bhi	.L1604
+	adrp	x0, .LANCHOR143
+	ldr	x0, [x0, #:lo12:.LANCHOR143]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR142
-	ldr	x26, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR145
+	ldr	x26, [x0, #:lo12:.LANCHOR145]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1606
+	bcs	.L1613
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1606
+	bls	.L1613
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1599:
+.L1606:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1600:
-	cbz	w28, .L1602
+.L1607:
+	cbz	w28, .L1609
 	adrp	x0, .LANCHOR40
 	mov	w1, 3
 	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1602
+	bls	.L1609
 	mov	w1, w28
 	adrp	x0, .LC99
 	add	x0, x0, :lo12:.LC99
 	bl	printf
 	mov	w0, w28
-.L1616:
+.L1623:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1595
+	cbz	w19, .L1602
 	ldr	w1, [x29, 136]
 	adrp	x0, .LC100
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC100
 	mov	w27, w19
 	bl	printf
-.L1595:
+.L1602:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9572,29 +9637,29 @@ flash_ddr_tunning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1597:
+.L1604:
 	cmp	w24, w23
-	bls	.L1607
+	bls	.L1614
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1600
+	bhi	.L1607
 	mov	w23, w24
-.L1607:
+.L1614:
 	mov	w24, 0
-	b	.L1598
-.L1606:
+	b	.L1605
+.L1613:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1598:
+.L1605:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1601
-	b	.L1599
-.L1602:
+	bne	.L1608
+	b	.L1606
+.L1609:
 	ldrb	w0, [x29, 124]
-	b	.L1616
+	b	.L1623
 	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -9617,43 +9682,43 @@ flash_read_page_en:
 	mov	w24, w4
 	ubfx	x21, x19, 24, 2
 	cmp	w0, w20
-	bhi	.L1618
-	adrp	x1, .LANCHOR144
+	bhi	.L1625
+	adrp	x1, .LANCHOR147
 	adrp	x0, .LC0
 	mov	w2, 378
-	add	x1, x1, :lo12:.LANCHOR144
+	add	x1, x1, :lo12:.LANCHOR147
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1618:
+.L1625:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w20, [x0, w20, sxtw]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L1619
+	tbz	x0, 4, .L1626
 	adrp	x0, .LC101
 	mov	w2, w19
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L1619:
-	cbnz	w21, .L1620
+.L1626:
+	cbnz	w21, .L1627
 	adrp	x0, .LANCHOR11
 	adrp	x1, .LANCHOR25
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1621
+	cbz	w0, .L1628
 	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1620
-.L1621:
+	cbz	w0, .L1627
+.L1628:
 	adrp	x0, .LANCHOR26
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1622
+	cbz	w1, .L1629
 	add	w19, w0, w19, lsl 1
-.L1620:
+.L1627:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9662,16 +9727,16 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1617
+	bne	.L1624
 	adrp	x25, .LANCHOR42
 	mov	x26, x25
 	ldrb	w27, [x25, #:lo12:.LANCHOR42]
-	cbnz	w27, .L1624
-.L1627:
-	adrp	x0, .LANCHOR145
-	ldr	x6, [x0, #:lo12:.LANCHOR145]
-	cbnz	x6, .L1625
-.L1626:
+	cbnz	w27, .L1631
+.L1634:
+	adrp	x0, .LANCHOR148
+	ldr	x5, [x0, #:lo12:.LANCHOR148]
+	cbnz	x5, .L1632
+.L1633:
 	ldrb	w4, [x26, #:lo12:.LANCHOR42]
 	mov	w3, -1
 	mov	w2, w19
@@ -9681,7 +9746,7 @@ flash_read_page_en:
 	bl	printf
 	adrp	x0, .LANCHOR14
 	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbz	w0, .L1617
+	cbz	w0, .L1624
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9694,13 +9759,13 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1622:
+.L1629:
 	adrp	x1, .LANCHOR27
 	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1620
-.L1624:
+	b	.L1627
+.L1631:
 	strb	wzr, [x25, #:lo12:.LANCHOR42]
 	mov	w4, w24
 	mov	x3, x23
@@ -9710,10 +9775,10 @@ flash_read_page_en:
 	bl	flash_read_page
 	strb	w27, [x25, #:lo12:.LANCHOR42]
 	cmn	w0, #1
-	beq	.L1627
-.L1645:
+	beq	.L1634
+.L1652:
 	mov	w21, w0
-.L1617:
+.L1624:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -9722,17 +9787,16 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1625:
-	mov	w5, w24
-	mov	x4, x23
-	mov	x3, x22
-	mov	w2, w19
-	mov	w1, 0
+.L1632:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
 	mov	w0, w20
-	blr	x6
+	blr	x5
 	cmn	w0, #1
-	beq	.L1626
-	b	.L1645
+	beq	.L1633
+	b	.L1652
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -9743,11 +9807,11 @@ flash_get_last_written_page:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR125
+	adrp	x0, .LANCHOR128
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	mov	x24, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR125]
+	ldrh	w19, [x0, #:lo12:.LANCHOR128]
 	adrp	x0, .LANCHOR32+26
 	stp	x21, x22, [sp, 32]
 	and	w21, w1, 65535
@@ -9762,23 +9826,23 @@ flash_get_last_written_page:
 	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1647
+	bne	.L1654
 	mov	w27, 0
 	mov	w28, 2
-.L1648:
+.L1655:
 	cmp	w27, w19
-	ble	.L1651
-.L1647:
+	ble	.L1658
+.L1654:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1652
+	tbz	x0, 12, .L1659
 	ldr	w3, [x22]
 	adrp	x0, .LC103
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC103
 	bl	printf
-.L1652:
+.L1659:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9787,7 +9851,7 @@ flash_get_last_written_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1651:
+.L1658:
 	add	w20, w27, w19
 	mov	w4, w25
 	mov	x3, x22
@@ -9797,14 +9861,14 @@ flash_get_last_written_page:
 	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1649
+	bne	.L1656
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1648
-.L1649:
+	b	.L1655
+.L1656:
 	add	w20, w20, 1
 	sxth	w27, w20
-	b	.L1648
+	b	.L1655
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -9841,46 +9905,46 @@ flash_info_blk_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	tbz	x0, 12, .L1659
+	tbz	x0, 12, .L1666
 	ldr	x4, [x20, #:lo12:.LANCHOR20]
-	adrp	x2, .LANCHOR146
+	adrp	x2, .LANCHOR149
 	adrp	x0, .LC104
 	mov	w3, 2048
-	add	x2, x2, :lo12:.LANCHOR146
+	add	x2, x2, :lo12:.LANCHOR149
 	mov	w1, 49
 	add	x0, x0, :lo12:.LC104
 	bl	printf
-.L1659:
-	adrp	x21, .LANCHOR147
+.L1666:
+	adrp	x21, .LANCHOR150
 	adrp	x23, .LANCHOR26
 	mov	w24, 21321
 	add	x26, x23, :lo12:.LANCHOR26
 	mov	x22, x21
 	mov	w19, 4
 	movk	w24, 0x5359, lsl 16
-.L1662:
+.L1669:
 	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x3, [x21, #:lo12:.LANCHOR147]
+	ldr	x3, [x21, #:lo12:.LANCHOR150]
 	mov	w0, 0
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
-	add	x27, x21, :lo12:.LANCHOR147
+	add	x27, x21, :lo12:.LANCHOR150
 	add	x25, x20, :lo12:.LANCHOR20
 	mul	w1, w1, w19
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1660
+	beq	.L1667
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1661
-.L1660:
+	beq	.L1668
+.L1667:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1662
-.L1686:
+	bne	.L1669
+.L1693:
 	mov	w0, -1
-.L1658:
+.L1665:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9888,16 +9952,16 @@ flash_info_blk_init:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1670:
+.L1677:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1671
+	bne	.L1678
 	ldr	w19, [x0, 4]
-.L1664:
-	add	x24, x21, :lo12:.LANCHOR148
+.L1671:
+	add	x24, x21, :lo12:.LANCHOR151
 	ldrh	w0, [x23, #:lo12:.LANCHOR26]
-	ldr	x3, [x22, #:lo12:.LANCHOR147]
+	ldr	x3, [x22, #:lo12:.LANCHOR150]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldrb	w1, [x24, 1]
@@ -9905,85 +9969,85 @@ flash_info_blk_init:
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1665
+	beq	.L1672
 	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1665
+	bne	.L1672
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1665
+	bcs	.L1672
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x21, #:lo12:.LANCHOR148]
+	strb	w1, [x21, #:lo12:.LANCHOR151]
 	strb	w0, [x24, 1]
-.L1665:
-	ldrb	w1, [x21, #:lo12:.LANCHOR148]
-	add	x24, x21, :lo12:.LANCHOR148
-	ldr	x3, [x22, #:lo12:.LANCHOR147]
+.L1672:
+	ldrb	w1, [x21, #:lo12:.LANCHOR151]
+	add	x24, x21, :lo12:.LANCHOR151
+	ldr	x3, [x22, #:lo12:.LANCHOR150]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w21, [x21, #:lo12:.LANCHOR148]
+	ldrb	w21, [x21, #:lo12:.LANCHOR151]
 	strh	w0, [x24, 2]
 	ldrh	w0, [x23, #:lo12:.LANCHOR26]
 	mov	w23, 21321
 	movk	w23, 0x5359, lsl 16
 	madd	w21, w21, w0, w19
-.L1666:
-	tbz	w19, #31, .L1668
+.L1673:
+	tbz	w19, #31, .L1675
 	cmn	w19, #1
-	bne	.L1669
+	bne	.L1676
 	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w1, [x0]
 	adrp	x0, .LC105
 	add	x0, x0, :lo12:.LC105
 	bl	printf
-	b	.L1686
-.L1668:
-	ldr	x3, [x22, #:lo12:.LANCHOR147]
+	b	.L1693
+.L1675:
+	ldr	x3, [x22, #:lo12:.LANCHOR150]
 	mov	w4, 4
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1667
+	beq	.L1674
 	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x0]
 	cmp	w0, w23
-	bne	.L1667
-.L1669:
+	bne	.L1674
+.L1676:
 	mov	w0, 0
-	b	.L1658
-.L1667:
+	b	.L1665
+.L1674:
 	sub	w19, w19, #1
 	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1666
-.L1661:
-	adrp	x21, .LANCHOR148
-	add	x1, x21, :lo12:.LANCHOR148
+	b	.L1673
+.L1668:
+	adrp	x21, .LANCHOR151
+	add	x1, x21, :lo12:.LANCHOR151
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
 	ldrh	w1, [x26]
 	ldr	x3, [x27]
-	strb	w0, [x21, #:lo12:.LANCHOR148]
+	strb	w0, [x21, #:lo12:.LANCHOR151]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1670
-.L1671:
+	bne	.L1677
+.L1678:
 	mov	w19, 0
-	b	.L1664
+	b	.L1671
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -10003,34 +10067,34 @@ flash_ddr_para_scan:
 	mov	w23, w1
 	str	x25, [sp, 64]
 	strb	w21, [x19, #:lo12:.LANCHOR14]
-	adrp	x24, .LANCHOR150
+	adrp	x24, .LANCHOR153
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR149
+	adrp	x25, .LANCHOR152
 	ldrb	w0, [x20, #:lo12:.LANCHOR39]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR149]
+	ldr	x3, [x25, #:lo12:.LANCHOR152]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR150]
+	ldr	x2, [x24, #:lo12:.LANCHOR153]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR149]
+	ldr	x3, [x25, #:lo12:.LANCHOR152]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR150]
+	ldr	x2, [x24, #:lo12:.LANCHOR153]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1688
+	bne	.L1695
 	ldrb	w1, [x20, #:lo12:.LANCHOR39]
-	tbz	x1, 0, .L1688
+	tbz	x1, 0, .L1695
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
 	strb	wzr, [x19, #:lo12:.LANCHOR14]
-.L1689:
+.L1696:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -10038,10 +10102,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1688:
+.L1695:
 	mov	w1, 1
 	strb	w1, [x0, #:lo12:.LANCHOR14]
-	b	.L1689
+	b	.L1696
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -10064,14 +10128,14 @@ flash_complete_page_read:
 	mov	x25, x2
 	ubfx	x21, x23, 24, 2
 	cmp	w0, w20
-	bhi	.L1695
-	adrp	x1, .LANCHOR151
+	bhi	.L1702
+	adrp	x1, .LANCHOR154
 	adrp	x0, .LC0
 	mov	w2, 789
-	add	x1, x1, :lo12:.LANCHOR151
+	add	x1, x1, :lo12:.LANCHOR154
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1695:
+.L1702:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w22, [x0, w20, sxtw]
@@ -10079,23 +10143,23 @@ flash_complete_page_read:
 	ldr	x4, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1696
+	cbnz	w21, .L1703
 	adrp	x0, .LANCHOR11
 	adrp	x1, .LANCHOR25
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1697
+	cbz	w0, .L1704
 	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1696
-.L1697:
+	cbz	w0, .L1703
+.L1704:
 	adrp	x0, .LANCHOR26
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1698
+	cbz	w1, .L1705
 	add	w19, w0, w19, lsl 1
-.L1696:
+.L1703:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
@@ -10114,12 +10178,12 @@ flash_complete_page_read:
 	ldr	x0, [x0, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1699
-	cbz	w21, .L1699
+	bne	.L1706
+	cbz	w21, .L1706
 	sub	w0, w21, #1
 	add	w1, w19, w19, lsl 1
 	add	w0, w0, w1
-.L1732:
+.L1739:
 	adrp	x20, .LANCHOR32
 	add	x28, x20, :lo12:.LANCHOR32
 	bl	nandc_set_seed
@@ -10130,10 +10194,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1701
+	bne	.L1708
 	adrp	x26, .LANCHOR42
 	ldrb	w27, [x26, #:lo12:.LANCHOR42]
-	cbz	w27, .L1702
+	cbz	w27, .L1709
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
 	strb	wzr, [x26, #:lo12:.LANCHOR42]
@@ -10142,16 +10206,16 @@ flash_complete_page_read:
 	mov	w0, w22
 	bl	flash_read_page
 	strb	w27, [x26, #:lo12:.LANCHOR42]
-	cbnz	w21, .L1703
-.L1708:
+	cbnz	w21, .L1710
+.L1715:
 	adrp	x1, .LANCHOR11
 	ldrb	w1, [x1, #:lo12:.LANCHOR11]
-	cbz	w1, .L1703
+	cbz	w1, .L1710
 	adrp	x1, .LANCHOR40
 	ldrb	w1, [x1, #:lo12:.LANCHOR40]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1703
+	blt	.L1710
 	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
@@ -10159,7 +10223,7 @@ flash_complete_page_read:
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1694:
+.L1701:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10167,23 +10231,23 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1698:
+.L1705:
 	adrp	x1, .LANCHOR27
 	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1696
-.L1699:
+	b	.L1703
+.L1706:
 	mov	w0, w19
-	b	.L1732
-.L1703:
+	b	.L1739
+.L1710:
 	cmn	w0, #1
-	bne	.L1694
-.L1709:
-	adrp	x0, .LANCHOR145
-	ldr	x6, [x0, #:lo12:.LANCHOR145]
-	cbnz	x6, .L1705
-.L1707:
+	bne	.L1701
+.L1716:
+	adrp	x0, .LANCHOR148
+	ldr	x5, [x0, #:lo12:.LANCHOR148]
+	cbnz	x5, .L1712
+.L1714:
 	adrp	x0, .LANCHOR42
 	mov	w3, -1
 	mov	w2, w23
@@ -10194,22 +10258,21 @@ flash_complete_page_read:
 	bl	printf
 	adrp	x0, .LANCHOR14
 	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	cbnz	w0, .L1706
+	cbnz	w0, .L1713
 	mov	w0, -1
-	b	.L1694
-.L1705:
+	b	.L1701
+.L1712:
 	add	x0, x20, :lo12:.LANCHOR32
-	mov	x4, x25
-	mov	x3, x24
-	mov	w2, w19
-	mov	w1, w21
-	ldrb	w5, [x0, 9]
+	mov	x3, x25
+	mov	x2, x24
+	orr	w1, w19, w21, lsl 24
+	ldrb	w4, [x0, 9]
 	mov	w0, w22
-	blr	x6
+	blr	x5
 	cmn	w0, #1
-	beq	.L1707
-	b	.L1694
-.L1706:
+	beq	.L1714
+	b	.L1701
+.L1713:
 	add	x20, x20, :lo12:.LANCHOR32
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
@@ -10223,30 +10286,30 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1702:
-	cbz	w21, .L1708
-	b	.L1709
-.L1701:
-	cbnz	w21, .L1694
-	b	.L1708
+.L1709:
+	cbz	w21, .L1715
+	b	.L1716
+.L1708:
+	cbnz	w21, .L1701
+	b	.L1715
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR120
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR117]
+	ldrb	w0, [x0, #:lo12:.LANCHOR120]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1734
-.L1752:
+	bne	.L1741
+.L1759:
 	mov	w21, 0
-	b	.L1733
-.L1734:
+	b	.L1740
+.L1741:
 	adrp	x19, .LANCHOR46
 	sxtw	x22, w0
 	add	x1, x19, :lo12:.LANCHOR46
@@ -10255,34 +10318,34 @@ queue_wait_first_req_completed:
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1752
-	adrp	x1, .L1737
-	add	x1, x1, :lo12:.L1737
+	bhi	.L1759
+	adrp	x1, .L1744
+	add	x1, x1, :lo12:.L1744
 	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1737
+	adr	x3, .Lrtx1744
 	add	x1, x3, w1, sxtb #2
 	br	x1
-.Lrtx1737:
+.Lrtx1744:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1737:
-	.byte	(.L1736 - .Lrtx1737) / 4
-	.byte	(.L1736 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1739 - .Lrtx1737) / 4
-	.byte	(.L1740 - .Lrtx1737) / 4
-	.byte	(.L1741 - .Lrtx1737) / 4
-	.byte	(.L1738 - .Lrtx1737) / 4
-	.byte	(.L1741 - .Lrtx1737) / 4
+.L1744:
+	.byte	(.L1743 - .Lrtx1744) / 4
+	.byte	(.L1743 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1746 - .Lrtx1744) / 4
+	.byte	(.L1747 - .Lrtx1744) / 4
+	.byte	(.L1748 - .Lrtx1744) / 4
+	.byte	(.L1745 - .Lrtx1744) / 4
+	.byte	(.L1748 - .Lrtx1744) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1736:
+.L1743:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1752
+	tbz	x0, 6, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	ldp	x1, x0, [x19, 8]
@@ -10297,18 +10360,18 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-	b	.L1752
-.L1738:
+	b	.L1759
+.L1745:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1752
+	tbz	x21, 6, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	mov	w0, 5
 	add	x19, x19, x22, lsl 6
 	tst	w21, w0
-	beq	.L1751
+	beq	.L1758
 	ldrb	w1, [x19, 1]
 	mov	w0, 11
 	ldr	w3, [x19, 40]
@@ -10318,11 +10381,11 @@ queue_wait_first_req_completed:
 	adrp	x0, .LC107
 	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1770:
+.L1777:
 	mov	w0, -1
 	str	w0, [x19, 52]
-	b	.L1733
-.L1741:
+	b	.L1740
+.L1748:
 	cmp	w2, 10
 	add	x20, x19, :lo12:.LANCHOR46
 	ubfiz	x0, x0, 6, 8
@@ -10331,33 +10394,33 @@ queue_wait_first_req_completed:
 	add	x0, x20, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x21, 21, 3
-.L1746:
+.L1753:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1750
+	bne	.L1757
 	mov	w21, -1
-	b	.L1733
-.L1750:
+	b	.L1740
+.L1757:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x20, x23, lsl 6
 	add	x0, x20, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1746
+	bne	.L1753
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1746
+	bne	.L1753
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1748
+	tbz	x24, 6, .L1755
 	add	x20, x20, x22, lsl 6
 	ands	w21, w0, 15
-	beq	.L1749
+	beq	.L1756
 	ldrb	w1, [x20, 1]
 	mov	w4, 11
 	ldr	w3, [x20, 40]
@@ -10370,7 +10433,7 @@ queue_wait_first_req_completed:
 	strb	w0, [x20, 58]
 	mov	w0, -1
 	str	w0, [x20, 52]
-.L1748:
+.L1755:
 	add	x1, x19, :lo12:.LANCHOR46
 	add	x22, x1, x22, lsl 6
 	add	x1, x1, x23, lsl 6
@@ -10378,47 +10441,47 @@ queue_wait_first_req_completed:
 	strb	w0, [x1, 58]
 	ldr	w0, [x22, 52]
 	str	w0, [x1, 52]
-.L1733:
+.L1740:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1749:
+.L1756:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1748
-.L1739:
+	b	.L1755
+.L1746:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1752
+	tbz	x21, 5, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	tst	x21, 15
 	add	x19, x19, x22, lsl 6
-	beq	.L1751
+	beq	.L1758
 	mov	w0, 11
 	strb	w0, [x19, 58]
-	b	.L1770
-.L1751:
+	b	.L1777
+.L1758:
 	mov	w0, 12
 	str	wzr, [x19, 52]
 	strb	w0, [x19, 58]
-	b	.L1752
-.L1740:
+	b	.L1759
+.L1747:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1752
+	tbz	x0, 6, .L1759
 	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1752
+	b	.L1759
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -10428,19 +10491,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR117
-	add	x19, x19, :lo12:.LANCHOR117
-.L1772:
+	adrp	x19, .LANCHOR120
+	add	x19, x19, :lo12:.LANCHOR120
+.L1779:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1773
+	bne	.L1780
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1773:
+.L1780:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1772
+	b	.L1779
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -10504,9 +10567,9 @@ ftl_open_sblk_read_test:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR80
-	adrp	x24, .LANCHOR114
+	adrp	x24, .LANCHOR117
 	add	x23, x23, :lo12:.LANCHOR80
-	add	x24, x24, :lo12:.LANCHOR114
+	add	x24, x24, :lo12:.LANCHOR117
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	x1, x29, 80
@@ -10514,45 +10577,45 @@ ftl_open_sblk_read_test:
 	bl	ftl_get_blk_list_in_sblk
 	strb	w0, [x29, 73]
 	strh	w14, [x29, 64]
-.L1780:
+.L1787:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bls	.L1779
+	bls	.L1786
 	adrp	x22, .LANCHOR72
-	adrp	x21, .LANCHOR152
+	adrp	x21, .LANCHOR155
 	mov	w19, 0
 	add	x22, x22, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LANCHOR152
-	b	.L1782
-.L1785:
+	add	x21, x21, :lo12:.LANCHOR155
+	b	.L1789
+.L1792:
 	add	x0, x29, 64
 	mov	w1, 65535
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	bne	.L1781
-.L1784:
+	bne	.L1788
+.L1791:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-.L1782:
+.L1789:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1785
+	bhi	.L1792
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1780
-.L1781:
-	adrp	x1, .LANCHOR99
+	b	.L1787
+.L1788:
+	adrp	x1, .LANCHOR103
 	ldrb	w3, [x24]
 	mov	x2, x21
-	ldrh	w4, [x1, #:lo12:.LANCHOR99]
+	ldrh	w4, [x1, #:lo12:.LANCHOR103]
 	adrp	x1, ftl_tmp_buffer
 	add	x1, x1, :lo12:ftl_tmp_buffer
 	madd	w0, w4, w0, w20
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
-	bne	.L1784
-.L1779:
+	bne	.L1791
+.L1786:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -10572,19 +10635,19 @@ sblk_read_page:
 	mov	w22, w21
 	stp	x23, x24, [sp, 48]
 	mov	x20, x0
-	adrp	x23, .LANCHOR117
+	adrp	x23, .LANCHOR120
 	adrp	x24, .LANCHOR46
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR117
+	add	x23, x23, :lo12:.LANCHOR120
 	add	x24, x24, :lo12:.LANCHOR46
 	stp	x25, x26, [sp, 64]
-.L1791:
-	cbnz	w22, .L1795
-.L1803:
+.L1798:
+	cbnz	w22, .L1802
+.L1810:
 	adrp	x19, .LANCHOR46
 	add	x19, x19, :lo12:.LANCHOR46
-.L1796:
-	cbnz	w21, .L1799
+.L1803:
+	cbnz	w21, .L1806
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10592,14 +10655,14 @@ sblk_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1795:
+.L1802:
 	ldrb	w25, [x19]
 	ldr	w26, [x19, 40]
-.L1792:
+.L1799:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L1793
+	cbnz	w0, .L1800
 	ldr	w1, [x19, 40]
 	mov	w0, 48
 	bl	flash_start_page_read
@@ -10612,26 +10675,26 @@ sblk_read_page:
 	mov	x0, x23
 	bl	buf_add_tail
 	subs	w22, w22, #1
-	beq	.L1803
+	beq	.L1810
 	ubfiz	x19, x25, 6, 8
 	add	x19, x24, x19
-	b	.L1791
-.L1793:
+	b	.L1798
+.L1800:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1792
-.L1799:
+	b	.L1799
+.L1806:
 	ldrb	w0, [x20, 58]
 	cmp	w0, 12
-	bne	.L1797
+	bne	.L1804
 	ldrb	w20, [x20]
 	sub	w21, w21, #1
 	add	x20, x19, x20, lsl 6
-	b	.L1796
-.L1797:
+	b	.L1803
+.L1804:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1796
+	b	.L1803
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -10651,80 +10714,80 @@ gc_check_data_one_wl:
 	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1806
+	cbnz	x0, .L1813
 	mov	w0, 1
 	bl	buf_alloc
 	str	x0, [x20, 8]
-.L1806:
+.L1813:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x20, [x0, 8]
-	cbnz	x20, .L1807
-	adrp	x1, .LANCHOR153
+	cbnz	x20, .L1814
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
 	mov	w2, 348
-	add	x1, x1, :lo12:.LANCHOR153
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1807:
-	adrp	x26, .LANCHOR99
+.L1814:
+	adrp	x26, .LANCHOR103
 	adrp	x27, .LANCHOR67
 	add	x25, x21, 96
-	add	x26, x26, :lo12:.LANCHOR99
+	add	x26, x26, :lo12:.LANCHOR103
 	add	x27, x27, :lo12:.LANCHOR67
 	mov	w24, 0
-.L1808:
+.L1815:
 	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1817
+	bge	.L1824
 	mov	w23, 1
 	add	x22, x19, :lo12:.LANCHOR63
-	b	.L1818
-.L1816:
+	b	.L1825
+.L1823:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1809
+	bne	.L1816
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1829:
+.L1836:
 	str	w0, [x20, 40]
 	mov	w1, 1
 	mov	x0, x20
 	bl	sblk_read_page
 	ldr	w2, [x20, 52]
-	adrp	x1, .LANCHOR136
+	adrp	x1, .LANCHOR139
 	cmn	w2, #1
-	beq	.L1812
+	beq	.L1819
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR136]
+	ldr	x4, [x1, #:lo12:.LANCHOR139]
 	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1812
-	adrp	x4, .LANCHOR137
-	ldr	x4, [x4, #:lo12:.LANCHOR137]
+	bne	.L1819
+	adrp	x4, .LANCHOR140
+	ldr	x4, [x4, #:lo12:.LANCHOR140]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1813
-.L1812:
+	beq	.L1820
+.L1819:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	ldr	x1, [x1, #:lo12:.LANCHOR139]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1813
+	beq	.L1820
 	adrp	x1, .LANCHOR7
 	ldr	w1, [x1, #:lo12:.LANCHOR7]
-	tbz	x1, 10, .L1814
+	tbz	x1, 10, .L1821
 	ldr	x1, [x20, 24]
-	adrp	x4, .LANCHOR137
-	ldr	x4, [x4, #:lo12:.LANCHOR137]
+	adrp	x4, .LANCHOR140
+	ldr	x4, [x4, #:lo12:.LANCHOR140]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
@@ -10734,13 +10797,13 @@ gc_check_data_one_wl:
 	ldr	w7, [x1, 8]
 	ldr	w1, [x20, 40]
 	bl	printf
-.L1814:
+.L1821:
 	adrp	x0, .LANCHOR4
 	ldrh	w1, [x21, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1805:
+.L1812:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -10749,37 +10812,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1809:
+.L1816:
 	cmp	w2, 2
-	bne	.L1811
+	bne	.L1818
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1829
-.L1811:
+	b	.L1836
+.L1818:
 	add	w0, w0, w1
-	b	.L1829
-.L1813:
+	b	.L1836
+.L1820:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1818:
+.L1825:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1816
+	ble	.L1823
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1808
-.L1817:
-.L1815:
+	b	.L1815
+.L1824:
+.L1822:
 	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1805
+	b	.L1812
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -10806,22 +10869,22 @@ flash_prog_page:
 	add	x23, x25, x23, lsl 8
 	and	w24, w1, 2097151
 	ubfx	x28, x21, 24, 2
-	tbz	x0, 4, .L1831
+	tbz	x0, 4, .L1838
 	adrp	x0, .LC109
 	mov	w3, w4
 	mov	w2, w28
 	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1831:
+.L1838:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w28, .L1832
+	cbnz	w28, .L1839
 	bl	zftl_flash_enter_slc_mode
-.L1833:
+.L1840:
 	add	x19, x25, x19, lsl 8
 	mov	w0, 128
 	str	w0, [x19, 2056]
@@ -10851,15 +10914,15 @@ flash_prog_page:
 	mov	w0, w20
 	bl	nandc_de_cs
 	and	w19, w2, 4
-	tbz	x2, 2, .L1830
+	tbz	x2, 2, .L1837
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L1830
+	tbz	x0, 12, .L1837
 	adrp	x0, .LC110
 	mov	w2, w19
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC110
 	bl	printf
-.L1830:
+.L1837:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10868,9 +10931,9 @@ flash_prog_page:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1832:
+.L1839:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1833
+	b	.L1840
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -10884,19 +10947,19 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1846
-	adrp	x0, .LANCHOR154
-	ldrb	w0, [x0, #:lo12:.LANCHOR154]
+	bne	.L1853
+	adrp	x0, .LANCHOR157
+	ldrb	w0, [x0, #:lo12:.LANCHOR157]
 	cmp	w0, w19
-	bhi	.L1850
-.L1846:
-	adrp	x22, .LANCHOR149
-	adrp	x23, .LANCHOR150
+	bhi	.L1857
+.L1853:
+	adrp	x22, .LANCHOR152
+	adrp	x23, .LANCHOR153
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR149]
+	ldr	x0, [x22, #:lo12:.LANCHOR152]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	ldr	x0, [x23, #:lo12:.LANCHOR153]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
@@ -10907,54 +10970,54 @@ flash_test_blk:
 	mov	w1, w20
 	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1848
+	beq	.L1855
 	adrp	x19, .LANCHOR32
 	add	x19, x19, :lo12:.LANCHOR32
-	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	ldr	x3, [x22, #:lo12:.LANCHOR152]
 	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	ldr	x2, [x23, #:lo12:.LANCHOR153]
 	mov	w0, w21
 	ldrb	w4, [x19, 9]
 	bl	flash_prog_page
 	cmn	w0, #1
-	beq	.L1848
+	beq	.L1855
 	ldrb	w4, [x19, 9]
 	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	ldr	x3, [x22, #:lo12:.LANCHOR152]
 	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	ldr	x2, [x23, #:lo12:.LANCHOR153]
 	bl	flash_read_page
 	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1848
-	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	beq	.L1855
+	ldr	x0, [x23, #:lo12:.LANCHOR153]
 	ldr	w1, [x0]
 	mov	w0, 23130
 	movk	w0, 0x5a5a, lsl 16
 	cmp	w1, w0
-	bne	.L1848
-	ldr	x0, [x22, #:lo12:.LANCHOR149]
+	bne	.L1855
+	ldr	x0, [x22, #:lo12:.LANCHOR152]
 	ldr	w1, [x0]
 	mov	w0, 42405
 	movk	w0, 0xa5a5, lsl 16
 	cmp	w1, w0
-	beq	.L1849
-.L1848:
+	beq	.L1856
+.L1855:
 	mov	w19, -1
-.L1849:
+.L1856:
 	mov	w1, w20
 	mov	w0, w21
 	bl	flash_erase_block
 	mov	w0, w19
-.L1845:
+.L1852:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1850:
+.L1857:
 	mov	w0, 0
-	b	.L1845
+	b	.L1852
 	.size	flash_test_blk, .-flash_test_blk
 	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
 	.align	2
@@ -10965,50 +11028,50 @@ id_block_prog_msb_ff_data:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	adrp	x0, .LANCHOR155
+	adrp	x0, .LANCHOR158
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	ldrb	w0, [x0, #:lo12:.LANCHOR155]
+	ldrb	w0, [x0, #:lo12:.LANCHOR158]
 	str	x25, [sp, 64]
-	cbnz	w0, .L1861
+	cbnz	w0, .L1868
 	adrp	x20, .LANCHOR32
 	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w0, [x20, 19]
 	sub	w0, w0, #5
 	and	w3, w0, 255
 	cmp	w3, 63
-	bhi	.L1861
+	bhi	.L1868
 	and	w19, w2, 65535
 	mov	x2, 16391
 	movk	x2, 0x4000, lsl 16
 	movk	x2, 0x8000, lsl 48
 	lsr	x0, x2, x3
-	tbz	x0, 0, .L1861
-	adrp	x21, .LANCHOR123
+	tbz	x0, 0, .L1868
+	adrp	x21, .LANCHOR126
 	mov	w23, w1
-	add	x21, x21, :lo12:.LANCHOR123
+	add	x21, x21, :lo12:.LANCHOR126
 	mov	w25, 65535
-	adrp	x24, .LANCHOR140
-.L1863:
+	adrp	x24, .LANCHOR143
+.L1870:
 	ldrh	w0, [x20, 10]
 	cmp	w0, w19
-	bhi	.L1864
-.L1861:
+	bhi	.L1871
+.L1868:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1864:
+.L1871:
 	ldrh	w0, [x21, w19, sxtw 1]
 	cmp	w0, w25
-	bne	.L1861
-	ldr	x0, [x24, #:lo12:.LANCHOR140]
+	bne	.L1868
+	ldr	x0, [x24, #:lo12:.LANCHOR143]
 	mov	w2, 16384
 	mov	w1, 255
 	bl	ftl_memset
-	ldr	x3, [x24, #:lo12:.LANCHOR140]
+	ldr	x3, [x24, #:lo12:.LANCHOR143]
 	add	w1, w19, w23
 	ldrb	w4, [x20, 9]
 	add	w19, w19, 1
@@ -11016,7 +11079,7 @@ id_block_prog_msb_ff_data:
 	mov	w0, w22
 	and	w19, w19, 65535
 	bl	flash_prog_page
-	b	.L1863
+	b	.L1870
 	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
 	.section	.text.idb_write_data,"ax",@progbits
 	.align	2
@@ -11033,16 +11096,16 @@ idb_write_data:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bls	.L1867
+	bls	.L1874
 	cmp	w1, 575
-	bhi	.L1868
-	adrp	x0, .LANCHOR156
+	bhi	.L1875
+	adrp	x0, .LANCHOR159
 	mov	x1, x2
 	mov	w2, 1
 	cmp	w4, 64
-	str	w2, [x0, #:lo12:.LANCHOR156]
+	str	w2, [x0, #:lo12:.LANCHOR159]
 	adrp	x0, idb_buf
-	bhi	.L1869
+	bhi	.L1876
 	mov	w2, 64
 	sub	w4, w2, w4
 	sub	w2, w3, w4
@@ -11050,9 +11113,9 @@ idb_write_data:
 	lsl	w2, w2, 9
 	add	x1, x1, x4
 	add	x0, x0, :lo12:idb_buf
-.L1945:
+.L1952:
 	bl	ftl_memcpy
-.L1924:
+.L1931:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11061,7 +11124,7 @@ idb_write_data:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 256
 	ret
-.L1869:
+.L1876:
 	mov	w2, 576
 	sub	w2, w2, w4
 	cmp	w3, w2
@@ -11071,14 +11134,14 @@ idb_write_data:
 	add	x0, x0, :lo12:idb_buf
 	lsl	w2, w2, 9
 	add	x0, x0, x4
-	b	.L1945
-.L1867:
+	b	.L1952
+.L1874:
 	cmp	w1, 575
-	bls	.L1924
-.L1868:
-	adrp	x0, .LANCHOR156
-	ldr	w0, [x0, #:lo12:.LANCHOR156]
-	cbz	w0, .L1924
+	bls	.L1931
+.L1875:
+	adrp	x0, .LANCHOR159
+	ldr	w0, [x0, #:lo12:.LANCHOR159]
+	cbz	w0, .L1931
 	adrp	x3, .LANCHOR32
 	add	x1, x3, :lo12:.LANCHOR32
 	str	x3, [x29, 176]
@@ -11100,9 +11163,9 @@ idb_write_data:
 	cmp	w27, 512
 	csel	w27, w27, w0, lt
 	mov	w0, 0
-.L1874:
+.L1881:
 	ldr	w5, [x1]
-	cbnz	w5, .L1872
+	cbnz	w5, .L1879
 	ldr	w5, [x6, w0, uxtw 2]
 	add	w0, w0, 1
 	str	w5, [x1], -4
@@ -11110,8 +11173,8 @@ idb_write_data:
 	sub	w2, w2, #1
 	csel	w0, w0, wzr, cc
 	cmp	w2, 4096
-	bne	.L1874
-.L1872:
+	bne	.L1881
+.L1879:
 	add	x0, x3, :lo12:idb_buf
 	mov	w3, w27
 	ldr	w1, [x0, w2, uxtw 2]
@@ -11122,7 +11185,7 @@ idb_write_data:
 	adrp	x0, gp_flash_check_buf
 	add	x0, x0, :lo12:gp_flash_check_buf
 	str	x0, [x29, 184]
-.L1908:
+.L1915:
 	adrp	x0, gp_flash_check_buf
 	add	x20, x0, :lo12:gp_flash_check_buf
 	mov	w1, 0
@@ -11135,7 +11198,7 @@ idb_write_data:
 	add	x0, x0, x1, uxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	beq	.L1875
+	beq	.L1882
 	ldr	w1, [x29, 132]
 	adrp	x19, .LANCHOR42
 	mul	w26, w0, w1
@@ -11155,11 +11218,11 @@ idb_write_data:
 	msub	w23, w23, w22, w26
 	sub	w24, w26, w23
 	cmp	w26, w24
-	bne	.L1914
+	bne	.L1921
 	adrp	x0, .LANCHOR22
 	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	bne	.L1914
+	bne	.L1921
 	mov	w2, 1024
 	mov	w1, 0
 	mov	x0, x20
@@ -11195,19 +11258,19 @@ idb_write_data:
 	str	w0, [x1, 8]
 	sub	w0, w27, #4
 	str	w0, [x29, 164]
-.L1876:
+.L1883:
 	adrp	x22, idb_buf
-	adrp	x28, .LANCHOR155
+	adrp	x28, .LANCHOR158
 	add	x22, x22, :lo12:idb_buf
-	add	x0, x28, :lo12:.LANCHOR155
+	add	x0, x28, :lo12:.LANCHOR158
 	adrp	x25, .LANCHOR27
 	str	x0, [x29, 152]
 	mov	w20, 0
 	add	x0, x25, :lo12:.LANCHOR27
 	str	x0, [x29, 144]
-.L1878:
+.L1885:
 	cmp	w27, w20
-	bhi	.L1889
+	bhi	.L1896
 	ldr	x0, [x29, 176]
 	add	x25, x19, :lo12:.LANCHOR42
 	strb	wzr, [x19, #:lo12:.LANCHOR42]
@@ -11233,10 +11296,10 @@ idb_write_data:
 	adrp	x0, .LANCHOR27
 	add	x0, x0, :lo12:.LANCHOR27
 	str	x0, [x29, 104]
-.L1890:
+.L1897:
 	ldr	w0, [x29, 160]
 	cmp	w22, w0
-	bcc	.L1904
+	bcc	.L1911
 	adrp	x0, .LANCHOR42
 	ldrb	w1, [x29, 128]
 	adrp	x3, idb_buf
@@ -11245,21 +11308,21 @@ idb_write_data:
 	mov	x1, 0
 	ldr	w0, [x29, 164]
 	lsl	w0, w0, 7
-.L1905:
+.L1912:
 	mov	w19, w1
 	cmp	w1, w0
-	bcc	.L1906
+	bcc	.L1913
 	ldr	w0, [x29, 168]
 	add	w0, w0, 1
 	str	w0, [x29, 168]
 	cmp	w0, 5
-	bls	.L1875
-	b	.L1910
-.L1914:
+	bls	.L1882
+	b	.L1917
+.L1921:
 	mov	x6, 0
 	str	w27, [x29, 164]
-	b	.L1876
-.L1889:
+	b	.L1883
+.L1896:
 	ldr	x2, [x29, 152]
 	add	w5, w23, w20
 	lsr	w5, w5, 2
@@ -11267,30 +11330,30 @@ idb_write_data:
 	add	w1, w5, 1
 	ldrb	w2, [x2]
 	ldrh	w0, [x0, w1, sxtw 1]
-	cbz	w2, .L1880
+	cbz	w2, .L1887
 	adrp	x0, .LANCHOR25
 	ldrb	w3, [x0, #:lo12:.LANCHOR25]
 	lsl	w0, w1, 1
 	cmp	w3, 0
 	csel	w0, w0, w1, ne
-.L1880:
+.L1887:
 	adrp	x1, .LANCHOR22
 	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	cmp	w1, 9
-	bne	.L1882
-.L1943:
+	bne	.L1889
+.L1950:
 	str	w0, [x29, 192]
 	mov	w0, 61424
 	str	w0, [x29, 196]
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0, w5, sxtw 1]
-	cbnz	w2, .L1884
+	cbnz	w2, .L1891
 	mov	w5, w0
-.L1885:
+.L1892:
 	mul	w1, w21, w5
 	adrp	x2, .LANCHOR40
 	adrp	x0, .LANCHOR10
-	cbnz	x6, .L1886
+	cbnz	x6, .L1893
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR40]
@@ -11310,31 +11373,31 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	ldrb	w0, [x28, #:lo12:.LANCHOR155]
+	ldrb	w0, [x28, #:lo12:.LANCHOR158]
 	ldr	w5, [x29, 140]
-	cbnz	w0, .L1887
+	cbnz	w0, .L1894
 	udiv	w1, w24, w21
 	add	w2, w5, 1
 	bl	id_block_prog_msb_ff_data
-.L1887:
+.L1894:
 	add	x22, x22, 2048
-.L1888:
+.L1895:
 	add	w20, w20, 4
 	mov	x6, 0
 	and	w20, w20, 65535
-	b	.L1878
-.L1882:
+	b	.L1885
+.L1889:
 	sub	w0, w0, #1
 	lsl	w0, w0, 2
-	b	.L1943
-.L1884:
+	b	.L1950
+.L1891:
 	adrp	x0, .LANCHOR25
 	ldrb	w1, [x0, #:lo12:.LANCHOR25]
 	lsl	w0, w5, 1
 	cmp	w1, 0
 	csel	w5, w0, w5, ne
-	b	.L1885
-.L1886:
+	b	.L1892
+.L1893:
 	ldr	x3, [x29, 176]
 	add	w1, w1, w24
 	ldrb	w7, [x2, #:lo12:.LANCHOR40]
@@ -11353,21 +11416,21 @@ idb_write_data:
 	ldr	w7, [x29, 160]
 	mov	w0, w7
 	bl	nandc_bch_sel
-	b	.L1888
-.L1904:
+	b	.L1895
+.L1911:
 	add	w19, w28, w22
 	ldr	w0, [x29, 152]
-	adrp	x1, .LANCHOR155
+	adrp	x1, .LANCHOR158
 	sub	w24, w21, w0
 	ldr	x0, [x29, 104]
 	udiv	w19, w19, w21
-	ldrb	w1, [x1, #:lo12:.LANCHOR155]
+	ldrb	w1, [x1, #:lo12:.LANCHOR158]
 	and	w24, w24, 65535
 	and	w19, w19, 65535
 	ldrh	w0, [x0, w19, sxtw 1]
-	cbnz	w1, .L1891
+	cbnz	w1, .L1898
 	mov	w19, w0
-.L1892:
+.L1899:
 	adrp	x0, .LANCHOR10
 	ldr	w1, [x29, 136]
 	ldrb	w23, [x0, #:lo12:.LANCHOR10]
@@ -11387,44 +11450,44 @@ idb_write_data:
 	adrp	x0, .LANCHOR14
 	add	x0, x0, :lo12:.LANCHOR14
 	str	x0, [x29, 112]
-.L1893:
+.L1900:
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_read_page
-	mov	w6, w0
+	mov	w5, w0
 	cmn	w0, #1
-	bne	.L1894
-	ldrb	w5, [x25]
-	cbnz	w5, .L1895
-.L1898:
-	adrp	x0, .LANCHOR145
-	ldr	x7, [x0, #:lo12:.LANCHOR145]
-	cbnz	x7, .L1896
-.L1897:
+	bne	.L1901
+	ldrb	w6, [x25]
+	cbnz	w6, .L1902
+.L1905:
+	adrp	x0, .LANCHOR148
+	ldr	x6, [x0, #:lo12:.LANCHOR148]
+	cbnz	x6, .L1903
+.L1904:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
-	cbz	w0, .L1894
+	cbz	w0, .L1901
 	mov	w4, w21
 	add	x3, x29, 192
 	mov	x2, x20
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_ddr_tunning_read
-	b	.L1944
-.L1891:
+	b	.L1951
+.L1898:
 	adrp	x0, .LANCHOR25
 	ldrb	w1, [x0, #:lo12:.LANCHOR25]
 	lsl	w0, w19, 1
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-	b	.L1892
-.L1895:
-	str	w5, [x29, 100]
+	b	.L1899
+.L1902:
+	str	w6, [x29, 100]
 	mov	w4, w21
-	str	w6, [x29, 120]
+	str	w5, [x29, 120]
 	add	x3, x29, 192
 	strb	wzr, [x25]
 	mov	x2, x20
@@ -11432,37 +11495,36 @@ idb_write_data:
 	mov	w0, 0
 	bl	flash_read_page
 	cmn	w0, #1
-	ldr	w5, [x29, 100]
-	strb	w5, [x25]
-	ldr	w6, [x29, 120]
-	beq	.L1898
-.L1944:
-	mov	w6, w0
-.L1894:
-	cmn	w6, #1
+	ldr	w6, [x29, 100]
+	strb	w6, [x25]
+	ldr	w5, [x29, 120]
+	beq	.L1905
+.L1951:
+	mov	w5, w0
+.L1901:
+	cmn	w5, #1
 	cset	w3, eq
 	cmp	w23, 16
 	cset	w0, ne
 	tst	w3, w0
-	beq	.L1900
+	beq	.L1907
 	mov	w0, 16
 	mov	w23, 16
 	bl	nandc_bch_sel
-	b	.L1893
-.L1896:
-	str	w6, [x29, 120]
-	mov	w5, w21
-	add	x4, x29, 192
-	mov	x3, x20
-	mov	w2, w19
-	mov	w1, 0
+	b	.L1900
+.L1903:
+	str	w5, [x29, 120]
+	mov	w4, w21
+	add	x3, x29, 192
+	mov	x2, x20
+	mov	w1, w19
 	mov	w0, 0
-	blr	x7
-	ldr	w6, [x29, 120]
+	blr	x6
 	cmn	w0, #1
-	beq	.L1897
-	b	.L1944
-.L1900:
+	ldr	w5, [x29, 120]
+	beq	.L1904
+	b	.L1951
+.L1907:
 	ldr	w0, [x29, 124]
 	bl	nandc_bch_sel
 	cmp	w3, 0
@@ -11472,35 +11534,35 @@ idb_write_data:
 	ldr	w0, [x29, 136]
 	cmp	w22, 0
 	ccmp	w26, w0, 0, eq
-	bne	.L1902
+	bne	.L1909
 	ldr	w0, [x29, 144]
-	cbnz	w0, .L1902
+	cbnz	w0, .L1909
 	ldr	w1, [x20]
 	mov	w0, 18766
 	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	bne	.L1902
+	bne	.L1909
 	ldr	w0, [x29, 160]
 	ldrb	w21, [x20, 17]
 	add	w0, w0, w24
 	str	w0, [x29, 160]
-.L1903:
+.L1910:
 	add	w22, w24, w22
 	and	w22, w22, 65535
-	b	.L1890
-.L1902:
+	b	.L1897
+.L1909:
 	ubfiz	x0, x24, 9, 16
 	str	wzr, [x29, 152]
 	add	x20, x20, x0
-	b	.L1903
-.L1906:
+	b	.L1910
+.L1913:
 	ldr	x4, [x29, 184]
 	lsl	x2, x1, 2
 	add	x1, x1, 1
 	ldr	w4, [x2, x4]
 	ldr	w2, [x3, x2]
 	cmp	w4, w2
-	beq	.L1905
+	beq	.L1912
 	ldr	x0, [x29, 184]
 	mov	w2, 512
 	mov	w1, 0
@@ -11512,22 +11574,22 @@ idb_write_data:
 	mov	w1, w26
 	mov	w0, 0
 	bl	flash_erase_block
-.L1875:
+.L1882:
 	ldr	w0, [x29, 172]
 	add	w0, w0, 1
 	str	w0, [x29, 172]
 	cmp	w0, 4
-	bne	.L1908
+	bne	.L1915
 	ldr	w0, [x29, 168]
-	cbnz	w0, .L1910
+	cbnz	w0, .L1917
 	adrp	x0, .LC113
 	mov	w1, 0
 	add	x0, x0, :lo12:.LC113
 	bl	printf
-.L1910:
-	adrp	x0, .LANCHOR156
-	str	wzr, [x0, #:lo12:.LANCHOR156]
-	b	.L1924
+.L1917:
+	adrp	x0, .LANCHOR159
+	str	wzr, [x0, #:lo12:.LANCHOR159]
+	b	.L1931
 	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
@@ -11550,14 +11612,14 @@ flash_start_tlc_page_prog:
 	mov	x23, x5
 	mov	x24, x6
 	cmp	w0, w19
-	bhi	.L1947
-	adrp	x1, .LANCHOR157
+	bhi	.L1954
+	adrp	x1, .LANCHOR160
 	adrp	x0, .LC0
 	mov	w2, 648
-	add	x1, x1, :lo12:.LANCHOR157
+	add	x1, x1, :lo12:.LANCHOR160
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1947:
+.L1954:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w26, [x0, w19, sxtw]
@@ -11565,12 +11627,12 @@ flash_start_tlc_page_prog:
 	ldr	x19, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w26
 	bl	nandc_cs
-	cbz	w25, .L1948
+	cbz	w25, .L1955
 	sxtw	x0, w26
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w25, [x0, 8]
-.L1948:
+.L1955:
 	ubfiz	x0, x26, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
@@ -11653,8 +11715,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -11671,21 +11733,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L1956:
+.L1963:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1957
+	cbnz	w0, .L1964
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1957:
+.L1964:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1956
+	b	.L1963
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -11702,13 +11764,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L1960:
+.L1967:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1961
+	cbnz	w0, .L1968
 	cmp	w24, 2
-	bne	.L1962
+	bne	.L1969
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -11784,25 +11846,25 @@ sblk_xlc_prog_pages:
 	mov	w0, 1
 	strb	w0, [x1, 59]
 	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	bl	buf_add_tail
-.L1963:
+.L1970:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1961:
+.L1968:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1960
-.L1962:
+	b	.L1967
+.L1969:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L1963
+	b	.L1970
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
@@ -11825,62 +11887,62 @@ flash_start_page_prog:
 	ubfx	x27, x1, 21, 3
 	ubfx	x22, x1, 24, 2
 	cmp	w0, w27
-	bhi	.L1966
-	adrp	x1, .LANCHOR158
+	bhi	.L1973
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
 	mov	w2, 685
-	add	x1, x1, :lo12:.LANCHOR158
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1966:
+.L1973:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w21, [x0, w27, sxtw]
 	adrp	x0, .LANCHOR21
 	ldr	x20, [x0, #:lo12:.LANCHOR21]
 	bl	nandc_rdy_status
-	cbnz	w0, .L1967
+	cbnz	w0, .L1974
 	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	cmp	w0, 1
-	bne	.L1968
+	bne	.L1975
 	bl	nandc_wait_flash_ready
-.L1967:
+.L1974:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L1969
+	cbnz	w22, .L1976
 	adrp	x0, .LANCHOR11
 	adrp	x1, .LANCHOR25
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1970
+	cbz	w0, .L1977
 	ldrb	w0, [x1, #:lo12:.LANCHOR25]
-	cbz	w0, .L1971
-.L1970:
+	cbz	w0, .L1978
+.L1977:
 	adrp	x0, .LANCHOR26
 	ldrb	w1, [x1, #:lo12:.LANCHOR25]
 	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1972
+	cbz	w1, .L1979
 	add	w19, w0, w19, lsl 1
-.L1971:
+.L1978:
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L1973
-.L1968:
+	b	.L1980
+.L1975:
 	mov	w2, 64
 	mov	w1, w19
 	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L1967
-.L1972:
+	b	.L1974
+.L1979:
 	adrp	x1, .LANCHOR27
 	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L1973:
+.L1980:
 	ubfiz	x0, x21, 8, 8
 	add	x20, x20, x0
 	mov	w0, 128
@@ -11911,10 +11973,10 @@ flash_start_page_prog:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs
-.L1969:
+.L1976:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1973
+	b	.L1980
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -11929,27 +11991,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR117
+	adrp	x0, .LANCHOR120
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	ldrb	w1, [x0, #:lo12:.LANCHOR120]
 	cmp	w1, 255
-	beq	.L1979
+	beq	.L1986
 	adrp	x2, .LANCHOR46
 	add	x2, x2, :lo12:.LANCHOR46
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L1981:
+.L1988:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L1980
+	bne	.L1987
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L1980
+	bne	.L1987
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L1979:
+.L1986:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -11957,16 +12019,16 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR120
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L1980:
+.L1987:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L1981
-	b	.L1979
+	bne	.L1988
+	b	.L1986
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
@@ -11983,24 +12045,24 @@ sblk_prog_page:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
-	cbz	w0, .L1988
+	cbz	w0, .L1995
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L1988
+	tbz	x0, 8, .L1995
 	ldr	w1, [x19, 40]
 	adrp	x0, .LC114
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1988:
+.L1995:
 	adrp	x25, .LANCHOR36
 	adrp	x23, .LANCHOR46
 	add	x25, x25, :lo12:.LANCHOR36
 	add	x23, x23, :lo12:.LANCHOR46
 	mov	w21, 0
 	mov	w24, 1
-.L1989:
-	cbnz	w20, .L1999
+.L1996:
+	cbnz	w20, .L2006
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -12009,48 +12071,48 @@ sblk_prog_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1999:
+.L2006:
 	ldrb	w26, [x19]
 	ldr	w22, [x19, 40]
-.L1990:
+.L1997:
 	mov	w1, 1
 	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L1991
+	cbnz	w0, .L1998
 	cmp	w20, 1
-	beq	.L1992
+	beq	.L1999
 	ldrb	w0, [x25]
-	cbnz	w0, .L1993
-.L1992:
+	cbnz	w0, .L2000
+.L1999:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L1994:
+.L2001:
 	ubfiz	x19, x26, 6, 8
 	sub	w20, w20, #1
 	add	x19, x23, x19
-	b	.L1989
-.L1991:
+	b	.L1996
+.L1998:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1990
-.L1993:
+	b	.L1997
+.L2000:
 	ldrb	w0, [x19]
 	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L1995
-	adrp	x1, .LANCHOR159
+	bne	.L2002
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
 	mov	w2, 489
-	add	x1, x1, :lo12:.LANCHOR159
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1995:
+.L2002:
 	ldrb	w0, [x19]
 	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
 	cmp	w27, w0
-	bne	.L1996
+	bne	.L2003
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x0, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR95
@@ -12073,9 +12135,9 @@ sblk_prog_page:
 	cmp	w4, w0
 	and	w1, w1, w5
 	ccmp	w22, w1, 0, ne
-	bne	.L1996
+	bne	.L2003
 	cmp	w21, w3
-	beq	.L1996
+	beq	.L2003
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
@@ -12088,15 +12150,15 @@ sblk_prog_page:
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
 	bl	buf_add_tail
-	b	.L1994
-.L1996:
+	b	.L2001
+.L2003:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L1994
+	b	.L2001
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -12104,22 +12166,22 @@ sblk_prog_page:
 	.type	ftl_flush, %function
 ftl_flush:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR115
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR112]
+	ldrb	w1, [x0, #:lo12:.LANCHOR115]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR160
-	cbz	w1, .L2011
-	ldrb	w2, [x20, #:lo12:.LANCHOR160]
+	adrp	x20, .LANCHOR163
+	cbz	w1, .L2018
+	ldrb	w2, [x20, #:lo12:.LANCHOR163]
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L2011:
+.L2018:
 	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR112]
-	strb	w0, [x20, #:lo12:.LANCHOR160]
+	strb	wzr, [x19, #:lo12:.LANCHOR115]
+	strb	w0, [x20, #:lo12:.LANCHOR163]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -12148,43 +12210,43 @@ flash_prog_page_en:
 	and	w21, w5, 255
 	ubfx	x19, x20, 24, 2
 	cmp	w0, w22
-	bhi	.L2017
-	adrp	x1, .LANCHOR161
+	bhi	.L2024
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
 	mov	w2, 473
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2017:
+.L2024:
 	adrp	x0, .LANCHOR24
 	add	x0, x0, :lo12:.LANCHOR24
 	ldrb	w26, [x0, w22, sxtw]
-	cbnz	w19, .L2027
+	cbnz	w19, .L2034
 	adrp	x0, .LANCHOR11
 	ldrb	w1, [x0, #:lo12:.LANCHOR11]
 	adrp	x0, .LANCHOR25
-	cbz	w1, .L2019
+	cbz	w1, .L2026
 	ldrb	w1, [x0, #:lo12:.LANCHOR25]
-	cbz	w1, .L2027
-.L2019:
+	cbz	w1, .L2034
+.L2026:
 	adrp	x1, .LANCHOR26
 	ldrb	w0, [x0, #:lo12:.LANCHOR25]
 	ldrh	w1, [x1, #:lo12:.LANCHOR26]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L2020
+	cbz	w0, .L2027
 	add	w19, w19, w1, lsl 1
-.L2018:
+.L2025:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 4, .L2021
+	tbz	x0, 4, .L2028
 	adrp	x0, .LC115
 	mov	w2, w20
 	mov	w1, w26
 	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L2021:
+.L2028:
 	mov	w1, w19
 	mov	w4, w25
 	mov	x3, x23
@@ -12192,68 +12254,68 @@ flash_prog_page_en:
 	mov	w0, w26
 	bl	flash_prog_page
 	mov	w19, w0
-	cbz	w21, .L2022
-	adrp	x26, .LANCHOR149
-	adrp	x21, .LANCHOR150
+	cbz	w21, .L2029
+	adrp	x26, .LANCHOR152
+	adrp	x21, .LANCHOR153
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x26, #:lo12:.LANCHOR149]
+	ldr	x3, [x26, #:lo12:.LANCHOR152]
 	mov	w0, w22
-	ldr	x2, [x21, #:lo12:.LANCHOR150]
+	ldr	x2, [x21, #:lo12:.LANCHOR153]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2023
-	ldr	x0, [x21, #:lo12:.LANCHOR150]
+	beq	.L2030
+	ldr	x0, [x21, #:lo12:.LANCHOR153]
 	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L2023
-	ldr	x0, [x26, #:lo12:.LANCHOR149]
+	bne	.L2030
+	ldr	x0, [x26, #:lo12:.LANCHOR152]
 	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L2022
-.L2023:
-	ldr	x1, [x26, #:lo12:.LANCHOR149]
+	beq	.L2029
+.L2030:
+	ldr	x1, [x26, #:lo12:.LANCHOR152]
 	mov	w3, 4
 	adrp	x0, .LC116
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC116
 	bl	rknand_print_hex
-	ldr	x1, [x21, #:lo12:.LANCHOR150]
+	ldr	x1, [x21, #:lo12:.LANCHOR153]
 	mov	w3, 4
 	adrp	x0, .LC117
 	mov	w2, w3
 	add	x0, x0, :lo12:.LC117
 	bl	rknand_print_hex
-.L2024:
+.L2031:
 	mov	w1, w20
 	adrp	x0, .LC118
 	add	x0, x0, :lo12:.LC118
 	bl	printf
 	mov	w2, 499
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR161
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	mov	w0, -1
-	b	.L2025
-.L2020:
+	b	.L2032
+.L2027:
 	adrp	x0, .LANCHOR27
 	add	x0, x0, :lo12:.LANCHOR27
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L2018
-.L2027:
+	b	.L2025
+.L2034:
 	mov	w19, w20
-	b	.L2018
-.L2022:
+	b	.L2025
+.L2029:
 	mov	w0, w19
 	cmn	w19, #1
-	beq	.L2024
-.L2025:
+	beq	.L2031
+.L2032:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12271,11 +12333,11 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR152
+	adrp	x25, .LANCHOR155
 	stp	x21, x22, [sp, 32]
-	adrp	x26, .LANCHOR100
+	adrp	x26, .LANCHOR104
 	and	w21, w0, 65535
-	add	x0, x26, :lo12:.LANCHOR100
+	add	x0, x26, :lo12:.LANCHOR104
 	stp	x19, x20, [sp, 16]
 	mov	w23, 0
 	stp	x27, x28, [sp, 80]
@@ -12284,100 +12346,100 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR95
-	str	wzr, [x25, #:lo12:.LANCHOR152]
+	str	wzr, [x25, #:lo12:.LANCHOR155]
 	str	x0, [x29, 96]
-.L2039:
+.L2046:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L2049
+	bls	.L2056
 	add	x0, x27, :lo12:.LANCHOR95
 	mov	w22, 0
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR7
 	add	x0, x0, :lo12:.LANCHOR7
 	str	x0, [x29, 104]
-	b	.L2050
-.L2048:
+	b	.L2057
+.L2055:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L2040
+	tbz	x0, 12, .L2047
 	adrp	x0, .LC119
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L2040:
+.L2047:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L2041
+	cbnz	w20, .L2048
 	adrp	x0, .LANCHOR20
 	ldr	x0, [x0, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L2042
-.L2041:
+	bcs	.L2049
+.L2048:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L2042
-	adrp	x0, .LANCHOR99
+	cbnz	w0, .L2049
+	adrp	x0, .LANCHOR103
 	mov	w1, w23
-	ldrh	w7, [x0, #:lo12:.LANCHOR99]
+	ldrh	w7, [x0, #:lo12:.LANCHOR103]
 	mov	w0, w28
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L2043
+	cbz	w0, .L2050
 	adrp	x0, .LANCHOR67
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	bne	.L2065
+	bne	.L2072
 	adrp	x0, .LANCHOR11
 	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L2065
+	cbz	w0, .L2072
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L2065
-.L2047:
+	cbnz	w0, .L2072
+.L2054:
 	adrp	x0, .LANCHOR67
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	add	w26, w26, w0, lsl 24
-.L2046:
-	adrp	x0, .LANCHOR114
+.L2053:
+	adrp	x0, .LANCHOR117
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR152
+	add	x3, x25, :lo12:.LANCHOR155
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR114]
+	ldrb	w4, [x0, #:lo12:.LANCHOR117]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L2042
-.L2065:
+	cbz	w0, .L2049
+.L2072:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L2042:
+.L2049:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2050:
+.L2057:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L2048
+	bhi	.L2055
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2039
-.L2043:
-	cbz	w23, .L2046
-	b	.L2047
-.L2049:
-	cbz	w23, .L2051
+	b	.L2046
+.L2050:
+	cbz	w23, .L2053
+	b	.L2054
+.L2056:
+	cbz	w23, .L2058
 	adrp	x0, .LANCHOR3
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
@@ -12385,7 +12447,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L2051:
+.L2058:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12420,18 +12482,18 @@ ftl_prog_page:
 	bl	flash_prog_page_en
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2066
-	mov	w2, 2034
-	adrp	x1, .LANCHOR162
+	bne	.L2073
+	mov	w2, 2052
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR162
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	adrp	x0, .LC118
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L2066:
+.L2073:
 	mov	w0, w19
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
@@ -12448,39 +12510,39 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR114
+	adrp	x21, .LANCHOR117
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR164
+	adrp	x22, .LANCHOR167
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR99
+	adrp	x23, .LANCHOR103
 	stp	x27, x28, [sp, 80]
 	mov	x26, x23
-	ldrb	w2, [x21, #:lo12:.LANCHOR114]
-	add	x25, x22, :lo12:.LANCHOR164
-	add	x28, x23, :lo12:.LANCHOR99
+	ldrb	w2, [x21, #:lo12:.LANCHOR117]
+	add	x25, x22, :lo12:.LANCHOR167
+	add	x28, x23, :lo12:.LANCHOR103
 	mov	w24, 0
 	stp	x19, x20, [sp, 16]
 	mov	w27, w0
-	adrp	x20, .LANCHOR163
+	adrp	x20, .LANCHOR166
 	lsl	w2, w2, 1
-	add	x0, x20, :lo12:.LANCHOR163
+	add	x0, x20, :lo12:.LANCHOR166
 	bl	ftl_memset
-.L2070:
-	add	x0, x22, :lo12:.LANCHOR164
-	ldrb	w6, [x22, #:lo12:.LANCHOR164]
-	ldrh	w19, [x23, #:lo12:.LANCHOR99]
+.L2077:
+	add	x0, x22, :lo12:.LANCHOR167
+	ldrb	w6, [x22, #:lo12:.LANCHOR167]
+	ldrh	w19, [x23, #:lo12:.LANCHOR103]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR101
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR163
-	str	w27, [x20, #:lo12:.LANCHOR163]
+	add	x0, x20, :lo12:.LANCHOR166
+	str	w27, [x20, #:lo12:.LANCHOR166]
 	str	w3, [x0, 4]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2071
+	tbz	x0, 12, .L2078
 	mov	w2, w4
 	mov	w1, w6
 	str	w4, [x29, 96]
@@ -12490,26 +12552,26 @@ ftl_info_flush:
 	bl	printf
 	ldr	w4, [x29, 96]
 	ldr	w6, [x29, 104]
-.L2071:
+.L2078:
 	adrp	x1, .LANCHOR80
 	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L2072
-	adrp	x19, .LANCHOR165
+	bhi	.L2079
+	adrp	x19, .LANCHOR168
 	adrp	x3, .LC0
-	add	x19, x19, :lo12:.LANCHOR165
+	add	x19, x19, :lo12:.LANCHOR168
 	add	x3, x3, :lo12:.LC0
-.L2079:
+.L2086:
 	ldrb	w0, [x25, 1]
 	adrp	x4, .LANCHOR20
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L2073
+	bls	.L2080
 	mov	x0, 0
-.L2078:
+.L2085:
 	ldr	x2, [x4, #:lo12:.LANCHOR20]
 	add	w1, w0, 8
 	and	w24, w0, 65535
@@ -12518,32 +12580,32 @@ ftl_info_flush:
 	add	w1, w2, 127
 	and	w1, w1, 255
 	cmp	w1, 125
-	bhi	.L2074
+	bhi	.L2081
 	mov	x0, x3
 	stp	x4, x3, [x29, 96]
 	mov	w2, 672
 	mov	x1, x19
 	bl	printf
 	ldp	x4, x3, [x29, 96]
-.L2077:
+.L2084:
 	strb	w24, [x25, 1]
 	mov	w24, 1
-.L2073:
+.L2080:
 	ldr	x0, [x4, #:lo12:.LANCHOR20]
 	ldrb	w1, [x25, 1]
 	add	x0, x0, x1
 	ldrb	w0, [x0, 40]
 	strb	w0, [x25]
 	cmp	w0, 255
-	beq	.L2079
+	beq	.L2086
 	ldrh	w19, [x28]
 	mul	w19, w19, w0
 	mov	w0, 0
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR114]
+	ldrb	w4, [x21, #:lo12:.LANCHOR117]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR163
+	add	x3, x20, :lo12:.LANCHOR166
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
@@ -12551,53 +12613,53 @@ ftl_info_flush:
 	bl	ftl_prog_page
 	mov	w0, 1
 	strh	w0, [x25, 2]
-.L2080:
-	ldrb	w4, [x21, #:lo12:.LANCHOR114]
+.L2087:
+	ldrb	w4, [x21, #:lo12:.LANCHOR117]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR163
+	add	x3, x20, :lo12:.LANCHOR166
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
 	ldrh	w1, [x25, 2]
-	adrp	x0, .LANCHOR166
+	adrp	x0, .LANCHOR169
 	add	w1, w1, 1
 	strh	w1, [x25, 2]
-	beq	.L2081
-	ldrb	w1, [x0, #:lo12:.LANCHOR166]
-	cbz	w1, .L2082
+	beq	.L2088
+	ldrb	w1, [x0, #:lo12:.LANCHOR169]
+	cbz	w1, .L2089
+.L2088:
+	strb	wzr, [x0, #:lo12:.LANCHOR169]
+	b	.L2077
 .L2081:
-	strb	wzr, [x0, #:lo12:.LANCHOR166]
-	b	.L2070
-.L2074:
 	cmp	w2, 255
-	bne	.L2077
+	bne	.L2084
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L2078
+	bne	.L2085
 	mov	w24, w0
-	b	.L2077
-.L2072:
+	b	.L2084
+.L2079:
 	madd	w19, w19, w6, w4
-	cbnz	w0, .L2080
+	cbnz	w0, .L2087
 	mov	w1, w19
 	bl	flash_erase_block
-	b	.L2080
-.L2082:
-	cbnz	w24, .L2083
-.L2091:
-	adrp	x0, .LANCHOR164
-	ldrb	w0, [x0, #:lo12:.LANCHOR164]
+	b	.L2087
+.L2089:
+	cbnz	w24, .L2090
+.L2098:
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
 	cmp	w0, 255
-	bne	.L2085
-	adrp	x1, .LANCHOR165
+	bne	.L2092
+	adrp	x1, .LANCHOR168
 	adrp	x0, .LC0
 	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR165
+	add	x1, x1, :lo12:.LANCHOR168
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2085:
+.L2092:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -12606,17 +12668,17 @@ ftl_info_flush:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2083:
+.L2090:
 	ldrb	w19, [x25, 1]
-	adrp	x20, .LANCHOR165
+	adrp	x20, .LANCHOR168
 	adrp	x21, .LC0
-	add	x20, x20, :lo12:.LANCHOR165
+	add	x20, x20, :lo12:.LANCHOR168
 	add	w19, w19, 1
 	add	x21, x21, :lo12:.LC0
 	adrp	x22, .LANCHOR20
-.L2086:
+.L2093:
 	cmp	w19, 7
-	bhi	.L2091
+	bhi	.L2098
 	ldr	x1, [x22, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
@@ -12624,24 +12686,24 @@ ftl_info_flush:
 	add	w0, w23, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2087
+	bhi	.L2094
 	mov	w2, 701
 	mov	x1, x20
 	mov	x0, x21
 	bl	printf
-.L2088:
-	ldrh	w1, [x26, #:lo12:.LANCHOR99]
+.L2095:
+	ldrh	w1, [x26, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w23
 	bl	flash_erase_block
-	b	.L2089
-.L2087:
+	b	.L2096
+.L2094:
 	cmp	w23, 255
-	bne	.L2088
-.L2089:
+	bne	.L2095
+.L2096:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2086
+	b	.L2093
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -12649,32 +12711,32 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR167
-	adrp	x1, .LANCHOR166
+	adrp	x0, .LANCHOR170
+	adrp	x1, .LANCHOR169
 	mov	w2, 16384
 	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	strb	wzr, [x0, #:lo12:.LANCHOR170]
 	mov	w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR166]
-	adrp	x1, .LANCHOR168
+	strb	w0, [x1, #:lo12:.LANCHOR169]
+	adrp	x1, .LANCHOR171
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	w0, [x1, #:lo12:.LANCHOR168]
+	strb	w0, [x1, #:lo12:.LANCHOR171]
 	adrp	x1, .LANCHOR3
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR3]
 	adrp	x1, .LANCHOR2
-	adrp	x22, .LANCHOR101
+	adrp	x22, .LANCHOR97
 	stp	x25, x26, [sp, 64]
 	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR164
+	adrp	x21, .LANCHOR167
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR20
 	stp	x27, x28, [sp, 80]
-	adrp	x26, .LANCHOR99
+	adrp	x26, .LANCHOR103
 	add	x1, x0, x1, lsl 2
-	str	x1, [x22, #:lo12:.LANCHOR101]
+	str	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 0
 	bl	ftl_memset
 	mov	w1, 0
@@ -12682,19 +12744,19 @@ ftl_info_blk_init:
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR117
 	ldr	x1, [x23, #:lo12:.LANCHOR20]
-	add	x0, x21, :lo12:.LANCHOR164
+	add	x0, x21, :lo12:.LANCHOR167
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR99
-	add	x25, x25, :lo12:.LANCHOR114
+	add	x26, x26, :lo12:.LANCHOR103
+	add	x25, x25, :lo12:.LANCHOR117
 	mov	x19, 7
 	strb	wzr, [x0, 1]
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR164]
+	strb	w1, [x21, #:lo12:.LANCHOR167]
 	strh	wzr, [x0, 2]
-.L2107:
+.L2114:
 	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	sxth	w24, w19
@@ -12702,36 +12764,36 @@ ftl_info_blk_init:
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L2106
-.L2111:
+	bne	.L2113
+.L2118:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L2107
+	bne	.L2114
 	mov	w24, 0
-.L2108:
+.L2115:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2112
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	tbz	x0, 12, .L2119
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
 	adrp	x0, .LC122
 	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L2112:
+.L2119:
 	cmn	w19, #1
-	bne	.L2113
+	bne	.L2120
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
 	mov	w0, w19
-.L2105:
+.L2112:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -12739,12 +12801,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2106:
+.L2113:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR163
-	add	x7, x7, :lo12:.LANCHOR163
+	adrp	x7, .LANCHOR166
+	add	x7, x7, :lo12:.LANCHOR166
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -12757,7 +12819,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L2109
+	bne	.L2116
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -12765,11 +12827,11 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L2109:
+.L2116:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2110
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	tbz	x0, 12, .L2117
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	mov	w2, w5
 	str	w5, [x29, 124]
 	mov	w3, 580
@@ -12779,44 +12841,44 @@ ftl_info_blk_init:
 	add	x0, x0, :lo12:.LC121
 	bl	printf
 	ldr	w5, [x29, 124]
-.L2110:
+.L2117:
 	cmn	w5, #1
-	beq	.L2111
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	beq	.L2118
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2111
+	bne	.L2118
 	mov	w19, w24
-	b	.L2108
-.L2113:
+	b	.L2115
+.L2120:
 	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR114
+	adrp	x26, .LANCHOR117
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR114
+	add	x26, x26, :lo12:.LANCHOR117
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR164
-	strb	w1, [x21, #:lo12:.LANCHOR164]
+	add	x0, x21, :lo12:.LANCHOR167
+	strb	w1, [x21, #:lo12:.LANCHOR167]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR163
-	add	x24, x24, :lo12:.LANCHOR163
+	adrp	x24, .LANCHOR166
+	add	x24, x24, :lo12:.LANCHOR166
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
 	sxth	w23, w0
 	add	w0, w0, 1
 	and	w19, w0, 65535
-	adrp	x0, .LANCHOR99
-	ldrb	w25, [x21, #:lo12:.LANCHOR164]
-	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR103
+	ldrb	w25, [x21, #:lo12:.LANCHOR167]
+	ldrh	w0, [x0, #:lo12:.LANCHOR103]
 	madd	w25, w25, w0, w23
-.L2115:
-	tbnz	w23, #31, .L2120
+.L2122:
+	tbnz	w23, #31, .L2127
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -12824,43 +12886,43 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L2116
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	beq	.L2123
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L2116
-.L2120:
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
-	add	x21, x21, :lo12:.LANCHOR164
+	bne	.L2123
+.L2127:
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
+	add	x21, x21, :lo12:.LANCHOR167
 	strh	w19, [x21, 2]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bhi	.L2117
-.L2118:
+	bhi	.L2124
+.L2125:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L2121
+	bls	.L2128
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L2121:
+.L2128:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L2122
+	bls	.L2129
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L2122:
+.L2129:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L2123
+	bls	.L2130
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L2123:
+.L2130:
 	ldr	w1, [x0, 64]
 	add	w1, w1, 1
 	str	w1, [x0, 64]
@@ -12869,18 +12931,18 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L2105
-.L2116:
+	b	.L2112
+.L2123:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L2115
-.L2117:
+	b	.L2122
+.L2124:
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-	b	.L2118
+	b	.L2125
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -12897,48 +12959,48 @@ ftl_ext_info_flush:
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	cbz	w1, .L2139
+	cbz	w1, .L2146
 	str	wzr, [x0, 520]
-.L2139:
+.L2146:
 	adrp	x20, .LANCHOR80
-	adrp	x22, .LANCHOR169
+	adrp	x22, .LANCHOR172
 	adrp	x21, .LANCHOR96
 	add	x20, x20, :lo12:.LANCHOR80
-	add	x22, x22, :lo12:.LANCHOR169
+	add	x22, x22, :lo12:.LANCHOR172
 	add	x21, x21, :lo12:.LANCHOR96
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L2140:
-	adrp	x23, .LANCHOR101
+.L2147:
+	adrp	x23, .LANCHOR97
 	mov	x24, x23
-.L2143:
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L2150:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L2141
+	bcc	.L2148
 	bl	ftl_ext_alloc_new_blk
-.L2141:
-	ldr	x0, [x24, #:lo12:.LANCHOR101]
+.L2148:
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 130]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2142
+	bne	.L2149
 	adrp	x0, .LC0
-	mov	w2, 1621
+	mov	w2, 1639
 	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2142:
-	ldr	x1, [x24, #:lo12:.LANCHOR101]
+.L2149:
+	ldr	x1, [x24, #:lo12:.LANCHOR97]
 	mov	w19, 21
 	ldrh	w0, [x21]
-	adrp	x26, .LANCHOR114
-	adrp	x27, .LANCHOR163
-	add	x25, x27, :lo12:.LANCHOR163
+	adrp	x26, .LANCHOR117
+	adrp	x27, .LANCHOR166
+	add	x25, x27, :lo12:.LANCHOR166
 	sub	w0, w19, w0
 	mov	w19, 1
 	ldrh	w2, [x1, 130]
@@ -12946,43 +13008,43 @@ ftl_ext_info_flush:
 	sub	w19, w19, #1
 	and	w19, w19, w2
 	asr	w28, w2, w0
-	adrp	x0, .LANCHOR99
-	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR103
+	ldrh	w2, [x0, #:lo12:.LANCHOR103]
 	ldrh	w0, [x1, 140]
 	mov	w1, 0
 	madd	w19, w19, w2, w0
-	ldrb	w2, [x26, #:lo12:.LANCHOR114]
+	ldrb	w2, [x26, #:lo12:.LANCHOR117]
 	mov	x0, x25
 	and	w19, w19, 65535
 	lsl	w2, w2, 1
 	bl	ftl_memset
-	ldr	x0, [x24, #:lo12:.LANCHOR101]
+	ldr	x0, [x24, #:lo12:.LANCHOR97]
 	mov	w1, w19
-	ldrb	w4, [x26, #:lo12:.LANCHOR114]
+	ldrb	w4, [x26, #:lo12:.LANCHOR117]
 	mov	x3, x25
-	str	wzr, [x27, #:lo12:.LANCHOR163]
+	str	wzr, [x27, #:lo12:.LANCHOR166]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
 	str	w0, [x25, 4]
 	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x24, #:lo12:.LANCHOR101]
+	ldr	x2, [x24, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L2143
+	beq	.L2150
 	cmn	w0, #1
-	adrp	x0, .LANCHOR168
-	beq	.L2144
-	ldrb	w1, [x0, #:lo12:.LANCHOR168]
-	cbz	w1, .L2145
-.L2144:
-	strb	wzr, [x0, #:lo12:.LANCHOR168]
-	b	.L2140
-.L2145:
+	adrp	x0, .LANCHOR171
+	beq	.L2151
+	ldrb	w1, [x0, #:lo12:.LANCHOR171]
+	cbz	w1, .L2152
+.L2151:
+	strb	wzr, [x0, #:lo12:.LANCHOR171]
+	b	.L2147
+.L2152:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -12998,83 +13060,86 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR110
+	adrp	x0, .LANCHOR113
 	mov	w4, 4
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR101
-	strh	wzr, [x0, #:lo12:.LANCHOR110]
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR97
+	strh	wzr, [x0, #:lo12:.LANCHOR113]
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	stp	x19, x20, [sp, 16]
+	mov	w19, 1
 	stp	x25, x26, [sp, 64]
-	adrp	x25, ftl_ext_info_data_buffer
-	stp	x23, x24, [sp, 48]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	ldrh	w19, [x0, 130]
+	adrp	x25, .LANCHOR166
+	stp	x21, x22, [sp, 32]
+	adrp	x26, ftl_ext_info_data_buffer
+	ldrh	w20, [x0, 130]
 	adrp	x0, .LANCHOR96
 	stp	x27, x28, [sp, 80]
-	adrp	x24, .LANCHOR163
+	add	x3, x25, :lo12:.LANCHOR166
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
-	and	w26, w19, 16383
-	add	x3, x24, :lo12:.LANCHOR163
+	add	x2, x26, :lo12:ftl_ext_info_data_buffer
 	sub	w0, w0, w1
-	mov	w1, w26
-	asr	w19, w19, w0
-	and	w19, w19, 255
-	mov	w0, w19
+	lsl	w19, w19, w0
+	sub	w19, w19, #1
+	and	w19, w19, w20
+	asr	w20, w20, w0
+	and	w20, w20, 255
+	mov	w1, w19
+	mov	w0, w20
 	bl	flash_get_last_written_page
-	sxth	w21, w0
+	sxth	w22, w0
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2156
-	adrp	x1, .LANCHOR170
+	tbz	x0, 12, .L2163
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC66
-	mov	w3, w21
-	mov	w2, 1665
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w3, w22
+	mov	w2, 1683
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L2156:
-	adrp	x27, .LANCHOR114
-	adrp	x28, .LANCHOR99
+.L2163:
+	adrp	x27, .LANCHOR117
+	adrp	x28, .LANCHOR103
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR114
-	add	x28, x28, :lo12:.LANCHOR99
-	mov	w23, 0
+	add	x27, x27, :lo12:.LANCHOR117
+	add	x28, x28, :lo12:.LANCHOR103
+	mov	w24, 0
 	movk	w5, 0x4549, lsl 16
-.L2157:
-	and	w20, w21, 65535
-	sub	w0, w20, w23
-	tbnz	x0, 15, .L2162
+.L2164:
+	and	w21, w22, 65535
+	sub	w0, w21, w24
+	tbnz	x0, 15, .L2169
 	ldrh	w0, [x28]
-	sub	w1, w21, w23
+	sub	w1, w22, w24
 	ldrb	w4, [x27]
-	add	x3, x24, :lo12:.LANCHOR163
+	add	x3, x25, :lo12:.LANCHOR166
 	str	w5, [x29, 108]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	madd	w1, w0, w26, w1
-	mov	w0, w19
+	add	x2, x26, :lo12:ftl_ext_info_data_buffer
+	madd	w1, w0, w19, w1
+	mov	w0, w20
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L2158
+	beq	.L2165
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L2158
-.L2162:
+	bne	.L2165
+.L2169:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldrh	w1, [x0, 140]
-	cmp	w1, w21
-	bgt	.L2160
-	add	w20, w20, 1
-	strh	w20, [x0, 140]
+	cmp	w1, w22
+	bgt	.L2167
+	add	w21, w21, 1
+	strh	w21, [x0, 140]
 	bl	ftl_ext_info_flush
-.L2160:
+.L2167:
 	adrp	x0, .LANCHOR5
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -13086,14 +13151,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR111
-	strh	w1, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR114
+	strh	w1, [x0, #:lo12:.LANCHOR114]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L2158:
-	add	w23, w23, 1
-	b	.L2157
+.L2165:
+	add	w24, w24, 1
+	b	.L2164
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -13103,41 +13168,41 @@ ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR171
+	adrp	x20, .LANCHOR174
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR171
+	add	x20, x20, :lo12:.LANCHOR174
 	stp	x25, x26, [sp, 64]
 	adrp	x22, .LANCHOR20
 	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
 	adrp	x23, .LC0
-.L2173:
+.L2180:
 	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	add	x0, x0, x19, sxtw
 	ldrb	w21, [x0, 32]
 	add	w0, w21, 127
 	and	w0, w0, 255
 	cmp	w0, 125
-	bhi	.L2171
-	mov	w2, 1836
+	bhi	.L2178
+	mov	w2, 1854
 	mov	x1, x20
 	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L2171:
+.L2178:
 	cmp	w21, 255
-	beq	.L2172
-	adrp	x0, .LANCHOR99
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	beq	.L2179
+	adrp	x0, .LANCHOR103
+	ldrh	w1, [x0, #:lo12:.LANCHOR103]
 	mov	w0, 0
 	mul	w1, w1, w21
 	bl	flash_erase_block
-.L2172:
+.L2179:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L2173
+	bne	.L2180
 	bl	sblk_init
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	bl	ftl_info_blk_init
 	adrp	x22, .LANCHOR3
 	mov	w1, 0
@@ -13146,15 +13211,15 @@ ftl_low_format:
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
 	adrp	x20, .LANCHOR2
-	ldr	x3, [x19, #:lo12:.LANCHOR101]
+	ldr	x3, [x19, #:lo12:.LANCHOR97]
 	mov	w5, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR3]
 	ldrh	w4, [x20, #:lo12:.LANCHOR2]
 	ldrh	w0, [x3, 134]
 	add	x1, x1, x0, uxth 2
-.L2174:
+.L2181:
 	cmp	w0, w4
-	bcc	.L2175
+	bcc	.L2182
 	mov	w0, 21574
 	adrp	x24, .LANCHOR60
 	add	x24, x24, :lo12:.LANCHOR60
@@ -13163,11 +13228,11 @@ ftl_low_format:
 	mov	w21, 0
 	mov	w26, 1
 	str	w0, [x3]
-.L2176:
+.L2183:
 	ldrh	w0, [x20, #:lo12:.LANCHOR2]
 	adrp	x23, .LANCHOR95
 	cmp	w0, w21
-	bhi	.L2184
+	bhi	.L2191
 	adrp	x21, .LANCHOR5
 	mov	w2, 16384
 	mov	w1, 0
@@ -13176,7 +13241,7 @@ ftl_low_format:
 	bl	ftl_memset
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, 20038
-	ldr	x6, [x19, #:lo12:.LANCHOR101]
+	ldr	x6, [x19, #:lo12:.LANCHOR97]
 	movk	w1, 0x4549, lsl 16
 	mov	w4, 3
 	mov	w10, 15
@@ -13196,7 +13261,7 @@ ftl_low_format:
 	add	x0, x0, 4
 	add	w24, w5, 1
 	add	x0, x1, x0
-.L2187:
+.L2194:
 	cmp	w2, 4
 	add	x1, x1, 4
 	csel	w7, w10, w4, eq
@@ -13205,7 +13270,7 @@ ftl_low_format:
 	orr	w7, w7, -32
 	strb	w7, [x1, -2]
 	cmp	x1, x0
-	bne	.L2187
+	bne	.L2194
 	mul	w5, w5, w8
 	mov	w4, 16
 	add	w0, w8, w3
@@ -13217,26 +13282,26 @@ ftl_low_format:
 	add	w4, w24, w4
 	and	w4, w4, 65535
 	strh	w4, [x6, 134]
-	tbz	x0, 12, .L2188
+	tbz	x0, 12, .L2195
 	adrp	x0, .LC123
 	mov	w3, w24
 	mov	w2, 128
-	mov	w1, 1883
+	mov	w1, 1901
 	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L2188:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2195:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
 	bl	ftl_memset
 	ldrb	w6, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR104
 	ldr	x11, [x22, #:lo12:.LANCHOR3]
 	adrp	x22, .LANCHOR96
-	ldr	x8, [x19, #:lo12:.LANCHOR101]
+	ldr	x8, [x19, #:lo12:.LANCHOR97]
 	and	w7, w6, 65535
-	ldrb	w12, [x0, #:lo12:.LANCHOR100]
+	ldrb	w12, [x0, #:lo12:.LANCHOR104]
 	mov	w2, 21
 	ldrh	w0, [x22, #:lo12:.LANCHOR96]
 	mov	w23, 0
@@ -13247,9 +13312,9 @@ ftl_low_format:
 	and	w1, w1, 65535
 	lsl	w2, w2, w0
 	and	w2, w2, 65535
-.L2189:
+.L2196:
 	cmp	w24, w10
-	bcc	.L2195
+	bcc	.L2202
 	adrp	x0, .LANCHOR4
 	ldrh	w2, [x20, #:lo12:.LANCHOR2]
 	mov	w1, 0
@@ -13257,7 +13322,7 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x20, #:lo12:.LANCHOR2]
 	ldrh	w2, [x0, 134]
 	strh	w23, [x0, 112]
@@ -13270,25 +13335,25 @@ ftl_low_format:
 	mov	w23, w0
 	mov	w1, 0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w0, w23
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2196
-	adrp	x1, .LANCHOR171
+	bcs	.L2203
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1914
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 1932
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2196:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2203:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
@@ -13296,22 +13361,22 @@ ftl_low_format:
 	bl	ftl_memset
 	ldrh	w2, [x22, #:lo12:.LANCHOR96]
 	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	sub	w1, w1, w2
 	asr	w1, w20, w1
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR172
+	adrp	x1, .LANCHOR175
 	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	ldrh	w1, [x1, #:lo12:.LANCHOR175]
 	strh	w23, [x0, 416]
 	strh	w1, [x0, 698]
 	bl	ftl_alloc_sys_blk
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
@@ -13321,7 +13386,7 @@ ftl_low_format:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -13354,7 +13419,7 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2175:
+.L2182:
 	ldrb	w2, [x1, 2]
 	add	w0, w0, 1
 	and	w0, w0, 65535
@@ -13362,31 +13427,31 @@ ftl_low_format:
 	and	w2, w2, 31
 	bfi	w2, w5, 3, 2
 	strb	w2, [x1, -2]
-	b	.L2174
-.L2184:
+	b	.L2181
+.L2191:
 	strh	w21, [x24]
 	mov	w0, w21
 	bl	ftl_test_block
 	ldrb	w11, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR100
+	adrp	x0, .LANCHOR104
 	ldr	x6, [x22, #:lo12:.LANCHOR3]
 	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR100]
+	ldrb	w14, [x0, #:lo12:.LANCHOR104]
 	mov	w10, 0
-	ldr	x13, [x19, #:lo12:.LANCHOR101]
+	ldr	x13, [x19, #:lo12:.LANCHOR97]
 	mov	w8, 0
 	mul	w12, w21, w11
 	add	x6, x6, x21, uxth 2
-.L2177:
+.L2184:
 	cmp	w8, w14
-	bcs	.L2181
+	bcs	.L2188
 	add	w15, w11, w7
-	b	.L2182
-.L2180:
+	b	.L2189
+.L2187:
 	add	w1, w7, w12
 	mov	w0, w8
 	bl	flash_check_bad_block
-	cbz	w0, .L2178
+	cbz	w0, .L2185
 	ldrb	w1, [x6, 3]
 	lsl	w0, w26, w7
 	orr	w0, w0, w1
@@ -13394,29 +13459,29 @@ ftl_low_format:
 	ldrh	w0, [x13, 148]
 	add	w0, w0, 1
 	strh	w0, [x13, 148]
-.L2179:
+.L2186:
 	add	w7, w7, 1
-.L2182:
+.L2189:
 	cmp	w7, w15
-	bne	.L2180
+	bne	.L2187
 	add	w8, w8, 1
 	sub	w12, w12, w11
 	and	w8, w8, 65535
-	b	.L2177
-.L2178:
+	b	.L2184
+.L2185:
 	add	w10, w10, 1
 	and	w10, w10, 65535
-	b	.L2179
-.L2181:
-	cbnz	w10, .L2183
+	b	.L2186
+.L2188:
+	cbnz	w10, .L2190
 	ldrb	w0, [x6, 2]
 	orr	w0, w0, -32
 	strb	w0, [x6, 2]
-.L2183:
+.L2190:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2176
-.L2195:
+	b	.L2183
+.L2202:
 	add	x13, x11, x24, uxth 2
 	mov	w14, 0
 	mov	w15, 0
@@ -13424,48 +13489,48 @@ ftl_low_format:
 	ldrb	w0, [x13, 2]
 	orr	w0, w0, -32
 	strb	w0, [x13, 2]
-.L2190:
+.L2197:
 	cmp	w3, w12
-	bcc	.L2198
+	bcc	.L2205
 	add	w24, w24, 1
 	add	w1, w7, w1
 	and	w24, w24, 65535
 	and	w1, w1, 65535
-	b	.L2189
-.L2193:
+	b	.L2196
+.L2200:
 	ldrb	w5, [x13, 3]
 	add	w16, w15, w4
 	asr	w5, w5, w16
-	tbnz	x5, 0, .L2191
+	tbnz	x5, 0, .L2198
 	cmp	w6, 1
-	bls	.L2197
+	bls	.L2204
 	and	w0, w0, 1
 	add	w0, w1, w0
 	and	w0, w0, 65535
-.L2192:
+.L2199:
 	add	x5, x8, x23, sxtw 1
 	add	w23, w23, 1
 	and	w23, w23, 65535
 	add	w0, w0, w14
 	strh	w0, [x5, 160]
-.L2191:
+.L2198:
 	add	x4, x4, 1
-.L2194:
+.L2201:
 	and	w0, w4, 65535
 	cmp	w0, w7
-	bcc	.L2193
+	bcc	.L2200
 	add	w3, w3, 1
 	add	w0, w2, w14
 	and	w3, w3, 65535
 	add	w15, w15, w6
 	and	w14, w0, 65535
-	b	.L2190
-.L2197:
+	b	.L2197
+.L2204:
 	mov	w0, w1
-	b	.L2192
-.L2198:
+	b	.L2199
+.L2205:
 	mov	x4, 0
-	b	.L2194
+	b	.L2201
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format_test,"ax",@progbits
 	.align	2
@@ -13478,7 +13543,7 @@ ftl_re_low_format_test:
 	add	x0, x0, :lo12:.LC124
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR2
 	str	x23, [sp, 48]
@@ -13486,7 +13551,7 @@ ftl_re_low_format_test:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	adrp	x3, .LANCHOR3
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	mov	w4, 0
@@ -13495,9 +13560,9 @@ ftl_re_low_format_test:
 	mov	w6, 0
 	ldrh	w1, [x0, 134]
 	add	x3, x3, x1, uxth 2
-.L2209:
+.L2216:
 	cmp	w1, w2
-	bcc	.L2213
+	bcc	.L2220
 	adrp	x23, .LANCHOR4
 	strh	w6, [x0, 114]
 	strh	w5, [x0, 118]
@@ -13515,46 +13580,46 @@ ftl_re_low_format_test:
 	mov	w1, 0
 	mov	w22, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	mov	w0, w22
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
 	mov	w0, 65533
 	sub	w1, w20, #1
 	cmp	w0, w1, uxth
-	bcs	.L2214
-	adrp	x1, .LANCHOR173
+	bcs	.L2221
+	adrp	x1, .LANCHOR176
 	adrp	x0, .LC0
-	mov	w2, 1986
-	add	x1, x1, :lo12:.LANCHOR173
+	mov	w2, 2004
+	add	x1, x1, :lo12:.LANCHOR176
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2214:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2221:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
 	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	lsr	w1, w20, 14
 	and	w20, w20, 16383
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR172
+	adrp	x1, .LANCHOR175
 	strh	w20, [x0, 692]
 	adrp	x20, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR172]
+	ldrh	w1, [x1, #:lo12:.LANCHOR175]
 	lsl	w2, w2, 1
 	strh	w22, [x0, 416]
 	strh	w1, [x0, 698]
@@ -13569,7 +13634,7 @@ ftl_re_low_format_test:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	x0, [x20, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -13605,29 +13670,29 @@ ftl_re_low_format_test:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2213:
+.L2220:
 	ldrb	w7, [x3, 2]
 	and	w8, w7, 31
 	strb	w8, [x3, 2]
 	ands	w7, w7, 24
-	bne	.L2210
+	bne	.L2217
 	add	w6, w6, 1
 	and	w6, w6, 65535
-.L2211:
+.L2218:
 	add	w1, w1, 1
 	add	x3, x3, 4
 	and	w1, w1, 65535
-	b	.L2209
-.L2210:
+	b	.L2216
+.L2217:
 	cmp	w7, 16
-	bne	.L2212
+	bne	.L2219
 	add	w5, w5, 1
 	and	w5, w5, 65535
-	b	.L2211
-.L2212:
+	b	.L2218
+.L2219:
 	add	w4, w4, 1
 	and	w4, w4, 65535
-	b	.L2211
+	b	.L2218
 	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -13649,27 +13714,27 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L2219
+	bne	.L2226
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR106
+	adrp	x1, .LANCHOR109
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR106]
+	ldr	x20, [x1, #:lo12:.LANCHOR109]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2220
+	beq	.L2227
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR152
+	adrp	x0, .LANCHOR155
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR152
+	add	x6, x0, :lo12:.LANCHOR155
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR152]
+	str	w1, [x0, #:lo12:.LANCHOR155]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
@@ -13679,20 +13744,20 @@ ftl_write_last_log_page:
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR114]
+	ldrb	w3, [x0, #:lo12:.LANCHOR117]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L2220:
+.L2227:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L2219:
+.L2226:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -13713,36 +13778,36 @@ ftl_open_sblk_recovery:
 	mov	x25, x1
 	stp	x19, x20, [sp, 64]
 	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L2226
+	tbz	x0, 12, .L2233
 	ldrh	w1, [x28, 2]
 	adrp	x0, .LC125
 	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2226:
+.L2233:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2227
+	tbz	x0, 12, .L2234
 	ldrb	w1, [x28, 5]
 	adrp	x0, .LC126
 	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L2227:
+.L2234:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2228
+	tbz	x0, 12, .L2235
 	ldrh	w1, [x28]
 	adrp	x0, .LC127
 	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L2228:
+.L2235:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2229
+	tbz	x0, 12, .L2236
 	ldrh	w2, [x28, 18]
 	adrp	x0, .LC128
 	ldrh	w1, [x28, 16]
 	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L2229:
+.L2236:
 	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR114
+	adrp	x26, .LANCHOR117
 	strh	w0, [x28, 14]
 	mov	w27, 0
 	mov	w0, 1
@@ -13751,13 +13816,13 @@ ftl_open_sblk_recovery:
 	ldrb	w20, [x28, 5]
 	ldrh	w21, [x28, 2]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR114
+	add	x0, x26, :lo12:.LANCHOR117
 	str	x0, [x29, 128]
-.L2230:
+.L2237:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L2244
-.L2233:
+	bhi	.L2251
+.L2240:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrh	w2, [x23, #:lo12:.LANCHOR80]
@@ -13767,22 +13832,22 @@ ftl_open_sblk_recovery:
 	strb	w20, [x28, 5]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2245
-	adrp	x1, .LANCHOR174
+	beq	.L2252
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1347
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1365
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2245:
-	adrp	x21, .LANCHOR106
+.L2252:
+	adrp	x21, .LANCHOR109
 	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR106]
-.L2246:
+	ldr	x4, [x21, #:lo12:.LANCHOR109]
+.L2253:
 	cmp	w1, w3
-	bcc	.L2248
+	bcc	.L2255
 	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR4
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
@@ -13790,7 +13855,7 @@ ftl_open_sblk_recovery:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
 	sub	w20, w20, w3
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2249
+	tbz	x0, 12, .L2256
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
@@ -13799,43 +13864,43 @@ ftl_open_sblk_recovery:
 	mov	w2, w20
 	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2249:
+.L2256:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR117
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR72
 	adrp	x26, .LC131
 	add	x24, x24, :lo12:.LANCHOR72
-	add	x25, x25, :lo12:.LANCHOR114
+	add	x25, x25, :lo12:.LANCHOR117
 	add	x26, x26, :lo12:.LC131
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2250:
+.L2257:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2253
+	bcc	.L2260
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR106]
+	ldr	x1, [x21, #:lo12:.LANCHOR109]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2254
-	adrp	x1, .LANCHOR174
+	beq	.L2261
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1377
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1395
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2254:
+.L2261:
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bne	.L2225
+	bne	.L2232
 	ldp	x19, x20, [sp, 64]
 	mov	x0, x28
 	ldp	x21, x22, [sp, 80]
@@ -13845,27 +13910,27 @@ ftl_open_sblk_recovery:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 192
 	b	ftl_write_last_log_page
-.L2244:
+.L2251:
 	ldrb	w20, [x28, 5]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 136]
-.L2231:
+.L2238:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L2243
+	bhi	.L2250
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L2230
-.L2243:
+	b	.L2237
+.L2250:
 	add	x0, x28, x20, sxtw 1
 	ldrh	w11, [x0, 16]
 	mov	w0, 65535
 	cmp	w11, w0
-	beq	.L2232
+	beq	.L2239
 	ldr	x0, [x29, 136]
-	ldrb	w3, [x26, #:lo12:.LANCHOR114]
+	ldrb	w3, [x26, #:lo12:.LANCHOR117]
 	ldr	x1, [x19, 8]
 	ldr	x2, [x19, 24]
 	ldrh	w10, [x0]
@@ -13875,24 +13940,24 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	mov	w24, w0
 	cmp	w0, 512
-	beq	.L2233
+	beq	.L2240
 	cmn	w0, #1
 	ldp	w11, w10, [x29, 116]
-	beq	.L2234
+	beq	.L2241
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L2234
+	bne	.L2241
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L2234
+	bne	.L2241
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L2233
-.L2234:
+	beq	.L2240
+.L2241:
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2235
+	tbz	x0, 12, .L2242
 	ldr	x1, [x19, 24]
 	mov	w4, w24
 	ldr	x0, [x19, 8]
@@ -13914,22 +13979,22 @@ ftl_open_sblk_recovery:
 	adrp	x0, .LC129
 	add	x0, x0, :lo12:.LC129
 	bl	printf
-.L2235:
-	adrp	x0, .LANCHOR167
+.L2242:
+	adrp	x0, .LANCHOR170
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR167]
+	strb	w1, [x0, #:lo12:.LANCHOR170]
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x28, 10]
 	madd	w0, w0, w21, w20
 	cmp	w1, w0
-	beq	.L2236
-	adrp	x1, .LANCHOR174
+	beq	.L2243
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1270
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1288
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2236:
+.L2243:
 	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
 	ldrb	w2, [x28, 9]
@@ -13937,28 +14002,28 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2237
-	adrp	x1, .LANCHOR174
+	beq	.L2244
+	adrp	x1, .LANCHOR177
 	adrp	x0, .LC0
-	mov	w2, 1271
-	add	x1, x1, :lo12:.LANCHOR174
+	mov	w2, 1289
+	add	x1, x1, :lo12:.LANCHOR177
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2237:
+.L2244:
 	cmn	w24, #1
-	beq	.L2239
+	beq	.L2246
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L2239
+	beq	.L2246
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L2241
+	cbz	x25, .L2248
 	ldr	x3, [x19, 24]
 	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L2241
+	beq	.L2248
 	cmn	w0, #1
-	beq	.L2241
+	beq	.L2248
 	adrp	x4, .LANCHOR96
 	mov	w27, 21
 	mov	w24, 1
@@ -13973,11 +14038,11 @@ ftl_open_sblk_recovery:
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L2241
+	bne	.L2248
 	ldr	x1, [x29, 128]
-	adrp	x6, .LANCHOR163
+	adrp	x6, .LANCHOR166
 	ldr	w7, [x3]
-	add	x2, x6, :lo12:.LANCHOR163
+	add	x2, x6, :lo12:.LANCHOR166
 	str	w7, [x29, 116]
 	str	x6, [x29, 120]
 	ldrb	w3, [x1]
@@ -13986,13 +14051,13 @@ ftl_open_sblk_recovery:
 	bl	ftl_read_ppa_page
 	ldr	x6, [x29, 120]
 	ldr	w7, [x29, 116]
-	ldr	w0, [x6, #:lo12:.LANCHOR163]
+	ldr	w0, [x6, #:lo12:.LANCHOR166]
 	cmp	w7, w0
-	bhi	.L2241
+	bhi	.L2248
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0, 8]
 	cmn	w0, #1
-	beq	.L2239
+	beq	.L2246
 	ldp	x5, x4, [x29, 96]
 	ldrh	w1, [x4, #:lo12:.LANCHOR96]
 	sub	w27, w27, w1
@@ -14003,7 +14068,7 @@ ftl_open_sblk_recovery:
 	ldrb	w0, [x5, #:lo12:.LANCHOR95]
 	udiv	w0, w24, w0
 	bl	ftl_vpn_decrement
-.L2239:
+.L2246:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -14011,41 +14076,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L2232:
+.L2239:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2231
-.L2248:
+	b	.L2238
+.L2255:
 	ldrh	w2, [x28, 12]
 	add	w2, w2, w1
 	ldr	w2, [x4, x2, lsl 2]
 	cmn	w2, #1
-	beq	.L2247
+	beq	.L2254
 	add	w20, w0, 1
 	and	w0, w20, 65535
-.L2247:
+.L2254:
 	add	w1, w1, 1
-	b	.L2246
-.L2253:
-	cbz	w27, .L2251
+	b	.L2253
+.L2260:
+	cbz	w27, .L2258
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2251
+	bls	.L2258
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
 	ldr	w0, [x22, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2252
+	tbz	x0, 12, .L2259
 	mov	w1, w4
 	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
 	ldr	w4, [x29, 136]
-.L2252:
-	adrp	x0, .LANCHOR101
+.L2259:
+	adrp	x0, .LANCHOR97
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -14057,37 +14122,37 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2251:
+.L2258:
 	add	w20, w20, 1
-	b	.L2250
-.L2241:
+	b	.L2257
+.L2248:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR54
 	ldr	w0, [x0, #:lo12:.LANCHOR54]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L2239
+	bcs	.L2246
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L2239
-	adrp	x0, .LANCHOR101
+	bge	.L2246
+	adrp	x0, .LANCHOR97
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L2242
+	bls	.L2249
 	str	w1, [x0, 8]
-.L2242:
+.L2249:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L2239
-.L2225:
+	b	.L2246
+.L2232:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -14109,92 +14174,92 @@ pm_write_page:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR80
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR99
+	adrp	x22, .LANCHOR103
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LANCHOR101
+	adrp	x23, .LANCHOR97
 	mov	x25, x1
 	add	x21, x21, :lo12:.LANCHOR80
 	mov	x20, x23
-	add	x22, x22, :lo12:.LANCHOR99
+	add	x22, x22, :lo12:.LANCHOR103
 	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2307:
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L2314:
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
 	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2308
+	bcs	.L2315
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2309
-.L2308:
+	bne	.L2316
+.L2315:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2309:
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+.L2316:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 692]
 	cmp	w0, w24
-	bne	.L2310
-	adrp	x1, .LANCHOR175
+	bne	.L2317
+	adrp	x1, .LANCHOR178
 	adrp	x0, .LC0
 	mov	w2, 228
-	add	x1, x1, :lo12:.LANCHOR175
+	add	x1, x1, :lo12:.LANCHOR178
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2310:
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
-	adrp	x27, .LANCHOR176
+.L2317:
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
+	adrp	x27, .LANCHOR179
 	ldrh	w1, [x22]
 	mov	w2, 64
 	ldrh	w26, [x0, 692]
 	ldrh	w0, [x0, 696]
 	madd	w26, w26, w1, w0
-	ldr	x0, [x27, #:lo12:.LANCHOR176]
+	ldr	x0, [x27, #:lo12:.LANCHOR179]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR176]
+	ldr	x3, [x27, #:lo12:.LANCHOR179]
 	mov	x2, x25
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR114
-	ldrb	w4, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR117
+	ldrb	w4, [x1, #:lo12:.LANCHOR117]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x20, #:lo12:.LANCHOR101]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	adrp	x1, .LANCHOR177
-	beq	.L2311
-	ldrb	w3, [x1, #:lo12:.LANCHOR177]
-	cbz	w3, .L2312
-.L2311:
-	strb	wzr, [x1, #:lo12:.LANCHOR177]
-	b	.L2307
-.L2312:
+	adrp	x1, .LANCHOR180
+	beq	.L2318
+	ldrb	w3, [x1, #:lo12:.LANCHOR180]
+	cbz	w3, .L2319
+.L2318:
+	strb	wzr, [x1, #:lo12:.LANCHOR180]
+	b	.L2314
+.L2319:
 	cmn	w0, #1
-	bne	.L2314
+	bne	.L2321
 	mov	w1, w26
 	adrp	x0, .LC132
 	add	x0, x0, :lo12:.LC132
 	bl	printf
-	b	.L2307
-.L2314:
+	b	.L2314
+.L2321:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2315
+	bcs	.L2322
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2315:
+.L2322:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -14218,28 +14283,28 @@ flash_info_flush:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2321
-	adrp	x2, .LANCHOR178
+	tbz	x0, 12, .L2328
+	adrp	x2, .LANCHOR181
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR178
+	add	x2, x2, :lo12:.LANCHOR181
 	mov	w1, 251
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2321:
-	adrp	x23, .LANCHOR147
+.L2328:
+	adrp	x23, .LANCHOR150
 	adrp	x20, .LANCHOR20
 	mov	w2, 64
 	mov	w1, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR147]
-	adrp	x21, .LANCHOR148
+	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	adrp	x21, .LANCHOR151
 	adrp	x22, .LANCHOR26
 	adrp	x24, .LC134
-	adrp	x25, .LANCHOR125
+	adrp	x25, .LANCHOR128
 	add	x22, x22, :lo12:.LANCHOR26
 	add	x24, x24, :lo12:.LC134
-	add	x25, x25, :lo12:.LANCHOR125
+	add	x25, x25, :lo12:.LANCHOR128
 	bl	ftl_memset
-	add	x27, x21, :lo12:.LANCHOR148
+	add	x27, x21, :lo12:.LANCHOR151
 	ldr	x1, [x20, #:lo12:.LANCHOR20]
 	mov	w3, 16
 	mov	w2, 4
@@ -14252,9 +14317,9 @@ flash_info_flush:
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2322:
-	add	x28, x21, :lo12:.LANCHOR148
-	ldrb	w4, [x21, #:lo12:.LANCHOR148]
+.L2329:
+	add	x28, x21, :lo12:.LANCHOR151
+	ldrb	w4, [x21, #:lo12:.LANCHOR151]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -14267,7 +14332,7 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2323
+	blt	.L2330
 	ldr	x6, [x20, #:lo12:.LANCHOR20]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
@@ -14275,32 +14340,32 @@ flash_info_flush:
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR148]
+	ldrb	w0, [x21, #:lo12:.LANCHOR151]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR148]
+	strb	w7, [x21, #:lo12:.LANCHOR151]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2332:
+.L2339:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2324
-.L2327:
+	b	.L2331
+.L2334:
 	mov	w26, 1
-	b	.L2322
-.L2323:
+	b	.L2329
+.L2330:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2332
-.L2324:
+	cbz	w1, .L2339
+.L2331:
 	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR147]
+	ldr	x3, [x23, #:lo12:.LANCHOR150]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -14314,14 +14379,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2325
+	bne	.L2332
 	mov	w1, w19
 	adrp	x0, .LC135
 	add	x0, x0, :lo12:.LC135
 	bl	printf
-	b	.L2322
-.L2325:
-	cbz	w26, .L2327
+	b	.L2329
+.L2332:
+	cbz	w26, .L2334
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -14346,14 +14411,14 @@ nand_flash_init:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2334
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2341
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2083
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2101
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2334:
+.L2341:
 	adrp	x22, .LANCHOR9
 	adrp	x20, .LANCHOR38
 	add	x24, x20, :lo12:.LANCHOR38
@@ -14368,20 +14433,20 @@ nand_flash_init:
 	mov	w27, 2
 	str	x0, [x22, #:lo12:.LANCHOR9]
 	mov	w28, 44
-.L2340:
+.L2347:
 	mov	x1, x24
 	mov	w0, w23
 	bl	flash_read_id
 	strb	w27, [x23, x25]
-	cbnz	x23, .L2335
+	cbnz	x23, .L2342
 	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2336
-.L2338:
+	bls	.L2343
+.L2345:
 	mov	w19, -2
-.L2333:
+.L2340:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -14390,55 +14455,55 @@ nand_flash_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2336:
+.L2343:
 	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2338
-.L2335:
+	beq	.L2345
+.L2342:
 	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2339
+	bne	.L2346
 	strb	w28, [x24]
-.L2339:
+.L2346:
 	add	x23, x23, 1
 	add	x24, x24, 8
 	cmp	x23, 4
-	bne	.L2340
-	adrp	x0, .LANCHOR180
-	add	x8, x0, :lo12:.LANCHOR180
+	bne	.L2347
+	adrp	x0, .LANCHOR183
+	add	x8, x0, :lo12:.LANCHOR183
 	add	x8, x8, 1
 	mov	x7, x0
 	add	x12, x20, :lo12:.LANCHOR38
 	mov	x10, 0
-.L2343:
+.L2350:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
 	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2341
-	add	x0, x7, :lo12:.LANCHOR180
+	cbnz	w0, .L2348
+	add	x0, x7, :lo12:.LANCHOR183
 	ubfiz	x11, x11, 5, 32
 	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR181
-	add	x4, x1, :lo12:.LANCHOR181
+	adrp	x1, .LANCHOR184
+	add	x4, x1, :lo12:.LANCHOR184
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2342:
+.L2349:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2344
+	beq	.L2351
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2342
+	bne	.L2349
 	mov	w2, w0
-.L2344:
+.L2351:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR181
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x1, x1, x0
 	mov	w2, 32
 	adrp	x0, .LANCHOR13
@@ -14452,86 +14517,86 @@ nand_flash_init:
 	bl	ftl_memcpy
 	ldrb	w0, [x24, #:lo12:.LANCHOR22]
 	cmp	w0, 8
-	bhi	.L2345
+	bhi	.L2352
 	ldrb	w1, [x23, 20]
 	cmp	w1, 60
-	bls	.L2346
+	bls	.L2353
 	mov	w1, 60
 	strb	w1, [x23, 20]
-.L2346:
+.L2353:
 	cmp	w0, 8
-	bne	.L2345
+	bne	.L2352
 	ldrb	w0, [x20, #:lo12:.LANCHOR38]
 	cmp	w0, 44
-	bne	.L2345
+	bne	.L2352
 	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2345
+	bne	.L2352
 	strb	wzr, [x0, 28]
-.L2345:
+.L2352:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2347
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2354
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2104
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2122
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2347:
+.L2354:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR150
+	adrp	x1, .LANCHOR153
 	adrp	x25, .LANCHOR20
 	add	x20, x19, :lo12:.LANCHOR32
 	adrp	x23, .LANCHOR39
-	str	x0, [x1, #:lo12:.LANCHOR150]
+	str	x0, [x1, #:lo12:.LANCHOR153]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR140
-	str	x0, [x1, #:lo12:.LANCHOR140]
+	adrp	x1, .LANCHOR143
+	str	x0, [x1, #:lo12:.LANCHOR143]
 	mov	w0, 2048
 	bl	ftl_malloc
 	str	x0, [x25, #:lo12:.LANCHOR20]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR149
-	str	x0, [x1, #:lo12:.LANCHOR149]
+	adrp	x1, .LANCHOR152
+	str	x0, [x1, #:lo12:.LANCHOR152]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR142
-	str	x0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR145
+	str	x0, [x1, #:lo12:.LANCHOR145]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR147
-	str	x0, [x1, #:lo12:.LANCHOR147]
-	adrp	x0, .LANCHOR154
-	strb	wzr, [x0, #:lo12:.LANCHOR154]
+	adrp	x1, .LANCHOR150
+	str	x0, [x1, #:lo12:.LANCHOR150]
+	adrp	x0, .LANCHOR157
+	strb	wzr, [x0, #:lo12:.LANCHOR157]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR145
+	adrp	x20, .LANCHOR148
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR145]
+	str	xzr, [x20, #:lo12:.LANCHOR148]
 	ldr	x1, [x22, #:lo12:.LANCHOR9]
 	mov	x22, x25
 	ldrh	w0, [x1, 16]
 	ubfx	x2, x0, 8, 3
 	strb	w2, [x23, #:lo12:.LANCHOR39]
-	adrp	x2, .LANCHOR182
+	adrp	x2, .LANCHOR185
 	ubfx	x3, x0, 3, 1
-	strb	w3, [x2, #:lo12:.LANCHOR182]
+	strb	w3, [x2, #:lo12:.LANCHOR185]
 	adrp	x2, .LANCHOR36
 	ubfx	x3, x0, 4, 1
 	strb	w3, [x2, #:lo12:.LANCHOR36]
 	adrp	x2, .LANCHOR69
 	ubfx	x3, x0, 12, 1
 	strb	w3, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR98
+	adrp	x2, .LANCHOR102
 	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w3, [x2, #:lo12:.LANCHOR98]
+	strb	w3, [x2, #:lo12:.LANCHOR102]
 	adrp	x2, .LANCHOR25
 	strb	w0, [x2, #:lo12:.LANCHOR25]
 	mov	w2, 60
@@ -14542,174 +14607,174 @@ nand_flash_init:
 	strb	w2, [x1, #:lo12:.LANCHOR10]
 	ldrb	w2, [x24, #:lo12:.LANCHOR22]
 	cmp	w2, 9
-	bne	.L2348
+	bne	.L2355
 	mov	w2, 70
 	strb	w2, [x1, #:lo12:.LANCHOR10]
-.L2348:
+.L2355:
 	add	x19, x19, :lo12:.LANCHOR32
-	adrp	x1, .LANCHOR155
+	adrp	x1, .LANCHOR158
 	adrp	x25, .LANCHOR17
-	strb	w0, [x1, #:lo12:.LANCHOR155]
+	strb	w0, [x1, #:lo12:.LANCHOR158]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
 	strb	w0, [x25, #:lo12:.LANCHOR17]
-	tbz	x1, 6, .L2350
+	tbz	x1, 6, .L2357
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2351
+	bhi	.L2358
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR145]
+	str	x1, [x20, #:lo12:.LANCHOR148]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR143
-	beq	.L2352
+	adrp	x0, .LANCHOR146
+	beq	.L2359
 	mov	w1, 7
-.L2395:
-	strb	w1, [x0, #:lo12:.LANCHOR143]
-	b	.L2350
-.L2341:
+.L2402:
+	strb	w1, [x0, #:lo12:.LANCHOR146]
+	b	.L2357
+.L2348:
 	add	x10, x10, 1
 	add	x8, x8, 32
 	cmp	x10, 30
-	bne	.L2343
-	b	.L2338
-.L2352:
+	bne	.L2350
+	b	.L2345
+.L2359:
 	mov	w1, 15
-	b	.L2395
-.L2351:
+	b	.L2402
+.L2358:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2354
+	bhi	.L2361
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR145]
+	str	x0, [x20, #:lo12:.LANCHOR148]
 	adrp	x0, .LANCHOR19
 	mov	w1, 4
 	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2397:
+.L2404:
 	mov	w1, 7
-	adrp	x0, .LANCHOR143
-	b	.L2395
-.L2354:
+	adrp	x0, .LANCHOR146
+	b	.L2402
+.L2361:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2355
+	bhi	.L2362
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR145]
+	str	x2, [x20, #:lo12:.LANCHOR148]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR143
-	beq	.L2356
+	adrp	x0, .LANCHOR146
+	beq	.L2363
 	mov	w2, 7
-.L2394:
-	strb	w2, [x0, #:lo12:.LANCHOR143]
+.L2401:
+	strb	w2, [x0, #:lo12:.LANCHOR146]
 	cmp	w1, 1
 	adrp	x0, .LANCHOR19
-	bhi	.L2358
+	bhi	.L2365
 	mov	w1, 4
-.L2396:
+.L2403:
 	strb	w1, [x0, #:lo12:.LANCHOR19]
-.L2350:
+.L2357:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2359
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2366
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2152
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2170
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2359:
+.L2366:
 	adrp	x24, .LANCHOR14
 	ldrb	w0, [x23, #:lo12:.LANCHOR39]
 	strb	wzr, [x24, #:lo12:.LANCHOR14]
-	tbz	x0, 0, .L2360
+	tbz	x0, 0, .L2367
 	mov	w0, 4
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2398:
+.L2405:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
 	mov	w19, w0
 	cmn	w0, #1
-	bne	.L2362
+	bne	.L2369
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2333
-	adrp	x2, .LANCHOR179
-	mov	w1, 2172
-	add	x2, x2, :lo12:.LANCHOR179
+	tbz	x0, 12, .L2340
+	adrp	x2, .LANCHOR182
+	mov	w1, 2190
+	add	x2, x2, :lo12:.LANCHOR182
 	adrp	x0, .LC73
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-	b	.L2333
-.L2356:
+	b	.L2340
+.L2363:
 	mov	w2, 17
-	b	.L2394
-.L2358:
+	b	.L2401
+.L2365:
 	mov	w1, 5
-	b	.L2396
-.L2355:
+	b	.L2403
+.L2362:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2350
+	bhi	.L2357
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR145]
-	b	.L2397
-.L2360:
+	str	x0, [x20, #:lo12:.LANCHOR148]
+	b	.L2404
+.L2367:
 	mov	w0, 4
-	b	.L2398
-.L2362:
+	b	.L2405
+.L2369:
 	ldrb	w0, [x25, #:lo12:.LANCHOR17]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 6
-	bhi	.L2363
+	bhi	.L2370
 	adrp	x0, hynix_read_retrial
 	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR145]
-.L2363:
+	str	x0, [x20, #:lo12:.LANCHOR148]
+.L2370:
 	ldrb	w0, [x23, #:lo12:.LANCHOR39]
-	tbz	x0, 2, .L2365
+	tbz	x0, 2, .L2372
 	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2365
-	adrp	x0, .LANCHOR148
-	ldrb	w1, [x0, #:lo12:.LANCHOR148]
+	cbz	w0, .L2372
+	adrp	x0, .LANCHOR151
+	ldrb	w1, [x0, #:lo12:.LANCHOR151]
 	adrp	x0, .LANCHOR26
 	ldrh	w0, [x0, #:lo12:.LANCHOR26]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
 	ldrb	w0, [x24, #:lo12:.LANCHOR14]
-	cbnz	w0, .L2365
+	cbnz	w0, .L2372
 	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-.L2365:
+.L2372:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2367
-	adrp	x2, .LANCHOR179
+	tbz	x0, 12, .L2374
+	adrp	x2, .LANCHOR182
 	adrp	x0, .LC73
-	add	x2, x2, :lo12:.LANCHOR179
-	mov	w1, 2225
+	add	x2, x2, :lo12:.LANCHOR182
+	mov	w1, 2243
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-.L2367:
+.L2374:
 	bl	nand_flash_print_info
 	mov	w19, 0
-	b	.L2333
+	b	.L2340
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -14730,27 +14795,27 @@ ftl_sysblk_dump:
 	stp	x21, x22, [sp, 80]
 	bl	buf_alloc
 	ldr	x24, [x0, 8]
-	adrp	x27, .LANCHOR99
-	adrp	x28, .LANCHOR114
+	adrp	x27, .LANCHOR103
+	adrp	x28, .LANCHOR117
 	mov	x25, x0
 	add	x26, x26, :lo12:.LANCHOR80
-	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR114
+	add	x27, x27, :lo12:.LANCHOR103
+	add	x28, x28, :lo12:.LANCHOR117
 	mov	w19, 0
-.L2400:
+.L2407:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2402
+	bhi	.L2409
 	mov	x0, x25
 	bl	buf_free
-	cbz	w20, .L2403
-	adrp	x1, .LANCHOR183
+	cbz	w20, .L2410
+	adrp	x1, .LANCHOR186
 	adrp	x0, .LC0
-	mov	w2, 1214
-	add	x1, x1, :lo12:.LANCHOR183
+	mov	w2, 1232
+	add	x1, x1, :lo12:.LANCHOR186
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2403:
+.L2410:
 	mov	w0, w20
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
@@ -14760,7 +14825,7 @@ ftl_sysblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 144
 	ret
-.L2402:
+.L2409:
 	ldrh	w21, [x27]
 	ldrb	w3, [x28]
 	ldr	x1, [x25, 8]
@@ -14801,7 +14866,7 @@ ftl_sysblk_dump:
 	cmp	w22, 512
 	ccmn	w22, #1, 4, ne
 	csinc	w20, w20, wzr, ne
-	b	.L2400
+	b	.L2407
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -14816,20 +14881,20 @@ dump_ftl_info:
 	stp	x19, x20, [sp, 16]
 	add	x0, x0, :lo12:.LC137
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR101
+	adrp	x22, .LANCHOR97
 	adrp	x19, .LANCHOR5
 	adrp	x20, .LANCHOR80
 	bl	printf
 	adrp	x21, .LANCHOR2
-	adrp	x0, .LANCHOR164
-	add	x1, x0, :lo12:.LANCHOR164
+	adrp	x0, .LANCHOR167
+	add	x1, x0, :lo12:.LANCHOR167
 	ldrh	w3, [x1, 2]
 	ldrb	w2, [x1, 1]
-	ldrb	w1, [x0, #:lo12:.LANCHOR164]
+	ldrb	w1, [x0, #:lo12:.LANCHOR167]
 	adrp	x0, .LC138
 	add	x0, x0, :lo12:.LC138
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	ldr	x0, [x22, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
 	adrp	x0, .LC139
@@ -14867,8 +14932,8 @@ dump_ftl_info:
 	mov	w2, 4
 	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR106
-	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR109
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	adrp	x0, .LC143
 	lsl	w3, w3, 1
 	add	x0, x0, :lo12:.LC143
@@ -14880,7 +14945,7 @@ dump_ftl_info:
 	adrp	x0, .LC144
 	add	x0, x0, :lo12:.LC144
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR101]
+	ldr	x1, [x22, #:lo12:.LANCHOR97]
 	mov	w2, 4
 	adrp	x0, .LC136
 	add	x0, x0, :lo12:.LC136
@@ -14896,9 +14961,9 @@ dump_ftl_info:
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR105
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC146
-	add	x1, x1, :lo12:.LANCHOR105
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC146
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
@@ -14907,10 +14972,10 @@ dump_ftl_info:
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR107
+	adrp	x0, .LANCHOR110
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR107]
+	ldr	x1, [x0, #:lo12:.LANCHOR110]
 	adrp	x0, .LC147
 	add	x0, x0, :lo12:.LC147
 	b	rknand_print_hex
@@ -14939,7 +15004,7 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2414
+	bne	.L2421
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
@@ -14952,7 +15017,7 @@ pm_ppa_update_check:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2414:
+.L2421:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -14968,87 +15033,87 @@ load_l2p_region:
 	and	w19, w0, 65535
 	stp	x23, x24, [sp, 48]
 	cmp	w20, 31
-	bls	.L2420
-	adrp	x1, .LANCHOR184
+	bls	.L2427
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
 	mov	w2, 31
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2420:
-	adrp	x23, .LANCHOR101
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L2427:
+	adrp	x23, .LANCHOR97
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2421
+	bcs	.L2428
 	mov	w1, w19
 	adrp	x0, .LC149
 	add	x0, x0, :lo12:.LC149
 	bl	printf
-	adrp	x0, .LANCHOR185
+	adrp	x0, .LANCHOR188
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR185]
+	ldrh	w2, [x0, #:lo12:.LANCHOR188]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2423
+	bcs	.L2430
 	mov	w2, 35
-.L2428:
-	adrp	x1, .LANCHOR184
+.L2435:
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR184
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2423
-.L2421:
+	b	.L2430
+.L2428:
 	add	x0, x0, x19, sxtw 2
 	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR120
-	add	x0, x0, :lo12:.LANCHOR120
+	adrp	x0, .LANCHOR123
+	add	x0, x0, :lo12:.LANCHOR123
 	add	x22, x0, x20
 	strh	w19, [x0, x20]
 	strh	wzr, [x22, 2]
-	cbnz	w21, .L2424
+	cbnz	w21, .L2431
 	mov	w2, 0
 	mov	w1, w19
 	adrp	x0, .LC150
 	add	x0, x0, :lo12:.LC150
 	bl	printf
-	adrp	x0, .LANCHOR185
+	adrp	x0, .LANCHOR188
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR185]
+	ldrh	w2, [x0, #:lo12:.LANCHOR188]
 	ldr	x0, [x22, 8]
 	bl	ftl_memset
-.L2423:
+.L2430:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2424:
-	adrp	x20, .LANCHOR176
-	adrp	x24, .LANCHOR114
+.L2431:
+	adrp	x20, .LANCHOR179
+	adrp	x24, .LANCHOR117
 	ldr	x1, [x22, 8]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR176]
-	ldrb	w3, [x24, #:lo12:.LANCHOR114]
+	ldr	x2, [x20, #:lo12:.LANCHOR179]
+	ldrb	w3, [x24, #:lo12:.LANCHOR117]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR176]
+	ldr	x1, [x20, #:lo12:.LANCHOR179]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2425
+	beq	.L2432
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
 	adrp	x0, .LC151
 	add	x0, x0, :lo12:.LC151
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	mov	w2, 4
 	adrp	x0, .LC152
 	add	x0, x0, :lo12:.LC152
@@ -15057,12 +15122,12 @@ load_l2p_region:
 	bl	rknand_print_hex
 	ldr	x1, [x22, 8]
 	mov	w2, 4
-	ldrb	w3, [x24, #:lo12:.LANCHOR114]
+	ldrb	w3, [x24, #:lo12:.LANCHOR117]
 	adrp	x0, .LC153
 	add	x0, x0, :lo12:.LC153
 	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR176]
+	ldr	x1, [x20, #:lo12:.LANCHOR179]
 	mov	w2, 4
 	mov	w3, 16
 	adrp	x0, .LC154
@@ -15082,13 +15147,13 @@ load_l2p_region:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2425:
-	ldr	x0, [x20, #:lo12:.LANCHOR176]
+.L2432:
+	ldr	x0, [x20, #:lo12:.LANCHOR179]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2423
+	beq	.L2430
 	mov	w2, 57
-	b	.L2428
+	b	.L2435
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -15098,73 +15163,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR101
-	adrp	x19, .LANCHOR131
+	adrp	x20, .LANCHOR97
+	adrp	x19, .LANCHOR134
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldr	x0, [x20, #:lo12:.LANCHOR97]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x19, #:lo12:.LANCHOR131]
+	ldrh	w0, [x19, #:lo12:.LANCHOR134]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2431
+	blt	.L2438
 	bl	pm_free_sblk
-	ldr	x2, [x20, #:lo12:.LANCHOR101]
-	ldrh	w1, [x19, #:lo12:.LANCHOR131]
+	ldr	x2, [x20, #:lo12:.LANCHOR97]
+	ldrh	w1, [x19, #:lo12:.LANCHOR134]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2431
+	blt	.L2438
 	add	x0, x2, x0, uxth 1
 	ldrh	w21, [x0, 416]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2433
-	adrp	x1, .LANCHOR186
-	add	x1, x1, :lo12:.LANCHOR186
+	bne	.L2440
+	adrp	x1, .LANCHOR189
+	add	x1, x1, :lo12:.LANCHOR189
 	mov	w2, 129
 	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
 	bl	pm_free_sblk
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	add	x0, x1, x0, uxth 1
 	ldrh	w21, [x0, 416]
-.L2433:
+.L2440:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR120
+	adrp	x1, .LANCHOR123
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR120
+	add	x2, x1, :lo12:.LANCHOR123
 	mov	x22, x24
 	add	x19, x2, x0
 	mov	x23, x1
 	ldrh	w0, [x2, x0]
 	mov	w2, 65535
 	cmp	w0, w2
-	beq	.L2434
+	beq	.L2441
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2434
+	cbz	x1, .L2441
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2434
+	tbz	w2, #31, .L2441
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2434:
-	add	x1, x23, :lo12:.LANCHOR120
+.L2441:
+	add	x1, x23, :lo12:.LANCHOR123
 	adrp	x25, .LANCHOR96
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR96
 	mov	w19, 0
-.L2435:
-	ldr	x1, [x20, #:lo12:.LANCHOR101]
+.L2442:
+	ldr	x1, [x20, #:lo12:.LANCHOR97]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2437
+	bhi	.L2444
 	bl	pm_free_sblk
-.L2431:
+.L2438:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -15172,7 +15237,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2437:
+.L2444:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -15187,7 +15252,7 @@ pm_gc:
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
 	cmp	w21, w0, uxth
-	bne	.L2436
+	bne	.L2443
 	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
@@ -15196,10 +15261,10 @@ pm_gc:
 	bl	pm_write_page
 	mov	w0, -1
 	strh	w0, [x24]
-.L2436:
+.L2443:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2435
+	b	.L2442
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -15208,8 +15273,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR120
-	add	x2, x2, :lo12:.LANCHOR120
+	adrp	x2, .LANCHOR123
+	add	x2, x2, :lo12:.LANCHOR123
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -15219,12 +15284,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR118
-	ldr	w0, [x19, #:lo12:.LANCHOR118]
-	cbz	w0, .L2443
+	adrp	x19, .LANCHOR121
+	ldr	w0, [x19, #:lo12:.LANCHOR121]
+	cbz	w0, .L2450
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR118]
-.L2443:
+	str	wzr, [x19, #:lo12:.LANCHOR121]
+.L2450:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15238,21 +15303,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR120
-	add	x19, x19, :lo12:.LANCHOR120
+	adrp	x19, .LANCHOR123
+	add	x19, x19, :lo12:.LANCHOR123
 	mov	w20, 0
 	add	x19, x19, 2
-.L2450:
+.L2457:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2449
+	tbz	w0, #31, .L2456
 	mov	w0, w20
 	bl	pm_flush_id
-.L2449:
+.L2456:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2450
+	bne	.L2457
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -15301,74 +15366,74 @@ pm_init:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR118
+	adrp	x0, .LANCHOR121
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR120
-	str	wzr, [x0, #:lo12:.LANCHOR118]
-	adrp	x0, .LANCHOR177
+	adrp	x20, .LANCHOR123
+	str	wzr, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR180
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR120
-	strb	w1, [x0, #:lo12:.LANCHOR177]
+	add	x19, x20, :lo12:.LANCHOR123
+	strb	w1, [x0, #:lo12:.LANCHOR180]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR176
-	adrp	x22, .LANCHOR114
+	adrp	x1, .LANCHOR179
+	adrp	x22, .LANCHOR117
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR114
-	str	x0, [x1, #:lo12:.LANCHOR176]
+	add	x22, x22, :lo12:.LANCHOR117
+	str	x0, [x1, #:lo12:.LANCHOR179]
 	mov	w25, -1
-.L2460:
+.L2467:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2459
+	cbz	w24, .L2466
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2459:
+.L2466:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2460
-	add	x0, x20, :lo12:.LANCHOR120
-	adrp	x19, .LANCHOR101
-	ldr	x24, [x21, #:lo12:.LANCHOR176]
+	bne	.L2467
+	add	x0, x20, :lo12:.LANCHOR123
+	adrp	x19, .LANCHOR97
+	ldr	x24, [x21, #:lo12:.LANCHOR179]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2461
+	bgt	.L2468
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
 	adrp	x0, .LC155
 	add	x0, x0, :lo12:.LC155
-	adrp	x27, .LANCHOR99
-	adrp	x28, .LANCHOR114
-	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR114
+	adrp	x27, .LANCHOR103
+	adrp	x28, .LANCHOR117
+	add	x27, x27, :lo12:.LANCHOR103
+	add	x28, x28, :lo12:.LANCHOR117
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	ldrsh	w21, [x0, 696]
-.L2462:
+.L2469:
 	cmp	w21, w26
-	ble	.L2464
-	adrp	x0, .LANCHOR167
+	ble	.L2471
+	adrp	x0, .LANCHOR170
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR120
+	add	x20, x20, :lo12:.LANCHOR123
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR167]
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	strb	w1, [x0, #:lo12:.LANCHOR170]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -15377,7 +15442,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2461:
+.L2468:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -15388,8 +15453,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2464:
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+.L2471:
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -15400,7 +15465,7 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
@@ -15414,18 +15479,18 @@ pm_init:
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2463
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	beq	.L2470
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2463
+	bcs	.L2470
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2463:
+.L2470:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2462
+	b	.L2469
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -15436,10 +15501,10 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR114
+	adrp	x1, .LANCHOR117
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR114]
+	ldrb	w1, [x1, #:lo12:.LANCHOR117]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
@@ -15450,52 +15515,52 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2474
+	bcc	.L2481
 	mov	w1, w0
 	adrp	x0, .LC157
 	add	x0, x0, :lo12:.LC157
 	bl	printf
 	mov	w0, -1
-.L2473:
+.L2480:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2474:
-	adrp	x24, .LANCHOR120
-	add	x0, x24, :lo12:.LANCHOR120
+.L2481:
+	adrp	x24, .LANCHOR123
+	add	x0, x24, :lo12:.LANCHOR123
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2480:
+.L2487:
 	ldr	x1, [x0]
-	cbz	x1, .L2476
+	cbz	x1, .L2483
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2476
-.L2477:
-	cbnz	w23, .L2478
-	add	x0, x24, :lo12:.LANCHOR120
+	bne	.L2483
+.L2484:
+	cbnz	w23, .L2485
+	add	x0, x24, :lo12:.LANCHOR123
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2479:
-	add	x24, x24, :lo12:.LANCHOR120
+.L2486:
+	add	x24, x24, :lo12:.LANCHOR123
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2482
+	beq	.L2489
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2482:
+.L2489:
 	mov	w0, 0
-	b	.L2473
-.L2478:
-	add	x0, x24, :lo12:.LANCHOR120
+	b	.L2480
+.L2485:
+	add	x0, x24, :lo12:.LANCHOR123
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -15503,35 +15568,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR121
-	strb	w21, [x0, #:lo12:.LANCHOR121]
-	b	.L2479
-.L2476:
+	adrp	x0, .LANCHOR124
+	strb	w21, [x0, #:lo12:.LANCHOR124]
+	b	.L2486
+.L2483:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2480
+	bne	.L2487
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR120
+	add	x2, x24, :lo12:.LANCHOR123
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2481
+	beq	.L2488
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2481
+	tbz	w1, #31, .L2488
 	bl	pm_flush_id
-.L2481:
-	adrp	x0, .LANCHOR187
+.L2488:
+	adrp	x0, .LANCHOR190
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR187]
+	strb	w19, [x0, #:lo12:.LANCHOR190]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2477
+	b	.L2484
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.ftl_read_ahead,"ax",@progbits
 	.align	2
@@ -15546,12 +15611,12 @@ ftl_read_ahead:
 	ldr	w0, [x20, #:lo12:.LANCHOR56]
 	stp	x23, x24, [sp, 48]
 	cmn	w0, #1
-	beq	.L2497
+	beq	.L2504
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x19, x0
 	mov	w0, -1
-	cbz	x19, .L2488
+	cbz	x19, .L2495
 	ldr	w21, [x20, #:lo12:.LANCHOR56]
 	str	w21, [x19, 36]
 	str	w0, [x20, #:lo12:.LANCHOR56]
@@ -15561,40 +15626,40 @@ ftl_read_ahead:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2491
+	bne	.L2498
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	pm_log2phys
-.L2491:
+.L2498:
 	ldr	w0, [x29, 76]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2492
-	adrp	x0, .LANCHOR114
+	bne	.L2499
+	adrp	x0, .LANCHOR117
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	mov	x0, x20
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-.L2497:
+.L2504:
 	mov	w0, 0
-.L2488:
+.L2495:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2492:
+.L2499:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w23, [x19, 52]
 	cmn	w23, #1
-	bne	.L2493
+	bne	.L2500
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
@@ -15603,10 +15668,10 @@ ftl_read_ahead:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2494:
+.L2501:
 	ldr	w5, [x22, 4]
 	cmp	w21, w5
-	beq	.L2495
+	beq	.L2502
 	ldrb	w1, [x19, 1]
 	adrp	x0, .LC159
 	ldr	w4, [x22]
@@ -15615,23 +15680,23 @@ ftl_read_ahead:
 	add	x0, x0, :lo12:.LC159
 	ldr	w3, [x29, 76]
 	bl	printf
-.L2495:
+.L2502:
 	ldr	w0, [x22, 4]
 	cmp	w21, w0
-	bne	.L2496
+	bne	.L2503
 	cmn	w23, #1
-	bne	.L2497
-.L2496:
+	bne	.L2504
+.L2503:
 	mov	w2, 874
-	adrp	x1, .LANCHOR188
+	adrp	x1, .LANCHOR191
 	adrp	x0, .LC0
-	add	x1, x1, :lo12:.LANCHOR188
+	add	x1, x1, :lo12:.LANCHOR191
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2497
-.L2493:
+	b	.L2504
+.L2500:
 	cmp	w23, 256
-	bne	.L2494
+	bne	.L2501
 	adrp	x0, .LANCHOR96
 	mov	w20, 21
 	mov	w24, 1
@@ -15654,7 +15719,7 @@ ftl_read_ahead:
 	mov	w1, w24
 	mov	w0, w20
 	bl	gc_add_sblk
-	b	.L2494
+	b	.L2501
 	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -15670,9 +15735,9 @@ gc_recovery:
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR5]
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR135
+	adrp	x0, .LANCHOR138
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR135]
+	strb	wzr, [x0, #:lo12:.LANCHOR138]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -15682,7 +15747,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	beq	.L2502
+	beq	.L2509
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -15690,41 +15755,41 @@ gc_recovery:
 	mov	x27, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR99
+	adrp	x3, .LANCHOR103
 	adrp	x2, .LANCHOR67
 	sub	w0, w0, #1
 	str	x3, [x29, 128]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR99]
+	ldrh	w1, [x3, #:lo12:.LANCHOR103]
 	str	x2, [x29, 160]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
 	ldrb	w0, [x2, #:lo12:.LANCHOR67]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2503
+	bne	.L2510
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2550:
+.L2557:
 	str	w0, [x27, 40]
-.L2504:
+.L2511:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2505
+	beq	.L2512
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2506
-.L2505:
+	beq	.L2513
+.L2512:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x1, [x27, 24]
@@ -15743,7 +15808,7 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L2554:
+.L2561:
 	adrp	x0, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -15752,7 +15817,7 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2507:
+.L2514:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
 	adrp	x0, .LC163
@@ -15766,18 +15831,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2536
+	beq	.L2543
 	bl	ftl_free_sblk
-.L2536:
-	adrp	x0, .LANCHOR101
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+.L2543:
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2501:
+.L2508:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -15786,34 +15851,34 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2503:
+.L2510:
 	cmp	w0, 2
-	bne	.L2504
+	bne	.L2511
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2550
-.L2506:
+	b	.L2557
+.L2513:
 	adrp	x26, .LANCHOR71
 	adrp	x19, .LANCHOR72
-	adrp	x22, .LANCHOR136
+	adrp	x22, .LANCHOR139
 	ldr	x1, [x27, 8]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	ldrh	w2, [x26, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	ldr	x0, [x22, #:lo12:.LANCHOR136]
+	ldr	x0, [x22, #:lo12:.LANCHOR139]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR137
+	adrp	x19, .LANCHOR140
 	ldrh	w0, [x26, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	ldr	x1, [x27, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x19, #:lo12:.LANCHOR137]
+	ldr	x0, [x19, #:lo12:.LANCHOR140]
 	bl	ftl_memcpy
 	str	x26, [x29, 120]
 	adrp	x0, .LANCHOR80
@@ -15822,28 +15887,28 @@ gc_recovery:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	beq	.L2508
-.L2551:
+	beq	.L2515
+.L2558:
 	str	w0, [x29, 180]
 	adrp	x23, .LC161
 	ldr	x0, [x29, 128]
 	add	x23, x23, :lo12:.LC161
 	mov	w26, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 104]
-.L2510:
+.L2517:
 	sub	w0, w26, #1
 	str	w0, [x29, 184]
 	cmp	w26, w24
-	beq	.L2519
+	beq	.L2526
 	mov	x19, 0
-	b	.L2520
-.L2508:
+	b	.L2527
+.L2515:
 	lsl	w24, w24, 1
 	mov	w0, 1
-	b	.L2551
-.L2516:
+	b	.L2558
+.L2523:
 	ldr	x1, [x29, 104]
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x1]
@@ -15853,32 +15918,32 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2511
+	bne	.L2518
 	add	w0, w26, w0
 	orr	w0, w0, w25, lsl 24
-.L2552:
+.L2559:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	ldr	x0, [x0, #:lo12:.LANCHOR139]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x27, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2514
+	bne	.L2521
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR137]
+	ldr	x1, [x1, #:lo12:.LANCHOR140]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2515
-.L2514:
+	beq	.L2522
+.L2521:
 	ldr	x1, [x29, 144]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR137]
+	ldr	x1, [x1, #:lo12:.LANCHOR140]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
 	mov	x0, x23
@@ -15887,38 +15952,38 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	bl	printf
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	ldr	x0, [x0, #:lo12:.LANCHOR139]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2515
+	beq	.L2522
 	mov	x0, x27
 	bl	buf_free
-	b	.L2554
-.L2511:
+	b	.L2561
+.L2518:
 	cmp	w1, 2
-	bne	.L2513
+	bne	.L2520
 	ldr	w1, [x29, 184]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2552
-.L2513:
+	b	.L2559
+.L2520:
 	add	w0, w26, w0
-	b	.L2552
-.L2515:
+	b	.L2559
+.L2522:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2518:
+.L2525:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2516
+	bcs	.L2523
 	add	x19, x19, 1
-.L2520:
+.L2527:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2517
+	ble	.L2524
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 160]
@@ -15926,11 +15991,11 @@ gc_recovery:
 	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 112]
-	b	.L2518
-.L2517:
+	b	.L2525
+.L2524:
 	add	w26, w26, 1
-	b	.L2510
-.L2519:
+	b	.L2517
+.L2526:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x3, [x29, 120]
@@ -15948,46 +16013,46 @@ gc_recovery:
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 96]
-.L2521:
+.L2528:
 	sub	w0, w23, #1
 	str	w0, [x29, 120]
 	cmp	w26, w23
-	beq	.L2534
+	beq	.L2541
 	str	xzr, [x29, 184]
-	b	.L2535
-.L2531:
+	b	.L2542
+.L2538:
 	ldr	x1, [x29, 152]
 	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	ldr	x1, [x1, #:lo12:.LANCHOR139]
 	ldr	w28, [x1, x0]
 	cmn	w28, #1
-	beq	.L2522
+	beq	.L2529
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR137]
+	ldr	x1, [x1, #:lo12:.LANCHOR140]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 136]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2523
+	bne	.L2530
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w28
 	bl	pm_log2phys
-.L2523:
+.L2530:
 	ldr	x0, [x29, 112]
 	ldr	x1, [x29, 128]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
+	ldrh	w1, [x1, #:lo12:.LANCHOR103]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 160]
 	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L2524
+	bne	.L2531
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2553:
+.L2560:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 96]
@@ -16005,7 +16070,7 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2527
+	bne	.L2534
 	ldr	w2, [x29, 200]
 	mov	w1, w28
 	str	w4, [x29, 136]
@@ -16013,21 +16078,21 @@ gc_recovery:
 	add	x0, x0, :lo12:.LC162
 	bl	pm_ppa_update_check
 	ldr	w4, [x29, 136]
-	cbz	w0, .L2528
-.L2548:
-	b	.L2548
-.L2524:
+	cbz	w0, .L2535
+.L2555:
+	b	.L2555
+.L2531:
 	cmp	w1, 2
-	bne	.L2526
+	bne	.L2533
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2553
-.L2526:
+	b	.L2560
+.L2533:
 	add	w0, w23, w0
-	b	.L2553
-.L2528:
+	b	.L2560
+.L2535:
 	mov	w2, w4
 	add	x1, x29, 200
 	mov	w0, w28
@@ -16035,34 +16100,34 @@ gc_recovery:
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2530:
+.L2537:
 	adrp	x0, .LANCHOR3
 	add	w27, w27, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2522
+	bne	.L2529
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	lsl	x19, x19, 1
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2522
+	cbz	w1, .L2529
 	strh	wzr, [x0, x19]
-.L2522:
+.L2529:
 	add	w25, w25, 1
-.L2533:
+.L2540:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2531
+	bcs	.L2538
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-.L2535:
+.L2542:
 	ldr	x0, [x29, 168]
 	ldr	w1, [x29, 184]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w1
-	ble	.L2532
+	ble	.L2539
 	ldr	x0, [x29, 184]
 	mov	w25, 1
 	add	x0, x20, x0, lsl 1
@@ -16070,43 +16135,43 @@ gc_recovery:
 	adrp	x0, .LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR95
 	str	x0, [x29, 104]
-	b	.L2533
-.L2527:
+	b	.L2540
+.L2534:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2530
-.L2532:
+	b	.L2537
+.L2539:
 	add	w23, w23, 1
-	b	.L2521
-.L2534:
+	b	.L2528
+.L2541:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	strh	w22, [x0, x1, lsl 1]
-	b	.L2507
-.L2502:
+	b	.L2514
+.L2509:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2501
-	adrp	x19, .LANCHOR101
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	beq	.L2508
+	adrp	x19, .LANCHOR97
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2538
+	bne	.L2545
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	ldr	x0, [x19, #:lo12:.LANCHOR97]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2538:
+.L2545:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2501
+	b	.L2508
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
@@ -16122,14 +16187,14 @@ zftl_init:
 	stp	x21, x22, [sp, 32]
 	adrp	x22, .LANCHOR80
 	strb	wzr, [x1, #:lo12:.LANCHOR53]
-	adrp	x1, .LANCHOR160
+	adrp	x1, .LANCHOR163
 	stp	x19, x20, [sp, 16]
 	adrp	x21, .LANCHOR72
-	strb	w0, [x1, #:lo12:.LANCHOR160]
-	adrp	x0, .LANCHOR112
+	strb	w0, [x1, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR115
 	mov	w1, -1
 	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR112]
+	strb	wzr, [x0, #:lo12:.LANCHOR115]
 	adrp	x0, .LANCHOR56
 	stp	x25, x26, [sp, 64]
 	adrp	x23, .LANCHOR2
@@ -16140,16 +16205,16 @@ zftl_init:
 	adrp	x0, .LC80
 	add	x0, x0, :lo12:.LC80
 	bl	printf
-	adrp	x20, .LANCHOR185
+	adrp	x20, .LANCHOR188
 	adrp	x1, .LANCHOR32
 	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR67
-	adrp	x2, .LANCHOR114
+	adrp	x2, .LANCHOR117
 	adrp	x7, .LANCHOR95
 	ldrb	w5, [x1, 12]
 	strb	w5, [x0, #:lo12:.LANCHOR67]
 	ldrb	w0, [x1, 9]
-	strb	w0, [x2, #:lo12:.LANCHOR114]
+	strb	w0, [x2, #:lo12:.LANCHOR117]
 	adrp	x2, .LANCHOR71
 	ldrh	w3, [x1, 10]
 	strh	w3, [x2, #:lo12:.LANCHOR71]
@@ -16157,172 +16222,172 @@ zftl_init:
 	ldrh	w8, [x1, 14]
 	ubfiz	w11, w0, 9, 7
 	ldrb	w4, [x2, #:lo12:.LANCHOR12]
-	adrp	x2, .LANCHOR100
+	adrp	x2, .LANCHOR104
 	sdiv	w6, w3, w5
 	strh	w8, [x23, #:lo12:.LANCHOR2]
-	strb	w4, [x2, #:lo12:.LANCHOR100]
+	strb	w4, [x2, #:lo12:.LANCHOR104]
 	ldrb	w2, [x1, 13]
 	adrp	x1, .LANCHOR26
 	strb	w2, [x7, #:lo12:.LANCHOR95]
 	ldrh	w7, [x1, #:lo12:.LANCHOR26]
-	adrp	x1, .LANCHOR99
+	adrp	x1, .LANCHOR103
 	strh	w6, [x22, #:lo12:.LANCHOR80]
 	mul	w4, w4, w2
-	strh	w7, [x1, #:lo12:.LANCHOR99]
-	strh	w11, [x20, #:lo12:.LANCHOR185]
+	strh	w7, [x1, #:lo12:.LANCHOR103]
+	strh	w11, [x20, #:lo12:.LANCHOR188]
 	mov	w2, 1
 	and	w4, w4, 255
 	mov	w1, 0
 	strb	w4, [x21, #:lo12:.LANCHOR72]
-.L2556:
+.L2563:
 	cmp	w7, w2
-	bcs	.L2557
+	bcs	.L2564
 	mul	w3, w0, w3
 	adrp	x2, .LANCHOR96
 	sub	w1, w1, #1
-	adrp	x10, .LANCHOR189
+	adrp	x10, .LANCHOR192
 	strh	w1, [x2, #:lo12:.LANCHOR96]
 	mov	w1, 57344
 	movk	w1, 0x1c, lsl 16
 	adrp	x28, .LANCHOR54
 	mul	w7, w3, w8
-	adrp	x24, .LANCHOR172
+	adrp	x24, .LANCHOR175
 	mul	w1, w4, w1
-	adrp	x27, .LANCHOR190
+	adrp	x27, .LANCHOR193
 	mul	w3, w3, w4
-	adrp	x26, .LANCHOR131
+	adrp	x26, .LANCHOR134
 	lsr	w2, w7, 21
 	mul	w6, w6, w4
 	mul	w7, w7, w4
 	sub	w3, w3, #1
-	str	w7, [x10, #:lo12:.LANCHOR189]
+	str	w7, [x10, #:lo12:.LANCHOR192]
 	sub	w7, w11, #1
 	mul	w1, w1, w2
 	adrp	x2, .LANCHOR59
 	adrp	x25, .LANCHOR83
 	str	w1, [x2, #:lo12:.LANCHOR59]
 	add	w2, w1, 24576
-	str	w2, [x27, #:lo12:.LANCHOR190]
+	str	w2, [x27, #:lo12:.LANCHOR193]
 	udiv	w0, w2, w0
 	udiv	w2, w2, w3
 	str	w0, [x28, #:lo12:.LANCHOR54]
 	add	w0, w7, w0, lsl 2
 	add	w2, w2, 8
 	udiv	w0, w0, w11
-	strh	w0, [x24, #:lo12:.LANCHOR172]
+	strh	w0, [x24, #:lo12:.LANCHOR175]
 	ubfiz	w0, w0, 4, 16
 	sdiv	w0, w0, w6
 	adrp	x6, .LANCHOR87
 	str	x6, [x29, 104]
 	strh	w2, [x6, #:lo12:.LANCHOR87]
-	adrp	x2, .LANCHOR191
-	strh	w0, [x26, #:lo12:.LANCHOR131]
+	adrp	x2, .LANCHOR100
+	strh	w0, [x26, #:lo12:.LANCHOR134]
 	add	w0, w8, w8, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x2, #:lo12:.LANCHOR191]
+	strh	w0, [x2, #:lo12:.LANCHOR100]
 	lsr	w0, w8, 4
 	strh	w0, [x25, #:lo12:.LANCHOR83]
 	cmp	w0, 79
-	bhi	.L2558
+	bhi	.L2565
 	mov	w0, 80
 	strh	w0, [x25, #:lo12:.LANCHOR83]
-.L2558:
-	adrp	x2, .LANCHOR192
+.L2565:
+	adrp	x2, .LANCHOR98
 	mov	w0, 4000
-	adrp	x4, .LANCHOR193
+	adrp	x4, .LANCHOR99
 	mov	w3, 1024
-	strh	w0, [x2, #:lo12:.LANCHOR192]
+	strh	w0, [x2, #:lo12:.LANCHOR98]
 	mov	w0, 50
-	strh	w0, [x4, #:lo12:.LANCHOR193]
-	adrp	x0, .LANCHOR130
+	strh	w0, [x4, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR133
 	mov	w6, 64
 	cmp	w5, 2
-	strh	w3, [x0, #:lo12:.LANCHOR130]
-	adrp	x3, .LANCHOR129
-	strh	w6, [x3, #:lo12:.LANCHOR129]
-	beq	.L2559
+	strh	w3, [x0, #:lo12:.LANCHOR133]
+	adrp	x3, .LANCHOR132
+	strh	w6, [x3, #:lo12:.LANCHOR132]
+	beq	.L2566
 	adrp	x5, .LANCHOR69
 	ldrb	w5, [x5, #:lo12:.LANCHOR69]
-	cbz	w5, .L2560
-.L2559:
+	cbz	w5, .L2567
+.L2566:
 	mov	w5, 150
-	strh	w5, [x4, #:lo12:.LANCHOR193]
+	strh	w5, [x4, #:lo12:.LANCHOR99]
 	mov	w4, 128
-	strh	w4, [x3, #:lo12:.LANCHOR129]
+	strh	w4, [x3, #:lo12:.LANCHOR132]
 	adrp	x3, .LANCHOR11
 	ldrb	w3, [x3, #:lo12:.LANCHOR11]
-	cbnz	w3, .L2560
+	cbnz	w3, .L2567
 	mov	w3, 600
-	strh	w3, [x2, #:lo12:.LANCHOR192]
+	strh	w3, [x2, #:lo12:.LANCHOR98]
 	mov	w2, 512
-	strh	w2, [x0, #:lo12:.LANCHOR130]
-.L2560:
+	strh	w2, [x0, #:lo12:.LANCHOR133]
+.L2567:
 	adrp	x19, .LANCHOR7
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2562
+	tbz	x0, 12, .L2569
 	str	x10, [x29, 96]
 	adrp	x0, .LC165
 	add	x0, x0, :lo12:.LC165
 	bl	printf
 	ldr	x10, [x29, 96]
-.L2562:
+.L2569:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2563
-	ldr	w1, [x10, #:lo12:.LANCHOR189]
+	tbz	x0, 12, .L2570
+	ldr	w1, [x10, #:lo12:.LANCHOR192]
 	adrp	x0, .LC166
 	add	x0, x0, :lo12:.LC166
 	bl	printf
-.L2563:
+.L2570:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2564
+	tbz	x0, 12, .L2571
 	ldr	w1, [x28, #:lo12:.LANCHOR54]
 	adrp	x0, .LC167
 	add	x0, x0, :lo12:.LC167
 	bl	printf
-.L2564:
+.L2571:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2565
-	ldr	w1, [x27, #:lo12:.LANCHOR190]
+	tbz	x0, 12, .L2572
+	ldr	w1, [x27, #:lo12:.LANCHOR193]
 	adrp	x0, .LC168
 	add	x0, x0, :lo12:.LC168
 	bl	printf
-.L2565:
+.L2572:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2566
-	ldrh	w1, [x24, #:lo12:.LANCHOR172]
+	tbz	x0, 12, .L2573
+	ldrh	w1, [x24, #:lo12:.LANCHOR175]
 	adrp	x0, .LC169
 	add	x0, x0, :lo12:.LC169
 	bl	printf
-.L2566:
+.L2573:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2567
-	ldrh	w1, [x20, #:lo12:.LANCHOR185]
+	tbz	x0, 12, .L2574
+	ldrh	w1, [x20, #:lo12:.LANCHOR188]
 	adrp	x0, .LC170
 	add	x0, x0, :lo12:.LC170
 	bl	printf
-.L2567:
+.L2574:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2568
-	ldrh	w1, [x26, #:lo12:.LANCHOR131]
+	tbz	x0, 12, .L2575
+	ldrh	w1, [x26, #:lo12:.LANCHOR134]
 	adrp	x0, .LC171
 	add	x0, x0, :lo12:.LC171
 	bl	printf
-.L2568:
+.L2575:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2569
+	tbz	x0, 12, .L2576
 	ldrh	w1, [x25, #:lo12:.LANCHOR83]
 	adrp	x0, .LC172
 	add	x0, x0, :lo12:.LC172
 	bl	printf
-.L2569:
+.L2576:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2570
+	tbz	x0, 12, .L2577
 	ldr	x0, [x29, 104]
 	ldrh	w1, [x0, #:lo12:.LANCHOR87]
 	adrp	x0, .LC173
 	add	x0, x0, :lo12:.LC173
 	bl	printf
-.L2570:
+.L2577:
 	bl	buf_init
 	adrp	x25, .LANCHOR5
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
@@ -16336,13 +16401,13 @@ zftl_init:
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR107
+	adrp	x1, .LANCHOR110
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR107]
-	adrp	x0, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
 	ldrh	w1, [x22, #:lo12:.LANCHOR80]
-	str	x2, [x0, #:lo12:.LANCHOR106]
+	str	x2, [x0, #:lo12:.LANCHOR109]
 	ldrb	w0, [x21, #:lo12:.LANCHOR72]
 	mul	w1, w1, w0
 	lsl	w0, w1, 1
@@ -16354,15 +16419,15 @@ zftl_init:
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
 	add	x1, x2, x1, sxtw 2
 	str	x1, [x25, #:lo12:.LANCHOR5]
-	tbz	x0, 12, .L2571
+	tbz	x0, 12, .L2578
 	adrp	x0, .LC174
 	add	x0, x0, :lo12:.LC174
 	bl	printf
-.L2571:
+.L2578:
 	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	ldrb	w21, [x21, #:lo12:.LANCHOR72]
 	ldrh	w1, [x23, #:lo12:.LANCHOR2]
-	ldrh	w22, [x24, #:lo12:.LANCHOR172]
+	ldrh	w22, [x24, #:lo12:.LANCHOR175]
 	mul	w21, w0, w21
 	ldr	w0, [x19, #:lo12:.LANCHOR7]
 	add	w21, w1, w21, lsl 2
@@ -16371,34 +16436,34 @@ zftl_init:
 	add	w22, w1, w22, lsl 2
 	add	w21, w21, 612
 	add	w22, w22, 704
-	tbz	x0, 12, .L2572
-	ldrh	w3, [x20, #:lo12:.LANCHOR185]
+	tbz	x0, 12, .L2579
+	ldrh	w3, [x20, #:lo12:.LANCHOR188]
 	adrp	x0, .LC175
 	mov	w2, w22
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC175
 	bl	printf
-.L2572:
-	ldrh	w0, [x20, #:lo12:.LANCHOR185]
+.L2579:
+	ldrh	w0, [x20, #:lo12:.LANCHOR188]
 	cmp	w21, w0
-	bhi	.L2573
+	bhi	.L2580
 	cmp	w22, w0
-	bls	.L2574
-.L2573:
-.L2617:
-	b	.L2617
-.L2557:
+	bls	.L2581
+.L2580:
+.L2624:
+	b	.L2624
+.L2564:
 	add	w1, w1, 1
 	lsl	w2, w2, 1
 	and	w1, w1, 65535
-	b	.L2556
-.L2574:
+	b	.L2563
+.L2581:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2555
+	beq	.L2562
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR101
+	adrp	x19, .LANCHOR97
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
@@ -16410,7 +16475,7 @@ zftl_init:
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
@@ -16427,20 +16492,20 @@ zftl_init:
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR167
-	ldrb	w0, [x0, #:lo12:.LANCHOR167]
-	cbz	w0, .L2576
-	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR170
+	ldrb	w0, [x0, #:lo12:.LANCHOR170]
+	cbz	w0, .L2583
+	ldr	x1, [x19, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2576:
+.L2583:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2555:
+.L2562:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -16458,9 +16523,9 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2621
+	cbnz	w0, .L2628
 	bl	zftl_init
-.L2621:
+.L2628:
 	mov	w19, w0
 	bl	idb_init
 	mov	w1, w19
@@ -16495,12 +16560,12 @@ gc_update_l2p_map_new:
 	str	x0, [x29, 128]
 	mul	w25, w25, w1
 	ldr	w1, [x21, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L2624
+	tbz	x1, 8, .L2631
 	ldrh	w1, [x20, 80]
 	adrp	x0, .LC177
 	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2624:
+.L2631:
 	adrp	x23, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	sub	w2, w25, #1
@@ -16508,15 +16573,15 @@ gc_update_l2p_map_new:
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	w24, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	str	x0, [x29, 104]
-.L2625:
+.L2632:
 	mov	w27, w22
 	cmp	w25, w22
-	bhi	.L2635
+	bhi	.L2642
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2636
+	tbz	x0, 8, .L2643
 	ldr	x0, [x29, 128]
 	mov	w3, w24
 	ldr	x1, [x23, #:lo12:.LANCHOR4]
@@ -16527,19 +16592,19 @@ gc_update_l2p_map_new:
 	adrp	x0, .LC181
 	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2636:
+.L2643:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x1, lsl 1]
 	cmp	w24, w0
-	beq	.L2637
+	beq	.L2644
 	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
 	mov	w2, 463
 	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2637:
+.L2644:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	strh	w24, [x0, x1, lsl 1]
@@ -16552,27 +16617,27 @@ gc_update_l2p_map_new:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 176
 	ret
-.L2635:
-	adrp	x26, .LANCHOR136
+.L2642:
+	adrp	x26, .LANCHOR139
 	lsl	x19, x22, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR136]
+	ldr	x0, [x26, #:lo12:.LANCHOR139]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2626
-	adrp	x0, .LANCHOR114
-	ldrb	w0, [x0, #:lo12:.LANCHOR114]
+	beq	.L2633
+	adrp	x0, .LANCHOR117
+	ldrb	w0, [x0, #:lo12:.LANCHOR117]
 	lsl	w0, w0, 7
 	udiv	w0, w2, w0
 	and	w0, w0, 65535
 	str	w0, [x29, 156]
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2627
+	tbz	x0, 8, .L2634
 	ldr	w1, [x29, 156]
 	adrp	x0, .LC178
 	mov	w3, w22
 	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2627:
+.L2634:
 	sub	w27, w25, w27
 	add	x27, x27, x22
 	lsl	x0, x27, 2
@@ -16583,46 +16648,46 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 112]
-.L2628:
+.L2635:
 	ldr	x0, [x29, 136]
 	cmp	x0, x19
-	bne	.L2634
-.L2626:
+	bne	.L2641
+.L2633:
 	add	x22, x22, 1
-	b	.L2625
-.L2634:
-	ldr	x0, [x26, #:lo12:.LANCHOR136]
+	b	.L2632
+.L2641:
+	ldr	x0, [x26, #:lo12:.LANCHOR139]
 	ldr	w28, [x0, x19]
 	cmn	w28, #1
-	beq	.L2629
+	beq	.L2636
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w28, w0
 	cmp	w1, w0, uxth
-	bne	.L2629
-	adrp	x0, .LANCHOR137
-	ldr	x0, [x0, #:lo12:.LANCHOR137]
+	bne	.L2636
+	adrp	x0, .LANCHOR140
+	ldr	x0, [x0, #:lo12:.LANCHOR140]
 	ldr	w27, [x0, x19]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2630
+	bne	.L2637
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w28
 	bl	pm_log2phys
-.L2630:
+.L2637:
 	ldr	w3, [x29, 172]
 	cmp	w27, w3
-	bne	.L2631
-	adrp	x0, .LANCHOR138
+	bne	.L2638
+	adrp	x0, .LANCHOR141
 	mov	w2, 1
 	add	x1, x29, 168
 	add	w24, w24, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR138]
+	ldr	x0, [x0, #:lo12:.LANCHOR141]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w28
@@ -16647,34 +16712,34 @@ gc_update_l2p_map_new:
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bne	.L2632
+	bne	.L2639
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2632
+	tbz	x0, 8, .L2639
 	ldr	w3, [x29, 172]
 	adrp	x0, .LC179
 	mov	w2, w27
 	mov	w1, w28
 	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2632:
-	ldr	x0, [x26, #:lo12:.LANCHOR136]
+.L2639:
+	ldr	x0, [x26, #:lo12:.LANCHOR139]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2629:
+.L2636:
 	add	x19, x19, 4
-	b	.L2628
-.L2631:
+	b	.L2635
+.L2638:
 	ldr	w0, [x21, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2633
+	tbz	x0, 8, .L2640
 	ldr	x0, [x29, 120]
 	mov	w2, w27
 	mov	w1, w28
 	bl	printf
-.L2633:
+.L2640:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0]
 	bl	ftl_vpn_decrement
-	b	.L2632
+	b	.L2639
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -16698,43 +16763,43 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR72
 	ldrb	w4, [x2, #:lo12:.LANCHOR72]
 	ldrh	w2, [x1, 2]
-.L2661:
+.L2668:
 	cmp	w3, w7
-	beq	.L2663
-	cbz	w6, .L2664
+	beq	.L2670
+	cbz	w6, .L2671
 	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L2664:
-	cbz	w5, .L2665
+.L2671:
+	cbz	w5, .L2672
 	add	x0, x19, :lo12:.LANCHOR63
 	strh	w2, [x0, 2]
-.L2665:
-	adrp	x0, .LANCHOR99
-	ldrh	w22, [x0, #:lo12:.LANCHOR99]
+.L2672:
+	adrp	x0, .LANCHOR103
+	ldrh	w22, [x0, #:lo12:.LANCHOR103]
 	adrp	x0, .LANCHOR67
 	mov	x23, x0
 	ldrb	w1, [x0, #:lo12:.LANCHOR67]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2666
+	bne	.L2673
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2666
+	cbnz	w1, .L2673
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2667:
+.L2674:
 	add	x1, x19, :lo12:.LANCHOR63
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2668
+	bne	.L2675
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2668:
+.L2675:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR63
 	bl	buf_alloc
@@ -16742,15 +16807,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR64
-.L2678:
+.L2685:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2669
-	cbz	w20, .L2670
-.L2669:
+	bne	.L2676
+	cbz	w20, .L2677
+.L2676:
 	cmp	w0, w20
-	bgt	.L2671
-.L2679:
+	bgt	.L2678
+.L2686:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -16759,33 +16824,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2663:
+.L2670:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2662
+	bne	.L2669
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2662:
+.L2669:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2661
-.L2666:
+	b	.L2668
+.L2673:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2667
-.L2671:
+	b	.L2674
+.L2678:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2672
-	cbnz	w0, .L2672
+	bne	.L2679
+	cbnz	w0, .L2679
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2692:
+.L2699:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -16793,40 +16858,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2675
+	beq	.L2682
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2676
+	bne	.L2683
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2676:
+.L2683:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2675
+	bne	.L2682
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR64]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2675:
+.L2682:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2670:
+.L2677:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2678
-	b	.L2679
-.L2672:
+	bne	.L2685
+	b	.L2686
+.L2679:
 	orr	w0, w22, w20, lsl 24
-	b	.L2692
+	b	.L2699
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -16842,13 +16907,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2694
+	beq	.L2701
 	adrp	x21, .LANCHOR195
 	adrp	x22, .LC0
 	add	x21, x21, :lo12:.LANCHOR195
 	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2702:
+.L2709:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -16856,7 +16921,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2695
+	beq	.L2702
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -16866,7 +16931,7 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2696
+	bne	.L2703
 	adrp	x0, .LANCHOR96
 	ldr	w2, [x29, 76]
 	mov	w1, 1
@@ -16882,21 +16947,21 @@ gc_scan_static_data:
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2696:
+.L2703:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2697
+	beq	.L2704
 	mov	w2, 1369
 	mov	x1, x21
 	mov	x0, x22
 	bl	printf
-.L2697:
+.L2704:
 	mov	x0, x23
 	bl	buf_free
-.L2695:
+.L2702:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	adrp	x2, .LANCHOR54
 	ldr	w2, [x2, #:lo12:.LANCHOR54]
@@ -16904,7 +16969,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2698
+	bcc	.L2705
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -16915,48 +16980,48 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2693:
+.L2700:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2698:
+.L2705:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2693
+	bne	.L2700
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2702
-	b	.L2693
-.L2694:
-	adrp	x1, .LANCHOR101
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	bne	.L2709
+	b	.L2700
+.L2701:
+	adrp	x1, .LANCHOR97
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 40]
 	cmp	w2, 20480
-	bls	.L2704
+	bls	.L2711
 	ldr	w3, [x1, 44]
 	add	w3, w3, w2, lsr 10
 	and	w2, w2, 1023
 	stp	w2, w3, [x1, 40]
-.L2704:
+.L2711:
 	ldr	w2, [x0, 536]
 	ldr	w3, [x0, 12]
 	add	w2, w2, 12959744
 	add	w2, w2, 256
 	cmp	w3, w2
 	ldr	w2, [x1, 44]
-	bhi	.L2705
+	bhi	.L2712
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	add	w1, w1, 1696
 	cmp	w2, w1
-	bls	.L2693
-.L2705:
+	bls	.L2700
+.L2712:
 	str	w3, [x0, 536]
 	str	w2, [x0, 540]
 	str	wzr, [x0, 544]
-	b	.L2693
+	b	.L2700
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -16974,11 +17039,11 @@ ftl_sblk_dump:
 	cmp	w21, w0
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
-	beq	.L2732
+	beq	.L2739
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w21
-	bls	.L2732
+	bls	.L2739
 	uxtw	x0, w21
 	adrp	x25, .LANCHOR3
 	str	x0, [x29, 136]
@@ -16990,10 +17055,10 @@ ftl_sblk_dump:
 	ldrb	w0, [x0, 2]
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L2733
+	bne	.L2740
 	adrp	x0, .LANCHOR67
 	ldrb	w24, [x0, #:lo12:.LANCHOR67]
-.L2713:
+.L2720:
 	add	x28, x29, 224
 	adrp	x19, .LANCHOR80
 	str	x1, [x29, 152]
@@ -17027,14 +17092,14 @@ ftl_sblk_dump:
 	str	x19, [x29, 128]
 	mov	x26, x0
 	stp	wzr, wzr, [x29, 168]
-	adrp	x0, .LANCHOR99
-	add	x0, x0, :lo12:.LANCHOR99
+	adrp	x0, .LANCHOR103
+	add	x0, x0, :lo12:.LANCHOR103
 	str	x0, [x29, 104]
-.L2714:
+.L2721:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w0, w20
-	bls	.L2729
+	bls	.L2736
 	lsl	w0, w20, 1
 	mov	w23, 0
 	sub	w0, w0, #1
@@ -17042,24 +17107,24 @@ ftl_sblk_dump:
 	adrp	x0, .LC129
 	add	x0, x0, :lo12:.LC129
 	str	x0, [x29, 112]
-	b	.L2730
-.L2733:
+	b	.L2737
+.L2740:
 	mov	w24, 1
-	b	.L2713
-.L2726:
+	b	.L2720
+.L2733:
 	ldr	x0, [x29, 120]
 	ldrh	w10, [x28, x0]
 	mov	w0, 65535
 	cmp	w10, w0
-	beq	.L2715
+	beq	.L2722
 	ldr	x0, [x29, 104]
 	cmp	w24, 3
 	ldrh	w19, [x0]
 	mul	w19, w19, w10
-	bne	.L2716
+	bne	.L2723
 	add	w19, w20, w19
 	orr	w19, w19, w22, lsl 24
-.L2717:
+.L2724:
 	str	w19, [x26, 40]
 	mov	w1, 1
 	str	w10, [x29, 100]
@@ -17102,22 +17167,22 @@ ftl_sblk_dump:
 	and	w0, w0, 224
 	cmp	w0, 224
 	ccmp	w0, w1, 4, ne
-	beq	.L2715
+	beq	.L2722
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2720
+	bne	.L2727
 	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
 	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2720:
+.L2727:
 	ldr	w0, [x29, 188]
 	cmp	w19, w0
-	bne	.L2721
+	bne	.L2728
 	ldr	w0, [x29, 172]
 	mov	w1, w19
 	add	w0, w0, 1
@@ -17128,75 +17193,75 @@ ftl_sblk_dump:
 	adrp	x0, .LC183
 	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2721:
+.L2728:
 	ldr	x0, [x29, 152]
-	cbz	x0, .L2723
+	cbz	x0, .L2730
 	ubfiz	x19, x27, 2, 32
 	ldr	w2, [x0, x19]
 	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2724
+	beq	.L2731
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2724
+	tbz	x0, 12, .L2731
 	adrp	x0, .LC184
 	mov	w1, w27
 	add	x0, x0, :lo12:.LC184
 	bl	printf
-.L2724:
+.L2731:
 	ldr	x1, [x26, 24]
 	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
 	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2723
+	beq	.L2730
 	cmn	w0, #1
-	beq	.L2723
+	beq	.L2730
 	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 1175
+	mov	w2, 1193
 	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2723:
+.L2730:
 	add	w27, w27, 1
-.L2715:
+.L2722:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L2728:
+.L2735:
 	cmp	w24, w22
-	bcs	.L2726
+	bcs	.L2733
 	add	w23, w23, 1
 	and	w23, w23, 65535
-.L2730:
+.L2737:
 	ldrb	w0, [x29, 201]
 	cmp	w0, w23
-	bls	.L2727
+	bls	.L2734
 	sxtw	x0, w23
 	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
 	str	x0, [x29, 120]
-	b	.L2728
-.L2716:
+	b	.L2735
+.L2723:
 	cmp	w24, 2
-	bne	.L2718
+	bne	.L2725
 	ldr	w0, [x29, 148]
 	add	w19, w19, w0
 	adrp	x0, .LANCHOR67
 	add	w19, w19, w22
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	orr	w19, w19, w0, lsl 24
-	b	.L2717
-.L2718:
+	b	.L2724
+.L2725:
 	add	w19, w20, w19
-	b	.L2717
-.L2727:
+	b	.L2724
+.L2734:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2714
-.L2729:
+	b	.L2721
+.L2736:
 	mov	x0, x26
 	bl	buf_free
 	adrp	x0, .LANCHOR4
@@ -17209,7 +17274,7 @@ ftl_sblk_dump:
 	add	x0, x0, :lo12:.LC185
 	bl	printf
 	ldr	w0, [x29, 168]
-.L2711:
+.L2718:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -17218,9 +17283,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2732:
+.L2739:
 	mov	w0, 0
-	b	.L2711
+	b	.L2718
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -17240,31 +17305,31 @@ zftl_read:
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2744
+	tbz	x0, 12, .L2751
 	mov	w3, w2
 	adrp	x0, .LC186
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC186
 	mov	w1, w21
 	bl	printf
-.L2744:
-	cbnz	w21, .L2745
+.L2751:
+	cbnz	w21, .L2752
 	adrp	x0, .LANCHOR59
 	mov	w21, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2746:
+.L2753:
 	add	w1, w19, w24
 	cmp	w0, w1
-	bcc	.L2770
-	adrp	x1, .LANCHOR101
-	adrp	x25, .LANCHOR114
+	bcc	.L2777
+	adrp	x1, .LANCHOR97
+	adrp	x25, .LANCHOR117
 	add	w21, w21, w19
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR101]
+	ldr	x2, [x1, #:lo12:.LANCHOR97]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w24
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR114]
+	ldrb	w0, [x25, #:lo12:.LANCHOR117]
 	add	w2, w24, w21
 	stp	w2, wzr, [x29, 136]
 	sub	w2, w2, #1
@@ -17280,10 +17345,10 @@ zftl_read:
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 104]
-.L2748:
-	cbnz	w26, .L2768
+.L2755:
+	cbnz	w26, .L2775
 	ldr	w0, [x29, 140]
-.L2743:
+.L2750:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17291,21 +17356,21 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2745:
+.L2752:
 	cmp	w21, 3
-	bhi	.L2770
+	bhi	.L2777
 	lsl	w21, w21, 13
 	mov	w0, 8192
-	b	.L2746
-.L2768:
-	ldrb	w1, [x25, #:lo12:.LANCHOR114]
+	b	.L2753
+.L2775:
+	ldrb	w1, [x25, #:lo12:.LANCHOR117]
 	cmp	w20, w27
 	ldr	w0, [x29, 132]
 	and	w19, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L2771
+	bne	.L2778
 	cmp	w20, w27
-	bne	.L2750
+	bne	.L2757
 	udiv	w22, w21, w1
 	and	w0, w24, 65535
 	msub	w1, w22, w1, w21
@@ -17314,17 +17379,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w24, w19
 	csel	w19, w0, w19, cc
-.L2749:
+.L2756:
 	adrp	x0, .LANCHOR46
 	add	x1, x0, :lo12:.LANCHOR46
 	add	x1, x1, 2
 	mov	w0, 0
-.L2753:
+.L2760:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L2751
+	bne	.L2758
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2751
+	tbz	x2, 3, .L2758
 	ldr	x1, [x29, 104]
 	ubfiz	x0, x0, 6, 32
 	lsl	w2, w19, 9
@@ -17336,92 +17401,92 @@ zftl_read:
 	add	x23, x23, x19
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2752:
+.L2759:
 	add	w20, w20, 1
 	sub	w26, w26, #1
-	b	.L2748
-.L2750:
+	b	.L2755
+.L2757:
 	ldr	w0, [x29, 136]
 	msub	w19, w1, w20, w0
 	and	w19, w19, 255
-.L2771:
+.L2778:
 	mov	w22, 0
-	b	.L2749
-.L2751:
+	b	.L2756
+.L2758:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2753
+	bne	.L2760
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2754
+	bne	.L2761
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w20
 	bl	pm_log2phys
-.L2754:
+.L2761:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2755
-	add	x22, x25, :lo12:.LANCHOR114
+	bne	.L2762
+	add	x22, x25, :lo12:.LANCHOR117
 	mov	w19, 0
-.L2756:
+.L2763:
 	ldrb	w0, [x22]
 	cmp	w19, w0
-	bcs	.L2752
+	bcs	.L2759
 	madd	w0, w20, w0, w19
 	cmp	w21, w0
-	bhi	.L2757
+	bhi	.L2764
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2757
+	bls	.L2764
 	mov	x0, x23
 	add	x23, x23, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2757:
+.L2764:
 	add	w19, w19, 1
-	b	.L2756
-.L2755:
+	b	.L2763
+.L2762:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2759
+	cbnz	x0, .L2766
 	bl	ftl_read_ahead
-	b	.L2748
-.L2759:
+	b	.L2755
+.L2766:
 	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 40]
 	add	w0, w0, 1
 	str	w0, [x1, 40]
 	ldr	w0, [x29, 156]
 	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR114]
+	ldrb	w0, [x25, #:lo12:.LANCHOR117]
 	cmp	w0, w19
-	bne	.L2761
+	bne	.L2768
 	str	x23, [x28, 16]
-.L2761:
+.L2768:
 	mov	w1, 1
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w10, [x28, 52]
 	cmn	w10, #1
-	bne	.L2762
+	bne	.L2769
 	adrp	x0, .LANCHOR5
 	str	w10, [x29, 140]
 	ldr	x1, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2763:
+.L2770:
 	ldr	x0, [x28, 24]
 	ldr	w5, [x0, 4]
 	cmp	w20, w5
-	beq	.L2764
+	beq	.L2771
 	ldr	w4, [x0]
 	mov	w2, w20
 	ldp	w6, w7, [x0, 8]
@@ -17447,37 +17512,37 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 128]
-.L2764:
+.L2771:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w20, w0
-	bne	.L2765
+	bne	.L2772
 	cmn	w10, #1
-	bne	.L2766
-.L2765:
+	bne	.L2773
+.L2772:
 	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
 	mov	w2, 1030
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2766:
+.L2773:
 	ldr	x0, [x28, 16]
-	cbnz	x0, .L2767
+	cbnz	x0, .L2774
 	ldr	x1, [x28, 8]
 	ubfiz	x22, x22, 9, 16
 	lsl	w2, w19, 9
 	mov	x0, x23
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2767:
+.L2774:
 	ubfiz	x19, x19, 9, 16
 	mov	x0, x28
 	add	x23, x23, x19
 	bl	buf_free
-	b	.L2752
-.L2762:
+	b	.L2759
+.L2769:
 	cmp	w10, 256
-	bne	.L2763
+	bne	.L2770
 	adrp	x0, .LANCHOR96
 	mov	w4, 21
 	mov	w5, 1
@@ -17505,10 +17570,10 @@ zftl_read:
 	mov	w0, w4
 	bl	gc_add_sblk
 	ldr	w10, [x29, 96]
-	b	.L2763
-.L2770:
+	b	.L2770
+.L2777:
 	mov	w0, -1
-	b	.L2743
+	b	.L2750
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -17625,10 +17690,10 @@ vpn_check:
 	mov	w1, 0
 	add	x0, x20, :lo12:check_vpc_tbl
 	bl	ftl_memset
-.L2787:
+.L2794:
 	ldr	w0, [x23]
 	cmp	w22, w0
-	bcc	.L2795
+	bcc	.L2802
 	adrp	x0, .LANCHOR2
 	adrp	x24, .LC193
 	add	x5, x0, :lo12:.LANCHOR2
@@ -17636,20 +17701,20 @@ vpn_check:
 	add	x24, x24, :lo12:.LC193
 	mov	w23, 0
 	mov	w22, 0
-.L2796:
+.L2803:
 	ldrh	w0, [x5]
 	cmp	w0, w22
-	bhi	.L2798
+	bhi	.L2805
 	adrp	x24, .LANCHOR198
 	adrp	x25, .LC0
 	add	x22, x28, :lo12:.LANCHOR2
 	add	x24, x24, :lo12:.LANCHOR198
 	add	x25, x25, :lo12:.LC0
 	mov	w21, 0
-.L2799:
+.L2806:
 	ldrh	w0, [x22]
 	cmp	w0, w21
-	bhi	.L2805
+	bhi	.L2812
 	mov	w2, w23
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC195
@@ -17663,20 +17728,20 @@ vpn_check:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2795:
+.L2802:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 124]
 	cmn	w0, #1
-	bne	.L2788
+	bne	.L2795
 	mov	w2, 0
 	add	x1, x29, 124
 	mov	w0, w22
 	bl	pm_log2phys
-.L2789:
+.L2796:
 	ldr	w2, [x29, 124]
 	cmn	w2, #1
-	beq	.L2791
+	beq	.L2798
 	adrp	x0, .LANCHOR96
 	mov	w3, 21
 	ldrh	w0, [x0, #:lo12:.LANCHOR96]
@@ -17693,26 +17758,26 @@ vpn_check:
 	and	w26, w3, 65535
 	and	w3, w3, 65535
 	cmp	w0, w26
-	bls	.L2792
+	bls	.L2799
 	add	x0, x20, :lo12:check_vpc_tbl
 	sxtw	x3, w3
 	ldrh	w1, [x0, x3, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x0, x3, lsl 1]
-.L2793:
+.L2800:
 	ldrh	w0, [x25]
 	cmp	w0, w26
-	bhi	.L2791
+	bhi	.L2798
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	mov	w2, 1266
 	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2791:
+.L2798:
 	add	w22, w22, 1
-	b	.L2787
-.L2788:
+	b	.L2794
+.L2795:
 	adrp	x1, .LANCHOR96
 	ldrh	w3, [x1, #:lo12:.LANCHOR96]
 	mov	w1, 21
@@ -17727,30 +17792,30 @@ vpn_check:
 	udiv	w0, w0, w1
 	ldrh	w1, [x24, #:lo12:.LANCHOR2]
 	cmp	w1, w0, uxth
-	bhi	.L2789
+	bhi	.L2796
 	mov	w2, 1256
 	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2789
-.L2792:
+	b	.L2796
+.L2799:
 	mov	w1, w22
 	adrp	x0, .LC191
 	add	x0, x0, :lo12:.LC191
 	bl	printf
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR114]
-	adrp	x0, .LANCHOR120+8
-	ldr	x1, [x0, #:lo12:.LANCHOR120+8]
+	ldrb	w3, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR123+8
+	ldr	x1, [x0, #:lo12:.LANCHOR123+8]
 	adrp	x0, .LC192
 	lsl	w3, w3, 7
 	add	x0, x0, :lo12:.LC192
 	bl	rknand_print_hex
-	b	.L2793
-.L2798:
+	b	.L2800
+.L2805:
 	uxtw	x0, w22
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	lsl	x27, x0, 1
@@ -17759,7 +17824,7 @@ vpn_check:
 	ldrh	w3, [x1, x27]
 	ldrh	w2, [x25, x26, lsl 1]
 	cmp	w3, w2
-	beq	.L2797
+	beq	.L2804
 	adrp	x1, .LANCHOR3
 	str	x5, [x29, 104]
 	ldr	x1, [x1, #:lo12:.LANCHOR3]
@@ -17774,62 +17839,62 @@ vpn_check:
 	ldr	x5, [x29, 104]
 	ldrh	w0, [x0, x27]
 	cmp	w0, w1
-	beq	.L2797
+	beq	.L2804
 	ldrh	w1, [x25, x26, lsl 1]
 	cmp	w1, w0
-	bls	.L2797
+	bls	.L2804
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w22
-	beq	.L2797
+	beq	.L2804
 	ldrh	w1, [x0, 80]
 	cmp	w1, w22
-	beq	.L2797
+	beq	.L2804
 	ldrh	w0, [x0, 48]
 	cmp	w0, w22
 	csinc	w23, w23, wzr, eq
-.L2797:
+.L2804:
 	add	w0, w22, 1
 	and	w22, w0, 65535
-	b	.L2796
-.L2805:
+	b	.L2803
+.L2812:
 	adrp	x0, .LANCHOR3
 	uxtw	x26, w21
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x26, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2801
+	bne	.L2808
 	add	x0, x20, :lo12:check_vpc_tbl
 	sxtw	x27, w21
 	ldrh	w0, [x0, x27, lsl 1]
-	cbnz	w0, .L2802
+	cbnz	w0, .L2809
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	lsl	x28, x26, 1
 	ldrh	w0, [x0, x28]
-	cbz	w0, .L2803
+	cbz	w0, .L2810
 	adrp	x0, .LC194
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2803:
+.L2810:
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x28]
-.L2802:
+.L2809:
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26, lsl 1]
-	cbz	w0, .L2801
+	cbz	w0, .L2808
 	add	x0, x20, :lo12:check_vpc_tbl
 	ldrh	w0, [x0, x27, lsl 1]
-	cbz	w0, .L2801
+	cbz	w0, .L2808
 	mov	w2, 1298
 	mov	x1, x24
 	mov	x0, x25
 	bl	printf
-.L2801:
+.L2808:
 	add	w21, w21, 1
 	and	w21, w21, 65535
-	b	.L2799
+	b	.L2806
 	.size	vpn_check, .-vpn_check
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -17846,21 +17911,21 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2817
+	bne	.L2824
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 897
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2817:
+.L2824:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	cmp	w1, w0
-	beq	.L2839
+	beq	.L2846
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2819
+	tbz	x0, 8, .L2826
 	adrp	x2, .LANCHOR4
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
@@ -17868,20 +17933,20 @@ gc_scan_src_blk:
 	adrp	x0, .LC196
 	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2819:
+.L2826:
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	add	x14, x19, :lo12:.LANCHOR63
 	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
 	strb	w1, [x14, 5]
-	cbnz	w1, .L2820
+	cbnz	w1, .L2827
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L2839:
+.L2846:
 	mov	w0, 0
-	b	.L2816
-.L2820:
+	b	.L2823
+.L2827:
 	adrp	x4, .LANCHOR3
 	ldrh	w3, [x19, #:lo12:.LANCHOR63]
 	mov	x22, x4
@@ -17891,64 +17956,64 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2821
+	beq	.L2828
 	cmp	w1, 224
-	beq	.L2821
-	cbz	w1, .L2822
+	beq	.L2828
+	cbz	w1, .L2829
 	adrp	x1, .LANCHOR5
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	beq	.L2821
+	beq	.L2828
 	ldrh	w3, [x1, 48]
 	cmp	w3, w2
-	beq	.L2821
+	beq	.L2828
 	ldrh	w1, [x1, 80]
 	cmp	w1, w2
-	bne	.L2853
-.L2821:
+	bne	.L2860
+.L2828:
 	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L2839
-.L2822:
+	b	.L2846
+.L2829:
 	adrp	x0, .LANCHOR4
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR4]
 	ldrh	w1, [x1, x3, lsl 1]
-	cbz	w1, .L2824
+	cbz	w1, .L2831
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 917
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2824:
+.L2831:
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldr	x0, [x20, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
-	b	.L2821
-.L2853:
+	b	.L2828
+.L2860:
 	and	w0, w0, 255
 	sub	w0, w0, #1
 	add	x0, x14, x0, sxtw 1
 	ldrh	w21, [x0, 40]
 	mov	w0, 65535
 	cmp	w21, w0
-	bne	.L2825
+	bne	.L2832
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 925
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2825:
-	adrp	x1, .LANCHOR99
+.L2832:
+	adrp	x1, .LANCHOR103
 	ldr	x3, [x22, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR80
 	adrp	x23, .LANCHOR71
-	ldrh	w20, [x1, #:lo12:.LANCHOR99]
+	ldrh	w20, [x1, #:lo12:.LANCHOR103]
 	mov	x24, x2
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldrh	w0, [x2, #:lo12:.LANCHOR80]
@@ -17959,14 +18024,14 @@ gc_scan_src_blk:
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 160
-	bne	.L2840
+	bne	.L2847
 	adrp	x1, .LANCHOR67
 	ldrb	w21, [x1, #:lo12:.LANCHOR67]
 	cmp	w21, 2
 	orr	w20, w20, w21, lsl 24
-	beq	.L2827
+	beq	.L2834
 	and	w21, w21, 65535
-.L2826:
+.L2833:
 	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
@@ -17992,48 +18057,48 @@ gc_scan_src_blk:
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2828
-.L2830:
+	bne	.L2835
+.L2837:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-.L2816:
+.L2823:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2827:
+.L2834:
 	ldrh	w0, [x23, #:lo12:.LANCHOR71]
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	b	.L2826
-.L2840:
+	b	.L2833
+.L2847:
 	mov	w21, 1
-	b	.L2826
-.L2828:
+	b	.L2833
+.L2835:
 	ldr	x0, [x25, 24]
 	mov	w22, 15555
 	movk	w22, 0xf55f, lsl 16
 	ldr	w0, [x0]
 	cmp	w0, w22
-	beq	.L2829
+	beq	.L2836
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	mov	x1, 0
 	bl	ftl_sblk_dump
 	ldr	x0, [x25, 24]
 	ldr	w0, [x0]
 	cmp	w0, w22
-	beq	.L2830
+	beq	.L2837
 	mov	w2, 955
 	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L2830
-.L2829:
+	b	.L2837
+.L2836:
 	ldrb	w0, [x23, #:lo12:.LANCHOR72]
 	adrp	x22, .LANCHOR96
 	ldrh	w1, [x24, #:lo12:.LANCHOR80]
@@ -18045,9 +18110,9 @@ gc_scan_src_blk:
 	mul	w0, w0, w1
 	mul	w21, w21, w0
 	and	w21, w21, 65535
-.L2831:
+.L2838:
 	cmp	w21, w26
-	bgt	.L2836
+	bgt	.L2843
 	mov	x0, x25
 	bl	buf_free
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
@@ -18058,20 +18123,20 @@ gc_scan_src_blk:
 	ldrh	w2, [x3, x2]
 	ldrh	w3, [x0, 24]
 	cmp	w2, w3
-	beq	.L2837
+	beq	.L2844
 	adrp	x0, .LC197
 	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2837:
+.L2844:
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	bcs	.L2838
+	bcs	.L2845
 	bl	vpn_check
-.L2838:
+.L2845:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
@@ -18079,20 +18144,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2816
-.L2836:
+	b	.L2823
+.L2843:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2833
+	beq	.L2840
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2834
+	bne	.L2841
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2834:
+.L2841:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -18107,16 +18172,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L2833
+	bne	.L2840
 	ldrh	w0, [x1, 24]
 	ldr	x4, [x20, #:lo12:.LANCHOR64]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2833:
+.L2840:
 	add	x26, x26, 1
-	b	.L2831
+	b	.L2838
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -18144,10 +18209,10 @@ ftl_scan_all_data:
 	bl	printf
 	add	x0, x24, :lo12:.LC200
 	str	x0, [x29, 120]
-.L2856:
+.L2863:
 	ldr	w0, [x23, #:lo12:.LANCHOR54]
 	cmp	w20, w0
-	bcc	.L2869
+	bcc	.L2876
 	mov	x0, x19
 	bl	buf_free
 	ldp	x29, x30, [sp, 16]
@@ -18158,35 +18223,35 @@ ftl_scan_all_data:
 	ldp	x27, x28, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2869:
+.L2876:
 	mov	w0, -1
 	str	w0, [x19, 36]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2857
+	bne	.L2864
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2857:
+.L2864:
 	tst	x20, 4095
-	bne	.L2858
+	bne	.L2865
 	ldr	w2, [x29, 140]
 	adrp	x0, .LC199
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2858:
+.L2865:
 	ldr	w0, [x29, 140]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2859
-.L2861:
+	bne	.L2866
+.L2868:
 	add	w20, w20, 1
-	b	.L2856
-.L2859:
+	b	.L2863
+.L2866:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
@@ -18194,16 +18259,16 @@ ftl_scan_all_data:
 	ldr	x0, [x19, 24]
 	cmp	w3, 256
 	ccmn	w3, #1, 4, ne
-	beq	.L2860
+	beq	.L2867
 	ldr	w1, [x0, 4]
 	cmp	w20, w1
-	beq	.L2861
-.L2860:
+	beq	.L2868
+.L2867:
 	ldr	x1, [x19, 8]
 	add	x27, x24, :lo12:.LC200
-	adrp	x25, .LANCHOR114
+	adrp	x25, .LANCHOR117
 	adrp	x26, .LC201
-	adrp	x22, .LANCHOR120
+	adrp	x22, .LANCHOR123
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 8]
 	ldr	w1, [x1]
@@ -18217,12 +18282,12 @@ ftl_scan_all_data:
 	ldr	x1, [x19, 24]
 	ldr	w0, [x1, 8]
 	cmn	w0, #1
-	bne	.L2862
-.L2864:
-	ldrb	w21, [x25, #:lo12:.LANCHOR114]
+	bne	.L2869
+.L2871:
+	ldrb	w21, [x25, #:lo12:.LANCHOR117]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR120
+	add	x22, x22, :lo12:.LANCHOR123
 	mov	w4, w0
 	add	x0, x26, :lo12:.LC201
 	lsl	w27, w21, 7
@@ -18243,26 +18308,26 @@ ftl_scan_all_data:
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2863:
+.L2870:
 	ldr	x1, [x21]
-	cbz	x1, .L2868
+	cbz	x1, .L2875
 	ldrh	w0, [x21, -8]
 	cmp	w0, w25
-	bne	.L2868
+	bne	.L2875
 	mov	w3, 4096
 	mov	w2, 4
 	mov	x0, x26
 	bl	rknand_print_hex
-.L2868:
+.L2875:
 	add	x21, x21, 16
 	cmp	x22, x21
-	bne	.L2863
-	b	.L2861
-.L2862:
+	bne	.L2870
+	b	.L2868
+.L2869:
 	ldr	w21, [x1, 4]
 	ldr	w1, [x28]
 	cmp	w21, w1
-	bcs	.L2864
+	bcs	.L2871
 	str	w0, [x19, 40]
 	mov	w1, 1
 	mov	x0, x19
@@ -18284,12 +18349,12 @@ ftl_scan_all_data:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2865
+	bne	.L2872
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w21
 	bl	pm_log2phys
-.L2865:
+.L2872:
 	ldr	w0, [x29, 140]
 	mov	w1, 1
 	str	w0, [x19, 40]
@@ -18308,7 +18373,7 @@ ftl_scan_all_data:
 	ldr	w3, [x19, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR114]
+	ldrb	w3, [x25, #:lo12:.LANCHOR117]
 	mov	w0, w21
 	str	w3, [x29, 104]
 	lsl	w2, w3, 7
@@ -18331,28 +18396,28 @@ ftl_scan_all_data:
 	mov	w2, 0
 	add	x1, x29, 140
 	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR120
+	add	x0, x22, :lo12:.LANCHOR123
 	adrp	x5, .LC202
 	add	x21, x0, 8
 	add	x4, x0, 520
 	add	x5, x5, :lo12:.LC202
-.L2867:
+.L2874:
 	ldr	x1, [x21]
-	cbz	x1, .L2866
+	cbz	x1, .L2873
 	ldrh	w0, [x21, -8]
 	cmp	w0, w27
-	bne	.L2866
+	bne	.L2873
 	mov	x0, x5
 	stp	x4, x5, [x29, 104]
 	mov	w3, 4096
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldp	x4, x5, [x29, 104]
-.L2866:
+.L2873:
 	add	x21, x21, 16
 	cmp	x4, x21
-	bne	.L2867
-	b	.L2864
+	bne	.L2874
+	b	.L2871
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -18363,42 +18428,42 @@ ftl_update_l2p_map:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x0, .LANCHOR80
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR106
+	adrp	x0, .LANCHOR80
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldrh	w23, [x0, #:lo12:.LANCHOR80]
 	ldrb	w0, [x22, 9]
 	ldrh	w19, [x22, 12]
-	str	x24, [x29, 104]
 	mul	w23, w23, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR106]
-	add	x19, x0, x19, lsl 2
-	add	x0, x19, x23, sxtw 2
-	ldr	w0, [x0, -4]
-	cmn	w0, #1
-	beq	.L2880
+	adrp	x0, .LANCHOR109
+	str	x0, [x29, 104]
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
+	add	x19, x1, x19, lsl 2
+	add	x1, x19, x23, sxtw 2
+	ldr	w1, [x1, -4]
+	cmn	w1, #1
+	beq	.L2887
 	adrp	x1, .LANCHOR200
 	adrp	x0, .LC0
-	mov	w2, 1450
+	mov	w2, 1468
 	add	x1, x1, :lo12:.LANCHOR200
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2880:
-	adrp	x27, .LANCHOR114
-	mov	x28, 0
-	add	x0, x27, :lo12:.LANCHOR114
+.L2887:
+	adrp	x27, .LANCHOR117
+	mov	x24, 0
+	add	x0, x27, :lo12:.LANCHOR117
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L2881:
-	cmp	w28, w23
-	blt	.L2888
+.L2888:
+	cmp	w24, w23
+	blt	.L2894
 	adrp	x0, .LANCHOR7
 	adrp	x19, .LANCHOR4
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L2889
+	tbz	x0, 12, .L2895
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
@@ -18407,7 +18472,7 @@ ftl_update_l2p_map:
 	mov	w2, w21
 	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2889:
+.L2895:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldp	x23, x24, [sp, 48]
@@ -18418,75 +18483,73 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2888:
-	ldr	w2, [x19, x28, lsl 2]
+.L2894:
+	ldr	w2, [x19, x24, lsl 2]
 	cmn	w2, #1
-	beq	.L2882
-	ldrb	w20, [x27, #:lo12:.LANCHOR114]
+	beq	.L2889
+	ldrb	w20, [x27, #:lo12:.LANCHOR117]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2883
+	tbz	x0, 12, .L2890
 	adrp	x0, .LC204
-	mov	w3, w28
+	mov	w3, w24
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L2883:
-	adrp	x25, .LANCHOR99
+.L2890:
+	adrp	x25, .LANCHOR103
 	adrp	x26, .LC205
-	mov	x24, x28
-	add	x25, x25, :lo12:.LANCHOR99
+	mov	x28, x24
+	add	x25, x25, :lo12:.LANCHOR103
 	add	x26, x26, :lo12:.LC205
-.L2887:
-	ldr	w1, [x19, x24, lsl 2]
+.L2893:
+	ldr	w1, [x19, x28, lsl 2]
 	cmn	w1, #1
-	beq	.L2884
+	beq	.L2891
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2884
+	bne	.L2891
 	ldrb	w0, [x22, 9]
-	sdiv	w1, w24, w0
-	msub	w0, w1, w0, w24
+	sdiv	w1, w28, w0
+	msub	w0, w1, w0, w28
 	add	x0, x22, x0, sxtw 1
 	ldrh	w2, [x0, 16]
 	ldrh	w0, [x25]
 	madd	w2, w2, w0, w1
 	mov	x0, x26
 	str	w2, [x29, 124]
-	ldr	w1, [x19, x24, lsl 2]
+	ldr	w1, [x19, x28, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2885
+	cbz	w0, .L2892
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	ldr	x1, [x0, #:lo12:.LANCHOR109]
 	adrp	x0, .LC206
 	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
-.L2886:
-	b	.L2886
-.L2885:
-	ldr	w0, [x19, x24, lsl 2]
+.L2892:
+	ldr	w0, [x19, x28, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
 	add	x1, x29, 124
 	and	w21, w21, 65535
 	bl	pm_log2phys
 	mov	w0, -1
-	str	w0, [x19, x24, lsl 2]
-.L2884:
-	add	x24, x24, 1
-	cmp	w23, w24
-	bgt	.L2887
-.L2882:
+	str	w0, [x19, x28, lsl 2]
+.L2891:
 	add	x28, x28, 1
-	b	.L2881
+	cmp	w23, w28
+	bgt	.L2893
+.L2889:
+	add	x24, x24, 1
+	b	.L2888
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -18502,9 +18565,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2908
+	beq	.L2917
 	bl	zftl_insert_data_list
-.L2908:
+.L2917:
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
@@ -18536,10 +18599,10 @@ ftl_write_commit:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-.L2913:
+.L2922:
 	adrp	x3, .LANCHOR53
 	ldrb	w1, [x3, #:lo12:.LANCHOR53]
-	cbz	w1, .L2915
+	cbz	w1, .L2924
 	adrp	x4, .LANCHOR52
 	adrp	x2, .LANCHOR46
 	add	x2, x2, :lo12:.LANCHOR46
@@ -18558,11 +18621,11 @@ ftl_write_commit:
 	ldr	w22, [x0, 36]
 	strb	w5, [x4, #:lo12:.LANCHOR52]
 	cmp	w22, w1
-	bcc	.L2917
+	bcc	.L2926
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2912:
+.L2921:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -18570,25 +18633,25 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2917:
+.L2926:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x24, [x0, 8]
 	ldr	x28, [x0, 24]
-	adrp	x0, .LANCHOR112
+	adrp	x0, .LANCHOR115
 	str	x0, [x29, 112]
-	ldrb	w1, [x0, #:lo12:.LANCHOR112]
-	cbz	w1, .L2919
-	adrp	x0, .LANCHOR160
-	ldrb	w1, [x0, #:lo12:.LANCHOR160]
+	ldrb	w1, [x0, #:lo12:.LANCHOR115]
+	cbz	w1, .L2928
+	adrp	x0, .LANCHOR163
+	ldrb	w1, [x0, #:lo12:.LANCHOR163]
 	add	x1, x2, x1, lsl 6
-.L2920:
+.L2929:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2921
+	bne	.L2930
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2919
+	bne	.L2928
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -18597,33 +18660,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2913
-.L2921:
+	b	.L2922
+.L2930:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x26, x1
-	b	.L2920
-.L2919:
+	b	.L2929
+.L2928:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2923
+	bne	.L2932
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2923:
+.L2932:
 	adrp	x25, .LANCHOR5
 	add	x1, x26, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2926:
+.L2935:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2924
+	bne	.L2933
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2924
+	tbz	x2, 3, .L2933
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x26, x0
@@ -18631,50 +18694,50 @@ ftl_write_commit:
 	ldr	x23, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2925:
-	adrp	x0, .LANCHOR114
+.L2934:
+	adrp	x0, .LANCHOR117
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
 	cmp	w20, w1
-	bcs	.L2950
+	bcs	.L2959
 	add	w20, w21, w20
-	cbz	x23, .L2928
-	cbz	w21, .L2929
+	cbz	x23, .L2937
+	cbz	w21, .L2938
 	lsl	w2, w21, 9
 	mov	x1, x23
 	mov	x0, x24
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2929:
+.L2938:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	cmp	w20, w2
-	bcc	.L2930
+	bcc	.L2939
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2950:
+.L2959:
 	mov	w23, 0
-	b	.L2927
-.L2924:
+	b	.L2936
+.L2933:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2926
+	bne	.L2935
 	mov	x23, 0
-	b	.L2925
-.L2930:
+	b	.L2934
+.L2939:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x23, x0
 	lsl	w2, w2, 9
 	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2950
-.L2928:
+	b	.L2959
+.L2937:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2931
+	beq	.L2940
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -18687,11 +18750,11 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w23, w23, 1
 	cmp	w22, w0
-	bne	.L2932
+	bne	.L2941
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2933
-.L2932:
+	bne	.L2942
+.L2941:
 	ldrb	w1, [x27, 1]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
@@ -18720,43 +18783,43 @@ ftl_write_commit:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2933:
+.L2942:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2934
+	bne	.L2943
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2935
-.L2934:
+	bne	.L2944
+.L2943:
 	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
 	mov	w2, 544
 	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2935:
-	cbz	w21, .L2936
+.L2944:
+	cbz	w21, .L2945
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2937
+	beq	.L2946
 	ldr	x1, [x27, 8]
 	mov	x0, x24
 	bl	ftl_memcpy
-.L2938:
+.L2947:
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2936:
+.L2945:
 	ldr	x0, [x29, 96]
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	cmp	w20, w2
-	bcc	.L2939
-	bls	.L2940
+	bcc	.L2948
+	bls	.L2949
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2940:
-	cbz	x27, .L2927
+.L2949:
+	cbz	x27, .L2936
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -18766,17 +18829,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2927:
+.L2936:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2942
+	cbnz	w0, .L2951
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2942:
+.L2951:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 104]
-	adrp	x20, .LANCHOR160
+	adrp	x20, .LANCHOR163
 	lsl	x2, x1, 6
 	add	x1, x26, x2
 	ldr	w3, [x1, 32]
@@ -18797,94 +18860,94 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR160
+	add	x0, x20, :lo12:.LANCHOR163
 	bl	buf_add_tail
 	ldr	x0, [x29, 112]
-	ldrb	w2, [x0, #:lo12:.LANCHOR112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR115]
 	add	w2, w2, 1
 	and	w2, w2, 255
-	strb	w2, [x0, #:lo12:.LANCHOR112]
+	strb	w2, [x0, #:lo12:.LANCHOR115]
 	adrp	x0, .LANCHOR202
 	cmp	w2, 2
 	str	wzr, [x0, #:lo12:.LANCHOR202]
 	ldrh	w0, [x19, 6]
-	bhi	.L2943
+	bhi	.L2952
 	cmp	w0, 1
-	bne	.L2916
-.L2943:
+	bne	.L2925
+.L2952:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR160]
+	ldrb	w0, [x20, #:lo12:.LANCHOR163]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L2947:
+.L2956:
 	cmp	w1, w4
-	bne	.L2948
-	strb	w3, [x20, #:lo12:.LANCHOR160]
+	bne	.L2957
+	strb	w3, [x20, #:lo12:.LANCHOR163]
 	and	w1, w1, 255
 	ldr	x3, [x29, 112]
 	sub	w2, w2, w1
 	ubfiz	x0, x0, 6, 8
 	add	x0, x26, x0
-	strb	w2, [x3, #:lo12:.LANCHOR112]
+	strb	w2, [x3, #:lo12:.LANCHOR115]
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2916
+	bne	.L2925
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2916:
+.L2925:
 	adrp	x0, .LANCHOR53
 	ldrb	w0, [x0, #:lo12:.LANCHOR53]
-	cbnz	w0, .L2913
-.L2915:
+	cbnz	w0, .L2922
+.L2924:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2912
-.L2939:
+	b	.L2921
+.L2948:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
 	cmn	w0, #1
 	ubfiz	x0, x20, 7, 9
-	beq	.L2941
+	beq	.L2950
 	ldr	x1, [x27, 8]
 	lsl	x0, x0, 2
 	add	x1, x1, x0
 	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2940
-.L2941:
+	b	.L2949
+.L2950:
 	mov	w1, 0
 	add	x0, x24, x0, lsl 2
 	bl	ftl_memset
-	b	.L2940
-.L2948:
+	b	.L2949
+.L2957:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x26, x3]
-	b	.L2947
-.L2949:
+	b	.L2956
+.L2958:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w23, 0
-.L2937:
+.L2946:
 	mov	w1, 0
 	mov	x0, x24
 	bl	ftl_memset
-	b	.L2938
-.L2931:
-	cbnz	w21, .L2949
+	b	.L2947
+.L2940:
+	cbnz	w21, .L2958
 	mov	w23, 0
 	mov	x27, 0
-	b	.L2936
+	b	.L2945
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -18901,10 +18964,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2973
+	cbnz	w0, .L2982
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L2972
+	cbz	x0, .L2981
 	adrp	x20, .LANCHOR63
 	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
@@ -18920,7 +18983,7 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2975
+	bne	.L2984
 	adrp	x0, .LANCHOR96
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
@@ -18935,48 +18998,48 @@ gc_do_copy_back:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2975:
+.L2984:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2976
+	bne	.L2985
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 573
 	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2976:
+.L2985:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L2977
+	bne	.L2986
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L2977:
+.L2986:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L2978
+	bne	.L2987
 	adrp	x0, .LANCHOR46
 	add	x0, x0, :lo12:.LANCHOR46
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L2981:
+.L2990:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2979
+	bne	.L2988
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L2979
+	tbz	x2, 1, .L2988
 	mov	x0, x19
 	bl	buf_free
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2972
+	tbz	x0, 8, .L2981
 	add	x20, x20, :lo12:.LANCHOR63
 	adrp	x0, .LC209
 	mov	w2, w22
@@ -18984,7 +19047,7 @@ gc_do_copy_back:
 	add	x0, x0, :lo12:.LC209
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L2972:
+.L2981:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -18993,14 +19056,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L2979:
+.L2988:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L2981
-	adrp	x0, .LANCHOR114
+	bne	.L2990
+	adrp	x0, .LANCHOR117
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR114]
+	ldrb	w0, [x0, #:lo12:.LANCHOR117]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -19011,7 +19074,7 @@ gc_do_copy_back:
 	str	w0, [x19, 32]
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2982
+	tbz	x0, 8, .L2991
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR63
@@ -19023,24 +19086,24 @@ gc_do_copy_back:
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L2982:
+.L2991:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR101
-	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR97
+	ldr	x1, [x0, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L2972
-.L2978:
+	b	.L2981
+.L2987:
 	adrp	x0, .LANCHOR7
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L2983
+	tbz	x0, 8, .L2992
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
@@ -19052,11 +19115,11 @@ gc_do_copy_back:
 	mov	w1, w21
 	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2983:
+.L2992:
 	mov	x0, x19
 	bl	buf_free
-	b	.L2972
-.L2973:
+	b	.L2981
+.L2982:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR67
 	stp	x0, x1, [x29, 128]
@@ -19065,10 +19128,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR67]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L2984
+	bne	.L2993
 	adrp	x0, .LANCHOR69
 	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2985
+	cbz	w0, .L2994
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -19077,7 +19140,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L2986:
+.L2995:
 	adrp	x1, .LANCHOR71
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR63
@@ -19086,16 +19149,16 @@ gc_do_copy_back:
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR137
-	ldr	x7, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR140
+	ldr	x7, [x0, #:lo12:.LANCHOR140]
 	sub	w3, w3, #1
-.L2989:
+.L2998:
 	cmp	w2, w8
-	blt	.L2991
-.L3018:
+	blt	.L3000
+.L3027:
 	mov	w23, 1
-	b	.L2987
-.L2985:
+	b	.L2996
+.L2994:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
@@ -19111,17 +19174,17 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L2986
-.L2987:
+	beq	.L2995
+.L2996:
 	adrp	x0, .LANCHOR7
 	str	x0, [x29, 112]
 	ldr	w1, [x0, #:lo12:.LANCHOR7]
-	tbz	x1, 8, .L2992
-	adrp	x0, .LANCHOR137
+	tbz	x1, 8, .L3001
+	adrp	x0, .LANCHOR140
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR137]
+	ldr	x2, [x0, #:lo12:.LANCHOR140]
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
 	adrp	x0, .LC211
@@ -19130,12 +19193,12 @@ gc_do_copy_back:
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L2992:
+.L3001:
 	adrp	x0, .LANCHOR46
 	str	wzr, [x29, 152]
 	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 120]
-.L2993:
+.L3002:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -19143,27 +19206,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L3005
+	blt	.L3014
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L3006
+	beq	.L3015
 	sub	w3, w1, #1
 	mov	w2, 0
-.L3007:
+.L3016:
 	cmp	w2, w3
-	blt	.L3013
+	blt	.L3022
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L3012
-.L2984:
-	adrp	x0, .LANCHOR98
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L2988
+	b	.L3021
+.L2993:
+	adrp	x0, .LANCHOR102
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbnz	w0, .L2997
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -19171,8 +19234,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2986
-.L2988:
+	b	.L2995
+.L2997:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -19180,28 +19243,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2986
-.L2991:
+	b	.L2995
+.L3000:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L3018
+	beq	.L3027
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L2990
+	bne	.L2999
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L2972
+	bcs	.L2981
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L2990:
+.L2999:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L2989
-.L3005:
+	b	.L2998
+.L3014:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -19210,11 +19273,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L2994
+	bne	.L3003
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2995
+	cbnz	x0, .L3004
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -19222,12 +19285,12 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2972
-.L2995:
+	cbz	x0, .L2981
+.L3004:
 	adrp	x0, .LANCHOR68
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR71
-	adrp	x6, .LANCHOR137
+	adrp	x6, .LANCHOR140
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	strb	w1, [x0, x27]
 	add	x1, x24, :lo12:.LANCHOR63
@@ -19243,11 +19306,11 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L2996
-	adrp	x0, .LANCHOR136
+	bne	.L3005
+	adrp	x0, .LANCHOR139
 	adrp	x4, .LANCHOR72
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR136]
+	ldr	x1, [x0, #:lo12:.LANCHOR139]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
@@ -19262,13 +19325,13 @@ gc_do_copy_back:
 	ldrh	w0, [x5, #:lo12:.LANCHOR71]
 	ldrb	w1, [x4, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR137]
+	ldr	x1, [x6, #:lo12:.LANCHOR140]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x0, #:lo12:.LANCHOR117]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -19289,7 +19352,7 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L2994:
+.L3003:
 	adrp	x0, .LANCHOR68
 	ldr	w5, [x29, 156]
 	add	x3, x29, 160
@@ -19302,16 +19365,16 @@ gc_do_copy_back:
 	add	x2, x2, x1, lsl 6
 	str	x0, [x3, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR138
+	adrp	x5, .LANCHOR141
 	strh	w0, [x2, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x2, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L3000
+	bne	.L3009
 	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR99
-	ldrh	w6, [x6, #:lo12:.LANCHOR99]
+	adrp	x6, .LANCHOR103
+	ldrh	w6, [x6, #:lo12:.LANCHOR103]
 	add	w3, w0, w19
 	add	w0, w0, w0, lsl 1
 	add	x3, x22, x3, sxtw 1
@@ -19323,13 +19386,13 @@ gc_do_copy_back:
 	ldrh	w6, [x2, 48]
 	orr	w3, w3, w21
 	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR138]
+	ldr	x2, [x5, #:lo12:.LANCHOR141]
 	orr	w0, w3, w0, lsl 24
 	str	w0, [x2, x6, lsl 2]
-.L3001:
+.L3010:
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3004
+	tbz	x0, 8, .L3013
 	ldr	x0, [x29, 120]
 	mov	w2, w23
 	ldrb	w4, [x4, x27]
@@ -19350,15 +19413,15 @@ gc_do_copy_back:
 	ldr	w5, [x1, 40]
 	ldr	w1, [x29, 156]
 	bl	printf
-.L3004:
+.L3013:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L2993
-.L2996:
+	b	.L3002
+.L3005:
 	lsl	x0, x27, 2
 	str	x0, [x29, 144]
-	ldr	x0, [x6, #:lo12:.LANCHOR137]
+	ldr	x0, [x6, #:lo12:.LANCHOR140]
 	lsl	x1, x27, 2
 	ldr	w0, [x0, x1]
 	mov	w1, 1
@@ -19368,7 +19431,7 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2998
+	bne	.L3007
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x28, 40]
 	ldrh	w4, [x0, #:lo12:.LANCHOR96]
@@ -19387,99 +19450,99 @@ gc_do_copy_back:
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2998
+	bne	.L3007
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L2998
+	bne	.L3007
 	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 688
 	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2998:
+.L3007:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR54
 	ldr	w1, [x1, #:lo12:.LANCHOR54]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L2999
+	bcc	.L3008
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L2999:
-	adrp	x1, .LANCHOR136
+.L3008:
+	adrp	x1, .LANCHOR139
 	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	ldr	x1, [x1, #:lo12:.LANCHOR139]
 	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L2994
-.L3000:
+	b	.L3003
+.L3009:
 	cmp	w0, 2
-	bne	.L3002
-	adrp	x0, .LANCHOR98
-	adrp	x3, .LANCHOR99
-	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L3003
+	bne	.L3011
+	adrp	x0, .LANCHOR102
+	adrp	x3, .LANCHOR103
+	ldrb	w0, [x0, #:lo12:.LANCHOR102]
+	cbnz	w0, .L3012
 	ldr	w0, [x29, 156]
-	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	ldrh	w3, [x3, #:lo12:.LANCHOR103]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w3, w21
-.L3064:
+.L3073:
 	orr	w0, w0, 33554432
 	str	w0, [x2, 40]
-.L3002:
+.L3011:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x1, lsl 6
 	ldrh	w2, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR138]
+	ldr	x0, [x5, #:lo12:.LANCHOR141]
 	str	w3, [x0, x2, lsl 2]
-	b	.L3001
-.L3003:
+	b	.L3010
+.L3012:
 	add	w0, w19, w26, lsr 1
-	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	ldrh	w3, [x3, #:lo12:.LANCHOR103]
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w3, w21
 	and	w3, w26, 1
 	add	w0, w0, w3
-	b	.L3064
-.L3006:
+	b	.L3073
+.L3015:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x1, #:lo12:.LANCHOR69]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L3008
-.L3011:
+	cbz	w3, .L3017
+.L3020:
 	strb	wzr, [x1, 60]
-	b	.L3009
-.L3008:
+	b	.L3018
+.L3017:
 	cmp	w23, 1
-	bne	.L3010
+	bne	.L3019
 	mov	w3, 9
-.L3063:
+.L3072:
 	strb	w3, [x1, 60]
-.L3009:
+.L3018:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L3012:
+.L3021:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	and	w0, w3, 65535
-	cbz	w1, .L3014
+	cbz	w1, .L3023
 	add	w0, w0, w0, lsl 1
-.L3015:
-	adrp	x1, .LANCHOR101
+.L3024:
+	adrp	x1, .LANCHOR97
 	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	ldr	x1, [x1, #:lo12:.LANCHOR97]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
@@ -19491,34 +19554,34 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR71]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L3016
+	blt	.L3025
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, 86]
-.L3016:
+.L3025:
 	bl	gc_write_completed
-	b	.L2972
-.L3010:
+	b	.L2981
+.L3019:
 	cmp	w23, 2
-	bne	.L3011
+	bne	.L3020
 	mov	w3, 13
-	b	.L3063
-.L3013:
+	b	.L3072
+.L3022:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L3007
-.L3014:
-	adrp	x1, .LANCHOR98
-	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	b	.L3016
+.L3023:
+	adrp	x1, .LANCHOR102
+	ldrb	w2, [x1, #:lo12:.LANCHOR102]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L3015
+	b	.L3024
 	.size	gc_do_copy_back, .-gc_do_copy_back
 	.section	.text.zftl_discard,"ax",@progbits
 	.align	2
@@ -19537,7 +19600,7 @@ zftl_discard:
 	cmp	w2, w1
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-	bcc	.L3086
+	bcc	.L3095
 	adrp	x24, .LANCHOR205
 	add	w22, w0, 24576
 	adrp	x0, .LANCHOR7
@@ -19546,26 +19609,26 @@ zftl_discard:
 	ldr	w2, [x0, #:lo12:.LANCHOR7]
 	add	w1, w19, w1
 	str	w1, [x24, #:lo12:.LANCHOR205]
-	tbz	x2, 12, .L3067
+	tbz	x2, 12, .L3076
 	adrp	x0, .LC213
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3067:
-	adrp	x23, .LANCHOR101
-	adrp	x26, .LANCHOR114
-	ldr	x0, [x23, #:lo12:.LANCHOR101]
+.L3076:
+	adrp	x23, .LANCHOR97
+	adrp	x26, .LANCHOR117
+	ldr	x0, [x23, #:lo12:.LANCHOR97]
 	ldr	w27, [x0, 8]
 	add	w1, w27, 1
 	str	w1, [x0, 8]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrb	w21, [x26, #:lo12:.LANCHOR114]
+	ldrb	w21, [x26, #:lo12:.LANCHOR117]
 	udiv	w20, w22, w21
 	msub	w25, w20, w21, w22
-	cbz	w25, .L3068
+	cbz	w25, .L3077
 	sub	w21, w21, w25
 	mov	w0, w20
 	cmp	w21, w19
@@ -19573,20 +19636,20 @@ zftl_discard:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3069
+	bne	.L3078
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3069:
+.L3078:
 	ldr	w0, [x29, 120]
 	and	w28, w21, 65535
 	cmn	w0, #1
-	beq	.L3071
+	beq	.L3080
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x3, x0
-	cbz	x0, .L3071
+	cbz	x0, .L3080
 	strb	w25, [x0, 57]
 	ubfiz	x25, x25, 9, 25
 	strb	w21, [x0, 56]
@@ -19601,57 +19664,57 @@ zftl_discard:
 	mov	x0, x3
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3071:
+.L3080:
 	add	w20, w20, 1
 	sub	w19, w19, w28
-.L3068:
-	cbz	w19, .L3073
+.L3077:
+	cbz	w19, .L3082
 	bl	ftl_flush
-.L3073:
+.L3082:
 	adrp	x25, .LANCHOR96
-	add	x21, x26, :lo12:.LANCHOR114
+	add	x21, x26, :lo12:.LANCHOR117
 	add	x25, x25, :lo12:.LANCHOR96
 	mov	w0, -1
 	str	w0, [x29, 124]
-.L3074:
+.L3083:
 	ldrb	w0, [x21]
 	cmp	w19, w0
-	bcs	.L3079
-	cbz	w19, .L3081
+	bcs	.L3088
+	cbz	w19, .L3090
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	bne	.L3082
+	bne	.L3091
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
-.L3082:
+.L3091:
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3081
+	beq	.L3090
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x21, x0
-	cbz	x0, .L3081
+	cbz	x0, .L3090
 	strb	wzr, [x0, 57]
 	strb	w19, [x0, 56]
 	stp	w27, w20, [x21, 32]
-	ldrb	w0, [x26, #:lo12:.LANCHOR114]
+	ldrb	w0, [x26, #:lo12:.LANCHOR117]
 	cmp	w19, w0
-	bcc	.L3084
+	bcc	.L3093
 	adrp	x1, .LANCHOR206
 	adrp	x0, .LC0
 	mov	w2, 1177
 	add	x1, x1, :lo12:.LANCHOR206
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3084:
+.L3093:
 	ldr	x0, [x21, 8]
 	lsl	w2, w19, 9
 	mov	w1, 0
@@ -19659,42 +19722,42 @@ zftl_discard:
 	mov	x0, x21
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3081:
+.L3090:
 	ldr	w1, [x24, #:lo12:.LANCHOR205]
 	cmp	w1, 8192
-	bls	.L3087
+	bls	.L3096
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 12, .L3085
+	tbz	x0, 12, .L3094
 	adrp	x0, .LC213
 	mov	w4, 0
 	mov	w3, w19
 	mov	w2, w22
 	add	x0, x0, :lo12:.LC213
 	bl	printf
-.L3085:
+.L3094:
 	str	wzr, [x24, #:lo12:.LANCHOR205]
 	bl	flt_sys_flush
 	adrp	x0, .LANCHOR207
 	mov	w1, 1
 	str	w1, [x0, #:lo12:.LANCHOR207]
-.L3087:
+.L3096:
 	mov	w0, 0
-	b	.L3065
-.L3079:
+	b	.L3074
+.L3088:
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3075
+	beq	.L3084
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L3077
+	cbz	x0, .L3086
 	ldrb	w2, [x21]
 	mov	w1, 0
 	strb	w2, [x0, 56]
@@ -19706,24 +19769,24 @@ zftl_discard:
 	mov	x0, x28
 	bl	ftl_write_buf
 	bl	ftl_write_commit
-.L3113:
-	ldr	x1, [x23, #:lo12:.LANCHOR101]
+.L3122:
+	ldr	x1, [x23, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 76]
 	add	w0, w0, 1
 	str	w0, [x1, 76]
-.L3077:
+.L3086:
 	ldrb	w0, [x21]
 	add	w20, w20, 1
 	sub	w19, w19, w0
-	b	.L3074
-.L3075:
+	b	.L3083
+.L3084:
 	mov	w2, 0
 	add	x1, x29, 120
 	mov	w0, w20
 	bl	pm_log2phys
 	ldr	w0, [x29, 120]
 	cmn	w0, #1
-	beq	.L3077
+	beq	.L3086
 	add	x1, x29, 124
 	mov	w2, 1
 	mov	w0, w20
@@ -19741,10 +19804,10 @@ zftl_discard:
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
 	bl	ftl_vpn_decrement
-	b	.L3113
-.L3086:
+	b	.L3122
+.L3095:
 	mov	w0, -1
-.L3065:
+.L3074:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19773,65 +19836,65 @@ zftl_do_gc:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR135
+	adrp	x19, .LANCHOR138
 	stp	x23, x24, [sp, 64]
 	adrp	x24, .LANCHOR5
 	ldrh	w20, [x2, #:lo12:.LANCHOR89]
 	stp	x21, x22, [sp, 48]
-	ldrb	w2, [x19, #:lo12:.LANCHOR135]
+	ldrb	w2, [x19, #:lo12:.LANCHOR138]
 	ldrh	w21, [x1, #:lo12:.LANCHOR93]
 	stp	x25, x26, [sp, 80]
 	cmp	w2, 6
 	ldr	x23, [x24, #:lo12:.LANCHOR5]
 	add	w20, w21, w20
-	bhi	.L3222
+	bhi	.L3231
 	mov	w22, w0
 	and	w20, w20, 65535
-	adrp	x0, .L3118
+	adrp	x0, .L3127
 	mov	x25, x1
-	add	x0, x0, :lo12:.L3118
+	add	x0, x0, :lo12:.L3127
 	ldrh	w0, [x0,w2,uxtw #1]
-	adr	x1, .Lrtx3118
+	adr	x1, .Lrtx3127
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx3118:
+.Lrtx3127:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L3118:
-	.2byte	(.L3117 - .Lrtx3118) / 4
-	.2byte	(.L3119 - .Lrtx3118) / 4
-	.2byte	(.L3120 - .Lrtx3118) / 4
-	.2byte	(.L3121 - .Lrtx3118) / 4
-	.2byte	(.L3122 - .Lrtx3118) / 4
-	.2byte	(.L3123 - .Lrtx3118) / 4
-	.2byte	(.L3124 - .Lrtx3118) / 4
+.L3127:
+	.2byte	(.L3126 - .Lrtx3127) / 4
+	.2byte	(.L3128 - .Lrtx3127) / 4
+	.2byte	(.L3129 - .Lrtx3127) / 4
+	.2byte	(.L3130 - .Lrtx3127) / 4
+	.2byte	(.L3131 - .Lrtx3127) / 4
+	.2byte	(.L3132 - .Lrtx3127) / 4
+	.2byte	(.L3133 - .Lrtx3127) / 4
 	.section	.text.zftl_do_gc
-.L3123:
+.L3132:
 	adrp	x21, .LANCHOR63
 	add	x25, x21, :lo12:.LANCHOR63
 	mov	w23, 0
-.L3125:
+.L3134:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L3190
+	cbz	w0, .L3199
 	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	add	x21, x21, :lo12:.LANCHOR63
 	strh	wzr, [x21, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR101
+	adrp	x2, .LANCHOR97
 	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR101]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x21, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
 	str	xzr, [x21, 8]
-	b	.L3246
-.L3117:
+	b	.L3255
+.L3126:
 	adrp	x0, .LANCHOR91
 	mov	w1, 65535
 	ldrh	w4, [x0, #:lo12:.LANCHOR91]
@@ -19839,14 +19902,14 @@ zftl_do_gc:
 	add	w21, w21, w4
 	and	w21, w21, 65535
 	cmp	w0, w1
-	beq	.L3126
+	beq	.L3135
 	adrp	x1, .LANCHOR7
 	cmp	w21, 7
 	mov	w22, 3
 	adrp	x24, .LANCHOR70
 	ldr	w1, [x1, #:lo12:.LANCHOR7]
 	csinc	w22, w22, wzr, hi
-	tbz	x1, 8, .L3128
+	tbz	x1, 8, .L3137
 	ldrh	w7, [x23, 122]
 	mov	w4, w21
 	ldrh	w6, [x23, 120]
@@ -19858,40 +19921,40 @@ zftl_do_gc:
 	adrp	x0, .LC214
 	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L3128:
+.L3137:
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 1
 	mov	w1, w22
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L3222
-.L3129:
+	ble	.L3231
+.L3138:
 	mov	w0, 1
-.L3245:
-	strb	w0, [x19, #:lo12:.LANCHOR135]
-	b	.L3222
-.L3126:
+.L3254:
+	strb	w0, [x19, #:lo12:.LANCHOR138]
+	b	.L3231
+.L3135:
 	adrp	x0, .LANCHOR84
 	cmp	w22, 1
 	ldrh	w25, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR82
 	ldrh	w26, [x0, #:lo12:.LANCHOR82]
-	bne	.L3130
+	bne	.L3139
 	bl	gc_scan_static_data
 	bl	gc_static_wearleveling
-.L3131:
+.L3140:
 	ldr	x2, [x24, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR70
 	mov	w0, 1
 	mov	x24, x1
 	strb	w0, [x1, #:lo12:.LANCHOR70]
 	ldrh	w5, [x2, 124]
-	cbz	w5, .L3133
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	cbz	w5, .L3142
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	adrp	x0, .LANCHOR7
 	strb	wzr, [x1, #:lo12:.LANCHOR70]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3222
+	tbz	x0, 8, .L3231
 	ldrh	w7, [x2, 122]
 	mov	w4, w21
 	ldrh	w6, [x2, 120]
@@ -19901,13 +19964,13 @@ zftl_do_gc:
 	adrp	x0, .LC215
 	add	x0, x0, :lo12:.LC215
 	bl	printf
-	b	.L3222
-.L3130:
+	b	.L3231
+.L3139:
 	adrp	x0, .LANCHOR73
 	ldrh	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, w20
-	bcs	.L3131
-.L3222:
+	bcs	.L3140
+.L3231:
 	mov	w0, 16
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -19916,44 +19979,44 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 96
 	ret
-.L3133:
+.L3142:
 	adrp	x23, .LANCHOR73
 	ldrh	w1, [x23, #:lo12:.LANCHOR73]
 	cmp	w20, w1
-	bcs	.L3134
+	bcs	.L3143
 	cmp	w21, 1
-	bls	.L3135
+	bls	.L3144
 	cmp	w21, 16
-	bls	.L3136
+	bls	.L3145
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L3136
+	bcs	.L3145
 	mov	w2, 16
 	mov	w1, 3
-.L3242:
+.L3251:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3137:
-	cbnz	w0, .L3129
-	b	.L3222
-.L3136:
+.L3146:
+	cbnz	w0, .L3138
+	b	.L3231
+.L3145:
 	mov	w2, 2
 	mov	w1, w2
 	mov	w0, 1
-.L3248:
+.L3257:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L3129
+	bne	.L3138
 	mov	w2, 2
-	b	.L3243
-.L3135:
+	b	.L3252
+.L3144:
 	adrp	x0, .LANCHOR7
 	strb	wzr, [x24, #:lo12:.LANCHOR70]
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
-	tbz	x0, 8, .L3139
+	tbz	x0, 8, .L3148
 	ldrh	w7, [x2, 122]
 	adrp	x0, .LC215
 	ldrh	w6, [x2, 120]
@@ -19964,181 +20027,181 @@ zftl_do_gc:
 	mov	w1, 1778
 	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L3139:
+.L3148:
 	cmp	w20, 16
-	bls	.L3140
+	bls	.L3149
 	mov	w2, 4
-.L3243:
+.L3252:
 	mov	w1, 3
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3242
-.L3140:
+	b	.L3251
+.L3149:
 	mov	w2, 1
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w1, w2
-	b	.L3248
-.L3134:
+	b	.L3257
+.L3143:
 	cmp	w22, 1
 	lsl	w1, w1, 1
-	bne	.L3142
+	bne	.L3151
 	cmp	w20, w1
-	bge	.L3142
+	bge	.L3151
 	add	w0, w25, w26
 	and	w0, w0, 65535
 	cmp	w0, w21, lsr 1
-	bcs	.L3143
+	bcs	.L3152
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L3143
-.L3147:
+	bcs	.L3152
+.L3156:
 	adrp	x0, .LANCHOR83
 	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	lsr	w0, w0, 1
 	strh	w0, [x23, #:lo12:.LANCHOR73]
-	b	.L3222
-.L3143:
+	b	.L3231
+.L3152:
 	cmp	w21, 1
 	adrp	x22, .LANCHOR83
-	bls	.L3144
+	bls	.L3153
 	cmp	w21, 16
-	bls	.L3145
+	bls	.L3154
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 1
-.L3240:
+.L3249:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L3146:
+.L3155:
 	ldrh	w1, [x22, #:lo12:.LANCHOR83]
 	strh	w1, [x23, #:lo12:.LANCHOR73]
-	b	.L3137
-.L3145:
+	b	.L3146
+.L3154:
 	mov	w2, 2
 	mov	w0, 1
 	mov	w1, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L3146
+	bne	.L3155
 	mov	w2, 2
 	mov	w1, 3
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
-	b	.L3240
-.L3144:
+	b	.L3249
+.L3153:
 	cmp	w20, w0
-	bcs	.L3147
+	bcs	.L3156
 	strb	wzr, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 0
-	b	.L3240
-.L3142:
+	b	.L3249
+.L3151:
 	cmp	w20, w1
-	bge	.L3147
-	b	.L3222
-.L3119:
+	bge	.L3156
+	b	.L3231
+.L3128:
 	adrp	x7, .LANCHOR63
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L3148
+	bne	.L3157
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L3148:
+.L3157:
 	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L3149
+	beq	.L3158
 	adrp	x0, .LANCHOR3
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR3]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L3150
+	cbz	w5, .L3159
 	add	x1, x1, 58
 	mov	w0, 0
-.L3152:
+.L3161:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L3151
-.L3156:
+	bne	.L3160
+.L3165:
 	adrp	x0, .LANCHOR63
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L3222
-.L3151:
+	b	.L3231
+.L3160:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L3152
-.L3150:
+	bne	.L3161
+.L3159:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3153
+	beq	.L3162
 	tst	w0, 192
-	bne	.L3154
-.L3153:
+	bne	.L3163
+.L3162:
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L3156
+	cbz	w0, .L3165
 	mov	w2, 1972
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3156
-.L3154:
+	b	.L3165
+.L3163:
 	mov	w0, 2
-	b	.L3245
-.L3149:
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
-	b	.L3222
-.L3120:
+	b	.L3254
+.L3158:
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
+	b	.L3231
+.L3129:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L3157
+	bne	.L3166
 	mov	w0, 3
-	b	.L3245
-.L3157:
+	b	.L3254
+.L3166:
 	adrp	x20, .LANCHOR63
 	mov	w2, 65535
 	add	x1, x20, :lo12:.LANCHOR63
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	cmp	w0, w2
-	beq	.L3129
+	beq	.L3138
 	ldrh	w2, [x1, 24]
-	cbz	w2, .L3158
+	cbz	w2, .L3167
 	mov	w0, 4
 	strh	wzr, [x1, 26]
-	strb	w0, [x19, #:lo12:.LANCHOR135]
-	b	.L3222
-.L3158:
+	strb	w0, [x19, #:lo12:.LANCHOR138]
+	b	.L3231
+.L3167:
 	mov	w1, 1
-	strb	w1, [x19, #:lo12:.LANCHOR135]
+	strb	w1, [x19, #:lo12:.LANCHOR138]
 	adrp	x19, .LANCHOR4
 	ubfiz	x0, x0, 1, 16
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x1, x0]
-	cbz	w0, .L3159
+	cbz	w0, .L3168
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2000
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3159:
+.L3168:
 	ldrh	w0, [x20, #:lo12:.LANCHOR63]
 	add	x21, x20, :lo12:.LANCHOR63
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x1, x0, 1, 16
 	ldrh	w1, [x2, x1]
-	cbnz	w1, .L3156
+	cbnz	w1, .L3165
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldrh	w1, [x20, #:lo12:.LANCHOR63]
@@ -20147,41 +20210,41 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3161
+	bhi	.L3170
 	strh	w0, [x21, 30]
-	b	.L3156
-.L3161:
+	b	.L3165
+.L3170:
 	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3156
-.L3121:
+	b	.L3165
+.L3130:
 	adrp	x22, .LANCHOR63
 	adrp	x23, .LANCHOR80
 	add	x21, x22, :lo12:.LANCHOR63
 	add	x23, x23, :lo12:.LANCHOR80
-.L3223:
+.L3232:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x21, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L3162
+	bcs	.L3171
 	cmp	w20, 7
-	bls	.L3223
-	b	.L3222
-.L3162:
+	bls	.L3232
+	b	.L3231
+.L3171:
 	ldrh	w3, [x21, 24]
 	adrp	x0, .LANCHOR7
-	cbz	w3, .L3163
+	cbz	w3, .L3172
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w1, 4
 	strh	wzr, [x21, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR135]
+	strb	w1, [x19, #:lo12:.LANCHOR138]
 	adrp	x19, .LANCHOR4
-	tbz	x0, 8, .L3164
+	tbz	x0, 8, .L3173
 	ldrh	w1, [x21]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
@@ -20189,56 +20252,56 @@ zftl_do_gc:
 	adrp	x0, .LC216
 	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L3164:
+.L3173:
 	ldrh	w2, [x22, #:lo12:.LANCHOR63]
 	add	x0, x22, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L3165
+	beq	.L3174
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2034
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3165:
+.L3174:
 	add	x0, x22, :lo12:.LANCHOR63
 	ldrh	w1, [x22, #:lo12:.LANCHOR63]
 	ldrh	w2, [x0, 24]
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	strh	w2, [x0, x1, lsl 1]
-	b	.L3222
-.L3163:
+	b	.L3231
+.L3172:
 	adrp	x2, .LANCHOR3
 	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	ldrh	w1, [x21]
 	ldr	x20, [x2, #:lo12:.LANCHOR3]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR135]
+	strb	w2, [x19, #:lo12:.LANCHOR138]
 	add	x20, x20, x1, uxth 2
-	tbz	x0, 8, .L3166
+	tbz	x0, 8, .L3175
 	ldrb	w2, [x20, 2]
 	adrp	x0, .LC217
 	add	x0, x0, :lo12:.LC217
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L3166:
+.L3175:
 	ldrb	w0, [x20, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L3167
+	beq	.L3176
 	tst	w0, 192
-	bne	.L3168
-.L3167:
+	bne	.L3177
+.L3176:
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2044
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3168:
+.L3177:
 	ldrh	w0, [x22, #:lo12:.LANCHOR63]
 	add	x19, x22, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -20248,27 +20311,27 @@ zftl_do_gc:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w0, 8
-	bhi	.L3169
+	bhi	.L3178
 	strh	w0, [x19, 30]
-	b	.L3222
-.L3169:
+	b	.L3231
+.L3178:
 	strh	wzr, [x19, 30]
-.L3246:
+.L3255:
 	bl	flt_sys_flush
-	b	.L3222
-.L3122:
+	b	.L3231
+.L3131:
 	ldrh	w1, [x23, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L3170
+	bne	.L3179
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w0, 1
-	bne	.L3170
+	bne	.L3179
 	bl	ftl_flush
 	ldrh	w0, [x25, #:lo12:.LANCHOR93]
-	cbz	w0, .L3171
-.L3244:
+	cbz	w0, .L3180
+.L3253:
 	lsr	w0, w0, 1
 	mov	w1, 5
 	bl	zftl_get_free_sblk
@@ -20276,26 +20339,26 @@ zftl_do_gc:
 	mov	w19, w21
 	mov	w0, 65535
 	cmp	w21, w0
-	beq	.L3173
+	beq	.L3182
 	adrp	x0, .LANCHOR3
 	ldr	x20, [x0, #:lo12:.LANCHOR3]
 	add	x20, x20, x21, uxth 2
 	ldrb	w0, [x20, 2]
 	tst	w0, 224
-	beq	.L3174
+	beq	.L3183
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2069
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3174:
+.L3183:
 	ldrb	w0, [x20, 2]
 	mov	w1, 5
 	bfi	w0, w1, 5, 3
 	orr	w0, w0, 16
 	strb	w0, [x20, 2]
-.L3193:
+.L3202:
 	mov	w1, 1
 	mov	w0, w19
 	bl	ftl_erase_sblk
@@ -20320,16 +20383,16 @@ zftl_do_gc:
 	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	strh	wzr, [x23, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR136
-	ldr	x0, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR139
+	ldr	x0, [x0, #:lo12:.LANCHOR139]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR137
-	ldr	x0, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR140
+	ldr	x0, [x0, #:lo12:.LANCHOR140]
 	lsl	w2, w2, 2
 	bl	ftl_memset
 	ldrb	w0, [x20, #:lo12:.LANCHOR72]
@@ -20346,9 +20409,9 @@ zftl_do_gc:
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR101
+	adrp	x0, .LANCHOR97
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w19, [x0, 126]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
@@ -20359,12 +20422,12 @@ zftl_do_gc:
 	strh	wzr, [x0, 318]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L3222
-.L3171:
+	b	.L3231
+.L3180:
 	adrp	x0, .LANCHOR91
 	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	b	.L3244
-.L3170:
+	b	.L3253
+.L3179:
 	cmp	w22, 1
 	mov	w22, 4
 	csinc	w22, w22, wzr, eq
@@ -20377,26 +20440,26 @@ zftl_do_gc:
 	add	x25, x25, :lo12:.LANCHOR70
 	add	x20, x21, :lo12:.LANCHOR63
 	add	x26, x23, 80
-.L3177:
+.L3186:
 	sub	w22, w22, #1
 	and	w22, w22, 255
 	cmp	w22, 255
-	beq	.L3222
+	beq	.L3231
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L3178
+	cbnz	w0, .L3187
 	adrp	x0, .LANCHOR48
 	ldrb	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 3
-	bhi	.L3179
+	bhi	.L3188
 	bl	ftl_write_commit
-.L3179:
+.L3188:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L3177
+	bcc	.L3186
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	bl	ftl_write_commit
 	bl	ftl_flush
 	adrp	x0, .LANCHOR4
@@ -20404,24 +20467,24 @@ zftl_do_gc:
 	mov	x20, x0
 	ldr	x1, [x0, #:lo12:.LANCHOR4]
 	ldrh	w1, [x1, x2, lsl 1]
-	cbz	w1, .L3181
+	cbz	w1, .L3190
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2144
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L3181:
+.L3190:
 	ldrh	w1, [x21, #:lo12:.LANCHOR63]
 	add	x19, x21, :lo12:.LANCHOR63
 	ldr	x2, [x20, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	cbnz	w2, .L3182
+	cbnz	w2, .L3191
 	mov	w0, w1
 	bl	ftl_free_sblk
-	b	.L3156
-.L3182:
+	b	.L3165
+.L3191:
 	ldrh	w3, [x19, 24]
 	adrp	x22, .LANCHOR64
 	adrp	x0, .LC218
@@ -20462,54 +20525,54 @@ zftl_do_gc:
 	adrp	x0, .LC222
 	add	x0, x0, :lo12:.LC222
 	bl	rknand_print_hex
-	b	.L3156
-.L3178:
+	b	.L3165
+.L3187:
 	ldrh	w0, [x20, 318]
-	cbz	w0, .L3183
+	cbz	w0, .L3192
 	ldr	w0, [x20, 320]
 	strh	wzr, [x20, 318]
 	cmn	w0, #1
-	beq	.L3184
+	beq	.L3193
 	bl	ftl_mask_bad_block
-.L3184:
+.L3193:
 	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	add	x20, x21, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 320]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR101
+	adrp	x2, .LANCHOR97
 	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR101]
+	ldr	x2, [x2, #:lo12:.LANCHOR97]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L3185
+	cbz	x0, .L3194
 	bl	buf_free
-.L3185:
+.L3194:
 	add	x21, x21, :lo12:.LANCHOR63
 	str	xzr, [x21, 8]
 	bl	flt_sys_flush
 	mov	w2, 2177
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3222
-.L3183:
+	b	.L3231
+.L3192:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L3186
+	bls	.L3195
 	cmp	w1, w0
-	bcc	.L3177
+	bcc	.L3186
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20518,12 +20581,12 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-	b	.L3222
-.L3186:
+	b	.L3231
+.L3195:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR135]
+	strb	w2, [x19, #:lo12:.LANCHOR138]
 	cmp	w1, w0
-	bcc	.L3187
+	bcc	.L3196
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -20532,7 +20595,7 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L3187:
+.L3196:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
@@ -20550,37 +20613,37 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L3188
+	bne	.L3197
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L3188:
+.L3197:
 	add	x21, x21, :lo12:.LANCHOR63
 	strh	wzr, [x21, 22]
-	b	.L3222
-.L3190:
+	b	.L3231
+.L3199:
 	ldrh	w1, [x25, 16]
 	ldrh	w0, [x25, 18]
 	cmp	w1, w0
-	bcc	.L3191
+	bcc	.L3200
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR135]
+	strb	w0, [x19, #:lo12:.LANCHOR138]
 	ldr	x0, [x25, 8]
 	bl	buf_free
 	str	xzr, [x25, 8]
-	b	.L3222
-.L3191:
+	b	.L3231
+.L3200:
 	cmp	w20, 7
-	bls	.L3125
+	bls	.L3134
 	cmp	w22, 1
-	bne	.L3222
+	bne	.L3231
 	add	w23, w23, 1
 	and	w23, w23, 255
 	cmp	w23, 4
-	bls	.L3125
-	b	.L3222
-.L3124:
+	bls	.L3134
+	b	.L3231
+.L3133:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
@@ -20588,22 +20651,22 @@ zftl_do_gc:
 	bl	pm_flush
 	strh	w20, [x23, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR101
-	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR97
+	ldr	x0, [x0, #:lo12:.LANCHOR97]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	strb	wzr, [x19, #:lo12:.LANCHOR138]
 	bl	print_ftl_debug_info
-	b	.L3222
-.L3173:
+	b	.L3231
+.L3182:
 	mov	w2, 2075
 	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-	b	.L3193
+	b	.L3202
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -20623,29 +20686,29 @@ zftl_write:
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L3250
+	tbz	x0, 12, .L3259
 	mov	w3, w2
 	adrp	x0, .LC223
 	mov	w2, w1
 	add	x0, x0, :lo12:.LC223
 	mov	w1, w27
 	bl	printf
-.L3250:
-	cbnz	w27, .L3251
+.L3259:
+	cbnz	w27, .L3260
 	adrp	x0, .LANCHOR59
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L3252:
+.L3261:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L3266
-	adrp	x23, .LANCHOR114
+	bcc	.L3275
+	adrp	x23, .LANCHOR117
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR101
-	ldrb	w0, [x23, #:lo12:.LANCHOR114]
+	adrp	x25, .LANCHOR97
+	ldrb	w0, [x23, #:lo12:.LANCHOR117]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR114
+	add	x23, x23, :lo12:.LANCHOR117
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -20653,8 +20716,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L3254:
-	cbnz	w21, .L3262
+.L3263:
+	cbnz	w21, .L3271
 	adrp	x20, .LANCHOR89
 	adrp	x19, .LANCHOR93
 	add	x20, x20, :lo12:.LANCHOR89
@@ -20663,14 +20726,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L3263:
+.L3272:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L3264
+	ble	.L3273
 	mov	w0, 0
-.L3249:
+.L3258:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -20678,28 +20741,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L3251:
+.L3260:
 	cmp	w27, 3
-	bhi	.L3266
+	bhi	.L3275
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L3252
-.L3262:
+	b	.L3261
+.L3271:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L3255
+	cbnz	x0, .L3264
 	bl	ftl_write_commit
-	b	.L3254
-.L3255:
+	b	.L3263
+.L3264:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L3258
+	bne	.L3267
 	cmp	w26, w22
-	bne	.L3259
+	bne	.L3268
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -20708,9 +20771,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L3271:
+.L3280:
 	strb	w3, [x28, 56]
-.L3258:
+.L3267:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -20720,7 +20783,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR101]
+	ldr	x1, [x25, #:lo12:.LANCHOR97]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -20732,19 +20795,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L3254
-.L3259:
+	b	.L3263
+.L3268:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L3271
-.L3264:
+	b	.L3280
+.L3273:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L3263
-.L3266:
+	b	.L3272
+.L3275:
 	mov	w0, -1
-	b	.L3249
+	b	.L3258
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -20803,12 +20866,12 @@ ftl_write:
 	mov	x20, x3
 	mov	w22, w1
 	ands	w21, w0, 255
-	bne	.L3277
+	bne	.L3286
 	mov	w3, w2
 	mov	w0, 0
 	mov	x2, x20
 	bl	idb_write_data
-.L3277:
+.L3286:
 	mov	x3, x20
 	mov	w2, w19
 	mov	w1, w22
@@ -20920,6 +20983,7 @@ ftl_write:
 	.global	p_free_buf_head
 	.global	free_buf_count
 	.global	g_buf
+	.global	nandc_ecc_sts
 	.global	g_nandc_v6_master_info
 	.global	nandc_randomizer_en
 	.global	nandc_hw_seed
@@ -20988,14 +21052,14 @@ _c_ftl_block_addr_log2:
 	.zero	2
 	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR103,. + 0
 	.type	_c_ftl_block_align_addr, %object
 	.size	_c_ftl_block_align_addr, 2
 _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR185,. + 0
+	.set	.LANCHOR188,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -21007,7 +21071,7 @@ _c_ftl_byte_pre_page:
 _c_ftl_nand_blks_per_die:
 	.zero	2
 	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR100,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	_c_ftl_nand_die_num, %object
 	.size	_c_ftl_nand_die_num, 1
 _c_ftl_nand_die_num:
@@ -21046,55 +21110,55 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR172,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR134,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR193,. + 0
+	.set	.LANCHOR99,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -21108,7 +21172,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR189,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -21141,7 +21205,7 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR191,. + 0
+	.set	.LANCHOR100,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
@@ -21182,7 +21246,7 @@ fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
@@ -21221,7 +21285,7 @@ free_xlc_sblk:
 ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR171,. + 0
 	.type	ftl_ext_info_first_write, %object
 	.size	ftl_ext_info_first_write, 1
 ftl_ext_info_first_write:
@@ -21241,7 +21305,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR166,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -21254,14 +21318,14 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
@@ -21275,13 +21339,13 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
 	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	ftl_sys_info_first_write, %object
 	.size	ftl_sys_info_first_write, 1
 ftl_sys_info_first_write:
@@ -21294,14 +21358,14 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR152,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR113,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
@@ -21322,7 +21386,7 @@ g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
@@ -21335,7 +21399,7 @@ g_die_addr:
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR102,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
@@ -21348,7 +21412,7 @@ g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
@@ -21373,20 +21437,20 @@ g_flash_interface_mode:
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR182,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR150,. + 0
+	.set	.LANCHOR153,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
@@ -21399,28 +21463,28 @@ g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
@@ -21433,7 +21497,7 @@ g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -21452,7 +21516,7 @@ g_gc_info:
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR158,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
@@ -21471,14 +21535,14 @@ g_lsb_page_tbl:
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
@@ -21503,7 +21567,7 @@ g_nand_opt_para:
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	g_nandc_tran_timeout, %object
 	.size	g_nandc_tran_timeout, 1
 g_nandc_tran_timeout:
@@ -21523,7 +21587,7 @@ g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR176,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
@@ -21547,21 +21611,21 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR128,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR138,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
@@ -21575,7 +21639,7 @@ gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
@@ -21595,7 +21659,7 @@ gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
@@ -21629,7 +21693,7 @@ gc_slc_mode_tlc_vpn_th:
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -21733,7 +21797,7 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR97,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
@@ -21767,25 +21831,31 @@ idb_buf:
 	.zero	262144
 	.section	.bss.idb_need_write_back,"aw",@nobits
 	.align	2
-	.set	.LANCHOR156,. + 0
+	.set	.LANCHOR159,. + 0
 	.type	idb_need_write_back, %object
 	.size	idb_need_write_back, 4
 idb_need_write_back:
 	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR108,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
 	.zero	8
+	.section	.bss.nandc_ecc_sts,"aw",@nobits
+	.align	3
+	.type	nandc_ecc_sts, %object
+	.size	nandc_ecc_sts, 16
+nandc_ecc_sts:
+	.zero	16
 	.section	.bss.nandc_hw_seed,"aw",@nobits
 	.set	.LANCHOR41,. + 0
 	.type	nandc_hw_seed, %object
@@ -21812,33 +21882,33 @@ p_free_buf_head:
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_first_write,"aw",@nobits
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	pm_first_write, %object
 	.size	pm_first_write, 1
 pm_first_write:
 	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR187,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR124,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
@@ -21857,7 +21927,7 @@ read_ahead_lpa:
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
@@ -21869,7 +21939,7 @@ sblk_queue_head:
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -21901,13 +21971,13 @@ write_buf_count:
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR160,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -21955,7 +22025,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -21989,7 +22059,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR184,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -22834,7 +22904,7 @@ zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR183,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
 	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
@@ -23678,432 +23748,432 @@ zftl_nand_flash_para_tbl:
 	.byte	-65
 	.byte	-66
 	.byte	0
-	.section	.rodata.__func__.10041,"a",@progbits
+	.section	.rodata.__func__.10035,"a",@progbits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.10041, %object
-	.size	__func__.10041, 18
-__func__.10041:
+	.type	__func__.10035, %object
+	.size	__func__.10035, 18
+__func__.10035:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10066,"a",@progbits
+	.section	.rodata.__func__.10060,"a",@progbits
 	.align	3
 	.set	.LANCHOR6,. + 0
-	.type	__func__.10066, %object
-	.size	__func__.10066, 23
-__func__.10066:
+	.type	__func__.10060, %object
+	.size	__func__.10060, 23
+__func__.10060:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10165,"a",@progbits
+	.section	.rodata.__func__.10159,"a",@progbits
 	.align	3
-	.set	.LANCHOR165,. + 0
-	.type	__func__.10165, %object
-	.size	__func__.10165, 15
-__func__.10165:
+	.set	.LANCHOR168,. + 0
+	.type	__func__.10159, %object
+	.size	__func__.10159, 15
+__func__.10159:
 	.string	"ftl_info_flush"
-	.section	.rodata.__func__.10197,"a",@progbits
+	.section	.rodata.__func__.10191,"a",@progbits
 	.align	3
-	.set	.LANCHOR116,. + 0
-	.type	__func__.10197, %object
-	.size	__func__.10197, 15
-__func__.10197:
+	.set	.LANCHOR119,. + 0
+	.type	__func__.10191, %object
+	.size	__func__.10191, 15
+__func__.10191:
 	.string	"ftl_alloc_sblk"
-	.section	.rodata.__func__.10235,"a",@progbits
+	.section	.rodata.__func__.10233,"a",@progbits
 	.align	3
-	.set	.LANCHOR102,. + 0
-	.type	__func__.10235, %object
-	.size	__func__.10235, 18
-__func__.10235:
+	.set	.LANCHOR105,. + 0
+	.type	__func__.10233, %object
+	.size	__func__.10233, 18
+__func__.10233:
 	.string	"ftl_alloc_sys_blk"
-	.section	.rodata.__func__.10245,"a",@progbits
+	.section	.rodata.__func__.10243,"a",@progbits
 	.align	3
-	.set	.LANCHOR103,. + 0
-	.type	__func__.10245, %object
-	.size	__func__.10245, 17
-__func__.10245:
+	.set	.LANCHOR106,. + 0
+	.type	__func__.10243, %object
+	.size	__func__.10243, 17
+__func__.10243:
 	.string	"ftl_free_sys_blk"
-	.section	.rodata.__func__.10280,"a",@progbits
+	.section	.rodata.__func__.10278,"a",@progbits
 	.align	3
 	.set	.LANCHOR196,. + 0
-	.type	__func__.10280, %object
-	.size	__func__.10280, 14
-__func__.10280:
+	.type	__func__.10278, %object
+	.size	__func__.10278, 14
+__func__.10278:
 	.string	"ftl_sblk_dump"
-	.section	.rodata.__func__.10304,"a",@progbits
+	.section	.rodata.__func__.10302,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.10304, %object
-	.size	__func__.10304, 16
-__func__.10304:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.10302, %object
+	.size	__func__.10302, 16
+__func__.10302:
 	.string	"ftl_sysblk_dump"
-	.section	.rodata.__func__.10323,"a",@progbits
+	.section	.rodata.__func__.10321,"a",@progbits
 	.align	3
-	.set	.LANCHOR174,. + 0
-	.type	__func__.10323, %object
-	.size	__func__.10323, 23
-__func__.10323:
+	.set	.LANCHOR177,. + 0
+	.type	__func__.10321, %object
+	.size	__func__.10321, 23
+__func__.10321:
 	.string	"ftl_open_sblk_recovery"
-	.section	.rodata.__func__.10349,"a",@progbits
+	.section	.rodata.__func__.10347,"a",@progbits
 	.align	3
-	.set	.LANCHOR104,. + 0
-	.type	__func__.10349, %object
-	.size	__func__.10349, 23
-__func__.10349:
+	.set	.LANCHOR107,. + 0
+	.type	__func__.10347, %object
+	.size	__func__.10347, 23
+__func__.10347:
 	.string	"ftl_get_ppa_from_index"
-	.section	.rodata.__func__.10370,"a",@progbits
+	.section	.rodata.__func__.10368,"a",@progbits
 	.align	3
 	.set	.LANCHOR200,. + 0
-	.type	__func__.10370, %object
-	.size	__func__.10370, 19
-__func__.10370:
+	.type	__func__.10368, %object
+	.size	__func__.10368, 19
+__func__.10368:
 	.string	"ftl_update_l2p_map"
-	.section	.rodata.__func__.10389,"a",@progbits
+	.section	.rodata.__func__.10386,"a",@progbits
 	.align	3
-	.set	.LANCHOR108,. + 0
-	.type	__func__.10389, %object
-	.size	__func__.10389, 22
-__func__.10389:
+	.set	.LANCHOR111,. + 0
+	.type	__func__.10386, %object
+	.size	__func__.10386, 22
+__func__.10386:
 	.string	"ftl_get_new_free_page"
-	.section	.rodata.__func__.10400,"a",@progbits
+	.section	.rodata.__func__.10397,"a",@progbits
 	.align	3
-	.set	.LANCHOR109,. + 0
-	.type	__func__.10400, %object
-	.size	__func__.10400, 22
-__func__.10400:
+	.set	.LANCHOR112,. + 0
+	.type	__func__.10397, %object
+	.size	__func__.10397, 22
+__func__.10397:
 	.string	"ftl_ext_alloc_new_blk"
-	.section	.rodata.__func__.10425,"a",@progbits
+	.section	.rodata.__func__.10422,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.10425, %object
-	.size	__func__.10425, 19
-__func__.10425:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.10422, %object
+	.size	__func__.10422, 19
+__func__.10422:
 	.string	"ftl_ext_info_flush"
-	.section	.rodata.__func__.10437,"a",@progbits
+	.section	.rodata.__func__.10434,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.10437, %object
-	.size	__func__.10437, 18
-__func__.10437:
+	.set	.LANCHOR173,. + 0
+	.type	__func__.10434, %object
+	.size	__func__.10434, 18
+__func__.10434:
 	.string	"ftl_ext_info_init"
-	.section	.rodata.__func__.10483,"a",@progbits
+	.section	.rodata.__func__.10480,"a",@progbits
 	.align	3
-	.set	.LANCHOR171,. + 0
-	.type	__func__.10483, %object
-	.size	__func__.10483, 15
-__func__.10483:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.10480, %object
+	.size	__func__.10480, 15
+__func__.10480:
 	.string	"ftl_low_format"
-	.section	.rodata.__func__.10527,"a",@progbits
+	.section	.rodata.__func__.10524,"a",@progbits
 	.align	3
-	.set	.LANCHOR173,. + 0
-	.type	__func__.10527, %object
-	.size	__func__.10527, 23
-__func__.10527:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.10524, %object
+	.size	__func__.10524, 23
+__func__.10524:
 	.string	"ftl_re_low_format_test"
-	.section	.rodata.__func__.10537,"a",@progbits
+	.section	.rodata.__func__.10534,"a",@progbits
 	.align	3
-	.set	.LANCHOR162,. + 0
-	.type	__func__.10537, %object
-	.size	__func__.10537, 14
-__func__.10537:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.10534, %object
+	.size	__func__.10534, 14
+__func__.10534:
 	.string	"ftl_prog_page"
-	.section	.rodata.__func__.10712,"a",@progbits
+	.section	.rodata.__func__.10709,"a",@progbits
 	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.10712, %object
-	.size	__func__.10712, 15
-__func__.10712:
+	.set	.LANCHOR162,. + 0
+	.type	__func__.10709, %object
+	.size	__func__.10709, 15
+__func__.10709:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10772,"a",@progbits
+	.section	.rodata.__func__.10769,"a",@progbits
 	.align	3
-	.set	.LANCHOR184,. + 0
-	.type	__func__.10772, %object
-	.size	__func__.10772, 16
-__func__.10772:
+	.set	.LANCHOR187,. + 0
+	.type	__func__.10769, %object
+	.size	__func__.10769, 16
+__func__.10769:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10786,"a",@progbits
+	.section	.rodata.__func__.10783,"a",@progbits
 	.align	3
-	.set	.LANCHOR132,. + 0
-	.type	__func__.10786, %object
-	.size	__func__.10786, 13
-__func__.10786:
+	.set	.LANCHOR135,. + 0
+	.type	__func__.10783, %object
+	.size	__func__.10783, 13
+__func__.10783:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10806,"a",@progbits
+	.section	.rodata.__func__.10803,"a",@progbits
 	.align	3
-	.set	.LANCHOR186,. + 0
-	.type	__func__.10806, %object
-	.size	__func__.10806, 6
-__func__.10806:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.10803, %object
+	.size	__func__.10803, 6
+__func__.10803:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10822,"a",@progbits
+	.section	.rodata.__func__.10819,"a",@progbits
 	.align	3
-	.set	.LANCHOR119,. + 0
-	.type	__func__.10822, %object
-	.size	__func__.10822, 17
-__func__.10822:
+	.set	.LANCHOR122,. + 0
+	.type	__func__.10819, %object
+	.size	__func__.10819, 17
+__func__.10819:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10832,"a",@progbits
+	.section	.rodata.__func__.10829,"a",@progbits
 	.align	3
-	.set	.LANCHOR175,. + 0
-	.type	__func__.10832, %object
-	.size	__func__.10832, 14
-__func__.10832:
+	.set	.LANCHOR178,. + 0
+	.type	__func__.10829, %object
+	.size	__func__.10829, 14
+__func__.10829:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10850,"a",@progbits
+	.section	.rodata.__func__.10847,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.10850, %object
-	.size	__func__.10850, 21
-__func__.10850:
+	.set	.LANCHOR125,. + 0
+	.type	__func__.10847, %object
+	.size	__func__.10847, 21
+__func__.10847:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8494,"a",@progbits
+	.section	.rodata.__func__.8490,"a",@progbits
 	.align	3
-	.set	.LANCHOR144,. + 0
-	.type	__func__.8494, %object
-	.size	__func__.8494, 19
-__func__.8494:
+	.set	.LANCHOR147,. + 0
+	.type	__func__.8490, %object
+	.size	__func__.8490, 19
+__func__.8490:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8523,"a",@progbits
+	.section	.rodata.__func__.8519,"a",@progbits
 	.align	3
-	.set	.LANCHOR161,. + 0
-	.type	__func__.8523, %object
-	.size	__func__.8523, 19
-__func__.8523:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.8519, %object
+	.size	__func__.8519, 19
+__func__.8519:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8538,"a",@progbits
+	.section	.rodata.__func__.8534,"a",@progbits
 	.align	3
 	.set	.LANCHOR35,. + 0
-	.type	__func__.8538, %object
-	.size	__func__.8538, 26
-__func__.8538:
+	.type	__func__.8534, %object
+	.size	__func__.8534, 26
+__func__.8534:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8549,"a",@progbits
+	.section	.rodata.__func__.8545,"a",@progbits
 	.align	3
 	.set	.LANCHOR37,. + 0
-	.type	__func__.8549, %object
-	.size	__func__.8549, 21
-__func__.8549:
+	.type	__func__.8545, %object
+	.size	__func__.8545, 21
+__func__.8545:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8563,"a",@progbits
+	.section	.rodata.__func__.8559,"a",@progbits
 	.align	3
 	.set	.LANCHOR23,. + 0
-	.type	__func__.8563, %object
-	.size	__func__.8563, 28
-__func__.8563:
+	.type	__func__.8559, %object
+	.size	__func__.8559, 28
+__func__.8559:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8587,"a",@progbits
+	.section	.rodata.__func__.8583,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.8587, %object
-	.size	__func__.8587, 26
-__func__.8587:
+	.set	.LANCHOR160,. + 0
+	.type	__func__.8583, %object
+	.size	__func__.8583, 26
+__func__.8583:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8600,"a",@progbits
+	.section	.rodata.__func__.8596,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.8600, %object
-	.size	__func__.8600, 22
-__func__.8600:
+	.set	.LANCHOR161,. + 0
+	.type	__func__.8596, %object
+	.size	__func__.8596, 22
+__func__.8596:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8613,"a",@progbits
+	.section	.rodata.__func__.8609,"a",@progbits
 	.align	3
 	.set	.LANCHOR34,. + 0
-	.type	__func__.8613, %object
-	.size	__func__.8613, 22
-__func__.8613:
+	.type	__func__.8609, %object
+	.size	__func__.8609, 22
+__func__.8609:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8628,"a",@progbits
+	.section	.rodata.__func__.8624,"a",@progbits
 	.align	3
-	.set	.LANCHOR151,. + 0
-	.type	__func__.8628, %object
-	.size	__func__.8628, 25
-__func__.8628:
+	.set	.LANCHOR154,. + 0
+	.type	__func__.8624, %object
+	.size	__func__.8624, 25
+__func__.8624:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.8944,"a",@progbits
+	.section	.rodata.__func__.8937,"a",@progbits
 	.align	3
-	.set	.LANCHOR124,. + 0
-	.type	__func__.8944, %object
-	.size	__func__.8944, 20
-__func__.8944:
+	.set	.LANCHOR127,. + 0
+	.type	__func__.8937, %object
+	.size	__func__.8937, 20
+__func__.8937:
 	.string	"flash_die_info_init"
-	.section	.rodata.__func__.8954,"a",@progbits
+	.section	.rodata.__func__.8947,"a",@progbits
 	.align	3
 	.set	.LANCHOR8,. + 0
-	.type	__func__.8954, %object
-	.size	__func__.8954, 22
-__func__.8954:
+	.type	__func__.8947, %object
+	.size	__func__.8947, 22
+__func__.8947:
 	.string	"nand_flash_print_info"
-	.section	.rodata.__func__.8998,"a",@progbits
+	.section	.rodata.__func__.8991,"a",@progbits
 	.align	3
-	.set	.LANCHOR179,. + 0
-	.type	__func__.8998, %object
-	.size	__func__.8998, 16
-__func__.8998:
+	.set	.LANCHOR182,. + 0
+	.type	__func__.8991, %object
+	.size	__func__.8991, 16
+__func__.8991:
 	.string	"nand_flash_init"
-	.section	.rodata.__func__.9017,"a",@progbits
+	.section	.rodata.__func__.9011,"a",@progbits
 	.align	3
-	.set	.LANCHOR134,. + 0
-	.type	__func__.9017, %object
-	.size	__func__.9017, 11
-__func__.9017:
+	.set	.LANCHOR137,. + 0
+	.type	__func__.9011, %object
+	.size	__func__.9011, 11
+__func__.9011:
 	.string	"nandc_init"
-	.section	.rodata.__func__.9177,"a",@progbits
+	.section	.rodata.__func__.9171,"a",@progbits
 	.align	3
 	.set	.LANCHOR49,. + 0
-	.type	__func__.9177, %object
-	.size	__func__.9177, 13
-__func__.9177:
+	.type	__func__.9171, %object
+	.size	__func__.9171, 13
+__func__.9171:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9190,"a",@progbits
+	.section	.rodata.__func__.9184,"a",@progbits
 	.align	3
 	.set	.LANCHOR50,. + 0
-	.type	__func__.9190, %object
-	.size	__func__.9190, 10
-__func__.9190:
+	.type	__func__.9184, %object
+	.size	__func__.9184, 10
+__func__.9184:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9204,"a",@progbits
+	.section	.rodata.__func__.9198,"a",@progbits
 	.align	3
 	.set	.LANCHOR51,. + 0
-	.type	__func__.9204, %object
-	.size	__func__.9204, 16
-__func__.9204:
+	.type	__func__.9198, %object
+	.size	__func__.9198, 16
+__func__.9198:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9216,"a",@progbits
+	.section	.rodata.__func__.9210,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.9216, %object
-	.size	__func__.9216, 20
-__func__.9216:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.9210, %object
+	.size	__func__.9210, 20
+__func__.9210:
 	.string	"flash_info_blk_init"
-	.section	.rodata.__func__.9227,"a",@progbits
+	.section	.rodata.__func__.9221,"a",@progbits
 	.align	3
-	.set	.LANCHOR133,. + 0
-	.type	__func__.9227, %object
-	.size	__func__.9227, 21
-__func__.9227:
+	.set	.LANCHOR136,. + 0
+	.type	__func__.9221, %object
+	.size	__func__.9221, 21
+__func__.9221:
 	.string	"flash_into_data_init"
-	.section	.rodata.__func__.9249,"a",@progbits
+	.section	.rodata.__func__.9243,"a",@progbits
 	.align	3
-	.set	.LANCHOR178,. + 0
-	.type	__func__.9249, %object
-	.size	__func__.9249, 17
-__func__.9249:
+	.set	.LANCHOR181,. + 0
+	.type	__func__.9243, %object
+	.size	__func__.9243, 17
+__func__.9243:
 	.string	"flash_info_flush"
-	.section	.rodata.__func__.9322,"a",@progbits
+	.section	.rodata.__func__.9316,"a",@progbits
 	.align	3
-	.set	.LANCHOR128,. + 0
-	.type	__func__.9322, %object
-	.size	__func__.9322, 17
-__func__.9322:
+	.set	.LANCHOR131,. + 0
+	.type	__func__.9316, %object
+	.size	__func__.9316, 17
+__func__.9316:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9374,"a",@progbits
+	.section	.rodata.__func__.9368,"a",@progbits
 	.align	3
 	.set	.LANCHOR201,. + 0
-	.type	__func__.9374, %object
-	.size	__func__.9374, 17
-__func__.9374:
+	.type	__func__.9368, %object
+	.size	__func__.9368, 17
+__func__.9368:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9385,"a",@progbits
+	.section	.rodata.__func__.9379,"a",@progbits
 	.align	3
-	.set	.LANCHOR113,. + 0
-	.type	__func__.9385, %object
-	.size	__func__.9385, 14
-__func__.9385:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.9379, %object
+	.size	__func__.9379, 14
+__func__.9379:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9436,"a",@progbits
+	.section	.rodata.__func__.9430,"a",@progbits
 	.align	3
-	.set	.LANCHOR188,. + 0
-	.type	__func__.9436, %object
-	.size	__func__.9436, 15
-__func__.9436:
+	.set	.LANCHOR191,. + 0
+	.type	__func__.9430, %object
+	.size	__func__.9430, 15
+__func__.9430:
 	.string	"ftl_read_ahead"
-	.section	.rodata.__func__.9444,"a",@progbits
+	.section	.rodata.__func__.9438,"a",@progbits
 	.align	3
 	.set	.LANCHOR55,. + 0
-	.type	__func__.9444, %object
-	.size	__func__.9444, 13
-__func__.9444:
+	.type	__func__.9438, %object
+	.size	__func__.9438, 13
+__func__.9438:
 	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9482,"a",@progbits
+	.section	.rodata.__func__.9476,"a",@progbits
 	.align	3
 	.set	.LANCHOR197,. + 0
-	.type	__func__.9482, %object
-	.size	__func__.9482, 10
-__func__.9482:
+	.type	__func__.9476, %object
+	.size	__func__.9476, 10
+__func__.9476:
 	.string	"zftl_read"
-	.section	.rodata.__func__.9508,"a",@progbits
+	.section	.rodata.__func__.9502,"a",@progbits
 	.align	3
 	.set	.LANCHOR206,. + 0
-	.type	__func__.9508, %object
-	.size	__func__.9508, 13
-__func__.9508:
+	.type	__func__.9502, %object
+	.size	__func__.9502, 13
+__func__.9502:
 	.string	"_ftl_discard"
-	.section	.rodata.__func__.9549,"a",@progbits
+	.section	.rodata.__func__.9543,"a",@progbits
 	.align	3
 	.set	.LANCHOR198,. + 0
-	.type	__func__.9549, %object
-	.size	__func__.9549, 10
-__func__.9549:
+	.type	__func__.9543, %object
+	.size	__func__.9543, 10
+__func__.9543:
 	.string	"vpn_check"
-	.section	.rodata.__func__.9671,"a",@progbits
+	.section	.rodata.__func__.9665,"a",@progbits
 	.align	3
 	.set	.LANCHOR61,. + 0
-	.type	__func__.9671, %object
-	.size	__func__.9671, 12
-__func__.9671:
+	.type	__func__.9665, %object
+	.size	__func__.9665, 12
+__func__.9665:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9689,"a",@progbits
+	.section	.rodata.__func__.9683,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.9689, %object
-	.size	__func__.9689, 21
-__func__.9689:
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9683, %object
+	.size	__func__.9683, 21
+__func__.9683:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9723,"a",@progbits
+	.section	.rodata.__func__.9717,"a",@progbits
 	.align	3
 	.set	.LANCHOR194,. + 0
-	.type	__func__.9723, %object
-	.size	__func__.9723, 22
-__func__.9723:
+	.type	__func__.9717, %object
+	.size	__func__.9717, 22
+__func__.9717:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9736,"a",@progbits
+	.section	.rodata.__func__.9730,"a",@progbits
 	.align	3
 	.set	.LANCHOR66,. + 0
-	.type	__func__.9736, %object
-	.size	__func__.9736, 19
-__func__.9736:
+	.type	__func__.9730, %object
+	.size	__func__.9730, 19
+__func__.9730:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9765,"a",@progbits
+	.section	.rodata.__func__.9759,"a",@progbits
 	.align	3
 	.set	.LANCHOR203,. + 0
-	.type	__func__.9765, %object
-	.size	__func__.9765, 16
-__func__.9765:
+	.type	__func__.9759, %object
+	.size	__func__.9759, 16
+__func__.9759:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9787,"a",@progbits
+	.section	.rodata.__func__.9781,"a",@progbits
 	.align	3
-	.set	.LANCHOR97,. + 0
-	.type	__func__.9787, %object
-	.size	__func__.9787, 16
-__func__.9787:
+	.set	.LANCHOR101,. + 0
+	.type	__func__.9781, %object
+	.size	__func__.9781, 16
+__func__.9781:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9832,"a",@progbits
+	.section	.rodata.__func__.9826,"a",@progbits
 	.align	3
 	.set	.LANCHOR199,. + 0
-	.type	__func__.9832, %object
-	.size	__func__.9832, 16
-__func__.9832:
+	.type	__func__.9826, %object
+	.size	__func__.9826, 16
+__func__.9826:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9891,"a",@progbits
+	.section	.rodata.__func__.9885,"a",@progbits
 	.align	3
 	.set	.LANCHOR195,. + 0
-	.type	__func__.9891, %object
-	.size	__func__.9891, 20
-__func__.9891:
+	.type	__func__.9885, %object
+	.size	__func__.9885, 20
+__func__.9885:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9952,"a",@progbits
+	.section	.rodata.__func__.9946,"a",@progbits
 	.align	3
 	.set	.LANCHOR208,. + 0
-	.type	__func__.9952, %object
-	.size	__func__.9952, 11
-__func__.9952:
+	.type	__func__.9946, %object
+	.size	__func__.9946, 11
+__func__.9946:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
@@ -25320,7 +25390,7 @@ toshiba_ref_value:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
 .LC164:
-	.string	"FTL version: 6.0.6 20180402"
+	.string	"FTL version: 6.0.7 20180411"
 .LC165:
 	.string	"_c_user_data_density := %d\n"
 .LC166:

commit 41dd6e98d09f68a6f65276a29beda2805210fd46
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Apr 12 15:56:49 2018 +0800

    rockchip: clk: rk3128: add ofdata_to_platdata callback
    
    We need to init platdata from of data with ofdata_to_platdata callback.
    
    Change-Id: I9e8e9427767f9de84c9871d9a639e7fdb5319ba4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index c5d829d3bc..795b46bab5 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -547,11 +547,19 @@ static struct clk_ops rk3128_clk_ops = {
 	.set_rate	= rk3128_clk_set_rate,
 };
 
-static int rk3128_clk_probe(struct udevice *dev)
+static int rk3128_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
 	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk3128_clk_probe(struct udevice *dev)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(dev);
+
 	rkclk_init(priv->cru);
 
 	return 0;
@@ -604,6 +612,7 @@ U_BOOT_DRIVER(rockchip_rk3128_cru) = {
 	.id		= UCLASS_CLK,
 	.of_match	= rk3128_clk_ids,
 	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
+	.ofdata_to_platdata = rk3128_clk_ofdata_to_platdata,
 	.ops		= &rk3128_clk_ops,
 	.bind		= rk3128_clk_bind,
 	.probe		= rk3128_clk_probe,

commit dcad0909f85ecb025ac79d61920f7e13d8cd596a
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 18:07:12 2018 +0800

    rockchip/rk3288: update the fennce config to support the RK bootloader
    
    Change-Id: I78e0d93c76ae6111697daa2a540558b4b9febd03
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 5a4e98bdc2..ad5cb4bfc6 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_FENNEC_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec"
@@ -13,12 +14,11 @@ CONFIG_CONSOLE_MUX=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -32,6 +32,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -62,7 +63,6 @@ CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y

commit 55f2882c45d9095213af0cad9b1ca930c1307143
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 17:55:35 2018 +0800

    rockchip/rk3288: prevent fennce to build error with SPL
    
    As rk3288 enables the CONFIG_BOOTCOMMAN that will cause
    the build error with SPL enabled.
    
    Change-Id: I62972c354411cd7b8f93f8a465bef0e0096b615b
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h
index 15a374cca7..b031baa5ed 100644
--- a/include/configs/fennec_rk3288.h
+++ b/include/configs/fennec_rk3288.h
@@ -7,6 +7,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 

commit 60b6b279ac3102ec1c4a0c1c7e931090cb1f7623
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 14:44:45 2018 +0800

    rockchip/rk3288: update the evb config to support the RK bootloader
    
    Change-Id: Ibc066439830c70905adc4ebb49fe64e0df08b1c6
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 406d2284c7..d88ca692fb 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3288=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
@@ -12,12 +13,11 @@ CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -30,6 +30,7 @@ CONFIG_CMD_REGULATOR=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -62,7 +63,6 @@ CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y

commit a4cb27570155ae2002e1908585ee6926723e42a6
Author: Nickey Yang <nickey.yang@rock-chips.com>
Date:   Wed Apr 11 14:38:14 2018 +0800

    rockchip/rk3288: prevent to build error with SPL
    
    As rk3288 enables the CONFIG_BOOTCOMMAN that will cause
    the build error with SPL enabled.
    
    Change-Id: I3e66333ff38ee04e57cba172fc4f90aa74cb36e6
    Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h
index 15a374cca7..b031baa5ed 100644
--- a/include/configs/evb_rk3288.h
+++ b/include/configs/evb_rk3288.h
@@ -7,6 +7,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define ROCKCHIP_DEVICE_SETTINGS
 #include <configs/rk3288_common.h>
 

commit d6a621c7b2966492705d776a35fe914d6dbe029f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Apr 11 09:48:29 2018 +0800

    rockchip: rk3308: disable display mode
    
    Commit 5c651246bb4f ("drm/rockchip: vop: add support rk3308 vop")
    will crash u-boot on 64M DRAM system. So we should disable this module
    before it give a better solution.
    
    U-Boot 2017.09-01464-gc9fcc18-dirty (Apr 11 2018 - 09:44:54 +0800)
    
    Model: Rockchip RK3308 EVB
    DRAM:  "Synchronous Abort" handler, esr 0x96000040
    ELR:     2529d0
    LR:      20fe80
    x0 : ffffffffffe36f58 x1 : 0000000000000000
    x2 : 00000000000000a8 x3 : 0000000000000000
    x4 : 0000000000000000 x5 : 0000000000000015
    x6 : 00000000000000a8 x7 : 0000000000000044
    x8 : 0000000000003eb4 x9 : 0000000000000000
    x10: 00000000002fdc5c x11: 0000000000284e50
    x12: 0000000000001e18 x13: 00000000002fdb1c
    x14: 0000000000284e50 x15: 00000000002fdddc
    x16: 0000000000000000 x17: 0000000000000000
    x18: 00000000002fde80 x19: 000000000025ae28
    x20: 000000000025ad50 x21: 0000000000000000
    x22: 0000000000000000 x23: 0000000000000000
    x24: 0000000000000000 x25: 0000000000000000
    x26: 0000000000000000 x27: 0000000000000000
    x28: 0000000000000000 x29: 00000000002fde30
    
    Resetting CPU ...
    
    Change-Id: I2265c6fec08246978201de837adb85c74424d1c8
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index ec4b4839d1..65c45baf79 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -56,11 +56,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_RGB=y
-CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit 2c5e0b8507991f80918236a0e79fb75ba44ce097
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Apr 11 11:55:00 2018 +0800

    rockchip: px30: update default ramdisk load addr
    
    The origin addr 0x06000000 have risk for ramdisk size
    bigger than 0x02400000, which will touch the area of
    0x08400000(reserved by bl32) and system abort.
    
    Change-Id: Id5320b4e171ec7ff16bee64d0b60b381081537a9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index deea62fe9f..f2bbef6371 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -53,7 +53,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"ramdisk_addr_r=0x06000000\0"
+	"ramdisk_addr_r=0x0a200000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit aed5fe35557df67416e0b533e1aa2b0d16908beb
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 9 14:03:43 2018 +0800

    rockchip: dts: rk3308: adjust emmc io request
    
    make nandc io resource available instead of controlling by pinctrl
    
    Change-Id: I40c04e3f71223710c4f23649b45ef12b572ee0a8
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index becd964752..d4f016af16 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -379,8 +379,6 @@
 		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
 		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
 		status = "disabled";
 	};
 

commit c64990bc277137e3acee0160bb5f4eedc11ebbf6
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 9 12:07:30 2018 +0800

    rockchip: configs: evb-rk3308: enable nand driver
    
    Change-Id: I05e3ae1a0824119d0d389ab4322e389d8efea0d1
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 098079ca5c..ec4b4839d1 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -41,6 +41,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF0C0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit befb4f2e6a62b7470bbfa786b6eaec4ba74da596
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Mon Apr 9 12:01:16 2018 +0800

    rockchip: dts: rk3308: enable nandc node
    
    Change-Id: I20792b674f79d2244ced3c90568cc124c7284094
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index 9c30b35950..60bad75b5d 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -24,6 +24,11 @@
 	u-boot,dm-pre-reloc;
 };
 
+&nandc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &uart2 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;

commit c9fcc189ba0788413c687b81e5178c90e391871a
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Mar 28 17:33:25 2018 +0800

    drivers: rknand: update ftl for rk3226 and px30
    
    1. Fix gc data lost issue.
    2. support micron 2D MLC NAND support.
    3. Support upgrade loader
    
    Change-Id: Id2bb3b523b06ca6be1912dae2d835b465f715691
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 9351a7ddca..e85b4c2bc4 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-03-15
+ * date: 2018-04-02
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -34,79 +34,92 @@ flash_mem_cmp8:
 	.align	2
 	.type	_list_remove_node, %function
 _list_remove_node:
-	adrp	x3, .LANCHOR0
+	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 65535
-	mov	w5, 65535
-	ldr	x7, [x0]
-	ldr	x4, [x3, #:lo12:.LANCHOR0]
 	mov	w3, 6
-	umull	x1, w1, w3
-	add	x6, x4, x1
-	ldrh	w3, [x4, x1]
-	cmp	w3, w5
-	ldrh	w5, [x6, 2]
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR0
+	stp	x19, x20, [sp, 16]
+	umull	x20, w1, w3
+	stp	x23, x24, [sp, 48]
+	mov	w1, 65535
+	ldr	x24, [x21, #:lo12:.LANCHOR0]
+	add	x19, x24, x20
+	ldrh	w4, [x24, x20]
+	ldrh	w3, [x19, 2]
+	cmp	w4, w1
+	ldr	x1, [x0]
 	bne	.L7
-	cmp	w5, w3
+	cmp	w3, w4
 	bne	.L7
-	cmp	x6, x7
+	cmp	x19, x1
 	bne	.L6
 .L7:
-	mov	w8, 65535
-	cmp	w5, w8
+	mov	x22, x0
+	mov	x23, x2
+	mov	w0, 65535
+	cmp	w3, w0
 	bne	.L9
-	cmp	x6, x7
+	cmp	x19, x1
 	beq	.L9
-	stp	x29, x30, [sp, -16]!
 	adrp	x1, .LANCHOR1
 	adrp	x0, .LC0
-	mov	w2, 182
-	add	x29, sp, 0
+	mov	w2, 184
 	add	x1, x1, :lo12:.LANCHOR1
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L10:
-	b	.L10
 .L9:
-	cmp	x6, x7
-	mov	w7, 65535
+	ldr	x0, [x22]
+	ldrh	w3, [x24, x20]
+	cmp	x19, x0
+	mov	w0, 65535
+	bne	.L10
+	cmp	w3, w0
 	bne	.L11
-	cmp	w3, w7
-	bne	.L12
-	str	xzr, [x0]
-.L13:
+	str	xzr, [x22]
+.L12:
 	mov	w0, -1
-	strh	w0, [x4, x1]
-	strh	w0, [x6, 2]
-	ldrh	w0, [x2]
+	strh	w0, [x24, x20]
+	strh	w0, [x19, 2]
+	ldrh	w0, [x23]
 	sub	w0, w0, #1
-	strh	w0, [x2]
+	strh	w0, [x23]
 .L6:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-.L12:
-	mov	w5, 6
-	umaddl	x3, w3, w5, x4
-	str	x3, [x0]
-	mov	w0, -1
-	strh	w0, [x3, 2]
-	b	.L13
 .L11:
-	cmp	w3, w7
-	bne	.L14
-	cmp	w5, w3
-	beq	.L13
-	mov	w0, 6
-	umull	x5, w5, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR0]
+	mov	w1, 6
+	umaddl	x3, w3, w1, x0
 	mov	w0, -1
-	strh	w0, [x4, x5]
-	b	.L13
-.L14:
-	mov	w7, 6
-	umaddl	x0, w3, w7, x4
-	strh	w5, [x0, 2]
-	ldrh	w0, [x6, 2]
-	umull	x0, w0, w7
-	strh	w3, [x4, x0]
-	b	.L13
+	str	x3, [x22]
+	strh	w0, [x3, 2]
+	b	.L12
+.L10:
+	cmp	w3, w0
+	ldrh	w0, [x19, 2]
+	bne	.L13
+	cmp	w0, w3
+	beq	.L12
+	mov	w1, 6
+	mov	w2, -1
+	umull	x0, w0, w1
+	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	strh	w2, [x1, x0]
+	b	.L12
+.L13:
+	ldr	x1, [x21, #:lo12:.LANCHOR0]
+	mov	w2, 6
+	umaddl	x4, w3, w2, x1
+	strh	w0, [x4, 2]
+	ldrh	w0, [x19, 2]
+	umull	x0, w0, w2
+	strh	w3, [x1, x0]
+	b	.L12
 	.size	_list_remove_node, .-_list_remove_node
 	.section	.text._list_pop_index_node,"ax",@progbits
 	.align	2
@@ -116,15 +129,15 @@ _list_pop_index_node:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	ldr	x20, [x0]
-	cbz	x20, .L24
+	cbz	x20, .L21
 	adrp	x3, .LANCHOR0
 	and	w1, w1, 65535
 	mov	w4, 65535
 	mov	w5, 6
 	ldr	x19, [x3, #:lo12:.LANCHOR0]
+.L17:
+	cbnz	w1, .L18
 .L20:
-	cbnz	w1, .L21
-.L23:
 	sub	x19, x20, x19
 	mov	x1, -6148914691236517206
 	asr	x19, x19, 1
@@ -137,21 +150,21 @@ _list_pop_index_node:
 	strh	w0, [x20]
 	strh	w0, [x20, 2]
 	mov	w0, w19
-.L18:
+.L15:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L21:
+.L18:
 	ldrh	w3, [x20]
 	cmp	w3, w4
-	beq	.L23
+	beq	.L20
 	sub	w1, w1, #1
 	umaddl	x20, w3, w5, x19
 	and	w1, w1, 65535
-	b	.L20
-.L24:
+	b	.L17
+.L21:
 	mov	w0, 65535
-	b	.L18
+	b	.L15
 	.size	_list_pop_index_node, .-_list_pop_index_node
 	.section	.text._insert_free_list,"ax",@progbits
 	.align	2
@@ -161,7 +174,7 @@ _insert_free_list:
 	and	w1, w1, 65535
 	ldrh	w3, [x3, #:lo12:.LANCHOR2]
 	cmp	w3, w1
-	bls	.L26
+	bls	.L23
 	ldrh	w3, [x2]
 	mov	w5, 6
 	ldr	x8, [x0]
@@ -174,11 +187,11 @@ _insert_free_list:
 	add	x7, x6, x12
 	strh	w2, [x7, 2]
 	strh	w2, [x6, x12]
-	cbnz	x8, .L28
-.L33:
+	cbnz	x8, .L25
+.L30:
 	str	x7, [x0]
 	ret
-.L28:
+.L25:
 	adrp	x2, .LANCHOR3
 	mov	x3, -6148914691236517206
 	movk	x3, 0xaaab, lsl 0
@@ -197,7 +210,7 @@ _insert_free_list:
 	mul	x2, x2, x3
 	mov	x3, x8
 	and	w2, w2, 65535
-.L31:
+.L28:
 	ubfiz	x13, x2, 2, 16
 	ldr	w5, [x11, x13]
 	ldrh	w13, [x11, x13]
@@ -206,32 +219,32 @@ _insert_free_list:
 	add	w5, w13, w5, lsl 3
 	and	w5, w5, 4095
 	cmp	w4, w5
-	bls	.L29
+	bls	.L26
 	ldrh	w5, [x3]
 	cmp	w5, w14
-	bne	.L30
+	bne	.L27
 	strh	w2, [x7, 2]
 	strh	w1, [x3]
 	ret
-.L30:
+.L27:
 	umaddl	x3, w5, w10, x6
 	mov	w2, w5
-	b	.L31
-.L29:
+	b	.L28
+.L26:
 	ldrh	w4, [x3, 2]
 	cmp	x8, x3
 	strh	w4, [x7, 2]
 	strh	w2, [x6, x12]
-	bne	.L32
+	bne	.L29
 	strh	w1, [x8, 2]
-	b	.L33
-.L32:
+	b	.L30
+.L29:
 	ldrh	w0, [x3, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x6, x0]
 	strh	w1, [x3, 2]
-.L26:
+.L23:
 	ret
 	.size	_insert_free_list, .-_insert_free_list
 	.section	.text._insert_data_list,"ax",@progbits
@@ -242,7 +255,7 @@ _insert_data_list:
 	and	w1, w1, 65535
 	ldrh	w3, [x4, #:lo12:.LANCHOR2]
 	cmp	w3, w1
-	bls	.L50
+	bls	.L47
 	ldrh	w3, [x2]
 	mov	w11, 6
 	ldr	x8, [x0]
@@ -255,10 +268,10 @@ _insert_data_list:
 	add	x7, x6, x13
 	strh	w2, [x7, 2]
 	strh	w2, [x6, x13]
-	cbnz	x8, .L37
+	cbnz	x8, .L34
 	str	x7, [x0]
 	ret
-.L37:
+.L34:
 	stp	x29, x30, [sp, -32]!
 	adrp	x2, .LANCHOR4
 	mov	x3, -6148914691236517206
@@ -283,13 +296,13 @@ _insert_data_list:
 	adrp	x3, .LANCHOR3
 	ldr	x17, [x3, #:lo12:.LANCHOR3]
 	and	w2, w2, 65535
-.L45:
+.L42:
 	add	w10, w10, 1
 	and	w10, w10, 65535
 	cmp	w10, w30
-	bhi	.L34
+	bhi	.L31
 	cmp	w1, w2
-	beq	.L34
+	beq	.L31
 	uxtw	x4, w2
 	ldrh	w20, [x5, 4]
 	cmp	w20, 0
@@ -297,7 +310,7 @@ _insert_data_list:
 	mul	w3, w3, w20
 	csel	w3, w3, w12, ne
 	cmp	w14, w3
-	bne	.L41
+	bne	.L38
 	lsl	x4, x4, 2
 	ldr	w3, [x17, x4]
 	ldrh	w4, [x17, x4]
@@ -306,40 +319,40 @@ _insert_data_list:
 	add	w3, w4, w3, lsl 3
 	and	w3, w3, 4095
 	cmp	w16, w3
-	bhi	.L43
-.L42:
+	bhi	.L40
+.L39:
 	ldrh	w3, [x5, 2]
 	cmp	x8, x5
 	strh	w3, [x7, 2]
 	strh	w2, [x6, x13]
-	bne	.L46
+	bne	.L43
 	strh	w1, [x8, 2]
 	str	x7, [x0]
-	b	.L34
-.L41:
-	bcc	.L42
-.L43:
+	b	.L31
+.L38:
+	bcc	.L39
+.L40:
 	ldrh	w3, [x5]
 	cmp	w3, w19
-	bne	.L44
+	bne	.L41
 	strh	w2, [x7, 2]
 	strh	w1, [x5]
-.L34:
+.L31:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L44:
+.L41:
 	umaddl	x5, w3, w11, x6
 	mov	w2, w3
-	b	.L45
-.L46:
+	b	.L42
+.L43:
 	ldrh	w0, [x5, 2]
 	mov	w2, 6
 	umull	x0, w0, w2
 	strh	w1, [x6, x0]
 	strh	w1, [x5, 2]
-	b	.L34
-.L50:
+	b	.L31
+.L47:
 	ret
 	.size	_insert_data_list, .-_insert_data_list
 	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
@@ -347,26 +360,26 @@ _insert_data_list:
 	.type	_list_get_gc_head_node.isra.2, %function
 _list_get_gc_head_node.isra.2:
 	and	w1, w1, 65535
-	cbz	x0, .L57
+	cbz	x0, .L54
 	adrp	x2, .LANCHOR0
 	mov	w3, 65535
 	mov	w4, 6
 	ldr	x2, [x2, #:lo12:.LANCHOR0]
-.L54:
-	cbz	w1, .L55
+.L51:
+	cbz	w1, .L52
 	ldrh	w0, [x0]
 	cmp	w0, w3
-	bne	.L56
+	bne	.L53
 	ret
-.L56:
+.L53:
 	sub	w1, w1, #1
 	umaddl	x0, w0, w4, x2
 	and	w1, w1, 65535
-	b	.L54
-.L57:
+	b	.L51
+.L54:
 	mov	w0, 65535
 	ret
-.L55:
+.L52:
 	sub	x0, x0, x2
 	mov	x1, -6148914691236517206
 	asr	x0, x0, 1
@@ -379,71 +392,81 @@ _list_get_gc_head_node.isra.2:
 	.align	2
 	.type	_list_update_data_list, %function
 _list_update_data_list:
-	stp	x29, x30, [sp, -48]!
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w19, w1, 65535
 	adrp	x1, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	ldrh	w3, [x1, 16]
-	str	x21, [sp, 32]
+	str	x25, [sp, 64]
 	cmp	w3, w19
-	beq	.L59
+	beq	.L56
 	ldrh	w3, [x1, 48]
 	cmp	w3, w19
-	beq	.L59
+	beq	.L56
 	ldrh	w1, [x1, 80]
 	cmp	w1, w19
-	beq	.L59
+	beq	.L56
 	adrp	x1, .LANCHOR0
-	mov	w3, 6
-	ldr	x4, [x1, #:lo12:.LANCHOR0]
-	umull	x3, w19, w3
-	ldr	x1, [x0]
-	add	x5, x4, x3
-	cmp	x5, x1
-	beq	.L59
-	ldrh	w1, [x5, 2]
+	mov	w22, 6
+	ldr	x3, [x0]
+	mov	x25, x1
+	umull	x22, w19, w22
+	ldr	x24, [x1, #:lo12:.LANCHOR0]
+	add	x23, x24, x22
+	cmp	x23, x3
+	beq	.L56
 	mov	x20, x0
+	ldrh	w0, [x23, 2]
+	mov	w1, 65535
 	mov	x21, x2
-	mov	w0, 65535
-	cmp	w1, w0
-	bne	.L61
-	ldrh	w0, [x4, x3]
 	cmp	w0, w1
-	bne	.L61
+	bne	.L60
+	ldrh	w1, [x24, x22]
+	cmp	w1, w0
+	bne	.L60
 	adrp	x1, .LANCHOR6
 	adrp	x0, .LC0
-	mov	w2, 249
+	mov	w2, 251
 	add	x1, x1, :lo12:.LANCHOR6
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L62:
-	b	.L62
+.L60:
+	ldrh	w1, [x23, 2]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L61
+	ldrh	w0, [x24, x22]
+	cmp	w0, w1
+	beq	.L56
 .L61:
 	adrp	x0, .LANCHOR4
 	ubfiz	x2, x19, 1, 16
-	ldrh	w5, [x5, 4]
-	mov	w6, -1
+	mov	x5, -6148914691236517206
+	mov	w4, -1
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	cmp	w5, 0
+	movk	x5, 0xaaab, lsl 0
 	ldrh	w3, [x0, x2]
+	ldrh	w2, [x23, 4]
+	cmp	w2, 0
+	mul	w3, w3, w2
 	mov	w2, 6
 	umull	x1, w1, w2
-	mov	x2, -6148914691236517206
-	movk	x2, 0xaaab, lsl 0
-	mul	w3, w3, w5
-	asr	x5, x1, 1
-	add	x1, x4, x1
-	csel	w3, w3, w6, ne
-	mul	x5, x5, x2
+	csel	w3, w3, w4, ne
+	asr	x2, x1, 1
+	mul	x2, x2, x5
+	ldrh	w0, [x0, x2, lsl 1]
+	ldr	x2, [x25, #:lo12:.LANCHOR0]
+	add	x1, x2, x1
 	ldrh	w1, [x1, 4]
 	cmp	w1, 0
-	ldrh	w0, [x0, x5, lsl 1]
 	mul	w0, w0, w1
-	csel	w0, w0, w6, ne
+	csel	w0, w0, w4, ne
 	cmp	w3, w0
-	bcs	.L59
+	bcs	.L56
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
@@ -451,14 +474,18 @@ _list_update_data_list:
 	mov	x2, x21
 	mov	w1, w19
 	mov	x0, x20
-	ldr	x21, [sp, 32]
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	b	_insert_data_list
-.L59:
+.L56:
 	ldp	x19, x20, [sp, 16]
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
 	.size	_list_update_data_list, .-_list_update_data_list
 	.section	.text.nand_flash_print_info,"ax",@progbits
@@ -466,110 +493,409 @@ _list_update_data_list:
 	.global	nand_flash_print_info
 	.type	nand_flash_print_info, %function
 nand_flash_print_info:
-	ret
-	.size	nand_flash_print_info, .-nand_flash_print_info
-	.section	.text.timer_delay_ns,"ax",@progbits
-	.align	2
-	.global	timer_delay_ns
-	.type	timer_delay_ns, %function
-timer_delay_ns:
-	sub	sp, sp, #16
-	lsr	w0, w0, 4
-	str	w0, [sp, 12]
-.L70:
-	ldr	w0, [sp, 12]
-	sub	w1, w0, #1
-	str	w1, [sp, 12]
-	cbnz	w0, .L70
-	add	sp, sp, 16
-	ret
-	.size	timer_delay_ns, .-timer_delay_ns
-	.section	.text.flash_read_status,"ax",@progbits
-	.align	2
-	.global	flash_read_status
-	.type	flash_read_status, %function
-flash_read_status:
-	stp	x29, x30, [sp, -16]!
-	mov	x2, x0
-	mov	w0, 112
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	str	w0, [x2, 8]
-	mov	w0, 120
-	bl	timer_delay_ns
-	ldr	w0, [x2]
-	ldp	x29, x30, [sp], 16
-	and	w0, w0, 255
-	ret
-	.size	flash_read_status, .-flash_read_status
-	.section	.text.toshiba_set_rr_para,"ax",@progbits
-	.align	2
-	.global	toshiba_set_rr_para
-	.type	toshiba_set_rr_para, %function
-toshiba_set_rr_para:
-	and	w11, w1, 255
-	mov	x4, x0
-	add	w2, w11, 1
-	mov	w0, 5
-	adrp	x6, .LANCHOR11
-	add	x6, x6, :lo12:.LANCHOR11
-	adrp	x3, .LANCHOR7
-	add	x3, x3, :lo12:.LANCHOR7
-	umull	x2, w2, w0
-	adrp	x0, .LANCHOR8
-	add	x7, x0, :lo12:.LANCHOR8
-	mov	x5, x0
-	ldrb	w0, [x6]
-	add	x3, x3, x2
-	add	x7, x7, x2
-	adrp	x8, .LANCHOR9
-	mov	x2, 0
-	adrp	x10, .LANCHOR10
-	add	x8, x8, :lo12:.LANCHOR9
-	add	x10, x10, :lo12:.LANCHOR10
-	cmp	w0, w2
-	bhi	.L83
-	ret
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR7
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L68
+	adrp	x1, .LANCHOR8
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR8
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L68:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L69
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w6, [x0, 6]
+	ldrb	w5, [x0, 5]
+	ldrb	w4, [x0, 4]
+	ldrb	w3, [x0, 3]
+	ldrb	w2, [x0, 2]
+	ldrb	w1, [x0, 1]
+	adrp	x0, .LC2
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.L69:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L70
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 8]
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.L70:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L71
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 9]
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+.L71:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L72
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 10]
+	adrp	x0, .LC5
+	add	x0, x0, :lo12:.LC5
+	bl	printf
+.L72:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L73
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 12]
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L73:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L74
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 13]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L74:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L75
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 14]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L75:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L76
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 23]
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+.L76:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L77
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 18]
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
 .L77:
-	cmp	w0, 35
-	bne	.L79
-	ldrsb	w0, [x3, x2]
-	b	.L84
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L78
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 19]
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.L78:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L79
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 20]
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
 .L79:
-	ldrsb	w0, [x10, w11, sxtw]
-	b	.L84
-.L83:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L80
+	adrp	x0, .LANCHOR10
+	ldrb	w1, [x0, #:lo12:.LANCHOR10]
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
+	bl	printf
 .L80:
-	mov	w0, 85
-	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR8
-	ldrsb	w0, [x2, x0]
-	str	w0, [x4, 4]
-	mov	w0, 200
-	bl	timer_delay_ns
-	ldrb	w0, [x8]
-	cmp	w0, 34
-	bne	.L77
-	ldrsb	w0, [x7, x2]
-.L84:
-	str	w0, [x4]
-	add	x2, x2, 1
-	ldrb	w0, [x6]
-	cmp	w0, w2
-	bhi	.L80
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
-	.section	.text.hynix_set_rr_para,"ax",@progbits
-	.align	2
-	.type	hynix_set_rr_para, %function
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L81
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.L81:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L82
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 22]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.L82:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L83
+	adrp	x0, .LANCHOR12
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LC16
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L83:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L84
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 16]
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	and	w1, w1, 1
+	bl	printf
+.L84:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L85
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	ubfx	x1, x1, 1, 1
+	bl	printf
+.L85:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L86
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	ubfx	x1, x1, 2, 1
+	bl	printf
+.L86:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L87
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	ubfx	x1, x1, 3, 1
+	bl	printf
+.L87:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L88
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
+	ubfx	x1, x1, 4, 1
+	bl	printf
+.L88:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L89
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	ubfx	x1, x1, 5, 1
+	bl	printf
+.L89:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L90
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	ubfx	x1, x1, 6, 1
+	bl	printf
+.L90:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L91
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	ubfx	x1, x1, 7, 1
+	bl	printf
+.L91:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L92
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w1, [x0, 17]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	and	w1, w1, 1
+	bl	printf
+.L92:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L93
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	ubfx	x1, x1, 9, 1
+	bl	printf
+.L93:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L94
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	ubfx	x1, x1, 10, 1
+	bl	printf
+.L94:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L95
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LC14
+	add	x0, x0, :lo12:.LC14
+	bl	printf
+.L95:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L96
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	ldrb	w2, [x0, 11]
+	ldrb	w1, [x0, 10]
+	adrp	x0, .LC28
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.L96:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L97
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
+	ldrb	w2, [x0, 9]
+	ldrb	w1, [x0, 8]
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+.L97:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L67
+	adrp	x0, .LANCHOR14
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ldrb	w1, [x0, #:lo12:.LANCHOR14]
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
+	b	printf
+.L67:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.timer_delay_ns,"ax",@progbits
+	.align	2
+	.global	timer_delay_ns
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	sub	sp, sp, #16
+	lsr	w0, w0, 4
+	str	w0, [sp, 12]
+.L191:
+	ldr	w0, [sp, 12]
+	sub	w1, w0, #1
+	str	w1, [sp, 12]
+	cbnz	w0, .L191
+	add	sp, sp, 16
+	ret
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",@progbits
+	.align	2
+	.global	flash_read_status
+	.type	flash_read_status, %function
+flash_read_status:
+	stp	x29, x30, [sp, -16]!
+	mov	x2, x0
+	mov	w0, 112
+	add	x29, sp, 0
+	str	w0, [x2, 8]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldr	w0, [x2]
+	ldp	x29, x30, [sp], 16
+	and	w0, w0, 255
+	ret
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_set_rr_para
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	and	w11, w1, 255
+	mov	x4, x0
+	add	w2, w11, 1
+	mov	w0, 5
+	adrp	x6, .LANCHOR19
+	add	x6, x6, :lo12:.LANCHOR19
+	adrp	x3, .LANCHOR15
+	add	x3, x3, :lo12:.LANCHOR15
+	umull	x2, w2, w0
+	adrp	x0, .LANCHOR16
+	add	x7, x0, :lo12:.LANCHOR16
+	mov	x5, x0
+	ldrb	w0, [x6]
+	add	x3, x3, x2
+	add	x7, x7, x2
+	adrp	x8, .LANCHOR17
+	mov	x2, 0
+	adrp	x10, .LANCHOR18
+	add	x8, x8, :lo12:.LANCHOR17
+	add	x10, x10, :lo12:.LANCHOR18
+	cmp	w0, w2
+	bhi	.L204
+	ret
+.L198:
+	cmp	w0, 35
+	bne	.L200
+	ldrsb	w0, [x3, x2]
+	b	.L205
+.L200:
+	ldrsb	w0, [x10, w11, sxtw]
+	b	.L205
+.L204:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L201:
+	mov	w0, 85
+	str	w0, [x4, 8]
+	add	x0, x5, :lo12:.LANCHOR16
+	ldrsb	w0, [x2, x0]
+	str	w0, [x4, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	ldrb	w0, [x8]
+	cmp	w0, 34
+	bne	.L198
+	ldrsb	w0, [x7, x2]
+.L205:
+	str	w0, [x4]
+	add	x2, x2, 1
+	ldrb	w0, [x6]
+	cmp	w0, w2
+	bhi	.L201
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",@progbits
+	.align	2
+	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR12
+	adrp	x2, .LANCHOR20
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR12]
+	ldr	x2, [x2, #:lo12:.LANCHOR20]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -580,19 +906,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR13
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR21
+	ldr	x3, [x1, #:lo12:.LANCHOR21]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L91
+	bhi	.L212
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L91:
+.L212:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L87:
+.L208:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -601,7 +927,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L87
+	bhi	.L208
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -612,29 +938,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR9
-	ldrb	w1, [x1, #:lo12:.LANCHOR9]
+	adrp	x1, .LANCHOR17
+	ldrb	w1, [x1, #:lo12:.LANCHOR17]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L98
-	adrp	x8, .LANCHOR12
+	bhi	.L219
+	adrp	x8, .LANCHOR20
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR12]
+	ldr	x1, [x8, #:lo12:.LANCHOR20]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L98
+	cbz	w1, .L219
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR12]
+	ldr	x0, [x8, #:lo12:.LANCHOR20]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L98:
+.L219:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -642,20 +968,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR14
+	adrp	x1, .LANCHOR22
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR21
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	ldr	x2, [x2, #:lo12:.LANCHOR21]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L102
+	bne	.L223
 	str	w1, [x2, 80]
 	ret
-.L102:
+.L223:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -664,43 +990,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
-	bne	.L105
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	bne	.L226
 	ldr	w0, [x0, 80]
-.L107:
+.L228:
 	ubfx	x0, x0, 8, 8
 	ret
-.L105:
+.L226:
 	ldr	w0, [x0, 304]
-	b	.L107
+	b	.L228
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR13]
+	ldr	x2, [x1, #:lo12:.LANCHOR21]
 	ldr	w1, [x2]
-	beq	.L109
+	beq	.L230
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR22
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L111
+	bne	.L232
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -708,10 +1034,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L112:
+.L233:
 	str	w1, [x2]
 	ret
-.L111:
+.L232:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -719,20 +1045,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L112
-.L109:
+	b	.L233
+.L230:
 	and	w1, w1, -8193
-	b	.L112
+	b	.L233
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR13]
+	ldr	x3, [x1, #:lo12:.LANCHOR21]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -743,8 +1069,8 @@ nandc_cs:
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR13
-	ldr	x1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR21
+	ldr	x1, [x0, #:lo12:.LANCHOR21]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -756,57 +1082,57 @@ nandc_de_cs:
 	.global	flash_wait_device_ready_raw
 	.type	flash_wait_device_ready_raw, %function
 flash_wait_device_ready_raw:
-	stp	x29, x30, [sp, -16]!
-	mov	w5, w1
-	adrp	x1, .LANCHOR15
-	and	w0, w0, 255
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cmp	w1, w0
-	bhi	.L118
-	adrp	x1, .LANCHOR16
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR12
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	mov	w20, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	cmp	w0, w21
+	bhi	.L239
+	adrp	x1, .LANCHOR23
 	adrp	x0, .LC0
-	mov	w2, 620
-	add	x1, x1, :lo12:.LANCHOR16
+	mov	w2, 599
+	add	x1, x1, :lo12:.LANCHOR23
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L119:
-	b	.L119
-.L118:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	w7, w2
-	ldrb	w6, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w6
+.L239:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w5, [x0, w21, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x4, [x0, #:lo12:.LANCHOR21]
+	mov	w0, w5
 	bl	nandc_cs
-	ubfiz	x3, x6, 8, 8
-	add	x3, x4, x3
+	ubfiz	x2, x5, 8, 8
+	lsr	w6, w19, 8
+	lsr	w7, w19, 16
+	and	w19, w19, 255
+	add	x2, x4, x2
+	mov	w4, 120
+.L242:
+	str	w4, [x2, 2056]
 	mov	w0, 120
-	and	w1, w5, 255
-	str	w0, [x3, 2056]
-	str	w1, [x3, 2052]
-	lsr	w1, w5, 8
-	str	w1, [x3, 2052]
-	lsr	w5, w5, 16
-	str	w5, [x3, 2052]
-.L126:
+	str	w19, [x2, 2052]
+	str	w6, [x2, 2052]
+	str	w7, [x2, 2052]
 	bl	timer_delay_ns
-	ldr	w2, [x3, 2048]
-	and	w2, w2, 255
-	bics	wzr, w7, w2
-	bne	.L121
-	cmp	w2, 255
-	beq	.L121
-	mov	w0, w6
+	ldr	w3, [x2, 2048]
+	and	w3, w3, 255
+	bics	wzr, w20, w3
+	bne	.L242
+	cmp	w3, 255
+	beq	.L242
+	mov	w0, w5
 	bl	nandc_de_cs
-	ldp	x29, x30, [sp], 16
-	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	mov	w0, w3
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.L121:
-	mov	w0, 20
-	b	.L126
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",@progbits
 	.align	2
@@ -817,31 +1143,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L128
-	adrp	x0, .LANCHOR18
-	adrp	x5, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L129
-	ldrb	w0, [x5, #:lo12:.LANCHOR19]
-	cbz	w0, .L128
-.L129:
-	adrp	x0, .LANCHOR20
-	ldrh	w3, [x0, #:lo12:.LANCHOR20]
-	ldrb	w0, [x5, #:lo12:.LANCHOR19]
+	bne	.L246
+	adrp	x0, .LANCHOR11
+	adrp	x5, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L247
+	ldrb	w0, [x5, #:lo12:.LANCHOR25]
+	cbz	w0, .L246
+.L247:
+	adrp	x0, .LANCHOR26
+	ldrh	w3, [x0, #:lo12:.LANCHOR26]
+	ldrb	w0, [x5, #:lo12:.LANCHOR25]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L130
+	cbz	w0, .L248
 	add	w1, w4, w3, lsl 1
-.L128:
+.L246:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L130:
-	adrp	x5, .LANCHOR21
-	add	x5, x5, :lo12:.LANCHOR21
+.L248:
+	adrp	x5, .LANCHOR27
+	add	x5, x5, :lo12:.LANCHOR27
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L128
+	b	.L246
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -851,25 +1177,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR13
+	adrp	x3, .LANCHOR21
 	add	x29, sp, 0
-.L139:
+.L257:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR13]
+	ldr	x0, [x3, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L140
+	tbnz	x0, 9, .L258
 	subs	w2, w2, #1
-	bne	.L139
+	bne	.L257
 	mov	w0, -1
-.L137:
+.L255:
 	ldp	x29, x30, [sp], 32
 	ret
-.L140:
+.L258:
 	mov	w0, 0
-	b	.L137
+	b	.L255
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -887,35 +1213,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR11
-	adrp	x2, .LANCHOR7
-	add	x2, x2, :lo12:.LANCHOR7
-	ldrb	w4, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR9
-	ldrb	w5, [x0, #:lo12:.LANCHOR9]
+	adrp	x0, .LANCHOR19
+	adrp	x2, .LANCHOR15
+	add	x2, x2, :lo12:.LANCHOR15
+	ldrb	w4, [x0, #:lo12:.LANCHOR19]
+	adrp	x0, .LANCHOR17
+	ldrb	w5, [x0, #:lo12:.LANCHOR17]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR8
-	add	x0, x0, :lo12:.LANCHOR8
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L144:
+.L262:
 	cmp	w4, w0
-	bhi	.L147
+	bhi	.L265
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L147:
+.L265:
 	cmp	w5, 67
-	bne	.L145
+	bne	.L263
 	ldrsb	w6, [x1, x0]
-.L149:
+.L267:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L144
-.L145:
+	b	.L262
+.L263:
 	ldrsb	w6, [x2, x0]
-	b	.L149
+	b	.L267
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -934,8 +1260,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR22
-	add	x0, x0, :lo12:.LANCHOR22
+	adrp	x0, .LANCHOR28
+	add	x0, x0, :lo12:.LANCHOR28
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -970,8 +1296,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR23
-	add	x2, x2, :lo12:.LANCHOR23
+	adrp	x2, .LANCHOR29
+	add	x2, x2, :lo12:.LANCHOR29
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -987,7 +1313,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L154
+	cbz	w2, .L272
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -996,8 +1322,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR24
-	add	x0, x0, :lo12:.LANCHOR24
+	adrp	x0, .LANCHOR30
+	add	x0, x0, :lo12:.LANCHOR30
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -1019,58 +1345,61 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L157:
+.L275:
 	b	nandc_wait_flash_ready
-.L154:
+.L272:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR25
-	add	x2, x2, :lo12:.LANCHOR25
+	adrp	x2, .LANCHOR31
+	add	x2, x2, :lo12:.LANCHOR31
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L157
+	b	.L275
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
 	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
 	.global	zftl_flash_enter_slc_mode
 	.type	zftl_flash_enter_slc_mode, %function
 zftl_flash_enter_slc_mode:
-	adrp	x1, .LANCHOR18
+	adrp	x1, .LANCHOR11
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR18]
-	cbz	w2, .L160
-	adrp	x1, .LANCHOR13
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L278
+	adrp	x1, .LANCHOR21
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L163
-.L180:
-	adrp	x2, .LANCHOR26+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR26+29]
-	cbz	w2, .L160
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	bne	.L281
+.L298:
+	adrp	x2, .LANCHOR32+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR32+29]
+	cbz	w2, .L278
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L163:
+.L281:
 	cmp	w2, 2
-	bne	.L165
-	adrp	x2, .LANCHOR27
-	ldrb	w3, [x2, #:lo12:.LANCHOR27]
-	cbz	w3, .L160
-	strb	wzr, [x2, #:lo12:.LANCHOR27]
-	b	.L180
-.L165:
+	bne	.L283
+	adrp	x2, .LANCHOR33
+	add	x2, x2, :lo12:.LANCHOR33
+	ldrb	w3, [x2, x0]
+	cbz	w3, .L278
+	strb	wzr, [x2, x0]
+	b	.L298
+.L283:
 	cmp	w2, 3
-	bne	.L160
-	adrp	x2, .LANCHOR27
-	ldrb	w3, [x2, #:lo12:.LANCHOR27]
-	cbz	w3, .L160
+	bne	.L278
+	adrp	x2, .LANCHOR33
+	sxtw	x3, w0
+	add	x2, x2, :lo12:.LANCHOR33
+	ldrb	w4, [x2, x3]
+	cbz	w4, .L278
 	ubfiz	x0, x0, 8, 8
-	strb	wzr, [x2, #:lo12:.LANCHOR27]
+	strb	wzr, [x2, x3]
 	add	x0, x1, x0
 	mov	w1, 239
 	str	w1, [x0, 2056]
@@ -1082,7 +1411,7 @@ zftl_flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L160:
+.L278:
 	ret
 	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
 	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
@@ -1090,115 +1419,208 @@ zftl_flash_enter_slc_mode:
 	.global	zftl_flash_exit_slc_mode
 	.type	zftl_flash_exit_slc_mode, %function
 zftl_flash_exit_slc_mode:
-	adrp	x1, .LANCHOR18
+	adrp	x1, .LANCHOR11
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR18]
-	cbz	w2, .L181
-	adrp	x1, .LANCHOR13
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L299
+	adrp	x1, .LANCHOR21
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L184
-	adrp	x2, .LANCHOR26+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR26+30]
-.L201:
-	cbz	w2, .L181
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	bne	.L302
+	adrp	x2, .LANCHOR32+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR32+30]
+.L319:
+	cbz	w2, .L299
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L184:
+.L302:
 	cmp	w2, 2
-	bne	.L186
-	adrp	x4, .LANCHOR27
-	ldrb	w2, [x4, #:lo12:.LANCHOR27]
-	cbnz	w2, .L181
-	adrp	x2, .LANCHOR26
-	add	x2, x2, :lo12:.LANCHOR26
+	bne	.L304
+	adrp	x3, .LANCHOR33
+	add	x3, x3, :lo12:.LANCHOR33
+	ldrb	w2, [x3, x0]
+	cbnz	w2, .L299
+	adrp	x2, .LANCHOR32
+	add	x2, x2, :lo12:.LANCHOR32
 	mov	w5, 4
-	ldrb	w3, [x2, 12]
+	ldrb	w4, [x2, 12]
 	ldrb	w2, [x2, 30]
-	cmp	w3, 2
-	csel	w3, w3, w5, eq
-	strb	w3, [x4, #:lo12:.LANCHOR27]
-	b	.L201
-.L186:
+	cmp	w4, 2
+	csel	w4, w4, w5, eq
+	strb	w4, [x3, x0]
+	b	.L319
+.L304:
 	cmp	w2, 3
-	bne	.L181
-	adrp	x3, .LANCHOR27
-	ldrb	w2, [x3, #:lo12:.LANCHOR27]
-	cbnz	w2, .L181
+	bne	.L299
+	adrp	x3, .LANCHOR33
+	sxtw	x4, w0
+	add	x3, x3, :lo12:.LANCHOR33
+	ldrb	w2, [x3, x4]
+	cbnz	w2, .L299
 	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR26+12
+	adrp	x2, .LANCHOR32+12
 	add	x0, x1, x0
 	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR26+12]
-	mov	w4, 4
+	ldrb	w2, [x2, #:lo12:.LANCHOR32+12]
+	mov	w5, 4
 	str	w1, [x0, 2056]
 	cmp	w2, 2
 	mov	w1, 145
 	str	w1, [x0, 2052]
-	csel	w2, w2, w4, eq
+	csel	w2, w2, w5, eq
 	str	w2, [x0, 2048]
 	mov	w1, 1
 	str	w1, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-	strb	w2, [x3, #:lo12:.LANCHOR27]
+	strb	w2, [x3, x4]
 	b	nandc_wait_flash_ready
-.L181:
+.L299:
 	ret
 	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
-	.section	.text.flash_erase_duplane_block,"ax",@progbits
+	.section	.text.flash_start_page_read,"ax",@progbits
+	.align	2
+	.global	flash_start_page_read
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR12
+	stp	x21, x22, [sp, 32]
+	ubfx	x22, x1, 21, 3
+	and	w19, w1, 2097151
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ubfx	x21, x1, 24, 2
+	cmp	w0, w22
+	bhi	.L321
+	adrp	x1, .LANCHOR34
+	adrp	x0, .LC0
+	mov	w2, 736
+	add	x1, x1, :lo12:.LANCHOR34
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L321:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w7, [x0, w22, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x6, [x0, #:lo12:.LANCHOR21]
+	mov	w0, w7
+	bl	nandc_cs
+	cbnz	w21, .L322
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L323
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L324
+.L323:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L325
+	add	w19, w0, w19, lsl 1
+.L324:
+	mov	w0, w7
+	bl	zftl_flash_enter_slc_mode
+	b	.L326
+.L325:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+.L326:
+	ubfiz	x0, x7, 8, 8
+	and	w1, w19, 255
+	add	x0, x6, x0
+	ldp	x21, x22, [sp, 32]
+	str	wzr, [x0, 2056]
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	str	w1, [x0, 2052]
+	lsr	w19, w19, 16
+	str	w19, [x0, 2052]
+	str	w20, [x0, 2056]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+.L322:
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L327
+	sxtw	x0, w7
+	add	x0, x0, 8
+	add	x0, x6, x0, lsl 8
+	str	w21, [x0, 8]
+	b	.L326
+.L327:
+	mov	w0, w7
+	bl	zftl_flash_exit_slc_mode
+	b	.L326
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
 	.global	flash_erase_duplane_block
 	.type	flash_erase_duplane_block, %function
 flash_erase_duplane_block:
 	stp	x29, x30, [sp, -80]!
-	and	w0, w0, 255
 	add	x29, sp, 0
-	str	x25, [sp, 64]
-	and	w25, w1, 255
-	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	str	x25, [sp, 64]
+	mov	w22, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	w21, w3
 	stp	x23, x24, [sp, 48]
-	cmp	w1, w0
-	bhi	.L203
-	adrp	x1, .LANCHOR28
+	and	w25, w1, 255
+	cmp	w0, w19
+	bhi	.L333
+	adrp	x1, .LANCHOR35
 	adrp	x0, .LC0
-	mov	w2, 531
-	add	x1, x1, :lo12:.LANCHOR28
+	mov	w2, 510
+	add	x1, x1, :lo12:.LANCHOR35
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L204:
-	b	.L204
-.L203:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	w22, w2
-	mov	w21, w3
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+.L333:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w20, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x24, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR7
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	add	x23, x19, 8
 	add	x23, x24, x23, lsl 8
-	tbz	x0, 4, .L205
-	adrp	x0, .LC1
+	tbz	x0, 4, .L334
+	adrp	x0, .LC31
+	mov	w3, w21
+	mov	w2, w22
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC1
+	add	x0, x0, :lo12:.LC31
 	bl	printf
-.L205:
+.L334:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w25, .L206
+	cbnz	w25, .L335
 	bl	zftl_flash_enter_slc_mode
-.L207:
+.L336:
 	add	x24, x24, x19, lsl 8
 	mov	w0, 96
 	str	w0, [x24, 2056]
@@ -1208,9 +1630,9 @@ flash_erase_duplane_block:
 	str	w0, [x24, 2052]
 	lsr	w0, w22, 16
 	str	w0, [x24, 2052]
-	adrp	x0, .LANCHOR30
-	ldrb	w0, [x0, #:lo12:.LANCHOR30]
-	cbnz	w0, .L210
+	adrp	x0, .LANCHOR36
+	ldrb	w0, [x0, #:lo12:.LANCHOR36]
+	cbnz	w0, .L339
 	mov	w0, 208
 	str	w0, [x24, 2056]
 	mov	w19, 5
@@ -1218,7 +1640,7 @@ flash_erase_duplane_block:
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L208:
+.L337:
 	mov	w0, 96
 	str	w0, [x24, 2056]
 	and	w0, w21, 255
@@ -1238,12 +1660,12 @@ flash_erase_duplane_block:
 	bl	nandc_de_cs
 	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L209
-	adrp	x0, .LC2
+	cbz	w19, .L338
+	adrp	x0, .LC32
 	mov	w1, w22
-	add	x0, x0, :lo12:.LC2
+	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L209:
+.L338:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -1251,100 +1673,101 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L206:
+.L335:
 	bl	zftl_flash_exit_slc_mode
-	b	.L207
-.L210:
+	b	.L336
+.L339:
 	mov	w5, 0
-	b	.L208
+	b	.L337
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
 	.global	flash_erase_block_en
 	.type	flash_erase_block_en, %function
 flash_erase_block_en:
-	stp	x29, x30, [sp, -64]!
-	and	w0, w0, 255
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w1, 255
-	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
-	cmp	w1, w0
-	bhi	.L219
-	adrp	x1, .LANCHOR31
+	str	x25, [sp, 64]
+	mov	w21, w2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	and	w22, w2, 2097151
+	stp	x23, x24, [sp, 48]
+	and	w25, w1, 255
+	cmp	w0, w19
+	bhi	.L348
+	adrp	x1, .LANCHOR37
 	adrp	x0, .LC0
-	mov	w2, 576
-	add	x1, x1, :lo12:.LANCHOR31
+	mov	w2, 555
+	add	x1, x1, :lo12:.LANCHOR37
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L220:
-	b	.L220
-.L219:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	w21, w2
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x23, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+.L348:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w20, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x24, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR7
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	add	x22, x19, 8
-	add	x22, x23, x22, lsl 8
-	tbz	x0, 4, .L221
-	adrp	x0, .LC3
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	add	x23, x19, 8
+	add	x23, x24, x23, lsl 8
+	tbz	x0, 4, .L349
+	adrp	x0, .LC33
+	mov	w2, w21
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC3
+	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L221:
+.L349:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w24, .L222
+	cbnz	w25, .L350
 	bl	zftl_flash_enter_slc_mode
-.L223:
-	add	x0, x23, x19, lsl 8
-	mov	w2, 96
-	and	w1, w21, 2097151
-	str	w2, [x0, 2056]
-	and	w2, w21, 255
-	str	w2, [x0, 2052]
-	lsr	w2, w1, 8
-	str	w2, [x0, 2052]
-	lsr	w1, w1, 16
+.L351:
+	add	x0, x24, x19, lsl 8
+	mov	w1, 96
+	str	w1, [x0, 2056]
+	and	w1, w21, 255
+	str	w1, [x0, 2052]
+	lsr	w1, w22, 8
 	str	w1, [x0, 2052]
+	lsr	w22, w22, 16
+	str	w22, [x0, 2052]
 	mov	w1, 208
 	str	w1, [x0, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x22
+	mov	x0, x23
 	bl	flash_read_status
 	mov	w19, w0
 	mov	w0, w20
 	bl	nandc_de_cs
 	mov	w0, 5
 	ands	w19, w19, w0
-	beq	.L224
-	adrp	x0, .LANCHOR20
+	beq	.L352
+	adrp	x0, .LANCHOR26
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR20]
-	adrp	x0, .LC4
-	add	x0, x0, :lo12:.LC4
+	ldrh	w1, [x0, #:lo12:.LANCHOR26]
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
 	udiv	w1, w21, w1
 	bl	printf
-.L224:
+.L352:
 	mov	w0, w19
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x29, x30, [sp], 80
 	ret
-.L222:
+.L350:
 	bl	zftl_flash_exit_slc_mode
-	b	.L223
+	b	.L351
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -1361,133 +1784,157 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR20
+	adrp	x23, .LANCHOR26
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR20
+	add	x23, x23, :lo12:.LANCHOR26
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR15
+	adrp	x22, .LANCHOR12
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR15
-	adrp	x24, .LANCHOR17
+	add	x22, x22, :lo12:.LANCHOR12
+	adrp	x24, .LANCHOR24
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L234:
+.L362:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L237
+	bhi	.L365
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
-	adrp	x0, .LC5
+	adrp	x0, .LC35
 	ldp	x23, x24, [sp, 48]
-	add	x0, x0, :lo12:.LC5
+	add	x0, x0, :lo12:.LC35
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L237:
-	add	x0, x24, :lo12:.LANCHOR17
+.L365:
+	add	x0, x24, :lo12:.LANCHOR24
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L235:
+.L363:
 	cmp	w20, w21, uxth
-	bhi	.L236
+	bhi	.L364
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L234
-.L236:
+	b	.L362
+.L364:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L235
+	b	.L363
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
 	.global	flash_set_interface_mode
 	.type	flash_set_interface_mode, %function
 flash_set_interface_mode:
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR13
-	adrp	x5, .LANCHOR33
-	add	x5, x5, :lo12:.LANCHOR33
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR13]
-	adrp	x1, .LANCHOR32
-	mov	x2, 0
-	mov	w11, 69
-	ldrb	w1, [x1, #:lo12:.LANCHOR32]
-	mov	w7, 239
-	mov	w8, 128
-	mov	w12, 1
-	and	w10, w1, 4
-	and	w4, w1, 1
-	mov	w13, 35
-	mov	w14, 5
-.L247:
-	lsl	x1, x2, 3
-	ldrb	w3, [x1, x5]
-	cmp	w3, 152
-	ccmp	w3, w11, 4, ne
-	beq	.L240
-	cmp	w3, 44
-	bne	.L241
-.L240:
-	cmp	w0, 1
-	bne	.L242
-	cbz	w4, .L241
-	add	x1, x6, x2, lsl 8
-	cmp	w3, 44
-	str	w7, [x1, 2056]
-	bne	.L243
-	str	w0, [x1, 2052]
-	str	w14, [x1, 2048]
-.L246:
-	str	wzr, [x1, 2048]
-	str	wzr, [x1, 2048]
-	str	wzr, [x1, 2048]
-.L241:
-	add	x2, x2, 1
-	cmp	x2, 4
-	bne	.L247
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR38
+	stp	x21, x22, [sp, 32]
+	adrp	x23, .LANCHOR7
+	adrp	x22, .LANCHOR39
+	str	x25, [sp, 64]
+	add	x24, x24, :lo12:.LANCHOR38
+	add	x22, x22, :lo12:.LANCHOR39
+	add	x23, x23, :lo12:.LANCHOR7
+	mov	w25, w0
+	stp	x19, x20, [sp, 16]
+	mov	x20, 0
+.L377:
+	lsl	x0, x20, 3
+	ldrb	w21, [x0, x24]
+	mov	w0, 69
+	cmp	w21, 152
+	ccmp	w21, w0, 4, ne
+	beq	.L368
+	cmp	w21, 44
+	bne	.L369
+.L368:
+	adrp	x0, .LANCHOR21
+	ldrb	w1, [x22]
+	cmp	w25, 1
+	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	bne	.L370
+	tbz	x1, 0, .L369
+	ldr	w0, [x23]
+	tbz	x0, 12, .L371
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	bl	printf
+.L371:
+	add	x0, x19, x20, lsl 8
+	mov	w1, 239
+	cmp	w21, 44
+	str	w1, [x0, 2056]
+	mov	w1, 1
+	bne	.L372
+	str	w1, [x0, 2052]
+	mov	w1, 5
+.L392:
+	str	w1, [x0, 2048]
+.L376:
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+.L369:
+	add	x20, x20, 1
+	cmp	x20, 4
+	bne	.L377
 	bl	nandc_wait_flash_ready
+	ldr	x25, [sp, 64]
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L243:
-	str	w8, [x1, 2052]
-	str	w0, [x1, 2048]
-	b	.L246
-.L242:
-	cbz	w10, .L241
-	add	x1, x6, x2, lsl 8
-	cmp	w3, 44
-	str	w7, [x1, 2056]
-	bne	.L245
-	str	w12, [x1, 2052]
-	str	w13, [x1, 2048]
-	b	.L246
-.L245:
-	str	w8, [x1, 2052]
-	str	wzr, [x1, 2048]
-	b	.L246
+.L372:
+	mov	w2, 128
+	str	w2, [x0, 2052]
+	b	.L392
+.L370:
+	tbz	x1, 2, .L369
+	ldr	w0, [x23]
+	tbz	x0, 12, .L374
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	bl	printf
+.L374:
+	add	x0, x19, x20, lsl 8
+	mov	w1, 239
+	cmp	w21, 44
+	str	w1, [x0, 2056]
+	bne	.L375
+	mov	w1, 1
+	str	w1, [x0, 2052]
+	mov	w1, 35
+	b	.L392
+.L375:
+	mov	w1, 128
+	str	w1, [x0, 2052]
+	str	wzr, [x0, 2048]
+	b	.L376
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1500,10 +1947,10 @@ flash_reset:
 flash_read_id:
 	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR21
 	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	ldr	x4, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w10
 	bl	flash_reset
 	mov	w0, w10
@@ -1537,18 +1984,18 @@ flash_read_id:
 	sub	w0, w2, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bhi	.L257
+	bhi	.L394
 	ldrb	w7, [x8, 5]
 	add	w1, w10, 1
 	ldrb	w6, [x8, 4]
-	adrp	x0, .LC6
+	adrp	x0, .LC38
 	ldrb	w5, [x8, 3]
-	add	x0, x0, :lo12:.LC6
+	add	x0, x0, :lo12:.LC38
 	ldrb	w4, [x8, 2]
 	ldrb	w3, [x8, 1]
 	ldp	x29, x30, [sp], 16
 	b	printf
-.L257:
+.L394:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	flash_read_id, .-flash_read_id
@@ -1559,12 +2006,12 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR26+9
+	adrp	x2, .LANCHOR32+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR26+9]
-	adrp	x2, .LANCHOR13
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	ldrb	w3, [x2, #:lo12:.LANCHOR32+9]
+	adrp	x2, .LANCHOR21
+	ldr	x4, [x2, #:lo12:.LANCHOR21]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -1590,62 +2037,76 @@ flash_read_spare:
 	.global	sandisk_prog_test_bad_block
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
-	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR13
-	and	w0, w0, 255
+	stp	x29, x30, [sp, -48]!
+	mov	w4, w1
+	adrp	x1, .LANCHOR21
+	and	x2, x0, 255
 	add	x29, sp, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR13]
-	adrp	x2, .LANCHOR26
-	add	x3, x2, :lo12:.LANCHOR26
-	mov	x5, x2
-	sxtw	x2, w0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR32
+	ldr	x19, [x1, #:lo12:.LANCHOR21]
+	add	x1, x20, :lo12:.LANCHOR32
+	str	x21, [sp, 32]
+	mov	x0, x2
 	add	x2, x2, 8
-	ldrb	w3, [x3, 29]
-	add	x2, x4, x2, lsl 8
-	cbz	w3, .L263
-.L270:
+	ldrb	w1, [x1, 29]
+	add	x2, x19, x2, lsl 8
+	cbz	w1, .L400
+.L414:
 	ubfiz	x0, x0, 8, 8
-	str	w3, [x2, 8]
-	add	x4, x4, x0
+	str	w1, [x2, 8]
+	add	x19, x19, x0
 	mov	w0, 128
-	str	w0, [x4, 2056]
-	and	w0, w1, 255
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w0, [x4, 2052]
-	lsr	w0, w1, 8
-	str	w0, [x4, 2052]
-	lsr	w1, w1, 16
-	str	w1, [x4, 2052]
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	str	w0, [x19, 2052]
 	mov	w0, 16
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
 	mov	w0, 112
-	str	w0, [x4, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 80
 	bl	timer_delay_ns
-	add	x2, x5, :lo12:.LANCHOR26
-	ldr	w0, [x4, 2048]
-	mov	w1, 5
-	and	w0, w0, w1
-	ldrb	w1, [x2, 30]
-	cbz	w1, .L262
-	str	w1, [x4, 2056]
-.L262:
-	ldp	x29, x30, [sp], 16
-	ret
-.L263:
-	mov	w3, 162
-	b	.L270
-	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
-	.section	.text.nandc_rdy_status,"ax",@progbits
-	.align	2
-	.global	nandc_rdy_status
-	.type	nandc_rdy_status, %function
-nandc_rdy_status:
-	adrp	x0, .LANCHOR13
+	ldr	w2, [x19, 2048]
+	mov	w0, 5
+	ands	w21, w2, w0
+	beq	.L402
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L402
+	adrp	x0, .LC39
+	mov	w1, w4
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+.L402:
+	add	x20, x20, :lo12:.LANCHOR32
+	ldrb	w0, [x20, 30]
+	cbz	w0, .L399
+	str	w0, [x19, 2056]
+.L399:
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L400:
+	mov	w1, 162
+	b	.L414
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_rdy_status,"ax",@progbits
+	.align	2
+	.global	nandc_rdy_status
+	.type	nandc_rdy_status, %function
+nandc_rdy_status:
+	adrp	x0, .LANCHOR21
 	sub	sp, sp, #16
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [sp, 8]
 	ldr	w0, [sp, 8]
@@ -1658,69 +2119,69 @@ nandc_rdy_status:
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR34
+	adrp	x2, .LANCHOR40
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR34]
-	adrp	x2, .LANCHOR14
-	ldrb	w2, [x2, #:lo12:.LANCHOR14]
+	strb	w0, [x2, #:lo12:.LANCHOR40]
+	adrp	x2, .LANCHOR22
+	ldrb	w2, [x2, #:lo12:.LANCHOR22]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR13
-	ldr	x2, [x2, #:lo12:.LANCHOR13]
-	bne	.L274
+	adrp	x2, .LANCHOR21
+	ldr	x2, [x2, #:lo12:.LANCHOR21]
+	bne	.L418
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L281
+	beq	.L425
 	cmp	w0, 60
-	beq	.L282
+	beq	.L426
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L275:
+.L419:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L281:
+.L425:
 	mov	w1, 0
-	b	.L275
-.L282:
+	b	.L419
+.L426:
 	mov	w1, 3
-	b	.L275
-.L274:
+	b	.L419
+.L418:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L277
-.L280:
+	bne	.L421
+.L424:
 	and	w1, w1, -17
-.L278:
+.L422:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L277:
+.L421:
 	cmp	w0, 24
-	bne	.L279
+	bne	.L423
 	orr	w1, w1, 16
-	b	.L278
-.L279:
+	b	.L422
+.L423:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L278
-	b	.L280
+	bne	.L422
+	b	.L424
 	.size	nandc_bch_sel, .-nandc_bch_sel
 	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
 	.global	zftl_nandc_get_irq_status
 	.type	zftl_nandc_get_irq_status, %function
 zftl_nandc_get_irq_status:
-	adrp	x1, .LANCHOR14
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	adrp	x1, .LANCHOR22
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	cmp	w1, 9
-	bne	.L288
+	bne	.L432
 	ldr	w0, [x0, 296]
 	ret
-.L288:
+.L432:
 	ldr	w0, [x0, 372]
 	ret
 	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
@@ -1752,37 +2213,38 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR37
+	adrp	x4, .LANCHOR43
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR22
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
-	adrp	x24, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	adrp	x24, .LANCHOR21
 	cmp	w0, 9
-	bne	.L294
+	bne	.L438
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR35
+	adrp	x0, .LANCHOR41
 	orr	w19, w19, 536870912
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
 	orr	w19, w19, 1024
+	ldrb	w0, [x0, #:lo12:.LANCHOR41]
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w0, .L295
-	adrp	x0, .LANCHOR36
-	ldrb	w1, [x0, #:lo12:.LANCHOR36]
+	orr	w19, w19, 128
+	cbz	w0, .L439
+	adrp	x0, .LANCHOR42
+	ldrb	w1, [x0, #:lo12:.LANCHOR42]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L295:
-	add	x21, x4, :lo12:.LANCHOR37
+.L439:
+	add	x21, x4, :lo12:.LANCHOR43
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -1799,7 +2261,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR13]
+	ldr	x1, [x24, #:lo12:.LANCHOR21]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -1816,22 +2278,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR38
+	adrp	x2, .LANCHOR44
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR38]
+	ldrh	w2, [x2, #:lo12:.LANCHOR44]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L293:
+.L437:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L294:
-	ldr	x0, [x24, #:lo12:.LANCHOR13]
+.L438:
+	ldr	x0, [x24, #:lo12:.LANCHOR21]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -1846,24 +2308,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L297
-	adrp	x0, .LANCHOR34
+	cbz	w23, .L441
+	adrp	x0, .LANCHOR40
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR37]
+	ldr	x8, [x4, #:lo12:.LANCHOR43]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L299:
+.L443:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L300
-.L301:
-	add	x21, x4, :lo12:.LANCHOR37
-	ldr	x0, [x4, #:lo12:.LANCHOR37]
+	bne	.L444
+.L445:
+	add	x21, x4, :lo12:.LANCHOR43
+	ldr	x0, [x4, #:lo12:.LANCHOR43]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -1880,7 +2342,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR13]
+	ldr	x1, [x24, #:lo12:.LANCHOR21]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -1897,8 +2359,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L293
-.L300:
+	b	.L437
+.L444:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -1906,11 +2368,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L299
-.L297:
-	ldr	x1, [x4, #:lo12:.LANCHOR37]
+	b	.L443
+.L441:
+	ldr	x1, [x4, #:lo12:.LANCHOR43]
 	str	w0, [x1]
-	b	.L301
+	b	.L445
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -1918,160 +2380,61 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR39
-	add	x1, x1, :lo12:.LANCHOR39
+	adrp	x1, .LANCHOR45
+	add	x1, x1, :lo12:.LANCHOR45
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR36
-	ldrb	w2, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR42
+	ldrb	w2, [x1, #:lo12:.LANCHOR42]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR14
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	adrp	x1, .LANCHOR22
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR13
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
-	bne	.L311
+	adrp	x1, .LANCHOR21
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
+	bne	.L455
 	str	w0, [x1, 520]
 	ret
-.L311:
+.L455:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
-	.section	.text.flash_start_page_read,"ax",@progbits
-	.align	2
-	.global	flash_start_page_read
-	.type	flash_start_page_read, %function
-flash_start_page_read:
-	stp	x29, x30, [sp, -16]!
-	and	w11, w0, 255
-	adrp	x0, .LANCHOR15
-	ubfx	x2, x1, 21, 3
-	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	cmp	w0, w2
-	bhi	.L316
-	adrp	x1, .LANCHOR40
-	adrp	x0, .LC0
-	mov	w2, 759
-	add	x1, x1, :lo12:.LANCHOR40
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L317:
-	b	.L317
-.L316:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	and	w6, w1, 2097151
-	ubfx	x10, x1, 24, 2
-	ldrb	w8, [x0, w2, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x7, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w8
-	bl	nandc_cs
-	adrp	x12, .LANCHOR41
-	cbnz	w10, .L318
-	adrp	x0, .LANCHOR18
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	adrp	x0, .LANCHOR19
-	cbz	w1, .L319
-	ldrb	w1, [x0, #:lo12:.LANCHOR19]
-	cbz	w1, .L320
-.L319:
-	adrp	x1, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	ldrh	w1, [x1, #:lo12:.LANCHOR20]
-	udiv	w2, w6, w1
-	mul	w2, w2, w1
-	sub	w6, w6, w2
-	cbz	w0, .L321
-	add	w6, w2, w6, lsl 1
-.L320:
-	mov	w0, w8
-	bl	zftl_flash_enter_slc_mode
-	b	.L322
-.L321:
-	adrp	x3, .LANCHOR21
-	add	x3, x3, :lo12:.LANCHOR21
-	ldrh	w6, [x3, w6, uxtw 1]
-	add	w6, w6, w2
-.L322:
-	ubfiz	x2, x8, 8, 8
-	and	w0, w6, 255
-	add	x2, x7, x2
-	str	wzr, [x2, 2056]
-	str	wzr, [x2, 2052]
-	str	wzr, [x2, 2052]
-	str	w0, [x2, 2052]
-	lsr	w0, w6, 8
-	str	w0, [x2, 2052]
-	lsr	w0, w6, 16
-	str	w0, [x2, 2052]
-	ldr	x0, [x12, #:lo12:.LANCHOR41]
-	str	w11, [x2, 2056]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L324
-	cbz	w10, .L324
-	add	w6, w6, w6, lsl 1
-	sub	w0, w10, #1
-	add	w0, w6, w0
-.L333:
-	bl	nandc_set_seed
-	ldp	x29, x30, [sp], 16
-	mov	w0, 0
-	b	nandc_de_cs
-.L318:
-	ldr	x0, [x12, #:lo12:.LANCHOR41]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L323
-	sxtw	x0, w8
-	add	x0, x0, 8
-	add	x0, x7, x0, lsl 8
-	str	w10, [x0, 8]
-	b	.L322
-.L323:
-	mov	w0, w8
-	bl	zftl_flash_exit_slc_mode
-	b	.L322
-.L324:
-	mov	w0, w6
-	b	.L333
-	.size	flash_start_page_read, .-flash_start_page_read
 	.section	.text.zftl_flash_de_init,"ax",@progbits
 	.align	2
 	.global	zftl_flash_de_init
 	.type	zftl_flash_de_init, %function
 zftl_flash_de_init:
-	stp	x29, x30, [sp, -16]!
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
+	str	x19, [sp, 16]
 	bl	nandc_wait_flash_ready
+	adrp	x19, .LANCHOR14
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	adrp	x15, .LANCHOR42
-	ldrb	w0, [x15, #:lo12:.LANCHOR42]
-	cbz	w0, .L335
-	adrp	x0, .LANCHOR32
-	ldrb	w0, [x0, #:lo12:.LANCHOR32]
-	tbz	x0, 0, .L335
+	ldrb	w0, [x19, #:lo12:.LANCHOR14]
+	cbz	w0, .L460
+	adrp	x0, .LANCHOR39
+	ldrb	w0, [x0, #:lo12:.LANCHOR39]
+	tbz	x0, 0, .L460
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x15, #:lo12:.LANCHOR42]
-.L335:
-	adrp	x3, .LANCHOR36
-	ldrb	w0, [x3, #:lo12:.LANCHOR36]
-	cbz	w0, .L336
+	strb	wzr, [x19, #:lo12:.LANCHOR14]
+.L460:
+	adrp	x3, .LANCHOR42
+	ldrb	w0, [x3, #:lo12:.LANCHOR42]
+	cbz	w0, .L461
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR36]
+	strb	wzr, [x3, #:lo12:.LANCHOR42]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR36]
-.L336:
+	strb	w0, [x3, #:lo12:.LANCHOR42]
+.L461:
 	mov	w0, 0
-	ldp	x29, x30, [sp], 16
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	zftl_flash_de_init, .-zftl_flash_de_init
 	.section	.text.nandc_randomizer_enable,"ax",@progbits
@@ -2079,8 +2442,8 @@ zftl_flash_de_init:
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR36
-	strb	w0, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR42
+	strb	w0, [x1, #:lo12:.LANCHOR42]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -2088,10 +2451,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR13
+	adrp	x1, .LANCHOR21
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	ldr	x1, [x1, #:lo12:.LANCHOR21]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -2100,10 +2463,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR43
-	add	x1, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR46
+	add	x1, x0, :lo12:.LANCHOR46
 	mov	w2, 0
-.L350:
+.L475:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -2113,14 +2476,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L350
-	add	x0, x0, :lo12:.LANCHOR43
+	bne	.L475
+	add	x0, x0, :lo12:.LANCHOR46
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR44
-	strb	wzr, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR45
-	strb	w2, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR47
+	strb	wzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR48
+	strb	w2, [x0, #:lo12:.LANCHOR48]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -2128,53 +2491,59 @@ buf_reinit:
 	.global	buf_add_tail
 	.type	buf_add_tail, %function
 buf_add_tail:
-	stp	x29, x30, [sp, -16]!
-	mov	w2, -1
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	strb	w2, [x1]
-	ldrb	w3, [x0]
-	cmp	w3, 255
-	bne	.L360
-	ldrb	w1, [x1, 1]
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	str	x21, [sp, 32]
+	mov	w0, -1
+	strb	w0, [x1]
+	mov	x20, x1
+	ldrb	w1, [x19]
 	cmp	w1, 255
-	bne	.L354
-	adrp	x1, .LANCHOR46
+	bne	.L483
+	ldrb	w0, [x20, 1]
+	cmp	w0, 255
+	bne	.L479
+	adrp	x1, .LANCHOR49
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L355:
-	b	.L355
-.L354:
-	strb	w1, [x0]
-.L352:
-	ldp	x29, x30, [sp], 16
+.L479:
+	ldrb	w0, [x20, 1]
+	strb	w0, [x19]
+.L477:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.L357:
-	sbfiz	x0, x0, 6, 32
-	strb	w1, [x2, x0]
-	b	.L352
-.L360:
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
-.L361:
-	mov	w0, w3
-	sbfiz	x3, x3, 6, 32
-	ldrb	w3, [x2, x3]
-	cmp	w3, 255
-	bne	.L361
-	ldrb	w1, [x1, 1]
+.L483:
+	adrp	x0, .LANCHOR46
+	add	x2, x0, :lo12:.LANCHOR46
+	mov	x19, x0
+.L484:
+	sbfiz	x0, x1, 6, 32
+	mov	w21, w1
+	ldrb	w1, [x2, x0]
 	cmp	w1, 255
-	bne	.L357
-	adrp	x1, .LANCHOR46
+	bne	.L484
+	ldrb	w0, [x20, 1]
+	cmp	w0, 255
+	bne	.L481
+	adrp	x1, .LANCHOR49
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR46
+	add	x1, x1, :lo12:.LANCHOR49
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L358:
-	b	.L358
+.L481:
+	add	x0, x19, :lo12:.LANCHOR46
+	sbfiz	x21, x21, 6, 32
+	ldrb	w1, [x20, 1]
+	strb	w1, [x0, x21]
+	b	.L477
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.buf_free,"ax",@progbits
 	.align	2
@@ -2182,30 +2551,30 @@ buf_add_tail:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR44
+	adrp	x2, .LANCHOR47
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L364
+	cbz	w1, .L487
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR44
+	add	x0, x2, :lo12:.LANCHOR47
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR45
+	adrp	x1, .LANCHOR48
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR45]
+	ldrb	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR45]
+	strb	w0, [x1, #:lo12:.LANCHOR48]
 	ret
-.L364:
-	ldrb	w1, [x2, #:lo12:.LANCHOR44]
+.L487:
+	ldrb	w1, [x2, #:lo12:.LANCHOR47]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR45
+	adrp	x1, .LANCHOR48
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR44]
-	ldrb	w0, [x1, #:lo12:.LANCHOR45]
+	strb	w0, [x2, #:lo12:.LANCHOR47]
+	ldrb	w0, [x1, #:lo12:.LANCHOR48]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR45]
+	strb	w0, [x1, #:lo12:.LANCHOR48]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -2213,52 +2582,60 @@ buf_free:
 	.global	buf_alloc
 	.type	buf_alloc, %function
 buf_alloc:
-	adrp	x1, .LANCHOR45
-	ldrb	w3, [x1, #:lo12:.LANCHOR45]
-	cbnz	w3, .L371
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR47
-	adrp	x0, .LC0
-	mov	w2, 121
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR47
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L372:
-	b	.L372
-.L371:
-	adrp	x6, .LANCHOR44
-	and	w7, w0, 255
-	mov	x5, x1
-	adrp	x1, .LANCHOR43
-	ldrb	w2, [x6, #:lo12:.LANCHOR44]
-	add	x4, x1, :lo12:.LANCHOR43
-	ubfiz	x0, x2, 6, 8
-	add	x0, x4, x0
-	cbnz	w7, .L373
-	cmp	w3, 1
-	beq	.L375
-.L373:
-	add	x1, x1, :lo12:.LANCHOR43
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR48
+	and	w20, w0, 255
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbz	w0, .L494
+.L497:
+	adrp	x3, .LANCHOR47
+	adrp	x1, .LANCHOR46
+	add	x0, x1, :lo12:.LANCHOR46
+	ldrb	w2, [x3, #:lo12:.LANCHOR47]
+	ubfiz	x4, x2, 6, 8
+	add	x0, x0, x4
+	mov	x4, x3
+	cbz	w20, .L495
+.L496:
+	add	x1, x1, :lo12:.LANCHOR46
 	sbfiz	x2, x2, 6, 32
-	add	x4, x1, x2
-	sub	w3, w3, #1
-	strb	w3, [x5, #:lo12:.LANCHOR45]
-	mov	w3, 1
-	ldrb	w7, [x1, x2]
-	strb	w3, [x4, 2]
-	mov	w3, -1
-	strb	w7, [x6, #:lo12:.LANCHOR44]
-	strb	w3, [x1, x2]
+	add	x3, x1, x2
+	ldrb	w5, [x1, x2]
+	strb	w5, [x4, #:lo12:.LANCHOR47]
+	ldrb	w4, [x19, #:lo12:.LANCHOR48]
+	strh	wzr, [x3, 50]
+	sub	w4, w4, #1
+	strb	w4, [x19, #:lo12:.LANCHOR48]
+	mov	w4, 1
+	str	xzr, [x3, 16]
+	strb	w4, [x3, 2]
+	mov	w4, -1
+	strb	w4, [x1, x2]
 	mov	w1, -1
-	strh	wzr, [x4, 50]
-	str	xzr, [x4, 16]
-	str	w1, [x4, 36]
-.L370:
-	ret
-.L375:
+	str	w1, [x3, 36]
+	b	.L493
+.L494:
+	mov	w2, 121
+	adrp	x1, .LANCHOR50
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR50
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbnz	w0, .L497
+.L499:
 	mov	x0, 0
-	b	.L370
+.L493:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L495:
+	ldrb	w3, [x19, #:lo12:.LANCHOR48]
+	cmp	w3, 1
+	bne	.L496
+	b	.L499
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -2268,30 +2645,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L382
+	bne	.L507
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L386:
+.L511:
 	mov	w0, 1
 	ret
-.L383:
+.L508:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L384
+	bne	.L509
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L386
-.L382:
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
-.L384:
+	b	.L511
+.L507:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
+.L509:
 	cmp	w2, 255
-	bne	.L383
+	bne	.L508
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -2300,35 +2677,37 @@ buf_remove_buf:
 	.global	buf_remove_free
 	.type	buf_remove_free, %function
 buf_remove_free:
-	stp	x29, x30, [sp, -16]!
-	adrp	x6, .LANCHOR45
-	mov	x5, x0
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	ldrb	w0, [x6, #:lo12:.LANCHOR45]
-	cbnz	w0, .L388
-	adrp	x1, .LANCHOR48
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR48
+	mov	x20, x0
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbnz	w0, .L513
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
 	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR48
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L389:
-	b	.L389
-.L388:
-	mov	x1, x5
-	adrp	x0, .LANCHOR44
-	add	x0, x0, :lo12:.LANCHOR44
+.L513:
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
+	cbz	w0, .L512
+	mov	x1, x20
+	adrp	x0, .LANCHOR47
+	add	x0, x0, :lo12:.LANCHOR47
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L387
-	ldrb	w0, [x6, #:lo12:.LANCHOR45]
+	bne	.L512
+	ldrb	w0, [x19, #:lo12:.LANCHOR48]
 	sub	w0, w0, #1
-	strb	w0, [x6, #:lo12:.LANCHOR45]
-	ldrb	w0, [x5, 2]
+	strb	w0, [x19, #:lo12:.LANCHOR48]
+	ldrb	w0, [x20, 2]
 	orr	w0, w0, 1
-	strb	w0, [x5, 2]
-.L387:
-	ldp	x29, x30, [sp], 16
+	strb	w0, [x20, 2]
+.L512:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	buf_remove_free, .-buf_remove_free
 	.section	.text.flash_check_bad_block,"ax",@progbits
@@ -2336,8 +2715,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR26
-	add	x3, x3, :lo12:.LANCHOR26
+	adrp	x3, .LANCHOR32
+	add	x3, x3, :lo12:.LANCHOR32
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -2350,8 +2729,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR12
-	ldr	x2, [x2, #:lo12:.LANCHOR12]
+	adrp	x2, .LANCHOR20
+	ldr	x2, [x2, #:lo12:.LANCHOR20]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -2368,14 +2747,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR32
+	add	x0, x0, :lo12:.LANCHOR32
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -2389,8 +2768,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR12
-	ldr	x2, [x0, #:lo12:.LANCHOR12]
+	adrp	x0, .LANCHOR20
+	ldr	x2, [x0, #:lo12:.LANCHOR20]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -2411,78 +2790,17 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR50
+	adrp	x1, .LANCHOR53
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR50]
+	ldrb	w0, [x1, #:lo12:.LANCHOR53]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR50]
+	strb	w0, [x1, #:lo12:.LANCHOR53]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
-	.section	.text.ftl_write_buf,"ax",@progbits
-	.align	2
-	.global	ftl_write_buf
-	.type	ftl_write_buf, %function
-ftl_write_buf:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	cbnz	x0, .L398
-	adrp	x1, .LANCHOR51
-	adrp	x0, .LC0
-	mov	w2, 591
-	add	x1, x1, :lo12:.LANCHOR51
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L399:
-	b	.L399
-.L398:
-	adrp	x2, .LANCHOR52
-	ldrb	w1, [x0, 56]
-	mov	x19, x0
-	ldrb	w2, [x2, #:lo12:.LANCHOR52]
-	cmp	w2, w1
-	bcs	.L400
-	adrp	x1, .LANCHOR51
-	adrp	x0, .LC0
-	mov	w2, 596
-	add	x1, x1, :lo12:.LANCHOR51
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L401:
-	b	.L401
-.L400:
-	adrp	x20, .LANCHOR50
-	cbnz	w1, .L402
-	bl	buf_free
-	ldrb	w0, [x20, #:lo12:.LANCHOR50]
-.L397:
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-.L402:
-	mov	x1, x0
-	adrp	x0, .LANCHOR49
-	add	x0, x0, :lo12:.LANCHOR49
-	bl	buf_add_tail
-	adrp	x1, .LANCHOR53
-	ldrb	w3, [x19, 56]
-	ldrb	w0, [x20, #:lo12:.LANCHOR50]
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
-	add	w0, w0, 1
-	and	w0, w0, 255
-	strb	w0, [x20, #:lo12:.LANCHOR50]
-	ldr	w2, [x1, 16]
-	add	w2, w2, w3
-	str	w2, [x1, 16]
-	ldr	w2, [x1, 32]
-	add	w2, w2, 1
-	str	w2, [x1, 32]
-	b	.L397
-	.size	ftl_write_buf, .-ftl_write_buf
 	.section	.text.zftl_cache_flush,"ax",@progbits
 	.align	2
 	.global	zftl_cache_flush
@@ -2495,60 +2813,62 @@ zftl_cache_flush:
 	.global	ftl_read_buf
 	.type	ftl_read_buf, %function
 ftl_read_buf:
-	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR54
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
-	str	x19, [sp, 16]
-	ldr	w2, [x2, #:lo12:.LANCHOR54]
-	cmp	w2, w0
-	bhi	.L407
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR54
+	str	x21, [sp, 32]
+	mov	x21, x1
+	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w0, w20
+	bhi	.L525
 	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 834
+	mov	w2, 887
 	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L408:
-	b	.L408
-.L407:
-	adrp	x19, .LANCHOR43
-	add	x3, x19, :lo12:.LANCHOR43
-	add	x3, x3, 2
-	mov	w2, 0
-.L411:
-	ldr	w4, [x3, 34]
-	cmp	w0, w4
-	bne	.L409
-	ldrb	w4, [x3]
-	tbz	x4, 3, .L409
-	add	x19, x19, :lo12:.LANCHOR43
-	ubfiz	x2, x2, 6, 32
-	add	x19, x19, x2
-	orr	w0, w4, 4
+.L525:
+	adrp	x19, .LANCHOR46
+	add	x1, x19, :lo12:.LANCHOR46
+	add	x1, x1, 2
+	mov	w0, 0
+.L528:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L526
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L526
+	ubfiz	x0, x0, 6, 32
+	add	x19, x19, :lo12:.LANCHOR46
+	add	x19, x19, x0
+	orr	w0, w2, 4
 	strb	w0, [x19, 2]
-	tbnz	x4, 0, .L406
+	tbnz	x2, 0, .L524
 	mov	x0, x19
 	bl	buf_remove_free
-.L406:
+.L524:
 	mov	x0, x19
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
 	ret
-.L409:
-	add	w2, w2, 1
-	add	x3, x3, 64
-	cmp	w2, 32
-	bne	.L411
-	adrp	x2, .LANCHOR56
-	ldr	w3, [x2, #:lo12:.LANCHOR56]
-	cmn	w3, #1
-	bne	.L412
-	str	w0, [x2, #:lo12:.LANCHOR56]
+.L526:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L528
+	adrp	x0, .LANCHOR56
+	ldr	w1, [x0, #:lo12:.LANCHOR56]
+	cmn	w1, #1
+	bne	.L529
+	str	w20, [x0, #:lo12:.LANCHOR56]
 	adrp	x0, .LANCHOR57
-	str	x1, [x0, #:lo12:.LANCHOR57]
-.L412:
+	str	x21, [x0, #:lo12:.LANCHOR57]
+.L529:
 	mov	x19, 0
-	b	.L406
+	b	.L524
 	.size	ftl_read_buf, .-ftl_read_buf
 	.section	.text.ftl_read_buf_free,"ax",@progbits
 	.align	2
@@ -2563,12 +2883,12 @@ ftl_read_buf_free:
 	add	x0, x0, :lo12:.LANCHOR58
 	bl	buf_remove_buf
 	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L419
+	tbz	x0, 1, .L536
 	and	w0, w0, -5
 	strb	w0, [x5, 2]
 	ldp	x29, x30, [sp], 16
 	ret
-.L419:
+.L536:
 	ldp	x29, x30, [sp], 16
 	mov	x0, x5
 	b	buf_free
@@ -2578,11 +2898,11 @@ ftl_read_buf_free:
 	.global	zftl_get_density
 	.type	zftl_get_density, %function
 zftl_get_density:
-	cbnz	w0, .L424
+	cbnz	w0, .L541
 	adrp	x0, .LANCHOR59
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
-.L424:
+.L541:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
@@ -2633,34 +2953,32 @@ gc_add_sblk:
 	adrp	x0, .LANCHOR2
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
+	and	w22, w1, 65535
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	and	w23, w2, 65535
 	stp	x25, x26, [sp, 64]
 	str	x27, [sp, 80]
 	cmp	w0, w20
-	bhi	.L432
+	bhi	.L549
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
 	mov	w2, 252
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L433:
-	b	.L433
-.L432:
+.L549:
 	adrp	x24, .LANCHOR4
 	uxtw	x19, w20
 	lsl	x26, x19, 1
-	adrp	x25, .LANCHOR29
+	adrp	x25, .LANCHOR7
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	and	w23, w1, 65535
-	and	w22, w2, 65535
 	adrp	x27, .LANCHOR3
 	ldrh	w21, [x0, x26]
-	ldr	w0, [x25, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L434
+	ldr	w0, [x25, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L550
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	mov	w4, w21
-	mov	w2, w23
+	mov	w2, w22
 	mov	w1, w20
 	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
@@ -2669,82 +2987,82 @@ gc_add_sblk:
 	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
 	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L434:
+.L550:
 	ldr	x0, [x27, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, lsl 2
 	ldrb	w3, [x19, 2]
 	tst	w3, 224
-	bne	.L435
-	cbz	w21, .L450
+	bne	.L551
+	cbz	w21, .L566
 	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
 	mov	w2, 257
 	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L437:
-	b	.L437
-.L435:
-	adrp	x1, .LANCHOR63
-	add	x0, x1, :lo12:.LANCHOR63
-	ldrh	w1, [x1, #:lo12:.LANCHOR63]
-	cmp	w1, w20
-	beq	.L450
+.L566:
+	mov	w0, 0
+	b	.L548
+.L551:
+	adrp	x0, .LANCHOR63
+	add	x1, x0, :lo12:.LANCHOR63
+	ldrh	w0, [x0, #:lo12:.LANCHOR63]
+	cmp	w0, w20
+	beq	.L566
 	adrp	x21, .LANCHOR5
-	ldr	x1, [x21, #:lo12:.LANCHOR5]
-	ldrh	w2, [x1, 48]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldrh	w2, [x0, 48]
 	cmp	w2, w20
-	beq	.L450
-	ldrh	w2, [x1, 16]
+	beq	.L566
+	ldrh	w2, [x0, 16]
 	cmp	w2, w20
-	beq	.L450
-	ldrh	w2, [x1, 80]
+	beq	.L566
+	ldrh	w2, [x0, 80]
 	cmp	w2, w20
-	beq	.L450
-	ldrh	w5, [x0, 56]
-	add	x0, x0, 58
+	beq	.L566
+	ldrh	w5, [x1, 56]
+	add	x1, x1, 58
 	mov	w2, 0
-.L438:
+.L553:
 	cmp	w2, w5
-	bcc	.L439
-	ubfiz	x19, x22, 7, 16
-	add	x0, x1, 392
+	bcc	.L554
+	cbnz	w22, .L555
+	ubfiz	x19, x23, 7, 16
 	add	x19, x19, 136
-	cmp	w23, 0
-	add	x1, x1, x19
-	csel	x19, x1, x0, eq
-	ldr	w0, [x25, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L441
+	add	x19, x0, x19
+.L556:
+	ldr	w0, [x25, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L557
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	adrp	x1, .LANCHOR62
 	ubfx	x3, x3, 5, 3
-	mov	w2, w23
+	mov	w2, w22
 	ldrh	w6, [x1, #:lo12:.LANCHOR62]
 	mov	w1, w20
 	ldrh	w4, [x0, x26]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC41
+	add	x0, x0, :lo12:.LC41
 	bl	printf
-.L441:
+.L557:
 	mov	x0, x19
 	add	x1, x19, 128
 	mov	w2, 65535
-.L444:
+.L560:
 	ldrh	w3, [x0]
 	cmp	w3, w2
-	bne	.L442
+	bne	.L558
 	strh	w20, [x0]
-	cbz	w23, .L443
+	cbz	w22, .L559
 	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
 	strh	w0, [x1, 124]
-.L461:
+.L575:
 	mov	w0, 1
-.L431:
+.L548:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2752,27 +3070,27 @@ gc_add_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L439:
-	ldrh	w4, [x0], 2
+.L554:
+	ldrh	w4, [x1], 2
 	cmp	w4, w20
-	beq	.L450
+	beq	.L566
 	add	w2, w2, 1
-	b	.L438
-.L443:
+	b	.L553
+.L555:
+	add	x19, x0, 392
+	b	.L556
+.L559:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x22, x0, x22, uxth 1
-	ldrh	w0, [x22, 120]
+	add	x23, x0, x23, uxth 1
+	ldrh	w0, [x23, 120]
 	add	w0, w0, 1
-	strh	w0, [x22, 120]
-	b	.L461
-.L442:
+	strh	w0, [x23, 120]
+	b	.L575
+.L558:
 	add	x0, x0, 2
-	cmp	x0, x1
-	bne	.L444
-	b	.L461
-.L450:
-	mov	w0, 0
-	b	.L431
+	cmp	x1, x0
+	bne	.L560
+	b	.L575
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
@@ -2793,18 +3111,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR43
+	adrp	x23, .LANCHOR65
 	stp	x21, x22, [sp, 32]
-	add	x24, x23, :lo12:.LANCHOR43
-	adrp	x22, .LANCHOR65
-	add	x22, x22, :lo12:.LANCHOR65
+	adrp	x24, .LANCHOR46
+	add	x23, x23, :lo12:.LANCHOR65
+	add	x22, x24, :lo12:.LANCHOR46
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L464:
-	ldrb	w19, [x22]
+.L578:
+	ldrb	w19, [x23]
 	cmp	w19, 255
-	bne	.L477
+	bne	.L589
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2812,23 +3130,23 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L477:
+.L589:
 	lsl	x1, x19, 6
-	add	x0, x23, :lo12:.LANCHOR43
+	add	x0, x24, :lo12:.LANCHOR46
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
-	strb	w0, [x22]
-	ldrh	w26, [x2, 48]
-	cbz	w1, .L465
+	strb	w0, [x23]
+	ldrh	w25, [x2, 48]
+	cbz	w1, .L579
 	ldr	w2, [x2, 40]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 320]
 	strh	w3, [x0, 318]
-	adrp	x0, .LC9
-	add	x0, x0, :lo12:.LC9
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
 	bl	printf
 	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
@@ -2836,96 +3154,93 @@ gc_write_completed:
 	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L466:
-	b	.L466
-.L465:
-	adrp	x0, .LANCHOR67
-	mov	x28, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR67]
-	cmp	w1, 3
-	bne	.L478
+.L579:
+	adrp	x26, .LANCHOR67
+	ldrb	w0, [x26, #:lo12:.LANCHOR67]
+	cmp	w0, 3
+	bne	.L590
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L467:
-	adrp	x0, .LANCHOR29
-	adrp	x27, .LANCHOR68
-	and	x21, x26, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L468
-	ldr	x1, [x27, #:lo12:.LANCHOR68]
-	add	x0, x24, x19, lsl 6
-	mov	w3, w26
+.L580:
+	adrp	x0, .LANCHOR7
+	adrp	x28, .LANCHOR68
+	and	x21, x25, 65535
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L581
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	add	x0, x22, x19, lsl 6
+	mov	w3, w25
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC10
+	adrp	x0, .LC43
 	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC10
-	mov	w1, w26
+	add	x0, x0, :lo12:.LC43
+	mov	w1, w25
 	bl	printf
-.L468:
-	ldr	x0, [x27, #:lo12:.LANCHOR68]
-	add	x19, x24, x19, lsl 6
-	mov	x25, x21
-	add	x2, x0, x21
-	ldrb	w1, [x0, x21]
-	ldrb	w0, [x19, 1]
+.L581:
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	add	x0, x22, x19, lsl 6
+	mov	x27, x21
+	ldrb	w0, [x0, 1]
+	ldrb	w1, [x1, x21]
 	cmp	w1, w0
-	beq	.L469
+	beq	.L582
 	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
 	mov	w2, 526
 	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L470:
-	b	.L470
-.L478:
-	mov	w20, 1
-	b	.L467
-.L469:
+.L582:
+	add	x19, x22, x19, lsl 6
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L471
-	ldrb	w0, [x28, #:lo12:.LANCHOR67]
+	beq	.L583
+	ldrb	w0, [x26, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L471
+	bne	.L583
 	adrp	x0, .LANCHOR69
 	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbnz	w0, .L471
+	cbnz	w0, .L583
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
 	mov	x0, 0
-.L472:
+	add	x21, x1, x21
+.L584:
 	cmp	w20, w0, uxth
-	bls	.L464
-	ldrb	w1, [x2, x0]
+	bls	.L578
+	ldrb	w1, [x21, x0]
 	add	x0, x0, 1
-	add	x1, x24, x1, lsl 6
+	add	x1, x22, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L472
-.L471:
+	b	.L584
+.L590:
+	mov	w20, 1
+	b	.L580
+.L583:
 	adrp	x19, .LANCHOR63
 	add	x19, x19, :lo12:.LANCHOR63
 	add	x20, x21, x20, uxth
 	mov	w21, -1
-	strh	w26, [x19, 316]
-.L473:
-	cmp	x25, x20
-	beq	.L464
-	ldr	x1, [x27, #:lo12:.LANCHOR68]
-	ldrb	w0, [x1, x25]
-	strb	w21, [x1, x25]
-	add	x25, x25, 1
+	strh	w25, [x19, 316]
+.L585:
+	cmp	x20, x27
+	beq	.L578
+	ldr	x1, [x28, #:lo12:.LANCHOR68]
+	ldrb	w0, [x1, x27]
+	strb	w21, [x1, x27]
+	add	x27, x27, 1
 	sbfiz	x1, x0, 6, 32
 	ubfiz	x0, x0, 6, 8
-	add	x1, x24, x1
-	add	x0, x24, x0
+	add	x1, x22, x1
+	add	x0, x22, x0
 	strb	wzr, [x1, 61]
 	bl	buf_free
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L473
+	b	.L585
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
@@ -2937,44 +3252,44 @@ gc_get_src_blk:
 	adrp	x0, .LANCHOR70
 	ldrb	w3, [x0, #:lo12:.LANCHOR70]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L487
+	cbz	w0, .L602
 	add	x1, x2, 392
 	mov	w4, 1
-.L488:
+.L603:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L492:
+.L607:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L490
+	beq	.L605
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L491
+	cbz	w4, .L606
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L487:
+.L602:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L493
+	cbz	w0, .L608
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L488
-.L491:
+	b	.L603
+.L606:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L490:
+.L605:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L492
+	bne	.L607
 	ret
-.L493:
+.L608:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -2990,11 +3305,11 @@ gc_free_temp_buf:
 	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L502
-	adrp	x1, .LANCHOR45
-	ldrb	w1, [x1, #:lo12:.LANCHOR45]
+	cbz	w1, .L617
+	adrp	x1, .LANCHOR48
+	ldrb	w1, [x1, #:lo12:.LANCHOR48]
 	cmp	w1, 1
-	bhi	.L502
+	bhi	.L617
 	ldrh	w19, [x0, 316]
 	adrp	x2, .LANCHOR72
 	adrp	x0, .LANCHOR71
@@ -3006,36 +3321,36 @@ gc_free_temp_buf:
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
-.L497:
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
+.L612:
 	cmp	w19, w1
-	bcc	.L500
-.L502:
+	bcc	.L615
+.L617:
 	mov	w0, 0
-	b	.L495
-.L500:
+	b	.L610
+.L615:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L498
+	beq	.L613
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L498
+	cbnz	w3, .L613
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L499
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L614
 	ldr	x0, [x21, #:lo12:.LANCHOR68]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC11
-	add	x0, x0, :lo12:.LC11
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
 	bl	printf
-.L499:
+.L614:
 	ldr	x0, [x21, #:lo12:.LANCHOR68]
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
@@ -3044,14 +3359,14 @@ gc_free_temp_buf:
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L495:
+.L610:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L498:
+.L613:
 	add	w19, w19, 1
-	b	.L497
+	b	.L612
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
 	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
@@ -3062,14 +3377,14 @@ print_gc_debug_info:
 	adrp	x1, .LANCHOR63
 	add	x0, x1, :lo12:.LANCHOR63
 	ldrh	w6, [x2, #:lo12:.LANCHOR73]
-	adrp	x2, .LANCHOR45
+	adrp	x2, .LANCHOR48
 	ldrh	w1, [x1, #:lo12:.LANCHOR63]
 	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR45]
+	ldrb	w4, [x2, #:lo12:.LANCHOR48]
 	ldrh	w3, [x0, 314]
 	ldrh	w2, [x0, 2]
-	adrp	x0, .LC12
-	add	x0, x0, :lo12:.LC12
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
 	b	printf
 	.size	print_gc_debug_info, .-print_gc_debug_info
 	.section	.text.zftl_get_gc_node,"ax",@progbits
@@ -3080,23 +3395,23 @@ zftl_get_gc_node:
 	and	w1, w1, 65535
 	and	w0, w0, 65535
 	cmp	w1, 5
-	bne	.L512
+	bne	.L627
 	mov	w1, w0
 	adrp	x0, .LANCHOR74
 	ldr	x0, [x0, #:lo12:.LANCHOR74]
-.L514:
+.L629:
 	b	_list_get_gc_head_node.isra.2
-.L512:
+.L627:
 	cmp	w1, 2
 	mov	w1, w0
-	bne	.L513
+	bne	.L628
 	adrp	x0, .LANCHOR75
 	ldr	x0, [x0, #:lo12:.LANCHOR75]
-	b	.L514
-.L513:
+	b	.L629
+.L628:
 	adrp	x0, .LANCHOR76
 	ldr	x0, [x0, #:lo12:.LANCHOR76]
-	b	.L514
+	b	.L629
 	.size	zftl_get_gc_node, .-zftl_get_gc_node
 	.section	.text.gc_search_src_blk,"ax",@progbits
 	.align	2
@@ -3117,9 +3432,9 @@ gc_search_src_blk:
 	stp	x27, x28, [sp, 80]
 	add	x0, x0, x21, sxtw 1
 	ldrh	w19, [x0, 120]
-	cbz	w19, .L516
+	cbz	w19, .L631
 	mov	w0, w19
-.L515:
+.L630:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -3127,21 +3442,21 @@ gc_search_src_blk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L516:
+.L631:
 	and	w20, w2, 255
-	cbnz	w21, .L518
+	cbnz	w21, .L633
 	adrp	x24, .LANCHOR77
-	adrp	x26, .LANCHOR29
-	adrp	x27, .LC13
+	adrp	x26, .LANCHOR7
+	adrp	x27, .LC46
 	and	w23, w20, 65535
-	add	x26, x26, :lo12:.LANCHOR29
-	add	x27, x27, :lo12:.LC13
+	add	x26, x26, :lo12:.LANCHOR7
+	add	x27, x27, :lo12:.LC46
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	mov	w22, 0
 	mov	w25, 0
-.L519:
+.L634:
 	cmp	w25, w23
-	bcs	.L524
+	bcs	.L639
 	ldrh	w6, [x24, #:lo12:.LANCHOR77]
 	add	x7, x24, :lo12:.LANCHOR77
 	mov	w1, 3
@@ -3154,44 +3469,44 @@ gc_search_src_blk:
 	mov	w0, 65535
 	mov	w28, w1
 	cmp	w1, w0
-	beq	.L520
+	beq	.L635
 	ldr	w0, [x26]
 	adrp	x6, .LANCHOR4
 	uxtw	x4, w1
-	tbz	x0, 8, .L521
+	tbz	x0, 8, .L636
 	ldr	x0, [x6, #:lo12:.LANCHOR4]
 	stp	x6, x4, [x29, 96]
 	ldrh	w3, [x0, x4, lsl 1]
 	mov	x0, x27
 	bl	printf
 	ldp	x6, x4, [x29, 96]
-.L521:
+.L636:
 	ldr	x0, [x6, #:lo12:.LANCHOR4]
 	ldrh	w1, [x0, x4, lsl 1]
 	adrp	x0, .LANCHOR62
 	ldrh	w0, [x0, #:lo12:.LANCHOR62]
 	cmp	w1, w0
-	bcs	.L522
+	bcs	.L637
 	mov	w2, 0
 	mov	w1, 0
 	mov	w0, w28
 	bl	gc_add_sblk
-	cbz	w0, .L523
+	cbz	w0, .L638
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w23, w22
-	bcs	.L523
-.L524:
+	bcs	.L638
+.L639:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L526
+	tbz	x0, 1, .L641
 	adrp	x25, .LANCHOR79
 	adrp	x28, .LANCHOR78
 	add	x27, x25, :lo12:.LANCHOR79
 	add	x28, x28, :lo12:.LANCHOR78
 	mov	w26, 65535
-.L527:
+.L642:
 	cmp	w19, w23
-	beq	.L531
+	beq	.L646
 	ldrh	w6, [x28]
 	mov	w1, 5
 	mov	w0, w6
@@ -3200,27 +3515,27 @@ gc_search_src_blk:
 	strh	w6, [x28]
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L528
+	beq	.L643
 	adrp	x2, .LANCHOR4
 	ubfiz	x1, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L529
+	bcs	.L644
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L530
+	cbz	w0, .L645
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w23, w22
-	bcs	.L530
-.L531:
+	bcs	.L645
+.L646:
 	ldrh	w1, [x25, #:lo12:.LANCHOR79]
 	cmp	w22, w23
 	adrp	x0, .LANCHOR80
-	bcs	.L533
+	bcs	.L648
 	ldrh	w3, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
 	ldrb	w0, [x0, #:lo12:.LANCHOR72]
@@ -3228,20 +3543,20 @@ gc_search_src_blk:
 	mul	w0, w0, w3
 	sub	w0, w0, w2
 	cmp	w1, w0
-	bge	.L526
+	bge	.L641
 	add	w1, w1, w2
 	strh	w1, [x25, #:lo12:.LANCHOR79]
-.L526:
+.L641:
 	ldr	x0, [x29, 112]
-	tbz	x0, 0, .L534
+	tbz	x0, 0, .L649
 	cmp	w22, w23
-	bcs	.L534
+	bcs	.L649
 	adrp	x25, .LANCHOR81
 	add	x25, x25, :lo12:.LANCHOR81
 	mov	w24, 64
 	adrp	x26, .LANCHOR75
 	mov	w27, 65535
-.L539:
+.L654:
 	ldrh	w6, [x25]
 	ldr	x0, [x26, #:lo12:.LANCHOR75]
 	mov	w1, w6
@@ -3249,109 +3564,109 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x25]
 	cmp	w27, w0, uxth
-	beq	.L535
+	beq	.L650
 	mov	w2, 0
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L536
+	cbz	w0, .L651
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w23, w22
-	bhi	.L536
-.L537:
+	bhi	.L651
+.L652:
 	adrp	x1, .LANCHOR62
 	adrp	x2, .LANCHOR80
 	ldrh	w0, [x1, #:lo12:.LANCHOR62]
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	cmp	w0, w2, lsr 1
-	bls	.L534
+	bls	.L649
 	sub	w0, w0, #8
-	b	.L613
-.L522:
+	b	.L728
+.L637:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L524
-.L520:
+	b	.L639
+.L635:
 	strh	wzr, [x7]
-	b	.L524
-.L523:
+	b	.L639
+.L638:
 	add	w25, w25, 1
 	and	w25, w25, 65535
-	b	.L519
-.L529:
+	b	.L634
+.L644:
 	strh	wzr, [x28]
-	b	.L531
-.L528:
+	b	.L646
+.L643:
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
-	b	.L531
-.L530:
+	b	.L646
+.L645:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L527
-.L533:
+	b	.L642
+.L648:
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bls	.L526
+	bls	.L641
 	sub	w0, w1, w0, lsr 3
 	strh	w0, [x25, #:lo12:.LANCHOR79]
-	b	.L526
-.L535:
+	b	.L641
+.L650:
 	strh	wzr, [x25]
-.L538:
+.L653:
 	cmp	w22, w23
-	bcs	.L537
+	bcs	.L652
 	adrp	x1, .LANCHOR62
 	adrp	x2, .LANCHOR80
 	ldrh	w0, [x1, #:lo12:.LANCHOR62]
 	ldrh	w2, [x2, #:lo12:.LANCHOR80]
 	cmp	w2, w0
-	bls	.L534
+	bls	.L649
 	add	w0, w0, 8
-.L613:
+.L728:
 	strh	w0, [x1, #:lo12:.LANCHOR62]
-.L534:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L561
+.L649:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L676
 	ldr	w2, [x29, 112]
-	adrp	x0, .LC14
+	adrp	x0, .LC47
 	mov	w4, w20
 	mov	w3, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC14
+	add	x0, x0, :lo12:.LC47
 	bl	printf
-.L561:
+.L676:
 	mov	w0, w22
-	b	.L515
-.L536:
+	b	.L630
+.L651:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L539
-	b	.L538
-.L518:
+	bne	.L654
+	b	.L653
+.L633:
 	ldr	w0, [x29, 112]
 	adrp	x3, .LANCHOR81
 	and	w0, w0, 1
 	str	w0, [x29, 104]
 	ldr	x0, [x29, 112]
 	strh	wzr, [x3, #:lo12:.LANCHOR81]
-	tbz	x0, 0, .L563
+	tbz	x0, 0, .L678
 	adrp	x23, .LANCHOR82
 	adrp	x24, .LANCHOR83
 	ldrh	w0, [x23, #:lo12:.LANCHOR82]
 	ldrh	w1, [x24, #:lo12:.LANCHOR83]
 	cmp	w0, w1, lsr 1
-	bcc	.L564
+	bcc	.L679
 	adrp	x1, .LANCHOR84
 	mov	w22, 0
 	ldrh	w1, [x1, #:lo12:.LANCHOR84]
 	cmp	w1, w0
-	bls	.L542
-.L611:
+	bls	.L657
+.L726:
 	add	x26, x3, :lo12:.LANCHOR81
 	and	w28, w20, 65535
 	mov	w25, 64
 	mov	w27, 65535
-.L545:
+.L660:
 	adrp	x0, .LANCHOR75
 	ldrh	w6, [x26]
 	ldr	x0, [x0, #:lo12:.LANCHOR75]
@@ -3360,27 +3675,27 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x26]
 	cmp	w27, w0, uxth
-	beq	.L543
+	beq	.L658
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L544
+	cbz	w0, .L659
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w22, w28
-	bcc	.L544
-.L542:
+	bcc	.L659
+.L657:
 	ldrh	w1, [x24, #:lo12:.LANCHOR83]
 	ldrh	w0, [x23, #:lo12:.LANCHOR82]
 	cmp	w0, w1, lsr 1
-	bls	.L540
+	bls	.L655
 	adrp	x24, .LANCHOR77
 	and	w27, w20, 65535
 	mov	w23, 64
 	mov	w26, 65535
 	strh	wzr, [x24, #:lo12:.LANCHOR77]
 	add	x24, x24, :lo12:.LANCHOR77
-.L547:
+.L662:
 	ldrh	w6, [x24]
 	mov	w1, 3
 	mov	w0, w6
@@ -3388,22 +3703,22 @@ gc_search_src_blk:
 	add	w6, w6, 1
 	strh	w6, [x24]
 	cmp	w26, w0, uxth
-	beq	.L540
+	beq	.L655
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L546
+	cbz	w0, .L661
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w22, w27
-	bcs	.L540
-.L546:
+	bcs	.L655
+.L661:
 	sub	w23, w23, #1
 	ands	w23, w23, 65535
-	bne	.L547
-.L540:
+	bne	.L662
+.L655:
 	ldr	x0, [x29, 112]
-	tbz	x0, 1, .L548
+	tbz	x0, 1, .L663
 	adrp	x28, .LANCHOR78
 	adrp	x24, .LANCHOR85
 	add	x27, x24, :lo12:.LANCHOR85
@@ -3412,7 +3727,7 @@ gc_search_src_blk:
 	add	x28, x28, :lo12:.LANCHOR78
 	mov	w25, 65535
 	adrp	x26, .LANCHOR4
-.L553:
+.L668:
 	ldrh	w6, [x28]
 	mov	w1, 5
 	mov	w0, w6
@@ -3421,36 +3736,36 @@ gc_search_src_blk:
 	strh	w6, [x28]
 	and	w1, w0, 65535
 	cmp	w1, w25
-	beq	.L549
+	beq	.L664
 	ldr	x2, [x26, #:lo12:.LANCHOR4]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w2, [x2, x1]
 	ldrh	w1, [x27]
 	cmp	w2, w1
-	bcs	.L550
+	bcs	.L665
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L551
+	cbz	w0, .L666
 	add	w5, w22, 1
 	add	w19, w19, 1
 	and	w22, w5, 65535
 	and	w19, w19, 65535
 	cmp	w22, w20
-	bcc	.L551
-.L552:
+	bcc	.L666
+.L667:
 	cmp	w22, w20
 	adrp	x4, .LANCHOR80
 	adrp	x2, .LANCHOR72
-	bcc	.L554
-	cbnz	w19, .L555
+	bcc	.L669
+	cbnz	w19, .L670
 	adrp	x0, .LANCHOR86
 	ldrh	w1, [x0, #:lo12:.LANCHOR86]
 	adrp	x0, .LANCHOR87
 	ldrh	w0, [x0, #:lo12:.LANCHOR87]
 	cmp	w1, w0
-	bls	.L555
-.L554:
+	bls	.L670
+.L669:
 	adrp	x1, .LANCHOR71
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x24, #:lo12:.LANCHOR85]
@@ -3459,13 +3774,13 @@ gc_search_src_blk:
 	ldrh	w1, [x4, #:lo12:.LANCHOR80]
 	sub	w1, w2, w1, lsr 3
 	cmp	w0, w1
-	bge	.L548
+	bge	.L663
 	add	w0, w0, 4
-.L612:
+.L727:
 	strh	w0, [x24, #:lo12:.LANCHOR85]
-.L548:
+.L663:
 	ldr	w0, [x29, 104]
-	cbz	w0, .L534
+	cbz	w0, .L649
 	adrp	x25, .LANCHOR78
 	adrp	x23, .LANCHOR88
 	add	x28, x23, :lo12:.LANCHOR88
@@ -3474,81 +3789,81 @@ gc_search_src_blk:
 	add	x25, x25, :lo12:.LANCHOR78
 	mov	w26, 65535
 	adrp	x27, .LANCHOR4
-.L559:
+.L674:
 	ldrh	w0, [x25]
 	mov	w1, 3
 	bl	zftl_get_gc_node
 	and	w1, w0, 65535
 	cmp	w1, w26
-	beq	.L556
+	beq	.L671
 	ldr	x2, [x27, #:lo12:.LANCHOR4]
 	ubfiz	x1, x1, 1, 16
 	ldrh	w1, [x2, x1]
 	ldrh	w2, [x28]
 	cmp	w2, w1
-	bls	.L557
+	bls	.L672
 	cmp	w1, 2
-	bhi	.L558
-.L557:
+	bhi	.L673
+.L672:
 	mov	w2, w21
 	mov	w1, 0
 	bl	gc_add_sblk
-	cbz	w0, .L558
+	cbz	w0, .L673
 	add	w5, w22, 1
 	and	w22, w5, 65535
 	cmp	w22, w20
-	bcs	.L556
-.L558:
+	bcs	.L671
+.L673:
 	sub	w24, w24, #1
 	ands	w24, w24, 65535
-	bne	.L559
-.L556:
+	bne	.L674
+.L671:
 	cmp	w22, w20
 	adrp	x2, .LANCHOR80
-	bcs	.L560
+	bcs	.L675
 	ldrh	w0, [x23, #:lo12:.LANCHOR88]
 	ldrh	w1, [x2, #:lo12:.LANCHOR80]
 	cmp	w0, w1, lsr 1
-	bls	.L534
+	bls	.L649
 	sub	w0, w0, #4
 	strh	w0, [x23, #:lo12:.LANCHOR88]
-	b	.L534
-.L564:
+	b	.L649
+.L679:
 	mov	w22, 0
-	b	.L611
-.L543:
+	b	.L726
+.L658:
 	strh	wzr, [x26]
-	b	.L542
-.L544:
+	b	.L657
+.L659:
 	sub	w4, w25, #1
 	ands	w25, w4, 65535
-	bne	.L545
-	b	.L542
-.L563:
+	bne	.L660
+	b	.L657
+.L678:
 	mov	w22, 0
-	b	.L540
-.L550:
+	b	.L655
+.L665:
 	strh	wzr, [x28]
-	b	.L552
-.L549:
+	b	.L667
+.L664:
 	adrp	x0, .LANCHOR77
 	strh	wzr, [x0, #:lo12:.LANCHOR77]
-	b	.L552
-.L551:
+	b	.L667
+.L666:
 	sub	w23, w23, #1
 	ands	w23, w23, 65535
-	bne	.L553
-	b	.L552
-.L555:
+	bne	.L668
+	b	.L667
+.L670:
 	ldrh	w1, [x4, #:lo12:.LANCHOR80]
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x24, #:lo12:.LANCHOR85]
 	mul	w1, w1, w2
 	cmp	w0, w1
-	ble	.L548
+	ble	.L663
 	sub	w0, w0, #4
-	b	.L612
-.L560:
+	b	.L727
+.L675:
 	ldrh	w0, [x2, #:lo12:.LANCHOR80]
 	adrp	x2, .LANCHOR72
 	ldrh	w1, [x23, #:lo12:.LANCHOR88]
@@ -3556,10 +3871,10 @@ gc_search_src_blk:
 	mul	w0, w0, w2
 	sub	w0, w0, #32
 	cmp	w1, w0
-	bge	.L534
+	bge	.L649
 	add	w1, w1, 4
 	strh	w1, [x23, #:lo12:.LANCHOR88]
-	b	.L534
+	b	.L649
 	.size	gc_search_src_blk, .-gc_search_src_blk
 	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
@@ -3572,27 +3887,27 @@ zftl_insert_free_list:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L615
+	bne	.L730
 	adrp	x2, .LANCHOR89
 	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LANCHOR90
-.L617:
+.L732:
 	b	_insert_free_list
-.L615:
+.L730:
 	cmp	w0, 16
-	bne	.L616
+	bne	.L731
 	adrp	x2, .LANCHOR91
 	adrp	x0, .LANCHOR92
 	add	x2, x2, :lo12:.LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L617
-.L616:
+	b	.L732
+.L731:
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L617
+	b	.L732
 	.size	zftl_insert_free_list, .-zftl_insert_free_list
 	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
@@ -3606,30 +3921,30 @@ zftl_insert_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L619
+	bne	.L734
 	adrp	x2, .LANCHOR84
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR84
 	add	x0, x0, :lo12:.LANCHOR75
-.L622:
+.L737:
 	b	_insert_data_list
-.L619:
+.L734:
 	cmp	w2, 96
-	bne	.L620
+	bne	.L735
 	adrp	x2, .LANCHOR82
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L622
-.L620:
+	b	.L737
+.L735:
 	cmp	w2, 160
-	bne	.L618
+	bne	.L733
 	adrp	x2, .LANCHOR86
 	adrp	x0, .LANCHOR74
 	add	x2, x2, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L622
-.L618:
+	b	.L737
+.L733:
 	ret
 	.size	zftl_insert_data_list, .-zftl_insert_data_list
 	.section	.text.zftl_get_free_sblk,"ax",@progbits
@@ -3645,22 +3960,22 @@ zftl_get_free_sblk:
 	str	x21, [sp, 32]
 	and	w21, w1, 65535
 	cmp	w21, 5
-	bne	.L624
+	bne	.L739
 	adrp	x1, .LANCHOR91
 	add	x2, x1, :lo12:.LANCHOR91
 	ldrh	w3, [x1, #:lo12:.LANCHOR91]
 	ldrh	w1, [x20, #:lo12:.LANCHOR93]
 	cmp	w3, w1
-	bls	.L625
+	bls	.L740
 	mov	w1, w0
 	adrp	x0, .LANCHOR92
 	add	x0, x0, :lo12:.LANCHOR92
-.L629:
+.L744:
 	bl	_list_pop_index_node
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	bne	.L627
+	bne	.L742
 	adrp	x0, .LANCHOR89
 	ldrh	w5, [x20, #:lo12:.LANCHOR93]
 	mov	w2, w21
@@ -3668,32 +3983,32 @@ zftl_get_free_sblk:
 	ldrh	w4, [x0, #:lo12:.LANCHOR89]
 	adrp	x0, .LANCHOR90
 	ldr	x3, [x0, #:lo12:.LANCHOR90]
-	adrp	x0, .LC15
-	add	x0, x0, :lo12:.LC15
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
 	bl	printf
-.L627:
+.L742:
 	mov	w0, w19
 	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 48
 	ret
-.L625:
+.L740:
 	mov	w1, w0
 	add	x2, x20, :lo12:.LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L629
-.L624:
+	b	.L744
+.L739:
 	adrp	x1, .LANCHOR89
 	add	x2, x1, :lo12:.LANCHOR89
 	ldrh	w3, [x1, #:lo12:.LANCHOR89]
 	ldrh	w1, [x20, #:lo12:.LANCHOR93]
 	cmp	w3, w1
-	bls	.L625
+	bls	.L740
 	mov	w1, w0
 	adrp	x0, .LANCHOR90
 	add	x0, x0, :lo12:.LANCHOR90
-	b	.L629
+	b	.L744
 	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
 	.section	.text.zftl_remove_data_node,"ax",@progbits
 	.align	2
@@ -3707,30 +4022,30 @@ zftl_remove_data_node:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L631
+	bne	.L746
 	adrp	x2, .LANCHOR84
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR84
 	add	x0, x0, :lo12:.LANCHOR75
-.L634:
+.L749:
 	b	_list_remove_node
-.L631:
+.L746:
 	cmp	w2, 96
-	bne	.L632
+	bne	.L747
 	adrp	x2, .LANCHOR82
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L634
-.L632:
+	b	.L749
+.L747:
 	cmp	w2, 160
-	bne	.L630
+	bne	.L745
 	adrp	x2, .LANCHOR86
 	adrp	x0, .LANCHOR74
 	add	x2, x2, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L634
-.L630:
+	b	.L749
+.L745:
 	ret
 	.size	zftl_remove_data_node, .-zftl_remove_data_node
 	.section	.text.zftl_remove_free_node,"ax",@progbits
@@ -3744,27 +4059,27 @@ zftl_remove_free_node:
 	add	x0, x0, x1, uxth 2
 	ldrb	w0, [x0, 2]
 	ands	w0, w0, 24
-	bne	.L636
+	bne	.L751
 	adrp	x2, .LANCHOR89
 	adrp	x0, .LANCHOR90
 	add	x2, x2, :lo12:.LANCHOR89
 	add	x0, x0, :lo12:.LANCHOR90
-.L638:
+.L753:
 	b	_list_remove_node
-.L636:
+.L751:
 	cmp	w0, 16
-	bne	.L637
+	bne	.L752
 	adrp	x2, .LANCHOR91
 	adrp	x0, .LANCHOR92
 	add	x2, x2, :lo12:.LANCHOR91
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L638
-.L637:
+	b	.L753
+.L752:
 	adrp	x2, .LANCHOR93
 	adrp	x0, .LANCHOR94
 	add	x2, x2, :lo12:.LANCHOR93
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L638
+	b	.L753
 	.size	zftl_remove_free_node, .-zftl_remove_free_node
 	.section	.text.zftl_list_update_data_list,"ax",@progbits
 	.align	2
@@ -3778,30 +4093,30 @@ zftl_list_update_data_list:
 	ldrb	w2, [x0, 2]
 	and	w2, w2, 224
 	cmp	w2, 64
-	bne	.L640
+	bne	.L755
 	adrp	x2, .LANCHOR84
 	adrp	x0, .LANCHOR75
 	add	x2, x2, :lo12:.LANCHOR84
 	add	x0, x0, :lo12:.LANCHOR75
-.L643:
+.L758:
 	b	_list_update_data_list
-.L640:
+.L755:
 	cmp	w2, 96
-	bne	.L641
+	bne	.L756
 	adrp	x2, .LANCHOR82
 	adrp	x0, .LANCHOR76
 	add	x2, x2, :lo12:.LANCHOR82
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L643
-.L641:
+	b	.L758
+.L756:
 	cmp	w2, 160
-	bne	.L639
+	bne	.L754
 	adrp	x2, .LANCHOR86
 	adrp	x0, .LANCHOR74
 	add	x2, x2, :lo12:.LANCHOR86
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L643
-.L639:
+	b	.L758
+.L754:
 	ret
 	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
 	.section	.text.print_list_info,"ax",@progbits
@@ -3817,22 +4132,22 @@ print_list_info:
 	stp	x19, x20, [sp, 48]
 	mov	x19, x0
 	stp	x21, x22, [sp, 64]
-	adrp	x0, .LC16
+	adrp	x0, .LC49
 	stp	x23, x24, [sp, 80]
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC49
 	str	x25, [sp, 96]
 	bl	printf
 	ldr	x19, [x19]
-	cbz	x19, .L644
+	cbz	x19, .L759
 	mov	x23, -6148914691236517206
-	adrp	x21, .LC17
-	add	x21, x21, :lo12:.LC17
+	adrp	x21, .LC50
+	add	x21, x21, :lo12:.LC50
 	mov	w20, 0
 	adrp	x22, .LANCHOR0
 	movk	x23, 0xaaab, lsl 0
 	adrp	x24, .LANCHOR3
 	adrp	x25, .LANCHOR4
-.L651:
+.L766:
 	ldr	x2, [x22, #:lo12:.LANCHOR0]
 	ldr	x1, [x24, #:lo12:.LANCHOR3]
 	sub	x2, x19, x2
@@ -3863,14 +4178,14 @@ print_list_info:
 	ldrh	w19, [x19]
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L644
+	beq	.L759
 	ldr	x0, [x22, #:lo12:.LANCHOR0]
 	mov	w1, 6
 	add	w20, w20, 1
 	cmp	w20, 33
 	umaddl	x19, w19, w1, x0
-	bne	.L651
-.L644:
+	bne	.L766
+.L759:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -3925,55 +4240,58 @@ dump_all_list_info:
 ftl_get_blk_list_in_sblk:
 	adrp	x2, .LANCHOR3
 	and	w0, w0, 65535
-	adrp	x6, .LANCHOR96
-	add	x6, x6, :lo12:.LANCHOR96
+	adrp	x7, .LANCHOR96
+	add	x7, x7, :lo12:.LANCHOR96
 	ldr	x2, [x2, #:lo12:.LANCHOR3]
 	mov	w3, 0
-	mov	w12, 21
+	mov	w13, 21
 	add	x2, x2, x0, uxth 2
-	ldrb	w11, [x2, 3]
+	ldrb	w12, [x2, 3]
 	adrp	x2, .LANCHOR72
-	ldrb	w8, [x2, #:lo12:.LANCHOR72]
+	ldrb	w10, [x2, #:lo12:.LANCHOR72]
 	adrp	x2, .LANCHOR95
-	ldrb	w5, [x2, #:lo12:.LANCHOR95]
-	mul	w0, w0, w5
+	ldrb	w6, [x2, #:lo12:.LANCHOR95]
+	and	w2, w6, 65535
+	mul	w0, w0, w2
+	sub	w2, w2, #1
+	sxth	w5, w2
 	and	w4, w0, 65535
 	mov	w0, 0
-.L656:
-	cmp	w3, w8
-	blt	.L660
+.L771:
+	cmp	w3, w10
+	blt	.L775
 	sxtw	x2, w0
 	mov	w3, -1
-.L661:
-	cmp	w8, w2
-	bgt	.L662
+.L776:
+	cmp	w10, w2
+	bgt	.L777
 	ret
-.L660:
-	asr	w2, w11, w3
-	tbnz	x2, 0, .L657
-	sdiv	w2, w3, w5
-	ldrh	w7, [x6]
-	sbfiz	x10, x0, 1, 32
-	cmp	w5, 1
-	sub	w7, w12, w7
-	lsl	w2, w2, w7
+.L775:
+	asr	w2, w12, w3
+	tbnz	x2, 0, .L772
+	sdiv	w2, w3, w6
+	ldrh	w8, [x7]
+	sbfiz	x11, x0, 1, 32
+	cmp	w6, 1
+	sub	w8, w13, w8
+	lsl	w2, w2, w8
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L658
-.L663:
+	bhi	.L773
+.L778:
 	add	w0, w0, 1
-	strh	w2, [x1, x10]
-.L657:
+	strh	w2, [x1, x11]
+.L772:
 	add	w3, w3, 1
-	b	.L656
-.L658:
-	and	w7, w3, 1
-	add	w2, w2, w7
-	b	.L663
-.L662:
+	b	.L771
+.L773:
+	and	w8, w5, w3
+	add	w2, w2, w8
+	b	.L778
+.L777:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L661
+	b	.L776
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
@@ -4011,18 +4329,18 @@ gc_free_src_blk:
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC18
+	adrp	x22, .LC51
 	adrp	x23, .LANCHOR4
 	add	x21, x21, :lo12:.LANCHOR63
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC18
+	add	x22, x22, :lo12:.LC51
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L667:
+.L782:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L683
+	bhi	.L797
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -4030,123 +4348,121 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L683:
+.L797:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
 	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L668
+	cbz	w2, .L783
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L668:
+.L783:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26]
-	cbnz	w0, .L669
+	cbnz	w0, .L784
 	adrp	x0, .LANCHOR3
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L670
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L785
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC19
+	adrp	x0, .LC52
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC52
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L670:
+.L785:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L671
+	beq	.L786
 	tst	w0, 192
-	bne	.L672
-.L671:
+	bne	.L787
+.L786:
 	adrp	x1, .LANCHOR97
 	adrp	x0, .LC0
 	mov	w2, 770
 	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L673:
-	b	.L673
-.L672:
+.L787:
 	mov	w0, w19
 	bl	ftl_free_sblk
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L674
+	cbz	w2, .L788
 	add	x3, x0, 392
 	mov	w1, 0
-.L676:
+.L790:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L675
+	bne	.L789
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L674:
+.L788:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L677
+	cbz	w2, .L791
 	add	x3, x0, 136
 	mov	w1, 0
-.L679:
+.L793:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L678
+	bne	.L792
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L677:
+.L791:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L680
+	cbz	w2, .L794
 	add	x3, x0, 264
 	mov	w1, 0
-.L682:
+.L796:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L681
+	bne	.L795
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L680:
+.L794:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L667
-.L675:
+	b	.L782
+.L789:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L676
-	b	.L674
-.L678:
+	bne	.L790
+	b	.L788
+.L792:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L679
-	b	.L677
-.L681:
+	bne	.L793
+	b	.L791
+.L795:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L682
-	b	.L680
-.L669:
+	bne	.L796
+	b	.L794
+.L784:
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L680
+	b	.L794
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -4172,14 +4488,14 @@ ftl_erase_phy_blk:
 	adrp	x0, .LANCHOR98
 	sxth	w19, w19
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L707
+	cbz	w0, .L821
 	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L707:
+.L821:
 	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	mov	w1, w21
 	mov	w0, w20
@@ -4194,180 +4510,202 @@ ftl_erase_phy_blk:
 	.global	ftl_erase_sblk
 	.type	ftl_erase_sblk, %function
 ftl_erase_sblk:
-	stp	x29, x30, [sp, -160]!
+	stp	x29, x30, [sp, -176]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR3
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR3
 	stp	x25, x26, [sp, 64]
-	and	w25, w0, 65535
-	ldr	x0, [x21, #:lo12:.LANCHOR3]
-	mov	w22, w1
+	and	w26, w0, 65535
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
+	adrp	x25, .LANCHOR100
+	stp	x21, x22, [sp, 32]
+	ubfiz	x22, x26, 2, 16
+	add	x0, x0, x22
+	stp	x27, x28, [sp, 80]
 	stp	x19, x20, [sp, 16]
-	ubfiz	x20, x25, 2, 16
-	add	x0, x0, x20
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR100
-	adrp	x23, .LANCHOR95
-	add	x24, x24, :lo12:.LANCHOR100
-	add	x23, x23, :lo12:.LANCHOR95
-	ldrb	w26, [x0, 3]
+	adrp	x24, .LANCHOR95
+	mov	w20, w1
+	add	x25, x25, :lo12:.LANCHOR100
+	ldrb	w28, [x0, 3]
+	add	x24, x24, :lo12:.LANCHOR95
+	add	x27, x29, 112
 	mov	w19, 0
-	str	x27, [sp, 80]
-	add	x27, x29, 96
-.L713:
-	ldrb	w0, [x24]
+.L827:
+	ldrb	w0, [x25]
 	cmp	w19, w0
-	bge	.L720
-	ldrb	w3, [x23]
+	bge	.L838
+	ldrb	w1, [x24]
 	adrp	x0, .LANCHOR99
-	mov	w1, 0
-	ldrh	w4, [x0, #:lo12:.LANCHOR99]
+	mov	w21, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR99]
+	sub	w4, w1, #1
 	mov	w0, 0
-	mul	w6, w19, w3
-	mul	w5, w25, w3
-	b	.L721
-.L715:
+	mul	w6, w19, w1
+	mul	w5, w26, w1
+	b	.L839
+.L829:
 	add	w2, w0, w6
-	asr	w2, w26, w2
-	tbnz	x2, 0, .L714
-	and	w2, w0, 1
+	asr	w2, w28, w2
+	tbnz	x2, 0, .L828
+	and	w2, w0, w4
 	add	w2, w2, w5
-	mul	w2, w2, w4
-	str	w2, [x27, w1, sxtw 2]
-	add	w1, w1, 1
-.L714:
+	mul	w2, w2, w3
+	str	w2, [x27, w21, sxtw 2]
+	add	w21, w21, 1
+.L828:
 	add	w0, w0, 1
-.L721:
-	cmp	w0, w3
-	blt	.L715
-	cmp	w1, 2
-	bne	.L716
+.L839:
+	cmp	w0, w1
+	blt	.L829
+	cmp	w1, 4
+	bne	.L830
+	mov	x3, 0
+.L831:
+	cmp	w21, w3
+	bgt	.L832
+.L833:
+	add	w19, w19, 1
+	b	.L827
+.L832:
+	ldr	w2, [x27, x3, lsl 2]
+	mov	w1, w20
+	str	x3, [x29, 104]
+	mov	w0, w19
+	bl	flash_erase_block_en
+	ldr	x3, [x29, 104]
+	add	x3, x3, 1
+	b	.L831
+.L830:
+	cmp	w21, 2
+	bne	.L834
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L717
-	ldp	w2, w3, [x29, 96]
-	cmp	w22, 0
+	cbz	w0, .L835
+	ldp	w2, w3, [x29, 112]
+	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L717:
-	ldp	w2, w3, [x29, 96]
-	mov	w1, w22
+.L835:
+	ldp	w2, w3, [x29, 112]
+	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L718:
-	add	w19, w19, 1
-	b	.L713
-.L716:
-	cmp	w1, 1
-	bne	.L718
+	b	.L833
+.L834:
+	cmp	w21, 1
+	bne	.L833
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbz	w0, .L719
-	ldr	w2, [x29, 96]
-	cmp	w22, 0
+	cbz	w0, .L837
+	ldr	w2, [x29, 112]
+	cmp	w20, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L719:
-	ldr	w2, [x29, 96]
-	mov	w1, w22
+.L837:
+	ldr	w2, [x29, 112]
+	mov	w1, w20
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L718
-.L720:
-	adrp	x2, .LANCHOR53
-	ldr	x3, [x21, #:lo12:.LANCHOR3]
-	cbnz	w22, .L722
-	ldrh	w1, [x3, x20]
+	b	.L833
+.L838:
+	adrp	x2, .LANCHOR101
+	ldr	x3, [x23, #:lo12:.LANCHOR3]
+	cbnz	w20, .L840
+	ldrh	w1, [x3, x22]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
-	strh	w1, [x3, x20]
-	ldr	x1, [x2, #:lo12:.LANCHOR53]
+	strh	w1, [x3, x22]
+	ldr	x1, [x2, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L724
+	bge	.L842
 	strh	w0, [x1, 96]
-.L724:
+.L842:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
 	ret
-.L722:
-	ldr	w1, [x3, x20]
+.L840:
+	ldr	w1, [x3, x22]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
 	and	w0, w0, 255
 	bfi	w1, w0, 11, 8
-	str	w1, [x3, x20]
+	str	w1, [x3, x22]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR53]
+	ldr	x1, [x2, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L724
+	bcs	.L842
 	strh	w0, [x1, 98]
-	b	.L724
+	b	.L842
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_sys_blk
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
-	adrp	x0, .LANCHOR53
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
-	ldrh	w0, [x1, 136]
-	cmp	w0, 63
-	bls	.L734
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR101
+	add	x29, sp, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
+	ldrh	w2, [x1, 136]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	cmp	w2, 63
+	bls	.L852
 	strh	wzr, [x1, 136]
-.L734:
-	ldrh	w3, [x1, 112]
-	cbnz	w3, .L735
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR101
+.L852:
+	ldrh	w0, [x1, 112]
+	cbnz	w0, .L853
+	adrp	x1, .LANCHOR102
 	adrp	x0, .LC0
-	mov	w2, 983
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR101
+	mov	w2, 994
+	add	x1, x1, :lo12:.LANCHOR102
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L736:
-	b	.L736
-.L735:
-	mov	w6, 65535
-.L741:
+.L853:
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	mov	w5, 65535
+.L856:
 	ldrh	w2, [x1, 136]
-.L737:
-	mov	w4, w2
+.L854:
+	mov	w3, w2
 	cmp	w2, 63
-	ble	.L738
+	ble	.L855
 	strh	wzr, [x1, 136]
-	b	.L741
-.L738:
-	add	x5, x2, 1
-	add	x0, x1, x5, lsl 1
+	b	.L856
+.L855:
+	add	x4, x2, 1
+	add	x0, x1, x4, lsl 1
 	ldrh	w0, [x0, 158]
-	cmp	w0, w6
-	bne	.L742
-	mov	x2, x5
-	b	.L737
-.L742:
-	add	x4, x1, x4, sxtw 1
-	mov	w5, -1
-	sub	w3, w3, #1
-	strh	w5, [x4, 160]
+	cmp	w0, w5
+	bne	.L859
+	mov	x2, x4
+	b	.L854
+.L859:
+	add	x3, x1, x3, sxtw 1
+	mov	w4, -1
+	ldr	x19, [sp, 16]
+	strh	w4, [x3, 160]
 	strh	w2, [x1, 136]
-	strh	w3, [x1, 112]
+	ldrh	w2, [x1, 112]
+	sub	w2, w2, #1
+	strh	w2, [x1, 112]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
 	.section	.text.ftl_free_sys_blk,"ax",@progbits
@@ -4375,52 +4713,56 @@ ftl_alloc_sys_blk:
 	.global	ftl_free_sys_blk
 	.type	ftl_free_sys_blk, %function
 ftl_free_sys_blk:
-	adrp	x1, .LANCHOR53
-	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR101
+	mov	x19, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L747
+	bls	.L862
 	strh	wzr, [x1, 138]
-.L747:
-	ldrh	w3, [x1, 112]
-	cmp	w3, 63
-	bls	.L748
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR102
+.L862:
+	ldrh	w0, [x1, 112]
+	cmp	w0, 63
+	bls	.L863
+	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 1007
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR102
+	mov	w2, 1018
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L749:
-	b	.L749
-.L748:
-	mov	w6, 65535
-.L754:
-	ldrh	w2, [x1, 138]
-.L750:
-	mov	w4, w2
-	cmp	w2, 63
-	ble	.L751
-	strh	wzr, [x1, 138]
-	b	.L754
-.L751:
-	add	x5, x2, 1
-	add	x7, x1, x5, lsl 1
-	ldrh	w7, [x7, 158]
-	cmp	w7, w6
-	bne	.L752
-	add	x4, x1, x4, sxtw 1
-	add	w3, w3, 1
-	strh	w0, [x4, 160]
-	strh	w2, [x1, 138]
-	strh	w3, [x1, 112]
+.L863:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
+	mov	w4, 65535
+.L866:
+	ldrh	w1, [x0, 138]
+.L864:
+	mov	w2, w1
+	cmp	w1, 63
+	ble	.L865
+	strh	wzr, [x0, 138]
+	b	.L866
+.L865:
+	add	x3, x1, 1
+	add	x5, x0, x3, lsl 1
+	ldrh	w5, [x5, 158]
+	cmp	w5, w4
+	bne	.L867
+	add	x2, x0, x2, sxtw 1
+	strh	w20, [x2, 160]
+	strh	w1, [x0, 138]
+	ldrh	w1, [x0, 112]
+	ldp	x19, x20, [sp, 16]
+	add	w1, w1, 1
+	strh	w1, [x0, 112]
+	ldp	x29, x30, [sp], 32
 	ret
-.L752:
-	mov	x2, x5
-	b	.L750
+.L867:
+	mov	x1, x3
+	b	.L864
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
@@ -4430,7 +4772,7 @@ ftl_info_data_recovery:
 	ldrh	w2, [x0]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L768
+	beq	.L880
 	stp	x29, x30, [sp, -48]!
 	adrp	x1, .LANCHOR3
 	add	x29, sp, 0
@@ -4441,25 +4783,25 @@ ftl_info_data_recovery:
 	add	x21, x20, x19
 	ldrb	w1, [x21, 2]
 	tst	w1, 224
-	bne	.L758
+	bne	.L870
 	ldrb	w0, [x0, 4]
 	bfi	w1, w0, 5, 3
 	strb	w1, [x21, 2]
 	mov	w0, w2
 	bl	zftl_remove_free_node
 	ldrb	w0, [x21, 2]
-	adrp	x1, .LANCHOR53
-	ldr	x3, [x1, #:lo12:.LANCHOR53]
-	tbz	x0, 3, .L762
+	adrp	x1, .LANCHOR101
+	ldr	x3, [x1, #:lo12:.LANCHOR101]
+	tbz	x0, 3, .L874
 	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
 	strh	w2, [x3, 116]
-.L763:
+.L875:
 	and	w0, w0, 224
 	cmp	w0, 160
-	bne	.L765
+	bne	.L877
 	ldr	w0, [x20, x19]
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ubfx	x2, x0, 11, 8
 	add	w2, w2, 1
 	bfi	w0, w2, 11, 8
@@ -4467,44 +4809,44 @@ ftl_info_data_recovery:
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
-.L758:
+.L870:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L762:
+.L874:
 	tst	w0, 24
-	bne	.L764
+	bne	.L876
 	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
 	strh	w2, [x3, 114]
-	b	.L763
-.L764:
+	b	.L875
+.L876:
 	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
 	strh	w2, [x3, 118]
-	b	.L763
-.L765:
+	b	.L875
+.L877:
 	ldrh	w2, [x20, x19]
 	cmp	w0, 64
 	add	w3, w2, 1
 	bfi	w2, w3, 0, 11
 	strh	w2, [x20, x19]
-	bne	.L766
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	bne	.L878
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	b	.L758
-.L766:
+	b	.L870
+.L878:
 	cmp	w0, 96
-	bne	.L758
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	bne	.L870
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-	b	.L758
-.L768:
+	b	.L870
+.L880:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -4512,46 +4854,47 @@ ftl_info_data_recovery:
 	.global	ftl_get_ppa_from_index
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
-	and	w1, w0, 65535
-	adrp	x0, .LANCHOR5
-	adrp	x2, .LANCHOR72
-	ldr	x3, [x0, #:lo12:.LANCHOR5]
-	adrp	x0, .LANCHOR80
-	ldrb	w2, [x2, #:lo12:.LANCHOR72]
-	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	bge	.L772
-	add	x3, x3, 16
-.L773:
-	ldrb	w2, [x3, 9]
-	sdiv	w4, w1, w2
-	msub	w1, w4, w2, w1
-	add	x1, x3, x1, uxth 1
-	ldrh	w0, [x1, 16]
-	mov	w1, 65535
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR5
+	adrp	x3, .LANCHOR72
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	ldr	x2, [x1, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR80
+	ldrb	w3, [x3, #:lo12:.LANCHOR72]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	stp	x19, x20, [sp, 16]
+	mul	w1, w1, w3
 	cmp	w0, w1
-	bne	.L774
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR103
+	bge	.L884
+	add	x2, x2, 16
+.L885:
+	ldrb	w1, [x2, 9]
+	sdiv	w19, w0, w1
+	msub	w0, w19, w1, w0
+	add	x0, x2, x0, uxth 1
+	ldrh	w20, [x0, 16]
+	mov	w0, 65535
+	cmp	w20, w0
+	bne	.L886
+	adrp	x1, .LANCHOR104
 	adrp	x0, .LC0
-	mov	w2, 1385
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR103
+	mov	w2, 1403
+	add	x1, x1, :lo12:.LANCHOR104
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L775:
-	b	.L775
-.L772:
-	sub	w1, w1, w0
-	add	x3, x3, 48
-	and	w1, w1, 65535
-	b	.L773
-.L774:
-	adrp	x1, .LANCHOR99
-	ldrh	w1, [x1, #:lo12:.LANCHOR99]
-	madd	w0, w1, w0, w4
+.L886:
+	adrp	x0, .LANCHOR99
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	madd	w0, w0, w20, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
+.L884:
+	sub	w0, w0, w1
+	add	x2, x2, 48
+	and	w0, w0, 65535
+	b	.L885
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
 	.section	.text.lpa_hash_get_ppa,"ax",@progbits
 	.align	2
@@ -4559,122 +4902,119 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR104
-	add	x1, x1, :lo12:.LANCHOR104
+	adrp	x1, .LANCHOR105
+	add	x1, x1, :lo12:.LANCHOR105
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR105
-	ldr	x4, [x2, #:lo12:.LANCHOR105]
 	adrp	x2, .LANCHOR106
-	ldr	x5, [x2, #:lo12:.LANCHOR106]
-.L780:
+	ldr	x4, [x2, #:lo12:.LANCHOR106]
+	adrp	x2, .LANCHOR107
+	ldr	x5, [x2, #:lo12:.LANCHOR107]
+.L889:
 	cmp	w1, w3
-	bne	.L782
+	bne	.L891
 	mov	w0, -1
 	ret
-.L782:
+.L891:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L781
+	bne	.L890
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L781:
+.L890:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L780
+	b	.L889
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
 	.global	ftl_get_new_free_page
 	.type	ftl_get_new_free_page, %function
 ftl_get_new_free_page:
-	stp	x29, x30, [sp, -16]!
-	mov	x1, x0
-	mov	w2, 65535
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	ldrh	w0, [x0]
-	cmp	w0, w2
-	bne	.L784
-	adrp	x1, .LANCHOR107
+	ldrh	w1, [x0]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L893
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1500
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1518
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L785:
-	b	.L785
-.L784:
+.L893:
 	adrp	x0, .LANCHOR80
-	ldrh	w3, [x1, 2]
+	ldrh	w1, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w3, w0
-	bne	.L786
-	adrp	x1, .LANCHOR107
+	cmp	w1, w0
+	bne	.L894
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1501
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1519
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L787:
-	b	.L787
-.L786:
-	ldrh	w4, [x1, 6]
-	cbnz	w4, .L788
-	adrp	x1, .LANCHOR107
+.L894:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L895
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 1502
-	add	x1, x1, :lo12:.LANCHOR107
+	mov	w2, 1520
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L789:
-	b	.L789
-.L788:
-	ldrb	w0, [x1, 5]
-	mov	w3, w2
+.L895:
+	ldrb	w0, [x19, 5]
+	mov	w2, 65535
 	add	x0, x0, 8
-	ldrh	w5, [x1, x0, lsl 1]
+	ldrh	w3, [x19, x0, lsl 1]
 	adrp	x0, .LANCHOR72
-	ldrb	w6, [x0, #:lo12:.LANCHOR72]
-.L790:
-	cmp	w5, w3
-	ldrb	w2, [x1, 5]
-	beq	.L792
-	adrp	x0, .LANCHOR99
-	sub	w4, w4, #1
-	strh	w4, [x1, 6]
-	add	w2, w2, 1
+	ldrb	w4, [x0, #:lo12:.LANCHOR72]
+.L896:
+	cmp	w3, w2
+	ldrb	w1, [x19, 5]
+	beq	.L898
+	adrp	x0, .LANCHOR99
+	add	w1, w1, 1
+	and	w1, w1, 255
+	ldrh	w2, [x19, 2]
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
-	and	w2, w2, 255
-	ldrh	w4, [x1, 10]
-	cmp	w6, w2
-	ldrh	w3, [x1, 2]
-	add	w4, w4, 1
-	strb	w2, [x1, 5]
-	mul	w0, w0, w5
-	strh	w4, [x1, 10]
-	orr	w0, w0, w3
-	bne	.L783
+	cmp	w4, w1
+	strb	w1, [x19, 5]
+	mul	w0, w0, w3
+	ldrh	w3, [x19, 6]
+	sub	w3, w3, #1
+	strh	w3, [x19, 6]
+	ldrh	w3, [x19, 10]
+	orr	w0, w0, w2
 	add	w3, w3, 1
-	strb	wzr, [x1, 5]
-	strh	w3, [x1, 2]
-.L783:
-	ldp	x29, x30, [sp], 16
-	ret
-.L792:
+	strh	w3, [x19, 10]
+	bne	.L892
 	add	w2, w2, 1
-	and	w2, w2, 255
-	strb	w2, [x1, 5]
-	cmp	w2, w6
-	bne	.L791
-	ldrh	w0, [x1, 2]
-	strb	wzr, [x1, 5]
+	strb	wzr, [x19, 5]
+	strh	w2, [x19, 2]
+.L892:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L898:
+	add	w1, w1, 1
+	and	w1, w1, 255
+	strb	w1, [x19, 5]
+	cmp	w1, w4
+	bne	.L897
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 5]
 	add	w0, w0, 1
-	strh	w0, [x1, 2]
-.L791:
-	ldrb	w0, [x1, 5]
+	strh	w0, [x19, 2]
+.L897:
+	ldrb	w0, [x19, 5]
 	add	x0, x0, 8
-	ldrh	w5, [x1, x0, lsl 1]
-	b	.L790
+	ldrh	w3, [x19, x0, lsl 1]
+	b	.L896
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -4685,28 +5025,27 @@ ftl_ext_alloc_new_blk:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	bl	ftl_alloc_sys_blk
-	and	w1, w0, 65535
-	mov	w2, 65533
-	mov	w19, w1
-	sub	w1, w1, #1
-	cmp	w2, w1, uxth
-	bcs	.L796
-	adrp	x1, .LANCHOR108
+	and	w0, w0, 65535
+	mov	w1, 65533
+	mov	w19, w0
+	sub	w0, w0, #1
+	cmp	w1, w0, uxth
+	bcs	.L902
+	adrp	x1, .LANCHOR109
 	adrp	x0, .LC0
-	mov	w2, 1533
-	add	x1, x1, :lo12:.LANCHOR108
+	mov	w2, 1551
+	add	x1, x1, :lo12:.LANCHOR109
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L797:
-	b	.L797
-.L796:
-	adrp	x20, .LANCHOR53
+.L902:
+	adrp	x20, .LANCHOR101
 	mov	w1, 0
+	mov	w0, w19
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -4719,18 +5058,18 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR109
+	adrp	x2, .LANCHOR110
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR109]
+	ldrh	w1, [x2, #:lo12:.LANCHOR110]
 	cmp	w1, 4
-	bhi	.L800
-	cbnz	w0, .L800
+	bhi	.L905
+	cbnz	w0, .L905
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR109]
+	strh	w1, [x2, #:lo12:.LANCHOR110]
 	ret
-.L800:
+.L905:
 	adrp	x0, .LANCHOR2
-	strh	wzr, [x3, #:lo12:.LANCHOR109]
+	strh	wzr, [x3, #:lo12:.LANCHOR110]
 	mov	x1, 0
 	mov	w2, 0
 	ldrh	w5, [x0, #:lo12:.LANCHOR2]
@@ -4740,37 +5079,37 @@ ftl_total_vpn_update:
 	adrp	x0, .LANCHOR3
 	ldr	x7, [x0, #:lo12:.LANCHOR3]
 	mov	w0, 0
-.L802:
+.L907:
 	cmp	w5, w1, uxth
-	bhi	.L805
+	bhi	.L910
 	adrp	x1, .LANCHOR5
 	ldr	x1, [x1, #:lo12:.LANCHOR5]
 	str	w2, [x1, 524]
-	adrp	x2, .LANCHOR53
+	adrp	x2, .LANCHOR101
 	str	w0, [x1, 528]
-	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldr	x2, [x2, #:lo12:.LANCHOR101]
 	ldrh	w2, [x2, 120]
-	cbz	w2, .L799
+	cbz	w2, .L904
 	udiv	w0, w0, w2
 	str	w0, [x1, 532]
-.L799:
+.L904:
 	ret
-.L805:
+.L910:
 	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L803
+	beq	.L908
 	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L804
+	bne	.L909
 	add	w0, w0, w3
-.L803:
+.L908:
 	add	x1, x1, 1
-	b	.L802
-.L804:
+	b	.L907
+.L909:
 	add	w2, w2, w3
-	b	.L803
+	b	.L908
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -4812,39 +5151,39 @@ ftl_vpn_decrement:
 	and	w19, w0, 65535
 	mov	w0, 65535
 	cmp	w19, w0
-	beq	.L814
+	beq	.L919
 	adrp	x0, .LANCHOR4
 	ubfiz	x1, x19, 1, 16
 	ldr	x2, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L815
-	adrp	x0, .LC20
+	cbnz	w0, .L920
+	adrp	x0, .LC53
 	mov	w2, 0
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC20
+	add	x0, x0, :lo12:.LC53
 	bl	printf
-.L818:
+.L923:
 	mov	w0, 0
-	b	.L813
-.L815:
+	b	.L918
+.L920:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L814:
-	adrp	x20, .LANCHOR110
-	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+.L919:
+	adrp	x20, .LANCHOR111
+	ldrh	w0, [x20, #:lo12:.LANCHOR111]
 	cmp	w19, w0
-	beq	.L818
+	beq	.L923
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L817
-	strh	w19, [x20, #:lo12:.LANCHOR110]
-	b	.L818
-.L817:
+	bne	.L922
+	strh	w19, [x20, #:lo12:.LANCHOR111]
+	b	.L923
+.L922:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	cset	w0, ne
-	strh	w19, [x20, #:lo12:.LANCHOR110]
-.L813:
+	strh	w19, [x20, #:lo12:.LANCHOR111]
+.L918:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -4854,46 +5193,46 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR104
+	adrp	x3, .LANCHOR105
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR104
+	add	x4, x3, :lo12:.LANCHOR105
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR105
-	ldr	x8, [x4, #:lo12:.LANCHOR105]
 	adrp	x4, .LANCHOR106
-	ldr	x4, [x4, #:lo12:.LANCHOR106]
-.L821:
+	ldr	x8, [x4, #:lo12:.LANCHOR106]
+	adrp	x4, .LANCHOR107
+	ldr	x4, [x4, #:lo12:.LANCHOR107]
+.L926:
 	cmp	w6, w12
-	beq	.L825
+	beq	.L930
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L822
+	bne	.L927
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L823
-	add	x6, x3, :lo12:.LANCHOR104
+	bne	.L928
+	add	x6, x3, :lo12:.LANCHOR105
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L824:
+.L929:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L825:
+.L930:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR104
+	add	x3, x3, :lo12:.LANCHOR105
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L832
+	beq	.L937
 	stp	x29, x30, [sp, -16]!
 	adrp	x0, .LANCHOR96
 	add	x29, sp, 0
@@ -4912,110 +5251,18 @@ lpa_hash_update_ppa:
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L823:
+.L928:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L824
-.L822:
+	b	.L929
+.L927:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L821
-.L832:
+	b	.L926
+.L937:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
-	.section	.text.ftl_write_completed,"ax",@progbits
-	.align	2
-	.global	ftl_write_completed
-	.type	ftl_write_completed, %function
-ftl_write_completed:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR111
-	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR43
-	adrp	x22, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR111
-	add	x19, x19, :lo12:.LANCHOR43
-	add	x22, x22, :lo12:.LANCHOR96
-	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-.L836:
-	ldrb	w0, [x20]
-	cmp	w0, 255
-	bne	.L842
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L842:
-	ubfiz	x21, x0, 6, 8
-	sbfiz	x0, x0, 6, 32
-	add	x23, x19, x0
-	add	x21, x19, x21
-	ldrb	w0, [x19, x0]
-	strb	w0, [x20]
-	ldr	w0, [x23, 52]
-	cmn	w0, #1
-	bne	.L837
-	ldp	w2, w3, [x23, 36]
-	mov	w1, 21
-	ldrh	w0, [x22]
-	mov	w25, 1
-	sub	w1, w1, w0
-	lsr	w0, w3, w0
-	lsl	w1, w25, w1
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w1, w1, w0
-	adrp	x0, .LC21
-	add	x0, x0, :lo12:.LC21
-	and	w24, w1, 65535
-	mov	w1, w24
-	bl	printf
-	mov	w1, w25
-	mov	w2, 0
-	mov	w0, w24
-	bl	gc_add_sblk
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	ldr	w1, [x0, 556]
-	add	w1, w1, w25
-	str	w1, [x0, 556]
-	ldrh	w1, [x0, 16]
-	cmp	w1, w24
-	bne	.L838
-	strh	wzr, [x0, 22]
-.L839:
-	mov	x0, x21
-	bl	ftl_write_buf
-	b	.L836
-.L838:
-	ldrh	w1, [x0, 48]
-	cmp	w1, w24
-	bne	.L839
-	strh	wzr, [x0, 54]
-	b	.L839
-.L837:
-	ldrh	w2, [x23, 48]
-	ldr	w0, [x23, 36]
-	ldr	w1, [x23, 44]
-	bl	lpa_hash_update_ppa
-	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L841
-	and	w0, w0, -3
-	strb	w0, [x23, 2]
-	b	.L836
-.L841:
-	mov	x0, x21
-	bl	buf_free
-	b	.L836
-	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_mask_bad_block,"ax",@progbits
 	.align	2
 	.global	ftl_mask_bad_block
@@ -5037,20 +5284,20 @@ ftl_mask_bad_block:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	and	w19, w2, 255
-	tbz	x0, 14, .L845
-	adrp	x0, .LC22
+	tbz	x0, 14, .L941
+	adrp	x0, .LC54
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC22
+	add	x0, x0, :lo12:.LC54
 	bl	printf
-.L845:
+.L941:
 	adrp	x0, .LANCHOR2
 	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L844
+	bls	.L940
 	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
@@ -5059,7 +5306,7 @@ ftl_mask_bad_block:
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L844:
+.L940:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -5091,31 +5338,31 @@ print_ftl_debug_info:
 	ldrh	w2, [x1, #:lo12:.LANCHOR91]
 	adrp	x1, .LANCHOR89
 	ldr	w7, [x0, 524]
-	adrp	x0, .LC23
+	adrp	x0, .LC55
 	ldrh	w1, [x1, #:lo12:.LANCHOR89]
-	add	x0, x0, :lo12:.LC23
+	add	x0, x0, :lo12:.LC55
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	adrp	x1, .LANCHOR112
 	ldrb	w3, [x1, #:lo12:.LANCHOR112]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC56
+	add	x0, x0, :lo12:.LC56
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC25
-	add	x0, x0, :lo12:.LC25
+	adrp	x0, .LC57
+	add	x0, x0, :lo12:.LC57
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -5128,8 +5375,8 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC26
-	add	x0, x0, :lo12:.LC26
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	bl	printf
 	ldr	x19, [sp, 48]
 	adrp	x0, .LANCHOR73
@@ -5144,96 +5391,260 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, #:lo12:.LANCHOR88]
 	adrp	x0, .LANCHOR85
 	ldrh	w1, [x0, #:lo12:.LANCHOR85]
-	adrp	x0, .LC27
-	add	x0, x0, :lo12:.LC27
+	adrp	x0, .LC59
+	add	x0, x0, :lo12:.LC59
 	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
-	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.section	.text.ftl_write_buf,"ax",@progbits
 	.align	2
-	.global	ftl_alloc_sblk
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
+	.global	ftl_write_buf
+	.type	ftl_write_buf, %function
+ftl_write_buf:
 	stp	x29, x30, [sp, -48]!
-	cmp	w0, 5
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w22, w0, 65535
 	stp	x19, x20, [sp, 16]
-	cset	w21, eq
-	mov	w1, w22
-	mov	w20, w0
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w19, w0, 65535
-	mov	w1, 65535
-	cmp	w19, w1
-	beq	.L855
-	adrp	x1, .LANCHOR3
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
-	add	x19, x1, x19, uxth 2
-	ldrb	w2, [x19, 2]
-	tst	w2, 224
-	beq	.L856
+	str	x21, [sp, 32]
+	cbnz	x0, .L950
 	adrp	x1, .LANCHOR113
-	adrp	x0, .LC0
-	mov	w2, 752
 	add	x1, x1, :lo12:.LANCHOR113
+	mov	w2, 639
+	adrp	x0, .LC0
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L857:
-	b	.L857
-.L856:
-	bfi	w2, w20, 5, 3
-	lsl	w21, w21, 1
-	ubfx	x1, x2, 3, 2
-	orr	w21, w21, w1
-	bfi	w2, w21, 3, 2
-	strb	w2, [x19, 2]
-	ldp	x21, x22, [sp, 32]
+	bl	print_ftl_debug_info
+	mov	w0, -1
+.L949:
 	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L855:
-	bl	print_ftl_debug_info
-	adrp	x21, .LC28
-	mov	w2, w20
-	add	x21, x21, :lo12:.LC28
-	mov	w1, w19
-	mov	x0, x21
-	bl	printf
-	mov	w1, w22
-	mov	w0, 0
-	bl	zftl_get_free_sblk
-	and	w1, w0, 65535
-	mov	w2, w20
-	mov	x0, x21
-	bl	printf
-	bl	dump_all_list_info
+.L953:
+	mov	x1, x19
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR101
+	ldrb	w3, [x19, 56]
+	ldrb	w0, [x21, #:lo12:.LANCHOR53]
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x21, #:lo12:.LANCHOR53]
+	ldr	w2, [x1, 16]
+	add	w2, w2, w3
+	str	w2, [x1, 16]
+	ldr	w2, [x1, 32]
+	add	w2, w2, 1
+	str	w2, [x1, 32]
+	b	.L949
+.L950:
+	mov	x19, x0
+	adrp	x0, .LANCHOR114
+	mov	x20, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w2, [x19, 56]
+	cmp	w2, w1
+	bls	.L955
 	adrp	x1, .LANCHOR113
 	adrp	x0, .LC0
-	mov	w2, 762
+	mov	w2, 644
 	add	x1, x1, :lo12:.LANCHOR113
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L858:
-	b	.L858
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
-	.section	.text.sblk_init,"ax",@progbits
+.L955:
+	ldrb	w0, [x19, 56]
+	adrp	x21, .LANCHOR53
+	cbz	w0, .L952
+	ldrb	w1, [x20, #:lo12:.LANCHOR114]
+	cmp	w1, w0
+	bcs	.L953
+.L952:
+	mov	x0, x19
+	bl	buf_free
+	ldrb	w0, [x21, #:lo12:.LANCHOR53]
+	b	.L949
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_write_completed,"ax",@progbits
 	.align	2
-	.global	sblk_init
-	.type	sblk_init, %function
-sblk_init:
-	adrp	x1, .LANCHOR114
-	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR114]
-	adrp	x1, .LANCHOR111
-	strb	w0, [x1, #:lo12:.LANCHOR111]
-	adrp	x1, .LANCHOR58
-	strb	w0, [x1, #:lo12:.LANCHOR58]
-	adrp	x1, .LANCHOR65
-	strb	w0, [x1, #:lo12:.LANCHOR65]
-	mov	w0, 0
-	ret
+	.global	ftl_write_completed
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR115
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR46
+	adrp	x22, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR115
+	add	x19, x19, :lo12:.LANCHOR46
+	add	x22, x22, :lo12:.LANCHOR96
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+.L961:
+	ldrb	w0, [x20]
+	cmp	w0, 255
+	bne	.L967
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L967:
+	ubfiz	x21, x0, 6, 8
+	sbfiz	x0, x0, 6, 32
+	add	x23, x19, x0
+	add	x21, x19, x21
+	ldrb	w0, [x19, x0]
+	strb	w0, [x20]
+	ldr	w0, [x23, 52]
+	cmn	w0, #1
+	bne	.L962
+	ldp	w2, w3, [x23, 36]
+	mov	w1, 21
+	ldrh	w0, [x22]
+	mov	w25, 1
+	sub	w1, w1, w0
+	lsr	w0, w3, w0
+	lsl	w1, w25, w1
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w1, w1, w0
+	adrp	x0, .LC60
+	add	x0, x0, :lo12:.LC60
+	and	w24, w1, 65535
+	mov	w1, w24
+	bl	printf
+	mov	w1, w25
+	mov	w2, 0
+	mov	w0, w24
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 556]
+	add	w1, w1, w25
+	str	w1, [x0, 556]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w24
+	bne	.L963
+	strh	wzr, [x0, 22]
+.L964:
+	mov	x0, x21
+	bl	ftl_write_buf
+	b	.L961
+.L963:
+	ldrh	w1, [x0, 48]
+	cmp	w1, w24
+	bne	.L964
+	strh	wzr, [x0, 54]
+	b	.L964
+.L962:
+	ldrh	w2, [x23, 48]
+	ldr	w0, [x23, 36]
+	ldr	w1, [x23, 44]
+	bl	lpa_hash_update_ppa
+	ldrb	w0, [x23, 2]
+	tbz	x0, 2, .L966
+	and	w0, w0, -3
+	strb	w0, [x23, 2]
+	b	.L961
+.L966:
+	mov	x0, x21
+	bl	buf_free
+	b	.L961
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -64]!
+	cmp	w0, 5
+	add	x29, sp, 0
+	str	x23, [sp, 48]
+	and	w23, w0, 65535
+	stp	x19, x20, [sp, 16]
+	mov	w1, w23
+	stp	x21, x22, [sp, 32]
+	mov	w20, w0
+	cset	w22, eq
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L971
+	adrp	x0, .LANCHOR3
+	lsl	w22, w22, 1
+	ldr	x21, [x0, #:lo12:.LANCHOR3]
+	add	x21, x21, x19, uxth 2
+	ldrb	w0, [x21, 2]
+	tst	w0, 224
+	beq	.L972
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC0
+	mov	w2, 757
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L972:
+	ldrb	w0, [x21, 2]
+	bfi	w0, w20, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w22, w22, w1
+	bfi	w0, w22, 3, 2
+	strb	w0, [x21, 2]
+.L973:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L971:
+	bl	print_ftl_debug_info
+	adrp	x21, .LC61
+	mov	w2, w20
+	add	x21, x21, :lo12:.LC61
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	mov	w1, w23
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w2, w20
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	bl	dump_all_list_info
+	mov	w2, 767
+	adrp	x1, .LANCHOR116
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR116
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+	b	.L973
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.sblk_init,"ax",@progbits
+	.align	2
+	.global	sblk_init
+	.type	sblk_init, %function
+sblk_init:
+	adrp	x1, .LANCHOR117
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR117]
+	adrp	x1, .LANCHOR115
+	strb	w0, [x1, #:lo12:.LANCHOR115]
+	adrp	x1, .LANCHOR58
+	strb	w0, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR65
+	strb	w0, [x1, #:lo12:.LANCHOR65]
+	mov	w0, 0
+	ret
 	.size	sblk_init, .-sblk_init
 	.section	.text.dump_sblk_queue,"ax",@progbits
 	.align	2
@@ -5241,25 +5652,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC29
-	add	x0, x0, :lo12:.LC29
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR114
+	adrp	x19, .LANCHOR117
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR114]
+	ldrb	w1, [x19, #:lo12:.LANCHOR117]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR114]
+	ldrb	w19, [x19, #:lo12:.LANCHOR117]
 	cmp	w19, 255
-	beq	.L863
-	adrp	x1, .LANCHOR43
+	beq	.L980
+	adrp	x1, .LANCHOR46
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR43
-	adrp	x21, .LC30
+	add	x1, x1, :lo12:.LANCHOR46
+	adrp	x21, .LC63
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC30
+	add	x21, x21, :lo12:.LC63
 	mov	x20, x1
-.L865:
+.L982:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -5267,11 +5678,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L863
+	beq	.L980
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L865
-.L863:
+	b	.L982
+.L980:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -5282,18 +5693,18 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR114
-	ldrb	w2, [x2, #:lo12:.LANCHOR114]
+	adrp	x2, .LANCHOR117
+	ldrb	w2, [x2, #:lo12:.LANCHOR117]
 	cmp	w2, 255
-	beq	.L882
+	beq	.L999
 	adrp	x3, .LANCHOR96
-	adrp	x7, .LANCHOR43
-	add	x7, x7, :lo12:.LANCHOR43
-	adrp	x10, .L878
+	adrp	x7, .LANCHOR46
+	add	x7, x7, :lo12:.LANCHOR46
+	adrp	x10, .L995
 	ldrh	w8, [x3, #:lo12:.LANCHOR96]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L878
+	add	x10, x10, :lo12:.L995
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
@@ -5307,61 +5718,61 @@ queue_lun_state:
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L881:
+.L998:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L875
+	bne	.L992
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L876
+	bne	.L993
 	cmp	w1, 1
-	bne	.L873
+	bne	.L990
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L875
+	beq	.L992
 	ret
-.L876:
+.L993:
 	cmp	w1, 3
-	bhi	.L875
+	bhi	.L992
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx878
+	adr	x13, .Lrtx995
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx878:
+.Lrtx995:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L878:
-	.byte	(.L877 - .Lrtx878) / 4
-	.byte	(.L879 - .Lrtx878) / 4
-	.byte	(.L880 - .Lrtx878) / 4
-	.byte	(.L873 - .Lrtx878) / 4
+.L995:
+	.byte	(.L994 - .Lrtx995) / 4
+	.byte	(.L996 - .Lrtx995) / 4
+	.byte	(.L997 - .Lrtx995) / 4
+	.byte	(.L990 - .Lrtx995) / 4
 	.section	.text.queue_lun_state
-.L877:
+.L994:
 	cmp	w0, 2
-	beq	.L875
+	beq	.L992
 	ret
-.L879:
+.L996:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L875
+	beq	.L992
 	ret
-.L880:
+.L997:
 	cmp	w0, 10
-	bne	.L873
-.L875:
+	bne	.L990
+.L992:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L881
-.L882:
+	bne	.L998
+.L999:
 	mov	w0, 0
-.L873:
+.L990:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -5369,68 +5780,68 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR114
-	ldrb	w2, [x6, #:lo12:.LANCHOR114]
+	adrp	x6, .LANCHOR117
+	ldrb	w2, [x6, #:lo12:.LANCHOR117]
 	cmp	w2, 255
-	beq	.L884
-	adrp	x0, .LANCHOR43
+	beq	.L1001
+	adrp	x0, .LANCHOR46
 	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR43
+	add	x5, x0, :lo12:.LANCHOR46
 	add	x3, x5, x4
 	ldrb	w1, [x3, 58]
 	sub	w1, w1, #11
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L884
+	bhi	.L1001
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR114]
+	strb	w0, [x6, #:lo12:.LANCHOR117]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L886
+	bne	.L1003
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L887
-	adrp	x0, .LANCHOR111
-	ldrb	w3, [x0, #:lo12:.LANCHOR111]
-	add	x0, x0, :lo12:.LANCHOR111
-.L888:
+	cbnz	w0, .L1004
+	adrp	x0, .LANCHOR115
+	ldrb	w3, [x0, #:lo12:.LANCHOR115]
+	add	x0, x0, :lo12:.LANCHOR115
+.L1005:
 	cmp	w3, 255
-	bne	.L892
-	add	x1, x1, :lo12:.LANCHOR43
+	bne	.L1009
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L887:
+.L1004:
 	adrp	x0, .LANCHOR65
 	ldrb	w3, [x0, #:lo12:.LANCHOR65]
 	add	x0, x0, :lo12:.LANCHOR65
-	b	.L888
-.L886:
-	cbnz	w0, .L884
+	b	.L1005
+.L1003:
+	cbnz	w0, .L1001
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L884
+	beq	.L1001
 	adrp	x0, .LANCHOR58
 	ldrb	w3, [x0, #:lo12:.LANCHOR58]
 	add	x0, x0, :lo12:.LANCHOR58
-	b	.L888
-.L892:
-	add	x0, x1, :lo12:.LANCHOR43
-.L899:
+	b	.L1005
+.L1009:
+	add	x0, x1, :lo12:.LANCHOR46
+.L1016:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L899
+	bne	.L1016
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L884:
+.L1001:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -5442,9 +5853,9 @@ pm_alloc_new_blk:
 	adrp	x2, .LANCHOR72
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR53
+	adrp	x20, .LANCHOR101
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
 	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
@@ -5452,183 +5863,185 @@ pm_alloc_new_blk:
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L901
+	bls	.L1018
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L902
-.L901:
-	adrp	x21, .LC31
-	add	x21, x21, :lo12:.LC31
+	bne	.L1019
+.L1018:
+	adrp	x19, .LC64
+	add	x19, x19, :lo12:.LC64
 	adrp	x23, .LANCHOR3
-.L916:
+.L1031:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
-	and	w19, w0, 65535
+	and	w21, w0, 65535
 	bl	ftl_erase_sblk
-	add	x13, x20, :lo12:.LANCHOR53
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
-	mov	w0, w19
+	add	x14, x20, :lo12:.LANCHOR101
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	mov	w0, w21
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L903
-	mov	w1, w19
-	mov	x0, x21
+	bne	.L1020
+	mov	w1, w21
+	mov	x0, x19
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR3]
-	add	x19, x0, x19, uxth 2
-	ldrb	w0, [x19, 2]
+	ldr	x1, [x23, #:lo12:.LANCHOR3]
+	add	x1, x1, x21, uxth 2
+	ldrb	w0, [x1, 2]
 	orr	w0, w0, -32
-	strb	w0, [x19, 2]
-	b	.L916
-.L903:
-	ldr	x1, [x13]
-	adrp	x0, .LANCHOR115
+	strb	w0, [x1, 2]
+	b	.L1031
+.L1020:
+	ldr	x0, [x14]
+	adrp	x1, .LANCHOR118
 	mov	w2, 1
-	mov	w3, 65535
-	str	w2, [x0, #:lo12:.LANCHOR115]
-	add	x2, x1, 416
-	mov	w0, 0
-	strh	wzr, [x1, 690]
-.L905:
-	ldrh	w4, [x2]
-	cmp	w4, w3
-	beq	.L904
-	add	w0, w0, 1
-	add	x2, x2, 2
-	cmp	w0, 128
-	bne	.L905
-	adrp	x1, .LANCHOR116
+	mov	w19, 0
+	add	x0, x0, 416
+	str	w2, [x1, #:lo12:.LANCHOR118]
+	mov	w1, 65535
+	strh	wzr, [x0, 274]
+.L1022:
+	ldrh	w2, [x0]
+	cmp	w2, w1
+	beq	.L1021
+	add	w19, w19, 1
+	add	x0, x0, 2
+	and	w19, w19, 65535
+	cmp	w19, 128
+	bne	.L1022
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
-	mov	w2, 188
-	add	x1, x1, :lo12:.LANCHOR116
+	mov	w2, 192
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L907:
-	b	.L907
-.L908:
+.L1021:
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	add	x19, x0, x19, sxtw 1
+	ldrh	w1, [x0, 688]
+	strh	w21, [x19, 416]
+	add	w1, w1, 1
+	strh	w1, [x0, 688]
+.L1019:
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	ldrh	w0, [x1, 690]
+	add	x0, x0, 336
+	ldrh	w19, [x1, x0, lsl 1]
+	mov	w0, 65533
+	sub	w1, w19, #1
+	cmp	w0, w1, uxth
+	bcs	.L1024
+	adrp	x1, .LANCHOR119
+	adrp	x0, .LC0
+	mov	w2, 197
+	add	x1, x1, :lo12:.LANCHOR119
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1024:
 	adrp	x1, .LANCHOR96
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	mov	w2, 21
-	strh	wzr, [x0, 696]
 	ldrh	w1, [x1, #:lo12:.LANCHOR96]
-	strh	w3, [x0, 692]
 	sub	w2, w2, w1
-	asr	w4, w3, w2
+	strh	wzr, [x0, 696]
+	strh	w19, [x0, 692]
+	asr	w4, w19, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L912
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1027
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
-	mov	w1, w3
-	adrp	x0, .LC32
+	mov	w3, w19
+	adrp	x0, .LC65
 	sub	w2, w2, #1
-	add	x0, x0, :lo12:.LC32
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC65
 	bl	printf
-.L912:
+.L1027:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L904:
-	add	x0, x1, x0, sxtw 1
-	strh	w19, [x0, 416]
-	ldrh	w0, [x1, 688]
-	add	w0, w0, 1
-	strh	w0, [x1, 688]
-.L902:
-	ldr	x0, [x20, #:lo12:.LANCHOR53]
-	ldrh	w1, [x0, 690]
-	add	x1, x1, 336
-	ldrh	w3, [x0, x1, lsl 1]
-	mov	w1, 65533
-	sub	w2, w3, #1
-	cmp	w1, w2, uxth
-	bcs	.L908
-	adrp	x1, .LANCHOR116
-	adrp	x0, .LC0
-	mov	w2, 193
-	add	x1, x1, :lo12:.LANCHOR116
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L909:
-	b	.L909
 	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",@progbits
 	.align	2
 	.global	pm_select_ram_region
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
-	adrp	x1, .LANCHOR117
-	add	x1, x1, :lo12:.LANCHOR117
-	mov	x2, 0
-	mov	w3, 65535
-.L921:
-	lsl	x4, x2, 4
-	and	w0, w2, 65535
-	ldrh	w4, [x4, x1]
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
+	mov	x1, 0
+	add	x29, sp, 0
+	mov	w2, 65535
+	str	x19, [sp, 16]
+.L1036:
+	lsl	x3, x1, 4
+	and	w19, w1, 65535
+	ldrh	w3, [x3, x0]
+	cmp	w3, w2
+	beq	.L1035
+	add	x1, x1, 1
+	cmp	x1, 32
+	bne	.L1036
+	add	x0, x0, 2
+	mov	w19, w1
+	mov	x2, x0
+	mov	w4, 32768
+	mov	w1, 0
+.L1038:
+	ldrh	w3, [x2]
+	tbnz	x3, 15, .L1037
+	cmp	w3, w4
+	bcs	.L1037
+	mov	w4, w3
+	mov	w19, w1
+.L1037:
+	add	w1, w1, 1
+	add	x2, x2, 16
+	and	w1, w1, 65535
+	cmp	w1, 32
+	bne	.L1038
+	cmp	w19, 32
+	bne	.L1035
+	adrp	x1, .LANCHOR121
+	mov	w2, -1
+	ldrb	w3, [x1, #:lo12:.LANCHOR121]
+	mov	w1, 0
+.L1040:
+	ldrh	w5, [x0]
+	cmp	w5, w2
+	bcs	.L1039
+	ldrh	w4, [x0, -2]
 	cmp	w4, w3
-	beq	.L920
-	add	x2, x2, 1
-	cmp	x2, 32
-	bne	.L921
-	add	x1, x1, 2
-	mov	w0, w2
-	mov	x3, x1
-	mov	w5, 32768
-	mov	w2, 0
-.L923:
-	ldrh	w4, [x3]
-	tbnz	x4, 15, .L922
-	cmp	w4, w5
-	bcs	.L922
-	mov	w5, w4
-	mov	w0, w2
-.L922:
-	add	w2, w2, 1
-	add	x3, x3, 16
-	and	w2, w2, 65535
-	cmp	w2, 32
-	bne	.L923
-	cmp	w0, 32
-	bne	.L920
-	adrp	x2, .LANCHOR118
-	mov	w3, -1
-	ldrb	w4, [x2, #:lo12:.LANCHOR118]
-	mov	w2, 0
-.L925:
-	ldrh	w6, [x1]
-	cmp	w6, w3
-	bcs	.L924
-	ldrh	w5, [x1, -2]
-	cmp	w5, w4
-	csel	w3, w3, w6, eq
-	csel	w0, w0, w2, eq
-.L924:
-	add	w2, w2, 1
-	add	x1, x1, 16
-	and	w2, w2, 65535
-	cmp	w2, 32
-	bne	.L925
-	cmp	w0, 32
-	bne	.L920
-	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR119
+	csel	w2, w2, w5, eq
+	csel	w19, w19, w1, eq
+.L1039:
+	add	w1, w1, 1
+	add	x0, x0, 16
+	and	w1, w1, 65535
+	cmp	w1, 32
+	bne	.L1040
+	cmp	w19, 32
+	bne	.L1035
+	adrp	x1, .LANCHOR122
 	adrp	x0, .LC0
-	mov	w2, 289
-	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR119
+	mov	w2, 295
+	add	x1, x1, :lo12:.LANCHOR122
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L926:
-	b	.L926
-.L920:
+.L1035:
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	pm_select_ram_region, .-pm_select_ram_region
 	.section	.text.ftl_memset,"ax",@progbits
@@ -5647,60 +6060,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR21
-	cbnz	w0, .L935
-	add	x1, x19, :lo12:.LANCHOR21
+	adrp	x19, .LANCHOR27
+	cbnz	w0, .L1047
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L936:
+.L1048:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L936
-.L942:
-	adrp	x20, .LANCHOR120
-	add	x20, x20, :lo12:.LANCHOR120
+	bne	.L1048
+.L1054:
+	adrp	x20, .LANCHOR123
+	add	x20, x20, :lo12:.LANCHOR123
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR21
+	add	x19, x19, :lo12:.LANCHOR27
 	bl	ftl_memset
 	mov	x0, 0
-.L937:
+.L1049:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L937
+	bne	.L1049
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L935:
+.L1047:
 	cmp	w0, 1
-	bne	.L938
-	add	x3, x19, :lo12:.LANCHOR21
+	bne	.L1050
+	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L941:
+.L1053:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L939
+	bls	.L1051
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L939:
+.L1051:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L941
-	b	.L942
-.L938:
+	bne	.L1053
+	b	.L1054
+.L1050:
 	cmp	w0, 2
-	bne	.L943
-	add	x3, x19, :lo12:.LANCHOR21
+	bne	.L1055
+	add	x3, x19, :lo12:.LANCHOR27
 	mov	w1, 65535
 	mov	x0, 0
-.L945:
+.L1057:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -5709,35 +6122,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L945
-	b	.L942
-.L943:
+	bne	.L1057
+	b	.L1054
+.L1055:
 	cmp	w0, 3
-	bne	.L946
-	add	x3, x19, :lo12:.LANCHOR21
+	bne	.L1058
+	add	x3, x19, :lo12:.LANCHOR27
 	mov	x1, 0
-.L949:
+.L1061:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L947
+	bls	.L1059
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L947:
+.L1059:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L949
-	b	.L942
-.L946:
+	bne	.L1061
+	b	.L1054
+.L1058:
 	cmp	w0, 4
-	bne	.L950
-	add	x1, x19, :lo12:.LANCHOR21
+	bne	.L1062
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR21]
+	strh	wzr, [x19, #:lo12:.LANCHOR27]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -5751,7 +6164,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L952:
+.L1064:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -5760,37 +6173,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L952
-	b	.L942
-.L950:
+	bne	.L1064
+	b	.L1054
+.L1062:
 	cmp	w0, 5
-	bne	.L953
-	add	x1, x19, :lo12:.LANCHOR21
+	bne	.L1065
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L954:
+.L1066:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L954
+	bne	.L1066
 	add	x1, x1, 32
-.L955:
+.L1067:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L955
-	b	.L942
-.L953:
+	bne	.L1067
+	b	.L1054
+.L1065:
 	cmp	w0, 8
-	bne	.L942
-	add	x1, x19, :lo12:.LANCHOR21
+	bne	.L1054
+	add	x1, x19, :lo12:.LANCHOR27
 	mov	x0, 0
-.L956:
+.L1068:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L956
-	b	.L942
+	bne	.L1068
+	b	.L1054
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -5798,29 +6211,38 @@ flash_lsb_page_tbl_build:
 	.type	flash_die_info_init, %function
 flash_die_info_init:
 	stp	x29, x30, [sp, -80]!
-	mov	w2, 8
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR26
-	add	x19, x23, :lo12:.LANCHOR26
 	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR20
-	adrp	x26, .LANCHOR15
-	adrp	x22, .LANCHOR17
+	tbz	x0, 12, .L1084
+	adrp	x1, .LANCHOR124
+	adrp	x0, .LC1
+	add	x1, x1, :lo12:.LANCHOR124
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L1084:
+	adrp	x23, .LANCHOR32
+	add	x19, x23, :lo12:.LANCHOR32
+	adrp	x25, .LANCHOR26
+	adrp	x26, .LANCHOR12
+	adrp	x22, .LANCHOR24
+	add	x21, x22, :lo12:.LANCHOR24
 	ldrh	w0, [x19, 26]
-	add	x21, x22, :lo12:.LANCHOR17
+	mov	w2, 8
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR122
-	strh	w0, [x25, #:lo12:.LANCHOR20]
-	add	x20, x24, :lo12:.LANCHOR122
+	adrp	x24, .LANCHOR126
+	strh	w0, [x25, #:lo12:.LANCHOR26]
+	add	x20, x24, :lo12:.LANCHOR126
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR15]
+	strb	wzr, [x26, #:lo12:.LANCHOR12]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR121
-	strh	w0, [x1, #:lo12:.LANCHOR121]
+	adrp	x1, .LANCHOR125
+	strh	w0, [x1, #:lo12:.LANCHOR125]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -5828,34 +6250,34 @@ flash_die_info_init:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR26]
+	ldrb	w13, [x23, #:lo12:.LANCHOR32]
 	mov	x7, x23
-	adrp	x14, .LANCHOR33
-	add	x11, x26, :lo12:.LANCHOR15
-	add	x23, x14, :lo12:.LANCHOR33
+	adrp	x14, .LANCHOR38
+	add	x11, x26, :lo12:.LANCHOR12
+	add	x23, x14, :lo12:.LANCHOR38
 	mov	x8, 0
-.L973:
+.L1086:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L972
+	cbnz	w0, .L1085
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L972:
+.L1085:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L973
-	add	x0, x7, :lo12:.LANCHOR26
+	bne	.L1086
+	add	x0, x7, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L974
-.L978:
-	add	x7, x7, :lo12:.LANCHOR26
-	ldrb	w0, [x26, #:lo12:.LANCHOR15]
+	beq	.L1087
+.L1091:
+	add	x7, x7, :lo12:.LANCHOR32
+	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -5865,30 +6287,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR123
-	strh	w0, [x1, #:lo12:.LANCHOR123]
+	adrp	x1, .LANCHOR127
+	strh	w0, [x1, #:lo12:.LANCHOR127]
 	ret
-.L974:
-	ldrh	w1, [x25, #:lo12:.LANCHOR20]
-	add	x14, x14, :lo12:.LANCHOR33
+.L1087:
+	ldrh	w1, [x25, #:lo12:.LANCHOR26]
+	add	x14, x14, :lo12:.LANCHOR38
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR15
-	add	x15, x24, :lo12:.LANCHOR122
-	add	x22, x22, :lo12:.LANCHOR17
+	add	x19, x26, :lo12:.LANCHOR12
+	add	x15, x24, :lo12:.LANCHOR126
+	add	x22, x22, :lo12:.LANCHOR24
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L977:
+.L1090:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L975
+	cbnz	w0, .L1088
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -5896,11 +6318,11 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L975:
+.L1088:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L977
-	b	.L978
+	bne	.L1090
+	b	.L1091
 	.size	flash_die_info_init, .-flash_die_info_init
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
@@ -5910,9 +6332,9 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR104
+	adrp	x0, .LANCHOR105
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR104
+	add	x0, x0, :lo12:.LANCHOR105
 	bl	ftl_memset
 	adrp	x0, .LANCHOR80
 	mov	w1, 255
@@ -5921,8 +6343,8 @@ lpa_hash_init:
 	adrp	x0, .LANCHOR72
 	ldrb	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR106
-	ldr	x0, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR107
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -5932,64 +6354,64 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L988
-	adrp	x1, .LANCHOR124
-	adrp	x0, .LC33
+	tbz	x0, 12, .L1104
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC66
 	mov	w3, 0
-	mov	w2, 219
-	add	x1, x1, :lo12:.LANCHOR124
-	add	x0, x0, :lo12:.LC33
+	mov	w2, 218
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L988:
+.L1104:
 	adrp	x20, .LANCHOR80
 	adrp	x22, .LANCHOR72
-	adrp	x19, .LANCHOR104
-	add	x19, x19, :lo12:.LANCHOR104
+	adrp	x19, .LANCHOR105
+	add	x19, x19, :lo12:.LANCHOR105
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
 	ldrh	w2, [x20, #:lo12:.LANCHOR80]
-	adrp	x21, .LANCHOR106
+	adrp	x21, .LANCHOR107
 	ldrb	w0, [x22, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR106]
+	ldr	x0, [x21, #:lo12:.LANCHOR107]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR105
+	adrp	x0, .LANCHOR106
 	ldrb	w3, [x22, #:lo12:.LANCHOR72]
-	ldr	x5, [x21, #:lo12:.LANCHOR106]
+	ldr	x5, [x21, #:lo12:.LANCHOR107]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR105]
-.L989:
+	ldr	x4, [x0, #:lo12:.LANCHOR106]
+.L1105:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L991
+	blt	.L1107
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L991:
+.L1107:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L990
+	beq	.L1106
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L990:
+.L1106:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L989
+	b	.L1105
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
 	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
@@ -6003,19 +6425,19 @@ zftl_read_flash_info:
 	str	x19, [sp, 16]
 	mov	x19, x0
 	bl	ftl_memset
-	adrp	x1, .LANCHOR26
-	add	x1, x1, :lo12:.LANCHOR26
-	adrp	x0, .LANCHOR20
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x0, .LANCHOR26
 	mov	w4, 1
 	ldrb	w3, [x1, 9]
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	ldrh	w0, [x0, #:lo12:.LANCHOR26]
 	mul	w0, w3, w0
 	and	w2, w0, 65535
 	strb	w2, [x19, 4]
 	ubfx	x0, x2, 8, 8
 	strb	w0, [x19, 5]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	strb	w0, [x19, 7]
 	ldrb	w0, [x1, 13]
 	mul	w0, w0, w2
@@ -6031,30 +6453,30 @@ zftl_read_flash_info:
 	ubfx	x2, x0, 16, 8
 	lsr	w0, w0, 24
 	strb	w2, [x19, 2]
-	adrp	x2, .LANCHOR17
+	adrp	x2, .LANCHOR24
 	strb	w0, [x19, 3]
 	mov	w0, 32
 	strb	w0, [x19, 8]
-	add	x2, x2, :lo12:.LANCHOR17
+	add	x2, x2, :lo12:.LANCHOR24
 	ldrb	w0, [x1, 7]
 	mov	x1, 0
 	strb	w0, [x19, 9]
-	adrp	x0, .LANCHOR15
-	ldrb	w3, [x0, #:lo12:.LANCHOR15]
-.L1000:
+	adrp	x0, .LANCHOR12
+	ldrb	w3, [x0, #:lo12:.LANCHOR12]
+.L1116:
 	cmp	w3, w1, uxtb
-	bhi	.L1001
+	bhi	.L1117
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1001:
+.L1117:
 	ldrb	w0, [x1, x2]
 	add	x1, x1, 1
 	ldrb	w5, [x19, 10]
 	lsl	w0, w4, w0
 	orr	w0, w0, w5
 	strb	w0, [x19, 10]
-	b	.L1000
+	b	.L1116
 	.size	zftl_read_flash_info, .-zftl_read_flash_info
 	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
@@ -6065,20 +6487,20 @@ gc_static_wearleveling:
 	mov	w1, 10240
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
+	adrp	x22, .LANCHOR101
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x22, #:lo12:.LANCHOR53]
+	ldr	x5, [x22, #:lo12:.LANCHOR101]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldr	w0, [x5, 32]
 	cmp	w0, w1
-	bls	.L1004
+	bls	.L1120
 	ldr	w1, [x5, 36]
 	add	w1, w1, w0, lsr 10
 	and	w0, w0, 1023
 	stp	w0, w1, [x5, 32]
-.L1004:
+.L1120:
 	adrp	x25, .LANCHOR5
 	ldr	w3, [x5, 36]
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
@@ -6087,12 +6509,12 @@ gc_static_wearleveling:
 	add	w1, w1, 860160
 	add	w1, w1, 3840
 	cmp	w2, w1
-	bhi	.L1005
+	bhi	.L1121
 	ldr	w1, [x0, 572]
 	add	w1, w1, 32
 	cmp	w3, w1
-	bls	.L1003
-.L1005:
+	bls	.L1119
+.L1121:
 	adrp	x21, .LANCHOR3
 	ldrh	w10, [x5, 134]
 	adrp	x23, .LANCHOR2
@@ -6110,46 +6532,46 @@ gc_static_wearleveling:
 	mov	w26, 0
 	mov	w3, 0
 	mov	w2, 0
-.L1007:
+.L1123:
 	cmp	w10, w11
-	bcc	.L1011
+	bcc	.L1127
 	ldrh	w0, [x5, 96]
 	cmp	w0, w20
-	bcs	.L1012
+	bcs	.L1128
 	strh	w20, [x5, 96]
-.L1012:
+.L1128:
 	ldrh	w0, [x5, 98]
 	cmp	w0, w26
-	bcs	.L1013
+	bcs	.L1129
 	strh	w26, [x5, 98]
-.L1013:
+.L1129:
 	udiv	w3, w3, w1
-	adrp	x24, .LANCHOR29
+	adrp	x24, .LANCHOR7
 	udiv	w4, w4, w2
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
 	strh	w3, [x5, 88]
 	strh	w4, [x5, 90]
-	tbz	x0, 10, .L1014
-	adrp	x0, .LC34
+	tbz	x0, 10, .L1130
+	adrp	x0, .LC67
 	and	w4, w4, 65535
 	and	w3, w3, 65535
-	add	x0, x0, :lo12:.LC34
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-.L1014:
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
-	adrp	x28, .LANCHOR125
-	tbz	x0, 10, .L1015
-	adrp	x0, .LANCHOR126
-	ldrh	w6, [x28, #:lo12:.LANCHOR125]
+.L1130:
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
+	adrp	x28, .LANCHOR129
+	tbz	x0, 10, .L1131
+	adrp	x0, .LANCHOR130
+	ldrh	w6, [x28, #:lo12:.LANCHOR129]
 	mov	w4, w26
 	mov	w3, w20
-	ldrh	w5, [x0, #:lo12:.LANCHOR126]
+	ldrh	w5, [x0, #:lo12:.LANCHOR130]
 	mov	w2, w19
-	adrp	x0, .LC35
+	adrp	x0, .LC68
 	mov	w1, w27
-	add	x0, x0, :lo12:.LC35
+	add	x0, x0, :lo12:.LC68
 	bl	printf
-.L1015:
+.L1131:
 	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	mov	w1, 255
 	mov	w2, 128
@@ -6158,36 +6580,36 @@ gc_static_wearleveling:
 	bl	ftl_memset
 	sub	w0, w26, w19
 	str	w0, [x29, 148]
-	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	ldrh	w0, [x28, #:lo12:.LANCHOR129]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	bgt	.L1016
-	adrp	x1, .LANCHOR126
+	bgt	.L1132
+	adrp	x1, .LANCHOR130
 	sub	w0, w20, w27
-	ldrh	w1, [x1, #:lo12:.LANCHOR126]
+	ldrh	w1, [x1, #:lo12:.LANCHOR130]
 	cmp	w0, w1
-	bgt	.L1016
-.L1023:
-	cbnz	w19, .L1017
-.L1025:
-	cbz	w27, .L1003
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	bgt	.L1132
+.L1139:
+	cbnz	w19, .L1133
+.L1141:
+	cbz	w27, .L1119
+	ldr	x2, [x22, #:lo12:.LANCHOR101]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1030:
+.L1146:
 	cmp	w0, w5
-	bcc	.L1032
+	bcc	.L1148
 	ldrh	w0, [x2, 74]
 	add	w0, w27, w0
 	strh	w0, [x2, 74]
 	ldrh	w0, [x2, 96]
 	cmp	w27, w0
-	bcs	.L1003
+	bcs	.L1119
 	sub	w7, w0, w27
 	strh	w7, [x2, 96]
-.L1003:
+.L1119:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6195,14 +6617,14 @@ gc_static_wearleveling:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L1011:
+.L1127:
 	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L1008
+	tbz	x0, 3, .L1124
 	ldr	w0, [x8]
 	ldrh	w6, [x8]
 	ubfx	x0, x0, 11, 8
 	and	w6, w6, 2047
-.L1009:
+.L1125:
 	cmp	w6, w27
 	add	w1, w1, 1
 	csel	w7, w6, w27, cc
@@ -6213,19 +6635,19 @@ gc_static_wearleveling:
 	and	w27, w7, 65535
 	and	w20, w20, 65535
 	cmp	w0, w12
-	bne	.L1033
-	b	.L1034
-.L1008:
+	bne	.L1149
+	b	.L1150
+.L1124:
 	tst	w0, 24
-	bne	.L1010
+	bne	.L1126
 	ldrh	w6, [x8]
 	mov	w0, 65535
 	and	w6, w6, 2047
-	b	.L1009
-.L1010:
+	b	.L1125
+.L1126:
 	ldr	w0, [x8]
 	ubfx	x0, x0, 11, 8
-.L1033:
+.L1149:
 	cmp	w0, w19
 	add	w2, w2, 1
 	csel	w19, w0, w19, cc
@@ -6235,48 +6657,48 @@ gc_static_wearleveling:
 	and	w2, w2, 65535
 	and	w19, w19, 65535
 	and	w26, w0, 65535
-.L1034:
+.L1150:
 	add	w10, w10, 1
 	add	x8, x8, 4
 	and	w10, w10, 65535
-	b	.L1007
-.L1016:
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	b	.L1123
+.L1132:
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	adrp	x25, .LANCHOR63
 	stp	wzr, wzr, [x29, 152]
 	ldrh	w26, [x0, 134]
 	add	x0, x23, :lo12:.LANCHOR2
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR126
-	add	x0, x0, :lo12:.LANCHOR126
+	adrp	x0, .LANCHOR130
+	add	x0, x0, :lo12:.LANCHOR130
 	str	x0, [x29, 120]
 	add	x0, x25, :lo12:.LANCHOR63
 	str	x0, [x29, 136]
-.L1019:
+.L1135:
 	ldr	x0, [x29, 128]
 	ldrh	w0, [x0]
 	cmp	w0, w26
-	bls	.L1023
+	bls	.L1139
 	uxtw	x25, w26
 	ldr	x4, [x21, #:lo12:.LANCHOR3]
 	lsl	x3, x25, 2
 	add	x0, x4, x3
 	ldrb	w0, [x0, 2]
 	tst	w0, 192
-	beq	.L1020
+	beq	.L1136
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L1020
-	tbz	x0, 4, .L1021
-	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	beq	.L1136
+	tbz	x0, 4, .L1137
+	ldrh	w0, [x28, #:lo12:.LANCHOR129]
 	ldr	w1, [x29, 148]
 	cmp	w1, w0
-	ble	.L1022
+	ble	.L1138
 	ldr	w0, [x4, x3]
 	add	w1, w19, 1
 	ubfx	x0, x0, 11, 8
 	cmp	w0, w1
-	bgt	.L1022
+	bgt	.L1138
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6286,8 +6708,8 @@ gc_static_wearleveling:
 	ldp	x4, x3, [x29, 104]
 	add	w0, w0, 1
 	str	w0, [x29, 156]
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
-	tbz	x0, 10, .L1022
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
+	tbz	x0, 10, .L1138
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6299,34 +6721,34 @@ gc_static_wearleveling:
 	ldr	x0, [x29, 136]
 	ldrb	w2, [x3, 2]
 	ldrh	w4, [x0, 56]
-	adrp	x0, .LC36
+	adrp	x0, .LC69
 	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC36
+	add	x0, x0, :lo12:.LC69
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-.L1057:
+.L1173:
 	bl	printf
-.L1022:
+.L1138:
 	ldr	w0, [x29, 156]
 	cmp	w0, 4
 	ldr	w0, [x29, 152]
 	ccmp	w0, 4, 2, ls
-	bhi	.L1023
-.L1020:
+	bhi	.L1139
+.L1136:
 	add	w8, w26, 1
 	and	w26, w8, 65535
-	b	.L1019
-.L1021:
+	b	.L1135
+.L1137:
 	ldr	x1, [x29, 120]
 	sub	w0, w20, w27
 	ldrh	w1, [x1]
 	cmp	w0, w1
-	ble	.L1022
+	ble	.L1138
 	ldrh	w0, [x4, x3]
 	add	w1, w27, 1
 	and	w0, w0, 2047
 	cmp	w0, w1
-	bgt	.L1022
+	bgt	.L1138
 	stp	x4, x3, [x29, 104]
 	mov	w2, 1
 	mov	w1, 0
@@ -6336,8 +6758,8 @@ gc_static_wearleveling:
 	ldp	x4, x3, [x29, 104]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	ldr	w0, [x24, #:lo12:.LANCHOR29]
-	tbz	x0, 10, .L1022
+	ldr	w0, [x24, #:lo12:.LANCHOR7]
+	tbz	x0, 10, .L1138
 	adrp	x0, .LANCHOR4
 	ldr	w6, [x4, x3]
 	ldrh	w5, [x4, x3]
@@ -6349,56 +6771,56 @@ gc_static_wearleveling:
 	ldr	x0, [x29, 136]
 	ldrb	w2, [x3, 2]
 	ldrh	w4, [x0, 56]
-	adrp	x0, .LC37
+	adrp	x0, .LC70
 	ldrh	w3, [x1, x25, lsl 1]
-	add	x0, x0, :lo12:.LC37
+	add	x0, x0, :lo12:.LC70
 	ubfx	x2, x2, 5, 3
 	mov	w1, w26
-	b	.L1057
-.L1017:
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	b	.L1173
+.L1133:
+	ldr	x2, [x22, #:lo12:.LANCHOR101]
 	ldr	x1, [x21, #:lo12:.LANCHOR3]
 	ldrh	w5, [x23, #:lo12:.LANCHOR2]
 	ldrh	w0, [x2, 134]
 	add	x1, x1, x0, uxth 2
-.L1026:
+.L1142:
 	cmp	w0, w5
-	bcc	.L1028
+	bcc	.L1144
 	ldrh	w0, [x2, 72]
 	add	w0, w19, w0
 	strh	w0, [x2, 72]
 	ldrh	w0, [x2, 98]
 	cmp	w19, w0
-	bcs	.L1025
+	bcs	.L1141
 	sub	w19, w0, w19
 	strh	w19, [x2, 98]
-	b	.L1025
-.L1028:
+	b	.L1141
+.L1144:
 	ldr	w3, [x1]
 	ubfx	x4, x3, 11, 8
 	cmp	w19, w4
-	bhi	.L1027
+	bhi	.L1143
 	sub	w4, w4, w19
 	bfi	w3, w4, 11, 8
 	str	w3, [x1]
-.L1027:
+.L1143:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1026
-.L1032:
+	b	.L1142
+.L1148:
 	ldrh	w3, [x1]
 	and	w4, w3, 2047
 	cmp	w4, w27
-	blt	.L1031
+	blt	.L1147
 	sub	w4, w4, w27
 	bfi	w3, w4, 0, 11
 	strh	w3, [x1]
-.L1031:
+.L1147:
 	add	w0, w0, 1
 	add	x1, x1, 4
 	and	w0, w0, 65535
-	b	.L1030
+	b	.L1146
 	.size	gc_static_wearleveling, .-gc_static_wearleveling
 	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
@@ -6420,7 +6842,7 @@ zftl_sblk_list_init:
 	stp	x23, x24, [sp, 48]
 	adrp	x22, .LANCHOR93
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR53
+	adrp	x25, .LANCHOR101
 	mul	w2, w2, w0
 	ldr	x0, [x28, #:lo12:.LANCHOR0]
 	adrp	x24, .LANCHOR89
@@ -6453,26 +6875,26 @@ zftl_sblk_list_init:
 	strh	wzr, [x22, #:lo12:.LANCHOR93]
 	sxth	w0, w0
 	str	w0, [x29, 188]
-	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	ldr	x0, [x25, #:lo12:.LANCHOR101]
 	strh	wzr, [x21, #:lo12:.LANCHOR84]
 	strh	wzr, [x20, #:lo12:.LANCHOR86]
 	strh	wzr, [x19, #:lo12:.LANCHOR82]
 	strh	wzr, [x0, 146]
 	ldrsh	w26, [x0, 134]
 	add	x0, x27, :lo12:.LANCHOR2
-	adrp	x27, .LC38
-	add	x27, x27, :lo12:.LC38
+	adrp	x27, .LC71
+	add	x27, x27, :lo12:.LC71
 	stp	x3, x2, [x29, 104]
 	stp	x4, x5, [x29, 120]
 	stp	x6, x7, [x29, 136]
 	stp	x8, x10, [x29, 152]
 	str	x0, [x29, 176]
-.L1059:
+.L1175:
 	ldr	x0, [x29, 176]
 	ldrh	w0, [x0]
 	cmp	w26, w0
-	blt	.L1075
-	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	blt	.L1191
+	ldr	x0, [x25, #:lo12:.LANCHOR101]
 	ldrh	w1, [x24, #:lo12:.LANCHOR89]
 	ldp	x25, x26, [sp, 64]
 	strh	w1, [x0, 114]
@@ -6492,27 +6914,27 @@ zftl_sblk_list_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 192
 	ret
-.L1075:
+.L1191:
 	ldr	x4, [x28, #:lo12:.LANCHOR3]
 	sxtw	x2, w26
 	add	x4, x4, x2, lsl 2
 	ldrb	w6, [x4, 3]
-	cbz	w6, .L1076
+	cbz	w6, .L1192
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldr	x7, [x25, #:lo12:.LANCHOR53]
+	ldr	x7, [x25, #:lo12:.LANCHOR101]
 	ldrb	w8, [x0, #:lo12:.LANCHOR72]
 	ldr	x0, [x29, 104]
 	ldrh	w10, [x0, #:lo12:.LANCHOR80]
 	mov	w0, 0
-.L1061:
+.L1177:
 	cmp	w1, w8
-	blt	.L1064
-	cbz	w0, .L1065
+	blt	.L1180
+	cbz	w0, .L1181
 	mov	w1, 32768
 	sdiv	w0, w1, w0
 	sxth	w0, w0
-.L1060:
+.L1176:
 	ldr	x3, [x29, 168]
 	mov	w1, 6
 	smull	x1, w26, w1
@@ -6527,44 +6949,44 @@ zftl_sblk_list_init:
 	and	w0, w1, 224
 	cmp	w0, 32
 	ccmp	w0, w5, 4, ne
-	beq	.L1066
+	beq	.L1182
 	adrp	x5, .LANCHOR5
 	ldr	x5, [x5, #:lo12:.LANCHOR5]
 	ldrh	w6, [x5, 16]
 	cmp	w26, w6
-	beq	.L1066
+	beq	.L1182
 	ldrh	w6, [x5, 48]
 	cmp	w26, w6
-	beq	.L1066
+	beq	.L1182
 	ldrh	w5, [x5, 80]
 	cmp	w26, w5
-	beq	.L1066
+	beq	.L1182
 	cmp	w0, 64
-	bne	.L1067
+	bne	.L1183
 	ldr	x0, [x29, 128]
 	add	x2, x21, :lo12:.LANCHOR84
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR75
-.L1079:
+.L1195:
 	bl	_insert_data_list
-.L1066:
+.L1182:
 	add	w3, w26, 1
 	sxth	w26, w3
-	b	.L1059
-.L1064:
+	b	.L1175
+.L1180:
 	asr	w5, w6, w1
-	tbnz	x5, 0, .L1062
+	tbnz	x5, 0, .L1178
 	add	w0, w10, w0
 	sxth	w0, w0
-.L1063:
+.L1179:
 	add	w1, w1, 1
-	b	.L1061
-.L1062:
+	b	.L1177
+.L1178:
 	ldrh	w5, [x7, 146]
 	add	w5, w5, 1
 	strh	w5, [x7, 146]
-	b	.L1063
-.L1065:
+	b	.L1179
+.L1181:
 	ldrb	w1, [x4, 2]
 	mov	w5, -1
 	orr	w1, w1, -32
@@ -6572,75 +6994,75 @@ zftl_sblk_list_init:
 	adrp	x1, .LANCHOR4
 	ldr	x1, [x1, #:lo12:.LANCHOR4]
 	strh	w5, [x1, x2, lsl 1]
-	b	.L1060
-.L1076:
+	b	.L1176
+.L1192:
 	ldr	w0, [x29, 188]
-	b	.L1060
-.L1067:
+	b	.L1176
+.L1183:
 	cmp	w0, 96
-	bne	.L1068
+	bne	.L1184
 	ldr	x0, [x29, 136]
 	add	x2, x19, :lo12:.LANCHOR82
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR76
-	b	.L1079
-.L1068:
+	b	.L1195
+.L1184:
 	cmp	w0, 160
-	bne	.L1069
+	bne	.L1185
 	ldr	x0, [x29, 120]
 	add	x2, x20, :lo12:.LANCHOR86
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR74
-	b	.L1079
-.L1069:
-	cbnz	w0, .L1066
+	b	.L1195
+.L1185:
+	cbnz	w0, .L1182
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w2, [x0, x2, lsl 1]
-	cbz	w2, .L1070
+	cbz	w2, .L1186
 	str	x4, [x29, 96]
 	mov	w1, w26
 	mov	x0, x27
 	bl	printf
 	ldr	x4, [x29, 96]
 	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L1071
+	tbz	x0, 4, .L1187
 	mov	w1, 5
-.L1078:
+.L1194:
 	bfi	w0, w1, 5, 3
 	strb	w0, [x4, 2]
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w26
 	bl	gc_add_sblk
-	b	.L1066
-.L1071:
+	b	.L1182
+.L1187:
 	mov	w1, 2
-	b	.L1078
-.L1070:
+	b	.L1194
+.L1186:
 	ands	w1, w1, 24
-	bne	.L1073
+	bne	.L1189
 	ldr	x0, [x29, 160]
 	add	x2, x24, :lo12:.LANCHOR89
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR90
-.L1080:
+.L1196:
 	bl	_insert_free_list
-	b	.L1066
-.L1073:
+	b	.L1182
+.L1189:
 	cmp	w1, 16
-	bne	.L1074
+	bne	.L1190
 	ldr	x0, [x29, 152]
 	add	x2, x23, :lo12:.LANCHOR91
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR92
-	b	.L1080
-.L1074:
+	b	.L1196
+.L1190:
 	ldr	x0, [x29, 144]
 	add	x2, x22, :lo12:.LANCHOR93
 	mov	w1, w26
 	add	x0, x0, :lo12:.LANCHOR94
-	b	.L1080
+	b	.L1196
 	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
 	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
@@ -6654,15 +7076,15 @@ ftl_open_sblk_init:
 	stp	x21, x22, [sp, 32]
 	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC31
+	adrp	x21, .LC64
 	adrp	x23, .LANCHOR80
 	mov	w22, w1
 	add	x23, x23, :lo12:.LANCHOR80
 	add	x20, x20, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LC31
+	add	x21, x21, :lo12:.LC64
 	stp	x25, x26, [sp, 64]
-.L1082:
-.L1085:
+.L1198:
+.L1201:
 	mov	w0, w22
 	bl	ftl_alloc_sblk
 	mov	w1, 0
@@ -6682,18 +7104,18 @@ ftl_open_sblk_init:
 	strh	w0, [x19, 6]
 	strh	wzr, [x19, 10]
 	strb	w22, [x19, 4]
-	beq	.L1086
+	beq	.L1202
 	ldrb	w0, [x20]
 	mul	w0, w1, w0
 	and	w0, w0, 65535
-.L1083:
+.L1199:
 	ldrb	w2, [x20]
 	adrp	x26, .LANCHOR4
 	strh	w0, [x19, 12]
 	ubfiz	x25, x24, 1, 16
 	mul	w2, w2, w1
-	adrp	x1, .LANCHOR105
-	ldr	x3, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR106
+	ldr	x3, [x1, #:lo12:.LANCHOR106]
 	mov	w1, 255
 	lsl	w2, w2, 2
 	add	x0, x3, x0, uxth 2
@@ -6702,7 +7124,7 @@ ftl_open_sblk_init:
 	ldrh	w1, [x19, 6]
 	strh	w1, [x0, x25]
 	ldrb	w0, [x19, 9]
-	cbnz	w0, .L1081
+	cbnz	w0, .L1197
 	mov	w1, w24
 	mov	x0, x21
 	bl	printf
@@ -6711,11 +7133,11 @@ ftl_open_sblk_init:
 	strh	w1, [x0, x25]
 	mov	w0, 7
 	strb	w0, [x19, 4]
-	b	.L1085
-.L1086:
+	b	.L1201
+.L1202:
 	mov	w0, 0
-	b	.L1083
-.L1081:
+	b	.L1199
+.L1197:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6731,66 +7153,63 @@ pm_free_sblk:
 	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR127
+	adrp	x20, .LANCHOR131
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR127]
+	ldrh	w0, [x20, #:lo12:.LANCHOR131]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L1089
-	adrp	x1, .LANCHOR128
+	bls	.L1205
+	adrp	x1, .LANCHOR132
 	adrp	x0, .LC0
-	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR128
+	mov	w2, 76
+	add	x1, x1, :lo12:.LANCHOR132
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1090:
-	b	.L1090
-.L1089:
-	add	x23, x29, 112
+.L1205:
+	add	x28, x29, 112
 	mov	w2, 256
 	mov	w1, 0
-	mov	x0, x23
+	mov	x0, x28
 	bl	ftl_memset
-	adrp	x24, .LANCHOR53
+	adrp	x23, .LANCHOR95
+	adrp	x5, .LANCHOR101
 	adrp	x0, .LANCHOR96
 	mov	w2, 21
-	ldr	x5, [x24, #:lo12:.LANCHOR53]
-	ldrh	w8, [x0, #:lo12:.LANCHOR96]
-	ldrh	w11, [x20, #:lo12:.LANCHOR127]
-	add	x4, x5, 704
-	sub	w0, w2, w8
+	ldrb	w12, [x23, #:lo12:.LANCHOR95]
+	ldr	x7, [x5, #:lo12:.LANCHOR101]
+	ldrh	w11, [x0, #:lo12:.LANCHOR96]
+	ldrh	w13, [x20, #:lo12:.LANCHOR131]
+	add	x4, x7, 704
+	sub	w0, w2, w11
 	mov	w2, 1
-	ldrh	w1, [x5, 698]
+	ldrh	w1, [x7, 698]
 	lsl	w2, w2, w0
-	adrp	x0, .LANCHOR95
-	add	x1, x1, 176
 	sub	w2, w2, #1
-	ldrb	w10, [x0, #:lo12:.LANCHOR95]
-	add	x1, x5, x1, lsl 2
-	mov	x27, x0
-.L1091:
+	add	x1, x1, 176
+	add	x1, x7, x1, lsl 2
+.L1206:
 	cmp	x4, x1
-	bne	.L1095
-	adrp	x1, .LANCHOR72
-	adrp	x0, .LANCHOR80
-	add	x20, x20, :lo12:.LANCHOR127
-	add	x27, x27, :lo12:.LANCHOR95
-	ldrh	w2, [x0, #:lo12:.LANCHOR80]
-	add	x26, x1, :lo12:.LANCHOR72
-	ldrb	w21, [x1, #:lo12:.LANCHOR72]
-	add	x25, x0, :lo12:.LANCHOR80
-	mov	w28, 0
+	bne	.L1210
+	adrp	x24, .LANCHOR72
+	adrp	x25, .LANCHOR80
+	adrp	x26, .LANCHOR7
+	adrp	x27, .LC72
+	ldrb	w22, [x24, #:lo12:.LANCHOR72]
+	add	x20, x20, :lo12:.LANCHOR131
+	ldrh	w0, [x25, #:lo12:.LANCHOR80]
+	add	x26, x26, :lo12:.LANCHOR7
+	add	x27, x27, :lo12:.LC72
 	mov	w19, 0
-	mul	w21, w21, w2
-	mov	w2, 65535
-	and	w21, w21, 65535
-.L1096:
+	str	wzr, [x29, 108]
+	mul	w22, w22, w0
+	and	w22, w22, 65535
+.L1211:
 	ldrh	w0, [x20]
 	cmp	w0, w19
-	bhi	.L1101
-	mov	w0, w28
+	bhi	.L1217
+	ldr	w0, [x29, 108]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -6798,74 +7217,103 @@ pm_free_sblk:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 368
 	ret
-.L1095:
+.L1210:
 	ldr	w0, [x4]
-	add	x6, x5, 416
+	add	x8, x7, 416
 	mov	x3, 0
-	lsr	w0, w0, w8
+	lsr	w0, w0, w11
 	and	w0, w0, w2
-	udiv	w0, w0, w10
+	udiv	w0, w0, w12
 	and	w0, w0, 65535
-.L1092:
-	cmp	w11, w3, uxth
-	bhi	.L1094
+.L1207:
+	cmp	w13, w3, uxth
+	bhi	.L1209
 	add	x4, x4, 4
-	b	.L1091
-.L1094:
-	ldrh	w7, [x6]
-	cmp	w7, w0
-	bne	.L1093
-	ldrh	w7, [x23, x3, lsl 1]
-	add	w7, w7, 1
-	strh	w7, [x23, x3, lsl 1]
-.L1093:
+	b	.L1206
+.L1209:
+	ldrh	w10, [x8]
+	cmp	w10, w0
+	bne	.L1208
+	ldrh	w10, [x28, x3, lsl 1]
+	add	w10, w10, 1
+	strh	w10, [x28, x3, lsl 1]
+.L1208:
 	add	x3, x3, 1
-	add	x6, x6, 2
-	b	.L1092
-.L1101:
-	ldr	x1, [x24, #:lo12:.LANCHOR53]
-	sxtw	x22, w19
-	add	x0, x22, 208
-	ldrb	w3, [x27]
-	ldrh	w0, [x1, x0, lsl 1]
-	ldrh	w1, [x1, 692]
-	sdiv	w1, w1, w3
-	cmp	w1, w0
-	bne	.L1097
-	ldrb	w1, [x26]
-	ldrh	w3, [x25]
-	mul	w1, w1, w3
-	strh	w1, [x23, x22, lsl 1]
-.L1097:
-	ldrh	w1, [x23, x22, lsl 1]
-	cmp	w21, w1
-	bls	.L1098
-	cbnz	w1, .L1102
-.L1100:
-	cmp	w0, w2
-	beq	.L1099
-	str	w2, [x29, 108]
+	add	x8, x8, 2
+	b	.L1207
+.L1217:
+	ldr	x1, [x5, #:lo12:.LANCHOR101]
+	sxtw	x21, w19
+	add	x0, x21, 208
+	ldrb	w2, [x23, #:lo12:.LANCHOR95]
+	ldrh	w3, [x1, x0, lsl 1]
+	ldrh	w0, [x1, 692]
+	sdiv	w0, w0, w2
+	cmp	w0, w3
+	bne	.L1212
+	ldrb	w0, [x24, #:lo12:.LANCHOR72]
+	ldrh	w2, [x25, #:lo12:.LANCHOR80]
+	mul	w0, w0, w2
+	strh	w0, [x28, x21, lsl 1]
+.L1212:
+	ldrh	w0, [x28, x21, lsl 1]
+	cmp	w22, w0
+	bls	.L1213
+	cbnz	w0, .L1218
+.L1215:
+	mov	w0, 65535
+	cmp	w3, w0
+	beq	.L1214
+	ldr	w0, [x26]
+	tbz	x0, 12, .L1216
+	ldrh	w4, [x1, 688]
+	mov	w2, 0
+	str	x5, [x29, 96]
+	mov	w1, w19
+	mov	x0, x27
+	bl	printf
+	ldr	x5, [x29, 96]
+.L1216:
+	ldr	x0, [x5, #:lo12:.LANCHOR101]
+	add	x21, x21, 208
+	str	x5, [x29, 96]
+	ldrh	w0, [x0, x21, lsl 1]
 	bl	ftl_free_sblk
-	ldr	x0, [x24, #:lo12:.LANCHOR53]
-	add	x22, x22, 208
+	ldr	x5, [x29, 96]
 	mov	w1, -1
-	ldr	w2, [x29, 108]
-	strh	w1, [x0, x22, lsl 1]
+	ldr	x0, [x5, #:lo12:.LANCHOR101]
+	strh	w1, [x0, x21, lsl 1]
 	ldrh	w1, [x0, 688]
 	sub	w1, w1, #1
 	strh	w1, [x0, 688]
-	b	.L1099
-.L1098:
-	cbz	w1, .L1100
-.L1099:
+	b	.L1214
+.L1213:
+	cbz	w0, .L1215
+.L1214:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1096
-.L1102:
-	mov	w28, w19
-	mov	w21, w1
-	b	.L1099
+	b	.L1211
+.L1218:
+	mov	w22, w0
+	str	w19, [x29, 108]
+	b	.L1214
 	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.idb_init,"ax",@progbits
+	.align	2
+	.global	idb_init
+	.type	idb_init, %function
+idb_init:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 262144
+	mov	w1, 0
+	adrp	x0, idb_buf
+	add	x29, sp, 0
+	add	x0, x0, :lo12:idb_buf
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	idb_init, .-idb_init
 	.section	.text.ftl_memcpy,"ax",@progbits
 	.align	2
 	.global	ftl_memcpy
@@ -6880,14 +7328,24 @@ ftl_memcpy:
 	.type	flash_into_data_init, %function
 flash_into_data_init:
 	stp	x29, x30, [sp, -32]!
-	mov	w2, 2048
-	mov	w1, 0
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR12
-	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	tbz	x0, 12, .L1227
+	adrp	x2, .LANCHOR133
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR133
+	mov	w1, 100
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L1227:
+	adrp	x19, .LANCHOR20
+	mov	w2, 2048
+	mov	w1, 0
+	ldr	x0, [x19, #:lo12:.LANCHOR20]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	ldr	x0, [x19, #:lo12:.LANCHOR20]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	mov	w2, 32
@@ -6897,15 +7355,15 @@ flash_into_data_init:
 	str	w1, [x0, -72]
 	mov	w1, 1
 	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR129
-	add	x1, x1, :lo12:.LANCHOR129
+	adrp	x1, .LANCHOR13
+	add	x1, x1, :lo12:.LANCHOR13
 	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	ldr	x0, [x19, #:lo12:.LANCHOR20]
 	mov	w2, 32
 	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR26
+	adrp	x1, .LANCHOR32
 	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR26
+	add	x1, x1, :lo12:.LANCHOR32
 	add	x0, x0, 48
 	b	ftl_memcpy
 	.size	flash_into_data_init, .-flash_into_data_init
@@ -6915,15 +7373,15 @@ flash_into_data_init:
 	.type	ftl_memcpy32, %function
 ftl_memcpy32:
 	mov	x3, 0
-.L1108:
+.L1233:
 	cmp	w2, w3
-	bhi	.L1109
+	bhi	.L1234
 	ret
-.L1109:
+.L1234:
 	ldr	w4, [x1, x3, lsl 2]
 	str	w4, [x0, x3, lsl 2]
 	add	x3, x3, 1
-	b	.L1108
+	b	.L1233
 	.size	ftl_memcpy32, .-ftl_memcpy32
 	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
@@ -6956,87 +7414,129 @@ ftl_malloc:
 	.global	nandc_init
 	.type	nandc_init, %function
 nandc_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR14
-	mov	w2, 6
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	strb	w2, [x1, #:lo12:.LANCHOR14]
-	adrp	x2, .LANCHOR13
-	str	wzr, [x29, 24]
-	str	x0, [x2, #:lo12:.LANCHOR13]
-	mov	w2, 12336
-	ldr	w3, [x0, 352]
-	movk	w2, 0x5638, lsl 16
-	cmp	w3, w2
-	bne	.L1114
-	mov	w2, 8
-	strb	w2, [x1, #:lo12:.LANCHOR14]
-.L1114:
-	ldr	w3, [x0, 128]
-	mov	w2, 12336
-	movk	w2, 0x5639, lsl 16
-	cmp	w3, w2
-	bne	.L1115
-	mov	w2, 9
-	strb	w2, [x1, #:lo12:.LANCHOR14]
-.L1115:
-	ldrb	w1, [x1, #:lo12:.LANCHOR14]
-	cmp	w1, 9
-	adrp	x1, .LANCHOR35
-	bne	.L1116
-	mov	w2, 1
-	strb	w2, [x1, #:lo12:.LANCHOR35]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 520]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 8]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 80]
-	mov	w1, 38
-	str	w1, [x0, 84]
-	mov	w1, 39
-	str	w1, [x0, 84]
-.L1117:
-	adrp	x0, .LANCHOR36
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	str	wzr, [x29, 56]
+	tbz	x0, 12, .L1239
+	adrp	x1, .LANCHOR134
+	adrp	x0, .LC74
+	mov	x2, x19
+	add	x1, x1, :lo12:.LANCHOR134
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+.L1239:
+	adrp	x20, .LANCHOR22
+	mov	w0, 6
+	ldr	w2, [x19, 352]
+	mov	w1, 12336
+	strb	w0, [x20, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR21
+	movk	w1, 0x5638, lsl 16
+	mov	x22, x0
+	str	x19, [x0, #:lo12:.LANCHOR21]
+	cmp	w2, w1
+	bne	.L1240
+	mov	w0, 8
+	strb	w0, [x20, #:lo12:.LANCHOR22]
+.L1240:
+	ldr	w1, [x19, 128]
+	mov	w0, 12336
+	movk	w0, 0x5639, lsl 16
+	cmp	w1, w0
+	bne	.L1241
+	mov	w0, 9
+	strb	w0, [x20, #:lo12:.LANCHOR22]
+.L1241:
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	cmp	w0, 9
+	adrp	x0, .LANCHOR41
+	bne	.L1242
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LANCHOR38
-	strh	wzr, [x0, #:lo12:.LANCHOR38]
-	adrp	x0, .LANCHOR34
-	strb	wzr, [x0, #:lo12:.LANCHOR34]
-	ldp	x29, x30, [sp], 32
+	strb	w1, [x0, #:lo12:.LANCHOR41]
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 256
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	str	w0, [x19]
+	str	wzr, [x19, 520]
+	mov	w0, 4225
+	str	w0, [x19, 4]
+	mov	w0, 8321
+	str	w0, [x19, 8]
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	str	w0, [x19, 80]
+	mov	w0, 38
+	str	w0, [x19, 84]
+	mov	w0, 39
+	str	w0, [x19, 84]
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1244
+	ldr	w1, [x19]
+	ldr	w2, [x19, 8]
+	ldr	w3, [x19, 80]
+	ldr	w4, [x19, 84]
+	ldr	w5, [x19, 88]
+.L1257:
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
+	bl	printf
+.L1244:
+	adrp	x0, .LANCHOR42
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LANCHOR44
+	strh	wzr, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR40
+	strb	wzr, [x0, #:lo12:.LANCHOR40]
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1238
+	ldrb	w1, [x20, #:lo12:.LANCHOR22]
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
+	bl	printf
+.L1238:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
 	ret
-.L1116:
-	strb	wzr, [x1, #:lo12:.LANCHOR35]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 336]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 344]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 304]
-	mov	w1, 38
-	str	w1, [x0, 308]
-	mov	w1, 39
-	str	w1, [x0, 308]
+.L1242:
+	strb	wzr, [x0, #:lo12:.LANCHOR41]
+	ldr	w0, [x29, 56]
+	orr	w0, w0, 256
+	str	w0, [x29, 56]
+	ldr	w0, [x29, 56]
+	str	w0, [x19]
+	str	wzr, [x19, 336]
+	mov	w0, 4225
+	str	w0, [x19, 4]
+	mov	w0, 8321
+	str	w0, [x19, 344]
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	str	w0, [x19, 304]
+	mov	w0, 38
+	str	w0, [x19, 308]
+	mov	w0, 39
+	str	w0, [x19, 308]
 	mov	w0, 2048
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR37
-	str	x0, [x1, #:lo12:.LANCHOR37]
-	b	.L1117
+	adrp	x1, .LANCHOR43
+	str	x0, [x1, #:lo12:.LANCHOR43]
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1244
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	ldr	w1, [x0]
+	ldr	w2, [x0, 344]
+	ldr	w3, [x0, 304]
+	ldr	w4, [x0, 308]
+	ldr	w5, [x0, 312]
+	b	.L1257
 	.size	nandc_init, .-nandc_init
 	.section	.text.buf_init,"ax",@progbits
 	.align	2
@@ -7044,16 +7544,16 @@ nandc_init:
 	.type	buf_init, %function
 buf_init:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR46
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR43
+	add	x19, x0, :lo12:.LANCHOR46
 	stp	x21, x22, [sp, 32]
 	mov	x20, x0
-	adrp	x22, .LANCHOR52
-	add	x22, x22, :lo12:.LANCHOR52
+	adrp	x22, .LANCHOR114
+	add	x22, x22, :lo12:.LANCHOR114
 	mov	w21, 0
-.L1120:
+.L1259:
 	and	w0, w21, 255
 	strb	w0, [x19, 1]
 	add	w1, w0, 1
@@ -7071,15 +7571,15 @@ buf_init:
 	bl	ftl_malloc
 	str	x0, [x19, -40]
 	cmp	w21, 32
-	bne	.L1120
-	add	x0, x20, :lo12:.LANCHOR43
+	bne	.L1259
+	add	x0, x20, :lo12:.LANCHOR46
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR44
-	strb	wzr, [x0, #:lo12:.LANCHOR44]
-	adrp	x0, .LANCHOR45
+	adrp	x0, .LANCHOR47
+	strb	wzr, [x0, #:lo12:.LANCHOR47]
+	adrp	x0, .LANCHOR48
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR45]
+	strb	w21, [x0, #:lo12:.LANCHOR48]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
@@ -7095,11 +7595,11 @@ gc_init:
 	mov	w1, 0
 	add	x29, sp, 0
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR130
+	adrp	x0, .LANCHOR135
 	stp	x19, x20, [sp, 16]
 	adrp	x20, .LANCHOR63
 	add	x19, x20, :lo12:.LANCHOR63
-	strb	wzr, [x0, #:lo12:.LANCHOR130]
+	strb	wzr, [x0, #:lo12:.LANCHOR135]
 	mov	x0, x19
 	bl	ftl_memset
 	mov	w0, -1
@@ -7135,15 +7635,15 @@ gc_init:
 	mul	w0, w0, w3
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR131
-	str	x0, [x1, #:lo12:.LANCHOR131]
+	adrp	x1, .LANCHOR136
+	str	x0, [x1, #:lo12:.LANCHOR136]
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
 	ldrh	w0, [x20, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR132
-	str	x0, [x1, #:lo12:.LANCHOR132]
+	adrp	x1, .LANCHOR137
+	str	x0, [x1, #:lo12:.LANCHOR137]
 	ldrh	w1, [x20, #:lo12:.LANCHOR71]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	mul	w0, w1, w0
@@ -7162,9 +7662,9 @@ gc_init:
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR133
+	adrp	x1, .LANCHOR138
 	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR133]
+	str	x0, [x1, #:lo12:.LANCHOR138]
 	adrp	x0, .LANCHOR83
 	ldp	x29, x30, [sp], 32
 	ldrh	w1, [x0, #:lo12:.LANCHOR83]
@@ -7188,18 +7688,18 @@ js_hash:
 	mov	w0, 42982
 	mov	x3, 0
 	movk	w0, 0x47c6, lsl 16
-.L1127:
+.L1266:
 	cmp	w1, w3
-	bhi	.L1128
+	bhi	.L1267
 	ret
-.L1128:
+.L1267:
 	lsr	w2, w0, 2
 	ldrb	w5, [x4, x3]
 	add	w2, w2, w0, lsl 5
 	add	x3, x3, 1
 	add	w2, w2, w5
 	eor	w0, w0, w2
-	b	.L1127
+	b	.L1266
 	.size	js_hash, .-js_hash
 	.section	.text.timer_get_time,"ax",@progbits
 	.align	2
@@ -7248,67 +7748,67 @@ rknand_print_hex:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC40
+	adrp	x21, .LC78
 	stp	x23, x24, [sp, 48]
 	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC39
+	adrp	x23, .LC77
 	mov	x26, x0
 	mov	w24, w2
 	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC39
-	add	x21, x21, :lo12:.LC40
+	add	x23, x23, :lo12:.LC77
+	add	x21, x21, :lo12:.LC78
 	stp	x19, x20, [sp, 16]
 	str	x27, [sp, 80]
 	mov	x19, 0
 	mov	w20, 0
-	adrp	x27, .LC41
-.L1135:
+	adrp	x27, .LC79
+.L1274:
 	cmp	x25, x19
-	bne	.L1141
+	bne	.L1280
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC41
+	adrp	x1, .LC79
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC41
+	add	x1, x1, :lo12:.LC79
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC42
+	adrp	x0, .LC80
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC42
+	add	x0, x0, :lo12:.LC80
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	printf
-.L1141:
-	cbnz	w20, .L1136
+.L1280:
+	cbnz	w20, .L1275
 	mov	w2, w19
 	mov	x1, x26
 	mov	x0, x23
 	bl	printf
-.L1136:
+.L1275:
 	cmp	w24, 4
-	bne	.L1137
+	bne	.L1276
 	ldr	w1, [x22, x19, lsl 2]
-.L1143:
+.L1282:
 	mov	x0, x21
 	add	w20, w20, 1
 	bl	printf
 	cmp	w20, 15
-	bls	.L1140
+	bls	.L1279
 	mov	w20, 0
-	add	x1, x27, :lo12:.LC41
-	adrp	x0, .LC42
-	add	x0, x0, :lo12:.LC42
+	add	x1, x27, :lo12:.LC79
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	bl	printf
-.L1140:
+.L1279:
 	add	x19, x19, 1
-	b	.L1135
-.L1137:
+	b	.L1274
+.L1276:
 	cmp	w24, 2
-	bne	.L1139
+	bne	.L1278
 	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L1143
-.L1139:
+	b	.L1282
+.L1278:
 	ldrb	w1, [x22, x19]
-	b	.L1143
+	b	.L1282
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
@@ -7322,9 +7822,9 @@ hynix_get_read_retry_default:
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR20
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR12]
+	ldr	x28, [x0, #:lo12:.LANCHOR20]
 	stp	x23, x24, [sp, 48]
 	add	x0, x28, 112
 	str	x0, [x29, 112]
@@ -7340,43 +7840,43 @@ hynix_get_read_retry_default:
 	cmp	w3, 2
 	strb	w1, [x28, 130]
 	strb	w0, [x28, 131]
-	bne	.L1145
+	bne	.L1284
 	mov	w0, -89
 	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR134+17
+	adrp	x0, .LANCHOR139+17
 	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR134+17]
-.L1200:
+	strb	w1, [x0, #:lo12:.LANCHOR139+17]
+.L1339:
 	mov	w0, 7
-	b	.L1235
-.L1145:
+	b	.L1374
+.L1284:
 	ldr	w3, [x29, 140]
 	cmp	w3, 3
-	bne	.L1147
+	bne	.L1286
 	mov	x6, 0
-.L1148:
+.L1287:
 	sub	w0, w6, #80
 	strb	w0, [x22, x6]
 	add	x6, x6, 1
 	cmp	x6, 8
-	bne	.L1148
+	bne	.L1287
 	stp	w6, w6, [x29, 132]
-.L1146:
+.L1285:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #1
 	cmp	w0, 1
-	bhi	.L1153
-	adrp	x7, .LANCHOR15
-	adrp	x11, .LANCHOR17
-	add	x24, x7, :lo12:.LANCHOR15
-	add	x25, x11, :lo12:.LANCHOR17
+	bhi	.L1292
+	adrp	x7, .LANCHOR12
+	adrp	x11, .LANCHOR24
+	add	x24, x7, :lo12:.LANCHOR12
+	add	x25, x11, :lo12:.LANCHOR24
 	mov	w20, 0
 	mov	w26, 55
-.L1154:
+.L1293:
 	ldrb	w0, [x24]
 	cmp	w0, w20
-	bhi	.L1160
-.L1161:
+	bhi	.L1299
+.L1300:
 	ldr	x0, [x29, 112]
 	ldrb	w1, [x29, 136]
 	strb	w1, [x0, 1]
@@ -7389,10 +7889,10 @@ hynix_get_read_retry_default:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1147:
+.L1286:
 	ldr	w3, [x29, 140]
 	cmp	w3, 4
-	bne	.L1149
+	bne	.L1288
 	mov	w3, -52
 	strb	w3, [x28, 128]
 	mov	w3, -65
@@ -7408,13 +7908,13 @@ hynix_get_read_retry_default:
 	strb	w3, [x28, 132]
 	strb	w1, [x28, 134]
 	str	w0, [x29, 132]
-.L1236:
+.L1375:
 	str	w0, [x29, 136]
-	b	.L1146
-.L1149:
+	b	.L1285
+.L1288:
 	ldr	w0, [x29, 140]
 	cmp	w0, 5
-	bne	.L1150
+	bne	.L1289
 	mov	w0, 56
 	strb	w0, [x28, 128]
 	mov	w0, 57
@@ -7424,14 +7924,14 @@ hynix_get_read_retry_default:
 	mov	w0, 59
 	strb	w0, [x28, 131]
 	mov	w0, 8
-.L1235:
+.L1374:
 	str	w0, [x29, 132]
 	mov	w0, 4
-	b	.L1236
-.L1150:
+	b	.L1375
+.L1289:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	bne	.L1151
+	bne	.L1290
 	mov	w0, 14
 	strb	w0, [x28, 128]
 	mov	w0, 15
@@ -7441,18 +7941,18 @@ hynix_get_read_retry_default:
 	mov	w0, 17
 	strb	w0, [x28, 131]
 	mov	w0, 12
-	b	.L1235
-.L1151:
+	b	.L1374
+.L1290:
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
-	bne	.L1200
+	bne	.L1339
 	mov	x0, 0
-.L1152:
+.L1291:
 	sub	w1, w0, #80
 	strb	w1, [x22, x0]
 	add	x0, x0, 1
 	cmp	x0, 8
-	bne	.L1152
+	bne	.L1291
 	mov	w0, -44
 	strb	w0, [x28, 136]
 	mov	w0, -43
@@ -7460,8 +7960,8 @@ hynix_get_read_retry_default:
 	mov	w0, 12
 	str	w0, [x29, 132]
 	mov	w0, 10
-	b	.L1236
-.L1160:
+	b	.L1375
+.L1299:
 	ldrb	w0, [x25, w20, sxtw]
 	mov	x1, 32
 	mov	w2, 160
@@ -7470,10 +7970,10 @@ hynix_get_read_retry_default:
 	ldr	x1, [x29, 112]
 	ubfiz	x0, x0, 8, 8
 	add	x19, x1, x2
-	adrp	x1, .LANCHOR13
-	ldr	x4, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR21
+	ldr	x4, [x1, #:lo12:.LANCHOR21]
 	add	x23, x4, x0
-.L1155:
+.L1294:
 	str	w26, [x23, 2056]
 	ldrb	w0, [x22, x21]
 	str	w0, [x23, 2052]
@@ -7484,15 +7984,15 @@ hynix_get_read_retry_default:
 	add	x21, x21, 1
 	ldr	w0, [x29, 136]
 	cmp	w0, w21, uxtb
-	bhi	.L1155
-	adrp	x3, .LANCHOR134
-	add	x3, x3, :lo12:.LANCHOR134
+	bhi	.L1294
+	adrp	x3, .LANCHOR139
+	add	x3, x3, :lo12:.LANCHOR139
 	mov	x0, 0
-.L1158:
+.L1297:
 	add	x15, x19, x0
 	add	x14, x3, x0
 	mov	x1, 1
-.L1157:
+.L1296:
 	lsl	x4, x1, 2
 	lsl	x16, x1, 3
 	ldrb	w17, [x19, x0]
@@ -7501,10 +8001,10 @@ hynix_get_read_retry_default:
 	ldrb	w4, [x14, x4]
 	add	w4, w4, w17
 	strb	w4, [x15, x16]
-	bne	.L1157
+	bne	.L1296
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L1158
+	bne	.L1297
 	add	w5, w20, 1
 	strb	wzr, [x19, 16]
 	strb	wzr, [x19, 24]
@@ -7514,15 +8014,15 @@ hynix_get_read_retry_default:
 	strb	wzr, [x19, 48]
 	strb	wzr, [x19, 41]
 	strb	wzr, [x19, 49]
-	b	.L1154
-.L1153:
+	b	.L1293
+.L1292:
 	ldr	w0, [x29, 140]
 	sub	w0, w0, #3
 	cmp	w0, 4
-	bhi	.L1161
+	bhi	.L1300
 	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR15
-	add	x19, x19, :lo12:.LANCHOR15
+	adrp	x19, .LANCHOR12
+	add	x19, x19, :lo12:.LANCHOR12
 	sub	w13, w1, #1
 	mul	w15, w0, w1
 	and	x13, x13, 255
@@ -7537,14 +8037,14 @@ hynix_get_read_retry_default:
 	sub	w20, w0, #5
 	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1162:
+.L1301:
 	ldrb	w0, [x19]
 	ldr	w1, [x29, 128]
 	cmp	w0, w1
-	bls	.L1161
+	bls	.L1300
 	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
 	mov	w10, 160
 	mov	w23, 255
 	ldrb	w4, [x0, w1, sxtw]
@@ -7554,8 +8054,8 @@ hynix_get_read_retry_default:
 	ubfiz	x4, x4, 8, 8
 	add	x0, x0, x10
 	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR13
-	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR21
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
 	add	x27, x0, x4
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
@@ -7563,22 +8063,22 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	ldr	w0, [x29, 140]
 	cmp	w0, 4
-	bne	.L1163
+	bne	.L1302
 	mov	w0, 64
 	str	w23, [x27, 2052]
 	str	w0, [x27, 2048]
 	mov	w0, 204
-.L1237:
+.L1376:
 	str	w0, [x27, 2052]
 	mov	w0, 77
-	b	.L1238
-.L1163:
+	b	.L1377
+.L1302:
 	cmp	w20, 1
-	bhi	.L1165
+	bhi	.L1304
 	ldrb	w0, [x28, 128]
 	str	w0, [x27, 2052]
 	mov	w0, 82
-.L1238:
+.L1377:
 	str	w0, [x27, 2048]
 	mov	w0, 22
 	str	w0, [x27, 2056]
@@ -7593,10 +8093,10 @@ hynix_get_read_retry_default:
 	ldr	w0, [x29, 140]
 	str	wzr, [x27, 2052]
 	cmp	w0, 6
-	bne	.L1166
+	bne	.L1305
 	mov	w0, 31
 	str	w0, [x27, 2052]
-.L1167:
+.L1306:
 	mov	w23, 2
 	str	w23, [x27, 2052]
 	str	wzr, [x27, 2052]
@@ -7604,192 +8104,192 @@ hynix_get_read_retry_default:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bls	.L1201
+	bls	.L1340
 	ldr	w0, [x29, 140]
 	cmp	w0, 7
 	mov	w0, 32
 	csel	w23, w23, w0, ne
-.L1168:
-	adrp	x3, .LANCHOR135
+.L1307:
+	adrp	x3, .LANCHOR140
 	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR135]
-.L1169:
+	ldr	x0, [x3, #:lo12:.LANCHOR140]
+.L1308:
 	ldr	w2, [x27, 2048]
 	strb	w2, [x0, x1]
 	add	x1, x1, 1
 	cmp	w23, w1, uxtb
-	bhi	.L1169
+	bhi	.L1308
 	ldr	w1, [x29, 140]
 	cmp	w1, 7
-	bne	.L1170
+	bne	.L1309
 	mov	w1, 0
-.L1172:
+.L1311:
 	ldrb	w2, [x0]
 	cmp	w2, 12
-	beq	.L1171
+	beq	.L1310
 	ldrb	w2, [x0, 1]
 	cmp	w2, 10
-	beq	.L1171
+	beq	.L1310
 	add	w1, w1, 1
 	add	x0, x0, 4
 	and	w1, w1, 255
 	cmp	w1, 8
-	bne	.L1172
-.L1173:
-	adrp	x0, .LC43
+	bne	.L1311
+.L1312:
+	adrp	x0, .LC81
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1175:
-	b	.L1175
-.L1165:
+.L1314:
+	b	.L1314
+.L1304:
 	mov	w0, 174
 	str	w0, [x27, 2052]
 	str	wzr, [x27, 2048]
 	mov	w0, 176
-	b	.L1237
-.L1166:
+	b	.L1376
+.L1305:
 	str	wzr, [x27, 2052]
-	b	.L1167
-.L1201:
+	b	.L1306
+.L1340:
 	mov	w23, 16
-	b	.L1168
-.L1171:
+	b	.L1307
+.L1310:
 	cmp	w1, 6
-	bhi	.L1173
-.L1174:
-	ldr	x2, [x3, #:lo12:.LANCHOR135]
+	bhi	.L1312
+.L1313:
+	ldr	x2, [x3, #:lo12:.LANCHOR140]
 	mov	x0, 0
-.L1179:
+.L1318:
 	ldr	w1, [x29, 120]
 	cmp	w1, w0
-	bgt	.L1180
-	ldr	x1, [x3, #:lo12:.LANCHOR135]
+	bgt	.L1319
+	ldr	x1, [x3, #:lo12:.LANCHOR140]
 	mov	w16, 8
 	add	x3, x1, x21
-.L1182:
+.L1321:
 	mov	x0, 0
-.L1181:
+.L1320:
 	ldr	w17, [x3, x0, lsl 2]
 	ldr	w4, [x29, 124]
 	mvn	w17, w17
 	str	w17, [x3, x0, lsl 2]
 	add	x0, x0, 1
 	cmp	w4, w0
-	bgt	.L1181
+	bgt	.L1320
 	add	x3, x3, x22, uxtw 2
 	subs	w16, w16, #1
-	bne	.L1182
+	bne	.L1321
 	mov	x17, x1
 	mov	w23, 0
 	mov	w26, 1
-.L1183:
+.L1322:
 	mov	w3, 0
 	mov	w0, 0
-.L1187:
+.L1326:
 	mov	x25, x17
 	lsl	w16, w26, w0
 	mov	w24, 16
 	mov	w30, 0
-.L1185:
+.L1324:
 	ldr	w4, [x25]
 	add	x25, x25, x21
 	bics	wzr, w16, w4
 	cinc	w30, w30, eq
 	subs	w24, w24, #1
-	bne	.L1185
+	bne	.L1324
 	cmp	w30, 9
 	orr	w16, w3, w16
 	add	w0, w0, 1
 	csel	w3, w16, w3, cs
 	cmp	w0, 32
-	bne	.L1187
+	bne	.L1326
 	ldr	w0, [x29, 124]
 	add	w23, w23, 1
 	str	w3, [x17], 4
 	cmp	w0, w23
-	bgt	.L1183
+	bgt	.L1322
 	mov	x0, 0
 	mov	w3, 0
-.L1190:
+.L1329:
 	ldr	w16, [x1, x0]
 	add	x0, x0, 4
 	cmp	w16, 0
 	cinc	w3, w3, eq
 	cmp	x0, 32
-	bne	.L1190
+	bne	.L1329
 	cmp	w3, 7
-	ble	.L1191
+	ble	.L1330
 	mov	w3, 1024
 	mov	w2, 1
-	adrp	x0, .LC44
-	add	x0, x0, :lo12:.LC44
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	rknand_print_hex
-	adrp	x0, .LC43
+	adrp	x0, .LC81
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1192:
-	b	.L1192
-.L1170:
+.L1331:
+	b	.L1331
+.L1309:
 	ldr	w1, [x29, 140]
 	cmp	w1, 6
-	bne	.L1174
+	bne	.L1313
 	mov	x1, 0
-.L1176:
+.L1315:
 	ldrb	w2, [x0, x1]
 	cmp	w2, 12
-	beq	.L1174
+	beq	.L1313
 	add	x2, x0, x1
 	ldrb	w2, [x2, 8]
 	cmp	w2, 4
-	beq	.L1174
+	beq	.L1313
 	add	x1, x1, 1
 	cmp	x1, 8
-	bne	.L1176
-	adrp	x0, .LC43
+	bne	.L1315
+	adrp	x0, .LC81
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC43
+	add	x0, x0, :lo12:.LC81
 	bl	printf
-.L1178:
-	b	.L1178
-.L1180:
+.L1317:
+	b	.L1317
+.L1319:
 	ldr	w1, [x27, 2048]
 	strb	w1, [x2, x0]
 	add	x0, x0, 1
-	b	.L1179
-.L1191:
+	b	.L1318
+.L1330:
 	ldr	w0, [x29, 140]
 	cmp	w0, 6
-	beq	.L1203
+	beq	.L1342
 	cmp	w0, 7
 	mov	x1, 10
 	mov	x0, 8
 	csel	x0, x0, x1, ne
-.L1193:
+.L1332:
 	ldr	x10, [x29, 104]
 	mov	w3, 0
-.L1194:
+.L1333:
 	mov	x1, 0
-.L1195:
+.L1334:
 	ldrb	w16, [x2, x1]
 	ldr	w4, [x29, 136]
 	strb	w16, [x10, x1]
 	add	x1, x1, 1
 	cmp	w4, w1, uxtb
-	bhi	.L1195
+	bhi	.L1334
 	ldr	x1, [x29, 96]
 	add	w3, w3, 1
 	add	x10, x10, x0
 	add	x2, x2, x1
 	ldr	w1, [x29, 132]
 	cmp	w1, w3
-	bgt	.L1194
+	bgt	.L1333
 	mov	w23, 255
 	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	cmp	w20, 1
-	bhi	.L1197
+	bhi	.L1336
 	mov	w0, 54
 	str	w0, [x27, 2056]
 	ldrb	w0, [x28, 128]
@@ -7804,34 +8304,34 @@ hynix_get_read_retry_default:
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
 	str	w23, [x27, 2052]
-.L1239:
+.L1378:
 	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
 	ldr	w0, [x29, 128]
 	add	w11, w0, 1
 	and	w0, w11, 255
 	str	w0, [x29, 128]
-	b	.L1162
-.L1203:
+	b	.L1301
+.L1342:
 	mov	x0, 4
-	b	.L1193
-.L1197:
+	b	.L1332
+.L1336:
 	mov	w0, 56
-	b	.L1239
+	b	.L1378
 	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
 	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
 	.global	flash_get_read_retry_tbl
 	.type	flash_get_read_retry_tbl, %function
 flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR26+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR26+19]
+	adrp	x0, .LANCHOR32+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR32+19]
 	sub	w1, w0, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L1240
+	bhi	.L1379
 	b	hynix_get_read_retry_default
-.L1240:
+.L1379:
 	ret
 	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
 	.section	.text.nandc_xfer_done,"ax",@progbits
@@ -7840,78 +8340,81 @@ flash_get_read_retry_tbl:
 	.type	nandc_xfer_done, %function
 nandc_xfer_done:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR14
+	adrp	x0, .LANCHOR141
+	adrp	x1, .LANCHOR22
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x19, .LANCHOR21
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
 	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	cmp	w0, 9
-	ldr	x20, [x19, #:lo12:.LANCHOR13]
-	bne	.L1243
-	ldr	w0, [x20, 16]
+	stp	x23, x24, [sp, 48]
+	cmp	w1, 9
+	strb	wzr, [x0, #:lo12:.LANCHOR141]
+	bne	.L1382
+	ldr	x20, [x19, #:lo12:.LANCHOR21]
+	mov	x24, x0
 	mov	w21, 0
+	ldr	w0, [x20, 16]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1244
-	adrp	x22, .LC47
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC47
-	add	x23, x23, :lo12:.LC46
-.L1245:
+	tbnz	x0, 1, .L1383
+	adrp	x22, .LC86
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC86
+	add	x23, x23, :lo12:.LC85
+.L1384:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1248
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 16]
 	str	w0, [x29, 64]
-	bne	.L1245
+	bne	.L1384
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 64]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1245
-.L1244:
-	adrp	x22, .LC45
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC45
-	add	x23, x23, :lo12:.LC46
-.L1246:
+	b	.L1384
+.L1383:
+	adrp	x22, .LC84
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC84
+	add	x23, x23, :lo12:.LC85
+.L1385:
 	ldr	w1, [x20, 64]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 6
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	blt	.L1250
-.L1248:
-	adrp	x0, .LANCHOR37+32
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR37+32]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1250:
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	bge	.L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1247
+	tbz	x0, 13, .L1386
 	ldr	w0, [x29, 72]
-	tbnz	x0, 17, .L1248
-.L1247:
+	tbz	x0, 17, .L1386
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
+	ubfx	x1, x1, 17, 1
+.L1419:
+	bl	printf
+	b	.L1387
+.L1386:
+	ldr	w0, [x29, 64]
 	add	w21, w21, 1
-	tst	x21, 16777215
-	bne	.L1246
+	ubfx	x0, x0, 22, 6
+	cmp	w21, w0, lsl 12
+	bne	.L1385
 	ldr	w2, [x20, 64]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -7919,71 +8422,82 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
-	mov	w2, 4
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
 	mov	x0, x23
+	mov	w3, 64
+	mov	w2, 4
 	bl	rknand_print_hex
-	b	.L1246
-.L1243:
-	ldr	w0, [x20, 8]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1385
+	mov	w0, 1
+	strb	w0, [x24, #:lo12:.LANCHOR141]
+.L1387:
+	adrp	x0, .LANCHOR43+32
+	ldp	x19, x20, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR43+32]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1382:
+	ldr	x20, [x19, #:lo12:.LANCHOR21]
 	mov	w21, 0
+	ldr	w0, [x20, 8]
 	str	w0, [x29, 64]
 	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1254
-	adrp	x22, .LC47
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC47
-	add	x23, x23, :lo12:.LC46
-.L1255:
+	tbnz	x0, 1, .L1393
+	adrp	x22, .LC86
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC86
+	add	x23, x23, :lo12:.LC85
+.L1394:
 	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1248
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	tbnz	x0, 20, .L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	add	w21, w21, 1
 	tst	x21, 16777215
 	ldr	w0, [x0, 8]
 	str	w0, [x29, 64]
-	bne	.L1255
+	bne	.L1394
 	ldr	w2, [x29, 64]
 	mov	w1, w21
 	ldr	w3, [x20, 28]
 	mov	x0, x22
 	ubfx	x3, x3, 16, 5
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1255
-.L1254:
-	adrp	x22, .LC45
-	adrp	x23, .LC46
-	add	x22, x22, :lo12:.LC45
-	add	x23, x23, :lo12:.LC46
-.L1256:
+	b	.L1394
+.L1393:
+	adrp	x22, .LC84
+	adrp	x23, .LC85
+	add	x22, x22, :lo12:.LC84
+	add	x23, x23, :lo12:.LC85
+.L1395:
 	ldr	w1, [x20, 28]
 	ldr	w0, [x29, 64]
 	ubfx	x1, x1, 16, 5
 	ubfx	x0, x0, 22, 6
 	cmp	w1, w0
-	bge	.L1248
-	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	bge	.L1387
+	ldr	x0, [x19, #:lo12:.LANCHOR21]
 	ldr	w0, [x0]
 	str	w0, [x29, 72]
 	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1257
+	tbz	x0, 13, .L1396
 	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1257
+	tbz	x0, 17, .L1396
+	adrp	x0, .LC87
 	ldr	w1, [x29, 72]
-	adrp	x0, .LC48
-	add	x0, x0, :lo12:.LC48
-	bl	printf
-	b	.L1248
-.L1257:
+	add	x0, x0, :lo12:.LC87
+	b	.L1419
+.L1396:
 	add	w21, w21, 1
 	tst	x21, 16777215
-	bne	.L1256
+	bne	.L1395
 	ldr	w2, [x20, 28]
 	mov	w1, w21
 	ldr	w3, [x29, 64]
@@ -7991,12 +8505,12 @@ nandc_xfer_done:
 	ubfx	x2, x2, 16, 5
 	ubfx	x3, x3, 22, 6
 	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR13]
-	mov	w3, 256
+	ldr	x1, [x19, #:lo12:.LANCHOR21]
+	mov	w3, 64
 	mov	w2, 4
 	mov	x0, x23
 	bl	rknand_print_hex
-	b	.L1256
+	b	.L1395
 	.size	nandc_xfer_done, .-nandc_xfer_done
 	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
@@ -8008,30 +8522,29 @@ nandc_xfer:
 	stp	x19, x20, [sp, 16]
 	and	w19, w2, 255
 	stp	x21, x22, [sp, 32]
+	mov	x20, x3
 	and	w22, w1, 255
-	mov	x21, x3
-	mov	w1, w19
 	mov	x3, x4
-	mov	x2, x21
+	mov	x2, x20
+	mov	w1, w19
 	mov	w0, w22
-	mov	x20, x4
+	mov	x21, x4
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	cbnz	w22, .L1295
-	adrp	x0, .LANCHOR14
-	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbnz	w22, .L1439
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
 	cmp	w0, 9
-	bne	.L1279
-	adrp	x1, .LANCHOR13
+	bne	.L1422
+	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
-	mov	x20, x1
 	mov	w3, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR13]
 	mov	w2, 0
+	ldr	x5, [x22, #:lo12:.LANCHOR21]
 	mov	w0, 0
-.L1280:
+.L1423:
 	cmp	w2, w19
-	bcc	.L1284
+	bcc	.L1427
 	ldr	w19, [x5]
 	cmp	w3, 0
 	mov	w1, 512
@@ -8040,22 +8553,35 @@ nandc_xfer:
 	movk	w1, 0x2, lsl 16
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1278
+	bne	.L1429
 	mov	w1, w19
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR13]
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	orr	w19, w19, 131072
-.L1308:
 	str	w19, [x0]
 	mov	w0, -1
-.L1278:
+.L1429:
+	tbz	x19, 13, .L1430
+	adrp	x1, .LANCHOR141
+	ldrb	w1, [x1, #:lo12:.LANCHOR141]
+	cbz	w1, .L1430
+	mov	w1, w19
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
+	mov	w1, 1
+	str	w1, [x0, 16]
+.L1458:
+	mov	w0, -1
+.L1421:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1284:
+.L1427:
 	uxtw	x1, w2
 	add	x1, x1, 84
 	ldr	w1, [x5, x1, lsl 2]
@@ -8066,107 +8592,95 @@ nandc_xfer:
 	and	w1, w4, w1, lsr 10
 	and	w3, w3, w1
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1297
+	tbnz	x1, 2, .L1441
 	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1297
+	tbnz	x1, 18, .L1441
 	ldr	w4, [x29, 56]
 	ldr	w1, [x29, 56]
 	ubfx	x4, x4, 3, 7
 	ubfx	x1, x1, 19, 7
 	cmp	w4, w1
 	ldr	w1, [x29, 56]
-	ble	.L1282
+	ble	.L1425
 	ubfx	x1, x1, 3, 7
-.L1283:
+.L1426:
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1281:
+.L1424:
 	add	w2, w2, 1
-	b	.L1280
-.L1282:
+	b	.L1423
+.L1425:
 	ubfx	x1, x1, 19, 7
-	b	.L1283
-.L1297:
+	b	.L1426
+.L1441:
 	mov	w0, -1
-	b	.L1281
-.L1279:
-	adrp	x0, .LANCHOR34
+	b	.L1424
+.L1422:
+	adrp	x0, .LANCHOR40
 	lsr	w4, w19, 1
 	mov	w3, 64
 	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	mov	w2, 0
-	adrp	x6, .LANCHOR37
+	adrp	x6, .LANCHOR43
 	cmp	w0, 25
 	mov	w0, 128
 	csel	w3, w3, w0, cc
 	mov	w0, 0
-.L1287:
+.L1432:
 	add	w5, w3, w0
 	cmp	w2, w4
-	bcc	.L1288
-	adrp	x22, .LANCHOR13
+	bcc	.L1433
+	adrp	x22, .LANCHOR21
 	lsr	w19, w19, 2
 	mov	w3, 0
 	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR13]
-.L1289:
+	ldr	x4, [x22, #:lo12:.LANCHOR21]
+.L1434:
 	cmp	w3, w19
-	bcc	.L1293
+	bcc	.L1438
 	str	wzr, [x4, 16]
-	cmn	w0, #1
-	beq	.L1294
-	ldr	w1, [x20]
-	cmn	w1, #1
-	bne	.L1294
-	ldr	w1, [x20, 4]
-	cmn	w1, #1
-	bne	.L1294
-	ldr	w1, [x21]
-	cmn	w1, #1
-	mov	w1, 512
-	csel	w0, w0, w1, ne
-.L1294:
-	ldr	w19, [x4]
 	mov	w1, 8192
 	movk	w1, 0x2, lsl 16
+	ldr	w19, [x4]
 	and	w1, w19, w1
 	cmp	w1, 139264
-	bne	.L1278
+	bne	.L1430
 	mov	w1, w19
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR21]
 	orr	w19, w19, 131072
-	ldr	x0, [x22, #:lo12:.LANCHOR13]
-	b	.L1308
-.L1288:
-	ldr	x7, [x6, #:lo12:.LANCHOR37]
+	str	w19, [x0]
+	b	.L1458
+.L1433:
+	ldr	x7, [x6, #:lo12:.LANCHOR43]
 	and	x0, x0, 4294967292
 	ldr	w0, [x7, x0]
 	lsl	w7, w2, 2
 	add	w2, w2, 1
-	strb	w0, [x20, x7]
+	strb	w0, [x21, x7]
 	lsr	w7, w0, 8
-	strb	w7, [x20, w1, uxtw]
+	strb	w7, [x21, w1, uxtw]
 	add	w7, w1, 1
 	lsr	w8, w0, 16
 	lsr	w0, w0, 24
-	strb	w8, [x20, x7]
+	strb	w8, [x21, x7]
 	add	w7, w1, 2
 	add	w1, w1, 4
-	strb	w0, [x20, x7]
+	strb	w0, [x21, x7]
 	mov	w0, w5
-	b	.L1287
-.L1293:
+	b	.L1432
+.L1438:
 	uxtw	x1, w3
 	add	x1, x1, 8
 	ldr	w1, [x4, x1, lsl 2]
 	str	w1, [x29, 56]
 	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1300
+	tbnz	x1, 2, .L1444
 	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1300
+	tbnz	x1, 15, .L1444
 	ldr	w2, [x29, 56]
 	ubfx	x6, x2, 3, 5
 	ldr	w2, [x29, 56]
@@ -8179,28 +8693,42 @@ nandc_xfer:
 	orr	w1, w5, w1, lsl 5
 	cmp	w2, w1
 	ldr	w1, [x29, 56]
-	bls	.L1291
+	bls	.L1436
 	ubfx	x2, x1, 3, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 27, 1
-.L1307:
+.L1457:
 	orr	w1, w2, w1, lsl 5
 	cmp	w0, w1
 	csel	w0, w0, w1, cs
-.L1290:
+.L1435:
 	add	w3, w3, 1
-	b	.L1289
-.L1291:
+	b	.L1434
+.L1436:
 	ubfx	x2, x1, 16, 5
 	ldr	w1, [x29, 56]
 	ubfx	x1, x1, 29, 1
-	b	.L1307
-.L1300:
+	b	.L1457
+.L1444:
 	mov	w0, -1
-	b	.L1290
-.L1295:
+	b	.L1435
+.L1430:
+	cmn	w0, #1
+	beq	.L1421
+	ldr	w1, [x21]
+	cmn	w1, #1
+	bne	.L1421
+	ldr	w1, [x21, 4]
+	cmn	w1, #1
+	bne	.L1421
+	ldr	w1, [x20]
+	cmn	w1, #1
+	mov	w1, 512
+	csel	w0, w0, w1, ne
+	b	.L1421
+.L1439:
 	mov	w0, 0
-	b	.L1278
+	b	.L1421
 	.size	nandc_xfer, .-nandc_xfer
 	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
@@ -8211,35 +8739,35 @@ flash_read_page:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR21
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w22, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	adrp	x0, .LANCHOR7
 	stp	x25, x26, [sp, 64]
 	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	x25, x2
 	mov	x26, x3
 	and	w20, w1, 2097151
 	ubfx	x23, x22, 24, 2
-	tbz	x0, 4, .L1310
+	tbz	x0, 4, .L1460
 	mov	w3, w1
-	adrp	x0, .LC51
+	adrp	x0, .LC91
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC51
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-.L1310:
+.L1460:
 	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	adrp	x6, .LANCHOR41
-	cbnz	w23, .L1311
+	adrp	x6, .LANCHOR9
+	cbnz	w23, .L1461
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-.L1312:
+.L1462:
 	ubfiz	x4, x21, 8, 8
 	lsr	w0, w20, 8
 	add	x4, x19, x4
@@ -8253,15 +8781,15 @@ flash_read_page:
 	str	w0, [x4, 2052]
 	mov	w0, 48
 	str	w0, [x4, 2056]
-	ldr	x0, [x6, #:lo12:.LANCHOR41]
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1314
-	cbz	w23, .L1314
+	bne	.L1464
+	cbz	w23, .L1464
 	add	w20, w20, w20, lsl 1
 	sub	w0, w20, #1
 	add	w0, w0, w23
-.L1323:
+.L1473:
 	bl	nandc_set_seed
 	bl	nandc_wait_flash_ready
 	mov	w0, 5
@@ -8286,23 +8814,23 @@ flash_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1311:
-	ldr	x0, [x6, #:lo12:.LANCHOR41]
+.L1461:
+	ldr	x0, [x6, #:lo12:.LANCHOR9]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L1313
+	bne	.L1463
 	sxtw	x0, w21
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
 	str	w23, [x0, 8]
-	b	.L1312
-.L1313:
+	b	.L1462
+.L1463:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1312
-.L1314:
+	b	.L1462
+.L1464:
 	mov	w0, w20
-	b	.L1323
+	b	.L1473
 	.size	flash_read_page, .-flash_read_page
 	.section	.text.micron_read_retrial,"ax",@progbits
 	.align	2
@@ -8310,66 +8838,71 @@ flash_read_page:
 	.type	micron_read_retrial, %function
 micron_read_retrial:
 	stp	x29, x30, [sp, -128]!
+	and	w0, w0, 255
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	adrp	x0, .LANCHOR34
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
+	mov	w22, w2
+	stp	w5, w0, [x29, 112]
+	adrp	x0, .LANCHOR40
 	stp	x23, x24, [sp, 48]
-	mov	w24, w2
+	adrp	x23, .LANCHOR7
+	stp	x25, x26, [sp, 64]
+	mov	x26, x3
 	stp	x27, x28, [sp, 80]
-	mov	w28, w5
-	ldrb	w21, [x0, #:lo12:.LANCHOR34]
 	mov	x27, x4
+	ldrb	w20, [x0, #:lo12:.LANCHOR40]
 	bl	nandc_wait_flash_ready
-	and	x20, x25, 255
-	adrp	x0, .LANCHOR13
-	adrp	x5, .LANCHOR137
-	add	w21, w21, w21, lsl 1
-	add	x5, x5, :lo12:.LANCHOR137
-	ldr	x6, [x0, #:lo12:.LANCHOR13]
-	asr	w21, w21, 2
-	mov	w23, 0
-	mov	w19, -1
-	mov	w8, 239
-	mov	w10, 137
-	add	x22, x6, x20, lsl 8
-.L1325:
-	ldrb	w0, [x5]
-	cmp	w23, w0
-	bcc	.L1329
-.L1328:
-	add	x6, x6, x20, lsl 8
+	adrp	x0, .LANCHOR21
+	ldrb	w19, [x29, 116]
+	add	x23, x23, :lo12:.LANCHOR7
+	mov	w21, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR21]
+	add	w20, w20, w20, lsl 1
+	str	x0, [x29, 120]
+	asr	w20, w20, 2
+	adrp	x0, .LANCHOR143
+	add	x0, x0, :lo12:.LANCHOR143
+	str	x0, [x29, 104]
+	mov	w24, -1
+	ldr	x0, [x29, 120]
+	add	x25, x0, x19, lsl 8
+.L1475:
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cmp	w21, w0
+	bcc	.L1480
+.L1479:
+	ldr	x0, [x29, 120]
+	add	x19, x0, x19, lsl 8
 	mov	w0, 239
-	str	w0, [x6, 2056]
+	str	w0, [x19, 2056]
 	mov	w0, 137
-	str	w0, [x6, 2052]
+	str	w0, [x19, 2052]
 	mov	w0, 200
 	bl	timer_delay_ns
-	str	wzr, [x6, 2048]
-	str	wzr, [x6, 2048]
-	cmp	w19, w21
-	str	wzr, [x6, 2048]
-	str	wzr, [x6, 2048]
-	bcc	.L1330
-	cmn	w19, #1
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	cmp	w24, w20
+	str	wzr, [x19, 2048]
+	str	wzr, [x19, 2048]
+	bcc	.L1481
+	cmn	w24, #1
 	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1330:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L1324
-	adrp	x0, .LC52
-	mov	w4, w19
-	mov	w3, w23
-	mov	w2, w24
-	mov	w1, w23
-	add	x0, x0, :lo12:.LC52
+	csel	w24, w24, w0, eq
+.L1481:
+	cmp	w24, 256
+	ccmn	w24, #1, 4, ne
+	bne	.L1474
+	adrp	x0, .LC93
+	mov	w4, w24
+	mov	w3, w21
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC93
 	bl	printf
-.L1324:
-	mov	w0, w19
+.L1474:
+	mov	w0, w24
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -8377,44 +8910,53 @@ micron_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1329:
-	str	w8, [x22, 2056]
+.L1480:
+	mov	w0, 239
+	str	w0, [x25, 2056]
+	mov	w0, 137
+	str	w0, [x25, 2052]
+	add	w28, w21, 1
 	mov	w0, 200
-	str	w10, [x22, 2052]
-	stp	x5, x6, [x29, 96]
-	stp	w8, w10, [x29, 116]
 	bl	timer_delay_ns
-	add	w7, w23, 1
-	str	w7, [x22, 2048]
-	str	wzr, [x22, 2048]
-	mov	w4, w28
-	str	wzr, [x22, 2048]
+	str	w28, [x25, 2048]
+	str	wzr, [x25, 2048]
 	mov	x3, x27
-	str	wzr, [x22, 2048]
+	ldrb	w0, [x29, 116]
 	mov	x2, x26
-	str	w7, [x29, 124]
-	mov	w1, w24
-	mov	w0, w25
+	ldr	w4, [x29, 112]
+	mov	w1, w22
+	str	wzr, [x25, 2048]
+	str	wzr, [x25, 2048]
 	bl	flash_read_page
-	ldp	w8, w10, [x29, 116]
-	cmn	w0, #1
-	ldr	w7, [x29, 124]
-	ldp	x5, x6, [x29, 96]
-	beq	.L1326
-	adrp	x1, .LANCHOR135
-	cmn	w19, #1
-	csel	w19, w19, w0, ne
-	cmp	w0, w21
-	ldr	x26, [x1, #:lo12:.LANCHOR135]
-	adrp	x1, .LANCHOR136
-	ldr	x27, [x1, #:lo12:.LANCHOR136]
-	bcc	.L1332
-.L1326:
-	mov	w23, w7
-	b	.L1325
-.L1332:
-	mov	w19, w0
-	b	.L1328
+	mov	w7, w0
+	ldr	w0, [x23]
+	tbz	x0, 12, .L1476
+	str	w7, [x29, 100]
+	mov	w4, w24
+	mov	w3, w21
+	mov	w2, w22
+	mov	w1, w21
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
+	bl	printf
+	ldr	w7, [x29, 100]
+.L1476:
+	cmn	w7, #1
+	beq	.L1477
+	adrp	x0, .LANCHOR140
+	cmn	w24, #1
+	csel	w24, w24, w7, ne
+	cmp	w7, w20
+	ldr	x26, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x27, [x0, #:lo12:.LANCHOR142]
+	bcc	.L1483
+.L1477:
+	mov	w21, w28
+	b	.L1475
+.L1483:
+	mov	w24, w7
+	b	.L1479
 	.size	micron_read_retrial, .-micron_read_retrial
 	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
@@ -8425,7 +8967,7 @@ toshiba_3d_read_retrial:
 	and	w6, w1, 255
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR9
+	adrp	x22, .LANCHOR17
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 255
 	stp	x27, x28, [sp, 80]
@@ -8436,14 +8978,14 @@ toshiba_3d_read_retrial:
 	stp	x19, x20, [sp, 16]
 	str	w5, [x29, 124]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR13
+	adrp	x0, .LANCHOR21
 	mov	w1, 46
 	mov	w2, 56
-	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	ldr	x26, [x0, #:lo12:.LANCHOR21]
 	and	x0, x25, 255
 	add	x21, x0, 8
 	str	x0, [x29, 112]
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	add	x21, x26, x21, lsl 8
 	cmp	w0, 36
 	mov	w0, 26
@@ -8452,26 +8994,26 @@ toshiba_3d_read_retrial:
 	mov	w1, 10
 	csel	w0, w1, w0, ne
 	str	w0, [x29, 104]
-	cbnz	w6, .L1344
+	cbnz	w6, .L1498
 	sxtw	x24, w25
-	add	x0, x22, :lo12:.LANCHOR9
+	add	x0, x22, :lo12:.LANCHOR17
 	add	x24, x24, 8
 	mov	w19, -1
 	add	x24, x26, x24, lsl 8
 	mov	w20, 1
 	str	x0, [x29, 96]
-.L1351:
+.L1505:
 	ldr	x0, [x29, 96]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1345
+	bne	.L1499
 	mov	x0, x21
 	mov	w2, 0
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
 	str	w0, [x24, 8]
-.L1346:
+.L1500:
 	ldr	w4, [x29, 124]
 	mov	x3, x28
 	mov	x2, x27
@@ -8479,62 +9021,62 @@ toshiba_3d_read_retrial:
 	mov	w0, w25
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1347
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L1501
 	mov	w3, w4
 	str	w4, [x29, 120]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
 	bl	printf
 	ldr	w4, [x29, 120]
-.L1347:
+.L1501:
 	cmn	w4, #1
-	beq	.L1348
-	adrp	x0, .LANCHOR135
+	beq	.L1502
+	adrp	x0, .LANCHOR140
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	ldr	x28, [x0, #:lo12:.LANCHOR136]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldr	x27, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1366
-.L1348:
+	bcc	.L1520
+.L1502:
 	ldr	w0, [x29, 104]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1351
-.L1350:
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	bne	.L1505
+.L1504:
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1352
+	bne	.L1506
 	mov	w2, 0
-.L1389:
+.L1543:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_tlc_set_rr_para
-	b	.L1353
-.L1345:
+	b	.L1507
+.L1499:
 	mov	w1, w20
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-	b	.L1346
-.L1366:
+	b	.L1500
+.L1520:
 	mov	w19, w4
-	b	.L1350
-.L1352:
+	b	.L1504
+.L1506:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_slc_rr_para
-.L1353:
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+.L1507:
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1362
+	bne	.L1516
 	ldr	x0, [x29, 112]
 	add	x26, x26, x0, lsl 8
 	mov	w0, 85
@@ -8543,27 +9085,27 @@ toshiba_3d_read_retrial:
 	str	wzr, [x26, 2052]
 	str	wzr, [x26, 2048]
 	str	w0, [x26, 2056]
-.L1362:
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+.L1516:
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1363
+	bcc	.L1517
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1363:
+.L1517:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1364
-	adrp	x0, .LC55
+	bne	.L1518
+	adrp	x0, .LC96
 	mov	w4, w19
 	mov	w3, w20
 	mov	w2, w23
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1364:
+.L1518:
 	bl	nandc_wait_flash_ready
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
@@ -8573,26 +9115,26 @@ toshiba_3d_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1344:
+.L1498:
 	sxtw	x24, w25
 	orr	w23, w23, w6, lsl 24
 	add	x24, x24, 8
-	add	x0, x22, :lo12:.LANCHOR9
+	add	x0, x22, :lo12:.LANCHOR17
 	add	x24, x26, x24, lsl 8
 	mov	w19, -1
 	mov	w20, 1
 	str	x0, [x29, 104]
-.L1360:
+.L1514:
 	ldr	x0, [x29, 104]
 	ldrb	w0, [x0]
 	cmp	w0, 36
-	bne	.L1354
+	bne	.L1508
 	mov	x0, x21
 	mov	w2, 1
 	mov	w1, w20
 	bl	toshiba_tlc_set_rr_para
 	mov	w0, 93
-.L1388:
+.L1542:
 	str	w0, [x24, 8]
 	mov	x3, x28
 	mov	x2, x27
@@ -8601,56 +9143,56 @@ toshiba_3d_read_retrial:
 	mov	w0, w25
 	bl	flash_read_page
 	mov	w4, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1356
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L1510
 	mov	w3, w4
 	str	w4, [x29, 120]
 	mov	w2, w23
 	mov	w1, w20
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
 	bl	printf
 	ldr	w4, [x29, 120]
-.L1356:
+.L1510:
 	cmn	w4, #1
-	beq	.L1357
-	adrp	x0, .LANCHOR135
+	beq	.L1511
+	adrp	x0, .LANCHOR140
 	cmn	w19, #1
 	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	ldr	x28, [x0, #:lo12:.LANCHOR136]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldr	x27, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w4, w0, lsr 2
-	bcc	.L1367
-.L1357:
+	bcc	.L1521
+.L1511:
 	ldr	w0, [x29, 96]
 	add	w20, w20, 1
 	cmp	w0, w20
-	bne	.L1360
-.L1359:
-	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	bne	.L1514
+.L1513:
+	ldrb	w0, [x22, #:lo12:.LANCHOR17]
 	cmp	w0, 36
-	bne	.L1361
+	bne	.L1515
 	mov	w2, 1
-	b	.L1389
-.L1354:
+	b	.L1543
+.L1508:
 	mov	x0, x21
 	mov	w1, w20
 	bl	toshiba_3d_set_tlc_rr_para
 	mov	w0, 38
-	b	.L1388
-.L1367:
+	b	.L1542
+.L1521:
 	mov	w19, w4
-	b	.L1359
-.L1361:
+	b	.L1513
+.L1515:
 	mov	w1, 0
 	mov	x0, x21
 	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1353
+	b	.L1507
 	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
 	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
@@ -8670,84 +9212,84 @@ toshiba_read_retrial:
 	and	x26, x19, 255
 	stp	w5, w2, [x29, 120]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR13
-	adrp	x1, .LANCHOR9
+	adrp	x0, .LANCHOR21
+	adrp	x1, .LANCHOR17
 	str	x1, [x29, 112]
 	add	x21, x26, 8
-	ldr	x22, [x0, #:lo12:.LANCHOR13]
-	ldrb	w0, [x1, #:lo12:.LANCHOR9]
+	ldr	x22, [x0, #:lo12:.LANCHOR21]
+	ldrb	w0, [x1, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	add	x21, x22, x21, lsl 8
 	and	w0, w0, 255
 	cmp	w0, 1
-	bls	.L1408
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	cbz	w0, .L1409
+	bls	.L1562
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbz	w0, .L1563
 	mov	w23, 1
 	mov	w0, 1
 	bl	nandc_set_if_mode
-.L1392:
+.L1546:
 	add	x0, x22, x26, lsl 8
 	mov	w1, 92
 	str	w1, [x0, 2056]
 	mov	w1, 197
 	str	w1, [x0, 2056]
-.L1391:
+.L1545:
 	sxtw	x0, w19
 	mov	w20, 1
 	add	x0, x0, 8
 	mov	w24, -1
 	add	x0, x22, x0, lsl 8
 	str	x0, [x29, 104]
-.L1393:
-	adrp	x0, .LANCHOR137
-	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+.L1547:
+	adrp	x0, .LANCHOR143
+	ldrb	w0, [x0, #:lo12:.LANCHOR143]
 	add	w0, w0, 1
 	cmp	w20, w0
-	bcc	.L1402
+	bcc	.L1556
 	mov	w25, w24
-.L1401:
+.L1555:
 	ldr	x0, [x29, 112]
 	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1403
+	bhi	.L1557
 	bl	sandisk_set_rr_para
-.L1404:
+.L1558:
 	sxtw	x19, w19
 	mov	w0, 255
 	add	x19, x19, 8
 	add	x22, x22, x19, lsl 8
 	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1405
+	bcc	.L1559
 	cmn	w25, #1
 	mov	w0, 256
 	csel	w25, w25, w0, eq
-.L1405:
+.L1559:
 	cmp	w25, 256
 	ccmn	w25, #1, 4, ne
-	bne	.L1406
+	bne	.L1560
 	ldr	w2, [x29, 124]
-	adrp	x0, .LC55
+	adrp	x0, .LC96
 	mov	w4, w25
 	mov	w3, w20
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC55
+	add	x0, x0, :lo12:.LC96
 	bl	printf
-.L1406:
+.L1560:
 	bl	nandc_wait_flash_ready
-	cbz	w23, .L1390
+	cbz	w23, .L1544
 	mov	w0, 4
 	bl	nandc_set_if_mode
-.L1390:
+.L1544:
 	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8756,36 +9298,36 @@ toshiba_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1409:
+.L1563:
 	mov	w23, 0
-	b	.L1392
-.L1408:
+	b	.L1546
+.L1562:
 	mov	w23, 0
-	b	.L1391
-.L1402:
+	b	.L1545
+.L1556:
 	ldr	x0, [x29, 112]
 	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	sub	w0, w0, #67
 	and	w0, w0, 255
 	cmp	w0, 1
 	mov	x0, x21
-	bhi	.L1394
+	bhi	.L1548
 	bl	sandisk_set_rr_para
-.L1395:
+.L1549:
 	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, #:lo12:.LANCHOR17]
 	cmp	w0, 34
-	bne	.L1396
-	adrp	x0, .LANCHOR137
-	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+	bne	.L1550
+	adrp	x0, .LANCHOR143
+	ldrb	w0, [x0, #:lo12:.LANCHOR143]
 	sub	w0, w0, #3
 	cmp	w20, w0
-	bne	.L1396
+	bne	.L1550
 	ldr	x1, [x29, 104]
 	mov	w0, 179
 	str	w0, [x1, 8]
-.L1396:
+.L1550:
 	add	x0, x22, x26, lsl 8
 	mov	w1, 38
 	ldr	w4, [x29, 120]
@@ -8799,27 +9341,27 @@ toshiba_read_retrial:
 	bl	flash_read_page
 	mov	w25, w0
 	cmn	w0, #1
-	beq	.L1399
+	beq	.L1553
 	cmn	w24, #1
 	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR135
-	ldr	x27, [x0, #:lo12:.LANCHOR135]
-	adrp	x0, .LANCHOR136
-	ldr	x28, [x0, #:lo12:.LANCHOR136]
-	adrp	x0, .LANCHOR34
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	adrp	x0, .LANCHOR140
+	ldr	x27, [x0, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR142
+	ldr	x28, [x0, #:lo12:.LANCHOR142]
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	add	w0, w0, w0, lsl 1
 	cmp	w25, w0, lsr 2
-	bcc	.L1401
-.L1399:
+	bcc	.L1555
+.L1553:
 	add	w20, w20, 1
-	b	.L1393
-.L1394:
+	b	.L1547
+.L1548:
 	bl	toshiba_set_rr_para
-	b	.L1395
-.L1403:
+	b	.L1549
+.L1557:
 	bl	toshiba_set_rr_para
-	b	.L1404
+	b	.L1558
 	.size	toshiba_read_retrial, .-toshiba_read_retrial
 	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
@@ -8830,11 +9372,11 @@ hynix_read_retrial:
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	x23, x0, 255
-	adrp	x0, .LANCHOR12
+	adrp	x0, .LANCHOR20
 	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
 	mov	w27, w5
-	ldr	x28, [x0, #:lo12:.LANCHOR12]
+	ldr	x28, [x0, #:lo12:.LANCHOR20]
 	mov	w22, w2
 	stp	x25, x26, [sp, 64]
 	mov	x25, x3
@@ -8847,37 +9389,37 @@ hynix_read_retrial:
 	ldrb	w24, [x28, 2]
 	ldrb	w20, [x0, 8]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR34
-	add	x6, x6, :lo12:.LANCHOR34
+	adrp	x6, .LANCHOR40
+	add	x6, x6, :lo12:.LANCHOR40
 	mov	w5, 0
-	adrp	x7, .LANCHOR135
-	adrp	x8, .LANCHOR136
-.L1423:
+	adrp	x7, .LANCHOR140
+	adrp	x8, .LANCHOR142
+.L1577:
 	cmp	w5, w24
-	bcc	.L1428
-.L1427:
-	adrp	x0, .LANCHOR34
+	bcc	.L1582
+.L1581:
+	adrp	x0, .LANCHOR40
 	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	strb	w20, [x23, 8]
 	add	w0, w0, w0, lsl 1
 	cmp	w19, w0, lsr 2
-	bcc	.L1429
+	bcc	.L1583
 	cmn	w19, #1
 	mov	w0, 256
 	csel	w19, w19, w0, eq
-.L1429:
+.L1583:
 	cmp	w19, 256
 	ccmn	w19, #1, 4, ne
-	bne	.L1422
-	adrp	x0, .LC56
+	bne	.L1576
+	adrp	x0, .LC97
 	mov	w4, w19
 	mov	w3, w5
 	mov	w2, w22
 	mov	w1, w5
-	add	x0, x0, :lo12:.LC56
+	add	x0, x0, :lo12:.LC97
 	bl	printf
-.L1422:
+.L1576:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -8886,7 +9428,7 @@ hynix_read_retrial:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1428:
+.L1582:
 	add	w20, w20, 1
 	stp	x6, x8, [x29, 96]
 	and	w20, w20, 255
@@ -8907,21 +9449,21 @@ hynix_read_retrial:
 	cmn	w0, #1
 	ldp	x6, x8, [x29, 96]
 	ldr	x7, [x29, 112]
-	beq	.L1425
+	beq	.L1579
 	ldrb	w1, [x6]
 	cmn	w19, #1
 	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR135]
-	ldr	x26, [x8, #:lo12:.LANCHOR136]
+	ldr	x25, [x7, #:lo12:.LANCHOR140]
+	ldr	x26, [x8, #:lo12:.LANCHOR142]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	bcc	.L1431
-.L1425:
+	bcc	.L1585
+.L1579:
 	add	w5, w5, 1
-	b	.L1423
-.L1431:
+	b	.L1577
+.L1585:
 	mov	w19, w0
-	b	.L1427
+	b	.L1581
 	.size	hynix_read_retrial, .-hynix_read_retrial
 	.section	.text.flash_ddr_tunning_read,"ax",@progbits
 	.align	2
@@ -8934,15 +9476,15 @@ flash_ddr_tunning_read:
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC57
+	adrp	x21, .LC98
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR34
+	adrp	x22, .LANCHOR40
 	stp	x25, x26, [sp, 64]
-	add	x21, x21, :lo12:.LC57
+	add	x21, x21, :lo12:.LC98
 	stp	x27, x28, [sp, 80]
 	mov	x26, x3
 	str	w4, [x29, 120]
-	add	x22, x22, :lo12:.LANCHOR34
+	add	x22, x22, :lo12:.LANCHOR40
 	str	x2, [x29, 128]
 	mov	w28, 0
 	str	w0, [x29, 136]
@@ -8950,14 +9492,14 @@ flash_ddr_tunning_read:
 	mov	w23, 0
 	str	w0, [x29, 124]
 	mov	w24, 0
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	mov	w27, 1024
-	add	x0, x0, :lo12:.LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR7
 	mov	w25, 6
 	mov	w19, -1
 	str	wzr, [x29, 140]
 	str	x0, [x29, 112]
-.L1447:
+.L1601:
 	mov	w0, w25
 	bl	nandc_set_ddr_para
 	ldr	w4, [x29, 120]
@@ -8969,7 +9511,7 @@ flash_ddr_tunning_read:
 	mov	w4, w0
 	ldr	x0, [x29, 112]
 	ldr	w0, [x0]
-	tbz	x0, 4, .L1442
+	tbz	x0, 4, .L1596
 	mov	w3, w4
 	str	w4, [x29, 108]
 	mov	w2, w20
@@ -8977,51 +9519,51 @@ flash_ddr_tunning_read:
 	mov	x0, x21
 	bl	printf
 	ldr	w4, [x29, 108]
-.L1442:
+.L1596:
 	add	w0, w27, 1
 	cmp	w4, w0
-	bhi	.L1443
-	adrp	x0, .LANCHOR135
-	ldr	x0, [x0, #:lo12:.LANCHOR135]
+	bhi	.L1597
+	adrp	x0, .LANCHOR140
+	ldr	x0, [x0, #:lo12:.LANCHOR140]
 	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR136
-	ldr	x26, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR142
+	ldr	x26, [x0, #:lo12:.LANCHOR142]
 	ldrb	w0, [x22]
 	cmp	w4, w0, lsr 2
-	bcs	.L1452
+	bcs	.L1606
 	add	w24, w24, 1
 	cmp	w24, 7
-	bls	.L1452
+	bls	.L1606
 	sub	w28, w25, w24
 	mov	w27, w4
 	mov	w19, 0
-.L1445:
+.L1599:
 	ldr	w0, [x29, 140]
 	cmp	w24, w23
 	csel	w28, w28, w0, cs
-.L1446:
-	cbz	w28, .L1448
-	adrp	x0, .LANCHOR34
+.L1600:
+	cbz	w28, .L1602
+	adrp	x0, .LANCHOR40
 	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
 	udiv	w0, w0, w1
 	cmp	w0, w27
-	bls	.L1448
+	bls	.L1602
 	mov	w1, w28
-	adrp	x0, .LC58
-	add	x0, x0, :lo12:.LC58
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
 	bl	printf
 	mov	w0, w28
-.L1462:
+.L1616:
 	bl	nandc_set_ddr_para
-	cbz	w19, .L1441
+	cbz	w19, .L1595
 	ldr	w1, [x29, 136]
-	adrp	x0, .LC59
+	adrp	x0, .LC100
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC59
+	add	x0, x0, :lo12:.LC100
 	mov	w27, w19
 	bl	printf
-.L1441:
+.L1595:
 	mov	w0, w27
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -9030,29 +9572,29 @@ flash_ddr_tunning_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L1443:
+.L1597:
 	cmp	w24, w23
-	bls	.L1453
+	bls	.L1607
 	sub	w0, w28, w24
 	str	w0, [x29, 140]
 	cmp	w24, 7
-	bhi	.L1446
+	bhi	.L1600
 	mov	w23, w24
-.L1453:
+.L1607:
 	mov	w24, 0
-	b	.L1444
-.L1452:
+	b	.L1598
+.L1606:
 	mov	w28, w25
 	mov	w27, w4
 	mov	w19, 0
-.L1444:
+.L1598:
 	add	w25, w25, 2
 	cmp	w25, 50
-	bne	.L1447
-	b	.L1445
-.L1448:
+	bne	.L1601
+	b	.L1599
+.L1602:
 	ldrb	w0, [x29, 124]
-	b	.L1462
+	b	.L1616
 	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
 	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
@@ -9060,60 +9602,58 @@ flash_ddr_tunning_read:
 	.type	flash_read_page_en, %function
 flash_read_page_en:
 	stp	x29, x30, [sp, -96]!
-	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	adrp	x1, .LANCHOR15
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	mov	w19, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	x22, x2
 	stp	x25, x26, [sp, 64]
+	mov	x23, x3
 	str	x27, [sp, 80]
-	cmp	w1, w0
-	bhi	.L1464
-	adrp	x1, .LANCHOR138
+	mov	w24, w4
+	ubfx	x21, x19, 24, 2
+	cmp	w0, w20
+	bhi	.L1618
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC0
-	mov	w2, 399
-	add	x1, x1, :lo12:.LANCHOR138
+	mov	w2, 378
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1465:
-	b	.L1465
-.L1464:
-	adrp	x1, .LANCHOR17
-	add	x1, x1, :lo12:.LANCHOR17
-	mov	x22, x2
-	mov	x23, x3
-	mov	w24, w4
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1466
-	adrp	x0, .LC60
+.L1618:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w20, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L1619
+	adrp	x0, .LC101
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC60
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L1466:
-	tst	x19, 50331648
-	bne	.L1467
-	adrp	x0, .LANCHOR18
-	adrp	x1, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1468
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
-	cbz	w0, .L1467
-.L1468:
-	adrp	x0, .LANCHOR20
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+.L1619:
+	cbnz	w21, .L1620
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1621
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L1620
+.L1621:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1469
+	cbz	w1, .L1622
 	add	w19, w0, w19, lsl 1
-.L1467:
+.L1620:
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9122,26 +9662,26 @@ flash_read_page_en:
 	bl	flash_read_page
 	mov	w21, w0
 	cmn	w0, #1
-	bne	.L1463
-	adrp	x25, .LANCHOR36
+	bne	.L1617
+	adrp	x25, .LANCHOR42
 	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR36]
-	cbnz	w27, .L1471
-.L1474:
-	adrp	x0, .LANCHOR139
-	ldr	x6, [x0, #:lo12:.LANCHOR139]
-	cbnz	x6, .L1472
-.L1473:
-	ldrb	w4, [x26, #:lo12:.LANCHOR36]
+	ldrb	w27, [x25, #:lo12:.LANCHOR42]
+	cbnz	w27, .L1624
+.L1627:
+	adrp	x0, .LANCHOR145
+	ldr	x6, [x0, #:lo12:.LANCHOR145]
+	cbnz	x6, .L1625
+.L1626:
+	ldrb	w4, [x26, #:lo12:.LANCHOR42]
 	mov	w3, -1
 	mov	w2, w19
 	mov	w1, 0
-	adrp	x0, .LC61
-	add	x0, x0, :lo12:.LC61
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	cbz	w0, .L1463
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbz	w0, .L1617
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
@@ -9154,26 +9694,26 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1469:
-	adrp	x1, .LANCHOR21
-	add	x1, x1, :lo12:.LANCHOR21
+.L1622:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1467
-.L1471:
-	strb	wzr, [x25, #:lo12:.LANCHOR36]
+	b	.L1620
+.L1624:
+	strb	wzr, [x25, #:lo12:.LANCHOR42]
 	mov	w4, w24
 	mov	x3, x23
 	mov	x2, x22
 	mov	w1, w19
 	mov	w0, w20
 	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR36]
+	strb	w27, [x25, #:lo12:.LANCHOR42]
 	cmn	w0, #1
-	beq	.L1474
-.L1492:
+	beq	.L1627
+.L1645:
 	mov	w21, w0
-.L1463:
+.L1617:
 	mov	w0, w21
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -9182,7 +9722,7 @@ flash_read_page_en:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1472:
+.L1625:
 	mov	w5, w24
 	mov	x4, x23
 	mov	x3, x22
@@ -9191,8 +9731,8 @@ flash_read_page_en:
 	mov	w0, w20
 	blr	x6
 	cmn	w0, #1
-	bne	.L1492
-	b	.L1473
+	beq	.L1626
+	b	.L1645
 	.size	flash_read_page_en, .-flash_read_page_en
 	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
@@ -9200,61 +9740,71 @@ flash_read_page_en:
 	.type	flash_get_last_written_page, %function
 flash_get_last_written_page:
 	stp	x29, x30, [sp, -96]!
-	and	w1, w1, 65535
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR121
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR125
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	mov	x22, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR26+26
-	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	ldrh	w25, [x0, #:lo12:.LANCHOR26+26]
+	mov	x24, x2
+	ldrh	w19, [x0, #:lo12:.LANCHOR125]
+	adrp	x0, .LANCHOR32+26
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 65535
+	ldrh	w26, [x0, #:lo12:.LANCHOR32+26]
 	sub	w19, w19, #1
 	sxth	w19, w19
-	mov	w24, w4
-	mov	w0, w21
-	str	x27, [sp, 80]
-	mul	w25, w25, w1
-	add	w1, w19, w25
+	stp	x27, x28, [sp, 80]
+	mov	x22, x3
+	mov	w25, w4
+	mov	w0, w23
+	mul	w26, w26, w21
+	add	w1, w19, w26
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1494
-	mov	w26, 0
-	mov	w27, 2
-.L1495:
-	cmp	w26, w19
-	ble	.L1498
-.L1494:
+	bne	.L1647
+	mov	w27, 0
+	mov	w28, 2
+.L1648:
+	cmp	w27, w19
+	ble	.L1651
+.L1647:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1652
+	ldr	w3, [x22]
+	adrp	x0, .LC103
+	mov	w2, w19
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.L1652:
 	mov	w0, w19
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1498:
-	add	w20, w26, w19
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w0, w21
-	sdiv	w20, w20, w27
-	add	w1, w25, w20, sxth
+.L1651:
+	add	w20, w27, w19
+	mov	w4, w25
+	mov	x3, x22
+	mov	x2, x24
+	mov	w0, w23
+	sdiv	w20, w20, w28
+	add	w1, w26, w20, sxth
 	bl	flash_read_page_en
 	cmp	w0, 512
-	bne	.L1496
+	bne	.L1649
 	sub	w19, w20, #1
 	sxth	w19, w19
-	b	.L1495
-.L1496:
+	b	.L1648
+.L1649:
 	add	w20, w20, 1
-	sxth	w26, w20
-	b	.L1495
+	sxth	w27, w20
+	b	.L1648
 	.size	flash_get_last_written_page, .-flash_get_last_written_page
 	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
@@ -9282,147 +9832,158 @@ flash_get_last_written_page_ext:
 	.type	flash_info_blk_init, %function
 flash_info_blk_init:
 	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR20
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR20
 	stp	x23, x24, [sp, 48]
-	mov	w24, 21321
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR140
-	stp	x27, x28, [sp, 80]
-	mov	x21, x26
-	add	x27, x22, :lo12:.LANCHOR20
-	stp	x19, x20, [sp, 16]
-	movk	w24, 0x5359, lsl 16
+	str	x27, [sp, 80]
+	tbz	x0, 12, .L1659
+	ldr	x4, [x20, #:lo12:.LANCHOR20]
+	adrp	x2, .LANCHOR146
+	adrp	x0, .LC104
+	mov	w3, 2048
+	add	x2, x2, :lo12:.LANCHOR146
+	mov	w1, 49
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+.L1659:
+	adrp	x21, .LANCHOR147
+	adrp	x23, .LANCHOR26
+	mov	w24, 21321
+	add	x26, x23, :lo12:.LANCHOR26
+	mov	x22, x21
 	mov	w19, 4
-.L1504:
-	ldrh	w1, [x27]
-	adrp	x20, .LANCHOR12
-	ldr	x3, [x26, #:lo12:.LANCHOR140]
+	movk	w24, 0x5359, lsl 16
+.L1662:
+	ldrh	w1, [x26]
 	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	ldr	x3, [x21, #:lo12:.LANCHOR147]
 	mov	w0, 0
-	add	x28, x26, :lo12:.LANCHOR140
-	add	x25, x20, :lo12:.LANCHOR12
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	add	x27, x21, :lo12:.LANCHOR147
+	add	x25, x20, :lo12:.LANCHOR20
 	mul	w1, w1, w19
-	mov	x23, x20
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1502
-	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	beq	.L1660
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x2]
 	cmp	w0, w24
-	beq	.L1503
-.L1502:
+	beq	.L1661
+.L1660:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1504
-.L1525:
+	bne	.L1662
+.L1686:
 	mov	w0, -1
-.L1501:
+.L1658:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
+	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1512:
+.L1670:
 	ldr	x0, [x25]
 	ldr	w1, [x0]
 	cmp	w1, w24
-	bne	.L1513
+	bne	.L1671
 	ldr	w19, [x0, 4]
-.L1506:
-	add	x24, x20, :lo12:.LANCHOR141
-	ldrh	w0, [x22, #:lo12:.LANCHOR20]
-	ldr	x3, [x21, #:lo12:.LANCHOR140]
+.L1664:
+	add	x24, x21, :lo12:.LANCHOR148
+	ldrh	w0, [x23, #:lo12:.LANCHOR26]
+	ldr	x3, [x22, #:lo12:.LANCHOR147]
 	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	ldrb	w1, [x24, 1]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1507
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	beq	.L1665
+	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	mov	w1, 21321
 	movk	w1, 0x5359, lsl 16
 	ldr	w2, [x0]
 	cmp	w2, w1
-	bne	.L1507
+	bne	.L1665
 	ldr	w1, [x0, 4]
 	cmp	w19, w1
-	bcs	.L1507
+	bcs	.L1665
 	ldrb	w1, [x0, 37]
 	ldrb	w0, [x0, 36]
-	strb	w1, [x20, #:lo12:.LANCHOR141]
+	strb	w1, [x21, #:lo12:.LANCHOR148]
 	strb	w0, [x24, 1]
-.L1507:
-	ldrb	w1, [x20, #:lo12:.LANCHOR141]
-	add	x24, x20, :lo12:.LANCHOR141
-	ldr	x3, [x21, #:lo12:.LANCHOR140]
+.L1665:
+	ldrb	w1, [x21, #:lo12:.LANCHOR148]
+	add	x24, x21, :lo12:.LANCHOR148
+	ldr	x3, [x22, #:lo12:.LANCHOR147]
 	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w0, 0
 	bl	flash_get_last_written_page
 	sxth	w19, w0
 	add	w0, w0, 1
-	ldrb	w20, [x20, #:lo12:.LANCHOR141]
+	ldrb	w21, [x21, #:lo12:.LANCHOR148]
 	strh	w0, [x24, 2]
-	ldrh	w0, [x22, #:lo12:.LANCHOR20]
-	mov	w22, 21321
-	movk	w22, 0x5359, lsl 16
-	madd	w20, w20, w0, w19
-.L1508:
-	tbz	w19, #31, .L1510
+	ldrh	w0, [x23, #:lo12:.LANCHOR26]
+	mov	w23, 21321
+	movk	w23, 0x5359, lsl 16
+	madd	w21, w21, w0, w19
+.L1666:
+	tbz	w19, #31, .L1668
 	cmn	w19, #1
-	bne	.L1511
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	bne	.L1669
+	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w1, [x0]
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
 	bl	printf
-	b	.L1525
-.L1510:
-	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	b	.L1686
+.L1668:
+	ldr	x3, [x22, #:lo12:.LANCHOR147]
 	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR12]
-	mov	w1, w20
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
+	mov	w1, w21
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	beq	.L1509
-	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	beq	.L1667
+	ldr	x0, [x20, #:lo12:.LANCHOR20]
 	ldr	w0, [x0]
-	cmp	w0, w22
-	bne	.L1509
-.L1511:
+	cmp	w0, w23
+	bne	.L1667
+.L1669:
 	mov	w0, 0
-	b	.L1501
-.L1509:
+	b	.L1658
+.L1667:
 	sub	w19, w19, #1
-	sub	w20, w20, #1
+	sub	w21, w21, #1
 	sxth	w19, w19
-	b	.L1508
-.L1503:
-	adrp	x20, .LANCHOR141
-	add	x1, x20, :lo12:.LANCHOR141
+	b	.L1666
+.L1661:
+	adrp	x21, .LANCHOR148
+	add	x1, x21, :lo12:.LANCHOR148
 	ldrb	w3, [x2, 37]
 	mov	w4, 4
 	ldrb	w0, [x2, 36]
 	strb	w3, [x1, 1]
-	ldrh	w1, [x27]
-	ldr	x3, [x28]
-	strb	w0, [x20, #:lo12:.LANCHOR141]
+	ldrh	w1, [x26]
+	ldr	x3, [x27]
+	strb	w0, [x21, #:lo12:.LANCHOR148]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_read_page_en
 	cmn	w0, #1
-	bne	.L1512
-.L1513:
+	bne	.L1670
+.L1671:
 	mov	w19, 0
-	b	.L1506
+	b	.L1664
 	.size	flash_info_blk_init, .-flash_info_blk_init
 	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
@@ -9432,44 +9993,44 @@ flash_ddr_para_scan:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR32
+	adrp	x20, .LANCHOR39
 	stp	x21, x22, [sp, 32]
 	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR32]
-	adrp	x19, .LANCHOR42
+	ldrb	w0, [x20, #:lo12:.LANCHOR39]
+	adrp	x19, .LANCHOR14
 	stp	x23, x24, [sp, 48]
 	mov	w21, 1
 	mov	w23, w1
 	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR42]
-	adrp	x24, .LANCHOR143
+	strb	w21, [x19, #:lo12:.LANCHOR14]
+	adrp	x24, .LANCHOR150
 	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR142
-	ldrb	w0, [x20, #:lo12:.LANCHOR32]
+	adrp	x25, .LANCHOR149
+	ldrb	w0, [x20, #:lo12:.LANCHOR39]
 	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	ldr	x3, [x25, #:lo12:.LANCHOR149]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	ldr	x2, [x24, #:lo12:.LANCHOR150]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	ldr	x3, [x25, #:lo12:.LANCHOR149]
 	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	ldr	x2, [x24, #:lo12:.LANCHOR150]
 	mov	w1, w23
 	mov	w0, w22
 	bl	flash_read_page
 	cmn	w0, #1
 	mov	x0, x19
-	bne	.L1527
-	ldrb	w1, [x20, #:lo12:.LANCHOR32]
-	tbz	x1, 0, .L1527
+	bne	.L1688
+	ldrb	w1, [x20, #:lo12:.LANCHOR39]
+	tbz	x1, 0, .L1688
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, w21
 	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
-.L1528:
+	strb	wzr, [x19, #:lo12:.LANCHOR14]
+.L1689:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -9477,10 +10038,10 @@ flash_ddr_para_scan:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1527:
+.L1688:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR42]
-	b	.L1528
+	strb	w1, [x0, #:lo12:.LANCHOR14]
+	b	.L1689
 	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
 	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
@@ -9489,107 +10050,116 @@ flash_ddr_para_scan:
 flash_complete_page_read:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 2097151
 	stp	x23, x24, [sp, 48]
 	mov	w23, w0
-	adrp	x0, .LANCHOR15
-	stp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR12
 	stp	x21, x22, [sp, 32]
-	mov	x24, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	ubfx	x1, x23, 21, 3
 	stp	x25, x26, [sp, 64]
+	ubfx	x20, x23, 21, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	x24, x1
 	stp	x27, x28, [sp, 80]
-	cmp	w0, w1
-	bhi	.L1534
-	adrp	x1, .LANCHOR144
+	mov	x25, x2
+	ubfx	x21, x23, 24, 2
+	cmp	w0, w20
+	bhi	.L1695
+	adrp	x1, .LANCHOR151
 	adrp	x0, .LC0
-	mov	w2, 812
-	add	x1, x1, :lo12:.LANCHOR144
+	mov	w2, 789
+	add	x1, x1, :lo12:.LANCHOR151
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1535:
-	b	.L1535
-.L1534:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	ubfx	x21, x23, 24, 2
-	mov	x25, x2
-	and	w19, w23, 2097151
-	ldrb	w22, [x0, w1, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x4, [x0, #:lo12:.LANCHOR13]
+.L1695:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w22, [x0, w20, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x4, [x0, #:lo12:.LANCHOR21]
 	mov	w0, w22
 	bl	nandc_cs
-	cbnz	w21, .L1536
-	adrp	x0, .LANCHOR18
-	adrp	x1, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1537
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
-	cbz	w0, .L1536
-.L1537:
-	adrp	x0, .LANCHOR20
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	cbnz	w21, .L1696
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1697
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L1696
+.L1697:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1538
+	cbz	w1, .L1698
 	add	w19, w0, w19, lsl 1
-.L1536:
+.L1696:
 	ubfiz	x0, x22, 8, 8
 	mov	w1, 5
 	add	x0, x4, x0
-	adrp	x20, .LANCHOR26
-	add	x28, x20, :lo12:.LANCHOR26
-	mov	x4, x25
-	mov	x3, x24
 	str	w1, [x0, 2056]
 	and	w1, w19, 255
 	str	wzr, [x0, 2052]
 	str	wzr, [x0, 2052]
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 8
-	ldrb	w2, [x28, 9]
 	str	w1, [x0, 2052]
 	lsr	w1, w19, 16
 	str	w1, [x0, 2052]
 	mov	w1, 224
 	str	w1, [x0, 2056]
+	adrp	x0, .LANCHOR9
+	ldr	x0, [x0, #:lo12:.LANCHOR9]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1699
+	cbz	w21, .L1699
+	sub	w0, w21, #1
+	add	w1, w19, w19, lsl 1
+	add	w0, w0, w1
+.L1732:
+	adrp	x20, .LANCHOR32
+	add	x28, x20, :lo12:.LANCHOR32
+	bl	nandc_set_seed
+	mov	x4, x25
+	mov	x3, x24
+	ldrb	w2, [x28, 9]
 	mov	w1, 0
 	mov	w0, w22
 	bl	nandc_xfer
 	cmn	w0, #1
-	bne	.L1539
-	adrp	x26, .LANCHOR36
-	ldrb	w27, [x26, #:lo12:.LANCHOR36]
-	cbz	w27, .L1540
+	bne	.L1701
+	adrp	x26, .LANCHOR42
+	ldrb	w27, [x26, #:lo12:.LANCHOR42]
+	cbz	w27, .L1702
 	ldrb	w4, [x28, 9]
 	mov	x3, x25
-	strb	wzr, [x26, #:lo12:.LANCHOR36]
+	strb	wzr, [x26, #:lo12:.LANCHOR42]
 	mov	x2, x24
 	orr	w1, w19, w21, lsl 24
 	mov	w0, w22
 	bl	flash_read_page
-	strb	w27, [x26, #:lo12:.LANCHOR36]
-	cbnz	w21, .L1541
-.L1546:
-	adrp	x1, .LANCHOR18
-	ldrb	w1, [x1, #:lo12:.LANCHOR18]
-	cbz	w1, .L1541
-	adrp	x1, .LANCHOR34
-	ldrb	w1, [x1, #:lo12:.LANCHOR34]
+	strb	w27, [x26, #:lo12:.LANCHOR42]
+	cbnz	w21, .L1703
+.L1708:
+	adrp	x1, .LANCHOR11
+	ldrb	w1, [x1, #:lo12:.LANCHOR11]
+	cbz	w1, .L1703
+	adrp	x1, .LANCHOR40
+	ldrb	w1, [x1, #:lo12:.LANCHOR40]
 	add	w1, w1, w1, lsl 1
 	cmp	w0, w1, lsr 2
-	blt	.L1541
-	add	x20, x20, :lo12:.LANCHOR26
+	blt	.L1703
+	add	x20, x20, :lo12:.LANCHOR32
 	ldrb	w1, [x20, 19]
 	sub	w1, w1, #4
 	and	w1, w1, 255
 	cmp	w1, 3
 	mov	w1, 256
 	csel	w0, w0, w1, hi
-.L1533:
+.L1694:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9597,35 +10167,38 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1538:
-	adrp	x1, .LANCHOR21
-	add	x1, x1, :lo12:.LANCHOR21
+.L1698:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-	b	.L1536
-.L1541:
-	cmn	w0, #1
-	bne	.L1533
-.L1547:
-	adrp	x0, .LANCHOR139
-	ldr	x6, [x0, #:lo12:.LANCHOR139]
-	cbnz	x6, .L1543
-.L1545:
-	adrp	x0, .LANCHOR36
+	b	.L1696
+.L1699:
+	mov	w0, w19
+	b	.L1732
+.L1703:
+	cmn	w0, #1
+	bne	.L1694
+.L1709:
+	adrp	x0, .LANCHOR145
+	ldr	x6, [x0, #:lo12:.LANCHOR145]
+	cbnz	x6, .L1705
+.L1707:
+	adrp	x0, .LANCHOR42
 	mov	w3, -1
 	mov	w2, w23
 	mov	w1, 0
-	ldrb	w4, [x0, #:lo12:.LANCHOR36]
-	adrp	x0, .LC63
-	add	x0, x0, :lo12:.LC63
+	ldrb	w4, [x0, #:lo12:.LANCHOR42]
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
 	bl	printf
-	adrp	x0, .LANCHOR42
-	ldrb	w0, [x0, #:lo12:.LANCHOR42]
-	cbnz	w0, .L1544
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cbnz	w0, .L1706
 	mov	w0, -1
-	b	.L1533
-.L1543:
-	add	x0, x20, :lo12:.LANCHOR26
+	b	.L1694
+.L1705:
+	add	x0, x20, :lo12:.LANCHOR32
 	mov	x4, x25
 	mov	x3, x24
 	mov	w2, w19
@@ -9634,10 +10207,10 @@ flash_complete_page_read:
 	mov	w0, w22
 	blr	x6
 	cmn	w0, #1
-	beq	.L1545
-	b	.L1533
-.L1544:
-	add	x20, x20, :lo12:.LANCHOR26
+	beq	.L1707
+	b	.L1694
+.L1706:
+	add	x20, x20, :lo12:.LANCHOR32
 	orr	w1, w19, w21, lsl 24
 	mov	x3, x25
 	mov	x2, x24
@@ -9650,67 +10223,67 @@ flash_complete_page_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	b	flash_ddr_tunning_read
-.L1539:
-	cbnz	w21, .L1533
-	b	.L1546
-.L1540:
-	cbz	w21, .L1546
-	b	.L1547
+.L1702:
+	cbz	w21, .L1708
+	b	.L1709
+.L1701:
+	cbnz	w21, .L1694
+	b	.L1708
 	.size	flash_complete_page_read, .-flash_complete_page_read
 	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
 	.type	queue_wait_first_req_completed, %function
 queue_wait_first_req_completed:
 	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR114]
+	ldrb	w0, [x0, #:lo12:.LANCHOR117]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	cmp	w0, 255
-	bne	.L1568
-.L1586:
+	bne	.L1734
+.L1752:
 	mov	w21, 0
-	b	.L1567
-.L1568:
-	adrp	x19, .LANCHOR43
+	b	.L1733
+.L1734:
+	adrp	x19, .LANCHOR46
 	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR43
+	add	x1, x19, :lo12:.LANCHOR46
 	add	x1, x1, x22, lsl 6
 	ldrb	w2, [x1, 58]
 	ldr	w21, [x1, 40]
 	sub	w3, w2, #1
 	cmp	w3, 9
-	bhi	.L1586
-	adrp	x1, .L1571
-	add	x1, x1, :lo12:.L1571
+	bhi	.L1752
+	adrp	x1, .L1737
+	add	x1, x1, :lo12:.L1737
 	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1571
+	adr	x3, .Lrtx1737
 	add	x1, x3, w1, sxtb #2
 	br	x1
-.Lrtx1571:
+.Lrtx1737:
 	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
 	.align	0
 	.align	2
-.L1571:
-	.byte	(.L1570 - .Lrtx1571) / 4
-	.byte	(.L1570 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1573 - .Lrtx1571) / 4
-	.byte	(.L1574 - .Lrtx1571) / 4
-	.byte	(.L1575 - .Lrtx1571) / 4
-	.byte	(.L1572 - .Lrtx1571) / 4
-	.byte	(.L1575 - .Lrtx1571) / 4
+.L1737:
+	.byte	(.L1736 - .Lrtx1737) / 4
+	.byte	(.L1736 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1739 - .Lrtx1737) / 4
+	.byte	(.L1740 - .Lrtx1737) / 4
+	.byte	(.L1741 - .Lrtx1737) / 4
+	.byte	(.L1738 - .Lrtx1737) / 4
+	.byte	(.L1741 - .Lrtx1737) / 4
 	.section	.text.queue_wait_first_req_completed
-.L1570:
+.L1736:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x0, 6, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	ldp	x1, x0, [x19, 8]
 	ldr	x2, [x19, 24]
@@ -9724,128 +10297,128 @@ queue_wait_first_req_completed:
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-	b	.L1586
-.L1572:
+	b	.L1752
+.L1738:
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 6, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x21, 6, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	mov	w0, 5
 	add	x19, x19, x22, lsl 6
 	tst	w21, w0
-	beq	.L1585
+	beq	.L1751
 	ldrb	w1, [x19, 1]
 	mov	w0, 11
 	ldr	w3, [x19, 40]
 	mov	w4, 11
 	ldr	w2, [x19, 52]
 	strb	w0, [x19, 58]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
 	bl	printf
-.L1604:
+.L1770:
 	mov	w0, -1
 	str	w0, [x19, 52]
-	b	.L1567
-.L1575:
+	b	.L1733
+.L1741:
 	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR43
+	add	x20, x19, :lo12:.LANCHOR46
 	ubfiz	x0, x0, 6, 8
 	mov	w1, 3
 	mov	w2, 9
 	add	x0, x20, x0
 	csel	w2, w2, w1, eq
 	ubfx	x3, x21, 21, 3
-.L1580:
+.L1746:
 	ldrb	w1, [x0]
 	cmp	w1, 255
-	bne	.L1584
+	bne	.L1750
 	mov	w21, -1
-	b	.L1567
-.L1584:
+	b	.L1733
+.L1750:
 	sxtw	x23, w1
 	ubfiz	x0, x1, 6, 8
 	add	x1, x20, x23, lsl 6
 	add	x0, x20, x0
 	ldrb	w4, [x1, 58]
 	cmp	w4, w2
-	bne	.L1580
+	bne	.L1746
 	ldr	w1, [x1, 40]
 	ubfx	x1, x1, 21, 3
 	cmp	w3, w1
-	bne	.L1580
+	bne	.L1746
 	mov	w0, w21
 	mov	w1, 64
 	bl	flash_wait_device_ready
 	mov	w24, w0
 	and	w21, w0, 64
-	tbz	x24, 6, .L1582
+	tbz	x24, 6, .L1748
 	add	x20, x20, x22, lsl 6
 	ands	w21, w0, 15
-	beq	.L1583
+	beq	.L1749
 	ldrb	w1, [x20, 1]
 	mov	w4, 11
 	ldr	w3, [x20, 40]
-	adrp	x0, .LC64
+	adrp	x0, .LC107
 	ldr	w2, [x20, 52]
-	add	x0, x0, :lo12:.LC64
+	add	x0, x0, :lo12:.LC107
 	mov	w21, w24
 	bl	printf
 	mov	w0, 11
 	strb	w0, [x20, 58]
 	mov	w0, -1
 	str	w0, [x20, 52]
-.L1582:
-	add	x1, x19, :lo12:.LANCHOR43
+.L1748:
+	add	x1, x19, :lo12:.LANCHOR46
 	add	x22, x1, x22, lsl 6
 	add	x1, x1, x23, lsl 6
 	ldrb	w0, [x22, 58]
 	strb	w0, [x1, 58]
 	ldr	w0, [x22, 52]
 	str	w0, [x1, 52]
-.L1567:
+.L1733:
 	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1583:
+.L1749:
 	mov	w0, 12
 	str	wzr, [x20, 52]
 	strb	w0, [x20, 58]
-	b	.L1582
-.L1573:
+	b	.L1748
+.L1739:
 	mov	w0, w21
 	mov	w1, 32
 	bl	flash_wait_device_ready
 	mov	w21, w0
-	tbz	x21, 5, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x21, 5, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	tst	x21, 15
 	add	x19, x19, x22, lsl 6
-	beq	.L1585
+	beq	.L1751
 	mov	w0, 11
 	strb	w0, [x19, 58]
-	b	.L1604
-.L1585:
+	b	.L1770
+.L1751:
 	mov	w0, 12
 	str	wzr, [x19, 52]
 	strb	w0, [x19, 58]
-	b	.L1586
-.L1574:
+	b	.L1752
+.L1740:
 	mov	w1, 64
 	mov	w0, w21
 	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1586
-	add	x19, x19, :lo12:.LANCHOR43
+	tbz	x0, 6, .L1752
+	add	x19, x19, :lo12:.LANCHOR46
 	add	x19, x19, x22, lsl 6
 	str	w0, [x19, 52]
 	mov	w0, 6
 	strb	w0, [x19, 58]
-	b	.L1586
+	b	.L1752
 	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
 	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
@@ -9855,19 +10428,19 @@ sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR114
-	add	x19, x19, :lo12:.LANCHOR114
-.L1606:
+	adrp	x19, .LANCHOR117
+	add	x19, x19, :lo12:.LANCHOR117
+.L1772:
 	ldrb	w0, [x19]
 	cmp	w0, 255
-	bne	.L1607
+	bne	.L1773
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1607:
+.L1773:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1606
+	b	.L1772
 	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
 	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
@@ -9926,49 +10499,49 @@ ftl_read_ppa_page:
 	.type	ftl_open_sblk_read_test, %function
 ftl_open_sblk_read_test:
 	stp	x29, x30, [sp, -96]!
-	and	w13, w0, 65535
-	mov	w0, w13
+	and	w14, w0, 65535
+	mov	w0, w14
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	adrp	x23, .LANCHOR80
-	adrp	x24, .LANCHOR52
+	adrp	x24, .LANCHOR114
 	add	x23, x23, :lo12:.LANCHOR80
-	add	x24, x24, :lo12:.LANCHOR52
+	add	x24, x24, :lo12:.LANCHOR114
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	x1, x29, 80
 	mov	w20, 0
 	bl	ftl_get_blk_list_in_sblk
 	strb	w0, [x29, 73]
-	strh	w13, [x29, 64]
-.L1614:
+	strh	w14, [x29, 64]
+.L1780:
 	ldrh	w0, [x23]
 	cmp	w0, w20
-	bls	.L1613
+	bls	.L1779
 	adrp	x22, .LANCHOR72
-	adrp	x21, .LANCHOR145
+	adrp	x21, .LANCHOR152
 	mov	w19, 0
 	add	x22, x22, :lo12:.LANCHOR72
-	add	x21, x21, :lo12:.LANCHOR145
-	b	.L1616
-.L1619:
+	add	x21, x21, :lo12:.LANCHOR152
+	b	.L1782
+.L1785:
 	add	x0, x29, 64
 	mov	w1, 65535
 	add	x0, x0, x19, sxtw 1
 	ldrh	w0, [x0, 16]
 	cmp	w0, w1
-	bne	.L1615
-.L1618:
+	bne	.L1781
+.L1784:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-.L1616:
+.L1782:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L1619
+	bhi	.L1785
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1614
-.L1615:
+	b	.L1780
+.L1781:
 	adrp	x1, .LANCHOR99
 	ldrb	w3, [x24]
 	mov	x2, x21
@@ -9978,8 +10551,8 @@ ftl_open_sblk_read_test:
 	madd	w0, w4, w0, w20
 	bl	ftl_read_ppa_page
 	cmp	w0, 512
-	bne	.L1618
-.L1613:
+	bne	.L1784
+.L1779:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -9999,19 +10572,19 @@ sblk_read_page:
 	mov	w22, w21
 	stp	x23, x24, [sp, 48]
 	mov	x20, x0
-	adrp	x23, .LANCHOR114
-	adrp	x24, .LANCHOR43
+	adrp	x23, .LANCHOR117
+	adrp	x24, .LANCHOR46
 	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR114
-	add	x24, x24, :lo12:.LANCHOR43
+	add	x23, x23, :lo12:.LANCHOR117
+	add	x24, x24, :lo12:.LANCHOR46
 	stp	x25, x26, [sp, 64]
-.L1625:
-	cbnz	w22, .L1629
-.L1637:
-	adrp	x19, .LANCHOR43
-	add	x19, x19, :lo12:.LANCHOR43
-.L1630:
-	cbnz	w21, .L1633
+.L1791:
+	cbnz	w22, .L1795
+.L1803:
+	adrp	x19, .LANCHOR46
+	add	x19, x19, :lo12:.LANCHOR46
+.L1796:
+	cbnz	w21, .L1799
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -10019,14 +10592,14 @@ sblk_read_page:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L1629:
+.L1795:
 	ldrb	w25, [x19]
 	ldr	w26, [x19, 40]
-.L1626:
+.L1792:
 	mov	w1, 0
 	mov	w0, w26
 	bl	queue_lun_state
-	cbnz	w0, .L1627
+	cbnz	w0, .L1793
 	ldr	w1, [x19, 40]
 	mov	w0, 48
 	bl	flash_start_page_read
@@ -10039,26 +10612,26 @@ sblk_read_page:
 	mov	x0, x23
 	bl	buf_add_tail
 	subs	w22, w22, #1
-	beq	.L1637
+	beq	.L1803
 	ubfiz	x19, x25, 6, 8
 	add	x19, x24, x19
-	b	.L1625
-.L1627:
+	b	.L1791
+.L1793:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1626
-.L1633:
+	b	.L1792
+.L1799:
 	ldrb	w0, [x20, 58]
 	cmp	w0, 12
-	bne	.L1631
+	bne	.L1797
 	ldrb	w20, [x20]
 	sub	w21, w21, #1
 	add	x20, x19, x20, lsl 6
-	b	.L1630
-.L1631:
+	b	.L1796
+.L1797:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1630
+	b	.L1796
 	.size	sblk_read_page, .-sblk_read_page
 	.section	.text.gc_check_data_one_wl,"ax",@progbits
 	.align	2
@@ -10071,105 +10644,103 @@ gc_check_data_one_wl:
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
 	adrp	x19, .LANCHOR63
+	add	x20, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 48]
-	add	x21, x19, :lo12:.LANCHOR63
-	ldr	x20, [x0, #:lo12:.LANCHOR5]
+	ldr	x21, [x0, #:lo12:.LANCHOR5]
 	stp	x23, x24, [sp, 64]
-	ldr	x0, [x21, 8]
+	ldr	x0, [x20, 8]
 	stp	x25, x26, [sp, 80]
 	str	x27, [sp, 96]
-	cbnz	x0, .L1640
+	cbnz	x0, .L1806
 	mov	w0, 1
 	bl	buf_alloc
-	str	x0, [x21, 8]
-.L1640:
+	str	x0, [x20, 8]
+.L1806:
 	add	x0, x19, :lo12:.LANCHOR63
-	ldr	x21, [x0, 8]
-	cbz	x21, .L1641
+	ldr	x20, [x0, 8]
+	cbnz	x20, .L1807
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC0
+	mov	w2, 348
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1807:
 	adrp	x26, .LANCHOR99
 	adrp	x27, .LANCHOR67
-	add	x25, x20, 96
+	add	x25, x21, 96
 	add	x26, x26, :lo12:.LANCHOR99
 	add	x27, x27, :lo12:.LANCHOR67
 	mov	w24, 0
-.L1642:
-	ldrb	w0, [x20, 89]
+.L1808:
+	ldrb	w0, [x21, 89]
 	cmp	w24, w0
-	bge	.L1652
+	bge	.L1817
 	mov	w23, 1
 	add	x22, x19, :lo12:.LANCHOR63
-	b	.L1653
-.L1641:
-	adrp	x1, .LANCHOR146
-	adrp	x0, .LC0
-	mov	w2, 348
-	add	x1, x1, :lo12:.LANCHOR146
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1643:
-	b	.L1643
-.L1651:
+	b	.L1818
+.L1816:
 	ldrh	w0, [x25]
 	ldrh	w1, [x26]
 	ldrb	w2, [x27]
 	cmp	w2, 3
 	mul	w1, w0, w1
 	ldrh	w0, [x22, 16]
-	bne	.L1644
+	bne	.L1809
 	add	w0, w0, w1
 	orr	w0, w0, w23, lsl 24
-.L1664:
-	str	w0, [x21, 40]
+.L1829:
+	str	w0, [x20, 40]
 	mov	w1, 1
-	mov	x0, x21
+	mov	x0, x20
 	bl	sblk_read_page
-	ldr	w2, [x21, 52]
-	adrp	x1, .LANCHOR131
+	ldr	w2, [x20, 52]
+	adrp	x1, .LANCHOR136
 	cmn	w2, #1
-	beq	.L1647
+	beq	.L1812
 	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR131]
-	ldr	x3, [x21, 24]
+	ldr	x4, [x1, #:lo12:.LANCHOR136]
+	ldr	x3, [x20, 24]
 	lsl	x0, x0, 2
 	ldr	w5, [x4, x0]
 	ldr	w4, [x3, 4]
 	cmp	w5, w4
-	bne	.L1647
-	adrp	x4, .LANCHOR132
-	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	bne	.L1812
+	adrp	x4, .LANCHOR137
+	ldr	x4, [x4, #:lo12:.LANCHOR137]
 	ldr	w4, [x4, x0]
 	ldr	w0, [x3, 8]
 	cmp	w4, w0
-	beq	.L1648
-.L1647:
+	beq	.L1813
+.L1812:
 	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	ldr	x1, [x1, #:lo12:.LANCHOR136]
 	lsl	x0, x0, 2
 	ldr	w3, [x1, x0]
 	cmn	w3, #1
-	beq	.L1648
-	adrp	x1, .LANCHOR29
-	ldr	w1, [x1, #:lo12:.LANCHOR29]
-	tbz	x1, 10, .L1649
-	ldr	x1, [x21, 24]
-	adrp	x4, .LANCHOR132
-	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	beq	.L1813
+	adrp	x1, .LANCHOR7
+	ldr	w1, [x1, #:lo12:.LANCHOR7]
+	tbz	x1, 10, .L1814
+	ldr	x1, [x20, 24]
+	adrp	x4, .LANCHOR137
+	ldr	x4, [x4, #:lo12:.LANCHOR137]
 	ldr	w5, [x1, 12]
 	str	w5, [sp]
 	ldr	w4, [x4, x0]
-	adrp	x0, .LC65
+	adrp	x0, .LC108
 	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC65
+	add	x0, x0, :lo12:.LC108
 	ldr	w7, [x1, 8]
-	ldr	w1, [x21, 40]
+	ldr	w1, [x20, 40]
 	bl	printf
-.L1649:
+.L1814:
 	adrp	x0, .LANCHOR4
-	ldrh	w1, [x20, 80]
+	ldrh	w1, [x21, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
 	mov	w0, -1
-.L1639:
+.L1805:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -10178,37 +10749,37 @@ gc_check_data_one_wl:
 	ldr	x27, [sp, 96]
 	add	sp, sp, 112
 	ret
-.L1644:
+.L1809:
 	cmp	w2, 2
-	bne	.L1646
+	bne	.L1811
 	sub	w0, w0, #1
 	add	w1, w23, w1
 	add	w0, w0, w1
 	orr	w0, w0, 33554432
-	b	.L1664
-.L1646:
+	b	.L1829
+.L1811:
 	add	w0, w0, w1
-	b	.L1664
-.L1648:
+	b	.L1829
+.L1813:
 	ldrh	w0, [x22, 22]
 	add	w23, w23, 1
 	add	w0, w0, 1
 	strh	w0, [x22, 22]
-.L1653:
+.L1818:
 	ldrh	w0, [x22, 20]
 	cmp	w23, w0
-	ble	.L1651
+	ble	.L1816
 	add	w24, w24, 1
 	add	x25, x25, 2
-	b	.L1642
-.L1652:
-.L1650:
+	b	.L1808
+.L1817:
+.L1815:
 	add	x19, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x19, 16]
 	add	w0, w0, 1
 	strh	w0, [x19, 16]
 	mov	w0, 0
-	b	.L1639
+	b	.L1805
 	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
 	.section	.text.flash_prog_page,"ax",@progbits
 	.align	2
@@ -10219,77 +10790,87 @@ flash_prog_page:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	and	w20, w0, 255
-	adrp	x0, .LANCHOR13
-	stp	x23, x24, [sp, 48]
 	stp	x21, x22, [sp, 32]
-	and	x19, x20, 255
-	ldr	x24, [x0, #:lo12:.LANCHOR13]
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR21
+	adrp	x22, .LANCHOR7
 	stp	x25, x26, [sp, 64]
+	ldr	x25, [x0, #:lo12:.LANCHOR21]
 	mov	w21, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	add	x22, x19, 8
-	str	x27, [sp, 80]
-	mov	x25, x2
-	mov	x26, x3
-	add	x22, x24, x22, lsl 8
-	and	w23, w1, 2097151
-	ubfx	x27, x21, 24, 2
-	tbz	x0, 4, .L1666
-	adrp	x0, .LC66
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	and	x19, x20, 255
+	stp	x23, x24, [sp, 48]
+	add	x23, x19, 8
+	stp	x27, x28, [sp, 80]
+	mov	x26, x2
+	mov	x27, x3
+	add	x23, x25, x23, lsl 8
+	and	w24, w1, 2097151
+	ubfx	x28, x21, 24, 2
+	tbz	x0, 4, .L1831
+	adrp	x0, .LC109
 	mov	w3, w4
-	mov	w2, w27
-	add	x0, x0, :lo12:.LC66
+	mov	w2, w28
+	add	x0, x0, :lo12:.LC109
 	bl	printf
-.L1666:
+.L1831:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	hynix_reconfig_rr_para
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w27, .L1667
+	cbnz	w28, .L1832
 	bl	zftl_flash_enter_slc_mode
-.L1668:
-	add	x19, x24, x19, lsl 8
+.L1833:
+	add	x19, x25, x19, lsl 8
 	mov	w0, 128
-	and	w21, w21, 255
 	str	w0, [x19, 2056]
-	lsr	w0, w23, 8
+	and	w0, w21, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
-	str	w21, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w23, 16
+	lsr	w0, w24, 8
 	str	w0, [x19, 2052]
-	mov	w0, w23
+	lsr	w0, w24, 16
+	str	w0, [x19, 2052]
+	mov	w0, w24
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR26+9
-	mov	x3, x26
-	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x27
+	mov	x2, x26
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
 	mov	w0, 16
 	str	w0, [x19, 2056]
 	bl	nandc_wait_flash_ready
-	mov	x0, x22
+	mov	x0, x23
 	bl	flash_read_status
 	mov	w2, w0
 	mov	w0, w20
 	bl	nandc_de_cs
-	ldr	x27, [sp, 80]
-	and	w0, w2, 4
+	and	w19, w2, 4
+	tbz	x2, 2, .L1830
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L1830
+	adrp	x0, .LC110
+	mov	w2, w19
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC110
+	bl	printf
+.L1830:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1667:
+.L1832:
 	bl	zftl_flash_exit_slc_mode
-	b	.L1668
+	b	.L1833
 	.size	flash_prog_page, .-flash_prog_page
 	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
@@ -10303,146 +10884,724 @@ flash_test_blk:
 	stp	x21, x22, [sp, 32]
 	ands	w21, w0, 255
 	str	x23, [sp, 48]
-	bne	.L1674
-	adrp	x0, .LANCHOR147
-	ldrb	w0, [x0, #:lo12:.LANCHOR147]
+	bne	.L1846
+	adrp	x0, .LANCHOR154
+	ldrb	w0, [x0, #:lo12:.LANCHOR154]
 	cmp	w0, w19
-	bhi	.L1678
-.L1674:
-	adrp	x22, .LANCHOR142
-	adrp	x23, .LANCHOR143
+	bhi	.L1850
+.L1846:
+	adrp	x22, .LANCHOR149
+	adrp	x23, .LANCHOR150
 	mov	w2, 32
 	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR142]
+	ldr	x0, [x22, #:lo12:.LANCHOR149]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR143]
+	ldr	x0, [x23, #:lo12:.LANCHOR150]
 	mov	w2, 8
 	mov	w1, 90
 	bl	ftl_memset
-	adrp	x0, .LANCHOR20
-	ldrh	w20, [x0, #:lo12:.LANCHOR20]
+	adrp	x0, .LANCHOR26
+	ldrh	w20, [x0, #:lo12:.LANCHOR26]
 	mov	w0, w21
 	mul	w20, w20, w19
 	mov	w1, w20
 	bl	flash_erase_block
-	cmn	w0, #1
-	beq	.L1676
-	adrp	x19, .LANCHOR26
-	add	x19, x19, :lo12:.LANCHOR26
-	ldr	x3, [x22, #:lo12:.LANCHOR142]
-	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR143]
-	mov	w0, w21
-	ldrb	w4, [x19, 9]
+	cmn	w0, #1
+	beq	.L1848
+	adrp	x19, .LANCHOR32
+	add	x19, x19, :lo12:.LANCHOR32
+	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	mov	w1, w20
+	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	mov	w0, w21
+	ldrb	w4, [x19, 9]
+	bl	flash_prog_page
+	cmn	w0, #1
+	beq	.L1848
+	ldrb	w4, [x19, 9]
+	mov	w1, w20
+	ldr	x3, [x22, #:lo12:.LANCHOR149]
+	mov	w0, w21
+	ldr	x2, [x23, #:lo12:.LANCHOR150]
+	bl	flash_read_page
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L1848
+	ldr	x0, [x23, #:lo12:.LANCHOR150]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	bne	.L1848
+	ldr	x0, [x22, #:lo12:.LANCHOR149]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	beq	.L1849
+.L1848:
+	mov	w19, -1
+.L1849:
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_erase_block
+	mov	w0, w19
+.L1845:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1850:
+	mov	w0, 0
+	b	.L1845
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.id_block_prog_msb_ff_data,"ax",@progbits
+	.align	2
+	.global	id_block_prog_msb_ff_data
+	.type	id_block_prog_msb_ff_data, %function
+id_block_prog_msb_ff_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR155
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR155]
+	str	x25, [sp, 64]
+	cbnz	w0, .L1861
+	adrp	x20, .LANCHOR32
+	add	x20, x20, :lo12:.LANCHOR32
+	ldrb	w0, [x20, 19]
+	sub	w0, w0, #5
+	and	w3, w0, 255
+	cmp	w3, 63
+	bhi	.L1861
+	and	w19, w2, 65535
+	mov	x2, 16391
+	movk	x2, 0x4000, lsl 16
+	movk	x2, 0x8000, lsl 48
+	lsr	x0, x2, x3
+	tbz	x0, 0, .L1861
+	adrp	x21, .LANCHOR123
+	mov	w23, w1
+	add	x21, x21, :lo12:.LANCHOR123
+	mov	w25, 65535
+	adrp	x24, .LANCHOR140
+.L1863:
+	ldrh	w0, [x20, 10]
+	cmp	w0, w19
+	bhi	.L1864
+.L1861:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1864:
+	ldrh	w0, [x21, w19, sxtw 1]
+	cmp	w0, w25
+	bne	.L1861
+	ldr	x0, [x24, #:lo12:.LANCHOR140]
+	mov	w2, 16384
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x3, [x24, #:lo12:.LANCHOR140]
+	add	w1, w19, w23
+	ldrb	w4, [x20, 9]
+	add	w19, w19, 1
+	mov	x2, x3
+	mov	w0, w22
+	and	w19, w19, 65535
+	bl	flash_prog_page
+	b	.L1863
+	.size	id_block_prog_msb_ff_data, .-id_block_prog_msb_ff_data
+	.section	.text.idb_write_data,"ax",@progbits
+	.align	2
+	.global	idb_write_data
+	.type	idb_write_data, %function
+idb_write_data:
+	stp	x29, x30, [sp, -256]!
+	add	w0, w1, w3
+	mov	w4, w1
+	cmp	w0, 63
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bls	.L1867
+	cmp	w1, 575
+	bhi	.L1868
+	adrp	x0, .LANCHOR156
+	mov	x1, x2
+	mov	w2, 1
+	cmp	w4, 64
+	str	w2, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, idb_buf
+	bhi	.L1869
+	mov	w2, 64
+	sub	w4, w2, w4
+	sub	w2, w3, w4
+	ubfiz	x4, x4, 9, 25
+	lsl	w2, w2, 9
+	add	x1, x1, x4
+	add	x0, x0, :lo12:idb_buf
+.L1945:
+	bl	ftl_memcpy
+.L1924:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 256
+	ret
+.L1869:
+	mov	w2, 576
+	sub	w2, w2, w4
+	cmp	w3, w2
+	sub	w4, w4, #64
+	csel	w2, w3, w2, ls
+	ubfiz	x4, x4, 9, 25
+	add	x0, x0, :lo12:idb_buf
+	lsl	w2, w2, 9
+	add	x0, x0, x4
+	b	.L1945
+.L1867:
+	cmp	w1, 575
+	bls	.L1924
+.L1868:
+	adrp	x0, .LANCHOR156
+	ldr	w0, [x0, #:lo12:.LANCHOR156]
+	cbz	w0, .L1924
+	adrp	x3, .LANCHOR32
+	add	x1, x3, :lo12:.LANCHOR32
+	str	x3, [x29, 176]
+	adrp	x3, idb_buf
+	add	x6, x3, :lo12:idb_buf
+	mov	w4, 4097
+	ldrh	w0, [x1, 10]
+	ldrb	w2, [x1, 9]
+	ldrb	w1, [x1, 12]
+	mul	w2, w0, w2
+	lsl	w0, w0, 2
+	and	w2, w2, 65535
+	str	w2, [x29, 132]
+	sdiv	w27, w0, w1
+	mov	w0, 512
+	adrp	x1, idb_buf+262140
+	add	x1, x1, :lo12:idb_buf+262140
+	mov	w2, 65535
+	cmp	w27, 512
+	csel	w27, w27, w0, lt
+	mov	w0, 0
+.L1874:
+	ldr	w5, [x1]
+	cbnz	w5, .L1872
+	ldr	w5, [x6, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w5, [x1], -4
+	cmp	w0, w4
+	sub	w2, w2, #1
+	csel	w0, w0, wzr, cc
+	cmp	w2, 4096
+	bne	.L1874
+.L1872:
+	add	x0, x3, :lo12:idb_buf
+	mov	w3, w27
+	ldr	w1, [x0, w2, uxtw 2]
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
+	bl	printf
+	stp	wzr, wzr, [x29, 168]
+	adrp	x0, gp_flash_check_buf
+	add	x0, x0, :lo12:gp_flash_check_buf
+	str	x0, [x29, 184]
+.L1908:
+	adrp	x0, gp_flash_check_buf
+	add	x20, x0, :lo12:gp_flash_check_buf
+	mov	w1, 0
+	mov	w2, 512
+	mov	x0, x20
+	bl	ftl_memset
+	adrp	x0, .LANCHOR20
+	ldr	w1, [x29, 172]
+	ldr	x0, [x0, #:lo12:.LANCHOR20]
+	add	x0, x0, x1, uxtw
+	ldrb	w0, [x0, 32]
+	cmp	w0, 255
+	beq	.L1875
+	ldr	w1, [x29, 132]
+	adrp	x19, .LANCHOR42
+	mul	w26, w0, w1
+	ldr	x0, [x29, 176]
+	add	x25, x0, :lo12:.LANCHOR32
+	ldrb	w0, [x19, #:lo12:.LANCHOR42]
+	str	w0, [x29, 128]
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	mov	w0, 0
+	ldrb	w21, [x25, 9]
+	ldrh	w23, [x25, 10]
+	udiv	w1, w26, w21
+	mul	w23, w21, w23
+	and	w22, w23, 65535
+	bl	flash_erase_block
+	udiv	w23, w26, w22
+	msub	w23, w23, w22, w26
+	sub	w24, w26, w23
+	cmp	w26, w24
+	bne	.L1914
+	adrp	x0, .LANCHOR22
+	ldrb	w0, [x0, #:lo12:.LANCHOR22]
+	cmp	w0, 9
+	bne	.L1914
+	mov	w2, 1024
+	mov	w1, 0
+	mov	x0, x20
+	bl	ftl_memset
+	adrp	x1, gp_flash_check_buf
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
+	ldrb	w2, [x25, 12]
+	str	w0, [x1, #:lo12:gp_flash_check_buf]
+	cmp	w21, 8
+	ldrb	w0, [x25, 29]
+	mov	w1, 12
+	strb	w0, [x20, 16]
+	mov	w0, 4
+	strb	w0, [x20, 17]
+	ldrh	w0, [x25, 10]
+	str	w1, [x20, 4]
+	strb	wzr, [x20, 20]
+	str	wzr, [x20, 12]
+	sdiv	w0, w0, w2
+	mov	w2, 16
+	strh	w0, [x20, 18]
+	mov	w0, 70
+	csel	w0, w0, w2, hi
+	ldr	x2, [x29, 184]
+	strb	w0, [x2, 21]
+	adrp	x0, gp_flash_check_buf+12
+	strh	wzr, [x2, 22]
+	add	x0, x0, :lo12:gp_flash_check_buf+12
+	bl	js_hash
+	ldr	x1, [x29, 184]
+	mov	x6, x1
+	str	w0, [x1, 8]
+	sub	w0, w27, #4
+	str	w0, [x29, 164]
+.L1876:
+	adrp	x22, idb_buf
+	adrp	x28, .LANCHOR155
+	add	x22, x22, :lo12:idb_buf
+	add	x0, x28, :lo12:.LANCHOR155
+	adrp	x25, .LANCHOR27
+	str	x0, [x29, 152]
+	mov	w20, 0
+	add	x0, x25, :lo12:.LANCHOR27
+	str	x0, [x29, 144]
+.L1878:
+	cmp	w27, w20
+	bhi	.L1889
+	ldr	x0, [x29, 176]
+	add	x25, x19, :lo12:.LANCHOR42
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	mov	w21, 4
+	add	x0, x0, :lo12:.LANCHOR32
+	mov	w22, 0
+	str	wzr, [x29, 144]
+	ldrb	w1, [x0, 9]
+	ldrh	w28, [x0, 10]
+	uxtw	x0, w1
+	mul	w28, w0, w28
+	and	w28, w28, 65535
+	udiv	w0, w26, w28
+	msub	w28, w0, w28, w26
+	sub	w0, w26, w28
+	stp	w0, w1, [x29, 136]
+	and	w0, w28, 3
+	str	w0, [x29, 152]
+	ldr	w0, [x29, 164]
+	str	w0, [x29, 160]
+	adrp	x0, gp_flash_check_buf
+	add	x20, x0, :lo12:gp_flash_check_buf
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
+	str	x0, [x29, 104]
+.L1890:
+	ldr	w0, [x29, 160]
+	cmp	w22, w0
+	bcc	.L1904
+	adrp	x0, .LANCHOR42
+	ldrb	w1, [x29, 128]
+	adrp	x3, idb_buf
+	add	x3, x3, :lo12:idb_buf
+	strb	w1, [x0, #:lo12:.LANCHOR42]
+	mov	x1, 0
+	ldr	w0, [x29, 164]
+	lsl	w0, w0, 7
+.L1905:
+	mov	w19, w1
+	cmp	w1, w0
+	bcc	.L1906
+	ldr	w0, [x29, 168]
+	add	w0, w0, 1
+	str	w0, [x29, 168]
+	cmp	w0, 5
+	bls	.L1875
+	b	.L1910
+.L1914:
+	mov	x6, 0
+	str	w27, [x29, 164]
+	b	.L1876
+.L1889:
+	ldr	x2, [x29, 152]
+	add	w5, w23, w20
+	lsr	w5, w5, 2
+	add	x0, x25, :lo12:.LANCHOR27
+	add	w1, w5, 1
+	ldrb	w2, [x2]
+	ldrh	w0, [x0, w1, sxtw 1]
+	cbz	w2, .L1880
+	adrp	x0, .LANCHOR25
+	ldrb	w3, [x0, #:lo12:.LANCHOR25]
+	lsl	w0, w1, 1
+	cmp	w3, 0
+	csel	w0, w0, w1, ne
+.L1880:
+	adrp	x1, .LANCHOR22
+	ldrb	w1, [x1, #:lo12:.LANCHOR22]
+	cmp	w1, 9
+	bne	.L1882
+.L1943:
+	str	w0, [x29, 192]
+	mov	w0, 61424
+	str	w0, [x29, 196]
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, w5, sxtw 1]
+	cbnz	w2, .L1884
+	mov	w5, w0
+.L1885:
+	mul	w1, w21, w5
+	adrp	x2, .LANCHOR40
+	adrp	x0, .LANCHOR10
+	cbnz	x6, .L1886
+	ldr	x3, [x29, 176]
+	add	w1, w1, w24
+	ldrb	w7, [x2, #:lo12:.LANCHOR40]
+	add	x3, x3, :lo12:.LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	str	w5, [x29, 140]
+	str	w7, [x29, 160]
+	ldrb	w6, [x3, 9]
+	udiv	w6, w1, w6
+	bl	nandc_bch_sel
+	mov	w1, w6
+	mov	w4, 4
+	add	x3, x29, 192
+	mov	x2, x22
+	mov	w0, 0
+	bl	flash_prog_page
+	ldr	w7, [x29, 160]
+	mov	w0, w7
+	bl	nandc_bch_sel
+	ldrb	w0, [x28, #:lo12:.LANCHOR155]
+	ldr	w5, [x29, 140]
+	cbnz	w0, .L1887
+	udiv	w1, w24, w21
+	add	w2, w5, 1
+	bl	id_block_prog_msb_ff_data
+.L1887:
+	add	x22, x22, 2048
+.L1888:
+	add	w20, w20, 4
+	mov	x6, 0
+	and	w20, w20, 65535
+	b	.L1878
+.L1882:
+	sub	w0, w0, #1
+	lsl	w0, w0, 2
+	b	.L1943
+.L1884:
+	adrp	x0, .LANCHOR25
+	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	lsl	w0, w5, 1
+	cmp	w1, 0
+	csel	w5, w0, w5, ne
+	b	.L1885
+.L1886:
+	ldr	x3, [x29, 176]
+	add	w1, w1, w24
+	ldrb	w7, [x2, #:lo12:.LANCHOR40]
+	add	x3, x3, :lo12:.LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR10]
+	str	w7, [x29, 160]
+	ldrb	w5, [x3, 9]
+	udiv	w5, w1, w5
+	bl	nandc_bch_sel
+	mov	x2, x6
+	mov	w4, 4
+	add	x3, x29, 192
+	mov	w1, w5
+	mov	w0, 0
 	bl	flash_prog_page
+	ldr	w7, [x29, 160]
+	mov	w0, w7
+	bl	nandc_bch_sel
+	b	.L1888
+.L1904:
+	add	w19, w28, w22
+	ldr	w0, [x29, 152]
+	adrp	x1, .LANCHOR155
+	sub	w24, w21, w0
+	ldr	x0, [x29, 104]
+	udiv	w19, w19, w21
+	ldrb	w1, [x1, #:lo12:.LANCHOR155]
+	and	w24, w24, 65535
+	and	w19, w19, 65535
+	ldrh	w0, [x0, w19, sxtw 1]
+	cbnz	w1, .L1891
+	mov	w19, w0
+.L1892:
+	adrp	x0, .LANCHOR10
+	ldr	w1, [x29, 136]
+	ldrb	w23, [x0, #:lo12:.LANCHOR10]
+	ldr	w0, [x29, 152]
+	add	w0, w0, w1
+	ldr	w1, [x29, 140]
+	madd	w19, w1, w19, w0
+	ldr	x0, [x29, 176]
+	add	x0, x0, :lo12:.LANCHOR32
+	ldrb	w0, [x0, 9]
+	udiv	w19, w19, w0
+	adrp	x0, .LANCHOR40
+	ldrb	w0, [x0, #:lo12:.LANCHOR40]
+	str	w0, [x29, 124]
+	mov	w0, w23
+	bl	nandc_bch_sel
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	str	x0, [x29, 112]
+.L1893:
+	mov	w4, w21
+	add	x3, x29, 192
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_read_page
+	mov	w6, w0
 	cmn	w0, #1
-	beq	.L1676
-	ldrb	w4, [x19, 9]
-	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR142]
-	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR143]
+	bne	.L1894
+	ldrb	w5, [x25]
+	cbnz	w5, .L1895
+.L1898:
+	adrp	x0, .LANCHOR145
+	ldr	x7, [x0, #:lo12:.LANCHOR145]
+	cbnz	x7, .L1896
+.L1897:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0]
+	cbz	w0, .L1894
+	mov	w4, w21
+	add	x3, x29, 192
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_ddr_tunning_read
+	b	.L1944
+.L1891:
+	adrp	x0, .LANCHOR25
+	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	lsl	w0, w19, 1
+	cmp	w1, 0
+	csel	w19, w0, w19, ne
+	b	.L1892
+.L1895:
+	str	w5, [x29, 100]
+	mov	w4, w21
+	str	w6, [x29, 120]
+	add	x3, x29, 192
+	strb	wzr, [x25]
+	mov	x2, x20
+	mov	w1, w19
+	mov	w0, 0
 	bl	flash_read_page
-	mov	w19, w0
 	cmn	w0, #1
-	beq	.L1676
-	ldr	x0, [x23, #:lo12:.LANCHOR143]
-	ldr	w1, [x0]
-	mov	w0, 23130
-	movk	w0, 0x5a5a, lsl 16
-	cmp	w1, w0
-	bne	.L1676
-	ldr	x0, [x22, #:lo12:.LANCHOR142]
-	ldr	w1, [x0]
-	mov	w0, 42405
-	movk	w0, 0xa5a5, lsl 16
+	ldr	w5, [x29, 100]
+	strb	w5, [x25]
+	ldr	w6, [x29, 120]
+	beq	.L1898
+.L1944:
+	mov	w6, w0
+.L1894:
+	cmn	w6, #1
+	cset	w3, eq
+	cmp	w23, 16
+	cset	w0, ne
+	tst	w3, w0
+	beq	.L1900
+	mov	w0, 16
+	mov	w23, 16
+	bl	nandc_bch_sel
+	b	.L1893
+.L1896:
+	str	w6, [x29, 120]
+	mov	w5, w21
+	add	x4, x29, 192
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, 0
+	mov	w0, 0
+	blr	x7
+	ldr	w6, [x29, 120]
+	cmn	w0, #1
+	beq	.L1897
+	b	.L1944
+.L1900:
+	ldr	w0, [x29, 124]
+	bl	nandc_bch_sel
+	cmp	w3, 0
+	ldr	w0, [x29, 144]
+	csinv	w0, w0, wzr, eq
+	str	w0, [x29, 144]
+	ldr	w0, [x29, 136]
+	cmp	w22, 0
+	ccmp	w26, w0, 0, eq
+	bne	.L1902
+	ldr	w0, [x29, 144]
+	cbnz	w0, .L1902
+	ldr	w1, [x20]
+	mov	w0, 18766
+	movk	w0, 0x464e, lsl 16
 	cmp	w1, w0
-	beq	.L1677
-.L1676:
-	mov	w19, -1
-.L1677:
-	mov	w1, w20
-	mov	w0, w21
-	bl	flash_erase_block
-	mov	w0, w19
-.L1673:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1678:
+	bne	.L1902
+	ldr	w0, [x29, 160]
+	ldrb	w21, [x20, 17]
+	add	w0, w0, w24
+	str	w0, [x29, 160]
+.L1903:
+	add	w22, w24, w22
+	and	w22, w22, 65535
+	b	.L1890
+.L1902:
+	ubfiz	x0, x24, 9, 16
+	str	wzr, [x29, 152]
+	add	x20, x20, x0
+	b	.L1903
+.L1906:
+	ldr	x4, [x29, 184]
+	lsl	x2, x1, 2
+	add	x1, x1, 1
+	ldr	w4, [x2, x4]
+	ldr	w2, [x3, x2]
+	cmp	w4, w2
+	beq	.L1905
+	ldr	x0, [x29, 184]
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+	mov	w1, w19
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
+	bl	printf
+	mov	w1, w26
 	mov	w0, 0
-	b	.L1673
-	.size	flash_test_blk, .-flash_test_blk
+	bl	flash_erase_block
+.L1875:
+	ldr	w0, [x29, 172]
+	add	w0, w0, 1
+	str	w0, [x29, 172]
+	cmp	w0, 4
+	bne	.L1908
+	ldr	w0, [x29, 168]
+	cbnz	w0, .L1910
+	adrp	x0, .LC113
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC113
+	bl	printf
+.L1910:
+	adrp	x0, .LANCHOR156
+	str	wzr, [x0, #:lo12:.LANCHOR156]
+	b	.L1924
+	.size	idb_write_data, .-idb_write_data
 	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
 	.global	flash_start_tlc_page_prog
 	.type	flash_start_tlc_page_prog, %function
 flash_start_tlc_page_prog:
-	stp	x29, x30, [sp, -48]!
-	and	w8, w0, 255
-	adrp	x0, .LANCHOR15
-	and	w3, w3, 255
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR12
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
-	str	x21, [sp, 32]
-	cmp	w0, w3
-	bhi	.L1690
-	adrp	x1, .LANCHOR148
+	stp	x21, x22, [sp, 32]
+	and	w19, w3, 255
+	stp	x23, x24, [sp, 48]
+	and	w21, w1, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	and	w22, w2, 255
+	mov	w20, w4
+	mov	x23, x5
+	mov	x24, x6
+	cmp	w0, w19
+	bhi	.L1947
+	adrp	x1, .LANCHOR157
 	adrp	x0, .LC0
-	mov	w2, 671
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 648
+	add	x1, x1, :lo12:.LANCHOR157
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1691:
-	b	.L1691
-.L1690:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	and	w7, w1, 255
-	and	w21, w2, 255
-	ldrb	w20, [x0, w3, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x19, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w20
+.L1947:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w26, [x0, w19, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x19, [x0, #:lo12:.LANCHOR21]
+	mov	w0, w26
 	bl	nandc_cs
-	cbz	w8, .L1692
-	sxtw	x0, w20
+	cbz	w25, .L1948
+	sxtw	x0, w26
 	add	x0, x0, 8
 	add	x0, x19, x0, lsl 8
-	str	w8, [x0, 8]
-.L1692:
-	ubfiz	x0, x20, 8, 8
+	str	w25, [x0, 8]
+.L1948:
+	ubfiz	x0, x26, 8, 8
 	add	x19, x19, x0
 	mov	w0, 128
-	str	w7, [x19, 2056]
+	str	w21, [x19, 2056]
 	str	w0, [x19, 2056]
-	and	w0, w4, 255
+	and	w0, w20, 255
 	str	wzr, [x19, 2052]
 	str	wzr, [x19, 2052]
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
+	lsr	w0, w20, 8
 	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
-	add	w4, w4, w4, lsl 1
+	lsr	w0, w20, 16
+	add	w20, w20, w20, lsl 1
 	str	w0, [x19, 2052]
-	sub	w0, w4, #1
-	add	w0, w0, w7
+	sub	w0, w20, #1
+	add	w0, w0, w21
 	bl	nandc_set_seed
-	mov	x3, x6
-	adrp	x0, .LANCHOR26+9
-	mov	x2, x5
-	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x24
+	mov	x2, x23
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	str	w21, [x19, 2056]
-	mov	w0, w20
-	ldr	x21, [sp, 32]
+	mov	w0, w26
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	str	w22, [x19, 2056]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
 	b	nandc_de_cs
 	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
 	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
@@ -10494,8 +11653,8 @@ queue_tlc_prog_cmd:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -10512,21 +11671,21 @@ sblk_tlc_prog_one_page:
 	mov	x19, x0
 	ldr	x0, [x0]
 	ldr	w20, [x0, 40]
-.L1700:
+.L1956:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1701
+	cbnz	w0, .L1957
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L1701:
+.L1957:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1700
+	b	.L1956
 	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
 	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
@@ -10543,13 +11702,13 @@ sblk_xlc_prog_pages:
 	stp	x23, x24, [sp, 48]
 	mov	w24, w2
 	ldr	w20, [x0, 40]
-.L1704:
+.L1960:
 	mov	w1, 1
 	mov	w0, w20
 	bl	queue_lun_state
-	cbnz	w0, .L1705
+	cbnz	w0, .L1961
 	cmp	w24, 2
-	bne	.L1706
+	bne	.L1962
 	ldr	x0, [x19]
 	mov	w2, 17
 	ldr	x1, [x22]
@@ -10626,104 +11785,102 @@ sblk_xlc_prog_pages:
 	strb	w0, [x1, 59]
 	mov	w0, -1
 	strb	w0, [x1]
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	bl	buf_add_tail
-.L1707:
+.L1963:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1705:
+.L1961:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1704
-.L1706:
+	b	.L1960
+.L1962:
 	mov	x0, x19
 	bl	queue_tlc_prog_cmd
-	b	.L1707
+	b	.L1963
 	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
 	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
 	.global	flash_start_page_prog
 	.type	flash_start_page_prog, %function
 flash_start_page_prog:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	str	x25, [sp, 64]
-	mov	w25, w1
-	adrp	x1, .LANCHOR15
-	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR12
 	stp	x23, x24, [sp, 48]
-	and	w22, w0, 255
+	and	w23, w0, 255
 	stp	x19, x20, [sp, 16]
-	mov	x24, x3
-	ldrb	w0, [x1, #:lo12:.LANCHOR15]
-	ubfx	x3, x25, 21, 3
-	cmp	w0, w3
-	bhi	.L1710
-	adrp	x1, .LANCHOR149
+	mov	x24, x2
+	stp	x21, x22, [sp, 32]
+	mov	x25, x3
+	ldrb	w0, [x26, #:lo12:.LANCHOR12]
+	and	w19, w1, 2097151
+	str	x27, [sp, 80]
+	ubfx	x27, x1, 21, 3
+	ubfx	x22, x1, 24, 2
+	cmp	w0, w27
+	bhi	.L1966
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC0
-	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR149
+	mov	w2, 685
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1711:
-	b	.L1711
-.L1710:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	mov	x23, x2
-	and	w19, w25, 2097151
-	ldrb	w21, [x0, w3, sxtw]
-	adrp	x0, .LANCHOR13
-	ldr	x20, [x0, #:lo12:.LANCHOR13]
+.L1966:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w21, [x0, w27, sxtw]
+	adrp	x0, .LANCHOR21
+	ldr	x20, [x0, #:lo12:.LANCHOR21]
 	bl	nandc_rdy_status
-	cbnz	w0, .L1712
-	ldrb	w0, [x1, #:lo12:.LANCHOR15]
+	cbnz	w0, .L1967
+	ldrb	w0, [x26, #:lo12:.LANCHOR12]
 	cmp	w0, 1
-	bne	.L1713
+	bne	.L1968
 	bl	nandc_wait_flash_ready
-.L1712:
+.L1967:
 	mov	w0, w21
 	bl	hynix_reconfig_rr_para
 	mov	w0, w21
 	bl	nandc_cs
-	tst	x25, 50331648
-	bne	.L1714
-	adrp	x0, .LANCHOR18
-	adrp	x1, .LANCHOR19
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1715
-	ldrb	w0, [x1, #:lo12:.LANCHOR19]
-	cbz	w0, .L1716
-.L1715:
-	adrp	x0, .LANCHOR20
-	ldrb	w1, [x1, #:lo12:.LANCHOR19]
-	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	cbnz	w22, .L1969
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1970
+	ldrb	w0, [x1, #:lo12:.LANCHOR25]
+	cbz	w0, .L1971
+.L1970:
+	adrp	x0, .LANCHOR26
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrh	w2, [x0, #:lo12:.LANCHOR26]
 	udiv	w0, w19, w2
 	mul	w0, w0, w2
 	sub	w19, w19, w0
-	cbz	w1, .L1717
+	cbz	w1, .L1972
 	add	w19, w0, w19, lsl 1
-.L1716:
+.L1971:
 	mov	w0, w21
 	bl	zftl_flash_enter_slc_mode
-	b	.L1718
-.L1713:
+	b	.L1973
+.L1968:
 	mov	w2, 64
 	mov	w1, w19
-	mov	w0, w3
+	mov	w0, w27
 	bl	flash_wait_device_ready_raw
-	b	.L1712
-.L1717:
-	adrp	x1, .LANCHOR21
-	add	x1, x1, :lo12:.LANCHOR21
+	b	.L1967
+.L1972:
+	adrp	x1, .LANCHOR27
+	add	x1, x1, :lo12:.LANCHOR27
 	ldrh	w19, [x1, w19, uxtw 1]
 	add	w19, w19, w0
-.L1718:
+.L1973:
 	ubfiz	x0, x21, 8, 8
 	add	x20, x20, x0
 	mov	w0, 128
@@ -10738,25 +11895,26 @@ flash_start_page_prog:
 	str	w0, [x20, 2052]
 	mov	w0, w19
 	bl	nandc_set_seed
-	adrp	x0, .LANCHOR26+9
-	mov	x3, x24
-	mov	x2, x23
-	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	adrp	x0, .LANCHOR32+9
+	mov	x3, x25
+	mov	x2, x24
+	ldrb	w1, [x0, #:lo12:.LANCHOR32+9]
 	mov	w0, 1
 	bl	nandc_xfer_start
 	bl	nandc_xfer_done
-	ldr	x25, [sp, 64]
-	ldp	x23, x24, [sp, 48]
-	str	w22, [x20, 2056]
+	ldr	x27, [sp, 80]
+	ldp	x25, x26, [sp, 64]
 	mov	w0, w21
-	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 80
+	str	w23, [x20, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 96
 	b	nandc_de_cs
-.L1714:
+.L1969:
 	mov	w0, w21
 	bl	zftl_flash_exit_slc_mode
-	b	.L1718
+	b	.L1973
 	.size	flash_start_page_prog, .-flash_start_page_prog
 	.section	.text.queue_prog_cmd,"ax",@progbits
 	.align	2
@@ -10771,27 +11929,27 @@ queue_prog_cmd:
 	mov	x19, x0
 	mov	w0, 16
 	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR114
+	adrp	x0, .LANCHOR117
 	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
 	cmp	w1, 255
-	beq	.L1724
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
+	beq	.L1979
+	adrp	x2, .LANCHOR46
+	add	x2, x2, :lo12:.LANCHOR46
 	ubfx	x3, x3, 21, 3
 	mov	x6, x2
-.L1726:
+.L1981:
 	add	x4, x2, x1, lsl 6
 	ldr	w5, [x4, 40]
 	ubfx	x5, x5, 21, 3
 	cmp	w3, w5
-	bne	.L1725
+	bne	.L1980
 	ldrb	w5, [x4, 58]
 	cmp	w5, 6
-	bne	.L1725
+	bne	.L1980
 	mov	w1, 3
 	strb	w1, [x4, 58]
-.L1724:
+.L1979:
 	mov	w1, 3
 	strb	w1, [x19, 58]
 	mov	w1, 1
@@ -10799,23 +11957,23 @@ queue_prog_cmd:
 	mov	w1, -1
 	strb	w1, [x19]
 	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR117
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	b	buf_add_tail
-.L1725:
+.L1980:
 	lsl	x1, x1, 6
 	ldrb	w1, [x6, x1]
 	cmp	w1, 255
-	bne	.L1726
-	b	.L1724
+	bne	.L1981
+	b	.L1979
 	.size	queue_prog_cmd, .-queue_prog_cmd
 	.section	.text.sblk_prog_page,"ax",@progbits
 	.align	2
 	.global	sblk_prog_page
 	.type	sblk_prog_page, %function
 sblk_prog_page:
-	stp	x29, x30, [sp, -80]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
@@ -10824,121 +11982,121 @@ sblk_prog_page:
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cbz	w0, .L1733
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L1733
+	str	x27, [sp, 80]
+	cbz	w0, .L1988
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L1988
 	ldr	w1, [x19, 40]
-	adrp	x0, .LC67
+	adrp	x0, .LC114
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC67
+	add	x0, x0, :lo12:.LC114
 	bl	printf
-.L1733:
-	adrp	x24, .LANCHOR30
-	adrp	x22, .LANCHOR43
-	add	x24, x24, :lo12:.LANCHOR30
-	add	x22, x22, :lo12:.LANCHOR43
+.L1988:
+	adrp	x25, .LANCHOR36
+	adrp	x23, .LANCHOR46
+	add	x25, x25, :lo12:.LANCHOR36
+	add	x23, x23, :lo12:.LANCHOR46
 	mov	w21, 0
-	mov	w23, 1
-.L1734:
-	cbnz	w20, .L1745
+	mov	w24, 1
+.L1989:
+	cbnz	w20, .L1999
 	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 96
 	ret
-.L1745:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1735:
+.L1999:
+	ldrb	w26, [x19]
+	ldr	w22, [x19, 40]
+.L1990:
 	mov	w1, 1
-	mov	w0, w26
+	mov	w0, w22
 	bl	queue_lun_state
-	cbnz	w0, .L1736
+	cbnz	w0, .L1991
 	cmp	w20, 1
-	beq	.L1737
-	ldrb	w0, [x24]
-	cbnz	w0, .L1738
-.L1737:
+	beq	.L1992
+	ldrb	w0, [x25]
+	cbnz	w0, .L1993
+.L1992:
 	mov	x0, x19
 	bl	queue_prog_cmd
-.L1739:
-	ubfiz	x19, x25, 6, 8
+.L1994:
+	ubfiz	x19, x26, 6, 8
 	sub	w20, w20, #1
-	add	x19, x22, x19
-	b	.L1734
-.L1736:
+	add	x19, x23, x19
+	b	.L1989
+.L1991:
 	bl	queue_wait_first_req_completed
 	bl	queue_remove_completed_req
-	b	.L1735
-.L1738:
+	b	.L1990
+.L1993:
 	ldrb	w0, [x19]
-	ubfx	x1, x26, 21, 3
+	ubfx	x27, x22, 21, 3
 	cmp	w0, 255
-	bne	.L1740
-	adrp	x1, .LANCHOR150
+	bne	.L1995
+	adrp	x1, .LANCHOR159
 	adrp	x0, .LC0
-	mov	w2, 486
-	add	x1, x1, :lo12:.LANCHOR150
+	mov	w2, 489
+	add	x1, x1, :lo12:.LANCHOR159
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1741:
-	b	.L1741
-.L1740:
-	sbfiz	x0, x0, 6, 32
-	add	x0, x22, x0
+.L1995:
+	ldrb	w0, [x19]
+	add	x0, x23, x0, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x0, x5, 21, 3
-	cmp	w1, w0
-	bne	.L1742
+	cmp	w27, w0
+	bne	.L1996
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x0, #:lo12:.LANCHOR96]
 	adrp	x0, .LANCHOR95
 	ldrb	w3, [x0, #:lo12:.LANCHOR95]
 	mov	w0, 21
 	sub	w0, w0, w2
-	lsl	w1, w23, w2
+	lsl	w1, w24, w2
 	sub	w3, w3, #1
 	sub	w1, w1, #1
-	lsl	w0, w23, w0
+	lsl	w0, w24, w0
 	sub	w0, w0, #1
 	and	w0, w0, w3
-	lsr	w4, w26, w2
+	lsr	w4, w22, w2
 	and	w0, w0, 65535
 	and	w1, w1, 65535
 	and	w4, w0, w4
 	lsr	w2, w5, w2
 	and	w0, w0, w2
-	and	w26, w1, w26
+	and	w22, w1, w22
 	cmp	w4, w0
 	and	w1, w1, w5
-	ccmp	w26, w1, 0, ne
-	bne	.L1742
+	ccmp	w22, w1, 0, ne
+	bne	.L1996
 	cmp	w21, w3
-	beq	.L1742
+	beq	.L1996
 	ldr	w1, [x19, 40]
 	mov	w0, 17
 	ldr	x2, [x19, 8]
 	add	w21, w21, 1
 	ldr	x3, [x19, 24]
 	bl	flash_start_page_prog
-	strb	w23, [x19, 59]
+	strb	w24, [x19, 59]
 	mov	w0, 8
 	strb	w0, [x19, 58]
 	mov	w0, -1
 	strb	w0, [x19]
 	mov	x1, x19
-	adrp	x0, .LANCHOR114
-	add	x0, x0, :lo12:.LANCHOR114
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
 	bl	buf_add_tail
-	b	.L1739
-.L1742:
+	b	.L1994
+.L1996:
 	mov	x0, x19
 	mov	w21, 0
 	bl	queue_prog_cmd
-	b	.L1739
+	b	.L1994
 	.size	sblk_prog_page, .-sblk_prog_page
 	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
@@ -10951,17 +12109,17 @@ ftl_flush:
 	ldrb	w1, [x0, #:lo12:.LANCHOR112]
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
-	adrp	x20, .LANCHOR151
-	cbz	w1, .L1757
-	ldrb	w2, [x20, #:lo12:.LANCHOR151]
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	adrp	x20, .LANCHOR160
+	cbz	w1, .L2011
+	ldrb	w2, [x20, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	add	x0, x0, x2, lsl 6
 	bl	sblk_prog_page
-.L1757:
+.L2011:
 	mov	w0, -1
 	strb	wzr, [x19, #:lo12:.LANCHOR112]
-	strb	w0, [x20, #:lo12:.LANCHOR151]
+	strb	w0, [x20, #:lo12:.LANCHOR160]
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
@@ -10976,127 +12134,126 @@ ftl_flush:
 flash_prog_page_en:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR15
-	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR12
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	mov	w20, w1
 	stp	x25, x26, [sp, 64]
-	cmp	w0, w24
-	bhi	.L1763
-	adrp	x1, .LANCHOR152
+	mov	x24, x2
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	mov	x23, x3
+	mov	w25, w4
+	and	w21, w5, 255
+	ubfx	x19, x20, 24, 2
+	cmp	w0, w22
+	bhi	.L2017
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 494
-	add	x1, x1, :lo12:.LANCHOR152
+	mov	w2, 473
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1764:
-	b	.L1764
-.L1763:
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
-	mov	w20, w1
-	mov	x23, x2
-	mov	x22, x3
-	mov	w25, w4
-	and	w21, w5, 255
-	ldrb	w26, [x0, w24, sxtw]
-	tst	x20, 50331648
-	bne	.L1775
-	adrp	x0, .LANCHOR18
-	ldrb	w1, [x0, #:lo12:.LANCHOR18]
-	adrp	x0, .LANCHOR19
-	cbz	w1, .L1766
-	ldrb	w1, [x0, #:lo12:.LANCHOR19]
-	cbz	w1, .L1775
-.L1766:
-	adrp	x1, .LANCHOR20
-	ldrb	w0, [x0, #:lo12:.LANCHOR19]
-	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+.L2017:
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
+	ldrb	w26, [x0, w22, sxtw]
+	cbnz	w19, .L2027
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR25
+	cbz	w1, .L2019
+	ldrb	w1, [x0, #:lo12:.LANCHOR25]
+	cbz	w1, .L2027
+.L2019:
+	adrp	x1, .LANCHOR26
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	ldrh	w1, [x1, #:lo12:.LANCHOR26]
 	udiv	w19, w20, w1
 	mul	w19, w19, w1
 	sub	w1, w20, w19
-	cbz	w0, .L1767
+	cbz	w0, .L2020
 	add	w19, w19, w1, lsl 1
-.L1765:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 4, .L1768
-	adrp	x0, .LC68
+.L2018:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 4, .L2021
+	adrp	x0, .LC115
 	mov	w2, w20
 	mov	w1, w26
-	add	x0, x0, :lo12:.LC68
+	add	x0, x0, :lo12:.LC115
 	bl	printf
-.L1768:
-	mov	w0, w26
-	mov	w4, w25
-	mov	x3, x22
-	mov	x2, x23
+.L2021:
 	mov	w1, w19
+	mov	w4, w25
+	mov	x3, x23
+	mov	x2, x24
+	mov	w0, w26
 	bl	flash_prog_page
-	mov	w26, w0
-	cbz	w21, .L1769
-	adrp	x21, .LANCHOR142
-	adrp	x19, .LANCHOR143
+	mov	w19, w0
+	cbz	w21, .L2022
+	adrp	x26, .LANCHOR149
+	adrp	x21, .LANCHOR150
 	mov	w4, w25
 	mov	w1, w20
-	ldr	x3, [x21, #:lo12:.LANCHOR142]
-	mov	w0, w24
-	ldr	x2, [x19, #:lo12:.LANCHOR143]
+	ldr	x3, [x26, #:lo12:.LANCHOR149]
+	mov	w0, w22
+	ldr	x2, [x21, #:lo12:.LANCHOR150]
 	bl	flash_read_page_en
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L1770
-	ldr	x0, [x19, #:lo12:.LANCHOR143]
-	ldr	w1, [x23]
+	beq	.L2023
+	ldr	x0, [x21, #:lo12:.LANCHOR150]
+	ldr	w1, [x24]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	bne	.L1770
-	ldr	x0, [x21, #:lo12:.LANCHOR142]
-	ldr	w1, [x22]
+	bne	.L2023
+	ldr	x0, [x26, #:lo12:.LANCHOR149]
+	ldr	w1, [x23]
 	ldr	w0, [x0]
 	cmp	w1, w0
-	beq	.L1769
-.L1770:
-	ldr	x1, [x21, #:lo12:.LANCHOR142]
+	beq	.L2022
+.L2023:
+	ldr	x1, [x26, #:lo12:.LANCHOR149]
 	mov	w3, 4
-	adrp	x0, .LC69
+	adrp	x0, .LC116
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC69
+	add	x0, x0, :lo12:.LC116
 	bl	rknand_print_hex
-	ldr	x1, [x19, #:lo12:.LANCHOR143]
+	ldr	x1, [x21, #:lo12:.LANCHOR150]
 	mov	w3, 4
-	adrp	x0, .LC70
+	adrp	x0, .LC117
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC70
+	add	x0, x0, :lo12:.LC117
 	bl	rknand_print_hex
-.L1771:
+.L2024:
 	mov	w1, w20
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-	adrp	x1, .LANCHOR152
+	mov	w2, 499
+	adrp	x1, .LANCHOR161
 	adrp	x0, .LC0
-	mov	w2, 520
-	add	x1, x1, :lo12:.LANCHOR152
+	add	x1, x1, :lo12:.LANCHOR161
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1773:
-	b	.L1773
-.L1767:
-	adrp	x0, .LANCHOR21
-	add	x0, x0, :lo12:.LANCHOR21
+	mov	w0, -1
+	b	.L2025
+.L2020:
+	adrp	x0, .LANCHOR27
+	add	x0, x0, :lo12:.LANCHOR27
 	ldrh	w0, [x0, w1, uxtw 1]
 	add	w19, w0, w19
-	b	.L1765
-.L1775:
+	b	.L2018
+.L2027:
 	mov	w19, w20
-	b	.L1765
-.L1769:
-	cmn	w26, #1
-	beq	.L1771
-	mov	w0, w26
+	b	.L2018
+.L2022:
+	mov	w0, w19
+	cmn	w19, #1
+	beq	.L2024
+.L2025:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11114,7 +12271,7 @@ ftl_test_block:
 	stp	x23, x24, [sp, 48]
 	adrp	x24, ftl_tmp_buffer
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR145
+	adrp	x25, .LANCHOR152
 	stp	x21, x22, [sp, 32]
 	adrp	x26, .LANCHOR100
 	and	w21, w0, 65535
@@ -11127,45 +12284,45 @@ ftl_test_block:
 	str	x0, [x29, 112]
 	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
 	add	x0, x27, :lo12:.LANCHOR95
-	str	wzr, [x25, #:lo12:.LANCHOR145]
+	str	wzr, [x25, #:lo12:.LANCHOR152]
 	str	x0, [x29, 96]
-.L1787:
+.L2039:
 	ldr	x0, [x29, 112]
 	ldrb	w0, [x0]
 	cmp	w0, w20
-	bls	.L1797
+	bls	.L2049
 	add	x0, x27, :lo12:.LANCHOR95
 	mov	w22, 0
 	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR29
-	add	x0, x0, :lo12:.LANCHOR29
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
 	str	x0, [x29, 104]
-	b	.L1798
-.L1796:
+	b	.L2050
+.L2048:
 	ldr	x0, [x29, 104]
 	ldr	w0, [x0]
-	tbz	x0, 12, .L1788
-	adrp	x0, .LC72
+	tbz	x0, 12, .L2040
+	adrp	x0, .LC119
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC72
+	add	x0, x0, :lo12:.LC119
 	bl	printf
-.L1788:
+.L2040:
 	ldr	x0, [x29, 96]
 	ldrb	w19, [x0]
 	madd	w19, w21, w19, w22
 	and	w19, w19, 65535
-	cbnz	w20, .L1789
-	adrp	x0, .LANCHOR12
-	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	cbnz	w20, .L2041
+	adrp	x0, .LANCHOR20
+	ldr	x0, [x0, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 47]
 	cmp	w0, w19
-	bcs	.L1790
-.L1789:
+	bcs	.L2042
+.L2041:
 	and	w28, w20, 255
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_check_bad_block
-	cbnz	w0, .L1790
+	cbnz	w0, .L2042
 	adrp	x0, .LANCHOR99
 	mov	w1, w23
 	ldrh	w7, [x0, #:lo12:.LANCHOR99]
@@ -11173,54 +12330,54 @@ ftl_test_block:
 	mul	w26, w7, w19
 	mov	w2, w26
 	bl	flash_erase_block_en
-	cbz	w0, .L1791
+	cbz	w0, .L2043
 	adrp	x0, .LANCHOR67
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	bne	.L1813
-	adrp	x0, .LANCHOR18
-	ldrb	w0, [x0, #:lo12:.LANCHOR18]
-	cbz	w0, .L1813
+	bne	.L2065
+	adrp	x0, .LANCHOR11
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L2065
 	mov	w2, w26
 	mov	w1, 1
 	mov	w0, w28
 	bl	flash_erase_block_en
-	cbnz	w0, .L1813
-.L1795:
+	cbnz	w0, .L2065
+.L2047:
 	adrp	x0, .LANCHOR67
 	mov	w23, 1
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	add	w26, w26, w0, lsl 24
-.L1794:
-	adrp	x0, .LANCHOR52
+.L2046:
+	adrp	x0, .LANCHOR114
 	mov	w5, 1
-	add	x3, x25, :lo12:.LANCHOR145
+	add	x3, x25, :lo12:.LANCHOR152
 	add	x2, x24, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR52]
+	ldrb	w4, [x0, #:lo12:.LANCHOR114]
 	mov	w1, w26
 	mov	w0, w28
 	bl	flash_prog_page_en
-	cbz	w0, .L1790
-.L1813:
+	cbz	w0, .L2042
+.L2065:
 	mov	w1, w19
 	mov	w0, w28
 	bl	flash_mask_bad_block
-.L1790:
+.L2042:
 	add	w22, w22, 1
 	and	w22, w22, 65535
-.L1798:
+.L2050:
 	ldr	x0, [x29, 120]
 	ldrb	w0, [x0]
 	cmp	w0, w22
-	bhi	.L1796
+	bhi	.L2048
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1787
-.L1791:
-	cbz	w23, .L1794
-	b	.L1795
-.L1797:
-	cbz	w23, .L1799
+	b	.L2039
+.L2043:
+	cbz	w23, .L2046
+	b	.L2047
+.L2049:
+	cbz	w23, .L2051
 	adrp	x0, .LANCHOR3
 	mov	w1, 2
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
@@ -11228,7 +12385,7 @@ ftl_test_block:
 	ldrb	w0, [x21, 2]
 	bfi	w0, w1, 3, 2
 	strb	w0, [x21, 2]
-.L1799:
+.L2051:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -11254,27 +12411,31 @@ ftl_prog_page:
 	str	x23, [sp, 48]
 	mov	w23, w4
 	bl	sblk_wait_write_queue_completed
+	mov	w0, w19
 	mov	w5, 1
 	mov	w4, w23
 	mov	x3, x22
 	mov	x2, x21
 	mov	w1, w20
-	mov	w0, w19
 	bl	flash_prog_page_en
+	mov	w19, w0
 	cmn	w0, #1
-	bne	.L1814
-	adrp	x1, .LANCHOR153
+	bne	.L2066
+	mov	w2, 2034
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 2013
-	add	x1, x1, :lo12:.LANCHOR153
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1816:
-	b	.L1816
-.L1814:
+	adrp	x0, .LC118
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC118
+	bl	printf
+.L2066:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
 	.size	ftl_prog_page, .-ftl_prog_page
@@ -11287,196 +12448,200 @@ ftl_info_flush:
 	mov	w1, 0
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR52
+	adrp	x21, .LANCHOR114
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR155
-	ldrb	w2, [x21, #:lo12:.LANCHOR52]
-	mov	x23, x22
+	adrp	x22, .LANCHOR164
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR99
+	adrp	x23, .LANCHOR99
 	stp	x27, x28, [sp, 80]
-	mov	w26, 0
+	mov	x26, x23
+	ldrb	w2, [x21, #:lo12:.LANCHOR114]
+	add	x25, x22, :lo12:.LANCHOR164
+	add	x28, x23, :lo12:.LANCHOR99
+	mov	w24, 0
 	stp	x19, x20, [sp, 16]
+	mov	w27, w0
+	adrp	x20, .LANCHOR163
 	lsl	w2, w2, 1
-	adrp	x20, .LANCHOR154
-	str	w0, [x29, 108]
-	mov	x24, x25
-	add	x27, x22, :lo12:.LANCHOR155
-	add	x28, x25, :lo12:.LANCHOR99
-	add	x0, x20, :lo12:.LANCHOR154
+	add	x0, x20, :lo12:.LANCHOR163
 	bl	ftl_memset
-.L1819:
-	add	x0, x22, :lo12:.LANCHOR155
-	ldr	w1, [x29, 108]
-	ldrb	w6, [x22, #:lo12:.LANCHOR155]
-	ldrh	w19, [x25, #:lo12:.LANCHOR99]
+.L2070:
+	add	x0, x22, :lo12:.LANCHOR164
+	ldrb	w6, [x22, #:lo12:.LANCHOR164]
+	ldrh	w19, [x23, #:lo12:.LANCHOR99]
 	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR53
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR101
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	ldr	w3, [x0, 4]
 	add	w3, w3, 1
 	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR154
-	str	w1, [x20, #:lo12:.LANCHOR154]
+	add	x0, x20, :lo12:.LANCHOR163
+	str	w27, [x20, #:lo12:.LANCHOR163]
 	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1820
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2071
 	mov	w2, w4
 	mov	w1, w6
-	stp	w4, w6, [x29, 100]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
+	str	w4, [x29, 96]
+	adrp	x0, .LC120
+	str	w6, [x29, 104]
+	add	x0, x0, :lo12:.LC120
 	bl	printf
-	ldp	w4, w6, [x29, 100]
-.L1820:
+	ldr	w4, [x29, 96]
+	ldr	w6, [x29, 104]
+.L2071:
 	adrp	x1, .LANCHOR80
-	ldrh	w0, [x27, 2]
+	ldrh	w0, [x25, 2]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
 	cmp	w1, w0
-	bhi	.L1821
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x27, 1]
-	ldrb	w2, [x27]
-	mov	w4, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR12]
-.L1828:
+	bhi	.L2072
+	adrp	x19, .LANCHOR165
+	adrp	x3, .LC0
+	add	x19, x19, :lo12:.LANCHOR165
+	add	x3, x3, :lo12:.LC0
+.L2079:
+	ldrb	w0, [x25, 1]
+	adrp	x4, .LANCHOR20
 	add	w0, w0, 1
 	and	w0, w0, 255
+	strb	w0, [x25, 1]
 	cmp	w0, 7
-	bls	.L1822
-	mov	x1, 0
-.L1827:
-	add	x3, x6, x1
-	and	w7, w1, 65535
-	ldrb	w8, [x3, 40]
-	add	w3, w8, 127
-	and	w3, w3, 255
-	cmp	w3, 125
-	bhi	.L1823
-	add	x1, x23, :lo12:.LANCHOR155
-	strb	w0, [x1, 1]
-	cbz	w4, .L1824
-	strb	w2, [x23, #:lo12:.LANCHOR155]
-.L1824:
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 668
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1825:
-	b	.L1825
-.L1823:
-	cmp	w8, 255
-	bne	.L1826
-	add	x1, x1, 1
-	cmp	x1, 8
-	bne	.L1827
-	mov	w7, w1
-.L1826:
-	and	w0, w7, 255
-	mov	w26, 1
-.L1822:
+	bls	.L2073
+	mov	x0, 0
+.L2078:
+	ldr	x2, [x4, #:lo12:.LANCHOR20]
 	add	w1, w0, 8
-	mov	w4, 1
-	add	x1, x6, x1, sxtw
+	and	w24, w0, 65535
+	add	x1, x2, x1, sxtw
 	ldrb	w2, [x1, 32]
-	cmp	w2, 255
-	beq	.L1828
+	add	w1, w2, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L2074
+	mov	x0, x3
+	stp	x4, x3, [x29, 96]
+	mov	w2, 672
+	mov	x1, x19
+	bl	printf
+	ldp	x4, x3, [x29, 96]
+.L2077:
+	strb	w24, [x25, 1]
+	mov	w24, 1
+.L2073:
+	ldr	x0, [x4, #:lo12:.LANCHOR20]
+	ldrb	w1, [x25, 1]
+	add	x0, x0, x1
+	ldrb	w0, [x0, 40]
+	strb	w0, [x25]
+	cmp	w0, 255
+	beq	.L2079
 	ldrh	w19, [x28]
-	strb	w0, [x27, 1]
+	mul	w19, w19, w0
 	mov	w0, 0
-	strb	w2, [x27]
-	mul	w19, w19, w2
 	mov	w1, w19
 	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	ldrb	w4, [x21, #:lo12:.LANCHOR114]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR154
+	add	x3, x20, :lo12:.LANCHOR163
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
+	add	w19, w19, 1
 	bl	ftl_prog_page
 	mov	w0, 1
-	add	w19, w19, w0
-	strh	w0, [x27, 2]
-.L1829:
-	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	strh	w0, [x25, 2]
+.L2080:
+	ldrb	w4, [x21, #:lo12:.LANCHOR114]
 	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR154
+	add	x3, x20, :lo12:.LANCHOR163
 	adrp	x2, ftl_info_data_buffer
 	mov	w0, 0
 	add	x2, x2, :lo12:ftl_info_data_buffer
 	bl	ftl_prog_page
 	cmn	w0, #1
-	ldrh	w1, [x27, 2]
+	ldrh	w1, [x25, 2]
+	adrp	x0, .LANCHOR166
 	add	w1, w1, 1
-	strh	w1, [x27, 2]
-	beq	.L1819
-	cbnz	w26, .L1830
-.L1838:
-	ldrb	w0, [x23, #:lo12:.LANCHOR155]
+	strh	w1, [x25, 2]
+	beq	.L2081
+	ldrb	w1, [x0, #:lo12:.LANCHOR166]
+	cbz	w1, .L2082
+.L2081:
+	strb	wzr, [x0, #:lo12:.LANCHOR166]
+	b	.L2070
+.L2074:
+	cmp	w2, 255
+	bne	.L2077
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L2078
+	mov	w24, w0
+	b	.L2077
+.L2072:
+	madd	w19, w19, w6, w4
+	cbnz	w0, .L2080
+	mov	w1, w19
+	bl	flash_erase_block
+	b	.L2080
+.L2082:
+	cbnz	w24, .L2083
+.L2091:
+	adrp	x0, .LANCHOR164
+	ldrb	w0, [x0, #:lo12:.LANCHOR164]
 	cmp	w0, 255
-	bne	.L1854
-	adrp	x1, .LANCHOR156
+	bne	.L2085
+	adrp	x1, .LANCHOR165
 	adrp	x0, .LC0
-	mov	w2, 703
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 708
+	add	x1, x1, :lo12:.LANCHOR165
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1839:
-	b	.L1839
-.L1821:
-	madd	w19, w19, w6, w4
-	cbnz	w0, .L1829
-	mov	w1, w19
-	bl	flash_erase_block
-	b	.L1829
-.L1830:
-	ldrb	w19, [x27, 1]
-	add	x24, x24, :lo12:.LANCHOR99
-	adrp	x20, .LANCHOR12
+.L2085:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2083:
+	ldrb	w19, [x25, 1]
+	adrp	x20, .LANCHOR165
+	adrp	x21, .LC0
+	add	x20, x20, :lo12:.LANCHOR165
 	add	w19, w19, 1
-.L1833:
+	add	x21, x21, :lo12:.LC0
+	adrp	x22, .LANCHOR20
+.L2086:
 	cmp	w19, 7
-	bhi	.L1838
-	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	bhi	.L2091
+	ldr	x1, [x22, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	add	x0, x1, x0, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1834
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 696
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1835:
-	b	.L1835
-.L1834:
-	cmp	w0, 255
-	beq	.L1836
-	ldrh	w1, [x24]
-	mul	w1, w1, w0
+	ldrb	w23, [x0, 32]
+	add	w0, w23, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2087
+	mov	w2, 701
+	mov	x1, x20
+	mov	x0, x21
+	bl	printf
+.L2088:
+	ldrh	w1, [x26, #:lo12:.LANCHOR99]
 	mov	w0, 0
+	mul	w1, w1, w23
 	bl	flash_erase_block
-.L1836:
+	b	.L2089
+.L2087:
+	cmp	w23, 255
+	bne	.L2088
+.L2089:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1833
-.L1854:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
+	b	.L2086
 	.size	ftl_info_flush, .-ftl_info_flush
 	.section	.text.ftl_info_blk_init,"ax",@progbits
 	.align	2
@@ -11484,84 +12649,89 @@ ftl_info_flush:
 	.type	ftl_info_blk_init, %function
 ftl_info_blk_init:
 	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR157
-	adrp	x1, .LANCHOR3
+	adrp	x0, .LANCHOR167
+	adrp	x1, .LANCHOR166
 	mov	w2, 16384
 	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR167]
+	mov	w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR168
 	stp	x19, x20, [sp, 16]
 	adrp	x20, ftl_info_data_buffer
-	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	strb	w0, [x1, #:lo12:.LANCHOR168]
+	adrp	x1, .LANCHOR3
 	add	x0, x20, :lo12:ftl_info_data_buffer
+	stp	x21, x22, [sp, 32]
 	str	x0, [x1, #:lo12:.LANCHOR3]
 	adrp	x1, .LANCHOR2
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
-	ldrh	w1, [x1, #:lo12:.LANCHOR2]
-	adrp	x21, .LANCHOR155
+	adrp	x22, .LANCHOR101
 	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x21, .LANCHOR164
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR12
-	add	x1, x0, x1, lsl 2
+	adrp	x23, .LANCHOR20
 	stp	x27, x28, [sp, 80]
-	str	x1, [x22, #:lo12:.LANCHOR53]
+	adrp	x26, .LANCHOR99
+	add	x1, x0, x1, lsl 2
+	str	x1, [x22, #:lo12:.LANCHOR101]
 	mov	w1, 0
 	bl	ftl_memset
-	adrp	x25, .LANCHOR52
 	mov	w1, 0
 	mov	w2, 16384
 	adrp	x0, ftl_ext_info_data_buffer
 	add	x0, x0, :lo12:ftl_ext_info_data_buffer
 	bl	ftl_memset
+	adrp	x25, .LANCHOR114
+	ldr	x1, [x23, #:lo12:.LANCHOR20]
+	add	x0, x21, :lo12:.LANCHOR164
 	mov	w27, 21574
-	ldr	x1, [x23, #:lo12:.LANCHOR12]
-	add	x0, x21, :lo12:.LANCHOR155
 	add	x26, x26, :lo12:.LANCHOR99
-	add	x25, x25, :lo12:.LANCHOR52
+	add	x25, x25, :lo12:.LANCHOR114
 	mov	x19, 7
-	movk	w27, 0x494c, lsl 16
 	strb	wzr, [x0, 1]
+	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR155]
+	strb	w1, [x21, #:lo12:.LANCHOR164]
 	strh	wzr, [x0, 2]
-.L1858:
-	ldr	x1, [x23, #:lo12:.LANCHOR12]
+.L2107:
+	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w19, 8
 	sxth	w24, w19
 	mov	w28, w19
 	add	x0, x1, x0, sxtw
 	ldrb	w0, [x0, 32]
 	cmp	w0, 255
-	bne	.L1857
-.L1862:
+	bne	.L2106
+.L2111:
 	sub	x19, x19, #1
 	cmn	x19, #1
-	bne	.L1858
+	bne	.L2107
 	mov	w24, 0
-.L1859:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1863
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+.L2108:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2112
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	mov	w2, 4800
 	mov	w1, w19
 	ldr	w3, [x0]
-	adrp	x0, .LC75
-	add	x0, x0, :lo12:.LC75
+	adrp	x0, .LC122
+	add	x0, x0, :lo12:.LC122
 	bl	printf
-.L1863:
+.L2112:
 	cmn	w19, #1
-	bne	.L1864
+	bne	.L2113
 	mov	w1, 0
 	mov	w2, 16384
 	add	x0, x20, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	mov	w1, 21574
 	movk	w1, 0x494c, lsl 16
 	str	w1, [x0]
 	mov	w0, w19
-.L1856:
+.L2105:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -11569,12 +12739,12 @@ ftl_info_blk_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L1857:
+.L2106:
 	ldrh	w6, [x26]
 	add	x8, x20, :lo12:ftl_info_data_buffer
 	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR154
-	add	x7, x7, :lo12:.LANCHOR154
+	adrp	x7, .LANCHOR163
+	add	x7, x7, :lo12:.LANCHOR163
 	mov	x2, x8
 	mov	x3, x7
 	stp	x7, x8, [x29, 104]
@@ -11587,7 +12757,7 @@ ftl_info_blk_init:
 	cmn	w0, #1
 	ldr	w6, [x29, 124]
 	ldp	x7, x8, [x29, 104]
-	bne	.L1860
+	bne	.L2109
 	ldrb	w4, [x25]
 	mov	x3, x7
 	mov	x2, x8
@@ -11595,46 +12765,46 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	mov	w5, w0
-.L1860:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1861
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+.L2109:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2110
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	mov	w2, w5
 	str	w5, [x29, 124]
-	mov	w3, 576
+	mov	w3, 580
 	mov	w1, w28
 	ldr	w4, [x0]
-	adrp	x0, .LC74
-	add	x0, x0, :lo12:.LC74
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
 	bl	printf
 	ldr	w5, [x29, 124]
-.L1861:
+.L2110:
 	cmn	w5, #1
-	beq	.L1862
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	beq	.L2111
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1862
+	bne	.L2111
 	mov	w19, w24
-	b	.L1859
-.L1864:
-	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	b	.L2108
+.L2113:
+	ldr	x1, [x23, #:lo12:.LANCHOR20]
 	add	w0, w24, 8
 	add	x20, x20, :lo12:ftl_info_data_buffer
 	mov	w4, 4
 	mov	x2, x20
-	adrp	x26, .LANCHOR52
+	adrp	x26, .LANCHOR114
 	add	x0, x1, x0, sxtw
 	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR52
+	add	x26, x26, :lo12:.LANCHOR114
 	movk	w27, 0x494c, lsl 16
 	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR155
-	strb	w1, [x21, #:lo12:.LANCHOR155]
+	add	x0, x21, :lo12:.LANCHOR164
+	strb	w1, [x21, #:lo12:.LANCHOR164]
 	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR154
-	add	x24, x24, :lo12:.LANCHOR154
+	adrp	x24, .LANCHOR163
+	add	x24, x24, :lo12:.LANCHOR163
 	mov	w0, 0
 	mov	x3, x24
 	bl	flash_get_last_written_page
@@ -11642,11 +12812,11 @@ ftl_info_blk_init:
 	add	w0, w0, 1
 	and	w19, w0, 65535
 	adrp	x0, .LANCHOR99
-	ldrb	w25, [x21, #:lo12:.LANCHOR155]
+	ldrb	w25, [x21, #:lo12:.LANCHOR164]
 	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	madd	w25, w25, w0, w23
-.L1866:
-	tbnz	w23, #31, .L1871
+.L2115:
+	tbnz	w23, #31, .L2120
 	ldrb	w4, [x26]
 	mov	x3, x24
 	mov	x2, x20
@@ -11654,43 +12824,43 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_read_page
 	cmn	w0, #1
-	beq	.L1867
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	beq	.L2116
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldr	w0, [x0]
 	cmp	w0, w27
-	bne	.L1867
-.L1871:
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
-	add	x21, x21, :lo12:.LANCHOR155
+	bne	.L2116
+.L2120:
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
+	add	x21, x21, :lo12:.LANCHOR164
 	strh	w19, [x21, 2]
 	ldr	w1, [x0, 16]
 	cmp	w1, 2048
-	bhi	.L1868
-.L1869:
+	bhi	.L2117
+.L2118:
 	ldr	w1, [x0, 24]
 	cmp	w1, 2048
-	bls	.L1872
+	bls	.L2121
 	ldr	w2, [x0, 28]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 24]
-.L1872:
+.L2121:
 	ldr	w1, [x0, 32]
 	cmp	w1, 1024
-	bls	.L1873
+	bls	.L2122
 	ldr	w2, [x0, 36]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 32]
-.L1873:
+.L2122:
 	ldr	w1, [x0, 40]
 	cmp	w1, 1024
-	bls	.L1874
+	bls	.L2123
 	ldr	w2, [x0, 44]
 	add	w2, w2, w1, lsr 10
 	and	w1, w1, 1023
 	stp	w1, w2, [x0, 40]
-.L1874:
+.L2123:
 	ldr	w1, [x0, 64]
 	add	w1, w1, 1
 	str	w1, [x0, 64]
@@ -11699,18 +12869,18 @@ ftl_info_blk_init:
 	mov	w0, 0
 	bl	ftl_info_flush
 	mov	w0, 0
-	b	.L1856
-.L1867:
+	b	.L2105
+.L2116:
 	sub	w23, w23, #1
 	sub	w25, w25, #1
 	sxth	w23, w23
-	b	.L1866
-.L1868:
+	b	.L2115
+.L2117:
 	ldr	w2, [x0, 20]
 	add	w2, w2, w1, lsr 11
 	and	w1, w1, 2047
 	stp	w1, w2, [x0, 16]
-	b	.L1869
+	b	.L2118
 	.size	ftl_info_blk_init, .-ftl_info_blk_init
 	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
@@ -11726,90 +12896,99 @@ ftl_ext_info_flush:
 	stp	x23, x24, [sp, 48]
 	ldr	w1, [x0, 520]
 	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	cbz	w1, .L1890
+	stp	x27, x28, [sp, 80]
+	cbz	w1, .L2139
 	str	wzr, [x0, 520]
-.L1890:
-	adrp	x24, .LANCHOR53
+.L2139:
 	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR169
 	adrp	x21, .LANCHOR96
 	add	x20, x20, :lo12:.LANCHOR80
-	mov	x22, x24
+	add	x22, x22, :lo12:.LANCHOR169
 	add	x21, x21, :lo12:.LANCHOR96
 	mov	w0, 0
 	bl	ftl_total_vpn_update
-.L1899:
-	ldr	x0, [x24, #:lo12:.LANCHOR53]
+.L2140:
+	adrp	x23, .LANCHOR101
+	mov	x24, x23
+.L2143:
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldr	w1, [x0, 56]
 	add	w1, w1, 1
 	str	w1, [x0, 56]
 	ldrh	w1, [x0, 140]
 	ldrh	w0, [x20]
 	cmp	w1, w0
-	bcc	.L1891
+	bcc	.L2141
 	bl	ftl_ext_alloc_new_blk
-.L1891:
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+.L2141:
+	ldr	x0, [x24, #:lo12:.LANCHOR101]
+	ldrh	w1, [x0, 130]
 	mov	w0, 65535
-	ldrh	w1, [x2, 130]
 	cmp	w1, w0
-	bne	.L1892
-	adrp	x1, .LANCHOR158
+	bne	.L2142
 	adrp	x0, .LC0
-	mov	w2, 1603
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 1621
+	mov	x1, x22
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1893:
-	b	.L1893
-.L1892:
-	ldrh	w0, [x21]
+.L2142:
+	ldr	x1, [x24, #:lo12:.LANCHOR101]
 	mov	w19, 21
-	adrp	x25, .LANCHOR52
-	adrp	x26, .LANCHOR154
+	ldrh	w0, [x21]
+	adrp	x26, .LANCHOR114
+	adrp	x27, .LANCHOR163
+	add	x25, x27, :lo12:.LANCHOR163
 	sub	w0, w19, w0
 	mov	w19, 1
-	add	x23, x26, :lo12:.LANCHOR154
-	asr	w27, w1, w0
+	ldrh	w2, [x1, 130]
 	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR99
 	sub	w19, w19, #1
-	and	w19, w19, w1
-	ldrh	w1, [x0, #:lo12:.LANCHOR99]
-	ldrh	w0, [x2, 140]
-	ldrb	w2, [x25, #:lo12:.LANCHOR52]
-	madd	w19, w19, w1, w0
-	lsl	w2, w2, 1
+	and	w19, w19, w2
+	asr	w28, w2, w0
+	adrp	x0, .LANCHOR99
+	ldrh	w2, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x1, 140]
 	mov	w1, 0
-	mov	x0, x23
-	bl	ftl_memset
+	madd	w19, w19, w2, w0
+	ldrb	w2, [x26, #:lo12:.LANCHOR114]
+	mov	x0, x25
 	and	w19, w19, 65535
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x0, [x24, #:lo12:.LANCHOR101]
 	mov	w1, w19
-	ldrb	w4, [x25, #:lo12:.LANCHOR52]
-	mov	x3, x23
-	str	wzr, [x26, #:lo12:.LANCHOR154]
+	ldrb	w4, [x26, #:lo12:.LANCHOR114]
+	mov	x3, x25
+	str	wzr, [x27, #:lo12:.LANCHOR163]
 	adrp	x2, ftl_ext_info_data_buffer
 	add	x2, x2, :lo12:ftl_ext_info_data_buffer
 	ldr	w0, [x0, 56]
-	str	w0, [x23, 4]
-	mov	w0, w27
+	str	w0, [x25, 4]
+	mov	w0, w28
 	bl	ftl_prog_page
-	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldr	x2, [x24, #:lo12:.LANCHOR101]
 	ldrh	w1, [x2, 140]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 140]
 	cmp	w1, 1
-	beq	.L1899
+	beq	.L2143
 	cmn	w0, #1
-	beq	.L1899
+	adrp	x0, .LANCHOR168
+	beq	.L2144
+	ldrb	w1, [x0, #:lo12:.LANCHOR168]
+	cbz	w1, .L2145
+.L2144:
+	strb	wzr, [x0, #:lo12:.LANCHOR168]
+	b	.L2140
+.L2145:
 	mov	w0, 0
-	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
 	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
@@ -11819,13 +12998,13 @@ ftl_ext_info_flush:
 	.type	ftl_ext_info_init, %function
 ftl_ext_info_init:
 	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR109
+	adrp	x0, .LANCHOR110
 	mov	w4, 4
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
-	strh	wzr, [x0, #:lo12:.LANCHOR109]
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	adrp	x22, .LANCHOR101
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	adrp	x25, ftl_ext_info_data_buffer
@@ -11834,11 +13013,11 @@ ftl_ext_info_init:
 	ldrh	w19, [x0, 130]
 	adrp	x0, .LANCHOR96
 	stp	x27, x28, [sp, 80]
-	adrp	x24, .LANCHOR154
+	adrp	x24, .LANCHOR163
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
 	and	w26, w19, 16383
-	add	x3, x24, :lo12:.LANCHOR154
+	add	x3, x24, :lo12:.LANCHOR163
 	sub	w0, w0, w1
 	mov	w1, w26
 	asr	w19, w19, w0
@@ -11846,32 +13025,32 @@ ftl_ext_info_init:
 	mov	w0, w19
 	bl	flash_get_last_written_page
 	sxth	w21, w0
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1905
-	adrp	x1, .LANCHOR159
-	adrp	x0, .LC33
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2156
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC66
 	mov	w3, w21
-	mov	w2, 1646
-	add	x1, x1, :lo12:.LANCHOR159
-	add	x0, x0, :lo12:.LC33
+	mov	w2, 1665
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1905:
-	adrp	x27, .LANCHOR52
+.L2156:
+	adrp	x27, .LANCHOR114
 	adrp	x28, .LANCHOR99
 	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR52
+	add	x27, x27, :lo12:.LANCHOR114
 	add	x28, x28, :lo12:.LANCHOR99
 	mov	w23, 0
 	movk	w5, 0x4549, lsl 16
-.L1906:
+.L2157:
 	and	w20, w21, 65535
 	sub	w0, w20, w23
-	tbnz	x0, 15, .L1911
+	tbnz	x0, 15, .L2162
 	ldrh	w0, [x28]
 	sub	w1, w21, w23
 	ldrb	w4, [x27]
-	add	x3, x24, :lo12:.LANCHOR154
+	add	x3, x24, :lo12:.LANCHOR163
 	str	w5, [x29, 108]
 	add	x2, x25, :lo12:ftl_ext_info_data_buffer
 	madd	w1, w0, w26, w1
@@ -11880,22 +13059,22 @@ ftl_ext_info_init:
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
 	ldr	w5, [x29, 108]
-	beq	.L1907
+	beq	.L2158
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0]
 	cmp	w0, w5
-	bne	.L1907
-.L1911:
+	bne	.L2158
+.L2162:
 	bl	zftl_sblk_list_init
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldrh	w1, [x0, 140]
 	cmp	w1, w21
-	bgt	.L1909
+	bgt	.L2160
 	add	w20, w20, 1
 	strh	w20, [x0, 140]
 	bl	ftl_ext_info_flush
-.L1909:
+.L2160:
 	adrp	x0, .LANCHOR5
 	mov	w1, -1
 	ldp	x19, x20, [sp, 16]
@@ -11907,14 +13086,14 @@ ftl_ext_info_init:
 	str	wzr, [x0, 520]
 	str	wzr, [x0, 604]
 	str	wzr, [x0, 608]
-	adrp	x0, .LANCHOR110
-	strh	w1, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR111
+	strh	w1, [x0, #:lo12:.LANCHOR111]
 	mov	w0, 0
 	ldp	x29, x30, [sp], 112
 	ret
-.L1907:
+.L2158:
 	add	w23, w23, 1
-	b	.L1906
+	b	.L2157
 	.size	ftl_ext_info_init, .-ftl_ext_info_init
 	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
@@ -11924,43 +13103,41 @@ ftl_low_format:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR99
+	adrp	x20, .LANCHOR171
 	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR99
+	add	x20, x20, :lo12:.LANCHOR171
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR12
-	mov	x25, x21
+	adrp	x22, .LANCHOR20
+	mov	x25, x22
 	stp	x23, x24, [sp, 48]
 	mov	w19, 8
-.L1923:
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	adrp	x23, .LC0
+.L2173:
+	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	add	x0, x0, x19, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1920
-	adrp	x1, .LANCHOR160
-	adrp	x0, .LC0
-	mov	w2, 1817
-	add	x1, x1, :lo12:.LANCHOR160
-	add	x0, x0, :lo12:.LC0
+	ldrb	w21, [x0, 32]
+	add	w0, w21, 127
+	and	w0, w0, 255
+	cmp	w0, 125
+	bhi	.L2171
+	mov	w2, 1836
+	mov	x1, x20
+	add	x0, x23, :lo12:.LC0
 	bl	printf
-.L1921:
-	b	.L1921
-.L1920:
-	cmp	w0, 255
-	beq	.L1922
-	ldrh	w1, [x20]
-	mul	w1, w1, w0
+.L2171:
+	cmp	w21, 255
+	beq	.L2172
+	adrp	x0, .LANCHOR99
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 0
+	mul	w1, w1, w21
 	bl	flash_erase_block
-.L1922:
+.L2172:
 	add	w19, w19, 1
 	cmp	w19, 16
-	bne	.L1923
+	bne	.L2173
 	bl	sblk_init
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	bl	ftl_info_blk_init
 	adrp	x22, .LANCHOR3
 	mov	w1, 0
@@ -11969,15 +13146,15 @@ ftl_low_format:
 	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
 	adrp	x20, .LANCHOR2
-	ldr	x3, [x19, #:lo12:.LANCHOR53]
+	ldr	x3, [x19, #:lo12:.LANCHOR101]
 	mov	w5, 1
 	ldr	x1, [x22, #:lo12:.LANCHOR3]
 	ldrh	w4, [x20, #:lo12:.LANCHOR2]
 	ldrh	w0, [x3, 134]
 	add	x1, x1, x0, uxth 2
-.L1924:
+.L2174:
 	cmp	w0, w4
-	bcc	.L1925
+	bcc	.L2175
 	mov	w0, 21574
 	adrp	x24, .LANCHOR60
 	add	x24, x24, :lo12:.LANCHOR60
@@ -11986,11 +13163,11 @@ ftl_low_format:
 	mov	w21, 0
 	mov	w26, 1
 	str	w0, [x3]
-.L1926:
+.L2176:
 	ldrh	w0, [x20, #:lo12:.LANCHOR2]
 	adrp	x23, .LANCHOR95
 	cmp	w0, w21
-	bhi	.L1934
+	bhi	.L2184
 	adrp	x21, .LANCHOR5
 	mov	w2, 16384
 	mov	w1, 0
@@ -11999,55 +13176,56 @@ ftl_low_format:
 	bl	ftl_memset
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, 20038
-	ldr	x7, [x19, #:lo12:.LANCHOR53]
+	ldr	x6, [x19, #:lo12:.LANCHOR101]
 	movk	w1, 0x4549, lsl 16
-	ldr	x2, [x22, #:lo12:.LANCHOR3]
-	mov	w5, 3
-	ldrh	w3, [x7, 148]
+	mov	w4, 3
+	mov	w10, 15
+	ldrh	w3, [x6, 148]
 	str	w1, [x0]
-	mov	w1, 2
-	ldr	x0, [x25, #:lo12:.LANCHOR12]
-	ldrb	w6, [x23, #:lo12:.LANCHOR95]
-	cmp	w6, 1
+	ldr	x0, [x25, #:lo12:.LANCHOR20]
+	ldrb	w2, [x23, #:lo12:.LANCHOR95]
+	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	cmp	w2, 1
+	and	w8, w2, 65535
 	ldrb	w0, [x0, 47]
-	csinc	w5, w5, wzr, ne
-	csinc	w1, w1, wzr, ne
-	and	w5, w5, 255
-	and	w1, w1, 65535
-	udiv	w0, w0, w6
-	and	w8, w0, 65535
+	csinc	w4, w4, wzr, ne
+	and	w4, w4, 255
+	udiv	w0, w0, w2
+	and	w5, w0, 65535
 	ubfiz	x0, x0, 2, 8
 	add	x0, x0, 4
-	add	w24, w8, 1
-	add	x0, x2, x0
-.L1935:
-	ldrb	w4, [x2, 2]
-	add	x2, x2, 4
-	strb	w5, [x2, -1]
-	orr	w4, w4, -32
-	strb	w4, [x2, -2]
-	cmp	x2, x0
-	bne	.L1935
-	add	w0, w1, w3
+	add	w24, w5, 1
+	add	x0, x1, x0
+.L2187:
+	cmp	w2, 4
+	add	x1, x1, 4
+	csel	w7, w10, w4, eq
+	strb	w7, [x1, -1]
+	ldrb	w7, [x1, -2]
+	orr	w7, w7, -32
+	strb	w7, [x1, -2]
+	cmp	x1, x0
+	bne	.L2187
+	mul	w5, w5, w8
 	mov	w4, 16
-	mul	w1, w1, w8
-	sdiv	w4, w4, w6
-	add	w1, w1, w0, uxth
-	adrp	x0, .LANCHOR29
-	strh	w1, [x7, 148]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	add	w0, w8, w3
+	sdiv	w4, w4, w2
+	add	w0, w5, w0, uxth
+	strh	w0, [x6, 148]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	add	w4, w24, w4
 	and	w4, w4, 65535
-	strh	w4, [x7, 134]
-	tbz	x0, 12, .L1936
-	adrp	x0, .LC76
+	strh	w4, [x6, 134]
+	tbz	x0, 12, .L2188
+	adrp	x0, .LC123
 	mov	w3, w24
 	mov	w2, 128
-	mov	w1, 1862
-	add	x0, x0, :lo12:.LC76
+	mov	w1, 1883
+	add	x0, x0, :lo12:.LC123
 	bl	printf
-.L1936:
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+.L2188:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 128
 	mov	w1, 255
 	add	x0, x0, 160
@@ -12056,7 +13234,7 @@ ftl_low_format:
 	adrp	x0, .LANCHOR100
 	ldr	x11, [x22, #:lo12:.LANCHOR3]
 	adrp	x22, .LANCHOR96
-	ldr	x8, [x19, #:lo12:.LANCHOR53]
+	ldr	x8, [x19, #:lo12:.LANCHOR101]
 	and	w7, w6, 65535
 	ldrb	w12, [x0, #:lo12:.LANCHOR100]
 	mov	w2, 21
@@ -12069,9 +13247,9 @@ ftl_low_format:
 	and	w1, w1, 65535
 	lsl	w2, w2, w0
 	and	w2, w2, 65535
-.L1937:
+.L2189:
 	cmp	w24, w10
-	bcc	.L1943
+	bcc	.L2195
 	adrp	x0, .LANCHOR4
 	ldrh	w2, [x20, #:lo12:.LANCHOR2]
 	mov	w1, 0
@@ -12079,7 +13257,7 @@ ftl_low_format:
 	lsl	w2, w2, 1
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w1, [x20, #:lo12:.LANCHOR2]
 	ldrh	w2, [x0, 134]
 	strh	w23, [x0, 112]
@@ -12092,161 +13270,48 @@ ftl_low_format:
 	mov	w23, w0
 	mov	w1, 0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	mov	w0, w23
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
-	mov	w1, 65533
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1944
-	adrp	x1, .LANCHOR160
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2196
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 1893
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 1914
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1945:
-	b	.L1945
-.L1925:
-	ldrb	w2, [x1, 2]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	add	x1, x1, 4
-	and	w2, w2, 31
-	bfi	w2, w5, 3, 2
-	strb	w2, [x1, -2]
-	b	.L1924
-.L1934:
-	strh	w21, [x24]
-	mov	w0, w21
-	bl	ftl_test_block
-	ldrb	w11, [x23, #:lo12:.LANCHOR95]
-	adrp	x0, .LANCHOR100
-	ldr	x6, [x22, #:lo12:.LANCHOR3]
-	mov	w7, 0
-	ldrb	w14, [x0, #:lo12:.LANCHOR100]
-	mov	w10, 0
-	ldr	x13, [x19, #:lo12:.LANCHOR53]
-	mov	w8, 0
-	mul	w12, w21, w11
-	add	x6, x6, x21, uxth 2
-.L1927:
-	cmp	w8, w14
-	bcs	.L1931
-	add	w15, w11, w7
-	b	.L1932
-.L1930:
-	add	w1, w7, w12
-	mov	w0, w8
-	bl	flash_check_bad_block
-	cbz	w0, .L1928
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w7
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-	ldrh	w0, [x13, 148]
-	add	w0, w0, 1
-	strh	w0, [x13, 148]
-.L1929:
-	add	w7, w7, 1
-.L1932:
-	cmp	w7, w15
-	bne	.L1930
-	add	w8, w8, 1
-	sub	w12, w12, w11
-	and	w8, w8, 65535
-	b	.L1927
-.L1928:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L1929
-.L1931:
-	cbnz	w10, .L1933
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L1933:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L1926
-.L1943:
-	add	x13, x11, x24, uxth 2
-	mov	w14, 0
-	mov	w15, 0
-	mov	w3, 0
-	ldrb	w0, [x13, 2]
-	orr	w0, w0, -32
-	strb	w0, [x13, 2]
-.L1938:
-	cmp	w3, w12
-	bcc	.L1947
-	add	w24, w24, 1
-	add	w1, w7, w1
-	and	w24, w24, 65535
-	and	w1, w1, 65535
-	b	.L1937
-.L1941:
-	ldrb	w5, [x13, 3]
-	add	w16, w15, w4
-	asr	w5, w5, w16
-	tbnz	x5, 0, .L1939
-	cmp	w6, 1
-	bls	.L1946
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L1940:
-	add	x5, x8, x23, sxtw 1
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	add	w0, w0, w14
-	strh	w0, [x5, 160]
-.L1939:
-	add	x4, x4, 1
-.L1942:
-	and	w0, w4, 65535
-	cmp	w0, w7
-	bcc	.L1941
-	add	w3, w3, 1
-	add	w0, w2, w14
-	and	w3, w3, 65535
-	add	w15, w15, w6
-	and	w14, w0, 65535
-	b	.L1938
-.L1946:
-	mov	w0, w1
-	b	.L1940
-.L1947:
-	mov	x4, 0
-	b	.L1942
-.L1944:
-	strh	wzr, [x0, 696]
+.L2196:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
+	strh	wzr, [x0, 280]
 	bl	ftl_memset
 	ldrh	w2, [x22, #:lo12:.LANCHOR96]
 	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	sub	w1, w1, w2
 	asr	w1, w20, w1
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR172
 	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	ldrh	w1, [x1, #:lo12:.LANCHOR172]
 	strh	w23, [x0, 416]
 	strh	w1, [x0, 698]
 	bl	ftl_alloc_sys_blk
 	mov	w20, w0
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w1, 2
 	strh	w20, [x0, 130]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
@@ -12256,7 +13321,7 @@ ftl_low_format:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -12289,6 +13354,118 @@ ftl_low_format:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
+.L2175:
+	ldrb	w2, [x1, 2]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	add	x1, x1, 4
+	and	w2, w2, 31
+	bfi	w2, w5, 3, 2
+	strb	w2, [x1, -2]
+	b	.L2174
+.L2184:
+	strh	w21, [x24]
+	mov	w0, w21
+	bl	ftl_test_block
+	ldrb	w11, [x23, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR100
+	ldr	x6, [x22, #:lo12:.LANCHOR3]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR100]
+	mov	w10, 0
+	ldr	x13, [x19, #:lo12:.LANCHOR101]
+	mov	w8, 0
+	mul	w12, w21, w11
+	add	x6, x6, x21, uxth 2
+.L2177:
+	cmp	w8, w14
+	bcs	.L2181
+	add	w15, w11, w7
+	b	.L2182
+.L2180:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L2178
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L2179:
+	add	w7, w7, 1
+.L2182:
+	cmp	w7, w15
+	bne	.L2180
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L2177
+.L2178:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L2179
+.L2181:
+	cbnz	w10, .L2183
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L2183:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2176
+.L2195:
+	add	x13, x11, x24, uxth 2
+	mov	w14, 0
+	mov	w15, 0
+	mov	w3, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L2190:
+	cmp	w3, w12
+	bcc	.L2198
+	add	w24, w24, 1
+	add	w1, w7, w1
+	and	w24, w24, 65535
+	and	w1, w1, 65535
+	b	.L2189
+.L2193:
+	ldrb	w5, [x13, 3]
+	add	w16, w15, w4
+	asr	w5, w5, w16
+	tbnz	x5, 0, .L2191
+	cmp	w6, 1
+	bls	.L2197
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L2192:
+	add	x5, x8, x23, sxtw 1
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	add	w0, w0, w14
+	strh	w0, [x5, 160]
+.L2191:
+	add	x4, x4, 1
+.L2194:
+	and	w0, w4, 65535
+	cmp	w0, w7
+	bcc	.L2193
+	add	w3, w3, 1
+	add	w0, w2, w14
+	and	w3, w3, 65535
+	add	w15, w15, w6
+	and	w14, w0, 65535
+	b	.L2190
+.L2197:
+	mov	w0, w1
+	b	.L2192
+.L2198:
+	mov	x4, 0
+	b	.L2194
 	.size	ftl_low_format, .-ftl_low_format
 	.section	.text.ftl_re_low_format_test,"ax",@progbits
 	.align	2
@@ -12297,11 +13474,11 @@ ftl_low_format:
 ftl_re_low_format_test:
 	stp	x29, x30, [sp, -64]!
 	mov	w1, 1
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	stp	x21, x22, [sp, 32]
 	adrp	x21, .LANCHOR2
 	str	x23, [sp, 48]
@@ -12309,7 +13486,7 @@ ftl_re_low_format_test:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	adrp	x3, .LANCHOR3
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	mov	w4, 0
@@ -12318,10 +13495,10 @@ ftl_re_low_format_test:
 	mov	w6, 0
 	ldrh	w1, [x0, 134]
 	add	x3, x3, x1, uxth 2
-.L1958:
+.L2209:
 	cmp	w1, w2
-	bcc	.L1962
-	adrp	x22, .LANCHOR4
+	bcc	.L2213
+	adrp	x23, .LANCHOR4
 	strh	w6, [x0, 114]
 	strh	w5, [x0, 118]
 	lsl	w2, w2, 1
@@ -12330,83 +13507,59 @@ ftl_re_low_format_test:
 	strh	wzr, [x0, 122]
 	strh	wzr, [x0, 120]
 	strh	wzr, [x0, 124]
-	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	bl	ftl_memset
 	bl	zftl_sblk_list_init
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
-	mov	w23, w0
+	mov	w22, w0
 	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
-	mov	w0, w23
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
+	mov	w0, w22
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
-	mov	w1, 65533
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrh	w20, [x0, 672]
 	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1963
-	adrp	x1, .LANCHOR162
+	mov	w0, 65533
+	sub	w1, w20, #1
+	cmp	w0, w1, uxth
+	bcs	.L2214
+	adrp	x1, .LANCHOR173
 	adrp	x0, .LC0
-	mov	w2, 1965
-	add	x1, x1, :lo12:.LANCHOR162
+	mov	w2, 1986
+	add	x1, x1, :lo12:.LANCHOR173
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1964:
-	b	.L1964
-.L1962:
-	ldrb	w7, [x3, 2]
-	and	w8, w7, 31
-	strb	w8, [x3, 2]
-	ands	w7, w7, 24
-	bne	.L1959
-	add	w6, w6, 1
-	and	w6, w6, 65535
-.L1960:
-	add	w1, w1, 1
-	add	x3, x3, 4
-	and	w1, w1, 65535
-	b	.L1958
-.L1959:
-	cmp	w7, 16
-	bne	.L1961
-	add	w5, w5, 1
-	and	w5, w5, 65535
-	b	.L1960
-.L1961:
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L1960
-.L1963:
-	strh	wzr, [x0, 696]
+.L2214:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 256
 	mov	w1, 255
 	add	x0, x0, 416
+	strh	wzr, [x0, 280]
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w2, 4096
 	mov	w1, 0
 	add	x0, x0, 704
 	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	lsr	w1, w20, 14
 	and	w20, w20, 16383
 	ldrh	w2, [x21, #:lo12:.LANCHOR2]
 	strh	w1, [x0, 694]
 	mov	w1, 1
 	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR161
+	adrp	x1, .LANCHOR172
 	strh	w20, [x0, 692]
 	adrp	x20, .LANCHOR5
-	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	ldrh	w1, [x1, #:lo12:.LANCHOR172]
 	lsl	w2, w2, 1
-	strh	w23, [x0, 416]
+	strh	w22, [x0, 416]
 	strh	w1, [x0, 698]
 	mov	w1, 0
-	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	bl	ftl_memset
 	ldr	x0, [x20, #:lo12:.LANCHOR5]
 	mov	w1, 2
@@ -12416,7 +13569,7 @@ ftl_re_low_format_test:
 	mov	w1, 3
 	add	x0, x0, 48
 	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	x0, [x20, #:lo12:.LANCHOR5]
 	add	x0, x0, 136
 	ldrh	w2, [x1, 134]
@@ -12452,6 +13605,29 @@ ftl_re_low_format_test:
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
+.L2213:
+	ldrb	w7, [x3, 2]
+	and	w8, w7, 31
+	strb	w8, [x3, 2]
+	ands	w7, w7, 24
+	bne	.L2210
+	add	w6, w6, 1
+	and	w6, w6, 65535
+.L2211:
+	add	w1, w1, 1
+	add	x3, x3, 4
+	and	w1, w1, 65535
+	b	.L2209
+.L2210:
+	cmp	w7, 16
+	bne	.L2212
+	add	w5, w5, 1
+	and	w5, w5, 65535
+	b	.L2211
+.L2212:
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L2211
 	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
 	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
@@ -12473,27 +13649,27 @@ ftl_prog_ppa_page:
 ftl_write_last_log_page:
 	ldrh	w1, [x0, 6]
 	cmp	w1, 1
-	bne	.L1969
+	bne	.L2219
 	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR105
+	adrp	x1, .LANCHOR106
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR105]
+	ldr	x20, [x1, #:lo12:.LANCHOR106]
 	ldrh	w22, [x0, 12]
 	bl	ftl_get_new_free_page
 	mov	w21, w0
 	cmn	w0, #1
-	beq	.L1970
+	beq	.L2220
 	ldrh	w0, [x19]
 	add	x20, x20, x22, uxth 2
 	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR145
+	adrp	x0, .LANCHOR152
 	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR145
+	add	x6, x0, :lo12:.LANCHOR152
 	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR145]
+	str	w1, [x0, #:lo12:.LANCHOR152]
 	adrp	x0, .LANCHOR80
 	ldrh	w1, [x0, #:lo12:.LANCHOR80]
 	adrp	x0, .LANCHOR72
@@ -12503,20 +13679,20 @@ ftl_write_last_log_page:
 	lsl	w1, w1, 2
 	bl	js_hash
 	stp	w0, wzr, [x6, 4]
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR114
 	mov	x2, x6
 	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	ldrb	w3, [x0, #:lo12:.LANCHOR114]
 	mov	w0, w21
 	str	wzr, [x6, 12]
 	bl	ftl_prog_ppa_page
-.L1970:
+.L2220:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L1969:
+.L2219:
 	mov	w0, -1
 	ret
 	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
@@ -12525,48 +13701,48 @@ ftl_write_last_log_page:
 	.global	ftl_open_sblk_recovery
 	.type	ftl_open_sblk_recovery, %function
 ftl_open_sblk_recovery:
-	sub	sp, sp, #176
+	sub	sp, sp, #192
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x21, x22, [sp, 80]
-	adrp	x22, .LANCHOR29
+	adrp	x22, .LANCHOR7
 	stp	x27, x28, [sp, 128]
 	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
 	stp	x25, x26, [sp, 112]
 	mov	x25, x1
 	stp	x19, x20, [sp, 64]
 	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L1976
+	tbz	x0, 12, .L2226
 	ldrh	w1, [x28, 2]
-	adrp	x0, .LC78
-	add	x0, x0, :lo12:.LC78
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L1976:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1977
+.L2226:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2227
 	ldrb	w1, [x28, 5]
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
 	bl	printf
-.L1977:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1978
+.L2227:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2228
 	ldrh	w1, [x28]
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
 	bl	printf
-.L1978:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1979
+.L2228:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2229
 	ldrh	w2, [x28, 18]
-	adrp	x0, .LC81
+	adrp	x0, .LC128
 	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC81
+	add	x0, x0, :lo12:.LC128
 	bl	printf
-.L1979:
+.L2229:
 	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR52
+	adrp	x26, .LANCHOR114
 	strh	w0, [x28, 14]
 	mov	w27, 0
 	mov	w0, 1
@@ -12575,130 +13751,152 @@ ftl_open_sblk_recovery:
 	ldrb	w20, [x28, 5]
 	ldrh	w21, [x28, 2]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR52
-	str	x0, [x29, 120]
-.L1980:
+	add	x0, x26, :lo12:.LANCHOR114
+	str	x0, [x29, 128]
+.L2230:
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	cmp	w0, w21
-	bhi	.L1996
-.L1983:
-	strb	w20, [x28, 5]
-	ldrh	w0, [x23, #:lo12:.LANCHOR80]
-	ldrb	w20, [x28, 9]
-	ldrh	w2, [x28, 10]
+	bhi	.L2244
+.L2233:
+	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
+	ldrh	w2, [x23, #:lo12:.LANCHOR80]
+	add	w1, w1, w0
+	ldrb	w0, [x28, 9]
 	strh	w21, [x28, 2]
-	mul	w20, w20, w0
-	add	w1, w1, w2
-	cmp	w1, w20
-	bne	.L1997
-	adrp	x21, .LANCHOR105
+	strb	w20, [x28, 5]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L2245
+	adrp	x1, .LANCHOR174
+	adrp	x0, .LC0
+	mov	w2, 1347
+	add	x1, x1, :lo12:.LANCHOR174
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2245:
+	adrp	x21, .LANCHOR106
+	ldrh	w3, [x28, 10]
 	mov	w0, 0
 	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR105]
-.L1998:
-	cmp	w1, w2
-	bcc	.L2001
-	sub	w20, w20, w2
+	ldr	x4, [x21, #:lo12:.LANCHOR106]
+.L2246:
+	cmp	w1, w3
+	bcc	.L2248
+	ldrb	w20, [x28, 9]
 	adrp	x24, .LANCHOR4
-	add	w0, w0, w20
-	and	w20, w0, 65535
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2002
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	madd	w20, w20, w1, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	sub	w20, w20, w3
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2249
 	ldrh	w1, [x28]
 	ldr	x2, [x24, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC83
+	adrp	x0, .LC130
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC83
+	add	x0, x0, :lo12:.LC130
 	bl	printf
-.L2002:
+.L2249:
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	adrp	x25, .LANCHOR52
+	adrp	x25, .LANCHOR114
 	ldrh	w1, [x28]
 	adrp	x24, .LANCHOR72
-	adrp	x26, .LC84
+	adrp	x26, .LC131
 	add	x24, x24, :lo12:.LANCHOR72
-	add	x25, x25, :lo12:.LANCHOR52
-	add	x26, x26, :lo12:.LC84
+	add	x25, x25, :lo12:.LANCHOR114
+	add	x26, x26, :lo12:.LC131
 	strh	w20, [x0, x1, lsl 1]
 	mov	w20, 0
 	mov	x0, x19
 	bl	buf_free
-.L2003:
+.L2250:
 	ldrb	w0, [x24]
 	cmp	w20, w0, lsl 1
-	bcc	.L2006
+	bcc	.L2253
 	ldrh	w1, [x28, 12]
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	ldrb	w2, [x28, 9]
 	madd	w0, w0, w2, w1
 	mov	x1, -4
 	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR105]
+	ldr	x1, [x21, #:lo12:.LANCHOR106]
 	ldr	w0, [x1, x0]
 	cmn	w0, #1
-	beq	.L2007
-	adrp	x1, .LANCHOR163
+	beq	.L2254
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1359
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 1377
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2008:
-	b	.L2008
-.L1996:
+.L2254:
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bne	.L2225
+	ldp	x19, x20, [sp, 64]
+	mov	x0, x28
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 192
+	b	ftl_write_last_log_page
+.L2244:
 	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR99
-	add	x24, x24, :lo12:.LANCHOR99
-.L1981:
+	adrp	x0, .LANCHOR99
+	add	x0, x0, :lo12:.LANCHOR99
+	str	x0, [x29, 136]
+.L2231:
 	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bhi	.L1995
+	bhi	.L2243
 	add	w21, w21, 1
 	strb	wzr, [x28, 5]
 	and	w21, w21, 65535
-	b	.L1980
-.L1995:
+	b	.L2230
+.L2243:
 	add	x0, x28, x20, sxtw 1
-	ldrh	w12, [x0, 16]
+	ldrh	w11, [x0, 16]
 	mov	w0, 65535
-	cmp	w12, w0
-	beq	.L1982
-	ldrh	w11, [x24]
-	ldrb	w3, [x26, #:lo12:.LANCHOR52]
+	cmp	w11, w0
+	beq	.L2232
+	ldr	x0, [x29, 136]
+	ldrb	w3, [x26, #:lo12:.LANCHOR114]
 	ldr	x1, [x19, 8]
 	ldr	x2, [x19, 24]
-	madd	w11, w11, w12, w21
-	stp	w12, w11, [x29, 108]
-	mov	w0, w11
+	ldrh	w10, [x0]
+	madd	w10, w10, w11, w21
+	stp	w11, w10, [x29, 116]
+	mov	w0, w10
 	bl	ftl_read_ppa_page
-	mov	w10, w0
+	mov	w24, w0
 	cmp	w0, 512
-	beq	.L1983
+	beq	.L2233
 	cmn	w0, #1
-	ldp	w12, w11, [x29, 108]
-	beq	.L1984
+	ldp	w11, w10, [x29, 116]
+	beq	.L2234
 	ldr	x0, [x19, 24]
 	ldr	w1, [x0]
 	cmn	w1, #1
-	bne	.L1984
+	bne	.L2234
 	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	bne	.L1984
+	bne	.L2234
 	ldr	x0, [x19, 8]
 	ldr	w0, [x0]
 	cmn	w0, #1
-	beq	.L1983
-.L1984:
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L1985
+	beq	.L2233
+.L2234:
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2235
 	ldr	x1, [x19, 24]
-	mov	w4, w10
+	mov	w4, w24
 	ldr	x0, [x19, 8]
-	mov	w3, w11
-	str	w10, [x29, 112]
+	mov	w3, w10
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
 	ldr	w2, [x1, 8]
@@ -12710,109 +13908,102 @@ ftl_open_sblk_recovery:
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w12
+	mov	w1, w11
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
-	ldr	w10, [x29, 112]
-.L1985:
-	ldrb	w2, [x28, 9]
-	adrp	x0, .LANCHOR157
+.L2235:
+	adrp	x0, .LANCHOR167
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR157]
-	ldrh	w0, [x28, 10]
-	madd	w1, w21, w2, w20
-	cmp	w0, w1
-	beq	.L1986
-	adrp	x1, .LANCHOR163
+	strb	w1, [x0, #:lo12:.LANCHOR167]
+	ldrb	w0, [x28, 9]
+	ldrh	w1, [x28, 10]
+	madd	w0, w0, w21, w20
+	cmp	w1, w0
+	beq	.L2236
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1255
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 1270
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1987:
-	b	.L1987
-.L1986:
+.L2236:
+	ldrh	w0, [x28, 10]
 	ldrh	w1, [x28, 6]
+	ldrb	w2, [x28, 9]
 	add	w1, w1, w0
 	ldrh	w0, [x23, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L1988
-	adrp	x1, .LANCHOR163
+	beq	.L2237
+	adrp	x1, .LANCHOR174
 	adrp	x0, .LC0
-	mov	w2, 1256
-	add	x1, x1, :lo12:.LANCHOR163
+	mov	w2, 1271
+	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1989:
-	b	.L1989
-.L1988:
-	cmn	w10, #1
-	beq	.L1991
-	ldr	x5, [x19, 24]
-	str	x5, [x29, 112]
-	ldr	w0, [x5, 4]
+.L2237:
+	cmn	w24, #1
+	beq	.L2239
+	ldr	x0, [x19, 24]
+	ldr	w0, [x0, 4]
 	cmn	w0, #1
-	beq	.L1991
+	beq	.L2239
 	bl	lpa_hash_get_ppa
-	cbz	x25, .L1993
-	ldr	x5, [x29, 112]
-	ldr	w1, [x5, 8]
+	cbz	x25, .L2241
+	ldr	x3, [x19, 24]
+	ldr	w1, [x3, 8]
 	cmp	w0, w1
-	beq	.L1993
+	beq	.L2241
 	cmn	w0, #1
-	beq	.L1993
-	adrp	x3, .LANCHOR96
-	mov	w1, 21
-	adrp	x27, .LANCHOR95
-	ldrh	w6, [x3, #:lo12:.LANCHOR96]
-	sub	w4, w1, w6
-	mov	w1, 1
-	lsr	w2, w0, w6
-	lsl	w1, w1, w4
+	beq	.L2241
+	adrp	x4, .LANCHOR96
+	mov	w27, 21
+	mov	w24, 1
+	ldrh	w5, [x4, #:lo12:.LANCHOR96]
+	sub	w1, w27, w5
+	lsr	w2, w0, w5
+	adrp	x5, .LANCHOR95
+	lsl	w1, w24, w1
 	sub	w1, w1, #1
 	and	w1, w1, w2
-	ldrb	w2, [x27, #:lo12:.LANCHOR95]
-	mov	x4, x3
+	ldrb	w2, [x5, #:lo12:.LANCHOR95]
 	udiv	w1, w1, w2
 	ldrh	w2, [x25]
 	cmp	w2, w1, uxth
-	bne	.L1993
-	ldr	x1, [x29, 120]
-	ldr	w6, [x5]
-	adrp	x5, .LANCHOR154
-	str	w6, [x29, 108]
-	add	x2, x5, :lo12:.LANCHOR154
-	str	x5, [x29, 112]
+	bne	.L2241
+	ldr	x1, [x29, 128]
+	adrp	x6, .LANCHOR163
+	ldr	w7, [x3]
+	add	x2, x6, :lo12:.LANCHOR163
+	str	w7, [x29, 116]
+	str	x6, [x29, 120]
 	ldrb	w3, [x1]
 	ldr	x1, [x19, 8]
-	str	x4, [x29, 96]
+	stp	x5, x4, [x29, 96]
 	bl	ftl_read_ppa_page
-	ldr	x5, [x29, 112]
-	ldr	w6, [x29, 108]
-	ldr	w0, [x5, #:lo12:.LANCHOR154]
-	cmp	w6, w0
-	bhi	.L1993
+	ldr	x6, [x29, 120]
+	ldr	w7, [x29, 116]
+	ldr	w0, [x6, #:lo12:.LANCHOR163]
+	cmp	w7, w0
+	bhi	.L2241
 	ldr	x0, [x19, 24]
-	ldr	w1, [x0, 8]
-	cmn	w1, #1
-	beq	.L1991
-	ldr	x4, [x29, 96]
-	mov	w0, 21
-	ldrh	w3, [x4, #:lo12:.LANCHOR96]
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	ldrb	w1, [x27, #:lo12:.LANCHOR95]
-	udiv	w0, w0, w1
+	ldr	w0, [x0, 8]
+	cmn	w0, #1
+	beq	.L2239
+	ldp	x5, x4, [x29, 96]
+	ldrh	w1, [x4, #:lo12:.LANCHOR96]
+	sub	w27, w27, w1
+	lsr	w0, w0, w1
+	lsl	w24, w24, w27
+	sub	w24, w24, #1
+	and	w24, w24, w0
+	ldrb	w0, [x5, #:lo12:.LANCHOR95]
+	udiv	w0, w24, w0
 	bl	ftl_vpn_decrement
-.L1991:
+.L2239:
 	ldrh	w0, [x28, 6]
 	mov	w27, 1
 	sub	w0, w0, #1
@@ -12820,50 +14011,41 @@ ftl_open_sblk_recovery:
 	ldrh	w0, [x28, 10]
 	add	w0, w0, 1
 	strh	w0, [x28, 10]
-.L1982:
+.L2232:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L1981
-.L1997:
-	adrp	x1, .LANCHOR163
-	adrp	x0, .LC0
-	mov	w2, 1332
-	add	x1, x1, :lo12:.LANCHOR163
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1999:
-	b	.L1999
-.L2001:
-	ldrh	w3, [x28, 12]
-	add	w3, w3, w1
-	ldr	w3, [x4, x3, lsl 2]
-	cmn	w3, #1
-	beq	.L2000
-	add	w0, w0, 1
-	and	w0, w0, 65535
-.L2000:
+	b	.L2231
+.L2248:
+	ldrh	w2, [x28, 12]
+	add	w2, w2, w1
+	ldr	w2, [x4, x2, lsl 2]
+	cmn	w2, #1
+	beq	.L2247
+	add	w20, w0, 1
+	and	w0, w20, 65535
+.L2247:
 	add	w1, w1, 1
-	b	.L1998
-.L2006:
-	cbz	w27, .L2004
+	b	.L2246
+.L2253:
+	cbz	w27, .L2251
 	ldrh	w0, [x28, 6]
 	cmp	w0, 1
-	bls	.L2004
+	bls	.L2251
 	mov	x0, x28
 	bl	ftl_get_new_free_page
 	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2005
+	ldr	w0, [x22, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2252
 	mov	w1, w4
-	str	w4, [x29, 120]
+	str	w4, [x29, 136]
 	mov	x0, x26
 	bl	printf
-	ldr	w4, [x29, 120]
-.L2005:
-	adrp	x0, .LANCHOR53
+	ldr	w4, [x29, 136]
+.L2252:
+	adrp	x0, .LANCHOR101
 	ldr	x2, [x19, 24]
 	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	ldr	w0, [x0, 8]
 	str	w0, [x2]
 	str	wzr, [x2, 12]
@@ -12875,57 +14057,44 @@ ftl_open_sblk_recovery:
 	bl	ftl_prog_ppa_page
 	ldrh	w0, [x28]
 	bl	ftl_vpn_decrement
-.L2004:
+.L2251:
 	add	w20, w20, 1
-	b	.L2003
-.L2007:
-	ldrh	w0, [x28, 6]
-	cmp	w0, 1
-	bne	.L1975
-	ldp	x19, x20, [sp, 64]
-	mov	x0, x28
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
-	b	ftl_write_last_log_page
-.L1993:
+	b	.L2250
+.L2241:
 	ldr	x3, [x19, 24]
 	adrp	x0, .LANCHOR54
 	ldr	w0, [x0, #:lo12:.LANCHOR54]
 	ldr	w1, [x3, 4]
 	cmp	w1, w0
-	bcs	.L1991
+	bcs	.L2239
 	ldrb	w0, [x28, 9]
 	ldrh	w1, [x23, #:lo12:.LANCHOR80]
 	ldrh	w2, [x28, 10]
 	mul	w0, w0, w1
 	sub	w0, w0, #1
 	cmp	w2, w0
-	bge	.L1991
-	adrp	x0, .LANCHOR53
+	bge	.L2239
+	adrp	x0, .LANCHOR101
 	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	ldr	w4, [x0, 8]
 	cmp	w1, w4
-	bls	.L1994
+	bls	.L2242
 	str	w1, [x0, 8]
-.L1994:
+.L2242:
 	ldrh	w0, [x28, 12]
 	add	w2, w2, w0
 	ldp	w0, w1, [x3, 4]
 	bl	lpa_hash_update_ppa
-	b	.L1991
-.L1975:
+	b	.L2239
+.L2225:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
 	ldp	x25, x26, [sp, 112]
 	ldp	x27, x28, [sp, 128]
 	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
+	add	sp, sp, 192
 	ret
 	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
 	.section	.text.pm_write_page,"ax",@progbits
@@ -12936,89 +14105,96 @@ pm_write_page:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR80
-	stp	x21, x22, [sp, 32]
 	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR80
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR53
-	mov	x24, x1
-	add	x20, x20, :lo12:.LANCHOR80
-	mov	x21, x22
+	adrp	x22, .LANCHOR99
 	stp	x25, x26, [sp, 64]
-	mov	w23, 65535
+	adrp	x23, .LANCHOR101
+	mov	x25, x1
+	add	x21, x21, :lo12:.LANCHOR80
+	mov	x20, x23
+	add	x22, x22, :lo12:.LANCHOR99
+	mov	w24, 65535
 	str	x27, [sp, 80]
-.L2058:
-	adrp	x25, .LANCHOR99
-.L2063:
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+.L2307:
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldr	w1, [x0, 48]
 	ldrh	w2, [x0, 696]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	ldrh	w1, [x20]
+	ldrh	w1, [x21]
 	cmp	w2, w1
-	bcs	.L2059
+	bcs	.L2308
 	ldrh	w0, [x0, 692]
-	cmp	w0, w23
-	bne	.L2060
-.L2059:
+	cmp	w0, w24
+	bne	.L2309
+.L2308:
 	bl	pm_alloc_new_blk
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2060:
-	ldr	x1, [x21, #:lo12:.LANCHOR53]
-	ldrh	w0, [x1, 692]
-	cmp	w0, w23
-	bne	.L2061
-	adrp	x1, .LANCHOR164
+.L2309:
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	ldrh	w0, [x0, 692]
+	cmp	w0, w24
+	bne	.L2310
+	adrp	x1, .LANCHOR175
 	adrp	x0, .LC0
-	mov	w2, 224
-	add	x1, x1, :lo12:.LANCHOR164
+	mov	w2, 228
+	add	x1, x1, :lo12:.LANCHOR175
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2062:
-	b	.L2062
-.L2061:
-	ldrh	w1, [x1, 696]
-	adrp	x27, .LANCHOR165
-	ldrh	w26, [x25, #:lo12:.LANCHOR99]
+.L2310:
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
+	adrp	x27, .LANCHOR176
+	ldrh	w1, [x22]
 	mov	w2, 64
-	madd	w26, w26, w0, w1
-	ldr	x0, [x27, #:lo12:.LANCHOR165]
+	ldrh	w26, [x0, 692]
+	ldrh	w0, [x0, 696]
+	madd	w26, w26, w1, w0
+	ldr	x0, [x27, #:lo12:.LANCHOR176]
 	mov	w1, 0
 	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR165]
-	mov	x2, x24
-	ldr	x0, [x21, #:lo12:.LANCHOR53]
+	ldr	x3, [x27, #:lo12:.LANCHOR176]
+	mov	x2, x25
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	str	w19, [x3]
 	ldr	w1, [x0, 48]
 	ldrb	w0, [x0, 694]
 	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR52
-	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR114
+	ldrb	w4, [x1, #:lo12:.LANCHOR114]
 	mov	w1, w26
 	bl	ftl_prog_page
-	ldr	x2, [x21, #:lo12:.LANCHOR53]
+	ldr	x2, [x20, #:lo12:.LANCHOR101]
 	ldrh	w1, [x2, 696]
 	add	w1, w1, 1
 	and	w1, w1, 65535
 	strh	w1, [x2, 696]
 	cmp	w1, 1
-	beq	.L2063
+	adrp	x1, .LANCHOR177
+	beq	.L2311
+	ldrb	w3, [x1, #:lo12:.LANCHOR177]
+	cbz	w3, .L2312
+.L2311:
+	strb	wzr, [x1, #:lo12:.LANCHOR177]
+	b	.L2307
+.L2312:
 	cmn	w0, #1
-	bne	.L2064
+	bne	.L2314
 	mov	w1, w26
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
+	adrp	x0, .LC132
+	add	x0, x0, :lo12:.LC132
 	bl	printf
-	b	.L2058
-.L2064:
+	b	.L2307
+.L2314:
 	ldrh	w0, [x2, 698]
 	cmp	w19, w0
-	bcs	.L2065
+	bcs	.L2315
 	add	x19, x2, x19, uxtw 2
 	str	w26, [x19, 704]
-.L2065:
+.L2315:
 	mov	w0, 0
 	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
@@ -13034,41 +14210,51 @@ pm_write_page:
 	.type	flash_info_flush, %function
 flash_info_flush:
 	stp	x29, x30, [sp, -112]!
-	mov	w2, 64
-	mov	w1, 0
+	adrp	x0, .LANCHOR7
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR140
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR12
-	ldr	x0, [x23, #:lo12:.LANCHOR140]
-	adrp	x24, .LC87
 	stp	x21, x22, [sp, 32]
-	add	x24, x24, :lo12:.LC87
+	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR141
 	stp	x27, x28, [sp, 80]
-	adrp	x22, .LANCHOR20
+	tbz	x0, 12, .L2321
+	adrp	x2, .LANCHOR178
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR178
+	mov	w1, 251
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2321:
+	adrp	x23, .LANCHOR147
+	adrp	x20, .LANCHOR20
+	mov	w2, 64
+	mov	w1, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR147]
+	adrp	x21, .LANCHOR148
+	adrp	x22, .LANCHOR26
+	adrp	x24, .LC134
+	adrp	x25, .LANCHOR125
+	add	x22, x22, :lo12:.LANCHOR26
+	add	x24, x24, :lo12:.LC134
+	add	x25, x25, :lo12:.LANCHOR125
 	bl	ftl_memset
-	adrp	x25, .LANCHOR121
-	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	add	x27, x21, :lo12:.LANCHOR148
+	ldr	x1, [x20, #:lo12:.LANCHOR20]
 	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC86
-	add	x0, x0, :lo12:.LC86
-	add	x22, x22, :lo12:.LANCHOR20
-	add	x25, x25, :lo12:.LANCHOR121
-	add	x27, x21, :lo12:.LANCHOR141
-	bl	rknand_print_hex
+	adrp	x0, .LC133
+	add	x0, x0, :lo12:.LC133
 	mov	w26, 0
-	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	bl	rknand_print_hex
+	ldr	x6, [x20, #:lo12:.LANCHOR20]
 	add	x0, x6, 16
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	str	w0, [x6, 12]
-.L2070:
-	add	x28, x21, :lo12:.LANCHOR141
-	ldrb	w4, [x21, #:lo12:.LANCHOR141]
+.L2322:
+	add	x28, x21, :lo12:.LANCHOR148
+	ldrb	w4, [x21, #:lo12:.LANCHOR148]
 	ldrh	w19, [x22]
 	mov	x0, x24
 	mov	w1, w4
@@ -13081,40 +14267,40 @@ flash_info_flush:
 	sub	w0, w0, #1
 	cmp	w1, w0
 	ldp	w3, w4, [x29, 104]
-	blt	.L2071
-	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	blt	.L2323
+	ldr	x6, [x20, #:lo12:.LANCHOR20]
 	ldrb	w7, [x28, 1]
 	strh	wzr, [x28, 2]
 	ldr	w0, [x6, 4]
 	ldrh	w1, [x6, 16]
 	add	w0, w0, 1
 	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR141]
+	ldrb	w0, [x21, #:lo12:.LANCHOR148]
 	add	w1, w1, 1
 	strb	w0, [x28, 1]
 	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR141]
+	strb	w7, [x21, #:lo12:.LANCHOR148]
 	strh	w1, [x0, 16]!
 	ldr	w1, [x6, 8]
 	bl	js_hash
 	ldrh	w19, [x22]
 	str	w0, [x6, 12]
 	mul	w19, w19, w7
-.L2077:
+.L2332:
 	mov	w1, w19
 	mov	w0, 0
 	bl	flash_erase_block
-	b	.L2072
-.L2075:
+	b	.L2324
+.L2327:
 	mov	w26, 1
-	b	.L2070
-.L2071:
+	b	.L2322
+.L2323:
 	madd	w19, w19, w4, w3
-	cbz	w1, .L2077
-.L2072:
-	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	cbz	w1, .L2332
+.L2324:
+	ldr	x2, [x20, #:lo12:.LANCHOR20]
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR140]
+	ldr	x3, [x23, #:lo12:.LANCHOR147]
 	mov	w5, 1
 	mov	w4, 4
 	ldr	w0, [x2, 4]
@@ -13128,14 +14314,14 @@ flash_info_flush:
 	ldrh	w1, [x27, 2]
 	add	w1, w1, 1
 	strh	w1, [x27, 2]
-	bne	.L2073
+	bne	.L2325
 	mov	w1, w19
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
 	bl	printf
-	b	.L2070
-.L2073:
-	cbz	w26, .L2075
+	b	.L2322
+.L2325:
+	cbz	w26, .L2327
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -13150,325 +14336,380 @@ flash_info_flush:
 	.global	nand_flash_init
 	.type	nand_flash_init, %function
 nand_flash_init:
-	stp	x29, x30, [sp, -80]!
-	mov	w2, 2
-	adrp	x1, .LANCHOR27
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR41
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR33
-	add	x23, x21, :lo12:.LANCHOR33
+	adrp	x21, .LANCHOR7
 	stp	x19, x20, [sp, 16]
-	str	x25, [sp, 64]
-	mov	x24, x23
-	strb	w2, [x1, #:lo12:.LANCHOR27]
+	mov	x19, x0
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2334
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2083
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2334:
+	adrp	x22, .LANCHOR9
+	adrp	x20, .LANCHOR38
+	add	x24, x20, :lo12:.LANCHOR38
+	mov	x0, x19
+	adrp	x25, .LANCHOR33
 	bl	nandc_init
-	adrp	x19, .LANCHOR26
-	mov	w20, 0
-	add	x0, x19, :lo12:.LANCHOR26
-	mov	w25, 44
-	str	x0, [x22, #:lo12:.LANCHOR41]
-.L2084:
-	mov	x1, x23
-	mov	w0, w20
+	add	x25, x25, :lo12:.LANCHOR33
+	mov	x26, x24
+	adrp	x19, .LANCHOR32
+	mov	x23, 0
+	add	x0, x19, :lo12:.LANCHOR32
+	mov	w27, 2
+	str	x0, [x22, #:lo12:.LANCHOR9]
+	mov	w28, 44
+.L2340:
+	mov	x1, x24
+	mov	w0, w23
 	bl	flash_read_id
-	cbnz	w20, .L2079
-	ldrb	w0, [x24]
+	strb	w27, [x23, x25]
+	cbnz	x23, .L2335
+	ldrb	w0, [x26]
 	sub	w0, w0, #1
 	and	w0, w0, 255
 	cmp	w0, 253
-	bls	.L2080
-.L2082:
-	mov	w0, -2
-.L2078:
+	bls	.L2336
+.L2338:
+	mov	w19, -2
+.L2333:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2080:
-	ldrb	w0, [x24, 1]
+.L2336:
+	ldrb	w0, [x26, 1]
 	cmp	w0, 255
-	beq	.L2082
-.L2079:
-	ldrb	w0, [x23]
+	beq	.L2338
+.L2335:
+	ldrb	w0, [x24]
 	cmp	w0, 181
-	bne	.L2083
-	strb	w25, [x23]
-.L2083:
-	add	w20, w20, 1
-	add	x23, x23, 8
-	and	w20, w20, 255
-	cmp	w20, 4
-	bne	.L2084
-	adrp	x0, .LANCHOR166
-	add	x8, x0, :lo12:.LANCHOR166
+	bne	.L2339
+	strb	w28, [x24]
+.L2339:
+	add	x23, x23, 1
+	add	x24, x24, 8
+	cmp	x23, 4
+	bne	.L2340
+	adrp	x0, .LANCHOR180
+	add	x8, x0, :lo12:.LANCHOR180
 	add	x8, x8, 1
 	mov	x7, x0
-	add	x12, x21, :lo12:.LANCHOR33
+	add	x12, x20, :lo12:.LANCHOR38
 	mov	x10, 0
-.L2087:
+.L2343:
 	ldrb	w2, [x8, -1]
 	mov	w11, w10
-	lsl	x23, x10, 5
+	lsl	x24, x10, 5
 	mov	x1, x12
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L2085
-	add	x0, x7, :lo12:.LANCHOR166
+	cbnz	w0, .L2341
+	add	x0, x7, :lo12:.LANCHOR180
 	ubfiz	x11, x11, 5, 32
-	add	x23, x0, x23
+	add	x24, x0, x24
 	add	x0, x0, x11
-	adrp	x1, .LANCHOR167
-	add	x4, x1, :lo12:.LANCHOR167
+	adrp	x1, .LANCHOR181
+	add	x4, x1, :lo12:.LANCHOR181
 	ldrb	w3, [x0, 22]
 	mov	x0, 0
-.L2086:
+.L2342:
 	lsl	x5, x0, 5
 	mov	w2, w0
 	ldrb	w5, [x5, x4]
 	cmp	w5, w3
-	beq	.L2088
+	beq	.L2344
 	add	x0, x0, 1
 	cmp	x0, 4
-	bne	.L2086
+	bne	.L2342
 	mov	w2, w0
-.L2088:
+.L2344:
 	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, :lo12:.LANCHOR181
 	add	x1, x1, x0
 	mov	w2, 32
-	adrp	x0, .LANCHOR129
-	add	x20, x19, :lo12:.LANCHOR26
-	add	x0, x0, :lo12:.LANCHOR129
+	adrp	x0, .LANCHOR13
+	add	x0, x0, :lo12:.LANCHOR13
 	bl	ftl_memcpy
-	mov	x1, x23
+	add	x23, x19, :lo12:.LANCHOR32
+	mov	x1, x24
+	adrp	x24, .LANCHOR22
 	mov	w2, 32
-	mov	x0, x20
+	mov	x0, x23
 	bl	ftl_memcpy
-	adrp	x1, .LANCHOR14
-	mov	x23, x1
-	ldrb	w0, [x1, #:lo12:.LANCHOR14]
+	ldrb	w0, [x24, #:lo12:.LANCHOR22]
 	cmp	w0, 8
-	bhi	.L2089
-	ldrb	w1, [x20, 20]
+	bhi	.L2345
+	ldrb	w1, [x23, 20]
 	cmp	w1, 60
-	bls	.L2090
+	bls	.L2346
 	mov	w1, 60
-	strb	w1, [x20, 20]
-.L2090:
+	strb	w1, [x23, 20]
+.L2346:
 	cmp	w0, 8
-	bne	.L2089
-	ldrb	w0, [x21, #:lo12:.LANCHOR33]
+	bne	.L2345
+	ldrb	w0, [x20, #:lo12:.LANCHOR38]
 	cmp	w0, 44
-	bne	.L2089
-	add	x0, x19, :lo12:.LANCHOR26
+	bne	.L2345
+	add	x0, x19, :lo12:.LANCHOR32
 	ldrb	w1, [x0, 28]
 	cmp	w1, 3
-	bne	.L2089
+	bne	.L2345
 	strb	wzr, [x0, 28]
-.L2089:
+.L2345:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2347
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2104
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2347:
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR143
-	adrp	x21, .LANCHOR12
-	add	x20, x19, :lo12:.LANCHOR26
-	str	x0, [x1, #:lo12:.LANCHOR143]
+	adrp	x1, .LANCHOR150
+	adrp	x25, .LANCHOR20
+	add	x20, x19, :lo12:.LANCHOR32
+	adrp	x23, .LANCHOR39
+	str	x0, [x1, #:lo12:.LANCHOR150]
 	mov	w0, 16384
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR135
-	str	x0, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR140
+	str	x0, [x1, #:lo12:.LANCHOR140]
 	mov	w0, 2048
 	bl	ftl_malloc
-	str	x0, [x21, #:lo12:.LANCHOR12]
+	str	x0, [x25, #:lo12:.LANCHOR20]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR142
-	str	x0, [x1, #:lo12:.LANCHOR142]
+	adrp	x1, .LANCHOR149
+	str	x0, [x1, #:lo12:.LANCHOR149]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR136
-	str	x0, [x1, #:lo12:.LANCHOR136]
+	adrp	x1, .LANCHOR142
+	str	x0, [x1, #:lo12:.LANCHOR142]
 	mov	w0, 64
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR140
-	str	x0, [x1, #:lo12:.LANCHOR140]
-	adrp	x0, .LANCHOR147
-	strb	wzr, [x0, #:lo12:.LANCHOR147]
+	adrp	x1, .LANCHOR147
+	str	x0, [x1, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR154
+	strb	wzr, [x0, #:lo12:.LANCHOR154]
 	bl	flash_die_info_init
 	ldrb	w0, [x20, 18]
 	bl	flash_lsb_page_tbl_build
 	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR139
+	adrp	x20, .LANCHOR145
 	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR139]
-	ldr	x1, [x22, #:lo12:.LANCHOR41]
-	adrp	x22, .LANCHOR32
+	str	xzr, [x20, #:lo12:.LANCHOR145]
+	ldr	x1, [x22, #:lo12:.LANCHOR9]
+	mov	x22, x25
 	ldrh	w0, [x1, 16]
-	lsr	w3, w0, 8
-	ubfx	x4, x0, 3, 1
-	and	w2, w3, 7
-	strb	w2, [x22, #:lo12:.LANCHOR32]
-	adrp	x2, .LANCHOR168
-	strb	w4, [x2, #:lo12:.LANCHOR168]
-	adrp	x2, .LANCHOR30
-	ubfx	x4, x0, 4, 1
-	strb	w4, [x2, #:lo12:.LANCHOR30]
+	ubfx	x2, x0, 8, 3
+	strb	w2, [x23, #:lo12:.LANCHOR39]
+	adrp	x2, .LANCHOR182
+	ubfx	x3, x0, 3, 1
+	strb	w3, [x2, #:lo12:.LANCHOR182]
+	adrp	x2, .LANCHOR36
+	ubfx	x3, x0, 4, 1
+	strb	w3, [x2, #:lo12:.LANCHOR36]
 	adrp	x2, .LANCHOR69
-	ubfx	x4, x0, 12, 1
-	strb	w4, [x2, #:lo12:.LANCHOR69]
+	ubfx	x3, x0, 12, 1
+	strb	w3, [x2, #:lo12:.LANCHOR69]
 	adrp	x2, .LANCHOR98
-	ubfx	x4, x0, 13, 1
+	ubfx	x3, x0, 13, 1
 	ubfx	x0, x0, 14, 1
-	strb	w4, [x2, #:lo12:.LANCHOR98]
-	adrp	x2, .LANCHOR19
-	strb	w0, [x2, #:lo12:.LANCHOR19]
+	strb	w3, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR25
+	strb	w0, [x2, #:lo12:.LANCHOR25]
 	mov	w2, 60
 	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR18
-	strb	w0, [x1, #:lo12:.LANCHOR18]
-	adrp	x1, .LANCHOR169
-	strb	w2, [x1, #:lo12:.LANCHOR169]
-	ldrb	w2, [x23, #:lo12:.LANCHOR14]
+	adrp	x1, .LANCHOR11
+	strb	w0, [x1, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR10
+	strb	w2, [x1, #:lo12:.LANCHOR10]
+	ldrb	w2, [x24, #:lo12:.LANCHOR22]
 	cmp	w2, 9
-	bne	.L2091
+	bne	.L2348
 	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR169]
-.L2091:
-	add	x19, x19, :lo12:.LANCHOR26
-	adrp	x1, .LANCHOR170
-	adrp	x23, .LANCHOR9
-	strb	w0, [x1, #:lo12:.LANCHOR170]
+	strb	w2, [x1, #:lo12:.LANCHOR10]
+.L2348:
+	add	x19, x19, :lo12:.LANCHOR32
+	adrp	x1, .LANCHOR155
+	adrp	x25, .LANCHOR17
+	strb	w0, [x1, #:lo12:.LANCHOR155]
 	ldrh	w1, [x19, 16]
 	ldrb	w0, [x19, 19]
-	strb	w0, [x23, #:lo12:.LANCHOR9]
-	tbz	x1, 6, .L2093
+	strb	w0, [x25, #:lo12:.LANCHOR17]
+	tbz	x1, 6, .L2350
 	sub	w1, w0, #17
 	and	w1, w1, 255
 	cmp	w1, 2
-	bhi	.L2094
+	bhi	.L2351
 	adrp	x1, micron_read_retrial
 	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR139]
+	str	x1, [x20, #:lo12:.LANCHOR145]
 	cmp	w0, 19
-	adrp	x0, .LANCHOR137
-	beq	.L2095
+	adrp	x0, .LANCHOR143
+	beq	.L2352
 	mov	w1, 7
-.L2122:
-	strb	w1, [x0, #:lo12:.LANCHOR137]
-	b	.L2093
-.L2085:
+.L2395:
+	strb	w1, [x0, #:lo12:.LANCHOR143]
+	b	.L2350
+.L2341:
 	add	x10, x10, 1
 	add	x8, x8, 32
-	cmp	x10, 25
-	bne	.L2087
-	b	.L2082
-.L2095:
+	cmp	x10, 30
+	bne	.L2343
+	b	.L2338
+.L2352:
 	mov	w1, 15
-	b	.L2122
-.L2094:
+	b	.L2395
+.L2351:
 	sub	w1, w0, #65
 	cmp	w0, 33
 	and	w1, w1, 255
 	ccmp	w1, 1, 0, ne
-	bhi	.L2097
+	bhi	.L2354
 	adrp	x0, toshiba_read_retrial
 	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR139]
-	adrp	x0, .LANCHOR11
+	str	x0, [x20, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR19
 	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR11]
-.L2124:
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+.L2397:
 	mov	w1, 7
-	adrp	x0, .LANCHOR137
-	b	.L2122
-.L2097:
+	adrp	x0, .LANCHOR143
+	b	.L2395
+.L2354:
 	sub	w2, w0, #34
 	sub	w1, w0, #67
 	and	w2, w2, 255
 	and	w1, w1, 255
 	cmp	w2, 1
 	ccmp	w1, 1, 0, hi
-	bhi	.L2098
+	bhi	.L2355
 	adrp	x2, toshiba_read_retrial
 	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR139]
+	str	x2, [x20, #:lo12:.LANCHOR145]
 	cmp	w0, 35
 	mov	w2, 68
 	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR137
-	beq	.L2099
+	adrp	x0, .LANCHOR143
+	beq	.L2356
 	mov	w2, 7
-.L2121:
-	strb	w2, [x0, #:lo12:.LANCHOR137]
+.L2394:
+	strb	w2, [x0, #:lo12:.LANCHOR143]
 	cmp	w1, 1
-	adrp	x0, .LANCHOR11
-	bhi	.L2101
+	adrp	x0, .LANCHOR19
+	bhi	.L2358
 	mov	w1, 4
-.L2123:
-	strb	w1, [x0, #:lo12:.LANCHOR11]
-.L2093:
-	adrp	x19, .LANCHOR42
+.L2396:
+	strb	w1, [x0, #:lo12:.LANCHOR19]
+.L2350:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2359
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2152
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2359:
+	adrp	x24, .LANCHOR14
+	ldrb	w0, [x23, #:lo12:.LANCHOR39]
+	strb	wzr, [x24, #:lo12:.LANCHOR14]
+	tbz	x0, 0, .L2360
 	mov	w0, 4
-	strb	wzr, [x19, #:lo12:.LANCHOR42]
-	tbz	x3, 0, .L2102
 	bl	nandc_set_if_mode
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
-.L2102:
+.L2398:
 	bl	nandc_set_if_mode
 	bl	flash_info_blk_init
+	mov	w19, w0
 	cmn	w0, #1
-	beq	.L2078
-	ldrb	w0, [x23, #:lo12:.LANCHOR9]
-	sub	w0, w0, #1
-	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L2104
-	adrp	x0, hynix_read_retrial
-	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR139]
-.L2104:
-	ldrb	w0, [x22, #:lo12:.LANCHOR32]
-	tbnz	x0, 2, .L2105
-.L2125:
-	mov	w0, 0
-	b	.L2078
-.L2099:
+	bne	.L2362
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2333
+	adrp	x2, .LANCHOR179
+	mov	w1, 2172
+	add	x2, x2, :lo12:.LANCHOR179
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	b	.L2333
+.L2356:
 	mov	w2, 17
-	b	.L2121
-.L2101:
+	b	.L2394
+.L2358:
 	mov	w1, 5
-	b	.L2123
-.L2098:
+	b	.L2396
+.L2355:
 	sub	w0, w0, #36
 	and	w0, w0, 255
 	cmp	w0, 1
-	bhi	.L2093
+	bhi	.L2350
 	adrp	x0, toshiba_3d_read_retrial
 	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR139]
-	b	.L2124
-.L2105:
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	str	x0, [x20, #:lo12:.LANCHOR145]
+	b	.L2397
+.L2360:
+	mov	w0, 4
+	b	.L2398
+.L2362:
+	ldrb	w0, [x25, #:lo12:.LANCHOR17]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L2363
+	adrp	x0, hynix_read_retrial
+	add	x0, x0, :lo12:hynix_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR145]
+.L2363:
+	ldrb	w0, [x23, #:lo12:.LANCHOR39]
+	tbz	x0, 2, .L2365
+	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	ldrb	w0, [x0, 19]
-	cbz	w0, .L2125
-	adrp	x0, .LANCHOR141
-	ldrb	w1, [x0, #:lo12:.LANCHOR141]
-	adrp	x0, .LANCHOR20
-	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	cbz	w0, .L2365
+	adrp	x0, .LANCHOR148
+	ldrb	w1, [x0, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR26
+	ldrh	w0, [x0, #:lo12:.LANCHOR26]
 	mul	w1, w1, w0
 	mov	w0, 0
 	bl	flash_ddr_para_scan
-	ldrb	w0, [x19, #:lo12:.LANCHOR42]
-	cbnz	w0, .L2125
-	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	ldrb	w0, [x24, #:lo12:.LANCHOR14]
+	cbnz	w0, .L2365
+	ldr	x0, [x22, #:lo12:.LANCHOR20]
 	strb	wzr, [x0, 19]
 	bl	flash_info_flush
-	b	.L2125
+.L2365:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2367
+	adrp	x2, .LANCHOR179
+	adrp	x0, .LC73
+	add	x2, x2, :lo12:.LANCHOR179
+	mov	w1, 2225
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+.L2367:
+	bl	nand_flash_print_info
+	mov	w19, 0
+	b	.L2333
 	.size	nand_flash_init, .-nand_flash_init
 	.section	.text.ftl_sysblk_dump,"ax",@progbits
 	.align	2
@@ -13478,52 +14719,60 @@ ftl_sysblk_dump:
 	sub	sp, sp, #144
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
+	stp	x19, x20, [sp, 64]
+	mov	w20, 0
 	stp	x23, x24, [sp, 96]
+	and	w23, w0, 65535
 	stp	x25, x26, [sp, 112]
-	adrp	x26, .LANCHOR80
+	mov	w0, 1
 	stp	x27, x28, [sp, 128]
-	add	x26, x26, :lo12:.LANCHOR80
-	stp	x19, x20, [sp, 64]
-	adrp	x27, .LANCHOR99
+	adrp	x26, .LANCHOR80
 	stp	x21, x22, [sp, 80]
-	and	w22, w0, 65535
-	mov	w0, 1
 	bl	buf_alloc
-	ldr	x23, [x0, 8]
-	adrp	x28, .LANCHOR52
-	mov	x24, x0
+	ldr	x24, [x0, 8]
+	adrp	x27, .LANCHOR99
+	adrp	x28, .LANCHOR114
+	mov	x25, x0
+	add	x26, x26, :lo12:.LANCHOR80
 	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR52
-	mov	w25, 0
+	add	x28, x28, :lo12:.LANCHOR114
 	mov	w19, 0
-.L2127:
+.L2400:
 	ldrh	w0, [x26]
 	cmp	w0, w19
-	bhi	.L2129
-	mov	x0, x24
+	bhi	.L2402
+	mov	x0, x25
 	bl	buf_free
-	cbz	w25, .L2130
-	adrp	x1, .LANCHOR171
+	cbz	w20, .L2403
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	mov	w2, 1199
-	add	x1, x1, :lo12:.LANCHOR171
+	mov	w2, 1214
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2131:
-	b	.L2131
-.L2129:
-	ldrh	w20, [x27]
-	ldrb	w3, [x28]
-	ldr	x1, [x24, 8]
-	ldr	x2, [x24, 24]
-	madd	w20, w20, w22, w19
+.L2403:
 	mov	w0, w20
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 144
+	ret
+.L2402:
+	ldrh	w21, [x27]
+	ldrb	w3, [x28]
+	ldr	x1, [x25, 8]
+	ldr	x2, [x25, 24]
+	madd	w21, w21, w23, w19
+	mov	w0, w21
 	bl	ftl_read_ppa_page
-	mov	w21, w0
-	ldr	x1, [x24, 24]
+	mov	w22, w0
+	ldr	x1, [x25, 24]
 	mov	w4, w0
-	ldr	x0, [x24, 8]
-	mov	w3, w20
+	ldr	x0, [x25, 8]
+	mov	w3, w21
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
 	ldr	w2, [x1, 8]
@@ -13537,32 +14786,22 @@ ftl_sysblk_dump:
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w22
+	mov	w1, w23
 	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
 	bl	printf
 	mov	w3, 32
 	mov	w2, 4
-	add	x1, x23, 704
-	adrp	x0, .LC89
-	add	x0, x0, :lo12:.LC89
+	add	x1, x24, 704
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	bl	rknand_print_hex
-	cmp	w21, 512
-	ccmn	w21, #1, 4, ne
-	csinc	w25, w25, wzr, ne
-	b	.L2127
-.L2130:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 144
-	ret
+	cmp	w22, 512
+	ccmn	w22, #1, 4, ne
+	csinc	w20, w20, wzr, ne
+	b	.L2400
 	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
 	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
@@ -13570,30 +14809,35 @@ ftl_sysblk_dump:
 	.type	dump_ftl_info, %function
 dump_ftl_info:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR155
-	add	x1, x0, :lo12:.LANCHOR155
+	adrp	x0, .LANCHOR48
 	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR48]
+	adrp	x0, .LC137
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR5
+	add	x0, x0, :lo12:.LC137
 	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR53
-	ldrh	w3, [x1, 2]
+	adrp	x22, .LANCHOR101
+	adrp	x19, .LANCHOR5
 	adrp	x20, .LANCHOR80
-	ldrb	w2, [x1, 1]
+	bl	printf
 	adrp	x21, .LANCHOR2
-	ldrb	w1, [x0, #:lo12:.LANCHOR155]
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
+	adrp	x0, .LANCHOR164
+	add	x1, x0, :lo12:.LANCHOR164
+	ldrh	w3, [x1, 2]
+	ldrb	w2, [x1, 1]
+	ldrb	w1, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	x0, [x22, #:lo12:.LANCHOR101]
 	ldrh	w2, [x0, 140]
 	ldrh	w1, [x0, 130]
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
+	adrp	x0, .LC139
+	add	x0, x0, :lo12:.LC139
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
+	adrp	x0, .LC140
+	add	x0, x0, :lo12:.LC140
 	ldrh	w5, [x1, 26]
 	ldrh	w4, [x1, 22]
 	ldrb	w3, [x1, 21]
@@ -13601,8 +14845,8 @@ dump_ftl_info:
 	ldrh	w1, [x1, 16]
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR5]
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
 	ldrh	w5, [x1, 58]
 	ldrh	w4, [x1, 54]
 	ldrb	w3, [x1, 53]
@@ -13611,8 +14855,8 @@ dump_ftl_info:
 	bl	printf
 	ldr	x1, [x19, #:lo12:.LANCHOR5]
 	adrp	x19, .LANCHOR72
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
 	ldrh	w5, [x1, 90]
 	ldrh	w4, [x1, 86]
 	ldrb	w3, [x1, 85]
@@ -13623,39 +14867,39 @@ dump_ftl_info:
 	mov	w2, 4
 	ldrh	w3, [x20, #:lo12:.LANCHOR80]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR105
-	ldr	x1, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LC95
+	adrp	x0, .LANCHOR106
+	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LC143
 	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC95
+	add	x0, x0, :lo12:.LC143
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR4
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 2
 	ldr	x1, [x0, #:lo12:.LANCHOR4]
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
+	adrp	x0, .LC144
+	add	x0, x0, :lo12:.LC144
 	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	mov	w3, 32
+	ldr	x1, [x22, #:lo12:.LANCHOR101]
 	mov	w2, 4
-	adrp	x0, .LC89
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
 	add	x1, x1, 704
-	add	x0, x0, :lo12:.LC89
+	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR3
 	ldrh	w3, [x21, #:lo12:.LANCHOR2]
 	mov	w2, 4
 	ldr	x1, [x0, #:lo12:.LANCHOR3]
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
 	bl	rknand_print_hex
 	mov	w3, 256
 	mov	w2, 2
-	adrp	x1, .LANCHOR104
-	adrp	x0, .LC98
-	add	x1, x1, :lo12:.LANCHOR104
-	add	x0, x0, :lo12:.LC98
+	adrp	x1, .LANCHOR105
+	adrp	x0, .LC146
+	add	x1, x1, :lo12:.LANCHOR105
+	add	x0, x0, :lo12:.LC146
 	bl	rknand_print_hex
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	mov	w2, 2
@@ -13663,12 +14907,12 @@ dump_ftl_info:
 	ldp	x21, x22, [sp, 32]
 	ldp	x19, x20, [sp, 16]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR106
+	adrp	x0, .LANCHOR107
 	ldp	x29, x30, [sp], 48
 	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR106]
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	ldr	x1, [x0, #:lo12:.LANCHOR107]
+	adrp	x0, .LC147
+	add	x0, x0, :lo12:.LC147
 	b	rknand_print_hex
 	.size	dump_ftl_info, .-dump_ftl_info
 	.section	.text.pm_ppa_update_check,"ax",@progbits
@@ -13695,20 +14939,20 @@ pm_ppa_update_check:
 	ubfx	x3, x3, 5, 3
 	cmp	w3, 1
 	ccmp	w3, 7, 4, ne
-	bne	.L2139
+	bne	.L2414
 	stp	x29, x30, [sp, -16]!
 	mov	w3, w2
 	mov	w2, w1
 	mov	x1, x0
 	add	x29, sp, 0
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
+	adrp	x0, .LC148
+	add	x0, x0, :lo12:.LC148
 	bl	printf
 	bl	dump_ftl_info
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L2139:
+.L2414:
 	mov	w0, 0
 	ret
 	.size	pm_ppa_update_check, .-pm_ppa_update_check
@@ -13717,108 +14961,112 @@ pm_ppa_update_check:
 	.type	load_l2p_region, %function
 load_l2p_region:
 	stp	x29, x30, [sp, -64]!
-	and	w1, w1, 65535
-	cmp	w1, 31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
+	and	w20, w1, 65535
 	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	bls	.L2145
-	adrp	x1, .LANCHOR172
+	and	w19, w0, 65535
+	stp	x23, x24, [sp, 48]
+	cmp	w20, 31
+	bls	.L2420
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 30
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 31
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2146:
-	b	.L2146
-.L2145:
-	adrp	x23, .LANCHOR53
-	and	w19, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR53]
+.L2420:
+	adrp	x23, .LANCHOR101
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldrh	w2, [x0, 698]
 	cmp	w2, w19
-	bcs	.L2147
+	bcs	.L2421
 	mov	w1, w19
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
+	adrp	x0, .LC149
+	add	x0, x0, :lo12:.LC149
 	bl	printf
-	adrp	x0, .LANCHOR173
+	adrp	x0, .LANCHOR185
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	ldrh	w2, [x0, #:lo12:.LANCHOR185]
 	mov	x0, 0
 	ldr	x0, [x0, 8]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR53]
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
 	ldrh	w0, [x0, 698]
 	cmp	w0, w19
-	bcs	.L2151
-	adrp	x1, .LANCHOR172
+	bcs	.L2423
+	mov	w2, 35
+.L2428:
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 34
-	add	x1, x1, :lo12:.LANCHOR172
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2149:
-	b	.L2149
-.L2147:
+	b	.L2423
+.L2421:
 	add	x0, x0, x19, sxtw 2
-	sbfiz	x1, x1, 4, 32
+	sbfiz	x20, x20, 4, 32
 	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR117
-	add	x0, x0, :lo12:.LANCHOR117
-	add	x22, x0, x1
-	strh	w19, [x0, x1]
+	adrp	x0, .LANCHOR120
+	add	x0, x0, :lo12:.LANCHOR120
+	add	x22, x0, x20
+	strh	w19, [x0, x20]
 	strh	wzr, [x22, 2]
-	cbnz	w21, .L2150
-	adrp	x0, .LANCHOR173
+	cbnz	w21, .L2424
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC150
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+	adrp	x0, .LANCHOR185
 	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	ldrh	w2, [x0, #:lo12:.LANCHOR185]
 	ldr	x0, [x22, 8]
 	bl	ftl_memset
-.L2151:
+.L2423:
 	mov	w0, 0
-	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L2150:
-	adrp	x20, .LANCHOR165
-	adrp	x0, .LANCHOR52
+.L2424:
+	adrp	x20, .LANCHOR176
+	adrp	x24, .LANCHOR114
 	ldr	x1, [x22, 8]
-	ldrb	w3, [x0, #:lo12:.LANCHOR52]
 	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR165]
+	ldr	x2, [x20, #:lo12:.LANCHOR176]
+	ldrb	w3, [x24, #:lo12:.LANCHOR114]
 	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	ldr	x1, [x20, #:lo12:.LANCHOR176]
 	ldr	w2, [x1]
 	cmp	w2, w19
-	beq	.L2152
+	beq	.L2425
 	mov	w4, w21
 	mov	w3, w0
 	mov	w1, w19
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
+	adrp	x0, .LC151
+	add	x0, x0, :lo12:.LC151
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR53]
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
 	mov	w2, 4
-	adrp	x0, .LC103
-	add	x0, x0, :lo12:.LC103
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
 	add	x1, x1, 704
 	ldrh	w3, [x1, -6]
 	bl	rknand_print_hex
 	ldr	x1, [x22, 8]
-	mov	w3, 16
 	mov	w2, 4
-	adrp	x0, .LC104
-	add	x0, x0, :lo12:.LC104
+	ldrb	w3, [x24, #:lo12:.LANCHOR114]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	lsl	w3, w3, 7
 	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	ldr	x1, [x20, #:lo12:.LANCHOR176]
 	mov	w2, 4
 	mov	w3, 16
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR96
 	ldrh	w2, [x0, #:lo12:.LANCHOR96]
@@ -13834,19 +15082,13 @@ load_l2p_region:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2152:
-	ldr	x0, [x20, #:lo12:.LANCHOR165]
+.L2425:
+	ldr	x0, [x20, #:lo12:.LANCHOR176]
 	ldr	w0, [x0]
 	cmp	w19, w0
-	beq	.L2151
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 55
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2153:
-	b	.L2153
+	beq	.L2423
+	mov	w2, 57
+	b	.L2428
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.pm_gc,"ax",@progbits
 	.align	2
@@ -13856,71 +15098,73 @@ pm_gc:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR53
-	adrp	x20, .LANCHOR127
+	adrp	x20, .LANCHOR101
+	adrp	x19, .LANCHOR131
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR101]
 	stp	x23, x24, [sp, 48]
 	ldrh	w1, [x0, 688]
-	ldrh	w0, [x20, #:lo12:.LANCHOR127]
+	ldrh	w0, [x19, #:lo12:.LANCHOR131]
 	str	x25, [sp, 64]
 	sub	w0, w0, #1
 	cmp	w1, w0
-	blt	.L2157
+	blt	.L2431
 	bl	pm_free_sblk
-	ldr	x2, [x19, #:lo12:.LANCHOR53]
-	ldrh	w1, [x20, #:lo12:.LANCHOR127]
+	ldr	x2, [x20, #:lo12:.LANCHOR101]
+	ldrh	w1, [x19, #:lo12:.LANCHOR131]
 	sub	w1, w1, #1
 	ldrh	w3, [x2, 688]
 	cmp	w3, w1
-	blt	.L2157
+	blt	.L2431
 	add	x0, x2, x0, uxth 1
-	mov	w23, 65535
-	ldrh	w20, [x0, 416]
-	cmp	w20, w23
-	bne	.L2159
-	adrp	x1, .LANCHOR174
+	ldrh	w21, [x0, 416]
+	mov	w0, 65535
+	cmp	w21, w0
+	bne	.L2433
+	adrp	x1, .LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR186
+	mov	w2, 129
 	adrp	x0, .LC0
-	mov	w2, 127
-	add	x1, x1, :lo12:.LANCHOR174
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2160:
-	b	.L2160
-.L2159:
+	bl	pm_free_sblk
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
+	add	x0, x1, x0, uxth 1
+	ldrh	w21, [x0, 416]
+.L2433:
 	bl	pm_select_ram_region
 	and	x24, x0, 65535
-	adrp	x1, .LANCHOR117
+	adrp	x1, .LANCHOR120
 	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR117
-	mov	x22, x19
+	add	x2, x1, :lo12:.LANCHOR120
+	mov	x22, x24
 	add	x19, x2, x0
-	mov	x21, x24
-	ldrh	w0, [x2, x0]
-	cmp	w0, w23
 	mov	x23, x1
-	beq	.L2161
+	ldrh	w0, [x2, x0]
+	mov	w2, 65535
+	cmp	w0, w2
+	beq	.L2434
 	ldr	x1, [x19, 8]
-	cbz	x1, .L2161
+	cbz	x1, .L2434
 	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L2161
+	tbz	w2, #31, .L2434
 	bl	pm_write_page
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-.L2161:
-	add	x1, x23, :lo12:.LANCHOR117
+.L2434:
+	add	x1, x23, :lo12:.LANCHOR120
 	adrp	x25, .LANCHOR96
 	add	x24, x1, x24, lsl 4
 	add	x25, x25, :lo12:.LANCHOR96
 	mov	w19, 0
-.L2162:
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
+.L2435:
+	ldr	x1, [x20, #:lo12:.LANCHOR101]
 	ldrh	w0, [x1, 698]
 	cmp	w0, w19
-	bhi	.L2164
+	bhi	.L2437
 	bl	pm_free_sblk
-.L2157:
+.L2431:
 	mov	w0, 0
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -13928,7 +15172,7 @@ pm_gc:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2164:
+.L2437:
 	add	x1, x1, x19, sxtw 2
 	ldrh	w3, [x25]
 	mov	w0, 21
@@ -13942,18 +15186,20 @@ pm_gc:
 	adrp	x1, .LANCHOR95
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
-	cmp	w20, w0, uxth
-	bne	.L2163
-	mov	w1, w21
+	cmp	w21, w0, uxth
+	bne	.L2436
+	mov	w1, w22
 	mov	w0, w19
 	bl	load_l2p_region
 	ldr	x1, [x24, 8]
 	mov	w0, w19
 	bl	pm_write_page
-.L2163:
+	mov	w0, -1
+	strh	w0, [x24]
+.L2436:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L2162
+	b	.L2435
 	.size	pm_gc, .-pm_gc
 	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
@@ -13962,8 +15208,8 @@ pm_gc:
 pm_flush_id:
 	stp	x29, x30, [sp, -32]!
 	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR117
-	add	x2, x2, :lo12:.LANCHOR117
+	adrp	x2, .LANCHOR120
+	add	x2, x2, :lo12:.LANCHOR120
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	add	x19, x2, x0
@@ -13973,12 +15219,12 @@ pm_flush_id:
 	ldrh	w0, [x19, 2]
 	and	w0, w0, 32767
 	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR115
-	ldr	w0, [x19, #:lo12:.LANCHOR115]
-	cbz	w0, .L2170
+	adrp	x19, .LANCHOR118
+	ldr	w0, [x19, #:lo12:.LANCHOR118]
+	cbz	w0, .L2443
 	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR115]
-.L2170:
+	str	wzr, [x19, #:lo12:.LANCHOR118]
+.L2443:
 	mov	w0, 0
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -13992,21 +15238,21 @@ pm_flush:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR117
-	add	x19, x19, :lo12:.LANCHOR117
+	adrp	x19, .LANCHOR120
+	add	x19, x19, :lo12:.LANCHOR120
 	mov	w20, 0
 	add	x19, x19, 2
-.L2177:
+.L2450:
 	ldrsh	w0, [x19]
-	tbz	w0, #31, .L2176
+	tbz	w0, #31, .L2449
 	mov	w0, w20
 	bl	pm_flush_id
-.L2176:
+.L2449:
 	add	w20, w20, 1
 	add	x19, x19, 16
 	and	w20, w20, 65535
 	cmp	w20, 32
-	bne	.L2177
+	bne	.L2450
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
@@ -14051,75 +15297,78 @@ zftl_deinit:
 	.type	pm_init, %function
 pm_init:
 	stp	x29, x30, [sp, -112]!
+	mov	w1, 1
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	mov	w24, w0
-	adrp	x0, .LANCHOR115
+	adrp	x0, .LANCHOR118
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR117
+	adrp	x20, .LANCHOR120
+	str	wzr, [x0, #:lo12:.LANCHOR118]
+	adrp	x0, .LANCHOR177
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR117
-	str	wzr, [x0, #:lo12:.LANCHOR115]
+	add	x19, x20, :lo12:.LANCHOR120
+	strb	w1, [x0, #:lo12:.LANCHOR177]
 	mov	w0, 64
 	stp	x27, x28, [sp, 80]
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR165
-	adrp	x22, .LANCHOR52
+	adrp	x1, .LANCHOR176
+	adrp	x22, .LANCHOR114
 	add	x23, x19, 512
 	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR52
-	str	x0, [x1, #:lo12:.LANCHOR165]
+	add	x22, x22, :lo12:.LANCHOR114
+	str	x0, [x1, #:lo12:.LANCHOR176]
 	mov	w25, -1
-.L2187:
+.L2460:
 	strh	w25, [x19]
 	strh	wzr, [x19, 2]
-	cbz	w24, .L2186
+	cbz	w24, .L2459
 	ldrb	w0, [x22]
 	lsl	w0, w0, 9
 	bl	ftl_malloc
 	str	x0, [x19, 8]
-.L2186:
+.L2459:
 	add	x19, x19, 16
 	cmp	x19, x23
-	bne	.L2187
-	add	x0, x20, :lo12:.LANCHOR117
-	adrp	x19, .LANCHOR53
-	ldr	x24, [x21, #:lo12:.LANCHOR165]
+	bne	.L2460
+	add	x0, x20, :lo12:.LANCHOR120
+	adrp	x19, .LANCHOR101
+	ldr	x24, [x21, #:lo12:.LANCHOR176]
 	mov	w4, 4
 	ldr	x25, [x0, 8]
 	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	x2, x25
 	ldrh	w1, [x0, 692]
 	ldrb	w0, [x0, 694]
 	bl	flash_get_last_written_page
 	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w23, w26
 	ldrh	w2, [x0, 696]
 	cmp	w2, w26
-	bgt	.L2188
+	bgt	.L2461
 	ldrh	w1, [x0, 692]
 	mov	w3, w26
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
 	adrp	x27, .LANCHOR99
-	adrp	x28, .LANCHOR52
+	adrp	x28, .LANCHOR114
 	add	x27, x27, :lo12:.LANCHOR99
-	add	x28, x28, :lo12:.LANCHOR52
+	add	x28, x28, :lo12:.LANCHOR114
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	ldrsh	w21, [x0, 696]
-.L2189:
+.L2462:
 	cmp	w21, w26
-	ble	.L2191
-	adrp	x0, .LANCHOR157
+	ble	.L2464
+	adrp	x0, .LANCHOR167
 	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR117
+	add	x20, x20, :lo12:.LANCHOR120
 	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR157]
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	strb	w1, [x0, #:lo12:.LANCHOR167]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	strh	w23, [x0, 696]
 	bl	pm_free_sblk
 	ldr	x1, [x20, 8]
@@ -14128,7 +15377,7 @@ pm_init:
 	ldr	x1, [x20, 8]
 	mov	w0, -1
 	bl	pm_write_page
-.L2188:
+.L2461:
 	bl	pm_free_sblk
 	bl	pm_gc
 	mov	w0, 0
@@ -14139,8 +15388,8 @@ pm_init:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2191:
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+.L2464:
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	x3, x24
 	ldrh	w1, [x27]
 	mov	x2, x25
@@ -14151,32 +15400,32 @@ pm_init:
 	mov	w1, w22
 	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	str	w4, [x29, 108]
 	mov	w2, w22
 	ldr	w1, [x0, 48]
 	ldrh	w3, [x0, 694]
 	add	w1, w1, 1
 	str	w1, [x0, 48]
-	adrp	x0, .LC107
-	add	x0, x0, :lo12:.LC107
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
 	ldr	w1, [x24]
 	bl	printf
 	ldr	w4, [x29, 108]
 	cmp	w4, 512
 	ccmn	w4, #1, 4, ne
-	beq	.L2190
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	beq	.L2463
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	w0, [x24]
 	ldrh	w2, [x1, 698]
 	cmp	w0, w2
-	bcs	.L2190
+	bcs	.L2463
 	add	x0, x1, x0, uxtw 2
 	str	w22, [x0, 704]
-.L2190:
+.L2463:
 	add	w21, w21, 1
 	sxth	w21, w21
-	b	.L2189
+	b	.L2462
 	.size	pm_init, .-pm_init
 	.section	.text.pm_log2phys,"ax",@progbits
 	.align	2
@@ -14187,10 +15436,10 @@ pm_log2phys:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	x22, x1
-	adrp	x1, .LANCHOR52
+	adrp	x1, .LANCHOR114
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR52]
+	ldrb	w1, [x1, #:lo12:.LANCHOR114]
 	stp	x23, x24, [sp, 48]
 	mov	w23, w2
 	lsl	w21, w1, 7
@@ -14201,52 +15450,52 @@ pm_log2phys:
 	cmp	w0, w2
 	and	w25, w21, 65535
 	msub	w20, w25, w20, w0
-	bcc	.L2201
+	bcc	.L2474
 	mov	w1, w0
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC157
+	add	x0, x0, :lo12:.LC157
 	bl	printf
 	mov	w0, -1
-.L2200:
+.L2473:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2201:
-	adrp	x24, .LANCHOR117
-	add	x0, x24, :lo12:.LANCHOR117
+.L2474:
+	adrp	x24, .LANCHOR120
+	add	x0, x24, :lo12:.LANCHOR120
 	and	x20, x20, 65535
 	add	x0, x0, 8
 	mov	x19, 0
-.L2207:
+.L2480:
 	ldr	x1, [x0]
-	cbz	x1, .L2203
+	cbz	x1, .L2476
 	ldrh	w1, [x0, -8]
 	cmp	w1, w25
-	bne	.L2203
-.L2204:
-	cbnz	w23, .L2205
-	add	x0, x24, :lo12:.LANCHOR117
+	bne	.L2476
+.L2477:
+	cbnz	w23, .L2478
+	add	x0, x24, :lo12:.LANCHOR120
 	add	x0, x0, x19, lsl 4
 	ldr	x0, [x0, 8]
 	ldr	w0, [x0, x20, lsl 2]
 	str	w0, [x22]
-.L2206:
-	add	x24, x24, :lo12:.LANCHOR117
+.L2479:
+	add	x24, x24, :lo12:.LANCHOR120
 	add	x19, x24, x19, lsl 4
 	ldrh	w0, [x19, 2]
 	mvn	x1, x0
 	tst	x1, 32767
-	beq	.L2209
+	beq	.L2482
 	add	w0, w0, 1
 	strh	w0, [x19, 2]
-.L2209:
+.L2482:
 	mov	w0, 0
-	b	.L2200
-.L2205:
-	add	x0, x24, :lo12:.LANCHOR117
+	b	.L2473
+.L2478:
+	add	x0, x24, :lo12:.LANCHOR120
 	ldr	w2, [x22]
 	add	x0, x0, x19, lsl 4
 	ldr	x1, [x0, 8]
@@ -14254,35 +15503,35 @@ pm_log2phys:
 	ldrh	w1, [x0, 2]
 	orr	w1, w1, -32768
 	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR118
-	strb	w21, [x0, #:lo12:.LANCHOR118]
-	b	.L2206
-.L2203:
+	adrp	x0, .LANCHOR121
+	strb	w21, [x0, #:lo12:.LANCHOR121]
+	b	.L2479
+.L2476:
 	add	w19, w19, 1
 	add	x0, x0, 16
 	and	x19, x19, 65535
 	cmp	w19, 32
-	bne	.L2207
+	bne	.L2480
 	bl	pm_select_ram_region
 	and	x19, x0, 65535
 	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR117
+	add	x2, x24, :lo12:.LANCHOR120
 	add	x3, x2, x1
 	mov	w26, w0
 	ldrh	w2, [x2, x1]
 	mov	w1, 65535
 	cmp	w2, w1
-	beq	.L2208
+	beq	.L2481
 	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L2208
+	tbz	w1, #31, .L2481
 	bl	pm_flush_id
-.L2208:
-	adrp	x0, .LANCHOR175
+.L2481:
+	adrp	x0, .LANCHOR187
 	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR175]
+	strb	w19, [x0, #:lo12:.LANCHOR187]
 	mov	w0, w25
 	bl	load_l2p_region
-	b	.L2204
+	b	.L2477
 	.size	pm_log2phys, .-pm_log2phys
 	.section	.text.ftl_read_ahead,"ax",@progbits
 	.align	2
@@ -14297,55 +15546,55 @@ ftl_read_ahead:
 	ldr	w0, [x20, #:lo12:.LANCHOR56]
 	stp	x23, x24, [sp, 48]
 	cmn	w0, #1
-	beq	.L2216
+	beq	.L2497
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x19, x0
 	mov	w0, -1
-	cbz	x19, .L2215
+	cbz	x19, .L2488
 	ldr	w21, [x20, #:lo12:.LANCHOR56]
 	str	w21, [x19, 36]
 	str	w0, [x20, #:lo12:.LANCHOR56]
 	mov	w0, w21
+	ldr	x20, [x19, 8]
+	ldr	x22, [x19, 24]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 76]
-	ldr	x20, [x19, 8]
 	cmn	w0, #1
-	ldr	x22, [x19, 24]
-	bne	.L2218
+	bne	.L2491
 	mov	w2, 0
 	add	x1, x29, 76
 	mov	w0, w21
 	bl	pm_log2phys
-.L2218:
+.L2491:
 	ldr	w0, [x29, 76]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2219
-	adrp	x0, .LANCHOR52
+	bne	.L2492
+	adrp	x0, .LANCHOR114
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	mov	x0, x20
 	lsl	w2, w2, 9
 	bl	ftl_memset
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, 8
 	strb	w0, [x19, 2]
-.L2216:
+.L2497:
 	mov	w0, 0
-.L2215:
+.L2488:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2219:
+.L2492:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
 	ldr	w23, [x19, 52]
 	cmn	w23, #1
-	bne	.L2220
+	bne	.L2493
 	ldrb	w0, [x19, 2]
 	and	w0, w0, -9
 	strb	w0, [x19, 2]
@@ -14354,36 +15603,35 @@ ftl_read_ahead:
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2221:
+.L2494:
 	ldr	w5, [x22, 4]
 	cmp	w21, w5
-	beq	.L2222
+	beq	.L2495
 	ldrb	w1, [x19, 1]
-	adrp	x0, .LC110
+	adrp	x0, .LC159
 	ldr	w4, [x22]
 	mov	w2, w21
 	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC110
+	add	x0, x0, :lo12:.LC159
 	ldr	w3, [x29, 76]
 	bl	printf
-.L2222:
+.L2495:
 	ldr	w0, [x22, 4]
 	cmp	w21, w0
-	bne	.L2223
+	bne	.L2496
 	cmn	w23, #1
-	bne	.L2216
-.L2223:
-	adrp	x1, .LANCHOR176
+	bne	.L2497
+.L2496:
+	mov	w2, 874
+	adrp	x1, .LANCHOR188
 	adrp	x0, .LC0
-	mov	w2, 821
-	add	x1, x1, :lo12:.LANCHOR176
+	add	x1, x1, :lo12:.LANCHOR188
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2224:
-	b	.L2224
-.L2220:
+	b	.L2497
+.L2493:
 	cmp	w23, 256
-	bne	.L2221
+	bne	.L2494
 	adrp	x0, .LANCHOR96
 	mov	w20, 21
 	mov	w24, 1
@@ -14398,15 +15646,15 @@ ftl_read_ahead:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w20, w20, w0
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
 	and	w1, w20, 65535
 	bl	printf
 	mov	w2, 0
 	mov	w1, w24
 	mov	w0, w20
 	bl	gc_add_sblk
-	b	.L2221
+	b	.L2494
 	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
@@ -14422,9 +15670,9 @@ gc_recovery:
 	stp	x19, x20, [sp, 48]
 	ldr	x20, [x21, #:lo12:.LANCHOR5]
 	strb	wzr, [x0, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR130
+	adrp	x0, .LANCHOR135
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR130]
+	strb	wzr, [x0, #:lo12:.LANCHOR135]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -14434,7 +15682,7 @@ gc_recovery:
 	mov	w0, 65535
 	cmp	w1, w0
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	beq	.L2231
+	beq	.L2502
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -14454,29 +15702,29 @@ gc_recovery:
 	ldrb	w0, [x2, #:lo12:.LANCHOR67]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2232
+	bne	.L2503
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2279:
+.L2550:
 	str	w0, [x27, 40]
-.L2233:
+.L2504:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2234
+	beq	.L2505
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2235
-.L2234:
+	beq	.L2506
+.L2505:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x1, [x27, 24]
@@ -14489,13 +15737,13 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC111
+	adrp	x0, .LC160
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC111
+	add	x0, x0, :lo12:.LC160
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L2283:
+.L2554:
 	adrp	x0, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
@@ -14504,11 +15752,11 @@ gc_recovery:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2236:
+.L2507:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
+	adrp	x0, .LC163
+	add	x0, x0, :lo12:.LC163
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
@@ -14518,18 +15766,18 @@ gc_recovery:
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2265
+	beq	.L2536
 	bl	ftl_free_sblk
-.L2265:
-	adrp	x0, .LANCHOR53
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
+.L2536:
+	adrp	x0, .LANCHOR101
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	mov	w0, -1
 	strh	w0, [x1, 126]
 	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2230:
+.L2501:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -14538,34 +15786,34 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2232:
+.L2503:
 	cmp	w0, 2
-	bne	.L2233
+	bne	.L2504
 	adrp	x0, .LANCHOR80
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2279
-.L2235:
+	b	.L2550
+.L2506:
 	adrp	x26, .LANCHOR71
 	adrp	x19, .LANCHOR72
-	adrp	x22, .LANCHOR131
+	adrp	x22, .LANCHOR136
 	ldr	x1, [x27, 8]
 	ldrb	w0, [x19, #:lo12:.LANCHOR72]
 	ldrh	w2, [x26, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	ldr	x0, [x22, #:lo12:.LANCHOR131]
+	ldr	x0, [x22, #:lo12:.LANCHOR136]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
 	ldrb	w1, [x19, #:lo12:.LANCHOR72]
-	adrp	x19, .LANCHOR132
+	adrp	x19, .LANCHOR137
 	ldrh	w0, [x26, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	ldr	x1, [x27, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x19, #:lo12:.LANCHOR132]
+	ldr	x0, [x19, #:lo12:.LANCHOR137]
 	bl	ftl_memcpy
 	str	x26, [x29, 120]
 	adrp	x0, .LANCHOR80
@@ -14574,28 +15822,28 @@ gc_recovery:
 	ldr	x0, [x29, 160]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	beq	.L2237
-.L2280:
+	beq	.L2508
+.L2551:
 	str	w0, [x29, 180]
-	adrp	x23, .LC112
+	adrp	x23, .LC161
 	ldr	x0, [x29, 128]
-	add	x23, x23, :lo12:.LC112
+	add	x23, x23, :lo12:.LC161
 	mov	w26, 0
 	mov	w22, 0
 	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 104]
-.L2239:
+.L2510:
 	sub	w0, w26, #1
 	str	w0, [x29, 184]
 	cmp	w26, w24
-	beq	.L2248
+	beq	.L2519
 	mov	x19, 0
-	b	.L2249
-.L2237:
+	b	.L2520
+.L2508:
 	lsl	w24, w24, 1
 	mov	w0, 1
-	b	.L2280
-.L2245:
+	b	.L2551
+.L2516:
 	ldr	x1, [x29, 104]
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x1]
@@ -14605,32 +15853,32 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2240
+	bne	.L2511
 	add	w0, w26, w0
 	orr	w0, w0, w25, lsl 24
-.L2281:
+.L2552:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x27, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2243
+	bne	.L2514
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	ldr	x1, [x1, #:lo12:.LANCHOR137]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2244
-.L2243:
+	beq	.L2515
+.L2514:
 	ldr	x1, [x29, 144]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	ldr	x1, [x1, #:lo12:.LANCHOR137]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
 	mov	x0, x23
@@ -14639,38 +15887,38 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	bl	printf
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2244
+	beq	.L2515
 	mov	x0, x27
 	bl	buf_free
-	b	.L2283
-.L2240:
+	b	.L2554
+.L2511:
 	cmp	w1, 2
-	bne	.L2242
+	bne	.L2513
 	ldr	w1, [x29, 184]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2281
-.L2242:
+	b	.L2552
+.L2513:
 	add	w0, w26, w0
-	b	.L2281
-.L2244:
+	b	.L2552
+.L2515:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2247:
+.L2518:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2245
+	bcs	.L2516
 	add	x19, x19, 1
-.L2249:
+.L2520:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2246
+	ble	.L2517
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 160]
@@ -14678,11 +15926,11 @@ gc_recovery:
 	mov	w25, 1
 	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 112]
-	b	.L2247
-.L2246:
+	b	.L2518
+.L2517:
 	add	w26, w26, 1
-	b	.L2239
-.L2248:
+	b	.L2510
+.L2519:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x3, [x29, 120]
@@ -14700,34 +15948,34 @@ gc_recovery:
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 96]
-.L2250:
+.L2521:
 	sub	w0, w23, #1
 	str	w0, [x29, 120]
 	cmp	w26, w23
-	beq	.L2263
+	beq	.L2534
 	str	xzr, [x29, 184]
-	b	.L2264
-.L2260:
+	b	.L2535
+.L2531:
 	ldr	x1, [x29, 152]
 	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	ldr	x1, [x1, #:lo12:.LANCHOR136]
 	ldr	w28, [x1, x0]
 	cmn	w28, #1
-	beq	.L2251
+	beq	.L2522
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR132]
+	ldr	x1, [x1, #:lo12:.LANCHOR137]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 136]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2252
+	bne	.L2523
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w28
 	bl	pm_log2phys
-.L2252:
+.L2523:
 	ldr	x0, [x29, 112]
 	ldr	x1, [x29, 128]
 	ldrh	w0, [x0, 96]
@@ -14736,10 +15984,10 @@ gc_recovery:
 	ldr	x1, [x29, 160]
 	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L2253
+	bne	.L2524
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2282:
+.L2553:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 96]
@@ -14757,29 +16005,29 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2256
+	bne	.L2527
 	ldr	w2, [x29, 200]
 	mov	w1, w28
 	str	w4, [x29, 136]
-	adrp	x0, .LC113
-	add	x0, x0, :lo12:.LC113
+	adrp	x0, .LC162
+	add	x0, x0, :lo12:.LC162
 	bl	pm_ppa_update_check
 	ldr	w4, [x29, 136]
-	cbz	w0, .L2257
-.L2277:
-	b	.L2277
-.L2253:
+	cbz	w0, .L2528
+.L2548:
+	b	.L2548
+.L2524:
 	cmp	w1, 2
-	bne	.L2255
+	bne	.L2526
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2282
-.L2255:
+	b	.L2553
+.L2526:
 	add	w0, w23, w0
-	b	.L2282
-.L2257:
+	b	.L2553
+.L2528:
 	mov	w2, w4
 	add	x1, x29, 200
 	mov	w0, w28
@@ -14787,34 +16035,34 @@ gc_recovery:
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2259:
+.L2530:
 	adrp	x0, .LANCHOR3
 	add	w27, w27, 1
 	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2251
+	bne	.L2522
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	lsl	x19, x19, 1
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2251
+	cbz	w1, .L2522
 	strh	wzr, [x0, x19]
-.L2251:
+.L2522:
 	add	w25, w25, 1
-.L2262:
+.L2533:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2260
+	bcs	.L2531
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-.L2264:
+.L2535:
 	ldr	x0, [x29, 168]
 	ldr	w1, [x29, 184]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w1
-	ble	.L2261
+	ble	.L2532
 	ldr	x0, [x29, 184]
 	mov	w25, 1
 	add	x0, x20, x0, lsl 1
@@ -14822,293 +16070,383 @@ gc_recovery:
 	adrp	x0, .LANCHOR95
 	add	x0, x0, :lo12:.LANCHOR95
 	str	x0, [x29, 104]
-	b	.L2262
-.L2256:
+	b	.L2533
+.L2527:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2259
-.L2261:
+	b	.L2530
+.L2532:
 	add	w23, w23, 1
-	b	.L2250
-.L2263:
+	b	.L2521
+.L2534:
 	ldrh	w1, [x20, 80]
 	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	strh	w22, [x0, x1, lsl 1]
-	b	.L2236
-.L2231:
+	b	.L2507
+.L2502:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2230
-	adrp	x19, .LANCHOR53
-	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	beq	.L2501
+	adrp	x19, .LANCHOR101
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2267
+	bne	.L2538
 	bl	pm_flush
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x19, #:lo12:.LANCHOR101]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2267:
+.L2538:
 	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2230
+	b	.L2501
 	.size	gc_recovery, .-gc_recovery
 	.section	.text.zftl_init,"ax",@progbits
 	.align	2
 	.global	zftl_init
 	.type	zftl_init, %function
 zftl_init:
-	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR49
+	stp	x29, x30, [sp, -112]!
+	adrp	x1, .LANCHOR52
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR49]
-	adrp	x1, .LANCHOR50
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR72
-	strb	wzr, [x1, #:lo12:.LANCHOR50]
-	adrp	x1, .LANCHOR151
+	strb	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR2
-	strb	w0, [x1, #:lo12:.LANCHOR151]
+	adrp	x22, .LANCHOR80
+	strb	wzr, [x1, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR160
+	stp	x19, x20, [sp, 16]
+	adrp	x21, .LANCHOR72
+	strb	w0, [x1, #:lo12:.LANCHOR160]
 	adrp	x0, .LANCHOR112
 	mov	w1, -1
-	str	x23, [sp, 48]
+	stp	x23, x24, [sp, 48]
 	strb	wzr, [x0, #:lo12:.LANCHOR112]
 	adrp	x0, .LANCHOR56
-	adrp	x21, .LANCHOR80
-	adrp	x22, .LANCHOR173
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR2
 	str	w1, [x0, #:lo12:.LANCHOR56]
-	adrp	x1, .LC115
-	adrp	x0, .LC42
-	add	x1, x1, :lo12:.LC115
-	add	x0, x0, :lo12:.LC42
+	adrp	x1, .LC164
+	stp	x27, x28, [sp, 80]
+	add	x1, x1, :lo12:.LC164
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
 	bl	printf
-	adrp	x2, .LANCHOR26
-	add	x2, x2, :lo12:.LANCHOR26
+	adrp	x20, .LANCHOR185
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
 	adrp	x0, .LANCHOR67
-	adrp	x1, .LANCHOR52
-	adrp	x6, .LANCHOR95
-	ldrb	w4, [x2, 12]
-	strb	w4, [x0, #:lo12:.LANCHOR67]
-	ldrb	w0, [x2, 9]
-	strb	w0, [x1, #:lo12:.LANCHOR52]
-	adrp	x1, .LANCHOR71
-	ldrh	w7, [x2, 10]
-	strh	w7, [x1, #:lo12:.LANCHOR71]
-	adrp	x1, .LANCHOR15
-	ubfiz	w10, w0, 9, 7
-	strh	w10, [x22, #:lo12:.LANCHOR173]
-	ldrb	w5, [x1, #:lo12:.LANCHOR15]
-	adrp	x1, .LANCHOR100
-	sdiv	w3, w7, w4
-	strb	w5, [x1, #:lo12:.LANCHOR100]
-	ldrb	w1, [x2, 13]
-	strb	w1, [x6, #:lo12:.LANCHOR95]
-	ldrh	w6, [x2, 14]
-	mov	w2, 0
-	strh	w3, [x21, #:lo12:.LANCHOR80]
-	mul	w5, w5, w1
-	adrp	x1, .LANCHOR20
-	strh	w6, [x19, #:lo12:.LANCHOR2]
-	and	w8, w5, 255
-	ldrh	w5, [x1, #:lo12:.LANCHOR20]
+	adrp	x2, .LANCHOR114
+	adrp	x7, .LANCHOR95
+	ldrb	w5, [x1, 12]
+	strb	w5, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x1, 9]
+	strb	w0, [x2, #:lo12:.LANCHOR114]
+	adrp	x2, .LANCHOR71
+	ldrh	w3, [x1, 10]
+	strh	w3, [x2, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR12
+	ldrh	w8, [x1, 14]
+	ubfiz	w11, w0, 9, 7
+	ldrb	w4, [x2, #:lo12:.LANCHOR12]
+	adrp	x2, .LANCHOR100
+	sdiv	w6, w3, w5
+	strh	w8, [x23, #:lo12:.LANCHOR2]
+	strb	w4, [x2, #:lo12:.LANCHOR100]
+	ldrb	w2, [x1, 13]
+	adrp	x1, .LANCHOR26
+	strb	w2, [x7, #:lo12:.LANCHOR95]
+	ldrh	w7, [x1, #:lo12:.LANCHOR26]
 	adrp	x1, .LANCHOR99
-	strb	w8, [x20, #:lo12:.LANCHOR72]
-	strh	w5, [x1, #:lo12:.LANCHOR99]
-	mov	w1, 1
-.L2285:
-	cmp	w5, w1
-	bcs	.L2286
-	adrp	x1, .LANCHOR96
-	sub	w2, w2, #1
-	adrp	x23, .LANCHOR161
-	mul	w3, w3, w8
-	strh	w2, [x1, #:lo12:.LANCHOR96]
-	mul	w2, w0, w7
+	strh	w6, [x22, #:lo12:.LANCHOR80]
+	mul	w4, w4, w2
+	strh	w7, [x1, #:lo12:.LANCHOR99]
+	strh	w11, [x20, #:lo12:.LANCHOR185]
+	mov	w2, 1
+	and	w4, w4, 255
+	mov	w1, 0
+	strb	w4, [x21, #:lo12:.LANCHOR72]
+.L2556:
+	cmp	w7, w2
+	bcs	.L2557
+	mul	w3, w0, w3
+	adrp	x2, .LANCHOR96
+	sub	w1, w1, #1
+	adrp	x10, .LANCHOR189
+	strh	w1, [x2, #:lo12:.LANCHOR96]
 	mov	w1, 57344
 	movk	w1, 0x1c, lsl 16
-	mul	w5, w2, w6
-	mul	w1, w8, w1
-	mul	w2, w2, w8
-	lsr	w7, w5, 21
-	mul	w5, w5, w8
-	sub	w2, w2, #1
-	mul	w1, w1, w7
-	adrp	x7, .LANCHOR59
-	str	w1, [x7, #:lo12:.LANCHOR59]
-	add	w1, w1, 24576
-	adrp	x7, .LANCHOR177
-	udiv	w0, w1, w0
-	str	w5, [x7, #:lo12:.LANCHOR177]
-	adrp	x5, .LANCHOR178
-	str	w1, [x5, #:lo12:.LANCHOR178]
-	adrp	x5, .LANCHOR54
-	udiv	w1, w1, w2
-	str	w0, [x5, #:lo12:.LANCHOR54]
-	sub	w5, w10, #1
-	add	w0, w5, w0, lsl 2
-	add	w1, w1, 8
-	udiv	w0, w0, w10
-	strh	w0, [x23, #:lo12:.LANCHOR161]
+	adrp	x28, .LANCHOR54
+	mul	w7, w3, w8
+	adrp	x24, .LANCHOR172
+	mul	w1, w4, w1
+	adrp	x27, .LANCHOR190
+	mul	w3, w3, w4
+	adrp	x26, .LANCHOR131
+	lsr	w2, w7, 21
+	mul	w6, w6, w4
+	mul	w7, w7, w4
+	sub	w3, w3, #1
+	str	w7, [x10, #:lo12:.LANCHOR189]
+	sub	w7, w11, #1
+	mul	w1, w1, w2
+	adrp	x2, .LANCHOR59
+	adrp	x25, .LANCHOR83
+	str	w1, [x2, #:lo12:.LANCHOR59]
+	add	w2, w1, 24576
+	str	w2, [x27, #:lo12:.LANCHOR190]
+	udiv	w0, w2, w0
+	udiv	w2, w2, w3
+	str	w0, [x28, #:lo12:.LANCHOR54]
+	add	w0, w7, w0, lsl 2
+	add	w2, w2, 8
+	udiv	w0, w0, w11
+	strh	w0, [x24, #:lo12:.LANCHOR172]
 	ubfiz	w0, w0, 4, 16
-	sdiv	w0, w0, w3
-	adrp	x3, .LANCHOR127
-	strh	w0, [x3, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR87
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	adrp	x1, .LANCHOR179
-	add	w0, w6, w6, lsl 1
+	sdiv	w0, w0, w6
+	adrp	x6, .LANCHOR87
+	str	x6, [x29, 104]
+	strh	w2, [x6, #:lo12:.LANCHOR87]
+	adrp	x2, .LANCHOR191
+	strh	w0, [x26, #:lo12:.LANCHOR131]
+	add	w0, w8, w8, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR179]
-	adrp	x1, .LANCHOR83
-	lsr	w0, w6, 4
+	strh	w0, [x2, #:lo12:.LANCHOR191]
+	lsr	w0, w8, 4
+	strh	w0, [x25, #:lo12:.LANCHOR83]
 	cmp	w0, 79
-	strh	w0, [x1, #:lo12:.LANCHOR83]
-	bhi	.L2287
+	bhi	.L2558
 	mov	w0, 80
-	strh	w0, [x1, #:lo12:.LANCHOR83]
-.L2287:
-	adrp	x1, .LANCHOR180
+	strh	w0, [x25, #:lo12:.LANCHOR83]
+.L2558:
+	adrp	x2, .LANCHOR192
 	mov	w0, 4000
-	adrp	x3, .LANCHOR181
-	mov	w2, 1024
-	strh	w0, [x1, #:lo12:.LANCHOR180]
+	adrp	x4, .LANCHOR193
+	mov	w3, 1024
+	strh	w0, [x2, #:lo12:.LANCHOR192]
 	mov	w0, 50
-	strh	w0, [x3, #:lo12:.LANCHOR181]
-	adrp	x0, .LANCHOR126
-	mov	w5, 64
-	cmp	w4, 2
-	strh	w2, [x0, #:lo12:.LANCHOR126]
-	adrp	x2, .LANCHOR125
-	strh	w5, [x2, #:lo12:.LANCHOR125]
-	beq	.L2288
-	adrp	x4, .LANCHOR69
-	ldrb	w4, [x4, #:lo12:.LANCHOR69]
-	cbz	w4, .L2289
-.L2288:
-	mov	w4, 150
-	strh	w4, [x3, #:lo12:.LANCHOR181]
-	mov	w3, 128
-	strh	w3, [x2, #:lo12:.LANCHOR125]
-	adrp	x2, .LANCHOR18
-	ldrb	w2, [x2, #:lo12:.LANCHOR18]
-	cbnz	w2, .L2289
-	mov	w2, 600
-	strh	w2, [x1, #:lo12:.LANCHOR180]
-	mov	w1, 512
-	strh	w1, [x0, #:lo12:.LANCHOR126]
-.L2289:
+	strh	w0, [x4, #:lo12:.LANCHOR193]
+	adrp	x0, .LANCHOR130
+	mov	w6, 64
+	cmp	w5, 2
+	strh	w3, [x0, #:lo12:.LANCHOR130]
+	adrp	x3, .LANCHOR129
+	strh	w6, [x3, #:lo12:.LANCHOR129]
+	beq	.L2559
+	adrp	x5, .LANCHOR69
+	ldrb	w5, [x5, #:lo12:.LANCHOR69]
+	cbz	w5, .L2560
+.L2559:
+	mov	w5, 150
+	strh	w5, [x4, #:lo12:.LANCHOR193]
+	mov	w4, 128
+	strh	w4, [x3, #:lo12:.LANCHOR129]
+	adrp	x3, .LANCHOR11
+	ldrb	w3, [x3, #:lo12:.LANCHOR11]
+	cbnz	w3, .L2560
+	mov	w3, 600
+	strh	w3, [x2, #:lo12:.LANCHOR192]
+	mov	w2, 512
+	strh	w2, [x0, #:lo12:.LANCHOR130]
+.L2560:
+	adrp	x19, .LANCHOR7
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2562
+	str	x10, [x29, 96]
+	adrp	x0, .LC165
+	add	x0, x0, :lo12:.LC165
+	bl	printf
+	ldr	x10, [x29, 96]
+.L2562:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2563
+	ldr	w1, [x10, #:lo12:.LANCHOR189]
+	adrp	x0, .LC166
+	add	x0, x0, :lo12:.LC166
+	bl	printf
+.L2563:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2564
+	ldr	w1, [x28, #:lo12:.LANCHOR54]
+	adrp	x0, .LC167
+	add	x0, x0, :lo12:.LC167
+	bl	printf
+.L2564:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2565
+	ldr	w1, [x27, #:lo12:.LANCHOR190]
+	adrp	x0, .LC168
+	add	x0, x0, :lo12:.LC168
+	bl	printf
+.L2565:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2566
+	ldrh	w1, [x24, #:lo12:.LANCHOR172]
+	adrp	x0, .LC169
+	add	x0, x0, :lo12:.LC169
+	bl	printf
+.L2566:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2567
+	ldrh	w1, [x20, #:lo12:.LANCHOR185]
+	adrp	x0, .LC170
+	add	x0, x0, :lo12:.LC170
+	bl	printf
+.L2567:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2568
+	ldrh	w1, [x26, #:lo12:.LANCHOR131]
+	adrp	x0, .LC171
+	add	x0, x0, :lo12:.LC171
+	bl	printf
+.L2568:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2569
+	ldrh	w1, [x25, #:lo12:.LANCHOR83]
+	adrp	x0, .LC172
+	add	x0, x0, :lo12:.LC172
+	bl	printf
+.L2569:
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2570
+	ldr	x0, [x29, 104]
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LC173
+	add	x0, x0, :lo12:.LC173
+	bl	printf
+.L2570:
 	bl	buf_init
-	ldrh	w1, [x19, #:lo12:.LANCHOR2]
+	adrp	x25, .LANCHOR5
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
 	mov	w0, 6
 	mul	w0, w1, w0
 	bl	ftl_malloc
 	adrp	x1, .LANCHOR0
 	str	x0, [x1, #:lo12:.LANCHOR0]
-	ldrb	w1, [x20, #:lo12:.LANCHOR72]
-	ldrh	w0, [x21, #:lo12:.LANCHOR80]
+	ldrb	w1, [x21, #:lo12:.LANCHOR72]
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR106
-	adrp	x3, .LANCHOR4
-	str	x0, [x1, #:lo12:.LANCHOR106]
-	adrp	x0, .LANCHOR105
-	adrp	x1, ftl_ext_info_data_buffer
-	add	x2, x1, :lo12:ftl_ext_info_data_buffer
-	ldrb	w1, [x20, #:lo12:.LANCHOR72]
-	str	x2, [x0, #:lo12:.LANCHOR105]
-	ldrh	w0, [x21, #:lo12:.LANCHOR80]
-	mul	w0, w0, w1
-	lsl	w1, w0, 1
-	add	x4, x2, x1, sxtw 2
-	str	x4, [x3, #:lo12:.LANCHOR4]
-	ldrh	w3, [x19, #:lo12:.LANCHOR2]
-	adrp	x19, .LANCHOR5
-	add	w1, w1, w3, lsr 1
-	add	w0, w3, w0, lsl 2
+	adrp	x1, .LANCHOR107
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR107]
+	adrp	x0, .LANCHOR106
+	ldrh	w1, [x22, #:lo12:.LANCHOR80]
+	str	x2, [x0, #:lo12:.LANCHOR106]
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	mul	w1, w1, w0
+	lsl	w0, w1, 1
+	adrp	x1, .LANCHOR4
+	add	x3, x2, x0, sxtw 2
+	str	x3, [x1, #:lo12:.LANCHOR4]
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	add	w1, w0, w1, lsr 1
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
 	add	x1, x2, x1, sxtw 2
-	str	x1, [x19, #:lo12:.LANCHOR5]
-	ldrh	w1, [x23, #:lo12:.LANCHOR161]
-	lsl	w2, w3, 2
-	lsl	w0, w0, 1
-	add	w0, w0, 612
-	add	w1, w2, w1, lsl 2
-	ldrh	w2, [x22, #:lo12:.LANCHOR173]
-	add	w1, w1, 704
-	cmp	w0, w2
-	bhi	.L2291
-	cmp	w1, w2
-	bls	.L2292
-.L2291:
-.L2302:
-	b	.L2302
-.L2286:
-	add	w2, w2, 1
-	lsl	w1, w1, 1
-	and	w2, w2, 65535
-	b	.L2285
-.L2292:
+	str	x1, [x25, #:lo12:.LANCHOR5]
+	tbz	x0, 12, .L2571
+	adrp	x0, .LC174
+	add	x0, x0, :lo12:.LC174
+	bl	printf
+.L2571:
+	ldrh	w0, [x22, #:lo12:.LANCHOR80]
+	ldrb	w21, [x21, #:lo12:.LANCHOR72]
+	ldrh	w1, [x23, #:lo12:.LANCHOR2]
+	ldrh	w22, [x24, #:lo12:.LANCHOR172]
+	mul	w21, w0, w21
+	ldr	w0, [x19, #:lo12:.LANCHOR7]
+	add	w21, w1, w21, lsl 2
+	lsl	w1, w1, 2
+	lsl	w21, w21, 1
+	add	w22, w1, w22, lsl 2
+	add	w21, w21, 612
+	add	w22, w22, 704
+	tbz	x0, 12, .L2572
+	ldrh	w3, [x20, #:lo12:.LANCHOR185]
+	adrp	x0, .LC175
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC175
+	bl	printf
+.L2572:
+	ldrh	w0, [x20, #:lo12:.LANCHOR185]
+	cmp	w21, w0
+	bhi	.L2573
+	cmp	w22, w0
+	bls	.L2574
+.L2573:
+.L2617:
+	b	.L2617
+.L2557:
+	add	w1, w1, 1
+	lsl	w2, w2, 1
+	and	w1, w1, 65535
+	b	.L2556
+.L2574:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2284
+	beq	.L2555
 	bl	ftl_ext_info_init
-	adrp	x20, .LANCHOR53
+	adrp	x19, .LANCHOR101
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR157
-	ldrb	w0, [x0, #:lo12:.LANCHOR157]
-	cbz	w0, .L2294
-	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR167
+	ldrb	w0, [x0, #:lo12:.LANCHOR167]
+	cbz	w0, .L2576
+	ldr	x1, [x19, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2294:
+.L2576:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2284:
+.L2555:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
 	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",@progbits
@@ -15120,13 +16458,14 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2306
+	cbnz	w0, .L2621
 	bl	zftl_init
-.L2306:
+.L2621:
 	mov	w19, w0
-	mov	w1, w0
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
+	bl	idb_init
+	mov	w1, w19
+	adrp	x0, .LC176
+	add	x0, x0, :lo12:.LC176
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
@@ -15142,138 +16481,148 @@ gc_update_l2p_map_new:
 	adrp	x0, .LANCHOR5
 	adrp	x1, .LANCHOR71
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	ldr	x22, [x0, #:lo12:.LANCHOR5]
+	stp	x19, x20, [sp, 16]
+	ldr	x20, [x0, #:lo12:.LANCHOR5]
 	stp	x25, x26, [sp, 64]
 	ldrh	w25, [x1, #:lo12:.LANCHOR71]
-	add	x1, x22, 80
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR29
+	add	x1, x20, 80
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR7
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
 	str	x1, [x29, 144]
 	ldrb	w1, [x1, 9]
 	str	x0, [x29, 128]
 	mul	w25, w25, w1
-	ldr	w1, [x20, #:lo12:.LANCHOR29]
-	tbz	x1, 8, .L2309
-	ldrh	w1, [x22, 80]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
+	ldr	w1, [x21, #:lo12:.LANCHOR7]
+	tbz	x1, 8, .L2624
+	ldrh	w1, [x20, 80]
+	adrp	x0, .LC177
+	add	x0, x0, :lo12:.LC177
 	bl	printf
-.L2309:
-	adrp	x24, .LANCHOR4
-	ldrh	w1, [x22, 80]
+.L2624:
+	adrp	x23, .LANCHOR4
+	ldrh	w1, [x20, 80]
 	sub	w2, w25, #1
-	mov	x21, 0
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
-	mov	w23, 0
+	mov	x22, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	mov	w24, 0
 	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR52
-	add	x0, x0, :lo12:.LANCHOR52
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
 	str	x0, [x29, 104]
-.L2310:
-	mov	w27, w21
-	cmp	w25, w21
-	bhi	.L2320
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2321
+.L2625:
+	mov	w27, w22
+	cmp	w25, w22
+	bhi	.L2635
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2636
 	ldr	x0, [x29, 128]
-	mov	w3, w23
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	ldrh	w2, [x22, 80]
+	mov	w3, w24
+	ldr	x1, [x23, #:lo12:.LANCHOR4]
+	ldrh	w2, [x20, 80]
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x1, x2, lsl 1]
 	ldrh	w1, [x0, 80]
-	adrp	x0, .LC121
-	add	x0, x0, :lo12:.LC121
+	adrp	x0, .LC181
+	add	x0, x0, :lo12:.LC181
 	bl	printf
-.L2321:
-	ldrh	w0, [x22, 80]
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cmp	w23, w2
-	beq	.L2322
-	adrp	x1, .LANCHOR182
+.L2636:
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x1, lsl 1]
+	cmp	w24, w0
+	beq	.L2637
+	adrp	x1, .LANCHOR194
 	adrp	x0, .LC0
 	mov	w2, 463
-	add	x1, x1, :lo12:.LANCHOR182
+	add	x1, x1, :lo12:.LANCHOR194
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2323:
-	b	.L2323
-.L2320:
-	adrp	x26, .LANCHOR131
-	lsl	x19, x21, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR131]
+.L2637:
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
+	strh	w24, [x0, x1, lsl 1]
+	ldrh	w0, [x20, 80]
+	bl	zftl_insert_data_list
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L2635:
+	adrp	x26, .LANCHOR136
+	lsl	x19, x22, 2
+	ldr	x0, [x26, #:lo12:.LANCHOR136]
 	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2311
-	adrp	x0, .LANCHOR52
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	beq	.L2626
+	adrp	x0, .LANCHOR114
+	ldrb	w0, [x0, #:lo12:.LANCHOR114]
 	lsl	w0, w0, 7
 	udiv	w0, w2, w0
 	and	w0, w0, 65535
 	str	w0, [x29, 156]
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2312
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2627
 	ldr	w1, [x29, 156]
-	adrp	x0, .LC118
-	mov	w3, w21
-	add	x0, x0, :lo12:.LC118
+	adrp	x0, .LC178
+	mov	w3, w22
+	add	x0, x0, :lo12:.LC178
 	bl	printf
-.L2312:
+.L2627:
 	sub	w27, w25, w27
-	add	x27, x27, x21
+	add	x27, x27, x22
 	lsl	x0, x27, 2
 	str	x0, [x29, 136]
-	adrp	x0, .LC120
-	add	x0, x0, :lo12:.LC120
+	adrp	x0, .LC180
+	add	x0, x0, :lo12:.LC180
 	str	x0, [x29, 120]
 	adrp	x0, .LANCHOR96
 	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 112]
-.L2313:
+.L2628:
 	ldr	x0, [x29, 136]
 	cmp	x0, x19
-	bne	.L2319
-.L2311:
-	add	x21, x21, 1
-	b	.L2310
-.L2319:
-	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	bne	.L2634
+.L2626:
+	add	x22, x22, 1
+	b	.L2625
+.L2634:
+	ldr	x0, [x26, #:lo12:.LANCHOR136]
 	ldr	w28, [x0, x19]
 	cmn	w28, #1
-	beq	.L2314
+	beq	.L2629
 	ldr	x0, [x29, 104]
 	ldr	w1, [x29, 156]
 	ldrb	w0, [x0]
 	lsl	w0, w0, 7
 	udiv	w0, w28, w0
 	cmp	w1, w0, uxth
-	bne	.L2314
-	adrp	x0, .LANCHOR132
-	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	bne	.L2629
+	adrp	x0, .LANCHOR137
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
 	ldr	w27, [x0, x19]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 172]
 	cmn	w0, #1
-	bne	.L2315
+	bne	.L2630
 	mov	w2, 0
 	add	x1, x29, 172
 	mov	w0, w28
 	bl	pm_log2phys
-.L2315:
+.L2630:
 	ldr	w3, [x29, 172]
 	cmp	w27, w3
-	bne	.L2316
-	adrp	x0, .LANCHOR133
+	bne	.L2631
+	adrp	x0, .LANCHOR138
 	mov	w2, 1
 	add	x1, x29, 168
-	add	w23, w23, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	add	w24, w24, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR138]
 	ldr	w0, [x0, x19]
 	str	w0, [x29, 168]
 	mov	w0, w28
@@ -15298,45 +16647,34 @@ gc_update_l2p_map_new:
 	ldr	w1, [x29, 152]
 	ldrh	w0, [x0]
 	cmp	w0, w1
-	bne	.L2317
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2317
+	bne	.L2632
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2632
 	ldr	w3, [x29, 172]
-	adrp	x0, .LC119
+	adrp	x0, .LC179
 	mov	w2, w27
 	mov	w1, w28
-	add	x0, x0, :lo12:.LC119
+	add	x0, x0, :lo12:.LC179
 	bl	printf
-.L2317:
-	ldr	x0, [x26, #:lo12:.LANCHOR131]
+.L2632:
+	ldr	x0, [x26, #:lo12:.LANCHOR136]
 	mov	w1, -1
 	str	w1, [x0, x19]
-.L2314:
+.L2629:
 	add	x19, x19, 4
-	b	.L2313
-.L2316:
-	ldr	w0, [x20, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2318
+	b	.L2628
+.L2631:
+	ldr	w0, [x21, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2633
 	ldr	x0, [x29, 120]
 	mov	w2, w27
 	mov	w1, w28
 	bl	printf
-.L2318:
+.L2633:
 	ldr	x0, [x29, 144]
 	ldrh	w0, [x0]
 	bl	ftl_vpn_decrement
-	b	.L2317
-.L2322:
-	strh	w23, [x1, x0]
-	ldrh	w0, [x22, 80]
-	bl	zftl_insert_data_list
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
-	ret
+	b	.L2632
 	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
 	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
@@ -15360,17 +16698,17 @@ gc_scan_src_blk_one_page:
 	adrp	x2, .LANCHOR72
 	ldrb	w4, [x2, #:lo12:.LANCHOR72]
 	ldrh	w2, [x1, 2]
-.L2347:
+.L2661:
 	cmp	w3, w7
-	beq	.L2349
-	cbz	w6, .L2350
+	beq	.L2663
+	cbz	w6, .L2664
 	add	x1, x19, :lo12:.LANCHOR63
 	strb	w0, [x1, 4]
-.L2350:
-	cbz	w5, .L2351
+.L2664:
+	cbz	w5, .L2665
 	add	x0, x19, :lo12:.LANCHOR63
 	strh	w2, [x0, 2]
-.L2351:
+.L2665:
 	adrp	x0, .LANCHOR99
 	ldrh	w22, [x0, #:lo12:.LANCHOR99]
 	adrp	x0, .LANCHOR67
@@ -15378,25 +16716,25 @@ gc_scan_src_blk_one_page:
 	ldrb	w1, [x0, #:lo12:.LANCHOR67]
 	mul	w22, w22, w3
 	cmp	w1, 2
-	bne	.L2352
+	bne	.L2666
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2352
+	cbnz	w1, .L2666
 	ldrh	w0, [x0, 2]
 	add	w22, w22, w0, lsl 1
-.L2353:
+.L2667:
 	add	x1, x19, :lo12:.LANCHOR63
 	ldrb	w0, [x1, 4]
 	add	w0, w0, 1
 	and	w0, w0, 255
 	strb	w0, [x1, 4]
 	cmp	w4, w0
-	bne	.L2354
+	bne	.L2668
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 4]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L2354:
+.L2668:
 	mov	w0, 1
 	add	x19, x19, :lo12:.LANCHOR63
 	bl	buf_alloc
@@ -15404,15 +16742,15 @@ gc_scan_src_blk_one_page:
 	mov	x21, x0
 	mov	w20, 0
 	adrp	x24, .LANCHOR64
-.L2364:
+.L2678:
 	ldrb	w0, [x19, 6]
 	cmp	w0, 3
-	bne	.L2355
-	cbz	w20, .L2356
-.L2355:
+	bne	.L2669
+	cbz	w20, .L2670
+.L2669:
 	cmp	w0, w20
-	bgt	.L2357
-.L2365:
+	bgt	.L2671
+.L2679:
 	mov	x0, x21
 	bl	buf_free
 	ldp	x19, x20, [sp, 16]
@@ -15421,33 +16759,33 @@ gc_scan_src_blk_one_page:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2349:
+.L2663:
 	add	w0, w0, 1
 	and	w0, w0, 255
 	cmp	w0, w4
-	bne	.L2348
+	bne	.L2662
 	add	w2, w2, 1
 	mov	w5, 1
 	and	w2, w2, 65535
 	mov	w0, 0
-.L2348:
+.L2662:
 	add	x3, x1, x0, sxtw 1
 	mov	w6, 1
 	ldrh	w3, [x3, 40]
-	b	.L2347
-.L2352:
+	b	.L2661
+.L2666:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w0, [x0, 2]
 	add	w22, w0, w22
-	b	.L2353
-.L2357:
+	b	.L2667
+.L2671:
 	ldrb	w1, [x23]
 	cmp	w1, 2
-	bne	.L2358
-	cbnz	w0, .L2358
+	bne	.L2672
+	cbnz	w0, .L2672
 	add	w0, w20, w22
 	orr	w0, w0, 33554432
-.L2378:
+.L2692:
 	str	w0, [x21, 40]
 	mov	w1, 1
 	mov	x0, x21
@@ -15455,40 +16793,40 @@ gc_scan_src_blk_one_page:
 	ldr	w0, [x21, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2361
+	beq	.L2675
 	ldr	x0, [x21, 24]
 	ldr	w25, [x0, 4]
 	mov	w0, w25
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2362
+	bne	.L2676
 	mov	w2, 0
 	add	x1, x29, 92
 	mov	w0, w25
 	bl	pm_log2phys
-.L2362:
+.L2676:
 	ldr	w0, [x29, 92]
 	cmp	w22, w0
-	bne	.L2361
+	bne	.L2675
 	ldrh	w0, [x19, 24]
 	ldr	x2, [x24, #:lo12:.LANCHOR64]
 	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
 	str	w22, [x2, x1]
 	strh	w0, [x19, 24]
-.L2361:
+.L2675:
 	ldrh	w0, [x19, 26]
 	add	w0, w0, 1
 	strh	w0, [x19, 26]
-.L2356:
+.L2670:
 	add	w20, w20, 1
 	cmp	w20, 4
-	bne	.L2364
-	b	.L2365
-.L2358:
+	bne	.L2678
+	b	.L2679
+.L2672:
 	orr	w0, w22, w20, lsl 24
-	b	.L2378
+	b	.L2692
 	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
 	.section	.text.gc_scan_static_data,"ax",@progbits
 	.align	2
@@ -15504,13 +16842,13 @@ gc_scan_static_data:
 	ldr	w1, [x0, 544]
 	str	x23, [sp, 48]
 	cmn	w1, #1
-	beq	.L2380
-	adrp	x21, .LANCHOR96
-	adrp	x22, .LANCHOR95
-	add	x21, x21, :lo12:.LANCHOR96
-	add	x22, x22, :lo12:.LANCHOR95
+	beq	.L2694
+	adrp	x21, .LANCHOR195
+	adrp	x22, .LC0
+	add	x21, x21, :lo12:.LANCHOR195
+	add	x22, x22, :lo12:.LC0
 	mov	w20, 11
-.L2389:
+.L2702:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	mov	w2, 0
 	add	x1, x29, 76
@@ -15518,7 +16856,7 @@ gc_scan_static_data:
 	bl	pm_log2phys
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2381
+	beq	.L2695
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 76]
@@ -15528,39 +16866,37 @@ gc_scan_static_data:
 	bl	sblk_read_page
 	ldr	w0, [x23, 52]
 	cmp	w0, 256
-	bne	.L2382
-	ldrh	w3, [x21]
-	mov	w0, 21
+	bne	.L2696
+	adrp	x0, .LANCHOR96
 	ldr	w2, [x29, 76]
 	mov	w1, 1
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
 	sub	w0, w0, w3
 	lsr	w2, w2, w3
-	ldrb	w3, [x22]
 	lsl	w0, w1, w0
 	sub	w0, w0, #1
 	and	w0, w0, w2
+	adrp	x2, .LANCHOR95
+	ldrb	w3, [x2, #:lo12:.LANCHOR95]
 	mov	w2, 0
 	udiv	w0, w0, w3
 	bl	gc_add_sblk
-.L2382:
+.L2696:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	ldr	x1, [x23, 24]
 	ldr	w0, [x0, 544]
 	ldr	w1, [x1, 4]
 	cmp	w1, w0
-	beq	.L2383
-	adrp	x1, .LANCHOR183
-	adrp	x0, .LC0
+	beq	.L2697
 	mov	w2, 1369
-	add	x1, x1, :lo12:.LANCHOR183
-	add	x0, x0, :lo12:.LC0
+	mov	x1, x21
+	mov	x0, x22
 	bl	printf
-.L2384:
-	b	.L2384
-.L2383:
+.L2697:
 	mov	x0, x23
 	bl	buf_free
-.L2381:
+.L2695:
 	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	adrp	x2, .LANCHOR54
 	ldr	w2, [x2, #:lo12:.LANCHOR54]
@@ -15568,7 +16904,7 @@ gc_scan_static_data:
 	add	w1, w1, 1
 	str	w1, [x0, 544]
 	cmp	w1, w2
-	bcc	.L2385
+	bcc	.L2698
 	mov	w1, -1
 	str	w1, [x0, 544]
 	ldr	w1, [x0, 548]
@@ -15579,48 +16915,48 @@ gc_scan_static_data:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2379:
+.L2693:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L2385:
+.L2698:
 	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	bne	.L2379
+	bne	.L2693
 	sub	w20, w20, #1
 	ands	w20, w20, 65535
-	bne	.L2389
-	b	.L2379
-.L2380:
-	adrp	x1, .LANCHOR53
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	bne	.L2702
+	b	.L2693
+.L2694:
+	adrp	x1, .LANCHOR101
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 40]
 	cmp	w2, 20480
-	bls	.L2391
+	bls	.L2704
 	ldr	w3, [x1, 44]
 	add	w3, w3, w2, lsr 10
 	and	w2, w2, 1023
 	stp	w2, w3, [x1, 40]
-.L2391:
+.L2704:
 	ldr	w2, [x0, 536]
 	ldr	w3, [x0, 12]
 	add	w2, w2, 12959744
 	add	w2, w2, 256
 	cmp	w3, w2
 	ldr	w2, [x1, 44]
-	bhi	.L2392
+	bhi	.L2705
 	ldr	w1, [x0, 540]
 	add	w1, w1, 98304
 	add	w1, w1, 1696
 	cmp	w2, w1
-	bls	.L2379
-.L2392:
+	bls	.L2693
+.L2705:
 	str	w3, [x0, 536]
 	str	w2, [x0, 540]
 	str	wzr, [x0, 544]
-	b	.L2379
+	b	.L2693
 	.size	gc_scan_static_data, .-gc_scan_static_data
 	.section	.text.ftl_sblk_dump,"ax",@progbits
 	.align	2
@@ -15631,248 +16967,249 @@ ftl_sblk_dump:
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
 	stp	x21, x22, [sp, 80]
-	and	w22, w0, 65535
+	and	w21, w0, 65535
 	stp	x19, x20, [sp, 64]
 	mov	w0, 65535
 	stp	x23, x24, [sp, 96]
-	cmp	w22, w0
+	cmp	w21, w0
 	stp	x25, x26, [sp, 112]
 	stp	x27, x28, [sp, 128]
-	beq	.L2419
-	uxtw	x0, w22
-	str	x0, [x29, 144]
-	lsl	x14, x0, 2
-	adrp	x0, .LANCHOR3
-	mov	x13, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR3]
-	add	x2, x2, x14
-	ldrb	w2, [x2, 2]
-	and	w2, w2, 224
-	cmp	w2, 160
-	bne	.L2420
+	beq	.L2732
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w0, w21
+	bls	.L2732
+	uxtw	x0, w21
+	adrp	x25, .LANCHOR3
+	str	x0, [x29, 136]
+	lsl	x0, x0, 2
+	str	x0, [x29, 160]
+	ldr	x0, [x25, #:lo12:.LANCHOR3]
+	ldr	x2, [x29, 160]
+	add	x0, x0, x2
+	ldrb	w0, [x0, 2]
+	and	w0, w0, 224
+	cmp	w0, 160
+	bne	.L2733
 	adrp	x0, .LANCHOR67
 	ldrb	w24, [x0, #:lo12:.LANCHOR67]
-.L2400:
+.L2713:
 	add	x28, x29, 224
-	str	x1, [x29, 160]
-	mov	w0, w22
-	strh	w22, [x28, -32]!
+	adrp	x19, .LANCHOR80
+	str	x1, [x29, 152]
+	mov	w0, w21
+	mov	w27, 0
+	mov	w20, 0
+	strh	w21, [x28, -32]!
 	add	x1, x28, 16
 	bl	ftl_get_blk_list_in_sblk
-	adrp	x2, .LANCHOR80
+	ldrh	w2, [x19, #:lo12:.LANCHOR80]
 	and	w1, w0, 255
 	strb	w1, [x29, 201]
-	ldrh	w3, [x2, #:lo12:.LANCHOR80]
-	strh	wzr, [x29, 194]
-	strb	wzr, [x29, 197]
-	strh	wzr, [x29, 202]
-	mul	w1, w1, w3
-	str	x2, [x29, 136]
-	strh	w1, [x29, 198]
-	adrp	x1, .LANCHOR29
-	str	x1, [x29, 152]
-	ldr	w3, [x1, #:lo12:.LANCHOR29]
-	tbz	x3, 12, .L2401
-	ldr	x1, [x13, #:lo12:.LANCHOR3]
 	and	w4, w0, 255
+	strb	wzr, [x29, 197]
 	mov	w3, w24
-	adrp	x0, .LC122
-	add	x1, x1, x14
-	add	x0, x0, :lo12:.LC122
+	strh	wzr, [x29, 194]
+	adrp	x0, .LC182
+	mul	w1, w1, w2
+	ldr	x2, [x29, 160]
+	strh	w1, [x29, 198]
+	add	x0, x0, :lo12:.LC182
+	ldr	x1, [x25, #:lo12:.LANCHOR3]
+	strh	wzr, [x29, 202]
+	add	x1, x1, x2
 	ldrb	w2, [x1, 2]
-	mov	w1, w22
+	mov	w1, w21
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2401:
 	mov	w0, 1
 	bl	buf_alloc
-	mov	w26, 0
-	mov	x21, x0
-	mov	w27, 0
+	str	x19, [x29, 128]
+	mov	x26, x0
+	stp	wzr, wzr, [x29, 168]
 	adrp	x0, .LANCHOR99
-	mov	w19, 0
 	add	x0, x0, :lo12:.LANCHOR99
-	str	wzr, [x29, 172]
-	str	x0, [x29, 112]
-.L2402:
-	ldr	x0, [x29, 136]
+	str	x0, [x29, 104]
+.L2714:
+	ldr	x0, [x29, 128]
 	ldrh	w0, [x0, #:lo12:.LANCHOR80]
-	cmp	w0, w19
-	bls	.L2416
-	lsl	w0, w19, 1
+	cmp	w0, w20
+	bls	.L2729
+	lsl	w0, w20, 1
 	mov	w23, 0
 	sub	w0, w0, #1
-	str	w0, [x29, 168]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
-	str	x0, [x29, 120]
-	b	.L2417
-.L2420:
+	str	w0, [x29, 148]
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
+	str	x0, [x29, 112]
+	b	.L2730
+.L2733:
 	mov	w24, 1
-	b	.L2400
-.L2413:
-	ldr	x0, [x29, 128]
-	ldrh	w11, [x28, x0]
+	b	.L2713
+.L2726:
+	ldr	x0, [x29, 120]
+	ldrh	w10, [x28, x0]
 	mov	w0, 65535
-	cmp	w11, w0
-	beq	.L2403
-	ldr	x0, [x29, 112]
+	cmp	w10, w0
+	beq	.L2715
+	ldr	x0, [x29, 104]
 	cmp	w24, 3
-	ldrh	w8, [x0]
-	mul	w8, w8, w11
-	bne	.L2404
-	add	w8, w19, w8
-	orr	w25, w8, w20, lsl 24
-.L2405:
-	str	w25, [x21, 40]
+	ldrh	w19, [x0]
+	mul	w19, w19, w10
+	bne	.L2716
+	add	w19, w20, w19
+	orr	w19, w19, w22, lsl 24
+.L2717:
+	str	w19, [x26, 40]
 	mov	w1, 1
-	str	w11, [x29, 100]
-	mov	x0, x21
+	str	w10, [x29, 100]
+	mov	x0, x26
 	bl	sblk_read_page
-	ldr	x1, [x21, 24]
-	mov	w3, w25
-	ldr	x0, [x21, 8]
-	ldr	w12, [x21, 52]
-	ldr	w11, [x29, 100]
+	ldr	x1, [x26, 24]
+	mov	w3, w19
+	ldr	x0, [x26, 8]
+	ldr	w11, [x26, 52]
+	ldr	w10, [x29, 100]
 	ldr	w2, [x1, 12]
-	mov	w4, w12
+	mov	w4, w11
 	str	w2, [sp, 32]
-	str	w12, [x29, 104]
+	str	w11, [x29, 144]
 	ldr	w2, [x1, 8]
 	str	w2, [sp, 24]
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 16]
-	mov	w2, w19
+	mov	w2, w20
 	ldr	w1, [x1]
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w11
+	mov	w1, w10
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	ldr	x0, [x29, 120]
+	ldr	x0, [x29, 112]
 	bl	printf
-	ldr	w12, [x29, 104]
-	ldr	w0, [x29, 172]
-	cmp	w12, 512
-	ccmn	w12, #1, 4, ne
+	ldr	w11, [x29, 144]
+	ldr	w0, [x29, 168]
+	cmp	w11, 512
+	ldr	x1, [x29, 160]
+	ccmn	w11, #1, 4, ne
 	csinc	w0, w0, wzr, ne
-	str	w0, [x29, 172]
-	ldr	x0, [x21, 24]
-	ldr	w3, [x0, 4]
-	str	w3, [x29, 104]
-	mov	w0, w3
+	str	w0, [x29, 168]
+	ldr	x0, [x25, #:lo12:.LANCHOR3]
+	add	x0, x0, x1
+	mov	w1, 32
+	ldrb	w0, [x0, 2]
+	and	w0, w0, 224
+	cmp	w0, 224
+	ccmp	w0, w1, 4, ne
+	beq	.L2715
+	ldr	x0, [x26, 24]
+	ldr	w0, [x0, 4]
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 188]
 	cmn	w0, #1
-	ldr	w3, [x29, 104]
-	bne	.L2408
+	bne	.L2720
+	ldr	x0, [x26, 24]
 	mov	w2, 0
 	add	x1, x29, 188
-	mov	w0, w3
+	ldr	w0, [x0, 4]
 	bl	pm_log2phys
-.L2408:
+.L2720:
 	ldr	w0, [x29, 188]
-	cmp	w25, w0
-	bne	.L2409
-	ldr	x0, [x21, 24]
-	add	w26, w26, 1
-	mov	w3, w26
-	mov	w1, w25
+	cmp	w19, w0
+	bne	.L2721
+	ldr	w0, [x29, 172]
+	mov	w1, w19
+	add	w0, w0, 1
+	str	w0, [x29, 172]
+	ldr	x0, [x26, 24]
+	ldr	w3, [x29, 172]
 	ldr	w2, [x0, 4]
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x0, .LC183
+	add	x0, x0, :lo12:.LC183
 	bl	printf
-.L2409:
-	ldr	x0, [x29, 160]
-	cbz	x0, .L2410
-	ubfiz	x3, x27, 2, 32
-	ldr	w2, [x0, x3]
-	ldr	x0, [x21, 24]
+.L2721:
+	ldr	x0, [x29, 152]
+	cbz	x0, .L2723
+	ubfiz	x19, x27, 2, 32
+	ldr	w2, [x0, x19]
+	ldr	x0, [x26, 24]
 	ldr	w0, [x0, 4]
 	cmp	w0, w2
-	beq	.L2411
-	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2411
-	str	x3, [x29, 104]
+	beq	.L2724
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2724
+	adrp	x0, .LC184
 	mov	w1, w27
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	add	x0, x0, :lo12:.LC184
 	bl	printf
-	ldr	x3, [x29, 104]
-.L2411:
-	ldr	x1, [x21, 24]
-	ldr	x0, [x29, 160]
+.L2724:
+	ldr	x1, [x26, 24]
+	ldr	x0, [x29, 152]
 	ldr	w1, [x1, 4]
-	ldr	w0, [x0, x3]
+	ldr	w0, [x0, x19]
 	cmp	w1, w0
-	beq	.L2410
+	beq	.L2723
 	cmn	w0, #1
-	beq	.L2410
-	adrp	x1, .LANCHOR184
+	beq	.L2723
+	adrp	x1, .LANCHOR196
 	adrp	x0, .LC0
-	mov	w2, 1160
-	add	x1, x1, :lo12:.LANCHOR184
+	mov	w2, 1175
+	add	x1, x1, :lo12:.LANCHOR196
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2412:
-	b	.L2412
-.L2404:
-	cmp	w24, 2
-	bne	.L2406
-	ldr	w0, [x29, 168]
-	add	w8, w8, w0
-	adrp	x0, .LANCHOR67
-	add	w8, w8, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
-	orr	w25, w8, w0, lsl 24
-	b	.L2405
-.L2406:
-	add	w25, w19, w8
-	b	.L2405
-.L2410:
+.L2723:
 	add	w27, w27, 1
-.L2403:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-.L2415:
-	cmp	w24, w20
-	bcs	.L2413
+.L2715:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2728:
+	cmp	w24, w22
+	bcs	.L2726
 	add	w23, w23, 1
 	and	w23, w23, 65535
-.L2417:
+.L2730:
 	ldrb	w0, [x29, 201]
 	cmp	w0, w23
-	bls	.L2414
+	bls	.L2727
 	sxtw	x0, w23
-	mov	w20, 1
+	mov	w22, 1
 	add	x0, x0, 8
 	lsl	x0, x0, 1
-	str	x0, [x29, 128]
-	b	.L2415
-.L2414:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2402
-.L2416:
-	mov	x0, x21
+	str	x0, [x29, 120]
+	b	.L2728
+.L2716:
+	cmp	w24, 2
+	bne	.L2718
+	ldr	w0, [x29, 148]
+	add	w19, w19, w0
+	adrp	x0, .LANCHOR67
+	add	w19, w19, w22
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	orr	w19, w19, w0, lsl 24
+	b	.L2717
+.L2718:
+	add	w19, w20, w19
+	b	.L2717
+.L2727:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2714
+.L2729:
+	mov	x0, x26
 	bl	buf_free
-	ldr	x0, [x29, 152]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2418
 	adrp	x0, .LANCHOR4
-	ldr	x1, [x29, 144]
-	mov	w3, w26
+	ldr	x1, [x29, 136]
+	ldr	w3, [x29, 172]
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LC125
-	mov	w1, w22
-	add	x0, x0, :lo12:.LC125
+	mov	w1, w21
+	adrp	x0, .LC185
+	add	x0, x0, :lo12:.LC185
 	bl	printf
-.L2418:
-	ldr	w0, [x29, 172]
-.L2398:
+	ldr	w0, [x29, 168]
+.L2711:
 	ldp	x19, x20, [sp, 64]
 	ldp	x21, x22, [sp, 80]
 	ldp	x23, x24, [sp, 96]
@@ -15881,9 +17218,9 @@ ftl_sblk_dump:
 	ldp	x29, x30, [sp, 48]
 	add	sp, sp, 272
 	ret
-.L2419:
+.L2732:
 	mov	w0, 0
-	b	.L2398
+	b	.L2711
 	.size	ftl_sblk_dump, .-ftl_sblk_dump
 	.section	.text.zftl_read,"ax",@progbits
 	.align	2
@@ -15894,40 +17231,40 @@ zftl_read:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w0
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	stp	x23, x24, [sp, 48]
 	stp	x19, x20, [sp, 16]
 	mov	w24, w2
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w19, w1
 	stp	x25, x26, [sp, 64]
 	mov	x23, x3
 	stp	x27, x28, [sp, 80]
-	tbz	x0, 12, .L2440
+	tbz	x0, 12, .L2744
 	mov	w3, w2
-	adrp	x0, .LC126
+	adrp	x0, .LC186
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC126
+	add	x0, x0, :lo12:.LC186
 	mov	w1, w21
 	bl	printf
-.L2440:
-	cbnz	w21, .L2441
+.L2744:
+	cbnz	w21, .L2745
 	adrp	x0, .LANCHOR59
 	mov	w21, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2442:
+.L2746:
 	add	w1, w19, w24
 	cmp	w0, w1
-	bcc	.L2467
-	adrp	x1, .LANCHOR53
-	adrp	x25, .LANCHOR52
+	bcc	.L2770
+	adrp	x1, .LANCHOR101
+	adrp	x25, .LANCHOR114
 	add	w21, w21, w19
 	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR53]
+	ldr	x2, [x1, #:lo12:.LANCHOR101]
 	ldr	w0, [x2, 24]
 	add	w0, w0, w24
 	str	w0, [x2, 24]
-	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	ldrb	w0, [x25, #:lo12:.LANCHOR114]
 	add	w2, w24, w21
 	stp	w2, wzr, [x29, 136]
 	sub	w2, w2, #1
@@ -15937,16 +17274,16 @@ zftl_read:
 	sub	w26, w0, w27
 	str	w0, [x29, 132]
 	add	w26, w26, 1
-	adrp	x0, .LC110
-	add	x0, x0, :lo12:.LC110
+	adrp	x0, .LANCHOR197
+	add	x0, x0, :lo12:.LANCHOR197
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 104]
-.L2444:
-	cbnz	w26, .L2465
+.L2748:
+	cbnz	w26, .L2768
 	ldr	w0, [x29, 140]
-.L2439:
+.L2743:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -15954,21 +17291,21 @@ zftl_read:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L2441:
+.L2745:
 	cmp	w21, 3
-	bhi	.L2467
+	bhi	.L2770
 	lsl	w21, w21, 13
 	mov	w0, 8192
-	b	.L2442
-.L2465:
-	ldrb	w1, [x25, #:lo12:.LANCHOR52]
+	b	.L2746
+.L2768:
+	ldrb	w1, [x25, #:lo12:.LANCHOR114]
 	cmp	w20, w27
 	ldr	w0, [x29, 132]
 	and	w19, w1, 65535
 	ccmp	w20, w0, 4, ne
-	bne	.L2468
+	bne	.L2771
 	cmp	w20, w27
-	bne	.L2446
+	bne	.L2750
 	udiv	w22, w21, w1
 	and	w0, w24, 65535
 	msub	w1, w22, w1, w21
@@ -15977,17 +17314,17 @@ zftl_read:
 	and	w19, w19, 65535
 	cmp	w24, w19
 	csel	w19, w0, w19, cc
-.L2445:
-	adrp	x0, .LANCHOR43
-	add	x1, x0, :lo12:.LANCHOR43
+.L2749:
+	adrp	x0, .LANCHOR46
+	add	x1, x0, :lo12:.LANCHOR46
 	add	x1, x1, 2
 	mov	w0, 0
-.L2449:
+.L2753:
 	ldr	w2, [x1, 34]
 	cmp	w20, w2
-	bne	.L2447
+	bne	.L2751
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2447
+	tbz	x2, 3, .L2751
 	ldr	x1, [x29, 104]
 	ubfiz	x0, x0, 6, 32
 	lsl	w2, w19, 9
@@ -15999,99 +17336,100 @@ zftl_read:
 	add	x23, x23, x19
 	add	x1, x1, x22
 	bl	ftl_memcpy
-.L2448:
+.L2752:
 	add	w20, w20, 1
 	sub	w26, w26, #1
-	b	.L2444
-.L2446:
+	b	.L2748
+.L2750:
 	ldr	w0, [x29, 136]
 	msub	w19, w1, w20, w0
 	and	w19, w19, 255
-.L2468:
+.L2771:
 	mov	w22, 0
-	b	.L2445
-.L2447:
+	b	.L2749
+.L2751:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2449
+	bne	.L2753
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2450
+	bne	.L2754
 	mov	w2, 0
 	add	x1, x29, 156
 	mov	w0, w20
 	bl	pm_log2phys
-.L2450:
+.L2754:
 	ldr	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2451
-	add	x22, x25, :lo12:.LANCHOR52
+	bne	.L2755
+	add	x22, x25, :lo12:.LANCHOR114
 	mov	w19, 0
-.L2452:
+.L2756:
 	ldrb	w0, [x22]
 	cmp	w19, w0
-	bcs	.L2448
+	bcs	.L2752
 	madd	w0, w20, w0, w19
 	cmp	w21, w0
-	bhi	.L2453
+	bhi	.L2757
 	ldr	w1, [x29, 136]
 	cmp	w1, w0
-	bls	.L2453
+	bls	.L2757
 	mov	x0, x23
 	add	x23, x23, 512
 	mov	w2, 512
 	mov	w1, 0
 	bl	ftl_memset
-.L2453:
+.L2757:
 	add	w19, w19, 1
-	b	.L2452
-.L2451:
+	b	.L2756
+.L2755:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2455
+	cbnz	x0, .L2759
 	bl	ftl_read_ahead
-	b	.L2444
-.L2455:
+	b	.L2748
+.L2759:
 	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 40]
 	add	w0, w0, 1
 	str	w0, [x1, 40]
 	ldr	w0, [x29, 156]
 	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	ldrb	w0, [x25, #:lo12:.LANCHOR114]
 	cmp	w0, w19
-	bne	.L2457
+	bne	.L2761
 	str	x23, [x28, 16]
-.L2457:
+.L2761:
 	mov	w1, 1
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w10, [x28, 52]
 	cmn	w10, #1
-	bne	.L2458
+	bne	.L2762
 	adrp	x0, .LANCHOR5
 	str	w10, [x29, 140]
 	ldr	x1, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x1, 552]
 	add	w0, w0, 1
 	str	w0, [x1, 552]
-.L2459:
+.L2763:
 	ldr	x0, [x28, 24]
 	ldr	w5, [x0, 4]
 	cmp	w20, w5
-	beq	.L2460
+	beq	.L2764
 	ldr	w4, [x0]
 	mov	w2, w20
 	ldp	w6, w7, [x0, 8]
 	str	w10, [x29, 128]
 	ldrb	w1, [x28, 1]
+	adrp	x0, .LC159
 	ldr	w3, [x29, 156]
-	ldr	x0, [x29, 112]
+	add	x0, x0, :lo12:.LC159
 	bl	printf
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x29, 156]
@@ -16109,25 +17447,37 @@ zftl_read:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w10, [x29, 128]
-.L2460:
+.L2764:
 	ldr	x0, [x28, 24]
 	ldr	w0, [x0, 4]
 	cmp	w20, w0
-	bne	.L2461
+	bne	.L2765
 	cmn	w10, #1
-	bne	.L2462
-.L2461:
-	adrp	x1, .LANCHOR185
+	bne	.L2766
+.L2765:
+	ldr	x1, [x29, 112]
 	adrp	x0, .LC0
-	mov	w2, 976
-	add	x1, x1, :lo12:.LANCHOR185
+	mov	w2, 1030
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2463:
-	b	.L2463
-.L2458:
+.L2766:
+	ldr	x0, [x28, 16]
+	cbnz	x0, .L2767
+	ldr	x1, [x28, 8]
+	ubfiz	x22, x22, 9, 16
+	lsl	w2, w19, 9
+	mov	x0, x23
+	add	x1, x1, x22
+	bl	ftl_memcpy
+.L2767:
+	ubfiz	x19, x19, 9, 16
+	mov	x0, x28
+	add	x23, x23, x19
+	bl	buf_free
+	b	.L2752
+.L2762:
 	cmp	w10, 256
-	bne	.L2459
+	bne	.L2763
 	adrp	x0, .LANCHOR96
 	mov	w4, 21
 	mov	w5, 1
@@ -16143,37 +17493,22 @@ zftl_read:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w4, w4, w0
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
+	adrp	x0, .LC187
+	add	x0, x0, :lo12:.LC187
 	and	w1, w4, 65535
 	str	w4, [x29, 128]
 	bl	printf
-	ldr	w5, [x29, 100]
-	mov	w2, 0
-	ldr	w4, [x29, 128]
-	mov	w1, w5
-	mov	w0, w4
-	bl	gc_add_sblk
-	ldr	w10, [x29, 96]
-	b	.L2459
-.L2462:
-	ldr	x0, [x28, 16]
-	cbnz	x0, .L2464
-	ldr	x1, [x28, 8]
-	ubfiz	x22, x22, 9, 16
-	lsl	w2, w19, 9
-	mov	x0, x23
-	add	x1, x1, x22
-	bl	ftl_memcpy
-.L2464:
-	ubfiz	x19, x19, 9, 16
-	mov	x0, x28
-	add	x23, x23, x19
-	bl	buf_free
-	b	.L2448
-.L2467:
+	ldr	w5, [x29, 100]
+	mov	w2, 0
+	ldr	w4, [x29, 128]
+	mov	w1, w5
+	mov	w0, w4
+	bl	gc_add_sblk
+	ldr	w10, [x29, 96]
+	b	.L2763
+.L2770:
 	mov	w0, -1
-	b	.L2439
+	b	.L2743
 	.size	zftl_read, .-zftl_read
 	.section	.text.zftl_vendor_read,"ax",@progbits
 	.align	2
@@ -16245,81 +17580,81 @@ ftl_read:
 vpn_check:
 	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR5
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR54
+	adrp	x21, .LANCHOR5
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR4
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR4
+	adrp	x23, .LANCHOR54
 	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR2
+	adrp	x24, .LANCHOR2
 	stp	x27, x28, [sp, 80]
 	bl	dump_ftl_info
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	add	x21, x21, :lo12:.LANCHOR54
-	add	x23, x22, :lo12:.LANCHOR2
-	mov	w25, 0
-	adrp	x19, check_vpc_tbl
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x23, x23, :lo12:.LANCHOR54
+	add	x25, x24, :lo12:.LANCHOR2
+	mov	w22, 0
+	adrp	x20, check_vpc_tbl
 	ldrh	w3, [x0, 80]
 	ldrh	w2, [x0, 48]
 	ldrh	w1, [x0, 16]
-	adrp	x0, .LC128
-	add	x0, x0, :lo12:.LC128
+	adrp	x0, .LC188
+	add	x0, x0, :lo12:.LC188
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x3, [x19, #:lo12:.LANCHOR4]
 	ldrh	w1, [x0, 16]
 	ldrh	w2, [x0, 22]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x3, x0]
-	adrp	x0, .LC129
-	add	x0, x0, :lo12:.LC129
+	adrp	x0, .LC189
+	add	x0, x0, :lo12:.LC189
 	sub	w4, w3, w2
 	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
-	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldr	x3, [x19, #:lo12:.LANCHOR4]
 	ldrh	w1, [x0, 48]
 	ldrh	w2, [x0, 54]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x3, x0]
-	adrp	x0, .LC130
-	add	x0, x0, :lo12:.LC130
+	adrp	x0, .LC190
+	add	x0, x0, :lo12:.LC190
 	sub	w4, w3, w2
 	bl	printf
 	mov	w2, 4608
 	mov	w1, 0
-	add	x0, x19, :lo12:check_vpc_tbl
+	add	x0, x20, :lo12:check_vpc_tbl
 	bl	ftl_memset
-.L2484:
-	ldr	w0, [x21]
-	cmp	w25, w0
-	bcc	.L2492
+.L2787:
+	ldr	w0, [x23]
+	cmp	w22, w0
+	bcc	.L2795
 	adrp	x0, .LANCHOR2
-	adrp	x23, .LC133
-	add	x28, x0, :lo12:.LANCHOR2
-	mov	x5, x0
-	add	x23, x23, :lo12:.LC133
+	adrp	x24, .LC193
+	add	x5, x0, :lo12:.LANCHOR2
+	mov	x28, x0
+	add	x24, x24, :lo12:.LC193
+	mov	w23, 0
 	mov	w22, 0
+.L2796:
+	ldrh	w0, [x5]
+	cmp	w0, w22
+	bhi	.L2798
+	adrp	x24, .LANCHOR198
+	adrp	x25, .LC0
+	add	x22, x28, :lo12:.LANCHOR2
+	add	x24, x24, :lo12:.LANCHOR198
+	add	x25, x25, :lo12:.LC0
 	mov	w21, 0
-.L2493:
-	ldrh	w0, [x28]
+.L2799:
+	ldrh	w0, [x22]
 	cmp	w0, w21
-	bhi	.L2495
-	adrp	x20, .LC134
-	add	x26, x5, :lo12:.LANCHOR2
-	add	x19, x19, :lo12:check_vpc_tbl
-	add	x20, x20, :lo12:.LC134
-	mov	w28, 0
-	adrp	x27, .LANCHOR3
-.L2496:
-	ldrh	w1, [x26]
-	cmp	w1, w28
-	bhi	.L2501
-	mov	w2, w22
-	adrp	x1, .LANCHOR186
-	adrp	x0, .LC135
-	add	x1, x1, :lo12:.LANCHOR186
-	add	x0, x0, :lo12:.LC135
+	bhi	.L2805
+	mov	w2, w23
+	adrp	x1, .LANCHOR198
+	adrp	x0, .LC195
+	add	x1, x1, :lo12:.LANCHOR198
+	add	x0, x0, :lo12:.LC195
 	bl	printf
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -16328,20 +17663,20 @@ vpn_check:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2492:
-	mov	w0, w25
+.L2795:
+	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 124]
 	cmn	w0, #1
-	bne	.L2485
+	bne	.L2788
 	mov	w2, 0
 	add	x1, x29, 124
-	mov	w0, w25
+	mov	w0, w22
 	bl	pm_log2phys
-.L2486:
+.L2789:
 	ldr	w2, [x29, 124]
 	cmn	w2, #1
-	beq	.L2488
+	beq	.L2791
 	adrp	x0, .LANCHOR96
 	mov	w3, 21
 	ldrh	w0, [x0, #:lo12:.LANCHOR96]
@@ -16354,29 +17689,30 @@ vpn_check:
 	adrp	x0, .LANCHOR95
 	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w3, w3, w0
-	ldrh	w0, [x22, #:lo12:.LANCHOR2]
+	ldrh	w0, [x24, #:lo12:.LANCHOR2]
 	and	w26, w3, 65535
 	and	w3, w3, 65535
 	cmp	w0, w26
-	bls	.L2489
-	add	x0, x19, :lo12:check_vpc_tbl
+	bls	.L2792
+	add	x0, x20, :lo12:check_vpc_tbl
 	sxtw	x3, w3
 	ldrh	w1, [x0, x3, lsl 1]
 	add	w1, w1, 1
 	strh	w1, [x0, x3, lsl 1]
-.L2490:
-	ldrh	w0, [x23]
+.L2793:
+	ldrh	w0, [x25]
 	cmp	w0, w26
-	bhi	.L2488
-	adrp	x1, .LANCHOR186
+	bhi	.L2791
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	mov	w2, 1206
-	add	x1, x1, :lo12:.LANCHOR186
+	mov	w2, 1266
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2491:
-	b	.L2491
-.L2485:
+.L2791:
+	add	w22, w22, 1
+	b	.L2787
+.L2788:
 	adrp	x1, .LANCHOR96
 	ldrh	w3, [x1, #:lo12:.LANCHOR96]
 	mov	w1, 21
@@ -16389,115 +17725,111 @@ vpn_check:
 	adrp	x1, .LANCHOR95
 	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
-	ldrh	w1, [x22, #:lo12:.LANCHOR2]
+	ldrh	w1, [x24, #:lo12:.LANCHOR2]
 	cmp	w1, w0, uxth
-	bhi	.L2486
-	adrp	x1, .LANCHOR186
+	bhi	.L2789
+	mov	w2, 1256
+	adrp	x1, .LANCHOR198
 	adrp	x0, .LC0
-	mov	w2, 1196
-	add	x1, x1, :lo12:.LANCHOR186
+	add	x1, x1, :lo12:.LANCHOR198
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2487:
-	b	.L2487
-.L2489:
-	mov	w1, w25
-	adrp	x0, .LC131
-	add	x0, x0, :lo12:.LC131
+	b	.L2789
+.L2792:
+	mov	w1, w22
+	adrp	x0, .LC191
+	add	x0, x0, :lo12:.LC191
 	bl	printf
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR114
 	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR117+8
-	ldr	x1, [x0, #:lo12:.LANCHOR117+8]
-	adrp	x0, .LC132
+	ldrb	w3, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR120+8
+	ldr	x1, [x0, #:lo12:.LANCHOR120+8]
+	adrp	x0, .LC192
 	lsl	w3, w3, 7
-	add	x0, x0, :lo12:.LC132
+	add	x0, x0, :lo12:.LC192
 	bl	rknand_print_hex
-	b	.L2490
-.L2488:
-	add	w25, w25, 1
-	b	.L2484
-.L2495:
-	uxtw	x0, w21
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	b	.L2793
+.L2798:
+	uxtw	x0, w22
+	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	lsl	x27, x0, 1
-	add	x25, x19, :lo12:check_vpc_tbl
-	sxtw	x26, w21
+	add	x25, x20, :lo12:check_vpc_tbl
+	sxtw	x26, w22
 	ldrh	w3, [x1, x27]
 	ldrh	w2, [x25, x26, lsl 1]
 	cmp	w3, w2
-	beq	.L2494
+	beq	.L2797
 	adrp	x1, .LANCHOR3
 	str	x5, [x29, 104]
 	ldr	x1, [x1, #:lo12:.LANCHOR3]
 	add	x0, x1, x0, lsl 2
-	mov	w1, w21
+	mov	w1, w22
 	ldrb	w4, [x0, 2]
-	mov	x0, x23
+	mov	x0, x24
 	ubfx	x4, x4, 5, 3
 	bl	printf
-	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	mov	w1, 65535
 	ldr	x5, [x29, 104]
 	ldrh	w0, [x0, x27]
 	cmp	w0, w1
-	beq	.L2494
+	beq	.L2797
 	ldrh	w1, [x25, x26, lsl 1]
 	cmp	w1, w0
-	bls	.L2494
-	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	bls	.L2797
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x0, 16]
-	cmp	w1, w21
-	beq	.L2494
+	cmp	w1, w22
+	beq	.L2797
 	ldrh	w1, [x0, 80]
-	cmp	w1, w21
-	beq	.L2494
+	cmp	w1, w22
+	beq	.L2797
 	ldrh	w0, [x0, 48]
-	cmp	w0, w21
-	csinc	w22, w22, wzr, eq
-.L2494:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2493
-.L2501:
-	ldr	x0, [x27, #:lo12:.LANCHOR3]
-	uxtw	x21, w28
-	add	x0, x0, x21, lsl 2
-	ldrb	w1, [x0, 2]
-	tst	w1, 224
-	bne	.L2497
-	sxtw	x23, w28
-	ldrh	w1, [x19, x23, lsl 1]
-	cbnz	w1, .L2498
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	lsl	x25, x21, 1
-	ldrh	w1, [x1, x25]
-	cbz	w1, .L2499
-	mov	w1, w28
-	mov	x0, x20
+	cmp	w0, w22
+	csinc	w23, w23, wzr, eq
+.L2797:
+	add	w0, w22, 1
+	and	w22, w0, 65535
+	b	.L2796
+.L2805:
+	adrp	x0, .LANCHOR3
+	uxtw	x26, w21
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x26, lsl 2
+	ldrb	w0, [x0, 2]
+	tst	w0, 224
+	bne	.L2801
+	add	x0, x20, :lo12:check_vpc_tbl
+	sxtw	x27, w21
+	ldrh	w0, [x0, x27, lsl 1]
+	cbnz	w0, .L2802
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	lsl	x28, x26, 1
+	ldrh	w0, [x0, x28]
+	cbz	w0, .L2803
+	adrp	x0, .LC194
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC194
 	bl	printf
-.L2499:
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	strh	wzr, [x1, x25]
-.L2498:
-	ldr	x1, [x24, #:lo12:.LANCHOR4]
-	ldrh	w1, [x1, x21, lsl 1]
-	cbz	w1, .L2497
-	ldrh	w1, [x19, x23, lsl 1]
-	cbz	w1, .L2497
-	adrp	x1, .LANCHOR186
-	adrp	x0, .LC0
-	mov	w2, 1238
-	add	x1, x1, :lo12:.LANCHOR186
-	add	x0, x0, :lo12:.LC0
+.L2803:
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x28]
+.L2802:
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x26, lsl 1]
+	cbz	w0, .L2801
+	add	x0, x20, :lo12:check_vpc_tbl
+	ldrh	w0, [x0, x27, lsl 1]
+	cbz	w0, .L2801
+	mov	w2, 1298
+	mov	x1, x24
+	mov	x0, x25
 	bl	printf
-.L2500:
-	b	.L2500
-.L2497:
-	add	w1, w28, 1
-	and	w28, w1, 65535
-	b	.L2496
+.L2801:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2799
 	.size	vpn_check, .-vpn_check
 	.section	.text.gc_scan_src_blk,"ax",@progbits
 	.align	2
@@ -16514,198 +17846,208 @@ gc_scan_src_blk:
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
 	cmp	w1, w0
-	bne	.L2516
-	adrp	x1, .LANCHOR187
+	bne	.L2817
+	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 897
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2517:
-	b	.L2517
-.L2516:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2518
+.L2817:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L2839
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2819
 	adrp	x2, .LANCHOR4
 	ubfiz	x0, x1, 1, 16
 	ldr	x2, [x2, #:lo12:.LANCHOR4]
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC136
-	add	x0, x0, :lo12:.LC136
+	adrp	x0, .LC196
+	add	x0, x0, :lo12:.LC196
 	bl	printf
-.L2518:
+.L2819:
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
-	add	x13, x19, :lo12:.LANCHOR63
-	add	x1, x13, 40
+	add	x14, x19, :lo12:.LANCHOR63
+	add	x1, x14, 40
 	bl	ftl_get_blk_list_in_sblk
 	and	w1, w0, 255
-	strb	w1, [x13, 5]
-	cbnz	w1, .L2519
+	strb	w1, [x14, 5]
+	cbnz	w1, .L2820
 	mov	w0, -1
 	strh	w0, [x19, #:lo12:.LANCHOR63]
-.L2555:
+.L2839:
 	mov	w0, 0
-.L2515:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2519:
-	adrp	x1, .LANCHOR3
+	b	.L2816
+.L2820:
+	adrp	x4, .LANCHOR3
 	ldrh	w3, [x19, #:lo12:.LANCHOR63]
-	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	mov	x22, x4
+	ldr	x1, [x4, #:lo12:.LANCHOR3]
 	mov	x2, x3
 	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
 	and	w1, w1, 224
 	cmp	w1, 32
-	beq	.L2521
+	beq	.L2821
 	cmp	w1, 224
-	beq	.L2521
-	cbz	w1, .L2522
-	adrp	x3, .LANCHOR5
-	ldr	x3, [x3, #:lo12:.LANCHOR5]
-	ldrh	w4, [x3, 16]
-	cmp	w4, w2
-	beq	.L2521
-	ldrh	w4, [x3, 48]
-	cmp	w4, w2
-	beq	.L2521
-	ldrh	w3, [x3, 80]
+	beq	.L2821
+	cbz	w1, .L2822
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrh	w3, [x1, 16]
 	cmp	w3, w2
-	bne	.L2553
-.L2521:
+	beq	.L2821
+	ldrh	w3, [x1, 48]
+	cmp	w3, w2
+	beq	.L2821
+	ldrh	w1, [x1, 80]
+	cmp	w1, w2
+	bne	.L2853
+.L2821:
 	add	x0, x19, :lo12:.LANCHOR63
 	mov	w1, -1
 	strh	w1, [x19, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, 24]
-	b	.L2555
-.L2522:
+	b	.L2839
+.L2822:
 	adrp	x0, .LANCHOR4
-	ldr	x0, [x0, #:lo12:.LANCHOR4]
-	ldrh	w0, [x0, x3, lsl 1]
-	cbz	w0, .L2521
-	adrp	x1, .LANCHOR187
+	mov	x20, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldrh	w1, [x1, x3, lsl 1]
+	cbz	w1, .L2824
+	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 917
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2524:
-	b	.L2524
-.L2553:
+.L2824:
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	ldr	x0, [x20, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x1, lsl 1]
+	b	.L2821
+.L2853:
 	and	w0, w0, 255
 	sub	w0, w0, #1
-	add	x0, x13, x0, sxtw 1
-	ldrh	w3, [x0, 40]
+	add	x0, x14, x0, sxtw 1
+	ldrh	w21, [x0, 40]
 	mov	w0, 65535
-	cmp	w3, w0
-	bne	.L2525
-	adrp	x1, .LANCHOR187
+	cmp	w21, w0
+	bne	.L2825
+	adrp	x1, .LANCHOR199
 	adrp	x0, .LC0
 	mov	w2, 925
-	add	x1, x1, :lo12:.LANCHOR187
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2526:
-	b	.L2526
-.L2525:
-	adrp	x4, .LANCHOR99
+.L2825:
+	adrp	x1, .LANCHOR99
+	ldr	x3, [x22, #:lo12:.LANCHOR3]
 	adrp	x2, .LANCHOR80
-	cmp	w1, 160
+	adrp	x23, .LANCHOR71
+	ldrh	w20, [x1, #:lo12:.LANCHOR99]
 	mov	x24, x2
-	ldrh	w20, [x4, #:lo12:.LANCHOR99]
-	adrp	x21, .LANCHOR71
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
 	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	add	x1, x3, x1, lsl 2
 	sub	w0, w0, #1
 	and	w0, w0, 65535
-	mul	w20, w20, w3
-	bne	.L2540
+	mul	w20, w20, w21
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 160
+	bne	.L2840
 	adrp	x1, .LANCHOR67
-	ldrb	w1, [x1, #:lo12:.LANCHOR67]
-	and	w22, w1, 65535
-	cmp	w1, 2
-	orr	w20, w20, w1, lsl 24
-	bne	.L2527
-	ldrh	w0, [x21, #:lo12:.LANCHOR71]
-	mov	w22, 2
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-.L2527:
-	add	x23, x19, :lo12:.LANCHOR63
+	ldrb	w21, [x1, #:lo12:.LANCHOR67]
+	cmp	w21, 2
+	orr	w20, w20, w21, lsl 24
+	beq	.L2827
+	and	w21, w21, 65535
+.L2826:
+	add	x22, x19, :lo12:.LANCHOR63
 	orr	w20, w0, w20
 	mov	w0, 1
-	strb	w22, [x23, 6]
-	strh	wzr, [x23, 2]
-	strb	wzr, [x23, 4]
-	strh	wzr, [x23, 26]
+	strb	w21, [x22, 6]
+	strh	wzr, [x22, 2]
+	strb	wzr, [x22, 4]
+	strh	wzr, [x22, 26]
 	bl	buf_alloc
 	str	w20, [x0, 40]
-	adrp	x20, .LANCHOR72
 	mov	x25, x0
 	mov	w1, 1
+	adrp	x20, .LANCHOR64
 	bl	sblk_read_page
-	ldrh	w2, [x21, #:lo12:.LANCHOR71]
-	adrp	x21, .LANCHOR64
-	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	ldrh	w2, [x23, #:lo12:.LANCHOR71]
+	adrp	x23, .LANCHOR72
 	mov	w1, 255
+	ldrb	w0, [x23, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR64]
+	ldr	x0, [x20, #:lo12:.LANCHOR64]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	strh	wzr, [x23, 24]
+	strh	wzr, [x22, 24]
 	ldr	w0, [x25, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2528
-.L2530:
+	bne	.L2828
+.L2830:
 	mov	x0, x25
 	bl	buf_free
 	mov	w0, -1
-	b	.L2515
-.L2540:
-	mov	w22, 1
-	b	.L2527
-.L2528:
+.L2816:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2827:
+	ldrh	w0, [x23, #:lo12:.LANCHOR71]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	b	.L2826
+.L2840:
+	mov	w21, 1
+	b	.L2826
+.L2828:
 	ldr	x0, [x25, 24]
-	mov	w23, 15555
-	movk	w23, 0xf55f, lsl 16
+	mov	w22, 15555
+	movk	w22, 0xf55f, lsl 16
 	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2529
+	cmp	w0, w22
+	beq	.L2829
 	ldrh	w0, [x19, #:lo12:.LANCHOR63]
 	mov	x1, 0
 	bl	ftl_sblk_dump
 	ldr	x0, [x25, 24]
 	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2530
-	adrp	x1, .LANCHOR187
-	adrp	x0, .LC0
+	cmp	w0, w22
+	beq	.L2830
 	mov	w2, 955
-	add	x1, x1, :lo12:.LANCHOR187
+	adrp	x1, .LANCHOR199
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR199
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2531:
-	b	.L2531
-.L2529:
-	ldrh	w0, [x24, #:lo12:.LANCHOR80]
+	b	.L2830
+.L2829:
+	ldrb	w0, [x23, #:lo12:.LANCHOR72]
+	adrp	x22, .LANCHOR96
+	ldrh	w1, [x24, #:lo12:.LANCHOR80]
 	adrp	x23, .LANCHOR95
-	ldrb	w20, [x20, #:lo12:.LANCHOR72]
-	add	x23, x23, :lo12:.LANCHOR95
 	ldr	x24, [x25, 8]
-	mov	x26, 0
-	mul	w20, w20, w0
-	mul	w20, w22, w20
-	adrp	x22, .LANCHOR96
 	add	x22, x22, :lo12:.LANCHOR96
-	and	w20, w20, 65535
-.L2532:
-	cmp	w20, w26
-	bgt	.L2537
+	add	x23, x23, :lo12:.LANCHOR95
+	mov	x26, 0
+	mul	w0, w0, w1
+	mul	w21, w21, w0
+	and	w21, w21, 65535
+.L2831:
+	cmp	w21, w26
+	bgt	.L2836
 	mov	x0, x25
 	bl	buf_free
 	ldrh	w1, [x19, #:lo12:.LANCHOR63]
@@ -16716,20 +18058,20 @@ gc_scan_src_blk:
 	ldrh	w2, [x3, x2]
 	ldrh	w3, [x0, 24]
 	cmp	w2, w3
-	beq	.L2538
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	beq	.L2837
+	adrp	x0, .LC197
+	add	x0, x0, :lo12:.LC197
 	bl	printf
-.L2538:
+.L2837:
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	add	x0, x19, :lo12:.LANCHOR63
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	bcs	.L2539
+	bcs	.L2838
 	bl	vpn_check
-.L2539:
+.L2838:
 	add	x0, x19, :lo12:.LANCHOR63
 	ldrh	w2, [x19, #:lo12:.LANCHOR63]
 	ldr	x1, [x20, #:lo12:.LANCHOR4]
@@ -16737,20 +18079,20 @@ gc_scan_src_blk:
 	strh	w3, [x1, x2, lsl 1]
 	strh	wzr, [x0, 28]
 	ldrh	w0, [x0, 24]
-	b	.L2515
-.L2537:
+	b	.L2816
+.L2836:
 	ldr	w0, [x24, x26, lsl 2]
 	cmn	w0, #1
-	beq	.L2534
+	beq	.L2833
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 92]
 	cmn	w0, #1
-	bne	.L2535
+	bne	.L2834
 	ldr	w0, [x24, x26, lsl 2]
 	mov	w2, 0
 	add	x1, x29, 92
 	bl	pm_log2phys
-.L2535:
+.L2834:
 	ldrh	w1, [x22]
 	mov	w0, 21
 	ldr	w3, [x29, 92]
@@ -16765,16 +18107,16 @@ gc_scan_src_blk:
 	udiv	w0, w0, w1
 	add	x1, x19, :lo12:.LANCHOR63
 	cmp	w0, w2
-	bne	.L2534
+	bne	.L2833
 	ldrh	w0, [x1, 24]
-	ldr	x4, [x21, #:lo12:.LANCHOR64]
+	ldr	x4, [x20, #:lo12:.LANCHOR64]
 	ubfiz	x2, x0, 2, 16
 	add	w0, w0, 1
 	str	w3, [x4, x2]
 	strh	w0, [x1, 24]
-.L2534:
+.L2833:
 	add	x26, x26, 1
-	b	.L2532
+	b	.L2831
 	.size	gc_scan_src_blk, .-gc_scan_src_blk
 	.section	.text.ftl_scan_all_data,"ax",@progbits
 	.align	2
@@ -16792,20 +18134,20 @@ ftl_scan_all_data:
 	stp	x27, x28, [sp, 96]
 	add	x28, x23, :lo12:.LANCHOR54
 	stp	x21, x22, [sp, 48]
-	adrp	x24, .LC140
+	adrp	x24, .LC200
 	stp	x25, x26, [sp, 80]
 	bl	buf_alloc
 	mov	w1, 0
 	mov	x19, x0
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC198
+	add	x0, x0, :lo12:.LC198
 	bl	printf
-	add	x0, x24, :lo12:.LC140
+	add	x0, x24, :lo12:.LC200
 	str	x0, [x29, 120]
-.L2557:
+.L2856:
 	ldr	w0, [x23, #:lo12:.LANCHOR54]
 	cmp	w20, w0
-	bcc	.L2570
+	bcc	.L2869
 	mov	x0, x19
 	bl	buf_free
 	ldp	x29, x30, [sp, 16]
@@ -16816,35 +18158,35 @@ ftl_scan_all_data:
 	ldp	x27, x28, [sp, 96]
 	add	sp, sp, 160
 	ret
-.L2570:
+.L2869:
 	mov	w0, -1
 	str	w0, [x19, 36]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2558
+	bne	.L2857
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2558:
+.L2857:
 	tst	x20, 4095
-	bne	.L2559
+	bne	.L2858
 	ldr	w2, [x29, 140]
-	adrp	x0, .LC139
+	adrp	x0, .LC199
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC139
+	add	x0, x0, :lo12:.LC199
 	bl	printf
-.L2559:
+.L2858:
 	ldr	w0, [x29, 140]
 	stp	w0, w0, [x19, 40]
 	cmn	w0, #1
-	bne	.L2560
-.L2562:
+	bne	.L2859
+.L2861:
 	add	w20, w20, 1
-	b	.L2557
-.L2560:
+	b	.L2856
+.L2859:
 	mov	w1, 1
 	mov	x0, x19
 	bl	sblk_read_page
@@ -16852,16 +18194,16 @@ ftl_scan_all_data:
 	ldr	x0, [x19, 24]
 	cmp	w3, 256
 	ccmn	w3, #1, 4, ne
-	beq	.L2561
+	beq	.L2860
 	ldr	w1, [x0, 4]
 	cmp	w20, w1
-	beq	.L2562
-.L2561:
+	beq	.L2861
+.L2860:
 	ldr	x1, [x19, 8]
-	add	x27, x24, :lo12:.LC140
-	adrp	x25, .LANCHOR52
-	adrp	x26, .LC141
-	adrp	x22, .LANCHOR117
+	add	x27, x24, :lo12:.LC200
+	adrp	x25, .LANCHOR114
+	adrp	x26, .LC201
+	adrp	x22, .LANCHOR120
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 8]
 	ldr	w1, [x1]
@@ -16875,24 +18217,24 @@ ftl_scan_all_data:
 	ldr	x1, [x19, 24]
 	ldr	w0, [x1, 8]
 	cmn	w0, #1
-	bne	.L2563
-.L2565:
-	ldrb	w21, [x25, #:lo12:.LANCHOR52]
+	bne	.L2862
+.L2864:
+	ldrb	w21, [x25, #:lo12:.LANCHOR114]
 	mov	w0, w20
 	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR117
+	add	x22, x22, :lo12:.LANCHOR120
 	mov	w4, w0
-	add	x0, x26, :lo12:.LC141
+	add	x0, x26, :lo12:.LC201
 	lsl	w27, w21, 7
 	ubfiz	w3, w21, 7, 9
 	sub	w3, w3, #1
 	add	x21, x22, 8
 	and	w3, w3, w20
-	adrp	x26, .LC143
+	adrp	x26, .LC203
 	sdiv	w27, w20, w27
 	and	w3, w3, 65535
 	add	x22, x22, 520
-	add	x26, x26, :lo12:.LC143
+	add	x26, x26, :lo12:.LC203
 	mov	w1, w20
 	and	w25, w27, 65535
 	mov	w2, w25
@@ -16901,26 +18243,26 @@ ftl_scan_all_data:
 	add	x1, x29, 140
 	mov	w0, w20
 	bl	pm_log2phys
-.L2564:
+.L2863:
 	ldr	x1, [x21]
-	cbz	x1, .L2569
+	cbz	x1, .L2868
 	ldrh	w0, [x21, -8]
 	cmp	w0, w25
-	bne	.L2569
+	bne	.L2868
 	mov	w3, 4096
 	mov	w2, 4
 	mov	x0, x26
 	bl	rknand_print_hex
-.L2569:
+.L2868:
 	add	x21, x21, 16
 	cmp	x22, x21
-	bne	.L2564
-	b	.L2562
-.L2563:
+	bne	.L2863
+	b	.L2861
+.L2862:
 	ldr	w21, [x1, 4]
 	ldr	w1, [x28]
 	cmp	w21, w1
-	bcs	.L2565
+	bcs	.L2864
 	str	w0, [x19, 40]
 	mov	w1, 1
 	mov	x0, x19
@@ -16942,12 +18284,12 @@ ftl_scan_all_data:
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2566
+	bne	.L2865
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w21
 	bl	pm_log2phys
-.L2566:
+.L2865:
 	ldr	w0, [x29, 140]
 	mov	w1, 1
 	str	w0, [x19, 40]
@@ -16966,7 +18308,7 @@ ftl_scan_all_data:
 	ldr	w3, [x19, 52]
 	ldr	x0, [x29, 120]
 	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR52]
+	ldrb	w3, [x25, #:lo12:.LANCHOR114]
 	mov	w0, w21
 	str	w3, [x29, 104]
 	lsl	w2, w3, 7
@@ -16978,7 +18320,7 @@ ftl_scan_all_data:
 	ldr	w3, [x29, 104]
 	mov	w1, w21
 	ldr	w2, [x29, 112]
-	add	x0, x26, :lo12:.LC141
+	add	x0, x26, :lo12:.LC201
 	ubfiz	w3, w3, 7, 9
 	and	w2, w2, 65535
 	sub	w3, w3, #1
@@ -16989,28 +18331,28 @@ ftl_scan_all_data:
 	mov	w2, 0
 	add	x1, x29, 140
 	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR117
-	adrp	x5, .LC142
+	add	x0, x22, :lo12:.LANCHOR120
+	adrp	x5, .LC202
 	add	x21, x0, 8
 	add	x4, x0, 520
-	add	x5, x5, :lo12:.LC142
-.L2568:
+	add	x5, x5, :lo12:.LC202
+.L2867:
 	ldr	x1, [x21]
-	cbz	x1, .L2567
+	cbz	x1, .L2866
 	ldrh	w0, [x21, -8]
 	cmp	w0, w27
-	bne	.L2567
+	bne	.L2866
 	mov	x0, x5
 	stp	x4, x5, [x29, 104]
 	mov	w3, 4096
 	mov	w2, 4
 	bl	rknand_print_hex
 	ldp	x4, x5, [x29, 104]
-.L2567:
+.L2866:
 	add	x21, x21, 16
 	cmp	x4, x21
-	bne	.L2568
-	b	.L2565
+	bne	.L2867
+	b	.L2864
 	.size	ftl_scan_all_data, .-ftl_scan_all_data
 	.section	.text.ftl_update_l2p_map,"ax",@progbits
 	.align	2
@@ -17024,7 +18366,7 @@ ftl_update_l2p_map:
 	stp	x23, x24, [sp, 48]
 	adrp	x0, .LANCHOR80
 	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR105
+	adrp	x24, .LANCHOR106
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
 	ldrh	w23, [x0, #:lo12:.LANCHOR80]
@@ -17032,33 +18374,40 @@ ftl_update_l2p_map:
 	ldrh	w19, [x22, 12]
 	str	x24, [x29, 104]
 	mul	w23, w23, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR105]
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
 	add	x19, x0, x19, lsl 2
 	add	x0, x19, x23, sxtw 2
 	ldr	w0, [x0, -4]
 	cmn	w0, #1
-	bne	.L2581
-	adrp	x27, .LANCHOR52
+	beq	.L2880
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC0
+	mov	w2, 1450
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2880:
+	adrp	x27, .LANCHOR114
 	mov	x28, 0
-	add	x0, x27, :lo12:.LANCHOR52
+	add	x0, x27, :lo12:.LANCHOR114
 	mov	w21, 0
 	str	x0, [x29, 96]
-.L2582:
+.L2881:
 	cmp	w28, w23
-	blt	.L2590
-	adrp	x0, .LANCHOR29
+	blt	.L2888
+	adrp	x0, .LANCHOR7
 	adrp	x19, .LANCHOR4
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 12, .L2591
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L2889
 	ldrh	w1, [x22]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w3, [x2, x0]
-	adrp	x0, .LC147
+	adrp	x0, .LC207
 	mov	w2, w21
-	add	x0, x0, :lo12:.LC147
+	add	x0, x0, :lo12:.LC207
 	bl	printf
-.L2591:
+.L2889:
 	ldrh	w1, [x22]
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldp	x23, x24, [sp, 48]
@@ -17069,47 +18418,38 @@ ftl_update_l2p_map:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 128
 	ret
-.L2581:
-	adrp	x1, .LANCHOR188
-	adrp	x0, .LC0
-	mov	w2, 1432
-	add	x1, x1, :lo12:.LANCHOR188
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2583:
-	b	.L2583
-.L2590:
+.L2888:
 	ldr	w2, [x19, x28, lsl 2]
 	cmn	w2, #1
-	beq	.L2584
-	ldrb	w20, [x27, #:lo12:.LANCHOR52]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	beq	.L2882
+	ldrb	w20, [x27, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	lsl	w20, w20, 7
 	udiv	w20, w2, w20
 	and	w20, w20, 65535
-	tbz	x0, 12, .L2585
-	adrp	x0, .LC144
+	tbz	x0, 12, .L2883
+	adrp	x0, .LC204
 	mov	w3, w28
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC144
+	add	x0, x0, :lo12:.LC204
 	bl	printf
-.L2585:
+.L2883:
 	adrp	x25, .LANCHOR99
-	adrp	x26, .LC145
+	adrp	x26, .LC205
 	mov	x24, x28
 	add	x25, x25, :lo12:.LANCHOR99
-	add	x26, x26, :lo12:.LC145
-.L2589:
+	add	x26, x26, :lo12:.LC205
+.L2887:
 	ldr	w1, [x19, x24, lsl 2]
 	cmn	w1, #1
-	beq	.L2586
+	beq	.L2884
 	ldr	x0, [x29, 96]
 	ldrb	w2, [x0]
 	lsl	w2, w2, 7
 	udiv	w1, w1, w2
 	cmp	w20, w1, uxth
-	bne	.L2586
+	bne	.L2884
 	ldrb	w0, [x22, 9]
 	sdiv	w1, w24, w0
 	msub	w0, w1, w0, w24
@@ -17121,17 +18461,17 @@ ftl_update_l2p_map:
 	str	w2, [x29, 124]
 	ldr	w1, [x19, x24, lsl 2]
 	bl	pm_ppa_update_check
-	cbz	w0, .L2587
+	cbz	w0, .L2885
 	ldr	x0, [x29, 104]
 	mov	w3, w23
 	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR105]
-	adrp	x0, .LC146
-	add	x0, x0, :lo12:.LC146
+	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LC206
+	add	x0, x0, :lo12:.LC206
 	bl	rknand_print_hex
-.L2588:
-	b	.L2588
-.L2587:
+.L2886:
+	b	.L2886
+.L2885:
 	ldr	w0, [x19, x24, lsl 2]
 	add	w21, w21, 1
 	mov	w2, 1
@@ -17140,13 +18480,13 @@ ftl_update_l2p_map:
 	bl	pm_log2phys
 	mov	w0, -1
 	str	w0, [x19, x24, lsl 2]
-.L2586:
+.L2884:
 	add	x24, x24, 1
 	cmp	w23, w24
-	bgt	.L2589
-.L2584:
+	bgt	.L2887
+.L2882:
 	add	x28, x28, 1
-	b	.L2582
+	b	.L2881
 	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
 	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
@@ -17162,9 +18502,9 @@ ftl_alloc_new_data_sblk:
 	ldrh	w0, [x19]
 	mov	w1, 65535
 	cmp	w0, w1
-	beq	.L2607
+	beq	.L2908
 	bl	zftl_insert_data_list
-.L2607:
+.L2908:
 	adrp	x0, .LANCHOR5
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
@@ -17188,25 +18528,25 @@ ftl_alloc_new_data_sblk:
 	.type	ftl_write_commit, %function
 ftl_write_commit:
 	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR43
+	adrp	x0, .LANCHOR46
 	add	x29, sp, 0
 	stp	x25, x26, [sp, 64]
-	add	x26, x0, :lo12:.LANCHOR43
+	add	x26, x0, :lo12:.LANCHOR46
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-.L2612:
-	adrp	x3, .LANCHOR50
-	ldrb	w1, [x3, #:lo12:.LANCHOR50]
-	cbz	w1, .L2614
-	adrp	x4, .LANCHOR49
-	adrp	x2, .LANCHOR43
-	add	x2, x2, :lo12:.LANCHOR43
+.L2913:
+	adrp	x3, .LANCHOR53
+	ldrb	w1, [x3, #:lo12:.LANCHOR53]
+	cbz	w1, .L2915
+	adrp	x4, .LANCHOR52
+	adrp	x2, .LANCHOR46
+	add	x2, x2, :lo12:.LANCHOR46
 	sub	w1, w1, #1
-	ldrb	w0, [x4, #:lo12:.LANCHOR49]
+	ldrb	w0, [x4, #:lo12:.LANCHOR52]
 	str	x0, [x29, 104]
-	strb	w1, [x3, #:lo12:.LANCHOR50]
+	strb	w1, [x3, #:lo12:.LANCHOR53]
 	adrp	x1, .LANCHOR54
 	ubfiz	x27, x0, 6, 8
 	add	x5, x2, x27
@@ -17216,13 +18556,13 @@ ftl_write_commit:
 	add	x0, x2, x5
 	ldrb	w5, [x2, x5]
 	ldr	w22, [x0, 36]
-	strb	w5, [x4, #:lo12:.LANCHOR49]
+	strb	w5, [x4, #:lo12:.LANCHOR52]
 	cmp	w22, w1
-	bcc	.L2616
+	bcc	.L2917
 	ldr	x0, [x29, 120]
 	bl	buf_free
 	mov	w0, -1
-.L2611:
+.L2912:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -17230,7 +18570,7 @@ ftl_write_commit:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 144
 	ret
-.L2616:
+.L2917:
 	ldrb	w21, [x0, 57]
 	ldrb	w20, [x0, 56]
 	ldr	x24, [x0, 8]
@@ -17238,17 +18578,17 @@ ftl_write_commit:
 	adrp	x0, .LANCHOR112
 	str	x0, [x29, 112]
 	ldrb	w1, [x0, #:lo12:.LANCHOR112]
-	cbz	w1, .L2618
-	adrp	x0, .LANCHOR151
-	ldrb	w1, [x0, #:lo12:.LANCHOR151]
+	cbz	w1, .L2919
+	adrp	x0, .LANCHOR160
+	ldrb	w1, [x0, #:lo12:.LANCHOR160]
 	add	x1, x2, x1, lsl 6
-.L2619:
+.L2920:
 	ldrb	w0, [x1]
 	cmp	w0, 255
-	bne	.L2620
+	bne	.L2921
 	ldr	w0, [x1, 36]
 	cmp	w22, w0
-	bne	.L2618
+	bne	.L2919
 	ldr	x0, [x1, 8]
 	ubfiz	x21, x21, 9, 8
 	lsl	w2, w20, 9
@@ -17257,33 +18597,33 @@ ftl_write_commit:
 	bl	ftl_memcpy
 	ldr	x0, [x29, 120]
 	bl	buf_free
-	b	.L2612
-.L2620:
+	b	.L2913
+.L2921:
 	ubfiz	x1, x0, 6, 8
 	add	x1, x26, x1
-	b	.L2619
-.L2618:
+	b	.L2920
+.L2919:
 	mov	w0, w22
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 140]
 	cmn	w0, #1
-	bne	.L2622
+	bne	.L2923
 	mov	w2, 0
 	add	x1, x29, 140
 	mov	w0, w22
 	bl	pm_log2phys
-.L2622:
+.L2923:
 	adrp	x25, .LANCHOR5
 	add	x1, x26, 2
 	mov	w0, 0
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2625:
+.L2926:
 	ldr	w2, [x1, 34]
 	cmp	w22, w2
-	bne	.L2623
+	bne	.L2924
 	ldrb	w2, [x1]
-	tbz	x2, 3, .L2623
+	tbz	x2, 3, .L2924
 	ubfiz	x0, x0, 6, 32
 	and	w2, w2, -9
 	add	x0, x26, x0
@@ -17291,50 +18631,50 @@ ftl_write_commit:
 	ldr	x23, [x0, 8]
 	ldr	w0, [x0, 40]
 	str	w0, [x29, 140]
-.L2624:
-	adrp	x0, .LANCHOR52
+.L2925:
+	adrp	x0, .LANCHOR114
 	str	x0, [x29, 96]
-	ldrb	w1, [x0, #:lo12:.LANCHOR52]
+	ldrb	w1, [x0, #:lo12:.LANCHOR114]
 	cmp	w20, w1
-	bcs	.L2650
-	cbz	x23, .L2627
-	cbz	w21, .L2628
+	bcs	.L2950
+	add	w20, w21, w20
+	cbz	x23, .L2928
+	cbz	w21, .L2929
 	lsl	w2, w21, 9
 	mov	x1, x23
 	mov	x0, x24
 	bl	ftl_memcpy
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2628:
+.L2929:
 	ldr	x0, [x29, 96]
-	add	w20, w21, w20
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	cmp	w20, w2
-	bcc	.L2629
+	bcc	.L2930
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2650:
+.L2950:
 	mov	w23, 0
-	b	.L2626
-.L2623:
+	b	.L2927
+.L2924:
 	add	w0, w0, 1
 	add	x1, x1, 64
 	cmp	w0, 32
-	bne	.L2625
+	bne	.L2926
 	mov	x23, 0
-	b	.L2624
-.L2629:
+	b	.L2925
+.L2930:
 	ubfiz	x0, x20, 9, 9
 	sub	w2, w2, w20
 	add	x1, x23, x0
 	lsl	w2, w2, 9
 	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2650
-.L2627:
+	b	.L2950
+.L2928:
 	ldr	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2630
+	beq	.L2931
 	mov	w0, 1
 	bl	buf_alloc
 	ldr	w1, [x29, 140]
@@ -17347,23 +18687,23 @@ ftl_write_commit:
 	ldr	w0, [x0, 4]
 	add	w23, w23, 1
 	cmp	w22, w0
-	bne	.L2631
+	bne	.L2932
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2632
-.L2631:
+	bne	.L2933
+.L2932:
 	ldrb	w1, [x27, 1]
 	mov	w3, w22
 	ldr	w4, [x27, 52]
-	adrp	x0, .LC148
+	adrp	x0, .LC208
 	ldr	w2, [x29, 140]
-	add	x0, x0, :lo12:.LC148
+	add	x0, x0, :lo12:.LC208
 	bl	printf
 	ldr	x1, [x27, 24]
 	mov	w3, 4
-	adrp	x0, .LC105
+	adrp	x0, .LC154
 	mov	w2, w3
-	add	x0, x0, :lo12:.LC105
+	add	x0, x0, :lo12:.LC154
 	bl	rknand_print_hex
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x29, 140]
@@ -17380,45 +18720,43 @@ ftl_write_commit:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2632:
+.L2933:
 	ldr	x0, [x27, 24]
 	ldr	w0, [x0, 4]
 	cmp	w22, w0
-	bne	.L2633
+	bne	.L2934
 	ldr	w0, [x27, 52]
 	cmn	w0, #1
-	bne	.L2634
-.L2633:
-	adrp	x1, .LANCHOR189
+	bne	.L2935
+.L2934:
+	adrp	x1, .LANCHOR201
 	adrp	x0, .LC0
-	mov	w2, 497
-	add	x1, x1, :lo12:.LANCHOR189
+	mov	w2, 544
+	add	x1, x1, :lo12:.LANCHOR201
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2635:
-	b	.L2635
-.L2634:
-	cbz	w21, .L2636
+.L2935:
+	cbz	w21, .L2936
 	ldr	w0, [x29, 140]
 	lsl	w2, w21, 9
 	cmn	w0, #1
-	beq	.L2637
+	beq	.L2937
 	ldr	x1, [x27, 8]
 	mov	x0, x24
 	bl	ftl_memcpy
-.L2638:
+.L2938:
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 48
-.L2636:
+.L2936:
 	ldr	x0, [x29, 96]
-	add	w20, w21, w20
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	cmp	w20, w2
-	bcc	.L2639
+	bcc	.L2939
+	bls	.L2940
 	ldr	x19, [x25, #:lo12:.LANCHOR5]
 	add	x19, x19, 16
-.L2640:
-	cbz	x27, .L2626
+.L2940:
+	cbz	x27, .L2927
 	ldrb	w0, [x27, 2]
 	mov	x1, x27
 	and	w0, w0, -9
@@ -17428,17 +18766,17 @@ ftl_write_commit:
 	bl	buf_remove_buf
 	mov	x0, x27
 	bl	buf_free
-.L2626:
+.L2927:
 	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2642
+	cbnz	w0, .L2942
 	bl	ftl_flush
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2642:
+.L2942:
 	mov	x0, x19
 	bl	ftl_get_new_free_page
 	ldr	x1, [x29, 104]
-	adrp	x20, .LANCHOR151
+	adrp	x20, .LANCHOR160
 	lsl	x2, x1, 6
 	add	x1, x26, x2
 	ldr	w3, [x1, 32]
@@ -17459,33 +18797,33 @@ ftl_write_commit:
 	sub	w0, w0, #1
 	strh	w0, [x1, 48]
 	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR151
+	add	x0, x20, :lo12:.LANCHOR160
 	bl	buf_add_tail
 	ldr	x0, [x29, 112]
 	ldrb	w2, [x0, #:lo12:.LANCHOR112]
 	add	w2, w2, 1
 	and	w2, w2, 255
 	strb	w2, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR190
+	adrp	x0, .LANCHOR202
 	cmp	w2, 2
-	str	wzr, [x0, #:lo12:.LANCHOR190]
+	str	wzr, [x0, #:lo12:.LANCHOR202]
 	ldrh	w0, [x19, 6]
-	bhi	.L2643
+	bhi	.L2943
 	cmp	w0, 1
-	bne	.L2615
-.L2643:
+	bne	.L2916
+.L2943:
 	ldrb	w1, [x19, 5]
 	cmp	w1, 0
 	mov	w1, 0
 	cset	w4, ne
 	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR151]
+	ldrb	w0, [x20, #:lo12:.LANCHOR160]
 	csinc	w4, w2, w4, eq
 	mov	w3, w0
-.L2647:
+.L2947:
 	cmp	w1, w4
-	bne	.L2648
-	strb	w3, [x20, #:lo12:.LANCHOR151]
+	bne	.L2948
+	strb	w3, [x20, #:lo12:.LANCHOR160]
 	and	w1, w1, 255
 	ldr	x3, [x29, 112]
 	sub	w2, w2, w1
@@ -17495,58 +18833,58 @@ ftl_write_commit:
 	bl	sblk_prog_page
 	ldrh	w0, [x19, 6]
 	cmp	w0, 1
-	bne	.L2615
+	bne	.L2916
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	mov	x0, x19
 	bl	ftl_write_last_log_page
 	mov	x0, x19
 	bl	ftl_alloc_new_data_sblk
-.L2615:
-	adrp	x0, .LANCHOR50
-	ldrb	w0, [x0, #:lo12:.LANCHOR50]
-	cbnz	w0, .L2612
-.L2614:
+.L2916:
+	adrp	x0, .LANCHOR53
+	ldrb	w0, [x0, #:lo12:.LANCHOR53]
+	cbnz	w0, .L2913
+.L2915:
 	bl	ftl_write_completed
 	mov	w0, 0
-	b	.L2611
-.L2639:
+	b	.L2912
+.L2939:
 	ldr	w0, [x29, 140]
 	sub	w2, w2, w20
 	lsl	w2, w2, 9
-	ubfiz	x20, x20, 7, 9
 	cmn	w0, #1
-	beq	.L2641
+	ubfiz	x0, x20, 7, 9
+	beq	.L2941
 	ldr	x1, [x27, 8]
-	lsl	x20, x20, 2
-	add	x0, x24, x20
-	add	x1, x1, x20
+	lsl	x0, x0, 2
+	add	x1, x1, x0
+	add	x0, x24, x0
 	bl	ftl_memcpy
-	b	.L2640
-.L2641:
+	b	.L2940
+.L2941:
 	mov	w1, 0
-	add	x0, x24, x20, lsl 2
+	add	x0, x24, x0, lsl 2
 	bl	ftl_memset
-	b	.L2640
-.L2648:
+	b	.L2940
+.L2948:
 	ubfiz	x3, x3, 6, 8
 	add	w1, w1, 1
 	ldrb	w3, [x26, x3]
-	b	.L2647
-.L2649:
+	b	.L2947
+.L2949:
 	lsl	w2, w21, 9
 	mov	x27, 0
 	mov	w23, 0
-.L2637:
+.L2937:
 	mov	w1, 0
 	mov	x0, x24
 	bl	ftl_memset
-	b	.L2638
-.L2630:
-	cbnz	w21, .L2649
+	b	.L2938
+.L2931:
+	cbnz	w21, .L2949
 	mov	w23, 0
 	mov	x27, 0
-	b	.L2636
+	b	.L2936
 	.size	ftl_write_commit, .-ftl_write_commit
 	.section	.text.gc_do_copy_back,"ax",@progbits
 	.align	2
@@ -17563,10 +18901,10 @@ gc_do_copy_back:
 	stp	x23, x24, [sp, 64]
 	stp	x25, x26, [sp, 80]
 	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2673
+	cbnz	w0, .L2973
 	bl	buf_alloc
 	mov	x19, x0
-	cbz	x0, .L2672
+	cbz	x0, .L2972
 	adrp	x20, .LANCHOR63
 	add	x3, x20, :lo12:.LANCHOR63
 	ldrh	w2, [x3, 26]
@@ -17582,7 +18920,7 @@ gc_do_copy_back:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2675
+	bne	.L2975
 	adrp	x0, .LANCHOR96
 	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
@@ -17597,58 +18935,56 @@ gc_do_copy_back:
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-.L2675:
+.L2975:
 	ldr	w0, [x19, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2676
-	adrp	x1, .LANCHOR191
+	bne	.L2976
+	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 573
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2677:
-	b	.L2677
-.L2676:
+.L2976:
 	ldr	x0, [x19, 24]
 	ldr	w21, [x0, 4]
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 160]
 	cmn	w0, #1
-	bne	.L2678
+	bne	.L2977
 	mov	w2, 0
 	add	x1, x29, 160
 	mov	w0, w21
 	bl	pm_log2phys
-.L2678:
+.L2977:
 	ldr	w23, [x29, 160]
 	cmp	w22, w23
-	bne	.L2679
-	adrp	x0, .LANCHOR43
-	add	x0, x0, :lo12:.LANCHOR43
+	bne	.L2978
+	adrp	x0, .LANCHOR46
+	add	x0, x0, :lo12:.LANCHOR46
 	add	x1, x0, 2
 	add	x0, x0, 2050
-.L2682:
+.L2981:
 	ldr	w2, [x1, 34]
 	cmp	w21, w2
-	bne	.L2680
+	bne	.L2979
 	ldrb	w2, [x1]
-	tbz	x2, 1, .L2680
+	tbz	x2, 1, .L2979
 	mov	x0, x19
 	bl	buf_free
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2672
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2972
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LC149
+	adrp	x0, .LC209
 	mov	w2, w22
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC149
+	add	x0, x0, :lo12:.LC209
 	ldrh	w3, [x20, 26]
 	bl	printf
-.L2672:
+.L2972:
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
 	ldp	x23, x24, [sp, 64]
@@ -17657,14 +18993,14 @@ gc_do_copy_back:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 224
 	ret
-.L2680:
+.L2979:
 	add	x1, x1, 64
 	cmp	x0, x1
-	bne	.L2682
-	adrp	x0, .LANCHOR52
+	bne	.L2981
+	adrp	x0, .LANCHOR114
 	mov	w1, 10
 	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	ldrb	w0, [x0, #:lo12:.LANCHOR114]
 	strb	w0, [x19, 56]
 	ldrb	w0, [x19, 2]
 	str	w21, [x19, 36]
@@ -17673,54 +19009,54 @@ gc_do_copy_back:
 	ldr	x0, [x19, 24]
 	ldr	w0, [x0]
 	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2683
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2982
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	add	x1, x20, :lo12:.LANCHOR63
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC150
+	adrp	x0, .LC210
 	mov	w2, w23
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC210
 	ldrh	w5, [x1, 26]
 	mov	w1, w21
 	bl	printf
-.L2683:
+.L2982:
 	mov	x0, x19
 	bl	ftl_gc_write_buf
 	bl	ftl_write_commit
 	add	x20, x20, :lo12:.LANCHOR63
-	adrp	x0, .LANCHOR53
-	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR101
+	ldr	x1, [x0, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 60]
 	add	w0, w0, 1
 	str	w0, [x1, 60]
 	ldrh	w0, [x20, 28]
 	add	w0, w0, 1
 	strh	w0, [x20, 28]
-	b	.L2672
-.L2679:
-	adrp	x0, .LANCHOR29
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2684
+	b	.L2972
+.L2978:
+	adrp	x0, .LANCHOR7
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L2983
 	add	x20, x20, :lo12:.LANCHOR63
 	mov	w0, w21
 	bl	lpa_hash_get_ppa
 	mov	w3, w0
 	mov	w4, w22
-	adrp	x0, .LC150
+	adrp	x0, .LC210
 	ldrh	w5, [x20, 26]
 	mov	w2, w23
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC150
+	add	x0, x0, :lo12:.LC210
 	bl	printf
-.L2684:
+.L2983:
 	mov	x0, x19
 	bl	buf_free
-	b	.L2672
-.L2673:
+	b	.L2972
+.L2973:
 	adrp	x1, .LANCHOR5
 	adrp	x0, .LANCHOR67
 	stp	x0, x1, [x29, 128]
@@ -17729,10 +19065,10 @@ gc_do_copy_back:
 	ldrb	w25, [x0, #:lo12:.LANCHOR67]
 	add	x22, x22, 80
 	cmp	w25, 3
-	bne	.L2685
+	bne	.L2984
 	adrp	x0, .LANCHOR69
 	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	cbz	w0, .L2686
+	cbz	w0, .L2985
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	ldrh	w20, [x0, 314]
@@ -17741,7 +19077,7 @@ gc_do_copy_back:
 	sdiv	w21, w20, w21
 	madd	w19, w21, w19, w20
 	and	w19, w19, 65535
-.L2687:
+.L2986:
 	adrp	x1, .LANCHOR71
 	ldrb	w0, [x22, 9]
 	add	x4, x24, :lo12:.LANCHOR63
@@ -17750,21 +19086,21 @@ gc_do_copy_back:
 	mul	w8, w25, w0
 	ldrh	w10, [x4, 24]
 	mul	w3, w3, w0
-	adrp	x0, .LANCHOR132
-	ldr	x7, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR137
+	ldr	x7, [x0, #:lo12:.LANCHOR137]
 	sub	w3, w3, #1
-.L2690:
+.L2989:
 	cmp	w2, w8
-	blt	.L2692
-.L2720:
+	blt	.L2991
+.L3018:
 	mov	w23, 1
-	b	.L2688
-.L2686:
+	b	.L2987
+.L2985:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w20, [x22, 9]
 	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR192
-	add	x0, x0, :lo12:.LANCHOR192
+	adrp	x0, .LANCHOR204
+	add	x0, x0, :lo12:.LANCHOR204
 	sdiv	w19, w1, w20
 	ldrh	w23, [x0, w19, sxtw 1]
 	msub	w19, w19, w20, w1
@@ -17775,31 +19111,31 @@ gc_do_copy_back:
 	madd	w20, w21, w20, w19
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 65535
-	beq	.L2687
-.L2688:
-	adrp	x0, .LANCHOR29
+	beq	.L2986
+.L2987:
+	adrp	x0, .LANCHOR7
 	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR29]
-	tbz	x1, 8, .L2693
-	adrp	x0, .LANCHOR132
+	ldr	w1, [x0, #:lo12:.LANCHOR7]
+	tbz	x1, 8, .L2992
+	adrp	x0, .LANCHOR137
 	ubfiz	x1, x20, 2, 16
 	mov	w6, w20
 	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR132]
+	ldr	x2, [x0, #:lo12:.LANCHOR137]
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrh	w4, [x0, 314]
-	adrp	x0, .LC151
+	adrp	x0, .LC211
 	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC151
+	add	x0, x0, :lo12:.LC211
 	mov	w2, w23
 	mov	w1, w21
 	bl	printf
-.L2693:
-	adrp	x0, .LANCHOR43
+.L2992:
+	adrp	x0, .LANCHOR46
 	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR46
 	str	x0, [x29, 120]
-.L2694:
+.L2993:
 	ldrb	w2, [x22, 9]
 	ldr	w0, [x29, 152]
 	ldrh	w26, [x29, 152]
@@ -17807,27 +19143,27 @@ gc_do_copy_back:
 	str	w0, [x29, 156]
 	mul	w1, w25, w2
 	cmp	w0, w1
-	blt	.L2707
+	blt	.L3005
 	ldr	x0, [x29, 128]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
 	add	x0, x29, 160
-	beq	.L2708
+	beq	.L3006
 	sub	w3, w1, #1
 	mov	w2, 0
-.L2709:
+.L3007:
 	cmp	w2, w3
-	blt	.L2715
+	blt	.L3013
 	ldr	x0, [x0, w3, sxtw 3]
 	mov	w2, -1
 	strb	w2, [x0]
 	ldr	x0, [x29, 160]
 	bl	sblk_prog_page
-	b	.L2714
-.L2685:
+	b	.L3012
+.L2984:
 	adrp	x0, .LANCHOR98
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L2689
+	cbnz	w0, .L2988
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 1
@@ -17835,8 +19171,8 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2687
-.L2689:
+	b	.L2986
+.L2988:
 	add	x0, x24, :lo12:.LANCHOR63
 	ldrb	w19, [x22, 9]
 	mov	w25, 2
@@ -17844,28 +19180,28 @@ gc_do_copy_back:
 	sdiv	w21, w20, w19
 	msub	w19, w21, w19, w20
 	and	w19, w19, 65535
-	b	.L2687
-.L2692:
+	b	.L2986
+.L2991:
 	add	w5, w20, w2
 	cmp	w5, w3
-	beq	.L2720
+	beq	.L3018
 	sbfiz	x5, x5, 2, 32
 	ldr	w0, [x7, x5]
 	cmn	w0, #1
-	bne	.L2691
+	bne	.L2990
 	ldrh	w6, [x4, 26]
 	cmp	w6, w10
-	bcs	.L2672
+	bcs	.L2972
 	mov	w0, w6
 	bl	gc_get_src_ppa_from_index
 	add	w6, w6, 1
 	strh	w6, [x4, 26]
 	str	w0, [x7, x5]
-.L2691:
+.L2990:
 	add	w2, w2, 1
 	and	w2, w2, 65535
-	b	.L2690
-.L2707:
+	b	.L2989
+.L3005:
 	ldr	w0, [x29, 156]
 	add	w0, w20, w0
 	str	w0, [x29, 144]
@@ -17874,11 +19210,11 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	ldrb	w0, [x0, x27]
 	cmp	w0, 255
-	bne	.L2695
+	bne	.L2994
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2696
+	cbnz	x0, .L2995
 	bl	sblk_wait_write_queue_completed
 	bl	ftl_write_completed
 	bl	gc_write_completed
@@ -17886,12 +19222,12 @@ gc_do_copy_back:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2672
-.L2696:
+	cbz	x0, .L2972
+.L2995:
 	adrp	x0, .LANCHOR68
 	ldrb	w1, [x28, 1]
 	adrp	x5, .LANCHOR71
-	adrp	x6, .LANCHOR132
+	adrp	x6, .LANCHOR137
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	strb	w1, [x0, x27]
 	add	x1, x24, :lo12:.LANCHOR63
@@ -17907,11 +19243,11 @@ gc_do_copy_back:
 	mul	w0, w0, w7
 	sub	w0, w0, #1
 	cmp	w1, w0
-	bne	.L2697
-	adrp	x0, .LANCHOR131
+	bne	.L2996
+	adrp	x0, .LANCHOR136
 	adrp	x4, .LANCHOR72
 	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	ldr	x1, [x0, #:lo12:.LANCHOR136]
 	mov	w0, -1
 	str	x4, [x29, 144]
 	str	w0, [x1, x27, lsl 2]
@@ -17926,13 +19262,13 @@ gc_do_copy_back:
 	ldrh	w0, [x5, #:lo12:.LANCHOR71]
 	ldrb	w1, [x4, #:lo12:.LANCHOR72]
 	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR132]
+	ldr	x1, [x6, #:lo12:.LANCHOR137]
 	lsl	w2, w0, 2
 	add	x0, x7, x0, sxtw 2
 	bl	ftl_memcpy
-	adrp	x0, .LANCHOR52
+	adrp	x0, .LANCHOR114
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldrb	w2, [x0, #:lo12:.LANCHOR114]
 	ldr	x0, [x28, 24]
 	lsl	w2, w2, 1
 	bl	ftl_memset
@@ -17953,26 +19289,26 @@ gc_do_copy_back:
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldr	w0, [x0, 132]
 	str	w0, [x6, 8]
-.L2695:
+.L2994:
 	adrp	x0, .LANCHOR68
 	ldr	w5, [x29, 156]
 	add	x3, x29, 160
 	ldr	x4, [x0, #:lo12:.LANCHOR68]
-	adrp	x0, .LANCHOR43
-	add	x2, x0, :lo12:.LANCHOR43
+	adrp	x0, .LANCHOR46
+	add	x2, x0, :lo12:.LANCHOR46
 	ldrb	w1, [x4, x27]
 	ubfiz	x0, x1, 6, 8
 	add	x0, x2, x0
 	add	x2, x2, x1, lsl 6
 	str	x0, [x3, w5, sxtw 3]
 	mov	w0, 2
-	adrp	x5, .LANCHOR133
+	adrp	x5, .LANCHOR138
 	strh	w0, [x2, 50]
 	ldr	x0, [x29, 128]
 	strb	w23, [x2, 61]
 	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L2702
+	bne	.L3000
 	udiv	w0, w26, w0
 	adrp	x6, .LANCHOR99
 	ldrh	w6, [x6, #:lo12:.LANCHOR99]
@@ -17987,13 +19323,13 @@ gc_do_copy_back:
 	ldrh	w6, [x2, 48]
 	orr	w3, w3, w21
 	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR133]
+	ldr	x2, [x5, #:lo12:.LANCHOR138]
 	orr	w0, w3, w0, lsl 24
 	str	w0, [x2, x6, lsl 2]
-.L2703:
+.L3001:
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2706
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L3004
 	ldr	x0, [x29, 120]
 	mov	w2, w23
 	ldrb	w4, [x4, x27]
@@ -18007,39 +19343,39 @@ gc_do_copy_back:
 	str	w0, [sp, 8]
 	mov	w0, 3
 	udiv	w26, w26, w0
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
+	adrp	x0, .LC212
+	add	x0, x0, :lo12:.LC212
 	add	w26, w26, w19
 	str	w26, [sp]
 	ldr	w5, [x1, 40]
 	ldr	w1, [x29, 156]
 	bl	printf
-.L2706:
+.L3004:
 	ldr	w0, [x29, 152]
 	add	w0, w0, 1
 	str	w0, [x29, 152]
-	b	.L2694
-.L2697:
-	ldr	x0, [x6, #:lo12:.LANCHOR132]
-	lsl	x4, x27, 2
+	b	.L2993
+.L2996:
+	lsl	x0, x27, 2
+	str	x0, [x29, 144]
+	ldr	x0, [x6, #:lo12:.LANCHOR137]
+	lsl	x1, x27, 2
+	ldr	w0, [x0, x1]
 	mov	w1, 1
-	str	x4, [x29, 144]
-	ldr	w0, [x0, x4]
 	str	w0, [x28, 40]
 	mov	x0, x28
 	bl	sblk_read_page
 	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2699
+	bne	.L2998
 	adrp	x0, .LANCHOR96
 	ldr	w1, [x28, 40]
-	ldrh	w5, [x0, #:lo12:.LANCHOR96]
+	ldrh	w4, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
-	sub	w2, w0, w5
+	sub	w2, w0, w4
 	mov	w0, 1
-	lsr	w1, w1, w5
+	lsr	w1, w1, w4
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
@@ -18049,67 +19385,65 @@ gc_do_copy_back:
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
 	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	bne	.L2699
+	bne	.L2998
 	ldr	x0, [x28, 24]
 	mov	w1, -1
 	str	w1, [x0, 4]
 	ldr	w0, [x28, 52]
 	cmp	w0, 512
 	ccmp	w0, w1, 4, ne
-	bne	.L2699
-	adrp	x1, .LANCHOR191
+	bne	.L2998
+	adrp	x1, .LANCHOR203
 	adrp	x0, .LC0
 	mov	w2, 688
-	add	x1, x1, :lo12:.LANCHOR191
+	add	x1, x1, :lo12:.LANCHOR203
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2700:
-	b	.L2700
-.L2699:
+.L2998:
 	ldr	x0, [x28, 24]
 	adrp	x1, .LANCHOR54
 	ldr	w1, [x1, #:lo12:.LANCHOR54]
 	ldr	w2, [x0, 4]
 	cmp	w2, w1
-	bcc	.L2701
+	bcc	.L2999
 	mov	w1, -1
 	str	w1, [x0, 4]
-.L2701:
-	adrp	x1, .LANCHOR131
+.L2999:
+	adrp	x1, .LANCHOR136
+	lsl	x3, x27, 2
 	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR131]
-	str	w2, [x1, x4]
+	ldr	x1, [x1, #:lo12:.LANCHOR136]
+	str	w2, [x1, x3]
 	ldr	w1, [x28, 40]
 	str	w1, [x0, 8]
-	b	.L2695
-.L2702:
+	b	.L2994
+.L3000:
 	cmp	w0, 2
-	bne	.L2704
+	bne	.L3002
 	adrp	x0, .LANCHOR98
 	adrp	x3, .LANCHOR99
 	ldrb	w0, [x0, #:lo12:.LANCHOR98]
-	cbnz	w0, .L2705
+	cbnz	w0, .L3003
 	ldr	w0, [x29, 156]
 	ldrh	w3, [x3, #:lo12:.LANCHOR99]
 	add	w0, w19, w0
 	add	x0, x22, x0, sxtw 1
 	ldrh	w0, [x0, 16]
 	madd	w0, w0, w3, w21
-.L2763:
+.L3064:
 	orr	w0, w0, 33554432
 	str	w0, [x2, 40]
-.L2704:
+.L3002:
 	ldr	x0, [x29, 120]
 	add	x0, x0, x1, lsl 6
 	ldrh	w2, [x0, 48]
 	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR133]
+	ldr	x0, [x5, #:lo12:.LANCHOR138]
 	str	w3, [x0, x2, lsl 2]
-	b	.L2703
-.L2705:
+	b	.L3001
+.L3003:
 	add	w0, w19, w26, lsr 1
 	ldrh	w3, [x3, #:lo12:.LANCHOR99]
 	add	x0, x22, x0, sxtw 1
@@ -18117,35 +19451,35 @@ gc_do_copy_back:
 	madd	w0, w0, w3, w21
 	and	w3, w26, 1
 	add	w0, w0, w3
-	b	.L2763
-.L2708:
+	b	.L3064
+.L3006:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x1, #:lo12:.LANCHOR69]
 	ldr	x1, [x29, 160]
-	cbz	w3, .L2710
-.L2713:
+	cbz	w3, .L3008
+.L3011:
 	strb	wzr, [x1, 60]
-	b	.L2711
-.L2710:
+	b	.L3009
+.L3008:
 	cmp	w23, 1
-	bne	.L2712
+	bne	.L3010
 	mov	w3, 9
-.L2762:
+.L3063:
 	strb	w3, [x1, 60]
-.L2711:
+.L3009:
 	add	x1, x0, 24
 	bl	sblk_xlc_prog_pages
-.L2714:
+.L3012:
 	adrp	x1, .LANCHOR69
 	ldrb	w3, [x22, 9]
 	ldrb	w1, [x1, #:lo12:.LANCHOR69]
 	and	w0, w3, 65535
-	cbz	w1, .L2716
+	cbz	w1, .L3014
 	add	w0, w0, w0, lsl 1
-.L2717:
-	adrp	x1, .LANCHOR53
+.L3015:
+	adrp	x1, .LANCHOR101
 	add	x24, x24, :lo12:.LANCHOR63
-	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	x1, [x1, #:lo12:.LANCHOR101]
 	ldr	w2, [x1, 52]
 	add	w2, w2, w0
 	str	w2, [x1, 52]
@@ -18157,35 +19491,277 @@ gc_do_copy_back:
 	ldrh	w1, [x1, #:lo12:.LANCHOR71]
 	mul	w1, w1, w3
 	cmp	w0, w1
-	blt	.L2718
+	blt	.L3016
 	ldr	x0, [x29, 136]
 	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	strh	wzr, [x0, 86]
-.L2718:
+.L3016:
 	bl	gc_write_completed
-	b	.L2672
-.L2712:
+	b	.L2972
+.L3010:
 	cmp	w23, 2
-	bne	.L2713
+	bne	.L3011
 	mov	w3, 13
-	b	.L2762
-.L2715:
+	b	.L3063
+.L3013:
 	ldr	x4, [x0, w2, sxtw 3]
 	add	w2, w2, 1
 	ldr	x5, [x0, w2, sxtw 3]
 	and	w2, w2, 65535
 	ldrb	w5, [x5, 1]
 	strb	w5, [x4]
-	b	.L2709
-.L2716:
+	b	.L3007
+.L3014:
 	adrp	x1, .LANCHOR98
 	ldrb	w2, [x1, #:lo12:.LANCHOR98]
 	mov	w1, w0
 	ubfiz	w0, w0, 1, 15
 	cmp	w2, 0
 	csel	w0, w0, w1, ne
-	b	.L2717
+	b	.L3015
 	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_discard,"ax",@progbits
+	.align	2
+	.global	zftl_discard
+	.type	zftl_discard, %function
+zftl_discard:
+	stp	x29, x30, [sp, -128]!
+	adrp	x2, .LANCHOR59
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	ldr	w2, [x2, #:lo12:.LANCHOR59]
+	add	w1, w0, w1
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w2, w1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bcc	.L3086
+	adrp	x24, .LANCHOR205
+	add	w22, w0, 24576
+	adrp	x0, .LANCHOR7
+	str	x0, [x29, 104]
+	ldr	w1, [x24, #:lo12:.LANCHOR205]
+	ldr	w2, [x0, #:lo12:.LANCHOR7]
+	add	w1, w19, w1
+	str	w1, [x24, #:lo12:.LANCHOR205]
+	tbz	x2, 12, .L3067
+	adrp	x0, .LC213
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC213
+	bl	printf
+.L3067:
+	adrp	x23, .LANCHOR101
+	adrp	x26, .LANCHOR114
+	ldr	x0, [x23, #:lo12:.LANCHOR101]
+	ldr	w27, [x0, 8]
+	add	w1, w27, 1
+	str	w1, [x0, 8]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrb	w21, [x26, #:lo12:.LANCHOR114]
+	udiv	w20, w22, w21
+	msub	w25, w20, w21, w22
+	cbz	w25, .L3068
+	sub	w21, w21, w25
+	mov	w0, w20
+	cmp	w21, w19
+	csel	w21, w21, w19, ls
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3069
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3069:
+	ldr	w0, [x29, 120]
+	and	w28, w21, 65535
+	cmn	w0, #1
+	beq	.L3071
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x3, x0
+	cbz	x0, .L3071
+	strb	w25, [x0, 57]
+	ubfiz	x25, x25, 9, 25
+	strb	w21, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	lsl	w2, w28, 9
+	stp	w27, w20, [x3, 32]
+	str	x3, [x29, 96]
+	add	x0, x0, x25
+	bl	ftl_memset
+	ldr	x3, [x29, 96]
+	mov	x0, x3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3071:
+	add	w20, w20, 1
+	sub	w19, w19, w28
+.L3068:
+	cbz	w19, .L3073
+	bl	ftl_flush
+.L3073:
+	adrp	x25, .LANCHOR96
+	add	x21, x26, :lo12:.LANCHOR114
+	add	x25, x25, :lo12:.LANCHOR96
+	mov	w0, -1
+	str	w0, [x29, 124]
+.L3074:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L3079
+	cbz	w19, .L3081
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L3082
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L3082:
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3081
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L3081
+	strb	wzr, [x0, 57]
+	strb	w19, [x0, 56]
+	stp	w27, w20, [x21, 32]
+	ldrb	w0, [x26, #:lo12:.LANCHOR114]
+	cmp	w19, w0
+	bcc	.L3084
+	adrp	x1, .LANCHOR206
+	adrp	x0, .LC0
+	mov	w2, 1177
+	add	x1, x1, :lo12:.LANCHOR206
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L3084:
+	ldr	x0, [x21, 8]
+	lsl	w2, w19, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3081:
+	ldr	w1, [x24, #:lo12:.LANCHOR205]
+	cmp	w1, 8192
+	bls	.L3087
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 12, .L3085
+	adrp	x0, .LC213
+	mov	w4, 0
+	mov	w3, w19
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC213
+	bl	printf
+.L3085:
+	str	wzr, [x24, #:lo12:.LANCHOR205]
+	bl	flt_sys_flush
+	adrp	x0, .LANCHOR207
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR207]
+.L3087:
+	mov	w0, 0
+	b	.L3065
+.L3079:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3075
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L3077
+	ldrb	w2, [x21]
+	mov	w1, 0
+	strb	w2, [x0, 56]
+	strb	wzr, [x0, 57]
+	ldr	x0, [x0, 8]
+	lsl	w2, w2, 9
+	stp	w27, w20, [x28, 32]
+	bl	ftl_memset
+	mov	x0, x28
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L3113:
+	ldr	x1, [x23, #:lo12:.LANCHOR101]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L3077:
+	ldrb	w0, [x21]
+	add	w20, w20, 1
+	sub	w19, w19, w0
+	b	.L3074
+.L3075:
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L3077
+	add	x1, x29, 124
+	mov	w2, 1
+	mov	w0, w20
+	bl	pm_log2phys
+	ldrh	w3, [x25]
+	mov	w0, 21
+	ldr	w1, [x29, 120]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w1, [x1, #:lo12:.LANCHOR95]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+	b	.L3113
+.L3086:
+	mov	w0, -1
+.L3065:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	mov	w0, w1
+	mov	w1, w2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
 	.section	.text.zftl_do_gc,"ax",@progbits
 	.align	2
 	.global	zftl_do_gc
@@ -18197,141 +19773,141 @@ zftl_do_gc:
 	stp	x29, x30, [sp, 16]
 	add	x29, sp, 16
 	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR130
-	stp	x21, x22, [sp, 48]
-	ldrh	w20, [x2, #:lo12:.LANCHOR89]
+	adrp	x19, .LANCHOR135
 	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR5
+	adrp	x24, .LANCHOR5
+	ldrh	w20, [x2, #:lo12:.LANCHOR89]
+	stp	x21, x22, [sp, 48]
+	ldrb	w2, [x19, #:lo12:.LANCHOR135]
 	ldrh	w21, [x1, #:lo12:.LANCHOR93]
-	ldrb	w2, [x19, #:lo12:.LANCHOR130]
 	stp	x25, x26, [sp, 80]
-	add	w20, w21, w20
-	ldr	x22, [x23, #:lo12:.LANCHOR5]
 	cmp	w2, 6
-	bhi	.L2868
-	mov	w24, w0
+	ldr	x23, [x24, #:lo12:.LANCHOR5]
+	add	w20, w21, w20
+	bhi	.L3222
+	mov	w22, w0
 	and	w20, w20, 65535
-	adrp	x0, .L2767
+	adrp	x0, .L3118
 	mov	x25, x1
-	add	x0, x0, :lo12:.L2767
+	add	x0, x0, :lo12:.L3118
 	ldrh	w0, [x0,w2,uxtw #1]
-	adr	x1, .Lrtx2767
+	adr	x1, .Lrtx3118
 	add	x0, x1, w0, sxth #2
 	br	x0
-.Lrtx2767:
+.Lrtx3118:
 	.section	.rodata.zftl_do_gc,"a",@progbits
 	.align	0
 	.align	2
-.L2767:
-	.2byte	(.L2766 - .Lrtx2767) / 4
-	.2byte	(.L2768 - .Lrtx2767) / 4
-	.2byte	(.L2769 - .Lrtx2767) / 4
-	.2byte	(.L2770 - .Lrtx2767) / 4
-	.2byte	(.L2771 - .Lrtx2767) / 4
-	.2byte	(.L2772 - .Lrtx2767) / 4
-	.2byte	(.L2773 - .Lrtx2767) / 4
+.L3118:
+	.2byte	(.L3117 - .Lrtx3118) / 4
+	.2byte	(.L3119 - .Lrtx3118) / 4
+	.2byte	(.L3120 - .Lrtx3118) / 4
+	.2byte	(.L3121 - .Lrtx3118) / 4
+	.2byte	(.L3122 - .Lrtx3118) / 4
+	.2byte	(.L3123 - .Lrtx3118) / 4
+	.2byte	(.L3124 - .Lrtx3118) / 4
 	.section	.text.zftl_do_gc
-.L2772:
+.L3123:
 	adrp	x21, .LANCHOR63
 	add	x25, x21, :lo12:.LANCHOR63
-	mov	w22, 0
-.L2774:
+	mov	w23, 0
+.L3125:
 	bl	gc_check_data_one_wl
-	cbz	w0, .L2841
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	cbz	w0, .L3190
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	add	x21, x21, :lo12:.LANCHOR63
 	strh	wzr, [x21, 56]
 	ldrh	w0, [x0, 80]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR53
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR101
+	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldr	x2, [x2, #:lo12:.LANCHOR101]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x21, 8]
 	bl	buf_free
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
 	str	xzr, [x21, 8]
-	b	.L2890
-.L2766:
+	b	.L3246
+.L3117:
 	adrp	x0, .LANCHOR91
 	mov	w1, 65535
 	ldrh	w4, [x0, #:lo12:.LANCHOR91]
-	ldrh	w0, [x22, 80]
+	ldrh	w0, [x23, 80]
 	add	w21, w21, w4
 	and	w21, w21, 65535
 	cmp	w0, w1
-	beq	.L2775
-	adrp	x1, .LANCHOR29
+	beq	.L3126
+	adrp	x1, .LANCHOR7
 	cmp	w21, 7
-	mov	w23, 3
+	mov	w22, 3
 	adrp	x24, .LANCHOR70
-	ldr	w1, [x1, #:lo12:.LANCHOR29]
-	csinc	w23, w23, wzr, hi
-	tbz	x1, 8, .L2777
-	ldrh	w7, [x22, 122]
+	ldr	w1, [x1, #:lo12:.LANCHOR7]
+	csinc	w22, w22, wzr, hi
+	tbz	x1, 8, .L3128
+	ldrh	w7, [x23, 122]
 	mov	w4, w21
-	ldrh	w6, [x22, 120]
+	ldrh	w6, [x23, 120]
 	mov	w3, w20
-	ldrh	w5, [x22, 124]
+	ldrh	w5, [x23, 124]
 	mov	w1, 1705
 	ldrb	w2, [x24, #:lo12:.LANCHOR70]
 	str	w0, [sp]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	adrp	x0, .LC214
+	add	x0, x0, :lo12:.LC214
 	bl	printf
-.L2777:
+.L3128:
 	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 1
-	mov	w1, w23
+	mov	w1, w22
 	bl	gc_search_src_blk
 	cmp	w0, 0
-	ble	.L2868
-.L2778:
+	ble	.L3222
+.L3129:
 	mov	w0, 1
-.L2889:
-	strb	w0, [x19, #:lo12:.LANCHOR130]
-	b	.L2868
-.L2775:
+.L3245:
+	strb	w0, [x19, #:lo12:.LANCHOR135]
+	b	.L3222
+.L3126:
 	adrp	x0, .LANCHOR84
-	cmp	w24, 1
+	cmp	w22, 1
 	ldrh	w25, [x0, #:lo12:.LANCHOR84]
 	adrp	x0, .LANCHOR82
 	ldrh	w26, [x0, #:lo12:.LANCHOR82]
-	bne	.L2779
+	bne	.L3130
 	bl	gc_scan_static_data
 	bl	gc_static_wearleveling
-.L2780:
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
+.L3131:
+	ldr	x2, [x24, #:lo12:.LANCHOR5]
 	adrp	x1, .LANCHOR70
 	mov	w0, 1
-	mov	x23, x1
+	mov	x24, x1
 	strb	w0, [x1, #:lo12:.LANCHOR70]
 	ldrh	w5, [x2, 124]
-	cbz	w5, .L2782
-	strb	w0, [x19, #:lo12:.LANCHOR130]
-	adrp	x0, .LANCHOR29
+	cbz	w5, .L3133
+	strb	w0, [x19, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR7
 	strb	wzr, [x1, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2868
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L3222
 	ldrh	w7, [x2, 122]
 	mov	w4, w21
 	ldrh	w6, [x2, 120]
 	mov	w3, w20
 	mov	w2, 0
 	mov	w1, 1762
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	adrp	x0, .LC215
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-	b	.L2868
-.L2779:
+	b	.L3222
+.L3130:
 	adrp	x0, .LANCHOR73
 	ldrh	w0, [x0, #:lo12:.LANCHOR73]
 	cmp	w0, w20
-	bcs	.L2780
-.L2868:
+	bcs	.L3131
+.L3222:
 	mov	w0, 16
 	ldp	x19, x20, [sp, 32]
 	ldp	x21, x22, [sp, 48]
@@ -18340,321 +19916,329 @@ zftl_do_gc:
 	ldp	x29, x30, [sp, 16]
 	add	sp, sp, 96
 	ret
-.L2782:
-	adrp	x22, .LANCHOR73
-	ldrh	w1, [x22, #:lo12:.LANCHOR73]
+.L3133:
+	adrp	x23, .LANCHOR73
+	ldrh	w1, [x23, #:lo12:.LANCHOR73]
 	cmp	w20, w1
-	bcs	.L2783
+	bcs	.L3134
 	cmp	w21, 1
-	bls	.L2784
+	bls	.L3135
 	cmp	w21, 16
-	bls	.L2785
+	bls	.L3136
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L2785
+	bcs	.L3136
 	mov	w2, 16
 	mov	w1, 3
-.L2886:
+.L3242:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L2786:
-	cbnz	w0, .L2778
-	b	.L2868
-.L2785:
+.L3137:
+	cbnz	w0, .L3129
+	b	.L3222
+.L3136:
 	mov	w2, 2
 	mov	w1, w2
 	mov	w0, 1
-.L2893:
+.L3248:
 	bl	gc_search_src_blk
 	tst	w0, 65535
-	bne	.L2778
+	bne	.L3129
 	mov	w2, 2
-	b	.L2887
-.L2784:
-	adrp	x0, .LANCHOR29
-	strb	wzr, [x23, #:lo12:.LANCHOR70]
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
-	tbz	x0, 8, .L2788
+	b	.L3243
+.L3135:
+	adrp	x0, .LANCHOR7
+	strb	wzr, [x24, #:lo12:.LANCHOR70]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
+	tbz	x0, 8, .L3139
 	ldrh	w7, [x2, 122]
-	adrp	x0, .LC154
+	adrp	x0, .LC215
 	ldrh	w6, [x2, 120]
 	mov	w5, 0
 	mov	w4, w21
 	mov	w3, w20
 	mov	w2, 0
 	mov	w1, 1778
-	add	x0, x0, :lo12:.LC154
+	add	x0, x0, :lo12:.LC215
 	bl	printf
-.L2788:
+.L3139:
 	cmp	w20, 16
-	bls	.L2789
+	bls	.L3140
 	mov	w2, 4
-.L2887:
+.L3243:
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR70]
-	b	.L2886
-.L2789:
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	b	.L3242
+.L3140:
 	mov	w2, 1
-	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
 	mov	w1, w2
-	b	.L2893
-.L2783:
-	cmp	w24, 1
+	b	.L3248
+.L3134:
+	cmp	w22, 1
 	lsl	w1, w1, 1
-	bne	.L2791
+	bne	.L3142
 	cmp	w20, w1
-	bge	.L2791
+	bge	.L3142
 	add	w0, w25, w26
 	and	w0, w0, 65535
 	cmp	w0, w21, lsr 1
-	bcs	.L2792
+	bcs	.L3143
 	adrp	x1, .LANCHOR86
 	ldrh	w2, [x1, #:lo12:.LANCHOR86]
 	adrp	x1, .LANCHOR87
 	ldrh	w1, [x1, #:lo12:.LANCHOR87]
 	cmp	w2, w1
-	bcs	.L2792
-.L2796:
+	bcs	.L3143
+.L3147:
 	adrp	x0, .LANCHOR83
 	ldrh	w0, [x0, #:lo12:.LANCHOR83]
 	lsr	w0, w0, 1
-	strh	w0, [x22, #:lo12:.LANCHOR73]
-	b	.L2868
-.L2792:
+	strh	w0, [x23, #:lo12:.LANCHOR73]
+	b	.L3222
+.L3143:
 	cmp	w21, 1
-	adrp	x24, .LANCHOR83
-	bls	.L2793
+	adrp	x22, .LANCHOR83
+	bls	.L3144
 	cmp	w21, 16
-	bls	.L2794
+	bls	.L3145
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 1
-.L2884:
+.L3240:
 	bl	gc_search_src_blk
 	and	w0, w0, 65535
-.L2795:
-	ldrh	w1, [x24, #:lo12:.LANCHOR83]
-	strh	w1, [x22, #:lo12:.LANCHOR73]
-	b	.L2786
-.L2794:
+.L3146:
+	ldrh	w1, [x22, #:lo12:.LANCHOR83]
+	strh	w1, [x23, #:lo12:.LANCHOR73]
+	b	.L3137
+.L3145:
 	mov	w2, 2
 	mov	w0, 1
 	mov	w1, w2
 	bl	gc_search_src_blk
 	ands	w0, w0, 65535
-	bne	.L2795
+	bne	.L3146
 	mov	w2, 2
 	mov	w1, 3
-	ldrb	w0, [x23, #:lo12:.LANCHOR70]
-	b	.L2884
-.L2793:
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	b	.L3240
+.L3144:
 	cmp	w20, w0
-	bcs	.L2796
-	strb	wzr, [x23, #:lo12:.LANCHOR70]
+	bcs	.L3147
+	strb	wzr, [x24, #:lo12:.LANCHOR70]
 	mov	w2, 8
 	mov	w1, 3
 	mov	w0, 0
-	b	.L2884
-.L2791:
+	b	.L3240
+.L3142:
 	cmp	w20, w1
-	bge	.L2796
-	b	.L2868
-.L2768:
+	bge	.L3147
+	b	.L3222
+.L3119:
 	adrp	x7, .LANCHOR63
 	mov	w0, 65535
 	ldrh	w1, [x7, #:lo12:.LANCHOR63]
 	cmp	w1, w0
-	bne	.L2797
+	bne	.L3148
 	bl	gc_get_src_blk
 	strh	w0, [x7, #:lo12:.LANCHOR63]
-.L2797:
+.L3148:
 	ldrh	w3, [x7, #:lo12:.LANCHOR63]
 	mov	w0, 65535
 	add	x1, x7, :lo12:.LANCHOR63
 	cmp	w3, w0
-	beq	.L2798
+	beq	.L3149
 	adrp	x0, .LANCHOR3
 	ldrh	w5, [x1, 56]
 	uxtw	x4, w3
 	ldr	x2, [x0, #:lo12:.LANCHOR3]
 	add	x2, x2, x4, lsl 2
-	cbz	w5, .L2799
+	cbz	w5, .L3150
 	add	x1, x1, 58
 	mov	w0, 0
-.L2801:
+.L3152:
 	ldrh	w6, [x1], 2
 	cmp	w6, w3
-	bne	.L2800
-.L2804:
+	bne	.L3151
+.L3156:
 	adrp	x0, .LANCHOR63
 	mov	w1, -1
 	strh	w1, [x0, #:lo12:.LANCHOR63]
-	b	.L2868
-.L2800:
+	b	.L3222
+.L3151:
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	cmp	w5, w0
-	bne	.L2801
-.L2799:
+	bne	.L3152
+.L3150:
 	ldrb	w0, [x2, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L2802
+	beq	.L3153
 	tst	w0, 192
-	bne	.L2803
-.L2802:
+	bne	.L3154
+.L3153:
 	adrp	x0, .LANCHOR4
 	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x4, lsl 1]
-	cbz	w0, .L2804
-	adrp	x1, .LANCHOR193
-	adrp	x0, .LC0
+	cbz	w0, .L3156
 	mov	w2, 1972
-	add	x1, x1, :lo12:.LANCHOR193
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2805:
-	b	.L2805
-.L2803:
+	b	.L3156
+.L3154:
 	mov	w0, 2
-	b	.L2889
-.L2798:
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
-	b	.L2868
-.L2769:
+	b	.L3245
+.L3149:
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	b	.L3222
+.L3120:
 	bl	gc_scan_src_blk
 	cmn	w0, #1
-	bne	.L2806
+	bne	.L3157
 	mov	w0, 3
-	b	.L2889
-.L2806:
-	adrp	x21, .LANCHOR63
-	mov	w1, 65535
-	add	x20, x21, :lo12:.LANCHOR63
-	ldrh	w0, [x21, #:lo12:.LANCHOR63]
-	cmp	w0, w1
-	beq	.L2778
-	ldrh	w1, [x20, 24]
-	cbz	w1, .L2807
+	b	.L3245
+.L3157:
+	adrp	x20, .LANCHOR63
+	mov	w2, 65535
+	add	x1, x20, :lo12:.LANCHOR63
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	cmp	w0, w2
+	beq	.L3129
+	ldrh	w2, [x1, 24]
+	cbz	w2, .L3158
 	mov	w0, 4
-	strh	wzr, [x20, 26]
-	strb	w0, [x19, #:lo12:.LANCHOR130]
-	b	.L2868
-.L2807:
+	strh	wzr, [x1, 26]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
+	b	.L3222
+.L3158:
 	mov	w1, 1
-	strb	w1, [x19, #:lo12:.LANCHOR130]
+	strb	w1, [x19, #:lo12:.LANCHOR135]
 	adrp	x19, .LANCHOR4
-	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2808
-	adrp	x1, .LANCHOR193
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x19, #:lo12:.LANCHOR4]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L3159
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2000
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2809:
-	b	.L2809
-.L2808:
+.L3159:
+	ldrh	w0, [x20, #:lo12:.LANCHOR63]
+	add	x21, x20, :lo12:.LANCHOR63
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L3156
 	bl	ftl_free_sblk
 	ldr	x0, [x19, #:lo12:.LANCHOR4]
-	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	ldrh	w1, [x20, #:lo12:.LANCHOR63]
 	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x20, 30]
+	ldrh	w0, [x21, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x20, 30]
 	cmp	w0, 8
-	bls	.L2804
-	strh	wzr, [x20, 30]
+	bhi	.L3161
+	strh	w0, [x21, 30]
+	b	.L3156
+.L3161:
+	strh	wzr, [x21, 30]
 	bl	ftl_flush
 	bl	pm_flush
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2804
-.L2770:
+	b	.L3156
+.L3121:
 	adrp	x22, .LANCHOR63
 	adrp	x23, .LANCHOR80
 	add	x21, x22, :lo12:.LANCHOR63
 	add	x23, x23, :lo12:.LANCHOR80
-.L2869:
+.L3223:
 	bl	gc_scan_src_blk_one_page
 	ldrh	w1, [x21, 2]
 	ldrh	w0, [x23]
 	cmp	w1, w0
-	bcs	.L2810
+	bcs	.L3162
 	cmp	w20, 7
-	bls	.L2869
-	b	.L2868
-.L2810:
+	bls	.L3223
+	b	.L3222
+.L3162:
 	ldrh	w3, [x21, 24]
-	adrp	x0, .LANCHOR29
-	cbz	w3, .L2811
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	adrp	x0, .LANCHOR7
+	cbz	w3, .L3163
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w1, 4
 	strh	wzr, [x21, 26]
-	strb	w1, [x19, #:lo12:.LANCHOR130]
+	strb	w1, [x19, #:lo12:.LANCHOR135]
 	adrp	x19, .LANCHOR4
-	tbz	x0, 8, .L2812
+	tbz	x0, 8, .L3164
 	ldrh	w1, [x21]
 	ldr	x2, [x19, #:lo12:.LANCHOR4]
 	ubfiz	x0, x1, 1, 16
 	ldrh	w2, [x2, x0]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
+	adrp	x0, .LC216
+	add	x0, x0, :lo12:.LC216
 	bl	printf
-.L2812:
+.L3164:
 	ldrh	w2, [x22, #:lo12:.LANCHOR63]
 	add	x0, x22, :lo12:.LANCHOR63
 	ldr	x1, [x19, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L2868
-	adrp	x1, .LANCHOR193
+	beq	.L3165
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2034
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2813:
-	b	.L2813
-.L2811:
+.L3165:
+	add	x0, x22, :lo12:.LANCHOR63
+	ldrh	w1, [x22, #:lo12:.LANCHOR63]
+	ldrh	w2, [x0, 24]
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	strh	w2, [x0, x1, lsl 1]
+	b	.L3222
+.L3163:
 	adrp	x2, .LANCHOR3
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	ldrh	w1, [x21]
 	ldr	x20, [x2, #:lo12:.LANCHOR3]
 	mov	w2, 1
-	strb	w2, [x19, #:lo12:.LANCHOR130]
+	strb	w2, [x19, #:lo12:.LANCHOR135]
 	add	x20, x20, x1, uxth 2
-	tbz	x0, 8, .L2814
+	tbz	x0, 8, .L3166
 	ldrb	w2, [x20, 2]
-	adrp	x0, .LC156
-	add	x0, x0, :lo12:.LC156
+	adrp	x0, .LC217
+	add	x0, x0, :lo12:.LC217
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L2814:
+.L3166:
 	ldrb	w0, [x20, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L2815
+	beq	.L3167
 	tst	w0, 192
-	bne	.L2816
-.L2815:
-	adrp	x1, .LANCHOR193
+	bne	.L3168
+.L3167:
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2044
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2817:
-	b	.L2817
-.L2816:
+.L3168:
 	ldrh	w0, [x22, #:lo12:.LANCHOR63]
 	add	x19, x22, :lo12:.LANCHOR63
 	bl	ftl_free_sblk
@@ -18663,108 +20247,109 @@ zftl_do_gc:
 	ldrh	w0, [x19, 30]
 	add	w0, w0, 1
 	and	w0, w0, 65535
-	strh	w0, [x19, 30]
 	cmp	w0, 8
-	bls	.L2868
+	bhi	.L3169
+	strh	w0, [x19, 30]
+	b	.L3222
+.L3169:
 	strh	wzr, [x19, 30]
-.L2890:
+.L3246:
 	bl	flt_sys_flush
-	b	.L2868
-.L2771:
-	ldrh	w1, [x22, 80]
+	b	.L3222
+.L3122:
+	ldrh	w1, [x23, 80]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L2818
+	bne	.L3170
 	adrp	x0, .LANCHOR70
 	ldrb	w0, [x0, #:lo12:.LANCHOR70]
 	cmp	w0, 1
-	bne	.L2818
+	bne	.L3170
 	bl	ftl_flush
 	ldrh	w0, [x25, #:lo12:.LANCHOR93]
-	cbz	w0, .L2819
-.L2888:
-	mov	w1, 5
+	cbz	w0, .L3171
+.L3244:
 	lsr	w0, w0, 1
+	mov	w1, 5
 	bl	zftl_get_free_sblk
-	and	w20, w0, 65535
-	mov	w1, 65535
-	cmp	w20, w1
-	beq	.L2821
-	adrp	x1, .LANCHOR3
-	ldr	x2, [x1, #:lo12:.LANCHOR3]
-	add	x2, x2, x20, uxth 2
-	ldrb	w1, [x2, 2]
-	tst	w1, 224
-	beq	.L2822
-	adrp	x1, .LANCHOR193
+	and	w21, w0, 65535
+	mov	w19, w21
+	mov	w0, 65535
+	cmp	w21, w0
+	beq	.L3173
+	adrp	x0, .LANCHOR3
+	ldr	x20, [x0, #:lo12:.LANCHOR3]
+	add	x20, x20, x21, uxth 2
+	ldrb	w0, [x20, 2]
+	tst	w0, 224
+	beq	.L3174
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2069
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2823:
-	b	.L2823
-.L2819:
-	adrp	x0, .LANCHOR91
-	ldrh	w0, [x0, #:lo12:.LANCHOR91]
-	b	.L2888
-.L2822:
-	mov	w21, 5
-	bfi	w1, w21, 5, 3
-	orr	w1, w1, 16
-	strb	w1, [x2, 2]
+.L3174:
+	ldrb	w0, [x20, 2]
+	mov	w1, 5
+	bfi	w0, w1, 5, 3
+	orr	w0, w0, 16
+	strb	w0, [x20, 2]
+.L3193:
 	mov	w1, 1
+	mov	w0, w19
 	bl	ftl_erase_sblk
-	strb	w21, [x22, 84]
-	add	x1, x22, 96
-	mov	w0, w20
+	adrp	x22, .LANCHOR71
+	mov	w0, 5
+	strb	w0, [x23, 84]
+	add	x1, x23, 96
+	mov	w0, w19
 	bl	ftl_get_blk_list_in_sblk
 	and	w0, w0, 255
 	adrp	x1, .LANCHOR80
-	strb	w0, [x22, 89]
-	adrp	x21, .LANCHOR72
-	strh	w20, [x22, 80]
+	adrp	x20, .LANCHOR72
+	strb	w0, [x23, 89]
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
-	strh	wzr, [x22, 82]
-	strb	wzr, [x22, 85]
-	strh	wzr, [x22, 90]
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	strh	w19, [x23, 80]
+	strh	wzr, [x23, 82]
 	mul	w0, w0, w1
+	strb	wzr, [x23, 85]
+	strh	w0, [x23, 86]
 	mov	w1, 255
-	strh	w0, [x22, 86]
-	adrp	x22, .LANCHOR71
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	strh	wzr, [x23, 90]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR131
-	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR136
+	ldr	x0, [x0, #:lo12:.LANCHOR136]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR132
-	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR137
+	ldr	x0, [x0, #:lo12:.LANCHOR137]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
 	mov	w1, 255
 	ldrh	w2, [x22, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
 	adrp	x0, .LANCHOR68
 	ldr	x0, [x0, #:lo12:.LANCHOR68]
 	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
 	mov	w1, -1
-	str	w20, [x0, 132]
+	str	w21, [x0, 132]
 	strh	w1, [x0, 128]
 	strh	w1, [x0, 130]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR53
+	adrp	x0, .LANCHOR101
 	mov	w1, -1
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
-	strh	w20, [x0, 126]
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
+	strh	w19, [x0, 126]
 	adrp	x0, .LANCHOR63
 	add	x0, x0, :lo12:.LANCHOR63
 	str	w1, [x0, 320]
@@ -18774,122 +20359,171 @@ zftl_do_gc:
 	strh	wzr, [x0, 318]
 	mov	w0, 0
 	bl	ftl_info_flush
-	b	.L2868
-.L2818:
-	cmp	w24, 1
-	mov	w21, 4
-	csinc	w21, w21, wzr, eq
+	b	.L3222
+.L3171:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	b	.L3244
+.L3170:
+	cmp	w22, 1
+	mov	w22, 4
+	csinc	w22, w22, wzr, eq
 	cmp	w20, 15
-	mov	w0, w21
-	add	w21, w21, 4
+	mov	w0, w22
+	add	w22, w22, 4
 	adrp	x25, .LANCHOR70
-	adrp	x24, .LANCHOR63
-	csel	w21, w21, w0, ls
+	adrp	x21, .LANCHOR63
+	csel	w22, w22, w0, ls
 	add	x25, x25, :lo12:.LANCHOR70
-	add	x20, x24, :lo12:.LANCHOR63
-	add	x26, x22, 80
-.L2827:
-	sub	w21, w21, #1
-	and	w21, w21, 255
-	cmp	w21, 255
-	beq	.L2868
+	add	x20, x21, :lo12:.LANCHOR63
+	add	x26, x23, 80
+.L3177:
+	sub	w22, w22, #1
+	and	w22, w22, 255
+	cmp	w22, 255
+	beq	.L3222
 	bl	gc_do_copy_back
 	ldrb	w0, [x25]
-	cbnz	w0, .L2828
-	adrp	x0, .LANCHOR45
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cbnz	w0, .L3178
+	adrp	x0, .LANCHOR48
+	ldrb	w0, [x0, #:lo12:.LANCHOR48]
 	cmp	w0, 3
-	bhi	.L2829
+	bhi	.L3179
 	bl	ftl_write_commit
-.L2829:
+.L3179:
 	ldrh	w1, [x20, 26]
 	ldrh	w0, [x20, 24]
 	cmp	w1, w0
-	bcc	.L2827
+	bcc	.L3177
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR130]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
 	bl	ftl_write_commit
 	bl	ftl_flush
-	ldrh	w0, [x20]
-	adrp	x2, .LANCHOR4
-	ldr	x2, [x2, #:lo12:.LANCHOR4]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2831
-	adrp	x1, .LANCHOR193
+	adrp	x0, .LANCHOR4
+	ldrh	w2, [x20]
+	mov	x20, x0
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldrh	w1, [x1, x2, lsl 1]
+	cbz	w1, .L3181
+	adrp	x1, .LANCHOR208
 	adrp	x0, .LC0
 	mov	w2, 2144
-	add	x1, x1, :lo12:.LANCHOR193
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2832:
-	b	.L2832
-.L2831:
+.L3181:
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	add	x19, x21, :lo12:.LANCHOR63
+	ldr	x2, [x20, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	cbnz	w2, .L3182
+	mov	w0, w1
 	bl	ftl_free_sblk
-.L2891:
-	mov	w0, -1
-	strh	w0, [x20]
-	b	.L2868
-.L2828:
+	b	.L3156
+.L3182:
+	ldrh	w3, [x19, 24]
+	adrp	x22, .LANCHOR64
+	adrp	x0, .LC218
+	add	x0, x0, :lo12:.LC218
+	bl	printf
+	ldr	x1, [x22, #:lo12:.LANCHOR64]
+	mov	w2, 4
+	ldrh	w3, [x19, 24]
+	adrp	x0, .LC219
+	add	x0, x0, :lo12:.LC219
+	add	w3, w3, 1
+	bl	rknand_print_hex
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	ldr	x2, [x20, #:lo12:.LANCHOR4]
+	ldrh	w5, [x19, 28]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w4, [x19, 26]
+	ldrh	w3, [x19, 24]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC220
+	add	x0, x0, :lo12:.LC220
+	bl	printf
+	ldrh	w0, [x21, #:lo12:.LANCHOR63]
+	mov	x1, 0
+	bl	ftl_sblk_dump
+	bl	gc_scan_src_blk
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	ldr	x2, [x20, #:lo12:.LANCHOR4]
+	ldrh	w3, [x19, 24]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC221
+	add	x0, x0, :lo12:.LC221
+	bl	printf
+	ldrh	w3, [x19, 24]
+	mov	w2, 4
+	ldr	x1, [x22, #:lo12:.LANCHOR64]
+	adrp	x0, .LC222
+	add	x0, x0, :lo12:.LC222
+	bl	rknand_print_hex
+	b	.L3156
+.L3178:
 	ldrh	w0, [x20, 318]
-	cbz	w0, .L2833
+	cbz	w0, .L3183
 	ldr	w0, [x20, 320]
 	strh	wzr, [x20, 318]
 	cmn	w0, #1
-	beq	.L2834
+	beq	.L3184
 	bl	ftl_mask_bad_block
-.L2834:
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	add	x20, x24, :lo12:.LANCHOR63
+.L3184:
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	add	x20, x21, :lo12:.LANCHOR63
 	strh	wzr, [x20, 56]
 	ldrh	w0, [x0, 80]
 	str	wzr, [x20, 320]
 	bl	ftl_free_sblk
-	adrp	x2, .LANCHOR53
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR101
+	ldr	x1, [x24, #:lo12:.LANCHOR5]
 	mov	w0, -1
-	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldr	x2, [x2, #:lo12:.LANCHOR101]
 	strh	w0, [x1, 80]
 	strh	w0, [x2, 126]
 	strh	w0, [x1, 130]
 	ldr	x0, [x20, 8]
-	cbz	x0, .L2835
+	cbz	x0, .L3185
 	bl	buf_free
-.L2835:
-	add	x24, x24, :lo12:.LANCHOR63
-	str	xzr, [x24, 8]
+.L3185:
+	add	x21, x21, :lo12:.LANCHOR63
+	str	xzr, [x21, 8]
 	bl	flt_sys_flush
-	adrp	x1, .LANCHOR193
-	adrp	x0, .LC0
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
 	mov	w2, 2177
-	add	x1, x1, :lo12:.LANCHOR193
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2836:
-	b	.L2836
-.L2833:
+	b	.L3222
+.L3183:
 	ldrh	w0, [x26, 6]
 	ldrh	w1, [x20, 26]
 	cmp	w0, 1
 	ldrh	w0, [x20, 24]
-	bls	.L2837
+	bls	.L3186
 	cmp	w1, w0
-	bcc	.L2827
+	bcc	.L3177
 	mov	w0, 1
-	strb	w0, [x19, #:lo12:.LANCHOR130]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
 	add	x0, x20, x0, sxtw 1
 	ldrh	w1, [x20]
 	strh	w1, [x0, 58]
-	b	.L2891
-.L2837:
+	mov	w0, -1
+	strh	w0, [x20]
+	b	.L3222
+.L3186:
 	mov	w2, 5
-	strb	w2, [x19, #:lo12:.LANCHOR130]
+	strb	w2, [x19, #:lo12:.LANCHOR135]
 	cmp	w1, w0
-	bcc	.L2838
+	bcc	.L3187
 	ldrh	w0, [x20, 56]
 	add	w1, w0, 1
 	strh	w1, [x20, 56]
@@ -18898,16 +20532,16 @@ zftl_do_gc:
 	strh	w1, [x0, 58]
 	mov	w0, -1
 	strh	w0, [x20]
-.L2838:
+.L3187:
 	bl	ftl_flush
 	bl	sblk_wait_write_queue_completed
 	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	ldrh	w1, [x22, 80]
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, 80]
 	strh	w1, [x0, 128]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	add	x0, x24, :lo12:.LANCHOR63
+	add	x0, x21, :lo12:.LANCHOR63
 	adrp	x1, .LANCHOR80
 	adrp	x2, .LANCHOR67
 	ldrh	w1, [x1, #:lo12:.LANCHOR80]
@@ -18916,61 +20550,60 @@ zftl_do_gc:
 	strh	w1, [x0, 18]
 	cmp	w2, 2
 	strh	w2, [x0, 20]
-	bne	.L2839
+	bne	.L3188
 	ubfiz	w1, w1, 1, 15
 	strh	w1, [x0, 18]
 	mov	w1, 1
 	strh	w1, [x0, 20]
-.L2839:
-	add	x24, x24, :lo12:.LANCHOR63
-	strh	wzr, [x24, 22]
-	b	.L2868
-.L2841:
+.L3188:
+	add	x21, x21, :lo12:.LANCHOR63
+	strh	wzr, [x21, 22]
+	b	.L3222
+.L3190:
 	ldrh	w1, [x25, 16]
 	ldrh	w0, [x25, 18]
 	cmp	w1, w0
-	bcc	.L2842
+	bcc	.L3191
 	mov	w0, 6
-	strb	w0, [x19, #:lo12:.LANCHOR130]
+	strb	w0, [x19, #:lo12:.LANCHOR135]
 	ldr	x0, [x25, 8]
 	bl	buf_free
 	str	xzr, [x25, 8]
-	b	.L2868
-.L2842:
+	b	.L3222
+.L3191:
 	cmp	w20, 7
-	bls	.L2774
-	cmp	w24, 1
-	bne	.L2868
-	add	w22, w22, 1
-	and	w22, w22, 255
-	cmp	w22, 4
-	bls	.L2774
-	b	.L2868
-.L2773:
+	bls	.L3125
+	cmp	w22, 1
+	bne	.L3222
+	add	w23, w23, 1
+	and	w23, w23, 255
+	cmp	w23, 4
+	bls	.L3125
+	b	.L3222
+.L3124:
 	bl	gc_update_l2p_map_new
 	mov	w20, -1
 	bl	gc_free_src_blk
 	bl	ftl_flush
 	bl	pm_flush
-	strh	w20, [x22, 80]
+	strh	w20, [x23, 80]
 	bl	ftl_ext_info_flush
-	adrp	x0, .LANCHOR53
-	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR101
+	ldr	x0, [x0, #:lo12:.LANCHOR101]
 	strh	w20, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	strb	wzr, [x19, #:lo12:.LANCHOR135]
 	bl	print_ftl_debug_info
-	b	.L2868
-.L2821:
-	adrp	x1, .LANCHOR193
-	adrp	x0, .LC0
+	b	.L3222
+.L3173:
 	mov	w2, 2075
-	add	x1, x1, :lo12:.LANCHOR193
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC0
+	add	x1, x1, :lo12:.LANCHOR208
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2824:
-	b	.L2824
+	b	.L3193
 	.size	zftl_do_gc, .-zftl_do_gc
 	.section	.text.zftl_write,"ax",@progbits
 	.align	2
@@ -18981,38 +20614,38 @@ zftl_write:
 	add	x29, sp, 0
 	stp	x27, x28, [sp, 80]
 	mov	w27, w0
-	adrp	x0, .LANCHOR29
+	adrp	x0, .LANCHOR7
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
 	mov	w19, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldr	w0, [x0, #:lo12:.LANCHOR7]
 	mov	w20, w2
 	stp	x21, x22, [sp, 32]
 	mov	x24, x3
 	stp	x25, x26, [sp, 64]
-	tbz	x0, 12, .L2895
+	tbz	x0, 12, .L3250
 	mov	w3, w2
-	adrp	x0, .LC157
+	adrp	x0, .LC223
 	mov	w2, w1
-	add	x0, x0, :lo12:.LC157
+	add	x0, x0, :lo12:.LC223
 	mov	w1, w27
 	bl	printf
-.L2895:
-	cbnz	w27, .L2896
+.L3250:
+	cbnz	w27, .L3251
 	adrp	x0, .LANCHOR59
 	mov	w27, 24576
 	ldr	w0, [x0, #:lo12:.LANCHOR59]
-.L2897:
+.L3252:
 	add	w1, w19, w20
 	cmp	w0, w1
-	bcc	.L2911
-	adrp	x23, .LANCHOR52
+	bcc	.L3266
+	adrp	x23, .LANCHOR114
 	add	w27, w27, w19
 	sub	w19, w20, #1
-	adrp	x25, .LANCHOR53
-	ldrb	w0, [x23, #:lo12:.LANCHOR52]
+	adrp	x25, .LANCHOR101
+	ldrb	w0, [x23, #:lo12:.LANCHOR114]
 	add	w19, w19, w27
-	add	x23, x23, :lo12:.LANCHOR52
+	add	x23, x23, :lo12:.LANCHOR114
 	udiv	w22, w27, w0
 	udiv	w19, w19, w0
 	add	w0, w27, w20
@@ -19020,8 +20653,8 @@ zftl_write:
 	mov	w26, w22
 	sub	w21, w19, w22
 	add	w21, w21, 1
-.L2899:
-	cbnz	w21, .L2907
+.L3254:
+	cbnz	w21, .L3262
 	adrp	x20, .LANCHOR89
 	adrp	x19, .LANCHOR93
 	add	x20, x20, :lo12:.LANCHOR89
@@ -19030,14 +20663,14 @@ zftl_write:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-.L2908:
+.L3263:
 	ldrh	w0, [x20]
 	ldrh	w1, [x19]
 	add	w0, w0, w1
 	cmp	w0, 7
-	ble	.L2909
+	ble	.L3264
 	mov	w0, 0
-.L2894:
+.L3249:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -19045,28 +20678,28 @@ zftl_write:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 112
 	ret
-.L2896:
+.L3251:
 	cmp	w27, 3
-	bhi	.L2911
+	bhi	.L3266
 	lsl	w27, w27, 13
 	mov	w0, 8192
-	b	.L2897
-.L2907:
+	b	.L3252
+.L3262:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbnz	x0, .L2900
+	cbnz	x0, .L3255
 	bl	ftl_write_commit
-	b	.L2899
-.L2900:
+	b	.L3254
+.L3255:
 	ldrb	w3, [x23]
 	cmp	w26, w22
 	strb	wzr, [x0, 57]
 	ccmp	w26, w19, 4, ne
 	strb	w3, [x0, 56]
-	bne	.L2903
+	bne	.L3258
 	cmp	w26, w22
-	bne	.L2904
+	bne	.L3259
 	udiv	w0, w27, w3
 	msub	w0, w0, w3, w27
 	and	w0, w0, 255
@@ -19075,9 +20708,9 @@ zftl_write:
 	and	w3, w3, 255
 	cmp	w20, w3
 	csel	w3, w20, w3, cc
-.L2916:
+.L3271:
 	strb	w3, [x28, 56]
-.L2903:
+.L3258:
 	ldr	x3, [x28, 8]
 	mov	x1, x24
 	ldrb	w0, [x28, 57]
@@ -19087,7 +20720,7 @@ zftl_write:
 	lsl	w2, w2, 9
 	add	x0, x3, x0
 	bl	ftl_memcpy
-	ldr	x1, [x25, #:lo12:.LANCHOR53]
+	ldr	x1, [x25, #:lo12:.LANCHOR101]
 	ldr	w0, [x1, 8]
 	str	w26, [x28, 36]
 	add	w26, w26, 1
@@ -19099,19 +20732,19 @@ zftl_write:
 	ldrb	w0, [x28, 56]
 	ubfiz	x0, x0, 9, 8
 	add	x24, x24, x0
-	b	.L2899
-.L2904:
+	b	.L3254
+.L3259:
 	ldr	w0, [x29, 108]
 	msub	w3, w3, w26, w0
-	b	.L2916
-.L2909:
+	b	.L3271
+.L3264:
 	mov	w1, 1
 	mov	w0, 0
 	bl	zftl_do_gc
-	b	.L2908
-.L2911:
+	b	.L3263
+.L3266:
 	mov	w0, -1
-	b	.L2894
+	b	.L3249
 	.size	zftl_write, .-zftl_write
 	.section	.text.zftl_vendor_write,"ax",@progbits
 	.align	2
@@ -19162,237 +20795,31 @@ FlashBootVendorWrite:
 	.global	ftl_write
 	.type	ftl_write, %function
 ftl_write:
-	and	w0, w0, 255
-	b	zftl_write
-	.size	ftl_write, .-ftl_write
-	.section	.text.zftl_discard,"ax",@progbits
-	.align	2
-	.global	zftl_discard
-	.type	zftl_discard, %function
-zftl_discard:
-	stp	x29, x30, [sp, -128]!
-	adrp	x2, .LANCHOR59
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	ldr	w2, [x2, #:lo12:.LANCHOR59]
-	add	w1, w0, w1
+	mov	w19, w2
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	cmp	w2, w1
-	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	bcc	.L2942
-	adrp	x25, .LANCHOR52
-	adrp	x23, .LANCHOR194
-	add	w24, w0, 24576
-	adrp	x22, .LANCHOR53
-	ldrb	w21, [x25, #:lo12:.LANCHOR52]
-	ldr	w0, [x23, #:lo12:.LANCHOR194]
-	add	w0, w0, w19
-	str	w0, [x23, #:lo12:.LANCHOR194]
-	udiv	w20, w24, w21
-	ldr	x0, [x22, #:lo12:.LANCHOR53]
-	msub	w27, w20, w21, w24
-	ldr	w26, [x0, 8]
-	add	w1, w26, 1
-	str	w1, [x0, 8]
-	cbz	w27, .L2924
-	sub	w21, w21, w27
-	mov	w0, w20
-	cmp	w21, w19
-	csel	w21, w21, w19, ls
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L2925
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L2925:
-	ldr	w0, [x29, 120]
-	and	w28, w21, 65535
-	cmn	w0, #1
-	beq	.L2927
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x3, x0
-	cbz	x0, .L2927
-	strb	w27, [x0, 57]
-	ubfiz	x27, x27, 9, 25
-	strb	w21, [x0, 56]
-	mov	w1, 0
-	ldr	x0, [x0, 8]
-	lsl	w2, w28, 9
-	stp	w26, w20, [x3, 32]
-	str	x3, [x29, 104]
-	add	x0, x0, x27
-	bl	ftl_memset
-	ldr	x3, [x29, 104]
-	mov	x0, x3
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2927:
-	add	w20, w20, 1
-	sub	w19, w19, w28
-.L2924:
-	cbz	w19, .L2929
-	bl	ftl_flush
-.L2929:
-	adrp	x27, .LANCHOR96
-	add	x21, x25, :lo12:.LANCHOR52
-	add	x27, x27, :lo12:.LANCHOR96
-	mov	w0, -1
-	str	w0, [x29, 124]
-.L2930:
-	ldrb	w0, [x21]
-	cmp	w19, w0
-	bcs	.L2935
-	cbz	w19, .L2937
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	bne	.L2938
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-.L2938:
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L2937
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x21, x0
-	cbz	x0, .L2937
-	strb	wzr, [x0, 57]
-	strb	w19, [x0, 56]
-	stp	w26, w20, [x21, 32]
-	ldrb	w0, [x25, #:lo12:.LANCHOR52]
-	cmp	w19, w0
-	bcc	.L2940
-	adrp	x1, .LANCHOR195
-	adrp	x0, .LC0
-	mov	w2, 1117
-	add	x1, x1, :lo12:.LANCHOR195
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2941:
-	b	.L2941
-.L2935:
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L2931
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbz	x0, .L2933
-	ldrb	w2, [x21]
-	mov	w1, 0
-	strb	w2, [x0, 56]
-	strb	wzr, [x0, 57]
-	ldr	x0, [x0, 8]
-	lsl	w2, w2, 9
-	stp	w26, w20, [x28, 32]
-	bl	ftl_memset
-	mov	x0, x28
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-.L2963:
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2933:
-	ldrb	w0, [x21]
-	add	w20, w20, 1
-	sub	w19, w19, w0
-	b	.L2930
-.L2931:
-	mov	w2, 0
-	add	x1, x29, 120
-	mov	w0, w20
-	bl	pm_log2phys
-	ldr	w0, [x29, 120]
-	cmn	w0, #1
-	beq	.L2933
-	add	x1, x29, 124
-	mov	w2, 1
-	mov	w0, w20
-	bl	pm_log2phys
-	ldrh	w3, [x27]
-	mov	w1, 21
-	ldr	w0, [x29, 120]
-	sub	w2, w1, w3
-	mov	w1, 1
-	lsr	w0, w0, w3
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR95
-	ldrb	w0, [x0, #:lo12:.LANCHOR95]
-	udiv	w0, w1, w0
-	bl	ftl_vpn_decrement
-	b	.L2963
-.L2940:
-	ldr	x0, [x21, 8]
-	lsl	w2, w19, 9
-	mov	w1, 0
-	bl	ftl_memset
-	mov	x0, x21
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR53]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2937:
-	ldr	w1, [x23, #:lo12:.LANCHOR194]
-	cmp	w1, 8192
-	bls	.L2943
-	mov	w3, w19
-	mov	w2, w24
-	mov	w4, 0
-	adrp	x0, .LC158
-	add	x0, x0, :lo12:.LC158
-	bl	printf
-	str	wzr, [x23, #:lo12:.LANCHOR194]
-	bl	flt_sys_flush
-	adrp	x0, .LANCHOR196
-	mov	w1, 1
-	str	w1, [x0, #:lo12:.LANCHOR196]
-.L2943:
+	mov	x20, x3
+	mov	w22, w1
+	ands	w21, w0, 255
+	bne	.L3277
+	mov	w3, w2
 	mov	w0, 0
-	b	.L2922
-.L2942:
-	mov	w0, -1
-.L2922:
+	mov	x2, x20
+	bl	idb_write_data
+.L3277:
+	mov	x3, x20
+	mov	w2, w19
+	mov	w1, w22
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-	.size	zftl_discard, .-zftl_discard
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	mov	w0, w1
-	mov	w1, w2
-	b	zftl_discard
-	.size	ftl_discard, .-ftl_discard
+	ldp	x29, x30, [sp], 48
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
 	.global	g_pm_spare
+	.global	pm_first_write
 	.global	pm_gc_enable
 	.global	pm_last_load_ram_id
 	.global	pm_last_update_ram_id
@@ -19414,6 +20841,8 @@ ftl_discard:
 	.global	gp_free_xlc_head
 	.global	gp_free_slc_head
 	.global	gp_sblk_list_tbl
+	.global	ftl_ext_info_first_write
+	.global	ftl_sys_info_first_write
 	.global	ftl_low_format_cur_blk
 	.global	ftl_power_lost_flag
 	.global	ftl_vpn_update_count
@@ -19496,6 +20925,7 @@ ftl_discard:
 	.global	nandc_hw_seed
 	.global	fill_spare_size
 	.global	g_nandc_ecc_bits
+	.global	g_nandc_tran_timeout
 	.global	g_nandc_ver
 	.global	gp_nandc
 	.global	hy_f26_ref_value
@@ -19537,7 +20967,7 @@ ftl_discard:
 	.global	g_flash_page_buffer
 	.section	.bss.IDByte,"aw",@nobits
 	.align	2
-	.set	.LANCHOR33,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	IDByte, %object
 	.size	IDByte, 32
 IDByte:
@@ -19565,7 +20995,7 @@ _c_ftl_block_align_addr:
 	.zero	2
 	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
 	.align	1
-	.set	.LANCHOR173,. + 0
+	.set	.LANCHOR185,. + 0
 	.type	_c_ftl_byte_pre_page, %object
 	.size	_c_ftl_byte_pre_page, 2
 _c_ftl_byte_pre_page:
@@ -19616,55 +21046,55 @@ _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR172,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
 	.zero	2
 	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR180,. + 0
+	.set	.LANCHOR192,. + 0
 	.type	_c_mix_max_slc_ec_count, %object
 	.size	_c_mix_max_slc_ec_count, 2
 _c_mix_max_slc_ec_count:
 	.zero	2
 	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR181,. + 0
+	.set	.LANCHOR193,. + 0
 	.type	_c_mix_max_xlc_ec_count, %object
 	.size	_c_mix_max_xlc_ec_count, 2
 _c_mix_max_xlc_ec_count:
 	.zero	2
 	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR126,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	_c_swl_slc_gc_th, %object
 	.size	_c_swl_slc_gc_th, 2
 _c_swl_slc_gc_th:
 	.zero	2
 	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR125,. + 0
+	.set	.LANCHOR129,. + 0
 	.type	_c_swl_xlc_gc_th, %object
 	.size	_c_swl_xlc_gc_th, 2
 _c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR178,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
@@ -19678,7 +21108,7 @@ _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR177,. + 0
+	.set	.LANCHOR189,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
@@ -19692,7 +21122,7 @@ _c_user_data_density:
 	.zero	4
 	.section	.bss._gc_after_discard_en,"aw",@nobits
 	.align	2
-	.set	.LANCHOR196,. + 0
+	.set	.LANCHOR207,. + 0
 	.type	_gc_after_discard_en, %object
 	.size	_gc_after_discard_en, 4
 _gc_after_discard_en:
@@ -19711,7 +21141,7 @@ _last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR179,. + 0
+	.set	.LANCHOR191,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
@@ -19738,27 +21168,27 @@ check_vpc_tbl:
 	.zero	4608
 	.section	.bss.discard_sector_count,"aw",@nobits
 	.align	2
-	.set	.LANCHOR194,. + 0
+	.set	.LANCHOR205,. + 0
 	.type	discard_sector_count, %object
 	.size	discard_sector_count, 4
 discard_sector_count:
 	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR139,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR48,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
@@ -19790,9 +21220,15 @@ free_xlc_sblk:
 	.size	ftl_ext_info_data_buffer, 16384
 ftl_ext_info_data_buffer:
 	.zero	16384
+	.section	.bss.ftl_ext_info_first_write,"aw",@nobits
+	.set	.LANCHOR168,. + 0
+	.type	ftl_ext_info_first_write, %object
+	.size	ftl_ext_info_first_write, 1
+ftl_ext_info_first_write:
+	.zero	1
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR190,. + 0
+	.set	.LANCHOR202,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -19805,7 +21241,7 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR154,. + 0
+	.set	.LANCHOR163,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
@@ -19818,14 +21254,14 @@ ftl_info_spare:
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR157,. + 0
+	.set	.LANCHOR167,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
@@ -19839,11 +21275,17 @@ ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR110,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
 	.zero	2
+	.section	.bss.ftl_sys_info_first_write,"aw",@nobits
+	.set	.LANCHOR166,. + 0
+	.type	ftl_sys_info_first_write, %object
+	.size	ftl_sys_info_first_write, 1
+ftl_sys_info_first_write:
+	.zero	1
 	.section	.bss.ftl_tmp_buffer,"aw",@nobits
 	.align	6
 	.type	ftl_tmp_buffer, %object
@@ -19852,42 +21294,42 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR152,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR26,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR46,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR122,. + 0
+	.set	.LANCHOR126,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR17,. + 0
+	.set	.LANCHOR24,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
@@ -19906,91 +21348,92 @@ g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.align	3
+	.set	.LANCHOR33,. + 0
 	.type	g_flash_cur_mode, %object
-	.size	g_flash_cur_mode, 1
+	.size	g_flash_cur_mode, 4
 g_flash_cur_mode:
-	.zero	1
+	.zero	4
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR182,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR150,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR18,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR140,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR135,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR136,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR155,. + 0
+	.set	.LANCHOR164,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
@@ -20003,90 +21446,96 @@ g_ftl_info_blk:
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR169,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR170,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR21,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR120,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
 	.section	.bss.g_nand_opt_para,"aw",@nobits
 	.align	3
-	.set	.LANCHOR129,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	g_nand_opt_para, %object
 	.size	g_nand_opt_para, 32
 g_nand_opt_para:
 	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR34,. + 0
+	.set	.LANCHOR40,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
+	.zero	1
+	.section	.bss.g_nandc_tran_timeout,"aw",@nobits
+	.set	.LANCHOR141,. + 0
+	.type	g_nandc_tran_timeout, %object
+	.size	g_nandc_tran_timeout, 1
+g_nandc_tran_timeout:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR176,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR9,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR19,. + 0
+	.set	.LANCHOR25,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -20098,21 +21547,21 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR125,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR138,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
@@ -20126,7 +21575,7 @@ gc_free_slc_sblk_th:
 	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
@@ -20146,7 +21595,7 @@ gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR132,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
@@ -20180,7 +21629,7 @@ gc_slc_mode_tlc_vpn_th:
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
@@ -20241,9 +21690,15 @@ gp_data_slc_data_head:
 	.size	gp_data_xlc_data_head, 8
 gp_data_xlc_data_head:
 	.zero	8
+	.section	.bss.gp_flash_check_buf,"aw",@nobits
+	.align	3
+	.type	gp_flash_check_buf, %object
+	.size	gp_flash_check_buf, 262144
+gp_flash_check_buf:
+	.zero	262144
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
@@ -20278,21 +21733,21 @@ gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR101,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
 	.zero	8
 	.section	.bss.gp_nand_para_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR41,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	gp_nand_para_info, %object
 	.size	gp_nand_para_info, 8
 gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
@@ -20304,34 +21759,47 @@ gp_nandc:
 	.size	gp_sblk_list_tbl, 8
 gp_sblk_list_tbl:
 	.zero	8
+	.section	.bss.idb_buf,"aw",@nobits
+	.align	3
+	.type	idb_buf, %object
+	.size	idb_buf, 262144
+idb_buf:
+	.zero	262144
+	.section	.bss.idb_need_write_back,"aw",@nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	idb_need_write_back, %object
+	.size	idb_need_write_back, 4
+idb_need_write_back:
+	.zero	4
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR107,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
 	.zero	8
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR41,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR44,. + 0
+	.set	.LANCHOR47,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
@@ -20343,28 +21811,34 @@ p_free_buf_head:
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
 	.zero	8
+	.section	.bss.pm_first_write,"aw",@nobits
+	.set	.LANCHOR177,. + 0
+	.type	pm_first_write, %object
+	.size	pm_first_write, 1
+pm_first_write:
+	.zero	1
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR175,. + 0
+	.set	.LANCHOR187,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
@@ -20383,7 +21857,7 @@ read_ahead_lpa:
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR114,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
@@ -20395,7 +21869,7 @@ sblk_queue_head:
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
@@ -20415,13 +21889,13 @@ slc_cache_sblk:
 slc_data_sblk:
 	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
@@ -20433,7 +21907,7 @@ write_buf_head:
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR160,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
@@ -20447,7 +21921,7 @@ xlc_data_sblk:
 	.zero	2
 	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR26,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_nand_para_info, %object
 	.size	g_nand_para_info, 32
 g_nand_para_info:
@@ -20481,7 +21955,7 @@ g_nand_para_info:
 	.byte	0
 	.section	.data.hy_f26_ref_value,"aw",@progbits
 	.align	3
-	.set	.LANCHOR134,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	hy_f26_ref_value, %object
 	.size	hy_f26_ref_value, 28
 hy_f26_ref_value:
@@ -20515,7 +21989,7 @@ hy_f26_ref_value:
 	.byte	-37
 	.section	.data.nand_opt_para,"aw",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
+	.set	.LANCHOR181,. + 0
 	.type	nand_opt_para, %object
 	.size	nand_opt_para, 128
 nand_opt_para:
@@ -20597,7 +22071,7 @@ nand_opt_para:
 	.zero	14
 	.section	.data.sd15_slc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR31,. + 0
 	.type	sd15_slc_rr, %object
 	.size	sd15_slc_rr, 25
 sd15_slc_rr:
@@ -20628,7 +22102,7 @@ sd15_slc_rr:
 	.byte	112
 	.section	.data.sd15_tlc_rr,"aw",@progbits
 	.align	3
-	.set	.LANCHOR24,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	sd15_tlc_rr, %object
 	.size	sd15_tlc_rr, 329
 sd15_tlc_rr:
@@ -20963,7 +22437,7 @@ sd15_tlc_rr:
 	.byte	0
 	.section	.data.tlc_prog_order,"aw",@progbits
 	.align	3
-	.set	.LANCHOR192,. + 0
+	.set	.LANCHOR204,. + 0
 	.type	tlc_prog_order, %object
 	.size	tlc_prog_order, 768
 tlc_prog_order:
@@ -21353,16 +22827,16 @@ tlc_prog_order:
 	.hword	1019
 	.section	.data.zftl_debug,"aw",@progbits
 	.align	2
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	zftl_debug, %object
 	.size	zftl_debug, 4
 zftl_debug:
 	.word	17476
 	.section	.data.zftl_nand_flash_para_tbl,"aw",@progbits
 	.align	3
-	.set	.LANCHOR166,. + 0
+	.set	.LANCHOR180,. + 0
 	.type	zftl_nand_flash_para_tbl, %object
-	.size	zftl_nand_flash_para_tbl, 800
+	.size	zftl_nand_flash_para_tbl, 960
 zftl_nand_flash_para_tbl:
 	.byte	6
 	.byte	-104
@@ -21645,6 +23119,34 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	0
 	.byte	6
+	.byte	-104
+	.byte	-34
+	.byte	-108
+	.byte	-109
+	.byte	118
+	.byte	87
+	.byte	1
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1058
+	.hword	17881
+	.byte	2
+	.byte	33
+	.byte	40
+	.byte	32
+	.byte	3
+	.byte	1
+	.byte	1
+	.byte	0
+	.hword	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.byte	6
 	.byte	69
 	.byte	58
 	.byte	-108
@@ -21714,7 +23216,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1058
-	.hword	1497
+	.hword	17881
 	.byte	2
 	.byte	66
 	.byte	40
@@ -21742,7 +23244,7 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.byte	2
 	.hword	1066
-	.hword	1497
+	.hword	17881
 	.byte	2
 	.byte	67
 	.byte	40
@@ -21756,6 +23258,34 @@ zftl_nand_flash_para_tbl:
 	.byte	-94
 	.byte	0
 	.byte	0
+	.byte	6
+	.byte	69
+	.byte	-41
+	.byte	-124
+	.byte	-109
+	.byte	114
+	.byte	87
+	.byte	8
+	.byte	1
+	.byte	32
+	.hword	256
+	.byte	2
+	.byte	1
+	.hword	1060
+	.hword	17857
+	.byte	2
+	.byte	66
+	.byte	40
+	.byte	32
+	.byte	2
+	.byte	1
+	.byte	1
+	.byte	0
+	.hword	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
 	.byte	5
 	.byte	44
 	.byte	100
@@ -21777,27 +23307,111 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.byte	1
 	.byte	0
-	.byte	4
+	.byte	4
+	.byte	0
+	.hword	512
+	.byte	2
+	.byte	-38
+	.byte	-33
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	100
+	.byte	100
+	.byte	86
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	24
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	700
+	.hword	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	512
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	68
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.hword	256
+	.byte	2
+	.byte	2
+	.hword	1064
+	.hword	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.hword	256
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	84
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.hword	512
+	.byte	2
+	.byte	2
+	.hword	1024
+	.hword	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
 	.byte	0
 	.hword	512
-	.byte	2
-	.byte	-38
-	.byte	-33
+	.byte	3
+	.byte	0
+	.byte	0
 	.byte	0
 	.byte	5
 	.byte	44
 	.byte	100
 	.byte	100
-	.byte	86
-	.byte	-91
+	.byte	84
+	.byte	-92
 	.byte	0
 	.byte	4
 	.byte	1
-	.byte	24
+	.byte	32
 	.hword	512
 	.byte	2
-	.byte	2
-	.hword	700
+	.byte	1
+	.hword	1024
 	.hword	479
 	.byte	4
 	.byte	18
@@ -21808,13 +23422,13 @@ zftl_nand_flash_para_tbl:
 	.byte	1
 	.byte	0
 	.hword	512
-	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	6
+	.byte	0
+	.byte	5
 	.byte	44
-	.byte	68
+	.byte	100
 	.byte	68
 	.byte	75
 	.byte	-87
@@ -21824,9 +23438,9 @@ zftl_nand_flash_para_tbl:
 	.byte	16
 	.hword	256
 	.byte	2
-	.byte	2
-	.hword	1064
-	.hword	479
+	.byte	4
+	.hword	1024
+	.hword	449
 	.byte	3
 	.byte	17
 	.byte	40
@@ -21844,8 +23458,8 @@ zftl_nand_flash_para_tbl:
 	.byte	44
 	.byte	-124
 	.byte	100
-	.byte	84
-	.byte	-87
+	.byte	60
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
@@ -21855,9 +23469,9 @@ zftl_nand_flash_para_tbl:
 	.byte	2
 	.hword	1024
 	.hword	479
-	.byte	4
-	.byte	18
-	.byte	60
+	.byte	3
+	.byte	17
+	.byte	40
 	.byte	32
 	.byte	1
 	.byte	0
@@ -21870,9 +23484,9 @@ zftl_nand_flash_para_tbl:
 	.byte	0
 	.byte	5
 	.byte	44
-	.byte	100
-	.byte	100
-	.byte	84
+	.byte	-124
+	.byte	68
+	.byte	52
 	.byte	-92
 	.byte	0
 	.byte	4
@@ -21880,28 +23494,28 @@ zftl_nand_flash_para_tbl:
 	.byte	32
 	.hword	512
 	.byte	2
-	.byte	1
-	.hword	1024
-	.hword	479
-	.byte	4
-	.byte	18
-	.byte	60
+	.byte	2
+	.hword	1096
+	.hword	9695
+	.byte	5
+	.byte	19
+	.byte	70
 	.byte	32
 	.byte	1
 	.byte	0
-	.byte	1
+	.byte	4
 	.byte	0
 	.hword	512
-	.byte	0
-	.byte	0
-	.byte	0
+	.byte	2
+	.byte	-38
+	.byte	-33
 	.byte	0
 	.byte	5
 	.byte	44
 	.byte	-124
 	.byte	68
-	.byte	52
-	.byte	-92
+	.byte	50
+	.byte	-86
 	.byte	0
 	.byte	4
 	.byte	1
@@ -21913,7 +23527,7 @@ zftl_nand_flash_para_tbl:
 	.hword	9695
 	.byte	5
 	.byte	19
-	.byte	70
+	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22060,712 +23674,864 @@ zftl_nand_flash_para_tbl:
 	.byte	3
 	.byte	0
 	.hword	256
+	.byte	2
+	.byte	-65
+	.byte	-66
 	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.section	.rodata.__func__.10029,"a",@progbits
+	.section	.rodata.__func__.10041,"a",@progbits
 	.align	3
 	.set	.LANCHOR1,. + 0
-	.type	__func__.10029, %object
-	.size	__func__.10029, 18
-__func__.10029:
+	.type	__func__.10041, %object
+	.size	__func__.10041, 18
+__func__.10041:
 	.string	"_list_remove_node"
-	.section	.rodata.__func__.10054,"a",@progbits
+	.section	.rodata.__func__.10066,"a",@progbits
 	.align	3
 	.set	.LANCHOR6,. + 0
-	.type	__func__.10054, %object
-	.size	__func__.10054, 23
-__func__.10054:
+	.type	__func__.10066, %object
+	.size	__func__.10066, 23
+__func__.10066:
 	.string	"_list_update_data_list"
-	.section	.rodata.__func__.10153,"a",@progbits
+	.section	.rodata.__func__.10165,"a",@progbits
 	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.10153, %object
-	.size	__func__.10153, 15
-__func__.10153:
+	.set	.LANCHOR165,. + 0
+	.type	__func__.10165, %object
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+	.type	__func__.9671, %object
+	.size	__func__.9671, 12
+__func__.9671:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9679,"a",@progbits
+	.section	.rodata.__func__.9689,"a",@progbits
 	.align	3
-	.set	.LANCHOR146,. + 0
-	.type	__func__.9679, %object
-	.size	__func__.9679, 21
-__func__.9679:
+	.set	.LANCHOR153,. + 0
+	.type	__func__.9689, %object
+	.size	__func__.9689, 21
+__func__.9689:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9713,"a",@progbits
+	.section	.rodata.__func__.9723,"a",@progbits
 	.align	3
-	.set	.LANCHOR182,. + 0
-	.type	__func__.9713, %object
-	.size	__func__.9713, 22
-__func__.9713:
+	.set	.LANCHOR194,. + 0
+	.type	__func__.9723, %object
+	.size	__func__.9723, 22
+__func__.9723:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9726,"a",@progbits
+	.section	.rodata.__func__.9736,"a",@progbits
 	.align	3
 	.set	.LANCHOR66,. + 0
-	.type	__func__.9726, %object
-	.size	__func__.9726, 19
-__func__.9726:
+	.type	__func__.9736, %object
+	.size	__func__.9736, 19
+__func__.9736:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9755,"a",@progbits
+	.section	.rodata.__func__.9765,"a",@progbits
 	.align	3
-	.set	.LANCHOR191,. + 0
-	.type	__func__.9755, %object
-	.size	__func__.9755, 16
-__func__.9755:
+	.set	.LANCHOR203,. + 0
+	.type	__func__.9765, %object
+	.size	__func__.9765, 16
+__func__.9765:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9777,"a",@progbits
+	.section	.rodata.__func__.9787,"a",@progbits
 	.align	3
 	.set	.LANCHOR97,. + 0
-	.type	__func__.9777, %object
-	.size	__func__.9777, 16
-__func__.9777:
+	.type	__func__.9787, %object
+	.size	__func__.9787, 16
+__func__.9787:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9822,"a",@progbits
+	.section	.rodata.__func__.9832,"a",@progbits
 	.align	3
-	.set	.LANCHOR187,. + 0
-	.type	__func__.9822, %object
-	.size	__func__.9822, 16
-__func__.9822:
+	.set	.LANCHOR199,. + 0
+	.type	__func__.9832, %object
+	.size	__func__.9832, 16
+__func__.9832:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9881,"a",@progbits
+	.section	.rodata.__func__.9891,"a",@progbits
 	.align	3
-	.set	.LANCHOR183,. + 0
-	.type	__func__.9881, %object
-	.size	__func__.9881, 20
-__func__.9881:
+	.set	.LANCHOR195,. + 0
+	.type	__func__.9891, %object
+	.size	__func__.9891, 20
+__func__.9891:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9942,"a",@progbits
+	.section	.rodata.__func__.9952,"a",@progbits
 	.align	3
-	.set	.LANCHOR193,. + 0
-	.type	__func__.9942, %object
-	.size	__func__.9942, 11
-__func__.9942:
+	.set	.LANCHOR208,. + 0
+	.type	__func__.9952, %object
+	.size	__func__.9952, 11
+__func__.9952:
 	.string	"zftl_do_gc"
 	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
 .LC0:
 	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC90:
+.LC137:
+	.string	"free_buf_count: %d\n"
+.LC138:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC91:
+.LC139:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC92:
+.LC140:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC93:
+.LC141:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC94:
+.LC142:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC95:
+.LC143:
 	.string	"lpa:"
-.LC96:
+.LC144:
 	.string	"vpn:"
-.LC97:
+.LC145:
 	.string	"sblk:"
-.LC98:
+.LC146:
 	.string	"lpa_hash:"
-.LC99:
+.LC147:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC29:
+.LC62:
 	.string	"dump_sblk_queue: %d\n"
-.LC30:
+.LC63:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC63:
+.LC106:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
-.LC57:
+.LC98:
 	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
-.LC58:
+.LC99:
 	.string	"sync para %d\n"
-.LC59:
+.LC100:
 	.string	"DDR mode Read error %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
-.LC5:
+.LC35:
 	.string	"erase done: %x\n"
 	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
-.LC3:
+.LC33:
 	.string	"flash_erase_block %x %x\n"
-.LC4:
+.LC34:
 	.string	"flash_erase_block block = %x status = %x\n"
 	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
-.LC1:
+.LC31:
 	.string	"flash_erase_duplane_block %x %x %x\n"
-.LC2:
+.LC32:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
+	.section	.rodata.flash_get_last_written_page.str1.1,"aMS",@progbits,1
+.LC103:
+	.string	"flash_get_last_written_page: %x %x %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC62:
+.LC104:
+	.string	"...%d @ %s %d %p\n"
+.LC105:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC86:
+.LC133:
 	.string	"finfo:"
-.LC87:
+.LC134:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC88:
+.LC135:
 	.string	"sys_info_flush error:%x\n"
+	.section	.rodata.flash_into_data_init.str1.1,"aMS",@progbits,1
+.LC73:
+	.string	"...%d @ %s\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC7:
+.LC40:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC66:
+.LC109:
 	.string	"flash_prog_page %x %x %x\n"
+.LC110:
+	.string	"flash_prog_page page_addr = %x status = %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC68:
+.LC115:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC69:
+.LC116:
 	.string	"spare"
-.LC70:
+.LC117:
 	.string	"data"
-.LC71:
+.LC118:
 	.string	"write error: %x\n"
 	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
-.LC6:
+.LC38:
 	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC51:
+.LC91:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC60:
+.LC101:
 	.string	"flash_read_page_en %x %x\n"
-.LC61:
+.LC102:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_set_interface_mode.str1.1,"aMS",@progbits,1
+.LC36:
+	.string	"nand sdr mode %x\n"
+.LC37:
+	.string	"nand ddr mode %x\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC28:
+.LC61:
 	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC74:
+.LC121:
 	.string	"%d %x @%d %x\n"
-.LC75:
+.LC122:
 	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC73:
+.LC120:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC76:
+.LC123:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC22:
+.LC54:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC78:
+.LC125:
 	.string	"saved_active_page  = %x\n"
-.LC79:
+.LC126:
 	.string	"saved_active_plane = %x\n"
-.LC80:
+.LC127:
 	.string	"sblk = %x\n"
-.LC81:
+.LC128:
 	.string	"phy_blk = %x %x\n"
-.LC82:
+.LC129:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC83:
+.LC130:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC84:
+.LC131:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
-.LC77:
+.LC124:
 	.string	"re low format %d\n"
 	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC109:
+.LC158:
 	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC110:
+.LC159:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC122:
+.LC182:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC123:
+.LC183:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC124:
+.LC184:
 	.string	"index= %x, lpa=%x\n"
-.LC125:
+.LC185:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC138:
+.LC198:
 	.string	"ftl_scan_all_data = %x\n"
-.LC139:
+.LC199:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC140:
+.LC200:
 	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
-.LC141:
+.LC201:
 	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
-.LC142:
+.LC202:
 	.string	"0pm:"
-.LC143:
+.LC203:
 	.string	"1pm:"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC89:
+.LC136:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC72:
+.LC119:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC144:
+.LC204:
 	.string	"ftl_update_l2p_map: %x %x %x\n"
-.LC145:
+.LC205:
 	.string	"ftl_update_l2p_map"
-.LC146:
+.LC206:
 	.string	"lpa_tbl:"
-.LC147:
+.LC207:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC20:
+.LC53:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC148:
+.LC208:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC21:
+.LC60:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC8:
+.LC41:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC65:
+.LC108:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
-.LC149:
+.LC209:
 	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
-.LC150:
+.LC210:
 	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
-.LC151:
+.LC211:
 	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
-.LC152:
+.LC212:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC18:
+.LC51:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC19:
+.LC52:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC11:
+.LC44:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC111:
+.LC160:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC112:
+.LC161:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC113:
+.LC162:
 	.string	"gc_recovery"
-.LC114:
+.LC163:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC136:
+.LC196:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC137:
+.LC197:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC13:
+.LC46:
 	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
-.LC14:
+.LC47:
 	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC34:
+.LC67:
 	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC35:
+.LC68:
 	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
-.LC36:
+.LC69:
 	.string	"swl add tlc gc = %d, %d, %d, %d, %d, %d\n"
-.LC37:
+.LC70:
 	.string	"swl add slc gc  = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC117:
+.LC177:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC118:
+.LC178:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC119:
+.LC179:
 	.string	"0lpa: %x %x %x\n"
-.LC120:
+.LC180:
 	.string	"lpa: %x %x %x\n"
-.LC121:
+.LC181:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC9:
+.LC42:
 	.string	"status: %x, ppa: %x\n"
-.LC10:
+.LC43:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC43:
+.LC81:
 	.string	"otp error! %d"
-.LC44:
+.LC82:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC56:
+.LC97:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
+	.section	.rodata.idb_write_data.str1.1,"aMS",@progbits,1
+.LC111:
+	.string	"1 write_idblock fix data %x %x %x\n"
+.LC112:
+	.string	"write_idblock check fail! %x\n"
+.LC113:
+	.string	"write_idblock fail! %x\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC101:
+.LC149:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC102:
+.LC150:
+	.string	"load_l2p_region no ppa = %x , %x, all setting 0xff....\n"
+.LC151:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC103:
+.LC152:
 	.string	"pm_ppa:"
-.LC104:
+.LC153:
 	.string	"data:"
-.LC105:
+.LC154:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC33:
+.LC66:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC52:
+.LC92:
+	.string	"micron %d row=%x,count %d,status=%d\n"
+.LC93:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.nand_flash_print_info.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"...%s enter...\n"
+.LC2:
+	.string	"No.0 FLASH ID: %x %x %x %x %x %x\n"
+.LC3:
+	.string	"DiePerChip: %x\n"
+.LC4:
+	.string	"SectPerPage: %x\n"
+.LC5:
+	.string	"PagePerBlk: %x\n"
+.LC6:
+	.string	"Cell: %x\n"
+.LC7:
+	.string	"PlanePerDie: %x\n"
+.LC8:
+	.string	"BlkPerPlane: %x\n"
+.LC9:
+	.string	"die gap: %x\n"
+.LC10:
+	.string	"lsbMode: %x\n"
+.LC11:
+	.string	"ReadRetryMode: %x\n"
+.LC12:
+	.string	"ecc: %x\n"
+.LC13:
+	.string	"idb ecc: %x\n"
+.LC14:
+	.string	"g_flash_slc_mode: %x\n"
+.LC15:
+	.string	"OptMode: %x\n"
+.LC16:
+	.string	"g_nand_max_die: %x\n"
+.LC17:
+	.string	"Cache read enable: %x\n"
+.LC18:
+	.string	"Cache random read enable: %x\n"
+.LC19:
+	.string	"Cache prog enable: %x\n"
+.LC20:
+	.string	"multi read enable: %x\n"
+.LC21:
+	.string	"multi prog enable: %x\n"
+.LC22:
+	.string	"interleave enable: %x\n"
+.LC23:
+	.string	"read retry enable: %x\n"
+.LC24:
+	.string	"randomizer enable: %x\n"
+.LC25:
+	.string	"SDR enable: %x\n"
+.LC26:
+	.string	"ONFI enable: %x\n"
+.LC27:
+	.string	"TOGGLE enable: %x\n"
+.LC28:
+	.string	"MultiPlaneProgCmd: %x %x\n"
+.LC29:
+	.string	"MultiPlaneReadCmd: %x %x\n"
+.LC30:
+	.string	"g_flash_toggle_mode_en: %x\n"
+	.section	.rodata.nandc_init.str1.1,"aMS",@progbits,1
+.LC74:
+	.string	"...%s enter... %p\n"
+.LC75:
+	.string	"0:%x %x %x %x %x\n"
+.LC76:
+	.string	"g_nandc_ver...%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC49:
+.LC88:
 	.string	"dqs data abort %x\n"
-.LC50:
+.LC89:
+	.string	"dqs data timeout %x\n"
+.LC90:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC45:
+.LC83:
+	.string	"flash_abort_clear = %d\n"
+.LC84:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC46:
+.LC85:
 	.string	"nandc:"
-.LC47:
+.LC86:
 	.string	"%d flReg.d32=%x %x\n"
-.LC48:
+.LC87:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC31:
+.LC64:
 	.string	"blk %x is bad block\n"
-.LC32:
+.LC65:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
+	.section	.rodata.pm_free_sblk.str1.1,"aMS",@progbits,1
+.LC72:
+	.string	"ftl_free_no_use_map_blk %x %x %x %d\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC106:
+.LC155:
 	.string	"pm_init posr %x %x %x\n"
-.LC107:
+.LC156:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC108:
+.LC157:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC100:
+.LC148:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC85:
+.LC132:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC23:
+.LC55:
 	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
-.LC24:
+.LC56:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC25:
+.LC57:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC26:
+.LC58:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
-.LC27:
+.LC59:
 	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC12:
+.LC45:
 	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
 	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
-.LC16:
+.LC49:
 	.string	"list count:%p %d\n"
-.LC17:
+.LC50:
 	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC64:
+.LC107:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR39,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -22898,23 +24664,26 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC116:
+.LC176:
 	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC39:
+.LC77:
 	.string	"%s 0x%x:"
-.LC40:
+.LC78:
 	.string	"%x "
-.LC41:
+.LC79:
 	.string	""
-.LC42:
+.LC80:
 	.string	"%s\n"
+	.section	.rodata.sandisk_prog_test_bad_block.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"bad block test:%x %x\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC67:
+.LC114:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -23015,7 +24784,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR29,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -23032,7 +24801,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR22,. + 0
+	.set	.LANCHOR28,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -23436,15 +25205,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC53:
+.LC94:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC54:
+.LC95:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC55:
+.LC96:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR16,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -23495,7 +25264,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -23508,49 +25277,81 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
-.LC128:
+.LC188:
 	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
-.LC129:
+.LC189:
 	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
-.LC130:
+.LC190:
 	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
-.LC131:
+.LC191:
 	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
-.LC132:
+.LC192:
 	.string	"l2p"
-.LC133:
+.LC193:
 	.string	"vpn_check %x = c %x  s %x function: %x\n"
-.LC134:
+.LC194:
 	.string	"vpn_check blk = %x fix vpc\n"
-.LC135:
+.LC195:
 	.string	"...%s exit...%d\n"
 	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
-.LC158:
+.LC213:
 	.string	"ftl_discard:(%x, %x, %x, %x)\n"
 	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
-.LC153:
+.LC214:
 	.string	"gc %d: %d %d %d %d %d %d %d\n"
-.LC154:
+.LC215:
 	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC155:
+.LC216:
 	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC156:
+.LC217:
 	.string	"gc free %x, %d\n"
+.LC218:
+	.string	"error gc slc free sblk = %x, vpn = %d %d\n"
+.LC219:
+	.string	"vpage0:"
+.LC220:
+	.string	"block %x, vpn = %d %d %d %d\n"
+.LC221:
+	.string	"block %x, vpn = %d %d\n"
+.LC222:
+	.string	"vpage1:"
 	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
-.LC15:
+.LC48:
 	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
 	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
-.LC115:
-	.string	"FTL version: 6.0.5 20180315"
+.LC164:
+	.string	"FTL version: 6.0.6 20180402"
+.LC165:
+	.string	"_c_user_data_density := %d\n"
+.LC166:
+	.string	"_c_totle_phy_density := %d\n"
+.LC167:
+	.string	"_c_totle_log_page := %d\n"
+.LC168:
+	.string	"_c_totle_data_density := %d\n"
+.LC169:
+	.string	"_c_ftl_pm_page_num := %d\n"
+.LC170:
+	.string	"_c_ftl_byte_pre_page := %d\n"
+.LC171:
+	.string	"_c_max_pm_sblk := %d\n"
+.LC172:
+	.string	"_min_slc_super_block := %d\n"
+.LC173:
+	.string	"_max_xlc_super_block := %d\n"
+.LC174:
+	.string	"gp_ftl_ext_info %p %p %p\n"
+.LC175:
+	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
-.LC126:
+.LC186:
 	.string	"ftl_read %x %x %x\n"
-.LC127:
+.LC187:
 	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
-.LC38:
+.LC71:
 	.string	"free blk vpn error: %x %x\n"
 	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
-.LC157:
+.LC223:
 	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit 46f2097ab870aef36e87e0bd169a319c01e295cf
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Mon Apr 9 14:22:55 2018 +0800

    rockchip/rk3399: update config for firefly
    
    Change-Id: I608f5cc9bd956c58693f52895ab883c9c7ea42da
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 95723b823c..fd655a0f32 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -24,14 +25,14 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -67,7 +68,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

commit 7adb8398a1d9d22f605d5a3d10bae8f82383a469
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Nov 30 15:56:54 2017 +0800

    drm/rockchip: lvds: add dual lvds support
    
    Change-Id: I305f3ea7597e87cf005fdfef87424f714b7c053e
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index d52e65f51e..4f3c0af80b 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -647,7 +647,8 @@ static int rockchip_lvds_enable(struct display_state *state)
 	if (lvds->pdata->has_vop_sel)
 		rockchip_lvds_vop_routing(lvds, crtc_state->crtc_id);
 
-	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
+	if ((lvds->output == DISPLAY_OUTPUT_LVDS) ||
+	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)) {
 		if (lvds->pdata->chip_type == RK3288_LVDS)
 			rk3288_output_lvds(state);
 		else if (lvds->pdata->chip_type == RK3126_LVDS)

commit 5c651246bb4f56fc9119eb8dee2cc2356f74949b
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Apr 4 09:19:34 2018 +0800

    drm/rockchip: vop: add support rk3308 vop
    
    Change-Id: I067ac3f95163dd678317a11ffad7a7d85225c9ee
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 523337b5e6..becd964752 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -65,6 +65,23 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+		status = "disabled";
+
+		route {
+			route_rgb: route-rgb {
+				status = "okay";
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vop_out_rgb>;
+			};
+		};
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";
@@ -164,6 +181,27 @@
 		status = "disabled";
 	};
 
+	vop: vop@ff2e0000 {
+		compatible = "rockchip,rk3308-vop";
+		reg = <0x0 0xff2e0000 0x0 0x1fc>, <0x0 0xff2e0a00 0x0 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>,
+			 <&cru HCLK_VOP>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_rgb: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&rgb_in_vop>;
+			};
+		};
+	};
+
 	pwm0: pwm@ff180000 {
 		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
 		reg = <0x0 0xff180000 0x0 0x10>;
@@ -208,6 +246,31 @@
 		status = "disabled";
 	};
 
+	rgb: rgb {
+		compatible = "rockchip,rk3308-rgb";
+		status = "disabled";
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcdc_ctl>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				rgb_in_vop: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vop_out_rgb>;
+				};
+			};
+
+		};
+	};
+
 	saradc: saradc@ff1e0000 {
 		compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff1e0000 0x0 0x100>;
@@ -951,5 +1014,55 @@
 					<1 RK_PB4 3 &pcfg_pull_none>;
 			};
 		};
+
+		lcdc {
+			lcdc_ctl: lcdc-ctl {
+				rockchip,pins =
+					/* dclk */
+					<1 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
+					/* hsync */
+					<1 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,
+					/* vsync */
+					<1 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+					/* den */
+					<1 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
+					/* d0 */
+					<1 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+					/* d1 */
+					<1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
+					/* d2 */
+					<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+					/* d3 */
+					<1 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
+					/* d4 */
+					<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+					/* d5 */
+					<1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+					/* d6 */
+					<1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
+					/* d7 */
+					<1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
+					/* d8 */
+					<1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+					/* d9 */
+					<1 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
+					/* d10 */
+					<1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
+					/* d11 */
+					<1 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
+					/* d12 */
+					<1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+					/* d13 */
+					<1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+					/* d14 */
+					<1 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
+					/* d15 */
+					<1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+					/* d16 */
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
+					/* d17 */
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
 	};
 };
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index c1ef8cf6cf..098079ca5c 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -55,6 +55,11 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_RGB=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 28c2eb4a78..722998a68d 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -32,6 +32,11 @@ static const struct rockchip_crtc px30_vop_big_data = {
 	.data = &px30_vop_big,
 };
 
+static const struct rockchip_crtc rk3308_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3308_vop,
+};
+
 static const struct rockchip_crtc rk3288_vop_big_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &rk3288_vop_big,
@@ -85,6 +90,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,px30-vop-big",
 		.data = (ulong)&px30_vop_big_data,
+	}, {
+		.compatible = "rockchip,rk3308-vop",
+		.data = (ulong)&rk3308_vop_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop-big",
 		.data = (ulong)&rk3288_vop_big_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 613eaea0f8..60ace69f5f 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -28,6 +28,7 @@ extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
 extern const struct vop_data rk3036_vop;
 extern const struct vop_data px30_vop_lit;
 extern const struct vop_data px30_vop_big;
+extern const struct vop_data rk3308_vop;
 extern const struct vop_data rk3288_vop_big;
 extern const struct vop_data rk3288_vop_lit;
 extern const struct vop_data rk3368_vop;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 436cc3e35f..31541cf2d7 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -502,3 +502,70 @@ const struct vop_data px30_vop_big = {
 	.line_flag = &rk3366_vop_lite_line_flag,
 	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
 };
+
+static const struct vop_ctrl rk3308_ctrl_data = {
+	.standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1),
+	.axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16),
+	.axi_max_outstanding_en = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1, 12),
+	.htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
+	.hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0),
+	.vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
+	.vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0),
+	.global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13),
+	.auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0),
+	.dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 3),
+	.overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4),
+	.dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14),
+	.rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0),
+	.rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2),
+	.rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1),
+	.dither_up = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
+	.dither_down = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x7, 6),
+	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
+	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
+	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
+	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
+	.dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3),
+	.dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5),
+	.out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16),
+	.dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0),
+	.cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0),
+
+	.bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0),
+	.bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1),
+	.bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2),
+	.bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4),
+	.bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6),
+	.bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7),
+	.bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0),
+	.bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20),
+	.bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16),
+
+	.mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0),
+	.mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6),
+	.mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10),
+	.mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16),
+	.mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20),
+	.mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26),
+	.mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27),
+	.mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28),
+	.mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29),
+	.mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30),
+	.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
+	.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
+				      0xffffffff, 0),
+};
+
+const struct vop_data rk3308_vop = {
+	.version = VOP_VERSION(2, 7),
+	.max_output = {1920, 1080},
+	.ctrl = &rk3308_ctrl_data,
+	.win = &rk3366_win0_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index 2fdadb9998..1fa3c14d65 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -12,7 +12,11 @@
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 
-#define CONFIG_CONSOLE_SCROLL_LINES		10
+#define ROCKCHIP_DEVICE_SETTINGS \
+			"stdout=serial,vidconsole\0" \
+			"stderr=serial,vidconsole\0"
+#undef CONFIG_CONSOLE_SCROLL_LINES
+#define CONFIG_CONSOLE_SCROLL_LINES            10
 
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 98295e1747..ae78a2a521 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -59,6 +59,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit 45fa51f3200a74a02950d18f428469c678e69680
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sat Mar 17 17:01:23 2018 +0800

    drm/panel: add support spi panel init
    
    Change-Id: Ib3bc1bbd21ec78b718ad06b9bbdebd213c39c5be
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index e050695fe2..0f216f9b98 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -29,6 +29,12 @@ enum display_mode {
 	ROCKCHIP_DISPLAY_CENTER,
 };
 
+enum rockchip_cmd_type {
+	CMD_TYPE_DEFAULT,
+	CMD_TYPE_SPI,
+	CMD_TYPE_MCU
+};
+
 /*
  * display output interface supported by rockchip lcdc
  */
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 69b056d062..6605b4ef93 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -64,8 +64,26 @@ struct rockchip_panel_priv {
 	struct udevice *backlight;
 	struct gpio_desc enable_gpio;
 	struct gpio_desc reset_gpio;
+
+	int cmd_type;
+	struct gpio_desc spi_sdi_gpio;
+	struct gpio_desc spi_scl_gpio;
+	struct gpio_desc spi_cs_gpio;
 };
 
+static inline int get_panel_cmd_type(const char *s)
+{
+	if (!s)
+		return -EINVAL;
+
+	if (strncmp(s, "spi", 3) == 0)
+		return CMD_TYPE_SPI;
+	else if (strncmp(s, "mcu", 3) == 0)
+		return CMD_TYPE_MCU;
+
+	return CMD_TYPE_DEFAULT;
+}
+
 static int rockchip_panel_parse_cmds(const u8 *data, int length,
 				     struct rockchip_panel_cmds *pcmds)
 {
@@ -110,8 +128,64 @@ static int rockchip_panel_parse_cmds(const u8 *data, int length,
 	return 0;
 }
 
-static int rockchip_panel_send_cmds(struct display_state *state,
-				    struct rockchip_panel_cmds *cmds)
+static void rockchip_panel_write_spi_cmds(struct rockchip_panel_priv *priv,
+					  u8 type, int value)
+{
+	int i;
+
+	dm_gpio_set_value(&priv->spi_cs_gpio, 0);
+
+	if (type == 0)
+		value &= (~(1 << 8));
+	else
+		value |= (1 << 8);
+
+	for (i = 0; i < 9; i++) {
+		if (value & 0x100)
+			dm_gpio_set_value(&priv->spi_sdi_gpio, 1);
+		else
+			dm_gpio_set_value(&priv->spi_sdi_gpio, 0);
+
+		dm_gpio_set_value(&priv->spi_scl_gpio, 0);
+		udelay(10);
+		dm_gpio_set_value(&priv->spi_scl_gpio, 1);
+		value <<= 1;
+		udelay(10);
+	}
+
+	dm_gpio_set_value(&priv->spi_cs_gpio, 1);
+}
+
+static int rockchip_panel_send_spi_cmds(struct display_state *state,
+					struct rockchip_panel_cmds *cmds)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	int i;
+
+	if (!cmds)
+		return -EINVAL;
+
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+		int value = 0;
+
+		if (desc->header.payload_length == 2)
+			value = (desc->payload[0] << 8) | desc->payload[1];
+		else
+			value = desc->payload[0];
+		rockchip_panel_write_spi_cmds(priv,
+					      desc->header.data_type, value);
+
+		if (desc->header.delay_ms)
+			mdelay(desc->header.delay_ms);
+	}
+
+	return 0;
+}
+
+static int rockchip_panel_send_dsi_cmds(struct display_state *state,
+					struct rockchip_panel_cmds *cmds)
 {
 	int i, ret;
 
@@ -182,7 +256,12 @@ static int rockchip_panel_prepare(struct display_state *state)
 	mdelay(plat->delay.init);
 
 	if (plat->on_cmds) {
-		ret = rockchip_panel_send_cmds(state, plat->on_cmds);
+		if (priv->cmd_type == CMD_TYPE_SPI)
+			ret = rockchip_panel_send_spi_cmds(state,
+							   plat->on_cmds);
+		else
+			ret = rockchip_panel_send_dsi_cmds(state,
+							   plat->on_cmds);
 		if (ret)
 			printf("failed to send on cmds: %d\n", ret);
 	}
@@ -203,7 +282,12 @@ static void rockchip_panel_unprepare(struct display_state *state)
 		return;
 
 	if (plat->off_cmds) {
-		ret = rockchip_panel_send_cmds(state, plat->off_cmds);
+		if (priv->cmd_type == CMD_TYPE_SPI)
+			ret = rockchip_panel_send_spi_cmds(state,
+							   plat->off_cmds);
+		else
+			ret = rockchip_panel_send_dsi_cmds(state,
+							   plat->off_cmds);
 		if (ret)
 			printf("failed to send off cmds: %d\n", ret);
 	}
@@ -338,6 +422,7 @@ static int rockchip_panel_probe(struct udevice *dev)
 {
 	struct rockchip_panel_priv *priv = dev_get_priv(dev);
 	int ret;
+	const char *cmd_type;
 
 	ret = gpio_request_by_name(dev, "enable-gpios", 0,
 				   &priv->enable_gpio, GPIOD_IS_OUT);
@@ -367,6 +452,40 @@ static int rockchip_panel_probe(struct udevice *dev)
 		return ret;
 	}
 
+	ret = dev_read_string_index(dev, "rockchip,cmd-type", 0, &cmd_type);
+	if (ret)
+		priv->cmd_type = CMD_TYPE_DEFAULT;
+	else
+		priv->cmd_type = get_panel_cmd_type(cmd_type);
+
+	if (priv->cmd_type == CMD_TYPE_SPI) {
+		ret = gpio_request_by_name(dev, "spi-sdi-gpios", 0,
+					   &priv->spi_sdi_gpio, GPIOD_IS_OUT);
+		if (ret && ret != -ENOENT) {
+			printf("%s: Cannot get spi sdi GPIO: %d\n",
+			       __func__, ret);
+			return ret;
+		}
+		ret = gpio_request_by_name(dev, "spi-scl-gpios", 0,
+					   &priv->spi_scl_gpio, GPIOD_IS_OUT);
+		if (ret && ret != -ENOENT) {
+			printf("%s: Cannot get spi scl GPIO: %d\n",
+			       __func__, ret);
+			return ret;
+		}
+		ret = gpio_request_by_name(dev, "spi-cs-gpios", 0,
+					   &priv->spi_cs_gpio, GPIOD_IS_OUT);
+		if (ret && ret != -ENOENT) {
+			printf("%s: Cannot get spi cs GPIO: %d\n",
+			       __func__, ret);
+			return ret;
+		}
+		dm_gpio_set_value(&priv->spi_sdi_gpio, 1);
+		dm_gpio_set_value(&priv->spi_scl_gpio, 1);
+		dm_gpio_set_value(&priv->spi_cs_gpio, 1);
+		dm_gpio_set_value(&priv->reset_gpio, 0);
+	}
+
 	return 0;
 }
 

commit 112f288f30d4f99638451ff25afb3ea941d7fcab
Author: Caesar <wxt@rock-chips.com>
Date:   Tue Apr 3 20:39:29 2018 +0800

    rockchip/rk3399: update the evb config to support the RK bootloader
    
    Change-Id: Iac3b642ee180caa7654a94525c1b359b366fa092
    Signed-off-by: Caesar <wxt@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index c9d3037cdb..b8fca544c2 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF=y
@@ -24,14 +25,14 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
@@ -68,7 +69,6 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y

commit 8517e6f9eb7c22ec325223717594b9abfd83a1f2
Author: Caesar <wxt@rock-chips.com>
Date:   Tue Apr 3 20:36:36 2018 +0800

    rockchip/rk3399: prevent to build error with SPL
    
    As rk3399 enables the CONFIG_BOOTCOMMAN that will cause
    the build error with SPL enabled.
    
    Change-Id: I8d2f680efd24e9ad528d06f363f646e6a7c7f0f0
    Signed-off-by: Caesar <wxt@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 9e2c2e5c13..5565c7ce53 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -9,6 +9,11 @@
 
 #include <configs/rk3399_common.h>
 
+#ifndef CONFIG_SPL_BUILD
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+#endif
+
 #define CONFIG_MMC_SDHCI_SDMA
 #define CONFIG_SYS_MMC_ENV_DEV 0
 

commit 1e104d55716c6b148f8f738afd5bebded4bb655e
Author: Dingqiang Lin <jon.lin@rock-chips.com>
Date:   Wed Apr 4 19:49:26 2018 +0800

    arm: rockchip: rk3308: add nandc node for rk3308
    
    Change-Id: I71d4205f683141f41a3ecf4fac23b8bc5097dd74
    Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 0662bd0b71..523337b5e6 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -336,6 +336,16 @@
 		status = "disabled";
 	};
 
+	nandc: nandc@ff4b0000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff4b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	cru: clock-controller@ff500000 {
 		compatible = "rockchip,rk3308-cru";
 		reg = <0x0 0xff500000 0x0 0x1000>;

commit f9f36d4f69ee7e6984d9a08f108b59a3088645ab
Author: Meng Dongyang <daniel.meng@rock-chips.com>
Date:   Tue Apr 3 10:11:20 2018 +0800

    phy: phy-rockchip-inno-usb2: add compatible of rk3308
    
    Add compatible of rk3308, using the data of rk3328.
    
    Change-Id: I4cda504d1ec15546f02a760f5c164a663424aa4c
    Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 9cfd2c0077..f157c52f8a 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -682,6 +682,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
 
 static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
+	{ .compatible = "rockchip,rk3308-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
 	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
 	{ }

commit 87e0d84ff77e109bbf6e8390a6d4fa92cf9018c8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 3 10:25:21 2018 +0800

    rockchip: clk: rk3288: do rkclk_init() when CPLL is in slow mode
    
    The pre-loader(eg. miniloader) may not init the CPLL, we need to
    do the rkclk_init() to init the clocks in U-Boot, or else we may
    get wrong serial baurd rate in kernel.
    
    Change-Id: I4a226e110638aa18d10df35e8d9507f6679a5678
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index fc83271f91..b730cefbf7 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -1059,10 +1059,12 @@ static int rk3288_clk_probe(struct udevice *dev)
 		 * Init clocks in U-Boot proper if the NPLL is runnning. This
 		 * indicates that a previous boot loader set up the clocks, so
 		 * we need to redo it. U-Boot's SPL does not set this clock.
+		 * Or if the CPLL is not init, we need to redo the clk_init.
 		 */
 		reg = readl(&priv->cru->cru_mode_con);
-		if (((reg & NPLL_MODE_MASK) >> NPLL_MODE_SHIFT) ==
-				NPLL_MODE_NORMAL)
+		if ((((reg & NPLL_MODE_MASK) >> NPLL_MODE_SHIFT) ==
+				NPLL_MODE_NORMAL) ||
+		    !(reg & CPLL_MODE_MASK))
 			init_clocks = true;
 	}
 

commit 57c9220a25d13f37661e0b1d6de31bd160e1092d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Apr 3 10:14:28 2018 +0800

    rockchip: sdram-common: fix size for 4GB in 32bit SoC
    
    System will get size '0' in 32bit system if the size is 4GB
    for the address is 32bit only, return the max space available
    instead of actual DDR size in rockchip_sdram_size().
    
    Change-Id: I879439e52a98ee7a3d5a20f38611aad74f723dca
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index a6a5b9569f..f40edcce43 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -127,6 +127,10 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 		      rank, col, bk, cs0_row, bw, row_3_4);
 	}
 
+	/* Handle 4GB size, or else size will be 0 after <<20 in 32bit system */
+	if (size_mb > (SDRAM_MAX_SIZE >> 20))
+		size_mb = (SDRAM_MAX_SIZE >> 20);
+
 	return (size_t)size_mb << 20;
 }
 

commit 9e68721b270b4ce4e71f19e283e4363e8b1a15ff
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 28 18:03:45 2018 +0800

    bootargs : read oem unlock status
    
    Read oem unlock status from optee_client api
    and attach it to bootargs
    
    Change-Id: Ib8b1a9bc115ec9cb7e5ce09dc50845cfd7c1c81b
    Signed-off-by: Qiu Jian <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index cdbd089580..1fe4fe3d3a 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -8,6 +8,9 @@
 #include <android_bootloader.h>
 #include <attestation_key.h>
 #include <boot_rkimg.h>
+#include <optee_include/OpteeClientInterface.h>
+
+#define OEM_UNLOCK_ARG_SIZE 30
 
 static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		      char * const argv[])
@@ -33,6 +36,20 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		load_attestation_key(dev_desc, &misc_part_info);
 #endif
 
+#ifdef CONFIG_OPTEE_CLIENT
+	/* read oem unlock status and attach to bootargs */
+	uint8_t unlock = 0;
+	TEEC_Result result;
+	char oem_unlock[OEM_UNLOCK_ARG_SIZE] = {0};
+	result = trusty_read_oem_unlock(&unlock);
+	if (result) {
+		printf("read oem unlock status with error : 0x%x\n", result);
+	} else {
+		snprintf(oem_unlock, OEM_UNLOCK_ARG_SIZE, "androidboot.oem_unlocked=%d", unlock);
+		env_update("bootargs", oem_unlock);
+	}
+#endif
+
 	mode = rockchip_get_boot_mode();
 	if (mode == BOOT_MODE_RECOVERY) {
 		boot_partname = PART_RECOVERY;
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2627da9347..7016f33e5a 100755
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -16,6 +16,7 @@
 #include <fs.h>
 #include <boot_rkimg.h>
 #include <attestation_key.h>
+#include <optee_include/OpteeClientInterface.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -33,6 +34,7 @@
 #else
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 #endif
+#define OEM_UNLOCK_ARG_SIZE 30
 
 char *android_str_append(char *base_name, char *slot_suffix)
 {
@@ -562,6 +564,20 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
 	env_set("android_slotsufix", slot_suffix);
 
+#ifdef CONFIG_OPTEE_CLIENT
+	/* read oem unlock status and attach to bootargs */
+	uint8_t unlock = 0;
+	TEEC_Result result;
+	char oem_unlock[OEM_UNLOCK_ARG_SIZE] = {0};
+	result = trusty_read_oem_unlock(&unlock);
+	if (result) {
+		printf("read oem unlock status with error : 0x%x\n", result);
+	} else {
+		snprintf(oem_unlock, OEM_UNLOCK_ARG_SIZE, "androidboot.oem_unlocked=%d", unlock);
+		env_update("bootargs", oem_unlock);
+	}
+#endif
+
 	/* Assemble the command line */
 	command_line = android_assemble_cmdline(slot_suffix, mode_cmdline);
 	env_update("bootargs", command_line);

commit f61a997e298454f34bee822067d9a5ee37105519
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 28 16:57:01 2018 +0800

    fastboot: implement oem unlock commands for bootrkp
    
    Read-write oem unlock status from optee client api.
    
    Implement the following fastboot commands:
      fastboot oem unlock
      fastboot oem unlock_accept
      fastboot oem lock
      fastboot getvar oem-unlock
    
    Change-Id: I99edcee7b60c6d9529e6687291d87f22bf97b771
    Signed-off-by: Qiu Jian <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 04b81b373a..cdbd089580 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -17,6 +17,7 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	int mode = 0;
 	char *boot_partname = PART_BOOT;
 	int ret = 0;
+	int i = 0;
 
 	dev_desc = rockchip_get_bootdev();
 
@@ -37,6 +38,15 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 		boot_partname = PART_RECOVERY;
 		printf("%s boot from Recovery partition!\n", __func__);
 	}
+
+	for (i = 0; i < argc; i++) {
+		if (!strcmp(argv[i], "boot-recovery")) {
+			boot_partname = PART_RECOVERY;
+			printf("%s argv%d:%s boot from Recovery partition!\n",
+				__func__, i, argv[i]);
+		}
+	}
+
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 
 	if(boot_rockchip_image(dev_desc, &part_info))
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 3a431e3497..6b75046ad4 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -29,12 +29,12 @@ struct bootloader_message {
 	char recovery[768];
 
 	/*
-         * The 'recovery' field used to be 1024 bytes.  It has only ever
+	 * The 'recovery' field used to be 1024 bytes.  It has only ever
 	 * been used to store the recovery command line, so 768 bytes
 	 * should be plenty.  We carve off the last 256 bytes to store the
 	 * stage string (for multistage packages) and possible future
 	 * expansion.
-         */
+	 */
 	char stage[32];
 	char slot_suffix[32];
 	char reserved[192];
@@ -203,6 +203,66 @@ struct blk_desc *rockchip_get_bootdev(void)
 }
 
 static int boot_mode = -1;
+
+static void rkloader_set_bootloader_msg(struct bootloader_message *bmsg)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	int ret = part_get_info_by_name(dev_desc, PART_MISC,
+			&part_info);
+	if (ret < 0) {
+		printf("not found misc partition.\n");
+		return;
+	}
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
+			* RK_BLK_SIZE;
+	ret = blk_dwrite(dev_desc, part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			size >> 9, bmsg);
+	if (ret != (size >> 9)) {
+		printf("wape data failed!");
+	}
+}
+
+void board_run_recovery(void)
+{
+	char *const boot_recovery_cmd[] = {"run", "boot_recovery_cmd", NULL};
+
+	env_set("boot_recovery_cmd", "bootrkp boot-recovery");
+
+	do_run(NULL, 0, ARRAY_SIZE(boot_recovery_cmd), boot_recovery_cmd);
+}
+
+void board_run_recovery_wipe_data(void)
+{
+	struct bootloader_message bmsg;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	printf("Rebooting into recovery to do wipe_data\n");
+	dev_desc = rockchip_get_bootdev();
+	int ret;
+
+	ret = part_get_info_by_name(dev_desc, PART_MISC,
+		&part_info);
+
+	if (ret < 0) {
+		printf("not found misc partition, just run recovery.\n");
+		board_run_recovery();
+	}
+
+	memset((char *)&bmsg, 0, sizeof(struct bootloader_message));
+	strcpy(bmsg.command, "boot-recovery");
+	bmsg.status[0] = 0;
+	strcpy(bmsg.recovery, "recovery\n--wipe_data");
+
+	rkloader_set_bootloader_msg(&bmsg);
+
+	/* now reboot to recovery */
+	board_run_recovery();
+}
+
 int rockchip_get_boot_mode(void)
 {
 	struct blk_desc *dev_desc;
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 7857c2766b..b505ce9ce1 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -37,6 +37,8 @@
 #ifdef CONFIG_OPTEE_CLIENT
 #include <optee_include/OpteeClientInterface.h>
 #endif
+#include <boot_rkimg.h>
+#include <optee_include/tee_client_api.h>
 
 #define FASTBOOT_VERSION		"0.4"
 
@@ -685,6 +687,33 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			sprintf(part_size_str, "0x%016x", (int)part_info.size);
 			strncat(response, part_size_str, chars_left);
 		}
+	} else if (!strncmp("oem-unlock", cmd, 10)) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+
+		char msg[50] = {0};
+		uint8_t unlock = 0;
+		TEEC_Result result;
+
+		result = trusty_read_oem_unlock(&unlock);
+		if (result) {
+			printf("read oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILRead oem unlock status failed");
+			return;
+		}
+		sprintf(msg, "Device is %s, Status Code: %d\n",
+			unlock == 0 ? "LOCKED" : "UNLOCKED", unlock);
+
+		printf(msg);
+		strncat(response, msg, chars_left);
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else {
 		char *envstr;
 
@@ -1143,16 +1172,126 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	if (strncmp("format", cmd + 4, 6) == 0) {
 		char cmdbuf[32];
-                sprintf(cmdbuf, "gpt write mmc %x $partitions",
+		sprintf(cmdbuf, "gpt write mmc %x $partitions",
 			CONFIG_FASTBOOT_FLASH_MMC_DEV);
-                if (run_command(cmdbuf, 0))
+		if (run_command(cmdbuf, 0))
 			fastboot_tx_write_str("FAILmmc write failure");
-                else
+		else
 			fastboot_tx_write_str("OKAY");
 	} else
 #endif
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+		uint8_t unlock = 0;
+		TEEC_Result result;
+		debug("oem unlock\n");
+		result = trusty_read_oem_unlock(&unlock);
+		if (result) {
+			printf("read oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILRead oem unlock status failed");
+			return;
+		}
+		if (unlock) {
+			printf("oem unlock ignored, device already unlocked\n");
+			fastboot_tx_write_str("FAILalready unlocked");
+			return;
+		}
+		printf("oem unlock requested:\n");
+		printf("\tUnlocking forces a factory reset and could\n");
+		printf("\topen your device up to a world of hurt.  If you\n");
+		printf("\tare sure you know what you're doing, then accept\n");
+		printf("\tvia 'fastboot oem unlock_accept'.\n");
+		env_set("unlock", "unlock");
+		fastboot_tx_write_str("OKAY");
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (strncmp("unlock_accept", cmd + 4, 13) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+		char *unlock = env_get("unlock");
+		TEEC_Result result;
+		debug("oem unlock_accept\n");
+		if (unlock == NULL || strncmp("unlock", unlock, 6) != 0) {
+			printf("oem unlock_accept ignored, not pending\n");
+			fastboot_tx_write_str("FAILoem unlock not requested");
+			return;
+		}
+		env_set("unlock", "");
+		printf("Erasing userdata partition\n");
+		struct blk_desc *dev_desc;
+		disk_partition_t part_info;
+		dev_desc = rockchip_get_bootdev();
+		int ret = part_get_info_by_name(dev_desc, "userdata",
+				&part_info);
+		if (ret < 0) {
+			printf("not found userdata partition");
+			printf("Erase failed with error %d\n", ret);
+			fastboot_tx_write_str("FAILErasing userdata failed");
+			return;
+		}
+		ret = blk_derase(dev_desc, part_info.start, part_info.size);
+		if (ret != part_info.size) {
+			printf("Erase failed with error %d\n", ret);
+			fastboot_tx_write_str("FAILErasing userdata failed");
+			return;
+		}
+		printf("Erasing succeeded\n");
+
+		result = trusty_write_oem_unlock(1);
+		if (result) {
+			printf("write oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILWrite oem unlock status failed");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+
+		/*
+		 * now reboot into recovery to do a format of the
+		 * userdata partition so it's ready to use on next boot
+		 */
+		board_run_recovery_wipe_data();
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (strncmp("lock", cmd + 4, 8) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#else
+		TEEC_Result result;
+		uint8_t unlock = 0;
+		trusty_read_oem_unlock(&unlock);
+		if (!unlock) {
+			printf("oem lock ignored, already locked\n");
+			fastboot_tx_write_str("FAILalready locked");
+			return;
+		}
+
+		result = trusty_write_oem_unlock(0);
+		if (result) {
+			printf("write oem unlock status with error : 0x%x\n", result);
+			fastboot_tx_write_str("FAILWrite oem unlock status failed");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+#endif
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
 #ifdef CONFIG_OPTEE_CLIENT
 		uint8_t out[ATTEST_CA_OUT_SIZE];
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index d5078e846b..7a094be074 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -30,4 +30,14 @@ int rockchip_get_boot_mode(void);
 int boot_rockchip_image(struct blk_desc *dev, disk_partition_t *boot_part);
 struct blk_desc *rockchip_get_bootdev(void);
 
+/*
+ * reboot into recovery and wipe data
+ */
+void board_run_recovery_wipe_data(void);
+
+/*
+ * reboot into recovery
+ */
+void board_run_recovery(void);
+
 #endif

commit 78ef5fbdb92712dc771643c913975ff4faff380d
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 28 16:12:55 2018 +0800

    lib: optee_client: add oem unlock status func
    
    Change-Id: If92c59650994bd2ab8e689f063acf1d65dc08e48
    Signed-off-by: Qiu Jian <qiujian@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 920e68155a..93470d3004 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -7,6 +7,8 @@
 #ifndef _OPTEECLIENTTEST_H_
 #define _OPTEECLIENTTEST_H_
 
+#include <optee_include/tee_client_api.h>
+
 #define ATAP_HEX_UUID_LEN 32
 #define ATTEST_DH_SIZE     8
 #define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
@@ -21,6 +23,20 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state);
 uint32_t trusty_write_lock_state(uint8_t lock_state);
 uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
 uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
+
+/*
+ * read data from rk_keymaster
+ *
+ * @filename:		the filename of the saved data to read
+ * @filename_size: 	size of filename
+ * @data: 		the buffer used to read data from rk_keymaster
+ * @data_size: 		buffer size of the data
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result read_from_keymaster
+	(uint8_t *filename, uint32_t filename_size,
+	uint8_t *data, uint32_t data_size);
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
@@ -38,4 +54,23 @@ uint32_t trusty_attest_get_ca
 	(uint8_t *operation_start, uint32_t *operation_size,
 	 uint8_t *out, uint32_t *out_len);
 uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size);
+
+/*
+ * read oem unlock status from rk_keymaster
+ *
+ * @unlock:used to read oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock);
+
+/*
+ * update oem unlock status to rk_keymaster
+ *
+ * @unlock: oem unlock status code,0:locked,1:unlocked
+ *
+ * @return a positive number in case of error, or 0 on success.
+ */
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock);
+
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 1a2c23f0ca..0632b33733 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/tee_client_api.h>
+#include <optee_include/tee_api_defines.h>
 #include <boot_rkimg.h>
 
 void test_optee(void)
@@ -808,6 +809,93 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	return TeecResult;
 }
 
+TEEC_Result read_from_keymaster(uint8_t *filename,
+		uint32_t filename_size,
+		uint8_t *data,
+		uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
+
+	debug("read_from_keymaster start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+#ifdef CONFIG_OPTEE_V1
+				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					142,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(data, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("read_from_keymaster end\n");
+
+	return TeecResult;
+}
+
 uint32_t write_to_keymaster(uint8_t *filename,
 		uint32_t filename_size,
 		uint8_t *data,
@@ -892,7 +980,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
 	TEEC_FinalizeContext(&TeecContext);
-	debug("testmm end\n");
+	debug("write_to_keymaster end\n");
 	debug("TeecResult %x\n", TeecResult);
 
 	return TeecResult;
@@ -1731,3 +1819,29 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 
 	return TeecResult;
 }
+
+TEEC_Result trusty_write_oem_unlock(uint8_t unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = write_to_keymaster((uint8_t *)file, strlen(file),
+		(uint8_t *)&unlock, 1);
+	return ret;
+}
+
+TEEC_Result trusty_read_oem_unlock(uint8_t *unlock)
+{
+	char *file = "oem.unlock";
+	TEEC_Result ret;
+
+	ret = read_from_keymaster((uint8_t *)file, strlen(file),
+		unlock, 1);
+
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
+		debug("init oem unlock status 0");
+		ret = trusty_write_oem_unlock(0);
+	}
+
+	return ret;
+}
\ No newline at end of file

commit 9564380bdf7e174e66c3ea441930593e4d0794d4
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Apr 2 20:18:38 2018 +0800

    arm: rockchip: rk3308: set u-boot,dm-pre-reloc for emmc and cru
    
    We use dt-spl.dtb for mmc_initialize to load dtb from kernel when
    CONFIG_USING_KERNEL_DTB is enabled, so set emmc as u-boot,dm-pre-reloc
    to make sure it will builtin dt-spl.dtb.
    
    As emmc driver depends on cru, so also set cru as u-boot,dm-pre-reloc here.
    
    Change-Id: Ia43d1a5ff2b9f75a28d18136d9d9185659a6fbe4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index d21681348e..9c30b35950 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -12,6 +12,14 @@
 	};
 };
 
+&cru {
+        u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 };

commit ec20593d9e707db8de34bc5f31c6c35b24fd571e
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Mar 27 21:40:04 2018 +0800

    clk: rockchip: rk3308: Add support to set dclk_vop rate
    
    Change-Id: Ib7b5d35d4a65167d660f254600e0673bebd70432
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index ee6204a4c5..e3fb750a39 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -160,6 +160,20 @@ enum {
 	BUS_HCLK_DIV_SHIFT	= 0,
 	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
 
+	/* CRU_CLK_SEL8_CON */
+	DCLK_VOP_SEL_SHIFT	= 14,
+	DCLK_VOP_SEL_MASK	= 0x3 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_SEL_DIVOUT	= 0,
+	DCLK_VOP_SEL_FRACOUT,
+	DCLK_VOP_SEL_24M,
+	DCLK_VOP_PLL_SEL_SHIFT	= 10,
+	DCLK_VOP_PLL_SEL_MASK	= 0x3 << DCLK_VOP_PLL_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_DPLL	= 0,
+	DCLK_VOP_PLL_SEL_VPLL0,
+	DCLK_VOP_PLL_SEL_VPLL1,
+	DCLK_VOP_DIV_SHIFT	= 0,
+	DCLK_VOP_DIV_MASK	= 0xff,
+
 	/* CRU_CLK_SEL25_CON */
 	/* CRU_CLK_SEL26_CON */
 	/* CRU_CLK_SEL27_CON */
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 3c8d5073fe..cf725596c8 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -44,7 +44,7 @@ static u32 pll_mode_mask[PLL_COUNT] = {
 	VPLL1_MODE_MASK
 };
 
-static ulong apll_hz, dpll_hz, vpll0_hz;
+static ulong apll_hz, dpll_hz, vpll0_hz, vpll1_hz;
 
 /*
  * How to calculate the PLL:
@@ -200,6 +200,7 @@ static void rkclk_init(struct rk3308_cru *cru)
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
 
 	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
+	vpll1_hz = rkclk_pll_get_rate(cru, VPLL1);
 }
 
 static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
@@ -437,6 +438,93 @@ static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
 	return rk3308_pwm_get_clk(cru);
 }
 
+static ulong rk3308_vop_get_clk(struct rk3308_cru *cru)
+{
+	u32 div, pll_sel, vol_sel, con, parent;
+
+	con = readl(&cru->clksel_con[8]);
+	vol_sel = (con & DCLK_VOP_SEL_MASK) >> DCLK_VOP_SEL_SHIFT;
+	pll_sel = (con & DCLK_VOP_PLL_SEL_MASK) >> DCLK_VOP_PLL_SEL_SHIFT;
+	div = con & DCLK_VOP_DIV_MASK;
+
+	if (vol_sel == DCLK_VOP_SEL_24M) {
+		parent = OSC_HZ;
+	} else if (vol_sel == DCLK_VOP_SEL_DIVOUT) {
+		switch (pll_sel) {
+		case DCLK_VOP_PLL_SEL_DPLL:
+			parent = rkclk_pll_get_rate(cru, DPLL);
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL0:
+			parent = rkclk_pll_get_rate(cru, VPLL0);
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL1:
+			parent = rkclk_pll_get_rate(cru, VPLL1);
+			break;
+		default:
+			printf("do not support this vop pll sel\n");
+			return -EINVAL;
+		}
+	} else {
+		printf("do not support this vop sel\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3308_vop_set_clk(struct rk3308_cru *cru, ulong hz)
+{
+	ulong pll_rate, now, best_rate = 0;
+	u32 i, div, best_div = 0, best_sel = 0;
+
+	for (i = 0; i <= DCLK_VOP_PLL_SEL_VPLL1; i++) {
+		switch (i) {
+		case DCLK_VOP_PLL_SEL_DPLL:
+			pll_rate = dpll_hz;
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL0:
+			pll_rate = vpll0_hz;
+			break;
+		case DCLK_VOP_PLL_SEL_VPLL1:
+			pll_rate = vpll1_hz;
+			break;
+		default:
+			printf("do not support this vop pll sel\n");
+			return -EINVAL;
+		}
+
+		div = DIV_ROUND_UP(pll_rate, hz);
+		if (div > 255)
+			continue;
+		now = pll_rate / div;
+		if (abs(hz - now) < abs(hz - best_rate)) {
+			best_rate = now;
+			best_div = div;
+			best_sel = i;
+		}
+		debug("pll_rate=%lu, best_rate=%lu, best_div=%u, best_sel=%u\n",
+		      pll_rate, best_rate, best_div, best_sel);
+	}
+
+	if (best_rate != hz && hz == OSC_HZ) {
+		rk_clrsetreg(&cru->clksel_con[8],
+			     DCLK_VOP_SEL_MASK,
+			     DCLK_VOP_SEL_24M << DCLK_VOP_SEL_SHIFT);
+	} else if (best_rate) {
+		rk_clrsetreg(&cru->clksel_con[8],
+			     DCLK_VOP_SEL_MASK | DCLK_VOP_PLL_SEL_MASK |
+			     DCLK_VOP_DIV_MASK,
+			     DCLK_VOP_SEL_DIVOUT << DCLK_VOP_SEL_SHIFT |
+			     best_sel << DCLK_VOP_PLL_SEL_SHIFT |
+			     (best_div - 1) << DCLK_VOP_DIV_SHIFT);
+	} else {
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return rk3308_vop_get_clk(cru);
+}
+
 static ulong rk3308_clk_get_rate(struct clk *clk)
 {
 	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -470,6 +558,9 @@ static ulong rk3308_clk_get_rate(struct clk *clk)
 	case SCLK_PWM:
 		rate = rk3308_pwm_get_clk(priv->cru);
 		break;
+	case DCLK_VOP:
+		rate = rk3308_vop_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -508,6 +599,9 @@ static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_PWM:
 		ret = rk3308_pwm_set_clk(priv->cru, rate);
 		break;
+	case DCLK_VOP:
+		ret = rk3308_vop_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 8bf1bc66d931f3f5b23129341f58403607c9fa4d
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Apr 2 16:01:22 2018 +0800

    pinctrl: rockchip: Add IOMUX_UNMASKED flag for rk3288 pmu_gpio0
    
    There are no masked bits for pmu_gpio0 iomux, so add the IOMUX_UNMASKED
    to read iomux register at first, it would not change others' bits.
    
    Change-Id: I5a0cf5f15c90fa769c3447d4e5f5380630b10c3b
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 36b06c508d..3fbd974f66 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -37,6 +37,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
 #define IOMUX_8WIDTH_2BIT	BIT(5)
+#define IOMUX_UNMASKED		BIT(6)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -1113,7 +1114,11 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
 		}
 	}
 
-	data = (mask << (bit + 16));
+	if (mux_type & IOMUX_UNMASKED)
+		regmap_read(regmap, reg, &data);
+	else
+		data = (mask << (bit + 16));
+
 	data |= (mux & mask) << bit;
 	ret = regmap_write(regmap, reg, data);
 
@@ -2407,9 +2412,9 @@ static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
 };
 
 static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
+	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
+					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
+					     IOMUX_SOURCE_PMU | IOMUX_UNMASKED,
 					     IOMUX_UNROUTED
 			    ),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,

commit e290ced6461928697e46c08cd7d9cea63e63c88a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Apr 2 10:29:13 2018 +0800

    usb: gadget: skip receipent setup if usb config has not been set
    
    We found the following errors were reported when the rockusb
    command is executed.
    
    =============================
    RKUSB: LUN 0, dev 0, hwpart 0, sector 0x0, count 0xe90000
    "Synchronous Abort" handler, esr 0x96000010
    ELR:     22e5e4
    LR:      22e5dc
    x0 : 0000000000000000 x1 : 0000000000000064
    x2 : 0000000000000000 x3 : 00000000ff0c0000
    x4 : 0000000000000000 x5 : 0000000000000037
    x6 : 000000000000000a x7 : 0000000000000007
    x8 : 0000000000000008 x9 : 0000000000000008
    ...
    
    Resetting CPU ...
    
    It is caused by the null pointer in bmRequestType.Receipent.Device
    setup, theoretically, Receipent.Device setup should be handled after
    the set_configuration request was finished, so skip it if the usb
    configuration has not been set.
    
    Change-Id: I42caf375e8d842ad626d85a6a2a21dfb07fb557a
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index db3a754e49..ff89c1599c 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -903,10 +903,12 @@ unknown:
 		 * special non-standard request.
 		 */
 		case USB_RECIP_DEVICE:
-			debug("cdev->config->next_interface_id: %d intf: %d\n",
-			       cdev->config->next_interface_id, intf);
-			if (cdev->config->next_interface_id == 1)
-				f = cdev->config->interface[intf];
+			if (cdev->config) {
+				debug("cdev->config->next_interface_id: %d intf: %d\n",
+				      cdev->config->next_interface_id, intf);
+				if (cdev->config->next_interface_id == 1)
+					f = cdev->config->interface[intf];
+			}
 			break;
 		}
 

commit 5353f2a9a03776912796fcb29df3b07ee7b45eac
Author: jason.zhu <jason.zhu@rock-chips.com>
Date:   Fri Mar 30 21:26:59 2018 +0800

    android: fix memory overflow
    
    In the function android_assemble_cmdline, the allocated_suffix
    size must be strlen(ANDROID_ARG_SLOT_SUFFIX) + strlen(slot_suffix)
    +1. If not, the later strcpy and strcat operation will be
    out of bounds.
    
    Change-Id: Ib0ed73ebc2f076c8dc8afac168c7aaeccfddfa67
    Signed-off-by: jason.zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
old mode 100644
new mode 100755
index 669c057ee7..2627da9347
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -331,7 +331,9 @@ char *android_assemble_cmdline(const char *slot_suffix,
 	 */
 	if (slot_suffix) {
 		allocated_suffix = malloc(strlen(ANDROID_ARG_SLOT_SUFFIX) +
-					  strlen(slot_suffix));
+					  strlen(slot_suffix) + 1);
+		memset(allocated_suffix, 0, strlen(ANDROID_ARG_SLOT_SUFFIX)
+		       + strlen(slot_suffix) + 1);
 		strcpy(allocated_suffix, ANDROID_ARG_SLOT_SUFFIX);
 		strcat(allocated_suffix, slot_suffix);
 		*(current_chunk++) = allocated_suffix;

commit 4536545c9a6672a454d8de8c66064fe8efcabf98
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Apr 2 15:23:46 2018 +0800

    video/drm: rgb: properly check priv->grf pointer
    
    Change-Id: If5d4b1dea99aa2372488de5c154705a864fca474
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
index 92dc839164..77009f0040 100644
--- a/drivers/video/drm/rockchip_rgb.c
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -31,7 +31,7 @@ static int rockchip_rgb_prepare(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	int pipe = crtc_state->crtc_id;
 
-	if (priv->grf) {
+	if (!IS_ERR_OR_NULL(priv->grf)) {
 		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
 			     PX30_RGB_VOP_SEL(pipe));
 		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,

commit 72510c146aa740ec3e30a676e66b07f7cfbcb9c5
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 30 22:17:28 2018 +0800

    clk: rockchip: rk3308: Change peri bus parent to dpll
    
    Change-Id: I375500bdfaf884daf646b7c29e260fe997645f37
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 98f4e68a5a..3c8d5073fe 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -184,21 +184,22 @@ static void rkclk_init(struct rk3308_cru *cru)
 		     hclk_div << BUS_HCLK_DIV_SHIFT);
 
 	/*
-	 * select vpll0 as pd_peri bus clock source and
+	 * select dpll as pd_peri bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
-	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
-	aclk_div = vpll0_hz / PERI_ACLK_HZ - 1;
-	hclk_div = vpll0_hz / PERI_HCLK_HZ - 1;
-	pclk_div = vpll0_hz / PERI_PCLK_HZ - 1;
+	aclk_div = dpll_hz / PERI_ACLK_HZ - 1;
+	hclk_div = dpll_hz / PERI_HCLK_HZ - 1;
+	pclk_div = dpll_hz / PERI_PCLK_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[36],
 		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_VPLL0 << PERI_PLL_SEL_SHIFT |
+		     BUS_PLL_SEL_DPLL << PERI_PLL_SEL_SHIFT |
 		     aclk_div << PERI_ACLK_DIV_SHIFT);
 	rk_clrsetreg(&cru->clksel_con[37],
 		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK,
 		     pclk_div << PERI_PCLK_DIV_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT);
+
+	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
 }
 
 static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)

commit 329c8afb2461cf903861d68083883be2bdaa0b41
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 30 15:28:34 2018 +0800

    arm: rockchip: rk3308: fix the chip info
    
    The tag form tha package tool is rk3308
    
    Change-Id: I7c61ffb9f17a1eff72479eaa0912c57209156dbe
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 772993ea08..bdf96bb9bf 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -41,7 +41,7 @@ int rockchip_get_chip_info(unsigned int chip_info[])
 #elif defined(CONFIG_ROCKCHIP_RK3288)
 	chip_info[0] = 0x33323041;
 #elif defined(CONFIG_ROCKCHIP_RK3308)
-	chip_info[0] = 0x33333045;
+	chip_info[0] = 0x33333038;
 #elif defined(CONFIG_ROCKCHIP_RK3328)
 	chip_info[0] = 0x33323043;
 	chip_info[3] = 0x56313030;

commit 839aff5094fc47c8983fc7ba5f95f8b1d27bc598
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 29 16:21:40 2018 +0800

    rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
    
    Most of SoCs have 2 banks after we enable OP-TEE,
    for those still only have 1 bank soc, it's OK to use 2 bank
    for the other one have size 0 if not used.
    
    Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index da92b7a64c..deea62fe9f 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -38,7 +38,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_PREBOOT
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index ed6770e52d..fc4f814355 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -35,9 +35,8 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
-#define SDRAM_MAX_SIZE                  (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
+#define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index aacd0facad..3f1b20f540 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -17,9 +17,8 @@
 #define CONFIG_SYS_CBSIZE		256
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_BANK_SIZE			(1024UL << 20UL)
-#define SDRAM_MAX_SIZE			CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
+#define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 0358d95eba..ca4a21cfce 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -38,7 +38,6 @@
 
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0x80000000
 
 #define CONFIG_SPI_FLASH
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 9c69a893d5..d95ce978b1 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -13,7 +13,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
@@ -44,7 +43,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0x80000000
 
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index e40d4504b9..28263e1895 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -32,7 +32,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
 #define SDRAM_MAX_SIZE			0x80000000
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 5e9b314f16..6d5d0b5106 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -11,7 +11,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
@@ -48,7 +47,6 @@
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define SDRAM_MAX_SIZE			0xfe000000
 
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 24bf22cd8e..98295e1747 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -38,7 +38,6 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_PREBOOT
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 1ecc4f7b53..a55dd5e644 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -42,7 +42,6 @@
 /* FAT sd card locations. */
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		1
 #define SDRAM_MAX_SIZE			0xff000000
 
 #define CONFIG_SPI_FLASH
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index a8a12a3eae..eead7b22ce 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -16,7 +16,6 @@
 
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xff000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index fe17975d91..44b5af290d 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -9,7 +9,6 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
@@ -52,7 +51,6 @@
 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_SDRAM_BASE		0
 #define SDRAM_MAX_SIZE			0xf8000000
-#define CONFIG_NR_DRAM_BANKS		1
 
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 12d3609d51..f1b87ffbc4 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -14,6 +14,8 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
+#define CONFIG_NR_DRAM_BANKS		2
+
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 4f3f7a0434..d0afa41a99 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -15,7 +15,6 @@
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define SDRAM_MAX_SIZE			0x80000000
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)

commit 5f601e7c0ecaafb8f7fa25a204f90faf8c3b300b
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 21:00:56 2017 +0800

    rockchip: kylin-rk3036: add README file for OP-TEE support
    
    Detail of step by step to bring up the board with OP-TEE support.
    
    Change-Id: I0d0a1ab8cbe720e35959d6611519f4dfcb51b349
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/board/rockchip/kylin_rk3036/README b/board/rockchip/kylin_rk3036/README
new file mode 100644
index 0000000000..69f20313d0
--- /dev/null
+++ b/board/rockchip/kylin_rk3036/README
@@ -0,0 +1,68 @@
+Get the Source and prebuild binary
+==================================
+
+  > mkdir ~/kylin_rk3036
+  > cd ~/kylin_rk3036
+  > git clone git://git.denx.de/u-boot.git
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
+
+Get the OP-TEE
+===============
+
+  Get tee.bin in this step, copy it to U-Boot root dir:
+  > cp rkbin/rk30/rk3036_tee_v1.00.bin ../u-boot/tee.bin
+
+Compile the U-Boot
+==================
+
+  > cd ../u-boot
+  > export CROSS_COMPILE=arm-linux-gnueabihf-
+  > export ARCH=arm
+  > make kylin-rk3036_defconfig
+  > make
+  > make u-boot.itb
+
+  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
+  > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
+  > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+  > cd ../u-boot
+  > tools/mkimage -n rk3036 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
+  > cat spl/u-boot-spl.bin >> idbloader.img
+
+  Get idbloader.img in this step.
+
+Flash the image to eMMC
+=======================
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > cd ..
+  > rkdeveloptool db rkbin/rk30/rk3036_loader_v1.07.237.bin
+  > rkdeveloptool wl 64 u-boot/idbloader.img
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool rd
+
+Flash the image to SD card
+==========================
+  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
+  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
+
+You should be able to get U-Boot log message with OP-TEE boot info.
+
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option

commit cdfcfbcc927a7d1e7047774c4de2c7c6b029369b
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:54:15 2017 +0800

    rockchip: rk3036: Enable tpl and optee support
    
    Move original spl to tpl, and add spl to load next stage firmware,
    adapt all the address and option for them. Then Enable all the
    options for TPL/SPL and OPTEE.
    
    Change-Id: I44568d84984ca2f4b019fc85e80fbcbaba16fed4
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3d08d9e4dd..bf418da8ab 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -25,7 +25,14 @@ config ROCKCHIP_RK3036
 	bool "Support Rockchip RK3036"
 	select CPU_V7
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select BOARD_LATE_INIT
+	select ROCKCHIP_BROM_HELPER
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	select DEBUG_UART_BOARD_INIT
 	help
 	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 4bf97b7260..9c064ce8e7 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -1,22 +1,42 @@
 CONFIG_ARM=y
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK3036=y
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_STACK=0x10081fff
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_EVB_RK3036=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
 CONFIG_DEBUG_UART=y
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
-# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
@@ -27,17 +47,26 @@ CONFIG_CMD_TIME=y
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
-# CONFIG_SPL_DM_SERIAL is not set
+# CONFIG_TPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
@@ -49,6 +78,12 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x310a
-CONFIG_SPL_TINY_MEMSET=y
 CONFIG_CMD_DHRYSTONE=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index dec941cfd3..8bfd8f46c5 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -1,16 +1,35 @@
 CONFIG_ARM=y
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK3036=y
+CONFIG_TPL_TEXT_BASE=0x10081000
+CONFIG_TPL_STACK=0x10081fff
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_TARGET_KYLIN_RK3036=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk"
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
 # CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
@@ -23,21 +42,28 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_SPL_ISO_PARTITION is not set
-# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
-# CONFIG_SPL_DM_SERIAL is not set
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+# CONFIG_TPL_DM_SERIAL is not set
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
@@ -51,6 +77,10 @@ CONFIG_G_DNL_PRODUCT_NUM=0x310a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
diff --git a/include/configs/evb_rk3036.h b/include/configs/evb_rk3036.h
index aa07889ff2..807bf7ec55 100644
--- a/include/configs/evb_rk3036.h
+++ b/include/configs/evb_rk3036.h
@@ -7,6 +7,37 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/sizes.h>
 #include <configs/rk3036_common.h>
 
+/* Store env in emmc */
+#define CONFIG_SYS_MMC_ENV_DEV          0
+#define CONFIG_SYS_MMC_ENV_PART         0
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
+
+#ifndef CONFIG_SPL_BUILD
+/* Enable gpt partition table */
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
+
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
+
+/* Store env in emmc */
+#define CONFIG_SYS_MMC_ENV_DEV		0 /* emmc */
+#define CONFIG_SYS_MMC_ENV_PART		0 /* user area */
+
+/* Enable atags */
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+#define CONFIG_INITRD_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+
+#endif
+
 #endif
diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index d2d630d610..807bf7ec55 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -10,12 +10,34 @@
 #include <linux/sizes.h>
 #include <configs/rk3036_common.h>
 
+/* Store env in emmc */
+#define CONFIG_SYS_MMC_ENV_DEV          0
+#define CONFIG_SYS_MMC_ENV_PART         0
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 #ifndef CONFIG_SPL_BUILD
+/* Enable gpt partition table */
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
+
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
 /* Store env in emmc */
 #define CONFIG_SYS_MMC_ENV_DEV		0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART		0 /* user area */
 
+/* Enable atags */
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+#define CONFIG_INITRD_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+
 #endif
 
 #endif
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index b655a42c57..ed6770e52d 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -9,16 +9,23 @@
 #include <asm/arch/hardware.h>
 #include "rockchip-common.h"
 
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
-#define CONFIG_SYS_TEXT_BASE		0x60000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
-#define CONFIG_SYS_LOAD_ADDR		0x60800800
-#define CONFIG_SPL_STACK		0x10081fff
-#define CONFIG_SPL_TEXT_BASE		0x10081000
+#define CONFIG_TINY_TPL
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_TEXT_BASE		0x61000000
+#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_LOAD_ADDR		0x61800800
+#define CONFIG_SPL_TEXT_BASE		0x60000000
+
+#define CONFIG_TPL_STACK		0x10081fff
+#define CONFIG_TPL_TEXT_BASE		0x10081000
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK30"
@@ -28,7 +35,7 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
-#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_BANK_SIZE			(512UL << 20UL)
 #define SDRAM_MAX_SIZE                  (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
 

commit 30129f2f83f2d63123c91c28e3d0dd9c759233d5
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Jan 30 13:06:24 2018 +0800

    config: Add CONFIG_TINY_TPL to disable SPL framework at TPL
    
    Some devices cann't use SPL framework at TPL stage, but the
    CONFIG_SPL_FRAMEWORK is still defined at TPL stage, so need
    to separate them with CONFIG_TINY_TPL.
    
    If the SPL framewrok was used both at TPL and SPL stage,
    CONFIG_TINY_TPL is not defined.
    If the SPL framewrok was used at SPL stage, but not use at
    TPL, need to define CONFIG_TINY_TPL.
    
    Change-Id: Iabb7e0377ee00311ca468cb8ff7544c96bd999d6
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index 7b7e336bda..f66bccee2f 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,7 +7,7 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
-#ifndef CONFIG_SPL_FRAMEWORK
+#if !defined(CONFIG_SPL_FRAMEWORK) || defined(CONFIG_TINY_TPL)
 void sdram_init(void);
 #endif
 
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 3c1c603039..f7e1755ea1 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -121,7 +121,7 @@ here:
 
 	bl	c_runtime_cpu_setup	/* we still call old routine here */
 #endif
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FRAMEWORK)
+#if !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TPL_BUILD))
 # ifdef CONFIG_SPL_BUILD
 	/* Use a DRAM stack for the rest of SPL, if requested */
 	bl	spl_relocate_stack_gd
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 12b6149420..d712130d55 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -14,6 +14,7 @@
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
 #include <asm/arch/uart.h>
+#include <asm/arch-rockchip/sys_proto.h>
 
 #ifndef CONFIG_TPL_LIBCOMMON_SUPPORT
 #define CONFIG_SYS_NS16550_COM1 CONFIG_DEBUG_UART_BASE
@@ -70,8 +71,10 @@ __weak int arch_cpu_init(void)
 
 void board_init_f(ulong dummy)
 {
+#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
 	struct udevice *dev;
 	int ret;
+#endif
 
 	rockchip_stimer_init();
 	arch_cpu_init();
@@ -88,28 +91,35 @@ void board_init_f(ulong dummy)
 	debug_uart_init();
 	printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
 				U_BOOT_TIME ")\n");
-
 #endif
+
+#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
 		hang();
 	}
+#endif
 
 	/* Init ARM arch timer */
 	timer_init();
+
+#if defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL)
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);
 		return;
 	}
+#else
+	sdram_init();
+#endif
 
 #if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
 
-#ifndef CONFIG_SPL_FRAMEWORK
+#if !(defined(CONFIG_SPL_FRAMEWORK) && !defined(CONFIG_TINY_TPL))
 /* Place Holders */
 void board_init_r(gd_t *id, ulong dest_addr)
 {
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 3e6f526e37..0be334db2a 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -852,6 +852,11 @@ config TPL_LIBGENERIC_SUPPORT
 	  Enable support for generic U-Boot libraries within TPL. See
 	  SPL_LIBGENERIC_SUPPORT for details.
 
+config TINY_TPL
+	bool "Support not to use spl framework in TPL"
+	help
+	  Enable support for not using spl framework in TPL, to reduce the TPL size.
+
 config TPL_MPC8XXX_INIT_DDR_SUPPORT
 	bool "Support MPC8XXX DDR init"
 	help
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 9918a2e6f1..2267db8801 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -8,8 +8,17 @@
 # Based on common/Makefile.
 #
 
+ifeq ($(CONFIG_TPL_BUILD), y)
+ifndef CONFIG_TINY_TPL
+obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
+endif
+else
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
+endif
+endif
+
+ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
 obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
 obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 64390e5785..0d0426757d 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -64,7 +64,14 @@ HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(srctree)/board/$(VENDOR)/common/Makef
 libs-y += $(if $(BOARDDIR),board/$(BOARDDIR)/)
 libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
 
+ifeq ($(CONFIG_TPL_BUILD),y)
+ifndef CONFIG_TINY_TPL
+libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/
+endif
+else
 libs-$(CONFIG_SPL_FRAMEWORK) += common/spl/
+endif
+
 libs-y += common/init/
 
 # Special handling for a few options which support SPL/TPL
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f22cf55ae3..12430e5d73 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4870,6 +4870,7 @@ CONFIG_TIZEN
 CONFIG_TI_KEYSTONE_SERDES
 CONFIG_TI_KSNAV
 CONFIG_TI_SPI_MMAP
+CONFIG_TINY_TPL
 CONFIG_TMU_TIMER
 CONFIG_TPL_PAD_TO
 CONFIG_TPM_TIS_BASE_ADDRESS

commit 56af001036f56be445970b71f2c47d181bfe8b24
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Jan 30 11:29:31 2018 +0800

    ARM: mach-rockchip: tpl: Add hang() and udelay() for rk3036 tpl usage
    
    If CONFIG_TPL_LIBGENERIC_SUPPORT is not defined, we need to implement
    the hang() and udelay() for complier error.
    
    Change-Id: I43d4d6c55ba893ef554641b3574297c81dd85c93
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index ac071508c9..12b6149420 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -32,6 +32,20 @@ void putc(char c)
 }
 #endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
+#ifndef CONFIG_TPL_LIBGENERIC_SUPPORT
+void udelay(unsigned long usec)
+{
+	__udelay(usec);
+}
+
+void hang(void)
+{
+        bootstage_error(BOOTSTAGE_ID_NEED_RESET);
+        for (;;)
+                ;
+}
+#endif
+
 u32 spl_boot_device(void)
 {
 	return BOOT_DEVICE_BOOTROM;

commit 51b91a9708f494e4871f7167a66fc64345968925
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Jan 30 11:45:51 2018 +0800

    ARM: mach-rockchip: tpl: Change the LIBCOMMON_SUPPORT config from SPL to TPL
    
    Also we need to define the CONFIG_SYS_NS16550_COM1 compilering warning.
    
    Change-Id: Ib2069820c396d48d70e013cc86bb987822b064cb
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 85e5416997..ac071508c9 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -15,7 +15,8 @@
 #include <asm/arch/bootrom.h>
 #include <asm/arch/uart.h>
 
-#ifndef CONFIG_SPL_LIBCOMMON_SUPPORT
+#ifndef CONFIG_TPL_LIBCOMMON_SUPPORT
+#define CONFIG_SYS_NS16550_COM1 CONFIG_DEBUG_UART_BASE
 void puts(const char *str)
 {
 	while (*str)
@@ -29,7 +30,7 @@ void putc(char c)
 
 	NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), c);
 }
-#endif /* CONFIG_SPL_LIBCOMMON_SUPPORT */
+#endif /* CONFIG_TPL_LIBCOMMON_SUPPORT */
 
 u32 spl_boot_device(void)
 {

commit d975296c8fbbdfdfdcb985d3ffc3da7e9ad8bec7
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:36:00 2017 +0800

    rockchip: rk3036: Add some devices with dm-pre-reloc property
    
    Enable cru, emmc, dmc devices' pre-relocate property for usage.
    
    Change-Id: I297488f90f73f012feeb9e9aea3fb2e955b9ec0a
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3036-sdk-u-boot.dtsi b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
index 6f15f4a8ec..51ee4a6e54 100644
--- a/arch/arm/dts/rk3036-sdk-u-boot.dtsi
+++ b/arch/arm/dts/rk3036-sdk-u-boot.dtsi
@@ -1,4 +1,12 @@
-&uart2 {
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
 	u-boot,dm-pre-reloc;
 };
 
@@ -9,3 +17,7 @@
 &pinctrl {
 	u-boot,dm-pre-reloc;
 };
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index ca8f1e8e8d..4a78bb5010 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -109,6 +109,11 @@
 		assigned-clock-rates = <594000000>;
 	};
 
+	dmc: dmc@20004000 {
+		compatible = "rockchip,rk3036-dmc", "syscon";
+		reg = <0x0 0x20004000 0x0 0x1000>;
+	};
+
 	uart0: serial@20060000 {
 		compatible = "rockchip,rk3036-uart", "snps,dw-apb-uart";
 		reg = <0x20060000 0x100>;

commit 00fbb281ed61d719b345bb31b96d3bcd0f3f87ef
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:29:33 2017 +0800

    rockchip: clk: rk3036: Add power down and power up for pll set
    
    If power down and power up were not done, there was an error during
    pll setting again.
    
    Change-Id: Iaa5ef558c2bff270614f08d96a70e5c847ce927c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index 22278e11ac..ca60507617 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -75,6 +75,8 @@ enum {
 
 	/* PLLCON1 */
 	PLL_RST_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
 	PLL_DSMPD_SHIFT		= 12,
 	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
 	PLL_LOCK_STATUS_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 35b93d2341..ab3154c554 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -64,6 +64,9 @@ static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
 		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
@@ -71,6 +74,9 @@ static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
 		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
 		     div->refdiv << PLL_REFDIV_SHIFT));
 
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
 	/* waiting for pll lock */
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
 		udelay(1);

commit 17dbd5695b1d03dd43f3273062b7dc178c1495c0
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 20:11:05 2017 +0800

    rockchip: rk3036: Make the syscon build for spl usage
    
    Change the Make file to make rk3036_syscon built-in for
    spl usage, but tpl not need to use it.
    
    Change-Id: I6dd2b33e223a9854d0731ecc8c5b4b408a070d2e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile
index 8a144d1f9e..4c523993a2 100644
--- a/arch/arm/mach-rockchip/rk3036/Makefile
+++ b/arch/arm/mach-rockchip/rk3036/Makefile
@@ -6,7 +6,7 @@
 
 obj-y += rk3036.o clk_rk3036.o
 
-ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_TPL_BUILD
 obj-y += syscon_rk3036.o
 endif
 

commit 32ff46e2cedb5304cdc8d01c143a1f1748a2dd7e
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Dec 19 11:24:20 2017 +0800

    rockchip: rk3036: Add sdram uclass driver
    
    This patch is for the implement of common interface, which get the
    sdram info for rk3036, just need to get the sdram info from OS_REG
    that has been written already.
    
    Change-Id: I56fdebead092bf3bb649809203d076d11a9ff890
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 80262836a9..674a58cc77 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,6 +6,7 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
+obj-$(CONFIG_ROCKCHIP_RK3036) = sdram_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rk3036.c b/drivers/ram/rockchip/sdram_rk3036.c
new file mode 100644
index 0000000000..44c6a1c949
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3036.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3036.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+	struct ram_info info;
+	struct rk3036_grf *grf;
+};
+
+static int rk3036_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: grf=%p\n", __func__, priv->grf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->grf->os_reg[1]);
+
+	return 0;
+}
+
+static int rk3036_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3036_dmc_ops = {
+	.get_info = rk3036_dmc_get_info,
+};
+
+static const struct udevice_id rk3036_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3036-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3036) = {
+	.name = "rockchip_rk3036_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3036_dmc_ids,
+	.ops = &rk3036_dmc_ops,
+	.probe = rk3036_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit bb8e4ec3d9946dce300038005cb1764a4a3b4ed0
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Mar 21 15:21:30 2018 +0800

    clk: rockchip: Get cru's reg address before probe for rk3036
    
    The assigned clock-rate and clock-parent is done before probe,
    so it is better to get cru's reg address at ofdata_to_platdata
    before probe, otherwise there is a error to use cru's red address.
    
    Change-Id: I7af5faa931352a4ee4a495efa9b80c95066eb5c5
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 761f032d81..35b93d2341 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -317,11 +317,19 @@ static struct clk_ops rk3036_clk_ops = {
 	.set_rate	= rk3036_clk_set_rate,
 };
 
+static int rk3036_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk3036_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
 static int rk3036_clk_probe(struct udevice *dev)
 {
 	struct rk3036_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3036_cru *)devfdt_get_addr(dev);
 	rkclk_init(priv->cru);
 
 	return 0;
@@ -373,6 +381,7 @@ U_BOOT_DRIVER(rockchip_rk3036_cru) = {
 	.id		= UCLASS_CLK,
 	.of_match	= rk3036_clk_ids,
 	.priv_auto_alloc_size = sizeof(struct rk3036_clk_priv),
+	.ofdata_to_platdata = rk3036_clk_ofdata_to_platdata,
 	.ops		= &rk3036_clk_ops,
 	.bind		= rk3036_clk_bind,
 	.probe		= rk3036_clk_probe,

commit e0347805d052d61e7ec48c75341cd4c67621add6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Mar 26 11:39:56 2018 +0800

    cockchip: bootcmd: do not detect dev type in bootcmd
    
    We should already set boot devtype and devnum in getting resource
    for kernel dtb or display logos, no need do it one more time.
    
    Change-Id: I88b2e552a0a6b216eec81bcbcf06bfa6b25f7671
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 1f9d8411bc..12d3609d51 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -83,9 +83,7 @@
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
 #define RKIMG_BOOTCOMMAND \
-	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \
-	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;" \
-	"fi; boot_android ${devtype} ${devnum};" \
+	"boot_android ${devtype} ${devnum};" \
 	"bootrkp;"
 
 #endif

commit 0a2f04e67445c592efb78d9f9abdf4d7aefa77d0
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Mar 28 14:11:48 2018 +0800

    arm: dts: rk3308: set u-boot,dm-pre-reloc for uart2
    
    We use dt-spl.dtb for serial_init when CONFIG_USING_KERNEL_DTB
    is enabled, so set the debug console uart2 on RK3308 EVB
    as u-boot,dm-pre-reloc to make sure it will builtin dt-spl.dtb.
    
    Also move it from board dts to board-u-boot.dtsi, as it's u-boot
    specific.
    
    Change-Id: I088f7e20bb91cd3f1337b099dfccdb76fccabf1c
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index aa7600fbe2..d21681348e 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -16,3 +16,8 @@
 	u-boot,dm-pre-reloc;
 };
 
+&uart2 {
+	u-boot,dm-pre-reloc;
+	clock-frequency = <24000000>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 2f231b31c5..b787ef8687 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -99,11 +99,6 @@
 	status = "okay";
 };
 
-&uart2 {
-	clock-frequency = <24000000>;
-	status = "okay";
-};
-
 &u2phy {
 	status = "okay";
 };

commit 88a1f7ffcec9770f7d136c90d6bce84ba38b62cf
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Mar 27 11:04:46 2018 +0800

    pinctrl: rockchip: Fix the reg offset of rk3308
    
    Change-Id: I4f57f5eed807a60abfe4189b93a667ce13314f2c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index ae7ab2e697..36b06c508d 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2130,7 +2130,8 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *d
 			 * 4bit iomux'es are spread over two registers.
 			 */
 			inc = (iom->type & (IOMUX_WIDTH_4BIT |
-					    IOMUX_WIDTH_3BIT)) ? 8 : 4;
+					    IOMUX_WIDTH_3BIT |
+					    IOMUX_8WIDTH_2BIT)) ? 8 : 4;
 			if (iom->type & IOMUX_SOURCE_PMU)
 				pmu_offs += inc;
 			else

commit 868bdcf3832c84e5ea62030311bd0c9ac733f750
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Mar 25 11:49:34 2018 +0800

    regulator: rk8xx: add ops->set_ramp_delay() implement
    
    Change-Id: I8c7b7fad8c966d2fff8e2b0cf80ff59b6f70b57b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index aace8ae280..f3f9620280 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -41,6 +41,7 @@
 #define RK817_BUCK_ON_VSEL(n)		(0xbb + 3 * (n - 1))
 #define RK817_BUCK_SLP_VSEL(n)		(0xbc + 3 * (n - 1))
 #define RK817_BUCK_VSEL_MASK		0x7f
+#define RK817_BUCK_CONFIG(i)		(0xba + (i) * 3)
 
 /* RK817 LDO */
 #define RK817_LDO_ON_VSEL(n)		(0xcc + 2 * (n - 1))
@@ -51,69 +52,94 @@
 #define RK817_POWER_EN(n)		(0xb1 + (n))
 #define RK817_POWER_SLP_EN(n)		(0xb5 + (n))
 
+/*
+ * Ramp delay
+ */
+#define RK805_RAMP_RATE_OFFSET		3
+#define RK805_RAMP_RATE_MASK		(3 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_3MV_PER_US	(0 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_6MV_PER_US	(1 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_12_5MV_PER_US	(2 << RK805_RAMP_RATE_OFFSET)
+#define RK805_RAMP_RATE_25MV_PER_US	(3 << RK805_RAMP_RATE_OFFSET)
+
+#define RK808_RAMP_RATE_OFFSET		3
+#define RK808_RAMP_RATE_MASK		(3 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_2MV_PER_US	(0 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_4MV_PER_US	(1 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_6MV_PER_US	(2 << RK808_RAMP_RATE_OFFSET)
+#define RK808_RAMP_RATE_10MV_PER_US	(3 << RK808_RAMP_RATE_OFFSET)
+
+#define RK817_RAMP_RATE_OFFSET		6
+#define RK817_RAMP_RATE_MASK		(0x3 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_3MV_PER_US	(0x0 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_6_3MV_PER_US	(0x1 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_12_5MV_PER_US	(0x2 << RK817_RAMP_RATE_OFFSET)
+#define RK817_RAMP_RATE_25MV_PER_US	(0x3 << RK817_RAMP_RATE_OFFSET)
+
 struct rk8xx_reg_info {
 	uint min_uv;
 	uint step_uv;
 	u8 vsel_reg;
 	u8 vsel_sleep_reg;
+	u8 config_reg;
 	u8 vsel_mask;
 	u8 min_sel;
 };
 
 static const struct rk8xx_reg_info rk808_buck[] = {
-	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, RK808_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_buck[] = {
 	/* buck 1 */
-	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
-	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
+	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 2 */
-	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
-	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
+	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 3 */
-	{ 712500, 12500, -1, -1, RK818_BUCK_VSEL_MASK, },
+	{ 712500, 12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */
-	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk809_buck5[] = {
 	/* buck 5 */
-	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x00, },
-	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x01, },
-	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x04, },
-	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x06, },
+	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x01, },
+	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x04, },
+	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), -1, RK809_BUCK5_VSEL_MASK, 0x06, },
 };
 
 static const struct rk8xx_reg_info rk817_buck[] = {
 	/* buck 1 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, },
 	/* buck 2 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, },
 	/* buck 3 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x59, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, },
 	/* buck 4 */
-	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x00, },
-	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x50, },
-	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x63, },
+	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, },
 };
 
 static const struct rk8xx_reg_info rk818_buck[] = {
-	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500,   12500, -1, -1, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
 };
 
 #ifdef ENABLE_DRIVER
@@ -389,6 +415,89 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 	return ret & mask ? true : false;
 }
 
+static int _buck_set_ramp_delay(struct udevice *pmic, int buck, u32 ramp_delay)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, 0);
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	u32 ramp_value, ramp_mask;
+
+	if (info->config_reg == -1)
+		return -ENOSYS;
+
+	switch (priv->variant) {
+	case RK805_ID:
+		ramp_mask = RK805_RAMP_RATE_MASK;
+		ramp_value = RK805_RAMP_RATE_12_5MV_PER_US;
+		switch (ramp_delay) {
+		case 0 ... 3000:
+			ramp_value = RK805_RAMP_RATE_3MV_PER_US;
+			break;
+		case 3001 ... 6000:
+			ramp_value = RK805_RAMP_RATE_6MV_PER_US;
+			break;
+		case 6001 ... 12500:
+			ramp_value = RK805_RAMP_RATE_12_5MV_PER_US;
+			break;
+		case 12501 ... 25000:
+			ramp_value = RK805_RAMP_RATE_25MV_PER_US;
+			break;
+		default:
+			printf("buck%d ramp_delay: %d not supported\n",
+			       buck, ramp_delay);
+		}
+		break;
+	case RK808_ID:
+	case RK816_ID:
+	case RK818_ID:
+		ramp_value = RK808_RAMP_RATE_6MV_PER_US;
+		ramp_mask = RK808_RAMP_RATE_MASK;
+		switch (ramp_delay) {
+		case 1 ... 2000:
+			ramp_value = RK808_RAMP_RATE_2MV_PER_US;
+			break;
+		case 2001 ... 4000:
+			ramp_value = RK808_RAMP_RATE_4MV_PER_US;
+			break;
+		case 4001 ... 6000:
+			ramp_value = RK808_RAMP_RATE_6MV_PER_US;
+			break;
+		case 6001 ... 10000:
+			ramp_value = RK808_RAMP_RATE_6MV_PER_US;
+			break;
+		default:
+			printf("buck%d ramp_delay: %d not supported\n",
+			       buck, ramp_delay);
+		}
+		break;
+	case RK809_ID:
+	case RK817_ID:
+		ramp_mask = RK817_RAMP_RATE_MASK;
+		ramp_value = RK817_RAMP_RATE_12_5MV_PER_US;
+		switch (ramp_delay) {
+		case 0 ... 3000:
+			ramp_value = RK817_RAMP_RATE_3MV_PER_US;
+			break;
+		case 3001 ... 6300:
+			ramp_value = RK817_RAMP_RATE_6_3MV_PER_US;
+			break;
+		case 6301 ... 12500:
+			ramp_value = RK817_RAMP_RATE_12_5MV_PER_US;
+			break;
+		case 12501 ... 25000:
+			ramp_value = RK817_RAMP_RATE_12_5MV_PER_US;
+			break;
+		default:
+			printf("buck%d ramp_delay: %d not supported\n",
+			       buck, ramp_delay);
+		}
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return pmic_clrsetbits(pmic, info->config_reg, ramp_mask, ramp_value);
+}
+
 static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask;
@@ -628,6 +737,13 @@ static int buck_set_suspend_enable(struct udevice *dev, bool enable)
 	return _buck_set_suspend_enable(dev->parent, buck, enable);
 }
 
+static int buck_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_ramp_delay(dev->parent, buck, ramp_delay);
+}
+
 static int buck_get_enable(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -850,6 +966,7 @@ static const struct dm_regulator_ops rk8xx_buck_ops = {
 	.get_enable = buck_get_enable,
 	.set_enable = buck_set_enable,
 	.set_suspend_enable = buck_set_suspend_enable,
+	.set_ramp_delay = buck_set_ramp_delay,
 };
 
 static const struct dm_regulator_ops rk8xx_ldo_ops = {

commit b29e2b63a97e1c5ad7b34ab58189d319bfc3d854
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Mar 25 11:13:12 2018 +0800

    dm: regulator: add "regulator-ramp-delay" support
    
    Change-Id: Ic5bc78b2688b88d726c54dfff4f790746d92966b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 6783ac43e1..b4e91251de 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -42,6 +42,8 @@ int regulator_set_value(struct udevice *dev, int uV)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	u32 old_uV = -ENODATA, us;
+	int ret;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 	if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
@@ -52,7 +54,24 @@ int regulator_set_value(struct udevice *dev, int uV)
 	if (!ops || !ops->set_value)
 		return -ENOSYS;
 
-	return ops->set_value(dev, uV);
+	if (uc_pdata->ramp_delay != -ENODATA) {
+		if (!ops->get_value)
+			return -ENOSYS;
+		old_uV = ops->get_value(dev);
+		if (old_uV < 0)
+			return -EINVAL;
+	}
+
+	ret = ops->set_value(dev, uV);
+
+	if (!ret && (old_uV != -ENODATA) && (old_uV != uV)) {
+		us = DIV_ROUND_UP(abs(uV - old_uV), uc_pdata->ramp_delay);
+		udelay(us);
+		debug("%s: ramp=%d, old_uV=%d, uV=%d, us=%d\n",
+		      uc_pdata->name, uc_pdata->ramp_delay, old_uV, uV, us);
+	}
+
+	return ret;
 }
 
 int regulator_set_suspend_value(struct udevice *dev, int uV)
@@ -136,6 +155,16 @@ int regulator_set_suspend_enable(struct udevice *dev, bool enable)
 	return ops->set_suspend_enable(dev, enable);
 }
 
+int regulator_set_ramp_delay(struct udevice *dev, u32 ramp_delay)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_ramp_delay)
+		return -ENOSYS;
+
+	return ops->set_ramp_delay(dev, ramp_delay);
+}
+
 int regulator_get_mode(struct udevice *dev)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
@@ -202,6 +231,9 @@ int regulator_autoset(struct udevice *dev)
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 
+	if (uc_pdata->ramp_delay != -ENODATA)
+		regulator_set_ramp_delay(dev, uc_pdata->ramp_delay);
+
 	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
 	if (!ret && uc_pdata->suspend_on)
 		ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
@@ -352,7 +384,8 @@ static int regulator_pre_probe(struct udevice *dev)
 						-ENODATA);
 	uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on");
 	uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on");
-
+	uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay",
+						    -ENODATA);
 	node = dev_read_subnode(dev, "regulator-state-mem");
 	if (ofnode_valid(node)) {
 		uc_pdata->suspend_on = !ofnode_read_bool(node, "regulator-off-in-suspend");
diff --git a/include/power/regulator.h b/include/power/regulator.h
index ef0c88414a..a442d885bb 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -179,6 +179,7 @@ struct dm_regulator_uclass_platdata {
 	u8 volt_reg;
 	bool suspend_on;
 	u32 suspend_uV;
+	u32 ramp_delay;
 };
 
 /* Regulator device operations */
@@ -237,6 +238,15 @@ struct dm_regulator_ops {
 	 */
 	int (*get_mode)(struct udevice *dev);
 	int (*set_mode)(struct udevice *dev, int mode_id);
+
+	/**
+	 * The regulator voltage set ramp delay
+	 *
+	 * @dev            - regulator device
+	 * @ramp_delay     - ramp delay [uV/uS]
+	 * @return zero on success and other failed.
+	 */
+	int (*set_ramp_delay)(struct udevice *dev, u32 ramp_delay);
 };
 
 /**

commit f2d1698c736d12d18f06085a4bf7d96f43833111
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 26 18:02:23 2018 +0800

    autoboot: only allow ctrl+c to abort bootcmd
    
    It works only for rockchip platforms.
    
    Change-Id: I67e7d9ab625b7667ec411347249582ed9537686c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/autoboot.c b/common/autoboot.c
index a011865028..f201a95cfa 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -219,10 +219,14 @@ static int __abortboot(int bootdelay)
 	printf("Hit any key to stop autoboot: %2d ", bootdelay);
 #endif
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	if (ctrlc()) {	/* we press ctrl+c ? */
+#else
 	/*
 	 * Check if key already pressed
 	 */
 	if (tstc()) {	/* we got a key press	*/
+#endif
 		(void) getc();  /* consume input	*/
 		puts("\b\b\b 0");
 		abort = 1;	/* don't auto boot	*/

commit 2edb2ea41c615d9df440095ce4bd20fbcbc4ea88
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 26 20:30:20 2018 +0800

    arm: rockchip: rk3308: remove debug_uart_init
    
    This is not necessary as we bringup this processor
    successfully now.
    
    Change-Id: I47c1ee4f67fbf8b391a00b3d8ccf8ea21efefacb
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index a59d523e09..238f4ae2b7 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -71,15 +71,6 @@ enum {
 	UART2_IO_SEL_USB,
 };
 
-int arch_cpu_init(void)
-{
-	debug_uart_init();
-
-	printascii("U-Boot rk3308\n");
-
-	return 0;
-}
-
 void board_debug_uart_init(void)
 {
 	static struct rk3308_grf * const grf = (void *)GRF_BASE;

commit 8e7cd09f334740af888fd5f78259984f9aa5e77f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 26 20:24:32 2018 +0800

    arm: rockchip: rk3308: don't touch the iomux of gpio1c7 & gpio1c6
    
    The default function of gpio1c7 & gpio1c6 is jtag, it's
    better to keep it as it was when system startup.
    
    Change-Id: If4d8df43f55315d76338c339f66f19590106e22c
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 3642a861f5..a59d523e09 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -87,9 +87,6 @@ void board_debug_uart_init(void)
 	/* Enable early UART2 channel m1 on the rk3308 */
 	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
 		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio1ch_iomux, GPIO1C7_MASK | GPIO1C6_MASK,
-		      GPIO1C7_GPIO << GPIO1C7_SHIFT |
-		      GPIO1C6_GPIO << GPIO1C6_SHIFT);
 	rk_clrsetreg(&grf->gpio4d_iomux,
 		     GPIO4D3_MASK | GPIO4D2_MASK,
 		     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |

commit 79244e4cb1a2e4400498c1f1bf7b4e41c6090735
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 20 20:32:52 2018 +0800

    power: charge animation: imporve extrem low power charge
    
    Change-Id: I46203712e2aa02e04d645b660ea51811e7430821
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 82d8e3b73a..2b374f2364 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -180,6 +180,41 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 	return 0;
 }
 
+static void timer_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	static long long count;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+
+	priv->auto_wakeup_key_state = KEY_PRESS_DOWN;
+	printf("auto wakeup count: %lld\n", ++count);
+}
+
+static void autowakeup_timer_init(struct udevice *dev, uint32_t seconds)
+{
+	uint64_t period = 24000000ULL * seconds;
+
+	/* Disable before conifg */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
+	writel((uint32_t)period, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel((uint32_t)(period >> 32), TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* IRQ */
+	irq_install_handler(TIMER_IRQ, timer_irq_handler, dev);
+	irq_handler_enable(TIMER_IRQ);
+}
+
+static void autowakeup_timer_uninit(void)
+{
+	irq_free_handler(TIMER_IRQ);
+}
+
 #ifdef CONFIG_DRM_ROCKCHIP
 static void charge_show_bmp(const char *name)
 {
@@ -202,6 +237,7 @@ static int charge_extrem_low_power(struct udevice *dev)
 	struct udevice *pmic = priv->pmic;
 	struct udevice *fg = priv->fg;
 	int voltage, soc, charging = 1;
+	static int timer_initialized;
 
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0)
@@ -211,10 +247,10 @@ static int charge_extrem_low_power(struct udevice *dev)
 		/* Check charger online */
 		charging = fuel_gauge_get_chrg_online(fg);
 		if (charging <= 0) {
-			printf("Not charging, online=%d. Shutdown...\n",
-			       charging);
+			printf("%s: Not charging, online=%d. Shutdown...\n",
+			       __func__, charging);
 			/* wait uart flush before shutdown */
-			mdelay(500);
+			mdelay(5);
 			/* PMIC shutdown */
 			pmic_shutdown(pmic);
 
@@ -222,6 +258,12 @@ static int charge_extrem_low_power(struct udevice *dev)
 			continue;
 		}
 
+		/* Enable auto wakeup */
+		if (!timer_initialized) {
+			timer_initialized = 1;
+			autowakeup_timer_init(dev, 5);
+		}
+
 		/*
 		 * Just for fuel gauge to update something important,
 		 * including charge current, coulometer or other.
@@ -246,43 +288,9 @@ static int charge_extrem_low_power(struct udevice *dev)
 		}
 	}
 
-	return 0;
-}
-
-static void timer_irq_handler(int irq, void *data)
-{
-	struct udevice *dev = data;
-	struct charge_animation_priv *priv = dev_get_priv(dev);
-	static long long count;
-
-	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
-
-	priv->auto_wakeup_key_state = KEY_PRESS_DOWN;
-	printf("auto wakeup count: %lld\n", ++count);
-}
-
-static void autowakeup_timer_init(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-	uint64_t period = 24000000ULL * (pdata->auto_wakeup_interval);
-
-	/* Disable before conifg */
-	writel(0, TIMER_BASE + TIMER_CTRL);
-
-	/* Config */
-	writel((uint32_t)period, TIMER_BASE + TIMER_LOAD_COUNT0);
-	writel((uint32_t)(period >> 32), TIMER_BASE + TIMER_LOAD_COUNT1);
-	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
-	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
-
-	/* IRQ */
-	irq_install_handler(TIMER_IRQ, timer_irq_handler, dev);
-	irq_handler_enable(TIMER_IRQ);
-}
+	autowakeup_timer_uninit();
 
-static void autowakeup_timer_uninit(void)
-{
-	irq_free_handler(TIMER_IRQ);
+	return 0;
 }
 
 static int charge_animation_show(struct udevice *dev)
@@ -368,7 +376,7 @@ static int charge_animation_show(struct udevice *dev)
 	/* Auto wakeup */
 	if (pdata->auto_wakeup_interval) {
 		printf("Auto wakeup: %dS\n", pdata->auto_wakeup_interval);
-		autowakeup_timer_init(dev);
+		autowakeup_timer_init(dev, pdata->auto_wakeup_interval);
 	}
 
 	printf("Enter U-Boot charging mode\n");
@@ -386,7 +394,7 @@ static int charge_animation_show(struct udevice *dev)
 			       charging);
 
 			/* wait uart flush before shutdown */
-			mdelay(500);
+			mdelay(5);
 
 			/* PMIC shutdown */
 			pmic_shutdown(pmic);
@@ -621,7 +629,7 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->fg = fg;
 
-	/* Get PWRKEY: used for wakeup and trun off/on LCD */
+	/* Get PWRKEY: used for wakeup and turn off/on LCD */
 	ret = platform_key_read(KEY_POWER);
 	if (ret == KEY_NOT_EXIST) {
 		printf("Can't find power key\n");

commit df8136f045f953bcfff817c13ef8182f09330e67
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 23 19:38:24 2018 +0800

    arm: dts: rockchip: Add recovery key support for rk3308-evb
    
    According to the hardware, the recovery key is conected to
    the saradc channel0.
    
    Change-Id: I9a1c2c49567da612b627f54ef84fbbf9be739b95
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index d0a20190f4..2f231b31c5 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -16,7 +16,21 @@
 		stdout-path = "serial2:1500000n8";
 	};
 
-	adc-keys {
+	adc-keys0 {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <18000>;
+		};
+	};
+
+	adc-keys1 {
 		compatible = "adc-keys";
 		io-channels = <&saradc 1>;
 		io-channel-names = "buttons";
@@ -50,7 +64,7 @@
 		vol-up-key {
 			linux,code = <KEY_VOLUMEUP>;
 			label = "volume up";
-			press-threshold-microvolt = <180000>;
+			press-threshold-microvolt = <18000>;
 		};
 	};
 

commit 5a6ccfef5ba6d9dfdb3697729e2434e646fca963
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 20:07:05 2018 +0800

    configs: rockchip: disable fastboot for rk3308 evb
    
    Change-Id: Ic393febc7a12d7b3a304a1ffd2437f47737e8d45
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index a87affc504..c1ef8cf6cf 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -14,10 +14,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_BOOT_ROCKCHIP=y

commit 9717771c04b65e44374c2e37c0f69b7f1f2e8bd2
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 20:06:07 2018 +0800

    arm: dts: rockchip: enable pwm regulator for rk3308 evb
    
    RK3308 EVB uses pwm0 modulates the arm core voltage, so
    enable pwm regulator here.
    
    Change-Id: I8e2b88b4d947fe40835952eb2278cecbf64d293e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 524a128d02..d0a20190f4 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -54,6 +54,18 @@
 		};
 	};
 
+	vdd_log: vdd_core: vdd-core {
+		compatible = "pwm-regulator";
+		pwms = <&pwm0 0 5000 1>;
+		regulator-name = "vdd_core";
+		regulator-min-microvolt = <847000>;
+		regulator-max-microvolt = <1366000>;
+		regulator-init-microvolt  = <1044000>;
+		regulator-always-on;
+		regulator-boot-on;
+		status = "okay";
+	};
+
 };
 
 &emmc {
@@ -65,6 +77,10 @@
 	status = "okay";
 };
 
+&pwm0 {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };

commit a227d0b47a640004c25f714bb710ce912bb69787
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 20:05:31 2018 +0800

    arm: dts: rockchip: add pwm dt node for rk3308
    
    Add pwm device tree node for rk3308 SOC.
    
    Change-Id: If8342b81330cfd27f3316e092e1bd2a9b459631e
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index e1588d55e0..0662bd0b71 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -164,6 +164,50 @@
 		status = "disabled";
 	};
 
+	pwm0: pwm@ff180000 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff180010 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff180020 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff180030 {
+		compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff180030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "active";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
 	saradc: saradc@ff1e0000 {
 		compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff1e0000 0x0 0x100>;

commit b33ebddfc88565975ea3dfa5b425f2aa45f2da80
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Mar 23 19:57:02 2018 +0800

    power: pwm regulator: support live tree
    
    Use live tree compatible api for pwm regulator.
    
    Change-Id: Id12c96c0631b6d963d663ef83e3df50abef5e827
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index b63f941990..29bceb5858 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -13,9 +13,6 @@
 #include <errno.h>
 #include <pwm.h>
 #include <power/regulator.h>
-#include <libfdt.h>
-#include <fdt_support.h>
-#include <fdtdec.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -94,13 +91,10 @@ static int pwm_regulator_set_voltage(struct udevice *dev, int uvolt)
 static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 {
 	struct pwm_regulator_info *priv = dev_get_priv(dev);
-	struct fdtdec_phandle_args args;
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
+	struct ofnode_phandle_args args;
 	int ret;
 
-	ret = fdtdec_parse_phandle_with_args(blob, node, "pwms", "#pwm-cells",
-					     0, 0, &args);
+	ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, &args);
 	if (ret) {
 		debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret);
 		return ret;
@@ -109,14 +103,13 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
 	priv->period_ns = args.args[1];
 	priv->polarity = args.args[2];
 
-	priv->init_voltage = fdtdec_get_int(blob, node,
-			"regulator-init-microvolt", -1);
+	priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
 	if (priv->init_voltage < 0) {
 		printf("Cannot find regulator pwm init_voltage\n");
 		return -EINVAL;
 	}
 
-	ret = uclass_get_device_by_of_offset(UCLASS_PWM, args.node, &priv->pwm);
+	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);
 	if (ret) {
 		debug("%s: Cannot get PWM: ret=%d\n", __func__, ret);
 		return ret;

commit 7c3376860940f10727dd92a4b1173dcae36df91e
Author: Meng Dongyang <daniel.meng@rock-chips.com>
Date:   Fri Mar 23 20:57:40 2018 +0800

    arm: rockchip: rk3308: add DT of usb controller and enable usb
    
    Add DT of DWC2 EHCI and OHCI controller and enable them.
    
    Change-Id: Iedeeebe33f5f3e5616a43fb376e264cc2c46e40e
    Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>

diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 6af645f1cc..524a128d02 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -73,3 +73,27 @@
 	clock-frequency = <24000000>;
 	status = "okay";
 };
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb20_otg {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index abf8cf01dd..e1588d55e0 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -93,6 +93,44 @@
 		reg = <0x0 0xff000000 0x0 0x10000>;
 	};
 
+	usb2phy_grf: syscon@ff008000 {
+		compatible = "rockchip,rk3308-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xff008000 0x0 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,rk3308-usb2phy",
+				     "rockchip,rk3328-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&cru SCLK_USBPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			clock-output-names = "usb480m_phy";
+			status = "disabled";
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+		};
+	};
+
 	uart0: serial@ff0a0000 {
 		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
 		reg = <0x0 0xff0a0000 0x0 0x100>;
@@ -169,6 +207,46 @@
 		rockchip,mode = <0>;
 	};
 
+	usb20_otg: usb@ff400000 {
+		compatible = "rockchip,rk3308-usb", "rockchip,rk3066-usb",
+			     "snps,dwc2";
+		reg = <0x0 0xff400000 0x0 0x40000>;
+		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG>;
+		clock-names = "otg";
+		dr_mode = "otg";
+		g-np-tx-fifo-size = <16>;
+		g-rx-fifo-size = <275>;
+		g-tx-fifo-size = <256 128 128 64 64 32>;
+		g-use-dma;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
+		status = "disabled";
+	};
+
+	usb_host0_ehci: usb@ff440000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xff440000 0x0 0x10000>;
+		interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ff450000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xff450000 0x0 0x10000>;
+		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+	};
+
 	sdmmc: dwmmc@ff480000 {
 		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff480000 0x0 0x4000>;

commit 9064e0be0b0c358f4dee7a22188011a0d4921fc7
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 23 21:43:33 2018 +0800

    clk: rockchip: rk3308: Delete DEBUG
    
    Change-Id: Ie4a3c3d37e464ac89a2b0e7990ec2760996e813f
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 6004f6e32b..98f4e68a5a 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -3,7 +3,6 @@
  *
  * SPDX-License-Identifier:	GPL-2.0
  */
-#define DEBUG
 #include <common.h>
 #include <bitfield.h>
 #include <clk-uclass.h>

commit ceb961ad05a1518b0a9b0df8273e647db65ff198
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Mar 23 21:42:19 2018 +0800

    clk: rockchip: rk3308: Fix cpu clock error
    
    Change-Id: I89f6f14fef0bb5222ec098f4afa71fed66ee1b83
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 74e03e66ef..6004f6e32b 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -156,14 +156,14 @@ static void rkclk_init(struct rk3308_cru *cru)
 	 * set up dependent divisors for PCLK and ACLK clocks.
 	 * core hz : apll = 1:1
 	 */
-	apll_hz = rkclk_pll_get_rate(cru, DPLL);
+	apll_hz = rkclk_pll_get_rate(cru, APLL);
 	aclk_div = apll_hz / CORE_ACLK_HZ - 1;
 	pclk_div = apll_hz / CORE_DBG_HZ - 1;
 	rk_clrsetreg(&cru->clksel_con[0],
 		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
 		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_DIV_CON_SHIFT |
+		     pclk_div << CORE_DBG_DIV_SHIFT |
 		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
 		     0 << CORE_DIV_CON_SHIFT);
 

commit a6bee18f07bf050c92982cb649de7ff16724c866
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Mar 22 20:51:58 2018 +0800

    lib: optee_client: fix bug of rk file system
    
    fix bug which make error when we try to create
    a new file, old file should be delete, but old
    file which fd equal to zero is exist!
    
    Change-Id: I602e889ae12756c0c40e409d6439ac36cc1b5382
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
index f771116fbc..53cb8f16cf 100644
--- a/lib/optee_clientApi/OpteeClientRkFs-v2.c
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -298,7 +298,7 @@ static int rkss_verify_ptable(struct rk_secure_storage *rkss)
 	if (verify->version != RKSS_VERSION
 			|| verify->checkstr != RKSS_CHECK_STR) {
 		printf("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		memset(rkss->data, 0, RKSS_DATA_LEN);
 		verify->checkstr = RKSS_CHECK_STR;
 		verify->version = RKSS_VERSION;
 		ret = rkss_write_section(rkss);
@@ -769,7 +769,7 @@ static TEEC_Result ree_fs_new_create(size_t num_params,
 
 	debug("ree_fs_new_create create file: %s, len: %lu \n", filename, strlen(filename));
 	fd = rkss_get_fileinfo_by_name(filename, &p);
-	if (fd > 0) {
+	if (fd >= 0) {
 		debug("ree_fs_new_create : file exist, clear it. %s", filename);
 		/* decrease ref from usedflags */
 		num = p.size / RKSS_DATA_LEN + 1;
@@ -1211,6 +1211,7 @@ int tee_supp_rk_fs_init(void)
 	/* clean secure storage*/
 #ifdef DEBUG_CLEAN_RKSS
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
+		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_section(&rkss);
 		printf("cleaned [%d]", i);
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 2985cb7e8d..c38a128fdf 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -284,7 +284,7 @@ static int rkss_verify_ptable(struct rk_secure_storage* rkss)
 			|| verify->checkstr != RKSS_CHECK_STR)
 	{
 		debug("verify [%lu] fail, cleanning ....", rkss->index);
-		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		memset(rkss->data, 0, RKSS_DATA_LEN);
 		verify->checkstr = RKSS_CHECK_STR;
 		verify->version = RKSS_VERSION;
 		int ret = rkss_write_section(rkss);
@@ -1184,6 +1184,7 @@ int tee_supp_rk_fs_init(void)
 	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
 	{
 		struct rk_secure_storage rkss = {0};
+		memset(rkss.data, 0, RKSS_DATA_LEN);
 		rkss.index = i;
 		rkss_write_section(&rkss);
 		printf("cleaned [%d]", i);

commit c3230cf0dfaf93e5051287008f01c0ccdbd66ccc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 15 22:12:54 2018 +0800

    lib: avb: add bootloader-min-versions
    
    The bootloader include uboot and trust. The uboot slot index
    number is 0. The trust slot number index is 1.
    
    Change-Id: Ia62edbf60486fa4128756458c6312f682a83d0f7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
index fff8060cb0..48e1f58afe 100644
--- a/include/android_avb/rk_avb_ops_user.h
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -27,6 +27,9 @@ extern "C" {
 #define PERM_ATTR_SUCCESS_FLAG 1
 /* soc-v use the rsa2048 */
 #define VBOOT_KEY_SIZE   256
+#define RPMB_BASE_ADDR		(64*1024/256)
+#define UBOOT_RB_INDEX_OFFSET 24
+#define TRUST_RB_INDEX_OFFSET 28
 
 /**
  * Provided to fastboot to read how many slot in this system.
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 7c7d545e6e..01cfb0c41a 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -428,6 +428,88 @@ int rk_avb_read_bootloader_locked_flag(uint8_t *flag)
 #endif
 }
 
+#ifdef CONFIG_SUPPORT_EMMC_RPMB
+static int curr_device = -1;
+
+int rk_bootloader_rollback_index_read(uint32_t offset, uint32_t bytes,
+				      void *rb_index)
+{
+
+	struct mmc *mmc;
+	uint8_t rpmb_buf[256] = {0};
+	uint32_t n;
+	char original_part;
+
+	if ((offset + bytes) > 256)
+		return -1;
+
+	if (curr_device < 0) {
+		if (get_mmc_num() > 0)
+			curr_device = 0;
+		else {
+			avb_error("No MMC device available");
+			return -1;
+		}
+	}
+
+	mmc = find_mmc_device(curr_device);
+	/* Switch to the RPMB partition */
+#ifndef CONFIG_BLK
+	original_part = mmc->block_dev.hwpart;
+#else
+	original_part = mmc_get_blk_desc(mmc)->hwpart;
+#endif
+	if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) !=
+	    0)
+		return -1;
+
+	n =  mmc_rpmb_read(mmc, rpmb_buf, RPMB_BASE_ADDR, 1, NULL);
+	if (n != 1)
+		return -1;
+
+	/* Return to original partition */
+	if (blk_select_hwpart_devnum(IF_TYPE_MMC, curr_device, original_part) !=
+	    0)
+		return -1;
+
+	memcpy(rb_index, (void*)&rpmb_buf[offset], bytes);
+
+	return 0;
+}
+
+int rk_avb_get_bootloader_min_version(char *buffer)
+{
+	uint32_t rb_index;
+	char temp[ROLLBACK_MAX_SIZE] = {0};
+
+	if (rk_bootloader_rollback_index_read(UBOOT_RB_INDEX_OFFSET,
+					      sizeof(uint32_t), &rb_index)) {
+		avb_error("Can not read uboot rollback index");
+		return -1;
+	}
+	snprintf(temp, sizeof(int) + 1, "%d", 0);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint32_t) + 1, "%d", rb_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ",", 1);
+
+	if (rk_bootloader_rollback_index_read(TRUST_RB_INDEX_OFFSET,
+					      sizeof(uint32_t), &rb_index)) {
+		avb_error("Can not read trust rollback index");
+		return -1;
+	}
+
+	snprintf(temp, sizeof(int) + 1, "%d", 1);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint32_t) + 1, "%d", rb_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+
+	return 0;
+}
+#endif
+
 void rk_avb_get_at_vboot_state(char *buf)
 {
 	char temp_buffer[200] = {0};
@@ -477,8 +559,15 @@ void rk_avb_get_at_vboot_state(char *buf)
 		printf("Can not avb_min_ver!\n");
 	sprintf(buf, "%s%s%s%s", buf, avb_min_ver, temp_buffer, crlf);
 
-	/* miniloader is not ready, bootloader-min-versions=-1 */
-	sprintf(buf, "%s%s%d%s", buf, btld_min_ver, -1, crlf);
+	/* bootloader-min-versions */
+	memset(temp_buffer, 0, 200);
+#ifdef CONFIG_SUPPORT_EMMC_RPMB
+	if (rk_avb_get_bootloader_min_version(temp_buffer))
+		avb_error("Call rk_avb_get_bootloader_min_version error!");
+#else
+	memcpy(temp_buffer, "-1", strlen("-1"));
+#endif
+	sprintf(buf, "%s%s%s%s", buf, btld_min_ver, temp_buffer, crlf);
 }
 
 int rk_avb_get_ab_info(AvbABData* ab_data)

commit df50318e9dc135a4a5a1c3028ae66e89d915ac6a
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 15 22:00:30 2018 +0800

    lib: avb: add slot number to avb-min-versions
    
    Acording to google, the avb-min-versions includes the slot number
    rather than the image rollback-index stored in the image.
    
    PIK/PSK: use AVB_ATX_PSK_VERSION_LOCATION and AVB_ATX_PIK_VERSION_LOCATION
    as slot number.
    
    Change-Id: I06b8d107e27f1e0f136b5e964c1287bc13f80b7c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 7e78dcca95..7c7d545e6e 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -350,24 +350,13 @@ int rk_avb_write_attribute_hash(uint8_t *buf, uint8_t length)
 #endif
 }
 
-static const char* slot_suffixes[2] = {"_a", "_b"};
-
 int rk_avb_read_all_rollback_index(char *buffer)
 {
 	AvbOps* ops;
-	AvbVBMetaImageHeader vbmeta_header;
 	uint64_t stored_rollback_index = 0;
-	uint64_t pik_rollback_index = 0;
-	uint64_t psk_rollback_index = 0;
-	AvbSlotVerifyFlags flags;
 	AvbIOResult io_ret;
 	char temp[ROLLBACK_MAX_SIZE] = {0};
-	AvbAtxPublicKeyMetadata *metadata;
 	int n;
-	bool unlocked;
-	AvbSlotVerifyResult verify_result;
-	AvbSlotVerifyData *slot_data[SLOT_NUM] = {NULL, NULL};
-	const char *requested_partitions[1] = {"vbmeta"};
 
 	ops = avb_ops_user_new();
 	if (ops == NULL) {
@@ -375,125 +364,20 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		return -1;
 	}
 
-	if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
-		printf("Error determining whether device is unlocked.\n");
-		unlocked = ANDROID_VBOOT_UNLOCK;
-		if (ops->write_is_device_unlocked(ops, &unlocked) != 0) {
-			printf("Can not write lock state!\n");
-			unlocked = ANDROID_VBOOT_LOCK;
-		}
-		if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
-			printf("Can not read lock state!\n");
-			unlocked = ANDROID_VBOOT_LOCK;
-		}
-	}
-
-	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
-	if (unlocked)
-		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
-
-	for (n = 0; n < SLOT_NUM; n++) {
-		verify_result = avb_slot_verify(ops,
-						requested_partitions,
-						slot_suffixes[n],
-						flags,
-						AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-						&slot_data[n]);
-		switch (verify_result) {
-		case AVB_SLOT_VERIFY_RESULT_OK:
-			break;
-
-		case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-		case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-		/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
-		 * these mean game over.
-		 */
-			printf("Invalid metadata!\n");
-			goto out;
-
-		/* explicit fallthrough. */
-		case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-			printf("Error verify!\n");
-			goto out;
-		case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-			printf("error rollback index!\n");
-			goto out;
-		case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-			printf("error key!\n");
-			goto out;
-		default:
-			printf("Some abnormal condition occur!\n");
-			goto out;
-		}
-	}
-	debug("partition_name = %s\n", slot_data[0]->vbmeta_images->partition_name);
-	debug("vbmeta_size = %d\n", (int)(size_t)slot_data[0]->vbmeta_images->vbmeta_size);
-
 	for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
-		uint64_t rollback_index_value = 0;
-		if (slot_data[0] != NULL && slot_data[1] != NULL) {
-			uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
-			uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
-			rollback_index_value =
-				(a_rollback_index < b_rollback_index ? a_rollback_index
-								: b_rollback_index);
-		} else if (slot_data[0] != NULL) {
-			rollback_index_value = slot_data[0]->rollback_indexes[n];
-		} else if (slot_data[1] != NULL) {
-			rollback_index_value = slot_data[1]->rollback_indexes[n];
-		}
-
 		io_ret = ops->read_rollback_index(
 			ops, n, &stored_rollback_index);
 		if (io_ret != AVB_IO_RESULT_OK)
 			goto out;
-		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
-			 stored_rollback_index);
+		snprintf(temp, sizeof(int) + 1, "%d", n);
 		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 		strncat(buffer, ":", 1);
 		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
-			 rollback_index_value);
+			 stored_rollback_index);
 		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 		strncat(buffer, ",", 1);
 	}
 
-	for (n = 0; n < SLOT_NUM; n++) {
-		avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader *)
-							   slot_data[n]->vbmeta_images->\
-							   vbmeta_data,
-							   &vbmeta_header);
-		if (vbmeta_header.public_key_metadata_size > 0) {
-			metadata = (AvbAtxPublicKeyMetadata *)(slot_data[n]->\
-				vbmeta_images->vbmeta_data +
-			   	sizeof(AvbVBMetaImageHeader) +
-			   	vbmeta_header.authentication_data_block_size +
-			   	vbmeta_header.public_key_metadata_offset);
-			if (n == 0) {
-				pik_rollback_index =
-					metadata->product_intermediate_key_certificate.\
-					signed_data.key_version;
-				psk_rollback_index =
-					metadata->product_signing_key_certificate.\
-					signed_data.key_version;
-			}
-
-			if (pik_rollback_index > metadata->\
-				product_intermediate_key_certificate.\
-				signed_data.key_version) {
-				pik_rollback_index = metadata->\
-				product_intermediate_key_certificate.\
-				signed_data.key_version;
-			}
-
-			if (psk_rollback_index > metadata->\
-				product_signing_key_certificate.\
-				signed_data.key_version) {
-				psk_rollback_index = metadata->\
-				product_signing_key_certificate.\
-				signed_data.key_version;
-			}
-		}
-	}
 	io_ret =
 		ops->read_rollback_index(ops,
 					 AVB_ATX_PIK_VERSION_LOCATION,
@@ -503,10 +387,10 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		goto out;
 	}
 	/* PIK rollback index */
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	snprintf(temp, sizeof(int) + 1, "%d", AVB_ATX_PIK_VERSION_LOCATION);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	strncat(buffer, ":", 1);
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", pik_rollback_index);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	strncat(buffer, ",", 1);
 	io_ret = ops->read_rollback_index(ops,
@@ -517,27 +401,16 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		goto out;
 	}
 	/* PSK rollback index */
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	snprintf(temp, sizeof(int) + 1, "%d", AVB_ATX_PSK_VERSION_LOCATION);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	strncat(buffer, ":", 1);
-	snprintf(temp, sizeof(uint64_t) + 1, "%lld", psk_rollback_index);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
 	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
 	debug("%s\n", buffer);
-
-	for (n = 0; n < SLOT_NUM; n++) {
-		if (slot_data[n] != NULL) {
-			avb_slot_verify_data_free(slot_data[n]);
-		}
-	}
 	avb_ops_user_free(ops);
 
 	return 0;
 out:
-	for (n = 0; n < SLOT_NUM; n++) {
-		if (slot_data[n] != NULL) {
-			avb_slot_verify_data_free(slot_data[n]);
-		}
-	}
 	avb_ops_user_free(ops);
 
 	return -1;
@@ -557,7 +430,7 @@ int rk_avb_read_bootloader_locked_flag(uint8_t *flag)
 
 void rk_avb_get_at_vboot_state(char *buf)
 {
-	char temp_buffer[150] = {0};
+	char temp_buffer[200] = {0};
 	char temp_flag = 0;
 	char crlf[2] = {'\n', 0};
 	char *lock_val = NULL;

commit 4715d15e1726cac7a8e86a5514072b024c71547e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Feb 6 09:52:31 2018 +0800

    cmd: sf: add test count
    
    Change-Id: I06c0783998152ef5d32f95f6813d5dfe315b4cc2
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/sf.c b/cmd/sf.c
index f971eec781..9953895268 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -442,12 +442,15 @@ static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len,
 {
 	struct test_info test;
 	int i;
+	int erase_len;
 
 	printf("SPI flash test:\n");
 	memset(&test, '\0', sizeof(test));
 	test.base_ms = get_timer(0);
 	test.bytes = len;
-	if (spi_flash_erase(flash, offset, len)) {
+
+	erase_len = roundup(len, 4096);
+	if (spi_flash_erase(flash, offset, erase_len)) {
 		printf("Erase failed\n");
 		return -1;
 	}
@@ -506,6 +509,8 @@ static int do_spi_flash_test(int argc, char * const argv[])
 	char *endp;
 	uint8_t *vbuf;
 	int ret;
+	int count;
+	int i;
 
 	if (argc < 3)
 		return -1;
@@ -516,6 +521,10 @@ static int do_spi_flash_test(int argc, char * const argv[])
 	if (*argv[2] == 0 || *endp != 0)
 		return -1;
 
+	count = simple_strtoul(argv[3], &endp, 10);
+	if (!count)
+		count = 1;
+
 	vbuf = memalign(ARCH_DMA_MINALIGN, len);
 	if (!vbuf) {
 		printf("Cannot allocate memory (%lu bytes)\n", len);
@@ -530,7 +539,13 @@ static int do_spi_flash_test(int argc, char * const argv[])
 
 	from = map_sysmem(CONFIG_SYS_TEXT_BASE, 0);
 	memcpy(buf, from, len);
-	ret = spi_flash_test(flash, buf, len, offset, vbuf);
+	for (i = 0; i < count; i++) {
+		ret = spi_flash_test(flash, buf, len, offset, vbuf);
+		if (ret < 0) {
+			printf("Test Failed, passed count:%d\n", i);
+			break;
+		}
+	}
 	free(vbuf);
 	free(buf);
 	if (ret) {

commit a3d7c00b32ef17a60f5a4789b3a43fcf1d671166
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Feb 6 09:51:12 2018 +0800

    cmd: boot: add brom cmd to reboot to brom dnl mode
    
    Change-Id: I797491ebe25af1013732aeee87e61e3ba4bc1689
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/cmd/boot.c b/cmd/boot.c
index 72f2cf362d..28070d6b47 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -11,6 +11,8 @@
 #include <common.h>
 #include <command.h>
 #include <net.h>
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
 
 #ifdef CONFIG_CMD_GO
 
@@ -45,6 +47,14 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return rcode;
 }
 
+static int do_reboot_brom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	do_reset(NULL, 0, 0, NULL);
+
+	return 0;
+}
+
 /* -------------------------------------------------------------------- */
 
 U_BOOT_CMD(
@@ -57,11 +67,17 @@ U_BOOT_CMD(
 #endif
 
 U_BOOT_CMD(
-	reset, 1, 0,	do_reset,
+	rbrom, 1, 0,	do_reboot_brom,
 	"Perform RESET of the CPU",
 	""
 );
 
+U_BOOT_CMD(
+        reset, 1, 0,    do_reset,
+        "Perform RESET of the CPU",
+        ""
+);
+
 #ifdef CONFIG_CMD_POWEROFF
 U_BOOT_CMD(
 	poweroff, 1, 0,	do_poweroff,

commit c25c0ed054237d663102fbb8baeed63461901186
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Feb 28 14:10:08 2018 +0800

    ram: rockchip: add sdram driver for rk3308
    
    Change-Id: I600520037f231363731a38e34f905d40963d7bd3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 5db731b60b..80262836a9 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3308) = sdram_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
 obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c
new file mode 100644
index 0000000000..03a52535b7
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3308.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dram_info {
+	struct ram_info info;
+};
+
+static int rk3308_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+	struct rk3308_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+
+	return 0;
+}
+
+static int rk3308_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3308_dmc_ops = {
+	.get_info = rk3308_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3308_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3308-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3308) = {
+	.name = "rockchip_rk3308_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3308_dmc_ids,
+	.ops = &rk3308_dmc_ops,
+	.probe = rk3308_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit b7e6ff2c3de0079d6f69353d110ac6c6103caa63
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 5 09:40:59 2018 +0800

    arm: rockchip: add rk3308 chip info
    
    Add chip info for rk3308.
    
    Change-Id: I30bea4469019bb7c6b0267f1a2bf6dc0ec5ba209
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 99597663b8..772993ea08 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -23,6 +23,7 @@
  * rk3399 chip info:	{0x33333043, 0x32303136, 0x30313138, 0x56313030} - 330B20160118V100
  * rk322xh chip info:	{0x33323043, 0x32303136, 0x31313031, 0x56313030} - 320C20161101V100
  * rk3326 chip info:	{0x33333044, 0x32303137, 0x31323134, 0x56313030} - 330D20171214V100
+ * rk3308 chip info:	{0x33333045, 0x32303138, 0x30323033, 0x56313030} - 330E20180203V100
  */
 int rockchip_get_chip_info(unsigned int chip_info[])
 {
@@ -39,6 +40,8 @@ int rockchip_get_chip_info(unsigned int chip_info[])
 	chip_info[0] = 0x33323042;
 #elif defined(CONFIG_ROCKCHIP_RK3288)
 	chip_info[0] = 0x33323041;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+	chip_info[0] = 0x33333045;
 #elif defined(CONFIG_ROCKCHIP_RK3328)
 	chip_info[0] = 0x33323043;
 	chip_info[3] = 0x56313030;

commit 849faaa0e3bf38281c3c4bbef38eb37429e32714
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Mar 1 14:23:02 2018 +0800

    common: boot_rkimg: avoid to access NULL address when failed to get bootdev type from env
    
    The NULL address maybe point to a security region on
    rockchip armv8 platform, which can't be accessed from
    u-boot(normal world). So before we access devtype by strcmp,
    set devtype to mmc if we failed to get it from env.
    
    Change-Id: Iceae3d1b89abd78fe59a3b57938254e55fa3894f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 8e07264999..3a431e3497 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -155,6 +155,12 @@ int get_bootdev_type(void)
 	devtype_num_envset();
 	devtype = env_get("devtype");
 
+	/* For current use(Only EMMC support!) */
+	if (!devtype) {
+		devtype = "mmc";
+		printf("Use emmc as default boot media\n");
+	}
+
 	if (!strcmp(devtype, "mmc")) {
 		type = IF_TYPE_MMC;
 		boot_media = "emmc";
@@ -165,13 +171,6 @@ int get_bootdev_type(void)
 		/* Add new to support */
 	}
 
-	/* For current use(Only EMMC support!) */
-	if (!type) {
-		type = IF_TYPE_MMC;
-		boot_media = "emmc";
-		printf("Use emmc as default boot media\n");
-	}
-
 	if (!appended && boot_media) {
 		appended = 1;
 		/*

commit c1e43163e9db42fd612b50f01ace79218c18fc8c
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Feb 28 14:08:23 2018 +0800

    board: rockchip: add rk3308 evb support
    
    Add basic support for rk3308 evb.
    
    Change-Id: I35aecc6747c222327a12b7583f84f971ab253fa3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 74c848757f..3d08d9e4dd 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -415,6 +415,7 @@ source "arch/arm/mach-rockchip/rk3128/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
 source "arch/arm/mach-rockchip/rk3288/Kconfig"
+source "arch/arm/mach-rockchip/rk3308/Kconfig"
 source "arch/arm/mach-rockchip/rk3328/Kconfig"
 source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig
new file mode 100644
index 0000000000..b0aa0ecdca
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/Kconfig
@@ -0,0 +1,18 @@
+if ROCKCHIP_RK3308
+
+config TARGET_EVB_RK3308
+	bool "EVB_RK3308"
+	select BOARD_LATE_INIT
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+config SPL_SERIAL_SUPPORT
+	default y
+
+source "board/rockchip/evb_rk3308/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_rk3308/Kconfig b/board/rockchip/evb_rk3308/Kconfig
new file mode 100644
index 0000000000..0074429cb6
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3308
+
+config SYS_BOARD
+	default "evb_rk3308"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3308"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3308/MAINTAINERS b/board/rockchip/evb_rk3308/MAINTAINERS
new file mode 100644
index 0000000000..0af119ae0a
--- /dev/null
+++ b/board/rockchip/evb_rk3308/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3308
+M:      Andy Yan <andy.yan@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk3308
+F:      include/configs/evb_rk3308.h
+F:      configs/evb-rk3308_defconfig
diff --git a/board/rockchip/evb_rk3308/Makefile b/board/rockchip/evb_rk3308/Makefile
new file mode 100644
index 0000000000..05de5560f1
--- /dev/null
+++ b/board/rockchip/evb_rk3308/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_rk3308.o
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
new file mode 100644
index 0000000000..4bf86117df
--- /dev/null
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -0,0 +1,11 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
new file mode 100644
index 0000000000..a87affc504
--- /dev/null
+++ b/configs/evb-rk3308_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3308=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+# CONFIG_USING_KERNEL_DTB is not set
+CONFIG_TARGET_EVB_RK3308=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
new file mode 100644
index 0000000000..2fdadb9998
--- /dev/null
+++ b/include/configs/evb_rk3308.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __EVB_RK3308_H
+#define __EVB_RK3308_H
+
+#include <configs/rk3308_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
+#endif

commit f135c3263247c7cfad868dfb20bc8f97eec60342
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Feb 26 09:39:56 2018 +0800

    arm: rockchip: rk3308: add core dtsi
    
    Sync these files from Linux kernel.
    
    Change-Id: I33432a84090d4f96ba932f30a3b4f0101c5a889d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9ea73115db..087b721eea 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-mickey.dtb \
 	rk3288-veyron-minnie.dtb \
 	rk3288-vyasa.dtb \
+	rk3308-evb.dtb \
 	rk3328-evb.dtb \
 	rk3368-lion.dtb \
 	rk3368-sheep.dtb \
diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
new file mode 100644
index 0000000000..aa7600fbe2
--- /dev/null
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/ {
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3308-dmc";
+		reg = <0x0 0xff010000 0x0 0x10000>;
+	};
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
new file mode 100644
index 0000000000..6af645f1cc
--- /dev/null
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+#include "rk3308.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3308 EVB";
+	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 1>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+
+		esc-key {
+			linux,code = <KEY_MUTE>;
+			label = "mute";
+			press-threshold-microvolt = <1130000>;
+		};
+
+		home-key {
+			linux,code = <KEY_MODE>;
+			label = "mode";
+			press-threshold-microvolt = <901000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_PLAY>;
+			label = "play";
+			press-threshold-microvolt = <624000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <300000>;
+		};
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <180000>;
+		};
+	};
+
+};
+
+&emmc {
+	cap-mmc-highspeed;
+	mmc-hs200-1_8v;
+	supports-emmc;
+	non-removable;
+	num-slots = <1>;
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
new file mode 100644
index 0000000000..abf8cf01dd
--- /dev/null
+++ b/arch/arm/dts/rk3308.dtsi
@@ -0,0 +1,823 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3308-cru.h>
+
+/ {
+	compatible = "rockchip,rk3308";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		clock-frequency = <24000000>;
+	};
+
+	clocks {
+		xin24m: xin24m {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+			clock-output-names = "xin24m";
+		};
+	};
+
+	grf: grf@ff000000 {
+		compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xff000000 0x0 0x10000>;
+	};
+
+	uart0: serial@ff0a0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0a0000 0x0 0x100>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	uart1: serial@ff0b0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0b0000 0x0 0x100>;
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff0c0000 {
+		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff0c0000 0x0 0x100>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		status = "disabled";
+	};
+
+	saradc: saradc@ff1e0000 {
+		compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xff1e0000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	i2s0: i2s@ff300000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff300000 0x0 0x10000>;
+	};
+
+	i2s1: i2s@ff310000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff100000 0x0 0x10000>;
+	};
+
+	i2s2: i2s@ff320000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff320000 0x0 0x10000>;
+	};
+
+	i2s3: i2s@ff330000 {
+		compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff330000 0x0 0x10000>;
+	};
+
+	vad: vad@ff3c0000 {
+		compatible = "rockchip,rk3308-vad", "rockchip,vad";
+		reg = <0x0 0xff3c0000 0x0 0x10000>, <0x0 0xfff88000 0x0 0x38000>;
+		reg-names = "vad", "vad-memory";
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,audio-src = <0>;
+		rockchip,audio-chnl-num = <8>;
+		rockchip,audio-chnl = <0>;
+		rockchip,mode = <0>;
+	};
+
+	sdmmc: dwmmc@ff480000 {
+		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff480000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		bus-width = <4>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@ff490000 {
+		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff490000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		bus-width = <8>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+		status = "disabled";
+	};
+
+	sdio: dwmmc@ff4a0000 {
+		compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff4a0000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		bus-width = <4>;
+		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
+		status = "disabled";
+	};
+
+	cru: clock-controller@ff500000 {
+		compatible = "rockchip,rk3308-cru";
+		reg = <0x0 0xff500000 0x0 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	gic: interrupt-controller@ff580000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+
+		reg = <0x0 0xff581000 0x0 0x1000>,
+		      <0x0 0xff582000 0x0 0x2000>,
+		      <0x0 0xff584000 0x0 0x2000>,
+		      <0x0 0xff586000 0x0 0x2000>;
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk3308-pinctrl";
+		rockchip,grf = <&grf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio0@ff220000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff220000 0x0 0x100>;
+			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO0>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@ff230000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff230000 0x0 0x100>;
+			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO1>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@ff240000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff240000 0x0 0x100>;
+			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO2>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@ff250000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff250000 0x0 0x100>;
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO3>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio4@ff260000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff260000 0x0 0x100>;
+			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+			//clocks = <&cru PCLK_GPIO4>;
+			clocks = <&xin24m>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+			bias-pull-up;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_4ma: pcfg-pull-up-4ma {
+			bias-pull-up;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_4ma: pcfg-pull-none-4ma {
+			bias-disable;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_down_4ma: pcfg-pull-down-4ma {
+			bias-pull-down;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+			bias-disable;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+			bias-disable;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+			bias-pull-up;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
+		pcfg_output_high: pcfg-output-high {
+			output-high;
+		};
+
+		pcfg_output_low: pcfg-output-low {
+			output-low;
+		};
+
+		pcfg_input_high: pcfg-input-high {
+			bias-pull-up;
+			input-enable;
+		};
+
+		pcfg_input: pcfg-input {
+			input-enable;
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins =
+					<1 RK_PD0 2 &pcfg_pull_none_smt>,
+					<1 RK_PD1 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins =
+					<0 RK_PB3 1 &pcfg_pull_none_smt>,
+					<0 RK_PB4 1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins =
+					<2 RK_PA2 3 &pcfg_pull_none_smt>,
+					<2 RK_PA3 3 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3-m0 {
+			i2c3m0_xfer: i2c3m0-xfer {
+				rockchip,pins =
+					<0 RK_PB7 2 &pcfg_pull_none_smt>,
+					<0 RK_PC0 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3-m1 {
+			i2c3m1_xfer: i2c3m1-xfer {
+				rockchip,pins =
+					<3 RK_PB4 2 &pcfg_pull_none_smt>,
+					<3 RK_PB5 2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		tsadc {
+			tsadc_otp_gpio: tsadc-otp-gpio {
+				rockchip,pins =
+					<0 RK_PB2 0 &pcfg_pull_none>;
+			};
+
+			tsadc_otp_out: tsadc-otp-out {
+				rockchip,pins =
+					<0 RK_PB2 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins =
+					<2 RK_PA1 1 &pcfg_pull_up>,
+					<2 RK_PA0 1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins =
+					<2 RK_PA2 1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins =
+					<2 RK_PA3 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins =
+					<1 RK_PD1 1 &pcfg_pull_up>,
+					<1 RK_PD0 1 &pcfg_pull_none>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins =
+					<1 RK_PC6 1 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins =
+					<1 RK_PC7 1 &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m0 {
+			uart2m0_xfer: uart2m0-xfer {
+				rockchip,pins =
+					<1 RK_PC7 2 &pcfg_pull_up>,
+					<1 RK_PC6 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m1 {
+			uart2m1_xfer: uart2m1-xfer {
+				rockchip,pins =
+					<4 RK_PD3 2 &pcfg_pull_up>,
+					<4 RK_PD2 2 &pcfg_pull_none>;
+			};
+		};
+
+		uart3 {
+			uart3_xfer: uart3-xfer {
+				rockchip,pins =
+					<3 RK_PB5 4 &pcfg_pull_up>,
+					<3 RK_PB4 4 &pcfg_pull_none>;
+			};
+		};
+
+		uart4 {
+
+			uart4_xfer: uart4-xfer {
+				rockchip,pins =
+					<4 RK_PB1 1 &pcfg_pull_up>,
+					<4 RK_PB0 1 &pcfg_pull_none>;
+			};
+
+			uart4_cts: uart4-cts {
+				rockchip,pins =
+					<4 RK_PA6 1 &pcfg_pull_none>;
+
+			};
+
+			uart4_rts: uart4-rts {
+				rockchip,pins =
+					<4 RK_PA7 1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins =
+					<2 RK_PA2 2 &pcfg_pull_up>;
+			};
+
+			spi0_csn0: spi0-csn0 {
+				rockchip,pins =
+					<2 RK_PA3 2 &pcfg_pull_up>;
+			};
+
+			spi0_miso: spi0-miso {
+				rockchip,pins =
+					<2 RK_PA0 2 &pcfg_pull_up>;
+			};
+
+			spi0_mosi: spi0-mosi {
+				rockchip,pins =
+					<2 RK_PA1 2 &pcfg_pull_up>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins =
+					<3 RK_PB3 3 &pcfg_pull_up>;
+			};
+
+			spi1_csn0: spi1-csn0 {
+				rockchip,pins =
+					<3 RK_PB5 3 &pcfg_pull_up>;
+			};
+
+			spi1_miso: spi1-miso {
+				rockchip,pins =
+					<3 RK_PB2 3 &pcfg_pull_up>;
+			};
+
+			spi1_mosi: spi1-mosi {
+				rockchip,pins =
+					<3 RK_PB4 3 &pcfg_pull_up>;
+			};
+		};
+
+		spi2 {
+			spi2_clk: spi2-clk {
+				rockchip,pins =
+					<1 RK_PD0 3 &pcfg_pull_up>;
+			};
+
+			spi2_csn0: spi2-csn0 {
+				rockchip,pins =
+					<1 RK_PD1 3 &pcfg_pull_up>;
+			};
+
+			spi2_miso: spi2-miso {
+				rockchip,pins =
+					<1 RK_PC6 3 &pcfg_pull_up>;
+			};
+
+			spi2_mosi: spi2-mosi {
+				rockchip,pins =
+					<1 RK_PC7 3 &pcfg_pull_up>;
+			};
+		};
+
+		sdmmc {
+			sdmmc_clk: sdmmc-clk {
+				rockchip,pins =
+					<4 RK_PD5 1 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc_cmd: sdmmc-cmd {
+				rockchip,pins =
+					<4 RK_PD4 1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc_pwren: sdmmc-pwren {
+				rockchip,pins =
+					<4 RK_PD6 1 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc_bus1: sdmmc-bus1 {
+				rockchip,pins =
+					<4 RK_PD0 1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc_bus4: sdmmc-bus4 {
+				rockchip,pins =
+					<4 RK_PD0 1 &pcfg_pull_up_4ma>,
+					<4 RK_PD1 1 &pcfg_pull_up_4ma>,
+					<4 RK_PD2 1 &pcfg_pull_up_4ma>,
+					<4 RK_PD3 1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc_gpio: sdmmc-gpio {
+				rockchip,pins =
+					<4 RK_PD0 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD1 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD2 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD3 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD4 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD5 0 &pcfg_pull_up_4ma>,
+					<4 RK_PD6 0 &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdio {
+			sdio_clk: sdio-clk {
+				rockchip,pins =
+					<4 RK_PA5 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_cmd: sdio-cmd {
+				rockchip,pins =
+					<4 RK_PA4 1 &pcfg_pull_up_8ma>;
+			};
+
+			sdio_pwren: sdio-pwren {
+				rockchip,pins =
+					<0 RK_PA2 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_wrpt: sdio-wrpt {
+				rockchip,pins =
+					<0 RK_PA1 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_intn: sdio-intn {
+				rockchip,pins =
+					<0 RK_PA0 1 &pcfg_pull_none_8ma>;
+			};
+
+			sdio_bus1: sdio-bus1 {
+				rockchip,pins =
+					<4 RK_PA0 1 &pcfg_pull_up_8ma>;
+			};
+
+			sdio_bus4: sdio-bus4 {
+				rockchip,pins =
+					<4 RK_PA0 1 &pcfg_pull_up_8ma>,
+					<4 RK_PA1 1 &pcfg_pull_up_8ma>,
+					<4 RK_PA2 1 &pcfg_pull_up_8ma>,
+					<4 RK_PA3 1 &pcfg_pull_up_8ma>;
+			};
+
+			sdio_gpio: sdio-gpio {
+				rockchip,pins =
+					<4 RK_PA0 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA1 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA2 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA3 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA4 0 &pcfg_pull_up_4ma>,
+					<4 RK_PA5 0 &pcfg_pull_up_4ma>;
+			};
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins =
+					<3 RK_PB1 2 &pcfg_pull_none_8ma>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins =
+					<3 RK_PB0 2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins =
+					<3 RK_PB3 2 &pcfg_pull_none>;
+			};
+
+			emmc_rstn: emmc-rstn {
+				rockchip,pins =
+					<3 RK_PB2 2 &pcfg_pull_none>;
+			};
+
+			emmc_bus1: emmc-bus1 {
+				rockchip,pins =
+					<3 RK_PA0 2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus4: emmc-bus4 {
+				rockchip,pins =
+					<3 RK_PA0 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA1 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA2 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA3 2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins =
+					<3 RK_PA0 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA1 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA2 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA3 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA4 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA5 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA6 2 &pcfg_pull_up_8ma>,
+					<3 RK_PA7 2 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		flash {
+			flash_csn0: flash-csn0 {
+				rockchip,pins =
+					<3 RK_PB5 1 &pcfg_pull_none>;
+			};
+
+			flash_rdy: flash-rdy {
+				rockchip,pins =
+					<3 RK_PB4 1 &pcfg_pull_none>;
+			};
+
+			flash_ale: flash-ale {
+				rockchip,pins =
+					<3 RK_PB3 1 &pcfg_pull_none>;
+			};
+
+			flash_cle: flash-cle {
+				rockchip,pins =
+					<3 RK_PB1 1 &pcfg_pull_none>;
+			};
+
+			flash_wrn: flash-wrn {
+				rockchip,pins =
+					<3 RK_PB0 1 &pcfg_pull_none>;
+			};
+
+			flash_rdn: flash-rdn {
+				rockchip,pins =
+					<3 RK_PB2 1 &pcfg_pull_none>;
+			};
+
+			flash_bus8: flash-bus8 {
+				rockchip,pins =
+					<3 RK_PA0 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA1 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA2 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA3 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA4 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA5 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA6 1 &pcfg_pull_up_12ma>,
+					<3 RK_PA7 1 &pcfg_pull_up_12ma>;
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins =
+					<0 RK_PB5 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins =
+					<0 RK_PB6 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins =
+					<0 RK_PB7 1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins =
+					<0 RK_PC0 1 &pcfg_pull_none>;
+			};
+		};
+
+		gmac {
+			rmii_pins: rmii-pins {
+				rockchip,pins =
+					/* mac_txen */
+					<1 RK_PC1 3 &pcfg_pull_none_12ma>,
+					/* mac_txd1 */
+					<1 RK_PC3 3 &pcfg_pull_none_12ma>,
+					/* mac_txd0 */
+					<1 RK_PC2 3 &pcfg_pull_none_12ma>,
+					/* mac_rxd0 */
+					<1 RK_PC4 3 &pcfg_pull_none>,
+					/* mac_rxd1 */
+					<1 RK_PC5 3 &pcfg_pull_none>,
+					/* mac_rxer */
+					<1 RK_PB7 3 &pcfg_pull_none>,
+					/* mac_rxdv */
+					<1 RK_PC0 3 &pcfg_pull_none>,
+					/* mac_mdio */
+					<1 RK_PB6 3 &pcfg_pull_none>,
+					/* mac_mdc */
+					<1 RK_PB5 3 &pcfg_pull_none>,
+					/* mac_clk */
+					<1 RK_PB4 3 &pcfg_pull_none>;
+			};
+		};
+	};
+};

commit 54d254fe97494da68cc03670ca2ea7e030b90775
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Feb 28 14:11:38 2018 +0800

    clk: rockchip: add clk driver for rk3308
    
    Add basic clock for px30 which including cpu, bus, emmc, i2c,
    spi, pwm, saradc clock init.
    
    Change-Id: Idd8542d7833e4997378bce99e0a464d5d16890fd
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index aeee9cea92..ee6204a4c5 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -11,24 +11,35 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(600 * MHz)
-#define CPLL_HZ		(594 * MHz)
-
-#define CORE_PERI_HZ	204000000
 #define CORE_ACLK_HZ	408000000
+#define CORE_DBG_HZ	204000000
+
+#define BUS_ACLK_HZ	200000000
+#define BUS_HCLK_HZ	100000000
+#define BUS_PCLK_HZ	100000000
 
-#define BUS_ACLK_HZ	148500000
-#define BUS_HCLK_HZ	148500000
-#define BUS_PCLK_HZ	74250000
+#define PERI_ACLK_HZ	200000000
+#define PERI_HCLK_HZ	100000000
+#define PERI_PCLK_HZ	100000000
 
-#define PERI_ACLK_HZ	148500000
-#define PERI_HCLK_HZ	148500000
-#define PERI_PCLK_HZ	74250000
+#define AUDIO_HCLK_HZ	100000000
+#define AUDIO_PCLK_HZ	100000000
 
-enum apll_frequencies {
-	APLL_816_MHZ,
-	APLL_600_MHZ,
+/* RK3308 pll id */
+enum rk3308_pll_id {
+	APLL,
+	DPLL,
+	VPLL0,
+	VPLL1,
+	PLL_COUNT,
+};
+
+struct pll_div {
+	u32 refdiv;
+	u32 fbdiv;
+	u32 postdiv1;
+	u32 postdiv2;
+	u32 frac;
 };
 
 /* Private data for the clock driver - used by rockchip_get_cru() */
@@ -76,6 +87,145 @@ struct rk3308_cru {
 	unsigned int sdio_con[2];
 	unsigned int emmc_con[2];
 };
+
+enum {
+	/* PLLCON0*/
+	PLL_BP_SHIFT		= 15,
+	PLL_POSTDIV1_SHIFT	= 12,
+	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
+	PLL_FBDIV_SHIFT		= 0,
+	PLL_FBDIV_MASK		= 0xfff,
+
+	/* PLLCON1 */
+	PLL_PDSEL_SHIFT		= 15,
+	PLL_PD1_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
+	PLL_DSMPD_SHIFT		= 12,
+	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
+	PLL_LOCK_STATUS_SHIFT	= 10,
+	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
+	PLL_POSTDIV2_SHIFT	= 6,
+	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
+	PLL_REFDIV_SHIFT	= 0,
+	PLL_REFDIV_MASK		= 0x3f,
+
+	/* PLLCON2 */
+	PLL_FOUT4PHASEPD_SHIFT	= 27,
+	PLL_FOUTVCOPD_SHIFT	= 26,
+	PLL_FOUTPOSTDIVPD_SHIFT	= 25,
+	PLL_DACPD_SHIFT		= 24,
+	PLL_FRAC_DIV	= 0xffffff,
+
+	/* CRU_MODE */
+	PLLMUX_FROM_XIN24M	= 0,
+	PLLMUX_FROM_PLL,
+	PLLMUX_FROM_RTC32K,
+	USBPHY480M_MODE_SHIFT	= 8,
+	USBPHY480M_MODE_MASK	= 3 << USBPHY480M_MODE_SHIFT,
+	VPLL1_MODE_SHIFT		= 6,
+	VPLL1_MODE_MASK		= 3 << VPLL1_MODE_SHIFT,
+	VPLL0_MODE_SHIFT		= 4,
+	VPLL0_MODE_MASK		= 3 << VPLL0_MODE_SHIFT,
+	DPLL_MODE_SHIFT		= 2,
+	DPLL_MODE_MASK		= 3 << DPLL_MODE_SHIFT,
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 3 << APLL_MODE_SHIFT,
+
+	/* CRU_CLK_SEL0_CON */
+	CORE_ACLK_DIV_SHIFT	= 12,
+	CORE_ACLK_DIV_MASK	= 0x7 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT	= 8,
+	CORE_DBG_DIV_MASK	= 0xf << CORE_DBG_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT	= 6,
+	CORE_CLK_PLL_SEL_MASK	= 0x3 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL	= 0,
+	CORE_CLK_PLL_SEL_VPLL0,
+	CORE_CLK_PLL_SEL_VPLL1,
+	CORE_DIV_CON_SHIFT	= 0,
+	CORE_DIV_CON_MASK	= 0x0f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL5_CON */
+	BUS_PLL_SEL_SHIFT	= 6,
+	BUS_PLL_SEL_MASK	= 0x3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_DPLL	= 0,
+	BUS_PLL_SEL_VPLL0,
+	BUS_PLL_SEL_VPLL1,
+	BUS_ACLK_DIV_SHIFT	= 0,
+	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL6_CON */
+	BUS_PCLK_DIV_SHIFT	= 8,
+	BUS_PCLK_DIV_MASK	= 0x1f << BUS_PCLK_DIV_SHIFT,
+	BUS_HCLK_DIV_SHIFT	= 0,
+	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL25_CON */
+	/* CRU_CLK_SEL26_CON */
+	/* CRU_CLK_SEL27_CON */
+	/* CRU_CLK_SEL28_CON */
+	CLK_I2C_PLL_SEL_SHIFT		= 14,
+	CLK_I2C_PLL_SEL_MASK		= 0x3 << CLK_I2C_PLL_SEL_SHIFT,
+	CLK_I2C_PLL_SEL_DPLL		= 0,
+	CLK_I2C_PLL_SEL_VPLL0,
+	CLK_I2C_PLL_SEL_24M,
+	CLK_I2C_DIV_CON_SHIFT		= 0,
+	CLK_I2C_DIV_CON_MASK		= 0x7f << CLK_I2C_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL29_CON */
+	CLK_PWM_PLL_SEL_SHIFT		= 14,
+	CLK_PWM_PLL_SEL_MASK		= 0x3 << CLK_PWM_PLL_SEL_SHIFT,
+	CLK_PWM_PLL_SEL_DPLL		= 0,
+	CLK_PWM_PLL_SEL_VPLL0,
+	CLK_PWM_PLL_SEL_24M,
+	CLK_PWM_DIV_CON_SHIFT		= 0,
+	CLK_PWM_DIV_CON_MASK		= 0x7f << CLK_PWM_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL30_CON */
+	/* CRU_CLK_SEL31_CON */
+	/* CRU_CLK_SEL32_CON */
+	CLK_SPI_PLL_SEL_SHIFT		= 14,
+	CLK_SPI_PLL_SEL_MASK		= 0x3 << CLK_SPI_PLL_SEL_SHIFT,
+	CLK_SPI_PLL_SEL_DPLL		= 0,
+	CLK_SPI_PLL_SEL_VPLL0,
+	CLK_SPI_PLL_SEL_24M,
+	CLK_SPI_DIV_CON_SHIFT		= 0,
+	CLK_SPI_DIV_CON_MASK		= 0x7f << CLK_SPI_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL34_CON */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= 0x7ff << CLK_SARADC_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL36_CON */
+	PERI_PLL_SEL_SHIFT	= 6,
+	PERI_PLL_SEL_MASK	= 0x3 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_DPLL		= 0,
+	PERI_PLL_VPLL0,
+	PERI_PLL_VPLL1,
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL37_CON */
+	PERI_PCLK_DIV_SHIFT	= 8,
+	PERI_PCLK_DIV_MASK	= 0x1f << PERI_PCLK_DIV_SHIFT,
+	PERI_HCLK_DIV_SHIFT	= 0,
+	PERI_HCLK_DIV_MASK	= 0x1f << PERI_HCLK_DIV_SHIFT,
+
+	/* CRU_CLKSEL41_CON */
+	EMMC_CLK_SEL_SHIFT	= 15,
+	EMMC_CLK_SEL_MASK	= 1 << EMMC_CLK_SEL_SHIFT,
+	EMMC_CLK_SEL_EMMC	= 0,
+	EMMC_CLK_SEL_EMMC_DIV50,
+	EMMC_PLL_SHIFT		= 8,
+	EMMC_PLL_MASK		= 0x3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_DPLL		= 0,
+	EMMC_SEL_VPLL0,
+	EMMC_SEL_VPLL1,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT		= 0,
+	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
+};
+
 check_member(rk3308_cru, emmc_con[1], 0x494);
 
 #endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 62d318cade..4091abc09b 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3308) += clk_rk3308.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += clk_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += clk_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += clk_rk3399.o
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
new file mode 100644
index 0000000000..74e03e66ef
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -0,0 +1,716 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+#define DEBUG
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3308.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3308-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 3200U * 1000000,
+	VCO_MIN_HZ	= 800 * 1000000,
+	OUTPUT_MAX_HZ	= 3200U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+
+static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
+
+static u8 pll_mode_shift[PLL_COUNT] = {
+	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, VPLL0_MODE_SHIFT,
+	VPLL1_MODE_SHIFT
+};
+
+static u32 pll_mode_mask[PLL_COUNT] = {
+	APLL_MODE_MASK, DPLL_MODE_MASK, VPLL0_MODE_MASK,
+	VPLL1_MODE_MASK
+};
+
+static ulong apll_hz, dpll_hz, vpll0_hz;
+
+/*
+ * How to calculate the PLL:
+ * Formulas also embedded within the Fractional PLL Verilog model:
+ * If DSMPD = 1 (DSM is disabled, "integer mode")
+ * FOUTVCO = FREF / REFDIV * FBDIV
+ * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
+ * Where:
+ * FOUTVCO = Fractional PLL non-divided output frequency
+ * FOUTPOSTDIV = Fractional PLL divided output frequency
+ *               (output of second post divider)
+ * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
+ * REFDIV = Fractional PLL input reference clock divider
+ * FBDIV = Integer value programmed into feedback divide
+ *
+ */
+
+static void rkclk_set_pll(struct rk3308_cru *cru, enum rk3308_pll_id pll_id,
+			  const struct pll_div *div)
+{
+	struct rk3308_pll *pll;
+	unsigned int *mode;
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	pll = &cru->pll[pll_id];
+	mode = &cru->mode;
+
+	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_XIN24M << pll_mode_shift[pll_id]);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (!(readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT)))
+		udelay(1);
+
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
+}
+
+static uint32_t rkclk_pll_get_rate(struct rk3308_cru *cru,
+				   enum rk3308_pll_id pll_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+	struct rk3308_pll *pll;
+	uint shift;
+	uint mask;
+
+	pll = &cru->pll[pll_id];
+	con = readl(&cru->mode);
+
+	shift = pll_mode_shift[pll_id];
+	mask = pll_mode_mask[pll_id];
+
+	switch ((con & mask) >> shift) {
+	case PLLMUX_FROM_XIN24M:
+		return OSC_HZ;
+	case PLLMUX_FROM_PLL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case PLLMUX_FROM_RTC32K:
+	default:
+		return 32768;
+	}
+}
+
+static void rkclk_init(struct rk3308_cru *cru)
+{
+	u32 aclk_div, hclk_div, pclk_div;
+
+	/* init pll */
+	rkclk_set_pll(cru, APLL, &apll_816_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PCLK and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	apll_hz = rkclk_pll_get_rate(cru, DPLL);
+	aclk_div = apll_hz / CORE_ACLK_HZ - 1;
+	pclk_div = apll_hz / CORE_DBG_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[0],
+		     CORE_ACLK_DIV_MASK | CORE_DBG_DIV_MASK |
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_DIV_CON_SHIFT |
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	/*
+	 * select dpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	dpll_hz = rkclk_pll_get_rate(cru, DPLL);
+	aclk_div = dpll_hz / BUS_ACLK_HZ - 1;
+	hclk_div = dpll_hz / BUS_HCLK_HZ - 1;
+	pclk_div = dpll_hz / BUS_PCLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[5],
+		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_PLL_SEL_DPLL << BUS_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[6],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select vpll0 as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	vpll0_hz = rkclk_pll_get_rate(cru, VPLL0);
+	aclk_div = vpll0_hz / PERI_ACLK_HZ - 1;
+	hclk_div = vpll0_hz / PERI_HCLK_HZ - 1;
+	pclk_div = vpll0_hz / PERI_PCLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[36],
+		     PERI_PLL_SEL_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_VPLL0 << PERI_PLL_SEL_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[37],
+		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK,
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT);
+}
+
+static ulong rk3308_i2c_get_clk(struct rk3308_cru *cru, ulong clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		con_id = 25;
+		break;
+	case SCLK_I2C1:
+		con_id = 26;
+		break;
+	case SCLK_I2C2:
+		con_id = 27;
+		break;
+	case SCLK_I2C3:
+		con_id = 28;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = con >> CLK_I2C_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
+
+	return DIV_TO_RATE(dpll_hz, div);
+}
+
+static ulong rk3308_i2c_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+{
+	u32 src_clk_div, con_id;
+
+	src_clk_div = dpll_hz / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		con_id = 25;
+		break;
+	case SCLK_I2C1:
+		con_id = 26;
+		break;
+	case SCLK_I2C2:
+		con_id = 27;
+		break;
+	case SCLK_I2C3:
+		con_id = 28;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+	rk_clrsetreg(&cru->clksel_con[con_id],
+		     CLK_I2C_PLL_SEL_MASK | CLK_I2C_DIV_CON_MASK,
+		     CLK_I2C_PLL_SEL_DPLL << CLK_I2C_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_I2C_DIV_CON_SHIFT);
+
+	return rk3308_i2c_get_clk(cru, clk_id);
+}
+
+static ulong rk3308_mmc_get_clk(struct rk3308_cru *cru, uint clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 39;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con_id = 41;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+
+	if ((con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT
+	    == EMMC_SEL_24M)
+		return DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		return DIV_TO_RATE(vpll0_hz, div) / 2;
+}
+
+static ulong rk3308_mmc_set_clk(struct rk3308_cru *cru,
+				ulong clk_id, ulong set_rate)
+{
+	int src_clk_div;
+	u32 con_id;
+
+	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 39;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 41;
+		break;
+	default:
+		return -EINVAL;
+	}
+	/* Select clk_sdmmc/emmc source from VPLL0 by default */
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(vpll0_hz / 2, set_rate);
+
+	if (src_clk_div > 127) {
+		/* use 24MHz source for 400KHz clock */
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK | EMMC_CLK_SEL_MASK,
+			     EMMC_CLK_SEL_EMMC << EMMC_CLK_SEL_SHIFT |
+			     EMMC_SEL_24M << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK | EMMC_CLK_SEL_MASK,
+			     EMMC_CLK_SEL_EMMC << EMMC_CLK_SEL_SHIFT |
+			     EMMC_SEL_VPLL0 << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	}
+
+	return rk3308_mmc_get_clk(cru, clk_id);
+}
+
+static ulong rk3308_saradc_get_clk(struct rk3308_cru *cru)
+{
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[34]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3308_saradc_set_clk(struct rk3308_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = OSC_HZ / hz;
+	assert(src_clk_div - 1 < 2047);
+
+	rk_clrsetreg(&cru->clksel_con[34],
+		     CLK_SARADC_DIV_CON_MASK,
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3308_saradc_get_clk(cru);
+}
+
+static ulong rk3308_spi_get_clk(struct rk3308_cru *cru, ulong clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		con_id = 30;
+		break;
+	case SCLK_SPI1:
+		con_id = 31;
+		break;
+	case SCLK_SPI2:
+		con_id = 32;
+		break;
+	default:
+		printf("do not support this spi bus\n");
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = con >> CLK_SPI_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
+
+	return DIV_TO_RATE(dpll_hz, div);
+}
+
+static ulong rk3308_spi_set_clk(struct rk3308_cru *cru, ulong clk_id, uint hz)
+{
+	u32 src_clk_div, con_id;
+
+	src_clk_div = dpll_hz / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		con_id = 30;
+		break;
+	case SCLK_SPI1:
+		con_id = 31;
+		break;
+	case SCLK_SPI2:
+		con_id = 32;
+		break;
+	default:
+		printf("do not support this spi bus\n");
+		return -EINVAL;
+	}
+
+	rk_clrsetreg(&cru->clksel_con[con_id],
+		     CLK_SPI_PLL_SEL_MASK | CLK_SPI_DIV_CON_MASK,
+		     CLK_SPI_PLL_SEL_DPLL << CLK_SPI_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_SPI_DIV_CON_SHIFT);
+
+	return rk3308_spi_get_clk(cru, clk_id);
+}
+
+static ulong rk3308_pwm_get_clk(struct rk3308_cru *cru)
+{
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[29]);
+	div = con >> CLK_PWM_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+
+	return DIV_TO_RATE(dpll_hz, div);
+}
+
+static ulong rk3308_pwm_set_clk(struct rk3308_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = dpll_hz / hz;
+	assert(src_clk_div - 1 < 127);
+
+	rk_clrsetreg(&cru->clksel_con[29],
+		     CLK_PWM_PLL_SEL_MASK | CLK_PWM_DIV_CON_MASK,
+		     CLK_PWM_PLL_SEL_DPLL << CLK_PWM_PLL_SEL_SHIFT |
+		     (src_clk_div - 1) << CLK_PWM_DIV_CON_SHIFT);
+
+	return rk3308_pwm_get_clk(cru);
+}
+
+static ulong rk3308_clk_get_rate(struct clk *clk)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	debug("%s id:%ld\n", __func__, clk->id);
+
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		rate = rk3308_mmc_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		rate = rk3308_i2c_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_SARADC:
+		rate = rk3308_saradc_get_clk(priv->cru);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		rate = rk3308_spi_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_PWM:
+		rate = rk3308_pwm_get_clk(priv->cru);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong rk3308_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+		ret = rk3308_mmc_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		ret = rk3308_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_SARADC:
+		ret = rk3308_saradc_set_clk(priv->cru, rate);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		ret = rk3308_spi_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_PWM:
+		ret = rk3308_pwm_set_clk(priv->cru, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(11)
+#define ROCKCHIP_MMC_DEGREE_OFFSET	1
+#define ROCKCHIP_MMC_DEGREE_MASK	(0x3 << ROCKCHIP_MMC_DEGREE_OFFSET)
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	3
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rockchip_mmc_get_phase(struct clk *clk)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3308_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else
+		raw_value = readl(&cru->sdmmc_con[1]);
+
+	raw_value &= ROCKCHIP_MMC_DEGREE_MASK;
+	degrees = (raw_value >>  ROCKCHIP_MMC_DEGREE_OFFSET) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+
+}
+
+int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3308_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3308_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties << ROCKCHIP_MMC_DEGREE_OFFSET;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rockchip_mmc_get_phase(clk));
+
+	return 0;
+
+}
+
+static int rk3308_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3308_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops rk3308_clk_ops = {
+	.get_rate = rk3308_clk_get_rate,
+	.set_rate = rk3308_clk_set_rate,
+	.get_phase	= rk3308_clk_get_phase,
+	.set_phase	= rk3308_clk_set_phase,
+};
+
+static int rk3308_clk_probe(struct udevice *dev)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int rk3308_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk3308_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = dev_read_addr_ptr(dev);
+
+	return 0;
+}
+
+static int rk3308_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3308_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct rk3308_cru,
+						    glb_srst_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3308_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk3308_clk_ids[] = {
+	{ .compatible = "rockchip,rk3308-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3308_cru) = {
+	.name		= "rockchip_rk3308_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3308_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3308_clk_priv),
+	.ofdata_to_platdata = rk3308_clk_ofdata_to_platdata,
+	.ops		= &rk3308_clk_ops,
+	.bind		= rk3308_clk_bind,
+	.probe		= rk3308_clk_probe,
+};
diff --git a/include/dt-bindings/clock/rk3308-cru.h b/include/dt-bindings/clock/rk3308-cru.h
new file mode 100644
index 0000000000..1346a6929b
--- /dev/null
+++ b/include/dt-bindings/clock/rk3308-cru.h
@@ -0,0 +1,362 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
+ * Author: Finley Xiao <finley.xiao@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3308_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_VPLL0		3
+#define PLL_VPLL1		4
+#define ARMCLK			5
+
+/* sclk (special clocks) */
+#define USB480M			14
+#define SCLK_RTC32K		15
+#define SCLK_PVTM_CORE		16
+#define SCLK_UART0		17
+#define SCLK_UART1		18
+#define SCLK_UART2		19
+#define SCLK_UART3		20
+#define SCLK_UART4		21
+#define SCLK_I2C0		22
+#define SCLK_I2C1		23
+#define SCLK_I2C2		24
+#define SCLK_I2C3		25
+#define SCLK_PWM		26
+#define SCLK_SPI0		27
+#define SCLK_SPI1		28
+#define SCLK_SPI2		29
+#define SCLK_TIMER0		30
+#define SCLK_TIMER1		31
+#define SCLK_TIMER2		32
+#define SCLK_TIMER3		33
+#define SCLK_TIMER4		34
+#define SCLK_TIMER5		35
+#define SCLK_TSADC		36
+#define SCLK_SARADC		37
+#define SCLK_OTP		38
+#define SCLK_OTP_USR		39
+#define SCLK_CPU_BOOST		40
+#define SCLK_CRYPTO		41
+#define SCLK_CRYPTO_APK		42
+#define SCLK_NANDC_DIV		43
+#define SCLK_NANDC_DIV50	44
+#define SCLK_NANDC		45
+#define SCLK_SDMMC_DIV		46
+#define SCLK_SDMMC_DIV50	47
+#define SCLK_SDMMC		48
+#define SCLK_SDMMC_DRV		49
+#define SCLK_SDMMC_SAMPLE	50
+#define SCLK_SDIO_DIV		51
+#define SCLK_SDIO_DIV50		52
+#define SCLK_SDIO		53
+#define SCLK_SDIO_DRV		54
+#define SCLK_SDIO_SAMPLE	55
+#define SCLK_EMMC_DIV		56
+#define SCLK_EMMC_DIV50		57
+#define SCLK_EMMC		58
+#define SCLK_EMMC_DRV		59
+#define SCLK_EMMC_SAMPLE	60
+#define SCLK_SFC		61
+#define SCLK_OTG_ADP		62
+#define SCLK_GMAC_SRC		63
+#define SCLK_GMAC		64
+#define SCLK_MAC_REF		65
+#define SCLK_GMAC_RX_TX		66
+#define SCLK_GMAC_RMII		67
+#define SCLK_DDR_MON_TIMER	68
+#define SCLK_DDR_MON		69
+#define SCLK_DDRCLK		70
+#define SCLK_PMU		71
+#define SCLK_USBPHY_REF		72
+#define SCLK_WIFI		73
+#define SCLK_PVTM_PMU		74
+#define SCLK_PDM		75
+#define SCLK_I2S0_8CH_TX	76
+#define SCLK_I2S0_8CH_TX_OUT	77
+#define SCLK_I2S0_8CH_RX	78
+#define SCLK_I2S0_8CH_RX_OUT	79
+#define SCLK_I2S1_8CH_TX	80
+#define SCLK_I2S1_8CH_TX_OUT	81
+#define SCLK_I2S1_8CH_RX	82
+#define SCLK_I2S1_8CH_RX_OUT	83
+#define SCLK_I2S2_8CH_TX	84
+#define SCLK_I2S2_8CH_TX_OUT	85
+#define SCLK_I2S2_8CH_RX	86
+#define SCLK_I2S2_8CH_RX_OUT	87
+#define SCLK_I2S3_8CH_TX	88
+#define SCLK_I2S3_8CH_TX_OUT	89
+#define SCLK_I2S3_8CH_RX	90
+#define SCLK_I2S3_8CH_RX_OUT	91
+#define SCLK_I2S0_2CH		92
+#define SCLK_I2S0_2CH_OUT	93
+#define SCLK_I2S1_2CH		94
+#define SCLK_I2S1_2CH_OUT	95
+#define SCLK_SPDIF_TX_DIV	96
+#define SCLK_SPDIF_TX_DIV50	97
+#define SCLK_SPDIF_TX		98
+#define SCLK_SPDIF_RX_DIV	99
+#define SCLK_SPDIF_RX_DIV50	100
+#define SCLK_SPDIF_RX		101
+
+/* dclk */
+#define DCLK_VOP		120
+
+/* aclk */
+#define ACLK_CORE		130
+#define ACLK_BUS		131
+#define ACLK_PERI		132
+#define ACLK_GMAC		133
+#define ACLK_CRYPTO		134
+#define ACLK_VOP		135
+#define ACLK_GIC		136
+
+/* hclk */
+#define HCLK_BUS		150
+#define HCLK_PERI		151
+#define HCLK_AUDIO		152
+#define HCLK_NANDC		153
+#define HCLK_SDMMC		154
+#define HCLK_SDIO		155
+#define HCLK_EMMC		156
+#define HCLK_SFC		157
+#define HCLK_OTG		158
+#define HCLK_HOST		159
+#define HCLK_HOST_ARB		160
+#define HCLK_PDM		161
+#define HCLK_SPDIFTX		162
+#define HCLK_SPDIFRX		163
+#define HCLK_I2S0_8CH		164
+#define HCLK_I2S1_8CH		165
+#define HCLK_I2S2_8CH		166
+#define HCLK_I2S3_8CH		167
+#define HCLK_I2S0_2CH		168
+#define HCLK_I2S1_2CH		169
+#define HCLK_VAD		170
+#define HCLK_CRYPTO		171
+#define HCLK_VOP		172
+
+/* pclk */
+#define PCLK_BUS		190
+#define PCLK_DDR		191
+#define PCLK_PERI		192
+#define PCLK_PMU		193
+#define PCLK_AUDIO		194
+#define PCLK_GMAC		195
+#define PCLK_ACODEC		196
+#define PCLK_UART0		197
+#define PCLK_UART1		198
+#define PCLK_UART2		199
+#define PCLK_UART3		200
+#define PCLK_UART4		201
+#define PCLK_I2C0		202
+#define PCLK_I2C1		203
+#define PCLK_I2C2		204
+#define PCLK_I2C3		205
+#define PCLK_PWM		206
+#define PCLK_SPI0		207
+#define PCLK_SPI1		208
+#define PCLK_SPI2		209
+#define PCLK_SARADC		210
+#define PCLK_TSADC		211
+#define PCLK_TIMER		212
+#define PCLK_OTP_NS		213
+#define PCLK_WDT_NS		214
+#define PCLK_GPIO0		215
+#define PCLK_GPIO1		216
+#define PCLK_GPIO2		217
+#define PCLK_GPIO3		218
+#define PCLK_GPIO4		219
+#define PCLK_SGRF		220
+#define PCLK_GRF			221
+#define PCLK_USBSD_DET		222
+#define PCLK_DDR_UPCTL		223
+#define PCLK_DDR_MON		224
+#define PCLK_DDRPHY		225
+#define PCLK_DDR_STDBY		226
+#define PCLK_USB_GRF		227
+#define PCLK_CRU		228
+#define PCLK_OTP_PHY		229
+#define PCLK_CPU_BOOST		230
+
+#define CLK_NR_CLKS		(PCLK_CPU_BOOST + 1)
+
+/* soft-reset indices */
+
+/* cru_softrst_con0 */
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE2_PO		2
+#define SRST_CORE3_PO		3
+#define SRST_CORE0		4
+#define SRST_CORE1		5
+#define SRST_CORE2		6
+#define SRST_CORE3		7
+#define SRST_CORE0_DBG		8
+#define SRST_CORE1_DBG		9
+#define SRST_CORE2_DBG		10
+#define SRST_CORE3_DBG		11
+#define SRST_TOPDBG		12
+#define SRST_CORE_NOC		13
+#define SRST_STRC_A		14
+#define SRST_L2C		15
+
+/* cru_softrst_con1 */
+#define SRST_DAP		16
+#define SRST_CORE_PVTM		17
+#define SRST_CORE_PRF		18
+#define SRST_CORE_GRF		19
+#define SRST_DDRUPCTL		20
+#define SRST_DDRUPCTL_P		22
+#define SRST_MSCH		23
+#define SRST_DDRMON_P		25
+#define SRST_DDRSTDBY_P		26
+#define SRST_DDRSTDBY		27
+#define SRST_DDRPHY		28
+#define SRST_DDRPHY_DIV		29
+#define SRST_DDRPHY_P		30
+
+/* cru_softrst_con2 */
+#define SRST_BUS_NIU_H		32
+#define SRST_USB_NIU_P		33
+#define SRST_CRYPTO_A		34
+#define SRST_CRYPTO_H		35
+#define SRST_CRYPTO		36
+#define SRST_CRYPTO_APK		37
+#define SRST_VOP_A		38
+#define SRST_VOP_H		39
+#define SRST_VOP_D		40
+#define SRST_INTMEM_A		41
+#define SRST_ROM_H		42
+#define SRST_GIC_A		43
+#define SRST_UART0_P		44
+#define SRST_UART0		45
+#define SRST_UART1_P		46
+#define SRST_UART1		47
+
+/* cru_softrst_con3 */
+#define SRST_UART2_P		48
+#define SRST_UART2		49
+#define SRST_UART3_P		50
+#define SRST_UART3		51
+#define SRST_UART4_P		52
+#define SRST_UART4		53
+#define SRST_I2C0_P		54
+#define SRST_I2C0		55
+#define SRST_I2C1_P		56
+#define SRST_I2C1		57
+#define SRST_I2C2_P		58
+#define SRST_I2C2		59
+#define SRST_I2C3_P		60
+#define SRST_I2C3		61
+#define SRST_PWM_P		62
+#define SRST_PWM		63
+
+/* cru_softrst_con4 */
+#define SRST_SPI0_P		64
+#define SRST_SPI0		65
+#define SRST_SPI1_P		66
+#define SRST_SPI1		67
+#define SRST_SPI2_P		68
+#define SRST_SPI2		69
+#define SRST_SARADC_P		70
+#define SRST_TSADC_P		71
+#define SRST_TSADC		72
+#define SRST_TIMER0_P		73
+#define SRST_TIMER0		74
+#define SRST_TIMER1		75
+#define SRST_TIMER2		76
+#define SRST_TIMER3		77
+#define SRST_TIMER4		78
+#define SRST_TIMER5		79
+
+/* cru_softrst_con5 */
+#define SRST_OTP_NS_P		80
+#define SRST_OTP_NS_SBPI	81
+#define SRST_OTP_NS_USR		82
+#define SRST_OTP_PHY_P		83
+#define SRST_OTP_PHY		84
+#define SRST_GPIO0_P		86
+#define SRST_GPIO1_P		87
+#define SRST_GPIO2_P		88
+#define SRST_GPIO3_P		89
+#define SRST_GPIO4_P		90
+#define SRST_GRF_P		91
+#define SRST_USBSD_DET_P	92
+#define SRST_PMU		93
+#define SRST_PMU_PVTM		94
+#define SRST_USB_GRF_P		95
+
+/* cru_softrst_con6 */
+#define SRST_CPU_BOOST		96
+#define SRST_CPU_BOOST_P	97
+#define SRST_PERI_NIU_A		104
+#define SRST_PERI_NIU_H		105
+#define SRST_PERI_NIU_p		106
+#define SRST_USB2OTG_H		107
+#define SRST_USB2OTG		108
+#define SRST_USB2OTG_ADP	109
+#define SRST_USB2HOST_H		110
+#define SRST_USB2HOST_ARB_H	111
+
+/* cru_softrst_con7 */
+#define SRST_USB2HOST_AUX_H	112
+#define SRST_USB2HOST_EHCI	113
+#define SRST_USB2HOST		114
+#define SRST_USBPHYPOR		115
+#define SRST_UTMI0		116
+#define SRST_UTMI1		117
+#define SRST_SDIO_H		118
+#define SRST_EMMC_H		119
+#define SRST_SFC_H		120
+#define SRST_SFC		121
+#define SRST_SD_H		122
+#define SRST_NANDC_H		123
+#define SRST_NANDC_N		124
+#define SRST_GMAC_A		125
+
+/* cru_softrst_con8 */
+#define SRST_AUDIO_NIU_H	128
+#define SRST_AUDIO_NIU_P	129
+#define SRST_PDM_H		130
+#define SRST_PDM_M		131
+#define SRST_SPDIFTX_H		132
+#define SRST_SPDIFTX_M		133
+#define SRST_SPDIFRX_H		134
+#define SRST_SPDIFRX_M		135
+#define SRST_I2S0_8CH_H		136
+#define SRST_I2S0_8CH_TX_M	137
+#define SRST_I2S0_8CH_RX_M	138
+#define SRST_I2S1_8CH_H		139
+#define SRST_I2S1_8CH_TX_M	140
+#define SRST_I2S1_8CH_RX_M	141
+#define SRST_I2S2_8CH_H		142
+#define SRST_I2S2_8CH_TX_M	143
+
+/* cru_softrst_con9 */
+#define SRST_I2S2_8CH_RX_M	144
+#define SRST_I2S3_8CH_H		145
+#define SRST_I2S3_8CH_TX_M	146
+#define SRST_I2S3_8CH_RX_M	147
+#define SRST_I2S0_2CH_H		148
+#define SRST_I2S0_2CH_M		149
+#define SRST_I2S1_2CH_H		150
+#define SRST_I2S1_2CH_M		151
+#define SRST_VAD_H		152
+#define SRST_ACODEC_P		153
+
+#endif

commit 3d78ac3e4e75dad1cfbd93ab65653a424b332b0f
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Sun Feb 25 17:44:28 2018 +0800

    arm: rockchip: add RK3308 SOC support
    
    RK3308 is a Soc from Rockchip, which embedded with quad
    ARM Cortex-A35 and highly integrated audio interfaces.
    
    Change-Id: I93958481f2e9f0f8d8c40bbfaaa3899cd82ec43d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
new file mode 100644
index 0000000000..aeee9cea92
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_CRU_RK3308_H
+#define _ASM_ARCH_CRU_RK3308_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(816 * MHz)
+#define GPLL_HZ		(600 * MHz)
+#define CPLL_HZ		(594 * MHz)
+
+#define CORE_PERI_HZ	204000000
+#define CORE_ACLK_HZ	408000000
+
+#define BUS_ACLK_HZ	148500000
+#define BUS_HCLK_HZ	148500000
+#define BUS_PCLK_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+enum apll_frequencies {
+	APLL_816_MHZ,
+	APLL_600_MHZ,
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3308_clk_priv {
+	struct rk3308_cru *cru;
+	ulong rate;
+};
+
+struct rk3308_cru {
+	struct rk3308_pll {
+		unsigned int con0;
+		unsigned int con1;
+		unsigned int con2;
+		unsigned int con3;
+		unsigned int con4;
+		unsigned int reserved0[3];
+	} pll[4];
+	unsigned int reserved1[8];
+	unsigned int mode;
+	unsigned int misc;
+	unsigned int reserved2[2];
+	unsigned int glb_cnt_th;
+	unsigned int glb_rst_st;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+	unsigned int glb_rst_con;
+	unsigned int pll_lock;
+	unsigned int reserved3[6];
+	unsigned int hwffc_con0;
+	unsigned int reserved4;
+	unsigned int hwffc_th;
+	unsigned int hwffc_intst;
+	unsigned int apll_con0_s;
+	unsigned int apll_con1_s;
+	unsigned int clksel_con0_s;
+	unsigned int reserved5;
+	unsigned int clksel_con[74];
+	unsigned int reserved6[54];
+	unsigned int clkgate_con[15];
+	unsigned int reserved7[(0x380 - 0x338) / 4 - 1];
+	unsigned int ssgtbl[32];
+	unsigned int softrst_con[10];
+	unsigned int reserved8[(0x480 - 0x424) / 4 - 1];
+	unsigned int sdmmc_con[2];
+	unsigned int sdio_con[2];
+	unsigned int emmc_con[2];
+};
+check_member(rk3308_cru, emmc_con[1], 0x494);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
new file mode 100644
index 0000000000..7e8e3a62f8
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -0,0 +1,176 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_rk3308_H
+#define _ASM_ARCH_GRF_rk3308_H
+
+#include <common.h>
+
+struct rk3308_grf {
+	unsigned int gpio0a_iomux;
+	unsigned int reserved0;
+	unsigned int gpio0b_iomux;
+	unsigned int reserved1;
+	unsigned int gpio0c_iomux;
+	unsigned int reserved2[3];
+	unsigned int gpio1a_iomux;
+	unsigned int reserved3;
+	unsigned int gpio1bl_iomux;
+	unsigned int gpio1bh_iomux;
+	unsigned int gpio1cl_iomux;
+	unsigned int gpio1ch_iomux;
+	unsigned int gpio1d_iomux;
+	unsigned int reserved4;
+	unsigned int gpio2a_iomux;
+	unsigned int reserved5;
+	unsigned int gpio2b_iomux;
+	unsigned int reserved6;
+	unsigned int gpio2c_iomux;
+	unsigned int reserved7[3];
+	unsigned int gpio3a_iomux;
+	unsigned int reserved8;
+	unsigned int gpio3b_iomux;
+	unsigned int reserved9[5];
+	unsigned int gpio4a_iomux;
+	unsigned int reserved33;
+	unsigned int gpio4b_iomux;
+	unsigned int reserved10;
+	unsigned int gpio4c_iomux;
+	unsigned int reserved11;
+	unsigned int gpio4d_iomux;
+	unsigned int reserved34;
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p;
+	unsigned int reserved12;
+	unsigned int gpio1a_p;
+	unsigned int gpio1b_p;
+	unsigned int gpio1c_p;
+	unsigned int gpio1d_p;
+	unsigned int gpio2a_p;
+	unsigned int gpio2b_p;
+	unsigned int gpio2c_p;
+	unsigned int reserved13;
+	unsigned int gpio3a_p;
+	unsigned int gpio3b_p;
+	unsigned int reserved14[2];
+	unsigned int gpio4a_p;
+	unsigned int gpio4b_p;
+	unsigned int gpio4c_p;
+	unsigned int gpio4d_p;
+	unsigned int reserved15[(0x100 - 0xec) / 4 - 1];
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int reserved16;
+	unsigned int gpio1a_e;
+	unsigned int gpio1b_e;
+	unsigned int gpio1c_e;
+	unsigned int gpio1d_e;
+	unsigned int gpio2a_e;
+	unsigned int gpio2b_e;
+	unsigned int gpio2c_e;
+	unsigned int reserved17;
+	unsigned int gpio3a_e;
+	unsigned int gpio3b_e;
+	unsigned int reserved18[2];
+	unsigned int gpio4a_e;
+	unsigned int gpio4b_e;
+	unsigned int gpio4c_e;
+	unsigned int gpio4d_e;
+	unsigned int gpio0a_sr;
+	unsigned int gpio0b_sr;
+	unsigned int gpio0c_sr;
+	unsigned int reserved19;
+	unsigned int gpio1a_sr;
+	unsigned int gpio1b_sr;
+	unsigned int gpio1c_sr;
+	unsigned int gpio1d_sr;
+	unsigned int gpio2a_sr;
+	unsigned int gpio2b_sr;
+	unsigned int gpio2c_sr;
+	unsigned int reserved20;
+	unsigned int gpio3a_sr;
+	unsigned int gpio3b_sr;
+	unsigned int reserved21[2];
+	unsigned int gpio4a_sr;
+	unsigned int gpio4b_sr;
+	unsigned int gpio4c_sr;
+	unsigned int gpio4d_sr;
+	unsigned int gpio0a_smt;
+	unsigned int gpio0b_smt;
+	unsigned int gpio0c_smt;
+	unsigned int reserved22;
+	unsigned int gpio1a_smt;
+	unsigned int gpio1b_smt;
+	unsigned int gpio1c_smt;
+	unsigned int gpio1d_smt;
+	unsigned int gpio2a_smt;
+	unsigned int gpio2b_smt;
+	unsigned int gpio2c_smt;
+	unsigned int reserved23;
+	unsigned int gpio3a_smt;
+	unsigned int gpio3b_smt;
+	unsigned int reserved35[2];
+	unsigned int gpio4a_smt;
+	unsigned int gpio4b_smt;
+	unsigned int gpio4c_smt;
+	unsigned int gpio4d_smt;
+	unsigned int reserved24[(0x300 - 0x1EC) / 4 - 1];
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int soc_con2;
+	unsigned int soc_con3;
+	unsigned int soc_con4;
+	unsigned int soc_con5;
+	unsigned int soc_con6;
+	unsigned int soc_con7;
+	unsigned int soc_con8;
+	unsigned int soc_con9;
+	unsigned int soc_con10;
+	unsigned int reserved25[(0x380 - 0x328) / 4 - 1];
+	unsigned int soc_status0;
+	unsigned int reserved26[(0x400 - 0x380) / 4 - 1];
+	unsigned int cpu_con0;
+	unsigned int cpu_con1;
+	unsigned int cpu_con2;
+	unsigned int reserved27[(0x420 - 0x408) / 4 - 1];
+	unsigned int cpu_status0;
+	unsigned int cpu_status1;
+	unsigned int reserved28[(0x440 - 0x424) / 4 - 1];
+	unsigned int pvtm_con0;
+	unsigned int pvtm_con1;
+	unsigned int pvtm_status0;
+	unsigned int pvtm_status1;
+	unsigned int reserved29[(0x460 - 0x44C) / 4 - 1];
+	unsigned int tsadc_tbl;
+	unsigned int tsadc_tbh;
+	unsigned int reserved30[(0x480 - 0x464) / 4 - 1];
+	unsigned int host0_con0;
+	unsigned int host0_con1;
+	unsigned int otg_con0;
+	unsigned int host0_status0;
+	unsigned int reserved31[(0x4a0 - 0x48C) / 4 - 1];
+	unsigned int mac_con0;
+	unsigned int upctrl_con0;
+	unsigned int upctrl_status0;
+	unsigned int reserved32[(0x500 - 0x4A8) / 4 - 1];
+	unsigned int os_reg0;
+	unsigned int os_reg1;
+	unsigned int os_reg2;
+	unsigned int os_reg3;
+	unsigned int os_reg4;
+	unsigned int os_reg5;
+	unsigned int os_reg6;
+	unsigned int os_reg7;
+	unsigned int os_reg8;
+	unsigned int os_reg9;
+	unsigned int os_reg10;
+	unsigned int os_reg11;
+	unsigned int reserved38[(0x800 - 0x52C) / 4 - 1];
+	unsigned int chip_id;
+};
+check_member(rk3308_grf, gpio0a_p, 0xa0);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 74436308a3..74c848757f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -127,6 +127,14 @@ config ROCKCHIP_RK3288
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK3308
+	bool "Support Rockchip RK3308"
+	select ARM64
+	select DEBUG_UART_BOARD_INIT
+	help
+	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
+	  Cortex-A35 and highly integrated audio interfaces.
+
 config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
@@ -260,6 +268,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0x20004040 if ROCKCHIP_RK3188
 	default 0x110005c8 if ROCKCHIP_RK322X
 	default 0xff730094 if ROCKCHIP_RK3288
+	default 0xff000500 if ROCKCHIP_RK3308
 	default 0xff1005c8 if ROCKCHIP_RK3328
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 4452117a73..de4faf2fa9 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
 endif
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x/
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
+obj-$(CONFIG_ROCKCHIP_RK3308) += rk3308/
 obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
 obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
diff --git a/arch/arm/mach-rockchip/rk3308/Makefile b/arch/arm/mach-rockchip/rk3308/Makefile
new file mode 100644
index 0000000000..196774d3e5
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2018 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += syscon_rk3308.o
+obj-y += rk3308.o
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
new file mode 100644
index 0000000000..3642a861f5
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk3308.h>
+#include <asm/arch/hardware.h>
+#include <asm/armv8/mmu.h>
+#include <debug_uart.h>
+
+static struct mm_region rk3308_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xff000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xff000000UL,
+		.phys = 0xff000000UL,
+		.size = 0x01000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = rk3308_mem_map;
+
+#define GRF_BASE	0xff000000
+
+enum {
+
+	GPIO1C7_SHIFT		= 8,
+	GPIO1C7_MASK		= GENMASK(11, 8),
+	GPIO1C7_GPIO		= 0,
+	GPIO1C7_UART1_RTSN,
+	GPIO1C7_UART2_TX_M0,
+	GPIO1C7_SPI2_MOSI,
+	GPIO1C7_JTAG_TMS,
+
+	GPIO1C6_SHIFT		= 4,
+	GPIO1C6_MASK		= GENMASK(7, 4),
+	GPIO1C6_GPIO		= 0,
+	GPIO1C6_UART1_CTSN,
+	GPIO1C6_UART2_RX_M0,
+	GPIO1C6_SPI2_MISO,
+	GPIO1C6_JTAG_TCLK,
+
+	GPIO4D3_SHIFT           = 6,
+	GPIO4D3_MASK            = GENMASK(7, 6),
+	GPIO4D3_GPIO            = 0,
+	GPIO4D3_SDMMC_D3,
+	GPIO4D3_UART2_TX_M1,
+
+	GPIO4D2_SHIFT           = 4,
+	GPIO4D2_MASK            = GENMASK(5, 4),
+	GPIO4D2_GPIO            = 0,
+	GPIO4D2_SDMMC_D2,
+	GPIO4D2_UART2_RX_M1,
+
+	UART2_IO_SEL_SHIFT	= 2,
+	UART2_IO_SEL_MASK	= GENMASK(3, 2),
+	UART2_IO_SEL_M0		= 0,
+	UART2_IO_SEL_M1,
+	UART2_IO_SEL_USB,
+};
+
+int arch_cpu_init(void)
+{
+	debug_uart_init();
+
+	printascii("U-Boot rk3308\n");
+
+	return 0;
+}
+
+void board_debug_uart_init(void)
+{
+	static struct rk3308_grf * const grf = (void *)GRF_BASE;
+
+	/* Enable early UART2 channel m1 on the rk3308 */
+	rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK,
+		     UART2_IO_SEL_M1 << UART2_IO_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio1ch_iomux, GPIO1C7_MASK | GPIO1C6_MASK,
+		      GPIO1C7_GPIO << GPIO1C7_SHIFT |
+		      GPIO1C6_GPIO << GPIO1C6_SHIFT);
+	rk_clrsetreg(&grf->gpio4d_iomux,
+		     GPIO4D3_MASK | GPIO4D2_MASK,
+		     GPIO4D2_UART2_RX_M1 << GPIO4D2_SHIFT |
+		     GPIO4D3_UART2_TX_M1 << GPIO4D3_SHIFT);
+}
diff --git a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
new file mode 100644
index 0000000000..109fcacd4b
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3308_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3308-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3308) = {
+	.name = "rk3308_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3308_syscon_ids,
+};
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
new file mode 100644
index 0000000000..24bf22cd8e
--- /dev/null
+++ b/include/configs/rk3308_common.h
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3308_COMMON_H
+#define __CONFIG_RK3308_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x10000
+#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xff131000
+#define GICC_BASE			0xff132000
+
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define CONFIG_NR_DRAM_BANKS		2
+#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_BANK_SIZE			(2UL << 30)
+#define CONFIG_PREBOOT
+
+#ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID        0x330d
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x04000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	BOOTENV
+
+#endif
+
+#endif

commit 178b5aad365178d7ba014e9f7b4af8ab3a0ed718
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 10:01:48 2018 +0800

    video/drm: lvds: Use default pinctrl state
    
    If we use the pinctrl-names is "default", there is no need to configure
    the iomux twice, remove the duplicates.
    
    Change-Id: Ibd774f06ce10d6abfbbfdd0415a35e323a74b3ad
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 21c5c05a16..d52e65f51e 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -215,29 +215,6 @@ static void px30_output_ttl(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
-	int ret;
-
-	ret = dev_read_stringlist_search(conn_state->dev, "pinctrl-names", "m0");
-	if (ret < 0) {
-		/* iomux to lcdcm1 */
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0x000f, 0x0001);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0x0f0f, 0x0101);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xff00, 0x1100);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0x00f0, 0x0010);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
-	} else {
-		/* iomux to lcdcm0 */
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
-		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
-		return;
-	}
 
 	/* enable lvds mode */
 	val = PX30_LVDS_PHY_MODE(0) | PX30_DPHY_FORCERXMODE(1);
@@ -261,11 +238,6 @@ static void rk3126_output_ttl(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
 
-	/* iomux to lcdc */
-	writel(0xffc35541, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
-	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2C_IOMUX);
-	writel(0x700c1004, lvds->grf + RK3126_GRF_GPIO2D_IOMUX);
-
 	/* enable lvds mode */
 	val = v_RK3126_LVDSMODE_EN(0) |
 		v_RK3126_MIPIPHY_TTL_EN(1) |
@@ -296,25 +268,6 @@ static void rk336x_output_ttl(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 	u32 val = 0;
 
-	/* iomux to lcdc */
-	if (lvds->pdata->chip_type == RK3368_LVDS) {
-		/* lcdc data 11 10 */
-		lvds_pmugrf_writel(0x04, 0xf0005000);
-		/* lcdc data 12 13 14 15 16 17 18 19 */
-		lvds_pmugrf_writel(0x08, 0xFFFF5555);
-		/* lcdc data 20 21 22 23 HSYNC VSYNC DEN DCLK */
-		lvds_pmugrf_writel(0x0c, 0xFFFF5555);
-		/* set clock lane enable */
-		lvds_ctrl_writel(lvds, 0x0, 0x4);
-	} else {
-		/* lcdc data 15 ... 10, vsync, hsync */
-		lvds_pmugrf_writel(0x0c, 0xffff555a);
-		/* lcdc data 23 ... 16 */
-		lvds_pmugrf_writel(0x30, 0xffff5555);
-		/* lcdc dclk, den */
-		lvds_pmugrf_writel(0x34, 0x000f0005);
-	}
-
 	/* enable lvds mode */
 	val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(1) |
 		v_RK336X_MIPIPHY_LANE0_EN(1) |
@@ -471,8 +424,6 @@ static void rk3288_output_ttl(struct display_state *state)
 	struct rockchip_lvds_device *lvds = conn_state->private;
 
 	rk3288_lvds_pwr_on(state);
-	/* iomux: dclk den hsync vsync */
-	writel(0x00550055, lvds->grf + lvds->pdata->grf_gpio1d_iomux);
 	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 		    RK3288_LVDS_CH0_REG0_TTL_EN |
 		    RK3288_LVDS_CH0_REG0_LANECK_EN |
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 549ce4a473..339a04dc3a 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -120,13 +120,6 @@
 #define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
 #define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
 #define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
-#define PX30_GRF_GPIO3A_IOMUX_L	0x0040
-#define PX30_GRF_GPIO3A_IOMUX_H	0x0044
-#define PX30_GRF_GPIO3B_IOMUX_L	0x0048
-#define PX30_GRF_GPIO3B_IOMUX_H	0x004c
-#define PX30_GRF_GPIO3C_IOMUX_L	0x0050
-#define PX30_GRF_GPIO3C_IOMUX_H	0x0054
-#define PX30_GRF_GPIO3D_IOMUX_L	0x0058
 
 #define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))

commit 98aca512b44ab41b12cf9fa15d1e2a79ca0b3cb2
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 09:55:42 2018 +0800

    configs: evb-px30: enable CONFIG_DRM_ROCKCHIP_RGB
    
    Change-Id: I1ae7de3318688babc2d3593f9cf77a02d413915b
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 8d70e8cc99..133c3a840d 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -80,6 +80,7 @@ CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y

commit ae374f7964a53157c6cd264f8b31f03495c83b06
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 09:54:54 2018 +0800

    configs: evb-rk3326: enable CONFIG_DRM_ROCKCHIP_RGB
    
    Change-Id: I95be83b9dd4588484d2af6249ef9483e5ec4c61f
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index ac2b86d3e7..dab64402d2 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -82,6 +82,7 @@ CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_RGB=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y

commit 9e02a86e2a096a672c77293fbe95853d83d47296
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Tue Mar 20 09:48:39 2018 +0800

    video/drm: Add support for Rockchip RGB output interface
    
    Some CRTCs can directly output parallel and serial RGB data to panel
    or conversion chip on rockchip platform, so we add this driver to support it.
    
    Change-Id: I9e4f1a1978c9100767e44920a54afc4d39830d7d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 04174ddece..a83278dc3c 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -53,3 +53,11 @@ config DRM_ROCKCHIP_LVDS
 	  Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
 	  support LVDS, rgb, dual LVDS output mode. say Y to enable its
 	  driver.
+
+config DRM_ROCKCHIP_RGB
+	bool "Rockchip RGB Support"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	help
+	  Choose this option to enable support for Rockchip RGB driver.
+	  say Y to enable its driver.
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index a9a85cb1a9..f6b39fa882 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -13,4 +13,5 @@ obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
+obj-$(CONFIG_DRM_ROCKCHIP_RGB) += rockchip_rgb.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
diff --git a/drivers/video/drm/rockchip_rgb.c b/drivers/video/drm/rockchip_rgb.c
new file mode 100644
index 0000000000..92dc839164
--- /dev/null
+++ b/drivers/video/drm/rockchip_rgb.c
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <syscon.h>
+#include <regmap.h>
+#include <dm/device.h>
+#include <dm/read.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+
+#define PX30_GRF_PD_VO_CON1	0x0438
+#define PX30_LCDC_DCLK_INV(v)	HIWORD_UPDATE(v, 4, 4)
+#define PX30_RGB_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
+#define PX30_RGB_VOP_SEL(v)	HIWORD_UPDATE(v, 2, 2)
+
+struct rockchip_rgb_priv {
+	struct regmap *grf;
+};
+
+static int rockchip_rgb_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_rgb_priv *priv = dev_get_priv(conn_state->dev);
+	struct crtc_state *crtc_state = &state->crtc_state;
+	int pipe = crtc_state->crtc_id;
+
+	if (priv->grf) {
+		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
+			     PX30_RGB_VOP_SEL(pipe));
+		regmap_write(priv->grf, PX30_GRF_PD_VO_CON1,
+			     PX30_RGB_SYNC_BYPASS(1));
+	}
+
+	return 0;
+}
+
+static int rockchip_rgb_unprepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int to_output_mode(const char *s)
+{
+	const struct {
+		const char *name;
+		int format;
+	} formats[] = {
+		{ "p888", ROCKCHIP_OUT_MODE_P888 },
+		{ "p666", ROCKCHIP_OUT_MODE_P666 },
+		{ "p565", ROCKCHIP_OUT_MODE_P565 },
+		{ "s888", ROCKCHIP_OUT_MODE_S888 },
+		{ "s888_dummy", ROCKCHIP_OUT_MODE_S888_DUMMY }
+	};
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(formats); i++)
+		if (!strncmp(s, formats[i].name, strlen(formats[i].name)))
+			return formats[i].format;
+
+	return ROCKCHIP_OUT_MODE_P888;
+}
+
+static int rockchip_rgb_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	const char *mode;
+
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
+
+	mode = dev_read_string(panel_state->dev, "rgb-mode");
+	if (mode)
+		conn_state->output_mode = to_output_mode(mode);
+	else
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	return 0;
+}
+
+static const struct rockchip_connector_funcs rockchip_rgb_funcs = {
+	.init = rockchip_rgb_init,
+	.enable = rockchip_rgb_prepare,
+	.disable = rockchip_rgb_unprepare,
+};
+
+static int rockchip_rgb_probe(struct udevice *dev)
+{
+	struct rockchip_rgb_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_regmap(dev_get_parent(dev));
+
+	return 0;
+}
+
+static const struct rockchip_connector rockchip_rgb_data = {
+	 .funcs = &rockchip_rgb_funcs,
+};
+
+static const struct udevice_id rockchip_rgb_ids[] = {
+	{
+		.compatible = "rockchip,px30-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{
+		.compatible = "rockchip,rk3066-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{
+		.compatible = "rockchip,rk3308-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{
+		.compatible = "rockchip,rv1108-rgb",
+		.data = (ulong)&rockchip_rgb_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_rgb) = {
+	.name = "rockchip_rgb",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_rgb_ids,
+	.probe = rockchip_rgb_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_rgb_priv),
+};

commit 9abae1863bee71c42818be29b9338c8fe592d868
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Mar 16 15:42:57 2018 +0800

    configs: evb-rk3326: remove CONFIG_DRM_ROCKCHIP_DSI_PANEL
    
    Change-Id: If17cfe1187316308b2ad7107927869890e176349
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 8a33028559..ac2b86d3e7 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -83,7 +83,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit 7660591e0a5c8101f82b7fd3a189d22de48b5541
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Mar 16 15:42:17 2018 +0800

    configs: evb-px30: remove CONFIG_DRM_ROCKCHIP_DSI_PANEL
    
    Change-Id: I84a20d6075269043a7b7f2651c1f424d5489a5c3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 8751c592e9..8d70e8cc99 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -81,7 +81,6 @@ CONFIG_DRM_ROCKCHIP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y

commit c493d00e7c13ad18bf7105dbbe9a685e46f40882
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Mar 16 10:52:59 2018 +0800

    video/drm: Merge panel driver into one driver
    
    This merges the rockchip panel driver into the common driver.
    This will make it easier to share code between the drivers and
    eventually merge them into one driver.
    
    Change-Id: I4c59e5f4f39ffc43b4d0339de8dfa23aec28220b
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 305df5c5a5..04174ddece 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -10,10 +10,8 @@ menuconfig DRM_ROCKCHIP
 	  Rockchip RK3288 and RK3399.
 
 config DRM_ROCKCHIP_PANEL
-	bool
-
-config DRM_ROCKCHIP_DSI_PANEL
-	bool
+	bool "Rockchip Panel Support"
+	select DRM_ROCKCHIP_MIPI_DSI
 
 config DRM_ROCKCHIP_DW_HDMI
 	bool "Rockchip specific extensions for Synopsys DW HDMI"
@@ -30,7 +28,7 @@ config DRM_ROCKCHIP_DW_MIPI_DSI
 	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
 	depends on DRM_ROCKCHIP
 	select DRM_ROCKCHIP_MIPI_DSI
-	select DRM_ROCKCHIP_DSI_PANEL
+	select DRM_ROCKCHIP_PANEL
 	help
 	 This selects support for Rockchip SoC specific extensions
 	 for the Synopsys DesignWare HDMI driver. If you want to
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 9e865118fc..a9a85cb1a9 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -5,14 +5,12 @@
 #
 
 obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
-		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o \
-		rockchip_panel.o
+		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
-			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
+					  rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
-obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
-obj-$(CONFIG_DRM_ROCKCHIP_DSI_PANEL) += rockchip_dsi_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
deleted file mode 100644
index d577d33ebd..0000000000
--- a/drivers/video/drm/panel_simple.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <linux/media-bus-format.h>
-#include <dm/uclass.h>
-#include <dm/uclass-id.h>
-#include <dm/ofnode.h>
-#include <asm/gpio.h>
-#include <backlight.h>
-#include <power/regulator.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
-#include "rockchip_panel.h"
-
-#define msleep(a)	udelay(a * 1000)
-
-struct panel_simple {
-	struct udevice *dev;
-	const void *blob;
-	ofnode node;
-
-	const struct drm_display_mode *mode;
-	int bus_format;
-
-	struct udevice *power_supply;
-	bool power_invert;
-	struct udevice *backlight;
-	struct gpio_desc enable;
-
-	int delay_prepare;
-	int delay_unprepare;
-	int delay_enable;
-	int delay_disable;
-};
-
-static int panel_simple_prepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-	int ret;
-
-	if (panel->power_supply) {
-		ret = regulator_set_enable(panel->power_supply,
-					   panel->power_invert);
-		if (ret)
-			printf("%s: failed to enable power_supply",
-			       __func__);
-	}
-
-	dm_gpio_set_value(&panel->enable, 1);
-	mdelay(panel->delay_prepare);
-
-	return 0;
-}
-
-static int panel_simple_unprepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-
-	dm_gpio_set_value(&panel->enable, 0);
-	mdelay(panel->delay_unprepare);
-
-	return 0;
-}
-
-static int panel_simple_enable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_enable(panel->backlight);
-		mdelay(panel->delay_enable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int panel_simple_disable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_disable(panel->backlight);
-		mdelay(panel->delay_disable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int panel_simple_parse_dt(const void *blob, ofnode node,
-				 struct panel_simple *panel)
-{
-	int ret;
-
-	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
-				   &panel->enable, GPIOD_IS_OUT);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
-					   "backlight", &panel->backlight);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
-					   "power-supply",
-					   &panel->power_supply);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	panel->power_invert = !!ofnode_read_s32_default(node, "power_invert", 0);
-
-	panel->delay_prepare = ofnode_read_s32_default(node, "prepare-delay-ms", 0);
-	panel->delay_unprepare = ofnode_read_s32_default(node, "unprepare-delay-ms", 0);
-	panel->delay_enable = ofnode_read_s32_default(node, "enable-delay-ms", 0);
-	panel->delay_disable = ofnode_read_s32_default(node, "disable-delay-ms", 0);
-	panel->bus_format = ofnode_read_s32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
-
-	debug("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
-	       panel->delay_prepare, panel->delay_unprepare,
-	       panel->delay_enable, panel->delay_disable);
-
-	/* keep panel blank on init. */
-	dm_gpio_set_value(&panel->enable, 0);
-
-	return 0;
-}
-
-static int panel_simple_init(struct display_state *state)
-{
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode node = panel_state->node;
-	const struct drm_display_mode *mode = panel_state->panel->data;
-	struct panel_simple *panel;
-	int ret;
-
-	panel = malloc(sizeof(*panel));
-	if (!panel)
-		return -ENOMEM;
-
-	memset(panel, 0, sizeof(*panel));
-	panel->blob = blob;
-	panel->node = node;
-	panel->mode = mode;
-	panel->dev = panel_state->dev;
-	panel_state->private = panel;
-
-	ret = panel_simple_parse_dt(blob, node, panel);
-	if (ret) {
-		printf("%s: failed to parse DT\n", __func__);
-		free(panel);
-		return ret;
-	}
-
-	conn_state->bus_format = panel->bus_format;
-
-	return 0;
-}
-
-static void panel_simple_deinit(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct panel_simple *panel = panel_state->private;
-
-	free(panel);
-}
-
-const struct rockchip_panel_funcs panel_simple_funcs = {
-	.init		= panel_simple_init,
-	.deinit		= panel_simple_deinit,
-	.prepare	= panel_simple_prepare,
-	.unprepare	= panel_simple_unprepare,
-	.enable		= panel_simple_enable,
-	.disable	= panel_simple_disable,
-};
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 77df5c2b53..6980c137e3 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -199,10 +199,12 @@ static int connector_panel_init(struct display_state *state)
 	panel_state->dev = dev;
 	panel_state->panel = panel;
 
-	ret = rockchip_panel_init(state);
-	if (ret) {
-		printf("failed to init panel driver\n");
-		return ret;
+	if (panel->funcs && panel->funcs->init) {
+		ret = panel->funcs->init(state);
+		if (ret) {
+			printf("failed to init panel driver\n");
+			return ret;
+		}
 	}
 
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
@@ -409,31 +411,44 @@ static int display_get_timing(struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
 	struct panel_state *panel_state = &state->panel_state;
-	ofnode panel = panel_state->node;
+	const struct rockchip_panel *panel = panel_state->panel;
+	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
+	ofnode panel_node = panel_state->node;
+	int ret;
 
-	if (ofnode_valid(panel) && !display_get_timing_from_dts(panel_state, mode)) {
+	if (ofnode_valid(panel_node) && !display_get_timing_from_dts(panel_state, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
 
-	m = rockchip_get_display_mode_from_panel(state);
-	if (m) {
-		printf("Using display timing from compatible panel driver\n");
+	if (panel->data) {
+		m = (const struct drm_display_mode *)panel->data;
 		memcpy(mode, m, sizeof(*m));
+		printf("Using display timing from compatible panel driver\n");
 		goto done;
 	}
 
-	rockchip_panel_prepare(state);
-
 	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
 		int panel_bits_per_colourp;
 
+		/* In order to read EDID, the panel needs to be powered on */
+		if (panel_funcs->prepare) {
+			ret = panel_funcs->prepare(state);
+			if (ret) {
+				printf("failed to prepare panel\n");
+				return ret;
+			}
+		}
+
 		if (!edid_get_drm_mode((void *)&conn_state->edid,
 				     sizeof(conn_state->edid), mode,
 				     &panel_bits_per_colourp)) {
 			printf("Using display timing from edid\n");
 			edid_print_info((void *)&conn_state->edid);
 			goto done;
+		} else {
+			if (panel_funcs->unprepare)
+				panel_funcs->unprepare(state);
 		}
 	}
 
@@ -547,6 +562,9 @@ static int display_enable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 	int ret = 0;
 
 	display_init(state);
@@ -569,12 +587,18 @@ static int display_enable(struct display_state *state)
 			goto unprepare_crtc;
 	}
 
-	rockchip_panel_prepare(state);
+	if (panel_funcs->prepare) {
+		ret = panel_funcs->prepare(state);
+		if (ret) {
+			printf("failed to prepare panel\n");
+			goto unprepare_conn;
+		}
+	}
 
 	if (crtc_funcs->enable) {
 		ret = crtc_funcs->enable(state);
 		if (ret)
-			goto unprepare_conn;
+			goto unprepare_panel;
 	}
 
 	if (conn_funcs->enable) {
@@ -583,20 +607,33 @@ static int display_enable(struct display_state *state)
 			goto disable_crtc;
 	}
 
-	rockchip_panel_enable(state);
+	if (panel_funcs->enable) {
+		ret = panel_funcs->enable(state);
+		if (ret) {
+			printf("failed to enable panel\n");
+			goto disable_conn;
+		}
+	}
 
 	state->is_enable = true;
 
 	return 0;
+
+disable_conn:
+	if (conn_funcs->unprepare)
+		conn_funcs->unprepare(state);
+disable_crtc:
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
 unprepare_crtc:
 	if (crtc_funcs->unprepare)
 		crtc_funcs->unprepare(state);
+unprepare_panel:
+	if (panel_funcs->unprepare)
+		panel_funcs->unprepare(state);
 unprepare_conn:
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
-disable_crtc:
-	if (crtc_funcs->disable)
-		crtc_funcs->disable(state);
 	return ret;
 }
 
@@ -608,6 +645,9 @@ static int display_disable(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+	const struct rockchip_panel_funcs *panel_funcs = panel->funcs;
 
 	if (!state->is_init)
 		return 0;
@@ -615,7 +655,8 @@ static int display_disable(struct display_state *state)
 	if (!state->is_enable)
 		return 0;
 
-	rockchip_panel_disable(state);
+	if (panel_funcs->disable)
+		panel_funcs->disable(state);
 
 	if (crtc_funcs->disable)
 		crtc_funcs->disable(state);
@@ -623,7 +664,8 @@ static int display_disable(struct display_state *state)
 	if (conn_funcs->disable)
 		conn_funcs->disable(state);
 
-	rockchip_panel_unprepare(state);
+	if (panel_funcs->unprepare)
+		panel_funcs->unprepare(state);
 
 	if (conn_funcs->unprepare)
 		conn_funcs->unprepare(state);
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
deleted file mode 100755
index 95ffa3238e..0000000000
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <linux/media-bus-format.h>
-#include <dm/uclass.h>
-#include <dm/uclass-id.h>
-#include <video.h>
-#include <dm/device.h>
-#include <dm/uclass-internal.h>
-#include <backlight.h>
-#include <power/regulator.h>
-#include <asm/gpio.h>
-
-#include "rockchip_display.h"
-#include "rockchip_crtc.h"
-#include "rockchip_connector.h"
-#include "rockchip_panel.h"
-#include "rockchip_mipi_dsi.h"
-
-#define msleep(a)	udelay(a * 1000)
-
-struct dsi_ctrl_hdr {
-	u8 dtype;	/* data type */
-	u8 wait;	/* ms */
-	u8 dlen;	/* payload len */
-} __packed;
-
-struct dsi_cmd_desc {
-	struct dsi_ctrl_hdr dchdr;
-	u8 *payload;
-};
-
-struct dsi_panel_cmds {
-	u8 *buf;
-	int blen;
-	struct dsi_cmd_desc *cmds;
-	int cmd_cnt;
-};
-
-struct rockchip_dsi_panel {
-	struct udevice *dev;
-	const void *blob;
-	ofnode node;
-
-	int bus_format;
-
-	struct udevice *power_supply;
-	bool power_invert;
-	struct udevice *backlight;
-	struct gpio_desc enable;
-	struct gpio_desc reset;
-
-	unsigned int delay_reset;
-	unsigned int delay_prepare;
-	unsigned int delay_unprepare;
-	unsigned int delay_enable;
-	unsigned int delay_disable;
-	unsigned int delay_init;
-
-	struct dsi_panel_cmds *on_cmds;
-	struct dsi_panel_cmds *off_cmds;
-};
-
-static int rockchip_dsi_panel_parse_cmds(ofnode node,
-					 const u8 *data, int blen,
-					 struct dsi_panel_cmds *pcmds)
-{
-	int len;
-	u8 *buf, *bp;
-	struct dsi_ctrl_hdr *dchdr;
-	int i, cnt;
-
-	if (!pcmds)
-		return -EINVAL;
-
-	buf = malloc(sizeof(char) * blen);
-	if (!buf)
-		return -ENOMEM;
-
-	memcpy(buf, data, blen);
-
-	/* scan dcs commands */
-	bp = buf;
-	len = blen;
-	cnt = 0;
-	while (len > sizeof(*dchdr)) {
-		dchdr = (struct dsi_ctrl_hdr *)bp;
-		if (dchdr->dlen > len) {
-			printf("%s: dtsi cmd=%x error, len=%d",
-			       __func__, dchdr->dtype, dchdr->dlen);
-			free(buf);
-			return -ENOMEM;
-		}
-
-		bp += sizeof(*dchdr);
-		len -= sizeof(*dchdr);
-		bp += dchdr->dlen;
-		len -= dchdr->dlen;
-		cnt++;
-	}
-
-	if (len != 0) {
-		printf("%s: dcs_cmd=%x len=%d error!", __func__, buf[0], blen);
-		free(buf);
-		return -ENOMEM;
-	}
-
-	pcmds->cmds = malloc(cnt * sizeof(struct dsi_cmd_desc));
-	if (!pcmds->cmds) {
-		free(buf);
-		return -ENOMEM;
-	}
-
-	pcmds->cmd_cnt = cnt;
-	pcmds->buf = buf;
-	pcmds->blen = blen;
-
-	bp = buf;
-	len = blen;
-	for (i = 0; i < cnt; i++) {
-		dchdr = (struct dsi_ctrl_hdr *)bp;
-		len -= sizeof(*dchdr);
-		bp += sizeof(*dchdr);
-		pcmds->cmds[i].dchdr = *dchdr;
-		pcmds->cmds[i].payload = bp;
-		bp += dchdr->dlen;
-		len -= dchdr->dlen;
-	}
-
-	debug("%s: total_len=%d, cmd_cnt=%d\n",
-	      __func__, pcmds->blen, pcmds->cmd_cnt);
-	return 0;
-}
-
-static int rockchip_dsi_panel_send_cmds(struct display_state *state,
-					struct dsi_panel_cmds *cmds)
-{
-	int i, ret;
-
-	if (!cmds)
-		return -EINVAL;
-
-	for (i = 0; i < cmds->cmd_cnt; i++) {
-		switch (cmds->cmds[i].dchdr.dtype) {
-		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
-		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
-		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
-		case MIPI_DSI_GENERIC_LONG_WRITE:
-			ret = mipi_dsi_generic_write(state, cmds->cmds[i].payload,
-						     cmds->cmds[i].dchdr.dlen);
-			break;
-		case MIPI_DSI_DCS_SHORT_WRITE:
-		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
-		case MIPI_DSI_DCS_LONG_WRITE:
-			ret = mipi_dsi_dcs_write(state, cmds->cmds[i].payload,
-						 cmds->cmds[i].dchdr.dlen);
-			break;
-		default:
-			return -EINVAL;
-		}
-
-		if (ret)
-			printf("failed to write cmd%d: %d\n", i, ret);
-
-		if (cmds->cmds[i].dchdr.wait)
-			msleep(cmds->cmds[i].dchdr.wait);
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_prepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->power_supply) {
-		ret = regulator_set_enable(panel->power_supply,
-					   panel->power_invert);
-		if (ret)
-			printf("%s: failed to enable power_supply",
-			       __func__);
-	}
-
-	dm_gpio_set_value(&panel->enable, 1);
-	msleep(panel->delay_prepare);
-
-	dm_gpio_set_value(&panel->reset, 1);
-	msleep(panel->delay_reset);
-	dm_gpio_set_value(&panel->reset, 0);
-
-	msleep(panel->delay_init);
-
-	if (panel->on_cmds) {
-		ret = rockchip_dsi_panel_send_cmds(state, panel->on_cmds);
-		if (ret)
-			printf("failed to send on cmds: %d\n", ret);
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_unprepare(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->off_cmds) {
-		ret = rockchip_dsi_panel_send_cmds(state, panel->off_cmds);
-		if (ret)
-			printf("failed to send on cmds: %d\n", ret);
-	}
-
-	dm_gpio_set_value(&panel->reset, 0);
-
-	mdelay(panel->delay_unprepare);
-
-	dm_gpio_set_value(&panel->enable, 0);
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_enable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_enable(panel->backlight);
-		mdelay(panel->delay_enable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_disable(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-	int ret;
-
-	if (panel->backlight) {
-		ret = backlight_disable(panel->backlight);
-		mdelay(panel->delay_disable);
-		return ret;
-	}
-
-	return 0;
-}
-
-static int rockchip_dsi_panel_parse_dt(ofnode node, struct rockchip_dsi_panel *panel)
-{
-	const void *data;
-	int len = 0;
-	int ret = 0;
-
-	panel->delay_prepare = ofnode_read_u32_default(node, "prepare-delay-ms", 0);
-	panel->delay_unprepare = ofnode_read_u32_default(node, "unprepare-delay-ms", 0);
-	panel->delay_enable = ofnode_read_u32_default(node, "enable-delay-ms", 0);
-	panel->delay_disable = ofnode_read_u32_default(node, "disable-delay-ms", 0);
-	panel->delay_init = ofnode_read_u32_default(node, "init-delay-ms", 0);
-	panel->delay_reset = ofnode_read_u32_default(node, "reset-delay-ms", 0);
-	panel->bus_format = ofnode_read_u32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
-
-	data = ofnode_get_property(node, "panel-init-sequence", &len);
-	if (data) {
-		panel->on_cmds = malloc(sizeof(*panel->on_cmds));
-		if (!panel->on_cmds)
-			return -ENOMEM;
-
-		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
-						    panel->on_cmds);
-		if (ret) {
-			printf("failed to parse panel init sequence\n");
-			goto free_on_cmds;
-		}
-	}
-
-	data = ofnode_get_property(node, "panel-exit-sequence", &len);
-	if (data) {
-		panel->off_cmds = malloc(sizeof(*panel->off_cmds));
-		if (!panel->off_cmds) {
-			ret = -ENOMEM;
-			goto free_on_cmds;
-		}
-
-		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
-						    panel->off_cmds);
-		if (ret) {
-			printf("failed to parse panel exit sequence\n");
-			goto free_cmds;
-		}
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
-					   "backlight", &panel->backlight);
-	if (ret) {
-		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
-				   &panel->enable, GPIOD_IS_OUT);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	ret = gpio_request_by_name(panel->dev, "reset-gpios", 0,
-				   &panel->reset, GPIOD_IS_OUT);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Warning: cannot get reset GPIO: ret=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
-					   "power-supply",
-					   &panel->power_supply);
-	if (ret && ret != -ENOENT) {
-		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	panel->power_invert = !!ofnode_read_u32_default(node, "power_invert", 0);
-
-	/* keep panel blank on init. */
-	dm_gpio_set_value(&panel->enable, 0);
-	dm_gpio_set_value(&panel->reset, 0);
-
-	return 0;
-
-free_cmds:
-	free(panel->off_cmds);
-free_on_cmds:
-	free(panel->on_cmds);
-	return ret;
-}
-
-static int rockchip_dsi_panel_init(struct display_state *state)
-{
-	const void *blob = state->blob;
-	struct connector_state *conn_state = &state->conn_state;
-	struct panel_state *panel_state = &state->panel_state;
-	ofnode node = panel_state->node;
-	struct rockchip_dsi_panel *panel;
-	int ret;
-
-	panel = malloc(sizeof(*panel));
-	if (!panel)
-		return -ENOMEM;
-
-	memset(panel, 0, sizeof(*panel));
-
-	panel->blob = blob;
-	panel->node = node;
-	panel->dev = panel_state->dev;
-	panel_state->private = panel;
-
-	ret = rockchip_dsi_panel_parse_dt(node, panel);
-	if (ret) {
-		printf("%s: failed to parse DT\n", __func__);
-		free(panel);
-		return ret;
-	}
-
-	conn_state->bus_format = panel->bus_format;
-
-	return 0;
-}
-
-static void rockchip_dsi_panel_deinit(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	struct rockchip_dsi_panel *panel = panel_state->private;
-
-	if (panel->on_cmds) {
-		free(panel->on_cmds->buf);
-		free(panel->on_cmds->cmds);
-	}
-
-	if (panel->off_cmds) {
-		free(panel->off_cmds->buf);
-		free(panel->off_cmds->cmds);
-	}
-
-	free(panel);
-}
-
-const struct rockchip_panel_funcs rockchip_dsi_panel_funcs = {
-	.init		= rockchip_dsi_panel_init,
-	.deinit		= rockchip_dsi_panel_deinit,
-	.prepare	= rockchip_dsi_panel_prepare,
-	.unprepare	= rockchip_dsi_panel_unprepare,
-	.enable		= rockchip_dsi_panel_enable,
-	.disable	= rockchip_dsi_panel_disable,
-};
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index 5e0e85d7e1..69b056d062 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -4,193 +4,437 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
 #include <errno.h>
+#include <malloc.h>
+#include <video.h>
+#include <backlight.h>
+#include <asm/gpio.h>
 #include <dm/device.h>
+#include <dm/read.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+#include <linux/media-bus-format.h>
+#include <power/regulator.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
+#include "rockchip_mipi_dsi.h"
 #include "rockchip_panel.h"
 
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
-static const struct drm_display_mode auo_b125han03_mode = {
-	.clock = 146900,
-	.hdisplay = 1920,
-	.hsync_start = 1920 + 48,
-	.hsync_end = 1920 + 48 + 32,
-	.htotal = 1920 + 48 + 32 + 140,
-	.vdisplay = 1080,
-	.vsync_start = 1080 + 2,
-	.vsync_end = 1080 + 2 + 5,
-	.vtotal = 1080 + 2 + 5 + 57,
-	.vrefresh = 60,
-	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
-};
+struct rockchip_cmd_header {
+	u8 data_type;
+	u8 delay_ms;
+	u8 payload_length;
+} __packed;
 
-static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
-	.clock = 200000,
-	.hdisplay = 1536,
-	.hsync_start = 1536 + 12,
-	.hsync_end = 1536 + 12 + 16,
-	.htotal = 1536 + 12 + 16 + 48,
-	.vdisplay = 2048,
-	.vsync_start = 2048 + 8,
-	.vsync_end = 2048 + 8 + 4,
-	.vtotal = 2048 + 8 + 4 + 8,
-	.vrefresh = 60,
-	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+struct rockchip_cmd_desc {
+	struct rockchip_cmd_header header;
+	const u8 *payload;
 };
 
-static const struct rockchip_panel simple_panel_data = {
-	.funcs = &panel_simple_funcs,
+struct rockchip_panel_cmds {
+	struct rockchip_cmd_desc *cmds;
+	int cmd_cnt;
 };
 
-static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
-	.funcs = &panel_simple_funcs,
-	.data = &lg_lp079qx1_sp0v_mode,
+struct rockchip_panel_plat {
+	bool power_invert;
+	u32 bus_format;
+
+	struct {
+		unsigned int prepare;
+		unsigned int unprepare;
+		unsigned int enable;
+		unsigned int disable;
+		unsigned int reset;
+		unsigned int init;
+	} delay;
+
+	struct rockchip_panel_cmds *on_cmds;
+	struct rockchip_panel_cmds *off_cmds;
 };
 
-static const struct rockchip_panel auo_b125han03_data = {
-	.funcs = &panel_simple_funcs,
-	.data = &auo_b125han03_mode,
+struct rockchip_panel_priv {
+	bool prepared;
+	bool enabled;
+	struct udevice *power_supply;
+	struct udevice *backlight;
+	struct gpio_desc enable_gpio;
+	struct gpio_desc reset_gpio;
 };
-#endif
 
-#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
-static const struct rockchip_panel simple_panel_dsi_data = {
-	.funcs = &rockchip_dsi_panel_funcs,
-};
-#endif
+static int rockchip_panel_parse_cmds(const u8 *data, int length,
+				     struct rockchip_panel_cmds *pcmds)
+{
+	int len;
+	const u8 *buf;
+	const struct rockchip_cmd_header *header;
+	int i, cnt = 0;
+
+	/* scan commands */
+	cnt = 0;
+	buf = data;
+	len = length;
+	while (len > sizeof(*header)) {
+		header = (const struct rockchip_cmd_header *)buf;
+		buf += sizeof(*header) + header->payload_length;
+		len -= sizeof(*header) + header->payload_length;
+		cnt++;
+	}
 
-static const struct udevice_id rockchip_panel_ids[] = {
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
-	{
-		.compatible = "simple-panel",
-		.data = (ulong)&simple_panel_data,
-	}, {
-		.compatible = "lg,lp079qx1-sp0v",
-		.data = (ulong)&lg_lp079qx1_sp0v_data,
-	}, {
-		.compatible = "auo,b125han03",
-		.data = (ulong)&auo_b125han03_data,
-	},
-#endif
-#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
-	{
-		.compatible = "simple-panel-dsi",
-		.data = (ulong)&simple_panel_dsi_data,
-	},
-#endif
-	{}
-};
+	pcmds->cmds = calloc(cnt, sizeof(struct rockchip_cmd_desc));
+	if (!pcmds->cmds)
+		return -ENOMEM;
+
+	pcmds->cmd_cnt = cnt;
+
+	buf = data;
+	len = length;
+	for (i = 0; i < cnt; i++) {
+		struct rockchip_cmd_desc *desc = &pcmds->cmds[i];
+
+		header = (const struct rockchip_cmd_header *)buf;
+		length -= sizeof(*header);
+		buf += sizeof(*header);
+		desc->header.data_type = header->data_type;
+		desc->header.delay_ms = header->delay_ms;
+		desc->header.payload_length = header->payload_length;
+		desc->payload = buf;
+		buf += header->payload_length;
+		length -= header->payload_length;
+	}
 
-static int rockchip_panel_probe(struct udevice *dev)
-{
 	return 0;
 }
 
-static int rockchip_panel_bind(struct udevice *dev)
+static int rockchip_panel_send_cmds(struct display_state *state,
+				    struct rockchip_panel_cmds *cmds)
 {
+	int i, ret;
+
+	if (!cmds)
+		return -EINVAL;
+
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		struct rockchip_cmd_desc *desc = &cmds->cmds[i];
+
+		switch (desc->header.data_type) {
+		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+		case MIPI_DSI_GENERIC_LONG_WRITE:
+			ret = mipi_dsi_generic_write(state, desc->payload,
+						     desc->header.payload_length);
+			break;
+		case MIPI_DSI_DCS_SHORT_WRITE:
+		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+		case MIPI_DSI_DCS_LONG_WRITE:
+			ret = mipi_dsi_dcs_write(state, desc->payload,
+						 desc->header.payload_length);
+			break;
+		default:
+			printf("unsupport command data type: %d\n",
+			       desc->header.data_type);
+			return -EINVAL;
+		}
+
+		if (ret) {
+			printf("failed to write cmd%d: %d\n", i, ret);
+			return ret;
+		}
+
+		if (desc->header.delay_ms)
+			mdelay(desc->header.delay_ms);
+	}
+
 	return 0;
 }
 
-U_BOOT_DRIVER(rockchip_panel) = {
-	.name = "rockchip_panel",
-	.id = UCLASS_PANEL,
-	.of_match = rockchip_panel_ids,
-	.bind	= rockchip_panel_bind,
-	.probe	= rockchip_panel_probe,
-};
-
-const struct drm_display_mode *
-rockchip_get_display_mode_from_panel(struct display_state *state)
+static int rockchip_panel_prepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	int ret;
+
+	if (priv->prepared)
+		return 0;
+
+	if (priv->power_supply) {
+		ret = regulator_set_enable(priv->power_supply,
+					   !plat->power_invert);
+		if (ret) {
+			printf("%s: failed to enable power supply", __func__);
+			return ret;
+		}
+	}
 
-	if (!panel || !panel->data)
-		return NULL;
+	dm_gpio_set_value(&priv->enable_gpio, 1);
+	mdelay(plat->delay.prepare);
 
-	return (const struct drm_display_mode *)panel->data;
-}
+	dm_gpio_set_value(&priv->reset_gpio, 1);
+	mdelay(plat->delay.reset);
+	dm_gpio_set_value(&priv->reset_gpio, 0);
 
-int rockchip_panel_init(struct display_state *state)
-{
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	mdelay(plat->delay.init);
 
-	if (!panel || !panel->funcs || !panel->funcs->init) {
-		printf("%s: failed to find panel init funcs\n", __func__);
-		return -ENODEV;
+	if (plat->on_cmds) {
+		ret = rockchip_panel_send_cmds(state, plat->on_cmds);
+		if (ret)
+			printf("failed to send on cmds: %d\n", ret);
 	}
 
-	return panel->funcs->init(state);
+	priv->prepared = true;
+
+	return 0;
 }
 
-void rockchip_panel_deinit(struct display_state *state)
+static void rockchip_panel_unprepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
+	int ret;
 
-	if (!panel || !panel->funcs || !panel->funcs->deinit) {
-		printf("%s: failed to find panel deinit funcs\n", __func__);
+	if (!priv->prepared)
 		return;
+
+	if (plat->off_cmds) {
+		ret = rockchip_panel_send_cmds(state, plat->off_cmds);
+		if (ret)
+			printf("failed to send off cmds: %d\n", ret);
 	}
 
-	panel->funcs->deinit(state);
+	dm_gpio_set_value(&priv->reset_gpio, 1);
+	dm_gpio_set_value(&priv->enable_gpio, 0);
+
+	if (priv->power_supply) {
+		ret = regulator_set_enable(priv->power_supply,
+					   plat->power_invert);
+		if (ret)
+			printf("%s: failed to disable power supply", __func__);
+	}
+
+	mdelay(plat->delay.unprepare);
+
+	priv->prepared = false;
 }
 
-int rockchip_panel_prepare(struct display_state *state)
+static int rockchip_panel_enable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
 
-	if (!panel || !panel->funcs || !panel->funcs->prepare) {
-		printf("%s: failed to find panel prepare funcs\n", __func__);
-		return -ENODEV;
-	}
+	if (priv->enabled)
+		return 0;
+
+	mdelay(plat->delay.enable);
+
+	if (priv->backlight)
+		backlight_enable(priv->backlight);
 
-	return panel->funcs->prepare(state);
+	priv->enabled = true;
+
+	return 0;
 }
 
-int rockchip_panel_unprepare(struct display_state *state)
+static void rockchip_panel_disable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
+	struct rockchip_panel_priv *priv = dev_get_priv(panel_state->dev);
 
-	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
-		printf("%s: failed to find panel unprepare funcs\n", __func__);
-		return -ENODEV;
-	}
+	if (!priv->enabled)
+		return;
+
+	if (priv->backlight)
+		backlight_disable(priv->backlight);
+
+	mdelay(plat->delay.disable);
 
-	return panel->funcs->unprepare(state);
+	priv->enabled = false;
 }
 
-int rockchip_panel_enable(struct display_state *state)
+static int rockchip_panel_init(struct display_state *state)
 {
+	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_plat *plat = dev_get_platdata(panel_state->dev);
 
-	if (!panel || !panel->funcs || !panel->funcs->enable) {
-		printf("%s: failed to find panel prepare funcs\n", __func__);
-		return -ENODEV;
+	conn_state->bus_format = plat->bus_format;
+
+	return 0;
+}
+
+static const struct rockchip_panel_funcs rockchip_panel_funcs = {
+	.init = rockchip_panel_init,
+	.prepare = rockchip_panel_prepare,
+	.unprepare = rockchip_panel_unprepare,
+	.enable = rockchip_panel_enable,
+	.disable = rockchip_panel_disable,
+};
+
+static int rockchip_panel_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rockchip_panel_plat *plat = dev_get_platdata(dev);
+	const void *data;
+	int len = 0;
+	int ret;
+
+	plat->power_invert = dev_read_bool(dev, "power-invert");
+
+	plat->delay.prepare = dev_read_u32_default(dev, "prepare-delay-ms", 0);
+	plat->delay.unprepare = dev_read_u32_default(dev, "unprepare-delay-ms", 0);
+	plat->delay.enable = dev_read_u32_default(dev, "enable-delay-ms", 0);
+	plat->delay.disable = dev_read_u32_default(dev, "disable-delay-ms", 0);
+	plat->delay.init = dev_read_u32_default(dev, "init-delay-ms", 0);
+	plat->delay.reset = dev_read_u32_default(dev, "reset-delay-ms", 0);
+
+	plat->bus_format = dev_read_u32_default(dev, "bus-format",
+						MEDIA_BUS_FMT_RBG888_1X24);
+
+	data = dev_read_prop(dev, "panel-init-sequence", &len);
+	if (data) {
+		plat->on_cmds = calloc(1, sizeof(*plat->on_cmds));
+		if (!plat->on_cmds)
+			return -ENOMEM;
+
+		ret = rockchip_panel_parse_cmds(data, len, plat->on_cmds);
+		if (ret) {
+			printf("failed to parse panel init sequence\n");
+			goto free_on_cmds;
+		}
 	}
 
-	return panel->funcs->enable(state);
+	data = dev_read_prop(dev, "panel-exit-sequence", &len);
+	if (data) {
+		plat->off_cmds = calloc(1, sizeof(*plat->off_cmds));
+		if (!plat->off_cmds) {
+			ret = -ENOMEM;
+			goto free_on_cmds;
+		}
+
+		ret = rockchip_panel_parse_cmds(data, len, plat->off_cmds);
+		if (ret) {
+			printf("failed to parse panel exit sequence\n");
+			goto free_cmds;
+		}
+	}
+
+	return 0;
+
+free_cmds:
+	free(plat->off_cmds);
+free_on_cmds:
+	free(plat->on_cmds);
+	return ret;
 }
 
-int rockchip_panel_disable(struct display_state *state)
+static int rockchip_panel_probe(struct udevice *dev)
 {
-	struct panel_state *panel_state = &state->panel_state;
-	const struct rockchip_panel *panel = panel_state->panel;
+	struct rockchip_panel_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = gpio_request_by_name(dev, "enable-gpios", 0,
+				   &priv->enable_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get enable GPIO: %d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(dev, "reset-gpios", 0,
+				   &priv->reset_gpio, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get reset GPIO: %d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+					   "backlight", &priv->backlight);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get backlight: %d\n", __func__, ret);
+		return ret;
+	}
 
-	if (!panel || !panel->funcs || !panel->funcs->disable) {
-		printf("%s: failed to find panel disable funcs\n", __func__);
-		return -ENODEV;
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+					   "power-supply", &priv->power_supply);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get power supply: %d\n", __func__, ret);
+		return ret;
 	}
 
-	return panel->funcs->disable(state);
+	return 0;
 }
+
+static const struct drm_display_mode auo_b125han03_mode = {
+	.clock = 146900,
+	.hdisplay = 1920,
+	.hsync_start = 1920 + 48,
+	.hsync_end = 1920 + 48 + 32,
+	.htotal = 1920 + 48 + 32 + 140,
+	.vdisplay = 1080,
+	.vsync_start = 1080 + 2,
+	.vsync_end = 1080 + 2 + 5,
+	.vtotal = 1080 + 2 + 5 + 57,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct rockchip_panel auo_b125han03_data = {
+	.funcs = &rockchip_panel_funcs,
+	.data = &auo_b125han03_mode,
+};
+
+static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
+	.clock = 200000,
+	.hdisplay = 1536,
+	.hsync_start = 1536 + 12,
+	.hsync_end = 1536 + 12 + 16,
+	.htotal = 1536 + 12 + 16 + 48,
+	.vdisplay = 2048,
+	.vsync_start = 2048 + 8,
+	.vsync_end = 2048 + 8 + 4,
+	.vtotal = 2048 + 8 + 4 + 8,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
+	.funcs = &rockchip_panel_funcs,
+	.data = &lg_lp079qx1_sp0v_mode,
+};
+
+static const struct rockchip_panel rockchip_panel_data = {
+	.funcs = &rockchip_panel_funcs,
+};
+
+static const struct udevice_id rockchip_panel_ids[] = {
+	{
+		.compatible = "auo,b125han03",
+		.data = (ulong)&auo_b125han03_data,
+	}, {
+		.compatible = "lg,lp079qx1-sp0v",
+		.data = (ulong)&lg_lp079qx1_sp0v_data,
+	}, {
+		.compatible = "simple-panel",
+		.data = (ulong)&rockchip_panel_data,
+	}, {
+		.compatible = "simple-panel-dsi",
+		.data = (ulong)&rockchip_panel_data,
+	},
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_panel) = {
+	.name = "rockchip_panel",
+	.id = UCLASS_PANEL,
+	.of_match = rockchip_panel_ids,
+	.ofdata_to_platdata = rockchip_panel_ofdata_to_platdata,
+	.probe = rockchip_panel_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_panel_priv),
+	.platdata_auto_alloc_size = sizeof(struct rockchip_panel_plat),
+};
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index 1f4163ddff..c947c9e4c7 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -11,9 +11,9 @@ struct rockchip_panel_funcs {
 	int (*init)(struct display_state *state);
 	void (*deinit)(struct display_state *state);
 	int (*prepare)(struct display_state *state);
-	int (*unprepare)(struct display_state *state);
+	void (*unprepare)(struct display_state *state);
 	int (*enable)(struct display_state *state);
-	int (*disable)(struct display_state *state);
+	void (*disable)(struct display_state *state);
 };
 
 struct rockchip_panel {
@@ -21,20 +21,4 @@ struct rockchip_panel {
 	const void *data;
 };
 
-const struct rockchip_panel *rockchip_get_panel(const void *blob, int node);
-const struct drm_display_mode *
-rockchip_get_display_mode_from_panel(struct display_state *state);
-int rockchip_panel_init(struct display_state *state);
-void rockchip_panel_deinit(struct display_state *state);
-int rockchip_panel_enable(struct display_state *state);
-int rockchip_panel_disable(struct display_state *state);
-int rockchip_panel_prepare(struct display_state *state);
-int rockchip_panel_unprepare(struct display_state *state);
-
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
-extern const struct rockchip_panel_funcs panel_simple_funcs;
-#endif
-#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
-extern const struct rockchip_panel_funcs rockchip_dsi_panel_funcs;
-#endif
 #endif	/* _ROCKCHIP_PANEL_H_ */

commit cac6ce177760466e391694d52351bd4ddf3b4357
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Mar 5 15:13:39 2018 +0800

    video/drm: mipi-dphy: optimized power on/off sequences
    
    we can power off da_pwrok and bandgap to reduce power consumption.
    
    Change-Id: I0fa42d6d29ebd6f9347c9c4e868495df2bc07e05
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 7c054b90d9..78ea041ef7 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -21,6 +21,7 @@
 
 /* Innosilicon MIPI D-PHY registers */
 #define INNO_PHY_LANE_CTRL	0x00000
+#define MIPI_BGPD		BIT(7)
 #define CLK_LANE_EN_MASK	BIT(6)
 #define DATA_LANE_3_EN_MASK	BIT(5)
 #define DATA_LANE_2_EN_MASK	BIT(4)
@@ -31,6 +32,8 @@
 #define DATA_LANE_2_EN		BIT(4)
 #define DATA_LANE_1_EN		BIT(3)
 #define DATA_LANE_0_EN		BIT(2)
+#define PWROK_BP		BIT(1)
+#define PWROK			BIT(0)
 #define INNO_PHY_POWER_CTRL	0x00004
 #define ANALOG_RESET_MASK	BIT(2)
 #define ANALOG_RESET		BIT(2)
@@ -53,6 +56,8 @@
 #define DIGITAL_RESET_MASK	BIT(0)
 #define DIGITAL_NORMAL		BIT(0)
 #define DIGITAL_RESET		0
+#define INNO_PHY_LVDS_CTRL	0x003ac
+#define LVDS_BGPD		BIT(0)
 
 #define INNO_CLOCK_LANE_REG_BASE	0x00100
 #define INNO_DATA_LANE_0_REG_BASE	0x00180
@@ -462,11 +467,34 @@ static inline void inno_mipi_dphy_pll_ldo_enable(struct inno_mipi_dphy *inno)
 			 PLL_POWER_ON | LDO_POWER_ON);
 }
 
+static inline void inno_mipi_dphy_da_pwrok_enable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, PWROK_BP | PWROK, PWROK);
+}
+
+static inline void inno_mipi_dphy_da_pwrok_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, PWROK_BP | PWROK, PWROK_BP);
+}
+
+static inline void inno_mipi_dphy_bgpd_enable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, MIPI_BGPD, 0);
+}
+
+static inline void inno_mipi_dphy_bgpd_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, MIPI_BGPD, MIPI_BGPD);
+	inno_update_bits(inno, INNO_PHY_LVDS_CTRL, LVDS_BGPD, LVDS_BGPD);
+}
+
 static int inno_mipi_dphy_power_on(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct inno_mipi_dphy *inno = conn_state->phy_private;
 
+	inno_mipi_dphy_bgpd_enable(inno);
+	inno_mipi_dphy_da_pwrok_enable(inno);
 	inno_mipi_dphy_pll_ldo_enable(inno);
 	inno_mipi_dphy_lane_enable(inno);
 	inno_mipi_dphy_reset(inno);
@@ -488,6 +516,8 @@ static int inno_mipi_dphy_power_off(struct display_state *state)
 
 	inno_mipi_dphy_lane_disable(inno);
 	inno_mipi_dphy_pll_ldo_disable(inno);
+	inno_mipi_dphy_da_pwrok_disable(inno);
+	inno_mipi_dphy_bgpd_disable(inno);
 
 	return 0;
 }

commit 693b63de6ef39c1e4f9a33a2b9e90249a44311f8
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Mar 20 21:19:04 2018 +0800

    clk: Don't break when set default rate unsuccessfully
    
    Change-Id: I8073d6a68602aa5a8bc79accb13e95fcb2142cfa
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 2db84c1297..46c690ee79 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -190,7 +190,7 @@ static int clk_set_default_rates(struct udevice *dev)
 		if (ret < 0) {
 			debug("%s: failed to set rate on clock %d for %s\n",
 			      __func__, index, dev_read_name(dev));
-			break;
+			continue;
 		}
 	}
 

commit f91572913ea05d9665789828eeec562348f29ff9
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 21 11:14:54 2018 +0800

    clk: rockchip: px30: Fix saradc div mask
    
    Change-Id: I79ecf32b78b9c4b71fa7f03ef3fa4ca80a80e70d
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index d4e3bfa560..64446d3eb2 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -486,7 +486,7 @@ static ulong px30_saradc_get_clk(struct px30_cru *cru)
 	u32 div, con;
 
 	con = readl(&cru->clksel_con[55]);
-	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_SARADC_DIV_CON_MASK;
 
 	return DIV_TO_RATE(OSC_HZ, div);
 }

commit 81c94adb24d09b7be07ba1a89e973d150c6cd2bf
Author: qiujian <qiujian@rock-chips.com>
Date:   Wed Mar 21 09:10:44 2018 +0800

    rk3326: enable optee v2
    
    use security partition storage
    
    Change-Id: I977e70b5d09d10438ba58aed3872579d4e517be8
    Signed-off-by: qiujian <qiujian@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index ff9a228208..8a33028559 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -88,4 +88,7 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V2=y
+CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y
 CONFIG_TEST_ROCKCHIP=y

commit 98cc3d23a5bc5d999a0b04a623704ed65d2c9c08
Author: qiujian <qiujian@rock-chips.com>
Date:   Tue Mar 20 09:09:53 2018 +0800

    px30: support emmc rpmb
    
    Change-Id: Ie7fd2b747c2d5ad59e843a88d73396dfc796c9ae
    Signed-off-by: qiujian <qiujian@rock-chips.com>

diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index b54fb7fd9c..ae92c55fdb 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -17,6 +17,7 @@
 
 #undef CONFIG_CONSOLE_SCROLL_LINES
 #define CONFIG_CONSOLE_SCROLL_LINES		10
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND

commit 91c73fb4d1535d65289ad40582d4ae8ca3067b44
Author: qiujian <qiujian@rock-chips.com>
Date:   Mon Mar 19 14:39:06 2018 +0800

    lib: optee_client:Support attestation
    
     Add methods to read attestation key from the misc partition of
     last 64K, store key and certificate chain data in secure storage.
    
     When CONFIG_OPTEE_CLIENT is defined,
     uboot support load attestation data.
    
    Change-Id: I8f3bd7096a7856de9e58d294822a818d5fe380ba
    Signed-off-by: qiujian <qiujian@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index c64a3c5978..04b81b373a 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <android_bootloader.h>
+#include <attestation_key.h>
 #include <boot_rkimg.h>
 
 static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
@@ -18,6 +19,19 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 	int ret = 0;
 
 	dev_desc = rockchip_get_bootdev();
+
+#ifdef CONFIG_OPTEE_CLIENT
+	disk_partition_t misc_part_info;
+
+	/* load attestation key from misc partition. */
+	ret = part_get_info_by_name(dev_desc, "misc",
+				    &misc_part_info);
+	if (ret < 0)
+		printf("%s Could not find misc partition\n", __func__);
+	else
+		load_attestation_key(dev_desc, &misc_part_info);
+#endif
+
 	mode = rockchip_get_boot_mode();
 	if (mode == BOOT_MODE_RECOVERY) {
 		boot_partname = PART_RECOVERY;
diff --git a/common/Makefile b/common/Makefile
index eded2f1d78..49b434923d 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -138,3 +138,5 @@ obj-$(CONFIG_$(SPL_)LOG) += log.o
 obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
+
+obj-$(CONFIG_OPTEE_CLIENT) += attestation_key.o
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 725541c642..669c057ee7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -15,6 +15,7 @@
 #include <malloc.h>
 #include <fs.h>
 #include <boot_rkimg.h>
+#include <attestation_key.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_MISC "misc"
@@ -480,6 +481,12 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 					 &misc_part_info);
 	if (part_num < 0)
 		printf("%s Could not find misc partition\n", __func__);
+
+#ifdef CONFIG_OPTEE_CLIENT
+	/* load attestation key from misc partition. */
+	load_attestation_key(dev_desc, &misc_part_info);
+#endif
+
 	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
diff --git a/common/attestation_key.c b/common/attestation_key.c
new file mode 100644
index 0000000000..675e48a19b
--- /dev/null
+++ b/common/attestation_key.c
@@ -0,0 +1,381 @@
+/*
+ * Copyright 2018, Rockchip Electronics Co., Ltd
+ * qiujian, <qiujian@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include "attestation_key.h"
+
+#include <common.h>
+#include <malloc.h>
+
+#include <optee_include/OpteeClientApiLib.h>
+
+/* attestation data offset*/
+#define ATTESTATION_DATA_OFFSET  65536
+
+/* block size */
+#define ATTESTATION_DATA_BLOCK_SIZE 512
+
+/* attestation data block offset */
+#define ATTESTATION_DATA_BLOCK_OFFSET (ATTESTATION_DATA_OFFSET / ATTESTATION_DATA_BLOCK_SIZE)
+
+#define ATAP_BLOB_LEN_MAX 2048
+#define ATAP_CERT_CHAIN_LEN_MAX 8192
+#define ATAP_CERT_CHAIN_ENTRIES_MAX 8
+
+/*
+ * Name of the attestation key file is
+ * ATTESTATION_KEY_PREFIX.%algorithm,
+ * where algorithm is either "EC" or "RSA"
+ */
+#define ATTESTATION_KEY_PREFIX "PrivateKey"
+
+/*
+ * Name of the attestation certificate file is
+ * ATTESTATION_CERT_PREFIX.%algorithm.%index,
+ * where index is the index within the certificate chain.
+ */
+#define ATTESTATION_CERT_PREFIX "CertificateChain"
+
+/* Maximum file name size.*/
+#define STORAGE_ID_LENGTH_MAX  64
+
+typedef enum{
+	KM_ALGORITHM_RSA = 1,
+	KM_ALGORITHM_EC = 3,
+} keymaster_algorithm_t;
+
+typedef struct {
+	uint8_t *data;
+	uint32_t data_length;
+} atap_blob;
+
+typedef struct {
+	atap_blob entries[ATAP_CERT_CHAIN_ENTRIES_MAX];
+	uint32_t entry_count;
+} atap_certchain;
+
+uint32_t write_to_keymaster(uint8_t *filename, uint32_t filename_size,
+				uint8_t *data, uint32_t data_size);
+
+static const char *get_keyslot_str(keymaster_algorithm_t key_type)
+{
+	switch (key_type) {
+	case KM_ALGORITHM_RSA:
+		return "RSA";
+	case KM_ALGORITHM_EC:
+		return "EC";
+	default:
+		return "";
+	}
+}
+
+static void free_blob(atap_blob blob)
+{
+	if (blob.data)
+		free(blob.data);
+
+	blob.data_length = 0;
+}
+
+static void free_cert_chain(atap_certchain cert_chain)
+{
+	unsigned int i = 0;
+
+	for (i = 0; i < cert_chain.entry_count; ++i) {
+		if (cert_chain.entries[i].data)
+			free(cert_chain.entries[i].data);
+
+		cert_chain.entries[i].data_length = 0;
+	}
+	memset(&cert_chain, 0, sizeof(atap_certchain));
+}
+
+static void copy_from_buf(uint8_t **buf_ptr, void *data, uint32_t data_size)
+{
+	memcpy(data, *buf_ptr, data_size);
+	*buf_ptr += data_size;
+}
+
+static void copy_uint32_from_buf(uint8_t **buf_ptr, uint32_t *x)
+{
+	copy_from_buf(buf_ptr, x, sizeof(uint32_t));
+}
+
+static bool copy_blob_from_buf(uint8_t **buf_ptr, atap_blob *blob)
+{
+	memset(blob, 0, sizeof(atap_blob));
+	copy_uint32_from_buf(buf_ptr, &blob->data_length);
+
+	if (blob->data_length > ATAP_BLOB_LEN_MAX)
+		return false;
+
+	if (blob->data_length) {
+		blob->data = (uint8_t *) malloc(blob->data_length);
+		if (blob->data == NULL)
+			return false;
+
+		copy_from_buf(buf_ptr, blob->data, blob->data_length);
+	}
+	return true;
+}
+
+static bool copy_cert_chain_from_buf(uint8_t **buf_ptr,
+					atap_certchain *cert_chain)
+{
+	uint32_t cert_chain_size = 0;
+	int32_t bytes_remaining = 0;
+	size_t i = 0;
+	bool retval = true;
+
+	memset(cert_chain, 0, sizeof(atap_certchain));
+
+	/* Copy size of cert chain, as it is a Variable field. */
+	copy_from_buf(buf_ptr, &cert_chain_size, sizeof(cert_chain_size));
+
+	if (cert_chain_size > ATAP_CERT_CHAIN_LEN_MAX)
+		return false;
+
+	if (cert_chain_size == 0)
+		return true;
+
+	bytes_remaining = cert_chain_size;
+	for (i = 0; i < ATAP_CERT_CHAIN_ENTRIES_MAX; ++i) {
+		if (!copy_blob_from_buf(buf_ptr, &cert_chain->entries[i])) {
+			retval = false;
+			break;
+		}
+
+		++cert_chain->entry_count;
+		bytes_remaining -= (sizeof(uint32_t) +
+					cert_chain->entries[i].data_length);
+
+		if (bytes_remaining <= 0) {
+			retval = (bytes_remaining == 0);
+			break;
+		}
+	}
+	if (retval == false)
+		free_cert_chain(*cert_chain);
+
+	return retval;
+}
+
+/* validate attestation data head. */
+static bool validate_ca_header(const uint8_t *buf, uint32_t buf_size)
+{
+
+	if (buf[0] != 'C' || buf[1] != 'A' || buf[2] != 0)
+		return false;
+
+	uint32_t data_size;
+
+	memcpy(&data_size, buf + 3, sizeof(uint32_t));
+
+	if (data_size <= 0 || data_size > ATTESTATION_DATA_OFFSET) {
+		printf("invalide data_size:%d\n", data_size);
+		return false;
+	}
+
+	uint32_t real_size;
+
+	memcpy(&real_size, buf + 3 + sizeof(uint32_t), sizeof(uint32_t));
+	if (real_size <= 0 || real_size > data_size) {
+		printf("invalide real_size:%d\n", real_size);
+		return false;
+	}
+	return true;
+}
+
+/* write key to security storage. */
+static uint32_t write_key(keymaster_algorithm_t key_type,
+				const uint8_t *key, uint32_t key_size)
+{
+	char key_file[STORAGE_ID_LENGTH_MAX] = {0};
+
+	snprintf(key_file, STORAGE_ID_LENGTH_MAX, "%s.%s", ATTESTATION_KEY_PREFIX,
+		get_keyslot_str(key_type));
+	write_to_keymaster((uint8_t *)key_file, strlen(key_file),
+				(uint8_t *)key, key_size);
+	return 0;
+}
+
+/* write cert to security storage. */
+static uint32_t write_cert(keymaster_algorithm_t key_type, const uint8_t *cert,
+				uint32_t cert_size, uint32_t index)
+{
+	char cert_file[STORAGE_ID_LENGTH_MAX] = {0};
+
+	snprintf(cert_file, STORAGE_ID_LENGTH_MAX, "%s.%s.%d", ATTESTATION_CERT_PREFIX,
+		get_keyslot_str(key_type), index);
+	write_to_keymaster((uint8_t *)cert_file, strlen(cert_file),
+				(uint8_t *)cert, cert_size);
+	return 0;
+}
+
+/* write cert chain length to security storage. */
+static uint32_t write_cert_chain_length(keymaster_algorithm_t key_type,
+				uint8_t chain_len)
+{
+	char cert_chain_length_file[STORAGE_ID_LENGTH_MAX] = {0};
+	uint8_t data = chain_len;
+	uint32_t len = 1;
+
+	snprintf(cert_chain_length_file, STORAGE_ID_LENGTH_MAX, "%s.%s.length",
+		ATTESTATION_CERT_PREFIX, get_keyslot_str(key_type));
+	write_to_keymaster((uint8_t *)cert_chain_length_file,
+				strlen(cert_chain_length_file), &data, len);
+
+	return 0;
+}
+
+atap_result load_attestation_key(struct blk_desc *dev_desc,
+				disk_partition_t *misc_partition)
+{
+	int ret;
+
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return ATAP_RESULT_ERROR_DEVICE_NOT_FOUND;
+	}
+
+	if (misc_partition == NULL) {
+		printf("misc partition not found!\n");
+		return ATAP_RESULT_ERROR_PARTITION_NOT_FOUND;
+	}
+
+	/* get attestation data offset from misc partition */
+	lbaint_t key_offset = misc_partition->start +
+				misc_partition->size - ATTESTATION_DATA_BLOCK_OFFSET;
+
+	/* read ca head from attestation data offset */
+	uint8_t ca_headr[ATTESTATION_DATA_BLOCK_SIZE];
+
+	ret = blk_dread(dev_desc, key_offset, 1, ca_headr);
+	if (ret != 1) {
+		printf("failed to read ca head from misc\n");
+		return ATAP_RESULT_ERROR_BLOCK_READ;
+	}
+
+	if (!validate_ca_header(ca_headr, sizeof(ca_headr))) {
+		printf("ca head not found\n");
+		return ATAP_RESULT_ERROR_INVALID_HEAD;
+	}
+
+	/* get attestation data size from ca head */
+	uint32_t real_size;
+
+	memcpy(&real_size, ca_headr + 3 + sizeof(uint32_t), sizeof(uint32_t));
+
+	/* calculate real block size of attestation data */
+	int real_block_num = real_size / ATTESTATION_DATA_BLOCK_SIZE;
+
+	if (real_size % ATTESTATION_DATA_BLOCK_SIZE != 0)
+		real_block_num++;
+
+	unsigned char keybuf[ATTESTATION_DATA_OFFSET] = {0};
+
+	/* check block size */
+	if (real_block_num <= 0 || real_block_num > ATTESTATION_DATA_BLOCK_OFFSET) {
+		printf("invalidate real_block_num:%d\n", real_block_num);
+		return ATAP_RESULT_ERROR_INVALID_BLOCK_NUM;
+	}
+
+	/* read all attestation data from misc */
+	if (blk_dread(dev_desc, key_offset, real_block_num, keybuf) != real_block_num) {
+		printf("failed to read misc key\n");
+		return ATAP_RESULT_ERROR_BLOCK_READ;
+	}
+
+	/* read device id from buf*/
+	uint32_t device_id_size = 0;
+	uint8_t device_id[32] = {0};
+
+	memcpy(&device_id_size, keybuf + 16, sizeof(uint32_t));
+	if (device_id_size < 0 || device_id_size > sizeof(device_id)) {
+		printf("invalidate device_id_size:%d\n", device_id_size);
+		return ATAP_RESULT_ERROR_INVALID_DEVICE_ID;
+	}
+
+	memcpy(device_id, keybuf + 16 + sizeof(uint32_t), device_id_size);
+	debug("device_id:%s\n", device_id);
+
+	/* read algorithm from buf */
+	uint8_t *key_buf = keybuf + 16 + sizeof(uint32_t) + device_id_size;
+	uint32_t algorithm;
+
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	debug("\n algorithm:%d\n", algorithm);
+
+	/* read rsa private key */
+	atap_blob key;
+
+	if (copy_blob_from_buf(&key_buf, &key) == false) {
+		printf("copy_blob_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	/* write rsa private key to security storage*/
+	write_key(KM_ALGORITHM_RSA, key.data, key.data_length);
+
+	/* read rsa cert chain */
+	atap_certchain certchain;
+
+	if (copy_cert_chain_from_buf(&key_buf, &certchain) == false) {
+		printf("copy_cert_chain_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+
+	/* write rsa cert chain size to security storage*/
+	write_cert_chain_length(KM_ALGORITHM_RSA,
+				(uint8_t) certchain.entry_count);
+
+	/* write rsa cert chain data to security storage*/
+	int i = 0;
+
+	for (i = 0; i < certchain.entry_count; ++i) {
+		write_cert(KM_ALGORITHM_RSA, certchain.entries[i].data,
+			certchain.entries[i].data_length, i);
+	}
+
+	/* read ec algorithm */
+	copy_uint32_from_buf(&key_buf, &algorithm);
+	debug("\n algorithm:%d\n", algorithm);
+
+	/* read ec private key */
+	free_blob(key);
+	if (copy_blob_from_buf(&key_buf, &key) == false) {
+		printf("copy_blob_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+
+	/* write ec private key to security storage*/
+	write_key(KM_ALGORITHM_EC, key.data, key.data_length);
+
+	/* read ec cert chain */
+	free_cert_chain(certchain);
+	if (copy_cert_chain_from_buf(&key_buf, &certchain) == false) {
+		printf("copy_cert_chain_from_buf failed!\n");
+		return ATAP_RESULT_ERROR_BUF_COPY;
+	}
+	/* write ec cert chain size to security storage*/
+	write_cert_chain_length(KM_ALGORITHM_EC,
+					(uint8_t) certchain.entry_count);
+
+	/* write ec cert chain to security storage*/
+	for (i = 0; i < certchain.entry_count; ++i) {
+		write_cert(KM_ALGORITHM_EC, certchain.entries[i].data,
+			certchain.entries[i].data_length, i);
+	}
+
+	memset(keybuf, 0, sizeof(keybuf));
+
+	/* wipe attestation data from misc*/
+	if (blk_dwrite(dev_desc, key_offset, real_block_num, keybuf) != real_block_num) {
+		printf("StorageWriteLba failed\n");
+		return ATAP_RESULT_ERROR_BLOCK_WRITE;
+	}
+
+	return ATAP_RESULT_OK;
+}
diff --git a/include/attestation_key.h b/include/attestation_key.h
new file mode 100644
index 0000000000..0eb09069f2
--- /dev/null
+++ b/include/attestation_key.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2018, Rockchip Electronics Co., Ltd
+ * qiujian, <qiujian@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef ATTESTATION_KEY_H_
+#define ATTESTATION_KEY_H_
+
+#include <common.h>
+
+typedef enum {
+	ATAP_RESULT_OK,
+	ATAP_RESULT_ERROR_DEVICE_NOT_FOUND,
+	ATAP_RESULT_ERROR_PARTITION_NOT_FOUND,
+	ATAP_RESULT_ERROR_BLOCK_READ,
+	ATAP_RESULT_ERROR_BLOCK_WRITE,
+	ATAP_RESULT_ERROR_INVALID_HEAD,
+	ATAP_RESULT_ERROR_INVALID_BLOCK_NUM,
+	ATAP_RESULT_ERROR_INVALID_DEVICE_ID,
+	ATAP_RESULT_ERROR_BUF_COPY,
+	ATAP_RESULT_ERROR_STORAGE,
+} atap_result;
+
+/* load attestation key from misc partition. */
+atap_result load_attestation_key(struct blk_desc *dev_desc,
+				disk_partition_t *misc_partition);
+
+#endif	//ATTESTATION_KEY_H_

commit 3251364c8e16e8346c2edf3a3454739af0dc03aa
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Mar 19 08:58:50 2018 +0800

    lib: optee_client: support rk file system for optee v2
    
    uboot can secure store data to nand or emmc "security"
    partition for optee v2
    
    Change-Id: I85abbfb3970a2fa3f46f540d3f16dfc7ca605317
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs-v2.h b/include/optee_include/OpteeClientRkFs-v2.h
new file mode 100644
index 0000000000..a8ee4d6c5b
--- /dev/null
+++ b/include/optee_include/OpteeClientRkFs-v2.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef TEE_SUPP_RK_FS_H
+#define TEE_SUPP_RK_FS_H
+
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MASK		0xff
+#define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT	1
+#define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT	2
+#define TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INOUT	3	/* input and output */
+
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT	5
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT	6
+#define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT	7	/* input and output */
+
+struct tee_ioctl_param_memref {
+	uint64_t shm_offs;
+	uint64_t size;
+	int64_t shm_id;
+};
+
+struct tee_ioctl_param_value {
+	uint64_t a;
+	uint64_t b;
+	uint64_t c;
+};
+
+struct tee_ioctl_param {
+	uint64_t attr;
+	union {
+		struct tee_ioctl_param_memref memref;
+		struct tee_ioctl_param_value value;
+	} u;
+};
+
+struct tee_ioctl_param;
+
+struct blk_desc *rockchip_get_bootdev(void);
+int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
+			disk_partition_t *info);
+unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
+			lbaint_t blkcnt, void *buffer);
+unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
+			lbaint_t blkcnt, const void *buffer);
+
+int tee_supp_rk_fs_init(void);
+
+int tee_supp_rk_fs_process(size_t num_params,
+			struct tee_ioctl_param *params);
+void OpteeClientRkFsInit(void);
+
+#endif
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 05d1133ee3..66cda56bd1 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ
diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index 8689af11cb..c0e5565ddc 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -22,3 +22,10 @@ config OPTEE_V2
 	  be use in android bootloader a/b and avb
 	  step.
 
+config OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	bool "Support use emmc security partition for OPTEE version 2.0"
+	depends on OPTEE_V2
+	help
+	  U-boot can secure store data to security partition
+	  for nand or emmc, do not to store data to rpmb.
+
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 888fda324d..989dfc2b72 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -9,9 +9,9 @@ obj-y += OpteeClientInterface.o
 obj-y += OpteeClientSMC.o
 obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
-obj-y += OpteeClientRkFs.o
 
 ifdef CONFIG_OPTEE_V1
+obj-y += OpteeClientRkFs.o
 obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
@@ -19,6 +19,7 @@ lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/2
 endif
 
 ifdef CONFIG_OPTEE_V2
+obj-y += OpteeClientRkFs-v2.o
 obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index f1d8fe90a1..1a2c23f0ca 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/tee_client_api.h>
+#include <boot_rkimg.h>
 
 void test_optee(void)
 {
@@ -19,18 +20,35 @@ void test_optee(void)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -116,18 +134,36 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 	TEEC_Operation TeecOperation = {0};
 	uint8_t hs[9];
 
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
+
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -186,17 +222,35 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 	uint8_t hs[9];
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
+
 	b2hs((uint8_t *)&slot, hs, 4, 9);
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -256,18 +310,35 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -323,18 +394,35 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -391,19 +479,35 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -459,18 +563,35 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -527,19 +648,35 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
 
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -596,18 +733,35 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -668,18 +822,35 @@ uint32_t write_to_keymaster(uint8_t *filename,
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("write_to_keymaster\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1095,18 +1266,35 @@ uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1161,18 +1349,35 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	debug("testmm start\n");
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				&TeecSession,
 				TeecUuid,
 				TEEC_LOGIN_PUBLIC,
 				NULL,
+#ifdef CONFIG_OPTEE_V1
 				NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+				&TeecOperation,
+#endif
 				&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1231,17 +1436,34 @@ uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
 			     };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				      &TeecSession,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-				      NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1288,17 +1510,34 @@ uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
 			     };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				      &TeecSession,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-				      NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1352,17 +1591,34 @@ uint32_t trusty_attest_get_ca(uint8_t *operation_start,
 
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	OpteeClientApiLibInitialize();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
 				      &TeecSession,
 				      TeecUuid,
 				      TEEC_LOGIN_PUBLIC,
 				      NULL,
-				      NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
 				      &ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
@@ -1418,16 +1674,33 @@ uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
 			     };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
+	struct blk_desc *dev_desc;
+	dev_desc = rockchip_get_bootdev();
 
 	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
 
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_VALUE_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+	/*0 nand or emmc "security" partition , 1 rpmb*/
+	TeecOperation.params[0].value.a = (dev_desc->if_type == IF_TYPE_MMC) ? 1 : 0;
+#ifdef CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION
+	TeecOperation.params[0].value.a = 0;
+#endif
+
 	TeecResult = TEEC_OpenSession(&TeecContext,
-				      &TeecSession,
-				      TeecUuid,
-				      TEEC_LOGIN_PUBLIC,
-				      NULL,
-				      NULL,
-				      &ErrorOrigin);
+					&TeecSession,
+					TeecUuid,
+					TEEC_LOGIN_PUBLIC,
+					NULL,
+#ifdef CONFIG_OPTEE_V1
+					NULL,
+#endif
+#ifdef CONFIG_OPTEE_V2
+					&TeecOperation,
+#endif
+					&ErrorOrigin);
 
 	TEEC_SharedMemory SharedMem0 = {0};
 
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 3072381391..5f07f84d31 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -16,7 +16,12 @@
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
 #include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+#ifdef CONFIG_OPTEE_V1
 #include <optee_include/OpteeClientRkFs.h>
+#endif
+#ifdef CONFIG_OPTEE_V2
+#include <optee_include/OpteeClientRkFs-v2.h>
+#endif
 
 /*
  * Memory allocation.
@@ -482,8 +487,14 @@ TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 	t_teesmc32_param *TeeSmc32Param;
 
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+#ifdef CONFIG_OPTEE_V1
 	TeecResult = tee_supp_rk_fs_process((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
 							TeeSmc32Param[0].u.memref.size);
+#endif
+#ifdef CONFIG_OPTEE_V2
+	TeecResult = tee_supp_rk_fs_process((size_t)TeeSmc32Arg->num_params,
+							(struct tee_ioctl_param *)TeeSmc32Param);
+#endif
 
 	return TeecResult;
 }
@@ -619,6 +630,11 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
 			break;
 		}
+		case OPTEE_MSG_RPC_CMD_FS_V2: {
+			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
+			TeeSmc32Arg->ret = TEEC_SUCCESS;
+			break;
+		}
 		case OPTEE_MSG_RPC_CMD_LOAD_TA_V2: {
 			TeecResult = OpteeRpcCmdLoadV2Ta(TeeSmc32Arg);
 			break;
diff --git a/lib/optee_clientApi/OpteeClientRkFs-v2.c b/lib/optee_clientApi/OpteeClientRkFs-v2.c
new file mode 100644
index 0000000000..f771116fbc
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRkFs-v2.c
@@ -0,0 +1,1316 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+#include <optee_include/OpteeClientRkFs-v2.h>
+#include <optee_include/tee_client_api.h>
+
+/*
+ *#define DEBUG_RKFSS
+ *#define DEBUG_CLEAN_RKSS
+ */
+
+/*
+ * Operations and defines shared with TEE.
+ */
+#define OPTEE_MRF_OPEN			0
+#define OPTEE_MRF_CREATE		1
+#define OPTEE_MRF_CLOSE			2
+#define OPTEE_MRF_READ			3
+#define OPTEE_MRF_WRITE			4
+#define OPTEE_MRF_TRUNCATE		5
+#define OPTEE_MRF_REMOVE		6
+#define OPTEE_MRF_RENAME		7
+#define OPTEE_MRF_OPENDIR		8
+#define OPTEE_MRF_CLOSEDIR		9
+#define OPTEE_MRF_READDIR		10
+
+/*
+ * Open flags, defines shared with TEE.
+ */
+#define TEE_FS_O_RDONLY 0x1
+#define TEE_FS_O_WRONLY 0x2
+#define TEE_FS_O_RDWR   0x4
+#define TEE_FS_O_CREAT  0x8
+#define TEE_FS_O_EXCL   0x10
+#define TEE_FS_O_APPEND 0x20
+
+/*
+ * Seek flags, defines shared with TEE.
+ */
+#define TEE_FS_SEEK_SET 0x1
+#define TEE_FS_SEEK_END 0x2
+#define TEE_FS_SEEK_CUR 0x4
+
+/*
+ * Mkdir flags, defines shared with TEE.
+ */
+#define TEE_FS_S_IWUSR 0x1
+#define TEE_FS_S_IRUSR 0x2
+
+/*
+ * Access flags, X_OK not supported, defines shared with TEE.
+ */
+#define TEE_FS_R_OK    0x1
+#define TEE_FS_W_OK    0x2
+#define TEE_FS_F_OK    0x4
+
+/*
+ *	RK Secure Storage Ctrl
+ *		Storage Size : 512 kb
+ *		Header Size : 8 byte * 2 for each top of 512 byte
+ *		Partision Table Size : 128 * 512 b (24 Files And Folder)
+ *		File number: 128 * 4 = 512
+ *		Data Size : 895 * 512 b
+ *
+ *	------ RKSS Structure --------
+ *	- 512 byte patition table1 [0]
+ *		- 126 * 4 = 504 byte table info
+ *		- 8 byte verification
+ *	- 512 byte patition table2 [1]
+ *	             ...
+ *	- 512 byte patition table128 [127]
+ *	- 512 byte section used refs [128]
+ *		- 1 byte = 2 flag
+ *	- 895 * 512 byte data	[129 - 1023]
+ *	------------------------------
+ *
+ */
+#define RKSS_DATA_SECTION_COUNT		1024
+#define RKSS_DATA_LEN			512
+#define RKSS_PARTITION_TABLE_COUNT	128		/* total size 512 * 128*/
+#define RKSS_EACH_FILEFOLDER_COUNT	4		/* 504 / 126 = 4*/
+#define RKSS_NAME_MAX_LENGTH		117		/* 116 char + "\0"*/
+#define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+
+#define RK_FS_R    0x1
+#define RK_FS_W    0x2
+#define RK_FS_D    0x8
+
+typedef struct rkss_file_info {
+	uint8_t		used;
+	char 		name[RKSS_NAME_MAX_LENGTH];
+	uint16_t	index;	/* from 129 to 1023*/
+	uint16_t	size;	/* size of data*/
+	uint16_t	father;
+	uint8_t 	id; /* file folder count index*/
+	uint8_t		flags;
+} rkss_file_info; /* 126 byte for each*/
+
+#define RKSS_VERSION		((uint32_t)0x1)
+#define RKSS_CHECK_STR	((uint32_t)0x12345678)
+#define RKSS_CHECK_PT		((uint8_t)0xFC)
+typedef struct rkss_file_verification {
+	uint32_t version;
+	uint32_t checkstr;
+} rkss_file_verification;
+
+typedef struct rk_secure_storage {
+	unsigned long index;
+	unsigned char data[RKSS_DATA_LEN];
+} rk_secure_storage;
+
+/* Path to all secure storage dev. */
+#define RKSS_DEV_NAND "/dev/block/rknand_security"
+#define RKSS_DEV_EMMC "/dev/block/by-name/security"
+
+/* Function Defines */
+#define UNREFERENCED_PARAMETER(P) (P = P)
+#define CHECKFLAG(flags, flag) (flags & flag)
+#define ADDFLAG(flags, flag) (flags | flag)
+
+/* RK Secure Storage Calls */
+static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
+static int dir_num;
+static int dir_seek;
+
+static int rkss_read_section(struct rk_secure_storage *rkss)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret != 1) {
+		printf("blk_dread fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_write_section(struct rk_secure_storage *rkss)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret != 1) {
+		printf("blk_dwrite fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_read_patition_tables(unsigned char *data)
+{
+	unsigned long ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = blk_dread(dev_desc, part_info.start, RKSS_PARTITION_TABLE_COUNT, data);
+	if (ret != RKSS_PARTITION_TABLE_COUNT) {
+		printf("blk_dread fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+#ifdef DEBUG_RKFSS
+static void rkss_dump(void *data, unsigned int len)
+{
+	char *p = (char *)data;
+	unsigned int i = 0;
+	printf("-------------- DUMP %d --------------", len);
+	for (i = 0; i < len; i++) {
+		printf("%02x ", *(p + i));
+	}
+	printf("\n");
+	printf("------------- DUMP END -------------");
+}
+
+static void rkss_dump_ptable(void)
+{
+	struct rk_secure_storage rkss = {0};
+	int i, n, ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
+	printf("-------------- DUMP ptable --------------");
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0) {
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return;
+		}
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+			printf("[%02d][%c] %s , inx:%d, size:%d",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->used == 0 ? 'F':'T', p->name,
+					p->index, p->size);
+		}
+	}
+	printf("-------------- DUMP END --------------");
+}
+
+static void rkss_dump_usedflags(void)
+{
+	struct rk_secure_storage rkss = {0};
+	int ret;
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return;
+	}
+	rkss_dump(rkss.data, RKSS_DATA_LEN);
+}
+#endif
+
+static int rkss_verify_ptable(struct rk_secure_storage *rkss)
+{
+	void *vp = (void *)rkss->data;
+	char *cp = (char *)vp;
+	struct rkss_file_verification *verify;
+	int ret;
+
+	if (rkss->index > RKSS_PARTITION_TABLE_COUNT) {
+		printf("cannot support verifing other section.");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
+	verify = (struct rkss_file_verification *)(void *)cp;
+
+	if (verify->version != RKSS_VERSION
+			|| verify->checkstr != RKSS_CHECK_STR) {
+		printf("verify [%lu] fail, cleanning ....", rkss->index);
+		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		verify->checkstr = RKSS_CHECK_STR;
+		verify->version = RKSS_VERSION;
+		ret = rkss_write_section(rkss);
+		if (ret < 0) {
+			printf("cleanning ptable fail ! ret: %d.", ret);
+			return TEEC_ERROR_GENERIC;
+		}
+		return TEEC_SUCCESS;
+	}
+	debug("verify success. %lu", rkss->index);
+	return TEEC_SUCCESS;
+}
+
+static int rkss_verify_usedflags(struct rk_secure_storage *rkss)
+{
+	uint8_t *flags = (uint8_t *)rkss->data;
+	int i, duel, flag, n, value, ret;
+	uint8_t *flagw;
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++) {
+		duel = *(flags + (int)i/2);
+		flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if (flag != 0x1) {
+			debug("init usedflags section ...");
+			memset(rkss->data, 0x00, RKSS_DATA_LEN);
+			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++) {
+				flagw = (uint8_t *)rkss->data + (int)n/2;
+				value = 0x1;
+				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+						(*flagw & 0x0F) | (value << 4);
+			}
+			ret = rkss_write_section(rkss);
+			if (ret < 0) {
+				printf("clean usedflags section failed!!! ret: %d.", ret);
+				return TEEC_ERROR_GENERIC;
+			}
+
+			return TEEC_SUCCESS;
+		}
+	}
+	debug("rkss_verify_usedflags: sucess.");
+	return TEEC_SUCCESS;
+}
+
+static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	struct rk_secure_storage rkss = {0};
+	int ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
+	rkss.index = i;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	pdata = rkss.data;
+	p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	if (p->used != 1) {
+		debug("error: unused section! ");
+		return TEEC_ERROR_GENERIC;
+	}
+	debug("rkss_get_fileinfo_by_index p->used = %d p->name=%s p->index=%d p->size=%d \n",
+		p->used, p->name, p->index, p->size);
+	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+	return TEEC_SUCCESS;
+}
+
+static int rkss_get_fileinfo_by_name(
+		char *filename, struct rkss_file_info *pfileinfo)
+{
+	int i, ret;
+	uint8_t n = 0;
+	unsigned int len;
+	unsigned char *table_data;
+	struct rk_secure_storage rkss = {0};
+	void *pdata;
+	struct rkss_file_info *p;
+	const char *split = "/";
+	char *last_inpos;
+	char *last_svpos;
+	char *cur_inpos;
+	char *cur_svpos;
+	int size_in, size_sv;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("filename is too long. length:%u", len);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			/* Full Matching*/
+			if (!strcmp(p->name, filename)) {
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d] \n",
+						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+				free(table_data);
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+
+			/* Folder Matching*/
+			last_inpos = filename;
+			last_svpos = p->name;
+			cur_inpos = NULL;
+			cur_svpos = NULL;
+			do {
+				cur_inpos = strstr(last_inpos, split);
+				cur_svpos = strstr(last_svpos, split);
+				size_in = cur_inpos == NULL ?
+						(int)strlen(last_inpos) : cur_inpos - last_inpos;
+				size_sv = cur_svpos == NULL ?
+						(int)strlen(last_svpos) : cur_svpos - last_svpos;
+
+				ret = memcmp(last_inpos, last_svpos, size_in);
+				last_inpos = cur_inpos + 1;
+				last_svpos = cur_svpos + 1;
+
+				if (size_in != size_sv || ret)
+					goto UNMATCHFOLDER;
+
+			} while (cur_inpos && cur_svpos);
+
+			debug("Matched folder: %s \n", p->name);
+			free(table_data);
+			return TEEC_ERROR_GENERIC;
+UNMATCHFOLDER:
+			debug("Unmatched ... \n");
+		}
+	}
+	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	free(table_data);
+	return TEEC_ERROR_GENERIC;
+}
+
+static int rkss_get_dirs_by_name(char *filename)
+{
+	int i, ret;
+	uint8_t n = 0;
+	unsigned int len;
+	unsigned char *table_data;
+	struct rk_secure_storage rkss = {0};
+	void *pdata;
+	struct rkss_file_info *p;
+	char *chk, *file, *subdir;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1) {
+		printf("filename is too long. length:%u", len);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	dir_num = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			/* Full Matching*/
+			ret = memcmp(p->name, filename, strlen(filename));
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d \n",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
+			if (!ret && strlen(p->name) > strlen(filename)) {
+				chk = p->name + strlen(filename);
+				if (*chk == '/') {
+					file = p->name + strlen(filename) + 1;
+					subdir = strtok(file, "/");
+					debug("found: %s \n", subdir);
+					strcpy(dir_cache[dir_num], subdir);
+					++dir_num;
+				}
+			}
+		}
+	}
+	free(table_data);
+	return dir_num;
+}
+
+static int rkss_get_empty_section_from_usedflags(int section_size)
+{
+	struct rk_secure_storage rkss = {0};
+	int i, ret;
+	int count0 = 0;
+	uint8_t *flag;
+	uint8_t value;
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
+		flag = (uint8_t *)rkss.data + (int)i/2;
+		value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+
+		if (value == 0x0) {
+			if (++count0 == section_size) {
+				return (i + 1 - section_size);
+			}
+		} else {
+			count0 = 0;
+		}
+	}
+
+	printf("Not enough space available in secure storage !");
+	return TEEC_ERROR_GENERIC;
+}
+
+static int rkss_incref_usedflags_section(int index)
+{
+	struct rk_secure_storage rkss = {0};
+	int ret, value;
+	uint8_t *flag;
+
+	if (index >= RKSS_DATA_SECTION_COUNT) {
+		printf("index[%d] out of range.", index);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	flag = (uint8_t *)rkss.data + (int)index/2;
+	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (++value > 0xF) {
+		printf("reference out of data: %d", value);
+		value = 0xF;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_decref_usedflags_section(int index)
+{
+	struct rk_secure_storage rkss = {0};
+	int ret, value;
+	uint8_t *flag;
+
+	if (index >= RKSS_DATA_SECTION_COUNT) {
+		debug("index[%d] out of range.", index);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	flag = (uint8_t *)rkss.data + (int)index/2;
+	value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (--value < 0) {
+		printf("reference out of data: %d", value);
+		value = 0x0;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
+{
+	unsigned char *table_data;
+	int ret, i, n;
+	struct rk_secure_storage rkss = {0};
+	void *pdata;
+	struct rkss_file_info *p;
+
+	table_data = malloc(RKSS_DATA_LEN * RKSS_PARTITION_TABLE_COUNT);
+	if (table_data == NULL) {
+		printf("malloc table_data fail \n");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	ret = rkss_read_patition_tables(table_data);
+	if (ret < 0) {
+		printf("rkss_read_patition_tables fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		rkss.index = i;
+		memcpy(rkss.data, table_data + rkss.index * RKSS_DATA_LEN, RKSS_DATA_LEN);
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++) {
+			pdata = rkss.data;
+			p = (struct rkss_file_info *)pdata;
+			p += n;
+			if (p->used == 0) {
+				debug("write ptable in [%d][%d] .", i, n);
+				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+				p->used = 1;
+				p->id = n;
+				debug("write emt ptable : [%d,%d] name:%s, index:%d, ",
+					i, n, p->name, p->index);
+				debug("size:%d, used:%d \n",  p->size, p->used);
+				ret = rkss_write_section(&rkss);
+				if (ret < 0) {
+					printf("rkss_write_section fail ! ret: %d.", ret);
+					free(table_data);
+					return TEEC_ERROR_GENERIC;
+				}
+
+				free(table_data);
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+		}
+	}
+	debug("No enough ptable space available in secure storage.\n");
+	free(table_data);
+	return TEEC_ERROR_GENERIC;
+}
+
+static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+	struct rk_secure_storage rkss = {0};
+	int ret;
+	void *pdata;
+	struct rkss_file_info *p;
+
+	rkss.index = i;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	pdata = rkss.data;
+	p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d \n",
+			i, n, p->name, p->index, p->size, p->used);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+#endif
+	return TEEC_SUCCESS;
+}
+
+static uint32_t ree_fs_new_open(size_t num_params,
+				   struct tee_ioctl_param *params)
+{
+	char *filename;
+	int fd;
+	struct rkss_file_info p = {0};
+
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	filename = (char *)params[1].u.memref.shm_id;
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+		printf("ree_fs_new_open: file name too long. %s", filename);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("ree_fs_new_open open file: %s, len: %lu \n", filename, strlen(filename));
+	fd = rkss_get_fileinfo_by_name(filename, &p);
+	if (fd < 0) {
+		debug("ree_fs_new_open : no such file. %s", filename);
+		return TEEC_ERROR_ITEM_NOT_FOUND;
+	}
+
+	debug("ree_fs_new_open! %s, fd: %d \n", filename, fd);
+
+	params[2].u.value.a = fd;
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_create(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *filename;
+	int fd;
+	int ret, num, i;
+	struct rkss_file_info p = {0};
+	/* file open flags: O_RDWR | O_CREAT | O_TRUNC
+	 * if file exists, we must remove it first.
+	 */
+	filename = (char *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH) {
+		printf("ree_fs_new_create: file name too long. %s", filename);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("ree_fs_new_create create file: %s, len: %lu \n", filename, strlen(filename));
+	fd = rkss_get_fileinfo_by_name(filename, &p);
+	if (fd > 0) {
+		debug("ree_fs_new_create : file exist, clear it. %s", filename);
+		/* decrease ref from usedflags */
+		num = p.size / RKSS_DATA_LEN + 1;
+		for (i = 0; i < num; i++) {
+			ret = rkss_decref_usedflags_section(p.index + i);
+			if (ret < 0) {
+				printf("rkss_decref_usedflags_section error !");
+				return TEEC_ERROR_GENERIC;
+			}
+		}
+
+		/* rm from ptable */
+		memset(&p, 0, sizeof(struct rkss_file_info));
+		ret = rkss_write_back_ptable(fd, &p);
+		if (ret < 0) {
+			printf("ree_fs_new_create : write back error %d", ret);
+			return TEEC_ERROR_GENERIC;
+		}
+	}
+
+	debug("ree_fs_new_create create new file: %s \n", filename);
+	strcpy(p.name, filename);
+	p.index = 0;
+	p.size = 0;
+	p.used = 1;
+	p.flags = RK_FS_R | RK_FS_W;
+	fd = rkss_write_empty_ptable(&p);
+	if (fd < 0) {
+		printf("ree_fs_new_create : write empty ptable error. %s", filename);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	debug("ree_fs_new_create ! %s, fd: %d. \n", filename, fd);
+
+	params[2].u.value.a = fd;
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_close(size_t num_params,
+				    struct tee_ioctl_param *params)
+{
+	debug("ree_fs_new_close !");
+	UNREFERENCED_PARAMETER(params);
+	UNREFERENCED_PARAMETER(num_params);
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_read(size_t num_params,
+				   struct tee_ioctl_param *params)
+{
+	uint8_t *data;
+	size_t len;
+	off_t offs;
+	int fd;
+	int ret;
+	struct rkss_file_info p = {0};
+	int section_offs, num, left, di, i, read;
+	struct rk_secure_storage rkss = {0};
+
+	fd = params[0].u.value.b;
+	offs = params[0].u.value.c;
+
+	data = (uint8_t *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	if (!data)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("ree_fs_new_read! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p);
+	if (ret < 0) {
+		debug("unavailable fd: %d!", fd);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	if (offs >= p.size)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	section_offs = offs % RKSS_DATA_LEN;
+	num = (len + section_offs) / RKSS_DATA_LEN + 1;
+	left = len > p.size ? p.size : len;
+	di = 0;
+	debug("reading section[%d], fd:%d, len:%zu, offs:%ld, section_offs:%d, filesize:%d \n",
+			p.index, fd, len, offs, section_offs, p.size);
+	for (i = 0; i < num; i++) {
+		rkss.index = p.index + i + offs / RKSS_DATA_LEN;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0) {
+			printf("unavailable file index %lu!", rkss.index);
+			return TEEC_ERROR_GENERIC;
+		}
+
+		if (i == 0) {
+			read = left > RKSS_DATA_LEN - section_offs ? RKSS_DATA_LEN - section_offs : left;
+			memcpy((char *)data + di, rkss.data + section_offs, read);
+		} else {
+			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+			memcpy((char *)data + di, rkss.data, read);
+		}
+#ifdef DEBUG_RKFSS
+		rkss_dump((char *)data + di, read);
+#endif
+		di += read;
+		left -= read;
+	}
+
+	params[1].u.memref.size = di;
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_write(size_t num_params,
+				    struct tee_ioctl_param *params)
+{
+	uint8_t *data;
+	size_t len;
+	off_t offs;
+	struct rk_secure_storage rkss = {0};
+	struct rkss_file_info p = {0};
+	int ret, i, left, fd, new_size;
+	int section_num, di, read, lastw, ws;
+	uint8_t *file_data;
+
+	fd = params[0].u.value.b;
+	offs = params[0].u.value.c;
+
+	data = (uint8_t *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!data)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("ree_fs_new_write ! fd:%d, len:%zu, offs:%ld \n", fd, len, offs);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_write: fd:%d unvailable!", fd);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	new_size = offs + len > p.size ? offs + len : p.size;
+	file_data = malloc(new_size);
+	if (!file_data)
+		return TEEC_ERROR_OUT_OF_MEMORY;
+
+	if (p.size != 0) {
+		/* Read old file data out */
+		section_num = p.size / RKSS_DATA_LEN + 1;
+		left = p.size;
+		di = 0;
+		read = 0;
+		for (i = 0; i < section_num; i++) {
+			rkss.index = p.index + i;
+			ret = rkss_read_section(&rkss);
+			if (ret < 0) {
+				printf("unavailable file index %lu!", rkss.index);
+				ret = TEEC_ERROR_GENERIC;
+				goto out;
+			}
+
+			read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+			memcpy(file_data + di, rkss.data, read);
+#ifdef DEBUG_RKFSS
+			rkss_dump((char *)data + di, read);
+#endif
+			di += read;
+			left -= read;
+			/* decrease ref from usedflags */
+			ret = rkss_decref_usedflags_section(rkss.index);
+			if (ret < 0) {
+				printf("rkss_decref_usedflags_section error !");
+				ret = TEEC_ERROR_GENERIC;
+				goto out;
+			}
+		}
+	}
+
+	/* update new file info */
+	memcpy(file_data + offs, data, len);
+	p.size = new_size;
+	section_num = new_size / RKSS_DATA_LEN + 1;
+	p.index = rkss_get_empty_section_from_usedflags(section_num);
+	debug("Get Empty section in %d \n", p.index);
+	p.used = 1;
+	for (i = 0; i < section_num; i++) {
+		ret = rkss_incref_usedflags_section(p.index + i);
+		if (ret < 0) {
+			printf("rkss_incref_usedflags_section error !");
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+	}
+
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_write: write ptable error!");
+		ret = TEEC_ERROR_GENERIC;
+		goto out;
+	}
+
+	/* write new file data */
+	left = p.size;
+	lastw = 0;
+	for (i = 0; i < section_num; i++) {
+		rkss.index = p.index + i;
+		ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+		memset(rkss.data, 0, sizeof(rkss.data));
+		memcpy(rkss.data, file_data + lastw, ws);
+		lastw += ws;
+		left -= RKSS_DATA_LEN;
+		left = left < 0 ? 0 : left;
+#ifdef DEBUG_RKFSS
+		rkss_dump(rkss.data, ws);
+#endif
+		ret = rkss_write_section(&rkss);
+		if (ret < 0) {
+			printf("rkss_write_section: write error!");
+			ret = TEEC_ERROR_GENERIC;
+			goto out;
+		}
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_usedflags();
+#endif
+
+out:
+	if (file_data)
+		free(file_data);
+
+	return TEEC_SUCCESS;
+}
+
+/* TODO: update file data space */
+static TEEC_Result ree_fs_new_truncate(size_t num_params,
+				       struct tee_ioctl_param *params)
+{
+	size_t len;
+	int fd, ret;
+	struct rkss_file_info p = {0};
+
+	fd = params[0].u.value.b;
+	len = params[0].u.value.c;
+
+	debug("ree_fs_new_truncate: fd:%d, lenth:%zu \n", fd, len);
+
+	ret = rkss_get_fileinfo_by_index(fd, &p);
+	if (ret < 0) {
+		printf("fd:%d unvailable!", fd);
+		return TEEC_ERROR_GENERIC;
+	}
+
+	p.size = len;
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_truncate: write ptable error!");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_remove(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *filename;
+	struct rkss_file_info p = {0};
+	int ret, fd, num, i;
+
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	filename = (char *)params[1].u.memref.shm_id;
+	if (!filename)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_remove: no such file. %s", filename);
+		return 0;
+	}
+	fd = ret;
+
+	debug("ree_fs_new_remove! %s fd:%d index:%d size:%d \n", filename, fd, p.index, p.size);
+
+	/* decrease ref from usedflags */
+	num = p.size / RKSS_DATA_LEN + 1;
+	i = 0;
+	for (i = 0; i < num; i++) {
+		ret = rkss_decref_usedflags_section(p.index + i);
+		if (ret < 0) {
+			printf("rkss_decref_usedflags_section error !");
+			return TEEC_ERROR_GENERIC;
+		}
+	}
+
+	/* rm from ptable */
+	memset(&p, 0, sizeof(struct rkss_file_info));
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0) {
+		printf("ree_fs_new_remove: write back error %d", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_rename(size_t num_params,
+				     struct tee_ioctl_param *params)
+{
+	char *old_fname;
+	char *new_fname;
+	struct rkss_file_info p = {0};
+	int ret;
+
+	old_fname = (char *)params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx\n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!old_fname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	new_fname = (char *)params[2].u.memref.shm_id;
+	debug("params[2].u.memref.shm_id = 0x%llx params[2].u.memref.shm_offs = 0x%llx\n",
+		params[2].u.memref.shm_id, params[2].u.memref.shm_offs);
+	if (!new_fname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	if (strlen(new_fname) > RKSS_NAME_MAX_LENGTH) {
+		printf("new file name too long. %s", new_fname);
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+
+	debug("rename: %s -> %s \n", old_fname, new_fname);
+
+	ret = rkss_get_fileinfo_by_name(old_fname, &p);
+	if (ret < 0) {
+		printf("filename: %s no found.", old_fname);
+		return TEEC_ERROR_ITEM_NOT_FOUND;
+	}
+
+	strcpy(p.name, new_fname);
+
+	ret = rkss_write_back_ptable(ret, &p);
+	if (ret < 0) {
+		printf("write ptable error!");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_opendir(size_t num_params,
+				      struct tee_ioctl_param *params)
+{
+	char *dirname;
+	int ret;
+
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+
+	dirname = (char *)params[1].u.memref.shm_id;
+	if (!dirname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	dir_seek = 0;
+	ret = rkss_get_dirs_by_name(dirname);
+	if (ret < 0) {
+		printf("ree_fs_new_opendir: error");
+		return TEEC_ERROR_GENERIC;
+	}
+
+	debug("ree_fs_new_opendir: %s, seek/num:%d/%d \n", dirname, dir_seek, dir_num);
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_closedir(size_t num_params,
+				       struct tee_ioctl_param *params)
+{
+	if (num_params != 1 ||
+	    (params[0].attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) !=
+			TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT)
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	dir_seek = 0;
+	dir_num = 0;
+
+	return TEEC_SUCCESS;
+}
+
+static TEEC_Result ree_fs_new_readdir(size_t num_params,
+				      struct tee_ioctl_param *params)
+{
+	char *dirname;
+	size_t len;
+	size_t dirname_len;
+
+	dirname = (char *) params[1].u.memref.shm_id;
+	debug("params[1].u.memref.shm_id = 0x%llx params[1].u.memref.shm_offs = 0x%llx \n",
+		params[1].u.memref.shm_id, params[1].u.memref.shm_offs);
+	if (!dirname)
+		return TEEC_ERROR_BAD_PARAMETERS;
+	len = params[1].u.memref.size;
+
+	debug("seek/num:%d/%d \n", dir_seek, dir_num);
+	if (dir_seek == dir_num) {
+		params[1].u.memref.size = 0;
+		debug("ree_fs_new_readdir: END");
+		return TEEC_ERROR_BAD_STATE;
+	}
+
+	dirname_len = strlen(dir_cache[dir_seek]) + 1;
+	params[1].u.memref.size = dirname_len;
+	if (dirname_len > len)
+		return TEEC_ERROR_SHORT_BUFFER;
+
+	strcpy(dirname, dir_cache[dir_seek]);
+	++dir_seek;
+
+	debug("ree_fs_new_readdir: %s \n", dirname);
+
+	return TEEC_SUCCESS;
+}
+
+int tee_supp_rk_fs_init(void)
+{
+	assert(sizeof(struct rkss_file_info) == 126);
+	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
+
+	int i, ret;
+	struct rk_secure_storage rkss = {0};
+
+	/* clean secure storage*/
+#ifdef DEBUG_CLEAN_RKSS
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++) {
+		rkss.index = i;
+		rkss_write_section(&rkss);
+		printf("cleaned [%d]", i);
+	}
+#endif
+
+	/* Verify Partition Table*/
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++) {
+		debug("rkss_get_fileinfo_by_name: reading %d", i);
+		rkss.index = i;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0) {
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return TEEC_ERROR_GENERIC;
+		}
+		if (rkss_verify_ptable(&rkss) < 0) {
+			printf("rkss_verify_ptable fail !");
+			return TEEC_ERROR_GENERIC;
+		}
+	}
+
+	/* Verify Usedflags Section*/
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	ret = rkss_read_section(&rkss);
+	if (ret < 0) {
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+	ret = rkss_verify_usedflags(&rkss);
+	if (ret < 0) {
+		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		return TEEC_ERROR_GENERIC;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+	return TEEC_SUCCESS;
+}
+
+void OpteeClientRkFsInit(void)
+{
+	debug(" OpteeClientRkFsInit\n");
+	tee_supp_rk_fs_init();
+}
+bool tee_supp_param_is_value(struct tee_ioctl_param *param)
+{
+	switch (param->attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) {
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT:
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT:
+	case TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INOUT:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static int rkss_step;
+int tee_supp_rk_fs_process(size_t num_params,
+			struct tee_ioctl_param *params)
+{
+	if (!num_params || !tee_supp_param_is_value(params))
+		return TEEC_ERROR_BAD_PARAMETERS;
+
+	switch (params->u.value.a) {
+	case OPTEE_MRF_OPEN:
+		debug(">>>>>>> [%d] OPTEE_MRF_OPEN! \n", rkss_step++);
+		return ree_fs_new_open(num_params, params);
+	case OPTEE_MRF_CREATE:
+		debug(">>>>>>> [%d] OPTEE_MRF_CREATE! \n", rkss_step++);
+		return ree_fs_new_create(num_params, params);
+	case OPTEE_MRF_CLOSE:
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSE! \n", rkss_step++);
+		return ree_fs_new_close(num_params, params);
+	case OPTEE_MRF_READ:
+		debug(">>>>>>> [%d] OPTEE_MRF_READ! \n", rkss_step++);
+		return ree_fs_new_read(num_params, params);
+	case OPTEE_MRF_WRITE:
+		debug(">>>>>>> [%d] OPTEE_MRF_WRITE! \n", rkss_step++);
+		return ree_fs_new_write(num_params, params);
+	case OPTEE_MRF_TRUNCATE:
+		debug(">>>>>>> [%d] OPTEE_MRF_TRUNCATE! \n", rkss_step++);
+		return ree_fs_new_truncate(num_params, params);
+	case OPTEE_MRF_REMOVE:
+		debug(">>>>>>> [%d] OPTEE_MRF_REMOVE! \n", rkss_step++);
+		return ree_fs_new_remove(num_params, params);
+	case OPTEE_MRF_RENAME:
+		debug(">>>>>>> [%d] OPTEE_MRF_RENAME! \n", rkss_step++);
+		return ree_fs_new_rename(num_params, params);
+	case OPTEE_MRF_OPENDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_OPENDIR! \n", rkss_step++);
+		return ree_fs_new_opendir(num_params, params);
+	case OPTEE_MRF_CLOSEDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_CLOSEDIR! \n", rkss_step++);
+		return ree_fs_new_closedir(num_params, params);
+	case OPTEE_MRF_READDIR:
+		debug(">>>>>>> [%d] OPTEE_MRF_READDIR! \n", rkss_step++);
+		return ree_fs_new_readdir(num_params, params);
+	default:
+		return TEEC_ERROR_BAD_PARAMETERS;
+	}
+}

commit deedd3562aae87d513b69cd2cbc096d4ad7a6e51
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 20 20:10:37 2018 +0800

    include: key.h: remove unused definition
    
    Change-Id: I9797dba18237cd31aee2cc232af75a623e2ee9c2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index 5310c50d95..ab4471b7a8 100644
--- a/include/key.h
+++ b/include/key.h
@@ -12,9 +12,8 @@
 #define KEY_LONG_DOWN_MS	2000
 
 enum key_state {
-	KEY_PRESS_NONE,
-	KEY_PRESS_UP,
-	KEY_PRESS_DOWN,
+	KEY_PRESS_NONE,	/* press without release */
+	KEY_PRESS_DOWN,	/* press -> release */
 	KEY_PRESS_LONG_DOWN,
 	KEY_NOT_EXIST,
 };

commit f462f55341ba7573a4d61a1c7fdb0d78c96f13df
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 16 18:01:22 2018 +0800

    video: pwm_backlight: support PWM polarity setting
    
    The latest kernel PWM drivers enable the polarity settings. When system
    run from U-Boot to kerenl, if there are differences in polarity set or
    duty cycle, the PMW will re-init:
    close -> set polarity and duty cycle -> enable the PWM.
    The pwm_backlight would be unstable, might be screen flashing.
    
    Change-Id: I7c026c9756e013f0ac99e43b09b633dc83268ce9
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index a124a961cb..718b2fd04b 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -20,6 +20,7 @@ struct pwm_backlight_priv {
 	struct udevice *pwm;
 	uint channel;
 	uint period_ns;
+	bool polarity;
 	uint default_level;
 	uint min_level;
 	uint max_level;
@@ -45,6 +46,12 @@ static int pwm_backlight_enable(struct udevice *dev)
 		mdelay(120);
 	}
 
+	ret = pwm_set_invert(priv->pwm, priv->channel, priv->polarity);
+	if (ret) {
+		dev_err(dev, "Failed to invert PWM\n");
+		return ret;
+	}
+
 	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
 		(priv->max_level - priv->min_level + 1);
 	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
@@ -136,6 +143,7 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 	}
 	priv->channel = args.args[0];
 	priv->period_ns = args.args[1];
+	priv->polarity = args.args[2];
 
 	index = dev_read_u32_default(dev, "default-brightness-level", 255);
 	cell = dev_read_prop(dev, "brightness-levels", &len);

commit bab0c55c3cc6b32a927a19c9cb5bb94a91f10963
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 16 16:47:08 2018 +0800

    pwm: rockchip: Do pwm pinctrl setting after pwm enabled
    
    If the PWM pinctrl uses default state, the iomux setting will
    be done at probe, the PWM may not be enabled at this moment.
    It will make PWM into an intermediate state, destroy the default
    hardware state, the PWM is not ready for work yet. So it is better
    for doing PWM pinctrl setting after PWM enabled.
    
    Change-Id: I8b700a07083b9a6798303fc5a5ed9f29eb42c47e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index ca1d5ac12e..ca8f1e8e8d 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -152,7 +152,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050000 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -163,7 +163,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050010 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -174,7 +174,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050020 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -185,7 +185,7 @@
 		compatible = "rockchip,rk2928-pwm";
 		reg = <0x20050030 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
index 92ee1c2aa0..7cb85a245d 100644
--- a/arch/arm/dts/rk3066a.dtsi
+++ b/arch/arm/dts/rk3066a.dtsi
@@ -637,22 +637,22 @@
 };
 
 &pwm0 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm0_out>;
 };
 
 &pwm1 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm1_out>;
 };
 
 &pwm2 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm2_out>;
 };
 
 &pwm3 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm3_out>;
 };
 
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 9e2568f516..cf63f34b70 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -312,7 +312,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050000 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -322,7 +322,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050010 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -332,7 +332,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050020 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -342,7 +342,7 @@
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050030 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index 518469cf97..5178b3df85 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -551,22 +551,22 @@
 };
 
 &pwm0 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm0_out>;
 };
 
 &pwm1 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm1_out>;
 };
 
 &pwm2 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm2_out>;
 };
 
 &pwm3 {
-	pinctrl-names = "default";
+	pinctrl-names = "active";
 	pinctrl-0 = <&pwm3_out>;
 };
 
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 2757f93860..bbb8d4962c 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -288,7 +288,7 @@
 		#pwm-cells = <3>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		status = "disabled";
 	};
@@ -299,7 +299,7 @@
 		#pwm-cells = <3>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		status = "disabled";
 	};
@@ -310,7 +310,7 @@
 		#pwm-cells = <3>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		status = "disabled";
 	};
@@ -321,7 +321,7 @@
 		#pwm-cells = <2>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		status = "disabled";
 	};
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 2c8a616782..316cb3b590 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -520,7 +520,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680000 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -532,7 +532,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680010 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -544,7 +544,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680020 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
@@ -556,7 +556,7 @@
 		compatible = "rockchip,rk3288-pwm";
 		reg = <0xff680030 0x10>;
 		#pwm-cells = <2>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index b4f4f6139d..21b0971de3 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -592,7 +592,7 @@
 		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff680000 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM1>;
 		clock-names = "pwm";
@@ -603,7 +603,7 @@
 		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff680010 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&cru PCLK_PWM1>;
 		clock-names = "pwm";
@@ -623,7 +623,7 @@
 		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff680030 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3_pin>;
 		clocks = <&cru PCLK_PWM1>;
 		clock-names = "pwm";
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 68221b47f7..5d9a8b9157 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1091,7 +1091,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420000 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
@@ -1102,7 +1102,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420010 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm1_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
@@ -1113,7 +1113,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420020 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm2_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
@@ -1124,7 +1124,7 @@
 		compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
 		reg = <0x0 0xff420030 0x0 0x10>;
 		#pwm-cells = <3>;
-		pinctrl-names = "default";
+		pinctrl-names = "active";
 		pinctrl-0 = <&pwm3a_pin>;
 		clocks = <&pmucru PCLK_RKPWM_PMU>;
 		clock-names = "pwm";
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index e71c4a0b75..b22630be92 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -9,6 +9,7 @@
 #include <clk.h>
 #include <div64.h>
 #include <dm.h>
+#include <dm/pinctrl.h>
 #include <pwm.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -128,6 +129,9 @@ static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
 	if (priv->data->vop_pwm)
 		priv->vop_pwm_en = enable;
 
+	if (enable)
+		pinctrl_select_state(dev, "active");
+
 	return 0;
 }
 

commit fdd40e0026d77d8e6eefe187380ec53d878bda04
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Mar 16 11:36:02 2018 +0800

    pwm: rockchip: Update PWM driver to support all Rockchip Socs
    
    The new PWM driver support PWM polarity, lock, voppwm and more
    functions. In most cases, the PWM requires the same configuration
    as kernel to reduce the intermediate state between uboot and kernel,
    so we sync the code with driver.
    
    Change-Id: Ife5b8470f72eed197dd48e949bcf7da95b9de34c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/pwm.h b/arch/arm/include/asm/arch-rockchip/pwm.h
index b1d8047691..3b6eb353e5 100644
--- a/arch/arm/include/asm/arch-rockchip/pwm.h
+++ b/arch/arm/include/asm/arch-rockchip/pwm.h
@@ -8,13 +8,15 @@
 #ifndef _ASM_ARCH_PWM_H
 #define _ASM_ARCH_PWM_H
 
-struct rk3288_pwm {
-	u32 cnt;
-	u32 period_hpr;
-	u32 duty_lpr;
-	u32 ctrl;
+struct rockchip_pwm_regs {
+	unsigned long duty;
+	unsigned long period;
+	unsigned long cntr;
+	unsigned long ctrl;
 };
-check_member(rk3288_pwm, ctrl, 0xc);
+
+#define PWM_CTRL_TIMER_EN		(1 << 0)
+#define PWM_CTRL_OUTPUT_EN		(1 << 3)
 
 #define RK_PWM_DISABLE                  (0 << 0)
 #define RK_PWM_ENABLE                   (1 << 0)
@@ -34,6 +36,9 @@ check_member(rk3288_pwm, ctrl, 0xc);
 #define PWM_OUTPUT_LEFT                 (0 << 5)
 #define PWM_OUTPUT_CENTER               (1 << 5)
 
+#define PWM_LOCK			(1 << 6)
+#define PWM_UNLOCK			(0 << 6)
+
 #define PWM_LP_ENABLE                   (1 << 8)
 #define PWM_LP_DISABLE                  (0 << 8)
 
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 13ba2279d9..e71c4a0b75 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -18,22 +18,38 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct rockchip_pwm_data {
+	struct rockchip_pwm_regs regs;
+	unsigned int prescaler;
+	bool supports_polarity;
+	bool supports_lock;
+	bool vop_pwm;
+	u32 enable_conf;
+	u32 enable_conf_mask;
+};
+
 struct rk_pwm_priv {
-	struct rk3288_pwm *regs;
+	fdt_addr_t base;
 	ulong freq;
-	uint enable_conf;
+	u32 conf_polarity;
+	bool vop_pwm_en; /* indicate voppwm mirror register state */
+	const struct rockchip_pwm_data *data;
 };
 
 static int rk_pwm_set_invert(struct udevice *dev, uint channel, bool polarity)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 
+	if (!priv->data->supports_polarity) {
+		debug("%s: Do not support polarity\n", __func__);
+		return 0;
+	}
+
 	debug("%s: polarity=%u\n", __func__, polarity);
-	priv->enable_conf &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK);
 	if (polarity)
-		priv->enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE;
+		priv->conf_polarity = PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE;
 	else
-		priv->enable_conf |= PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE;
+		priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE;
 
 	return 0;
 }
@@ -42,24 +58,51 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 			     uint duty_ns)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
-	struct rk3288_pwm *regs = priv->regs;
+	const struct rockchip_pwm_regs *regs = &priv->data->regs;
 	unsigned long period, duty;
-	uint32_t ctrl;
+	u32 ctrl;
 
 	debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
 
-	ctrl = readl(&regs->ctrl);
-	/* Ignore bit0: RK_PWM_ENABLE */
-	ctrl &= ~0xfffe;
-	ctrl |= PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
-		PWM_CONTINUOUS | priv->enable_conf;
-	writel(ctrl, &regs->ctrl);
+	ctrl = readl(priv->base + regs->ctrl);
+	if (priv->data->vop_pwm) {
+		if (priv->vop_pwm_en)
+			ctrl |= RK_PWM_ENABLE;
+		else
+			ctrl &= ~RK_PWM_ENABLE;
+	}
+
+	/*
+	 * Lock the period and duty of previous configuration, then
+	 * change the duty and period, that would not be effective.
+	 */
+	if (priv->data->supports_lock) {
+		ctrl |= PWM_LOCK;
+		writel(ctrl, priv->base + regs->ctrl);
+	}
 
-	period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000);
-	duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000);
+	period = lldiv((uint64_t)(priv->freq / 1000) * period_ns,
+		       priv->data->prescaler * 1000000);
+	duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns,
+		     priv->data->prescaler * 1000000);
+
+	writel(period, priv->base + regs->period);
+	writel(duty, priv->base + regs->duty);
+
+	if (priv->data->supports_polarity) {
+		ctrl &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK);
+		ctrl |= priv->conf_polarity;
+	}
+
+	/*
+	 * Unlock and set polarity at the same time,
+	 * the configuration of duty, period and polarity
+	 * would be effective together at next period.
+	 */
+	if (priv->data->supports_lock)
+		ctrl &= ~PWM_LOCK;
+	writel(ctrl, priv->base + regs->ctrl);
 
-	writel(period, &regs->period_hpr);
-	writel(duty, &regs->duty_lpr);
 	debug("%s: period=%lu, duty=%lu\n", __func__, period, duty);
 
 	return 0;
@@ -68,10 +111,22 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 static int rk_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
-	struct rk3288_pwm *regs = priv->regs;
+	const struct rockchip_pwm_regs *regs = &priv->data->regs;
+	u32 ctrl;
 
 	debug("%s: Enable '%s'\n", __func__, dev->name);
-	clrsetbits_le32(&regs->ctrl, RK_PWM_ENABLE, enable ? RK_PWM_ENABLE : 0);
+
+	ctrl = readl(priv->base + regs->ctrl);
+	ctrl &= ~priv->data->enable_conf_mask;
+
+	if (enable)
+		ctrl |= priv->data->enable_conf;
+	else
+		ctrl &= ~priv->data->enable_conf;
+
+	writel(ctrl, priv->base + regs->ctrl);
+	if (priv->data->vop_pwm)
+		priv->vop_pwm_en = enable;
 
 	return 0;
 }
@@ -80,7 +135,7 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 
-	priv->regs = (struct rk3288_pwm *)dev_read_addr(dev);
+	priv->base = dev_read_addr(dev);
 
 	return 0;
 }
@@ -96,8 +151,12 @@ static int rk_pwm_probe(struct udevice *dev)
 		debug("%s get clock fail!\n", __func__);
 		return -EINVAL;
 	}
+
 	priv->freq = clk_get_rate(&clk);
-	priv->enable_conf = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE;
+	priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev);
+
+	if (priv->data->supports_polarity)
+		priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE;
 
 	return 0;
 }
@@ -108,9 +167,75 @@ static const struct pwm_ops rk_pwm_ops = {
 	.set_enable	= rk_pwm_set_enable,
 };
 
+static const struct rockchip_pwm_data pwm_data_v1 = {
+	.regs = {
+		.duty = 0x04,
+		.period = 0x08,
+		.cntr = 0x00,
+		.ctrl = 0x0c,
+	},
+	.prescaler = 2,
+	.supports_polarity = false,
+	.supports_lock = false,
+	.vop_pwm = false,
+	.enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN,
+	.enable_conf_mask = BIT(1) | BIT(3),
+};
+
+static const struct rockchip_pwm_data pwm_data_v2 = {
+	.regs = {
+		.duty = 0x08,
+		.period = 0x04,
+		.cntr = 0x00,
+		.ctrl = 0x0c,
+	},
+	.prescaler = 1,
+	.supports_polarity = true,
+	.supports_lock = false,
+	.vop_pwm = false,
+	.enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE |
+		       PWM_CONTINUOUS,
+	.enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8),
+};
+
+static const struct rockchip_pwm_data pwm_data_vop = {
+	.regs = {
+		.duty = 0x08,
+		.period = 0x04,
+		.cntr = 0x0c,
+		.ctrl = 0x00,
+	},
+	.prescaler = 1,
+	.supports_polarity = true,
+	.supports_lock = false,
+	.vop_pwm = true,
+	.enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE |
+		       PWM_CONTINUOUS,
+	.enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8),
+};
+
+static const struct rockchip_pwm_data pwm_data_v3 = {
+	.regs = {
+		.duty = 0x08,
+		.period = 0x04,
+		.cntr = 0x00,
+		.ctrl = 0x0c,
+	},
+	.prescaler = 1,
+	.supports_polarity = true,
+	.supports_lock = true,
+	.vop_pwm = false,
+	.enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | RK_PWM_ENABLE |
+		       PWM_CONTINUOUS,
+	.enable_conf_mask = GENMASK(2, 0) | BIT(5) | BIT(8),
+};
+
 static const struct udevice_id rk_pwm_ids[] = {
-	{ .compatible = "rockchip,rk3288-pwm" },
-	{ .compatible = "rockchip,rk3328-pwm" },
+	{ .compatible = "rockchip,rk2928-pwm", .data = (ulong)&pwm_data_v1},
+	{ .compatible = "rockchip,rk3288-pwm", .data = (ulong)&pwm_data_v2},
+	{ .compatible = "rockchip,rk3328-pwm", .data = (ulong)&pwm_data_v3},
+	{ .compatible = "rockchip,vop-pwm", .data = (ulong)&pwm_data_vop},
+	{ .compatible = "rockchip,rk3399-pwm", .data = (ulong)&pwm_data_v2},
 	{ }
 };
 

commit b3077611a614cd53588b27bc7ef25873dfaad35b
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Mar 13 17:47:31 2018 +0800

    pinctrl: rockchip: Add pinctrl support for rk3308
    
    The most pins of rk3308 are 2bits iomux, but the banks's register
    width is 0x8.
    
    Change-Id: Iaf79232a552a5e239610bce533fe884df4a4743c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 6df466d3b7..ae7ab2e697 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -23,6 +23,7 @@ enum rockchip_pinctrl_type {
 	RK3128,
 	RK3188,
 	RK3288,
+	RK3308,
 	RK3368,
 	RK3399,
 };
@@ -35,6 +36,7 @@ enum rockchip_pinctrl_type {
 #define IOMUX_SOURCE_PMU	BIT(2)
 #define IOMUX_UNROUTED		BIT(3)
 #define IOMUX_WIDTH_3BIT	BIT(4)
+#define IOMUX_8WIDTH_2BIT	BIT(5)
 
 /**
  * @type: iomux variant using IOMUX_* constants
@@ -412,6 +414,70 @@ static  struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = {
 	},
 };
 
+static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 14,
+		.reg = 0x28,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 15,
+		.reg = 0x2c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 18,
+		.reg = 0x30,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 19,
+		.reg = 0x30,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 20,
+		.reg = 0x30,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 21,
+		.reg = 0x34,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 22,
+		.reg = 0x34,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 1,
+		.pin = 23,
+		.reg = 0x34,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 12,
+		.reg = 0x68,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 3,
+		.pin = 13,
+		.reg = 0x68,
+		.bit = 12,
+		.mask = 0x7
+	},
+};
+
 static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
 	{
 		.num = 2,
@@ -718,6 +784,38 @@ static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
 	},
 };
 
+static struct rockchip_mux_route_data rk3308_mux_route_data[] = {
+	{
+		/* uart2_rxm0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3),
+	}, {
+		/* uart2_rxm1 */
+		.bank_num = 4,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 2) | BIT(16 + 3) | BIT(2),
+	}, {
+		/* i2c3_sdam0 */
+		.bank_num = 0,
+		.pin = 23,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val = BIT(16 + 4),
+	}, {
+		/* i2c3_sdam1 */
+		.bank_num = 3,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x314,
+		.route_val =  BIT(16 + 4) | BIT(4),
+	},
+};
+
 static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
 	{
 		/* uart2dbg_rxm0 */
@@ -1371,6 +1469,61 @@ static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 	*bit *= RK3288_DRV_BITS_PER_PIN;
 }
 
+#define RK3308_PULL_OFFSET		0xa0
+
+static void rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_PULL_OFFSET;
+	*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+	*bit *= RK3188_PULL_BITS_PER_PIN;
+}
+
+#define RK3308_DRV_GRF_OFFSET		0x100
+
+static void rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_DRV_GRF_OFFSET;
+	*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+	*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+	*bit *= RK3288_DRV_BITS_PER_PIN;
+}
+
+#define RK3308_SCHMITT_PINS_PER_REG	8
+#define RK3308_SCHMITT_BANK_STRIDE	16
+#define RK3308_SCHMITT_GRF_OFFSET	0x1a0
+
+static int rk3308_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3308_SCHMITT_GRF_OFFSET;
+
+	*reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE;
+	*reg += ((pin_num / RK3308_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK3308_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
 #define RK3368_PULL_GRF_OFFSET		0x100
 #define RK3368_PULL_PMU_OFFSET		0x10
 
@@ -1631,6 +1784,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 	case RV1108:
 	case RK3188:
 	case RK3288:
+	case RK3308:
 	case RK3368:
 	case RK3399:
 		pull_type = bank->pull_type[pin_num / 8];
@@ -1724,6 +1878,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
 	case RV1108:
 	case RK3188:
 	case RK3288:
+	case RK3308:
 	case RK3368:
 	case RK3399:
 		return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT);
@@ -2295,6 +2450,44 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 		.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
 };
 
+static struct rockchip_pin_bank rk3308_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT,
+					     IOMUX_8WIDTH_2BIT),
+};
+
+static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
+		.pin_banks		= rk3308_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3308_pin_banks),
+		.label			= "RK3308-GPIO",
+		.type			= RK3308,
+		.grf_mux_offset		= 0x0,
+		.iomux_recalced		= rk3308_mux_recalced_data,
+		.niomux_recalced	= ARRAY_SIZE(rk3308_mux_recalced_data),
+		.iomux_routes		= rk3308_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3308_mux_route_data),
+		.pull_calc_reg		= rk3308_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3308_calc_drv_reg_and_bit,
+		.schmitt_calc_reg	= rk3308_calc_schmitt_reg_and_bit,
+};
+
 static struct rockchip_pin_bank rk3328_pin_banks[] = {
 	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
 	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
@@ -2435,6 +2628,8 @@ static const struct udevice_id rockchip_pinctrl_dt_match[] = {
 		.data = (ulong)&rk3228_pin_ctrl },
 	{ .compatible = "rockchip,rk3288-pinctrl",
 		.data = (ulong)&rk3288_pin_ctrl },
+	{ .compatible = "rockchip,rk3308-pinctrl",
+		.data = (ulong)&rk3308_pin_ctrl },
 	{ .compatible = "rockchip,rk3328-pinctrl",
 		.data = (ulong)&rk3328_pin_ctrl },
 	{ .compatible = "rockchip,rk3368-pinctrl",

commit e7f9facb5d212e692e8b21d0192921c715058033
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 19:57:46 2018 +0800

    power: charge animation: support auto wakeup and auto off screen
    
    Change-Id: I93f97c46e5f08c3ebe4b577355f5e23a9e3659ed
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 1db7cdbf42..82d8e3b73a 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <common.h>
 #include <boot_rkimg.h>
 #include <console.h>
@@ -22,6 +23,7 @@
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
 #include <power/regulator.h>
+#include <rk_timer_irq.h>
 #include <video_rockchip.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -39,6 +41,9 @@ struct charge_animation_priv {
 	struct udevice *fg;
 	const struct charge_image *image;
 	int image_num;
+
+	int auto_wakeup_key_state;
+	ulong auto_screen_off_timeout;
 };
 
 /*
@@ -80,6 +85,14 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	pdata->system_suspend =
 		dev_read_u32_default(dev, "rockchip,system-suspend", 0);
 
+	pdata->auto_wakeup_interval =
+		dev_read_u32_default(dev, "rockchip,auto-wakeup-interval", 0);
+	pdata->auto_wakeup_screen_invert =
+		dev_read_u32_default(dev, "rockchip,auto-wakeup-screen-invert", 0);
+
+	pdata->auto_off_screen_interval =
+		dev_read_u32_default(dev, "rockchip,auto-off-screen-interval", 15);
+
 	if (pdata->screen_on_voltage > pdata->exit_charge_voltage)
 		pdata->screen_on_voltage = pdata->exit_charge_voltage;
 
@@ -92,14 +105,33 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int check_key_press(void)
+static int check_key_press(struct udevice *dev)
 {
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
 	u32 state;
 
 	state = platform_key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
+	/* Fixup key state for following cases */
+	if (pdata->auto_wakeup_interval) {
+		if  (pdata->auto_wakeup_screen_invert) {
+			if (priv->auto_wakeup_key_state == KEY_PRESS_DOWN) {
+				/* Value is updated in timer interrupt */
+				priv->auto_wakeup_key_state = KEY_PRESS_NONE;
+				state = KEY_PRESS_DOWN;
+			}
+		}
+	} else if (pdata->auto_off_screen_interval) {
+		if (get_timer(priv->auto_screen_off_timeout) >
+		    pdata->auto_off_screen_interval * 1000) {	/* 1000ms */
+			state = KEY_PRESS_DOWN;
+			printf("Auto screen off\n");
+		}
+	}
+
 	return state;
 }
 
@@ -217,6 +249,42 @@ static int charge_extrem_low_power(struct udevice *dev)
 	return 0;
 }
 
+static void timer_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	static long long count;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+
+	priv->auto_wakeup_key_state = KEY_PRESS_DOWN;
+	printf("auto wakeup count: %lld\n", ++count);
+}
+
+static void autowakeup_timer_init(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	uint64_t period = 24000000ULL * (pdata->auto_wakeup_interval);
+
+	/* Disable before conifg */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
+	writel((uint32_t)period, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel((uint32_t)(period >> 32), TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	/* IRQ */
+	irq_install_handler(TIMER_IRQ, timer_irq_handler, dev);
+	irq_handler_enable(TIMER_IRQ);
+}
+
+static void autowakeup_timer_uninit(void)
+{
+	irq_free_handler(TIMER_IRQ);
+}
+
 static int charge_animation_show(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -297,9 +365,16 @@ static int charge_animation_show(struct udevice *dev)
 		charge_show_bmp(NULL);
 	}
 
+	/* Auto wakeup */
+	if (pdata->auto_wakeup_interval) {
+		printf("Auto wakeup: %dS\n", pdata->auto_wakeup_interval);
+		autowakeup_timer_init(dev);
+	}
+
 	printf("Enter U-Boot charging mode\n");
 
 	charge_start = get_timer(0);
+
 	/* Charging ! */
 	while (1) {
 		debug("step1 (%d)... \n", screen_on);
@@ -409,7 +484,13 @@ static int charge_animation_show(struct udevice *dev)
 		if (screen_on) {
 			debug("SHOW: %s\n", image[show_idx].name);
 			charge_show_bmp(image[show_idx].name);
+
+			/* Re calculate timeout to off screen */
+			if (priv->auto_screen_off_timeout == 0)
+				priv->auto_screen_off_timeout = get_timer(0);
 		} else {
+			priv->auto_screen_off_timeout = 0;
+
 			system_suspend_enter(pdata);
 		}
 
@@ -432,7 +513,7 @@ static int charge_animation_show(struct udevice *dev)
 		 * Short key event: turn on/off screen;
 		 * Long key event: show logo and boot system or still charging.
 		 */
-		key_state = check_key_press();
+		key_state = check_key_press(dev);
 		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
@@ -499,6 +580,9 @@ static int charge_animation_show(struct udevice *dev)
 		}
 	}
 
+	if (pdata->auto_wakeup_interval)
+		autowakeup_timer_uninit();
+
 	ms = get_timer(charge_start);
 	if (ms >= 1000) {
 		sec = ms / 1000;
diff --git a/include/power/charge_animation.h b/include/power/charge_animation.h
index 7cbc6d9952..a0a3c1565c 100644
--- a/include/power/charge_animation.h
+++ b/include/power/charge_animation.h
@@ -17,6 +17,9 @@ struct charge_animation_pdata {
 	int screen_on_voltage;
 
 	int system_suspend;
+	int auto_wakeup_interval;
+	int auto_wakeup_screen_invert;
+	int auto_off_screen_interval;
 };
 
 #endif

commit 616056c90cea162e75ad8037a745d3455010a01f
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Mar 13 15:50:49 2018 +0800

    power: charge_animation: skip charge if charger offline
    
    Change-Id: I66bd36fc4d3cd4a2f79cd5eb425f857fc8a577cb
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 935d3941de..1db7cdbf42 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -269,6 +269,11 @@ static int charge_animation_show(struct udevice *dev)
 	}
 #endif
 
+	/* Not charger online, exit */
+	charging = fuel_gauge_get_chrg_online(fg);
+	if (charging <= 0)
+		return 0;
+
 	/* Enter android charge, set property for kernel */
 	if (pdata->android_charge) {
 		env_update("bootargs", "androidboot.mode=charger");
@@ -279,11 +284,6 @@ static int charge_animation_show(struct udevice *dev)
 	if (!pdata->uboot_charge)
 		return 0;
 
-	/* Not charger online, exit */
-	charging = fuel_gauge_get_chrg_online(fg);
-	if (charging <= 0)
-		return 0;
-
 	voltage = fuel_gauge_get_voltage(fg);
 	if (voltage < 0) {
 		printf("get voltage failed: %d\n", voltage);

commit dc8812a0ee9c619aa7d6460758c622f541f8e7f4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Mar 14 20:04:32 2018 +0800

    test: rockchip: timer: move out timer irq definition
    
    Change-Id: Ia6322291a6ddb05f7971a0a51e161c046f9e91d2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/rk_timer_irq.h b/include/rk_timer_irq.h
new file mode 100644
index 0000000000..315761efff
--- /dev/null
+++ b/include/rk_timer_irq.h
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _RK_TIMER_IRQ_H
+#define _RK_TIMER_IRQ_H
+
+#include <irq-platform.h>
+
+#define TIMER_LOAD_COUNT0	0x00
+#define TIMER_LOAD_COUNT1	0x04
+#define TIMER_CTRL		0x10
+#define TIMER_INTSTATUS		0x18
+
+#define TIMER_EN		BIT(0)
+#define TIMER_INT_EN		BIT(2)
+#define TIMER_CLR_INT		BIT(0)
+
+#if defined(CONFIG_ROCKCHIP_RK3128)
+#define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+#define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+#define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+#define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+#define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_PX30)
+/*
+ * Use timer0 and never change, because timer0 will be used in charge animation
+ * driver to support auto wakeup when system suspend. If core poweroff, PMU only
+ * support timer0(not all timer) as wakeup source.
+ */
+#define TIMER_BASE		(0xFF210000 + 0x00)	/* TIMER 0 */
+#define TIMER_IRQ		IRQ_TIMER0
+#else
+"Missing definitions of timer module test"
+#endif
+
+#endif
diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
index 103aee1167..66b20393a3 100644
--- a/test/rockchip/test-timer.c
+++ b/test/rockchip/test-timer.c
@@ -7,46 +7,9 @@
 #include <asm/io.h>
 #include <common.h>
 #include <irq-generic.h>
-#include <irq-platform.h>
+#include <rk_timer_irq.h>
 #include "test-rockchip.h"
 
-#define TIMER_LOAD_COUNT0	0x00
-#define TIMER_LOAD_COUNT1	0x04
-#define TIMER_CTRL		0x10
-#define TIMER_INTSTATUS		0x18
-
-#define SYS_COUNTER_FREQ0	24000000
-#define SYS_COUNTER_FREQ1	0
-
-#define TIMER_EN		BIT(0)
-#define TIMER_INT_EN		BIT(2)
-#define TIMER_CLR_INT		BIT(0)
-
-#if defined(CONFIG_ROCKCHIP_RK3128)
-#define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK322X)
-#define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3288)
-#define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3328)
-#define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3368)
-#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_RK3399)
-#define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#elif defined(CONFIG_ROCKCHIP_PX30)
-#define TIMER_BASE		(0xFF210000 + 0x20)	/* TIMER 1 */
-#define TIMER_IRQ		IRQ_TIMER1
-#else
-"Missing definitions of timer module test"
-#endif
-
 /*************************** timer irq test ***********************************/
 static ulong seconds;
 
@@ -78,8 +41,8 @@ static int soc_timer_irq_test_init(void)
 	writel(0, TIMER_BASE + TIMER_CTRL);
 
 	/* Config */
-	writel(SYS_COUNTER_FREQ0, TIMER_BASE + TIMER_LOAD_COUNT0);
-	writel(SYS_COUNTER_FREQ1, TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(COUNTER_FREQUENCY, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel(0, TIMER_BASE + TIMER_LOAD_COUNT1);
 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
 	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
 

commit 2dea0a8ed9ba115fae0ba945dc450db5d2086c7a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 16 11:56:43 2018 +0800

    rockchip: evb-px30: disable NET support
    
    Change-Id: Iba155fdd9da72df18d441f51b8b59ef888fdbeba
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index ec45935c8f..8751c592e9 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -33,6 +33,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_CMD_NET is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_RK8XX_PWRKEY=y

commit 33ffdd247341f1d0a6035b7daf78acc32362cfa8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 1 11:23:30 2018 +0800

    debug: convert to use pr_debug for pte init and find dev
    
    These two op have too much print, convert to pr_debug and not print
    by default.
    
    Change-Id: I5b3c738db783419717441e24ee0b04ab6f02d61e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 6548f3c912..e371ce33fb 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -109,7 +109,7 @@ static u64 *find_pte(u64 addr, int level)
 	u64 va_bits;
 	int i;
 
-	debug("addr=%llx level=%d\n", addr, level);
+	pr_debug("addr=%llx level=%d\n", addr, level);
 
 	get_tcr(0, NULL, &va_bits);
 	if (va_bits < 39)
@@ -123,7 +123,7 @@ static u64 *find_pte(u64 addr, int level)
 	for (i = start_level; i < 4; i++) {
 		idx = (addr >> level2shift(i)) & 0x1FF;
 		pte += idx;
-		debug("idx=%llx PTE %p at level %d: %llx\n", idx, pte, i, *pte);
+		pr_debug("idx=%llx PTE %p at level %d: %llx\n", idx, pte, i, *pte);
 
 		/* Found it */
 		if (i == level)
@@ -163,7 +163,7 @@ static u64 *create_table(void)
 static void set_pte_table(u64 *pte, u64 *table)
 {
 	/* Point *pte to the new table */
-	debug("Setting %p to addr=%p\n", pte, table);
+	pr_debug("Setting %p to addr=%p\n", pte, table);
 	*pte = PTE_TYPE_TABLE | (ulong)table;
 }
 
@@ -182,7 +182,7 @@ static void split_block(u64 *pte, int level)
 		      "mem_map.", pte, old_pte);
 
 	new_table = create_table();
-	debug("Splitting pte %p (%llx) into %p\n", pte, old_pte, new_table);
+	pr_debug("Splitting pte %p (%llx) into %p\n", pte, old_pte, new_table);
 
 	for (i = 0; i < MAX_PTE_ENTRIES; i++) {
 		new_table[i] = old_pte | (i << levelshift);
@@ -191,7 +191,7 @@ static void split_block(u64 *pte, int level)
 		if ((level + 1) == 3)
 			new_table[i] |= PTE_TYPE_TABLE;
 
-		debug("Setting new_table[%lld] = %llx\n", i, new_table[i]);
+		pr_debug("Setting new_table[%lld] = %llx\n", i, new_table[i]);
 	}
 
 	/* Set the new table into effect */
@@ -213,7 +213,7 @@ static void add_map(struct mm_region *map)
 	while (size) {
 		pte = find_pte(virt, 0);
 		if (pte && (pte_type(pte) == PTE_TYPE_FAULT)) {
-			debug("Creating table for virt 0x%llx\n", virt);
+			pr_debug("Creating table for virt 0x%llx\n", virt);
 			new_table = create_table();
 			set_pte_table(pte, new_table);
 		}
@@ -224,11 +224,11 @@ static void add_map(struct mm_region *map)
 				panic("pte not found\n");
 
 			blocksize = 1ULL << level2shift(level);
-			debug("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n",
+			pr_debug("Checking if pte fits for virt=%llx size=%llx blocksize=%llx\n",
 			      virt, size, blocksize);
 			if (size >= blocksize && !(virt & (blocksize - 1))) {
 				/* Page fits, create block PTE */
-				debug("Setting PTE %p to block virt=%llx\n",
+				pr_debug("Setting PTE %p to block virt=%llx\n",
 				      pte, virt);
 				if (level == 3)
 					*pte = phys | attrs | PTE_TYPE_PAGE;
@@ -240,12 +240,12 @@ static void add_map(struct mm_region *map)
 				break;
 			} else if (pte_type(pte) == PTE_TYPE_FAULT) {
 				/* Page doesn't fit, create subpages */
-				debug("Creating subtable for virt 0x%llx blksize=%llx\n",
+				pr_debug("Creating subtable for virt 0x%llx blksize=%llx\n",
 				      virt, blocksize);
 				new_table = create_table();
 				set_pte_table(pte, new_table);
 			} else if (pte_type(pte) == PTE_TYPE_BLOCK) {
-				debug("Split block into subtable for virt 0x%llx blksize=0x%llx\n",
+				pr_debug("Split block into subtable for virt 0x%llx blksize=0x%llx\n",
 				      virt, blocksize);
 				split_block(pte, level);
 			}
@@ -439,9 +439,9 @@ inline void flush_dcache_all(void)
 	__asm_flush_dcache_all();
 	ret = __asm_flush_l3_dcache();
 	if (ret)
-		debug("flushing dcache returns 0x%x\n", ret);
+		pr_debug("flushing dcache returns 0x%x\n", ret);
 	else
-		debug("flushing dcache successfully.\n");
+		pr_debug("flushing dcache successfully.\n");
 }
 
 /*
@@ -520,13 +520,13 @@ static u64 set_one_region(u64 start, u64 size, u64 attrs, bool flag, int level)
 			*pte &= ~PMD_ATTRINDX_MASK;
 			*pte |= attrs & PMD_ATTRINDX_MASK;
 		}
-		debug("Set attrs=%llx pte=%p level=%d\n", attrs, pte, level);
+		pr_debug("Set attrs=%llx pte=%p level=%d\n", attrs, pte, level);
 
 		return levelsize;
 	}
 
 	/* Unaligned or doesn't fit, maybe split block into table */
-	debug("addr=%llx level=%d pte=%p (%llx)\n", start, level, pte, *pte);
+	pr_debug("addr=%llx level=%d pte=%p (%llx)\n", start, level, pte, *pte);
 
 	/* Maybe we need to split the block into a table */
 	if (pte_type(pte) == PTE_TYPE_BLOCK)
@@ -548,7 +548,7 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
 	u64 real_start = start;
 	u64 real_size = size;
 
-	debug("start=%lx size=%lx\n", (ulong)start, (ulong)size);
+	pr_debug("start=%lx size=%lx\n", (ulong)start, (ulong)size);
 
 	if (!gd->arch.tlb_emerg)
 		panic("Emergency page table not setup.");
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 480d202563..eaf1011ded 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -260,7 +260,7 @@ int uclass_find_device_by_seq(enum uclass_id id, int seq_or_req_seq,
 	int ret;
 
 	*devp = NULL;
-	debug("%s: %d %d\n", __func__, find_req_seq, seq_or_req_seq);
+	pr_debug("%s: %d %d\n", __func__, find_req_seq, seq_or_req_seq);
 	if (seq_or_req_seq == -1)
 		return -ENODEV;
 	ret = uclass_get(id, &uc);
@@ -268,15 +268,15 @@ int uclass_find_device_by_seq(enum uclass_id id, int seq_or_req_seq,
 		return ret;
 
 	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
-		debug("   - %d %d '%s'\n", dev->req_seq, dev->seq, dev->name);
+		pr_debug("   - %d %d '%s'\n", dev->req_seq, dev->seq, dev->name);
 		if ((find_req_seq ? dev->req_seq : dev->seq) ==
 				seq_or_req_seq) {
 			*devp = dev;
-			debug("   - found\n");
+			pr_debug("   - found\n");
 			return 0;
 		}
 	}
-	debug("   - not found\n");
+	pr_debug("   - not found\n");
 
 	return -ENODEV;
 }

commit f111af68568aee9b98e65c2b1b6d0d47904afb65
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Mar 13 16:17:22 2018 +0800

    drivers: rknand: update ftl for rk3226 and px30
    
    1. Optimize the garbage processing.
    2. Fix the firmware upgrade failure issue.
    
    Change-Id: I20db620bcb2dbfa746eed71b2464140c67bfc227
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
index 856443654f..9351a7ddca 100644
--- a/drivers/rknand/rk_zftl_arm_v8.S
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -5,7 +5,7 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-11
+ * date: 2018-03-15
  */
 	.arch armv8-a
 	.file	"rk_zftl_arm_v8.S"
@@ -30,6 +30,437 @@ flash_mem_cmp8:
 	add	w0, w4, 1
 	ret
 	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text._list_remove_node,"ax",@progbits
+	.align	2
+	.type	_list_remove_node, %function
+_list_remove_node:
+	adrp	x3, .LANCHOR0
+	and	w1, w1, 65535
+	mov	w5, 65535
+	ldr	x7, [x0]
+	ldr	x4, [x3, #:lo12:.LANCHOR0]
+	mov	w3, 6
+	umull	x1, w1, w3
+	add	x6, x4, x1
+	ldrh	w3, [x4, x1]
+	cmp	w3, w5
+	ldrh	w5, [x6, 2]
+	bne	.L7
+	cmp	w5, w3
+	bne	.L7
+	cmp	x6, x7
+	bne	.L6
+.L7:
+	mov	w8, 65535
+	cmp	w5, w8
+	bne	.L9
+	cmp	x6, x7
+	beq	.L9
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR1
+	adrp	x0, .LC0
+	mov	w2, 182
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR1
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L10:
+	b	.L10
+.L9:
+	cmp	x6, x7
+	mov	w7, 65535
+	bne	.L11
+	cmp	w3, w7
+	bne	.L12
+	str	xzr, [x0]
+.L13:
+	mov	w0, -1
+	strh	w0, [x4, x1]
+	strh	w0, [x6, 2]
+	ldrh	w0, [x2]
+	sub	w0, w0, #1
+	strh	w0, [x2]
+.L6:
+	ret
+.L12:
+	mov	w5, 6
+	umaddl	x3, w3, w5, x4
+	str	x3, [x0]
+	mov	w0, -1
+	strh	w0, [x3, 2]
+	b	.L13
+.L11:
+	cmp	w3, w7
+	bne	.L14
+	cmp	w5, w3
+	beq	.L13
+	mov	w0, 6
+	umull	x5, w5, w0
+	mov	w0, -1
+	strh	w0, [x4, x5]
+	b	.L13
+.L14:
+	mov	w7, 6
+	umaddl	x0, w3, w7, x4
+	strh	w5, [x0, 2]
+	ldrh	w0, [x6, 2]
+	umull	x0, w0, w7
+	strh	w3, [x4, x0]
+	b	.L13
+	.size	_list_remove_node, .-_list_remove_node
+	.section	.text._list_pop_index_node,"ax",@progbits
+	.align	2
+	.type	_list_pop_index_node, %function
+_list_pop_index_node:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldr	x20, [x0]
+	cbz	x20, .L24
+	adrp	x3, .LANCHOR0
+	and	w1, w1, 65535
+	mov	w4, 65535
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR0]
+.L20:
+	cbnz	w1, .L21
+.L23:
+	sub	x19, x20, x19
+	mov	x1, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x19, x19, x1
+	and	w19, w19, 65535
+	mov	w1, w19
+	bl	_list_remove_node
+	mov	w0, -1
+	strh	w0, [x20]
+	strh	w0, [x20, 2]
+	mov	w0, w19
+.L18:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L21:
+	ldrh	w3, [x20]
+	cmp	w3, w4
+	beq	.L23
+	sub	w1, w1, #1
+	umaddl	x20, w3, w5, x19
+	and	w1, w1, 65535
+	b	.L20
+.L24:
+	mov	w0, 65535
+	b	.L18
+	.size	_list_pop_index_node, .-_list_pop_index_node
+	.section	.text._insert_free_list,"ax",@progbits
+	.align	2
+	.type	_insert_free_list, %function
+_insert_free_list:
+	adrp	x3, .LANCHOR2
+	and	w1, w1, 65535
+	ldrh	w3, [x3, #:lo12:.LANCHOR2]
+	cmp	w3, w1
+	bls	.L26
+	ldrh	w3, [x2]
+	mov	w5, 6
+	ldr	x8, [x0]
+	add	w3, w3, 1
+	strh	w3, [x2]
+	adrp	x2, .LANCHOR0
+	umull	x12, w1, w5
+	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	mov	w2, -1
+	add	x7, x6, x12
+	strh	w2, [x7, 2]
+	strh	w2, [x6, x12]
+	cbnz	x8, .L28
+.L33:
+	str	x7, [x0]
+	ret
+.L28:
+	adrp	x2, .LANCHOR3
+	mov	x3, -6148914691236517206
+	movk	x3, 0xaaab, lsl 0
+	mov	w10, w5
+	ldr	x11, [x2, #:lo12:.LANCHOR3]
+	ubfiz	x2, x1, 2, 16
+	mov	w14, 65535
+	ldr	w4, [x11, x2]
+	ldrh	w2, [x11, x2]
+	ubfx	x4, x4, 11, 8
+	and	w2, w2, 2047
+	add	w4, w2, w4, lsl 3
+	sub	x2, x8, x6
+	asr	x2, x2, 1
+	and	w4, w4, 4095
+	mul	x2, x2, x3
+	mov	x3, x8
+	and	w2, w2, 65535
+.L31:
+	ubfiz	x13, x2, 2, 16
+	ldr	w5, [x11, x13]
+	ldrh	w13, [x11, x13]
+	ubfx	x5, x5, 11, 8
+	and	w13, w13, 2047
+	add	w5, w13, w5, lsl 3
+	and	w5, w5, 4095
+	cmp	w4, w5
+	bls	.L29
+	ldrh	w5, [x3]
+	cmp	w5, w14
+	bne	.L30
+	strh	w2, [x7, 2]
+	strh	w1, [x3]
+	ret
+.L30:
+	umaddl	x3, w5, w10, x6
+	mov	w2, w5
+	b	.L31
+.L29:
+	ldrh	w4, [x3, 2]
+	cmp	x8, x3
+	strh	w4, [x7, 2]
+	strh	w2, [x6, x12]
+	bne	.L32
+	strh	w1, [x8, 2]
+	b	.L33
+.L32:
+	ldrh	w0, [x3, 2]
+	mov	w2, 6
+	umull	x0, w0, w2
+	strh	w1, [x6, x0]
+	strh	w1, [x3, 2]
+.L26:
+	ret
+	.size	_insert_free_list, .-_insert_free_list
+	.section	.text._insert_data_list,"ax",@progbits
+	.align	2
+	.type	_insert_data_list, %function
+_insert_data_list:
+	adrp	x4, .LANCHOR2
+	and	w1, w1, 65535
+	ldrh	w3, [x4, #:lo12:.LANCHOR2]
+	cmp	w3, w1
+	bls	.L50
+	ldrh	w3, [x2]
+	mov	w11, 6
+	ldr	x8, [x0]
+	add	w3, w3, 1
+	strh	w3, [x2]
+	adrp	x2, .LANCHOR0
+	umull	x13, w1, w11
+	ldr	x6, [x2, #:lo12:.LANCHOR0]
+	mov	w2, -1
+	add	x7, x6, x13
+	strh	w2, [x7, 2]
+	strh	w2, [x6, x13]
+	cbnz	x8, .L37
+	str	x7, [x0]
+	ret
+.L37:
+	stp	x29, x30, [sp, -32]!
+	adrp	x2, .LANCHOR4
+	mov	x3, -6148914691236517206
+	mov	w12, -1
+	add	x29, sp, 0
+	ldr	x15, [x2, #:lo12:.LANCHOR4]
+	ubfiz	x2, x1, 1, 16
+	movk	x3, 0xaaab, lsl 0
+	ldrh	w30, [x4, #:lo12:.LANCHOR2]
+	mov	x5, x8
+	stp	x19, x20, [sp, 16]
+	mov	w10, 0
+	mov	w19, 65535
+	ldrh	w16, [x15, x2]
+	ldrh	w2, [x7, 4]
+	cmp	w2, 0
+	mul	w14, w16, w2
+	sub	x2, x8, x6
+	asr	x2, x2, 1
+	csel	w14, w14, w12, ne
+	mul	x2, x2, x3
+	adrp	x3, .LANCHOR3
+	ldr	x17, [x3, #:lo12:.LANCHOR3]
+	and	w2, w2, 65535
+.L45:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	cmp	w10, w30
+	bhi	.L34
+	cmp	w1, w2
+	beq	.L34
+	uxtw	x4, w2
+	ldrh	w20, [x5, 4]
+	cmp	w20, 0
+	ldrh	w3, [x15, x4, lsl 1]
+	mul	w3, w3, w20
+	csel	w3, w3, w12, ne
+	cmp	w14, w3
+	bne	.L41
+	lsl	x4, x4, 2
+	ldr	w3, [x17, x4]
+	ldrh	w4, [x17, x4]
+	ubfx	x3, x3, 11, 8
+	and	w4, w4, 2047
+	add	w3, w4, w3, lsl 3
+	and	w3, w3, 4095
+	cmp	w16, w3
+	bhi	.L43
+.L42:
+	ldrh	w3, [x5, 2]
+	cmp	x8, x5
+	strh	w3, [x7, 2]
+	strh	w2, [x6, x13]
+	bne	.L46
+	strh	w1, [x8, 2]
+	str	x7, [x0]
+	b	.L34
+.L41:
+	bcc	.L42
+.L43:
+	ldrh	w3, [x5]
+	cmp	w3, w19
+	bne	.L44
+	strh	w2, [x7, 2]
+	strh	w1, [x5]
+.L34:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L44:
+	umaddl	x5, w3, w11, x6
+	mov	w2, w3
+	b	.L45
+.L46:
+	ldrh	w0, [x5, 2]
+	mov	w2, 6
+	umull	x0, w0, w2
+	strh	w1, [x6, x0]
+	strh	w1, [x5, 2]
+	b	.L34
+.L50:
+	ret
+	.size	_insert_data_list, .-_insert_data_list
+	.section	.text._list_get_gc_head_node.isra.2,"ax",@progbits
+	.align	2
+	.type	_list_get_gc_head_node.isra.2, %function
+_list_get_gc_head_node.isra.2:
+	and	w1, w1, 65535
+	cbz	x0, .L57
+	adrp	x2, .LANCHOR0
+	mov	w3, 65535
+	mov	w4, 6
+	ldr	x2, [x2, #:lo12:.LANCHOR0]
+.L54:
+	cbz	w1, .L55
+	ldrh	w0, [x0]
+	cmp	w0, w3
+	bne	.L56
+	ret
+.L56:
+	sub	w1, w1, #1
+	umaddl	x0, w0, w4, x2
+	and	w1, w1, 65535
+	b	.L54
+.L57:
+	mov	w0, 65535
+	ret
+.L55:
+	sub	x0, x0, x2
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	and	w0, w0, 65535
+	ret
+	.size	_list_get_gc_head_node.isra.2, .-_list_get_gc_head_node.isra.2
+	.section	.text._list_update_data_list,"ax",@progbits
+	.align	2
+	.type	_list_update_data_list, %function
+_list_update_data_list:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w1, 65535
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	ldrh	w3, [x1, 16]
+	str	x21, [sp, 32]
+	cmp	w3, w19
+	beq	.L59
+	ldrh	w3, [x1, 48]
+	cmp	w3, w19
+	beq	.L59
+	ldrh	w1, [x1, 80]
+	cmp	w1, w19
+	beq	.L59
+	adrp	x1, .LANCHOR0
+	mov	w3, 6
+	ldr	x4, [x1, #:lo12:.LANCHOR0]
+	umull	x3, w19, w3
+	ldr	x1, [x0]
+	add	x5, x4, x3
+	cmp	x5, x1
+	beq	.L59
+	ldrh	w1, [x5, 2]
+	mov	x20, x0
+	mov	x21, x2
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L61
+	ldrh	w0, [x4, x3]
+	cmp	w0, w1
+	bne	.L61
+	adrp	x1, .LANCHOR6
+	adrp	x0, .LC0
+	mov	w2, 249
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L62:
+	b	.L62
+.L61:
+	adrp	x0, .LANCHOR4
+	ubfiz	x2, x19, 1, 16
+	ldrh	w5, [x5, 4]
+	mov	w6, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	cmp	w5, 0
+	ldrh	w3, [x0, x2]
+	mov	w2, 6
+	umull	x1, w1, w2
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	mul	w3, w3, w5
+	asr	x5, x1, 1
+	add	x1, x4, x1
+	csel	w3, w3, w6, ne
+	mul	x5, x5, x2
+	ldrh	w1, [x1, 4]
+	cmp	w1, 0
+	ldrh	w0, [x0, x5, lsl 1]
+	mul	w0, w0, w1
+	csel	w0, w0, w6, ne
+	cmp	w3, w0
+	bcs	.L59
+	mov	x2, x21
+	mov	w1, w19
+	mov	x0, x20
+	bl	_list_remove_node
+	mov	x2, x21
+	mov	w1, w19
+	mov	x0, x20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	_insert_data_list
+.L59:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	_list_update_data_list, .-_list_update_data_list
 	.section	.text.nand_flash_print_info,"ax",@progbits
 	.align	2
 	.global	nand_flash_print_info
@@ -37,13 +468,6 @@ flash_mem_cmp8:
 nand_flash_print_info:
 	ret
 	.size	nand_flash_print_info, .-nand_flash_print_info
-	.section	.text.FlashTimingCfg,"ax",@progbits
-	.align	2
-	.global	FlashTimingCfg
-	.type	FlashTimingCfg, %function
-FlashTimingCfg:
-	ret
-	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.timer_delay_ns,"ax",@progbits
 	.align	2
 	.global	timer_delay_ns
@@ -52,11 +476,11 @@ timer_delay_ns:
 	sub	sp, sp, #16
 	lsr	w0, w0, 4
 	str	w0, [sp, 12]
-.L9:
+.L70:
 	ldr	w0, [sp, 12]
 	sub	w1, w0, #1
 	str	w1, [sp, 12]
-	cbnz	w0, .L9
+	cbnz	w0, .L70
 	add	sp, sp, 16
 	ret
 	.size	timer_delay_ns, .-timer_delay_ns
@@ -86,54 +510,54 @@ toshiba_set_rr_para:
 	mov	x4, x0
 	add	w2, w11, 1
 	mov	w0, 5
-	adrp	x6, .LANCHOR4
-	add	x6, x6, :lo12:.LANCHOR4
-	adrp	x3, .LANCHOR0
-	add	x3, x3, :lo12:.LANCHOR0
+	adrp	x6, .LANCHOR11
+	add	x6, x6, :lo12:.LANCHOR11
+	adrp	x3, .LANCHOR7
+	add	x3, x3, :lo12:.LANCHOR7
 	umull	x2, w2, w0
-	adrp	x0, .LANCHOR1
-	add	x7, x0, :lo12:.LANCHOR1
+	adrp	x0, .LANCHOR8
+	add	x7, x0, :lo12:.LANCHOR8
 	mov	x5, x0
 	ldrb	w0, [x6]
 	add	x3, x3, x2
 	add	x7, x7, x2
-	adrp	x8, .LANCHOR2
+	adrp	x8, .LANCHOR9
 	mov	x2, 0
-	adrp	x10, .LANCHOR3
-	add	x8, x8, :lo12:.LANCHOR2
-	add	x10, x10, :lo12:.LANCHOR3
+	adrp	x10, .LANCHOR10
+	add	x8, x8, :lo12:.LANCHOR9
+	add	x10, x10, :lo12:.LANCHOR10
 	cmp	w0, w2
-	bhi	.L22
+	bhi	.L83
 	ret
-.L16:
+.L77:
 	cmp	w0, 35
-	bne	.L18
+	bne	.L79
 	ldrsb	w0, [x3, x2]
-	b	.L23
-.L18:
+	b	.L84
+.L79:
 	ldrsb	w0, [x10, w11, sxtw]
-	b	.L23
-.L22:
+	b	.L84
+.L83:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L19:
+.L80:
 	mov	w0, 85
 	str	w0, [x4, 8]
-	add	x0, x5, :lo12:.LANCHOR1
+	add	x0, x5, :lo12:.LANCHOR8
 	ldrsb	w0, [x2, x0]
 	str	w0, [x4, 4]
 	mov	w0, 200
 	bl	timer_delay_ns
 	ldrb	w0, [x8]
 	cmp	w0, 34
-	bne	.L16
+	bne	.L77
 	ldrsb	w0, [x7, x2]
-.L23:
+.L84:
 	str	w0, [x4]
 	add	x2, x2, 1
 	ldrb	w0, [x6]
 	cmp	w0, w2
-	bhi	.L19
+	bhi	.L80
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
@@ -141,11 +565,11 @@ toshiba_set_rr_para:
 	.align	2
 	.type	hynix_set_rr_para, %function
 hynix_set_rr_para:
-	adrp	x2, .LANCHOR5
+	adrp	x2, .LANCHOR12
 	and	w1, w1, 255
 	mov	x3, 32
 	and	w0, w0, 255
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	ldr	x2, [x2, #:lo12:.LANCHOR12]
 	mov	x4, 0
 	add	x6, x2, 128
 	add	x2, x2, 112
@@ -156,19 +580,19 @@ hynix_set_rr_para:
 	umaddl	x1, w1, w0, x3
 	ubfiz	x0, x0, 8, 8
 	add	x2, x2, x1
-	adrp	x1, .LANCHOR6
-	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR13
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	add	x3, x3, x0
 	mov	w0, 54
 	str	w0, [x3, 2056]
-	bhi	.L30
+	bhi	.L91
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ret
-.L30:
+.L91:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
-.L26:
+.L87:
 	ldrb	w0, [x6, x4]
 	str	w0, [x3, 2052]
 	mov	w0, 120
@@ -177,7 +601,7 @@ hynix_set_rr_para:
 	str	w0, [x3, 2048]
 	add	x4, x4, 1
 	cmp	w5, w4, uxtb
-	bhi	.L26
+	bhi	.L87
 	mov	w0, 22
 	str	w0, [x3, 2056]
 	ldp	x29, x30, [sp], 16
@@ -188,29 +612,29 @@ hynix_set_rr_para:
 	.global	hynix_reconfig_rr_para
 	.type	hynix_reconfig_rr_para, %function
 hynix_reconfig_rr_para:
-	adrp	x1, .LANCHOR2
-	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x1, .LANCHOR9
+	ldrb	w1, [x1, #:lo12:.LANCHOR9]
 	sub	w1, w1, #1
 	and	w1, w1, 255
 	cmp	w1, 6
-	bhi	.L37
-	adrp	x8, .LANCHOR5
+	bhi	.L98
+	adrp	x8, .LANCHOR12
 	and	w0, w0, 255
 	sxtw	x7, w0
-	ldr	x1, [x8, #:lo12:.LANCHOR5]
+	ldr	x1, [x8, #:lo12:.LANCHOR12]
 	add	x1, x1, x7
 	ldrb	w1, [x1, 120]
-	cbz	w1, .L37
+	cbz	w1, .L98
 	stp	x29, x30, [sp, -16]!
 	mov	w1, 0
 	add	x29, sp, 0
 	bl	hynix_set_rr_para
-	ldr	x0, [x8, #:lo12:.LANCHOR5]
+	ldr	x0, [x8, #:lo12:.LANCHOR12]
 	add	x0, x0, x7
 	strb	wzr, [x0, 120]
 	ldp	x29, x30, [sp], 16
 	ret
-.L37:
+.L98:
 	ret
 	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
 	.section	.text.nandc_set_ddr_para,"ax",@progbits
@@ -218,20 +642,20 @@ hynix_reconfig_rr_para:
 	.global	nandc_set_ddr_para
 	.type	nandc_set_ddr_para, %function
 nandc_set_ddr_para:
-	adrp	x1, .LANCHOR7
+	adrp	x1, .LANCHOR14
 	and	w0, w0, 255
-	adrp	x2, .LANCHOR6
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
-	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
 	cmp	w1, 9
 	lsl	w1, w0, 16
 	lsl	w0, w0, 8
 	orr	w1, w1, w0
 	orr	w1, w1, 3
-	bne	.L41
+	bne	.L102
 	str	w1, [x2, 80]
 	ret
-.L41:
+.L102:
 	str	w1, [x2, 304]
 	ret
 	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
@@ -240,43 +664,43 @@ nandc_set_ddr_para:
 	.global	nandc_get_ddr_para
 	.type	nandc_get_ddr_para, %function
 nandc_get_ddr_para:
-	adrp	x0, .LANCHOR7
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	cmp	w0, 9
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
-	bne	.L44
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	bne	.L105
 	ldr	w0, [x0, 80]
-.L46:
+.L107:
 	ubfx	x0, x0, 8, 8
 	ret
-.L44:
+.L105:
 	ldr	w0, [x0, 304]
-	b	.L46
+	b	.L107
 	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
 	.section	.text.nandc_set_if_mode,"ax",@progbits
 	.align	2
 	.global	nandc_set_if_mode
 	.type	nandc_set_if_mode, %function
 nandc_set_if_mode:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	and	w0, w0, 255
 	tst	w0, 6
-	ldr	x2, [x1, #:lo12:.LANCHOR6]
+	ldr	x2, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x2]
-	beq	.L48
+	beq	.L109
 	tst	x0, 4
 	orr	w1, w1, 24576
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR14
 	and	w1, w1, -32769
 	orr	w1, w1, 196608
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	orr	w3, w1, 32768
 	csel	w1, w3, w1, ne
 	cmp	w0, 9
 	mov	w0, 4099
 	movk	w0, 0x10, lsl 16
-	bne	.L50
+	bne	.L111
 	mov	w3, 8321
 	str	w3, [x2, 8]
 	str	w0, [x2, 80]
@@ -284,10 +708,10 @@ nandc_set_if_mode:
 	str	w0, [x2, 84]
 	mov	w0, 39
 	str	w0, [x2, 84]
-.L51:
+.L112:
 	str	w1, [x2]
 	ret
-.L50:
+.L111:
 	mov	w3, 8322
 	str	w3, [x2, 344]
 	str	w0, [x2, 304]
@@ -295,20 +719,20 @@ nandc_set_if_mode:
 	str	w0, [x2, 308]
 	mov	w0, 39
 	str	w0, [x2, 308]
-	b	.L51
-.L48:
+	b	.L112
+.L109:
 	and	w1, w1, -8193
-	b	.L51
+	b	.L112
 	.size	nandc_set_if_mode, .-nandc_set_if_mode
 	.section	.text.nandc_cs,"ax",@progbits
 	.align	2
 	.global	nandc_cs
 	.type	nandc_cs, %function
 nandc_cs:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	mov	w2, 1
 	lsl	w0, w2, w0
-	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	ldr	x3, [x1, #:lo12:.LANCHOR13]
 	ldr	w1, [x3]
 	bfi	w1, w0, 0, 8
 	str	w1, [x3]
@@ -319,8 +743,8 @@ nandc_cs:
 	.global	nandc_de_cs
 	.type	nandc_de_cs, %function
 nandc_de_cs:
-	adrp	x0, .LANCHOR6
-	ldr	x1, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR13
+	ldr	x1, [x0, #:lo12:.LANCHOR13]
 	ldr	w0, [x1]
 	and	w0, w0, -256
 	and	w0, w0, -131073
@@ -334,27 +758,27 @@ nandc_de_cs:
 flash_wait_device_ready_raw:
 	stp	x29, x30, [sp, -16]!
 	mov	w5, w1
-	adrp	x1, .LANCHOR8
+	adrp	x1, .LANCHOR15
 	and	w0, w0, 255
 	add	x29, sp, 0
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, w0
-	bhi	.L57
-	adrp	x1, .LANCHOR9
+	bhi	.L118
+	adrp	x1, .LANCHOR16
 	adrp	x0, .LC0
-	mov	w2, 604
-	add	x1, x1, :lo12:.LANCHOR9
+	mov	w2, 620
+	add	x1, x1, :lo12:.LANCHOR16
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L58:
-	b	.L58
-.L57:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
+.L119:
+	b	.L119
+.L118:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	w7, w2
 	ldrb	w6, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR13
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
 	mov	w0, w6
 	bl	nandc_cs
 	ubfiz	x3, x6, 8, 8
@@ -367,22 +791,22 @@ flash_wait_device_ready_raw:
 	str	w1, [x3, 2052]
 	lsr	w5, w5, 16
 	str	w5, [x3, 2052]
-.L65:
+.L126:
 	bl	timer_delay_ns
 	ldr	w2, [x3, 2048]
 	and	w2, w2, 255
 	bics	wzr, w7, w2
-	bne	.L60
+	bne	.L121
 	cmp	w2, 255
-	beq	.L60
+	beq	.L121
 	mov	w0, w6
 	bl	nandc_de_cs
 	ldp	x29, x30, [sp], 16
 	mov	w0, w2
 	ret
-.L60:
+.L121:
 	mov	w0, 20
-	b	.L65
+	b	.L126
 	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
 	.section	.text.flash_wait_device_ready,"ax",@progbits
 	.align	2
@@ -393,31 +817,31 @@ flash_wait_device_ready:
 	ubfx	x6, x0, 21, 3
 	and	w1, w0, 2097151
 	tst	x0, 50331648
-	bne	.L67
-	adrp	x0, .LANCHOR11
-	adrp	x5, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L68
-	ldrb	w0, [x5, #:lo12:.LANCHOR12]
-	cbz	w0, .L67
-.L68:
-	adrp	x0, .LANCHOR13
-	ldrh	w3, [x0, #:lo12:.LANCHOR13]
-	ldrb	w0, [x5, #:lo12:.LANCHOR12]
+	bne	.L128
+	adrp	x0, .LANCHOR18
+	adrp	x5, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L129
+	ldrb	w0, [x5, #:lo12:.LANCHOR19]
+	cbz	w0, .L128
+.L129:
+	adrp	x0, .LANCHOR20
+	ldrh	w3, [x0, #:lo12:.LANCHOR20]
+	ldrb	w0, [x5, #:lo12:.LANCHOR19]
 	udiv	w4, w1, w3
 	mul	w4, w4, w3
 	sub	w3, w1, w4
-	cbz	w0, .L69
+	cbz	w0, .L130
 	add	w1, w4, w3, lsl 1
-.L67:
+.L128:
 	mov	w0, w6
 	b	flash_wait_device_ready_raw
-.L69:
-	adrp	x5, .LANCHOR14
-	add	x5, x5, :lo12:.LANCHOR14
+.L130:
+	adrp	x5, .LANCHOR21
+	add	x5, x5, :lo12:.LANCHOR21
 	ldrh	w3, [x5, w3, uxtw 1]
 	add	w1, w3, w4
-	b	.L67
+	b	.L128
 	.size	flash_wait_device_ready, .-flash_wait_device_ready
 	.section	.text.nandc_wait_flash_ready,"ax",@progbits
 	.align	2
@@ -427,25 +851,25 @@ nandc_wait_flash_ready:
 	mov	w2, 34464
 	stp	x29, x30, [sp, -32]!
 	movk	w2, 0x1, lsl 16
-	adrp	x3, .LANCHOR6
+	adrp	x3, .LANCHOR13
 	add	x29, sp, 0
-.L78:
+.L139:
 	mov	w0, 100
 	bl	timer_delay_ns
-	ldr	x0, [x3, #:lo12:.LANCHOR6]
+	ldr	x0, [x3, #:lo12:.LANCHOR13]
 	ldr	w0, [x0]
 	str	w0, [x29, 24]
 	ldr	w0, [x29, 24]
-	tbnz	x0, 9, .L79
+	tbnz	x0, 9, .L140
 	subs	w2, w2, #1
-	bne	.L78
+	bne	.L139
 	mov	w0, -1
-.L76:
+.L137:
 	ldp	x29, x30, [sp], 32
 	ret
-.L79:
+.L140:
 	mov	w0, 0
-	b	.L76
+	b	.L137
 	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
 	.section	.text.sandisk_set_rr_para,"ax",@progbits
 	.align	2
@@ -463,35 +887,35 @@ sandisk_set_rr_para:
 	mov	w0, 200
 	bl	timer_delay_ns
 	add	w1, w2, 1
-	adrp	x0, .LANCHOR4
-	adrp	x2, .LANCHOR0
-	add	x2, x2, :lo12:.LANCHOR0
-	ldrb	w4, [x0, #:lo12:.LANCHOR4]
-	adrp	x0, .LANCHOR2
-	ldrb	w5, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR11
+	adrp	x2, .LANCHOR7
+	add	x2, x2, :lo12:.LANCHOR7
+	ldrb	w4, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR9
+	ldrb	w5, [x0, #:lo12:.LANCHOR9]
 	mov	w0, 5
 	umull	x1, w1, w0
-	adrp	x0, .LANCHOR1
-	add	x0, x0, :lo12:.LANCHOR1
+	adrp	x0, .LANCHOR8
+	add	x0, x0, :lo12:.LANCHOR8
 	add	x2, x2, x1
 	add	x1, x0, x1
 	mov	x0, 0
-.L83:
+.L144:
 	cmp	w4, w0
-	bhi	.L86
+	bhi	.L147
 	ldp	x29, x30, [sp], 16
 	b	nandc_wait_flash_ready
-.L86:
+.L147:
 	cmp	w5, 67
-	bne	.L84
+	bne	.L145
 	ldrsb	w6, [x1, x0]
-.L88:
+.L149:
 	add	x0, x0, 1
 	str	w6, [x3]
-	b	.L83
-.L84:
+	b	.L144
+.L145:
 	ldrsb	w6, [x2, x0]
-	b	.L88
+	b	.L149
 	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
 	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
 	.align	2
@@ -510,8 +934,8 @@ toshiba_3d_set_tlc_rr_para:
 	madd	x1, x2, x1, x1
 	mov	w0, -119
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR15
-	add	x0, x0, :lo12:.LANCHOR15
+	adrp	x0, .LANCHOR22
+	add	x0, x0, :lo12:.LANCHOR22
 	add	x5, x0, x1
 	ldrsb	w0, [x0, x1]
 	str	w0, [x4]
@@ -546,8 +970,8 @@ toshiba_3d_set_slc_rr_para:
 	str	wzr, [x0, 4]
 	mov	w2, -117
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR16
-	add	x2, x2, :lo12:.LANCHOR16
+	adrp	x2, .LANCHOR23
+	add	x2, x2, :lo12:.LANCHOR23
 	add	x1, x2, x1, uxtb
 	ldrsb	w1, [x1, 1]
 	str	w1, [x0]
@@ -563,7 +987,7 @@ toshiba_3d_set_slc_rr_para:
 toshiba_tlc_set_rr_para:
 	mov	w6, 239
 	uxtw	x1, w1
-	cbz	w2, .L93
+	cbz	w2, .L154
 	stp	x29, x30, [sp, -16]!
 	mov	x4, x0
 	mov	x2, 7
@@ -572,8 +996,8 @@ toshiba_tlc_set_rr_para:
 	str	w6, [x4, 8]
 	mul	x1, x1, x2
 	str	w0, [x4, 4]
-	adrp	x0, .LANCHOR17
-	add	x0, x0, :lo12:.LANCHOR17
+	adrp	x0, .LANCHOR24
+	add	x0, x0, :lo12:.LANCHOR24
 	add	x5, x0, x1
 	ldrb	w0, [x0, x1]
 	str	w0, [x4]
@@ -595,49 +1019,58 @@ toshiba_tlc_set_rr_para:
 	str	w0, [x4]
 	str	wzr, [x4]
 	ldp	x29, x30, [sp], 16
-.L96:
+.L157:
 	b	nandc_wait_flash_ready
-.L93:
+.L154:
 	str	w6, [x0, 8]
 	mov	w2, 20
 	str	w2, [x0, 4]
-	adrp	x2, .LANCHOR18
-	add	x2, x2, :lo12:.LANCHOR18
+	adrp	x2, .LANCHOR25
+	add	x2, x2, :lo12:.LANCHOR25
 	ldrb	w1, [x2, x1]
 	str	w1, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
 	str	wzr, [x0]
-	b	.L96
+	b	.L157
 	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
-	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.section	.text.zftl_flash_enter_slc_mode,"ax",@progbits
 	.align	2
-	.global	flash_enter_slc_mode
-	.type	flash_enter_slc_mode, %function
-flash_enter_slc_mode:
-	adrp	x1, .LANCHOR11
+	.global	zftl_flash_enter_slc_mode
+	.type	zftl_flash_enter_slc_mode, %function
+zftl_flash_enter_slc_mode:
+	adrp	x1, .LANCHOR18
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L99
-	adrp	x1, .LANCHOR6
+	ldrb	w2, [x1, #:lo12:.LANCHOR18]
+	cbz	w2, .L160
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
-	bne	.L101
-	adrp	x2, .LANCHOR19+29
-	ldrb	w2, [x2, #:lo12:.LANCHOR19+29]
-	cbz	w2, .L99
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L163
+.L180:
+	adrp	x2, .LANCHOR26+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR26+29]
+	cbz	w2, .L160
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L101:
+.L163:
 	cmp	w2, 2
-	bne	.L99
-	adrp	x2, .LANCHOR20
-	ldrb	w3, [x2, #:lo12:.LANCHOR20]
-	cbz	w3, .L99
+	bne	.L165
+	adrp	x2, .LANCHOR27
+	ldrb	w3, [x2, #:lo12:.LANCHOR27]
+	cbz	w3, .L160
+	strb	wzr, [x2, #:lo12:.LANCHOR27]
+	b	.L180
+.L165:
+	cmp	w2, 3
+	bne	.L160
+	adrp	x2, .LANCHOR27
+	ldrb	w3, [x2, #:lo12:.LANCHOR27]
+	cbz	w3, .L160
 	ubfiz	x0, x0, 8, 8
-	strb	wzr, [x2, #:lo12:.LANCHOR20]
+	strb	wzr, [x2, #:lo12:.LANCHOR27]
 	add	x0, x1, x0
 	mov	w1, 239
 	str	w1, [x0, 2056]
@@ -649,40 +1082,56 @@ flash_enter_slc_mode:
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
 	b	nandc_wait_flash_ready
-.L99:
+.L160:
 	ret
-	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
-	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.size	zftl_flash_enter_slc_mode, .-zftl_flash_enter_slc_mode
+	.section	.text.zftl_flash_exit_slc_mode,"ax",@progbits
 	.align	2
-	.global	flash_exit_slc_mode
-	.type	flash_exit_slc_mode, %function
-flash_exit_slc_mode:
-	adrp	x1, .LANCHOR11
+	.global	zftl_flash_exit_slc_mode
+	.type	zftl_flash_exit_slc_mode, %function
+zftl_flash_exit_slc_mode:
+	adrp	x1, .LANCHOR18
 	and	x0, x0, 255
-	ldrb	w2, [x1, #:lo12:.LANCHOR11]
-	cbz	w2, .L111
-	adrp	x1, .LANCHOR6
+	ldrb	w2, [x1, #:lo12:.LANCHOR18]
+	cbz	w2, .L181
+	adrp	x1, .LANCHOR13
 	cmp	w2, 1
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
-	bne	.L113
-	adrp	x2, .LANCHOR19+30
-	ldrb	w2, [x2, #:lo12:.LANCHOR19+30]
-	cbz	w2, .L111
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L184
+	adrp	x2, .LANCHOR26+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR26+30]
+.L201:
+	cbz	w2, .L181
 	add	x0, x0, 8
 	add	x0, x1, x0, lsl 8
 	str	w2, [x0, 8]
 	ret
-.L113:
+.L184:
 	cmp	w2, 2
-	bne	.L111
-	adrp	x3, .LANCHOR20
-	ldrb	w2, [x3, #:lo12:.LANCHOR20]
-	cbnz	w2, .L111
+	bne	.L186
+	adrp	x4, .LANCHOR27
+	ldrb	w2, [x4, #:lo12:.LANCHOR27]
+	cbnz	w2, .L181
+	adrp	x2, .LANCHOR26
+	add	x2, x2, :lo12:.LANCHOR26
+	mov	w5, 4
+	ldrb	w3, [x2, 12]
+	ldrb	w2, [x2, 30]
+	cmp	w3, 2
+	csel	w3, w3, w5, eq
+	strb	w3, [x4, #:lo12:.LANCHOR27]
+	b	.L201
+.L186:
+	cmp	w2, 3
+	bne	.L181
+	adrp	x3, .LANCHOR27
+	ldrb	w2, [x3, #:lo12:.LANCHOR27]
+	cbnz	w2, .L181
 	ubfiz	x0, x0, 8, 8
-	adrp	x2, .LANCHOR19+12
+	adrp	x2, .LANCHOR26+12
 	add	x0, x1, x0
 	mov	w1, 239
-	ldrb	w2, [x2, #:lo12:.LANCHOR19+12]
+	ldrb	w2, [x2, #:lo12:.LANCHOR26+12]
 	mov	w4, 4
 	str	w1, [x0, 2056]
 	cmp	w2, 2
@@ -694,11 +1143,11 @@ flash_exit_slc_mode:
 	str	w1, [x0, 2048]
 	str	wzr, [x0, 2048]
 	str	wzr, [x0, 2048]
-	strb	w2, [x3, #:lo12:.LANCHOR20]
+	strb	w2, [x3, #:lo12:.LANCHOR27]
 	b	nandc_wait_flash_ready
-.L111:
+.L181:
 	ret
-	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.size	zftl_flash_exit_slc_mode, .-zftl_flash_exit_slc_mode
 	.section	.text.flash_erase_duplane_block,"ax",@progbits
 	.align	2
 	.global	flash_erase_duplane_block
@@ -707,99 +1156,94 @@ flash_erase_duplane_block:
 	stp	x29, x30, [sp, -80]!
 	and	w0, w0, 255
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w1, 255
-	adrp	x1, .LANCHOR8
+	str	x25, [sp, 64]
+	and	w25, w1, 255
+	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	str	x25, [sp, 64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
+	stp	x23, x24, [sp, 48]
 	cmp	w1, w0
-	bhi	.L124
-	adrp	x1, .LANCHOR21
+	bhi	.L203
+	adrp	x1, .LANCHOR28
 	adrp	x0, .LC0
-	mov	w2, 517
-	add	x1, x1, :lo12:.LANCHOR21
+	mov	w2, 531
+	add	x1, x1, :lo12:.LANCHOR28
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L125:
-	b	.L125
-.L124:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
+.L204:
+	b	.L204
+.L203:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	w22, w2
 	mov	w21, w3
 	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x25, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR13
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	add	x23, x19, 8
-	add	x23, x25, x23, lsl 8
-	tbz	x0, 4, .L126
+	add	x23, x24, x23, lsl 8
+	tbz	x0, 4, .L205
 	adrp	x0, .LC1
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC1
 	bl	printf
-.L126:
+.L205:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w24, .L127
-	bl	flash_enter_slc_mode
-.L128:
-	add	x25, x25, x19, lsl 8
+	cbnz	w25, .L206
+	bl	zftl_flash_enter_slc_mode
+.L207:
+	add	x24, x24, x19, lsl 8
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
 	and	w0, w22, 255
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w0, w22, 8
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w0, w22, 16
-	str	w0, [x25, 2052]
-	adrp	x0, .LANCHOR23
-	ldrb	w0, [x0, #:lo12:.LANCHOR23]
-	cbnz	w0, .L132
+	str	w0, [x24, 2052]
+	adrp	x0, .LANCHOR30
+	ldrb	w0, [x0, #:lo12:.LANCHOR30]
+	cbnz	w0, .L210
 	mov	w0, 208
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
 	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
 	and	w5, w0, w19
-.L129:
+.L208:
 	mov	w0, 96
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
 	and	w0, w21, 255
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w0, w21, 8
-	str	w0, [x25, 2052]
+	str	w0, [x24, 2052]
 	lsr	w21, w21, 16
-	str	w21, [x25, 2052]
+	str	w21, [x24, 2052]
 	mov	w0, 208
-	str	w0, [x25, 2056]
+	str	w0, [x24, 2056]
+	mov	w19, 5
 	bl	nandc_wait_flash_ready
 	mov	x0, x23
 	bl	flash_read_status
-	mov	w6, w0
-	cbnz	w24, .L130
-	mov	w0, w20
-	bl	flash_exit_slc_mode
-.L130:
+	mov	w2, w0
 	mov	w0, w20
-	mov	w19, 5
 	bl	nandc_de_cs
-	and	w19, w6, w19
+	and	w19, w2, w19
 	orr	w19, w19, w5
-	cbz	w19, .L131
+	cbz	w19, .L209
 	adrp	x0, .LC2
-	mov	w2, w6
 	mov	w1, w22
 	add	x0, x0, :lo12:.LC2
 	bl	printf
-.L131:
+.L209:
 	mov	w0, w19
 	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
@@ -807,12 +1251,12 @@ flash_erase_duplane_block:
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 80
 	ret
-.L127:
-	bl	flash_exit_slc_mode
-	b	.L128
-.L132:
+.L206:
+	bl	zftl_flash_exit_slc_mode
+	b	.L207
+.L210:
 	mov	w5, 0
-	b	.L129
+	b	.L208
 	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
 	.section	.text.flash_erase_block_en,"ax",@progbits
 	.align	2
@@ -823,47 +1267,47 @@ flash_erase_block_en:
 	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	and	w23, w1, 255
-	adrp	x1, .LANCHOR8
+	and	w24, w1, 255
+	adrp	x1, .LANCHOR15
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	cmp	w1, w0
-	bhi	.L141
-	adrp	x1, .LANCHOR24
+	bhi	.L219
+	adrp	x1, .LANCHOR31
 	adrp	x0, .LC0
-	mov	w2, 561
-	add	x1, x1, :lo12:.LANCHOR24
+	mov	w2, 576
+	add	x1, x1, :lo12:.LANCHOR31
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L142:
-	b	.L142
-.L141:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
+.L220:
+	b	.L220
+.L219:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
 	mov	w21, w2
 	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x24, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR13
+	ldr	x23, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
 	and	x19, x20, 255
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	add	x22, x19, 8
-	add	x22, x24, x22, lsl 8
-	tbz	x0, 4, .L143
+	add	x22, x23, x22, lsl 8
+	tbz	x0, 4, .L221
 	adrp	x0, .LC3
 	mov	w1, w20
 	add	x0, x0, :lo12:.LC3
 	bl	printf
-.L143:
+.L221:
 	bl	nandc_wait_flash_ready
 	mov	w0, w20
 	bl	nandc_cs
 	mov	w0, w20
-	cbnz	w23, .L144
-	bl	flash_enter_slc_mode
-.L145:
-	add	x0, x24, x19, lsl 8
+	cbnz	w24, .L222
+	bl	zftl_flash_enter_slc_mode
+.L223:
+	add	x0, x23, x19, lsl 8
 	mov	w2, 96
 	and	w1, w21, 2097151
 	str	w2, [x0, 2056]
@@ -878,33 +1322,29 @@ flash_erase_block_en:
 	bl	nandc_wait_flash_ready
 	mov	x0, x22
 	bl	flash_read_status
-	mov	w5, w0
-	cbnz	w23, .L146
-	mov	w0, w20
-	bl	flash_exit_slc_mode
-.L146:
+	mov	w19, w0
 	mov	w0, w20
-	mov	w19, 5
 	bl	nandc_de_cs
-	ands	w19, w5, w19
-	beq	.L147
-	adrp	x0, .LANCHOR13
+	mov	w0, 5
+	ands	w19, w19, w0
+	beq	.L224
+	adrp	x0, .LANCHOR20
 	mov	w2, w19
-	ldrh	w1, [x0, #:lo12:.LANCHOR13]
+	ldrh	w1, [x0, #:lo12:.LANCHOR20]
 	adrp	x0, .LC4
 	add	x0, x0, :lo12:.LC4
 	udiv	w1, w21, w1
 	bl	printf
-.L147:
+.L224:
 	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L144:
-	bl	flash_exit_slc_mode
-	b	.L145
+.L222:
+	bl	zftl_flash_exit_slc_mode
+	b	.L223
 	.size	flash_erase_block_en, .-flash_erase_block_en
 	.section	.text.flash_erase_block,"ax",@progbits
 	.align	2
@@ -921,27 +1361,27 @@ flash_erase_block:
 	.type	flash_erase_all, %function
 flash_erase_all:
 	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	mov	w19, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR13
+	adrp	x23, .LANCHOR20
 	stp	x21, x22, [sp, 32]
-	add	x23, x23, :lo12:.LANCHOR13
+	add	x23, x23, :lo12:.LANCHOR20
 	ldrh	w20, [x0, 14]
-	adrp	x22, .LANCHOR8
+	adrp	x22, .LANCHOR15
 	str	x25, [sp, 64]
-	add	x22, x22, :lo12:.LANCHOR8
-	adrp	x24, .LANCHOR10
+	add	x22, x22, :lo12:.LANCHOR15
+	adrp	x24, .LANCHOR17
 	ldrb	w1, [x0, 13]
 	mul	w20, w20, w1
 	and	w20, w20, 65535
-.L157:
+.L234:
 	ldrb	w0, [x22]
 	cmp	w0, w19
-	bhi	.L160
+	bhi	.L237
 	ldp	x19, x20, [sp, 16]
 	mov	w1, 0
 	ldp	x21, x22, [sp, 32]
@@ -951,23 +1391,23 @@ flash_erase_all:
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	b	printf
-.L160:
-	add	x0, x24, :lo12:.LANCHOR10
+.L237:
+	add	x0, x24, :lo12:.LANCHOR17
 	mov	w21, 0
 	ldrb	w25, [x0, w19, sxtw]
-.L158:
+.L235:
 	cmp	w20, w21, uxth
-	bhi	.L159
+	bhi	.L236
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L157
-.L159:
+	b	.L234
+.L236:
 	ldrh	w1, [x23]
 	mov	w0, w25
 	mul	w1, w1, w21
 	add	w21, w21, 1
 	bl	flash_erase_block
-	b	.L158
+	b	.L235
 	.size	flash_erase_all, .-flash_erase_all
 	.section	.text.flash_set_interface_mode,"ax",@progbits
 	.align	2
@@ -975,15 +1415,15 @@ flash_erase_all:
 	.type	flash_set_interface_mode, %function
 flash_set_interface_mode:
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR6
-	adrp	x5, .LANCHOR26
-	add	x5, x5, :lo12:.LANCHOR26
+	adrp	x1, .LANCHOR13
+	adrp	x5, .LANCHOR33
+	add	x5, x5, :lo12:.LANCHOR33
 	add	x29, sp, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR6]
-	adrp	x1, .LANCHOR25
+	ldr	x6, [x1, #:lo12:.LANCHOR13]
+	adrp	x1, .LANCHOR32
 	mov	x2, 0
 	mov	w11, 69
-	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	ldrb	w1, [x1, #:lo12:.LANCHOR32]
 	mov	w7, 239
 	mov	w8, 128
 	mov	w12, 1
@@ -991,63 +1431,63 @@ flash_set_interface_mode:
 	and	w4, w1, 1
 	mov	w13, 35
 	mov	w14, 5
-.L170:
+.L247:
 	lsl	x1, x2, 3
 	ldrb	w3, [x1, x5]
 	cmp	w3, 152
 	ccmp	w3, w11, 4, ne
-	beq	.L163
+	beq	.L240
 	cmp	w3, 44
-	bne	.L164
-.L163:
+	bne	.L241
+.L240:
 	cmp	w0, 1
-	bne	.L165
-	cbz	w4, .L164
+	bne	.L242
+	cbz	w4, .L241
 	add	x1, x6, x2, lsl 8
 	cmp	w3, 44
 	str	w7, [x1, 2056]
-	bne	.L166
+	bne	.L243
 	str	w0, [x1, 2052]
 	str	w14, [x1, 2048]
-.L169:
+.L246:
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
 	str	wzr, [x1, 2048]
-.L164:
+.L241:
 	add	x2, x2, 1
 	cmp	x2, 4
-	bne	.L170
+	bne	.L247
 	bl	nandc_wait_flash_ready
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-.L166:
+.L243:
 	str	w8, [x1, 2052]
 	str	w0, [x1, 2048]
-	b	.L169
-.L165:
-	cbz	w10, .L164
+	b	.L246
+.L242:
+	cbz	w10, .L241
 	add	x1, x6, x2, lsl 8
 	cmp	w3, 44
 	str	w7, [x1, 2056]
-	bne	.L168
+	bne	.L245
 	str	w12, [x1, 2052]
 	str	w13, [x1, 2048]
-	b	.L169
-.L168:
+	b	.L246
+.L245:
 	str	w8, [x1, 2052]
 	str	wzr, [x1, 2048]
-	b	.L169
+	b	.L246
 	.size	flash_set_interface_mode, .-flash_set_interface_mode
 	.section	.text.flash_reset,"ax",@progbits
 	.align	2
 	.global	flash_reset
 	.type	flash_reset, %function
 flash_reset:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x1, x1, x0
 	mov	w0, 255
 	str	w0, [x1, 8]
@@ -1058,17 +1498,17 @@ flash_reset:
 	.global	flash_read_id
 	.type	flash_read_id, %function
 flash_read_id:
-	and	w6, w0, 255
+	and	w10, w0, 255
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR6
-	mov	x5, x1
+	adrp	x0, .LANCHOR13
+	mov	x8, x1
 	add	x29, sp, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w6
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w10
 	bl	flash_reset
-	mov	w0, w6
+	mov	w0, w10
 	bl	nandc_cs
-	ubfiz	x2, x6, 8, 8
+	ubfiz	x2, x10, 8, 8
 	add	x2, x4, x2
 	mov	w0, 144
 	str	w0, [x2, 2056]
@@ -1076,24 +1516,41 @@ flash_read_id:
 	str	wzr, [x2, 2052]
 	bl	timer_delay_ns
 	ldr	w0, [x2, 2048]
-	ldp	x29, x30, [sp], 16
-	strb	w0, [x5]
+	strb	w0, [x8]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 1]
+	strb	w0, [x8, 1]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 2]
+	strb	w0, [x8, 2]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 3]
+	strb	w0, [x8, 3]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 4]
+	strb	w0, [x8, 4]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 5]
+	strb	w0, [x8, 5]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 6]
+	strb	w0, [x8, 6]
 	ldr	w0, [x2, 2048]
-	strb	w0, [x5, 7]
-	mov	w0, w6
-	b	nandc_de_cs
+	strb	w0, [x8, 7]
+	mov	w0, w10
+	bl	nandc_de_cs
+	ldrb	w2, [x8]
+	sub	w0, w2, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bhi	.L257
+	ldrb	w7, [x8, 5]
+	add	w1, w10, 1
+	ldrb	w6, [x8, 4]
+	adrp	x0, .LC6
+	ldrb	w5, [x8, 3]
+	add	x0, x0, :lo12:.LC6
+	ldrb	w4, [x8, 2]
+	ldrb	w3, [x8, 1]
+	ldp	x29, x30, [sp], 16
+	b	printf
+.L257:
+	ldp	x29, x30, [sp], 16
+	ret
 	.size	flash_read_id, .-flash_read_id
 	.section	.text.flash_read_spare,"ax",@progbits
 	.align	2
@@ -1102,12 +1559,12 @@ flash_read_id:
 flash_read_spare:
 	stp	x29, x30, [sp, -16]!
 	mov	x5, x2
-	adrp	x2, .LANCHOR19+9
+	adrp	x2, .LANCHOR26+9
 	ubfiz	x0, x0, 8, 8
 	add	x29, sp, 0
-	ldrb	w3, [x2, #:lo12:.LANCHOR19+9]
-	adrp	x2, .LANCHOR6
-	ldr	x4, [x2, #:lo12:.LANCHOR6]
+	ldrb	w3, [x2, #:lo12:.LANCHOR26+9]
+	adrp	x2, .LANCHOR13
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
 	lsl	w3, w3, 9
 	add	x4, x4, x0
 	and	w0, w1, 255
@@ -1134,19 +1591,19 @@ flash_read_spare:
 	.type	sandisk_prog_test_bad_block, %function
 sandisk_prog_test_bad_block:
 	stp	x29, x30, [sp, -16]!
-	adrp	x2, .LANCHOR6
+	adrp	x2, .LANCHOR13
 	and	w0, w0, 255
 	add	x29, sp, 0
-	ldr	x4, [x2, #:lo12:.LANCHOR6]
-	adrp	x2, .LANCHOR19
-	add	x3, x2, :lo12:.LANCHOR19
+	ldr	x4, [x2, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR26
+	add	x3, x2, :lo12:.LANCHOR26
 	mov	x5, x2
 	sxtw	x2, w0
 	add	x2, x2, 8
 	ldrb	w3, [x3, 29]
 	add	x2, x4, x2, lsl 8
-	cbz	w3, .L185
-.L192:
+	cbz	w3, .L263
+.L270:
 	ubfiz	x0, x0, 8, 8
 	str	w3, [x2, 8]
 	add	x4, x4, x0
@@ -1167,105 +1624,106 @@ sandisk_prog_test_bad_block:
 	str	w0, [x4, 2056]
 	mov	w0, 80
 	bl	timer_delay_ns
-	add	x2, x5, :lo12:.LANCHOR19
+	add	x2, x5, :lo12:.LANCHOR26
 	ldr	w0, [x4, 2048]
 	mov	w1, 5
 	and	w0, w0, w1
 	ldrb	w1, [x2, 30]
-	cbz	w1, .L184
+	cbz	w1, .L262
 	str	w1, [x4, 2056]
-.L184:
+.L262:
 	ldp	x29, x30, [sp], 16
 	ret
-.L185:
+.L263:
 	mov	w3, 162
-	b	.L192
+	b	.L270
 	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_rdy_status,"ax",@progbits
+	.align	2
+	.global	nandc_rdy_status
+	.type	nandc_rdy_status, %function
+nandc_rdy_status:
+	adrp	x0, .LANCHOR13
+	sub	sp, sp, #16
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [sp, 8]
+	ldr	w0, [sp, 8]
+	add	sp, sp, 16
+	ubfx	x0, x0, 9, 1
+	ret
+	.size	nandc_rdy_status, .-nandc_rdy_status
 	.section	.text.nandc_bch_sel,"ax",@progbits
 	.align	2
 	.global	nandc_bch_sel
 	.type	nandc_bch_sel, %function
 nandc_bch_sel:
-	adrp	x2, .LANCHOR27
+	adrp	x2, .LANCHOR34
 	mov	w1, 1
-	strb	w0, [x2, #:lo12:.LANCHOR27]
-	adrp	x2, .LANCHOR7
-	ldrb	w2, [x2, #:lo12:.LANCHOR7]
+	strb	w0, [x2, #:lo12:.LANCHOR34]
+	adrp	x2, .LANCHOR14
+	ldrb	w2, [x2, #:lo12:.LANCHOR14]
 	cmp	w2, 9
-	adrp	x2, .LANCHOR6
-	ldr	x2, [x2, #:lo12:.LANCHOR6]
-	bne	.L194
+	adrp	x2, .LANCHOR13
+	ldr	x2, [x2, #:lo12:.LANCHOR13]
+	bne	.L274
 	str	w1, [x2, 16]
 	cmp	w0, 70
-	beq	.L201
+	beq	.L281
 	cmp	w0, 60
-	beq	.L202
+	beq	.L282
 	cmp	w0, 40
 	cset	w1, eq
 	add	w1, w1, 1
-.L195:
+.L275:
 	lsl	w1, w1, 25
 	orr	w1, w1, 1
 	str	w1, [x2, 32]
 	ret
-.L201:
+.L281:
 	mov	w1, 0
-	b	.L195
-.L202:
+	b	.L275
+.L282:
 	mov	w1, 3
-	b	.L195
-.L194:
+	b	.L275
+.L274:
 	str	w1, [x2, 8]
 	cmp	w0, 16
 	mov	w1, 4096
-	bne	.L197
-.L200:
+	bne	.L277
+.L280:
 	and	w1, w1, -17
-.L198:
+.L278:
 	orr	w1, w1, 1
 	str	w1, [x2, 12]
 	ret
-.L197:
+.L277:
 	cmp	w0, 24
-	bne	.L199
+	bne	.L279
 	orr	w1, w1, 16
-	b	.L198
-.L199:
+	b	.L278
+.L279:
 	orr	w1, w1, 262144
 	cmp	w0, 40
 	orr	w1, w1, 16
-	bne	.L198
-	b	.L200
+	bne	.L278
+	b	.L280
 	.size	nandc_bch_sel, .-nandc_bch_sel
-	.section	.text.NandCIrqEnable,"ax",@progbits
+	.section	.text.zftl_nandc_get_irq_status,"ax",@progbits
 	.align	2
-	.global	NandCIrqEnable
-	.type	NandCIrqEnable, %function
-NandCIrqEnable:
-	ret
-	.size	NandCIrqEnable, .-NandCIrqEnable
-	.section	.text.NandCIrqDisable,"ax",@progbits
-	.align	2
-	.global	NandCIrqDisable
-	.type	NandCIrqDisable, %function
-NandCIrqDisable:
-	ret
-	.size	NandCIrqDisable, .-NandCIrqDisable
-	.section	.text.rk_nandc_get_irq_status,"ax",@progbits
-	.align	2
-	.global	rk_nandc_get_irq_status
-	.type	rk_nandc_get_irq_status, %function
-rk_nandc_get_irq_status:
-	adrp	x1, .LANCHOR7
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	.global	zftl_nandc_get_irq_status
+	.type	zftl_nandc_get_irq_status, %function
+zftl_nandc_get_irq_status:
+	adrp	x1, .LANCHOR14
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
 	cmp	w1, 9
-	bne	.L210
+	bne	.L288
 	ldr	w0, [x0, 296]
 	ret
-.L210:
+.L288:
 	ldr	w0, [x0, 372]
 	ret
-	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.size	zftl_nandc_get_irq_status, .-zftl_nandc_get_irq_status
 	.section	.text.rk_nandc_flash_ready,"ax",@progbits
 	.align	2
 	.global	rk_nandc_flash_ready
@@ -1273,13 +1731,13 @@ rk_nandc_get_irq_status:
 rk_nandc_flash_ready:
 	ret
 	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
-	.section	.text.NandcIqrWaitFlashReady,"ax",@progbits
+	.section	.text.nandc_iqr_wait_flash_ready,"ax",@progbits
 	.align	2
-	.global	NandcIqrWaitFlashReady
-	.type	NandcIqrWaitFlashReady, %function
-NandcIqrWaitFlashReady:
+	.global	nandc_iqr_wait_flash_ready
+	.type	nandc_iqr_wait_flash_ready, %function
+nandc_iqr_wait_flash_ready:
 	ret
-	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.size	nandc_iqr_wait_flash_ready, .-nandc_iqr_wait_flash_ready
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",@progbits
 	.align	2
 	.global	rk_nandc_flash_xfer_completed
@@ -1294,37 +1752,37 @@ rk_nandc_flash_xfer_completed:
 nandc_xfer_start:
 	stp	x29, x30, [sp, -64]!
 	and	w1, w1, 255
-	adrp	x4, .LANCHOR30
+	adrp	x4, .LANCHOR37
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
 	and	w23, w0, 255
-	adrp	x0, .LANCHOR7
+	adrp	x0, .LANCHOR14
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
 	add	w20, w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
-	adrp	x24, .LANCHOR6
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	adrp	x24, .LANCHOR13
 	cmp	w0, 9
-	bne	.L216
+	bne	.L294
 	ubfiz	w19, w23, 1, 1
 	mov	w0, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
 	bfi	w19, w0, 5, 2
-	adrp	x0, .LANCHOR28
+	adrp	x0, .LANCHOR35
 	orr	w19, w19, 536870912
-	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w0, .L217
-	adrp	x0, .LANCHOR29
-	ldrb	w1, [x0, #:lo12:.LANCHOR29]
+	cbz	w0, .L295
+	adrp	x0, .LANCHOR36
+	ldrb	w1, [x0, #:lo12:.LANCHOR36]
 	orr	w0, w19, 512
 	cmp	w1, 0
 	csel	w19, w0, w19, ne
-.L217:
-	add	x21, x4, :lo12:.LANCHOR30
+.L295:
+	add	x21, x4, :lo12:.LANCHOR37
 	add	x0, x2, 63
 	and	w20, w20, 63
 	and	x0, x0, -64
@@ -1341,7 +1799,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	mov	w2, 16
@@ -1358,22 +1816,22 @@ nandc_xfer_start:
 	cset	w2, eq
 	orr	w0, w0, 4
 	bfi	w0, w2, 1, 1
-	adrp	x2, .LANCHOR31
+	adrp	x2, .LANCHOR38
 	orr	w0, w0, 1
-	ldrh	w2, [x2, #:lo12:.LANCHOR31]
+	ldrh	w2, [x2, #:lo12:.LANCHOR38]
 	bfi	w0, w2, 16, 11
 	str	w0, [x1, 48]
 	str	w19, [x1, 16]
 	orr	w19, w19, 4
 	str	w19, [x1, 16]
-.L215:
+.L293:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L216:
-	ldr	x0, [x24, #:lo12:.LANCHOR6]
+.L294:
+	ldr	x0, [x24, #:lo12:.LANCHOR13]
 	ubfiz	w19, w23, 1, 1
 	orr	w19, w19, 8
 	asr	w20, w20, 1
@@ -1388,24 +1846,24 @@ nandc_xfer_start:
 	orr	w19, w19, 1024
 	and	w19, w19, -17
 	bfi	w19, w20, 22, 6
-	cbz	w23, .L219
-	adrp	x0, .LANCHOR27
+	cbz	w23, .L297
+	adrp	x0, .LANCHOR34
 	ubfx	x1, x1, 1, 7
-	ldr	x8, [x4, #:lo12:.LANCHOR30]
+	ldr	x8, [x4, #:lo12:.LANCHOR37]
 	add	x1, x3, x1, lsl 2
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
 	mov	w5, 128
 	cmp	w0, 24
 	mov	w0, 64
 	csel	w5, w5, w0, hi
 	mov	w0, 0
-.L221:
+.L299:
 	add	w7, w5, w0
 	cmp	x3, x1
-	bne	.L222
-.L223:
-	add	x21, x4, :lo12:.LANCHOR30
-	ldr	x0, [x4, #:lo12:.LANCHOR30]
+	bne	.L300
+.L301:
+	add	x21, x4, :lo12:.LANCHOR37
+	ldr	x0, [x4, #:lo12:.LANCHOR37]
 	and	w20, w20, 63
 	ubfiz	x1, x20, 10, 6
 	ubfiz	x20, x20, 7, 6
@@ -1422,7 +1880,7 @@ nandc_xfer_start:
 	and	x1, x1, -64
 	add	x1, x1, x20
 	bl	flush_dcache_range
-	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	ldr	x1, [x24, #:lo12:.LANCHOR13]
 	mov	w0, 1
 	str	w0, [x21, 32]
 	cmp	w23, 0
@@ -1439,8 +1897,8 @@ nandc_xfer_start:
 	str	w19, [x1, 8]
 	orr	w19, w19, 4
 	str	w19, [x1, 8]
-	b	.L215
-.L222:
+	b	.L293
+.L300:
 	ldrh	w10, [x3]
 	and	x0, x0, 4294967292
 	ldrh	w6, [x3, 2]
@@ -1448,11 +1906,11 @@ nandc_xfer_start:
 	orr	x6, x10, x6, lsl 16
 	str	w6, [x8, x0]
 	mov	w0, w7
-	b	.L221
-.L219:
-	ldr	x1, [x4, #:lo12:.LANCHOR30]
+	b	.L299
+.L297:
+	ldr	x1, [x4, #:lo12:.LANCHOR37]
 	str	w0, [x1]
-	b	.L223
+	b	.L301
 	.size	nandc_xfer_start, .-nandc_xfer_start
 	.section	.text.nandc_set_seed,"ax",@progbits
 	.align	2
@@ -1460,23 +1918,23 @@ nandc_xfer_start:
 	.type	nandc_set_seed, %function
 nandc_set_seed:
 	and	x0, x0, 127
-	adrp	x1, .LANCHOR32
-	add	x1, x1, :lo12:.LANCHOR32
+	adrp	x1, .LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR39
 	ldrh	w0, [x1, x0, lsl 1]
-	adrp	x1, .LANCHOR29
-	ldrb	w2, [x1, #:lo12:.LANCHOR29]
+	adrp	x1, .LANCHOR36
+	ldrb	w2, [x1, #:lo12:.LANCHOR36]
 	orr	w1, w0, -1073741824
 	cmp	w2, 0
 	csel	w0, w1, w0, ne
-	adrp	x1, .LANCHOR7
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	adrp	x1, .LANCHOR14
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
 	cmp	w1, 9
-	adrp	x1, .LANCHOR6
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
-	bne	.L233
+	adrp	x1, .LANCHOR13
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
+	bne	.L311
 	str	w0, [x1, 520]
 	ret
-.L233:
+.L311:
 	str	w0, [x1, 336]
 	ret
 	.size	nandc_set_seed, .-nandc_set_seed
@@ -1486,143 +1944,143 @@ nandc_set_seed:
 	.type	flash_start_page_read, %function
 flash_start_page_read:
 	stp	x29, x30, [sp, -16]!
-	and	w10, w0, 255
-	adrp	x0, .LANCHOR8
+	and	w11, w0, 255
+	adrp	x0, .LANCHOR15
 	ubfx	x2, x1, 21, 3
 	add	x29, sp, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	cmp	w0, w2
-	bhi	.L238
-	adrp	x1, .LANCHOR33
+	bhi	.L316
+	adrp	x1, .LANCHOR40
 	adrp	x0, .LC0
-	mov	w2, 738
-	add	x1, x1, :lo12:.LANCHOR33
+	mov	w2, 759
+	add	x1, x1, :lo12:.LANCHOR40
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L239:
-	b	.L239
-.L238:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	and	w5, w1, 2097151
-	ubfx	x8, x1, 24, 2
-	ldrb	w7, [x0, w2, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x6, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w7
+.L317:
+	b	.L317
+.L316:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	and	w6, w1, 2097151
+	ubfx	x10, x1, 24, 2
+	ldrb	w8, [x0, w2, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x7, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w8
 	bl	nandc_cs
-	adrp	x11, .LANCHOR34
-	cbnz	w8, .L240
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR12
-	cbz	w1, .L241
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
-	cbz	w1, .L242
-.L241:
-	adrp	x1, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
-	ldrh	w1, [x1, #:lo12:.LANCHOR13]
-	udiv	w2, w5, w1
+	adrp	x12, .LANCHOR41
+	cbnz	w10, .L318
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR19
+	cbz	w1, .L319
+	ldrb	w1, [x0, #:lo12:.LANCHOR19]
+	cbz	w1, .L320
+.L319:
+	adrp	x1, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+	udiv	w2, w6, w1
 	mul	w2, w2, w1
-	sub	w5, w5, w2
-	cbz	w0, .L243
-	add	w5, w2, w5, lsl 1
-.L242:
-	mov	w0, w7
-	bl	flash_enter_slc_mode
-	b	.L244
-.L243:
-	adrp	x3, .LANCHOR14
-	add	x3, x3, :lo12:.LANCHOR14
-	ldrh	w5, [x3, w5, uxtw 1]
-	add	w5, w5, w2
-.L244:
-	ubfiz	x2, x7, 8, 8
-	and	w0, w5, 255
-	add	x2, x6, x2
+	sub	w6, w6, w2
+	cbz	w0, .L321
+	add	w6, w2, w6, lsl 1
+.L320:
+	mov	w0, w8
+	bl	zftl_flash_enter_slc_mode
+	b	.L322
+.L321:
+	adrp	x3, .LANCHOR21
+	add	x3, x3, :lo12:.LANCHOR21
+	ldrh	w6, [x3, w6, uxtw 1]
+	add	w6, w6, w2
+.L322:
+	ubfiz	x2, x8, 8, 8
+	and	w0, w6, 255
+	add	x2, x7, x2
 	str	wzr, [x2, 2056]
 	str	wzr, [x2, 2052]
 	str	wzr, [x2, 2052]
 	str	w0, [x2, 2052]
-	lsr	w0, w5, 8
+	lsr	w0, w6, 8
 	str	w0, [x2, 2052]
-	lsr	w0, w5, 16
+	lsr	w0, w6, 16
 	str	w0, [x2, 2052]
-	ldr	x0, [x11, #:lo12:.LANCHOR34]
-	str	w10, [x2, 2056]
+	ldr	x0, [x12, #:lo12:.LANCHOR41]
+	str	w11, [x2, 2056]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L246
-	cbz	w8, .L246
-	add	w5, w5, w5, lsl 1
-	sub	w0, w8, #1
-	add	w0, w5, w0
-.L255:
+	bne	.L324
+	cbz	w10, .L324
+	add	w6, w6, w6, lsl 1
+	sub	w0, w10, #1
+	add	w0, w6, w0
+.L333:
 	bl	nandc_set_seed
 	ldp	x29, x30, [sp], 16
 	mov	w0, 0
 	b	nandc_de_cs
-.L240:
-	ldr	x0, [x11, #:lo12:.LANCHOR34]
+.L318:
+	ldr	x0, [x12, #:lo12:.LANCHOR41]
 	ldrb	w0, [x0, 12]
 	cmp	w0, 3
-	bne	.L245
-	sxtw	x0, w7
+	bne	.L323
+	sxtw	x0, w8
 	add	x0, x0, 8
-	add	x0, x6, x0, lsl 8
-	str	w8, [x0, 8]
-	b	.L244
-.L245:
-	mov	w0, w7
-	bl	flash_exit_slc_mode
-	b	.L244
-.L246:
-	mov	w0, w5
-	b	.L255
+	add	x0, x7, x0, lsl 8
+	str	w10, [x0, 8]
+	b	.L322
+.L323:
+	mov	w0, w8
+	bl	zftl_flash_exit_slc_mode
+	b	.L322
+.L324:
+	mov	w0, w6
+	b	.L333
 	.size	flash_start_page_read, .-flash_start_page_read
-	.section	.text.FlashDeInit,"ax",@progbits
+	.section	.text.zftl_flash_de_init,"ax",@progbits
 	.align	2
-	.global	FlashDeInit
-	.type	FlashDeInit, %function
-FlashDeInit:
+	.global	zftl_flash_de_init
+	.type	zftl_flash_de_init, %function
+zftl_flash_de_init:
 	stp	x29, x30, [sp, -16]!
 	add	x29, sp, 0
 	bl	nandc_wait_flash_ready
 	mov	w0, 0
 	bl	hynix_reconfig_rr_para
-	adrp	x15, .LANCHOR35
-	ldrb	w0, [x15, #:lo12:.LANCHOR35]
-	cbz	w0, .L257
-	adrp	x0, .LANCHOR25
-	ldrb	w0, [x0, #:lo12:.LANCHOR25]
-	tbz	x0, 0, .L257
+	adrp	x15, .LANCHOR42
+	ldrb	w0, [x15, #:lo12:.LANCHOR42]
+	cbz	w0, .L335
+	adrp	x0, .LANCHOR32
+	ldrb	w0, [x0, #:lo12:.LANCHOR32]
+	tbz	x0, 0, .L335
 	mov	w0, 1
 	bl	flash_set_interface_mode
 	mov	w0, 1
 	bl	nandc_set_if_mode
-	strb	wzr, [x15, #:lo12:.LANCHOR35]
-.L257:
-	adrp	x3, .LANCHOR29
-	ldrb	w0, [x3, #:lo12:.LANCHOR29]
-	cbz	w0, .L258
+	strb	wzr, [x15, #:lo12:.LANCHOR42]
+.L335:
+	adrp	x3, .LANCHOR36
+	ldrb	w0, [x3, #:lo12:.LANCHOR36]
+	cbz	w0, .L336
 	mov	w0, 0
-	strb	wzr, [x3, #:lo12:.LANCHOR29]
+	strb	wzr, [x3, #:lo12:.LANCHOR36]
 	bl	nandc_set_seed
 	mov	w0, 1
-	strb	w0, [x3, #:lo12:.LANCHOR29]
-.L258:
+	strb	w0, [x3, #:lo12:.LANCHOR36]
+.L336:
 	mov	w0, 0
 	ldp	x29, x30, [sp], 16
 	ret
-	.size	FlashDeInit, .-FlashDeInit
+	.size	zftl_flash_de_init, .-zftl_flash_de_init
 	.section	.text.nandc_randomizer_enable,"ax",@progbits
 	.align	2
 	.global	nandc_randomizer_enable
 	.type	nandc_randomizer_enable, %function
 nandc_randomizer_enable:
-	adrp	x1, .LANCHOR29
-	strb	w0, [x1, #:lo12:.LANCHOR29]
+	adrp	x1, .LANCHOR36
+	strb	w0, [x1, #:lo12:.LANCHOR36]
 	ret
 	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
 	.section	.text.nandc_get_chip_if,"ax",@progbits
@@ -1630,10 +2088,10 @@ nandc_randomizer_enable:
 	.global	nandc_get_chip_if
 	.type	nandc_get_chip_if, %function
 nandc_get_chip_if:
-	adrp	x1, .LANCHOR6
+	adrp	x1, .LANCHOR13
 	ubfiz	x0, x0, 8, 8
 	add	x0, x0, 2048
-	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	ldr	x1, [x1, #:lo12:.LANCHOR13]
 	add	x0, x1, x0
 	ret
 	.size	nandc_get_chip_if, .-nandc_get_chip_if
@@ -1642,10 +2100,10 @@ nandc_get_chip_if:
 	.global	buf_reinit
 	.type	buf_reinit, %function
 buf_reinit:
-	adrp	x0, .LANCHOR36
-	add	x1, x0, :lo12:.LANCHOR36
+	adrp	x0, .LANCHOR43
+	add	x1, x0, :lo12:.LANCHOR43
 	mov	w2, 0
-.L272:
+.L350:
 	and	w3, w2, 255
 	strb	wzr, [x1, 2]
 	add	w4, w3, 1
@@ -1655,14 +2113,14 @@ buf_reinit:
 	str	xzr, [x1, 16]
 	cmp	w2, 32
 	add	x1, x1, 64
-	bne	.L272
-	add	x0, x0, :lo12:.LANCHOR36
+	bne	.L350
+	add	x0, x0, :lo12:.LANCHOR43
 	mov	w1, -1
 	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR37
-	strb	wzr, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR38
-	strb	w2, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR44
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR45
+	strb	w2, [x0, #:lo12:.LANCHOR45]
 	ret
 	.size	buf_reinit, .-buf_reinit
 	.section	.text.buf_add_tail,"ax",@progbits
@@ -1676,47 +2134,47 @@ buf_add_tail:
 	strb	w2, [x1]
 	ldrb	w3, [x0]
 	cmp	w3, 255
-	bne	.L282
+	bne	.L360
 	ldrb	w1, [x1, 1]
 	cmp	w1, 255
-	bne	.L276
-	adrp	x1, .LANCHOR39
+	bne	.L354
+	adrp	x1, .LANCHOR46
 	adrp	x0, .LC0
 	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L277:
-	b	.L277
-.L276:
+.L355:
+	b	.L355
+.L354:
 	strb	w1, [x0]
-.L274:
+.L352:
 	ldp	x29, x30, [sp], 16
 	ret
-.L279:
+.L357:
 	sbfiz	x0, x0, 6, 32
 	strb	w1, [x2, x0]
-	b	.L274
-.L282:
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
-.L283:
+	b	.L352
+.L360:
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+.L361:
 	mov	w0, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x2, x3]
 	cmp	w3, 255
-	bne	.L283
+	bne	.L361
 	ldrb	w1, [x1, 1]
 	cmp	w1, 255
-	bne	.L279
-	adrp	x1, .LANCHOR39
+	bne	.L357
+	adrp	x1, .LANCHOR46
 	adrp	x0, .LC0
 	mov	w2, 81
-	add	x1, x1, :lo12:.LANCHOR39
+	add	x1, x1, :lo12:.LANCHOR46
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L280:
-	b	.L280
+.L358:
+	b	.L358
 	.size	buf_add_tail, .-buf_add_tail
 	.section	.text.buf_free,"ax",@progbits
 	.align	2
@@ -1724,30 +2182,30 @@ buf_add_tail:
 	.type	buf_free, %function
 buf_free:
 	ldrb	w1, [x0, 2]
-	adrp	x2, .LANCHOR37
+	adrp	x2, .LANCHOR44
 	and	w1, w1, 8
 	strb	w1, [x0, 2]
-	cbz	w1, .L286
+	cbz	w1, .L364
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	add	x0, x2, :lo12:.LANCHOR37
+	add	x0, x2, :lo12:.LANCHOR44
 	add	x29, sp, 0
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR38
+	adrp	x1, .LANCHOR45
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	ldrb	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR38]
+	strb	w0, [x1, #:lo12:.LANCHOR45]
 	ret
-.L286:
-	ldrb	w1, [x2, #:lo12:.LANCHOR37]
+.L364:
+	ldrb	w1, [x2, #:lo12:.LANCHOR44]
 	strb	w1, [x0]
-	adrp	x1, .LANCHOR38
+	adrp	x1, .LANCHOR45
 	ldrb	w0, [x0, 1]
-	strb	w0, [x2, #:lo12:.LANCHOR37]
-	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	strb	w0, [x2, #:lo12:.LANCHOR44]
+	ldrb	w0, [x1, #:lo12:.LANCHOR45]
 	add	w0, w0, 1
-	strb	w0, [x1, #:lo12:.LANCHOR38]
+	strb	w0, [x1, #:lo12:.LANCHOR45]
 	ret
 	.size	buf_free, .-buf_free
 	.section	.text.buf_alloc,"ax",@progbits
@@ -1755,52 +2213,52 @@ buf_free:
 	.global	buf_alloc
 	.type	buf_alloc, %function
 buf_alloc:
-	adrp	x1, .LANCHOR38
-	ldrb	w3, [x1, #:lo12:.LANCHOR38]
-	cbnz	w3, .L293
+	adrp	x1, .LANCHOR45
+	ldrb	w3, [x1, #:lo12:.LANCHOR45]
+	cbnz	w3, .L371
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR40
+	adrp	x1, .LANCHOR47
 	adrp	x0, .LC0
 	mov	w2, 121
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR40
+	add	x1, x1, :lo12:.LANCHOR47
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L294:
-	b	.L294
-.L293:
-	adrp	x6, .LANCHOR37
+.L372:
+	b	.L372
+.L371:
+	adrp	x6, .LANCHOR44
 	and	w7, w0, 255
 	mov	x5, x1
-	adrp	x1, .LANCHOR36
-	ldrb	w2, [x6, #:lo12:.LANCHOR37]
-	add	x4, x1, :lo12:.LANCHOR36
+	adrp	x1, .LANCHOR43
+	ldrb	w2, [x6, #:lo12:.LANCHOR44]
+	add	x4, x1, :lo12:.LANCHOR43
 	ubfiz	x0, x2, 6, 8
 	add	x0, x4, x0
-	cbnz	w7, .L295
+	cbnz	w7, .L373
 	cmp	w3, 1
-	beq	.L297
-.L295:
-	add	x1, x1, :lo12:.LANCHOR36
+	beq	.L375
+.L373:
+	add	x1, x1, :lo12:.LANCHOR43
 	sbfiz	x2, x2, 6, 32
 	add	x4, x1, x2
 	sub	w3, w3, #1
-	strb	w3, [x5, #:lo12:.LANCHOR38]
+	strb	w3, [x5, #:lo12:.LANCHOR45]
 	mov	w3, 1
 	ldrb	w7, [x1, x2]
 	strb	w3, [x4, 2]
 	mov	w3, -1
-	strb	w7, [x6, #:lo12:.LANCHOR37]
+	strb	w7, [x6, #:lo12:.LANCHOR44]
 	strb	w3, [x1, x2]
 	mov	w1, -1
 	strh	wzr, [x4, 50]
 	str	xzr, [x4, 16]
 	str	w1, [x4, 36]
-.L292:
+.L370:
 	ret
-.L297:
+.L375:
 	mov	x0, 0
-	b	.L292
+	b	.L370
 	.size	buf_alloc, .-buf_alloc
 	.section	.text.buf_remove_buf,"ax",@progbits
 	.align	2
@@ -1810,30 +2268,30 @@ buf_remove_buf:
 	ldrb	w4, [x1, 1]
 	ldrb	w2, [x0]
 	cmp	w4, w2
-	bne	.L304
+	bne	.L382
 	ldrb	w1, [x1]
 	strb	w1, [x0]
-.L308:
+.L386:
 	mov	w0, 1
 	ret
-.L305:
+.L383:
 	mov	w3, w2
 	sbfiz	x2, x2, 6, 32
 	ldrb	w2, [x0, x2]
 	cmp	w4, w2
-	bne	.L306
+	bne	.L384
 	sbfiz	x3, x3, 6, 32
 	ldrb	w2, [x1]
 	strb	w2, [x0, x3]
 	mov	w0, -1
 	strb	w0, [x1]
-	b	.L308
-.L304:
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-.L306:
+	b	.L386
+.L382:
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+.L384:
 	cmp	w2, 255
-	bne	.L305
+	bne	.L383
 	mov	w0, 0
 	ret
 	.size	buf_remove_buf, .-buf_remove_buf
@@ -1843,33 +2301,33 @@ buf_remove_buf:
 	.type	buf_remove_free, %function
 buf_remove_free:
 	stp	x29, x30, [sp, -16]!
-	adrp	x6, .LANCHOR38
+	adrp	x6, .LANCHOR45
 	mov	x5, x0
 	add	x29, sp, 0
-	ldrb	w0, [x6, #:lo12:.LANCHOR38]
-	cbnz	w0, .L310
-	adrp	x1, .LANCHOR41
+	ldrb	w0, [x6, #:lo12:.LANCHOR45]
+	cbnz	w0, .L388
+	adrp	x1, .LANCHOR48
 	adrp	x0, .LC0
 	mov	w2, 170
-	add	x1, x1, :lo12:.LANCHOR41
+	add	x1, x1, :lo12:.LANCHOR48
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L311:
-	b	.L311
-.L310:
+.L389:
+	b	.L389
+.L388:
 	mov	x1, x5
-	adrp	x0, .LANCHOR37
-	add	x0, x0, :lo12:.LANCHOR37
+	adrp	x0, .LANCHOR44
+	add	x0, x0, :lo12:.LANCHOR44
 	bl	buf_remove_buf
 	cmp	w0, 1
-	bne	.L309
-	ldrb	w0, [x6, #:lo12:.LANCHOR38]
+	bne	.L387
+	ldrb	w0, [x6, #:lo12:.LANCHOR45]
 	sub	w0, w0, #1
-	strb	w0, [x6, #:lo12:.LANCHOR38]
+	strb	w0, [x6, #:lo12:.LANCHOR45]
 	ldrb	w0, [x5, 2]
 	orr	w0, w0, 1
 	strb	w0, [x5, 2]
-.L309:
+.L387:
 	ldp	x29, x30, [sp], 16
 	ret
 	.size	buf_remove_free, .-buf_remove_free
@@ -1878,8 +2336,8 @@ buf_remove_free:
 	.global	flash_check_bad_block
 	.type	flash_check_bad_block, %function
 flash_check_bad_block:
-	adrp	x3, .LANCHOR19
-	add	x3, x3, :lo12:.LANCHOR19
+	adrp	x3, .LANCHOR26
+	add	x3, x3, :lo12:.LANCHOR26
 	and	w5, w0, 255
 	lsr	w4, w1, 5
 	and	w1, w1, 31
@@ -1892,8 +2350,8 @@ flash_check_bad_block:
 	asr	w2, w2, 5
 	lsl	w2, w2, 2
 	umaddl	x0, w2, w5, x0
-	adrp	x2, .LANCHOR5
-	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR12
+	ldr	x2, [x2, #:lo12:.LANCHOR12]
 	add	x0, x0, x4, uxtw 2
 	ldr	w0, [x2, x0]
 	lsr	w0, w0, w1
@@ -1910,14 +2368,14 @@ flash_mask_bad_block:
 	add	x29, sp, 0
 	str	x21, [sp, 32]
 	and	w21, w0, 255
-	adrp	x0, .LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
 	stp	x19, x20, [sp, 16]
 	mov	w20, w1
 	ldrh	w19, [x0, 14]
 	ldrb	w1, [x0, 13]
-	adrp	x0, .LC6
-	add	x0, x0, :lo12:.LC6
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
 	mul	w19, w19, w1
 	mov	w1, w21
 	bl	printf
@@ -1931,8 +2389,8 @@ flash_mask_bad_block:
 	umaddl	x1, w1, w21, x19
 	ldr	x21, [sp, 32]
 	add	x1, x1, x0, uxtw 2
-	adrp	x0, .LANCHOR5
-	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR12
+	ldr	x2, [x0, #:lo12:.LANCHOR12]
 	mov	w0, 1
 	lsl	w0, w0, w20
 	ldr	w20, [x2, x1]
@@ -1953,15 +2411,15 @@ ftl_gc_write_buf:
 	orr	w1, w1, 2
 	strb	w1, [x0, 2]
 	mov	x1, x0
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR43
+	adrp	x1, .LANCHOR50
 	ldp	x29, x30, [sp], 16
-	ldrb	w0, [x1, #:lo12:.LANCHOR43]
+	ldrb	w0, [x1, #:lo12:.LANCHOR50]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x1, #:lo12:.LANCHOR43]
+	strb	w0, [x1, #:lo12:.LANCHOR50]
 	ret
 	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
 	.section	.text.ftl_write_buf,"ax",@progbits
@@ -1972,125 +2430,125 @@ ftl_write_buf:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	cbnz	x0, .L320
-	adrp	x1, .LANCHOR44
+	cbnz	x0, .L398
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
-	mov	w2, 539
-	add	x1, x1, :lo12:.LANCHOR44
+	mov	w2, 591
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L321:
-	b	.L321
-.L320:
-	adrp	x2, .LANCHOR45
+.L399:
+	b	.L399
+.L398:
+	adrp	x2, .LANCHOR52
 	ldrb	w1, [x0, 56]
 	mov	x19, x0
-	ldrb	w2, [x2, #:lo12:.LANCHOR45]
+	ldrb	w2, [x2, #:lo12:.LANCHOR52]
 	cmp	w2, w1
-	bcs	.L322
-	adrp	x1, .LANCHOR44
+	bcs	.L400
+	adrp	x1, .LANCHOR51
 	adrp	x0, .LC0
-	mov	w2, 544
-	add	x1, x1, :lo12:.LANCHOR44
+	mov	w2, 596
+	add	x1, x1, :lo12:.LANCHOR51
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L323:
-	b	.L323
-.L322:
-	adrp	x20, .LANCHOR43
-	cbnz	w1, .L324
+.L401:
+	b	.L401
+.L400:
+	adrp	x20, .LANCHOR50
+	cbnz	w1, .L402
 	bl	buf_free
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
-.L319:
+	ldrb	w0, [x20, #:lo12:.LANCHOR50]
+.L397:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L324:
+.L402:
 	mov	x1, x0
-	adrp	x0, .LANCHOR42
-	add	x0, x0, :lo12:.LANCHOR42
+	adrp	x0, .LANCHOR49
+	add	x0, x0, :lo12:.LANCHOR49
 	bl	buf_add_tail
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR53
 	ldrb	w3, [x19, 56]
-	ldrb	w0, [x20, #:lo12:.LANCHOR43]
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldrb	w0, [x20, #:lo12:.LANCHOR50]
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	add	w0, w0, 1
 	and	w0, w0, 255
-	strb	w0, [x20, #:lo12:.LANCHOR43]
+	strb	w0, [x20, #:lo12:.LANCHOR50]
 	ldr	w2, [x1, 16]
 	add	w2, w2, w3
 	str	w2, [x1, 16]
 	ldr	w2, [x1, 32]
 	add	w2, w2, 1
 	str	w2, [x1, 32]
-	b	.L319
+	b	.L397
 	.size	ftl_write_buf, .-ftl_write_buf
-	.section	.text.ftl_cache_flush,"ax",@progbits
+	.section	.text.zftl_cache_flush,"ax",@progbits
 	.align	2
-	.global	ftl_cache_flush
-	.type	ftl_cache_flush, %function
-ftl_cache_flush:
+	.global	zftl_cache_flush
+	.type	zftl_cache_flush, %function
+zftl_cache_flush:
 	ret
-	.size	ftl_cache_flush, .-ftl_cache_flush
+	.size	zftl_cache_flush, .-zftl_cache_flush
 	.section	.text.ftl_read_buf,"ax",@progbits
 	.align	2
 	.global	ftl_read_buf
 	.type	ftl_read_buf, %function
 ftl_read_buf:
 	stp	x29, x30, [sp, -32]!
-	adrp	x2, .LANCHOR47
+	adrp	x2, .LANCHOR54
 	add	x29, sp, 0
 	str	x19, [sp, 16]
-	ldr	w2, [x2, #:lo12:.LANCHOR47]
+	ldr	w2, [x2, #:lo12:.LANCHOR54]
 	cmp	w2, w0
-	bhi	.L329
-	adrp	x1, .LANCHOR48
+	bhi	.L407
+	adrp	x1, .LANCHOR55
 	adrp	x0, .LC0
-	mov	w2, 771
-	add	x1, x1, :lo12:.LANCHOR48
+	mov	w2, 834
+	add	x1, x1, :lo12:.LANCHOR55
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L330:
-	b	.L330
-.L329:
-	adrp	x19, .LANCHOR36
-	add	x3, x19, :lo12:.LANCHOR36
+.L408:
+	b	.L408
+.L407:
+	adrp	x19, .LANCHOR43
+	add	x3, x19, :lo12:.LANCHOR43
 	add	x3, x3, 2
 	mov	w2, 0
-.L333:
+.L411:
 	ldr	w4, [x3, 34]
 	cmp	w0, w4
-	bne	.L331
+	bne	.L409
 	ldrb	w4, [x3]
-	tbz	x4, 3, .L331
-	add	x19, x19, :lo12:.LANCHOR36
+	tbz	x4, 3, .L409
+	add	x19, x19, :lo12:.LANCHOR43
 	ubfiz	x2, x2, 6, 32
 	add	x19, x19, x2
 	orr	w0, w4, 4
 	strb	w0, [x19, 2]
-	tbnz	x4, 0, .L328
+	tbnz	x4, 0, .L406
 	mov	x0, x19
 	bl	buf_remove_free
-.L328:
+.L406:
 	mov	x0, x19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L331:
+.L409:
 	add	w2, w2, 1
 	add	x3, x3, 64
 	cmp	w2, 32
-	bne	.L333
-	adrp	x2, .LANCHOR49
-	ldr	w3, [x2, #:lo12:.LANCHOR49]
+	bne	.L411
+	adrp	x2, .LANCHOR56
+	ldr	w3, [x2, #:lo12:.LANCHOR56]
 	cmn	w3, #1
-	bne	.L334
-	str	w0, [x2, #:lo12:.LANCHOR49]
-	adrp	x0, .LANCHOR50
-	str	x1, [x0, #:lo12:.LANCHOR50]
-.L334:
+	bne	.L412
+	str	w0, [x2, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR57
+	str	x1, [x0, #:lo12:.LANCHOR57]
+.L412:
 	mov	x19, 0
-	b	.L328
+	b	.L406
 	.size	ftl_read_buf, .-ftl_read_buf
 	.section	.text.ftl_read_buf_free,"ax",@progbits
 	.align	2
@@ -2100,36 +2558,36 @@ ftl_read_buf_free:
 	mov	x5, x0
 	stp	x29, x30, [sp, -16]!
 	mov	x1, x0
-	adrp	x0, .LANCHOR51
+	adrp	x0, .LANCHOR58
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR58
 	bl	buf_remove_buf
 	ldrb	w0, [x5, 2]
-	tbz	x0, 1, .L341
+	tbz	x0, 1, .L419
 	and	w0, w0, -5
 	strb	w0, [x5, 2]
 	ldp	x29, x30, [sp], 16
 	ret
-.L341:
+.L419:
 	ldp	x29, x30, [sp], 16
 	mov	x0, x5
 	b	buf_free
 	.size	ftl_read_buf_free, .-ftl_read_buf_free
-	.section	.text.ftl_get_density,"ax",@progbits
+	.section	.text.zftl_get_density,"ax",@progbits
 	.align	2
-	.global	ftl_get_density
-	.type	ftl_get_density, %function
-ftl_get_density:
-	cbnz	w0, .L346
-	adrp	x0, .LANCHOR52
-	ldr	w0, [x0, #:lo12:.LANCHOR52]
+	.global	zftl_get_density
+	.type	zftl_get_density, %function
+zftl_get_density:
+	cbnz	w0, .L424
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
 	ret
-.L346:
+.L424:
 	cmp	w0, 4
 	cset	w0, cc
 	lsl	w0, w0, 13
 	ret
-	.size	ftl_get_density, .-ftl_get_density
+	.size	zftl_get_density, .-zftl_get_density
 	.section	.text.gc_hook,"ax",@progbits
 	.align	2
 	.global	gc_hook
@@ -2142,8 +2600,8 @@ gc_hook:
 	.global	FtlGetCurEraseBlock
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
-	adrp	x0, .LANCHOR53
-	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	adrp	x0, .LANCHOR60
+	ldrh	w0, [x0, #:lo12:.LANCHOR60]
 	ret
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",@progbits
@@ -2151,8 +2609,8 @@ FtlGetCurEraseBlock:
 	.global	FtlGetAllBlockNum
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
-	adrp	x0, .LANCHOR54
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	ret
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlLowFormat,"ax",@progbits
@@ -2168,141 +2626,162 @@ FtlLowFormat:
 	.global	gc_add_sblk
 	.type	gc_add_sblk, %function
 gc_add_sblk:
-	stp	x29, x30, [sp, -64]!
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w19, w0, 65535
-	adrp	x0, .LANCHOR54
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR2
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
-	cmp	w0, w19
-	bhi	.L354
-	adrp	x1, .LANCHOR55
-	adrp	x0, .LC0
-	mov	w2, 240
-	add	x1, x1, :lo12:.LANCHOR55
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cmp	w0, w20
+	bhi	.L432
+	adrp	x1, .LANCHOR61
+	adrp	x0, .LC0
+	mov	w2, 252
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L355:
-	b	.L355
-.L354:
-	adrp	x0, .LANCHOR56
-	uxtw	x20, w19
-	and	w21, w1, 65535
+.L433:
+	b	.L433
+.L432:
+	adrp	x24, .LANCHOR4
+	uxtw	x19, w20
+	lsl	x26, x19, 1
+	adrp	x25, .LANCHOR29
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	and	w23, w1, 65535
 	and	w22, w2, 65535
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	adrp	x24, .LANCHOR59
-	ldrh	w23, [x0, x20, lsl 1]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L356
-	ldr	x0, [x24, #:lo12:.LANCHOR59]
-	mov	w4, w23
-	mov	w2, w21
-	mov	w1, w19
-	add	x0, x0, x20, lsl 2
+	adrp	x27, .LANCHOR3
+	ldrh	w21, [x0, x26]
+	ldr	w0, [x25, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L434
+	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	mov	w4, w21
+	mov	w2, w23
+	mov	w1, w20
+	add	x0, x0, x19, lsl 2
 	ldrb	w3, [x0, 2]
-	adrp	x0, .LANCHOR57
-	ldrh	w6, [x0, #:lo12:.LANCHOR57]
-	adrp	x0, .LANCHOR58+56
+	adrp	x0, .LANCHOR62
+	ldrh	w6, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR63+56
 	ubfx	x3, x3, 5, 3
-	ldrh	w5, [x0, #:lo12:.LANCHOR58+56]
-	adrp	x0, .LC7
-	add	x0, x0, :lo12:.LC7
+	ldrh	w5, [x0, #:lo12:.LANCHOR63+56]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
 	bl	printf
-.L356:
-	ldr	x0, [x24, #:lo12:.LANCHOR59]
-	add	x20, x0, x20, lsl 2
-	ldrb	w0, [x20, 2]
-	tst	w0, 224
-	bne	.L357
-	cbz	w23, .L371
-	adrp	x1, .LANCHOR55
+.L434:
+	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	add	x19, x0, x19, lsl 2
+	ldrb	w3, [x19, 2]
+	tst	w3, 224
+	bne	.L435
+	cbz	w21, .L450
+	adrp	x1, .LANCHOR61
 	adrp	x0, .LC0
-	mov	w2, 245
-	add	x1, x1, :lo12:.LANCHOR55
+	mov	w2, 257
+	add	x1, x1, :lo12:.LANCHOR61
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L359:
-	b	.L359
-.L357:
-	adrp	x1, .LANCHOR58
-	add	x0, x1, :lo12:.LANCHOR58
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
-	cmp	w1, w19
-	beq	.L371
-	adrp	x1, .LANCHOR60
-	ldr	x2, [x1, #:lo12:.LANCHOR60]
-	ldrh	w1, [x2, 48]
-	cmp	w1, w19
-	beq	.L371
-	ldrh	w1, [x2, 16]
-	cmp	w1, w19
-	beq	.L371
-	ldrh	w1, [x2, 80]
-	cmp	w1, w19
-	beq	.L371
-	ldrh	w3, [x0, 56]
+.L437:
+	b	.L437
+.L435:
+	adrp	x1, .LANCHOR63
+	add	x0, x1, :lo12:.LANCHOR63
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	cmp	w1, w20
+	beq	.L450
+	adrp	x21, .LANCHOR5
+	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	ldrh	w2, [x1, 48]
+	cmp	w2, w20
+	beq	.L450
+	ldrh	w2, [x1, 16]
+	cmp	w2, w20
+	beq	.L450
+	ldrh	w2, [x1, 80]
+	cmp	w2, w20
+	beq	.L450
+	ldrh	w5, [x0, 56]
 	add	x0, x0, 58
-	mov	w1, 0
-.L360:
-	cmp	w1, w3
-	bcc	.L361
-	ubfiz	x1, x22, 7, 16
-	add	x0, x2, 392
-	add	x1, x1, 136
-	cmp	w21, 0
-	add	x1, x2, x1
-	mov	w3, 65535
-	csel	x0, x1, x0, eq
-	add	x1, x0, 128
-.L365:
-	ldrh	w4, [x0]
-	cmp	w4, w3
-	bne	.L363
-	strh	w19, [x0]
-	cbz	w21, .L364
-	ldrh	w0, [x2, 124]
+	mov	w2, 0
+.L438:
+	cmp	w2, w5
+	bcc	.L439
+	ubfiz	x19, x22, 7, 16
+	add	x0, x1, 392
+	add	x19, x19, 136
+	cmp	w23, 0
+	add	x1, x1, x19
+	csel	x19, x1, x0, eq
+	ldr	w0, [x25, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L441
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	adrp	x1, .LANCHOR62
+	ubfx	x3, x3, 5, 3
+	mov	w2, w23
+	ldrh	w6, [x1, #:lo12:.LANCHOR62]
+	mov	w1, w20
+	ldrh	w4, [x0, x26]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+.L441:
+	mov	x0, x19
+	add	x1, x19, 128
+	mov	w2, 65535
+.L444:
+	ldrh	w3, [x0]
+	cmp	w3, w2
+	bne	.L442
+	strh	w20, [x0]
+	cbz	w23, .L443
+	ldr	x1, [x21, #:lo12:.LANCHOR5]
+	ldrh	w0, [x1, 124]
 	add	w0, w0, 1
-	strh	w0, [x2, 124]
-.L379:
+	strh	w0, [x1, 124]
+.L461:
 	mov	w0, 1
-.L353:
+.L431:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
 	ret
-.L361:
+.L439:
 	ldrh	w4, [x0], 2
-	cmp	w4, w19
-	beq	.L371
-	add	w1, w1, 1
-	b	.L360
-.L364:
-	add	x2, x2, x22, uxth 1
-	ldrh	w0, [x2, 120]
+	cmp	w4, w20
+	beq	.L450
+	add	w2, w2, 1
+	b	.L438
+.L443:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x22, x0, x22, uxth 1
+	ldrh	w0, [x22, 120]
 	add	w0, w0, 1
-	strh	w0, [x2, 120]
-	b	.L379
-.L363:
+	strh	w0, [x22, 120]
+	b	.L461
+.L442:
 	add	x0, x0, 2
-	cmp	x1, x0
-	bne	.L365
-	b	.L379
-.L371:
+	cmp	x0, x1
+	bne	.L444
+	b	.L461
+.L450:
 	mov	w0, 0
-	b	.L353
+	b	.L431
 	.size	gc_add_sblk, .-gc_add_sblk
 	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
 	.align	2
 	.global	gc_get_src_ppa_from_index
 	.type	gc_get_src_ppa_from_index, %function
 gc_get_src_ppa_from_index:
-	adrp	x1, .LANCHOR61
+	adrp	x1, .LANCHOR64
 	ubfiz	x0, x0, 2, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR61]
+	ldr	x1, [x1, #:lo12:.LANCHOR64]
 	ldr	w0, [x1, x0]
 	ret
 	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
@@ -2314,18 +2793,18 @@ gc_write_completed:
 	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR36
+	adrp	x23, .LANCHOR43
 	stp	x21, x22, [sp, 32]
-	add	x24, x23, :lo12:.LANCHOR36
-	adrp	x22, .LANCHOR62
-	add	x22, x22, :lo12:.LANCHOR62
+	add	x24, x23, :lo12:.LANCHOR43
+	adrp	x22, .LANCHOR65
+	add	x22, x22, :lo12:.LANCHOR65
 	stp	x19, x20, [sp, 16]
 	stp	x25, x26, [sp, 64]
 	stp	x27, x28, [sp, 80]
-.L382:
+.L464:
 	ldrb	w19, [x22]
 	cmp	w19, 255
-	bne	.L395
+	bne	.L477
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
@@ -2333,107 +2812,107 @@ gc_write_completed:
 	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L395:
+.L477:
 	lsl	x1, x19, 6
-	add	x0, x23, :lo12:.LANCHOR36
+	add	x0, x23, :lo12:.LANCHOR43
 	add	x2, x0, x1
 	ldrb	w0, [x0, x1]
 	ldr	w1, [x2, 52]
 	strb	w0, [x22]
 	ldrh	w26, [x2, 48]
-	cbz	w1, .L383
+	cbz	w1, .L465
 	ldr	w2, [x2, 40]
-	adrp	x0, .LANCHOR58
-	add	x0, x0, :lo12:.LANCHOR58
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
 	mov	w3, 1
 	str	w2, [x0, 320]
 	strh	w3, [x0, 318]
-	adrp	x0, .LC8
-	add	x0, x0, :lo12:.LC8
+	adrp	x0, .LC9
+	add	x0, x0, :lo12:.LC9
 	bl	printf
-	adrp	x1, .LANCHOR63
+	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
-	mov	w2, 502
-	add	x1, x1, :lo12:.LANCHOR63
+	mov	w2, 519
+	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L384:
-	b	.L384
-.L383:
-	adrp	x0, .LANCHOR64
+.L466:
+	b	.L466
+.L465:
+	adrp	x0, .LANCHOR67
 	mov	x28, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	ldrb	w1, [x0, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L396
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	bne	.L478
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrb	w20, [x0, 89]
 	add	w20, w20, w20, lsl 1
 	and	w20, w20, 1023
-.L385:
-	adrp	x0, .LANCHOR22
-	adrp	x27, .LANCHOR65
+.L467:
+	adrp	x0, .LANCHOR29
+	adrp	x27, .LANCHOR68
 	and	x21, x26, 65535
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L386
-	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L468
+	ldr	x1, [x27, #:lo12:.LANCHOR68]
 	add	x0, x24, x19, lsl 6
 	mov	w3, w26
 	ldrb	w2, [x0, 1]
-	adrp	x0, .LC9
+	adrp	x0, .LC10
 	ldrb	w4, [x1, x21]
-	add	x0, x0, :lo12:.LC9
+	add	x0, x0, :lo12:.LC10
 	mov	w1, w26
 	bl	printf
-.L386:
-	ldr	x0, [x27, #:lo12:.LANCHOR65]
+.L468:
+	ldr	x0, [x27, #:lo12:.LANCHOR68]
 	add	x19, x24, x19, lsl 6
 	mov	x25, x21
 	add	x2, x0, x21
 	ldrb	w1, [x0, x21]
 	ldrb	w0, [x19, 1]
 	cmp	w1, w0
-	beq	.L387
-	adrp	x1, .LANCHOR63
+	beq	.L469
+	adrp	x1, .LANCHOR66
 	adrp	x0, .LC0
-	mov	w2, 509
-	add	x1, x1, :lo12:.LANCHOR63
+	mov	w2, 526
+	add	x1, x1, :lo12:.LANCHOR66
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L388:
-	b	.L388
-.L396:
+.L470:
+	b	.L470
+.L478:
 	mov	w20, 1
-	b	.L385
-.L387:
+	b	.L467
+.L469:
 	ldrb	w0, [x19, 61]
 	cmp	w0, 3
-	beq	.L389
-	ldrb	w0, [x28, #:lo12:.LANCHOR64]
+	beq	.L471
+	ldrb	w0, [x28, #:lo12:.LANCHOR67]
 	cmp	w0, 3
-	bne	.L389
-	adrp	x0, .LANCHOR66
-	ldrb	w0, [x0, #:lo12:.LANCHOR66]
-	cbnz	w0, .L389
+	bne	.L471
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	cbnz	w0, .L471
 	mov	x0, 0
-.L390:
+.L472:
 	cmp	w20, w0, uxth
-	bls	.L382
+	bls	.L464
 	ldrb	w1, [x2, x0]
 	add	x0, x0, 1
 	add	x1, x24, x1, lsl 6
 	strb	wzr, [x1, 61]
-	b	.L390
-.L389:
-	adrp	x19, .LANCHOR58
-	add	x19, x19, :lo12:.LANCHOR58
+	b	.L472
+.L471:
+	adrp	x19, .LANCHOR63
+	add	x19, x19, :lo12:.LANCHOR63
 	add	x20, x21, x20, uxth
 	mov	w21, -1
 	strh	w26, [x19, 316]
-.L391:
+.L473:
 	cmp	x25, x20
-	beq	.L382
-	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	beq	.L464
+	ldr	x1, [x27, #:lo12:.LANCHOR68]
 	ldrb	w0, [x1, x25]
 	strb	w21, [x1, x25]
 	add	x25, x25, 1
@@ -2446,56 +2925,56 @@ gc_write_completed:
 	ldrb	w0, [x19, 7]
 	sub	w0, w0, #1
 	strb	w0, [x19, 7]
-	b	.L391
+	b	.L473
 	.size	gc_write_completed, .-gc_write_completed
 	.section	.text.gc_get_src_blk,"ax",@progbits
 	.align	2
 	.global	gc_get_src_blk
 	.type	gc_get_src_blk, %function
 gc_get_src_blk:
-	adrp	x0, .LANCHOR60
-	ldr	x2, [x0, #:lo12:.LANCHOR60]
-	adrp	x0, .LANCHOR67
-	ldrb	w3, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR5
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR70
+	ldrb	w3, [x0, #:lo12:.LANCHOR70]
 	ldrh	w0, [x2, 124]
-	cbz	w0, .L405
+	cbz	w0, .L487
 	add	x1, x2, 392
 	mov	w4, 1
-.L406:
+.L488:
 	add	x5, x1, 128
 	mov	w6, 65535
-.L410:
+.L492:
 	ldrh	w0, [x1]
 	cmp	w0, w6
-	beq	.L408
+	beq	.L490
 	mov	w5, -1
 	strh	w5, [x1]
-	cbz	w4, .L409
+	cbz	w4, .L491
 	ldrh	w1, [x2, 124]
 	sub	w1, w1, #1
 	strh	w1, [x2, 124]
 	ret
-.L405:
+.L487:
 	add	x0, x2, x3, sxtw 1
 	ldrh	w0, [x0, 120]
-	cbz	w0, .L411
+	cbz	w0, .L493
 	ubfiz	x1, x3, 7, 8
 	mov	w4, 0
 	add	x1, x1, 136
 	add	x1, x2, x1
-	b	.L406
-.L409:
+	b	.L488
+.L491:
 	add	x2, x2, x3, uxtb 1
 	ldrh	w1, [x2, 120]
 	sub	w1, w1, #1
 	strh	w1, [x2, 120]
 	ret
-.L408:
+.L490:
 	add	x1, x1, 2
 	cmp	x1, x5
-	bne	.L410
+	bne	.L492
 	ret
-.L411:
+.L493:
 	mov	w0, 65535
 	ret
 	.size	gc_get_src_blk, .-gc_get_src_blk
@@ -2507,362 +2986,971 @@ gc_free_temp_buf:
 	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR58
-	add	x0, x20, :lo12:.LANCHOR58
+	adrp	x20, .LANCHOR63
+	add	x0, x20, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	ldrb	w1, [x0, 7]
-	cbz	w1, .L420
-	adrp	x1, .LANCHOR38
-	ldrb	w1, [x1, #:lo12:.LANCHOR38]
+	cbz	w1, .L502
+	adrp	x1, .LANCHOR45
+	ldrb	w1, [x1, #:lo12:.LANCHOR45]
 	cmp	w1, 1
-	bhi	.L420
+	bhi	.L502
 	ldrh	w19, [x0, 316]
-	adrp	x2, .LANCHOR69
-	adrp	x0, .LANCHOR68
-	adrp	x21, .LANCHOR65
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR72
+	adrp	x0, .LANCHOR71
+	adrp	x21, .LANCHOR68
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	add	w1, w19, 24
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	ldr	x4, [x21, #:lo12:.LANCHOR65]
+	ldrh	w0, [x0, #:lo12:.LANCHOR71]
+	ldr	x4, [x21, #:lo12:.LANCHOR68]
 	mul	w0, w0, w2
 	cmp	w0, w1
 	csel	w1, w0, w1, ls
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-.L415:
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+.L497:
 	cmp	w19, w1
-	bcc	.L418
-.L420:
+	bcc	.L500
+.L502:
 	mov	w0, 0
-	b	.L413
-.L418:
+	b	.L495
+.L500:
 	uxtw	x22, w19
 	ldrb	w2, [x4, x22]
 	cmp	w2, 255
-	beq	.L416
+	beq	.L498
 	sbfiz	x3, x2, 6, 32
 	add	x3, x0, x3
 	ldrb	w3, [x3, 61]
-	cbnz	w3, .L416
+	cbnz	w3, .L498
 	ubfiz	x2, x2, 6, 8
 	add	x0, x0, x2
 	bl	buf_free
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L417
-	ldr	x0, [x21, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L499
+	ldr	x0, [x21, #:lo12:.LANCHOR68]
 	mov	w1, w19
 	ldrb	w2, [x0, x22]
-	adrp	x0, .LC10
-	add	x0, x0, :lo12:.LC10
+	adrp	x0, .LC11
+	add	x0, x0, :lo12:.LC11
 	bl	printf
-.L417:
-	ldr	x0, [x21, #:lo12:.LANCHOR65]
-	add	x20, x20, :lo12:.LANCHOR58
+.L499:
+	ldr	x0, [x21, #:lo12:.LANCHOR68]
+	add	x20, x20, :lo12:.LANCHOR63
 	mov	w1, -1
 	strb	w1, [x0, x22]
 	ldrb	w0, [x20, 7]
 	sub	w0, w0, #1
 	strb	w0, [x20, 7]
 	mov	w0, 1
-.L413:
+.L495:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L416:
+.L498:
 	add	w19, w19, 1
-	b	.L415
+	b	.L497
 	.size	gc_free_temp_buf, .-gc_free_temp_buf
-	.section	.text.gc_static_wearleveling,"ax",@progbits
+	.section	.text.print_gc_debug_info,"ax",@progbits
 	.align	2
-	.global	gc_static_wearleveling
-	.type	gc_static_wearleveling, %function
-gc_static_wearleveling:
-	stp	x29, x30, [sp, -80]!
+	.global	print_gc_debug_info
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
+	adrp	x2, .LANCHOR73
+	adrp	x1, .LANCHOR63
+	add	x0, x1, :lo12:.LANCHOR63
+	ldrh	w6, [x2, #:lo12:.LANCHOR73]
+	adrp	x2, .LANCHOR45
+	ldrh	w1, [x1, #:lo12:.LANCHOR63]
+	ldrb	w5, [x0, 7]
+	ldrb	w4, [x2, #:lo12:.LANCHOR45]
+	ldrh	w3, [x0, 314]
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	b	printf
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.section	.text.zftl_get_gc_node,"ax",@progbits
+	.align	2
+	.global	zftl_get_gc_node
+	.type	zftl_get_gc_node, %function
+zftl_get_gc_node:
+	and	w1, w1, 65535
+	and	w0, w0, 65535
+	cmp	w1, 5
+	bne	.L512
+	mov	w1, w0
+	adrp	x0, .LANCHOR74
+	ldr	x0, [x0, #:lo12:.LANCHOR74]
+.L514:
+	b	_list_get_gc_head_node.isra.2
+.L512:
+	cmp	w1, 2
+	mov	w1, w0
+	bne	.L513
+	adrp	x0, .LANCHOR75
+	ldr	x0, [x0, #:lo12:.LANCHOR75]
+	b	.L514
+.L513:
+	adrp	x0, .LANCHOR76
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	b	.L514
+	.size	zftl_get_gc_node, .-zftl_get_gc_node
+	.section	.text.gc_search_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_search_src_blk
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR46
+	and	w21, w0, 255
+	and	w0, w1, 255
 	stp	x19, x20, [sp, 16]
-	ldr	x5, [x21, #:lo12:.LANCHOR46]
+	str	w0, [x29, 112]
+	adrp	x0, .LANCHOR5
 	stp	x23, x24, [sp, 48]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	stp	x25, x26, [sp, 64]
-	ldr	w0, [x5, 32]
-	cmp	w0, 20480
-	bls	.L429
-	ldr	w1, [x5, 36]
-	add	w1, w1, w0, lsr 10
-	and	w0, w0, 1023
-	stp	w0, w1, [x5, 32]
-.L429:
-	adrp	x0, .LANCHOR60
-	ldr	w3, [x5, 36]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldr	w1, [x0, 568]
-	ldr	w2, [x0, 12]
-	add	w1, w1, 12959744
-	add	w1, w1, 256
-	cmp	w2, w1
-	bhi	.L430
-	ldr	w1, [x0, 572]
-	add	w1, w1, 128
-	cmp	w3, w1
-	bls	.L428
-.L430:
-	adrp	x23, .LANCHOR59
-	ldrh	w10, [x5, 134]
-	adrp	x22, .LANCHOR54
-	mov	w20, 65535
-	ldr	x8, [x23, #:lo12:.LANCHOR59]
-	mov	w19, w20
-	ldrh	w11, [x22, #:lo12:.LANCHOR54]
-	mov	w12, w20
-	str	w2, [x0, 568]
-	mov	w4, 0
-	add	x8, x8, x10, uxth 2
-	str	w3, [x0, 572]
-	mov	w1, 0
+	stp	x27, x28, [sp, 80]
+	add	x0, x0, x21, sxtw 1
+	ldrh	w19, [x0, 120]
+	cbz	w19, .L516
+	mov	w0, w19
+.L515:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L516:
+	and	w20, w2, 255
+	cbnz	w21, .L518
+	adrp	x24, .LANCHOR77
+	adrp	x26, .LANCHOR29
+	adrp	x27, .LC13
+	and	w23, w20, 65535
+	add	x26, x26, :lo12:.LANCHOR29
+	add	x27, x27, :lo12:.LC13
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	mov	w22, 0
 	mov	w25, 0
-	mov	w24, 0
-	mov	w3, 0
+.L519:
+	cmp	w25, w23
+	bcs	.L524
+	ldrh	w6, [x24, #:lo12:.LANCHOR77]
+	add	x7, x24, :lo12:.LANCHOR77
+	mov	w1, 3
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w2, w6, 1
+	and	w2, w2, 65535
+	strh	w2, [x24, #:lo12:.LANCHOR77]
+	and	w1, w0, 65535
+	mov	w0, 65535
+	mov	w28, w1
+	cmp	w1, w0
+	beq	.L520
+	ldr	w0, [x26]
+	adrp	x6, .LANCHOR4
+	uxtw	x4, w1
+	tbz	x0, 8, .L521
+	ldr	x0, [x6, #:lo12:.LANCHOR4]
+	stp	x6, x4, [x29, 96]
+	ldrh	w3, [x0, x4, lsl 1]
+	mov	x0, x27
+	bl	printf
+	ldp	x6, x4, [x29, 96]
+.L521:
+	ldr	x0, [x6, #:lo12:.LANCHOR4]
+	ldrh	w1, [x0, x4, lsl 1]
+	adrp	x0, .LANCHOR62
+	ldrh	w0, [x0, #:lo12:.LANCHOR62]
+	cmp	w1, w0
+	bcs	.L522
 	mov	w2, 0
-.L432:
-	cmp	w10, w11
-	bcc	.L436
-	ldrh	w0, [x5, 96]
-	cmp	w0, w25
-	bcs	.L437
-	strh	w25, [x5, 96]
-.L437:
-	ldrh	w0, [x5, 98]
-	cmp	w0, w24
-	bcs	.L438
-	strh	w24, [x5, 98]
-.L438:
-	udiv	w3, w3, w1
-	adrp	x0, .LANCHOR22
-	mov	x26, x0
-	udiv	w4, w4, w2
-	strh	w3, [x5, 88]
-	strh	w4, [x5, 90]
-	ldr	w5, [x0, #:lo12:.LANCHOR22]
-	tbz	x5, 8, .L439
-	adrp	x0, .LC11
-	and	w4, w4, 65535
-	and	w3, w3, 65535
-	add	x0, x0, :lo12:.LC11
-	bl	printf
-.L439:
-	ldr	w0, [x26, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L440
-	adrp	x0, .LC12
-	mov	w4, w24
-	mov	w3, w25
-	mov	w2, w19
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC12
+	mov	w1, 0
+	mov	w0, w28
+	bl	gc_add_sblk
+	cbz	w0, .L523
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w23, w22
+	bcs	.L523
+.L524:
+	ldr	x0, [x29, 112]
+	tbz	x0, 1, .L526
+	adrp	x25, .LANCHOR79
+	adrp	x28, .LANCHOR78
+	add	x27, x25, :lo12:.LANCHOR79
+	add	x28, x28, :lo12:.LANCHOR78
+	mov	w26, 65535
+.L527:
+	cmp	w19, w23
+	beq	.L531
+	ldrh	w6, [x28]
+	mov	w1, 5
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x28]
+	and	w1, w0, 65535
+	cmp	w1, w26
+	beq	.L528
+	adrp	x2, .LANCHOR4
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27]
+	cmp	w2, w1
+	bcs	.L529
+	mov	w2, 0
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L530
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w23, w22
+	bcs	.L530
+.L531:
+	ldrh	w1, [x25, #:lo12:.LANCHOR79]
+	cmp	w22, w23
+	adrp	x0, .LANCHOR80
+	bcs	.L533
+	ldrh	w3, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	lsr	w2, w3, 3
+	mul	w0, w0, w3
+	sub	w0, w0, w2
+	cmp	w1, w0
+	bge	.L526
+	add	w1, w1, w2
+	strh	w1, [x25, #:lo12:.LANCHOR79]
+.L526:
+	ldr	x0, [x29, 112]
+	tbz	x0, 0, .L534
+	cmp	w22, w23
+	bcs	.L534
+	adrp	x25, .LANCHOR81
+	add	x25, x25, :lo12:.LANCHOR81
+	mov	w24, 64
+	adrp	x26, .LANCHOR75
+	mov	w27, 65535
+.L539:
+	ldrh	w6, [x25]
+	ldr	x0, [x26, #:lo12:.LANCHOR75]
+	mov	w1, w6
+	bl	_list_get_gc_head_node.isra.2
+	add	w6, w6, 1
+	strh	w6, [x25]
+	cmp	w27, w0, uxth
+	beq	.L535
+	mov	w2, 0
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L536
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w23, w22
+	bhi	.L536
+.L537:
+	adrp	x1, .LANCHOR62
+	adrp	x2, .LANCHOR80
+	ldrh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	cmp	w0, w2, lsr 1
+	bls	.L534
+	sub	w0, w0, #8
+	b	.L613
+.L522:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	b	.L524
+.L520:
+	strh	wzr, [x7]
+	b	.L524
+.L523:
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	b	.L519
+.L529:
+	strh	wzr, [x28]
+	b	.L531
+.L528:
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	b	.L531
+.L530:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L527
+.L533:
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w1, w0
+	bls	.L526
+	sub	w0, w1, w0, lsr 3
+	strh	w0, [x25, #:lo12:.LANCHOR79]
+	b	.L526
+.L535:
+	strh	wzr, [x25]
+.L538:
+	cmp	w22, w23
+	bcs	.L537
+	adrp	x1, .LANCHOR62
+	adrp	x2, .LANCHOR80
+	ldrh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w2, [x2, #:lo12:.LANCHOR80]
+	cmp	w2, w0
+	bls	.L534
+	add	w0, w0, 8
+.L613:
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+.L534:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L561
+	ldr	w2, [x29, 112]
+	adrp	x0, .LC14
+	mov	w4, w20
+	mov	w3, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC14
 	bl	printf
-.L440:
-	sub	w0, w24, w19
-	cmp	w0, 64
-	bgt	.L441
-.L447:
-	cbnz	w19, .L442
-.L448:
-	cbz	w20, .L428
-	ldr	x2, [x21, #:lo12:.LANCHOR46]
-	ldr	x1, [x23, #:lo12:.LANCHOR59]
-	ldrh	w5, [x22, #:lo12:.LANCHOR54]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L453:
-	cmp	w0, w5
-	bcc	.L455
-	ldrh	w0, [x2, 74]
-	add	w0, w20, w0
-	strh	w0, [x2, 74]
-	ldrh	w0, [x2, 96]
-	cmp	w20, w0
-	bcs	.L428
-	sub	w20, w0, w20
-	strh	w20, [x2, 96]
-.L428:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L436:
-	ldrb	w0, [x8, 2]
-	tbz	x0, 3, .L433
-	ldr	w0, [x8]
-	ldrh	w7, [x8]
-	ubfx	x0, x0, 11, 8
-	and	w6, w7, 2047
-.L434:
-	cmp	w6, w20
-	add	w1, w1, 1
-	csel	w20, w6, w20, cc
-	cmp	w6, w25
-	add	w3, w3, w6
-	csel	w6, w6, w25, hi
-	and	w1, w1, 65535
-	and	w20, w20, 65535
-	and	w25, w6, 65535
-	cmp	w0, w12
-	bne	.L456
-	b	.L457
-.L433:
-	tst	w0, 24
-	bne	.L435
-	ldrh	w7, [x8]
-	mov	w0, 65535
-	and	w6, w7, 2047
-	b	.L434
-.L435:
-	ldr	w0, [x8]
-	ubfx	x0, x0, 11, 8
-.L456:
-	cmp	w0, w19
-	add	w2, w2, 1
-	csel	w19, w0, w19, cc
-	cmp	w0, w24
-	add	w4, w4, w0
-	csel	w0, w0, w24, hi
-	and	w2, w2, 65535
+.L561:
+	mov	w0, w22
+	b	.L515
+.L536:
+	sub	w24, w24, #1
+	ands	w24, w24, 65535
+	bne	.L539
+	b	.L538
+.L518:
+	ldr	w0, [x29, 112]
+	adrp	x3, .LANCHOR81
+	and	w0, w0, 1
+	str	w0, [x29, 104]
+	ldr	x0, [x29, 112]
+	strh	wzr, [x3, #:lo12:.LANCHOR81]
+	tbz	x0, 0, .L563
+	adrp	x23, .LANCHOR82
+	adrp	x24, .LANCHOR83
+	ldrh	w0, [x23, #:lo12:.LANCHOR82]
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	cmp	w0, w1, lsr 1
+	bcc	.L564
+	adrp	x1, .LANCHOR84
+	mov	w22, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	cmp	w1, w0
+	bls	.L542
+.L611:
+	add	x26, x3, :lo12:.LANCHOR81
+	and	w28, w20, 65535
+	mov	w25, 64
+	mov	w27, 65535
+.L545:
+	adrp	x0, .LANCHOR75
+	ldrh	w6, [x26]
+	ldr	x0, [x0, #:lo12:.LANCHOR75]
+	mov	w1, w6
+	bl	_list_get_gc_head_node.isra.2
+	add	w6, w6, 1
+	strh	w6, [x26]
+	cmp	w27, w0, uxth
+	beq	.L543
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L544
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w22, w28
+	bcc	.L544
+.L542:
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	ldrh	w0, [x23, #:lo12:.LANCHOR82]
+	cmp	w0, w1, lsr 1
+	bls	.L540
+	adrp	x24, .LANCHOR77
+	and	w27, w20, 65535
+	mov	w23, 64
+	mov	w26, 65535
+	strh	wzr, [x24, #:lo12:.LANCHOR77]
+	add	x24, x24, :lo12:.LANCHOR77
+.L547:
+	ldrh	w6, [x24]
+	mov	w1, 3
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x24]
+	cmp	w26, w0, uxth
+	beq	.L540
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L546
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w22, w27
+	bcs	.L540
+.L546:
+	sub	w23, w23, #1
+	ands	w23, w23, 65535
+	bne	.L547
+.L540:
+	ldr	x0, [x29, 112]
+	tbz	x0, 1, .L548
+	adrp	x28, .LANCHOR78
+	adrp	x24, .LANCHOR85
+	add	x27, x24, :lo12:.LANCHOR85
+	mov	w23, 64
+	strh	wzr, [x28, #:lo12:.LANCHOR78]
+	add	x28, x28, :lo12:.LANCHOR78
+	mov	w25, 65535
+	adrp	x26, .LANCHOR4
+.L553:
+	ldrh	w6, [x28]
+	mov	w1, 5
+	mov	w0, w6
+	bl	zftl_get_gc_node
+	add	w6, w6, 1
+	strh	w6, [x28]
+	and	w1, w0, 65535
+	cmp	w1, w25
+	beq	.L549
+	ldr	x2, [x26, #:lo12:.LANCHOR4]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w2, [x2, x1]
+	ldrh	w1, [x27]
+	cmp	w2, w1
+	bcs	.L550
+	mov	w2, w21
+	mov	w1, 0
+	bl	gc_add_sblk
+	cbz	w0, .L551
+	add	w5, w22, 1
+	add	w19, w19, 1
+	and	w22, w5, 65535
 	and	w19, w19, 65535
-	and	w24, w0, 65535
-.L457:
-	add	w10, w10, 1
-	add	x8, x8, 4
-	and	w10, w10, 65535
-	b	.L432
-.L441:
-	ldr	x0, [x21, #:lo12:.LANCHOR46]
-	add	x25, x22, :lo12:.LANCHOR54
-	ldrh	w24, [x0, 134]
-.L444:
+	cmp	w22, w20
+	bcc	.L551
+.L552:
+	cmp	w22, w20
+	adrp	x4, .LANCHOR80
+	adrp	x2, .LANCHOR72
+	bcc	.L554
+	cbnz	w19, .L555
+	adrp	x0, .LANCHOR86
+	ldrh	w1, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w1, w0
+	bls	.L555
+.L554:
+	adrp	x1, .LANCHOR71
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	mul	w2, w1, w2
+	ldrh	w1, [x4, #:lo12:.LANCHOR80]
+	sub	w1, w2, w1, lsr 3
+	cmp	w0, w1
+	bge	.L548
+	add	w0, w0, 4
+.L612:
+	strh	w0, [x24, #:lo12:.LANCHOR85]
+.L548:
+	ldr	w0, [x29, 104]
+	cbz	w0, .L534
+	adrp	x25, .LANCHOR78
+	adrp	x23, .LANCHOR88
+	add	x28, x23, :lo12:.LANCHOR88
+	mov	w24, 64
+	strh	wzr, [x25, #:lo12:.LANCHOR78]
+	add	x25, x25, :lo12:.LANCHOR78
+	mov	w26, 65535
+	adrp	x27, .LANCHOR4
+.L559:
 	ldrh	w0, [x25]
-	cmp	w0, w24
-	bls	.L447
-	ldr	x2, [x23, #:lo12:.LANCHOR59]
-	ubfiz	x1, x24, 2, 16
-	add	x0, x2, x1
-	ldrb	w0, [x0, 2]
-	tst	w0, 192
-	beq	.L445
-	and	w3, w0, 224
-	cmp	w3, 224
-	beq	.L445
-	tbz	x0, 4, .L445
-	ldr	w0, [x2, x1]
-	ubfx	x0, x0, 11, 8
-	cmp	w0, w19
-	bhi	.L445
-	mov	w2, 1
-	mov	w0, w24
-	mov	w1, w2
+	mov	w1, 3
+	bl	zftl_get_gc_node
+	and	w1, w0, 65535
+	cmp	w1, w26
+	beq	.L556
+	ldr	x2, [x27, #:lo12:.LANCHOR4]
+	ubfiz	x1, x1, 1, 16
+	ldrh	w1, [x2, x1]
+	ldrh	w2, [x28]
+	cmp	w2, w1
+	bls	.L557
+	cmp	w1, 2
+	bhi	.L558
+.L557:
+	mov	w2, w21
+	mov	w1, 0
 	bl	gc_add_sblk
-.L445:
-	add	w24, w24, 1
-	and	w24, w24, 65535
-	b	.L444
-.L442:
-	ldr	x2, [x21, #:lo12:.LANCHOR46]
-	ldr	x1, [x23, #:lo12:.LANCHOR59]
-	ldrh	w5, [x22, #:lo12:.LANCHOR54]
-	ldrh	w0, [x2, 134]
-	add	x1, x1, x0, uxth 2
-.L449:
-	cmp	w0, w5
-	bcc	.L451
-	ldrh	w0, [x2, 72]
-	add	w0, w19, w0
-	strh	w0, [x2, 72]
-	ldrh	w0, [x2, 98]
-	cmp	w19, w0
-	bcs	.L448
-	sub	w19, w0, w19
-	strh	w19, [x2, 98]
-	b	.L448
-.L451:
-	ldr	w3, [x1]
-	ubfx	x4, x3, 11, 8
-	cmp	w19, w4
-	bhi	.L450
-	sub	w4, w4, w19
-	bfi	w3, w4, 11, 8
-	str	w3, [x1]
-.L450:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L449
-.L455:
-	ldrh	w3, [x1]
-	and	w4, w3, 2047
-	cmp	w4, w20
-	blt	.L454
-	sub	w4, w4, w20
-	bfi	w3, w4, 0, 11
-	strh	w3, [x1]
-.L454:
-	add	w0, w0, 1
-	add	x1, x1, 4
-	and	w0, w0, 65535
-	b	.L453
-	.size	gc_static_wearleveling, .-gc_static_wearleveling
-	.section	.text.print_gc_debug_info,"ax",@progbits
+	cbz	w0, .L558
+	add	w5, w22, 1
+	and	w22, w5, 65535
+	cmp	w22, w20
+	bcs	.L556
+.L558:
+	sub	w24, w24, #1
+	ands	w24, w24, 65535
+	bne	.L559
+.L556:
+	cmp	w22, w20
+	adrp	x2, .LANCHOR80
+	bcs	.L560
+	ldrh	w0, [x23, #:lo12:.LANCHOR88]
+	ldrh	w1, [x2, #:lo12:.LANCHOR80]
+	cmp	w0, w1, lsr 1
+	bls	.L534
+	sub	w0, w0, #4
+	strh	w0, [x23, #:lo12:.LANCHOR88]
+	b	.L534
+.L564:
+	mov	w22, 0
+	b	.L611
+.L543:
+	strh	wzr, [x26]
+	b	.L542
+.L544:
+	sub	w4, w25, #1
+	ands	w25, w4, 65535
+	bne	.L545
+	b	.L542
+.L563:
+	mov	w22, 0
+	b	.L540
+.L550:
+	strh	wzr, [x28]
+	b	.L552
+.L549:
+	adrp	x0, .LANCHOR77
+	strh	wzr, [x0, #:lo12:.LANCHOR77]
+	b	.L552
+.L551:
+	sub	w23, w23, #1
+	ands	w23, w23, 65535
+	bne	.L553
+	b	.L552
+.L555:
+	ldrh	w1, [x4, #:lo12:.LANCHOR80]
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldrh	w0, [x24, #:lo12:.LANCHOR85]
+	mul	w1, w1, w2
+	cmp	w0, w1
+	ble	.L548
+	sub	w0, w0, #4
+	b	.L612
+.L560:
+	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	adrp	x2, .LANCHOR72
+	ldrh	w1, [x23, #:lo12:.LANCHOR88]
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	mul	w0, w0, w2
+	sub	w0, w0, #32
+	cmp	w1, w0
+	bge	.L534
+	add	w1, w1, 4
+	strh	w1, [x23, #:lo12:.LANCHOR88]
+	b	.L534
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.zftl_insert_free_list,"ax",@progbits
 	.align	2
-	.global	print_gc_debug_info
-	.type	print_gc_debug_info, %function
-print_gc_debug_info:
-	adrp	x1, .LANCHOR58
-	add	x0, x1, :lo12:.LANCHOR58
-	adrp	x2, .LANCHOR38
-	ldrh	w1, [x1, #:lo12:.LANCHOR58]
-	ldrb	w5, [x0, 7]
-	ldrb	w4, [x2, #:lo12:.LANCHOR38]
-	ldrh	w3, [x0, 314]
-	ldrh	w2, [x0, 2]
-	adrp	x0, .LC13
-	add	x0, x0, :lo12:.LC13
-	b	printf
-	.size	print_gc_debug_info, .-print_gc_debug_info
-	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
+	.global	zftl_insert_free_list
+	.type	zftl_insert_free_list, %function
+zftl_insert_free_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w0, [x0, 2]
+	ands	w0, w0, 24
+	bne	.L615
+	adrp	x2, .LANCHOR89
+	adrp	x0, .LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR90
+.L617:
+	b	_insert_free_list
+.L615:
+	cmp	w0, 16
+	bne	.L616
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L617
+.L616:
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L617
+	.size	zftl_insert_free_list, .-zftl_insert_free_list
+	.section	.text.zftl_insert_data_list,"ax",@progbits
 	.align	2
-	.global	ftl_get_blk_list_in_sblk
-	.type	ftl_get_blk_list_in_sblk, %function
-ftl_get_blk_list_in_sblk:
-	adrp	x2, .LANCHOR59
-	and	w0, w0, 65535
-	adrp	x6, .LANCHOR71
-	add	x6, x6, :lo12:.LANCHOR71
-	ldr	x2, [x2, #:lo12:.LANCHOR59]
-	mov	w3, 0
-	mov	w12, 21
-	add	x2, x2, x0, uxth 2
-	ldrb	w11, [x2, 3]
-	adrp	x2, .LANCHOR69
-	ldrb	w8, [x2, #:lo12:.LANCHOR69]
-	adrp	x2, .LANCHOR70
-	ldrb	w5, [x2, #:lo12:.LANCHOR70]
-	mul	w0, w0, w5
-	and	w4, w0, 65535
-	mov	w0, 0
-.L479:
+	.global	zftl_insert_data_list
+	.type	zftl_insert_data_list, %function
+zftl_insert_data_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L619
+	adrp	x2, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+.L622:
+	b	_insert_data_list
+.L619:
+	cmp	w2, 96
+	bne	.L620
+	adrp	x2, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L622
+.L620:
+	cmp	w2, 160
+	bne	.L618
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L622
+.L618:
+	ret
+	.size	zftl_insert_data_list, .-zftl_insert_data_list
+	.section	.text.zftl_get_free_sblk,"ax",@progbits
+	.align	2
+	.global	zftl_get_free_sblk
+	.type	zftl_get_free_sblk, %function
+zftl_get_free_sblk:
+	stp	x29, x30, [sp, -48]!
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR93
+	str	x21, [sp, 32]
+	and	w21, w1, 65535
+	cmp	w21, 5
+	bne	.L624
+	adrp	x1, .LANCHOR91
+	add	x2, x1, :lo12:.LANCHOR91
+	ldrh	w3, [x1, #:lo12:.LANCHOR91]
+	ldrh	w1, [x20, #:lo12:.LANCHOR93]
+	cmp	w3, w1
+	bls	.L625
+	mov	w1, w0
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+.L629:
+	bl	_list_pop_index_node
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	bne	.L627
+	adrp	x0, .LANCHOR89
+	ldrh	w5, [x20, #:lo12:.LANCHOR93]
+	mov	w2, w21
+	mov	w1, w19
+	ldrh	w4, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR90
+	ldr	x3, [x0, #:lo12:.LANCHOR90]
+	adrp	x0, .LC15
+	add	x0, x0, :lo12:.LC15
+	bl	printf
+.L627:
+	mov	w0, w19
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L625:
+	mov	w1, w0
+	add	x2, x20, :lo12:.LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L629
+.L624:
+	adrp	x1, .LANCHOR89
+	add	x2, x1, :lo12:.LANCHOR89
+	ldrh	w3, [x1, #:lo12:.LANCHOR89]
+	ldrh	w1, [x20, #:lo12:.LANCHOR93]
+	cmp	w3, w1
+	bls	.L625
+	mov	w1, w0
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	b	.L629
+	.size	zftl_get_free_sblk, .-zftl_get_free_sblk
+	.section	.text.zftl_remove_data_node,"ax",@progbits
+	.align	2
+	.global	zftl_remove_data_node
+	.type	zftl_remove_data_node, %function
+zftl_remove_data_node:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L631
+	adrp	x2, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+.L634:
+	b	_list_remove_node
+.L631:
+	cmp	w2, 96
+	bne	.L632
+	adrp	x2, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L634
+.L632:
+	cmp	w2, 160
+	bne	.L630
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L634
+.L630:
+	ret
+	.size	zftl_remove_data_node, .-zftl_remove_data_node
+	.section	.text.zftl_remove_free_node,"ax",@progbits
+	.align	2
+	.global	zftl_remove_free_node
+	.type	zftl_remove_free_node, %function
+zftl_remove_free_node:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w0, [x0, 2]
+	ands	w0, w0, 24
+	bne	.L636
+	adrp	x2, .LANCHOR89
+	adrp	x0, .LANCHOR90
+	add	x2, x2, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LANCHOR90
+.L638:
+	b	_list_remove_node
+.L636:
+	cmp	w0, 16
+	bne	.L637
+	adrp	x2, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x2, x2, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L638
+.L637:
+	adrp	x2, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L638
+	.size	zftl_remove_free_node, .-zftl_remove_free_node
+	.section	.text.zftl_list_update_data_list,"ax",@progbits
+	.align	2
+	.global	zftl_list_update_data_list
+	.type	zftl_list_update_data_list, %function
+zftl_list_update_data_list:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x1, uxth 2
+	ldrb	w2, [x0, 2]
+	and	w2, w2, 224
+	cmp	w2, 64
+	bne	.L640
+	adrp	x2, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x2, x2, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+.L643:
+	b	_list_update_data_list
+.L640:
+	cmp	w2, 96
+	bne	.L641
+	adrp	x2, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x2, x2, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L643
+.L641:
+	cmp	w2, 160
+	bne	.L639
+	adrp	x2, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x2, x2, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L643
+.L639:
+	ret
+	.size	zftl_list_update_data_list, .-zftl_list_update_data_list
+	.section	.text.print_list_info,"ax",@progbits
+	.align	2
+	.global	print_list_info
+	.type	print_list_info, %function
+print_list_info:
+	sub	sp, sp, #112
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	ldrh	w2, [x1]
+	ldr	x1, [x0]
+	stp	x19, x20, [sp, 48]
+	mov	x19, x0
+	stp	x21, x22, [sp, 64]
+	adrp	x0, .LC16
+	stp	x23, x24, [sp, 80]
+	add	x0, x0, :lo12:.LC16
+	str	x25, [sp, 96]
+	bl	printf
+	ldr	x19, [x19]
+	cbz	x19, .L644
+	mov	x23, -6148914691236517206
+	adrp	x21, .LC17
+	add	x21, x21, :lo12:.LC17
+	mov	w20, 0
+	adrp	x22, .LANCHOR0
+	movk	x23, 0xaaab, lsl 0
+	adrp	x24, .LANCHOR3
+	adrp	x25, .LANCHOR4
+.L651:
+	ldr	x2, [x22, #:lo12:.LANCHOR0]
+	ldr	x1, [x24, #:lo12:.LANCHOR3]
+	sub	x2, x19, x2
+	ldr	x8, [x25, #:lo12:.LANCHOR4]
+	asr	x2, x2, 1
+	ldrh	w5, [x19, 4]
+	ldrh	w4, [x19, 2]
+	mul	x2, x2, x23
+	and	x7, x2, 65535
+	and	w2, w2, 65535
+	lsl	x0, x7, 2
+	add	x3, x1, x0
+	ldrh	w7, [x8, x7, lsl 1]
+	ldrb	w6, [x3, 2]
+	ldrh	w3, [x19]
+	str	w7, [sp, 16]
+	ldrh	w7, [x1, x0]
+	and	w7, w7, 2047
+	str	w7, [sp, 8]
+	ubfx	x7, x6, 3, 2
+	ubfx	x6, x6, 5, 3
+	ldr	w0, [x1, x0]
+	mov	w1, w20
+	ubfx	x0, x0, 11, 8
+	str	w0, [sp]
+	mov	x0, x21
+	bl	printf
+	ldrh	w19, [x19]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L644
+	ldr	x0, [x22, #:lo12:.LANCHOR0]
+	mov	w1, 6
+	add	w20, w20, 1
+	cmp	w20, 33
+	umaddl	x19, w19, w1, x0
+	bne	.L651
+.L644:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x29, x30, [sp, 32]
+	ldr	x25, [sp, 96]
+	add	sp, sp, 112
+	ret
+	.size	print_list_info, .-print_list_info
+	.section	.text.dump_all_list_info,"ax",@progbits
+	.align	2
+	.global	dump_all_list_info
+	.type	dump_all_list_info, %function
+dump_all_list_info:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR89
+	adrp	x0, .LANCHOR90
+	add	x1, x1, :lo12:.LANCHOR89
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	print_list_info
+	adrp	x1, .LANCHOR91
+	adrp	x0, .LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR92
+	bl	print_list_info
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LANCHOR94
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR94
+	bl	print_list_info
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LANCHOR75
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LANCHOR75
+	bl	print_list_info
+	adrp	x1, .LANCHOR82
+	adrp	x0, .LANCHOR76
+	add	x1, x1, :lo12:.LANCHOR82
+	add	x0, x0, :lo12:.LANCHOR76
+	bl	print_list_info
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR74
+	add	x1, x1, :lo12:.LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR74
+	b	print_list_info
+	.size	dump_all_list_info, .-dump_all_list_info
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_list_in_sblk
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	adrp	x2, .LANCHOR3
+	and	w0, w0, 65535
+	adrp	x6, .LANCHOR96
+	add	x6, x6, :lo12:.LANCHOR96
+	ldr	x2, [x2, #:lo12:.LANCHOR3]
+	mov	w3, 0
+	mov	w12, 21
+	add	x2, x2, x0, uxth 2
+	ldrb	w11, [x2, 3]
+	adrp	x2, .LANCHOR72
+	ldrb	w8, [x2, #:lo12:.LANCHOR72]
+	adrp	x2, .LANCHOR95
+	ldrb	w5, [x2, #:lo12:.LANCHOR95]
+	mul	w0, w0, w5
+	and	w4, w0, 65535
+	mov	w0, 0
+.L656:
 	cmp	w3, w8
-	blt	.L483
+	blt	.L660
 	sxtw	x2, w0
 	mov	w3, -1
-.L484:
+.L661:
 	cmp	w8, w2
-	bgt	.L485
+	bgt	.L662
 	ret
-.L483:
+.L660:
 	asr	w2, w11, w3
-	tbnz	x2, 0, .L480
+	tbnz	x2, 0, .L657
 	sdiv	w2, w3, w5
 	ldrh	w7, [x6]
 	sbfiz	x10, x0, 1, 32
@@ -2871,266 +3959,47 @@ ftl_get_blk_list_in_sblk:
 	lsl	w2, w2, w7
 	add	w2, w4, w2
 	and	w2, w2, 65535
-	bhi	.L481
-.L486:
+	bhi	.L658
+.L663:
 	add	w0, w0, 1
 	strh	w2, [x1, x10]
-.L480:
+.L657:
 	add	w3, w3, 1
-	b	.L479
-.L481:
+	b	.L656
+.L658:
 	and	w7, w3, 1
 	add	w2, w2, w7
-	b	.L486
-.L485:
+	b	.L663
+.L662:
 	strh	w3, [x1, x2, lsl 1]
 	add	x2, x2, 1
-	b	.L484
+	b	.L661
 	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
-	.section	.text.ftl_alloc_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_alloc_sblk
-	.type	ftl_alloc_sblk, %function
-ftl_alloc_sblk:
-.L488:
-	stp	x29, x30, [sp, -64]!
-	mov	w6, 2
-	mov	w7, 0
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w0
-	adrp	x0, .LANCHOR54
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	cmp	w20, 5
-	ldrh	w11, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR59
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	mov	w19, 65535
-	ldr	x12, [x0, #:lo12:.LANCHOR59]
-	mov	w14, w11
-	str	x23, [sp, 48]
-	mov	w5, w19
-	csel	w23, wzr, w6, ne
-	mov	w13, w19
-	csel	w6, w6, wzr, ne
-.L503:
-	ldrh	w4, [x1, 132]
-	mov	w0, w4
-	add	x3, x12, x4, uxth 2
-.L489:
-	cmp	w0, w14
-	blt	.L501
-	sub	w0, w0, w4
-	add	w0, w7, w0
-	and	w7, w0, 65535
-	ldrh	w0, [x1, 134]
-	sub	w2, w11, w0
-	cmp	w7, w2
-	blt	.L502
-	cmp	w19, w13
-	beq	.L502
-	add	x21, x12, x19, uxth 2
-	b	.L493
-.L501:
-	ldrb	w2, [x3, 2]
-	mov	x21, x3
-	tst	w2, 224
-	bne	.L490
-	ubfx	x2, x2, 3, 2
-	cmp	w6, w2
-	beq	.L490
-	cbz	w23, .L491
-	ldr	w2, [x3]
-	ldrh	w10, [x1, 72]
-	ldrh	w8, [x1, 90]
-	ubfx	x2, x2, 11, 8
-	add	w8, w8, 1
-	add	w10, w10, w2
-	cmp	w10, w8
-	ble	.L492
-	and	w2, w2, 65535
-	cmp	w5, w2
-	bls	.L490
-	and	w19, w0, 65535
-	mov	w5, w2
-.L490:
-	add	w0, w0, 1
-	add	x3, x3, 4
-	b	.L489
-.L491:
-	ldrh	w2, [x3]
-	ldrh	w10, [x1, 74]
-	ldrh	w8, [x1, 88]
-	and	w2, w2, 2047
-	add	w10, w10, w2
-	add	w8, w8, 1
-	cmp	w10, w8
-	ble	.L492
-	cmp	w2, w5
-	bge	.L490
-	mov	w5, w2
-	and	w19, w0, 65535
-	b	.L490
-.L492:
-	and	w19, w0, 65535
-.L493:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L494
-	ldrb	w4, [x21, 3]
-	adrp	x0, .LC14
-	ldrb	w3, [x21, 2]
-	mov	w2, w20
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC14
-	ubfx	x3, x3, 5, 3
-	bl	printf
-.L494:
-	ldrb	w0, [x21, 2]
-	bfi	w0, w20, 5, 3
-	ubfx	x1, x0, 3, 2
-	orr	w1, w1, w23
-	bfi	w0, w1, 3, 2
-	strb	w0, [x21, 2]
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	strh	w19, [x0, 132]
-	tbz	x1, 0, .L495
-	ldrh	w1, [x0, 116]
-	sub	w1, w1, #1
-	strh	w1, [x0, 116]
-.L496:
-	cmp	w20, 5
-	bne	.L498
-	ldrh	w1, [x0, 120]
-	add	w1, w1, 1
-	strh	w1, [x0, 120]
-.L506:
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	ret
-.L495:
-	ldrb	w1, [x21, 2]
-	tst	w1, 24
-	bne	.L497
-	ldrh	w1, [x0, 114]
-	sub	w1, w1, #1
-	strh	w1, [x0, 114]
-	b	.L496
-.L497:
-	ldrh	w1, [x0, 118]
-	sub	w1, w1, #1
-	strh	w1, [x0, 118]
-	b	.L496
-.L498:
-	cmp	w20, 2
-	bne	.L500
-	ldrh	w1, [x0, 122]
-	add	w1, w1, 1
-	strh	w1, [x0, 122]
-	b	.L506
-.L500:
-	cmp	w20, 3
-	bne	.L506
-	ldrh	w1, [x0, 124]
-	add	w1, w1, 1
-	strh	w1, [x0, 124]
-	b	.L506
-.L502:
-	strh	w0, [x1, 132]
-	mov	w14, w4
-	b	.L503
-	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.ftl_free_sblk,"ax",@progbits
 	.align	2
 	.global	ftl_free_sblk
 	.type	ftl_free_sblk, %function
 ftl_free_sblk:
-	stp	x29, x30, [sp, -16]!
-	and	x0, x0, 65535
-	mov	w1, 65535
-	cmp	w0, w1
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	bne	.L511
-	adrp	x1, .LANCHOR72
-	adrp	x0, .LC0
-	mov	w2, 313
-	add	x1, x1, :lo12:.LANCHOR72
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L512:
-	b	.L512
-.L511:
-	adrp	x1, .LANCHOR59
-	ldr	x3, [x1, #:lo12:.LANCHOR59]
-	add	x3, x3, x0, lsl 2
-	ldrb	w1, [x3, 2]
-	ands	w4, w1, 224
-	bne	.L513
-	adrp	x1, .LANCHOR72
-	adrp	x0, .LC0
-	mov	w2, 316
-	add	x1, x1, :lo12:.LANCHOR72
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L514:
-	b	.L514
-.L513:
-	ubfx	x2, x1, 3, 2
-	cmp	w4, 160
-	adrp	x1, .LANCHOR46
-	bne	.L515
-	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	ldrh	w4, [x5, 120]
-	sub	w4, w4, #1
-	strh	w4, [x5, 120]
-.L516:
-	tbz	x2, 0, .L518
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 116]
-	add	w1, w1, 1
-	strh	w1, [x2, 116]
-.L519:
-	ldrb	w1, [x3, 2]
+	str	x19, [sp, 16]
+	and	x19, x0, 65535
+	mov	w0, w19
+	bl	zftl_remove_data_node
+	mov	w0, w19
+	bl	zftl_insert_free_list
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x0, x0, x19, lsl 2
+	ldrb	w1, [x0, 2]
 	and	w1, w1, 31
-	strb	w1, [x3, 2]
-	adrp	x1, .LANCHOR56
-	ldr	x1, [x1, #:lo12:.LANCHOR56]
-	strh	wzr, [x1, x0, lsl 1]
-	ldp	x29, x30, [sp], 16
+	strb	w1, [x0, 2]
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x19, lsl 1]
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L515:
-	cmp	w4, 64
-	bne	.L517
-	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	ldrh	w4, [x5, 122]
-	sub	w4, w4, #1
-	strh	w4, [x5, 122]
-	b	.L516
-.L517:
-	cmp	w4, 96
-	bne	.L516
-	ldr	x5, [x1, #:lo12:.LANCHOR46]
-	ldrh	w4, [x5, 124]
-	sub	w4, w4, #1
-	strh	w4, [x5, 124]
-	b	.L516
-.L518:
-	cbnz	w2, .L520
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 114]
-	add	w1, w1, 1
-	strh	w1, [x2, 114]
-	b	.L519
-.L520:
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 118]
-	add	w1, w1, 1
-	strh	w1, [x2, 118]
-	b	.L519
 	.size	ftl_free_sblk, .-ftl_free_sblk
 	.section	.text.gc_free_src_blk,"ax",@progbits
 	.align	2
@@ -3140,20 +4009,20 @@ gc_free_src_blk:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR58
+	adrp	x21, .LANCHOR63
 	stp	x23, x24, [sp, 48]
-	adrp	x22, .LC15
-	adrp	x23, .LANCHOR56
-	add	x21, x21, :lo12:.LANCHOR58
+	adrp	x22, .LC18
+	adrp	x23, .LANCHOR4
+	add	x21, x21, :lo12:.LANCHOR63
 	mov	x24, x23
-	add	x22, x22, :lo12:.LC15
+	add	x22, x22, :lo12:.LC18
 	stp	x19, x20, [sp, 16]
 	mov	w20, 0
 	stp	x25, x26, [sp, 64]
-.L523:
+.L667:
 	ldrh	w0, [x21, 56]
 	cmp	w0, w20
-	bhi	.L539
+	bhi	.L683
 	strh	wzr, [x21, 56]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
@@ -3161,123 +4030,123 @@ gc_free_src_blk:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L539:
+.L683:
 	add	x0, x21, x20, sxtw 1
 	ldrh	w25, [x0, 58]
-	ldr	x0, [x23, #:lo12:.LANCHOR56]
+	ldr	x0, [x23, #:lo12:.LANCHOR4]
 	mov	x19, x25
 	lsl	x26, x25, 1
 	ldrh	w2, [x0, x26]
-	cbz	w2, .L524
+	cbz	w2, .L668
 	mov	w1, w25
 	mov	x0, x22
 	bl	printf
-.L524:
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
+.L668:
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, x26]
-	cbnz	w0, .L525
-	adrp	x0, .LANCHOR59
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	cbnz	w0, .L669
+	adrp	x0, .LANCHOR3
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x25, x0, x25, lsl 2
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L526
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L670
 	ldrb	w2, [x25, 2]
-	adrp	x0, .LC16
+	adrp	x0, .LC19
 	mov	w1, w19
-	add	x0, x0, :lo12:.LC16
+	add	x0, x0, :lo12:.LC19
 	ubfx	x2, x2, 5, 3
 	bl	printf
-.L526:
+.L670:
 	ldrb	w0, [x25, 2]
 	and	w1, w0, 224
 	cmp	w1, 224
-	beq	.L527
+	beq	.L671
 	tst	w0, 192
-	bne	.L528
-.L527:
-	adrp	x1, .LANCHOR73
+	bne	.L672
+.L671:
+	adrp	x1, .LANCHOR97
 	adrp	x0, .LC0
-	mov	w2, 753
-	add	x1, x1, :lo12:.LANCHOR73
+	mov	w2, 770
+	add	x1, x1, :lo12:.LANCHOR97
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L529:
-	b	.L529
-.L528:
+.L673:
+	b	.L673
+.L672:
 	mov	w0, w19
 	bl	ftl_free_sblk
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	ldrh	w2, [x0, 124]
-	cbz	w2, .L530
+	cbz	w2, .L674
 	add	x3, x0, 392
 	mov	w1, 0
-.L532:
+.L676:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L531
+	bne	.L675
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 392]
 	strh	w2, [x0, 124]
-.L530:
+.L674:
 	ldrh	w2, [x0, 120]
-	cbz	w2, .L533
+	cbz	w2, .L677
 	add	x3, x0, 136
 	mov	w1, 0
-.L535:
+.L679:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L534
+	bne	.L678
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 136]
 	strh	w2, [x0, 120]
-.L533:
+.L677:
 	ldrh	w2, [x0, 122]
-	cbz	w2, .L536
+	cbz	w2, .L680
 	add	x3, x0, 264
 	mov	w1, 0
-.L538:
+.L682:
 	ldrh	w4, [x3]
 	cmp	w4, w19
-	bne	.L537
+	bne	.L681
 	add	x1, x0, x1, sxtw 1
 	mov	w3, -1
 	sub	w2, w2, #1
 	strh	w3, [x1, 264]
 	strh	w2, [x0, 122]
-.L536:
+.L680:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L523
-.L531:
+	b	.L667
+.L675:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L532
-	b	.L530
-.L534:
+	bne	.L676
+	b	.L674
+.L678:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L535
-	b	.L533
-.L537:
+	bne	.L679
+	b	.L677
+.L681:
 	add	w1, w1, 1
 	add	x3, x3, 2
 	cmp	w1, 64
-	bne	.L538
-	b	.L536
-.L525:
+	bne	.L682
+	b	.L680
+.L669:
 	mov	w2, 0
 	mov	w1, 1
 	mov	w0, w19
 	bl	gc_add_sblk
-	b	.L536
+	b	.L680
 	.size	gc_free_src_blk, .-gc_free_src_blk
 	.section	.text.ftl_erase_phy_blk,"ax",@progbits
 	.align	2
@@ -3289,29 +4158,29 @@ ftl_erase_phy_blk:
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
 	mov	w21, w1
-	adrp	x1, .LANCHOR71
+	adrp	x1, .LANCHOR96
 	stp	x19, x20, [sp, 16]
 	mov	w19, 21
-	adrp	x22, .LANCHOR75
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	adrp	x22, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	sub	w1, w19, w1
 	mov	w19, 1
 	lsl	w19, w19, w1
 	sub	w19, w19, #1
 	and	w19, w19, w0
 	asr	w20, w0, w1
-	adrp	x0, .LANCHOR74
+	adrp	x0, .LANCHOR98
 	sxth	w19, w19
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L563
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbz	w0, .L707
+	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	cmp	w21, 0
 	cset	w1, eq
 	mov	w0, w20
 	mul	w2, w2, w19
 	bl	flash_erase_block_en
-.L563:
-	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+.L707:
+	ldrh	w2, [x22, #:lo12:.LANCHOR99]
 	mov	w1, w21
 	mov	w0, w20
 	ldp	x21, x22, [sp, 32]
@@ -3328,102 +4197,102 @@ ftl_erase_sblk:
 	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR59
+	adrp	x21, .LANCHOR3
 	stp	x25, x26, [sp, 64]
 	and	w25, w0, 65535
-	ldr	x0, [x21, #:lo12:.LANCHOR59]
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
 	mov	w22, w1
 	stp	x19, x20, [sp, 16]
 	ubfiz	x20, x25, 2, 16
 	add	x0, x0, x20
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
-	adrp	x23, .LANCHOR70
-	add	x24, x24, :lo12:.LANCHOR76
-	add	x23, x23, :lo12:.LANCHOR70
+	adrp	x24, .LANCHOR100
+	adrp	x23, .LANCHOR95
+	add	x24, x24, :lo12:.LANCHOR100
+	add	x23, x23, :lo12:.LANCHOR95
 	ldrb	w26, [x0, 3]
 	mov	w19, 0
 	str	x27, [sp, 80]
 	add	x27, x29, 96
-.L569:
+.L713:
 	ldrb	w0, [x24]
 	cmp	w19, w0
-	bge	.L576
+	bge	.L720
 	ldrb	w3, [x23]
-	adrp	x0, .LANCHOR75
+	adrp	x0, .LANCHOR99
 	mov	w1, 0
-	ldrh	w4, [x0, #:lo12:.LANCHOR75]
+	ldrh	w4, [x0, #:lo12:.LANCHOR99]
 	mov	w0, 0
 	mul	w6, w19, w3
 	mul	w5, w25, w3
-	b	.L577
-.L571:
+	b	.L721
+.L715:
 	add	w2, w0, w6
 	asr	w2, w26, w2
-	tbnz	x2, 0, .L570
+	tbnz	x2, 0, .L714
 	and	w2, w0, 1
 	add	w2, w2, w5
 	mul	w2, w2, w4
 	str	w2, [x27, w1, sxtw 2]
 	add	w1, w1, 1
-.L570:
+.L714:
 	add	w0, w0, 1
-.L577:
+.L721:
 	cmp	w0, w3
-	blt	.L571
+	blt	.L715
 	cmp	w1, 2
-	bne	.L572
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L573
+	bne	.L716
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbz	w0, .L717
 	ldp	w2, w3, [x29, 96]
 	cmp	w22, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L573:
+.L717:
 	ldp	w2, w3, [x29, 96]
 	mov	w1, w22
 	mov	w0, w19
 	bl	flash_erase_duplane_block
-.L574:
+.L718:
 	add	w19, w19, 1
-	b	.L569
-.L572:
+	b	.L713
+.L716:
 	cmp	w1, 1
-	bne	.L574
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbz	w0, .L575
+	bne	.L718
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbz	w0, .L719
 	ldr	w2, [x29, 96]
 	cmp	w22, 0
 	cset	w1, eq
 	mov	w0, w19
 	bl	flash_erase_block_en
-.L575:
+.L719:
 	ldr	w2, [x29, 96]
 	mov	w1, w22
 	mov	w0, w19
 	bl	flash_erase_block_en
-	b	.L574
-.L576:
-	adrp	x2, .LANCHOR46
-	ldr	x3, [x21, #:lo12:.LANCHOR59]
-	cbnz	w22, .L578
+	b	.L718
+.L720:
+	adrp	x2, .LANCHOR53
+	ldr	x3, [x21, #:lo12:.LANCHOR3]
+	cbnz	w22, .L722
 	ldrh	w1, [x3, x20]
 	add	w0, w1, 1
 	and	w0, w0, 2047
 	bfi	w1, w0, 0, 11
 	strh	w1, [x3, x20]
-	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	x1, [x2, #:lo12:.LANCHOR53]
 	ldr	w2, [x1, 84]
 	add	w2, w2, 1
 	str	w2, [x1, 84]
 	ldrh	w2, [x1, 96]
 	cmp	w2, w0
-	bge	.L580
+	bge	.L724
 	strh	w0, [x1, 96]
-.L580:
+.L724:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
@@ -3432,7 +4301,7 @@ ftl_erase_sblk:
 	ldr	x27, [sp, 80]
 	ldp	x29, x30, [sp], 160
 	ret
-.L578:
+.L722:
 	ldr	w1, [x3, x20]
 	ubfx	x0, x1, 11, 8
 	add	w0, w0, 1
@@ -3440,59 +4309,59 @@ ftl_erase_sblk:
 	bfi	w1, w0, 11, 8
 	str	w1, [x3, x20]
 	and	w0, w0, 65535
-	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	x1, [x2, #:lo12:.LANCHOR53]
 	ldr	w2, [x1, 80]
 	add	w2, w2, 1
 	str	w2, [x1, 80]
 	ldrh	w2, [x1, 98]
 	cmp	w2, w0
-	bcs	.L580
+	bcs	.L724
 	strh	w0, [x1, 98]
-	b	.L580
+	b	.L724
 	.size	ftl_erase_sblk, .-ftl_erase_sblk
 	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
 	.align	2
 	.global	ftl_alloc_sys_blk
 	.type	ftl_alloc_sys_blk, %function
 ftl_alloc_sys_blk:
-	adrp	x0, .LANCHOR46
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR53
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
 	ldrh	w0, [x1, 136]
 	cmp	w0, 63
-	bls	.L590
+	bls	.L734
 	strh	wzr, [x1, 136]
-.L590:
+.L734:
 	ldrh	w3, [x1, 112]
-	cbnz	w3, .L591
+	cbnz	w3, .L735
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR77
+	adrp	x1, .LANCHOR101
 	adrp	x0, .LC0
-	mov	w2, 440
+	mov	w2, 983
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR77
+	add	x1, x1, :lo12:.LANCHOR101
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L592:
-	b	.L592
-.L591:
+.L736:
+	b	.L736
+.L735:
 	mov	w6, 65535
-.L597:
+.L741:
 	ldrh	w2, [x1, 136]
-.L593:
+.L737:
 	mov	w4, w2
 	cmp	w2, 63
-	ble	.L594
+	ble	.L738
 	strh	wzr, [x1, 136]
-	b	.L597
-.L594:
+	b	.L741
+.L738:
 	add	x5, x2, 1
 	add	x0, x1, x5, lsl 1
 	ldrh	w0, [x0, 158]
 	cmp	w0, w6
-	bne	.L598
+	bne	.L742
 	mov	x2, x5
-	b	.L593
-.L598:
+	b	.L737
+.L742:
 	add	x4, x1, x4, sxtw 1
 	mov	w5, -1
 	sub	w3, w3, #1
@@ -3506,125 +4375,136 @@ ftl_alloc_sys_blk:
 	.global	ftl_free_sys_blk
 	.type	ftl_free_sys_blk, %function
 ftl_free_sys_blk:
-	adrp	x1, .LANCHOR46
+	adrp	x1, .LANCHOR53
 	and	w0, w0, 65535
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	ldrh	w2, [x1, 138]
 	cmp	w2, 63
-	bls	.L603
+	bls	.L747
 	strh	wzr, [x1, 138]
-.L603:
+.L747:
 	ldrh	w3, [x1, 112]
 	cmp	w3, 63
-	bls	.L604
+	bls	.L748
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR78
+	adrp	x1, .LANCHOR102
 	adrp	x0, .LC0
-	mov	w2, 464
+	mov	w2, 1007
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR78
+	add	x1, x1, :lo12:.LANCHOR102
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L605:
-	b	.L605
-.L604:
+.L749:
+	b	.L749
+.L748:
 	mov	w6, 65535
-.L610:
+.L754:
 	ldrh	w2, [x1, 138]
-.L606:
+.L750:
 	mov	w4, w2
 	cmp	w2, 63
-	ble	.L607
+	ble	.L751
 	strh	wzr, [x1, 138]
-	b	.L610
-.L607:
+	b	.L754
+.L751:
 	add	x5, x2, 1
 	add	x7, x1, x5, lsl 1
 	ldrh	w7, [x7, 158]
 	cmp	w7, w6
-	bne	.L608
+	bne	.L752
 	add	x4, x1, x4, sxtw 1
 	add	w3, w3, 1
 	strh	w0, [x4, 160]
 	strh	w2, [x1, 138]
 	strh	w3, [x1, 112]
 	ret
-.L608:
+.L752:
 	mov	x2, x5
-	b	.L606
+	b	.L750
 	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
 	.section	.text.ftl_info_data_recovery,"ax",@progbits
 	.align	2
 	.global	ftl_info_data_recovery
 	.type	ftl_info_data_recovery, %function
 ftl_info_data_recovery:
-	ldrh	w1, [x0]
-	mov	w2, 65535
-	cmp	w1, w2
-	beq	.L614
-	adrp	x2, .LANCHOR59
-	ubfiz	x1, x1, 2, 16
-	ldr	x3, [x2, #:lo12:.LANCHOR59]
-	add	x4, x3, x1
-	ldrb	w2, [x4, 2]
-	tst	w2, 224
-	bne	.L614
+	ldrh	w2, [x0]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L768
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR3
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ubfiz	x19, x2, 2, 16
+	ldr	x20, [x1, #:lo12:.LANCHOR3]
+	str	x21, [sp, 32]
+	add	x21, x20, x19
+	ldrb	w1, [x21, 2]
+	tst	w1, 224
+	bne	.L758
 	ldrb	w0, [x0, 4]
-	bfi	w2, w0, 5, 3
-	adrp	x0, .LANCHOR46
-	strb	w2, [x4, 2]
-	ldr	x5, [x0, #:lo12:.LANCHOR46]
-	tbz	x2, 3, .L618
-	ldrh	w2, [x5, 116]
+	bfi	w1, w0, 5, 3
+	strb	w1, [x21, 2]
+	mov	w0, w2
+	bl	zftl_remove_free_node
+	ldrb	w0, [x21, 2]
+	adrp	x1, .LANCHOR53
+	ldr	x3, [x1, #:lo12:.LANCHOR53]
+	tbz	x0, 3, .L762
+	ldrh	w2, [x3, 116]
 	sub	w2, w2, #1
-	strh	w2, [x5, 116]
-.L619:
-	ldrb	w2, [x4, 2]
-	and	w2, w2, 224
-	cmp	w2, 160
-	bne	.L621
-	ldr	w2, [x3, x1]
-	ubfx	x4, x2, 11, 8
-	add	w4, w4, 1
-	bfi	w2, w4, 11, 8
-	str	w2, [x3, x1]
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	strh	w2, [x3, 116]
+.L763:
+	and	w0, w0, 224
+	cmp	w0, 160
+	bne	.L765
+	ldr	w0, [x20, x19]
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ubfx	x2, x0, 11, 8
+	add	w2, w2, 1
+	bfi	w0, w2, 11, 8
+	str	w0, [x20, x19]
 	ldrh	w0, [x1, 120]
 	sub	w0, w0, #1
 	strh	w0, [x1, 120]
+.L758:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
 	ret
-.L618:
-	tst	w2, 24
-	bne	.L620
-	ldrh	w2, [x5, 114]
+.L762:
+	tst	w0, 24
+	bne	.L764
+	ldrh	w2, [x3, 114]
 	sub	w2, w2, #1
-	strh	w2, [x5, 114]
-	b	.L619
-.L620:
-	ldrh	w2, [x5, 118]
+	strh	w2, [x3, 114]
+	b	.L763
+.L764:
+	ldrh	w2, [x3, 118]
 	sub	w2, w2, #1
-	strh	w2, [x5, 118]
-	b	.L619
-.L621:
-	ldrh	w4, [x3, x1]
-	cmp	w2, 64
-	add	w5, w4, 1
-	bfi	w4, w5, 0, 11
-	strh	w4, [x3, x1]
-	bne	.L622
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	strh	w2, [x3, 118]
+	b	.L763
+.L765:
+	ldrh	w2, [x20, x19]
+	cmp	w0, 64
+	add	w3, w2, 1
+	bfi	w2, w3, 0, 11
+	strh	w2, [x20, x19]
+	bne	.L766
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	ldrh	w0, [x1, 122]
 	sub	w0, w0, #1
 	strh	w0, [x1, 122]
-	ret
-.L622:
-	cmp	w2, 96
-	bne	.L614
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	b	.L758
+.L766:
+	cmp	w0, 96
+	bne	.L758
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
 	ldrh	w0, [x1, 124]
 	sub	w0, w0, #1
 	strh	w0, [x1, 124]
-.L614:
+	b	.L758
+.L768:
 	ret
 	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
 	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
@@ -3633,17 +4513,17 @@ ftl_info_data_recovery:
 	.type	ftl_get_ppa_from_index, %function
 ftl_get_ppa_from_index:
 	and	w1, w0, 65535
-	adrp	x0, .LANCHOR60
-	adrp	x2, .LANCHOR69
-	ldr	x3, [x0, #:lo12:.LANCHOR60]
-	adrp	x0, .LANCHOR79
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR5
+	adrp	x2, .LANCHOR72
+	ldr	x3, [x0, #:lo12:.LANCHOR5]
+	adrp	x0, .LANCHOR80
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	mul	w0, w0, w2
 	cmp	w1, w0
-	bge	.L624
+	bge	.L772
 	add	x3, x3, 16
-.L625:
+.L773:
 	ldrb	w2, [x3, 9]
 	sdiv	w4, w1, w2
 	msub	w1, w4, w2, w1
@@ -3651,25 +4531,25 @@ ftl_get_ppa_from_index:
 	ldrh	w0, [x1, 16]
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L626
+	bne	.L774
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR80
+	adrp	x1, .LANCHOR103
 	adrp	x0, .LC0
-	mov	w2, 837
+	mov	w2, 1385
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR80
+	add	x1, x1, :lo12:.LANCHOR103
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L627:
-	b	.L627
-.L624:
+.L775:
+	b	.L775
+.L772:
 	sub	w1, w1, w0
 	add	x3, x3, 48
 	and	w1, w1, 65535
-	b	.L625
-.L626:
-	adrp	x1, .LANCHOR75
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	b	.L773
+.L774:
+	adrp	x1, .LANCHOR99
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	madd	w0, w1, w0, w4
 	ret
 	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
@@ -3679,29 +4559,29 @@ ftl_get_ppa_from_index:
 	.type	lpa_hash_get_ppa, %function
 lpa_hash_get_ppa:
 	and	x2, x0, 255
-	adrp	x1, .LANCHOR81
-	add	x1, x1, :lo12:.LANCHOR81
+	adrp	x1, .LANCHOR104
+	add	x1, x1, :lo12:.LANCHOR104
 	mov	w3, 65535
 	ldrh	w1, [x1, x2, lsl 1]
-	adrp	x2, .LANCHOR82
-	ldr	x4, [x2, #:lo12:.LANCHOR82]
-	adrp	x2, .LANCHOR83
-	ldr	x5, [x2, #:lo12:.LANCHOR83]
-.L632:
+	adrp	x2, .LANCHOR105
+	ldr	x4, [x2, #:lo12:.LANCHOR105]
+	adrp	x2, .LANCHOR106
+	ldr	x5, [x2, #:lo12:.LANCHOR106]
+.L780:
 	cmp	w1, w3
-	bne	.L634
+	bne	.L782
 	mov	w0, -1
 	ret
-.L634:
+.L782:
 	uxtw	x2, w1
 	ldr	w6, [x4, x2, lsl 2]
 	cmp	w0, w6
-	bne	.L633
+	bne	.L781
 	mov	w0, w1
 	b	ftl_get_ppa_from_index
-.L633:
+.L781:
 	ldrh	w1, [x5, x2, lsl 1]
-	b	.L632
+	b	.L780
 	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
 	.section	.text.ftl_get_new_free_page,"ax",@progbits
 	.align	2
@@ -3714,56 +4594,56 @@ ftl_get_new_free_page:
 	add	x29, sp, 0
 	ldrh	w0, [x0]
 	cmp	w0, w2
-	bne	.L636
-	adrp	x1, .LANCHOR84
+	bne	.L784
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 948
-	add	x1, x1, :lo12:.LANCHOR84
+	mov	w2, 1500
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L637:
-	b	.L637
-.L636:
-	adrp	x0, .LANCHOR79
+.L785:
+	b	.L785
+.L784:
+	adrp	x0, .LANCHOR80
 	ldrh	w3, [x1, 2]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	cmp	w3, w0
-	bne	.L638
-	adrp	x1, .LANCHOR84
+	bne	.L786
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 949
-	add	x1, x1, :lo12:.LANCHOR84
+	mov	w2, 1501
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L639:
-	b	.L639
-.L638:
+.L787:
+	b	.L787
+.L786:
 	ldrh	w4, [x1, 6]
-	cbnz	w4, .L640
-	adrp	x1, .LANCHOR84
+	cbnz	w4, .L788
+	adrp	x1, .LANCHOR107
 	adrp	x0, .LC0
-	mov	w2, 950
-	add	x1, x1, :lo12:.LANCHOR84
+	mov	w2, 1502
+	add	x1, x1, :lo12:.LANCHOR107
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L641:
-	b	.L641
-.L640:
+.L789:
+	b	.L789
+.L788:
 	ldrb	w0, [x1, 5]
 	mov	w3, w2
 	add	x0, x0, 8
 	ldrh	w5, [x1, x0, lsl 1]
-	adrp	x0, .LANCHOR69
-	ldrb	w6, [x0, #:lo12:.LANCHOR69]
-.L642:
+	adrp	x0, .LANCHOR72
+	ldrb	w6, [x0, #:lo12:.LANCHOR72]
+.L790:
 	cmp	w5, w3
 	ldrb	w2, [x1, 5]
-	beq	.L644
-	adrp	x0, .LANCHOR75
+	beq	.L792
+	adrp	x0, .LANCHOR99
 	sub	w4, w4, #1
 	strh	w4, [x1, 6]
 	add	w2, w2, 1
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
 	and	w2, w2, 255
 	ldrh	w4, [x1, 10]
 	cmp	w6, w2
@@ -3773,28 +4653,28 @@ ftl_get_new_free_page:
 	mul	w0, w0, w5
 	strh	w4, [x1, 10]
 	orr	w0, w0, w3
-	bne	.L635
+	bne	.L783
 	add	w3, w3, 1
 	strb	wzr, [x1, 5]
 	strh	w3, [x1, 2]
-.L635:
+.L783:
 	ldp	x29, x30, [sp], 16
 	ret
-.L644:
+.L792:
 	add	w2, w2, 1
 	and	w2, w2, 255
 	strb	w2, [x1, 5]
 	cmp	w2, w6
-	bne	.L643
+	bne	.L791
 	ldrh	w0, [x1, 2]
 	strb	wzr, [x1, 5]
 	add	w0, w0, 1
 	strh	w0, [x1, 2]
-.L643:
+.L791:
 	ldrb	w0, [x1, 5]
 	add	x0, x0, 8
 	ldrh	w5, [x1, x0, lsl 1]
-	b	.L642
+	b	.L790
 	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
 	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
 	.align	2
@@ -3810,23 +4690,23 @@ ftl_ext_alloc_new_blk:
 	mov	w19, w1
 	sub	w1, w1, #1
 	cmp	w2, w1, uxth
-	bcs	.L648
-	adrp	x1, .LANCHOR85
+	bcs	.L796
+	adrp	x1, .LANCHOR108
 	adrp	x0, .LC0
-	mov	w2, 981
-	add	x1, x1, :lo12:.LANCHOR85
+	mov	w2, 1533
+	add	x1, x1, :lo12:.LANCHOR108
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L649:
-	b	.L649
-.L648:
-	adrp	x20, .LANCHOR46
+.L797:
+	b	.L797
+.L796:
+	adrp	x20, .LANCHOR53
 	mov	w1, 0
 	bl	ftl_erase_phy_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldr	x0, [x20, #:lo12:.LANCHOR53]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sys_blk
-	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldr	x0, [x20, #:lo12:.LANCHOR53]
 	strh	w19, [x0, 130]
 	strh	wzr, [x0, 140]
 	mov	w0, 0
@@ -3839,51 +4719,58 @@ ftl_ext_alloc_new_blk:
 	.global	ftl_total_vpn_update
 	.type	ftl_total_vpn_update, %function
 ftl_total_vpn_update:
-	adrp	x2, .LANCHOR86
+	adrp	x2, .LANCHOR109
 	mov	x3, x2
-	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	ldrh	w1, [x2, #:lo12:.LANCHOR109]
 	cmp	w1, 4
-	bhi	.L652
-	cbnz	w0, .L652
+	bhi	.L800
+	cbnz	w0, .L800
 	add	w1, w1, 1
-	strh	w1, [x2, #:lo12:.LANCHOR86]
+	strh	w1, [x2, #:lo12:.LANCHOR109]
 	ret
-.L652:
-	adrp	x0, .LANCHOR54
-	strh	wzr, [x3, #:lo12:.LANCHOR86]
-	mov	w1, 0
+.L800:
+	adrp	x0, .LANCHOR2
+	strh	wzr, [x3, #:lo12:.LANCHOR109]
+	mov	x1, 0
 	mov	w2, 0
-	ldrh	w5, [x0, #:lo12:.LANCHOR54]
-	adrp	x0, .LANCHOR56
+	ldrh	w5, [x0, #:lo12:.LANCHOR2]
+	adrp	x0, .LANCHOR4
 	mov	w8, 65535
-	ldr	x6, [x0, #:lo12:.LANCHOR56]
-	adrp	x0, .LANCHOR59
-	ldr	x7, [x0, #:lo12:.LANCHOR59]
-	mov	x0, 0
-.L654:
-	cmp	w5, w0, uxth
-	bhi	.L657
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	str	w2, [x0, 524]
-	str	w1, [x0, 528]
+	ldr	x6, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR3
+	ldr	x7, [x0, #:lo12:.LANCHOR3]
+	mov	w0, 0
+.L802:
+	cmp	w5, w1, uxth
+	bhi	.L805
+	adrp	x1, .LANCHOR5
+	ldr	x1, [x1, #:lo12:.LANCHOR5]
+	str	w2, [x1, 524]
+	adrp	x2, .LANCHOR53
+	str	w0, [x1, 528]
+	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	ldrh	w2, [x2, 120]
+	cbz	w2, .L799
+	udiv	w0, w0, w2
+	str	w0, [x1, 532]
+.L799:
 	ret
-.L657:
-	ldrh	w3, [x6, x0, lsl 1]
+.L805:
+	ldrh	w3, [x6, x1, lsl 1]
 	cmp	w3, w8
-	beq	.L655
-	add	x4, x7, x0, lsl 2
+	beq	.L803
+	add	x4, x7, x1, lsl 2
 	ldrb	w4, [x4, 2]
 	and	w4, w4, 224
 	cmp	w4, 160
-	bne	.L656
-	add	w1, w1, w3
-.L655:
-	add	x0, x0, 1
-	b	.L654
-.L656:
+	bne	.L804
+	add	w0, w0, w3
+.L803:
+	add	x1, x1, 1
+	b	.L802
+.L804:
 	add	w2, w2, w3
-	b	.L655
+	b	.L803
 	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
 	.section	.text.ftl_debug_info_fill,"ax",@progbits
 	.align	2
@@ -3898,12 +4785,20 @@ ftl_debug_info_fill:
 	.global	ftl_vpn_update
 	.type	ftl_vpn_update, %function
 ftl_vpn_update:
-	adrp	x1, .LANCHOR56
-	ubfiz	x0, x0, 1, 16
-	ldr	x1, [x1, #:lo12:.LANCHOR56]
-	ldrh	w0, [x1, x0]
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	and	w19, w0, 65535
+	mov	w0, w19
+	bl	zftl_list_update_data_list
+	adrp	x0, .LANCHOR4
+	ubfiz	x19, x19, 1, 16
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x19]
+	ldr	x19, [sp, 16]
 	cmp	w0, 0
 	cset	w0, eq
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_vpn_update, .-ftl_vpn_update
 	.section	.text.ftl_vpn_decrement,"ax",@progbits
@@ -3911,45 +4806,47 @@ ftl_vpn_update:
 	.global	ftl_vpn_decrement
 	.type	ftl_vpn_decrement, %function
 ftl_vpn_decrement:
-	stp	x29, x30, [sp, -16]!
-	and	w3, w0, 65535
-	mov	w0, 65535
-	cmp	w3, w0
+	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
-	beq	.L661
-	adrp	x0, .LANCHOR56
-	ubfiz	x1, x3, 1, 16
-	ldr	x2, [x0, #:lo12:.LANCHOR56]
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L814
+	adrp	x0, .LANCHOR4
+	ubfiz	x1, x19, 1, 16
+	ldr	x2, [x0, #:lo12:.LANCHOR4]
 	ldrh	w0, [x2, x1]
-	cbnz	w0, .L662
-	adrp	x0, .LC17
+	cbnz	w0, .L815
+	adrp	x0, .LC20
 	mov	w2, 0
-	mov	w1, w3
-	add	x0, x0, :lo12:.LC17
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC20
 	bl	printf
-.L665:
+.L818:
 	mov	w0, 0
-	b	.L660
-.L662:
+	b	.L813
+.L815:
 	sub	w0, w0, #1
 	strh	w0, [x2, x1]
-.L661:
-	adrp	x2, .LANCHOR87
-	ldrh	w0, [x2, #:lo12:.LANCHOR87]
-	cmp	w3, w0
-	beq	.L665
+.L814:
+	adrp	x20, .LANCHOR110
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+	cmp	w19, w0
+	beq	.L818
 	mov	w1, 65535
 	cmp	w0, w1
-	bne	.L664
-	strh	w3, [x2, #:lo12:.LANCHOR87]
-	b	.L665
-.L664:
+	bne	.L817
+	strh	w19, [x20, #:lo12:.LANCHOR110]
+	b	.L818
+.L817:
 	bl	ftl_vpn_update
 	cmp	w0, 0
 	cset	w0, ne
-	strh	w3, [x2, #:lo12:.LANCHOR87]
-.L660:
-	ldp	x29, x30, [sp], 16
+	strh	w19, [x20, #:lo12:.LANCHOR110]
+.L813:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
 	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
 	.section	.text.lpa_hash_update_ppa,"ax",@progbits
@@ -3957,50 +4854,50 @@ ftl_vpn_decrement:
 	.global	lpa_hash_update_ppa
 	.type	lpa_hash_update_ppa, %function
 lpa_hash_update_ppa:
-	adrp	x3, .LANCHOR81
+	adrp	x3, .LANCHOR104
 	and	x5, x0, 255
-	add	x4, x3, :lo12:.LANCHOR81
+	add	x4, x3, :lo12:.LANCHOR104
 	mov	w7, 65535
 	and	w2, w2, 65535
 	mov	w12, w7
 	ldrh	w6, [x4, x5, lsl 1]
-	adrp	x4, .LANCHOR82
-	ldr	x8, [x4, #:lo12:.LANCHOR82]
-	adrp	x4, .LANCHOR83
-	ldr	x4, [x4, #:lo12:.LANCHOR83]
-.L668:
+	adrp	x4, .LANCHOR105
+	ldr	x8, [x4, #:lo12:.LANCHOR105]
+	adrp	x4, .LANCHOR106
+	ldr	x4, [x4, #:lo12:.LANCHOR106]
+.L821:
 	cmp	w6, w12
-	beq	.L672
+	beq	.L825
 	uxtw	x11, w6
 	lsl	x10, x11, 2
 	add	x13, x8, x10
 	ldr	w10, [x8, x10]
 	cmp	w0, w10
 	lsl	x10, x11, 1
-	bne	.L669
+	bne	.L822
 	mov	w6, -1
 	str	w6, [x13]
 	cmp	w7, w12
-	bne	.L670
-	add	x6, x3, :lo12:.LANCHOR81
+	bne	.L823
+	add	x6, x3, :lo12:.LANCHOR104
 	ldrh	w7, [x4, x10]
 	strh	w7, [x6, x5, lsl 1]
-.L671:
+.L824:
 	mov	w6, -1
 	strh	w6, [x4, x11, lsl 1]
-.L672:
+.L825:
 	uxtw	x6, w2
-	add	x3, x3, :lo12:.LANCHOR81
+	add	x3, x3, :lo12:.LANCHOR104
 	cmn	w1, #1
 	str	w0, [x8, x6, lsl 2]
 	ldrh	w0, [x3, x5, lsl 1]
 	strh	w2, [x3, x5, lsl 1]
 	strh	w0, [x4, x6, lsl 1]
-	beq	.L679
+	beq	.L832
 	stp	x29, x30, [sp, -16]!
-	adrp	x0, .LANCHOR71
+	adrp	x0, .LANCHOR96
 	add	x29, sp, 0
-	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
 	sub	w2, w0, w3
 	mov	w0, 1
@@ -4008,22 +4905,22 @@ lpa_hash_update_ppa:
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w1, w0, w1
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w0, w1, w0
 	bl	ftl_vpn_decrement
 	mov	w0, -1
 	ldp	x29, x30, [sp], 16
 	ret
-.L670:
+.L823:
 	ldrh	w6, [x4, x10]
 	strh	w6, [x4, w7, uxtw 1]
-	b	.L671
-.L669:
+	b	.L824
+.L822:
 	mov	w7, w6
 	ldrh	w6, [x4, x10]
-	b	.L668
-.L679:
+	b	.L821
+.L832:
 	mov	w0, -1
 	ret
 	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
@@ -4035,26 +4932,26 @@ ftl_write_completed:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR88
+	adrp	x20, .LANCHOR111
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR36
-	adrp	x22, .LANCHOR71
-	add	x20, x20, :lo12:.LANCHOR88
-	add	x19, x19, :lo12:.LANCHOR36
-	add	x22, x22, :lo12:.LANCHOR71
+	adrp	x19, .LANCHOR43
+	adrp	x22, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR111
+	add	x19, x19, :lo12:.LANCHOR43
+	add	x22, x22, :lo12:.LANCHOR96
 	stp	x23, x24, [sp, 48]
 	str	x25, [sp, 64]
-.L683:
+.L836:
 	ldrb	w0, [x20]
 	cmp	w0, 255
-	bne	.L689
+	bne	.L842
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldr	x25, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	ret
-.L689:
+.L842:
 	ubfiz	x21, x0, 6, 8
 	sbfiz	x0, x0, 6, 32
 	add	x23, x19, x0
@@ -4063,7 +4960,7 @@ ftl_write_completed:
 	strb	w0, [x20]
 	ldr	w0, [x23, 52]
 	cmn	w0, #1
-	bne	.L684
+	bne	.L837
 	ldp	w2, w3, [x23, 36]
 	mov	w1, 21
 	ldrh	w0, [x22]
@@ -4073,11 +4970,11 @@ ftl_write_completed:
 	lsl	w1, w25, w1
 	sub	w1, w1, #1
 	and	w1, w1, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w1, w1, w0
-	adrp	x0, .LC18
-	add	x0, x0, :lo12:.LC18
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
 	and	w24, w1, 65535
 	mov	w1, w24
 	bl	printf
@@ -4085,36 +4982,39 @@ ftl_write_completed:
 	mov	w2, 0
 	mov	w0, w24
 	bl	gc_add_sblk
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 556]
+	add	w1, w1, w25
+	str	w1, [x0, 556]
 	ldrh	w1, [x0, 16]
 	cmp	w1, w24
-	bne	.L685
+	bne	.L838
 	strh	wzr, [x0, 22]
-.L686:
+.L839:
 	mov	x0, x21
 	bl	ftl_write_buf
-	b	.L683
-.L685:
+	b	.L836
+.L838:
 	ldrh	w1, [x0, 48]
 	cmp	w1, w24
-	bne	.L686
+	bne	.L839
 	strh	wzr, [x0, 54]
-	b	.L686
-.L684:
+	b	.L839
+.L837:
 	ldrh	w2, [x23, 48]
 	ldr	w0, [x23, 36]
 	ldr	w1, [x23, 44]
 	bl	lpa_hash_update_ppa
 	ldrb	w0, [x23, 2]
-	tbz	x0, 2, .L688
+	tbz	x0, 2, .L841
 	and	w0, w0, -3
 	strb	w0, [x23, 2]
-	b	.L683
-.L688:
+	b	.L836
+.L841:
 	mov	x0, x21
 	bl	buf_free
-	b	.L683
+	b	.L836
 	.size	ftl_write_completed, .-ftl_write_completed
 	.section	.text.ftl_mask_bad_block,"ax",@progbits
 	.align	2
@@ -4122,10 +5022,10 @@ ftl_write_completed:
 	.type	ftl_mask_bad_block, %function
 ftl_mask_bad_block:
 	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR71
+	adrp	x1, .LANCHOR96
 	mov	w2, 21
 	add	x29, sp, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	ldrh	w3, [x1, #:lo12:.LANCHOR96]
 	stp	x19, x20, [sp, 16]
 	ubfx	x20, x0, 21, 3
 	sub	w1, w2, w3
@@ -4134,32 +5034,32 @@ ftl_mask_bad_block:
 	lsl	w2, w2, w1
 	sub	w2, w2, #1
 	and	w2, w2, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
 	udiv	w2, w2, w0
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	and	w19, w2, 255
-	tbz	x0, 14, .L692
-	adrp	x0, .LC19
+	tbz	x0, 14, .L845
+	adrp	x0, .LC22
 	mov	w2, w19
 	mov	w1, w20
-	add	x0, x0, :lo12:.LC19
+	add	x0, x0, :lo12:.LC22
 	bl	printf
-.L692:
-	adrp	x0, .LANCHOR54
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+.L845:
+	adrp	x0, .LANCHOR2
+	ldrh	w0, [x0, #:lo12:.LANCHOR2]
 	cmp	w0, w19
-	bls	.L691
-	adrp	x0, .LANCHOR59
+	bls	.L844
+	adrp	x0, .LANCHOR3
 	mov	w1, 1
 	lsl	w1, w1, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, uxtb 2
 	ldrb	w0, [x19, 3]
 	orr	w1, w1, w0
 	strb	w1, [x19, 3]
-.L691:
+.L844:
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
@@ -4170,44 +5070,52 @@ ftl_mask_bad_block:
 	.type	print_ftl_debug_info, %function
 print_ftl_debug_info:
 	sub	sp, sp, #64
-	adrp	x1, .LANCHOR60
+	adrp	x1, .LANCHOR86
+	adrp	x0, .LANCHOR5
+	adrp	x7, .LANCHOR54
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
-	ldr	x7, [x1, #:lo12:.LANCHOR60]
+	ldrh	w6, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w7, [x7, #:lo12:.LANCHOR54]
+	ldrh	w5, [x1, #:lo12:.LANCHOR82]
+	adrp	x1, .LANCHOR84
+	str	w7, [sp, 8]
+	ldrh	w4, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR93
+	ldr	w7, [x0, 528]
+	ldrh	w3, [x1, #:lo12:.LANCHOR93]
+	adrp	x1, .LANCHOR91
+	str	w7, [sp]
+	ldrh	w2, [x1, #:lo12:.LANCHOR91]
+	adrp	x1, .LANCHOR89
+	ldr	w7, [x0, 524]
+	adrp	x0, .LC23
+	ldrh	w1, [x1, #:lo12:.LANCHOR89]
+	add	x0, x0, :lo12:.LC23
 	str	x19, [sp, 48]
-	adrp	x19, .LANCHOR46
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	ldrh	w6, [x0, 120]
-	ldrh	w5, [x0, 124]
-	ldrh	w4, [x0, 122]
-	ldrh	w3, [x0, 116]
-	ldrh	w2, [x0, 118]
-	ldrh	w1, [x0, 114]
-	ldr	w0, [x7, 528]
-	str	w0, [sp]
-	adrp	x0, .LC20
-	add	x0, x0, :lo12:.LC20
-	ldr	w7, [x7, 524]
+	adrp	x19, .LANCHOR53
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	adrp	x1, .LANCHOR89
-	ldrb	w3, [x1, #:lo12:.LANCHOR89]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	adrp	x1, .LANCHOR112
+	ldrb	w3, [x1, #:lo12:.LANCHOR112]
 	ldr	w4, [x0, 8]
 	ldr	w5, [x0, 64]
 	ldr	w1, [x0, 20]
 	ldr	w2, [x0, 28]
-	adrp	x0, .LC21
-	add	x0, x0, :lo12:.LC21
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
 	ldr	w1, [x0, 52]
 	ldr	w2, [x0, 60]
 	ldr	w3, [x0, 16]
-	adrp	x0, .LC22
-	add	x0, x0, :lo12:.LC22
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
 	lsr	w3, w3, 11
 	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
 	ldrh	w2, [x0, 98]
 	ldrh	w6, [x0, 72]
 	ldrh	w5, [x0, 96]
@@ -4220,28 +5128,110 @@ print_ftl_debug_info:
 	ldrh	w2, [x0, 90]
 	str	w2, [sp]
 	ldp	w7, w2, [x0, 80]
-	adrp	x0, .LC23
-	add	x0, x0, :lo12:.LC23
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
 	bl	printf
 	ldr	x19, [sp, 48]
+	adrp	x0, .LANCHOR73
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 64
-	ret
+	ldrh	w5, [x0, #:lo12:.LANCHOR73]
+	adrp	x0, .LANCHOR79
+	ldrh	w4, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR62
+	ldrh	w3, [x0, #:lo12:.LANCHOR62]
+	adrp	x0, .LANCHOR88
+	ldrh	w2, [x0, #:lo12:.LANCHOR88]
+	adrp	x0, .LANCHOR85
+	ldrh	w1, [x0, #:lo12:.LANCHOR85]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	b	printf
 	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	stp	x29, x30, [sp, -48]!
+	cmp	w0, 5
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 65535
+	stp	x19, x20, [sp, 16]
+	cset	w21, eq
+	mov	w1, w22
+	mov	w20, w0
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w19, w0, 65535
+	mov	w1, 65535
+	cmp	w19, w1
+	beq	.L855
+	adrp	x1, .LANCHOR3
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	add	x19, x1, x19, uxth 2
+	ldrb	w2, [x19, 2]
+	tst	w2, 224
+	beq	.L856
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LC0
+	mov	w2, 752
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L857:
+	b	.L857
+.L856:
+	bfi	w2, w20, 5, 3
+	lsl	w21, w21, 1
+	ubfx	x1, x2, 3, 2
+	orr	w21, w21, w1
+	bfi	w2, w21, 3, 2
+	strb	w2, [x19, 2]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L855:
+	bl	print_ftl_debug_info
+	adrp	x21, .LC28
+	mov	w2, w20
+	add	x21, x21, :lo12:.LC28
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	mov	w1, w22
+	mov	w0, 0
+	bl	zftl_get_free_sblk
+	and	w1, w0, 65535
+	mov	w2, w20
+	mov	x0, x21
+	bl	printf
+	bl	dump_all_list_info
+	adrp	x1, .LANCHOR113
+	adrp	x0, .LC0
+	mov	w2, 762
+	add	x1, x1, :lo12:.LANCHOR113
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L858:
+	b	.L858
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
 	.section	.text.sblk_init,"ax",@progbits
 	.align	2
 	.global	sblk_init
 	.type	sblk_init, %function
 sblk_init:
-	adrp	x1, .LANCHOR90
+	adrp	x1, .LANCHOR114
 	mov	w0, -1
-	strb	w0, [x1, #:lo12:.LANCHOR90]
-	adrp	x1, .LANCHOR88
-	strb	w0, [x1, #:lo12:.LANCHOR88]
-	adrp	x1, .LANCHOR51
-	strb	w0, [x1, #:lo12:.LANCHOR51]
-	adrp	x1, .LANCHOR62
-	strb	w0, [x1, #:lo12:.LANCHOR62]
+	strb	w0, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR111
+	strb	w0, [x1, #:lo12:.LANCHOR111]
+	adrp	x1, .LANCHOR58
+	strb	w0, [x1, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR65
+	strb	w0, [x1, #:lo12:.LANCHOR65]
 	mov	w0, 0
 	ret
 	.size	sblk_init, .-sblk_init
@@ -4251,25 +5241,25 @@ sblk_init:
 	.type	dump_sblk_queue, %function
 dump_sblk_queue:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LC24
-	add	x0, x0, :lo12:.LC24
+	adrp	x0, .LC29
+	add	x0, x0, :lo12:.LC29
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR90
+	adrp	x19, .LANCHOR114
 	str	x21, [sp, 32]
-	ldrb	w1, [x19, #:lo12:.LANCHOR90]
+	ldrb	w1, [x19, #:lo12:.LANCHOR114]
 	bl	printf
-	ldrb	w19, [x19, #:lo12:.LANCHOR90]
+	ldrb	w19, [x19, #:lo12:.LANCHOR114]
 	cmp	w19, 255
-	beq	.L701
-	adrp	x1, .LANCHOR36
+	beq	.L863
+	adrp	x1, .LANCHOR43
 	ubfiz	x19, x19, 6, 8
-	add	x1, x1, :lo12:.LANCHOR36
-	adrp	x21, .LC25
+	add	x1, x1, :lo12:.LANCHOR43
+	adrp	x21, .LC30
 	add	x19, x1, x19
-	add	x21, x21, :lo12:.LC25
+	add	x21, x21, :lo12:.LC30
 	mov	x20, x1
-.L703:
+.L865:
 	ldrb	w2, [x19, 58]
 	mov	x0, x21
 	ldrb	w1, [x19, 1]
@@ -4277,11 +5267,11 @@ dump_sblk_queue:
 	bl	printf
 	ldrb	w19, [x19]
 	cmp	w19, 255
-	beq	.L701
+	beq	.L863
 	ubfiz	x19, x19, 6, 8
 	add	x19, x20, x19
-	b	.L703
-.L701:
+	b	.L865
+.L863:
 	ldp	x19, x20, [sp, 16]
 	ldr	x21, [sp, 32]
 	ldp	x29, x30, [sp], 48
@@ -4292,86 +5282,86 @@ dump_sblk_queue:
 	.global	queue_lun_state
 	.type	queue_lun_state, %function
 queue_lun_state:
-	adrp	x2, .LANCHOR90
-	ldrb	w2, [x2, #:lo12:.LANCHOR90]
+	adrp	x2, .LANCHOR114
+	ldrb	w2, [x2, #:lo12:.LANCHOR114]
 	cmp	w2, 255
-	beq	.L720
-	adrp	x3, .LANCHOR71
-	adrp	x7, .LANCHOR36
-	add	x7, x7, :lo12:.LANCHOR36
-	adrp	x10, .L716
-	ldrh	w8, [x3, #:lo12:.LANCHOR71]
+	beq	.L882
+	adrp	x3, .LANCHOR96
+	adrp	x7, .LANCHOR43
+	add	x7, x7, :lo12:.LANCHOR43
+	adrp	x10, .L878
+	ldrh	w8, [x3, #:lo12:.LANCHOR96]
 	mov	w3, 21
 	ubfx	x11, x0, 21, 3
-	add	x10, x10, :lo12:.L716
+	add	x10, x10, :lo12:.L878
 	sub	w4, w3, w8
 	mov	w3, 1
 	mov	x12, x7
 	lsl	w3, w3, w4
-	adrp	x4, .LANCHOR70
+	adrp	x4, .LANCHOR95
 	sub	w3, w3, #1
-	ldrb	w6, [x4, #:lo12:.LANCHOR70]
+	ldrb	w6, [x4, #:lo12:.LANCHOR95]
 	and	w3, w3, 65535
 	asr	w4, w0, w8
 	sub	w6, w6, #1
 	and	w6, w6, 65535
 	and	w4, w4, w6
 	and	w4, w4, w3
-.L719:
+.L881:
 	add	x0, x7, x2, lsl 6
 	ldr	w5, [x0, 40]
 	ubfx	x13, x5, 21, 3
 	cmp	w11, w13
-	bne	.L713
+	bne	.L875
 	lsr	w5, w5, w8
 	and	w5, w6, w5
 	and	w5, w3, w5
 	ldrb	w0, [x0, 58]
 	cmp	w4, w5
-	bne	.L714
+	bne	.L876
 	cmp	w1, 1
-	bne	.L711
+	bne	.L873
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L713
+	beq	.L875
 	ret
-.L714:
+.L876:
 	cmp	w1, 3
-	bhi	.L713
+	bhi	.L875
 	ldrb	w5, [x10,w1,uxtw]
-	adr	x13, .Lrtx716
+	adr	x13, .Lrtx878
 	add	x5, x13, w5, sxtb #2
 	br	x5
-.Lrtx716:
+.Lrtx878:
 	.section	.rodata.queue_lun_state,"a",@progbits
 	.align	0
 	.align	2
-.L716:
-	.byte	(.L715 - .Lrtx716) / 4
-	.byte	(.L717 - .Lrtx716) / 4
-	.byte	(.L718 - .Lrtx716) / 4
-	.byte	(.L711 - .Lrtx716) / 4
+.L878:
+	.byte	(.L877 - .Lrtx878) / 4
+	.byte	(.L879 - .Lrtx878) / 4
+	.byte	(.L880 - .Lrtx878) / 4
+	.byte	(.L873 - .Lrtx878) / 4
 	.section	.text.queue_lun_state
-.L715:
+.L877:
 	cmp	w0, 2
-	beq	.L713
+	beq	.L875
 	ret
-.L717:
+.L879:
 	cmp	w0, 6
 	ccmp	w0, 8, 4, ne
-	beq	.L713
+	beq	.L875
 	ret
-.L718:
+.L880:
 	cmp	w0, 10
-	bne	.L711
-.L713:
+	bne	.L873
+.L875:
 	lsl	x2, x2, 6
 	ldrb	w2, [x12, x2]
 	cmp	w2, 255
-	bne	.L719
-.L720:
+	bne	.L881
+.L882:
 	mov	w0, 0
-.L711:
+.L873:
 	ret
 	.size	queue_lun_state, .-queue_lun_state
 	.section	.text.queue_remove_completed_req,"ax",@progbits
@@ -4379,68 +5369,68 @@ queue_lun_state:
 	.global	queue_remove_completed_req
 	.type	queue_remove_completed_req, %function
 queue_remove_completed_req:
-	adrp	x6, .LANCHOR90
-	ldrb	w2, [x6, #:lo12:.LANCHOR90]
+	adrp	x6, .LANCHOR114
+	ldrb	w2, [x6, #:lo12:.LANCHOR114]
 	cmp	w2, 255
-	beq	.L722
-	adrp	x0, .LANCHOR36
+	beq	.L884
+	adrp	x0, .LANCHOR43
 	lsl	x4, x2, 6
-	add	x5, x0, :lo12:.LANCHOR36
+	add	x5, x0, :lo12:.LANCHOR43
 	add	x3, x5, x4
 	ldrb	w1, [x3, 58]
 	sub	w1, w1, #11
 	and	w1, w1, 255
 	cmp	w1, 1
 	mov	x1, x0
-	bhi	.L722
+	bhi	.L884
 	ldrb	w0, [x5, x4]
-	strb	w0, [x6, #:lo12:.LANCHOR90]
+	strb	w0, [x6, #:lo12:.LANCHOR114]
 	mov	w0, -1
 	strb	w0, [x5, x4]
 	ldrb	w0, [x3, 59]
 	cmp	w0, 1
-	bne	.L724
+	bne	.L886
 	ldrh	w0, [x3, 50]
-	cbnz	w0, .L725
-	adrp	x0, .LANCHOR88
-	ldrb	w3, [x0, #:lo12:.LANCHOR88]
-	add	x0, x0, :lo12:.LANCHOR88
-.L726:
+	cbnz	w0, .L887
+	adrp	x0, .LANCHOR111
+	ldrb	w3, [x0, #:lo12:.LANCHOR111]
+	add	x0, x0, :lo12:.LANCHOR111
+.L888:
 	cmp	w3, 255
-	bne	.L730
-	add	x1, x1, :lo12:.LANCHOR36
+	bne	.L892
+	add	x1, x1, :lo12:.LANCHOR43
 	add	x1, x1, x2, lsl 6
 	ldrb	w1, [x1, 1]
 	strb	w1, [x0]
 	ret
-.L725:
-	adrp	x0, .LANCHOR62
-	ldrb	w3, [x0, #:lo12:.LANCHOR62]
-	add	x0, x0, :lo12:.LANCHOR62
-	b	.L726
-.L724:
-	cbnz	w0, .L722
+.L887:
+	adrp	x0, .LANCHOR65
+	ldrb	w3, [x0, #:lo12:.LANCHOR65]
+	add	x0, x0, :lo12:.LANCHOR65
+	b	.L888
+.L886:
+	cbnz	w0, .L884
 	ldr	w0, [x3, 36]
 	cmn	w0, #1
-	beq	.L722
-	adrp	x0, .LANCHOR51
-	ldrb	w3, [x0, #:lo12:.LANCHOR51]
-	add	x0, x0, :lo12:.LANCHOR51
-	b	.L726
-.L730:
-	add	x0, x1, :lo12:.LANCHOR36
-.L737:
+	beq	.L884
+	adrp	x0, .LANCHOR58
+	ldrb	w3, [x0, #:lo12:.LANCHOR58]
+	add	x0, x0, :lo12:.LANCHOR58
+	b	.L888
+.L892:
+	add	x0, x1, :lo12:.LANCHOR43
+.L899:
 	mov	w1, w3
 	sbfiz	x3, x3, 6, 32
 	ldrb	w3, [x0, x3]
 	cmp	w3, 255
-	bne	.L737
+	bne	.L899
 	add	x2, x0, x2, lsl 6
 	sbfiz	x1, x1, 6, 32
 	ldrb	w2, [x2, 1]
 	strb	w2, [x0, x1]
 	ret
-.L722:
+.L884:
 	ret
 	.size	queue_remove_completed_req, .-queue_remove_completed_req
 	.section	.text.pm_alloc_new_blk,"ax",@progbits
@@ -4449,196 +5439,196 @@ queue_remove_completed_req:
 	.type	pm_alloc_new_blk, %function
 pm_alloc_new_blk:
 	stp	x29, x30, [sp, -64]!
-	adrp	x2, .LANCHOR69
+	adrp	x2, .LANCHOR72
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR46
+	adrp	x20, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	ldr	x1, [x20, #:lo12:.LANCHOR46]
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
+	ldrb	w2, [x2, #:lo12:.LANCHOR72]
 	ldrh	w0, [x1, 690]
 	str	x23, [sp, 48]
 	add	w0, w0, 1
 	and	w0, w0, 65535
 	strh	w0, [x1, 690]
 	cmp	w2, w0
-	bls	.L739
+	bls	.L901
 	add	x0, x1, x0, sxtw 1
 	ldrh	w1, [x0, 672]
 	mov	w0, 65535
 	cmp	w1, w0
-	bne	.L740
-.L739:
-	adrp	x21, .LC26
-	add	x21, x21, :lo12:.LC26
-	adrp	x23, .LANCHOR59
-.L754:
+	bne	.L902
+.L901:
+	adrp	x21, .LC31
+	add	x21, x21, :lo12:.LC31
+	adrp	x23, .LANCHOR3
+.L916:
 	mov	w0, 1
 	bl	ftl_alloc_sblk
 	mov	w1, 0
 	and	w19, w0, 65535
 	bl	ftl_erase_sblk
-	add	x13, x20, :lo12:.LANCHOR46
-	ldr	x1, [x20, #:lo12:.LANCHOR46]
+	add	x13, x20, :lo12:.LANCHOR53
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
 	mov	w0, w19
 	add	x1, x1, 672
 	bl	ftl_get_blk_list_in_sblk
 	tst	w0, 65535
-	bne	.L741
+	bne	.L903
 	mov	w1, w19
 	mov	x0, x21
 	bl	printf
-	ldr	x0, [x23, #:lo12:.LANCHOR59]
+	ldr	x0, [x23, #:lo12:.LANCHOR3]
 	add	x19, x0, x19, uxth 2
 	ldrb	w0, [x19, 2]
 	orr	w0, w0, -32
 	strb	w0, [x19, 2]
-	b	.L754
-.L741:
+	b	.L916
+.L903:
 	ldr	x1, [x13]
-	adrp	x0, .LANCHOR91
+	adrp	x0, .LANCHOR115
 	mov	w2, 1
 	mov	w3, 65535
-	str	w2, [x0, #:lo12:.LANCHOR91]
+	str	w2, [x0, #:lo12:.LANCHOR115]
 	add	x2, x1, 416
 	mov	w0, 0
 	strh	wzr, [x1, 690]
-.L743:
+.L905:
 	ldrh	w4, [x2]
 	cmp	w4, w3
-	beq	.L742
+	beq	.L904
 	add	w0, w0, 1
 	add	x2, x2, 2
 	cmp	w0, 128
-	bne	.L743
-	adrp	x1, .LANCHOR92
+	bne	.L905
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
 	mov	w2, 188
-	add	x1, x1, :lo12:.LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L745:
-	b	.L745
-.L746:
-	adrp	x1, .LANCHOR71
+.L907:
+	b	.L907
+.L908:
+	adrp	x1, .LANCHOR96
 	mov	w2, 21
 	strh	wzr, [x0, 696]
-	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	ldrh	w1, [x1, #:lo12:.LANCHOR96]
 	strh	w3, [x0, 692]
 	sub	w2, w2, w1
 	asr	w4, w3, w2
 	strh	w4, [x0, 694]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L750
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L912
 	mov	w0, 1
 	and	w4, w4, 65535
 	lsl	w2, w0, w2
 	mov	w1, w3
-	adrp	x0, .LC27
+	adrp	x0, .LC32
 	sub	w2, w2, #1
-	add	x0, x0, :lo12:.LC27
+	add	x0, x0, :lo12:.LC32
 	bl	printf
-.L750:
+.L912:
 	mov	w0, 0
 	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 64
 	ret
-.L742:
+.L904:
 	add	x0, x1, x0, sxtw 1
 	strh	w19, [x0, 416]
 	ldrh	w0, [x1, 688]
 	add	w0, w0, 1
 	strh	w0, [x1, 688]
-.L740:
-	ldr	x0, [x20, #:lo12:.LANCHOR46]
+.L902:
+	ldr	x0, [x20, #:lo12:.LANCHOR53]
 	ldrh	w1, [x0, 690]
 	add	x1, x1, 336
 	ldrh	w3, [x0, x1, lsl 1]
 	mov	w1, 65533
 	sub	w2, w3, #1
 	cmp	w1, w2, uxth
-	bcs	.L746
-	adrp	x1, .LANCHOR92
+	bcs	.L908
+	adrp	x1, .LANCHOR116
 	adrp	x0, .LC0
 	mov	w2, 193
-	add	x1, x1, :lo12:.LANCHOR92
+	add	x1, x1, :lo12:.LANCHOR116
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L747:
-	b	.L747
+.L909:
+	b	.L909
 	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
 	.section	.text.pm_select_ram_region,"ax",@progbits
 	.align	2
 	.global	pm_select_ram_region
 	.type	pm_select_ram_region, %function
 pm_select_ram_region:
-	adrp	x1, .LANCHOR93
-	add	x1, x1, :lo12:.LANCHOR93
+	adrp	x1, .LANCHOR117
+	add	x1, x1, :lo12:.LANCHOR117
 	mov	x2, 0
 	mov	w3, 65535
-.L759:
+.L921:
 	lsl	x4, x2, 4
 	and	w0, w2, 65535
 	ldrh	w4, [x4, x1]
 	cmp	w4, w3
-	beq	.L758
+	beq	.L920
 	add	x2, x2, 1
 	cmp	x2, 32
-	bne	.L759
+	bne	.L921
 	add	x1, x1, 2
 	mov	w0, w2
 	mov	x3, x1
 	mov	w5, 32768
 	mov	w2, 0
-.L761:
+.L923:
 	ldrh	w4, [x3]
-	tbnz	x4, 15, .L760
+	tbnz	x4, 15, .L922
 	cmp	w4, w5
-	bcs	.L760
+	bcs	.L922
 	mov	w5, w4
 	mov	w0, w2
-.L760:
+.L922:
 	add	w2, w2, 1
 	add	x3, x3, 16
 	and	w2, w2, 65535
 	cmp	w2, 32
-	bne	.L761
+	bne	.L923
 	cmp	w0, 32
-	bne	.L758
-	adrp	x2, .LANCHOR94
+	bne	.L920
+	adrp	x2, .LANCHOR118
 	mov	w3, -1
-	ldrb	w4, [x2, #:lo12:.LANCHOR94]
+	ldrb	w4, [x2, #:lo12:.LANCHOR118]
 	mov	w2, 0
-.L763:
+.L925:
 	ldrh	w6, [x1]
 	cmp	w6, w3
-	bcs	.L762
+	bcs	.L924
 	ldrh	w5, [x1, -2]
 	cmp	w5, w4
 	csel	w3, w3, w6, eq
 	csel	w0, w0, w2, eq
-.L762:
+.L924:
 	add	w2, w2, 1
 	add	x1, x1, 16
 	and	w2, w2, 65535
 	cmp	w2, 32
-	bne	.L763
+	bne	.L925
 	cmp	w0, 32
-	bne	.L758
+	bne	.L920
 	stp	x29, x30, [sp, -16]!
-	adrp	x1, .LANCHOR95
+	adrp	x1, .LANCHOR119
 	adrp	x0, .LC0
 	mov	w2, 289
 	add	x29, sp, 0
-	add	x1, x1, :lo12:.LANCHOR95
+	add	x1, x1, :lo12:.LANCHOR119
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L764:
-	b	.L764
-.L758:
+.L926:
+	b	.L926
+.L920:
 	ret
 	.size	pm_select_ram_region, .-pm_select_ram_region
 	.section	.text.ftl_memset,"ax",@progbits
@@ -4657,60 +5647,60 @@ flash_lsb_page_tbl_build:
 	stp	x29, x30, [sp, -32]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR14
-	cbnz	w0, .L773
-	add	x1, x19, :lo12:.LANCHOR14
+	adrp	x19, .LANCHOR21
+	cbnz	w0, .L935
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	x0, 0
-.L774:
+.L936:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 256
-	bne	.L774
-.L780:
-	adrp	x20, .LANCHOR96
-	add	x20, x20, :lo12:.LANCHOR96
+	bne	.L936
+.L942:
+	adrp	x20, .LANCHOR120
+	add	x20, x20, :lo12:.LANCHOR120
 	mov	w2, 1024
 	mov	w1, 255
 	mov	x0, x20
-	add	x19, x19, :lo12:.LANCHOR14
+	add	x19, x19, :lo12:.LANCHOR21
 	bl	ftl_memset
 	mov	x0, 0
-.L775:
+.L937:
 	ldrh	w1, [x0, x19]
 	add	x0, x0, 2
 	cmp	x0, 512
 	strh	w1, [x20, w1, sxtw 1]
-	bne	.L775
+	bne	.L937
 	ldp	x19, x20, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
-.L773:
+.L935:
 	cmp	w0, 1
-	bne	.L776
-	add	x3, x19, :lo12:.LANCHOR14
+	bne	.L938
+	add	x3, x19, :lo12:.LANCHOR21
 	mov	x1, 0
-.L779:
+.L941:
 	and	w0, w1, 65535
 	cmp	x1, 3
-	bls	.L777
+	bls	.L939
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 2
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L777:
+.L939:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L779
-	b	.L780
-.L776:
+	bne	.L941
+	b	.L942
+.L938:
 	cmp	w0, 2
-	bne	.L781
-	add	x3, x19, :lo12:.LANCHOR14
+	bne	.L943
+	add	x3, x19, :lo12:.LANCHOR21
 	mov	w1, 65535
 	mov	x0, 0
-.L783:
+.L945:
 	cmp	x0, 2
 	and	w2, w0, 65535
 	csel	w2, w2, w1, cc
@@ -4719,35 +5709,35 @@ flash_lsb_page_tbl_build:
 	add	x0, x0, 1
 	and	w1, w1, 65535
 	cmp	x0, 256
-	bne	.L783
-	b	.L780
-.L781:
+	bne	.L945
+	b	.L942
+.L943:
 	cmp	w0, 3
-	bne	.L784
-	add	x3, x19, :lo12:.LANCHOR14
+	bne	.L946
+	add	x3, x19, :lo12:.LANCHOR21
 	mov	x1, 0
-.L787:
+.L949:
 	and	w0, w1, 65535
 	cmp	x1, 5
-	bls	.L785
+	bls	.L947
 	ubfiz	w2, w0, 1, 15
 	and	w0, w0, 1
 	add	w0, w0, 4
 	sub	w0, w2, w0
 	and	w0, w0, 65535
-.L785:
+.L947:
 	strh	w0, [x3, x1, lsl 1]
 	add	x1, x1, 1
 	cmp	x1, 256
-	bne	.L787
-	b	.L780
-.L784:
+	bne	.L949
+	b	.L942
+.L946:
 	cmp	w0, 4
-	bne	.L788
-	add	x1, x19, :lo12:.LANCHOR14
+	bne	.L950
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	w2, 1
 	add	x1, x1, 16
-	strh	wzr, [x19, #:lo12:.LANCHOR14]
+	strh	wzr, [x19, #:lo12:.LANCHOR21]
 	strh	w0, [x1, -8]
 	mov	w0, 5
 	strh	w2, [x1, -14]
@@ -4761,7 +5751,7 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1, -10]
 	strh	w0, [x1, -2]
 	mov	w0, 8
-.L790:
+.L952:
 	and	w3, w0, 1
 	ubfiz	w2, w0, 1, 15
 	add	w3, w3, 6
@@ -4770,37 +5760,37 @@ flash_lsb_page_tbl_build:
 	strh	w2, [x1], 2
 	and	w0, w0, 65535
 	cmp	w0, 256
-	bne	.L790
-	b	.L780
-.L788:
+	bne	.L952
+	b	.L942
+.L950:
 	cmp	w0, 5
-	bne	.L791
-	add	x1, x19, :lo12:.LANCHOR14
+	bne	.L953
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	x0, 0
-.L792:
+.L954:
 	strh	w0, [x1, x0, lsl 1]
 	add	x0, x0, 1
 	cmp	x0, 16
-	bne	.L792
+	bne	.L954
 	add	x1, x1, 32
-.L793:
+.L955:
 	strh	w0, [x1], 2
 	add	w0, w0, 2
 	and	w0, w0, 65535
 	cmp	w0, 496
-	bne	.L793
-	b	.L780
-.L791:
+	bne	.L955
+	b	.L942
+.L953:
 	cmp	w0, 8
-	bne	.L780
-	add	x1, x19, :lo12:.LANCHOR14
+	bne	.L942
+	add	x1, x19, :lo12:.LANCHOR21
 	mov	x0, 0
-.L794:
+.L956:
 	strh	w0, [x0, x1]
 	add	x0, x0, 2
 	cmp	x0, 512
-	bne	.L794
-	b	.L780
+	bne	.L956
+	b	.L942
 	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
 	.section	.text.flash_die_info_init,"ax",@progbits
 	.align	2
@@ -4812,25 +5802,25 @@ flash_die_info_init:
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR19
-	add	x19, x23, :lo12:.LANCHOR19
+	adrp	x23, .LANCHOR26
+	add	x19, x23, :lo12:.LANCHOR26
 	stp	x21, x22, [sp, 32]
 	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR13
-	adrp	x26, .LANCHOR8
-	adrp	x22, .LANCHOR10
+	adrp	x25, .LANCHOR20
+	adrp	x26, .LANCHOR15
+	adrp	x22, .LANCHOR17
 	ldrh	w0, [x19, 26]
-	add	x21, x22, :lo12:.LANCHOR10
+	add	x21, x22, :lo12:.LANCHOR17
 	ldrb	w1, [x19, 12]
-	adrp	x24, .LANCHOR98
-	strh	w0, [x25, #:lo12:.LANCHOR13]
-	add	x20, x24, :lo12:.LANCHOR98
+	adrp	x24, .LANCHOR122
+	strh	w0, [x25, #:lo12:.LANCHOR20]
+	add	x20, x24, :lo12:.LANCHOR122
 	ldrh	w0, [x19, 10]
 	add	x19, x19, 1
-	strb	wzr, [x26, #:lo12:.LANCHOR8]
+	strb	wzr, [x26, #:lo12:.LANCHOR15]
 	sdiv	w0, w0, w1
-	adrp	x1, .LANCHOR97
-	strh	w0, [x1, #:lo12:.LANCHOR97]
+	adrp	x1, .LANCHOR121
+	strh	w0, [x1, #:lo12:.LANCHOR121]
 	mov	w1, 0
 	mov	x0, x21
 	bl	ftl_memset
@@ -4838,34 +5828,34 @@ flash_die_info_init:
 	mov	w1, 0
 	mov	x0, x20
 	bl	ftl_memset
-	ldrb	w13, [x23, #:lo12:.LANCHOR19]
+	ldrb	w13, [x23, #:lo12:.LANCHOR26]
 	mov	x7, x23
-	adrp	x14, .LANCHOR26
-	add	x11, x26, :lo12:.LANCHOR8
-	add	x23, x14, :lo12:.LANCHOR26
+	adrp	x14, .LANCHOR33
+	add	x11, x26, :lo12:.LANCHOR15
+	add	x23, x14, :lo12:.LANCHOR33
 	mov	x8, 0
-.L811:
+.L973:
 	mov	w2, w13
 	add	x1, x23, x8, lsl 3
 	mov	x0, x19
 	bl	flash_mem_cmp8
-	cbnz	w0, .L810
+	cbnz	w0, .L972
 	ldrb	w1, [x11]
 	add	w0, w1, 1
 	strb	w0, [x11]
 	str	wzr, [x20, x1, lsl 2]
 	strb	w8, [x21, x1]
-.L810:
+.L972:
 	add	x8, x8, 1
 	cmp	x8, 4
-	bne	.L811
-	add	x0, x7, :lo12:.LANCHOR19
+	bne	.L973
+	add	x0, x7, :lo12:.LANCHOR26
 	ldrb	w1, [x0, 8]
 	cmp	w1, 2
-	beq	.L812
-.L816:
-	add	x7, x7, :lo12:.LANCHOR19
-	ldrb	w0, [x26, #:lo12:.LANCHOR8]
+	beq	.L974
+.L978:
+	add	x7, x7, :lo12:.LANCHOR26
+	ldrb	w0, [x26, #:lo12:.LANCHOR15]
 	ldp	x19, x20, [sp, 16]
 	ldrb	w1, [x7, 13]
 	ldp	x21, x22, [sp, 32]
@@ -4875,30 +5865,30 @@ flash_die_info_init:
 	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 80
 	mul	w0, w0, w1
-	adrp	x1, .LANCHOR99
-	strh	w0, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, .LANCHOR123
+	strh	w0, [x1, #:lo12:.LANCHOR123]
 	ret
-.L812:
-	ldrh	w1, [x25, #:lo12:.LANCHOR13]
-	add	x14, x14, :lo12:.LANCHOR26
+.L974:
+	ldrh	w1, [x25, #:lo12:.LANCHOR20]
+	add	x14, x14, :lo12:.LANCHOR33
 	ldrb	w11, [x0, 13]
 	add	x8, x0, 1
 	ldrb	w20, [x0, 23]
-	add	x19, x26, :lo12:.LANCHOR8
-	add	x15, x24, :lo12:.LANCHOR98
-	add	x22, x22, :lo12:.LANCHOR10
+	add	x19, x26, :lo12:.LANCHOR15
+	add	x15, x24, :lo12:.LANCHOR122
+	add	x22, x22, :lo12:.LANCHOR17
 	mov	x12, 0
 	mul	w11, w11, w1
 	ldrh	w1, [x0, 14]
 	and	w1, w1, 65280
 	mul	w11, w11, w1
 	lsl	w21, w11, 1
-.L815:
+.L977:
 	mov	w2, w13
 	add	x1, x14, x12, lsl 3
 	mov	x0, x8
 	bl	flash_mem_cmp8
-	cbnz	w0, .L813
+	cbnz	w0, .L975
 	ldrb	w1, [x19]
 	cmp	w20, 0
 	csel	w2, w11, w21, eq
@@ -4906,26 +5896,12 @@ flash_die_info_init:
 	strb	w0, [x19]
 	str	w2, [x15, x1, lsl 2]
 	strb	w12, [x22, x1]
-.L813:
+.L975:
 	add	x12, x12, 1
 	cmp	x12, 4
-	bne	.L815
-	b	.L816
+	bne	.L977
+	b	.L978
 	.size	flash_die_info_init, .-flash_die_info_init
-	.section	.text.FlashReadFacBbtData,"ax",@progbits
-	.align	2
-	.global	FlashReadFacBbtData
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	stp	x29, x30, [sp, -16]!
-	lsr	w2, w2, 3
-	mov	w1, 0
-	add	x29, sp, 0
-	bl	ftl_memset
-	mov	w0, 0
-	ldp	x29, x30, [sp], 16
-	ret
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.lpa_hash_init,"ax",@progbits
 	.align	2
 	.global	lpa_hash_init
@@ -4934,19 +5910,19 @@ lpa_hash_init:
 	stp	x29, x30, [sp, -16]!
 	mov	w2, 512
 	mov	w1, 255
-	adrp	x0, .LANCHOR81
+	adrp	x0, .LANCHOR104
 	add	x29, sp, 0
-	add	x0, x0, :lo12:.LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR104
 	bl	ftl_memset
-	adrp	x0, .LANCHOR79
+	adrp	x0, .LANCHOR80
 	mov	w1, 255
 	ldp	x29, x30, [sp], 16
-	ldrh	w2, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
 	mul	w2, w2, w0
-	adrp	x0, .LANCHOR83
-	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR106
+	ldr	x0, [x0, #:lo12:.LANCHOR106]
 	lsl	w2, w2, 2
 	b	ftl_memset
 	.size	lpa_hash_init, .-lpa_hash_init
@@ -4956,10103 +5932,8499 @@ lpa_hash_init:
 	.type	lpa_rebuild_hash, %function
 lpa_rebuild_hash:
 	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR22
+	adrp	x0, .LANCHOR29
 	add	x29, sp, 0
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
 	stp	x19, x20, [sp, 16]
 	stp	x21, x22, [sp, 32]
-	tbz	x0, 12, .L828
-	adrp	x1, .LANCHOR100
-	adrp	x0, .LC28
+	tbz	x0, 12, .L988
+	adrp	x1, .LANCHOR124
+	adrp	x0, .LC33
 	mov	w3, 0
-	mov	w2, 190
-	add	x1, x1, :lo12:.LANCHOR100
-	add	x0, x0, :lo12:.LC28
+	mov	w2, 219
+	add	x1, x1, :lo12:.LANCHOR124
+	add	x0, x0, :lo12:.LC33
 	bl	printf
-.L828:
-	adrp	x20, .LANCHOR79
-	adrp	x22, .LANCHOR69
-	adrp	x19, .LANCHOR81
-	add	x19, x19, :lo12:.LANCHOR81
+.L988:
+	adrp	x20, .LANCHOR80
+	adrp	x22, .LANCHOR72
+	adrp	x19, .LANCHOR104
+	add	x19, x19, :lo12:.LANCHOR104
 	mov	w2, 512
 	mov	w1, 255
 	mov	x0, x19
 	bl	ftl_memset
-	ldrh	w2, [x20, #:lo12:.LANCHOR79]
-	adrp	x21, .LANCHOR83
-	ldrb	w0, [x22, #:lo12:.LANCHOR69]
+	ldrh	w2, [x20, #:lo12:.LANCHOR80]
+	adrp	x21, .LANCHOR106
+	ldrb	w0, [x22, #:lo12:.LANCHOR72]
 	mov	w1, 255
-	add	x20, x20, :lo12:.LANCHOR79
+	add	x20, x20, :lo12:.LANCHOR80
 	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	ldr	x0, [x21, #:lo12:.LANCHOR106]
 	lsl	w2, w2, 2
 	bl	ftl_memset
-	adrp	x0, .LANCHOR82
-	ldrb	w3, [x22, #:lo12:.LANCHOR69]
-	ldr	x5, [x21, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR105
+	ldrb	w3, [x22, #:lo12:.LANCHOR72]
+	ldr	x5, [x21, #:lo12:.LANCHOR106]
 	mov	w1, 0
-	ldr	x4, [x0, #:lo12:.LANCHOR82]
-.L829:
+	ldr	x4, [x0, #:lo12:.LANCHOR105]
+.L989:
 	ldrh	w0, [x20]
 	mul	w0, w0, w3
 	cmp	w1, w0, lsl 1
-	blt	.L831
+	blt	.L991
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x29, x30, [sp], 48
 	ret
-.L831:
+.L991:
 	uxtw	x2, w1
 	ldr	w0, [x4, x2, lsl 2]
 	cmn	w0, #1
-	beq	.L830
+	beq	.L990
 	and	x0, x0, 255
 	ldrh	w6, [x19, x0, lsl 1]
 	strh	w1, [x19, x0, lsl 1]
 	strh	w6, [x5, x2, lsl 1]
-.L830:
+.L990:
 	add	w1, w1, 1
 	and	w1, w1, 65535
-	b	.L829
+	b	.L989
 	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
-	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.section	.text.zftl_read_flash_info,"ax",@progbits
 	.align	2
-	.global	ftl_open_sblk_init
-	.type	ftl_open_sblk_init, %function
-ftl_open_sblk_init:
-	stp	x29, x30, [sp, -80]!
+	.global	zftl_read_flash_info
+	.type	zftl_read_flash_info, %function
+zftl_read_flash_info:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 11
+	mov	w1, 0
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR69
-	stp	x21, x22, [sp, 32]
+	str	x19, [sp, 16]
 	mov	x19, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LC26
-	adrp	x23, .LANCHOR79
-	mov	w22, w1
-	add	x23, x23, :lo12:.LANCHOR79
-	add	x20, x20, :lo12:.LANCHOR69
-	add	x21, x21, :lo12:.LC26
-	stp	x25, x26, [sp, 64]
-.L840:
-.L843:
-	mov	w0, w22
-	bl	ftl_alloc_sblk
-	mov	w1, 0
-	and	w24, w0, 65535
-	bl	ftl_erase_sblk
-	add	x1, x19, 16
-	mov	w0, w24
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	ldrh	w1, [x23]
-	cmp	w22, 2
-	strb	w0, [x19, 9]
-	strh	w24, [x19]
-	strh	wzr, [x19, 2]
-	mul	w0, w1, w0
-	strb	wzr, [x19, 5]
-	strh	w0, [x19, 6]
-	strh	wzr, [x19, 10]
-	strb	w22, [x19, 4]
-	beq	.L844
-	ldrb	w0, [x20]
-	mul	w0, w1, w0
-	and	w0, w0, 65535
-.L841:
-	ldrb	w2, [x20]
-	adrp	x26, .LANCHOR56
-	strh	w0, [x19, 12]
-	ubfiz	x25, x24, 1, 16
-	mul	w2, w2, w1
-	adrp	x1, .LANCHOR82
-	ldr	x3, [x1, #:lo12:.LANCHOR82]
-	mov	w1, 255
-	lsl	w2, w2, 2
-	add	x0, x3, x0, uxth 2
 	bl	ftl_memset
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	ldrh	w1, [x19, 6]
-	strh	w1, [x0, x25]
-	ldrb	w0, [x19, 9]
-	cbnz	w0, .L839
-	mov	w1, w24
-	mov	x0, x21
-	bl	printf
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	mov	w1, -1
-	strh	w1, [x0, x25]
-	mov	w0, 7
-	strb	w0, [x19, 4]
-	b	.L843
-.L844:
-	mov	w0, 0
-	b	.L841
-.L839:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	adrp	x1, .LANCHOR26
+	add	x1, x1, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR20
+	mov	w4, 1
+	ldrb	w3, [x1, 9]
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	mul	w0, w3, w0
+	and	w2, w0, 65535
+	strb	w2, [x19, 4]
+	ubfx	x0, x2, 8, 8
+	strb	w0, [x19, 5]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	strb	w0, [x19, 7]
+	ldrb	w0, [x1, 13]
+	mul	w0, w0, w2
+	ldrh	w2, [x1, 14]
+	strb	wzr, [x19, 10]
+	mul	w0, w0, w2
+	ldrb	w2, [x1, 8]
+	strb	w3, [x19, 6]
+	mul	w0, w0, w2
+	strb	w0, [x19]
+	ubfx	x2, x0, 8, 8
+	strb	w2, [x19, 1]
+	ubfx	x2, x0, 16, 8
+	lsr	w0, w0, 24
+	strb	w2, [x19, 2]
+	adrp	x2, .LANCHOR17
+	strb	w0, [x19, 3]
+	mov	w0, 32
+	strb	w0, [x19, 8]
+	add	x2, x2, :lo12:.LANCHOR17
+	ldrb	w0, [x1, 7]
+	mov	x1, 0
+	strb	w0, [x19, 9]
+	adrp	x0, .LANCHOR15
+	ldrb	w3, [x0, #:lo12:.LANCHOR15]
+.L1000:
+	cmp	w3, w1, uxtb
+	bhi	.L1001
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
-	.section	.text.pm_free_sblk,"ax",@progbits
+.L1001:
+	ldrb	w0, [x1, x2]
+	add	x1, x1, 1
+	ldrb	w5, [x19, 10]
+	lsl	w0, w4, w0
+	orr	w0, w0, w5
+	strb	w0, [x19, 10]
+	b	.L1000
+	.size	zftl_read_flash_info, .-zftl_read_flash_info
+	.section	.text.gc_static_wearleveling,"ax",@progbits
 	.align	2
-	.global	pm_free_sblk
-	.type	pm_free_sblk, %function
-pm_free_sblk:
-	stp	x29, x30, [sp, -368]!
+	.global	gc_static_wearleveling
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	stp	x29, x30, [sp, -160]!
+	mov	w1, 10240
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR101
 	stp	x21, x22, [sp, 32]
-	ldrh	w0, [x20, #:lo12:.LANCHOR101]
+	adrp	x22, .LANCHOR53
+	stp	x19, x20, [sp, 16]
+	ldr	x5, [x22, #:lo12:.LANCHOR53]
 	stp	x23, x24, [sp, 48]
 	stp	x25, x26, [sp, 64]
-	cmp	w0, 128
 	stp	x27, x28, [sp, 80]
-	bls	.L847
-	adrp	x1, .LANCHOR102
-	adrp	x0, .LC0
-	mov	w2, 74
-	add	x1, x1, :lo12:.LANCHOR102
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L848:
-	b	.L848
-.L847:
-	add	x23, x29, 112
-	mov	w2, 256
+	ldr	w0, [x5, 32]
+	cmp	w0, w1
+	bls	.L1004
+	ldr	w1, [x5, 36]
+	add	w1, w1, w0, lsr 10
+	and	w0, w0, 1023
+	stp	w0, w1, [x5, 32]
+.L1004:
+	adrp	x25, .LANCHOR5
+	ldr	w3, [x5, 36]
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 568]
+	ldr	w2, [x0, 12]
+	add	w1, w1, 860160
+	add	w1, w1, 3840
+	cmp	w2, w1
+	bhi	.L1005
+	ldr	w1, [x0, 572]
+	add	w1, w1, 32
+	cmp	w3, w1
+	bls	.L1003
+.L1005:
+	adrp	x21, .LANCHOR3
+	ldrh	w10, [x5, 134]
+	adrp	x23, .LANCHOR2
+	mov	w27, 65535
+	ldr	x8, [x21, #:lo12:.LANCHOR3]
+	mov	w19, w27
+	ldrh	w11, [x23, #:lo12:.LANCHOR2]
+	mov	w12, w27
+	str	w2, [x0, 568]
+	mov	w4, 0
+	add	x8, x8, x10, uxth 2
+	str	w3, [x0, 572]
 	mov	w1, 0
-	mov	x0, x23
+	mov	w20, 0
+	mov	w26, 0
+	mov	w3, 0
+	mov	w2, 0
+.L1007:
+	cmp	w10, w11
+	bcc	.L1011
+	ldrh	w0, [x5, 96]
+	cmp	w0, w20
+	bcs	.L1012
+	strh	w20, [x5, 96]
+.L1012:
+	ldrh	w0, [x5, 98]
+	cmp	w0, w26
+	bcs	.L1013
+	strh	w26, [x5, 98]
+.L1013:
+	udiv	w3, w3, w1
+	adrp	x24, .LANCHOR29
+	udiv	w4, w4, w2
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	strh	w3, [x5, 88]
+	strh	w4, [x5, 90]
+	tbz	x0, 10, .L1014
+	adrp	x0, .LC34
+	and	w4, w4, 65535
+	and	w3, w3, 65535
+	add	x0, x0, :lo12:.LC34
+	bl	printf
+.L1014:
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	adrp	x28, .LANCHOR125
+	tbz	x0, 10, .L1015
+	adrp	x0, .LANCHOR126
+	ldrh	w6, [x28, #:lo12:.LANCHOR125]
+	mov	w4, w26
+	mov	w3, w20
+	ldrh	w5, [x0, #:lo12:.LANCHOR126]
+	mov	w2, w19
+	adrp	x0, .LC35
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC35
+	bl	printf
+.L1015:
+	ldr	x0, [x25, #:lo12:.LANCHOR5]
+	mov	w1, 255
+	mov	w2, 128
+	add	x0, x0, 264
+	strh	wzr, [x0, -142]
 	bl	ftl_memset
-	adrp	x24, .LANCHOR46
-	adrp	x0, .LANCHOR71
-	mov	w2, 21
-	ldr	x5, [x24, #:lo12:.LANCHOR46]
-	ldrh	w8, [x0, #:lo12:.LANCHOR71]
-	ldrh	w11, [x20, #:lo12:.LANCHOR101]
-	add	x4, x5, 704
-	sub	w0, w2, w8
-	mov	w2, 1
-	ldrh	w1, [x5, 698]
-	lsl	w2, w2, w0
-	adrp	x0, .LANCHOR70
-	add	x1, x1, 176
-	sub	w2, w2, #1
-	ldrb	w10, [x0, #:lo12:.LANCHOR70]
-	add	x1, x5, x1, lsl 2
-	mov	x27, x0
-.L849:
-	cmp	x4, x1
-	bne	.L853
-	adrp	x1, .LANCHOR69
-	adrp	x0, .LANCHOR79
-	add	x20, x20, :lo12:.LANCHOR101
-	add	x27, x27, :lo12:.LANCHOR70
-	ldrh	w2, [x0, #:lo12:.LANCHOR79]
-	add	x26, x1, :lo12:.LANCHOR69
-	ldrb	w21, [x1, #:lo12:.LANCHOR69]
-	add	x25, x0, :lo12:.LANCHOR79
-	mov	w28, 0
-	mov	w19, 0
-	mul	w21, w21, w2
-	mov	w2, 65535
-	and	w21, w21, 65535
-.L854:
-	ldrh	w0, [x20]
-	cmp	w0, w19
-	bhi	.L859
-	mov	w0, w28
+	sub	w0, w26, w19
+	str	w0, [x29, 148]
+	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	ldr	w1, [x29, 148]
+	cmp	w1, w0
+	bgt	.L1016
+	adrp	x1, .LANCHOR126
+	sub	w0, w20, w27
+	ldrh	w1, [x1, #:lo12:.LANCHOR126]
+	cmp	w0, w1
+	bgt	.L1016
+.L1023:
+	cbnz	w19, .L1017
+.L1025:
+	cbz	w27, .L1003
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldr	x1, [x21, #:lo12:.LANCHOR3]
+	ldrh	w5, [x23, #:lo12:.LANCHOR2]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L1030:
+	cmp	w0, w5
+	bcc	.L1032
+	ldrh	w0, [x2, 74]
+	add	w0, w27, w0
+	strh	w0, [x2, 74]
+	ldrh	w0, [x2, 96]
+	cmp	w27, w0
+	bcs	.L1003
+	sub	w7, w0, w27
+	strh	w7, [x2, 96]
+.L1003:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 368
+	ldp	x29, x30, [sp], 160
 	ret
-.L853:
-	ldr	w0, [x4]
-	add	x6, x5, 416
-	mov	x3, 0
-	lsr	w0, w0, w8
-	and	w0, w0, w2
-	udiv	w0, w0, w10
-	and	w0, w0, 65535
-.L850:
-	cmp	w11, w3, uxth
-	bhi	.L852
-	add	x4, x4, 4
-	b	.L849
-.L852:
-	ldrh	w7, [x6]
-	cmp	w7, w0
-	bne	.L851
-	ldrh	w7, [x23, x3, lsl 1]
-	add	w7, w7, 1
-	strh	w7, [x23, x3, lsl 1]
-.L851:
-	add	x3, x3, 1
-	add	x6, x6, 2
-	b	.L850
-.L859:
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	sxtw	x22, w19
-	add	x0, x22, 208
-	ldrb	w3, [x27]
-	ldrh	w0, [x1, x0, lsl 1]
-	ldrh	w1, [x1, 692]
-	sdiv	w1, w1, w3
-	cmp	w1, w0
-	bne	.L855
-	ldrb	w1, [x26]
-	ldrh	w3, [x25]
-	mul	w1, w1, w3
-	strh	w1, [x23, x22, lsl 1]
-.L855:
-	ldrh	w1, [x23, x22, lsl 1]
-	cmp	w21, w1
-	bls	.L856
-	cbnz	w1, .L860
-.L858:
-	cmp	w0, w2
-	beq	.L857
-	str	w2, [x29, 108]
-	bl	ftl_free_sblk
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	add	x22, x22, 208
-	mov	w1, -1
-	ldr	w2, [x29, 108]
-	strh	w1, [x0, x22, lsl 1]
-	ldrh	w1, [x0, 688]
-	sub	w1, w1, #1
-	strh	w1, [x0, 688]
-	b	.L857
-.L856:
-	cbz	w1, .L858
-.L857:
-	add	w19, w19, 1
+.L1011:
+	ldrb	w0, [x8, 2]
+	tbz	x0, 3, .L1008
+	ldr	w0, [x8]
+	ldrh	w6, [x8]
+	ubfx	x0, x0, 11, 8
+	and	w6, w6, 2047
+.L1009:
+	cmp	w6, w27
+	add	w1, w1, 1
+	csel	w7, w6, w27, cc
+	cmp	w6, w20
+	csel	w20, w6, w20, hi
+	and	w1, w1, 65535
+	add	w3, w3, w6
+	and	w27, w7, 65535
+	and	w20, w20, 65535
+	cmp	w0, w12
+	bne	.L1033
+	b	.L1034
+.L1008:
+	tst	w0, 24
+	bne	.L1010
+	ldrh	w6, [x8]
+	mov	w0, 65535
+	and	w6, w6, 2047
+	b	.L1009
+.L1010:
+	ldr	w0, [x8]
+	ubfx	x0, x0, 11, 8
+.L1033:
+	cmp	w0, w19
+	add	w2, w2, 1
+	csel	w19, w0, w19, cc
+	cmp	w0, w26
+	add	w4, w4, w0
+	csel	w0, w0, w26, hi
+	and	w2, w2, 65535
 	and	w19, w19, 65535
-	b	.L854
-.L860:
-	mov	w28, w19
-	mov	w21, w1
-	b	.L857
-	.size	pm_free_sblk, .-pm_free_sblk
-	.section	.text.ftl_memcpy,"ax",@progbits
-	.align	2
-	.global	ftl_memcpy
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	uxtw	x2, w2
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.flash_into_data_init,"ax",@progbits
-	.align	2
-	.global	flash_into_data_init
-	.type	flash_into_data_init, %function
-flash_into_data_init:
-	stp	x29, x30, [sp, -32]!
-	mov	w2, 2048
-	mov	w1, 0
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR5
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	mov	w1, 21321
-	movk	w1, 0x5359, lsl 16
-	mov	w2, 32
-	add	x0, x0, 80
-	str	w1, [x0, -80]
-	mov	w1, 2032
-	str	w1, [x0, -72]
-	mov	w1, 1
-	strh	w1, [x0, -64]
-	adrp	x1, .LANCHOR103
-	add	x1, x1, :lo12:.LANCHOR103
-	bl	ftl_memcpy
-	ldr	x0, [x19, #:lo12:.LANCHOR5]
-	mov	w2, 32
-	ldr	x19, [sp, 16]
-	adrp	x1, .LANCHOR19
-	ldp	x29, x30, [sp], 32
-	add	x1, x1, :lo12:.LANCHOR19
-	add	x0, x0, 48
-	b	ftl_memcpy
-	.size	flash_into_data_init, .-flash_into_data_init
-	.section	.text.ftl_memcpy32,"ax",@progbits
-	.align	2
-	.global	ftl_memcpy32
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
-	mov	x3, 0
-.L866:
-	cmp	w2, w3
-	bhi	.L867
-	ret
-.L867:
-	ldr	w4, [x1, x3, lsl 2]
-	str	w4, [x0, x3, lsl 2]
-	add	x3, x3, 1
-	b	.L866
-	.size	ftl_memcpy32, .-ftl_memcpy32
-	.section	.text.ftl_memcmp,"ax",@progbits
-	.align	2
-	.global	ftl_memcmp
-	.type	ftl_memcmp, %function
-ftl_memcmp:
-	uxtw	x2, w2
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",@progbits
-	.align	2
-	.global	rknand_get_clk_rate
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	mov	w0, 19712
-	movk	w0, 0x8d2, lsl 16
-	ret
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",@progbits
-	.align	2
-	.global	ftl_malloc
-	.type	ftl_malloc, %function
-ftl_malloc:
+	and	w26, w0, 65535
+.L1034:
+	add	w10, w10, 1
+	add	x8, x8, 4
+	and	w10, w10, 65535
+	b	.L1007
+.L1016:
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	adrp	x25, .LANCHOR63
+	stp	wzr, wzr, [x29, 152]
+	ldrh	w26, [x0, 134]
+	add	x0, x23, :lo12:.LANCHOR2
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR126
+	add	x0, x0, :lo12:.LANCHOR126
+	str	x0, [x29, 120]
+	add	x0, x25, :lo12:.LANCHOR63
+	str	x0, [x29, 136]
+.L1019:
+	ldr	x0, [x29, 128]
+	ldrh	w0, [x0]
+	cmp	w0, w26
+	bls	.L1023
+	uxtw	x25, w26
+	ldr	x4, [x21, #:lo12:.LANCHOR3]
+	lsl	x3, x25, 2
+	add	x0, x4, x3
+	ldrb	w0, [x0, 2]
+	tst	w0, 192
+	beq	.L1020
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L1020
+	tbz	x0, 4, .L1021
+	ldrh	w0, [x28, #:lo12:.LANCHOR125]
+	ldr	w1, [x29, 148]
+	cmp	w1, w0
+	ble	.L1022
+	ldr	w0, [x4, x3]
+	add	w1, w19, 1
+	ubfx	x0, x0, 11, 8
+	cmp	w0, w1
+	bgt	.L1022
+	stp	x4, x3, [x29, 104]
+	mov	w2, 1
 	mov	w1, 0
-	sxtw	x0, w0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.nandc_init,"ax",@progbits
-	.align	2
-	.global	nandc_init
-	.type	nandc_init, %function
-nandc_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x1, .LANCHOR7
-	mov	w2, 6
-	add	x29, sp, 0
-	strb	w2, [x1, #:lo12:.LANCHOR7]
-	adrp	x2, .LANCHOR6
-	str	wzr, [x29, 24]
-	str	x0, [x2, #:lo12:.LANCHOR6]
-	mov	w2, 12336
-	ldr	w3, [x0, 352]
-	movk	w2, 0x5638, lsl 16
-	cmp	w3, w2
-	bne	.L872
-	mov	w2, 8
-	strb	w2, [x1, #:lo12:.LANCHOR7]
-.L872:
-	ldr	w3, [x0, 128]
-	mov	w2, 12336
-	movk	w2, 0x5639, lsl 16
-	cmp	w3, w2
-	bne	.L873
-	mov	w2, 9
-	strb	w2, [x1, #:lo12:.LANCHOR7]
-.L873:
-	ldrb	w1, [x1, #:lo12:.LANCHOR7]
-	cmp	w1, 9
-	adrp	x1, .LANCHOR28
-	bne	.L874
+	mov	w0, w26
+	bl	gc_add_sblk
+	ldr	w0, [x29, 156]
+	ldp	x4, x3, [x29, 104]
+	add	w0, w0, 1
+	str	w0, [x29, 156]
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	tbz	x0, 10, .L1022
+	adrp	x0, .LANCHOR4
+	ldr	w6, [x4, x3]
+	ldrh	w5, [x4, x3]
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ubfx	x6, x6, 11, 8
+	and	w5, w5, 2047
+	add	x3, x0, x3
+	ldr	x0, [x29, 136]
+	ldrb	w2, [x3, 2]
+	ldrh	w4, [x0, 56]
+	adrp	x0, .LC36
+	ldrh	w3, [x1, x25, lsl 1]
+	add	x0, x0, :lo12:.LC36
+	ubfx	x2, x2, 5, 3
+	mov	w1, w26
+.L1057:
+	bl	printf
+.L1022:
+	ldr	w0, [x29, 156]
+	cmp	w0, 4
+	ldr	w0, [x29, 152]
+	ccmp	w0, 4, 2, ls
+	bhi	.L1023
+.L1020:
+	add	w8, w26, 1
+	and	w26, w8, 65535
+	b	.L1019
+.L1021:
+	ldr	x1, [x29, 120]
+	sub	w0, w20, w27
+	ldrh	w1, [x1]
+	cmp	w0, w1
+	ble	.L1022
+	ldrh	w0, [x4, x3]
+	add	w1, w27, 1
+	and	w0, w0, 2047
+	cmp	w0, w1
+	bgt	.L1022
+	stp	x4, x3, [x29, 104]
 	mov	w2, 1
-	strb	w2, [x1, #:lo12:.LANCHOR28]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 520]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 8]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 80]
-	mov	w1, 38
-	str	w1, [x0, 84]
-	mov	w1, 39
-	str	w1, [x0, 84]
-.L875:
-	adrp	x0, .LANCHOR29
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR29]
-	adrp	x0, .LANCHOR31
-	strh	wzr, [x0, #:lo12:.LANCHOR31]
-	adrp	x0, .LANCHOR27
-	strb	wzr, [x0, #:lo12:.LANCHOR27]
-	ldp	x29, x30, [sp], 32
-	ret
-.L874:
-	strb	wzr, [x1, #:lo12:.LANCHOR28]
-	ldr	w1, [x29, 24]
-	orr	w1, w1, 256
-	str	w1, [x29, 24]
-	ldr	w1, [x29, 24]
-	str	w1, [x0]
-	str	wzr, [x0, 336]
-	mov	w1, 4225
-	str	w1, [x0, 4]
-	mov	w1, 8321
-	str	w1, [x0, 344]
-	mov	w1, 4099
-	movk	w1, 0x10, lsl 16
-	str	w1, [x0, 304]
-	mov	w1, 38
-	str	w1, [x0, 308]
-	mov	w1, 39
-	str	w1, [x0, 308]
-	mov	w0, 2048
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR30
-	str	x0, [x1, #:lo12:.LANCHOR30]
-	b	.L875
-	.size	nandc_init, .-nandc_init
-	.section	.text.buf_init,"ax",@progbits
+	mov	w1, 0
+	mov	w0, w26
+	bl	gc_add_sblk
+	ldr	w0, [x29, 152]
+	ldp	x4, x3, [x29, 104]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	ldr	w0, [x24, #:lo12:.LANCHOR29]
+	tbz	x0, 10, .L1022
+	adrp	x0, .LANCHOR4
+	ldr	w6, [x4, x3]
+	ldrh	w5, [x4, x3]
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	ldr	x0, [x21, #:lo12:.LANCHOR3]
+	ubfx	x6, x6, 11, 8
+	and	w5, w5, 2047
+	add	x3, x0, x3
+	ldr	x0, [x29, 136]
+	ldrb	w2, [x3, 2]
+	ldrh	w4, [x0, 56]
+	adrp	x0, .LC37
+	ldrh	w3, [x1, x25, lsl 1]
+	add	x0, x0, :lo12:.LC37
+	ubfx	x2, x2, 5, 3
+	mov	w1, w26
+	b	.L1057
+.L1017:
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldr	x1, [x21, #:lo12:.LANCHOR3]
+	ldrh	w5, [x23, #:lo12:.LANCHOR2]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L1026:
+	cmp	w0, w5
+	bcc	.L1028
+	ldrh	w0, [x2, 72]
+	add	w0, w19, w0
+	strh	w0, [x2, 72]
+	ldrh	w0, [x2, 98]
+	cmp	w19, w0
+	bcs	.L1025
+	sub	w19, w0, w19
+	strh	w19, [x2, 98]
+	b	.L1025
+.L1028:
+	ldr	w3, [x1]
+	ubfx	x4, x3, 11, 8
+	cmp	w19, w4
+	bhi	.L1027
+	sub	w4, w4, w19
+	bfi	w3, w4, 11, 8
+	str	w3, [x1]
+.L1027:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L1026
+.L1032:
+	ldrh	w3, [x1]
+	and	w4, w3, 2047
+	cmp	w4, w27
+	blt	.L1031
+	sub	w4, w4, w27
+	bfi	w3, w4, 0, 11
+	strh	w3, [x1]
+.L1031:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L1030
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.zftl_sblk_list_init,"ax",@progbits
 	.align	2
-	.global	buf_init
-	.type	buf_init, %function
-buf_init:
-	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR36
+	.global	zftl_sblk_list_init
+	.type	zftl_sblk_list_init, %function
+zftl_sblk_list_init:
+	stp	x29, x30, [sp, -192]!
+	mov	w0, 6
+	mov	w1, 0
 	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR2
+	adrp	x28, .LANCHOR0
 	stp	x19, x20, [sp, 16]
-	add	x19, x0, :lo12:.LANCHOR36
+	ldrh	w2, [x27, #:lo12:.LANCHOR2]
+	adrp	x20, .LANCHOR86
 	stp	x21, x22, [sp, 32]
-	mov	x20, x0
-	adrp	x22, .LANCHOR45
-	add	x22, x22, :lo12:.LANCHOR45
-	mov	w21, 0
-.L878:
-	and	w0, w21, 255
-	strb	w0, [x19, 1]
-	add	w1, w0, 1
-	ldrb	w0, [x22]
-	strb	w1, [x19]
-	add	w21, w21, 1
-	strb	wzr, [x19, 2]
-	add	x19, x19, 64
-	str	xzr, [x19, -48]
-	lsl	w0, w0, 9
-	bl	ftl_malloc
-	str	x0, [x19, -56]
-	ldrb	w0, [x22]
-	lsl	w0, w0, 1
-	bl	ftl_malloc
-	str	x0, [x19, -40]
-	cmp	w21, 32
-	bne	.L878
-	add	x0, x20, :lo12:.LANCHOR36
-	mov	w1, -1
-	strb	w1, [x0, 1984]
-	adrp	x0, .LANCHOR37
-	strb	wzr, [x0, #:lo12:.LANCHOR37]
-	adrp	x0, .LANCHOR38
+	adrp	x19, .LANCHOR82
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR93
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR53
+	mul	w2, w2, w0
+	ldr	x0, [x28, #:lo12:.LANCHOR0]
+	adrp	x24, .LANCHOR89
+	adrp	x23, .LANCHOR91
+	adrp	x21, .LANCHOR84
+	bl	ftl_memset
+	str	x28, [x29, 168]
+	adrp	x2, .LANCHOR72
+	adrp	x3, .LANCHOR80
+	adrp	x10, .LANCHOR90
+	adrp	x8, .LANCHOR92
+	ldrb	w0, [x2, #:lo12:.LANCHOR72]
+	adrp	x7, .LANCHOR94
+	ldrh	w1, [x3, #:lo12:.LANCHOR80]
+	adrp	x6, .LANCHOR76
+	adrp	x5, .LANCHOR75
+	adrp	x4, .LANCHOR74
+	str	xzr, [x10, #:lo12:.LANCHOR90]
+	adrp	x28, .LANCHOR3
+	str	xzr, [x8, #:lo12:.LANCHOR92]
+	mul	w1, w0, w1
+	mov	w0, 32768
+	str	xzr, [x7, #:lo12:.LANCHOR94]
+	str	xzr, [x6, #:lo12:.LANCHOR76]
+	str	xzr, [x5, #:lo12:.LANCHOR75]
+	sdiv	w0, w0, w1
+	str	xzr, [x4, #:lo12:.LANCHOR74]
+	strh	wzr, [x24, #:lo12:.LANCHOR89]
+	strh	wzr, [x23, #:lo12:.LANCHOR91]
+	strh	wzr, [x22, #:lo12:.LANCHOR93]
+	sxth	w0, w0
+	str	w0, [x29, 188]
+	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	strh	wzr, [x21, #:lo12:.LANCHOR84]
+	strh	wzr, [x20, #:lo12:.LANCHOR86]
+	strh	wzr, [x19, #:lo12:.LANCHOR82]
+	strh	wzr, [x0, 146]
+	ldrsh	w26, [x0, 134]
+	add	x0, x27, :lo12:.LANCHOR2
+	adrp	x27, .LC38
+	add	x27, x27, :lo12:.LC38
+	stp	x3, x2, [x29, 104]
+	stp	x4, x5, [x29, 120]
+	stp	x6, x7, [x29, 136]
+	stp	x8, x10, [x29, 152]
+	str	x0, [x29, 176]
+.L1059:
+	ldr	x0, [x29, 176]
+	ldrh	w0, [x0]
+	cmp	w26, w0
+	blt	.L1075
+	ldr	x0, [x25, #:lo12:.LANCHOR53]
+	ldrh	w1, [x24, #:lo12:.LANCHOR89]
+	ldp	x25, x26, [sp, 64]
+	strh	w1, [x0, 114]
+	ldrh	w1, [x23, #:lo12:.LANCHOR91]
+	strh	w1, [x0, 118]
+	ldrh	w1, [x22, #:lo12:.LANCHOR93]
+	strh	w1, [x0, 116]
+	ldrh	w1, [x21, #:lo12:.LANCHOR84]
+	strh	w1, [x0, 122]
+	ldrh	w1, [x20, #:lo12:.LANCHOR86]
+	strh	w1, [x0, 120]
+	ldrh	w1, [x19, #:lo12:.LANCHOR82]
+	strh	w1, [x0, 124]
 	ldp	x19, x20, [sp, 16]
-	strb	w21, [x0, #:lo12:.LANCHOR38]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	ldp	x23, x24, [sp, 48]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
 	ret
-	.size	buf_init, .-buf_init
-	.section	.text.gc_init,"ax",@progbits
-	.align	2
-	.global	gc_init
-	.type	gc_init, %function
-gc_init:
-	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR67
-	mov	w2, 328
+.L1075:
+	ldr	x4, [x28, #:lo12:.LANCHOR3]
+	sxtw	x2, w26
+	add	x4, x4, x2, lsl 2
+	ldrb	w6, [x4, 3]
+	cbz	w6, .L1076
+	ldr	x0, [x29, 112]
 	mov	w1, 0
-	add	x29, sp, 0
-	strb	wzr, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR104
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR58
-	add	x19, x20, :lo12:.LANCHOR58
-	strb	wzr, [x0, #:lo12:.LANCHOR104]
-	mov	x0, x19
-	bl	ftl_memset
-	mov	w0, -1
-	strh	w0, [x20, #:lo12:.LANCHOR58]
-	adrp	x0, .LANCHOR79
-	str	xzr, [x19, 8]
-	adrp	x4, .LANCHOR105
-	adrp	x20, .LANCHOR68
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	lsr	w3, w1, 1
-	lsr	w0, w1, 2
-	strh	w3, [x19, 38]
-	strh	w0, [x19, 36]
-	adrp	x19, .LANCHOR69
-	ldrb	w2, [x19, #:lo12:.LANCHOR69]
-	mul	w1, w1, w2
-	sub	w1, w1, #32
-	strh	w1, [x4, #:lo12:.LANCHOR105]
-	adrp	x1, .LANCHOR106
-	strh	w3, [x1, #:lo12:.LANCHOR106]
-	adrp	x1, .LANCHOR57
-	strh	w0, [x1, #:lo12:.LANCHOR57]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w2
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR107
-	str	x0, [x1, #:lo12:.LANCHOR107]
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR108
-	str	x0, [x1, #:lo12:.LANCHOR108]
-	ldrh	w1, [x20, #:lo12:.LANCHOR68]
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mul	w0, w1, w0
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR65
-	str	x0, [x1, #:lo12:.LANCHOR65]
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR61
-	str	x0, [x1, #:lo12:.LANCHOR61]
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	lsl	w0, w0, 2
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR109
-	ldp	x19, x20, [sp, 16]
-	str	x0, [x1, #:lo12:.LANCHOR109]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	gc_init, .-gc_init
-	.section	.text.ftl_free,"ax",@progbits
-	.align	2
-	.global	ftl_free
-	.type	ftl_free, %function
-ftl_free:
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.js_hash,"ax",@progbits
-	.align	2
-	.global	js_hash
-	.type	js_hash, %function
-js_hash:
-	mov	x4, x0
-	mov	w0, 42982
-	mov	x3, 0
-	movk	w0, 0x47c6, lsl 16
-.L885:
-	cmp	w1, w3
-	bhi	.L886
-	ret
-.L886:
-	lsr	w2, w0, 2
-	ldrb	w5, [x4, x3]
-	add	w2, w2, w0, lsl 5
-	add	x3, x3, 1
-	add	w2, w2, w5
-	eor	w0, w0, w2
-	b	.L885
-	.size	js_hash, .-js_hash
-	.section	.text.timer_get_time,"ax",@progbits
-	.align	2
-	.global	timer_get_time
-	.type	timer_get_time, %function
-timer_get_time:
+	ldr	x7, [x25, #:lo12:.LANCHOR53]
+	ldrb	w8, [x0, #:lo12:.LANCHOR72]
+	ldr	x0, [x29, 104]
+	ldrh	w10, [x0, #:lo12:.LANCHOR80]
 	mov	w0, 0
-	ret
-	.size	timer_get_time, .-timer_get_time
-	.section	.text.FlashCs123Init,"ax",@progbits
-	.align	2
-	.global	FlashCs123Init
-	.type	FlashCs123Init, %function
-FlashCs123Init:
-	ret
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",@progbits
-	.align	2
-	.global	rk_nand_de_init
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
-	b	FlashDeInit
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",@progbits
-	.align	2
-	.global	rk_ftl_get_capacity
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
-	adrp	x0, .LANCHOR52
-	ldr	w0, [x0, #:lo12:.LANCHOR52]
-	ret
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",@progbits
+.L1061:
+	cmp	w1, w8
+	blt	.L1064
+	cbz	w0, .L1065
+	mov	w1, 32768
+	sdiv	w0, w1, w0
+	sxth	w0, w0
+.L1060:
+	ldr	x3, [x29, 168]
+	mov	w1, 6
+	smull	x1, w26, w1
+	ldr	x5, [x3, #:lo12:.LANCHOR0]
+	add	x6, x5, x1
+	strh	w0, [x6, 4]
+	mov	w0, -1
+	strh	w0, [x6, 2]
+	strh	w0, [x5, x1]
+	mov	w5, 224
+	ldrb	w1, [x4, 2]
+	and	w0, w1, 224
+	cmp	w0, 32
+	ccmp	w0, w5, 4, ne
+	beq	.L1066
+	adrp	x5, .LANCHOR5
+	ldr	x5, [x5, #:lo12:.LANCHOR5]
+	ldrh	w6, [x5, 16]
+	cmp	w26, w6
+	beq	.L1066
+	ldrh	w6, [x5, 48]
+	cmp	w26, w6
+	beq	.L1066
+	ldrh	w5, [x5, 80]
+	cmp	w26, w5
+	beq	.L1066
+	cmp	w0, 64
+	bne	.L1067
+	ldr	x0, [x29, 128]
+	add	x2, x21, :lo12:.LANCHOR84
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR75
+.L1079:
+	bl	_insert_data_list
+.L1066:
+	add	w3, w26, 1
+	sxth	w26, w3
+	b	.L1059
+.L1064:
+	asr	w5, w6, w1
+	tbnz	x5, 0, .L1062
+	add	w0, w10, w0
+	sxth	w0, w0
+.L1063:
+	add	w1, w1, 1
+	b	.L1061
+.L1062:
+	ldrh	w5, [x7, 146]
+	add	w5, w5, 1
+	strh	w5, [x7, 146]
+	b	.L1063
+.L1065:
+	ldrb	w1, [x4, 2]
+	mov	w5, -1
+	orr	w1, w1, -32
+	strb	w1, [x4, 2]
+	adrp	x1, .LANCHOR4
+	ldr	x1, [x1, #:lo12:.LANCHOR4]
+	strh	w5, [x1, x2, lsl 1]
+	b	.L1060
+.L1076:
+	ldr	w0, [x29, 188]
+	b	.L1060
+.L1067:
+	cmp	w0, 96
+	bne	.L1068
+	ldr	x0, [x29, 136]
+	add	x2, x19, :lo12:.LANCHOR82
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR76
+	b	.L1079
+.L1068:
+	cmp	w0, 160
+	bne	.L1069
+	ldr	x0, [x29, 120]
+	add	x2, x20, :lo12:.LANCHOR86
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR74
+	b	.L1079
+.L1069:
+	cbnz	w0, .L1066
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w2, [x0, x2, lsl 1]
+	cbz	w2, .L1070
+	str	x4, [x29, 96]
+	mov	w1, w26
+	mov	x0, x27
+	bl	printf
+	ldr	x4, [x29, 96]
+	ldrb	w0, [x4, 2]
+	tbz	x0, 4, .L1071
+	mov	w1, 5
+.L1078:
+	bfi	w0, w1, 5, 3
+	strb	w0, [x4, 2]
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w26
+	bl	gc_add_sblk
+	b	.L1066
+.L1071:
+	mov	w1, 2
+	b	.L1078
+.L1070:
+	ands	w1, w1, 24
+	bne	.L1073
+	ldr	x0, [x29, 160]
+	add	x2, x24, :lo12:.LANCHOR89
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR90
+.L1080:
+	bl	_insert_free_list
+	b	.L1066
+.L1073:
+	cmp	w1, 16
+	bne	.L1074
+	ldr	x0, [x29, 152]
+	add	x2, x23, :lo12:.LANCHOR91
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR92
+	b	.L1080
+.L1074:
+	ldr	x0, [x29, 144]
+	add	x2, x22, :lo12:.LANCHOR93
+	mov	w1, w26
+	add	x0, x0, :lo12:.LANCHOR94
+	b	.L1080
+	.size	zftl_sblk_list_init, .-zftl_sblk_list_init
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
 	.align	2
-	.global	rknand_print_hex
-	.type	rknand_print_hex, %function
-rknand_print_hex:
-	stp	x29, x30, [sp, -96]!
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR72
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LC30
+	mov	x19, x0
 	stp	x23, x24, [sp, 48]
-	mov	x22, x1
+	adrp	x21, .LC31
+	adrp	x23, .LANCHOR80
+	mov	w22, w1
+	add	x23, x23, :lo12:.LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR72
+	add	x21, x21, :lo12:.LC31
 	stp	x25, x26, [sp, 64]
-	adrp	x23, .LC29
-	mov	x26, x0
-	mov	w24, w2
-	uxtw	x25, w3
-	add	x23, x23, :lo12:.LC29
-	add	x21, x21, :lo12:.LC30
-	stp	x19, x20, [sp, 16]
-	str	x27, [sp, 80]
-	mov	x19, 0
-	mov	w20, 0
-	adrp	x27, .LC31
-.L892:
-	cmp	x25, x19
-	bne	.L898
+.L1082:
+.L1085:
+	mov	w0, w22
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	and	w24, w0, 65535
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w24
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x23]
+	cmp	w22, 2
+	strb	w0, [x19, 9]
+	strh	w24, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w22, [x19, 4]
+	beq	.L1086
+	ldrb	w0, [x20]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L1083:
+	ldrb	w2, [x20]
+	adrp	x26, .LANCHOR4
+	strh	w0, [x19, 12]
+	ubfiz	x25, x24, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR105
+	ldr	x3, [x1, #:lo12:.LANCHOR105]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L1081
+	mov	w1, w24
+	mov	x0, x21
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR4]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L1085
+.L1086:
+	mov	w0, 0
+	b	.L1083
+.L1081:
 	ldp	x19, x20, [sp, 16]
-	adrp	x1, .LC31
 	ldp	x21, x22, [sp, 32]
-	add	x1, x1, :lo12:.LC31
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC32
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC32
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	printf
-.L898:
-	cbnz	w20, .L893
-	mov	w2, w19
-	mov	x1, x26
-	mov	x0, x23
-	bl	printf
-.L893:
-	cmp	w24, 4
-	bne	.L894
-	ldr	w1, [x22, x19, lsl 2]
-.L900:
-	mov	x0, x21
-	add	w20, w20, 1
-	bl	printf
-	cmp	w20, 15
-	bls	.L897
-	mov	w20, 0
-	add	x1, x27, :lo12:.LC31
-	adrp	x0, .LC32
-	add	x0, x0, :lo12:.LC32
-	bl	printf
-.L897:
-	add	x19, x19, 1
-	b	.L892
-.L894:
-	cmp	w24, 2
-	bne	.L896
-	ldrsh	w1, [x22, x19, lsl 1]
-	b	.L900
-.L896:
-	ldrb	w1, [x22, x19]
-	b	.L900
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.hynix_get_read_retry_default,"ax",@progbits
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",@progbits
 	.align	2
-	.global	hynix_get_read_retry_default
-	.type	hynix_get_read_retry_default, %function
-hynix_get_read_retry_default:
-	stp	x29, x30, [sp, -144]!
-	mov	w2, -83
-	mov	w1, -82
+	.global	pm_free_sblk
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	stp	x29, x30, [sp, -368]!
 	add	x29, sp, 0
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	str	w0, [x29, 140]
-	adrp	x0, .LANCHOR5
 	stp	x19, x20, [sp, 16]
-	ldr	x28, [x0, #:lo12:.LANCHOR5]
+	adrp	x20, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x20, #:lo12:.LANCHOR127]
 	stp	x23, x24, [sp, 48]
-	add	x0, x28, 112
-	str	x0, [x29, 112]
-	ldrb	w0, [x29, 140]
-	add	x22, x28, 128
 	stp	x25, x26, [sp, 64]
-	strb	w0, [x28, 112]
-	mov	w0, -84
-	ldr	w3, [x29, 140]
-	strb	w0, [x28, 128]
-	mov	w0, -81
-	strb	w2, [x28, 129]
-	cmp	w3, 2
-	strb	w1, [x28, 130]
-	strb	w0, [x28, 131]
-	bne	.L902
-	mov	w0, -89
-	strb	w0, [x28, 128]
-	adrp	x0, .LANCHOR110+17
-	mov	w1, -9
-	strb	w1, [x0, #:lo12:.LANCHOR110+17]
-.L957:
-	mov	w0, 7
-	b	.L992
-.L902:
-	ldr	w3, [x29, 140]
-	cmp	w3, 3
-	bne	.L904
-	mov	x6, 0
-.L905:
-	sub	w0, w6, #80
-	strb	w0, [x22, x6]
-	add	x6, x6, 1
-	cmp	x6, 8
-	bne	.L905
-	stp	w6, w6, [x29, 132]
-.L903:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #1
-	cmp	w0, 1
-	bhi	.L910
-	adrp	x7, .LANCHOR8
-	adrp	x11, .LANCHOR10
-	add	x24, x7, :lo12:.LANCHOR8
-	add	x25, x11, :lo12:.LANCHOR10
-	mov	w20, 0
-	mov	w26, 55
-.L911:
-	ldrb	w0, [x24]
-	cmp	w0, w20
-	bhi	.L917
-.L918:
-	ldr	x0, [x29, 112]
-	ldrb	w1, [x29, 136]
-	strb	w1, [x0, 1]
-	ldrb	w1, [x29, 132]
-	strb	w1, [x0, 2]
+	cmp	w0, 128
+	stp	x27, x28, [sp, 80]
+	bls	.L1089
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC0
+	mov	w2, 74
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1090:
+	b	.L1090
+.L1089:
+	add	x23, x29, 112
+	mov	w2, 256
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	adrp	x24, .LANCHOR53
+	adrp	x0, .LANCHOR96
+	mov	w2, 21
+	ldr	x5, [x24, #:lo12:.LANCHOR53]
+	ldrh	w8, [x0, #:lo12:.LANCHOR96]
+	ldrh	w11, [x20, #:lo12:.LANCHOR127]
+	add	x4, x5, 704
+	sub	w0, w2, w8
+	mov	w2, 1
+	ldrh	w1, [x5, 698]
+	lsl	w2, w2, w0
+	adrp	x0, .LANCHOR95
+	add	x1, x1, 176
+	sub	w2, w2, #1
+	ldrb	w10, [x0, #:lo12:.LANCHOR95]
+	add	x1, x5, x1, lsl 2
+	mov	x27, x0
+.L1091:
+	cmp	x4, x1
+	bne	.L1095
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LANCHOR80
+	add	x20, x20, :lo12:.LANCHOR127
+	add	x27, x27, :lo12:.LANCHOR95
+	ldrh	w2, [x0, #:lo12:.LANCHOR80]
+	add	x26, x1, :lo12:.LANCHOR72
+	ldrb	w21, [x1, #:lo12:.LANCHOR72]
+	add	x25, x0, :lo12:.LANCHOR80
+	mov	w28, 0
+	mov	w19, 0
+	mul	w21, w21, w2
+	mov	w2, 65535
+	and	w21, w21, 65535
+.L1096:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1101
+	mov	w0, w28
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 368
 	ret
-.L904:
-	ldr	w3, [x29, 140]
-	cmp	w3, 4
-	bne	.L906
-	mov	w3, -52
-	strb	w3, [x28, 128]
-	mov	w3, -65
-	strb	w3, [x28, 129]
-	mov	w3, -86
-	strb	w3, [x28, 130]
-	mov	w3, -85
-	strb	w0, [x28, 135]
-	strb	w3, [x28, 131]
-	mov	w0, 8
-	mov	w3, -51
-	strb	w2, [x28, 133]
-	strb	w3, [x28, 132]
-	strb	w1, [x28, 134]
-	str	w0, [x29, 132]
-.L993:
-	str	w0, [x29, 136]
-	b	.L903
-.L906:
-	ldr	w0, [x29, 140]
-	cmp	w0, 5
-	bne	.L907
-	mov	w0, 56
-	strb	w0, [x28, 128]
-	mov	w0, 57
-	strb	w0, [x28, 129]
-	mov	w0, 58
-	strb	w0, [x28, 130]
-	mov	w0, 59
-	strb	w0, [x28, 131]
-	mov	w0, 8
-.L992:
-	str	w0, [x29, 132]
-	mov	w0, 4
-	b	.L993
-.L907:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	bne	.L908
-	mov	w0, 14
-	strb	w0, [x28, 128]
-	mov	w0, 15
-	strb	w0, [x28, 129]
-	mov	w0, 16
-	strb	w0, [x28, 130]
-	mov	w0, 17
-	strb	w0, [x28, 131]
-	mov	w0, 12
-	b	.L992
-.L908:
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
-	bne	.L957
-	mov	x0, 0
-.L909:
-	sub	w1, w0, #80
-	strb	w1, [x22, x0]
-	add	x0, x0, 1
-	cmp	x0, 8
-	bne	.L909
-	mov	w0, -44
-	strb	w0, [x28, 136]
-	mov	w0, -43
-	strb	w0, [x28, 137]
-	mov	w0, 12
-	str	w0, [x29, 132]
-	mov	w0, 10
-	b	.L993
-.L917:
-	ldrb	w0, [x25, w20, sxtw]
-	mov	x1, 32
-	mov	w2, 160
-	mov	x21, 0
-	umaddl	x2, w2, w0, x1
-	ldr	x1, [x29, 112]
-	ubfiz	x0, x0, 8, 8
-	add	x19, x1, x2
-	adrp	x1, .LANCHOR6
-	ldr	x4, [x1, #:lo12:.LANCHOR6]
-	add	x23, x4, x0
-.L912:
-	str	w26, [x23, 2056]
-	ldrb	w0, [x22, x21]
-	str	w0, [x23, 2052]
-	mov	w0, 80
-	bl	timer_delay_ns
-	ldr	w0, [x23, 2048]
-	strb	w0, [x19, x21]
-	add	x21, x21, 1
-	ldr	w0, [x29, 136]
-	cmp	w0, w21, uxtb
-	bhi	.L912
-	adrp	x3, .LANCHOR110
-	add	x3, x3, :lo12:.LANCHOR110
-	mov	x0, 0
-.L915:
-	add	x15, x19, x0
-	add	x14, x3, x0
-	mov	x1, 1
-.L914:
-	lsl	x4, x1, 2
-	lsl	x16, x1, 3
-	ldrb	w17, [x19, x0]
-	add	x1, x1, 1
-	cmp	x1, 7
-	ldrb	w4, [x14, x4]
-	add	w4, w4, w17
-	strb	w4, [x15, x16]
-	bne	.L914
-	add	x0, x0, 1
-	cmp	x0, 4
-	bne	.L915
-	add	w5, w20, 1
-	strb	wzr, [x19, 16]
-	strb	wzr, [x19, 24]
-	and	w20, w5, 255
-	strb	wzr, [x19, 32]
-	strb	wzr, [x19, 40]
-	strb	wzr, [x19, 48]
-	strb	wzr, [x19, 41]
-	strb	wzr, [x19, 49]
-	b	.L911
-.L910:
-	ldr	w0, [x29, 140]
-	sub	w0, w0, #3
-	cmp	w0, 4
-	bhi	.L918
-	ldp	w0, w1, [x29, 132]
-	adrp	x19, .LANCHOR8
-	add	x19, x19, :lo12:.LANCHOR8
-	sub	w13, w1, #1
-	mul	w15, w0, w1
-	and	x13, x13, 255
-	asr	w0, w15, 2
-	stp	w0, wzr, [x29, 124]
-	lsl	w0, w15, 4
-	str	w0, [x29, 120]
-	ldr	w0, [x29, 124]
-	lsl	w22, w0, 1
-	sbfiz	x21, x0, 2, 32
-	ldr	w0, [x29, 140]
-	sub	w20, w0, #5
-	add	x0, x13, 1
-	str	x0, [x29, 96]
-.L919:
-	ldrb	w0, [x19]
-	ldr	w1, [x29, 128]
-	cmp	w0, w1
-	bls	.L918
-	ldr	w1, [x29, 128]
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	mov	w10, 160
-	mov	w23, 255
-	ldrb	w4, [x0, w1, sxtw]
-	mov	x0, 32
-	umaddl	x10, w10, w4, x0
-	ldr	x0, [x29, 112]
-	ubfiz	x4, x4, 8, 8
-	add	x0, x0, x10
-	str	x0, [x29, 104]
-	adrp	x0, .LANCHOR6
-	ldr	x0, [x0, #:lo12:.LANCHOR6]
-	add	x27, x0, x4
-	str	w23, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldr	w0, [x29, 140]
-	cmp	w0, 4
-	bne	.L920
-	mov	w0, 64
-	str	w23, [x27, 2052]
-	str	w0, [x27, 2048]
-	mov	w0, 204
-.L994:
-	str	w0, [x27, 2052]
-	mov	w0, 77
-	b	.L995
-.L920:
-	cmp	w20, 1
-	bhi	.L922
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	mov	w0, 82
-.L995:
-	str	w0, [x27, 2048]
-	mov	w0, 22
-	str	w0, [x27, 2056]
-	mov	w0, 23
-	str	w0, [x27, 2056]
-	mov	w0, 4
-	str	w0, [x27, 2056]
-	mov	w0, 25
-	str	w0, [x27, 2056]
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	ldr	w0, [x29, 140]
-	str	wzr, [x27, 2052]
-	cmp	w0, 6
-	bne	.L923
-	mov	w0, 31
-	str	w0, [x27, 2052]
-.L924:
-	mov	w23, 2
-	str	w23, [x27, 2052]
-	str	wzr, [x27, 2052]
-	mov	w0, 48
-	str	w0, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	cmp	w20, 1
-	bls	.L958
-	ldr	w0, [x29, 140]
-	cmp	w0, 7
-	mov	w0, 32
-	csel	w23, w23, w0, ne
-.L925:
-	adrp	x3, .LANCHOR111
-	mov	x1, 0
-	ldr	x0, [x3, #:lo12:.LANCHOR111]
-.L926:
-	ldr	w2, [x27, 2048]
-	strb	w2, [x0, x1]
-	add	x1, x1, 1
-	cmp	w23, w1, uxtb
-	bhi	.L926
-	ldr	w1, [x29, 140]
-	cmp	w1, 7
-	bne	.L927
-	mov	w1, 0
-.L929:
-	ldrb	w2, [x0]
-	cmp	w2, 12
-	beq	.L928
-	ldrb	w2, [x0, 1]
-	cmp	w2, 10
-	beq	.L928
-	add	w1, w1, 1
-	add	x0, x0, 4
-	and	w1, w1, 255
-	cmp	w1, 8
-	bne	.L929
-.L930:
-	adrp	x0, .LC33
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.L932:
-	b	.L932
-.L922:
-	mov	w0, 174
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
-	mov	w0, 176
-	b	.L994
-.L923:
-	str	wzr, [x27, 2052]
-	b	.L924
-.L958:
-	mov	w23, 16
-	b	.L925
-.L928:
-	cmp	w1, 6
-	bhi	.L930
-.L931:
-	ldr	x2, [x3, #:lo12:.LANCHOR111]
-	mov	x0, 0
-.L936:
-	ldr	w1, [x29, 120]
+.L1095:
+	ldr	w0, [x4]
+	add	x6, x5, 416
+	mov	x3, 0
+	lsr	w0, w0, w8
+	and	w0, w0, w2
+	udiv	w0, w0, w10
+	and	w0, w0, 65535
+.L1092:
+	cmp	w11, w3, uxth
+	bhi	.L1094
+	add	x4, x4, 4
+	b	.L1091
+.L1094:
+	ldrh	w7, [x6]
+	cmp	w7, w0
+	bne	.L1093
+	ldrh	w7, [x23, x3, lsl 1]
+	add	w7, w7, 1
+	strh	w7, [x23, x3, lsl 1]
+.L1093:
+	add	x3, x3, 1
+	add	x6, x6, 2
+	b	.L1092
+.L1101:
+	ldr	x1, [x24, #:lo12:.LANCHOR53]
+	sxtw	x22, w19
+	add	x0, x22, 208
+	ldrb	w3, [x27]
+	ldrh	w0, [x1, x0, lsl 1]
+	ldrh	w1, [x1, 692]
+	sdiv	w1, w1, w3
 	cmp	w1, w0
-	bgt	.L937
-	ldr	x1, [x3, #:lo12:.LANCHOR111]
-	mov	w16, 8
-	add	x3, x1, x21
-.L939:
-	mov	x0, 0
-.L938:
-	ldr	w17, [x3, x0, lsl 2]
-	ldr	w4, [x29, 124]
-	mvn	w17, w17
-	str	w17, [x3, x0, lsl 2]
-	add	x0, x0, 1
-	cmp	w4, w0
-	bgt	.L938
-	add	x3, x3, x22, uxtw 2
-	subs	w16, w16, #1
-	bne	.L939
-	mov	x17, x1
-	mov	w23, 0
-	mov	w26, 1
-.L940:
-	mov	w3, 0
-	mov	w0, 0
-.L944:
-	mov	x25, x17
-	lsl	w16, w26, w0
-	mov	w24, 16
-	mov	w30, 0
-.L942:
-	ldr	w4, [x25]
-	add	x25, x25, x21
-	bics	wzr, w16, w4
-	cinc	w30, w30, eq
-	subs	w24, w24, #1
-	bne	.L942
-	cmp	w30, 9
-	orr	w16, w3, w16
-	add	w0, w0, 1
-	csel	w3, w16, w3, cs
-	cmp	w0, 32
-	bne	.L944
-	ldr	w0, [x29, 124]
-	add	w23, w23, 1
-	str	w3, [x17], 4
-	cmp	w0, w23
-	bgt	.L940
-	mov	x0, 0
-	mov	w3, 0
-.L947:
-	ldr	w16, [x1, x0]
-	add	x0, x0, 4
-	cmp	w16, 0
-	cinc	w3, w3, eq
-	cmp	x0, 32
-	bne	.L947
-	cmp	w3, 7
-	ble	.L948
-	mov	w3, 1024
-	mov	w2, 1
-	adrp	x0, .LC34
-	add	x0, x0, :lo12:.LC34
-	bl	rknand_print_hex
-	adrp	x0, .LC33
-	mov	w1, 0
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.L949:
-	b	.L949
-.L927:
-	ldr	w1, [x29, 140]
-	cmp	w1, 6
-	bne	.L931
-	mov	x1, 0
-.L933:
-	ldrb	w2, [x0, x1]
-	cmp	w2, 12
-	beq	.L931
-	add	x2, x0, x1
-	ldrb	w2, [x2, 8]
-	cmp	w2, 4
-	beq	.L931
-	add	x1, x1, 1
-	cmp	x1, 8
-	bne	.L933
-	adrp	x0, .LC33
+	bne	.L1097
+	ldrb	w1, [x26]
+	ldrh	w3, [x25]
+	mul	w1, w1, w3
+	strh	w1, [x23, x22, lsl 1]
+.L1097:
+	ldrh	w1, [x23, x22, lsl 1]
+	cmp	w21, w1
+	bls	.L1098
+	cbnz	w1, .L1102
+.L1100:
+	cmp	w0, w2
+	beq	.L1099
+	str	w2, [x29, 108]
+	bl	ftl_free_sblk
+	ldr	x0, [x24, #:lo12:.LANCHOR53]
+	add	x22, x22, 208
+	mov	w1, -1
+	ldr	w2, [x29, 108]
+	strh	w1, [x0, x22, lsl 1]
+	ldrh	w1, [x0, 688]
+	sub	w1, w1, #1
+	strh	w1, [x0, 688]
+	b	.L1099
+.L1098:
+	cbz	w1, .L1100
+.L1099:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1096
+.L1102:
+	mov	w28, w19
+	mov	w21, w1
+	b	.L1099
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_into_data_init,"ax",@progbits
+	.align	2
+	.global	flash_into_data_init
+	.type	flash_into_data_init, %function
+flash_into_data_init:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 2048
 	mov	w1, 0
-	add	x0, x0, :lo12:.LC33
-	bl	printf
-.L935:
-	b	.L935
-.L937:
-	ldr	w1, [x27, 2048]
-	strb	w1, [x2, x0]
-	add	x0, x0, 1
-	b	.L936
-.L948:
-	ldr	w0, [x29, 140]
-	cmp	w0, 6
-	beq	.L960
-	cmp	w0, 7
-	mov	x1, 10
-	mov	x0, 8
-	csel	x0, x0, x1, ne
-.L950:
-	ldr	x10, [x29, 104]
-	mov	w3, 0
-.L951:
-	mov	x1, 0
-.L952:
-	ldrb	w16, [x2, x1]
-	ldr	w4, [x29, 136]
-	strb	w16, [x10, x1]
-	add	x1, x1, 1
-	cmp	w4, w1, uxtb
-	bhi	.L952
-	ldr	x1, [x29, 96]
-	add	w3, w3, 1
-	add	x10, x10, x0
-	add	x2, x2, x1
-	ldr	w1, [x29, 132]
-	cmp	w1, w3
-	bgt	.L951
-	mov	w23, 255
-	str	w23, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	cmp	w20, 1
-	bhi	.L954
-	mov	w0, 54
-	str	w0, [x27, 2056]
-	ldrb	w0, [x28, 128]
-	str	w0, [x27, 2052]
-	str	wzr, [x27, 2048]
-	mov	w0, 22
-	str	w0, [x27, 2056]
-	mov	w0, 48
-	str	wzr, [x27, 2056]
-	str	wzr, [x27, 2052]
-	str	wzr, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-	str	w23, [x27, 2052]
-.L996:
-	str	w0, [x27, 2056]
-	bl	nandc_wait_flash_ready
-	ldr	w0, [x29, 128]
-	add	w11, w0, 1
-	and	w0, w11, 255
-	str	w0, [x29, 128]
-	b	.L919
-.L960:
-	mov	x0, 4
-	b	.L950
-.L954:
-	mov	w0, 56
-	b	.L996
-	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
-	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR12
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	mov	w2, 32
+	add	x0, x0, 80
+	str	w1, [x0, -80]
+	mov	w1, 2032
+	str	w1, [x0, -72]
+	mov	w1, 1
+	strh	w1, [x0, -64]
+	adrp	x1, .LANCHOR129
+	add	x1, x1, :lo12:.LANCHOR129
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR12]
+	mov	w2, 32
+	ldr	x19, [sp, 16]
+	adrp	x1, .LANCHOR26
+	ldp	x29, x30, [sp], 32
+	add	x1, x1, :lo12:.LANCHOR26
+	add	x0, x0, 48
+	b	ftl_memcpy
+	.size	flash_into_data_init, .-flash_into_data_init
+	.section	.text.ftl_memcpy32,"ax",@progbits
 	.align	2
-	.global	flash_get_read_retry_tbl
-	.type	flash_get_read_retry_tbl, %function
-flash_get_read_retry_tbl:
-	adrp	x0, .LANCHOR19+19
-	ldrb	w0, [x0, #:lo12:.LANCHOR19+19]
-	sub	w1, w0, #1
-	and	w1, w1, 255
-	cmp	w1, 6
-	bhi	.L997
-	b	hynix_get_read_retry_default
-.L997:
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L1108:
+	cmp	w2, w3
+	bhi	.L1109
 	ret
-	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
-	.section	.text.nandc_xfer_done,"ax",@progbits
+.L1109:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L1108
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",@progbits
 	.align	2
-	.global	nandc_xfer_done
-	.type	nandc_xfer_done, %function
-nandc_xfer_done:
-	stp	x29, x30, [sp, -80]!
-	adrp	x0, .LANCHOR7
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",@progbits
+	.align	2
+	.global	nandc_init
+	.type	nandc_init, %function
+nandc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR14
+	mov	w2, 6
+	add	x29, sp, 0
+	strb	w2, [x1, #:lo12:.LANCHOR14]
+	adrp	x2, .LANCHOR13
+	str	wzr, [x29, 24]
+	str	x0, [x2, #:lo12:.LANCHOR13]
+	mov	w2, 12336
+	ldr	w3, [x0, 352]
+	movk	w2, 0x5638, lsl 16
+	cmp	w3, w2
+	bne	.L1114
+	mov	w2, 8
+	strb	w2, [x1, #:lo12:.LANCHOR14]
+.L1114:
+	ldr	w3, [x0, 128]
+	mov	w2, 12336
+	movk	w2, 0x5639, lsl 16
+	cmp	w3, w2
+	bne	.L1115
+	mov	w2, 9
+	strb	w2, [x1, #:lo12:.LANCHOR14]
+.L1115:
+	ldrb	w1, [x1, #:lo12:.LANCHOR14]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR35
+	bne	.L1116
+	mov	w2, 1
+	strb	w2, [x1, #:lo12:.LANCHOR35]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 520]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 8]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 80]
+	mov	w1, 38
+	str	w1, [x0, 84]
+	mov	w1, 39
+	str	w1, [x0, 84]
+.L1117:
+	adrp	x0, .LANCHOR36
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR38
+	strh	wzr, [x0, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR34
+	strb	wzr, [x0, #:lo12:.LANCHOR34]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1116:
+	strb	wzr, [x1, #:lo12:.LANCHOR35]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 336]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 344]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 304]
+	mov	w1, 38
+	str	w1, [x0, 308]
+	mov	w1, 39
+	str	w1, [x0, 308]
+	mov	w0, 2048
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR37
+	str	x0, [x1, #:lo12:.LANCHOR37]
+	b	.L1117
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",@progbits
+	.align	2
+	.global	buf_init
+	.type	buf_init, %function
+buf_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR43
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR6
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	add	x19, x0, :lo12:.LANCHOR43
 	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	cmp	w0, 9
-	ldr	x20, [x19, #:lo12:.LANCHOR6]
-	bne	.L1000
-	ldr	w0, [x20, 16]
+	mov	x20, x0
+	adrp	x22, .LANCHOR52
+	add	x22, x22, :lo12:.LANCHOR52
 	mov	w21, 0
-	str	w0, [x29, 64]
-	ldr	w0, [x20, 48]
-	tbnz	x0, 1, .L1001
-	adrp	x22, .LC37
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC37
-	add	x23, x23, :lo12:.LC36
-.L1002:
-	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1005
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
+.L1120:
+	and	w0, w21, 255
+	strb	w0, [x19, 1]
+	add	w1, w0, 1
+	ldrb	w0, [x22]
+	strb	w1, [x19]
 	add	w21, w21, 1
-	tst	x21, 16777215
-	ldr	w0, [x0, 16]
-	str	w0, [x29, 64]
-	bne	.L1002
-	ldr	w2, [x29, 64]
-	mov	w1, w21
-	ldr	w3, [x20, 64]
-	mov	x0, x22
-	ubfx	x3, x3, 16, 6
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1002
-.L1001:
-	adrp	x22, .LC35
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC35
-	add	x23, x23, :lo12:.LC36
-.L1003:
-	ldr	w1, [x20, 64]
-	ldr	w0, [x29, 64]
-	ubfx	x1, x1, 16, 6
-	ubfx	x0, x0, 22, 6
-	cmp	w1, w0
-	blt	.L1007
-.L1005:
-	adrp	x0, .LANCHOR30+32
-	ldr	x23, [sp, 48]
+	strb	wzr, [x19, 2]
+	add	x19, x19, 64
+	str	xzr, [x19, -48]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, -56]
+	ldrb	w0, [x22]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	str	x0, [x19, -40]
+	cmp	w21, 32
+	bne	.L1120
+	add	x0, x20, :lo12:.LANCHOR43
+	mov	w1, -1
+	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR44
+	strb	wzr, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR45
 	ldp	x19, x20, [sp, 16]
-	str	wzr, [x0, #:lo12:.LANCHOR30+32]
+	strb	w21, [x0, #:lo12:.LANCHOR45]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 48
 	ret
-.L1007:
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w0, [x0]
-	str	w0, [x29, 72]
-	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1004
-	ldr	w0, [x29, 72]
-	tbnz	x0, 17, .L1005
-.L1004:
-	add	w21, w21, 1
-	tst	x21, 16777215
-	bne	.L1003
-	ldr	w2, [x20, 64]
-	mov	w1, w21
-	ldr	w3, [x29, 64]
-	mov	x0, x22
-	ubfx	x2, x2, 16, 5
-	ubfx	x3, x3, 22, 6
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1003
-.L1000:
-	ldr	w0, [x20, 8]
-	mov	w21, 0
-	str	w0, [x29, 64]
-	ldr	w0, [x20, 16]
-	tbnz	x0, 1, .L1011
-	adrp	x22, .LC37
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC37
-	add	x23, x23, :lo12:.LC36
-.L1012:
-	ldr	w0, [x29, 64]
-	tbnz	x0, 20, .L1005
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	add	w21, w21, 1
-	tst	x21, 16777215
-	ldr	w0, [x0, 8]
-	str	w0, [x29, 64]
-	bne	.L1012
-	ldr	w2, [x29, 64]
-	mov	w1, w21
-	ldr	w3, [x20, 28]
-	mov	x0, x22
-	ubfx	x3, x3, 16, 5
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1012
-.L1011:
-	adrp	x22, .LC35
-	adrp	x23, .LC36
-	add	x22, x22, :lo12:.LC35
-	add	x23, x23, :lo12:.LC36
-.L1013:
-	ldr	w1, [x20, 28]
-	ldr	w0, [x29, 64]
-	ubfx	x1, x1, 16, 5
-	ubfx	x0, x0, 22, 6
-	cmp	w1, w0
-	bge	.L1005
-	ldr	x0, [x19, #:lo12:.LANCHOR6]
-	ldr	w0, [x0]
-	str	w0, [x29, 72]
-	ldr	w0, [x29, 72]
-	tbz	x0, 13, .L1014
-	ldr	w0, [x29, 72]
-	tbz	x0, 17, .L1014
-	ldr	w1, [x29, 72]
-	adrp	x0, .LC38
-	add	x0, x0, :lo12:.LC38
-	bl	printf
-	b	.L1005
-.L1014:
-	add	w21, w21, 1
-	tst	x21, 16777215
-	bne	.L1013
-	ldr	w2, [x20, 28]
-	mov	w1, w21
-	ldr	w3, [x29, 64]
-	mov	x0, x22
-	ubfx	x2, x2, 16, 5
-	ubfx	x3, x3, 22, 6
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR6]
-	mov	w3, 256
-	mov	w2, 4
-	mov	x0, x23
-	bl	rknand_print_hex
-	b	.L1013
-	.size	nandc_xfer_done, .-nandc_xfer_done
-	.section	.text.nandc_xfer,"ax",@progbits
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",@progbits
 	.align	2
-	.global	nandc_xfer
-	.type	nandc_xfer, %function
-nandc_xfer:
-	stp	x29, x30, [sp, -64]!
+	.global	gc_init
+	.type	gc_init, %function
+gc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR70
+	mov	w2, 328
+	mov	w1, 0
 	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR130
 	stp	x19, x20, [sp, 16]
-	and	w19, w2, 255
-	stp	x21, x22, [sp, 32]
-	and	w22, w1, 255
-	mov	x21, x3
-	mov	w1, w19
-	mov	x3, x4
-	mov	x2, x21
-	mov	w0, w22
-	mov	x20, x4
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	cbnz	w22, .L1052
-	adrp	x0, .LANCHOR7
-	ldrb	w0, [x0, #:lo12:.LANCHOR7]
-	cmp	w0, 9
-	bne	.L1036
-	adrp	x1, .LANCHOR6
-	lsr	w19, w19, 2
-	mov	x20, x1
-	mov	w3, 1
-	ldr	x5, [x1, #:lo12:.LANCHOR6]
-	mov	w2, 0
-	mov	w0, 0
-.L1037:
-	cmp	w2, w19
-	bcc	.L1041
-	ldr	w19, [x5]
-	cmp	w3, 0
-	mov	w1, 512
-	csel	w0, w0, w1, eq
-	mov	w1, 8192
-	movk	w1, 0x2, lsl 16
-	and	w1, w19, w1
-	cmp	w1, 139264
-	bne	.L1035
-	mov	w1, w19
-	adrp	x0, .LC39
-	add	x0, x0, :lo12:.LC39
-	bl	printf
-	ldr	x0, [x20, #:lo12:.LANCHOR6]
-	orr	w19, w19, 131072
-.L1065:
-	str	w19, [x0]
+	adrp	x20, .LANCHOR63
+	add	x19, x20, :lo12:.LANCHOR63
+	strb	wzr, [x0, #:lo12:.LANCHOR130]
+	mov	x0, x19
+	bl	ftl_memset
 	mov	w0, -1
-.L1035:
+	strh	w0, [x20, #:lo12:.LANCHOR63]
+	adrp	x0, .LANCHOR80
+	str	xzr, [x19, 8]
+	adrp	x4, .LANCHOR88
+	adrp	x20, .LANCHOR71
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	lsr	w2, w1, 1
+	lsr	w0, w1, 2
+	strh	w2, [x19, 38]
+	adrp	x2, .LANCHOR81
+	strh	w0, [x19, 36]
+	adrp	x19, .LANCHOR72
+	strh	wzr, [x2, #:lo12:.LANCHOR81]
+	adrp	x2, .LANCHOR77
+	ldrb	w3, [x19, #:lo12:.LANCHOR72]
+	strh	wzr, [x2, #:lo12:.LANCHOR77]
+	adrp	x2, .LANCHOR78
+	strh	wzr, [x2, #:lo12:.LANCHOR78]
+	mul	w2, w1, w3
+	and	w2, w2, 65535
+	sub	w5, w2, #32
+	strh	w5, [x4, #:lo12:.LANCHOR88]
+	adrp	x4, .LANCHOR85
+	strh	w2, [x4, #:lo12:.LANCHOR85]
+	adrp	x2, .LANCHOR79
+	strh	w1, [x2, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR62
+	strh	w0, [x1, #:lo12:.LANCHOR62]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w3
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR131
+	str	x0, [x1, #:lo12:.LANCHOR131]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR132
+	str	x0, [x1, #:lo12:.LANCHOR132]
+	ldrh	w1, [x20, #:lo12:.LANCHOR71]
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR68
+	str	x0, [x1, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR64
+	str	x0, [x1, #:lo12:.LANCHOR64]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	ldrh	w0, [x20, #:lo12:.LANCHOR71]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR133
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	str	x0, [x1, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR83
+	ldp	x29, x30, [sp], 32
+	ldrh	w1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR73
+	strh	w1, [x0, #:lo12:.LANCHOR73]
 	ret
-.L1041:
-	uxtw	x1, w2
-	add	x1, x1, 84
-	ldr	w1, [x5, x1, lsl 2]
-	str	w1, [x29, 56]
-	ldr	w1, [x29, 56]
-	ldr	w4, [x29, 56]
-	ubfx	x4, x4, 26, 1
-	and	w1, w4, w1, lsr 10
-	and	w3, w3, w1
-	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1054
-	ldr	w1, [x29, 56]
-	tbnz	x1, 18, .L1054
-	ldr	w4, [x29, 56]
-	ldr	w1, [x29, 56]
-	ubfx	x4, x4, 3, 7
-	ubfx	x1, x1, 19, 7
-	cmp	w4, w1
-	ldr	w1, [x29, 56]
-	ble	.L1039
-	ubfx	x1, x1, 3, 7
-.L1040:
-	cmp	w0, w1
-	csel	w0, w0, w1, cs
-.L1038:
-	add	w2, w2, 1
-	b	.L1037
-.L1039:
-	ubfx	x1, x1, 19, 7
-	b	.L1040
-.L1054:
-	mov	w0, -1
-	b	.L1038
-.L1036:
-	adrp	x0, .LANCHOR27
-	lsr	w4, w19, 1
-	mov	w3, 64
-	mov	w1, 1
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	mov	w2, 0
-	adrp	x6, .LANCHOR30
-	cmp	w0, 25
-	mov	w0, 128
-	csel	w3, w3, w0, cc
-	mov	w0, 0
-.L1044:
-	add	w5, w3, w0
-	cmp	w2, w4
-	bcc	.L1045
-	adrp	x22, .LANCHOR6
-	lsr	w19, w19, 2
-	mov	w3, 0
-	mov	w0, 0
-	ldr	x4, [x22, #:lo12:.LANCHOR6]
-.L1046:
-	cmp	w3, w19
-	bcc	.L1050
-	str	wzr, [x4, 16]
-	cmn	w0, #1
-	beq	.L1051
-	ldr	w1, [x20]
-	cmn	w1, #1
-	bne	.L1051
-	ldr	w1, [x20, 4]
-	cmn	w1, #1
-	bne	.L1051
-	ldr	w1, [x21]
-	cmn	w1, #1
-	mov	w1, 512
-	csel	w0, w0, w1, ne
-.L1051:
-	ldr	w19, [x4]
-	mov	w1, 8192
-	movk	w1, 0x2, lsl 16
-	and	w1, w19, w1
-	cmp	w1, 139264
-	bne	.L1035
-	mov	w1, w19
-	adrp	x0, .LC40
-	add	x0, x0, :lo12:.LC40
-	bl	printf
-	orr	w19, w19, 131072
-	ldr	x0, [x22, #:lo12:.LANCHOR6]
-	b	.L1065
-.L1045:
-	ldr	x7, [x6, #:lo12:.LANCHOR30]
-	and	x0, x0, 4294967292
-	ldr	w0, [x7, x0]
-	lsl	w7, w2, 2
-	add	w2, w2, 1
-	strb	w0, [x20, x7]
-	lsr	w7, w0, 8
-	strb	w7, [x20, w1, uxtw]
-	add	w7, w1, 1
-	lsr	w8, w0, 16
-	lsr	w0, w0, 24
-	strb	w8, [x20, x7]
-	add	w7, w1, 2
-	add	w1, w1, 4
-	strb	w0, [x20, x7]
-	mov	w0, w5
-	b	.L1044
-.L1050:
-	uxtw	x1, w3
-	add	x1, x1, 8
-	ldr	w1, [x4, x1, lsl 2]
-	str	w1, [x29, 56]
-	ldr	w1, [x29, 56]
-	tbnz	x1, 2, .L1057
-	ldr	w1, [x29, 56]
-	tbnz	x1, 15, .L1057
-	ldr	w2, [x29, 56]
-	ubfx	x6, x2, 3, 5
-	ldr	w2, [x29, 56]
-	ldr	w1, [x29, 56]
-	ubfx	x2, x2, 27, 1
-	ubfx	x5, x1, 16, 5
-	ldr	w1, [x29, 56]
-	orr	w2, w6, w2, lsl 5
-	ubfx	x1, x1, 29, 1
-	orr	w1, w5, w1, lsl 5
-	cmp	w2, w1
-	ldr	w1, [x29, 56]
-	bls	.L1048
-	ubfx	x2, x1, 3, 5
-	ldr	w1, [x29, 56]
-	ubfx	x1, x1, 27, 1
-.L1064:
-	orr	w1, w2, w1, lsl 5
-	cmp	w0, w1
-	csel	w0, w0, w1, cs
-.L1047:
-	add	w3, w3, 1
-	b	.L1046
-.L1048:
-	ubfx	x2, x1, 16, 5
-	ldr	w1, [x29, 56]
-	ubfx	x1, x1, 29, 1
-	b	.L1064
-.L1057:
-	mov	w0, -1
-	b	.L1047
-.L1052:
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",@progbits
+	.align	2
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L1127:
+	cmp	w1, w3
+	bhi	.L1128
+	ret
+.L1128:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L1127
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",@progbits
+	.align	2
+	.global	timer_get_time
+	.type	timer_get_time, %function
+timer_get_time:
 	mov	w0, 0
-	b	.L1035
-	.size	nandc_xfer, .-nandc_xfer
-	.section	.text.flash_read_page,"ax",@progbits
+	ret
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",@progbits
 	.align	2
-	.global	flash_read_page
-	.type	flash_read_page, %function
-flash_read_page:
-	stp	x29, x30, [sp, -80]!
+	.global	FlashCs123Init
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	ret
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",@progbits
+	.align	2
+	.global	rk_nand_de_init
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	b	zftl_flash_de_init
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.ftl_get_density,"ax",@progbits
+	.align	2
+	.global	ftl_get_density
+	.type	ftl_get_density, %function
+ftl_get_density:
+	and	w0, w0, 255
+	b	zftl_get_density
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.ftl_get_capacity,"ax",@progbits
+	.align	2
+	.global	ftl_get_capacity
+	.type	ftl_get_capacity, %function
+ftl_get_capacity:
+	adrp	x0, .LANCHOR59
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+	ret
+	.size	ftl_get_capacity, .-ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR6
-	stp	x19, x20, [sp, 16]
+	adrp	x21, .LC40
 	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	ldr	x19, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
+	mov	x22, x1
 	stp	x25, x26, [sp, 64]
-	mov	w24, w4
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	mov	x25, x2
-	mov	x26, x3
-	and	w20, w1, 2097151
-	ubfx	x22, x23, 24, 2
-	tbz	x0, 4, .L1067
-	mov	w3, w1
-	adrp	x0, .LC41
-	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC41
+	adrp	x23, .LC39
+	mov	x26, x0
+	mov	w24, w2
+	uxtw	x25, w3
+	add	x23, x23, :lo12:.LC39
+	add	x21, x21, :lo12:.LC40
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x27, .LC41
+.L1135:
+	cmp	x25, x19
+	bne	.L1141
+	ldp	x19, x20, [sp, 16]
+	adrp	x1, .LC41
+	ldp	x21, x22, [sp, 32]
+	add	x1, x1, :lo12:.LC41
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC42
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC42
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L1141:
+	cbnz	w20, .L1136
+	mov	w2, w19
+	mov	x1, x26
+	mov	x0, x23
 	bl	printf
-.L1067:
-	bl	nandc_wait_flash_ready
-	mov	w0, w21
-	bl	nandc_cs
-	adrp	x5, .LANCHOR34
-	cbnz	w22, .L1068
-	mov	w0, w21
-	bl	flash_enter_slc_mode
-.L1069:
-	ubfiz	x4, x21, 8, 8
-	lsr	w0, w20, 8
-	add	x4, x19, x4
-	and	w23, w23, 255
-	str	wzr, [x4, 2056]
-	str	wzr, [x4, 2052]
-	str	wzr, [x4, 2052]
-	str	w23, [x4, 2052]
-	str	w0, [x4, 2052]
-	lsr	w0, w20, 16
-	str	w0, [x4, 2052]
-	mov	w0, 48
-	str	w0, [x4, 2056]
-	ldr	x0, [x5, #:lo12:.LANCHOR34]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L1071
-	cbz	w22, .L1071
-	add	w20, w20, w20, lsl 1
-	sub	w0, w20, #1
-	add	w0, w0, w22
-.L1081:
-	bl	nandc_set_seed
-	bl	nandc_wait_flash_ready
-	mov	w0, 5
-	str	w0, [x4, 2056]
-	str	wzr, [x4, 2052]
-	mov	w0, 224
-	str	wzr, [x4, 2052]
-	mov	x3, x25
-	str	w0, [x4, 2056]
-	mov	w2, w24
-	mov	w1, 0
-	mov	x4, x26
-	mov	w0, w21
-	bl	nandc_xfer
-	mov	w5, w0
-	cbnz	w22, .L1073
-	mov	w0, w21
-	bl	flash_exit_slc_mode
-.L1073:
-	mov	w0, 0
-	bl	nandc_de_cs
-	ldp	x19, x20, [sp, 16]
-	mov	w0, w5
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1068:
-	ldr	x0, [x5, #:lo12:.LANCHOR34]
-	ldrb	w0, [x0, 12]
-	cmp	w0, 3
-	bne	.L1070
-	sxtw	x0, w21
-	add	x0, x0, 8
-	add	x0, x19, x0, lsl 8
-	str	w22, [x0, 8]
-	b	.L1069
-.L1070:
-	mov	w0, w21
-	bl	flash_exit_slc_mode
-	b	.L1069
-.L1071:
-	mov	w0, w20
-	b	.L1081
-	.size	flash_read_page, .-flash_read_page
-	.section	.text.micron_read_retrial,"ax",@progbits
+.L1136:
+	cmp	w24, 4
+	bne	.L1137
+	ldr	w1, [x22, x19, lsl 2]
+.L1143:
+	mov	x0, x21
+	add	w20, w20, 1
+	bl	printf
+	cmp	w20, 15
+	bls	.L1140
+	mov	w20, 0
+	add	x1, x27, :lo12:.LC41
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+.L1140:
+	add	x19, x19, 1
+	b	.L1135
+.L1137:
+	cmp	w24, 2
+	bne	.L1139
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L1143
+.L1139:
+	ldrb	w1, [x22, x19]
+	b	.L1143
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",@progbits
 	.align	2
-	.global	micron_read_retrial
-	.type	micron_read_retrial, %function
-micron_read_retrial:
-	stp	x29, x30, [sp, -128]!
+	.global	hynix_get_read_retry_default
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	stp	x29, x30, [sp, -144]!
+	mov	w2, -83
+	mov	w1, -82
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	adrp	x0, .LANCHOR27
-	stp	x19, x20, [sp, 16]
+	stp	x27, x28, [sp, 80]
 	stp	x21, x22, [sp, 32]
-	mov	x26, x3
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR12
+	stp	x19, x20, [sp, 16]
+	ldr	x28, [x0, #:lo12:.LANCHOR12]
 	stp	x23, x24, [sp, 48]
-	mov	w23, w2
-	stp	x27, x28, [sp, 80]
-	mov	x27, x4
-	ldrb	w21, [x0, #:lo12:.LANCHOR27]
-	and	x20, x25, 255
-	str	w5, [x29, 124]
-	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR6
-	adrp	x24, .LC42
-	add	w21, w21, w21, lsl 1
-	adrp	x7, .LANCHOR113
-	ldr	x8, [x0, #:lo12:.LANCHOR6]
-	asr	w21, w21, 2
-	add	x24, x24, :lo12:.LC42
-	add	x7, x7, :lo12:.LANCHOR113
-	mov	w22, 0
-	mov	w19, -1
-	add	x28, x8, x20, lsl 8
-.L1083:
-	ldrb	w0, [x7]
-	cmp	w22, w0
-	bcc	.L1087
-.L1086:
-	add	x8, x8, x20, lsl 8
-	mov	w0, 239
-	str	w0, [x8, 2056]
-	mov	w0, 137
-	str	w0, [x8, 2052]
-	mov	w0, 200
-	bl	timer_delay_ns
-	str	wzr, [x8, 2048]
-	str	wzr, [x8, 2048]
-	cmp	w19, w21
-	str	wzr, [x8, 2048]
-	str	wzr, [x8, 2048]
-	bcc	.L1088
-	cmn	w19, #1
-	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1088:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L1082
-	adrp	x0, .LC43
-	mov	w4, w19
-	mov	w3, w22
-	mov	w2, w23
-	mov	w1, w22
-	add	x0, x0, :lo12:.LC43
-	bl	printf
-.L1082:
-	mov	w0, w19
+	add	x0, x28, 112
+	str	x0, [x29, 112]
+	ldrb	w0, [x29, 140]
+	add	x22, x28, 128
+	stp	x25, x26, [sp, 64]
+	strb	w0, [x28, 112]
+	mov	w0, -84
+	ldr	w3, [x29, 140]
+	strb	w0, [x28, 128]
+	mov	w0, -81
+	strb	w2, [x28, 129]
+	cmp	w3, 2
+	strb	w1, [x28, 130]
+	strb	w0, [x28, 131]
+	bne	.L1145
+	mov	w0, -89
+	strb	w0, [x28, 128]
+	adrp	x0, .LANCHOR134+17
+	mov	w1, -9
+	strb	w1, [x0, #:lo12:.LANCHOR134+17]
+.L1200:
+	mov	w0, 7
+	b	.L1235
+.L1145:
+	ldr	w3, [x29, 140]
+	cmp	w3, 3
+	bne	.L1147
+	mov	x6, 0
+.L1148:
+	sub	w0, w6, #80
+	strb	w0, [x22, x6]
+	add	x6, x6, 1
+	cmp	x6, 8
+	bne	.L1148
+	stp	w6, w6, [x29, 132]
+.L1146:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	cmp	w0, 1
+	bhi	.L1153
+	adrp	x7, .LANCHOR15
+	adrp	x11, .LANCHOR17
+	add	x24, x7, :lo12:.LANCHOR15
+	add	x25, x11, :lo12:.LANCHOR17
+	mov	w20, 0
+	mov	w26, 55
+.L1154:
+	ldrb	w0, [x24]
+	cmp	w0, w20
+	bhi	.L1160
+.L1161:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0, 1]
+	ldrb	w1, [x29, 132]
+	strb	w1, [x0, 2]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 144
 	ret
-.L1087:
-	mov	w0, 239
-	str	w0, [x28, 2056]
-	mov	w0, 137
-	str	w0, [x28, 2052]
-	stp	x7, x8, [x29, 96]
-	mov	w0, 200
+.L1147:
+	ldr	w3, [x29, 140]
+	cmp	w3, 4
+	bne	.L1149
+	mov	w3, -52
+	strb	w3, [x28, 128]
+	mov	w3, -65
+	strb	w3, [x28, 129]
+	mov	w3, -86
+	strb	w3, [x28, 130]
+	mov	w3, -85
+	strb	w0, [x28, 135]
+	strb	w3, [x28, 131]
+	mov	w0, 8
+	mov	w3, -51
+	strb	w2, [x28, 133]
+	strb	w3, [x28, 132]
+	strb	w1, [x28, 134]
+	str	w0, [x29, 132]
+.L1236:
+	str	w0, [x29, 136]
+	b	.L1146
+.L1149:
+	ldr	w0, [x29, 140]
+	cmp	w0, 5
+	bne	.L1150
+	mov	w0, 56
+	strb	w0, [x28, 128]
+	mov	w0, 57
+	strb	w0, [x28, 129]
+	mov	w0, 58
+	strb	w0, [x28, 130]
+	mov	w0, 59
+	strb	w0, [x28, 131]
+	mov	w0, 8
+.L1235:
+	str	w0, [x29, 132]
+	mov	w0, 4
+	b	.L1236
+.L1150:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	bne	.L1151
+	mov	w0, 14
+	strb	w0, [x28, 128]
+	mov	w0, 15
+	strb	w0, [x28, 129]
+	mov	w0, 16
+	strb	w0, [x28, 130]
+	mov	w0, 17
+	strb	w0, [x28, 131]
+	mov	w0, 12
+	b	.L1235
+.L1151:
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	bne	.L1200
+	mov	x0, 0
+.L1152:
+	sub	w1, w0, #80
+	strb	w1, [x22, x0]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L1152
+	mov	w0, -44
+	strb	w0, [x28, 136]
+	mov	w0, -43
+	strb	w0, [x28, 137]
+	mov	w0, 12
+	str	w0, [x29, 132]
+	mov	w0, 10
+	b	.L1236
+.L1160:
+	ldrb	w0, [x25, w20, sxtw]
+	mov	x1, 32
+	mov	w2, 160
+	mov	x21, 0
+	umaddl	x2, w2, w0, x1
+	ldr	x1, [x29, 112]
+	ubfiz	x0, x0, 8, 8
+	add	x19, x1, x2
+	adrp	x1, .LANCHOR13
+	ldr	x4, [x1, #:lo12:.LANCHOR13]
+	add	x23, x4, x0
+.L1155:
+	str	w26, [x23, 2056]
+	ldrb	w0, [x22, x21]
+	str	w0, [x23, 2052]
+	mov	w0, 80
 	bl	timer_delay_ns
-	add	w10, w22, 1
-	str	w10, [x28, 2048]
-	str	wzr, [x28, 2048]
-	mov	x3, x27
-	ldr	w4, [x29, 124]
-	mov	x2, x26
-	str	wzr, [x28, 2048]
-	mov	w1, w23
-	str	wzr, [x28, 2048]
-	mov	w0, w25
-	str	w10, [x29, 116]
-	bl	flash_read_page
-	mov	w6, w0
-	mov	w4, w19
-	str	w6, [x29, 120]
-	mov	w3, w22
-	mov	w2, w23
-	mov	w1, w22
-	mov	x0, x24
-	bl	printf
-	ldp	w10, w6, [x29, 116]
-	ldp	x7, x8, [x29, 96]
-	cmn	w6, #1
-	beq	.L1084
-	adrp	x0, .LANCHOR111
-	cmn	w19, #1
-	csel	w19, w19, w6, ne
-	cmp	w6, w21
-	ldr	x26, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x27, [x0, #:lo12:.LANCHOR112]
-	bcc	.L1090
-.L1084:
-	mov	w22, w10
-	b	.L1083
-.L1090:
-	mov	w19, w6
-	b	.L1086
-	.size	micron_read_retrial, .-micron_read_retrial
-	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
-	.align	2
-	.global	toshiba_3d_read_retrial
-	.type	toshiba_3d_read_retrial, %function
-toshiba_3d_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	and	w6, w1, 255
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR2
-	stp	x25, x26, [sp, 64]
-	and	w25, w0, 255
-	stp	x27, x28, [sp, 80]
-	mov	x27, x3
-	stp	x23, x24, [sp, 48]
-	mov	x28, x4
-	mov	w23, w2
-	stp	x19, x20, [sp, 16]
-	str	w5, [x29, 124]
-	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR6
-	mov	w1, 46
-	mov	w2, 56
-	ldr	x26, [x0, #:lo12:.LANCHOR6]
-	and	x0, x25, 255
-	add	x21, x0, 8
-	str	x0, [x29, 112]
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	add	x21, x26, x21, lsl 8
-	cmp	w0, 36
-	mov	w0, 26
-	csel	w1, w2, w1, ne
-	str	w1, [x29, 96]
-	mov	w1, 10
-	csel	w0, w1, w0, ne
-	str	w0, [x29, 104]
-	cbnz	w6, .L1102
-	sxtw	x24, w25
-	adrp	x0, .LC44
-	add	x24, x24, 8
-	add	x0, x0, :lo12:.LC44
-	add	x24, x26, x24, lsl 8
-	mov	w19, -1
-	mov	w20, 1
+	ldr	w0, [x23, 2048]
+	strb	w0, [x19, x21]
+	add	x21, x21, 1
+	ldr	w0, [x29, 136]
+	cmp	w0, w21, uxtb
+	bhi	.L1155
+	adrp	x3, .LANCHOR134
+	add	x3, x3, :lo12:.LANCHOR134
+	mov	x0, 0
+.L1158:
+	add	x15, x19, x0
+	add	x14, x3, x0
+	mov	x1, 1
+.L1157:
+	lsl	x4, x1, 2
+	lsl	x16, x1, 3
+	ldrb	w17, [x19, x0]
+	add	x1, x1, 1
+	cmp	x1, 7
+	ldrb	w4, [x14, x4]
+	add	w4, w4, w17
+	strb	w4, [x15, x16]
+	bne	.L1157
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L1158
+	add	w5, w20, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w20, w5, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L1154
+.L1153:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #3
+	cmp	w0, 4
+	bhi	.L1161
+	ldp	w0, w1, [x29, 132]
+	adrp	x19, .LANCHOR15
+	add	x19, x19, :lo12:.LANCHOR15
+	sub	w13, w1, #1
+	mul	w15, w0, w1
+	and	x13, x13, 255
+	asr	w0, w15, 2
+	stp	w0, wzr, [x29, 124]
+	lsl	w0, w15, 4
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 124]
+	lsl	w22, w0, 1
+	sbfiz	x21, x0, 2, 32
+	ldr	w0, [x29, 140]
+	sub	w20, w0, #5
+	add	x0, x13, 1
 	str	x0, [x29, 96]
-.L1108:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1103
-	mov	x0, x21
-	mov	w2, 0
-	mov	w1, w20
-	bl	toshiba_tlc_set_rr_para
-	mov	w0, 93
-	str	w0, [x24, 8]
-.L1104:
-	ldr	w4, [x29, 124]
-	mov	x3, x28
-	mov	x2, x27
-	mov	w1, w23
-	mov	w0, w25
-	bl	flash_read_page
-	mov	w4, w0
-	mov	w3, w0
-	ldr	x0, [x29, 96]
-	str	w4, [x29, 120]
-	mov	w2, w23
-	mov	w1, w20
-	bl	printf
-	ldr	w4, [x29, 120]
-	cmn	w4, #1
-	beq	.L1105
-	adrp	x0, .LANCHOR111
-	cmn	w19, #1
-	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x28, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w4, w0, lsr 2
-	bcc	.L1121
-.L1105:
-	ldr	w0, [x29, 104]
-	add	w20, w20, 1
-	cmp	w0, w20
-	bne	.L1108
-.L1107:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1109
-	mov	w2, 0
-.L1135:
-	mov	w1, 0
-	mov	x0, x21
-	bl	toshiba_tlc_set_rr_para
-	b	.L1110
-.L1103:
-	mov	w1, w20
-	mov	x0, x21
-	bl	toshiba_3d_set_slc_rr_para
-	b	.L1104
-.L1121:
-	mov	w19, w4
-	b	.L1107
-.L1109:
-	mov	w1, 0
-	mov	x0, x21
-	bl	toshiba_3d_set_slc_rr_para
-.L1110:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1118
+.L1162:
+	ldrb	w0, [x19]
+	ldr	w1, [x29, 128]
+	cmp	w0, w1
+	bls	.L1161
+	ldr	w1, [x29, 128]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	mov	w10, 160
+	mov	w23, 255
+	ldrb	w4, [x0, w1, sxtw]
+	mov	x0, 32
+	umaddl	x10, w10, w4, x0
 	ldr	x0, [x29, 112]
-	add	x26, x26, x0, lsl 8
-	mov	w0, 85
-	str	w0, [x26, 2056]
-	mov	w0, 255
-	str	wzr, [x26, 2052]
-	str	wzr, [x26, 2048]
-	str	w0, [x26, 2056]
-.L1118:
-	mov	w4, w19
-	mov	w3, w20
-	mov	w2, w23
-	mov	w1, w20
-	adrp	x0, .LC46
-	add	x0, x0, :lo12:.LC46
-	bl	printf
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w19, w0, lsr 2
-	bcc	.L1119
-	cmn	w19, #1
-	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1119:
-	bl	nandc_wait_flash_ready
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L1102:
-	sxtw	x24, w25
-	orr	w23, w23, w6, lsl 24
-	add	x24, x24, 8
-	adrp	x0, .LC45
-	add	x24, x26, x24, lsl 8
-	add	x0, x0, :lo12:.LC45
-	mov	w19, -1
-	mov	w20, 1
+	ubfiz	x4, x4, 8, 8
+	add	x0, x0, x10
 	str	x0, [x29, 104]
-.L1116:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1111
-	mov	x0, x21
-	mov	w2, 1
-	mov	w1, w20
-	bl	toshiba_tlc_set_rr_para
-	mov	w0, 93
-.L1134:
-	str	w0, [x24, 8]
-	mov	x3, x28
-	mov	x2, x27
-	mov	w1, w23
-	ldr	w4, [x29, 124]
-	mov	w0, w25
-	bl	flash_read_page
-	mov	w4, w0
-	mov	w3, w0
-	ldr	x0, [x29, 104]
-	str	w4, [x29, 120]
-	mov	w2, w23
-	mov	w1, w20
-	bl	printf
-	ldr	w4, [x29, 120]
-	cmn	w4, #1
-	beq	.L1113
-	adrp	x0, .LANCHOR111
-	cmn	w19, #1
-	csel	w19, w19, w4, ne
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x28, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w4, w0, lsr 2
-	bcc	.L1122
-.L1113:
-	ldr	w0, [x29, 96]
-	add	w20, w20, 1
-	cmp	w0, w20
-	bne	.L1116
-.L1115:
-	ldrb	w0, [x22, #:lo12:.LANCHOR2]
-	cmp	w0, 36
-	bne	.L1117
-	mov	w2, 1
-	b	.L1135
-.L1111:
-	mov	x0, x21
-	mov	w1, w20
-	bl	toshiba_3d_set_tlc_rr_para
-	mov	w0, 38
-	b	.L1134
-.L1122:
-	mov	w19, w4
-	b	.L1115
-.L1117:
-	mov	w1, 0
-	mov	x0, x21
-	bl	toshiba_3d_set_tlc_rr_para
-	b	.L1110
-	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
-	.section	.text.toshiba_read_retrial,"ax",@progbits
-	.align	2
-	.global	toshiba_read_retrial
-	.type	toshiba_read_retrial, %function
-toshiba_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	mov	x27, x3
-	stp	x19, x20, [sp, 16]
-	mov	x28, x4
-	stp	x25, x26, [sp, 64]
-	and	w19, w0, 255
-	stp	x23, x24, [sp, 48]
-	and	x26, x19, 255
-	stp	w5, w2, [x29, 120]
+	adrp	x0, .LANCHOR13
+	ldr	x0, [x0, #:lo12:.LANCHOR13]
+	add	x27, x0, x4
+	str	w23, [x27, 2056]
 	bl	nandc_wait_flash_ready
-	adrp	x0, .LANCHOR6
-	adrp	x1, .LANCHOR2
-	str	x1, [x29, 112]
-	add	x21, x26, 8
-	ldr	x22, [x0, #:lo12:.LANCHOR6]
-	ldrb	w0, [x1, #:lo12:.LANCHOR2]
-	sub	w0, w0, #67
-	add	x21, x22, x21, lsl 8
-	and	w0, w0, 255
-	cmp	w0, 1
-	bls	.L1154
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L1155
-	mov	w23, 1
-	mov	w0, 1
-	bl	nandc_set_if_mode
-.L1138:
-	add	x0, x22, x26, lsl 8
-	mov	w1, 92
-	str	w1, [x0, 2056]
-	mov	w1, 197
-	str	w1, [x0, 2056]
-.L1137:
-	sxtw	x0, w19
-	mov	w20, 1
-	add	x0, x0, 8
-	mov	w24, -1
-	add	x0, x22, x0, lsl 8
-	str	x0, [x29, 104]
-.L1139:
-	adrp	x0, .LANCHOR113
-	ldrb	w0, [x0, #:lo12:.LANCHOR113]
-	add	w0, w0, 1
-	cmp	w20, w0
-	bcc	.L1148
-	mov	w25, w24
-.L1147:
-	ldr	x0, [x29, 112]
-	mov	w1, 0
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	sub	w0, w0, #67
-	and	w0, w0, 255
-	cmp	w0, 1
-	mov	x0, x21
-	bhi	.L1149
-	bl	sandisk_set_rr_para
-.L1150:
-	sxtw	x19, w19
-	mov	w0, 255
-	add	x19, x19, 8
-	add	x22, x22, x19, lsl 8
-	str	w0, [x22, 8]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1151
-	cmn	w25, #1
-	mov	w0, 256
-	csel	w25, w25, w0, eq
-.L1151:
-	cmp	w25, 256
-	ccmn	w25, #1, 4, ne
-	bne	.L1152
-	ldr	w2, [x29, 124]
-	adrp	x0, .LC46
-	mov	w4, w25
-	mov	w3, w20
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC46
-	bl	printf
-.L1152:
-	bl	nandc_wait_flash_ready
-	cbz	w23, .L1136
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldr	w0, [x29, 140]
+	cmp	w0, 4
+	bne	.L1163
+	mov	w0, 64
+	str	w23, [x27, 2052]
+	str	w0, [x27, 2048]
+	mov	w0, 204
+.L1237:
+	str	w0, [x27, 2052]
+	mov	w0, 77
+	b	.L1238
+.L1163:
+	cmp	w20, 1
+	bhi	.L1165
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	mov	w0, 82
+.L1238:
+	str	w0, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 23
+	str	w0, [x27, 2056]
 	mov	w0, 4
-	bl	nandc_set_if_mode
-.L1136:
-	mov	w0, w25
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L1155:
-	mov	w23, 0
-	b	.L1138
-.L1154:
-	mov	w23, 0
-	b	.L1137
-.L1148:
-	ldr	x0, [x29, 112]
-	mov	w1, w20
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	sub	w0, w0, #67
-	and	w0, w0, 255
-	cmp	w0, 1
-	mov	x0, x21
-	bhi	.L1140
-	bl	sandisk_set_rr_para
-.L1141:
-	ldr	x0, [x29, 112]
-	ldrb	w0, [x0, #:lo12:.LANCHOR2]
-	cmp	w0, 34
-	bne	.L1142
-	adrp	x0, .LANCHOR113
-	ldrb	w0, [x0, #:lo12:.LANCHOR113]
-	sub	w0, w0, #3
-	cmp	w20, w0
-	bne	.L1142
-	ldr	x1, [x29, 104]
-	mov	w0, 179
-	str	w0, [x1, 8]
-.L1142:
-	add	x0, x22, x26, lsl 8
-	mov	w1, 38
-	ldr	w4, [x29, 120]
-	mov	x3, x28
-	mov	x2, x27
-	str	w1, [x0, 2056]
-	mov	w1, 93
-	str	w1, [x0, 2056]
-	mov	w0, w19
-	ldr	w1, [x29, 124]
-	bl	flash_read_page
-	mov	w25, w0
-	cmn	w0, #1
-	beq	.L1145
-	cmn	w24, #1
-	csel	w24, w24, w0, ne
-	adrp	x0, .LANCHOR111
-	ldr	x27, [x0, #:lo12:.LANCHOR111]
-	adrp	x0, .LANCHOR112
-	ldr	x28, [x0, #:lo12:.LANCHOR112]
-	adrp	x0, .LANCHOR27
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	add	w0, w0, w0, lsl 1
-	cmp	w25, w0, lsr 2
-	bcc	.L1147
-.L1145:
-	add	w20, w20, 1
-	b	.L1139
-.L1140:
-	bl	toshiba_set_rr_para
-	b	.L1141
-.L1149:
-	bl	toshiba_set_rr_para
-	b	.L1150
-	.size	toshiba_read_retrial, .-toshiba_read_retrial
-	.section	.text.hynix_read_retrial,"ax",@progbits
-	.align	2
-	.global	hynix_read_retrial
-	.type	hynix_read_retrial, %function
-hynix_read_retrial:
-	stp	x29, x30, [sp, -128]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	x23, x0, 255
-	adrp	x0, .LANCHOR5
-	stp	x27, x28, [sp, 80]
-	stp	x21, x22, [sp, 32]
-	mov	w27, w5
-	ldr	x28, [x0, #:lo12:.LANCHOR5]
-	mov	w22, w2
-	stp	x25, x26, [sp, 64]
-	mov	x25, x3
-	add	x28, x28, 112
-	stp	x19, x20, [sp, 16]
-	add	x0, x28, x23
-	mov	x26, x4
-	mov	x21, x23
-	mov	w19, -1
-	ldrb	w24, [x28, 2]
-	ldrb	w20, [x0, 8]
+	str	w0, [x27, 2056]
+	mov	w0, 25
+	str	w0, [x27, 2056]
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	ldr	w0, [x29, 140]
+	str	wzr, [x27, 2052]
+	cmp	w0, 6
+	bne	.L1166
+	mov	w0, 31
+	str	w0, [x27, 2052]
+.L1167:
+	mov	w23, 2
+	str	w23, [x27, 2052]
+	str	wzr, [x27, 2052]
+	mov	w0, 48
+	str	w0, [x27, 2056]
 	bl	nandc_wait_flash_ready
-	adrp	x6, .LANCHOR27
-	add	x6, x6, :lo12:.LANCHOR27
-	mov	w5, 0
-	adrp	x7, .LANCHOR111
-	adrp	x8, .LANCHOR112
+	cmp	w20, 1
+	bls	.L1201
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	mov	w0, 32
+	csel	w23, w23, w0, ne
+.L1168:
+	adrp	x3, .LANCHOR135
+	mov	x1, 0
+	ldr	x0, [x3, #:lo12:.LANCHOR135]
 .L1169:
-	cmp	w5, w24
-	bcc	.L1174
+	ldr	w2, [x27, 2048]
+	strb	w2, [x0, x1]
+	add	x1, x1, 1
+	cmp	w23, w1, uxtb
+	bhi	.L1169
+	ldr	w1, [x29, 140]
+	cmp	w1, 7
+	bne	.L1170
+	mov	w1, 0
+.L1172:
+	ldrb	w2, [x0]
+	cmp	w2, 12
+	beq	.L1171
+	ldrb	w2, [x0, 1]
+	cmp	w2, 10
+	beq	.L1171
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1172
 .L1173:
-	adrp	x0, .LANCHOR27
-	add	x23, x28, x23
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	strb	w20, [x23, 8]
-	add	w0, w0, w0, lsl 1
-	cmp	w19, w0, lsr 2
-	bcc	.L1175
-	cmn	w19, #1
-	mov	w0, 256
-	csel	w19, w19, w0, eq
-.L1175:
-	cmp	w19, 256
-	ccmn	w19, #1, 4, ne
-	bne	.L1168
-	adrp	x0, .LC47
-	mov	w4, w19
-	mov	w3, w5
-	mov	w2, w22
-	mov	w1, w5
-	add	x0, x0, :lo12:.LC47
+	adrp	x0, .LC43
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1168:
-	mov	w0, w19
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L1174:
-	add	w20, w20, 1
-	stp	x6, x8, [x29, 96]
-	and	w20, w20, 255
-	str	x7, [x29, 112]
-	cmp	w24, w20
-	str	w5, [x29, 124]
-	csel	w20, w20, wzr, hi
-	mov	w0, w21
-	mov	w1, w20
-	bl	hynix_set_rr_para
-	mov	w4, w27
-	mov	x3, x26
-	mov	x2, x25
-	mov	w1, w22
-	mov	w0, w21
-	bl	flash_read_page
-	ldr	w5, [x29, 124]
-	cmn	w0, #1
-	ldp	x6, x8, [x29, 96]
-	ldr	x7, [x29, 112]
-	beq	.L1171
-	ldrb	w1, [x6]
-	cmn	w19, #1
-	csel	w19, w19, w0, ne
-	ldr	x25, [x7, #:lo12:.LANCHOR111]
-	ldr	x26, [x8, #:lo12:.LANCHOR112]
-	add	w1, w1, w1, lsl 1
-	cmp	w0, w1, lsr 2
-	bcc	.L1177
+.L1175:
+	b	.L1175
+.L1165:
+	mov	w0, 174
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 176
+	b	.L1237
+.L1166:
+	str	wzr, [x27, 2052]
+	b	.L1167
+.L1201:
+	mov	w23, 16
+	b	.L1168
 .L1171:
-	add	w5, w5, 1
-	b	.L1169
-.L1177:
-	mov	w19, w0
-	b	.L1173
-	.size	hynix_read_retrial, .-hynix_read_retrial
-	.section	.text.flash_ddr_tunning_read,"ax",@progbits
-	.align	2
-	.global	flash_ddr_tunning_read
-	.type	flash_ddr_tunning_read, %function
-flash_ddr_tunning_read:
-	stp	x29, x30, [sp, -144]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, 0
-	stp	x21, x22, [sp, 32]
-	mov	w19, 0
-	stp	x23, x24, [sp, 48]
-	mov	w23, w1
-	stp	x25, x26, [sp, 64]
-	adrp	x24, .LC48
-	stp	x27, x28, [sp, 80]
-	and	w25, w0, 255
-	mov	x26, x2
-	mov	x27, x3
-	str	w4, [x29, 140]
-	add	x24, x24, :lo12:.LC48
-	bl	nandc_get_ddr_para
-	mov	w8, w0
-	mov	w28, 1024
-	mov	w21, 6
-	mov	w22, -1
-	mov	w6, 0
-	mov	w7, 0
-	adrp	x10, .LANCHOR111
-	adrp	x11, .LANCHOR112
-.L1192:
-	stp	x11, x10, [x29, 104]
-	mov	w0, w21
-	stp	w8, w6, [x29, 124]
-	str	w7, [x29, 132]
-	bl	nandc_set_ddr_para
-	ldr	w4, [x29, 140]
-	mov	x3, x27
-	mov	x2, x26
-	mov	w1, w23
-	mov	w0, w25
-	bl	flash_read_page
-	mov	w4, w0
-	mov	w3, w0
-	str	w4, [x29, 136]
-	mov	w2, w23
-	mov	w1, w21
-	mov	x0, x24
-	bl	printf
-	ldp	w7, w4, [x29, 132]
-	add	w0, w28, 1
-	ldp	w8, w6, [x29, 124]
+	cmp	w1, 6
+	bhi	.L1173
+.L1174:
+	ldr	x2, [x3, #:lo12:.LANCHOR135]
+	mov	x0, 0
+.L1179:
+	ldr	w1, [x29, 120]
+	cmp	w1, w0
+	bgt	.L1180
+	ldr	x1, [x3, #:lo12:.LANCHOR135]
+	mov	w16, 8
+	add	x3, x1, x21
+.L1182:
+	mov	x0, 0
+.L1181:
+	ldr	w17, [x3, x0, lsl 2]
+	ldr	w4, [x29, 124]
+	mvn	w17, w17
+	str	w17, [x3, x0, lsl 2]
+	add	x0, x0, 1
 	cmp	w4, w0
-	ldp	x11, x10, [x29, 104]
-	bhi	.L1188
-	ldr	x26, [x10, #:lo12:.LANCHOR111]
-	cmp	w4, 2
-	ldr	x27, [x11, #:lo12:.LANCHOR112]
-	bhi	.L1197
-	add	w19, w19, 1
-	cmp	w19, 7
-	bls	.L1197
-	mov	w0, w20
-	mov	w28, w4
-	sub	w20, w21, w19
-	mov	w22, 0
+	bgt	.L1181
+	add	x3, x3, x22, uxtw 2
+	subs	w16, w16, #1
+	bne	.L1182
+	mov	x17, x1
+	mov	w23, 0
+	mov	w26, 1
+.L1183:
+	mov	w3, 0
+	mov	w0, 0
+.L1187:
+	mov	x25, x17
+	lsl	w16, w26, w0
+	mov	w24, 16
+	mov	w30, 0
+.L1185:
+	ldr	w4, [x25]
+	add	x25, x25, x21
+	bics	wzr, w16, w4
+	cinc	w30, w30, eq
+	subs	w24, w24, #1
+	bne	.L1185
+	cmp	w30, 9
+	orr	w16, w3, w16
+	add	w0, w0, 1
+	csel	w3, w16, w3, cs
+	cmp	w0, 32
+	bne	.L1187
+	ldr	w0, [x29, 124]
+	add	w23, w23, 1
+	str	w3, [x17], 4
+	cmp	w0, w23
+	bgt	.L1183
+	mov	x0, 0
+	mov	w3, 0
 .L1190:
-	cmp	w19, w7
-	csel	w20, w20, w0, hi
-.L1191:
-	cbz	w20, .L1193
-	adrp	x0, .LANCHOR27
-	mov	w1, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR27]
-	udiv	w0, w0, w1
-	cmp	w0, w28
-	bls	.L1193
-	mov	w1, w20
-	adrp	x0, .LC49
-	add	x0, x0, :lo12:.LC49
+	ldr	w16, [x1, x0]
+	add	x0, x0, 4
+	cmp	w16, 0
+	cinc	w3, w3, eq
+	cmp	x0, 32
+	bne	.L1190
+	cmp	w3, 7
+	ble	.L1191
+	mov	w3, 1024
+	mov	w2, 1
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	rknand_print_hex
+	adrp	x0, .LC43
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-	mov	w0, w20
-.L1204:
-	bl	nandc_set_ddr_para
-	cbz	w22, .L1187
-	mov	w28, w22
-	mov	w2, w23
-	mov	w1, w25
-	adrp	x0, .LC50
-	add	x0, x0, :lo12:.LC50
+.L1192:
+	b	.L1192
+.L1170:
+	ldr	w1, [x29, 140]
+	cmp	w1, 6
+	bne	.L1174
+	mov	x1, 0
+.L1176:
+	ldrb	w2, [x0, x1]
+	cmp	w2, 12
+	beq	.L1174
+	add	x2, x0, x1
+	ldrb	w2, [x2, 8]
+	cmp	w2, 4
+	beq	.L1174
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1176
+	adrp	x0, .LC43
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC43
 	bl	printf
-.L1187:
-	mov	w0, w28
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
-	ret
-.L1188:
-	cmp	w19, w7
-	bls	.L1198
-	sub	w20, w6, w19
-	cmp	w19, 7
-	bhi	.L1191
-	mov	w7, w19
-.L1198:
-	mov	w19, 0
-	b	.L1189
-.L1197:
-	mov	w6, w21
-	mov	w28, w4
-	mov	w22, 0
-.L1189:
-	add	w21, w21, 2
-	cmp	w21, 50
-	bne	.L1192
-	mov	w0, w20
-	mov	w20, w6
-	b	.L1190
+.L1178:
+	b	.L1178
+.L1180:
+	ldr	w1, [x27, 2048]
+	strb	w1, [x2, x0]
+	add	x0, x0, 1
+	b	.L1179
+.L1191:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	beq	.L1203
+	cmp	w0, 7
+	mov	x1, 10
+	mov	x0, 8
+	csel	x0, x0, x1, ne
 .L1193:
-	mov	w0, w8
-	b	.L1204
-	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
-	.section	.text.flash_read_page_en,"ax",@progbits
+	ldr	x10, [x29, 104]
+	mov	w3, 0
+.L1194:
+	mov	x1, 0
+.L1195:
+	ldrb	w16, [x2, x1]
+	ldr	w4, [x29, 136]
+	strb	w16, [x10, x1]
+	add	x1, x1, 1
+	cmp	w4, w1, uxtb
+	bhi	.L1195
+	ldr	x1, [x29, 96]
+	add	w3, w3, 1
+	add	x10, x10, x0
+	add	x2, x2, x1
+	ldr	w1, [x29, 132]
+	cmp	w1, w3
+	bgt	.L1194
+	mov	w23, 255
+	str	w23, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w20, 1
+	bhi	.L1197
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 48
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	str	wzr, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+.L1239:
+	str	w0, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x29, 128]
+	add	w11, w0, 1
+	and	w0, w11, 255
+	str	w0, [x29, 128]
+	b	.L1162
+.L1203:
+	mov	x0, 4
+	b	.L1193
+.L1197:
+	mov	w0, 56
+	b	.L1239
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
 	.align	2
-	.global	flash_read_page_en
-	.type	flash_read_page_en, %function
-flash_read_page_en:
-	stp	x29, x30, [sp, -96]!
-	and	w0, w0, 255
+	.global	flash_get_read_retry_tbl
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	adrp	x0, .LANCHOR26+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR26+19]
+	sub	w1, w0, #1
+	and	w1, w1, 255
+	cmp	w1, 6
+	bhi	.L1240
+	b	hynix_get_read_retry_default
+.L1240:
+	ret
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_done
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR14
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	w19, w1
-	adrp	x1, .LANCHOR8
+	adrp	x19, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	ldrb	w1, [x1, #:lo12:.LANCHOR8]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	cmp	w1, w0
-	bhi	.L1206
-	adrp	x1, .LANCHOR114
-	adrp	x0, .LC0
-	mov	w2, 386
-	add	x1, x1, :lo12:.LANCHOR114
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1207:
-	b	.L1207
-.L1206:
-	adrp	x1, .LANCHOR10
-	add	x1, x1, :lo12:.LANCHOR10
-	mov	x22, x2
-	mov	x23, x3
-	mov	w24, w4
-	ldrb	w20, [x1, w0, sxtw]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 4, .L1208
-	adrp	x0, .LC51
-	mov	w2, w19
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC51
+	str	x23, [sp, 48]
+	cmp	w0, 9
+	ldr	x20, [x19, #:lo12:.LANCHOR13]
+	bne	.L1243
+	ldr	w0, [x20, 16]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 48]
+	tbnz	x0, 1, .L1244
+	adrp	x22, .LC47
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC47
+	add	x23, x23, :lo12:.LC46
+.L1245:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1248
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 16]
+	str	w0, [x29, 64]
+	bne	.L1245
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 64]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 6
 	bl	printf
-.L1208:
-	tst	x19, 50331648
-	bne	.L1209
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1210
-	ldrb	w0, [x1, #:lo12:.LANCHOR12]
-	cbz	w0, .L1209
-.L1210:
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR12]
-	ldrh	w2, [x0, #:lo12:.LANCHOR13]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L1211
-	add	w19, w0, w19, lsl 1
-.L1209:
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w19
-	mov	w0, w20
-	bl	flash_read_page
-	mov	w21, w0
-	cmn	w0, #1
-	bne	.L1205
-	adrp	x25, .LANCHOR29
-	mov	x26, x25
-	ldrb	w27, [x25, #:lo12:.LANCHOR29]
-	cbnz	w27, .L1213
-.L1216:
-	adrp	x0, .LANCHOR115
-	ldr	x6, [x0, #:lo12:.LANCHOR115]
-	cbnz	x6, .L1214
-.L1215:
-	ldrb	w4, [x26, #:lo12:.LANCHOR29]
-	mov	w3, -1
-	mov	w2, w19
-	mov	w1, 0
-	adrp	x0, .LC52
-	add	x0, x0, :lo12:.LC52
-	bl	printf
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L1205
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w19
-	mov	w0, w20
-	ldr	x27, [sp, 80]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	b	flash_ddr_tunning_read
-.L1211:
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-	b	.L1209
-.L1213:
-	strb	wzr, [x25, #:lo12:.LANCHOR29]
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w1, w19
-	mov	w0, w20
-	bl	flash_read_page
-	strb	w27, [x25, #:lo12:.LANCHOR29]
-	cmn	w0, #1
-	beq	.L1216
-.L1234:
-	mov	w21, w0
-.L1205:
-	mov	w0, w21
-	ldr	x27, [sp, 80]
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1245
+.L1244:
+	adrp	x22, .LC45
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC45
+	add	x23, x23, :lo12:.LC46
+.L1246:
+	ldr	w1, [x20, 64]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 6
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	blt	.L1250
+.L1248:
+	adrp	x0, .LANCHOR37+32
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR37+32]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 80
 	ret
-.L1214:
-	mov	w5, w24
-	mov	x4, x23
-	mov	x3, x22
-	mov	w2, w19
-	mov	w1, 0
-	mov	w0, w20
-	blr	x6
-	cmn	w0, #1
-	bne	.L1234
-	b	.L1215
-	.size	flash_read_page_en, .-flash_read_page_en
-	.section	.text.flash_get_last_written_page,"ax",@progbits
+.L1250:
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1247
+	ldr	w0, [x29, 72]
+	tbnz	x0, 17, .L1248
+.L1247:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1246
+	ldr	w2, [x20, 64]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1246
+.L1243:
+	ldr	w0, [x20, 8]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 16]
+	tbnz	x0, 1, .L1254
+	adrp	x22, .LC47
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC47
+	add	x23, x23, :lo12:.LC46
+.L1255:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1248
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 8]
+	str	w0, [x29, 64]
+	bne	.L1255
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 28]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 5
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1255
+.L1254:
+	adrp	x22, .LC45
+	adrp	x23, .LC46
+	add	x22, x22, :lo12:.LC45
+	add	x23, x23, :lo12:.LC46
+.L1256:
+	ldr	w1, [x20, 28]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 5
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	bge	.L1248
+	ldr	x0, [x19, #:lo12:.LANCHOR13]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1257
+	ldr	w0, [x29, 72]
+	tbz	x0, 17, .L1257
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC48
+	add	x0, x0, :lo12:.LC48
+	bl	printf
+	b	.L1248
+.L1257:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1256
+	ldr	w2, [x20, 28]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR13]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1256
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",@progbits
 	.align	2
-	.global	flash_get_last_written_page
-	.type	flash_get_last_written_page, %function
-flash_get_last_written_page:
-	stp	x29, x30, [sp, -96]!
-	and	w1, w1, 65535
+	.global	nandc_xfer
+	.type	nandc_xfer, %function
+nandc_xfer:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w0, 255
-	adrp	x0, .LANCHOR97
 	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	mov	x22, x2
-	ldrh	w19, [x0, #:lo12:.LANCHOR97]
-	adrp	x0, .LANCHOR19+26
-	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	ldrh	w25, [x0, #:lo12:.LANCHOR19+26]
-	sub	w19, w19, #1
-	sxth	w19, w19
-	mov	w24, w4
-	mov	w0, w21
-	str	x27, [sp, 80]
-	mul	w25, w25, w1
-	add	w1, w19, w25
-	bl	flash_read_page_en
-	cmp	w0, 512
-	bne	.L1236
-	mov	w26, 0
-	mov	w27, 2
-.L1237:
-	cmp	w26, w19
-	ble	.L1240
-.L1236:
-	mov	w0, w19
-	ldr	x27, [sp, 80]
+	and	w19, w2, 255
+	stp	x21, x22, [sp, 32]
+	and	w22, w1, 255
+	mov	x21, x3
+	mov	w1, w19
+	mov	x3, x4
+	mov	x2, x21
+	mov	w0, w22
+	mov	x20, x4
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cbnz	w22, .L1295
+	adrp	x0, .LANCHOR14
+	ldrb	w0, [x0, #:lo12:.LANCHOR14]
+	cmp	w0, 9
+	bne	.L1279
+	adrp	x1, .LANCHOR13
+	lsr	w19, w19, 2
+	mov	x20, x1
+	mov	w3, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR13]
+	mov	w2, 0
+	mov	w0, 0
+.L1280:
+	cmp	w2, w19
+	bcc	.L1284
+	ldr	w19, [x5]
+	cmp	w3, 0
+	mov	w1, 512
+	csel	w0, w0, w1, eq
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1278
+	mov	w1, w19
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR13]
+	orr	w19, w19, 131072
+.L1308:
+	str	w19, [x0]
+	mov	w0, -1
+.L1278:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 64
 	ret
-.L1240:
-	add	w20, w26, w19
-	mov	w4, w24
-	mov	x3, x23
-	mov	x2, x22
-	mov	w0, w21
-	sdiv	w20, w20, w27
-	add	w1, w25, w20, sxth
-	bl	flash_read_page_en
-	cmp	w0, 512
-	bne	.L1238
-	sub	w19, w20, #1
-	sxth	w19, w19
-	b	.L1237
-.L1238:
-	add	w20, w20, 1
-	sxth	w26, w20
-	b	.L1237
-	.size	flash_get_last_written_page, .-flash_get_last_written_page
-	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
-	.align	2
-	.global	flash_get_last_written_page_ext
-	.type	flash_get_last_written_page_ext, %function
-flash_get_last_written_page_ext:
-	adrp	x4, .LANCHOR71
-	mov	w6, 21
-	and	w0, w0, 65535
-	mov	w5, 1
-	ldrh	w4, [x4, #:lo12:.LANCHOR71]
-	sub	w6, w6, w4
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	lsl	w5, w5, w6
-	sub	w5, w5, #1
-	and	w1, w5, w0
-	asr	w0, w0, w6
-	b	flash_get_last_written_page
-	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
-	.section	.text.flash_info_blk_init,"ax",@progbits
-	.align	2
-	.global	flash_info_blk_init
-	.type	flash_info_blk_init, %function
-flash_info_blk_init:
-	stp	x29, x30, [sp, -96]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR13
-	stp	x23, x24, [sp, 48]
-	mov	w24, 21321
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR116
-	stp	x27, x28, [sp, 80]
-	mov	x21, x26
-	add	x27, x22, :lo12:.LANCHOR13
-	stp	x19, x20, [sp, 16]
-	movk	w24, 0x5359, lsl 16
-	mov	w19, 4
-.L1246:
-	ldrh	w1, [x27]
-	adrp	x20, .LANCHOR5
-	ldr	x3, [x26, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x20, #:lo12:.LANCHOR5]
-	mov	w0, 0
-	add	x28, x26, :lo12:.LANCHOR116
-	add	x25, x20, :lo12:.LANCHOR5
-	mul	w1, w1, w19
-	mov	x23, x20
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1244
-	ldr	x2, [x20, #:lo12:.LANCHOR5]
-	ldr	w0, [x2]
-	cmp	w0, w24
-	beq	.L1245
-.L1244:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L1246
-.L1267:
+.L1284:
+	uxtw	x1, w2
+	add	x1, x1, 84
+	ldr	w1, [x5, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	ldr	w4, [x29, 56]
+	ubfx	x4, x4, 26, 1
+	and	w1, w4, w1, lsr 10
+	and	w3, w3, w1
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1297
+	ldr	w1, [x29, 56]
+	tbnz	x1, 18, .L1297
+	ldr	w4, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x4, x4, 3, 7
+	ubfx	x1, x1, 19, 7
+	cmp	w4, w1
+	ldr	w1, [x29, 56]
+	ble	.L1282
+	ubfx	x1, x1, 3, 7
+.L1283:
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1281:
+	add	w2, w2, 1
+	b	.L1280
+.L1282:
+	ubfx	x1, x1, 19, 7
+	b	.L1283
+.L1297:
 	mov	w0, -1
-.L1243:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	ret
-.L1254:
-	ldr	x0, [x25]
-	ldr	w1, [x0]
-	cmp	w1, w24
-	bne	.L1255
-	ldr	w19, [x0, 4]
-.L1248:
-	add	x24, x20, :lo12:.LANCHOR117
-	ldrh	w0, [x22, #:lo12:.LANCHOR13]
-	ldr	x3, [x21, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
-	ldrb	w1, [x24, 1]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	beq	.L1249
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	mov	w1, 21321
-	movk	w1, 0x5359, lsl 16
-	ldr	w2, [x0]
-	cmp	w2, w1
-	bne	.L1249
-	ldr	w1, [x0, 4]
-	cmp	w19, w1
-	bcs	.L1249
-	ldrb	w1, [x0, 37]
-	ldrb	w0, [x0, 36]
-	strb	w1, [x20, #:lo12:.LANCHOR117]
-	strb	w0, [x24, 1]
-.L1249:
-	ldrb	w1, [x20, #:lo12:.LANCHOR117]
-	add	x24, x20, :lo12:.LANCHOR117
-	ldr	x3, [x21, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	b	.L1281
+.L1279:
+	adrp	x0, .LANCHOR34
+	lsr	w4, w19, 1
+	mov	w3, 64
+	mov	w1, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	mov	w2, 0
+	adrp	x6, .LANCHOR37
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w3, w3, w0, cc
 	mov	w0, 0
-	bl	flash_get_last_written_page
-	sxth	w19, w0
-	add	w0, w0, 1
-	ldrb	w20, [x20, #:lo12:.LANCHOR117]
-	strh	w0, [x24, 2]
-	ldrh	w0, [x22, #:lo12:.LANCHOR13]
-	mov	w22, 21321
-	movk	w22, 0x5359, lsl 16
-	madd	w20, w20, w0, w19
-.L1250:
-	tbz	w19, #31, .L1252
-	cmn	w19, #1
-	bne	.L1253
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	ldr	w1, [x0]
-	adrp	x0, .LC53
-	add	x0, x0, :lo12:.LC53
-	bl	printf
-	b	.L1267
-.L1252:
-	ldr	x3, [x21, #:lo12:.LANCHOR116]
-	mov	w4, 4
-	ldr	x2, [x23, #:lo12:.LANCHOR5]
-	mov	w1, w20
+.L1287:
+	add	w5, w3, w0
+	cmp	w2, w4
+	bcc	.L1288
+	adrp	x22, .LANCHOR13
+	lsr	w19, w19, 2
+	mov	w3, 0
 	mov	w0, 0
-	bl	flash_read_page_en
+	ldr	x4, [x22, #:lo12:.LANCHOR13]
+.L1289:
+	cmp	w3, w19
+	bcc	.L1293
+	str	wzr, [x4, 16]
 	cmn	w0, #1
-	beq	.L1251
-	ldr	x0, [x23, #:lo12:.LANCHOR5]
-	ldr	w0, [x0]
-	cmp	w0, w22
-	bne	.L1251
-.L1253:
-	mov	w0, 0
-	b	.L1243
-.L1251:
-	sub	w19, w19, #1
-	sub	w20, w20, #1
-	sxth	w19, w19
-	b	.L1250
-.L1245:
-	adrp	x20, .LANCHOR117
-	add	x1, x20, :lo12:.LANCHOR117
-	ldrb	w3, [x2, 37]
-	mov	w4, 4
-	ldrb	w0, [x2, 36]
-	strb	w3, [x1, 1]
-	ldrh	w1, [x27]
-	ldr	x3, [x28]
-	strb	w0, [x20, #:lo12:.LANCHOR117]
-	mul	w1, w1, w0
+	beq	.L1294
+	ldr	w1, [x20]
+	cmn	w1, #1
+	bne	.L1294
+	ldr	w1, [x20, 4]
+	cmn	w1, #1
+	bne	.L1294
+	ldr	w1, [x21]
+	cmn	w1, #1
+	mov	w1, 512
+	csel	w0, w0, w1, ne
+.L1294:
+	ldr	w19, [x4]
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1278
+	mov	w1, w19
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	bl	printf
+	orr	w19, w19, 131072
+	ldr	x0, [x22, #:lo12:.LANCHOR13]
+	b	.L1308
+.L1288:
+	ldr	x7, [x6, #:lo12:.LANCHOR37]
+	and	x0, x0, 4294967292
+	ldr	w0, [x7, x0]
+	lsl	w7, w2, 2
+	add	w2, w2, 1
+	strb	w0, [x20, x7]
+	lsr	w7, w0, 8
+	strb	w7, [x20, w1, uxtw]
+	add	w7, w1, 1
+	lsr	w8, w0, 16
+	lsr	w0, w0, 24
+	strb	w8, [x20, x7]
+	add	w7, w1, 2
+	add	w1, w1, 4
+	strb	w0, [x20, x7]
+	mov	w0, w5
+	b	.L1287
+.L1293:
+	uxtw	x1, w3
+	add	x1, x1, 8
+	ldr	w1, [x4, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1300
+	ldr	w1, [x29, 56]
+	tbnz	x1, 15, .L1300
+	ldr	w2, [x29, 56]
+	ubfx	x6, x2, 3, 5
+	ldr	w2, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x2, x2, 27, 1
+	ubfx	x5, x1, 16, 5
+	ldr	w1, [x29, 56]
+	orr	w2, w6, w2, lsl 5
+	ubfx	x1, x1, 29, 1
+	orr	w1, w5, w1, lsl 5
+	cmp	w2, w1
+	ldr	w1, [x29, 56]
+	bls	.L1291
+	ubfx	x2, x1, 3, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 27, 1
+.L1307:
+	orr	w1, w2, w1, lsl 5
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1290:
+	add	w3, w3, 1
+	b	.L1289
+.L1291:
+	ubfx	x2, x1, 16, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 29, 1
+	b	.L1307
+.L1300:
+	mov	w0, -1
+	b	.L1290
+.L1295:
 	mov	w0, 0
-	bl	flash_read_page_en
-	cmn	w0, #1
-	bne	.L1254
-.L1255:
-	mov	w19, 0
-	b	.L1248
-	.size	flash_info_blk_init, .-flash_info_blk_init
-	.section	.text.flash_ddr_para_scan,"ax",@progbits
+	b	.L1278
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",@progbits
 	.align	2
-	.global	flash_ddr_para_scan
-	.type	flash_ddr_para_scan, %function
-flash_ddr_para_scan:
+	.global	flash_read_page
+	.type	flash_read_page, %function
+flash_read_page:
 	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR25
 	stp	x21, x22, [sp, 32]
-	and	w22, w0, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR25]
-	adrp	x19, .LANCHOR35
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x19, x20, [sp, 16]
 	stp	x23, x24, [sp, 48]
-	mov	w21, 1
-	mov	w23, w1
-	str	x25, [sp, 64]
-	strb	w21, [x19, #:lo12:.LANCHOR35]
-	adrp	x24, .LANCHOR119
-	bl	flash_set_interface_mode
-	adrp	x25, .LANCHOR118
-	ldrb	w0, [x20, #:lo12:.LANCHOR25]
-	bl	nandc_set_if_mode
-	ldr	x3, [x25, #:lo12:.LANCHOR118]
-	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR119]
-	mov	w1, w23
-	mov	w0, w22
-	bl	flash_ddr_tunning_read
-	ldr	x3, [x25, #:lo12:.LANCHOR118]
-	mov	w4, 4
-	ldr	x2, [x24, #:lo12:.LANCHOR119]
-	mov	w1, w23
-	mov	w0, w22
-	bl	flash_read_page
-	cmn	w0, #1
-	mov	x0, x19
-	bne	.L1269
-	ldrb	w1, [x20, #:lo12:.LANCHOR25]
-	tbz	x1, 0, .L1269
-	mov	w0, 1
-	bl	flash_set_interface_mode
-	mov	w0, w21
-	bl	nandc_set_if_mode
-	strb	wzr, [x19, #:lo12:.LANCHOR35]
-.L1270:
-	mov	w0, 0
-	ldr	x25, [sp, 64]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1269:
-	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR35]
-	b	.L1270
-	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
-	.section	.text.flash_complete_page_read,"ax",@progbits
-	.align	2
-	.global	flash_complete_page_read
-	.type	flash_complete_page_read, %function
-flash_complete_page_read:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
+	mov	w22, w1
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
 	stp	x25, x26, [sp, 64]
-	mov	w25, w0
-	adrp	x0, .LANCHOR8
-	stp	x23, x24, [sp, 48]
-	stp	x19, x20, [sp, 16]
-	mov	x23, x1
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	ubfx	x1, x25, 21, 3
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	cmp	w0, w1
-	bhi	.L1276
-	adrp	x1, .LANCHOR120
-	adrp	x0, .LC0
-	mov	w2, 791
-	add	x1, x1, :lo12:.LANCHOR120
-	add	x0, x0, :lo12:.LC0
+	mov	w24, w4
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	x25, x2
+	mov	x26, x3
+	and	w20, w1, 2097151
+	ubfx	x23, x22, 24, 2
+	tbz	x0, 4, .L1310
+	mov	w3, w1
+	adrp	x0, .LC51
+	mov	w2, w23
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC51
 	bl	printf
-.L1277:
-	b	.L1277
-.L1276:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	ubfx	x22, x25, 24, 2
-	mov	x24, x2
-	and	w19, w25, 2097151
-	ldrb	w21, [x0, w1, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x4, [x0, #:lo12:.LANCHOR6]
+.L1310:
+	bl	nandc_wait_flash_ready
 	mov	w0, w21
 	bl	nandc_cs
-	cbnz	w22, .L1278
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1279
-	ldrb	w0, [x1, #:lo12:.LANCHOR12]
-	cbz	w0, .L1278
-.L1279:
-	adrp	x0, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR12]
-	ldrh	w2, [x0, #:lo12:.LANCHOR13]
-	udiv	w0, w19, w2
-	mul	w0, w0, w2
-	sub	w19, w19, w0
-	cbz	w1, .L1280
-	add	w19, w0, w19, lsl 1
-.L1278:
-	ubfiz	x0, x21, 8, 8
-	mov	w1, 5
-	add	x0, x4, x0
-	adrp	x20, .LANCHOR19
-	add	x6, x20, :lo12:.LANCHOR19
-	mov	x4, x24
-	str	x6, [x29, 104]
-	mov	x3, x23
-	str	w1, [x0, 2056]
-	and	w1, w19, 255
-	str	wzr, [x0, 2052]
-	str	wzr, [x0, 2052]
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 8
-	ldrb	w2, [x6, 9]
-	str	w1, [x0, 2052]
-	lsr	w1, w19, 16
-	str	w1, [x0, 2052]
-	mov	w1, 224
-	str	w1, [x0, 2056]
+	adrp	x6, .LANCHOR41
+	cbnz	w23, .L1311
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+.L1312:
+	ubfiz	x4, x21, 8, 8
+	lsr	w0, w20, 8
+	add	x4, x19, x4
+	and	w22, w22, 255
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w22, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x4, 2052]
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	ldr	x0, [x6, #:lo12:.LANCHOR41]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1314
+	cbz	w23, .L1314
+	add	w20, w20, w20, lsl 1
+	sub	w0, w20, #1
+	add	w0, w0, w23
+.L1323:
+	bl	nandc_set_seed
+	bl	nandc_wait_flash_ready
+	mov	w0, 5
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
+	mov	w0, 224
+	str	wzr, [x4, 2052]
+	mov	w2, w24
+	str	w0, [x4, 2056]
+	mov	x3, x25
+	mov	x4, x26
 	mov	w1, 0
 	mov	w0, w21
 	bl	nandc_xfer
-	mov	w26, w0
-	cmn	w0, #1
-	ldr	x6, [x29, 104]
-	bne	.L1275
-	adrp	x27, .LANCHOR29
-	mov	x28, x27
-	ldrb	w5, [x27, #:lo12:.LANCHOR29]
-	cbnz	w5, .L1282
-.L1285:
-	adrp	x0, .LANCHOR115
-	ldr	x6, [x0, #:lo12:.LANCHOR115]
-	cbnz	x6, .L1283
-.L1284:
-	ldrb	w4, [x28, #:lo12:.LANCHOR29]
-	mov	w3, -1
-	mov	w2, w25
-	mov	w1, 0
-	adrp	x0, .LC54
-	add	x0, x0, :lo12:.LC54
-	bl	printf
-	adrp	x0, .LANCHOR35
-	ldrb	w0, [x0, #:lo12:.LANCHOR35]
-	cbz	w0, .L1275
-	add	x20, x20, :lo12:.LANCHOR19
-	orr	w1, w19, w22, lsl 24
-	ldp	x25, x26, [sp, 64]
-	mov	x3, x24
-	ldrb	w4, [x20, 9]
-	mov	x2, x23
+	mov	w2, w0
+	mov	w0, 0
+	bl	nandc_de_cs
+	mov	w0, w2
 	ldp	x19, x20, [sp, 16]
-	mov	w0, w21
-	ldp	x23, x24, [sp, 48]
 	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	b	flash_ddr_tunning_read
-.L1280:
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
-	ldrh	w19, [x1, w19, uxtw 1]
-	add	w19, w19, w0
-	b	.L1278
-.L1282:
-	ldrb	w4, [x6, 9]
-	mov	x3, x24
-	str	w5, [x29, 104]
-	mov	x2, x23
-	strb	wzr, [x27, #:lo12:.LANCHOR29]
-	orr	w1, w19, w22, lsl 24
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1311:
+	ldr	x0, [x6, #:lo12:.LANCHOR41]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1313
+	sxtw	x0, w21
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w23, [x0, 8]
+	b	.L1312
+.L1313:
 	mov	w0, w21
-	bl	flash_read_page
-	cmn	w0, #1
-	ldr	w5, [x29, 104]
-	strb	w5, [x27, #:lo12:.LANCHOR29]
-	beq	.L1285
-.L1300:
-	mov	w26, w0
-.L1275:
-	mov	w0, w26
+	bl	zftl_flash_exit_slc_mode
+	b	.L1312
+.L1314:
+	mov	w0, w20
+	b	.L1323
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",@progbits
+	.align	2
+	.global	micron_read_retrial
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR34
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	stp	x27, x28, [sp, 80]
+	mov	w28, w5
+	ldrb	w21, [x0, #:lo12:.LANCHOR34]
+	mov	x27, x4
+	bl	nandc_wait_flash_ready
+	and	x20, x25, 255
+	adrp	x0, .LANCHOR13
+	adrp	x5, .LANCHOR137
+	add	w21, w21, w21, lsl 1
+	add	x5, x5, :lo12:.LANCHOR137
+	ldr	x6, [x0, #:lo12:.LANCHOR13]
+	asr	w21, w21, 2
+	mov	w23, 0
+	mov	w19, -1
+	mov	w8, 239
+	mov	w10, 137
+	add	x22, x6, x20, lsl 8
+.L1325:
+	ldrb	w0, [x5]
+	cmp	w23, w0
+	bcc	.L1329
+.L1328:
+	add	x6, x6, x20, lsl 8
+	mov	w0, 239
+	str	w0, [x6, 2056]
+	mov	w0, 137
+	str	w0, [x6, 2052]
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	wzr, [x6, 2048]
+	str	wzr, [x6, 2048]
+	cmp	w19, w21
+	str	wzr, [x6, 2048]
+	str	wzr, [x6, 2048]
+	bcc	.L1330
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1330:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1324
+	adrp	x0, .LC52
+	mov	w4, w19
+	mov	w3, w23
+	mov	w2, w24
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC52
+	bl	printf
+.L1324:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L1283:
-	add	x0, x20, :lo12:.LANCHOR19
-	mov	x4, x24
-	mov	x3, x23
-	mov	w2, w19
-	mov	w1, w22
-	ldrb	w5, [x0, 9]
-	mov	w0, w21
-	blr	x6
+.L1329:
+	str	w8, [x22, 2056]
+	mov	w0, 200
+	str	w10, [x22, 2052]
+	stp	x5, x6, [x29, 96]
+	stp	w8, w10, [x29, 116]
+	bl	timer_delay_ns
+	add	w7, w23, 1
+	str	w7, [x22, 2048]
+	str	wzr, [x22, 2048]
+	mov	w4, w28
+	str	wzr, [x22, 2048]
+	mov	x3, x27
+	str	wzr, [x22, 2048]
+	mov	x2, x26
+	str	w7, [x29, 124]
+	mov	w1, w24
+	mov	w0, w25
+	bl	flash_read_page
+	ldp	w8, w10, [x29, 116]
 	cmn	w0, #1
-	beq	.L1284
-	b	.L1300
-	.size	flash_complete_page_read, .-flash_complete_page_read
-	.section	.text.queue_wait_first_req_completed,"ax",@progbits
+	ldr	w7, [x29, 124]
+	ldp	x5, x6, [x29, 96]
+	beq	.L1326
+	adrp	x1, .LANCHOR135
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	cmp	w0, w21
+	ldr	x26, [x1, #:lo12:.LANCHOR135]
+	adrp	x1, .LANCHOR136
+	ldr	x27, [x1, #:lo12:.LANCHOR136]
+	bcc	.L1332
+.L1326:
+	mov	w23, w7
+	b	.L1325
+.L1332:
+	mov	w19, w0
+	b	.L1328
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
 	.align	2
-	.type	queue_wait_first_req_completed, %function
-queue_wait_first_req_completed:
-	stp	x29, x30, [sp, -64]!
-	adrp	x0, .LANCHOR90
+	.global	toshiba_3d_read_retrial
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	and	w6, w1, 255
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR90]
 	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR9
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
 	stp	x23, x24, [sp, 48]
-	cmp	w0, 255
-	bne	.L1302
-.L1320:
-	mov	w21, 0
-	b	.L1301
-.L1302:
-	adrp	x19, .LANCHOR36
-	sxtw	x22, w0
-	add	x1, x19, :lo12:.LANCHOR36
-	add	x1, x1, x22, lsl 6
-	ldrb	w2, [x1, 58]
-	ldr	w21, [x1, 40]
-	sub	w3, w2, #1
-	cmp	w3, 9
-	bhi	.L1320
-	adrp	x1, .L1305
-	add	x1, x1, :lo12:.L1305
-	ldrb	w1, [x1,w3,uxtw]
-	adr	x3, .Lrtx1305
-	add	x1, x3, w1, sxtb #2
-	br	x1
-.Lrtx1305:
-	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
-	.align	0
-	.align	2
-.L1305:
-	.byte	(.L1304 - .Lrtx1305) / 4
-	.byte	(.L1304 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1307 - .Lrtx1305) / 4
-	.byte	(.L1308 - .Lrtx1305) / 4
-	.byte	(.L1309 - .Lrtx1305) / 4
-	.byte	(.L1306 - .Lrtx1305) / 4
-	.byte	(.L1309 - .Lrtx1305) / 4
-	.section	.text.queue_wait_first_req_completed
-.L1304:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	add	x19, x19, x22, lsl 6
-	ldp	x1, x0, [x19, 8]
-	ldr	x2, [x19, 24]
-	cmp	x0, 0
-	csel	x1, x0, x1, ne
-	mov	w0, w21
-	bl	flash_complete_page_read
-	str	w0, [x19, 52]
-	mov	w0, 12
-	strb	w0, [x19, 58]
-	ldrb	w0, [x19, 2]
-	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-	b	.L1320
-.L1306:
-	mov	w0, w21
-	mov	w1, 64
-	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 6, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	mov	w0, 5
-	add	x19, x19, x22, lsl 6
-	tst	w21, w0
-	beq	.L1319
-	ldrb	w1, [x19, 1]
-	mov	w0, 11
-	ldr	w3, [x19, 40]
-	mov	w4, 11
-	ldr	w2, [x19, 52]
-	strb	w0, [x19, 58]
-	adrp	x0, .LC55
-	add	x0, x0, :lo12:.LC55
-	bl	printf
-.L1338:
-	mov	w0, -1
-	str	w0, [x19, 52]
-	b	.L1301
-.L1309:
-	cmp	w2, 10
-	add	x20, x19, :lo12:.LANCHOR36
-	ubfiz	x0, x0, 6, 8
-	mov	w1, 3
-	mov	w2, 9
-	add	x0, x20, x0
-	csel	w2, w2, w1, eq
-	ubfx	x3, x21, 21, 3
-.L1314:
-	ldrb	w1, [x0]
-	cmp	w1, 255
-	bne	.L1318
-	mov	w21, -1
-	b	.L1301
-.L1318:
-	sxtw	x23, w1
-	ubfiz	x0, x1, 6, 8
-	add	x1, x20, x23, lsl 6
-	add	x0, x20, x0
-	ldrb	w4, [x1, 58]
-	cmp	w4, w2
-	bne	.L1314
-	ldr	w1, [x1, 40]
-	ubfx	x1, x1, 21, 3
-	cmp	w3, w1
-	bne	.L1314
-	mov	w0, w21
-	mov	w1, 64
-	bl	flash_wait_device_ready
-	mov	w24, w0
-	and	w21, w0, 64
-	tbz	x24, 6, .L1316
-	add	x20, x20, x22, lsl 6
-	ands	w21, w0, 15
-	beq	.L1317
-	ldrb	w1, [x20, 1]
-	mov	w4, 11
-	ldr	w3, [x20, 40]
+	mov	x28, x4
+	mov	w23, w2
+	stp	x19, x20, [sp, 16]
+	str	w5, [x29, 124]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	mov	w1, 46
+	mov	w2, 56
+	ldr	x26, [x0, #:lo12:.LANCHOR13]
+	and	x0, x25, 255
+	add	x21, x0, 8
+	str	x0, [x29, 112]
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	add	x21, x26, x21, lsl 8
+	cmp	w0, 36
+	mov	w0, 26
+	csel	w1, w2, w1, ne
+	str	w1, [x29, 96]
+	mov	w1, 10
+	csel	w0, w1, w0, ne
+	str	w0, [x29, 104]
+	cbnz	w6, .L1344
+	sxtw	x24, w25
+	add	x0, x22, :lo12:.LANCHOR9
+	add	x24, x24, 8
+	mov	w19, -1
+	add	x24, x26, x24, lsl 8
+	mov	w20, 1
+	str	x0, [x29, 96]
+.L1351:
+	ldr	x0, [x29, 96]
+	ldrb	w0, [x0]
+	cmp	w0, 36
+	bne	.L1345
+	mov	x0, x21
+	mov	w2, 0
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+	str	w0, [x24, 8]
+.L1346:
+	ldr	w4, [x29, 124]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1347
+	mov	w3, w4
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	ldr	w4, [x29, 120]
+.L1347:
+	cmn	w4, #1
+	beq	.L1348
+	adrp	x0, .LANCHOR135
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	ldr	x28, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1366
+.L1348:
+	ldr	w0, [x29, 104]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1351
+.L1350:
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	cmp	w0, 36
+	bne	.L1352
+	mov	w2, 0
+.L1389:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_tlc_set_rr_para
+	b	.L1353
+.L1345:
+	mov	w1, w20
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1346
+.L1366:
+	mov	w19, w4
+	b	.L1350
+.L1352:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+.L1353:
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	cmp	w0, 36
+	bne	.L1362
+	ldr	x0, [x29, 112]
+	add	x26, x26, x0, lsl 8
+	mov	w0, 85
+	str	w0, [x26, 2056]
+	mov	w0, 255
+	str	wzr, [x26, 2052]
+	str	wzr, [x26, 2048]
+	str	w0, [x26, 2056]
+.L1362:
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1363
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1363:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1364
 	adrp	x0, .LC55
-	ldr	w2, [x20, 52]
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, w23
+	mov	w1, w20
 	add	x0, x0, :lo12:.LC55
-	mov	w21, w24
 	bl	printf
-	mov	w0, 11
-	strb	w0, [x20, 58]
-	mov	w0, -1
-	str	w0, [x20, 52]
-.L1316:
-	add	x1, x19, :lo12:.LANCHOR36
-	add	x22, x1, x22, lsl 6
-	add	x1, x1, x23, lsl 6
-	ldrb	w0, [x22, 58]
-	strb	w0, [x1, 58]
-	ldr	w0, [x22, 52]
-	str	w0, [x1, 52]
-.L1301:
-	mov	w0, w21
+.L1364:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1317:
-	mov	w0, 12
-	str	wzr, [x20, 52]
-	strb	w0, [x20, 58]
-	b	.L1316
-.L1307:
-	mov	w0, w21
-	mov	w1, 32
-	bl	flash_wait_device_ready
-	mov	w21, w0
-	tbz	x21, 5, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	tst	x21, 15
-	add	x19, x19, x22, lsl 6
-	beq	.L1319
-	mov	w0, 11
-	strb	w0, [x19, 58]
-	b	.L1338
-.L1319:
-	mov	w0, 12
-	str	wzr, [x19, 52]
-	strb	w0, [x19, 58]
-	b	.L1320
-.L1308:
-	mov	w1, 64
-	mov	w0, w21
-	bl	flash_wait_device_ready
-	tbz	x0, 6, .L1320
-	add	x19, x19, :lo12:.LANCHOR36
-	add	x19, x19, x22, lsl 6
-	str	w0, [x19, 52]
-	mov	w0, 6
-	strb	w0, [x19, 58]
-	b	.L1320
-	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
-	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
-	.align	2
-	.global	sblk_wait_write_queue_completed
-	.type	sblk_wait_write_queue_completed, %function
-sblk_wait_write_queue_completed:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	adrp	x19, .LANCHOR90
-	add	x19, x19, :lo12:.LANCHOR90
-.L1340:
-	ldrb	w0, [x19]
-	cmp	w0, 255
-	bne	.L1341
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1341:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1340
-	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
-	.section	.text.ftl_read_page,"ax",@progbits
+.L1344:
+	sxtw	x24, w25
+	orr	w23, w23, w6, lsl 24
+	add	x24, x24, 8
+	add	x0, x22, :lo12:.LANCHOR9
+	add	x24, x26, x24, lsl 8
+	mov	w19, -1
+	mov	w20, 1
+	str	x0, [x29, 104]
+.L1360:
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	cmp	w0, 36
+	bne	.L1354
+	mov	x0, x21
+	mov	w2, 1
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+.L1388:
+	str	w0, [x24, 8]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	ldr	w4, [x29, 124]
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1356
+	mov	w3, w4
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+	ldr	w4, [x29, 120]
+.L1356:
+	cmn	w4, #1
+	beq	.L1357
+	adrp	x0, .LANCHOR135
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	ldr	x28, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1367
+.L1357:
+	ldr	w0, [x29, 96]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1360
+.L1359:
+	ldrb	w0, [x22, #:lo12:.LANCHOR9]
+	cmp	w0, 36
+	bne	.L1361
+	mov	w2, 1
+	b	.L1389
+.L1354:
+	mov	x0, x21
+	mov	w1, w20
+	bl	toshiba_3d_set_tlc_rr_para
+	mov	w0, 38
+	b	.L1388
+.L1367:
+	mov	w19, w4
+	b	.L1359
+.L1361:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1353
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",@progbits
 	.align	2
-	.global	ftl_read_page
-	.type	ftl_read_page, %function
-ftl_read_page:
-	stp	x29, x30, [sp, -64]!
+	.global	toshiba_read_retrial
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	mov	w20, w1
-	mov	x21, x2
-	mov	x22, x3
-	str	x23, [sp, 48]
-	mov	w23, w4
-	bl	sblk_wait_write_queue_completed
-	mov	w4, w23
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w20
-	mov	w0, w19
-	ldr	x23, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
-	b	flash_read_page_en
-	.size	ftl_read_page, .-ftl_read_page
-	.section	.text.ftl_read_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_read_ppa_page
-	.type	ftl_read_ppa_page, %function
-ftl_read_ppa_page:
-	stp	x29, x30, [sp, -48]!
-	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
 	stp	x19, x20, [sp, 16]
-	mov	w19, w0
-	stp	x21, x22, [sp, 32]
-	mov	x20, x1
-	mov	x21, x2
-	mov	w22, w3
-	bl	sblk_wait_write_queue_completed
-	ubfx	x0, x19, 21, 3
-	mov	w4, w22
-	mov	x3, x21
-	mov	x2, x20
-	mov	w1, w19
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	flash_read_page_en
-	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
-	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_read_test
-	.type	ftl_open_sblk_read_test, %function
-ftl_open_sblk_read_test:
-	stp	x29, x30, [sp, -96]!
-	and	w13, w0, 65535
-	mov	w0, w13
-	add	x29, sp, 0
+	mov	x28, x4
+	stp	x25, x26, [sp, 64]
+	and	w19, w0, 255
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR79
-	adrp	x24, .LANCHOR45
-	add	x23, x23, :lo12:.LANCHOR79
-	add	x24, x24, :lo12:.LANCHOR45
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	add	x1, x29, 80
-	mov	w20, 0
-	bl	ftl_get_blk_list_in_sblk
-	strb	w0, [x29, 73]
-	strh	w13, [x29, 64]
-.L1348:
-	ldrh	w0, [x23]
-	cmp	w0, w20
-	bls	.L1347
-	adrp	x22, .LANCHOR69
-	adrp	x21, .LANCHOR121
-	mov	w19, 0
-	add	x22, x22, :lo12:.LANCHOR69
-	add	x21, x21, :lo12:.LANCHOR121
-	b	.L1350
-.L1353:
-	add	x0, x29, 64
-	mov	w1, 65535
-	add	x0, x0, x19, sxtw 1
-	ldrh	w0, [x0, 16]
-	cmp	w0, w1
-	bne	.L1349
-.L1352:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-.L1350:
-	ldrb	w0, [x22]
-	cmp	w0, w19
-	bhi	.L1353
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1348
-.L1349:
-	adrp	x1, .LANCHOR75
-	ldrb	w3, [x24]
-	mov	x2, x21
-	ldrh	w4, [x1, #:lo12:.LANCHOR75]
-	adrp	x1, ftl_tmp_buffer
-	add	x1, x1, :lo12:ftl_tmp_buffer
-	madd	w0, w4, w0, w20
-	bl	ftl_read_ppa_page
-	cmp	w0, 512
-	bne	.L1352
-.L1347:
+	and	x26, x19, 255
+	stp	w5, w2, [x29, 120]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR13
+	adrp	x1, .LANCHOR9
+	str	x1, [x29, 112]
+	add	x21, x26, 8
+	ldr	x22, [x0, #:lo12:.LANCHOR13]
+	ldrb	w0, [x1, #:lo12:.LANCHOR9]
+	sub	w0, w0, #67
+	add	x21, x22, x21, lsl 8
+	and	w0, w0, 255
+	cmp	w0, 1
+	bls	.L1408
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	cbz	w0, .L1409
+	mov	w23, 1
+	mov	w0, 1
+	bl	nandc_set_if_mode
+.L1392:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 92
+	str	w1, [x0, 2056]
+	mov	w1, 197
+	str	w1, [x0, 2056]
+.L1391:
+	sxtw	x0, w19
+	mov	w20, 1
+	add	x0, x0, 8
+	mov	w24, -1
+	add	x0, x22, x0, lsl 8
+	str	x0, [x29, 104]
+.L1393:
+	adrp	x0, .LANCHOR137
+	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+	add	w0, w0, 1
+	cmp	w20, w0
+	bcc	.L1402
+	mov	w25, w24
+.L1401:
+	ldr	x0, [x29, 112]
+	mov	w1, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1403
+	bl	sandisk_set_rr_para
+.L1404:
+	sxtw	x19, w19
+	mov	w0, 255
+	add	x19, x19, 8
+	add	x22, x22, x19, lsl 8
+	str	w0, [x22, 8]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1405
+	cmn	w25, #1
+	mov	w0, 256
+	csel	w25, w25, w0, eq
+.L1405:
+	cmp	w25, 256
+	ccmn	w25, #1, 4, ne
+	bne	.L1406
+	ldr	w2, [x29, 124]
+	adrp	x0, .LC55
+	mov	w4, w25
+	mov	w3, w20
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC55
+	bl	printf
+.L1406:
+	bl	nandc_wait_flash_ready
+	cbz	w23, .L1390
+	mov	w0, 4
+	bl	nandc_set_if_mode
+.L1390:
+	mov	w0, w25
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 96
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
-	.section	.text.sblk_read_page,"ax",@progbits
+.L1409:
+	mov	w23, 0
+	b	.L1392
+.L1408:
+	mov	w23, 0
+	b	.L1391
+.L1402:
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1394
+	bl	sandisk_set_rr_para
+.L1395:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, #:lo12:.LANCHOR9]
+	cmp	w0, 34
+	bne	.L1396
+	adrp	x0, .LANCHOR137
+	ldrb	w0, [x0, #:lo12:.LANCHOR137]
+	sub	w0, w0, #3
+	cmp	w20, w0
+	bne	.L1396
+	ldr	x1, [x29, 104]
+	mov	w0, 179
+	str	w0, [x1, 8]
+.L1396:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 38
+	ldr	w4, [x29, 120]
+	mov	x3, x28
+	mov	x2, x27
+	str	w1, [x0, 2056]
+	mov	w1, 93
+	str	w1, [x0, 2056]
+	mov	w0, w19
+	ldr	w1, [x29, 124]
+	bl	flash_read_page
+	mov	w25, w0
+	cmn	w0, #1
+	beq	.L1399
+	cmn	w24, #1
+	csel	w24, w24, w0, ne
+	adrp	x0, .LANCHOR135
+	ldr	x27, [x0, #:lo12:.LANCHOR135]
+	adrp	x0, .LANCHOR136
+	ldr	x28, [x0, #:lo12:.LANCHOR136]
+	adrp	x0, .LANCHOR34
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1401
+.L1399:
+	add	w20, w20, 1
+	b	.L1393
+.L1394:
+	bl	toshiba_set_rr_para
+	b	.L1395
+.L1403:
+	bl	toshiba_set_rr_para
+	b	.L1404
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",@progbits
 	.align	2
-	.global	sblk_read_page
-	.type	sblk_read_page, %function
-sblk_read_page:
-	stp	x29, x30, [sp, -80]!
+	.global	hynix_read_retrial
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	stp	x29, x30, [sp, -128]!
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	and	w21, w1, 255
-	stp	x19, x20, [sp, 16]
-	mov	w22, w21
 	stp	x23, x24, [sp, 48]
-	mov	x20, x0
-	adrp	x23, .LANCHOR90
-	adrp	x24, .LANCHOR36
-	mov	x19, x0
-	add	x23, x23, :lo12:.LANCHOR90
-	add	x24, x24, :lo12:.LANCHOR36
+	and	x23, x0, 255
+	adrp	x0, .LANCHOR12
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	mov	w27, w5
+	ldr	x28, [x0, #:lo12:.LANCHOR12]
+	mov	w22, w2
 	stp	x25, x26, [sp, 64]
-.L1359:
-	cbnz	w22, .L1363
-.L1371:
-	adrp	x19, .LANCHOR36
-	add	x19, x19, :lo12:.LANCHOR36
-.L1364:
-	cbnz	w21, .L1367
-	mov	w0, 0
+	mov	x25, x3
+	add	x28, x28, 112
+	stp	x19, x20, [sp, 16]
+	add	x0, x28, x23
+	mov	x26, x4
+	mov	x21, x23
+	mov	w19, -1
+	ldrb	w24, [x28, 2]
+	ldrb	w20, [x0, 8]
+	bl	nandc_wait_flash_ready
+	adrp	x6, .LANCHOR34
+	add	x6, x6, :lo12:.LANCHOR34
+	mov	w5, 0
+	adrp	x7, .LANCHOR135
+	adrp	x8, .LANCHOR136
+.L1423:
+	cmp	w5, w24
+	bcc	.L1428
+.L1427:
+	adrp	x0, .LANCHOR34
+	add	x23, x28, x23
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	strb	w20, [x23, 8]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1429
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1429:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1422
+	adrp	x0, .LC56
+	mov	w4, w19
+	mov	w3, w5
+	mov	w2, w22
+	mov	w1, w5
+	add	x0, x0, :lo12:.LC56
+	bl	printf
+.L1422:
+	mov	w0, w19
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
 	ret
-.L1363:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1360:
-	mov	w1, 0
-	mov	w0, w26
-	bl	queue_lun_state
-	cbnz	w0, .L1361
-	ldr	w1, [x19, 40]
-	mov	w0, 48
-	bl	flash_start_page_read
-	strb	wzr, [x19, 59]
-	mov	w0, 1
-	strb	w0, [x19, 58]
-	mov	w0, -1
-	strb	w0, [x19]
-	mov	x1, x19
-	mov	x0, x23
-	bl	buf_add_tail
-	subs	w22, w22, #1
-	beq	.L1371
-	ubfiz	x19, x25, 6, 8
-	add	x19, x24, x19
-	b	.L1359
-.L1361:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1360
-.L1367:
-	ldrb	w0, [x20, 58]
-	cmp	w0, 12
-	bne	.L1365
-	ldrb	w20, [x20]
-	sub	w21, w21, #1
-	add	x20, x19, x20, lsl 6
-	b	.L1364
-.L1365:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1364
-	.size	sblk_read_page, .-sblk_read_page
-	.section	.text.gc_check_data_one_wl,"ax",@progbits
+.L1428:
+	add	w20, w20, 1
+	stp	x6, x8, [x29, 96]
+	and	w20, w20, 255
+	str	x7, [x29, 112]
+	cmp	w24, w20
+	str	w5, [x29, 124]
+	csel	w20, w20, wzr, hi
+	mov	w0, w21
+	mov	w1, w20
+	bl	hynix_set_rr_para
+	mov	w4, w27
+	mov	x3, x26
+	mov	x2, x25
+	mov	w1, w22
+	mov	w0, w21
+	bl	flash_read_page
+	ldr	w5, [x29, 124]
+	cmn	w0, #1
+	ldp	x6, x8, [x29, 96]
+	ldr	x7, [x29, 112]
+	beq	.L1425
+	ldrb	w1, [x6]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x25, [x7, #:lo12:.LANCHOR135]
+	ldr	x26, [x8, #:lo12:.LANCHOR136]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1431
+.L1425:
+	add	w5, w5, 1
+	b	.L1423
+.L1431:
+	mov	w19, w0
+	b	.L1427
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tunning_read,"ax",@progbits
 	.align	2
-	.global	gc_check_data_one_wl
-	.type	gc_check_data_one_wl, %function
-gc_check_data_one_wl:
-	sub	sp, sp, #112
-	adrp	x0, .LANCHOR60
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	adrp	x19, .LANCHOR58
-	stp	x21, x22, [sp, 48]
-	add	x21, x19, :lo12:.LANCHOR58
-	ldr	x20, [x0, #:lo12:.LANCHOR60]
-	stp	x23, x24, [sp, 64]
-	ldr	x0, [x21, 8]
-	stp	x25, x26, [sp, 80]
-	str	x27, [sp, 96]
-	cbnz	x0, .L1374
-	mov	w0, 1
-	bl	buf_alloc
-	str	x0, [x21, 8]
-.L1374:
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x21, [x0, 8]
-	cbz	x21, .L1375
-	adrp	x26, .LANCHOR75
-	adrp	x27, .LANCHOR64
-	add	x25, x20, 96
-	add	x26, x26, :lo12:.LANCHOR75
-	add	x27, x27, :lo12:.LANCHOR64
+	.global	flash_ddr_tunning_read
+	.type	flash_ddr_tunning_read, %function
+flash_ddr_tunning_read:
+	stp	x29, x30, [sp, -144]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LC57
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR34
+	stp	x25, x26, [sp, 64]
+	add	x21, x21, :lo12:.LC57
+	stp	x27, x28, [sp, 80]
+	mov	x26, x3
+	str	w4, [x29, 120]
+	add	x22, x22, :lo12:.LANCHOR34
+	str	x2, [x29, 128]
+	mov	w28, 0
+	str	w0, [x29, 136]
+	bl	nandc_get_ddr_para
+	mov	w23, 0
+	str	w0, [x29, 124]
 	mov	w24, 0
-.L1376:
-	ldrb	w0, [x20, 89]
-	cmp	w24, w0
-	bge	.L1386
-	mov	w23, 1
-	add	x22, x19, :lo12:.LANCHOR58
-	b	.L1387
-.L1375:
-	adrp	x1, .LANCHOR122
-	adrp	x0, .LC0
-	mov	w2, 333
-	add	x1, x1, :lo12:.LANCHOR122
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1377:
-	b	.L1377
-.L1385:
-	ldrh	w0, [x25]
-	ldrh	w1, [x26]
-	ldrb	w2, [x27]
-	cmp	w2, 3
-	mul	w1, w0, w1
-	ldrh	w0, [x22, 16]
-	bne	.L1378
-	add	w0, w0, w1
-	orr	w0, w0, w23, lsl 24
-.L1398:
-	str	w0, [x21, 40]
-	mov	w1, 1
+	adrp	x0, .LANCHOR29
+	mov	w27, 1024
+	add	x0, x0, :lo12:.LANCHOR29
+	mov	w25, 6
+	mov	w19, -1
+	str	wzr, [x29, 140]
+	str	x0, [x29, 112]
+.L1447:
+	mov	w0, w25
+	bl	nandc_set_ddr_para
+	ldr	w4, [x29, 120]
+	mov	x3, x26
+	ldrb	w0, [x29, 136]
+	mov	w1, w20
+	ldr	x2, [x29, 128]
+	bl	flash_read_page
+	mov	w4, w0
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0]
+	tbz	x0, 4, .L1442
+	mov	w3, w4
+	str	w4, [x29, 108]
+	mov	w2, w20
+	mov	w1, w25
 	mov	x0, x21
-	bl	sblk_read_page
-	ldr	w2, [x21, 52]
-	adrp	x1, .LANCHOR107
-	cmn	w2, #1
-	beq	.L1381
-	ldrh	w0, [x22, 22]
-	ldr	x4, [x1, #:lo12:.LANCHOR107]
-	ldr	x3, [x21, 24]
-	lsl	x0, x0, 2
-	ldr	w5, [x4, x0]
-	ldr	w4, [x3, 4]
-	cmp	w5, w4
-	bne	.L1381
-	adrp	x4, .LANCHOR108
-	ldr	x4, [x4, #:lo12:.LANCHOR108]
-	ldr	w4, [x4, x0]
-	ldr	w0, [x3, 8]
+	bl	printf
+	ldr	w4, [x29, 108]
+.L1442:
+	add	w0, w27, 1
 	cmp	w4, w0
-	beq	.L1382
-.L1381:
-	ldrh	w0, [x22, 22]
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	lsl	x0, x0, 2
-	ldr	w3, [x1, x0]
-	cmn	w3, #1
-	beq	.L1382
-	adrp	x1, .LANCHOR22
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 10, .L1383
-	ldr	x1, [x21, 24]
-	adrp	x4, .LANCHOR108
-	ldr	x4, [x4, #:lo12:.LANCHOR108]
-	ldr	w5, [x1, 12]
-	str	w5, [sp]
-	ldr	w4, [x4, x0]
-	adrp	x0, .LC56
-	ldp	w5, w6, [x1]
-	add	x0, x0, :lo12:.LC56
-	ldr	w7, [x1, 8]
-	ldr	w1, [x21, 40]
+	bhi	.L1443
+	adrp	x0, .LANCHOR135
+	ldr	x0, [x0, #:lo12:.LANCHOR135]
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR136
+	ldr	x26, [x0, #:lo12:.LANCHOR136]
+	ldrb	w0, [x22]
+	cmp	w4, w0, lsr 2
+	bcs	.L1452
+	add	w24, w24, 1
+	cmp	w24, 7
+	bls	.L1452
+	sub	w28, w25, w24
+	mov	w27, w4
+	mov	w19, 0
+.L1445:
+	ldr	w0, [x29, 140]
+	cmp	w24, w23
+	csel	w28, w28, w0, cs
+.L1446:
+	cbz	w28, .L1448
+	adrp	x0, .LANCHOR34
+	mov	w1, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR34]
+	udiv	w0, w0, w1
+	cmp	w0, w27
+	bls	.L1448
+	mov	w1, w28
+	adrp	x0, .LC58
+	add	x0, x0, :lo12:.LC58
 	bl	printf
-.L1383:
-	adrp	x0, .LANCHOR56
-	ldrh	w1, [x20, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	strh	wzr, [x0, x1, lsl 1]
-	mov	w0, -1
-.L1373:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x29, x30, [sp, 16]
-	ldr	x27, [sp, 96]
-	add	sp, sp, 112
+	mov	w0, w28
+.L1462:
+	bl	nandc_set_ddr_para
+	cbz	w19, .L1441
+	ldr	w1, [x29, 136]
+	adrp	x0, .LC59
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC59
+	mov	w27, w19
+	bl	printf
+.L1441:
+	mov	w0, w27
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
 	ret
-.L1378:
-	cmp	w2, 2
-	bne	.L1380
-	sub	w0, w0, #1
-	add	w1, w23, w1
-	add	w0, w0, w1
-	orr	w0, w0, 33554432
-	b	.L1398
-.L1380:
-	add	w0, w0, w1
-	b	.L1398
-.L1382:
-	ldrh	w0, [x22, 22]
-	add	w23, w23, 1
-	add	w0, w0, 1
-	strh	w0, [x22, 22]
-.L1387:
-	ldrh	w0, [x22, 20]
-	cmp	w23, w0
-	ble	.L1385
-	add	w24, w24, 1
-	add	x25, x25, 2
-	b	.L1376
-.L1386:
-.L1384:
-	add	x19, x19, :lo12:.LANCHOR58
-	ldrh	w0, [x19, 16]
-	add	w0, w0, 1
-	strh	w0, [x19, 16]
-	mov	w0, 0
-	b	.L1373
-	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
-	.section	.text.flash_prog_page,"ax",@progbits
+.L1443:
+	cmp	w24, w23
+	bls	.L1453
+	sub	w0, w28, w24
+	str	w0, [x29, 140]
+	cmp	w24, 7
+	bhi	.L1446
+	mov	w23, w24
+.L1453:
+	mov	w24, 0
+	b	.L1444
+.L1452:
+	mov	w28, w25
+	mov	w27, w4
+	mov	w19, 0
+.L1444:
+	add	w25, w25, 2
+	cmp	w25, 50
+	bne	.L1447
+	b	.L1445
+.L1448:
+	ldrb	w0, [x29, 124]
+	b	.L1462
+	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	.section	.text.flash_read_page_en,"ax",@progbits
 	.align	2
-	.global	flash_prog_page
-	.type	flash_prog_page, %function
-flash_prog_page:
+	.global	flash_read_page_en
+	.type	flash_read_page_en, %function
+flash_read_page_en:
 	stp	x29, x30, [sp, -96]!
+	and	w0, w0, 255
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR6
-	str	x27, [sp, 80]
+	mov	w19, w1
+	adrp	x1, .LANCHOR15
 	stp	x21, x22, [sp, 32]
-	and	x19, x20, 255
-	ldr	x27, [x0, #:lo12:.LANCHOR6]
-	adrp	x0, .LANCHOR22
 	stp	x23, x24, [sp, 48]
-	mov	w21, w1
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	add	x23, x19, 8
+	ldrb	w1, [x1, #:lo12:.LANCHOR15]
 	stp	x25, x26, [sp, 64]
-	and	w24, w1, 2097151
-	mov	x25, x2
-	mov	x26, x3
-	ubfx	x22, x21, 24, 2
-	add	x23, x27, x23, lsl 8
-	tbz	x0, 4, .L1400
-	adrp	x0, .LC57
-	mov	w3, w4
-	mov	w2, w22
-	add	x0, x0, :lo12:.LC57
+	str	x27, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1464
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC0
+	mov	w2, 399
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1400:
-	bl	nandc_wait_flash_ready
-	mov	w0, w20
-	bl	hynix_reconfig_rr_para
-	mov	w0, w20
-	bl	nandc_cs
-	mov	w0, w20
-	cbnz	w22, .L1401
-	bl	flash_enter_slc_mode
-.L1402:
-	add	x19, x27, x19, lsl 8
-	mov	w0, 128
-	and	w21, w21, 255
-	str	w0, [x19, 2056]
-	lsr	w0, w24, 8
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w21, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w24, 16
-	str	w0, [x19, 2052]
-	mov	w0, w24
-	bl	nandc_set_seed
-	adrp	x0, .LANCHOR19+9
-	mov	x3, x26
-	mov	x2, x25
-	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	mov	w0, 16
-	str	w0, [x19, 2056]
-	bl	nandc_wait_flash_ready
-	mov	x0, x23
-	bl	flash_read_status
-	mov	w5, w0
-	cbnz	w22, .L1403
+.L1465:
+	b	.L1465
+.L1464:
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	mov	x22, x2
+	mov	x23, x3
+	mov	w24, w4
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1466
+	adrp	x0, .LC60
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC60
+	bl	printf
+.L1466:
+	tst	x19, 50331648
+	bne	.L1467
+	adrp	x0, .LANCHOR18
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1468
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	cbz	w0, .L1467
+.L1468:
+	adrp	x0, .LANCHOR20
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1469
+	add	w19, w0, w19, lsl 1
+.L1467:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
 	mov	w0, w20
-	bl	flash_exit_slc_mode
-.L1403:
+	bl	flash_read_page
+	mov	w21, w0
+	cmn	w0, #1
+	bne	.L1463
+	adrp	x25, .LANCHOR36
+	mov	x26, x25
+	ldrb	w27, [x25, #:lo12:.LANCHOR36]
+	cbnz	w27, .L1471
+.L1474:
+	adrp	x0, .LANCHOR139
+	ldr	x6, [x0, #:lo12:.LANCHOR139]
+	cbnz	x6, .L1472
+.L1473:
+	ldrb	w4, [x26, #:lo12:.LANCHOR36]
+	mov	w3, -1
+	mov	w2, w19
+	mov	w1, 0
+	adrp	x0, .LC61
+	add	x0, x0, :lo12:.LC61
+	bl	printf
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	cbz	w0, .L1463
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
 	mov	w0, w20
-	bl	nandc_de_cs
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
-	and	w0, w5, 4
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tunning_read
+.L1469:
+	adrp	x1, .LANCHOR21
+	add	x1, x1, :lo12:.LANCHOR21
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1467
+.L1471:
+	strb	wzr, [x25, #:lo12:.LANCHOR36]
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_read_page
+	strb	w27, [x25, #:lo12:.LANCHOR36]
+	cmn	w0, #1
+	beq	.L1474
+.L1492:
+	mov	w21, w0
+.L1463:
+	mov	w0, w21
 	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
 	ldp	x29, x30, [sp], 96
 	ret
-.L1401:
-	bl	flash_exit_slc_mode
-	b	.L1402
-	.size	flash_prog_page, .-flash_prog_page
-	.section	.text.flash_test_blk,"ax",@progbits
+.L1472:
+	mov	w5, w24
+	mov	x4, x23
+	mov	x3, x22
+	mov	w2, w19
+	mov	w1, 0
+	mov	w0, w20
+	blr	x6
+	cmn	w0, #1
+	bne	.L1492
+	b	.L1473
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",@progbits
 	.align	2
-	.global	flash_test_blk
-	.type	flash_test_blk, %function
-flash_test_blk:
-	stp	x29, x30, [sp, -64]!
+	.global	flash_get_last_written_page
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	stp	x29, x30, [sp, -96]!
+	and	w1, w1, 65535
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w1, 65535
 	stp	x21, x22, [sp, 32]
-	ands	w21, w0, 255
-	str	x23, [sp, 48]
-	bne	.L1409
-	adrp	x0, .LANCHOR123
-	ldrb	w0, [x0, #:lo12:.LANCHOR123]
-	cmp	w0, w19
-	bhi	.L1413
-.L1409:
-	adrp	x22, .LANCHOR118
-	adrp	x23, .LANCHOR119
-	mov	w2, 32
-	mov	w1, 165
-	ldr	x0, [x22, #:lo12:.LANCHOR118]
-	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR119]
-	mov	w2, 8
-	mov	w1, 90
-	bl	ftl_memset
-	adrp	x0, .LANCHOR13
-	ldrh	w20, [x0, #:lo12:.LANCHOR13]
-	mov	w0, w21
-	mul	w20, w20, w19
-	mov	w1, w20
-	bl	flash_erase_block
-	cmn	w0, #1
-	beq	.L1411
-	adrp	x19, .LANCHOR19
-	add	x19, x19, :lo12:.LANCHOR19
-	ldr	x3, [x22, #:lo12:.LANCHOR118]
-	mov	w1, w20
-	ldr	x2, [x23, #:lo12:.LANCHOR119]
-	mov	w0, w21
-	ldrb	w4, [x19, 9]
-	bl	flash_prog_page
-	cmn	w0, #1
-	beq	.L1411
-	ldrb	w4, [x19, 9]
-	mov	w1, w20
-	ldr	x3, [x22, #:lo12:.LANCHOR118]
-	mov	w0, w21
-	ldr	x2, [x23, #:lo12:.LANCHOR119]
-	bl	flash_read_page
-	mov	w19, w0
-	cmn	w0, #1
-	beq	.L1411
-	ldr	x0, [x23, #:lo12:.LANCHOR119]
-	ldr	w1, [x0]
-	mov	w0, 23130
-	movk	w0, 0x5a5a, lsl 16
-	cmp	w1, w0
-	bne	.L1411
-	ldr	x0, [x22, #:lo12:.LANCHOR118]
-	ldr	w1, [x0]
-	mov	w0, 42405
-	movk	w0, 0xa5a5, lsl 16
-	cmp	w1, w0
-	beq	.L1412
-.L1411:
-	mov	w19, -1
-.L1412:
-	mov	w1, w20
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR121
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	x22, x2
+	ldrh	w19, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR26+26
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	ldrh	w25, [x0, #:lo12:.LANCHOR26+26]
+	sub	w19, w19, #1
+	sxth	w19, w19
+	mov	w24, w4
 	mov	w0, w21
-	bl	flash_erase_block
+	str	x27, [sp, 80]
+	mul	w25, w25, w1
+	add	w1, w19, w25
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1494
+	mov	w26, 0
+	mov	w27, 2
+.L1495:
+	cmp	w26, w19
+	ble	.L1498
+.L1494:
 	mov	w0, w19
-.L1408:
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L1413:
-	mov	w0, 0
-	b	.L1408
-	.size	flash_test_blk, .-flash_test_blk
-	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
+.L1498:
+	add	w20, w26, w19
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w0, w21
+	sdiv	w20, w20, w27
+	add	w1, w25, w20, sxth
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1496
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L1495
+.L1496:
+	add	w20, w20, 1
+	sxth	w26, w20
+	b	.L1495
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
 	.align	2
-	.global	flash_start_tlc_page_prog
-	.type	flash_start_tlc_page_prog, %function
-flash_start_tlc_page_prog:
-	stp	x29, x30, [sp, -48]!
-	and	w8, w0, 255
-	adrp	x0, .LANCHOR8
-	and	w3, w3, 255
+	.global	flash_get_last_written_page_ext
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	adrp	x4, .LANCHOR96
+	mov	w6, 21
+	and	w0, w0, 65535
+	mov	w5, 1
+	ldrh	w4, [x4, #:lo12:.LANCHOR96]
+	sub	w6, w6, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	lsl	w5, w5, w6
+	sub	w5, w5, #1
+	and	w1, w5, w0
+	asr	w0, w0, w6
+	b	flash_get_last_written_page
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR20
+	stp	x23, x24, [sp, 48]
+	mov	w24, 21321
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR140
+	stp	x27, x28, [sp, 80]
+	mov	x21, x26
+	add	x27, x22, :lo12:.LANCHOR20
 	stp	x19, x20, [sp, 16]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	str	x21, [sp, 32]
-	cmp	w0, w3
-	bhi	.L1425
-	adrp	x1, .LANCHOR124
-	adrp	x0, .LC0
-	mov	w2, 655
-	add	x1, x1, :lo12:.LANCHOR124
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1426:
-	b	.L1426
-.L1425:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	and	w7, w1, 255
-	and	w21, w2, 255
-	ldrb	w20, [x0, w3, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x19, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w20
-	bl	nandc_cs
-	cbz	w8, .L1427
-	sxtw	x0, w20
-	add	x0, x0, 8
-	add	x0, x19, x0, lsl 8
-	str	w8, [x0, 8]
-.L1427:
-	ubfiz	x0, x20, 8, 8
-	add	x19, x19, x0
-	mov	w0, 128
-	str	w7, [x19, 2056]
-	str	w0, [x19, 2056]
-	and	w0, w4, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w4, 16
-	add	w4, w4, w4, lsl 1
-	str	w0, [x19, 2052]
-	sub	w0, w4, #1
-	add	w0, w0, w7
-	bl	nandc_set_seed
-	mov	x3, x6
-	adrp	x0, .LANCHOR19+9
-	mov	x2, x5
-	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	str	w21, [x19, 2056]
-	mov	w0, w20
-	ldr	x21, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs
-	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
-	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
-	.align	2
-	.type	queue_tlc_prog_cmd, %function
-queue_tlc_prog_cmd:
-	stp	x29, x30, [sp, -48]!
-	mov	w2, 26
-	mov	w1, 1
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
-	ldr	w20, [x0, 40]
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	str	x21, [sp, 32]
-	and	w21, w20, 2097151
-	ubfx	x20, x20, 21, 3
-	mov	w4, w21
-	ldrb	w0, [x0, 60]
-	mov	w3, w20
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x19]
-	mov	w4, w21
-	mov	w3, w20
-	mov	w2, 26
-	mov	w1, 2
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x19, 16]
-	mov	w4, w21
-	ldr	x7, [x19]
-	mov	w3, w20
-	mov	w2, 16
-	mov	w1, 3
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	ldr	x1, [x19]
-	mov	w0, 4
-	strb	w0, [x1, 58]
-	mov	w0, 1
-	strb	w0, [x1, 59]
+	movk	w24, 0x5359, lsl 16
+	mov	w19, 4
+.L1504:
+	ldrh	w1, [x27]
+	adrp	x20, .LANCHOR12
+	ldr	x3, [x26, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	mov	w0, 0
+	add	x28, x26, :lo12:.LANCHOR140
+	add	x25, x20, :lo12:.LANCHOR12
+	mul	w1, w1, w19
+	mov	x23, x20
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1502
+	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	ldr	w0, [x2]
+	cmp	w0, w24
+	beq	.L1503
+.L1502:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L1504
+.L1525:
 	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
+.L1501:
 	ldp	x19, x20, [sp, 16]
-	ldr	x21, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	b	buf_add_tail
-	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
-	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1512:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w24
+	bne	.L1513
+	ldr	w19, [x0, 4]
+.L1506:
+	add	x24, x20, :lo12:.LANCHOR141
+	ldrh	w0, [x22, #:lo12:.LANCHOR20]
+	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	ldrb	w1, [x24, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1507
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L1507
+	ldr	w1, [x0, 4]
+	cmp	w19, w1
+	bcs	.L1507
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x20, #:lo12:.LANCHOR141]
+	strb	w0, [x24, 1]
+.L1507:
+	ldrb	w1, [x20, #:lo12:.LANCHOR141]
+	add	x24, x20, :lo12:.LANCHOR141
+	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	sxth	w19, w0
+	add	w0, w0, 1
+	ldrb	w20, [x20, #:lo12:.LANCHOR141]
+	strh	w0, [x24, 2]
+	ldrh	w0, [x22, #:lo12:.LANCHOR20]
+	mov	w22, 21321
+	movk	w22, 0x5359, lsl 16
+	madd	w20, w20, w0, w19
+.L1508:
+	tbz	w19, #31, .L1510
+	cmn	w19, #1
+	bne	.L1511
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	ldr	w1, [x0]
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
+	bl	printf
+	b	.L1525
+.L1510:
+	ldr	x3, [x21, #:lo12:.LANCHOR140]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR12]
+	mov	w1, w20
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1509
+	ldr	x0, [x23, #:lo12:.LANCHOR12]
+	ldr	w0, [x0]
+	cmp	w0, w22
+	bne	.L1509
+.L1511:
+	mov	w0, 0
+	b	.L1501
+.L1509:
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	sxth	w19, w19
+	b	.L1508
+.L1503:
+	adrp	x20, .LANCHOR141
+	add	x1, x20, :lo12:.LANCHOR141
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x27]
+	ldr	x3, [x28]
+	strb	w0, [x20, #:lo12:.LANCHOR141]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L1512
+.L1513:
+	mov	w19, 0
+	b	.L1506
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.flash_ddr_para_scan,"ax",@progbits
 	.align	2
-	.global	sblk_tlc_prog_one_page
-	.type	sblk_tlc_prog_one_page, %function
-sblk_tlc_prog_one_page:
-	stp	x29, x30, [sp, -32]!
+	.global	flash_ddr_para_scan
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
-	ldr	w20, [x0, 40]
-.L1435:
-	mov	w1, 1
-	mov	w0, w20
-	bl	queue_lun_state
-	cbnz	w0, .L1436
+	adrp	x20, .LANCHOR32
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	ldrb	w0, [x20, #:lo12:.LANCHOR32]
+	adrp	x19, .LANCHOR42
+	stp	x23, x24, [sp, 48]
+	mov	w21, 1
+	mov	w23, w1
+	str	x25, [sp, 64]
+	strb	w21, [x19, #:lo12:.LANCHOR42]
+	adrp	x24, .LANCHOR143
+	bl	flash_set_interface_mode
+	adrp	x25, .LANCHOR142
+	ldrb	w0, [x20, #:lo12:.LANCHOR32]
+	bl	nandc_set_if_mode
+	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_ddr_tunning_read
+	ldr	x3, [x25, #:lo12:.LANCHOR142]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR143]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_read_page
+	cmn	w0, #1
 	mov	x0, x19
-	bl	queue_tlc_prog_cmd
+	bne	.L1527
+	ldrb	w1, [x20, #:lo12:.LANCHOR32]
+	tbz	x1, 0, .L1527
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, w21
+	bl	nandc_set_if_mode
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+.L1528:
 	mov	w0, 0
+	ldr	x25, [sp, 64]
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L1436:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1435
-	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
-	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
+.L1527:
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR42]
+	b	.L1528
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_page_read,"ax",@progbits
 	.align	2
-	.global	sblk_xlc_prog_pages
-	.type	sblk_xlc_prog_pages, %function
-sblk_xlc_prog_pages:
-	stp	x29, x30, [sp, -64]!
+	.global	flash_complete_page_read
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w0
+	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldr	x0, [x0]
 	stp	x21, x22, [sp, 32]
-	mov	x22, x1
-	stp	x23, x24, [sp, 48]
-	mov	w24, w2
-	ldr	w20, [x0, 40]
-.L1439:
-	mov	w1, 1
-	mov	w0, w20
-	bl	queue_lun_state
-	cbnz	w0, .L1440
-	cmp	w24, 2
-	bne	.L1441
-	ldr	x0, [x19]
-	mov	w2, 17
-	ldr	x1, [x22]
-	ldr	w20, [x0, 40]
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	and	w23, w20, 2097151
-	ldrb	w0, [x0, 60]
-	ubfx	x20, x20, 21, 3
-	mov	w4, w23
-	mov	w3, w20
-	ldr	w21, [x1, 40]
-	mov	w1, 1
-	bl	flash_start_tlc_page_prog
-	and	w21, w21, 2097151
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
-	mov	w4, w21
-	ldr	x0, [x22]
-	mov	w3, w20
-	mov	w2, 26
-	mov	w1, 1
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldp	x7, x0, [x19]
-	mov	w4, w23
-	mov	w3, w20
-	mov	w1, w24
-	mov	w2, 17
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
-	mov	w4, w21
-	ldr	x0, [x22, 8]
-	mov	w3, w20
-	mov	w1, w24
-	mov	w2, 26
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x7, [x19]
-	mov	w4, w23
-	ldr	x0, [x19, 16]
-	mov	w3, w20
-	mov	w2, 17
-	mov	w1, 3
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	bl	nandc_wait_flash_ready
-	ldr	x0, [x22, 16]
-	mov	w1, 3
-	ldr	x7, [x19]
-	mov	w4, w21
-	mov	w3, w20
-	mov	w2, 16
-	ldr	x5, [x0, 8]
-	ldr	x6, [x0, 24]
-	ldrb	w0, [x7, 60]
-	bl	flash_start_tlc_page_prog
-	ldr	x1, [x19]
-	mov	w0, 5
-	strb	w0, [x1, 58]
-	mov	w0, 1
-	strb	w0, [x1, 59]
-	mov	w0, -1
-	strb	w0, [x1]
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	buf_add_tail
-.L1442:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 64
-	ret
-.L1440:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1439
-.L1441:
-	mov	x0, x19
-	bl	queue_tlc_prog_cmd
-	b	.L1442
-	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
-	.section	.text.flash_start_page_prog,"ax",@progbits
-	.align	2
-	.global	flash_start_page_prog
-	.type	flash_start_page_prog, %function
-flash_start_page_prog:
-	stp	x29, x30, [sp, -48]!
-	mov	w11, w1
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w20, w0, 255
-	adrp	x0, .LANCHOR8
-	str	x21, [sp, 32]
-	ubfx	x1, x11, 21, 3
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	mov	x24, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	ubfx	x1, x23, 21, 3
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
 	cmp	w0, w1
-	bhi	.L1445
-	adrp	x1, .LANCHOR125
+	bhi	.L1534
+	adrp	x1, .LANCHOR144
 	adrp	x0, .LC0
-	mov	w2, 692
-	add	x1, x1, :lo12:.LANCHOR125
+	mov	w2, 812
+	add	x1, x1, :lo12:.LANCHOR144
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1446:
-	b	.L1446
-.L1445:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
-	mov	x12, x2
-	mov	x13, x3
-	and	w10, w11, 2097151
-	ldrb	w21, [x0, w1, sxtw]
-	adrp	x0, .LANCHOR6
-	ldr	x19, [x0, #:lo12:.LANCHOR6]
-	mov	w0, w21
-	bl	hynix_reconfig_rr_para
-	mov	w0, w21
-	bl	nandc_cs
-	tst	x11, 50331648
-	bne	.L1447
-	adrp	x0, .LANCHOR11
-	adrp	x1, .LANCHOR12
-	ldrb	w0, [x0, #:lo12:.LANCHOR11]
-	cbz	w0, .L1448
-	ldrb	w0, [x1, #:lo12:.LANCHOR12]
-	cbz	w0, .L1449
-.L1448:
+.L1535:
+	b	.L1535
+.L1534:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ubfx	x21, x23, 24, 2
+	mov	x25, x2
+	and	w19, w23, 2097151
+	ldrb	w22, [x0, w1, sxtw]
 	adrp	x0, .LANCHOR13
-	ldrb	w1, [x1, #:lo12:.LANCHOR12]
-	ldrh	w2, [x0, #:lo12:.LANCHOR13]
-	udiv	w0, w10, w2
+	ldr	x4, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w22
+	bl	nandc_cs
+	cbnz	w21, .L1536
+	adrp	x0, .LANCHOR18
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1537
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	cbz	w0, .L1536
+.L1537:
+	adrp	x0, .LANCHOR20
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	udiv	w0, w19, w2
 	mul	w0, w0, w2
-	sub	w10, w10, w0
-	cbz	w1, .L1450
-	add	w10, w0, w10, lsl 1
-.L1449:
-	mov	w0, w21
-	bl	flash_enter_slc_mode
-	b	.L1451
-.L1450:
-	adrp	x1, .LANCHOR14
-	add	x1, x1, :lo12:.LANCHOR14
-	ldrh	w10, [x1, w10, uxtw 1]
-	add	w10, w10, w0
-.L1451:
-	ubfiz	x0, x21, 8, 8
-	add	x19, x19, x0
-	mov	w0, 128
-	str	w0, [x19, 2056]
-	and	w0, w10, 255
-	str	wzr, [x19, 2052]
-	str	wzr, [x19, 2052]
-	str	w0, [x19, 2052]
-	lsr	w0, w10, 8
-	str	w0, [x19, 2052]
-	lsr	w0, w10, 16
-	str	w0, [x19, 2052]
-	mov	w0, w10
-	bl	nandc_set_seed
-	mov	x3, x13
-	adrp	x0, .LANCHOR19+9
-	mov	x2, x12
-	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
-	mov	w0, 1
-	bl	nandc_xfer_start
-	bl	nandc_xfer_done
-	mov	w0, w21
-	ldr	x21, [sp, 32]
-	str	w20, [x19, 2056]
+	sub	w19, w19, w0
+	cbz	w1, .L1538
+	add	w19, w0, w19, lsl 1
+.L1536:
+	ubfiz	x0, x22, 8, 8
+	mov	w1, 5
+	add	x0, x4, x0
+	adrp	x20, .LANCHOR26
+	add	x28, x20, :lo12:.LANCHOR26
+	mov	x4, x25
+	mov	x3, x24
+	str	w1, [x0, 2056]
+	and	w1, w19, 255
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	ldrb	w2, [x28, 9]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+	mov	w1, 224
+	str	w1, [x0, 2056]
+	mov	w1, 0
+	mov	w0, w22
+	bl	nandc_xfer
+	cmn	w0, #1
+	bne	.L1539
+	adrp	x26, .LANCHOR36
+	ldrb	w27, [x26, #:lo12:.LANCHOR36]
+	cbz	w27, .L1540
+	ldrb	w4, [x28, 9]
+	mov	x3, x25
+	strb	wzr, [x26, #:lo12:.LANCHOR36]
+	mov	x2, x24
+	orr	w1, w19, w21, lsl 24
+	mov	w0, w22
+	bl	flash_read_page
+	strb	w27, [x26, #:lo12:.LANCHOR36]
+	cbnz	w21, .L1541
+.L1546:
+	adrp	x1, .LANCHOR18
+	ldrb	w1, [x1, #:lo12:.LANCHOR18]
+	cbz	w1, .L1541
+	adrp	x1, .LANCHOR34
+	ldrb	w1, [x1, #:lo12:.LANCHOR34]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	blt	.L1541
+	add	x20, x20, :lo12:.LANCHOR26
+	ldrb	w1, [x20, 19]
+	sub	w1, w1, #4
+	and	w1, w1, 255
+	cmp	w1, 3
+	mov	w1, 256
+	csel	w0, w0, w1, hi
+.L1533:
 	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 48
-	b	nandc_de_cs
-.L1447:
-	mov	w0, w21
-	bl	flash_exit_slc_mode
-	b	.L1451
-	.size	flash_start_page_prog, .-flash_start_page_prog
-	.section	.text.queue_prog_cmd,"ax",@progbits
-	.align	2
-	.type	queue_prog_cmd, %function
-queue_prog_cmd:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	ldr	w1, [x0, 40]
-	ldr	x3, [x0, 24]
-	ldr	x2, [x0, 8]
-	str	x19, [sp, 16]
-	mov	x19, x0
-	mov	w0, 16
-	bl	flash_start_page_prog
-	adrp	x0, .LANCHOR90
-	ldr	w3, [x19, 40]
-	ldrb	w1, [x0, #:lo12:.LANCHOR90]
-	cmp	w1, 255
-	beq	.L1457
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
-	ubfx	x3, x3, 21, 3
-	mov	x6, x2
-.L1459:
-	add	x4, x2, x1, lsl 6
-	ldr	w5, [x4, 40]
-	ubfx	x5, x5, 21, 3
-	cmp	w3, w5
-	bne	.L1458
-	ldrb	w5, [x4, 58]
-	cmp	w5, 6
-	bne	.L1458
-	mov	w1, 3
-	strb	w1, [x4, 58]
-.L1457:
-	mov	w1, 3
-	strb	w1, [x19, 58]
-	mov	w1, 1
-	strb	w1, [x19, 59]
-	mov	w1, -1
-	strb	w1, [x19]
-	mov	x1, x19
-	add	x0, x0, :lo12:.LANCHOR90
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	b	buf_add_tail
-.L1458:
-	lsl	x1, x1, 6
-	ldrb	w1, [x6, x1]
-	cmp	w1, 255
-	bne	.L1459
-	b	.L1457
-	.size	queue_prog_cmd, .-queue_prog_cmd
-	.section	.text.sblk_prog_page,"ax",@progbits
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1538:
+	adrp	x1, .LANCHOR21
+	add	x1, x1, :lo12:.LANCHOR21
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1536
+.L1541:
+	cmn	w0, #1
+	bne	.L1533
+.L1547:
+	adrp	x0, .LANCHOR139
+	ldr	x6, [x0, #:lo12:.LANCHOR139]
+	cbnz	x6, .L1543
+.L1545:
+	adrp	x0, .LANCHOR36
+	mov	w3, -1
+	mov	w2, w23
+	mov	w1, 0
+	ldrb	w4, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LC63
+	add	x0, x0, :lo12:.LC63
+	bl	printf
+	adrp	x0, .LANCHOR42
+	ldrb	w0, [x0, #:lo12:.LANCHOR42]
+	cbnz	w0, .L1544
+	mov	w0, -1
+	b	.L1533
+.L1543:
+	add	x0, x20, :lo12:.LANCHOR26
+	mov	x4, x25
+	mov	x3, x24
+	mov	w2, w19
+	mov	w1, w21
+	ldrb	w5, [x0, 9]
+	mov	w0, w22
+	blr	x6
+	cmn	w0, #1
+	beq	.L1545
+	b	.L1533
+.L1544:
+	add	x20, x20, :lo12:.LANCHOR26
+	orr	w1, w19, w21, lsl 24
+	mov	x3, x25
+	mov	x2, x24
+	mov	w0, w22
+	ldrb	w4, [x20, 9]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tunning_read
+.L1539:
+	cbnz	w21, .L1533
+	b	.L1546
+.L1540:
+	cbz	w21, .L1546
+	b	.L1547
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",@progbits
 	.align	2
-	.global	sblk_prog_page
-	.type	sblk_prog_page, %function
-sblk_prog_page:
-	stp	x29, x30, [sp, -80]!
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR114
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	ldrh	w0, [x0, 50]
-	and	w20, w1, 255
+	ldrb	w0, [x0, #:lo12:.LANCHOR114]
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cbz	w0, .L1466
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1466
-	ldr	w1, [x19, 40]
-	adrp	x0, .LC58
-	mov	w2, w20
-	add	x0, x0, :lo12:.LC58
-	bl	printf
-.L1466:
-	adrp	x24, .LANCHOR23
-	adrp	x22, .LANCHOR36
-	add	x24, x24, :lo12:.LANCHOR23
-	add	x22, x22, :lo12:.LANCHOR36
+	cmp	w0, 255
+	bne	.L1568
+.L1586:
 	mov	w21, 0
-	mov	w23, 1
-.L1467:
-	cbnz	w20, .L1478
-	mov	w0, 0
+	b	.L1567
+.L1568:
+	adrp	x19, .LANCHOR43
+	sxtw	x22, w0
+	add	x1, x19, :lo12:.LANCHOR43
+	add	x1, x1, x22, lsl 6
+	ldrb	w2, [x1, 58]
+	ldr	w21, [x1, 40]
+	sub	w3, w2, #1
+	cmp	w3, 9
+	bhi	.L1586
+	adrp	x1, .L1571
+	add	x1, x1, :lo12:.L1571
+	ldrb	w1, [x1,w3,uxtw]
+	adr	x3, .Lrtx1571
+	add	x1, x3, w1, sxtb #2
+	br	x1
+.Lrtx1571:
+	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
+	.align	0
+	.align	2
+.L1571:
+	.byte	(.L1570 - .Lrtx1571) / 4
+	.byte	(.L1570 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1573 - .Lrtx1571) / 4
+	.byte	(.L1574 - .Lrtx1571) / 4
+	.byte	(.L1575 - .Lrtx1571) / 4
+	.byte	(.L1572 - .Lrtx1571) / 4
+	.byte	(.L1575 - .Lrtx1571) / 4
+	.section	.text.queue_wait_first_req_completed
+.L1570:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	add	x19, x19, x22, lsl 6
+	ldp	x1, x0, [x19, 8]
+	ldr	x2, [x19, 24]
+	cmp	x0, 0
+	csel	x1, x0, x1, ne
+	mov	w0, w21
+	bl	flash_complete_page_read
+	str	w0, [x19, 52]
+	mov	w0, 12
+	strb	w0, [x19, 58]
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+	b	.L1586
+.L1572:
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 6, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	mov	w0, 5
+	add	x19, x19, x22, lsl 6
+	tst	w21, w0
+	beq	.L1585
+	ldrb	w1, [x19, 1]
+	mov	w0, 11
+	ldr	w3, [x19, 40]
+	mov	w4, 11
+	ldr	w2, [x19, 52]
+	strb	w0, [x19, 58]
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
+	bl	printf
+.L1604:
+	mov	w0, -1
+	str	w0, [x19, 52]
+	b	.L1567
+.L1575:
+	cmp	w2, 10
+	add	x20, x19, :lo12:.LANCHOR43
+	ubfiz	x0, x0, 6, 8
+	mov	w1, 3
+	mov	w2, 9
+	add	x0, x20, x0
+	csel	w2, w2, w1, eq
+	ubfx	x3, x21, 21, 3
+.L1580:
+	ldrb	w1, [x0]
+	cmp	w1, 255
+	bne	.L1584
+	mov	w21, -1
+	b	.L1567
+.L1584:
+	sxtw	x23, w1
+	ubfiz	x0, x1, 6, 8
+	add	x1, x20, x23, lsl 6
+	add	x0, x20, x0
+	ldrb	w4, [x1, 58]
+	cmp	w4, w2
+	bne	.L1580
+	ldr	w1, [x1, 40]
+	ubfx	x1, x1, 21, 3
+	cmp	w3, w1
+	bne	.L1580
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w24, w0
+	and	w21, w0, 64
+	tbz	x24, 6, .L1582
+	add	x20, x20, x22, lsl 6
+	ands	w21, w0, 15
+	beq	.L1583
+	ldrb	w1, [x20, 1]
+	mov	w4, 11
+	ldr	w3, [x20, 40]
+	adrp	x0, .LC64
+	ldr	w2, [x20, 52]
+	add	x0, x0, :lo12:.LC64
+	mov	w21, w24
+	bl	printf
+	mov	w0, 11
+	strb	w0, [x20, 58]
+	mov	w0, -1
+	str	w0, [x20, 52]
+.L1582:
+	add	x1, x19, :lo12:.LANCHOR43
+	add	x22, x1, x22, lsl 6
+	add	x1, x1, x23, lsl 6
+	ldrb	w0, [x22, 58]
+	strb	w0, [x1, 58]
+	ldr	w0, [x22, 52]
+	str	w0, [x1, 52]
+.L1567:
+	mov	w0, w21
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 64
 	ret
-.L1478:
-	ldrb	w25, [x19]
-	ldr	w26, [x19, 40]
-.L1468:
-	mov	w1, 1
-	mov	w0, w26
-	bl	queue_lun_state
-	cbnz	w0, .L1469
-	cmp	w20, 1
-	beq	.L1470
-	ldrb	w0, [x24]
-	cbnz	w0, .L1471
-.L1470:
-	mov	x0, x19
-	bl	queue_prog_cmd
-.L1472:
-	ubfiz	x19, x25, 6, 8
-	sub	w20, w20, #1
-	add	x19, x22, x19
-	b	.L1467
-.L1469:
-	bl	queue_wait_first_req_completed
-	bl	queue_remove_completed_req
-	b	.L1468
-.L1471:
-	ldrb	w0, [x19]
-	ubfx	x1, x26, 21, 3
-	cmp	w0, 255
-	bne	.L1473
-	adrp	x1, .LANCHOR126
-	adrp	x0, .LC0
-	mov	w2, 478
-	add	x1, x1, :lo12:.LANCHOR126
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1474:
-	b	.L1474
-.L1473:
-	sbfiz	x0, x0, 6, 32
-	add	x0, x22, x0
-	ldr	w5, [x0, 40]
-	ubfx	x0, x5, 21, 3
-	cmp	w1, w0
-	bne	.L1475
-	adrp	x0, .LANCHOR71
-	ldrh	w2, [x0, #:lo12:.LANCHOR71]
-	adrp	x0, .LANCHOR70
-	ldrb	w3, [x0, #:lo12:.LANCHOR70]
-	mov	w0, 21
-	sub	w0, w0, w2
-	lsl	w1, w23, w2
-	sub	w3, w3, #1
-	sub	w1, w1, #1
-	lsl	w0, w23, w0
-	sub	w0, w0, #1
-	and	w0, w0, w3
-	lsr	w4, w26, w2
-	and	w0, w0, 65535
-	and	w1, w1, 65535
-	and	w4, w0, w4
-	lsr	w2, w5, w2
-	and	w0, w0, w2
-	and	w26, w1, w26
-	cmp	w4, w0
-	and	w1, w1, w5
-	ccmp	w26, w1, 0, ne
-	bne	.L1475
-	cmp	w21, w3
-	beq	.L1475
-	ldr	w1, [x19, 40]
-	mov	w0, 17
-	ldr	x2, [x19, 8]
-	add	w21, w21, 1
-	ldr	x3, [x19, 24]
-	bl	flash_start_page_prog
-	strb	w23, [x19, 59]
-	mov	w0, 8
+.L1583:
+	mov	w0, 12
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L1582
+.L1573:
+	mov	w0, w21
+	mov	w1, 32
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 5, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	tst	x21, 15
+	add	x19, x19, x22, lsl 6
+	beq	.L1585
+	mov	w0, 11
 	strb	w0, [x19, 58]
-	mov	w0, -1
-	strb	w0, [x19]
-	mov	x1, x19
-	adrp	x0, .LANCHOR90
-	add	x0, x0, :lo12:.LANCHOR90
-	bl	buf_add_tail
-	b	.L1472
-.L1475:
-	mov	x0, x19
-	mov	w21, 0
-	bl	queue_prog_cmd
-	b	.L1472
-	.size	sblk_prog_page, .-sblk_prog_page
-	.section	.text.ftl_flush,"ax",@progbits
+	b	.L1604
+.L1585:
+	mov	w0, 12
+	str	wzr, [x19, 52]
+	strb	w0, [x19, 58]
+	b	.L1586
+.L1574:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1586
+	add	x19, x19, :lo12:.LANCHOR43
+	add	x19, x19, x22, lsl 6
+	str	w0, [x19, 52]
+	mov	w0, 6
+	strb	w0, [x19, 58]
+	b	.L1586
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
 	.align	2
-	.global	ftl_flush
-	.type	ftl_flush, %function
-ftl_flush:
+	.global	sblk_wait_write_queue_completed
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
 	stp	x29, x30, [sp, -32]!
-	adrp	x0, .LANCHOR89
 	add	x29, sp, 0
-	ldrb	w1, [x0, #:lo12:.LANCHOR89]
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
-	adrp	x20, .LANCHOR127
-	cbz	w1, .L1490
-	ldrb	w2, [x20, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-	add	x0, x0, x2, lsl 6
-	bl	sblk_prog_page
-.L1490:
-	mov	w0, -1
-	strb	wzr, [x19, #:lo12:.LANCHOR89]
-	strb	w0, [x20, #:lo12:.LANCHOR127]
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	ldp	x19, x20, [sp, 16]
-	mov	w0, -1
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR114
+	add	x19, x19, :lo12:.LANCHOR114
+.L1606:
+	ldrb	w0, [x19]
+	cmp	w0, 255
+	bne	.L1607
+	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
-	b	ftl_vpn_decrement
-	.size	ftl_flush, .-ftl_flush
-	.section	.text.flash_prog_page_en,"ax",@progbits
+	ret
+.L1607:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1606
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",@progbits
 	.align	2
-	.global	flash_prog_page_en
-	.type	flash_prog_page_en, %function
-flash_prog_page_en:
-	stp	x29, x30, [sp, -80]!
+	.global	ftl_read_page
+	.type	ftl_read_page, %function
+ftl_read_page:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	and	w24, w0, 255
-	adrp	x0, .LANCHOR8
 	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	ldrb	w0, [x0, #:lo12:.LANCHOR8]
-	stp	x25, x26, [sp, 64]
-	cmp	w0, w24
-	bhi	.L1496
-	adrp	x1, .LANCHOR128
-	adrp	x0, .LC0
-	mov	w2, 480
-	add	x1, x1, :lo12:.LANCHOR128
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1497:
-	b	.L1497
-.L1496:
-	adrp	x0, .LANCHOR10
-	add	x0, x0, :lo12:.LANCHOR10
 	mov	w20, w1
-	mov	x23, x2
+	mov	x21, x2
 	mov	x22, x3
-	mov	w25, w4
-	and	w21, w5, 255
-	ldrb	w26, [x0, w24, sxtw]
-	tst	x20, 50331648
-	bne	.L1508
-	adrp	x0, .LANCHOR11
-	ldrb	w1, [x0, #:lo12:.LANCHOR11]
-	adrp	x0, .LANCHOR12
-	cbz	w1, .L1499
-	ldrb	w1, [x0, #:lo12:.LANCHOR12]
-	cbz	w1, .L1508
-.L1499:
-	adrp	x1, .LANCHOR13
-	ldrb	w0, [x0, #:lo12:.LANCHOR12]
-	ldrh	w1, [x1, #:lo12:.LANCHOR13]
-	udiv	w19, w20, w1
-	mul	w19, w19, w1
-	sub	w1, w20, w19
-	cbz	w0, .L1500
-	add	w19, w19, w1, lsl 1
-.L1498:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 4, .L1501
-	adrp	x0, .LC59
-	mov	w2, w20
-	mov	w1, w26
-	add	x0, x0, :lo12:.LC59
-	bl	printf
-.L1501:
-	mov	w0, w26
-	mov	w4, w25
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
 	mov	x3, x22
-	mov	x2, x23
-	mov	w1, w19
-	bl	flash_prog_page
-	mov	w26, w0
-	cbz	w21, .L1502
-	adrp	x21, .LANCHOR118
-	adrp	x19, .LANCHOR119
-	mov	w4, w25
-	mov	w1, w20
-	ldr	x3, [x21, #:lo12:.LANCHOR118]
-	mov	w0, w24
-	ldr	x2, [x19, #:lo12:.LANCHOR119]
-	bl	flash_read_page_en
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	beq	.L1503
-	ldr	x0, [x19, #:lo12:.LANCHOR119]
-	ldr	w1, [x23]
-	ldr	w0, [x0]
-	cmp	w1, w0
-	bne	.L1503
-	ldr	x0, [x21, #:lo12:.LANCHOR118]
-	ldr	w1, [x22]
-	ldr	w0, [x0]
-	cmp	w1, w0
-	beq	.L1502
-.L1503:
-	ldr	x1, [x21, #:lo12:.LANCHOR118]
-	mov	w3, 4
-	adrp	x0, .LC60
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC60
-	bl	rknand_print_hex
-	ldr	x1, [x19, #:lo12:.LANCHOR119]
-	mov	w3, 4
-	adrp	x0, .LC61
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC61
-	bl	rknand_print_hex
-.L1504:
+	mov	x2, x21
 	mov	w1, w20
-	adrp	x0, .LC62
-	add	x0, x0, :lo12:.LC62
-	bl	printf
-	adrp	x1, .LANCHOR128
-	adrp	x0, .LC0
-	mov	w2, 506
-	add	x1, x1, :lo12:.LANCHOR128
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1506:
-	b	.L1506
-.L1500:
-	adrp	x0, .LANCHOR14
-	add	x0, x0, :lo12:.LANCHOR14
-	ldrh	w0, [x0, w1, uxtw 1]
-	add	w19, w0, w19
-	b	.L1498
-.L1508:
-	mov	w19, w20
-	b	.L1498
-.L1502:
-	cmn	w26, #1
-	beq	.L1504
-	mov	w0, w26
+	mov	w0, w19
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-	.size	flash_prog_page_en, .-flash_prog_page_en
-	.section	.text.ftl_test_block,"ax",@progbits
+	ldp	x29, x30, [sp], 64
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",@progbits
 	.align	2
-	.global	ftl_test_block
-	.type	ftl_test_block, %function
-ftl_test_block:
-	stp	x29, x30, [sp, -128]!
+	.global	ftl_read_ppa_page
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	stp	x29, x30, [sp, -48]!
 	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
 	stp	x21, x22, [sp, 32]
-	adrp	x21, ftl_tmp_buffer
-	adrp	x22, .LANCHOR121
+	mov	x20, x1
+	mov	x21, x2
+	mov	w22, w3
+	bl	sblk_wait_write_queue_completed
+	ubfx	x0, x19, 21, 3
+	mov	w4, w22
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_read_page_en
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_read_test
+	.type	ftl_open_sblk_read_test, %function
+ftl_open_sblk_read_test:
+	stp	x29, x30, [sp, -96]!
+	and	w13, w0, 65535
+	mov	w0, w13
+	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR76
-	add	x24, x24, :lo12:.LANCHOR76
-	stp	x25, x26, [sp, 64]
-	and	w26, w0, 65535
+	adrp	x23, .LANCHOR80
+	adrp	x24, .LANCHOR52
+	add	x23, x23, :lo12:.LANCHOR80
+	add	x24, x24, :lo12:.LANCHOR52
 	stp	x19, x20, [sp, 16]
-	adrp	x25, .LANCHOR70
-	stp	x27, x28, [sp, 80]
-	add	x0, x25, :lo12:.LANCHOR70
-	str	wzr, [x21, #:lo12:ftl_tmp_buffer]
-	mov	w19, 0
-	str	wzr, [x22, #:lo12:.LANCHOR121]
-	str	x0, [x29, 112]
-.L1520:
-	ldrb	w0, [x24]
-	cmp	w0, w19
-	bls	.L1527
-	add	x0, x25, :lo12:.LANCHOR70
-	adrp	x23, .LANCHOR22
+	stp	x21, x22, [sp, 32]
+	add	x1, x29, 80
 	mov	w20, 0
-	add	x23, x23, :lo12:.LANCHOR22
-	str	x0, [x29, 120]
-	b	.L1528
-.L1526:
-	ldr	w0, [x23]
-	tbz	x0, 12, .L1521
-	adrp	x0, .LC63
-	mov	w1, w26
-	add	x0, x0, :lo12:.LC63
-	bl	printf
-.L1521:
-	ldr	x0, [x29, 112]
-	ldrb	w6, [x0]
-	madd	w6, w26, w6, w20
-	and	w28, w6, 65535
-	cbnz	w19, .L1522
-	adrp	x0, .LANCHOR5
-	ldr	x0, [x0, #:lo12:.LANCHOR5]
-	ldrb	w0, [x0, 47]
-	cmp	w0, w28
-	bcs	.L1523
-.L1522:
-	and	w27, w19, 255
-	mov	w1, w28
-	mov	w0, w27
-	bl	flash_check_bad_block
-	cbnz	w0, .L1523
-	adrp	x0, .LANCHOR75
-	ldrh	w8, [x0, #:lo12:.LANCHOR75]
-	mov	w0, w27
-	mul	w8, w8, w28
-	str	w8, [x29, 108]
-	mov	w1, w8
-	bl	flash_erase_block
-	ldr	w8, [x29, 108]
-	cbz	w0, .L1525
-.L1536:
-	mov	w1, w28
-	mov	w0, w27
-	bl	flash_mask_bad_block
-	b	.L1523
-.L1525:
-	adrp	x0, .LANCHOR45
-	mov	w5, 1
-	add	x3, x22, :lo12:.LANCHOR121
-	add	x2, x21, :lo12:ftl_tmp_buffer
-	ldrb	w4, [x0, #:lo12:.LANCHOR45]
-	mov	w1, w8
-	mov	w0, w27
-	bl	flash_prog_page_en
-	cbnz	w0, .L1536
-.L1523:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-.L1528:
-	ldr	x0, [x29, 120]
-	ldrb	w0, [x0]
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x29, 73]
+	strh	w13, [x29, 64]
+.L1614:
+	ldrh	w0, [x23]
 	cmp	w0, w20
-	bhi	.L1526
+	bls	.L1613
+	adrp	x22, .LANCHOR72
+	adrp	x21, .LANCHOR145
+	mov	w19, 0
+	add	x22, x22, :lo12:.LANCHOR72
+	add	x21, x21, :lo12:.LANCHOR145
+	b	.L1616
+.L1619:
+	add	x0, x29, 64
+	mov	w1, 65535
+	add	x0, x0, x19, sxtw 1
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	bne	.L1615
+.L1618:
 	add	w19, w19, 1
 	and	w19, w19, 65535
-	b	.L1520
-.L1527:
+.L1616:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L1619
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1614
+.L1615:
+	adrp	x1, .LANCHOR99
+	ldrb	w3, [x24]
+	mov	x2, x21
+	ldrh	w4, [x1, #:lo12:.LANCHOR99]
+	adrp	x1, ftl_tmp_buffer
+	add	x1, x1, :lo12:ftl_tmp_buffer
+	madd	w0, w4, w0, w20
+	bl	ftl_read_ppa_page
+	cmp	w0, 512
+	bne	.L1618
+.L1613:
 	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	ftl_test_block, .-ftl_test_block
-	.section	.text.ftl_prog_page,"ax",@progbits
+	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
+	.section	.text.sblk_read_page,"ax",@progbits
 	.align	2
-	.global	ftl_prog_page
-	.type	ftl_prog_page, %function
-ftl_prog_page:
-	stp	x29, x30, [sp, -64]!
+	.global	sblk_read_page
+	.type	sblk_read_page, %function
+sblk_read_page:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	mov	w20, w1
-	mov	x21, x2
-	mov	x22, x3
-	str	x23, [sp, 48]
-	mov	w23, w4
-	bl	sblk_wait_write_queue_completed
-	mov	w5, 1
-	mov	w4, w23
-	mov	x3, x22
-	mov	x2, x21
-	mov	w1, w20
-	mov	w0, w19
-	bl	flash_prog_page_en
-	cmn	w0, #1
-	bne	.L1537
-	adrp	x1, .LANCHOR129
-	adrp	x0, .LC0
-	mov	w2, 1414
-	add	x1, x1, :lo12:.LANCHOR129
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1539:
-	b	.L1539
-.L1537:
+	and	w21, w1, 255
+	stp	x19, x20, [sp, 16]
+	mov	w22, w21
+	stp	x23, x24, [sp, 48]
+	mov	x20, x0
+	adrp	x23, .LANCHOR114
+	adrp	x24, .LANCHOR43
+	mov	x19, x0
+	add	x23, x23, :lo12:.LANCHOR114
+	add	x24, x24, :lo12:.LANCHOR43
+	stp	x25, x26, [sp, 64]
+.L1625:
+	cbnz	w22, .L1629
+.L1637:
+	adrp	x19, .LANCHOR43
+	add	x19, x19, :lo12:.LANCHOR43
+.L1630:
+	cbnz	w21, .L1633
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	ftl_prog_page, .-ftl_prog_page
-	.section	.text.ftl_info_flush,"ax",@progbits
-	.align	2
-	.global	ftl_info_flush
-	.type	ftl_info_flush, %function
-ftl_info_flush:
-	stp	x29, x30, [sp, -112]!
+.L1629:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1626:
 	mov	w1, 0
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR45
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR131
-	ldrb	w2, [x21, #:lo12:.LANCHOR45]
-	mov	x23, x22
-	stp	x25, x26, [sp, 64]
-	adrp	x25, .LANCHOR75
-	stp	x27, x28, [sp, 80]
-	mov	w26, 0
-	stp	x19, x20, [sp, 16]
-	lsl	w2, w2, 1
-	adrp	x20, .LANCHOR130
-	str	w0, [x29, 108]
-	mov	x24, x25
-	add	x27, x22, :lo12:.LANCHOR131
-	add	x28, x25, :lo12:.LANCHOR75
-	add	x0, x20, :lo12:.LANCHOR130
-	bl	ftl_memset
-.L1542:
-	add	x0, x22, :lo12:.LANCHOR131
-	ldr	w1, [x29, 108]
-	ldrb	w6, [x22, #:lo12:.LANCHOR131]
-	ldrh	w19, [x25, #:lo12:.LANCHOR75]
-	ldrh	w4, [x0, 2]
-	adrp	x0, .LANCHOR46
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldr	w3, [x0, 4]
-	add	w3, w3, 1
-	str	w3, [x0, 4]
-	add	x0, x20, :lo12:.LANCHOR130
-	str	w1, [x20, #:lo12:.LANCHOR130]
-	str	w3, [x0, 4]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1543
-	mov	w2, w4
-	mov	w1, w6
-	stp	w4, w6, [x29, 100]
-	adrp	x0, .LC64
-	add	x0, x0, :lo12:.LC64
-	bl	printf
-	ldp	w4, w6, [x29, 100]
-.L1543:
-	adrp	x1, .LANCHOR79
-	ldrh	w0, [x27, 2]
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	cmp	w1, w0
-	bhi	.L1544
-	adrp	x1, .LANCHOR5
-	ldrb	w0, [x27, 1]
-	ldrb	w2, [x27]
-	mov	w4, 0
-	ldr	x6, [x1, #:lo12:.LANCHOR5]
-.L1551:
-	add	w0, w0, 1
-	and	w0, w0, 255
-	cmp	w0, 7
-	bls	.L1545
-	mov	x1, 0
-.L1550:
-	add	x3, x6, x1
-	and	w7, w1, 65535
-	ldrb	w8, [x3, 40]
-	add	w3, w8, 127
-	and	w3, w3, 255
-	cmp	w3, 125
-	bhi	.L1546
-	add	x1, x23, :lo12:.LANCHOR131
-	strb	w0, [x1, 1]
-	cbz	w4, .L1547
-	strb	w2, [x23, #:lo12:.LANCHOR131]
-.L1547:
-	adrp	x1, .LANCHOR132
-	adrp	x0, .LC0
-	mov	w2, 156
-	add	x1, x1, :lo12:.LANCHOR132
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1548:
-	b	.L1548
-.L1546:
-	cmp	w8, 255
-	bne	.L1549
-	add	x1, x1, 1
-	cmp	x1, 8
-	bne	.L1550
-	mov	w7, w1
-.L1549:
-	and	w0, w7, 255
-	mov	w26, 1
-.L1545:
-	add	w1, w0, 8
-	mov	w4, 1
-	add	x1, x6, x1, sxtw
-	ldrb	w2, [x1, 32]
-	cmp	w2, 255
-	beq	.L1551
-	ldrh	w19, [x28]
-	strb	w0, [x27, 1]
-	mov	w0, 0
-	strb	w2, [x27]
-	mul	w19, w19, w2
-	mov	w1, w19
-	bl	flash_erase_block
-	ldrb	w4, [x21, #:lo12:.LANCHOR45]
-	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR130
-	adrp	x2, ftl_info_data_buffer
-	mov	w0, 0
-	add	x2, x2, :lo12:ftl_info_data_buffer
-	bl	ftl_prog_page
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1627
+	ldr	w1, [x19, 40]
+	mov	w0, 48
+	bl	flash_start_page_read
+	strb	wzr, [x19, 59]
 	mov	w0, 1
-	add	w19, w19, w0
-	strh	w0, [x27, 2]
-.L1552:
-	ldrb	w4, [x21, #:lo12:.LANCHOR45]
-	mov	w1, w19
-	add	x3, x20, :lo12:.LANCHOR130
-	adrp	x2, ftl_info_data_buffer
-	mov	w0, 0
-	add	x2, x2, :lo12:ftl_info_data_buffer
-	bl	ftl_prog_page
-	cmn	w0, #1
-	ldrh	w1, [x27, 2]
-	add	w1, w1, 1
-	strh	w1, [x27, 2]
-	beq	.L1542
-	cbnz	w26, .L1553
-.L1561:
-	ldrb	w0, [x23, #:lo12:.LANCHOR131]
-	cmp	w0, 255
-	bne	.L1577
-	adrp	x1, .LANCHOR132
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	mov	x0, x23
+	bl	buf_add_tail
+	subs	w22, w22, #1
+	beq	.L1637
+	ubfiz	x19, x25, 6, 8
+	add	x19, x24, x19
+	b	.L1625
+.L1627:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1626
+.L1633:
+	ldrb	w0, [x20, 58]
+	cmp	w0, 12
+	bne	.L1631
+	ldrb	w20, [x20]
+	sub	w21, w21, #1
+	add	x20, x19, x20, lsl 6
+	b	.L1630
+.L1631:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1630
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
+	.align	2
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #112
+	adrp	x0, .LANCHOR5
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR63
+	stp	x21, x22, [sp, 48]
+	add	x21, x19, :lo12:.LANCHOR63
+	ldr	x20, [x0, #:lo12:.LANCHOR5]
+	stp	x23, x24, [sp, 64]
+	ldr	x0, [x21, 8]
+	stp	x25, x26, [sp, 80]
+	str	x27, [sp, 96]
+	cbnz	x0, .L1640
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x21, 8]
+.L1640:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldr	x21, [x0, 8]
+	cbz	x21, .L1641
+	adrp	x26, .LANCHOR99
+	adrp	x27, .LANCHOR67
+	add	x25, x20, 96
+	add	x26, x26, :lo12:.LANCHOR99
+	add	x27, x27, :lo12:.LANCHOR67
+	mov	w24, 0
+.L1642:
+	ldrb	w0, [x20, 89]
+	cmp	w24, w0
+	bge	.L1652
+	mov	w23, 1
+	add	x22, x19, :lo12:.LANCHOR63
+	b	.L1653
+.L1641:
+	adrp	x1, .LANCHOR146
 	adrp	x0, .LC0
-	mov	w2, 191
-	add	x1, x1, :lo12:.LANCHOR132
+	mov	w2, 348
+	add	x1, x1, :lo12:.LANCHOR146
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1562:
-	b	.L1562
-.L1544:
-	madd	w19, w19, w6, w4
-	cbnz	w0, .L1552
-	mov	w1, w19
-	bl	flash_erase_block
-	b	.L1552
-.L1553:
-	ldrb	w19, [x27, 1]
-	add	x24, x24, :lo12:.LANCHOR75
-	adrp	x20, .LANCHOR5
-	add	w19, w19, 1
-.L1556:
-	cmp	w19, 7
-	bhi	.L1561
-	ldr	x1, [x20, #:lo12:.LANCHOR5]
-	add	w0, w19, 8
-	add	x0, x1, x0, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1557
-	adrp	x1, .LANCHOR132
-	adrp	x0, .LC0
-	mov	w2, 184
-	add	x1, x1, :lo12:.LANCHOR132
-	add	x0, x0, :lo12:.LC0
+.L1643:
+	b	.L1643
+.L1651:
+	ldrh	w0, [x25]
+	ldrh	w1, [x26]
+	ldrb	w2, [x27]
+	cmp	w2, 3
+	mul	w1, w0, w1
+	ldrh	w0, [x22, 16]
+	bne	.L1644
+	add	w0, w0, w1
+	orr	w0, w0, w23, lsl 24
+.L1664:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w2, [x21, 52]
+	adrp	x1, .LANCHOR131
+	cmn	w2, #1
+	beq	.L1647
+	ldrh	w0, [x22, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR131]
+	ldr	x3, [x21, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L1647
+	adrp	x4, .LANCHOR132
+	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L1648
+.L1647:
+	ldrh	w0, [x22, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	lsl	x0, x0, 2
+	ldr	w3, [x1, x0]
+	cmn	w3, #1
+	beq	.L1648
+	adrp	x1, .LANCHOR29
+	ldr	w1, [x1, #:lo12:.LANCHOR29]
+	tbz	x1, 10, .L1649
+	ldr	x1, [x21, 24]
+	adrp	x4, .LANCHOR132
+	ldr	x4, [x4, #:lo12:.LANCHOR132]
+	ldr	w5, [x1, 12]
+	str	w5, [sp]
+	ldr	w4, [x4, x0]
+	adrp	x0, .LC65
+	ldp	w5, w6, [x1]
+	add	x0, x0, :lo12:.LC65
+	ldr	w7, [x1, 8]
+	ldr	w1, [x21, 40]
 	bl	printf
-.L1558:
-	b	.L1558
-.L1557:
-	cmp	w0, 255
-	beq	.L1559
-	ldrh	w1, [x24]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_erase_block
-.L1559:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1556
-.L1577:
-	ldp	x19, x20, [sp, 16]
-	mov	w0, 0
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+.L1649:
+	adrp	x0, .LANCHOR4
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	strh	wzr, [x0, x1, lsl 1]
+	mov	w0, -1
+.L1639:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 112
 	ret
-	.size	ftl_info_flush, .-ftl_info_flush
-	.section	.text.ftl_info_blk_init,"ax",@progbits
-	.align	2
-	.global	ftl_info_blk_init
-	.type	ftl_info_blk_init, %function
-ftl_info_blk_init:
-	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR133
-	adrp	x1, .LANCHOR59
-	mov	w2, 16384
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, ftl_info_data_buffer
-	strb	wzr, [x0, #:lo12:.LANCHOR133]
-	add	x0, x20, :lo12:ftl_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR59]
-	adrp	x1, .LANCHOR54
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	ldrh	w1, [x1, #:lo12:.LANCHOR54]
-	adrp	x21, .LANCHOR131
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR75
-	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR5
-	add	x1, x0, x1, lsl 2
-	stp	x27, x28, [sp, 80]
-	str	x1, [x22, #:lo12:.LANCHOR46]
-	mov	w1, 0
-	bl	ftl_memset
-	adrp	x25, .LANCHOR45
-	mov	w1, 0
-	mov	w2, 16384
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	bl	ftl_memset
-	mov	w27, 21574
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
-	add	x0, x21, :lo12:.LANCHOR131
-	add	x26, x26, :lo12:.LANCHOR75
-	add	x25, x25, :lo12:.LANCHOR45
-	mov	x19, 7
-	movk	w27, 0x494c, lsl 16
-	strb	wzr, [x0, 1]
-	ldrb	w1, [x1, 40]
-	strb	w1, [x21, #:lo12:.LANCHOR131]
-	strh	wzr, [x0, 2]
-.L1581:
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
-	add	w0, w19, 8
-	sxth	w24, w19
-	mov	w28, w19
-	add	x0, x1, x0, sxtw
-	ldrb	w0, [x0, 32]
-	cmp	w0, 255
-	bne	.L1580
-.L1585:
-	sub	x19, x19, #1
-	cmn	x19, #1
-	bne	.L1581
-	mov	w24, 0
-.L1582:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1586
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w2, 4800
-	mov	w1, w19
-	ldr	w3, [x0]
+.L1644:
+	cmp	w2, 2
+	bne	.L1646
+	sub	w0, w0, #1
+	add	w1, w23, w1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L1664
+.L1646:
+	add	w0, w0, w1
+	b	.L1664
+.L1648:
+	ldrh	w0, [x22, 22]
+	add	w23, w23, 1
+	add	w0, w0, 1
+	strh	w0, [x22, 22]
+.L1653:
+	ldrh	w0, [x22, 20]
+	cmp	w23, w0
+	ble	.L1651
+	add	w24, w24, 1
+	add	x25, x25, 2
+	b	.L1642
+.L1652:
+.L1650:
+	add	x19, x19, :lo12:.LANCHOR63
+	ldrh	w0, [x19, 16]
+	add	w0, w0, 1
+	strh	w0, [x19, 16]
+	mov	w0, 0
+	b	.L1639
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.flash_prog_page,"ax",@progbits
+	.align	2
+	.global	flash_prog_page
+	.type	flash_prog_page, %function
+flash_prog_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR13
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	and	x19, x20, 255
+	ldr	x24, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR29
+	stp	x25, x26, [sp, 64]
+	mov	w21, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	add	x22, x19, 8
+	str	x27, [sp, 80]
+	mov	x25, x2
+	mov	x26, x3
+	add	x22, x24, x22, lsl 8
+	and	w23, w1, 2097151
+	ubfx	x27, x21, 24, 2
+	tbz	x0, 4, .L1666
 	adrp	x0, .LC66
+	mov	w3, w4
+	mov	w2, w27
 	add	x0, x0, :lo12:.LC66
 	bl	printf
-.L1586:
-	cmn	w19, #1
-	bne	.L1587
-	mov	w1, 0
-	mov	w2, 16384
-	add	x0, x20, :lo12:ftl_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w1, 21574
-	movk	w1, 0x494c, lsl 16
-	str	w1, [x0]
-	mov	w0, w19
-.L1579:
+.L1666:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	hynix_reconfig_rr_para
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w27, .L1667
+	bl	zftl_flash_enter_slc_mode
+.L1668:
+	add	x19, x24, x19, lsl 8
+	mov	w0, 128
+	and	w21, w21, 255
+	str	w0, [x19, 2056]
+	lsr	w0, w23, 8
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w21, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w23, 16
+	str	w0, [x19, 2052]
+	mov	w0, w23
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR26+9
+	mov	x3, x26
+	mov	x2, x25
+	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	mov	w0, 16
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
+	bl	flash_read_status
+	mov	w2, w0
+	mov	w0, w20
+	bl	nandc_de_cs
+	ldr	x27, [sp, 80]
+	and	w0, w2, 4
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
+	ldp	x29, x30, [sp], 96
 	ret
-.L1580:
-	ldrh	w6, [x26]
-	add	x8, x20, :lo12:ftl_info_data_buffer
-	ldrb	w4, [x25]
-	adrp	x7, .LANCHOR130
-	add	x7, x7, :lo12:.LANCHOR130
-	mov	x2, x8
-	mov	x3, x7
-	stp	x7, x8, [x29, 104]
-	mul	w6, w6, w0
-	mov	w0, 0
-	str	w6, [x29, 124]
-	mov	w1, w6
-	bl	ftl_read_page
-	mov	w5, w0
-	cmn	w0, #1
-	ldr	w6, [x29, 124]
-	ldp	x7, x8, [x29, 104]
-	bne	.L1583
-	ldrb	w4, [x25]
-	mov	x3, x7
-	mov	x2, x8
-	add	w1, w6, 1
-	mov	w0, 0
-	bl	ftl_read_page
-	mov	w5, w0
-.L1583:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1584
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w2, w5
-	str	w5, [x29, 124]
-	mov	w3, 64
-	mov	w1, w28
-	ldr	w4, [x0]
-	adrp	x0, .LC65
-	add	x0, x0, :lo12:.LC65
-	bl	printf
-	ldr	w5, [x29, 124]
-.L1584:
-	cmn	w5, #1
-	beq	.L1585
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L1585
-	mov	w19, w24
-	b	.L1582
-.L1587:
-	ldr	x1, [x23, #:lo12:.LANCHOR5]
-	add	w0, w24, 8
-	add	x20, x20, :lo12:ftl_info_data_buffer
-	mov	w4, 4
-	mov	x2, x20
-	adrp	x26, .LANCHOR45
-	add	x0, x1, x0, sxtw
-	mov	w27, 21574
-	add	x26, x26, :lo12:.LANCHOR45
-	movk	w27, 0x494c, lsl 16
-	ldrb	w1, [x0, 32]
-	add	x0, x21, :lo12:.LANCHOR131
-	strb	w1, [x21, #:lo12:.LANCHOR131]
-	strb	w24, [x0, 1]
-	adrp	x24, .LANCHOR130
-	add	x24, x24, :lo12:.LANCHOR130
-	mov	w0, 0
-	mov	x3, x24
-	bl	flash_get_last_written_page
-	sxth	w23, w0
-	add	w0, w0, 1
-	and	w19, w0, 65535
-	adrp	x0, .LANCHOR75
-	ldrb	w25, [x21, #:lo12:.LANCHOR131]
-	ldrh	w0, [x0, #:lo12:.LANCHOR75]
-	madd	w25, w25, w0, w23
-.L1589:
-	tbnz	w23, #31, .L1594
-	ldrb	w4, [x26]
-	mov	x3, x24
-	mov	x2, x20
-	mov	w1, w25
-	mov	w0, 0
-	bl	ftl_read_page
-	cmn	w0, #1
-	beq	.L1590
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x0]
-	cmp	w0, w27
-	bne	.L1590
-.L1594:
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	add	x21, x21, :lo12:.LANCHOR131
-	strh	w19, [x21, 2]
-	ldr	w1, [x0, 16]
-	cmp	w1, 2048
-	bhi	.L1591
-.L1592:
-	ldr	w1, [x0, 24]
-	cmp	w1, 2048
-	bls	.L1595
-	ldr	w2, [x0, 28]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 24]
-.L1595:
-	ldr	w1, [x0, 32]
-	cmp	w1, 1024
-	bls	.L1596
-	ldr	w2, [x0, 36]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 32]
-.L1596:
-	ldr	w1, [x0, 40]
-	cmp	w1, 1024
-	bls	.L1597
-	ldr	w2, [x0, 44]
-	add	w2, w2, w1, lsr 10
-	and	w1, w1, 1023
-	stp	w1, w2, [x0, 40]
-.L1597:
-	ldr	w1, [x0, 64]
-	add	w1, w1, 1
-	str	w1, [x0, 64]
-	mov	w0, 0
-	bl	ftl_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	mov	w0, 0
-	b	.L1579
-.L1590:
-	sub	w23, w23, #1
-	sub	w25, w25, #1
-	sxth	w23, w23
-	b	.L1589
-.L1591:
-	ldr	w2, [x0, 20]
-	add	w2, w2, w1, lsr 11
-	and	w1, w1, 2047
-	stp	w1, w2, [x0, 16]
-	b	.L1592
-	.size	ftl_info_blk_init, .-ftl_info_blk_init
-	.section	.text.ftl_ext_info_flush,"ax",@progbits
+.L1667:
+	bl	zftl_flash_exit_slc_mode
+	b	.L1668
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",@progbits
 	.align	2
-	.global	ftl_ext_info_flush
-	.type	ftl_ext_info_flush, %function
-ftl_ext_info_flush:
-	stp	x29, x30, [sp, -96]!
-	adrp	x0, .LANCHOR60
+	.global	flash_test_blk
+	.type	flash_test_blk, %function
+flash_test_blk:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
 	stp	x19, x20, [sp, 16]
+	and	w19, w1, 65535
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	ldr	w1, [x0, 520]
-	stp	x25, x26, [sp, 64]
-	str	x27, [sp, 80]
-	cbz	w1, .L1613
-	str	wzr, [x0, 520]
-.L1613:
-	adrp	x24, .LANCHOR46
-	adrp	x20, .LANCHOR79
-	adrp	x21, .LANCHOR71
-	add	x20, x20, :lo12:.LANCHOR79
-	mov	x22, x24
-	add	x21, x21, :lo12:.LANCHOR71
-	mov	w0, 0
-	bl	ftl_total_vpn_update
-.L1622:
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	ldr	w1, [x0, 56]
-	add	w1, w1, 1
-	str	w1, [x0, 56]
-	ldrh	w1, [x0, 140]
-	ldrh	w0, [x20]
-	cmp	w1, w0
-	bcc	.L1614
-	bl	ftl_ext_alloc_new_blk
-.L1614:
-	ldr	x2, [x22, #:lo12:.LANCHOR46]
-	mov	w0, 65535
-	ldrh	w1, [x2, 130]
-	cmp	w1, w0
-	bne	.L1615
-	adrp	x1, .LANCHOR134
-	adrp	x0, .LC0
-	mov	w2, 1048
-	add	x1, x1, :lo12:.LANCHOR134
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1616:
-	b	.L1616
-.L1615:
-	ldrh	w0, [x21]
-	mov	w19, 21
-	adrp	x25, .LANCHOR45
-	adrp	x26, .LANCHOR130
-	sub	w0, w19, w0
-	mov	w19, 1
-	add	x23, x26, :lo12:.LANCHOR130
-	asr	w27, w1, w0
-	lsl	w19, w19, w0
-	adrp	x0, .LANCHOR75
-	sub	w19, w19, #1
-	and	w19, w19, w1
-	ldrh	w1, [x0, #:lo12:.LANCHOR75]
-	ldrh	w0, [x2, 140]
-	ldrb	w2, [x25, #:lo12:.LANCHOR45]
-	madd	w19, w19, w1, w0
-	lsl	w2, w2, 1
-	mov	w1, 0
-	mov	x0, x23
+	ands	w21, w0, 255
+	str	x23, [sp, 48]
+	bne	.L1674
+	adrp	x0, .LANCHOR147
+	ldrb	w0, [x0, #:lo12:.LANCHOR147]
+	cmp	w0, w19
+	bhi	.L1678
+.L1674:
+	adrp	x22, .LANCHOR142
+	adrp	x23, .LANCHOR143
+	mov	w2, 32
+	mov	w1, 165
+	ldr	x0, [x22, #:lo12:.LANCHOR142]
 	bl	ftl_memset
-	and	w19, w19, 65535
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	mov	w1, w19
-	ldrb	w4, [x25, #:lo12:.LANCHOR45]
-	mov	x3, x23
-	str	wzr, [x26, #:lo12:.LANCHOR130]
-	adrp	x2, ftl_ext_info_data_buffer
-	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	ldr	w0, [x0, 56]
-	str	w0, [x23, 4]
-	mov	w0, w27
-	bl	ftl_prog_page
-	ldr	x2, [x22, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 140]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 140]
-	cmp	w1, 1
-	beq	.L1622
+	ldr	x0, [x23, #:lo12:.LANCHOR143]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	adrp	x0, .LANCHOR20
+	ldrh	w20, [x0, #:lo12:.LANCHOR20]
+	mov	w0, w21
+	mul	w20, w20, w19
+	mov	w1, w20
+	bl	flash_erase_block
 	cmn	w0, #1
-	beq	.L1622
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	beq	.L1676
+	adrp	x19, .LANCHOR26
+	add	x19, x19, :lo12:.LANCHOR26
+	ldr	x3, [x22, #:lo12:.LANCHOR142]
+	mov	w1, w20
+	ldr	x2, [x23, #:lo12:.LANCHOR143]
+	mov	w0, w21
+	ldrb	w4, [x19, 9]
+	bl	flash_prog_page
+	cmn	w0, #1
+	beq	.L1676
+	ldrb	w4, [x19, 9]
+	mov	w1, w20
+	ldr	x3, [x22, #:lo12:.LANCHOR142]
+	mov	w0, w21
+	ldr	x2, [x23, #:lo12:.LANCHOR143]
+	bl	flash_read_page
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L1676
+	ldr	x0, [x23, #:lo12:.LANCHOR143]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	bne	.L1676
+	ldr	x0, [x22, #:lo12:.LANCHOR142]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	beq	.L1677
+.L1676:
+	mov	w19, -1
+.L1677:
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_erase_block
+	mov	w0, w19
+.L1673:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
-	.section	.text.ftl_ext_info_init,"ax",@progbits
+.L1678:
+	mov	w0, 0
+	b	.L1673
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
 	.align	2
-	.global	ftl_ext_info_init
-	.type	ftl_ext_info_init, %function
-ftl_ext_info_init:
-	stp	x29, x30, [sp, -112]!
-	adrp	x0, .LANCHOR86
-	mov	w4, 4
+	.global	flash_start_tlc_page_prog
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	stp	x29, x30, [sp, -48]!
+	and	w8, w0, 255
+	adrp	x0, .LANCHOR15
+	and	w3, w3, 255
 	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	strh	wzr, [x0, #:lo12:.LANCHOR86]
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
 	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	adrp	x25, ftl_ext_info_data_buffer
-	stp	x23, x24, [sp, 48]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	ldrh	w19, [x0, 130]
-	adrp	x0, .LANCHOR71
-	stp	x27, x28, [sp, 80]
-	adrp	x24, .LANCHOR130
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	and	w26, w19, 16383
-	add	x3, x24, :lo12:.LANCHOR130
-	sub	w0, w0, w1
-	mov	w1, w26
-	asr	w19, w19, w0
-	and	w19, w19, 255
-	mov	w0, w19
-	bl	flash_get_last_written_page
-	sxth	w21, w0
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1628
-	adrp	x1, .LANCHOR135
-	adrp	x0, .LC28
-	mov	w3, w21
-	mov	w2, 1091
-	add	x1, x1, :lo12:.LANCHOR135
-	add	x0, x0, :lo12:.LC28
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
+	str	x21, [sp, 32]
+	cmp	w0, w3
+	bhi	.L1690
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 671
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1628:
-	adrp	x27, .LANCHOR45
-	adrp	x28, .LANCHOR75
-	mov	w5, 20038
-	add	x27, x27, :lo12:.LANCHOR45
-	add	x28, x28, :lo12:.LANCHOR75
-	mov	w23, 0
-	movk	w5, 0x4549, lsl 16
-.L1629:
-	and	w20, w21, 65535
-	sub	w0, w20, w23
-	tbnz	x0, 15, .L1634
-	ldrh	w0, [x28]
-	sub	w1, w21, w23
-	ldrb	w4, [x27]
-	add	x3, x24, :lo12:.LANCHOR130
-	str	w5, [x29, 108]
-	add	x2, x25, :lo12:ftl_ext_info_data_buffer
-	madd	w1, w0, w26, w1
-	mov	w0, w19
-	bl	flash_read_page_en
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	ldr	w5, [x29, 108]
-	beq	.L1630
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldr	w0, [x0]
-	cmp	w0, w5
-	bne	.L1630
-.L1634:
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 140]
-	cmp	w1, w21
-	bgt	.L1632
-	add	w20, w20, 1
-	strh	w20, [x0, 140]
-	bl	ftl_ext_info_flush
-.L1632:
-	adrp	x0, .LANCHOR60
-	mov	w1, -1
+.L1691:
+	b	.L1691
+.L1690:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	and	w7, w1, 255
+	and	w21, w2, 255
+	ldrb	w20, [x0, w3, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x19, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w20
+	bl	nandc_cs
+	cbz	w8, .L1692
+	sxtw	x0, w20
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w8, [x0, 8]
+.L1692:
+	ubfiz	x0, x20, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w7, [x19, 2056]
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	add	w4, w4, w4, lsl 1
+	str	w0, [x19, 2052]
+	sub	w0, w4, #1
+	add	w0, w0, w7
+	bl	nandc_set_seed
+	mov	x3, x6
+	adrp	x0, .LANCHOR26+9
+	mov	x2, x5
+	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w21, [x19, 2056]
+	mov	w0, w20
+	ldr	x21, [sp, 32]
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	str	wzr, [x0, 520]
-	adrp	x0, .LANCHOR87
-	strh	w1, [x0, #:lo12:.LANCHOR87]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 112
-	ret
-.L1630:
-	add	w23, w23, 1
-	b	.L1629
-	.size	ftl_ext_info_init, .-ftl_ext_info_init
-	.section	.text.ftl_low_format,"ax",@progbits
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
 	.align	2
-	.global	ftl_low_format
-	.type	ftl_low_format, %function
-ftl_low_format:
-	stp	x29, x30, [sp, -80]!
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 26
+	mov	w1, 1
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR75
-	stp	x21, x22, [sp, 32]
-	add	x20, x20, :lo12:.LANCHOR75
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR5
-	mov	x24, x21
-	stp	x25, x26, [sp, 64]
-	mov	w19, 8
-.L1646:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	add	x0, x0, x19, sxtw
-	ldrb	w0, [x0, 32]
-	add	w1, w0, 127
-	and	w1, w1, 255
-	cmp	w1, 125
-	bhi	.L1643
-	adrp	x1, .LANCHOR136
-	adrp	x0, .LC0
-	mov	w2, 1228
-	add	x1, x1, :lo12:.LANCHOR136
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1644:
-	b	.L1644
-.L1643:
-	cmp	w0, 255
-	beq	.L1645
-	ldrh	w1, [x20]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_erase_block
-.L1645:
-	add	w19, w19, 1
-	cmp	w19, 16
-	bne	.L1646
-	bl	sblk_init
-	adrp	x19, .LANCHOR46
-	bl	ftl_info_blk_init
-	adrp	x20, .LANCHOR54
-	mov	w1, 0
-	mov	w2, 16384
-	adrp	x0, ftl_info_data_buffer
-	add	x0, x0, :lo12:ftl_info_data_buffer
-	bl	ftl_memset
-	add	x25, x20, :lo12:.LANCHOR54
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w1, 21574
-	movk	w1, 0x494c, lsl 16
-	mov	w21, 0
-	mov	w26, 1
-	str	w1, [x0]
-.L1647:
-	ldrh	w0, [x25]
-	adrp	x22, .LANCHOR70
-	adrp	x23, .LANCHOR59
-	cmp	w0, w21
-	bhi	.L1655
-	adrp	x21, .LANCHOR60
-	mov	w1, 0
-	mov	w2, 16384
-	adrp	x0, ftl_ext_info_data_buffer
-	add	x0, x0, :lo12:ftl_ext_info_data_buffer
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	mov	w1, 20038
-	movk	w1, 0x4549, lsl 16
-	mov	w3, 3
-	str	w1, [x0]
-	ldr	x0, [x24, #:lo12:.LANCHOR5]
-	ldrb	w5, [x22, #:lo12:.LANCHOR70]
-	ldr	x1, [x23, #:lo12:.LANCHOR59]
-	cmp	w5, 1
-	ldrb	w0, [x0, 47]
-	csinc	w3, w3, wzr, ne
-	and	w3, w3, 255
-	udiv	w0, w0, w5
-	add	w24, w0, 1
-	ubfiz	x0, x0, 2, 8
-	add	x0, x0, 4
-	add	x0, x1, x0
-.L1656:
-	ldrb	w2, [x1, 2]
-	add	x1, x1, 4
-	strb	w3, [x1, -1]
-	orr	w2, w2, -32
-	and	w2, w2, -25
-	strb	w2, [x1, -2]
-	cmp	x1, x0
-	bne	.L1656
-	mov	w4, 16
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	sdiv	w4, w4, w5
-	add	w4, w24, w4
-	and	w4, w4, 65535
-	strh	w4, [x0, 134]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1657
-	adrp	x0, .LC67
-	mov	w3, w24
-	mov	w2, 128
-	mov	w1, 1265
-	add	x0, x0, :lo12:.LC67
-	bl	printf
-.L1657:
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 160
-	bl	ftl_memset
-	ldrb	w11, [x22, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR76
-	adrp	x22, .LANCHOR71
-	ldr	x3, [x19, #:lo12:.LANCHOR46]
-	and	w13, w11, 65535
-	ldrb	w12, [x0, #:lo12:.LANCHOR76]
-	ldrh	w0, [x22, #:lo12:.LANCHOR71]
-	mov	w5, 21
-	ldr	x2, [x23, #:lo12:.LANCHOR59]
-	mov	w4, 0
-	sub	w0, w5, w0
-	mul	w1, w24, w13
-	mov	w5, 1
-	ldrh	w7, [x3, 134]
-	lsl	w5, w5, w0
-	and	w1, w1, 65535
-	and	w5, w5, 65535
-.L1658:
-	cmp	w24, w7
-	bcc	.L1664
-	ldrh	w5, [x20, #:lo12:.LANCHOR54]
-	add	x0, x2, x7, uxth 2
-	mov	w1, w7
-	mov	w6, 1
-.L1665:
-	cmp	w1, w5
-	bcc	.L1666
-	sub	w5, w5, w7
-	strh	w4, [x3, 112]
-	strh	w5, [x3, 116]
-	mov	w0, 1
-	strh	wzr, [x3, 114]
-	strh	wzr, [x3, 118]
-	bl	ftl_alloc_sblk
-	mov	w23, w0
-	mov	w1, 0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	mov	w0, w23
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w1, 65533
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1667
-	adrp	x1, .LANCHOR136
-	adrp	x0, .LC0
-	mov	w2, 1297
-	add	x1, x1, :lo12:.LANCHOR136
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1668:
-	b	.L1668
-.L1655:
-	adrp	x0, .LANCHOR53
-	strh	w21, [x0, #:lo12:.LANCHOR53]
-	mov	w0, w21
-	bl	ftl_test_block
-	ldrb	w11, [x22, #:lo12:.LANCHOR70]
-	adrp	x0, .LANCHOR76
-	ldr	x6, [x23, #:lo12:.LANCHOR59]
-	mov	w8, 0
-	ldrb	w13, [x0, #:lo12:.LANCHOR76]
-	mov	w7, 1
-	mov	w10, 0
-	mul	w12, w21, w11
-	add	x6, x6, x21, uxth 2
-	add	w13, w13, 1
-.L1648:
-	cmp	w7, w13
-	beq	.L1652
-	add	w15, w11, w8
-	sub	w14, w7, #1
-	b	.L1653
-.L1651:
-	add	w1, w8, w12
-	mov	w0, w14
-	bl	flash_check_bad_block
-	cbz	w0, .L1649
-	ldrb	w1, [x6, 3]
-	lsl	w0, w26, w8
-	orr	w0, w0, w1
-	strb	w0, [x6, 3]
-.L1650:
-	add	w8, w8, 1
-.L1653:
-	cmp	w8, w15
-	bne	.L1651
-	add	w7, w7, 1
-	sub	w12, w12, w11
-	and	w7, w7, 65535
-	b	.L1648
-.L1649:
-	add	w10, w10, 1
-	and	w10, w10, 65535
-	b	.L1650
-.L1652:
-	cbnz	w10, .L1654
-	ldrb	w0, [x6, 2]
-	orr	w0, w0, -32
-	strb	w0, [x6, 2]
-.L1654:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L1647
-.L1664:
-	add	x14, x2, x24, uxth 2
-	mov	w15, 0
-	mov	w16, 0
-	mov	w6, 0
-	ldrb	w0, [x14, 2]
-	orr	w0, w0, -32
-	and	w0, w0, -25
-	strb	w0, [x14, 2]
-.L1659:
-	cmp	w6, w12
-	bcc	.L1670
-	add	w24, w24, 1
-	add	w1, w13, w1
-	and	w24, w24, 65535
-	and	w1, w1, 65535
-	b	.L1658
-.L1662:
-	ldrb	w10, [x14, 3]
-	add	w17, w16, w8
-	asr	w10, w10, w17
-	tbnz	x10, 0, .L1660
-	cmp	w11, 1
-	bls	.L1669
-	and	w0, w0, 1
-	add	w0, w1, w0
-	and	w0, w0, 65535
-.L1661:
-	add	x10, x3, x4, sxtw 1
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	add	w0, w0, w15
-	strh	w0, [x10, 160]
-.L1660:
-	add	x8, x8, 1
-.L1663:
-	and	w0, w8, 65535
-	cmp	w0, w13
-	bcc	.L1662
-	add	w6, w6, 1
-	add	w0, w5, w15
-	and	w6, w6, 65535
-	add	w16, w16, w11
-	and	w15, w0, 65535
-	b	.L1659
-.L1669:
-	mov	w0, w1
-	b	.L1661
-.L1670:
-	mov	x8, 0
-	b	.L1663
-.L1666:
-	ldrb	w2, [x0, 2]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	add	x0, x0, 4
-	and	w2, w2, 31
-	bfi	w2, w6, 3, 2
-	strb	w2, [x0, -2]
-	b	.L1665
-.L1667:
-	strh	wzr, [x0, 696]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	bl	ftl_memset
-	ldrh	w2, [x22, #:lo12:.LANCHOR71]
-	mov	w1, 21
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	sub	w1, w1, w2
-	asr	w1, w20, w1
-	strh	w1, [x0, 694]
-	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR137
-	strh	w20, [x0, 692]
-	ldrh	w1, [x1, #:lo12:.LANCHOR137]
-	strh	w23, [x0, 416]
-	strh	w1, [x0, 698]
-	bl	ftl_alloc_sys_blk
-	mov	w20, w0
-	mov	w1, 0
-	bl	ftl_erase_phy_blk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	str	x21, [sp, 32]
+	and	w21, w20, 2097151
+	ubfx	x20, x20, 21, 3
+	mov	w4, w21
+	ldrb	w0, [x0, 60]
+	mov	w3, w20
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 26
 	mov	w1, 2
-	strh	w20, [x0, 130]
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x19, 16]
+	mov	w4, w21
+	ldr	x7, [x19]
+	mov	w3, w20
+	mov	w2, 16
 	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	b	buf_add_tail
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	.align	2
+	.global	sblk_tlc_prog_one_page
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+.L1700:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1701
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 32
 	ret
-	.size	ftl_low_format, .-ftl_low_format
-	.section	.text.ftl_re_low_format_test,"ax",@progbits
+.L1701:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1700
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
 	.align	2
-	.global	ftl_re_low_format_test
-	.type	ftl_re_low_format_test, %function
-ftl_re_low_format_test:
-	stp	x29, x30, [sp, -48]!
-	mov	w1, 1
-	adrp	x0, .LC68
-	add	x0, x0, :lo12:.LC68
+	.global	sblk_xlc_prog_pages
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	stp	x29, x30, [sp, -64]!
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR46
+	mov	x19, x0
+	ldr	x0, [x0]
 	stp	x21, x22, [sp, 32]
-	bl	printf
-	bl	sblk_init
-	adrp	x21, .LANCHOR54
-	bl	ftl_info_blk_init
-	bl	ftl_ext_info_init
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	adrp	x2, .LANCHOR59
-	ldrh	w7, [x21, #:lo12:.LANCHOR54]
-	mov	w3, 0
-	ldr	x2, [x2, #:lo12:.LANCHOR59]
-	mov	w4, 0
-	mov	w5, 0
-	ldrh	w1, [x0, 134]
-	add	x2, x2, x1, uxth 2
-.L1681:
-	cmp	w1, w7
-	bcc	.L1685
-	strh	w5, [x0, 114]
-	strh	w4, [x0, 118]
-	strh	w3, [x0, 116]
-	strh	wzr, [x0, 122]
-	strh	wzr, [x0, 120]
-	strh	wzr, [x0, 124]
-	mov	w0, 1
-	bl	ftl_alloc_sblk
-	mov	w22, w0
-	mov	w1, 0
-	bl	ftl_erase_sblk
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	mov	w0, w22
-	add	x1, x1, 672
-	bl	ftl_get_blk_list_in_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w1, 65533
-	ldrh	w20, [x0, 672]
-	strh	wzr, [x0, 690]
-	sub	w2, w20, #1
-	cmp	w1, w2, uxth
-	bcs	.L1686
-	adrp	x1, .LANCHOR138
-	adrp	x0, .LC0
-	mov	w2, 1366
-	add	x1, x1, :lo12:.LANCHOR138
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1687:
-	b	.L1687
-.L1685:
-	ldrb	w6, [x2, 2]
-	and	w8, w6, 31
-	strb	w8, [x2, 2]
-	ands	w6, w6, 24
-	bne	.L1682
-	add	w5, w5, 1
-	and	w5, w5, 65535
-.L1683:
-	add	w1, w1, 1
-	add	x2, x2, 4
-	and	w1, w1, 65535
-	b	.L1681
-.L1682:
-	cmp	w6, 16
-	bne	.L1684
-	add	w4, w4, 1
-	and	w4, w4, 65535
-	b	.L1683
-.L1684:
-	add	w3, w3, 1
-	and	w3, w3, 65535
-	b	.L1683
-.L1686:
-	strh	wzr, [x0, 696]
-	mov	w2, 256
-	mov	w1, 255
-	add	x0, x0, 416
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w2, 4096
-	mov	w1, 0
-	add	x0, x0, 704
-	bl	ftl_memset
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	lsr	w1, w20, 14
-	and	w20, w20, 16383
-	ldrh	w2, [x21, #:lo12:.LANCHOR54]
-	strh	w1, [x0, 694]
+	mov	x22, x1
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	ldr	w20, [x0, 40]
+.L1704:
 	mov	w1, 1
-	strh	w1, [x0, 688]
-	adrp	x1, .LANCHOR137
-	strh	w20, [x0, 692]
-	adrp	x20, .LANCHOR60
-	ldrh	w1, [x1, #:lo12:.LANCHOR137]
-	lsl	w2, w2, 1
-	strh	w22, [x0, 416]
-	strh	w1, [x0, 698]
-	adrp	x0, .LANCHOR56
-	mov	w1, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	mov	w1, 2
-	add	x0, x0, 16
-	bl	ftl_open_sblk_init
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1705
+	cmp	w24, 2
+	bne	.L1706
+	ldr	x0, [x19]
+	mov	w2, 17
+	ldr	x1, [x22]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	and	w23, w20, 2097151
+	ldrb	w0, [x0, 60]
+	ubfx	x20, x20, 21, 3
+	mov	w4, w23
+	mov	w3, w20
+	ldr	w21, [x1, 40]
+	mov	w1, 1
+	bl	flash_start_tlc_page_prog
+	and	w21, w21, 2097151
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22]
+	mov	w3, w20
+	mov	w2, 26
+	mov	w1, 1
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w23
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22, 8]
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w23
+	ldr	x0, [x19, 16]
+	mov	w3, w20
+	mov	w2, 17
 	mov	w1, 3
-	add	x0, x0, 48
-	bl	ftl_open_sblk_init
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	add	x0, x0, 136
-	ldrh	w2, [x1, 134]
-	strh	w2, [x0, -10]
-	mov	w2, -1
-	strh	wzr, [x0, -12]
-	strh	w2, [x0, -56]
-	strh	w2, [x0, -6]
-	mov	w2, -1
-	strh	wzr, [x0, -16]
-	str	w2, [x0, 408]
-	strh	wzr, [x0, -14]
-	strh	w2, [x1, 126]
-	mov	w2, 256
-	mov	w1, 255
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	mov	w2, 128
-	mov	w1, 255
-	add	x0, x0, 392
-	bl	ftl_memset
-	ldr	x0, [x20, #:lo12:.LANCHOR60]
-	str	wzr, [x0, 520]
-	str	wzr, [x0, 524]
-	str	wzr, [x0, 528]
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	ftl_info_blk_init
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 16]
+	mov	w1, 3
+	ldr	x7, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 16
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 5
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
+	bl	buf_add_tail
+.L1707:
 	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
 	ret
-	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
-	.section	.text.ftl_prog_ppa_page,"ax",@progbits
-	.align	2
-	.global	ftl_prog_ppa_page
-	.type	ftl_prog_ppa_page, %function
-ftl_prog_ppa_page:
-	ubfx	x5, x0, 21, 3
-	mov	w4, w3
-	mov	x3, x2
-	mov	x2, x1
-	and	w1, w0, 2097151
-	mov	w0, w5
-	b	ftl_prog_page
-	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
-	.section	.text.ftl_write_last_log_page,"ax",@progbits
+.L1705:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1704
+.L1706:
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
+	b	.L1707
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.flash_start_page_prog,"ax",@progbits
 	.align	2
-	.global	ftl_write_last_log_page
-	.type	ftl_write_last_log_page, %function
-ftl_write_last_log_page:
-	ldrh	w1, [x0, 6]
-	cmp	w1, 1
-	bne	.L1692
-	stp	x29, x30, [sp, -48]!
-	adrp	x1, .LANCHOR82
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x0
+	str	x25, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR15
 	stp	x21, x22, [sp, 32]
-	ldr	x20, [x1, #:lo12:.LANCHOR82]
-	ldrh	w22, [x0, 12]
-	bl	ftl_get_new_free_page
-	mov	w21, w0
-	cmn	w0, #1
-	beq	.L1693
-	ldrh	w0, [x19]
-	add	x20, x20, x22, uxth 2
-	bl	ftl_vpn_decrement
-	adrp	x0, .LANCHOR121
-	mov	w1, 15555
-	add	x6, x0, :lo12:.LANCHOR121
-	movk	w1, 0xf55f, lsl 16
-	str	w1, [x0, #:lo12:.LANCHOR121]
-	adrp	x0, .LANCHOR79
-	ldrh	w1, [x0, #:lo12:.LANCHOR79]
-	adrp	x0, .LANCHOR69
-	ldrb	w0, [x0, #:lo12:.LANCHOR69]
-	mul	w1, w1, w0
-	mov	x0, x20
-	lsl	w1, w1, 2
-	bl	js_hash
-	str	w0, [x6, 4]
-	adrp	x0, .LANCHOR45
-	mov	x2, x6
-	mov	x1, x20
-	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	stp	x23, x24, [sp, 48]
+	and	w22, w0, 255
+	stp	x19, x20, [sp, 16]
+	mov	x24, x3
+	ldrb	w0, [x1, #:lo12:.LANCHOR15]
+	ubfx	x3, x25, 21, 3
+	cmp	w0, w3
+	bhi	.L1710
+	adrp	x1, .LANCHOR149
+	adrp	x0, .LC0
+	mov	w2, 708
+	add	x1, x1, :lo12:.LANCHOR149
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1711:
+	b	.L1711
+.L1710:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	mov	x23, x2
+	and	w19, w25, 2097151
+	ldrb	w21, [x0, w3, sxtw]
+	adrp	x0, .LANCHOR13
+	ldr	x20, [x0, #:lo12:.LANCHOR13]
+	bl	nandc_rdy_status
+	cbnz	w0, .L1712
+	ldrb	w0, [x1, #:lo12:.LANCHOR15]
+	cmp	w0, 1
+	bne	.L1713
+	bl	nandc_wait_flash_ready
+.L1712:
 	mov	w0, w21
-	bl	ftl_prog_ppa_page
-.L1693:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 48
-	ret
-.L1692:
-	mov	w0, -1
-	ret
-	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
-	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
-	.align	2
-	.global	ftl_open_sblk_recovery
-	.type	ftl_open_sblk_recovery, %function
-ftl_open_sblk_recovery:
-	sub	sp, sp, #176
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x21, x22, [sp, 80]
-	adrp	x22, .LANCHOR22
-	stp	x27, x28, [sp, 128]
-	mov	x28, x0
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	stp	x25, x26, [sp, 112]
-	mov	x25, x1
-	stp	x19, x20, [sp, 64]
-	stp	x23, x24, [sp, 96]
-	tbz	x0, 12, .L1699
-	ldrh	w1, [x28, 2]
-	adrp	x0, .LC69
-	add	x0, x0, :lo12:.LC69
-	bl	printf
-.L1699:
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1700
-	ldrb	w1, [x28, 5]
-	adrp	x0, .LC70
-	add	x0, x0, :lo12:.LC70
-	bl	printf
-.L1700:
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1701
-	ldrh	w1, [x28]
-	adrp	x0, .LC71
-	add	x0, x0, :lo12:.LC71
-	bl	printf
-.L1701:
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1702
-	ldrh	w2, [x28, 18]
-	adrp	x0, .LC72
-	ldrh	w1, [x28, 16]
-	add	x0, x0, :lo12:.LC72
-	bl	printf
-.L1702:
-	ldrh	w0, [x28, 10]
-	adrp	x26, .LANCHOR45
-	strh	w0, [x28, 14]
-	mov	w27, 0
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	tst	x25, 50331648
+	bne	.L1714
+	adrp	x0, .LANCHOR18
+	adrp	x1, .LANCHOR19
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1715
+	ldrb	w0, [x1, #:lo12:.LANCHOR19]
+	cbz	w0, .L1716
+.L1715:
+	adrp	x0, .LANCHOR20
+	ldrb	w1, [x1, #:lo12:.LANCHOR19]
+	ldrh	w2, [x0, #:lo12:.LANCHOR20]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1717
+	add	w19, w0, w19, lsl 1
+.L1716:
+	mov	w0, w21
+	bl	zftl_flash_enter_slc_mode
+	b	.L1718
+.L1713:
+	mov	w2, 64
+	mov	w1, w19
+	mov	w0, w3
+	bl	flash_wait_device_ready_raw
+	b	.L1712
+.L1717:
+	adrp	x1, .LANCHOR21
+	add	x1, x1, :lo12:.LANCHOR21
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+.L1718:
+	ubfiz	x0, x21, 8, 8
+	add	x20, x20, x0
+	mov	w0, 128
+	str	w0, [x20, 2056]
+	and	w0, w19, 255
+	str	wzr, [x20, 2052]
+	str	wzr, [x20, 2052]
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 8
+	str	w0, [x20, 2052]
+	lsr	w0, w19, 16
+	str	w0, [x20, 2052]
+	mov	w0, w19
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR26+9
+	mov	x3, x24
+	mov	x2, x23
+	ldrb	w1, [x0, #:lo12:.LANCHOR26+9]
 	mov	w0, 1
-	adrp	x23, .LANCHOR79
-	bl	buf_alloc
-	ldrb	w20, [x28, 5]
-	ldrh	w21, [x28, 2]
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	ldr	x25, [sp, 64]
+	ldp	x23, x24, [sp, 48]
+	str	w22, [x20, 2056]
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	b	nandc_de_cs
+.L1714:
+	mov	w0, w21
+	bl	zftl_flash_exit_slc_mode
+	b	.L1718
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldr	w1, [x0, 40]
+	ldr	x3, [x0, 24]
+	ldr	x2, [x0, 8]
+	str	x19, [sp, 16]
 	mov	x19, x0
-	add	x0, x26, :lo12:.LANCHOR45
-	str	x0, [x29, 120]
-.L1703:
-	ldrh	w0, [x23, #:lo12:.LANCHOR79]
-	cmp	w0, w21
-	bhi	.L1718
-.L1706:
-	strh	w21, [x28, 2]
-	adrp	x21, .LANCHOR82
-	strb	w20, [x28, 5]
-	mov	w0, 0
-	ldrh	w3, [x28, 10]
-	mov	w1, 0
-	ldr	x4, [x21, #:lo12:.LANCHOR82]
-.L1719:
-	cmp	w1, w3
-	bcc	.L1721
-	ldrb	w20, [x28, 9]
-	adrp	x24, .LANCHOR56
-	ldrh	w1, [x23, #:lo12:.LANCHOR79]
-	madd	w20, w20, w1, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	sub	w20, w20, w3
-	and	w20, w20, 65535
-	tbz	x0, 12, .L1722
-	ldrh	w1, [x28]
-	ldr	x2, [x24, #:lo12:.LANCHOR56]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC74
+	mov	w0, 16
+	bl	flash_start_page_prog
+	adrp	x0, .LANCHOR114
+	ldr	w3, [x19, 40]
+	ldrb	w1, [x0, #:lo12:.LANCHOR114]
+	cmp	w1, 255
+	beq	.L1724
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+	ubfx	x3, x3, 21, 3
+	mov	x6, x2
+.L1726:
+	add	x4, x2, x1, lsl 6
+	ldr	w5, [x4, 40]
+	ubfx	x5, x5, 21, 3
+	cmp	w3, w5
+	bne	.L1725
+	ldrb	w5, [x4, 58]
+	cmp	w5, 6
+	bne	.L1725
+	mov	w1, 3
+	strb	w1, [x4, 58]
+.L1724:
+	mov	w1, 3
+	strb	w1, [x19, 58]
+	mov	w1, 1
+	strb	w1, [x19, 59]
+	mov	w1, -1
+	strb	w1, [x19]
+	mov	x1, x19
+	add	x0, x0, :lo12:.LANCHOR114
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+.L1725:
+	lsl	x1, x1, 6
+	ldrb	w1, [x6, x1]
+	cmp	w1, 255
+	bne	.L1726
+	b	.L1724
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",@progbits
+	.align	2
+	.global	sblk_prog_page
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w0, [x0, 50]
+	and	w20, w1, 255
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cbz	w0, .L1733
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L1733
+	ldr	w1, [x19, 40]
+	adrp	x0, .LC67
 	mov	w2, w20
-	add	x0, x0, :lo12:.LC74
-	bl	printf
-.L1722:
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
-	adrp	x25, .LANCHOR45
-	ldrh	w1, [x28]
-	adrp	x24, .LANCHOR69
-	adrp	x26, .LC75
-	add	x24, x24, :lo12:.LANCHOR69
-	add	x25, x25, :lo12:.LANCHOR45
-	add	x26, x26, :lo12:.LC75
-	strh	w20, [x0, x1, lsl 1]
-	mov	w20, 0
-	mov	x0, x19
-	bl	buf_free
-.L1723:
-	ldrb	w0, [x24]
-	cmp	w20, w0, lsl 1
-	bcc	.L1726
-	ldrh	w1, [x28, 12]
-	ldrh	w0, [x23, #:lo12:.LANCHOR79]
-	ldrb	w2, [x28, 9]
-	madd	w0, w0, w2, w1
-	mov	x1, -4
-	add	x0, x1, x0, sxtw 2
-	ldr	x1, [x21, #:lo12:.LANCHOR82]
-	ldr	w0, [x1, x0]
-	cmn	w0, #1
-	beq	.L1727
-	adrp	x1, .LANCHOR139
-	adrp	x0, .LC0
-	mov	w2, 811
-	add	x1, x1, :lo12:.LANCHOR139
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1728:
-	b	.L1728
-.L1718:
-	ldrb	w20, [x28, 5]
-	adrp	x24, .LANCHOR75
-	add	x24, x24, :lo12:.LANCHOR75
-.L1704:
-	ldrb	w0, [x28, 9]
-	cmp	w0, w20
-	bhi	.L1717
-	add	w21, w21, 1
-	strb	wzr, [x28, 5]
-	and	w21, w21, 65535
-	b	.L1703
-.L1717:
-	add	x0, x28, x20, sxtw 1
-	ldrh	w12, [x0, 16]
-	mov	w0, 65535
-	cmp	w12, w0
-	beq	.L1705
-	ldrh	w10, [x24]
-	ldrb	w3, [x26, #:lo12:.LANCHOR45]
-	ldr	x1, [x19, 8]
-	ldr	x2, [x19, 24]
-	madd	w10, w10, w12, w21
-	stp	w12, w10, [x29, 108]
-	mov	w0, w10
-	bl	ftl_read_ppa_page
-	mov	w11, w0
-	cmp	w0, 512
-	beq	.L1706
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	ldp	w12, w10, [x29, 108]
-	tbz	x0, 12, .L1707
-	ldr	x1, [x19, 24]
-	mov	w4, w11
-	ldr	x0, [x19, 8]
-	mov	w3, w10
-	str	w11, [x29, 112]
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w21
-	ldr	w1, [x1]
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w12
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
+	add	x0, x0, :lo12:.LC67
 	bl	printf
-	ldr	w11, [x29, 112]
-.L1707:
-	ldrb	w2, [x28, 9]
-	adrp	x0, .LANCHOR133
+.L1733:
+	adrp	x24, .LANCHOR30
+	adrp	x22, .LANCHOR43
+	add	x24, x24, :lo12:.LANCHOR30
+	add	x22, x22, :lo12:.LANCHOR43
+	mov	w21, 0
+	mov	w23, 1
+.L1734:
+	cbnz	w20, .L1745
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1745:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1735:
 	mov	w1, 1
-	strb	w1, [x0, #:lo12:.LANCHOR133]
-	ldrh	w0, [x28, 10]
-	madd	w1, w21, w2, w20
-	cmp	w0, w1
-	beq	.L1708
-	adrp	x1, .LANCHOR139
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1736
+	cmp	w20, 1
+	beq	.L1737
+	ldrb	w0, [x24]
+	cbnz	w0, .L1738
+.L1737:
+	mov	x0, x19
+	bl	queue_prog_cmd
+.L1739:
+	ubfiz	x19, x25, 6, 8
+	sub	w20, w20, #1
+	add	x19, x22, x19
+	b	.L1734
+.L1736:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1735
+.L1738:
+	ldrb	w0, [x19]
+	ubfx	x1, x26, 21, 3
+	cmp	w0, 255
+	bne	.L1740
+	adrp	x1, .LANCHOR150
 	adrp	x0, .LC0
-	mov	w2, 707
-	add	x1, x1, :lo12:.LANCHOR139
+	mov	w2, 486
+	add	x1, x1, :lo12:.LANCHOR150
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1709:
-	b	.L1709
-.L1708:
-	ldrh	w1, [x28, 6]
-	add	w1, w1, w0
-	ldrh	w0, [x23, #:lo12:.LANCHOR79]
-	mul	w0, w0, w2
+.L1741:
+	b	.L1741
+.L1740:
+	sbfiz	x0, x0, 6, 32
+	add	x0, x22, x0
+	ldr	w5, [x0, 40]
+	ubfx	x0, x5, 21, 3
 	cmp	w1, w0
-	beq	.L1710
-	adrp	x1, .LANCHOR139
-	adrp	x0, .LC0
-	mov	w2, 708
-	add	x1, x1, :lo12:.LANCHOR139
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1711:
-	b	.L1711
-.L1710:
-	cmn	w11, #1
-	beq	.L1713
-	ldr	x5, [x19, 24]
-	str	x5, [x29, 112]
-	ldr	w0, [x5, 4]
-	cmn	w0, #1
-	beq	.L1713
-	bl	lpa_hash_get_ppa
-	cbz	x25, .L1715
-	ldr	x5, [x29, 112]
-	ldr	w1, [x5, 8]
-	cmp	w0, w1
-	beq	.L1715
-	cmn	w0, #1
-	beq	.L1715
-	adrp	x3, .LANCHOR71
-	mov	w1, 21
-	adrp	x27, .LANCHOR70
-	ldrh	w6, [x3, #:lo12:.LANCHOR71]
-	sub	w4, w1, w6
-	mov	w1, 1
-	lsr	w2, w0, w6
-	lsl	w1, w1, w4
-	sub	w1, w1, #1
-	and	w1, w1, w2
-	ldrb	w2, [x27, #:lo12:.LANCHOR70]
-	mov	x4, x3
-	udiv	w1, w1, w2
-	ldrh	w2, [x25]
-	cmp	w2, w1, uxth
-	bne	.L1715
-	ldr	x1, [x29, 120]
-	ldr	w6, [x5]
-	adrp	x5, .LANCHOR130
-	str	w6, [x29, 108]
-	add	x2, x5, :lo12:.LANCHOR130
-	str	x5, [x29, 112]
-	ldrb	w3, [x1]
-	ldr	x1, [x19, 8]
-	str	x4, [x29, 96]
-	bl	ftl_read_ppa_page
-	ldr	x5, [x29, 112]
-	ldr	w6, [x29, 108]
-	ldr	w0, [x5, #:lo12:.LANCHOR130]
-	cmp	w6, w0
-	bhi	.L1715
-	ldr	x0, [x19, 24]
-	ldr	w1, [x0, 8]
-	cmn	w1, #1
-	beq	.L1713
-	ldr	x4, [x29, 96]
+	bne	.L1742
+	adrp	x0, .LANCHOR96
+	ldrh	w2, [x0, #:lo12:.LANCHOR96]
+	adrp	x0, .LANCHOR95
+	ldrb	w3, [x0, #:lo12:.LANCHOR95]
 	mov	w0, 21
-	ldrh	w3, [x4, #:lo12:.LANCHOR71]
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	ldrb	w1, [x27, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	bl	ftl_vpn_decrement
-.L1713:
-	ldrh	w0, [x28, 6]
-	mov	w27, 1
+	sub	w0, w0, w2
+	lsl	w1, w23, w2
+	sub	w3, w3, #1
+	sub	w1, w1, #1
+	lsl	w0, w23, w0
 	sub	w0, w0, #1
-	strh	w0, [x28, 6]
-	ldrh	w0, [x28, 10]
-	add	w0, w0, 1
-	strh	w0, [x28, 10]
-.L1705:
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L1704
-.L1721:
-	ldrh	w2, [x28, 12]
-	add	w2, w2, w1
-	ldr	w2, [x4, x2, lsl 2]
-	cmn	w2, #1
-	beq	.L1720
-	add	w20, w0, 1
-	and	w0, w20, 65535
-.L1720:
-	add	w1, w1, 1
-	b	.L1719
-.L1726:
-	cbz	w27, .L1724
-	ldrh	w0, [x28, 6]
-	cmp	w0, 1
-	bls	.L1724
-	mov	x0, x28
-	bl	ftl_get_new_free_page
-	mov	w4, w0
-	ldr	w0, [x22, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L1725
-	mov	w1, w4
-	str	w4, [x29, 120]
-	mov	x0, x26
-	bl	printf
-	ldr	w4, [x29, 120]
-.L1725:
-	adrp	x0, .LANCHOR46
-	ldr	x2, [x19, 24]
-	ldr	x1, [x19, 8]
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldr	w0, [x0, 8]
-	str	w0, [x2]
-	str	wzr, [x2, 12]
-	mov	w0, -1
-	stp	w0, w0, [x2, 4]
-	mov	w0, w4
-	str	wzr, [x1]
-	ldrb	w3, [x25]
-	bl	ftl_prog_ppa_page
-	ldrh	w0, [x28]
-	bl	ftl_vpn_decrement
-.L1724:
-	add	w20, w20, 1
-	b	.L1723
-.L1727:
-	ldrh	w0, [x28, 6]
-	cmp	w0, 1
-	bne	.L1698
-	ldp	x19, x20, [sp, 64]
-	mov	x0, x28
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
-	b	ftl_write_last_log_page
-.L1715:
+	and	w0, w0, w3
+	lsr	w4, w26, w2
+	and	w0, w0, 65535
+	and	w1, w1, 65535
+	and	w4, w0, w4
+	lsr	w2, w5, w2
+	and	w0, w0, w2
+	and	w26, w1, w26
+	cmp	w4, w0
+	and	w1, w1, w5
+	ccmp	w26, w1, 0, ne
+	bne	.L1742
+	cmp	w21, w3
+	beq	.L1742
+	ldr	w1, [x19, 40]
+	mov	w0, 17
+	ldr	x2, [x19, 8]
+	add	w21, w21, 1
 	ldr	x3, [x19, 24]
-	adrp	x0, .LANCHOR47
-	ldr	w0, [x0, #:lo12:.LANCHOR47]
-	ldr	w1, [x3, 4]
-	cmp	w1, w0
-	bcs	.L1713
-	ldrb	w0, [x28, 9]
-	ldrh	w1, [x23, #:lo12:.LANCHOR79]
-	ldrh	w2, [x28, 10]
-	mul	w0, w0, w1
-	sub	w0, w0, #1
-	cmp	w2, w0
-	bge	.L1713
-	adrp	x0, .LANCHOR46
-	ldr	w1, [x3]
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldr	w4, [x0, 8]
-	cmp	w1, w4
-	bls	.L1716
-	str	w1, [x0, 8]
-.L1716:
-	ldrh	w0, [x28, 12]
-	add	w2, w2, w0
-	ldp	w0, w1, [x3, 4]
-	bl	lpa_hash_update_ppa
-	b	.L1713
-.L1698:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 176
-	ret
-	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
-	.section	.text.pm_write_page,"ax",@progbits
+	bl	flash_start_page_prog
+	strb	w23, [x19, 59]
+	mov	w0, 8
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR114
+	add	x0, x0, :lo12:.LANCHOR114
+	bl	buf_add_tail
+	b	.L1739
+.L1742:
+	mov	x0, x19
+	mov	w21, 0
+	bl	queue_prog_cmd
+	b	.L1739
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",@progbits
 	.align	2
-	.global	pm_write_page
-	.type	pm_write_page, %function
-pm_write_page:
-	stp	x29, x30, [sp, -96]!
+	.global	ftl_flush
+	.type	ftl_flush, %function
+ftl_flush:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR112
 	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR112]
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR79
-	stp	x21, x22, [sp, 32]
-	mov	w19, w0
-	stp	x23, x24, [sp, 48]
-	adrp	x22, .LANCHOR46
-	mov	x24, x1
-	add	x20, x20, :lo12:.LANCHOR79
-	mov	x21, x22
-	stp	x25, x26, [sp, 64]
-	mov	w23, 65535
-	str	x27, [sp, 80]
-.L1772:
-	adrp	x25, .LANCHOR75
-.L1777:
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldr	w1, [x0, 48]
-	ldrh	w2, [x0, 696]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	ldrh	w1, [x20]
-	cmp	w2, w1
-	bcs	.L1773
-	ldrh	w0, [x0, 692]
-	cmp	w0, w23
-	bne	.L1774
-.L1773:
-	bl	pm_alloc_new_blk
-	mov	w0, 0
-	bl	ftl_info_flush
-.L1774:
-	ldr	x1, [x21, #:lo12:.LANCHOR46]
-	ldrh	w0, [x1, 692]
-	cmp	w0, w23
-	bne	.L1775
-	adrp	x1, .LANCHOR140
-	adrp	x0, .LC0
-	mov	w2, 224
-	add	x1, x1, :lo12:.LANCHOR140
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1776:
-	b	.L1776
-.L1775:
-	ldrh	w1, [x1, 696]
-	adrp	x27, .LANCHOR141
-	ldrh	w26, [x25, #:lo12:.LANCHOR75]
-	mov	w2, 64
-	madd	w26, w26, w0, w1
-	ldr	x0, [x27, #:lo12:.LANCHOR141]
-	mov	w1, 0
-	bl	ftl_memset
-	ldr	x3, [x27, #:lo12:.LANCHOR141]
-	mov	x2, x24
-	ldr	x0, [x21, #:lo12:.LANCHOR46]
-	str	w19, [x3]
-	ldr	w1, [x0, 48]
-	ldrb	w0, [x0, 694]
-	str	w1, [x3, 4]
-	adrp	x1, .LANCHOR45
-	ldrb	w4, [x1, #:lo12:.LANCHOR45]
-	mov	w1, w26
-	bl	ftl_prog_page
-	ldr	x2, [x21, #:lo12:.LANCHOR46]
-	ldrh	w1, [x2, 696]
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	strh	w1, [x2, 696]
-	cmp	w1, 1
-	beq	.L1777
-	cmn	w0, #1
-	bne	.L1778
-	mov	w1, w26
-	adrp	x0, .LC76
-	add	x0, x0, :lo12:.LC76
-	bl	printf
-	b	.L1772
-.L1778:
-	ldrh	w0, [x2, 698]
-	cmp	w19, w0
-	bcs	.L1779
-	add	x19, x2, x19, uxtw 2
-	str	w26, [x19, 704]
-.L1779:
-	mov	w0, 0
-	ldr	x27, [sp, 80]
+	mov	x19, x0
+	adrp	x20, .LANCHOR151
+	cbz	w1, .L1757
+	ldrb	w2, [x20, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	add	x0, x0, x2, lsl 6
+	bl	sblk_prog_page
+.L1757:
+	mov	w0, -1
+	strb	wzr, [x19, #:lo12:.LANCHOR112]
+	strb	w0, [x20, #:lo12:.LANCHOR151]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
 	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-	.size	pm_write_page, .-pm_write_page
-	.section	.text.flash_info_flush,"ax",@progbits
+	mov	w0, -1
+	ldp	x29, x30, [sp], 32
+	b	ftl_vpn_decrement
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",@progbits
 	.align	2
-	.global	flash_info_flush
-	.type	flash_info_flush, %function
-flash_info_flush:
-	stp	x29, x30, [sp, -112]!
-	mov	w2, 64
-	mov	w1, 0
+	.global	flash_prog_page_en
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	adrp	x23, .LANCHOR116
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR15
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR5
-	ldr	x0, [x23, #:lo12:.LANCHOR116]
-	adrp	x24, .LC78
 	stp	x21, x22, [sp, 32]
-	add	x24, x24, :lo12:.LC78
+	ldrb	w0, [x0, #:lo12:.LANCHOR15]
 	stp	x25, x26, [sp, 64]
-	adrp	x21, .LANCHOR117
-	stp	x27, x28, [sp, 80]
-	adrp	x22, .LANCHOR13
-	bl	ftl_memset
-	adrp	x25, .LANCHOR97
-	ldr	x1, [x20, #:lo12:.LANCHOR5]
-	mov	w3, 16
-	mov	w2, 4
-	adrp	x0, .LC77
-	add	x0, x0, :lo12:.LC77
-	add	x22, x22, :lo12:.LANCHOR13
-	add	x25, x25, :lo12:.LANCHOR97
-	add	x27, x21, :lo12:.LANCHOR117
+	cmp	w0, w24
+	bhi	.L1763
+	adrp	x1, .LANCHOR152
+	adrp	x0, .LC0
+	mov	w2, 494
+	add	x1, x1, :lo12:.LANCHOR152
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1764:
+	b	.L1764
+.L1763:
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	mov	w20, w1
+	mov	x23, x2
+	mov	x22, x3
+	mov	w25, w4
+	and	w21, w5, 255
+	ldrb	w26, [x0, w24, sxtw]
+	tst	x20, 50331648
+	bne	.L1775
+	adrp	x0, .LANCHOR18
+	ldrb	w1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR19
+	cbz	w1, .L1766
+	ldrb	w1, [x0, #:lo12:.LANCHOR19]
+	cbz	w1, .L1775
+.L1766:
+	adrp	x1, .LANCHOR20
+	ldrb	w0, [x0, #:lo12:.LANCHOR19]
+	ldrh	w1, [x1, #:lo12:.LANCHOR20]
+	udiv	w19, w20, w1
+	mul	w19, w19, w1
+	sub	w1, w20, w19
+	cbz	w0, .L1767
+	add	w19, w19, w1, lsl 1
+.L1765:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 4, .L1768
+	adrp	x0, .LC68
+	mov	w2, w20
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC68
+	bl	printf
+.L1768:
+	mov	w0, w26
+	mov	w4, w25
+	mov	x3, x22
+	mov	x2, x23
+	mov	w1, w19
+	bl	flash_prog_page
+	mov	w26, w0
+	cbz	w21, .L1769
+	adrp	x21, .LANCHOR142
+	adrp	x19, .LANCHOR143
+	mov	w4, w25
+	mov	w1, w20
+	ldr	x3, [x21, #:lo12:.LANCHOR142]
+	mov	w0, w24
+	ldr	x2, [x19, #:lo12:.LANCHOR143]
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L1770
+	ldr	x0, [x19, #:lo12:.LANCHOR143]
+	ldr	w1, [x23]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	bne	.L1770
+	ldr	x0, [x21, #:lo12:.LANCHOR142]
+	ldr	w1, [x22]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	beq	.L1769
+.L1770:
+	ldr	x1, [x21, #:lo12:.LANCHOR142]
+	mov	w3, 4
+	adrp	x0, .LC69
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC69
 	bl	rknand_print_hex
-	mov	w26, 0
-	ldr	x6, [x20, #:lo12:.LANCHOR5]
-	add	x0, x6, 16
-	ldr	w1, [x6, 8]
-	bl	js_hash
-	str	w0, [x6, 12]
-.L1784:
-	add	x28, x21, :lo12:.LANCHOR117
-	ldrb	w4, [x21, #:lo12:.LANCHOR117]
-	ldrh	w19, [x22]
-	mov	x0, x24
-	mov	w1, w4
-	ldrh	w3, [x28, 2]
-	stp	w3, w4, [x29, 104]
+	ldr	x1, [x19, #:lo12:.LANCHOR143]
+	mov	w3, 4
+	adrp	x0, .LC70
 	mov	w2, w3
+	add	x0, x0, :lo12:.LC70
+	bl	rknand_print_hex
+.L1771:
+	mov	w1, w20
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
 	bl	printf
-	ldrh	w0, [x25]
-	ldrh	w1, [x28, 2]
-	sub	w0, w0, #1
-	cmp	w1, w0
-	ldp	w3, w4, [x29, 104]
-	blt	.L1785
-	ldr	x6, [x20, #:lo12:.LANCHOR5]
-	ldrb	w7, [x28, 1]
-	strh	wzr, [x28, 2]
-	ldr	w0, [x6, 4]
-	ldrh	w1, [x6, 16]
-	add	w0, w0, 1
-	str	w0, [x6, 4]
-	ldrb	w0, [x21, #:lo12:.LANCHOR117]
-	add	w1, w1, 1
-	strb	w0, [x28, 1]
-	mov	x0, x6
-	strb	w7, [x21, #:lo12:.LANCHOR117]
-	strh	w1, [x0, 16]!
-	ldr	w1, [x6, 8]
-	bl	js_hash
-	ldrh	w19, [x22]
-	str	w0, [x6, 12]
-	mul	w19, w19, w7
-.L1791:
-	mov	w1, w19
-	mov	w0, 0
-	bl	flash_erase_block
-	b	.L1786
+	adrp	x1, .LANCHOR152
+	adrp	x0, .LC0
+	mov	w2, 520
+	add	x1, x1, :lo12:.LANCHOR152
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1773:
+	b	.L1773
+.L1767:
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	ldrh	w0, [x0, w1, uxtw 1]
+	add	w19, w0, w19
+	b	.L1765
+.L1775:
+	mov	w19, w20
+	b	.L1765
+.L1769:
+	cmn	w26, #1
+	beq	.L1771
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",@progbits
+	.align	2
+	.global	ftl_test_block
+	.type	ftl_test_block, %function
+ftl_test_block:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, ftl_tmp_buffer
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR145
+	stp	x21, x22, [sp, 32]
+	adrp	x26, .LANCHOR100
+	and	w21, w0, 65535
+	add	x0, x26, :lo12:.LANCHOR100
+	stp	x19, x20, [sp, 16]
+	mov	w23, 0
+	stp	x27, x28, [sp, 80]
+	mov	w20, 0
+	adrp	x27, .LANCHOR95
+	str	x0, [x29, 112]
+	str	wzr, [x24, #:lo12:ftl_tmp_buffer]
+	add	x0, x27, :lo12:.LANCHOR95
+	str	wzr, [x25, #:lo12:.LANCHOR145]
+	str	x0, [x29, 96]
+.L1787:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0]
+	cmp	w0, w20
+	bls	.L1797
+	add	x0, x27, :lo12:.LANCHOR95
+	mov	w22, 0
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	str	x0, [x29, 104]
+	b	.L1798
+.L1796:
+	ldr	x0, [x29, 104]
+	ldr	w0, [x0]
+	tbz	x0, 12, .L1788
+	adrp	x0, .LC72
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+.L1788:
+	ldr	x0, [x29, 96]
+	ldrb	w19, [x0]
+	madd	w19, w21, w19, w22
+	and	w19, w19, 65535
+	cbnz	w20, .L1789
+	adrp	x0, .LANCHOR12
+	ldr	x0, [x0, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, 47]
+	cmp	w0, w19
+	bcs	.L1790
 .L1789:
-	mov	w26, 1
-	b	.L1784
-.L1785:
-	madd	w19, w19, w4, w3
-	cbz	w1, .L1791
-.L1786:
-	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	and	w28, w20, 255
 	mov	w1, w19
-	ldr	x3, [x23, #:lo12:.LANCHOR116]
+	mov	w0, w28
+	bl	flash_check_bad_block
+	cbnz	w0, .L1790
+	adrp	x0, .LANCHOR99
+	mov	w1, w23
+	ldrh	w7, [x0, #:lo12:.LANCHOR99]
+	mov	w0, w28
+	mul	w26, w7, w19
+	mov	w2, w26
+	bl	flash_erase_block_en
+	cbz	w0, .L1791
+	adrp	x0, .LANCHOR67
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w0, 2
+	bne	.L1813
+	adrp	x0, .LANCHOR18
+	ldrb	w0, [x0, #:lo12:.LANCHOR18]
+	cbz	w0, .L1813
+	mov	w2, w26
+	mov	w1, 1
+	mov	w0, w28
+	bl	flash_erase_block_en
+	cbnz	w0, .L1813
+.L1795:
+	adrp	x0, .LANCHOR67
+	mov	w23, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	add	w26, w26, w0, lsl 24
+.L1794:
+	adrp	x0, .LANCHOR52
 	mov	w5, 1
-	mov	w4, 4
-	ldr	w0, [x2, 4]
-	str	w0, [x3]
-	mov	w0, 21321
-	movk	w0, 0x5359, lsl 16
-	str	w0, [x3, 4]
-	mov	w0, 0
+	add	x3, x25, :lo12:.LANCHOR145
+	add	x2, x24, :lo12:ftl_tmp_buffer
+	ldrb	w4, [x0, #:lo12:.LANCHOR52]
+	mov	w1, w26
+	mov	w0, w28
 	bl	flash_prog_page_en
-	cmn	w0, #1
-	ldrh	w1, [x27, 2]
-	add	w1, w1, 1
-	strh	w1, [x27, 2]
-	bne	.L1787
+	cbz	w0, .L1790
+.L1813:
 	mov	w1, w19
-	adrp	x0, .LC79
-	add	x0, x0, :lo12:.LC79
-	bl	printf
-	b	.L1784
-.L1787:
-	cbz	w26, .L1789
+	mov	w0, w28
+	bl	flash_mask_bad_block
+.L1790:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L1798:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w22
+	bhi	.L1796
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1787
+.L1791:
+	cbz	w23, .L1794
+	b	.L1795
+.L1797:
+	cbz	w23, .L1799
+	adrp	x0, .LANCHOR3
+	mov	w1, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
+	add	x21, x0, x21, uxth 2
+	ldrb	w0, [x21, 2]
+	bfi	w0, w1, 3, 2
+	strb	w0, [x21, 2]
+.L1799:
 	ldp	x19, x20, [sp, 16]
 	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-	.size	flash_info_flush, .-flash_info_flush
-	.section	.text.nand_flash_init,"ax",@progbits
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",@progbits
 	.align	2
-	.global	nand_flash_init
-	.type	nand_flash_init, %function
-nand_flash_init:
+	.global	ftl_prog_page
+	.type	ftl_prog_page, %function
+ftl_prog_page:
 	stp	x29, x30, [sp, -64]!
-	mov	w2, 2
-	adrp	x1, .LANCHOR20
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR26
+	and	w19, w0, 255
 	stp	x21, x22, [sp, 32]
-	adrp	x21, .LANCHOR34
-	stp	x23, x24, [sp, 48]
-	adrp	x19, .LANCHOR19
-	strb	w2, [x1, #:lo12:.LANCHOR20]
-	bl	nandc_init
-	add	x8, x20, :lo12:.LANCHOR26
-	add	x0, x19, :lo12:.LANCHOR19
-	mov	x10, x8
-	str	x0, [x21, #:lo12:.LANCHOR34]
-	mov	w7, 0
-	mov	w11, 44
-.L1798:
-	mov	x1, x8
-	mov	w0, w7
-	bl	flash_read_id
-	cbnz	w7, .L1793
-	ldrb	w0, [x10]
-	sub	w0, w0, #1
-	and	w0, w0, 255
-	cmp	w0, 253
-	bls	.L1794
-.L1796:
-	mov	w0, -2
-.L1792:
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w5, 1
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	bne	.L1814
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC0
+	mov	w2, 2013
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1816:
+	b	.L1816
+.L1814:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-.L1794:
-	ldrb	w0, [x10, 1]
-	cmp	w0, 255
-	beq	.L1796
-.L1793:
-	ldrb	w0, [x8]
-	cmp	w0, 181
-	bne	.L1797
-	strb	w11, [x8]
-.L1797:
-	add	w7, w7, 1
-	add	x8, x8, 8
-	and	w7, w7, 255
-	cmp	w7, 4
-	bne	.L1798
-	adrp	x0, .LANCHOR142
-	add	x8, x0, :lo12:.LANCHOR142
-	add	x8, x8, 1
-	mov	x7, x0
-	add	x12, x20, :lo12:.LANCHOR26
-	mov	x10, 0
-.L1801:
-	ldrb	w2, [x8, -1]
-	mov	w11, w10
-	lsl	x23, x10, 5
-	mov	x1, x12
-	mov	x0, x8
-	bl	flash_mem_cmp8
-	cbnz	w0, .L1799
-	add	x0, x7, :lo12:.LANCHOR142
-	ubfiz	x11, x11, 5, 32
-	add	x23, x0, x23
-	add	x0, x0, x11
-	adrp	x1, .LANCHOR143
-	add	x4, x1, :lo12:.LANCHOR143
-	ldrb	w3, [x0, 22]
-	mov	x0, 0
-.L1800:
-	lsl	x5, x0, 5
-	mov	w2, w0
-	ldrb	w5, [x5, x4]
-	cmp	w5, w3
-	beq	.L1802
-	add	x0, x0, 1
-	cmp	x0, 4
-	bne	.L1800
-	mov	w2, w0
-.L1802:
-	ubfiz	x0, x2, 5, 32
-	add	x1, x1, :lo12:.LANCHOR143
-	add	x1, x1, x0
-	mov	w2, 32
-	adrp	x0, .LANCHOR103
-	add	x22, x19, :lo12:.LANCHOR19
-	add	x0, x0, :lo12:.LANCHOR103
-	bl	ftl_memcpy
-	mov	x1, x23
-	mov	w2, 32
-	mov	x0, x22
-	bl	ftl_memcpy
-	adrp	x1, .LANCHOR7
-	mov	x24, x1
-	ldrb	w0, [x1, #:lo12:.LANCHOR7]
-	cmp	w0, 8
-	bhi	.L1803
-	ldrb	w1, [x22, 20]
-	cmp	w1, 60
-	bls	.L1804
-	mov	w1, 60
-	strb	w1, [x22, 20]
-.L1804:
-	cmp	w0, 8
-	bne	.L1803
-	ldrb	w0, [x20, #:lo12:.LANCHOR26]
-	cmp	w0, 44
-	bne	.L1803
-	add	x0, x19, :lo12:.LANCHOR19
-	ldrb	w1, [x0, 28]
-	cmp	w1, 2
-	bne	.L1803
-	strb	wzr, [x0, 28]
-.L1803:
-	mov	w0, 16384
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR119
-	adrp	x23, .LANCHOR5
-	add	x20, x19, :lo12:.LANCHOR19
-	adrp	x22, .LANCHOR25
-	str	x0, [x1, #:lo12:.LANCHOR119]
-	mov	w0, 16384
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR111
-	str	x0, [x1, #:lo12:.LANCHOR111]
-	mov	w0, 2048
-	bl	ftl_malloc
-	str	x0, [x23, #:lo12:.LANCHOR5]
-	mov	w0, 64
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR118
-	str	x0, [x1, #:lo12:.LANCHOR118]
-	mov	w0, 64
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR112
-	str	x0, [x1, #:lo12:.LANCHOR112]
-	mov	w0, 64
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR116
-	str	x0, [x1, #:lo12:.LANCHOR116]
-	adrp	x0, .LANCHOR123
-	strb	wzr, [x0, #:lo12:.LANCHOR123]
-	bl	flash_die_info_init
-	ldrb	w0, [x20, 18]
-	bl	flash_lsb_page_tbl_build
-	ldrb	w0, [x20, 20]
-	adrp	x20, .LANCHOR115
-	bl	nandc_bch_sel
-	str	xzr, [x20, #:lo12:.LANCHOR115]
-	ldr	x1, [x21, #:lo12:.LANCHOR34]
-	mov	x21, x23
-	ldrh	w0, [x1, 16]
-	lsr	w3, w0, 8
-	ubfx	x4, x0, 3, 1
-	and	w2, w3, 7
-	strb	w2, [x22, #:lo12:.LANCHOR25]
-	adrp	x2, .LANCHOR144
-	strb	w4, [x2, #:lo12:.LANCHOR144]
-	adrp	x2, .LANCHOR23
-	ubfx	x4, x0, 4, 1
-	strb	w4, [x2, #:lo12:.LANCHOR23]
-	adrp	x2, .LANCHOR66
-	ubfx	x4, x0, 12, 1
-	strb	w4, [x2, #:lo12:.LANCHOR66]
-	adrp	x2, .LANCHOR74
-	ubfx	x4, x0, 13, 1
-	ubfx	x0, x0, 14, 1
-	strb	w4, [x2, #:lo12:.LANCHOR74]
-	adrp	x2, .LANCHOR12
-	strb	w0, [x2, #:lo12:.LANCHOR12]
-	mov	w2, 60
-	ldrb	w0, [x1, 28]
-	adrp	x1, .LANCHOR11
-	strb	w0, [x1, #:lo12:.LANCHOR11]
-	adrp	x1, .LANCHOR145
-	strb	w2, [x1, #:lo12:.LANCHOR145]
-	ldrb	w2, [x24, #:lo12:.LANCHOR7]
-	cmp	w2, 9
-	bne	.L1805
-	mov	w2, 70
-	strb	w2, [x1, #:lo12:.LANCHOR145]
-.L1805:
-	add	x19, x19, :lo12:.LANCHOR19
-	adrp	x1, .LANCHOR146
-	adrp	x23, .LANCHOR2
-	strb	w0, [x1, #:lo12:.LANCHOR146]
-	ldrh	w1, [x19, 16]
-	ldrb	w0, [x19, 19]
-	strb	w0, [x23, #:lo12:.LANCHOR2]
-	tbz	x1, 6, .L1807
-	sub	w1, w0, #17
-	and	w1, w1, 255
-	cmp	w1, 2
-	bhi	.L1808
-	adrp	x1, micron_read_retrial
-	add	x1, x1, :lo12:micron_read_retrial
-	str	x1, [x20, #:lo12:.LANCHOR115]
-	cmp	w0, 19
-	adrp	x0, .LANCHOR113
-	beq	.L1809
-	mov	w1, 7
-.L1836:
-	strb	w1, [x0, #:lo12:.LANCHOR113]
-	b	.L1807
-.L1799:
-	add	x10, x10, 1
-	add	x8, x8, 32
-	cmp	x10, 24
-	bne	.L1801
-	b	.L1796
-.L1809:
-	mov	w1, 15
-	b	.L1836
-.L1808:
-	sub	w1, w0, #65
-	cmp	w0, 33
-	and	w1, w1, 255
-	ccmp	w1, 1, 0, ne
-	bhi	.L1811
-	adrp	x0, toshiba_read_retrial
-	add	x0, x0, :lo12:toshiba_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR115]
-	adrp	x0, .LANCHOR4
-	mov	w1, 4
-	strb	w1, [x0, #:lo12:.LANCHOR4]
-.L1838:
-	mov	w1, 7
-	adrp	x0, .LANCHOR113
-	b	.L1836
-.L1811:
-	sub	w2, w0, #34
-	sub	w1, w0, #67
-	and	w2, w2, 255
-	and	w1, w1, 255
-	cmp	w2, 1
-	ccmp	w1, 1, 0, hi
-	bhi	.L1812
-	adrp	x2, toshiba_read_retrial
-	add	x2, x2, :lo12:toshiba_read_retrial
-	str	x2, [x20, #:lo12:.LANCHOR115]
-	cmp	w0, 35
-	mov	w2, 68
-	ccmp	w0, w2, 4, ne
-	adrp	x0, .LANCHOR113
-	beq	.L1813
-	mov	w2, 7
-.L1835:
-	strb	w2, [x0, #:lo12:.LANCHOR113]
-	cmp	w1, 1
-	adrp	x0, .LANCHOR4
-	bhi	.L1815
-	mov	w1, 4
-.L1837:
-	strb	w1, [x0, #:lo12:.LANCHOR4]
-.L1807:
-	adrp	x19, .LANCHOR35
-	mov	w0, 4
-	strb	wzr, [x19, #:lo12:.LANCHOR35]
-	tbz	x3, 0, .L1816
-	bl	nandc_set_if_mode
-	mov	w0, 1
-	bl	flash_set_interface_mode
-	mov	w0, 1
-.L1816:
-	bl	nandc_set_if_mode
-	bl	flash_info_blk_init
-	cmn	w0, #1
-	beq	.L1792
-	ldrb	w0, [x23, #:lo12:.LANCHOR2]
-	sub	w0, w0, #1
-	and	w0, w0, 255
-	cmp	w0, 6
-	bhi	.L1818
-	adrp	x0, hynix_read_retrial
-	add	x0, x0, :lo12:hynix_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR115]
-.L1818:
-	ldrb	w0, [x22, #:lo12:.LANCHOR25]
-	tbnz	x0, 2, .L1819
-.L1839:
-	mov	w0, 0
-	b	.L1792
-.L1813:
-	mov	w2, 17
-	b	.L1835
-.L1815:
-	mov	w1, 5
-	b	.L1837
-.L1812:
-	sub	w0, w0, #36
-	and	w0, w0, 255
-	cmp	w0, 1
-	bhi	.L1807
-	adrp	x0, toshiba_3d_read_retrial
-	add	x0, x0, :lo12:toshiba_3d_read_retrial
-	str	x0, [x20, #:lo12:.LANCHOR115]
-	b	.L1838
-.L1819:
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	ldrb	w0, [x0, 19]
-	cbz	w0, .L1839
-	adrp	x0, .LANCHOR117
-	ldrb	w1, [x0, #:lo12:.LANCHOR117]
-	adrp	x0, .LANCHOR13
-	ldrh	w0, [x0, #:lo12:.LANCHOR13]
-	mul	w1, w1, w0
-	mov	w0, 0
-	bl	flash_ddr_para_scan
-	ldrb	w0, [x19, #:lo12:.LANCHOR35]
-	cbnz	w0, .L1839
-	ldr	x0, [x21, #:lo12:.LANCHOR5]
-	strb	wzr, [x0, 19]
-	bl	flash_info_flush
-	b	.L1839
-	.size	nand_flash_init, .-nand_flash_init
-	.section	.text.ftl_sysblk_dump,"ax",@progbits
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",@progbits
 	.align	2
-	.global	ftl_sysblk_dump
-	.type	ftl_sysblk_dump, %function
-ftl_sysblk_dump:
-	sub	sp, sp, #144
-	stp	x29, x30, [sp, 48]
-	add	x29, sp, 48
-	stp	x23, x24, [sp, 96]
-	stp	x25, x26, [sp, 112]
-	adrp	x26, .LANCHOR79
-	stp	x27, x28, [sp, 128]
-	add	x26, x26, :lo12:.LANCHOR79
-	stp	x19, x20, [sp, 64]
-	adrp	x27, .LANCHOR75
-	stp	x21, x22, [sp, 80]
-	and	w22, w0, 65535
-	mov	w0, 1
-	bl	buf_alloc
-	ldr	x23, [x0, 8]
-	adrp	x28, .LANCHOR45
-	mov	x24, x0
-	add	x27, x27, :lo12:.LANCHOR75
-	add	x28, x28, :lo12:.LANCHOR45
-	mov	w25, 0
-	mov	w19, 0
-.L1841:
-	ldrh	w0, [x26]
-	cmp	w0, w19
-	bhi	.L1843
-	mov	x0, x24
-	bl	buf_free
-	cbz	w25, .L1844
-	adrp	x1, .LANCHOR147
-	adrp	x0, .LC0
-	mov	w2, 655
-	add	x1, x1, :lo12:.LANCHOR147
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1845:
-	b	.L1845
-.L1843:
-	ldrh	w20, [x27]
-	ldrb	w3, [x28]
-	ldr	x1, [x24, 8]
-	ldr	x2, [x24, 24]
-	madd	w20, w20, w22, w19
-	mov	w0, w20
-	bl	ftl_read_ppa_page
-	mov	w21, w0
-	ldr	x1, [x24, 24]
-	mov	w4, w0
-	ldr	x0, [x24, 8]
-	mov	w3, w20
-	ldr	w2, [x1, 12]
-	str	w2, [sp, 32]
-	ldr	w2, [x1, 8]
-	str	w2, [sp, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 16]
-	mov	w2, w19
-	add	w19, w19, 1
-	ldr	w1, [x1]
-	and	w19, w19, 65535
-	str	w1, [sp, 8]
-	ldr	w1, [x0, 12]
-	str	w1, [sp]
-	mov	w1, w22
-	ldp	w5, w6, [x0]
-	ldr	w7, [x0, 8]
+	.global	ftl_info_flush
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR52
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR155
+	ldrb	w2, [x21, #:lo12:.LANCHOR52]
+	mov	x23, x22
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR99
+	stp	x27, x28, [sp, 80]
+	mov	w26, 0
+	stp	x19, x20, [sp, 16]
+	lsl	w2, w2, 1
+	adrp	x20, .LANCHOR154
+	str	w0, [x29, 108]
+	mov	x24, x25
+	add	x27, x22, :lo12:.LANCHOR155
+	add	x28, x25, :lo12:.LANCHOR99
+	add	x0, x20, :lo12:.LANCHOR154
+	bl	ftl_memset
+.L1819:
+	add	x0, x22, :lo12:.LANCHOR155
+	ldr	w1, [x29, 108]
+	ldrb	w6, [x22, #:lo12:.LANCHOR155]
+	ldrh	w19, [x25, #:lo12:.LANCHOR99]
+	ldrh	w4, [x0, 2]
+	adrp	x0, .LANCHOR53
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	w3, [x0, 4]
+	add	w3, w3, 1
+	str	w3, [x0, 4]
+	add	x0, x20, :lo12:.LANCHOR154
+	str	w1, [x20, #:lo12:.LANCHOR154]
+	str	w3, [x0, 4]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1820
+	mov	w2, w4
+	mov	w1, w6
+	stp	w4, w6, [x29, 100]
 	adrp	x0, .LC73
 	add	x0, x0, :lo12:.LC73
 	bl	printf
-	mov	w3, 32
-	mov	w2, 4
-	add	x1, x23, 704
-	adrp	x0, .LC80
-	add	x0, x0, :lo12:.LC80
-	bl	rknand_print_hex
-	cmp	w21, 512
-	ccmn	w21, #1, 4, ne
-	csinc	w25, w25, wzr, ne
-	b	.L1841
-.L1844:
-	mov	w0, 0
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 144
-	ret
-	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
-	.section	.text.dump_ftl_info,"ax",@progbits
-	.align	2
-	.global	dump_ftl_info
-	.type	dump_ftl_info, %function
-dump_ftl_info:
-	stp	x29, x30, [sp, -48]!
-	adrp	x0, .LANCHOR131
-	add	x1, x0, :lo12:.LANCHOR131
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	adrp	x22, .LANCHOR46
-	ldrh	w3, [x1, 2]
-	adrp	x20, .LANCHOR79
-	ldrb	w2, [x1, 1]
-	adrp	x21, .LANCHOR54
-	ldrb	w1, [x0, #:lo12:.LANCHOR131]
-	adrp	x0, .LC81
-	add	x0, x0, :lo12:.LC81
-	bl	printf
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	ldrh	w2, [x0, 140]
-	ldrh	w1, [x0, 130]
-	adrp	x0, .LC82
-	add	x0, x0, :lo12:.LC82
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR60]
-	adrp	x0, .LC83
-	add	x0, x0, :lo12:.LC83
-	ldrh	w5, [x1, 26]
-	ldrh	w4, [x1, 22]
-	ldrb	w3, [x1, 21]
-	ldrh	w2, [x1, 18]
-	ldrh	w1, [x1, 16]
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR60]
-	adrp	x0, .LC84
-	add	x0, x0, :lo12:.LC84
-	ldrh	w5, [x1, 58]
-	ldrh	w4, [x1, 54]
-	ldrb	w3, [x1, 53]
-	ldrh	w2, [x1, 50]
-	ldrh	w1, [x1, 48]
-	bl	printf
-	ldr	x1, [x19, #:lo12:.LANCHOR60]
-	adrp	x19, .LANCHOR69
-	adrp	x0, .LC85
-	add	x0, x0, :lo12:.LC85
-	ldrh	w5, [x1, 90]
-	ldrh	w4, [x1, 86]
-	ldrb	w3, [x1, 85]
-	ldrh	w2, [x1, 82]
-	ldrh	w1, [x1, 80]
+	ldp	w4, w6, [x29, 100]
+.L1820:
+	adrp	x1, .LANCHOR80
+	ldrh	w0, [x27, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	cmp	w1, w0
+	bhi	.L1821
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x27, 1]
+	ldrb	w2, [x27]
+	mov	w4, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR12]
+.L1828:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, 7
+	bls	.L1822
+	mov	x1, 0
+.L1827:
+	add	x3, x6, x1
+	and	w7, w1, 65535
+	ldrb	w8, [x3, 40]
+	add	w3, w8, 127
+	and	w3, w3, 255
+	cmp	w3, 125
+	bhi	.L1823
+	add	x1, x23, :lo12:.LANCHOR155
+	strb	w0, [x1, 1]
+	cbz	w4, .L1824
+	strb	w2, [x23, #:lo12:.LANCHOR155]
+.L1824:
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 668
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 4
-	ldrh	w3, [x20, #:lo12:.LANCHOR79]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR82
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LC86
-	lsl	w3, w3, 1
-	add	x0, x0, :lo12:.LC86
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR56
-	ldrh	w3, [x21, #:lo12:.LANCHOR54]
-	mov	w2, 2
-	ldr	x1, [x0, #:lo12:.LANCHOR56]
-	adrp	x0, .LC87
-	add	x0, x0, :lo12:.LC87
-	bl	rknand_print_hex
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	mov	w3, 32
-	mov	w2, 4
-	adrp	x0, .LC80
-	add	x1, x1, 704
-	add	x0, x0, :lo12:.LC80
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR59
-	ldrh	w3, [x21, #:lo12:.LANCHOR54]
-	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR59]
-	adrp	x0, .LC88
-	add	x0, x0, :lo12:.LC88
-	bl	rknand_print_hex
-	mov	w3, 256
-	mov	w2, 2
-	adrp	x1, .LANCHOR81
-	adrp	x0, .LC89
-	add	x1, x1, :lo12:.LANCHOR81
-	add	x0, x0, :lo12:.LC89
-	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 2
-	ldrh	w3, [x20, #:lo12:.LANCHOR79]
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR83
-	ldp	x29, x30, [sp], 48
-	lsl	w3, w3, 1
-	ldr	x1, [x0, #:lo12:.LANCHOR83]
-	adrp	x0, .LC90
-	add	x0, x0, :lo12:.LC90
-	b	rknand_print_hex
-	.size	dump_ftl_info, .-dump_ftl_info
-	.section	.text.pm_ppa_update_check,"ax",@progbits
-	.align	2
-	.global	pm_ppa_update_check
-	.type	pm_ppa_update_check, %function
-pm_ppa_update_check:
-	adrp	x3, .LANCHOR71
-	mov	w4, 21
-	ldrh	w3, [x3, #:lo12:.LANCHOR71]
-	sub	w5, w4, w3
+.L1825:
+	b	.L1825
+.L1823:
+	cmp	w8, 255
+	bne	.L1826
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1827
+	mov	w7, w1
+.L1826:
+	and	w0, w7, 255
+	mov	w26, 1
+.L1822:
+	add	w1, w0, 8
 	mov	w4, 1
-	lsr	w3, w2, w3
-	lsl	w4, w4, w5
-	sub	w4, w4, #1
-	and	w4, w4, w3
-	adrp	x3, .LANCHOR70
-	ldrb	w3, [x3, #:lo12:.LANCHOR70]
-	udiv	w4, w4, w3
-	adrp	x3, .LANCHOR59
-	ldr	x3, [x3, #:lo12:.LANCHOR59]
-	add	x4, x3, x4, uxth 2
-	ldrb	w3, [x4, 2]
-	ubfx	x3, x3, 5, 3
-	cmp	w3, 1
-	ccmp	w3, 7, 4, ne
-	bne	.L1853
-	stp	x29, x30, [sp, -16]!
-	mov	w3, w2
-	mov	w2, w1
-	mov	x1, x0
-	add	x29, sp, 0
-	adrp	x0, .LC91
-	add	x0, x0, :lo12:.LC91
-	bl	printf
-	bl	dump_ftl_info
-	mov	w0, -1
-	ldp	x29, x30, [sp], 16
-	ret
-.L1853:
+	add	x1, x6, x1, sxtw
+	ldrb	w2, [x1, 32]
+	cmp	w2, 255
+	beq	.L1828
+	ldrh	w19, [x28]
+	strb	w0, [x27, 1]
 	mov	w0, 0
-	ret
-	.size	pm_ppa_update_check, .-pm_ppa_update_check
-	.section	.text.load_l2p_region,"ax",@progbits
-	.align	2
-	.global	load_l2p_region
-	.type	load_l2p_region, %function
-load_l2p_region:
-	stp	x29, x30, [sp, -64]!
-	and	w1, w1, 65535
-	cmp	w1, 31
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	str	x23, [sp, 48]
-	bls	.L1859
-	adrp	x1, .LANCHOR148
+	strb	w2, [x27]
+	mul	w19, w19, w2
+	mov	w1, w19
+	bl	flash_erase_block
+	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR154
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	mov	w0, 1
+	add	w19, w19, w0
+	strh	w0, [x27, 2]
+.L1829:
+	ldrb	w4, [x21, #:lo12:.LANCHOR52]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR154
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	beq	.L1819
+	cbnz	w26, .L1830
+.L1838:
+	ldrb	w0, [x23, #:lo12:.LANCHOR155]
+	cmp	w0, 255
+	bne	.L1854
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
-	mov	w2, 30
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 703
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1860:
-	b	.L1860
-.L1859:
-	adrp	x23, .LANCHOR46
-	and	w19, w0, 65535
-	ldr	x0, [x23, #:lo12:.LANCHOR46]
-	ldrh	w2, [x0, 698]
-	cmp	w2, w19
-	bcs	.L1861
+.L1839:
+	b	.L1839
+.L1821:
+	madd	w19, w19, w6, w4
+	cbnz	w0, .L1829
 	mov	w1, w19
-	adrp	x0, .LC92
-	add	x0, x0, :lo12:.LC92
-	bl	printf
-	adrp	x0, .LANCHOR149
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR149]
-	mov	x0, 0
-	ldr	x0, [x0, 8]
-	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR46]
-	ldrh	w0, [x0, 698]
-	cmp	w0, w19
-	bcs	.L1865
-	adrp	x1, .LANCHOR148
+	bl	flash_erase_block
+	b	.L1829
+.L1830:
+	ldrb	w19, [x27, 1]
+	add	x24, x24, :lo12:.LANCHOR99
+	adrp	x20, .LANCHOR12
+	add	w19, w19, 1
+.L1833:
+	cmp	w19, 7
+	bhi	.L1838
+	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	add	w0, w19, 8
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1834
+	adrp	x1, .LANCHOR156
 	adrp	x0, .LC0
-	mov	w2, 34
-	add	x1, x1, :lo12:.LANCHOR148
+	mov	w2, 696
+	add	x1, x1, :lo12:.LANCHOR156
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1863:
-	b	.L1863
-.L1861:
-	add	x0, x0, x19, sxtw 2
-	sbfiz	x1, x1, 4, 32
-	ldr	w21, [x0, 704]
-	adrp	x0, .LANCHOR93
-	add	x0, x0, :lo12:.LANCHOR93
-	add	x22, x0, x1
-	strh	w19, [x0, x1]
-	strh	wzr, [x22, 2]
-	cbnz	w21, .L1864
-	adrp	x0, .LANCHOR149
-	mov	w1, 255
-	ldrh	w2, [x0, #:lo12:.LANCHOR149]
-	ldr	x0, [x22, 8]
-	bl	ftl_memset
-.L1865:
+.L1835:
+	b	.L1835
+.L1834:
+	cmp	w0, 255
+	beq	.L1836
+	ldrh	w1, [x24]
+	mul	w1, w1, w0
 	mov	w0, 0
-	ldr	x23, [sp, 48]
+	bl	flash_erase_block
+.L1836:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1833
+.L1854:
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 64
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
 	ret
-.L1864:
-	adrp	x20, .LANCHOR141
-	adrp	x0, .LANCHOR45
-	ldr	x1, [x22, 8]
-	ldrb	w3, [x0, #:lo12:.LANCHOR45]
-	mov	w0, w21
-	ldr	x2, [x20, #:lo12:.LANCHOR141]
-	bl	ftl_read_ppa_page
-	ldr	x1, [x20, #:lo12:.LANCHOR141]
-	ldr	w2, [x1]
-	cmp	w2, w19
-	beq	.L1866
-	mov	w4, w21
-	mov	w3, w0
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",@progbits
+	.align	2
+	.global	ftl_info_blk_init
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR157
+	adrp	x1, .LANCHOR3
+	mov	w2, 16384
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, ftl_info_data_buffer
+	strb	wzr, [x0, #:lo12:.LANCHOR157]
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR3]
+	adrp	x1, .LANCHOR2
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR53
+	ldrh	w1, [x1, #:lo12:.LANCHOR2]
+	adrp	x21, .LANCHOR155
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR99
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR12
+	add	x1, x0, x1, lsl 2
+	stp	x27, x28, [sp, 80]
+	str	x1, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 0
+	bl	ftl_memset
+	adrp	x25, .LANCHOR52
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	mov	w27, 21574
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	add	x0, x21, :lo12:.LANCHOR155
+	add	x26, x26, :lo12:.LANCHOR99
+	add	x25, x25, :lo12:.LANCHOR52
+	mov	x19, 7
+	movk	w27, 0x494c, lsl 16
+	strb	wzr, [x0, 1]
+	ldrb	w1, [x1, 40]
+	strb	w1, [x21, #:lo12:.LANCHOR155]
+	strh	wzr, [x0, 2]
+.L1858:
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	add	w0, w19, 8
+	sxth	w24, w19
+	mov	w28, w19
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	cmp	w0, 255
+	bne	.L1857
+.L1862:
+	sub	x19, x19, #1
+	cmn	x19, #1
+	bne	.L1858
+	mov	w24, 0
+.L1859:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1863
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w2, 4800
 	mov	w1, w19
-	adrp	x0, .LC93
-	add	x0, x0, :lo12:.LC93
+	ldr	w3, [x0]
+	adrp	x0, .LC75
+	add	x0, x0, :lo12:.LC75
 	bl	printf
-	ldr	x1, [x23, #:lo12:.LANCHOR46]
-	mov	w2, 4
-	adrp	x0, .LC94
-	add	x0, x0, :lo12:.LC94
-	add	x1, x1, 704
-	ldrh	w3, [x1, -6]
-	bl	rknand_print_hex
-	ldr	x1, [x22, 8]
-	mov	w3, 16
-	mov	w2, 4
-	adrp	x0, .LC95
-	add	x0, x0, :lo12:.LC95
-	bl	rknand_print_hex
-	ldr	x1, [x20, #:lo12:.LANCHOR141]
-	mov	w2, 4
-	mov	w3, 16
-	adrp	x0, .LC96
-	add	x0, x0, :lo12:.LC96
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR71
-	ldrh	w2, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsr	w21, w21, w2
-	lsl	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	sub	w0, w0, #1
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	and	w0, w0, w21
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
+.L1863:
+	cmn	w19, #1
+	bne	.L1864
+	mov	w1, 0
+	mov	w2, 16384
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w1, 21574
+	movk	w1, 0x494c, lsl 16
+	str	w1, [x0]
+	mov	w0, w19
+.L1856:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1857:
+	ldrh	w6, [x26]
+	add	x8, x20, :lo12:ftl_info_data_buffer
+	ldrb	w4, [x25]
+	adrp	x7, .LANCHOR154
+	add	x7, x7, :lo12:.LANCHOR154
+	mov	x2, x8
+	mov	x3, x7
+	stp	x7, x8, [x29, 104]
+	mul	w6, w6, w0
+	mov	w0, 0
+	str	w6, [x29, 124]
+	mov	w1, w6
+	bl	ftl_read_page
+	mov	w5, w0
+	cmn	w0, #1
+	ldr	w6, [x29, 124]
+	ldp	x7, x8, [x29, 104]
+	bne	.L1860
+	ldrb	w4, [x25]
+	mov	x3, x7
+	mov	x2, x8
+	add	w1, w6, 1
+	mov	w0, 0
+	bl	ftl_read_page
+	mov	w5, w0
+.L1860:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1861
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w2, w5
+	str	w5, [x29, 124]
+	mov	w3, 576
+	mov	w1, w28
+	ldr	w4, [x0]
+	adrp	x0, .LC74
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+	ldr	w5, [x29, 124]
+.L1861:
+	cmn	w5, #1
+	beq	.L1862
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1862
+	mov	w19, w24
+	b	.L1859
+.L1864:
+	ldr	x1, [x23, #:lo12:.LANCHOR12]
+	add	w0, w24, 8
+	add	x20, x20, :lo12:ftl_info_data_buffer
+	mov	w4, 4
+	mov	x2, x20
+	adrp	x26, .LANCHOR52
+	add	x0, x1, x0, sxtw
+	mov	w27, 21574
+	add	x26, x26, :lo12:.LANCHOR52
+	movk	w27, 0x494c, lsl 16
+	ldrb	w1, [x0, 32]
+	add	x0, x21, :lo12:.LANCHOR155
+	strb	w1, [x21, #:lo12:.LANCHOR155]
+	strb	w24, [x0, 1]
+	adrp	x24, .LANCHOR154
+	add	x24, x24, :lo12:.LANCHOR154
+	mov	w0, 0
+	mov	x3, x24
+	bl	flash_get_last_written_page
+	sxth	w23, w0
+	add	w0, w0, 1
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR99
+	ldrb	w25, [x21, #:lo12:.LANCHOR155]
+	ldrh	w0, [x0, #:lo12:.LANCHOR99]
+	madd	w25, w25, w0, w23
 .L1866:
-	ldr	x0, [x20, #:lo12:.LANCHOR141]
+	tbnz	w23, #31, .L1871
+	ldrb	w4, [x26]
+	mov	x3, x24
+	mov	x2, x20
+	mov	w1, w25
+	mov	w0, 0
+	bl	ftl_read_page
+	cmn	w0, #1
+	beq	.L1867
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
 	ldr	w0, [x0]
-	cmp	w19, w0
-	beq	.L1865
-	adrp	x1, .LANCHOR148
-	adrp	x0, .LC0
-	mov	w2, 55
-	add	x1, x1, :lo12:.LANCHOR148
-	add	x0, x0, :lo12:.LC0
-	bl	printf
+	cmp	w0, w27
+	bne	.L1867
+.L1871:
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	add	x21, x21, :lo12:.LANCHOR155
+	strh	w19, [x21, 2]
+	ldr	w1, [x0, 16]
+	cmp	w1, 2048
+	bhi	.L1868
+.L1869:
+	ldr	w1, [x0, 24]
+	cmp	w1, 2048
+	bls	.L1872
+	ldr	w2, [x0, 28]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 24]
+.L1872:
+	ldr	w1, [x0, 32]
+	cmp	w1, 1024
+	bls	.L1873
+	ldr	w2, [x0, 36]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 32]
+.L1873:
+	ldr	w1, [x0, 40]
+	cmp	w1, 1024
+	bls	.L1874
+	ldr	w2, [x0, 44]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 40]
+.L1874:
+	ldr	w1, [x0, 64]
+	add	w1, w1, 1
+	str	w1, [x0, 64]
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	b	.L1856
 .L1867:
-	b	.L1867
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.pm_gc,"ax",@progbits
+	sub	w23, w23, #1
+	sub	w25, w25, #1
+	sxth	w23, w23
+	b	.L1866
+.L1868:
+	ldr	w2, [x0, 20]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 16]
+	b	.L1869
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",@progbits
 	.align	2
-	.global	pm_gc
-	.type	pm_gc, %function
-pm_gc:
-	stp	x29, x30, [sp, -80]!
+	.global	ftl_ext_info_flush
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR5
 	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR46
-	adrp	x20, .LANCHOR101
 	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
 	stp	x23, x24, [sp, 48]
-	ldrh	w1, [x0, 688]
-	ldrh	w0, [x20, #:lo12:.LANCHOR101]
-	str	x25, [sp, 64]
-	sub	w0, w0, #1
+	ldr	w1, [x0, 520]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cbz	w1, .L1890
+	str	wzr, [x0, 520]
+.L1890:
+	adrp	x24, .LANCHOR53
+	adrp	x20, .LANCHOR80
+	adrp	x21, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR80
+	mov	x22, x24
+	add	x21, x21, :lo12:.LANCHOR96
+	mov	w0, 0
+	bl	ftl_total_vpn_update
+.L1899:
+	ldr	x0, [x24, #:lo12:.LANCHOR53]
+	ldr	w1, [x0, 56]
+	add	w1, w1, 1
+	str	w1, [x0, 56]
+	ldrh	w1, [x0, 140]
+	ldrh	w0, [x20]
 	cmp	w1, w0
-	blt	.L1871
-	bl	pm_free_sblk
-	ldr	x2, [x19, #:lo12:.LANCHOR46]
-	ldrh	w1, [x20, #:lo12:.LANCHOR101]
-	sub	w1, w1, #1
-	ldrh	w3, [x2, 688]
-	cmp	w3, w1
-	blt	.L1871
-	add	x0, x2, x0, uxth 1
-	mov	w23, 65535
-	ldrh	w20, [x0, 416]
-	cmp	w20, w23
-	bne	.L1873
-	adrp	x1, .LANCHOR150
+	bcc	.L1891
+	bl	ftl_ext_alloc_new_blk
+.L1891:
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	mov	w0, 65535
+	ldrh	w1, [x2, 130]
+	cmp	w1, w0
+	bne	.L1892
+	adrp	x1, .LANCHOR158
 	adrp	x0, .LC0
-	mov	w2, 127
-	add	x1, x1, :lo12:.LANCHOR150
+	mov	w2, 1603
+	add	x1, x1, :lo12:.LANCHOR158
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1874:
-	b	.L1874
-.L1873:
-	bl	pm_select_ram_region
-	and	x24, x0, 65535
-	adrp	x1, .LANCHOR93
-	lsl	x0, x24, 4
-	add	x2, x1, :lo12:.LANCHOR93
-	mov	x22, x19
-	add	x19, x2, x0
-	mov	x21, x24
-	ldrh	w0, [x2, x0]
-	cmp	w0, w23
-	mov	x23, x1
-	beq	.L1875
-	ldr	x1, [x19, 8]
-	cbz	x1, .L1875
-	ldrsh	w2, [x19, 2]
-	tbz	w2, #31, .L1875
-	bl	pm_write_page
-	ldrh	w0, [x19, 2]
-	and	w0, w0, 32767
-	strh	w0, [x19, 2]
-.L1875:
-	add	x1, x23, :lo12:.LANCHOR93
-	adrp	x25, .LANCHOR71
-	add	x24, x1, x24, lsl 4
-	add	x25, x25, :lo12:.LANCHOR71
-	mov	w19, 0
-.L1876:
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldrh	w0, [x1, 698]
-	cmp	w0, w19
-	bhi	.L1878
-	bl	pm_free_sblk
-.L1871:
+.L1893:
+	b	.L1893
+.L1892:
+	ldrh	w0, [x21]
+	mov	w19, 21
+	adrp	x25, .LANCHOR52
+	adrp	x26, .LANCHOR154
+	sub	w0, w19, w0
+	mov	w19, 1
+	add	x23, x26, :lo12:.LANCHOR154
+	asr	w27, w1, w0
+	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR99
+	sub	w19, w19, #1
+	and	w19, w19, w1
+	ldrh	w1, [x0, #:lo12:.LANCHOR99]
+	ldrh	w0, [x2, 140]
+	ldrb	w2, [x25, #:lo12:.LANCHOR52]
+	madd	w19, w19, w1, w0
+	lsl	w2, w2, 1
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	and	w19, w19, 65535
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	mov	w1, w19
+	ldrb	w4, [x25, #:lo12:.LANCHOR52]
+	mov	x3, x23
+	str	wzr, [x26, #:lo12:.LANCHOR154]
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	ldr	w0, [x0, 56]
+	str	w0, [x23, 4]
+	mov	w0, w27
+	bl	ftl_prog_page
+	ldr	x2, [x22, #:lo12:.LANCHOR53]
+	ldrh	w1, [x2, 140]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 140]
+	cmp	w1, 1
+	beq	.L1899
+	cmn	w0, #1
+	beq	.L1899
 	mov	w0, 0
-	ldr	x25, [sp, 64]
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1878:
-	add	x1, x1, x19, sxtw 2
-	ldrh	w3, [x25]
-	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	ldr	w1, [x1, 704]
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	lsr	w1, w1, w3
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	cmp	w20, w0, uxth
-	bne	.L1877
-	mov	w1, w21
-	mov	w0, w19
-	bl	load_l2p_region
-	ldr	x1, [x24, 8]
-	mov	w0, w19
-	bl	pm_write_page
-.L1877:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L1876
-	.size	pm_gc, .-pm_gc
-	.section	.text.pm_flush_id,"ax",@progbits
-	.align	2
-	.global	pm_flush_id
-	.type	pm_flush_id, %function
-pm_flush_id:
-	stp	x29, x30, [sp, -32]!
-	ubfiz	x0, x0, 4, 16
-	adrp	x2, .LANCHOR93
-	add	x2, x2, :lo12:.LANCHOR93
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	add	x19, x2, x0
-	ldrh	w0, [x2, x0]
-	ldr	x1, [x19, 8]
-	bl	pm_write_page
-	ldrh	w0, [x19, 2]
-	and	w0, w0, 32767
-	strh	w0, [x19, 2]
-	adrp	x19, .LANCHOR91
-	ldr	w0, [x19, #:lo12:.LANCHOR91]
-	cbz	w0, .L1884
-	bl	pm_gc
-	str	wzr, [x19, #:lo12:.LANCHOR91]
-.L1884:
-	mov	w0, 0
-	ldr	x19, [sp, 16]
-	ldp	x29, x30, [sp], 32
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-	.size	pm_flush_id, .-pm_flush_id
-	.section	.text.pm_flush,"ax",@progbits
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",@progbits
 	.align	2
-	.global	pm_flush
-	.type	pm_flush, %function
-pm_flush:
-	stp	x29, x30, [sp, -32]!
+	.global	ftl_ext_info_init
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR109
+	mov	w4, 4
 	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR53
+	strh	wzr, [x0, #:lo12:.LANCHOR109]
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR93
-	add	x19, x19, :lo12:.LANCHOR93
-	mov	w20, 0
-	add	x19, x19, 2
-.L1891:
-	ldrsh	w0, [x19]
-	tbz	w0, #31, .L1890
-	mov	w0, w20
-	bl	pm_flush_id
-.L1890:
+	stp	x25, x26, [sp, 64]
+	adrp	x25, ftl_ext_info_data_buffer
+	stp	x23, x24, [sp, 48]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	ldrh	w19, [x0, 130]
+	adrp	x0, .LANCHOR96
+	stp	x27, x28, [sp, 80]
+	adrp	x24, .LANCHOR154
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	and	w26, w19, 16383
+	add	x3, x24, :lo12:.LANCHOR154
+	sub	w0, w0, w1
+	mov	w1, w26
+	asr	w19, w19, w0
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	flash_get_last_written_page
+	sxth	w21, w0
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1905
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC33
+	mov	w3, w21
+	mov	w2, 1646
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L1905:
+	adrp	x27, .LANCHOR52
+	adrp	x28, .LANCHOR99
+	mov	w5, 20038
+	add	x27, x27, :lo12:.LANCHOR52
+	add	x28, x28, :lo12:.LANCHOR99
+	mov	w23, 0
+	movk	w5, 0x4549, lsl 16
+.L1906:
+	and	w20, w21, 65535
+	sub	w0, w20, w23
+	tbnz	x0, 15, .L1911
+	ldrh	w0, [x28]
+	sub	w1, w21, w23
+	ldrb	w4, [x27]
+	add	x3, x24, :lo12:.LANCHOR154
+	str	w5, [x29, 108]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	madd	w1, w0, w26, w1
+	mov	w0, w19
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	ldr	w5, [x29, 108]
+	beq	.L1907
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x0]
+	cmp	w0, w5
+	bne	.L1907
+.L1911:
+	bl	zftl_sblk_list_init
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldrh	w1, [x0, 140]
+	cmp	w1, w21
+	bgt	.L1909
 	add	w20, w20, 1
-	add	x19, x19, 16
-	and	w20, w20, 65535
-	cmp	w20, 32
-	bne	.L1891
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x29, x30, [sp], 32
-	ret
-	.size	pm_flush, .-pm_flush
-	.section	.text.flt_sys_flush,"ax",@progbits
-	.align	2
-	.global	flt_sys_flush
-	.type	flt_sys_flush, %function
-flt_sys_flush:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	ftl_flush
-	bl	pm_flush
+	strh	w20, [x0, 140]
 	bl	ftl_ext_info_flush
-	ldp	x29, x30, [sp], 16
+.L1909:
+	adrp	x0, .LANCHOR5
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	wzr, [x0, 520]
+	str	wzr, [x0, 604]
+	str	wzr, [x0, 608]
+	adrp	x0, .LANCHOR110
+	strh	w1, [x0, #:lo12:.LANCHOR110]
 	mov	w0, 0
-	b	ftl_info_flush
-	.size	flt_sys_flush, .-flt_sys_flush
-	.section	.text.rk_ftl_de_init,"ax",@progbits
-	.align	2
-	.global	rk_ftl_de_init
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	stp	x29, x30, [sp, -16]!
-	add	x29, sp, 0
-	bl	FlashDeInit
-	bl	flt_sys_flush
-	ldp	x29, x30, [sp], 16
-	b	FlashDeInit
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.pm_init,"ax",@progbits
+	ldp	x29, x30, [sp], 112
+	ret
+.L1907:
+	add	w23, w23, 1
+	b	.L1906
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format,"ax",@progbits
 	.align	2
-	.global	pm_init
-	.type	pm_init, %function
-pm_init:
-	stp	x29, x30, [sp, -112]!
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	w24, w0
-	adrp	x0, .LANCHOR91
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR99
 	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR93
+	add	x20, x20, :lo12:.LANCHOR99
 	stp	x25, x26, [sp, 64]
-	add	x19, x20, :lo12:.LANCHOR93
-	str	wzr, [x0, #:lo12:.LANCHOR91]
-	mov	w0, 64
-	stp	x27, x28, [sp, 80]
-	bl	ftl_malloc
-	adrp	x1, .LANCHOR141
-	adrp	x22, .LANCHOR45
-	add	x23, x19, 512
-	mov	x21, x1
-	add	x22, x22, :lo12:.LANCHOR45
-	str	x0, [x1, #:lo12:.LANCHOR141]
-	mov	w25, -1
-.L1900:
-	strh	w25, [x19]
-	strh	wzr, [x19, 2]
-	cbz	w24, .L1899
-	ldrb	w0, [x22]
-	lsl	w0, w0, 9
-	bl	ftl_malloc
-	str	x0, [x19, 8]
-.L1899:
-	add	x19, x19, 16
-	cmp	x19, x23
-	bne	.L1900
-	add	x0, x20, :lo12:.LANCHOR93
-	adrp	x19, .LANCHOR46
-	ldr	x24, [x21, #:lo12:.LANCHOR141]
-	mov	w4, 4
-	ldr	x25, [x0, 8]
-	mov	x3, x24
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	x2, x25
-	ldrh	w1, [x0, 692]
-	ldrb	w0, [x0, 694]
-	bl	flash_get_last_written_page
-	sxth	w26, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	w23, w26
-	ldrh	w2, [x0, 696]
-	cmp	w2, w26
-	bgt	.L1901
-	ldrh	w1, [x0, 692]
-	mov	w3, w26
-	adrp	x0, .LC97
-	add	x0, x0, :lo12:.LC97
-	adrp	x27, .LANCHOR75
-	adrp	x28, .LANCHOR45
-	add	x27, x27, :lo12:.LANCHOR75
-	add	x28, x28, :lo12:.LANCHOR45
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	ldrsh	w21, [x0, 696]
-.L1902:
-	cmp	w21, w26
-	ble	.L1904
-	adrp	x0, .LANCHOR133
-	mov	w1, 1
-	add	x20, x20, :lo12:.LANCHOR93
-	add	w23, w23, 1
-	strb	w1, [x0, #:lo12:.LANCHOR133]
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	strh	w23, [x0, 696]
-	bl	pm_free_sblk
-	ldr	x1, [x20, 8]
-	mov	w0, -1
-	bl	pm_write_page
-	ldr	x1, [x20, 8]
-	mov	w0, -1
-	bl	pm_write_page
-.L1901:
-	bl	pm_free_sblk
-	bl	pm_gc
-	mov	w0, 0
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
-	ret
-.L1904:
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	mov	x3, x24
-	ldrh	w1, [x27]
-	mov	x2, x25
-	ldrb	w4, [x28]
-	ldrh	w22, [x0, 692]
-	ldrb	w0, [x0, 694]
-	madd	w22, w22, w1, w21
-	mov	w1, w22
-	bl	flash_read_page_en
-	mov	w4, w0
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
-	str	w4, [x29, 108]
-	mov	w2, w22
-	ldr	w1, [x0, 48]
-	ldrh	w3, [x0, 694]
-	add	w1, w1, 1
-	str	w1, [x0, 48]
-	adrp	x0, .LC98
-	add	x0, x0, :lo12:.LC98
-	ldr	w1, [x24]
-	bl	printf
-	ldr	w4, [x29, 108]
-	cmp	w4, 512
-	ccmn	w4, #1, 4, ne
-	beq	.L1903
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
-	ldr	w0, [x24]
-	ldrh	w2, [x1, 698]
-	cmp	w0, w2
-	bcs	.L1903
-	add	x0, x1, x0, uxtw 2
-	str	w22, [x0, 704]
-.L1903:
-	add	w21, w21, 1
-	sxth	w21, w21
-	b	.L1902
-	.size	pm_init, .-pm_init
-	.section	.text.pm_log2phys,"ax",@progbits
-	.align	2
-	.global	pm_log2phys
-	.type	pm_log2phys, %function
-pm_log2phys:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
-	mov	x22, x1
-	adrp	x1, .LANCHOR45
-	stp	x19, x20, [sp, 16]
-	stp	x25, x26, [sp, 64]
-	ldrb	w1, [x1, #:lo12:.LANCHOR45]
+	adrp	x21, .LANCHOR12
+	mov	x25, x21
 	stp	x23, x24, [sp, 48]
-	mov	w23, w2
-	lsl	w21, w1, 7
-	ubfiz	w20, w1, 7, 9
-	adrp	x1, .LANCHOR47
-	udiv	w21, w0, w21
-	ldr	w2, [x1, #:lo12:.LANCHOR47]
-	cmp	w0, w2
-	and	w25, w21, 65535
-	msub	w20, w25, w20, w0
-	bcc	.L1914
-	mov	w1, w0
-	adrp	x0, .LC99
-	add	x0, x0, :lo12:.LC99
+	mov	w19, 8
+.L1923:
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	add	x0, x0, x19, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1920
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 1817
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-	mov	w0, -1
-.L1913:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1914:
-	adrp	x24, .LANCHOR93
-	add	x0, x24, :lo12:.LANCHOR93
-	and	x20, x20, 65535
-	add	x0, x0, 8
-	mov	x19, 0
+.L1921:
+	b	.L1921
 .L1920:
-	ldr	x1, [x0]
-	cbz	x1, .L1916
-	ldrh	w1, [x0, -8]
-	cmp	w1, w25
-	bne	.L1916
-.L1917:
-	cbnz	w23, .L1918
-	add	x0, x24, :lo12:.LANCHOR93
-	add	x0, x0, x19, lsl 4
-	ldr	x0, [x0, 8]
-	ldr	w0, [x0, x20, lsl 2]
-	str	w0, [x22]
-.L1919:
-	add	x24, x24, :lo12:.LANCHOR93
-	add	x19, x24, x19, lsl 4
-	ldrh	w0, [x19, 2]
-	mvn	x1, x0
-	tst	x1, 32767
+	cmp	w0, 255
 	beq	.L1922
-	add	w0, w0, 1
-	strh	w0, [x19, 2]
-.L1922:
+	ldrh	w1, [x20]
+	mul	w1, w1, w0
 	mov	w0, 0
-	b	.L1913
-.L1918:
-	add	x0, x24, :lo12:.LANCHOR93
-	ldr	w2, [x22]
-	add	x0, x0, x19, lsl 4
-	ldr	x1, [x0, 8]
-	str	w2, [x1, x20, lsl 2]
-	ldrh	w1, [x0, 2]
-	orr	w1, w1, -32768
-	strh	w1, [x0, 2]
-	adrp	x0, .LANCHOR94
-	strb	w21, [x0, #:lo12:.LANCHOR94]
-	b	.L1919
-.L1916:
+	bl	flash_erase_block
+.L1922:
 	add	w19, w19, 1
-	add	x0, x0, 16
-	and	x19, x19, 65535
-	cmp	w19, 32
-	bne	.L1920
-	bl	pm_select_ram_region
-	and	x19, x0, 65535
-	sbfiz	x1, x19, 4, 32
-	add	x2, x24, :lo12:.LANCHOR93
-	add	x3, x2, x1
-	mov	w26, w0
-	ldrh	w2, [x2, x1]
-	mov	w1, 65535
-	cmp	w2, w1
-	beq	.L1921
-	ldrsh	w1, [x3, 2]
-	tbz	w1, #31, .L1921
-	bl	pm_flush_id
-.L1921:
-	adrp	x0, .LANCHOR151
-	mov	w1, w26
-	strb	w19, [x0, #:lo12:.LANCHOR151]
-	mov	w0, w25
-	bl	load_l2p_region
-	b	.L1917
-	.size	pm_log2phys, .-pm_log2phys
-	.section	.text.ftl_read_ahead,"ax",@progbits
-	.align	2
-	.global	ftl_read_ahead
-	.type	ftl_read_ahead, %function
-ftl_read_ahead:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR49
-	stp	x21, x22, [sp, 32]
-	ldr	w0, [x20, #:lo12:.LANCHOR49]
-	stp	x23, x24, [sp, 48]
-	cmn	w0, #1
-	beq	.L1929
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x19, x0
-	mov	w0, -1
-	cbz	x19, .L1928
-	ldr	w21, [x20, #:lo12:.LANCHOR49]
-	str	w21, [x19, 36]
-	str	w0, [x20, #:lo12:.LANCHOR49]
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 76]
-	ldr	x20, [x19, 8]
-	cmn	w0, #1
-	ldr	x22, [x19, 24]
-	bne	.L1931
-	mov	w2, 0
-	add	x1, x29, 76
-	mov	w0, w21
-	bl	pm_log2phys
-.L1931:
-	ldr	w0, [x29, 76]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L1932
-	adrp	x0, .LANCHOR45
+	cmp	w19, 16
+	bne	.L1923
+	bl	sblk_init
+	adrp	x19, .LANCHOR53
+	bl	ftl_info_blk_init
+	adrp	x22, .LANCHOR3
 	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR45]
-	mov	x0, x20
-	lsl	w2, w2, 9
+	mov	w2, 16384
+	adrp	x0, ftl_info_data_buffer
+	add	x0, x0, :lo12:ftl_info_data_buffer
 	bl	ftl_memset
-	ldrb	w0, [x19, 2]
-	orr	w0, w0, 8
-	strb	w0, [x19, 2]
-.L1929:
-	mov	w0, 0
-.L1928:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x29, x30, [sp], 80
-	ret
-.L1932:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w23, [x19, 52]
-	cmp	w23, 256
-	bne	.L1933
-	adrp	x0, .LANCHOR71
-	mov	w20, 21
-	mov	w24, 1
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	ldr	w0, [x29, 76]
-	sub	w20, w20, w1
-	ldp	w2, w3, [x19, 36]
-	lsr	w0, w0, w1
-	lsl	w20, w24, w20
-	sub	w20, w20, #1
-	and	w20, w20, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w20, w20, w0
-	adrp	x0, .LC100
-	add	x0, x0, :lo12:.LC100
-	and	w1, w20, 65535
-	bl	printf
-	mov	w2, 0
-	mov	w1, w24
-	mov	w0, w20
-	bl	gc_add_sblk
-.L1933:
-	ldr	w5, [x22, 4]
-	cmp	w21, w5
-	beq	.L1934
-	ldrb	w1, [x19, 1]
-	adrp	x0, .LC101
-	ldr	w4, [x22]
-	mov	w2, w21
-	ldp	w6, w7, [x22, 8]
-	add	x0, x0, :lo12:.LC101
-	ldr	w3, [x29, 76]
-	bl	printf
-.L1934:
-	ldr	w0, [x22, 4]
-	cmp	w21, w0
-	bne	.L1935
-	cmn	w23, #1
-	bne	.L1929
-.L1935:
-	adrp	x1, .LANCHOR152
-	adrp	x0, .LC0
-	mov	w2, 758
-	add	x1, x1, :lo12:.LANCHOR152
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L1936:
-	b	.L1936
-	.size	ftl_read_ahead, .-ftl_read_ahead
-	.section	.text.gc_update_l2p_map,"ax",@progbits
-	.align	2
-	.global	gc_update_l2p_map
-	.type	gc_update_l2p_map, %function
-gc_update_l2p_map:
-	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR60
-	add	x29, sp, 0
-	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR2
+	ldr	x3, [x19, #:lo12:.LANCHOR53]
+	mov	w5, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR3]
+	ldrh	w4, [x20, #:lo12:.LANCHOR2]
+	ldrh	w0, [x3, 134]
+	add	x1, x1, x0, uxth 2
+.L1924:
+	cmp	w0, w4
+	bcc	.L1925
+	mov	w0, 21574
+	adrp	x24, .LANCHOR60
+	add	x24, x24, :lo12:.LANCHOR60
+	movk	w0, 0x494c, lsl 16
+	strh	wzr, [x3, 148]
 	mov	w21, 0
-	stp	x23, x24, [sp, 48]
-	mov	w24, 0
-	stp	x25, x26, [sp, 64]
-	adrp	x26, .LANCHOR64
-	stp	x27, x28, [sp, 80]
-	mov	w27, 0
-	ldr	x22, [x0, #:lo12:.LANCHOR60]
-	add	x0, x26, :lo12:.LANCHOR64
-	stp	x19, x20, [sp, 16]
-	str	x0, [x29, 104]
-.L1943:
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-	cmp	w27, w0
-	bge	.L1953
-	lsl	w23, w27, 1
-	mov	x19, 0
-	sub	w0, w23, #1
-	str	w0, [x29, 124]
-	b	.L1954
-.L1950:
-	adrp	x1, .LANCHOR107
-	sbfiz	x0, x24, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	ldr	w23, [x1, x0]
-	cmn	w23, #1
-	beq	.L1944
-	adrp	x1, .LANCHOR108
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
-	ldr	w20, [x1, x0]
-	mov	w0, w23
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L1945
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w23
-	bl	pm_log2phys
-.L1945:
-	ldr	w0, [x29, 140]
-	cmp	w20, w0
-	bne	.L1946
-	ldr	x0, [x29, 112]
-	ldrh	w1, [x25]
-	ldrh	w0, [x0, 96]
-	mul	w0, w0, w1
-	ldr	x1, [x29, 104]
-	ldrb	w1, [x1]
-	cmp	w1, 3
-	bne	.L1947
-	add	w0, w0, w27
-	orr	w0, w0, w28, lsl 24
-.L1959:
+	mov	w26, 1
+	str	w0, [x3]
+.L1926:
+	ldrh	w0, [x20, #:lo12:.LANCHOR2]
+	adrp	x23, .LANCHOR95
+	cmp	w0, w21
+	bhi	.L1934
+	adrp	x21, .LANCHOR5
+	mov	w2, 16384
+	mov	w1, 0
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	mov	w1, 20038
+	ldr	x7, [x19, #:lo12:.LANCHOR53]
+	movk	w1, 0x4549, lsl 16
+	ldr	x2, [x22, #:lo12:.LANCHOR3]
+	mov	w5, 3
+	ldrh	w3, [x7, 148]
+	str	w1, [x0]
+	mov	w1, 2
+	ldr	x0, [x25, #:lo12:.LANCHOR12]
+	ldrb	w6, [x23, #:lo12:.LANCHOR95]
+	cmp	w6, 1
+	ldrb	w0, [x0, 47]
+	csinc	w5, w5, wzr, ne
+	csinc	w1, w1, wzr, ne
+	and	w5, w5, 255
+	and	w1, w1, 65535
+	udiv	w0, w0, w6
+	and	w8, w0, 65535
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	w24, w8, 1
+	add	x0, x2, x0
+.L1935:
+	ldrb	w4, [x2, 2]
+	add	x2, x2, 4
+	strb	w5, [x2, -1]
+	orr	w4, w4, -32
+	strb	w4, [x2, -2]
+	cmp	x2, x0
+	bne	.L1935
+	add	w0, w1, w3
+	mov	w4, 16
+	mul	w1, w1, w8
+	sdiv	w4, w4, w6
+	add	w1, w1, w0, uxth
+	adrp	x0, .LANCHOR29
+	strh	w1, [x7, 148]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	add	w4, w24, w4
+	and	w4, w4, 65535
+	strh	w4, [x7, 134]
+	tbz	x0, 12, .L1936
+	adrp	x0, .LC76
+	mov	w3, w24
+	mov	w2, 128
+	mov	w1, 1862
+	add	x0, x0, :lo12:.LC76
+	bl	printf
+.L1936:
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	ldrb	w6, [x23, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR100
+	ldr	x11, [x22, #:lo12:.LANCHOR3]
+	adrp	x22, .LANCHOR96
+	ldr	x8, [x19, #:lo12:.LANCHOR53]
+	and	w7, w6, 65535
+	ldrb	w12, [x0, #:lo12:.LANCHOR100]
+	mov	w2, 21
+	ldrh	w0, [x22, #:lo12:.LANCHOR96]
+	mov	w23, 0
+	mul	w1, w24, w7
+	sub	w0, w2, w0
+	ldrh	w10, [x8, 134]
 	mov	w2, 1
-	add	x1, x29, 136
-	str	w0, [x29, 136]
+	and	w1, w1, 65535
+	lsl	w2, w2, w0
+	and	w2, w2, 65535
+.L1937:
+	cmp	w24, w10
+	bcc	.L1943
+	adrp	x0, .LANCHOR4
+	ldrh	w2, [x20, #:lo12:.LANCHOR2]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldrh	w1, [x20, #:lo12:.LANCHOR2]
+	ldrh	w2, [x0, 134]
+	strh	w23, [x0, 112]
+	sub	w1, w1, w2
+	strh	wzr, [x0, 114]
+	strh	w1, [x0, 116]
+	strh	wzr, [x0, 118]
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w23, w0
+	mov	w1, 0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
 	mov	w0, w23
-	bl	pm_log2phys
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1944
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 1893
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1945:
+	b	.L1945
+.L1925:
+	ldrb	w2, [x1, 2]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	add	x1, x1, 4
+	and	w2, w2, 31
+	bfi	w2, w5, 3, 2
+	strb	w2, [x1, -2]
+	b	.L1924
+.L1934:
+	strh	w21, [x24]
+	mov	w0, w21
+	bl	ftl_test_block
+	ldrb	w11, [x23, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR100
+	ldr	x6, [x22, #:lo12:.LANCHOR3]
+	mov	w7, 0
+	ldrb	w14, [x0, #:lo12:.LANCHOR100]
+	mov	w10, 0
+	ldr	x13, [x19, #:lo12:.LANCHOR53]
+	mov	w8, 0
+	mul	w12, w21, w11
+	add	x6, x6, x21, uxth 2
+.L1927:
+	cmp	w8, w14
+	bcs	.L1931
+	add	w15, w11, w7
+	b	.L1932
+.L1930:
+	add	w1, w7, w12
+	mov	w0, w8
+	bl	flash_check_bad_block
+	cbz	w0, .L1928
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w7
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+	ldrh	w0, [x13, 148]
+	add	w0, w0, 1
+	strh	w0, [x13, 148]
+.L1929:
+	add	w7, w7, 1
+.L1932:
+	cmp	w7, w15
+	bne	.L1930
+	add	w8, w8, 1
+	sub	w12, w12, w11
+	and	w8, w8, 65535
+	b	.L1927
+.L1928:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L1929
+.L1931:
+	cbnz	w10, .L1933
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L1933:
 	add	w21, w21, 1
-	adrp	x0, .LANCHOR71
-	ldrh	w2, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w1, w0, w2
-	mov	w0, 1
-	lsr	w20, w20, w2
-	lsl	w0, w0, w1
-	sub	w0, w0, #1
-	and	w20, w0, w20
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w0, w20, w0
-	bl	ftl_vpn_decrement
-.L1946:
+	and	w21, w21, 65535
+	b	.L1926
+.L1943:
+	add	x13, x11, x24, uxth 2
+	mov	w14, 0
+	mov	w15, 0
+	mov	w3, 0
+	ldrb	w0, [x13, 2]
+	orr	w0, w0, -32
+	strb	w0, [x13, 2]
+.L1938:
+	cmp	w3, w12
+	bcc	.L1947
 	add	w24, w24, 1
-.L1944:
-	add	w28, w28, 1
-.L1952:
-	ldrb	w0, [x26, #:lo12:.LANCHOR64]
-	cmp	w28, w0
-	ble	.L1950
-	add	x19, x19, 1
-.L1954:
-	ldrb	w0, [x22, 89]
-	cmp	w0, w19
-	ble	.L1951
-	add	x0, x22, x19, lsl 1
-	adrp	x25, .LANCHOR75
-	mov	w28, 1
-	add	x25, x25, :lo12:.LANCHOR75
-	str	x0, [x29, 112]
-	b	.L1952
+	add	w1, w7, w1
+	and	w24, w24, 65535
+	and	w1, w1, 65535
+	b	.L1937
+.L1941:
+	ldrb	w5, [x13, 3]
+	add	w16, w15, w4
+	asr	w5, w5, w16
+	tbnz	x5, 0, .L1939
+	cmp	w6, 1
+	bls	.L1946
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L1940:
+	add	x5, x8, x23, sxtw 1
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	add	w0, w0, w14
+	strh	w0, [x5, 160]
+.L1939:
+	add	x4, x4, 1
+.L1942:
+	and	w0, w4, 65535
+	cmp	w0, w7
+	bcc	.L1941
+	add	w3, w3, 1
+	add	w0, w2, w14
+	and	w3, w3, 65535
+	add	w15, w15, w6
+	and	w14, w0, 65535
+	b	.L1938
+.L1946:
+	mov	w0, w1
+	b	.L1940
 .L1947:
-	cmp	w1, 2
-	bne	.L1949
-	ldr	w1, [x29, 124]
-	add	w0, w0, w1
-	add	w0, w0, w28
-	orr	w0, w0, 33554432
-	b	.L1959
-.L1949:
-	add	w0, w0, w27
-	b	.L1959
-.L1951:
-	add	w27, w27, 1
-	b	.L1943
-.L1953:
-	adrp	x0, .LANCHOR56
-	ldrh	w1, [x22, 80]
+	mov	x4, 0
+	b	.L1942
+.L1944:
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldrh	w2, [x22, #:lo12:.LANCHOR96]
+	mov	w1, 21
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	sub	w1, w1, w2
+	asr	w1, w20, w1
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR161
+	strh	w20, [x0, 692]
+	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	strh	w23, [x0, 416]
+	strh	w1, [x0, 698]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x27, x28, [sp, 80]
-	ldp	x21, x22, [sp, 32]
-	ldp	x29, x30, [sp], 144
+	ldp	x29, x30, [sp], 80
 	ret
-	.size	gc_update_l2p_map, .-gc_update_l2p_map
-	.section	.text.gc_update_l2p_map_new,"ax",@progbits
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format_test,"ax",@progbits
 	.align	2
-	.global	gc_update_l2p_map_new
-	.type	gc_update_l2p_map_new, %function
-gc_update_l2p_map_new:
-	stp	x29, x30, [sp, -176]!
-	adrp	x0, .LANCHOR60
-	adrp	x1, .LANCHOR68
+	.global	ftl_re_low_format_test
+	.type	ftl_re_low_format_test, %function
+ftl_re_low_format_test:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 1
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	ldr	x24, [x0, #:lo12:.LANCHOR60]
-	stp	x25, x26, [sp, 64]
-	ldrh	w25, [x1, #:lo12:.LANCHOR68]
-	add	x1, x24, 80
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR22
+	adrp	x19, .LANCHOR53
 	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	str	x1, [x29, 144]
-	ldrb	w1, [x1, 9]
-	str	x0, [x29, 128]
-	mul	w25, w25, w1
-	ldr	w1, [x20, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L1961
-	ldrh	w1, [x24, 80]
-	adrp	x0, .LC102
-	add	x0, x0, :lo12:.LC102
-	bl	printf
-.L1961:
-	adrp	x23, .LANCHOR56
-	ldrh	w1, [x24, 80]
-	sub	w2, w25, #1
-	mov	x21, 0
-	ldr	x0, [x23, #:lo12:.LANCHOR56]
-	mov	w22, 0
-	strh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LANCHOR45
-	add	x0, x0, :lo12:.LANCHOR45
-	str	x0, [x29, 104]
-.L1962:
-	mov	w27, w21
-	cmp	w25, w21
-	bhi	.L1972
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1973
-	ldr	x0, [x29, 128]
-	mov	w3, w22
-	ldr	x1, [x23, #:lo12:.LANCHOR56]
-	ldrh	w2, [x24, 80]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldrh	w2, [x1, x2, lsl 1]
-	ldrh	w1, [x0, 80]
-	adrp	x0, .LC106
-	add	x0, x0, :lo12:.LC106
+	adrp	x21, .LANCHOR2
+	str	x23, [sp, 48]
 	bl	printf
-.L1973:
-	ldrh	w0, [x24, 80]
-	ldr	x1, [x23, #:lo12:.LANCHOR56]
-	lsl	x0, x0, 1
-	ldrh	w2, [x1, x0]
-	cmp	w22, w2
-	beq	.L1974
-	adrp	x1, .LANCHOR153
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	adrp	x3, .LANCHOR3
+	ldrh	w2, [x21, #:lo12:.LANCHOR2]
+	mov	w4, 0
+	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	mov	w5, 0
+	mov	w6, 0
+	ldrh	w1, [x0, 134]
+	add	x3, x3, x1, uxth 2
+.L1958:
+	cmp	w1, w2
+	bcc	.L1962
+	adrp	x22, .LANCHOR4
+	strh	w6, [x0, 114]
+	strh	w5, [x0, 118]
+	lsl	w2, w2, 1
+	strh	w4, [x0, 116]
+	mov	w1, 0
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	bl	ftl_memset
+	bl	zftl_sblk_list_init
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	mov	w23, w0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	mov	w0, w23
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1963
+	adrp	x1, .LANCHOR162
 	adrp	x0, .LC0
-	mov	w2, 448
-	add	x1, x1, :lo12:.LANCHOR153
+	mov	w2, 1965
+	add	x1, x1, :lo12:.LANCHOR162
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L1975:
-	b	.L1975
-.L1972:
-	adrp	x26, .LANCHOR107
-	lsl	x19, x21, 2
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	ldr	w2, [x0, x19]
-	cmn	w2, #1
-	beq	.L1963
-	adrp	x0, .LANCHOR45
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	lsl	w0, w0, 7
-	udiv	w0, w2, w0
-	and	w0, w0, 65535
-	str	w0, [x29, 156]
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1964
-	ldr	w1, [x29, 156]
-	adrp	x0, .LC103
-	mov	w3, w21
-	add	x0, x0, :lo12:.LC103
-	bl	printf
 .L1964:
-	sub	w27, w25, w27
-	add	x27, x27, x21
-	lsl	x0, x27, 2
-	str	x0, [x29, 136]
-	adrp	x0, .LC105
-	add	x0, x0, :lo12:.LC105
-	str	x0, [x29, 120]
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
-	str	x0, [x29, 112]
-.L1965:
-	ldr	x0, [x29, 136]
-	cmp	x0, x19
-	bne	.L1971
+	b	.L1964
+.L1962:
+	ldrb	w7, [x3, 2]
+	and	w8, w7, 31
+	strb	w8, [x3, 2]
+	ands	w7, w7, 24
+	bne	.L1959
+	add	w6, w6, 1
+	and	w6, w6, 65535
+.L1960:
+	add	w1, w1, 1
+	add	x3, x3, 4
+	and	w1, w1, 65535
+	b	.L1958
+.L1959:
+	cmp	w7, 16
+	bne	.L1961
+	add	w5, w5, 1
+	and	w5, w5, 65535
+	b	.L1960
+.L1961:
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L1960
 .L1963:
-	add	x21, x21, 1
-	b	.L1962
-.L1971:
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	ldr	w28, [x0, x19]
-	cmn	w28, #1
-	beq	.L1966
-	ldr	x0, [x29, 104]
-	ldr	w1, [x29, 156]
-	ldrb	w0, [x0]
-	lsl	w0, w0, 7
-	udiv	w0, w28, w0
-	cmp	w1, w0, uxth
-	bne	.L1966
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	ldr	w27, [x0, x19]
-	mov	w0, w28
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 172]
-	cmn	w0, #1
-	bne	.L1967
-	mov	w2, 0
-	add	x1, x29, 172
-	mov	w0, w28
-	bl	pm_log2phys
-.L1967:
-	ldr	w3, [x29, 172]
-	cmp	w27, w3
-	bne	.L1968
-	adrp	x0, .LANCHOR109
-	mov	w2, 1
-	add	x1, x29, 168
-	add	w22, w22, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR109]
-	ldr	w0, [x0, x19]
-	str	w0, [x29, 168]
-	mov	w0, w28
-	bl	pm_log2phys
-	ldr	x0, [x29, 112]
-	mov	w1, 21
-	ldrh	w0, [x0]
-	sub	w2, w1, w0
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	lsr	w1, w20, 14
+	and	w20, w20, 16383
+	ldrh	w2, [x21, #:lo12:.LANCHOR2]
+	strh	w1, [x0, 694]
 	mov	w1, 1
-	lsr	w0, w27, w0
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w1, w1, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w1, w1, w0
-	and	w1, w1, 65535
-	str	w1, [x29, 152]
-	mov	w0, w1
-	bl	ftl_vpn_decrement
-	ldr	x0, [x29, 144]
-	ldr	w1, [x29, 152]
-	ldrh	w0, [x0]
-	cmp	w0, w1
-	bne	.L1969
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1969
-	ldr	w3, [x29, 172]
-	adrp	x0, .LC104
-	mov	w2, w27
-	mov	w1, w28
-	add	x0, x0, :lo12:.LC104
-	bl	printf
-.L1969:
-	ldr	x0, [x26, #:lo12:.LANCHOR107]
-	mov	w1, -1
-	str	w1, [x0, x19]
-.L1966:
-	add	x19, x19, 4
-	b	.L1965
-.L1968:
-	ldr	w0, [x20, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L1970
-	ldr	x0, [x29, 120]
-	mov	w2, w27
-	mov	w1, w28
-	bl	printf
-.L1970:
-	ldr	x0, [x29, 144]
-	ldrh	w0, [x0]
-	bl	ftl_vpn_decrement
-	b	.L1969
-.L1974:
-	strh	w22, [x1, x0]
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR161
+	strh	w20, [x0, 692]
+	adrp	x20, .LANCHOR5
+	ldrh	w1, [x1, #:lo12:.LANCHOR161]
+	lsl	w2, w2, 1
+	strh	w23, [x0, 416]
+	strh	w1, [x0, 698]
+	mov	w1, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR4]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	mov	w1, 2
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	str	wzr, [x0, 520]
+	str	wzr, [x0, 524]
+	str	wzr, [x0, 528]
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	ldr	x23, [sp, 48]
+	mov	w0, 0
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 176
+	ldp	x29, x30, [sp], 64
 	ret
-	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
-	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
+	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
 	.align	2
-	.global	gc_scan_src_blk_one_page
-	.type	gc_scan_src_blk_one_page, %function
-gc_scan_src_blk_one_page:
-	stp	x29, x30, [sp, -96]!
-	mov	w5, 0
-	mov	w6, 0
-	mov	w7, 65535
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	ubfx	x5, x0, 21, 3
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w0, 2097151
+	mov	w0, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L1969
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR105
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
-	add	x1, x19, :lo12:.LANCHOR58
+	mov	x19, x0
 	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	str	x25, [sp, 64]
-	ldrb	w0, [x1, 4]
-	add	x2, x1, x0, sxtw 1
-	ldrh	w3, [x2, 40]
-	adrp	x2, .LANCHOR69
-	ldrb	w4, [x2, #:lo12:.LANCHOR69]
-	ldrh	w2, [x1, 2]
-.L1999:
-	cmp	w3, w7
-	beq	.L2001
-	cbz	w6, .L2002
-	add	x1, x19, :lo12:.LANCHOR58
-	strb	w0, [x1, 4]
-.L2002:
-	cbz	w5, .L2003
-	add	x0, x19, :lo12:.LANCHOR58
-	strh	w2, [x0, 2]
-.L2003:
-	adrp	x0, .LANCHOR75
-	ldrh	w22, [x0, #:lo12:.LANCHOR75]
-	adrp	x0, .LANCHOR64
-	mov	x23, x0
-	ldrb	w1, [x0, #:lo12:.LANCHOR64]
-	mul	w22, w22, w3
-	cmp	w1, 2
-	bne	.L2004
-	add	x0, x19, :lo12:.LANCHOR58
-	ldrb	w1, [x0, 6]
-	cbnz	w1, .L2004
-	ldrh	w0, [x0, 2]
-	add	w22, w22, w0, lsl 1
-.L2005:
-	add	x1, x19, :lo12:.LANCHOR58
-	ldrb	w0, [x1, 4]
-	add	w0, w0, 1
-	and	w0, w0, 255
-	strb	w0, [x1, 4]
-	cmp	w4, w0
-	bne	.L2006
-	ldrh	w0, [x1, 2]
-	strb	wzr, [x1, 4]
-	add	w0, w0, 1
-	strh	w0, [x1, 2]
-.L2006:
-	mov	w0, 1
-	add	x19, x19, :lo12:.LANCHOR58
-	bl	buf_alloc
-	add	x23, x23, :lo12:.LANCHOR64
-	mov	x21, x0
-	mov	w20, 0
-	adrp	x24, .LANCHOR61
-.L2016:
-	ldrb	w0, [x19, 6]
-	cmp	w0, 3
-	bne	.L2007
-	cbz	w20, .L2008
-.L2007:
-	cmp	w0, w20
-	bgt	.L2009
-.L2017:
-	mov	x0, x21
-	bl	buf_free
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldr	x25, [sp, 64]
-	ldp	x29, x30, [sp], 96
-	ret
-.L2001:
-	add	w0, w0, 1
-	and	w0, w0, 255
-	cmp	w0, w4
-	bne	.L2000
-	add	w2, w2, 1
-	mov	w5, 1
-	and	w2, w2, 65535
-	mov	w0, 0
-.L2000:
-	add	x3, x1, x0, sxtw 1
-	mov	w6, 1
-	ldrh	w3, [x3, 40]
-	b	.L1999
-.L2004:
-	add	x0, x19, :lo12:.LANCHOR58
-	ldrh	w0, [x0, 2]
-	add	w22, w0, w22
-	b	.L2005
-.L2009:
-	ldrb	w1, [x23]
-	cmp	w1, 2
-	bne	.L2010
-	cbnz	w0, .L2010
-	add	w0, w20, w22
-	orr	w0, w0, 33554432
-.L2030:
-	str	w0, [x21, 40]
-	mov	w1, 1
-	mov	x0, x21
-	bl	sblk_read_page
-	ldr	w0, [x21, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	beq	.L2013
-	ldr	x0, [x21, 24]
-	ldr	w25, [x0, 4]
-	mov	w0, w25
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
-	cmn	w0, #1
-	bne	.L2014
-	mov	w2, 0
-	add	x1, x29, 92
-	mov	w0, w25
-	bl	pm_log2phys
-.L2014:
-	ldr	w0, [x29, 92]
-	cmp	w22, w0
-	bne	.L2013
-	ldrh	w0, [x19, 24]
-	ldr	x2, [x24, #:lo12:.LANCHOR61]
-	ubfiz	x1, x0, 2, 16
-	add	w0, w0, 1
-	str	w22, [x2, x1]
-	strh	w0, [x19, 24]
-.L2013:
-	ldrh	w0, [x19, 26]
-	add	w0, w0, 1
-	strh	w0, [x19, 26]
-.L2008:
-	add	w20, w20, 1
-	cmp	w20, 4
-	bne	.L2016
-	b	.L2017
-.L2010:
-	orr	w0, w22, w20, lsl 24
-	b	.L2030
-	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
-	.section	.text.gc_scan_static_data,"ax",@progbits
-	.align	2
-	.global	gc_scan_static_data
-	.type	gc_scan_static_data, %function
-gc_scan_static_data:
-	stp	x29, x30, [sp, -80]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	ldr	w1, [x0, 544]
-	str	x23, [sp, 48]
-	cmn	w1, #1
-	beq	.L2032
-	adrp	x21, .LANCHOR71
-	adrp	x22, .LANCHOR70
-	add	x21, x21, :lo12:.LANCHOR71
-	add	x22, x22, :lo12:.LANCHOR70
-	mov	w20, 11
-.L2041:
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	mov	w2, 0
-	add	x1, x29, 76
-	ldr	w0, [x0, 544]
-	bl	pm_log2phys
-	ldr	w0, [x29, 76]
+	ldr	x20, [x1, #:lo12:.LANCHOR105]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
+	mov	w21, w0
 	cmn	w0, #1
-	beq	.L2033
-	mov	w0, 1
-	bl	buf_alloc
-	ldr	w1, [x29, 76]
-	mov	x23, x0
-	str	w1, [x0, 40]
-	mov	w1, 1
-	bl	sblk_read_page
-	ldr	w0, [x23, 52]
-	cmp	w0, 256
-	bne	.L2034
-	ldrh	w3, [x21]
-	mov	w0, 21
-	ldr	w2, [x29, 76]
-	mov	w1, 1
-	sub	w0, w0, w3
-	lsr	w2, w2, w3
-	ldrb	w3, [x22]
-	lsl	w0, w1, w0
-	sub	w0, w0, #1
-	and	w0, w0, w2
-	mov	w2, 0
-	udiv	w0, w0, w3
-	bl	gc_add_sblk
-.L2034:
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	ldr	x1, [x23, 24]
-	ldr	w0, [x0, 544]
-	ldr	w1, [x1, 4]
-	cmp	w1, w0
-	beq	.L2035
-	adrp	x1, .LANCHOR154
-	adrp	x0, .LC0
-	mov	w2, 1149
-	add	x1, x1, :lo12:.LANCHOR154
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2036:
-	b	.L2036
-.L2035:
-	mov	x0, x23
-	bl	buf_free
-.L2033:
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	adrp	x2, .LANCHOR47
-	ldr	w2, [x2, #:lo12:.LANCHOR47]
-	ldr	w1, [x0, 544]
-	add	w1, w1, 1
-	str	w1, [x0, 544]
-	cmp	w1, w2
-	bcc	.L2037
-	mov	w1, -1
-	str	w1, [x0, 544]
-	ldr	w1, [x0, 548]
-	add	w1, w1, 1
-	str	w1, [x0, 548]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
+	beq	.L1970
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR145
+	mov	w1, 15555
+	add	x6, x0, :lo12:.LANCHOR145
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR145]
+	adrp	x0, .LANCHOR80
+	ldrh	w1, [x0, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR72
+	ldrb	w0, [x0, #:lo12:.LANCHOR72]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	stp	w0, wzr, [x6, 4]
+	adrp	x0, .LANCHOR52
+	mov	x2, x6
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	mov	w0, w21
+	str	wzr, [x6, 12]
+	bl	ftl_prog_ppa_page
+.L1970:
 	mov	w0, 0
-	bl	ftl_info_flush
-.L2031:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldr	x23, [sp, 48]
-	ldp	x29, x30, [sp], 80
+	ldp	x29, x30, [sp], 48
 	ret
-.L2037:
-	ldr	w0, [x29, 76]
-	cmn	w0, #1
-	bne	.L2031
-	sub	w20, w20, #1
-	ands	w20, w20, 65535
-	bne	.L2041
-	b	.L2031
-.L2032:
-	adrp	x1, .LANCHOR46
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
-	ldr	w2, [x1, 40]
-	cmp	w2, 20480
-	bls	.L2043
-	ldr	w3, [x1, 44]
-	add	w3, w3, w2, lsr 10
-	and	w2, w2, 1023
-	stp	w2, w3, [x1, 40]
-.L2043:
-	ldr	w2, [x0, 536]
-	ldr	w3, [x0, 12]
-	add	w2, w2, 12959744
-	add	w2, w2, 256
-	cmp	w3, w2
-	ldr	w2, [x1, 44]
-	bhi	.L2044
-	ldr	w1, [x0, 540]
-	add	w1, w1, 98304
-	add	w1, w1, 1696
-	cmp	w2, w1
-	bls	.L2031
-.L2044:
-	str	w3, [x0, 536]
-	str	w2, [x0, 540]
-	str	wzr, [x0, 544]
-	b	.L2031
-	.size	gc_scan_static_data, .-gc_scan_static_data
-	.section	.text.ftl_sblk_dump,"ax",@progbits
+.L1969:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
 	.align	2
-	.global	ftl_sblk_dump
-	.type	ftl_sblk_dump, %function
-ftl_sblk_dump:
-	sub	sp, sp, #256
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	sub	sp, sp, #176
 	stp	x29, x30, [sp, 48]
 	add	x29, sp, 48
-	stp	x23, x24, [sp, 96]
-	and	w23, w0, 65535
-	stp	x19, x20, [sp, 64]
-	mov	w0, 65535
 	stp	x21, x22, [sp, 80]
-	cmp	w23, w0
-	stp	x25, x26, [sp, 112]
+	adrp	x22, .LANCHOR29
 	stp	x27, x28, [sp, 128]
-	beq	.L2072
-	uxtw	x0, w23
-	str	x0, [x29, 128]
-	lsl	x14, x0, 2
-	adrp	x0, .LANCHOR59
-	mov	x13, x0
-	ldr	x2, [x0, #:lo12:.LANCHOR59]
-	add	x2, x2, x14
-	ldrb	w2, [x2, 2]
-	and	w2, w2, 224
-	cmp	w2, 160
-	bne	.L2073
-	adrp	x0, .LANCHOR64
-	ldrb	w25, [x0, #:lo12:.LANCHOR64]
-.L2052:
-	add	x28, x29, 208
-	str	x1, [x29, 144]
-	mov	w0, w23
-	adrp	x21, .LANCHOR22
-	strh	w23, [x28, -32]!
-	add	x1, x28, 16
-	bl	ftl_get_blk_list_in_sblk
-	adrp	x2, .LANCHOR79
-	and	w1, w0, 255
-	strb	w1, [x29, 185]
-	ldrh	w3, [x2, #:lo12:.LANCHOR79]
-	strh	wzr, [x29, 178]
-	strb	wzr, [x29, 181]
-	strh	wzr, [x29, 186]
-	mul	w1, w1, w3
-	str	x2, [x29, 120]
-	strh	w1, [x29, 182]
-	ldr	w1, [x21, #:lo12:.LANCHOR22]
-	tbz	x1, 12, .L2053
-	ldr	x1, [x13, #:lo12:.LANCHOR59]
-	and	w4, w0, 255
-	mov	w3, w25
-	adrp	x0, .LC107
-	add	x1, x1, x14
-	add	x0, x0, :lo12:.LC107
-	ldrb	w2, [x1, 2]
-	mov	w1, w23
-	ubfx	x2, x2, 5, 3
+	mov	x28, x0
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	stp	x25, x26, [sp, 112]
+	mov	x25, x1
+	stp	x19, x20, [sp, 64]
+	stp	x23, x24, [sp, 96]
+	tbz	x0, 12, .L1976
+	ldrh	w1, [x28, 2]
+	adrp	x0, .LC78
+	add	x0, x0, :lo12:.LC78
 	bl	printf
-.L2053:
-	mov	w0, 1
-	bl	buf_alloc
-	mov	w27, 0
-	mov	x26, x0
-	mov	w20, 0
-	adrp	x0, .LANCHOR75
-	stp	wzr, wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR75
-	str	x0, [x29, 96]
-.L2054:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+.L1976:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1977
+	ldrb	w1, [x28, 5]
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+.L1977:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1978
+	ldrh	w1, [x28]
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	printf
+.L1978:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1979
+	ldrh	w2, [x28, 18]
+	adrp	x0, .LC81
+	ldrh	w1, [x28, 16]
+	add	x0, x0, :lo12:.LC81
+	bl	printf
+.L1979:
+	ldrh	w0, [x28, 10]
+	adrp	x26, .LANCHOR52
+	strh	w0, [x28, 14]
+	mov	w27, 0
+	mov	w0, 1
+	adrp	x23, .LANCHOR80
+	bl	buf_alloc
+	ldrb	w20, [x28, 5]
+	ldrh	w21, [x28, 2]
+	mov	x19, x0
+	add	x0, x26, :lo12:.LANCHOR52
+	str	x0, [x29, 120]
+.L1980:
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	cmp	w0, w21
+	bhi	.L1996
+.L1983:
+	strb	w20, [x28, 5]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrb	w20, [x28, 9]
+	ldrh	w2, [x28, 10]
+	ldrh	w1, [x28, 6]
+	strh	w21, [x28, 2]
+	mul	w20, w20, w0
+	add	w1, w1, w2
+	cmp	w1, w20
+	bne	.L1997
+	adrp	x21, .LANCHOR105
+	mov	w0, 0
+	mov	w1, 0
+	ldr	x4, [x21, #:lo12:.LANCHOR105]
+.L1998:
+	cmp	w1, w2
+	bcc	.L2001
+	sub	w20, w20, w2
+	adrp	x24, .LANCHOR4
+	add	w0, w0, w20
+	and	w20, w0, 65535
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2002
+	ldrh	w1, [x28]
+	ldr	x2, [x24, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC83
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC83
+	bl	printf
+.L2002:
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	adrp	x25, .LANCHOR52
+	ldrh	w1, [x28]
+	adrp	x24, .LANCHOR72
+	adrp	x26, .LC84
+	add	x24, x24, :lo12:.LANCHOR72
+	add	x25, x25, :lo12:.LANCHOR52
+	add	x26, x26, :lo12:.LC84
+	strh	w20, [x0, x1, lsl 1]
+	mov	w20, 0
+	mov	x0, x19
+	bl	buf_free
+.L2003:
+	ldrb	w0, [x24]
+	cmp	w20, w0, lsl 1
+	bcc	.L2006
+	ldrh	w1, [x28, 12]
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	ldrb	w2, [x28, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x21, #:lo12:.LANCHOR105]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L2007
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC0
+	mov	w2, 1359
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2008:
+	b	.L2008
+.L1996:
+	ldrb	w20, [x28, 5]
+	adrp	x24, .LANCHOR99
+	add	x24, x24, :lo12:.LANCHOR99
+.L1981:
+	ldrb	w0, [x28, 9]
 	cmp	w0, w20
-	bls	.L2069
-	lsl	w0, w20, 1
-	mov	w24, 0
-	sub	w0, w0, #1
-	str	w0, [x29, 140]
-	adrp	x0, .LC109
-	add	x0, x0, :lo12:.LC109
-	str	x0, [x29, 104]
-	b	.L2070
-.L2073:
-	mov	w25, 1
-	b	.L2052
-.L2066:
-	ldr	x0, [x29, 112]
-	ldrh	w10, [x28, x0]
+	bhi	.L1995
+	add	w21, w21, 1
+	strb	wzr, [x28, 5]
+	and	w21, w21, 65535
+	b	.L1980
+.L1995:
+	add	x0, x28, x20, sxtw 1
+	ldrh	w12, [x0, 16]
 	mov	w0, 65535
-	cmp	w10, w0
-	beq	.L2055
-	ldr	x0, [x29, 96]
-	cmp	w25, 3
-	ldrh	w19, [x0]
-	mul	w19, w19, w10
-	bne	.L2056
-	add	w19, w20, w19
-	orr	w19, w19, w22, lsl 24
-.L2057:
-	str	w19, [x26, 40]
-	mov	w1, 1
-	str	w10, [x29, 136]
-	mov	x0, x26
-	bl	sblk_read_page
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	ldr	w11, [x26, 52]
-	ldr	w10, [x29, 136]
-	tbz	x0, 12, .L2059
-	ldr	x1, [x26, 24]
-	mov	w4, w11
-	ldr	x0, [x26, 8]
-	mov	w3, w19
-	str	w11, [x29, 136]
+	cmp	w12, w0
+	beq	.L1982
+	ldrh	w11, [x24]
+	ldrb	w3, [x26, #:lo12:.LANCHOR52]
+	ldr	x1, [x19, 8]
+	ldr	x2, [x19, 24]
+	madd	w11, w11, w12, w21
+	stp	w12, w11, [x29, 108]
+	mov	w0, w11
+	bl	ftl_read_ppa_page
+	mov	w10, w0
+	cmp	w0, 512
+	beq	.L1983
+	cmn	w0, #1
+	ldp	w12, w11, [x29, 108]
+	beq	.L1984
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0]
+	cmn	w1, #1
+	bne	.L1984
+	ldr	w0, [x0, 4]
+	cmn	w0, #1
+	bne	.L1984
+	ldr	x0, [x19, 8]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L1983
+.L1984:
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L1985
+	ldr	x1, [x19, 24]
+	mov	w4, w10
+	ldr	x0, [x19, 8]
+	mov	w3, w11
+	str	w10, [x29, 112]
 	ldr	w2, [x1, 12]
 	str	w2, [sp, 32]
 	ldr	w2, [x1, 8]
 	str	w2, [sp, 24]
 	ldr	w2, [x1, 4]
 	str	w2, [sp, 16]
-	mov	w2, w20
+	mov	w2, w21
 	ldr	w1, [x1]
 	str	w1, [sp, 8]
 	ldr	w1, [x0, 12]
 	str	w1, [sp]
-	mov	w1, w10
+	mov	w1, w12
 	ldp	w5, w6, [x0]
 	ldr	w7, [x0, 8]
-	adrp	x0, .LC73
-	add	x0, x0, :lo12:.LC73
-	bl	printf
-	ldr	w11, [x29, 136]
-.L2059:
-	cmp	w11, 512
-	ldr	w0, [x29, 152]
-	ccmn	w11, #1, 4, ne
-	csinc	w0, w0, wzr, ne
-	str	w0, [x29, 152]
-	ldr	x0, [x26, 24]
-	ldr	w3, [x0, 4]
-	str	w3, [x29, 136]
-	mov	w0, w3
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 172]
-	cmn	w0, #1
-	ldr	w3, [x29, 136]
-	bne	.L2061
-	mov	w2, 0
-	add	x1, x29, 172
-	mov	w0, w3
-	bl	pm_log2phys
-.L2061:
-	ldr	w0, [x29, 172]
-	cmp	w19, w0
-	bne	.L2062
-	ldr	w0, [x29, 156]
-	add	w0, w0, 1
-	str	w0, [x29, 156]
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2062
-	ldr	x0, [x26, 24]
-	mov	w1, w19
-	ldr	w3, [x29, 156]
-	ldr	w2, [x0, 4]
-	adrp	x0, .LC108
-	add	x0, x0, :lo12:.LC108
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	printf
-.L2062:
-	ldr	x0, [x29, 144]
-	cbz	x0, .L2063
-	ubfiz	x19, x27, 2, 32
-	ldr	w2, [x0, x19]
-	ldr	x0, [x26, 24]
-	ldr	w0, [x0, 4]
-	cmp	w0, w2
-	beq	.L2064
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2064
-	ldr	x0, [x29, 104]
-	mov	w1, w27
+	ldr	w10, [x29, 112]
+.L1985:
+	ldrb	w2, [x28, 9]
+	adrp	x0, .LANCHOR157
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR157]
+	ldrh	w0, [x28, 10]
+	madd	w1, w21, w2, w20
+	cmp	w0, w1
+	beq	.L1986
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC0
+	mov	w2, 1255
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2064:
-	ldr	x1, [x26, 24]
-	ldr	x0, [x29, 144]
-	ldr	w1, [x1, 4]
-	ldr	w0, [x0, x19]
+.L1987:
+	b	.L1987
+.L1986:
+	ldrh	w1, [x28, 6]
+	add	w1, w1, w0
+	ldrh	w0, [x23, #:lo12:.LANCHOR80]
+	mul	w0, w0, w2
 	cmp	w1, w0
-	beq	.L2063
-	cmn	w0, #1
-	beq	.L2063
-	adrp	x1, .LANCHOR155
+	beq	.L1988
+	adrp	x1, .LANCHOR163
 	adrp	x0, .LC0
-	mov	w2, 616
-	add	x1, x1, :lo12:.LANCHOR155
+	mov	w2, 1256
+	add	x1, x1, :lo12:.LANCHOR163
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2065:
-	b	.L2065
-.L2056:
-	cmp	w25, 2
-	bne	.L2058
-	ldr	w0, [x29, 140]
-	add	w19, w19, w0
-	adrp	x0, .LANCHOR64
-	add	w19, w19, w22
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	orr	w19, w19, w0, lsl 24
-	b	.L2057
-.L2058:
-	add	w19, w20, w19
-	b	.L2057
-.L2063:
-	add	w27, w27, 1
-.L2055:
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2068:
-	cmp	w25, w22
-	bcs	.L2066
-	add	w24, w24, 1
-	and	w24, w24, 65535
-.L2070:
-	ldrb	w0, [x29, 185]
-	cmp	w0, w24
-	bls	.L2067
-	sxtw	x0, w24
-	mov	w22, 1
-	add	x0, x0, 8
-	lsl	x0, x0, 1
-	str	x0, [x29, 112]
-	b	.L2068
-.L2067:
+.L1989:
+	b	.L1989
+.L1988:
+	cmn	w10, #1
+	beq	.L1991
+	ldr	x5, [x19, 24]
+	str	x5, [x29, 112]
+	ldr	w0, [x5, 4]
+	cmn	w0, #1
+	beq	.L1991
+	bl	lpa_hash_get_ppa
+	cbz	x25, .L1993
+	ldr	x5, [x29, 112]
+	ldr	w1, [x5, 8]
+	cmp	w0, w1
+	beq	.L1993
+	cmn	w0, #1
+	beq	.L1993
+	adrp	x3, .LANCHOR96
+	mov	w1, 21
+	adrp	x27, .LANCHOR95
+	ldrh	w6, [x3, #:lo12:.LANCHOR96]
+	sub	w4, w1, w6
+	mov	w1, 1
+	lsr	w2, w0, w6
+	lsl	w1, w1, w4
+	sub	w1, w1, #1
+	and	w1, w1, w2
+	ldrb	w2, [x27, #:lo12:.LANCHOR95]
+	mov	x4, x3
+	udiv	w1, w1, w2
+	ldrh	w2, [x25]
+	cmp	w2, w1, uxth
+	bne	.L1993
+	ldr	x1, [x29, 120]
+	ldr	w6, [x5]
+	adrp	x5, .LANCHOR154
+	str	w6, [x29, 108]
+	add	x2, x5, :lo12:.LANCHOR154
+	str	x5, [x29, 112]
+	ldrb	w3, [x1]
+	ldr	x1, [x19, 8]
+	str	x4, [x29, 96]
+	bl	ftl_read_ppa_page
+	ldr	x5, [x29, 112]
+	ldr	w6, [x29, 108]
+	ldr	w0, [x5, #:lo12:.LANCHOR154]
+	cmp	w6, w0
+	bhi	.L1993
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	beq	.L1991
+	ldr	x4, [x29, 96]
+	mov	w0, 21
+	ldrh	w3, [x4, #:lo12:.LANCHOR96]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	ldrb	w1, [x27, #:lo12:.LANCHOR95]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+.L1991:
+	ldrh	w0, [x28, 6]
+	mov	w27, 1
+	sub	w0, w0, #1
+	strh	w0, [x28, 6]
+	ldrh	w0, [x28, 10]
+	add	w0, w0, 1
+	strh	w0, [x28, 10]
+.L1982:
 	add	w20, w20, 1
 	and	w20, w20, 65535
-	b	.L2054
-.L2069:
-	mov	x0, x26
-	bl	buf_free
-	ldr	w0, [x21, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2071
-	adrp	x0, .LANCHOR56
-	ldr	x1, [x29, 128]
-	ldr	w3, [x29, 156]
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	ldrh	w2, [x0, x1, lsl 1]
-	adrp	x0, .LC110
-	mov	w1, w23
-	add	x0, x0, :lo12:.LC110
+	b	.L1981
+.L1997:
+	adrp	x1, .LANCHOR163
+	adrp	x0, .LC0
+	mov	w2, 1332
+	add	x1, x1, :lo12:.LANCHOR163
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2071:
-	ldr	w0, [x29, 152]
-.L2050:
-	ldp	x19, x20, [sp, 64]
-	ldp	x21, x22, [sp, 80]
-	ldp	x23, x24, [sp, 96]
-	ldp	x25, x26, [sp, 112]
-	ldp	x27, x28, [sp, 128]
-	ldp	x29, x30, [sp, 48]
-	add	sp, sp, 256
-	ret
-.L2072:
-	mov	w0, 0
-	b	.L2050
-	.size	ftl_sblk_dump, .-ftl_sblk_dump
-	.section	.text.gc_search_src_blk,"ax",@progbits
-	.align	2
-	.global	gc_search_src_blk
-	.type	gc_search_src_blk, %function
-gc_search_src_blk:
-	stp	x29, x30, [sp, -160]!
+.L1999:
+	b	.L1999
+.L2001:
+	ldrh	w3, [x28, 12]
+	add	w3, w3, w1
+	ldr	w3, [x4, x3, lsl 2]
+	cmn	w3, #1
+	beq	.L2000
+	add	w0, w0, 1
+	and	w0, w0, 65535
+.L2000:
+	add	w1, w1, 1
+	b	.L1998
+.L2006:
+	cbz	w27, .L2004
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bls	.L2004
+	mov	x0, x28
+	bl	ftl_get_new_free_page
+	mov	w4, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2005
+	mov	w1, w4
+	str	w4, [x29, 120]
+	mov	x0, x26
+	bl	printf
+	ldr	w4, [x29, 120]
+.L2005:
+	adrp	x0, .LANCHOR53
+	ldr	x2, [x19, 24]
+	ldr	x1, [x19, 8]
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	w0, [x0, 8]
+	str	w0, [x2]
+	str	wzr, [x2, 12]
+	mov	w0, -1
+	stp	w0, w0, [x2, 4]
+	mov	w0, w4
+	str	wzr, [x1]
+	ldrb	w3, [x25]
+	bl	ftl_prog_ppa_page
+	ldrh	w0, [x28]
+	bl	ftl_vpn_decrement
+.L2004:
+	add	w20, w20, 1
+	b	.L2003
+.L2007:
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bne	.L1975
+	ldp	x19, x20, [sp, 64]
+	mov	x0, x28
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	b	ftl_write_last_log_page
+.L1993:
+	ldr	x3, [x19, 24]
+	adrp	x0, .LANCHOR54
+	ldr	w0, [x0, #:lo12:.LANCHOR54]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bcs	.L1991
+	ldrb	w0, [x28, 9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR80]
+	ldrh	w2, [x28, 10]
+	mul	w0, w0, w1
+	sub	w0, w0, #1
+	cmp	w2, w0
+	bge	.L1991
+	adrp	x0, .LANCHOR53
+	ldr	w1, [x3]
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L1994
+	str	w1, [x0, 8]
+.L1994:
+	ldrh	w0, [x28, 12]
+	add	w2, w2, w0
+	ldp	w0, w1, [x3, 4]
+	bl	lpa_hash_update_ppa
+	b	.L1991
+.L1975:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	ret
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",@progbits
+	.align	2
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR60
-	and	w23, w0, 255
-	and	w0, w1, 255
-	str	w0, [x29, 156]
-	ldr	x0, [x24, #:lo12:.LANCHOR60]
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR80
 	stp	x21, x22, [sp, 32]
-	add	x0, x0, x23, sxtw 1
+	mov	w19, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR53
+	mov	x24, x1
+	add	x20, x20, :lo12:.LANCHOR80
+	mov	x21, x22
 	stp	x25, x26, [sp, 64]
-	stp	x27, x28, [sp, 80]
-	ldrh	w19, [x0, 120]
-	cbnz	w19, .L2098
-	adrp	x26, .LANCHOR46
-	and	w27, w2, 255
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w20, [x0, 134]
-	adrp	x0, .LANCHOR22
-	str	x0, [x29, 144]
-	ldr	w1, [x0, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2101
-	ldr	w2, [x29, 156]
-	adrp	x0, .LC111
-	mov	w3, w27
-	mov	w1, w23
-	add	x0, x0, :lo12:.LC111
-	bl	printf
-.L2101:
-	ldr	x0, [x29, 144]
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2102
-	ldr	x1, [x24, #:lo12:.LANCHOR60]
-	adrp	x2, .LANCHOR57
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w3, [x2, #:lo12:.LANCHOR57]
-	ldrh	w2, [x1, 126]
-	ldrh	w1, [x0, 134]
-	adrp	x0, .LC111
-	add	x0, x0, :lo12:.LC111
-	bl	printf
-.L2102:
-	cmp	w27, 64
-	bls	.L2103
-	adrp	x1, .LANCHOR156
+	mov	w23, 65535
+	str	x27, [sp, 80]
+.L2058:
+	adrp	x25, .LANCHOR99
+.L2063:
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x20]
+	cmp	w2, w1
+	bcs	.L2059
+	ldrh	w0, [x0, 692]
+	cmp	w0, w23
+	bne	.L2060
+.L2059:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2060:
+	ldr	x1, [x21, #:lo12:.LANCHOR53]
+	ldrh	w0, [x1, 692]
+	cmp	w0, w23
+	bne	.L2061
+	adrp	x1, .LANCHOR164
 	adrp	x0, .LC0
-	mov	w2, 1028
-	add	x1, x1, :lo12:.LANCHOR156
+	mov	w2, 224
+	add	x1, x1, :lo12:.LANCHOR164
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2104:
-	b	.L2104
-.L2103:
-	adrp	x0, .LANCHOR69
-	adrp	x22, .LANCHOR79
-	ldrb	w21, [x0, #:lo12:.LANCHOR69]
-	adrp	x0, .LANCHOR68
-	ldrh	w3, [x22, #:lo12:.LANCHOR79]
-	ldrh	w1, [x0, #:lo12:.LANCHOR68]
-	str	x0, [x29, 128]
-	adrp	x0, .LANCHOR54
-	str	x0, [x29, 120]
-	mul	w3, w21, w3
-	mul	w21, w21, w1
-	ldr	x1, [x26, #:lo12:.LANCHOR46]
-	and	w28, w3, 65535
-	and	w21, w21, 65535
-	ldrh	w25, [x1, 134]
-	add	x1, x0, :lo12:.LANCHOR54
-	adrp	x0, .LANCHOR105
-	str	x1, [x29, 136]
-	add	x0, x0, :lo12:.LANCHOR105
-	str	x0, [x29, 112]
-.L2105:
-	ldr	x0, [x29, 136]
-	ldrh	w1, [x0]
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w0, [x0, 134]
-	sub	w2, w1, w0
-	cmp	w25, w2
-	blt	.L2117
-.L2114:
-	ldr	x0, [x26, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 134]
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0, #:lo12:.LANCHOR54]
-	sub	w0, w0, w1
-	cmp	w25, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR60]
-	blt	.L2118
-	strh	w1, [x0, 126]
-	cbnz	w23, .L2119
-	adrp	x0, .LANCHOR57
-	ldrh	w1, [x0, #:lo12:.LANCHOR57]
-	cmp	w1, w28
-	bcs	.L2120
-	strh	w28, [x0, #:lo12:.LANCHOR57]
-.L2120:
-	ldrh	w1, [x22, #:lo12:.LANCHOR79]
-	mov	w2, 7
-	ldrh	w3, [x0, #:lo12:.LANCHOR57]
-	mul	w2, w1, w2
-	cmp	w3, w2, lsr 3
-	bge	.L2122
-	add	w1, w3, w1, lsr 3
-	strh	w1, [x0, #:lo12:.LANCHOR57]
-.L2122:
-	ldr	x0, [x29, 144]
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2128
-	adrp	x0, .LC113
-	mov	w1, w19
-	add	x0, x0, :lo12:.LC113
+.L2062:
+	b	.L2062
+.L2061:
+	ldrh	w1, [x1, 696]
+	adrp	x27, .LANCHOR165
+	ldrh	w26, [x25, #:lo12:.LANCHOR99]
+	mov	w2, 64
+	madd	w26, w26, w0, w1
+	ldr	x0, [x27, #:lo12:.LANCHOR165]
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x3, [x27, #:lo12:.LANCHOR165]
+	mov	x2, x24
+	ldr	x0, [x21, #:lo12:.LANCHOR53]
+	str	w19, [x3]
+	ldr	w1, [x0, 48]
+	ldrb	w0, [x0, 694]
+	str	w1, [x3, 4]
+	adrp	x1, .LANCHOR52
+	ldrb	w4, [x1, #:lo12:.LANCHOR52]
+	mov	w1, w26
+	bl	ftl_prog_page
+	ldr	x2, [x21, #:lo12:.LANCHOR53]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	beq	.L2063
+	cmn	w0, #1
+	bne	.L2064
+	mov	w1, w26
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
 	bl	printf
-.L2128:
-	bl	print_ftl_debug_info
-.L2098:
-	mov	w0, w19
+	b	.L2058
+.L2064:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L2065
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L2065:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 96
 	ret
-.L2117:
-	ldr	x2, [x24, #:lo12:.LANCHOR60]
-	ldrh	w20, [x2, 126]
-	add	w20, w25, w20
-	and	w20, w20, 65535
-	cmp	w1, w20
-	bhi	.L2106
-	sub	w0, w0, w1
-	add	w20, w20, w0
-	and	w20, w20, 65535
-	cmp	w1, w20
-	bhi	.L2106
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 1038
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2107:
-	b	.L2107
-.L2106:
-	adrp	x0, .LANCHOR59
-	uxtw	x4, w20
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
-	add	x0, x0, x4, lsl 2
-	ldrb	w1, [x0, 2]
-	mov	w0, 224
-	and	w1, w1, 224
-	cmp	w1, 32
-	ccmp	w1, w0, 4, ne
-	beq	.L2108
-	adrp	x5, .LANCHOR56
-	lsl	x4, x4, 1
-	ldr	x0, [x5, #:lo12:.LANCHOR56]
-	cbnz	w1, .L2109
-	ldrh	w1, [x0, x4]
-	cbz	w1, .L2110
-	mov	w2, w20
-	stp	x5, x4, [x29, 96]
-	adrp	x0, .LC112
-	add	x0, x0, :lo12:.LC112
-	bl	printf
-	mov	x1, 0
-	mov	w0, w20
-	bl	ftl_sblk_dump
-	ldp	x5, x4, [x29, 96]
-.L2110:
-	ldr	x0, [x5, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x4]
-	cbz	w0, .L2108
-	adrp	x1, .LANCHOR156
-	adrp	x0, .LC0
-	mov	w2, 1047
-	add	x1, x1, :lo12:.LANCHOR156
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2111:
-	b	.L2111
-.L2109:
-	ldrh	w0, [x0, x4]
-	mov	w2, 65535
-	cmp	w0, w2
-	beq	.L2108
-	cmp	w1, 160
-	ldr	w3, [x29, 156]
-	cset	w2, eq
-	add	w2, w2, 1
-	and	w2, w3, w2
-	cbnz	w23, .L2113
-	cmp	w0, w28
-	csel	w3, w0, w28, cc
-	and	w28, w3, 65535
-	cbz	w2, .L2108
-	adrp	x1, .LANCHOR57
-	ldrh	w1, [x1, #:lo12:.LANCHOR57]
-	cmp	w1, w0
-	bls	.L2108
-	mov	w2, 0
-	mov	w1, 0
-	mov	w0, w20
-	bl	gc_add_sblk
-	cbz	w0, .L2108
-.L2161:
-	add	w19, w19, 1
-	and	w19, w19, 65535
-	b	.L2115
-.L2113:
-	cbz	w2, .L2115
-	bne	.L2116
-	adrp	x1, .LANCHOR106
-	cmp	w0, w21
-	csel	w21, w0, w21, cc
-	ldrh	w1, [x1, #:lo12:.LANCHOR106]
-	and	w21, w21, 65535
-	cmp	w1, w0
-	bls	.L2115
-.L2163:
-	mov	w2, w23
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.flash_info_flush,"ax",@progbits
+	.align	2
+	.global	flash_info_flush
+	.type	flash_info_flush, %function
+flash_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w2, 64
 	mov	w1, 0
-	mov	w0, w20
-	bl	gc_add_sblk
-	cbz	w0, .L2115
-	b	.L2161
-.L2116:
-	ldr	x1, [x29, 112]
-	cmp	w0, w28
-	csel	w3, w0, w28, cc
-	and	w28, w3, 65535
-	ldrh	w1, [x1]
-	cmp	w1, w0
-	bls	.L2163
-.L2115:
-	cmp	w19, w27
-	bhi	.L2114
-.L2108:
-	add	w25, w25, 1
-	and	w25, w25, 65535
-	b	.L2105
-.L2119:
-	ldr	x0, [x29, 128]
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	mul	w0, w0, w1
-	adrp	x1, .LANCHOR106
-	cmp	w21, w0
-	beq	.L2123
-	ldrh	w2, [x1, #:lo12:.LANCHOR106]
-	cmp	w2, w21
-	bcs	.L2123
-	strh	w21, [x1, #:lo12:.LANCHOR106]
-.L2123:
-	ldrh	w4, [x22, #:lo12:.LANCHOR79]
-	ldrh	w2, [x1, #:lo12:.LANCHOR106]
-	lsr	w3, w4, 3
-	sub	w0, w0, w3
-	cmp	w2, w0
-	bge	.L2124
-	add	w2, w2, w3
-	strh	w2, [x1, #:lo12:.LANCHOR106]
-.L2124:
-	adrp	x1, .LANCHOR105
-	ldrh	w0, [x1, #:lo12:.LANCHOR105]
-	cmp	w0, w4, lsr 1
-	bls	.L2122
-	sub	w0, w0, w3
-	strh	w0, [x1, #:lo12:.LANCHOR105]
-	b	.L2122
-.L2118:
-	strh	w20, [x0, 126]
-	cbnz	w23, .L2126
-	adrp	x1, .LANCHOR57
-	ldrh	w0, [x22, #:lo12:.LANCHOR79]
-	ldrh	w2, [x1, #:lo12:.LANCHOR57]
-	cmp	w2, w0, lsr 2
-	bls	.L2122
-	sub	w0, w2, w0, lsr 3
-	strh	w0, [x1, #:lo12:.LANCHOR57]
-	b	.L2122
-.L2126:
-	adrp	x0, .LANCHOR106
-	ldrh	w2, [x22, #:lo12:.LANCHOR79]
-	ldrh	w1, [x0, #:lo12:.LANCHOR106]
-	cmp	w1, w2, lsr 1
-	bls	.L2127
-	sub	w1, w1, w2, lsr 3
-	strh	w1, [x0, #:lo12:.LANCHOR106]
-.L2127:
-	adrp	x0, .LANCHOR70
-	adrp	x3, .LANCHOR105
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	ldrh	w1, [x3, #:lo12:.LANCHOR105]
-	mul	w0, w0, w2
-	sub	w0, w0, #32
-	cmp	w1, w0
-	bge	.L2122
-	add	w1, w1, 32
-	strh	w1, [x3, #:lo12:.LANCHOR105]
-	b	.L2122
-	.size	gc_search_src_blk, .-gc_search_src_blk
-	.section	.text.ftl_read,"ax",@progbits
-	.align	2
-	.global	ftl_read
-	.type	ftl_read, %function
-ftl_read:
-	stp	x29, x30, [sp, -160]!
 	add	x29, sp, 0
 	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	mov	w26, w2
+	adrp	x23, .LANCHOR140
 	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR12
+	ldr	x0, [x23, #:lo12:.LANCHOR140]
+	adrp	x24, .LC87
 	stp	x21, x22, [sp, 32]
+	add	x24, x24, :lo12:.LC87
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR141
 	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L2165
-	adrp	x0, .LANCHOR52
-	ldr	w2, [x0, #:lo12:.LANCHOR52]
-	mov	w0, 24576
-.L2166:
-	add	w3, w1, w26
-	cmp	w2, w3
-	bcc	.L2190
-	add	w22, w0, w1
-	adrp	x1, .LANCHOR46
-	adrp	x24, .LANCHOR45
-	str	x1, [x29, 120]
-	ldr	x2, [x1, #:lo12:.LANCHOR46]
-	ldr	w0, [x2, 24]
-	add	w0, w0, w26
-	str	w0, [x2, 24]
-	ldrb	w0, [x24, #:lo12:.LANCHOR45]
-	add	w2, w26, w22
-	stp	w2, wzr, [x29, 136]
-	sub	w2, w2, #1
-	udiv	w27, w22, w0
-	udiv	w0, w2, w0
-	mov	w20, w27
-	sub	w25, w0, w27
-	str	w0, [x29, 132]
-	add	w25, w25, 1
-	adrp	x0, .LC101
-	add	x0, x0, :lo12:.LC101
-	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-	str	x0, [x29, 104]
-.L2168:
-	cbnz	w25, .L2188
-	ldr	w0, [x29, 140]
-.L2164:
+	adrp	x22, .LANCHOR20
+	bl	ftl_memset
+	adrp	x25, .LANCHOR121
+	ldr	x1, [x20, #:lo12:.LANCHOR12]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC86
+	add	x0, x0, :lo12:.LC86
+	add	x22, x22, :lo12:.LANCHOR20
+	add	x25, x25, :lo12:.LANCHOR121
+	add	x27, x21, :lo12:.LANCHOR141
+	bl	rknand_print_hex
+	mov	w26, 0
+	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	add	x0, x6, 16
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
+.L2070:
+	add	x28, x21, :lo12:.LANCHOR141
+	ldrb	w4, [x21, #:lo12:.LANCHOR141]
+	ldrh	w19, [x22]
+	mov	x0, x24
+	mov	w1, w4
+	ldrh	w3, [x28, 2]
+	stp	w3, w4, [x29, 104]
+	mov	w2, w3
+	bl	printf
+	ldrh	w0, [x25]
+	ldrh	w1, [x28, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	ldp	w3, w4, [x29, 104]
+	blt	.L2071
+	ldr	x6, [x20, #:lo12:.LANCHOR12]
+	ldrb	w7, [x28, 1]
+	strh	wzr, [x28, 2]
+	ldr	w0, [x6, 4]
+	ldrh	w1, [x6, 16]
+	add	w0, w0, 1
+	str	w0, [x6, 4]
+	ldrb	w0, [x21, #:lo12:.LANCHOR141]
+	add	w1, w1, 1
+	strb	w0, [x28, 1]
+	mov	x0, x6
+	strb	w7, [x21, #:lo12:.LANCHOR141]
+	strh	w1, [x0, 16]!
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	ldrh	w19, [x22]
+	str	w0, [x6, 12]
+	mul	w19, w19, w7
+.L2077:
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_erase_block
+	b	.L2072
+.L2075:
+	mov	w26, 1
+	b	.L2070
+.L2071:
+	madd	w19, w19, w4, w3
+	cbz	w1, .L2077
+.L2072:
+	ldr	x2, [x20, #:lo12:.LANCHOR12]
+	mov	w1, w19
+	ldr	x3, [x23, #:lo12:.LANCHOR140]
+	mov	w5, 1
+	mov	w4, 4
+	ldr	w0, [x2, 4]
+	str	w0, [x3]
+	mov	w0, 21321
+	movk	w0, 0x5359, lsl 16
+	str	w0, [x3, 4]
+	mov	w0, 0
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	bne	.L2073
+	mov	w1, w19
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
+	bl	printf
+	b	.L2070
+.L2073:
+	cbz	w26, .L2075
 	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 160
+	ldp	x29, x30, [sp], 112
 	ret
-.L2165:
-	cmp	w0, 3
-	bhi	.L2190
-	lsl	w0, w0, 13
-	mov	w2, 8192
-	b	.L2166
-.L2188:
-	ldrb	w1, [x24, #:lo12:.LANCHOR45]
-	cmp	w20, w27
-	ldr	w0, [x29, 132]
-	and	w19, w1, 65535
-	ccmp	w20, w0, 4, ne
-	bne	.L2191
-	cmp	w20, w27
-	bne	.L2170
-	udiv	w21, w22, w1
-	and	w0, w26, 65535
-	msub	w1, w21, w1, w22
-	and	w21, w1, 65535
-	sub	w19, w19, w21
-	and	w19, w19, 65535
-	cmp	w26, w19
-	csel	w19, w0, w19, cc
-.L2169:
-	adrp	x0, .LANCHOR36
-	add	x1, x0, :lo12:.LANCHOR36
-	add	x1, x1, 2
-	mov	w0, 0
-.L2173:
-	ldr	w2, [x1, 34]
-	cmp	w20, w2
-	bne	.L2171
-	ldrb	w2, [x1]
-	tbz	x2, 3, .L2171
-	ldr	x1, [x29, 104]
-	ubfiz	x0, x0, 6, 32
-	lsl	w2, w19, 9
-	ubfiz	x19, x19, 9, 16
-	add	x0, x1, x0
-	ubfiz	x21, x21, 9, 16
-	ldr	x1, [x0, 8]
-	mov	x0, x23
-	add	x23, x23, x19
-	add	x1, x1, x21
-	bl	ftl_memcpy
-.L2172:
-	add	w20, w20, 1
-	sub	w25, w25, #1
-	b	.L2168
-.L2170:
-	ldr	w0, [x29, 136]
-	msub	w19, w1, w20, w0
-	and	w19, w19, 255
-.L2191:
-	mov	w21, 0
-	b	.L2169
-.L2171:
-	add	w0, w0, 1
-	add	x1, x1, 64
-	cmp	w0, 32
-	bne	.L2173
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 156]
-	cmn	w0, #1
-	bne	.L2174
-	mov	w2, 0
-	add	x1, x29, 156
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.nand_flash_init,"ax",@progbits
+	.align	2
+	.global	nand_flash_init
+	.type	nand_flash_init, %function
+nand_flash_init:
+	stp	x29, x30, [sp, -80]!
+	mov	w2, 2
+	adrp	x1, .LANCHOR27
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR41
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR33
+	add	x23, x21, :lo12:.LANCHOR33
+	stp	x19, x20, [sp, 16]
+	str	x25, [sp, 64]
+	mov	x24, x23
+	strb	w2, [x1, #:lo12:.LANCHOR27]
+	bl	nandc_init
+	adrp	x19, .LANCHOR26
+	mov	w20, 0
+	add	x0, x19, :lo12:.LANCHOR26
+	mov	w25, 44
+	str	x0, [x22, #:lo12:.LANCHOR41]
+.L2084:
+	mov	x1, x23
 	mov	w0, w20
-	bl	pm_log2phys
-.L2174:
-	ldr	w0, [x29, 156]
-	cmn	w0, #1
-	bne	.L2175
-	add	x21, x24, :lo12:.LANCHOR45
-	mov	w19, 0
-.L2176:
-	ldrb	w0, [x21]
-	cmp	w19, w0
-	bcs	.L2172
-	madd	w0, w20, w0, w19
-	cmp	w22, w0
-	bhi	.L2177
-	ldr	w1, [x29, 136]
-	cmp	w1, w0
-	bls	.L2177
-	mov	x0, x23
-	add	x23, x23, 512
-	mov	w2, 512
-	mov	w1, 0
-	bl	ftl_memset
-.L2177:
-	add	w19, w19, 1
-	b	.L2176
-.L2175:
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L2179
-	bl	ftl_read_ahead
-	b	.L2168
-.L2179:
-	ldr	x0, [x29, 120]
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 40]
-	add	w0, w0, 1
-	str	w0, [x1, 40]
-	ldr	w0, [x29, 156]
-	stp	w0, w0, [x28, 40]
-	ldrb	w0, [x24, #:lo12:.LANCHOR45]
-	cmp	w0, w19
-	bne	.L2181
-	str	x23, [x28, 16]
-.L2181:
-	mov	w1, 1
-	mov	x0, x28
-	bl	sblk_read_page
-	ldr	w10, [x28, 52]
-	cmn	w10, #1
-	beq	.L2192
-	cmp	w10, 256
-	bne	.L2182
-	adrp	x0, .LANCHOR71
-	mov	w4, 21
-	mov	w5, 1
-	stp	w10, w5, [x29, 96]
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	ldr	w0, [x29, 156]
-	sub	w4, w4, w1
-	ldp	w2, w3, [x28, 36]
-	lsl	w4, w5, w4
-	lsr	w0, w0, w1
-	sub	w4, w4, #1
-	and	w4, w4, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w4, w4, w0
-	adrp	x0, .LC114
-	add	x0, x0, :lo12:.LC114
-	and	w1, w4, 65535
-	str	w4, [x29, 128]
-	bl	printf
-	ldr	w5, [x29, 100]
-	mov	w2, 0
-	ldr	w4, [x29, 128]
-	mov	w1, w5
-	mov	w0, w4
-	bl	gc_add_sblk
-	ldr	w10, [x29, 96]
-.L2182:
-	ldr	x0, [x28, 24]
-	ldr	w5, [x0, 4]
-	cmp	w20, w5
-	beq	.L2183
-	ldr	w4, [x0]
-	mov	w2, w20
-	ldp	w6, w7, [x0, 8]
-	str	w10, [x29, 128]
-	ldrb	w1, [x28, 1]
-	ldr	w3, [x29, 156]
-	ldr	x0, [x29, 112]
-	bl	printf
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x29, 156]
-	ldrh	w3, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
+	bl	flash_read_id
+	cbnz	w20, .L2079
+	ldrb	w0, [x24]
 	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-	ldr	w10, [x29, 128]
-.L2183:
-	ldr	x0, [x28, 24]
-	ldr	w0, [x0, 4]
-	cmp	w20, w0
-	bne	.L2184
-	cmn	w10, #1
-	bne	.L2185
-.L2184:
-	adrp	x1, .LANCHOR157
-	adrp	x0, .LC0
-	mov	w2, 911
-	add	x1, x1, :lo12:.LANCHOR157
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2186:
-	b	.L2186
-.L2192:
-	str	w10, [x29, 140]
-	b	.L2182
-.L2185:
-	ldr	x0, [x28, 16]
-	cbnz	x0, .L2187
-	ldr	x1, [x28, 8]
-	ubfiz	x21, x21, 9, 16
-	lsl	w2, w19, 9
-	mov	x0, x23
-	add	x1, x1, x21
-	bl	ftl_memcpy
-.L2187:
-	ubfiz	x19, x19, 9, 16
-	mov	x0, x28
-	add	x23, x23, x19
-	bl	buf_free
-	b	.L2172
-.L2190:
-	mov	w0, -1
-	b	.L2164
-	.size	ftl_read, .-ftl_read
-	.section	.text.FtlRead,"ax",@progbits
-	.align	2
-	.global	FtlRead
-	.type	FtlRead, %function
-FtlRead:
 	and	w0, w0, 255
-	b	ftl_read
-	.size	FtlRead, .-FtlRead
-	.section	.text.StorageSysDataLoad,"ax",@progbits
-	.align	2
-	.global	StorageSysDataLoad
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	stp	x29, x30, [sp, -32]!
-	mov	w2, 512
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	x19, x1
-	mov	w20, w0
-	mov	w1, 0
-	mov	x0, x19
-	bl	ftl_memset
-	mov	x3, x19
-	mov	w1, w20
-	ldp	x19, x20, [sp, 16]
-	mov	w2, 1
-	ldp	x29, x30, [sp], 32
-	mov	w0, 2
-	b	ftl_read
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.vpn_check,"ax",@progbits
-	.align	2
-	.global	vpn_check
-	.type	vpn_check, %function
-vpn_check:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	adrp	x20, .LANCHOR56
-	stp	x23, x24, [sp, 48]
-	adrp	x21, .LANCHOR47
-	stp	x25, x26, [sp, 64]
-	adrp	x22, .LANCHOR54
-	str	x27, [sp, 80]
-	bl	dump_ftl_info
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	mov	w24, 0
-	add	x21, x21, :lo12:.LANCHOR47
-	add	x23, x22, :lo12:.LANCHOR54
-	ldrh	w3, [x0, 80]
-	ldrh	w2, [x0, 48]
-	ldrh	w1, [x0, 16]
-	adrp	x0, .LC115
-	add	x0, x0, :lo12:.LC115
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	ldr	x3, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x0, 16]
-	ldrh	w2, [x0, 22]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC116
-	add	x0, x0, :lo12:.LC116
-	sub	w4, w3, w2
-	bl	printf
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	adrp	x19, check_vpc_tbl
-	ldr	x3, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x0, 48]
-	ldrh	w2, [x0, 54]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x3, x0]
-	adrp	x0, .LC117
-	add	x0, x0, :lo12:.LC117
-	sub	w4, w3, w2
-	bl	printf
-	mov	w2, 4352
-	mov	w1, 0
-	add	x0, x19, :lo12:check_vpc_tbl
-	bl	ftl_memset
-.L2202:
-	ldr	w0, [x21]
-	cmp	w24, w0
-	bcc	.L2210
-	adrp	x0, .LANCHOR54
-	adrp	x23, .LC120
-	add	x24, x0, :lo12:.LANCHOR54
-	mov	x22, x0
-	add	x23, x23, :lo12:.LC120
-	mov	w21, 0
-.L2211:
-	ldrh	w0, [x24]
-	cmp	w0, w21
-	bhi	.L2213
-	adrp	x23, .LC121
-	add	x22, x22, :lo12:.LANCHOR54
-	add	x19, x19, :lo12:check_vpc_tbl
-	add	x23, x23, :lo12:.LC121
-	mov	w21, 0
-	adrp	x27, .LANCHOR59
-.L2214:
-	ldrh	w0, [x22]
-	cmp	w0, w21
-	bhi	.L2219
+	cmp	w0, 253
+	bls	.L2080
+.L2082:
+	mov	w0, -2
+.L2078:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldr	x27, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
 	ret
-.L2210:
-	mov	w0, w24
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 108]
+.L2080:
+	ldrb	w0, [x24, 1]
+	cmp	w0, 255
+	beq	.L2082
+.L2079:
+	ldrb	w0, [x23]
+	cmp	w0, 181
+	bne	.L2083
+	strb	w25, [x23]
+.L2083:
+	add	w20, w20, 1
+	add	x23, x23, 8
+	and	w20, w20, 255
+	cmp	w20, 4
+	bne	.L2084
+	adrp	x0, .LANCHOR166
+	add	x8, x0, :lo12:.LANCHOR166
+	add	x8, x8, 1
+	mov	x7, x0
+	add	x12, x21, :lo12:.LANCHOR33
+	mov	x10, 0
+.L2087:
+	ldrb	w2, [x8, -1]
+	mov	w11, w10
+	lsl	x23, x10, 5
+	mov	x1, x12
+	mov	x0, x8
+	bl	flash_mem_cmp8
+	cbnz	w0, .L2085
+	add	x0, x7, :lo12:.LANCHOR166
+	ubfiz	x11, x11, 5, 32
+	add	x23, x0, x23
+	add	x0, x0, x11
+	adrp	x1, .LANCHOR167
+	add	x4, x1, :lo12:.LANCHOR167
+	ldrb	w3, [x0, 22]
+	mov	x0, 0
+.L2086:
+	lsl	x5, x0, 5
+	mov	w2, w0
+	ldrb	w5, [x5, x4]
+	cmp	w5, w3
+	beq	.L2088
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L2086
+	mov	w2, w0
+.L2088:
+	ubfiz	x0, x2, 5, 32
+	add	x1, x1, :lo12:.LANCHOR167
+	add	x1, x1, x0
+	mov	w2, 32
+	adrp	x0, .LANCHOR129
+	add	x20, x19, :lo12:.LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR129
+	bl	ftl_memcpy
+	mov	x1, x23
+	mov	w2, 32
+	mov	x0, x20
+	bl	ftl_memcpy
+	adrp	x1, .LANCHOR14
+	mov	x23, x1
+	ldrb	w0, [x1, #:lo12:.LANCHOR14]
+	cmp	w0, 8
+	bhi	.L2089
+	ldrb	w1, [x20, 20]
+	cmp	w1, 60
+	bls	.L2090
+	mov	w1, 60
+	strb	w1, [x20, 20]
+.L2090:
+	cmp	w0, 8
+	bne	.L2089
+	ldrb	w0, [x21, #:lo12:.LANCHOR33]
+	cmp	w0, 44
+	bne	.L2089
+	add	x0, x19, :lo12:.LANCHOR26
+	ldrb	w1, [x0, 28]
+	cmp	w1, 3
+	bne	.L2089
+	strb	wzr, [x0, 28]
+.L2089:
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR143
+	adrp	x21, .LANCHOR12
+	add	x20, x19, :lo12:.LANCHOR26
+	str	x0, [x1, #:lo12:.LANCHOR143]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR135
+	str	x0, [x1, #:lo12:.LANCHOR135]
+	mov	w0, 2048
+	bl	ftl_malloc
+	str	x0, [x21, #:lo12:.LANCHOR12]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR142
+	str	x0, [x1, #:lo12:.LANCHOR142]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR136
+	str	x0, [x1, #:lo12:.LANCHOR136]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR140
+	str	x0, [x1, #:lo12:.LANCHOR140]
+	adrp	x0, .LANCHOR147
+	strb	wzr, [x0, #:lo12:.LANCHOR147]
+	bl	flash_die_info_init
+	ldrb	w0, [x20, 18]
+	bl	flash_lsb_page_tbl_build
+	ldrb	w0, [x20, 20]
+	adrp	x20, .LANCHOR139
+	bl	nandc_bch_sel
+	str	xzr, [x20, #:lo12:.LANCHOR139]
+	ldr	x1, [x22, #:lo12:.LANCHOR41]
+	adrp	x22, .LANCHOR32
+	ldrh	w0, [x1, 16]
+	lsr	w3, w0, 8
+	ubfx	x4, x0, 3, 1
+	and	w2, w3, 7
+	strb	w2, [x22, #:lo12:.LANCHOR32]
+	adrp	x2, .LANCHOR168
+	strb	w4, [x2, #:lo12:.LANCHOR168]
+	adrp	x2, .LANCHOR30
+	ubfx	x4, x0, 4, 1
+	strb	w4, [x2, #:lo12:.LANCHOR30]
+	adrp	x2, .LANCHOR69
+	ubfx	x4, x0, 12, 1
+	strb	w4, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR98
+	ubfx	x4, x0, 13, 1
+	ubfx	x0, x0, 14, 1
+	strb	w4, [x2, #:lo12:.LANCHOR98]
+	adrp	x2, .LANCHOR19
+	strb	w0, [x2, #:lo12:.LANCHOR19]
+	mov	w2, 60
+	ldrb	w0, [x1, 28]
+	adrp	x1, .LANCHOR18
+	strb	w0, [x1, #:lo12:.LANCHOR18]
+	adrp	x1, .LANCHOR169
+	strb	w2, [x1, #:lo12:.LANCHOR169]
+	ldrb	w2, [x23, #:lo12:.LANCHOR14]
+	cmp	w2, 9
+	bne	.L2091
+	mov	w2, 70
+	strb	w2, [x1, #:lo12:.LANCHOR169]
+.L2091:
+	add	x19, x19, :lo12:.LANCHOR26
+	adrp	x1, .LANCHOR170
+	adrp	x23, .LANCHOR9
+	strb	w0, [x1, #:lo12:.LANCHOR170]
+	ldrh	w1, [x19, 16]
+	ldrb	w0, [x19, 19]
+	strb	w0, [x23, #:lo12:.LANCHOR9]
+	tbz	x1, 6, .L2093
+	sub	w1, w0, #17
+	and	w1, w1, 255
+	cmp	w1, 2
+	bhi	.L2094
+	adrp	x1, micron_read_retrial
+	add	x1, x1, :lo12:micron_read_retrial
+	str	x1, [x20, #:lo12:.LANCHOR139]
+	cmp	w0, 19
+	adrp	x0, .LANCHOR137
+	beq	.L2095
+	mov	w1, 7
+.L2122:
+	strb	w1, [x0, #:lo12:.LANCHOR137]
+	b	.L2093
+.L2085:
+	add	x10, x10, 1
+	add	x8, x8, 32
+	cmp	x10, 25
+	bne	.L2087
+	b	.L2082
+.L2095:
+	mov	w1, 15
+	b	.L2122
+.L2094:
+	sub	w1, w0, #65
+	cmp	w0, 33
+	and	w1, w1, 255
+	ccmp	w1, 1, 0, ne
+	bhi	.L2097
+	adrp	x0, toshiba_read_retrial
+	add	x0, x0, :lo12:toshiba_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR139]
+	adrp	x0, .LANCHOR11
+	mov	w1, 4
+	strb	w1, [x0, #:lo12:.LANCHOR11]
+.L2124:
+	mov	w1, 7
+	adrp	x0, .LANCHOR137
+	b	.L2122
+.L2097:
+	sub	w2, w0, #34
+	sub	w1, w0, #67
+	and	w2, w2, 255
+	and	w1, w1, 255
+	cmp	w2, 1
+	ccmp	w1, 1, 0, hi
+	bhi	.L2098
+	adrp	x2, toshiba_read_retrial
+	add	x2, x2, :lo12:toshiba_read_retrial
+	str	x2, [x20, #:lo12:.LANCHOR139]
+	cmp	w0, 35
+	mov	w2, 68
+	ccmp	w0, w2, 4, ne
+	adrp	x0, .LANCHOR137
+	beq	.L2099
+	mov	w2, 7
+.L2121:
+	strb	w2, [x0, #:lo12:.LANCHOR137]
+	cmp	w1, 1
+	adrp	x0, .LANCHOR11
+	bhi	.L2101
+	mov	w1, 4
+.L2123:
+	strb	w1, [x0, #:lo12:.LANCHOR11]
+.L2093:
+	adrp	x19, .LANCHOR42
+	mov	w0, 4
+	strb	wzr, [x19, #:lo12:.LANCHOR42]
+	tbz	x3, 0, .L2102
+	bl	nandc_set_if_mode
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+.L2102:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
 	cmn	w0, #1
-	bne	.L2203
-	mov	w2, 0
-	add	x1, x29, 108
-	mov	w0, w24
-	bl	pm_log2phys
-.L2204:
-	ldr	w2, [x29, 108]
-	cmn	w2, #1
-	beq	.L2206
-	adrp	x0, .LANCHOR71
-	mov	w3, 21
-	ldrh	w0, [x0, #:lo12:.LANCHOR71]
-	sub	w1, w3, w0
-	mov	w3, 1
-	lsr	w0, w2, w0
-	lsl	w3, w3, w1
-	sub	w3, w3, #1
-	and	w3, w3, w0
-	adrp	x0, .LANCHOR70
-	ldrb	w0, [x0, #:lo12:.LANCHOR70]
-	udiv	w3, w3, w0
-	ldrh	w0, [x22, #:lo12:.LANCHOR54]
-	and	w25, w3, 65535
-	and	w3, w3, 65535
-	cmp	w0, w25
-	bls	.L2207
-	add	x0, x19, :lo12:check_vpc_tbl
-	sxtw	x3, w3
-	ldrh	w1, [x0, x3, lsl 1]
-	add	w1, w1, 1
-	strh	w1, [x0, x3, lsl 1]
-.L2208:
-	ldrh	w0, [x23]
-	cmp	w0, w25
-	bhi	.L2206
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC0
-	mov	w2, 1111
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2209:
-	b	.L2209
-.L2203:
-	adrp	x1, .LANCHOR71
-	ldrh	w3, [x1, #:lo12:.LANCHOR71]
-	mov	w1, 21
-	sub	w2, w1, w3
-	mov	w1, 1
-	lsr	w0, w0, w3
-	lsl	w1, w1, w2
-	sub	w1, w1, #1
-	and	w0, w1, w0
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	cmp	w1, w0, uxth
-	bhi	.L2204
-	adrp	x1, .LANCHOR158
+	beq	.L2078
+	ldrb	w0, [x23, #:lo12:.LANCHOR9]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L2104
+	adrp	x0, hynix_read_retrial
+	add	x0, x0, :lo12:hynix_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR139]
+.L2104:
+	ldrb	w0, [x22, #:lo12:.LANCHOR32]
+	tbnz	x0, 2, .L2105
+.L2125:
+	mov	w0, 0
+	b	.L2078
+.L2099:
+	mov	w2, 17
+	b	.L2121
+.L2101:
+	mov	w1, 5
+	b	.L2123
+.L2098:
+	sub	w0, w0, #36
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L2093
+	adrp	x0, toshiba_3d_read_retrial
+	add	x0, x0, :lo12:toshiba_3d_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR139]
+	b	.L2124
+.L2105:
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	ldrb	w0, [x0, 19]
+	cbz	w0, .L2125
+	adrp	x0, .LANCHOR141
+	ldrb	w1, [x0, #:lo12:.LANCHOR141]
+	adrp	x0, .LANCHOR20
+	ldrh	w0, [x0, #:lo12:.LANCHOR20]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_ddr_para_scan
+	ldrb	w0, [x19, #:lo12:.LANCHOR42]
+	cbnz	w0, .L2125
+	ldr	x0, [x21, #:lo12:.LANCHOR12]
+	strb	wzr, [x0, 19]
+	bl	flash_info_flush
+	b	.L2125
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sysblk_dump
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	sub	sp, sp, #144
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	stp	x25, x26, [sp, 112]
+	adrp	x26, .LANCHOR80
+	stp	x27, x28, [sp, 128]
+	add	x26, x26, :lo12:.LANCHOR80
+	stp	x19, x20, [sp, 64]
+	adrp	x27, .LANCHOR99
+	stp	x21, x22, [sp, 80]
+	and	w22, w0, 65535
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	x23, [x0, 8]
+	adrp	x28, .LANCHOR52
+	mov	x24, x0
+	add	x27, x27, :lo12:.LANCHOR99
+	add	x28, x28, :lo12:.LANCHOR52
+	mov	w25, 0
+	mov	w19, 0
+.L2127:
+	ldrh	w0, [x26]
+	cmp	w0, w19
+	bhi	.L2129
+	mov	x0, x24
+	bl	buf_free
+	cbz	w25, .L2130
+	adrp	x1, .LANCHOR171
 	adrp	x0, .LC0
-	mov	w2, 1101
-	add	x1, x1, :lo12:.LANCHOR158
+	mov	w2, 1199
+	add	x1, x1, :lo12:.LANCHOR171
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2205:
-	b	.L2205
-.L2207:
-	mov	w1, w24
-	adrp	x0, .LC118
-	add	x0, x0, :lo12:.LC118
+.L2131:
+	b	.L2131
+.L2129:
+	ldrh	w20, [x27]
+	ldrb	w3, [x28]
+	ldr	x1, [x24, 8]
+	ldr	x2, [x24, 24]
+	madd	w20, w20, w22, w19
+	mov	w0, w20
+	bl	ftl_read_ppa_page
+	mov	w21, w0
+	ldr	x1, [x24, 24]
+	mov	w4, w0
+	ldr	x0, [x24, 8]
+	mov	w3, w20
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	add	w19, w19, 1
+	ldr	w1, [x1]
+	and	w19, w19, 65535
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w22
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
 	bl	printf
-	adrp	x0, .LANCHOR45
+	mov	w3, 32
 	mov	w2, 4
-	ldrb	w3, [x0, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR93+8
-	ldr	x1, [x0, #:lo12:.LANCHOR93+8]
-	adrp	x0, .LC119
-	lsl	w3, w3, 7
-	add	x0, x0, :lo12:.LC119
+	add	x1, x23, 704
+	adrp	x0, .LC89
+	add	x0, x0, :lo12:.LC89
 	bl	rknand_print_hex
-	b	.L2208
-.L2206:
-	add	w24, w24, 1
-	b	.L2202
-.L2213:
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
-	uxtw	x0, w21
-	ldrh	w3, [x1, x0, lsl 1]
-	add	x1, x19, :lo12:check_vpc_tbl
-	ldrh	w2, [x1, w21, sxtw 1]
-	cmp	w3, w2
-	beq	.L2212
-	adrp	x1, .LANCHOR59
-	ldr	x1, [x1, #:lo12:.LANCHOR59]
-	add	x0, x1, x0, lsl 2
-	mov	w1, w21
-	ldrb	w4, [x0, 2]
-	mov	x0, x23
-	ubfx	x4, x4, 5, 3
-	bl	printf
-.L2212:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2211
-.L2219:
-	ldr	x0, [x27, #:lo12:.LANCHOR59]
-	uxtw	x24, w21
-	add	x0, x0, x24, lsl 2
-	ldrb	w0, [x0, 2]
-	tst	w0, 224
-	bne	.L2215
-	sxtw	x25, w21
-	ldrh	w0, [x19, x25, lsl 1]
-	cbnz	w0, .L2216
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	lsl	x26, x24, 1
-	ldrh	w0, [x0, x26]
-	cbz	w0, .L2217
-	mov	w1, w21
-	mov	x0, x23
-	bl	printf
-.L2217:
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	strh	wzr, [x0, x26]
-.L2216:
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x24, lsl 1]
-	cbz	w0, .L2215
-	ldrh	w0, [x19, x25, lsl 1]
-	cbz	w0, .L2215
-	adrp	x1, .LANCHOR158
-	adrp	x0, .LC0
-	mov	w2, 1143
-	add	x1, x1, :lo12:.LANCHOR158
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2218:
-	b	.L2218
-.L2215:
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	b	.L2214
-	.size	vpn_check, .-vpn_check
-	.section	.text.ftl_info_check,"ax",@progbits
+	cmp	w21, 512
+	ccmn	w21, #1, 4, ne
+	csinc	w25, w25, wzr, ne
+	b	.L2127
+.L2130:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 144
+	ret
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",@progbits
 	.align	2
-	.global	ftl_info_check
-	.type	ftl_info_check, %function
-ftl_info_check:
-	stp	x29, x30, [sp, -128]!
-	adrp	x0, .LANCHOR46
+	.global	dump_ftl_info
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR155
+	add	x1, x0, :lo12:.LANCHOR155
 	add	x29, sp, 0
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
-	stp	x27, x28, [sp, 80]
-	adrp	x27, .LC122
-	stp	x25, x26, [sp, 64]
-	add	x27, x27, :lo12:.LC122
-	adrp	x26, .LANCHOR54
-	stp	x21, x22, [sp, 32]
-	ldrh	w28, [x1, 134]
-	mov	w25, 0
-	stp	x23, x24, [sp, 48]
-	mov	w21, 0
 	stp	x19, x20, [sp, 16]
-	mov	w23, 0
-	str	x0, [x29, 112]
-	mov	w24, 0
-	add	x0, x26, :lo12:.LANCHOR54
-	mov	w20, 0
-	mov	w22, 0
-	adrp	x26, .LANCHOR56
-	str	x0, [x29, 120]
-.L2234:
-	ldr	x0, [x29, 120]
-	ldrh	w0, [x0]
-	cmp	w0, w28
-	bhi	.L2249
-	mov	w3, w20
-	mov	w2, w21
-	mov	w1, w22
-	adrp	x0, .LC123
-	add	x0, x0, :lo12:.LC123
+	adrp	x19, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR53
+	ldrh	w3, [x1, 2]
+	adrp	x20, .LANCHOR80
+	ldrb	w2, [x1, 1]
+	adrp	x21, .LANCHOR2
+	ldrb	w1, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
 	bl	printf
-	mov	w1, w25
-	mov	w3, w23
-	mov	w2, w24
-	adrp	x0, .LC124
-	add	x0, x0, :lo12:.LC124
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	ldrh	w2, [x0, 140]
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
 	bl	printf
-	ldr	x0, [x29, 112]
-	ldr	x0, [x0, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 114]
-	cmp	w1, w25
-	beq	.L2250
-	strh	w25, [x0, 114]
-.L2250:
-	ldrh	w1, [x0, 118]
-	cmp	w1, w24
-	beq	.L2251
-	strh	w24, [x0, 118]
-.L2251:
-	ldrh	w1, [x0, 116]
-	cmp	w1, w23
-	beq	.L2252
-	strh	w23, [x0, 116]
-.L2252:
-	ldrh	w1, [x0, 122]
-	cmp	w1, w22
-	beq	.L2253
-	strh	w22, [x0, 122]
-.L2253:
-	ldrh	w1, [x0, 120]
-	cmp	w1, w21
-	beq	.L2254
-	strh	w21, [x0, 120]
-.L2254:
-	ldrh	w1, [x0, 124]
-	cmp	w1, w20
-	beq	.L2233
-	strh	w20, [x0, 124]
-.L2233:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2249:
-	adrp	x0, .LANCHOR59
-	uxtw	x19, w28
-	ldr	x4, [x0, #:lo12:.LANCHOR59]
-	add	x4, x4, x19, lsl 2
-	ldrb	w0, [x4, 2]
-	and	w1, w0, 224
-	cmp	w1, 64
-	bne	.L2235
-	add	w22, w22, 1
-	and	w22, w22, 65535
-.L2268:
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	ldrh	w1, [x0, x19, lsl 1]
-	cmp	w1, 15
-	bls	.L2241
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
-.L2265:
-	adrp	x2, .LANCHOR69
-	ldrb	w2, [x2, #:lo12:.LANCHOR69]
-	mul	w0, w0, w2
-	cmp	w1, w0
-	bne	.L2237
-.L2241:
-	mov	w2, 0
-	mov	w1, 1
-	mov	w0, w28
-	bl	gc_add_sblk
-.L2237:
-	add	w3, w28, 1
-	and	w28, w3, 65535
-	b	.L2234
-.L2235:
-	cmp	w1, 96
-	bne	.L2238
-	add	w20, w20, 1
-	and	w20, w20, 65535
-	b	.L2268
-.L2238:
-	cmp	w1, 160
-	bne	.L2240
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	add	w21, w21, 1
-	and	w21, w21, 65535
-	ldrh	w1, [x0, x19, lsl 1]
-	cmp	w1, 15
-	bls	.L2241
-	adrp	x0, .LANCHOR68
-	ldrh	w0, [x0, #:lo12:.LANCHOR68]
-	b	.L2265
-.L2240:
-	cbnz	w1, .L2237
-	ands	w0, w0, 24
-	bne	.L2242
-	add	w25, w25, 1
-	and	w25, w25, 65535
-.L2243:
-	ldr	x0, [x26, #:lo12:.LANCHOR56]
-	lsl	x19, x19, 1
-	ldrh	w2, [x0, x19]
-	cbz	w2, .L2245
-	str	x4, [x29, 104]
-	mov	w1, w28
-	mov	x0, x27
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
 	bl	printf
-	ldr	x4, [x29, 104]
-	ldrb	w0, [x4, 2]
-	tbz	x0, 4, .L2246
-	mov	w1, 5
-.L2263:
-	bfi	w0, w1, 5, 3
-	strb	w0, [x4, 2]
-	mov	w2, 0
-	mov	w1, 1
-	mov	w0, w28
-	bl	gc_add_sblk
-	bl	vpn_check
-.L2245:
-	adrp	x0, .LANCHOR56
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x19]
-	cbz	w0, .L2237
-	adrp	x1, .LANCHOR159
-	adrp	x0, .LC0
-	mov	w2, 1202
-	add	x1, x1, :lo12:.LANCHOR159
-	add	x0, x0, :lo12:.LC0
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
+	ldrh	w5, [x1, 58]
+	ldrh	w4, [x1, 54]
+	ldrb	w3, [x1, 53]
+	ldrh	w2, [x1, 50]
+	ldrh	w1, [x1, 48]
 	bl	printf
-.L2248:
-	b	.L2248
-.L2242:
-	cmp	w0, 16
-	bne	.L2244
-	add	w24, w24, 1
-	and	w24, w24, 65535
-	b	.L2243
-.L2244:
-	add	w23, w23, 1
-	and	w23, w23, 65535
-	b	.L2243
-.L2246:
-	mov	w1, 2
-	b	.L2263
-	.size	ftl_info_check, .-ftl_info_check
-	.section	.text.gc_scan_src_blk,"ax",@progbits
+	ldr	x1, [x19, #:lo12:.LANCHOR5]
+	adrp	x19, .LANCHOR72
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	ldrh	w5, [x1, 90]
+	ldrh	w4, [x1, 86]
+	ldrb	w3, [x1, 85]
+	ldrh	w2, [x1, 82]
+	ldrh	w1, [x1, 80]
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	mov	w2, 4
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR105
+	ldr	x1, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LC95
+	lsl	w3, w3, 1
+	add	x0, x0, :lo12:.LC95
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR4
+	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	mov	w2, 2
+	ldr	x1, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
+	bl	rknand_print_hex
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	mov	w3, 32
+	mov	w2, 4
+	adrp	x0, .LC89
+	add	x1, x1, 704
+	add	x0, x0, :lo12:.LC89
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR3
+	ldrh	w3, [x21, #:lo12:.LANCHOR2]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
+	bl	rknand_print_hex
+	mov	w3, 256
+	mov	w2, 2
+	adrp	x1, .LANCHOR104
+	adrp	x0, .LC98
+	add	x1, x1, :lo12:.LANCHOR104
+	add	x0, x0, :lo12:.LC98
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	mov	w2, 2
+	ldrh	w3, [x20, #:lo12:.LANCHOR80]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR106
+	ldp	x29, x30, [sp], 48
+	lsl	w3, w3, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR106]
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
+	b	rknand_print_hex
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",@progbits
 	.align	2
-	.global	gc_scan_src_blk
-	.type	gc_scan_src_blk, %function
-gc_scan_src_blk:
-	stp	x29, x30, [sp, -96]!
-	mov	w0, 65535
+	.global	pm_ppa_update_check
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	adrp	x3, .LANCHOR96
+	mov	w4, 21
+	ldrh	w3, [x3, #:lo12:.LANCHOR96]
+	sub	w5, w4, w3
+	mov	w4, 1
+	lsr	w3, w2, w3
+	lsl	w4, w4, w5
+	sub	w4, w4, #1
+	and	w4, w4, w3
+	adrp	x3, .LANCHOR95
+	ldrb	w3, [x3, #:lo12:.LANCHOR95]
+	udiv	w4, w4, w3
+	adrp	x3, .LANCHOR3
+	ldr	x3, [x3, #:lo12:.LANCHOR3]
+	add	x4, x3, x4, uxth 2
+	ldrb	w3, [x4, 2]
+	ubfx	x3, x3, 5, 3
+	cmp	w3, 1
+	ccmp	w3, 7, 4, ne
+	bne	.L2139
+	stp	x29, x30, [sp, -16]!
+	mov	w3, w2
+	mov	w2, w1
+	mov	x1, x0
+	add	x29, sp, 0
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
+	bl	printf
+	bl	dump_ftl_info
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L2139:
+	mov	w0, 0
+	ret
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 65535
+	cmp	w1, 31
 	add	x29, sp, 0
 	stp	x19, x20, [sp, 16]
-	adrp	x19, .LANCHOR58
 	stp	x21, x22, [sp, 32]
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	stp	x23, x24, [sp, 48]
-	stp	x25, x26, [sp, 64]
-	cmp	w1, w0
-	bne	.L2270
-	adrp	x1, .LANCHOR160
+	str	x23, [sp, 48]
+	bls	.L2145
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 880
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 30
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2271:
-	b	.L2271
-.L2270:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2272
-	adrp	x2, .LANCHOR56
-	ubfiz	x0, x1, 1, 16
-	ldr	x2, [x2, #:lo12:.LANCHOR56]
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC125
-	add	x0, x0, :lo12:.LC125
+.L2146:
+	b	.L2146
+.L2145:
+	adrp	x23, .LANCHOR53
+	and	w19, w0, 65535
+	ldr	x0, [x23, #:lo12:.LANCHOR53]
+	ldrh	w2, [x0, 698]
+	cmp	w2, w19
+	bcs	.L2147
+	mov	w1, w19
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
 	bl	printf
-.L2272:
-	ldrh	w0, [x19, #:lo12:.LANCHOR58]
-	add	x13, x19, :lo12:.LANCHOR58
-	add	x1, x13, 40
-	bl	ftl_get_blk_list_in_sblk
-	and	w1, w0, 255
-	strb	w1, [x13, 5]
-	cbnz	w1, .L2273
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR58]
-.L2309:
+	adrp	x0, .LANCHOR173
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	mov	x0, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR53]
+	ldrh	w0, [x0, 698]
+	cmp	w0, w19
+	bcs	.L2151
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 34
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2149:
+	b	.L2149
+.L2147:
+	add	x0, x0, x19, sxtw 2
+	sbfiz	x1, x1, 4, 32
+	ldr	w21, [x0, 704]
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
+	add	x22, x0, x1
+	strh	w19, [x0, x1]
+	strh	wzr, [x22, 2]
+	cbnz	w21, .L2150
+	adrp	x0, .LANCHOR173
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR173]
+	ldr	x0, [x22, 8]
+	bl	ftl_memset
+.L2151:
 	mov	w0, 0
-.L2269:
+	ldr	x23, [sp, 48]
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x29, x30, [sp], 96
+	ldp	x29, x30, [sp], 64
 	ret
-.L2273:
-	adrp	x1, .LANCHOR59
-	ldrh	w3, [x19, #:lo12:.LANCHOR58]
-	ldr	x1, [x1, #:lo12:.LANCHOR59]
-	mov	x2, x3
-	add	x1, x1, x3, lsl 2
-	ldrb	w1, [x1, 2]
-	and	w1, w1, 224
-	cmp	w1, 32
-	beq	.L2275
-	cmp	w1, 224
-	beq	.L2275
-	cbz	w1, .L2276
-	adrp	x3, .LANCHOR60
-	ldr	x3, [x3, #:lo12:.LANCHOR60]
-	ldrh	w4, [x3, 16]
-	cmp	w4, w2
-	beq	.L2275
-	ldrh	w4, [x3, 48]
-	cmp	w4, w2
-	beq	.L2275
-	ldrh	w3, [x3, 80]
-	cmp	w3, w2
-	bne	.L2307
-.L2275:
-	add	x0, x19, :lo12:.LANCHOR58
-	mov	w1, -1
-	strh	w1, [x19, #:lo12:.LANCHOR58]
-	strh	wzr, [x0, 24]
-	b	.L2309
-.L2276:
-	adrp	x0, .LANCHOR56
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, x3, lsl 1]
-	cbz	w0, .L2275
-	adrp	x1, .LANCHOR160
-	adrp	x0, .LC0
-	mov	w2, 900
-	add	x1, x1, :lo12:.LANCHOR160
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2278:
-	b	.L2278
-.L2307:
-	and	w0, w0, 255
-	sub	w0, w0, #1
-	add	x0, x13, x0, sxtw 1
-	ldrh	w3, [x0, 40]
-	mov	w0, 65535
-	cmp	w3, w0
-	bne	.L2279
-	adrp	x1, .LANCHOR160
-	adrp	x0, .LC0
-	mov	w2, 908
-	add	x1, x1, :lo12:.LANCHOR160
-	add	x0, x0, :lo12:.LC0
+.L2150:
+	adrp	x20, .LANCHOR165
+	adrp	x0, .LANCHOR52
+	ldr	x1, [x22, 8]
+	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	mov	w0, w21
+	ldr	x2, [x20, #:lo12:.LANCHOR165]
+	bl	ftl_read_ppa_page
+	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	ldr	w2, [x1]
+	cmp	w2, w19
+	beq	.L2152
+	mov	w4, w21
+	mov	w3, w0
+	mov	w1, w19
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
 	bl	printf
-.L2280:
-	b	.L2280
-.L2279:
-	adrp	x4, .LANCHOR75
-	adrp	x2, .LANCHOR79
-	cmp	w1, 160
-	mov	x24, x2
-	ldrh	w20, [x4, #:lo12:.LANCHOR75]
-	adrp	x21, .LANCHOR68
-	ldrh	w0, [x2, #:lo12:.LANCHOR79]
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-	mul	w20, w20, w3
-	bne	.L2294
-	adrp	x1, .LANCHOR64
-	ldrb	w1, [x1, #:lo12:.LANCHOR64]
-	and	w22, w1, 65535
-	cmp	w1, 2
-	orr	w20, w20, w1, lsl 24
-	bne	.L2281
-	ldrh	w0, [x21, #:lo12:.LANCHOR68]
-	mov	w22, 2
-	sub	w0, w0, #1
-	and	w0, w0, 65535
-.L2281:
-	add	x23, x19, :lo12:.LANCHOR58
-	orr	w20, w0, w20
+	ldr	x1, [x23, #:lo12:.LANCHOR53]
+	mov	w2, 4
+	adrp	x0, .LC103
+	add	x0, x0, :lo12:.LC103
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldr	x1, [x22, 8]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC104
+	add	x0, x0, :lo12:.LC104
+	bl	rknand_print_hex
+	ldr	x1, [x20, #:lo12:.LANCHOR165]
+	mov	w2, 4
+	mov	w3, 16
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR96
+	ldrh	w2, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w1, w0, w2
 	mov	w0, 1
-	strb	w22, [x23, 6]
-	strh	wzr, [x23, 2]
-	strb	wzr, [x23, 4]
-	strh	wzr, [x23, 26]
-	bl	buf_alloc
-	str	w20, [x0, 40]
-	adrp	x20, .LANCHOR69
-	mov	x25, x0
-	mov	w1, 1
-	bl	sblk_read_page
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	adrp	x21, .LANCHOR61
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	mov	w1, 255
-	mul	w2, w2, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR61]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	strh	wzr, [x23, 24]
-	ldr	w0, [x25, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2282
-.L2284:
-	mov	w0, -1
-	b	.L2269
-.L2294:
-	mov	w22, 1
-	b	.L2281
-.L2282:
-	ldr	x0, [x25, 24]
-	mov	w23, 15555
-	movk	w23, 0xf55f, lsl 16
-	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2283
-	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	lsr	w21, w21, w2
+	lsl	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	sub	w0, w0, #1
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	and	w0, w0, w21
 	mov	x1, 0
+	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	x0, [x25, 24]
+.L2152:
+	ldr	x0, [x20, #:lo12:.LANCHOR165]
 	ldr	w0, [x0]
-	cmp	w0, w23
-	beq	.L2284
-	adrp	x1, .LANCHOR160
+	cmp	w19, w0
+	beq	.L2151
+	adrp	x1, .LANCHOR172
 	adrp	x0, .LC0
-	mov	w2, 937
-	add	x1, x1, :lo12:.LANCHOR160
+	mov	w2, 55
+	add	x1, x1, :lo12:.LANCHOR172
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2285:
-	b	.L2285
-.L2283:
-	ldrh	w0, [x24, #:lo12:.LANCHOR79]
-	adrp	x23, .LANCHOR70
-	ldrb	w20, [x20, #:lo12:.LANCHOR69]
-	add	x23, x23, :lo12:.LANCHOR70
-	ldr	x24, [x25, 8]
-	mov	x26, 0
-	mul	w20, w20, w0
-	mul	w20, w22, w20
-	adrp	x22, .LANCHOR71
-	add	x22, x22, :lo12:.LANCHOR71
-	and	w20, w20, 65535
-.L2286:
-	cmp	w20, w26
-	bgt	.L2291
-	mov	x0, x25
-	bl	buf_free
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	adrp	x20, .LANCHOR56
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x3, [x20, #:lo12:.LANCHOR56]
-	ubfiz	x2, x1, 1, 16
-	ldrh	w2, [x3, x2]
-	ldrh	w3, [x0, 24]
-	cmp	w2, w3
-	beq	.L2292
-	adrp	x0, .LC126
-	add	x0, x0, :lo12:.LC126
-	bl	printf
-.L2292:
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
-	ldrh	w0, [x0, 24]
-	ldrh	w1, [x1, x2, lsl 1]
+.L2153:
+	b	.L2153
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",@progbits
+	.align	2
+	.global	pm_gc
+	.type	pm_gc, %function
+pm_gc:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR53
+	adrp	x20, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	stp	x23, x24, [sp, 48]
+	ldrh	w1, [x0, 688]
+	ldrh	w0, [x20, #:lo12:.LANCHOR127]
+	str	x25, [sp, 64]
+	sub	w0, w0, #1
 	cmp	w1, w0
-	bcs	.L2293
-	bl	vpn_check
-.L2293:
-	add	x0, x19, :lo12:.LANCHOR58
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
-	ldrh	w3, [x0, 24]
-	strh	w3, [x1, x2, lsl 1]
-	strh	wzr, [x0, 28]
-	ldrh	w0, [x0, 24]
-	b	.L2269
-.L2291:
-	ldr	w0, [x24, x26, lsl 2]
-	cmn	w0, #1
-	beq	.L2288
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 92]
-	cmn	w0, #1
-	bne	.L2289
-	ldr	w0, [x24, x26, lsl 2]
-	mov	w2, 0
-	add	x1, x29, 92
-	bl	pm_log2phys
-.L2289:
-	ldrh	w1, [x22]
+	blt	.L2157
+	bl	pm_free_sblk
+	ldr	x2, [x19, #:lo12:.LANCHOR53]
+	ldrh	w1, [x20, #:lo12:.LANCHOR127]
+	sub	w1, w1, #1
+	ldrh	w3, [x2, 688]
+	cmp	w3, w1
+	blt	.L2157
+	add	x0, x2, x0, uxth 1
+	mov	w23, 65535
+	ldrh	w20, [x0, 416]
+	cmp	w20, w23
+	bne	.L2159
+	adrp	x1, .LANCHOR174
+	adrp	x0, .LC0
+	mov	w2, 127
+	add	x1, x1, :lo12:.LANCHOR174
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2160:
+	b	.L2160
+.L2159:
+	bl	pm_select_ram_region
+	and	x24, x0, 65535
+	adrp	x1, .LANCHOR117
+	lsl	x0, x24, 4
+	add	x2, x1, :lo12:.LANCHOR117
+	mov	x22, x19
+	add	x19, x2, x0
+	mov	x21, x24
+	ldrh	w0, [x2, x0]
+	cmp	w0, w23
+	mov	x23, x1
+	beq	.L2161
+	ldr	x1, [x19, 8]
+	cbz	x1, .L2161
+	ldrsh	w2, [x19, 2]
+	tbz	w2, #31, .L2161
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+.L2161:
+	add	x1, x23, :lo12:.LANCHOR117
+	adrp	x25, .LANCHOR96
+	add	x24, x1, x24, lsl 4
+	add	x25, x25, :lo12:.LANCHOR96
+	mov	w19, 0
+.L2162:
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldrh	w0, [x1, 698]
+	cmp	w0, w19
+	bhi	.L2164
+	bl	pm_free_sblk
+.L2157:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2164:
+	add	x1, x1, x19, sxtw 2
+	ldrh	w3, [x25]
 	mov	w0, 21
-	ldr	w3, [x29, 92]
-	sub	w2, w0, w1
+	sub	w2, w0, w3
 	mov	w0, 1
+	ldr	w1, [x1, 704]
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
-	lsr	w1, w3, w1
+	lsr	w1, w1, w3
 	and	w0, w0, w1
-	ldrb	w1, [x23]
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	adrp	x1, .LANCHOR95
+	ldrb	w1, [x1, #:lo12:.LANCHOR95]
 	udiv	w0, w0, w1
-	add	x1, x19, :lo12:.LANCHOR58
-	cmp	w0, w2
-	bne	.L2288
-	ldrh	w0, [x1, 24]
-	ldr	x4, [x21, #:lo12:.LANCHOR61]
-	ubfiz	x2, x0, 2, 16
-	add	w0, w0, 1
-	str	w3, [x4, x2]
-	strh	w0, [x1, 24]
-.L2288:
-	add	x26, x26, 1
-	b	.L2286
-	.size	gc_scan_src_blk, .-gc_scan_src_blk
-	.section	.text.ftl_scan_all_data,"ax",@progbits
+	cmp	w20, w0, uxth
+	bne	.L2163
+	mov	w1, w21
+	mov	w0, w19
+	bl	load_l2p_region
+	ldr	x1, [x24, 8]
+	mov	w0, w19
+	bl	pm_write_page
+.L2163:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2162
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",@progbits
 	.align	2
-	.global	ftl_scan_all_data
-	.type	ftl_scan_all_data, %function
-ftl_scan_all_data:
-	sub	sp, sp, #160
+	.global	pm_flush_id
+	.type	pm_flush_id, %function
+pm_flush_id:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 16
+	adrp	x2, .LANCHOR117
+	add	x2, x2, :lo12:.LANCHOR117
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	add	x19, x2, x0
+	ldrh	w0, [x2, x0]
+	ldr	x1, [x19, 8]
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+	adrp	x19, .LANCHOR115
+	ldr	w0, [x19, #:lo12:.LANCHOR115]
+	cbz	w0, .L2170
+	bl	pm_gc
+	str	wzr, [x19, #:lo12:.LANCHOR115]
+.L2170:
 	mov	w0, 0
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	stp	x19, x20, [sp, 32]
-	mov	w20, 0
-	stp	x23, x24, [sp, 64]
-	adrp	x23, .LANCHOR47
-	stp	x27, x28, [sp, 96]
-	add	x28, x23, :lo12:.LANCHOR47
-	stp	x21, x22, [sp, 48]
-	adrp	x24, .LC129
-	stp	x25, x26, [sp, 80]
-	bl	buf_alloc
-	mov	w1, 0
-	mov	x19, x0
-	adrp	x0, .LC127
-	add	x0, x0, :lo12:.LC127
-	bl	printf
-	add	x0, x24, :lo12:.LC129
-	str	x0, [x29, 120]
-.L2311:
-	ldr	w0, [x23, #:lo12:.LANCHOR47]
-	cmp	w20, w0
-	bcc	.L2324
-	mov	x0, x19
-	bl	buf_free
-	ldp	x29, x30, [sp, 16]
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	add	sp, sp, 160
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
 	ret
-.L2324:
-	mov	w0, -1
-	str	w0, [x19, 36]
-	tst	x20, 4095
-	bne	.L2312
-	ldr	w2, [x29, 140]
-	adrp	x0, .LC128
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC128
-	bl	printf
-.L2312:
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2313
-	mov	w2, 0
-	add	x1, x29, 140
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",@progbits
+	.align	2
+	.global	pm_flush
+	.type	pm_flush, %function
+pm_flush:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR117
+	add	x19, x19, :lo12:.LANCHOR117
+	mov	w20, 0
+	add	x19, x19, 2
+.L2177:
+	ldrsh	w0, [x19]
+	tbz	w0, #31, .L2176
 	mov	w0, w20
-	bl	pm_log2phys
-.L2313:
-	ldr	w0, [x29, 140]
-	stp	w0, w0, [x19, 40]
-	cmn	w0, #1
-	bne	.L2314
-.L2316:
+	bl	pm_flush_id
+.L2176:
 	add	w20, w20, 1
-	b	.L2311
-.L2314:
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w3, [x19, 52]
-	ldr	x0, [x19, 24]
-	cmp	w3, 256
-	ccmn	w3, #1, 4, ne
-	beq	.L2315
-	ldr	w1, [x0, 4]
-	cmp	w20, w1
-	beq	.L2316
-.L2315:
-	ldr	x1, [x19, 8]
-	add	x27, x24, :lo12:.LC129
-	adrp	x25, .LANCHOR45
-	adrp	x26, .LC130
-	adrp	x22, .LANCHOR93
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	bl	printf
-	ldr	x1, [x19, 24]
-	ldr	w0, [x1, 8]
-	cmn	w0, #1
-	bne	.L2317
-.L2319:
-	ldrb	w21, [x25, #:lo12:.LANCHOR45]
-	mov	w0, w20
-	bl	lpa_hash_get_ppa
-	add	x22, x22, :lo12:.LANCHOR93
-	mov	w4, w0
-	add	x0, x26, :lo12:.LC130
-	lsl	w27, w21, 7
-	ubfiz	w3, w21, 7, 9
-	sub	w3, w3, #1
-	add	x21, x22, 8
-	and	w3, w3, w20
-	adrp	x26, .LC132
-	sdiv	w27, w20, w27
-	and	w3, w3, 65535
-	add	x22, x22, 520
-	add	x26, x26, :lo12:.LC132
-	mov	w1, w20
-	and	w25, w27, 65535
-	mov	w2, w25
-	bl	printf
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w20
-	bl	pm_log2phys
-.L2318:
-	ldr	x1, [x21]
-	cbz	x1, .L2323
-	ldrh	w0, [x21, -8]
-	cmp	w0, w25
-	bne	.L2323
-	mov	w3, 4096
-	mov	w2, 4
-	mov	x0, x26
-	bl	rknand_print_hex
-.L2323:
-	add	x21, x21, 16
-	cmp	x22, x21
-	bne	.L2318
-	b	.L2316
-.L2317:
-	ldr	w21, [x1, 4]
-	ldr	w1, [x28]
-	cmp	w21, w1
-	bcs	.L2319
-	str	w0, [x19, 40]
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w20
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	mov	x0, x27
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
+	add	x19, x19, 16
+	and	w20, w20, 65535
+	cmp	w20, 32
+	bne	.L2177
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",@progbits
+	.align	2
+	.global	flt_sys_flush
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	zftl_flash_de_init
+	bl	flt_sys_flush
+	ldp	x29, x30, [sp], 16
+	b	zftl_flash_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.zftl_deinit,"ax",@progbits
+	.align	2
+	.global	zftl_deinit
+	.type	zftl_deinit, %function
+zftl_deinit:
+	b	rk_ftl_de_init
+	.size	zftl_deinit, .-zftl_deinit
+	.section	.text.pm_init,"ax",@progbits
+	.align	2
+	.global	pm_init
+	.type	pm_init, %function
+pm_init:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR115
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR117
+	stp	x25, x26, [sp, 64]
+	add	x19, x20, :lo12:.LANCHOR117
+	str	wzr, [x0, #:lo12:.LANCHOR115]
+	mov	w0, 64
+	stp	x27, x28, [sp, 80]
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR165
+	adrp	x22, .LANCHOR52
+	add	x23, x19, 512
+	mov	x21, x1
+	add	x22, x22, :lo12:.LANCHOR52
+	str	x0, [x1, #:lo12:.LANCHOR165]
+	mov	w25, -1
+.L2187:
+	strh	w25, [x19]
+	strh	wzr, [x19, 2]
+	cbz	w24, .L2186
+	ldrb	w0, [x22]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, 8]
+.L2186:
+	add	x19, x19, 16
+	cmp	x19, x23
+	bne	.L2187
+	add	x0, x20, :lo12:.LANCHOR117
+	adrp	x19, .LANCHOR53
+	ldr	x24, [x21, #:lo12:.LANCHOR165]
+	mov	w4, 4
+	ldr	x25, [x0, 8]
+	mov	x3, x24
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	x2, x25
+	ldrh	w1, [x0, 692]
+	ldrb	w0, [x0, 694]
+	bl	flash_get_last_written_page
+	sxth	w26, w0
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	w23, w26
+	ldrh	w2, [x0, 696]
+	cmp	w2, w26
+	bgt	.L2188
+	ldrh	w1, [x0, 692]
+	mov	w3, w26
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
+	adrp	x27, .LANCHOR99
+	adrp	x28, .LANCHOR52
+	add	x27, x27, :lo12:.LANCHOR99
+	add	x28, x28, :lo12:.LANCHOR52
 	bl	printf
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2320
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w21
-	bl	pm_log2phys
-.L2320:
-	ldr	w0, [x29, 140]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	ldrsh	w21, [x0, 696]
+.L2189:
+	cmp	w21, w26
+	ble	.L2191
+	adrp	x0, .LANCHOR157
 	mov	w1, 1
-	str	w0, [x19, 40]
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	x1, [x19, 8]
-	ldr	x0, [x19, 24]
-	ldr	w2, [x1, 4]
-	str	w2, [sp, 8]
-	ldr	w1, [x1]
-	str	w1, [sp]
-	mov	w1, w21
-	ldp	w4, w5, [x0]
-	ldp	w6, w7, [x0, 8]
-	ldr	w2, [x19, 40]
-	ldr	w3, [x19, 52]
-	ldr	x0, [x29, 120]
-	bl	printf
-	ldrb	w3, [x25, #:lo12:.LANCHOR45]
-	mov	w0, w21
-	str	w3, [x29, 104]
-	lsl	w2, w3, 7
-	udiv	w2, w21, w2
-	and	w27, w2, 65535
-	str	w2, [x29, 112]
-	bl	lpa_hash_get_ppa
+	add	x20, x20, :lo12:.LANCHOR117
+	add	w23, w23, 1
+	strb	w1, [x0, #:lo12:.LANCHOR157]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	strh	w23, [x0, 696]
+	bl	pm_free_sblk
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+.L2188:
+	bl	pm_free_sblk
+	bl	pm_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2191:
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	mov	x3, x24
+	ldrh	w1, [x27]
+	mov	x2, x25
+	ldrb	w4, [x28]
+	ldrh	w22, [x0, 692]
+	ldrb	w0, [x0, 694]
+	madd	w22, w22, w1, w21
+	mov	w1, w22
+	bl	flash_read_page_en
 	mov	w4, w0
-	ldr	w3, [x29, 104]
-	mov	w1, w21
-	ldr	w2, [x29, 112]
-	add	x0, x26, :lo12:.LC130
-	ubfiz	w3, w3, 7, 9
-	and	w2, w2, 65535
-	sub	w3, w3, #1
-	and	w3, w3, w21
-	and	w3, w3, 65535
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
+	str	w4, [x29, 108]
+	mov	w2, w22
+	ldr	w1, [x0, 48]
+	ldrh	w3, [x0, 694]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	adrp	x0, .LC107
+	add	x0, x0, :lo12:.LC107
+	ldr	w1, [x24]
+	bl	printf
+	ldr	w4, [x29, 108]
+	cmp	w4, 512
+	ccmn	w4, #1, 4, ne
+	beq	.L2190
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
+	ldr	w0, [x24]
+	ldrh	w2, [x1, 698]
+	cmp	w0, w2
+	bcs	.L2190
+	add	x0, x1, x0, uxtw 2
+	str	w22, [x0, 704]
+.L2190:
+	add	w21, w21, 1
+	sxth	w21, w21
+	b	.L2189
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",@progbits
+	.align	2
+	.global	pm_log2phys
+	.type	pm_log2phys, %function
+pm_log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
+	adrp	x1, .LANCHOR52
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR52]
+	stp	x23, x24, [sp, 48]
+	mov	w23, w2
+	lsl	w21, w1, 7
+	ubfiz	w20, w1, 7, 9
+	adrp	x1, .LANCHOR54
+	udiv	w21, w0, w21
+	ldr	w2, [x1, #:lo12:.LANCHOR54]
+	cmp	w0, w2
+	and	w25, w21, 65535
+	msub	w20, w25, w20, w0
+	bcc	.L2201
+	mov	w1, w0
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
 	bl	printf
+	mov	w0, -1
+.L2200:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2201:
+	adrp	x24, .LANCHOR117
+	add	x0, x24, :lo12:.LANCHOR117
+	and	x20, x20, 65535
+	add	x0, x0, 8
+	mov	x19, 0
+.L2207:
+	ldr	x1, [x0]
+	cbz	x1, .L2203
+	ldrh	w1, [x0, -8]
+	cmp	w1, w25
+	bne	.L2203
+.L2204:
+	cbnz	w23, .L2205
+	add	x0, x24, :lo12:.LANCHOR117
+	add	x0, x0, x19, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x22]
+.L2206:
+	add	x24, x24, :lo12:.LANCHOR117
+	add	x19, x24, x19, lsl 4
+	ldrh	w0, [x19, 2]
+	mvn	x1, x0
+	tst	x1, 32767
+	beq	.L2209
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L2209:
+	mov	w0, 0
+	b	.L2200
+.L2205:
+	add	x0, x24, :lo12:.LANCHOR117
+	ldr	w2, [x22]
+	add	x0, x0, x19, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x20, lsl 2]
+	ldrh	w1, [x0, 2]
+	orr	w1, w1, -32768
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR118
+	strb	w21, [x0, #:lo12:.LANCHOR118]
+	b	.L2206
+.L2203:
+	add	w19, w19, 1
+	add	x0, x0, 16
+	and	x19, x19, 65535
+	cmp	w19, 32
+	bne	.L2207
+	bl	pm_select_ram_region
+	and	x19, x0, 65535
+	sbfiz	x1, x19, 4, 32
+	add	x2, x24, :lo12:.LANCHOR117
+	add	x3, x2, x1
+	mov	w26, w0
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L2208
+	ldrsh	w1, [x3, 2]
+	tbz	w1, #31, .L2208
+	bl	pm_flush_id
+.L2208:
+	adrp	x0, .LANCHOR175
+	mov	w1, w26
+	strb	w19, [x0, #:lo12:.LANCHOR175]
+	mov	w0, w25
+	bl	load_l2p_region
+	b	.L2204
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.ftl_read_ahead,"ax",@progbits
+	.align	2
+	.global	ftl_read_ahead
+	.type	ftl_read_ahead, %function
+ftl_read_ahead:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR56
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x20, #:lo12:.LANCHOR56]
+	stp	x23, x24, [sp, 48]
+	cmn	w0, #1
+	beq	.L2216
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w0, -1
+	cbz	x19, .L2215
+	ldr	w21, [x20, #:lo12:.LANCHOR56]
+	str	w21, [x19, 36]
+	str	w0, [x20, #:lo12:.LANCHOR56]
 	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 76]
+	ldr	x20, [x19, 8]
+	cmn	w0, #1
+	ldr	x22, [x19, 24]
+	bne	.L2218
 	mov	w2, 0
-	add	x1, x29, 140
+	add	x1, x29, 76
+	mov	w0, w21
 	bl	pm_log2phys
-	add	x0, x22, :lo12:.LANCHOR93
-	adrp	x5, .LC131
-	add	x21, x0, 8
-	add	x4, x0, 520
-	add	x5, x5, :lo12:.LC131
-.L2322:
-	ldr	x1, [x21]
-	cbz	x1, .L2321
-	ldrh	w0, [x21, -8]
-	cmp	w0, w27
-	bne	.L2321
-	mov	x0, x5
-	stp	x4, x5, [x29, 104]
-	mov	w3, 4096
-	mov	w2, 4
-	bl	rknand_print_hex
-	ldp	x4, x5, [x29, 104]
-.L2321:
-	add	x21, x21, 16
-	cmp	x4, x21
-	bne	.L2322
-	b	.L2319
-	.size	ftl_scan_all_data, .-ftl_scan_all_data
+.L2218:
+	ldr	w0, [x29, 76]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L2219
+	adrp	x0, .LANCHOR52
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	mov	x0, x20
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+.L2216:
+	mov	w0, 0
+.L2215:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2219:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w23, [x19, 52]
+	cmn	w23, #1
+	bne	.L2220
+	ldrb	w0, [x19, 2]
+	and	w0, w0, -9
+	strb	w0, [x19, 2]
+	adrp	x0, .LANCHOR5
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+.L2221:
+	ldr	w5, [x22, 4]
+	cmp	w21, w5
+	beq	.L2222
+	ldrb	w1, [x19, 1]
+	adrp	x0, .LC110
+	ldr	w4, [x22]
+	mov	w2, w21
+	ldp	w6, w7, [x22, 8]
+	add	x0, x0, :lo12:.LC110
+	ldr	w3, [x29, 76]
+	bl	printf
+.L2222:
+	ldr	w0, [x22, 4]
+	cmp	w21, w0
+	bne	.L2223
+	cmn	w23, #1
+	bne	.L2216
+.L2223:
+	adrp	x1, .LANCHOR176
+	adrp	x0, .LC0
+	mov	w2, 821
+	add	x1, x1, :lo12:.LANCHOR176
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2224:
+	b	.L2224
+.L2220:
+	cmp	w23, 256
+	bne	.L2221
+	adrp	x0, .LANCHOR96
+	mov	w20, 21
+	mov	w24, 1
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	ldr	w0, [x29, 76]
+	sub	w20, w20, w1
+	ldp	w2, w3, [x19, 36]
+	lsr	w0, w0, w1
+	lsl	w20, w24, w20
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w20, w20, w0
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
+	and	w1, w20, 65535
+	bl	printf
+	mov	w2, 0
+	mov	w1, w24
+	mov	w0, w20
+	bl	gc_add_sblk
+	b	.L2221
+	.size	ftl_read_ahead, .-ftl_read_ahead
 	.section	.text.gc_recovery,"ax",@progbits
 	.align	2
 	.global	gc_recovery
 	.type	gc_recovery, %function
 gc_recovery:
 	sub	sp, sp, #240
-	adrp	x0, .LANCHOR67
+	adrp	x0, .LANCHOR70
 	stp	x29, x30, [sp, 32]
 	add	x29, sp, 32
 	stp	x21, x22, [sp, 64]
-	adrp	x21, .LANCHOR60
+	adrp	x21, .LANCHOR5
 	stp	x19, x20, [sp, 48]
-	ldr	x20, [x21, #:lo12:.LANCHOR60]
-	strb	wzr, [x0, #:lo12:.LANCHOR67]
-	adrp	x0, .LANCHOR104
+	ldr	x20, [x21, #:lo12:.LANCHOR5]
+	strb	wzr, [x0, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR130
 	stp	x23, x24, [sp, 80]
-	strb	wzr, [x0, #:lo12:.LANCHOR104]
+	strb	wzr, [x0, #:lo12:.LANCHOR130]
 	stp	x25, x26, [sp, 96]
 	stp	x27, x28, [sp, 112]
 	bl	gc_init
@@ -15061,8 +14433,8 @@ gc_recovery:
 	str	x0, [x29, 168]
 	mov	w0, 65535
 	cmp	w1, w0
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
-	beq	.L2335
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	beq	.L2231
 	mov	w1, -1
 	strh	w1, [x0, 130]
 	mov	w0, 1
@@ -15070,41 +14442,41 @@ gc_recovery:
 	mov	x27, x0
 	ldrb	w0, [x20, 89]
 	add	x1, x20, 80
-	adrp	x3, .LANCHOR75
-	adrp	x2, .LANCHOR64
+	adrp	x3, .LANCHOR99
+	adrp	x2, .LANCHOR67
 	sub	w0, w0, #1
 	str	x3, [x29, 128]
 	add	x0, x1, x0, sxtw 1
-	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	ldrh	w1, [x3, #:lo12:.LANCHOR99]
 	str	x2, [x29, 160]
 	ldrh	w0, [x0, 16]
 	mul	w1, w0, w1
-	ldrb	w0, [x2, #:lo12:.LANCHOR64]
+	ldrb	w0, [x2, #:lo12:.LANCHOR67]
 	str	w1, [x29, 200]
 	cmp	w0, 3
-	bne	.L2336
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	bne	.L2232
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	sub	w0, w0, #1
 	add	w0, w0, w1
 	orr	w0, w0, 50331648
-.L2383:
+.L2279:
 	str	w0, [x27, 40]
-.L2337:
+.L2233:
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	w0, [x27, 52]
 	cmp	w0, 512
 	ccmn	w0, #1, 4, ne
-	beq	.L2338
+	beq	.L2234
 	ldr	x0, [x27, 24]
 	ldr	w1, [x0]
 	mov	w0, 15555
 	movk	w0, 0xf55f, lsl 16
 	cmp	w1, w0
-	beq	.L2339
-.L2338:
+	beq	.L2235
+.L2234:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x1, [x27, 24]
@@ -15117,47 +14489,47 @@ gc_recovery:
 	str	w2, [sp]
 	ldp	w3, w4, [x0]
 	ldp	w5, w6, [x0, 8]
-	adrp	x0, .LC133
+	adrp	x0, .LC111
 	ldr	w7, [x1]
-	add	x0, x0, :lo12:.LC133
+	add	x0, x0, :lo12:.LC111
 	ldr	w1, [x27, 40]
 	ldr	w2, [x27, 52]
 	bl	printf
-.L2387:
-	adrp	x0, .LANCHOR56
+.L2283:
+	adrp	x0, .LANCHOR4
 	ldrh	w1, [x20, 80]
 	mov	w22, 0
-	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
 	strh	wzr, [x0, x1, lsl 1]
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w1, [x20, 80]
 	strh	w1, [x0, 130]
-.L2340:
+.L2236:
 	ldrh	w1, [x20, 80]
 	mov	w2, w22
-	adrp	x0, .LC138
-	add	x0, x0, :lo12:.LC138
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
 	bl	printf
 	mov	w0, -1
 	strh	w0, [x20, 80]
 	bl	pm_flush
 	bl	ftl_ext_info_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, 65535
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2369
+	beq	.L2265
 	bl	ftl_free_sblk
-.L2369:
-	adrp	x0, .LANCHOR46
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
+.L2265:
+	adrp	x0, .LANCHOR53
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
 	mov	w0, -1
 	strh	w0, [x1, 126]
-	ldr	x1, [x21, #:lo12:.LANCHOR60]
+	ldr	x1, [x21, #:lo12:.LANCHOR5]
 	strh	w0, [x1, 130]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2334:
+.L2230:
 	ldp	x19, x20, [sp, 48]
 	ldp	x21, x22, [sp, 64]
 	ldp	x23, x24, [sp, 80]
@@ -15166,80 +14538,64 @@ gc_recovery:
 	ldp	x29, x30, [sp, 32]
 	add	sp, sp, 240
 	ret
-.L2336:
+.L2232:
 	cmp	w0, 2
-	bne	.L2337
-	adrp	x0, .LANCHOR79
-	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	bne	.L2233
+	adrp	x0, .LANCHOR80
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
 	add	w0, w1, w0, lsl 1
 	sub	w0, w0, #1
 	orr	w0, w0, 33554432
-	b	.L2383
-.L2339:
-	adrp	x26, .LANCHOR68
-	adrp	x19, .LANCHOR69
-	adrp	x23, .LANCHOR107
+	b	.L2279
+.L2235:
+	adrp	x26, .LANCHOR71
+	adrp	x19, .LANCHOR72
+	adrp	x22, .LANCHOR131
 	ldr	x1, [x27, 8]
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	adrp	x22, .LANCHOR108
-	ldrh	w2, [x26, #:lo12:.LANCHOR68]
+	ldrb	w0, [x19, #:lo12:.LANCHOR72]
+	ldrh	w2, [x26, #:lo12:.LANCHOR71]
 	mul	w2, w2, w0
-	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	ldr	x0, [x22, #:lo12:.LANCHOR131]
 	lsl	w2, w2, 2
 	bl	ftl_memcpy
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x26, #:lo12:.LANCHOR68]
+	ldrb	w1, [x19, #:lo12:.LANCHOR72]
+	adrp	x19, .LANCHOR132
+	ldrh	w0, [x26, #:lo12:.LANCHOR71]
 	mul	w0, w0, w1
 	ldr	x1, [x27, 8]
 	lsl	w2, w0, 2
 	add	x1, x1, x0, sxtw 2
-	ldr	x0, [x22, #:lo12:.LANCHOR108]
+	ldr	x0, [x19, #:lo12:.LANCHOR132]
 	bl	ftl_memcpy
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 4
-	ldrh	w3, [x26, #:lo12:.LANCHOR68]
-	ldr	x1, [x23, #:lo12:.LANCHOR107]
-	mul	w3, w3, w0
-	adrp	x0, .LC134
-	add	x0, x0, :lo12:.LC134
-	bl	rknand_print_hex
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mov	w2, 4
-	ldrh	w3, [x26, #:lo12:.LANCHOR68]
-	ldr	x1, [x22, #:lo12:.LANCHOR108]
-	mul	w3, w3, w0
-	adrp	x0, .LC135
-	add	x0, x0, :lo12:.LC135
-	bl	rknand_print_hex
 	str	x26, [x29, 120]
-	adrp	x0, .LANCHOR79
-	stp	x22, x23, [x29, 144]
-	ldrh	w24, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR80
+	stp	x19, x22, [x29, 144]
+	ldrh	w24, [x0, #:lo12:.LANCHOR80]
 	ldr	x0, [x29, 160]
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
 	cmp	w0, 2
-	beq	.L2341
-.L2384:
+	beq	.L2237
+.L2280:
 	str	w0, [x29, 180]
-	adrp	x23, .LC136
+	adrp	x23, .LC112
 	ldr	x0, [x29, 128]
-	add	x23, x23, :lo12:.LC136
+	add	x23, x23, :lo12:.LC112
 	mov	w26, 0
 	mov	w22, 0
-	add	x0, x0, :lo12:.LANCHOR75
+	add	x0, x0, :lo12:.LANCHOR99
 	str	x0, [x29, 104]
-.L2343:
+.L2239:
 	sub	w0, w26, #1
 	str	w0, [x29, 184]
 	cmp	w26, w24
-	beq	.L2352
+	beq	.L2248
 	mov	x19, 0
-	b	.L2353
-.L2341:
+	b	.L2249
+.L2237:
 	lsl	w24, w24, 1
 	mov	w0, 1
-	b	.L2384
-.L2349:
+	b	.L2280
+.L2245:
 	ldr	x1, [x29, 104]
 	ldr	x0, [x29, 136]
 	ldrh	w1, [x1]
@@ -15249,32 +14605,32 @@ gc_recovery:
 	str	w0, [x29, 200]
 	ldrb	w1, [x1]
 	cmp	w1, 3
-	bne	.L2344
+	bne	.L2240
 	add	w0, w26, w0
 	orr	w0, w0, w25, lsl 24
-.L2385:
+.L2281:
 	str	w0, [x27, 40]
 	mov	w1, 1
 	mov	x0, x27
 	bl	sblk_read_page
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	ldr	w3, [x0, x28]
 	ldr	x0, [x27, 24]
 	ldr	w6, [x0, 4]
 	cmp	w3, w6
-	bne	.L2347
+	bne	.L2243
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	ldr	w2, [x1, x28]
 	ldr	w1, [x0, 8]
 	cmp	w2, w1
-	beq	.L2348
-.L2347:
+	beq	.L2244
+.L2243:
 	ldr	x1, [x29, 144]
 	ldr	w2, [x0, 12]
 	str	w2, [sp]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	ldr	w5, [x0]
 	ldr	w7, [x0, 8]
 	mov	x0, x23
@@ -15283,107 +14639,107 @@ gc_recovery:
 	ldr	w1, [x27, 40]
 	bl	printf
 	ldr	x0, [x29, 152]
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
 	ldr	w0, [x0, x28]
 	cmn	w0, #1
-	beq	.L2348
+	beq	.L2244
 	mov	x0, x27
 	bl	buf_free
-	b	.L2387
-.L2344:
+	b	.L2283
+.L2240:
 	cmp	w1, 2
-	bne	.L2346
+	bne	.L2242
 	ldr	w1, [x29, 184]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2385
-.L2346:
+	b	.L2281
+.L2242:
 	add	w0, w26, w0
-	b	.L2385
-.L2348:
+	b	.L2281
+.L2244:
 	add	w22, w22, 1
 	add	w25, w25, 1
 	add	x28, x28, 4
-.L2351:
+.L2247:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2349
+	bcs	.L2245
 	add	x19, x19, 1
-.L2353:
+.L2249:
 	ldr	x0, [x29, 168]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w19
-	ble	.L2350
+	ble	.L2246
 	add	x0, x20, x19, lsl 1
 	str	x0, [x29, 136]
 	ldr	x0, [x29, 160]
 	sbfiz	x28, x22, 2, 32
 	mov	w25, 1
-	add	x0, x0, :lo12:.LANCHOR64
+	add	x0, x0, :lo12:.LANCHOR67
 	str	x0, [x29, 112]
-	b	.L2351
-.L2350:
+	b	.L2247
+.L2246:
 	add	w26, w26, 1
-	b	.L2343
-.L2352:
+	b	.L2239
+.L2248:
 	mov	x0, x27
 	bl	buf_free
 	ldr	x3, [x29, 120]
-	adrp	x24, .LANCHOR56
+	adrp	x24, .LANCHOR4
 	ldr	x0, [x29, 168]
 	mov	w22, 0
 	ldrh	w2, [x20, 80]
 	mov	w23, 0
-	ldr	x1, [x24, #:lo12:.LANCHOR56]
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
 	mov	w27, 0
-	ldrh	w3, [x3, #:lo12:.LANCHOR68]
+	ldrh	w3, [x3, #:lo12:.LANCHOR71]
 	ldrb	w0, [x0, 9]
 	mul	w0, w0, w3
 	strh	w0, [x1, x2, lsl 1]
-	adrp	x0, .LANCHOR71
-	add	x0, x0, :lo12:.LANCHOR71
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
 	str	x0, [x29, 96]
-.L2354:
+.L2250:
 	sub	w0, w23, #1
 	str	w0, [x29, 120]
 	cmp	w26, w23
-	beq	.L2367
+	beq	.L2263
 	str	xzr, [x29, 184]
-	b	.L2368
-.L2364:
+	b	.L2264
+.L2260:
 	ldr	x1, [x29, 152]
 	sbfiz	x0, x27, 2, 32
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
 	ldr	w28, [x1, x0]
 	cmn	w28, #1
-	beq	.L2355
+	beq	.L2251
 	ldr	x1, [x29, 144]
-	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	x1, [x1, #:lo12:.LANCHOR132]
 	ldr	w0, [x1, x0]
 	str	w0, [x29, 136]
 	mov	w0, w28
 	bl	lpa_hash_get_ppa
 	str	w0, [x29, 204]
 	cmn	w0, #1
-	bne	.L2356
+	bne	.L2252
 	mov	w2, 0
 	add	x1, x29, 204
 	mov	w0, w28
 	bl	pm_log2phys
-.L2356:
+.L2252:
 	ldr	x0, [x29, 112]
 	ldr	x1, [x29, 128]
 	ldrh	w0, [x0, 96]
-	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	ldrh	w1, [x1, #:lo12:.LANCHOR99]
 	mul	w0, w0, w1
 	ldr	x1, [x29, 160]
-	ldrb	w1, [x1, #:lo12:.LANCHOR64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
 	cmp	w1, 3
-	bne	.L2357
+	bne	.L2253
 	add	w0, w23, w0
 	orr	w0, w0, w25, lsl 24
-.L2386:
+.L2282:
 	str	w0, [x29, 200]
 	mov	w19, 21
 	ldr	x0, [x29, 96]
@@ -15401,29 +14757,29 @@ gc_recovery:
 	ldr	w0, [x29, 204]
 	cmp	w1, w0
 	and	x19, x19, 65535
-	bne	.L2360
+	bne	.L2256
 	ldr	w2, [x29, 200]
 	mov	w1, w28
 	str	w4, [x29, 136]
-	adrp	x0, .LC137
-	add	x0, x0, :lo12:.LC137
+	adrp	x0, .LC113
+	add	x0, x0, :lo12:.LC113
 	bl	pm_ppa_update_check
 	ldr	w4, [x29, 136]
-	cbz	w0, .L2361
-.L2381:
-	b	.L2381
-.L2357:
+	cbz	w0, .L2257
+.L2277:
+	b	.L2277
+.L2253:
 	cmp	w1, 2
-	bne	.L2359
+	bne	.L2255
 	ldr	w1, [x29, 120]
 	add	w0, w0, w1
 	add	w0, w0, w25
 	orr	w0, w0, 33554432
-	b	.L2386
-.L2359:
+	b	.L2282
+.L2255:
 	add	w0, w23, w0
-	b	.L2386
-.L2361:
+	b	.L2282
+.L2257:
 	mov	w2, w4
 	add	x1, x29, 200
 	mov	w0, w28
@@ -15431,302 +14787,330 @@ gc_recovery:
 	add	w22, w22, 1
 	mov	w0, w19
 	bl	ftl_vpn_decrement
-.L2363:
-	adrp	x0, .LANCHOR59
+.L2259:
+	adrp	x0, .LANCHOR3
 	add	w27, w27, 1
-	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	ldr	x0, [x0, #:lo12:.LANCHOR3]
 	add	x0, x0, x19, lsl 2
 	ldrb	w0, [x0, 2]
 	tst	w0, 224
-	bne	.L2355
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	bne	.L2251
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	lsl	x19, x19, 1
 	ldrh	w1, [x0, x19]
-	cbz	w1, .L2355
+	cbz	w1, .L2251
 	strh	wzr, [x0, x19]
-.L2355:
+.L2251:
 	add	w25, w25, 1
-.L2366:
+.L2262:
 	ldr	w0, [x29, 180]
 	cmp	w0, w25
-	bcs	.L2364
+	bcs	.L2260
 	ldr	x0, [x29, 184]
 	add	x0, x0, 1
 	str	x0, [x29, 184]
-.L2368:
+.L2264:
 	ldr	x0, [x29, 168]
 	ldr	w1, [x29, 184]
 	ldrb	w0, [x0, 9]
 	cmp	w0, w1
-	ble	.L2365
+	ble	.L2261
 	ldr	x0, [x29, 184]
 	mov	w25, 1
 	add	x0, x20, x0, lsl 1
 	str	x0, [x29, 112]
-	adrp	x0, .LANCHOR70
-	add	x0, x0, :lo12:.LANCHOR70
+	adrp	x0, .LANCHOR95
+	add	x0, x0, :lo12:.LANCHOR95
 	str	x0, [x29, 104]
-	b	.L2366
-.L2360:
+	b	.L2262
+.L2256:
 	ldr	w1, [x29, 200]
 	cmp	w0, w1
 	cinc	w22, w22, eq
-	b	.L2363
-.L2365:
+	b	.L2259
+.L2261:
 	add	w23, w23, 1
-	b	.L2354
-.L2367:
+	b	.L2250
+.L2263:
 	ldrh	w1, [x20, 80]
-	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
 	strh	w22, [x0, x1, lsl 1]
-	b	.L2340
-.L2335:
+	b	.L2236
+.L2231:
 	ldrh	w0, [x0, 130]
 	cmp	w0, w1
-	beq	.L2334
-	adrp	x19, .LANCHOR46
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	beq	.L2230
+	adrp	x19, .LANCHOR53
+	ldr	x1, [x19, #:lo12:.LANCHOR53]
 	ldrh	w1, [x1, 126]
 	cmp	w1, w0
-	bne	.L2371
+	bne	.L2267
 	bl	pm_flush
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	ldrh	w0, [x0, 130]
 	bl	ftl_free_sblk
-	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x19, #:lo12:.LANCHOR53]
 	mov	w1, -1
 	strh	w1, [x0, 126]
 	mov	w0, 0
 	bl	ftl_info_flush
-.L2371:
-	ldr	x0, [x21, #:lo12:.LANCHOR60]
+.L2267:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
 	mov	w1, -1
 	strh	w1, [x0, 130]
-	b	.L2334
+	b	.L2230
 	.size	gc_recovery, .-gc_recovery
-	.section	.text.ftl_init,"ax",@progbits
+	.section	.text.zftl_init,"ax",@progbits
 	.align	2
-	.global	ftl_init
-	.type	ftl_init, %function
-ftl_init:
+	.global	zftl_init
+	.type	zftl_init, %function
+zftl_init:
 	stp	x29, x30, [sp, -64]!
-	adrp	x1, .LANCHOR42
+	adrp	x1, .LANCHOR49
 	mov	w0, -1
 	add	x29, sp, 0
-	strb	w0, [x1, #:lo12:.LANCHOR42]
-	adrp	x1, .LANCHOR43
+	strb	w0, [x1, #:lo12:.LANCHOR49]
+	adrp	x1, .LANCHOR50
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR79
-	strb	wzr, [x1, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR127
+	adrp	x20, .LANCHOR72
+	strb	wzr, [x1, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR151
 	stp	x21, x22, [sp, 32]
-	adrp	x19, .LANCHOR69
-	strb	w0, [x1, #:lo12:.LANCHOR127]
-	adrp	x0, .LANCHOR89
+	adrp	x19, .LANCHOR2
+	strb	w0, [x1, #:lo12:.LANCHOR151]
+	adrp	x0, .LANCHOR112
 	mov	w1, -1
-	stp	x23, x24, [sp, 48]
-	strb	wzr, [x0, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR49
-	adrp	x22, .LANCHOR54
-	adrp	x21, .LANCHOR149
-	str	w1, [x0, #:lo12:.LANCHOR49]
-	adrp	x1, .LC139
-	adrp	x0, .LC32
-	add	x1, x1, :lo12:.LC139
-	add	x0, x0, :lo12:.LC32
+	str	x23, [sp, 48]
+	strb	wzr, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR56
+	adrp	x21, .LANCHOR80
+	adrp	x22, .LANCHOR173
+	str	w1, [x0, #:lo12:.LANCHOR56]
+	adrp	x1, .LC115
+	adrp	x0, .LC42
+	add	x1, x1, :lo12:.LC115
+	add	x0, x0, :lo12:.LC42
 	bl	printf
-	adrp	x3, .LANCHOR19
-	add	x3, x3, :lo12:.LANCHOR19
-	adrp	x0, .LANCHOR64
-	adrp	x1, .LANCHOR45
-	adrp	x2, .LANCHOR68
-	adrp	x5, .LANCHOR70
-	ldrb	w7, [x3, 12]
-	strb	w7, [x0, #:lo12:.LANCHOR64]
-	ldrb	w0, [x3, 9]
-	strb	w0, [x1, #:lo12:.LANCHOR45]
-	ldrh	w1, [x3, 10]
-	strh	w1, [x2, #:lo12:.LANCHOR68]
-	adrp	x2, .LANCHOR8
-	ubfiz	w8, w0, 9, 7
-	strh	w8, [x21, #:lo12:.LANCHOR149]
-	ldrb	w4, [x2, #:lo12:.LANCHOR8]
-	adrp	x2, .LANCHOR76
-	sdiv	w7, w1, w7
-	strb	w4, [x2, #:lo12:.LANCHOR76]
-	ldrb	w2, [x3, 13]
-	strb	w2, [x5, #:lo12:.LANCHOR70]
-	ldrh	w5, [x3, 14]
-	adrp	x3, .LANCHOR13
-	strh	w7, [x20, #:lo12:.LANCHOR79]
-	mul	w4, w4, w2
-	ldrh	w6, [x3, #:lo12:.LANCHOR13]
-	adrp	x3, .LANCHOR75
-	strh	w5, [x22, #:lo12:.LANCHOR54]
-	and	w2, w4, 255
-	mov	w4, 1
-	strh	w6, [x3, #:lo12:.LANCHOR75]
-	mov	w3, 0
-	strb	w2, [x19, #:lo12:.LANCHOR69]
-.L2389:
-	cmp	w6, w4
-	bcs	.L2390
-	mul	w6, w0, w1
-	adrp	x4, .LANCHOR71
+	adrp	x2, .LANCHOR26
+	add	x2, x2, :lo12:.LANCHOR26
+	adrp	x0, .LANCHOR67
+	adrp	x1, .LANCHOR52
+	adrp	x6, .LANCHOR95
+	ldrb	w4, [x2, 12]
+	strb	w4, [x0, #:lo12:.LANCHOR67]
+	ldrb	w0, [x2, 9]
+	strb	w0, [x1, #:lo12:.LANCHOR52]
+	adrp	x1, .LANCHOR71
+	ldrh	w7, [x2, 10]
+	strh	w7, [x1, #:lo12:.LANCHOR71]
+	adrp	x1, .LANCHOR15
+	ubfiz	w10, w0, 9, 7
+	strh	w10, [x22, #:lo12:.LANCHOR173]
+	ldrb	w5, [x1, #:lo12:.LANCHOR15]
+	adrp	x1, .LANCHOR100
+	sdiv	w3, w7, w4
+	strb	w5, [x1, #:lo12:.LANCHOR100]
+	ldrb	w1, [x2, 13]
+	strb	w1, [x6, #:lo12:.LANCHOR95]
+	ldrh	w6, [x2, 14]
+	mov	w2, 0
+	strh	w3, [x21, #:lo12:.LANCHOR80]
+	mul	w5, w5, w1
+	adrp	x1, .LANCHOR20
+	strh	w6, [x19, #:lo12:.LANCHOR2]
+	and	w8, w5, 255
+	ldrh	w5, [x1, #:lo12:.LANCHOR20]
+	adrp	x1, .LANCHOR99
+	strb	w8, [x20, #:lo12:.LANCHOR72]
+	strh	w5, [x1, #:lo12:.LANCHOR99]
+	mov	w1, 1
+.L2285:
+	cmp	w5, w1
+	bcs	.L2286
+	adrp	x1, .LANCHOR96
+	sub	w2, w2, #1
+	adrp	x23, .LANCHOR161
+	mul	w3, w3, w8
+	strh	w2, [x1, #:lo12:.LANCHOR96]
+	mul	w2, w0, w7
 	mov	w1, 57344
-	sub	w3, w3, #1
 	movk	w1, 0x1c, lsl 16
-	strh	w3, [x4, #:lo12:.LANCHOR71]
-	adrp	x24, .LANCHOR137
-	adrp	x23, .LANCHOR60
-	mul	w4, w6, w5
-	mul	w1, w2, w1
-	lsr	w3, w4, 21
-	mul	w4, w4, w2
-	mul	w1, w1, w3
-	adrp	x3, .LANCHOR52
-	str	w1, [x3, #:lo12:.LANCHOR52]
+	mul	w5, w2, w6
+	mul	w1, w8, w1
+	mul	w2, w2, w8
+	lsr	w7, w5, 21
+	mul	w5, w5, w8
+	sub	w2, w2, #1
+	mul	w1, w1, w7
+	adrp	x7, .LANCHOR59
+	str	w1, [x7, #:lo12:.LANCHOR59]
 	add	w1, w1, 24576
-	adrp	x3, .LANCHOR161
+	adrp	x7, .LANCHOR177
 	udiv	w0, w1, w0
-	str	w4, [x3, #:lo12:.LANCHOR161]
-	adrp	x3, .LANCHOR162
-	str	w1, [x3, #:lo12:.LANCHOR162]
-	adrp	x3, .LANCHOR47
-	str	w0, [x3, #:lo12:.LANCHOR47]
-	sub	w3, w8, #1
-	add	w0, w3, w0, lsl 2
-	mul	w3, w7, w2
-	mul	w2, w6, w2
-	udiv	w0, w0, w8
+	str	w5, [x7, #:lo12:.LANCHOR177]
+	adrp	x5, .LANCHOR178
+	str	w1, [x5, #:lo12:.LANCHOR178]
+	adrp	x5, .LANCHOR54
 	udiv	w1, w1, w2
-	strh	w0, [x24, #:lo12:.LANCHOR137]
+	str	w0, [x5, #:lo12:.LANCHOR54]
+	sub	w5, w10, #1
+	add	w0, w5, w0, lsl 2
+	add	w1, w1, 8
+	udiv	w0, w0, w10
+	strh	w0, [x23, #:lo12:.LANCHOR161]
 	ubfiz	w0, w0, 4, 16
-	add	w1, w1, 2
 	sdiv	w0, w0, w3
-	adrp	x3, .LANCHOR101
-	strh	w0, [x3, #:lo12:.LANCHOR101]
-	adrp	x0, .LANCHOR163
-	strh	w1, [x0, #:lo12:.LANCHOR163]
-	add	w0, w5, w5, lsl 1
-	adrp	x1, .LANCHOR164
+	adrp	x3, .LANCHOR127
+	strh	w0, [x3, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR87
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR179
+	add	w0, w6, w6, lsl 1
 	asr	w0, w0, 2
-	strh	w0, [x1, #:lo12:.LANCHOR164]
-	lsr	w0, w5, 4
-	adrp	x1, .LANCHOR165
-	strh	w0, [x1, #:lo12:.LANCHOR165]
+	strh	w0, [x1, #:lo12:.LANCHOR179]
+	adrp	x1, .LANCHOR83
+	lsr	w0, w6, 4
+	cmp	w0, 79
+	strh	w0, [x1, #:lo12:.LANCHOR83]
+	bhi	.L2287
+	mov	w0, 80
+	strh	w0, [x1, #:lo12:.LANCHOR83]
+.L2287:
+	adrp	x1, .LANCHOR180
+	mov	w0, 4000
+	adrp	x3, .LANCHOR181
+	mov	w2, 1024
+	strh	w0, [x1, #:lo12:.LANCHOR180]
+	mov	w0, 50
+	strh	w0, [x3, #:lo12:.LANCHOR181]
+	adrp	x0, .LANCHOR126
+	mov	w5, 64
+	cmp	w4, 2
+	strh	w2, [x0, #:lo12:.LANCHOR126]
+	adrp	x2, .LANCHOR125
+	strh	w5, [x2, #:lo12:.LANCHOR125]
+	beq	.L2288
+	adrp	x4, .LANCHOR69
+	ldrb	w4, [x4, #:lo12:.LANCHOR69]
+	cbz	w4, .L2289
+.L2288:
+	mov	w4, 150
+	strh	w4, [x3, #:lo12:.LANCHOR181]
+	mov	w3, 128
+	strh	w3, [x2, #:lo12:.LANCHOR125]
+	adrp	x2, .LANCHOR18
+	ldrb	w2, [x2, #:lo12:.LANCHOR18]
+	cbnz	w2, .L2289
+	mov	w2, 600
+	strh	w2, [x1, #:lo12:.LANCHOR180]
+	mov	w1, 512
+	strh	w1, [x0, #:lo12:.LANCHOR126]
+.L2289:
 	bl	buf_init
-	ldrb	w1, [x19, #:lo12:.LANCHOR69]
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	ldrh	w1, [x19, #:lo12:.LANCHOR2]
+	mov	w0, 6
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR0
+	str	x0, [x1, #:lo12:.LANCHOR0]
+	ldrb	w1, [x20, #:lo12:.LANCHOR72]
+	ldrh	w0, [x21, #:lo12:.LANCHOR80]
 	mul	w0, w0, w1
 	lsl	w0, w0, 2
 	bl	ftl_malloc
-	adrp	x1, .LANCHOR83
-	adrp	x2, ftl_ext_info_data_buffer
-	add	x2, x2, :lo12:ftl_ext_info_data_buffer
-	str	x0, [x1, #:lo12:.LANCHOR83]
-	adrp	x0, .LANCHOR82
-	ldrh	w1, [x20, #:lo12:.LANCHOR79]
-	str	x2, [x0, #:lo12:.LANCHOR82]
-	ldrb	w0, [x19, #:lo12:.LANCHOR69]
-	mul	w1, w1, w0
-	lsl	w0, w1, 1
-	adrp	x1, .LANCHOR56
-	add	x3, x2, x0, sxtw 2
-	str	x3, [x1, #:lo12:.LANCHOR56]
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	add	w1, w0, w1, lsr 1
-	adrp	x0, .LC140
+	adrp	x1, .LANCHOR106
+	adrp	x3, .LANCHOR4
+	str	x0, [x1, #:lo12:.LANCHOR106]
+	adrp	x0, .LANCHOR105
+	adrp	x1, ftl_ext_info_data_buffer
+	add	x2, x1, :lo12:ftl_ext_info_data_buffer
+	ldrb	w1, [x20, #:lo12:.LANCHOR72]
+	str	x2, [x0, #:lo12:.LANCHOR105]
+	ldrh	w0, [x21, #:lo12:.LANCHOR80]
+	mul	w0, w0, w1
+	lsl	w1, w0, 1
+	add	x4, x2, x1, sxtw 2
+	str	x4, [x3, #:lo12:.LANCHOR4]
+	ldrh	w3, [x19, #:lo12:.LANCHOR2]
+	adrp	x19, .LANCHOR5
+	add	w1, w1, w3, lsr 1
+	add	w0, w3, w0, lsl 2
 	add	x1, x2, x1, sxtw 2
-	add	x0, x0, :lo12:.LC140
-	str	x1, [x23, #:lo12:.LANCHOR60]
-	bl	printf
-	ldrh	w0, [x20, #:lo12:.LANCHOR79]
-	ldrb	w19, [x19, #:lo12:.LANCHOR69]
-	ldrh	w1, [x22, #:lo12:.LANCHOR54]
-	ldrh	w20, [x24, #:lo12:.LANCHOR137]
-	ldrh	w3, [x21, #:lo12:.LANCHOR149]
-	mul	w19, w0, w19
-	adrp	x0, .LC141
-	add	x0, x0, :lo12:.LC141
-	add	w19, w1, w19, lsl 2
-	lsl	w1, w1, 2
-	add	w20, w1, w20, lsl 2
-	lsl	w19, w19, 1
-	add	w19, w19, 600
-	add	w20, w20, 704
-	mov	w2, w20
-	mov	w1, w19
-	bl	printf
-	ldrh	w0, [x21, #:lo12:.LANCHOR149]
-	cmp	w19, w0
-	bhi	.L2391
-	cmp	w20, w0
-	bls	.L2392
-.L2391:
-.L2399:
-	b	.L2399
-.L2390:
-	add	w3, w3, 1
-	lsl	w4, w4, 1
-	and	w3, w3, 65535
-	b	.L2389
-.L2392:
+	str	x1, [x19, #:lo12:.LANCHOR5]
+	ldrh	w1, [x23, #:lo12:.LANCHOR161]
+	lsl	w2, w3, 2
+	lsl	w0, w0, 1
+	add	w0, w0, 612
+	add	w1, w2, w1, lsl 2
+	ldrh	w2, [x22, #:lo12:.LANCHOR173]
+	add	w1, w1, 704
+	cmp	w0, w2
+	bhi	.L2291
+	cmp	w1, w2
+	bls	.L2292
+.L2291:
+.L2302:
+	b	.L2302
+.L2286:
+	add	w2, w2, 1
+	lsl	w1, w1, 1
+	and	w2, w2, 65535
+	b	.L2285
+.L2292:
 	bl	sblk_init
 	bl	ftl_info_blk_init
 	cmn	w0, #1
-	beq	.L2388
+	beq	.L2284
 	bl	ftl_ext_info_init
-	adrp	x19, .LANCHOR46
+	adrp	x20, .LANCHOR53
 	mov	w0, 1
 	bl	pm_init
 	bl	lpa_rebuild_hash
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	mov	x1, 0
 	add	x0, x0, 16
 	bl	ftl_open_sblk_recovery
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x1, x0, 16
 	add	x0, x0, 48
 	bl	ftl_open_sblk_recovery
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
 	ldr	w0, [x1, 8]
 	add	w0, w0, 16
 	str	w0, [x1, 8]
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x0, x0, 16
 	bl	ftl_info_data_recovery
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x0, x0, 48
 	bl	ftl_info_data_recovery
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
 	add	x0, x0, 80
 	bl	ftl_info_data_recovery
 	bl	gc_recovery
-	bl	ftl_info_check
 	bl	pm_flush
 	mov	w0, 1
 	bl	ftl_total_vpn_update
-	adrp	x0, .LANCHOR133
-	ldrb	w0, [x0, #:lo12:.LANCHOR133]
-	cbz	w0, .L2394
-	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	adrp	x0, .LANCHOR157
+	ldrb	w0, [x0, #:lo12:.LANCHOR157]
+	cbz	w0, .L2294
+	ldr	x1, [x20, #:lo12:.LANCHOR53]
 	ldr	w0, [x1, 68]
 	add	w0, w0, 1
 	str	w0, [x1, 68]
-.L2394:
+.L2294:
 	bl	ftl_ext_info_flush
 	mov	w0, 0
 	bl	ftl_info_flush
 	bl	print_ftl_debug_info
 	mov	w0, 0
-.L2388:
+.L2284:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
+	ldr	x23, [sp, 48]
 	ldp	x29, x30, [sp], 64
 	ret
-	.size	ftl_init, .-ftl_init
+	.size	zftl_init, .-zftl_init
 	.section	.text.rk_ftl_init,"ax",@progbits
 	.align	2
 	.global	rk_ftl_init
@@ -15736,2692 +15120,4612 @@ rk_ftl_init:
 	add	x29, sp, 0
 	str	x19, [sp, 16]
 	bl	nand_flash_init
-	cbnz	w0, .L2403
-	bl	ftl_init
-.L2403:
+	cbnz	w0, .L2306
+	bl	zftl_init
+.L2306:
 	mov	w19, w0
 	mov	w1, w0
-	adrp	x0, .LC142
-	add	x0, x0, :lo12:.LC142
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
 	bl	printf
 	mov	w0, w19
 	ldr	x19, [sp, 16]
 	ldp	x29, x30, [sp], 32
 	ret
 	.size	rk_ftl_init, .-rk_ftl_init
-	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.section	.text.gc_update_l2p_map_new,"ax",@progbits
 	.align	2
-	.global	ftl_update_l2p_map
-	.type	ftl_update_l2p_map, %function
-ftl_update_l2p_map:
-	stp	x29, x30, [sp, -128]!
+	.global	gc_update_l2p_map_new
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	stp	x29, x30, [sp, -176]!
+	adrp	x0, .LANCHOR5
+	adrp	x1, .LANCHOR71
 	add	x29, sp, 0
 	stp	x21, x22, [sp, 32]
-	mov	x22, x0
-	stp	x23, x24, [sp, 48]
-	adrp	x0, .LANCHOR79
-	stp	x19, x20, [sp, 16]
-	adrp	x24, .LANCHOR82
+	ldr	x22, [x0, #:lo12:.LANCHOR5]
 	stp	x25, x26, [sp, 64]
+	ldrh	w25, [x1, #:lo12:.LANCHOR71]
+	add	x1, x22, 80
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR29
+	stp	x23, x24, [sp, 48]
 	stp	x27, x28, [sp, 80]
-	ldrh	w23, [x0, #:lo12:.LANCHOR79]
-	ldrb	w0, [x22, 9]
-	ldrh	w19, [x22, 12]
-	str	x24, [x29, 104]
-	mul	w23, w23, w0
-	ldr	x0, [x24, #:lo12:.LANCHOR82]
-	add	x19, x0, x19, lsl 2
-	add	x0, x19, x23, sxtw 2
-	ldr	w0, [x0, -4]
-	cmn	w0, #1
-	bne	.L2406
-	adrp	x27, .LANCHOR45
-	mov	x28, 0
-	add	x0, x27, :lo12:.LANCHOR45
-	mov	w21, 0
-	str	x0, [x29, 96]
-.L2407:
-	cmp	w28, w23
-	blt	.L2415
-	adrp	x0, .LANCHOR22
-	adrp	x19, .LANCHOR56
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 12, .L2416
-	ldrh	w1, [x22]
-	ldr	x2, [x19, #:lo12:.LANCHOR56]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w3, [x2, x0]
-	adrp	x0, .LC146
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC146
+	str	x1, [x29, 144]
+	ldrb	w1, [x1, 9]
+	str	x0, [x29, 128]
+	mul	w25, w25, w1
+	ldr	w1, [x20, #:lo12:.LANCHOR29]
+	tbz	x1, 8, .L2309
+	ldrh	w1, [x22, 80]
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
 	bl	printf
-.L2416:
-	ldrh	w1, [x22]
-	ldr	x0, [x19, #:lo12:.LANCHOR56]
-	ldp	x23, x24, [sp, 48]
-	ldp	x19, x20, [sp, 16]
-	strh	w21, [x0, x1, lsl 1]
-	ldp	x25, x26, [sp, 64]
-	ldp	x21, x22, [sp, 32]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 128
-	ret
-.L2406:
-	adrp	x1, .LANCHOR166
+.L2309:
+	adrp	x24, .LANCHOR4
+	ldrh	w1, [x22, 80]
+	sub	w2, w25, #1
+	mov	x21, 0
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	mov	w23, 0
+	strh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR52
+	add	x0, x0, :lo12:.LANCHOR52
+	str	x0, [x29, 104]
+.L2310:
+	mov	w27, w21
+	cmp	w25, w21
+	bhi	.L2320
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2321
+	ldr	x0, [x29, 128]
+	mov	w3, w23
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	ldrh	w2, [x22, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldrh	w2, [x1, x2, lsl 1]
+	ldrh	w1, [x0, 80]
+	adrp	x0, .LC121
+	add	x0, x0, :lo12:.LC121
+	bl	printf
+.L2321:
+	ldrh	w0, [x22, 80]
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cmp	w23, w2
+	beq	.L2322
+	adrp	x1, .LANCHOR182
 	adrp	x0, .LC0
-	mov	w2, 882
-	add	x1, x1, :lo12:.LANCHOR166
+	mov	w2, 463
+	add	x1, x1, :lo12:.LANCHOR182
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2408:
-	b	.L2408
-.L2415:
-	ldr	w2, [x19, x28, lsl 2]
+.L2323:
+	b	.L2323
+.L2320:
+	adrp	x26, .LANCHOR131
+	lsl	x19, x21, 2
+	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	ldr	w2, [x0, x19]
 	cmn	w2, #1
-	beq	.L2409
-	ldrb	w20, [x27, #:lo12:.LANCHOR45]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	lsl	w20, w20, 7
-	udiv	w20, w2, w20
-	and	w20, w20, 65535
-	tbz	x0, 12, .L2410
-	adrp	x0, .LC143
-	mov	w3, w28
-	mov	w1, w20
-	add	x0, x0, :lo12:.LC143
+	beq	.L2311
+	adrp	x0, .LANCHOR52
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	lsl	w0, w0, 7
+	udiv	w0, w2, w0
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2312
+	ldr	w1, [x29, 156]
+	adrp	x0, .LC118
+	mov	w3, w21
+	add	x0, x0, :lo12:.LC118
 	bl	printf
-.L2410:
-	adrp	x25, .LANCHOR75
-	adrp	x26, .LC144
-	mov	x24, x28
-	add	x25, x25, :lo12:.LANCHOR75
-	add	x26, x26, :lo12:.LC144
-.L2414:
-	ldr	w1, [x19, x24, lsl 2]
-	cmn	w1, #1
-	beq	.L2411
-	ldr	x0, [x29, 96]
-	ldrb	w2, [x0]
-	lsl	w2, w2, 7
-	udiv	w1, w1, w2
-	cmp	w20, w1, uxth
-	bne	.L2411
-	ldrb	w0, [x22, 9]
-	sdiv	w1, w24, w0
-	msub	w0, w1, w0, w24
-	add	x0, x22, x0, sxtw 1
-	ldrh	w2, [x0, 16]
-	ldrh	w0, [x25]
-	madd	w2, w2, w0, w1
-	mov	x0, x26
-	str	w2, [x29, 124]
-	ldr	w1, [x19, x24, lsl 2]
-	bl	pm_ppa_update_check
-	cbz	w0, .L2412
+.L2312:
+	sub	w27, w25, w27
+	add	x27, x27, x21
+	lsl	x0, x27, 2
+	str	x0, [x29, 136]
+	adrp	x0, .LC120
+	add	x0, x0, :lo12:.LC120
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR96
+	add	x0, x0, :lo12:.LANCHOR96
+	str	x0, [x29, 112]
+.L2313:
+	ldr	x0, [x29, 136]
+	cmp	x0, x19
+	bne	.L2319
+.L2311:
+	add	x21, x21, 1
+	b	.L2310
+.L2319:
+	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	ldr	w28, [x0, x19]
+	cmn	w28, #1
+	beq	.L2314
 	ldr	x0, [x29, 104]
-	mov	w3, w23
-	mov	w2, 4
-	ldr	x1, [x0, #:lo12:.LANCHOR82]
-	adrp	x0, .LC145
-	add	x0, x0, :lo12:.LC145
-	bl	rknand_print_hex
-.L2413:
-	b	.L2413
-.L2412:
-	ldr	w0, [x19, x24, lsl 2]
-	add	w21, w21, 1
+	ldr	w1, [x29, 156]
+	ldrb	w0, [x0]
+	lsl	w0, w0, 7
+	udiv	w0, w28, w0
+	cmp	w1, w0, uxth
+	bne	.L2314
+	adrp	x0, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	ldr	w27, [x0, x19]
+	mov	w0, w28
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	bne	.L2315
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w28
+	bl	pm_log2phys
+.L2315:
+	ldr	w3, [x29, 172]
+	cmp	w27, w3
+	bne	.L2316
+	adrp	x0, .LANCHOR133
 	mov	w2, 1
-	add	x1, x29, 124
-	and	w21, w21, 65535
+	add	x1, x29, 168
+	add	w23, w23, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR133]
+	ldr	w0, [x0, x19]
+	str	w0, [x29, 168]
+	mov	w0, w28
 	bl	pm_log2phys
-	mov	w0, -1
-	str	w0, [x19, x24, lsl 2]
-.L2411:
-	add	x24, x24, 1
-	cmp	w23, w24
-	bgt	.L2414
-.L2409:
-	add	x28, x28, 1
-	b	.L2407
-	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
-	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
-	.align	2
-	.global	ftl_alloc_new_data_sblk
-	.type	ftl_alloc_new_data_sblk, %function
-ftl_alloc_new_data_sblk:
-	stp	x29, x30, [sp, -32]!
-	add	x29, sp, 0
-	str	x19, [sp, 16]
-	mov	x19, x0
-	bl	ftl_update_l2p_map
-	bl	pm_flush
-	adrp	x0, .LANCHOR60
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	add	x0, x0, 16
-	cmp	x19, x0
-	mov	x0, x19
-	cset	w1, ne
-	add	w1, w1, 2
-	bl	ftl_open_sblk_init
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	bl	lpa_rebuild_hash
-	ldr	x19, [sp, 16]
-	mov	w0, 0
-	ldp	x29, x30, [sp], 32
+	ldr	x0, [x29, 112]
+	mov	w1, 21
+	ldrh	w0, [x0]
+	sub	w2, w1, w0
+	mov	w1, 1
+	lsr	w0, w27, w0
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w1, w1, w0
+	and	w1, w1, 65535
+	str	w1, [x29, 152]
+	mov	w0, w1
+	bl	ftl_vpn_decrement
+	ldr	x0, [x29, 144]
+	ldr	w1, [x29, 152]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bne	.L2317
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2317
+	ldr	w3, [x29, 172]
+	adrp	x0, .LC119
+	mov	w2, w27
+	mov	w1, w28
+	add	x0, x0, :lo12:.LC119
+	bl	printf
+.L2317:
+	ldr	x0, [x26, #:lo12:.LANCHOR131]
+	mov	w1, -1
+	str	w1, [x0, x19]
+.L2314:
+	add	x19, x19, 4
+	b	.L2313
+.L2316:
+	ldr	w0, [x20, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2318
+	ldr	x0, [x29, 120]
+	mov	w2, w27
+	mov	w1, w28
+	bl	printf
+.L2318:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0]
+	bl	ftl_vpn_decrement
+	b	.L2317
+.L2322:
+	strh	w23, [x1, x0]
+	ldrh	w0, [x22, 80]
+	bl	zftl_insert_data_list
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
 	ret
-	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
-	.section	.text.ftl_write_commit,"ax",@progbits
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
 	.align	2
-	.global	ftl_write_commit
-	.type	ftl_write_commit, %function
-ftl_write_commit:
-	stp	x29, x30, [sp, -144]!
-	adrp	x0, .LANCHOR36
+	.global	gc_scan_src_blk_one_page
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	stp	x29, x30, [sp, -96]!
+	mov	w5, 0
+	mov	w6, 0
+	mov	w7, 65535
 	add	x29, sp, 0
-	stp	x25, x26, [sp, 64]
-	add	x25, x0, :lo12:.LANCHOR36
 	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR63
+	add	x1, x19, :lo12:.LANCHOR63
 	stp	x21, x22, [sp, 32]
 	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
-.L2436:
-	adrp	x3, .LANCHOR43
-	ldrb	w1, [x3, #:lo12:.LANCHOR43]
-	cbz	w1, .L2438
-	adrp	x4, .LANCHOR42
-	adrp	x2, .LANCHOR36
-	add	x2, x2, :lo12:.LANCHOR36
-	sub	w1, w1, #1
-	ldrb	w0, [x4, #:lo12:.LANCHOR42]
-	strb	w1, [x3, #:lo12:.LANCHOR43]
-	adrp	x1, .LANCHOR47
-	ubfiz	x27, x0, 6, 8
-	ldr	w1, [x1, #:lo12:.LANCHOR47]
-	add	x5, x2, x27
-	stp	x0, x5, [x29, 112]
-	lsl	x5, x0, 6
-	add	x0, x2, x5
-	ldrb	w5, [x2, x5]
-	ldr	w22, [x0, 36]
-	strb	w5, [x4, #:lo12:.LANCHOR42]
-	cmp	w22, w1
-	bcc	.L2440
-	ldr	x0, [x29, 120]
+	str	x25, [sp, 64]
+	ldrb	w0, [x1, 4]
+	add	x2, x1, x0, sxtw 1
+	ldrh	w3, [x2, 40]
+	adrp	x2, .LANCHOR72
+	ldrb	w4, [x2, #:lo12:.LANCHOR72]
+	ldrh	w2, [x1, 2]
+.L2347:
+	cmp	w3, w7
+	beq	.L2349
+	cbz	w6, .L2350
+	add	x1, x19, :lo12:.LANCHOR63
+	strb	w0, [x1, 4]
+.L2350:
+	cbz	w5, .L2351
+	add	x0, x19, :lo12:.LANCHOR63
+	strh	w2, [x0, 2]
+.L2351:
+	adrp	x0, .LANCHOR99
+	ldrh	w22, [x0, #:lo12:.LANCHOR99]
+	adrp	x0, .LANCHOR67
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR67]
+	mul	w22, w22, w3
+	cmp	w1, 2
+	bne	.L2352
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrb	w1, [x0, 6]
+	cbnz	w1, .L2352
+	ldrh	w0, [x0, 2]
+	add	w22, w22, w0, lsl 1
+.L2353:
+	add	x1, x19, :lo12:.LANCHOR63
+	ldrb	w0, [x1, 4]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x1, 4]
+	cmp	w4, w0
+	bne	.L2354
+	ldrh	w0, [x1, 2]
+	strb	wzr, [x1, 4]
+	add	w0, w0, 1
+	strh	w0, [x1, 2]
+.L2354:
+	mov	w0, 1
+	add	x19, x19, :lo12:.LANCHOR63
+	bl	buf_alloc
+	add	x23, x23, :lo12:.LANCHOR67
+	mov	x21, x0
+	mov	w20, 0
+	adrp	x24, .LANCHOR64
+.L2364:
+	ldrb	w0, [x19, 6]
+	cmp	w0, 3
+	bne	.L2355
+	cbz	w20, .L2356
+.L2355:
+	cmp	w0, w20
+	bgt	.L2357
+.L2365:
+	mov	x0, x21
 	bl	buf_free
-	mov	w0, -1
-.L2435:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 144
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
 	ret
-.L2440:
-	adrp	x26, .LANCHOR89
-	ldrb	w21, [x0, 57]
-	ldrb	w20, [x0, 56]
-	ldr	x24, [x0, 8]
-	ldr	x28, [x0, 24]
-	ldrb	w0, [x26, #:lo12:.LANCHOR89]
-	cbz	w0, .L2442
-	adrp	x0, .LANCHOR127
-	ldrb	w1, [x0, #:lo12:.LANCHOR127]
-	add	x1, x2, x1, lsl 6
-.L2443:
-	ldrb	w0, [x1]
-	cmp	w0, 255
-	bne	.L2444
-	ldr	w0, [x1, 36]
-	cmp	w22, w0
-	bne	.L2442
-	ldr	x0, [x1, 8]
-	ubfiz	x21, x21, 9, 8
-	lsl	w2, w20, 9
-	add	x1, x24, x21
-	add	x0, x0, x21
-	bl	ftl_memcpy
-	ldr	x0, [x29, 120]
-	bl	buf_free
-	b	.L2436
-.L2444:
-	ubfiz	x1, x0, 6, 8
-	add	x1, x25, x1
-	b	.L2443
-.L2442:
-	mov	w0, w22
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 140]
-	cmn	w0, #1
-	bne	.L2446
-	mov	w2, 0
-	add	x1, x29, 140
-	mov	w0, w22
-	bl	pm_log2phys
-.L2446:
-	adrp	x19, .LANCHOR60
-	add	x1, x25, 2
+.L2349:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w4
+	bne	.L2348
+	add	w2, w2, 1
+	mov	w5, 1
+	and	w2, w2, 65535
 	mov	w0, 0
-	ldr	x3, [x19, #:lo12:.LANCHOR60]
-.L2449:
-	ldr	w2, [x1, 34]
-	cmp	w22, w2
-	bne	.L2447
-	ldrb	w2, [x1]
-	tbz	x2, 3, .L2447
-	ubfiz	x0, x0, 6, 32
-	and	w2, w2, -9
-	add	x0, x25, x0
-	strb	w2, [x0, 2]
-	ldr	x23, [x0, 8]
-	ldr	w0, [x0, 40]
-	str	w0, [x29, 140]
-.L2448:
-	adrp	x0, .LANCHOR45
-	str	x0, [x29, 104]
-	ldrb	w1, [x0, #:lo12:.LANCHOR45]
-	cmp	w20, w1
-	bcc	.L2450
-	add	x19, x3, 16
-.L2495:
-	mov	w23, 0
-.L2451:
-	ldrh	w0, [x19, 6]
-	cbnz	w0, .L2466
-	bl	ftl_flush
-	mov	x0, x19
-	bl	ftl_alloc_new_data_sblk
-.L2466:
-	mov	x0, x19
-	bl	ftl_get_new_free_page
-	ldr	x1, [x29, 112]
-	adrp	x20, .LANCHOR127
-	lsl	x2, x1, 6
-	add	x1, x25, x2
-	ldr	w3, [x1, 32]
-	stp	w3, w22, [x28]
-	str	w23, [x28, 12]
-	ldr	w3, [x29, 140]
-	str	w3, [x28, 8]
-	stp	w0, w3, [x1, 40]
-	mov	w0, -1
-	strb	w0, [x25, x2]
-	mov	w2, 10
-	ldrb	w0, [x1, 2]
-	orr	w0, w0, w2
-	ldrh	w2, [x19, 12]
-	strb	w0, [x1, 2]
-	ldrh	w0, [x19, 10]
-	add	w0, w0, w2
-	sub	w0, w0, #1
-	strh	w0, [x1, 48]
-	ldr	x1, [x29, 120]
-	add	x0, x20, :lo12:.LANCHOR127
-	bl	buf_add_tail
-	ldrb	w2, [x26, #:lo12:.LANCHOR89]
-	adrp	x0, .LANCHOR168
-	add	w2, w2, 1
-	str	wzr, [x0, #:lo12:.LANCHOR168]
-	and	w2, w2, 255
-	strb	w2, [x26, #:lo12:.LANCHOR89]
-	cmp	w2, 2
-	ldrh	w0, [x19, 6]
-	bhi	.L2467
-	cmp	w0, 1
-	bne	.L2439
-.L2467:
-	ldrb	w1, [x19, 5]
-	cmp	w1, 0
-	mov	w1, 0
-	cset	w4, ne
-	cmp	w0, 1
-	ldrb	w0, [x20, #:lo12:.LANCHOR127]
-	csinc	w4, w2, w4, eq
-	mov	w3, w0
-.L2471:
-	cmp	w1, w4
-	bne	.L2472
-	and	w1, w1, 255
-	ubfiz	x0, x0, 6, 8
-	sub	w2, w2, w1
-	strb	w3, [x20, #:lo12:.LANCHOR127]
-	strb	w2, [x26, #:lo12:.LANCHOR89]
-	add	x0, x25, x0
-	bl	sblk_prog_page
-	ldrh	w0, [x19, 6]
-	cmp	w0, 1
-	bne	.L2439
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	mov	x0, x19
-	bl	ftl_write_last_log_page
-	mov	x0, x19
-	bl	ftl_alloc_new_data_sblk
-.L2439:
-	adrp	x0, .LANCHOR43
-	ldrb	w0, [x0, #:lo12:.LANCHOR43]
-	cbnz	w0, .L2436
-.L2438:
-	bl	ftl_write_completed
-	mov	w0, 0
-	b	.L2435
-.L2447:
+.L2348:
+	add	x3, x1, x0, sxtw 1
+	mov	w6, 1
+	ldrh	w3, [x3, 40]
+	b	.L2347
+.L2352:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrh	w0, [x0, 2]
+	add	w22, w0, w22
+	b	.L2353
+.L2357:
+	ldrb	w1, [x23]
+	cmp	w1, 2
+	bne	.L2358
+	cbnz	w0, .L2358
+	add	w0, w20, w22
+	orr	w0, w0, 33554432
+.L2378:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w0, [x21, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2361
+	ldr	x0, [x21, 24]
+	ldr	w25, [x0, 4]
+	mov	w0, w25
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2362
+	mov	w2, 0
+	add	x1, x29, 92
+	mov	w0, w25
+	bl	pm_log2phys
+.L2362:
+	ldr	w0, [x29, 92]
+	cmp	w22, w0
+	bne	.L2361
+	ldrh	w0, [x19, 24]
+	ldr	x2, [x24, #:lo12:.LANCHOR64]
+	ubfiz	x1, x0, 2, 16
 	add	w0, w0, 1
-	add	x1, x1, 64
-	cmp	w0, 32
-	bne	.L2449
-	mov	x23, 0
-	b	.L2448
-.L2450:
-	cbz	x23, .L2452
-	cbz	w21, .L2453
-	lsl	w2, w21, 9
-	mov	x1, x23
-	mov	x0, x24
-	bl	ftl_memcpy
-.L2453:
-	ldr	x0, [x29, 104]
-	add	w20, w21, w20
-	ldr	x19, [x19, #:lo12:.LANCHOR60]
-	ldrb	w2, [x0, #:lo12:.LANCHOR45]
-	cmp	w20, w2
-	bcc	.L2454
-	add	x19, x19, 16
-	b	.L2495
-.L2454:
-	ubfiz	x0, x20, 9, 9
-	sub	w2, w2, w20
-	add	x1, x23, x0
-	add	x19, x19, 48
-	lsl	w2, w2, 9
-	add	x0, x24, x0
-	bl	ftl_memcpy
-	b	.L2495
-.L2452:
-	ldr	w0, [x29, 140]
+	str	w22, [x2, x1]
+	strh	w0, [x19, 24]
+.L2361:
+	ldrh	w0, [x19, 26]
+	add	w0, w0, 1
+	strh	w0, [x19, 26]
+.L2356:
+	add	w20, w20, 1
+	cmp	w20, 4
+	bne	.L2364
+	b	.L2365
+.L2358:
+	orr	w0, w22, w20, lsl 24
+	b	.L2378
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_static_data,"ax",@progbits
+	.align	2
+	.global	gc_scan_static_data
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	w1, [x0, 544]
+	str	x23, [sp, 48]
+	cmn	w1, #1
+	beq	.L2380
+	adrp	x21, .LANCHOR96
+	adrp	x22, .LANCHOR95
+	add	x21, x21, :lo12:.LANCHOR96
+	add	x22, x22, :lo12:.LANCHOR95
+	mov	w20, 11
+.L2389:
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	mov	w2, 0
+	add	x1, x29, 76
+	ldr	w0, [x0, 544]
+	bl	pm_log2phys
+	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2455
+	beq	.L2381
 	mov	w0, 1
 	bl	buf_alloc
-	ldr	w1, [x29, 140]
-	mov	x27, x0
-	stp	w22, w1, [x0, 36]
+	ldr	w1, [x29, 76]
+	mov	x23, x0
+	str	w1, [x0, 40]
 	mov	w1, 1
 	bl	sblk_read_page
-	ldr	x0, [x27, 24]
-	ldr	w23, [x0, 12]
-	ldr	w0, [x0, 4]
-	add	w23, w23, 1
-	cmp	w22, w0
-	bne	.L2456
-	ldr	w0, [x27, 52]
-	cmn	w0, #1
-	bne	.L2457
-.L2456:
-	ldrb	w1, [x27, 1]
-	mov	w3, w22
-	ldr	w4, [x27, 52]
-	adrp	x0, .LC147
-	ldr	w2, [x29, 140]
-	add	x0, x0, :lo12:.LC147
-	bl	printf
-	ldr	x1, [x27, 24]
-	mov	w3, 4
-	adrp	x0, .LC96
-	mov	w2, w3
-	add	x0, x0, :lo12:.LC96
-	bl	rknand_print_hex
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x29, 140]
-	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x23, 52]
+	cmp	w0, 256
+	bne	.L2382
+	ldrh	w3, [x21]
 	mov	w0, 21
-	sub	w2, w0, w3
-	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
+	ldr	w2, [x29, 76]
+	mov	w1, 1
+	sub	w0, w0, w3
+	lsr	w2, w2, w3
+	ldrb	w3, [x22]
+	lsl	w0, w1, w0
 	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2457:
-	ldr	x0, [x27, 24]
-	ldr	w0, [x0, 4]
-	cmp	w22, w0
-	bne	.L2458
-	ldr	w0, [x27, 52]
-	cmn	w0, #1
-	bne	.L2459
-.L2458:
-	adrp	x1, .LANCHOR167
+	and	w0, w0, w2
+	mov	w2, 0
+	udiv	w0, w0, w3
+	bl	gc_add_sblk
+.L2382:
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	ldr	x1, [x23, 24]
+	ldr	w0, [x0, 544]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	beq	.L2383
+	adrp	x1, .LANCHOR183
 	adrp	x0, .LC0
-	mov	w2, 445
-	add	x1, x1, :lo12:.LANCHOR167
+	mov	w2, 1369
+	add	x1, x1, :lo12:.LANCHOR183
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2460:
-	b	.L2460
-.L2459:
-	cbz	w21, .L2461
-	ldr	w0, [x29, 140]
-	lsl	w2, w21, 9
-	cmn	w0, #1
-	beq	.L2462
-	ldr	x1, [x27, 8]
-	mov	x0, x24
-	bl	ftl_memcpy
-.L2461:
-	ldr	x1, [x29, 104]
-	add	w20, w21, w20
-	ldr	x0, [x19, #:lo12:.LANCHOR60]
-	add	x19, x0, 48
-	ldrb	w2, [x1, #:lo12:.LANCHOR45]
-	cmp	w20, w2
-	bcc	.L2463
-	add	x19, x0, 16
-.L2464:
-	cbz	x27, .L2451
-	ldrb	w0, [x27, 2]
-	mov	x1, x27
-	and	w0, w0, -9
-	strb	w0, [x27, 2]
-	adrp	x0, .LANCHOR51
-	add	x0, x0, :lo12:.LANCHOR51
-	bl	buf_remove_buf
-	mov	x0, x27
+.L2384:
+	b	.L2384
+.L2383:
+	mov	x0, x23
 	bl	buf_free
-	b	.L2451
-.L2463:
-	ldr	w0, [x29, 140]
-	sub	w2, w2, w20
-	lsl	w2, w2, 9
-	ubfiz	x20, x20, 7, 9
-	cmn	w0, #1
-	beq	.L2465
-	ldr	x1, [x27, 8]
-	lsl	x20, x20, 2
-	add	x0, x24, x20
-	add	x1, x1, x20
-	bl	ftl_memcpy
-	b	.L2464
-.L2465:
-	mov	w1, 0
-	add	x0, x24, x20, lsl 2
-	bl	ftl_memset
-	b	.L2464
-.L2472:
-	ubfiz	x3, x3, 6, 8
+.L2381:
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	adrp	x2, .LANCHOR54
+	ldr	w2, [x2, #:lo12:.LANCHOR54]
+	ldr	w1, [x0, 544]
 	add	w1, w1, 1
-	ldrb	w3, [x25, x3]
-	b	.L2471
-.L2473:
-	lsl	w2, w21, 9
-	mov	x27, 0
-	mov	w23, 0
-.L2462:
-	mov	w1, 0
-	mov	x0, x24
-	bl	ftl_memset
-	b	.L2461
-.L2455:
-	cbnz	w21, .L2473
-	mov	w23, 0
-	mov	x27, 0
-	b	.L2461
-	.size	ftl_write_commit, .-ftl_write_commit
-	.section	.text.ftl_discard,"ax",@progbits
-	.align	2
-	.global	ftl_discard
-	.type	ftl_discard, %function
-ftl_discard:
-	stp	x29, x30, [sp, -112]!
-	ands	w0, w0, 255
-	add	x29, sp, 0
-	stp	x19, x20, [sp, 16]
-	mov	w20, w2
-	stp	x25, x26, [sp, 64]
-	mov	w26, w3
-	stp	x21, x22, [sp, 32]
-	stp	x23, x24, [sp, 48]
-	stp	x27, x28, [sp, 80]
-	bne	.L2497
-	adrp	x2, .LANCHOR52
-	mov	w21, 24576
-	ldr	w2, [x2, #:lo12:.LANCHOR52]
-.L2498:
-	add	w3, w1, w20
-	cmp	w2, w3
-	bcc	.L2519
-	add	w21, w21, w1
-	adrp	x1, .LANCHOR22
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 12, .L2500
-	mov	w1, w0
-	mov	w4, w26
-	adrp	x0, .LC148
-	mov	w3, w20
-	mov	w2, w21
-	add	x0, x0, :lo12:.LC148
-	bl	printf
-.L2500:
-	adrp	x22, .LANCHOR46
-	adrp	x23, .LANCHOR45
-	cmp	w26, 1
-	ldr	x0, [x22, #:lo12:.LANCHOR46]
-	cset	w25, ls
-	ldr	w24, [x0, 8]
-	add	w1, w24, 1
-	str	w1, [x0, 8]
-	ldrb	w0, [x23, #:lo12:.LANCHOR45]
-	udiv	w19, w21, w0
-	msub	w21, w19, w0, w21
-	cbz	w21, .L2501
-	sub	w0, w0, w21
-	cmp	w0, w20
-	csel	w28, w0, w20, ls
-	cmp	w26, 1
-	and	w27, w28, 65535
-	bhi	.L2503
-	mov	w0, w19
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 104]
-	cmn	w0, #1
-	bne	.L2504
-	mov	w2, 0
-	add	x1, x29, 104
-	mov	w0, w19
-	bl	pm_log2phys
-.L2504:
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2503
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x26, x0
-	cbz	x0, .L2503
-	strb	w21, [x0, 57]
-	lsl	w2, w27, 9
-	strb	w28, [x0, 56]
-	mov	w1, 0
-	ldr	x0, [x0, 8]
-	ubfiz	x21, x21, 9, 25
-	stp	w24, w19, [x26, 32]
-	add	x0, x0, x21
-	bl	ftl_memset
-	mov	x0, x26
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2503:
-	add	w19, w19, 1
-	sub	w20, w20, w27
-.L2501:
-	cbz	w20, .L2506
+	str	w1, [x0, 544]
+	cmp	w1, w2
+	bcc	.L2385
+	mov	w1, -1
+	str	w1, [x0, 544]
+	ldr	w1, [x0, 548]
+	add	w1, w1, 1
+	str	w1, [x0, 548]
 	bl	ftl_flush
-.L2506:
-	adrp	x21, .LANCHOR71
-	add	x26, x23, :lo12:.LANCHOR45
-	add	x21, x21, :lo12:.LANCHOR71
-	mov	w0, -1
-	str	w0, [x29, 108]
-.L2507:
-	ldrb	w0, [x26]
-	cmp	w20, w0
-	bcs	.L2512
-	cmp	w20, 0
-	cset	w0, ne
-	tst	w25, w0
-	bne	.L2513
-.L2546:
+	bl	pm_flush
+	bl	ftl_ext_info_flush
 	mov	w0, 0
-.L2496:
+	bl	ftl_info_flush
+.L2379:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
 	ret
-.L2497:
-	cmp	w0, 3
-	bhi	.L2519
-	lsl	w21, w0, 13
-	mov	w2, 8192
-	b	.L2498
-.L2512:
-	mov	w0, w19
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 104]
-	cmn	w0, #1
-	mov	w2, 0
-	add	x1, x29, 104
-	mov	w0, w19
-	beq	.L2508
-	bl	pm_log2phys
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2510
-	mov	w2, 1
-	add	x1, x29, 108
-	mov	w0, w19
-	bl	pm_log2phys
-.L2545:
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-.L2510:
-	ldrb	w0, [x26]
-	add	w19, w19, 1
-	sub	w20, w20, w0
-	b	.L2507
-.L2508:
-	bl	pm_log2phys
-	ldr	w0, [x29, 104]
+.L2385:
+	ldr	w0, [x29, 76]
 	cmn	w0, #1
-	beq	.L2510
-	add	x1, x29, 108
-	mov	w2, 1
-	mov	w0, w19
-	bl	pm_log2phys
-	ldrh	w3, [x21]
-	mov	w0, 21
-	ldr	w1, [x29, 104]
-	sub	w2, w0, w3
+	bne	.L2379
+	sub	w20, w20, #1
+	ands	w20, w20, 65535
+	bne	.L2389
+	b	.L2379
+.L2380:
+	adrp	x1, .LANCHOR53
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	w2, [x1, 40]
+	cmp	w2, 20480
+	bls	.L2391
+	ldr	w3, [x1, 44]
+	add	w3, w3, w2, lsr 10
+	and	w2, w2, 1023
+	stp	w2, w3, [x1, 40]
+.L2391:
+	ldr	w2, [x0, 536]
+	ldr	w3, [x0, 12]
+	add	w2, w2, 12959744
+	add	w2, w2, 256
+	cmp	w3, w2
+	ldr	w2, [x1, 44]
+	bhi	.L2392
+	ldr	w1, [x0, 540]
+	add	w1, w1, 98304
+	add	w1, w1, 1696
+	cmp	w2, w1
+	bls	.L2379
+.L2392:
+	str	w3, [x0, 536]
+	str	w2, [x0, 540]
+	str	wzr, [x0, 544]
+	b	.L2379
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sblk_dump
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	sub	sp, sp, #272
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x21, x22, [sp, 80]
+	and	w22, w0, 65535
+	stp	x19, x20, [sp, 64]
+	mov	w0, 65535
+	stp	x23, x24, [sp, 96]
+	cmp	w22, w0
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	beq	.L2419
+	uxtw	x0, w22
+	str	x0, [x29, 144]
+	lsl	x14, x0, 2
+	adrp	x0, .LANCHOR3
+	mov	x13, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR3]
+	add	x2, x2, x14
+	ldrb	w2, [x2, 2]
+	and	w2, w2, 224
+	cmp	w2, 160
+	bne	.L2420
+	adrp	x0, .LANCHOR67
+	ldrb	w24, [x0, #:lo12:.LANCHOR67]
+.L2400:
+	add	x28, x29, 224
+	str	x1, [x29, 160]
+	mov	w0, w22
+	strh	w22, [x28, -32]!
+	add	x1, x28, 16
+	bl	ftl_get_blk_list_in_sblk
+	adrp	x2, .LANCHOR80
+	and	w1, w0, 255
+	strb	w1, [x29, 201]
+	ldrh	w3, [x2, #:lo12:.LANCHOR80]
+	strh	wzr, [x29, 194]
+	strb	wzr, [x29, 197]
+	strh	wzr, [x29, 202]
+	mul	w1, w1, w3
+	str	x2, [x29, 136]
+	strh	w1, [x29, 198]
+	adrp	x1, .LANCHOR29
+	str	x1, [x29, 152]
+	ldr	w3, [x1, #:lo12:.LANCHOR29]
+	tbz	x3, 12, .L2401
+	ldr	x1, [x13, #:lo12:.LANCHOR3]
+	and	w4, w0, 255
+	mov	w3, w24
+	adrp	x0, .LC122
+	add	x1, x1, x14
+	add	x0, x0, :lo12:.LC122
+	ldrb	w2, [x1, 2]
+	mov	w1, w22
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2401:
 	mov	w0, 1
-	lsr	w1, w1, w3
-	lsl	w0, w0, w2
+	bl	buf_alloc
+	mov	w26, 0
+	mov	x21, x0
+	mov	w27, 0
+	adrp	x0, .LANCHOR99
+	mov	w19, 0
+	add	x0, x0, :lo12:.LANCHOR99
+	str	wzr, [x29, 172]
+	str	x0, [x29, 112]
+.L2402:
+	ldr	x0, [x29, 136]
+	ldrh	w0, [x0, #:lo12:.LANCHOR80]
+	cmp	w0, w19
+	bls	.L2416
+	lsl	w0, w19, 1
+	mov	w23, 0
 	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w1, [x1, #:lo12:.LANCHOR70]
-	udiv	w0, w0, w1
-	bl	ftl_vpn_decrement
-	b	.L2545
-.L2513:
-	mov	w0, w19
+	str	w0, [x29, 168]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
+	str	x0, [x29, 120]
+	b	.L2417
+.L2420:
+	mov	w24, 1
+	b	.L2400
+.L2413:
+	ldr	x0, [x29, 128]
+	ldrh	w11, [x28, x0]
+	mov	w0, 65535
+	cmp	w11, w0
+	beq	.L2403
+	ldr	x0, [x29, 112]
+	cmp	w24, 3
+	ldrh	w8, [x0]
+	mul	w8, w8, w11
+	bne	.L2404
+	add	w8, w19, w8
+	orr	w25, w8, w20, lsl 24
+.L2405:
+	str	w25, [x21, 40]
+	mov	w1, 1
+	str	w11, [x29, 100]
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	x1, [x21, 24]
+	mov	w3, w25
+	ldr	x0, [x21, 8]
+	ldr	w12, [x21, 52]
+	ldr	w11, [x29, 100]
+	ldr	w2, [x1, 12]
+	mov	w4, w12
+	str	w2, [sp, 32]
+	str	w12, [x29, 104]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w11
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldr	w12, [x29, 104]
+	ldr	w0, [x29, 172]
+	cmp	w12, 512
+	ccmn	w12, #1, 4, ne
+	csinc	w0, w0, wzr, ne
+	str	w0, [x29, 172]
+	ldr	x0, [x21, 24]
+	ldr	w3, [x0, 4]
+	str	w3, [x29, 104]
+	mov	w0, w3
 	bl	lpa_hash_get_ppa
-	str	w0, [x29, 104]
+	str	w0, [x29, 188]
 	cmn	w0, #1
-	bne	.L2514
+	ldr	w3, [x29, 104]
+	bne	.L2408
 	mov	w2, 0
-	add	x1, x29, 104
-	mov	w0, w19
+	add	x1, x29, 188
+	mov	w0, w3
 	bl	pm_log2phys
-.L2514:
-	ldr	w0, [x29, 104]
-	cmn	w0, #1
-	beq	.L2546
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x21, x0
-	cbz	x0, .L2546
-	strb	wzr, [x0, 57]
-	strb	w20, [x0, 56]
-	stp	w24, w19, [x21, 32]
-	ldrb	w0, [x23, #:lo12:.LANCHOR45]
-	cmp	w20, w0
-	bcc	.L2516
-	adrp	x1, .LANCHOR169
-	adrp	x0, .LC0
-	mov	w2, 1048
-	add	x1, x1, :lo12:.LANCHOR169
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2517:
-	b	.L2517
-.L2516:
-	ldr	x0, [x21, 8]
-	lsl	w2, w20, 9
-	mov	w1, 0
-	bl	ftl_memset
-	mov	x0, x21
-	bl	ftl_write_buf
-	bl	ftl_write_commit
-	ldr	x1, [x22, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 76]
-	add	w0, w0, 1
-	str	w0, [x1, 76]
-	b	.L2546
-.L2519:
-	mov	w0, -1
-	b	.L2496
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlDiscard,"ax",@progbits
-	.align	2
-	.global	FtlDiscard
-	.type	FtlDiscard, %function
-FtlDiscard:
-	mov	w2, w1
-	mov	w3, 0
-	mov	w1, w0
-	mov	w0, 0
-	b	ftl_discard
-	.size	FtlDiscard, .-FtlDiscard
-	.section	.text.gc_do_copy_back,"ax",@progbits
-	.align	2
-	.global	gc_do_copy_back
-	.type	gc_do_copy_back, %function
-gc_do_copy_back:
-	sub	sp, sp, #224
-	adrp	x0, .LANCHOR67
-	stp	x29, x30, [sp, 16]
-	add	x29, sp, 16
-	ldrb	w0, [x0, #:lo12:.LANCHOR67]
-	stp	x19, x20, [sp, 32]
-	stp	x21, x22, [sp, 48]
-	stp	x23, x24, [sp, 64]
-	stp	x25, x26, [sp, 80]
-	stp	x27, x28, [sp, 96]
-	cbnz	w0, .L2549
-	bl	buf_alloc
-	mov	x19, x0
-	cbz	x0, .L2548
-	adrp	x20, .LANCHOR58
-	add	x3, x20, :lo12:.LANCHOR58
-	ldrh	w2, [x3, 26]
-	mov	w0, w2
-	bl	gc_get_src_ppa_from_index
-	add	w2, w2, 1
-	mov	w22, w0
-	str	w22, [x19, 40]
-	strh	w2, [x3, 26]
-	mov	w1, 1
-	mov	x0, x19
-	bl	sblk_read_page
-	ldr	w0, [x19, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2551
-	adrp	x0, .LANCHOR71
-	ldrh	w1, [x0, #:lo12:.LANCHOR71]
-	mov	w0, 21
-	sub	w2, w0, w1
-	mov	w0, 1
-	lsr	w1, w22, w1
-	lsl	w0, w0, w2
-	sub	w0, w0, #1
-	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
-	mov	x1, 0
-	udiv	w0, w0, w2
-	bl	ftl_sblk_dump
-.L2551:
-	ldr	w0, [x19, 52]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2552
-	adrp	x1, .LANCHOR170
+.L2408:
+	ldr	w0, [x29, 188]
+	cmp	w25, w0
+	bne	.L2409
+	ldr	x0, [x21, 24]
+	add	w26, w26, 1
+	mov	w3, w26
+	mov	w1, w25
+	ldr	w2, [x0, 4]
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+.L2409:
+	ldr	x0, [x29, 160]
+	cbz	x0, .L2410
+	ubfiz	x3, x27, 2, 32
+	ldr	w2, [x0, x3]
+	ldr	x0, [x21, 24]
+	ldr	w0, [x0, 4]
+	cmp	w0, w2
+	beq	.L2411
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2411
+	str	x3, [x29, 104]
+	mov	w1, w27
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
+	bl	printf
+	ldr	x3, [x29, 104]
+.L2411:
+	ldr	x1, [x21, 24]
+	ldr	x0, [x29, 160]
+	ldr	w1, [x1, 4]
+	ldr	w0, [x0, x3]
+	cmp	w1, w0
+	beq	.L2410
+	cmn	w0, #1
+	beq	.L2410
+	adrp	x1, .LANCHOR184
 	adrp	x0, .LC0
-	mov	w2, 556
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 1160
+	add	x1, x1, :lo12:.LANCHOR184
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2553:
-	b	.L2553
-.L2552:
-	ldr	x0, [x19, 24]
-	ldr	w21, [x0, 4]
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	str	w0, [x29, 160]
-	cmn	w0, #1
-	bne	.L2554
-	mov	w2, 0
-	add	x1, x29, 160
-	mov	w0, w21
-	bl	pm_log2phys
-.L2554:
-	ldr	w23, [x29, 160]
-	cmp	w22, w23
-	bne	.L2555
-	adrp	x0, .LANCHOR36
-	add	x0, x0, :lo12:.LANCHOR36
-	add	x1, x0, 2
-	add	x0, x0, 2050
-.L2558:
-	ldr	w2, [x1, 34]
-	cmp	w21, w2
-	bne	.L2556
-	ldrb	w2, [x1]
-	tbz	x2, 1, .L2556
-	mov	x0, x19
+.L2412:
+	b	.L2412
+.L2404:
+	cmp	w24, 2
+	bne	.L2406
+	ldr	w0, [x29, 168]
+	add	w8, w8, w0
+	adrp	x0, .LANCHOR67
+	add	w8, w8, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	orr	w25, w8, w0, lsl 24
+	b	.L2405
+.L2406:
+	add	w25, w19, w8
+	b	.L2405
+.L2410:
+	add	w27, w27, 1
+.L2403:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+.L2415:
+	cmp	w24, w20
+	bcs	.L2413
+	add	w23, w23, 1
+	and	w23, w23, 65535
+.L2417:
+	ldrb	w0, [x29, 201]
+	cmp	w0, w23
+	bls	.L2414
+	sxtw	x0, w23
+	mov	w20, 1
+	add	x0, x0, 8
+	lsl	x0, x0, 1
+	str	x0, [x29, 128]
+	b	.L2415
+.L2414:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2402
+.L2416:
+	mov	x0, x21
 	bl	buf_free
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2548
-	add	x20, x20, :lo12:.LANCHOR58
-	adrp	x0, .LC149
-	mov	w2, w22
-	mov	w1, w21
-	add	x0, x0, :lo12:.LC149
-	ldrh	w3, [x20, 26]
+	ldr	x0, [x29, 152]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2418
+	adrp	x0, .LANCHOR4
+	ldr	x1, [x29, 144]
+	mov	w3, w26
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LC125
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC125
 	bl	printf
-.L2548:
-	ldp	x19, x20, [sp, 32]
-	ldp	x21, x22, [sp, 48]
-	ldp	x23, x24, [sp, 64]
-	ldp	x25, x26, [sp, 80]
-	ldp	x27, x28, [sp, 96]
-	ldp	x29, x30, [sp, 16]
-	add	sp, sp, 224
+.L2418:
+	ldr	w0, [x29, 172]
+.L2398:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 272
 	ret
-.L2556:
-	add	x1, x1, 64
-	cmp	x0, x1
-	bne	.L2558
-	adrp	x0, .LANCHOR45
-	mov	w1, 10
-	strb	wzr, [x19, 57]
-	ldrb	w0, [x0, #:lo12:.LANCHOR45]
-	strb	w0, [x19, 56]
-	ldrb	w0, [x19, 2]
-	str	w21, [x19, 36]
-	orr	w0, w0, w1
-	strb	w0, [x19, 2]
-	ldr	x0, [x19, 24]
-	ldr	w0, [x0]
-	str	w0, [x19, 32]
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2559
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	add	x1, x20, :lo12:.LANCHOR58
-	mov	w3, w0
-	mov	w4, w22
-	adrp	x0, .LC150
-	mov	w2, w23
-	add	x0, x0, :lo12:.LC150
-	ldrh	w5, [x1, 26]
-	mov	w1, w21
-	bl	printf
-.L2559:
-	mov	x0, x19
-	bl	ftl_gc_write_buf
-	bl	ftl_write_commit
-	add	x20, x20, :lo12:.LANCHOR58
-	adrp	x0, .LANCHOR46
-	ldr	x1, [x0, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 60]
-	add	w0, w0, 1
-	str	w0, [x1, 60]
-	ldrh	w0, [x20, 28]
-	add	w0, w0, 1
-	strh	w0, [x20, 28]
-	b	.L2548
-.L2555:
-	adrp	x0, .LANCHOR22
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2560
-	add	x20, x20, :lo12:.LANCHOR58
-	mov	w0, w21
-	bl	lpa_hash_get_ppa
-	mov	w3, w0
-	mov	w4, w22
-	adrp	x0, .LC150
-	ldrh	w5, [x20, 26]
-	mov	w2, w23
+.L2419:
+	mov	w0, 0
+	b	.L2398
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.zftl_read,"ax",@progbits
+	.align	2
+	.global	zftl_read
+	.type	zftl_read, %function
+zftl_read:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w0
+	adrp	x0, .LANCHOR29
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	w24, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	w19, w1
+	stp	x25, x26, [sp, 64]
+	mov	x23, x3
+	stp	x27, x28, [sp, 80]
+	tbz	x0, 12, .L2440
+	mov	w3, w2
+	adrp	x0, .LC126
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC126
 	mov	w1, w21
-	add	x0, x0, :lo12:.LC150
 	bl	printf
-.L2560:
-	mov	x0, x19
-	bl	buf_free
-	b	.L2548
-.L2549:
-	adrp	x1, .LANCHOR60
-	adrp	x0, .LANCHOR64
-	stp	x0, x1, [x29, 128]
-	adrp	x24, .LANCHOR58
-	ldr	x22, [x1, #:lo12:.LANCHOR60]
-	ldrb	w25, [x0, #:lo12:.LANCHOR64]
-	add	x22, x22, 80
-	cmp	w25, 3
-	bne	.L2561
-	adrp	x0, .LANCHOR66
-	ldrb	w0, [x0, #:lo12:.LANCHOR66]
-	cbz	w0, .L2562
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w19, [x22, 9]
-	ldrh	w20, [x0, 314]
-	add	w21, w19, w19, lsl 1
-	sub	w19, w19, w19, lsl 2
-	sdiv	w21, w20, w21
-	madd	w19, w21, w19, w20
-	and	w19, w19, 65535
-.L2563:
-	adrp	x1, .LANCHOR68
-	ldrb	w0, [x22, 9]
-	add	x4, x24, :lo12:.LANCHOR58
-	mov	w2, 0
-	ldrh	w3, [x1, #:lo12:.LANCHOR68]
-	mul	w8, w25, w0
-	ldrh	w10, [x4, 24]
-	mul	w3, w3, w0
-	adrp	x0, .LANCHOR108
-	ldr	x7, [x0, #:lo12:.LANCHOR108]
-	sub	w3, w3, #1
-.L2566:
-	cmp	w2, w8
-	blt	.L2568
-.L2596:
-	mov	w23, 1
-	b	.L2564
-.L2562:
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w20, [x22, 9]
-	ldrh	w1, [x0, 314]
-	adrp	x0, .LANCHOR171
-	add	x0, x0, :lo12:.LANCHOR171
-	sdiv	w19, w1, w20
-	ldrh	w23, [x0, w19, sxtw 1]
-	msub	w19, w19, w20, w1
-	and	w19, w19, 65535
-	lsr	w21, w23, 3
-	and	w23, w23, 7
-	cmp	w23, 1
-	madd	w20, w21, w20, w19
-	add	w20, w20, w20, lsl 1
-	and	w20, w20, 65535
-	beq	.L2563
-.L2564:
-	adrp	x0, .LANCHOR22
-	str	x0, [x29, 112]
-	ldr	w1, [x0, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2569
-	adrp	x0, .LANCHOR108
-	ubfiz	x1, x20, 2, 16
-	mov	w6, w20
-	mov	w3, w19
-	ldr	x2, [x0, #:lo12:.LANCHOR108]
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrh	w4, [x0, 314]
-	adrp	x0, .LC151
-	ldr	w5, [x2, x1]
-	add	x0, x0, :lo12:.LC151
-	mov	w2, w23
-	mov	w1, w21
-	bl	printf
-.L2569:
-	adrp	x0, .LANCHOR36
-	str	wzr, [x29, 152]
-	add	x0, x0, :lo12:.LANCHOR36
-	str	x0, [x29, 120]
-.L2570:
-	ldrb	w2, [x22, 9]
-	ldr	w0, [x29, 152]
-	ldrh	w26, [x29, 152]
-	and	w0, w0, 65535
-	str	w0, [x29, 156]
-	mul	w1, w25, w2
+.L2440:
+	cbnz	w21, .L2441
+	adrp	x0, .LANCHOR59
+	mov	w21, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L2442:
+	add	w1, w19, w24
 	cmp	w0, w1
-	blt	.L2583
-	ldr	x0, [x29, 128]
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	cmp	w0, 3
-	add	x0, x29, 160
-	beq	.L2584
-	sub	w3, w1, #1
-	mov	w2, 0
-.L2585:
-	cmp	w2, w3
-	blt	.L2591
-	ldr	x0, [x0, w3, sxtw 3]
-	mov	w2, -1
-	strb	w2, [x0]
-	ldr	x0, [x29, 160]
-	bl	sblk_prog_page
-	b	.L2590
-.L2561:
-	adrp	x0, .LANCHOR74
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L2565
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w19, [x22, 9]
-	mov	w25, 1
-	ldrh	w20, [x0, 314]
-	sdiv	w21, w20, w19
-	msub	w19, w21, w19, w20
-	and	w19, w19, 65535
-	b	.L2563
-.L2565:
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w19, [x22, 9]
-	mov	w25, 2
-	ldrh	w20, [x0, 314]
-	sdiv	w21, w20, w19
-	msub	w19, w21, w19, w20
+	bcc	.L2467
+	adrp	x1, .LANCHOR53
+	adrp	x25, .LANCHOR52
+	add	w21, w21, w19
+	str	x1, [x29, 120]
+	ldr	x2, [x1, #:lo12:.LANCHOR53]
+	ldr	w0, [x2, 24]
+	add	w0, w0, w24
+	str	w0, [x2, 24]
+	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	add	w2, w24, w21
+	stp	w2, wzr, [x29, 136]
+	sub	w2, w2, #1
+	udiv	w27, w21, w0
+	udiv	w0, w2, w0
+	mov	w20, w27
+	sub	w26, w0, w27
+	str	w0, [x29, 132]
+	add	w26, w26, 1
+	adrp	x0, .LC110
+	add	x0, x0, :lo12:.LC110
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	str	x0, [x29, 104]
+.L2444:
+	cbnz	w26, .L2465
+	ldr	w0, [x29, 140]
+.L2439:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2441:
+	cmp	w21, 3
+	bhi	.L2467
+	lsl	w21, w21, 13
+	mov	w0, 8192
+	b	.L2442
+.L2465:
+	ldrb	w1, [x25, #:lo12:.LANCHOR52]
+	cmp	w20, w27
+	ldr	w0, [x29, 132]
+	and	w19, w1, 65535
+	ccmp	w20, w0, 4, ne
+	bne	.L2468
+	cmp	w20, w27
+	bne	.L2446
+	udiv	w22, w21, w1
+	and	w0, w24, 65535
+	msub	w1, w22, w1, w21
+	and	w22, w1, 65535
+	sub	w19, w19, w22
 	and	w19, w19, 65535
-	b	.L2563
-.L2568:
-	add	w5, w20, w2
-	cmp	w5, w3
-	beq	.L2596
-	sbfiz	x5, x5, 2, 32
-	ldr	w0, [x7, x5]
+	cmp	w24, w19
+	csel	w19, w0, w19, cc
+.L2445:
+	adrp	x0, .LANCHOR43
+	add	x1, x0, :lo12:.LANCHOR43
+	add	x1, x1, 2
+	mov	w0, 0
+.L2449:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L2447
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2447
+	ldr	x1, [x29, 104]
+	ubfiz	x0, x0, 6, 32
+	lsl	w2, w19, 9
+	ubfiz	x19, x19, 9, 16
+	add	x0, x1, x0
+	ubfiz	x22, x22, 9, 16
+	ldr	x1, [x0, 8]
+	mov	x0, x23
+	add	x23, x23, x19
+	add	x1, x1, x22
+	bl	ftl_memcpy
+.L2448:
+	add	w20, w20, 1
+	sub	w26, w26, #1
+	b	.L2444
+.L2446:
+	ldr	w0, [x29, 136]
+	msub	w19, w1, w20, w0
+	and	w19, w19, 255
+.L2468:
+	mov	w22, 0
+	b	.L2445
+.L2447:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2449
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 156]
 	cmn	w0, #1
-	bne	.L2567
-	ldrh	w6, [x4, 26]
-	cmp	w6, w10
-	bcs	.L2548
-	mov	w0, w6
-	bl	gc_get_src_ppa_from_index
-	add	w6, w6, 1
-	strh	w6, [x4, 26]
-	str	w0, [x7, x5]
-.L2567:
-	add	w2, w2, 1
-	and	w2, w2, 65535
-	b	.L2566
-.L2583:
+	bne	.L2450
+	mov	w2, 0
+	add	x1, x29, 156
+	mov	w0, w20
+	bl	pm_log2phys
+.L2450:
 	ldr	w0, [x29, 156]
-	add	w0, w20, w0
-	str	w0, [x29, 144]
-	sxtw	x27, w0
-	adrp	x0, .LANCHOR65
-	ldr	x0, [x0, #:lo12:.LANCHOR65]
-	ldrb	w0, [x0, x27]
-	cmp	w0, 255
-	bne	.L2571
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x28, x0
-	cbnz	x0, .L2572
-	bl	sblk_wait_write_queue_completed
-	bl	ftl_write_completed
-	bl	gc_write_completed
-	bl	gc_free_temp_buf
+	cmn	w0, #1
+	bne	.L2451
+	add	x22, x25, :lo12:.LANCHOR52
+	mov	w19, 0
+.L2452:
+	ldrb	w0, [x22]
+	cmp	w19, w0
+	bcs	.L2448
+	madd	w0, w20, w0, w19
+	cmp	w21, w0
+	bhi	.L2453
+	ldr	w1, [x29, 136]
+	cmp	w1, w0
+	bls	.L2453
+	mov	x0, x23
+	add	x23, x23, 512
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+.L2453:
+	add	w19, w19, 1
+	b	.L2452
+.L2451:
 	mov	w0, 0
 	bl	buf_alloc
 	mov	x28, x0
-	cbz	x0, .L2548
-.L2572:
-	adrp	x0, .LANCHOR65
-	ldrb	w1, [x28, 1]
-	adrp	x5, .LANCHOR68
-	adrp	x6, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR65]
-	strb	w1, [x0, x27]
-	add	x1, x24, :lo12:.LANCHOR58
-	strb	w23, [x28, 61]
-	ldrh	w7, [x5, #:lo12:.LANCHOR68]
-	ldrb	w0, [x1, 7]
+	cbnz	x0, .L2455
+	bl	ftl_read_ahead
+	b	.L2444
+.L2455:
+	ldr	x0, [x29, 120]
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 40]
 	add	w0, w0, 1
-	strb	w0, [x1, 7]
-	add	w0, w26, w20
-	strh	w0, [x28, 48]
-	ldr	w1, [x29, 144]
-	ldrb	w0, [x22, 9]
-	mul	w0, w0, w7
-	sub	w0, w0, #1
-	cmp	w1, w0
-	bne	.L2573
-	adrp	x0, .LANCHOR107
-	adrp	x4, .LANCHOR69
-	stp	x6, x5, [x29, 96]
-	ldr	x1, [x0, #:lo12:.LANCHOR107]
-	mov	w0, -1
-	str	x4, [x29, 144]
-	str	w0, [x1, x27, lsl 2]
-	ldr	x0, [x28, 8]
-	ldrb	w2, [x4, #:lo12:.LANCHOR69]
-	mul	w2, w2, w7
-	lsl	w2, w2, 2
-	bl	ftl_memcpy
-	ldp	x6, x5, [x29, 96]
-	ldr	x4, [x29, 144]
-	ldr	x7, [x28, 8]
-	ldrh	w0, [x5, #:lo12:.LANCHOR68]
-	ldrb	w1, [x4, #:lo12:.LANCHOR69]
-	mul	w0, w0, w1
-	ldr	x1, [x6, #:lo12:.LANCHOR108]
-	lsl	w2, w0, 2
-	add	x0, x7, x0, sxtw 2
-	bl	ftl_memcpy
-	adrp	x0, .LANCHOR45
-	mov	w1, 0
-	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	str	w0, [x1, 40]
+	ldr	w0, [x29, 156]
+	stp	w0, w0, [x28, 40]
+	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	cmp	w0, w19
+	bne	.L2457
+	str	x23, [x28, 16]
+.L2457:
+	mov	w1, 1
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w10, [x28, 52]
+	cmn	w10, #1
+	bne	.L2458
+	adrp	x0, .LANCHOR5
+	str	w10, [x29, 140]
+	ldr	x1, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x1, 552]
+	add	w0, w0, 1
+	str	w0, [x1, 552]
+.L2459:
 	ldr	x0, [x28, 24]
-	lsl	w2, w2, 1
-	bl	ftl_memset
-	ldr	x6, [x28, 24]
-	mov	w0, 15555
-	ldr	x5, [x29, 104]
-	movk	w0, 0xf55f, lsl 16
-	ldr	x4, [x29, 144]
-	ldrh	w1, [x5, #:lo12:.LANCHOR68]
-	str	w0, [x6]
-	ldrb	w0, [x4, #:lo12:.LANCHOR69]
-	mul	w1, w1, w0
-	ldr	x0, [x28, 8]
-	lsl	w1, w1, 2
-	bl	js_hash
-	str	w0, [x6, 4]
-	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	ldr	w0, [x0, 132]
-	str	w0, [x6, 8]
-.L2571:
-	adrp	x0, .LANCHOR65
-	ldr	w5, [x29, 156]
-	add	x3, x29, 160
-	ldr	x4, [x0, #:lo12:.LANCHOR65]
-	adrp	x0, .LANCHOR36
-	add	x2, x0, :lo12:.LANCHOR36
-	ldrb	w1, [x4, x27]
-	ubfiz	x0, x1, 6, 8
-	add	x0, x2, x0
-	add	x2, x2, x1, lsl 6
-	str	x0, [x3, w5, sxtw 3]
-	mov	w0, 1
-	adrp	x5, .LANCHOR109
-	strh	w0, [x2, 50]
-	ldr	x0, [x29, 128]
-	strb	w23, [x2, 61]
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	cmp	w0, 3
-	bne	.L2578
-	udiv	w0, w26, w0
-	adrp	x6, .LANCHOR75
-	ldrh	w6, [x6, #:lo12:.LANCHOR75]
-	add	w3, w0, w19
-	add	w0, w0, w0, lsl 1
-	add	x3, x22, x3, sxtw 1
-	sub	w0, w26, w0
-	and	w0, w0, 65535
-	add	w0, w0, 1
-	ldrh	w3, [x3, 16]
-	mul	w3, w3, w6
-	ldrh	w6, [x2, 48]
-	orr	w3, w3, w21
-	str	w3, [x2, 40]
-	ldr	x2, [x5, #:lo12:.LANCHOR109]
-	orr	w0, w3, w0, lsl 24
-	str	w0, [x2, x6, lsl 2]
-.L2579:
+	ldr	w5, [x0, 4]
+	cmp	w20, w5
+	beq	.L2460
+	ldr	w4, [x0]
+	mov	w2, w20
+	ldp	w6, w7, [x0, 8]
+	str	w10, [x29, 128]
+	ldrb	w1, [x28, 1]
+	ldr	w3, [x29, 156]
 	ldr	x0, [x29, 112]
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2582
-	ldr	x0, [x29, 120]
-	mov	w2, w23
-	ldrb	w4, [x4, x27]
-	add	x1, x0, x1, lsl 6
-	add	x0, x24, :lo12:.LANCHOR58
-	ldrb	w3, [x0, 6]
-	ldr	x0, [x1, 24]
-	ldrb	w7, [x1, 1]
-	ldrh	w6, [x1, 48]
-	ldr	w0, [x0, 4]
-	str	w0, [sp, 8]
-	mov	w0, 3
-	udiv	w26, w26, w0
-	adrp	x0, .LC152
-	add	x0, x0, :lo12:.LC152
-	add	w26, w26, w19
-	str	w26, [sp]
-	ldr	w5, [x1, 40]
-	ldr	w1, [x29, 156]
 	bl	printf
-.L2582:
-	ldr	w0, [x29, 152]
-	add	w0, w0, 1
-	str	w0, [x29, 152]
-	b	.L2570
-.L2573:
-	ldr	x0, [x6, #:lo12:.LANCHOR108]
-	lsl	x4, x27, 2
-	mov	w1, 1
-	str	x4, [x29, 144]
-	ldr	w0, [x0, x4]
-	str	w0, [x28, 40]
-	mov	x0, x28
-	bl	sblk_read_page
-	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2575
-	adrp	x0, .LANCHOR71
-	ldr	w1, [x28, 40]
-	ldrh	w5, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR96
+	ldr	w1, [x29, 156]
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
 	mov	w0, 21
-	sub	w2, w0, w5
+	sub	w2, w0, w3
 	mov	w0, 1
-	lsr	w1, w1, w5
+	lsr	w1, w1, w3
 	lsl	w0, w0, w2
 	sub	w0, w0, #1
 	and	w0, w0, w1
-	adrp	x1, .LANCHOR70
-	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
 	mov	x1, 0
 	udiv	w0, w0, w2
 	bl	ftl_sblk_dump
-	ldr	w0, [x28, 52]
-	ldr	x4, [x29, 144]
-	cmp	w0, 512
-	ccmn	w0, #1, 4, ne
-	bne	.L2575
+	ldr	w10, [x29, 128]
+.L2460:
 	ldr	x0, [x28, 24]
-	mov	w1, -1
-	str	w1, [x0, 4]
-	ldr	w0, [x28, 52]
-	cmp	w0, 512
-	ccmp	w0, w1, 4, ne
-	bne	.L2575
-	adrp	x1, .LANCHOR170
+	ldr	w0, [x0, 4]
+	cmp	w20, w0
+	bne	.L2461
+	cmn	w10, #1
+	bne	.L2462
+.L2461:
+	adrp	x1, .LANCHOR185
 	adrp	x0, .LC0
-	mov	w2, 671
-	add	x1, x1, :lo12:.LANCHOR170
+	mov	w2, 976
+	add	x1, x1, :lo12:.LANCHOR185
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2576:
-	b	.L2576
-.L2575:
-	ldr	x0, [x28, 24]
-	adrp	x1, .LANCHOR47
-	ldr	w1, [x1, #:lo12:.LANCHOR47]
-	ldr	w2, [x0, 4]
-	cmp	w2, w1
-	bcc	.L2577
-	mov	w1, -1
-	str	w1, [x0, 4]
-.L2577:
-	adrp	x1, .LANCHOR107
-	ldr	w2, [x0, 4]
-	ldr	x1, [x1, #:lo12:.LANCHOR107]
-	str	w2, [x1, x4]
-	ldr	w1, [x28, 40]
-	str	w1, [x0, 8]
-	b	.L2571
-.L2578:
-	cmp	w0, 2
-	bne	.L2580
-	adrp	x0, .LANCHOR74
-	adrp	x3, .LANCHOR75
-	ldrb	w0, [x0, #:lo12:.LANCHOR74]
-	cbnz	w0, .L2581
+.L2463:
+	b	.L2463
+.L2458:
+	cmp	w10, 256
+	bne	.L2459
+	adrp	x0, .LANCHOR96
+	mov	w4, 21
+	mov	w5, 1
+	stp	w10, w5, [x29, 96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
 	ldr	w0, [x29, 156]
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
-	add	w0, w19, w0
-	add	x0, x22, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-.L2639:
-	orr	w0, w0, 33554432
-	str	w0, [x2, 40]
-.L2580:
-	ldr	x0, [x29, 120]
-	add	x0, x0, x1, lsl 6
-	ldrh	w2, [x0, 48]
-	ldr	w3, [x0, 40]
-	ldr	x0, [x5, #:lo12:.LANCHOR109]
-	str	w3, [x0, x2, lsl 2]
-	b	.L2579
-.L2581:
-	add	w0, w19, w26, lsr 1
-	ldrh	w3, [x3, #:lo12:.LANCHOR75]
-	add	x0, x22, x0, sxtw 1
-	ldrh	w0, [x0, 16]
-	madd	w0, w0, w3, w21
-	and	w3, w26, 1
-	add	w0, w0, w3
-	b	.L2639
-.L2584:
-	adrp	x1, .LANCHOR66
-	ldrb	w3, [x1, #:lo12:.LANCHOR66]
-	ldr	x1, [x29, 160]
-	cbz	w3, .L2586
-.L2589:
-	strb	wzr, [x1, 60]
-	b	.L2587
-.L2586:
-	cmp	w23, 1
-	bne	.L2588
-	mov	w3, 9
-.L2638:
-	strb	w3, [x1, 60]
-.L2587:
-	add	x1, x0, 24
-	bl	sblk_xlc_prog_pages
-.L2590:
-	adrp	x1, .LANCHOR66
-	ldrb	w3, [x22, 9]
-	ldrb	w1, [x1, #:lo12:.LANCHOR66]
-	and	w0, w3, 65535
-	cbz	w1, .L2592
-	add	w0, w0, w0, lsl 1
-.L2593:
-	adrp	x1, .LANCHOR46
-	add	x24, x24, :lo12:.LANCHOR58
-	ldr	x1, [x1, #:lo12:.LANCHOR46]
-	ldr	w2, [x1, 52]
-	add	w2, w2, w0
-	str	w2, [x1, 52]
-	ldrh	w1, [x24, 314]
-	add	w0, w0, w1
-	adrp	x1, .LANCHOR68
-	and	w0, w0, 65535
-	strh	w0, [x24, 314]
-	ldrh	w1, [x1, #:lo12:.LANCHOR68]
-	mul	w1, w1, w3
-	cmp	w0, w1
-	blt	.L2594
-	ldr	x0, [x29, 136]
-	ldr	x0, [x0, #:lo12:.LANCHOR60]
-	strh	wzr, [x0, 86]
-.L2594:
-	bl	gc_write_completed
-	b	.L2548
-.L2588:
-	cmp	w23, 2
-	bne	.L2589
-	mov	w3, 13
-	b	.L2638
-.L2591:
-	ldr	x4, [x0, w2, sxtw 3]
-	add	w2, w2, 1
-	ldr	x5, [x0, w2, sxtw 3]
-	and	w2, w2, 65535
-	ldrb	w5, [x5, 1]
-	strb	w5, [x4]
-	b	.L2585
-.L2592:
-	adrp	x1, .LANCHOR74
-	ldrb	w2, [x1, #:lo12:.LANCHOR74]
+	sub	w4, w4, w1
+	ldp	w2, w3, [x28, 36]
+	lsl	w4, w5, w4
+	lsr	w0, w0, w1
+	sub	w4, w4, #1
+	and	w4, w4, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w4, w4, w0
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	and	w1, w4, 65535
+	str	w4, [x29, 128]
+	bl	printf
+	ldr	w5, [x29, 100]
+	mov	w2, 0
+	ldr	w4, [x29, 128]
+	mov	w1, w5
+	mov	w0, w4
+	bl	gc_add_sblk
+	ldr	w10, [x29, 96]
+	b	.L2459
+.L2462:
+	ldr	x0, [x28, 16]
+	cbnz	x0, .L2464
+	ldr	x1, [x28, 8]
+	ubfiz	x22, x22, 9, 16
+	lsl	w2, w19, 9
+	mov	x0, x23
+	add	x1, x1, x22
+	bl	ftl_memcpy
+.L2464:
+	ubfiz	x19, x19, 9, 16
+	mov	x0, x28
+	add	x23, x23, x19
+	bl	buf_free
+	b	.L2448
+.L2467:
+	mov	w0, -1
+	b	.L2439
+	.size	zftl_read, .-zftl_read
+	.section	.text.zftl_vendor_read,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_read
+	.type	zftl_vendor_read, %function
+zftl_vendor_read:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_read
+	.size	zftl_vendor_read, .-zftl_vendor_read
+	.section	.text.zftl_sys_read,"ax",@progbits
+	.align	2
+	.global	zftl_sys_read
+	.type	zftl_sys_read, %function
+zftl_sys_read:
+	mov	x3, x2
+	mov	w2, w1
 	mov	w1, w0
-	ubfiz	w0, w0, 1, 15
-	cmp	w2, 0
-	csel	w0, w0, w1, ne
-	b	.L2593
-	.size	gc_do_copy_back, .-gc_do_copy_back
-	.section	.text.do_gc,"ax",@progbits
+	mov	w0, 2
+	b	zftl_read
+	.size	zftl_sys_read, .-zftl_sys_read
+	.section	.text.StorageSysDataLoad,"ax",@progbits
 	.align	2
-	.global	do_gc
-	.type	do_gc, %function
-do_gc:
-	stp	x29, x30, [sp, -96]!
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 512
 	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	adrp	x24, .LANCHOR46
 	stp	x19, x20, [sp, 16]
-	adrp	x20, .LANCHOR104
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	adrp	x23, .LANCHOR60
-	stp	x21, x22, [sp, 32]
-	stp	x25, x26, [sp, 64]
-	ldrb	w3, [x20, #:lo12:.LANCHOR104]
-	ldrh	w19, [x1, 116]
-	ldrh	w21, [x1, 114]
-	cmp	w3, 6
-	stp	x27, x28, [sp, 80]
-	ldr	x25, [x23, #:lo12:.LANCHOR60]
-	add	w21, w19, w21
-	bhi	.L2640
-	adrp	x2, .L2643
-	and	w21, w21, 65535
-	add	x2, x2, :lo12:.L2643
-	ldrh	w2, [x2,w3,uxtw #1]
-	adr	x3, .Lrtx2643
-	add	x2, x3, w2, sxth #2
-	br	x2
-.Lrtx2643:
-	.section	.rodata.do_gc,"a",@progbits
-	.align	0
-	.align	2
-.L2643:
-	.2byte	(.L2642 - .Lrtx2643) / 4
-	.2byte	(.L2644 - .Lrtx2643) / 4
-	.2byte	(.L2645 - .Lrtx2643) / 4
-	.2byte	(.L2646 - .Lrtx2643) / 4
-	.2byte	(.L2647 - .Lrtx2643) / 4
-	.2byte	(.L2648 - .Lrtx2643) / 4
-	.2byte	(.L2649 - .Lrtx2643) / 4
-	.section	.text.do_gc
-.L2642:
-	ldrh	w2, [x1, 118]
-	adrp	x22, .LANCHOR67
-	ldrh	w3, [x25, 80]
-	add	w19, w19, w2
-	mov	w2, 65535
-	and	w19, w19, 65535
-	cmp	w3, w2
-	beq	.L2650
-	adrp	x0, .LANCHOR22
-	cmp	w19, 7
-	mov	w23, 3
-	csinc	w23, w23, wzr, hi
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	tbz	x0, 8, .L2652
-	ldrh	w7, [x25, 122]
-	adrp	x0, .LC153
-	ldrh	w6, [x25, 120]
-	mov	w4, w19
-	ldrh	w5, [x25, 124]
-	mov	w3, w21
-	ldrb	w2, [x22, #:lo12:.LANCHOR67]
-	mov	w1, 1348
-	add	x0, x0, :lo12:.LC153
-	bl	printf
-.L2652:
-	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+	mov	x3, x19
+	mov	w1, w20
+	ldp	x19, x20, [sp, 16]
 	mov	w2, 1
-	mov	w1, w23
-	bl	gc_search_src_blk
-	cmp	w0, 0
-	ble	.L2640
-.L2653:
-	mov	w0, 1
-.L2774:
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	b	.L2640
-.L2650:
-	ldrh	w25, [x1, 122]
-	cmp	w0, 1
-	ldrh	w27, [x1, 124]
-	bne	.L2654
-	bl	gc_scan_static_data
-	bl	gc_static_wearleveling
-.L2654:
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w26, 1
-	strb	w26, [x22, #:lo12:.LANCHOR67]
-	ldrh	w5, [x0, 124]
-	cbz	w5, .L2655
-	adrp	x1, .LANCHOR22
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	strb	w26, [x20, #:lo12:.LANCHOR104]
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2640
-	ldrh	w7, [x0, 122]
-	mov	w4, w19
-	ldrh	w6, [x0, 120]
-	mov	w3, w21
+	ldp	x29, x30, [sp], 32
+	mov	w0, 2
+	b	zftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.FlashBootVendorRead,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorRead
+	.type	FlashBootVendorRead, %function
+FlashBootVendorRead:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_read
+	.size	FlashBootVendorRead, .-FlashBootVendorRead
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	and	w0, w0, 255
+	b	zftl_read
+	.size	ftl_read, .-ftl_read
+	.section	.text.vpn_check,"ax",@progbits
+	.align	2
+	.global	vpn_check
+	.type	vpn_check, %function
+vpn_check:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR5
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR54
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR4
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR2
+	stp	x27, x28, [sp, 80]
+	bl	dump_ftl_info
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	add	x21, x21, :lo12:.LANCHOR54
+	add	x23, x22, :lo12:.LANCHOR2
+	mov	w25, 0
+	adrp	x19, check_vpc_tbl
+	ldrh	w3, [x0, 80]
+	ldrh	w2, [x0, 48]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC128
+	add	x0, x0, :lo12:.LC128
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldrh	w1, [x0, 16]
+	ldrh	w2, [x0, 22]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC129
+	add	x0, x0, :lo12:.LC129
+	sub	w4, w3, w2
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	ldr	x3, [x24, #:lo12:.LANCHOR4]
+	ldrh	w1, [x0, 48]
+	ldrh	w2, [x0, 54]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC130
+	add	x0, x0, :lo12:.LC130
+	sub	w4, w3, w2
+	bl	printf
+	mov	w2, 4608
+	mov	w1, 0
+	add	x0, x19, :lo12:check_vpc_tbl
+	bl	ftl_memset
+.L2484:
+	ldr	w0, [x21]
+	cmp	w25, w0
+	bcc	.L2492
+	adrp	x0, .LANCHOR2
+	adrp	x23, .LC133
+	add	x28, x0, :lo12:.LANCHOR2
+	mov	x5, x0
+	add	x23, x23, :lo12:.LC133
+	mov	w22, 0
+	mov	w21, 0
+.L2493:
+	ldrh	w0, [x28]
+	cmp	w0, w21
+	bhi	.L2495
+	adrp	x20, .LC134
+	add	x26, x5, :lo12:.LANCHOR2
+	add	x19, x19, :lo12:check_vpc_tbl
+	add	x20, x20, :lo12:.LC134
+	mov	w28, 0
+	adrp	x27, .LANCHOR3
+.L2496:
+	ldrh	w1, [x26]
+	cmp	w1, w28
+	bhi	.L2501
+	mov	w2, w22
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC135
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC135
+	bl	printf
 	ldp	x19, x20, [sp, 16]
-	mov	w2, 0
 	ldp	x21, x22, [sp, 32]
-	mov	w1, 1373
 	ldp	x23, x24, [sp, 48]
-	adrp	x0, .LC153
 	ldp	x25, x26, [sp, 64]
-	add	x0, x0, :lo12:.LC153
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	printf
-.L2655:
-	cmp	w21, 47
-	bhi	.L2657
-	cmp	w19, 1
-	bls	.L2658
-	cmp	w19, 16
-	bhi	.L2659
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	ldrh	w0, [x0, 120]
-	cmp	w0, 127
-	bhi	.L2660
-.L2659:
-	mov	w2, 16
-	mov	w1, 3
-.L2779:
-	mov	w0, 1
-.L2772:
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-.L2661:
-	cbnz	w0, .L2653
-	b	.L2640
-.L2660:
-	mov	w2, 8
-	mov	w1, 2
-	b	.L2779
-.L2658:
-	adrp	x1, .LANCHOR22
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	ldr	w1, [x1, #:lo12:.LANCHOR22]
-	tbz	x1, 8, .L2662
-	ldrh	w7, [x0, 122]
-	mov	w5, 0
-	ldrh	w6, [x0, 120]
-	mov	w4, w19
-	adrp	x0, .LC153
-	mov	w3, w21
+	ldp	x29, x30, [sp], 128
+	ret
+.L2492:
+	mov	w0, w25
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 124]
+	cmn	w0, #1
+	bne	.L2485
 	mov	w2, 0
-	mov	w1, 1386
-	add	x0, x0, :lo12:.LC153
+	add	x1, x29, 124
+	mov	w0, w25
+	bl	pm_log2phys
+.L2486:
+	ldr	w2, [x29, 124]
+	cmn	w2, #1
+	beq	.L2488
+	adrp	x0, .LANCHOR96
+	mov	w3, 21
+	ldrh	w0, [x0, #:lo12:.LANCHOR96]
+	sub	w1, w3, w0
+	mov	w3, 1
+	lsr	w0, w2, w0
+	lsl	w3, w3, w1
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w3, w3, w0
+	ldrh	w0, [x22, #:lo12:.LANCHOR2]
+	and	w26, w3, 65535
+	and	w3, w3, 65535
+	cmp	w0, w26
+	bls	.L2489
+	add	x0, x19, :lo12:check_vpc_tbl
+	sxtw	x3, w3
+	ldrh	w1, [x0, x3, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x0, x3, lsl 1]
+.L2490:
+	ldrh	w0, [x23]
+	cmp	w0, w26
+	bhi	.L2488
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC0
+	mov	w2, 1206
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2662:
-	cmp	w21, 16
-	bls	.L2663
-	mov	w2, 1
-.L2777:
-	mov	w1, 2
-	b	.L2771
-.L2663:
-	mov	w2, 16
-.L2773:
-	mov	w1, 1
-.L2771:
-	ldrb	w0, [x22, #:lo12:.LANCHOR67]
-	b	.L2772
-.L2657:
-	add	w25, w25, w27
-	cmp	w21, 127
-	and	w25, w25, 65535
-	bhi	.L2664
-	sub	w0, w19, #2
-	and	w0, w0, 65535
-	cmp	w0, 13
-	bhi	.L2665
-	mov	w2, 8
-	mov	w1, 2
-	mov	w0, w26
-	bl	gc_search_src_blk
-	tst	w0, 65535
-	bne	.L2653
-.L2668:
-	adrp	x0, .LANCHOR64
-	adrp	x26, .LANCHOR58
-	ldrb	w0, [x0, #:lo12:.LANCHOR64]
-	cmp	w0, 2
-	adrp	x0, .LANCHOR22
-	bne	.L2768
-	add	x1, x26, :lo12:.LANCHOR58
-	cmp	w19, 1
-	strh	wzr, [x1, 34]
-	bls	.L2669
-.L2672:
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
+.L2491:
+	b	.L2491
+.L2485:
+	adrp	x1, .LANCHOR96
+	ldrh	w3, [x1, #:lo12:.LANCHOR96]
+	mov	w1, 21
+	sub	w2, w1, w3
 	mov	w1, 1
-	strb	w1, [x22, #:lo12:.LANCHOR67]
-	tbz	x0, 8, .L2671
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w4, w19
-	mov	w3, w21
-	mov	w2, 1
-	mov	w1, 1411
-	ldrh	w7, [x0, 122]
-	ldrh	w6, [x0, 120]
-	ldrh	w5, [x0, 124]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
+	lsr	w0, w0, w3
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w0, w1, w0
+	adrp	x1, .LANCHOR95
+	ldrb	w1, [x1, #:lo12:.LANCHOR95]
+	udiv	w0, w0, w1
+	ldrh	w1, [x22, #:lo12:.LANCHOR2]
+	cmp	w1, w0, uxth
+	bhi	.L2486
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC0
+	mov	w2, 1196
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2671:
-	add	x26, x26, :lo12:.LANCHOR58
-	mov	w2, 16
-	mov	w1, 1
-	ldrh	w0, [x26, 34]
-	strh	wzr, [x26, 32]
-	add	w0, w0, 1
-	strh	w0, [x26, 34]
-	ldrb	w0, [x22, #:lo12:.LANCHOR67]
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-	cmp	w0, 7
-	ccmp	w19, 31, 2, ls
-	bls	.L2673
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	ldrh	w2, [x1, 120]
-	adrp	x1, .LANCHOR163
-	ldrh	w1, [x1, #:lo12:.LANCHOR163]
-	cmp	w2, w1
-	bls	.L2661
-.L2673:
-	cmp	w25, 63
-	bhi	.L2674
-	mov	w2, 8
-	b	.L2777
-.L2665:
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0, lsr 1
-	bcs	.L2668
-.L2640:
+.L2487:
+	b	.L2487
+.L2489:
+	mov	w1, w25
+	adrp	x0, .LC131
+	add	x0, x0, :lo12:.LC131
+	bl	printf
+	adrp	x0, .LANCHOR52
+	mov	w2, 4
+	ldrb	w3, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR117+8
+	ldr	x1, [x0, #:lo12:.LANCHOR117+8]
+	adrp	x0, .LC132
+	lsl	w3, w3, 7
+	add	x0, x0, :lo12:.LC132
+	bl	rknand_print_hex
+	b	.L2490
+.L2488:
+	add	w25, w25, 1
+	b	.L2484
+.L2495:
+	uxtw	x0, w21
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	lsl	x27, x0, 1
+	add	x25, x19, :lo12:check_vpc_tbl
+	sxtw	x26, w21
+	ldrh	w3, [x1, x27]
+	ldrh	w2, [x25, x26, lsl 1]
+	cmp	w3, w2
+	beq	.L2494
+	adrp	x1, .LANCHOR3
+	str	x5, [x29, 104]
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	add	x0, x1, x0, lsl 2
+	mov	w1, w21
+	ldrb	w4, [x0, 2]
+	mov	x0, x23
+	ubfx	x4, x4, 5, 3
+	bl	printf
+	ldr	x0, [x24, #:lo12:.LANCHOR4]
+	mov	w1, 65535
+	ldr	x5, [x29, 104]
+	ldrh	w0, [x0, x27]
+	cmp	w0, w1
+	beq	.L2494
+	ldrh	w1, [x25, x26, lsl 1]
+	cmp	w1, w0
+	bls	.L2494
+	ldr	x0, [x20, #:lo12:.LANCHOR5]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w21
+	beq	.L2494
+	ldrh	w1, [x0, 80]
+	cmp	w1, w21
+	beq	.L2494
+	ldrh	w0, [x0, 48]
+	cmp	w0, w21
+	csinc	w22, w22, wzr, eq
+.L2494:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2493
+.L2501:
+	ldr	x0, [x27, #:lo12:.LANCHOR3]
+	uxtw	x21, w28
+	add	x0, x0, x21, lsl 2
+	ldrb	w1, [x0, 2]
+	tst	w1, 224
+	bne	.L2497
+	sxtw	x23, w28
+	ldrh	w1, [x19, x23, lsl 1]
+	cbnz	w1, .L2498
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	lsl	x25, x21, 1
+	ldrh	w1, [x1, x25]
+	cbz	w1, .L2499
+	mov	w1, w28
+	mov	x0, x20
+	bl	printf
+.L2499:
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	strh	wzr, [x1, x25]
+.L2498:
+	ldr	x1, [x24, #:lo12:.LANCHOR4]
+	ldrh	w1, [x1, x21, lsl 1]
+	cbz	w1, .L2497
+	ldrh	w1, [x19, x23, lsl 1]
+	cbz	w1, .L2497
+	adrp	x1, .LANCHOR186
+	adrp	x0, .LC0
+	mov	w2, 1238
+	add	x1, x1, :lo12:.LANCHOR186
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2500:
+	b	.L2500
+.L2497:
+	add	w1, w28, 1
+	and	w28, w1, 65535
+	b	.L2496
+	.size	vpn_check, .-vpn_check
+	.section	.text.gc_scan_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	stp	x29, x30, [sp, -96]!
+	mov	w0, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR63
+	stp	x21, x22, [sp, 32]
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w1, w0
+	bne	.L2516
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC0
+	mov	w2, 897
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2517:
+	b	.L2517
+.L2516:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2518
+	adrp	x2, .LANCHOR4
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC136
+	add	x0, x0, :lo12:.LC136
+	bl	printf
+.L2518:
+	ldrh	w0, [x19, #:lo12:.LANCHOR63]
+	add	x13, x19, :lo12:.LANCHOR63
+	add	x1, x13, 40
+	bl	ftl_get_blk_list_in_sblk
+	and	w1, w0, 255
+	strb	w1, [x13, 5]
+	cbnz	w1, .L2519
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR63]
+.L2555:
+	mov	w0, 0
+.L2515:
 	ldp	x19, x20, [sp, 16]
 	ldp	x21, x22, [sp, 32]
 	ldp	x23, x24, [sp, 48]
 	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
 	ldp	x29, x30, [sp], 96
 	ret
-.L2768:
-	cmp	w19, 1
-	bls	.L2669
-	add	x1, x26, :lo12:.LANCHOR58
-	ldrh	w1, [x1, 34]
-	cmp	w1, 3
-	bls	.L2672
-.L2669:
-	add	x26, x26, :lo12:.LANCHOR58
-	ldr	w0, [x0, #:lo12:.LANCHOR22]
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	strh	wzr, [x26, 34]
-	tbz	x0, 8, .L2675
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w4, w19
-	mov	w3, w21
-	mov	w2, 0
-	mov	w1, 1426
-	ldrh	w7, [x0, 122]
-	ldrh	w6, [x0, 120]
-	ldrh	w5, [x0, 124]
-	adrp	x0, .LC153
-	add	x0, x0, :lo12:.LC153
-	bl	printf
-.L2675:
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0, lsr 1
-	bls	.L2640
-	mov	w2, 16
-	cmp	w19, 31
-	bhi	.L2773
-	b	.L2778
-.L2674:
-	mov	w2, 16
-.L2778:
-	mov	w1, 3
-	b	.L2771
-.L2664:
-	cmp	w21, 255
-	bhi	.L2677
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0
-	bls	.L2677
-	cmp	w25, w0, lsr 1
-	bcc	.L2640
-	strb	wzr, [x22, #:lo12:.LANCHOR67]
-	mov	w2, 16
-	mov	w1, w26
-	mov	w0, 0
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-	cmp	w0, 7
-	ccmp	w19, 4, 0, ls
-	bls	.L2661
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w1, 255
-	mov	w2, 128
-	add	x0, x0, 136
-	strh	wzr, [x0, -16]
-	bl	ftl_memset
-	strb	w26, [x22, #:lo12:.LANCHOR67]
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	ldrh	w1, [x0, 120]
-	adrp	x0, .LANCHOR163
-	ldrh	w0, [x0, #:lo12:.LANCHOR163]
-	cmp	w1, w0
-	bls	.L2678
-	cmp	w19, 16
-	bls	.L2679
-.L2681:
-	mov	w2, 8
-	mov	w1, 2
-.L2770:
-	mov	w0, 1
-	bl	gc_search_src_blk
-	mov	w1, 1
-	and	w0, w0, 65535
-	strb	w1, [x20, #:lo12:.LANCHOR104]
-	b	.L2661
-.L2678:
-	cmp	w19, 32
-	bls	.L2679
-	mov	w2, 16
-	mov	w1, w26
-	b	.L2770
-.L2679:
-	cmp	w19, 7
-	bls	.L2681
-	mov	w2, 16
-	mov	w1, 3
-	b	.L2770
-.L2677:
-	sub	w19, w19, #2
-	and	w19, w19, 65535
-	cmp	w19, 5
-	bhi	.L2640
-	adrp	x0, .LANCHOR165
-	ldrh	w0, [x0, #:lo12:.LANCHOR165]
-	cmp	w25, w0, lsr 1
-	bls	.L2640
-	mov	w2, 16
-	mov	w1, 2
-	mov	w0, 1
-	bl	gc_search_src_blk
-	and	w0, w0, 65535
-	cmp	w0, 15
-	bhi	.L2653
-	ldr	x3, [x23, #:lo12:.LANCHOR60]
-	mov	w2, 128
-	ldrb	w1, [x22, #:lo12:.LANCHOR67]
-	ldp	x19, x20, [sp, 16]
-	add	x0, x3, x1, sxtw 1
-	ubfiz	x1, x1, 7, 8
-	ldp	x21, x22, [sp, 32]
-	strh	wzr, [x0, 120]
-	add	x0, x1, 136
-	ldp	x23, x24, [sp, 48]
-	mov	w1, 255
-	ldp	x25, x26, [sp, 64]
-	add	x0, x3, x0
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	ftl_memset
-.L2644:
-	adrp	x7, .LANCHOR58
-	mov	w0, 65535
-	ldrh	w1, [x7, #:lo12:.LANCHOR58]
-	cmp	w1, w0
-	bne	.L2684
-	bl	gc_get_src_blk
-	strh	w0, [x7, #:lo12:.LANCHOR58]
-.L2684:
-	ldrh	w0, [x7, #:lo12:.LANCHOR58]
-	mov	w1, 65535
-	add	x2, x7, :lo12:.LANCHOR58
-	cmp	w0, w1
-	beq	.L2685
-	ldrh	w3, [x2, 56]
-	cbz	w3, .L2686
-	add	x2, x2, 58
-	mov	w1, 0
-.L2688:
-	ldrh	w4, [x2], 2
-	cmp	w4, w0
-	bne	.L2687
-.L2691:
-	adrp	x0, .LANCHOR58
-	mov	w1, -1
-	strh	w1, [x0, #:lo12:.LANCHOR58]
-	b	.L2640
-.L2687:
-	add	w1, w1, 1
-	and	w1, w1, 65535
-	cmp	w3, w1
-	bne	.L2688
-.L2686:
-	adrp	x1, .LANCHOR59
-	ldr	x1, [x1, #:lo12:.LANCHOR59]
-	add	x1, x1, x0, lsl 2
+.L2519:
+	adrp	x1, .LANCHOR3
+	ldrh	w3, [x19, #:lo12:.LANCHOR63]
+	ldr	x1, [x1, #:lo12:.LANCHOR3]
+	mov	x2, x3
+	add	x1, x1, x3, lsl 2
 	ldrb	w1, [x1, 2]
-	and	w2, w1, 224
-	cmp	w2, 224
-	beq	.L2689
-	tst	w1, 192
-	bne	.L2690
-.L2689:
-	adrp	x1, .LANCHOR56
-	ldr	x1, [x1, #:lo12:.LANCHOR56]
-	ldrh	w0, [x1, x0, lsl 1]
-	cbz	w0, .L2691
-	adrp	x1, .LANCHOR172
+	and	w1, w1, 224
+	cmp	w1, 32
+	beq	.L2521
+	cmp	w1, 224
+	beq	.L2521
+	cbz	w1, .L2522
+	adrp	x3, .LANCHOR5
+	ldr	x3, [x3, #:lo12:.LANCHOR5]
+	ldrh	w4, [x3, 16]
+	cmp	w4, w2
+	beq	.L2521
+	ldrh	w4, [x3, 48]
+	cmp	w4, w2
+	beq	.L2521
+	ldrh	w3, [x3, 80]
+	cmp	w3, w2
+	bne	.L2553
+.L2521:
+	add	x0, x19, :lo12:.LANCHOR63
+	mov	w1, -1
+	strh	w1, [x19, #:lo12:.LANCHOR63]
+	strh	wzr, [x0, 24]
+	b	.L2555
+.L2522:
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x3, lsl 1]
+	cbz	w0, .L2521
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1497
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 917
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2692:
-	b	.L2692
-.L2690:
-	mov	w0, 2
-	b	.L2774
-.L2685:
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	b	.L2640
-.L2645:
-	bl	gc_scan_src_blk
-	cmn	w0, #1
-	bne	.L2693
-	mov	w0, 3
-	b	.L2774
-.L2693:
-	adrp	x21, .LANCHOR58
-	mov	w1, 65535
-	add	x19, x21, :lo12:.LANCHOR58
-	ldrh	w0, [x21, #:lo12:.LANCHOR58]
-	cmp	w0, w1
-	beq	.L2653
-	ldrh	w1, [x19, 24]
-	cbz	w1, .L2694
-	mov	w0, 4
-	strh	wzr, [x19, 26]
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	b	.L2640
-.L2694:
-	mov	w1, 1
-	strb	w1, [x20, #:lo12:.LANCHOR104]
-	adrp	x20, .LANCHOR56
-	ubfiz	x1, x0, 1, 16
-	ldr	x2, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2695
-	adrp	x1, .LANCHOR172
+.L2524:
+	b	.L2524
+.L2553:
+	and	w0, w0, 255
+	sub	w0, w0, #1
+	add	x0, x13, x0, sxtw 1
+	ldrh	w3, [x0, 40]
+	mov	w0, 65535
+	cmp	w3, w0
+	bne	.L2525
+	adrp	x1, .LANCHOR187
 	adrp	x0, .LC0
-	mov	w2, 1525
-	add	x1, x1, :lo12:.LANCHOR172
+	mov	w2, 925
+	add	x1, x1, :lo12:.LANCHOR187
 	add	x0, x0, :lo12:.LC0
 	bl	printf
-.L2696:
-	b	.L2696
-.L2695:
-	bl	ftl_free_sblk
-	ldr	x0, [x20, #:lo12:.LANCHOR56]
-	ldrh	w1, [x21, #:lo12:.LANCHOR58]
-	strh	wzr, [x0, x1, lsl 1]
-	ldrh	w0, [x19, 30]
-	add	w0, w0, 1
+.L2526:
+	b	.L2526
+.L2525:
+	adrp	x4, .LANCHOR99
+	adrp	x2, .LANCHOR80
+	cmp	w1, 160
+	mov	x24, x2
+	ldrh	w20, [x4, #:lo12:.LANCHOR99]
+	adrp	x21, .LANCHOR71
+	ldrh	w0, [x2, #:lo12:.LANCHOR80]
+	sub	w0, w0, #1
 	and	w0, w0, 65535
-	strh	w0, [x19, 30]
-	cmp	w0, 8
-	bls	.L2691
-	strh	wzr, [x19, 30]
-	bl	ftl_flush
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	mov	w0, 0
-	bl	ftl_info_flush
-	b	.L2691
-.L2646:
-	bl	gc_scan_src_blk_one_page
-	adrp	x19, .LANCHOR58
-	add	x0, x19, :lo12:.LANCHOR58
-	adrp	x1, .LANCHOR79
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	ldrh	w2, [x0, 2]
-	cmp	w2, w1
-	bcc	.L2640
+	mul	w20, w20, w3
+	bne	.L2540
+	adrp	x1, .LANCHOR67
+	ldrb	w1, [x1, #:lo12:.LANCHOR67]
+	and	w22, w1, 65535
+	cmp	w1, 2
+	orr	w20, w20, w1, lsl 24
+	bne	.L2527
+	ldrh	w0, [x21, #:lo12:.LANCHOR71]
+	mov	w22, 2
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L2527:
+	add	x23, x19, :lo12:.LANCHOR63
+	orr	w20, w0, w20
+	mov	w0, 1
+	strb	w22, [x23, 6]
+	strh	wzr, [x23, 2]
+	strb	wzr, [x23, 4]
+	strh	wzr, [x23, 26]
+	bl	buf_alloc
+	str	w20, [x0, 40]
+	adrp	x20, .LANCHOR72
+	mov	x25, x0
+	mov	w1, 1
+	bl	sblk_read_page
+	ldrh	w2, [x21, #:lo12:.LANCHOR71]
+	adrp	x21, .LANCHOR64
+	ldrb	w0, [x20, #:lo12:.LANCHOR72]
+	mov	w1, 255
+	mul	w2, w2, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR64]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	strh	wzr, [x23, 24]
+	ldr	w0, [x25, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2528
+.L2530:
+	mov	x0, x25
+	bl	buf_free
+	mov	w0, -1
+	b	.L2515
+.L2540:
+	mov	w22, 1
+	b	.L2527
+.L2528:
+	ldr	x0, [x25, 24]
+	mov	w23, 15555
+	movk	w23, 0xf55f, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2529
+	ldrh	w0, [x19, #:lo12:.LANCHOR63]
+	mov	x1, 0
+	bl	ftl_sblk_dump
+	ldr	x0, [x25, 24]
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2530
+	adrp	x1, .LANCHOR187
+	adrp	x0, .LC0
+	mov	w2, 955
+	add	x1, x1, :lo12:.LANCHOR187
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2531:
+	b	.L2531
+.L2529:
+	ldrh	w0, [x24, #:lo12:.LANCHOR80]
+	adrp	x23, .LANCHOR95
+	ldrb	w20, [x20, #:lo12:.LANCHOR72]
+	add	x23, x23, :lo12:.LANCHOR95
+	ldr	x24, [x25, 8]
+	mov	x26, 0
+	mul	w20, w20, w0
+	mul	w20, w22, w20
+	adrp	x22, .LANCHOR96
+	add	x22, x22, :lo12:.LANCHOR96
+	and	w20, w20, 65535
+.L2532:
+	cmp	w20, w26
+	bgt	.L2537
+	mov	x0, x25
+	bl	buf_free
+	ldrh	w1, [x19, #:lo12:.LANCHOR63]
+	adrp	x20, .LANCHOR4
+	add	x0, x19, :lo12:.LANCHOR63
+	ldr	x3, [x20, #:lo12:.LANCHOR4]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w2, [x3, x2]
 	ldrh	w3, [x0, 24]
-	adrp	x2, .LANCHOR22
-	cbz	w3, .L2697
-	strh	wzr, [x0, 26]
-	mov	w1, 4
-	ldr	w0, [x2, #:lo12:.LANCHOR22]
-	strb	w1, [x20, #:lo12:.LANCHOR104]
-	adrp	x20, .LANCHOR56
-	tbz	x0, 8, .L2698
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	ldr	x2, [x20, #:lo12:.LANCHOR56]
-	ubfiz	x0, x1, 1, 16
-	ldrh	w2, [x2, x0]
-	adrp	x0, .LC154
-	add	x0, x0, :lo12:.LC154
+	cmp	w2, w3
+	beq	.L2538
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
 	bl	printf
-.L2698:
-	ldrh	w2, [x19, #:lo12:.LANCHOR58]
-	add	x0, x19, :lo12:.LANCHOR58
-	ldr	x1, [x20, #:lo12:.LANCHOR56]
+.L2538:
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+	add	x0, x19, :lo12:.LANCHOR63
+	ldr	x1, [x20, #:lo12:.LANCHOR4]
 	ldrh	w0, [x0, 24]
 	ldrh	w1, [x1, x2, lsl 1]
 	cmp	w1, w0
-	beq	.L2640
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1555
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2699:
-	b	.L2699
-.L2697:
-	adrp	x0, .LANCHOR59
-	ldrh	w1, [x19, #:lo12:.LANCHOR58]
-	ldr	x21, [x0, #:lo12:.LANCHOR59]
+	bcs	.L2539
+	bl	vpn_check
+.L2539:
+	add	x0, x19, :lo12:.LANCHOR63
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+	ldr	x1, [x20, #:lo12:.LANCHOR4]
+	ldrh	w3, [x0, 24]
+	strh	w3, [x1, x2, lsl 1]
+	strh	wzr, [x0, 28]
+	ldrh	w0, [x0, 24]
+	b	.L2515
+.L2537:
+	ldr	w0, [x24, x26, lsl 2]
+	cmn	w0, #1
+	beq	.L2534
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2535
+	ldr	w0, [x24, x26, lsl 2]
+	mov	w2, 0
+	add	x1, x29, 92
+	bl	pm_log2phys
+.L2535:
+	ldrh	w1, [x22]
+	mov	w0, 21
+	ldr	w3, [x29, 92]
+	sub	w2, w0, w1
 	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	ldr	w0, [x2, #:lo12:.LANCHOR22]
-	add	x21, x21, x1, uxth 2
-	tbz	x0, 8, .L2700
-	ldrb	w2, [x21, 2]
-	adrp	x0, .LC155
-	add	x0, x0, :lo12:.LC155
-	ubfx	x2, x2, 5, 3
-	bl	printf
-.L2700:
-	ldrb	w0, [x21, 2]
-	and	w1, w0, 224
-	cmp	w1, 224
-	beq	.L2701
-	tst	w0, 192
-	bne	.L2702
-.L2701:
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1565
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2703:
-	b	.L2703
-.L2702:
-	ldrh	w0, [x19, #:lo12:.LANCHOR58]
-	add	x20, x19, :lo12:.LANCHOR58
-	bl	ftl_free_sblk
-	mov	w0, -1
-	strh	w0, [x19, #:lo12:.LANCHOR58]
-	ldrh	w0, [x20, 30]
-	add	w0, w0, 1
-	and	w0, w0, 65535
-	strh	w0, [x20, 30]
-	cmp	w0, 8
-	bls	.L2640
-	strh	wzr, [x20, 30]
-.L2776:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	flt_sys_flush
-.L2647:
-	ldrh	w27, [x25, 80]
-	mov	w0, 65535
-	add	x26, x25, 80
-	cmp	w27, w0
-	bne	.L2704
-	adrp	x0, .LANCHOR67
-	ldrb	w22, [x0, #:lo12:.LANCHOR67]
-	cmp	w22, 1
-	bne	.L2704
-	bl	ftl_flush
-	mov	w0, 5
-	bl	ftl_alloc_sblk
-	and	w28, w0, 65535
-	cmp	w28, w27
-	bne	.L2705
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1581
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
-	bl	printf
-.L2706:
-	b	.L2706
-.L2705:
-	mov	w1, w22
-	bl	ftl_erase_sblk
-	mov	w0, 5
-	strb	w0, [x26, 4]
-	add	x1, x25, 96
-	mov	w0, w28
-	bl	ftl_get_blk_list_in_sblk
-	and	w0, w0, 255
-	adrp	x1, .LANCHOR79
-	strb	w0, [x26, 9]
-	adrp	x21, .LANCHOR68
-	adrp	x20, .LANCHOR69
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	strh	w28, [x25, 80]
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	strh	wzr, [x26, 2]
-	mul	w0, w0, w1
-	strb	wzr, [x26, 5]
-	strh	w0, [x26, 6]
-	mov	w1, 255
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	strh	wzr, [x26, 10]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR107
-	ldr	x0, [x0, #:lo12:.LANCHOR107]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	mov	w1, 255
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR108
-	ldr	x0, [x0, #:lo12:.LANCHOR108]
-	lsl	w2, w2, 2
-	bl	ftl_memset
-	ldrb	w0, [x20, #:lo12:.LANCHOR69]
-	mov	w1, 255
-	ldrh	w2, [x21, #:lo12:.LANCHOR68]
-	mul	w2, w2, w0
-	adrp	x0, .LANCHOR65
-	ldr	x0, [x0, #:lo12:.LANCHOR65]
-	bl	ftl_memset
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	mov	w1, -1
-	str	w28, [x0, 132]
-	strh	w1, [x0, 128]
-	strh	w1, [x0, 130]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	mov	w1, -1
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
-	strh	w28, [x0, 126]
-	adrp	x0, .LANCHOR58
-	add	x0, x0, :lo12:.LANCHOR58
-	ldp	x23, x24, [sp, 48]
-	strh	wzr, [x0, 314]
-	strh	wzr, [x0, 56]
-	strh	wzr, [x0, 316]
-	strh	wzr, [x0, 318]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	str	w1, [x0, 320]
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w3, w1
+	and	w0, w0, w1
+	ldrb	w1, [x23]
+	ldrh	w2, [x19, #:lo12:.LANCHOR63]
+	udiv	w0, w0, w1
+	add	x1, x19, :lo12:.LANCHOR63
+	cmp	w0, w2
+	bne	.L2534
+	ldrh	w0, [x1, 24]
+	ldr	x4, [x21, #:lo12:.LANCHOR64]
+	ubfiz	x2, x0, 2, 16
+	add	w0, w0, 1
+	str	w3, [x4, x2]
+	strh	w0, [x1, 24]
+.L2534:
+	add	x26, x26, 1
+	b	.L2532
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #160
 	mov	w0, 0
-	ldp	x29, x30, [sp], 96
-	b	ftl_info_flush
-.L2704:
-	cmp	w21, 31
-	bls	.L2724
-	cmp	w21, 63
-	bls	.L2725
-	cmp	w21, 127
-	bls	.L2726
-	cmp	w21, 255
-	cset	w21, ls
-	add	w21, w21, 1
-.L2707:
-	adrp	x27, .LANCHOR67
-	adrp	x22, .LANCHOR58
-	add	x27, x27, :lo12:.LANCHOR67
-	add	x19, x22, :lo12:.LANCHOR58
-	adrp	x28, .LANCHOR38
-.L2708:
-	sub	w21, w21, #1
-	and	w21, w21, 255
-	cmp	w21, 255
-	beq	.L2640
-	bl	gc_do_copy_back
-	ldrb	w0, [x27]
-	cbnz	w0, .L2709
-	ldrb	w0, [x28, #:lo12:.LANCHOR38]
-	cmp	w0, 3
-	bhi	.L2710
-	bl	ftl_write_commit
-.L2710:
-	ldrh	w1, [x19, 26]
-	ldrh	w0, [x19, 24]
-	cmp	w1, w0
-	bcc	.L2708
-	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	bl	ftl_write_commit
-	bl	ftl_flush
-	ldrh	w0, [x19]
-	adrp	x2, .LANCHOR56
-	ldr	x2, [x2, #:lo12:.LANCHOR56]
-	ubfiz	x1, x0, 1, 16
-	ldrh	w1, [x2, x1]
-	cbz	w1, .L2712
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	mov	w2, 1638
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	mov	w20, 0
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR54
+	stp	x27, x28, [sp, 96]
+	add	x28, x23, :lo12:.LANCHOR54
+	stp	x21, x22, [sp, 48]
+	adrp	x24, .LC140
+	stp	x25, x26, [sp, 80]
+	bl	buf_alloc
+	mov	w1, 0
+	mov	x19, x0
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
 	bl	printf
-.L2713:
-	b	.L2713
-.L2724:
-	mov	w21, 9
-	b	.L2707
-.L2725:
-	mov	w21, 5
-	b	.L2707
-.L2726:
-	mov	w21, 3
-	b	.L2707
-.L2712:
-	bl	ftl_free_sblk
-.L2775:
+	add	x0, x24, :lo12:.LC140
+	str	x0, [x29, 120]
+.L2557:
+	ldr	w0, [x23, #:lo12:.LANCHOR54]
+	cmp	w20, w0
+	bcc	.L2570
+	mov	x0, x19
+	bl	buf_free
+	ldp	x29, x30, [sp, 16]
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	add	sp, sp, 160
+	ret
+.L2570:
 	mov	w0, -1
-	strh	w0, [x19]
-	b	.L2640
-.L2709:
-	ldrh	w0, [x19, 318]
-	cbz	w0, .L2714
-	ldr	w0, [x19, 320]
-	strh	wzr, [x19, 318]
+	str	w0, [x19, 36]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
 	cmn	w0, #1
-	beq	.L2715
-	bl	ftl_mask_bad_block
-.L2715:
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	add	x19, x22, :lo12:.LANCHOR58
-	strh	wzr, [x19, 56]
-	ldrh	w0, [x0, 80]
-	str	wzr, [x19, 320]
-	bl	ftl_free_sblk
-	ldr	x1, [x23, #:lo12:.LANCHOR60]
-	mov	w0, -1
-	ldr	x2, [x24, #:lo12:.LANCHOR46]
-	strh	w0, [x1, 80]
-	strh	w0, [x2, 126]
-	strh	w0, [x1, 130]
-	ldr	x0, [x19, 8]
-	cbz	x0, .L2716
-	bl	buf_free
-.L2716:
-	add	x22, x22, :lo12:.LANCHOR58
-	str	xzr, [x22, 8]
-	bl	flt_sys_flush
-	adrp	x1, .LANCHOR172
-	adrp	x0, .LC0
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	mov	w2, 1671
-	add	x1, x1, :lo12:.LANCHOR172
-	add	x0, x0, :lo12:.LC0
+	bne	.L2558
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2558:
+	tst	x20, 4095
+	bne	.L2559
+	ldr	w2, [x29, 140]
+	adrp	x0, .LC139
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC139
 	bl	printf
-.L2717:
-	b	.L2717
-.L2714:
-	ldrh	w0, [x26, 6]
-	ldrh	w1, [x19, 26]
-	cmp	w0, 1
-	ldrh	w0, [x19, 24]
-	bls	.L2718
-	cmp	w1, w0
-	bcc	.L2708
-	mov	w0, 1
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	ldrh	w0, [x19, 56]
-	add	w1, w0, 1
-	strh	w1, [x19, 56]
-	add	x0, x19, x0, sxtw 1
-	ldrh	w1, [x19]
-	strh	w1, [x0, 58]
-	b	.L2775
-.L2718:
-	mov	w2, 5
-	strb	w2, [x20, #:lo12:.LANCHOR104]
-	cmp	w1, w0
-	bcc	.L2719
-	ldrh	w0, [x19, 56]
-	add	w1, w0, 1
-	strh	w1, [x19, 56]
-	add	x0, x19, x0, sxtw 1
-	ldrh	w1, [x19]
-	strh	w1, [x0, 58]
-	mov	w0, -1
-	strh	w0, [x19]
-.L2719:
-	bl	ftl_flush
-	bl	sblk_wait_write_queue_completed
-	bl	gc_write_completed
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	ldrh	w1, [x25, 80]
-	strh	w1, [x0, 128]
-	bl	pm_flush
-	bl	ftl_ext_info_flush
-	add	x0, x22, :lo12:.LANCHOR58
-	adrp	x1, .LANCHOR79
-	adrp	x2, .LANCHOR64
-	ldrh	w1, [x1, #:lo12:.LANCHOR79]
-	ldrb	w2, [x2, #:lo12:.LANCHOR64]
-	strh	wzr, [x0, 16]
-	strh	w1, [x0, 18]
-	cmp	w2, 2
-	strh	w2, [x0, 20]
-	bne	.L2720
-	ubfiz	w1, w1, 1, 15
-	strh	w1, [x0, 18]
+.L2559:
+	ldr	w0, [x29, 140]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L2560
+.L2562:
+	add	w20, w20, 1
+	b	.L2557
+.L2560:
 	mov	w1, 1
-	strh	w1, [x0, 20]
-.L2720:
-	add	x22, x22, :lo12:.LANCHOR58
-	strh	wzr, [x22, 22]
-	b	.L2640
-.L2648:
-	adrp	x19, .LANCHOR58
-	bl	gc_check_data_one_wl
-	add	x19, x19, :lo12:.LANCHOR58
-	cbz	w0, .L2722
-	ldr	x0, [x23, #:lo12:.LANCHOR60]
-	strh	wzr, [x19, 56]
-	ldrh	w0, [x0, 80]
-	bl	ftl_free_sblk
-	ldr	x1, [x23, #:lo12:.LANCHOR60]
-	mov	w0, -1
-	ldr	x2, [x24, #:lo12:.LANCHOR46]
-	strh	w0, [x1, 80]
-	strh	w0, [x2, 126]
-	strh	w0, [x1, 130]
-	ldr	x0, [x19, 8]
-	bl	buf_free
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	str	xzr, [x19, 8]
-	b	.L2776
-.L2722:
-	ldrh	w1, [x19, 16]
-	ldrh	w0, [x19, 18]
-	cmp	w1, w0
-	bcc	.L2640
-	mov	w0, 6
-	strb	w0, [x20, #:lo12:.LANCHOR104]
-	ldr	x0, [x19, 8]
-	bl	buf_free
-	str	xzr, [x19, 8]
-	b	.L2640
-.L2649:
-	bl	gc_update_l2p_map_new
-	mov	w19, -1
-	bl	gc_free_src_blk
-	bl	ftl_flush
-	bl	pm_flush
-	strh	w19, [x25, 80]
-	bl	ftl_ext_info_flush
-	ldr	x0, [x24, #:lo12:.LANCHOR46]
-	strh	w19, [x0, 126]
-	mov	w0, 0
-	bl	ftl_info_flush
-	strb	wzr, [x20, #:lo12:.LANCHOR104]
-	ldp	x21, x22, [sp, 32]
-	ldp	x19, x20, [sp, 16]
-	ldp	x23, x24, [sp, 48]
-	ldp	x25, x26, [sp, 64]
-	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 96
-	b	print_ftl_debug_info
-	.size	do_gc, .-do_gc
-	.section	.text.ftl_write,"ax",@progbits
-	.align	2
-	.global	ftl_write
-	.type	ftl_write, %function
-ftl_write:
-	stp	x29, x30, [sp, -112]!
-	add	x29, sp, 0
-	stp	x23, x24, [sp, 48]
-	mov	x23, x3
-	stp	x25, x26, [sp, 64]
-	mov	w25, w2
-	stp	x19, x20, [sp, 16]
-	stp	x21, x22, [sp, 32]
-	stp	x27, x28, [sp, 80]
-	cbnz	w0, .L2781
-	adrp	x0, .LANCHOR52
-	ldr	w2, [x0, #:lo12:.LANCHOR52]
-	mov	w0, 24576
-.L2782:
-	add	w3, w1, w25
-	cmp	w2, w3
-	bcc	.L2794
-	adrp	x22, .LANCHOR45
-	add	w27, w0, w1
-	sub	w19, w25, #1
-	adrp	x24, .LANCHOR46
-	ldrb	w0, [x22, #:lo12:.LANCHOR45]
-	add	w19, w19, w27
-	add	x22, x22, :lo12:.LANCHOR45
-	udiv	w21, w27, w0
-	udiv	w19, w19, w0
-	add	w0, w27, w25
-	str	w0, [x29, 108]
-	mov	w28, w21
-	sub	w20, w19, w21
-	add	w20, w20, 1
-.L2784:
-	cbnz	w20, .L2792
-	bl	ftl_write_commit
-	mov	w0, 0
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w3, [x19, 52]
+	ldr	x0, [x19, 24]
+	cmp	w3, 256
+	ccmn	w3, #1, 4, ne
+	beq	.L2561
+	ldr	w1, [x0, 4]
+	cmp	w20, w1
+	beq	.L2562
+.L2561:
+	ldr	x1, [x19, 8]
+	add	x27, x24, :lo12:.LC140
+	adrp	x25, .LANCHOR52
+	adrp	x26, .LC141
+	adrp	x22, .LANCHOR117
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	bl	printf
+	ldr	x1, [x19, 24]
+	ldr	w0, [x1, 8]
+	cmn	w0, #1
+	bne	.L2563
+.L2565:
+	ldrb	w21, [x25, #:lo12:.LANCHOR52]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	add	x22, x22, :lo12:.LANCHOR117
+	mov	w4, w0
+	add	x0, x26, :lo12:.LC141
+	lsl	w27, w21, 7
+	ubfiz	w3, w21, 7, 9
+	sub	w3, w3, #1
+	add	x21, x22, 8
+	and	w3, w3, w20
+	adrp	x26, .LC143
+	sdiv	w27, w20, w27
+	and	w3, w3, 65535
+	add	x22, x22, 520
+	add	x26, x26, :lo12:.LC143
+	mov	w1, w20
+	and	w25, w27, 65535
+	mov	w2, w25
+	bl	printf
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2564:
+	ldr	x1, [x21]
+	cbz	x1, .L2569
+	ldrh	w0, [x21, -8]
+	cmp	w0, w25
+	bne	.L2569
+	mov	w3, 4096
+	mov	w2, 4
+	mov	x0, x26
+	bl	rknand_print_hex
+.L2569:
+	add	x21, x21, 16
+	cmp	x22, x21
+	bne	.L2564
+	b	.L2562
+.L2563:
+	ldr	w21, [x1, 4]
+	ldr	w1, [x28]
+	cmp	w21, w1
+	bcs	.L2565
+	str	w0, [x19, 40]
 	mov	w1, 1
-	bl	do_gc
-	mov	w0, 0
-.L2780:
-	ldp	x19, x20, [sp, 16]
-	ldp	x21, x22, [sp, 32]
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	bl	printf
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2566
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w21
+	bl	pm_log2phys
+.L2566:
+	ldr	w0, [x29, 140]
+	mov	w1, 1
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w21
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldrb	w3, [x25, #:lo12:.LANCHOR52]
+	mov	w0, w21
+	str	w3, [x29, 104]
+	lsl	w2, w3, 7
+	udiv	w2, w21, w2
+	and	w27, w2, 65535
+	str	w2, [x29, 112]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w3, [x29, 104]
+	mov	w1, w21
+	ldr	w2, [x29, 112]
+	add	x0, x26, :lo12:.LC141
+	ubfiz	w3, w3, 7, 9
+	and	w2, w2, 65535
+	sub	w3, w3, #1
+	and	w3, w3, w21
+	and	w3, w3, 65535
+	bl	printf
+	mov	w0, w21
+	mov	w2, 0
+	add	x1, x29, 140
+	bl	pm_log2phys
+	add	x0, x22, :lo12:.LANCHOR117
+	adrp	x5, .LC142
+	add	x21, x0, 8
+	add	x4, x0, 520
+	add	x5, x5, :lo12:.LC142
+.L2568:
+	ldr	x1, [x21]
+	cbz	x1, .L2567
+	ldrh	w0, [x21, -8]
+	cmp	w0, w27
+	bne	.L2567
+	mov	x0, x5
+	stp	x4, x5, [x29, 104]
+	mov	w3, 4096
+	mov	w2, 4
+	bl	rknand_print_hex
+	ldp	x4, x5, [x29, 104]
+.L2567:
+	add	x21, x21, 16
+	cmp	x4, x21
+	bne	.L2568
+	b	.L2565
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR80
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR105
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR80]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	str	x24, [x29, 104]
+	mul	w23, w23, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR105]
+	add	x19, x0, x19, lsl 2
+	add	x0, x19, x23, sxtw 2
+	ldr	w0, [x0, -4]
+	cmn	w0, #1
+	bne	.L2581
+	adrp	x27, .LANCHOR52
+	mov	x28, 0
+	add	x0, x27, :lo12:.LANCHOR52
+	mov	w21, 0
+	str	x0, [x29, 96]
+.L2582:
+	cmp	w28, w23
+	blt	.L2590
+	adrp	x0, .LANCHOR29
+	adrp	x19, .LANCHOR4
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 12, .L2591
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC147
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC147
+	bl	printf
+.L2591:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
 	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
 	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
 	ldp	x27, x28, [sp, 80]
-	ldp	x29, x30, [sp], 112
+	ldp	x29, x30, [sp], 128
 	ret
-.L2781:
-	cmp	w0, 3
-	bhi	.L2794
-	lsl	w0, w0, 13
-	mov	w2, 8192
-	b	.L2782
-.L2792:
-	mov	w0, 0
-	bl	buf_alloc
-	mov	x26, x0
-	cbnz	x0, .L2785
-	bl	ftl_write_commit
-	b	.L2784
-.L2785:
-	strb	wzr, [x0, 57]
-	cmp	w28, w21
-	ldrb	w0, [x22]
-	ccmp	w28, w19, 4, ne
-	strb	w0, [x26, 56]
-	bne	.L2788
-	cmp	w28, w21
-	bne	.L2789
-	udiv	w1, w27, w0
-	msub	w1, w1, w0, w27
-	and	w1, w1, 255
-	strb	w1, [x26, 57]
-	sub	w0, w0, w1
-	and	w0, w0, 255
-	cmp	w25, w0
-	csel	w0, w25, w0, cc
-.L2796:
-	strb	w0, [x26, 56]
-.L2788:
-	ldr	x3, [x26, 8]
-	mov	x1, x23
-	ldrb	w0, [x26, 57]
-	sub	w20, w20, #1
-	ldrb	w2, [x26, 56]
-	ubfiz	x0, x0, 9, 8
-	lsl	w2, w2, 9
-	add	x0, x3, x0
-	bl	ftl_memcpy
-	ldr	x1, [x24, #:lo12:.LANCHOR46]
-	ldr	w0, [x1, 8]
-	str	w28, [x26, 36]
-	add	w28, w28, 1
-	add	w2, w0, 1
-	str	w2, [x1, 8]
-	str	w0, [x26, 32]
+.L2581:
+	adrp	x1, .LANCHOR188
+	adrp	x0, .LC0
+	mov	w2, 1432
+	add	x1, x1, :lo12:.LANCHOR188
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2583:
+	b	.L2583
+.L2590:
+	ldr	w2, [x19, x28, lsl 2]
+	cmn	w2, #1
+	beq	.L2584
+	ldrb	w20, [x27, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2585
+	adrp	x0, .LC144
+	mov	w3, w28
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC144
+	bl	printf
+.L2585:
+	adrp	x25, .LANCHOR99
+	adrp	x26, .LC145
+	mov	x24, x28
+	add	x25, x25, :lo12:.LANCHOR99
+	add	x26, x26, :lo12:.LC145
+.L2589:
+	ldr	w1, [x19, x24, lsl 2]
+	cmn	w1, #1
+	beq	.L2586
+	ldr	x0, [x29, 96]
+	ldrb	w2, [x0]
+	lsl	w2, w2, 7
+	udiv	w1, w1, w2
+	cmp	w20, w1, uxth
+	bne	.L2586
+	ldrb	w0, [x22, 9]
+	sdiv	w1, w24, w0
+	msub	w0, w1, w0, w24
+	add	x0, x22, x0, sxtw 1
+	ldrh	w2, [x0, 16]
+	ldrh	w0, [x25]
+	madd	w2, w2, w0, w1
 	mov	x0, x26
-	bl	ftl_write_buf
-	ldrb	w0, [x26, 56]
-	ubfiz	x0, x0, 9, 8
-	add	x23, x23, x0
-	b	.L2784
-.L2789:
-	ldr	w1, [x29, 108]
-	msub	w0, w0, w28, w1
-	b	.L2796
-.L2794:
+	str	w2, [x29, 124]
+	ldr	w1, [x19, x24, lsl 2]
+	bl	pm_ppa_update_check
+	cbz	w0, .L2587
+	ldr	x0, [x29, 104]
+	mov	w3, w23
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LC146
+	add	x0, x0, :lo12:.LC146
+	bl	rknand_print_hex
+.L2588:
+	b	.L2588
+.L2587:
+	ldr	w0, [x19, x24, lsl 2]
+	add	w21, w21, 1
+	mov	w2, 1
+	add	x1, x29, 124
+	and	w21, w21, 65535
+	bl	pm_log2phys
 	mov	w0, -1
-	b	.L2780
-	.size	ftl_write, .-ftl_write
-	.section	.text.FtlWrite,"ax",@progbits
-	.align	2
-	.global	FtlWrite
-	.type	FtlWrite, %function
-FtlWrite:
-	and	w0, w0, 255
-	b	ftl_write
-	.size	FtlWrite, .-FtlWrite
-	.section	.text.StorageSysDataStore,"ax",@progbits
+	str	w0, [x19, x24, lsl 2]
+.L2586:
+	add	x24, x24, 1
+	cmp	w23, w24
+	bgt	.L2589
+.L2584:
+	add	x28, x28, 1
+	b	.L2582
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
 	.align	2
-	.global	StorageSysDataStore
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-	mov	x3, x1
-	mov	w2, 1
-	mov	w1, w0
-	mov	w0, 2
-	b	ftl_write
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.global	g_pm_spare
-	.global	pm_gc_enable
-	.global	pm_last_load_ram_id
-	.global	pm_last_update_ram_id
-	.global	pm_ram_info
-	.global	sblk_gc_write_completed_queue_head
-	.global	sblk_read_completed_queue_head
-	.global	sblk_write_completed_queue_head
-	.global	sblk_queue_head
-	.global	ftl_low_format_cur_blk
-	.global	ftl_power_lost_flag
-	.global	ftl_vpn_update_count
-	.global	ftl_sblk_vpn_update_id
-	.global	ftl_sblk_lpa_tbl
-	.global	ftl_sblk_vpn
-	.global	gp_ftl_ext_info
-	.global	gp_ftl_info
-	.global	gp_blk_info
-	.global	ftl_tmp_spare
-	.global	ftl_info_spare
-	.global	ftl_ext_info_data_buffer
-	.global	ftl_info_data_buffer
-	.global	ftl_tmp_buffer
-	.global	g_ftl_info_blk
-	.global	tlc_prog_order
-	.global	gc_des_ppa_tbl
-	.global	gc_valid_page_ppa
-	.global	gc_page_buf_id
-	.global	gc_pre_ppa_tbl
-	.global	gc_lpa_tbl
-	.global	g_gc_info
-	.global	gc_slc_mode_vpn_th
-	.global	gc_tlc_mode_tlc_vpn_th
-	.global	gc_tlc_mode_slc_vpn_th
-	.global	gc_state
-	.global	gc_mode
-	.global	check_vpc_tbl
-	.global	p_read_ahead_ext_buf
-	.global	read_ahead_lpa
-	.global	write_commit_count
-	.global	write_commit_head
-	.global	write_buf_count
-	.global	write_buf_head
-	.global	ftl_flush_jiffies
-	.global	lpa_hash
-	.global	lpa_hash_index
-	.global	_min_slc_super_block
-	.global	_max_slc_super_block
-	.global	_max_xlc_super_block
-	.global	_c_max_pm_sblk
-	.global	_c_ftl_pm_page_num
-	.global	_c_totle_log_page
-	.global	_c_totle_data_density
-	.global	_c_user_data_density
-	.global	_c_totle_phy_density
-	.global	_c_ftl_block_addr_log2
-	.global	_c_ftl_block_align_addr
-	.global	_c_ftl_byte_pre_page
-	.global	_c_ftl_nand_blks_per_die
-	.global	_c_ftl_page_pre_slc_blk
-	.global	_c_ftl_page_pre_blk
-	.global	_c_ftl_blk_pre_plane
-	.global	_c_ftl_nand_planes_num
-	.global	_c_ftl_planes_per_die
-	.global	_c_ftl_sec_per_page
-	.global	_c_ftl_nand_die_num
-	.global	_c_ftl_nand_type
-	.global	zftl_debug
-	.global	g_flash_blk_info
-	.global	gp_flash_info
-	.global	p_free_buf_head
-	.global	free_buf_count
-	.global	g_buf
-	.global	g_nandc_v6_master_info
-	.global	nandc_randomizer_en
-	.global	nandc_hw_seed
-	.global	fill_spare_size
-	.global	g_nandc_ecc_bits
-	.global	g_nandc_ver
-	.global	gp_nandc
-	.global	hy_f26_ref_value
-	.global	sd15_tlc_rr
-	.global	sd15_slc_rr
-	.global	gNandParaInfo
-	.global	NandFlashParaTbl
-	.global	gpNandParaInfo
-	.global	gNandOptPara
-	.global	g_msb_page_tbl
-	.global	g_lsb_page_tbl
-	.global	g_die_addr
-	.global	g_die_cs_idx
-	.global	IDByte
-	.global	flash_read_retry
-	.global	g_maxRetryCount
-	.global	g_maxRegNum
-	.global	g_retryMode
-	.global	g_flash_toggle_mode_en
-	.global	g_flash_3d_mlc_flag
-	.global	g_flash_3d_tlc_flag
-	.global	g_flash_multi_page_prog_en
-	.global	g_flash_multi_page_read_en
-	.global	g_flash_interface_mode
-	.global	g_idb_ecc_bits
-	.global	g_idb_slc_mode_enable
-	.global	g_slc_mode_addr2
-	.global	g_slc_mode_enable
-	.global	g_flash_cur_mode
-	.global	g_flash_slc_mode
-	.global	g_slc_page_num
-	.global	g_totle_phy_block
-	.global	g_block_align_addr
-	.global	g_flash_reversd_blks
-	.global	g_nand_max_die
-	.global	g_flash_tmp_spare_buffer
-	.global	g_flash_tmp_page_buffer
-	.global	g_flash_sys_spare_buffer
-	.global	g_flash_spare_buffer
-	.global	g_flash_page_buffer
-	.section	.bss.IDByte,"aw",@nobits
+	.global	ftl_alloc_new_data_sblk
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldrh	w0, [x19]
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L2607
+	bl	zftl_insert_data_list
+.L2607:
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	add	x0, x0, 16
+	cmp	x19, x0
+	mov	x0, x19
+	cset	w1, ne
+	add	w1, w1, 2
+	bl	ftl_open_sblk_init
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",@progbits
 	.align	2
-	.set	.LANCHOR26,. + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.zero	32
-	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
-	.align	1
-	.set	.LANCHOR54,. + 0
-	.type	_c_ftl_blk_pre_plane, %object
-	.size	_c_ftl_blk_pre_plane, 2
-_c_ftl_blk_pre_plane:
-	.zero	2
-	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
-	.align	1
-	.set	.LANCHOR71,. + 0
-	.type	_c_ftl_block_addr_log2, %object
-	.size	_c_ftl_block_addr_log2, 2
-_c_ftl_block_addr_log2:
-	.zero	2
-	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
-	.align	1
-	.set	.LANCHOR75,. + 0
-	.type	_c_ftl_block_align_addr, %object
-	.size	_c_ftl_block_align_addr, 2
-_c_ftl_block_align_addr:
-	.zero	2
-	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
-	.align	1
-	.set	.LANCHOR149,. + 0
-	.type	_c_ftl_byte_pre_page, %object
-	.size	_c_ftl_byte_pre_page, 2
-_c_ftl_byte_pre_page:
-	.zero	2
-	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
-	.align	1
-	.type	_c_ftl_nand_blks_per_die, %object
-	.size	_c_ftl_nand_blks_per_die, 2
-_c_ftl_nand_blks_per_die:
-	.zero	2
-	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
-	.set	.LANCHOR76,. + 0
-	.type	_c_ftl_nand_die_num, %object
-	.size	_c_ftl_nand_die_num, 1
-_c_ftl_nand_die_num:
-	.zero	1
-	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
-	.set	.LANCHOR69,. + 0
-	.type	_c_ftl_nand_planes_num, %object
-	.size	_c_ftl_nand_planes_num, 1
-_c_ftl_nand_planes_num:
-	.zero	1
-	.section	.bss._c_ftl_nand_type,"aw",@nobits
-	.set	.LANCHOR64,. + 0
-	.type	_c_ftl_nand_type, %object
-	.size	_c_ftl_nand_type, 1
-_c_ftl_nand_type:
-	.zero	1
-	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
-	.align	1
-	.set	.LANCHOR68,. + 0
-	.type	_c_ftl_page_pre_blk, %object
-	.size	_c_ftl_page_pre_blk, 2
-_c_ftl_page_pre_blk:
-	.zero	2
-	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
-	.align	1
-	.set	.LANCHOR79,. + 0
-	.type	_c_ftl_page_pre_slc_blk, %object
-	.size	_c_ftl_page_pre_slc_blk, 2
-_c_ftl_page_pre_slc_blk:
-	.zero	2
-	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
-	.set	.LANCHOR70,. + 0
-	.type	_c_ftl_planes_per_die, %object
+	.global	ftl_write_commit
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	stp	x29, x30, [sp, -144]!
+	adrp	x0, .LANCHOR43
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	add	x26, x0, :lo12:.LANCHOR43
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+.L2612:
+	adrp	x3, .LANCHOR50
+	ldrb	w1, [x3, #:lo12:.LANCHOR50]
+	cbz	w1, .L2614
+	adrp	x4, .LANCHOR49
+	adrp	x2, .LANCHOR43
+	add	x2, x2, :lo12:.LANCHOR43
+	sub	w1, w1, #1
+	ldrb	w0, [x4, #:lo12:.LANCHOR49]
+	str	x0, [x29, 104]
+	strb	w1, [x3, #:lo12:.LANCHOR50]
+	adrp	x1, .LANCHOR54
+	ubfiz	x27, x0, 6, 8
+	add	x5, x2, x27
+	str	x5, [x29, 120]
+	lsl	x5, x0, 6
+	ldr	w1, [x1, #:lo12:.LANCHOR54]
+	add	x0, x2, x5
+	ldrb	w5, [x2, x5]
+	ldr	w22, [x0, 36]
+	strb	w5, [x4, #:lo12:.LANCHOR49]
+	cmp	w22, w1
+	bcc	.L2616
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	mov	w0, -1
+.L2611:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L2616:
+	ldrb	w21, [x0, 57]
+	ldrb	w20, [x0, 56]
+	ldr	x24, [x0, 8]
+	ldr	x28, [x0, 24]
+	adrp	x0, .LANCHOR112
+	str	x0, [x29, 112]
+	ldrb	w1, [x0, #:lo12:.LANCHOR112]
+	cbz	w1, .L2618
+	adrp	x0, .LANCHOR151
+	ldrb	w1, [x0, #:lo12:.LANCHOR151]
+	add	x1, x2, x1, lsl 6
+.L2619:
+	ldrb	w0, [x1]
+	cmp	w0, 255
+	bne	.L2620
+	ldr	w0, [x1, 36]
+	cmp	w22, w0
+	bne	.L2618
+	ldr	x0, [x1, 8]
+	ubfiz	x21, x21, 9, 8
+	lsl	w2, w20, 9
+	add	x1, x24, x21
+	add	x0, x0, x21
+	bl	ftl_memcpy
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	b	.L2612
+.L2620:
+	ubfiz	x1, x0, 6, 8
+	add	x1, x26, x1
+	b	.L2619
+.L2618:
+	mov	w0, w22
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2622
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w22
+	bl	pm_log2phys
+.L2622:
+	adrp	x25, .LANCHOR5
+	add	x1, x26, 2
+	mov	w0, 0
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 16
+.L2625:
+	ldr	w2, [x1, 34]
+	cmp	w22, w2
+	bne	.L2623
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2623
+	ubfiz	x0, x0, 6, 32
+	and	w2, w2, -9
+	add	x0, x26, x0
+	strb	w2, [x0, 2]
+	ldr	x23, [x0, 8]
+	ldr	w0, [x0, 40]
+	str	w0, [x29, 140]
+.L2624:
+	adrp	x0, .LANCHOR52
+	str	x0, [x29, 96]
+	ldrb	w1, [x0, #:lo12:.LANCHOR52]
+	cmp	w20, w1
+	bcs	.L2650
+	cbz	x23, .L2627
+	cbz	w21, .L2628
+	lsl	w2, w21, 9
+	mov	x1, x23
+	mov	x0, x24
+	bl	ftl_memcpy
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 48
+.L2628:
+	ldr	x0, [x29, 96]
+	add	w20, w21, w20
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	cmp	w20, w2
+	bcc	.L2629
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 16
+.L2650:
+	mov	w23, 0
+	b	.L2626
+.L2623:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2625
+	mov	x23, 0
+	b	.L2624
+.L2629:
+	ubfiz	x0, x20, 9, 9
+	sub	w2, w2, w20
+	add	x1, x23, x0
+	lsl	w2, w2, 9
+	add	x0, x24, x0
+	bl	ftl_memcpy
+	b	.L2650
+.L2627:
+	ldr	w0, [x29, 140]
+	cmn	w0, #1
+	beq	.L2630
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 140]
+	mov	x27, x0
+	stp	w22, w1, [x0, 36]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	x0, [x27, 24]
+	ldr	w23, [x0, 12]
+	ldr	w0, [x0, 4]
+	add	w23, w23, 1
+	cmp	w22, w0
+	bne	.L2631
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2632
+.L2631:
+	ldrb	w1, [x27, 1]
+	mov	w3, w22
+	ldr	w4, [x27, 52]
+	adrp	x0, .LC148
+	ldr	w2, [x29, 140]
+	add	x0, x0, :lo12:.LC148
+	bl	printf
+	ldr	x1, [x27, 24]
+	mov	w3, 4
+	adrp	x0, .LC105
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC105
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR96
+	ldr	w1, [x29, 140]
+	ldrh	w3, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2632:
+	ldr	x0, [x27, 24]
+	ldr	w0, [x0, 4]
+	cmp	w22, w0
+	bne	.L2633
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2634
+.L2633:
+	adrp	x1, .LANCHOR189
+	adrp	x0, .LC0
+	mov	w2, 497
+	add	x1, x1, :lo12:.LANCHOR189
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2635:
+	b	.L2635
+.L2634:
+	cbz	w21, .L2636
+	ldr	w0, [x29, 140]
+	lsl	w2, w21, 9
+	cmn	w0, #1
+	beq	.L2637
+	ldr	x1, [x27, 8]
+	mov	x0, x24
+	bl	ftl_memcpy
+.L2638:
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 48
+.L2636:
+	ldr	x0, [x29, 96]
+	add	w20, w21, w20
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	cmp	w20, w2
+	bcc	.L2639
+	ldr	x19, [x25, #:lo12:.LANCHOR5]
+	add	x19, x19, 16
+.L2640:
+	cbz	x27, .L2626
+	ldrb	w0, [x27, 2]
+	mov	x1, x27
+	and	w0, w0, -9
+	strb	w0, [x27, 2]
+	adrp	x0, .LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR58
+	bl	buf_remove_buf
+	mov	x0, x27
+	bl	buf_free
+.L2626:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L2642
+	bl	ftl_flush
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2642:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	ldr	x1, [x29, 104]
+	adrp	x20, .LANCHOR151
+	lsl	x2, x1, 6
+	add	x1, x26, x2
+	ldr	w3, [x1, 32]
+	stp	w3, w22, [x28]
+	str	w23, [x28, 12]
+	ldr	w3, [x29, 140]
+	str	w3, [x28, 8]
+	stp	w0, w3, [x1, 40]
+	mov	w0, -1
+	strb	w0, [x26, x2]
+	mov	w2, 10
+	ldrb	w0, [x1, 2]
+	orr	w0, w0, w2
+	ldrh	w2, [x19, 12]
+	strb	w0, [x1, 2]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, w2
+	sub	w0, w0, #1
+	strh	w0, [x1, 48]
+	ldr	x1, [x29, 120]
+	add	x0, x20, :lo12:.LANCHOR151
+	bl	buf_add_tail
+	ldr	x0, [x29, 112]
+	ldrb	w2, [x0, #:lo12:.LANCHOR112]
+	add	w2, w2, 1
+	and	w2, w2, 255
+	strb	w2, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR190
+	cmp	w2, 2
+	str	wzr, [x0, #:lo12:.LANCHOR190]
+	ldrh	w0, [x19, 6]
+	bhi	.L2643
+	cmp	w0, 1
+	bne	.L2615
+.L2643:
+	ldrb	w1, [x19, 5]
+	cmp	w1, 0
+	mov	w1, 0
+	cset	w4, ne
+	cmp	w0, 1
+	ldrb	w0, [x20, #:lo12:.LANCHOR151]
+	csinc	w4, w2, w4, eq
+	mov	w3, w0
+.L2647:
+	cmp	w1, w4
+	bne	.L2648
+	strb	w3, [x20, #:lo12:.LANCHOR151]
+	and	w1, w1, 255
+	ldr	x3, [x29, 112]
+	sub	w2, w2, w1
+	ubfiz	x0, x0, 6, 8
+	add	x0, x26, x0
+	strb	w2, [x3, #:lo12:.LANCHOR112]
+	bl	sblk_prog_page
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L2615
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2615:
+	adrp	x0, .LANCHOR50
+	ldrb	w0, [x0, #:lo12:.LANCHOR50]
+	cbnz	w0, .L2612
+.L2614:
+	bl	ftl_write_completed
+	mov	w0, 0
+	b	.L2611
+.L2639:
+	ldr	w0, [x29, 140]
+	sub	w2, w2, w20
+	lsl	w2, w2, 9
+	ubfiz	x20, x20, 7, 9
+	cmn	w0, #1
+	beq	.L2641
+	ldr	x1, [x27, 8]
+	lsl	x20, x20, 2
+	add	x0, x24, x20
+	add	x1, x1, x20
+	bl	ftl_memcpy
+	b	.L2640
+.L2641:
+	mov	w1, 0
+	add	x0, x24, x20, lsl 2
+	bl	ftl_memset
+	b	.L2640
+.L2648:
+	ubfiz	x3, x3, 6, 8
+	add	w1, w1, 1
+	ldrb	w3, [x26, x3]
+	b	.L2647
+.L2649:
+	lsl	w2, w21, 9
+	mov	x27, 0
+	mov	w23, 0
+.L2637:
+	mov	w1, 0
+	mov	x0, x24
+	bl	ftl_memset
+	b	.L2638
+.L2630:
+	cbnz	w21, .L2649
+	mov	w23, 0
+	mov	x27, 0
+	b	.L2636
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.gc_do_copy_back,"ax",@progbits
+	.align	2
+	.global	gc_do_copy_back
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	sub	sp, sp, #224
+	adrp	x0, .LANCHOR70
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	stp	x19, x20, [sp, 32]
+	stp	x21, x22, [sp, 48]
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	stp	x27, x28, [sp, 96]
+	cbnz	w0, .L2673
+	bl	buf_alloc
+	mov	x19, x0
+	cbz	x0, .L2672
+	adrp	x20, .LANCHOR63
+	add	x3, x20, :lo12:.LANCHOR63
+	ldrh	w2, [x3, 26]
+	mov	w0, w2
+	bl	gc_get_src_ppa_from_index
+	add	w2, w2, 1
+	mov	w22, w0
+	str	w22, [x19, 40]
+	strh	w2, [x3, 26]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2675
+	adrp	x0, .LANCHOR96
+	ldrh	w1, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsr	w1, w22, w1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2675:
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2676
+	adrp	x1, .LANCHOR191
+	adrp	x0, .LC0
+	mov	w2, 573
+	add	x1, x1, :lo12:.LANCHOR191
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2677:
+	b	.L2677
+.L2676:
+	ldr	x0, [x19, 24]
+	ldr	w21, [x0, 4]
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 160]
+	cmn	w0, #1
+	bne	.L2678
+	mov	w2, 0
+	add	x1, x29, 160
+	mov	w0, w21
+	bl	pm_log2phys
+.L2678:
+	ldr	w23, [x29, 160]
+	cmp	w22, w23
+	bne	.L2679
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	add	x1, x0, 2
+	add	x0, x0, 2050
+.L2682:
+	ldr	w2, [x1, 34]
+	cmp	w21, w2
+	bne	.L2680
+	ldrb	w2, [x1]
+	tbz	x2, 1, .L2680
+	mov	x0, x19
+	bl	buf_free
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2672
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LC149
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC149
+	ldrh	w3, [x20, 26]
+	bl	printf
+.L2672:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 224
+	ret
+.L2680:
+	add	x1, x1, 64
+	cmp	x0, x1
+	bne	.L2682
+	adrp	x0, .LANCHOR52
+	mov	w1, 10
+	strb	wzr, [x19, 57]
+	ldrb	w0, [x0, #:lo12:.LANCHOR52]
+	strb	w0, [x19, 56]
+	ldrb	w0, [x19, 2]
+	str	w21, [x19, 36]
+	orr	w0, w0, w1
+	strb	w0, [x19, 2]
+	ldr	x0, [x19, 24]
+	ldr	w0, [x0]
+	str	w0, [x19, 32]
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2683
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	add	x1, x20, :lo12:.LANCHOR63
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	mov	w2, w23
+	add	x0, x0, :lo12:.LC150
+	ldrh	w5, [x1, 26]
+	mov	w1, w21
+	bl	printf
+.L2683:
+	mov	x0, x19
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	add	x20, x20, :lo12:.LANCHOR63
+	adrp	x0, .LANCHOR53
+	ldr	x1, [x0, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 60]
+	add	w0, w0, 1
+	str	w0, [x1, 60]
+	ldrh	w0, [x20, 28]
+	add	w0, w0, 1
+	strh	w0, [x20, 28]
+	b	.L2672
+.L2679:
+	adrp	x0, .LANCHOR29
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2684
+	add	x20, x20, :lo12:.LANCHOR63
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	ldrh	w5, [x20, 26]
+	mov	w2, w23
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+.L2684:
+	mov	x0, x19
+	bl	buf_free
+	b	.L2672
+.L2673:
+	adrp	x1, .LANCHOR5
+	adrp	x0, .LANCHOR67
+	stp	x0, x1, [x29, 128]
+	adrp	x24, .LANCHOR63
+	ldr	x22, [x1, #:lo12:.LANCHOR5]
+	ldrb	w25, [x0, #:lo12:.LANCHOR67]
+	add	x22, x22, 80
+	cmp	w25, 3
+	bne	.L2685
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	cbz	w0, .L2686
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w19, [x22, 9]
+	ldrh	w20, [x0, 314]
+	add	w21, w19, w19, lsl 1
+	sub	w19, w19, w19, lsl 2
+	sdiv	w21, w20, w21
+	madd	w19, w21, w19, w20
+	and	w19, w19, 65535
+.L2687:
+	adrp	x1, .LANCHOR71
+	ldrb	w0, [x22, 9]
+	add	x4, x24, :lo12:.LANCHOR63
+	mov	w2, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	mul	w8, w25, w0
+	ldrh	w10, [x4, 24]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR132
+	ldr	x7, [x0, #:lo12:.LANCHOR132]
+	sub	w3, w3, #1
+.L2690:
+	cmp	w2, w8
+	blt	.L2692
+.L2720:
+	mov	w23, 1
+	b	.L2688
+.L2686:
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w20, [x22, 9]
+	ldrh	w1, [x0, 314]
+	adrp	x0, .LANCHOR192
+	add	x0, x0, :lo12:.LANCHOR192
+	sdiv	w19, w1, w20
+	ldrh	w23, [x0, w19, sxtw 1]
+	msub	w19, w19, w20, w1
+	and	w19, w19, 65535
+	lsr	w21, w23, 3
+	and	w23, w23, 7
+	cmp	w23, 1
+	madd	w20, w21, w20, w19
+	add	w20, w20, w20, lsl 1
+	and	w20, w20, 65535
+	beq	.L2687
+.L2688:
+	adrp	x0, .LANCHOR29
+	str	x0, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR29]
+	tbz	x1, 8, .L2693
+	adrp	x0, .LANCHOR132
+	ubfiz	x1, x20, 2, 16
+	mov	w6, w20
+	mov	w3, w19
+	ldr	x2, [x0, #:lo12:.LANCHOR132]
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrh	w4, [x0, 314]
+	adrp	x0, .LC151
+	ldr	w5, [x2, x1]
+	add	x0, x0, :lo12:.LC151
+	mov	w2, w23
+	mov	w1, w21
+	bl	printf
+.L2693:
+	adrp	x0, .LANCHOR43
+	str	wzr, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR43
+	str	x0, [x29, 120]
+.L2694:
+	ldrb	w2, [x22, 9]
+	ldr	w0, [x29, 152]
+	ldrh	w26, [x29, 152]
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	mul	w1, w25, w2
+	cmp	w0, w1
+	blt	.L2707
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w0, 3
+	add	x0, x29, 160
+	beq	.L2708
+	sub	w3, w1, #1
+	mov	w2, 0
+.L2709:
+	cmp	w2, w3
+	blt	.L2715
+	ldr	x0, [x0, w3, sxtw 3]
+	mov	w2, -1
+	strb	w2, [x0]
+	ldr	x0, [x29, 160]
+	bl	sblk_prog_page
+	b	.L2714
+.L2685:
+	adrp	x0, .LANCHOR98
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbnz	w0, .L2689
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w19, [x22, 9]
+	mov	w25, 1
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2687
+.L2689:
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w19, [x22, 9]
+	mov	w25, 2
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2687
+.L2692:
+	add	w5, w20, w2
+	cmp	w5, w3
+	beq	.L2720
+	sbfiz	x5, x5, 2, 32
+	ldr	w0, [x7, x5]
+	cmn	w0, #1
+	bne	.L2691
+	ldrh	w6, [x4, 26]
+	cmp	w6, w10
+	bcs	.L2672
+	mov	w0, w6
+	bl	gc_get_src_ppa_from_index
+	add	w6, w6, 1
+	strh	w6, [x4, 26]
+	str	w0, [x7, x5]
+.L2691:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	b	.L2690
+.L2707:
+	ldr	w0, [x29, 156]
+	add	w0, w20, w0
+	str	w0, [x29, 144]
+	sxtw	x27, w0
+	adrp	x0, .LANCHOR68
+	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, x27]
+	cmp	w0, 255
+	bne	.L2695
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2696
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L2672
+.L2696:
+	adrp	x0, .LANCHOR68
+	ldrb	w1, [x28, 1]
+	adrp	x5, .LANCHOR71
+	adrp	x6, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	strb	w1, [x0, x27]
+	add	x1, x24, :lo12:.LANCHOR63
+	strb	w23, [x28, 61]
+	ldrh	w7, [x5, #:lo12:.LANCHOR71]
+	ldrb	w0, [x1, 7]
+	add	w0, w0, 1
+	strb	w0, [x1, 7]
+	add	w0, w26, w20
+	strh	w0, [x28, 48]
+	ldr	w1, [x29, 144]
+	ldrb	w0, [x22, 9]
+	mul	w0, w0, w7
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bne	.L2697
+	adrp	x0, .LANCHOR131
+	adrp	x4, .LANCHOR72
+	stp	x6, x5, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR131]
+	mov	w0, -1
+	str	x4, [x29, 144]
+	str	w0, [x1, x27, lsl 2]
+	ldr	x0, [x28, 8]
+	ldrb	w2, [x4, #:lo12:.LANCHOR72]
+	mul	w2, w2, w7
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldp	x6, x5, [x29, 96]
+	ldr	x4, [x29, 144]
+	ldr	x7, [x28, 8]
+	ldrh	w0, [x5, #:lo12:.LANCHOR71]
+	ldrb	w1, [x4, #:lo12:.LANCHOR72]
+	mul	w0, w0, w1
+	ldr	x1, [x6, #:lo12:.LANCHOR132]
+	lsl	w2, w0, 2
+	add	x0, x7, x0, sxtw 2
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR52
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR52]
+	ldr	x0, [x28, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x28, 24]
+	mov	w0, 15555
+	ldr	x5, [x29, 104]
+	movk	w0, 0xf55f, lsl 16
+	ldr	x4, [x29, 144]
+	ldrh	w1, [x5, #:lo12:.LANCHOR71]
+	str	w0, [x6]
+	ldrb	w0, [x4, #:lo12:.LANCHOR72]
+	mul	w1, w1, w0
+	ldr	x0, [x28, 8]
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+.L2695:
+	adrp	x0, .LANCHOR68
+	ldr	w5, [x29, 156]
+	add	x3, x29, 160
+	ldr	x4, [x0, #:lo12:.LANCHOR68]
+	adrp	x0, .LANCHOR43
+	add	x2, x0, :lo12:.LANCHOR43
+	ldrb	w1, [x4, x27]
+	ubfiz	x0, x1, 6, 8
+	add	x0, x2, x0
+	add	x2, x2, x1, lsl 6
+	str	x0, [x3, w5, sxtw 3]
+	mov	w0, 2
+	adrp	x5, .LANCHOR133
+	strh	w0, [x2, 50]
+	ldr	x0, [x29, 128]
+	strb	w23, [x2, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w0, 3
+	bne	.L2702
+	udiv	w0, w26, w0
+	adrp	x6, .LANCHOR99
+	ldrh	w6, [x6, #:lo12:.LANCHOR99]
+	add	w3, w0, w19
+	add	w0, w0, w0, lsl 1
+	add	x3, x22, x3, sxtw 1
+	sub	w0, w26, w0
+	and	w0, w0, 65535
+	add	w0, w0, 1
+	ldrh	w3, [x3, 16]
+	mul	w3, w3, w6
+	ldrh	w6, [x2, 48]
+	orr	w3, w3, w21
+	str	w3, [x2, 40]
+	ldr	x2, [x5, #:lo12:.LANCHOR133]
+	orr	w0, w3, w0, lsl 24
+	str	w0, [x2, x6, lsl 2]
+.L2703:
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2706
+	ldr	x0, [x29, 120]
+	mov	w2, w23
+	ldrb	w4, [x4, x27]
+	add	x1, x0, x1, lsl 6
+	add	x0, x24, :lo12:.LANCHOR63
+	ldrb	w3, [x0, 6]
+	ldr	x0, [x1, 24]
+	ldrb	w7, [x1, 1]
+	ldrh	w6, [x1, 48]
+	ldr	w0, [x0, 4]
+	str	w0, [sp, 8]
+	mov	w0, 3
+	udiv	w26, w26, w0
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	add	w26, w26, w19
+	str	w26, [sp]
+	ldr	w5, [x1, 40]
+	ldr	w1, [x29, 156]
+	bl	printf
+.L2706:
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	b	.L2694
+.L2697:
+	ldr	x0, [x6, #:lo12:.LANCHOR132]
+	lsl	x4, x27, 2
+	mov	w1, 1
+	str	x4, [x29, 144]
+	ldr	w0, [x0, x4]
+	str	w0, [x28, 40]
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2699
+	adrp	x0, .LANCHOR96
+	ldr	w1, [x28, 40]
+	ldrh	w5, [x0, #:lo12:.LANCHOR96]
+	mov	w0, 21
+	sub	w2, w0, w5
+	mov	w0, 1
+	lsr	w1, w1, w5
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR95
+	ldrb	w2, [x1, #:lo12:.LANCHOR95]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2699
+	ldr	x0, [x28, 24]
+	mov	w1, -1
+	str	w1, [x0, 4]
+	ldr	w0, [x28, 52]
+	cmp	w0, 512
+	ccmp	w0, w1, 4, ne
+	bne	.L2699
+	adrp	x1, .LANCHOR191
+	adrp	x0, .LC0
+	mov	w2, 688
+	add	x1, x1, :lo12:.LANCHOR191
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2700:
+	b	.L2700
+.L2699:
+	ldr	x0, [x28, 24]
+	adrp	x1, .LANCHOR54
+	ldr	w1, [x1, #:lo12:.LANCHOR54]
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bcc	.L2701
+	mov	w1, -1
+	str	w1, [x0, 4]
+.L2701:
+	adrp	x1, .LANCHOR131
+	ldr	w2, [x0, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR131]
+	str	w2, [x1, x4]
+	ldr	w1, [x28, 40]
+	str	w1, [x0, 8]
+	b	.L2695
+.L2702:
+	cmp	w0, 2
+	bne	.L2704
+	adrp	x0, .LANCHOR98
+	adrp	x3, .LANCHOR99
+	ldrb	w0, [x0, #:lo12:.LANCHOR98]
+	cbnz	w0, .L2705
+	ldr	w0, [x29, 156]
+	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	add	w0, w19, w0
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+.L2763:
+	orr	w0, w0, 33554432
+	str	w0, [x2, 40]
+.L2704:
+	ldr	x0, [x29, 120]
+	add	x0, x0, x1, lsl 6
+	ldrh	w2, [x0, 48]
+	ldr	w3, [x0, 40]
+	ldr	x0, [x5, #:lo12:.LANCHOR133]
+	str	w3, [x0, x2, lsl 2]
+	b	.L2703
+.L2705:
+	add	w0, w19, w26, lsr 1
+	ldrh	w3, [x3, #:lo12:.LANCHOR99]
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+	and	w3, w26, 1
+	add	w0, w0, w3
+	b	.L2763
+.L2708:
+	adrp	x1, .LANCHOR69
+	ldrb	w3, [x1, #:lo12:.LANCHOR69]
+	ldr	x1, [x29, 160]
+	cbz	w3, .L2710
+.L2713:
+	strb	wzr, [x1, 60]
+	b	.L2711
+.L2710:
+	cmp	w23, 1
+	bne	.L2712
+	mov	w3, 9
+.L2762:
+	strb	w3, [x1, 60]
+.L2711:
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L2714:
+	adrp	x1, .LANCHOR69
+	ldrb	w3, [x22, 9]
+	ldrb	w1, [x1, #:lo12:.LANCHOR69]
+	and	w0, w3, 65535
+	cbz	w1, .L2716
+	add	w0, w0, w0, lsl 1
+.L2717:
+	adrp	x1, .LANCHOR53
+	add	x24, x24, :lo12:.LANCHOR63
+	ldr	x1, [x1, #:lo12:.LANCHOR53]
+	ldr	w2, [x1, 52]
+	add	w2, w2, w0
+	str	w2, [x1, 52]
+	ldrh	w1, [x24, 314]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR71
+	and	w0, w0, 65535
+	strh	w0, [x24, 314]
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	mul	w1, w1, w3
+	cmp	w0, w1
+	blt	.L2718
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	strh	wzr, [x0, 86]
+.L2718:
+	bl	gc_write_completed
+	b	.L2672
+.L2712:
+	cmp	w23, 2
+	bne	.L2713
+	mov	w3, 13
+	b	.L2762
+.L2715:
+	ldr	x4, [x0, w2, sxtw 3]
+	add	w2, w2, 1
+	ldr	x5, [x0, w2, sxtw 3]
+	and	w2, w2, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L2709
+.L2716:
+	adrp	x1, .LANCHOR98
+	ldrb	w2, [x1, #:lo12:.LANCHOR98]
+	mov	w1, w0
+	ubfiz	w0, w0, 1, 15
+	cmp	w2, 0
+	csel	w0, w0, w1, ne
+	b	.L2717
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.zftl_do_gc,"ax",@progbits
+	.align	2
+	.global	zftl_do_gc
+	.type	zftl_do_gc, %function
+zftl_do_gc:
+	sub	sp, sp, #96
+	adrp	x2, .LANCHOR89
+	adrp	x1, .LANCHOR93
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR130
+	stp	x21, x22, [sp, 48]
+	ldrh	w20, [x2, #:lo12:.LANCHOR89]
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR5
+	ldrh	w21, [x1, #:lo12:.LANCHOR93]
+	ldrb	w2, [x19, #:lo12:.LANCHOR130]
+	stp	x25, x26, [sp, 80]
+	add	w20, w21, w20
+	ldr	x22, [x23, #:lo12:.LANCHOR5]
+	cmp	w2, 6
+	bhi	.L2868
+	mov	w24, w0
+	and	w20, w20, 65535
+	adrp	x0, .L2767
+	mov	x25, x1
+	add	x0, x0, :lo12:.L2767
+	ldrh	w0, [x0,w2,uxtw #1]
+	adr	x1, .Lrtx2767
+	add	x0, x1, w0, sxth #2
+	br	x0
+.Lrtx2767:
+	.section	.rodata.zftl_do_gc,"a",@progbits
+	.align	0
+	.align	2
+.L2767:
+	.2byte	(.L2766 - .Lrtx2767) / 4
+	.2byte	(.L2768 - .Lrtx2767) / 4
+	.2byte	(.L2769 - .Lrtx2767) / 4
+	.2byte	(.L2770 - .Lrtx2767) / 4
+	.2byte	(.L2771 - .Lrtx2767) / 4
+	.2byte	(.L2772 - .Lrtx2767) / 4
+	.2byte	(.L2773 - .Lrtx2767) / 4
+	.section	.text.zftl_do_gc
+.L2772:
+	adrp	x21, .LANCHOR63
+	add	x25, x21, :lo12:.LANCHOR63
+	mov	w22, 0
+.L2774:
+	bl	gc_check_data_one_wl
+	cbz	w0, .L2841
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	add	x21, x21, :lo12:.LANCHOR63
+	strh	wzr, [x21, 56]
+	ldrh	w0, [x0, 80]
+	bl	ftl_free_sblk
+	adrp	x2, .LANCHOR53
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	mov	w0, -1
+	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x21, 8]
+	bl	buf_free
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	str	xzr, [x21, 8]
+	b	.L2890
+.L2766:
+	adrp	x0, .LANCHOR91
+	mov	w1, 65535
+	ldrh	w4, [x0, #:lo12:.LANCHOR91]
+	ldrh	w0, [x22, 80]
+	add	w21, w21, w4
+	and	w21, w21, 65535
+	cmp	w0, w1
+	beq	.L2775
+	adrp	x1, .LANCHOR29
+	cmp	w21, 7
+	mov	w23, 3
+	adrp	x24, .LANCHOR70
+	ldr	w1, [x1, #:lo12:.LANCHOR29]
+	csinc	w23, w23, wzr, hi
+	tbz	x1, 8, .L2777
+	ldrh	w7, [x22, 122]
+	mov	w4, w21
+	ldrh	w6, [x22, 120]
+	mov	w3, w20
+	ldrh	w5, [x22, 124]
+	mov	w1, 1705
+	ldrb	w2, [x24, #:lo12:.LANCHOR70]
+	str	w0, [sp]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2777:
+	ldrb	w0, [x24, #:lo12:.LANCHOR70]
+	mov	w2, 1
+	mov	w1, w23
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	ble	.L2868
+.L2778:
+	mov	w0, 1
+.L2889:
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	b	.L2868
+.L2775:
+	adrp	x0, .LANCHOR84
+	cmp	w24, 1
+	ldrh	w25, [x0, #:lo12:.LANCHOR84]
+	adrp	x0, .LANCHOR82
+	ldrh	w26, [x0, #:lo12:.LANCHOR82]
+	bne	.L2779
+	bl	gc_scan_static_data
+	bl	gc_static_wearleveling
+.L2780:
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR70
+	mov	w0, 1
+	mov	x23, x1
+	strb	w0, [x1, #:lo12:.LANCHOR70]
+	ldrh	w5, [x2, 124]
+	cbz	w5, .L2782
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR29
+	strb	wzr, [x1, #:lo12:.LANCHOR70]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2868
+	ldrh	w7, [x2, 122]
+	mov	w4, w21
+	ldrh	w6, [x2, 120]
+	mov	w3, w20
+	mov	w2, 0
+	mov	w1, 1762
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+	b	.L2868
+.L2779:
+	adrp	x0, .LANCHOR73
+	ldrh	w0, [x0, #:lo12:.LANCHOR73]
+	cmp	w0, w20
+	bcs	.L2780
+.L2868:
+	mov	w0, 16
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 96
+	ret
+.L2782:
+	adrp	x22, .LANCHOR73
+	ldrh	w1, [x22, #:lo12:.LANCHOR73]
+	cmp	w20, w1
+	bcs	.L2783
+	cmp	w21, 1
+	bls	.L2784
+	cmp	w21, 16
+	bls	.L2785
+	adrp	x1, .LANCHOR86
+	ldrh	w2, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR87
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	cmp	w2, w1
+	bcs	.L2785
+	mov	w2, 16
+	mov	w1, 3
+.L2886:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L2786:
+	cbnz	w0, .L2778
+	b	.L2868
+.L2785:
+	mov	w2, 2
+	mov	w1, w2
+	mov	w0, 1
+.L2893:
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L2778
+	mov	w2, 2
+	b	.L2887
+.L2784:
+	adrp	x0, .LANCHOR29
+	strb	wzr, [x23, #:lo12:.LANCHOR70]
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	tbz	x0, 8, .L2788
+	ldrh	w7, [x2, 122]
+	adrp	x0, .LC154
+	ldrh	w6, [x2, 120]
+	mov	w5, 0
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 0
+	mov	w1, 1778
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+.L2788:
+	cmp	w20, 16
+	bls	.L2789
+	mov	w2, 4
+.L2887:
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	b	.L2886
+.L2789:
+	mov	w2, 1
+	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	mov	w1, w2
+	b	.L2893
+.L2783:
+	cmp	w24, 1
+	lsl	w1, w1, 1
+	bne	.L2791
+	cmp	w20, w1
+	bge	.L2791
+	add	w0, w25, w26
+	and	w0, w0, 65535
+	cmp	w0, w21, lsr 1
+	bcs	.L2792
+	adrp	x1, .LANCHOR86
+	ldrh	w2, [x1, #:lo12:.LANCHOR86]
+	adrp	x1, .LANCHOR87
+	ldrh	w1, [x1, #:lo12:.LANCHOR87]
+	cmp	w2, w1
+	bcs	.L2792
+.L2796:
+	adrp	x0, .LANCHOR83
+	ldrh	w0, [x0, #:lo12:.LANCHOR83]
+	lsr	w0, w0, 1
+	strh	w0, [x22, #:lo12:.LANCHOR73]
+	b	.L2868
+.L2792:
+	cmp	w21, 1
+	adrp	x24, .LANCHOR83
+	bls	.L2793
+	cmp	w21, 16
+	bls	.L2794
+	mov	w2, 8
+	mov	w1, 3
+	mov	w0, 1
+.L2884:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L2795:
+	ldrh	w1, [x24, #:lo12:.LANCHOR83]
+	strh	w1, [x22, #:lo12:.LANCHOR73]
+	b	.L2786
+.L2794:
+	mov	w2, 2
+	mov	w0, 1
+	mov	w1, w2
+	bl	gc_search_src_blk
+	ands	w0, w0, 65535
+	bne	.L2795
+	mov	w2, 2
+	mov	w1, 3
+	ldrb	w0, [x23, #:lo12:.LANCHOR70]
+	b	.L2884
+.L2793:
+	cmp	w20, w0
+	bcs	.L2796
+	strb	wzr, [x23, #:lo12:.LANCHOR70]
+	mov	w2, 8
+	mov	w1, 3
+	mov	w0, 0
+	b	.L2884
+.L2791:
+	cmp	w20, w1
+	bge	.L2796
+	b	.L2868
+.L2768:
+	adrp	x7, .LANCHOR63
+	mov	w0, 65535
+	ldrh	w1, [x7, #:lo12:.LANCHOR63]
+	cmp	w1, w0
+	bne	.L2797
+	bl	gc_get_src_blk
+	strh	w0, [x7, #:lo12:.LANCHOR63]
+.L2797:
+	ldrh	w3, [x7, #:lo12:.LANCHOR63]
+	mov	w0, 65535
+	add	x1, x7, :lo12:.LANCHOR63
+	cmp	w3, w0
+	beq	.L2798
+	adrp	x0, .LANCHOR3
+	ldrh	w5, [x1, 56]
+	uxtw	x4, w3
+	ldr	x2, [x0, #:lo12:.LANCHOR3]
+	add	x2, x2, x4, lsl 2
+	cbz	w5, .L2799
+	add	x1, x1, 58
+	mov	w0, 0
+.L2801:
+	ldrh	w6, [x1], 2
+	cmp	w6, w3
+	bne	.L2800
+.L2804:
+	adrp	x0, .LANCHOR63
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR63]
+	b	.L2868
+.L2800:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	cmp	w5, w0
+	bne	.L2801
+.L2799:
+	ldrb	w0, [x2, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L2802
+	tst	w0, 192
+	bne	.L2803
+.L2802:
+	adrp	x0, .LANCHOR4
+	ldr	x0, [x0, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, x4, lsl 1]
+	cbz	w0, .L2804
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 1972
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2805:
+	b	.L2805
+.L2803:
+	mov	w0, 2
+	b	.L2889
+.L2798:
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	b	.L2868
+.L2769:
+	bl	gc_scan_src_blk
+	cmn	w0, #1
+	bne	.L2806
+	mov	w0, 3
+	b	.L2889
+.L2806:
+	adrp	x21, .LANCHOR63
+	mov	w1, 65535
+	add	x20, x21, :lo12:.LANCHOR63
+	ldrh	w0, [x21, #:lo12:.LANCHOR63]
+	cmp	w0, w1
+	beq	.L2778
+	ldrh	w1, [x20, 24]
+	cbz	w1, .L2807
+	mov	w0, 4
+	strh	wzr, [x20, 26]
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	b	.L2868
+.L2807:
+	mov	w1, 1
+	strb	w1, [x19, #:lo12:.LANCHOR130]
+	adrp	x19, .LANCHOR4
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2808
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2000
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2809:
+	b	.L2809
+.L2808:
+	bl	ftl_free_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR4]
+	ldrh	w1, [x21, #:lo12:.LANCHOR63]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x20, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x20, 30]
+	cmp	w0, 8
+	bls	.L2804
+	strh	wzr, [x20, 30]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L2804
+.L2770:
+	adrp	x22, .LANCHOR63
+	adrp	x23, .LANCHOR80
+	add	x21, x22, :lo12:.LANCHOR63
+	add	x23, x23, :lo12:.LANCHOR80
+.L2869:
+	bl	gc_scan_src_blk_one_page
+	ldrh	w1, [x21, 2]
+	ldrh	w0, [x23]
+	cmp	w1, w0
+	bcs	.L2810
+	cmp	w20, 7
+	bls	.L2869
+	b	.L2868
+.L2810:
+	ldrh	w3, [x21, 24]
+	adrp	x0, .LANCHOR29
+	cbz	w3, .L2811
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	w1, 4
+	strh	wzr, [x21, 26]
+	strb	w1, [x19, #:lo12:.LANCHOR130]
+	adrp	x19, .LANCHOR4
+	tbz	x0, 8, .L2812
+	ldrh	w1, [x21]
+	ldr	x2, [x19, #:lo12:.LANCHOR4]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
+	bl	printf
+.L2812:
+	ldrh	w2, [x22, #:lo12:.LANCHOR63]
+	add	x0, x22, :lo12:.LANCHOR63
+	ldr	x1, [x19, #:lo12:.LANCHOR4]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	beq	.L2868
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2034
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2813:
+	b	.L2813
+.L2811:
+	adrp	x2, .LANCHOR3
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	ldrh	w1, [x21]
+	ldr	x20, [x2, #:lo12:.LANCHOR3]
+	mov	w2, 1
+	strb	w2, [x19, #:lo12:.LANCHOR130]
+	add	x20, x20, x1, uxth 2
+	tbz	x0, 8, .L2814
+	ldrb	w2, [x20, 2]
+	adrp	x0, .LC156
+	add	x0, x0, :lo12:.LC156
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2814:
+	ldrb	w0, [x20, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L2815
+	tst	w0, 192
+	bne	.L2816
+.L2815:
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2044
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2817:
+	b	.L2817
+.L2816:
+	ldrh	w0, [x22, #:lo12:.LANCHOR63]
+	add	x19, x22, :lo12:.LANCHOR63
+	bl	ftl_free_sblk
+	mov	w0, -1
+	strh	w0, [x22, #:lo12:.LANCHOR63]
+	ldrh	w0, [x19, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 30]
+	cmp	w0, 8
+	bls	.L2868
+	strh	wzr, [x19, 30]
+.L2890:
+	bl	flt_sys_flush
+	b	.L2868
+.L2771:
+	ldrh	w1, [x22, 80]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2818
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	cmp	w0, 1
+	bne	.L2818
+	bl	ftl_flush
+	ldrh	w0, [x25, #:lo12:.LANCHOR93]
+	cbz	w0, .L2819
+.L2888:
+	mov	w1, 5
+	lsr	w0, w0, 1
+	bl	zftl_get_free_sblk
+	and	w20, w0, 65535
+	mov	w1, 65535
+	cmp	w20, w1
+	beq	.L2821
+	adrp	x1, .LANCHOR3
+	ldr	x2, [x1, #:lo12:.LANCHOR3]
+	add	x2, x2, x20, uxth 2
+	ldrb	w1, [x2, 2]
+	tst	w1, 224
+	beq	.L2822
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2069
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2823:
+	b	.L2823
+.L2819:
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	b	.L2888
+.L2822:
+	mov	w21, 5
+	bfi	w1, w21, 5, 3
+	orr	w1, w1, 16
+	strb	w1, [x2, 2]
+	mov	w1, 1
+	bl	ftl_erase_sblk
+	strb	w21, [x22, 84]
+	add	x1, x22, 96
+	mov	w0, w20
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	adrp	x1, .LANCHOR80
+	strb	w0, [x22, 89]
+	adrp	x21, .LANCHOR72
+	strh	w20, [x22, 80]
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	strh	wzr, [x22, 82]
+	strb	wzr, [x22, 85]
+	strh	wzr, [x22, 90]
+	mul	w0, w0, w1
+	mov	w1, 255
+	strh	w0, [x22, 86]
+	adrp	x22, .LANCHOR71
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR131
+	ldr	x0, [x0, #:lo12:.LANCHOR131]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR132
+	ldr	x0, [x0, #:lo12:.LANCHOR132]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x21, #:lo12:.LANCHOR72]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR68
+	ldr	x0, [x0, #:lo12:.LANCHOR68]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w1, -1
+	str	w20, [x0, 132]
+	strh	w1, [x0, 128]
+	strh	w1, [x0, 130]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR53
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	strh	w20, [x0, 126]
+	adrp	x0, .LANCHOR63
+	add	x0, x0, :lo12:.LANCHOR63
+	str	w1, [x0, 320]
+	strh	wzr, [x0, 314]
+	strh	wzr, [x0, 56]
+	strh	wzr, [x0, 316]
+	strh	wzr, [x0, 318]
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L2868
+.L2818:
+	cmp	w24, 1
+	mov	w21, 4
+	csinc	w21, w21, wzr, eq
+	cmp	w20, 15
+	mov	w0, w21
+	add	w21, w21, 4
+	adrp	x25, .LANCHOR70
+	adrp	x24, .LANCHOR63
+	csel	w21, w21, w0, ls
+	add	x25, x25, :lo12:.LANCHOR70
+	add	x20, x24, :lo12:.LANCHOR63
+	add	x26, x22, 80
+.L2827:
+	sub	w21, w21, #1
+	and	w21, w21, 255
+	cmp	w21, 255
+	beq	.L2868
+	bl	gc_do_copy_back
+	ldrb	w0, [x25]
+	cbnz	w0, .L2828
+	adrp	x0, .LANCHOR45
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	cmp	w0, 3
+	bhi	.L2829
+	bl	ftl_write_commit
+.L2829:
+	ldrh	w1, [x20, 26]
+	ldrh	w0, [x20, 24]
+	cmp	w1, w0
+	bcc	.L2827
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrh	w0, [x20]
+	adrp	x2, .LANCHOR4
+	ldr	x2, [x2, #:lo12:.LANCHOR4]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2831
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2144
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2832:
+	b	.L2832
+.L2831:
+	bl	ftl_free_sblk
+.L2891:
+	mov	w0, -1
+	strh	w0, [x20]
+	b	.L2868
+.L2828:
+	ldrh	w0, [x20, 318]
+	cbz	w0, .L2833
+	ldr	w0, [x20, 320]
+	strh	wzr, [x20, 318]
+	cmn	w0, #1
+	beq	.L2834
+	bl	ftl_mask_bad_block
+.L2834:
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	add	x20, x24, :lo12:.LANCHOR63
+	strh	wzr, [x20, 56]
+	ldrh	w0, [x0, 80]
+	str	wzr, [x20, 320]
+	bl	ftl_free_sblk
+	adrp	x2, .LANCHOR53
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	mov	w0, -1
+	ldr	x2, [x2, #:lo12:.LANCHOR53]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x20, 8]
+	cbz	x0, .L2835
+	bl	buf_free
+.L2835:
+	add	x24, x24, :lo12:.LANCHOR63
+	str	xzr, [x24, 8]
+	bl	flt_sys_flush
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	mov	w2, 2177
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2836:
+	b	.L2836
+.L2833:
+	ldrh	w0, [x26, 6]
+	ldrh	w1, [x20, 26]
+	cmp	w0, 1
+	ldrh	w0, [x20, 24]
+	bls	.L2837
+	cmp	w1, w0
+	bcc	.L2827
+	mov	w0, 1
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	ldrh	w0, [x20, 56]
+	add	w1, w0, 1
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
+	strh	w1, [x0, 58]
+	b	.L2891
+.L2837:
+	mov	w2, 5
+	strb	w2, [x19, #:lo12:.LANCHOR130]
+	cmp	w1, w0
+	bcc	.L2838
+	ldrh	w0, [x20, 56]
+	add	w1, w0, 1
+	strh	w1, [x20, 56]
+	add	x0, x20, x0, sxtw 1
+	ldrh	w1, [x20]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x20]
+.L2838:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldrh	w1, [x22, 80]
+	strh	w1, [x0, 128]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	add	x0, x24, :lo12:.LANCHOR63
+	adrp	x1, .LANCHOR80
+	adrp	x2, .LANCHOR67
+	ldrh	w1, [x1, #:lo12:.LANCHOR80]
+	ldrb	w2, [x2, #:lo12:.LANCHOR67]
+	strh	wzr, [x0, 16]
+	strh	w1, [x0, 18]
+	cmp	w2, 2
+	strh	w2, [x0, 20]
+	bne	.L2839
+	ubfiz	w1, w1, 1, 15
+	strh	w1, [x0, 18]
+	mov	w1, 1
+	strh	w1, [x0, 20]
+.L2839:
+	add	x24, x24, :lo12:.LANCHOR63
+	strh	wzr, [x24, 22]
+	b	.L2868
+.L2841:
+	ldrh	w1, [x25, 16]
+	ldrh	w0, [x25, 18]
+	cmp	w1, w0
+	bcc	.L2842
+	mov	w0, 6
+	strb	w0, [x19, #:lo12:.LANCHOR130]
+	ldr	x0, [x25, 8]
+	bl	buf_free
+	str	xzr, [x25, 8]
+	b	.L2868
+.L2842:
+	cmp	w20, 7
+	bls	.L2774
+	cmp	w24, 1
+	bne	.L2868
+	add	w22, w22, 1
+	and	w22, w22, 255
+	cmp	w22, 4
+	bls	.L2774
+	b	.L2868
+.L2773:
+	bl	gc_update_l2p_map_new
+	mov	w20, -1
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	w20, [x22, 80]
+	bl	ftl_ext_info_flush
+	adrp	x0, .LANCHOR53
+	ldr	x0, [x0, #:lo12:.LANCHOR53]
+	strh	w20, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+	strb	wzr, [x19, #:lo12:.LANCHOR130]
+	bl	print_ftl_debug_info
+	b	.L2868
+.L2821:
+	adrp	x1, .LANCHOR193
+	adrp	x0, .LC0
+	mov	w2, 2075
+	add	x1, x1, :lo12:.LANCHOR193
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2824:
+	b	.L2824
+	.size	zftl_do_gc, .-zftl_do_gc
+	.section	.text.zftl_write,"ax",@progbits
+	.align	2
+	.global	zftl_write
+	.type	zftl_write, %function
+zftl_write:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	mov	w27, w0
+	adrp	x0, .LANCHOR29
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	mov	w19, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR29]
+	mov	w20, w2
+	stp	x21, x22, [sp, 32]
+	mov	x24, x3
+	stp	x25, x26, [sp, 64]
+	tbz	x0, 12, .L2895
+	mov	w3, w2
+	adrp	x0, .LC157
+	mov	w2, w1
+	add	x0, x0, :lo12:.LC157
+	mov	w1, w27
+	bl	printf
+.L2895:
+	cbnz	w27, .L2896
+	adrp	x0, .LANCHOR59
+	mov	w27, 24576
+	ldr	w0, [x0, #:lo12:.LANCHOR59]
+.L2897:
+	add	w1, w19, w20
+	cmp	w0, w1
+	bcc	.L2911
+	adrp	x23, .LANCHOR52
+	add	w27, w27, w19
+	sub	w19, w20, #1
+	adrp	x25, .LANCHOR53
+	ldrb	w0, [x23, #:lo12:.LANCHOR52]
+	add	w19, w19, w27
+	add	x23, x23, :lo12:.LANCHOR52
+	udiv	w22, w27, w0
+	udiv	w19, w19, w0
+	add	w0, w27, w20
+	str	w0, [x29, 108]
+	mov	w26, w22
+	sub	w21, w19, w22
+	add	w21, w21, 1
+.L2899:
+	cbnz	w21, .L2907
+	adrp	x20, .LANCHOR89
+	adrp	x19, .LANCHOR93
+	add	x20, x20, :lo12:.LANCHOR89
+	add	x19, x19, :lo12:.LANCHOR93
+	bl	ftl_write_commit
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+.L2908:
+	ldrh	w0, [x20]
+	ldrh	w1, [x19]
+	add	w0, w0, w1
+	cmp	w0, 7
+	ble	.L2909
+	mov	w0, 0
+.L2894:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2896:
+	cmp	w27, 3
+	bhi	.L2911
+	lsl	w27, w27, 13
+	mov	w0, 8192
+	b	.L2897
+.L2907:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2900
+	bl	ftl_write_commit
+	b	.L2899
+.L2900:
+	ldrb	w3, [x23]
+	cmp	w26, w22
+	strb	wzr, [x0, 57]
+	ccmp	w26, w19, 4, ne
+	strb	w3, [x0, 56]
+	bne	.L2903
+	cmp	w26, w22
+	bne	.L2904
+	udiv	w0, w27, w3
+	msub	w0, w0, w3, w27
+	and	w0, w0, 255
+	strb	w0, [x28, 57]
+	sub	w3, w3, w0
+	and	w3, w3, 255
+	cmp	w20, w3
+	csel	w3, w20, w3, cc
+.L2916:
+	strb	w3, [x28, 56]
+.L2903:
+	ldr	x3, [x28, 8]
+	mov	x1, x24
+	ldrb	w0, [x28, 57]
+	sub	w21, w21, #1
+	ldrb	w2, [x28, 56]
+	ubfiz	x0, x0, 9, 8
+	lsl	w2, w2, 9
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	ldr	x1, [x25, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 8]
+	str	w26, [x28, 36]
+	add	w26, w26, 1
+	add	w2, w0, 1
+	str	w2, [x1, 8]
+	str	w0, [x28, 32]
+	mov	x0, x28
+	bl	ftl_write_buf
+	ldrb	w0, [x28, 56]
+	ubfiz	x0, x0, 9, 8
+	add	x24, x24, x0
+	b	.L2899
+.L2904:
+	ldr	w0, [x29, 108]
+	msub	w3, w3, w26, w0
+	b	.L2916
+.L2909:
+	mov	w1, 1
+	mov	w0, 0
+	bl	zftl_do_gc
+	b	.L2908
+.L2911:
+	mov	w0, -1
+	b	.L2894
+	.size	zftl_write, .-zftl_write
+	.section	.text.zftl_vendor_write,"ax",@progbits
+	.align	2
+	.global	zftl_vendor_write
+	.type	zftl_vendor_write, %function
+zftl_vendor_write:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	zftl_vendor_write, .-zftl_vendor_write
+	.section	.text.zftl_sys_write,"ax",@progbits
+	.align	2
+	.global	zftl_sys_write
+	.type	zftl_sys_write, %function
+zftl_sys_write:
+	mov	x3, x2
+	mov	w2, w1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	zftl_sys_write, .-zftl_sys_write
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	mov	w1, w0
+	mov	w0, 2
+	b	zftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashBootVendorWrite,"ax",@progbits
+	.align	2
+	.global	FlashBootVendorWrite
+	.type	FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+	mov	x3, x2
+	mov	w2, w1
+	add	w1, w0, 512
+	mov	w0, 2
+	b	zftl_write
+	.size	FlashBootVendorWrite, .-FlashBootVendorWrite
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	and	w0, w0, 255
+	b	zftl_write
+	.size	ftl_write, .-ftl_write
+	.section	.text.zftl_discard,"ax",@progbits
+	.align	2
+	.global	zftl_discard
+	.type	zftl_discard, %function
+zftl_discard:
+	stp	x29, x30, [sp, -128]!
+	adrp	x2, .LANCHOR59
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	ldr	w2, [x2, #:lo12:.LANCHOR59]
+	add	w1, w0, w1
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w2, w1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	bcc	.L2942
+	adrp	x25, .LANCHOR52
+	adrp	x23, .LANCHOR194
+	add	w24, w0, 24576
+	adrp	x22, .LANCHOR53
+	ldrb	w21, [x25, #:lo12:.LANCHOR52]
+	ldr	w0, [x23, #:lo12:.LANCHOR194]
+	add	w0, w0, w19
+	str	w0, [x23, #:lo12:.LANCHOR194]
+	udiv	w20, w24, w21
+	ldr	x0, [x22, #:lo12:.LANCHOR53]
+	msub	w27, w20, w21, w24
+	ldr	w26, [x0, 8]
+	add	w1, w26, 1
+	str	w1, [x0, 8]
+	cbz	w27, .L2924
+	sub	w21, w21, w27
+	mov	w0, w20
+	cmp	w21, w19
+	csel	w21, w21, w19, ls
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L2925
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L2925:
+	ldr	w0, [x29, 120]
+	and	w28, w21, 65535
+	cmn	w0, #1
+	beq	.L2927
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x3, x0
+	cbz	x0, .L2927
+	strb	w27, [x0, 57]
+	ubfiz	x27, x27, 9, 25
+	strb	w21, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	lsl	w2, w28, 9
+	stp	w26, w20, [x3, 32]
+	str	x3, [x29, 104]
+	add	x0, x0, x27
+	bl	ftl_memset
+	ldr	x3, [x29, 104]
+	mov	x0, x3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2927:
+	add	w20, w20, 1
+	sub	w19, w19, w28
+.L2924:
+	cbz	w19, .L2929
+	bl	ftl_flush
+.L2929:
+	adrp	x27, .LANCHOR96
+	add	x21, x25, :lo12:.LANCHOR52
+	add	x27, x27, :lo12:.LANCHOR96
+	mov	w0, -1
+	str	w0, [x29, 124]
+.L2930:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L2935
+	cbz	w19, .L2937
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	bne	.L2938
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+.L2938:
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L2937
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L2937
+	strb	wzr, [x0, 57]
+	strb	w19, [x0, 56]
+	stp	w26, w20, [x21, 32]
+	ldrb	w0, [x25, #:lo12:.LANCHOR52]
+	cmp	w19, w0
+	bcc	.L2940
+	adrp	x1, .LANCHOR195
+	adrp	x0, .LC0
+	mov	w2, 1117
+	add	x1, x1, :lo12:.LANCHOR195
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2941:
+	b	.L2941
+.L2935:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L2931
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L2933
+	ldrb	w2, [x21]
+	mov	w1, 0
+	strb	w2, [x0, 56]
+	strb	wzr, [x0, 57]
+	ldr	x0, [x0, 8]
+	lsl	w2, w2, 9
+	stp	w26, w20, [x28, 32]
+	bl	ftl_memset
+	mov	x0, x28
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+.L2963:
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2933:
+	ldrb	w0, [x21]
+	add	w20, w20, 1
+	sub	w19, w19, w0
+	b	.L2930
+.L2931:
+	mov	w2, 0
+	add	x1, x29, 120
+	mov	w0, w20
+	bl	pm_log2phys
+	ldr	w0, [x29, 120]
+	cmn	w0, #1
+	beq	.L2933
+	add	x1, x29, 124
+	mov	w2, 1
+	mov	w0, w20
+	bl	pm_log2phys
+	ldrh	w3, [x27]
+	mov	w1, 21
+	ldr	w0, [x29, 120]
+	sub	w2, w1, w3
+	mov	w1, 1
+	lsr	w0, w0, w3
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR95
+	ldrb	w0, [x0, #:lo12:.LANCHOR95]
+	udiv	w0, w1, w0
+	bl	ftl_vpn_decrement
+	b	.L2963
+.L2940:
+	ldr	x0, [x21, 8]
+	lsl	w2, w19, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR53]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2937:
+	ldr	w1, [x23, #:lo12:.LANCHOR194]
+	cmp	w1, 8192
+	bls	.L2943
+	mov	w3, w19
+	mov	w2, w24
+	mov	w4, 0
+	adrp	x0, .LC158
+	add	x0, x0, :lo12:.LC158
+	bl	printf
+	str	wzr, [x23, #:lo12:.LANCHOR194]
+	bl	flt_sys_flush
+	adrp	x0, .LANCHOR196
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR196]
+.L2943:
+	mov	w0, 0
+	b	.L2922
+.L2942:
+	mov	w0, -1
+.L2922:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	zftl_discard, .-zftl_discard
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	mov	w0, w1
+	mov	w1, w2
+	b	zftl_discard
+	.size	ftl_discard, .-ftl_discard
+	.global	g_pm_spare
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	slc_cache_sblk
+	.global	xlc_data_sblk
+	.global	slc_data_sblk
+	.global	free_mix_sblk
+	.global	free_xlc_sblk
+	.global	free_slc_sblk
+	.global	gp_data_xlc_data_head
+	.global	gp_data_slc_data_head
+	.global	gp_data_slc_cache_head
+	.global	gp_free_mix_head
+	.global	gp_free_xlc_head
+	.global	gp_free_slc_head
+	.global	gp_sblk_list_tbl
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_xlc_data_index
+	.global	gc_slc_cache_index
+	.global	gc_slc_data_index
+	.global	gc_free_slc_sblk_th
+	.global	gc_slc_mode_vpn_th
+	.global	gc_slc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	check_vpc_tbl
+	.global	p_read_ahead_ext_buf
+	.global	discard_sector_count
+	.global	read_ahead_lpa
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_c_mix_max_xlc_ec_count
+	.global	_c_mix_max_slc_ec_count
+	.global	_c_swl_xlc_gc_th
+	.global	_c_swl_slc_gc_th
+	.global	_gc_after_discard_en
+	.global	_last_write_time
+	.global	_last_read_time
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	g_nand_para_info
+	.global	gp_nand_para_info
+	.global	g_nand_opt_para
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",@nobits
+	.align	2
+	.set	.LANCHOR33,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.zero	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR2,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.zero	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
+	.align	1
+	.set	.LANCHOR96,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.zero	2
+	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.zero	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR173,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.zero	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
+	.set	.LANCHOR100,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
+	.set	.LANCHOR72,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_type,"aw",@nobits
+	.set	.LANCHOR67,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.zero	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.zero	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR80,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.zero	2
+	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
+	.set	.LANCHOR95,. + 0
+	.type	_c_ftl_planes_per_die, %object
 	.size	_c_ftl_planes_per_die, 1
 _c_ftl_planes_per_die:
 	.zero	1
 	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR137,. + 0
+	.set	.LANCHOR161,. + 0
 	.type	_c_ftl_pm_page_num, %object
 	.size	_c_ftl_pm_page_num, 2
 _c_ftl_pm_page_num:
 	.zero	2
 	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
-	.set	.LANCHOR45,. + 0
+	.set	.LANCHOR52,. + 0
 	.type	_c_ftl_sec_per_page, %object
 	.size	_c_ftl_sec_per_page, 1
 _c_ftl_sec_per_page:
 	.zero	1
 	.section	.bss._c_max_pm_sblk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR101,. + 0
+	.set	.LANCHOR127,. + 0
 	.type	_c_max_pm_sblk, %object
 	.size	_c_max_pm_sblk, 2
 _c_max_pm_sblk:
+	.zero	2
+	.section	.bss._c_mix_max_slc_ec_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR180,. + 0
+	.type	_c_mix_max_slc_ec_count, %object
+	.size	_c_mix_max_slc_ec_count, 2
+_c_mix_max_slc_ec_count:
+	.zero	2
+	.section	.bss._c_mix_max_xlc_ec_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR181,. + 0
+	.type	_c_mix_max_xlc_ec_count, %object
+	.size	_c_mix_max_xlc_ec_count, 2
+_c_mix_max_xlc_ec_count:
+	.zero	2
+	.section	.bss._c_swl_slc_gc_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR126,. + 0
+	.type	_c_swl_slc_gc_th, %object
+	.size	_c_swl_slc_gc_th, 2
+_c_swl_slc_gc_th:
+	.zero	2
+	.section	.bss._c_swl_xlc_gc_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	_c_swl_xlc_gc_th, %object
+	.size	_c_swl_xlc_gc_th, 2
+_c_swl_xlc_gc_th:
 	.zero	2
 	.section	.bss._c_totle_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR162,. + 0
+	.set	.LANCHOR178,. + 0
 	.type	_c_totle_data_density, %object
 	.size	_c_totle_data_density, 4
 _c_totle_data_density:
 	.zero	4
 	.section	.bss._c_totle_log_page,"aw",@nobits
 	.align	2
-	.set	.LANCHOR47,. + 0
+	.set	.LANCHOR54,. + 0
 	.type	_c_totle_log_page, %object
 	.size	_c_totle_log_page, 4
 _c_totle_log_page:
 	.zero	4
 	.section	.bss._c_totle_phy_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR161,. + 0
+	.set	.LANCHOR177,. + 0
 	.type	_c_totle_phy_density, %object
 	.size	_c_totle_phy_density, 4
 _c_totle_phy_density:
 	.zero	4
 	.section	.bss._c_user_data_density,"aw",@nobits
 	.align	2
-	.set	.LANCHOR52,. + 0
+	.set	.LANCHOR59,. + 0
 	.type	_c_user_data_density, %object
 	.size	_c_user_data_density, 4
 _c_user_data_density:
+	.zero	4
+	.section	.bss._gc_after_discard_en,"aw",@nobits
+	.align	2
+	.set	.LANCHOR196,. + 0
+	.type	_gc_after_discard_en, %object
+	.size	_gc_after_discard_en, 4
+_gc_after_discard_en:
+	.zero	4
+	.section	.bss._last_read_time,"aw",@nobits
+	.align	2
+	.type	_last_read_time, %object
+	.size	_last_read_time, 4
+_last_read_time:
+	.zero	4
+	.section	.bss._last_write_time,"aw",@nobits
+	.align	2
+	.type	_last_write_time, %object
+	.size	_last_write_time, 4
+_last_write_time:
 	.zero	4
 	.section	.bss._max_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR164,. + 0
+	.set	.LANCHOR179,. + 0
 	.type	_max_slc_super_block, %object
 	.size	_max_slc_super_block, 2
 _max_slc_super_block:
 	.zero	2
 	.section	.bss._max_xlc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR163,. + 0
+	.set	.LANCHOR87,. + 0
 	.type	_max_xlc_super_block, %object
 	.size	_max_xlc_super_block, 2
 _max_xlc_super_block:
 	.zero	2
 	.section	.bss._min_slc_super_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR165,. + 0
+	.set	.LANCHOR83,. + 0
 	.type	_min_slc_super_block, %object
 	.size	_min_slc_super_block, 2
 _min_slc_super_block:
@@ -18429,29 +19733,57 @@ _min_slc_super_block:
 	.section	.bss.check_vpc_tbl,"aw",@nobits
 	.align	3
 	.type	check_vpc_tbl, %object
-	.size	check_vpc_tbl, 4352
+	.size	check_vpc_tbl, 4608
 check_vpc_tbl:
-	.zero	4352
+	.zero	4608
+	.section	.bss.discard_sector_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR194,. + 0
+	.type	discard_sector_count, %object
+	.size	discard_sector_count, 4
+discard_sector_count:
+	.zero	4
 	.section	.bss.fill_spare_size,"aw",@nobits
 	.align	1
-	.set	.LANCHOR31,. + 0
+	.set	.LANCHOR38,. + 0
 	.type	fill_spare_size, %object
 	.size	fill_spare_size, 2
 fill_spare_size:
 	.zero	2
 	.section	.bss.flash_read_retry,"aw",@nobits
 	.align	3
-	.set	.LANCHOR115,. + 0
+	.set	.LANCHOR139,. + 0
 	.type	flash_read_retry, %object
 	.size	flash_read_retry, 8
 flash_read_retry:
 	.zero	8
 	.section	.bss.free_buf_count,"aw",@nobits
-	.set	.LANCHOR38,. + 0
+	.set	.LANCHOR45,. + 0
 	.type	free_buf_count, %object
 	.size	free_buf_count, 1
 free_buf_count:
 	.zero	1
+	.section	.bss.free_mix_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR93,. + 0
+	.type	free_mix_sblk, %object
+	.size	free_mix_sblk, 2
+free_mix_sblk:
+	.zero	2
+	.section	.bss.free_slc_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR89,. + 0
+	.type	free_slc_sblk, %object
+	.size	free_slc_sblk, 2
+free_slc_sblk:
+	.zero	2
+	.section	.bss.free_xlc_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR91,. + 0
+	.type	free_xlc_sblk, %object
+	.size	free_xlc_sblk, 2
+free_xlc_sblk:
+	.zero	2
 	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
 	.align	6
 	.type	ftl_ext_info_data_buffer, %object
@@ -18460,7 +19792,7 @@ ftl_ext_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_flush_jiffies,"aw",@nobits
 	.align	2
-	.set	.LANCHOR168,. + 0
+	.set	.LANCHOR190,. + 0
 	.type	ftl_flush_jiffies, %object
 	.size	ftl_flush_jiffies, 4
 ftl_flush_jiffies:
@@ -18473,41 +19805,41 @@ ftl_info_data_buffer:
 	.zero	16384
 	.section	.bss.ftl_info_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR130,. + 0
+	.set	.LANCHOR154,. + 0
 	.type	ftl_info_spare, %object
 	.size	ftl_info_spare, 256
 ftl_info_spare:
 	.zero	256
 	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
 	.align	1
-	.set	.LANCHOR53,. + 0
+	.set	.LANCHOR60,. + 0
 	.type	ftl_low_format_cur_blk, %object
 	.size	ftl_low_format_cur_blk, 2
 ftl_low_format_cur_blk:
 	.zero	2
 	.section	.bss.ftl_power_lost_flag,"aw",@nobits
-	.set	.LANCHOR133,. + 0
+	.set	.LANCHOR157,. + 0
 	.type	ftl_power_lost_flag, %object
 	.size	ftl_power_lost_flag, 1
 ftl_power_lost_flag:
 	.zero	1
 	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR82,. + 0
+	.set	.LANCHOR105,. + 0
 	.type	ftl_sblk_lpa_tbl, %object
 	.size	ftl_sblk_lpa_tbl, 8
 ftl_sblk_lpa_tbl:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn,"aw",@nobits
 	.align	3
-	.set	.LANCHOR56,. + 0
+	.set	.LANCHOR4,. + 0
 	.type	ftl_sblk_vpn, %object
 	.size	ftl_sblk_vpn, 8
 ftl_sblk_vpn:
 	.zero	8
 	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
 	.align	1
-	.set	.LANCHOR87,. + 0
+	.set	.LANCHOR110,. + 0
 	.type	ftl_sblk_vpn_update_id, %object
 	.size	ftl_sblk_vpn_update_id, 2
 ftl_sblk_vpn_update_id:
@@ -18520,241 +19852,241 @@ ftl_tmp_buffer:
 	.zero	16384
 	.section	.bss.ftl_tmp_spare,"aw",@nobits
 	.align	6
-	.set	.LANCHOR121,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	ftl_tmp_spare, %object
 	.size	ftl_tmp_spare, 256
 ftl_tmp_spare:
 	.zero	256
 	.section	.bss.ftl_vpn_update_count,"aw",@nobits
 	.align	1
-	.set	.LANCHOR86,. + 0
+	.set	.LANCHOR109,. + 0
 	.type	ftl_vpn_update_count, %object
 	.size	ftl_vpn_update_count, 2
 ftl_vpn_update_count:
 	.zero	2
-	.section	.bss.gNandOptPara,"aw",@nobits
-	.align	3
-	.set	.LANCHOR103,. + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.zero	32
 	.section	.bss.g_block_align_addr,"aw",@nobits
 	.align	1
-	.set	.LANCHOR13,. + 0
+	.set	.LANCHOR20,. + 0
 	.type	g_block_align_addr, %object
 	.size	g_block_align_addr, 2
 g_block_align_addr:
 	.zero	2
 	.section	.bss.g_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR36,. + 0
+	.set	.LANCHOR43,. + 0
 	.type	g_buf, %object
 	.size	g_buf, 2048
 g_buf:
 	.zero	2048
 	.section	.bss.g_die_addr,"aw",@nobits
 	.align	2
-	.set	.LANCHOR98,. + 0
+	.set	.LANCHOR122,. + 0
 	.type	g_die_addr, %object
 	.size	g_die_addr, 32
 g_die_addr:
 	.zero	32
 	.section	.bss.g_die_cs_idx,"aw",@nobits
 	.align	2
-	.set	.LANCHOR10,. + 0
+	.set	.LANCHOR17,. + 0
 	.type	g_die_cs_idx, %object
 	.size	g_die_cs_idx, 8
 g_die_cs_idx:
 	.zero	8
 	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
-	.set	.LANCHOR74,. + 0
+	.set	.LANCHOR98,. + 0
 	.type	g_flash_3d_mlc_flag, %object
 	.size	g_flash_3d_mlc_flag, 1
 g_flash_3d_mlc_flag:
 	.zero	1
 	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
-	.set	.LANCHOR66,. + 0
+	.set	.LANCHOR69,. + 0
 	.type	g_flash_3d_tlc_flag, %object
 	.size	g_flash_3d_tlc_flag, 1
 g_flash_3d_tlc_flag:
 	.zero	1
 	.section	.bss.g_flash_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR117,. + 0
+	.set	.LANCHOR141,. + 0
 	.type	g_flash_blk_info, %object
 	.size	g_flash_blk_info, 4
 g_flash_blk_info:
 	.zero	4
 	.section	.bss.g_flash_cur_mode,"aw",@nobits
-	.set	.LANCHOR20,. + 0
+	.set	.LANCHOR27,. + 0
 	.type	g_flash_cur_mode, %object
 	.size	g_flash_cur_mode, 1
 g_flash_cur_mode:
 	.zero	1
 	.section	.bss.g_flash_interface_mode,"aw",@nobits
-	.set	.LANCHOR25,. + 0
+	.set	.LANCHOR32,. + 0
 	.type	g_flash_interface_mode, %object
 	.size	g_flash_interface_mode, 1
 g_flash_interface_mode:
 	.zero	1
 	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
-	.set	.LANCHOR23,. + 0
+	.set	.LANCHOR30,. + 0
 	.type	g_flash_multi_page_prog_en, %object
 	.size	g_flash_multi_page_prog_en, 1
 g_flash_multi_page_prog_en:
 	.zero	1
 	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR168,. + 0
 	.type	g_flash_multi_page_read_en, %object
 	.size	g_flash_multi_page_read_en, 1
 g_flash_multi_page_read_en:
 	.zero	1
 	.section	.bss.g_flash_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR119,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	g_flash_page_buffer, %object
 	.size	g_flash_page_buffer, 8
 g_flash_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_reversd_blks,"aw",@nobits
-	.set	.LANCHOR123,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	g_flash_reversd_blks, %object
 	.size	g_flash_reversd_blks, 1
 g_flash_reversd_blks:
 	.zero	1
 	.section	.bss.g_flash_slc_mode,"aw",@nobits
-	.set	.LANCHOR11,. + 0
+	.set	.LANCHOR18,. + 0
 	.type	g_flash_slc_mode, %object
 	.size	g_flash_slc_mode, 1
 g_flash_slc_mode:
 	.zero	1
 	.section	.bss.g_flash_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR118,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	g_flash_spare_buffer, %object
 	.size	g_flash_spare_buffer, 8
 g_flash_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR116,. + 0
+	.set	.LANCHOR140,. + 0
 	.type	g_flash_sys_spare_buffer, %object
 	.size	g_flash_sys_spare_buffer, 8
 g_flash_sys_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR111,. + 0
+	.set	.LANCHOR135,. + 0
 	.type	g_flash_tmp_page_buffer, %object
 	.size	g_flash_tmp_page_buffer, 8
 g_flash_tmp_page_buffer:
 	.zero	8
 	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
 	.align	3
-	.set	.LANCHOR112,. + 0
+	.set	.LANCHOR136,. + 0
 	.type	g_flash_tmp_spare_buffer, %object
 	.size	g_flash_tmp_spare_buffer, 8
 g_flash_tmp_spare_buffer:
 	.zero	8
 	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
-	.set	.LANCHOR35,. + 0
+	.set	.LANCHOR42,. + 0
 	.type	g_flash_toggle_mode_en, %object
 	.size	g_flash_toggle_mode_en, 1
 g_flash_toggle_mode_en:
 	.zero	1
 	.section	.bss.g_ftl_info_blk,"aw",@nobits
 	.align	6
-	.set	.LANCHOR131,. + 0
+	.set	.LANCHOR155,. + 0
 	.type	g_ftl_info_blk, %object
 	.size	g_ftl_info_blk, 4
 g_ftl_info_blk:
 	.zero	4
 	.section	.bss.g_gc_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR58,. + 0
+	.set	.LANCHOR63,. + 0
 	.type	g_gc_info, %object
 	.size	g_gc_info, 328
 g_gc_info:
 	.zero	328
 	.section	.bss.g_idb_ecc_bits,"aw",@nobits
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR169,. + 0
 	.type	g_idb_ecc_bits, %object
 	.size	g_idb_ecc_bits, 1
 g_idb_ecc_bits:
 	.zero	1
 	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR170,. + 0
 	.type	g_idb_slc_mode_enable, %object
 	.size	g_idb_slc_mode_enable, 1
 g_idb_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_lsb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR14,. + 0
+	.set	.LANCHOR21,. + 0
 	.type	g_lsb_page_tbl, %object
 	.size	g_lsb_page_tbl, 512
 g_lsb_page_tbl:
 	.zero	512
 	.section	.bss.g_maxRegNum,"aw",@nobits
-	.set	.LANCHOR4,. + 0
+	.set	.LANCHOR11,. + 0
 	.type	g_maxRegNum, %object
 	.size	g_maxRegNum, 1
 g_maxRegNum:
 	.zero	1
 	.section	.bss.g_maxRetryCount,"aw",@nobits
-	.set	.LANCHOR113,. + 0
+	.set	.LANCHOR137,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.zero	1
 	.section	.bss.g_msb_page_tbl,"aw",@nobits
 	.align	2
-	.set	.LANCHOR96,. + 0
+	.set	.LANCHOR120,. + 0
 	.type	g_msb_page_tbl, %object
 	.size	g_msb_page_tbl, 1024
 g_msb_page_tbl:
 	.zero	1024
 	.section	.bss.g_nand_max_die,"aw",@nobits
-	.set	.LANCHOR8,. + 0
+	.set	.LANCHOR15,. + 0
 	.type	g_nand_max_die, %object
 	.size	g_nand_max_die, 1
 g_nand_max_die:
 	.zero	1
+	.section	.bss.g_nand_opt_para,"aw",@nobits
+	.align	3
+	.set	.LANCHOR129,. + 0
+	.type	g_nand_opt_para, %object
+	.size	g_nand_opt_para, 32
+g_nand_opt_para:
+	.zero	32
 	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
-	.set	.LANCHOR27,. + 0
+	.set	.LANCHOR34,. + 0
 	.type	g_nandc_ecc_bits, %object
 	.size	g_nandc_ecc_bits, 1
 g_nandc_ecc_bits:
 	.zero	1
 	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR30,. + 0
+	.set	.LANCHOR37,. + 0
 	.type	g_nandc_v6_master_info, %object
 	.size	g_nandc_v6_master_info, 40
 g_nandc_v6_master_info:
 	.zero	40
 	.section	.bss.g_nandc_ver,"aw",@nobits
-	.set	.LANCHOR7,. + 0
+	.set	.LANCHOR14,. + 0
 	.type	g_nandc_ver, %object
 	.size	g_nandc_ver, 1
 g_nandc_ver:
 	.zero	1
 	.section	.bss.g_pm_spare,"aw",@nobits
 	.align	3
-	.set	.LANCHOR141,. + 0
+	.set	.LANCHOR165,. + 0
 	.type	g_pm_spare, %object
 	.size	g_pm_spare, 8
 g_pm_spare:
 	.zero	8
 	.section	.bss.g_retryMode,"aw",@nobits
-	.set	.LANCHOR2,. + 0
+	.set	.LANCHOR9,. + 0
 	.type	g_retryMode, %object
 	.size	g_retryMode, 1
 g_retryMode:
 	.zero	1
 	.section	.bss.g_slc_mode_addr2,"aw",@nobits
-	.set	.LANCHOR12,. + 0
+	.set	.LANCHOR19,. + 0
 	.type	g_slc_mode_addr2, %object
 	.size	g_slc_mode_addr2, 1
 g_slc_mode_addr2:
@@ -18766,254 +20098,359 @@ g_slc_mode_enable:
 	.zero	1
 	.section	.bss.g_slc_page_num,"aw",@nobits
 	.align	1
-	.set	.LANCHOR97,. + 0
+	.set	.LANCHOR121,. + 0
 	.type	g_slc_page_num, %object
 	.size	g_slc_page_num, 2
 g_slc_page_num:
 	.zero	2
 	.section	.bss.g_totle_phy_block,"aw",@nobits
 	.align	1
-	.set	.LANCHOR99,. + 0
+	.set	.LANCHOR123,. + 0
 	.type	g_totle_phy_block, %object
 	.size	g_totle_phy_block, 2
 g_totle_phy_block:
 	.zero	2
 	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR109,. + 0
+	.set	.LANCHOR133,. + 0
 	.type	gc_des_ppa_tbl, %object
 	.size	gc_des_ppa_tbl, 8
 gc_des_ppa_tbl:
 	.zero	8
+	.section	.bss.gc_free_slc_sblk_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR73,. + 0
+	.type	gc_free_slc_sblk_th, %object
+	.size	gc_free_slc_sblk_th, 2
+gc_free_slc_sblk_th:
+	.zero	2
 	.section	.bss.gc_lpa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR107,. + 0
+	.set	.LANCHOR131,. + 0
 	.type	gc_lpa_tbl, %object
 	.size	gc_lpa_tbl, 8
 gc_lpa_tbl:
 	.zero	8
 	.section	.bss.gc_mode,"aw",@nobits
-	.set	.LANCHOR67,. + 0
+	.set	.LANCHOR70,. + 0
 	.type	gc_mode, %object
 	.size	gc_mode, 1
 gc_mode:
 	.zero	1
 	.section	.bss.gc_page_buf_id,"aw",@nobits
 	.align	3
-	.set	.LANCHOR65,. + 0
+	.set	.LANCHOR68,. + 0
 	.type	gc_page_buf_id, %object
 	.size	gc_page_buf_id, 8
 gc_page_buf_id:
 	.zero	8
 	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
 	.align	3
-	.set	.LANCHOR108,. + 0
+	.set	.LANCHOR132,. + 0
 	.type	gc_pre_ppa_tbl, %object
 	.size	gc_pre_ppa_tbl, 8
 gc_pre_ppa_tbl:
 	.zero	8
+	.section	.bss.gc_slc_cache_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR77,. + 0
+	.type	gc_slc_cache_index, %object
+	.size	gc_slc_cache_index, 2
+gc_slc_cache_index:
+	.zero	2
+	.section	.bss.gc_slc_data_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR81,. + 0
+	.type	gc_slc_data_index, %object
+	.size	gc_slc_data_index, 2
+gc_slc_data_index:
+	.zero	2
+	.section	.bss.gc_slc_mode_tlc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	gc_slc_mode_tlc_vpn_th, %object
+	.size	gc_slc_mode_tlc_vpn_th, 2
+gc_slc_mode_tlc_vpn_th:
+	.zero	2
 	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR57,. + 0
+	.set	.LANCHOR62,. + 0
 	.type	gc_slc_mode_vpn_th, %object
 	.size	gc_slc_mode_vpn_th, 2
 gc_slc_mode_vpn_th:
 	.zero	2
 	.section	.bss.gc_state,"aw",@nobits
-	.set	.LANCHOR104,. + 0
+	.set	.LANCHOR130,. + 0
 	.type	gc_state, %object
 	.size	gc_state, 1
 gc_state:
 	.zero	1
 	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR105,. + 0
+	.set	.LANCHOR88,. + 0
 	.type	gc_tlc_mode_slc_vpn_th, %object
 	.size	gc_tlc_mode_slc_vpn_th, 2
 gc_tlc_mode_slc_vpn_th:
 	.zero	2
 	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
 	.align	1
-	.set	.LANCHOR106,. + 0
+	.set	.LANCHOR85,. + 0
 	.type	gc_tlc_mode_tlc_vpn_th, %object
 	.size	gc_tlc_mode_tlc_vpn_th, 2
 gc_tlc_mode_tlc_vpn_th:
 	.zero	2
 	.section	.bss.gc_valid_page_ppa,"aw",@nobits
 	.align	3
-	.set	.LANCHOR61,. + 0
+	.set	.LANCHOR64,. + 0
 	.type	gc_valid_page_ppa, %object
 	.size	gc_valid_page_ppa, 8
 gc_valid_page_ppa:
 	.zero	8
-	.section	.bss.gpNandParaInfo,"aw",@nobits
-	.align	3
-	.set	.LANCHOR34,. + 0
-	.type	gpNandParaInfo, %object
-	.size	gpNandParaInfo, 8
-gpNandParaInfo:
-	.zero	8
+	.section	.bss.gc_xlc_data_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR78,. + 0
+	.type	gc_xlc_data_index, %object
+	.size	gc_xlc_data_index, 2
+gc_xlc_data_index:
+	.zero	2
 	.section	.bss.gp_blk_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR59,. + 0
+	.set	.LANCHOR3,. + 0
 	.type	gp_blk_info, %object
 	.size	gp_blk_info, 8
 gp_blk_info:
+	.zero	8
+	.section	.bss.gp_data_slc_cache_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR76,. + 0
+	.type	gp_data_slc_cache_head, %object
+	.size	gp_data_slc_cache_head, 8
+gp_data_slc_cache_head:
+	.zero	8
+	.section	.bss.gp_data_slc_data_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR75,. + 0
+	.type	gp_data_slc_data_head, %object
+	.size	gp_data_slc_data_head, 8
+gp_data_slc_data_head:
+	.zero	8
+	.section	.bss.gp_data_xlc_data_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR74,. + 0
+	.type	gp_data_xlc_data_head, %object
+	.size	gp_data_xlc_data_head, 8
+gp_data_xlc_data_head:
 	.zero	8
 	.section	.bss.gp_flash_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR5,. + 0
+	.set	.LANCHOR12,. + 0
 	.type	gp_flash_info, %object
 	.size	gp_flash_info, 8
 gp_flash_info:
+	.zero	8
+	.section	.bss.gp_free_mix_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR94,. + 0
+	.type	gp_free_mix_head, %object
+	.size	gp_free_mix_head, 8
+gp_free_mix_head:
+	.zero	8
+	.section	.bss.gp_free_slc_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR90,. + 0
+	.type	gp_free_slc_head, %object
+	.size	gp_free_slc_head, 8
+gp_free_slc_head:
+	.zero	8
+	.section	.bss.gp_free_xlc_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR92,. + 0
+	.type	gp_free_xlc_head, %object
+	.size	gp_free_xlc_head, 8
+gp_free_xlc_head:
 	.zero	8
 	.section	.bss.gp_ftl_ext_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR60,. + 0
+	.set	.LANCHOR5,. + 0
 	.type	gp_ftl_ext_info, %object
 	.size	gp_ftl_ext_info, 8
 gp_ftl_ext_info:
 	.zero	8
 	.section	.bss.gp_ftl_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR46,. + 0
+	.set	.LANCHOR53,. + 0
 	.type	gp_ftl_info, %object
 	.size	gp_ftl_info, 8
 gp_ftl_info:
+	.zero	8
+	.section	.bss.gp_nand_para_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR41,. + 0
+	.type	gp_nand_para_info, %object
+	.size	gp_nand_para_info, 8
+gp_nand_para_info:
 	.zero	8
 	.section	.bss.gp_nandc,"aw",@nobits
 	.align	3
-	.set	.LANCHOR6,. + 0
+	.set	.LANCHOR13,. + 0
 	.type	gp_nandc, %object
 	.size	gp_nandc, 8
 gp_nandc:
+	.zero	8
+	.section	.bss.gp_sblk_list_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	gp_sblk_list_tbl, %object
+	.size	gp_sblk_list_tbl, 8
+gp_sblk_list_tbl:
 	.zero	8
 	.section	.bss.lpa_hash,"aw",@nobits
 	.align	3
-	.set	.LANCHOR81,. + 0
+	.set	.LANCHOR104,. + 0
 	.type	lpa_hash, %object
 	.size	lpa_hash, 512
 lpa_hash:
 	.zero	512
 	.section	.bss.lpa_hash_index,"aw",@nobits
 	.align	3
-	.set	.LANCHOR83,. + 0
+	.set	.LANCHOR106,. + 0
 	.type	lpa_hash_index, %object
 	.size	lpa_hash_index, 8
 lpa_hash_index:
 	.zero	8
 	.section	.bss.nandc_hw_seed,"aw",@nobits
-	.set	.LANCHOR28,. + 0
+	.set	.LANCHOR35,. + 0
 	.type	nandc_hw_seed, %object
 	.size	nandc_hw_seed, 1
 nandc_hw_seed:
 	.zero	1
 	.section	.bss.nandc_randomizer_en,"aw",@nobits
-	.set	.LANCHOR29,. + 0
+	.set	.LANCHOR36,. + 0
 	.type	nandc_randomizer_en, %object
 	.size	nandc_randomizer_en, 1
 nandc_randomizer_en:
 	.zero	1
 	.section	.bss.p_free_buf_head,"aw",@nobits
-	.set	.LANCHOR37,. + 0
+	.set	.LANCHOR44,. + 0
 	.type	p_free_buf_head, %object
 	.size	p_free_buf_head, 1
 p_free_buf_head:
 	.zero	1
 	.section	.bss.p_read_ahead_ext_buf,"aw",@nobits
 	.align	3
-	.set	.LANCHOR50,. + 0
+	.set	.LANCHOR57,. + 0
 	.type	p_read_ahead_ext_buf, %object
 	.size	p_read_ahead_ext_buf, 8
 p_read_ahead_ext_buf:
 	.zero	8
 	.section	.bss.pm_gc_enable,"aw",@nobits
 	.align	2
-	.set	.LANCHOR91,. + 0
+	.set	.LANCHOR115,. + 0
 	.type	pm_gc_enable, %object
 	.size	pm_gc_enable, 4
 pm_gc_enable:
 	.zero	4
 	.section	.bss.pm_last_load_ram_id,"aw",@nobits
-	.set	.LANCHOR151,. + 0
+	.set	.LANCHOR175,. + 0
 	.type	pm_last_load_ram_id, %object
 	.size	pm_last_load_ram_id, 1
 pm_last_load_ram_id:
 	.zero	1
 	.section	.bss.pm_last_update_ram_id,"aw",@nobits
-	.set	.LANCHOR94,. + 0
+	.set	.LANCHOR118,. + 0
 	.type	pm_last_update_ram_id, %object
 	.size	pm_last_update_ram_id, 1
 pm_last_update_ram_id:
 	.zero	1
 	.section	.bss.pm_ram_info,"aw",@nobits
 	.align	3
-	.set	.LANCHOR93,. + 0
+	.set	.LANCHOR117,. + 0
 	.type	pm_ram_info, %object
 	.size	pm_ram_info, 512
 pm_ram_info:
 	.zero	512
 	.section	.bss.read_ahead_lpa,"aw",@nobits
 	.align	2
-	.set	.LANCHOR49,. + 0
+	.set	.LANCHOR56,. + 0
 	.type	read_ahead_lpa, %object
 	.size	read_ahead_lpa, 4
 read_ahead_lpa:
 	.zero	4
 	.section	.bss.sblk_gc_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR62,. + 0
+	.set	.LANCHOR65,. + 0
 	.type	sblk_gc_write_completed_queue_head, %object
 	.size	sblk_gc_write_completed_queue_head, 1
 sblk_gc_write_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_queue_head,"aw",@nobits
-	.set	.LANCHOR90,. + 0
+	.set	.LANCHOR114,. + 0
 	.type	sblk_queue_head, %object
 	.size	sblk_queue_head, 1
 sblk_queue_head:
 	.zero	1
 	.section	.bss.sblk_read_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR51,. + 0
+	.set	.LANCHOR58,. + 0
 	.type	sblk_read_completed_queue_head, %object
 	.size	sblk_read_completed_queue_head, 1
 sblk_read_completed_queue_head:
 	.zero	1
 	.section	.bss.sblk_write_completed_queue_head,"aw",@nobits
-	.set	.LANCHOR88,. + 0
+	.set	.LANCHOR111,. + 0
 	.type	sblk_write_completed_queue_head, %object
 	.size	sblk_write_completed_queue_head, 1
 sblk_write_completed_queue_head:
 	.zero	1
+	.section	.bss.slc_cache_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR82,. + 0
+	.type	slc_cache_sblk, %object
+	.size	slc_cache_sblk, 2
+slc_cache_sblk:
+	.zero	2
+	.section	.bss.slc_data_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	slc_data_sblk, %object
+	.size	slc_data_sblk, 2
+slc_data_sblk:
+	.zero	2
 	.section	.bss.write_buf_count,"aw",@nobits
-	.set	.LANCHOR43,. + 0
+	.set	.LANCHOR50,. + 0
 	.type	write_buf_count, %object
 	.size	write_buf_count, 1
 write_buf_count:
 	.zero	1
 	.section	.bss.write_buf_head,"aw",@nobits
-	.set	.LANCHOR42,. + 0
+	.set	.LANCHOR49,. + 0
 	.type	write_buf_head, %object
 	.size	write_buf_head, 1
 write_buf_head:
 	.zero	1
 	.section	.bss.write_commit_count,"aw",@nobits
-	.set	.LANCHOR89,. + 0
+	.set	.LANCHOR112,. + 0
 	.type	write_commit_count, %object
 	.size	write_commit_count, 1
 write_commit_count:
 	.zero	1
 	.section	.bss.write_commit_head,"aw",@nobits
-	.set	.LANCHOR127,. + 0
+	.set	.LANCHOR151,. + 0
 	.type	write_commit_head, %object
 	.size	write_commit_head, 1
 write_commit_head:
 	.zero	1
-	.section	.data.NandFlashParaTbl,"aw",@progbits
+	.section	.bss.xlc_data_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	xlc_data_sblk, %object
+	.size	xlc_data_sblk, 2
+xlc_data_sblk:
+	.zero	2
+	.section	.data.g_nand_para_info,"aw",@progbits
 	.align	3
-	.set	.LANCHOR142,. + 0
-	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 768
-NandFlashParaTbl:
+	.set	.LANCHOR26,. + 0
+	.type	g_nand_para_info, %object
+	.size	g_nand_para_info, 32
+g_nand_para_info:
 	.byte	6
 	.byte	-104
 	.byte	58
@@ -19030,750 +20467,903 @@ NandFlashParaTbl:
 	.hword	758
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-	.byte	32
-	.byte	2
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+	.byte	4
+	.byte	0
+	.hword	256
+	.byte	1
+	.byte	-94
+	.byte	0
+	.byte	0
+	.section	.data.hy_f26_ref_value,"aw",@progbits
+	.align	3
+	.set	.LANCHOR134,. + 0
+	.type	hy_f26_ref_value, %object
+	.size	hy_f26_ref_value, 28
+hy_f26_ref_value:
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+	.byte	0
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+	.byte	0
+	.byte	-26
+	.byte	-30
+	.byte	0
+	.byte	0
+	.byte	-32
+	.byte	-37
+	.section	.data.nand_opt_para,"aw",@progbits
+	.align	3
+	.set	.LANCHOR167,. + 0
+	.type	nand_opt_para, %object
+	.size	nand_opt_para, 128
+nand_opt_para:
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+	.zero	14
+	.section	.data.sd15_slc_rr,"aw",@progbits
+	.align	3
+	.set	.LANCHOR25,. + 0
+	.type	sd15_slc_rr, %object
+	.size	sd15_slc_rr, 25
+sd15_slc_rr:
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+	.byte	88
+	.byte	96
+	.byte	104
+	.byte	112
+	.section	.data.sd15_tlc_rr,"aw",@progbits
+	.align	3
+	.set	.LANCHOR24,. + 0
+	.type	sd15_tlc_rr, %object
+	.size	sd15_tlc_rr, 329
+sd15_tlc_rr:
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+	.set	.LANCHOR150,. + 0
+	.type	__func__.10696, %object
+	.size	__func__.10696, 15
+__func__.10696:
 	.string	"sblk_prog_page"
-	.section	.rodata.__func__.10542,"a",@progbits
+	.section	.rodata.__func__.10755,"a",@progbits
 	.align	3
-	.set	.LANCHOR148,. + 0
-	.type	__func__.10542, %object
-	.size	__func__.10542, 16
-__func__.10542:
+	.set	.LANCHOR172,. + 0
+	.type	__func__.10755, %object
+	.size	__func__.10755, 16
+__func__.10755:
 	.string	"load_l2p_region"
-	.section	.rodata.__func__.10556,"a",@progbits
+	.section	.rodata.__func__.10769,"a",@progbits
 	.align	3
-	.set	.LANCHOR102,. + 0
-	.type	__func__.10556, %object
-	.size	__func__.10556, 13
-__func__.10556:
+	.set	.LANCHOR128,. + 0
+	.type	__func__.10769, %object
+	.size	__func__.10769, 13
+__func__.10769:
 	.string	"pm_free_sblk"
-	.section	.rodata.__func__.10576,"a",@progbits
+	.section	.rodata.__func__.10789,"a",@progbits
 	.align	3
-	.set	.LANCHOR150,. + 0
-	.type	__func__.10576, %object
-	.size	__func__.10576, 6
-__func__.10576:
+	.set	.LANCHOR174,. + 0
+	.type	__func__.10789, %object
+	.size	__func__.10789, 6
+__func__.10789:
 	.string	"pm_gc"
-	.section	.rodata.__func__.10592,"a",@progbits
+	.section	.rodata.__func__.10805,"a",@progbits
 	.align	3
-	.set	.LANCHOR92,. + 0
-	.type	__func__.10592, %object
-	.size	__func__.10592, 17
-__func__.10592:
+	.set	.LANCHOR116,. + 0
+	.type	__func__.10805, %object
+	.size	__func__.10805, 17
+__func__.10805:
 	.string	"pm_alloc_new_blk"
-	.section	.rodata.__func__.10602,"a",@progbits
+	.section	.rodata.__func__.10815,"a",@progbits
 	.align	3
-	.set	.LANCHOR140,. + 0
-	.type	__func__.10602, %object
-	.size	__func__.10602, 14
-__func__.10602:
+	.set	.LANCHOR164,. + 0
+	.type	__func__.10815, %object
+	.size	__func__.10815, 14
+__func__.10815:
 	.string	"pm_write_page"
-	.section	.rodata.__func__.10620,"a",@progbits
+	.section	.rodata.__func__.10833,"a",@progbits
 	.align	3
-	.set	.LANCHOR95,. + 0
-	.type	__func__.10620, %object
-	.size	__func__.10620, 21
-__func__.10620:
+	.set	.LANCHOR119,. + 0
+	.type	__func__.10833, %object
+	.size	__func__.10833, 21
+__func__.10833:
 	.string	"pm_select_ram_region"
-	.section	.rodata.__func__.8406,"a",@progbits
+	.section	.rodata.__func__.8490,"a",@progbits
 	.align	3
-	.set	.LANCHOR114,. + 0
-	.type	__func__.8406, %object
-	.size	__func__.8406, 19
-__func__.8406:
+	.set	.LANCHOR138,. + 0
+	.type	__func__.8490, %object
+	.size	__func__.8490, 19
+__func__.8490:
 	.string	"flash_read_page_en"
-	.section	.rodata.__func__.8435,"a",@progbits
+	.section	.rodata.__func__.8519,"a",@progbits
 	.align	3
-	.set	.LANCHOR128,. + 0
-	.type	__func__.8435, %object
-	.size	__func__.8435, 19
-__func__.8435:
+	.set	.LANCHOR152,. + 0
+	.type	__func__.8519, %object
+	.size	__func__.8519, 19
+__func__.8519:
 	.string	"flash_prog_page_en"
-	.section	.rodata.__func__.8450,"a",@progbits
+	.section	.rodata.__func__.8534,"a",@progbits
 	.align	3
-	.set	.LANCHOR21,. + 0
-	.type	__func__.8450, %object
-	.size	__func__.8450, 26
-__func__.8450:
+	.set	.LANCHOR28,. + 0
+	.type	__func__.8534, %object
+	.size	__func__.8534, 26
+__func__.8534:
 	.string	"flash_erase_duplane_block"
-	.section	.rodata.__func__.8461,"a",@progbits
+	.section	.rodata.__func__.8545,"a",@progbits
 	.align	3
-	.set	.LANCHOR24,. + 0
-	.type	__func__.8461, %object
-	.size	__func__.8461, 21
-__func__.8461:
+	.set	.LANCHOR31,. + 0
+	.type	__func__.8545, %object
+	.size	__func__.8545, 21
+__func__.8545:
 	.string	"flash_erase_block_en"
-	.section	.rodata.__func__.8475,"a",@progbits
+	.section	.rodata.__func__.8559,"a",@progbits
 	.align	3
-	.set	.LANCHOR9,. + 0
-	.type	__func__.8475, %object
-	.size	__func__.8475, 28
-__func__.8475:
+	.set	.LANCHOR16,. + 0
+	.type	__func__.8559, %object
+	.size	__func__.8559, 28
+__func__.8559:
 	.string	"flash_wait_device_ready_raw"
-	.section	.rodata.__func__.8500,"a",@progbits
+	.section	.rodata.__func__.8584,"a",@progbits
 	.align	3
-	.set	.LANCHOR124,. + 0
-	.type	__func__.8500, %object
-	.size	__func__.8500, 26
-__func__.8500:
+	.set	.LANCHOR148,. + 0
+	.type	__func__.8584, %object
+	.size	__func__.8584, 26
+__func__.8584:
 	.string	"flash_start_tlc_page_prog"
-	.section	.rodata.__func__.8513,"a",@progbits
+	.section	.rodata.__func__.8597,"a",@progbits
 	.align	3
-	.set	.LANCHOR125,. + 0
-	.type	__func__.8513, %object
-	.size	__func__.8513, 22
-__func__.8513:
+	.set	.LANCHOR149,. + 0
+	.type	__func__.8597, %object
+	.size	__func__.8597, 22
+__func__.8597:
 	.string	"flash_start_page_prog"
-	.section	.rodata.__func__.8526,"a",@progbits
+	.section	.rodata.__func__.8610,"a",@progbits
 	.align	3
-	.set	.LANCHOR33,. + 0
-	.type	__func__.8526, %object
-	.size	__func__.8526, 22
-__func__.8526:
+	.set	.LANCHOR40,. + 0
+	.type	__func__.8610, %object
+	.size	__func__.8610, 22
+__func__.8610:
 	.string	"flash_start_page_read"
-	.section	.rodata.__func__.8541,"a",@progbits
+	.section	.rodata.__func__.8625,"a",@progbits
 	.align	3
-	.set	.LANCHOR120,. + 0
-	.type	__func__.8541, %object
-	.size	__func__.8541, 25
-__func__.8541:
+	.set	.LANCHOR144,. + 0
+	.type	__func__.8625, %object
+	.size	__func__.8625, 25
+__func__.8625:
 	.string	"flash_complete_page_read"
-	.section	.rodata.__func__.9099,"a",@progbits
+	.section	.rodata.__func__.9169,"a",@progbits
 	.align	3
-	.set	.LANCHOR39,. + 0
-	.type	__func__.9099, %object
-	.size	__func__.9099, 13
-__func__.9099:
+	.set	.LANCHOR46,. + 0
+	.type	__func__.9169, %object
+	.size	__func__.9169, 13
+__func__.9169:
 	.string	"buf_add_tail"
-	.section	.rodata.__func__.9112,"a",@progbits
+	.section	.rodata.__func__.9182,"a",@progbits
 	.align	3
-	.set	.LANCHOR40,. + 0
-	.type	__func__.9112, %object
-	.size	__func__.9112, 10
-__func__.9112:
+	.set	.LANCHOR47,. + 0
+	.type	__func__.9182, %object
+	.size	__func__.9182, 10
+__func__.9182:
 	.string	"buf_alloc"
-	.section	.rodata.__func__.9126,"a",@progbits
+	.section	.rodata.__func__.9196,"a",@progbits
 	.align	3
-	.set	.LANCHOR41,. + 0
-	.type	__func__.9126, %object
-	.size	__func__.9126, 16
-__func__.9126:
+	.set	.LANCHOR48,. + 0
+	.type	__func__.9196, %object
+	.size	__func__.9196, 16
+__func__.9196:
 	.string	"buf_remove_free"
-	.section	.rodata.__func__.9234,"a",@progbits
+	.section	.rodata.__func__.9312,"a",@progbits
 	.align	3
-	.set	.LANCHOR100,. + 0
-	.type	__func__.9234, %object
-	.size	__func__.9234, 17
-__func__.9234:
+	.set	.LANCHOR124,. + 0
+	.type	__func__.9312, %object
+	.size	__func__.9312, 17
+__func__.9312:
 	.string	"lpa_rebuild_hash"
-	.section	.rodata.__func__.9286,"a",@progbits
+	.section	.rodata.__func__.9364,"a",@progbits
 	.align	3
-	.set	.LANCHOR167,. + 0
-	.type	__func__.9286, %object
-	.size	__func__.9286, 17
-__func__.9286:
+	.set	.LANCHOR189,. + 0
+	.type	__func__.9364, %object
+	.size	__func__.9364, 17
+__func__.9364:
 	.string	"ftl_write_commit"
-	.section	.rodata.__func__.9297,"a",@progbits
+	.section	.rodata.__func__.9375,"a",@progbits
 	.align	3
-	.set	.LANCHOR44,. + 0
-	.type	__func__.9297, %object
-	.size	__func__.9297, 14
-__func__.9297:
+	.set	.LANCHOR51,. + 0
+	.type	__func__.9375, %object
+	.size	__func__.9375, 14
+__func__.9375:
 	.string	"ftl_write_buf"
-	.section	.rodata.__func__.9345,"a",@progbits
+	.section	.rodata.__func__.9426,"a",@progbits
 	.align	3
-	.set	.LANCHOR152,. + 0
-	.type	__func__.9345, %object
-	.size	__func__.9345, 15
-__func__.9345:
+	.set	.LANCHOR176,. + 0
+	.type	__func__.9426, %object
+	.size	__func__.9426, 15
+__func__.9426:
 	.string	"ftl_read_ahead"
-	.section	.rodata.__func__.9353,"a",@progbits
+	.section	.rodata.__func__.9434,"a",@progbits
 	.align	3
-	.set	.LANCHOR48,. + 0
-	.type	__func__.9353, %object
-	.size	__func__.9353, 13
-__func__.9353:
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9434, %object
+	.size	__func__.9434, 13
+__func__.9434:
 	.string	"ftl_read_buf"
-	.section	.rodata.__func__.9391,"a",@progbits
+	.section	.rodata.__func__.9472,"a",@progbits
 	.align	3
-	.set	.LANCHOR157,. + 0
-	.type	__func__.9391, %object
-	.size	__func__.9391, 9
-__func__.9391:
-	.string	"ftl_read"
-	.section	.rodata.__func__.9417,"a",@progbits
+	.set	.LANCHOR185,. + 0
+	.type	__func__.9472, %object
+	.size	__func__.9472, 10
+__func__.9472:
+	.string	"zftl_read"
+	.section	.rodata.__func__.9498,"a",@progbits
 	.align	3
-	.set	.LANCHOR169,. + 0
-	.type	__func__.9417, %object
-	.size	__func__.9417, 12
-__func__.9417:
-	.string	"ftl_discard"
-	.section	.rodata.__func__.9438,"a",@progbits
+	.set	.LANCHOR195,. + 0
+	.type	__func__.9498, %object
+	.size	__func__.9498, 13
+__func__.9498:
+	.string	"_ftl_discard"
+	.section	.rodata.__func__.9539,"a",@progbits
 	.align	3
-	.set	.LANCHOR158,. + 0
-	.type	__func__.9438, %object
-	.size	__func__.9438, 10
-__func__.9438:
+	.set	.LANCHOR186,. + 0
+	.type	__func__.9539, %object
+	.size	__func__.9539, 10
+__func__.9539:
 	.string	"vpn_check"
-	.section	.rodata.__func__.9463,"a",@progbits
-	.align	3
-	.set	.LANCHOR159,. + 0
-	.type	__func__.9463, %object
-	.size	__func__.9463, 15
-__func__.9463:
-	.string	"ftl_info_check"
-	.section	.rodata.__func__.9572,"a",@progbits
+	.section	.rodata.__func__.9661,"a",@progbits
 	.align	3
-	.set	.LANCHOR55,. + 0
-	.type	__func__.9572, %object
-	.size	__func__.9572, 12
-__func__.9572:
+	.set	.LANCHOR61,. + 0
+	.type	__func__.9661, %object
+	.size	__func__.9661, 12
+__func__.9661:
 	.string	"gc_add_sblk"
-	.section	.rodata.__func__.9615,"a",@progbits
+	.section	.rodata.__func__.9679,"a",@progbits
 	.align	3
-	.set	.LANCHOR122,. + 0
-	.type	__func__.9615, %object
-	.size	__func__.9615, 21
-__func__.9615:
+	.set	.LANCHOR146,. + 0
+	.type	__func__.9679, %object
+	.size	__func__.9679, 21
+__func__.9679:
 	.string	"gc_check_data_one_wl"
-	.section	.rodata.__func__.9649,"a",@progbits
+	.section	.rodata.__func__.9713,"a",@progbits
 	.align	3
-	.set	.LANCHOR153,. + 0
-	.type	__func__.9649, %object
-	.size	__func__.9649, 22
-__func__.9649:
+	.set	.LANCHOR182,. + 0
+	.type	__func__.9713, %object
+	.size	__func__.9713, 22
+__func__.9713:
 	.string	"gc_update_l2p_map_new"
-	.section	.rodata.__func__.9662,"a",@progbits
+	.section	.rodata.__func__.9726,"a",@progbits
 	.align	3
-	.set	.LANCHOR63,. + 0
-	.type	__func__.9662, %object
-	.size	__func__.9662, 19
-__func__.9662:
+	.set	.LANCHOR66,. + 0
+	.type	__func__.9726, %object
+	.size	__func__.9726, 19
+__func__.9726:
 	.string	"gc_write_completed"
-	.section	.rodata.__func__.9691,"a",@progbits
+	.section	.rodata.__func__.9755,"a",@progbits
 	.align	3
-	.set	.LANCHOR170,. + 0
-	.type	__func__.9691, %object
-	.size	__func__.9691, 16
-__func__.9691:
+	.set	.LANCHOR191,. + 0
+	.type	__func__.9755, %object
+	.size	__func__.9755, 16
+__func__.9755:
 	.string	"gc_do_copy_back"
-	.section	.rodata.__func__.9713,"a",@progbits
+	.section	.rodata.__func__.9777,"a",@progbits
 	.align	3
-	.set	.LANCHOR73,. + 0
-	.type	__func__.9713, %object
-	.size	__func__.9713, 16
-__func__.9713:
+	.set	.LANCHOR97,. + 0
+	.type	__func__.9777, %object
+	.size	__func__.9777, 16
+__func__.9777:
 	.string	"gc_free_src_blk"
-	.section	.rodata.__func__.9758,"a",@progbits
+	.section	.rodata.__func__.9822,"a",@progbits
 	.align	3
-	.set	.LANCHOR160,. + 0
-	.type	__func__.9758, %object
-	.size	__func__.9758, 16
-__func__.9758:
+	.set	.LANCHOR187,. + 0
+	.type	__func__.9822, %object
+	.size	__func__.9822, 16
+__func__.9822:
 	.string	"gc_scan_src_blk"
-	.section	.rodata.__func__.9790,"a",@progbits
-	.align	3
-	.set	.LANCHOR156,. + 0
-	.type	__func__.9790, %object
-	.size	__func__.9790, 18
-__func__.9790:
-	.string	"gc_search_src_blk"
-	.section	.rodata.__func__.9806,"a",@progbits
+	.section	.rodata.__func__.9881,"a",@progbits
 	.align	3
-	.set	.LANCHOR154,. + 0
-	.type	__func__.9806, %object
-	.size	__func__.9806, 20
-__func__.9806:
+	.set	.LANCHOR183,. + 0
+	.type	__func__.9881, %object
+	.size	__func__.9881, 20
+__func__.9881:
 	.string	"gc_scan_static_data"
-	.section	.rodata.__func__.9867,"a",@progbits
+	.section	.rodata.__func__.9942,"a",@progbits
 	.align	3
-	.set	.LANCHOR172,. + 0
-	.type	__func__.9867, %object
-	.size	__func__.9867, 6
-__func__.9867:
-	.string	"do_gc"
-	.section	.rodata.__func__.9928,"a",@progbits
-	.align	3
-	.set	.LANCHOR132,. + 0
-	.type	__func__.9928, %object
-	.size	__func__.9928, 15
-__func__.9928:
-	.string	"ftl_info_flush"
-	.section	.rodata.__func__.9977,"a",@progbits
-	.align	3
-	.set	.LANCHOR72,. + 0
-	.type	__func__.9977, %object
-	.size	__func__.9977, 14
-__func__.9977:
-	.string	"ftl_free_sblk"
-	.section	.rodata.do_gc.str1.1,"aMS",@progbits,1
-.LC153:
-	.string	"gc %d: %d %d %d %d %d %d\n"
-.LC154:
-	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
-.LC155:
-	.string	"gc free %x, %d\n"
+	.set	.LANCHOR193,. + 0
+	.type	__func__.9942, %object
+	.size	__func__.9942, 11
+__func__.9942:
+	.string	"zftl_do_gc"
+	.section	.rodata._list_remove_node.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
-.LC81:
+.LC90:
 	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
-.LC82:
+.LC91:
 	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
-.LC83:
+.LC92:
 	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC84:
+.LC93:
 	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC85:
+.LC94:
 	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
-.LC86:
+.LC95:
 	.string	"lpa:"
-.LC87:
+.LC96:
 	.string	"vpn:"
-.LC88:
+.LC97:
 	.string	"sblk:"
-.LC89:
+.LC98:
 	.string	"lpa_hash:"
-.LC90:
+.LC99:
 	.string	"lpa_hash_index:"
 	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
-.LC24:
+.LC29:
 	.string	"dump_sblk_queue: %d\n"
-.LC25:
+.LC30:
 	.string	"buf id= %d state = %d ppa = %x\n"
 	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
-.LC54:
+.LC63:
 	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
 	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
-.LC48:
+.LC57:
 	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
-.LC49:
+.LC58:
 	.string	"sync para %d\n"
-.LC50:
+.LC59:
 	.string	"DDR mode Read error %x %x\n"
 	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
 .LC5:
@@ -21034,152 +22495,132 @@ __func__.9977:
 .LC2:
 	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
 	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
-.LC53:
+.LC62:
 	.string	"no sys info %x\n"
 	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
-.LC77:
+.LC86:
 	.string	"finfo:"
-.LC78:
+.LC87:
 	.string	"flash_info_flush id = %x, page = %x\n"
-.LC79:
+.LC88:
 	.string	"sys_info_flush error:%x\n"
 	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC6:
+.LC7:
 	.string	"flash_mask_bad_block %d %d\n"
 	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
-.LC57:
+.LC66:
 	.string	"flash_prog_page %x %x %x\n"
 	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
-.LC59:
+.LC68:
 	.string	"flash_prog_page_en:%x %x\n"
-.LC60:
+.LC69:
 	.string	"spare"
-.LC61:
+.LC70:
 	.string	"data"
-.LC62:
+.LC71:
 	.string	"write error: %x\n"
+	.section	.rodata.flash_read_id.str1.1,"aMS",@progbits,1
+.LC6:
+	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
 	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
-.LC41:
+.LC51:
 	.string	"flash_read_page %x %x %x\n"
 	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
-.LC51:
+.LC60:
 	.string	"flash_read_page_en %x %x\n"
-.LC52:
+.LC61:
 	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
-	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",@progbits,1
-.LC0:
-	.string	"\n!!!!! error @ func:%s - line:%d\n"
 	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
-.LC14:
-	.string	"ftl_alloc_sblk %x, %d %d %d\n"
-	.section	.rodata.ftl_discard.str1.1,"aMS",@progbits,1
-.LC148:
-	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+.LC28:
+	.string	"alloc sblk %x %d\n"
 	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
-.LC65:
-	.string	"%d %x @%d %x\n"
-.LC66:
-	.string	"ftl_info_blk_init %d %d %x\n"
-	.section	.rodata.ftl_info_check.str1.1,"aMS",@progbits,1
-.LC122:
-	.string	"free blk vpn error: %x %x\n"
-.LC123:
-	.string	"data blk: %d %d %d\n"
-.LC124:
-	.string	"free blk: %d %d %d\n"
+.LC74:
+	.string	"%d %x @%d %x\n"
+.LC75:
+	.string	"ftl_info_blk_init %d %d %x\n"
 	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
-.LC64:
+.LC73:
 	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
-	.section	.rodata.ftl_init.str1.1,"aMS",@progbits,1
-.LC139:
-	.string	"FTL version: 6.0.3 20180211"
-.LC140:
-	.string	"gp_ftl_ext_info %p %p %p\n"
-.LC141:
-	.string	"flash info size: %d %d %d\n"
 	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
-.LC67:
+.LC76:
 	.string	"low format %d %d %d %d\n"
 	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
-.LC19:
+.LC22:
 	.string	"mask bad block:cs %x block: %x\n"
 	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
-.LC69:
+.LC78:
 	.string	"saved_active_page  = %x\n"
-.LC70:
+.LC79:
 	.string	"saved_active_plane = %x\n"
-.LC71:
+.LC80:
 	.string	"sblk = %x\n"
-.LC72:
+.LC81:
 	.string	"phy_blk = %x %x\n"
-.LC73:
+.LC82:
 	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC74:
+.LC83:
 	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
-.LC75:
+.LC84:
 	.string	"dump write = %x\n"
 	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
-.LC68:
-	.string	"re low formaet %d\n"
-	.section	.rodata.ftl_read.str1.1,"aMS",@progbits,1
-.LC114:
-	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+.LC77:
+	.string	"re low format %d\n"
 	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
-.LC100:
+.LC109:
 	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
-.LC101:
+.LC110:
 	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
 	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
-.LC107:
+.LC122:
 	.string	"ftl_sblk_dump = %x %x %x %x\n"
-.LC108:
+.LC123:
 	.string	"page_addr = %x, lpa=%x vpn = %d\n"
-.LC109:
+.LC124:
 	.string	"index= %x, lpa=%x\n"
-.LC110:
+.LC125:
 	.string	"block = %x, vpn=%x check vpn = %d\n"
 	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
-.LC127:
+.LC138:
 	.string	"ftl_scan_all_data = %x\n"
-.LC128:
+.LC139:
 	.string	"scan lpa = %x ppa= %x\n"
-.LC129:
+.LC140:
 	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
-.LC130:
+.LC141:
 	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
-.LC131:
+.LC142:
 	.string	"0pm:"
-.LC132:
+.LC143:
 	.string	"1pm:"
 	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
-.LC80:
+.LC89:
 	.string	"l2p:"
 	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
-.LC63:
+.LC72:
 	.string	"low format %d\n"
 	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
-.LC143:
-	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC144:
-	.string	"ftl_update_l2p_map"
+	.string	"ftl_update_l2p_map: %x %x %x\n"
 .LC145:
-	.string	"lpa_tbl:"
+	.string	"ftl_update_l2p_map"
 .LC146:
+	.string	"lpa_tbl:"
+.LC147:
 	.string	"sblk %x vpn: %d %d\n"
 	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
-.LC17:
+.LC20:
 	.string	"ftl_vpn_decrement %x = %d\n"
 	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
-.LC147:
+.LC148:
 	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
 	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
-.LC18:
+.LC21:
 	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
 	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
-.LC7:
+.LC8:
 	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
-.LC56:
+.LC65:
 	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
 	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
 .LC149:
@@ -21191,137 +22632,140 @@ __func__.9977:
 .LC152:
 	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
 	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
-.LC15:
+.LC18:
 	.string	"gc_free_src_blk = %x, vpn = %d\n"
-.LC16:
+.LC19:
 	.string	"gc_free_src_blk %x, %d\n"
 	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
-.LC10:
+.LC11:
 	.string	"%d gc_free_temp_buf buf id= %x\n"
 	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
-.LC133:
+.LC111:
 	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
-.LC134:
-	.string	"gc_lpa:"
-.LC135:
-	.string	"gc_ppa:"
-.LC136:
+.LC112:
 	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
-.LC137:
+.LC113:
 	.string	"gc_recovery"
-.LC138:
+.LC114:
 	.string	"gc_recovery: %x vpn = %x\n"
 	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
-.LC125:
+.LC136:
 	.string	"gc_scan_src_blk = %x, vpn = %d\n"
-.LC126:
+.LC137:
 	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
 	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
-.LC111:
-	.string	"gc_search_src_blk = %d, %d, %d\n"
-.LC112:
-	.string	"vpn gc = %d, id = %d\n"
-.LC113:
-	.string	"gc_search_src_blk count= %d\n"
+.LC13:
+	.string	"zftl_get_gc_node cache = %x index = %d vpn = %x\n"
+.LC14:
+	.string	"gc_search_src_blk mode = %x, src mode = %x, count= %d %d\n"
 	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
-.LC11:
+.LC34:
 	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
-.LC12:
-	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d \n"
+.LC35:
+	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d; %d %d\n"
+.LC36:
+	.string	"swl add tlc gc = %d, %d, %d, %d, %d, %d\n"
+.LC37:
+	.string	"swl add slc gc  = %d, %d, %d, %d, %d, %d\n"
 	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
-.LC102:
+.LC117:
 	.string	"gc_update_l2p_map_new sblk %x\n"
-.LC103:
+.LC118:
 	.string	"gc_update_l2p_map_new: %x %x %x\n"
-.LC104:
+.LC119:
 	.string	"0lpa: %x %x %x\n"
-.LC105:
+.LC120:
 	.string	"lpa: %x %x %x\n"
-.LC106:
+.LC121:
 	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
 	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
-.LC8:
-	.string	"status: %x, ppa: %x\n"
 .LC9:
+	.string	"status: %x, ppa: %x\n"
+.LC10:
 	.string	"gc_write_completed: %x  %x  %x %x\n"
 	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
-.LC33:
+.LC43:
 	.string	"otp error! %d"
-.LC34:
+.LC44:
 	.string	"rr"
 	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
-.LC47:
+.LC56:
 	.string	"hynix RR %d row=%x, count %d, status=%d\n"
 	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
-.LC92:
+.LC101:
 	.string	"region_id = %d, pm_max_region = %d\n"
-.LC93:
+.LC102:
 	.string	"load_l2p_region = %x,%x,%x, %x\n"
-.LC94:
+.LC103:
 	.string	"pm_ppa:"
-.LC95:
+.LC104:
 	.string	"data:"
-.LC96:
+.LC105:
 	.string	"spare:"
 	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
-.LC28:
+.LC33:
 	.string	"%s %d %d\n"
 	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
-.LC42:
-	.string	"micron %d row=%x,count %d,status=%d\n"
-.LC43:
+.LC52:
 	.string	"micron RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
-.LC39:
+.LC49:
 	.string	"dqs data abort %x\n"
-.LC40:
+.LC50:
 	.string	"xfer error %x\n"
 	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
-.LC35:
+.LC45:
 	.string	"%d mtrans_cnt = %d page_num = %d\n"
-.LC36:
+.LC46:
 	.string	"nandc:"
-.LC37:
+.LC47:
 	.string	"%d flReg.d32=%x %x\n"
-.LC38:
+.LC48:
 	.string	"nandc_xfer_done read error %x\n"
 	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
-.LC26:
+.LC31:
 	.string	"blk %x is bad block\n"
-.LC27:
+.LC32:
 	.string	"pm_alloc_new_blk: %x %x %x %x\n"
 	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
-.LC97:
+.LC106:
 	.string	"pm_init posr %x %x %x\n"
-.LC98:
+.LC107:
 	.string	"pm_init recovery %x %x %x\n"
 	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
-.LC99:
+.LC108:
 	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
 	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
-.LC91:
+.LC100:
 	.string	"%s w error lpn = %x, max ppa = %d\n"
 	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
-.LC76:
+.LC85:
 	.string	"pm_write_page write error: %x\n"
 	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
-.LC20:
-	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x\n"
-.LC21:
+.LC23:
+	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x, max_vpn: %x\n"
+.LC24:
 	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
-.LC22:
+.LC25:
 	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
-.LC23:
+.LC26:
 	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+.LC27:
+	.string	"gc th: tlc_tlc: %d tlc_slc: %d slc_slc: %d slc_tlc:%d free_th: %d\n"
 	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
-.LC13:
-	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d\n"
+.LC12:
+	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d free slc th: %d\n"
+	.section	.rodata.print_list_info.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"list count:%p %d\n"
+.LC17:
+	.string	"%d: node:%x %x %x %x, %d %d %d %d %d\n"
 	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
-.LC55:
+.LC64:
 	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
 	.section	.rodata.random_seed,"a",@progbits
 	.align	3
-	.set	.LANCHOR32,. + 0
+	.set	.LANCHOR39,. + 0
 	.type	random_seed, %object
 	.size	random_seed, 256
 random_seed:
@@ -21454,23 +22898,23 @@ random_seed:
 	.hword	17598
 	.hword	28087
 	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
-.LC142:
-	.string	"ftl_init %x\n"
+.LC116:
+	.string	"zftl_init %x\n"
 	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
-.LC29:
+.LC39:
 	.string	"%s 0x%x:"
-.LC30:
+.LC40:
 	.string	"%x "
-.LC31:
+.LC41:
 	.string	""
-.LC32:
+.LC42:
 	.string	"%s\n"
 	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
-.LC58:
+.LC67:
 	.string	"sblk_prog_page ppa = %x, count = %d\n"
 	.section	.rodata.toshiba_15ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR0,. + 0
+	.set	.LANCHOR7,. + 0
 	.type	toshiba_15ref_value, %object
 	.size	toshiba_15ref_value, 95
 toshiba_15ref_value:
@@ -21571,7 +23015,7 @@ toshiba_15ref_value:
 	.byte	0
 	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR16,. + 0
+	.set	.LANCHOR23,. + 0
 	.type	toshiba_3D_slc_value, %object
 	.size	toshiba_3D_slc_value, 11
 toshiba_3D_slc_value:
@@ -21588,7 +23032,7 @@ toshiba_3D_slc_value:
 	.byte	56
 	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR15,. + 0
+	.set	.LANCHOR22,. + 0
 	.type	toshiba_3D_tlc_value, %object
 	.size	toshiba_3D_tlc_value, 399
 toshiba_3D_tlc_value:
@@ -21606,13 +23050,6 @@ toshiba_3D_tlc_value:
 	.byte	0
 	.byte	0
 	.byte	0
-	.byte	-9
-	.byte	-12
-	.byte	-9
-	.byte	-7
-	.byte	-13
-	.byte	-12
-	.byte	-7
 	.byte	5
 	.byte	-2
 	.byte	-1
@@ -21620,6 +23057,13 @@ toshiba_3D_tlc_value:
 	.byte	-3
 	.byte	-2
 	.byte	6
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
 	.byte	-6
 	.byte	-15
 	.byte	-15
@@ -21992,15 +23436,15 @@ toshiba_3D_tlc_value:
 	.byte	12
 	.byte	14
 	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
-.LC44:
+.LC53:
 	.string	"toshiba SRR %d row=%x, status=%d\n"
-.LC45:
+.LC54:
 	.string	"toshiba TRR %d row=%x, status=%d\n"
-.LC46:
+.LC55:
 	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
 	.section	.rodata.toshiba_A19ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR1,. + 0
+	.set	.LANCHOR8,. + 0
 	.type	toshiba_A19ref_value, %object
 	.size	toshiba_A19ref_value, 45
 toshiba_A19ref_value:
@@ -22051,7 +23495,7 @@ toshiba_A19ref_value:
 	.byte	0
 	.section	.rodata.toshiba_ref_value,"a",@progbits
 	.align	3
-	.set	.LANCHOR3,. + 0
+	.set	.LANCHOR10,. + 0
 	.type	toshiba_ref_value, %object
 	.size	toshiba_ref_value, 8
 toshiba_ref_value:
@@ -22064,18 +23508,49 @@ toshiba_ref_value:
 	.byte	12
 	.byte	112
 	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
-.LC115:
+.LC128:
 	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
-.LC116:
+.LC129:
 	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
-.LC117:
+.LC130:
 	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
-.LC118:
+.LC131:
 	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
-.LC119:
+.LC132:
 	.string	"l2p"
-.LC120:
+.LC133:
 	.string	"vpn_check %x = c %x  s %x function: %x\n"
-.LC121:
+.LC134:
 	.string	"vpn_check blk = %x fix vpc\n"
+.LC135:
+	.string	"...%s exit...%d\n"
+	.section	.rodata.zftl_discard.str1.1,"aMS",@progbits,1
+.LC158:
+	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+	.section	.rodata.zftl_do_gc.str1.1,"aMS",@progbits,1
+.LC153:
+	.string	"gc %d: %d %d %d %d %d %d %d\n"
+.LC154:
+	.string	"gc %d: %d %d %d %d %d %d\n"
+.LC155:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC156:
+	.string	"gc free %x, %d\n"
+	.section	.rodata.zftl_get_free_sblk.str1.1,"aMS",@progbits,1
+.LC15:
+	.string	"zftl_get_free_sblk %x %d, %p %d %d\n"
+	.section	.rodata.zftl_init.str1.1,"aMS",@progbits,1
+.LC115:
+	.string	"FTL version: 6.0.5 20180315"
+	.section	.rodata.zftl_read.str1.1,"aMS",@progbits,1
+.LC126:
+	.string	"ftl_read %x %x %x\n"
+.LC127:
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+	.section	.rodata.zftl_sblk_list_init.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"free blk vpn error: %x %x\n"
+	.section	.rodata.zftl_write.str1.1,"aMS",@progbits,1
+.LC157:
+	.string	"ftlwrite %x %x %x\n"
 	.hidden	free

commit e7e0d9902384e30fb0a93339b4bfe735c56ffa2e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 15 16:13:41 2018 +0800

    rockchip: add checksum compare for tos parameter
    
    To make sure the parameter is from TOS, compare the checksum.
    
    Change-Id: Id7c60e5666078b2655787d7e66dd71e6860f6ade
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index cb7459e80e..a6a5b9569f 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -41,14 +41,34 @@ struct tos_parameter_t {
 };
 
 #if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
+static uint16_t trust_checksum(const uint8_t *buf, uint16_t len)
+{
+	uint16_t i;
+	uint16_t checksum = 0;
+
+	for (i = 0; i < len; i++) {
+		if (i % 2)
+			checksum += buf[i] << 8;
+		else
+			checksum += buf[i];
+	}
+	checksum = ~checksum;
+
+	return checksum;
+}
+
 int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
 	struct tos_parameter_t *tos_parameter;
+	u32 checksum;
+
 	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
 			TRUST_PARAMETER_OFFSET);
 
+	checksum = trust_checksum((uint8_t *)(unsigned long)tos_parameter + 8,
+				  sizeof(struct tos_parameter_t) - 8);
 #ifdef CONFIG_ARM64
 	/* Reserve 0x200000 for ATF bl31 */
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
@@ -57,7 +77,8 @@ int dram_init_banksize(void)
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #endif
-	if (tos_parameter->tee_mem.flags == 1) {
+	if ((checksum == tos_parameter->checksum) &&
+	    (tos_parameter->tee_mem.flags == 1)) {
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
 					- gd->bd->bi_dram[0].start;
 		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +

commit a09afa0854bafc449483c8df5999a751149012de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 15 15:43:59 2018 +0800

    rockchip: spl/tpl: move stimer_init to very begining
    
    Change-Id: I1e962df10c2893ee66a98201de5beb586fce1fcb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index c508b043d3..27ab566d15 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -64,6 +64,10 @@ u32 spl_boot_mode(const u32 boot_device)
 
 __weak void rockchip_stimer_init(void)
 {
+#ifndef CONFIG_ARM64
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+#endif
 	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
@@ -90,6 +94,7 @@ void board_init_f(ulong dummy)
 #endif
 
 #if !defined(CONFIG_SUPPORT_TPL)
+	rockchip_stimer_init();
 	arch_cpu_init();
 #endif
 #define EARLY_UART
@@ -106,7 +111,6 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
-	rockchip_stimer_init();
 #ifdef CONFIG_SPL_FRAMEWORK
 	ret = spl_early_init();
 	if (ret) {
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 491e30f33f..85e5416997 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -58,6 +58,7 @@ void board_init_f(ulong dummy)
 	struct udevice *dev;
 	int ret;
 
+	rockchip_stimer_init();
 	arch_cpu_init();
 #define EARLY_DEBUG
 #ifdef EARLY_DEBUG
@@ -80,7 +81,6 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
-	rockchip_stimer_init();
 	/* Init ARM arch timer */
 	timer_init();
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);

commit 49f812dde0ebffa12f117a10d282e7dbb4336979
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 19:56:34 2018 +0800

    include: irq-platform.h: add px30 timer0 irq
    
    Change-Id: Ieadd2aa4d18c8db8927da225a62d9d58e9fd4342
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index f6e1b88a29..878de36ac9 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -144,6 +144,7 @@
 #define IRQ_GPIO3			38
 #define IRQ_PWM0			56
 #define IRQ_PWM1			57
+#define IRQ_TIMER0			62	/* non-secure */
 #define IRQ_TIMER1			63	/* non-secure */
 
 #define GIC_IRQS_NR			(4 * 32)

commit a46d9cd7747f25ac4d58e0b6d87887b3498a3c92
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 19:56:54 2018 +0800

    fuel gauge: rk817: disable debug info
    
    Change-Id: I6b48d9302aed33aa678b3a5496ed1aa8627a82b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 7edd8b33b6..fddc31a4e4 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -20,7 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int dbg_enable = 1;
+static int dbg_enable = 0;
 #define DBG(args...) \
 	do { \
 		if (dbg_enable) { \

commit 0f3732faad03e61fe1464b91aea9f766eeba7b91
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Mar 8 21:21:52 2018 +0800

    dm: video: add reserve size debug info for rockchip video
    
    Change-Id: I0d2693ea871ea41c84143e0f4e4c52c65b308dd7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index bef7ffea90..b38b2764b2 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -82,6 +82,7 @@ int video_reserve(ulong *addrp)
 	size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
 	*addrp = *addrp - size;
 	*addrp &= ~((1 << 20) - 1);
+	debug("Reserving %lx Bytes for video at: %lx\n", size, *addrp);
 #else
 	for (uclass_find_first_device(UCLASS_VIDEO, &dev);
 	     dev;

commit c7a79779cf5d54070a282c0f11e6fba72bd83814
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 20:03:27 2018 +0800

    configs: evb-rk3326: enable CONFIG_TEST_ROCKCHIP
    
    Change-Id: I9d23acf226a075af790d9659b38763fb134967de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index ffa693bac6..ff9a228208 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -88,3 +88,4 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 6ee123990afc16b327672e6492655bada3281163
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 13 20:00:51 2018 +0800

    test: rockchip: timer: disable timer before configure
    
    Change-Id: I0c1e8749069554f7aa7a63c416cd4691ad0e3761
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
index 8a2d656e04..103aee1167 100644
--- a/test/rockchip/test-timer.c
+++ b/test/rockchip/test-timer.c
@@ -74,11 +74,16 @@ static void timer_irq_handler(int irq, void *data)
 
 static int soc_timer_irq_test_init(void)
 {
+	/* Disable before config */
+	writel(0, TIMER_BASE + TIMER_CTRL);
+
+	/* Config */
 	writel(SYS_COUNTER_FREQ0, TIMER_BASE + TIMER_LOAD_COUNT0);
 	writel(SYS_COUNTER_FREQ1, TIMER_BASE + TIMER_LOAD_COUNT1);
 	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
 	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
 
+	/* Request irq */
 	irq_install_handler(TIMER_IRQ, timer_irq_handler, NULL);
 	irq_handler_enable(TIMER_IRQ);
 

commit b0635068cf051b5b5db0432dbce2ab3324d72e56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 6 14:22:42 2018 +0800

    test: rockchip: key: add more key event test
    
    add KEY_HOME, KEY_MENU, KEY_ESC.
    
    Change-Id: Ifbf43169973e0a2bbdb062713482ced1ceae7be3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index 45bf521515..25718b0dbc 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -11,16 +11,17 @@
 #include <key.h>
 #include <linux/input.h>
 #include "test-rockchip.h"
-	
+
 int board_key_test(int argc, char * const argv[])
 {
 	while (!ctrlc()) {
-		mdelay(50);
+		mdelay(100);
 		platform_key_read(KEY_VOLUMEUP);
-		mdelay(50);
 		platform_key_read(KEY_VOLUMEDOWN);
-		mdelay(50);
 		platform_key_read(KEY_POWER);
+		platform_key_read(KEY_HOME);
+		platform_key_read(KEY_MENU);
+		platform_key_read(KEY_ESC);
 	}
 
 	return 0;

commit 0abc377938b5a02fc8025399f1a7f8d9c03a1014
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 6 14:21:32 2018 +0800

    include: key.h: use linux-event-codes.h
    
    linux-event-codes.h defines more key code than
    input.h
    
    Change-Id: Ib9c9946bb78420fdd6b1dbcdad48e46007cc4752
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index b7b8672bc8..5310c50d95 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,7 +7,7 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
-#include <linux/input.h>
+#include <dt-bindings/input/linux-event-codes.h>
 
 #define KEY_LONG_DOWN_MS	2000
 

commit 6fb52ead7dd18a9b48fda3a469d5c93958495b4e
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Thu Mar 15 11:47:42 2018 +0800

    clk: rockchip: px30: Fix pll lock status
    
    Change-Id: I0ccae06f42b37a21af7fc877bb00ca498dd8b95f
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index af57101f3e..d4e3bfa560 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -119,7 +119,7 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
 
 	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+	while (!(readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT)))
 		udelay(1);
 
 	rk_clrsetreg(mode, pll_mode_mask[pll_id],

commit fce7cb7b10c1a51662c7a1c3f230d28d24aeca0c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Wed Mar 14 17:00:07 2018 +0800

    clk: rockchip: px30: Fix return value for some clocks
    
    Change-Id: Iac7a67337f05c42e99ad5e2eebbeb82b6375f676
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index cc4a399482..af57101f3e 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -356,7 +356,7 @@ static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return px30_i2c_get_clk(cru, clk_id);
 }
 
 static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
@@ -478,7 +478,7 @@ static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return px30_pwm_get_clk(cru, clk_id);
 }
 
 static ulong px30_saradc_get_clk(struct px30_cru *cru)
@@ -500,9 +500,9 @@ static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
 
 	rk_clrsetreg(&cru->clksel_con[55],
 		     CLK_SARADC_DIV_CON_MASK,
-		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+		     (src_clk_div - 1) << CLK_SARADC_DIV_CON_SHIFT);
 
-	return DIV_TO_RATE(OSC_HZ, src_clk_div);
+	return px30_saradc_get_clk(cru);
 }
 
 static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
@@ -510,11 +510,11 @@ static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
 	u32 div, con;
 
 	switch (clk_id) {
-	case SCLK_PWM0:
+	case SCLK_SPI0:
 		con = readl(&cru->clksel_con[53]);
 		div = con >> CLK_SPI0_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
 		break;
-	case SCLK_PWM1:
+	case SCLK_SPI1:
 		con = readl(&cru->clksel_con[53]);
 		div = con >> CLK_SPI1_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
 		break;
@@ -553,7 +553,7 @@ static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 		return -EINVAL;
 	}
 
-	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+	return px30_spi_get_clk(cru, clk_id);
 }
 
 static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
@@ -639,6 +639,7 @@ static ulong px30_clk_get_rate(struct clk *clk)
 		rate = px30_i2c_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_PWM0:
+	case SCLK_PWM1:
 		rate = px30_pwm_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_SARADC:

commit 432f5e8c587f7e55eca8b5ac5fe4ea08ecf1a8e0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 13 14:29:13 2018 +0800

    rockchip: px30: extend space for kenrel load
    
    kernel may need more then 32M, make room for it.
    
    Change-Id: Ia8916224a5915153aea731f45dddac1dda09df5b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 3f203635b1..da92b7a64c 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -54,7 +54,7 @@
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
-	"ramdisk_addr_r=0x04000000\0"
+	"ramdisk_addr_r=0x06000000\0"
 
 #include <config_distro_bootcmd.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit 96f1b3d9492b0148cc30cd080c04fcd7b1c0fc02
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 28 17:43:22 2018 +0800

    rockchip: clk: px30: support emmc ciu-sample clock
    
    ciu-sample is a dummy clock, which should be the same with sclk_emmc.
    
    Change-Id: I5350774a390555153ddaee49fb9613f25f4f249b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 50e99b7e73..cc4a399482 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -370,6 +370,7 @@ static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
 		break;
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con_id = 20;
 		break;
 	default:
@@ -628,6 +629,7 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case HCLK_EMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		rate = px30_mmc_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_I2C0:
@@ -730,6 +732,7 @@ int rockchip_mmc_get_phase(struct clk *clk)
 	else
 		raw_value = readl(&cru->sdmmc_con[1]);
 
+	raw_value >>= 1;
 	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
 
 	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
@@ -776,6 +779,7 @@ int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
 	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
 	raw_value |= nineties;
 
+	raw_value <<= 1;
 	if (clk->id == SCLK_EMMC_SAMPLE)
 		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
 	else

commit 6aaa9b68fdcf3266686f3d64d3e59a4622c3f21c
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Mar 6 15:23:03 2018 +0800

    power: fuel gauge: rk817: fix the display soc jump from 0 to 100
    
    Change-Id: I8ad336bfdce6bac04ec5d07d885fd8a0992b4339
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
index 061f7f347a..7edd8b33b6 100644
--- a/drivers/power/fuel_gauge/fg_rk817.c
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -20,7 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int dbg_enable;
+static int dbg_enable = 1;
 #define DBG(args...) \
 	do { \
 		if (dbg_enable) { \
@@ -166,6 +166,7 @@ static int dbg_enable;
 
 #define CHRG_CT_EN		BIT(1)
 #define MIN_FCC			500
+#define CAP_INVALID		BIT(7)
 
 /* USB_CTRL_REG */
 #define INPUT_CUR_MSK		0x0f
@@ -219,8 +220,8 @@ struct rk817_battery_device {
 	int				pwron_voltage;
 	int				sm_linek;
 	int				sm_old_cap;
-	u8				calc_dsoc;
-	u8				calc_rsoc;
+	int				calc_dsoc;
+	int				calc_rsoc;
 	int				sm_chrg_dsoc;
 	u8				halt_cnt;
 	bool				is_halt;
@@ -236,7 +237,6 @@ struct rk817_battery_device {
 	u32				*ocv_table;
 	int				ocv_size;
 	u32				design_capacity;
-	u32				design_qmax;
 	u32				max_soc_offset;
 	u32				virtual_power;
 	u32				chrg_type;
@@ -428,33 +428,6 @@ static void rk817_bat_calibration(struct rk817_battery_device *battery)
 	}
 }
 
-static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
-{
-	u32 val = 0, capacity;
-
-	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
-	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
-	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
-	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
-
-	capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
-	return  capacity;
-}
-
-static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
-{
-	u32 val, capacity;
-
-	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
-	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
-	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
-	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
-
-	capacity = ADC_TO_CAPACITY(val, battery->res_div);
-
-	return  capacity;
-}
-
 static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 				       u32 capacity)
 {
@@ -475,6 +448,47 @@ static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 	battery->remain_cap = capacity * 1000;
 }
 
+static bool rk817_bat_remain_cap_is_valid(struct rk817_battery_device *battery)
+{
+	return !(rk817_bat_read(battery, Q_PRES_H3) & CAP_INVALID);
+}
+
+static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
+{
+	u32 val = 0, capacity = 0;
+
+	if (rk817_bat_remain_cap_is_valid(battery)) {
+		val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+		val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+		val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+		capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
+	} else {
+		rk817_bat_init_coulomb_cap(battery, 0);
+	}
+
+	return  capacity;
+}
+
+static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
+{
+	u32 val, capacity = 0;
+
+	if (rk817_bat_remain_cap_is_valid(battery)) {
+		val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+		val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+		val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+		val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+		capacity = ADC_TO_CAPACITY(val, battery->res_div);
+	} else {
+		rk817_bat_init_coulomb_cap(battery, 0);
+	}
+
+	return  capacity;
+}
+
 static void rk817_bat_save_cap(struct rk817_battery_device *battery,
 			       int capacity)
 {
@@ -643,7 +657,7 @@ static int rk817_bat_get_fcc(struct rk817_battery_device *battery)
 {
 	u32 fcc = 0;
 
-	fcc |= rk817_bat_read(battery, NEW_FCC_REG2) << 16;
+	fcc = rk817_bat_read(battery, NEW_FCC_REG2) << 16;
 	fcc |= rk817_bat_read(battery, NEW_FCC_REG1) << 8;
 	fcc |= rk817_bat_read(battery, NEW_FCC_REG0) << 0;
 
@@ -651,9 +665,9 @@ static int rk817_bat_get_fcc(struct rk817_battery_device *battery)
 		DBG("invalid fcc(%d), use design cap", fcc);
 		fcc = battery->design_capacity;
 		rk817_bat_save_fcc(battery, fcc);
-	} else if (fcc > battery->design_qmax) {
+	} else if (fcc > battery->qmax) {
 		DBG("invalid fcc(%d), use qmax", fcc);
-		fcc = battery->design_qmax;
+		fcc = battery->qmax;
 		rk817_bat_save_fcc(battery, fcc);
 	}
 
@@ -977,6 +991,7 @@ static void rk817_bat_debug_info(struct rk817_battery_device *battery)
 	DBG("k = %d, b = %d\n", battery->voltage_k, battery->voltage_b);
 	DBG("battery: %d\n", rk817_bat_get_battery_voltage(battery));
 	DBG("voltage_sys = %d\n", rk817_bat_get_sys_voltage(battery));
+	DBG("voltage_usb = %d\n", rk817_bat_get_USB_voltage(battery));
 	DBG("current_avg = %d\n", rk817_bat_get_avg_current(battery));
 	DBG("dsoc = %d\n", battery->dsoc);
 	DBG("rsoc = %d\n", rk817_bat_get_rsoc(battery));
@@ -1043,6 +1058,7 @@ static int rk817_bat_update_get_soc(struct udevice *dev)
 	struct rk817_battery_device *battery = dev_get_priv(dev);
 	static ulong seconds;
 
+	rk817_bat_debug_info(battery);
 	/* set charge current */
 	battery->chrg_type =
 		rk817_bat_get_charger_type(battery);
@@ -1150,8 +1166,6 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	rk817_bat_rsoc_init(battery);
 	rk817_bat_init_coulomb_cap(battery, battery->nac);
 	rk817_bat_set_initialized_flag(battery);
-	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
-	rk817_bat_calc_linek(battery);
 
 	battery->voltage_avg = rk817_bat_get_battery_voltage(battery);
 	battery->voltage_sys = rk817_bat_get_sys_voltage(battery);
@@ -1161,6 +1175,7 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
 	battery->rsoc = rk817_bat_get_rsoc(battery);
 	battery->sm_linek = rk817_bat_calc_linek(battery);
+	battery->chrg_type = rk817_bat_get_charger_type(battery);
 	battery->finish_chrg_base = get_timer(0);
 	battery->term_sig_base = get_timer(0);
 
@@ -1168,9 +1183,7 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	battery->dbg_pwr_rsoc = battery->rsoc;
 	battery->dbg_pwr_vol = battery->voltage_avg;
 
-	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
-	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
-	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+	rk817_bat_charger_setting(battery, battery->chrg_type);
 
 	DBG("voltage_k = %d, voltage_b = %d\n",
 	    battery->voltage_k, battery->voltage_b);
@@ -1184,6 +1197,7 @@ static int rk817_fg_init(struct rk817_battery_device *battery)
 	DBG("qmax = %d\n", battery->qmax);
 	DBG("dsoc = %d\n", battery->dsoc);
 	DBG("rsoc = %d\n", battery->rsoc);
+	DBG("charge type: %d\n", battery->chrg_type);
 
 	return 0;
 }

commit 52015e971534309e28e967ac05cf99c5d240ae91
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Mar 6 14:12:51 2018 +0800

    drm/rockchip: drm driver version only need print once
    
    Change-Id: I34999b0cf660437e6c2794137a4f35e89025a965
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 39c0e0745c..77df5c2b53 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -464,8 +464,12 @@ static int display_init(struct display_state *state)
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
+	static bool __print_once = false;
 
-	printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
+	if (!__print_once) {
+		__print_once = true;
+		printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
+	}
 
 	if (state->is_init)
 		return 0;

commit 0dc8896c7ed613184f2508cc4f81174d4b36baf6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 9 18:18:22 2018 +0800

    rockchip: clk: px30: only do one time clk init
    
    We may get into clk_probe more than one time from TPL/SPL/U-Boot,
    and we only need to init bus clock one time.
    
    Change-Id: Iab0434c66d344ff57c1edd30679c3ab3bb8f2b17
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index d883a9c8cb..3bb6007ff2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -227,7 +227,7 @@ enum {
 
 	/* CRU_CLK_SEL23_CON */
 	BUS_PLL_SEL_SHIFT	=15,
-	BUS_PLL_SEL_MASK	= 3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_MASK	= 1 << BUS_PLL_SEL_SHIFT,
 	BUS_PLL_SEL_GPLL	= 0,
 	BUS_PLL_SEL_CPLL,
 	BUS_ACLK_DIV_SHIFT	= 8,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 4790bcb3c0..50e99b7e73 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -829,8 +829,12 @@ static struct clk_ops px30_clk_ops = {
 static int px30_clk_probe(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
+	u32 reg = readl(&priv->cru->clksel_con[23]);
 
-	rkclk_init(priv->cru);
+	/* Only do the rkclk_init() one time for boot up */
+	if (((reg & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) !=
+	    (GPLL_HZ / BUS_ACLK_HZ - 1))
+		rkclk_init(priv->cru);
 
 	return 0;
 }

commit 2b1cc44fde238e2caf9b8fb9353c788258481ef7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 9 15:27:33 2018 +0800

    rockchip: add arch_cpu_init() in tpl
    
    Make sure arch_cpu_init() is called very early,
    if TPL exist, call it at the beginning of TPL board_init() and do not
    call it again in SPL.
    
    Change-Id: I035bac4c5da28640c866d51d1b7b250eb5912440
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index c9f91efeee..c508b043d3 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -89,6 +89,9 @@ void board_init_f(ulong dummy)
 #endif
 #endif
 
+#if !defined(CONFIG_SUPPORT_TPL)
+	arch_cpu_init();
+#endif
 #define EARLY_UART
 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
 	/*
@@ -103,7 +106,6 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
-	arch_cpu_init();
 	rockchip_stimer_init();
 #ifdef CONFIG_SPL_FRAMEWORK
 	ret = spl_early_init();
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index e28ce13ce0..491e30f33f 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -48,11 +48,17 @@ __weak void rockchip_stimer_init(void)
 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
 }
 
+__weak int arch_cpu_init(void)
+{
+	return 0;
+}
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *dev;
 	int ret;
 
+	arch_cpu_init();
 #define EARLY_DEBUG
 #ifdef EARLY_DEBUG
 	/*

commit 8e407a7f443f19411e3e528ac1279d7a08140a4c
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Wed Mar 7 11:39:14 2018 +0800

    lib: optee_client: fix compare bug in keymaster TA
    
    uboot send data and data length to keymaster TA, keymaster
    TA secure store the data, and read temp data from secure
    store, compare data and temp data, but the compare length
    use temp data length is wrong, fix the bug to use data length.
    
    Change-Id: I900a7ab1b1e95ca844dfb7327c34c793cf635278
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 866dc39a48..05d1133ee3 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ

commit 86457e16088b96e67058465c0384ed1ff0830da4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Mar 8 14:42:52 2018 +0800

    drivers: irq: fix compile warning
    
    In the function gpio_get_intr_type, 'type' may be
    used uninitialized if not add default process.
    
    Change-Id: I917fecc2ed06cc844c30c93508084f32608edf6f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index 4b46b4fa73..7a2a22248d 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -165,6 +165,8 @@ static int gpio_get_intr_type(void __iomem *regbase,
 	case 0x03:
 		type = GPIOEdgelRising;
 		break;
+	default:
+		type = -EINVAL;
 	}
 
 	return type;

commit 82e713e13f9b964af6a9b80d7b272233c0614072
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Mar 7 15:23:21 2018 +0800

    lib: avb: support set_key_version
    
    the lib avb use this function to set key version
    
    Change-Id: Id0903b3326a0d6a0eadebd1ce23a19f92102908c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 85303fe599..bf92167b99 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -336,6 +336,17 @@ AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
 	return AVB_IO_RESULT_OK;
 }
 
+static void avb_set_key_version(AvbAtxOps* atx_ops,
+                        size_t rollback_index_location,
+                        uint64_t key_version)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location, key_version)) {
+		printf("%s: Fail to write rollback index\n", __FILE__);
+	}
+#endif
+}
+
 AvbOps* avb_ops_user_new(void) {
   AvbOps* ops;
 
@@ -375,6 +386,7 @@ AvbOps* avb_ops_user_new(void) {
   ops->ab_ops->write_ab_metadata = avb_ab_data_write;
   ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
   ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
+  ops->atx_ops->set_key_version = avb_set_key_version;
 
 out:
   return ops;

commit d9d5eb74015ce2cc22d948e91369c74ce77ccf1b
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Mar 6 19:33:36 2018 +0800

    androidboot: add cmd bootavb perm_attr_test
    
    Read and print the perm_attr.
    
    Change-Id: I1e2b73afa1e872eea7abf75d55570b1c8b19c311
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index d9dc0b5bee..308d1a7b11 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -15,6 +15,7 @@
 #include <command.h>
 #include <android_bootloader_message.h>
 #include <android_avb/rk_avb_ops_user.h>
+#include <android_avb/avb_atx_ops.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
@@ -340,7 +341,7 @@ int do_avb_read_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	debug("out_is_unlocked = %d\n", out_is_unlocked);
+	printf("out_is_unlocked = %d\n", out_is_unlocked);
 	avb_ops_user_free(ops);
 
 	return CMD_RET_SUCCESS;
@@ -573,6 +574,39 @@ int do_avb_write_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 	return CMD_RET_SUCCESS;
 }
 
+int do_perm_attr_test(cmd_tbl_t *cmdtp, int flag,
+		      int argc, char * const argv[])
+{
+	AvbOps *ops;
+	int i;
+	uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->atx_ops->read_permanent_attributes_hash(ops->atx_ops, hash) != 0) {
+		printf("read_permanent_attributes_hash error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	for (i = 0; i < AVB_SHA256_DIGEST_SIZE; i++) {
+		if (i % 4 == 0)
+			printf("\n");
+		printf("0x%x  ", hash[i]);
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
 int do_avb_verify_partition(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -813,6 +847,7 @@ static cmd_tbl_t cmd_avb[] = {
 	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
 	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(perm_attr_test, 1, 1, do_perm_attr_test, "", ""),
 	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
 	U_BOOT_CMD_MKENT(flow, 2, 1, do_avb_flow, "", "")
 };
@@ -855,6 +890,7 @@ U_BOOT_CMD(
 	"bootavb write partition offset_blk cnt\n"
 	"bootavb readabmisc\n"
 	"bootavb writeabmisc\n"
+	"bootavb perm_attr_test\n"
 	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
 	"bootavb flow v/n\n"
 );

commit b66b4823c8a03ee89200d361253421961f608508
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 17:54:18 2018 +0800

    Revert "configs: rk3328_common: Increase the spl size for new pinctrl build-in"
    
    This reverts commit e7d7797312218d27453532d1fe6e5ce7e4729fc4.
    0x10000 is start address of atf, we can not use it now.
    
    Change-Id: I11267f2b20b38c1f67da2c7a44093a140b6574ac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index fa84acf61b..1ecc4f7b53 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -20,11 +20,7 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
-#ifdef CONFIG_TPL
-#define CONFIG_SPL_MAX_SIZE             0x20000
-#else
 #define CONFIG_SPL_MAX_SIZE             0x10000
-#endif
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */

commit e37b3ef4625c37d74b634d0e9e591b53904f46ee
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Tue Mar 6 14:05:48 2018 +0800

    lib: optee_client: update keymaster TA
    
    uboot read date return error when file not exit,
    do not to create new file.
    
    Change-Id: Ic4cbc631b9e75dc345759d6d0dbcc86250245511
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
index 29dd857e5d..866dc39a48 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ

commit d7407b119c2ee85e7d09a9a2766da3a54847f63e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Feb 26 08:51:18 2018 +0800

    lib: optee_client: move CONFIG_OPTEE_V1/V2 define
    
    move CONFIG_OPTEE_V1/V2 to lib/optee_clientApi/Kconfig
    
    Change-Id: I446454547a186a27110aa95183264154fc538de9
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index 2e7b0a6726..eebe63131d 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -20,14 +20,6 @@ config SYS_MALLOC_F_LEN
 config SPL_SERIAL_SUPPORT
 	default y
 
-config OPTEE_V1
-	bool "Support OPTEE version 1.0"
-	help
-	  U-boot can communicate with trust if
-	  the config is enable. This function can
-	  be use in android bootloader a/b and avb
-	  step.
-
 source "board/rockchip/evb_rk3229/Kconfig"
 source "board/rockchip/gva_rk3229/Kconfig"
 
diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
index 1b86310a6e..8689af11cb 100644
--- a/lib/optee_clientApi/Kconfig
+++ b/lib/optee_clientApi/Kconfig
@@ -5,3 +5,20 @@ config OPTEE_CLIENT
 	  the config is enable. This function can
 	  be use in android bootloader a/b and avb
 	  step.
+
+config OPTEE_V1
+	bool "Support OPTEE version 1.0"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
+
+config OPTEE_V2
+	bool "Support OPTEE version 2.0"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
+

commit 07e846a0c23a1d5ce2980c2b7e82d74433c3f44e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 17:21:54 2018 +0800

    rockchip: defconfig: rk3328: remove SPL_PINCTRL
    
    We do not need pinctrl driver in SPL.
    
    Change-Id: I60528976cece11c20cc3f6968631b9e355da23b7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 0e3830485d..79535c760d 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -61,7 +61,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit c0acb0f2ed3e6682d551a551a600e0cc39319e2a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Mar 6 14:59:31 2018 +0800

    usb: gadget: use google's vid and pid for fastboot
    
    Using Google's VID and PID default for fastboot command.
    
    Change-Id: I8deb275f0f6a925b8e0b9668b6ba59abd44b74a5
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 586c0cd2c5..9b06812bff 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -54,12 +54,16 @@ static int rkusb_rst_code; /* The subcode in reset command (0xFF) */
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
 	if (IS_RKUSB_UMS_DNL(name)) {
-		/* Fix to Rockchip VID and PID */
+		/* Fix to Rockchip's VID and PID */
 		dev->idVendor  = __constant_cpu_to_le16(0x2207);
 		dev->idProduct = __constant_cpu_to_le16(CONFIG_ROCKUSB_G_DNL_PID);
 
 		/* Enumerate as a loader device */
 		dev->bcdUSB = cpu_to_le16(0x0201);
+	} else if (!strncmp(name, "usb_dnl_fastboot", 16)) {
+		/* Fix to Google's VID and PID */
+		dev->idVendor  = __constant_cpu_to_le16(0x18d1);
+		dev->idProduct = __constant_cpu_to_le16(0xd00d);
 	}
 
 	return 0;

commit e4ed4bd4083eef3896a828cbe84ae1790fe0f9e8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 10:44:05 2018 +0800

    rockchip: rk3328: enable arch_cpu_init() setting in SPL
    
    arch_cpu_init() is only available in SPL but not in TPL.
    
    Change-Id: I76da98fe37c4e4ff00e33510eee6916ea20a7325
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 4856e464e7..8ff075f46b 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -49,7 +49,7 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 };
 int arch_cpu_init(void)
 {
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
 	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 

commit 9fcf96223cbc9ba0185e7d12a25997c9005dfdb9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Mar 6 15:22:57 2018 +0800

    rockchip: bootm: update fdt addr for display fixup
    
    fdt has been relocate, can not use the addr from gd.
    
    Change-Id: I108eb13cb62b387f688e6fa1e7d26b2649f67a82
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index c0be8040d6..adf0d249f9 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -79,7 +79,7 @@ int arch_fixup_fdt(void *blob)
 #endif
 #endif
 #ifdef CONFIG_DRM_ROCKCHIP
-	rockchip_display_fixup((void *)gd->fdt_blob);
+	rockchip_display_fixup(blob);
 #endif
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);

commit e17ddcea32b2fa7b82fb079f37195855a55e39a2
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 22:15:55 2018 +0800

    fs: add api to get the name of filesystem type
    
    Let others to get the name of partition filesystem type which
    is private member in fs/fs.c
    
    Change-Id: Iae5c89c705fa65b5eedb4550963003b6e03e2820
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/fs/fs.c b/fs/fs.c
index 3481229aa6..60aca0f767 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -317,6 +317,25 @@ int fs_set_blk_dev_with_part(struct blk_desc *desc, int part)
 	return -1;
 }
 
+int fs_get_fstype(const char **fstype_name)
+{
+	struct fstype_info *info;
+
+	if (fstype_name == NULL) {
+		printf("** parameter error **\n");
+		return -1;
+	}
+
+	info = fs_get_info(fs_type);
+	if (info->fstype == FS_TYPE_ANY) {
+		printf("** not match any filesystem type **\n");
+		return -1;
+	}
+
+	*fstype_name = info->name;
+	return 0;
+}
+
 static void fs_close(void)
 {
 	struct fstype_info *info = fs_get_info(fs_type);
diff --git a/include/fs.h b/include/fs.h
index 0869ad6e80..972be04115 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -26,6 +26,15 @@
  */
 int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype);
 
+/*
+ * fs_get_fstype - Get filesystem type on the partition previously
+ * set by fs_set_blk_dev()
+ *
+ * @fstype_name: The return the name of filesystem type
+ * @return 0 if ok with valid *fstype_name, -1 on error conditions
+ */
+int fs_get_fstype(const char **fstype_name);
+
 /*
  * fs_set_blk_dev_with_part - Set current block device + partition
  *

commit de78ceae23299481131da3c2ec8d8867acf3ad4e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 20:49:09 2018 +0800

    fastboot: break fastboot 64 bytes limit
    
    Some message can not be complete transmission because
    the fastboot can only transmit 64 bytes one time. So add
    sleep_thread() to judge whether the data is complete
    transmission before call fastboot_complete().
    
    Change-Id: I9057ffc9ca4b92db8c9ab14e4650d386c5d06254
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 8a54408dd9..7857c2766b 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -49,6 +49,7 @@
 #define TX_ENDPOINT_MAXIMUM_PACKET_SIZE      (0x0040)
 
 #define EP_BUFFER_SIZE			4096
+#define SLEEP_COUNT 20000
 /*
  * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
  * (64 or 512 or 1024), else we break on certain controllers like DWC3
@@ -74,6 +75,7 @@ static unsigned int download_bytes;
 static unsigned int upload_size;
 static unsigned int upload_bytes;
 static bool start_upload;
+static unsigned intthread_wakeup_needed;
 
 static struct usb_endpoint_descriptor fs_ep_in = {
 	.bLength            = USB_DT_ENDPOINT_SIZE,
@@ -162,10 +164,78 @@ static struct usb_gadget_strings *fastboot_strings[] = {
 
 static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
 static int strcmp_l1(const char *s1, const char *s2);
+static void wakeup_thread(void)
+{
+	intthread_wakeup_needed = false;
+}
+
+static void busy_indicator(void)
+{
+	static int state;
+
+	switch (state) {
+	case 0:
+		puts("\r|"); break;
+	case 1:
+		puts("\r/"); break;
+	case 2:
+		puts("\r-"); break;
+	case 3:
+		puts("\r\\"); break;
+	case 4:
+		puts("\r|"); break;
+	case 5:
+		puts("\r/"); break;
+	case 6:
+		puts("\r-"); break;
+	case 7:
+		puts("\r\\"); break;
+	default:
+		state = 0;
+	}
+	if (state++ == 8)
+		state = 0;
+}
+
+static int sleep_thread(void)
+{
+	int rc = 0;
+	int i = 0, k = 0;
+
+	/* Wait until a signal arrives or we are woken up */
+	for (;;) {
+		if (!intthread_wakeup_needed)
+			break;
+
+		if (++i == SLEEP_COUNT) {
+			busy_indicator();
+			i = 0;
+			k++;
+		}
+
+		if (k == 10) {
+			/* Handle CTRL+C */
+			if (ctrlc())
+				return -EPIPE;
+
+			/* Check cable connection */
+			if (!g_dnl_board_usb_cable_connected())
+				return -EIO;
+
+			k = 0;
+		}
+
+		usb_gadget_handle_interrupts(0);
+	}
+	intthread_wakeup_needed = true;
+	return rc;
+}
 
 static void fastboot_complete(struct usb_ep *ep, struct usb_request *req)
 {
 	int status = req->status;
+
+	wakeup_thread();
 	if (!status)
 		return;
 	printf("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual);
@@ -363,6 +433,12 @@ static int fastboot_tx_write(const char *buffer, unsigned int buffer_size)
 
 static int fastboot_tx_write_str(const char *buffer)
 {
+	int ret;
+
+	ret = sleep_thread();
+	if (ret < 0)
+		printf("warning: 0x%x, usb transmission is abnormal!\n", ret);
+
 	return fastboot_tx_write(buffer, strlen(buffer));
 }
 

commit 333857218c8e1b126d7e5cbf75edc6e0f4fa8b44
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Mar 6 10:58:23 2018 +0800

    dm: key: fix compile error with DEBUG enabled
    
    Change-Id: I3e5aeb6598c8601efb669329203ad59a825c2b32
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 21e25f63a0..efa6001311 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -50,9 +50,6 @@ int key_parse_adc_event(struct input_key *key, unsigned int adcval)
 	int report = KEY_NOT_EXIST;
 	int max, min;
 
-	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
-	      __func__, key->name, max, min, adcval);
-
 	/* Get min, max */
 	max = key->value + key->margin;
 	if (key->value > key->margin)
@@ -60,6 +57,9 @@ int key_parse_adc_event(struct input_key *key, unsigned int adcval)
 	else
 		min = key->value;
 
+	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
+	      __func__, key->name, max, min, adcval);
+
 	/* Check */
 	if ((adcval <= max) && (adcval >= min)) {
 		report = KEY_PRESS_DOWN;

commit 95f431d58ae3a713dca0834d9d9315cf9fd15491
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Mar 5 15:10:37 2018 +0800

    sysreset: rockchip: use dev_read_addr_ptr get cru base
    
    Use system api dev_read_addr_ptr to get cru reg base,
    rather than rockchip private api rockchip_get_cru, which
    will be cleanup later.
    
    Change-Id: I8ec067d2ffd1a83daaaeb28e52e5c90abc89d36b
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
index be00fefb3a..23bdb2f9eb 100644
--- a/drivers/sysreset/sysreset_rockchip.c
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -10,14 +10,12 @@
 #include <sysreset.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3328.h>
-#include <asm/arch/hardware.h>
 #include <linux/err.h>
 
 int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
 {
 	struct sysreset_reg *offset = dev_get_priv(dev);
-	unsigned long cru_base = (unsigned long)rockchip_get_cru();
+	unsigned long cru_base = (unsigned long)dev_read_addr_ptr(dev->parent);
 
 	if (IS_ERR_VALUE(cru_base))
 		return (int)cru_base;

commit ccced9e100e8476082b4dea3eddc5712cf356ce3
Author: Lin Huang <hl@rock-chips.com>
Date:   Mon Mar 5 17:24:41 2018 +0800

    clk: rockchip: rk3399: refactor configure cpu clock function
    
    some board request enable cpu big core clock in uboot,
    refactor rk3399_configure_cpu() function, so that the little
    core and big core can reuse this function to set clock.
    
    Change-Id: I0390d22179faf91307b22348f6f9329a58f00143
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index c0319479b2..045b481ca0 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -94,9 +94,14 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 
 #define PWM_CLOCK_HZ    PMU_PCLK_HZ
 
-enum apll_l_frequencies {
-	APLL_L_1600_MHZ,
-	APLL_L_600_MHZ,
+enum apll_frequencies {
+	APLL_1600_MHZ,
+	APLL_600_MHZ,
+};
+
+enum cpu_cluster {
+	CPU_CLUSTER_LITTLE,
+	CPU_CLUSTER_BIG,
 };
 
 #endif	/* __ASM_ARCH_CRU_RK3399_H_ */
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 5d6c2a30ec..955112d6ff 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -38,6 +38,7 @@ struct pll_div {
 	u32 postdiv1;
 	u32 postdiv2;
 	u32 frac;
+	u32 freq;
 };
 
 #define RATE_TO_DIV(input_rate, output_rate) \
@@ -47,7 +48,7 @@ struct pll_div {
 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
 	.refdiv = _refdiv,\
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2, .freq = hz};
 
 #if defined(CONFIG_SPL_BUILD)
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
@@ -56,12 +57,12 @@ static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2);
 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 #endif
 
-static const struct pll_div apll_l_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
-static const struct pll_div apll_l_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
+static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1);
+static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
 
-static const struct pll_div *apll_l_cfgs[] = {
-	[APLL_L_1600_MHZ] = &apll_l_1600_cfg,
-	[APLL_L_600_MHZ] = &apll_l_600_cfg,
+static const struct pll_div *apll_cfgs[] = {
+	[APLL_1600_MHZ] = &apll_1600_cfg,
+	[APLL_600_MHZ] = &apll_600_cfg,
 };
 
 enum {
@@ -113,23 +114,23 @@ enum {
 	/* PMUCRU_CLKSEL_CON3 */
 	CLK_I2C4_DIV_CON_SHIFT		= 0,
 
-	/* CLKSEL_CON0 */
-	ACLKM_CORE_L_DIV_CON_SHIFT	= 8,
-	ACLKM_CORE_L_DIV_CON_MASK	= 0x1f << ACLKM_CORE_L_DIV_CON_SHIFT,
-	CLK_CORE_L_PLL_SEL_SHIFT	= 6,
-	CLK_CORE_L_PLL_SEL_MASK		= 3 << CLK_CORE_L_PLL_SEL_SHIFT,
-	CLK_CORE_L_PLL_SEL_ALPLL	= 0x0,
-	CLK_CORE_L_PLL_SEL_ABPLL	= 0x1,
-	CLK_CORE_L_PLL_SEL_DPLL		= 0x10,
-	CLK_CORE_L_PLL_SEL_GPLL		= 0x11,
-	CLK_CORE_L_DIV_MASK		= 0x1f,
-	CLK_CORE_L_DIV_SHIFT		= 0,
-
-	/* CLKSEL_CON1 */
-	PCLK_DBG_L_DIV_SHIFT		= 0x8,
-	PCLK_DBG_L_DIV_MASK		= 0x1f << PCLK_DBG_L_DIV_SHIFT,
-	ATCLK_CORE_L_DIV_SHIFT		= 0,
-	ATCLK_CORE_L_DIV_MASK		= 0x1f << ATCLK_CORE_L_DIV_SHIFT,
+	/* CLKSEL_CON0 / CLKSEL_CON2 */
+	ACLKM_CORE_DIV_CON_MASK	= 0x1f,
+	ACLKM_CORE_DIV_CON_SHIFT	= 8,
+	CLK_CORE_PLL_SEL_MASK		= 3,
+	CLK_CORE_PLL_SEL_SHIFT		= 6,
+	CLK_CORE_PLL_SEL_ALPLL		= 0x0,
+	CLK_CORE_PLL_SEL_ABPLL		= 0x1,
+	CLK_CORE_PLL_SEL_DPLL		= 0x10,
+	CLK_CORE_PLL_SEL_GPLL		= 0x11,
+	CLK_CORE_DIV_MASK		= 0x1f,
+	CLK_CORE_DIV_SHIFT		= 0,
+
+	/* CLKSEL_CON1 / CLKSEL_CON3 */
+	PCLK_DBG_DIV_MASK		= 0x1f,
+	PCLK_DBG_DIV_SHIFT		= 0x8,
+	ATCLK_CORE_DIV_MASK		= 0x1f,
+	ATCLK_CORE_DIV_SHIFT		= 0,
 
 	/* CLKSEL_CON14 */
 	PCLK_PERIHP_DIV_CON_SHIFT	= 12,
@@ -399,37 +400,55 @@ static int pll_para_config(u32 freq_hz, struct pll_div *div)
 }
 
 void rk3399_configure_cpu(struct rk3399_cru *cru,
-			  enum apll_l_frequencies apll_l_freq)
+			  enum apll_frequencies freq,
+			  enum cpu_cluster cluster)
 {
 	u32 aclkm_div;
 	u32 pclk_dbg_div;
-	u32 atclk_div;
+	u32 atclk_div, apll_hz;
+	int con_base, parent;
+	u32 *pll_con;
+
+	switch (cluster) {
+	case CPU_CLUSTER_LITTLE:
+		con_base = 0;
+		parent = CLK_CORE_PLL_SEL_ALPLL;
+		pll_con = &cru->apll_l_con[0];
+		break;
+	case CPU_CLUSTER_BIG:
+	default:
+		con_base = 2;
+		parent = CLK_CORE_PLL_SEL_ABPLL;
+		pll_con = &cru->apll_b_con[0];
+		break;
+	}
 
-	rkclk_set_pll(&cru->apll_l_con[0], apll_l_cfgs[apll_l_freq]);
+	apll_hz = apll_cfgs[freq]->freq;
+	rkclk_set_pll(pll_con, apll_cfgs[freq]);
 
-	aclkm_div = APLL_HZ / ACLKM_CORE_HZ - 1;
-	assert((aclkm_div + 1) * ACLKM_CORE_HZ == APLL_HZ &&
+	aclkm_div = apll_hz / ACLKM_CORE_HZ - 1;
+	assert((aclkm_div + 1) * ACLKM_CORE_HZ == apll_hz &&
 	       aclkm_div < 0x1f);
 
-	pclk_dbg_div = APLL_HZ / PCLK_DBG_HZ - 1;
-	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ == APLL_HZ &&
+	pclk_dbg_div = apll_hz / PCLK_DBG_HZ - 1;
+	assert((pclk_dbg_div + 1) * PCLK_DBG_HZ == apll_hz &&
 	       pclk_dbg_div < 0x1f);
 
-	atclk_div = APLL_HZ / ATCLK_CORE_HZ - 1;
-	assert((atclk_div + 1) * ATCLK_CORE_HZ == APLL_HZ &&
+	atclk_div = apll_hz / ATCLK_CORE_HZ - 1;
+	assert((atclk_div + 1) * ATCLK_CORE_HZ == apll_hz &&
 	       atclk_div < 0x1f);
 
-	rk_clrsetreg(&cru->clksel_con[0],
-		     ACLKM_CORE_L_DIV_CON_MASK | CLK_CORE_L_PLL_SEL_MASK |
-		     CLK_CORE_L_DIV_MASK,
-		     aclkm_div << ACLKM_CORE_L_DIV_CON_SHIFT |
-		     CLK_CORE_L_PLL_SEL_ALPLL << CLK_CORE_L_PLL_SEL_SHIFT |
-		     0 << CLK_CORE_L_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->clksel_con[1],
-		     PCLK_DBG_L_DIV_MASK | ATCLK_CORE_L_DIV_MASK,
-		     pclk_dbg_div << PCLK_DBG_L_DIV_SHIFT |
-		     atclk_div << ATCLK_CORE_L_DIV_SHIFT);
+	rk_clrsetreg(&cru->clksel_con[con_base],
+		     ACLKM_CORE_DIV_CON_MASK | CLK_CORE_PLL_SEL_MASK |
+		     CLK_CORE_DIV_MASK,
+		     aclkm_div << ACLKM_CORE_DIV_CON_SHIFT |
+		     parent << CLK_CORE_PLL_SEL_SHIFT |
+		     0 << CLK_CORE_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->clksel_con[con_base + 1],
+		     PCLK_DBG_DIV_MASK | ATCLK_CORE_DIV_MASK,
+		     pclk_dbg_div << PCLK_DBG_DIV_SHIFT |
+		     atclk_div << ATCLK_CORE_DIV_SHIFT);
 }
 #define I2C_CLK_REG_MASK(bus) \
 			(I2C_DIV_CON_MASK << \
@@ -1021,7 +1040,8 @@ static void rkclk_init(struct rk3399_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
-	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
+	rk3399_configure_cpu(cru, APLL_600_MHZ, CPU_CLUSTER_LITTLE);
+
 	/*
 	 * some cru registers changed by bootrom, we'd better reset them to
 	 * reset/default values described in TRM to avoid confusion in kernel.

commit 5f42424baefbb19c6b695a4e5d2096035db1d839
Author: Lin Huang <hl@rock-chips.com>
Date:   Tue Mar 6 10:10:31 2018 +0800

    clk: rockchip: Correct and standardize clock divisor range assertions
    
    Some of the asserts for valid clock divisor ranges were off by one. This
    patch corrects them and writes them all in a consistent way.
    
    Change-Id: Ia87974c8e27b7414cfe9210a916d114aa81f5ccb
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index fc5c75e263..fc83271f91 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -401,14 +401,14 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PD_BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 	hclk_div = PD_BUS_ACLK_HZ / PD_BUS_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PD_BUS_HCLK_HZ ==
-		PD_BUS_ACLK_HZ && (hclk_div < 0x4) && (hclk_div != 0x2));
+		PD_BUS_ACLK_HZ && (hclk_div <= 0x3) && (hclk_div != 0x2));
 
 	pclk_div = PD_BUS_ACLK_HZ / PD_BUS_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PD_BUS_PCLK_HZ ==
-		PD_BUS_ACLK_HZ && pclk_div < 0x7);
+		PD_BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     PD_BUS_PCLK_DIV_MASK | PD_BUS_HCLK_DIV_MASK |
@@ -423,15 +423,15 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
 	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
+		PERI_ACLK_HZ && (hclk_div <= 0x2));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
 	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && (pclk_div < 0x4));
+		PERI_ACLK_HZ && (pclk_div <= 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],
 		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK |
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 5d47274949..5d6c2a30ec 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -498,7 +498,7 @@ static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 
 	/* i2c0,4,8 src clock from ppll, i2c1,2,3,5,6,7 src clock from gpll*/
 	src_clk_div = GPLL_HZ / hz;
-	assert(src_clk_div - 1 < 127);
+	assert(src_clk_div - 1 <= 127);
 
 	switch (clk_id) {
 	case SCLK_I2C1:
@@ -639,7 +639,7 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)
 	}
 	/* vop aclk source clk: cpll */
 	div = CPLL_HZ / aclk_vop;
-	assert(div - 1 < 32);
+	assert(div - 1 <= 31);
 
 	rk_clrsetreg(aclkreg_addr,
 		     ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
@@ -821,7 +821,7 @@ static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
+	assert(src_clk_div <= 255);
 
 	rk_clrsetreg(&cru->clksel_con[26],
 		     CLK_SARADC_DIV_CON_MASK,
@@ -1037,15 +1037,15 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perihp aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
-	       PERIHP_ACLK_HZ && (hclk_div < 0x4));
+	       PERIHP_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
-	       PERIHP_ACLK_HZ && (pclk_div < 0x7));
+	       PERIHP_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[14],
 		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK |
@@ -1057,15 +1057,15 @@ static void rkclk_init(struct rk3399_cru *cru)
 
 	/* configure perilp0 aclk, hclk, pclk */
 	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
-	       PERILP0_ACLK_HZ && (hclk_div < 0x4));
+	       PERILP0_ACLK_HZ && (hclk_div <= 0x3));
 
 	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
-	       PERILP0_ACLK_HZ && (pclk_div < 0x7));
+	       PERILP0_ACLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[23],
 		     PCLK_PERILP0_DIV_CON_MASK | HCLK_PERILP0_DIV_CON_MASK |
@@ -1078,11 +1078,11 @@ static void rkclk_init(struct rk3399_cru *cru)
 	/* perilp1 hclk select gpll as source */
 	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
 	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
-	       GPLL_HZ && (hclk_div < 0x1f));
+	       GPLL_HZ && (hclk_div <= 0x1f));
 
 	pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1;
 	assert((pclk_div + 1) * PERILP1_PCLK_HZ ==
-	       PERILP1_HCLK_HZ && (pclk_div < 0x7));
+	       PERILP1_HCLK_HZ && (pclk_div <= 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[25],
 		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |
@@ -1295,6 +1295,7 @@ static void pmuclk_init(struct rk3399_pmucru *pmucru)
 
 	/*  configure pmu pclk */
 	pclk_div = PPLL_HZ / PMU_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PMU_PCLK_HZ == PPLL_HZ && pclk_div <= 0x1f);
 	rk_clrsetreg(&pmucru->pmucru_clksel[0],
 		     PMU_PCLK_DIV_CON_MASK,
 		     pclk_div << PMU_PCLK_DIV_CON_SHIFT);

commit 1702a77f8e744d637f4d92ef9b3924582881533b
Author: Lin Huang <hl@rock-chips.com>
Date:   Tue Mar 6 09:55:59 2018 +0800

    clk: rockchip: rk3399: Fix rkclk_init() to actually use PERILP1_PCLK_HZ
    
    This patch fixes a typo in the clock initialization code that caused the
    PERILP1_PCLK_HZ constant to be ignored and the clock to always run at
    the same speed as its parent (PERILP1_HCLK_HZ). Since we've done all our
    previous tests and validation with this bug, we should probably increase
    the value of the constant (that had not actually been used) to the value
    that we had been incorrectly using instead.
    
    Change-Id: I8e1725f71ea0dbacd01929b8e8a80b91dc4f17cc
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 033f067122..c0319479b2 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -90,7 +90,7 @@ check_member(rk3399_cru, sdio1_con[1], 0x594);
 #define PERILP0_PCLK_HZ	(49500*KHz)
 
 #define PERILP1_HCLK_HZ	(99000*KHz)
-#define PERILP1_PCLK_HZ	(49500*KHz)
+#define PERILP1_PCLK_HZ	(99000*KHz)
 
 #define PWM_CLOCK_HZ    PMU_PCLK_HZ
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 4fe37f7c5c..5d47274949 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1080,9 +1080,9 @@ static void rkclk_init(struct rk3399_cru *cru)
 	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
 	       GPLL_HZ && (hclk_div < 0x1f));
 
-	pclk_div = PERILP1_HCLK_HZ / PERILP1_HCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP1_HCLK_HZ ==
-	       PERILP1_HCLK_HZ && (hclk_div < 0x7));
+	pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PERILP1_PCLK_HZ ==
+	       PERILP1_HCLK_HZ && (pclk_div < 0x7));
 
 	rk_clrsetreg(&cru->clksel_con[25],
 		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |

commit 102804ecccd6987c1cd964cbfe562fae119f8b9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 16:22:08 2018 +0800

    video: pwm_backlight: fix backlight disable fail issue
    
    1. set duty as 0;
    2. if there is not "enable-gpios", don't disable pwm;
    
    Change-Id: Ie788da61a38a6bfce4cdc5395e522e71a599eef0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index 13c20c2f9d..a124a961cb 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -55,7 +55,9 @@ static int pwm_backlight_enable(struct udevice *dev)
 	if (ret)
 		return ret;
 	mdelay(10);
-	dm_gpio_set_value(&priv->enable, 1);
+
+	if (dm_gpio_is_valid(&priv->enable))
+		dm_gpio_set_value(&priv->enable, 1);
 
 	return 0;
 }
@@ -64,22 +66,26 @@ static int pwm_backlight_disable(struct udevice *dev)
 {
 	struct pwm_backlight_priv *priv = dev_get_priv(dev);
 	struct dm_regulator_uclass_platdata *plat;
-	uint duty_cycle;
 	int ret;
 
-	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
-		(priv->max_level - priv->min_level + 1);
-	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
-			     duty_cycle);
+	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, 0);
 	if (ret)
 		return ret;
 
-	ret = pwm_set_enable(priv->pwm, priv->channel, false);
-	if (ret)
-		return ret;
+	/*
+	 * Sometimes there is not "enable-gpios", we have to set pwm output
+	 * 0% or 100% duty to play role like "enable-gpios", so we should not
+	 * disable pwm, let's keep it enabled.
+	 */
+	if (dm_gpio_is_valid(&priv->enable)) {
+		ret = pwm_set_enable(priv->pwm, priv->channel, false);
+		if (ret)
+			return ret;
+	}
 
 	mdelay(10);
-	dm_gpio_set_value(&priv->enable, 0);
+	if (dm_gpio_is_valid(&priv->enable))
+		dm_gpio_set_value(&priv->enable, 0);
 
 	if (priv->reg) {
 		plat = dev_get_uclass_platdata(priv->reg);

commit 409b7b498bbe7dfd37828ae2cc11c65feddc419f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 15:54:57 2018 +0800

    pwm: rk_pwm: don't default disable pwm while set config
    
    Change-Id: Id6be8fcef2da98662ebbcaff5df4dc014303914a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 9eb3b369d0..13ba2279d9 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -44,12 +44,16 @@ static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 	struct rk3288_pwm *regs = priv->regs;
 	unsigned long period, duty;
+	uint32_t ctrl;
 
 	debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
-	writel(PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
-		PWM_CONTINUOUS | priv->enable_conf |
-		RK_PWM_DISABLE,
-		&regs->ctrl);
+
+	ctrl = readl(&regs->ctrl);
+	/* Ignore bit0: RK_PWM_ENABLE */
+	ctrl &= ~0xfffe;
+	ctrl |= PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
+		PWM_CONTINUOUS | priv->enable_conf;
+	writel(ctrl, &regs->ctrl);
 
 	period = lldiv((uint64_t)(priv->freq / 1000) * period_ns, 1000000);
 	duty = lldiv((uint64_t)(priv->freq / 1000) * duty_ns, 1000000);

commit b4011071620841a6415ac1341094109c85542e72
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 11:29:11 2018 +0800

    rockchip: dts: rk3326-evb: fix typo "RK3126" -> "RK3326"
    
    Change-Id: I75afe0e718f1589d758d11f326526d505aef4fd9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
index 93504616ac..eca91526e3 100644
--- a/arch/arm/dts/rk3326-evb.dts
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -10,7 +10,7 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Rockchip RK3126 EVB";
+	model = "Rockchip RK3326 EVB";
 	compatible = "rockchip,rk3326-evb", "rockchip,rk3326";
 
 	chosen {

commit da980a52008a37e1fe33e8832b8c278cda6b9c61
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Mar 5 20:41:23 2018 +0800

    lib: avb: initialize temp_flag before next used
    
    Change-Id: Icbc570fdb1cd1f8ff30309f5776421ee6c4a086b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index d060da5d8f..7e78dcca95 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -579,6 +579,7 @@ void rk_avb_get_at_vboot_state(char *buf)
 	}
 	sprintf(buf, "%s%s%s%s", buf, avb_perm_attr_set, perm_attr_flag, crlf);
 
+	temp_flag = 0;
 	if (rk_avb_read_lock_state((uint8_t *)&temp_flag)) {
 		printf("Can not read lock state!\n");
 		lock_val = "";
@@ -590,6 +591,7 @@ void rk_avb_get_at_vboot_state(char *buf)
 	sprintf(buf, "%s%s%s%s%s%s%s", buf, avb_lock, lock_val, crlf,
 		avb_unlock_dis, unlocK_dis_val, crlf);
 
+	temp_flag = 0;
 	if (rk_avb_read_bootloader_locked_flag((uint8_t *)&temp_flag)) {
 		printf("Can not read bootloader locked flag!\n");
 		bootloader_locked_flag = "";

commit 2e40c2c11f0d1e8bad5bb55706ee814183cfa21f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Feb 28 10:46:55 2018 +0800

    fastboot: update fastboot commands
    
    1. cb_oem.
    2. cb_flashing.
    3. cd_flash.
    
    Change-Id: I6348c53c992b794f37d6d1813be04bd3dc63d1b5
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 472d32e6d2..8a54408dd9 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -12,6 +12,7 @@
  */
 #include <config.h>
 #include <common.h>
+#include <console.h>
 #include <errno.h>
 #include <fastboot.h>
 #include <malloc.h>
@@ -19,10 +20,14 @@
 #include <linux/usb/gadget.h>
 #include <linux/usb/composite.h>
 #include <linux/compiler.h>
+#include <u-boot/sha256.h>
 #include <version.h>
 #include <g_dnl.h>
+#include <fs.h>
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
+#include <dm/uclass.h>
+#include <power/fuel_gauge.h>
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 #include <fb_mmc.h>
 #endif
@@ -785,8 +790,6 @@ static void cb_upload(struct usb_ep *ep, struct usb_request *req)
 {
 	char response[FASTBOOT_RESPONSE_LEN];
 
-
-
 	printf("Starting upload of %d bytes\n", upload_size);
 
 	if (0 == upload_size) {
@@ -840,7 +843,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 	strsep(&cmd, ":");
 	if (!cmd) {
 		pr_err("missing slot name");
-		fastboot_tx_write_str("FAIL: missing slot name");
+		fastboot_tx_write_str("FAILmissing slot name");
 		return;
 	}
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
@@ -852,7 +855,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 		slot_number = 1;
 		rk_avb_set_slot_active(&slot_number);
 	} else {
-		fastboot_tx_write_str("FAIL: unkown slot name");
+		fastboot_tx_write_str("FAILunkown slot name");
 		return;
 	}
 
@@ -873,8 +876,15 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 	uint8_t flash_lock_state;
 
 	if (rk_avb_read_flash_lock_state(&flash_lock_state)) {
-		fastboot_tx_write_str("FAIL");
-		return;
+		/* write the device flashing unlock when first read */
+		if (rk_avb_write_flash_lock_state(1)) {
+			fastboot_tx_write_str("FAILflash lock state write failure");
+			return;
+		}
+		if (rk_avb_read_flash_lock_state(&flash_lock_state)) {
+			fastboot_tx_write_str("FAILflash lock state read failure");
+			return;
+		}
 	}
 
 	if (flash_lock_state == 0) {
@@ -911,7 +921,8 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		uint8_t flash_lock_state;
 		flash_lock_state = 0;
 		if (rk_avb_write_flash_lock_state(flash_lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILflash lock state"
+					      " write failure");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
@@ -922,7 +933,8 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		uint8_t flash_lock_state;
 		flash_lock_state = 1;
 		if (rk_avb_write_flash_lock_state(flash_lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILflash lock state"
+					      " write failure");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
@@ -946,6 +958,108 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 }
 #endif
 
+static void cb_oem_perm_attr(void)
+{
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	sha256_context ctx;
+	uint8_t digest[SHA256_SUM_LEN] = {0};
+	uint8_t digest_temp[SHA256_SUM_LEN] = {0};
+	uint8_t perm_attr_temp[PERM_ATTR_TOTAL_SIZE] = {0};
+	uint8_t flag = 0;
+
+	if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
+		printf("Permanent attribute size is not equal!\n");
+		fastboot_tx_write_str("FAILincorrect perm attribute size");
+		return;
+	}
+
+	if (rk_avb_read_perm_attr_flag(&flag)) {
+		printf("rk_avb_read_perm_attr_flag error!\n");
+		fastboot_tx_write_str("FAILperm attr read failed");
+		return;
+	}
+
+	if (flag == PERM_ATTR_SUCCESS_FLAG) {
+		if (rk_avb_read_attribute_hash(digest_temp,
+					       SHA256_SUM_LEN)) {
+			printf("The efuse IO can not be used!\n");
+			fastboot_tx_write_str("FAILefuse IO can not be used");
+			return;
+		}
+
+		if (memcmp(digest, digest_temp, SHA256_SUM_LEN) != 0) {
+			if (rk_avb_read_permanent_attributes(perm_attr_temp,
+							     PERM_ATTR_TOTAL_SIZE)) {
+				printf("rk_avb_write_permanent_attributes error!\n");
+				fastboot_tx_write_str("FAILread perm attr error");
+				return;
+			}
+
+			sha256_starts(&ctx);
+			sha256_update(&ctx,
+				      (const uint8_t *)perm_attr_temp,
+				      PERM_ATTR_TOTAL_SIZE);
+			sha256_finish(&ctx, digest);
+			if (memcmp(digest, digest_temp, SHA256_SUM_LEN) == 0) {
+				printf("The hash has been written!\n");
+				fastboot_tx_write_str("OKAY");
+				return;
+			}
+		}
+
+		if (rk_avb_write_perm_attr_flag(0)) {
+			fastboot_tx_write_str("FAILperm attr flag write failure");
+			return;
+		}
+	}
+
+	if (rk_avb_write_permanent_attributes((uint8_t *)
+					      CONFIG_FASTBOOT_BUF_ADDR,
+					      download_bytes)) {
+		if (rk_avb_write_perm_attr_flag(0)) {
+			fastboot_tx_write_str("FAILperm attr flag write failure");
+			return;
+		}
+		fastboot_tx_write_str("FAILperm attr write failed");
+		return;
+	}
+
+	memset(digest, 0, SHA256_SUM_LEN);
+	sha256_starts(&ctx);
+	sha256_update(&ctx, (const uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+		      PERM_ATTR_TOTAL_SIZE);
+	sha256_finish(&ctx, digest);
+
+	if (rk_avb_write_attribute_hash((uint8_t *)digest,
+					SHA256_SUM_LEN)) {
+		if (rk_avb_read_attribute_hash(digest_temp,
+						SHA256_SUM_LEN)) {
+			printf("The efuse IO can not be used!\n");
+			fastboot_tx_write_str("FAILefuse IO can not be used");
+			return;
+		}
+		if (memcmp(digest, digest_temp, SHA256_SUM_LEN) != 0) {
+			if (rk_avb_write_perm_attr_flag(0)) {
+				fastboot_tx_write_str("FAILperm attr flag write failure");
+				return;
+			}
+			printf("The hash has been written, but is different!\n");
+			fastboot_tx_write_str("FAILhash comparison failure");
+			return;
+		}
+	}
+
+	if (rk_avb_write_perm_attr_flag(PERM_ATTR_SUCCESS_FLAG)) {
+		fastboot_tx_write_str("FAILperm attr flag write failure");
+		return;
+	}
+
+	fastboot_tx_write_str("OKAY");
+#else
+	fastboot_tx_write_str("FAILnot implemented");
+#endif
+}
+
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
@@ -956,7 +1070,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
                 sprintf(cmdbuf, "gpt write mmc %x $partitions",
 			CONFIG_FASTBOOT_FLASH_MMC_DEV);
                 if (run_command(cmdbuf, 0))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILmmc write failure");
                 else
 			fastboot_tx_write_str("OKAY");
 	} else
@@ -965,13 +1079,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
 #ifdef CONFIG_OPTEE_CLIENT
-		uint8_t operation_start[128];
-		uint8_t out[256];
+		uint8_t out[ATTEST_CA_OUT_SIZE];
 		uint32_t operation_size = download_bytes;
-		uint32_t out_len = 256;
+		uint32_t out_len = ATTEST_CA_OUT_SIZE;
 		uint32_t res = 0;
-		memcpy(operation_start, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
-		res = trusty_attest_get_ca(operation_start, &operation_size, out, &out_len);
+
+		res = trusty_attest_get_ca((uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+					   &operation_size, out, &out_len);
 		if (res) {
 			fastboot_tx_write_str("FAILtrusty_attest_get_ca failed");
 			return;
@@ -985,16 +1099,15 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
 #ifdef CONFIG_OPTEE_CLIENT
-		uint8_t ca_response[8*1024];
 		uint32_t ca_response_size = download_bytes;
 		uint32_t res = 0;
-		memcpy(ca_response, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
-		res = trusty_attest_set_ca(ca_response, &ca_response_size);
-		if (res) {
+
+		res = trusty_attest_set_ca((uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+					   &ca_response_size);
+		if (res)
 			fastboot_tx_write_str("FAILtrusty_attest_set_ca failed");
-		} else {
+		else
 			fastboot_tx_write_str("OKAY");
-		}
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
@@ -1004,7 +1117,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		uint8_t lock_state;
 		lock_state = 0;
 		if (rk_avb_write_lock_state(lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILwrite lock state failed");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
@@ -1014,13 +1127,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		if (rk_avb_read_lock_state(&lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILlock sate read failure");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
 			if (rk_avb_write_lock_state(lock_state))
-				fastboot_tx_write_str("FAIL");
+				fastboot_tx_write_str("FAILwrite lock state failed");
 			else
 				fastboot_tx_write_str("OKAY");
 		}
@@ -1032,57 +1145,33 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		uint8_t lock_state;
 		lock_state = 2;
 		if (rk_avb_write_lock_state(lock_state))
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILwrite lock state failed");
 		else
 			fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
-		if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
-			printf("Permanent attribute size is not equal!\n");
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		if (rk_avb_write_permanent_attributes((uint8_t *)(size_t)
-					       CONFIG_FASTBOOT_BUF_ADDR,
-					       download_bytes
-					       - PERM_ATTR_DIGEST_SIZE)) {
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		if (rk_avb_write_attribute_hash((uint8_t *)(size_t)
-					     (CONFIG_FASTBOOT_BUF_ADDR
-					     + download_bytes
-					     - PERM_ATTR_DIGEST_SIZE),
-					     PERM_ATTR_DIGEST_SIZE)) {
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		if (rk_avb_write_perm_attr_flag(1)) {
-			fastboot_tx_write_str("FAIL");
-			return;
-		}
-
-		fastboot_tx_write_str("OKAY");
-#else
-		fastboot_tx_write_str("FAILnot implemented");
-#endif
+		cb_oem_perm_attr();
 	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
 #ifdef CONFIG_RK_AVB_LIBAVB_USER
+		sha256_context ctx;
+		uint8_t digest[SHA256_SUM_LEN];
+
 		if (download_bytes != VBOOT_KEY_HASH_SIZE) {
-			fastboot_tx_write_str("FAIL");
+			fastboot_tx_write_str("FAILinvalid vboot key length");
 			printf("The vboot key size error!\n");
+			return;
 		}
 
-		if (rk_avb_write_vbootkey_hash((uint8_t *)
-					    CONFIG_FASTBOOT_BUF_ADDR,
-					    VBOOT_KEY_HASH_SIZE)) {
-			fastboot_tx_write_str("FAIL");
+		sha256_starts(&ctx);
+		sha256_update(&ctx, (const uint8_t *)CONFIG_FASTBOOT_BUF_ADDR,
+			      VBOOT_KEY_SIZE);
+		sha256_finish(&ctx, digest);
+
+		if (rk_avb_write_vbootkey_hash((uint8_t *)digest,
+					       SHA256_SUM_LEN)) {
+			fastboot_tx_write_str("FAILvbootkey hash write failure");
 			return;
 		}
 		fastboot_tx_write_str("OKAY");
diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 9954cbf7aa..920e68155a 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -7,6 +7,11 @@
 #ifndef _OPTEECLIENTTEST_H_
 #define _OPTEECLIENTTEST_H_
 
+#define ATAP_HEX_UUID_LEN 32
+#define ATTEST_DH_SIZE     8
+#define ATTEST_UUID_SIZE     (ATAP_HEX_UUID_LEN+1)
+#define ATTEST_CA_OUT_SIZE     256
+
 void test_optee(void);
 uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);

commit 2ae0a53a439c007f3f2aeb3b8317abb843e87361
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Feb 26 10:36:19 2018 +0800

    arm: Bump COMMAND_LINE_SIZE to 2048
    
    The current limit is small for avb Boot args.
    
    Change-Id: I381fc1a09a533036427a3ed29395eae2f18208d1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 3a4e902af1..97e38b43b0 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -30,7 +30,7 @@
  *  - this structure is relatively short-lived - only
  *    guaranteed to contain useful data in setup_arch()
  */
-#define COMMAND_LINE_SIZE 1024
+#define COMMAND_LINE_SIZE 2048
 
 /* This is the old deprecated way to pass parameters to the kernel */
 struct param_struct {

commit 90ed034fda126c6f231284b54a884458a105f36e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 20:59:23 2018 +0800

    lib: avb: change the return value if the item is not found
    
    Change-Id: Ie6d29a59323789c594b4c6e9167c3bbe58e25e9f
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index c7263be901..85303fe599 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -184,7 +184,7 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
 		int ret;
 		ret = trusty_read_rollback_index(rollback_index_location,
 						 out_rollback_index);
-		if (ret == TEE_ERROR_GENERIC) {
+		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 			*out_rollback_index = 0;
 			ret = trusty_write_rollback_index(rollback_index_location,
 							  *out_rollback_index);
@@ -228,7 +228,7 @@ static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 		int ret;
 
 		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
-		if (ret == TEE_ERROR_GENERIC) {
+		if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 			*out_is_unlocked = 1;
 			if (trusty_write_lock_state(*out_is_unlocked)) {
 				printf("%s: init lock state error\n", __FILE__);
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 5aaad9a743..d060da5d8f 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -159,7 +159,7 @@ int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
 	int ret;
 
 	ret = trusty_read_flash_lock_state(flash_lock_state);
-	if (ret == TEE_ERROR_GENERIC) {
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 		*flash_lock_state = 1;
 		if (trusty_write_flash_lock_state(*flash_lock_state)) {
 			printf("trusty_write_flash_lock_state error!\n");
@@ -214,7 +214,7 @@ int rk_avb_read_lock_state(uint8_t *lock_state)
 	int ret;
 
 	ret = trusty_read_lock_state(lock_state);
-	if (ret == TEE_ERROR_GENERIC) {
+	if (ret == TEE_ERROR_ITEM_NOT_FOUND) {
 		*lock_state = 1;
 		if (rk_avb_write_lock_state(*lock_state)) {
 			printf("avb_write_lock_state error!\n");

commit d52a71fde06028a180ab26fe96a88b37ec93b2de
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 17:37:26 2018 +0800

    configs: rockchip: px30: enlarge malloc length
    
    The avb process may malloc a large buffer,
    so enlarge malloc length.
    
    Change-Id: I8a67d4c60ac4e0faa2726d1e188b7901b7f2a7c4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index e8fadc6646..3f203635b1 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -9,7 +9,7 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_MALLOC_LEN		(64 << 20) /* 64M */
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 

commit 2301a6f51c333575cfe15fc6addf415b2d9bdbbd
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 13:54:57 2018 +0800

    rockchip: resrouce_img: support a/b
    
    If apply the a/b system, open the macro CONFIG_ANDROID_AB.
    Then get the dtb from the boot '_a' or '_b' image.
    
    Change-Id: I21ad9d5a5e6e63e26bc16b1aeeb2e690c669a535
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 5eba80243b..b9f8d15e47 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -8,6 +8,10 @@
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
 #include <boot_rkimg.h>
+#ifdef CONFIG_ANDROID_AB
+#include <android_avb/libavb_ab.h>
+#include <android_avb/rk_avb_ops_user.h>
+#endif
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 #include <android_bootloader.h>
 #include <android_image.h>
@@ -183,6 +187,15 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (mode == BOOT_MODE_RECOVERY)
 		boot_partname = PART_RECOVERY;
 	/* Read boot/recovery and chenc if this is an AOSP img */
+#ifdef CONFIG_ANDROID_AB
+	char slot_suffix[3] = {0};
+
+	if (rk_avb_get_current_slot(slot_suffix))
+		goto out;
+	boot_partname = android_str_append(boot_partname, slot_suffix);
+	if (boot_partname == NULL)
+		goto out;
+#endif
 	ret = part_get_info_by_name(dev_desc, boot_partname,
 					 &part_info);
 	if (ret < 0) {
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 25128ae446..725541c642 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -33,6 +33,24 @@
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 #endif
 
+char *android_str_append(char *base_name, char *slot_suffix)
+{
+	char *part_name;
+	size_t part_name_len;
+
+	part_name_len = strlen(base_name) + 1;
+	if (slot_suffix)
+		part_name_len += strlen(slot_suffix);
+	part_name = malloc(part_name_len);
+	if (!part_name)
+		return NULL;
+	strcpy(part_name, base_name);
+	if (slot_suffix && (slot_suffix[0] != '\0'))
+		strcat(part_name, slot_suffix);
+
+	return part_name;
+}
+
 int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
 	const disk_partition_t *part_info,
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index cd6a4995ef..19854c8bce 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -77,4 +77,13 @@ int android_bootloader_boot_kernel(unsigned long kernel_address);
  */
 int android_boot_flow(unsigned long kernel_address);
 
+/** str_append- add str to tail.
+ *
+ * @base_name:	base name address.
+ * @slot_suffix: suffix.
+ *
+ * @return (base name + suffix)address.
+ */
+char *android_str_append(char *base_name, char *slot_suffix);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 76c40fa69f88575822bba85681a95770c203805d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 24 14:49:20 2018 +0800

    lib: avb: fix compile error in arm64
    
    Change-Id: I7be9c7bab1721500c70cacb1774b579d2939436a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 9b04ecbd98..5aaad9a743 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -427,7 +427,7 @@ int rk_avb_read_all_rollback_index(char *buffer)
 		}
 	}
 	debug("partition_name = %s\n", slot_data[0]->vbmeta_images->partition_name);
-	debug("vbmeta_size = %d\n", slot_data[0]->vbmeta_images->vbmeta_size);
+	debug("vbmeta_size = %d\n", (int)(size_t)slot_data[0]->vbmeta_images->vbmeta_size);
 
 	for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
 		uint64_t rollback_index_value = 0;

commit 2a1017eb24b52343927dc503723d267d6ad6198d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 24 14:48:15 2018 +0800

    fastboot: fix compile error in arm64
    
    Change-Id: I935989c0573e12a95fac5e3b92a37b1764fad2fc
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index d34475e579..472d32e6d2 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -1046,7 +1046,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (rk_avb_write_permanent_attributes((uint8_t *)
+		if (rk_avb_write_permanent_attributes((uint8_t *)(size_t)
 					       CONFIG_FASTBOOT_BUF_ADDR,
 					       download_bytes
 					       - PERM_ATTR_DIGEST_SIZE)) {
@@ -1054,7 +1054,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (rk_avb_write_attribute_hash((uint8_t *)
+		if (rk_avb_write_attribute_hash((uint8_t *)(size_t)
 					     (CONFIG_FASTBOOT_BUF_ADDR
 					     + download_bytes
 					     - PERM_ATTR_DIGEST_SIZE),

commit 326572ea3b5ae88536ca9388f0b140e7d26c6d7c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 24 14:46:01 2018 +0800

    androidboot: fix compile error in arm64
    
    Change-Id: I68bff703ffbf8ef9a65e4d62a5cf1052bc49ac9b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index b7c1e4ea51..d9dc0b5bee 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -141,7 +141,7 @@ int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 	AvbABData ab_data;
 
 	memset(&ab_data, 0, sizeof(AvbABData));
-	debug("sizeof(AvbABData) = %d\n", sizeof(AvbABData));
+	debug("sizeof(AvbABData) = %d\n", (int)(size_t)sizeof(AvbABData));
 	if (argc != 1)
 		return CMD_RET_USAGE;
 

commit 92f26f7214dc65432b0223f46495b087cba4d1ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 09:19:29 2018 +0800

    make.sh: fix typo "RKRUST" -> "RKTRUST"
    
    Change-Id: Ia824691d68521652c4a5a7d03a5080b57a8ae7b9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 192ce4adc1..cc3176f2ee 100755
--- a/make.sh
+++ b/make.sh
@@ -152,7 +152,7 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
-			echo "pack trust failed! Can't find: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 			return
 		fi
 
@@ -160,7 +160,7 @@ pack_trust_image()
 		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
-		echo "pack trust okay! Input: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then

commit e959b7070e4502f74f300dc4b8e16f07efd4ff42
Author: Lin Huang <hl@rock-chips.com>
Date:   Thu Mar 1 16:13:25 2018 +0800

    clk: rockchip: rk3399: support uart0~uart4 clock get rate
    
    some board will use other uart as console output,
    so add uart0~uart4 clock get rate.
    
    Change-Id: Iafde4819cdcf3e650fe14c7c3dd9784d953ba8a0
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index b86f9f4b05..4fe37f7c5c 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -855,7 +855,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 		rate = rk3399_spi_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_UART0:
+	case SCLK_UART1:
 	case SCLK_UART2:
+	case SCLK_UART3:
 		return 24000000;
 		break;
 	case PCLK_HDMI_CTRL:
@@ -1250,6 +1252,9 @@ static ulong rk3399_pmuclk_get_rate(struct clk *clk)
 	case SCLK_I2C8_PMU:
 		rate = rk3399_i2c_get_pmuclk(priv->pmucru, clk->id);
 		break;
+	case SCLK_UART4_PMU:
+		rate = 24000000;
+		break;
 	default:
 		return -ENOENT;
 	}

commit e2bc9ab67abac644335605139bfe85b8d367862f
Author: Lin Huang <hl@rock-chips.com>
Date:   Mon Feb 26 10:04:02 2018 +0800

    rockchip: smccc: add psci_cpu_on function
    
    With this function, we can up other cpu in Uboot.
    
    Change-Id: I968b5e05ce42a1bf799dbae7e8d4dfcc3fd958f1
    Signed-off-by: Lin Huang <hl@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 01007363b3..0167f3c4df 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -67,5 +67,6 @@ struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
 
 int sip_smc_set_sip_version(unsigned long version);
 struct arm_smccc_res sip_smc_get_sip_version(void);
+int psci_cpu_on(unsigned long cpuid, unsigned long entry_point);
 
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index 3eed441181..3af89fc57a 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -13,8 +13,10 @@
 
 #ifdef CONFIG_ARM64
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND
+#define ARM_PSCI_0_2_CPU_ON		ARM_PSCI_0_2_FN64_CPU_ON
 #else
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN_SYSTEM_SUSPEND
+#define ARM_PSCI_0_2_CPU_ON		ARM_PSCI_0_2_FN_CPU_ON
 #endif
 
 #define SIZE_PAGE(n)	((n) << 12)
@@ -30,6 +32,15 @@ static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
 	return res;
 }
 
+int psci_cpu_on(unsigned long cpuid, unsigned long entry_point)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(ARM_PSCI_0_2_CPU_ON, cpuid, entry_point, 0);
+
+	return res.a0;
+}
+
 int psci_system_suspend(unsigned long unused)
 {
 	struct arm_smccc_res res;

commit a37d9222c09b66c7b340194e53f12e8cb922826c
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu Mar 1 16:00:06 2018 +0800

    configs: evb-px30: enable charge animation
    
    Change-Id: Ia12ca035f55af60e607ce48581fa3ecab34cb03d
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 61cc552b5d..ffa693bac6 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -51,6 +51,7 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y

commit 0092730cdb7350f87cecef447160a2520584520e
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Thu Mar 1 15:57:35 2018 +0800

    configs: evb-px30: enable fuel gauge rk817 driver
    
    Change-Id: I301e8f36e7ee56218ae29cb66285da1dc02acf5c
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
index 8d394357f6..61cc552b5d 100644
--- a/configs/evb-rk3326_defconfig
+++ b/configs/evb-rk3326_defconfig
@@ -44,6 +44,7 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK817=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit ef4591a5189025425656c714a4da62e88bc776f1
Author: shengfei Xu <xsf@rock-chips.com>
Date:   Tue Feb 27 23:16:43 2018 +0800

    power: fuel gauge: add rk817 support
    
    Change-Id: I721887363b8eeea628b0042d34f0ab66ed76e6a1
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 7ba34aadaf..ef0ea6a4ed 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -17,6 +17,12 @@ config POWER_FG_RK818
 	help
 	  This adds support for RK818 fuel gauge support.
 
+config POWER_FG_RK817
+	bool "RK817 Fuel gauge support"
+	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK817 fuel gauge support.
+
 config POWER_FG_RK816
 	bool "RK816 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index fa73ef770e..9f9f8912ee 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
 obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
+obj-$(CONFIG_POWER_FG_RK817) += fg_rk817.o
 obj-$(CONFIG_POWER_FG_RK816) += fg_rk816.o
diff --git a/drivers/power/fuel_gauge/fg_rk817.c b/drivers/power/fuel_gauge/fg_rk817.c
new file mode 100644
index 0000000000..061f7f347a
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_rk817.c
@@ -0,0 +1,1211 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <dm.h>
+#include <errno.h>
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <asm/gpio.h>
+#include <common.h>
+#include <power/pmic.h>
+#include <dm/uclass-internal.h>
+#include <power/charge_display.h>
+#include <power/charge_animation.h>
+#include <power/fuel_gauge.h>
+#include <power/rk8xx_pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int dbg_enable;
+#define DBG(args...) \
+	do { \
+		if (dbg_enable) { \
+			printf(args); \
+		} \
+	} while (0)
+
+#define DIV(value)	((value) ? (value) : 1)
+#define ENABLE			0x01
+#define DISABLE			0x00
+#define MAX_INTERPOLATE		1000
+#define MAX_PERCENTAGE		100
+#define MAX_INT			0x7FFF
+
+#define ADC_CONFIG0		0x0050
+#define CUR_ADC_CFG0		0x0051
+#define CUR_ADC_CFG1		0x0052
+#define VOL_ADC_CFG0		0x0053
+#define VOL_ADC_CFG1		0x0054
+#define ADC_CONFIG1		0x0055
+#define GG_CON			0x0056
+#define GG_STS			0x0057
+#define RELAX_THRE_H		0x0058
+#define RELAX_THRE_L		0x0059
+#define RELAX_VOL1_H		0x005a
+#define RELAX_VOL1_L		0x005b
+#define RELAX_VOL2_H		0x005c
+#define RELAX_VOL2_L		0x005d
+#define RELAX_CUR1_H		0x005e
+#define RELAX_CUR1_L		0x005f
+#define RELAX_CUR2_H		0x0060
+#define RELAX_CUR2_L		0x0061
+#define OCV_THRE_VOL		0x0062
+#define OCV_VOL_H		0x0063
+#define OCV_VOL_L		0x0064
+#define OCV_VOL0_H		0x0065
+#define OCV_VOL0_L		0x0066
+#define OCV_CUR_H		0x0067
+#define OCV_CUR_L		0x0068
+#define OCV_CUR0_H		0x0069
+#define OCV_CUR0_L		0x006a
+#define PWRON_VOL_H		0x006b
+#define PWRON_VOL_L		0x006c
+#define PWRON_CUR_H		0x006d
+#define PWRON_CUR_L		0x006e
+#define OFF_CNT			0x006f
+#define Q_INIT_H3		0x0070
+#define Q_INIT_H2		0x0071
+#define Q_INIT_L1		0x0072
+#define Q_INIT_L0		0x0073
+#define Q_PRES_H3		0x0074
+#define Q_PRES_H2		0x0075
+#define Q_PRES_L1		0x0076
+#define Q_PRES_L0		0x0077
+#define BAT_VOL_H		0x0078
+#define BAT_VOL_L		0x0079
+#define BAT_CUR_H		0x007a
+#define BAT_CUR			0x007b
+#define BAT_TS_H		0x007c
+#define BAT_TS_L		0x007d
+#define USB_VOL_H		0x007e
+#define USB_VOL_L		0x007f
+#define SYS_VOL_H		0x0080
+#define SYS_VOL_L		0x0081
+#define Q_MAX_H3		0x0082
+#define Q_MAX_H2		0x0083
+#define Q_MAX_L1		0x0084
+#define Q_MAX_L0		0x0085
+#define Q_TERM_H3		0x0086
+#define Q_TERM_H2		0x0087
+#define Q_TERM_L1		0x0088
+#define Q_TERM_L0		0x0089
+#define Q_OCV_H3		0x008a
+#define Q_OCV_H2		0x008b
+#define Q_OCV_L1		0x008c
+#define Q_OCV_L0		0x008d
+#define OCV_CNT			0x008e
+#define SLEEP_CON_SAMP_CUR_H	0x008f
+#define SLEEP_CON_SAMP_CUR	0x0090
+#define CAL_OFFSET_H		0x0091
+#define CAL_OFFSET_L		0x0092
+#define VCALIB0_H		0x0093
+#define VCALIB0_L		0x0094
+#define VCALIB1_H		0x0095
+#define VCALIB1_L		0x0096
+#define IOFFSET_H		0x0097
+#define IOFFSET_L		0x0098
+#define BAT_R0			0x0099
+#define BAT_R1			0x009a
+#define BAT_R2			0x009b
+#define BAT_R3			0x009c
+#define REMAIN_CAP_REG0		0x9d
+#define REMAIN_CAP_REG1		0x9e
+#define REMAIN_CAP_REG2		0x9f
+#define NEW_FCC_REG0		0x00a0
+#define NEW_FCC_REG1		0x00a1
+#define NEW_FCC_REG2		0x00a2
+#define DATA6			0x00a3
+#define DATA7			0x00a4
+#define FG_INIT			0x00a5
+#define HALT_CNT_REG		0x00a6
+#define DATA10			0x00a7
+#define DATA11			0x00a8
+#define VOL_ADC_B3		0x00a9
+#define VOL_ADC_B2		0x00aa
+#define VOL_ADC_B1		0x00ab
+#define VOL_ADC_B_7_0		0x00ac
+#define CUR_ADC_K3		0x00ad
+#define CUR_ADC_K2		0x00ae
+#define CUR_ADC_K1		0x00af
+#define CUR_ADC_K0		0x00b0
+#define BAT_CON			BIT(4)
+#define SOC_REG			0xa5
+
+#define USB_CTRL_REG		0x00E5
+#define PMIC_SYS_STS		0x00f0
+#define PLUG_IN_STS		BIT(6)
+
+#define CHRG_TERM_DSOC		90
+#define CHRG_TERM_K		650
+#define CHRG_FULL_K		400
+#define CHARGE_FINISH		(0x04 << 4)
+
+/* CALI PARAM */
+#define FINISH_CALI_CURR	1500
+#define TERM_CALI_CURR		600
+#define VIRTUAL_POWER_VOL	4200
+#define VIRTUAL_POWER_CUR	1000
+#define VIRTUAL_POWER_SOC	66
+#define SECONDS(n)		((n) * 1000)
+
+/* CHRG_CTRL_REG */
+#define ILIM_450MA		(0x00)
+#define ILIM_2000MA		(0x07)
+#define ILIM_1500MA		(0x03)
+#define VLIM_4500MV		(0x50)
+
+/* sample resistor and division */
+#define SAMPLE_RES_10mR		10
+#define SAMPLE_RES_20mR		20
+#define SAMPLE_RES_DIV1		1
+#define SAMPLE_RES_DIV2		2
+
+#define CHRG_CT_EN		BIT(1)
+#define MIN_FCC			500
+
+/* USB_CTRL_REG */
+#define INPUT_CUR_MSK		0x0f
+#define INPUT_VOL_MSK		0xf0
+#define VOL_OUPUT_INSTANT_MODE	0x02
+
+#define ADC_TO_CURRENT(adc_value, samp_res)	\
+	(adc_value * 172 / 1000 / samp_res)
+#define CURRENT_TO_ADC(current, samp_res)	\
+	(current * 1000 * samp_res / 172)
+
+#define ADC_TO_CAPACITY(adc_value, samp_res)	\
+	(adc_value / 1000 * 172 / 3600 / samp_res)
+#define CAPACITY_TO_ADC(capacity, samp_res)	\
+	(capacity * samp_res * 3600 / 172 * 1000)
+
+#define ADC_TO_CAPACITY_UAH(adc_value, samp_res)	\
+	(adc_value / 3600 * 172 / samp_res)
+#define ADC_TO_CAPACITY_MAH(adc_value, samp_res)	\
+	(adc_value / 1000 * 172 / 3600 / samp_res)
+
+/* charger type definition */
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
+
+struct rk817_battery_device {
+	struct udevice *dev;
+	int				res_div;
+	bool				is_first_power_on;
+	bool				is_initialized;
+	bool				bat_first_power_on;
+	int				current_avg;
+	int				current_pwron;
+	int				voltage_usb;
+	int				voltage_sys;
+	int				voltage_avg;
+	int				voltage_k;/* VCALIB0 VCALIB1 */
+	int				voltage_b;
+	u32				remain_cap;
+	int				design_cap;
+	int				nac;
+	int				fcc;
+	int				qmax;
+	int				dsoc;
+	int				rsoc;
+	int				pwron_voltage;
+	int				sm_linek;
+	int				sm_old_cap;
+	u8				calc_dsoc;
+	u8				calc_rsoc;
+	int				sm_chrg_dsoc;
+	u8				halt_cnt;
+	bool				is_halt;
+	int				dbg_pwr_dsoc;
+	int				dbg_pwr_rsoc;
+	int				dbg_pwr_vol;
+	int				dbg_meet_soc;
+	int				dbg_calc_dsoc;
+	int				dbg_calc_rsoc;
+	int				adc_allow_update;
+	int				pwroff_min;
+	int				chrg_cur_input;
+	u32				*ocv_table;
+	int				ocv_size;
+	u32				design_capacity;
+	u32				design_qmax;
+	u32				max_soc_offset;
+	u32				virtual_power;
+	u32				chrg_type;
+	ulong				finish_chrg_base;
+	ulong				term_sig_base;
+	int				sm_meet_soc;
+};
+
+static u32 interpolate(int value, u32 *table, int size)
+{
+	u8 i;
+	u16 d;
+
+	for (i = 0; i < size; i++) {
+		if (value < table[i])
+			break;
+	}
+
+	if ((i > 0) && (i < size)) {
+		d = (value - table[i - 1]) * (MAX_INTERPOLATE / (size - 1));
+		d /= table[i] - table[i - 1];
+		d = d + (i - 1) * (MAX_INTERPOLATE / (size - 1));
+	} else {
+		d = i * ((MAX_INTERPOLATE + size / 2) / size);
+	}
+
+	if (d > 1000)
+		d = 1000;
+
+	return d;
+}
+
+/* (a * b) / c */
+static int32_t ab_div_c(u32 a, u32 b, u32 c)
+{
+	bool sign;
+	u32 ans = MAX_INT;
+	int tmp;
+
+	sign = ((((a ^ b) ^ c) & 0x80000000) != 0);
+	if (c != 0) {
+		if (sign)
+			c = -c;
+		tmp = (a * b + (c >> 1)) / c;
+		if (tmp < MAX_INT)
+			ans = tmp;
+	}
+
+	if (sign)
+		ans = -ans;
+
+	return ans;
+}
+
+static int rk817_bat_read(struct rk817_battery_device *battery, u8 reg)
+{
+	return pmic_reg_read(battery->dev->parent, reg);
+}
+
+static void rk817_bat_write(struct rk817_battery_device *battery,
+			    u8 reg, u8 buf)
+{
+	pmic_reg_write(battery->dev->parent, reg, buf);
+}
+
+static int rk817_bat_get_vaclib0(struct rk817_battery_device *battery)
+{
+	int vcalib_value = 0;
+
+	vcalib_value |= rk817_bat_read(battery, VCALIB0_H) << 8;
+	vcalib_value |= rk817_bat_read(battery, VCALIB0_L);
+
+	return vcalib_value;
+}
+
+static int rk817_bat_get_vaclib1(struct rk817_battery_device *battery)
+{
+	int vcalib_value = 0;
+
+	vcalib_value |= rk817_bat_read(battery, VCALIB1_H) << 8;
+	vcalib_value |= rk817_bat_read(battery, VCALIB1_L);
+
+	return vcalib_value;
+}
+
+static void rk817_bat_init_voltage_kb(struct rk817_battery_device *battery)
+{
+	int vcalib0, vcalib1;
+
+	vcalib0 = rk817_bat_get_vaclib0(battery);
+	vcalib1 =  rk817_bat_get_vaclib1(battery);
+	battery->voltage_k = (4025 - 2300) * 1000 / DIV(vcalib1 - vcalib0);
+	battery->voltage_b = 4025 - (battery->voltage_k * vcalib1) / 1000;
+}
+
+/* power on battery voltage */
+static int rk817_bat_get_pwron_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, PWRON_VOL_H) << 8;
+	val |= rk817_bat_read(battery, PWRON_VOL_L);
+	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+
+	return vol;
+}
+
+static int rk817_bat_get_USB_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, USB_VOL_L) << 0;
+	val |= rk817_bat_read(battery, USB_VOL_H) << 8;
+
+	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+
+	return vol;
+}
+
+static int rk817_bat_get_sys_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, SYS_VOL_H) << 8;
+	val |= rk817_bat_read(battery, SYS_VOL_L) << 0;
+
+	vol = (battery->voltage_k * val / 1000 + battery->voltage_b) * 60 / 46;
+
+	return vol;
+}
+
+static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
+{
+	int vol, val = 0;
+
+	val = rk817_bat_read(battery, BAT_VOL_H) << 8;
+	val |= rk817_bat_read(battery, BAT_VOL_L) << 0;
+
+	vol = battery->voltage_k * val / 1000 + battery->voltage_b;
+
+	return vol;
+}
+
+static int rk817_bat_get_avg_current(struct rk817_battery_device *battery)
+{
+	int cur, val = 0;
+
+	val |= rk817_bat_read(battery, BAT_CUR);
+	val |= rk817_bat_read(battery, BAT_CUR_H) << 8;
+
+	if (val & 0x8000)
+		val -= 0x10000;
+
+	cur = ADC_TO_CURRENT(val, battery->res_div);
+
+	return cur;
+}
+
+static int rk817_bat_get_pwron_current(struct rk817_battery_device *battery)
+{
+	int cur, val = 0;
+
+	val |= rk817_bat_read(battery, PWRON_CUR_L);
+	val |= rk817_bat_read(battery, PWRON_CUR_H) << 8;
+
+	if (val & 0x8000)
+		val -= 0x10000;
+	cur = ADC_TO_CURRENT(val, battery->res_div);
+
+	return cur;
+}
+
+static void rk817_bat_calibration(struct rk817_battery_device *battery)
+{
+	int  ioffset_value = 0;
+	u8  buf = 0;
+
+	if (rk817_bat_read(battery, ADC_CONFIG1) & 0x80) {
+		ioffset_value = rk817_bat_read(battery, IOFFSET_H) << 8;
+		ioffset_value |= rk817_bat_read(battery, IOFFSET_L);
+
+		buf = (ioffset_value >> 8) & 0xff;
+		rk817_bat_write(battery, CAL_OFFSET_H, buf);
+		buf = (ioffset_value >> 0) & 0xff;
+		rk817_bat_write(battery, CAL_OFFSET_L, buf);
+
+		rk817_bat_init_voltage_kb(battery);
+		rk817_bat_write(battery, ADC_CONFIG1, 0x80);
+	}
+}
+
+static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
+{
+	u32 val = 0, capacity;
+
+	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+	capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
+	return  capacity;
+}
+
+static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
+{
+	u32 val, capacity;
+
+	val = rk817_bat_read(battery, Q_PRES_H3) << 24;
+	val |= rk817_bat_read(battery, Q_PRES_H2) << 16;
+	val |= rk817_bat_read(battery, Q_PRES_L1) << 8;
+	val |= rk817_bat_read(battery, Q_PRES_L0) << 0;
+
+	capacity = ADC_TO_CAPACITY(val, battery->res_div);
+
+	return  capacity;
+}
+
+static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
+				       u32 capacity)
+{
+	u8 buf;
+	u32 cap;
+
+	cap = CAPACITY_TO_ADC(capacity, battery->res_div);
+	buf = (cap >> 24) & 0xff;
+	rk817_bat_write(battery, Q_INIT_H3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk817_bat_write(battery, Q_INIT_H2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk817_bat_write(battery, Q_INIT_L1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk817_bat_write(battery, Q_INIT_L0, buf);
+
+	battery->rsoc = capacity * 1000 * 100 / battery->fcc;
+	battery->remain_cap = capacity * 1000;
+}
+
+static void rk817_bat_save_cap(struct rk817_battery_device *battery,
+			       int capacity)
+{
+	u8 buf;
+	static u32 old_cap;
+
+	if (capacity >= battery->qmax)
+		capacity = battery->qmax;
+	if (capacity <= 0)
+		capacity = 0;
+	if (old_cap == capacity)
+		return;
+
+	old_cap = capacity;
+	buf = (capacity >> 16) & 0xff;
+	rk817_bat_write(battery, REMAIN_CAP_REG2, buf);
+	buf = (capacity >> 8) & 0xff;
+	rk817_bat_write(battery, REMAIN_CAP_REG1, buf);
+	buf = (capacity >> 0) & 0xff;
+	rk817_bat_write(battery, REMAIN_CAP_REG0, buf);
+}
+
+static int rk817_bat_get_rsoc(struct rk817_battery_device *battery)
+{
+	int remain_cap;
+
+	remain_cap = rk817_bat_get_capacity_uah(battery);
+
+	return remain_cap * 100 / DIV(battery->fcc);
+}
+
+static int rk817_bat_vol_to_soc(struct rk817_battery_device *battery,
+				int voltage)
+{
+	u32 *ocv_table, temp;
+	int ocv_size, ocv_soc;
+
+	ocv_table = battery->ocv_table;
+	ocv_size = battery->ocv_size;
+	temp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_soc = ab_div_c(temp, MAX_PERCENTAGE, MAX_INTERPOLATE);
+
+	return ocv_soc;
+}
+
+static int rk817_bat_vol_to_cap(struct rk817_battery_device *battery,
+				int voltage)
+{
+	u32 *ocv_table, temp;
+	int ocv_size, capacity;
+
+	ocv_table = battery->ocv_table;
+	ocv_size = battery->ocv_size;
+	temp = interpolate(voltage, ocv_table, ocv_size);
+	capacity = ab_div_c(temp, battery->fcc, MAX_INTERPOLATE);
+
+	return capacity;
+}
+
+static void rk817_bat_save_dsoc(struct rk817_battery_device *battery,
+				u8 save_soc)
+{
+	static int last_soc = -1;
+	int value;
+
+	value = rk817_bat_read(battery, SOC_REG);
+	value &= 0x80;
+	if (last_soc != save_soc) {
+		rk817_bat_write(battery, SOC_REG, value | save_soc);
+		last_soc = save_soc;
+	}
+}
+
+static int rk817_bat_get_prev_dsoc(struct rk817_battery_device *battery)
+{
+	return (rk817_bat_read(battery, SOC_REG) & 0x7f);
+}
+
+static int rk817_bat_get_prev_cap(struct rk817_battery_device *battery)
+{
+	int val = 0;
+
+	val = rk817_bat_read(battery, REMAIN_CAP_REG2) << 16;
+	val |= rk817_bat_read(battery, REMAIN_CAP_REG1) << 8;
+	val |= rk817_bat_read(battery, REMAIN_CAP_REG0) << 0;
+
+	return val;
+}
+
+static void rk817_bat_gas_gaugle_enable(struct rk817_battery_device *battery)
+{
+	int value;
+
+	value = rk817_bat_read(battery, ADC_CONFIG0);
+	rk817_bat_write(battery, ADC_CONFIG0, value | 0x80);
+}
+
+static bool is_rk817_bat_first_pwron(struct rk817_battery_device *battery)
+{
+	int value;
+
+	value = rk817_bat_read(battery, GG_STS);
+
+	if (value & BAT_CON) {
+		rk817_bat_write(battery, GG_STS, value & (~BAT_CON));
+		return true;
+	}
+
+	return false;
+}
+
+static int rk817_bat_get_off_count(struct rk817_battery_device *battery)
+{
+	return rk817_bat_read(battery, OFF_CNT);
+}
+
+static void rk817_bat_update_qmax(struct rk817_battery_device *battery,
+				  u32 capacity)
+{
+	u8 buf;
+	u32 cap_adc;
+
+	cap_adc = CAPACITY_TO_ADC(capacity, battery->res_div);
+	buf = (cap_adc >> 24) & 0xff;
+	rk817_bat_write(battery, Q_MAX_H3, buf);
+	buf = (cap_adc >> 16) & 0xff;
+	rk817_bat_write(battery, Q_MAX_H2, buf);
+	buf = (cap_adc >> 8) & 0xff;
+	rk817_bat_write(battery, Q_MAX_L1, buf);
+	buf = (cap_adc >> 0) & 0xff;
+	rk817_bat_write(battery, Q_MAX_L0, buf);
+
+	battery->qmax = capacity;
+}
+
+static void rk817_bat_save_fcc(struct rk817_battery_device *battery, int  fcc)
+{
+	u8 buf;
+
+	buf = (fcc >> 16) & 0xff;
+	rk817_bat_write(battery, NEW_FCC_REG2, buf);
+	buf = (fcc >> 8) & 0xff;
+	rk817_bat_write(battery, NEW_FCC_REG1, buf);
+	buf = (fcc >> 0) & 0xff;
+	rk817_bat_write(battery, NEW_FCC_REG0, buf);
+}
+
+static void rk817_bat_first_pwron(struct rk817_battery_device *battery)
+{
+	battery->rsoc =
+		rk817_bat_vol_to_soc(battery,
+				     battery->pwron_voltage) * 1000;/* uAH */
+	battery->dsoc = battery->rsoc;
+	battery->fcc = battery->design_cap;
+
+	battery->nac = rk817_bat_vol_to_cap(battery,
+					    battery->pwron_voltage);
+
+	rk817_bat_update_qmax(battery, battery->qmax);
+	rk817_bat_save_fcc(battery, battery->fcc);
+	DBG("%s, rsoc = %d, dsoc = %d, fcc = %d, nac = %d\n",
+	    __func__, battery->rsoc, battery->dsoc, battery->fcc, battery->nac);
+}
+
+static int rk817_bat_get_fcc(struct rk817_battery_device *battery)
+{
+	u32 fcc = 0;
+
+	fcc |= rk817_bat_read(battery, NEW_FCC_REG2) << 16;
+	fcc |= rk817_bat_read(battery, NEW_FCC_REG1) << 8;
+	fcc |= rk817_bat_read(battery, NEW_FCC_REG0) << 0;
+
+	if (fcc < MIN_FCC) {
+		DBG("invalid fcc(%d), use design cap", fcc);
+		fcc = battery->design_capacity;
+		rk817_bat_save_fcc(battery, fcc);
+	} else if (fcc > battery->design_qmax) {
+		DBG("invalid fcc(%d), use qmax", fcc);
+		fcc = battery->design_qmax;
+		rk817_bat_save_fcc(battery, fcc);
+	}
+
+	return fcc;
+}
+
+static void rk817_bat_inc_halt_cnt(struct rk817_battery_device *battery)
+{
+	u8 cnt;
+
+	cnt =  rk817_bat_read(battery, HALT_CNT_REG);
+	rk817_bat_write(battery, HALT_CNT_REG, ++cnt);
+}
+
+static bool is_rk817_bat_last_halt(struct rk817_battery_device *battery)
+{
+	int pre_cap = rk817_bat_get_prev_cap(battery);
+	int now_cap = rk817_bat_get_capacity_mah(battery);
+
+	/* over 10%: system halt last time */
+	if (abs(now_cap - pre_cap) > (battery->fcc / 10)) {
+		rk817_bat_inc_halt_cnt(battery);
+		return true;
+	} else {
+		return false;
+	}
+}
+
+static u8 rk817_bat_get_halt_cnt(struct rk817_battery_device *battery)
+{
+	return rk817_bat_read(battery, HALT_CNT_REG);
+}
+
+static int rk817_bat_is_initialized(struct rk817_battery_device *battery)
+{
+	u8 val = rk817_bat_read(battery, FG_INIT);
+
+	return (val & 0x80);
+}
+
+static void rk817_bat_set_initialized_flag(struct rk817_battery_device *battery)
+{
+	u8 val = rk817_bat_read(battery, FG_INIT);
+
+	rk817_bat_write(battery, FG_INIT, val | (0x80));
+}
+
+static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
+{
+	int now_cap, pre_soc, pre_cap;
+
+	battery->fcc = rk817_bat_get_fcc(battery);
+	pre_soc = rk817_bat_get_prev_dsoc(battery);
+	pre_cap = rk817_bat_get_prev_cap(battery);
+	now_cap = rk817_bat_get_capacity_mah(battery);
+	battery->remain_cap = pre_cap * 1000;
+	battery->is_halt = is_rk817_bat_last_halt(battery);
+	battery->halt_cnt = rk817_bat_get_halt_cnt(battery);
+
+	pre_soc *= 1000;
+	if (battery->is_halt) {
+		DBG("system halt last time... cap: pre=%d, now=%d\n",
+		    pre_cap, now_cap);
+		if (now_cap < 0)
+			now_cap = 0;
+		rk817_bat_init_coulomb_cap(battery, now_cap);
+		pre_cap = now_cap;
+		pre_soc = battery->rsoc;
+		goto finish;
+	}
+finish:
+	battery->dsoc = pre_soc;
+	battery->nac = pre_cap;
+	if (battery->nac < 0)
+		battery->nac = 0;
+
+	DBG("dsoc=%d cap=%d v=%d pwron_v =%d min=%d psoc=%d pcap=%d\n",
+	    battery->dsoc, battery->nac, rk817_bat_get_battery_voltage(battery),
+	    rk817_bat_get_pwron_voltage(battery),
+	    battery->pwroff_min, rk817_bat_get_prev_dsoc(battery),
+	    rk817_bat_get_prev_cap(battery));
+}
+
+static void rk817_bat_rsoc_init(struct rk817_battery_device *battery)
+{
+	battery->is_first_power_on = is_rk817_bat_first_pwron(battery);
+	battery->pwroff_min = rk817_bat_get_off_count(battery);
+	battery->pwron_voltage = rk817_bat_get_pwron_voltage(battery);
+
+	DBG("battery = %d\n", rk817_bat_get_battery_voltage(battery));
+	DBG("%s: is_first_power_on = %d, pwroff_min = %d, pwron_voltage = %d\n",
+	    __func__, battery->is_first_power_on,
+	    battery->pwroff_min, battery->pwron_voltage);
+
+	if (battery->is_first_power_on)
+		rk817_bat_first_pwron(battery);
+	else
+		rk817_bat_not_first_pwron(battery);
+
+	 rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	 rk817_bat_save_cap(battery, battery->nac);
+}
+
+static int rk817_bat_calc_linek(struct rk817_battery_device *battery)
+{
+	int linek, diff, delta;
+
+	battery->calc_dsoc = battery->dsoc;
+	battery->calc_rsoc = battery->rsoc;
+	battery->sm_old_cap = battery->remain_cap;
+
+	delta = abs(battery->dsoc - battery->rsoc);
+	diff = delta * 3;
+	battery->sm_meet_soc = (battery->dsoc >= battery->rsoc) ?
+			   (battery->dsoc + diff) : (battery->rsoc + diff);
+
+	if (battery->dsoc < battery->rsoc)
+		linek = 1000 * (delta + diff) / DIV(diff);
+	else if (battery->dsoc > battery->rsoc)
+		linek = 1000 * diff / DIV(delta + diff);
+	else
+		linek = 1000;
+
+	battery->sm_chrg_dsoc = battery->dsoc;
+
+	DBG("<%s>. meet=%d, diff=%d, link=%d, calc: dsoc=%d, rsoc=%d\n",
+	    __func__, battery->sm_meet_soc, diff, linek,
+	    battery->calc_dsoc, battery->calc_rsoc);
+
+	return linek;
+}
+
+static int rk817_bat_get_est_voltage(struct rk817_battery_device *battery)
+{
+	return rk817_bat_get_battery_voltage(battery);
+}
+
+static int rk817_bat_update_get_voltage(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	if (!battery->virtual_power && battery->voltage_k)
+		return rk817_bat_get_est_voltage(battery);
+	else
+		return VIRTUAL_POWER_VOL;
+}
+
+static int rk817_bat_update_get_current(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	if (!battery->virtual_power && battery->voltage_k)
+		return rk817_bat_get_avg_current(battery);
+	else
+		return VIRTUAL_POWER_CUR;
+}
+
+static int rk817_bat_dwc_otg_check_dpdm(void)
+{
+	return rockchip_chg_get_type();
+}
+
+static bool rk817_bat_update_get_chrg_online(struct udevice *dev)
+{
+	return rk817_bat_dwc_otg_check_dpdm();
+}
+
+static int rk817_bat_get_usb_state(struct rk817_battery_device *battery)
+{
+	int charger_type;
+
+	switch (rk817_bat_dwc_otg_check_dpdm()) {
+	case 0:
+		if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) != 0)
+			charger_type = DC_CHARGER;
+		else
+			charger_type = NO_CHARGER;
+		break;
+	case 1:
+	case 3:
+		charger_type = USB_CHARGER;
+		break;
+	case 2:
+		charger_type = AC_CHARGER;
+		break;
+	default:
+		charger_type = NO_CHARGER;
+	}
+
+	return charger_type;
+}
+
+static int rk817_bat_get_charger_type(struct rk817_battery_device *battery)
+{
+	/* check by ic hardware: this check make check work safer */
+	if ((rk817_bat_read(battery, PMIC_SYS_STS) & PLUG_IN_STS) == 0)
+		return NO_CHARGER;
+
+	/* virtual or bat not exist */
+	if (battery->virtual_power)
+		return DC_CHARGER;
+
+	/* check USB secondly */
+	return rk817_bat_get_usb_state(battery);
+}
+
+static void rk817_bat_set_input_current(struct rk817_battery_device *battery,
+					int input_current)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk817_bat_read(battery, USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= ((input_current) | 0x08);
+	rk817_bat_write(battery, USB_CTRL_REG, usb_ctrl);
+}
+
+static void rk817_bat_set_input_voltage(struct rk817_battery_device *battery,
+					int input_voltage)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk817_bat_read(battery, USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_VOL_MSK;
+	usb_ctrl |= ((input_voltage) | 0x80);
+	rk817_bat_write(battery, USB_CTRL_REG, usb_ctrl);
+}
+
+static void rk817_bat_charger_setting(struct rk817_battery_device *battery,
+				      int charger)
+{
+	static u8 old_charger = UNDEF_CHARGER;
+
+	rk817_bat_set_input_voltage(battery, VLIM_4500MV);
+	/* charger changed */
+	if (old_charger != charger) {
+		if (charger == NO_CHARGER) {
+			DBG("NO_CHARGER\n");
+			rk817_bat_set_input_current(battery, ILIM_450MA);
+		} else if (charger == USB_CHARGER) {
+			DBG("USB_CHARGER\n");
+			rk817_bat_set_input_current(battery, ILIM_450MA);
+		} else if (charger == DC_CHARGER || charger == AC_CHARGER) {
+			DBG("DC OR AC CHARGE\n");
+			rk817_bat_set_input_current(battery, ILIM_1500MA);
+		} else {
+			DBG("charger setting error %d\n", charger);
+		}
+
+		old_charger = charger;
+	}
+}
+
+static void rk817_bat_linek_algorithm(struct rk817_battery_device *battery)
+{
+	int delta_cap, ydsoc, tmp;
+	u8 chg_st = rk817_bat_get_charger_type(battery);
+
+	/* slow down */
+	if (battery->dsoc / 1000 == 99)
+		battery->sm_linek = CHRG_FULL_K;
+	else if (battery->dsoc / 1000 >= CHRG_TERM_DSOC &&
+		 battery->current_avg > TERM_CALI_CURR)
+		battery->sm_linek = CHRG_TERM_K;
+
+	delta_cap = battery->remain_cap - battery->sm_old_cap;
+	ydsoc = battery->sm_linek * (delta_cap  / DIV(battery->fcc)) / 10;
+	battery->sm_chrg_dsoc += ydsoc;
+
+	tmp = battery->sm_chrg_dsoc / 1000;
+
+	if (ydsoc > 0) {
+		if (battery->sm_chrg_dsoc < 0)
+			battery->sm_chrg_dsoc = 0;
+
+		tmp = battery->sm_chrg_dsoc / 1000;
+
+		if (tmp != battery->dsoc / 1000) {
+			if (battery->sm_chrg_dsoc < battery->dsoc)
+				return;
+
+			battery->dsoc = battery->sm_chrg_dsoc;
+			if (battery->dsoc <= 0)
+				battery->dsoc = 0;
+		}
+
+		battery->sm_old_cap = battery->remain_cap;
+		if (battery->dsoc / 1000 == battery->rsoc / 1000 &&
+		    battery->sm_linek != CHRG_FULL_K &&
+		    battery->sm_linek != CHRG_TERM_K)
+			battery->sm_linek = 1000;
+	}
+
+	if ((battery->sm_linek == 1000 || battery->dsoc >= 100 * 1000) &&
+	    (chg_st != CHARGE_FINISH)) {
+		if (battery->sm_linek == 1000)
+			battery->dsoc = battery->rsoc;
+		battery->sm_chrg_dsoc = battery->dsoc;
+	}
+}
+
+static void rk817_bat_finish_chrg(struct rk817_battery_device *battery)
+{
+	u32 tgt_sec = 0;
+
+	if (battery->dsoc / 1000 < 100) {
+		tgt_sec = battery->fcc * 3600 / 100 / FINISH_CALI_CURR;
+		if (get_timer(battery->finish_chrg_base) > SECONDS(tgt_sec)) {
+			battery->finish_chrg_base = get_timer(0);
+			battery->dsoc += 1000;
+		}
+	}
+}
+
+static void rk817_bat_debug_info(struct rk817_battery_device *battery)
+{
+	DBG("debug info:\n");
+	DBG("CAL_OFFSET = 0x%x", rk817_bat_read(battery, CAL_OFFSET_H));
+	DBG("%x\n", rk817_bat_read(battery, CAL_OFFSET_L));
+	DBG("current_avg = %d\n", rk817_bat_get_avg_current(battery));
+	DBG("k = %d, b = %d\n", battery->voltage_k, battery->voltage_b);
+	DBG("battery: %d\n", rk817_bat_get_battery_voltage(battery));
+	DBG("voltage_sys = %d\n", rk817_bat_get_sys_voltage(battery));
+	DBG("current_avg = %d\n", rk817_bat_get_avg_current(battery));
+	DBG("dsoc = %d\n", battery->dsoc);
+	DBG("rsoc = %d\n", rk817_bat_get_rsoc(battery));
+	DBG("remain_cap = %d\n", rk817_bat_get_capacity_uah(battery));
+	DBG("fcc = %d\n", battery->fcc);
+	DBG("qmax = %d\n", battery->qmax);
+}
+
+static void rk817_bat_smooth_charge(struct rk817_battery_device *battery)
+{
+	u8 chg_st = rk817_bat_get_charger_type(battery);
+
+	rk817_bat_debug_info(battery);
+	rk817_bat_calibration(battery);
+	/* set terminal charge mode */
+	if (battery->term_sig_base &&
+	    get_timer(battery->term_sig_base) > SECONDS(1))
+		battery->term_sig_base = 0;
+
+	/* not charge mode and not keep in uboot charge: exit */
+	if ((battery->chrg_type == NO_CHARGER) ||
+	    !rk817_bat_is_initialized(battery)) {
+		DBG("chrg=%d\n", battery->chrg_type);
+		rk817_bat_set_initialized_flag(battery);
+		goto out;
+	}
+
+	/* update rsoc and remain cap */
+	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+	battery->rsoc = rk817_bat_get_rsoc(battery);
+	if (battery->remain_cap / 1000 > battery->fcc) {
+		battery->sm_old_cap -=
+			(battery->remain_cap - battery->fcc * 1000);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc + 100);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc);
+	}
+
+	/* finish charge step */
+	if (chg_st == CHARGE_FINISH) {
+		rk817_bat_finish_chrg(battery);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc + 100);
+		rk817_bat_init_coulomb_cap(battery, battery->fcc);
+	} else {
+		DBG("smooth charge step...\n");
+		battery->adc_allow_update = true;
+		battery->finish_chrg_base = get_timer(0);
+		rk817_bat_linek_algorithm(battery);
+	}
+
+	/* dsoc limit */
+	if (battery->dsoc / 1000 > 100)
+		battery->dsoc = 100 * 1000;
+	else if (battery->dsoc < 0)
+		battery->dsoc = 0;
+
+	rk817_bat_save_dsoc(battery, battery->dsoc / 1000);
+	rk817_bat_save_cap(battery, battery->remain_cap / 1000);
+out:
+	return;
+}
+
+static int rk817_bat_update_get_soc(struct udevice *dev)
+{
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+	static ulong seconds;
+
+	/* set charge current */
+	battery->chrg_type =
+		rk817_bat_get_charger_type(battery);
+	rk817_bat_charger_setting(battery, battery->chrg_type);
+
+	/* fg calc every 5 seconds */
+	if (!seconds)
+		seconds = get_timer(0);
+	if (get_timer(seconds) >= SECONDS(5)) {
+		seconds = get_timer(0);
+		rk817_bat_smooth_charge(battery);
+	}
+
+	/* bat exist, fg init success(dts pass) and uboot charge: report data */
+	if (!battery->virtual_power && battery->voltage_k)
+		return battery->dsoc / 1000;
+	else
+		return VIRTUAL_POWER_SOC;
+}
+
+static struct dm_fuel_gauge_ops fg_ops = {
+	.get_soc = rk817_bat_update_get_soc,
+	.get_voltage = rk817_bat_update_get_voltage,
+	.get_current = rk817_bat_update_get_current,
+	.get_chrg_online = rk817_bat_update_get_chrg_online,
+};
+
+static int rk817_fg_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+	const char *prop;
+	int  len, value;
+	int i;
+
+	if (rk8xx->variant != 0x8170) {
+		debug("%s: Not support pmic variant: rk%x\n",
+		      __func__, rk8xx->variant);
+		return -EINVAL;
+	}
+
+	battery->dev = dev;
+
+	/* Parse ocv table */
+	prop = dev_read_prop(dev, "ocv_table", &len);
+	if (!prop) {
+		printf("can't find ocv_table prop\n");
+		return -EINVAL;
+	}
+
+	battery->ocv_table = calloc(len, 1);
+	if (!battery->ocv_table) {
+		printf("can't calloc ocv_table\n");
+		return -ENOMEM;
+	}
+
+	battery->ocv_size = len / 4;
+	if (dev_read_u32_array(dev, "ocv_table",
+			       battery->ocv_table, battery->ocv_size)) {
+		printf("can't read ocv_table\n");
+		free(battery->ocv_table);
+		return -EINVAL;
+	}
+
+	/* Parse neccessay */
+	battery->design_cap = dev_read_u32_default(dev, "design_capacity", -1);
+	if (battery->design_cap < 0) {
+		printf("can't read design_capacity\n");
+		return -EINVAL;
+	}
+
+	battery->qmax = dev_read_u32_default(dev, "design_qmax", -1);
+	if (battery->qmax < 0) {
+		printf("can't read design_qmax\n");
+		return -EINVAL;
+	}
+
+	value = dev_read_u32_default(dev, "sample_res", -1);
+	if (battery->res_div < 0)
+		printf("read sample_res error\n");
+
+	battery->res_div = (value == SAMPLE_RES_20mR) ?
+		       SAMPLE_RES_DIV2 : SAMPLE_RES_DIV1;
+
+	DBG("OCV Value:");
+	for (i = 0; i < battery->ocv_size; i++)
+		DBG("%d  ", battery->ocv_table[i]);
+	DBG("ocvsize: %d\n", battery->ocv_size);
+	DBG("battery->design_cap: %d\n", battery->design_cap);
+	DBG("battery->qmax: %d\n", battery->qmax);
+
+	return 0;
+}
+
+static int rk817_fg_init(struct rk817_battery_device *battery)
+{
+	int value;
+
+	value = rk817_bat_read(battery, GG_CON);
+	rk817_bat_write(battery, GG_CON, value | VOL_OUPUT_INSTANT_MODE);
+
+	rk817_bat_gas_gaugle_enable(battery);
+	rk817_bat_init_voltage_kb(battery);
+	rk817_bat_calibration(battery);
+	rk817_bat_rsoc_init(battery);
+	rk817_bat_init_coulomb_cap(battery, battery->nac);
+	rk817_bat_set_initialized_flag(battery);
+	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+	rk817_bat_calc_linek(battery);
+
+	battery->voltage_avg = rk817_bat_get_battery_voltage(battery);
+	battery->voltage_sys = rk817_bat_get_sys_voltage(battery);
+	battery->voltage_usb = rk817_bat_get_USB_voltage(battery);
+	battery->current_avg = rk817_bat_get_avg_current(battery);
+	battery->current_pwron = rk817_bat_get_pwron_current(battery);
+	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
+	battery->rsoc = rk817_bat_get_rsoc(battery);
+	battery->sm_linek = rk817_bat_calc_linek(battery);
+	battery->finish_chrg_base = get_timer(0);
+	battery->term_sig_base = get_timer(0);
+
+	battery->dbg_pwr_dsoc = battery->dsoc;
+	battery->dbg_pwr_rsoc = battery->rsoc;
+	battery->dbg_pwr_vol = battery->voltage_avg;
+
+	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+	DBG("chrg onle: %d\n", rk817_bat_dwc_otg_check_dpdm());
+
+	DBG("voltage_k = %d, voltage_b = %d\n",
+	    battery->voltage_k, battery->voltage_b);
+	DBG("voltage_sys = %d\n", battery->voltage_sys);
+	DBG("voltage usb: %d\n", battery->voltage_avg);
+	DBG("battery: %d\n", battery->voltage_avg);
+	DBG("current_avg = %d\n", battery->current_avg);
+	DBG("current_pwron = %d\n", battery->current_pwron);
+	DBG("remain_cap = %d\n", battery->remain_cap);
+	DBG("fcc = %d\n", battery->fcc);
+	DBG("qmax = %d\n", battery->qmax);
+	DBG("dsoc = %d\n", battery->dsoc);
+	DBG("rsoc = %d\n", battery->rsoc);
+
+	return 0;
+}
+
+static int rk817_fg_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	struct rk817_battery_device *battery = dev_get_priv(dev);
+
+	if (priv->variant != 0x8170) {
+		debug("Not support pmic variant: rk%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	return rk817_fg_init(battery);
+}
+
+U_BOOT_DRIVER(rk817_fg) = {
+	.name = "rk817_fg",
+	.id = UCLASS_FG,
+	.probe = rk817_fg_probe,
+	.ops = &fg_ops,
+	.ofdata_to_platdata = rk817_fg_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rk817_battery_device),
+};

commit 28722b7d183dce04f1b906c03ef636ac725a66fc
Author: Huibin Hong <huibin.hong@rock-chips.com>
Date:   Tue Feb 27 11:51:11 2018 +0800

    rockchip: dts: rk3328: enable uart rx pull up
    
    Change-Id: I85653ed9d52865250703ff559e3da67f0cec68ee
    Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 5b5a837536..5f7542bd9a 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -766,7 +766,7 @@
 			uart0_xfer: uart0-xfer {
 				rockchip,pins =
 					<1 9 RK_FUNC_1 &pcfg_pull_up>,
-					<1 8 RK_FUNC_1 &pcfg_pull_none>;
+					<1 8 RK_FUNC_1 &pcfg_pull_up>;
 			};
 
 			uart0_cts: uart0-cts {
@@ -789,7 +789,7 @@
 			uart1_xfer: uart1-xfer {
 				rockchip,pins =
 					<3 4 RK_FUNC_4 &pcfg_pull_up>,
-					<3 6 RK_FUNC_4 &pcfg_pull_none>;
+					<3 6 RK_FUNC_4 &pcfg_pull_up>;
 			};
 
 			uart1_cts: uart1-cts {
@@ -812,7 +812,7 @@
 			uart2m0_xfer: uart2m0-xfer {
 				rockchip,pins =
 					<1 0 RK_FUNC_2 &pcfg_pull_up>,
-					<1 1 RK_FUNC_2 &pcfg_pull_none>;
+					<1 1 RK_FUNC_2 &pcfg_pull_up>;
 			};
 		};
 
@@ -820,7 +820,7 @@
 			uart2m1_xfer: uart2m1-xfer {
 				rockchip,pins =
 					<2 0 RK_FUNC_1 &pcfg_pull_up>,
-					<2 1 RK_FUNC_1 &pcfg_pull_none>;
+					<2 1 RK_FUNC_1 &pcfg_pull_up>;
 			};
 		};
 

commit 2e3f27707f96f88d4498d80756b79a3d2d831fed
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Mar 5 08:58:28 2018 +0800

    board_f: print relocation offset
    
    actually that relocation takes some troubls for our debug,
    print relocation offset can help a lot.
    
    Change-Id: Ib15d6111930fda8e8cdfab505d977aaf1da934b2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/board_f.c b/common/board_f.c
index e46eceda7d..f76f7da756 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -628,7 +628,7 @@ static int setup_reloc(void)
 #endif
 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 
-	debug("Relocation Offset is: %08lx\n", gd->reloc_off);
+	printf("Relocation Offset is: %08lx\n", gd->reloc_off);
 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 	      gd->start_addr_sp);

commit ba8f56d9f15abd8e64f88944dd926ee84ce6fba8
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Sun Feb 25 11:27:00 2018 +0800

    lib: optee_client: remove printf log
    
    Change-Id: Ie0b41b309544e36c7c39863339bf5888e0683dcb
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index f32633a7ba..3072381391 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -136,15 +136,15 @@ TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy(uuid, (void *)&TeeSmc32Param[0].u.value, 16);
 	for (i = 0; i < 16; i++)
-		printf("uuid 0x%x", uuid[i]);
+		debug("uuid 0x%x", uuid[i]);
 
 	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
-		printf("return size of TA, keymaster_size = 0x%x", keymaster_size);
+		debug("return size of TA, keymaster_size = 0x%x", keymaster_size);
 		TeeSmc32Param[1].u.memref.size = keymaster_size;
 	} else {
 		memcpy((void *)TeeSmc32Param[1].u.memref.buf_ptr,
 			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
-		printf("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
+		debug("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
 			TeeSmc32Param[1].u.memref.buf_ptr,
 			TeeSmc32Param[1].u.memref.size);
 	}
@@ -520,7 +520,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
 #endif
 #ifdef CONFIG_OPTEE_V2
-		printf("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
+		debug("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
 		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
 		ArmSmcArgs->Arg1 = 0;
@@ -561,7 +561,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 #ifdef CONFIG_OPTEE_V2
 		t_teesmc32_arg *TeeSmc32Arg =
 			(t_teesmc32_arg *)((size_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
-		printf("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
+		debug("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
 #endif
 		switch (TeeSmc32Arg->cmd) {
 #ifdef CONFIG_OPTEE_V1
@@ -601,7 +601,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			uint32_t tempaddr;
 			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
 			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
-			printf("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
+			debug("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
 			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
 			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
 			TeeSmc32Arg->params[0].u.memref.size = allocsize;
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
index 0e619e2cf0..2985cb7e8d 100644
--- a/lib/optee_clientApi/OpteeClientRkFs.c
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -169,12 +169,12 @@ static int rkss_read_section(struct rk_secure_storage *rkss)
 
 	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("%s: Could not find device\n", __func__);
+		debug("%s: Could not find device\n", __func__);
 		return -1;
 	}
 
 	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
-		printf("Could not find security partition\n");
+		debug("Could not find security partition\n");
 		return -1;
 	}
 	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
@@ -1199,7 +1199,7 @@ int tee_supp_rk_fs_init(void)
 		int ret = rkss_read_section(&rkss);
 		if (ret < 0)
 		{
-			printf("rkss_read_section fail ! ret: %d.", ret);
+			debug("rkss_read_section fail ! ret: %d.", ret);
 			return -1;
 		}
 		if (rkss_verify_ptable(&rkss) < 0)

commit e559407d6e801933e38737edce2f0e637aa647a5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Mar 1 11:54:36 2018 +0800

    drm/rockchip: add version control for uboot drm driver
    
    Add basic version for rockchip UBOOT DRM driver
    
    Change-Id: Ia1b3862bce75f68e1bf9919cad285ba141492b01
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 70fd3fd25a..39c0e0745c 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -31,6 +31,15 @@
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
 
+#define DRIVER_VERSION	"v1.0.0"
+
+/***********************************************************************
+ *  Rockchip UBOOT DRM driver version
+ *
+ *  v1.0.0	: add basic version for rockchip drm driver(hjc)
+ *
+ **********************************************************************/
+
 #define RK_BLK_SIZE 512
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -456,6 +465,8 @@ static int display_init(struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
 
+	printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
+
 	if (state->is_init)
 		return 0;
 

commit 06bb018f670dd76518bd8f397195597898667a92
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Mar 1 10:58:33 2018 +0800

    drm/rockchip: rk3288 vop: identify vop lit and vop big
    
    most of rk3288 vop lit is same with vop big, but some feature is
    different, just like max output resolution.
    
    vop big max output: 3840*2160
    vop lit max ougput: 2560*1600
    
    Change-Id: Ic154d68c1ef53fd54fc61959078f43f789f28215
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 350c0fa24b..28c2eb4a78 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -32,9 +32,14 @@ static const struct rockchip_crtc px30_vop_big_data = {
 	.data = &px30_vop_big,
 };
 
-static const struct rockchip_crtc rk3288_vop_data = {
+static const struct rockchip_crtc rk3288_vop_big_data = {
 	.funcs = &rockchip_vop_funcs,
-	.data = &rk3288_vop,
+	.data = &rk3288_vop_big,
+};
+
+static const struct rockchip_crtc rk3288_vop_lit_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3288_vop_lit,
 };
 
 static const struct rockchip_crtc rk3368_vop_data = {
@@ -81,8 +86,11 @@ static const struct udevice_id rockchip_vop_ids[] = {
 		.compatible = "rockchip,px30-vop-big",
 		.data = (ulong)&px30_vop_big_data,
 	}, {
-		.compatible = "rockchip,rk3288-vop",
-		.data = (ulong)&rk3288_vop_data,
+		.compatible = "rockchip,rk3288-vop-big",
+		.data = (ulong)&rk3288_vop_big_data,
+	}, {
+		.compatible = "rockchip,rk3288-vop-lit",
+		.data = (ulong)&rk3288_vop_lit_data,
 	}, {
 		.compatible = "rockchip,rk3368-vop",
 		.data = (ulong)&rk3368_vop_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 7d23f7d1c4..613eaea0f8 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -28,7 +28,8 @@ extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
 extern const struct vop_data rk3036_vop;
 extern const struct vop_data px30_vop_lit;
 extern const struct vop_data px30_vop_big;
-extern const struct vop_data rk3288_vop;
+extern const struct vop_data rk3288_vop_big;
+extern const struct vop_data rk3288_vop_lit;
 extern const struct vop_data rk3368_vop;
 extern const struct vop_data rk3366_vop;
 extern const struct vop_data rk3399_vop_big;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b4f6b02ca2..436cc3e35f 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -161,7 +161,7 @@ static const struct vop_line_flag rk3288_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
 };
 
-const struct vop_data rk3288_vop = {
+const struct vop_data rk3288_vop_big = {
 	.version = VOP_VERSION(3, 1),
 	.max_output = {3840, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
@@ -171,6 +171,16 @@ const struct vop_data rk3288_vop = {
 	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
 };
 
+const struct vop_data rk3288_vop_lit = {
+	.version = VOP_VERSION(3, 1),
+	.max_output = {2560, 1600},
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3288_vop_line_flag,
+	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
+};
+
 static const struct vop_line_flag rk3368_vop_line_flag = {
 	.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
 	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),

commit 2735489a3ec3356631a8d26fd6c269e9f65df8c7
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Sat Feb 24 08:57:40 2018 +0800

    drm/rockchip: rk3328 vop: add support 4096 output
    
    add max_output to identify vop max output resolution.
    
    Change-Id: I3d6f0f63a09d6b6f728aeb52cd821bf82bfcf4f8
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index f84d55317d..f8c0bd79b9 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -214,6 +214,7 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->ctrl = vop_data->ctrl;
 	vop->line_flag = vop_data->line_flag;
 	vop->version = vop_data->version;
+	vop->max_output = vop_data->max_output;
 
 	/*
 	 * TODO:
@@ -461,8 +462,9 @@ static void scl_vop_cal_scl_fac(struct vop *vop,
 	if (!vop->win->scl)
 		return;
 
-	if (dst_w > 3840) {
-		printf("Maximum destination width (3840) exceeded\n");
+	if (dst_w > vop->max_output.width) {
+		printf("Maximum destination width %d exceeded\n",
+		       vop->max_output.width);
 		return;
 	}
 
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 10b433a163..0ab9d52e8c 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -16,11 +16,10 @@
 #define VOP_MINOR(version) 	((version) & 0xff)
 
 #define VOP_REG_SUPPORT(vop, reg) \
-		(reg.mask && \
-		 (!reg.major || \
-		  (reg.major == VOP_MAJOR(vop->version) && \
-		   reg.begin_minor <= VOP_MINOR(vop->version) && \
-		   reg.end_minor >= VOP_MINOR(vop->version))))
+		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
+		reg.begin_minor <= VOP_MINOR(vop->version) && \
+		reg.end_minor >= VOP_MINOR(vop->version) && \
+		reg.mask))
 
 #define VOP_WIN_SUPPORT(vop, win, name) \
 		VOP_REG_SUPPORT(vop, win->name)
@@ -413,6 +412,11 @@ struct vop_line_flag {
 	struct vop_reg line_flag_num[2];
 };
 
+struct vop_rect {
+	int width;
+	int height;
+};
+
 #define VOP_FEATURE_OUTPUT_10BIT	BIT(0)
 
 struct vop_data {
@@ -423,6 +427,7 @@ struct vop_data {
 	int win_offset;
 	int reg_len;
 	u64 feature;
+	struct vop_rect max_output;
 };
 
 struct vop {
@@ -434,6 +439,7 @@ struct vop {
 	const struct vop_win *win;
 	const struct vop_line_flag *line_flag;
 	int win_offset;
+	struct vop_rect max_output;
 };
 
 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v)
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 57a94f0d9f..b4f6b02ca2 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -163,6 +163,7 @@ static const struct vop_line_flag rk3288_vop_line_flag = {
 
 const struct vop_data rk3288_vop = {
 	.version = VOP_VERSION(3, 1),
+	.max_output = {3840, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -177,6 +178,7 @@ static const struct vop_line_flag rk3368_vop_line_flag = {
 
 const struct vop_data rk3368_vop = {
 	.version = VOP_VERSION(3, 2),
+	.max_output = {4096, 2160},
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3368_vop_line_flag,
@@ -190,6 +192,7 @@ static const struct vop_line_flag rk3366_vop_line_flag = {
 
 const struct vop_data rk3366_vop = {
 	.version = VOP_VERSION(3, 4),
+	.max_output = {4096, 2160},
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
@@ -198,6 +201,7 @@ const struct vop_data rk3366_vop = {
 
 const struct vop_data rk3399_vop_big = {
 	.version = VOP_VERSION(3, 5),
+	.max_output = {4096, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -207,6 +211,7 @@ const struct vop_data rk3399_vop_big = {
 
 const struct vop_data rk3399_vop_lit = {
 	.version = VOP_VERSION(3, 6),
+	.max_output = {2560, 1600},
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
 	.line_flag = &rk3366_vop_line_flag,
@@ -215,6 +220,7 @@ const struct vop_data rk3399_vop_lit = {
 
 const struct vop_data rk322x_vop = {
 	.version = VOP_VERSION(3, 7),
+	.max_output = {4096, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3288_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -304,6 +310,7 @@ static const struct vop_line_flag rk3328_vop_line_flag = {
 
 const struct vop_data rk3328_vop = {
 	.version = VOP_VERSION(3, 8),
+	.max_output = {4096, 2160},
 	.feature = VOP_FEATURE_OUTPUT_10BIT,
 	.ctrl = &rk3328_ctrl_data,
 	.win = &rk3288_win01_data,
@@ -354,6 +361,7 @@ static const struct vop_line_flag rk3036_vop_line_flag = {
 
 const struct vop_data rk3036_vop = {
 	.version = VOP_VERSION(2, 2),
+	.max_output = {1920, 1080},
 	.ctrl = &rk3036_ctrl_data,
 	.win = &rk3036_win0_data,
 	.line_flag = &rk3036_vop_line_flag,
@@ -469,6 +477,7 @@ static const struct vop_line_flag rk3366_vop_lite_line_flag = {
 
 const struct vop_data px30_vop_lit = {
 	.version = VOP_VERSION(2, 5),
+	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
 	.win = &rk3366_win1_data,
 	.line_flag = &rk3366_vop_lite_line_flag,
@@ -477,6 +486,7 @@ const struct vop_data px30_vop_lit = {
 
 const struct vop_data px30_vop_big = {
 	.version = VOP_VERSION(2, 6),
+	.max_output = {1920, 1080},
 	.ctrl = &px30_ctrl_data,
 	.win = &rk3366_win0_data,
 	.line_flag = &rk3366_vop_lite_line_flag,

commit 419dcb5b07e357d38613a7afb94abbece7254b8b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Mar 1 18:09:15 2018 +0800

    rockchip: move display dtb fixup to bootm
    
    Change-Id: I25102790fa6330c7b3ce3f9904e250944083c5ca
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index a70c0087a0..c0be8040d6 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -22,6 +22,9 @@
 #endif
 #include <asm/psci.h>
 #include <asm/spin_table.h>
+#ifdef CONFIG_DRM_ROCKCHIP
+#include <video_rockchip.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -75,7 +78,9 @@ int arch_fixup_fdt(void *blob)
 		return ret;
 #endif
 #endif
-
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_display_fixup((void *)gd->fdt_blob);
+#endif
 #ifdef CONFIG_FMAN_ENET
 	ret = fdt_update_ethernet_dt(blob);
 	if (ret)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6513069509..b1521e88b5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -96,7 +96,6 @@ int board_late_init(void)
 
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
-	rockchip_display_fixup((void *)gd->fdt_blob);
 #endif
 
 	return rk_board_late_init();

commit 8fc5ae065cee12498594832519486c153d0e77f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:24:53 2018 +0800

    power: charge_animation: move out delay
    
    Change-Id: Ic46f9ba23fc8e9e3b41e8fc8118a29ecdc00de8f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 65a1c67133..935d3941de 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -100,11 +100,6 @@ static int check_key_press(void)
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
-	if (state == KEY_PRESS_LONG_DOWN)
-		printf("power key long pressed...\n");
-	else if (state == KEY_PRESS_DOWN)
-		printf("power key short pressed...\n");
-
 	return state;
 }
 
@@ -139,17 +134,17 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 		local_irq_enable();
 		putc('1');
 		putc('\n');
-
-		/*
-		 * We must wait for key release event finish, otherwise
-		 * we may read key state too early.
-		 */
-		mdelay(300);
 	} else {
 		printf("\nWfi\n");
 		wfi();
 	}
 
+	/*
+	 * We must wait for key release event finish, otherwise
+	 * we may read key state too early.
+	 */
+	mdelay(300);
+
 	return 0;
 }
 

commit 9cacbc789960a1cc288bdc7ea6df67e4517965ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:23:56 2018 +0800

    input: rk8xx: drivers/input/rk8xx_pwrkey.c
    
    Change-Id: I920b761825f2f3114d38b17fa377bcb19e88bb18
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 80f7cd9cf4..3f10a2c3cb 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -104,38 +104,11 @@ static struct reg_data rk805_init_reg[] = {
 static int rk8xx_pwrkey_read(struct udevice *dev, int code)
 {
 	struct input_key *key = dev_get_platdata(dev);
-	u32 report = KEY_NOT_EXIST;
 
 	if (key->code != code)
-		goto out;
-
-	debug("%s: long key ms: %llu\n",
-	      __func__, key->up_t - key->down_t);
-
-	if ((key->up_t > key->down_t) &&
-	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("'%s' key long pressed down\n", key->name);
-	} else if (key->down_t &&
-		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		report = KEY_PRESS_LONG_DOWN;
-		printf("'%s' key long pressed down(hold)\n", key->name);
-	} else if ((key->up_t > key->down_t) &&
-		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
-		key->up_t = 0;
-		key->down_t = 0;
-		report = KEY_PRESS_DOWN;
-		printf("'%s' key pressed down\n", key->name);
-	} else {
-		report = KEY_PRESS_NONE;
-	}
+		return KEY_NOT_EXIST;
 
-out:
-	return report;
+	return key_parse_gpio_event(key);
 }
 
 static void pwrkey_irq_handler(int irq, void *data)
@@ -215,7 +188,7 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 		return ret;
 	}
 
-	key->name = "pwrkey";
+	key->name = "power";
 	key->code = KEY_POWER;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
 	irq_install_handler(irq, pwrkey_irq_handler, dev);

commit d7a503edb0196cb36b51ae12ba374057ae0cbf96
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:23:40 2018 +0800

    input: gpio_key: use dm universal interface to parse event
    
    Change-Id: Ic3b7fca99be30ab7b1bb8a37fd54b603c1da223a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
index f14eec9a40..9bf124d0f2 100644
--- a/drivers/input/gpio_key.c
+++ b/drivers/input/gpio_key.c
@@ -110,33 +110,8 @@ static int gpio_key_read(struct udevice *dev, int code)
 	for (i = 0; i < priv->key_nr; i++) {
 		if (key[i].code != code)
 			continue;
-
-		debug("%s: long key ms: %llu, up=%llu, down=%llu\n",
-		      key[i].name, key[i].up_t - key[i].down_t,
-		      key[i].up_t, key[i].down_t);
-
-		if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
-		    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
-			key[i].up_t = 0;
-			key[i].down_t = 0;
-			report = KEY_PRESS_LONG_DOWN;
-			printf("'%s' key long pressed down\n", key[i].name);
-		} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
-			   KEY_LONG_DOWN_MS) {
-			key[i].up_t = 0;
-			key[i].down_t = 0;
-			report = KEY_PRESS_LONG_DOWN;
-			printf("'%s' key long pressed down(hold)\n",
-			       key[i].name);
-		} else if ((key[i].up_t > key[i].down_t) &&
-			   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
-			key[i].up_t = 0;
-			key[i].down_t = 0;
-			report = KEY_PRESS_DOWN;
-			printf("'%s' key pressed down\n", key[i].name);
-		} else {
-			report = KEY_PRESS_NONE;
-		}
+		report = key_parse_gpio_event(key[i]);
+		break;
 	}
 
 	return report;

commit 6cef563abc2a66e021c7c03460e02a62ba5eeaee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:22:38 2018 +0800

    input: rk_key: use dm universal interface to parse event
    
    Change-Id: I80c7a75a4150f1a8ebbf3d70541aa737cd687f91
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
index 1f68872ae1..bc127c6841 100644
--- a/drivers/input/rk_key.c
+++ b/drivers/input/rk_key.c
@@ -149,52 +149,12 @@ static int rk_keys_read(struct udevice *dev, int code)
 				printf("%s: failed to read saradc\n",
 				       key[i].name);
 			} else {
-				/* Get min, max */
-				max = key[i].value + key[i].margin;
-				if (key[i].value > key[i].margin)
-					min = key[i].value - key[i].margin;
-				else
-					min = key[i].value;
-
-				/* Check */
-				if ((adcval <= max) && (adcval >= min)) {
-					report = KEY_PRESS_DOWN;
-					printf("'%s' key pressed down\n",
-					       key[i].name);
-				} else {
-					report = KEY_PRESS_NONE;
-				}
+				report = key_parse_adc_event(key[i], adcval);
 			}
-			break;
 		} else {
-			debug("%s: ms: %llu, up=%llu, down=%llu\n",
-			      key[i].name, key[i].up_t - key[i].down_t,
-			      key[i].up_t, key[i].down_t);
-
-			if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
-			    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
-				key[i].up_t = 0;
-				key[i].down_t = 0;
-				report = KEY_PRESS_LONG_DOWN;
-				printf("'%s' key long pressed down\n",
-				       key[i].name);
-			} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
-				   KEY_LONG_DOWN_MS) {
-				key[i].up_t = 0;
-				key[i].down_t = 0;
-				report = KEY_PRESS_LONG_DOWN;
-				printf("'%s' key long pressed down(hold)\n",
-				       key[i].name);
-			} else if ((key[i].up_t > key[i].down_t) &&
-				   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
-				key[i].up_t = 0;
-				key[i].down_t = 0;
-				report = KEY_PRESS_DOWN;
-				printf("'%s' key pressed down\n", key[i].name);
-			} else {
-				report = KEY_PRESS_NONE;
-			}
+			report = key_parse_gpio_event(key[i]);
 		}
+		break;
 	}
 
 	return report;

commit 3fb8400061cb87ff97a6d26dec8b33728867ebb5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 28 14:21:44 2018 +0800

    dm: key: add universal interface to parse gpio and adc key event
    
    Change-Id: I9a1b9d0a36d8fe34ea68bb4f15bf217cae407bf0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 4a437c920e..21e25f63a0 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -45,6 +45,72 @@ static int key_read(struct udevice *dev, int code)
 	return ops->read(dev, code);
 }
 
+int key_parse_adc_event(struct input_key *key, unsigned int adcval)
+{
+	int report = KEY_NOT_EXIST;
+	int max, min;
+
+	debug("%s: %s: max=%d, min=%d, adcval=%d\n",
+	      __func__, key->name, max, min, adcval);
+
+	/* Get min, max */
+	max = key->value + key->margin;
+	if (key->value > key->margin)
+		min = key->value - key->margin;
+	else
+		min = key->value;
+
+	/* Check */
+	if ((adcval <= max) && (adcval >= min)) {
+		report = KEY_PRESS_DOWN;
+		printf("%s key pressed..\n", key->name);
+	} else {
+		report = KEY_PRESS_NONE;
+	}
+
+	return report;
+}
+
+int key_parse_gpio_event(struct input_key *key)
+{
+	u32 report = KEY_NOT_EXIST;
+
+	debug("%s: %s: up=%llu, down=%llu, delta=%llu\n",
+	      __func__, key->name, key->up_t, key->down_t,
+	      key->up_t - key->down_t);
+
+	/* Possible this is machine power-on long pressed, so ignore this */
+	if (key->down_t == 0 && key->up_t != 0) {
+		report = KEY_PRESS_NONE;
+		goto out;
+	}
+
+	if ((key->up_t > key->down_t) &&
+	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+		printf("%s key long pressed(hold)..\n", key->name);
+	} else if (key->down_t &&
+		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+		printf("%s key long pressed..\n", key->name);
+	} else if ((key->up_t > key->down_t) &&
+		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
+		report = KEY_PRESS_DOWN;
+		printf("%s key short pressed..\n", key->name);
+	} else {
+		report = KEY_PRESS_NONE;
+	}
+
+out:
+	return report;
+}
+
 int platform_key_read(int code)
 {
 	struct udevice *dev;
diff --git a/include/key.h b/include/key.h
index 911804dd08..b7b8672bc8 100644
--- a/include/key.h
+++ b/include/key.h
@@ -41,4 +41,8 @@ struct input_key {
 uint64_t key_get_timer(uint64_t base);
 int platform_key_read(int code);
 
+/* General interface for adc or gpio interrupt key event parse */
+int key_parse_gpio_event(struct input_key *key);
+int key_parse_adc_event(struct input_key *key, unsigned int adcval);
+
 #endif

commit 459102b8a584fd95df0d9bf06f3cf21286f8d5a9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Thu Mar 1 09:07:58 2018 +0800

    video/drm: dsi: use of_alias_get_id() to get id
    
    Change-Id: I82f9081a35daea6841dc6273f4f4a4e5141dfe79
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 406257ee3a..4cd967fccd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -939,7 +939,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
 	ofnode panel;
-	static int id = 0;
+	int id;
 	int ret;
 
 	dsi = malloc(sizeof(*dsi));
@@ -955,8 +955,12 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 		return -ENXIO;
 	}
 
+	id = of_alias_get_id(ofnode_to_np(mipi_node), "dsi");
+	if (id < 0)
+		id = 0;
+
 	dsi->pdata = pdata;
-	dsi->id = id++;
+	dsi->id = id;
 	dsi->blob = state->blob;
 	dsi->node = mipi_node;
 	conn_state->private = dsi;

commit 64e1e04c21d7356332ffe862145d38d399f1a816
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 27 17:03:31 2018 +0800

    fastboot: support rknand device
    
    Use rockchip_get_bootdev() to get dev_desc.
    
    Change-Id: I127d5418f65db42d93930283348bb4072447012f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 0a3c780ae3..48ec1cf0d9 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -15,7 +15,9 @@
 #include <div64.h>
 #include <linux/compat.h>
 #include <android_image.h>
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
+#include <boot_rkimg.h>
+#endif
 /*
  * FIXME: Ensure we always set these names via Kconfig once xxx_PARTITION is
  * migrated
@@ -297,8 +299,11 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 	u64 disksize = 0;
 	char reason[128] = {0};
 #endif
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	dev_desc = rockchip_get_bootdev();
+#else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+#endif
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		pr_err("invalid mmc device\n");
 		fastboot_fail("invalid mmc device", response);
@@ -405,7 +410,11 @@ void fb_mmc_erase(const char *cmd, char *response)
 		return;
 	}
 
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	dev_desc = rockchip_get_bootdev();
+#else
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
+#endif
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		pr_err("invalid mmc device");
 		fastboot_fail("invalid mmc device", response);

commit bebadd87fbcde9bd18db45172cbab9abd9c29217
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 28 09:23:00 2018 +0800

    phy: phy-rockchip-inno-usb2: fix the wrong charger type
    
    The wrong type of charger was reported when there was not usb-cable
    plugged in. This change adds USB-Vbus status checking before do charge
    detection to fix it.
    
    Change-Id: I5e35414d40fdfe8d07ab2aa0771490e86a97e248
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 6d784b66c2..9cfd2c0077 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -265,6 +265,12 @@ int rockchip_chg_get_type(void)
 	base = get_reg_base(rphy);
 	port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
+	/* Check USB-Vbus status first */
+	if (!property_enabled(base, &port_cfg->utmi_bvalid)) {
+		pr_info("%s: no charger found\n", __func__);
+		return POWER_SUPPLY_TYPE_UNKNOWN;
+	}
+
 	/* Suspend USB-PHY and put the controller in non-driving mode */
 	property_enable(base, &port_cfg->phy_sus, true);
 	property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);

commit 57ab23a62c097a7ca5317e3c7d0ec303379642a7
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Feb 27 11:44:27 2018 +0800

    rockchip: boot_mode: add usb-vbus detect support
    
    Checked the usb-vbus status after the download key had been pressed in
    case of there was no usb-cable plugged in PC.
    
    Change-Id: Iece797be68f0f3094f3137e4c90a53000fb9ffe2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f88a14b3d0..a0c4919611 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -12,6 +12,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <boot_rkimg.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -82,7 +83,7 @@ void devtype_num_envset(void)
 
 void rockchip_dnl_mode_check(void)
 {
-	if (rockchip_dnl_key_pressed()) {
+	if (rockchip_dnl_key_pressed() && rockchip_u2phy_vbus_detect()) {
 		printf("download key pressed, entering download mode...\n");
 		/* If failed, we fall back to bootrom download mode */
 		run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 09afed66c6..6d784b66c2 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -342,6 +342,11 @@ out:
 	return chg_type;
 }
 
+int rockchip_u2phy_vbus_detect(void)
+{
+	return (rockchip_chg_get_type() == POWER_SUPPLY_TYPE_USB) ? 1 : 0;
+}
+
 void otg_phy_init(struct dwc2_udc *dev)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
diff --git a/include/linux/usb/phy-rockchip-inno-usb2.h b/include/linux/usb/phy-rockchip-inno-usb2.h
index d56c9ff6c1..a44c00433d 100644
--- a/include/linux/usb/phy-rockchip-inno-usb2.h
+++ b/include/linux/usb/phy-rockchip-inno-usb2.h
@@ -9,4 +9,13 @@
 
 extern int rockchip_chg_get_type(void);
 
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+int rockchip_u2phy_vbus_detect(void);
+#else
+static inline int rockchip_u2phy_vbus_detect(void)
+{
+	return -ENOSYS;
+}
+#endif
+
 #endif /* _PHY_ROCKCHIP_INNO_USB2_H */

commit 620af6a373c793320f2a27dfb1c4335891d5ab76
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Feb 28 09:42:29 2018 +0800

    drm/rockchip: vop: update ymirror support
    
    some vop unsupport ymirror, the yaddr calc is wrong.
    
    Change-Id: I4b95eb21d16ffa14a4db484b7a45856ceb19425d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 7eb2276cec..f84d55317d 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -572,8 +572,12 @@ static int rockchip_vop_set_plane(struct display_state *state)
 	dsp_sty = crtc_y + mode->vtotal - mode->vsync_start;
 	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
 
-	if (crtc_state->ymirror)
-		crtc_state->dma_addr += (src_h - 1) * xvir * 4;
+	if (crtc_state->ymirror) {
+		if (VOP_WIN_SUPPORT(vop, vop->win, ymirror))
+			crtc_state->dma_addr += (src_h - 1) * xvir * 4;
+		else
+			crtc_state->ymirror = 0;
+	}
 	VOP_WIN_SET(vop, ymirror, crtc_state->ymirror);
 	VOP_WIN_SET(vop, format, crtc_state->format);
 	VOP_WIN_SET(vop, yrgb_vir, xvir);
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 5c3caded05..10b433a163 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -16,13 +16,14 @@
 #define VOP_MINOR(version) 	((version) & 0xff)
 
 #define VOP_REG_SUPPORT(vop, reg) \
-		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
-		reg.begin_minor <= VOP_MINOR(vop->version) && \
-		reg.end_minor >= VOP_MINOR(vop->version) && \
-		reg.mask))
+		(reg.mask && \
+		 (!reg.major || \
+		  (reg.major == VOP_MAJOR(vop->version) && \
+		   reg.begin_minor <= VOP_MINOR(vop->version) && \
+		   reg.end_minor >= VOP_MINOR(vop->version))))
 
 #define VOP_WIN_SUPPORT(vop, win, name) \
-		VOP_REG_SUPPORT(vop, win->phy->name)
+		VOP_REG_SUPPORT(vop, win->name)
 
 #define VOP_CTRL_SUPPORT(vop, name) \
 		VOP_REG_SUPPORT(vop, vop->ctrl->name)

commit 60efa98282ba68b2dccb4e7570144c05dbf7c375
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:20:01 2018 +0800

    rockchip: add evb-rk3326 support
    
    Change-Id: Ic224db95452c9d2e6108dc93ec81018a6718f607
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3326-evb.dts b/arch/arm/dts/rk3326-evb.dts
new file mode 100644
index 0000000000..93504616ac
--- /dev/null
+++ b/arch/arm/dts/rk3326-evb.dts
@@ -0,0 +1,419 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+#include "px30-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3126 EVB";
+	compatible = "rockchip,rk3326-evb", "rockchip,rk3326";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,px30-dmc", "syscon";
+		reg = <0x0 0xff2a0000 0x0 0x1000>;
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <170000>;
+		};
+
+		home-key {
+			linux,code = <KEY_HOME>;
+			label = "home";
+			press-threshold-microvolt = <254000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_MENU>;
+			label = "menu";
+			press-threshold-microvolt = <414000>;
+		};
+
+		esc-key {
+			linux,code = <KEY_ESC>;
+			label = "esc";
+			press-threshold-microvolt = <614000>;
+		};
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
+};
+
+
+&i2c0 {
+	status = "okay";
+
+	rk817: pmic@20 {
+		compatible = "rockchip,rk817";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vccsys>;
+		vcc2-supply = <&vccsys>;
+		vcc3-supply = <&vccsys>;
+		vcc4-supply = <&vccsys>;
+		vcc5-supply = <&vccsys>;
+		vcc6-supply = <&vccsys>;
+		vcc7-supply = <&vcc_3v0>;
+		vcc8-supply = <&vccsys>;
+		vcc9-supply = <&dcdc_boost>;
+
+		vccsys: vccsys{
+			compatible = "regulator-fixed";
+			regulator-name = "vcc3v8_sys";
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-min-microvolt = <3800000>;
+			regulator-max-microvolt = <3800000>;
+		};
+
+		rk817_pin0_ts: rk817_pin0_ts {
+			pins = "gpio0";
+			function = "pin_fun0";
+		};
+
+		rk817_pin0_gpio: rk817_pin0_gpio {
+			pins = "gpio0";
+			function = "gpio";
+		};
+
+		rk817_pin1_gt: rk817_pin1_gt {
+			pins = "gpio1";
+			function = "pin_fun0";
+		};
+
+		rk817_pin1_gpio: rk817_pin1_gpio {
+			pins = "gpio1";
+			function = "gpio";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		regulators {
+			vdd_arm: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <700000>;
+				};
+			};
+
+			vdd_logic: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <800000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_ddr";
+					regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc2v5_ddr: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-name = "vcc2v5_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2500000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+			regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			dcdc_boost: BOOST {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <4700000>;
+				regulator-max-microvolt = <5400000>;
+				regulator-name = "boost";
+			};
+
+			otg_switch: OTG_SWITCH {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "otg_switch";
+			};
+		};
+
+		battery {
+			compatible = "rk817,battery";
+			ocv_table = <3500 3625 3685 3697 3718 3735 3748
+						3760 3774 3788 3802 3816 3834 3853
+						3877 3908 3946 3975 4018 4071 4106>;
+			design_capacity = <2500>;
+			design_qmax = <2750>;
+			bat_res = <100>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			sample_res = <10>;
+			virtual_power = <1>;
+		};
+
+		charger {
+			compatible = "rk817,charger";
+			min_input_voltage = <4500>;
+			max_input_current = <1500>;
+			max_chrg_current = <1300>;
+			max_chrg_voltage = <4200>;
+			chrg_term_mode = <1>;
+			chrg_finish_cur = <300>;
+			virtual_power = <0>;
+			dc_det_adc = <0>;
+		};
+	};
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&saradc {
+	status = "okay";
+};
+
+&pinctrl {
+	pmic {
+	pmic_int: pmic_int {
+		rockchip,pins =
+			<0 7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
diff --git a/configs/evb-rk3326_defconfig b/configs/evb-rk3326_defconfig
new file mode 100644
index 0000000000..8d394357f6
--- /dev/null
+++ b/configs/evb-rk3326_defconfig
@@ -0,0 +1,88 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_ROCKCHIP_RK3326=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3326-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=0
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_RKPARM_PARTITION=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y

commit 0d9749497752f11984882c6095d52901ff09a75c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:17:30 2018 +0800

    rockchip: chip info: update RK3326 and PX30
    
    PX30 uses "PX30" and RK3326 uses "RK3326".
    
    Change-Id: I80dd716265214b754bf368d658721f5b2ae271c8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index bb6083bf90..99597663b8 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -48,8 +48,16 @@ int rockchip_get_chip_info(unsigned int chip_info[])
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 	chip_info[0] = 0x33333043;
 	chip_info[3] = 0x56313030;
+
+/*
+ * Must check CONFIG_ROCKCHIP_RK3326 first! Because RK3326 board defconfig
+ * will contains both CONFIG_ROCKCHIP_RK3326 and CONFIG_ROCKCHIP_PX30, we
+ * would like treat the board as RK3326.
+ */
+#elif defined(CONFIG_ROCKCHIP_RK3326)
+	chip_info[0] = 0x33333236;
 #elif defined(CONFIG_ROCKCHIP_PX30)
-	chip_info[0] = 0x33333044;
+	chip_info[0] = 0x50583330;
 #endif
 
 	return 0;
@@ -73,8 +81,6 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 		chip_info[0] = 0x33333043;
-#elif defined(CONFIG_ROCKCHIP_PX30)
-		chip_info[0] = 0x33333236;
 #endif
 	}
 

commit 2ce00756b4287e8ff68ba02c1e46a692adde86cd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:13:58 2018 +0800

    make.sh: remove RKCHIP fixup for PX30
    
    PX30 and RK3326 would have their individual ini files.
    
    Change-Id: I3e8f05b34ee9a38429fd2870f635328eaf6b5f59
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 5a7b1d8c2e..192ce4adc1 100755
--- a/make.sh
+++ b/make.sh
@@ -119,8 +119,6 @@ fixup_chip_name()
 {
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
 		RKCHIP=RK322X
-	elif [ "$RKCHIP" = 'PX30' ]; then
-		RKCHIP=RK3326
 	fi
 }
 

commit a08ded54815c5795d9f601aff9e73e3949c90e15
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:12:00 2018 +0800

    rockchip: Kconfig: add ROCKCHIP_RK3326
    
    RK3326 can use most code from PX30, but at some situations we have
    to distinguish between RK3326 and PX30, so this macro gives help.
    It is usually selected in rk3326 board defconfig.
    
    Change-Id: Ie890ec2f9e00056709da4799270b7967ffe385cc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ad488a53b4..74436308a3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,6 +11,16 @@ config ROCKCHIP_PX30
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+if ROCKCHIP_PX30
+
+config ROCKCHIP_RK3326
+	bool "Support Rockchip RK3326 "
+	help
+	  RK3326 can use most code from PX30, but at some situations we have
+	  to distinguish between RK3326 and PX30, so this macro gives help.
+	  It is usually selected in rk3326 board defconfig.
+endif
+
 config ROCKCHIP_RK3036
 	bool "Support Rockchip RK3036"
 	select CPU_V7

commit 9d312af1d43031086e370d963f52a68980c396ec
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Feb 27 17:30:20 2018 +0800

    configs: evb-px30: enable nand driver
    
    Change-Id: Ia0e407f80c480caafdc035933747f4f0bf4ad2a3
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 2dd4178ff8..ec45935c8f 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -52,6 +52,7 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit b00aeb2c8dc3fafa5e48987189d7f72117cd59a7
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sun Feb 25 20:15:55 2018 +0800

    configs: evb-px30: change the fastboot buffer size
    
    Change-Id: I7968e3e30762e1373473eb8e254cb8af45da028d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 167c1a928b..2dd4178ff8 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -14,7 +14,7 @@ CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set

commit bcefd07799145a28a089d00a629ab5a83cec7385
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Tue Feb 27 12:22:16 2018 +0800

    clk: rockchip: px30: Remove duplicate definition of mode shift and mask
    
    Change-Id: I94c3b5a6dfd23c96b681e05e28865bc541421391
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 2367a00658..4790bcb3c0 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -42,6 +42,15 @@ static const struct pll_div *apll_cfgs[] = {
 	[APLL_600_MHZ] = &apll_600_cfg,
 };
 
+static u8 pll_mode_shift[PLL_COUNT] = {
+	APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+	NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
+};
+static u32 pll_mode_mask[PLL_COUNT] = {
+	APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+	NPLL_MODE_MASK, GPLL_MODE_MASK
+};
+
 /*
  *  the div restructions of pll in integer mode, these are defined in
  *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
@@ -72,14 +81,6 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	/* All PLLs have same VCO and output frequency range restrictions. */
 	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
 	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-	static u8 mode_shift[PLL_COUNT] = {
-		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
-	};
-	static u32 mode_mask[PLL_COUNT] = {
-		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		NPLL_MODE_MASK, GPLL_MODE_MASK
-	};
 
 	if (pll_id == GPLL) {
 		pll = &cru->gpll;
@@ -99,8 +100,8 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	 * When power on or changing PLL setting,
 	 * we must force PLL into slow mode to ensure output stable clock.
 	 */
-	rk_clrsetreg(mode, mode_mask[pll_id],
-		     PLLMUX_FROM_XIN24M << mode_shift[pll_id]);
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_XIN24M << pll_mode_shift[pll_id]);
 
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
@@ -121,8 +122,8 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
 		udelay(1);
 
-	rk_clrsetreg(mode, mode_mask[pll_id],
-		     PLLMUX_FROM_PLL << mode_shift[pll_id]);
+	rk_clrsetreg(mode, pll_mode_mask[pll_id],
+		     PLLMUX_FROM_PLL << pll_mode_shift[pll_id]);
 
 	return;
 }
@@ -133,14 +134,6 @@ static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
 	u32 refdiv, fbdiv, postdiv1, postdiv2;
 	u32 con;
 	struct px30_pll *pll;
-	static u8 clk_shift[PLL_COUNT] = {
-		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
-	};
-	static u32 clk_mask[PLL_COUNT] = {
-		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		NPLL_MODE_MASK, GPLL_MODE_MASK
-	};
 	uint shift;
 	uint mask;
 
@@ -152,8 +145,8 @@ static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
 		con = readl(&cru->mode);
 	}
 
-	shift = clk_shift[pll_id];
-	mask = clk_mask[pll_id];
+	shift = pll_mode_shift[pll_id];
+	mask = pll_mode_mask[pll_id];
 
 	switch ((con & mask) >> shift) {
 	case PLLMUX_FROM_XIN24M:

commit 30f1f38dda0f851c213bad1d954a5afa6c6c2db6
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Feb 23 20:18:50 2018 +0800

    clk: rockchip: px30: Add support to set and get rate for vopb
    
    Change-Id: I5105c4823ffd6632c29a8faa80b995f7ef0decaa
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index e459b9926c..d883a9c8cb 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -9,6 +9,7 @@
 #include <common.h>
 
 #define MHz		1000000
+#define KHz		1000
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
@@ -161,6 +162,28 @@ enum {
 	CORE_DIV_CON_SHIFT	= 0,
 	CORE_DIV_CON_MASK	= 0x0f << CORE_DIV_CON_SHIFT,
 
+	/* CRU_CLK_SEL3_CON */
+	ACLK_VO_PLL_SHIFT	= 6,
+	ACLK_VO_PLL_MASK	= 0x3 << ACLK_VO_PLL_SHIFT,
+	ACLK_VO_SEL_GPLL	= 0,
+	ACLK_VO_SEL_CPLL,
+	ACLK_VO_SEL_NPLL,
+	ACLK_VO_DIV_SHIFT	= 0,
+	ACLK_VO_DIV_MASK	= 0x1f << ACLK_VO_DIV_SHIFT,
+
+	/* CRU_CLK_SEL5_CON */
+	DCLK_VOPB_SEL_SHIFT	= 14,
+	DCLK_VOPB_SEL_MASK	= 0x3 << DCLK_VOPB_SEL_SHIFT,
+	DCLK_VOPB_SEL_DIVOUT	= 0,
+	DCLK_VOPB_SEL_FRACOUT,
+	DCLK_VOPB_SEL_24M,
+	DCLK_VOPB_PLL_SEL_SHIFT	= 11,
+	DCLK_VOPB_PLL_SEL_MASK	= 0x1 << DCLK_VOPB_PLL_SEL_SHIFT,
+	DCLK_VOPB_PLL_SEL_CPLL	= 0,
+	DCLK_VOPB_PLL_SEL_NPLL,
+	DCLK_VOPB_DIV_SHIFT	= 0,
+	DCLK_VOPB_DIV_MASK	= 0xff,
+
 	/* CRU_CLK_SEL14_CON */
 	PERI_PLL_SEL_SHIFT	=15,
 	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 5df3ba9d28..2367a00658 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -127,6 +127,116 @@ static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
 	return;
 }
 
+static uint32_t rkclk_pll_get_rate(struct px30_cru *cru,
+				   enum px30_pll_id pll_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+	struct px30_pll *pll;
+	static u8 clk_shift[PLL_COUNT] = {
+		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
+	};
+	static u32 clk_mask[PLL_COUNT] = {
+		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+		NPLL_MODE_MASK, GPLL_MODE_MASK
+	};
+	uint shift;
+	uint mask;
+
+	if (pll_id == GPLL) {
+		pll = &cru->gpll;
+		con = readl(&cru->pmu_mode);
+	} else {
+		pll = &cru->pll[pll_id];
+		con = readl(&cru->mode);
+	}
+
+	shift = clk_shift[pll_id];
+	mask = clk_mask[pll_id];
+
+	switch ((con & mask) >> shift) {
+	case PLLMUX_FROM_XIN24M:
+		return OSC_HZ;
+	case PLLMUX_FROM_PLL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case PLLMUX_FROM_RTC32K:
+	default:
+		return 32768;
+	}
+}
+
+static int pll_para_config(u32 freq_hz, struct pll_div *div)
+{
+	u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 freq_khz = freq_hz / KHz;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return -1;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = freq_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / KHz) || vco_khz > (VCO_MAX_HZ / KHz) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->postdiv1 = postdiv1;
+	div->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->refdiv = refdiv;
+		div->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (MHz / KHz)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, freq_hz,
+		       best_diff_khz * KHz);
+		return -1;
+	}
+	return 0;
+}
+
 static void rkclk_init(struct px30_cru *cru)
 {
 	u32 aclk_div;
@@ -452,6 +562,67 @@ static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
+static ulong px30_vop_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VOPB:
+		con = readl(&cru->clksel_con[3]);
+		div = con & ACLK_VO_DIV_MASK;
+		parent = GPLL_HZ;
+		break;
+	case DCLK_VOPB:
+		con = readl(&cru->clksel_con[5]);
+		div = con & DCLK_VOPB_DIV_MASK;
+		parent = rkclk_pll_get_rate(cru, CPLL);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong px30_vop_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+	struct pll_div cpll_config = {0};
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VOPB:
+		rk_clrsetreg(&cru->clksel_con[3],
+			     ACLK_VO_PLL_MASK | ACLK_VO_DIV_MASK,
+			     ACLK_VO_SEL_GPLL << ACLK_VO_PLL_SHIFT |
+			     (src_clk_div - 1) << ACLK_VO_DIV_SHIFT);
+		break;
+	case DCLK_VOPB:
+		/*
+		 * vopb dclk source from cpll, and equals to
+		 * cpll(means div == 1)
+		 */
+		if (pll_para_config(hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(cru, CPLL, &cpll_config);
+
+		rk_clrsetreg(&cru->clksel_con[5],
+			     DCLK_VOPB_SEL_MASK | DCLK_VOPB_PLL_SEL_MASK |
+			     DCLK_VOPB_DIV_MASK,
+			     DCLK_VOPB_SEL_DIVOUT << DCLK_VOPB_SEL_SHIFT |
+			     DCLK_VOPB_PLL_SEL_CPLL << DCLK_VOPB_PLL_SEL_SHIFT |
+			     (1 - 1) << DCLK_VOPB_DIV_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return hz;
+}
+
 static ulong px30_clk_get_rate(struct clk *clk)
 {
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
@@ -482,6 +653,10 @@ static ulong px30_clk_get_rate(struct clk *clk)
 	case SCLK_SPI1:
 		rate = px30_spi_get_clk(priv->cru, clk->id);
 		break;
+	case ACLK_VOPB:
+	case DCLK_VOPB:
+		rate = px30_vop_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -521,6 +696,10 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SPI1:
 		ret = px30_spi_set_clk(priv->cru, clk->id, rate);
 		break;
+	case ACLK_VOPB:
+	case DCLK_VOPB:
+		ret = px30_vop_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 77ecce68978fc975f8b6e821df5b0b2e278d826c
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Sun Feb 25 10:58:49 2018 +0800

    clk: rockchip: px30: Modify gpll to 1200MHz
    
    Change-Id: Ia853acdc1d6c7085712379680b6fb1ed6a5802d6
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index e39607591c..e459b9926c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -12,7 +12,7 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(600 * MHz)
+#define GPLL_HZ		(1200 * MHz)
 #define CPLL_HZ		(594 * MHz)
 
 #define CORE_PERI_HZ	204000000
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 1f32fe9abd..5df3ba9d28 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -32,7 +32,7 @@ enum {
 	.refdiv = _refdiv,\
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 1, 1);
 
 static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);

commit 2b34f30706ac2949afe455227500aabbf14ad01c
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Nov 9 20:18:05 2017 +0800

    video/rockchip: vop: enable axi outstanding function
    
    On some scenes, win lite area may flush with short width.
    
    As the Technical Reference Manual description, need enable
    axi outstanding function if use IOMMU.
    
    From testing, after setting axi outstanding max number to 30
    solve windows flush problem.
    
    Change-Id: I7eb41b6169776260257a94177f84c04d37b604e5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 9868600bc0..7eb2276cec 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -239,9 +239,14 @@ static int rockchip_vop_init(struct display_state *state)
 	rockchip_vop_init_gamma(vop, state);
 
 	VOP_CTRL_SET(vop, global_regdone_en, 1);
+	VOP_CTRL_SET(vop, axi_outstanding_max_num, 30);
+	VOP_CTRL_SET(vop, axi_max_outstanding_en, 1);
 	VOP_CTRL_SET(vop, reg_done_frm, 1);
 	VOP_CTRL_SET(vop, win_gate[0], 1);
 	VOP_CTRL_SET(vop, win_gate[1], 1);
+	VOP_CTRL_SET(vop, win_channel[0], 0x12);
+	VOP_CTRL_SET(vop, win_channel[1], 0x34);
+	VOP_CTRL_SET(vop, win_channel[2], 0x56);
 	VOP_CTRL_SET(vop, dsp_blank, 0);
 
 	val = 0x8;
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 86a691d5c1..5c3caded05 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -232,6 +232,8 @@ struct vop_reg {
 
 struct vop_ctrl {
 	struct vop_reg standby;
+	struct vop_reg axi_outstanding_max_num;
+	struct vop_reg axi_max_outstanding_en;
 	struct vop_reg htotal_pw;
 	struct vop_reg hact_st_end;
 	struct vop_reg vtotal_pw;
@@ -316,6 +318,9 @@ struct vop_ctrl {
 	struct vop_reg cabc_global_dn;
 	struct vop_reg cabc_calc_pixel_num;
 
+	struct vop_reg win_gate[4];
+	struct vop_reg win_channel[4];
+
 	/* BCSH */
 	struct vop_reg bcsh_brightness;
 	struct vop_reg bcsh_contrast;
@@ -345,7 +350,7 @@ struct vop_ctrl {
 	struct vop_reg mcu_type;
 	struct vop_reg mcu_rw_bypass_port;
 
-	struct vop_reg win_gate[4];
+
 	struct vop_reg cfg_done;
 };
 
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 90674020a9..57a94f0d9f 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -86,6 +86,8 @@ static const struct vop_win rk3288_win01_data = {
 
 static const struct vop_ctrl rk3288_ctrl_data = {
 	.standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
+	.axi_outstanding_max_num = VOP_REG(RK3288_SYS_CTRL1, 0x1f, 13),
+	.axi_max_outstanding_en = VOP_REG(RK3288_SYS_CTRL1, 0x1, 12),
 	.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
 	.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
@@ -132,6 +134,19 @@ static const struct vop_ctrl rk3288_ctrl_data = {
 	.update_gamma_lut = VOP_REG_VER(RK3288_DSP_CTRL1, 0x1, 7, 3, 5, -1),
 	.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
 
+	.bcsh_brightness = VOP_REG(RK3288_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3288_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3288_BCSH_BCS, 0x3ff, 20),
+	.bcsh_out_mode = VOP_REG(RK3288_BCSH_BCS, 0x3, 0),
+	.bcsh_sin_hue = VOP_REG(RK3288_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3288_BCSH_H, 0x1ff, 16),
+	.bcsh_r2y_csc_mode = VOP_REG_VER(RK3368_BCSH_CTRL, 0x1, 6, 3, 1, -1),
+	.bcsh_r2y_en = VOP_REG_VER(RK3368_BCSH_CTRL, 0x1, 4, 3, 1, -1),
+	.bcsh_y2r_csc_mode = VOP_REG_VER(RK3368_BCSH_CTRL, 0x3, 2, 3, 1, -1),
+	.bcsh_y2r_en = VOP_REG_VER(RK3368_BCSH_CTRL, 0x1, 0, 3, 1, -1),
+	.bcsh_color_bar = VOP_REG(RK3288_BCSH_COLOR_BAR, 0xffffff, 8),
+	.bcsh_en = VOP_REG(RK3288_BCSH_COLOR_BAR, 0x1, 0),
+
 	.xmirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 22),
 	.ymirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 23),
 
@@ -209,6 +224,8 @@ const struct vop_data rk322x_vop = {
 
 static const struct vop_ctrl rk3328_ctrl_data = {
 	.standby = VOP_REG(RK3328_SYS_CTRL, 0x1, 22),
+	.axi_outstanding_max_num = VOP_REG(RK3328_SYS_CTRL1, 0x1f, 13),
+	.axi_max_outstanding_en = VOP_REG(RK3328_SYS_CTRL1, 0x1, 12),
 	.reg_done_frm = VOP_REG(RK3328_SYS_CTRL1, 0x1, 24),
 	.auto_gate_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 23),
 	.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
@@ -272,6 +289,9 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.bcsh_y2r_en = VOP_REG(RK3328_BCSH_CTRL, 0x1, 0),
 	.bcsh_color_bar = VOP_REG(RK3328_BCSH_COLOR_BAR, 0xffffff, 8),
 	.bcsh_en = VOP_REG(RK3328_BCSH_COLOR_BAR, 0x1, 0),
+	.win_channel[0] = VOP_REG_VER(RK3328_WIN0_CTRL2, 0xff, 0, 3, 8, 8),
+	.win_channel[1] = VOP_REG_VER(RK3328_WIN1_CTRL2, 0xff, 0, 3, 8, 8),
+	.win_channel[2] = VOP_REG_VER(RK3328_WIN2_CTRL2, 0xff, 0, 3, 8, 8),
 
 	.cfg_done = VOP_REG(RK3328_REG_CFG_DONE, 0x1, 0),
 };

commit 09b01f9e9fe244b340d4bc1861cacd6c5e8837de
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Jan 25 10:20:03 2018 +0800

    drm/rockchip: vop: Support drm tve
    
    Change-Id: Ie32dda5e3c825d03bc5c864a6b346113196c484d
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 2e85fd618c..9868600bc0 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -270,6 +270,19 @@ static int rockchip_vop_init(struct display_state *state)
 		VOP_CTRL_SET(vop, data01_swap,
 			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK));
 		break;
+	case DRM_MODE_CONNECTOR_TV:
+		if (vdisplay == CVBS_PAL_VDISPLAY)
+			VOP_CTRL_SET(vop, tve_sw_mode, 1);
+		else
+			VOP_CTRL_SET(vop, tve_sw_mode, 0);
+		VOP_CTRL_SET(vop, tve_dclk_pol, 1);
+		VOP_CTRL_SET(vop, tve_dclk_en, 1);
+		/* use the same pol reg with hdmi */
+		VOP_CTRL_SET(vop, hdmi_pin_pol, val);
+		VOP_CTRL_SET(vop, sw_genlock, 1);
+		VOP_CTRL_SET(vop, sw_uv_offset_en, 1);
+		VOP_CTRL_SET(vop, dither_up, 1);
+		break;
 	default:
 		printf("unsupport connector_type[%d]\n", conn_state->type);
 	}
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index d398d0d696..86a691d5c1 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -64,6 +64,8 @@
 #define VOP_WIN_GET(x, name) \
 		vop_read_reg(x, vop->win->offset, &vop->win->name)
 
+#define CVBS_PAL_VDISPLAY              288
+
 enum alpha_mode {
 	ALPHA_STRAIGHT,
 	ALPHA_INVERSE,
@@ -277,6 +279,13 @@ struct vop_ctrl {
 	struct vop_reg dither_up;
 	struct vop_reg dither_down;
 
+	struct vop_reg sw_dac_sel;
+	struct vop_reg tve_sw_mode;
+	struct vop_reg tve_dclk_pol;
+	struct vop_reg tve_dclk_en;
+	struct vop_reg sw_genlock;
+	struct vop_reg sw_uv_offset_en;
+
 	struct vop_reg dsp_out_yuv;
 	struct vop_reg dsp_data_swap;
 	struct vop_reg dsp_ccir656_avg;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index b2111713fc..90674020a9 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -235,6 +235,12 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
 	.edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
 	.mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
+	.tve_dclk_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 24),
+	.tve_dclk_pol = VOP_REG(RK3328_SYS_CTRL, 0x1, 25),
+	.tve_sw_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 26),
+	.sw_uv_offset_en  = VOP_REG(RK3328_SYS_CTRL, 0x1, 27),
+	.sw_genlock   = VOP_REG(RK3328_SYS_CTRL, 0x1, 28),
+	.sw_dac_sel = VOP_REG(RK3328_SYS_CTRL, 0x1, 29),
 	.rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 16),
 	.hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 20),
 	.edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 24),

commit 44aac45b9111887edeaea11488540e2fffc2c770
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jan 30 20:04:52 2018 +0800

    drm/rockchip: correct rk3328 vop register config
    
    Change-Id: Iba808c60e783432cf69ed1e24c6aeace46f1e1bd
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 3aea0d344e..b2111713fc 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -229,6 +229,7 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
 	.overlay_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 16),
 	.core_dclk_div = VOP_REG(RK3328_DSP_CTRL0, 0x1, 4),
+	.dclk_ddr = VOP_REG(RK3328_DSP_CTRL0, 0x1, 8),
 	.p2i_en = VOP_REG(RK3328_DSP_CTRL0, 0x1, 5),
 	.rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
 	.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),

commit f11b858f2e763d7f2854c0bd0222aaa13cf38458
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Jan 26 19:33:31 2018 +0800

    drm/rockchip: add more checkout mode
    
    check detail timing for the some resolution but different fps
    
    Change-Id: I103060aff3a64e9e285b5a5f87e71528cd053728
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 335b9e52fbf97edb43c75bb1bc21dd10db5616bc)

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 04938360e4..70fd3fd25a 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -1086,6 +1086,8 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
 		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
+		FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
+		FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
 		FDT_SET_U32("video,vrefresh",
 			    drm_mode_vrefresh(&s->conn_state.mode));
 		FDT_SET_U32("video,flags", s->conn_state.mode.flags);

commit 8a2a3a29b6deb986d4d0fed46a5ce3639336de72
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Thu Jan 18 19:41:55 2018 +0800

    drm/rockchip: vop: add support overscan
    
    add vop post scale for some TV overscan
    
    Change-Id: I1f310d9d65a8a0ea2a0d3100954ef4ff0a587f4d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 68d08545b912610f63a3cdb0e1e13ca44b1abc1f)

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 4fc35cb1f2..04938360e4 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -981,6 +981,10 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->conn_state.node = np_to_ofnode(cnt_node);
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
+		s->conn_state.overscan.left_margin = 100;
+		s->conn_state.overscan.right_margin = 100;
+		s->conn_state.overscan.top_margin = 100;
+		s->conn_state.overscan.bottom_margin = 100;
 		s->crtc_state.node = np_to_ofnode(vop_node);
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
@@ -1084,6 +1088,11 @@ void rockchip_display_fixup(void *blob)
 		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
 		FDT_SET_U32("video,vrefresh",
 			    drm_mode_vrefresh(&s->conn_state.mode));
+		FDT_SET_U32("video,flags", s->conn_state.mode.flags);
+		FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
+		FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
+		FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
+		FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
 #undef FDT_SET_U32
 	}
 }
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 949a543e41..2e85fd618c 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -132,6 +132,51 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	return 0;
 }
 
+static void vop_post_config(struct display_state *state, struct vop *vop)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u16 vtotal = mode->crtc_vtotal;
+	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
+	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
+	u16 hdisplay = mode->crtc_hdisplay;
+	u16 vdisplay = mode->crtc_vdisplay;
+	u16 hsize = hdisplay * (conn_state->overscan.left_margin + conn_state->overscan.right_margin) / 200;
+	u16 vsize = vdisplay * (conn_state->overscan.top_margin + conn_state->overscan.bottom_margin) / 200;
+	u16 hact_end, vact_end;
+	u32 val;
+
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		vsize = round_down(vsize, 2);
+
+	hact_st += hdisplay * (100 - conn_state->overscan.left_margin) / 200;
+	hact_end = hact_st + hsize;
+	val = hact_st << 16;
+	val |= hact_end;
+
+	VOP_CTRL_SET(vop, hpost_st_end, val);
+	vact_st += vdisplay * (100 - conn_state->overscan.top_margin) / 200;
+	vact_end = vact_st + vsize;
+	val = vact_st << 16;
+	val |= vact_end;
+	VOP_CTRL_SET(vop, vpost_st_end, val);
+	val = scl_cal_scale2(vdisplay, vsize) << 16;
+	val |= scl_cal_scale2(hdisplay, hsize);
+	VOP_CTRL_SET(vop, post_scl_factor, val);
+#define POST_HORIZONTAL_SCALEDOWN_EN(x)		((x) << 0)
+#define POST_VERTICAL_SCALEDOWN_EN(x)		((x) << 1)
+	VOP_CTRL_SET(vop, post_scl_ctrl,
+		     POST_HORIZONTAL_SCALEDOWN_EN(hdisplay != hsize) |
+		     POST_VERTICAL_SCALEDOWN_EN(vdisplay != vsize));
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		u16 vact_st_f1 = vtotal + vact_st + 1;
+		u16 vact_end_f1 = vact_st_f1 + vsize;
+
+		val = vact_st_f1 << 16 | vact_end_f1;
+		VOP_CTRL_SET(vop, vpost_st_end_f1, val);
+	}
+}
+
 static int rockchip_vop_init(struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -312,34 +357,32 @@ static int rockchip_vop_init(struct display_state *state)
 	val = hact_st << 16;
 	val |= hact_end;
 	VOP_CTRL_SET(vop, hact_st_end, val);
-	VOP_CTRL_SET(vop, hpost_st_end, val);
 	val = vact_st << 16;
 	val |= vact_end;
 	VOP_CTRL_SET(vop, vact_st_end, val);
-	VOP_CTRL_SET(vop, vpost_st_end, val);
 	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
-			u16 vact_st_f1 = vtotal + vact_st + 1;
-			u16 vact_end_f1 = vact_st_f1 + vdisplay;
-
-			val = vact_st_f1 << 16 | vact_end_f1;
-			VOP_CTRL_SET(vop, vact_st_end_f1, val);
-			VOP_CTRL_SET(vop, vpost_st_end_f1, val);
-
-			val = vtotal << 16 | (vtotal + vsync_len);
-			VOP_CTRL_SET(vop, vs_st_end_f1, val);
-			VOP_CTRL_SET(vop, dsp_interlace, 1);
-			VOP_CTRL_SET(vop, p2i_en, 1);
-			vtotal += vtotal + 1;
+		u16 vact_st_f1 = vtotal + vact_st + 1;
+		u16 vact_end_f1 = vact_st_f1 + vdisplay;
+
+		val = vact_st_f1 << 16 | vact_end_f1;
+		VOP_CTRL_SET(vop, vact_st_end_f1, val);
+
+		val = vtotal << 16 | (vtotal + vsync_len);
+		VOP_CTRL_SET(vop, vs_st_end_f1, val);
+		VOP_CTRL_SET(vop, dsp_interlace, 1);
+		VOP_CTRL_SET(vop, p2i_en, 1);
+		vtotal += vtotal + 1;
 		act_end = vact_end_f1;
-		} else {
-			VOP_CTRL_SET(vop, dsp_interlace, 0);
-			VOP_CTRL_SET(vop, p2i_en, 0);
+	} else {
+		VOP_CTRL_SET(vop, dsp_interlace, 0);
+		VOP_CTRL_SET(vop, p2i_en, 0);
 		act_end = vact_end;
-		}
-		VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+	}
+	VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+	vop_post_config(state, vop);
+	VOP_CTRL_SET(vop, core_dclk_div,
+		     !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 
-		VOP_CTRL_SET(vop, core_dclk_div,
-					 !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 	VOP_CTRL_SET(vop, standby, 1);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[0], act_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],

commit 960080c99d6933991578271b78b7f983ac7b4975
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 26 20:18:06 2018 +0800

    drm/rockchip: vop: line flag num config according to interlace
    
    when in interlace mode, the line flag should set to the second fild last
    line
    
    Change-Id: I1c3b6c19a31deb4a506d304b4abeeb5c2b6dd87d
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit f8e3a4d80aee7f93309f7cc04294de02295f97dd)

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c56ad4f8e5..949a543e41 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -151,7 +151,7 @@ static int rockchip_vop_init(struct display_state *state)
 	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
 	struct clk dclk, aclk;
-	u32 val;
+	u32 val, act_end;
 	int ret;
 	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
 	u16 post_csc_mode;
@@ -330,18 +330,20 @@ static int rockchip_vop_init(struct display_state *state)
 			VOP_CTRL_SET(vop, dsp_interlace, 1);
 			VOP_CTRL_SET(vop, p2i_en, 1);
 			vtotal += vtotal + 1;
+		act_end = vact_end_f1;
 		} else {
 			VOP_CTRL_SET(vop, dsp_interlace, 0);
 			VOP_CTRL_SET(vop, p2i_en, 0);
+		act_end = vact_end;
 		}
 		VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
 
 		VOP_CTRL_SET(vop, core_dclk_div,
 					 !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 	VOP_CTRL_SET(vop, standby, 1);
-	VOP_LINE_FLAG_SET(vop, line_flag_num[0], vact_end - 3);
+	VOP_LINE_FLAG_SET(vop, line_flag_num[0], act_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
-			  vact_end - us_to_vertical_line(mode, 1000));
+			  act_end - us_to_vertical_line(mode, 1000));
 	vop_cfg_done(vop);
 
 	return 0;

commit b014f33558b8cc05a3a77f1e8f70cbe5088931d6
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 26 20:12:32 2018 +0800

    drm/rockchip: display: add overscan config for hdmi or tv output
    
    This will be used to config overscan for tv output.
    
    Change-Id: I2fec3f0a1493243212d88fc97f8e9a9d8701bf8c
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 3a393d0378474a59d8046b418eefaa6df6947235)

diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 6219c35aac..e050695fe2 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -72,6 +72,13 @@ struct panel_state {
 	void *private;
 };
 
+struct overscan {
+	int left_margin;
+	int right_margin;
+	int top_margin;
+	int bottom_margin;
+};
+
 struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
@@ -84,6 +91,7 @@ struct connector_state {
 	void *phy_private;
 
 	struct drm_display_mode mode;
+	struct overscan overscan;
 	u8 edid[EDID_SIZE * 4];
 	int bus_format;
 	int output_mode;

commit b0dbe9a090143011abb4ef33fb8fec12b9108ef5
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Tue Jan 16 11:06:21 2018 +0800

    drm/rockchip: rk3328 vop: set frame effect when in interlace mode
    
    This will improve display quality for P in i output.
    
    Change-Id: If34b8879a41ea10ce756c1feebc2e9df64183261
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 99096b14d61a9ef456745e1ffcb036d38bdda008)

diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index c9e1567afc..c56ad4f8e5 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -194,6 +194,7 @@ static int rockchip_vop_init(struct display_state *state)
 	rockchip_vop_init_gamma(vop, state);
 
 	VOP_CTRL_SET(vop, global_regdone_en, 1);
+	VOP_CTRL_SET(vop, reg_done_frm, 1);
 	VOP_CTRL_SET(vop, win_gate[0], 1);
 	VOP_CTRL_SET(vop, win_gate[1], 1);
 	VOP_CTRL_SET(vop, dsp_blank, 0);
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index f0f7a211b5..d398d0d696 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -320,6 +320,7 @@ struct vop_ctrl {
 	struct vop_reg bcsh_color_bar;
 	struct vop_reg bcsh_out_mode;
 	struct vop_reg bcsh_en;
+	struct vop_reg reg_done_frm;
 
 	/* MCU OUTPUT */
 	struct vop_reg mcu_pix_total;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 9a184612ea..3aea0d344e 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -209,6 +209,7 @@ const struct vop_data rk322x_vop = {
 
 static const struct vop_ctrl rk3328_ctrl_data = {
 	.standby = VOP_REG(RK3328_SYS_CTRL, 0x1, 22),
+	.reg_done_frm = VOP_REG(RK3328_SYS_CTRL1, 0x1, 24),
 	.auto_gate_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 23),
 	.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
 	.hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),

commit ccd843b9282db92599458856d2ff6d000cea6573
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Wed Dec 13 19:35:59 2017 +0800

    drm/rockchip: add support interlace mode output
    
    add interlace timing config for hdmi/cvbs interlace output mode
    
    Change-Id: Ic0bb06667a5c56d81f5229b7ef87baef9e0e5f32
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry pick from commit 3452c2ff12f80f249bc54d28bc3c52d089f76a8a)

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 192ea8b3b2..4fc35cb1f2 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -311,6 +311,87 @@ static int display_get_timing_from_dts(struct panel_state *panel_state,
 	return 0;
 }
 
+/**
+ * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
+ * @p: mode
+ * @adjust_flags: a combination of adjustment flags
+ *
+ * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
+ *
+ * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
+ *   interlaced modes.
+ * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
+ *   buffers containing two eyes (only adjust the timings when needed, eg. for
+ *   "frame packing" or "side by side full").
+ * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
+ *   be performed for doublescan and vscan > 1 modes respectively.
+ */
+void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
+{
+	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
+		return;
+
+	if (p->flags & DRM_MODE_FLAG_DBLCLK)
+		p->crtc_clock = 2 * p->clock;
+	else
+		p->crtc_clock = p->clock;
+	p->crtc_hdisplay = p->hdisplay;
+	p->crtc_hsync_start = p->hsync_start;
+	p->crtc_hsync_end = p->hsync_end;
+	p->crtc_htotal = p->htotal;
+	p->crtc_hskew = p->hskew;
+	p->crtc_vdisplay = p->vdisplay;
+	p->crtc_vsync_start = p->vsync_start;
+	p->crtc_vsync_end = p->vsync_end;
+	p->crtc_vtotal = p->vtotal;
+
+	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
+		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
+			p->crtc_vdisplay /= 2;
+			p->crtc_vsync_start /= 2;
+			p->crtc_vsync_end /= 2;
+			p->crtc_vtotal /= 2;
+		}
+	}
+
+	if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
+		if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
+			p->crtc_vdisplay *= 2;
+			p->crtc_vsync_start *= 2;
+			p->crtc_vsync_end *= 2;
+			p->crtc_vtotal *= 2;
+		}
+	}
+
+	if (!(adjust_flags & CRTC_NO_VSCAN)) {
+		if (p->vscan > 1) {
+			p->crtc_vdisplay *= p->vscan;
+			p->crtc_vsync_start *= p->vscan;
+			p->crtc_vsync_end *= p->vscan;
+			p->crtc_vtotal *= p->vscan;
+		}
+	}
+
+	if (adjust_flags & CRTC_STEREO_DOUBLE) {
+		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
+
+		switch (layout) {
+		case DRM_MODE_FLAG_3D_FRAME_PACKING:
+			p->crtc_clock *= 2;
+			p->crtc_vdisplay += p->crtc_vtotal;
+			p->crtc_vsync_start += p->crtc_vtotal;
+			p->crtc_vsync_end += p->crtc_vtotal;
+			p->crtc_vtotal += p->crtc_vtotal;
+			break;
+		}
+	}
+
+	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
+	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
+	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
+	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
+}
+
 static int display_get_timing(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -372,6 +453,7 @@ static int display_init(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	struct drm_display_mode *mode = &conn_state->mode;
 	int ret = 0;
 
 	if (state->is_init)
@@ -405,6 +487,7 @@ static int display_init(struct display_state *state)
 		if (ret)
 			goto deinit;
 	}
+	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
 
 	if (crtc_funcs->init) {
 		ret = crtc_funcs->init(state);
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index cfdf184640..c9e1567afc 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -140,15 +140,15 @@ static int rockchip_vop_init(struct display_state *state)
 	const struct rockchip_crtc *crtc = crtc_state->crtc;
 	const struct vop_data *vop_data = crtc->data;
 	struct vop *vop;
-	u16 hsync_len = mode->hsync_end - mode->hsync_start;
-	u16 hdisplay = mode->hdisplay;
-	u16 htotal = mode->htotal;
-	u16 hact_st = mode->htotal - mode->hsync_start;
+	u16 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
+	u16 hdisplay = mode->crtc_hdisplay;
+	u16 htotal = mode->crtc_htotal;
+	u16 hact_st = mode->crtc_htotal - mode->crtc_hsync_start;
 	u16 hact_end = hact_st + hdisplay;
-	u16 vdisplay = mode->vdisplay;
-	u16 vtotal = mode->vtotal;
-	u16 vsync_len = mode->vsync_end - mode->vsync_start;
-	u16 vact_st = mode->vtotal - mode->vsync_start;
+	u16 vdisplay = mode->crtc_vdisplay;
+	u16 vtotal = mode->crtc_vtotal;
+	u16 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
+	u16 vact_st = mode->crtc_vtotal - mode->crtc_vsync_start;
 	u16 vact_end = vact_st + vdisplay;
 	struct clk dclk, aclk;
 	u32 val;
@@ -312,11 +312,31 @@ static int rockchip_vop_init(struct display_state *state)
 	val |= hact_end;
 	VOP_CTRL_SET(vop, hact_st_end, val);
 	VOP_CTRL_SET(vop, hpost_st_end, val);
-	VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
 	val = vact_st << 16;
 	val |= vact_end;
 	VOP_CTRL_SET(vop, vact_st_end, val);
 	VOP_CTRL_SET(vop, vpost_st_end, val);
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+			u16 vact_st_f1 = vtotal + vact_st + 1;
+			u16 vact_end_f1 = vact_st_f1 + vdisplay;
+
+			val = vact_st_f1 << 16 | vact_end_f1;
+			VOP_CTRL_SET(vop, vact_st_end_f1, val);
+			VOP_CTRL_SET(vop, vpost_st_end_f1, val);
+
+			val = vtotal << 16 | (vtotal + vsync_len);
+			VOP_CTRL_SET(vop, vs_st_end_f1, val);
+			VOP_CTRL_SET(vop, dsp_interlace, 1);
+			VOP_CTRL_SET(vop, p2i_en, 1);
+			vtotal += vtotal + 1;
+		} else {
+			VOP_CTRL_SET(vop, dsp_interlace, 0);
+			VOP_CTRL_SET(vop, p2i_en, 0);
+		}
+		VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+
+		VOP_CTRL_SET(vop, core_dclk_div,
+					 !!(mode->flags & DRM_MODE_FLAG_DBLCLK));
 	VOP_CTRL_SET(vop, standby, 1);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[0], vact_end - 3);
 	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
diff --git a/include/drm_modes.h b/include/drm_modes.h
index e77f3a6bbc..78cfcdc2b6 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -7,13 +7,18 @@
 #ifndef _DRM_MODES_H
 #define _DRM_MODES_H
 
-#define DRM_MODE_TYPE_BUILTIN	BIT(0)
-#define DRM_MODE_TYPE_CLOCK_C	(BIT(1) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_CRTC_C	(BIT(2) | DRM_MODE_TYPE_BUILTIN)
-#define DRM_MODE_TYPE_PREFERRED	BIT(3)
-#define DRM_MODE_TYPE_DEFAULT	BIT(4)
-#define DRM_MODE_TYPE_USERDEF	BIT(5)
-#define DRM_MODE_TYPE_DRIVER	BIT(6)
+#define DRM_DISPLAY_INFO_LEN	32
+#define DRM_CONNECTOR_NAME_LEN	32
+#define DRM_DISPLAY_MODE_LEN	32
+#define DRM_PROP_NAME_LEN	32
+
+#define DRM_MODE_TYPE_BUILTIN	(1<<0)
+#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_PREFERRED	(1<<3)
+#define DRM_MODE_TYPE_DEFAULT	(1<<4)
+#define DRM_MODE_TYPE_USERDEF	(1<<5)
+#define DRM_MODE_TYPE_DRIVER	(1<<6)
 
 /* Video mode flags */
 /* bit compatible with the xorg definitions. */
@@ -114,6 +119,14 @@ enum v4l2_colorspace {
 	V4L2_COLORSPACE_DCI_P3        = 12,
 };
 
+#define CRTC_INTERLACE_HALVE_V	(1 << 0) /* halve V values for interlacing */
+#define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
+#define CRTC_NO_DBLSCAN		(1 << 2) /* don't adjust doublescan */
+#define CRTC_NO_VSCAN		(1 << 3) /* don't adjust doublescan */
+#define CRTC_STEREO_DOUBLE_ONLY	(CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | CRTC_NO_VSCAN)
+
+#define DRM_MODE_FLAG_3D_MAX	DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
+
 struct drm_display_mode {
 	/* Proposed mode values */
 	int clock;		/* in kHz */
@@ -129,6 +142,23 @@ struct drm_display_mode {
 	int vscan;
 	unsigned int flags;
 	int picture_aspect_ratio;
+	int hskew;
+	unsigned int type;
+	/* Actual mode we give to hw */
+	int crtc_clock;         /* in KHz */
+	int crtc_hdisplay;
+	int crtc_hblank_start;
+	int crtc_hblank_end;
+	int crtc_hsync_start;
+	int crtc_hsync_end;
+	int crtc_htotal;
+	int crtc_hskew;
+	int crtc_vdisplay;
+	int crtc_vblank_start;
+	int crtc_vblank_end;
+	int crtc_vsync_start;
+	int crtc_vsync_end;
+	int crtc_vtotal;
 };
 
 #endif

commit 79feefb1157f4035aaedc183e6039cb3401c756e
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Mon Feb 26 19:49:43 2018 +0800

    video/rockchip: vop:  add support CSC function for HDMI YUV output
    
    add CSC config for YUV output mode
    
    Change-Id: I9b53c3b3bdc0fc1a733897474c126042d17c3ac9
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>
    (Cherry-pick from commit 34d6280a1ae02cc3c98aa8e6d32151b37fd849c6)

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 7c0073147f..406257ee3a 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -961,6 +961,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	dsi->node = mipi_node;
 	conn_state->private = dsi;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 	panel = dev_read_subnode(conn_state->dev, "panel");
 	if (!ofnode_valid(panel)) {
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index da7b1a0495..b86863ec3f 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -883,6 +883,7 @@ static int rockchip_analogix_dp_init(struct display_state *state)
 	conn_state->private = dp;
 	conn_state->type = DRM_MODE_CONNECTOR_eDP;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 #if 0
 	if (pdata->chip_type == RK3399_EDP) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index 0ddab1c355..6219c35aac 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -35,6 +35,9 @@ enum display_mode {
 #define ROCKCHIP_OUT_MODE_P888	0
 #define ROCKCHIP_OUT_MODE_P666	1
 #define ROCKCHIP_OUT_MODE_P565	2
+#define ROCKCHIP_OUT_MODE_S888		8
+#define ROCKCHIP_OUT_MODE_S888_DUMMY	12
+#define ROCKCHIP_OUT_MODE_YUV420	14
 /* for use special outface */
 #define ROCKCHIP_OUT_MODE_AAAA	15
 
@@ -86,6 +89,7 @@ struct connector_state {
 	int output_mode;
 	int type;
 	int output_type;
+	int color_space;
 
 	struct {
 		u32 *lut;
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 86617e8524..21c5c05a16 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -642,6 +642,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
 	else
 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 8ad5c0c005..cfdf184640 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -30,6 +30,56 @@ static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 	return us * mode->clock / mode->htotal / 1000;
 }
 
+static int to_vop_csc_mode(int csc_mode)
+{
+	switch (csc_mode) {
+	case V4L2_COLORSPACE_SMPTE170M:
+		return CSC_BT601L;
+	case V4L2_COLORSPACE_REC709:
+	case V4L2_COLORSPACE_DEFAULT:
+		return CSC_BT709L;
+	case V4L2_COLORSPACE_JPEG:
+		return CSC_BT601F;
+	case V4L2_COLORSPACE_BT2020:
+		return CSC_BT2020;
+	default:
+		return CSC_BT709L;
+	}
+}
+
+static bool is_yuv_output(uint32_t bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static bool is_uv_swap(uint32_t bus_format, uint32_t output_mode)
+{
+	/*
+	 * FIXME:
+	 *
+	 * There is no media type for YUV444 output,
+	 * so when out_mode is AAAA or P888, assume output is YUV444 on
+	 * yuv format.
+	 *
+	 * From H/W testing, YUV444 mode need a rb swap.
+	 */
+	if ((bus_format == MEDIA_BUS_FMT_YUV8_1X24 ||
+	     bus_format == MEDIA_BUS_FMT_YUV10_1X30) &&
+	    (output_mode == ROCKCHIP_OUT_MODE_AAAA ||
+	     output_mode == ROCKCHIP_OUT_MODE_P888))
+		return true;
+	else
+		return false;
+}
+
 static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -103,6 +153,8 @@ static int rockchip_vop_init(struct display_state *state)
 	struct clk dclk, aclk;
 	u32 val;
 	int ret;
+	bool yuv_overlay = false, post_r2y_en = false, post_y2r_en = false;
+	u16 post_csc_mode;
 
 	vop = malloc(sizeof(*vop));
 	if (!vop)
@@ -188,6 +240,14 @@ static int rockchip_vop_init(struct display_state *state)
 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
 		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666);
 		break;
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(1);
+		break;
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
+		break;
 	case MEDIA_BUS_FMT_RGB888_1X24:
 	default:
 		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
@@ -200,7 +260,53 @@ static int rockchip_vop_init(struct display_state *state)
 	val |= DITHER_DOWN_MODE_SEL(DITHER_DOWN_ALLEGRO);
 	VOP_CTRL_SET(vop, dither_down, val);
 
+	VOP_CTRL_SET(vop, dclk_ddr,
+		     conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0);
+	VOP_CTRL_SET(vop, hdmi_dclk_out_en,
+		     conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0);
+
+	if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
+		VOP_CTRL_SET(vop, dsp_data_swap, DSP_RB_SWAP);
+	else
+		VOP_CTRL_SET(vop, dsp_data_swap, 0);
+
 	VOP_CTRL_SET(vop, out_mode, conn_state->output_mode);
+
+	if (VOP_CTRL_SUPPORT(vop, overlay_mode)) {
+		yuv_overlay = is_yuv_output(conn_state->bus_format);
+		VOP_CTRL_SET(vop, overlay_mode, yuv_overlay);
+	}
+	/*
+	 * todo: r2y for win csc
+	 */
+	VOP_CTRL_SET(vop, dsp_out_yuv, is_yuv_output(conn_state->bus_format));
+
+	if (yuv_overlay) {
+		if (!is_yuv_output(conn_state->bus_format))
+			post_y2r_en = true;
+	} else {
+		if (is_yuv_output(conn_state->bus_format))
+			post_r2y_en = true;
+	}
+
+	post_csc_mode = to_vop_csc_mode(conn_state->color_space);
+	VOP_CTRL_SET(vop, bcsh_r2y_en, post_r2y_en);
+	VOP_CTRL_SET(vop, bcsh_y2r_en, post_y2r_en);
+	VOP_CTRL_SET(vop, bcsh_r2y_csc_mode, post_csc_mode);
+	VOP_CTRL_SET(vop, bcsh_y2r_csc_mode, post_csc_mode);
+
+	/*
+	 * Background color is 10bit depth if vop version >= 3.5
+	 */
+	if (!is_yuv_output(conn_state->bus_format))
+		val = 0;
+	else if (VOP_MAJOR(vop->version) == 3 &&
+		 VOP_MINOR(vop->version) >= 5)
+		val = 0x20010200;
+	else
+		val = 0x801080;
+	VOP_CTRL_SET(vop, dsp_background, val);
+
 	VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
 	val = hact_st << 16;
 	val |= hact_end;
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 8b2d3ffc4e..f0f7a211b5 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -128,6 +128,18 @@ enum dither_down_mode_sel {
 	DITHER_DOWN_FRC = 0x1
 };
 
+enum vop_csc_format {
+	CSC_BT601L,
+	CSC_BT709L,
+	CSC_BT601F,
+	CSC_BT2020,
+};
+
+#define DSP_BG_SWAP		0x1
+#define DSP_RB_SWAP		0x2
+#define DSP_RG_SWAP		0x4
+#define DSP_DELTA_SWAP		0x8
+
 #define PRE_DITHER_DOWN_EN(x)	((x) << 0)
 #define DITHER_DOWN_EN(x)	((x) << 1)
 #define DITHER_DOWN_MODE(x)	((x) << 2)
@@ -238,6 +250,7 @@ struct vop_ctrl {
 	struct vop_reg core_dclk_div;
 	struct vop_reg dclk_ddr;
 	struct vop_reg p2i_en;
+	struct vop_reg hdmi_dclk_out_en;
 	struct vop_reg rgb_en;
 	struct vop_reg lvds_en;
 	struct vop_reg edp_en;
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index c3a054485d..9a184612ea 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -219,6 +219,9 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 	.hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
 	.vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
 	.vpost_st_end_f1 = VOP_REG(RK3328_POST_DSP_VACT_INFO_F1, 0x1fff1fff, 0),
+	.post_scl_factor = VOP_REG(RK3328_POST_SCL_FACTOR_YRGB, 0xffffffff, 0),
+	.post_scl_ctrl = VOP_REG(RK3328_POST_SCL_CTRL, 0x3, 0),
+	.dsp_out_yuv = VOP_REG(RK3328_POST_SCL_CTRL, 0x1, 2),
 	.dsp_interlace = VOP_REG(RK3328_DSP_CTRL0, 0x1, 10),
 	.dsp_layer_sel = VOP_REG(RK3328_DSP_CTRL1, 0xff, 8),
 	.post_lb_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 18),
@@ -249,6 +252,19 @@ static const struct vop_ctrl rk3328_ctrl_data = {
 
 	.dsp_background = VOP_REG(RK3328_DSP_BG, 0xffffffff, 0),
 
+	.bcsh_brightness = VOP_REG(RK3328_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3328_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3328_BCSH_BCS, 0x3ff, 20),
+	.bcsh_out_mode = VOP_REG(RK3328_BCSH_BCS, 0x3, 30),
+	.bcsh_sin_hue = VOP_REG(RK3328_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3328_BCSH_H, 0x1ff, 16),
+	.bcsh_r2y_csc_mode = VOP_REG(RK3328_BCSH_CTRL, 0x3, 6),
+	.bcsh_r2y_en = VOP_REG(RK3328_BCSH_CTRL, 0x1, 4),
+	.bcsh_y2r_csc_mode = VOP_REG(RK3328_BCSH_CTRL, 0x3, 2),
+	.bcsh_y2r_en = VOP_REG(RK3328_BCSH_CTRL, 0x1, 0),
+	.bcsh_color_bar = VOP_REG(RK3328_BCSH_COLOR_BAR, 0xffffff, 8),
+	.bcsh_en = VOP_REG(RK3328_BCSH_COLOR_BAR, 0x1, 0),
+
 	.cfg_done = VOP_REG(RK3328_REG_CFG_DONE, 0x1, 0),
 };
 
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index 70d76bb59f..675616240e 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -112,6 +112,10 @@
 #define RK3288_DSP_VACT_ST_END			0x0194
 #define RK3288_DSP_VS_ST_END_F1			0x0198
 #define RK3288_DSP_VACT_ST_END_F1		0x019c
+
+#define RK3288_BCSH_COLOR_BAR			0x01b0
+#define RK3288_BCSH_BCS				0x01b4
+#define RK3288_BCSH_H				0x01b8
 /* register definition end */
 
 /* rk3368 register definition */
diff --git a/include/drm_modes.h b/include/drm_modes.h
index bc8d569f63..e77f3a6bbc 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -56,6 +56,64 @@
 #define DRM_EDID_PT_STEREO         (1 << 5)
 #define DRM_EDID_PT_INTERLACED     (1 << 7)
 
+/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
+enum v4l2_colorspace {
+	/*
+	 * Default colorspace, i.e. let the driver figure it out.
+	 * Can only be used with video capture.
+	 */
+	V4L2_COLORSPACE_DEFAULT       = 0,
+
+	/* SMPTE 170M: used for broadcast NTSC/PAL SDTV */
+	V4L2_COLORSPACE_SMPTE170M     = 1,
+
+	/* Obsolete pre-1998 SMPTE 240M HDTV standard, superseded by Rec 709 */
+	V4L2_COLORSPACE_SMPTE240M     = 2,
+
+	/* Rec.709: used for HDTV */
+	V4L2_COLORSPACE_REC709        = 3,
+
+	/*
+	 * Deprecated, do not use. No driver will ever return this. This was
+	 * based on a misunderstanding of the bt878 datasheet.
+	 */
+	V4L2_COLORSPACE_BT878         = 4,
+
+	/*
+	 * NTSC 1953 colorspace. This only makes sense when dealing with
+	 * really, really old NTSC recordings. Superseded by SMPTE 170M.
+	 */
+	V4L2_COLORSPACE_470_SYSTEM_M  = 5,
+
+	/*
+	 * EBU Tech 3213 PAL/SECAM colorspace. This only makes sense when
+	 * dealing with really old PAL/SECAM recordings. Superseded by
+	 * SMPTE 170M.
+	 */
+	V4L2_COLORSPACE_470_SYSTEM_BG = 6,
+
+	/*
+	 * Effectively shorthand for V4L2_COLORSPACE_SRGB, V4L2_YCBCR_ENC_601
+	 * and V4L2_QUANTIZATION_FULL_RANGE. To be used for (Motion-)JPEG.
+	 */
+	V4L2_COLORSPACE_JPEG          = 7,
+
+	/* For RGB colorspaces such as produces by most webcams. */
+	V4L2_COLORSPACE_SRGB          = 8,
+
+	/* AdobeRGB colorspace */
+	V4L2_COLORSPACE_ADOBERGB      = 9,
+
+	/* BT.2020 colorspace, used for UHDTV. */
+	V4L2_COLORSPACE_BT2020        = 10,
+
+	/* Raw colorspace: for RAW unprocessed images */
+	V4L2_COLORSPACE_RAW           = 11,
+
+	/* DCI-P3 colorspace, used by cinema projectors */
+	V4L2_COLORSPACE_DCI_P3        = 12,
+};
+
 struct drm_display_mode {
 	/* Proposed mode values */
 	int clock;		/* in kHz */

commit 7130fbf68d11caadbe9f99cff39bb55b9aface94
Author: Sandy Huang <hjc@rock-chips.com>
Date:   Fri Feb 2 10:55:38 2018 +0800

    drm/rockchip: vop: add support px30
    
    PX30 have two vop(vopb and vopl), the vopb have win0, win1 and win2,
    the vopl only have win1,most of register define is same with rk3366,
    so we porting the rk3366 vop register define for px30.
    
    win0: support yuv and scale;
    win1: support rgbx and afbdc format(vopb only);
    win2: support rgbx and four region;
    
    Change-Id: Ib9b796516e2bd43d98c79d5d3226a9e167739f76
    Signed-off-by: Sandy Huang <hjc@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 45d827a9ab..350c0fa24b 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -22,6 +22,16 @@ static const struct rockchip_crtc rk3036_vop_data = {
 	.data = &rk3036_vop,
 };
 
+static const struct rockchip_crtc px30_vop_lit_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &px30_vop_lit,
+};
+
+static const struct rockchip_crtc px30_vop_big_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &px30_vop_big,
+};
+
 static const struct rockchip_crtc rk3288_vop_data = {
 	.funcs = &rockchip_vop_funcs,
 	.data = &rk3288_vop,
@@ -64,6 +74,12 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	}, {
 		.compatible = "rockchip,rk3126-vop",
 		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,px30-vop-lit",
+		.data = (ulong)&px30_vop_lit_data,
+	}, {
+		.compatible = "rockchip,px30-vop-big",
+		.data = (ulong)&px30_vop_big_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop",
 		.data = (ulong)&rk3288_vop_data,
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
index 087a84cd98..7d23f7d1c4 100644
--- a/drivers/video/drm/rockchip_crtc.h
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -26,6 +26,8 @@ struct rockchip_crtc_funcs {
 struct vop_data;
 extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
 extern const struct vop_data rk3036_vop;
+extern const struct vop_data px30_vop_lit;
+extern const struct vop_data px30_vop_big;
 extern const struct vop_data rk3288_vop;
 extern const struct vop_data rk3368_vop;
 extern const struct vop_data rk3366_vop;
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
index 387632ea75..8b2d3ffc4e 100644
--- a/drivers/video/drm/rockchip_vop.h
+++ b/drivers/video/drm/rockchip_vop.h
@@ -239,17 +239,26 @@ struct vop_ctrl {
 	struct vop_reg dclk_ddr;
 	struct vop_reg p2i_en;
 	struct vop_reg rgb_en;
+	struct vop_reg lvds_en;
 	struct vop_reg edp_en;
 	struct vop_reg hdmi_en;
 	struct vop_reg mipi_en;
 	struct vop_reg data01_swap;
 	struct vop_reg mipi_dual_channel_en;
 	struct vop_reg dp_en;
+	struct vop_reg dclk_pol;
 	struct vop_reg pin_pol;
+	struct vop_reg rgb_dclk_pol;
 	struct vop_reg rgb_pin_pol;
+	struct vop_reg lvds_dclk_pol;
+	struct vop_reg lvds_pin_pol;
+	struct vop_reg hdmi_dclk_pol;
 	struct vop_reg hdmi_pin_pol;
+	struct vop_reg edp_dclk_pol;
 	struct vop_reg edp_pin_pol;
+	struct vop_reg mipi_dclk_pol;
 	struct vop_reg mipi_pin_pol;
+	struct vop_reg dp_dclk_pol;
 	struct vop_reg dp_pin_pol;
 
 	struct vop_reg dither_up;
@@ -270,6 +279,49 @@ struct vop_ctrl {
 	struct vop_reg ymirror;
 	struct vop_reg dsp_background;
 
+	/* CABC */
+	struct vop_reg cabc_total_num;
+	struct vop_reg cabc_config_mode;
+	struct vop_reg cabc_stage_up_mode;
+	struct vop_reg cabc_scale_cfg_value;
+	struct vop_reg cabc_scale_cfg_enable;
+	struct vop_reg cabc_global_dn_limit_en;
+	struct vop_reg cabc_lut_en;
+	struct vop_reg cabc_en;
+	struct vop_reg cabc_handle_en;
+	struct vop_reg cabc_stage_up;
+	struct vop_reg cabc_stage_down;
+	struct vop_reg cabc_global_dn;
+	struct vop_reg cabc_calc_pixel_num;
+
+	/* BCSH */
+	struct vop_reg bcsh_brightness;
+	struct vop_reg bcsh_contrast;
+	struct vop_reg bcsh_sat_con;
+	struct vop_reg bcsh_sin_hue;
+	struct vop_reg bcsh_cos_hue;
+	struct vop_reg bcsh_r2y_csc_mode;
+	struct vop_reg bcsh_r2y_en;
+	struct vop_reg bcsh_y2r_csc_mode;
+	struct vop_reg bcsh_y2r_en;
+	struct vop_reg bcsh_color_bar;
+	struct vop_reg bcsh_out_mode;
+	struct vop_reg bcsh_en;
+
+	/* MCU OUTPUT */
+	struct vop_reg mcu_pix_total;
+	struct vop_reg mcu_cs_pst;
+	struct vop_reg mcu_cs_pend;
+	struct vop_reg mcu_rw_pst;
+	struct vop_reg mcu_rw_pend;
+	struct vop_reg mcu_clk_sel;
+	struct vop_reg mcu_hold_mode;
+	struct vop_reg mcu_frame_st;
+	struct vop_reg mcu_rs;
+	struct vop_reg mcu_bypass;
+	struct vop_reg mcu_type;
+	struct vop_reg mcu_rw_bypass_port;
+
 	struct vop_reg win_gate[4];
 	struct vop_reg cfg_done;
 };
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index 057448c51c..c3a054485d 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -315,3 +315,126 @@ const struct vop_data rk3036_vop = {
 	.line_flag = &rk3036_vop_line_flag,
 	.reg_len = RK3036_DSP_VACT_ST_END_F1 * 4,
 };
+
+static const struct vop_scl_regs rk3366_lit_win_scl = {
+	.scale_yrgb_x = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
+	.scale_yrgb_y = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
+	.scale_cbcr_x = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
+	.scale_cbcr_y = VOP_REG(RK3366_LIT_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
+};
+
+static const struct vop_win rk3366_win0_data = {
+	.scl = &rk3366_lit_win_scl,
+
+	.enable = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x1, 0),
+	.format = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x7, 1),
+	.rb_swap = VOP_REG(RK3366_LIT_WIN0_CTRL0, 0x1, 12),
+	.act_info = VOP_REG(RK3366_LIT_WIN0_ACT_INFO, 0xffffffff, 0),
+	.dsp_info = VOP_REG(RK3366_LIT_WIN0_DSP_INFO, 0xffffffff, 0),
+	.dsp_st = VOP_REG(RK3366_LIT_WIN0_DSP_ST, 0xffffffff, 0),
+	.yrgb_mst = VOP_REG(RK3366_LIT_WIN0_YRGB_MST0, 0xffffffff, 0),
+	.uv_mst = VOP_REG(RK3366_LIT_WIN0_CBR_MST0, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3366_LIT_WIN0_VIR, 0x1fff, 0),
+	.uv_vir = VOP_REG(RK3366_LIT_WIN0_VIR, 0x1fff, 16),
+
+	.alpha_mode = VOP_REG(RK3366_LIT_WIN0_ALPHA_CTRL, 0x1, 1),
+	.alpha_en = VOP_REG(RK3366_LIT_WIN0_ALPHA_CTRL, 0x1, 0),
+};
+
+static const struct vop_win rk3366_win1_data = {
+	.enable = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x1, 0),
+	.format = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x7, 4),
+	.rb_swap = VOP_REG(RK3366_LIT_WIN1_CTRL0, 0x1, 12),
+	.dsp_info = VOP_REG(RK3366_LIT_WIN1_DSP_INFO, 0xffffffff, 0),
+	.dsp_st = VOP_REG(RK3366_LIT_WIN1_DSP_ST, 0xffffffff, 0),
+	.yrgb_mst = VOP_REG(RK3366_LIT_WIN1_MST, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3366_LIT_WIN1_VIR, 0x1fff, 0),
+
+	.alpha_mode = VOP_REG(RK3366_LIT_WIN1_ALPHA_CTRL, 0x1, 1),
+	.alpha_en = VOP_REG(RK3366_LIT_WIN1_ALPHA_CTRL, 0x1, 0),
+};
+
+static const struct vop_ctrl px30_ctrl_data = {
+	.standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1),
+	.htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
+	.hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0),
+	.vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
+	.vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0),
+	.dsp_interlace = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 0),
+	.global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13),
+	.auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0),
+	.dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 22),
+	.overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4),
+	.core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
+	.dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14),
+	.rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0),
+	.rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2),
+	.hdmi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 8),
+	.hdmi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 10),
+	.lvds_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 16),
+	.lvds_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 18),
+	.mipi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 24),
+	.mipi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 26),
+	.mipi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 25),
+	.lvds_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 17),
+	.hdmi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 9),
+	.rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1),
+	.dither_up = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
+	.dither_down = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x7, 6),
+	.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
+	.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
+	.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
+	.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
+	.dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3),
+	.dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5),
+	.out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16),
+	.dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0),
+	.cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0),
+
+	.bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0),
+	.bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1),
+	.bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2),
+	.bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4),
+	.bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6),
+	.bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7),
+	.bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0),
+	.bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0),
+	.bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8),
+	.bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20),
+	.bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0),
+	.bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16),
+
+	.cabc_config_mode = VOP_REG(PX30_CABC_CTRL0, 0x3, 2),
+	.cabc_calc_pixel_num = VOP_REG(PX30_CABC_CTRL0, 0x7fffff, 4),
+	.cabc_handle_en = VOP_REG(PX30_CABC_CTRL0, 0x1, 1),
+	.cabc_en = VOP_REG(PX30_CABC_CTRL0, 0x1, 0),
+	.cabc_total_num = VOP_REG(PX30_CABC_CTRL1, 0x7fffff, 4),
+	.cabc_lut_en = VOP_REG(PX30_CABC_CTRL1, 0x1, 0),
+	.cabc_stage_up_mode = VOP_REG(PX30_CABC_CTRL2, 0x1, 19),
+	.cabc_stage_up = VOP_REG(PX30_CABC_CTRL2, 0x1ff, 8),
+	.cabc_stage_down = VOP_REG(PX30_CABC_CTRL2, 0xff, 0),
+	.cabc_global_dn = VOP_REG(PX30_CABC_CTRL3, 0xff, 0),
+	.cabc_global_dn_limit_en = VOP_REG(PX30_CABC_CTRL3, 0x1, 8),
+};
+
+static const struct vop_line_flag rk3366_vop_lite_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3366_LIT_LINE_FLAG, 0xfff, 0),
+};
+
+const struct vop_data px30_vop_lit = {
+	.version = VOP_VERSION(2, 5),
+	.ctrl = &px30_ctrl_data,
+	.win = &rk3366_win1_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
+
+const struct vop_data px30_vop_big = {
+	.version = VOP_VERSION(2, 6),
+	.ctrl = &px30_ctrl_data,
+	.win = &rk3366_win0_data,
+	.line_flag = &rk3366_vop_lite_line_flag,
+	.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
+};
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
index ed0c22e21e..70d76bb59f 100644
--- a/drivers/video/drm/rockchip_vop_reg.h
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -869,4 +869,87 @@
 #define RK3036_HWC_LUT_ADDR		0x800
 /* rk3036 register definition end */
 
+/* rk3366 register definition */
+#define RK3366_LIT_REG_CFG_DONE			0x00000
+#define RK3366_LIT_VERSION			0x00004
+#define RK3366_LIT_DSP_BG			0x00008
+#define RK3366_LIT_MCU_CTRL			0x0000c
+#define RK3366_LIT_SYS_CTRL0			0x00010
+#define RK3366_LIT_SYS_CTRL1			0x00014
+#define RK3366_LIT_SYS_CTRL2			0x00018
+#define RK3366_LIT_DSP_CTRL0			0x00020
+#define RK3366_LIT_DSP_CTRL2			0x00028
+#define RK3366_LIT_VOP_STATUS			0x0002c
+#define RK3366_LIT_LINE_FLAG			0x00030
+#define RK3366_LIT_INTR_EN			0x00034
+#define RK3366_LIT_INTR_CLEAR			0x00038
+#define RK3366_LIT_INTR_STATUS			0x0003c
+#define RK3366_LIT_WIN0_CTRL0			0x00050
+#define RK3366_LIT_WIN0_CTRL1			0x00054
+#define RK3366_LIT_WIN0_COLOR_KEY		0x00058
+#define RK3366_LIT_WIN0_VIR			0x0005c
+#define RK3366_LIT_WIN0_YRGB_MST0		0x00060
+#define RK3366_LIT_WIN0_CBR_MST0		0x00064
+#define RK3366_LIT_WIN0_ACT_INFO		0x00068
+#define RK3366_LIT_WIN0_DSP_INFO		0x0006c
+#define RK3366_LIT_WIN0_DSP_ST			0x00070
+#define RK3366_LIT_WIN0_SCL_FACTOR_YRGB		0x00074
+#define RK3366_LIT_WIN0_SCL_FACTOR_CBR		0x00078
+#define RK3366_LIT_WIN0_SCL_OFFSET		0x0007c
+#define RK3366_LIT_WIN0_ALPHA_CTRL		0x00080
+#define RK3366_LIT_WIN1_CTRL0			0x00090
+#define RK3366_LIT_WIN1_CTRL1			0x00094
+#define RK3366_LIT_WIN1_VIR			0x00098
+#define RK3366_LIT_WIN1_MST			0x000a0
+#define RK3366_LIT_WIN1_DSP_INFO		0x000a4
+#define RK3366_LIT_WIN1_DSP_ST			0x000a8
+#define RK3366_LIT_WIN1_COLOR_KEY		0x000ac
+#define RK3366_LIT_WIN1_ALPHA_CTRL		0x000bc
+#define RK3366_LIT_HWC_CTRL0			0x000e0
+#define RK3366_LIT_HWC_CTRL1			0x000e4
+#define RK3366_LIT_HWC_MST			0x000e8
+#define RK3366_LIT_HWC_DSP_ST			0x000ec
+#define RK3366_LIT_HWC_ALPHA_CTRL		0x000f0
+#define RK3366_LIT_DSP_HTOTAL_HS_END		0x00100
+#define RK3366_LIT_DSP_HACT_ST_END		0x00104
+#define RK3366_LIT_DSP_VTOTAL_VS_END		0x00108
+#define RK3366_LIT_DSP_VACT_ST_END		0x0010c
+#define RK3366_LIT_DSP_VS_ST_END_F1		0x00110
+#define RK3366_LIT_DSP_VACT_ST_END_F1		0x00114
+#define RK3366_LIT_BCSH_CTRL			0x00160
+#define RK3366_LIT_BCSH_COL_BAR			0x00164
+#define RK3366_LIT_BCSH_BCS			0x00168
+#define RK3366_LIT_BCSH_H			0x0016c
+#define RK3366_LIT_FRC_LOWER01_0		0x00170
+#define RK3366_LIT_FRC_LOWER01_1		0x00174
+#define RK3366_LIT_FRC_LOWER10_0		0x00178
+#define RK3366_LIT_FRC_LOWER10_1		0x0017c
+#define RK3366_LIT_FRC_LOWER11_0		0x00180
+#define RK3366_LIT_FRC_LOWER11_1		0x00184
+#define RK3366_LIT_MCU_RW_BYPASS_PORT		0x0018c
+#define RK3366_LIT_DBG_REG_000			0x00190
+#define RK3366_LIT_BLANKING_VALUE		0x001f4
+#define RK3366_LIT_FLAG_REG_FRM_VALID		0x001f8
+#define RK3366_LIT_FLAG_REG			0x001fc
+#define RK3366_LIT_HWC_LUT_ADDR			0x00600
+#define RK3366_LIT_GAMMA_LUT_ADDR		0x00a00
+/* rk3366 register definition end */
+
+/* px30 register definition */
+#define PX30_CABC_CTRL0				0x00200
+#define PX30_CABC_CTRL1				0x00204
+#define PX30_CABC_CTRL2				0x00208
+#define PX30_CABC_CTRL3				0x0020c
+#define PX30_CABC_GAUSS_LINE0_0			0x00210
+#define PX30_CABC_GAUSS_LINE0_1			0x00214
+#define PX30_CABC_GAUSS_LINE1_0			0x00218
+#define PX30_CABC_GAUSS_LINE1_1			0x0021c
+#define PX30_CABC_GAUSS_LINE2_0			0x00220
+#define PX30_CABC_GAUSS_LINE2_1			0x00224
+#define PX30_AFBCD0_CTRL			0x00240
+#define PX30_AFBCD0_HDR_PTR			0x00244
+#define PX30_AFBCD0_PIC_SIZE			0x00248
+#define PX30_AFBCD0_PIC_OFFSET			0x0024c
+#define PX30_AFBCD0_AXI_CTRL			0x00250
+/* px30 register definition end */
 #endif /* _ROCKCHIP_VOP_REG_H */

commit 55e9fafcca1bb04365c89b9a045ed5ee485ed630
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 18:17:51 2018 +0800

    core: do not fail in device_probe() when clk set default fail
    
    Assigned clocks are widely used in kernel, but not in U-Boot yet,
    many U-Boot clock driver do not have the API while dts port from kernel
    have "assigned-clocks" node.
    
    Just give a warning now instead of a device probe fail.
    
    Change-Id: Icc1da8bdd1a21d6d118e37d305bd7909758c40b2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 9d58f44ee1..b68b277bd8 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -407,7 +407,7 @@ int device_probe(struct udevice *dev)
 	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
 	ret = clk_set_defaults(dev);
 	if (ret)
-		goto fail;
+		debug("%s clk_set_defaults failed %d\n", __func__, ret);
 
 	if (drv->probe) {
 		ret = drv->probe(dev);

commit b15a08dd6889c72736c1a0c01f0e739e73c0ec38
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 10:07:31 2018 +0800

    configs: rockchip: enable display for evb-px30
    
    Change-Id: I982c253ecc7f5e6ddbdf9cad459c9f59e720fb60
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index f1bd27e663..167c1a928b 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -72,6 +72,15 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330d
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_DRM_ROCKCHIP_DSI_PANEL=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index 836f60f546..b54fb7fd9c 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -11,7 +11,11 @@
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
 
+#undef CONFIG_CONSOLE_SCROLL_LINES
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
 #undef CONFIG_BOOTCOMMAND
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 6c9676181d..e8fadc6646 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -60,6 +60,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit 1e44acfc6902837d129e4265cff6a8af3e49b1b6
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 10:14:27 2018 +0800

    video/drm: display: check route_* status
    
    Change-Id: I2154678dc200f453b1dd9af624c3c616b9871a5d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 127390fb96..192ea8b3b2 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -85,10 +85,9 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 
 	node = dev_read_subnode(conn_state->dev, "panel");
 	if (ofnode_valid(node) &&
-	    of_device_is_available(ofnode_to_np(node))){
+	    of_device_is_available(ofnode_to_np(node))) {
 		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, node, &dev);
-		if(!ret) {
-			printf("%s get panel dev\n", __func__);
+		if (!ret) {
 			panel_state->node = node;
 			return dev;
 		}
@@ -122,12 +121,10 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
 							  np_to_ofnode(panel),
 							  &dev);
-			if (ret) {
-				printf("Warn: can't find panel drv %d\n", ret);
-				continue;
+			if (!ret) {
+				panel_state->node = np_to_ofnode(panel);
+				return dev;
 			}
-			panel_state->node = np_to_ofnode(panel);
-			return dev;
 		}
 	}
 
@@ -144,9 +141,10 @@ static int connector_phy_init(struct display_state *state)
 	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
 					   &dev);
 	if (ret) {
-		printf("Warn: can't find phy driver\n");
+		debug("Warn: can't find phy driver\n");
 		return 0;
 	}
+
 	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
 		printf("failed to find phy driver\n");
@@ -197,10 +195,13 @@ static int connector_panel_init(struct display_state *state)
 		printf("failed to init panel driver\n");
 		return ret;
 	}
+
 	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
 	if (!ofnode_valid(dsp_lut_node)) {
-		printf("%s can not find dsp-lut node\n", __func__);
+		debug("%s can not find dsp-lut node\n", __func__);
+		return 0;
 	}
+
 	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
 	if (len > 0) {
 		conn_state->gamma.size = len / sizeof(u32);
@@ -817,7 +818,9 @@ static int rockchip_display_probe(struct udevice *dev)
 	if (!ofnode_valid(route_node))
 		return -ENODEV;
 
-	ofnode_for_each_subnode(node, route_node){
+	ofnode_for_each_subnode(node, route_node) {
+		if (!ofnode_is_available(node))
+			continue;
 		phandle = ofnode_read_u32_default(node, "connect", -1);
 		if (phandle < 0) {
 			printf("Warn: can't find connect node's handle\n");

commit 38efbccc2d92b96a9ea7d23b77179646714e5ba9
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 10:10:08 2018 +0800

    video/drm: panel_simple: correct delay name
    
    Change-Id: I3df8e20cac2176b0f739128ff7c7a7856c8e39d3
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 6eb77b0c1c..d577d33ebd 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -135,13 +135,13 @@ static int panel_simple_parse_dt(const void *blob, ofnode node,
 
 	panel->power_invert = !!ofnode_read_s32_default(node, "power_invert", 0);
 
-	panel->delay_prepare = ofnode_read_s32_default(node, "delay,prepare", 0);
-	panel->delay_unprepare = ofnode_read_s32_default(node, "delay,unprepare", 0);
-	panel->delay_enable = ofnode_read_s32_default(node, "delay,enable", 0);
-	panel->delay_disable = ofnode_read_s32_default(node, "delay,disable", 0);
+	panel->delay_prepare = ofnode_read_s32_default(node, "prepare-delay-ms", 0);
+	panel->delay_unprepare = ofnode_read_s32_default(node, "unprepare-delay-ms", 0);
+	panel->delay_enable = ofnode_read_s32_default(node, "enable-delay-ms", 0);
+	panel->delay_disable = ofnode_read_s32_default(node, "disable-delay-ms", 0);
 	panel->bus_format = ofnode_read_s32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
 
-	printf("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
+	debug("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
 	       panel->delay_prepare, panel->delay_unprepare,
 	       panel->delay_enable, panel->delay_disable);
 

commit 30d6d4339c76deca140c9b76ebf18444c1c8be06
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 14:39:12 2018 +0800

    video/drm: lvds: Add support for PX30
    
    Change-Id: I3ba982a42dad00014db4ce432843ca026023360d
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index 9720d26ea4..1ed54647c5 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -73,10 +73,4 @@ extern const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data;
 extern const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data;
 extern const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data;
 #endif
-#ifdef CONFIG_DRM_ROCKCHIP_LVDS
-struct rockchip_lvds_chip_data;
-extern const struct rockchip_connector_funcs rockchip_lvds_funcs;
-extern const struct rockchip_lvds_chip_data rk3368_lvds_drv_data;
-extern const struct rockchip_lvds_chip_data rk3288_lvds_drv_data;
-#endif
 #endif
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index cc4bbff1e0..86617e8524 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -12,6 +12,7 @@
 #include <linux/list.h>
 #include <linux/ioport.h>
 #include <asm/io.h>
+#include <asm/hardware.h>
 #include <dm/device.h>
 #include <dm/read.h>
 #include <dm/ofnode.h>
@@ -25,9 +26,10 @@
 #include "rockchip_lvds.h"
 
 enum rockchip_lvds_sub_devtype {
+	PX30_LVDS,
+	RK3126_LVDS,
 	RK3288_LVDS,
 	RK3368_LVDS,
-	RK3126_LVDS,
 };
 
 struct rockchip_lvds_chip_data {
@@ -131,28 +133,6 @@ static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
 	return 0;
 }
 
-const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
-	.chip_type = RK3126_LVDS,
-	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
-	.grf_soc_con15 = RK3126_GRF_CON1,
-	.has_vop_sel = true,
-};
-
-const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
-	.chip_type = RK3368_LVDS,
-	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
-	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
-	.has_vop_sel = false,
-};
-
-const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
-	.chip_type = RK3288_LVDS,
-	.has_vop_sel = true,
-	.grf_soc_con6 = 0x025c,
-	.grf_soc_con7 = 0x0260,
-	.grf_gpio1d_iomux = 0x000c,
-};
-
 static int rk336x_lvds_pwr_off(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -230,6 +210,51 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 	return 0;
 }
 
+static void px30_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+	int ret;
+
+	ret = dev_read_stringlist_search(conn_state->dev, "pinctrl-names", "m0");
+	if (ret < 0) {
+		/* iomux to lcdcm1 */
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0x000f, 0x0001);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0x0f0f, 0x0101);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xff00, 0x1100);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0x00f0, 0x0010);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
+	} else {
+		/* iomux to lcdcm0 */
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3A_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3B_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_L, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3C_IOMUX_H, 0xffff, 0x1111);
+		rk_clrsetreg(lvds->grf + PX30_GRF_GPIO3D_IOMUX_L, 0xffff, 0x1111);
+		return;
+	}
+
+	/* enable lvds mode */
+	val = PX30_LVDS_PHY_MODE(0) | PX30_DPHY_FORCERXMODE(1);
+	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
+
+	/* enable lane */
+	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+	lvds_writel(lvds, MIPIPHY_REGEB, val);
+	/* set ttl mode and reset phy config */
+	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
+		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
+	lvds_writel(lvds, MIPIPHY_REGE0, val);
+	rk336x_lvds_pwr_on(state);
+}
+
 static void rk3126_output_ttl(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -312,6 +337,38 @@ static void rk336x_output_ttl(struct display_state *state)
 	rk336x_lvds_pwr_on(state);
 }
 
+static void px30_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* enable lvds mode */
+	val = PX30_LVDS_PHY_MODE(1) | PX30_DPHY_FORCERXMODE(1);
+	/* config lvds_format */
+	val |= PX30_LVDS_OUTPUT_FORMAT(lvds->format);
+	/* LSB receive mode */
+	val |= PX30_LVDS_MSBSEL(LVDS_MSB_D7);
+	writel(val, lvds->grf + PX30_GRF_PD_VO_CON1);
+
+	/* digital internal disable */
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
+
+	/* set pll prediv and fbdiv */
+	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
+	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
+
+	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
+
+	/* set lvds mode and reset phy config */
+	lvds_msk_reg(lvds, MIPIPHY_REGE0,
+		     m_MSB_SEL | m_DIG_INTER_RST,
+		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+
+	rk336x_lvds_pwr_on(state);
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+}
+
 static void rk3126_output_lvds(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -517,14 +574,14 @@ static int rockchip_lvds_init(struct display_state *state)
 	if (pdata->chip_type == RK3288_LVDS) {
 		lvds->regbase = dev_read_addr_ptr(conn_state->dev);
 	} else {
-		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_phy", &lvds_phy);
+		i = dev_read_resource(conn_state->dev, 0, &lvds_phy);
 		if (i) {
 			printf("can't get regs lvds_phy addresses!\n");
 			free(lvds);
 			return -ENOMEM;
 		}
 
-		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_ctl", &lvds_ctrl);
+		i = dev_read_resource(conn_state->dev, 1, &lvds_ctrl);
 		if (i) {
 			printf("can't get regs lvds_ctrl addresses!\n");
 			free(lvds);
@@ -534,7 +591,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		lvds->regbase = (void *)lvds_phy.start;
 		lvds->ctrl_reg = (void *)lvds_ctrl.start;
 	}
-	printf("%s regbase %p\n", __func__, lvds->regbase);
+
 	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (lvds->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -619,6 +676,13 @@ static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pip
 		else
 			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
 		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
+	} else if (lvds->pdata->chip_type == PX30_LVDS) {
+		if (lvds->output == DISPLAY_OUTPUT_RGB)
+			writel(PX30_RGB_VOP_SEL(pipe),
+			       lvds->grf + PX30_GRF_PD_VO_CON1);
+		else if (lvds->output == DISPLAY_OUTPUT_LVDS)
+			writel(PX30_LVDS_VOP_SEL(pipe),
+			       lvds->grf + PX30_GRF_PD_VO_CON1);
 	}
 }
 
@@ -636,6 +700,8 @@ static int rockchip_lvds_enable(struct display_state *state)
 			rk3288_output_lvds(state);
 		else if (lvds->pdata->chip_type == RK3126_LVDS)
 			rk3126_output_lvds(state);
+		else if (lvds->pdata->chip_type == PX30_LVDS)
+			px30_output_lvds(state);
 		else
 			rk336x_output_lvds(state);
 	} else {
@@ -643,6 +709,8 @@ static int rockchip_lvds_enable(struct display_state *state)
 			rk3288_output_ttl(state);
 		else if (lvds->pdata->chip_type == RK3126_LVDS)
 			rk3126_output_ttl(state);
+		else if (lvds->pdata->chip_type == PX30_LVDS)
+			px30_output_ttl(state);
 		else
 			rk336x_output_ttl(state);
 	}
@@ -671,9 +739,34 @@ const struct rockchip_connector_funcs rockchip_lvds_funcs = {
 	.disable = rockchip_lvds_disable,
 };
 
-static const struct rockchip_connector rk3368_lvds_data = {
+static const struct rockchip_lvds_chip_data px30_lvds_drv_data = {
+	.chip_type = PX30_LVDS,
+	.has_vop_sel = true,
+};
+
+static const struct rockchip_connector px30_lvds_data = {
 	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3368_lvds_drv_data,
+	 .data = &px30_lvds_drv_data,
+};
+
+static const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
+	.chip_type = RK3126_LVDS,
+	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
+	.grf_soc_con15 = RK3126_GRF_CON1,
+	.has_vop_sel = true,
+};
+
+static const struct rockchip_connector rk3126_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3126_lvds_drv_data,
+};
+
+static const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
+	.chip_type = RK3288_LVDS,
+	.has_vop_sel = true,
+	.grf_soc_con6 = 0x025c,
+	.grf_soc_con7 = 0x0260,
+	.grf_gpio1d_iomux = 0x000c,
 };
 
 static const struct rockchip_connector rk3288_lvds_data = {
@@ -681,22 +774,36 @@ static const struct rockchip_connector rk3288_lvds_data = {
 	 .data = &rk3288_lvds_drv_data,
 };
 
-static const struct rockchip_connector rk3126_lvds_data = {
+static const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
+	.chip_type = RK3368_LVDS,
+	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
+	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
+	.has_vop_sel = false,
+};
+
+static const struct rockchip_connector rk3368_lvds_data = {
 	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3126_lvds_drv_data,
+	 .data = &rk3368_lvds_drv_data,
 };
 
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
-	 .compatible = "rockchip,rk3368-lvds",
-	 .data = (ulong)&rk3368_lvds_data,
-	}, {
-	 .compatible = "rockchip,rk3288-lvds",
-	 .data = (ulong)&rk3288_lvds_data,
-	}, {
-	 .compatible = "rockchip,rk3126-lvds",
-	 .data = (ulong)&rk3126_lvds_data,
-	}, {}
+		.compatible = "rockchip,px30-lvds",
+		.data = (ulong)&px30_lvds_data,
+	},
+	{
+		.compatible = "rockchip,rk3126-lvds",
+		.data = (ulong)&rk3126_lvds_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-lvds",
+		.data = (ulong)&rk3288_lvds_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-lvds",
+		.data = (ulong)&rk3368_lvds_data,
+	},
+	{}
 };
 
 U_BOOT_DRIVER(rockchip_lvds) = {
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 40a294ee4f..549ce4a473 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -112,6 +112,21 @@
 #define RK3126_GRF_GPIO2C_IOMUX2	0x00e8  /* d18 d19 d20 d21 */
 #define RK3126_GRF_GPIO2D_IOMUX	0x00d4  /* d22 d23 0x700c1004*/
 
+#define PX30_GRF_PD_VO_CON0	0x0434
+#define PX30_GRF_PD_VO_CON1	0x0438
+#define PX30_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 0x3, 13) | BITS_EN(0x3, 13))
+#define PX30_LVDS_PHY_MODE(x)		(BITS_MASK(x, 0x1, 12) | BITS_EN(0x1, 12))
+#define PX30_LVDS_MSBSEL(x)		(BITS_MASK(x, 0x1, 11) | BITS_EN(0x1, 11))
+#define PX30_DPHY_FORCERXMODE(x)	(BITS_MASK(x, 0x1,  6) | BITS_EN(0x1,  6))
+#define PX30_RGB_VOP_SEL(x)		(BITS_MASK(x, 0x1,  2) | BITS_EN(0x1,  2))
+#define PX30_LVDS_VOP_SEL(x)		(BITS_MASK(x, 0x1,  1) | BITS_EN(0x1,  1))
+#define PX30_GRF_GPIO3A_IOMUX_L	0x0040
+#define PX30_GRF_GPIO3A_IOMUX_H	0x0044
+#define PX30_GRF_GPIO3B_IOMUX_L	0x0048
+#define PX30_GRF_GPIO3B_IOMUX_H	0x004c
+#define PX30_GRF_GPIO3C_IOMUX_L	0x0050
+#define PX30_GRF_GPIO3C_IOMUX_H	0x0054
+#define PX30_GRF_GPIO3D_IOMUX_L	0x0058
 
 #define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))

commit 0c108ca17358cd1dd6d2f45d4c4842e9a6799bbe
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Mon Feb 26 17:17:12 2018 +0800

    video/drm: lvds: remove unused code
    
    Change-Id: I452b6bb6a6dfda2a48d4c4b26aa0a6cf2b8242dc
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index 3e5e2ca0f1..9720d26ea4 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -76,7 +76,6 @@ extern const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data;
 #ifdef CONFIG_DRM_ROCKCHIP_LVDS
 struct rockchip_lvds_chip_data;
 extern const struct rockchip_connector_funcs rockchip_lvds_funcs;
-extern const struct rockchip_lvds_chip_data rk3366_lvds_drv_data;
 extern const struct rockchip_lvds_chip_data rk3368_lvds_drv_data;
 extern const struct rockchip_lvds_chip_data rk3288_lvds_drv_data;
 #endif
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 45216750b2..cc4bbff1e0 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -26,7 +26,6 @@
 
 enum rockchip_lvds_sub_devtype {
 	RK3288_LVDS,
-	RK3366_LVDS,
 	RK3368_LVDS,
 	RK3126_LVDS,
 };
@@ -139,13 +138,6 @@ const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
 	.has_vop_sel = true,
 };
 
-const struct rockchip_lvds_chip_data rk3366_lvds_drv_data = {
-	.chip_type = RK3366_LVDS,
-	.grf_soc_con7  = RK3366_GRF_SOC_CON5,
-	.grf_soc_con15 = RK3366_GRF_SOC_CON6,
-	.has_vop_sel = true,
-};
-
 const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
 	.chip_type = RK3368_LVDS,
 	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
@@ -627,13 +619,6 @@ static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pip
 		else
 			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
 		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
-	} else {
-		if (pipe)
-			val = RK3366_LVDS_VOP_SEL_LIT;
-		else
-			val = RK3366_LVDS_VOP_SEL_BIG;
-
-		writel(val, lvds->grf + RK3366_GRF_SOC_CON0);
 	}
 }
 
@@ -686,11 +671,6 @@ const struct rockchip_connector_funcs rockchip_lvds_funcs = {
 	.disable = rockchip_lvds_disable,
 };
 
-static const struct rockchip_connector rk3366_lvds_data = {
-	 .funcs = &rockchip_lvds_funcs,
-	 .data = &rk3366_lvds_drv_data,
-};
-
 static const struct rockchip_connector rk3368_lvds_data = {
 	 .funcs = &rockchip_lvds_funcs,
 	 .data = &rk3368_lvds_drv_data,
@@ -708,9 +688,6 @@ static const struct rockchip_connector rk3126_lvds_data = {
 
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
-	 .compatible = "rockchip,rk3366-lvds",
-	 .data = (ulong)&rk3366_lvds_data,
-	}, {
 	 .compatible = "rockchip,rk3368-lvds",
 	 .data = (ulong)&rk3368_lvds_data,
 	}, {
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index d06ed18b3b..40a294ee4f 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -102,12 +102,6 @@
 #define BITS_MASK(x, mask, bit)  BITS((x) & (mask), bit)
 #define BITS_EN(mask, bit)       BITS(mask, bit + 16)
 
-#define RK3366_GRF_SOC_CON0	0x0400
-#define RK3366_LVDS_VOP_SEL_LIT	(BITS_MASK(1, 1, 0) | BITS_EN(1, 0))
-#define RK3366_LVDS_VOP_SEL_BIG	(BITS_MASK(0, 1, 0) | BITS_EN(1, 0))
-#define RK3366_GRF_SOC_CON5	0x0414
-#define RK3366_GRF_SOC_CON6	0x0418
-
 #define RK3368_GRF_SOC_CON7	0x041c
 #define RK3368_GRF_SOC_CON15	0x043c
 

commit 211d041f98f1a37a44c94baa42f70952be0b664c
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 14:38:18 2018 +0800

    video/drm: dphy: Add support for PX30
    
    Change-Id: Ia63096a70afd1e24439266abfff51cf259a1297a
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index a808c0bcd9..7c054b90d9 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -124,7 +124,7 @@ struct inno_mipi_dphy_timing {
 struct inno_mipi_dphy {
 	const void *blob;
 	ofnode node;
-	u32 regs;
+	void __iomem *regs;
 
 	unsigned int lane_mbps;
 	int lanes;
@@ -560,11 +560,7 @@ static int inno_mipi_dphy_init(struct display_state *state)
 		return ret;
 	}
 
-	inno->regs = (u32)ofnode_get_addr(node);
-	if (inno->regs == FDT_ADDR_T_NONE) {
-		printf("%s: failed to get mipi phy address\n", __func__);
-		return -ENOMEM;
-	}
+	inno->regs = (void __iomem *)ofnode_get_addr(node);
 
 	conn_state->phy_private = inno;
 
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 4b3fd5f1a1..c6893a29ef 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -17,15 +17,7 @@
 #include "rockchip_phy.h"
 
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-static const struct rockchip_phy rockchip_rk3366_mipi_dphy_data = {
-	 .funcs = &inno_mipi_dphy_funcs,
-};
-
-static const struct rockchip_phy rockchip_rk3368_mipi_dphy_data = {
-	 .funcs = &inno_mipi_dphy_funcs,
-};
-
-static const struct rockchip_phy rockchip_rk312x_mipi_dphy_data = {
+static const struct rockchip_phy rockchip_inno_mipi_dphy_data = {
 	 .funcs = &inno_mipi_dphy_funcs,
 };
 #endif
@@ -33,16 +25,20 @@ static const struct rockchip_phy rockchip_rk312x_mipi_dphy_data = {
 static const struct udevice_id rockchip_phy_ids[] = {
 #ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 	{
-	 .compatible = "rockchip,rk3366-mipi-dphy",
-	 .data = (ulong)&rockchip_rk3366_mipi_dphy_data,
+		.compatible = "rockchip,px30-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
+	},
+	{
+		.compatible = "rockchip,rk3128-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
 	{
-	 .compatible = "rockchip,rk3368-mipi-dphy",
-	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
+		.compatible = "rockchip,rk3366-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
 	{
-	 .compatible = "rockchip,rk3128-mipi-dphy",
-	 .data = (ulong)&rockchip_rk312x_mipi_dphy_data,
+		.compatible = "rockchip,rk3368-mipi-dphy",
+		.data = (ulong)&rockchip_inno_mipi_dphy_data,
 	},
 #endif
 	{}

commit 4a2a52ec6d9d8e90f390ed3b899cc0cebf56aa16
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 10:13:26 2018 +0800

    video/drm: dsi: Add support for PX30
    
    Change-Id: I96b966f10c281ab144f84395fa3ab9568c17a4f6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 173446b9bd..7c0073147f 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -263,6 +263,7 @@ enum {
 };
 
 enum soc_type {
+	PX30,
 	RK3128,
 	RK3288,
 	RK3366,
@@ -1135,6 +1136,26 @@ static const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
 	.transfer = rockchip_dw_mipi_dsi_transfer,
 };
 
+static const u32 px30_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0434,  7,  7),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0434,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0434,  2,  2),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0438,  7, 10),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0438,  5,  5),
+	[VOPSEL]		= GRF_REG_FIELD(0x0438,  0,  0),
+};
+
+static const struct dw_mipi_dsi_plat_data px30_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = px30_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = PX30,
+};
+
+static const struct rockchip_connector px30_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &px30_mipi_dsi_drv_data,
+};
+
 static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
 	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0150, 10, 13),
 	[FORCERXMODE]		= GRF_REG_FIELD(0x0150,  9,  9),
@@ -1271,6 +1292,10 @@ static const struct rockchip_connector rk3399_mipi_dsi_data = {
 };
 
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
+	{
+		.compatible = "rockchip,px30-mipi-dsi",
+		.data = (ulong)&px30_mipi_dsi_data,
+	},
 	{
 		.compatible = "rockchip,rk3128-mipi-dsi",
 		.data = (ulong)&rk3128_mipi_dsi_data,

commit c39a6706c52f4ed2c6a025f085b614255d60e8d4
Author: Wyon Bi <bivvy.bi@rock-chips.com>
Date:   Fri Feb 2 10:09:50 2018 +0800

    video/drm: dsi: Add a better description for dw_mipi_dsi_plat_data
    
    Change-Id: I5c172902f313c328c9c50f579b8ec5d149ca45e6
    Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 05175fe44c..173446b9bd 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -10,6 +10,7 @@
 #include <malloc.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
+#include <asm/hardware.h>
 #include <linux/list.h>
 #include <dm/device.h>
 #include <dm/read.h>
@@ -26,54 +27,6 @@
 #define MSEC_PER_SEC    1000L
 #define USEC_PER_SEC	1000000L
 
-#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us)	\
-({ \
-	int try = 100; \
-	for (;;) { \
-		(val) = op(addr); \
-		if (cond) \
-			break; \
-		try--; \
-		if (!try) \
-			break; \
-		if (sleep_us) \
-			udelay(sleep_us >> 2); \
-	} \
-	(cond) ? 0 : -ETIMEDOUT; \
-})
-
-#define RK3288_GRF_SOC_CON6		0x025c
-#define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
-#define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
-
-#define RK3288_GRF_SOC_CON9		0x0268
-
-#define RK3288_GRF_SOC_CON14		0x027c
-#define RK3288_TXRX_BASEDIR		BIT(15)
-#define RK3288_TXRX_MASTERSLAVEZ	BIT(14)
-#define RK3288_TXRX_CLKEN		BIT(12)
-
-#define RK3366_GRF_SOC_CON0		0x0400
-#define RK3366_DSI_SEL_VOP_LIT		BIT(2)
-
-#define RK3399_GRF_SOC_CON19		0x6250
-#define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
-#define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
-
-/* disable turnrequest, turndisable, forcetxstopmode, forcerxmode */
-#define RK3399_GRF_SOC_CON22		0x6258
-#define RK3399_GRF_DSI0_MODE		0xffff0000
-/* disable turndisable, forcetxstopmode, forcerxmode, enable */
-#define RK3399_GRF_SOC_CON23		0x625c
-#define RK3399_GRF_DSI1_MODE1		0xffff0000
-#define RK3399_GRF_DSI1_ENABLE		0x000f000f
-/* disable basedir and enable clk*/
-#define RK3399_GRF_SOC_CON24		0x6260
-#define RK3399_TXRX_MASTERSLAVEZ	BIT(7)
-#define RK3399_TXRX_ENABLECLK		BIT(6)
-#define RK3399_TXRX_BASEDIR		BIT(5)
-#define RK3399_GRF_DSI1_MODE2		0x00600040
-
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
 #define RESET				0
@@ -309,23 +262,37 @@ enum {
 	BIASEXTR_127_7,
 };
 
+enum soc_type {
+	RK3128,
+	RK3288,
+	RK3366,
+	RK3368,
+	RK3399,
+};
+
+#define GRF_REG_FIELD(reg, lsb, msb)	((reg << 16) | (lsb << 8) | (msb))
+
+enum grf_reg_fields {
+	DPIUPDATECFG,
+	DPISHUTDN,
+	DPICOLORM,
+	VOPSEL,
+	TURNREQUEST,
+	TURNDISABLE,
+	FORCETXSTOPMODE,
+	FORCERXMODE,
+	ENABLE_N,
+	MASTERSLAVEZ,
+	ENABLECLK,
+	BASEDIR,
+	MAX_FIELDS,
+};
+
 struct dw_mipi_dsi_plat_data {
-	u32 dsi0_en_bit;
-	u32 dsi1_en_bit;
-	u32 grf_switch_reg;
-	u32 grf_dsi0_mode;
-	u32 grf_dsi0_mode_reg;
-	u32 grf_dsi1_mode;
-	u32 grf_dsi1_mode_reg1;
-	u32 dsi1_basedir;
-	u32 dsi1_masterslavez;
-	u32 dsi1_enableclk;
-	u32 grf_dsi1_mode_reg2;
-	u32 grf_dsi1_cfg_reg;
-	unsigned int max_data_lanes;
-	u32 max_bit_rate_per_lane;
-	bool has_vop_sel;
-	bool vsync_quirk;
+	const u32 *dsi0_grf_reg_fields;
+	const u32 *dsi1_grf_reg_fields;
+	unsigned long max_bit_rate_per_lane;
+	enum soc_type soc_type;
 };
 
 struct mipi_dphy {
@@ -341,6 +308,7 @@ struct dw_mipi_dsi {
 	void *grf;
 	const void *blob;
 	ofnode node;
+	int id;
 
 	/* dual-channel */
 	struct dw_mipi_dsi *master;
@@ -402,6 +370,24 @@ static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
 	return readl(dsi->base + reg);
 }
 
+static void grf_field_write(struct dw_mipi_dsi *dsi, enum grf_reg_fields index,
+			    unsigned int val)
+{
+	const u32 field = dsi->id ? dsi->pdata->dsi1_grf_reg_fields[index] :
+			  dsi->pdata->dsi0_grf_reg_fields[index];
+	u16 reg;
+	u8 msb, lsb;
+
+	if (!field)
+		return;
+
+	reg = (field >> 16) & 0xffff;
+	lsb = (field >>  8) & 0xff;
+	msb = (field >>  0) & 0xff;
+
+	rk_clrsetreg(dsi->grf + reg, GENMASK(msb, lsb), val << lsb);
+}
+
 static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
 {
 	u32 sts;
@@ -791,7 +777,7 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 		val |= HSYNC_ACTIVE_LOW;
 
-	if (dsi->pdata->vsync_quirk)
+	if (dsi->pdata->soc_type == RK3128)
 		val ^= VSYNC_ACTIVE_LOW;
 
 	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
@@ -899,59 +885,6 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
-const struct dw_mipi_dsi_plat_data rk312x_mipi_dsi_drv_data = {
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1000000000,
-	.vsync_quirk = true,
-};
-
-const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
-	.dsi0_en_bit = RK3288_DSI0_SEL_VOP_LIT,
-	.dsi1_en_bit = RK3288_DSI1_SEL_VOP_LIT,
-	.grf_switch_reg = RK3288_GRF_SOC_CON6,
-	.dsi1_basedir = RK3288_TXRX_BASEDIR,
-	.dsi1_masterslavez = RK3288_TXRX_MASTERSLAVEZ,
-	.grf_dsi1_cfg_reg = RK3288_GRF_SOC_CON14,
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1500000000,
-	.has_vop_sel = true,
-};
-
-const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
-	.dsi0_en_bit = BIT(2),
-	.grf_switch_reg = 0x0400,
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1000000000,
-	.has_vop_sel = true,
-};
-
-const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
-	.max_bit_rate_per_lane = 1000000000,
-	.max_data_lanes = 4,
-};
-
-const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
-	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
-	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
-	.grf_switch_reg = RK3399_GRF_SOC_CON19,
-	.grf_dsi0_mode = RK3399_GRF_DSI0_MODE,
-	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
-	.grf_dsi1_mode = RK3399_GRF_DSI1_MODE1,
-	.grf_dsi1_mode_reg1 = RK3399_GRF_SOC_CON23,
-	.dsi1_basedir = RK3399_TXRX_BASEDIR,
-	.dsi1_masterslavez = RK3399_TXRX_MASTERSLAVEZ,
-	.dsi1_enableclk = RK3399_TXRX_ENABLECLK,
-	.grf_dsi1_mode_reg2 = RK3399_GRF_SOC_CON24,
-	.max_data_lanes = 4,
-	.max_bit_rate_per_lane = 1500000000,
-	.has_vop_sel = true,
-};
-
-static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
-{
-	return 0;
-}
-
 static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 {
 	int phandle;
@@ -987,6 +920,7 @@ static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 	slave->node = np_to_ofnode(np);
 	slave->base = (u32 *)ofnode_get_addr_index(slave->node, 0);
 	slave->pdata = master->pdata;
+	slave->id = 1;
 	slave->dphy.phy = master->dphy.phy;
 	slave->lanes = master->lanes;
 	slave->format = master->format;
@@ -1004,6 +938,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
 	ofnode panel;
+	static int id = 0;
 	int ret;
 
 	dsi = malloc(sizeof(*dsi));
@@ -1020,6 +955,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	}
 
 	dsi->pdata = pdata;
+	dsi->id = id++;
 	dsi->blob = state->blob;
 	dsi->node = mipi_node;
 	conn_state->private = dsi;
@@ -1040,7 +976,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 
 	FDT_GET_INT(dsi->lanes, "dsi,lanes");
 	FDT_GET_INT(dsi->format, "dsi,format");
-	FDT_GET_INT(dsi->mode_flags, "dsi,mode_flags");
+	FDT_GET_INT(dsi->mode_flags, "dsi,flags");
 	FDT_GET_INT(dsi->channel, "reg");
 
 	ret = rockchip_dsi_dual_channel_probe(dsi);
@@ -1072,9 +1008,6 @@ static void rockchip_dw_dsi_pre_init(struct display_state *state,
 
 	dsi->mode = &conn_state->mode;
 
-	dw_mipi_dsi_clk_enable(dsi);
-
-
 	if (conn_state->phy) {
 		bw = rockchip_dsi_calc_bandwidth(dsi);
 		rate = rockchip_phy_set_pll(state, bw * USEC_PER_SEC);
@@ -1107,61 +1040,36 @@ static void rockchip_dw_dsi_host_init(struct dw_mipi_dsi *dsi)
 	dw_mipi_dsi_clear_err(dsi);
 }
 
-static int
-rockchip_dsi_grf_config(const struct dw_mipi_dsi_plat_data *pdata,
-			struct dw_mipi_dsi *dsi, int vop_id)
+static void dw_mipi_dsi_vop_routing(struct dw_mipi_dsi *dsi, int vop_id)
 {
-	int val;
+	grf_field_write(dsi, VOPSEL, vop_id);
 
-	if (pdata->grf_dsi0_mode_reg)
-		writel(pdata->grf_dsi0_mode,
-		       dsi->grf + pdata->grf_dsi0_mode_reg);
+	if (dsi->slave)
+		grf_field_write(dsi->slave, VOPSEL, vop_id);
+}
 
-	if (dsi->slave) {
-		if (vop_id)
-			val = pdata->dsi0_en_bit |
-			      (pdata->dsi0_en_bit << 16) |
-			      pdata->dsi1_en_bit |
-			      (pdata->dsi1_en_bit << 16);
-		else
-			val = (pdata->dsi0_en_bit << 16) |
-			      (pdata->dsi1_en_bit << 16);
-
-		if (pdata->grf_switch_reg)
-			writel(val, dsi->grf + pdata->grf_switch_reg);
-
-		val = pdata->dsi1_masterslavez |
-		      (pdata->dsi1_masterslavez << 16) |
-		      (pdata->dsi1_basedir << 16);
-		if (pdata->grf_dsi1_cfg_reg)
-			writel(val, dsi->grf + pdata->grf_dsi1_cfg_reg);
-
-		if (pdata->grf_dsi0_mode_reg)
-			writel(pdata->grf_dsi0_mode,
-			       dsi->grf + pdata->grf_dsi0_mode_reg);
-		if (pdata->grf_dsi1_mode_reg1)
-			writel(pdata->grf_dsi1_mode,
-			       dsi->grf + pdata->grf_dsi1_mode_reg1);
-		if (pdata->grf_dsi1_mode_reg2)
-			writel(RK3399_GRF_DSI1_MODE2,
-			       dsi->grf + pdata->grf_dsi1_mode_reg2);
-		if (pdata->grf_dsi1_mode_reg1)
-			writel(RK3399_GRF_DSI1_ENABLE,
-			       dsi->grf + pdata->grf_dsi1_mode_reg1);
-	} else {
-		if (pdata->grf_switch_reg) {
-			if (vop_id)
-				val = pdata->dsi0_en_bit |
-				      (pdata->dsi0_en_bit << 16);
-			else
-				val = pdata->dsi0_en_bit << 16;
-
-			writel(val, dsi->grf + pdata->grf_switch_reg);
-		}
-	}
-	debug("vop %s output to dsi0\n", (vop_id) ? "LIT" : "BIG");
+static void mipi_dphy_init(struct dw_mipi_dsi *dsi)
+{
+	u32 map[] = {0x1, 0x3, 0x7, 0xf};
 
-	return 0;
+	/* Configures DPHY to work as a Master */
+	grf_field_write(dsi, MASTERSLAVEZ, 1);
+
+	/* Configures lane as TX */
+	grf_field_write(dsi, BASEDIR, 0);
+
+	/* Set all REQUEST inputs to zero */
+	grf_field_write(dsi, TURNREQUEST, 0);
+	grf_field_write(dsi, TURNDISABLE, 0);
+	grf_field_write(dsi, FORCETXSTOPMODE, 0);
+	grf_field_write(dsi, FORCERXMODE, 0);
+	udelay(1);
+
+	/* Enable Data Lane Module */
+	grf_field_write(dsi, ENABLE_N, map[dsi->lanes - 1]);
+
+	/* Enable Clock Lane Module */
+	grf_field_write(dsi, ENABLECLK, 1);
 }
 
 static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
@@ -1169,6 +1077,7 @@ static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
 	rockchip_dw_dsi_host_init(dsi);
 
 	mdelay(10);
+	mipi_dphy_init(dsi);
 	dw_mipi_dsi_phy_init(dsi);
 
 	if (dsi->slave)
@@ -1179,19 +1088,14 @@ static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
-	const struct rockchip_connector *connector = conn_state->connector;
-	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	rockchip_dsi_grf_config(pdata, dsi, crtc_state->crtc_id);
+	dw_mipi_dsi_vop_routing(dsi, crtc_state->crtc_id);
 
 	rockchip_dw_dsi_pre_init(state, dsi);
 
 	rockchip_dw_dsi_controller_init(dsi);
 
-	if (!pdata->has_vop_sel)
-		return 0;
-
 	return 0;
 }
 
@@ -1222,7 +1126,7 @@ static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
 	return 0;
 }
 
-const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
+static const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
 	.init = rockchip_dw_mipi_dsi_init,
 	.deinit = rockchip_dw_mipi_dsi_deinit,
 	.prepare = rockchip_dw_mipi_dsi_prepare,
@@ -1231,47 +1135,161 @@ const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
 	.transfer = rockchip_dw_mipi_dsi_transfer,
 };
 
+static const u32 rk3128_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0150, 10, 13),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0150,  9,  9),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0150,  8,  8),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0150,  5,  5),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0150,  4,  4),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3128_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3128_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RK3128,
+};
+
+static const struct rockchip_connector rk3128_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3128_mipi_dsi_drv_data,
+};
+
+static const u32 rk3288_dsi0_grf_reg_fields[MAX_FIELDS] = {
+	[DPICOLORM]		= GRF_REG_FIELD(0x025c,  8,  8),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x025c,  7,  7),
+	[VOPSEL]		= GRF_REG_FIELD(0x025c,  6,  6),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0264,  8, 11),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0264,  4,  7),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0264,  0,  3),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x03a4,  8, 10),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x03a8,  0,  0),
+};
+
+static const u32 rk3288_dsi1_grf_reg_fields[MAX_FIELDS] = {
+	[DPICOLORM]		= GRF_REG_FIELD(0x025c, 11, 11),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x025c, 10, 10),
+	[VOPSEL]		= GRF_REG_FIELD(0x025c,  9,  9),
+	[ENABLE_N]		= GRF_REG_FIELD(0x0268, 12, 15),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0268,  8, 11),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0268,  4,  7),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0268,  0,  3),
+	[BASEDIR]		= GRF_REG_FIELD(0x027c, 15, 15),
+	[MASTERSLAVEZ]		= GRF_REG_FIELD(0x027c, 14, 14),
+	[ENABLECLK]		= GRF_REG_FIELD(0x027c, 12, 12),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x03a4,  4,  7),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x03a8,  1,  1),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3288_dsi0_grf_reg_fields,
+	.dsi1_grf_reg_fields = rk3288_dsi1_grf_reg_fields,
+	.max_bit_rate_per_lane = 1500000000UL,
+	.soc_type = RK3288,
+};
+
 static const struct rockchip_connector rk3288_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
 	 .data = &rk3288_mipi_dsi_drv_data,
 };
 
+static const u32 rk3366_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[VOPSEL]		= GRF_REG_FIELD(0x0400,  2,  2),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0410,  9,  9),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0410,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0410,  2,  2),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x0414,  7, 10),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x0414,  6,  6),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x0414,  5,  5),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3366_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RK3366,
+};
+
 static const struct rockchip_connector rk3366_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
 	 .data = &rk3366_mipi_dsi_drv_data,
 };
 
+static const u32 rk3368_dsi_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0418,  7,  7),
+	[DPICOLORM]		= GRF_REG_FIELD(0x0418,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x0418,  2,  2),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x041c,  7, 10),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x041c,  6,  6),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x041c,  5,  5),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3368_dsi_grf_reg_fields,
+	.max_bit_rate_per_lane = 1000000000UL,
+	.soc_type = RK3368,
+};
+
 static const struct rockchip_connector rk3368_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
 	 .data = &rk3368_mipi_dsi_drv_data,
 };
 
-const struct rockchip_connector rk3399_mipi_dsi_data = {
-	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk3399_mipi_dsi_drv_data,
+static const u32 rk3399_dsi0_grf_reg_fields[MAX_FIELDS] = {
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x6224, 15, 15),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x6224, 14, 14),
+	[DPICOLORM]		= GRF_REG_FIELD(0x6224, 13, 13),
+	[VOPSEL]		= GRF_REG_FIELD(0x6250,  0,  0),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x6258, 12, 15),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x6258,  8, 11),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x6258,  4,  7),
+	[FORCERXMODE]		= GRF_REG_FIELD(0x6258,  0,  3),
+};
+
+static const u32 rk3399_dsi1_grf_reg_fields[MAX_FIELDS] = {
+	[VOPSEL]		= GRF_REG_FIELD(0x6250,  4,  4),
+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x6250,  3,  3),
+	[DPISHUTDN]		= GRF_REG_FIELD(0x6250,  2,  2),
+	[DPICOLORM]		= GRF_REG_FIELD(0x6250,  1,  1),
+	[TURNDISABLE]		= GRF_REG_FIELD(0x625c, 12, 15),
+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x625c,  8, 11),
+	[ENABLE_N]		= GRF_REG_FIELD(0x625c,  0,  3),
+	[MASTERSLAVEZ]		= GRF_REG_FIELD(0x6260,  7,  7),
+	[ENABLECLK]		= GRF_REG_FIELD(0x6260,  6,  6),
+	[BASEDIR]		= GRF_REG_FIELD(0x6260,  5,  5),
+	[TURNREQUEST]		= GRF_REG_FIELD(0x6260,  0,  3),
+};
+
+static const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
+	.dsi0_grf_reg_fields = rk3399_dsi0_grf_reg_fields,
+	.dsi1_grf_reg_fields = rk3399_dsi1_grf_reg_fields,
+	.max_bit_rate_per_lane = 1500000000UL,
+	.soc_type = RK3399,
 };
 
-static const struct rockchip_connector rk312x_mipi_dsi_data = {
+static const struct rockchip_connector rk3399_mipi_dsi_data = {
 	 .funcs = &rockchip_dw_mipi_dsi_funcs,
-	 .data = &rk312x_mipi_dsi_drv_data,
+	 .data = &rk3399_mipi_dsi_drv_data,
 };
 
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	{
-	 .compatible = "rockchip,rk3288-mipi-dsi",
-	 .data = (ulong)&rk3288_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3366-mipi-dsi",
-	 .data = (ulong)&rk3366_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3368-mipi-dsi",
-	 .data = (ulong)&rk3368_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3399-mipi-dsi",
-	 .data = (ulong)&rk3399_mipi_dsi_data,
-	},{
-	 .compatible = "rockchip,rk3128-mipi-dsi",
-	 .data = (ulong)&rk312x_mipi_dsi_data,
+		.compatible = "rockchip,rk3128-mipi-dsi",
+		.data = (ulong)&rk3128_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3288-mipi-dsi",
+		.data = (ulong)&rk3288_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3366-mipi-dsi",
+		.data = (ulong)&rk3366_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3368-mipi-dsi",
+		.data = (ulong)&rk3368_mipi_dsi_data,
+	},
+	{
+		.compatible = "rockchip,rk3399-mipi-dsi",
+		.data = (ulong)&rk3399_mipi_dsi_data,
 	},
 	{}
 };
diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
index bec485baec..3e5e2ca0f1 100644
--- a/drivers/video/drm/rockchip_connector.h
+++ b/drivers/video/drm/rockchip_connector.h
@@ -66,14 +66,6 @@ struct rockchip_connector_funcs {
 const struct rockchip_connector *
 rockchip_get_connector(const void *blob, int connector_node);
 
-#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
-struct dw_mipi_dsi_plat_data;
-extern const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs;
-extern const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data;
-extern const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data;
-extern const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data;
-extern const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data;
-#endif
 #ifdef CONFIG_DRM_ROCKCHIP_ANALOGIX_DP
 struct rockchip_dp_chip_data;
 extern const struct rockchip_connector_funcs rockchip_analogix_dp_funcs;

commit 87f0ac575479dbdd18df4e3ae8e3423eb1e19e48
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Feb 26 16:48:32 2018 +0800

    pinctrl: rockchip: Change the max pin entry to 30
    
    Some case like rk3328 gmac rgmii pins has 22 pins, so
    need to change the max pin entry to 30, otherwise it
    make something not work.
    
    Change-Id: I6897ce6ff995713da75c2094d857b3eb95b77204
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index d05a3f5630..6df466d3b7 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -13,7 +13,7 @@
 
 #define MAX_ROCKCHIP_GPIO_PER_BANK	32
 #define RK_FUNC_GPIO			0
-#define MAX_ROCKCHIP_PINS_ENTRIES	20
+#define MAX_ROCKCHIP_PINS_ENTRIES	30
 
 enum rockchip_pinctrl_type {
 	PX30,
@@ -1841,19 +1841,20 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 #endif
 	data = dev_read_prop(config, "rockchip,pins", &count);
 	if (count < 0) {
-		debug("%s: bad array %d\n", __func__, count);
+		debug("%s: bad array size %d\n", __func__, count);
 		return -EINVAL;
 	}
-	count /= sizeof(u32);
-	for (i = 0; i < count; i++)
-		cells[i] = fdt32_to_cpu(data[i]);
 
+	count /= sizeof(u32);
 	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
 		debug("%s: unsupported pins array count %d\n",
 		      __func__, count);
 		return -EINVAL;
 	}
 
+	for (i = 0; i < count; i++)
+		cells[i] = fdt32_to_cpu(data[i]);
+
 	for (i = 0; i < (count >> 2); i++) {
 		bank = cells[4 * i + 0];
 		pin = cells[4 * i + 1];

commit 773f0d3d6a42cde5d7ff760537d9afa8da47b18e
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 16:24:14 2018 +0800

    configs: rockchip: enable ehci and ohci support for evb-px30
    
    Enable ECHI & OHCI host support for Rockchip evb-px30 SoC.
    
    Change-Id: I156ca98b569ccf0181433661ed0f79b0b40ecdab
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 8cce86aa2c..f1bd27e663 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -23,6 +23,8 @@ CONFIG_CMD_LOAD_ANDROID=y
 CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
@@ -59,6 +61,11 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index e8d8d4cc23..6c9676181d 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -64,4 +64,8 @@
 
 #endif
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
 #endif

commit 9b3cc842e76075e9b173aecc58633bca9b594b2c
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 16:17:27 2018 +0800

    phy: phy-rockchip-inno-usb2: live-tree support
    
    This change adds child node bind to support live-tree feature.
    
    Change-Id: Ida629ad281f09673e19ee8beb125792f8b0c60a2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 2848ed2722..09afed66c6 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/lists.h>
 #include <generic-phy.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -371,12 +372,10 @@ void otg_phy_init(struct dwc2_udc *dev)
 
 static int rockchip_usb2phy_init(struct phy *phy)
 {
-	struct rockchip_usb2phy *rphy;
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	void __iomem *base;
-
-	rphy = dev_get_priv(phy->dev);
-	base = get_reg_base(rphy);
+	void __iomem *base = get_reg_base(rphy);
 
 	if (phy->id == USB2PHY_PORT_OTG) {
 		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -397,12 +396,10 @@ static int rockchip_usb2phy_init(struct phy *phy)
 
 static int rockchip_usb2phy_exit(struct phy *phy)
 {
-	struct rockchip_usb2phy *rphy;
+	struct udevice *parent = phy->dev->parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(parent);
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	void __iomem *base;
-
-	rphy = dev_get_priv(phy->dev);
-	base = get_reg_base(rphy);
+	void __iomem *base = get_reg_base(rphy);
 
 	if (phy->id == USB2PHY_PORT_OTG) {
 		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -418,6 +415,51 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 	return 0;
 }
 
+static int rockchip_usb2phy_of_xlate(struct phy *phy,
+				     struct ofnode_phandle_args *args)
+{
+	const char *dev_name = phy->dev->name;
+
+	if (!strcasecmp(dev_name, "host-port")) {
+		phy->id = USB2PHY_PORT_HOST;
+	} else if (!strcasecmp(dev_name, "otg-port")) {
+		phy->id = USB2PHY_PORT_OTG;
+	} else {
+		pr_err("%s: invalid dev name\n", __func__);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_bind(struct udevice *dev)
+{
+	struct udevice *child;
+	ofnode subnode;
+	const char *node_name;
+	int ret;
+
+	dev_for_each_subnode(subnode, dev) {
+		if (!ofnode_valid(subnode)) {
+			debug("%s: %s subnode not found", __func__, dev->name);
+			return -ENXIO;
+		}
+
+		node_name = ofnode_get_name(subnode);
+		debug("%s: subnode %s\n", __func__, node_name);
+
+		ret = device_bind_driver_to_node(dev, "rockchip_usb2phy_port",
+						 node_name, subnode, &child);
+		if (ret) {
+			pr_err("%s: '%s' cannot bind 'rockchip_usb2phy_port'\n",
+			       __func__, node_name);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static int rockchip_usb2phy_probe(struct udevice *dev)
 {
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
@@ -480,6 +522,7 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 static struct phy_ops rockchip_usb2phy_ops = {
 	.init = rockchip_usb2phy_init,
 	.exit = rockchip_usb2phy_exit,
+	.of_xlate = rockchip_usb2phy_of_xlate,
 };
 
 static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
@@ -633,11 +676,17 @@ static const struct udevice_id rockchip_usb2phy_ids[] = {
 	{ }
 };
 
+U_BOOT_DRIVER(rockchip_usb2phy_port) = {
+	.name		= "rockchip_usb2phy_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_usb2phy_ops,
+};
+
 U_BOOT_DRIVER(rockchip_usb2phy) = {
 	.name		= "rockchip_usb2phy",
 	.id		= UCLASS_PHY,
 	.of_match	= rockchip_usb2phy_ids,
-	.ops		= &rockchip_usb2phy_ops,
 	.probe		= rockchip_usb2phy_probe,
+	.bind		= rockchip_usb2phy_bind,
 	.priv_auto_alloc_size = sizeof(struct rockchip_usb2phy),
 };

commit ee0a9610b2e3703ae155d4594ae3db83c965ddaf
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Sat Feb 24 10:06:43 2018 +0800

    usb: host: dwc2: disable hnp and srp default for rockchip platform
    
    Due to rockchip platform use live-tree which deployed from linux kernel,
    so abandon the previous 'hnp-srp-disable' DT property and disable hnp and
    srp default at probe time.
    
    Change-Id: I5fb34bc789812d463b6a3c42b268af447d130950
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 1293e18f75..d9aa2182f8 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1263,6 +1263,10 @@ static int dwc2_usb_probe(struct udevice *dev)
 
 	bus_priv->desc_before_addr = true;
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+	priv->hnp_srp_disable = true;
+#endif
+
 	return dwc2_init_common(dev, priv);
 }
 

commit d2e45d1f9b7dfebc02ba362290e6b461b83bd1a2
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 15:46:13 2018 +0800

    usb: host: amend clock exception handling for ehci and ohci
    
    Some platforms, like Rockchip, not implement clk_enable/clk_disable
    APIs, add 'ENOSYS' condition to exclude it.
    
    Change-Id: Ic79122dcad30d318d9326aeb287d0b15c99bfbae
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 1cb92c0338..ad59aa8c19 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -50,7 +50,7 @@ static int ehci_usb_probe(struct udevice *dev)
 			if (err < 0)
 				break;
 			err = clk_enable(&priv->clocks[i]);
-			if (err) {
+			if (err && err != -ENOSYS) {
 				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index c1b881cc21..bf5b2d79a4 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -47,7 +47,7 @@ static int ohci_usb_probe(struct udevice *dev)
 				break;
 
 			err = clk_enable(&priv->clocks[i]);
-			if (err) {
+			if (err && err != -ENOSYS) {
 				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;

commit 5ccb6a79f27ea602ad23b07251d1bb8a60109893
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 23 15:33:46 2018 +0800

    usb: host: use map_physmem method in ohci-generic
    
    Using map_physmem method instead of typecasting fdt_addr_t to a
    pointer directly.
    
    This is inspired by commit 643cacb6d ("usb: ehci: Use map_physmem
    in ehci-generic").
    
    Change-Id: I99590eabc763ad73bfb8f0cba7d02f9ef2fb423a
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index bf55a71d66..c1b881cc21 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/io.h>
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
@@ -27,7 +28,7 @@ struct generic_ohci {
 
 static int ohci_usb_probe(struct udevice *dev)
 {
-	struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
+	struct ohci_regs *regs;
 	struct generic_ohci *priv = dev_get_priv(dev);
 	int i, err, ret, clock_nb, reset_nb;
 
@@ -100,6 +101,7 @@ static int ohci_usb_probe(struct udevice *dev)
 		}
 	}
 
+	regs = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
 	err = ohci_register(dev, regs);
 	if (err)
 		goto phy_err;

commit db235eb51fab3cc7c7d8e5c84bee417865688285
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Fri Feb 23 19:38:21 2018 +0800

    clk: rockchip: px30: Move pll mode operation into rkclk_set_pll
    
    Change-Id: I55bc3f9eedd41c40b8e424b482ad620b248262b1
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 088017d50d..e39607591c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -37,6 +37,16 @@ struct px30_clk_priv {
 	ulong rate;
 };
 
+/* PX30 pll id */
+enum px30_pll_id {
+	APLL,
+	DPLL,
+	CPLL,
+	NPLL,
+	GPLL,
+	PLL_COUNT,
+};
+
 struct px30_cru {
 	struct px30_pll {
 		unsigned int con0;
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 91c91fcea5..1f32fe9abd 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -64,12 +64,30 @@ static const struct pll_div *apll_cfgs[] = {
  * FBDIV = Integer value programmed into feedback divide
  *
  */
-static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
+static void rkclk_set_pll(struct px30_cru *cru, enum px30_pll_id pll_id,
+			  const struct pll_div *div)
 {
-	struct px30_pll *pll = (struct px30_pll *)pll_base;
+	struct px30_pll *pll;
+	unsigned int *mode;
 	/* All PLLs have same VCO and output frequency range restrictions. */
 	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
 	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+	static u8 mode_shift[PLL_COUNT] = {
+		APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		NPLL_MODE_SHIFT, GPLL_MODE_SHIFT
+	};
+	static u32 mode_mask[PLL_COUNT] = {
+		APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+		NPLL_MODE_MASK, GPLL_MODE_MASK
+	};
+
+	if (pll_id == GPLL) {
+		pll = &cru->gpll;
+		mode = &cru->pmu_mode;
+	} else {
+		pll = &cru->pll[pll_id];
+		mode = &cru->mode;
+	};
 
 	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
 	      pll, div->fbdiv, div->refdiv, div->postdiv1,
@@ -77,6 +95,13 @@ static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
 	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
 	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
 
+	/*
+	 * When power on or changing PLL setting,
+	 * we must force PLL into slow mode to ensure output stable clock.
+	 */
+	rk_clrsetreg(mode, mode_mask[pll_id],
+		     PLLMUX_FROM_XIN24M << mode_shift[pll_id]);
+
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 	/* Power down */
@@ -96,6 +121,9 @@ static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
 		udelay(1);
 
+	rk_clrsetreg(mode, mode_mask[pll_id],
+		     PLLMUX_FROM_PLL << mode_shift[pll_id]);
+
 	return;
 }
 
@@ -105,14 +133,9 @@ static void rkclk_init(struct px30_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
-	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
-		     PLLMUX_FROM_XIN24M << APLL_MODE_SHIFT);
-	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
-		     PLLMUX_FROM_XIN24M << GPLL_MODE_SHIFT);
-
 	/* init pll */
-	rkclk_set_pll(&cru->pll[0] , apll_cfgs[APLL_816_MHZ]);
-	rkclk_set_pll(&cru->gpll, &gpll_init_cfg);
+	rkclk_set_pll(cru, APLL, apll_cfgs[APLL_816_MHZ]);
+	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);
 
 	/*
 	 * select apll as cpu/core clock pll source and
@@ -158,11 +181,6 @@ static void rkclk_init(struct px30_cru *cru)
 		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
 		     hclk_div << PERI_HCLK_DIV_SHIFT |
 		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
-		     PLLMUX_FROM_PLL << APLL_MODE_SHIFT);
-	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
-		     PLLMUX_FROM_PLL << GPLL_MODE_SHIFT);
 }
 
 static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)

commit 5039ac47ffa0ca6001568cfe6489e060549c6921
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 18:13:34 2018 +0800

    core: device_bind_common: do not use mmc node from kernel
    
    The driver for U-Boot and kernel are different, we can not re-use
    mmc node from kernel now.
    BTW: U-Boot need alias for mmc to make sure emmc at mmc0(not support
         in kernel dtb).
    
    Change-Id: I1b8fd3ab8a28e3abb5964dc113d0028abe2beaa2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 89f2e46998..9d58f44ee1 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -50,6 +50,9 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		return ret;
 	}
 
+#ifdef CONFIG_USING_KERNEL_DTB
+	/* Do not use mmc node from kernel dtb */
+	if(drv->id == UCLASS_MMC)
 	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
 		if (!strcmp(name, dev->name)){
 			debug("%s do not bind dev already in list %s\n",
@@ -58,7 +61,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 			return 0;
 		}
 	}
-
+#endif
 	dev = calloc(1, sizeof(struct udevice));
 	if (!dev)
 		return -ENOMEM;

commit 88949342ad3110302f947d19d4d850222f9fb07b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 25 10:50:55 2018 +0800

    power: add rockchip_pm.c for devices low power control
    
    during system suspend in charge animation, we may need add
    power manage control for some devices low power. Since U-Boot
    don't provide standard suspend/resume callback for device. We
    have to add rockchip_pm.c to write hard code to achieve this
    for different platforms or boards.
    
    Change-Id: I01f67c7c57cbcaae48d3def65eea8cab499af93b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index febe58f6f4..0e5b1c84cf 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -81,6 +81,14 @@ config CHARGE_ANIMATION
 	help
 	  This adds a simple function for charge animation display.
 
+config ROCKCHIP_PM
+	bool "Enable Rockchip power manager for charge animation"
+	depends on CHARGE_ANIMATION
+	default y
+	help
+	  This adds power manage control of devices for low power
+	  during system suspend in charge animation.
+
 config AXP_DCDC1_VOLT
 	int "axp pmic dcdc1 voltage"
 	depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index a80457bc37..0ad93a981f 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_AXP221_POWER)	+= axp221.o
 obj-$(CONFIG_AXP809_POWER)	+= axp809.o
 obj-$(CONFIG_AXP818_POWER)	+= axp818.o
 obj-$(CONFIG_CHARGE_ANIMATION)	+= charge_animation.o
+obj-$(CONFIG_ROCKCHIP_PM)	+= rockchip_pm.o
 obj-$(CONFIG_EXYNOS_TMU)	+= exynos-tmu.o
 obj-$(CONFIG_FTPMU010_POWER)	+= ftpmu010.o
 obj-$(CONFIG_SY8106A_POWER)	+= sy8106a.o
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index b462e4a84c..65a1c67133 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -17,6 +17,7 @@
 #include <linux/input.h>
 #include <power/charge_display.h>
 #include <power/charge_animation.h>
+#include <power/rockchip_pm.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
@@ -122,12 +123,16 @@ static int system_suspend_enter(struct charge_animation_pdata *pdata)
 		putc('2');
 		irqs_suspend();
 		putc('3');
+		device_suspend();
+		putc('4');
 		putc('\n');
 
 		/* Trap into ATF for low power mode */
 		cpu_suspend(0, psci_system_suspend);
 
 		putc('\n');
+		putc('4');
+		device_resume();
 		putc('3');
 		irqs_resume();
 		putc('2');
diff --git a/drivers/power/rockchip_pm.c b/drivers/power/rockchip_pm.c
new file mode 100644
index 0000000000..2ec4e78cdc
--- /dev/null
+++ b/drivers/power/rockchip_pm.c
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <command.h>
+#include <common.h>
+#include <dm.h>
+#include <power/rockchip_pm.h>
+
+int device_suspend(void)
+{
+	return 0;
+}
+
+int device_resume(void)
+{
+	return 0;
+}
diff --git a/include/power/rockchip_pm.h b/include/power/rockchip_pm.h
new file mode 100644
index 0000000000..65f008b2e1
--- /dev/null
+++ b/include/power/rockchip_pm.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PM_H_
+#define _ROCKCHIP_PM_H_
+
+int device_suspend(void);
+int device_resume(void);
+
+#endif

commit 1e7885d671f108a8cb0798aee8c7eeffef3e573a
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Sun Feb 25 21:59:10 2018 +0800

    px30: arch_cpu_init: Fix error pd_vo bit
    
    Change-Id: I3b93425732183bc1b627cf489164955818a873fa
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 9074ecae83..e23e456bd3 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -40,7 +40,7 @@ int arch_cpu_init(void)
 	/* Disable the ddr secure region setting to make it non-secure */
 #endif
 	/* Enable PD_VO (default disable at reset) */
-	rk_clrreg(PMU_PWRDN_CON, 13);
+	rk_clrreg(PMU_PWRDN_CON, 1 << 13);
 
 	return 0;
 }

commit a872e26cf53cfd342e043132554f925136448021
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:40:30 2018 +0800

    px30: arch_cpu_init: enable pd_vo
    
    Change-Id: I789b5e759c962604e6bb22922b0e73eb8cfd63a9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 1655bf7726..9074ecae83 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -9,6 +9,8 @@
 #include <asm/arch/hardware.h>
 #include <asm/armv8/mmu.h>
 
+#define PMU_PWRDN_CON	0xff000018
+
 static struct mm_region px30_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -37,6 +39,9 @@ int arch_cpu_init(void)
 	/* We do some SoC one time setting here. */
 	/* Disable the ddr secure region setting to make it non-secure */
 #endif
+	/* Enable PD_VO (default disable at reset) */
+	rk_clrreg(PMU_PWRDN_CON, 13);
+
 	return 0;
 }
 #define GRF_BASE	0xff140000

commit 0e1b20c53db7fafc0915a97654ec0ee2071d849c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 17:02:18 2018 +0800

    dm: regulator: add "regulator-init-microvolt" support
    
    Change-Id: I5045dc33157d071460302b513b67b942fef1586d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 2c1a1854f6..6783ac43e1 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -211,6 +211,8 @@ int regulator_autoset(struct udevice *dev)
 
 	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
 		ret = regulator_set_value(dev, uc_pdata->min_uV);
+	if (uc_pdata->init_uV > 0)
+		ret = regulator_set_value(dev, uc_pdata->init_uV);
 	if (!ret && (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UA))
 		ret = regulator_set_current(dev, uc_pdata->min_uA);
 
@@ -342,6 +344,8 @@ static int regulator_pre_probe(struct udevice *dev)
 						-ENODATA);
 	uc_pdata->max_uV = dev_read_u32_default(dev, "regulator-max-microvolt",
 						-ENODATA);
+	uc_pdata->init_uV = dev_read_u32_default(dev, "regulator-init-microvolt",
+						-ENODATA);
 	uc_pdata->min_uA = dev_read_u32_default(dev, "regulator-min-microamp",
 						-ENODATA);
 	uc_pdata->max_uA = dev_read_u32_default(dev, "regulator-max-microamp",
diff --git a/include/power/regulator.h b/include/power/regulator.h
index ea1bf995bb..ef0c88414a 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -168,6 +168,7 @@ struct dm_regulator_uclass_platdata {
 	int mode_count;
 	int min_uV;
 	int max_uV;
+	int init_uV;
 	int min_uA;
 	int max_uA;
 	bool always_on;

commit 1b6b965c67314d1ae08815e9b9d8e75429fc21a5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 22 15:03:04 2018 +0800

    pmic: add rk809 support
    
    include sub modules: pmic, regulator, pwrkey
    
    Change-Id: I840983ceafc7677840674e7d1aebab703e3a537d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 76328e28b1..80f7cd9cf4 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -14,7 +14,6 @@
 #include <asm/arch/periph.h>
 #include <dm/pinctrl.h>
 
-#define RK817_GPIO_INT_CFG	0xfe
 #define	RK817_INT_STS_REG0	0xf8
 #define	RK817_INT_MSK_REG0	0xf9
 #define	RK817_INT_STS_REG1	0xfa
@@ -24,7 +23,6 @@
 #define RK817_PWRON_RISE_INT	(1 << 1)
 #define RK817_PWRON_FALL_INT	(1 << 0)
 #define RK817_PLUG_OUT_INT	(1 << 1)
-#define RK817_INT_POL_MSK	BIT(1)
 
 #define	RK816_INT_STS_REG1	0x49
 #define	RK816_INT_MSK_REG1	0x4a
@@ -64,8 +62,6 @@ static struct reg_data rk817_init_reg[] = {
 	{ RK817_INT_STS_REG0, 0xff },
 	{ RK817_INT_STS_REG1, 0xff },
 	{ RK817_INT_STS_REG2, 0xff },
-	/* pmic_int active low */
-	{ RK817_GPIO_INT_CFG, 0x20 },
 };
 
 static struct reg_data rk817_irq_reg[] = {
@@ -265,6 +261,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		priv->irq_reg = rk816_irq_reg;
 		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		priv->key_int_sts_reg = RK817_INT_STS_REG0;
 		priv->key_int_msk_reg = RK817_INT_MSK_REG0;
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 59f1b9172e..6dc3edb13c 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -93,6 +93,7 @@ static int rk8xx_shutdown(struct udevice *dev)
 		devctrl_reg = REG_DEVCTRL;
 		dev_off = BIT(0);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		devctrl_reg = RK817_REG_SYS_CFG3;
 		dev_off = BIT(0);
@@ -161,7 +162,8 @@ static int rk8xx_probe(struct udevice *dev)
 	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
-	if (device_is_compatible(dev, "rockchip,rk817")) {
+	if (device_is_compatible(dev, "rockchip,rk817") ||
+	    device_is_compatible(dev, "rockchip,rk809")) {
 		id_msb = RK817_ID_MSB;
 		id_lsb = RK817_ID_LSB;
 	} else {
@@ -179,6 +181,7 @@ static int rk8xx_probe(struct udevice *dev)
 	case RK816_ID:
 	case RK818_ID:
 		break;
+	case RK809_ID:
 	case RK817_ID:
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 		init_data = rk817_init_reg;
@@ -219,6 +222,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 static const struct udevice_id rk8xx_ids[] = {
 	{ .compatible = "rockchip,rk805" },
 	{ .compatible = "rockchip,rk808" },
+	{ .compatible = "rockchip,rk809" },
 	{ .compatible = "rockchip,rk816" },
 	{ .compatible = "rockchip,rk817" },
 	{ .compatible = "rockchip,rk818" },
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index edad841e13..aace8ae280 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -33,6 +33,10 @@
 #define RK818_USB_ILIM_SEL_MASK		0x0f
 #define RK818_USB_CHG_SD_VSEL_MASK	0x70
 
+/* RK809 BUCK5 */
+#define RK809_BUCK5_CONFIG(n)		(0xde + (n) * 1)
+#define RK809_BUCK5_VSEL_MASK		0x07
+
 /* RK817 BUCK */
 #define RK817_BUCK_ON_VSEL(n)		(0xbb + 3 * (n - 1))
 #define RK817_BUCK_SLP_VSEL(n)		(0xbc + 3 * (n - 1))
@@ -78,6 +82,14 @@ static const struct rk8xx_reg_info rk816_buck[] = {
 	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk809_buck5[] = {
+	/* buck 5 */
+	{ 1500000,	0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x01, },
+	{ 2800000, 200000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x04, },
+	{ 3300000, 300000, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), RK809_BUCK5_VSEL_MASK, 0x06, },
+};
+
 static const struct rk8xx_reg_info rk817_buck[] = {
 	/* buck 1 */
 	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x00, },
@@ -196,6 +208,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 			return &rk816_buck[num + 4];
 		}
 
+	case RK809_ID:
 	case RK817_ID:
 		switch (num) {
 		case 0 ... 2:
@@ -205,13 +218,23 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 				return &rk817_buck[num * 3 + 1];
 			else
 				return &rk817_buck[num * 3 + 2];
-		default:
+		case 3:
 			if (uvolt < 1500000)
 				return &rk817_buck[num * 3 + 0];
 			else if (uvolt < 3400000)
 				return &rk817_buck[num * 3 + 1];
 			else
 				return &rk817_buck[num * 3 + 2];
+		/* BUCK5 for RK809 */
+		default:
+			if (uvolt < 1800000)
+				return &rk809_buck5[0];
+			else if (uvolt < 2800000)
+				return &rk809_buck5[1];
+			else if (uvolt < 3300000)
+				return &rk809_buck5[2];
+			else
+				return &rk809_buck5[3];
 		}
 	case RK818_ID:
 		return &rk818_buck[num];
@@ -278,12 +301,22 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
 				      enable ? mask : 0);
 		break;
+	case RK809_ID:
 	case RK817_ID:
-		if (enable)
-			value = ((1 << buck) | (1 << (buck + 4)));
-		else
-			value = ((0 << buck) | (1 << (buck + 4)));
-		ret = pmic_reg_write(pmic, RK817_POWER_EN(0), value);
+		if (buck < 4) {
+			if (enable)
+				value = ((1 << buck) | (1 << (buck + 4)));
+			else
+				value = ((0 << buck) | (1 << (buck + 4)));
+			ret = pmic_reg_write(pmic, RK817_POWER_EN(0), value);
+		/* BUCK5 for RK809 */
+		} else {
+			if (enable)
+				value = ((1 << 1) | (1 << 5));
+			else
+				value = ((0 << 1) | (1 << 5));
+			ret = pmic_reg_write(pmic, RK817_POWER_EN(3), value);
+		}
 		break;
 	default:
 		ret = -EINVAL;
@@ -337,12 +370,22 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK809_ID:
 	case RK817_ID:
-		mask = 1 << buck;
-		ret = pmic_reg_read(pmic, RK817_POWER_EN(0));
-			debug("%s: %s, buck=%d, en=%x\n", __func__, pmic->name, buck, ret);
+		if (buck < 4) {
+			mask = 1 << buck;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(0));
+		/* BUCK5 for RK809 */
+		} else {
+			mask = 1 << 1;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(3));
+		}
 		break;
 	}
+
+	if (ret < 0)
+		return ret;
+
 	return ret & mask ? true : false;
 }
 
@@ -359,15 +402,18 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, RK816_REG_DCDC_SLP_EN, mask,
 				      enable ? mask : 0);
 		break;
-
 	case RK808_ID:
 	case RK818_ID:
 		mask = 1 << buck;
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK809_ID:
 	case RK817_ID:
-		mask = 1 << buck;
+		if (buck < 4)
+			mask = 1 << buck;
+		else
+			mask = 1 << 5;	/* BUCK5 for RK809 */
 		ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
 				      enable ? mask : 0);
 		break;
@@ -387,6 +433,7 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	case RK805_ID:
 	case RK816_ID:
 		return &rk816_ldo[num];
+	case RK809_ID:
 	case RK817_ID:
 		if (uvolt < 3400000)
 			return &rk817_ldo[num * 2 + 0];
@@ -423,6 +470,7 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		if (ldo < 4) {
 			mask = 1 << ldo;
@@ -438,6 +486,10 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 		}
 		break;
 	}
+
+	if (ret < 0)
+		return ret;
+
 	return ret & mask ? true : false;
 }
 
@@ -469,6 +521,7 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
 				       enable ? mask : 0);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		if (ldo < 4) {
 			en_reg = RK817_POWER_EN(1);
@@ -511,6 +564,7 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK809_ID:
 	case RK817_ID:
 		if (ldo == 8) {
 			mask = 1 << 4;	/* LDO9 */
@@ -663,30 +717,96 @@ static int ldo_get_enable(struct udevice *dev)
 
 static int switch_set_enable(struct udevice *dev, bool enable)
 {
-	int sw = dev->driver_data - 1;
-	uint mask;
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
 
-	mask = 1 << (sw + 5);
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
+				      enable ? mask : 0);
+		break;
+	case RK809_ID:
+		mask = (1 << (sw + 2)) | (1 << (sw + 6));
+		ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask,
+				      enable ? mask : 0);
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
+				      enable ? mask : 0);
+		break;
+	}
+
+	debug("%s: switch%d, enable=%d, mask=0x%x\n",
+	      __func__, sw + 1, enable, mask);
 
-	return pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
-			       enable ? mask : 0);
+	return ret;
 }
 
 static int switch_get_enable(struct udevice *dev)
 {
-	int sw = dev->driver_data - 1;
-	int ret;
-	uint mask;
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
 
-	mask = 1 << (sw + 5);
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
+		break;
+	case RK809_ID:
+		mask = 1 << (sw + 2);
+		ret = pmic_reg_read(dev->parent, RK817_POWER_EN(3));
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
+		break;
+	}
 
-	ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
 	if (ret < 0)
 		return ret;
 
 	return ret & mask ? true : false;
 }
 
+static int switch_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	return 0;
+}
+
+static int switch_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	int ret = 0, sw = dev->driver_data - 1;
+	uint mask = 0;
+
+	switch (priv->variant) {
+	case RK808_ID:
+		mask = 1 << (sw + 5);
+		ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,
+				      enable ? 0 : mask);
+		break;
+	case RK809_ID:
+		mask = 1 << (sw + 6);
+		ret = pmic_clrsetbits(dev->parent, RK817_POWER_SLP_EN(0), mask,
+				      enable ? mask : 0);
+		break;
+	case RK818_ID:
+		mask = 1 << 6;
+		ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,
+				      enable ? 0 : mask);
+		break;
+	}
+
+	debug("%s: switch%d, enable=%d, mask=0x%x\n",
+	      __func__, sw + 1, enable, mask);
+
+	return ret;
+}
+
 static int rk8xx_buck_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -744,6 +864,8 @@ static const struct dm_regulator_ops rk8xx_ldo_ops = {
 static const struct dm_regulator_ops rk8xx_switch_ops = {
 	.get_enable = switch_get_enable,
 	.set_enable = switch_set_enable,
+	.set_suspend_enable = switch_set_suspend_enable,
+	.set_suspend_value = switch_set_suspend_value,
 };
 
 U_BOOT_DRIVER(rk8xx_buck) = {
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 51dd046f11..f8297db791 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -186,6 +186,7 @@ enum {
 enum {
 	RK805_ID = 0x8050,
 	RK808_ID = 0x0000,
+	RK809_ID = 0x8090,
 	RK816_ID = 0x8160,
 	RK817_ID = 0x8170,
 	RK818_ID = 0x8180,

commit 1c223666dcdc234f94640ded21407835a0af3712
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 15:22:26 2018 +0800

    pmic: rk8xx: add init register setting for rk817
    
    1. set pmic_sleep as sleep function;
    2. set pmic_int active low.
    
    Change-Id: I4bc4034e18b19dc9b1b328870db652d11173fe3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 9cba035e83..76328e28b1 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -41,11 +41,6 @@
 #define RK805_PWRON_RISE_INT	(1 << 0)
 #define RK805_PWRON_FALL_INT	(1 << 7)
 
-struct reg_data {
-	u8 reg;
-	u8 val;
-};
-
 struct rk8xx_key_priv {
 	u8 key_int_sts_reg;
 	u8 key_int_msk_reg;
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index bc87a877b2..59f1b9172e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -13,6 +13,18 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * Only when system suspend while U-Boot charge needs this config support
+ */
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+static struct reg_data rk817_init_reg[] = {
+	/* Set pmic_sleep as sleep function */
+	{ RK817_PMIC_SYS_CFG3, 0x08, 0x18 },
+	/* Set pmic_int active low */
+	{ RK817_GPIO_INT_CFG,  0x00, 0x02 },
+};
+#endif
+
 static const struct pmic_child_info pmic_children_info[] = {
 	{ .prefix = "DCDC_REG", .driver = "rk8xx_buck"},
 	{ .prefix = "LDO_REG", .driver = "rk8xx_ldo"},
@@ -143,6 +155,9 @@ static int rk8xx_bind(struct udevice *dev)
 static int rk8xx_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
+	struct reg_data *init_data = NULL;
+	int init_data_num = 0;
+	int ret = 0, i;
 	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
@@ -158,15 +173,37 @@ static int rk8xx_probe(struct udevice *dev)
 	rk8xx_read(dev, id_lsb, &lsb, 1);
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
-	if ((priv->variant != RK808_ID) &&
-	    (priv->variant != RK805_ID) &&
-	    (priv->variant != RK816_ID) &&
-	    (priv->variant != RK817_ID) &&
-	    (priv->variant != RK818_ID)) {
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK808_ID:
+	case RK816_ID:
+	case RK818_ID:
+		break;
+	case RK817_ID:
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+		init_data = rk817_init_reg;
+		init_data_num = ARRAY_SIZE(rk817_init_reg);
+#endif
+		break;
+	default:
 		printf("Unknown PMIC: RK%x!!\n", priv->variant);
 		return -EINVAL;
 	}
 
+	for (i = 0; i < init_data_num; i++) {
+		ret = pmic_clrsetbits(dev,
+				      init_data[i].reg,
+				      init_data[i].mask,
+				      init_data[i].val);
+		if (ret < 0) {
+			printf("%s: i2c set reg 0x%x failed, ret=%d\n",
+			       __func__, init_data[i].reg, ret);
+		}
+
+		debug("%s: reg[0x%x] = 0x%x\n", __func__, init_data[i].reg,
+		      pmic_reg_read(dev, init_data[i].reg));
+	}
+
 	printf("PMIC:  RK%x\n", priv->variant);
 
 	return 0;
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 79c57896bd..51dd046f11 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -195,6 +195,15 @@ enum {
 #define RK817_ID_LSB	0xee
 #define RK8XX_ID_MSK	0xfff0
 
+#define RK817_PMIC_SYS_CFG3	0xf4
+#define RK817_GPIO_INT_CFG	0xfe
+
+struct reg_data {
+	u8 reg;
+	u8 val;
+	u8 mask;
+};
+
 struct rk8xx_reg_table {
 	char *name;
 	u8 reg_ctl;

commit 3c3675ddd7dfb95c8dc592003d9f5feb2e081ff9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 24 15:18:27 2018 +0800

    rockchip: recoganize boot devtype dynamicly
    
    currently support: emmc and rknand.
    
    Change-Id: I8b0e2623256ed3357de2acbee0d2455162228ab5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 6b2a610cf4..e38627e4c1 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -20,6 +20,7 @@
 
 #ifndef __ASSEMBLY__
 int setup_boot_mode(void);
+void devtype_num_envset(void);
 #endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index b50b17329c..f88a14b3d0 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -64,14 +64,20 @@ __weak int rockchip_dnl_key_pressed(void)
 		return false;
 }
 
-static void devtype_num_envset(void)
+void devtype_num_envset(void)
 {
+	static int done = 0;
+
+	if (done)
+		return;
+
 	const char *devtype_num_set =
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
 	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
 	"fi;";
 
 	run_command_list(devtype_num_set, -1, 0);
+	done = 1;
 }
 
 void rockchip_dnl_mode_check(void)
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 582255d436..8e07264999 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -148,30 +148,28 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
-	char *boot_media = NULL;
+	char *boot_media = NULL, *devtype = NULL;
 	char boot_options[128] = {0};
 	static int appended;
 
-	#ifdef CONFIG_EMMC_BOOT
+	devtype_num_envset();
+	devtype = env_get("devtype");
+
+	if (!strcmp(devtype, "mmc")) {
 		type = IF_TYPE_MMC;
 		boot_media = "emmc";
-	#endif /* CONFIG_EMMC_BOOT */
-	#ifdef CONFIG_QSPI_BOOT
-		type = IF_TYPE_SPI_NAND;
-		boot_media = "nand";
-	#endif /* CONFIG_QSPI_BOOT */
-	#ifdef CONFIG_NAND_BOOT
+	} else if (!strcmp(devtype, "rknand")) {
 		type = IF_TYPE_RKNAND;
 		boot_media = "nand";
-	#endif /* CONFIG_NAND_BOOT */
-	#ifdef CONFIG_NOR_BOOT
-		type = IF_TYPE_SPI_NOR;
-	#endif /* CONFIG_NOR_BOOT */
+	} else {
+		/* Add new to support */
+	}
 
 	/* For current use(Only EMMC support!) */
 	if (!type) {
 		type = IF_TYPE_MMC;
 		boot_media = "emmc";
+		printf("Use emmc as default boot media\n");
 	}
 
 	if (!appended && boot_media) {

commit d5bbff804fbade799dd6aaf4ae887154a8eb1859
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 16:38:10 2018 +0800

    rockchip: test-timer: support ARM64 px30
    
    Add px30 timer 1 base;
    Add support for read arm64 arch counter.
    
    Change-Id: I8ea8b6835647d063d1c9a0fa579df0522b0f2c11
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
index f7b7db0cb6..8a2d656e04 100644
--- a/test/rockchip/test-timer.c
+++ b/test/rockchip/test-timer.c
@@ -40,6 +40,9 @@
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 #define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
 #define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_PX30)
+#define TIMER_BASE		(0xFF210000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
 #else
 "Missing definitions of timer module test"
 #endif
@@ -93,7 +96,11 @@ static inline uint64_t arch_counter_get_cntpct(void)
 	uint64_t cval;
 
 	isb();
+#ifdef CONFIG_ARM64
+	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
+#else
 	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+#endif
 	return cval;
 }
 

commit eb80c6bc09b80acab6491a04037eb9d6f96a3e9a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 25 15:08:09 2018 +0800

    rockchip: test: fix size warning in arm64
    
    Fix warning in emmc and nand test case.
    
    Change-Id: Id879e22b2f735d4d72be9a98dd7d9b074b8185ae
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index 05406d3eac..7dc538e45d 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -69,7 +69,7 @@ int board_emmc_test(int argc, char * const argv[])
 	/* 2. Prepare and start cli command */
 
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x%x 0x%x",
-		 (u32)write_buffer, lba, blocks);
+		 (u32)(ulong)write_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
@@ -80,7 +80,7 @@ int board_emmc_test(int argc, char * const argv[])
 		blocks / 2048, ts, (blocks >> 1) / ts);
 
 	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x%x 0x%x",
-		 (u32)read_buffer, lba, blocks);
+		 (u32)(ulong)read_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
diff --git a/test/rockchip/test-rknand.c b/test/rockchip/test-rknand.c
index de38b0d508..c02b003039 100644
--- a/test/rockchip/test-rknand.c
+++ b/test/rockchip/test-rknand.c
@@ -76,7 +76,7 @@ int board_rknand_test(int argc, char * const argv[])
 
 	snprintf(cmd_rknand, sizeof(cmd_rknand),
 		 "rknand write 0x%x 0x1000 0x%x",
-		 (u32)write_buffer, blocks);
+		 (u32)(ulong)write_buffer, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_rknand, 0);
 	ts = get_timer(0) - ts;
@@ -88,7 +88,7 @@ int board_rknand_test(int argc, char * const argv[])
 
 	snprintf(cmd_rknand, sizeof(cmd_rknand),
 		 "rknand read 0x%x 0x1000 0x%x",
-		 (u32)read_buffer, blocks);
+		 (u32)(ulong)read_buffer, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_rknand, 0);
 	ts = get_timer(0) - ts;

commit db8cda52f56e0ee141b1df81e39e1bf23a54bc7f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 24 18:03:55 2018 +0800

    part_efi: update part_get_info_efi() to reuse part info
    
    We use part_get_info_by_name to get partition, this will read MBR, GPT
    header and GPT entry every time, optimize to read only once.
    
    Change-Id: I4d6c508311f7cc661aa991b3c61460a2b8d63fac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 7582b6feb5..a83558a976 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -269,8 +269,15 @@ void part_print_efi(struct blk_desc *dev_desc)
 int part_get_info_efi(struct blk_desc *dev_desc, int part,
 		      disk_partition_t *info)
 {
-	ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz);
-	gpt_entry *gpt_pte = NULL;
+	static gpt_entry *gpt_pte = NULL;
+	static gpt_header *gpt_head = NULL;
+
+	if (!gpt_head)
+		gpt_head = memalign(ARCH_DMA_MINALIGN, dev_desc->blksz);
+
+	/* We suppose different dev have different size, eg. emmc vs sd */
+	if (!gpt_head && (gpt_head->last_usable_lba + 0x22) != dev_desc->lba)
+		gpt_pte = NULL;
 
 	/* "part" argument must be at least 1 */
 	if (part < 1) {
@@ -297,7 +304,6 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	    !is_pte_valid(&gpt_pte[part - 1])) {
 		debug("%s: *** ERROR: Invalid partition number %d ***\n",
 			__func__, part);
-		free(gpt_pte);
 		return -1;
 	}
 
@@ -324,8 +330,6 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	debug("%s: start 0x" LBAF ", size 0x" LBAF ", name %s\n", __func__,
 	      info->start, info->size, info->name);
 
-	/* Remember to free pte */
-	free(gpt_pte);
 	return 0;
 }
 
@@ -939,6 +943,10 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 		return 0;
 	}
 
+	/* Re-use pte if it's not NULL */
+	if (*pgpt_pte)
+		return 1;
+
 	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
 
 	/* Read MBR Header from device */

commit 9edad0e87725fc79b21189ba2c4b57c30b87d114
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Feb 24 17:42:55 2018 +0800

    configs: rockchip: Enable pwm config for evb-px30
    
    The backlight need to use the pwm interface.
    
    Change-Id: I7b36b7116d16c974413e43178f0f5826a1e1902c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index e47b2b75c5..8cce86aa2c 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -47,6 +47,7 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000

commit 35aeff25db8f005161bb82eb223fba3cbb536938
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Feb 24 17:39:46 2018 +0800

    dts: rockchip: Add backlight support for px30-evb
    
    The backlight uses the pwm1.
    
    Change-Id: Ic546c82c075210d7c85d99f99f51406729db3146
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 2fee4918b3..10b39e2cb1 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -59,6 +59,45 @@
 			press-threshold-microvolt = <614000>;
 		};
 	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm1 0 25000 0>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <200>;
+	};
 };
 
 
@@ -350,6 +389,10 @@
 	status = "okay";
 };
 
+&pwm1 {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };

commit a166f9e7373e43a3333b67db8a0aaaa0946399b0
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Feb 24 17:27:28 2018 +0800

    pwm: rk_pwm: Add pwm support for rk3328
    
    The pwm of rk3328 is almost the same as rk3288, except
    the lock feature, would implement in feature.
    
    Change-Id: I22650128c456f25aa9815718386c50142cac404a
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 7d3e11d667..9eb3b369d0 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -106,6 +106,7 @@ static const struct pwm_ops rk_pwm_ops = {
 
 static const struct udevice_id rk_pwm_ids[] = {
 	{ .compatible = "rockchip,rk3288-pwm" },
+	{ .compatible = "rockchip,rk3328-pwm" },
 	{ }
 };
 

commit d2866b3201e096051554c2f7219d91c940ac8bd4
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Thu Jan 25 15:27:10 2018 +0100

    rockchip: clk: guard set_parent implementations against OF_PLATDATA
    
    The set_parent implementations do not make sense when OF_PLATDATA is
    enabled.  We guard these against OF_PLATDATA and don't populate the
    set_parent-op when this is the case.
    
    Change-Id: I37c384bf6851666550b8b3902d79b9278cff5074
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index d5b17c0c3a..fc5c75e263 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -964,7 +964,7 @@ static int rk3288_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
-static int rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
 	struct rk3288_cru *cru = priv->cru;
@@ -1002,7 +1002,7 @@ static int rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
-static int rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_MAC:
@@ -1020,7 +1020,9 @@ static struct clk_ops rk3288_clk_ops = {
 	.set_rate	= rk3288_clk_set_rate,
 	.get_phase	= rk3288_clk_get_phase,
 	.set_phase	= rk3288_clk_set_phase,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent	= rk3288_clk_set_parent,
+#endif
 };
 
 static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index fab315caff..37b1a41ccd 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -520,7 +520,7 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
-static int rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
 	struct rk3368_cru *cru = priv->cru;
@@ -557,7 +557,7 @@ static int rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
-static int rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_MAC:
@@ -571,7 +571,9 @@ static int rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
 static struct clk_ops rk3368_clk_ops = {
 	.get_rate = rk3368_clk_get_rate,
 	.set_rate = rk3368_clk_set_rate,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent = rk3368_clk_set_parent,
+#endif
 };
 
 static int rk3368_clk_probe(struct udevice *dev)
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 1ca6b91fc2..b86f9f4b05 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -943,7 +943,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
-static int rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
 	const char *clock_output_name;
@@ -978,7 +978,7 @@ static int rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
 	return -EINVAL;
 }
 
-static int rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
+static int __maybe_unused rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
 {
 	switch (clk->id) {
 	case SCLK_RMII_SRC:
@@ -1006,7 +1006,9 @@ static int rk3399_clk_enable(struct clk *clk)
 static struct clk_ops rk3399_clk_ops = {
 	.get_rate = rk3399_clk_get_rate,
 	.set_rate = rk3399_clk_set_rate,
+#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent = rk3399_clk_set_parent,
+#endif
 	.enable = rk3399_clk_enable,
 };
 

commit b2477abafdf5ddff73639f8cf6b5057f36021774
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:07:04 2018 +0800

    clk: rockchip: clk_rk3368: Implement "assign-clock-parent"
    
    Implement the setting parent for gmac clock, and add internal
    pll div set for mac clk.
    
    Change-Id: I4f75d0c1e35bbe7ff0af07d05dbb42f4732d5eb7
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 5f6a5fbe4c..6a6fe4775d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -95,6 +95,13 @@ enum {
 	CLK_SARADC_DIV_CON_WIDTH	= 8,
 
 	/* CLKSEL43_CON */
+	GMAC_DIV_CON_SHIFT		= 0x0,
+	GMAC_DIV_CON_MASK		= GENMASK(4, 0),
+	GMAC_PLL_SHIFT			= 6,
+	GMAC_PLL_MASK			= GENMASK(7, 6),
+	GMAC_PLL_SELECT_NEW		= (0x0 << GMAC_PLL_SHIFT),
+	GMAC_PLL_SELECT_CODEC		= (0x1 << GMAC_PLL_SHIFT),
+	GMAC_PLL_SELECT_GENERAL		= (0x2 << GMAC_PLL_SHIFT),
 	GMAC_MUX_SEL_EXTCLK             = BIT(8),
 
 	/* CLKSEL51_CON */
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1af10891fb..fab315caff 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -311,15 +311,43 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
 #endif
 
 #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru,
-				 ulong clk_id, ulong set_rate)
+static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, ulong set_rate)
 {
+	ulong ret;
+
 	/*
-	 * This models the 'assigned-clock-parents = <&ext_gmac>' from
-	 * the DTS and switches to the 'ext_gmac' clock parent.
+	 * The gmac clock can be derived either from an external clock
+	 * or can be generated from internally by a divider from SCLK_MAC.
 	 */
-	rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
-	return set_rate;
+	if (readl(&cru->clksel_con[43]) & GMAC_MUX_SEL_EXTCLK) {
+		/* An external clock will always generate the right rate... */
+		ret = set_rate;
+	} else {
+		u32 con = readl(&cru->clksel_con[43]);
+		ulong pll_rate;
+		u8 div;
+
+		if (((con >> GMAC_PLL_SHIFT) & GMAC_PLL_MASK) ==
+		    GMAC_PLL_SELECT_GENERAL)
+			pll_rate = GPLL_HZ;
+		else if (((con >> GMAC_PLL_SHIFT) & GMAC_PLL_MASK) ==
+			 GMAC_PLL_SELECT_CODEC)
+			pll_rate = CPLL_HZ;
+		else
+			/* CPLL is not set */
+			return -EPERM;
+
+		div = DIV_ROUND_UP(pll_rate, set_rate) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->clksel_con[43], GMAC_DIV_CON_MASK,
+				     div << GMAC_DIV_CON_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
+
+	return ret;
 }
 #endif
 
@@ -479,7 +507,7 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
 	case SCLK_MAC:
 		/* select the external clock */
-		ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
+		ret = rk3368_gmac_set_clk(priv->cru, rate);
 		break;
 #endif
 	case SCLK_SARADC:
@@ -492,9 +520,58 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3368_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3368_cru *cru = priv->cru;
+	const char *clock_output_name;
+	int ret;
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC ("sclk_mac"), switch to the internal
+	 * clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC)) {
+		debug("%s: switching GAMC to SCLK_MAC\n", __func__);
+		rk_clrreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "ext_gmac".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "ext_gmac", switch to the external clock input */
+	if (!strcmp(clock_output_name, "ext_gmac")) {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3368_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk3368_gmac_set_parent(clk, parent);
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3368_clk_ops = {
 	.get_rate = rk3368_clk_get_rate,
 	.set_rate = rk3368_clk_set_rate,
+	.set_parent = rk3368_clk_set_parent,
 };
 
 static int rk3368_clk_probe(struct udevice *dev)

commit b0b687083556912fcd77170684cec67b062f7900
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:06:33 2018 +0800

    clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-rate"
    
    The RK3288 CRU-node assigns rates to a number of clocks that are not
    implemented in the RK3288 clock-driver (but which have been
    sufficiently initialised from rkclk_init()): for these clocks, we
    implement the gmac clock set parent, but simply ignore the
    others' set_rate() operation and return 0 to signal success.
    
    Change-Id: Ic1a41634aba674001beb0e7e5ca3f7f2fa008e51
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 431ff89e21..d5b17c0c3a 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -295,15 +295,42 @@ static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div)
 	return 0;
 }
 
-static int rockchip_mac_set_clk(struct rk3288_cru *cru,
-				  int periph, uint freq)
+static int rockchip_mac_set_clk(struct rk3288_cru *cru, uint freq)
 {
-	/* Assuming mac_clk is fed by an external clock */
-	rk_clrsetreg(&cru->cru_clksel_con[21],
-		     RMII_EXTCLK_MASK,
-		     RMII_EXTCLK_SELECT_EXT_CLK << RMII_EXTCLK_SHIFT);
+	ulong ret;
+
+	/*
+	 * The gmac clock can be derived either from an external clock
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&cru->cru_clksel_con[21]) & RMII_EXTCLK_MASK) {
+		/* An external clock will always generate the right rate... */
+		ret = freq;
+	} else {
+		u32 con = readl(&cru->cru_clksel_con[21]);
+		ulong pll_rate;
+		u8 div;
+
+		if (((con >> EMAC_PLL_SHIFT) & EMAC_PLL_MASK) ==
+		    EMAC_PLL_SELECT_GENERAL)
+			pll_rate = GPLL_HZ;
+		else if (((con >> EMAC_PLL_SHIFT) & EMAC_PLL_MASK) ==
+			 EMAC_PLL_SELECT_CODEC)
+			pll_rate = CPLL_HZ;
+		else
+			pll_rate = NPLL_HZ;
+
+		div = DIV_ROUND_UP(pll_rate, freq) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->cru_clksel_con[21], MAC_DIV_CON_MASK,
+				     div << MAC_DIV_CON_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
 
-	 return 0;
+	return ret;
 }
 
 static int rockchip_vop_set_clk(struct rk3288_cru *cru, struct rk3288_grf *grf,
@@ -747,7 +774,7 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 #ifndef CONFIG_SPL_BUILD
 	case SCLK_MAC:
-		new_rate = rockchip_mac_set_clk(priv->cru, clk->id, rate);
+		new_rate = rockchip_mac_set_clk(priv->cru, rate);
 		break;
 	case DCLK_VOP0:
 	case DCLK_VOP1:
@@ -800,6 +827,17 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SARADC:
 		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
 		break;
+	case PLL_GPLL:
+	case PLL_CPLL:
+	case PLL_NPLL:
+	case ACLK_CPU:
+	case HCLK_CPU:
+	case PCLK_CPU:
+	case ACLK_PERI:
+	case HCLK_PERI:
+	case PCLK_PERI:
+	case SCLK_UART0:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -926,11 +964,63 @@ static int rk3288_clk_set_phase(struct clk *clk, int degrees)
 	return ret;
 }
 
+static int rk3288_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	const char *clock_output_name;
+	int ret;
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC_PLL ("mac_pll_src"), switch to the internal
+	 * clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_PLL)) {
+		debug("%s: switching GAMC to SCLK_MAC_PLL\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, 0);
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "ext_gmac".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "ext_gmac", switch to the external clock input */
+	if (!strcmp(clock_output_name, "ext_gmac")) {
+		debug("%s: switching GMAC to external clock\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK,
+			     RMII_EXTCLK_SELECT_EXT_CLK << RMII_EXTCLK_SHIFT);
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3288_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk3288_gmac_set_parent(clk, parent);
+	case SCLK_USBPHY480M_SRC:
+		return 0;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3288_clk_ops = {
 	.get_rate	= rk3288_clk_get_rate,
 	.set_rate	= rk3288_clk_set_rate,
 	.get_phase	= rk3288_clk_get_phase,
 	.set_phase	= rk3288_clk_set_phase,
+	.set_parent	= rk3288_clk_set_parent,
 };
 
 static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index 216eee5b59..e37113a72d 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -76,6 +76,7 @@
 #define SCLK_PVTM_CORE		123
 #define SCLK_PVTM_GPU		124
 
+#define SCLK_MAC_PLL		150
 #define SCLK_MAC		151
 #define SCLK_MACREF_OUT		152
 

commit 506b2ea9fbbe2eb3463971ce1f104eae586781b3
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:06:16 2018 +0800

    ARM: dts: rk3288: Remove unused LCDC clock assigned
    
    The LCDC assigned rate is 0, it will make boot error,
    error log:"pll_para_config: the frequency can not be
     0 Hz". Remove them, and the lcdc driver will do the
    correct clock rate setting.
    
    Change-Id: Ic189f6747e36a2f4083f81d9db899a9f44fe0936
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index da518783e2..2c8a616782 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -604,19 +604,16 @@
 		u-boot,dm-pre-reloc;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
-		assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
-				  <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+		assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
 				  <&cru PLL_NPLL>, <&cru ACLK_CPU>,
 				  <&cru HCLK_CPU>, <&cru PCLK_CPU>,
 				  <&cru ACLK_PERI>, <&cru HCLK_PERI>,
 				  <&cru PCLK_PERI>;
-		assigned-clock-rates = <0>, <0>,
-				       <594000000>, <400000000>,
+		assigned-clock-rates = <594000000>, <400000000>,
 				       <500000000>, <300000000>,
 				       <150000000>, <75000000>,
 				       <300000000>, <150000000>,
 				       <75000000>;
-		assigned-clock-parents = <&cru PLL_NPLL>, <&cru PLL_GPLL>;
 	};
 
 	grf: syscon@ff770000 {

commit ba37392aaf3c7df5af04067780d97efb5259a3e5
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:05:51 2018 +0800

    config: evb-rk3229: Enable rk gmac configs
    
    Add gmac config support for rk3229 evb.
    
    Change-Id: I11514c969b35c7418aae6c0c66fe7003d3aa3b5c
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 13e46d9e0b..94051e7e3b 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -46,6 +46,7 @@ CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -59,6 +60,10 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y

commit af166ffa36927dffc447d2337e2e62b1b120dc27
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:05:30 2018 +0800

    net: gmac_rockchip: Add support for the RK3228 GMAC
    
    The GMAC in the RK3228 once again is identical to the incarnation in
    the RK3288 and the RK3399, except for where some of the configuration
    and control registers are located in the GRF.
    
    This adds the RK3368-specific logic necessary to reuse this driver.
    
    Change-Id: Iba16013ad469196e0d0674fa62d1dcecf6749968
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 8e83bb7402..1eb7ce1aa1 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -15,6 +15,7 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk322x.h>
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3328.h>
 #include <asm/arch/grf_rk3368.h>
@@ -80,6 +81,39 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 	return designware_eth_ofdata_to_platdata(dev);
 }
 
+static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct rk322x_grf *grf;
+	int clk;
+	enum {
+		RK3228_GMAC_CLK_SEL_SHIFT = 8,
+		RK3228_GMAC_CLK_SEL_MASK  = GENMASK(9, 8),
+		RK3228_GMAC_CLK_SEL_125M  = 0 << 8,
+		RK3228_GMAC_CLK_SEL_25M   = 3 << 8,
+		RK3228_GMAC_CLK_SEL_2_5M  = 2 << 8,
+	};
+
+	switch (priv->phydev->speed) {
+	case 10:
+		clk = RK3228_GMAC_CLK_SEL_2_5M;
+		break;
+	case 100:
+		clk = RK3228_GMAC_CLK_SEL_25M;
+		break;
+	case 1000:
+		clk = RK3228_GMAC_CLK_SEL_125M;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1], RK3228_GMAC_CLK_SEL_MASK, clk);
+
+	return 0;
+}
+
 static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk3288_grf *grf;
@@ -232,6 +266,50 @@ static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk322x_grf *grf;
+	enum {
+		RK3228_RMII_MODE_SHIFT = 10,
+		RK3228_RMII_MODE_MASK  = BIT(10),
+
+		RK3228_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK3228_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK3228_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RK3228_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
+		RK3228_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3228_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RK3228_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
+		RK3228_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3228_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+	enum {
+		RK3228_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,
+		RK3228_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(13, 7),
+
+		RK3228_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK3228_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1],
+		     RK3228_RMII_MODE_MASK |
+		     RK3228_GMAC_PHY_INTF_SEL_MASK |
+		     RK3228_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK3228_TXCLK_DLY_ENA_GMAC_MASK,
+		     RK3228_GMAC_PHY_INTF_SEL_RGMII |
+		     RK3228_RXCLK_DLY_ENA_GMAC_ENABLE |
+		     RK3228_TXCLK_DLY_ENA_GMAC_ENABLE);
+
+	rk_clrsetreg(&grf->mac_con[0],
+		     RK3228_CLK_RX_DL_CFG_GMAC_MASK |
+		     RK3228_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RK3228_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RK3228_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
 static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3288_grf *grf;
@@ -459,6 +537,11 @@ const struct eth_ops gmac_rockchip_eth_ops = {
 	.write_hwaddr		= designware_eth_write_hwaddr,
 };
 
+const struct rk_gmac_ops rk3228_gmac_ops = {
+	.fix_mac_speed = rk3228_gmac_fix_mac_speed,
+	.set_to_rgmii = rk3228_gmac_set_to_rgmii,
+};
+
 const struct rk_gmac_ops rk3288_gmac_ops = {
 	.fix_mac_speed = rk3288_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3288_gmac_set_to_rgmii,
@@ -485,6 +568,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 };
 
 static const struct udevice_id rockchip_gmac_ids[] = {
+	{ .compatible = "rockchip,rk3228-gmac",
+	  .data = (ulong)&rk3228_gmac_ops },
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
 	{ .compatible = "rockchip,rk3328-gmac",

commit 58996dfcd4e8c9f7eda2d9765fdbd3a74396961e
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:05:12 2018 +0800

    clk: rockchip: Add rk322x gamc clock support
    
    Assuming mac_clk is fed by an external clock, set clk_rmii_src
    clock select control register from IO for rgmii interface.
    
    Change-Id: I6405c3b2ead429084118c544bcc461e0b301d77a
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index edcf49f0e8..54b53c4d34 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -238,6 +238,41 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
 	return DIV_TO_RATE(src_rate, div) / 2;
 }
 
+static ulong rk322x_mac_set_clk(struct rk322x_cru *cru, uint freq)
+{
+	ulong ret;
+
+	/*
+	 * The gmac clock can be derived either from an external clock
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&cru->cru_clksel_con[5]) & BIT(5)) {
+		/* An external clock will always generate the right rate... */
+		ret = freq;
+	} else {
+		u32 con = readl(&cru->cru_clksel_con[5]);
+		ulong pll_rate;
+		u8 div;
+
+		if ((con >> MAC_PLL_SEL_SHIFT) & MAC_PLL_SEL_MASK)
+			pll_rate = GPLL_HZ;
+		else
+			/* CPLL is not set */
+			return -EPERM;
+
+		div = DIV_ROUND_UP(pll_rate, freq) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->cru_clksel_con[5], CLK_MAC_DIV_MASK,
+				     div << CLK_MAC_DIV_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
+
+	return ret;
+}
+
 static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
 				  int periph, uint freq)
 {
@@ -378,6 +413,11 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_DDR:
 		new_rate = rk322x_ddr_set_clk(priv->cru, rate);
 		break;
+	case SCLK_MAC:
+		new_rate = rk322x_mac_set_clk(priv->cru, rate);
+		break;
+	case PLL_GPLL:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -385,9 +425,76 @@ static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate)
 	return new_rate;
 }
 
+static int rk322x_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk322x_cru *cru = priv->cru;
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC_SRC ("sclk_gmac_src"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_SRC)) {
+		debug("%s: switching RGMII to SCLK_MAC_SRC\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[5], BIT(5), 0);
+		return 0;
+	}
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC_EXTCLK (sclk_mac_extclk), switch to the external clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_EXTCLK)) {
+		debug("%s: switching RGMII to SCLK_MAC_EXTCLK\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[5], BIT(5), BIT(5));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk322x_gmac_extclk_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
+	const char *clock_output_name;
+	struct rk322x_cru *cru = priv->cru;
+	int ret;
+
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	if (!strcmp(clock_output_name, "ext_gmac")) {
+		debug("%s: switching gmac extclk to ext_gmac\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[29], BIT(10), 0);
+		return 0;
+	} else if (!strcmp(clock_output_name, "phy_50m_out")) {
+		debug("%s: switching gmac extclk to phy_50m_out\n", __func__);
+		rk_clrsetreg(&cru->cru_clksel_con[29], BIT(10), BIT(10));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk322x_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC:
+		return rk322x_gmac_set_parent(clk, parent);
+	case SCLK_MAC_EXTCLK:
+		return rk322x_gmac_extclk_set_parent(clk, parent);
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk322x_clk_ops = {
 	.get_rate	= rk322x_clk_get_rate,
 	.set_rate	= rk322x_clk_set_rate,
+	.set_parent	= rk322x_clk_set_parent,
 };
 
 static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)

commit ae0a27344f0b609dd6d4a3a14b2171b533d8db0b
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:04:26 2018 +0800

    rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver
    
    Clean the iomux definitions at grf_rk322x.h, and move them into
    pinctrl-driver for resolving the compiling error of redefinition.
    After that, define the uart2 iomux at rk322x-board file.
    
    Change-Id: If409e90706650de9fbe75b5c5fa47498cbbc79fe
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
index c0c0d84cf1..52e5a0a0d5 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
@@ -88,461 +88,6 @@ struct rk322x_sgrf {
 	unsigned int busdmac_con[4];
 };
 
-/* GRF_GPIO0A_IOMUX */
-enum {
-	GPIO0A7_SHIFT		= 14,
-	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
-	GPIO0A7_GPIO		= 0,
-	GPIO0A7_I2C3_SDA,
-	GPIO0A7_HDMI_DDCSDA,
-
-	GPIO0A6_SHIFT		= 12,
-	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
-	GPIO0A6_GPIO		= 0,
-	GPIO0A6_I2C3_SCL,
-	GPIO0A6_HDMI_DDCSCL,
-
-	GPIO0A3_SHIFT		= 6,
-	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
-	GPIO0A3_GPIO		= 0,
-	GPIO0A3_I2C1_SDA,
-	GPIO0A3_SDIO_CMD,
-
-	GPIO0A2_SHIFT		= 4,
-	GPIO0A2_MASK		= 3 << GPIO0A2_SHIFT,
-	GPIO0A2_GPIO		= 0,
-	GPIO0A2_I2C1_SCL,
-
-	GPIO0A1_SHIFT		= 2,
-	GPIO0A1_MASK		= 3 << GPIO0A1_SHIFT,
-	GPIO0A1_GPIO		= 0,
-	GPIO0A1_I2C0_SDA,
-
-	GPIO0A0_SHIFT		= 0,
-	GPIO0A0_MASK		= 3 << GPIO0A0_SHIFT,
-	GPIO0A0_GPIO		= 0,
-	GPIO0A0_I2C0_SCL,
-};
-
-/* GRF_GPIO0B_IOMUX */
-enum {
-	GPIO0B7_SHIFT		= 14,
-	GPIO0B7_MASK		= 3 << GPIO0B7_SHIFT,
-	GPIO0B7_GPIO		= 0,
-	GPIO0B7_HDMI_HDP,
-
-	GPIO0B6_SHIFT		= 12,
-	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
-	GPIO0B6_GPIO		= 0,
-	GPIO0B6_I2S_SDI,
-	GPIO0B6_SPI_CSN0,
-
-	GPIO0B5_SHIFT		= 10,
-	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
-	GPIO0B5_GPIO		= 0,
-	GPIO0B5_I2S_SDO,
-	GPIO0B5_SPI_RXD,
-
-	GPIO0B3_SHIFT		= 6,
-	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
-	GPIO0B3_GPIO		= 0,
-	GPIO0B3_I2S1_LRCKRX,
-	GPIO0B3_SPI_TXD,
-
-	GPIO0B1_SHIFT		= 2,
-	GPIO0B1_MASK		= 3 << GPIO0B1_SHIFT,
-	GPIO0B1_GPIO		= 0,
-	GPIO0B1_I2S_SCLK,
-	GPIO0B1_SPI_CLK,
-
-	GPIO0B0_SHIFT		= 0,
-	GPIO0B0_MASK		= 3,
-	GPIO0B0_GPIO		= 0,
-	GPIO0B0_I2S_MCLK,
-};
-
-/* GRF_GPIO0C_IOMUX */
-enum {
-	GPIO0C4_SHIFT		= 8,
-	GPIO0C4_MASK		= 3 << GPIO0C4_SHIFT,
-	GPIO0C4_GPIO		= 0,
-	GPIO0C4_HDMI_CECSDA,
-
-	GPIO0C1_SHIFT		= 2,
-	GPIO0C1_MASK		= 3 << GPIO0C1_SHIFT,
-	GPIO0C1_GPIO		= 0,
-	GPIO0C1_UART0_RSTN,
-	GPIO0C1_CLK_OUT1,
-};
-
-/* GRF_GPIO0D_IOMUX */
-enum {
-	GPIO0D6_SHIFT		= 12,
-	GPIO0D6_MASK		= 3 << GPIO0D6_SHIFT,
-	GPIO0D6_GPIO		= 0,
-	GPIO0D6_SDIO_PWREN,
-	GPIO0D6_PWM11,
-
-
-	GPIO0D4_SHIFT		= 8,
-	GPIO0D4_MASK		= 3 << GPIO0D4_SHIFT,
-	GPIO0D4_GPIO		= 0,
-	GPIO0D4_PWM2,
-
-	GPIO0D3_SHIFT		= 6,
-	GPIO0D3_MASK		= 3 << GPIO0D3_SHIFT,
-	GPIO0D3_GPIO		= 0,
-	GPIO0D3_PWM1,
-
-	GPIO0D2_SHIFT		= 4,
-	GPIO0D2_MASK		= 3 << GPIO0D2_SHIFT,
-	GPIO0D2_GPIO		= 0,
-	GPIO0D2_PWM0,
-};
-
-/* GRF_GPIO1A_IOMUX */
-enum {
-	GPIO1A7_SHIFT		= 14,
-	GPIO1A7_MASK		= 1,
-	GPIO1A7_GPIO		= 0,
-	GPIO1A7_SDMMC_WRPRT,
-};
-
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT		= 14,
-	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
-	GPIO1B7_GPIO		= 0,
-	GPIO1B7_SDMMC_CMD,
-
-	GPIO1B6_SHIFT		= 12,
-	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
-	GPIO1B6_GPIO		= 0,
-	GPIO1B6_SDMMC_PWREN,
-
-	GPIO1B4_SHIFT		= 8,
-	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
-	GPIO1B4_GPIO		= 0,
-	GPIO1B4_SPI_CSN1,
-	GPIO1B4_PWM12,
-
-	GPIO1B3_SHIFT		= 6,
-	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
-	GPIO1B3_GPIO		= 0,
-	GPIO1B3_UART1_RSTN,
-	GPIO1B3_PWM13,
-
-	GPIO1B2_SHIFT		= 4,
-	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
-	GPIO1B2_GPIO		= 0,
-	GPIO1B2_UART1_SIN,
-	GPIO1B2_UART21_SIN,
-
-	GPIO1B1_SHIFT		= 2,
-	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
-	GPIO1B1_GPIO		= 0,
-	GPIO1B1_UART1_SOUT,
-	GPIO1B1_UART21_SOUT,
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT		= 14,
-	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
-	GPIO1C7_GPIO		= 0,
-	GPIO1C7_NAND_CS3,
-	GPIO1C7_EMMC_RSTNOUT,
-
-	GPIO1C6_SHIFT		= 12,
-	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
-	GPIO1C6_GPIO		= 0,
-	GPIO1C6_NAND_CS2,
-	GPIO1C6_EMMC_CMD,
-
-
-	GPIO1C5_SHIFT		= 10,
-	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
-	GPIO1C5_GPIO		= 0,
-	GPIO1C5_SDMMC_D3,
-	GPIO1C5_JTAG_TMS,
-
-	GPIO1C4_SHIFT		= 8,
-	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
-	GPIO1C4_GPIO		= 0,
-	GPIO1C4_SDMMC_D2,
-	GPIO1C4_JTAG_TCK,
-
-	GPIO1C3_SHIFT		= 6,
-	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
-	GPIO1C3_GPIO		= 0,
-	GPIO1C3_SDMMC_D1,
-	GPIO1C3_UART2_SIN,
-
-	GPIO1C2_SHIFT		= 4,
-	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
-	GPIO1C2_GPIO		= 0,
-	GPIO1C2_SDMMC_D0,
-	GPIO1C2_UART2_SOUT,
-
-	GPIO1C1_SHIFT		= 2,
-	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
-	GPIO1C1_GPIO		= 0,
-	GPIO1C1_SDMMC_DETN,
-
-	GPIO1C0_SHIFT		= 0,
-	GPIO1C0_MASK		= 3 << GPIO1C0_SHIFT,
-	GPIO1C0_GPIO		= 0,
-	GPIO1C0_SDMMC_CLKOUT,
-};
-
-/* GRF_GPIO1D_IOMUX */
-enum {
-	GPIO1D7_SHIFT		= 14,
-	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
-	GPIO1D7_GPIO		= 0,
-	GPIO1D7_NAND_D7,
-	GPIO1D7_EMMC_D7,
-
-	GPIO1D6_SHIFT		= 12,
-	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
-	GPIO1D6_GPIO		= 0,
-	GPIO1D6_NAND_D6,
-	GPIO1D6_EMMC_D6,
-
-	GPIO1D5_SHIFT		= 10,
-	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
-	GPIO1D5_GPIO		= 0,
-	GPIO1D5_NAND_D5,
-	GPIO1D5_EMMC_D5,
-
-	GPIO1D4_SHIFT		= 8,
-	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
-	GPIO1D4_GPIO		= 0,
-	GPIO1D4_NAND_D4,
-	GPIO1D4_EMMC_D4,
-
-	GPIO1D3_SHIFT		= 6,
-	GPIO1D3_MASK		= 3 << GPIO1D3_SHIFT,
-	GPIO1D3_GPIO		= 0,
-	GPIO1D3_NAND_D3,
-	GPIO1D3_EMMC_D3,
-
-	GPIO1D2_SHIFT		= 4,
-	GPIO1D2_MASK		= 3 << GPIO1D2_SHIFT,
-	GPIO1D2_GPIO		= 0,
-	GPIO1D2_NAND_D2,
-	GPIO1D2_EMMC_D2,
-
-	GPIO1D1_SHIFT		= 2,
-	GPIO1D1_MASK		= 3 << GPIO1D1_SHIFT,
-	GPIO1D1_GPIO		= 0,
-	GPIO1D1_NAND_D1,
-	GPIO1D1_EMMC_D1,
-
-	GPIO1D0_SHIFT		= 0,
-	GPIO1D0_MASK		= 3 << GPIO1D0_SHIFT,
-	GPIO1D0_GPIO		= 0,
-	GPIO1D0_NAND_D0,
-	GPIO1D0_EMMC_D0,
-};
-
-/* GRF_GPIO2A_IOMUX */
-enum {
-	GPIO2A7_SHIFT		= 14,
-	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_NAND_DQS,
-	GPIO2A7_EMMC_CLKOUT,
-
-	GPIO2A5_SHIFT		= 10,
-	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO		= 0,
-	GPIO2A5_NAND_WP,
-	GPIO2A5_EMMC_PWREN,
-
-	GPIO2A4_SHIFT		= 8,
-	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO		= 0,
-	GPIO2A4_NAND_RDY,
-	GPIO2A4_EMMC_CMD,
-
-	GPIO2A3_SHIFT		= 6,
-	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO		= 0,
-	GPIO2A3_NAND_RDN,
-	GPIO2A4_SPI1_CSN1,
-
-	GPIO2A2_SHIFT		= 4,
-	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO		= 0,
-	GPIO2A2_NAND_WRN,
-	GPIO2A4_SPI1_CSN0,
-
-	GPIO2A1_SHIFT		= 2,
-	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO		= 0,
-	GPIO2A1_NAND_CLE,
-	GPIO2A1_SPI1_TXD,
-
-	GPIO2A0_SHIFT		= 0,
-	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO		= 0,
-	GPIO2A0_NAND_ALE,
-	GPIO2A0_SPI1_RXD,
-};
-
-/* GRF_GPIO2B_IOMUX */
-enum {
-	GPIO2B7_SHIFT		= 14,
-	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
-	GPIO2B7_GPIO		= 0,
-	GPIO2B7_GMAC_RXER,
-
-	GPIO2B6_SHIFT		= 12,
-	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO		= 0,
-	GPIO2B6_GMAC_CLK,
-	GPIO2B6_MAC_LINK,
-
-	GPIO2B5_SHIFT		= 10,
-	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO		= 0,
-	GPIO2B5_GMAC_TXEN,
-
-	GPIO2B4_SHIFT		= 8,
-	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO		= 0,
-	GPIO2B4_GMAC_MDIO,
-
-	GPIO2B3_SHIFT		= 6,
-	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO		= 0,
-	GPIO2B3_GMAC_RXCLK,
-
-	GPIO2B2_SHIFT		= 4,
-	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO		= 0,
-	GPIO2B2_GMAC_CRS,
-
-	GPIO2B1_SHIFT		= 2,
-	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO		= 0,
-	GPIO2B1_GMAC_TXCLK,
-
-
-	GPIO2B0_SHIFT		= 0,
-	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO		= 0,
-	GPIO2B0_GMAC_RXDV,
-	GPIO2B0_MAC_SPEED_IOUT,
-};
-
-/* GRF_GPIO2C_IOMUX */
-enum {
-	GPIO2C7_SHIFT		= 14,
-	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
-	GPIO2C7_GPIO		= 0,
-	GPIO2C7_GMAC_TXD3,
-
-	GPIO2C6_SHIFT		= 12,
-	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
-	GPIO2C6_GPIO		= 0,
-	GPIO2C6_GMAC_TXD2,
-
-	GPIO2C5_SHIFT		= 10,
-	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
-	GPIO2C5_GPIO		= 0,
-	GPIO2C5_I2C2_SCL,
-	GPIO2C5_GMAC_RXD2,
-
-	GPIO2C4_SHIFT		= 8,
-	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
-	GPIO2C4_GPIO		= 0,
-	GPIO2C4_I2C2_SDA,
-	GPIO2C4_GMAC_RXD3,
-
-	GPIO2C3_SHIFT		= 6,
-	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
-	GPIO2C3_GPIO		= 0,
-	GPIO2C3_GMAC_TXD0,
-
-	GPIO2C2_SHIFT		= 4,
-	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
-	GPIO2C2_GPIO		= 0,
-	GPIO2C2_GMAC_TXD1,
-
-	GPIO2C1_SHIFT		= 2,
-	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
-	GPIO2C1_GPIO		= 0,
-	GPIO2C1_GMAC_RXD0,
-
-	GPIO2C0_SHIFT		= 0,
-	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
-	GPIO2C0_GPIO		= 0,
-	GPIO2C0_GMAC_RXD1,
-};
-
-/* GRF_GPIO2D_IOMUX */
-enum {
-	GPIO2D1_SHIFT		= 2,
-	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
-	GPIO2D1_GPIO		= 0,
-	GPIO2D1_GMAC_MDC,
-
-	GPIO2D0_SHIFT		= 0,
-	GPIO2D0_MASK		= 3,
-	GPIO2D0_GPIO		= 0,
-	GPIO2D0_GMAC_COL,
-};
-
-/* GRF_GPIO3C_IOMUX */
-enum {
-	GPIO3C6_SHIFT		= 12,
-	GPIO3C6_MASK		= 3 << GPIO3C6_SHIFT,
-	GPIO3C6_GPIO		= 0,
-	GPIO3C6_DRV_VBUS1,
-
-	GPIO3C5_SHIFT		= 10,
-	GPIO3C5_MASK		= 3 << GPIO3C5_SHIFT,
-	GPIO3C5_GPIO		= 0,
-	GPIO3C5_PWM10,
-
-	GPIO3C1_SHIFT		= 2,
-	GPIO3C1_MASK		= 3 << GPIO3C1_SHIFT,
-	GPIO3C1_GPIO		= 0,
-	GPIO3C1_DRV_VBUS,
-};
-
-/* GRF_GPIO3D_IOMUX */
-enum {
-	GPIO3D2_SHIFT	= 4,
-	GPIO3D2_MASK	= 3 << GPIO3D2_SHIFT,
-	GPIO3D2_GPIO	= 0,
-	GPIO3D2_PWM3,
-};
-
-/* GRF_CON_IOMUX */
-enum {
-	CON_IOMUX_GMAC_SHIFT		= 15,
-	CON_IOMUX_GMAC_MASK	= 1 << CON_IOMUX_GMAC_SHIFT,
-	CON_IOMUX_UART1SEL_SHIFT	= 11,
-	CON_IOMUX_UART1SEL_MASK	= 1 << CON_IOMUX_UART1SEL_SHIFT,
-	CON_IOMUX_UART2SEL_SHIFT	= 8,
-	CON_IOMUX_UART2SEL_MASK	= 1 << CON_IOMUX_UART2SEL_SHIFT,
-	CON_IOMUX_UART2SEL_2	= 0,
-	CON_IOMUX_UART2SEL_21,
-	CON_IOMUX_EMMCSEL_SHIFT	= 7,
-	CON_IOMUX_EMMCSEL_MASK	= 1 << CON_IOMUX_EMMCSEL_SHIFT,
-	CON_IOMUX_PWM3SEL_SHIFT	= 3,
-	CON_IOMUX_PWM3SEL_MASK	= 1 << CON_IOMUX_PWM3SEL_SHIFT,
-	CON_IOMUX_PWM2SEL_SHIFT	= 2,
-	CON_IOMUX_PWM2SEL_MASK	= 1 << CON_IOMUX_PWM2SEL_SHIFT,
-	CON_IOMUX_PWM1SEL_SHIFT	= 1,
-	CON_IOMUX_PWM1SEL_MASK	= 1 << CON_IOMUX_PWM1SEL_SHIFT,
-	CON_IOMUX_PWM0SEL_SHIFT	= 0,
-	CON_IOMUX_PWM0SEL_MASK	= 1 << CON_IOMUX_PWM0SEL_SHIFT,
-};
-
 /* GRF_MACPHY_CON0 */
 enum {
 	MACPHY_CFG_ENABLE_SHIFT = 0,
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 48c9884658..b38a308500 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -52,6 +52,25 @@ int arch_cpu_init(void)
 void board_debug_uart_init(void)
 {
 	static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	enum {
+		GPIO1B2_SHIFT		= 4,
+		GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
+		GPIO1B2_GPIO		= 0,
+		GPIO1B2_UART21_SIN,
+
+		GPIO1B1_SHIFT		= 2,
+		GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
+		GPIO1B1_GPIO            = 0,
+		GPIO1B1_UART1_SOUT,
+		GPIO1B1_UART21_SOUT,
+	};
+	enum {
+		CON_IOMUX_UART2SEL_SHIFT= 8,
+		CON_IOMUX_UART2SEL_MASK	= 1 << CON_IOMUX_UART2SEL_SHIFT,
+		CON_IOMUX_UART2SEL_2	= 0,
+		CON_IOMUX_UART2SEL_21,
+	};
+
 	/* Enable early UART2 channel 1 on the RK322x */
 	rk_clrsetreg(&grf->gpio1b_iomux,
 		     GPIO1B1_MASK | GPIO1B2_MASK,

commit 895e4b943b18d21b2c0c5c24f04bcc626bc3ad91
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:04:11 2018 +0800

    rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evb
    
    Add rk3328-evb gmac support.
    
    Change-Id: I1f6b33c27fd12c2039e9054246bb455095bd83ac
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 4b13a8da64..d9faee410c 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -16,6 +16,13 @@
 		stdout-path = &uart2;
 	};
 
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
 	vcc3v3_sdmmc: sdmmc-pwren {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc3v3";
@@ -41,6 +48,13 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
 };
 
 &saradc {
@@ -77,6 +91,22 @@
 	status = "okay";
 };
 
+&gmac2io {
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmiim1_pins>;
+	tx_delay = <0x26>;
+	rx_delay = <0x11>;
+	status = "okay";
+};
+
 &u2phy {
         status = "okay";
 };

commit 926d2d5e11e9d60230233663b27fc1a735b5f5ed
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:03:56 2018 +0800

    rockchip: dts: rk3328: Add gmac2io support
    
    Add basic dts configuration for rk3328 gmac2io.
    
    Change-Id: I9f84d5dcd06966f11746aab4cdc241e9ceb27594
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 2a4c4929d7..5b5a837536 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -500,6 +500,25 @@
 		status = "disabled";
 	};
 
+	gmac2io: ethernet@ff540000 {
+		compatible = "rockchip,rk3328-gmac";
+		reg = <0x0 0xff540000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>,
+			 <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>,
+			 <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>,
+			 <&cru PCLK_MAC2IO>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac";
+		resets = <&cru SRST_GMAC2IO_A>;
+		reset-names = "stmmaceth";
+		status = "disabled";
+	};
+
 	usb_host0_ehci: usb@ff5c0000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xff5c0000 0x0 0x10000>;

commit 0d980b734ec89005b8524374ca290ef711499149
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:03:23 2018 +0800

    rockchip: configs: Enable GMAC configs for evb-rk3328
    
    Enable GMAC configs for evb-rk3328
    
    Change-Id: I85d61ae4fedc3b6e9533b4913fa9666670f79356
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index bbd04b5209..0e3830485d 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -40,6 +40,7 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y
@@ -55,6 +56,10 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y

commit c36b26c0b3a7833628d37c8ff125c15aadbcf197
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:03:04 2018 +0800

    net: gmac_rockchip: Add rk3328 gmac support
    
    The GMAC2IO in the RK3328 once again is identical to the incarnation in
    the RK3288 and the RK3399, except for where some of the configuration
    and control registers are located in the GRF.
    
    This adds the RK3328-specific logic necessary to reuse this driver.
    
    Change-Id: If00fc0dc957cf3e29faa1d1d0611a6e6edd29ced
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index f5f288ec82..8e83bb7402 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -16,6 +16,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rk3288.h>
+#include <asm/arch/grf_rk3328.h>
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/grf_rv1108.h>
@@ -105,6 +106,39 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rk3328_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+{
+	struct rk3328_grf_regs *grf;
+	int clk;
+	enum {
+		RK3328_GMAC_CLK_SEL_SHIFT = 11,
+		RK3328_GMAC_CLK_SEL_MASK  = GENMASK(12, 11),
+		RK3328_GMAC_CLK_SEL_125M  = 0 << 11,
+		RK3328_GMAC_CLK_SEL_25M   = 3 << 11,
+		RK3328_GMAC_CLK_SEL_2_5M  = 2 << 11,
+	};
+
+	switch (priv->phydev->speed) {
+	case 10:
+		clk = RK3328_GMAC_CLK_SEL_2_5M;
+		break;
+	case 100:
+		clk = RK3328_GMAC_CLK_SEL_25M;
+		break;
+	case 1000:
+		clk = RK3328_GMAC_CLK_SEL_125M;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1], RK3328_GMAC_CLK_SEL_MASK, clk);
+
+	return 0;
+}
+
 static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 {
 	struct rk3368_grf *grf;
@@ -218,6 +252,50 @@ static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rk3328_grf_regs *grf;
+	enum {
+		RK3328_RMII_MODE_SHIFT = 9,
+		RK3328_RMII_MODE_MASK  = BIT(9),
+
+		RK3328_GMAC_PHY_INTF_SEL_SHIFT = 4,
+		RK3328_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RK3328_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
+
+		RK3328_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
+		RK3328_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3328_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
+
+		RK3328_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
+		RK3328_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+		RK3328_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
+	};
+	enum {
+		RK3328_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,
+		RK3328_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(13, 7),
+
+		RK3328_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
+		RK3328_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->mac_con[1],
+		     RK3328_RMII_MODE_MASK |
+		     RK3328_GMAC_PHY_INTF_SEL_MASK |
+		     RK3328_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK3328_TXCLK_DLY_ENA_GMAC_MASK,
+		     RK3328_GMAC_PHY_INTF_SEL_RGMII |
+		     RK3328_RXCLK_DLY_ENA_GMAC_MASK |
+		     RK3328_TXCLK_DLY_ENA_GMAC_ENABLE);
+
+	rk_clrsetreg(&grf->mac_con[0],
+		     RK3328_CLK_RX_DL_CFG_GMAC_MASK |
+		     RK3328_CLK_TX_DL_CFG_GMAC_MASK,
+		     pdata->rx_delay << RK3328_CLK_RX_DL_CFG_GMAC_SHIFT |
+		     pdata->tx_delay << RK3328_CLK_TX_DL_CFG_GMAC_SHIFT);
+}
+
 static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3368_grf *grf;
@@ -386,6 +464,11 @@ const struct rk_gmac_ops rk3288_gmac_ops = {
 	.set_to_rgmii = rk3288_gmac_set_to_rgmii,
 };
 
+const struct rk_gmac_ops rk3328_gmac_ops = {
+	.fix_mac_speed = rk3328_gmac_fix_mac_speed,
+	.set_to_rgmii = rk3328_gmac_set_to_rgmii,
+};
+
 const struct rk_gmac_ops rk3368_gmac_ops = {
 	.fix_mac_speed = rk3368_gmac_fix_mac_speed,
 	.set_to_rgmii = rk3368_gmac_set_to_rgmii,
@@ -404,6 +487,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
 static const struct udevice_id rockchip_gmac_ids[] = {
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
+	{ .compatible = "rockchip,rk3328-gmac",
+	  .data = (ulong)&rk3328_gmac_ops },
 	{ .compatible = "rockchip,rk3368-gmac",
 	  .data = (ulong)&rk3368_gmac_ops },
 	{ .compatible = "rockchip,rk3399-gmac",

commit 07a48b3e0c0544018909234ed0a06956669f20de
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:02:36 2018 +0800

    clk: rockchip: Add rk3328 gamc clock support
    
    The rk3328 soc has two gmac controllers, one is gmac2io,
    the other is gmac2phy. We use the gmac2io rgmii interface
    for 1000M phy here.
    
    Change-Id: I4963f03f6aea2c7196f33dae0bca38a432c80690
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index db79ffe3bd..dcf0d4028d 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -13,6 +13,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3328.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3328.h>
 #include <asm/io.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3328-cru.h>
@@ -94,6 +95,14 @@ enum {
 	PCLK_DBG_DIV_SHIFT		= 0,
 	PCLK_DBG_DIV_MASK		= 0xF << PCLK_DBG_DIV_SHIFT,
 
+	/* CLKSEL_CON27 */
+	GMAC2IO_PLL_SEL_SHIFT		= 7,
+	GMAC2IO_PLL_SEL_MASK		= 1 << GMAC2IO_PLL_SEL_SHIFT,
+	GMAC2IO_PLL_SEL_CPLL		= 0,
+	GMAC2IO_PLL_SEL_GPLL		= 1,
+	GMAC2IO_CLK_DIV_MASK		= 0x1f,
+	GMAC2IO_CLK_DIV_SHIFT		= 0,
+
 	/* CLKSEL_CON28 */
 	ACLK_PERIHP_PLL_SEL_CPLL	= 0,
 	ACLK_PERIHP_PLL_SEL_GPLL,
@@ -393,6 +402,44 @@ static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)
 	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
+static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)
+{
+	struct rk3328_grf_regs *grf;
+	ulong ret;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * The RGMII CLK can be derived either from an external "clkin"
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&grf->mac_con[1]) & BIT(10) &&
+	    readl(&grf->soc_con[4]) & BIT(14)) {
+		/* An external clock will always generate the right rate... */
+		ret = rate;
+	} else {
+		u32 con = readl(&cru->clksel_con[27]);
+		ulong pll_rate;
+		u8 div;
+
+		if ((con >> GMAC2IO_PLL_SEL_SHIFT) & GMAC2IO_PLL_SEL_GPLL)
+			pll_rate = GPLL_HZ;
+		else
+			pll_rate = CPLL_HZ;
+
+		div = DIV_ROUND_UP(pll_rate, rate) - 1;
+		if (div <= 0x1f)
+			rk_clrsetreg(&cru->clksel_con[27], GMAC2IO_CLK_DIV_MASK,
+				     div << GMAC2IO_CLK_DIV_SHIFT);
+		else
+			debug("Unsupported div for gmac:%d\n", div);
+
+		return DIV_TO_RATE(pll_rate, div);
+	}
+
+	return ret;
+}
+
 static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)
 {
 	u32 div, con, con_id;
@@ -558,12 +605,48 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_I2C3:
 		ret = rk3328_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
+	case SCLK_MAC2IO:
+		ret = rk3328_gmac2io_set_clk(priv->cru, rate);
+		break;
 	case SCLK_PWM:
 		ret = rk3328_pwm_set_clk(priv->cru, rate);
 		break;
 	case SCLK_SARADC:
 		ret = rk3328_saradc_set_clk(priv->cru, rate);
 		break;
+	case DCLK_LCDC:
+	case SCLK_PDM:
+	case SCLK_RTC32K:
+	case SCLK_UART0:
+	case SCLK_UART1:
+	case SCLK_UART2:
+	case SCLK_SDIO:
+	case SCLK_TSP:
+	case SCLK_WIFI:
+	case ACLK_BUS_PRE:
+	case HCLK_BUS_PRE:
+	case PCLK_BUS_PRE:
+	case ACLK_PERI_PRE:
+	case HCLK_PERI:
+	case PCLK_PERI:
+	case ACLK_VIO_PRE:
+	case HCLK_VIO_PRE:
+	case ACLK_RGA_PRE:
+	case SCLK_RGA:
+	case ACLK_VOP_PRE:
+	case ACLK_RKVDEC_PRE:
+	case ACLK_RKVENC:
+	case ACLK_VPU_PRE:
+	case SCLK_VDEC_CABAC:
+	case SCLK_VDEC_CORE:
+	case SCLK_VENC_CORE:
+	case SCLK_VENC_DSP:
+	case SCLK_EFUSE:
+	case PCLK_DDR:
+	case ACLK_GMAC:
+	case PCLK_GMAC:
+	case SCLK_USB3OTG_SUSPEND:
+		return 0;
 	default:
 		return -ENOENT;
 	}
@@ -571,9 +654,104 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3328_gmac2io_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3328_grf_regs *grf;
+	const char *clock_output_name;
+	int ret;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC2IO_SRC ("clk_mac2io_src"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO_SRC)) {
+		debug("%s: switching RGMII to SCLK_MAC2IO_SRC\n", __func__);
+		rk_clrreg(&grf->mac_con[1], BIT(10));
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "gmac_clkin".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "gmac_clkin", switch to the external clock input */
+	if (!strcmp(clock_output_name, "gmac_clkin")) {
+		debug("%s: switching RGMII to CLKIN\n", __func__);
+		rk_setreg(&grf->mac_con[1], BIT(10));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3328_grf_regs *grf;
+	const char *clock_output_name;
+	int ret;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * If the requested parent is in the same clock-controller and the id
+	 * is SCLK_MAC2IO ("clk_mac2io"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO)) {
+		debug("%s: switching RGMII to SCLK_MAC2IO\n", __func__);
+		rk_clrreg(&grf->soc_con[4], BIT(14));
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "gmac_clkin".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "gmac_clkin", switch to the external clock input */
+	if (!strcmp(clock_output_name, "gmac_clkin")) {
+		debug("%s: switching RGMII to CLKIN\n", __func__);
+		rk_setreg(&grf->soc_con[4], BIT(14));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_MAC2IO:
+		return rk3328_gmac2io_set_parent(clk, parent);
+	case SCLK_MAC2IO_EXT:
+		return rk3328_gmac2io_ext_set_parent(clk, parent);
+	case DCLK_LCDC:
+	case SCLK_PDM:
+	case SCLK_RTC32K:
+	case SCLK_UART0:
+	case SCLK_UART1:
+	case SCLK_UART2:
+		return 0;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3328_clk_ops = {
 	.get_rate = rk3328_clk_get_rate,
 	.set_rate = rk3328_clk_set_rate,
+	.set_parent = rk3328_clk_set_parent,
 };
 
 static int rk3328_clk_probe(struct udevice *dev)
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h
index 6d8bf1330b..cdc0b338aa 100644
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ b/include/dt-bindings/clock/rk3328-cru.h
@@ -86,6 +86,9 @@
 #define SCLK_USB3OTG_SUSPEND	97
 #define SCLK_REF_USB3OTG_SRC	98
 #define SCLK_MAC2IO_SRC		99
+#define SCLK_MAC2IO		100
+#define SCLK_MAC2PHY		101
+#define SCLK_MAC2IO_EXT		102
 
 /* dclk gates */
 #define DCLK_LCDC		180
@@ -199,9 +202,6 @@
 
 #define CLK_NR_CLKS		(HCLK_HDCP + 1)
 
-#define SCLK_MAC2IO		0
-#define SCLK_MAC2PHY		1
-
 #define CLKGRF_NR_CLKS		(SCLK_MAC2PHY + 1)
 
 /* soft-reset indices */

commit 5431549b1ad41db031b1a20a9a5419a920164422
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:01:45 2018 +0800

    rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driver
    
    Clean the iomux definitions at grf_rk3328.h, and move them into
    pinctrl-driver for resolving the compiling error of redefinition.
    
    Change-Id: I6297fa72bff03a0d0620982b2f8745cd1dbe2e8e
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3328.h b/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
index f0a0781d8d..0c37f2ad18 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3328.h
@@ -131,118 +131,5 @@ struct rk3328_sgrf_regs {
 };
 check_member(rk3328_sgrf_regs, hdcp_key_access_mask, 0x2a0);
 
-enum {
-	/* GPIO0A_IOMUX */
-	GPIO0A5_SEL_SHIFT	= 10,
-	GPIO0A5_SEL_MASK	= 3 << GPIO0A5_SEL_SHIFT,
-	GPIO0A5_I2C3_SCL	= 2,
-
-	GPIO0A6_SEL_SHIFT	= 12,
-	GPIO0A6_SEL_MASK	= 3 << GPIO0A6_SEL_SHIFT,
-	GPIO0A6_I2C3_SDA	= 2,
-
-	GPIO0A7_SEL_SHIFT	= 14,
-	GPIO0A7_SEL_MASK	= 3 << GPIO0A7_SEL_SHIFT,
-	GPIO0A7_EMMC_DATA0	= 2,
-
-	/* GPIO0D_IOMUX*/
-	GPIO0D6_SEL_SHIFT	= 12,
-	GPIO0D6_SEL_MASK	= 3 << GPIO0D6_SEL_SHIFT,
-	GPIO0D6_GPIO		= 0,
-	GPIO0D6_SDMMC0_PWRENM1	= 3,
-
-	/* GPIO1A_IOMUX */
-	GPIO1A0_SEL_SHIFT	= 0,
-	GPIO1A0_SEL_MASK	= 0x3fff << GPIO1A0_SEL_SHIFT,
-	GPIO1A0_CARD_DATA_CLK_CMD_DETN	= 0x1555,
-
-	/* GPIO2A_IOMUX */
-	GPIO2A0_SEL_SHIFT	= 0,
-	GPIO2A0_SEL_MASK	= 3 << GPIO2A0_SEL_SHIFT,
-	GPIO2A0_UART2_TX_M1	= 1,
-
-	GPIO2A1_SEL_SHIFT	= 2,
-	GPIO2A1_SEL_MASK	= 3 << GPIO2A1_SEL_SHIFT,
-	GPIO2A1_UART2_RX_M1	= 1,
-
-	GPIO2A2_SEL_SHIFT	= 4,
-	GPIO2A2_SEL_MASK	= 3 << GPIO2A2_SEL_SHIFT,
-	GPIO2A2_PWM_IR		= 1,
-
-	GPIO2A4_SEL_SHIFT	= 8,
-	GPIO2A4_SEL_MASK	= 3 << GPIO2A4_SEL_SHIFT,
-	GPIO2A4_PWM_0		= 1,
-	GPIO2A4_I2C1_SDA,
-
-	GPIO2A5_SEL_SHIFT	= 10,
-	GPIO2A5_SEL_MASK	= 3 << GPIO2A5_SEL_SHIFT,
-	GPIO2A5_PWM_1		= 1,
-	GPIO2A5_I2C1_SCL,
-
-	GPIO2A6_SEL_SHIFT	= 12,
-	GPIO2A6_SEL_MASK	= 3 << GPIO2A6_SEL_SHIFT,
-	GPIO2A6_PWM_2		= 1,
-
-	GPIO2A7_SEL_SHIFT	= 14,
-	GPIO2A7_SEL_MASK	= 3 << GPIO2A7_SEL_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_SDMMC0_PWRENM0,
-
-	/* GPIO2BL_IOMUX */
-	GPIO2BL0_SEL_SHIFT	= 0,
-	GPIO2BL0_SEL_MASK	= 0x3f << GPIO2BL0_SEL_SHIFT,
-	GPIO2BL0_SPI_CLK_TX_RX_M0	= 0x15,
-
-	GPIO2BL3_SEL_SHIFT	= 6,
-	GPIO2BL3_SEL_MASK	= 3 << GPIO2BL3_SEL_SHIFT,
-	GPIO2BL3_SPI_CSN0_M0	= 1,
-
-	GPIO2BL4_SEL_SHIFT	= 8,
-	GPIO2BL4_SEL_MASK	= 3 << GPIO2BL4_SEL_SHIFT,
-	GPIO2BL4_SPI_CSN1_M0	= 1,
-
-	GPIO2BL5_SEL_SHIFT	= 10,
-	GPIO2BL5_SEL_MASK	= 3 << GPIO2BL5_SEL_SHIFT,
-	GPIO2BL5_I2C2_SDA	= 1,
-
-	GPIO2BL6_SEL_SHIFT	= 12,
-	GPIO2BL6_SEL_MASK	= 3 << GPIO2BL6_SEL_SHIFT,
-	GPIO2BL6_I2C2_SCL	= 1,
-
-	/* GPIO2D_IOMUX */
-	GPIO2D0_SEL_SHIFT	= 0,
-	GPIO2D0_SEL_MASK	= 3 << GPIO2D0_SEL_SHIFT,
-	GPIO2D0_I2C0_SCL	= 1,
-
-	GPIO2D1_SEL_SHIFT	= 2,
-	GPIO2D1_SEL_MASK	= 3 << GPIO2D1_SEL_SHIFT,
-	GPIO2D1_I2C0_SDA	= 1,
-
-	GPIO2D4_SEL_SHIFT	= 8,
-	GPIO2D4_SEL_MASK	= 0xff << GPIO2D4_SEL_SHIFT,
-	GPIO2D4_EMMC_DATA1234	= 0xaa,
-
-	/* GPIO3C_IOMUX */
-	GPIO3C0_SEL_SHIFT	= 0,
-	GPIO3C0_SEL_MASK	= 0x3fff << GPIO3C0_SEL_SHIFT,
-	GPIO3C0_EMMC_DATA567_PWR_CLK_RSTN_CMD	= 0x2aaa,
-
-	/* COM_IOMUX */
-	IOMUX_SEL_UART2_SHIFT	= 0,
-	IOMUX_SEL_UART2_MASK	= 3 << IOMUX_SEL_UART2_SHIFT,
-	IOMUX_SEL_UART2_M0	= 0,
-	IOMUX_SEL_UART2_M1,
-
-	IOMUX_SEL_SPI_SHIFT	= 4,
-	IOMUX_SEL_SPI_MASK	= 3 << IOMUX_SEL_SPI_SHIFT,
-	IOMUX_SEL_SPI_M0	= 0,
-	IOMUX_SEL_SPI_M1,
-	IOMUX_SEL_SPI_M2,
-
-	IOMUX_SEL_SDMMC_SHIFT	= 7,
-	IOMUX_SEL_SDMMC_MASK	= 1 << IOMUX_SEL_SDMMC_SHIFT,
-	IOMUX_SEL_SDMMC_M0	= 0,
-	IOMUX_SEL_SDMMC_M1,
-};
 
 #endif	/* __SOC_ROCKCHIP_RK3328_GRF_H__ */
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index a8de952377..4856e464e7 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -72,6 +72,21 @@ void board_debug_uart_init(void)
 #ifdef CONFIG_TPL_BUILD
 	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
 	struct rk_uart * const uart = (void *)UART2_BASE;
+	enum{
+		GPIO2A0_SEL_SHIFT       = 0,
+		GPIO2A0_SEL_MASK        = 3 << GPIO2A0_SEL_SHIFT,
+		GPIO2A0_UART2_TX_M1     = 1,
+
+		GPIO2A1_SEL_SHIFT       = 2,
+		GPIO2A1_SEL_MASK        = 3 << GPIO2A1_SEL_SHIFT,
+		GPIO2A1_UART2_RX_M1     = 1,
+	};
+	enum {
+		IOMUX_SEL_UART2_SHIFT   = 0,
+		IOMUX_SEL_UART2_MASK    = 3 << IOMUX_SEL_UART2_SHIFT,
+		IOMUX_SEL_UART2_M0      = 0,
+		IOMUX_SEL_UART2_M1,
+	};
 
 	/* uart_sel_clk default select 24MHz */
 	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);

commit 0a33ce653deee71d7ccbc64e2e3168db33a3c7c0
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 14:01:12 2018 +0800

    net: gmac_rockchip: Add support for the RV1108 GMAC
    
    The rv1108 GMAC only support rmii interface, so need to add the
    set_rmii() ops. Use the phy current interface to set rmii or
    rgmii ops. At the same time, need to set the mac clock rate of
    rmii with 50M, the clock rate of rgmii with 125M.
    
    Change-Id: Ie669aefd1af254f4f7c71ac82decc01bd61e9e5b
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 49cba41f52..f5f288ec82 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -18,6 +18,7 @@
 #include <asm/arch/grf_rk3288.h>
 #include <asm/arch/grf_rk3368.h>
 #include <asm/arch/grf_rk3399.h>
+#include <asm/arch/grf_rv1108.h>
 #include <dm/pinctrl.h>
 #include <dt-bindings/clock/rk3288-cru.h>
 #include "designware.h"
@@ -31,12 +32,14 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 struct gmac_rockchip_platdata {
 	struct dw_eth_pdata dw_eth_pdata;
+	bool clock_input;
 	int tx_delay;
 	int rx_delay;
 };
 
 struct rk_gmac_ops {
 	int (*fix_mac_speed)(struct dw_eth_dev *priv);
+	void (*set_to_rmii)(struct gmac_rockchip_platdata *pdata);
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
 };
 
@@ -55,6 +58,13 @@ void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay)
 static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+	const char *string;
+
+	string = dev_read_string(dev, "clock_in_out");
+	if (!strcmp(string, "input"))
+		pdata->clock_input = true;
+	else
+		pdata->clock_input = false;
 
 	/* Check the new naming-style first... */
 	pdata->tx_delay = dev_read_u32_default(dev, "tx_delay", -ENOENT);
@@ -153,6 +163,41 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
 	return 0;
 }
 
+static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
+{
+	struct rv1108_grf *grf;
+	int clk, speed;
+	enum {
+		RV1108_GMAC_SPEED_MASK		= BIT(2),
+		RV1108_GMAC_SPEED_10M		= 0 << 2,
+		RV1108_GMAC_SPEED_100M		= 1 << 2,
+		RV1108_GMAC_CLK_SEL_MASK	= BIT(7),
+		RV1108_GMAC_CLK_SEL_2_5M	= 0 << 7,
+		RV1108_GMAC_CLK_SEL_25M		= 1 << 7,
+	};
+
+	switch (priv->phydev->speed) {
+	case 10:
+		clk = RV1108_GMAC_CLK_SEL_2_5M;
+		speed = RV1108_GMAC_SPEED_10M;
+		break;
+	case 100:
+		clk = RV1108_GMAC_CLK_SEL_25M;
+		speed = RV1108_GMAC_SPEED_100M;
+		break;
+	default:
+		debug("Unknown phy speed: %d\n", priv->phydev->speed);
+		return -EINVAL;
+	}
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->gmac_con0,
+		     RV1108_GMAC_CLK_SEL_MASK | RV1108_GMAC_SPEED_MASK,
+		     clk | speed);
+
+	return 0;
+}
+
 static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
 	struct rk3288_grf *grf;
@@ -232,25 +277,76 @@ static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 		     pdata->tx_delay << RK3399_CLK_TX_DL_CFG_GMAC_SHIFT);
 }
 
+static void rv1108_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
+{
+	struct rv1108_grf *grf;
+
+	enum {
+		RV1108_GMAC_PHY_INTF_SEL_MASK  = GENMASK(6, 4),
+		RV1108_GMAC_PHY_INTF_SEL_RMII  = 4 << 4,
+	};
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrsetreg(&grf->gmac_con0,
+		     RV1108_GMAC_PHY_INTF_SEL_MASK,
+		     RV1108_GMAC_PHY_INTF_SEL_RMII);
+}
+
 static int gmac_rockchip_probe(struct udevice *dev)
 {
 	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
 	struct rk_gmac_ops *ops =
 		(struct rk_gmac_ops *)dev_get_driver_data(dev);
+	struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
+	struct eth_pdata *eth_pdata = &dw_pdata->eth_pdata;
 	struct clk clk;
+	ulong rate;
 	int ret;
 
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret)
 		return ret;
 
-	/* Since mac_clk is fed by an external clock we can use 0 here */
-	ret = clk_set_rate(&clk, 0);
-	if (ret)
-		return ret;
+	switch (eth_pdata->phy_interface) {
+	case PHY_INTERFACE_MODE_RGMII:
+		/*
+		 * If the gmac clock is from internal pll, need to set and
+		 * check the return value for gmac clock at RGMII mode. If
+		 * the gmac clock is from external source, the clock rate
+		 * is not set, because of it is bypassed.
+		 */
+		if (!pdata->clock_input) {
+			rate = clk_set_rate(&clk, 125000000);
+			if (rate != 125000000)
+				return -EINVAL;
+		}
+
+		/* Set to RGMII mode */
+		if (ops->set_to_rgmii)
+			ops->set_to_rgmii(pdata);
+		else
+			return -EPERM;
 
-	/* Set to RGMII mode */
-	ops->set_to_rgmii(pdata);
+		break;
+	case PHY_INTERFACE_MODE_RMII:
+		/* The commet is the same as RGMII mode */
+		if (!pdata->clock_input) {
+			rate = clk_set_rate(&clk, 50000000);
+			if (rate != 50000000)
+				return -EINVAL;
+		}
+
+		/* Set to RMII mode */
+		if (ops->set_to_rmii)
+			ops->set_to_rmii(pdata);
+		else
+			return -EPERM;
+
+		break;
+	default:
+		debug("NO interface defined!\n");
+		return -ENXIO;
+	}
 
 	return designware_eth_probe(dev);
 }
@@ -300,6 +396,11 @@ const struct rk_gmac_ops rk3399_gmac_ops = {
 	.set_to_rgmii = rk3399_gmac_set_to_rgmii,
 };
 
+const struct rk_gmac_ops rv1108_gmac_ops = {
+	.fix_mac_speed = rv1108_set_rmii_speed,
+	.set_to_rmii = rv1108_gmac_set_to_rmii,
+};
+
 static const struct udevice_id rockchip_gmac_ids[] = {
 	{ .compatible = "rockchip,rk3288-gmac",
 	  .data = (ulong)&rk3288_gmac_ops },
@@ -307,6 +408,8 @@ static const struct udevice_id rockchip_gmac_ids[] = {
 	  .data = (ulong)&rk3368_gmac_ops },
 	{ .compatible = "rockchip,rk3399-gmac",
 	  .data = (ulong)&rk3399_gmac_ops },
+	{ .compatible = "rockchip,rv1108-gmac",
+	  .data = (ulong)&rv1108_gmac_ops },
 	{ }
 };
 

commit a1e3d296959e9db987307718f4d4704938e170b9
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:57 2018 +0800

    rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driver
    
    If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the
    conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h,
    and move them into pinctrl-driver.
    
    Change-Id: Ie47ccd77963de909acf3494ad7e3ce20b3c560a6
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
index a1c11a7604..999d679ced 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
@@ -150,405 +150,6 @@ struct rv1108_pmu_grf {
 };
 check_member(rv1108_pmu_grf, ceva_jtag_mask, 0x388);
 
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT		= 14,
-	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
-	GPIO1B7_GPIO		= 0,
-	GPIO1B7_LCDC_D12,
-	GPIO1B7_I2S_SDIO2_M0,
-	GPIO1B7_GMAC_RXDV,
-
-	GPIO1B6_SHIFT		= 12,
-	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
-	GPIO1B6_GPIO		= 0,
-	GPIO1B6_LCDC_D13,
-	GPIO1B6_I2S_LRCLKTX_M0,
-	GPIO1B6_GMAC_RXD1,
-
-	GPIO1B5_SHIFT		= 10,
-	GPIO1B5_MASK		= 3 << GPIO1B5_SHIFT,
-	GPIO1B5_GPIO		= 0,
-	GPIO1B5_LCDC_D14,
-	GPIO1B5_I2S_SDIO1_M0,
-	GPIO1B5_GMAC_RXD0,
-
-	GPIO1B4_SHIFT		= 8,
-	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
-	GPIO1B4_GPIO		= 0,
-	GPIO1B4_LCDC_D15,
-	GPIO1B4_I2S_MCLK_M0,
-	GPIO1B4_GMAC_TXEN,
-
-	GPIO1B3_SHIFT		= 6,
-	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
-	GPIO1B3_GPIO		= 0,
-	GPIO1B3_LCDC_D16,
-	GPIO1B3_I2S_SCLK_M0,
-	GPIO1B3_GMAC_TXD1,
-
-	GPIO1B2_SHIFT		= 4,
-	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
-	GPIO1B2_GPIO		= 0,
-	GPIO1B2_LCDC_D17,
-	GPIO1B2_I2S_SDIO_M0,
-	GPIO1B2_GMAC_TXD0,
-
-	GPIO1B1_SHIFT		= 2,
-	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
-	GPIO1B1_GPIO		= 0,
-	GPIO1B1_LCDC_D9,
-	GPIO1B1_PWM7,
-
-	GPIO1B0_SHIFT		= 0,
-	GPIO1B0_MASK		= 3,
-	GPIO1B0_GPIO		= 0,
-	GPIO1B0_LCDC_D8,
-	GPIO1B0_PWM6,
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT		= 14,
-	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
-	GPIO1C7_GPIO		= 0,
-	GPIO1C7_CIF_D5,
-	GPIO1C7_I2S_SDIO2_M1,
-
-	GPIO1C6_SHIFT		= 12,
-	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
-	GPIO1C6_GPIO		= 0,
-	GPIO1C6_CIF_D4,
-	GPIO1C6_I2S_LRCLKTX_M1,
-
-	GPIO1C5_SHIFT		= 10,
-	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
-	GPIO1C5_GPIO		= 0,
-	GPIO1C5_LCDC_CLK,
-	GPIO1C5_GMAC_CLK,
-
-	GPIO1C4_SHIFT		= 8,
-	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
-	GPIO1C4_GPIO		= 0,
-	GPIO1C4_LCDC_HSYNC,
-	GPIO1C4_GMAC_MDC,
-
-	GPIO1C3_SHIFT		= 6,
-	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
-	GPIO1C3_GPIO		= 0,
-	GPIO1C3_LCDC_VSYNC,
-	GPIO1C3_GMAC_MDIO,
-
-	GPIO1C2_SHIFT		= 4,
-	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT,
-	GPIO1C2_GPIO		= 0,
-	GPIO1C2_LCDC_EN,
-	GPIO1C2_I2S_SDIO3_M0,
-	GPIO1C2_GMAC_RXER,
-
-	GPIO1C1_SHIFT		= 2,
-	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
-	GPIO1C1_GPIO		= 0,
-	GPIO1C1_LCDC_D10,
-	GPIO1C1_I2S_SDI_M0,
-	GPIO1C1_PWM4,
-
-	GPIO1C0_SHIFT		= 0,
-	GPIO1C0_MASK		= 3,
-	GPIO1C0_GPIO		= 0,
-	GPIO1C0_LCDC_D11,
-	GPIO1C0_I2S_LRCLKRX_M0,
-};
-
-/* GRF_GPIO1D_OIMUX */
-enum {
-	GPIO1D7_SHIFT		= 14,
-	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
-	GPIO1D7_GPIO		= 0,
-	GPIO1D7_HDMI_CEC,
-	GPIO1D7_DSP_RTCK,
-
-	GPIO1D6_SHIFT		= 12,
-	GPIO1D6_MASK		= 1 << GPIO1D6_SHIFT,
-	GPIO1D6_GPIO		= 0,
-	GPIO1D6_HDMI_HPD_M0,
-
-	GPIO1D5_SHIFT		= 10,
-	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
-	GPIO1D5_GPIO		= 0,
-	GPIO1D5_UART2_RTSN,
-	GPIO1D5_HDMI_SDA_M0,
-
-	GPIO1D4_SHIFT		= 8,
-	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
-	GPIO1D4_GPIO		= 0,
-	GPIO1D4_UART2_CTSN,
-	GPIO1D4_HDMI_SCL_M0,
-
-	GPIO1D3_SHIFT		= 6,
-	GPIO1D3_MASK		= 3 << GPIO1D3_SHIFT,
-	GPIO1D3_GPIO		= 0,
-	GPIO1D3_UART0_SOUT,
-	GPIO1D3_SPI_TXD_M0,
-
-	GPIO1D2_SHIFT		= 4,
-	GPIO1D2_MASK		= 3 << GPIO1D2_SHIFT,
-	GPIO1D2_GPIO		= 0,
-	GPIO1D2_UART0_SIN,
-	GPIO1D2_SPI_RXD_M0,
-	GPIO1D2_DSP_TDI,
-
-	GPIO1D1_SHIFT		= 2,
-	GPIO1D1_MASK		= 3 << GPIO1D1_SHIFT,
-	GPIO1D1_GPIO		= 0,
-	GPIO1D1_UART0_RTSN,
-	GPIO1D1_SPI_CSN0_M0,
-	GPIO1D1_DSP_TMS,
-
-	GPIO1D0_SHIFT		= 0,
-	GPIO1D0_MASK		= 3,
-	GPIO1D0_GPIO		= 0,
-	GPIO1D0_UART0_CTSN,
-	GPIO1D0_SPI_CLK_M0,
-	GPIO1D0_DSP_TCK,
-};
-
-/* GRF_GPIO2A_IOMUX */
-enum {
-	GPIO2A7_SHIFT		= 14,
-	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
-	GPIO2A7_GPIO		= 0,
-	GPIO2A7_FLASH_D7,
-	GPIO2A7_EMMC_D7,
-
-	GPIO2A6_SHIFT		= 12,
-	GPIO2A6_MASK		= 3 << GPIO2A6_SHIFT,
-	GPIO2A6_GPIO		= 0,
-	GPIO2A6_FLASH_D6,
-	GPIO2A6_EMMC_D6,
-
-	GPIO2A5_SHIFT		= 10,
-	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO		= 0,
-	GPIO2A5_FLASH_D5,
-	GPIO2A5_EMMC_D5,
-
-	GPIO2A4_SHIFT		= 8,
-	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO		= 0,
-	GPIO2A4_FLASH_D4,
-	GPIO2A4_EMMC_D4,
-
-	GPIO2A3_SHIFT		= 6,
-	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO		= 0,
-	GPIO2A3_FLASH_D3,
-	GPIO2A3_EMMC_D3,
-	GPIO2A3_SFC_HOLD_IO3,
-
-	GPIO2A2_SHIFT		= 4,
-	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO		= 0,
-	GPIO2A2_FLASH_D2,
-	GPIO2A2_EMMC_D2,
-	GPIO2A2_SFC_WP_IO2,
-
-	GPIO2A1_SHIFT		= 2,
-	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO		= 0,
-	GPIO2A1_FLASH_D1,
-	GPIO2A1_EMMC_D1,
-	GPIO2A1_SFC_SO_IO1,
-
-	GPIO2A0_SHIFT		= 0,
-	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO		= 0,
-	GPIO2A0_FLASH_D0,
-	GPIO2A0_EMMC_D0,
-	GPIO2A0_SFC_SI_IO0,
-};
-
-/* GRF_GPIO2B_IOMUX */
-enum {
-	GPIO2B7_SHIFT		= 14,
-	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
-	GPIO2B7_GPIO		= 0,
-	GPIO2B7_FLASH_CS1,
-	GPIO2B7_SFC_CLK,
-
-	GPIO2B6_SHIFT		= 12,
-	GPIO2B6_MASK		= 1 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO		= 0,
-	GPIO2B6_EMMC_CLKO,
-
-	GPIO2B5_SHIFT		= 10,
-	GPIO2B5_MASK		= 1 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO		= 0,
-	GPIO2B5_FLASH_CS0,
-
-	GPIO2B4_SHIFT		= 8,
-	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO		= 0,
-	GPIO2B4_FLASH_RDY,
-	GPIO2B4_EMMC_CMD,
-	GPIO2B4_SFC_CSN0,
-
-	GPIO2B3_SHIFT		= 6,
-	GPIO2B3_MASK		= 1 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO		= 0,
-	GPIO2B3_FLASH_RDN,
-
-	GPIO2B2_SHIFT		= 4,
-	GPIO2B2_MASK		= 1 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO		= 0,
-	GPIO2B2_FLASH_WRN,
-
-	GPIO2B1_SHIFT		= 2,
-	GPIO2B1_MASK		= 1 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO		= 0,
-	GPIO2B1_FLASH_CLE,
-
-	GPIO2B0_SHIFT		= 0,
-	GPIO2B0_MASK		= 1 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO		= 0,
-	GPIO2B0_FLASH_ALE,
-};
-
-/* GRF_GPIO2D_IOMUX */
-enum {
-	GPIO2D7_SHIFT		= 14,
-	GPIO2D7_MASK		= 1 << GPIO2D7_SHIFT,
-	GPIO2D7_GPIO		= 0,
-	GPIO2D7_SDIO_D0,
-
-	GPIO2D6_SHIFT		= 12,
-	GPIO2D6_MASK		= 1 << GPIO2D6_SHIFT,
-	GPIO2D6_GPIO		= 0,
-	GPIO2D6_SDIO_CMD,
-
-	GPIO2D5_SHIFT		= 10,
-	GPIO2D5_MASK		= 1 << GPIO2D5_SHIFT,
-	GPIO2D5_GPIO		= 0,
-	GPIO2D5_SDIO_CLKO,
-
-	GPIO2D4_SHIFT		= 8,
-	GPIO2D4_MASK		= 1 << GPIO2D4_SHIFT,
-	GPIO2D4_GPIO		= 0,
-	GPIO2D4_I2C1_SCL,
-
-	GPIO2D3_SHIFT		= 6,
-	GPIO2D3_MASK		= 1 << GPIO2D3_SHIFT,
-	GPIO2D3_GPIO		= 0,
-	GPIO2D3_I2C1_SDA,
-
-	GPIO2D2_SHIFT		= 4,
-	GPIO2D2_MASK		= 3 << GPIO2D2_SHIFT,
-	GPIO2D2_GPIO		= 0,
-	GPIO2D2_UART2_SOUT_M0,
-	GPIO2D2_JTAG_TCK,
-
-	GPIO2D1_SHIFT		= 2,
-	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
-	GPIO2D1_GPIO		= 0,
-	GPIO2D1_UART2_SIN_M0,
-	GPIO2D1_JTAG_TMS,
-	GPIO2D1_DSP_TMS,
-
-	GPIO2D0_SHIFT		= 0,
-	GPIO2D0_MASK		= 3,
-	GPIO2D0_GPIO		= 0,
-	GPIO2D0_UART0_CTSN,
-	GPIO2D0_SPI_CLK_M0,
-	GPIO2D0_DSP_TCK,
-};
-
-/* GRF_GPIO3A_IOMUX */
-enum {
-	GPIO3A7_SHIFT		= 14,
-	GPIO3A7_MASK		= 1 << GPIO3A7_SHIFT,
-	GPIO3A7_GPIO		= 0,
-
-	GPIO3A6_SHIFT		= 12,
-	GPIO3A6_MASK		= 3 << GPIO3A6_SHIFT,
-	GPIO3A6_GPIO		= 0,
-	GPIO3A6_UART1_SOUT,
-
-	GPIO3A5_SHIFT		= 10,
-	GPIO3A5_MASK		= 3 << GPIO3A5_SHIFT,
-	GPIO3A5_GPIO		= 0,
-	GPIO3A5_UART1_SIN,
-
-	GPIO3A4_SHIFT		= 8,
-	GPIO3A4_MASK		= 1 << GPIO3A4_SHIFT,
-	GPIO3A4_GPIO		= 0,
-	GPIO3A4_UART1_CTSN,
-
-	GPIO3A3_SHIFT		= 6,
-	GPIO3A3_MASK		= 1 << GPIO3A3_SHIFT,
-	GPIO3A3_GPIO		= 0,
-	GPIO3A3_UART1_RTSN,
-
-	GPIO3A2_SHIFT		= 4,
-	GPIO3A2_MASK		= 1 << GPIO3A2_SHIFT,
-	GPIO3A2_GPIO		= 0,
-	GPIO3A2_SDIO_D3,
-
-	GPIO3A1_SHIFT		= 2,
-	GPIO3A1_MASK		= 1 << GPIO3A1_SHIFT,
-	GPIO3A1_GPIO		= 0,
-	GPIO3A1_SDIO_D2,
-
-	GPIO3A0_SHIFT		= 0,
-	GPIO3A0_MASK		= 1,
-	GPIO3A0_GPIO		= 0,
-	GPIO3A0_SDIO_D1,
-};
-
-/* GRF_GPIO3C_IOMUX */
-enum {
-	GPIO3C7_SHIFT		= 14,
-	GPIO3C7_MASK		= 1 << GPIO3C7_SHIFT,
-	GPIO3C7_GPIO		= 0,
-	GPIO3C7_CIF_CLKI,
-
-	GPIO3C6_SHIFT		= 12,
-	GPIO3C6_MASK		= 1 << GPIO3C6_SHIFT,
-	GPIO3C6_GPIO		= 0,
-	GPIO3C6_CIF_VSYNC,
-
-	GPIO3C5_SHIFT		= 10,
-	GPIO3C5_MASK		= 1 << GPIO3C5_SHIFT,
-	GPIO3C5_GPIO		= 0,
-	GPIO3C5_SDMMC_CMD,
-
-	GPIO3C4_SHIFT		= 8,
-	GPIO3C4_MASK		= 1 << GPIO3C4_SHIFT,
-	GPIO3C4_GPIO		= 0,
-	GPIO3C4_SDMMC_CLKO,
-
-	GPIO3C3_SHIFT		= 6,
-	GPIO3C3_MASK		= 3 << GPIO3C3_SHIFT,
-	GPIO3C3_GPIO		= 0,
-	GPIO3C3_SDMMC_D0,
-	GPIO3C3_UART2_SOUT_M1,
-
-	GPIO3C2_SHIFT		= 4,
-	GPIO3C2_MASK		= 3 << GPIO3C2_SHIFT,
-	GPIO3C2_GPIO		= 0,
-	GPIO3C2_SDMMC_D1,
-	GPIO3C2_UART2_SIN_M1,
-
-	GPIOC1_SHIFT		= 2,
-	GPIOC1_MASK		= 1 << GPIOC1_SHIFT,
-	GPIOC1_GPIO		= 0,
-	GPIOC1_SDMMC_D2,
-
-	GPIOC0_SHIFT		= 0,
-	GPIOC0_MASK		= 1,
-	GPIO3C0_GPIO		= 0,
-	GPIO3C0_SDMMC_D3,
-};
-
 enum {
 	/* GRF_SOC_CON0 */
 	MSCH_MAINDDR3_SHIFT		= 4,
diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 44cf33359e..86bfdea237 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -21,11 +21,35 @@ void board_debug_uart_init(void)
 	struct rv1108_grf *grf = (void *)GRF_BASE;
 
 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0x10230000)
+	enum {
+		GPIO3A6_SHIFT           = 12,
+		GPIO3A6_MASK            = 3 << GPIO3A6_SHIFT,
+		GPIO3A6_GPIO            = 0,
+		GPIO3A6_UART1_SOUT,
+
+		GPIO3A5_SHIFT           = 10,
+		GPIO3A5_MASK            = 3 << GPIO3A5_SHIFT,
+		GPIO3A5_GPIO            = 0,
+		GPIO3A5_UART1_SIN,
+	};
+
 	rk_clrsetreg(&grf->gpio3a_iomux,	/* UART0 */
 		     GPIO3A6_MASK | GPIO3A5_MASK,
 		     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
 		     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
 #else
+	enum {
+		GPIO2D2_SHIFT		= 4,
+		GPIO2D2_MASK		= 3 << GPIO2D2_SHIFT,
+		GPIO2D2_GPIO            = 0,
+		GPIO2D2_UART2_SOUT_M0,
+
+		GPIO2D1_SHIFT		= 2,
+		GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
+		GPIO2D1_GPIO            = 0,
+		GPIO2D1_UART2_SIN_M0,
+	};
+
 	rk_clrsetreg(&grf->gpio2d_iomux,	/* UART2 */
 		     GPIO2D2_MASK | GPIO2D1_MASK,
 		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |

commit 329c0b944368d3346565b3deced506be6ed7367e
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:56 2018 +0800

    rockchip: grf_rv1108.h: Fix the grf offsets
    
    The last 4 grf registers offset of rv1108 are wrong, fix them
    for correct usage.
    
    Change-Id: I4bbc7e8fcd04321d5ebcfb2c1a288ea49c0eddfc
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
index a518b05727..a1c11a7604 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
@@ -101,13 +101,17 @@ struct rv1108_grf {
 	u32 reserved14[2];
 	u32 dma_con0;
 	u32 dma_con1;
-	u32 reserved15[539];
+	u32 reserved15[59];
 	u32 uoc_status;
+	u32 reserved16[2];
 	u32 host_status;
+	u32 reserved17[59];
 	u32 gmac_con0;
+	u32 reserved18[191];
 	u32 chip_id;
 };
-check_member(rv1108_grf, chip_id, 0xf90);
+
+check_member(rv1108_grf, chip_id, 0x0c00);
 
 struct rv1108_pmu_grf {
 	u32 gpioa_iomux;

commit bfcd5474588c9d8b7a9eed5d7826815568b377d9
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:55 2018 +0800

    rockchip: configs: Enable CONFIG_NET_RANDOM_ETHADDR for rk3288-evb
    
    If the Ethernet address is not set, the network can't work,
    enable the random address config for default use.
    
    Change-Id: If639e0bc19f3b9dc749cbedc436a2d661f42d724
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index c68e5a26b5..406d2284c7 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -33,6 +33,7 @@ CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y

commit 9991a2b18dcb4a9fed36e450fb73c7d3d74eceb3
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 13 13:53:54 2018 +0800

    rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission quality
    
    Give the mac controller the correct tx-delay and rx-delay value
    for the rgmii mode transmission. If they are not matched, there
    would be Ethernet packets lost, the net feature may not work.
    
    Change-Id: I4ff6bd47fe75ff6b480de45df2e0e4e611e3950d
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index a0ea589015..0a81691bcb 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -277,7 +277,7 @@
 	assigned-clock-parents = <&clkin_gmac>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
-	tx_delay = <0x10>;
-	rx_delay = <0x10>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
 	status = "okay";
 };

commit a6de9238bf53efaa437da288f1cbf4f5321d9dca
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 14:00:27 2018 +0100

    rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-node
    
    The RK3399 CRU-node assigns rates to a number of clocks that are not
    implemented in the RK3399 clock-driver (but which have been
    sufficiently initialised from rkclk_init()): for these clocks, we
    simply ignore the set_rate() operation and return 0 to signal success.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit d2f1f1abafbedd3580334f2564bfea918e49522d)
    
    Change-Id: Ic19614e75b76d8159cf03ac4adb180ca5a8688fd
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 3b7203e654..1ca6b91fc2 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -883,6 +883,24 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case 0 ... 63:
 		return 0;
+
+	case ACLK_PERIHP:
+	case HCLK_PERIHP:
+	case PCLK_PERIHP:
+		return 0;
+
+	case ACLK_PERILP0:
+	case HCLK_PERILP0:
+	case PCLK_PERILP0:
+		return 0;
+
+	case ACLK_CCI:
+		return 0;
+
+	case HCLK_PERILP1:
+	case PCLK_PERILP1:
+		return 0;
+
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
 	case SCLK_EMMC:

commit 0b2881acbd7a4f32aaa8600efd9712e95698fe28
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 13:59:18 2018 +0100

    clk: implement clk_set_defaults()
    
    Linux uses the properties 'assigned-clocks', 'assigned-clock-parents'
    and 'assigned-clock-rates' to configure the clock subsystem for use
    with various peripheral nodes.
    
    This implements clk_set_defaults() and hooks it up with the general
    device probibin in drivers/core/device.c: when a new device is probed,
    clk_set_defaults() will be called for it and will process the
    properties mentioned above.
    
    Note that this functionality is designed to fail gracefully (i.e. if a
    clock-driver does not implement set_parent(), we simply accept this
    and ignore the error) as not to break existing board-support.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    Series-version: 2
    
    Cover-letter:
    clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates
    
    For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC),
    the parent-clock needs to be set via the DTS.  This adds the required
    plumbing and implements the GMAC case for the RK3399.
    END
    
    (cherry picked from commit f4fcba5c5baaaa9d477d753f97124efdb8e45893)
    
    Change-Id: I549891987c5a3e8546b96f1f54ad575950f92b12
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 91dc01d619..2db84c1297 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -2,6 +2,7 @@
  * Copyright (C) 2015 Google, Inc
  * Written by Simon Glass <sjg@chromium.org>
  * Copyright (c) 2016, NVIDIA CORPORATION.
+ * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -10,6 +11,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <dm/read.h>
 #include <dt-structs.h>
 #include <errno.h>
 
@@ -101,6 +103,122 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 {
 	return clk_get_by_indexed_prop(dev, "clocks", index, clk);
 }
+
+static int clk_set_default_parents(struct udevice *dev)
+{
+	struct clk clk, parent_clk;
+	int index;
+	int num_parents;
+	int ret;
+
+	num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
+						  "#clock-cells");
+	if (num_parents < 0) {
+		debug("%s: could not read assigned-clock-parents for %p\n",
+		      __func__, dev);
+		return 0;
+	}
+
+	for (index = 0; index < num_parents; index++) {
+		ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
+					      index, &parent_clk);
+		if (ret) {
+			debug("%s: could not get parent clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			return ret;
+		}
+
+		ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
+					      index, &clk);
+		if (ret) {
+			debug("%s: could not get assigned clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			return ret;
+		}
+
+		ret = clk_set_parent(&clk, &parent_clk);
+
+		/*
+		 * Not all drivers may support clock-reparenting (as of now).
+		 * Ignore errors due to this.
+		 */
+		if (ret == -ENOSYS)
+			continue;
+
+		if (ret) {
+			debug("%s: failed to reparent clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int clk_set_default_rates(struct udevice *dev)
+{
+	struct clk clk;
+	int index;
+	int num_rates;
+	int size;
+	int ret = 0;
+	u32 *rates = NULL;
+
+	size = dev_read_size(dev, "assigned-clock-rates");
+	if (size < 0)
+		return 0;
+
+	num_rates = size / sizeof(u32);
+	rates = calloc(num_rates, sizeof(u32));
+	if (!rates)
+		return -ENOMEM;
+
+	ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
+	if (ret)
+		goto fail;
+
+	for (index = 0; index < num_rates; index++) {
+		ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
+					      index, &clk);
+		if (ret) {
+			debug("%s: could not get assigned clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			continue;
+		}
+
+		ret = clk_set_rate(&clk, rates[index]);
+		if (ret < 0) {
+			debug("%s: failed to set rate on clock %d for %s\n",
+			      __func__, index, dev_read_name(dev));
+			break;
+		}
+	}
+
+fail:
+	free(rates);
+	return ret;
+}
+
+int clk_set_defaults(struct udevice *dev)
+{
+	int ret;
+
+	/* If this is running pre-reloc state, don't take any action. */
+	if (!(gd->flags & GD_FLG_RELOC))
+		return 0;
+
+	debug("%s(%s)\n", __func__, dev_read_name(dev));
+
+	ret = clk_set_default_parents(dev);
+	if (ret)
+		return ret;
+
+	ret = clk_set_default_rates(dev);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
 # endif /* OF_PLATDATA */
 
 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index b15f602252..89f2e46998 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <clk.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <malloc.h>
@@ -400,6 +401,11 @@ int device_probe(struct udevice *dev)
 			goto fail;
 	}
 
+	/* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
+	ret = clk_set_defaults(dev);
+	if (ret)
+		goto fail;
+
 	if (drv->probe) {
 		ret = drv->probe(dev);
 		if (ret) {
diff --git a/include/clk.h b/include/clk.h
index 3791974095..f0598d8f2e 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -133,6 +133,23 @@ static inline int clk_release_all(struct clk *clk, int count)
 
 #endif
 
+#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) && \
+	CONFIG_IS_ENABLED(CLK)
+/**
+ * clk_set_defaults - Process 'assigned-{clocks/clock-parents/clock-rates}'
+ *                    properties to configure clocks
+ *
+ * @dev:        A device to process (the ofnode associated with this device
+ *              will be processed).
+ */
+int clk_set_defaults(struct udevice *dev);
+#else
+static inline int clk_set_defaults(struct udevice *dev)
+{
+	return 0;
+}
+#endif
+
 /**
  * clk_request - Request a clock by provider-specific ID.
  *

commit 0ee68417d2d0793aed9af0023546d6d59e4cffd1
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 13:11:01 2018 +0100

    rockchip: clk: rk3399: implement set_parent() operation
    
    This implements the (newly added) set_parent() operation for the
    RK3399 with a focus on allowing the RGMII clock parent to be
    configured via the assigned-clock-parents property of the GMAC node.
    
    This implementation supports only the GMAC (in fact only the RGMII
    clock parent) and allows to set this clock's parent either to the
    internal SCLK_GMAC or to an external clock input (identifiable by it
    providing a 'clock-output-name' of "gmac_clkin").
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit a45f17e8b9f91628936349ef40a06d10dc9c08ae)
    
    Change-Id: I64910d7fa0b520194a5bd2b82e2bb5fbd5b6637c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 08eb8f55b0..3b7203e654 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -742,6 +742,30 @@ static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru,
 	return rk3399_mmc_get_clk(cru, clk_id);
 }
 
+static ulong rk3399_gmac_set_clk(struct rk3399_cru *cru, ulong rate)
+{
+	ulong ret;
+
+	/*
+	 * The RGMII CLK can be derived either from an external "clkin"
+	 * or can be generated from internally by a divider from SCLK_MAC.
+	 */
+	if (readl(&cru->clksel_con[19]) & BIT(4)) {
+		/* An external clock will always generate the right rate... */
+		ret = rate;
+	} else {
+		/*
+		 * No platform uses an internal clock to date.
+		 * Implement this once it becomes necessary and print an error
+		 * if someone tries to use it (while it remains unimplemented).
+		 */
+		pr_err("%s: internal clock is UNIMPLEMENTED\n", __func__);
+		ret = 0;
+	}
+
+	return ret;
+}
+
 #define PMUSGRF_DDR_RGN_CON16 0xff330040
 static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 				ulong set_rate)
@@ -865,8 +889,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk3399_mmc_set_clk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_MAC:
-		/* nothing to do, as this is an external clock */
-		ret = rate;
+		ret = rk3399_gmac_set_clk(priv->cru, rate);
 		break;
 	case SCLK_I2C1:
 	case SCLK_I2C2:
@@ -902,6 +925,52 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3399_gmac_set_parent(struct clk *clk, struct clk *parent)
+{
+	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
+	const char *clock_output_name;
+	int ret;
+
+	/*
+	 * If the requested parent is in the same clock-controller and
+	 * the id is SCLK_MAC ("clk_gmac"), switch to the internal clock.
+	 */
+	if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC)) {
+		debug("%s: switching RGMII to SCLK_MAC\n", __func__);
+		rk_clrreg(&priv->cru->clksel_con[19], BIT(4));
+		return 0;
+	}
+
+	/*
+	 * Otherwise, we need to check the clock-output-names of the
+	 * requested parent to see if the requested id is "clkin_gmac".
+	 */
+	ret = dev_read_string_index(parent->dev, "clock-output-names",
+				    parent->id, &clock_output_name);
+	if (ret < 0)
+		return -ENODATA;
+
+	/* If this is "clkin_gmac", switch to the external clock input */
+	if (!strcmp(clock_output_name, "clkin_gmac")) {
+		debug("%s: switching RGMII to CLKIN\n", __func__);
+		rk_setreg(&priv->cru->clksel_con[19], BIT(4));
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
+static int rk3399_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	switch (clk->id) {
+	case SCLK_RMII_SRC:
+		return rk3399_gmac_set_parent(clk, parent);
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static int rk3399_clk_enable(struct clk *clk)
 {
 	switch (clk->id) {
@@ -919,6 +988,7 @@ static int rk3399_clk_enable(struct clk *clk)
 static struct clk_ops rk3399_clk_ops = {
 	.get_rate = rk3399_clk_get_rate,
 	.set_rate = rk3399_clk_set_rate,
+	.set_parent = rk3399_clk_set_parent,
 	.enable = rk3399_clk_enable,
 };
 

commit 2ae83ee4a9c4733d431bfff3e674aaf2adb6b751
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 11:18:18 2018 +0100

    clk: refactor clk_get_by_index() into clk_get_by_indexed_prop()
    
    The logic in clk_get_by_index() may be useful for other properties
    than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents'
    follows the same model.
    
    This commit refactors clk_get_by_index() by introducing an internal
    function clk_get_by_indexed_prop() that allows to specify the name
    of the property to process.  The original clk_get_by_index() call
    is simply directed through this helper function with the property
    name fixed to "clocks".
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit 95f9a7e5957093612b1e8447ac5460a6adcea3ba)
    
    Change-Id: I898e38a99e63c851a0c8285670a4c86a711a6972
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index ee7495cb0d..91dc01d619 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -53,7 +53,8 @@ static int clk_of_xlate_default(struct clk *clk,
 	return 0;
 }
 
-int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
+static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
+				   int index, struct clk *clk)
 {
 	int ret;
 	struct ofnode_phandle_args args;
@@ -65,7 +66,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 	assert(clk);
 	clk->dev = NULL;
 
-	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
+	ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
 					 index, &args);
 	if (ret) {
 		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
@@ -95,6 +96,11 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 
 	return clk_request(dev_clk, clk);
 }
+
+int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
+{
+	return clk_get_by_indexed_prop(dev, "clocks", index, clk);
+}
 # endif /* OF_PLATDATA */
 
 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)

commit 4686bbffedcc4cf265ce9eb5a7907ff6ac8869bf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Jan 8 11:15:08 2018 +0100

    clk: add clk_set_parent()
    
    Clocks may support multiple parents: this change introduces an
    optional operation on the clk-uclass to set a clock's parent.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: David Wu <david.wu@rock-chips.com>
    
    Series-changes: 2
    - Fixed David's email address.
    
    (cherry picked from commit f7d1046da18fd03a047b5f4d290a8ab8550ebf73)
    
    Change-Id: I92065a132988a66b7d86a936766429ea024f4d1e
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index caf53d3e4a..ee7495cb0d 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -208,6 +208,18 @@ int clk_set_phase(struct clk *clk, int degrees)
 	return ops->set_phase(clk, degrees);
 }
 
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
+
+	debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
+
+	if (!ops->set_parent)
+		return -ENOSYS;
+
+	return ops->set_parent(clk, parent);
+}
+
 int clk_enable(struct clk *clk)
 {
 	const struct clk_ops *ops = clk_dev_ops(clk->dev);
diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index a3eb3a987e..be784c8c9f 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -94,6 +94,14 @@ struct clk_ops {
 	 * @return 0 on success, or -ve error code.
 	 */
 	int (*set_phase)(struct clk *clk, int degrees);
+	/**
+	 * set_parent() - Set current clock parent
+	 *
+	 * @clk:        The clock to manipulate.
+	 * @parent:     New clock parent.
+	 * @return zero on success, or -ve error code.
+	 */
+	int (*set_parent)(struct clk *clk, struct clk *parent);
 	/**
 	 * enable() - Enable a clock.
 	 *
diff --git a/include/clk.h b/include/clk.h
index 13b157b59b..3791974095 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -197,6 +197,17 @@ int clk_get_phase(struct clk *clk);
  */
 int clk_set_phase(struct clk *clk, int degrees);
 
+/**
+ * clk_set_parent() - Set current clock parent.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @parent:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @return new rate, or -ve error code.
+ */
+int clk_set_parent(struct clk *clk, struct clk *parent);
+
 /**
  * clk_enable() - Enable (turn on) a clock.
  *

commit eda90cbc2ada28031a80c791de51535a9175aad2
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:06:53 2018 +0100

    clk: Remove superfluous gd declarations
    
    The clk uclass was converted to support a live device tree recently,
    hence the global data pointer declarations are no longer needed.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    (cherry picked from commit 7fe1b063d8eef2549bd53d618dcecb6723e1354c)
    
    Change-Id: If3dbb3dfc7b2ab5a94846c0e11635cc1c2af563c
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index e7e57943a8..caf53d3e4a 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -13,8 +13,6 @@
 #include <dt-structs.h>
 #include <errno.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
 {
 	return (const struct clk_ops *)dev->driver->ops;
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 63565b6ed8..aefc64ed5d 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -8,8 +8,6 @@
 #include <clk-uclass.h>
 #include <dm.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct clk_fixed_rate {
 	unsigned long fixed_rate;
 };

commit 7c1014244c3a57a4dd5e29438be17a579f67475a
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:06:51 2018 +0100

    clk: clk-uclass: Fix style violations
    
    checkpatch.pl complains that the clk_ops structures used in clk-uclass.c
    ought to be const, so we mark them as const.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    (cherry picked from commit 268453be7c8f9fb93e1c40b9ce5f7382335ebeb4)
    
    Change-Id: I4939e3354672f1200a8bcee9f747df5ccca1214d
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index e006b6bbab..e7e57943a8 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -15,9 +15,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
+static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
 {
-	return (struct clk_ops *)dev->driver->ops;
+	return (const struct clk_ops *)dev->driver->ops;
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
@@ -60,7 +60,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 	int ret;
 	struct ofnode_phandle_args args;
 	struct udevice *dev_clk;
-	struct clk_ops *ops;
+	const struct clk_ops *ops;
 
 	debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 
@@ -68,7 +68,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 	clk->dev = NULL;
 
 	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
-					  index, &args);
+					 index, &args);
 	if (ret) {
 		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 		      __func__, ret);
@@ -142,7 +142,7 @@ int clk_release_all(struct clk *clk, int count)
 
 int clk_request(struct udevice *dev, struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(dev);
+	const struct clk_ops *ops = clk_dev_ops(dev);
 
 	debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 
@@ -156,7 +156,7 @@ int clk_request(struct udevice *dev, struct clk *clk)
 
 int clk_free(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 
@@ -168,7 +168,7 @@ int clk_free(struct clk *clk)
 
 ulong clk_get_rate(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 
@@ -180,7 +180,7 @@ ulong clk_get_rate(struct clk *clk)
 
 ulong clk_set_rate(struct clk *clk, ulong rate)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 
@@ -192,7 +192,7 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
 
 int clk_get_phase(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	if (!ops->get_phase)
 		return -ENOSYS;
@@ -202,7 +202,7 @@ int clk_get_phase(struct clk *clk)
 
 int clk_set_phase(struct clk *clk, int degrees)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	if (!ops->set_phase)
 		return -ENOSYS;
@@ -212,7 +212,7 @@ int clk_set_phase(struct clk *clk, int degrees)
 
 int clk_enable(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 
@@ -224,7 +224,7 @@ int clk_enable(struct clk *clk)
 
 int clk_disable(struct clk *clk)
 {
-	struct clk_ops *ops = clk_dev_ops(clk->dev);
+	const struct clk_ops *ops = clk_dev_ops(clk->dev);
 
 	debug("%s(clk=%p)\n", __func__, clk);
 

commit 8159cb4fb4af282591787cf59d2a5b8305eac0cd
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Feb 23 19:42:39 2018 +0800

    mmc: fix bug in function do_mmc_testrpmb
    
    Change-Id: I35aebe3aefc512928281e2f17ef020b36befc36e
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index af71e108f8..8d320fa122 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -147,7 +147,7 @@ static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
 	uint64_t value;
 	trusty_write_rollback_index(0x87654321, 0x1122334455667788);
 	trusty_read_rollback_index(0x87654321, &value);
-	debug("sizeof(value) %x\n ", sizeof(value));
+	debug("sizeof(value) %zu\n ", sizeof(value));
 	if (value == 0x1122334455667788)
 		printf("good ! value==0x1122334455667788\n ");
 	else

commit 1f25ada2a8eccef6ea3d9844a40d05d7ce7027d4
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Feb 23 19:30:03 2018 +0800

    lib: optee_client: support new optee message
    
    Change-Id: I83e8da2252f1fef6dff7d388d12e6fb7972cf79e
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientRkFs.h b/include/optee_include/OpteeClientRkFs.h
new file mode 100644
index 0000000000..d7f68bc277
--- /dev/null
+++ b/include/optee_include/OpteeClientRkFs.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef TEE_SUPP_RK_FS_H
+#define TEE_SUPP_RK_FS_H
+
+#include <stddef.h>
+
+int tee_supp_rk_fs_init(void);
+
+int tee_supp_rk_fs_process(void *cmd, uint32_t cmd_size);
+
+void OpteeClientRkFsInit(void);
+
+#endif
diff --git a/include/optee_include/tee_rpc.h b/include/optee_include/tee_rpc.h
index c6ddc6b3c1..2515bc1e61 100644
--- a/include/optee_include/tee_rpc.h
+++ b/include/optee_include/tee_rpc.h
@@ -39,5 +39,4 @@
 #define TEE_WAIT_MUTEX_DELETE	2
 #define TEE_RPC_WAIT		0x30000000
 
-
 #endif
diff --git a/include/optee_include/tee_rpc_types.h b/include/optee_include/tee_rpc_types.h
index a90c1a63f9..dbb4110a88 100644
--- a/include/optee_include/tee_rpc_types.h
+++ b/include/optee_include/tee_rpc_types.h
@@ -12,7 +12,7 @@
 
 struct tee_rpc_load_ta_cmd {
 	TEE_UUID uuid;
-	void *va;
+	uint32_t va;
 };
 
 struct tee_rpc_rpmb_cmd {
diff --git a/include/optee_include/teesmc.h b/include/optee_include/teesmc.h
index 1bad06d0a8..04c735283c 100644
--- a/include/optee_include/teesmc.h
+++ b/include/optee_include/teesmc.h
@@ -206,28 +206,6 @@ struct teesmc32_arg {
 	 */
 };
 
-/**
- * TEESMC32_GET_PARAMS - return pointer to union teesmc32_param *
- *
- * @x: Pointer to a struct teesmc32_arg
- *
- * Returns a pointer to the params[] inside a struct teesmc32_arg.
- */
-#define TEESMC32_GET_PARAMS(x) \
-	(struct teesmc32_param *)(((struct teesmc32_arg *)(x)) + 1)
-
-/**
- * TEESMC32_GET_ARG_SIZE - return size of struct teesmc32_arg
- *
- * @num_params: Number of parameters embedded in the struct teesmc32_arg
- *
- * Returns the size of the struct teesmc32_arg together with the number
- * of embedded paramters.
- */
-#define TEESMC32_GET_ARG_SIZE(num_params) \
-	(sizeof(struct teesmc32_arg) + \
-	 sizeof(struct teesmc32_param) * (num_params))
-
 /**
  * struct teesmc64_arg - SMC argument for Trusted OS
  * @cmd: OS Command, one of TEESMC_CMD_*
@@ -667,10 +645,21 @@ struct teesmc_meta_open_session {
 #define TEESMC_RETURN_IS_RPC(ret) \
 	(((ret) & TEESMC_RETURN_RPC_PREFIX_MASK) == TEESMC_RETURN_RPC_PREFIX)
 
+typedef struct teesmc_meta_open_session t_teesmc_meta_open_session;
+
+#ifdef CONFIG_OPTEE_V1
+
 typedef struct teesmc32_arg             t_teesmc32_arg;
 typedef struct teesmc32_param           t_teesmc32_param;
-typedef struct teesmc_meta_open_session t_teesmc_meta_open_session;
 
+#define TEESMC32_GET_PARAMS(x) \
+	(struct teesmc32_param *)(((struct teesmc32_arg *)(x)) + 1)
+
+#define TEESMC32_GET_ARG_SIZE(num_params) \
+	(sizeof(struct teesmc32_arg) + \
+	 sizeof(struct teesmc32_param) * (num_params))
+
+#endif
 void tee_smc_call(ARM_SMC_ARGS *param);
 
 #endif /* TEESMC_H */
diff --git a/include/optee_include/teesmc_v2.h b/include/optee_include/teesmc_v2.h
new file mode 100644
index 0000000000..43bcd1a7ee
--- /dev/null
+++ b/include/optee_include/teesmc_v2.h
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef TEESMC_V2_H
+#define TEESMC_V2_H
+
+#define OPTEE_SMC_CALL_WITH_ARG_V2 0x32000004
+
+struct optee_msg_param_tmem_v2 {
+	uint64_t buf_ptr;
+	uint64_t size;
+	uint64_t shm_ref;
+};
+
+struct optee_msg_param_rmem_v2 {
+	uint64_t offs;
+	uint64_t size;
+	uint64_t shm_ref;
+};
+
+struct optee_msg_param_value_v2 {
+	uint64_t a;
+	uint64_t b;
+	uint64_t c;
+};
+
+struct optee_msg_param_v2 {
+	uint64_t attr;
+	union {
+		struct optee_msg_param_tmem_v2 memref;
+		struct optee_msg_param_rmem_v2 rmem;
+		struct optee_msg_param_value_v2 value;
+	} u;
+};
+
+struct optee_msg_arg_v2 {
+	uint32_t cmd;
+	uint32_t ta_func;
+	uint32_t session;
+	uint32_t cancel_id;
+	uint32_t pad;
+	uint32_t ret;
+	uint32_t ret_origin;
+	uint32_t num_params;
+
+	/* num_params tells the actual number of element in params */
+	struct optee_msg_param_v2 params[];
+};
+
+#ifdef CONFIG_OPTEE_V2
+typedef struct optee_msg_arg_v2        t_teesmc32_arg;
+typedef struct optee_msg_param_v2      t_teesmc32_param;
+
+#define TEESMC32_GET_ARG_SIZE(num_params) \
+	(sizeof(struct optee_msg_arg_v2) + \
+	 sizeof(struct optee_msg_param_v2) * (num_params))
+
+#define TEESMC32_GET_PARAMS(x) \
+	(struct optee_msg_param_v2 *)(((struct optee_msg_arg_v2 *)(x)) + 1)
+
+#endif
+
+#define OPTEE_MSG_ATTR_TYPE_NONE_V2		0x0
+#define OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2		0x1
+#define OPTEE_MSG_ATTR_TYPE_VALUE_OUTPUT_V2		0x2
+#define OPTEE_MSG_ATTR_TYPE_VALUE_INOUT_V2		0x3
+#define OPTEE_MSG_ATTR_TYPE_RMEM_INPUT_V2		0x5
+#define OPTEE_MSG_ATTR_TYPE_RMEM_OUTPUT_V2		0x6
+#define OPTEE_MSG_ATTR_TYPE_RMEM_INOUT_V2		0x7
+#define OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2		0x9
+#define OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2		0xa
+#define OPTEE_MSG_ATTR_TYPE_TMEM_INOUT_V2		0xb
+
+#define OPTEE_MSG_ATTR_META_V2			(1 << (8))
+
+#define OPTEE_MSG_RPC_CMD_SHM_ALLOC_V2	6
+#define OPTEE_MSG_RPC_CMD_SHM_FREE_V2	7
+
+#define OPTEE_MSG_RPC_CMD_LOAD_TA_V2	0
+
+#define OPTEE_MSG_RPC_CMD_RPMB_V2		1
+
+#define OPTEE_MSG_RPC_CMD_FS_V2		2
+
+
+#endif /* TEESMC_V2_H */
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
new file mode 100644
index 0000000000..29dd857e5d
Binary files /dev/null and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta differ
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 7d402989e7..888fda324d 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -9,8 +9,19 @@ obj-y += OpteeClientInterface.o
 obj-y += OpteeClientSMC.o
 obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
-obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
+obj-y += OpteeClientRkFs.o
 
+ifdef CONFIG_OPTEE_V1
+obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
 	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+endif
+
+ifdef CONFIG_OPTEE_V2
+obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d-for-optee-v2.ta
+	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+endif
+
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
index 8704be9057..a2f8c12ab4 100644
--- a/lib/optee_clientApi/OpteeClientApiLib.c
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -8,6 +8,7 @@
 #include <optee_include/OpteeClientApiLib.h>
 #include <optee_include/OpteeClientMem.h>
 #include <optee_include/OpteeClientSMC.h>
+#include <optee_include/OpteeClientRkFs.h>
 
 /*
  * Initlialize the library
@@ -18,6 +19,8 @@ TEEC_Result OpteeClientApiLibInitialize(void)
 
 	OpteeClientMemInit();
 
+	OpteeClientRkFsInit();
+
 	return status;
 }
 
@@ -64,8 +67,8 @@ exit:
  */
 TEEC_Result TEEC_FinalizeContext(TEEC_Context *context)
 {
-	debug("TEEC_FinalizeContext Enter-Exit: context=0x%X\n",
-		(unsigned int)context);
+	debug("TEEC_FinalizeContext Enter-Exit: context=0x%zu\n",
+		(size_t)context);
 	return TEEC_SUCCESS;
 }
 
@@ -81,7 +84,7 @@ TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 
-	debug("TEEC_AllocateSharedMemory Enter: context=%s 0x%X, shared_memory=0x%X\n",
+	debug("TEEC_AllocateSharedMemory Enter: context=%s 0x%X, shared_memory=0x%zu\n",
 		context->devname, context->fd, shared_memory->size);
 
 	if ((context == NULL) || (shared_memory == NULL)) {
@@ -97,7 +100,7 @@ TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
 	shared_memory->buffer = NULL;
 	shared_memory->alloc_buffer = 0;
 
-	debug("TEEC_AllocateSharedMemory: size=0x%X, flags=0x%X\n",
+	debug("TEEC_AllocateSharedMemory: size=0x%zu, flags=0x%X\n",
 			shared_memory->size, shared_memory->flags);
 
 	shared_memory->buffer = OpteeClientMemAlloc(shared_memory->size);
@@ -121,7 +124,7 @@ Exit:
  */
 void TEEC_ReleaseSharedMemory(TEEC_SharedMemory *shared_memory)
 {
-	debug("TEEC_ReleaseSharedMemory Enter: shared_memory=0x%X\n",
+	debug("TEEC_ReleaseSharedMemory Enter: shared_memory=0x%zu\n",
 				shared_memory->size);
 
 	if (shared_memory == NULL)
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 7710c89a50..f1d8fe90a1 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -713,7 +713,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					139,
+					141,
 					&TeecOperation,
 					&ErrorOrigin);
 
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
index ac63037b22..e78b603f29 100644
--- a/lib/optee_clientApi/OpteeClientMem.c
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -125,14 +125,17 @@ void my_free(void *ptr)
  */
 void OpteeClientMemInit(void)
 {
-#ifdef CONFIG_ROCKCHIP_RK3328
+#ifdef CONFIG_ARM64
 	debug(" OpteeClientMemInit 64\n");
-	my_malloc_init(0x09200000, 0x00200000);
-#endif
-#ifdef CONFIG_ROCKCHIP_RK322X
+	my_malloc_init((void *)0x09e10000, 0x003e0000);
+#else
 	debug(" OpteeClientMemInit 32\n");
+#ifdef CONFIG_ROCKCHIP_RK3288
+	my_malloc_init((void *)0x0910a000, 0x000e0000);
+#else
 	my_malloc_init((void *)0x6910a000, 0x000e0000);
 #endif
+#endif
 }
 
 /*
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
index 3c03ac79d1..f32633a7ba 100644
--- a/lib/optee_clientApi/OpteeClientRPC.c
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -11,10 +11,12 @@
 #include <optee_include/OpteeClientMem.h>
 #include <optee_include/OpteeClientRPC.h>
 #include <optee_include/teesmc.h>
+#include <optee_include/teesmc_v2.h>
 #include <optee_include/teesmc_optee.h>
 #include <optee_include/tee_rpc_types.h>
 #include <optee_include/tee_rpc.h>
 #include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+#include <optee_include/OpteeClientRkFs.h>
 
 /*
  * Memory allocation.
@@ -23,12 +25,12 @@
 TEEC_Result OpteeRpcAlloc(uint32_t Size, uint32_t *Address)
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
-	uint32_t AllocAddress;
+	size_t AllocAddress;
 
 	*Address = 0;
 
 	if (Size != 0) {
-		AllocAddress = (uint32_t) OpteeClientMemAlloc(Size);
+		AllocAddress = (size_t) OpteeClientMemAlloc(Size);
 
 		if (AllocAddress == 0)
 			TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
@@ -44,7 +46,7 @@ TEEC_Result OpteeRpcAlloc(uint32_t Size, uint32_t *Address)
  */
 TEEC_Result OpteeRpcFree(uint32_t Address)
 {
-	OpteeClientMemFree((void *)Address);
+	OpteeClientMemFree((void *)(size_t)Address);
 	return TEEC_SUCCESS;
 }
 
@@ -67,7 +69,7 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
 	TeeLoadTaCmd = (struct tee_rpc_load_ta_cmd *)
-					TeeSmc32Param[0].u.memref.buf_ptr;
+					(size_t)TeeSmc32Param[0].u.memref.buf_ptr;
 	TeeLoadTaCmdSize = TeeSmc32Param[0].u.memref.size;
 
 	if ((TeeLoadTaCmd == NULL) ||
@@ -79,7 +81,7 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result Status = 0;
 	void *ImageData = NULL;
 	uint32_t ImageSize = 0;
-	uint32_t AllocAddress = 0;
+	size_t AllocAddress = 0;
 
 	ImageData = (void *)keymaster_data;
 	ImageSize = keymaster_size;
@@ -89,7 +91,7 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 		goto Exit;
 	}
 
-	AllocAddress = (uint32_t) OpteeClientMemAlloc(ImageSize);
+	AllocAddress = (size_t) OpteeClientMemAlloc(ImageSize);
 
 	if (AllocAddress == 0) {
 		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
@@ -98,12 +100,12 @@ TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
 
 	memcpy((void *)AllocAddress, ImageData, ImageSize);
 
-	debug("...TA loaded at 0x%X of size 0x%X bytes\n",
+	debug("...TA loaded at 0x%zu of size 0x%X bytes\n",
 		AllocAddress, ImageSize);
 	debug("...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
 		*(char *)AllocAddress, *(char *)(AllocAddress+1));
 
-	TeeLoadTaCmd->va = (void *)AllocAddress;
+	TeeLoadTaCmd->va = AllocAddress;
 
 	TeeSmc32Param[1].u.memref.buf_ptr = AllocAddress;
 	TeeSmc32Param[1].u.memref.size = ImageSize;
@@ -117,6 +119,46 @@ Exit:
 	return TeecResult;
 }
 
+#ifdef CONFIG_OPTEE_V2
+TEEC_Result OpteeRpcCmdLoadV2Ta(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	uint8_t uuid[16];
+	int i;
+
+	if (TeeSmc32Arg->num_params != 2) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	memcpy(uuid, (void *)&TeeSmc32Param[0].u.value, 16);
+	for (i = 0; i < 16; i++)
+		printf("uuid 0x%x", uuid[i]);
+
+	if (TeeSmc32Param[1].u.memref.buf_ptr == 0) {
+		printf("return size of TA, keymaster_size = 0x%x", keymaster_size);
+		TeeSmc32Param[1].u.memref.size = keymaster_size;
+	} else {
+		memcpy((void *)TeeSmc32Param[1].u.memref.buf_ptr,
+			(void *)keymaster_data, TeeSmc32Param[1].u.memref.size);
+		printf("memref.buf_ptr = 0x%llx; memref.size = 0x%llx",
+			TeeSmc32Param[1].u.memref.buf_ptr,
+			TeeSmc32Param[1].u.memref.size);
+	}
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
+#endif
+
 /*
  * Free a previously loaded TA and release the memory
  * Param[0] = IN: TA Image to free
@@ -130,7 +172,7 @@ TEEC_Result OpteeRpcCmdFreeTa(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	t_teesmc32_param *TeeSmc32Param = NULL;
 	uint32_t ImageSize = 0;
-	uint32_t AllocAddress = 0;
+	size_t AllocAddress = 0;
 
 	if (TeeSmc32Arg->num_params != 1) {
 		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
@@ -164,6 +206,7 @@ Exit:
 /*
  * Execute an RPMB storage operation.
  */
+
 uint16_t global_block_count;
 TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 {
@@ -188,12 +231,12 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	}
 
 	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
-	RpmbRequest = (struct tee_rpc_rpmb_cmd *)
+	RpmbRequest = (struct tee_rpc_rpmb_cmd *)(size_t)
 		TeeSmc32Param[0].u.memref.buf_ptr;
 	switch (RpmbRequest->cmd) {
 	case TEE_RPC_RPMB_CMD_DATA_REQ: {
 		RequestPackets = (EFI_RK_RPMB_DATA_PACKET *)(RpmbRequest + 1);
-		ResponsePackets = (EFI_RK_RPMB_DATA_PACKET *)
+		ResponsePackets = (EFI_RK_RPMB_DATA_PACKET *)(size_t)
 		TeeSmc32Param[1].u.memref.buf_ptr;
 
 		global_block_count =
@@ -344,7 +387,7 @@ TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
 	case TEE_RPC_RPMB_CMD_GET_DEV_INFO: {
 		mmc = do_returnmmc();
 
-		DevInfo = (struct tee_rpc_rpmb_dev_info *)
+		DevInfo = (struct tee_rpc_rpmb_dev_info *)(size_t)
 		TeeSmc32Param[1].u.memref.buf_ptr;
 
 		DevInfo->cid[0] = (mmc->cid[0]) >> 24 & 0xff;
@@ -435,9 +478,15 @@ Exit:
  */
 TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
 {
-	return TEEC_ERROR_NOT_IMPLEMENTED;
-}
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param;
 
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+	TeecResult = tee_supp_rk_fs_process((void *)(size_t)TeeSmc32Param[0].u.memref.buf_ptr,
+							TeeSmc32Param[0].u.memref.size);
+
+	return TeecResult;
+}
 
 /*
  * TBD.
@@ -447,7 +496,6 @@ TEEC_Result OpteeRpcCmdGetTime(t_teesmc32_arg *TeeSmc32Arg)
 	return TEEC_ERROR_NOT_IMPLEMENTED;
 }
 
-
 /*
  * TBD.
  */
@@ -463,12 +511,21 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 
-	debug("OpteeRpcCallback Enter: Arg0=0x%X, Arg1=0x%X, Arg2=0x%X\n",
-		ArmSmcArgs->Arg0, ArmSmcArgs->Arg1, ArmSmcArgs->Arg2);
+	//printf("OpteeRpcCallback Enter: Arg0=0x%X, Arg1=0x%X, Arg2=0x%X\n",
+		//ArmSmcArgs->Arg0, ArmSmcArgs->Arg1, ArmSmcArgs->Arg2);
 
 	switch (TEESMC_RETURN_GET_RPC_FUNC(ArmSmcArgs->Arg0)) {
 	case TEESMC_RPC_FUNC_ALLOC_ARG: {
+#ifdef CONFIG_OPTEE_V1
 		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+#endif
+#ifdef CONFIG_OPTEE_V2
+		printf("ArmSmcArgs->Arg1 = 0x%x", ArmSmcArgs->Arg1);
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg2);
+		ArmSmcArgs->Arg5 = ArmSmcArgs->Arg2;
+		ArmSmcArgs->Arg1 = 0;
+		ArmSmcArgs->Arg4 = 0;
+#endif
 		break;
 	}
 
@@ -478,7 +535,12 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	case TEESMC_RPC_FUNC_FREE_ARG: {
+#ifdef CONFIG_OPTEE_V1
 		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+#endif
+#ifdef CONFIG_OPTEE_V2
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg2);
+#endif
 		break;
 	}
 
@@ -492,10 +554,17 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 	}
 
 	case TEESMC_RPC_FUNC_CMD: {
+#ifdef CONFIG_OPTEE_V1
 		t_teesmc32_arg *TeeSmc32Arg =
-			(t_teesmc32_arg *)ArmSmcArgs->Arg1;
-
+			(t_teesmc32_arg *)(size_t)ArmSmcArgs->Arg1;
+#endif
+#ifdef CONFIG_OPTEE_V2
+		t_teesmc32_arg *TeeSmc32Arg =
+			(t_teesmc32_arg *)((size_t)ArmSmcArgs->Arg1 << 32 | ArmSmcArgs->Arg2);
+		printf("TeeSmc32Arg->cmd = 0x%x", TeeSmc32Arg->cmd);
+#endif
 		switch (TeeSmc32Arg->cmd) {
+#ifdef CONFIG_OPTEE_V1
 		case TEE_RPC_LOAD_TA: {
 			TeecResult = OpteeRpcCmdLoadTa(TeeSmc32Arg);
 			break;
@@ -513,6 +582,7 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 
 		case TEE_RPC_FS: {
 			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
+			TeeSmc32Arg->ret = TEEC_SUCCESS;
 			break;
 		}
 
@@ -525,6 +595,35 @@ TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
 			TeecResult = OpteeRpcCmdWaitMutex(TeeSmc32Arg);
 			break;
 		}
+#endif
+#ifdef CONFIG_OPTEE_V2
+		case OPTEE_MSG_RPC_CMD_SHM_ALLOC_V2: {
+			uint32_t tempaddr;
+			uint32_t allocsize = TeeSmc32Arg->params[0].u.value.b;
+			TeecResult = OpteeRpcAlloc(allocsize, &tempaddr);
+			printf("allocsize = 0x%x tempaddr = 0x%x", allocsize, tempaddr);
+			TeeSmc32Arg->params[0].attr = OPTEE_MSG_ATTR_TYPE_TMEM_OUTPUT_V2;
+			TeeSmc32Arg->params[0].u.memref.buf_ptr = tempaddr;
+			TeeSmc32Arg->params[0].u.memref.size = allocsize;
+			TeeSmc32Arg->params[0].u.memref.shm_ref = tempaddr;
+			TeeSmc32Arg->ret = TEE_SUCCESS;
+			break;
+		}
+		case OPTEE_MSG_RPC_CMD_SHM_FREE_V2: {
+			uint32_t tempaddr = TeeSmc32Arg->params[0].u.value.b;
+			TeecResult = OpteeRpcFree(tempaddr);
+			break;
+
+		}
+		case OPTEE_MSG_RPC_CMD_RPMB_V2: {
+			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
+			break;
+		}
+		case OPTEE_MSG_RPC_CMD_LOAD_TA_V2: {
+			TeecResult = OpteeRpcCmdLoadV2Ta(TeeSmc32Arg);
+			break;
+		}
+#endif
 
 		default: {
 			printf("...unsupported RPC CMD: cmd=0x%X\n",
diff --git a/lib/optee_clientApi/OpteeClientRkFs.c b/lib/optee_clientApi/OpteeClientRkFs.c
new file mode 100644
index 0000000000..0e619e2cf0
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRkFs.c
@@ -0,0 +1,1330 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co.,Ltd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *																		Created by jeffry.zhang@rock-chips.com
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+
+//#define DEBUG_RKFSS
+//#define DEBUG_CLEAN_RKSS
+
+/*
+ * Operations and defines shared with TEE.
+ */
+#define TEE_FS_OPEN       1
+#define TEE_FS_CLOSE      2
+#define TEE_FS_READ       3
+#define TEE_FS_WRITE      4
+#define TEE_FS_SEEK       5
+#define TEE_FS_UNLINK     6
+#define TEE_FS_RENAME     7
+#define TEE_FS_TRUNC      8
+#define TEE_FS_MKDIR      9
+#define TEE_FS_OPENDIR   10
+#define TEE_FS_CLOSEDIR  11
+#define TEE_FS_READDIR   12
+#define TEE_FS_RMDIR     13
+#define TEE_FS_ACCESS    14
+#define TEE_FS_LINK      15
+
+/*
+ * Open flags, defines shared with TEE.
+ */
+#define TEE_FS_O_RDONLY 0x1
+#define TEE_FS_O_WRONLY 0x2
+#define TEE_FS_O_RDWR   0x4
+#define TEE_FS_O_CREAT  0x8
+#define TEE_FS_O_EXCL   0x10
+#define TEE_FS_O_APPEND 0x20
+
+/*
+ * Seek flags, defines shared with TEE.
+ */
+#define TEE_FS_SEEK_SET 0x1
+#define TEE_FS_SEEK_END 0x2
+#define TEE_FS_SEEK_CUR 0x4
+
+/*
+ * Mkdir flags, defines shared with TEE.
+ */
+#define TEE_FS_S_IWUSR 0x1
+#define TEE_FS_S_IRUSR 0x2
+
+/*
+ * Access flags, X_OK not supported, defines shared with TEE.
+ */
+#define TEE_FS_R_OK    0x1
+#define TEE_FS_W_OK    0x2
+#define TEE_FS_F_OK    0x4
+
+/*
+ *	RK Secure Storage Ctrl
+ *		Storage Size : 512 kb
+ *		Header Size : 8 byte * 2 for each top of 512 byte
+ *		Partision Table Size : 128 * 512 b (24 Files And Folder)
+ *		File number: 128 * 4 = 512
+ *		Data Size : 895 * 512 b
+ *
+ *	------ RKSS Structure --------
+ *	- 512 byte patition table1 [0]
+ *		- 126 * 4 = 504 byte table info
+ *		- 8 byte verification
+ *	- 512 byte patition table2 [1]
+ *	             ...
+ *	- 512 byte patition table128 [127]
+ *	- 512 byte section used refs [128]
+ *		- 1 byte = 2 flag
+ *	- 895 * 512 byte data	[129 - 1023]
+ *	------------------------------
+ *
+ */
+#define RKSS_DATA_SECTION_COUNT		1024
+#define RKSS_DATA_LEN			512
+#define RKSS_PARTITION_TABLE_COUNT	128		// total size 512 * 128
+#define RKSS_EACH_FILEFOLDER_COUNT	4		// 504 / 126 = 4
+#define RKSS_NAME_MAX_LENGTH		117		// 116 char + "\0"
+#define RKSS_USEDFLAGS_INDEX		RKSS_PARTITION_TABLE_COUNT
+
+typedef struct rkss_file_info
+{
+	uint8_t		used;
+	char 		name[RKSS_NAME_MAX_LENGTH];
+	uint16_t	index;	// from 129 to 1024
+	uint16_t	size;	// size of data
+	uint16_t	father;
+	uint8_t 	id; // file folder count index
+#define RK_FS_R    0x1
+#define RK_FS_W    0x2
+#define RK_FS_D    0x8
+	uint8_t		flags;
+}rkss_file_info; // 126 byte for each
+
+#define RKSS_VERSION		(uint32_t)0x1
+#define RKSS_CHECK_STR	(uint32_t)0x12345678
+#define RKSS_CHECK_PT		(uint8_t)0xFC
+typedef struct rkss_file_verification
+{
+	uint32_t version;
+	uint32_t checkstr;
+}rkss_file_verification; // 8 byte
+
+typedef struct rk_secure_storage
+{
+	unsigned long index;
+	unsigned char data[RKSS_DATA_LEN];
+}rk_secure_storage;
+
+/* Path to all secure storage dev. */
+#define RKSS_DEV "/dev/block/rknand_security"
+
+/* Function Defines */
+#define UNREFERENCED_PARAMETER(P) (P=P)
+#define CHECKFLAG(flags, flag) (flags & flag)
+#define ADDFLAG(flags, flag) (flags | flag)
+
+/* RK Secure Storage Calls */
+static int file_seek = 0;
+static char dir_cache[RKSS_NAME_MAX_LENGTH][12];
+static int dir_num = 0;
+static int dir_seek = 0;
+
+extern struct blk_desc *rockchip_get_bootdev(void);
+extern int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
+	disk_partition_t *info);
+extern unsigned long blk_dread(struct blk_desc *block_dev, lbaint_t start,
+			lbaint_t blkcnt, void *buffer);
+
+extern unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t start,
+			 lbaint_t blkcnt, const void *buffer);
+
+static int rkss_read_section(struct rk_secure_storage *rkss)
+{
+	int ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return -1;
+	}
+	ret = blk_dread(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret < 0)
+		return -1;
+
+	return 0;
+}
+
+static int rkss_write_section(struct rk_secure_storage *rkss)
+{
+	int ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
+		printf("%s: Could not find device\n", __func__);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, "security", &part_info) < 0) {
+		printf("Could not find security partition\n");
+		return -1;
+	}
+	ret = blk_dwrite(dev_desc, part_info.start + rkss->index, 1, rkss->data);
+	if (ret < 0)
+		return -1;
+
+	return 0;
+}
+
+#ifdef DEBUG_RKFSS
+static void rkss_dump(void* data, unsigned int len)
+{
+	char *p = (char *)data;
+	unsigned int i = 0;
+	printf("-------------- DUMP %d --------------", len);
+	for (i = 0; i < len; i++)
+	{
+		printf("%02x ", *(p + i));
+	}
+	printf("\n");
+	printf("------------- DUMP END -------------");
+}
+
+static void rkss_dump_ptable(void)
+{
+	printf("-------------- DUMP ptable --------------");
+	int i = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return;
+		}
+
+		int n ;
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			printf("[%02d][%c] %s , inx:%d, size:%d",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->used == 0 ? 'F':'T' ,p->name,
+					p->index, p->size);
+		}
+	}
+	printf("-------------- DUMP END --------------");
+}
+
+static void rkss_dump_usedflags(void)
+{
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return;
+	}
+	rkss_dump(rkss.data, RKSS_DATA_LEN);
+}
+#endif
+
+static int rkss_verify_ptable(struct rk_secure_storage* rkss)
+{
+	void *vp = (void *)rkss->data;
+	char *cp = (char *)vp;
+
+	if ( rkss->index > RKSS_PARTITION_TABLE_COUNT)
+	{
+		printf("cannot support verifing other section.");
+		return 0;
+	}
+
+	cp = (char *)(cp + RKSS_DATA_LEN - sizeof(struct rkss_file_verification));
+	struct rkss_file_verification *verify =
+			(struct rkss_file_verification *)(void *)cp;
+
+	if (verify->version != RKSS_VERSION
+			|| verify->checkstr != RKSS_CHECK_STR)
+	{
+		debug("verify [%lu] fail, cleanning ....", rkss->index);
+		memset(rkss->data, 0, sizeof(RKSS_DATA_LEN));
+		verify->checkstr = RKSS_CHECK_STR;
+		verify->version = RKSS_VERSION;
+		int ret = rkss_write_section(rkss);
+		if (ret < 0)
+		{
+			printf("cleanning ptable fail ! ret: %d.", ret);
+			return -1;
+		}
+		return 0;
+	}
+	return 0;
+}
+
+static int rkss_verify_usedflags(struct rk_secure_storage* rkss)
+{
+	uint8_t *flags = (uint8_t *)rkss->data;
+
+	int i = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT + 1; i++)
+	{
+		int duel = *(flags + (int)i/2);
+		int flag = i & 0x1 ? duel & 0x0F : (duel & 0xF0) >> 4;
+		if ( flag != 0x1 )
+		{
+			debug("init usedflags section ...");
+			memset(rkss->data, 0x00, RKSS_DATA_LEN);
+			int n = 0;
+			for (n = 0; n < RKSS_PARTITION_TABLE_COUNT + 1; n++)
+			{
+				uint8_t *flagw = (uint8_t *)rkss->data + (int)n/2;
+				uint8_t value = 0x1;
+				*flagw = n & 0x1 ? (*flagw & 0xF0) | (value & 0x0F) :
+						(*flagw & 0x0F) | (value << 4);
+			}
+			int ret = rkss_write_section(rkss);
+			if (ret < 0)
+			{
+				printf("clean usedflags section failed!!! ret: %d.", ret);
+				return -1;
+			}
+
+			return 0;
+		}
+	}
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_index(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = i;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	void *pdata = rkss.data;
+	struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	if (p->used != 1)
+	{
+		printf("error: unused section! ");
+		return -1;
+	}
+
+	memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+	return 0;
+}
+
+static int rkss_get_fileinfo_by_name(
+		char* filename, struct rkss_file_info *pfileinfo)
+{
+	int i = 0;
+	uint8_t n = 0;
+	unsigned int len;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1)
+	{
+		printf("filename is too long. length:%u", len);
+		return -1;
+	}
+
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			if (!strcmp(p->name, filename))
+			{
+				debug("rkss_get_fileinfo_by_name: hit table[%d/%d], index[%d/%d]",
+						i, RKSS_PARTITION_TABLE_COUNT, n, RKSS_EACH_FILEFOLDER_COUNT);
+				memcpy(pfileinfo, p, sizeof(struct rkss_file_info));
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+
+			// Folder Matching
+			const char *split = "/";
+			char *last_inpos = filename;
+			char *last_svpos = p->name;
+			char *cur_inpos = NULL;
+			char *cur_svpos = NULL;
+			do {
+				cur_inpos = strstr(last_inpos, split);
+				cur_svpos = strstr(last_svpos, split);
+				int size_in = cur_inpos == NULL ?
+						(int)strlen(last_inpos) : cur_inpos - last_inpos;
+				int size_sv = cur_svpos == NULL ?
+						(int)strlen(last_svpos) : cur_svpos - last_svpos;
+
+				ret = memcmp(last_inpos, last_svpos, size_in);
+
+				last_inpos = cur_inpos + 1;
+				last_svpos = cur_svpos + 1;
+
+				if (size_in != size_sv || ret)
+					goto UNMATCHFOLDER;
+
+			} while(cur_inpos && cur_svpos);
+
+			debug("Matched folder: %s", p->name);
+			return -100;
+UNMATCHFOLDER:
+			debug("Unmatched ...");
+		}
+	}
+	debug("rkss_get_fileinfo_by_name: file or dir no found!");
+	return -1;
+}
+
+static int rkss_get_dirs_by_name(char* filename)
+{
+	int i = 0;
+	uint8_t n = 0;
+	unsigned int len;
+
+	len = strlen(filename);
+	if (len > RKSS_NAME_MAX_LENGTH - 1)
+	{
+		printf("filename is too long. length:%u", len);
+		return -1;
+	}
+
+	dir_num = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+
+			if (p->used == 0)
+				continue;
+
+			// Full Matching
+			ret = memcmp(p->name, filename, strlen(filename));
+			debug("comparing [fd:%d] : %s ?= %s , ret:%d",
+					i*RKSS_EACH_FILEFOLDER_COUNT+n, p->name, filename, ret);
+			if (!ret && strlen(p->name) > strlen(filename))
+			{
+				char *chk = p->name + strlen(filename);
+				if (*chk == '/')
+				{
+					char *file = p->name + strlen(filename) + 1;
+					char *subdir = strtok(file, "/");
+					printf("found: %s", subdir);
+					strcpy(dir_cache[dir_num], subdir);
+					++dir_num;
+				}
+			}
+		}
+	}
+	return dir_num;
+}
+
+static int rkss_get_empty_section_from_usedflags(int section_size)
+{
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	int i = 0;
+	int count0 = 0;
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
+	{
+		uint8_t *flag = (uint8_t *)rkss.data + (int)i/2;
+		uint8_t value = i & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+
+		if (value == 0x0)
+		{
+			if (++count0 == section_size)
+			{
+				return (i + 1 - section_size);
+			}
+		}
+		else
+		{
+			count0 = 0;
+		}
+	}
+
+	printf("Not enough space available in secure storage !");
+	return -10;
+}
+
+static int rkss_incref_usedflags_section(int index)
+{
+	debug("rkss_incref_usedflags_section :%d", index);
+	if (index >= RKSS_DATA_SECTION_COUNT)
+	{
+		printf("index[%d] out of range.", index);
+		return -1;
+	}
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
+	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (++value > 0xF)
+	{
+		printf("reference out of data: %d", value);
+		value = 0xF;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	return 0;
+}
+
+static int rkss_decref_usedflags_section(int index)
+{
+	debug("rkss_decref_usedflags_section :%d", index);
+	if (index >= RKSS_DATA_SECTION_COUNT)
+	{
+		printf("index[%d] out of range.", index);
+		return -1;
+	}
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	uint8_t *flag = (uint8_t *)rkss.data + (int)index/2;
+	int value = index & 0x1 ? *flag & 0x0F : (*flag & 0xF0) >> 4;
+	if (--value < 0)
+	{
+		printf("reference out of data: %d", value);
+		value = 0x0;
+	}
+	*flag = index & 0x1 ? (*flag & 0xF0) | (value & 0x0F) :
+			(*flag & 0x0F) | (value << 4);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_write_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	return 0;
+}
+
+static int rkss_write_empty_ptable(struct rkss_file_info *pfileinfo)
+{
+	int i = 0;
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+
+		int n = 0;
+		for (n = 0; n < RKSS_EACH_FILEFOLDER_COUNT; n++)
+		{
+			void *pdata = rkss.data;
+			struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+			p += n;
+			if (p->used == 0)
+			{
+				debug("write ptable in [%d][%d] .",i ,n);
+				memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+				p->used = 1;
+				p->id = n;
+				debug("write emt ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+						i,n,p->name,p->index,p->size,p->used);
+				ret = rkss_write_section(&rkss);
+				if (ret < 0)
+				{
+					printf("rkss_write_section fail ! ret: %d.", ret);
+					return -1;
+				}
+
+				return i * RKSS_EACH_FILEFOLDER_COUNT + n;
+			}
+		}
+	}
+	printf("No enough ptable space available in secure storage.");
+	return -1;
+}
+
+static int rkss_write_back_ptable(int fd, struct rkss_file_info *pfileinfo)
+{
+	int i = fd / RKSS_EACH_FILEFOLDER_COUNT;
+	int n = fd - (RKSS_EACH_FILEFOLDER_COUNT * i);
+
+	struct rk_secure_storage rkss = {0};
+	rkss.index = i;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		debug("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	void *pdata = rkss.data;
+	struct rkss_file_info *p = (struct rkss_file_info *)pdata;
+	p += n;
+
+	memcpy(p, pfileinfo, sizeof(struct rkss_file_info));
+	debug("write ptable : [%d,%d] name:%s, index:%d, size:%d, used:%d",
+			i,n,p->name,p->index,p->size,p->used);
+
+	ret = rkss_write_section(&rkss);
+	if (ret < 0)
+	{
+		debug("rkss_write_section fail ! ret: %d.", ret);
+		return -1;
+	}
+
+	return 0;
+}
+
+/*
+ * Structure for file related RPC calls
+ *
+ * @op     The operation like open, close, read, write etc
+ * @flags  Flags to the operation shared with secure world
+ * @arg    Argument to operation
+ * @fd     NW file descriptor
+ * @len    Length of buffer at the end of this struct
+ * @res    Result of the operation
+ */
+struct tee_fs_rpc {
+	int op;
+	int flags;
+	int arg;
+	int fd;
+	uint32_t len;
+	int res;
+};
+
+static int tee_fs_open(struct tee_fs_rpc *fsrpc)
+{
+	int make_newfile = 0;
+	char *filename = (char *)(fsrpc + 1);
+
+	if (strlen(filename) > RKSS_NAME_MAX_LENGTH)
+	{
+		debug("tee_fs_open: file name too long. %s",filename);
+		return -1;
+	}
+
+	debug("tee_fs_open open file: %s, len: %zu", filename, strlen(filename));
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0)
+	{
+		debug("tee_fs_open : no such file. %s", filename);
+		make_newfile = 1;
+	}
+	else
+	{
+		fsrpc->fd = ret;
+		file_seek = 0;
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_APPEND))
+		{
+			file_seek = p.size;
+		}
+	}
+
+	if (make_newfile)
+	{
+		if (CHECKFLAG(fsrpc->flags, TEE_FS_O_CREAT))
+		{
+			debug("tee_fs_open create new file: %s", filename);
+			strcpy(p.name, filename);
+			p.index = 0;
+			p.size = fsrpc->len;
+			p.used = 1;
+			p.flags = RK_FS_R | RK_FS_W;
+			ret = rkss_write_empty_ptable(&p);
+			if (ret < 0)
+			{
+				printf("tee_fs_open : error. %s", filename);
+				return -1;
+			}
+			fsrpc->fd = ret;
+			file_seek = 0;
+		}
+		else
+		{
+			debug("and no create flag found.");
+			return -1;
+		}
+	}
+
+	debug("tee_fs_open ! %s , fd:%d, flag: %x, len: %d",
+			filename, fsrpc->fd, fsrpc->flags, fsrpc->len);
+
+	return fsrpc->fd;
+}
+
+static int tee_fs_close(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_close !");
+	UNREFERENCED_PARAMETER(fsrpc);
+	return 0;
+}
+
+static int tee_fs_read(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_read! fd:%d, len:%d", fsrpc->fd, fsrpc->len);
+	void *data = (void *)(fsrpc + 1);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("unavailable fd !");
+		return -1;
+	}
+
+	if (file_seek != 0)
+	{
+		printf("warning !!! file_seek != 0. unsupported now.");
+	}
+
+	int num = fsrpc->len / RKSS_DATA_LEN + 1;
+	int left = fsrpc->len > p.size ? p.size : fsrpc->len;
+	int di = 0;
+	debug("reading section[%d], fd:%d, len:%d, filesize:%d",
+			p.index, fsrpc->fd, fsrpc->len, p.size);
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = p.index + i;
+		ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("unavailable file index %lu!", rkss.index);
+			return -1;
+		}
+
+		int read = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+		memcpy(data + di, rkss.data, read);
+#ifdef DEBUG_RKFSS
+		rkss_dump(data + di, read);
+#endif
+		di += read;
+		left -= read;
+	}
+	return di;
+}
+
+static int tee_fs_write(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_write ! fd:%d, lenth:%d",fsrpc->fd, fsrpc->len);
+	void *data = (void *)(fsrpc + 1);
+
+	if (fsrpc->fd < 0)
+	{
+		printf("tee_fs_write error ! wrong fd : %d",fsrpc->fd);
+		return -1;
+	}
+
+	if (file_seek != 0)
+	{
+		printf("warning !!! file_seek != 0. unsupported now.");
+	}
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_write: fd unvailable!");
+		return -1;
+	}
+
+	p.size = fsrpc->len;
+	int num = fsrpc->len / RKSS_DATA_LEN + 1;
+	p.index = rkss_get_empty_section_from_usedflags(num);
+	debug("Get Empty section in %d", p.index);
+	p.used = 1;
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		ret = rkss_incref_usedflags_section(p.index + i);
+		if (ret < 0)
+		{
+			printf("rkss_incref_usedflags_section error !");
+			return -1;
+		}
+	}
+
+	ret = rkss_write_back_ptable(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_write: write ptable error!");
+		return -1;
+	}
+
+	int left = p.size;
+	int lastw = 0;
+	for (i = 0; i < num; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = p.index + i;
+		int ws = left > RKSS_DATA_LEN ? RKSS_DATA_LEN : left;
+		memcpy(rkss.data, (char *)data + lastw, ws);
+		lastw += ws;
+		left -= RKSS_DATA_LEN;
+		left = left < 0 ? 0 : left;
+		debug("writing: fd:%d, section[%lu], size:%d", fsrpc->fd, rkss.index, ws);
+#ifdef DEBUG_RKFSS
+		rkss_dump(rkss.data, ws);
+#endif
+		ret = rkss_write_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_write_section: write error!");
+			return -1;
+		}
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_usedflags();
+#endif
+	return fsrpc->len;
+}
+
+static int tee_fs_seek(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_seek ! fd:%d, seek:%d, flag:%x", fsrpc->fd, fsrpc->arg, fsrpc->flags);
+
+	if (fsrpc->flags == TEE_FS_SEEK_CUR)
+	{
+		fsrpc->res = file_seek + fsrpc->arg;
+	}
+	else if (fsrpc->flags == TEE_FS_SEEK_SET)
+	{
+		file_seek = fsrpc->arg;
+		fsrpc->res = file_seek;
+	}
+	else if (fsrpc->flags == TEE_FS_SEEK_END)
+	{
+		struct rkss_file_info p = {0};
+		int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+		if (ret < 0)
+		{
+			printf("unavilable fd.");
+			return -1;
+		}
+		file_seek = p.size + fsrpc->arg;
+		fsrpc->res = file_seek;
+	}
+	else
+	{
+		printf("tee_fs_seek: unsupport seed mode.");
+		return -1;
+	}
+
+	return fsrpc->res;
+}
+
+static int tee_fs_unlink(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_unlink : no such file. %s", filename);
+		return 0;
+	}
+	int fd = ret;
+
+	debug("tee_fs_unlink ! %s fd:%d index:%d size:%d", filename, fd, p.index, p.size);
+
+	/* decrease ref from usedflags */
+	int num = p.size / RKSS_DATA_LEN + 1;
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		ret = rkss_decref_usedflags_section(p.index + i);
+		if (ret < 0)
+		{
+			printf("rkss_decref_usedflags_section error !");
+			return -1;
+		}
+	}
+
+	/* rm from ptable */
+	memset(&p, 0, sizeof(struct rkss_file_info));
+	ret = rkss_write_back_ptable(fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_unlink : write back error %d", ret);
+		return -1;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+#endif
+
+	return 0;
+}
+
+static int tee_fs_link(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+	size_t offset_new_fn = strlen(filename) + 1;
+	char *newfilename = filename + offset_new_fn;
+	debug("tee_fs_link ! %s -> %s", filename, newfilename);
+
+	struct rkss_file_info p_old = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p_old);
+	if (ret < 0)
+	{
+		printf("cannot find src file %s.", filename);
+		return -1;
+	}
+
+	struct rkss_file_info p_check = {0};
+	ret = rkss_get_fileinfo_by_name(newfilename, &p_check);
+	if (!ret)
+	{
+		printf("file exist ! %s.", newfilename);
+		return -1;
+	}
+
+	struct rkss_file_info p_new = {0};
+	memcpy(&p_new, &p_old, sizeof(struct rkss_file_info));
+	strcpy(p_new.name, newfilename);
+	ret = rkss_write_empty_ptable(&p_new);
+	if (ret < 0)
+	{
+		printf("tee_fs_open : error. %s", filename);
+		return -1;
+	}
+
+	int num = p_new.size / RKSS_DATA_LEN + 1;
+	int i = 0;
+	for (i = 0; i < num; i++)
+	{
+		ret = rkss_incref_usedflags_section(p_new.index + i);
+		if (ret < 0)
+		{
+			printf("rkss_incref_usedflags_section error !");
+			return -1;
+		}
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+#endif
+
+	return 0;
+}
+
+static int tee_fs_rename(struct tee_fs_rpc *fsrpc)
+{
+	char *filenames = (char *)(fsrpc + 1);
+	char *newnames = filenames + strlen(filenames) + 1;
+	debug("rename: %s -> %s", filenames, newnames);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filenames, &p);
+	if (ret < 0)
+	{
+		printf("filename no found .");
+		return -1;
+	}
+
+	strcpy(p.name, newnames);
+
+	ret = rkss_write_back_ptable(ret, &p);
+	if (ret < 0)
+	{
+		printf("write ptable error!");
+		return -1;
+	}
+
+	return 0;
+}
+
+static int tee_fs_truncate(struct tee_fs_rpc *fsrpc)
+{
+	debug("tee_fs_truncate: fd:%d, lenth:%d", fsrpc->fd, fsrpc->arg);
+	if (fsrpc->fd < 0)
+	{
+		printf("tee_fs_truncate: fd unavilable !");
+		return -1;
+	}
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_index(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("fd unvailable!");
+		return -1;
+	}
+
+	p.size = fsrpc->arg;
+	ret = rkss_write_back_ptable(fsrpc->fd, &p);
+	if (ret < 0)
+	{
+		printf("tee_fs_write: write ptable error!");
+		return -1;
+	}
+	return 0;
+}
+
+static int tee_fs_mkdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	UNREFERENCED_PARAMETER(dirname);
+	debug("tee_fs_mkdir: %s",dirname);
+	return 0;
+}
+
+static int tee_fs_opendir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	dir_seek = 0;
+	int ret = rkss_get_dirs_by_name(dirname);
+	if (ret < 0)
+	{
+		printf("tee_fs_opendir: error");
+	}
+	debug("tee_fs_opendir: %s, seek/num:%d/%d", dirname, dir_seek, dir_num);
+	return 0;
+}
+
+static int tee_fs_closedir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	UNREFERENCED_PARAMETER(dirname);
+	debug("tee_fs_closedir: %s", dirname);
+	dir_seek = 0;
+	dir_num = 0;
+	return 0;
+}
+
+static int tee_fs_readdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	printf("seek/num:%d/%d",dir_seek, dir_num);
+	if (dir_seek == dir_num)
+	{
+		dirname = NULL;
+		fsrpc->len = 0;
+		printf("tee_fs_readdir: END");
+		return -1;
+	}
+
+	strcpy(dirname, dir_cache[dir_seek]);
+	fsrpc->len = strlen(dir_cache[dir_seek]) + 1;
+	++dir_seek;
+
+	debug("tee_fs_readdir: %s", dirname);
+	return 0;
+}
+
+static int tee_fs_rmdir(struct tee_fs_rpc *fsrpc)
+{
+	char *dirname = (char *)(fsrpc + 1);
+	debug("tee_fs_rmdir: %s", dirname);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(dirname, &p);
+	if (ret == -100)
+	{
+		printf("dir is not empty.");
+		return -1;
+	}
+	else if (ret >= 0)
+	{
+		printf("%s is not a dir.", p.name);
+		return -1;
+	}
+	debug("rmdir success.");
+	return 0;
+}
+
+static int tee_fs_access(struct tee_fs_rpc *fsrpc)
+{
+	char *filename = (char *)(fsrpc + 1);
+	debug("tee_fs_access: name:%s,flag:%x",filename,fsrpc->flags);
+
+	struct rkss_file_info p = {0};
+	int ret = rkss_get_fileinfo_by_name(filename, &p);
+	if (ret < 0 && ret != -100)
+	{
+		debug("tee_fs_access: %s no such file or directory.", filename);
+		return -1;
+	}
+
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_R_OK))
+	{
+		if (!CHECKFLAG(p.flags, RK_FS_R))
+		{
+			printf("tee_fs_access: no permission FS_R_OK in %x.", p.flags);
+			return -1;
+		}
+	}
+
+	if (CHECKFLAG(fsrpc->flags, TEE_FS_W_OK))
+	{
+		if (!CHECKFLAG(p.flags, RK_FS_W))
+		{
+			printf("tee_fs_access: no permission FS_W_OK in %x.", p.flags);
+			return -1;
+		}
+	}
+	return 0;
+}
+
+int tee_supp_rk_fs_init(void)
+{
+	assert(sizeof(struct rkss_file_info) == 126);
+	assert(512 / sizeof(struct rkss_file_info) == RKSS_EACH_FILEFOLDER_COUNT);
+
+	int i = 0;
+#ifdef DEBUG_CLEAN_RKSS // clean secure storage
+	for (i = 0; i < RKSS_DATA_SECTION_COUNT; i++)
+	{
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		rkss_write_section(&rkss);
+		printf("cleaned [%d]", i);
+	}
+#endif
+
+	// Verify Partition Table
+	for (i = 0; i < RKSS_PARTITION_TABLE_COUNT; i++)
+	{
+		//DMSG("rkss_get_fileinfo_by_name: reading %d",i);
+		struct rk_secure_storage rkss = {0};
+		rkss.index = i;
+		int ret = rkss_read_section(&rkss);
+		if (ret < 0)
+		{
+			printf("rkss_read_section fail ! ret: %d.", ret);
+			return -1;
+		}
+		if (rkss_verify_ptable(&rkss) < 0)
+		{
+			printf("rkss_verify_ptable fail !");
+			return -1;
+		}
+	}
+
+	// Verify Usedflags Section
+	struct rk_secure_storage rkss = {0};
+	rkss.index = RKSS_USEDFLAGS_INDEX;
+	int ret = rkss_read_section(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_read_section fail ! ret: %d.", ret);
+		return -1;
+	}
+	ret = rkss_verify_usedflags(&rkss);
+	if (ret < 0)
+	{
+		printf("rkss_verify_usedflags fail ! ret: %d.", ret);
+		return -1;
+	}
+
+#ifdef DEBUG_RKFSS
+	rkss_dump_ptable();
+	rkss_dump_usedflags();
+#endif
+
+	return 0;
+}
+void OpteeClientRkFsInit(void)
+{
+	debug(" OpteeClientRkFsInit\n");
+	tee_supp_rk_fs_init();
+}
+
+static int rkss_step = 0;
+int tee_supp_rk_fs_process(void *cmd, size_t cmd_size)
+{
+	struct tee_fs_rpc *fsrpc = cmd;
+	int ret = -1;
+
+	if (cmd_size < sizeof(struct tee_fs_rpc))
+	{
+		printf(">>>cmd_size < sizeof(struct tee_fs_rpc) !");
+		return ret;
+	}
+
+	if (cmd == NULL)
+	{
+		printf(">>>cmd == NULL !");
+		return ret;
+	}
+
+	switch (fsrpc->op) {
+	case TEE_FS_OPEN:
+		debug(">>>>>>> [%d] TEE_FS_OPEN !", rkss_step++);
+		ret = tee_fs_open(fsrpc);
+		break;
+	case TEE_FS_CLOSE:
+		debug(">>>>>>> [%d] TEE_FS_CLOSE !", rkss_step++);
+		ret = tee_fs_close(fsrpc);
+		break;
+	case TEE_FS_READ:
+		debug(">>>>>>> [%d] TEE_FS_READ !", rkss_step++);
+		ret = tee_fs_read(fsrpc);
+		break;
+	case TEE_FS_WRITE:
+		debug(">>>>>>> [%d] TEE_FS_WRITE !", rkss_step++);
+		ret = tee_fs_write(fsrpc);
+		break;
+	case TEE_FS_SEEK:
+		debug(">>>>>>> [%d] TEE_FS_SEEK !", rkss_step++);
+		ret = tee_fs_seek(fsrpc);
+		break;
+	case TEE_FS_UNLINK:
+		debug(">>>>>>> [%d] TEE_FS_UNLINK !", rkss_step++);
+		ret = tee_fs_unlink(fsrpc);
+		break;
+	case TEE_FS_RENAME:
+		debug(">>>>>>> [%d] TEE_FS_RENAME !", rkss_step++);
+		ret = tee_fs_rename(fsrpc);
+		break;
+	case TEE_FS_TRUNC:
+		debug(">>>>>>> [%d] TEE_FS_TRUNC !", rkss_step++);
+		ret = tee_fs_truncate(fsrpc);
+		break;
+	case TEE_FS_MKDIR:
+		debug(">>>>>>> [%d] TEE_FS_MKDIR !", rkss_step++);
+		ret = tee_fs_mkdir(fsrpc);
+		debug(">>>>>>> ret = [%d]  !", ret);
+		break;
+	case TEE_FS_OPENDIR:
+		debug(">>>>>>> [%d] TEE_FS_OPENDIR !", rkss_step++);
+		ret = tee_fs_opendir(fsrpc);
+		break;
+	case TEE_FS_CLOSEDIR:
+		debug(">>>>>>> [%d] TEE_FS_CLOSEDIR !", rkss_step++);
+		ret = tee_fs_closedir(fsrpc);
+		break;
+	case TEE_FS_READDIR:
+		debug(">>>>>>> [%d] TEE_FS_READDIR !", rkss_step++);
+		ret = tee_fs_readdir(fsrpc);
+		break;
+	case TEE_FS_RMDIR:
+		debug(">>>>>>> [%d] TEE_FS_RMDIR !", rkss_step++);
+		ret = tee_fs_rmdir(fsrpc);
+		break;
+	case TEE_FS_ACCESS:
+		debug(">>>>>>> [%d] TEE_FS_ACCESS !", rkss_step++);
+		ret = tee_fs_access(fsrpc);
+		break;
+	case TEE_FS_LINK:
+		debug(">>>>>>> [%d] TEE_FS_LINK !", rkss_step++);
+		ret = tee_fs_link(fsrpc);
+		break;
+	default:
+		printf(">>>>> DEFAULT !! %d",fsrpc->op);
+		break;
+	}
+
+	fsrpc->res = ret;
+	debug(">>>>>>> fsrpc->res = [%d]	!", fsrpc->res);
+
+	return ret;
+}
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
index b3df5d6f7f..8e2aaffb34 100644
--- a/lib/optee_clientApi/OpteeClientSMC.c
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -9,6 +9,8 @@
 #include <optee_include/OpteeClientSMC.h>
 #include <optee_include/OpteeClientRPC.h>
 #include <optee_include/teesmc.h>
+#include <optee_include/teesmc_v2.h>
+
 
 #define TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES \
 	(TEESMC_ATTR_CACHE_DEFAULT << TEESMC_ATTR_CACHE_SHIFT);
@@ -19,6 +21,19 @@ static void GetTeeSmc32Params(t_teesmc32_param *TeeSmc32Param,
 	TEEC_Operation *operation);
 static TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg);
 
+void tee_uuid_to_octets(uint8_t *d, const TEEC_UUID *s)
+{
+	d[0] = s->timeLow >> 24;
+	d[1] = s->timeLow >> 16;
+	d[2] = s->timeLow >> 8;
+	d[3] = s->timeLow;
+	d[4] = s->timeMid >> 8;
+	d[5] = s->timeMid;
+	d[6] = s->timeHiAndVersion >> 8;
+	d[7] = s->timeHiAndVersion;
+	memcpy(d + 8, s->clockSeqAndNode, sizeof(s->clockSeqAndNode));
+}
+
 /*
  * This function opens a new Session between the Client application and the
  * specified TEE application.
@@ -38,8 +53,16 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 
 	t_teesmc32_arg *TeeSmc32Arg = NULL;
 	t_teesmc32_param *TeeSmc32Param = NULL;
+
 	t_teesmc_meta_open_session *TeeSmcMetaSession = NULL;
-	static const uint32_t MetaNum = 1;
+
+#ifdef CONFIG_OPTEE_V1
+	uint32_t MetaNum = 1;
+#endif
+
+#ifdef CONFIG_OPTEE_V2
+	uint32_t MetaNum = 2;
+#endif
 
 	*error_origin = TEEC_ORIGIN_API;
 
@@ -77,18 +100,34 @@ TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
 		sizeof(TeeSmcMetaSession->uuid));
 	TeeSmcMetaSession->clnt_login = TEEC_LOGIN_PUBLIC;
 
-	TeeSmc32Param[0].u.memref.buf_ptr = (uint32_t) TeeSmcMetaSession;
+	TeeSmc32Param[0].u.memref.buf_ptr = (uint32_t) (size_t)TeeSmcMetaSession;
 	TeeSmc32Param[0].u.memref.size = sizeof(*TeeSmcMetaSession);
 
-#ifdef CONFIG_ROCKCHIP_RK3328
+#ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ARM64
 	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
 				TEESMC_ATTR_META              |
 				TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-#endif
-
-#ifdef CONFIG_ROCKCHIP_RK322X
+#else
 	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
 				TEESMC_ATTR_META;
+#endif
+#endif
+
+#ifdef CONFIG_OPTEE_V2
+#ifdef CONFIG_ARM64
+	uint8_t * session_uuid = (uint8_t *)&TeeSmcMetaSession->uuid;
+	tee_uuid_to_octets(session_uuid, destination);
+	memcpy((void *)&TeeSmc32Param[0].u.value, &TeeSmcMetaSession->uuid, sizeof(TeeSmcMetaSession->uuid));
+	TeeSmc32Param[1].u.value.c = TeeSmcMetaSession->clnt_login;
+
+	TeeSmc32Param[0].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
+				OPTEE_MSG_ATTR_META_V2;
+	TeeSmc32Param[1].attr = OPTEE_MSG_ATTR_TYPE_VALUE_INPUT_V2 |
+				OPTEE_MSG_ATTR_META_V2;
+#else
+	printf("Not support! All rockchips use optee v2.5 are 64 bits! \n");
+#endif
 #endif
 
 	SetTeeSmc32Params(operation, TeeSmc32Param + MetaNum);
@@ -128,6 +167,7 @@ TEEC_Result TEEC_SMC_CloseSession(TEEC_Session *session,
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	uint32_t TeeSmc32ArgLength;
+
 	t_teesmc32_arg *TeeSmc32Arg = NULL;
 
 	*error_origin = TEEC_ORIGIN_API;
@@ -174,6 +214,7 @@ TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
 {
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	uint32_t TeeSmc32ArgLength;
+
 	t_teesmc32_arg *TeeSmc32Arg = NULL;
 	t_teesmc32_param *TeeSmc32Param = NULL;
 
@@ -255,16 +296,28 @@ void SetTeeSmc32Params(TEEC_Operation *operation,
 		if (attr == TEEC_MEMREF_TEMP_INPUT ||
 			attr == TEEC_MEMREF_TEMP_OUTPUT ||
 			attr == TEEC_MEMREF_TEMP_INOUT) {
-#ifdef CONFIG_ROCKCHIP_RK3328
+
+#ifdef CONFIG_OPTEE_V1
+#ifdef CONFIG_ARM64
 			attr |= TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
-			debug(" 3328 attr %x\n", attr);
+			debug(" OPTEE_OS_V1 ARCH64 attr %x\n", attr);
+#else
+			debug(" OPTEE_OS_V1 ARCH32 attr %x\n", attr);
+#endif
 #endif
-#ifdef CONFIG_ROCKCHIP_RK322X
-			debug(" 322X attr %x\n", attr);
+
+#ifdef CONFIG_OPTEE_V2
+#ifdef CONFIG_ARM64
+			attr += (OPTEE_MSG_ATTR_TYPE_TMEM_INPUT_V2 - TEEC_MEMREF_TEMP_INPUT);
+			debug(" OPTEE_OS_V2 ARCH64 attr %x\n", attr);
+#else
+			printf("Not support! All rockchips use optee v2 are 64 bits! \n");
 #endif
+#endif
+
 			TeeSmc32Param[ParamCount].attr = attr;
 			TeeSmc32Param[ParamCount].u.memref.buf_ptr =
-			(uint32_t)operation->params[ParamCount].tmpref.buffer;
+			(uint32_t)(size_t)operation->params[ParamCount].tmpref.buffer;
 			TeeSmc32Param[ParamCount].u.memref.size =
 				operation->params[ParamCount].tmpref.size;
 		} else {
@@ -310,12 +363,21 @@ TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
 	TEEC_Result TeecResult = TEEC_SUCCESS;
 	ARM_SMC_ARGS ArmSmcArgs = {0};
 
+#ifdef CONFIG_OPTEE_V1
 	ArmSmcArgs.Arg0 = TEESMC32_CALL_WITH_ARG;
-	ArmSmcArgs.Arg1 = (uint32_t) TeeSmc32Arg;
+	ArmSmcArgs.Arg1 = (uint32_t) (size_t)TeeSmc32Arg;
+#endif
+
+#ifdef CONFIG_OPTEE_V2
+	ArmSmcArgs.Arg0 = OPTEE_SMC_CALL_WITH_ARG_V2;
+	ArmSmcArgs.Arg1 = 0;
+	ArmSmcArgs.Arg2 = (uint32_t) (size_t)TeeSmc32Arg;
+#endif
 
 	while (1) {
 		tee_smc_call(&ArmSmcArgs);
-
+		debug("arg0=0x%x arg1=0x%x arg2=0x%x arg3=0x%x",
+			ArmSmcArgs.Arg0, ArmSmcArgs.Arg1, ArmSmcArgs.Arg2, ArmSmcArgs.Arg3);
 		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
 			(void) OpteeRpcCallback(&ArmSmcArgs);
 		} else if (ArmSmcArgs.Arg0 == TEESMC_RETURN_UNKNOWN_FUNCTION) {

commit b5cc267faa4430f73ad29249da3ba58bf28b8d17
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Feb 23 19:52:36 2018 +0800

    rk322x: enable OPTEE_V1 macro
    
    rk322x can store data to secure storage.
    
    Change-Id: Idc1a33d7a86f08690ad77ae37f0cd706fd19cfa6
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index eebe63131d..2e7b0a6726 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -20,6 +20,14 @@ config SYS_MALLOC_F_LEN
 config SPL_SERIAL_SUPPORT
 	default y
 
+config OPTEE_V1
+	bool "Support OPTEE version 1.0"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
+
 source "board/rockchip/evb_rk3229/Kconfig"
 source "board/rockchip/gva_rk3229/Kconfig"
 
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 302c44efa8..13e46d9e0b 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -84,3 +84,4 @@ CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index d54c2028db..26e9c9bfee 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -82,5 +82,6 @@ CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
 CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
+CONFIG_OPTEE_V1=y
 CONFIG_ANDROID_AB=y
 CONFIG_ANDROID_AVB=y

commit 29fae127338dd8be2b0385630d5062321ad61284
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 21 16:39:08 2018 +0800

    configs: evb-px30: enable boot android
    
    Change-Id: I8889563810e57e8c18a379590bd4b829995321c0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 71918dd332..e47b2b75c5 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -8,17 +8,19 @@ CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
-# CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set

commit 6d82ce07fae4196b491828596bea783d7b24762c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 22 15:07:04 2018 +0800

    include: key.h: clean up
    
    Change-Id: Id5cec38070c09494643bad2244d14633b93d4d0f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index fcbd4274d5..911804dd08 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,6 +7,8 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
+#include <linux/input.h>
+
 #define KEY_LONG_DOWN_MS	2000
 
 enum key_state {
@@ -18,10 +20,8 @@ enum key_state {
 };
 
 struct dm_key_ops {
-	int type;
 	const char *name;
 	int (*read)(struct udevice *dev, int code);
-	int (*exist)(struct udevice *dev, int code);
 };
 
 struct input_key {

commit 366bd23fdb489a47acc848deb962c56f8cdbdd52
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 21 16:37:51 2018 +0800

    make.sh: make assign output directory cmd as an option
    
    default use current directory as output dir, you can also
    assign output dir by command "O=[directory]".
    
    Example:
            ./make.sh evb-px30 O=rockdev
    
    Change-Id: I1a7efb7a273d147d81b7fa9bb0bbbe00a8f5d12e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 47bd096f50..5a7b1d8c2e 100755
--- a/make.sh
+++ b/make.sh
@@ -3,10 +3,13 @@ set -e
 BOARD=$1
 SUBCMD=$2
 RKCHIP=${BOARD##*-}
-DSTDIR=rockdev/${RKCHIP}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 
+# Declare global default output dir and cmd, update in prepare()
+OUTDIR=.
+OUTOPT=
+
 # Declare global rkbin tools and rkbin Responsity path, updated in prepare()
 TOOLCHAIN_RKBIN=./
 RKBIN=./
@@ -27,7 +30,7 @@ OBJ_ARM64=aarch64-linux-gnu-objdump
 
 prepare()
 {
-	local absolute_path
+	local absolute_path cmd
 
 	# Check invaid args and help
 	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
@@ -57,11 +60,11 @@ prepare()
 		exit 1
 	fi
 
-	# Clean! We assume that ./u-boot.map, u-boot.cfg or u-boot.lds indicates U-Boot project is not clean,
-	# maybe git checkout from rkdevelop.
-	if [ -f ./u-boot.map -o -f ./u-boot.cfg -o -f ./u-boot.lds ]; then
-		make mrproper
-		echo "auto \"make mrproper\" done..."
+	# Assign output directory
+	cmd=${SUBCMD%=*}
+	if [ "${cmd}" = 'O' ]; then
+		OUTDIR=${SUBCMD#*=}
+		OUTOPT=O=${OUTDIR}
 	fi
 }
 
@@ -69,13 +72,13 @@ select_toolchain()
 {
 	local absolute_path
 
-	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
 		if [ -d ${TOOLCHAIN_ARM64} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
 		else
-			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			echo "Can't find toolchain: ${TOOLCHAIN_ARM64}"
 			exit 1
 		fi
 	else
@@ -84,7 +87,7 @@ select_toolchain()
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
 			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
 		else
-			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			echo "Can't find toolchain: ${TOOLCHAIN_ARM32}"
 			exit 1
 		fi
 	fi
@@ -96,13 +99,9 @@ sub_commands()
 {
 	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
 
-	# Make clean, distclean and mrproper
-	if [ "$SUBCMD" = 'clean' -o "$SUBCMD" = 'distclean' -o "$SUBCMD" = 'mrproper' ]; then
-		make $SUBCMD O=${DSTDIR}/out
-		exit 0
-	elif [ "$elf" = 'elf' ]; then
-		if [ ! -f ${DSTDIR}/out/u-boot ]; then
-			echo "Can't find elf file: ${DSTDIR}/out/u-boot"
+	if [ "$elf" = 'elf' ]; then
+		if [ ! -f ${OUTDIR}/u-boot ]; then
+			echo "Can't find elf file: ${OUTDIR}/u-boot"
 			exit 1
 		else
 			# default 'elf' without option, use '-D'
@@ -110,23 +109,7 @@ sub_commands()
 				opt=D
 			fi
 
-			${TOOLCHAIN_OBJDUMP} -${opt} ${DSTDIR}/out/u-boot | less
-			exit 0
-		fi
-	elif [ "$SUBCMD" = 'map' ]; then
-		if [ ! -f ${DSTDIR}/out/System.map ]; then
-			echo "Can't find map file: ${DSTDIR}/out/System.map"
-			exit 1
-		else
-			vim ${DSTDIR}/out/System.map
-			exit 0
-		fi
-	elif [ "$SUBCMD" = '.config' ]; then
-		if [ ! -f ${DSTDIR}/out/.config ]; then
-			echo "Can't find .config file: ${DSTDIR}/out/.config"
-			exit 1
-		else
-			vim ${DSTDIR}/out/.config
+			${TOOLCHAIN_OBJDUMP} -${opt} ${OUTDIR}/u-boot | less
 			exit 0
 		fi
 	fi
@@ -145,9 +128,9 @@ pack_uboot_image()
 {
 	local UBOOT_LOAD_ADDR
 
-	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
-	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
-	echo "pack uboot okay! Input: ${DSTDIR}/out/u-boot.bin"
+	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
+	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${OUTDIR}/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	echo "pack uboot okay! Input: ${OUTDIR}/u-boot.bin"
 }
 
 pack_loader_image()
@@ -169,7 +152,7 @@ pack_trust_image()
 	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
 
 	# ARM64 uses trust_merger
-	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+	if grep  -q '^CONFIG_ARM64=y' ${OUTDIR}/.config ; then
 		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
 			echo "pack trust failed! Can't find: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
 			return
@@ -188,7 +171,7 @@ pack_trust_image()
 		fi
 
 		# OP-TEE is 132M(0x8400000) offset from DRAM base.
-		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${OUTDIR}/include/autoconf.mk|tr -d '\r'`
 		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
 
 		# Convert Dec to Hex
@@ -223,10 +206,10 @@ pack_trust_image()
 
 prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
-make ${BOARD}_defconfig O=${DSTDIR}/out
+make ${BOARD}_defconfig ${OUTOPT}
 select_toolchain
 sub_commands
-make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
+make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} ${OUTOPT}
 fixup_chip_name
 pack_uboot_image
 pack_loader_image

commit 5f048e57a3bb755673988cf2bfc62e38b9060a4d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 21 17:40:57 2018 +0800

    rockchip: smccc: add more interfaces support
    
    These interfaces are moved from kernel 4.4:
    ./drivers/firmware/rockchip_sip.c
    
    Only those maybe used in U-Boot are moved.
    
    Change-Id: I5896606c992056199f116692cca3c6d9530fd2f9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
index 7a2b0a7420..01007363b3 100644
--- a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -7,10 +7,65 @@
 #ifndef __ROCKCHIP_SMCCC_H__
 #define __ROCKCHIP_SMCCC_H__
 
+/* Rockchip platform SiP call ID */
+#define SIP_ATF_VERSION			0x82000001
+#define SIP_ACCESS_REG			0x82000002
+#define SIP_SUSPEND_MODE		0x82000003
+#define SIP_PENDING_CPUS		0x82000004
+#define SIP_UARTDBG_CFG			0x82000005
+#define SIP_UARTDBG_CFG64		0xc2000005
+#define SIP_MCU_EL3FIQ_CFG		0x82000006
+#define SIP_ACCESS_CHIP_STATE64		0xc2000006
+#define SIP_SECURE_MEM_CONFIG		0x82000007
+#define SIP_ACCESS_CHIP_EXTRA_STATE64	0xc2000007
+#define SIP_DRAM_CONFIG			0x82000008
+#define SIP_SHARE_MEM			0x82000009
+#define SIP_SIP_VERSION			0x8200000a
+#define SIP_REMOTECTL_CFG		0x8200000b
+#define PSCI_SIP_VPU_RESET		0x8200000c
+
+/* Rockchip Sip version */
+#define SIP_IMPLEMENT_V1                (1)
+#define SIP_IMPLEMENT_V2                (2)
+
+/* Error return code */
+#define IS_SIP_ERROR(x)			(!!(x))
+
+#define SIP_RET_SUCCESS			0
+#define SIP_RET_SMC_UNKNOWN		-1
+#define SIP_RET_NOT_SUPPORTED		-2
+#define SIP_RET_INVALID_PARAMS		-3
+#define SIP_RET_INVALID_ADDRESS		-4
+#define SIP_RET_DENIED			-5
+
+/* SIP_ACCESS_REG: read or write */
+#define SECURE_REG_RD			0x0
+#define SECURE_REG_WR			0x1
+
+/* Share mem page types */
+typedef enum {
+	SHARE_PAGE_TYPE_INVALID = 0,
+	SHARE_PAGE_TYPE_UARTDBG,
+	SHARE_PAGE_TYPE_DDR,
+	SHARE_PAGE_TYPE_MAX,
+} share_page_type_t;
+
 /* Stand PSCI system suspend */
 int psci_system_suspend(unsigned long unused);
 
+/* Rockchip SMC Calls */
 int sip_smc_set_suspend_mode(unsigned long ctrl,
 			     unsigned long config1,
 			     unsigned long config2);
+
+struct arm_smccc_res sip_smc_dram(unsigned long arg0,
+				  unsigned long arg1,
+				  unsigned long arg2);
+
+struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
+					       share_page_type_t page_type);
+
+int sip_smc_set_sip_version(unsigned long version);
+struct arm_smccc_res sip_smc_get_sip_version(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
index ea56758e0d..3eed441181 100644
--- a/arch/arm/mach-rockchip/rockchip_smccc.c
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -9,6 +9,7 @@
 #include <asm/psci.h>
 #include <asm/suspend.h>
 #include <linux/arm-smccc.h>
+#include <linux/io.h>
 
 #ifdef CONFIG_ARM64
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND
@@ -16,8 +17,7 @@
 #define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN_SYSTEM_SUSPEND
 #endif
 
-/* Rockchip platform SiP call ID */
-#define SIP_SUSPEND_MODE		0x82000003
+#define SIZE_PAGE(n)	((n) << 12)
 
 static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
 						unsigned long arg0,
@@ -48,3 +48,52 @@ int sip_smc_set_suspend_mode(unsigned long ctrl,
 	res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, ctrl, config1, config2);
 	return res.a0;
 }
+
+struct arm_smccc_res sip_smc_dram(unsigned long arg0,
+				  unsigned long arg1,
+				  unsigned long arg2)
+{
+	return __invoke_sip_fn_smc(SIP_DRAM_CONFIG, arg0, arg1, arg2);
+}
+
+struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num,
+					       share_page_type_t page_type)
+{
+	struct arm_smccc_res res;
+	unsigned long share_mem_phy;
+
+	res = __invoke_sip_fn_smc(SIP_SHARE_MEM, page_num, page_type, 0);
+	if (IS_SIP_ERROR(res.a0))
+		goto error;
+
+	share_mem_phy = res.a1;
+	res.a1 = (unsigned long)ioremap(share_mem_phy, SIZE_PAGE(page_num));
+
+error:
+	return res;
+}
+
+struct arm_smccc_res sip_smc_get_sip_version(void)
+{
+	return __invoke_sip_fn_smc(SIP_SIP_VERSION, 0, 0, 0);
+}
+
+/*
+ * OP-TEE works both for kernel 3.10 and 4.4, and these two kernels have
+ * different sip implement that 3.10 uses SIP_IMPLEMENT_V1 and 4.4 uses
+ * SIP_IMPLEMENT_V2. So we should tell OP-TEE the current rockchip sip
+ * version(default SIP_IMPLEMENT_V1) before use.
+ */
+int sip_smc_set_sip_version(unsigned long version)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_SIP_VERSION, version, SECURE_REG_WR, 0);
+	if (IS_SIP_ERROR(res.a0)) {
+		printf("%s: set rockchip sip version v%ld failed\n",
+		       __func__, version);
+		return res.a0;
+	}
+
+	return 0;
+}

commit eb2a5055adabace3ccc9bc96e201c28f15556dfe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 18:05:46 2018 +0800

    rockchip: boot_rkimg: do not read dtb again if we have do it
    
    We may read the dtb file before bootrkp command, we can use it directly.
    
    Change-Id: Iff6dcd037d9d3637f1be81f458140189c13b1977
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 1d582b8f58..582255d436 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -21,6 +21,7 @@
 
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
 #define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+DECLARE_GLOBAL_DATA_PTR;
 
 struct bootloader_message {
 	char command[32];
@@ -315,11 +316,14 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		ramdisk_size = 0;
 	}
 
-	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
-	if (fdt_size < 0) {
-		printf("%s fdt read error\n", __func__);
-		ret = -EINVAL;
-		goto out;
+	if (gd->fdt_blob != (void *)fdt_addr_r) {
+		fdt_size = rockchip_read_resource_file((void *)fdt_addr_r,
+						       DTB_FILE, 0, 0);
+		if (fdt_size < 0) {
+			printf("%s fdt read error\n", __func__);
+			ret = -EINVAL;
+			goto out;
+		}
 	}
 
 	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);

commit 530f7262cae0596029f978e16f627d756e9db810
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 18:05:09 2018 +0800

    rockchip: board: update logo reserve memory in late init
    
    Change-Id: I455b78b9abe0bc4d28dba1a0cd9971262c313365
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index b1521e88b5..6513069509 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -96,6 +96,7 @@ int board_late_init(void)
 
 #ifdef CONFIG_DRM_ROCKCHIP
 	rockchip_show_logo();
+	rockchip_display_fixup((void *)gd->fdt_blob);
 #endif
 
 	return rk_board_late_init();

commit 51619d03f1a6bc8c3d10cb880057caeadcf2f637
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 17:35:17 2018 +0800

    rockchip: display: enable rockchip_display_fixup()
    
    Enable and update the rockchip_display_fixup() so that we can update the
    logo reserve memory node for kernel dts.
    
    Change-Id: I34e3812689052a63ed58c61a41bca53798ffd666
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 1c05de3383..127390fb96 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -62,12 +62,10 @@ static void *get_display_buffer(int size)
 	return buf;
 }
 
-#if 0
 static unsigned long get_display_size(void)
 {
 	return memory_end - memory_start;
 }
-#endif
 
 static bool can_direct_logo(int bpp)
 {
@@ -935,7 +933,6 @@ static int rockchip_display_probe(struct udevice *dev)
 	return 0;
 }
 
-#if 0
 void rockchip_display_fixup(void *blob)
 {
 	const struct rockchip_connector_funcs *conn_funcs;
@@ -944,17 +941,16 @@ void rockchip_display_fixup(void *blob)
 	const struct rockchip_crtc *crtc;
 	struct display_state *s;
 	u32 offset;
-	int node;
-	char path[100];
-	int ret;
+	const struct device_node *np;
+	const char *path;
 
 	if (!get_display_size())
 		return;
 
-	node = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
+	offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
 					       (u64)memory_start,
 					       (u64)get_display_size());
-	if (node < 0) {
+	if (offset < 0) {
 		printf("failed to add drm-loader-logo memory\n");
 		return;
 	}
@@ -985,17 +981,14 @@ void rockchip_display_fixup(void *blob)
 		if (conn_funcs->fixup_dts)
 			conn_funcs->fixup_dts(s, blob);
 
-		ret = fdt_get_path(s->blob, s->node, path, sizeof(path));
-		if (ret < 0) {
-			printf("failed to get route path[%s], ret=%d\n",
-			       path, ret);
-			continue;
-		}
-
+		np = ofnode_to_np(s->node);
+		path = np->full_name;
+		fdt_increase_size(blob, 0x400);
 #define FDT_SET_U32(name, val) \
 		do_fixup_by_path_u32(blob, path, name, val, 1);
 
-		offset = s->logo.offset + s->logo.mem - memory_start;
+		offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
+			 - memory_start;
 		FDT_SET_U32("logo,offset", offset);
 		FDT_SET_U32("logo,width", s->logo.width);
 		FDT_SET_U32("logo,height", s->logo.height);
@@ -1008,7 +1001,6 @@ void rockchip_display_fixup(void *blob)
 #undef FDT_SET_U32
 	}
 }
-#endif
 
 int rockchip_display_bind(struct udevice *dev)
 {
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
index ce764c8e46..335b27ebcb 100644
--- a/include/video_rockchip.h
+++ b/include/video_rockchip.h
@@ -23,5 +23,6 @@
 
 void rockchip_show_bmp(const char *bmp);
 void rockchip_show_logo(void);
+void rockchip_display_fixup(void *blob);
 
 #endif

commit 3a39dbf87401c35ad6cba1709d3db5948b73aa0c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 17:34:07 2018 +0800

    fdt_support: add fdt_update_reserved_memory()
    
    Add API for rockchip pass uboot logo memory info to kernel.
    
    Change-Id: Ib3bfadc381efae21359a43654493e8e0f4e67dd0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 0e8e90481d..feb01d0b79 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -523,6 +523,36 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size)
 	return fdt_fixup_memory_banks(blob, &start, &size, 1);
 }
 
+int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size)
+{
+	int nodeoffset, len, err;
+	u8 tmp[16]; /* Up to 64-bit address + 64-bit size */
+
+#if 0
+	/*name is rockchip_logo*/
+	nodeoffset = fdt_find_or_add_subnode(blob, 0, "reserved-memory");
+	if (nodeoffset < 0)
+		return nodeoffset;
+	printf("hjc>>reserved-memory>>%s, nodeoffset:%d\n", __func__, nodeoffset);
+	nodeoffset = fdt_find_or_add_subnode(blob, nodeoffset, name);
+	if (nodeoffset < 0)
+		return nodeoffset;
+#else
+	nodeoffset = fdt_node_offset_by_compatible(blob, 0, name);
+	if (nodeoffset < 0)
+		debug("Can't find nodeoffset: %d\n", nodeoffset);
+#endif
+	len = fdt_pack_reg(blob, tmp, &start, &size, 1);
+	err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
+	if (err < 0) {
+		printf("WARNING: could not set %s %s.\n",
+				"reg", fdt_strerror(err));
+		return err;
+	}
+
+	return nodeoffset;
+}
+
 void fdt_fixup_ethernet(void *fdt)
 {
 	int i = 0, j, prop;
diff --git a/include/fdt_support.h b/include/fdt_support.h
index f00fadcddb..4f4b48ebb0 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -103,6 +103,8 @@ static inline int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[],
 }
 #endif
 
+int fdt_update_reserved_memory(void *blob, char *name, u64 start, u64 size);
+
 void fdt_fixup_ethernet(void *fdt);
 int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
 			 const void *val, int len, int create);

commit 3f251879bfd8a56b1ac30c8ef55d3abe5630612d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 22 16:44:14 2018 +0800

    boot_android: fix load address for boot image
    
    The kernel image follows the header(default 0x800) in boot.img, we need to fix
    the load address for boot.img so that kernel image can align to 0x80000 as
    required by ARM64 kernel booting.
    
    Change-Id: I526ff38bfce2d8fd1571aff817ade11086f196e3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 5df2e9b270..b7c1e4ea51 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -41,6 +41,11 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
+	/* ARM64 kernel load addr need to align to 0x80000, and android boot.img
+	 * have a 2KB header, need to reserve space for it.
+	 */
+	load_address &= ~0x7ffff;
+	load_address -= 0x800; /* default page size for boot header */
 	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
 	if (!dev_desc) {
 		printf("Could not get %s %s\n", argv[1], argv[2]);

commit 09e52837fcfb4e90d056e4e39dc54212a99c74be
Author: Yu YongZhen <yuyz@rock-chips.com>
Date:   Sun Feb 11 15:23:36 2018 +0800

    common: boot_rkimg: go on the boot flow even no ramdisk found
    
    in some case, we need persistent file system in NOR or NAND,
    such as squashfs, we need to boot system in flash.
    
    Change-Id: I46e4ae3e43f96f77f1ca6b4df8424fce19866226
    Signed-off-by: Yu YongZhen <yuyz@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 3c58fa14db..1d582b8f58 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -312,8 +312,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	if (ramdisk_size < 0) {
 		printf("%s ramdisk part %s read error\n", __func__,
 		       boot_part->name);
-		ret = -EINVAL;
-		goto out;
+		ramdisk_size = 0;
 	}
 
 	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);

commit 76ba1d8a713bc964fc8e0a639f90344c4c60f026
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:57:07 2018 +0800

    Makefile: enable -Werror option
    
    Enable warning treat as error cflags to avoid further compile warning.
    
    Change-Id: Ibfd959b4afa4724c4d6920985f21e55b959a0ed0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/Makefile b/Makefile
index a86fd4d544..a1b28de1ef 100644
--- a/Makefile
+++ b/Makefile
@@ -360,7 +360,7 @@ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
 KBUILD_CFLAGS   := -Wall -Wstrict-prototypes \
 		   -Wno-format-security \
 		   -fno-builtin -ffreestanding
-KBUILD_CFLAGS	+= -fshort-wchar
+KBUILD_CFLAGS	+= -fshort-wchar -Werror
 KBUILD_AFLAGS   := -D__ASSEMBLY__
 
 # Read UBOOTRELEASE from include/config/uboot.release (if it exists)

commit 440e24d771ee68dead5265c27a039f184c4241d6
Author: Simon Glass <sjg@chromium.org>
Date:   Thu Dec 28 13:14:15 2017 -0700

    UPSTREAM: dm: core: Add a function to look up a uclass by name
    
    Each uclass has a driver name which we can use to look up the uclass. This
    is useful for logging, where the uclass ID is used as the category.
    
    Add a function to handle this, as well as a test.
    
    Change-Id: Id221809d6f9f818b52a5bf88f4e12d409a070f05
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6e43d1b19982b1756b7c607569d1778e556d6577)

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 197ac1c0a8..480d202563 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -161,6 +161,20 @@ const char *uclass_get_name(enum uclass_id id)
 	return uc->uc_drv->name;
 }
 
+enum uclass_id uclass_get_by_name(const char *name)
+{
+	int i;
+
+	for (i = 0; i < UCLASS_COUNT; i++) {
+		struct uclass_driver *uc_drv = lists_uclass_lookup(i);
+
+		if (uc_drv && !strcmp(uc_drv->name, name))
+			return i;
+	}
+
+	return UCLASS_INVALID;
+}
+
 int uclass_find_device(enum uclass_id id, int index, struct udevice **devp)
 {
 	struct uclass *uc;
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index f6fe785583..d54683a106 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -127,6 +127,14 @@ int uclass_get(enum uclass_id key, struct uclass **ucp);
  */
 const char *uclass_get_name(enum uclass_id id);
 
+/**
+ * uclass_get_by_name() - Look up a uclass by its driver name
+ *
+ * @name: Name to look up
+ * @returns the associated uclass ID, or UCLASS_INVALID if not found
+ */
+enum uclass_id uclass_get_by_name(const char *name);
+
 /**
  * uclass_get_device() - Get a uclass device based on an ID and index
  *
diff --git a/test/dm/core.c b/test/dm/core.c
index 50ee41b9e2..052bf8fffb 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -862,3 +862,12 @@ static int dm_test_device_get_uclass_id(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_device_get_uclass_id, DM_TESTF_SCAN_PDATA);
+
+static int dm_test_uclass_names(struct unit_test_state *uts)
+{
+	ut_asserteq_str("test", uclass_get_name(UCLASS_TEST));
+	ut_asserteq(UCLASS_TEST, uclass_get_by_name("test"));
+
+	return 0;
+}
+DM_TEST(dm_test_uclass_names, DM_TESTF_SCAN_PDATA);

commit 18aa8da9a4c0ce30c89c0850a0670850890074ea
Author: Mario Six <mario.six@gdsys.cc>
Date:   Mon Jan 15 11:07:20 2018 +0100

    UPSTREAM: core: Make device_is_compatible live-tree compatible
    
    Judging from its name and parameters, device_is_compatible looks like it
    is compatible with a live device tree, but it actually isn't.
    
    Make it compatible with a live device tree.
    
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Change-Id: I892142d611ab5068d4ec6bdb51666a673b679794
    Signed-off-by: Mario Six <mario.six@gdsys.cc>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 29d11b8838bb2aa324b8873159cbd7088870a75b)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 00f8d7d13c..b15f602252 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -17,6 +17,7 @@
 #include <dm/device.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
+#include <dm/of_access.h>
 #include <dm/pinctrl.h>
 #include <dm/platdata.h>
 #include <dm/read.h>
@@ -712,8 +713,12 @@ int device_set_name(struct udevice *dev, const char *name)
 bool device_is_compatible(struct udevice *dev, const char *compat)
 {
 	const void *fdt = gd->fdt_blob;
+	ofnode node = dev_ofnode(dev);
 
-	return !fdt_node_check_compatible(fdt, dev_of_offset(dev), compat);
+	if (ofnode_is_np(node))
+		return of_device_is_compatible(ofnode_to_np(node), compat, NULL, NULL);
+	else
+		return !fdt_node_check_compatible(fdt, ofnode_to_offset(node), compat);
 }
 
 bool of_machine_is_compatible(const char *compat)

commit 822b9c09c16a6b2244ecd7f73e113c00db7584a8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 19:47:50 2018 +0800

    rockchip: phycore-rk3288: fix compile warning
    
    Change-Id: Iaa874efe1446b788e45415e8b70473b105014727
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index a81954e780..175c017a14 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -12,6 +12,7 @@
 #include <i2c_eeprom.h>
 #include <netdev.h>
 #include "som.h"
+#include <power/rk8xx_pmic.h>
 
 static int valid_rk3288_som(struct rk3288_som *som)
 {

commit 5034b89cfa2ae02e0c998a126cf14346ff4d156c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 18:12:39 2018 +0800

    serial: ns16550: fix compile warning
    
    Change-Id: I495b9eca5f54105270f9e2311ef29c9b296c0476
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 89843cedd7..490087c017 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -473,6 +473,7 @@ const struct dm_serial_ops ns16550_serial_ops = {
 	.setbrg = ns16550_serial_setbrg,
 };
 
+#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 /*
  * Please consider existing compatible strings before adding a new
@@ -495,8 +496,6 @@ static const struct udevice_id ns16550_serial_ids[] = {
 };
 #endif /* OF_CONTROL && !OF_PLATDATA */
 
-#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
-
 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
 U_BOOT_DRIVER(ns16550_serial) = {

commit 174b45448e334397fdadf104f3fe82d5e5158e4e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:45:35 2018 +0800

    fastboot: fix compile warning
    
    Change-Id: Ife064a098cbec3689790934eae86b4726f5f027d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 007cdc3b3f..d34475e579 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -776,7 +776,8 @@ static void tx_handler_ul(struct usb_ep *ep, struct usb_request *req)
 	if (!upload_bytes)
 		start_upload = true;
 
-	fastboot_tx_write((char *)(CONFIG_FASTBOOT_BUF_ADDR + upload_bytes),
+	fastboot_tx_write((char *)((phys_addr_t)CONFIG_FASTBOOT_BUF_ADDR + \
+			  upload_bytes),
 			  xfer_size);
 }
 

commit 6fff026f96cd04bd31536159d9e13ea40904fc0e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:45:11 2018 +0800

    rockchip: usb: dwc2: fix compile warning
    
    Change-Id: Ic0b190aa93378faf28147306d195fbc49c28c34d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index f995c350d2..687046151d 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -114,7 +114,8 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
 				(unsigned long) ep->dma_buf +
 				ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE));
 
-	writel((unsigned int) ep->dma_buf, &reg->out_endp[ep_num].doepdma);
+	writel((unsigned int)(unsigned long)ep->dma_buf,
+	       &reg->out_endp[ep_num].doepdma);
 	writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length),
 	       &reg->out_endp[ep_num].doeptsiz);
 	writel(DEPCTL_EPENA|DEPCTL_CNAK|ctrl, &reg->out_endp[ep_num].doepctl);

commit e4feb814ab1460f600cd11f2d0321d11f702d70f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:43:09 2018 +0800

    rockchip: android: fix compile warning
    
    Change-Id: Ic89e97a852999a9ec929942b1b612f13cc43f57f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 2d9adec2d6..25128ae446 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -355,6 +355,7 @@ char *android_assemble_cmdline(const char *slot_suffix,
 	return cmdline;
 }
 
+#ifdef CONFIG_ANDROID_AVB
 static void slot_set_unbootable(AvbABSlotData* slot)
 {
 	slot->priority = 0;
@@ -362,7 +363,6 @@ static void slot_set_unbootable(AvbABSlotData* slot)
 	slot->successful_boot = 0;
 }
 
-#ifdef CONFIG_ANDROID_AVB
 static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
 			       unsigned long load_address,
 			       char *slot_suffix)

commit 9cd0e7c23ce7cfad6e014fe77119cdf30c8e662b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 15:42:05 2018 +0800

    bootm-fdt: fix compile warning
    
    Change-Id: I5915dc22285e133d52159d6d3ab8cb631f7dfab1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 39c0c8d566..a70c0087a0 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -46,8 +46,8 @@ int arch_fixup_fdt(void *blob)
 		size[bank] = bd->bi_dram[bank].size;
 		if (size[bank] == 0)
 			continue;
-		printf("Adding bank: start=0x%08lx, size=0x%08lx\n",
-		       gd->bd->bi_dram[bank].start, gd->bd->bi_dram[bank].size);
+		printf("Adding bank: start=0x%08llx, size=0x%08llx\n",
+		       start[bank], size[bank]);
 
 #ifdef CONFIG_ARMV7_NONSEC
 		ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);

commit 912bc5c1260a0c2ef47913c38884da8d9177ce96
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Sun Feb 11 15:35:51 2018 +0800

    usb: gadget: fix bos descriptor for rockusb
    
    A GetDescriptor(BOS) request always requires the Device Capability
    descriptors as part of the BOS information. This patch adds a generic
    Device Capability descriptor header to fix it.
    
    Fixes: 8ddd5824c ("usb: gadget: add bos descriptor response for rockusb command")
    Change-Id: I6b5976c6f13a6991a7d00c8221ece2a740032a07
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 626117f075..db3a754e49 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -273,6 +273,7 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
 
 static int bos_desc(struct usb_composite_dev *cdev)
 {
+	struct usb_dev_cap_header	*cap;
 	struct usb_bos_descriptor	*bos = cdev->req->buf;
 
 	bos->bLength = USB_DT_BOS_SIZE;
@@ -280,6 +281,13 @@ static int bos_desc(struct usb_composite_dev *cdev)
 	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
 	bos->bNumDeviceCaps = 0;
 
+	cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength);
+	bos->bNumDeviceCaps++;
+	bos->wTotalLength = cpu_to_le16(bos->wTotalLength + sizeof(*cap));
+	cap->bLength = sizeof(*cap);
+	cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
+	cap->bDevCapabilityType = 0;
+
 	return le16_to_cpu(bos->wTotalLength);
 }
 

commit 6ba708bc77dfce093107821405a3f9a43b78086b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 15:33:41 2018 +0800

    pmic: rk8xx: verify supported chip id list
    
    Change-Id: I792181827a4c68dab8918694f4a0604d5f331537
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 81bbc38891..bc87a877b2 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -158,6 +158,14 @@ static int rk8xx_probe(struct udevice *dev)
 	rk8xx_read(dev, id_lsb, &lsb, 1);
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
+	if ((priv->variant != RK808_ID) &&
+	    (priv->variant != RK805_ID) &&
+	    (priv->variant != RK816_ID) &&
+	    (priv->variant != RK817_ID) &&
+	    (priv->variant != RK818_ID)) {
+		printf("Unknown PMIC: RK%x!!\n", priv->variant);
+		return -EINVAL;
+	}
 
 	printf("PMIC:  RK%x\n", priv->variant);
 

commit 74550e825760f596eca2faca1818a59d43e4b7ee
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 15:30:46 2018 +0800

    rockchip: chip_info: fixup PX30 to RK3326
    
    This is used for verify pre-loader in rockusb mode
    
    Change-Id: I110e274bae256a2f924555a04672a0e0c6eef7ee
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
index 1bfee8ef92..bb6083bf90 100644
--- a/arch/arm/mach-rockchip/chip_info.c
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -73,6 +73,8 @@ int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
 		chip_info[0] = 0x33323248;
 #elif defined(CONFIG_ROCKCHIP_RK3399)
 		chip_info[0] = 0x33333043;
+#elif defined(CONFIG_ROCKCHIP_PX30)
+		chip_info[0] = 0x33333236;
 #endif
 	}
 

commit 2ecf1e82eff3bd915486265aa3f93e7bff6acd63
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 15:28:59 2018 +0800

    make.sh: fixup RKCHIP from 'PX30' to 'RK3326'
    
    This is for INI file look up
    
    Change-Id: Iac3ee79c12d9c5c51484e41533346fbc4acf4215
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 0779c4e9c2..47bd096f50 100755
--- a/make.sh
+++ b/make.sh
@@ -136,6 +136,8 @@ fixup_chip_name()
 {
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
 		RKCHIP=RK322X
+	elif [ "$RKCHIP" = 'PX30' ]; then
+		RKCHIP=RK3326
 	fi
 }
 

commit 0fcca447cbdd19596f4136c6502453c2e0670905
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sun Feb 11 14:43:24 2018 +0800

    configs: evb-px30: set CONFIG_BOOTDELAY=0
    
    Change-Id: I1dddacb974ce7859572ce7d0d0410ac883b44569
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index b58995d37b..71918dd332 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -11,7 +11,7 @@ CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=5
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000

commit 8ce70bc0c5f38b86dd7ddaaab78604e9dec1ab58
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 14:55:34 2018 +0800

    rockchip: rknand: fix Kconfig define
    
    fix error:
    Error: You must add new CONFIG options using Kconfig
    The following new ad-hoc CONFIG options were detected:
    CONFIG_DM_PWM
    
    Please add these via Kconfig instead. Find a suitable Kconfig
    file and add a 'config' or 'menuconfig' option.
    
    Change-Id: I893a18eb1c36e28307379872814532ba825be586
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/rknand/Kconfig b/drivers/rknand/Kconfig
index cf7cac4777..96ebd29f49 100644
--- a/drivers/rknand/Kconfig
+++ b/drivers/rknand/Kconfig
@@ -11,6 +11,7 @@ config RKNAND
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with rk ftl) to read and write NAND FLASH.
+
 config ZFTL
 	bool "Rockchip ZFTL for rkpx30/rk3326 to support 3D/2D TLC/MLC"
 	depends on RKNAND && (ROCKCHIP_PX30)
@@ -18,4 +19,4 @@ config ZFTL
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with zftl) to read and write 3D/2D TLC/MLC
-	  NAND FLASH.
\ No newline at end of file
+	  NAND FLASH.

commit 68c3ade63c1845abdcfe4a4ff4c7af1543f189c5
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 7 11:34:56 2018 +0800

    configs: rockchip: enable usb-phy support for px30
    
    Enable usb-phy support for Rockchip evb-px30 SoC.
    
    Change-Id: Id4b3c56e23f6f6fb4f09ede7680db333c0a3a510
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 5e33d6f9be..b58995d37b 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -35,6 +35,8 @@ CONFIG_RK8XX_PWRKEY=y
 CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y

commit fe0857a163fd0b84ae38a13089ec68e85d74283c
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 7 11:11:27 2018 +0800

    ARM: dts: rockchip: enable usb-phy for px30-evb
    
    This change enable usb-phy support for px30-evb board.
    
    Change-Id: I3200cd4b3988e84927ad2af274e7be78ff498dec
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 7fd0d4feb3..2fee4918b3 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -362,3 +362,15 @@
 		};
 	};
 };
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};

commit e09cbbab1a02f2bea514824054851957a9b8f781
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Feb 7 11:21:35 2018 +0800

    drivers: rknand: add nand driver for rkpx30 and rk3326
    
    rk_zftl_arm_xx is new ftl for support 2D/3D TLC/MLC NAND FLASH.
    rk_ftl_arm_xx is legacy ftl for support 2D MLC NAND FLASH
    
    Change-Id: I80794998562a8916e634f533d1b917bf8aab4d91
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/Kconfig b/drivers/rknand/Kconfig
index ea2f21d484..cf7cac4777 100644
--- a/drivers/rknand/Kconfig
+++ b/drivers/rknand/Kconfig
@@ -7,6 +7,15 @@
 config RKNAND
 	bool "Rockchip NAND FLASH device support"
 	depends on BLK
+	select ZFTL if ROCKCHIP_PX30
 	help
 	  This option enables support for Rockchip NAND FLASH devices.
 	  It supports block interface(with rk ftl) to read and write NAND FLASH.
+config ZFTL
+	bool "Rockchip ZFTL for rkpx30/rk3326 to support 3D/2D TLC/MLC"
+	depends on RKNAND && (ROCKCHIP_PX30)
+	default y if ROCKCHIP_PX30
+	help
+	  This option enables support for Rockchip NAND FLASH devices.
+	  It supports block interface(with zftl) to read and write 3D/2D TLC/MLC
+	  NAND FLASH.
\ No newline at end of file
diff --git a/drivers/rknand/Makefile b/drivers/rknand/Makefile
index 573462b851..92dcebf20d 100644
--- a/drivers/rknand/Makefile
+++ b/drivers/rknand/Makefile
@@ -4,4 +4,21 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += rknand.o rk_ftl_arm_v7.o
+obj-y += rknand.o
+ifdef CONFIG_ARM64
+
+ifdef CONFIG_ZFTL
+obj-y += rk_zftl_arm_v8.o
+else
+obj-y += rk_ftl_arm_v8.o
+endif
+
+else
+
+ifdef CONFIG_ZFTL
+obj-y += rk_zftl_arm_v7.o
+else
+obj-y += rk_ftl_arm_v7.o
+endif
+
+endif
\ No newline at end of file
diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index aa26ca5fe2..284102b3f5 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,9 +5,8 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2018-02-01
+ * date: 2018-02-08
  */
-	.syntax unified
 	.arch armv7-a
 	.eabi_attribute 20, 1
 	.eabi_attribute 21, 1
@@ -17,7 +16,7 @@
 	.eabi_attribute 26, 2
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
-	.eabi_attribute 18, 4
+	.eabi_attribute 18, 2
 	.file	"rk_ftl_arm_v7.S"
 	.section	.text.ftl_set_blk_mode.part.9,"ax",%progbits
 	.align	1
@@ -4484,7 +4483,7 @@ make_superblock:
 	cmp	r2, r3
 	bcc	.L642
 	ldr	r1, .L654+4
-	movw	r2, #2296
+	movw	r2, #2298
 	ldr	r0, .L654+8
 	bl	printf
 	ldr	r1, .L654+12
@@ -5532,18 +5531,17 @@ ReadFlashInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	movs	r1, #0
-	ldr	r6, .L809
 	movs	r2, #11
+	movs	r1, #0
 	mov	r4, r0
-	movs	r5, #0
 	bl	ftl_memset
-	ldr	r3, [r6]
-	mov	r0, r5
-	ldr	r2, .L809+4
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	ldr	r2, [r2]
-	smulbb	r3, r3, r2
+	ldr	r3, .L809
+	movs	r2, #0
+	ldr	r1, [r3]
+	ldr	r3, .L809+4
+	ldrb	r0, [r1, #9]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	smulbb	r3, r3, r0
 	uxth	r3, r3
 	strb	r3, [r4, #4]
 	lsrs	r3, r3, #8
@@ -5551,39 +5549,38 @@ ReadFlashInfo:
 	ldr	r3, .L809+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	strb	r3, [r4, #7]
-	bl	FlashBootGetCapacity
-	ubfx	r3, r0, #8, #8
-	strb	r0, [r4]
-	strb	r3, [r4, #1]
-	ubfx	r3, r0, #16, #8
-	strb	r3, [r4, #2]
-	lsrs	r0, r0, #24
-	ldr	r3, [r6]
-	strb	r0, [r4, #3]
-	mov	r0, r5
-	ldr	r1, .L809+12
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	strb	r2, [r4, #6]
-	movs	r2, #32
-	strb	r2, [r4, #8]
-	ldrb	r3, [r3, #7]	@ zero_extendqisi2
-	strb	r5, [r4, #10]
+	ldr	r3, .L809+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	strb	r5, [r4]
+	ldrb	r5, [r3, #1]	@ zero_extendqisi2
+	strb	r5, [r4, #1]
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	ldrb	r3, [r3, #3]	@ zero_extendqisi2
+	strb	r0, [r4, #6]
+	strb	r5, [r4, #2]
 	movs	r5, #1
+	strb	r3, [r4, #3]
+	movs	r3, #32
+	strb	r3, [r4, #8]
+	ldrb	r3, [r1, #7]	@ zero_extendqisi2
+	ldr	r0, .L809+16
+	strb	r2, [r4, #10]
 	strb	r3, [r4, #9]
-	ldr	r3, .L809+16
-	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L809+20
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	mov	r3, r2
 .L807:
-	uxtb	r3, r0
-	cmp	r2, r3
+	uxtb	r2, r3
+	cmp	r1, r2
 	bhi	.L808
 	pop	{r4, r5, r6, pc}
 .L808:
-	ldrb	r3, [r0, r1]	@ zero_extendqisi2
-	adds	r0, r0, #1
+	ldrb	r2, [r3, r0]	@ zero_extendqisi2
+	adds	r3, r3, #1
 	ldrb	r6, [r4, #10]	@ zero_extendqisi2
-	lsl	r3, r5, r3
-	orrs	r3, r3, r6
-	strb	r3, [r4, #10]
+	lsl	r2, r5, r2
+	orrs	r2, r2, r6
+	strb	r2, [r4, #10]
 	b	.L807
 .L810:
 	.align	2
@@ -5591,6 +5588,7 @@ ReadFlashInfo:
 	.word	.LANCHOR18
 	.word	.LANCHOR3
 	.word	.LANCHOR31
+	.word	.LANCHOR67
 	.word	.LANCHOR26
 	.word	.LANCHOR25
 	.size	ReadFlashInfo, .-ReadFlashInfo
@@ -6114,7 +6112,7 @@ SupperBlkListInit:
 	cmp	r3, r5
 	bge	.L859
 	ldr	r1, .L860+64
-	movw	r2, #2366
+	mov	r2, #2368
 	ldr	r0, .L860+68
 	bl	printf
 	ldr	r1, .L860+72
@@ -6738,970 +6736,970 @@ FlashReadRawPage:
 	.word	.LANCHOR2
 	.word	.LANCHOR3
 	.size	FlashReadRawPage, .-FlashReadRawPage
-	.section	.text.FlashLoadPhyInfo,"ax",%progbits
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
-	.global	FlashLoadPhyInfo
+	.global	FlashDdrTunningRead
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	movs	r3, #60
+	mov	r7, r3
+	ldr	r3, .L967
 	sub	sp, sp, #24
-	ldr	fp, .L957+8
-	movs	r4, #0
-	movs	r7, #4
-	strb	r3, [sp, #20]
-	movs	r3, #40
-	strb	r3, [sp, #21]
-	movs	r3, #24
-	strb	r3, [sp, #22]
-	movs	r3, #16
-	ldr	r1, .L957
-	mov	r0, r4
-	strb	r3, [sp, #23]
-	mov	r6, #-1
-	ldrh	r3, [fp, #10]
-	ldr	r8, .L957+36
-	ldr	r5, .L957+4
-	str	r3, [sp, #4]
-	ldr	r3, [r1]
-	str	r4, [r8]
-	str	r3, [r5]
-	bl	flash_enter_slc_mode
-	mov	r10, r1
-	str	r8, [sp, #12]
-.L943:
-	mov	r8, #0
-	adds	r3, r4, #1
-	str	r3, [sp, #8]
-.L945:
-	add	r3, sp, #20
-	ldrb	r0, [r3, r8]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r3, #0
-	ldr	r2, [r10]
-	mov	r1, r4
-	mov	r0, r3
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L944
-	movs	r3, #0
-	ldr	r2, [r10]
-	ldr	r1, [sp, #8]
-	mov	r0, r3
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	str	r1, [sp, #12]
+	str	r2, [sp, #4]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L967+4
+	ldr	r3, [r3]
+	cmp	r3, #8
+	ldr	r3, [sp, #56]
+	ite	cc
+	movcc	fp, #6
+	movcs	fp, #12
+	cmp	r3, #0
+	beq	.L956
+	movs	r0, #1
+	ldr	r4, .L967+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
 	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L944
-	add	r8, r8, #1
-	cmp	r8, #4
+	mov	r6, r0
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	adds	r3, r6, #1
 	bne	.L945
-.L946:
-	ldr	r3, [sp, #4]
-	subs	r7, r7, #1
-	add	r4, r4, r3
-	bne	.L943
-	mov	r0, r7
-	b	.L956
-.L947:
-	movw	r1, #2036
-	add	r0, r8, #12
-	bl	JSHash
-	ldr	r3, [r8, #8]
-	cmp	r3, r0
-	bne	.L953
-	movs	r2, #32
-	add	r1, r8, #160
-	ldr	r0, .L957+8
-	bl	ftl_memcpy
-	ldr	r1, [r5]
-	movs	r2, #32
-	ldr	r0, .L957+12
-	adds	r1, r1, #192
-	bl	ftl_memcpy
-	ldr	r1, [r5]
-	mov	r2, #852
-	ldr	r0, .L957+16
-	adds	r1, r1, #224
-	bl	ftl_memcpy
-	ldr	r6, [r5]
-	mov	r0, r4
-	ldr	r3, .L957+20
-	ldrh	r1, [fp, #10]
-	ldr	r2, [r6, #1076]
-	strb	r2, [r3]
-	ldr	r3, [sp, #12]
-	str	r4, [r3]
-	bl	__aeabi_uidiv
-	ldr	r3, .L957+24
-	adds	r2, r0, #1
-	cbz	r0, .L949
-.L955:
-	str	r2, [r3]
-	ldrh	r2, [r6, #14]
-	movs	r6, #0
-	ldr	r3, .L957+28
-	strb	r2, [r3]
-	b	.L946
-.L949:
-	movs	r2, #2
-	b	.L955
-.L953:
+.L954:
 	mov	r6, #-1
-	b	.L946
-.L944:
-	ldr	r8, [r5]
-	ldr	r2, .L957+32
-	ldr	r3, [r8]
-	cmp	r3, r2
-	bne	.L946
-	cmp	r6, #0
-	bne	.L947
-	ldrh	r1, [fp, #10]
-	mov	r0, r4
-	bl	__aeabi_uidiv
-	ldr	r3, .L957+24
-	adds	r0, r0, #1
-	str	r0, [r3]
-	mov	r0, r6
-.L956:
-	bl	flash_exit_slc_mode
+.L942:
 	mov	r0, r6
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L945:
+	mov	r2, r6
+	ldr	r1, [sp, #12]
+	ldr	r0, .L967+12
+	bl	printf
+	ldr	r2, .L967+16
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	cmp	r3, #2048
+	bcs	.L947
+	str	r3, [r2]
+	b	.L942
+.L947:
+	movs	r7, #0
+	str	r7, [r2]
+	str	r7, [sp, #4]
+.L944:
+	mov	r10, #0
+	mov	r8, #-1
+	mov	r5, r10
+	mov	r4, r10
+	str	r10, [sp, #16]
+.L952:
+	uxtb	r0, fp
+	bl	NandcSetDdrPara
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	adds	r3, r6, #1
+	cmp	r0, r3
+	bhi	.L948
+	cmp	r0, #2
+	bhi	.L958
+	adds	r4, r4, #1
+	cmp	r4, #9
+	bls	.L958
+	mov	r3, r5
+	mov	r6, r0
+	sub	r5, fp, r4
+	mov	r8, #0
+.L950:
+	ldr	r2, [sp, #16]
+	cmp	r4, r2
+	it	ls
+	movls	r5, r3
+.L951:
+	cbz	r5, .L953
+	mov	r1, r5
+	ldr	r0, .L967+20
+	bl	printf
+	uxtb	r0, r5
+	bl	NandcSetDdrPara
+.L953:
+	cmp	r8, #0
+	beq	.L942
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #8]
+	ldr	r0, .L967+24
+	bl	printf
+	ldr	r3, [sp, #56]
+	cmp	r3, #0
+	beq	.L954
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L942
+.L956:
+	mov	r6, #1024
+	b	.L944
+.L948:
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	bls	.L959
+	cmp	r4, #7
+	sub	r5, r10, r4
+	bhi	.L951
+	str	r4, [sp, #16]
+.L959:
+	movs	r4, #0
+	b	.L949
 .L958:
+	mov	r8, #0
+	mov	r10, fp
+	mov	r6, r0
+	mov	r7, r8
+	str	r8, [sp, #4]
+.L949:
+	add	fp, fp, #2
+	cmp	fp, #69
+	bls	.L952
+	mov	r3, r5
+	mov	r5, r10
+	b	.L950
+.L968:
 	.align	2
-.L957:
-	.word	.LANCHOR143
+.L967:
+	.word	.LANCHOR19
+	.word	.LANCHOR32
+	.word	.LANCHOR24
+	.word	.LC7
 	.word	.LANCHOR142
-	.word	.LANCHOR29
-	.word	.LANCHOR7
-	.word	.LANCHOR20
-	.word	.LANCHOR28
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.word	1312902724
-	.word	.LANCHOR144
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.ToshibaReadRetrial,"ax",%progbits
+	.word	.LC8
+	.word	.LC9
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
-	.global	ToshibaReadRetrial
+	.global	FlashReadPage
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	sub	sp, sp, #24
-	mov	r6, r0
-	str	r2, [sp, #12]
-	mov	fp, r3
-	str	r1, [sp, #20]
-	bl	NandcWaitFlashReady
-	ldr	r3, .L986
-	ldr	r2, .L986+4
-	ldr	r4, [r3, r6, lsl #3]
-	add	r3, r3, r6, lsl #3
-	str	r2, [sp, #16]
-	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-	ldrb	r3, [r2]	@ zero_extendqisi2
-	add	r5, r7, #8
-	subs	r3, r3, #67
-	add	r5, r4, r5, lsl #8
-	cmp	r3, #1
-	bls	.L976
-	ldr	r3, .L986+8
+	.type	FlashReadPage, %function
+FlashReadPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	mov	r5, r0
+	mov	r6, r1
+	mov	r8, r3
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	mov	r4, r0
+	bne	.L970
+	ldr	r10, .L988+20
+	ldrb	fp, [r10]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L971
+.L973:
+	ldr	r3, .L988
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L977
-	movs	r0, #0
-	bl	NandcSetDdrMode
+	cbz	r3, .L970
+	ldr	r3, .L988+4
+	mov	r1, r6
+	mov	r2, r7
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r10, [r3, #304]
 	movs	r3, #1
-.L977:
-	str	r3, [sp, #8]
-	add	r3, r4, r7, lsl #8
-	movs	r2, #92
-	str	r2, [r3, #2056]
-	movs	r2, #197
-	str	r2, [r3, #2056]
-.L960:
-	mov	r8, #1
-	mov	r3, #-1
-	str	r3, [sp, #4]
-.L962:
-	ldr	r3, .L986+12
+	str	r3, [sp]
+	mov	r3, r8
+	bl	FlashDdrTunningRead
+	adds	r1, r0, #1
+	mov	r4, r0
+	beq	.L974
+	ldr	r3, .L988+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r8, r3
-	bcc	.L971
-	ldr	r10, [sp, #4]
-.L970:
-	ldr	r3, [sp, #16]
-	movs	r1, #0
-	mov	r0, r5
-	ldrb	r2, [r3]	@ zero_extendqisi2
-	subs	r2, r2, #67
-	cmp	r2, #1
-	bhi	.L972
-	bl	SandiskSetRRPara
-.L973:
-	add	r4, r4, r7, lsl #8
-	movs	r2, #255
-	str	r2, [r4, #2056]
-	ldr	r2, .L986+16
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	add	r2, r2, r2, lsl #1
-	cmp	r10, r2, asr #2
-	bcc	.L974
-	cmp	r10, #-1
-	it	ne
-	movne	r10, #256
+	cmp	r0, r3, lsr #1
+	bls	.L970
 .L974:
-	mov	r0, r6
-	bl	NandcWaitFlashReady
-	ldr	r3, [sp, #8]
-	cbz	r3, .L959
-	movs	r0, #4
-	bl	NandcSetDdrMode
-.L959:
-	mov	r0, r10
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L976:
-	movs	r3, #0
-	str	r3, [sp, #8]
-	b	.L960
+	ubfx	r0, r10, #8, #8
+	bl	NandcSetDdrPara
+	b	.L970
 .L971:
-	ldr	r3, [sp, #16]
+	movs	r3, #0
+	mov	r2, r7
+	strb	r3, [r10]
+	mov	r1, r6
+	mov	r3, r8
 	mov	r0, r5
-	uxtb	r1, r8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L963
-	bl	SandiskSetRRPara
-.L964:
-	ldr	r3, [sp, #16]
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L965
-	ldr	r3, .L986+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r8, r3
-	ittt	eq
-	addeq	r3, r4, r7, lsl #8
-	moveq	r2, #179
-	streq	r2, [r3, #2056]
-.L965:
-	add	r3, r4, r7, lsl #8
-	movs	r2, #38
-	str	r2, [r3, #2056]
-	movs	r2, #93
-	str	r2, [r3, #2056]
-	ldr	r3, [sp, #8]
-	cbz	r3, .L966
-	movs	r0, #4
-	bl	NandcSetDdrMode
-	mov	r3, fp
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #20]
-	mov	r0, r6
 	bl	FlashReadRawPage
-	mov	r10, r0
-	movs	r0, #0
-	bl	NandcSetDdrMode
-.L967:
-	cmp	r10, #-1
-	beq	.L968
-	ldr	r2, .L986+16
-	ldr	r3, [sp, #4]
-	ldrb	r2, [r2]	@ zero_extendqisi2
-	cmp	r3, #-1
-	it	eq
-	moveq	r3, r10
-	str	r3, [sp, #4]
-	add	r2, r2, r2, lsl #1
-	cmp	r10, r2, asr #2
-	bcc	.L970
-	mov	fp, #0
-	str	fp, [sp, #12]
-.L968:
-	add	r8, r8, #1
-	b	.L962
-.L963:
-	bl	ToshibaSetRRPara
-	b	.L964
-.L966:
-	mov	r3, fp
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #20]
-	mov	r0, r6
-	bl	FlashReadRawPage
-	mov	r10, r0
-	b	.L967
-.L972:
-	bl	ToshibaSetRRPara
-	b	.L973
-.L987:
+	adds	r3, r0, #1
+	strb	fp, [r10]
+	beq	.L973
+	mov	r4, r0
+.L970:
+	ldr	r10, .L988+24
+	ldr	fp, [r10]
+	cmp	fp, #0
+	beq	.L969
+	adds	r2, r4, #1
+	bne	.L969
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	fp
+	mov	r3, r6
+	mov	r4, r0
+	mov	r1, r0
+	mov	r2, r5
+	ldr	r0, .L988+12
+	bl	printf
+	adds	r3, r4, #1
+	bne	.L969
+	ldr	r3, .L988+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L969
+	mov	r0, r5
+	bl	flash_enter_slc_mode
+	ldr	r4, [r10]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	r4
+	mov	r4, r0
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L969:
+	mov	r0, r4
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L989:
 	.align	2
-.L986:
-	.word	.LANCHOR6
-	.word	.LANCHOR10
+.L988:
 	.word	.LANCHOR28
-	.word	.LANCHOR147
+	.word	.LANCHOR19
 	.word	.LANCHOR31
-	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
-	.section	.text.SamsungReadRetrial,"ax",%progbits
+	.word	.LC10
+	.word	.LANCHOR8
+	.word	.LANCHOR5
+	.word	.LANCHOR143
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
-	.global	SamsungReadRetrial
+	.global	FlashDdrParaScan
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	SamsungReadRetrial, %function
-SamsungReadRetrial:
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r0
-	mov	r10, r2
-	mov	r8, r3
-	mov	fp, r1
-	movs	r6, #1
-	bl	NandcWaitFlashReady
-	ldr	r2, .L1001
-	mov	r4, #-1
-	add	r3, r2, r7, lsl #3
-	ldrb	r5, [r3, #4]	@ zero_extendqisi2
-	add	r3, r5, #8
-	ldr	r5, [r2, r7, lsl #3]
-	add	r5, r5, r3, lsl #8
-.L989:
-	ldr	r3, .L1001+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r6, r3
-	bcc	.L993
-.L992:
-	movs	r1, #0
-	mov	r0, r5
-	bl	SamsungSetRRPara
-	ldr	r3, .L1001+8
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, asr #2
-	bcc	.L988
-	adds	r3, r4, #1
-	it	ne
-	movne	r4, #256
-.L988:
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L993:
-	uxtb	r1, r6
-	mov	r0, r5
-	bl	SamsungSetRRPara
-	mov	r2, r10
-	mov	r3, r8
-	mov	r1, fp
-	mov	r0, r7
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r4, .L1001
+	movs	r5, #0
+	mov	r7, r1
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r3, r5
+	mov	r2, r5
+	str	r5, [sp]
+	mov	r1, r7
+	mov	r0, r6
+	bl	FlashDdrTunningRead
+	mov	r3, r5
+	mov	r2, r5
+	mov	r8, r0
+	mov	r1, r7
+	mov	r0, r6
+	ldr	r5, .L1001+4
 	bl	FlashReadRawPage
-	adds	r2, r0, #1
-	beq	.L990
-	ldr	r3, .L1001+8
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
-	bcc	.L996
-	mov	r8, #0
-	mov	r10, r8
-.L990:
-	adds	r6, r6, #1
-	b	.L989
-.L996:
-	mov	r4, r0
-	b	.L992
+	adds	r0, r0, #1
+	beq	.L991
+	cmp	r8, #-1
+	bne	.L992
+.L991:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L992
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r3, #0
+.L1000:
+	movs	r0, #0
+	strb	r3, [r5]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L992:
+	movs	r3, #1
+	b	.L1000
 .L1002:
 	.align	2
 .L1001:
-	.word	.LANCHOR6
-	.word	.LANCHOR147
-	.word	.LANCHOR31
-	.size	SamsungReadRetrial, .-SamsungReadRetrial
-	.section	.text.MicronReadRetrial,"ax",%progbits
+	.word	.LANCHOR24
+	.word	.LANCHOR28
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
-	.global	MicronReadRetrial
+	.global	FlashLoadPhyInfo
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	MicronReadRetrial, %function
-MicronReadRetrial:
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r10, r3
-	ldr	r3, .L1018
-	sub	sp, sp, #32
-	mov	r7, r0
-	mov	fp, r2
-	str	r1, [sp, #16]
-	ldrb	r4, [r3]	@ zero_extendqisi2
-	ldr	r3, .L1018+4
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L1004
-	add	r4, r4, r4, lsl #1
-	asrs	r4, r4, #2
-.L1005:
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-	ldr	r3, .L1018+8
-	movs	r6, #0
-	mov	r5, #-1
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r2, [sp, #8]
-	str	r3, [sp, #12]
-	lsls	r3, r3, #8
-	str	r3, [sp, #24]
+	movs	r3, #60
+	sub	sp, sp, #24
+	ldr	fp, .L1018+8
+	movs	r4, #0
+	movs	r7, #4
+	strb	r3, [sp, #20]
+	movs	r3, #40
+	strb	r3, [sp, #21]
+	movs	r3, #24
+	strb	r3, [sp, #22]
+	movs	r3, #16
+	ldr	r1, .L1018
+	mov	r0, r4
+	strb	r3, [sp, #23]
+	mov	r6, #-1
+	ldrh	r3, [fp, #10]
+	ldr	r8, .L1018+36
+	ldr	r5, .L1018+4
+	str	r3, [sp, #4]
+	ldr	r3, [r1]
+	str	r4, [r8]
+	str	r3, [r5]
+	bl	flash_enter_slc_mode
+	mov	r10, r1
+	str	r8, [sp, #12]
+.L1004:
+	mov	r8, #0
+	adds	r3, r4, #1
+	str	r3, [sp, #8]
 .L1006:
-	ldr	r3, .L1018+12
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r6, r3
-	bcc	.L1010
-.L1009:
-	ldr	r3, [sp, #8]
-	movs	r0, #200
-	ldr	r2, [sp, #12]
-	add	r7, r3, r2, lsl #8
-	movs	r3, #239
-	str	r3, [r7, #2056]
-	movs	r3, #137
-	str	r3, [r7, #2052]
-	bl	udelay
-	cmp	r5, r4
-	mov	r3, #0
-	str	r3, [r7, #2048]
-	str	r3, [r7, #2048]
-	str	r3, [r7, #2048]
-	str	r3, [r7, #2048]
-	bcc	.L1003
-	adds	r3, r5, #1
-	ldr	r2, [sp, #16]
-	it	ne
-	movne	r5, #256
-	mov	r3, r6
-	str	r5, [sp]
-	mov	r1, r6
+	add	r3, sp, #20
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r3, #0
+	ldr	r2, [r10]
+	mov	r1, r4
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L1005
+	movs	r3, #0
+	ldr	r2, [r10]
+	ldr	r1, [sp, #8]
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L1005
+	add	r8, r8, #1
+	cmp	r8, #4
+	bne	.L1006
+.L1007:
+	ldr	r3, [sp, #4]
+	subs	r7, r7, #1
+	add	r4, r4, r3
+	bne	.L1004
+	mov	r0, r7
+	b	.L1017
+.L1008:
+	movw	r1, #2036
+	add	r0, r8, #12
+	bl	JSHash
+	ldr	r3, [r8, #8]
+	cmp	r3, r0
+	bne	.L1014
+	movs	r2, #32
+	add	r1, r8, #160
+	ldr	r0, .L1018+8
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	movs	r2, #32
+	ldr	r0, .L1018+12
+	adds	r1, r1, #192
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	mov	r2, #852
 	ldr	r0, .L1018+16
-	bl	printf
-.L1003:
-	mov	r0, r5
-	add	sp, sp, #32
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1004:
+	adds	r1, r1, #224
+	bl	ftl_memcpy
+	ldr	r6, [r5]
+	mov	r0, r4
 	ldr	r3, .L1018+20
-	smull	r4, r5, r4, r3
-	mov	r4, r5
-	b	.L1005
-.L1010:
-	ldr	r2, [sp, #24]
-	movs	r0, #200
-	ldr	r3, [sp, #8]
-	mov	r8, #0
-	add	r3, r3, r2
-	movs	r2, #239
-	str	r2, [r3, #2056]
-	movs	r2, #137
-	str	r2, [r3, #2052]
-	str	r3, [sp, #28]
-	bl	udelay
-	adds	r3, r6, #1
-	ldr	r1, [sp, #16]
-	mov	r2, r3
-	str	r3, [sp, #20]
-	ldr	r3, [sp, #28]
-	mov	r0, r7
-	str	r2, [r3, #2048]
-	mov	r2, fp
-	str	r8, [r3, #2048]
-	str	r8, [r3, #2048]
-	str	r8, [r3, #2048]
-	mov	r3, r10
-	bl	FlashReadRawPage
+	ldrh	r1, [fp, #10]
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3]
+	ldr	r3, [sp, #12]
+	str	r4, [r3]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1018+24
 	adds	r2, r0, #1
-	beq	.L1007
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r0
-	cmp	r0, r4
-	bcc	.L1013
-	mov	r10, r8
-	mov	fp, r8
-.L1007:
-	ldr	r6, [sp, #20]
-	b	.L1006
-.L1013:
-	mov	r5, r0
-	b	.L1009
+	cbz	r0, .L1010
+.L1016:
+	str	r2, [r3]
+	ldrh	r2, [r6, #14]
+	movs	r6, #0
+	ldr	r3, .L1018+28
+	strb	r2, [r3]
+	b	.L1007
+.L1010:
+	movs	r2, #2
+	b	.L1016
+.L1014:
+	mov	r6, #-1
+	b	.L1007
+.L1005:
+	ldr	r8, [r5]
+	ldr	r2, .L1018+32
+	ldr	r3, [r8]
+	cmp	r3, r2
+	bne	.L1007
+	cmp	r6, #0
+	bne	.L1008
+	ldrh	r1, [fp, #10]
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L1018+24
+	adds	r0, r0, #1
+	str	r0, [r3]
+	mov	r0, r6
+.L1017:
+	bl	flash_exit_slc_mode
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1019:
 	.align	2
 .L1018:
-	.word	.LANCHOR31
-	.word	.LANCHOR8
-	.word	.LANCHOR6
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.word	.LANCHOR28
 	.word	.LANCHOR147
-	.word	.LC7
-	.word	1431655766
-	.size	MicronReadRetrial, .-MicronReadRetrial
-	.section	.text.HynixReadRetrial,"ax",%progbits
+	.word	.LANCHOR148
+	.word	1312902724
+	.word	.LANCHOR146
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
-	.global	HynixReadRetrial
+	.global	ToshibaReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	HynixReadRetrial, %function
-HynixReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	fp, r2
-	ldr	r4, .L1037
-	mov	r8, #0
-	mov	r6, #-1
-	mov	r10, r3
-	mov	r7, r0
-	str	r1, [sp, #4]
-	ldrb	r2, [r4, #2]	@ zero_extendqisi2
-	adds	r3, r4, r0
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	str	r2, [sp]
-	ldr	r2, .L1037+4
-	ldr	r2, [r2]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r6, r0
+	str	r2, [sp, #12]
+	mov	fp, r3
+	str	r1, [sp, #20]
 	bl	NandcWaitFlashReady
-.L1022:
-	ldr	r3, [sp]
-	cmp	r8, r3
-	bcc	.L1027
-.L1026:
-	ldr	r3, .L1037+4
-	add	r4, r4, r7
-	ldr	r3, [r3]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L1037+8
-	ite	eq
-	strbeq	r5, [r4, #20]
-	strbne	r5, [r4, #12]
+	ldr	r3, .L1047
+	ldr	r2, .L1047+4
+	ldr	r4, [r3, r6, lsl #3]
+	add	r3, r3, r6, lsl #3
+	str	r2, [sp, #16]
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	add	r5, r7, #8
+	subs	r3, r3, #67
+	add	r5, r4, r5, lsl #8
+	cmp	r3, #1
+	bls	.L1037
+	ldr	r3, .L1047+8
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r6, r3, asr #2
-	bcc	.L1020
-	adds	r3, r6, #1
+	cbz	r3, .L1038
+	movs	r0, #0
+	bl	NandcSetDdrMode
+	movs	r3, #1
+.L1038:
+	str	r3, [sp, #8]
+	add	r3, r4, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L1021:
+	mov	r8, #1
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.L1023:
+	ldr	r3, .L1047+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L1032
+	ldr	r10, [sp, #4]
+.L1031:
+	ldr	r3, [sp, #16]
+	movs	r1, #0
+	mov	r0, r5
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	subs	r2, r2, #67
+	cmp	r2, #1
+	bhi	.L1033
+	bl	SandiskSetRRPara
+.L1034:
+	add	r4, r4, r7, lsl #8
+	movs	r2, #255
+	str	r2, [r4, #2056]
+	ldr	r2, .L1047+16
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
+	bcc	.L1035
+	cmp	r10, #-1
 	it	ne
-	movne	r6, #256
-.L1020:
+	movne	r10, #256
+.L1035:
 	mov	r0, r6
-	add	sp, sp, #8
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #8]
+	cbz	r3, .L1020
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L1020:
+	mov	r0, r10
+	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1027:
-	ldr	r3, [sp]
-	adds	r5, r5, #1
-	uxtb	r5, r5
-	ldr	r2, .L1037+12
-	ldrb	r1, [r4, #1]	@ zero_extendqisi2
-	mov	r0, r7
-	cmp	r3, r5
-	it	ls
-	movls	r5, #0
-	mov	r3, r5
-	bl	HynixSetRRPara
-	mov	r2, fp
-	mov	r3, r10
-	ldr	r1, [sp, #4]
-	mov	r0, r7
+.L1037:
+	movs	r3, #0
+	str	r3, [sp, #8]
+	b	.L1021
+.L1032:
+	ldr	r3, [sp, #16]
+	mov	r0, r5
+	uxtb	r1, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1024
+	bl	SandiskSetRRPara
+.L1025:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L1026
+	ldr	r3, .L1047+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r4, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L1026:
+	add	r3, r4, r7, lsl #8
+	movs	r2, #38
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	ldr	r3, [sp, #8]
+	cbz	r3, .L1027
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
 	bl	FlashReadRawPage
-	adds	r2, r0, #1
-	beq	.L1024
-	ldr	r3, .L1037+8
-	cmp	r6, #-1
+	mov	r10, r0
+	movs	r0, #0
+	bl	NandcSetDdrMode
+.L1028:
+	cmp	r10, #-1
+	beq	.L1029
+	ldr	r2, .L1047+16
+	ldr	r3, [sp, #4]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r3, #-1
 	it	eq
-	moveq	r6, r0
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, asr #2
+	moveq	r3, r10
+	str	r3, [sp, #4]
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
 	bcc	.L1031
-	mov	r10, #0
-	mov	fp, r10
-.L1024:
+	mov	fp, #0
+	str	fp, [sp, #12]
+.L1029:
 	add	r8, r8, #1
-	b	.L1022
-.L1031:
-	mov	r6, r0
-	b	.L1026
-.L1038:
+	b	.L1023
+.L1024:
+	bl	ToshibaSetRRPara
+	b	.L1025
+.L1027:
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
+	bl	FlashReadRawPage
+	mov	r10, r0
+	b	.L1028
+.L1033:
+	bl	ToshibaSetRRPara
+	b	.L1034
+.L1048:
 	.align	2
-.L1037:
-	.word	.LANCHOR20
-	.word	.LANCHOR18
+.L1047:
+	.word	.LANCHOR6
+	.word	.LANCHOR10
+	.word	.LANCHOR28
+	.word	.LANCHOR149
 	.word	.LANCHOR31
-	.word	.LANCHOR20+4
-	.size	HynixReadRetrial, .-HynixReadRetrial
-	.section	.text.FlashDdrTunningRead,"ax",%progbits
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashDdrTunningRead
+	.global	SamsungReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashDdrTunningRead, %function
-FlashDdrTunningRead:
-	@ args = 4, pretend = 0, frame = 24
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r3
-	ldr	r3, .L1064
-	sub	sp, sp, #24
-	str	r0, [sp, #8]
-	ldr	r3, [r3]
-	str	r1, [sp, #12]
-	str	r2, [sp, #4]
-	ldr	r3, [r3, #304]
-	str	r3, [sp, #20]
-	ldr	r3, .L1064+4
-	ldr	r3, [r3]
-	cmp	r3, #8
-	ldr	r3, [sp, #56]
-	ite	cc
-	movcc	fp, #6
-	movcs	fp, #12
-	cmp	r3, #0
-	beq	.L1053
-	movs	r0, #1
-	ldr	r4, .L1064+8
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	ldr	r0, [sp, #8]
-	bl	FlashReset
-	mov	r3, r7
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #12]
-	ldr	r0, [sp, #8]
-	bl	FlashReadRawPage
-	mov	r6, r0
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	NandcSetMode
-	adds	r3, r6, #1
-	bne	.L1042
-.L1051:
-	mov	r6, #-1
-.L1039:
-	mov	r0, r6
-	add	sp, sp, #24
-	@ sp needed
-	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1042:
-	mov	r2, r6
-	ldr	r1, [sp, #12]
-	ldr	r0, .L1064+12
-	bl	printf
-	ldr	r2, .L1064+16
-	ldr	r3, [r2]
+	mov	r7, r0
+	mov	r10, r2
+	mov	r8, r3
+	mov	fp, r1
+	movs	r6, #1
+	bl	NandcWaitFlashReady
+	ldr	r2, .L1062
+	mov	r4, #-1
+	add	r3, r2, r7, lsl #3
+	ldrb	r5, [r3, #4]	@ zero_extendqisi2
+	add	r3, r5, #8
+	ldr	r5, [r2, r7, lsl #3]
+	add	r5, r5, r3, lsl #8
+.L1050:
+	ldr	r3, .L1062+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	cmp	r3, #2048
-	bcs	.L1044
-	str	r3, [r2]
-	b	.L1039
-.L1044:
-	movs	r7, #0
-	str	r7, [r2]
-	str	r7, [sp, #4]
-.L1041:
-	mov	r10, #0
-	mov	r8, #-1
-	mov	r5, r10
-	mov	r4, r10
-	str	r10, [sp, #16]
+	cmp	r6, r3
+	bcc	.L1054
+.L1053:
+	movs	r1, #0
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	ldr	r3, .L1062+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1049
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
 .L1049:
-	uxtb	r0, fp
-	bl	NandcSetDdrPara
-	mov	r3, r7
-	ldr	r2, [sp, #4]
-	ldr	r1, [sp, #12]
-	ldr	r0, [sp, #8]
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1054:
+	uxtb	r1, r6
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	mov	r2, r10
+	mov	r3, r8
+	mov	r1, fp
+	mov	r0, r7
 	bl	FlashReadRawPage
-	adds	r3, r6, #1
-	cmp	r0, r3
-	bhi	.L1045
-	cmp	r0, #2
-	bhi	.L1055
-	adds	r4, r4, #1
-	cmp	r4, #9
-	bls	.L1055
-	mov	r3, r5
-	mov	r6, r0
-	sub	r5, fp, r4
-	mov	r8, #0
-.L1047:
-	ldr	r2, [sp, #16]
-	cmp	r4, r2
-	it	ls
-	movls	r5, r3
-.L1048:
-	cbz	r5, .L1050
-	mov	r1, r5
-	ldr	r0, .L1064+20
-	bl	printf
-	uxtb	r0, r5
-	bl	NandcSetDdrPara
-.L1050:
-	cmp	r8, #0
-	beq	.L1039
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #8]
-	ldr	r0, .L1064+24
-	bl	printf
-	ldr	r3, [sp, #56]
-	cmp	r3, #0
+	adds	r2, r0, #1
 	beq	.L1051
-	ldr	r3, [sp, #20]
-	ubfx	r0, r3, #8, #8
-	bl	NandcSetDdrPara
-	b	.L1039
-.L1053:
-	mov	r6, #1024
-	b	.L1041
-.L1045:
-	ldr	r3, [sp, #16]
-	cmp	r4, r3
-	bls	.L1056
-	cmp	r4, #7
-	sub	r5, r10, r4
-	bhi	.L1048
-	str	r4, [sp, #16]
-.L1056:
-	movs	r4, #0
-	b	.L1046
-.L1055:
+	ldr	r3, .L1062+8
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1057
 	mov	r8, #0
-	mov	r10, fp
-	mov	r6, r0
-	mov	r7, r8
-	str	r8, [sp, #4]
-.L1046:
-	add	fp, fp, #2
-	cmp	fp, #69
-	bls	.L1049
-	mov	r3, r5
-	mov	r5, r10
-	b	.L1047
-.L1065:
+	mov	r10, r8
+.L1051:
+	adds	r6, r6, #1
+	b	.L1050
+.L1057:
+	mov	r4, r0
+	b	.L1053
+.L1063:
 	.align	2
-.L1064:
-	.word	.LANCHOR19
-	.word	.LANCHOR32
-	.word	.LANCHOR24
-	.word	.LC8
-	.word	.LANCHOR148
-	.word	.LC9
-	.word	.LC10
-	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
-	.section	.text.FlashReadPage,"ax",%progbits
+.L1062:
+	.word	.LANCHOR6
+	.word	.LANCHOR149
+	.word	.LANCHOR31
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashReadPage
+	.global	MicronReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashReadPage, %function
-FlashReadPage:
-	@ args = 0, pretend = 0, frame = 0
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
-	mov	r7, r2
-	mov	r5, r0
-	mov	r6, r1
-	mov	r8, r3
-	bl	FlashReadRawPage
-	adds	r2, r0, #1
-	mov	r4, r0
-	bne	.L1067
-	ldr	r10, .L1085+20
-	ldrb	fp, [r10]	@ zero_extendqisi2
-	cmp	fp, #0
-	bne	.L1068
-.L1070:
-	ldr	r3, .L1085
-	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1067
-	ldr	r3, .L1085+4
-	mov	r1, r6
-	mov	r2, r7
-	mov	r0, r5
-	ldr	r3, [r3]
-	ldr	r10, [r3, #304]
-	movs	r3, #1
-	str	r3, [sp]
-	mov	r3, r8
-	bl	FlashDdrTunningRead
-	adds	r1, r0, #1
-	mov	r4, r0
-	beq	.L1071
-	ldr	r3, .L1085+8
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r3
+	ldr	r3, .L1079
+	sub	sp, sp, #32
+	mov	r7, r0
+	mov	fp, r2
+	str	r1, [sp, #16]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1079+4
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cmp	r0, r3, lsr #1
-	bls	.L1067
-.L1071:
-	ubfx	r0, r10, #8, #8
-	bl	NandcSetDdrPara
-	b	.L1067
-.L1068:
-	movs	r3, #0
-	mov	r2, r7
-	strb	r3, [r10]
-	mov	r1, r6
-	mov	r3, r8
-	mov	r0, r5
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	strb	fp, [r10]
-	beq	.L1070
-	mov	r4, r0
+	cmp	r3, #0
+	bne	.L1065
+	add	r4, r4, r4, lsl #1
+	asrs	r4, r4, #2
+.L1066:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1079+8
+	movs	r6, #0
+	mov	r5, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	lsls	r3, r3, #8
+	str	r3, [sp, #24]
 .L1067:
-	ldr	r10, .L1085+24
-	ldr	fp, [r10]
-	cmp	fp, #0
-	beq	.L1066
-	adds	r2, r4, #1
-	bne	.L1066
-	mov	r3, r8
-	mov	r2, r7
-	mov	r1, r6
-	mov	r0, r5
-	blx	fp
-	mov	r3, r6
-	mov	r4, r0
-	mov	r1, r0
-	mov	r2, r5
-	ldr	r0, .L1085+12
-	bl	printf
-	adds	r3, r4, #1
-	bne	.L1066
-	ldr	r3, .L1085+16
+	ldr	r3, .L1079+12
 	ldrb	r3, [r3]	@ zero_extendqisi2
-	cbz	r3, .L1066
-	mov	r0, r5
-	bl	flash_enter_slc_mode
-	ldr	r4, [r10]
-	mov	r3, r8
-	mov	r2, r7
+	cmp	r6, r3
+	bcc	.L1071
+.L1070:
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	ldr	r2, [sp, #12]
+	add	r7, r3, r2, lsl #8
+	movs	r3, #239
+	str	r3, [r7, #2056]
+	movs	r3, #137
+	str	r3, [r7, #2052]
+	bl	udelay
+	cmp	r5, r4
+	mov	r3, #0
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	bcc	.L1064
+	adds	r3, r5, #1
+	ldr	r2, [sp, #16]
+	it	ne
+	movne	r5, #256
+	mov	r3, r6
+	str	r5, [sp]
 	mov	r1, r6
+	ldr	r0, .L1079+16
+	bl	printf
+.L1064:
 	mov	r0, r5
-	blx	r4
-	mov	r4, r0
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L1066:
-	mov	r0, r4
-	add	sp, sp, #8
+	add	sp, sp, #32
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L1086:
+.L1065:
+	ldr	r3, .L1079+20
+	smull	r4, r5, r4, r3
+	mov	r4, r5
+	b	.L1066
+.L1071:
+	ldr	r2, [sp, #24]
+	movs	r0, #200
+	ldr	r3, [sp, #8]
+	mov	r8, #0
+	add	r3, r3, r2
+	movs	r2, #239
+	str	r2, [r3, #2056]
+	movs	r2, #137
+	str	r2, [r3, #2052]
+	str	r3, [sp, #28]
+	bl	udelay
+	adds	r3, r6, #1
+	ldr	r1, [sp, #16]
+	mov	r2, r3
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #28]
+	mov	r0, r7
+	str	r2, [r3, #2048]
+	mov	r2, fp
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	mov	r3, r10
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1068
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	cmp	r0, r4
+	bcc	.L1074
+	mov	r10, r8
+	mov	fp, r8
+.L1068:
+	ldr	r6, [sp, #20]
+	b	.L1067
+.L1074:
+	mov	r5, r0
+	b	.L1070
+.L1080:
 	.align	2
-.L1085:
-	.word	.LANCHOR28
-	.word	.LANCHOR19
+.L1079:
 	.word	.LANCHOR31
-	.word	.LC11
 	.word	.LANCHOR8
-	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.word	.LANCHOR149
-	.size	FlashReadPage, .-FlashReadPage
-	.section	.text.FlashDdrParaScan,"ax",%progbits
+	.word	.LC11
+	.word	1431655766
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashDdrParaScan
+	.global	HynixReadRetrial
 	.syntax unified
 	.thumb
 	.thumb_func
 	.fpu softvfp
-	.type	FlashDdrParaScan, %function
-FlashDdrParaScan:
-	@ args = 0, pretend = 0, frame = 0
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
 	ldr	r4, .L1098
-	movs	r5, #0
-	mov	r7, r1
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4]	@ zero_extendqisi2
-	bl	NandcSetMode
-	mov	r3, r5
-	mov	r2, r5
-	str	r5, [sp]
-	mov	r1, r7
-	mov	r0, r6
-	bl	FlashDdrTunningRead
-	mov	r3, r5
-	mov	r2, r5
-	mov	r8, r0
-	mov	r1, r7
+	mov	r8, #0
+	mov	r6, #-1
+	mov	r10, r3
+	mov	r7, r0
+	str	r1, [sp, #4]
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	adds	r3, r4, r0
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, .L1098+4
+	ldr	r2, [r2]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
+	it	eq
+	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
+	bl	NandcWaitFlashReady
+.L1083:
+	ldr	r3, [sp]
+	cmp	r8, r3
+	bcc	.L1088
+.L1087:
+	ldr	r3, .L1098+4
+	add	r4, r4, r7
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L1098+8
+	ite	eq
+	strbeq	r5, [r4, #20]
+	strbne	r5, [r4, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bcc	.L1081
+	adds	r3, r6, #1
+	it	ne
+	movne	r6, #256
+.L1081:
 	mov	r0, r6
-	ldr	r5, .L1098+4
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L1088
-	cmp	r8, #-1
-	bne	.L1089
-.L1088:
-	ldrb	r3, [r4]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L1089
-	movs	r0, #1
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	movs	r3, #0
-.L1097:
-	movs	r0, #0
-	strb	r3, [r5]
 	add	sp, sp, #8
 	@ sp needed
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1089:
-	movs	r3, #1
-	b	.L1097
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1088:
+	ldr	r3, [sp]
+	adds	r5, r5, #1
+	uxtb	r5, r5
+	ldr	r2, .L1098+12
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	mov	r0, r7
+	cmp	r3, r5
+	it	ls
+	movls	r5, #0
+	mov	r3, r5
+	bl	HynixSetRRPara
+	mov	r2, fp
+	mov	r3, r10
+	ldr	r1, [sp, #4]
+	mov	r0, r7
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1085
+	ldr	r3, .L1098+8
+	cmp	r6, #-1
+	it	eq
+	moveq	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1092
+	mov	r10, #0
+	mov	fp, r10
+.L1085:
+	add	r8, r8, #1
+	b	.L1083
+.L1092:
+	mov	r6, r0
+	b	.L1087
 .L1099:
 	.align	2
 .L1098:
-	.word	.LANCHOR24
-	.word	.LANCHOR28
-	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR31
+	.word	.LANCHOR20+4
+	.size	HynixReadRetrial, .-HynixReadRetrial
 	.section	.text.FlashProgPage,"ax",%progbits
 	.align	1
 	.global	FlashProgPage
@@ -7922,8 +7920,8 @@ FlashSavePhyInfo:
 .L1115:
 	.align	2
 .L1114:
-	.word	.LANCHOR143
-	.word	.LANCHOR142
+	.word	.LANCHOR145
+	.word	.LANCHOR144
 	.word	.LANCHOR150
 	.word	.LANCHOR25
 	.word	.LANCHOR22
@@ -7935,8 +7933,8 @@ FlashSavePhyInfo:
 	.word	.LANCHOR7
 	.word	.LANCHOR20
 	.word	.LANCHOR151
-	.word	.LANCHOR145
-	.word	.LANCHOR144
+	.word	.LANCHOR147
+	.word	.LANCHOR146
 	.word	1312902724
 	.word	.LANCHOR3
 	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
@@ -8059,10 +8057,10 @@ FlashReadIdbDataRaw:
 	.word	.LANCHOR31
 	.word	1446522928
 	.word	.LANCHOR2
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	-52655045
 	.word	.LC12
-	.word	.LANCHOR145
+	.word	.LANCHOR147
 	.word	.LANCHOR3
 	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
 	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
@@ -9201,7 +9199,7 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR25
 	.word	.LANCHOR26
 	.word	.LANCHOR6
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LC16
 .L1206:
 	cmp	r1, #6
@@ -9385,7 +9383,7 @@ HynixGetReadRetryDefault:
 .L1281:
 	.align	2
 .L1280:
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LC17
 	.word	.LC16
 	.word	.LANCHOR20
@@ -9794,18 +9792,18 @@ FlashInit:
 .L1401:
 	.align	2
 .L1399:
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LANCHOR151
 	.word	.LANCHOR150
 	.word	.LANCHOR28
 	.word	.LANCHOR194
 	.word	.LANCHOR195
 	.word	.LANCHOR196
-	.word	.LANCHOR146
-	.word	.LANCHOR145
+	.word	.LANCHOR148
+	.word	.LANCHOR147
 	.word	.LANCHOR22
 	.word	.LANCHOR3
-	.word	.LANCHOR148
+	.word	.LANCHOR142
 	.word	.LC18
 	.word	.LANCHOR153
 	.word	.LANCHOR20
@@ -9820,13 +9818,13 @@ FlashInit:
 	.word	.LC19
 	.word	.LANCHOR119
 	.word	.LANCHOR24
-	.word	.LANCHOR144
+	.word	.LANCHOR146
 	.word	.LANCHOR198
-	.word	.LANCHOR149
+	.word	.LANCHOR143
 	.word	.LANCHOR27
 	.word	.LANCHOR10
 	.word	.LANCHOR13
-	.word	.LANCHOR147
+	.word	.LANCHOR149
 	.word	.LANCHOR2
 	.word	.LANCHOR1
 	.word	.LANCHOR6
@@ -10037,13 +10035,13 @@ FlashInit:
 	.word	.LANCHOR34
 	.word	.LANCHOR152
 	.word	1446522928
-	.word	.LANCHOR144
+	.word	.LANCHOR146
 	.word	.LANCHOR139
 	.word	.LANCHOR15
 	.word	.LANCHOR25
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-	.word	.LANCHOR147
+	.word	.LANCHOR149
 	.word	SamsungReadRetrial
 	.size	FlashInit, .-FlashInit
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
@@ -10452,7 +10450,7 @@ FlashReadPages:
 	.word	.LANCHOR8
 	.word	.LANCHOR3
 	.word	.LANCHOR28
-	.word	.LANCHOR149
+	.word	.LANCHOR143
 	.word	.LANCHOR19
 	.word	.LANCHOR31
 .L1456:
@@ -10590,7 +10588,7 @@ FlashReadPages:
 	.word	.LANCHOR31
 	.word	.LC23
 	.word	.LANCHOR8
-	.word	.LANCHOR149
+	.word	.LANCHOR143
 	.word	.LC20
 	.word	.LC22
 	.size	FlashReadPages, .-FlashReadPages
@@ -11186,7 +11184,7 @@ FlashTestBlk:
 .L1619:
 	.align	2
 .L1618:
-	.word	.LANCHOR145
+	.word	.LANCHOR147
 	.word	.LANCHOR151
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
@@ -11672,7 +11670,7 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1683
 	ldr	r1, .L1743+16
-	movw	r2, #2818
+	movw	r2, #2822
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11742,7 +11740,7 @@ allocate_data_superblock:
 	uxth	r8, r0
 	cbnz	r3, .L1687
 	ldr	r1, .L1743+16
-	movw	r2, #2838
+	movw	r2, #2842
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11769,7 +11767,7 @@ allocate_data_superblock:
 	ldrh	r2, [r2]
 	cmp	r3, r2
 	ble	.L1681
-	movw	r2, #2850
+	movw	r2, #2854
 	ldr	r1, .L1743+16
 	ldr	r0, .L1743+20
 	bl	printf
@@ -11789,7 +11787,7 @@ allocate_data_superblock:
 	cmp	r3, r2
 	ble	.L1690
 	ldr	r1, .L1743+16
-	movw	r2, #2853
+	movw	r2, #2857
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11815,7 +11813,7 @@ allocate_data_superblock:
 	bne	.L1693
 	cbnz	r6, .L1694
 	ldr	r1, .L1743+16
-	movw	r2, #2865
+	movw	r2, #2869
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -11842,7 +11840,7 @@ allocate_data_superblock:
 	cmp	r3, r8
 	bne	.L1696
 	ldr	r1, .L1743+16
-	movw	r2, #2872
+	movw	r2, #2876
 	ldr	r0, .L1743+20
 	bl	printf
 	ldr	r1, .L1743+24
@@ -12061,7 +12059,7 @@ allocate_data_superblock:
 	cbnz	r3, .L1682
 .L1711:
 	ldr	r1, .L1745+12
-	movw	r2, #2931
+	movw	r2, #2935
 	ldr	r0, .L1745+16
 	bl	printf
 	ldr	r1, .L1745+20
@@ -12194,7 +12192,7 @@ update_vpc_list:
 	ldrh	r3, [r5]
 	cbnz	r3, .L1766
 	ldr	r1, .L1771+16
-	movw	r2, #3042
+	movw	r2, #3046
 	ldr	r0, .L1771+20
 	bl	printf
 	ldr	r1, .L1771+24
@@ -12217,7 +12215,7 @@ update_vpc_list:
 	cmp	r3, r2
 	ble	.L1770
 	ldr	r1, .L1771+16
-	movw	r2, #3045
+	movw	r2, #3049
 	ldr	r0, .L1771+20
 	bl	printf
 	ldr	r1, .L1771+24
@@ -12295,7 +12293,7 @@ decrement_vpc_count:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
 .L1776:
-	movw	r2, #3060
+	movw	r2, #3064
 .L1781:
 	ldr	r1, .L1782+8
 	ldr	r0, .L1782+12
@@ -12339,7 +12337,7 @@ decrement_vpc_count:
 	bne	.L1773
 	cmp	r4, r1
 	beq	.L1773
-	movw	r2, #3082
+	movw	r2, #3086
 	b	.L1781
 .L1783:
 	.align	2
@@ -12477,7 +12475,7 @@ get_new_active_ppa:
 	cmp	r2, r3
 	bne	.L1798
 	ldr	r1, .L1819
-	movw	r2, #2982
+	movw	r2, #2986
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -12490,7 +12488,7 @@ get_new_active_ppa:
 	cmp	r2, r3
 	bne	.L1799
 	ldr	r1, .L1819
-	movw	r2, #2983
+	movw	r2, #2987
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -12500,7 +12498,7 @@ get_new_active_ppa:
 	ldrh	r3, [r4, #4]
 	cbnz	r3, .L1800
 	ldr	r1, .L1819
-	movw	r2, #2984
+	movw	r2, #2988
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -12617,7 +12615,7 @@ get_new_active_ppa:
 	ldrh	r3, [r4, #4]
 	cbz	r3, .L1797
 	ldr	r1, .L1819
-	movw	r2, #3028
+	movw	r2, #3032
 	ldr	r0, .L1819+4
 	bl	printf
 	ldr	r1, .L1819+8
@@ -13243,7 +13241,7 @@ FtlLoadBbt:
 	cmp	r7, #0
 	bge	.L1899
 	ldr	r1, .L1915+16
-	mov	r2, #336
+	movw	r2, #335
 	ldr	r0, .L1915+20
 	bl	printf
 	ldr	r1, .L1915+24
@@ -14127,7 +14125,7 @@ FtlReUsePrevPpa:
 	ldrh	r3, [r8]
 	cbnz	r3, .L2014
 	ldr	r1, .L2019+16
-	movw	r2, #1823
+	movw	r2, #1825
 	ldr	r0, .L2019+20
 	bl	printf
 	ldr	r1, .L2019+24
@@ -14461,7 +14459,7 @@ allocate_new_data_superblock:
 	cmp	r3, r5
 	bcs	.L2049
 	ldr	r1, .L2075+4
-	movw	r2, #2939
+	movw	r2, #2943
 	ldr	r0, .L2075+8
 	bl	printf
 	ldr	r1, .L2075+12
@@ -14655,7 +14653,7 @@ FtlProgPages:
 	cmp	r2, r3
 	bcc	.L2083
 	ldr	r1, .L2096+12
-	movw	r2, #1550
+	mov	r2, #1552
 	ldr	r0, .L2096+16
 	bl	printf
 	ldr	r1, .L2096+20
@@ -14702,7 +14700,7 @@ FtlProgPages:
 	cmp	r2, r3
 	bcc	.L2077
 	ldr	r1, .L2096+12
-	movw	r2, #1567
+	movw	r2, #1569
 	ldr	r0, .L2096+16
 	bl	printf
 	ldr	r1, .L2096+20
@@ -16202,12 +16200,12 @@ FtlMapTblRecovery:
 	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #32
-	ldrh	fp, [r0, #6]
-	mov	r7, r0
+	ldrh	r7, [r0, #6]
+	mov	fp, r0
 	movs	r4, #0
 	str	r3, [sp, #12]
 	ldr	r3, [r0, #12]
-	lsl	r2, fp, #2
+	lsls	r2, r7, #2
 	str	r3, [sp, #8]
 	ldr	r3, [r0, #16]
 	str	r3, [sp, #20]
@@ -16217,20 +16215,20 @@ FtlMapTblRecovery:
 	bl	ftl_memset
 	ldr	r2, .L2322
 	ldr	r3, .L2322+4
-	str	r4, [r7, #32]
+	str	r4, [fp, #32]
 	ldr	r1, [r2]
 	mov	r10, r2
 	mov	r8, r3
-	str	r4, [r7, #28]
+	str	r4, [fp, #28]
 	str	r1, [r3, #8]
 	ldr	r1, .L2322+8
 	ldr	r5, [r1]
 	movw	r1, #65535
 	str	r5, [r3, #12]
-	strh	r1, [r7]	@ movhi
-	strh	r1, [r7, #2]	@ movhi
+	strh	r1, [fp]	@ movhi
+	strh	r1, [fp, #2]	@ movhi
 	movs	r1, #1
-	str	r1, [r7, #36]
+	str	r1, [fp, #36]
 .L2283:
 	ldr	r2, [sp, #16]
 	sxth	r3, r4
@@ -16250,47 +16248,46 @@ FtlMapTblRecovery:
 	bl	FtlGetLastWrittenPage
 	ldr	r3, [sp, #20]
 	sxth	r8, r0
-	strh	r4, [r7]	@ movhi
+	strh	r4, [fp]	@ movhi
 	movs	r4, #0
 	adds	r0, r0, #1
 	mov	r2, r3
 	ldr	r3, [sp, #16]
-	strh	r0, [r7, #2]	@ movhi
+	strh	r0, [fp, #2]	@ movhi
 	ldr	r3, [r2, r3, lsl #2]
-	str	r3, [r7, #28]
+	str	r3, [fp, #28]
 .L2285:
 	sxth	r3, r4
 	cmp	r3, r8
 	ble	.L2288
 .L2301:
 	ldr	r3, .L2322+12
-	cmp	r7, r3
+	cmp	fp, r3
 	str	r3, [sp, #12]
 	bne	.L2290
 	ldr	r3, .L2322+16
 	ldrh	r3, [r3]
 	cbz	r3, .L2290
-	ldr	fp, .L2322+40
-	movs	r4, #0
+	movs	r5, #0
 .L2304:
 	ldr	r3, .L2322+20
 	ldrh	r3, [r3]
-	cmp	r4, r3
-	bcc	.L2311
+	cmp	r5, r3
+	bcc	.L2310
 .L2290:
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_free_no_use_map_blk
 	ldr	r3, .L2322+24
-	ldrh	r2, [r7, #2]
+	ldrh	r2, [fp, #2]
 	ldrh	r3, [r3]
 	cmp	r2, r3
 	bne	.L2303
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_map_blk_alloc_new_blk
 .L2303:
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_map_blk_gc
-	mov	r0, r7
+	mov	r0, fp
 	bl	ftl_map_blk_gc
 	movs	r0, #0
 	add	sp, sp, #32
@@ -16308,10 +16305,10 @@ FtlMapTblRecovery:
 	adds	r3, r3, #1
 	beq	.L2286
 	ldrh	r3, [r5, #8]
-	cmp	fp, r3
+	cmp	r7, r3
 	bls	.L2287
 	ldrh	r1, [r5]
-	ldrh	r2, [r7, #4]
+	ldrh	r2, [fp, #4]
 	cmp	r1, r2
 	bne	.L2287
 	ldr	r2, [r10, #4]
@@ -16322,7 +16319,7 @@ FtlMapTblRecovery:
 	b	.L2285
 .L2286:
 	ldrh	r3, [r6]
-	strh	r3, [r7, #40]	@ movhi
+	strh	r3, [fp, #40]	@ movhi
 	b	.L2287
 .L2284:
 	ldr	r2, [r10]
@@ -16343,16 +16340,16 @@ FtlMapTblRecovery:
 	bl	FlashReadPages
 	ldr	r3, [r8]
 	adds	r3, r3, #1
-	beq	.L2313
+	beq	.L2312
 	ldrh	r2, [r5]
-	ldrh	r3, [r7, #4]
+	ldrh	r3, [fp, #4]
 	cmp	r2, r3
-	bne	.L2313
+	bne	.L2312
 	ldrh	r2, [r5, #8]
 	movw	r3, #64245
 	cmp	r2, r3
 	beq	.L2292
-.L2313:
+.L2312:
 	ldr	r3, .L2322+24
 	movs	r6, #0
 .L2293:
@@ -16374,10 +16371,10 @@ FtlMapTblRecovery:
 	adds	r2, r2, #1
 	beq	.L2297
 	ldrh	r2, [r5, #8]
-	cmp	fp, r2
+	cmp	r7, r2
 	bls	.L2297
 	ldrh	r0, [r5]
-	ldrh	r1, [r7, #4]
+	ldrh	r1, [fp, #4]
 	cmp	r0, r1
 	ittt	eq
 	ldreq	r1, [r8, #4]
@@ -16403,104 +16400,100 @@ FtlMapTblRecovery:
 	ldr	r3, [r6, r3, lsl #3]
 	adds	r1, r1, #1
 	uxth	ip, r3
-	cmp	fp, ip
+	cmp	r7, ip
 	itttt	hi
 	addhi	r0, r0, r6
 	ldrhi	r3, [sp, #12]
 	ldrhi	r0, [r0, #4]
 	strhi	r0, [r3, ip, lsl #2]
 	b	.L2294
-.L2311:
-	ldr	r3, [fp]
-	lsls	r5, r4, #2
-	ldr	r2, [r3, r4, lsl #2]
-	subs	r3, r2, #1
-	adds	r3, r3, #3
+.L2310:
+	ldr	r10, .L2322+44
+	lsls	r6, r5, #2
+	ldr	r3, [r10]
+	ldr	r3, [r3, r5, lsl #2]
+	subs	r2, r3, #1
+	adds	r2, r2, #3
 	bhi	.L2306
-	ldr	r8, .L2322+44
-	ldr	r3, [r8]
-	ldr	r3, [r3, r4, lsl #2]
-	cmp	r2, r3
+	ldr	r7, .L2322+28
+	ldr	r2, [r7]
+	ldr	r2, [r2, r5, lsl #2]
+	cmp	r3, r2
 	beq	.L2306
-	ldr	r3, .L2322
-	ldr	r6, .L2322+4
-	ldr	r3, [r3]
-	str	r2, [r6, #4]
+	ldr	r2, .L2322
+	ldr	r4, .L2322+4
+	ldr	r2, [r2]
+	mov	r0, r4
+	str	r3, [r4, #4]
+	str	r2, [r4, #8]
+	ldr	r2, .L2322+8
+	ldr	r8, [r2]
 	movs	r2, #1
 	mov	r1, r2
-	mov	r0, r6
-	str	r3, [r6, #8]
-	ldr	r3, .L2322+8
-	ldr	r3, [r3]
-	str	r3, [r6, #12]
-	str	r3, [sp, #16]
+	str	r8, [r4, #12]
 	bl	FlashReadPages
-	ldr	r2, [r6]
-	ldr	r3, [sp, #16]
-	adds	r2, r2, #1
-	beq	.L2315
-	ldr	r2, [sp, #12]
-	ldrh	r1, [r3]
-	ldrh	r2, [r2, #4]
-	cmp	r1, r2
-	bne	.L2315
-	ldr	r10, [r3, #4]
-.L2308:
-	ldr	r2, [r8]
-	ldr	r0, .L2322+4
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L2306
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r8]
+	ldrh	r3, [r3, #4]
+	cmp	r2, r3
+	bne	.L2306
+	ldr	r2, [r7]
+	mov	r0, r4
+	ldr	r3, [r8, #4]
+	ldr	r2, [r2, r6]
 	str	r3, [sp, #16]
-	ldr	r2, [r2, r5]
-	str	r2, [r6, #4]
+	str	r2, [r4, #4]
 	movs	r2, #1
 	mov	r1, r2
 	bl	FlashReadPages
+	ldr	r2, [r8, #4]
 	ldr	r3, [sp, #16]
-	ldr	r3, [r3, #4]
-	cmp	r10, r3
+	cmp	r3, r2
 	bls	.L2306
-	ldr	r2, [r8]
-	ldr	r1, [fp]
-	ldr	r0, .L2322+28
-	str	r3, [sp]
-	mov	r3, r10
-	ldr	r2, [r2, r5]
-	ldr	r1, [r1, r5]
+	ldr	r0, [r7]
+	ldr	r1, [r10]
+	str	r2, [sp]
+	ldr	r2, [r0, r6]
+	ldr	r1, [r1, r6]
+	ldr	r0, .L2322+32
 	bl	printf
-	ldr	r3, [fp]
-	ldr	r2, [r8]
-	ldr	r1, [r3, r5]
-	str	r1, [r2, r5]
-	movs	r1, #0
-	ldr	r0, [r3, r5]
-	ldr	r3, .L2322+32
+	ldr	r3, [r10]
+	ldr	r2, [r7]
+	ldr	r1, [r3, r6]
+	str	r1, [r2, r6]
+	movs	r2, #0
+	ldr	r0, [r3, r6]
+	ldr	r3, .L2322+36
 	ubfx	r0, r0, #10, #16
-	ldrh	r2, [r3]
-.L2309:
-	sxth	r5, r1
-	cmp	r5, r2
-	blt	.L2310
-	ldr	r1, .L2322+36
-	ldr	r1, [r1]
-	cmp	r2, r1
+	ldrh	r3, [r3]
+.L2308:
+	sxth	r1, r2
+	cmp	r1, r3
+	blt	.L2309
+	ldr	r2, .L2322+40
+	ldr	r2, [r2]
+	cmp	r3, r2
 	bcs	.L2306
-	ldr	r1, [sp, #8]
-	strh	r0, [r1, r2, lsl #1]	@ movhi
-	ldrh	r2, [r3]
-	adds	r2, r2, #1
-	strh	r2, [r3]	@ movhi
+	ldr	r2, [sp, #8]
+	strh	r0, [r2, r3, lsl #1]	@ movhi
+	ldr	r3, .L2322+36
+	ldr	r2, .L2322+36
+	ldrh	r3, [r3]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
 	bl	remove_from_free_sys_Queue
 	b	.L2306
-.L2315:
-	mov	r10, #0
-	b	.L2308
-.L2310:
-	ldr	r6, [sp, #8]
-	adds	r1, r1, #1
-	ldrh	r5, [r6, r5, lsl #1]
-	cmp	r5, r0
-	bne	.L2309
+.L2309:
+	ldr	r4, [sp, #8]
+	adds	r2, r2, #1
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r0
+	bne	.L2308
 .L2306:
-	adds	r4, r4, #1
+	adds	r5, r5, #1
 	b	.L2304
 .L2323:
 	.align	2
@@ -16512,11 +16505,11 @@ FtlMapTblRecovery:
 	.word	.LANCHOR68
 	.word	.LANCHOR65
 	.word	.LANCHOR52
+	.word	.LANCHOR128
 	.word	.LC42
 	.word	.LANCHOR125
 	.word	.LANCHOR63
 	.word	.LANCHOR192
-	.word	.LANCHOR128
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -16757,7 +16750,7 @@ FtlRecoverySuperblock:
 	ldr	r3, [sp, #12]
 	cbz	r3, .L2340
 	ldr	r1, .L2500+32
-	movw	r2, #1894
+	mov	r2, #1896
 	ldr	r0, .L2500+36
 	bl	printf
 	ldr	r1, .L2500+40
@@ -16769,7 +16762,7 @@ FtlRecoverySuperblock:
 	cmp	r5, r3
 	beq	.L2341
 	ldr	r1, .L2500+32
-	movw	r2, #1895
+	movw	r2, #1897
 	ldr	r0, .L2500+36
 	bl	printf
 	ldr	r1, .L2500+40
@@ -17227,7 +17220,7 @@ FtlRecoverySuperblock:
 	cmp	r3, r0
 	bhi	.L2405
 	ldr	r1, .L2502+48
-	movw	r2, #2177
+	movw	r2, #2179
 	ldr	r0, .L2502+52
 	bl	printf
 	ldr	r1, .L2502+56
@@ -19401,7 +19394,7 @@ ftl_write:
 	cmp	r2, r3
 	bcc	.L2774
 	ldr	r1, .L2823+32
-	movw	r2, #1630
+	mov	r2, #1632
 	ldr	r0, .L2823+36
 	bl	printf
 	ldr	r1, .L2823+40
@@ -19430,7 +19423,7 @@ ftl_write:
 	cmp	r2, r3
 	bcc	.L2776
 	ldr	r1, .L2823+32
-	movw	r2, #1663
+	movw	r2, #1665
 	ldr	r0, .L2823+36
 	bl	printf
 	ldr	r1, .L2823+40
@@ -19585,7 +19578,7 @@ ftl_write:
 	cmp	r2, r3
 	bcc	.L2795
 	ldr	r1, .L2823+32
-	movw	r2, #1737
+	movw	r2, #1739
 	ldr	r0, .L2823+36
 	bl	printf
 	ldr	r1, .L2823+40
@@ -19707,7 +19700,7 @@ ftl_write:
 	ldr	r3, [fp, #8]
 	cmp	r4, r3
 	beq	.L2792
-	movw	r2, #1716
+	movw	r2, #1718
 	ldr	r1, .L2825+28
 	ldr	r0, .L2825+32
 	bl	printf
@@ -19756,7 +19749,7 @@ ftl_write:
 	cmp	r3, r8
 	bcs	.L2800
 	ldr	r1, .L2825+28
-	mov	r2, #1752
+	movw	r2, #1754
 	ldr	r0, .L2825+32
 	bl	printf
 	ldr	r1, .L2825+36
@@ -19890,10 +19883,10 @@ FlashReadFacBbtData:
 	.align	2
 .L2840:
 	.word	.LANCHOR15
-	.word	.LANCHOR143
+	.word	.LANCHOR145
 	.word	.LANCHOR194
 	.word	.LC55
-	.word	.LANCHOR145
+	.word	.LANCHOR147
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -20181,14 +20174,21 @@ FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, .L2907
+	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
+	ldrh	r2, [r3]
+	ldr	r3, .L2907+4
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L2907+8
 	ldr	r3, [r3]
 	cmp	r3, #0
 	bne	.L2878
-	ldr	r6, .L2907+4
-	ldr	r2, .L2907+8
-	ldr	r5, .L2907+12
+	ldr	r6, .L2907+12
+	ldr	r2, .L2907+16
+	ldr	r5, .L2907+20
 	ldrh	r0, [r6]
 	str	r3, [r2]
 	str	r3, [r5]
@@ -20197,12 +20197,12 @@ FtlLowFormat:
 	cbz	r0, .L2879
 	bl	FtlMakeBbt
 .L2879:
-	ldr	r3, .L2907+16
-	ldr	r2, .L2907+20
-	ldr	ip, .L2907+112
+	ldr	r3, .L2907+24
+	ldr	r2, .L2907+28
+	ldr	ip, .L2907+108
 	ldrh	r1, [r3]
 	ldr	r4, [r2]
-	ldr	r2, .L2907+24
+	ldr	r2, .L2907+32
 	str	r3, [sp, #12]
 	lsls	r1, r1, #7
 	ldr	r7, [r2]
@@ -20212,9 +20212,9 @@ FtlLowFormat:
 	adds	r2, r2, #1
 	cmp	r3, r1
 	blt	.L2881
-	ldr	r3, .L2907+28
+	ldr	r3, .L2907+36
 	movs	r7, #0
-	ldr	fp, .L2907+116
+	ldr	fp, .L2907+112
 	ldrh	r4, [r3]
 	mov	r8, r3
 	mov	r10, fp
@@ -20222,7 +20222,7 @@ FtlLowFormat:
 	ldrh	r3, [fp]
 	cmp	r3, r4
 	bhi	.L2883
-	ldr	r4, .L2907+32
+	ldr	r4, .L2907+40
 	subs	r3, r7, #2
 	ldrh	r1, [r4]
 	cmp	r3, r1, lsl #1
@@ -20237,17 +20237,17 @@ FtlLowFormat:
 	cmp	r3, r0
 	bhi	.L2889
 	ldrh	r2, [r10]
-	ldr	r3, .L2907+36
+	ldr	r3, .L2907+44
 	ldrh	r4, [r4]
-	ldr	r7, .L2907+40
+	ldr	r7, .L2907+48
 	str	r2, [r3]
-	ldr	r3, .L2907+44
+	ldr	r3, .L2907+52
 	mov	r1, r4
 	ldr	r3, [r3]
 	mov	r0, r3
 	str	r3, [sp, #16]
 	bl	__aeabi_uidiv
-	ldr	r1, .L2907+48
+	ldr	r1, .L2907+56
 	ubfx	r3, r0, #5, #16
 	add	r2, r3, #36
 	mov	fp, r0
@@ -20269,11 +20269,11 @@ FtlLowFormat:
 	adds	r0, r0, #24
 	strh	r0, [r3]	@ movhi
 .L2890:
-	ldr	r3, .L2907+52
+	ldr	r3, .L2907+60
 	ldr	r3, [r3]
 	cmp	r3, #1
 	bne	.L2891
-	ldr	r2, .L2907+48
+	ldr	r2, .L2907+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20286,10 +20286,10 @@ FtlLowFormat:
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
 .L2891:
-	ldr	r3, .L2907+56
+	ldr	r3, .L2907+64
 	ldrb	r3, [r3]	@ zero_extendqisi2
 	cbz	r3, .L2892
-	ldr	r2, .L2907+48
+	ldr	r2, .L2907+56
 	mov	r1, r4
 	mov	r0, r6
 	ldrh	r3, [r2]
@@ -20302,10 +20302,10 @@ FtlLowFormat:
 	add	r3, r3, r0, asr #2
 	strh	r3, [r2]	@ movhi
 .L2892:
-	ldr	r3, .L2907+60
+	ldr	r3, .L2907+68
 	ldrh	r3, [r3]
 	cbz	r3, .L2894
-	ldr	r2, .L2907+48
+	ldr	r2, .L2907+56
 	ldrh	r1, [r2]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2]	@ movhi
@@ -20319,37 +20319,37 @@ FtlLowFormat:
 	strh	r1, [r2]	@ movhi
 .L2894:
 	ldr	r3, [sp, #8]
-	ldr	r6, .L2907+64
+	ldr	r6, .L2907+72
 	ldrh	r2, [r3]
 	ldr	r3, [r7]
 	subs	r3, r3, r2
 	muls	r4, r3, r4
-	ldr	r3, .L2907+68
+	ldr	r3, .L2907+76
 	ldrh	r3, [r3]
 	str	r4, [r6]
 	muls	r4, r3, r4
 	ldr	r3, [sp, #12]
 	ldrh	r3, [r3]
 	str	r4, [r7]
-	ldr	r7, .L2907+72
+	ldr	r7, .L2907+80
 	muls	r4, r3, r4
-	ldr	r3, .L2907+76
+	ldr	r3, .L2907+84
 	str	r4, [r3]
 	movw	r4, #65535
 	bl	FtlBbmTblFlush
 	ldrh	r2, [r10]
 	movs	r1, #0
-	ldr	r10, .L2907+120
+	ldr	r10, .L2907+116
 	lsls	r2, r2, #1
 	ldr	r0, [r10]
 	bl	ftl_memset
-	ldr	r2, .L2907+80
+	ldr	r2, .L2907+88
 	movs	r3, #0
 	strh	r3, [r7, #2]	@ movhi
 	movs	r1, #255
 	strb	r3, [r7, #6]
 	str	r3, [r2]
-	ldr	r2, .L2907+84
+	ldr	r2, .L2907+92
 	strh	r3, [r7]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
@@ -20360,7 +20360,7 @@ FtlLowFormat:
 	mov	r8, r10
 	strb	r3, [r7, #8]
 	mov	r10, r7
-	ldr	r3, .L2907+88
+	ldr	r3, .L2907+96
 	lsrs	r2, r2, #3
 	ldr	r0, [r3]
 	bl	ftl_memset
@@ -20395,7 +20395,7 @@ FtlLowFormat:
 .L2884:
 	mov	r0, r7
 	bl	__aeabi_uidiv
-	ldr	r3, .L2907+92
+	ldr	r3, .L2907+100
 	ldr	r3, [r3]
 	add	r0, r0, r3
 	uxth	r0, r0
@@ -20422,7 +20422,7 @@ FtlLowFormat:
 .L2897:
 	ldr	r3, [r5]
 	ldrh	r1, [r7, #4]
-	ldr	r4, .L2907+96
+	ldr	r4, .L2907+104
 	str	r3, [r7, #12]
 	adds	r3, r3, #1
 	str	r3, [r5]
@@ -20443,13 +20443,47 @@ FtlLowFormat:
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r4]
-	cbnz	r3, .L2899
+	cmp	r3, #0
+	bne	.L2899
 	ldr	r3, [r8]
 	strh	r7, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4]
 	adds	r3, r3, #1
 	strh	r3, [r4]	@ movhi
 	b	.L2898
+.L2908:
+	.align	2
+.L2907:
+	.word	.LANCHOR65
+	.word	.LANCHOR192
+	.word	.LANCHOR75
+	.word	.LANCHOR37
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.word	.LANCHOR54
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR38
+	.word	.LANCHOR36
+	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LANCHOR40
+	.word	.LANCHOR227
+	.word	.LANCHOR101
+	.word	.LANCHOR8
+	.word	.LANCHOR47
+	.word	.LANCHOR226
+	.word	.LANCHOR51
+	.word	.LANCHOR90
+	.word	.LANCHOR67
+	.word	.LANCHOR99
+	.word	.LANCHOR201
+	.word	.LANCHOR0
+	.word	.LANCHOR64
+	.word	.LANCHOR91
+	.word	168778952
+	.word	.LANCHOR39
+	.word	.LANCHOR82
 .L2899:
 	ldr	r3, [r5]
 	ldrh	r1, [r4, #4]
@@ -20459,10 +20493,10 @@ FtlLowFormat:
 	movw	r4, #65535
 	ldr	r3, [r8]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2907+100
+	ldr	r3, .L2909
 	strh	r4, [r3]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2907+104
+	ldr	r3, .L2909+4
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r2, [r6]
@@ -20476,7 +20510,7 @@ FtlLowFormat:
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
 	cbnz	r0, .L2878
-	ldr	r3, .L2907+108
+	ldr	r3, .L2909+8
 	movs	r2, #1
 	str	r2, [r3]
 .L2878:
@@ -20484,40 +20518,12 @@ FtlLowFormat:
 	add	sp, sp, #24
 	@ sp needed
 	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
-.L2908:
+.L2910:
 	.align	2
-.L2907:
-	.word	.LANCHOR75
-	.word	.LANCHOR37
-	.word	.LANCHOR158
-	.word	.LANCHOR157
-	.word	.LANCHOR54
-	.word	.LANCHOR183
-	.word	.LANCHOR184
-	.word	.LANCHOR38
-	.word	.LANCHOR36
-	.word	.LANCHOR72
-	.word	.LANCHOR71
-	.word	.LANCHOR40
-	.word	.LANCHOR227
-	.word	.LANCHOR101
-	.word	.LANCHOR8
-	.word	.LANCHOR47
-	.word	.LANCHOR226
-	.word	.LANCHOR51
-	.word	.LANCHOR90
-	.word	.LANCHOR67
-	.word	.LANCHOR99
-	.word	.LANCHOR201
-	.word	.LANCHOR0
-	.word	.LANCHOR64
-	.word	.LANCHOR91
+.L2909:
 	.word	.LANCHOR92
 	.word	.LANCHOR206
 	.word	.LANCHOR223
-	.word	168778952
-	.word	.LANCHOR39
-	.word	.LANCHOR82
 	.size	FtlLowFormat, .-FtlLowFormat
 	.global	FtlMallocOffset
 	.global	FtlMallocBuffer
@@ -20764,7 +20770,7 @@ DieCsIndex:
 	.space	8
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-	.set	.LANCHOR148,. + 0
+	.set	.LANCHOR142,. + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -21074,7 +21080,7 @@ gFlashOnfiModeEn:
 	.space	1
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-	.set	.LANCHOR143,. + 0
+	.set	.LANCHOR145,. + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 4
 gFlashPageBuffer0:
@@ -21178,14 +21184,14 @@ gNandFlashIDBEccBits:
 	.space	1
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR145,. + 0
+	.set	.LANCHOR147,. + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
 	.space	4
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-	.set	.LANCHOR144,. + 0
+	.set	.LANCHOR146,. + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -21208,7 +21214,7 @@ gNandFlashResEndPageAddr:
 gNandIDBResBlkNum:
 	.space	1
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-	.set	.LANCHOR146,. + 0
+	.set	.LANCHOR148,. + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
@@ -21605,7 +21611,7 @@ g_l2p_last_update_region_id:
 g_maxRegNum:
 	.space	1
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-	.set	.LANCHOR147,. + 0
+	.set	.LANCHOR149,. + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
@@ -21848,7 +21854,7 @@ gc_ink_free_return_value:
 	.space	2
 	.section	.bss.gpFlashSaveInfo,"aw",%nobits
 	.align	2
-	.set	.LANCHOR142,. + 0
+	.set	.LANCHOR144,. + 0
 	.type	gpFlashSaveInfo, %object
 	.size	gpFlashSaveInfo, 4
 gpFlashSaveInfo:
@@ -21875,7 +21881,7 @@ gpNandc1:
 	.space	4
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-	.set	.LANCHOR149,. + 0
+	.set	.LANCHOR143,. + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
@@ -24656,11 +24662,11 @@ refValueDefault:
 	.byte	-32
 	.byte	-37
 	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
-.LC8:
+.LC7:
 	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC9:
+.LC8:
 	.ascii	"sync para %d\012\000"
-.LC10:
+.LC9:
 	.ascii	"TOG mode Read error %x %x\012\000"
 	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
 .LC1:
@@ -24686,7 +24692,7 @@ refValueDefault:
 .LC12:
 	.ascii	"ECC:%d\012\000"
 	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
-.LC11:
+.LC10:
 	.ascii	"read retry status %x %x %x\012\000"
 	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
 .LC23:
@@ -24717,7 +24723,7 @@ refValueDefault:
 	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
 .LC48:
-	.ascii	"FTL version: 5.0.47 20171221\000"
+	.ascii	"FTL version: 5.0.47 20180208\000"
 .LC49:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
@@ -24766,187 +24772,187 @@ refValueDefault:
 .LC6:
 	.ascii	"%s\012\000"
 	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
-.LC7:
+.LC11:
 	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-	.section	.rodata.__func__.10400,"a",%progbits
+	.section	.rodata.__func__.10401,"a",%progbits
 	.set	.LANCHOR240,. + 0
-	.type	__func__.10400, %object
-	.size	__func__.10400, 8
-__func__.10400:
+	.type	__func__.10401, %object
+	.size	__func__.10401, 8
+__func__.10401:
 	.ascii	"FtlInit\000"
-	.section	.rodata.__func__.10460,"a",%progbits
+	.section	.rodata.__func__.10461,"a",%progbits
 	.set	.LANCHOR220,. + 0
-	.type	__func__.10460, %object
-	.size	__func__.10460, 13
-__func__.10460:
+	.type	__func__.10461, %object
+	.size	__func__.10461, 13
+__func__.10461:
 	.ascii	"FtlProgPages\000"
-	.section	.rodata.__func__.10486,"a",%progbits
+	.section	.rodata.__func__.10487,"a",%progbits
 	.set	.LANCHOR242,. + 0
-	.type	__func__.10486, %object
-	.size	__func__.10486, 10
-__func__.10486:
+	.type	__func__.10487, %object
+	.size	__func__.10487, 10
+__func__.10487:
 	.ascii	"ftl_write\000"
-	.section	.rodata.__func__.10549,"a",%progbits
+	.section	.rodata.__func__.10550,"a",%progbits
 	.set	.LANCHOR121,. + 0
-	.type	__func__.10549, %object
-	.size	__func__.10549, 14
-__func__.10549:
+	.type	__func__.10550, %object
+	.size	__func__.10550, 14
+__func__.10550:
 	.ascii	"FtlBbt2Bitmap\000"
-	.section	.rodata.__func__.10595,"a",%progbits
+	.section	.rodata.__func__.10596,"a",%progbits
 	.set	.LANCHOR208,. + 0
-	.type	__func__.10595, %object
-	.size	__func__.10595, 11
-__func__.10595:
+	.type	__func__.10596, %object
+	.size	__func__.10596, 11
+__func__.10596:
 	.ascii	"FtlLoadBbt\000"
-	.section	.rodata.__func__.10704,"a",%progbits
+	.section	.rodata.__func__.10705,"a",%progbits
 	.set	.LANCHOR88,. + 0
-	.type	__func__.10704, %object
-	.size	__func__.10704, 17
-__func__.10704:
+	.type	__func__.10705, %object
+	.size	__func__.10705, 17
+__func__.10705:
 	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.10708,"a",%progbits
+	.section	.rodata.__func__.10709,"a",%progbits
 	.set	.LANCHOR85,. + 0
-	.type	__func__.10708, %object
-	.size	__func__.10708, 17
-__func__.10708:
+	.type	__func__.10709, %object
+	.size	__func__.10709, 17
+__func__.10709:
 	.ascii	"INSERT_DATA_LIST\000"
-	.section	.rodata.__func__.10738,"a",%progbits
+	.section	.rodata.__func__.10739,"a",%progbits
 	.set	.LANCHOR89,. + 0
-	.type	__func__.10738, %object
-	.size	__func__.10738, 17
-__func__.10738:
+	.type	__func__.10739, %object
+	.size	__func__.10739, 17
+__func__.10739:
 	.ascii	"List_remove_node\000"
-	.section	.rodata.__func__.10768,"a",%progbits
+	.section	.rodata.__func__.10769,"a",%progbits
 	.set	.LANCHOR93,. + 0
-	.type	__func__.10768, %object
-	.size	__func__.10768, 22
-__func__.10768:
+	.type	__func__.10769, %object
+	.size	__func__.10769, 22
+__func__.10769:
 	.ascii	"List_update_data_list\000"
-	.section	.rodata.__func__.10775,"a",%progbits
+	.section	.rodata.__func__.10776,"a",%progbits
 	.set	.LANCHOR212,. + 0
-	.type	__func__.10775, %object
-	.size	__func__.10775, 16
-__func__.10775:
+	.type	__func__.10776, %object
+	.size	__func__.10776, 16
+__func__.10776:
 	.ascii	"load_l2p_region\000"
-	.section	.rodata.__func__.10805,"a",%progbits
+	.section	.rodata.__func__.10806,"a",%progbits
 	.set	.LANCHOR94,. + 0
-	.type	__func__.10805, %object
-	.size	__func__.10805, 26
-__func__.10805:
+	.type	__func__.10806, %object
+	.size	__func__.10806, 26
+__func__.10806:
 	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.rodata.__func__.10819,"a",%progbits
+	.section	.rodata.__func__.10820,"a",%progbits
 	.set	.LANCHOR209,. + 0
-	.type	__func__.10819, %object
-	.size	__func__.10819, 15
-__func__.10819:
+	.type	__func__.10820, %object
+	.size	__func__.10820, 15
+__func__.10820:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.rodata.__func__.10832,"a",%progbits
+	.section	.rodata.__func__.10833,"a",%progbits
 	.set	.LANCHOR210,. + 0
-	.type	__func__.10832, %object
-	.size	__func__.10832, 31
-__func__.10832:
+	.type	__func__.10833, %object
+	.size	__func__.10833, 31
+__func__.10833:
 	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.10845,"a",%progbits
+	.section	.rodata.__func__.10846,"a",%progbits
 	.set	.LANCHOR211,. + 0
-	.type	__func__.10845, %object
-	.size	__func__.10845, 16
-__func__.10845:
+	.type	__func__.10846, %object
+	.size	__func__.10846, 16
+__func__.10846:
 	.ascii	"FtlMapWritePage\000"
-	.section	.rodata.__func__.10865,"a",%progbits
+	.section	.rodata.__func__.10866,"a",%progbits
 	.set	.LANCHOR97,. + 0
-	.type	__func__.10865, %object
-	.size	__func__.10865, 22
-__func__.10865:
+	.type	__func__.10866, %object
+	.size	__func__.10866, 22
+__func__.10866:
 	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.10881,"a",%progbits
+	.section	.rodata.__func__.10882,"a",%progbits
 	.set	.LANCHOR213,. + 0
-	.type	__func__.10881, %object
-	.size	__func__.10881, 9
-__func__.10881:
+	.type	__func__.10882, %object
+	.size	__func__.10882, 9
+__func__.10882:
 	.ascii	"log2phys\000"
-	.section	.rodata.__func__.10943,"a",%progbits
+	.section	.rodata.__func__.10944,"a",%progbits
 	.set	.LANCHOR207,. + 0
-	.type	__func__.10943, %object
-	.size	__func__.10943, 15
-__func__.10943:
+	.type	__func__.10944, %object
+	.size	__func__.10944, 15
+__func__.10944:
 	.ascii	"FtlVpcTblFlush\000"
-	.section	.rodata.__func__.10962,"a",%progbits
+	.section	.rodata.__func__.10963,"a",%progbits
 	.set	.LANCHOR224,. + 0
-	.type	__func__.10962, %object
-	.size	__func__.10962, 14
-__func__.10962:
+	.type	__func__.10963, %object
+	.size	__func__.10963, 14
+__func__.10963:
 	.ascii	"FtlScanSysBlk\000"
-	.section	.rodata.__func__.11016,"a",%progbits
+	.section	.rodata.__func__.11017,"a",%progbits
 	.set	.LANCHOR225,. + 0
-	.type	__func__.11016, %object
-	.size	__func__.11016, 15
-__func__.11016:
+	.type	__func__.11017, %object
+	.size	__func__.11017, 15
+__func__.11017:
 	.ascii	"FtlLoadSysInfo\000"
-	.section	.rodata.__func__.11085,"a",%progbits
+	.section	.rodata.__func__.11087,"a",%progbits
 	.set	.LANCHOR214,. + 0
-	.type	__func__.11085, %object
-	.size	__func__.11085, 16
-__func__.11085:
+	.type	__func__.11087, %object
+	.size	__func__.11087, 16
+__func__.11087:
 	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.11118,"a",%progbits
+	.section	.rodata.__func__.11120,"a",%progbits
 	.set	.LANCHOR228,. + 0
-	.type	__func__.11118, %object
-	.size	__func__.11118, 22
-__func__.11118:
+	.type	__func__.11120, %object
+	.size	__func__.11120, 22
+__func__.11120:
 	.ascii	"FtlRecoverySuperblock\000"
-	.section	.rodata.__func__.11172,"a",%progbits
+	.section	.rodata.__func__.11174,"a",%progbits
 	.set	.LANCHOR100,. + 0
-	.type	__func__.11172, %object
-	.size	__func__.11172, 16
-__func__.11172:
+	.type	__func__.11174, %object
+	.size	__func__.11174, 16
+__func__.11174:
 	.ascii	"make_superblock\000"
-	.section	.rodata.__func__.11192,"a",%progbits
+	.section	.rodata.__func__.11194,"a",%progbits
 	.set	.LANCHOR138,. + 0
-	.type	__func__.11192, %object
-	.size	__func__.11192, 18
-__func__.11192:
+	.type	__func__.11194, %object
+	.size	__func__.11194, 18
+__func__.11194:
 	.ascii	"SupperBlkListInit\000"
-	.section	.rodata.__func__.11269,"a",%progbits
+	.section	.rodata.__func__.11271,"a",%progbits
 	.set	.LANCHOR200,. + 0
-	.type	__func__.11269, %object
-	.size	__func__.11269, 25
-__func__.11269:
+	.type	__func__.11271, %object
+	.size	__func__.11271, 25
+__func__.11271:
 	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.11283,"a",%progbits
+	.section	.rodata.__func__.11285,"a",%progbits
 	.set	.LANCHOR219,. + 0
-	.type	__func__.11283, %object
-	.size	__func__.11283, 29
-__func__.11283:
+	.type	__func__.11285, %object
+	.size	__func__.11285, 29
+__func__.11285:
 	.ascii	"allocate_new_data_superblock\000"
-	.section	.rodata.__func__.11289,"a",%progbits
+	.section	.rodata.__func__.11291,"a",%progbits
 	.set	.LANCHOR205,. + 0
-	.type	__func__.11289, %object
-	.size	__func__.11289, 19
-__func__.11289:
+	.type	__func__.11291, %object
+	.size	__func__.11291, 19
+__func__.11291:
 	.ascii	"get_new_active_ppa\000"
-	.section	.rodata.__func__.11300,"a",%progbits
+	.section	.rodata.__func__.11302,"a",%progbits
 	.set	.LANCHOR203,. + 0
-	.type	__func__.11300, %object
-	.size	__func__.11300, 16
-__func__.11300:
+	.type	__func__.11302, %object
+	.size	__func__.11302, 16
+__func__.11302:
 	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.11305,"a",%progbits
+	.section	.rodata.__func__.11307,"a",%progbits
 	.set	.LANCHOR204,. + 0
-	.type	__func__.11305, %object
-	.size	__func__.11305, 20
-__func__.11305:
+	.type	__func__.11307, %object
+	.size	__func__.11307, 20
+__func__.11307:
 	.ascii	"decrement_vpc_count\000"
-	.section	.rodata.__func__.11373,"a",%progbits
+	.section	.rodata.__func__.11375,"a",%progbits
 	.set	.LANCHOR234,. + 0
-	.type	__func__.11373, %object
-	.size	__func__.11373, 19
-__func__.11373:
+	.type	__func__.11375, %object
+	.size	__func__.11375, 19
+__func__.11375:
 	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.11467,"a",%progbits
+	.section	.rodata.__func__.11469,"a",%progbits
 	.set	.LANCHOR238,. + 0
-	.type	__func__.11467, %object
-	.size	__func__.11467, 23
-__func__.11467:
+	.type	__func__.11469, %object
+	.size	__func__.11469, 23
+__func__.11469:
 	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
 .LC31:
diff --git a/drivers/rknand/rk_ftl_arm_v8.S b/drivers/rknand/rk_ftl_arm_v8.S
new file mode 100644
index 0000000000..bb62e2bc66
--- /dev/null
+++ b/drivers/rknand/rk_ftl_arm_v8.S
@@ -0,0 +1,22679 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2018-02-08
+ */
+	.arch armv8-a
+	.file	"rk_ftl_arm_v8.S"
+	.section	.text.ftl_set_blk_mode.part.9,"ax",@progbits
+	.align	2
+	.type	ftl_set_blk_mode.part.9, %function
+ftl_set_blk_mode.part.9:
+	and	w0, w0, 65535
+	adrp	x2, .LANCHOR0
+	ubfx	x1, x0, 5, 11
+	ldr	x3, [x2, #:lo12:.LANCHOR0]
+	lsl	x1, x1, 2
+	and	w0, w0, 31
+	mov	w2, 1
+	lsl	w2, w2, w0
+	ldr	w0, [x3, x1]
+	orr	w0, w0, w2
+	str	w0, [x3, x1]
+	ret
+	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
+	.section	.text.FlashMemCmp8,"ax",@progbits
+	.align	2
+	.global	FlashMemCmp8
+	.type	FlashMemCmp8, %function
+FlashMemCmp8:
+	adrp	x3, .LANCHOR1
+	ldrb	w3, [x3, #:lo12:.LANCHOR1]
+	cbz	w3, .L7
+	ldrb	w4, [x0, 1]
+	ldrb	w3, [x1, 1]
+	cmp	w4, w3
+	beq	.L8
+.L7:
+	mov	x3, 0
+.L5:
+	mov	w4, w3
+	cmp	w3, w2
+	bcc	.L6
+.L8:
+	mov	w0, 0
+	ret
+.L6:
+	ldrb	w5, [x0, x3]
+	add	x3, x3, 1
+	add	x6, x1, x3
+	ldrb	w6, [x6, -1]
+	cmp	w6, w5
+	beq	.L5
+	add	w0, w4, 1
+	ret
+	.size	FlashMemCmp8, .-FlashMemCmp8
+	.section	.text.FlashRsvdBlkChk,"ax",@progbits
+	.align	2
+	.global	FlashRsvdBlkChk
+	.type	FlashRsvdBlkChk, %function
+FlashRsvdBlkChk:
+	adrp	x2, .LANCHOR2
+	adrp	x3, .LANCHOR3
+	and	w0, w0, 255
+	ldrb	w2, [x2, #:lo12:.LANCHOR2]
+	ldr	w3, [x3, #:lo12:.LANCHOR3]
+	mul	w2, w2, w3
+	cmp	w2, w1
+	bls	.L12
+	cmp	w0, 0
+	cset	w0, ne
+	ret
+.L12:
+	mov	w0, 1
+	ret
+	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
+	.section	.text.FlashGetRandomizer,"ax",@progbits
+	.align	2
+	.global	FlashGetRandomizer
+	.type	FlashGetRandomizer, %function
+FlashGetRandomizer:
+	and	x3, x1, 127
+	adrp	x2, .LANCHOR4
+	add	x2, x2, :lo12:.LANCHOR4
+	ldrh	w4, [x2, x3, lsl 1]
+	adrp	x2, .LANCHOR5
+	ldrb	w2, [x2, #:lo12:.LANCHOR5]
+	cbz	w2, .L21
+	stp	x29, x30, [sp, -16]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	bl	FlashRsvdBlkChk
+	cmp	w0, 0
+	orr	w1, w4, -1073741824
+	csel	w4, w1, w4, ne
+	mov	w0, w4
+	ldp	x29, x30, [sp], 16
+	ret
+.L21:
+	mov	w0, w4
+	ret
+	.size	FlashGetRandomizer, .-FlashGetRandomizer
+	.section	.text.FlashSetRandomizer,"ax",@progbits
+	.align	2
+	.global	FlashSetRandomizer
+	.type	FlashSetRandomizer, %function
+FlashSetRandomizer:
+	and	w5, w0, 255
+	and	x2, x1, 127
+	adrp	x0, .LANCHOR4
+	add	x0, x0, :lo12:.LANCHOR4
+	ldrh	w4, [x0, x2, lsl 1]
+	adrp	x0, .LANCHOR5
+	ldrb	w0, [x0, #:lo12:.LANCHOR5]
+	cbz	w0, .L32
+	stp	x29, x30, [sp, -16]!
+	mov	w0, w5
+	add	x29, sp, 0
+	bl	FlashRsvdBlkChk
+	cmp	w0, 0
+	sbfiz	x5, x5, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	orr	w1, w4, -1073741824
+	csel	w4, w1, w4, ne
+	ldr	x0, [x0, x5]
+	str	w4, [x0, 336]
+	ldp	x29, x30, [sp], 16
+	ret
+.L32:
+	sbfiz	x5, x5, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	ldr	x0, [x0, x5]
+	str	w4, [x0, 336]
+	ret
+	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashReadCmd,"ax",@progbits
+	.align	2
+	.global	FlashReadCmd
+	.type	FlashReadCmd, %function
+FlashReadCmd:
+	and	w0, w0, 255
+	adrp	x4, .LANCHOR6
+	sbfiz	x5, x0, 4, 32
+	add	x4, x4, :lo12:.LANCHOR6
+	add	x2, x4, x5
+	lsr	w3, w1, 16
+	ldr	x4, [x4, x5]
+	ldrb	w2, [x2, 8]
+	add	x2, x4, x2, lsl 8
+	and	w4, w1, 255
+	str	wzr, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	mov	w3, 48
+	str	w3, [x2, 2056]
+	b	FlashSetRandomizer
+	.size	FlashReadCmd, .-FlashReadCmd
+	.section	.text.FlashReadDpDataOutCmd,"ax",@progbits
+	.align	2
+	.global	FlashReadDpDataOutCmd
+	.type	FlashReadDpDataOutCmd, %function
+FlashReadDpDataOutCmd:
+	and	w0, w0, 255
+	adrp	x2, .LANCHOR6
+	sbfiz	x3, x0, 4, 32
+	add	x2, x2, :lo12:.LANCHOR6
+	add	x4, x2, x3
+	and	w5, w1, 255
+	ldr	x6, [x2, x3]
+	adrp	x2, .LANCHOR7+16
+	lsr	w3, w1, 16
+	ldrb	w2, [x2, #:lo12:.LANCHOR7+16]
+	cmp	w2, 1
+	ldrb	w2, [x4, 8]
+	lsr	w4, w1, 8
+	add	x2, x6, x2, lsl 8
+	bne	.L37
+	mov	w6, 6
+	str	w6, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w5, [x2, 2052]
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+.L39:
+	mov	w3, 224
+	str	w3, [x2, 2056]
+	b	FlashSetRandomizer
+.L37:
+	str	wzr, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w5, [x2, 2052]
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	mov	w3, 5
+	str	w3, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	b	.L39
+	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
+	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_enter_slc_mode
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	adrp	x1, .LANCHOR8
+	and	w0, w0, 255
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L40
+	sbfiz	x0, x0, 4, 32
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x1, [x1, x0]
+	ldrb	w0, [x2, 8]
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	mov	w1, 218
+	str	w1, [x0, 8]
+.L40:
+	ret
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_exit_slc_mode
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	adrp	x1, .LANCHOR8
+	and	w0, w0, 255
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L45
+	sbfiz	x0, x0, 4, 32
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x1, [x1, x0]
+	ldrb	w0, [x2, 8]
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	mov	w1, 223
+	str	w1, [x0, 8]
+.L45:
+	ret
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.FlashProgFirstCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgFirstCmd
+	.type	FlashProgFirstCmd, %function
+FlashProgFirstCmd:
+	and	w0, w0, 255
+	adrp	x4, .LANCHOR6
+	sbfiz	x5, x0, 4, 32
+	add	x4, x4, :lo12:.LANCHOR6
+	add	x2, x4, x5
+	lsr	w3, w1, 16
+	ldr	x4, [x4, x5]
+	ldrb	w2, [x2, 8]
+	add	x2, x4, x2, lsl 8
+	mov	w4, 128
+	str	w4, [x2, 2056]
+	and	w4, w1, 255
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	b	FlashSetRandomizer
+	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
+	.section	.text.FlashEraseCmd,"ax",@progbits
+	.align	2
+	.global	FlashEraseCmd
+	.type	FlashEraseCmd, %function
+FlashEraseCmd:
+	ubfiz	x0, x0, 4, 8
+	adrp	x3, .LANCHOR6
+	add	x3, x3, :lo12:.LANCHOR6
+	add	x4, x3, x0
+	ldr	x3, [x3, x0]
+	ldrb	w0, [x4, 8]
+	cbz	w2, .L52
+	add	x2, x3, x0, lsl 8
+	mov	w4, 96
+	str	w4, [x2, 2056]
+	and	w4, w1, 255
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 16
+	str	w4, [x2, 2052]
+	adrp	x2, .LANCHOR3
+	ldr	w2, [x2, #:lo12:.LANCHOR3]
+	add	w1, w1, w2
+.L52:
+	add	x0, x3, x0, lsl 8
+	mov	w2, 96
+	str	w2, [x0, 2056]
+	and	w2, w1, 255
+	str	w2, [x0, 2052]
+	lsr	w2, w1, 8
+	str	w2, [x0, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x0, 2052]
+	mov	w1, 208
+	str	w1, [x0, 2056]
+	ret
+	.size	FlashEraseCmd, .-FlashEraseCmd
+	.section	.text.FlashProgDpSecondCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgDpSecondCmd
+	.type	FlashProgDpSecondCmd, %function
+FlashProgDpSecondCmd:
+	and	w0, w0, 255
+	adrp	x2, .LANCHOR7+11
+	sbfiz	x5, x0, 4, 32
+	adrp	x4, .LANCHOR6
+	add	x4, x4, :lo12:.LANCHOR6
+	ldrb	w6, [x2, #:lo12:.LANCHOR7+11]
+	add	x2, x4, x5
+	lsr	w3, w1, 16
+	ldr	x4, [x4, x5]
+	ldrb	w2, [x2, 8]
+	add	x2, x4, x2, lsl 8
+	and	w4, w1, 255
+	str	w6, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w4, [x2, 2052]
+	lsr	w4, w1, 8
+	str	w4, [x2, 2052]
+	str	w3, [x2, 2052]
+	b	FlashSetRandomizer
+	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
+	.section	.text.FlashProgSecondCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgSecondCmd
+	.type	FlashProgSecondCmd, %function
+FlashProgSecondCmd:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x1, [x1, x0]
+	ldrb	w0, [x2, 8]
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	mov	w1, 16
+	str	w1, [x0, 8]
+	ret
+	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
+	.section	.text.FlashProgDpFirstCmd,"ax",@progbits
+	.align	2
+	.global	FlashProgDpFirstCmd
+	.type	FlashProgDpFirstCmd, %function
+FlashProgDpFirstCmd:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x3, x1, x0
+	ldr	x2, [x1, x0]
+	adrp	x0, .LANCHOR7+10
+	ldrb	w1, [x0, #:lo12:.LANCHOR7+10]
+	ldrb	w0, [x3, 8]
+	add	x0, x0, 8
+	add	x0, x2, x0, lsl 8
+	str	w1, [x0, 8]
+	ret
+	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
+	.section	.text.FlashReadStatus,"ax",@progbits
+	.align	2
+	.global	FlashReadStatus
+	.type	FlashReadStatus, %function
+FlashReadStatus:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	stp	x29, x30, [sp, -32]!
+	add	x2, x1, x0
+	add	x29, sp, 0
+	ldr	x0, [x1, x0]
+	str	x19, [sp, 16]
+	ldrb	w19, [x2, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 112
+	str	w0, [x19, 2056]
+	mov	x0, 80
+	bl	udelay
+	ldr	w0, [x19, 2048]
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashReadStatus, .-FlashReadStatus
+	.section	.text.JSHash,"ax",@progbits
+	.align	2
+	.global	JSHash
+	.type	JSHash, %function
+JSHash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L62:
+	cmp	w1, w3
+	bhi	.L63
+	ret
+.L63:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L62
+	.size	JSHash, .-JSHash
+	.section	.text.FlashLoadIdbInfo,"ax",@progbits
+	.align	2
+	.global	FlashLoadIdbInfo
+	.type	FlashLoadIdbInfo, %function
+FlashLoadIdbInfo:
+	mov	w0, 0
+	ret
+	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
+	.section	.text.FlashPrintInfo,"ax",@progbits
+	.align	2
+	.global	FlashPrintInfo
+	.type	FlashPrintInfo, %function
+FlashPrintInfo:
+	ret
+	.size	FlashPrintInfo, .-FlashPrintInfo
+	.section	.text.ToshibaSetRRPara,"ax",@progbits
+	.align	2
+	.global	ToshibaSetRRPara
+	.type	ToshibaSetRRPara, %function
+ToshibaSetRRPara:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	str	x27, [sp, 80]
+	and	w27, w1, 255
+	add	w2, w27, 1
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	mov	w0, 5
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR9
+	umull	x2, w2, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR10
+	add	x20, x20, :lo12:.LANCHOR9
+	add	x24, x0, :lo12:.LANCHOR10
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LANCHOR13
+	adrp	x25, .LANCHOR11
+	adrp	x26, .LANCHOR12
+	add	x23, x23, :lo12:.LANCHOR13
+	add	x25, x25, :lo12:.LANCHOR11
+	add	x26, x26, :lo12:.LANCHOR12
+	add	x20, x20, x2
+	add	x24, x24, x2
+	mov	x22, x0
+	mov	x19, 0
+.L67:
+	ldrb	w0, [x23]
+	cmp	w0, w19
+	bhi	.L71
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L71:
+	mov	w0, 85
+	str	w0, [x21, 8]
+	add	x0, x22, :lo12:.LANCHOR10
+	ldrsb	w0, [x19, x0]
+	str	w0, [x21, 4]
+	mov	x0, 200
+	bl	udelay
+	ldrb	w0, [x25]
+	cmp	w0, 34
+	bne	.L68
+	ldrsb	w0, [x24, x19]
+.L73:
+	add	x19, x19, 1
+	str	w0, [x21]
+	b	.L67
+.L68:
+	cmp	w0, 35
+	bne	.L70
+	ldrsb	w0, [x20, x19]
+	b	.L73
+.L70:
+	ldrsb	w0, [x26, w27, sxtw]
+	b	.L73
+	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
+	.section	.text.SamsungSetRRPara,"ax",@progbits
+	.align	2
+	.global	SamsungSetRRPara
+	.type	SamsungSetRRPara, %function
+SamsungSetRRPara:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ubfiz	x21, x1, 2, 8
+	mov	x22, x0
+	add	x21, x21, 4
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	stp	x19, x20, [sp, 16]
+	add	x21, x0, x21
+	stp	x23, x24, [sp, 48]
+	mov	x19, x0
+	adrp	x23, .LANCHOR13
+	add	x23, x23, :lo12:.LANCHOR13
+	mov	x20, 0
+	mov	w24, 161
+.L75:
+	ldrb	w0, [x23]
+	cmp	w0, w20
+	bhi	.L76
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L76:
+	str	w24, [x22, 8]
+	str	wzr, [x22]
+	ldrsb	w0, [x20, x19]
+	str	w0, [x22]
+	ldrsb	w0, [x21, x20]
+	add	x20, x20, 1
+	str	w0, [x22]
+	mov	x0, 300
+	bl	udelay
+	b	.L75
+	.size	SamsungSetRRPara, .-SamsungSetRRPara
+	.section	.text.LogAddr2PhyAddr,"ax",@progbits
+	.align	2
+	.global	LogAddr2PhyAddr
+	.type	LogAddr2PhyAddr, %function
+LogAddr2PhyAddr:
+	adrp	x6, .LANCHOR15
+	add	x6, x6, :lo12:.LANCHOR15
+	and	w4, w4, 255
+	ldrh	w8, [x6, 12]
+	ldrh	w5, [x6, 14]
+	mul	w5, w5, w8
+	and	w8, w5, 65535
+	adrp	x5, .LANCHOR3
+	ldrh	w7, [x5, #:lo12:.LANCHOR3]
+	adrp	x5, .LANCHOR1
+	ldrb	w6, [x5, #:lo12:.LANCHOR1]
+	ubfiz	w5, w7, 1, 15
+	cmp	w6, 1
+	ldr	w6, [x0, 4]
+	csel	w7, w5, w7, eq
+	cmp	w1, 1
+	ubfx	x11, x6, 10, 16
+	and	w6, w6, 1023
+	udiv	w5, w11, w8
+	and	w10, w5, 65535
+	msub	w5, w5, w8, w11
+	and	w5, w5, 65535
+	bne	.L80
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbnz	w1, .L80
+	adrp	x1, .LANCHOR16
+	add	x1, x1, :lo12:.LANCHOR16
+	ldrh	w6, [x1, w6, sxtw 1]
+.L80:
+	uxtw	x8, w10
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	cmp	w4, 1
+	ldr	w1, [x1, x8, lsl 2]
+	madd	w5, w5, w7, w1
+	add	w5, w5, w6
+	str	w5, [x2]
+	str	w10, [x3]
+	bls	.L82
+	ldr	w1, [x0, 4]
+	ldr	w0, [x0, 60]
+	add	w1, w1, 1024
+	cmp	w1, w0
+	cset	w0, eq
+	ret
+.L82:
+	mov	w0, 0
+	ret
+	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
+	.section	.text.FlashReadStatusEN,"ax",@progbits
+	.align	2
+	.global	FlashReadStatusEN
+	.type	FlashReadStatusEN, %function
+FlashReadStatusEN:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 8
+	adrp	x3, .LANCHOR6
+	add	x3, x3, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x4, x3, x0
+	ldr	x20, [x3, x0]
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w19, [x4, 8]
+	ldrb	w0, [x0, 8]
+	cmp	w0, 2
+	bne	.L84
+	and	w2, w2, 255
+	adrp	x0, .LANCHOR7
+	cbnz	w2, .L85
+	add	x2, x0, :lo12:.LANCHOR7
+	ldrb	w3, [x2, 13]
+.L95:
+	add	x2, x19, 8
+	add	x0, x0, :lo12:.LANCHOR7
+	add	x2, x20, x2, lsl 8
+	str	w3, [x2, 8]
+	ldrb	w4, [x0, 15]
+	cbz	w4, .L89
+	add	x3, x19, 8
+	mov	w2, 0
+	add	x3, x20, x3, lsl 8
+.L88:
+	cmp	w2, w4
+	bcc	.L90
+.L89:
+	add	x19, x19, 8
+	mov	x0, 80
+	lsl	x19, x19, 8
+	bl	udelay
+	ldr	w0, [x20, x19]
+	ldp	x19, x20, [sp, 16]
+	and	w0, w0, 255
+	ldp	x29, x30, [sp], 32
+	ret
+.L85:
+	add	x2, x0, :lo12:.LANCHOR7
+	ldrb	w3, [x2, 14]
+	b	.L95
+.L90:
+	lsl	w0, w2, 3
+	add	w2, w2, 1
+	lsr	w0, w1, w0
+	and	w0, w0, 255
+	str	w0, [x3, 4]
+	b	.L88
+.L84:
+	add	x0, x19, 8
+	mov	w1, 112
+	add	x0, x20, x0, lsl 8
+	str	w1, [x0, 8]
+	b	.L89
+	.size	FlashReadStatusEN, .-FlashReadStatusEN
+	.section	.text.FlashWaitReadyEN,"ax",@progbits
+	.align	2
+	.global	FlashWaitReadyEN
+	.type	FlashWaitReadyEN, %function
+FlashWaitReadyEN:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	str	x21, [sp, 32]
+	mov	w20, w1
+	and	w21, w2, 255
+.L100:
+	mov	w1, w20
+	mov	w2, w21
+	mov	w0, w19
+	bl	FlashReadStatusEN
+	mov	w1, w0
+	cmp	w0, 255
+	beq	.L100
+	tbz	x1, 6, .L100
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
+	.section	.text.NandcReadDontCaseBusyEn,"ax",@progbits
+	.align	2
+	.global	NandcReadDontCaseBusyEn
+	.type	NandcReadDontCaseBusyEn, %function
+NandcReadDontCaseBusyEn:
+	ret
+	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
+	.section	.text.NandcGetChipIf,"ax",@progbits
+	.align	2
+	.global	NandcGetChipIf
+	.type	NandcGetChipIf, %function
+NandcGetChipIf:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x2, x1, x0
+	ldr	x0, [x1, x0]
+	ldrb	w2, [x2, 8]
+	add	x2, x2, 8
+	add	x0, x0, x2, lsl 8
+	ret
+	.size	NandcGetChipIf, .-NandcGetChipIf
+	.section	.text.NandcSetDdrPara,"ax",@progbits
+	.align	2
+	.global	NandcSetDdrPara
+	.type	NandcSetDdrPara, %function
+NandcSetDdrPara:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	lsl	w2, w0, 8
+	ldr	x1, [x1, #:lo12:.LANCHOR19]
+	orr	w0, w2, w0, lsl 16
+	orr	w0, w0, 1
+	str	w0, [x1, 304]
+	ret
+	.size	NandcSetDdrPara, .-NandcSetDdrPara
+	.section	.text.NandcSetDdrDiv,"ax",@progbits
+	.align	2
+	.global	NandcSetDdrDiv
+	.type	NandcSetDdrDiv, %function
+NandcSetDdrDiv:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	mov	w2, 16640
+	orr	w0, w0, w2
+	ldr	x1, [x1, #:lo12:.LANCHOR19]
+	str	w0, [x1, 344]
+	ret
+	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
+	.section	.text.NandcSetDdrMode,"ax",@progbits
+	.align	2
+	.global	NandcSetDdrMode
+	.type	NandcSetDdrMode, %function
+NandcSetDdrMode:
+	adrp	x1, .LANCHOR19
+	cmp	w0, 0
+	ldr	x2, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x2]
+	and	w3, w1, -8193
+	orr	w1, w1, 253952
+	csel	w1, w1, w3, ne
+	str	w1, [x2]
+	ret
+	.size	NandcSetDdrMode, .-NandcSetDdrMode
+	.section	.text.NandcSetMode,"ax",@progbits
+	.align	2
+	.global	NandcSetMode
+	.type	NandcSetMode, %function
+NandcSetMode:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	tst	w0, 6
+	ldr	x2, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x2]
+	beq	.L112
+	orr	w1, w1, 24576
+	tst	x0, 4
+	and	w1, w1, -32769
+	mov	w0, 16641
+	orr	w1, w1, 196608
+	str	w0, [x2, 344]
+	mov	w0, 6659
+	orr	w3, w1, 32768
+	movk	w0, 0x1a, lsl 16
+	str	w0, [x2, 304]
+	csel	w1, w3, w1, ne
+	mov	w0, 38
+	str	w0, [x2, 308]
+	mov	w0, 39
+	str	w0, [x2, 308]
+.L114:
+	mov	w0, 0
+	str	w1, [x2]
+	ret
+.L112:
+	and	w1, w1, -8193
+	b	.L114
+	.size	NandcSetMode, .-NandcSetMode
+	.section	.text.NandcFlashCs,"ax",@progbits
+	.align	2
+	.global	NandcFlashCs
+	.type	NandcFlashCs, %function
+NandcFlashCs:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x3, x1, x0
+	ldr	x2, [x1, x0]
+	mov	w1, 1
+	ldrb	w3, [x3, 8]
+	ldr	w0, [x2]
+	lsl	w1, w1, w3
+	bfi	w0, w1, 0, 8
+	str	w0, [x2]
+	ret
+	.size	NandcFlashCs, .-NandcFlashCs
+	.section	.text.NandcFlashDeCs,"ax",@progbits
+	.align	2
+	.global	NandcFlashDeCs
+	.type	NandcFlashDeCs, %function
+NandcFlashDeCs:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	ldr	x1, [x1, x0]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	NandcFlashDeCs, .-NandcFlashDeCs
+	.section	.text.HynixSetRRPara,"ax",@progbits
+	.align	2
+	.global	HynixSetRRPara
+	.type	HynixSetRRPara, %function
+HynixSetRRPara:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	adrp	x0, .LANCHOR18
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	x21, x2
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	and	w26, w1, 255
+	stp	x23, x24, [sp, 48]
+	and	w20, w3, 255
+	adrp	x19, .LANCHOR20
+	ldrb	w0, [x0, 19]
+	cmp	w0, 6
+	bne	.L120
+	add	x0, x19, :lo12:.LANCHOR20
+	ubfiz	x19, x22, 6, 8
+	add	x19, x19, 20
+	add	x19, x19, x20, uxtw 2
+.L126:
+	add	x19, x0, x19
+.L121:
+	sxtw	x25, w22
+	adrp	x0, .LANCHOR6
+	lsl	x1, x25, 4
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	and	x26, x26, 255
+	mov	x24, 0
+	ldr	x23, [x0, x1]
+	mov	w0, w22
+	ldrb	w5, [x2, 8]
+	bl	NandcFlashCs
+	ubfiz	x5, x5, 8, 8
+	add	x23, x23, x5
+	mov	w0, 54
+	str	w0, [x23, 2056]
+.L123:
+	cmp	x24, x26
+	bne	.L124
+	mov	w0, 22
+	str	w0, [x23, 2056]
+	mov	w0, w22
+	bl	NandcFlashDeCs
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	strb	w20, [x0, x25]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L120:
+	cmp	w0, 7
+	add	x0, x19, :lo12:.LANCHOR20
+	bne	.L122
+	mov	w19, 160
+	mov	x1, 28
+	umaddl	x1, w19, w22, x1
+	mov	w19, 10
+	umaddl	x19, w20, w19, x1
+	b	.L126
+.L122:
+	and	x19, x20, 255
+	add	x19, x19, 2
+	add	x19, x19, x22, uxtw 3
+	add	x19, x0, x19, lsl 3
+	add	x19, x19, 4
+	b	.L121
+.L124:
+	ldrb	w0, [x21, x24]
+	str	w0, [x23, 2052]
+	mov	x0, 200
+	bl	udelay
+	ldrsb	w0, [x19, x24]
+	add	x24, x24, 1
+	str	w0, [x23, 2048]
+	b	.L123
+	.size	HynixSetRRPara, .-HynixSetRRPara
+	.section	.text.FlashSetReadRetryDefault,"ax",@progbits
+	.align	2
+	.global	FlashSetReadRetryDefault
+	.type	FlashSetReadRetryDefault, %function
+FlashSetReadRetryDefault:
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 19]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L134
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR20
+	add	x20, x20, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR22
+	add	x22, x20, 4
+	add	x21, x21, :lo12:.LANCHOR22
+	mov	x19, 0
+.L130:
+	lsl	x1, x19, 3
+	and	w0, w19, 255
+	ldrb	w1, [x1, x21]
+	cmp	w1, 173
+	bne	.L129
+	ldrb	w1, [x20, 1]
+	mov	w3, 0
+	mov	x2, x22
+	bl	HynixSetRRPara
+.L129:
+	add	x19, x19, 1
+	cmp	x19, 4
+	bne	.L130
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L134:
+	ret
+	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
+	.section	.text.FlashWaitCmdDone,"ax",@progbits
+	.align	2
+	.global	FlashWaitCmdDone
+	.type	FlashWaitCmdDone, %function
+FlashWaitCmdDone:
+	and	x4, x0, 255
+	mov	x0, 24
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR23
+	add	x1, x1, :lo12:.LANCHOR23
+	mul	x0, x4, x0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x19, x1, x0
+	ldr	x2, [x19, 8]
+	cbz	x2, .L139
+	ldrb	w20, [x1, x0]
+	mov	w0, w20
+	bl	NandcFlashCs
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ldr	w1, [x19, 4]
+	ldr	w0, [x0, x4, lsl 2]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	mov	w2, w0
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	sbfx	x0, x2, 0, 1
+	ldr	x1, [x19, 8]
+	str	w0, [x1]
+	ldr	x1, [x19, 16]
+	str	xzr, [x19, 8]
+	cbz	x1, .L139
+	str	w0, [x1]
+	str	xzr, [x19, 16]
+.L139:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
+	.section	.text.NandcDelayns,"ax",@progbits
+	.align	2
+	.global	NandcDelayns
+	.type	NandcDelayns, %function
+NandcDelayns:
+	stp	x29, x30, [sp, -16]!
+	uxtw	x0, w0
+	add	x29, sp, 0
+	bl	udelay
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReady,"ax",@progbits
+	.align	2
+	.global	NandcWaitFlashReady
+	.type	NandcWaitFlashReady, %function
+NandcWaitFlashReady:
+	stp	x29, x30, [sp, -48]!
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, 34464
+	ldr	x20, [x1, x0]
+	movk	w19, 0x1, lsl 16
+.L149:
+	mov	x0, 100
+	bl	udelay
+	ldr	w0, [x20]
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbnz	x0, 9, .L150
+	subs	w19, w19, #1
+	bne	.L149
+	mov	w0, -1
+.L147:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L150:
+	mov	w0, 0
+	b	.L147
+	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
+	.section	.text.FlashReset,"ax",@progbits
+	.align	2
+	.global	FlashReset
+	.type	FlashReset, %function
+FlashReset:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	and	w19, w0, 255
+	sbfiz	x1, x19, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x5, [x0, x1]
+	mov	w0, w19
+	ldrb	w4, [x2, 8]
+	bl	NandcFlashCs
+	add	x4, x4, 8
+	add	x4, x5, x4, lsl 8
+	mov	w0, 255
+	str	w0, [x4, 8]
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	NandcFlashDeCs
+	.size	FlashReset, .-FlashReset
+	.section	.text.FlashEraseBlock,"ax",@progbits
+	.align	2
+	.global	FlashEraseBlock
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	mov	w20, w1
+	str	x21, [sp, 32]
+	mov	w0, w19
+	mov	w21, w2
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	mov	w2, w21
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashEraseCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashReadStatus
+	mov	w2, w0
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x21, [sp, 32]
+	and	w0, w2, 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	FlashEraseBlock, .-FlashEraseBlock
+	.section	.text.FlashSetInterfaceMode,"ax",@progbits
+	.align	2
+	.global	FlashSetInterfaceMode
+	.type	FlashSetInterfaceMode, %function
+FlashSetInterfaceMode:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR24
+	adrp	x2, .LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	ldrb	w1, [x1, #:lo12:.LANCHOR24]
+	adrp	x7, .LANCHOR22
+	add	x2, x2, 8
+	add	x7, x7, :lo12:.LANCHOR22
+	and	w12, w1, 4
+	and	w6, w1, 1
+	mov	x5, 0
+	mov	w13, 69
+	mov	w8, 239
+	mov	w10, 128
+	mov	w11, 1
+	mov	w14, 35
+	mov	w15, 32
+	mov	w16, 5
+	mov	w17, 44
+.L167:
+	ldrb	w3, [x5, x7]
+	ldrb	w4, [x2]
+	cmp	w3, 152
+	ccmp	w3, w13, 4, ne
+	beq	.L158
+	cmp	w3, 173
+	ccmp	w3, w17, 4, ne
+	bne	.L159
+.L158:
+	cmp	w0, 1
+	ldr	x1, [x2, -8]
+	bne	.L160
+	cbz	w6, .L159
+	ubfiz	x4, x4, 8, 8
+	cmp	w3, 173
+	add	x1, x1, x4
+	str	w8, [x1, 2056]
+	bne	.L161
+	str	w0, [x1, 2052]
+.L179:
+	str	wzr, [x1, 2048]
+	b	.L165
+.L161:
+	cmp	w3, 44
+	bne	.L163
+	str	w0, [x1, 2052]
+	str	w16, [x1, 2048]
+.L165:
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+.L159:
+	add	x5, x5, 8
+	add	x2, x2, 16
+	cmp	x5, 32
+	bne	.L167
+	mov	w0, 0
+	bl	NandcWaitFlashReady
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L163:
+	str	w10, [x1, 2052]
+	str	w0, [x1, 2048]
+	b	.L165
+.L160:
+	cbz	w12, .L159
+	ubfiz	x4, x4, 8, 8
+	cmp	w3, 173
+	add	x1, x1, x4
+	str	w8, [x1, 2056]
+	bne	.L164
+	str	w11, [x1, 2052]
+	str	w15, [x1, 2048]
+	b	.L165
+.L164:
+	cmp	w3, 44
+	bne	.L166
+	str	w11, [x1, 2052]
+	str	w14, [x1, 2048]
+	b	.L165
+.L166:
+	str	w10, [x1, 2052]
+	b	.L179
+	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
+	.section	.text.SandiskSetRRPara,"ax",@progbits
+	.align	2
+	.global	SandiskSetRRPara
+	.type	SandiskSetRRPara, %function
+SandiskSetRRPara:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	mov	w0, 239
+	and	w19, w1, 255
+	str	w0, [x20, 8]
+	mov	w0, 17
+	str	w0, [x20, 4]
+	mov	x0, 200
+	bl	udelay
+	adrp	x0, .LANCHOR13
+	add	w1, w19, 1
+	adrp	x2, .LANCHOR9
+	add	x2, x2, :lo12:.LANCHOR9
+	ldrb	w3, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LANCHOR11
+	ldrb	w4, [x0, #:lo12:.LANCHOR11]
+	mov	w0, 5
+	umull	x1, w1, w0
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	add	x2, x2, x1
+	add	x1, x0, x1
+	mov	x0, 0
+.L181:
+	cmp	w3, w0
+	bhi	.L184
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	b	NandcWaitFlashReady
+.L184:
+	cmp	w4, 67
+	bne	.L182
+	ldrsb	w5, [x1, x0]
+.L186:
+	add	x0, x0, 1
+	str	w5, [x20]
+	b	.L181
+.L182:
+	ldrsb	w5, [x2, x0]
+	b	.L186
+	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.FlashEraseSLc2KBlocks,"ax",@progbits
+	.align	2
+	.global	FlashEraseSLc2KBlocks
+	.type	FlashEraseSLc2KBlocks, %function
+FlashEraseSLc2KBlocks:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, 56
+	stp	x23, x24, [sp, 48]
+	and	w21, w1, 255
+	umaddl	x22, w1, w22, x0
+	stp	x19, x20, [sp, 16]
+	adrp	x23, .LANCHOR25
+	mov	x20, x0
+	add	x23, x23, :lo12:.LANCHOR25
+	adrp	x24, .LANCHOR26
+.L188:
+	cmp	x20, x22
+	bne	.L193
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L193:
+	mov	w1, 0
+	mov	w4, w21
+	add	x3, x29, 76
+	add	x2, x29, 72
+	mov	x0, x20
+	bl	LogAddr2PhyAddr
+	ldrb	w1, [x23]
+	ldr	w0, [x29, 76]
+	cmp	w1, w0
+	bhi	.L189
+	mov	w0, -1
+	str	w0, [x20]
+.L190:
+	sub	w21, w21, #1
+	add	x20, x20, 56
+	and	w21, w21, 255
+	b	.L188
+.L189:
+	uxtw	x0, w0
+	add	x1, x24, :lo12:.LANCHOR26
+	ldrb	w19, [x1, x0]
+	mov	x1, 24
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR23
+	add	x1, x1, :lo12:.LANCHOR23
+	strb	w19, [x1, x0]
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	ldr	w1, [x29, 72]
+	mov	w2, 0
+	mov	w0, w19
+	bl	FlashEraseCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 72]
+	mov	w0, w19
+	bl	FlashReadStatus
+	sbfx	x0, x0, 0, 1
+	str	w0, [x20]
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 72]
+	mov	w2, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashEraseCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 72]
+	mov	w0, w19
+	bl	FlashReadStatus
+	tbz	x0, 0, .L191
+	mov	w0, -1
+	str	w0, [x20]
+.L191:
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L192
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC1
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L192:
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	b	.L190
+	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
+	.section	.text.FlashEraseBlocks,"ax",@progbits
+	.align	2
+	.global	FlashEraseBlocks
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w1
+	adrp	x1, .LANCHOR1
+	stp	x21, x22, [sp, 32]
+	stp	x19, x20, [sp, 16]
+	mov	w22, w2
+	ldrb	w1, [x1, #:lo12:.LANCHOR1]
+	stp	x25, x26, [sp, 64]
+	cbnz	w1, .L199
+	adrp	x25, .LANCHOR23
+	mov	x23, x0
+	add	x26, x25, :lo12:.LANCHOR23
+	mov	w19, 0
+.L200:
+	cmp	w19, w22
+	adrp	x13, .LANCHOR25
+	bcc	.L209
+	adrp	x20, .LANCHOR8
+	adrp	x21, .LANCHOR23
+	add	x22, x13, :lo12:.LANCHOR25
+	add	x20, x20, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR23
+	mov	x19, 0
+.L210:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L212
+	mov	w0, 0
+	b	.L198
+.L199:
+	mov	w1, w2
+	bl	FlashEraseSLc2KBlocks
+.L198:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L209:
+	mov	w12, 56
+	mov	w1, 0
+	sub	w4, w22, w19
+	add	x3, x29, 92
+	umull	x12, w19, w12
+	add	x2, x29, 88
+	add	x20, x23, x12
+	mov	x0, x20
+	bl	LogAddr2PhyAddr
+	mov	w21, w0
+	ldrb	w1, [x13, #:lo12:.LANCHOR25]
+	ldr	w0, [x29, 92]
+	cmp	w1, w0
+	bhi	.L202
+	mov	w0, -1
+	str	w0, [x23, x12]
+.L203:
+	add	w19, w19, 1
+	b	.L200
+.L202:
+	adrp	x1, .LANCHOR27
+	add	x2, x25, :lo12:.LANCHOR23
+	mov	x3, 24
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	cmp	w1, 0
+	uxtw	x1, w0
+	csel	w21, w21, wzr, ne
+	madd	x1, x1, x3, x2
+	ldr	x1, [x1, 8]
+	cbz	x1, .L205
+	bl	FlashWaitCmdDone
+.L205:
+	ldp	w2, w1, [x29, 88]
+	mov	x0, 24
+	madd	x0, x1, x0, x26
+	str	w2, [x0, 4]
+	stp	x20, xzr, [x0, 8]
+	cbz	w21, .L206
+	add	w2, w19, 1
+	mov	w3, 56
+	umaddl	x2, w2, w3, x23
+	str	x2, [x0, 16]
+.L206:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w20, [x0, x1]
+	mov	x0, 24
+	mul	x1, x1, x0
+	mov	w0, w20
+	strb	w20, [x26, x1]
+	bl	NandcFlashCs
+	cmp	w24, 1
+	bne	.L207
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L207
+	mov	w0, w20
+	bl	flash_enter_slc_mode
+.L208:
+	ldr	w1, [x29, 92]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	add	w19, w19, w21
+	ldr	w0, [x0, x1, lsl 2]
+	ldr	w1, [x29, 88]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	ldr	w1, [x29, 88]
+	mov	w2, w21
+	mov	w0, w20
+	bl	FlashEraseCmd
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	b	.L203
+.L207:
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+	b	.L208
+.L212:
+	mov	w0, w19
+	bl	FlashWaitCmdDone
+	cmp	w24, 1
+	bne	.L211
+	ldrb	w0, [x20]
+	cbz	w0, .L211
+	mov	x0, 24
+	mul	x0, x19, x0
+	ldrb	w0, [x0, x21]
+	bl	flash_exit_slc_mode
+.L211:
+	add	x19, x19, 1
+	b	.L210
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.FlashReadDpCmd,"ax",@progbits
+	.align	2
+	.global	FlashReadDpCmd
+	.type	FlashReadDpCmd, %function
+FlashReadDpCmd:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	mov	w21, w1
+	adrp	x0, .LANCHOR6
+	sbfiz	x1, x22, 4, 32
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x3, x0, x1
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	and	w4, w21, 255
+	ldr	x6, [x0, x1]
+	adrp	x0, .LANCHOR7
+	ldrb	w19, [x3, 8]
+	add	x0, x0, :lo12:.LANCHOR7
+	lsr	w3, w21, 8
+	and	w24, w2, 255
+	lsr	w23, w2, 8
+	lsr	w20, w2, 16
+	add	x19, x6, x19, lsl 8
+	ldrb	w5, [x0, 8]
+	ldrb	w1, [x0, 16]
+	ldrb	w0, [x0, 9]
+	str	w5, [x19, 2056]
+	cmp	w1, 1
+	lsr	w1, w21, 16
+	bne	.L227
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w1, [x19, 2052]
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	bl	NandcWaitFlashReady
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+.L230:
+	str	w24, [x19, 2052]
+	mov	w0, 48
+	str	w23, [x19, 2052]
+	mov	w1, w21
+	str	w20, [x19, 2052]
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	b	FlashSetRandomizer
+.L227:
+	str	w4, [x19, 2052]
+	str	w3, [x19, 2052]
+	str	w1, [x19, 2052]
+	str	w0, [x19, 2056]
+	b	.L230
+	.size	FlashReadDpCmd, .-FlashReadDpCmd
+	.section	.text.FlashDeInit,"ax",@progbits
+	.align	2
+	.global	FlashDeInit
+	.type	FlashDeInit, %function
+FlashDeInit:
+	stp	x29, x30, [sp, -32]!
+	mov	w0, 0
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	NandcWaitFlashReady
+	adrp	x19, .LANCHOR28
+	bl	FlashSetReadRetryDefault
+	ldrb	w0, [x19, #:lo12:.LANCHOR28]
+	cbz	w0, .L232
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	tbz	x0, 0, .L232
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+	strb	wzr, [x19, #:lo12:.LANCHOR28]
+.L232:
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	str	wzr, [x0, 336]
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.NandcRandmzSel,"ax",@progbits
+	.align	2
+	.global	NandcRandmzSel
+	.type	NandcRandmzSel, %function
+NandcRandmzSel:
+	ubfiz	x0, x0, 4, 8
+	adrp	x2, .LANCHOR6
+	add	x2, x2, :lo12:.LANCHOR6
+	ldr	x0, [x2, x0]
+	str	w1, [x0, 336]
+	ret
+	.size	NandcRandmzSel, .-NandcRandmzSel
+	.section	.text.NandcTimeCfg,"ax",@progbits
+	.align	2
+	.global	NandcTimeCfg
+	.type	NandcTimeCfg, %function
+NandcTimeCfg:
+	cmp	w0, 35
+	adrp	x1, .LANCHOR19
+	bhi	.L242
+	ldr	x0, [x1, #:lo12:.LANCHOR19]
+	mov	w1, 4193
+.L245:
+	str	w1, [x0, 4]
+	ret
+.L242:
+	cmp	w0, 99
+	ldr	x0, [x1, #:lo12:.LANCHOR19]
+	bls	.L244
+	mov	w1, 8322
+	b	.L245
+.L244:
+	mov	w1, 4225
+	b	.L245
+	.size	NandcTimeCfg, .-NandcTimeCfg
+	.section	.text.FlashTimingCfg,"ax",@progbits
+	.align	2
+	.global	FlashTimingCfg
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	adrp	x0, .LANCHOR29+21
+	ldrb	w0, [x0, #:lo12:.LANCHOR29+21]
+	b	NandcTimeCfg
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.NandcBchSel,"ax",@progbits
+	.align	2
+	.global	NandcBchSel
+	.type	NandcBchSel, %function
+NandcBchSel:
+	adrp	x1, .LANCHOR19
+	and	w0, w0, 255
+	cmp	w0, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR19]
+	mov	w1, 1
+	str	w1, [x2, 8]
+	adrp	x1, .LANCHOR30
+	str	w0, [x1, #:lo12:.LANCHOR30]
+	mov	w1, 4096
+	bne	.L248
+.L251:
+	and	w1, w1, -17
+.L249:
+	orr	w1, w1, 1
+	str	w1, [x2, 12]
+	ret
+.L248:
+	cmp	w0, 24
+	bne	.L250
+	orr	w1, w1, 16
+	b	.L249
+.L250:
+	orr	w1, w1, 262144
+	cmp	w0, 40
+	orr	w1, w1, 16
+	bne	.L249
+	b	.L251
+	.size	NandcBchSel, .-NandcBchSel
+	.section	.text.FlashBchSel,"ax",@progbits
+	.align	2
+	.global	FlashBchSel
+	.type	FlashBchSel, %function
+FlashBchSel:
+	adrp	x1, .LANCHOR31
+	and	w0, w0, 255
+	strb	w0, [x1, #:lo12:.LANCHOR31]
+	b	NandcBchSel
+	.size	FlashBchSel, .-FlashBchSel
+	.section	.text.NandCIrqEnable,"ax",@progbits
+	.align	2
+	.global	NandCIrqEnable
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	ret
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",@progbits
+	.align	2
+	.global	NandCIrqDisable
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	ret
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",@progbits
+	.align	2
+	.global	rk_nandc_get_irq_status
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	ldr	w0, [x0, 372]
+	ret
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_ready
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	ret
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",@progbits
+	.align	2
+	.global	NandcIqrWaitFlashReady
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	ret
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_xfer_completed
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	ret
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.NandcSendDumpDataStart,"ax",@progbits
+	.align	2
+	.global	NandcSendDumpDataStart
+	.type	NandcSendDumpDataStart, %function
+NandcSendDumpDataStart:
+	sub	sp, sp, #16
+	ldr	w2, [x0, 16]
+	mov	w1, 1066
+	movk	w1, 0x2020, lsl 16
+	str	w2, [sp, 8]
+	ldr	w2, [sp, 8]
+	and	w2, w2, -5
+	str	w2, [sp, 8]
+	ldr	w2, [sp, 8]
+	str	w2, [x0, 16]
+	str	w1, [x0, 8]
+	orr	w1, w1, 4
+	str	w1, [x0, 8]
+	add	sp, sp, 16
+	ret
+	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
+	.section	.text.NandcSendDumpDataDone,"ax",@progbits
+	.align	2
+	.global	NandcSendDumpDataDone
+	.type	NandcSendDumpDataDone, %function
+NandcSendDumpDataDone:
+	sub	sp, sp, #16
+.L265:
+	ldr	w1, [x0, 8]
+	str	w1, [sp, 8]
+	ldr	w1, [sp, 8]
+	tbz	x1, 20, .L265
+	add	sp, sp, 16
+	ret
+	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
+	.section	.text.NandcXferStart,"ax",@progbits
+	.align	2
+	.global	NandcXferStart
+	.type	NandcXferStart, %function
+NandcXferStart:
+	stp	x29, x30, [sp, -96]!
+	ubfiz	x0, x0, 4, 8
+	ubfx	x3, x3, 1, 7
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w1, 255
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	add	x6, x1, x0
+	stp	x21, x22, [sp, 32]
+	stp	x19, x20, [sp, 16]
+	ubfiz	w19, w23, 1, 1
+	ldr	x21, [x1, x0]
+	mov	w1, 16
+	ldrb	w0, [x6, 8]
+	orr	w19, w19, 8
+	str	x25, [sp, 64]
+	ldr	w22, [x21, 12]
+	bfi	w22, w1, 8, 8
+	and	w22, w22, -9
+	bfi	w22, w0, 5, 3
+	mov	w0, 1
+	bfi	w19, w0, 5, 2
+	adrp	x0, .LANCHOR32
+	orr	w19, w19, 536870912
+	orr	w19, w19, 1024
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	bfi	w19, w3, 4, 1
+	cmp	w0, 3
+	bls	.L270
+	ldr	w0, [x21, 16]
+	cmp	x5, 0
+	str	w0, [x29, 88]
+	ccmp	x4, 0, 0, eq
+	ldr	w0, [x29, 88]
+	and	w0, w0, -5
+	str	w0, [x29, 88]
+	beq	.L271
+	and	w2, w2, 255
+	adrp	x20, .LANCHOR33
+	cbnz	w23, .L272
+.L280:
+	add	w2, w2, 1
+	ldr	x0, [x20, #:lo12:.LANCHOR33]
+	asr	w2, w2, 1
+	add	x20, x20, :lo12:.LANCHOR33
+	cmp	x4, 0
+	mov	x24, x4
+	bfi	w19, w2, 22, 6
+	csel	x0, x4, x0, ne
+	ldr	x1, [x20, 8]
+	ubfx	x25, x19, 22, 5
+	stp	x0, x1, [x20, 16]
+	stp	w0, w1, [x20, 32]
+	add	w1, w0, w25, lsl 10
+	uxtw	x0, w0
+	bl	flush_dcache_range
+	ldr	x0, [x20, 24]
+	add	w1, w0, w25, lsl 7
+	uxtw	x0, w0
+	bl	flush_dcache_range
+	mov	w0, 1
+	str	w0, [x20, 40]
+	ldr	w0, [x20, 32]
+	mov	w1, 16
+	str	w0, [x21, 20]
+	tst	x24, 3
+	ldr	w0, [x20, 36]
+	str	w0, [x21, 24]
+	str	wzr, [x29, 88]
+	ldr	w0, [x29, 88]
+	bfi	w0, w1, 9, 5
+	str	w0, [x29, 88]
+	ldr	w0, [x29, 88]
+	orr	w0, w0, 448
+	str	w0, [x29, 88]
+	bne	.L281
+	ldr	w0, [x29, 88]
+	mov	w1, 2
+	bfi	w0, w1, 3, 3
+	str	w0, [x29, 88]
+.L281:
+	ldr	w0, [x29, 88]
+	cmp	w23, 0
+	cset	w1, eq
+	orr	w0, w0, 4
+	str	w0, [x29, 88]
+	ldr	w0, [x29, 88]
+	bfi	w0, w1, 1, 1
+	str	w0, [x29, 88]
+	ldr	w0, [x29, 88]
+	orr	w0, w0, 1
+	str	w0, [x29, 88]
+.L271:
+	ldr	w0, [x29, 88]
+	str	w0, [x21, 16]
+.L270:
+	str	w22, [x21, 12]
+	str	w19, [x21, 8]
+	orr	w19, w19, 4
+	str	w19, [x21, 8]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L272:
+	adrp	x0, .LANCHOR30
+	mov	w6, 64
+	lsr	w11, w2, 1
+	mov	x1, x5
+	ldr	w0, [x0, #:lo12:.LANCHOR30]
+	mov	w7, 0
+	mov	w3, 0
+	mov	w12, -1
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w6, w6, w0, cc
+	add	x0, x20, :lo12:.LANCHOR33
+	ldr	x10, [x0, 8]
+.L276:
+	cmp	w3, w11
+	bcs	.L280
+	lsr	w0, w7, 2
+	lsl	w0, w0, 2
+	cbz	x5, .L277
+	ldrh	w13, [x1]
+	add	x1, x1, 4
+	ldrh	w8, [x1, -2]
+	orr	x8, x13, x8, lsl 16
+	str	w8, [x10, x0]
+.L278:
+	add	w3, w3, 1
+	add	w7, w7, w6
+	b	.L276
+.L277:
+	str	w12, [x10, x0]
+	b	.L278
+	.size	NandcXferStart, .-NandcXferStart
+	.section	.text.NandcXferComp,"ax",@progbits
+	.align	2
+	.global	NandcXferComp
+	.type	NandcXferComp, %function
+NandcXferComp:
+	ubfiz	x0, x0, 4, 8
+	adrp	x1, .LANCHOR6
+	add	x1, x1, :lo12:.LANCHOR6
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	ldr	x3, [x1, x0]
+	adrp	x0, .LANCHOR32
+	str	x19, [sp, 16]
+	ldr	w2, [x0, #:lo12:.LANCHOR32]
+	cmp	w2, 3
+	bls	.L311
+	ldr	w0, [x3, 16]
+	tbz	x0, 2, .L311
+	ldr	w0, [x3, 16]
+	tbz	x0, 1, .L299
+	ldr	w0, [x3, 8]
+	str	w0, [x29, 32]
+.L292:
+	ldr	w1, [x3, 28]
+	ldr	w0, [x29, 32]
+	ubfx	x1, x1, 16, 5
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	bge	.L296
+	cmp	w2, 5
+	bls	.L292
+	ldr	w0, [x3]
+	str	w0, [x29, 40]
+	ldr	w0, [x29, 40]
+	tbz	x0, 13, .L292
+	ldr	w0, [x29, 40]
+	tbz	x0, 17, .L292
+.L296:
+	adrp	x19, .LANCHOR33
+	add	x19, x19, :lo12:.LANCHOR33
+	ldr	w0, [x19, 40]
+	cbz	w0, .L297
+	ldr	w1, [x29, 32]
+	ldr	w0, [x19, 32]
+	ubfx	x1, x1, 22, 5
+	add	w1, w0, w1, lsl 10
+	uxtw	x0, w0
+	bl	invalidate_dcache_range
+	ldr	w1, [x29, 32]
+	ldr	w0, [x19, 36]
+	ubfx	x1, x1, 22, 5
+	add	w1, w0, w1, lsl 7
+	uxtw	x0, w0
+	bl	invalidate_dcache_range
+.L297:
+	adrp	x0, .LANCHOR33+40
+	str	wzr, [x0, #:lo12:.LANCHOR33+40]
+.L288:
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L299:
+	ldr	w0, [x3, 8]
+	str	w0, [x29, 32]
+	ldr	w0, [x29, 32]
+	tbz	x0, 20, .L299
+	adrp	x0, .LANCHOR34
+	mov	x4, x0
+	ldr	w1, [x0, #:lo12:.LANCHOR34]
+	cbz	w1, .L300
+	mov	x0, x3
+	bl	NandcSendDumpDataStart
+.L300:
+	ldr	w0, [x4, #:lo12:.LANCHOR34]
+	cbz	w0, .L297
+	mov	x0, x3
+	bl	NandcSendDumpDataDone
+	b	.L297
+.L311:
+	ldr	w0, [x3, 8]
+	str	w0, [x29, 32]
+	ldr	w0, [x29, 32]
+	tbz	x0, 20, .L311
+	b	.L288
+	.size	NandcXferComp, .-NandcXferComp
+	.section	.text.Ftl_log2,"ax",@progbits
+	.align	2
+	.global	Ftl_log2
+	.type	Ftl_log2, %function
+Ftl_log2:
+	mov	w2, 1
+	mov	w1, 0
+.L320:
+	cmp	w2, w0
+	bls	.L321
+	sub	w0, w1, #1
+	ret
+.L321:
+	add	w1, w1, 1
+	lsl	w2, w2, 1
+	and	w1, w1, 65535
+	b	.L320
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",@progbits
+	.align	2
+	.global	FtlPrintInfo
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+	ret
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkNumInit
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+	and	w0, w0, 65535
+	mov	w1, 24
+	cmp	w0, 24
+	adrp	x2, .LANCHOR37
+	csel	w0, w0, w1, cs
+	adrp	x1, .LANCHOR35
+	and	w0, w0, 65535
+	str	w0, [x1, #:lo12:.LANCHOR35]
+	adrp	x1, .LANCHOR36
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	mul	w1, w1, w0
+	str	w1, [x2, #:lo12:.LANCHOR37]
+	adrp	x2, .LANCHOR39
+	ldrh	w2, [x2, #:lo12:.LANCHOR39]
+	sub	w0, w2, w0
+	adrp	x2, .LANCHOR38
+	strh	w0, [x2, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR41
+	ldr	w0, [x0, #:lo12:.LANCHOR41]
+	sub	w1, w0, w1
+	adrp	x0, .LANCHOR40
+	str	w1, [x0, #:lo12:.LANCHOR40]
+	mov	w0, 0
+	ret
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.section	.text.FtlConstantsInit,"ax",@progbits
+	.align	2
+	.global	FtlConstantsInit
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+	stp	x29, x30, [sp, -32]!
+	mov	x5, x0
+	adrp	x1, .LANCHOR44
+	adrp	x4, .LANCHOR43
+	add	x29, sp, 0
+	ldrh	w11, [x0, 8]
+	adrp	x0, .LANCHOR42
+	adrp	x6, .LANCHOR39
+	ldrh	w2, [x5, 10]
+	strh	w11, [x0, #:lo12:.LANCHOR42]
+	mov	x3, 0
+	ldrh	w0, [x5, 12]
+	ldrh	w8, [x5, 14]
+	strh	w0, [x1, #:lo12:.LANCHOR44]
+	adrp	x1, .LANCHOR45
+	add	x7, x1, :lo12:.LANCHOR45
+	strh	w2, [x4, #:lo12:.LANCHOR43]
+	strh	w8, [x6, #:lo12:.LANCHOR39]
+	str	x19, [sp, 16]
+.L325:
+	strb	w3, [x3, x7]
+	add	x3, x3, 1
+	cmp	x3, 32
+	bne	.L325
+	ldrh	w7, [x5, 20]
+	ldrb	w3, [x5, 15]
+	cmp	w7, w3
+	bcs	.L326
+	and	w13, w0, 255
+	mul	w15, w0, w2
+	ubfiz	w14, w13, 1, 7
+	add	x1, x1, :lo12:.LANCHOR45
+	mov	w7, 0
+.L327:
+	cmp	w7, w0
+	bcs	.L329
+	and	w3, w7, 255
+	mov	w10, w7
+	mov	w12, 0
+	b	.L330
+.L328:
+	add	w16, w15, w10
+	strb	w3, [x1, w10, uxtw]
+	add	w17, w13, w3
+	add	w3, w14, w3
+	add	w12, w12, 1
+	and	w3, w3, 255
+	add	w10, w10, w0
+	strb	w17, [x1, x16]
+.L330:
+	cmp	w12, w2
+	bcc	.L328
+	add	w7, w7, 1
+	b	.L327
+.L329:
+	ubfiz	w2, w2, 1, 15
+	lsr	w8, w8, 1
+	strh	w2, [x4, #:lo12:.LANCHOR43]
+	strh	w8, [x6, #:lo12:.LANCHOR39]
+.L326:
+	adrp	x1, .LANCHOR46
+	adrp	x13, .LANCHOR47
+	mov	w2, 5
+	cmp	w11, 1
+	strh	w2, [x1, #:lo12:.LANCHOR46]
+	strh	wzr, [x13, #:lo12:.LANCHOR47]
+	bne	.L331
+	strh	w11, [x1, #:lo12:.LANCHOR46]
+.L331:
+	adrp	x8, .LANCHOR48
+	mov	w1, 4352
+	strh	w1, [x8, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR1
+	ldrb	w11, [x1, #:lo12:.LANCHOR1]
+	cbz	w11, .L332
+	mov	w1, 384
+	strh	w1, [x8, #:lo12:.LANCHOR48]
+.L332:
+	ldrh	w4, [x4, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR36
+	ldrh	w3, [x6, #:lo12:.LANCHOR39]
+	mul	w4, w0, w4
+	mul	w0, w0, w3
+	and	w4, w4, 65535
+	strh	w4, [x1, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR49
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR49]
+	bl	Ftl_log2
+	ldrh	w19, [x5, 16]
+	adrp	x1, .LANCHOR50
+	ldrh	w10, [x5, 20]
+	adrp	x7, .LANCHOR51
+	strh	w0, [x1, #:lo12:.LANCHOR50]
+	adrp	x0, .LANCHOR52
+	ldrh	w14, [x5, 18]
+	adrp	x15, .LANCHOR54
+	mul	w1, w4, w19
+	strh	w14, [x0, #:lo12:.LANCHOR52]
+	adrp	x0, .LANCHOR53
+	strh	w19, [x7, #:lo12:.LANCHOR51]
+	strh	w10, [x15, #:lo12:.LANCHOR54]
+	strh	w1, [x0, #:lo12:.LANCHOR53]
+	mov	w0, w10
+	bl	Ftl_log2
+	and	w12, w0, 65535
+	adrp	x6, .LANCHOR55
+	ubfiz	w2, w10, 9, 7
+	ldrh	w1, [x5, 26]
+	cmp	w3, 1024
+	strh	w0, [x6, #:lo12:.LANCHOR55]
+	adrp	x0, .LANCHOR56
+	strh	w2, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR57
+	ubfx	w2, w2, 8, 8
+	strh	w2, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58
+	strh	w1, [x0, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR41
+	mul	w1, w4, w3
+	str	w1, [x0, #:lo12:.LANCHOR41]
+	bls	.L333
+	and	w0, w3, 255
+	strh	w0, [x13, #:lo12:.LANCHOR47]
+.L333:
+	ldrh	w0, [x13, #:lo12:.LANCHOR47]
+	adrp	x1, .LANCHOR59
+	sub	w0, w3, w0
+	mul	w0, w0, w4
+	mul	w0, w0, w10
+	mul	w0, w0, w19
+	asr	w0, w0, 11
+	str	w0, [x1, #:lo12:.LANCHOR59]
+	ldrh	w0, [x8, #:lo12:.LANCHOR48]
+	mul	w1, w14, w10
+	adrp	x10, .LANCHOR60
+	lsl	w0, w0, 3
+	sdiv	w0, w0, w1
+	and	w0, w0, 65535
+	cmp	w0, 4
+	bls	.L334
+.L352:
+	strh	w0, [x10, #:lo12:.LANCHOR60]
+	cbz	w11, .L336
+	mov	w0, 640
+	strh	w0, [x8, #:lo12:.LANCHOR48]
+.L336:
+	ldrh	w0, [x8, #:lo12:.LANCHOR48]
+	adrp	x1, .LANCHOR61
+	lsl	w3, w3, 6
+	cmp	w4, 1
+	adrp	x8, .LANCHOR35
+	asr	w0, w0, w12
+	add	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR61]
+	add	w0, w12, 9
+	adrp	x1, .LANCHOR63
+	asr	w3, w3, w0
+	adrp	x0, .LANCHOR62
+	strh	w3, [x0, #:lo12:.LANCHOR62]
+	and	w3, w3, 65535
+	mul	w0, w4, w3
+	add	w3, w3, 8
+	str	w0, [x1, #:lo12:.LANCHOR63]
+	ldrh	w0, [x10, #:lo12:.LANCHOR60]
+	udiv	w0, w0, w4
+	mov	x4, x1
+	add	w3, w0, w3
+	beq	.L337
+.L353:
+	str	w3, [x8, #:lo12:.LANCHOR35]
+	ldrh	w0, [x8, #:lo12:.LANCHOR35]
+	bl	FtlSysBlkNumInit
+	ldr	w1, [x8, #:lo12:.LANCHOR35]
+	adrp	x0, .LANCHOR64
+	mov	w2, 24
+	str	w1, [x0, #:lo12:.LANCHOR64]
+	adrp	x0, .LANCHOR40
+	ldrh	w1, [x7, #:lo12:.LANCHOR51]
+	ldr	w0, [x0, #:lo12:.LANCHOR40]
+	lsl	w0, w0, 2
+	mul	w0, w0, w1
+	ldrh	w1, [x6, #:lo12:.LANCHOR55]
+	add	w1, w1, 9
+	lsr	w0, w0, w1
+	adrp	x1, .LANCHOR65
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR65]
+	adrp	x1, .LANCHOR66
+	strh	w2, [x1, #:lo12:.LANCHOR66]
+	adrp	x1, .LANCHOR67
+	ldrh	w2, [x10, #:lo12:.LANCHOR60]
+	str	wzr, [x1, #:lo12:.LANCHOR67]
+	add	w1, w2, 3
+	strh	w1, [x10, #:lo12:.LANCHOR60]
+	ldr	w1, [x4, #:lo12:.LANCHOR63]
+	add	w3, w1, 3
+	str	w3, [x4, #:lo12:.LANCHOR63]
+	adrp	x3, .LANCHOR8
+	ldrb	w3, [x3, #:lo12:.LANCHOR8]
+	cbz	w3, .L339
+	add	w2, w2, 4
+	add	w1, w1, 5
+	strh	w2, [x10, #:lo12:.LANCHOR60]
+	str	w1, [x4, #:lo12:.LANCHOR63]
+.L339:
+	adrp	x1, .LANCHOR38
+	adrp	x3, .LANCHOR68
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	strh	wzr, [x3, #:lo12:.LANCHOR68]
+	lsl	w2, w1, 1
+	lsr	w1, w1, 3
+	add	w2, w2, 48
+	add	w1, w1, 4
+	add	w0, w2, w0, lsl 2
+	add	w0, w0, w1
+	ldrh	w1, [x15, #:lo12:.LANCHOR54]
+	cmp	w0, w1, lsl 9
+	bcs	.L340
+	mov	w0, 1
+	strh	w0, [x3, #:lo12:.LANCHOR68]
+.L340:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L334:
+	mov	w0, 4
+	b	.L352
+.L337:
+	add	w3, w3, 4
+	b	.L353
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",@progbits
+	.align	2
+	.global	IsBlkInVendorPart
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+	adrp	x1, .LANCHOR69
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR69]
+	cbz	w1, .L358
+	adrp	x1, .LANCHOR60
+	ldrh	w2, [x1, #:lo12:.LANCHOR60]
+	adrp	x1, .LANCHOR70
+	ldr	x3, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+.L356:
+	cmp	w2, w1, uxth
+	bhi	.L357
+.L358:
+	mov	w0, 0
+	ret
+.L357:
+	add	x1, x1, 1
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L356
+	mov	w0, 1
+	ret
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlGetCap,"ax",@progbits
+	.align	2
+	.global	FtlGetCap
+	.type	FtlGetCap, %function
+FtlGetCap:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	FtlGetCap, .-FtlGetCap
+	.section	.text.FtlGetCapacity,"ax",@progbits
+	.align	2
+	.global	FtlGetCapacity
+	.type	FtlGetCapacity, %function
+FtlGetCapacity:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	FtlGetCapacity, .-FtlGetCapacity
+	.section	.text.ftl_get_density,"ax",@progbits
+	.align	2
+	.global	ftl_get_density
+	.type	ftl_get_density, %function
+ftl_get_density:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.FtlGetLpn,"ax",@progbits
+	.align	2
+	.global	FtlGetLpn
+	.type	FtlGetLpn, %function
+FtlGetLpn:
+	adrp	x0, .LANCHOR71
+	ldr	w0, [x0, #:lo12:.LANCHOR71]
+	ret
+	.size	FtlGetLpn, .-FtlGetLpn
+	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlGetCurEraseBlock
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	adrp	x0, .LANCHOR36
+	ldrh	w1, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR72
+	ldr	w0, [x0, #:lo12:.LANCHOR72]
+	mul	w0, w1, w0
+	ret
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",@progbits
+	.align	2
+	.global	FtlGetAllBlockNum
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	adrp	x0, .LANCHOR39
+	ldrh	w1, [x0, #:lo12:.LANCHOR39]
+	adrp	x0, .LANCHOR36
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	mul	w0, w1, w0
+	ret
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlBbmMapBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmMapBadBlock
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+	stp	x29, x30, [sp, -32]!
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR49
+	mov	w4, 1
+	add	x29, sp, 0
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR73
+	add	x19, x19, :lo12:.LANCHOR73
+	udiv	w3, w1, w0
+	and	w2, w3, 65535
+	msub	w3, w3, w0, w1
+	add	x0, x19, x2, uxth 3
+	and	w3, w3, 65535
+	and	w6, w3, 31
+	ldr	x0, [x0, 32]
+	ubfx	x5, x3, 5, 11
+	lsl	x5, x5, 2
+	lsl	w4, w4, w6
+	ldr	w6, [x0, x5]
+	orr	w4, w4, w6
+	str	w4, [x0, x5]
+	adrp	x0, .LC2
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+	ldrh	w0, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 6]
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.section	.text.FtlBbmIsBadBlock,"ax",@progbits
+	.align	2
+	.global	FtlBbmIsBadBlock
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+	adrp	x1, .LANCHOR49
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR49]
+	udiv	w2, w0, w1
+	msub	w0, w2, w1, w0
+	adrp	x1, .LANCHOR73
+	add	x1, x1, :lo12:.LANCHOR73
+	add	x2, x1, x2, uxth 3
+	and	w0, w0, 65535
+	ubfx	x3, x0, 5, 11
+	and	w0, w0, 31
+	ldr	x1, [x2, 32]
+	ldr	w1, [x1, x3, lsl 2]
+	lsr	w0, w1, w0
+	and	w0, w0, 1
+	ret
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",@progbits
+	.align	2
+	.global	FtlBbtInfoPrint
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+	ret
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.V2P_block,"ax",@progbits
+	.align	2
+	.global	V2P_block
+	.type	V2P_block, %function
+V2P_block:
+	adrp	x2, .LANCHOR44
+	and	w0, w0, 65535
+	adrp	x4, .LANCHOR49
+	and	w1, w1, 65535
+	ldrh	w2, [x2, #:lo12:.LANCHOR44]
+	ldrh	w4, [x4, #:lo12:.LANCHOR49]
+	udiv	w3, w0, w2
+	msub	w0, w3, w2, w0
+	madd	w2, w2, w1, w0
+	madd	w0, w3, w4, w2
+	ret
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",@progbits
+	.align	2
+	.global	P2V_plane
+	.type	P2V_plane, %function
+P2V_plane:
+	and	w3, w0, 65535
+	adrp	x0, .LANCHOR44
+	ldrh	w1, [x0, #:lo12:.LANCHOR44]
+	adrp	x0, .LANCHOR49
+	ldrh	w2, [x0, #:lo12:.LANCHOR49]
+	udiv	w0, w3, w1
+	udiv	w2, w3, w2
+	msub	w0, w0, w1, w3
+	madd	w0, w1, w2, w0
+	ret
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",@progbits
+	.align	2
+	.global	P2V_block_in_plane
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+	and	w2, w0, 65535
+	adrp	x0, .LANCHOR49
+	ldrh	w1, [x0, #:lo12:.LANCHOR49]
+	udiv	w0, w2, w1
+	msub	w0, w0, w1, w2
+	adrp	x1, .LANCHOR44
+	ldrh	w1, [x1, #:lo12:.LANCHOR44]
+	and	w0, w0, 65535
+	udiv	w0, w0, w1
+	ret
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",@progbits
+	.align	2
+	.global	ftl_cmp_data_ver
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+	cmp	w0, w1
+	mov	w2, -2147483648
+	bls	.L374
+	sub	w1, w0, w1
+	cmp	w1, w2
+	cset	w0, ls
+	ret
+.L374:
+	sub	w1, w1, w0
+	cmp	w1, w2
+	cset	w0, hi
+	ret
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueEmpty
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	cmp	w0, 0
+	cset	w0, eq
+	ret
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueFull
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+	adrp	x0, .LANCHOR74+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR74+6]
+	cmp	w0, 1024
+	cset	w0, eq
+	ret
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueIn
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	and	w21, w0, 65535
+	adrp	x0, .LANCHOR74
+	add	x2, x0, :lo12:.LANCHOR74
+	stp	x19, x20, [sp, 16]
+	ldrh	w2, [x2, 6]
+	cmp	w2, 1024
+	beq	.L378
+	and	w1, w1, 65535
+	mov	x19, x0
+	cbz	w1, .L380
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L380
+	mov	w0, w21
+	bl	P2V_block_in_plane
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR76
+	lsl	w1, w21, 10
+	mov	w2, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	adrp	x1, .LANCHOR77
+	ubfiz	x0, x20, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	adrp	x1, .LANCHOR78
+	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR78]
+.L380:
+	add	x0, x19, :lo12:.LANCHOR74
+	ldrh	w1, [x0, 6]
+	add	w1, w1, 1
+	strh	w1, [x0, 6]
+	ldrh	w1, [x0, 4]
+	add	x2, x0, x1, sxtw 1
+	add	w1, w1, 1
+	and	w1, w1, 1023
+	strh	w1, [x0, 4]
+	strh	w21, [x2, 8]
+.L378:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBLkSort,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBLkSort
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR74
+	adrp	x1, .LANCHOR79
+	add	x0, x2, :lo12:.LANCHOR74
+	add	x29, sp, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR79]
+	adrp	x1, .LANCHOR77
+	ldrh	w8, [x0, 2]
+	mov	x4, x2
+	ldrh	w7, [x0, 6]
+	mov	x6, x0
+	ldr	x10, [x1, #:lo12:.LANCHOR77]
+	and	x11, x8, 65535
+	mov	x5, 0
+.L389:
+	cmp	w7, w5, uxth
+	bhi	.L390
+	sub	w10, w7, #1
+	add	x2, x4, :lo12:.LANCHOR74
+	mov	w0, 0
+.L391:
+	cmp	w0, w10
+	blt	.L396
+	ldp	x29, x30, [sp], 16
+	ret
+.L390:
+	add	x0, x11, x5
+	add	x0, x6, x0, lsl 1
+	ldrh	w0, [x0, 8]
+	bl	P2V_block_in_plane
+	ubfiz	x0, x0, 1, 16
+	ldrh	w0, [x10, x0]
+	str	w0, [x3, x5, lsl 2]
+	add	x5, x5, 1
+	b	.L389
+.L396:
+	add	w5, w0, 1
+	mov	w1, w0
+	and	w5, w5, 65535
+	mov	w4, w5
+.L392:
+	cmp	w4, w7
+	bcc	.L394
+	cmp	w0, w1
+	beq	.L395
+	ubfiz	x4, x0, 2, 16
+	ubfiz	x6, x1, 2, 32
+	add	w0, w8, w0
+	add	w1, w1, w8
+	add	x0, x2, x0, sxtw 1
+	add	x1, x2, x1, sxtw 1
+	ldr	w12, [x3, x4]
+	ldr	w11, [x3, x6]
+	str	w12, [x3, x6]
+	str	w11, [x3, x4]
+	ldrh	w6, [x0, 8]
+	ldrh	w4, [x1, 8]
+	strh	w6, [x1, 8]
+	strh	w4, [x0, 8]
+.L395:
+	mov	w0, w5
+	b	.L391
+.L394:
+	ubfiz	x6, x4, 2, 16
+	ldr	w11, [x3, w1, uxtw 2]
+	ldr	w6, [x3, x6]
+	cmp	w11, w6
+	csel	w1, w1, w4, ls
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L392
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.remove_from_free_sys_Queue,"ax",@progbits
+	.align	2
+	.global	remove_from_free_sys_Queue
+	.type	remove_from_free_sys_Queue, %function
+remove_from_free_sys_Queue:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR74
+	add	x19, x19, :lo12:.LANCHOR74
+	ldrh	w3, [x19, 6]
+	cbz	w3, .L403
+	and	w1, w0, 65535
+	ldrh	w0, [x19, 2]
+	mov	w20, 0
+.L400:
+	cmp	w20, w3
+	bcc	.L402
+.L403:
+	mov	w0, 0
+	b	.L398
+.L402:
+	add	w2, w20, w0
+	ubfiz	x2, x2, 1, 10
+	add	x2, x19, x2
+	ldrh	w2, [x2, 8]
+	cmp	w2, w1
+	bne	.L401
+	adrp	x0, .LC3
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+	ldrh	w0, [x19, 2]
+	add	w20, w0, w20
+	add	x1, x19, x0, sxtw 1
+	add	w0, w0, 1
+	and	w0, w0, 1023
+	ubfiz	x20, x20, 1, 10
+	add	x20, x19, x20
+	strh	w0, [x19, 2]
+	ldrh	w0, [x19, 6]
+	ldrh	w1, [x1, 8]
+	sub	w0, w0, #1
+	strh	w1, [x20, 8]
+	strh	w0, [x19, 6]
+	mov	w0, 1
+.L398:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L401:
+	add	w20, w20, 1
+	b	.L400
+	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueOut
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	adrp	x0, .LANCHOR74
+	add	x0, x0, :lo12:.LANCHOR74
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	ldrh	w2, [x0, 6]
+	stp	x19, x20, [sp, 16]
+	str	x21, [sp, 32]
+	cbz	w2, .L408
+	ldrh	w1, [x0, 2]
+	sub	w2, w2, #1
+	strh	w2, [x0, 6]
+	add	x3, x0, x1, sxtw 1
+	add	w1, w1, 1
+	and	w1, w1, 1023
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR75
+	ldrh	w19, [x3, 8]
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L406
+	mov	w0, w19
+	bl	P2V_block_in_plane
+	adrp	x1, .LANCHOR76
+	and	w20, w0, 65535
+	lsl	w2, w19, 10
+	mov	x21, x1
+	ldr	x0, [x1, #:lo12:.LANCHOR76]
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L407
+	mov	w2, 1
+	mov	w1, 0
+	bl	FlashEraseBlocks
+.L407:
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	adrp	x1, .LANCHOR77
+	ubfiz	x0, x20, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	adrp	x1, .LANCHOR78
+	ldr	w0, [x1, #:lo12:.LANCHOR78]
+	add	w0, w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR78]
+.L406:
+	mov	w0, w19
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L408:
+	mov	w19, 65535
+	b	.L406
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",@progbits
+	.align	2
+	.global	insert_data_list
+	.type	insert_data_list, %function
+insert_data_list:
+	adrp	x1, .LANCHOR38
+	and	w0, w0, 65535
+	ldrh	w14, [x1, #:lo12:.LANCHOR38]
+	cmp	w14, w0
+	bls	.L429
+	adrp	x1, .LANCHOR80
+	mov	w3, 6
+	ldr	x6, [x1, #:lo12:.LANCHOR80]
+	umull	x13, w0, w3
+	mov	w1, -1
+	add	x5, x6, x13
+	strh	w1, [x5, 2]
+	strh	w1, [x6, x13]
+	adrp	x1, .LANCHOR81
+	mov	x15, x1
+	ldr	x12, [x1, #:lo12:.LANCHOR81]
+	cbnz	x12, .L416
+	str	x5, [x1, #:lo12:.LANCHOR81]
+.L429:
+	mov	w0, 0
+	ret
+.L416:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR82
+	ubfiz	x2, x0, 1, 16
+	mov	x4, -6148914691236517206
+	add	x29, sp, 0
+	ldr	x16, [x1, #:lo12:.LANCHOR82]
+	movk	x4, 0xaaab, lsl 0
+	ldrh	w1, [x5, 4]
+	mov	w8, -1
+	mov	w11, w8
+	stp	x19, x20, [sp, 16]
+	cmp	w1, 0
+	mov	w20, 65535
+	ldrh	w7, [x16, x2]
+	mul	w7, w7, w1
+	sub	x1, x12, x6
+	asr	x1, x1, 1
+	csel	w7, w7, w8, ne
+	mov	w8, w3
+	mul	x1, x1, x4
+	adrp	x4, .LANCHOR77
+	ldr	x17, [x4, #:lo12:.LANCHOR77]
+	and	w1, w1, 65535
+	mov	x4, x12
+	add	x10, x17, x2
+	mov	w2, 0
+.L424:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	cmp	w14, w2
+	bcc	.L415
+	cmp	w1, w0
+	beq	.L415
+	ubfiz	x30, x1, 1, 16
+	ldrh	w19, [x4, 4]
+	cmp	w19, 0
+	ldrh	w3, [x16, x30]
+	mul	w3, w3, w19
+	csel	w3, w3, w11, ne
+	cmp	w7, w3
+	bne	.L420
+	ldrh	w19, [x17, x30]
+	ldrh	w3, [x10]
+	cmp	w19, w3
+	bcc	.L422
+.L421:
+	strh	w1, [x6, x13]
+	cmp	x4, x12
+	ldrh	w1, [x4, 2]
+	strh	w1, [x5, 2]
+	bne	.L425
+	strh	w0, [x4, 2]
+	str	x5, [x15, #:lo12:.LANCHOR81]
+	b	.L415
+.L420:
+	bcc	.L421
+.L422:
+	ldrh	w3, [x4]
+	cmp	w3, w20
+	bne	.L423
+	strh	w1, [x5, 2]
+	strh	w0, [x4]
+	adrp	x0, .LANCHOR83
+	str	x5, [x0, #:lo12:.LANCHOR83]
+.L415:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L423:
+	umaddl	x4, w3, w8, x6
+	mov	w1, w3
+	b	.L424
+.L425:
+	ldrh	w1, [x4, 2]
+	mov	w2, 6
+	umull	x1, w1, w2
+	strh	w0, [x6, x1]
+	strh	w0, [x4, 2]
+	b	.L415
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_DATA_LIST
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	insert_data_list
+	adrp	x1, .LANCHOR84
+	ldrh	w0, [x1, #:lo12:.LANCHOR84]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR84]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcs	.L431
+	mov	w2, 205
+	adrp	x1, .LANCHOR85
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	b	printf
+.L431:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",@progbits
+	.align	2
+	.global	insert_free_list
+	.type	insert_free_list, %function
+insert_free_list:
+	and	w0, w0, 65535
+	mov	w7, 65535
+	cmp	w0, w7
+	beq	.L435
+	adrp	x1, .LANCHOR80
+	mov	w6, 6
+	ldr	x3, [x1, #:lo12:.LANCHOR80]
+	umull	x8, w0, w6
+	mov	w1, -1
+	add	x4, x3, x8
+	strh	w1, [x4, 2]
+	strh	w1, [x3, x8]
+	adrp	x1, .LANCHOR86
+	mov	x12, x1
+	ldr	x5, [x1, #:lo12:.LANCHOR86]
+	cbnz	x5, .L436
+	str	x4, [x1, #:lo12:.LANCHOR86]
+.L435:
+	mov	w0, 0
+	ret
+.L436:
+	adrp	x1, .LANCHOR77
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	ldr	x11, [x1, #:lo12:.LANCHOR77]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w13, [x11, x1]
+	sub	x1, x5, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	mov	x2, x5
+	and	w1, w1, 65535
+.L439:
+	ubfiz	x10, x1, 1, 16
+	ldrh	w10, [x11, x10]
+	cmp	w10, w13
+	bcs	.L437
+	ldrh	w10, [x2]
+	cmp	w10, w7
+	bne	.L438
+	strh	w1, [x4, 2]
+	strh	w0, [x2]
+	b	.L435
+.L438:
+	umaddl	x2, w10, w6, x3
+	mov	w1, w10
+	b	.L439
+.L437:
+	ldrh	w6, [x2, 2]
+	cmp	x2, x5
+	strh	w6, [x4, 2]
+	strh	w1, [x3, x8]
+	bne	.L440
+	strh	w0, [x2, 2]
+	str	x4, [x12, #:lo12:.LANCHOR86]
+	b	.L435
+.L440:
+	ldrh	w1, [x2, 2]
+	mov	w4, 6
+	umull	x1, w1, w4
+	strh	w0, [x3, x1]
+	strh	w0, [x2, 2]
+	b	.L435
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",@progbits
+	.align	2
+	.global	INSERT_FREE_LIST
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	insert_free_list
+	adrp	x1, .LANCHOR87
+	ldrh	w0, [x1, #:lo12:.LANCHOR87]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, #:lo12:.LANCHOR87]
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcs	.L441
+	mov	w2, 198
+	adrp	x1, .LANCHOR88
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR88
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	ldp	x29, x30, [sp], 16
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	b	printf
+.L441:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",@progbits
+	.align	2
+	.global	List_remove_node
+	.type	List_remove_node, %function
+List_remove_node:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR80
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	mov	w0, 6
+	str	x23, [sp, 48]
+	ldr	x23, [x20, #:lo12:.LANCHOR80]
+	umull	x21, w1, w0
+	mov	w0, 65535
+	add	x19, x23, x21
+	ldrh	w1, [x19, 2]
+	cmp	w1, w0
+	bne	.L445
+	ldr	x0, [x22]
+	cmp	x19, x0
+	beq	.L445
+	mov	w2, 363
+	adrp	x1, .LANCHOR89
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR89
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L445:
+	ldr	x0, [x22]
+	mov	w1, 65535
+	cmp	x19, x0
+	ldrh	w0, [x23, x21]
+	bne	.L446
+	cmp	w0, w1
+	bne	.L447
+	str	xzr, [x22]
+.L448:
+	mov	w0, -1
+	strh	w0, [x23, x21]
+	strh	w0, [x19, 2]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L447:
+	ldr	x1, [x20, #:lo12:.LANCHOR80]
+	mov	w2, 6
+	umaddl	x0, w0, w2, x1
+	mov	w1, -1
+	str	x0, [x22]
+	strh	w1, [x0, 2]
+	b	.L448
+.L446:
+	cmp	w0, w1
+	ldrh	w1, [x19, 2]
+	bne	.L449
+	cmp	w1, w0
+	beq	.L448
+	mov	w0, 6
+	mov	w2, -1
+	umull	x1, w1, w0
+	ldr	x0, [x20, #:lo12:.LANCHOR80]
+	strh	w2, [x0, x1]
+	b	.L448
+.L449:
+	ldr	x2, [x20, #:lo12:.LANCHOR80]
+	mov	w3, 6
+	umaddl	x4, w0, w3, x2
+	strh	w1, [x4, 2]
+	ldrh	w1, [x19, 2]
+	umull	x1, w1, w3
+	strh	w0, [x2, x1]
+	b	.L448
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",@progbits
+	.align	2
+	.global	List_pop_index_node
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+	ldr	x2, [x0]
+	cbz	x2, .L457
+	stp	x29, x30, [sp, -32]!
+	adrp	x3, .LANCHOR80
+	and	w1, w1, 65535
+	mov	w4, 65535
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	w5, 6
+	ldr	x19, [x3, #:lo12:.LANCHOR80]
+.L453:
+	cbnz	w1, .L454
+.L456:
+	sub	x19, x2, x19
+	mov	x2, -6148914691236517206
+	asr	x19, x19, 1
+	movk	x2, 0xaaab, lsl 0
+	mul	x19, x19, x2
+	and	w19, w19, 65535
+	mov	w1, w19
+	bl	List_remove_node
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L454:
+	ldrh	w3, [x2]
+	cmp	w3, w4
+	beq	.L456
+	sub	w1, w1, #1
+	umaddl	x2, w3, w5, x19
+	and	w1, w1, 65535
+	b	.L453
+.L457:
+	mov	w0, 65535
+	ret
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_get_gc_head_node,"ax",@progbits
+	.align	2
+	.global	List_get_gc_head_node
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+	and	w2, w0, 65535
+	adrp	x0, .LANCHOR81
+	ldr	x1, [x0, #:lo12:.LANCHOR81]
+	cbz	x1, .L467
+	adrp	x0, .LANCHOR80
+	mov	w4, 6
+	ldr	x3, [x0, #:lo12:.LANCHOR80]
+	mov	w0, 65535
+.L464:
+	cbz	w2, .L465
+	ldrh	w1, [x1]
+	cmp	w1, w0
+	bne	.L466
+	ret
+.L466:
+	sub	w2, w2, #1
+	umaddl	x1, w1, w4, x3
+	and	w2, w2, 65535
+	b	.L464
+.L467:
+	mov	w0, 65535
+	ret
+.L465:
+	sub	x0, x1, x3
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	and	w0, w0, 65535
+	ret
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",@progbits
+	.align	2
+	.global	List_update_data_list
+	.type	List_update_data_list, %function
+List_update_data_list:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR90
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w19
+	beq	.L470
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w0, w19
+	beq	.L470
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w19
+	beq	.L470
+	adrp	x1, .LANCHOR80
+	mov	w21, 6
+	adrp	x0, .LANCHOR81
+	mov	x26, x1
+	umull	x21, w19, w21
+	ldr	x23, [x1, #:lo12:.LANCHOR80]
+	ldr	x2, [x0, #:lo12:.LANCHOR81]
+	mov	x25, x0
+	add	x22, x23, x21
+	cmp	x22, x2
+	beq	.L470
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x19, 1, 16
+	mov	x24, x1
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	mov	w1, 65535
+	ldrh	w20, [x2, x0]
+	ldrh	w0, [x22, 4]
+	mul	w20, w20, w0
+	ldrh	w0, [x22, 2]
+	cmp	w20, 0
+	csinv	w20, w20, wzr, ne
+	cmp	w0, w1
+	bne	.L473
+	ldrh	w1, [x23, x21]
+	cmp	w1, w0
+	bne	.L473
+	mov	w2, 481
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L473:
+	ldrh	w0, [x22, 2]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L474
+	ldrh	w1, [x23, x21]
+	cmp	w1, w0
+	beq	.L470
+.L474:
+	mov	w1, 6
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	umull	x1, w0, w1
+	asr	x0, x1, 1
+	mul	x0, x0, x2
+	ldr	x2, [x24, #:lo12:.LANCHOR82]
+	ldrh	w0, [x2, x0, lsl 1]
+	ldr	x2, [x26, #:lo12:.LANCHOR80]
+	add	x1, x2, x1
+	ldrh	w1, [x1, 4]
+	mul	w0, w0, w1
+	cmp	w0, 0
+	csinv	w0, w0, wzr, ne
+	cmp	w20, w0
+	bcs	.L470
+	adrp	x20, .LANCHOR84
+	mov	w1, w19
+	add	x0, x25, :lo12:.LANCHOR81
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	cbnz	w0, .L476
+	mov	w2, 492
+	adrp	x1, .LANCHOR93
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR93
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L476:
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR84]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+.L470:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_alloc_new_blk
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w1, [x0, 10]
+	mov	w20, 0
+	ldr	x0, [x0, 16]
+	str	x21, [sp, 32]
+.L479:
+	cmp	w20, w1
+	bne	.L482
+.L483:
+	mov	w2, 594
+	adrp	x1, .LANCHOR94
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR94
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L484
+.L482:
+	mov	x21, x0
+	ldrh	w2, [x0], 2
+	cbnz	w2, .L480
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x21]
+	tst	w0, 65535
+	beq	.L481
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x19, 48]
+	ldrh	w0, [x19, 8]
+	strh	w20, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+.L481:
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bls	.L483
+.L484:
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L480:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L479
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",@progbits
+	.align	2
+	.global	select_l2p_ram_region
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR66
+	mov	x1, 0
+	mov	w3, 65535
+	add	x29, sp, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR66]
+	adrp	x0, .LANCHOR95
+	str	x19, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR95]
+.L490:
+	and	w19, w1, 65535
+	cmp	w19, w2
+	bcc	.L492
+	add	x3, x0, 4
+	mov	w19, w2
+	mov	w5, -2147483648
+	mov	w1, 0
+.L493:
+	cmp	w1, w2
+	bne	.L495
+	cmp	w19, w2
+	bcc	.L491
+	adrp	x1, .LANCHOR96
+	mov	w19, w2
+	mov	w3, -1
+	ldrh	w4, [x1, #:lo12:.LANCHOR96]
+	mov	w1, 0
+.L496:
+	cmp	w1, w2
+	bne	.L498
+	cmp	w19, w1
+	bcc	.L491
+	mov	w2, 826
+	adrp	x1, .LANCHOR97
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR97
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L491
+.L492:
+	add	x1, x1, 1
+	add	x4, x0, x1, lsl 4
+	ldrh	w4, [x4, -16]
+	cmp	w4, w3
+	bne	.L490
+.L491:
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L495:
+	ldr	w4, [x3]
+	tbnz	w4, #31, .L494
+	cmp	w5, w4
+	bls	.L494
+	mov	w5, w4
+	mov	w19, w1
+.L494:
+	add	w1, w1, 1
+	add	x3, x3, 16
+	and	w1, w1, 65535
+	b	.L493
+.L498:
+	ldr	w6, [x0, 4]
+	cmp	w3, w6
+	bls	.L497
+	ldrh	w5, [x0]
+	cmp	w5, w4
+	csel	w3, w3, w6, eq
+	csel	w19, w19, w1, eq
+.L497:
+	add	w1, w1, 1
+	add	x0, x0, 16
+	and	w1, w1, 65535
+	b	.L496
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",@progbits
+	.align	2
+	.global	FtlUpdateVaildLpn
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+	adrp	x2, .LANCHOR98
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR98]
+	cmp	w1, 4
+	bhi	.L501
+	cbnz	w0, .L501
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR98]
+	ret
+.L501:
+	adrp	x1, .LANCHOR38
+	adrp	x0, .LANCHOR99
+	strh	wzr, [x3, #:lo12:.LANCHOR98]
+	mov	w2, 0
+	ldrh	w5, [x1, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR82
+	str	wzr, [x0, #:lo12:.LANCHOR99]
+	mov	w3, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR82]
+	mov	w7, 65535
+	mov	x1, 0
+.L502:
+	cmp	w5, w1, uxth
+	bhi	.L504
+	cbz	w3, .L500
+	str	w2, [x0, #:lo12:.LANCHOR99]
+.L500:
+	ret
+.L504:
+	ldrh	w4, [x6, x1, lsl 1]
+	cmp	w4, w7
+	beq	.L503
+	add	w2, w2, w4
+	mov	w3, 1
+.L503:
+	add	x1, x1, 1
+	b	.L502
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_set_blk_mode
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+	and	w0, w0, 65535
+	cbz	w1, .L511
+	b	ftl_set_blk_mode.part.9
+.L511:
+	adrp	x1, .LANCHOR0
+	ubfx	x2, x0, 5, 11
+	lsl	x2, x2, 2
+	ldr	x3, [x1, #:lo12:.LANCHOR0]
+	and	w1, w0, 31
+	mov	w0, 1
+	lsl	w0, w0, w1
+	ldr	w1, [x3, x2]
+	bic	w0, w1, w0
+	str	w0, [x3, x2]
+	ret
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_mode
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+	adrp	x1, .LANCHOR0
+	and	w0, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	ubfx	x2, x0, 5, 11
+	and	w0, w0, 31
+	ldr	w1, [x1, x2, lsl 2]
+	lsr	w0, w1, w0
+	and	w0, w0, 1
+	ret
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.ftl_sb_update_avl_pages,"ax",@progbits
+	.align	2
+	.global	ftl_sb_update_avl_pages
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+	and	w2, w2, 65535
+	and	w6, w1, 65535
+	ubfiz	x4, x2, 1, 16
+	adrp	x1, .LANCHOR36
+	add	x4, x4, 16
+	strh	wzr, [x0, 4]
+	add	x4, x0, x4
+	ldrh	w3, [x1, #:lo12:.LANCHOR36]
+	mov	w1, 65535
+.L514:
+	cmp	w2, w3
+	bcc	.L516
+	adrp	x1, .LANCHOR51
+	ubfiz	x3, x3, 1, 16
+	add	x3, x3, 16
+	add	x2, x0, 16
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	add	x3, x0, x3
+	mov	w5, 65535
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+	sub	w1, w1, w6
+.L517:
+	cmp	x2, x3
+	bne	.L519
+	ret
+.L516:
+	ldrh	w5, [x4]
+	cmp	w5, w1
+	beq	.L515
+	ldrh	w5, [x0, 4]
+	add	w5, w5, 1
+	strh	w5, [x0, 4]
+.L515:
+	add	w2, w2, 1
+	add	x4, x4, 2
+	and	w2, w2, 65535
+	b	.L514
+.L519:
+	ldrh	w4, [x2]
+	cmp	w4, w5
+	beq	.L518
+	ldrh	w4, [x0, 4]
+	add	w4, w1, w4
+	strh	w4, [x0, 4]
+.L518:
+	add	x2, x2, 2
+	b	.L517
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",@progbits
+	.align	2
+	.global	make_superblock
+	.type	make_superblock, %function
+make_superblock:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldrh	w1, [x0]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	adrp	x0, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w1, w0
+	bcc	.L521
+	mov	w2, 2298
+	adrp	x1, .LANCHOR100
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR100
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L521:
+	adrp	x0, .LANCHOR36
+	adrp	x7, .LANCHOR45
+	add	x6, x19, 16
+	add	x7, x7, :lo12:.LANCHOR45
+	ldrh	w8, [x0, #:lo12:.LANCHOR36]
+	mov	x5, 0
+	strh	wzr, [x19, 4]
+	mov	w10, -1
+	strb	wzr, [x19, 7]
+.L522:
+	cmp	w8, w5, uxth
+	bhi	.L524
+	adrp	x1, .LANCHOR51
+	ldrb	w0, [x19, 7]
+	strb	wzr, [x19, 9]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	mul	w0, w0, w1
+	strh	w0, [x19, 4]
+	adrp	x0, .LANCHOR101
+	ldr	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L525
+	adrp	x0, .LANCHOR77
+	ldrh	w1, [x19]
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldrh	w0, [x0, x1, lsl 1]
+	cmp	w0, 59
+	bhi	.L525
+	mov	w0, 1
+	strb	w0, [x19, 9]
+.L525:
+	adrp	x0, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbz	w0, .L526
+	mov	w0, 1
+	strb	w0, [x19, 9]
+.L526:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L524:
+	ldrh	w1, [x19]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+	mov	w4, w0
+	strh	w10, [x6]
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L523
+	strh	w4, [x6]
+	ldrb	w0, [x19, 7]
+	add	w0, w0, 1
+	strb	w0, [x19, 7]
+.L523:
+	add	x5, x5, 1
+	add	x6, x6, 2
+	b	.L522
+	.size	make_superblock, .-make_superblock
+	.section	.text.update_multiplier_value,"ax",@progbits
+	.align	2
+	.global	update_multiplier_value
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+	and	w6, w0, 65535
+	adrp	x0, .LANCHOR36
+	mov	x7, 0
+	adrp	x8, .LANCHOR45
+	ldrh	w10, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR51
+	mov	w5, 0
+	add	x8, x8, :lo12:.LANCHOR45
+	ldrh	w11, [x0, #:lo12:.LANCHOR51]
+	cmp	w10, w7, uxth
+	bhi	.L546
+	cbz	w5, .L544
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.L545:
+	adrp	x0, .LANCHOR80
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	umaddl	x6, w6, w1, x0
+	mov	w0, 0
+	strh	w5, [x6, 4]
+	ret
+.L539:
+	mov	w5, 0
+	b	.L538
+.L544:
+	mov	w5, 0
+	b	.L545
+.L546:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L537:
+	ldrb	w0, [x8, x7]
+	mov	w1, w6
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L536
+	add	w5, w5, w11
+	and	w5, w5, 65535
+.L536:
+	add	x7, x7, 1
+	cmp	w10, w7, uxth
+	bhi	.L537
+	cbz	w5, .L539
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+.L538:
+	adrp	x0, .LANCHOR80
+	mov	w1, 6
+	ldr	x0, [x0, #:lo12:.LANCHOR80]
+	umaddl	x6, w6, w1, x0
+	mov	w0, 0
+	strh	w5, [x6, 4]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMinEraseCount
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+	adrp	x0, .LANCHOR86
+	ldr	x0, [x0, #:lo12:.LANCHOR86]
+	cbz	x0, .L549
+	adrp	x1, .LANCHOR80
+	ldr	x1, [x1, #:lo12:.LANCHOR80]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR77
+	ldr	x1, [x1, #:lo12:.LANCHOR77]
+	and	x0, x0, 65535
+	ldrh	w0, [x1, x0, lsl 1]
+	ret
+.L549:
+	mov	w0, 0
+	ret
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",@progbits
+	.align	2
+	.global	GetFreeBlockMaxEraseCount
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+	adrp	x1, .LANCHOR86
+	and	w0, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR86]
+	cbz	x1, .L557
+	adrp	x2, .LANCHOR87
+	mov	w3, 7
+	mov	w5, 6
+	mov	w6, 65535
+	ldrh	w2, [x2, #:lo12:.LANCHOR87]
+	mul	w2, w2, w3
+	asr	w2, w2, 3
+	cmp	w0, w2
+	csel	w0, w2, w0, gt
+	adrp	x2, .LANCHOR80
+	ldr	x3, [x2, #:lo12:.LANCHOR80]
+	mov	x2, -6148914691236517206
+	movk	x2, 0xaaab, lsl 0
+	sub	x1, x1, x3
+	asr	x1, x1, 1
+	mul	x1, x1, x2
+	mov	w2, 0
+	and	w1, w1, 65535
+.L553:
+	cmp	w0, w2
+	beq	.L556
+	umull	x4, w1, w5
+	ldrh	w4, [x3, x4]
+	cmp	w4, w6
+	bne	.L554
+.L556:
+	adrp	x0, .LANCHOR77
+	ubfiz	x1, x1, 1, 16
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	ldrh	w0, [x0, x1]
+	ret
+.L554:
+	add	w2, w2, 1
+	mov	w1, w4
+	and	w2, w2, 65535
+	b	.L553
+.L557:
+	mov	w0, 0
+	ret
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.free_data_superblock,"ax",@progbits
+	.align	2
+	.global	free_data_superblock
+	.type	free_data_superblock, %function
+free_data_superblock:
+	and	w0, w0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	beq	.L561
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR82
+	ubfiz	x1, x0, 1, 16
+	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	strh	wzr, [x2, x1]
+	bl	INSERT_FREE_LIST
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L561:
+	mov	w0, 0
+	ret
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.FtlGcBufInit,"ax",@progbits
+	.align	2
+	.global	FtlGcBufInit
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+	adrp	x1, .LANCHOR103
+	adrp	x0, .LANCHOR102
+	adrp	x7, .LANCHOR104
+	adrp	x6, .LANCHOR105
+	ldr	x5, [x1, #:lo12:.LANCHOR103]
+	adrp	x1, .LANCHOR56
+	str	wzr, [x0, #:lo12:.LANCHOR102]
+	adrp	x0, .LANCHOR36
+	ldrh	w10, [x1, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR57
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	mov	w8, 24
+	ldrh	w11, [x1, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR106
+	ldr	x14, [x7, #:lo12:.LANCHOR104]
+	mov	x3, x5
+	ldr	x4, [x1, #:lo12:.LANCHOR106]
+	mov	w2, 0
+	ldr	x15, [x6, #:lo12:.LANCHOR105]
+	nop // between mem op and mult-accumulate
+	umaddl	x8, w0, w8, x5
+	add	x4, x4, 8
+	mov	w1, 0
+	mov	w16, 1
+.L565:
+	add	w13, w2, w10
+	add	w12, w1, w11
+	cmp	x3, x8
+	bne	.L566
+	adrp	x1, .LANCHOR107
+	ldr	x7, [x7, #:lo12:.LANCHOR104]
+	ldr	x6, [x6, #:lo12:.LANCHOR105]
+	mov	w8, 24
+	ldr	w4, [x1, #:lo12:.LANCHOR107]
+.L567:
+	cmp	w0, w4
+	bcc	.L568
+	ret
+.L566:
+	asr	w2, w2, 2
+	asr	w1, w1, 2
+	add	x2, x14, x2, sxtw 2
+	add	x1, x15, x1, sxtw 2
+	str	w16, [x3, 16]
+	stp	x2, x1, [x3]
+	add	x3, x3, 24
+	stp	x2, x1, [x4]
+	add	x4, x4, 56
+	mov	w1, w12
+	mov	w2, w13
+	b	.L565
+.L568:
+	umull	x3, w0, w8
+	mul	w1, w10, w0
+	add	x2, x5, x3
+	asr	w1, w1, 2
+	add	x1, x7, x1, sxtw 2
+	str	wzr, [x2, 16]
+	str	x1, [x5, x3]
+	mul	w1, w11, w0
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	asr	w1, w1, 2
+	add	x1, x6, x1, sxtw 2
+	str	x1, [x2, 8]
+	b	.L567
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlGcBufFree,"ax",@progbits
+	.align	2
+	.global	FtlGcBufFree
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+	adrp	x2, .LANCHOR107
+	mov	w3, 0
+	mov	w7, 56
+	mov	w10, 24
+	ldr	w8, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
+	ldr	x4, [x2, #:lo12:.LANCHOR103]
+.L570:
+	cmp	w3, w1
+	bcs	.L569
+	umaddl	x6, w3, w7, x0
+	mov	w2, 0
+	b	.L575
+.L571:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+.L575:
+	cmp	w2, w8
+	bcs	.L572
+	umull	x5, w2, w10
+	add	x11, x4, x5
+	ldr	x12, [x4, x5]
+	ldr	x5, [x6, 8]
+	cmp	x12, x5
+	bne	.L571
+	str	wzr, [x11, 16]
+.L572:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L570
+.L569:
+	ret
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",@progbits
+	.align	2
+	.global	FtlGcBufAlloc
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+	adrp	x2, .LANCHOR107
+	mov	w3, 0
+	mov	w7, 24
+	mov	w8, 1
+	ldr	w5, [x2, #:lo12:.LANCHOR107]
+	adrp	x2, .LANCHOR103
+	mov	w10, 56
+	ldr	x6, [x2, #:lo12:.LANCHOR103]
+.L577:
+	cmp	w3, w1
+	bcs	.L576
+	mov	w2, 0
+	b	.L582
+.L578:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+.L582:
+	cmp	w2, w5
+	bcs	.L579
+	umaddl	x4, w2, w7, x6
+	ldr	w11, [x4, 16]
+	cbnz	w11, .L578
+	umaddl	x2, w3, w10, x0
+	ldr	x11, [x4]
+	str	w8, [x4, 16]
+	ldr	x4, [x4, 8]
+	stp	x11, x4, [x2, 8]
+.L579:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L577
+.L576:
+	ret
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",@progbits
+	.align	2
+	.global	IsBlkInGcList
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+	adrp	x1, .LANCHOR108
+	and	w0, w0, 65535
+	ldrh	w2, [x1, #:lo12:.LANCHOR108]
+	adrp	x1, .LANCHOR109
+	ldr	x3, [x1, #:lo12:.LANCHOR109]
+	mov	x1, 0
+.L584:
+	cmp	w2, w1, uxth
+	bhi	.L586
+	mov	w0, 0
+	ret
+.L586:
+	add	x1, x1, 1
+	add	x4, x3, x1, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w0
+	bne	.L584
+	mov	w0, 1
+	ret
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",@progbits
+	.align	2
+	.global	FtlGcUpdatePage
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+	mov	w6, w0
+	mov	w10, w1
+	mov	w8, w2
+	stp	x29, x30, [sp, -16]!
+	lsr	w0, w0, 10
+	add	x29, sp, 0
+	bl	P2V_block_in_plane
+	and	w7, w0, 65535
+	adrp	x4, .LANCHOR108
+	adrp	x2, .LANCHOR109
+	mov	x3, 0
+	ldrh	w1, [x4, #:lo12:.LANCHOR108]
+	ldr	x5, [x2, #:lo12:.LANCHOR109]
+.L589:
+	and	w2, w3, 65535
+	cmp	w2, w1
+	bcc	.L591
+	bne	.L590
+	and	x3, x3, 65535
+	strh	w0, [x5, x3, lsl 1]
+	ldrh	w0, [x4, #:lo12:.LANCHOR108]
+	add	w0, w0, 1
+	strh	w0, [x4, #:lo12:.LANCHOR108]
+	b	.L590
+.L591:
+	add	x3, x3, 1
+	add	x2, x5, x3, lsl 1
+	ldrh	w2, [x2, -2]
+	cmp	w2, w7
+	bne	.L589
+.L590:
+	adrp	x4, .LANCHOR110
+	adrp	x1, .LANCHOR111
+	mov	w3, 12
+	ldrh	w0, [x4, #:lo12:.LANCHOR110]
+	ldr	x5, [x1, #:lo12:.LANCHOR111]
+	umull	x3, w0, w3
+	add	w0, w0, 1
+	add	x7, x5, x3
+	stp	w10, w8, [x7, 4]
+	str	w6, [x5, x3]
+	strh	w0, [x4, #:lo12:.LANCHOR110]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcRefreshBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshBlock
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	adrp	x4, .LANCHOR112
+	and	w0, w0, 65535
+	ldrh	w5, [x4, #:lo12:.LANCHOR112]
+	cmp	w5, w0
+	beq	.L594
+	adrp	x1, .LANCHOR113
+	ldrh	w3, [x1, #:lo12:.LANCHOR113]
+	cmp	w0, w3
+	beq	.L594
+	mov	w2, 65535
+	cmp	w5, w2
+	bne	.L595
+	strh	w0, [x4, #:lo12:.LANCHOR112]
+.L594:
+	mov	w0, 0
+	ret
+.L595:
+	cmp	w3, w2
+	bne	.L594
+	strh	w0, [x1, #:lo12:.LANCHOR113]
+	b	.L594
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcRefreshOpenBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcRefreshOpenBlock
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
+	b	FtlGcRefreshBlock
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcMarkBadPhyBlk
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	and	w7, w0, 65535
+	stp	x29, x30, [sp, -16]!
+	mov	w0, w7
+	add	x29, sp, 0
+	bl	P2V_block_in_plane
+	and	w6, w0, 65535
+	bl	FtlGcRefreshBlock
+	adrp	x0, .LANCHOR101
+	ldr	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L598
+	adrp	x1, .LANCHOR77
+	ubfiz	x0, x6, 1, 16
+	ldr	x2, [x1, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x0]
+	cmp	w1, 29
+	bls	.L598
+	sub	w1, w1, #30
+	strh	w1, [x2, x0]
+.L598:
+	adrp	x1, .LANCHOR114
+	adrp	x3, .LANCHOR115
+	add	x3, x3, :lo12:.LANCHOR115
+	mov	x2, 0
+	ldrh	w0, [x1, #:lo12:.LANCHOR114]
+.L599:
+	cmp	w0, w2, uxth
+	bhi	.L601
+	cmp	w0, 15
+	bhi	.L600
+	add	w2, w0, 1
+	strh	w2, [x1, #:lo12:.LANCHOR114]
+	adrp	x1, .LANCHOR115
+	add	x1, x1, :lo12:.LANCHOR115
+	strh	w7, [x1, w0, sxtw 1]
+	b	.L600
+.L601:
+	add	x2, x2, 1
+	add	x4, x3, x2, lsl 1
+	ldrh	w4, [x4, -2]
+	cmp	w4, w7
+	bne	.L599
+.L600:
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcReFreshBadBlk
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+	adrp	x0, .LANCHOR114
+	ldrh	w0, [x0, #:lo12:.LANCHOR114]
+	cbz	w0, .L613
+	adrp	x1, .LANCHOR112
+	ldrh	w2, [x1, #:lo12:.LANCHOR112]
+	mov	w1, 65535
+	cmp	w2, w1
+	bne	.L613
+	stp	x29, x30, [sp, -16]!
+	adrp	x6, .LANCHOR116
+	add	x29, sp, 0
+	ldrh	w1, [x6, #:lo12:.LANCHOR116]
+	cmp	w1, w0
+	bcc	.L608
+	strh	wzr, [x6, #:lo12:.LANCHOR116]
+.L608:
+	ldrh	w1, [x6, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR115
+	add	x0, x0, :lo12:.LANCHOR115
+	ldrh	w0, [x0, x1, lsl 1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	w0, [x6, #:lo12:.LANCHOR116]
+	ldp	x29, x30, [sp], 16
+	add	w0, w0, 1
+	strh	w0, [x6, #:lo12:.LANCHOR116]
+	mov	w0, 0
+	ret
+.L613:
+	mov	w0, 0
+	ret
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_memset,"ax",@progbits
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+	uxtw	x2, w2
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.BuildFlashLsbPageTable,"ax",@progbits
+	.align	2
+	.global	BuildFlashLsbPageTable
+	.type	BuildFlashLsbPageTable, %function
+BuildFlashLsbPageTable:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	cbnz	w0, .L618
+	adrp	x1, .LANCHOR16
+	add	x1, x1, :lo12:.LANCHOR16
+	mov	x0, 0
+.L619:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 256
+	bne	.L619
+.L625:
+	adrp	x19, .LANCHOR117
+	add	x19, x19, :lo12:.LANCHOR117
+	mov	w1, 255
+	mov	w2, 1024
+	mov	x0, x19
+	bl	ftl_memset
+	adrp	x1, .LANCHOR16
+	and	w20, w20, 65535
+	add	x1, x1, :lo12:.LANCHOR16
+	mov	x0, 0
+.L620:
+	cmp	w20, w0, uxth
+	bhi	.L642
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L618:
+	cmp	w0, 1
+	bne	.L621
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	mov	x1, 0
+.L624:
+	and	w0, w1, 65535
+	cmp	x1, 3
+	bls	.L622
+	ubfiz	w3, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 2
+	sub	w0, w3, w0
+	and	w0, w0, 65535
+.L622:
+	strh	w0, [x2, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L624
+	b	.L625
+.L621:
+	cmp	w0, 2
+	bne	.L626
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	mov	w1, 65535
+	mov	x0, 0
+.L628:
+	cmp	x0, 2
+	and	w3, w0, 65535
+	csel	w3, w3, w1, cc
+	strh	w3, [x2, x0, lsl 1]
+	add	w1, w1, 2
+	add	x0, x0, 1
+	and	w1, w1, 65535
+	cmp	x0, 256
+	bne	.L628
+	b	.L625
+.L626:
+	cmp	w0, 3
+	bne	.L629
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	mov	x1, 0
+.L632:
+	and	w0, w1, 65535
+	cmp	x1, 5
+	bls	.L630
+	ubfiz	w3, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 4
+	sub	w0, w3, w0
+	and	w0, w0, 65535
+.L630:
+	strh	w0, [x2, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L632
+	b	.L625
+.L629:
+	cmp	w0, 4
+	bne	.L633
+	adrp	x2, .LANCHOR16
+	add	x1, x2, :lo12:.LANCHOR16
+	add	x1, x1, 16
+	strh	wzr, [x2, #:lo12:.LANCHOR16]
+	mov	w2, 1
+	strh	w0, [x1, -8]
+	mov	w0, 5
+	strh	w2, [x1, -14]
+	mov	w2, 2
+	strh	w0, [x1, -6]
+	mov	w0, 7
+	strh	w2, [x1, -12]
+	mov	w2, 3
+	strh	w0, [x1, -4]
+	mov	w0, 8
+	strh	w2, [x1, -10]
+	strh	w0, [x1, -2]
+	mov	w0, 8
+.L635:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 256
+	bne	.L635
+	b	.L625
+.L633:
+	cmp	w0, 5
+	bne	.L636
+	adrp	x1, .LANCHOR16
+	add	x1, x1, :lo12:.LANCHOR16
+	mov	x0, 0
+.L637:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 16
+	bne	.L637
+	add	x1, x1, 32
+.L638:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 496
+	bne	.L638
+	b	.L625
+.L636:
+	cmp	w0, 6
+	bne	.L625
+	adrp	x3, .LANCHOR16
+	add	x3, x3, :lo12:.LANCHOR16
+	mov	w1, 0
+	mov	x2, 0
+	mov	w4, 12
+	mov	w5, 10
+.L641:
+	and	w0, w2, 65535
+	cmp	x2, 5
+	bls	.L639
+	tst	x0, 1
+	csel	w0, w4, w5, ne
+	sub	w0, w1, w0
+	and	w0, w0, 65535
+.L639:
+	strh	w0, [x3, x2, lsl 1]
+	add	w1, w1, 3
+	and	w1, w1, 65535
+	add	x2, x2, 1
+	cmp	w1, 768
+	bne	.L641
+	b	.L625
+.L642:
+	ldrh	w2, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	strh	w2, [x19, w2, sxtw 1]
+	b	.L620
+	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
+	.section	.text.FlashDieInfoInit,"ax",@progbits
+	.align	2
+	.global	FlashDieInfoInit
+	.type	FlashDieInfoInit, %function
+FlashDieInfoInit:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR29+10
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR25
+	adrp	x20, .LANCHOR118
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR29+10]
+	adrp	x23, .LANCHOR3
+	stp	x21, x22, [sp, 32]
+	strb	wzr, [x19, #:lo12:.LANCHOR25]
+	cmp	w0, 256
+	strb	wzr, [x20, #:lo12:.LANCHOR118]
+	str	x25, [sp, 64]
+	bls	.L658
+	mov	w0, 512
+.L675:
+	adrp	x25, .LANCHOR26
+	add	x22, x25, :lo12:.LANCHOR26
+	str	w0, [x23, #:lo12:.LANCHOR3]
+	mov	w2, 8
+	mov	w1, 0
+	mov	x0, x22
+	adrp	x24, .LANCHOR17
+	bl	ftl_memset
+	add	x21, x24, :lo12:.LANCHOR17
+	mov	w2, 32
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+	mov	w2, 192
+	mov	w1, 0
+	adrp	x0, .LANCHOR23
+	add	x0, x0, :lo12:.LANCHOR23
+	bl	ftl_memset
+	adrp	x0, .LANCHOR18
+	adrp	x12, .LANCHOR22
+	add	x14, x19, :lo12:.LANCHOR25
+	add	x15, x12, :lo12:.LANCHOR22
+	ldr	x7, [x0, #:lo12:.LANCHOR18]
+	mov	x8, 0
+	add	x10, x7, 1
+	ldrb	w11, [x7]
+.L662:
+	mov	w2, w11
+	add	x1, x15, x8, lsl 3
+	mov	x0, x10
+	bl	FlashMemCmp8
+	cbnz	w0, .L661
+	ldrb	w1, [x14]
+	add	w0, w1, 1
+	strb	w0, [x14]
+	str	wzr, [x21, x1, lsl 2]
+	strb	w8, [x22, x1]
+.L661:
+	add	x8, x8, 1
+	cmp	x8, 4
+	bne	.L662
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
+	strb	w0, [x20, #:lo12:.LANCHOR118]
+	ldrb	w0, [x7, 8]
+	cmp	w0, 2
+	beq	.L663
+.L667:
+	ldrb	w0, [x19, #:lo12:.LANCHOR25]
+	ldrh	w1, [x7, 14]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	mul	w0, w0, w1
+	ldrb	w1, [x7, 13]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR119
+	ldp	x29, x30, [sp], 80
+	strh	w0, [x1, #:lo12:.LANCHOR119]
+	ret
+.L658:
+	cmp	w0, 128
+	bls	.L675
+	mov	w0, 256
+	b	.L675
+.L663:
+	ldr	w20, [x23, #:lo12:.LANCHOR3]
+	add	x12, x12, :lo12:.LANCHOR22
+	add	x14, x19, :lo12:.LANCHOR25
+	add	x24, x24, :lo12:.LANCHOR17
+	add	x13, x25, :lo12:.LANCHOR26
+	mov	x15, 0
+.L666:
+	mov	w2, w11
+	add	x1, x12, x15, lsl 3
+	mov	x0, x10
+	bl	FlashMemCmp8
+	cbnz	w0, .L664
+	ldrb	w2, [x7, 13]
+	ldrh	w0, [x7, 14]
+	ldrb	w1, [x14]
+	and	w0, w0, 65280
+	mul	w2, w2, w20
+	mul	w0, w0, w2
+	sxtw	x2, w1
+	str	w0, [x24, x2, lsl 2]
+	ldrb	w3, [x7, 23]
+	cbz	w3, .L665
+	lsl	w0, w0, 1
+	str	w0, [x24, x2, lsl 2]
+.L665:
+	add	w1, w1, 1
+	strb	w15, [x13, x2]
+	strb	w1, [x14]
+.L664:
+	add	x15, x15, 1
+	cmp	x15, 4
+	bne	.L666
+	b	.L667
+	.size	FlashDieInfoInit, .-FlashDieInfoInit
+	.section	.text.ReadFlashInfo,"ax",@progbits
+	.align	2
+	.global	ReadFlashInfo
+	.type	ReadFlashInfo, %function
+ReadFlashInfo:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 11
+	mov	w1, 0
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	bl	ftl_memset
+	adrp	x0, .LANCHOR18
+	adrp	x3, .LANCHOR67
+	mov	w4, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR18]
+	adrp	x0, .LANCHOR3
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	ldrb	w2, [x1, 9]
+	mul	w0, w0, w2
+	strb	w0, [x19, 4]
+	ubfx	x0, x0, 8, 8
+	strb	w0, [x19, 5]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	strb	w0, [x19, 7]
+	add	x0, x3, :lo12:.LANCHOR67
+	ldrb	w3, [x3, #:lo12:.LANCHOR67]
+	strb	w3, [x19]
+	ldrb	w3, [x0, 1]
+	strb	w3, [x19, 1]
+	ldrb	w3, [x0, 2]
+	ldrb	w0, [x0, 3]
+	strb	w3, [x19, 2]
+	strb	w0, [x19, 3]
+	mov	w0, 32
+	strb	w2, [x19, 6]
+	adrp	x2, .LANCHOR26
+	strb	w0, [x19, 8]
+	add	x2, x2, :lo12:.LANCHOR26
+	ldrb	w0, [x1, 7]
+	mov	x1, 0
+	strb	w0, [x19, 9]
+	adrp	x0, .LANCHOR25
+	strb	wzr, [x19, 10]
+	ldrb	w3, [x0, #:lo12:.LANCHOR25]
+.L677:
+	cmp	w3, w1, uxtb
+	bhi	.L678
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L678:
+	ldrb	w0, [x1, x2]
+	add	x1, x1, 1
+	ldrb	w5, [x19, 10]
+	lsl	w0, w4, w0
+	orr	w0, w0, w5
+	strb	w0, [x19, 10]
+	b	.L677
+	.size	ReadFlashInfo, .-ReadFlashInfo
+	.section	.text.FtlBbt2Bitmap,"ax",@progbits
+	.align	2
+	.global	FtlBbt2Bitmap
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x21, x0
+	adrp	x0, .LANCHOR120
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR49
+	adrp	x23, .LANCHOR121
+	ldrh	w2, [x0, #:lo12:.LANCHOR120]
+	add	x22, x22, :lo12:.LANCHOR49
+	add	x23, x23, :lo12:.LANCHOR121
+	stp	x19, x20, [sp, 16]
+	mov	w24, 65535
+	mov	x19, 0
+	mov	x20, x1
+	lsl	w2, w2, 2
+	mov	w1, 0
+	mov	x0, x20
+	bl	ftl_memset
+.L683:
+	ldrh	w0, [x21, x19]
+	cmp	w0, w24
+	beq	.L680
+	ldrh	w1, [x22]
+	cmp	w1, w0
+	bhi	.L682
+	mov	w2, 79
+	mov	x1, x23
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L682:
+	ldrh	w1, [x21, x19]
+	mov	w2, 1
+	add	x19, x19, 2
+	cmp	x19, 1024
+	ubfx	x0, x1, 5, 11
+	and	w1, w1, 31
+	lsl	x0, x0, 2
+	lsl	w2, w2, w1
+	ldr	w1, [x20, x0]
+	orr	w1, w1, w2
+	str	w1, [x20, x0]
+	bne	.L683
+.L680:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",@progbits
+	.align	2
+	.global	FtlBbtMemInit
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	adrp	x1, .LANCHOR73
+	add	x0, x1, :lo12:.LANCHOR73
+	mov	w2, -1
+	add	x0, x0, 12
+	strh	w2, [x1, #:lo12:.LANCHOR73]
+	mov	w2, 16
+	strh	wzr, [x0, -6]
+	mov	w1, 255
+	b	ftl_memset
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",@progbits
+	.align	2
+	.global	FtlFreeSysBlkQueueInit
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR74
+	add	x3, x1, :lo12:.LANCHOR74
+	mov	w2, 2048
+	add	x29, sp, 0
+	strh	w0, [x1, #:lo12:.LANCHOR74]
+	mov	w1, 0
+	strh	wzr, [x3, 2]
+	add	x0, x3, 8
+	strh	wzr, [x3, 4]
+	strh	wzr, [x3, 6]
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",@progbits
+	.align	2
+	.global	ftl_free_no_use_map_blk
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	stp	x29, x30, [sp, -80]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w2, [x0, 10]
+	stp	x21, x22, [sp, 32]
+	ldp	x21, x20, [x0, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	lsl	w2, w2, 1
+	ldr	x23, [x0, 16]
+	mov	x0, x21
+	bl	ftl_memset
+	mov	w0, 0
+.L691:
+	ldrh	w1, [x19, 6]
+	cmp	w1, w0
+	bhi	.L695
+	ldrh	w26, [x21]
+	adrp	x24, .LANCHOR52
+	add	x24, x24, :lo12:.LANCHOR52
+	mov	w25, 0
+	mov	w20, 0
+.L696:
+	ldrh	w0, [x19, 10]
+	cmp	w0, w20
+	bhi	.L700
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L695:
+	ubfiz	x1, x0, 2, 16
+	ldr	w2, [x20, x1]
+	mov	w1, 0
+	ubfx	x2, x2, 10, 16
+.L692:
+	ldrh	w3, [x19, 10]
+	cmp	w3, w1
+	bhi	.L694
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	b	.L691
+.L694:
+	ubfiz	x3, x1, 1, 16
+	ldrh	w4, [x23, x3]
+	cmp	w4, w2
+	bne	.L693
+	ldrh	w4, [x21, x3]
+	add	w4, w4, 1
+	strh	w4, [x21, x3]
+.L693:
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L692
+.L700:
+	ldrh	w0, [x19]
+	uxtw	x22, w20
+	cmp	w0, w20
+	bne	.L697
+	ldrh	w0, [x24]
+	ldrh	w1, [x19, 2]
+	cmp	w1, w0
+	bcs	.L697
+	strh	w0, [x21, x22, lsl 1]
+.L697:
+	lsl	x22, x22, 1
+	ldrh	w0, [x21, x22]
+	cmp	w26, w0
+	bls	.L698
+	mov	w25, w20
+	mov	w26, w0
+.L698:
+	cbnz	w0, .L699
+	ldrh	w0, [x23, x22]
+	cbz	w0, .L699
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+	strh	wzr, [x23, x22]
+	ldrh	w0, [x19, 8]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+.L699:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L696
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",@progbits
+	.align	2
+	.global	FtlL2PDataInit
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR122
+	adrp	x20, .LANCHOR63
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR122]
+	adrp	x22, .LANCHOR56
+	ldr	w2, [x20, #:lo12:.LANCHOR63]
+	adrp	x21, .LANCHOR66
+	str	x23, [sp, 48]
+	adrp	x23, .LANCHOR123
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x21, #:lo12:.LANCHOR66]
+	mov	w1, 255
+	ldrh	w2, [x22, #:lo12:.LANCHOR56]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR123]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR95
+	ldrh	w3, [x21, #:lo12:.LANCHOR66]
+	ldr	x6, [x23, #:lo12:.LANCHOR123]
+	mov	x1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	mov	w2, -1
+	ldrh	w5, [x22, #:lo12:.LANCHOR56]
+	add	x3, x0, x3, lsl 4
+.L706:
+	add	x4, x1, x5
+	cmp	x0, x3
+	bne	.L707
+	adrp	x1, .LANCHOR124
+	add	x0, x1, :lo12:.LANCHOR124
+	ldp	x21, x22, [sp, 32]
+	strh	w2, [x1, #:lo12:.LANCHOR124]
+	ldr	w1, [x20, #:lo12:.LANCHOR63]
+	strh	w1, [x0, 10]
+	mov	w1, -3902
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR125
+	ldr	x23, [sp, 48]
+	strh	w2, [x0, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR125]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR65
+	strh	w2, [x0, 60]
+	ldrh	w1, [x1, #:lo12:.LANCHOR65]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR126
+	ldr	x1, [x1, #:lo12:.LANCHOR126]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR127
+	ldr	x1, [x1, #:lo12:.LANCHOR127]
+	str	x1, [x0, 24]
+	ldr	x1, [x19, #:lo12:.LANCHOR122]
+	ldp	x19, x20, [sp, 16]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR128
+	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	str	x1, [x0, 40]
+	ldp	x29, x30, [sp], 64
+	ret
+.L707:
+	and	x1, x1, -4
+	strh	w2, [x0]
+	add	x1, x6, x1
+	str	wzr, [x0, 4]
+	str	x1, [x0, 8]
+	add	x0, x0, 16
+	mov	x1, x4
+	b	.L706
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",@progbits
+	.align	2
+	.global	FtlVariablesInit
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR129
+	mov	w1, -1
+	add	x29, sp, 0
+	str	xzr, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR130
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR39
+	strh	w1, [x0, #:lo12:.LANCHOR130]
+	adrp	x0, .LANCHOR131
+	mov	w1, -1
+	str	wzr, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LANCHOR132
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+	adrp	x0, .LANCHOR133
+	str	w1, [x0, #:lo12:.LANCHOR133]
+	adrp	x0, .LANCHOR101
+	mov	w1, 0
+	str	wzr, [x0, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR69
+	strh	wzr, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR60
+	ldrh	w2, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR70
+	ldr	x0, [x0, #:lo12:.LANCHOR70]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR77
+	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR77]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR134
+	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR134]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	mov	w2, 48
+	mov	w1, 0
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
+	bl	ftl_memset
+	mov	w2, 512
+	mov	w1, 0
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",@progbits
+	.align	2
+	.global	SupperBlkListInit
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR39
+	mov	w1, 0
+	add	x29, sp, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR39]
+	mov	w0, 6
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR80
+	stp	x19, x20, [sp, 16]
+	adrp	x23, .LANCHOR84
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR87
+	mul	w2, w2, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR80]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR38
+	str	x27, [sp, 80]
+	adrp	x26, .LANCHOR45
+	add	x25, x25, :lo12:.LANCHOR38
+	add	x26, x26, :lo12:.LANCHOR45
+	bl	ftl_memset
+	mov	w21, 0
+	adrp	x0, .LANCHOR86
+	mov	w20, 0
+	mov	w19, 0
+	strh	wzr, [x23, #:lo12:.LANCHOR84]
+	str	xzr, [x0, #:lo12:.LANCHOR86]
+	adrp	x0, .LANCHOR81
+	strh	wzr, [x22, #:lo12:.LANCHOR87]
+	adrp	x27, .LANCHOR36
+	str	xzr, [x0, #:lo12:.LANCHOR81]
+	adrp	x0, .LANCHOR83
+	str	xzr, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR137
+	strh	wzr, [x0, #:lo12:.LANCHOR137]
+.L712:
+	ldrh	w0, [x25]
+	cmp	w19, w0
+	bge	.L719
+	adrp	x0, .LANCHOR51
+	ldrh	w8, [x27, #:lo12:.LANCHOR36]
+	mov	w5, 0
+	mov	w6, 0
+	ldrh	w7, [x0, #:lo12:.LANCHOR51]
+	b	.L720
+.L714:
+	ldrb	w0, [x26, w6, sxtw]
+	mov	w1, w19
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L713
+	add	w5, w7, w5
+	sxth	w5, w5
+.L713:
+	add	w6, w6, 1
+	sxth	w6, w6
+.L720:
+	cmp	w6, w8
+	blt	.L714
+	cbz	w5, .L715
+	mov	w0, 32768
+	sdiv	w5, w0, w5
+	sxth	w5, w5
+.L716:
+	ldr	x1, [x24, #:lo12:.LANCHOR80]
+	mov	w0, 6
+	smaddl	x0, w19, w0, x1
+	strh	w5, [x0, 4]
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	cmp	w19, w0
+	beq	.L717
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w19, w0
+	beq	.L717
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w19, w0
+	beq	.L717
+	adrp	x0, .LANCHOR82
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, w19, sxtw 1]
+	cbnz	w0, .L718
+	add	w21, w21, 1
+	mov	w0, w19
+	and	w21, w21, 65535
+	bl	INSERT_FREE_LIST
+.L717:
+	add	w19, w19, 1
+	sxth	w19, w19
+	b	.L712
+.L715:
+	adrp	x0, .LANCHOR82
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	strh	w1, [x0, w19, sxtw 1]
+	b	.L716
+.L718:
+	add	w20, w20, 1
+	mov	w0, w19
+	and	w20, w20, 65535
+	bl	INSERT_DATA_LIST
+	b	.L717
+.L719:
+	strh	w20, [x23, #:lo12:.LANCHOR84]
+	add	w20, w20, w21
+	strh	w21, [x22, #:lo12:.LANCHOR87]
+	cmp	w0, w20
+	bge	.L721
+	mov	w2, 2368
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L721:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",@progbits
+	.align	2
+	.global	FtlGcPageVarInit
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR108
+	mov	w1, 255
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR110
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR53
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	adrp	x0, .LANCHOR109
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w2, [x19, #:lo12:.LANCHOR53]
+	mov	w0, 12
+	mov	w1, 255
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR111
+	ldr	x0, [x0, #:lo12:.LANCHOR111]
+	bl	ftl_memset
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	FtlGcBufInit
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadIdbData,"ax",@progbits
+	.align	2
+	.global	FlashReadIdbData
+	.type	FlashReadIdbData, %function
+FlashReadIdbData:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 2048
+	adrp	x1, .LANCHOR139
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x29, sp, 0
+	bl	ftl_memcpy
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FlashReadIdbData, .-FlashReadIdbData
+	.section	.text.FlashLoadPhyInfoInRam,"ax",@progbits
+	.align	2
+	.global	FlashLoadPhyInfoInRam
+	.type	FlashLoadPhyInfoInRam, %function
+FlashLoadPhyInfoInRam:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR140
+	add	x8, x0, :lo12:.LANCHOR140
+	adrp	x11, .LANCHOR22
+	add	x29, sp, 0
+	add	x8, x8, 1
+	mov	x7, x0
+	add	x11, x11, :lo12:.LANCHOR22
+	stp	x19, x20, [sp, 16]
+	mov	x10, 0
+.L731:
+	ldrb	w2, [x8, -1]
+	mov	w12, w10
+	lsl	x20, x10, 5
+	mov	x1, x11
+	mov	x0, x8
+	bl	FlashMemCmp8
+	mov	w19, w0
+	cbnz	w0, .L729
+	add	x0, x7, :lo12:.LANCHOR140
+	ubfiz	x12, x12, 5, 32
+	add	x20, x0, x20
+	add	x0, x0, x12
+	adrp	x1, .LANCHOR141
+	add	x4, x1, :lo12:.LANCHOR141
+	ldrb	w3, [x0, 22]
+	mov	x0, 0
+.L730:
+	lsl	x5, x0, 5
+	mov	w2, w0
+	ldrb	w5, [x5, x4]
+	cmp	w5, w3
+	beq	.L733
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L730
+	mov	w2, w0
+.L733:
+	ubfiz	x0, x2, 5, 32
+	add	x1, x1, :lo12:.LANCHOR141
+	add	x1, x1, x0
+	mov	w2, 32
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
+	bl	ftl_memcpy
+	mov	w2, 32
+	mov	x1, x20
+	adrp	x0, .LANCHOR29
+	add	x0, x0, :lo12:.LANCHOR29
+	bl	ftl_memcpy
+	b	.L728
+.L729:
+	add	x10, x10, 1
+	add	x8, x8, 32
+	cmp	x10, 73
+	bne	.L731
+	mov	w19, -1
+.L728:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
+	.section	.text.ftl_memcpy32,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L738:
+	cmp	w2, w3
+	bhi	.L739
+	ret
+.L739:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L738
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.NandcCopy1KB,"ax",@progbits
+	.align	2
+	.global	NandcCopy1KB
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	stp	x29, x30, [sp, -48]!
+	and	w1, w1, 255
+	cmp	w1, 1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w2, 255
+	str	x21, [sp, 32]
+	add	x2, x0, 4096
+	add	x21, x0, 512
+	ubfiz	x0, x19, 9, 8
+	mov	x20, x4
+	add	x0, x2, x0
+	bne	.L741
+	cbz	x3, .L742
+	tst	x3, 3
+	bne	.L743
+	mov	w2, 256
+	mov	x1, x3
+	bl	ftl_memcpy32
+.L742:
+	cbz	x20, .L740
+	ldrb	w0, [x20]
+	lsr	w19, w19, 1
+	ldrb	w1, [x20, 1]
+	orr	x1, x0, x1, lsl 8
+	ldrb	w0, [x20, 2]
+	orr	x1, x1, x0, lsl 16
+	ldrb	w0, [x20, 3]
+	orr	x0, x1, x0, lsl 24
+	mov	w1, 12
+	mul	w19, w19, w1
+	str	w0, [x21, w19, sxtw 2]
+.L740:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L743:
+	mov	w2, 1024
+	mov	x1, x3
+	bl	ftl_memcpy
+	b	.L742
+.L741:
+	cbz	x3, .L746
+	tst	x3, 3
+	bne	.L747
+	mov	x1, x0
+	mov	w2, 256
+	mov	x0, x3
+	bl	ftl_memcpy32
+.L746:
+	cbz	x20, .L740
+	lsr	w19, w19, 1
+	mov	w0, 12
+	mul	w19, w19, w0
+	ldr	w0, [x21, w19, sxtw 2]
+	strb	w0, [x20]
+	lsr	w1, w0, 8
+	strb	w1, [x20, 1]
+	lsr	w1, w0, 16
+	lsr	w0, w0, 24
+	strb	w1, [x20, 2]
+	strb	w0, [x20, 3]
+	b	.L740
+.L747:
+	mov	x1, x0
+	mov	w2, 1024
+	mov	x0, x3
+	bl	ftl_memcpy
+	b	.L746
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",@progbits
+	.align	2
+	.global	NandcXferData
+	.type	NandcXferData, %function
+NandcXferData:
+	stp	x29, x30, [sp, -192]!
+	tst	x3, 63
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	stp	x19, x20, [sp, 16]
+	adrp	x0, .LANCHOR6
+	and	w20, w1, 255
+	add	x0, x0, :lo12:.LANCHOR6
+	sbfiz	x1, x25, 4, 32
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	and	w24, w2, 255
+	mov	x21, x4
+	ldr	x19, [x0, x1]
+	bne	.L760
+	cbnz	x4, .L761
+	add	x21, x29, 128
+	mov	w2, 64
+	mov	w1, 255
+	add	x0, x29, 128
+	bl	ftl_memset
+.L761:
+	mov	x5, x21
+	mov	x4, x26
+	mov	w2, w24
+	mov	w1, w20
+	mov	w3, 0
+	mov	w0, w25
+	bl	NandcXferStart
+	mov	w0, w25
+	bl	NandcXferComp
+	cbnz	w20, .L785
+	adrp	x0, .LANCHOR30
+	adrp	x4, .LANCHOR33
+	mov	x1, x0
+	add	x4, x4, :lo12:.LANCHOR33
+	ldr	w2, [x0, #:lo12:.LANCHOR30]
+	mov	w0, 128
+	mov	w3, 64
+	cmp	w2, 25
+	ubfx	x2, x24, 1, 7
+	add	x2, x21, x2, lsl 2
+	csel	w3, w3, w0, cc
+	mov	w0, 0
+.L764:
+	add	w5, w3, w0
+	cmp	x21, x2
+	bne	.L765
+	adrp	x0, .LANCHOR32
+	ldr	w4, [x1, #:lo12:.LANCHOR30]
+	lsr	w24, w24, 2
+	mov	w2, 0
+	ldr	w3, [x0, #:lo12:.LANCHOR32]
+	mov	w22, 0
+.L766:
+	cmp	w2, w24
+	bcs	.L762
+	cbnz	w4, .L772
+.L762:
+	str	wzr, [x19, 16]
+.L773:
+	adrp	x0, .LANCHOR32
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	cmp	w0, 5
+	bls	.L759
+	cbnz	w20, .L759
+	ldr	w0, [x19]
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w0, w1
+	cmp	w1, 139264
+	bne	.L759
+	orr	w0, w0, 131072
+	mov	w22, -1
+	str	w0, [x19]
+.L759:
+	mov	w0, w22
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	ret
+.L765:
+	ldr	x6, [x4, 8]
+	and	x0, x0, 4294967292
+	add	x21, x21, 4
+	ldr	w0, [x6, x0]
+	strb	w0, [x21, -4]
+	lsr	w6, w0, 8
+	strb	w6, [x21, -3]
+	lsr	w6, w0, 16
+	strb	w6, [x21, -2]
+	lsr	w0, w0, 24
+	strb	w0, [x21, -1]
+	mov	w0, w5
+	b	.L764
+.L772:
+	uxtw	x0, w2
+	add	x0, x0, 8
+	ldr	w0, [x19, x0, lsl 2]
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 120]
+	tbnz	x0, 2, .L788
+	ldr	w0, [x29, 120]
+	tbnz	x0, 15, .L788
+	cmp	w3, 5
+	bls	.L768
+	ldr	w1, [x29, 120]
+	ubfx	x6, x1, 3, 5
+	ldr	w1, [x29, 120]
+	ldr	w0, [x29, 120]
+	ubfx	x1, x1, 27, 1
+	ubfx	x5, x0, 16, 5
+	ldr	w0, [x29, 120]
+	orr	w1, w6, w1, lsl 5
+	ubfx	x0, x0, 29, 1
+	orr	w0, w5, w0, lsl 5
+	cmp	w1, w0
+	ldr	w0, [x29, 120]
+	bls	.L769
+	ubfx	x1, x0, 3, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 27, 1
+.L794:
+	orr	w0, w1, w0, lsl 5
+.L770:
+	cmp	w22, w0
+	csel	w22, w22, w0, cs
+.L767:
+	add	w2, w2, 1
+	b	.L766
+.L769:
+	ubfx	x1, x0, 16, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 29, 1
+	b	.L794
+.L768:
+	cmp	w3, 3
+	bls	.L789
+	ldr	w1, [x29, 120]
+	ubfx	x6, x1, 3, 5
+	ldr	w1, [x29, 120]
+	ldr	w0, [x29, 120]
+	ubfx	x1, x1, 28, 1
+	ubfx	x5, x0, 16, 5
+	ldr	w0, [x29, 120]
+	orr	w1, w6, w1, lsl 5
+	ubfx	x0, x0, 30, 1
+	orr	w0, w5, w0, lsl 5
+	cmp	w1, w0
+	ldr	w0, [x29, 120]
+	bls	.L771
+	ubfx	x1, x0, 3, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 28, 1
+	b	.L794
+.L771:
+	ubfx	x1, x0, 16, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 30, 1
+	b	.L794
+.L789:
+	mov	w0, 0
+	b	.L770
+.L788:
+	mov	w22, -1
+	b	.L767
+.L785:
+	mov	w22, 0
+	b	.L762
+.L760:
+	cmp	w20, 1
+	bne	.L774
+	cmp	x4, 0
+	mov	w23, 2
+	csel	w23, w23, wzr, ne
+	mov	w27, 0
+	lsl	w23, w23, 1
+	mov	w22, 0
+.L775:
+	cmp	w22, w24
+	bcc	.L777
+	mov	w22, 0
+	b	.L773
+.L777:
+	and	w28, w22, 3
+	cbz	x26, .L790
+	lsl	w3, w22, 9
+	add	x3, x26, x3
+.L776:
+	add	x4, x21, x27, uxtw
+	mov	w2, w28
+	mov	w1, 1
+	mov	x0, x19
+	bl	NandcCopy1KB
+	add	w22, w22, 2
+	mov	w3, w28
+	mov	x5, 0
+	mov	x4, 0
+	mov	w2, 2
+	mov	w1, 1
+	mov	w0, w25
+	bl	NandcXferStart
+	add	w27, w27, w23
+	mov	w0, w25
+	bl	NandcXferComp
+	b	.L775
+.L790:
+	mov	x3, 0
+	b	.L776
+.L774:
+	mov	w0, w25
+	mov	x5, 0
+	mov	x4, 0
+	mov	w3, 0
+	mov	w2, 2
+	mov	w1, 0
+	bl	NandcXferStart
+	mov	w27, 2
+	cmp	x21, 0
+	mov	w28, 0
+	csel	w27, w27, wzr, ne
+	mov	w23, 0
+	lsl	w0, w27, 1
+	mov	w22, 0
+	str	w0, [x29, 108]
+.L778:
+	cmp	w24, w23
+	bls	.L773
+	mov	w0, w25
+	bl	NandcXferComp
+	ldr	w0, [x19, 32]
+	add	w27, w23, 2
+	str	w0, [x29, 120]
+	cmp	w24, w27
+	bls	.L779
+	mov	x5, 0
+	mov	x4, 0
+	and	w3, w27, 3
+	mov	w2, 2
+	mov	w1, 0
+	mov	w0, w25
+	bl	NandcXferStart
+.L779:
+	ldr	w0, [x29, 120]
+	tbnz	x0, 2, .L791
+	ldr	w0, [x29, 120]
+	ubfx	x1, x0, 3, 5
+	ldr	w0, [x29, 120]
+	ubfx	x0, x0, 27, 1
+	orr	w0, w1, w0, lsl 5
+	cmp	w22, w0
+	csel	w22, w22, w0, cs
+.L780:
+	and	w2, w23, 3
+	cbz	x26, .L792
+	lsl	w3, w23, 9
+	add	x3, x26, x3
+.L781:
+	add	x4, x21, x28, uxtw
+	mov	x0, x19
+	mov	w1, 0
+	bl	NandcCopy1KB
+	ldr	w0, [x29, 108]
+	mov	w23, w27
+	add	w28, w28, w0
+	b	.L778
+.L791:
+	mov	w22, -1
+	b	.L780
+.L792:
+	mov	x3, 0
+	b	.L781
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashReadRawPage,"ax",@progbits
+	.align	2
+	.global	FlashReadRawPage
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ands	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w21, w1
+	str	x23, [sp, 48]
+	adrp	x1, .LANCHOR29+9
+	mov	x22, x2
+	mov	x23, x3
+	ldrb	w20, [x1, #:lo12:.LANCHOR29+9]
+	bne	.L796
+	adrp	x0, .LANCHOR2
+	adrp	x1, .LANCHOR3
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	mul	w0, w0, w1
+	cmp	w0, w21
+	mov	w0, 4
+	csel	w20, w20, w0, ls
+.L796:
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	mov	w1, w21
+	mov	w0, w19
+	bl	FlashReadCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w2, w20
+	mov	x4, x23
+	mov	x3, x22
+	mov	w1, 0
+	mov	w0, w19
+	bl	NandcXferData
+	mov	w2, w0
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x23, [sp, 48]
+	mov	w0, w2
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.FlashDdrTunningRead,"ax",@progbits
+	.align	2
+	.global	FlashDdrTunningRead
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR19
+	stp	x25, x26, [sp, 64]
+	stp	x21, x22, [sp, 32]
+	mov	w25, w1
+	ldr	x0, [x0, #:lo12:.LANCHOR19]
+	mov	w22, 6
+	stp	x27, x28, [sp, 80]
+	mov	x23, x2
+	stp	x19, x20, [sp, 16]
+	mov	x28, x3
+	mov	w26, w4
+	ldr	w0, [x0, 304]
+	str	w0, [x29, 108]
+	adrp	x0, .LANCHOR32
+	ldr	w0, [x0, #:lo12:.LANCHOR32]
+	cmp	w0, 8
+	mov	w0, 12
+	csel	w22, w22, w0, cc
+	cbz	w4, .L812
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+	mov	w0, w24
+	adrp	x19, .LANCHOR24
+	bl	FlashReset
+	mov	x3, x28
+	mov	x2, x23
+	mov	w1, w25
+	mov	w0, w24
+	bl	FlashReadRawPage
+	mov	w21, w0
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	bl	FlashSetInterfaceMode
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	bl	NandcSetMode
+	cmn	w21, #1
+	bne	.L801
+.L810:
+	mov	w21, -1
+.L798:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L801:
+	mov	w1, w25
+	mov	w2, w21
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+	adrp	x1, .LANCHOR142
+	ldr	w0, [x1, #:lo12:.LANCHOR142]
+	add	w0, w0, 1
+	cmp	w0, 2047
+	bhi	.L803
+	str	w0, [x1, #:lo12:.LANCHOR142]
+	b	.L798
+.L803:
+	str	wzr, [x1, #:lo12:.LANCHOR142]
+	mov	x28, 0
+	mov	x23, 0
+.L800:
+	mov	w5, 0
+	mov	w20, 0
+	mov	w6, 0
+	mov	w19, 0
+	mov	w27, -1
+.L808:
+	stp	w5, w6, [x29, 100]
+	mov	w0, w22
+	bl	NandcSetDdrPara
+	mov	w1, w25
+	mov	x3, x28
+	mov	x2, x23
+	mov	w0, w24
+	bl	FlashReadRawPage
+	add	w1, w21, 1
+	cmp	w0, w1
+	ldp	w5, w6, [x29, 100]
+	bhi	.L804
+	cmp	w0, 2
+	bhi	.L814
+	add	w19, w19, 1
+	cmp	w19, 9
+	bls	.L814
+	mov	w1, w20
+	mov	w21, w0
+	sub	w20, w22, w19
+	mov	w27, 0
+.L806:
+	cmp	w19, w6
+	csel	w20, w20, w1, hi
+.L807:
+	cbz	w20, .L809
+	mov	w1, w20
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	mov	w0, w20
+	bl	NandcSetDdrPara
+.L809:
+	cbz	w27, .L798
+	adrp	x0, .LC9
+	mov	w2, w25
+	mov	w1, w24
+	add	x0, x0, :lo12:.LC9
+	bl	printf
+	cbz	w26, .L810
+	ldr	w1, [x29, 108]
+	lsr	w0, w1, 8
+	bl	NandcSetDdrPara
+	b	.L798
+.L812:
+	mov	w21, 1024
+	b	.L800
+.L804:
+	cmp	w19, w6
+	bls	.L815
+	sub	w20, w5, w19
+	cmp	w19, 7
+	bhi	.L807
+	mov	w6, w19
+.L815:
+	mov	w19, 0
+	b	.L805
+.L814:
+	mov	w5, w22
+	mov	w21, w0
+	mov	w27, 0
+	mov	x28, 0
+	mov	x23, 0
+.L805:
+	add	w22, w22, 2
+	cmp	w22, 69
+	bls	.L808
+	mov	w1, w20
+	mov	w20, w5
+	b	.L806
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashReadPage,"ax",@progbits
+	.align	2
+	.global	FlashReadPage
+	.type	FlashReadPage, %function
+FlashReadPage:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w0, w20
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	mov	x22, x2
+	mov	x23, x3
+	str	x25, [sp, 64]
+	bl	FlashReadRawPage
+	mov	w19, w0
+	cmn	w0, #1
+	bne	.L825
+	adrp	x24, .LANCHOR5
+	ldrb	w25, [x24, #:lo12:.LANCHOR5]
+	cbnz	w25, .L826
+.L828:
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L825
+	adrp	x0, .LANCHOR19
+	mov	w4, 1
+	mov	x3, x23
+	mov	x2, x22
+	ldr	x0, [x0, #:lo12:.LANCHOR19]
+	mov	w1, w21
+	ldr	w24, [x0, 304]
+	mov	w0, w20
+	bl	FlashDdrTunningRead
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L829
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cmp	w19, w0, lsr 1
+	bls	.L825
+.L829:
+	lsr	w0, w24, 8
+	bl	NandcSetDdrPara
+	b	.L825
+.L826:
+	strb	wzr, [x24, #:lo12:.LANCHOR5]
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w21
+	mov	w0, w20
+	bl	FlashReadRawPage
+	strb	w25, [x24, #:lo12:.LANCHOR5]
+	cmn	w0, #1
+	beq	.L828
+	mov	w19, w0
+.L825:
+	adrp	x24, .LANCHOR143
+	ldr	x4, [x24, #:lo12:.LANCHOR143]
+	cbz	x4, .L824
+	cmn	w19, #1
+	bne	.L824
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w21
+	mov	w0, w20
+	blr	x4
+	mov	w19, w0
+	mov	w1, w0
+	mov	w3, w21
+	mov	w2, w20
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+	cmn	w19, #1
+	bne	.L824
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L824
+	mov	w0, w20
+	bl	flash_enter_slc_mode
+	ldr	x4, [x24, #:lo12:.LANCHOR143]
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w21
+	mov	w0, w20
+	blr	x4
+	mov	w19, w0
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L824:
+	mov	w0, w19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.FlashDdrParaScan,"ax",@progbits
+	.align	2
+	.global	FlashDdrParaScan
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR24
+	and	w20, w0, 255
+	stp	x21, x22, [sp, 32]
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	mov	w21, w1
+	bl	FlashSetInterfaceMode
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	bl	NandcSetMode
+	mov	w4, 0
+	mov	x3, 0
+	mov	x2, 0
+	mov	w1, w21
+	mov	w0, w20
+	bl	FlashDdrTunningRead
+	mov	x3, 0
+	mov	w22, w0
+	mov	x2, 0
+	mov	w0, w20
+	mov	w1, w21
+	adrp	x20, .LANCHOR28
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	beq	.L845
+	cmn	w22, #1
+	bne	.L846
+.L845:
+	ldrb	w0, [x19, #:lo12:.LANCHOR24]
+	tbz	x0, 0, .L846
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+	strb	wzr, [x20, #:lo12:.LANCHOR28]
+.L847:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L846:
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR28]
+	b	.L847
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashLoadPhyInfo,"ax",@progbits
+	.align	2
+	.global	FlashLoadPhyInfo
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	stp	x29, x30, [sp, -128]!
+	mov	w0, 60
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR29
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR145
+	strb	w0, [x29, 120]
+	mov	w0, 40
+	strb	w0, [x29, 121]
+	mov	w0, 24
+	strb	w0, [x29, 122]
+	mov	w0, 16
+	strb	w0, [x29, 123]
+	add	x0, x20, :lo12:.LANCHOR29
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR144
+	adrp	x24, .LANCHOR146
+	stp	x25, x26, [sp, 64]
+	ldrh	w0, [x0, 10]
+	adrp	x26, .LANCHOR7
+	str	w0, [x29, 108]
+	mov	w19, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	mov	w25, 4
+	str	x0, [x21, #:lo12:.LANCHOR144]
+	mov	w23, -1
+	stp	x27, x28, [sp, 80]
+	add	x26, x26, :lo12:.LANCHOR7
+	str	wzr, [x24, #:lo12:.LANCHOR146]
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L856:
+	add	w28, w19, 1
+	mov	x27, 0
+.L858:
+	add	x0, x29, 120
+	ldrb	w0, [x0, x27]
+	bl	FlashBchSel
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	x3, 0
+	mov	w1, w19
+	mov	w0, 0
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	bne	.L857
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	x3, 0
+	mov	w1, w28
+	mov	w0, 0
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	bne	.L857
+	add	x27, x27, 1
+	cmp	x27, 4
+	bne	.L858
+.L859:
+	ldr	w0, [x29, 108]
+	subs	w25, w25, #1
+	add	w19, w19, w0
+	bne	.L856
+	b	.L864
+.L860:
+	mov	w1, 2036
+	add	x0, x6, 12
+	bl	JSHash
+	ldr	w1, [x6, 8]
+	cmp	w1, w0
+	bne	.L866
+	add	x23, x20, :lo12:.LANCHOR29
+	add	x1, x6, 160
+	mov	w2, 32
+	mov	x0, x23
+	bl	ftl_memcpy
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	mov	x0, x26
+	add	x1, x1, 192
+	bl	ftl_memcpy
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	mov	w2, 852
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	add	x1, x1, 224
+	bl	ftl_memcpy
+	ldr	x1, [x21, #:lo12:.LANCHOR144]
+	adrp	x0, .LANCHOR28
+	str	w19, [x24, #:lo12:.LANCHOR146]
+	ldr	w2, [x1, 1076]
+	strb	w2, [x0, #:lo12:.LANCHOR28]
+	ldrh	w0, [x23, 10]
+	adrp	x2, .LANCHOR147
+	udiv	w0, w19, w0
+	add	w3, w0, 1
+	cbz	w0, .L862
+	str	w3, [x2, #:lo12:.LANCHOR147]
+.L863:
+	adrp	x0, .LANCHOR148
+	ldrh	w1, [x1, 14]
+	mov	w23, 0
+	strb	w1, [x0, #:lo12:.LANCHOR148]
+	b	.L859
+.L862:
+	mov	w0, 2
+	str	w0, [x2, #:lo12:.LANCHOR147]
+	b	.L863
+.L866:
+	mov	w23, -1
+	b	.L859
+.L857:
+	ldr	x6, [x21, #:lo12:.LANCHOR144]
+	mov	w1, 20036
+	movk	w1, 0x4e41, lsl 16
+	ldr	w0, [x6]
+	cmp	w0, w1
+	bne	.L859
+	cbnz	w23, .L860
+	add	x20, x20, :lo12:.LANCHOR29
+	ldrh	w0, [x20, 10]
+	udiv	w19, w19, w0
+	adrp	x0, .LANCHOR147
+	add	w19, w19, 1
+	str	w19, [x0, #:lo12:.LANCHOR147]
+.L864:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	mov	w0, w23
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.ToshibaReadRetrial,"ax",@progbits
+	.align	2
+	.global	ToshibaReadRetrial
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	stp	x25, x26, [sp, 64]
+	mov	w0, w21
+	stp	x19, x20, [sp, 16]
+	mov	x25, x2
+	stp	x27, x28, [sp, 80]
+	mov	x26, x3
+	str	w1, [x29, 120]
+	stp	x23, x24, [sp, 48]
+	bl	NandcWaitFlashReady
+	sbfiz	x1, x21, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	add	x2, x0, x1
+	ldr	x22, [x0, x1]
+	adrp	x1, .LANCHOR11
+	ldrb	w27, [x2, 8]
+	ldrb	w0, [x1, #:lo12:.LANCHOR11]
+	str	x1, [x29, 112]
+	add	x19, x27, 8
+	sub	w0, w0, #67
+	str	w27, [x29, 124]
+	and	w0, w0, 255
+	add	x19, x22, x19, lsl 8
+	cmp	w0, 1
+	bls	.L886
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbz	w0, .L887
+	mov	w23, 1
+	mov	w0, 0
+	bl	NandcSetDdrMode
+.L871:
+	add	x0, x22, x27, lsl 8
+	mov	w1, 92
+	str	w1, [x0, 2056]
+	mov	w1, 197
+	str	w1, [x0, 2056]
+.L870:
+	ldrsw	x0, [x29, 124]
+	mov	w20, 1
+	mov	w24, -1
+	add	x0, x0, 8
+	add	x0, x22, x0, lsl 8
+	str	x0, [x29, 104]
+.L872:
+	adrp	x0, .LANCHOR149
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	add	w0, w0, 1
+	cmp	w20, w0
+	bcc	.L881
+	mov	w28, w24
+.L880:
+	ldr	x0, [x29, 112]
+	mov	w1, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x19
+	bhi	.L882
+	bl	SandiskSetRRPara
+.L883:
+	ldrsw	x0, [x29, 124]
+	add	x0, x0, 8
+	add	x22, x22, x0, lsl 8
+	mov	w0, 255
+	str	w0, [x22, 8]
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bcc	.L884
+	cmn	w28, #1
+	mov	w0, 256
+	csel	w28, w28, w0, eq
+.L884:
+	mov	w0, w21
+	bl	NandcWaitFlashReady
+	cbz	w23, .L869
+	mov	w0, 4
+	bl	NandcSetDdrMode
+.L869:
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L887:
+	mov	w23, 0
+	b	.L871
+.L886:
+	mov	w23, 0
+	b	.L870
+.L881:
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x19
+	bhi	.L873
+	bl	SandiskSetRRPara
+.L874:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cmp	w0, 34
+	bne	.L875
+	adrp	x0, .LANCHOR149
+	ldrb	w0, [x0, #:lo12:.LANCHOR149]
+	sub	w0, w0, #3
+	cmp	w20, w0
+	bne	.L875
+	ldr	x1, [x29, 104]
+	mov	w0, 179
+	str	w0, [x1, 8]
+.L875:
+	add	x0, x22, x27, lsl 8
+	mov	w1, 38
+	str	w1, [x0, 2056]
+	mov	w1, 93
+	str	w1, [x0, 2056]
+	cbz	w23, .L876
+	mov	w0, 4
+	bl	NandcSetDdrMode
+	ldr	w1, [x29, 120]
+	mov	x3, x26
+	mov	x2, x25
+	mov	w0, w21
+	bl	FlashReadRawPage
+	mov	w28, w0
+	mov	w0, 0
+	bl	NandcSetDdrMode
+.L877:
+	cmn	w28, #1
+	beq	.L878
+	adrp	x0, .LANCHOR31
+	cmn	w24, #1
+	csel	w24, w24, w28, ne
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bcc	.L880
+	mov	x26, 0
+	mov	x25, 0
+.L878:
+	add	w20, w20, 1
+	b	.L872
+.L873:
+	bl	ToshibaSetRRPara
+	b	.L874
+.L876:
+	ldr	w1, [x29, 120]
+	mov	x3, x26
+	mov	x2, x25
+	mov	w0, w21
+	bl	FlashReadRawPage
+	mov	w28, w0
+	b	.L877
+.L882:
+	bl	ToshibaSetRRPara
+	b	.L883
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",@progbits
+	.align	2
+	.global	SamsungReadRetrial
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	stp	x19, x20, [sp, 16]
+	mov	w0, w22
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x25, x26, [sp, 64]
+	mov	x24, x2
+	str	x27, [sp, 80]
+	mov	x25, x3
+	bl	NandcWaitFlashReady
+	adrp	x26, .LANCHOR149
+	sbfiz	x1, x22, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x27, .LANCHOR31
+	add	x2, x0, x1
+	add	x26, x26, :lo12:.LANCHOR149
+	add	x27, x27, :lo12:.LANCHOR31
+	mov	w21, 1
+	ldr	x0, [x0, x1]
+	mov	w19, -1
+	ldrb	w20, [x2, 8]
+	add	x20, x20, 8
+	add	x20, x0, x20, lsl 8
+.L898:
+	ldrb	w0, [x26]
+	add	w0, w0, 1
+	cmp	w21, w0
+	bcc	.L902
+.L901:
+	mov	x0, x20
+	mov	w1, 0
+	bl	SamsungSetRRPara
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L897
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L897:
+	mov	w0, w19
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L902:
+	mov	w1, w21
+	mov	x0, x20
+	bl	SamsungSetRRPara
+	mov	x3, x25
+	mov	x2, x24
+	mov	w1, w23
+	mov	w0, w22
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	beq	.L899
+	ldrb	w1, [x27]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L904
+	mov	x25, 0
+	mov	x24, 0
+.L899:
+	add	w21, w21, 1
+	b	.L898
+.L904:
+	mov	w19, w0
+	b	.L901
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.MicronReadRetrial,"ax",@progbits
+	.align	2
+	.global	MicronReadRetrial
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	w24, w1
+	ldrb	w20, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	mov	x25, x2
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	mov	x26, x3
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L912
+	add	w20, w20, w20, lsl 1
+	asr	w20, w20, 2
+.L913:
+	mov	w0, w23
+	bl	NandcWaitFlashReady
+	sbfiz	x1, x23, 4, 32
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	adrp	x28, .LANCHOR149
+	add	x2, x0, x1
+	add	x28, x28, :lo12:.LANCHOR149
+	mov	w27, 0
+	mov	w19, -1
+	ldr	x4, [x0, x1]
+	mov	w6, 239
+	ldrb	w21, [x2, 8]
+	mov	w7, 137
+	add	x22, x4, x21, lsl 8
+.L914:
+	ldrb	w0, [x28]
+	cmp	w27, w0
+	bcc	.L918
+.L917:
+	add	x21, x4, x21, lsl 8
+	mov	w0, 239
+	str	w0, [x21, 2056]
+	mov	w0, 137
+	str	w0, [x21, 2052]
+	mov	x0, 200
+	bl	udelay
+	str	wzr, [x21, 2048]
+	str	wzr, [x21, 2048]
+	cmp	w19, w20
+	str	wzr, [x21, 2048]
+	str	wzr, [x21, 2048]
+	bcc	.L919
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L919:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L911
+	adrp	x0, .LC11
+	mov	w4, w19
+	mov	w3, w27
+	mov	w2, w24
+	mov	w1, w27
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.L911:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L912:
+	mov	w0, 3
+	sdiv	w20, w20, w0
+	b	.L913
+.L918:
+	str	w6, [x22, 2056]
+	mov	x0, 200
+	str	w7, [x22, 2052]
+	str	x4, [x29, 104]
+	stp	w6, w7, [x29, 116]
+	bl	udelay
+	add	w5, w27, 1
+	str	w5, [x22, 2048]
+	str	wzr, [x22, 2048]
+	mov	x3, x26
+	str	wzr, [x22, 2048]
+	mov	x2, x25
+	str	wzr, [x22, 2048]
+	mov	w1, w24
+	str	w5, [x29, 124]
+	mov	w0, w23
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldp	w6, w7, [x29, 116]
+	ldr	w5, [x29, 124]
+	ldr	x4, [x29, 104]
+	beq	.L915
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	cmp	w0, w20
+	bcc	.L921
+	mov	x26, 0
+	mov	x25, 0
+.L915:
+	mov	w27, w5
+	b	.L914
+.L921:
+	mov	w19, w0
+	b	.L917
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.HynixReadRetrial,"ax",@progbits
+	.align	2
+	.global	HynixReadRetrial
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR20
+	add	x1, x19, :lo12:.LANCHOR20
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR18
+	stp	x23, x24, [sp, 48]
+	and	x28, x0, 255
+	add	x0, x1, x28
+	mov	x23, x28
+	ldrb	w24, [x1, 2]
+	mov	x26, x2
+	ldr	x1, [x22, #:lo12:.LANCHOR18]
+	mov	x27, x3
+	ldrb	w20, [x0, 12]
+	ldrb	w1, [x1, 19]
+	cmp	w1, 7
+	bne	.L932
+	ldrb	w20, [x0, 20]
+.L932:
+	mov	w0, w23
+	bl	NandcWaitFlashReady
+	add	x6, x19, :lo12:.LANCHOR20
+	adrp	x5, .LANCHOR31
+	add	x7, x6, 4
+	add	x5, x5, :lo12:.LANCHOR31
+	mov	w4, 0
+	mov	w21, -1
+.L933:
+	cmp	w4, w24
+	bcc	.L938
+.L937:
+	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	add	x19, x19, :lo12:.LANCHOR20
+	add	x19, x19, x28
+	ldrb	w0, [x0, 19]
+	cmp	w0, 7
+	bne	.L939
+	strb	w20, [x19, 20]
+.L940:
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w21, w0, lsr 2
+	bcc	.L931
+	cmn	w21, #1
+	mov	w0, 256
+	csel	w21, w21, w0, eq
+.L931:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L938:
+	add	w20, w20, 1
+	ldrb	w1, [x6, 1]
+	and	w20, w20, 255
+	mov	x2, x7
+	cmp	w24, w20
+	str	x5, [x29, 96]
+	csel	w20, w20, wzr, hi
+	str	w4, [x29, 108]
+	stp	x7, x6, [x29, 112]
+	mov	w3, w20
+	mov	w0, w23
+	bl	HynixSetRRPara
+	mov	x3, x27
+	mov	x2, x26
+	mov	w1, w25
+	mov	w0, w23
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldr	w4, [x29, 108]
+	ldr	x5, [x29, 96]
+	ldp	x7, x6, [x29, 112]
+	beq	.L935
+	ldrb	w1, [x5]
+	cmn	w21, #1
+	csel	w21, w21, w0, ne
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L942
+	mov	x27, 0
+	mov	x26, 0
+.L935:
+	add	w4, w4, 1
+	b	.L933
+.L942:
+	mov	w21, w0
+	b	.L937
+.L939:
+	strb	w20, [x19, 12]
+	b	.L940
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.FlashProgPage,"ax",@progbits
+	.align	2
+	.global	FlashProgPage
+	.type	FlashProgPage, %function
+FlashProgPage:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	adrp	x1, .LANCHOR29+9
+	str	x23, [sp, 48]
+	mov	x22, x2
+	ldrb	w21, [x1, #:lo12:.LANCHOR29+9]
+	ands	w19, w0, 255
+	mov	x23, x3
+	bne	.L950
+	adrp	x0, .LANCHOR2
+	adrp	x1, .LANCHOR3
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	ldr	w1, [x1, #:lo12:.LANCHOR3]
+	mul	w0, w0, w1
+	cmp	w0, w20
+	bls	.L950
+	adrp	x0, .LANCHOR1
+	ldrb	w0, [x0, #:lo12:.LANCHOR1]
+	cbnz	w0, .L951
+	sub	w21, w21, #2
+.L950:
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashProgFirstCmd
+	mov	x4, x23
+	mov	x3, x22
+	mov	w2, w21
+	mov	w1, 1
+	mov	w0, w19
+	bl	NandcXferData
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashProgSecondCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w1, w20
+	mov	w0, w19
+	bl	FlashReadStatus
+	mov	w2, w0
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x23, [sp, 48]
+	and	w0, w2, 1
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L951:
+	mov	w21, 4
+	b	.L950
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashSavePhyInfo,"ax",@progbits
+	.align	2
+	.global	FlashSavePhyInfo
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR145
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR144
+	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	adrp	x21, .LANCHOR3
+	str	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w20, 0
+	adrp	x0, .LANCHOR150
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	mov	w25, 20036
+	ldrb	w0, [x0, #:lo12:.LANCHOR150]
+	movk	w25, 0x4e41, lsl 16
+	adrp	x24, .LANCHOR151
+	adrp	x26, .LANCHOR147
+	mov	w23, 0
+	add	x21, x21, :lo12:.LANCHOR3
+	add	x26, x26, :lo12:.LANCHOR147
+	bl	FlashBchSel
+	ldr	x0, [x22, #:lo12:.LANCHOR145]
+	mov	w2, 2048
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	adrp	x1, .LANCHOR25
+	mov	w2, 32
+	add	x0, x0, 16
+	str	w25, [x0, -16]
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	strh	w1, [x0, -4]
+	adrp	x1, .LANCHOR2
+	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	strh	w1, [x0, -2]
+	adrp	x1, .LANCHOR28
+	ldrb	w1, [x1, #:lo12:.LANCHOR28]
+	str	w1, [x0, 1060]
+	adrp	x1, .LANCHOR22
+	add	x1, x1, :lo12:.LANCHOR22
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 8
+	adrp	x1, .LANCHOR26
+	add	x1, x1, :lo12:.LANCHOR26
+	add	x0, x0, 80
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	adrp	x1, .LANCHOR17
+	add	x1, x1, :lo12:.LANCHOR17
+	add	x0, x0, 96
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	adrp	x1, .LANCHOR29
+	add	x1, x1, :lo12:.LANCHOR29
+	add	x0, x0, 160
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 32
+	adrp	x1, .LANCHOR7
+	add	x1, x1, :lo12:.LANCHOR7
+	add	x0, x0, 192
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w2, 852
+	adrp	x1, .LANCHOR20
+	add	x1, x1, :lo12:.LANCHOR20
+	add	x0, x0, 224
+	bl	ftl_memcpy
+	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	mov	w1, 2036
+	add	x0, x6, 12
+	bl	JSHash
+	str	w0, [x6, 8]
+	mov	w0, 1592
+	str	w0, [x6, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR151]
+	str	x0, [x19, #:lo12:.LANCHOR144]
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L956:
+	ldr	w1, [x21]
+	mov	w2, 0
+	mov	w0, 0
+	mul	w1, w20, w1
+	bl	FlashEraseBlock
+	ldr	w1, [x21]
+	mov	x3, 0
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	w0, 0
+	mul	w1, w20, w1
+	bl	FlashProgPage
+	ldr	w1, [x21]
+	mov	x3, 0
+	ldr	x2, [x22, #:lo12:.LANCHOR145]
+	mov	w0, 0
+	mul	w1, w20, w1
+	add	w1, w1, 1
+	bl	FlashProgPage
+	ldr	w1, [x21]
+	mov	x3, 0
+	ldr	x2, [x24, #:lo12:.LANCHOR151]
+	mov	w0, 0
+	mul	w1, w20, w1
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	add	w7, w20, 1
+	beq	.L954
+	ldr	x6, [x19, #:lo12:.LANCHOR144]
+	ldr	w0, [x6]
+	cmp	w0, w25
+	bne	.L954
+	mov	w1, 2036
+	add	x0, x6, 12
+	bl	JSHash
+	ldr	w1, [x6, 8]
+	cmp	w1, w0
+	bne	.L954
+	ldr	w0, [x21]
+	cmp	w23, 1
+	str	w7, [x26]
+	mul	w20, w0, w20
+	adrp	x0, .LANCHOR146
+	str	w20, [x0, #:lo12:.LANCHOR146]
+	beq	.L957
+	mov	w23, 1
+.L954:
+	mov	w20, w7
+	cmp	w7, 4
+	bne	.L956
+.L955:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	cmp	w23, 0
+	csetm	w0, eq
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L957:
+	mov	w23, 2
+	b	.L955
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",@progbits
+	.align	2
+	.global	FlashReadIdbDataRaw
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	stp	x29, x30, [sp, -144]!
+	mov	w1, 12336
+	movk	w1, 0x5638, lsl 16
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x0
+	mov	w0, 60
+	stp	x25, x26, [sp, 64]
+	strb	w0, [x29, 136]
+	mov	w0, 40
+	strb	w0, [x29, 137]
+	mov	w0, 24
+	strb	w0, [x29, 138]
+	mov	w0, 16
+	strb	w0, [x29, 139]
+	adrp	x0, .LANCHOR31
+	stp	x19, x20, [sp, 16]
+	ldrb	w26, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR152
+	stp	x21, x22, [sp, 32]
+	ldr	w2, [x0, #:lo12:.LANCHOR152]
+	stp	x27, x28, [sp, 80]
+	str	x0, [x29, 120]
+	cmp	w2, w1
+	bne	.L964
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+.L964:
+	adrp	x24, .LANCHOR2
+	adrp	x22, .LANCHOR3
+	add	x27, x29, 136
+	add	x22, x22, :lo12:.LANCHOR3
+	add	x28, x24, :lo12:.LANCHOR2
+	mov	w20, -1
+	mov	w19, 2
+	mov	w2, 2048
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+.L965:
+	ldrb	w0, [x24, #:lo12:.LANCHOR2]
+	cmp	w19, w0
+	bcc	.L970
+.L969:
+	mov	w0, w26
+	bl	FlashBchSel
+	ldr	x0, [x29, 120]
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L963
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+.L963:
+	mov	w0, w20
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L970:
+	mov	x4, 0
+	adrp	x25, .LANCHOR145
+.L967:
+	ldrb	w5, [x4, x27]
+	add	x21, x25, :lo12:.LANCHOR145
+	str	w5, [x29, 116]
+	mov	w0, w5
+	str	x4, [x29, 104]
+	bl	FlashBchSel
+	ldr	w1, [x22]
+	mov	x3, 0
+	ldr	x2, [x25, #:lo12:.LANCHOR145]
+	mov	w0, 0
+	mul	w1, w19, w1
+	bl	FlashReadRawPage
+	cmn	w0, #1
+	ldr	w5, [x29, 116]
+	bne	.L966
+	ldr	x4, [x29, 104]
+	add	x4, x4, 1
+	cmp	x4, 4
+	bne	.L967
+.L968:
+	add	w19, w19, 1
+	b	.L965
+.L973:
+	mov	w20, 0
+	b	.L969
+.L966:
+	ldr	x0, [x21]
+	ldr	w1, [x0]
+	mov	w0, 35899
+	movk	w0, 0xfcdc, lsl 16
+	cmp	w1, w0
+	bne	.L968
+	mov	w1, w5
+	adrp	x0, .LC12
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+	ldr	x1, [x21]
+	mov	w2, 2048
+	mov	x0, x23
+	bl	ftl_memcpy
+	ldr	x0, [x21]
+	ldr	w0, [x0, 512]
+	strb	w0, [x28]
+	adrp	x0, .LANCHOR147
+	ldr	w1, [x0, #:lo12:.LANCHOR147]
+	cmp	w19, w1
+	bcs	.L973
+	str	w19, [x0, #:lo12:.LANCHOR147]
+	mov	w20, 0
+	bl	FlashSavePhyInfo
+	b	.L968
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashPageProgMsbFFData,"ax",@progbits
+	.align	2
+	.global	FlashPageProgMsbFFData
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	stp	x29, x30, [sp, -80]!
+	adrp	x3, .LANCHOR8
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w2, 65535
+	adrp	x2, .LANCHOR18
+	stp	x21, x22, [sp, 32]
+	ldrb	w3, [x3, #:lo12:.LANCHOR8]
+	and	w21, w0, 255
+	ldr	x0, [x2, #:lo12:.LANCHOR18]
+	mov	x22, x2
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+	ldrb	w0, [x0, 19]
+	cbz	w3, .L977
+	adrp	x2, .LANCHOR152
+	ldr	w3, [x2, #:lo12:.LANCHOR152]
+	mov	w2, 12336
+	movk	w2, 0x5638, lsl 16
+	cmp	w3, w2
+	beq	.L976
+.L977:
+	sub	w0, w0, #5
+	and	w0, w0, 255
+	cmp	w0, 63
+	bhi	.L976
+	mov	x2, 16391
+	movk	x2, 0x4000, lsl 16
+	movk	x2, 0x8000, lsl 48
+	lsr	x0, x2, x0
+	tbz	x0, 0, .L976
+	adrp	x20, .LANCHOR117
+	mov	w24, w1
+	add	x20, x20, :lo12:.LANCHOR117
+	mov	w23, 65535
+	adrp	x25, .LANCHOR151
+.L979:
+	ldr	x0, [x22, #:lo12:.LANCHOR18]
+	ldrh	w0, [x0, 10]
+	cmp	w0, w19
+	bhi	.L980
+.L976:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L980:
+	ldrh	w0, [x20, w19, sxtw 1]
+	cmp	w0, w23
+	bne	.L976
+	ldr	x0, [x25, #:lo12:.LANCHOR151]
+	mov	w2, 32768
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x2, [x25, #:lo12:.LANCHOR151]
+	add	w1, w19, w24
+	add	w19, w19, 1
+	mov	x3, 0
+	mov	w0, w21
+	and	w19, w19, 65535
+	bl	FlashProgPage
+	b	.L979
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",@progbits
+	.align	2
+	.global	NandcInit
+	.type	NandcInit, %function
+NandcInit:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR6
+	add	x1, x2, :lo12:.LANCHOR6
+	add	x29, sp, 0
+	str	x0, [x2, #:lo12:.LANCHOR6]
+	mov	w2, 1
+	str	w2, [x1, 24]
+	mov	w2, 2
+	str	x0, [x1, 16]
+	str	x0, [x1, 32]
+	str	x0, [x1, 48]
+	str	w2, [x1, 40]
+	mov	w2, 3
+	str	wzr, [x1, 8]
+	str	w2, [x1, 56]
+	adrp	x1, .LANCHOR19
+	adrp	x2, .LANCHOR153
+	str	x0, [x1, #:lo12:.LANCHOR19]
+	ldr	w1, [x0]
+	ubfx	x3, x1, 13, 1
+	str	w3, [x2, #:lo12:.LANCHOR153]
+	ldr	w2, [x0, 352]
+	adrp	x3, .LANCHOR32
+	and	w1, w1, 245760
+	orr	w1, w1, 256
+	ubfx	x2, x2, 16, 4
+	str	w2, [x3, #:lo12:.LANCHOR32]
+	adrp	x2, .LANCHOR152
+	ldr	w3, [x0, 352]
+	str	w3, [x2, #:lo12:.LANCHOR152]
+	str	w1, [x0]
+	mov	w1, 4225
+	str	wzr, [x0, 336]
+	str	w1, [x0, 4]
+	mov	w1, 8322
+	str	w1, [x0, 344]
+	mov	w1, 6657
+	movk	w1, 0x1a, lsl 16
+	str	w1, [x0, 304]
+	mov	w0, 36864
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR154
+	adrp	x2, .LANCHOR33
+	str	x0, [x1, #:lo12:.LANCHOR154]
+	add	x1, x2, :lo12:.LANCHOR33
+	str	x0, [x2, #:lo12:.LANCHOR33]
+	add	x0, x0, 32768
+	str	wzr, [x1, 40]
+	str	x0, [x1, 8]
+	adrp	x0, .LANCHOR34
+	ldp	x29, x30, [sp], 16
+	str	wzr, [x0, #:lo12:.LANCHOR34]
+	ret
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",@progbits
+	.align	2
+	.global	FtlMemInit
+	.type	FtlMemInit, %function
+FtlMemInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR137
+	mov	w1, 65535
+	add	x29, sp, 0
+	strh	wzr, [x0, #:lo12:.LANCHOR137]
+	adrp	x0, .LANCHOR155
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR53
+	str	wzr, [x0, #:lo12:.LANCHOR155]
+	adrp	x0, .LANCHOR156
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR36
+	str	wzr, [x0, #:lo12:.LANCHOR156]
+	adrp	x0, .LANCHOR157
+	str	x23, [sp, 48]
+	adrp	x21, .LANCHOR56
+	str	wzr, [x0, #:lo12:.LANCHOR157]
+	adrp	x0, .LANCHOR158
+	adrp	x23, .LANCHOR57
+	str	wzr, [x0, #:lo12:.LANCHOR158]
+	adrp	x0, .LANCHOR159
+	str	wzr, [x0, #:lo12:.LANCHOR159]
+	adrp	x0, .LANCHOR160
+	str	wzr, [x0, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR161
+	str	wzr, [x0, #:lo12:.LANCHOR161]
+	adrp	x0, .LANCHOR162
+	str	wzr, [x0, #:lo12:.LANCHOR162]
+	adrp	x0, .LANCHOR163
+	str	wzr, [x0, #:lo12:.LANCHOR163]
+	adrp	x0, .LANCHOR164
+	str	wzr, [x0, #:lo12:.LANCHOR164]
+	adrp	x0, .LANCHOR165
+	str	wzr, [x0, #:lo12:.LANCHOR165]
+	adrp	x0, .LANCHOR166
+	str	wzr, [x0, #:lo12:.LANCHOR166]
+	adrp	x0, .LANCHOR78
+	str	wzr, [x0, #:lo12:.LANCHOR78]
+	adrp	x0, .LANCHOR167
+	str	wzr, [x0, #:lo12:.LANCHOR167]
+	adrp	x0, .LANCHOR168
+	str	wzr, [x0, #:lo12:.LANCHOR168]
+	adrp	x0, .LANCHOR169
+	str	wzr, [x0, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR170
+	str	wzr, [x0, #:lo12:.LANCHOR170]
+	adrp	x0, .LANCHOR171
+	str	w1, [x0, #:lo12:.LANCHOR171]
+	adrp	x0, .LANCHOR172
+	adrp	x1, .LANCHOR112
+	str	wzr, [x0, #:lo12:.LANCHOR172]
+	adrp	x0, .LANCHOR173
+	str	wzr, [x0, #:lo12:.LANCHOR173]
+	adrp	x0, .LANCHOR72
+	str	wzr, [x0, #:lo12:.LANCHOR72]
+	mov	w0, -1
+	strh	w0, [x1, #:lo12:.LANCHOR112]
+	adrp	x1, .LANCHOR113
+	strh	w0, [x1, #:lo12:.LANCHOR113]
+	adrp	x0, .LANCHOR174
+	mov	w1, 32
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+	adrp	x0, .LANCHOR175
+	mov	w1, 128
+	strh	w1, [x0, #:lo12:.LANCHOR175]
+	adrp	x0, .LANCHOR176
+	strh	wzr, [x0, #:lo12:.LANCHOR176]
+	adrp	x0, .LANCHOR114
+	strh	wzr, [x0, #:lo12:.LANCHOR114]
+	adrp	x0, .LANCHOR177
+	strh	wzr, [x0, #:lo12:.LANCHOR177]
+	adrp	x0, .LANCHOR116
+	strh	wzr, [x0, #:lo12:.LANCHOR116]
+	ldrh	w0, [x19, #:lo12:.LANCHOR53]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR109
+	str	x0, [x1, #:lo12:.LANCHOR109]
+	mov	w0, 12
+	ldrh	w1, [x19, #:lo12:.LANCHOR53]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	ldrh	w19, [x22, #:lo12:.LANCHOR36]
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
+	mov	w0, 56
+	mul	w19, w19, w0
+	lsl	w20, w19, 2
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR178
+	str	x0, [x1, #:lo12:.LANCHOR178]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR179
+	str	x0, [x1, #:lo12:.LANCHOR179]
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x20, .LANCHOR107
+	adrp	x1, .LANCHOR180
+	str	x0, [x1, #:lo12:.LANCHOR180]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR76
+	str	x0, [x1, #:lo12:.LANCHOR76]
+	mov	w0, w19
+	bl	ftl_malloc
+	ldrh	w19, [x21, #:lo12:.LANCHOR56]
+	adrp	x1, .LANCHOR106
+	str	x0, [x1, #:lo12:.LANCHOR106]
+	ldrh	w0, [x22, #:lo12:.LANCHOR36]
+	lsl	w0, w0, 1
+	add	w0, w0, 1
+	str	w0, [x20, #:lo12:.LANCHOR107]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR79
+	str	x0, [x1, #:lo12:.LANCHOR79]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR181
+	str	x0, [x1, #:lo12:.LANCHOR181]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR182
+	str	x0, [x1, #:lo12:.LANCHOR182]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
+	mul	w0, w19, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR104
+	str	x0, [x1, #:lo12:.LANCHOR104]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR183
+	str	x0, [x1, #:lo12:.LANCHOR183]
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR184
+	str	x0, [x1, #:lo12:.LANCHOR184]
+	mov	w0, 24
+	ldr	w1, [x20, #:lo12:.LANCHOR107]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	ldrh	w19, [x23, #:lo12:.LANCHOR57]
+	adrp	x1, .LANCHOR103
+	str	x0, [x1, #:lo12:.LANCHOR103]
+	ldrh	w0, [x22, #:lo12:.LANCHOR36]
+	adrp	x22, .LANCHOR63
+	mul	w19, w19, w0
+	mov	w0, w19
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR185
+	str	x0, [x1, #:lo12:.LANCHOR185]
+	lsl	w0, w19, 2
+	bl	ftl_malloc
+	adrp	x19, .LANCHOR39
+	adrp	x1, .LANCHOR186
+	str	x0, [x1, #:lo12:.LANCHOR186]
+	ldrh	w1, [x23, #:lo12:.LANCHOR57]
+	ldr	w0, [x20, #:lo12:.LANCHOR107]
+	adrp	x20, .LANCHOR187
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR105
+	str	x0, [x1, #:lo12:.LANCHOR105]
+	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	ubfiz	w0, w0, 1, 15
+	strh	w0, [x20, #:lo12:.LANCHOR187]
+	and	w0, w0, 65534
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR134
+	str	x0, [x1, #:lo12:.LANCHOR134]
+	ldrh	w0, [x20, #:lo12:.LANCHOR187]
+	add	x0, x0, 547
+	lsr	x0, x0, 9
+	strh	w0, [x20, #:lo12:.LANCHOR187]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR188
+	str	x0, [x1, #:lo12:.LANCHOR188]
+	adrp	x1, .LANCHOR77
+	add	x0, x0, 32
+	str	x0, [x1, #:lo12:.LANCHOR77]
+	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	ldr	w20, [x22, #:lo12:.LANCHOR63]
+	adrp	x1, .LANCHOR82
+	str	x0, [x1, #:lo12:.LANCHOR82]
+	lsl	w20, w20, 1
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR126
+	str	x0, [x1, #:lo12:.LANCHOR126]
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x20, .LANCHOR60
+	adrp	x1, .LANCHOR122
+	str	x0, [x1, #:lo12:.LANCHOR122]
+	ldrh	w0, [x19, #:lo12:.LANCHOR39]
+	lsr	w0, w0, 3
+	add	w0, w0, 4
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR0
+	str	x0, [x1, #:lo12:.LANCHOR0]
+	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR70
+	str	x0, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR189
+	str	x0, [x1, #:lo12:.LANCHOR189]
+	ldrh	w0, [x20, #:lo12:.LANCHOR60]
+	adrp	x20, .LANCHOR61
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR190
+	str	x0, [x1, #:lo12:.LANCHOR190]
+	ldrh	w0, [x20, #:lo12:.LANCHOR61]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	ldrh	w2, [x20, #:lo12:.LANCHOR61]
+	adrp	x1, .LANCHOR191
+	str	x0, [x1, #:lo12:.LANCHOR191]
+	mov	w1, 0
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR65
+	ldrh	w20, [x0, #:lo12:.LANCHOR65]
+	lsl	w20, w20, 2
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR128
+	str	x0, [x1, #:lo12:.LANCHOR128]
+	mov	w0, w20
+	bl	ftl_malloc
+	adrp	x20, .LANCHOR66
+	adrp	x1, .LANCHOR192
+	str	x0, [x1, #:lo12:.LANCHOR192]
+	ldr	w0, [x22, #:lo12:.LANCHOR63]
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR127
+	str	x0, [x1, #:lo12:.LANCHOR127]
+	ldrh	w0, [x20, #:lo12:.LANCHOR66]
+	lsl	w0, w0, 4
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR95
+	str	x0, [x1, #:lo12:.LANCHOR95]
+	ldrh	w1, [x20, #:lo12:.LANCHOR66]
+	adrp	x20, .LANCHOR43
+	ldrh	w0, [x21, #:lo12:.LANCHOR56]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR123
+	str	x0, [x1, #:lo12:.LANCHOR123]
+	mov	w0, 6
+	ldrh	w1, [x19, #:lo12:.LANCHOR39]
+	adrp	x19, .LANCHOR120
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR80
+	str	x0, [x1, #:lo12:.LANCHOR80]
+	adrp	x0, .LANCHOR49
+	ldrh	w1, [x20, #:lo12:.LANCHOR43]
+	ldrh	w0, [x0, #:lo12:.LANCHOR49]
+	add	w0, w0, 31
+	asr	w0, w0, 5
+	strh	w0, [x19, #:lo12:.LANCHOR120]
+	mul	w0, w1, w0
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR73
+	ldrh	w5, [x19, #:lo12:.LANCHOR120]
+	add	x2, x1, :lo12:.LANCHOR73
+	ldrh	w7, [x20, #:lo12:.LANCHOR43]
+	add	x6, x2, 40
+	mov	w3, w5
+	str	x0, [x2, 32]
+	mov	x0, 1
+.L991:
+	cmp	w0, w7
+	bcc	.L992
+	mov	w2, 8
+	sub	w2, w2, w0
+	add	x2, x2, 1
+	add	x1, x1, :lo12:.LANCHOR73
+	mov	x3, 0
+.L993:
+	add	x3, x3, 1
+	cmp	x2, x3
+	bne	.L994
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L992:
+	ldr	x4, [x2, 32]
+	add	w0, w0, 1
+	add	x4, x4, x3, uxtw 2
+	add	w3, w3, w5
+	str	x4, [x6], 8
+	b	.L991
+.L994:
+	add	x4, x0, x3
+	add	x4, x1, x4, lsl 3
+	str	xzr, [x4, 24]
+	b	.L993
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",@progbits
+	.align	2
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	x2, 512
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	memset
+	mov	x3, x19
+	add	w1, w20, 256
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 1
+	ldp	x29, x30, [sp], 32
+	mov	w0, 16
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	add	w1, w0, 256
+	mov	w0, 16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashCs123Init,"ax",@progbits
+	.align	2
+	.global	FlashCs123Init
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	ret
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",@progbits
+	.align	2
+	.global	rk_nand_de_init
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",@progbits
+	.align	2
+	.global	rk_ftl_get_capacity
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	adrp	x0, .LANCHOR67
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	ret
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LC14
+	stp	x23, x24, [sp, 48]
+	mov	x22, x1
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LC13
+	mov	x26, x0
+	mov	w24, w2
+	uxtw	x25, w3
+	add	x23, x23, :lo12:.LC13
+	add	x21, x21, :lo12:.LC14
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x27, .LC15
+.L1004:
+	cmp	x25, x19
+	bne	.L1010
+	ldp	x19, x20, [sp, 16]
+	adrp	x1, .LC15
+	ldp	x21, x22, [sp, 32]
+	add	x1, x1, :lo12:.LC15
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC6
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC6
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L1010:
+	cbnz	w20, .L1005
+	mov	w2, w19
+	mov	x1, x26
+	mov	x0, x23
+	bl	printf
+.L1005:
+	cmp	w24, 4
+	bne	.L1006
+	ldr	w1, [x22, x19, lsl 2]
+.L1012:
+	mov	x0, x21
+	add	w20, w20, 1
+	bl	printf
+	cmp	w20, 15
+	bls	.L1009
+	mov	w20, 0
+	add	x1, x27, :lo12:.LC15
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1009:
+	add	x19, x19, 1
+	b	.L1004
+.L1006:
+	cmp	w24, 2
+	bne	.L1008
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L1012
+.L1008:
+	ldrb	w1, [x22, x19]
+	b	.L1012
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.HynixGetReadRetryDefault,"ax",@progbits
+	.align	2
+	.global	HynixGetReadRetryDefault
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	stp	x29, x30, [sp, -144]!
+	mov	w1, -84
+	mov	w4, -83
+	mov	w3, -82
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR20
+	stp	x25, x26, [sp, 64]
+	mov	w26, w0
+	add	x0, x20, :lo12:.LANCHOR20
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w26, 2
+	stp	x27, x28, [sp, 80]
+	strb	w1, [x0, 4]
+	mov	w1, -81
+	strb	w26, [x20, #:lo12:.LANCHOR20]
+	strb	w4, [x0, 5]
+	strb	w3, [x0, 6]
+	strb	w1, [x0, 7]
+	bne	.L1014
+	mov	w1, -89
+	strb	w1, [x0, 4]
+	adrp	x0, .LANCHOR193+17
+	mov	w1, -9
+	strb	w1, [x0, #:lo12:.LANCHOR193+17]
+.L1070:
+	mov	w27, 7
+	b	.L1105
+.L1014:
+	cmp	w26, 3
+	bne	.L1016
+	mov	w1, -80
+	strb	w1, [x0, 4]
+	mov	w1, -79
+	strb	w1, [x0, 5]
+	mov	w1, -78
+	strb	w1, [x0, 6]
+	mov	w1, -77
+	strb	w1, [x0, 7]
+	mov	w1, -76
+	strb	w1, [x0, 8]
+	mov	w1, -75
+	strb	w1, [x0, 9]
+	mov	w1, -74
+	strb	w1, [x0, 10]
+	mov	w1, -73
+.L1106:
+	mov	w27, 8
+	mov	w28, w27
+	strb	w1, [x0, 11]
+.L1015:
+	sub	w0, w26, #1
+	cmp	w0, 1
+	bhi	.L1020
+	adrp	x26, .LANCHOR25
+	adrp	x0, .LANCHOR26
+	adrp	x25, .LANCHOR6
+	add	x26, x26, :lo12:.LANCHOR25
+	add	x4, x0, :lo12:.LANCHOR26
+	add	x25, x25, :lo12:.LANCHOR6
+	mov	w24, 0
+.L1021:
+	ldrb	w0, [x26]
+	cmp	w0, w24
+	bhi	.L1027
+.L1028:
+	add	x20, x20, :lo12:.LANCHOR20
+	ldp	x21, x22, [sp, 32]
+	strb	w28, [x20, 1]
+	strb	w27, [x20, 2]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L1016:
+	cmp	w26, 4
+	bne	.L1017
+	mov	w5, -52
+	strb	w5, [x0, 4]
+	mov	w5, -65
+	strb	w5, [x0, 5]
+	mov	w5, -86
+	strb	w5, [x0, 6]
+	mov	w5, -85
+	strb	w4, [x0, 9]
+	strb	w5, [x0, 7]
+	mov	w5, -51
+	strb	w3, [x0, 10]
+	strb	w5, [x0, 8]
+	b	.L1106
+.L1017:
+	cmp	w26, 5
+	bne	.L1018
+	mov	w1, 56
+	strb	w1, [x0, 4]
+	mov	w1, 57
+	strb	w1, [x0, 5]
+	mov	w1, 58
+	mov	w27, 8
+	strb	w1, [x0, 6]
+	mov	w1, 59
+	strb	w1, [x0, 7]
+.L1105:
+	mov	w28, 4
+	b	.L1015
+.L1018:
+	cmp	w26, 6
+	bne	.L1019
+	mov	w1, 14
+	strb	w1, [x0, 4]
+	mov	w1, 15
+	strb	w1, [x0, 5]
+	mov	w1, 16
+	mov	w27, 12
+	strb	w1, [x0, 6]
+	mov	w1, 17
+	strb	w1, [x0, 7]
+	b	.L1105
+.L1019:
+	cmp	w26, 7
+	bne	.L1070
+	mov	w1, -80
+	strb	w1, [x0, 4]
+	mov	w1, -79
+	strb	w1, [x0, 5]
+	mov	w1, -78
+	strb	w1, [x0, 6]
+	mov	w1, -77
+	strb	w1, [x0, 7]
+	mov	w1, -76
+	strb	w1, [x0, 8]
+	mov	w1, -75
+	strb	w1, [x0, 9]
+	mov	w1, -74
+	strb	w1, [x0, 10]
+	mov	w1, -73
+	strb	w1, [x0, 11]
+	mov	w1, -44
+	mov	w27, 12
+	strb	w1, [x0, 12]
+	mov	w28, 10
+	mov	w1, -43
+	strb	w1, [x0, 13]
+	b	.L1015
+.L1027:
+	ldrb	w1, [x4, w24, sxtw]
+	add	x0, x20, :lo12:.LANCHOR20
+	mov	x21, x0
+	mov	x22, 0
+	ubfiz	x19, x1, 6, 8
+	sbfiz	x1, x1, 4, 32
+	add	x2, x25, x1
+	add	x19, x19, 20
+	add	x19, x0, x19
+	ldr	x1, [x25, x1]
+	ldrb	w23, [x2, 8]
+	add	x23, x1, x23, lsl 8
+	mov	w1, 55
+.L1022:
+	add	x0, x21, x22
+	str	w1, [x23, 2056]
+	str	x4, [x29, 128]
+	str	w1, [x29, 140]
+	ldrb	w0, [x0, 4]
+	str	w0, [x23, 2052]
+	mov	x0, 80
+	bl	udelay
+	ldr	w0, [x23, 2048]
+	strb	w0, [x19, x22]
+	add	x22, x22, 1
+	cmp	w28, w22, uxtb
+	ldr	w1, [x29, 140]
+	ldr	x4, [x29, 128]
+	bhi	.L1022
+	adrp	x2, .LANCHOR193
+	add	x2, x2, :lo12:.LANCHOR193
+	mov	x0, 0
+.L1025:
+	add	x7, x19, x0
+	add	x6, x2, x0
+	mov	x1, 1
+.L1024:
+	lsl	x3, x1, 2
+	lsl	x8, x1, 3
+	ldrb	w10, [x19, x0]
+	add	x1, x1, 1
+	cmp	x1, 7
+	ldrb	w3, [x6, x3]
+	add	w3, w3, w10
+	strb	w3, [x7, x8]
+	bne	.L1024
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L1025
+	add	w24, w24, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w24, w24, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L1021
+.L1020:
+	sub	w0, w26, #3
+	cmp	w0, 4
+	bhi	.L1028
+	mul	w24, w27, w28
+	adrp	x25, .LANCHOR25
+	sub	w22, w28, #1
+	mov	w21, 0
+	and	x22, x22, 255
+	lsl	w0, w24, 4
+	asr	w23, w24, 2
+	str	w0, [x29, 128]
+	lsl	w0, w23, 1
+	sbfiz	x24, x23, 2, 32
+	str	w0, [x29, 140]
+	add	x0, x25, :lo12:.LANCHOR25
+	sub	w25, w26, #5
+	str	x0, [x29, 120]
+	add	x0, x22, 1
+	str	x0, [x29, 112]
+.L1029:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w21
+	bls	.L1028
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w22, [x0, w21, sxtw]
+	adrp	x0, .LANCHOR6
+	add	x0, x0, :lo12:.LANCHOR6
+	sbfiz	x1, x22, 4, 32
+	add	x3, x0, x1
+	ldr	x0, [x0, x1]
+	ldrb	w19, [x3, 8]
+	add	x19, x0, x19, lsl 8
+	mov	w0, 255
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	bl	NandcWaitFlashReady
+	add	x1, x20, :lo12:.LANCHOR20
+	cmp	w26, 7
+	beq	.L1030
+	ubfiz	x0, x22, 6, 8
+	add	x0, x0, 20
+.L1107:
+	add	x3, x1, x0
+	mov	w0, 54
+	str	w0, [x19, 2056]
+	cmp	w26, 4
+	bne	.L1032
+	mov	w0, 255
+	str	w0, [x19, 2052]
+	mov	w0, 64
+	str	w0, [x19, 2048]
+	mov	w0, 204
+.L1108:
+	str	w0, [x19, 2052]
+	mov	w0, 77
+	b	.L1109
+.L1030:
+	mov	x3, 28
+	mov	w0, 160
+	umaddl	x0, w0, w22, x3
+	b	.L1107
+.L1032:
+	cmp	w25, 1
+	bhi	.L1034
+	add	x0, x20, :lo12:.LANCHOR20
+	ldrb	w0, [x0, 4]
+	str	w0, [x19, 2052]
+	mov	w0, 82
+.L1109:
+	str	w0, [x19, 2048]
+	mov	w0, 22
+	str	w0, [x19, 2056]
+	mov	w0, 23
+	str	w0, [x19, 2056]
+	mov	w0, 4
+	str	w0, [x19, 2056]
+	mov	w0, 25
+	str	w0, [x19, 2056]
+	cmp	w26, 6
+	str	wzr, [x19, 2056]
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	bne	.L1035
+	mov	w0, 31
+	str	w0, [x19, 2052]
+.L1036:
+	mov	w7, 2
+	str	w7, [x19, 2052]
+	str	wzr, [x19, 2052]
+	mov	w0, 48
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	str	x3, [x29, 104]
+	str	w7, [x29, 136]
+	bl	NandcWaitFlashReady
+	cmp	w25, 1
+	ldr	x3, [x29, 104]
+	bls	.L1071
+	ldr	w7, [x29, 136]
+	cmp	w26, 7
+	mov	w1, 32
+	csel	w1, w1, w7, eq
+.L1037:
+	adrp	x8, .LANCHOR145
+	mov	x7, 0
+	ldr	x0, [x8, #:lo12:.LANCHOR145]
+.L1038:
+	ldr	w10, [x19, 2048]
+	strb	w10, [x0, x7]
+	add	x7, x7, 1
+	cmp	w1, w7, uxtb
+	bhi	.L1038
+	cmp	w26, 7
+	bne	.L1039
+	mov	w1, 0
+.L1041:
+	ldrb	w7, [x0]
+	cmp	w7, 12
+	beq	.L1040
+	ldrb	w7, [x0, 1]
+	cmp	w7, 10
+	beq	.L1040
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L1041
+.L1042:
+	adrp	x0, .LC16
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L1044:
+	b	.L1044
+.L1034:
+	mov	w0, 174
+	str	w0, [x19, 2052]
+	str	wzr, [x19, 2048]
+	mov	w0, 176
+	b	.L1108
+.L1035:
+	str	wzr, [x19, 2052]
+	b	.L1036
+.L1071:
+	mov	w1, 16
+	b	.L1037
+.L1040:
+	cmp	w1, 6
+	bhi	.L1042
+.L1043:
+	ldr	x7, [x8, #:lo12:.LANCHOR145]
+	mov	x0, 0
+.L1048:
+	ldr	w1, [x29, 128]
+	cmp	w1, w0
+	bgt	.L1049
+	ldr	x1, [x8, #:lo12:.LANCHOR145]
+	mov	w10, 8
+	add	x8, x1, x24
+.L1051:
+	mov	x0, 0
+.L1050:
+	ldr	w11, [x8, x0, lsl 2]
+	mvn	w11, w11
+	str	w11, [x8, x0, lsl 2]
+	add	x0, x0, 1
+	cmp	w23, w0
+	bgt	.L1050
+	ldr	w0, [x29, 140]
+	subs	w10, w10, #1
+	add	x8, x8, x0, uxtw 2
+	bne	.L1051
+	mov	x11, x1
+	mov	w12, 0
+	mov	w16, 1
+.L1057:
+	mov	w8, 0
+	mov	w0, 0
+.L1056:
+	mov	x15, x11
+	lsl	w10, w16, w0
+	mov	w14, 16
+	mov	w13, 0
+.L1054:
+	ldr	w17, [x15]
+	add	x15, x15, x24
+	bics	wzr, w10, w17
+	cinc	w13, w13, eq
+	subs	w14, w14, #1
+	bne	.L1054
+	cmp	w13, 9
+	orr	w10, w8, w10
+	add	w0, w0, 1
+	csel	w8, w10, w8, cs
+	cmp	w0, 32
+	bne	.L1056
+	str	w8, [x11], 4
+	add	w12, w12, 1
+	cmp	w23, w12
+	bgt	.L1057
+	mov	x0, 0
+	mov	w8, 0
+.L1060:
+	ldr	w10, [x1, x0]
+	add	x0, x0, 4
+	cmp	w10, 0
+	cinc	w8, w8, eq
+	cmp	x0, 32
+	bne	.L1060
+	cmp	w8, 7
+	ble	.L1061
+	mov	w3, 1024
+	mov	w2, 1
+	adrp	x0, .LC17
+	add	x0, x0, :lo12:.LC17
+	bl	rknand_print_hex
+	adrp	x0, .LC16
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L1062:
+	b	.L1062
+.L1039:
+	cmp	w26, 6
+	bne	.L1043
+	mov	x1, 0
+.L1045:
+	ldrb	w7, [x0, x1]
+	cmp	w7, 12
+	beq	.L1043
+	add	x7, x0, x1
+	ldrb	w7, [x7, 8]
+	cmp	w7, 4
+	beq	.L1043
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1045
+	adrp	x0, .LC16
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC16
+	bl	printf
+.L1047:
+	b	.L1047
+.L1049:
+	ldr	w1, [x19, 2048]
+	strb	w1, [x7, x0]
+	add	x0, x0, 1
+	b	.L1048
+.L1061:
+	cmp	w26, 6
+	beq	.L1073
+	cmp	w26, 7
+	mov	x1, 8
+	mov	x0, 10
+	csel	x0, x0, x1, eq
+.L1063:
+	mov	x1, x3
+	mov	w8, 0
+.L1064:
+	mov	x3, 0
+.L1065:
+	ldrb	w10, [x7, x3]
+	strb	w10, [x1, x3]
+	add	x3, x3, 1
+	cmp	w28, w3, uxtb
+	bhi	.L1065
+	ldr	x2, [x29, 112]
+	add	w8, w8, 1
+	add	x1, x1, x0
+	cmp	w27, w8
+	add	x7, x7, x2
+	bgt	.L1064
+	mov	w0, 255
+	str	w0, [x19, 2056]
+	mov	w0, w22
+	bl	NandcWaitFlashReady
+	cmp	w25, 1
+	bhi	.L1067
+	mov	w0, 54
+	str	w0, [x19, 2056]
+	adrp	x0, .LANCHOR20+4
+	mov	w1, -1
+	ldrb	w0, [x0, #:lo12:.LANCHOR20+4]
+	str	w0, [x19, 2052]
+	str	wzr, [x19, 2048]
+	mov	w0, 22
+	str	w0, [x19, 2056]
+	mov	w0, w21
+	bl	FlashReadCmd
+.L1068:
+	add	w21, w21, 1
+	mov	w0, w22
+	and	w21, w21, 255
+	bl	NandcWaitFlashReady
+	b	.L1029
+.L1073:
+	mov	x0, 4
+	b	.L1063
+.L1067:
+	mov	w0, 56
+	str	w0, [x19, 2056]
+	b	.L1068
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",@progbits
+	.align	2
+	.global	FlashGetReadRetryDefault
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	mov	w1, w0
+	cbz	w0, .L1110
+	sub	w2, w0, #1
+	cmp	w2, 6
+	bhi	.L1112
+	b	HynixGetReadRetryDefault
+.L1112:
+	cmp	w0, 49
+	bne	.L1113
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 4
+	strb	w1, [x0, 1]
+	mov	w1, 15
+	strb	w1, [x0, 2]
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	mov	w2, 64
+.L1122:
+	add	x0, x0, 4
+	b	ftl_memcpy
+.L1113:
+	sub	w0, w0, #65
+	cmp	w1, 33
+	ccmp	w0, 1, 0, ne
+	bhi	.L1114
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 4
+.L1123:
+	strb	w1, [x0, 1]
+	mov	w1, 7
+	mov	w2, 45
+	strb	w1, [x0, 2]
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	b	.L1122
+.L1114:
+	cmp	w1, 34
+	mov	w0, 67
+	ccmp	w1, w0, 4, ne
+	bne	.L1115
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 5
+	b	.L1123
+.L1115:
+	cmp	w1, 35
+	mov	w0, 68
+	ccmp	w1, w0, 4, ne
+	bne	.L1110
+	adrp	x2, .LANCHOR20
+	add	x0, x2, :lo12:.LANCHOR20
+	strb	w1, [x2, #:lo12:.LANCHOR20]
+	mov	w1, 5
+	strb	w1, [x0, 1]
+	mov	w1, 17
+	mov	w2, 95
+	strb	w1, [x0, 2]
+	adrp	x1, .LANCHOR9
+	add	x1, x1, :lo12:.LANCHOR9
+	b	.L1122
+.L1110:
+	ret
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",@progbits
+	.align	2
+	.global	FlashInit
+	.type	FlashInit, %function
+FlashInit:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	mov	w0, 32768
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR2
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LANCHOR150
+	stp	x27, x28, [sp, 80]
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR145
+	adrp	x21, .LANCHOR28
+	adrp	x22, .LANCHOR1
+	adrp	x20, .LANCHOR22
+	str	x0, [x1, #:lo12:.LANCHOR145]
+	mov	w0, 32768
+	bl	ftl_malloc
+	adrp	x25, .LANCHOR6
+	adrp	x1, .LANCHOR151
+	add	x25, x25, :lo12:.LANCHOR6
+	adrp	x26, .LC18
+	mov	w28, 0
+	str	x0, [x1, #:lo12:.LANCHOR151]
+	mov	w0, 4096
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR194
+	str	x0, [x1, #:lo12:.LANCHOR194]
+	mov	w0, 32768
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR195
+	str	x0, [x1, #:lo12:.LANCHOR195]
+	mov	w0, 4096
+	bl	ftl_malloc
+	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	adrp	x1, .LANCHOR196
+	strb	wzr, [x22, #:lo12:.LANCHOR1]
+	str	x0, [x1, #:lo12:.LANCHOR196]
+	adrp	x1, .LANCHOR148
+	mov	w0, 50
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	strb	w0, [x1, #:lo12:.LANCHOR148]
+	adrp	x0, .LANCHOR147
+	mov	w1, 128
+	str	wzr, [x0, #:lo12:.LANCHOR147]
+	adrp	x0, .LANCHOR3
+	str	w1, [x0, #:lo12:.LANCHOR3]
+	adrp	x0, .LANCHOR142
+	str	wzr, [x0, #:lo12:.LANCHOR142]
+	mov	w0, 60
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+	mov	x0, x19
+	add	x19, x20, :lo12:.LANCHOR22
+	bl	NandcInit
+	mov	x27, x19
+	add	x0, x26, :lo12:.LC18
+	str	x0, [x29, 104]
+.L1129:
+	and	w26, w28, 255
+	mov	w0, w26
+	bl	FlashReset
+	ldrb	w5, [x25, 8]
+	mov	w0, w26
+	ldr	x4, [x25]
+	bl	NandcFlashCs
+	ubfiz	x1, x5, 8, 8
+	add	x1, x4, x1
+	mov	w0, 144
+	str	x1, [x29, 96]
+	str	w0, [x1, 2056]
+	mov	x0, 200
+	str	wzr, [x1, 2052]
+	bl	udelay
+	ldr	x1, [x29, 96]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 1]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 2]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 3]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 4]
+	ldr	w0, [x1, 2048]
+	strb	w0, [x19, 5]
+	mov	w0, w26
+	bl	NandcFlashDeCs
+	ldrb	w2, [x19]
+	sub	w0, w2, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bhi	.L1125
+	ldrb	w7, [x19, 5]
+	add	w1, w28, 1
+	ldrb	w6, [x19, 4]
+	ldrb	w5, [x19, 3]
+	ldrb	w4, [x19, 2]
+	ldrb	w3, [x19, 1]
+	ldr	x0, [x29, 104]
+	bl	printf
+.L1125:
+	cbnz	w28, .L1126
+	ldrb	w0, [x27]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bhi	.L1167
+	ldrb	w0, [x27, 1]
+	cmp	w0, 255
+	beq	.L1167
+.L1126:
+	ldrb	w0, [x19]
+	cmp	w0, 181
+	bne	.L1128
+	mov	w0, 44
+	strb	w0, [x19]
+.L1128:
+	add	w28, w28, 1
+	add	x25, x25, 16
+	add	x19, x19, 8
+	cmp	w28, 4
+	bne	.L1129
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	cmp	w0, 173
+	beq	.L1130
+	adrp	x0, .LANCHOR153
+	ldr	w0, [x0, #:lo12:.LANCHOR153]
+	bl	NandcSetDdrMode
+.L1130:
+	mov	w2, 852
+	adrp	x26, .LANCHOR20
+	mov	w1, 0
+	add	x0, x26, :lo12:.LANCHOR20
+	adrp	x19, .LANCHOR18
+	bl	ftl_memset
+	adrp	x28, .LANCHOR29
+	add	x0, x28, :lo12:.LANCHOR29
+	str	x0, [x19, #:lo12:.LANCHOR18]
+	add	x0, x20, :lo12:.LANCHOR22
+	adrp	x27, .LANCHOR5
+	ldrb	w2, [x0, 1]
+	strb	wzr, [x27, #:lo12:.LANCHOR5]
+	cmp	w2, 161
+	beq	.L1131
+	cmp	w2, 218
+	beq	.L1131
+	and	w1, w2, -33
+	cmp	w1, 209
+	beq	.L1131
+	cmp	w2, 220
+	bne	.L1132
+	ldrb	w0, [x0, 3]
+	cmp	w0, 149
+	bne	.L1132
+.L1131:
+	mov	w0, 1
+	adrp	x25, .LANCHOR197
+	add	x1, x25, :lo12:.LANCHOR197
+	strb	w0, [x22, #:lo12:.LANCHOR1]
+	mov	w0, 16
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+	add	x3, x20, :lo12:.LANCHOR22
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	strb	w0, [x1, 1]
+	strb	w2, [x1, 2]
+	cmp	w0, 152
+	bne	.L1133
+	ldrsb	w0, [x3, 4]
+	tbnz	w0, #31, .L1133
+	mov	w0, 24
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+.L1133:
+	adrp	x0, .LANCHOR152
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L1134
+	mov	w0, 16
+	strb	w0, [x24, #:lo12:.LANCHOR150]
+.L1134:
+	cmp	w2, 218
+	bne	.L1135
+	add	x0, x25, :lo12:.LANCHOR197
+	mov	w1, 2048
+	strh	w1, [x0, 14]
+	mov	w1, -38
+.L1202:
+	strb	w1, [x0, 2]
+.L1136:
+	adrp	x1, .LANCHOR141
+	add	x1, x1, :lo12:.LANCHOR141
+	mov	w2, 32
+	add	x1, x1, 32
+	adrp	x0, .LANCHOR7
+	add	x0, x0, :lo12:.LANCHOR7
+	bl	ftl_memcpy
+	mov	w2, 32
+	add	x1, x25, :lo12:.LANCHOR197
+	add	x0, x28, :lo12:.LANCHOR29
+	bl	ftl_memcpy
+.L1132:
+	ldrb	w0, [x22, #:lo12:.LANCHOR1]
+	adrp	x25, .LANCHOR8
+	cbnz	w0, .L1138
+	bl	FlashLoadPhyInfoInRam
+	cbnz	w0, .L1140
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	adrp	x24, .LANCHOR24
+	ldrb	w1, [x0, 17]
+	and	w0, w1, 7
+	strb	w0, [x24, #:lo12:.LANCHOR24]
+	tbnz	x1, 0, .L1140
+	mov	w1, 1
+	strb	w1, [x21, #:lo12:.LANCHOR28]
+	bl	FlashSetInterfaceMode
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	bl	NandcSetMode
+.L1140:
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 26]
+	strb	w0, [x25, #:lo12:.LANCHOR8]
+	bl	FlashLoadPhyInfo
+	cbz	w0, .L1138
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrh	w1, [x0, 14]
+	adrp	x0, .LC19
+	add	x0, x0, :lo12:.LC19
+	bl	printf
+	bl	FlashLoadPhyInfoInRam
+	cmn	w0, #1
+	beq	.L1124
+	bl	FlashDieInfoInit
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 19]
+	bl	FlashGetReadRetryDefault
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	adrp	x1, .LANCHOR119
+	ldrh	w1, [x1, #:lo12:.LANCHOR119]
+	ldrb	w2, [x0, 9]
+	add	w1, w1, 4095
+	cmp	w2, w1, lsr 12
+	blt	.L1143
+	ldrh	w1, [x0, 14]
+	add	w1, w1, 255
+	cmp	w2, w1, lsr 8
+	bge	.L1144
+.L1143:
+	ldrh	w1, [x0, 14]
+	and	w1, w1, -256
+	strh	w1, [x0, 14]
+.L1144:
+	adrp	x0, .LANCHOR24
+	ldrb	w0, [x0, #:lo12:.LANCHOR24]
+	tst	w0, 6
+	beq	.L1145
+	bl	FlashSavePhyInfo
+	adrp	x0, .LANCHOR146
+	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	mov	w0, 0
+	bl	FlashDdrParaScan
+.L1145:
+	bl	FlashSavePhyInfo
+.L1138:
+	ldr	x2, [x19, #:lo12:.LANCHOR18]
+	adrp	x24, .LANCHOR24
+	ldrb	w0, [x2, 26]
+	strb	w0, [x25, #:lo12:.LANCHOR8]
+	ldrh	w0, [x2, 16]
+	ubfx	x1, x0, 7, 1
+	strb	w1, [x27, #:lo12:.LANCHOR5]
+	adrp	x1, .LANCHOR198
+	ubfx	x3, x0, 3, 1
+	adrp	x27, .LANCHOR143
+	strb	w3, [x1, #:lo12:.LANCHOR198]
+	adrp	x1, .LANCHOR27
+	ubfx	x3, x0, 4, 1
+	ubfx	x0, x0, 8, 3
+	strb	w3, [x1, #:lo12:.LANCHOR27]
+	strb	w0, [x24, #:lo12:.LANCHOR24]
+	ldrh	w1, [x2, 10]
+	ldrb	w0, [x2, 12]
+	str	xzr, [x27, #:lo12:.LANCHOR143]
+	sdiv	w1, w1, w0
+	ldrb	w0, [x2, 18]
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrh	w1, [x0, 16]
+	tbz	x1, 6, .L1147
+	adrp	x1, .LANCHOR11
+	ldrb	w0, [x0, 19]
+	adrp	x3, .LANCHOR13
+	strb	w0, [x1, #:lo12:.LANCHOR11]
+	add	x1, x26, :lo12:.LANCHOR20
+	ldrb	w2, [x1, 1]
+	strb	w2, [x3, #:lo12:.LANCHOR13]
+	adrp	x2, .LANCHOR149
+	ldrb	w4, [x1, 2]
+	strb	w4, [x2, #:lo12:.LANCHOR149]
+	sub	w4, w0, #1
+	and	w4, w4, 255
+	cmp	w4, 6
+	mov	x4, x3
+	bhi	.L1148
+	adrp	x2, HynixReadRetrial
+	add	x2, x2, :lo12:HynixReadRetrial
+	str	x2, [x27, #:lo12:.LANCHOR143]
+	sub	w2, w0, #5
+	and	w2, w2, 255
+	cmp	w2, 1
+	bhi	.L1149
+	adrp	x2, .LANCHOR34
+	add	x1, x1, 20
+	mov	w3, 1
+	str	w3, [x2, #:lo12:.LANCHOR34]
+.L1150:
+	mov	x2, 0
+	mov	w3, 0
+.L1152:
+	ldrsb	w4, [x1, x2]
+	add	x2, x2, 1
+	cmp	w4, 0
+	cinc	w3, w3, eq
+	cmp	x2, 32
+	bne	.L1152
+	cmp	w3, 27
+	bls	.L1147
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+.L1147:
+	adrp	x0, .LANCHOR152
+	ldr	w1, [x0, #:lo12:.LANCHOR152]
+	mov	w0, 12336
+	movk	w0, 0x5638, lsl 16
+	cmp	w1, w0
+	bne	.L1161
+	ldrb	w0, [x25, #:lo12:.LANCHOR8]
+	cbz	w0, .L1161
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	strb	wzr, [x0, 18]
+.L1161:
+	ldrb	w0, [x20, #:lo12:.LANCHOR22]
+	cmp	w0, 44
+	bne	.L1162
+	ldrb	w0, [x21, #:lo12:.LANCHOR28]
+	cbz	w0, .L1162
+	strb	wzr, [x21, #:lo12:.LANCHOR28]
+	mov	w0, 1
+	bl	FlashSetInterfaceMode
+	mov	w0, 1
+	bl	NandcSetMode
+.L1162:
+	mov	w0, 0
+	bl	flash_enter_slc_mode
+	ldrb	w0, [x24, #:lo12:.LANCHOR24]
+	tst	w0, 6
+	beq	.L1163
+	ldrb	w1, [x21, #:lo12:.LANCHOR28]
+	cbnz	w1, .L1164
+	tbnz	x0, 0, .L1163
+.L1164:
+	adrp	x0, .LANCHOR146
+	ldr	w1, [x0, #:lo12:.LANCHOR146]
+	mov	w0, 0
+	bl	FlashDdrParaScan
+.L1163:
+	mov	w0, 0
+	bl	flash_exit_slc_mode
+	ldr	x0, [x19, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 20]
+	bl	FlashBchSel
+	adrp	x0, .LANCHOR139
+	add	x0, x0, :lo12:.LANCHOR139
+	bl	FlashReadIdbDataRaw
+	ldr	x2, [x19, #:lo12:.LANCHOR18]
+	mov	w0, 16
+	adrp	x1, .LANCHOR15
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	add	x0, x1, :lo12:.LANCHOR15
+	ldrb	w3, [x2, 12]
+	strh	w3, [x0, 8]
+	ldrb	w4, [x2, 7]
+	str	w4, [x0, 4]
+	ldr	w4, [x20, #:lo12:.LANCHOR22]
+	str	w4, [x1, #:lo12:.LANCHOR15]
+	adrp	x1, .LANCHOR25
+	ldrh	w4, [x2, 14]
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	strh	w1, [x0, 10]
+	ldrb	w1, [x2, 13]
+	strh	w1, [x0, 12]
+	ldrh	w1, [x2, 10]
+	strh	w1, [x0, 16]
+	strh	w4, [x0, 14]
+	sdiv	w3, w1, w3
+	strh	w3, [x0, 18]
+	ldrb	w5, [x2, 9]
+	strh	w5, [x0, 20]
+	mov	w3, w5
+	mul	w1, w1, w5
+	mov	w5, 512
+	strh	w5, [x0, 24]
+	mov	w5, 16
+	and	w1, w1, 65535
+	strh	w5, [x0, 26]
+	strh	w1, [x0, 22]
+	ldrb	w5, [x22, #:lo12:.LANCHOR1]
+	cmp	w5, 1
+	bne	.L1165
+	ubfiz	w1, w1, 1, 15
+	lsr	w4, w4, 1
+	ubfiz	w3, w3, 1, 15
+	strh	w1, [x0, 22]
+	strh	w4, [x0, 14]
+	mov	w1, 8
+	strh	w3, [x0, 20]
+	strh	w1, [x0, 26]
+.L1165:
+	ldrb	w0, [x2, 20]
+	bl	FlashBchSel
+	mov	w0, 0
+.L1124:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1135:
+	cmp	w2, 220
+	bne	.L1136
+	add	x0, x25, :lo12:.LANCHOR197
+	mov	w1, 4096
+	strh	w1, [x0, 14]
+	mov	w1, -36
+	b	.L1202
+.L1149:
+	add	x2, x1, 20
+	cmp	w0, 7
+	add	x1, x1, 28
+	csel	x1, x1, x2, eq
+	b	.L1150
+.L1148:
+	sub	w1, w0, #17
+	and	w1, w1, 255
+	cmp	w1, 2
+	bhi	.L1154
+	adrp	x1, MicronReadRetrial
+	add	x1, x1, :lo12:MicronReadRetrial
+	str	x1, [x27, #:lo12:.LANCHOR143]
+	cmp	w0, 19
+	beq	.L1155
+.L1206:
+	mov	w0, 7
+	b	.L1204
+.L1155:
+	mov	w0, 15
+.L1204:
+	strb	w0, [x2, #:lo12:.LANCHOR149]
+	b	.L1147
+.L1154:
+	sub	w1, w0, #65
+	cmp	w0, 33
+	and	w1, w1, 255
+	ccmp	w1, 1, 0, ne
+	bhi	.L1156
+	adrp	x0, ToshibaReadRetrial
+	add	x0, x0, :lo12:ToshibaReadRetrial
+	str	x0, [x27, #:lo12:.LANCHOR143]
+	mov	w0, 4
+	strb	w0, [x3, #:lo12:.LANCHOR13]
+	b	.L1206
+.L1156:
+	sub	w3, w0, #34
+	sub	w1, w0, #67
+	and	w3, w3, 255
+	and	w1, w1, 255
+	cmp	w3, 1
+	ccmp	w1, 1, 0, hi
+	bhi	.L1157
+	adrp	x3, ToshibaReadRetrial
+	add	x3, x3, :lo12:ToshibaReadRetrial
+	str	x3, [x27, #:lo12:.LANCHOR143]
+	cmp	w0, 35
+	mov	w3, 68
+	ccmp	w0, w3, 4, ne
+	beq	.L1158
+	mov	w0, 7
+.L1203:
+	strb	w0, [x2, #:lo12:.LANCHOR149]
+	cmp	w1, 1
+	bhi	.L1160
+	mov	w0, 4
+.L1205:
+	strb	w0, [x4, #:lo12:.LANCHOR13]
+	b	.L1147
+.L1158:
+	mov	w0, 17
+	b	.L1203
+.L1160:
+	mov	w0, 5
+	b	.L1205
+.L1157:
+	cmp	w0, 49
+	bne	.L1147
+	adrp	x0, SamsungReadRetrial
+	add	x0, x0, :lo12:SamsungReadRetrial
+	str	x0, [x27, #:lo12:.LANCHOR143]
+	b	.L1147
+.L1167:
+	mov	w0, -2
+	b	.L1124
+	.size	FlashInit, .-FlashInit
+	.section	.text.FlashReadSlc2KPages,"ax",@progbits
+	.align	2
+	.global	FlashReadSlc2KPages
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, 56
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
+	adrp	x2, .LANCHOR29+9
+	stp	x23, x24, [sp, 48]
+	nop // between mem op and mult-accumulate
+	umaddl	x22, w1, w22, x0
+	stp	x19, x20, [sp, 16]
+	ldrb	w24, [x2, #:lo12:.LANCHOR29+9]
+	adrp	x23, .LANCHOR25
+	mov	x19, x0
+	and	w21, w1, 255
+	add	x23, x23, :lo12:.LANCHOR25
+	adrp	x26, .LANCHOR26
+	str	x27, [sp, 80]
+.L1208:
+	cmp	x22, x19
+	bne	.L1220
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1220:
+	mov	w1, w25
+	mov	w4, w21
+	add	x3, x29, 104
+	add	x2, x29, 108
+	mov	x0, x19
+	bl	LogAddr2PhyAddr
+	ldrb	w1, [x23]
+	ldr	w0, [x29, 104]
+	cmp	w1, w0
+	bhi	.L1209
+	mov	w0, -1
+	str	w0, [x19]
+.L1210:
+	sub	w21, w21, #1
+	add	x19, x19, 56
+	and	w21, w21, 255
+	b	.L1208
+.L1209:
+	add	x1, x26, :lo12:.LANCHOR26
+	ldrb	w27, [x1, w0, uxtw]
+	mov	w0, w27
+	bl	NandcWaitFlashReady
+	mov	w0, w27
+	bl	NandcFlashCs
+	ldr	w1, [x29, 108]
+	mov	w0, w27
+	bl	FlashReadCmd
+	mov	w0, w27
+	bl	NandcWaitFlashReady
+	ldp	x3, x4, [x19, 8]
+	mov	w2, w24
+	mov	w1, 0
+	mov	w0, w27
+	bl	NandcXferData
+	mov	w20, w0
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 108]
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w27
+	bl	FlashReadCmd
+	ldr	x0, [x19, 8]
+	mov	w2, w24
+	mov	w1, 0
+	cmp	x0, 0
+	add	x3, x0, 2048
+	ldr	x0, [x19, 16]
+	csel	x3, x3, xzr, ne
+	cmp	x0, 0
+	add	x4, x0, 8
+	csel	x4, x4, xzr, ne
+	mov	w0, w27
+	bl	NandcXferData
+	mov	w2, w0
+	mov	w0, w27
+	bl	NandcFlashDeCs
+	cmp	w20, w2
+	adrp	x1, .LANCHOR31
+	csel	w0, w20, w2, cs
+	ldrb	w2, [x1, #:lo12:.LANCHOR31]
+	add	w1, w2, w2, lsl 1
+	cmp	w0, w1, lsr 2
+	bls	.L1213
+	cmn	w0, #1
+	mov	w1, 256
+	csel	w0, w0, w1, eq
+.L1213:
+	cmp	w0, 256
+	ccmn	w0, #1, 4, ne
+	csel	w0, w0, wzr, eq
+	str	w0, [x19]
+	ldr	x0, [x19, 16]
+	cbz	x0, .L1216
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	bne	.L1216
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L1216
+	str	w1, [x19]
+.L1216:
+	ldr	w3, [x19]
+	cmn	w3, #1
+	bne	.L1210
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+	ldr	x1, [x19, 8]
+	cbz	x1, .L1218
+	adrp	x0, .LC21
+	mov	w3, 8
+	mov	w2, 4
+	add	x0, x0, :lo12:.LC21
+	bl	rknand_print_hex
+.L1218:
+	ldr	x1, [x19, 16]
+	cbz	x1, .L1210
+	mov	w3, 4
+	adrp	x0, .LC22
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC22
+	bl	rknand_print_hex
+	b	.L1210
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",@progbits
+	.align	2
+	.global	FlashReadPages
+	.type	FlashReadPages, %function
+FlashReadPages:
+	stp	x29, x30, [sp, -176]!
+	adrp	x3, .LANCHOR1
+	add	x29, sp, 0
+	ldrb	w3, [x3, #:lo12:.LANCHOR1]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	stp	w2, w1, [x29, 148]
+	cbnz	w3, .L1239
+	mov	x25, x0
+	adrp	x0, .LANCHOR29+9
+	adrp	x27, .LANCHOR20
+	mov	w23, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	mov	w22, 0
+	str	w0, [x29, 156]
+	adrp	x0, .LANCHOR5
+	str	x0, [x29, 128]
+	ldrb	w1, [x0, #:lo12:.LANCHOR5]
+	add	x0, x27, :lo12:.LANCHOR20
+	str	w1, [x29, 144]
+	str	x0, [x29, 104]
+	add	x0, x0, 4
+	str	x0, [x29, 96]
+.L1240:
+	ldr	w0, [x29, 152]
+	cmp	w22, w0
+	bcc	.L1274
+	mov	w0, 0
+	b	.L1238
+.L1239:
+	bl	FlashReadSlc2KPages
+.L1238:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1274:
+	mov	w26, 56
+	add	x3, x29, 168
+	ldp	w1, w0, [x29, 148]
+	umull	x26, w22, w26
+	add	x2, x29, 172
+	add	x21, x25, x26
+	sub	w4, w0, w22
+	mov	x0, x21
+	ldr	w24, [x21, 4]
+	bl	LogAddr2PhyAddr
+	mov	w20, w0
+	adrp	x0, .LANCHOR25
+	ldr	w1, [x29, 168]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	cmp	w0, w1
+	bhi	.L1242
+	mov	w0, -1
+	str	w0, [x25, x26]
+.L1243:
+	add	w22, w22, 1
+	b	.L1240
+.L1242:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w19, [x0, w1, uxtw]
+	adrp	x0, .LANCHOR198
+	ldrb	w0, [x0, #:lo12:.LANCHOR198]
+	cmp	w0, 0
+	mov	w0, w19
+	csel	w20, w20, wzr, ne
+	bl	NandcWaitFlashReady
+	adrp	x1, .LANCHOR18
+	str	x1, [x29, 120]
+	ldr	x0, [x1, #:lo12:.LANCHOR18]
+	ldrb	w2, [x0, 19]
+	sub	w0, w2, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L1245
+	add	x0, x27, :lo12:.LANCHOR20
+	sxtw	x1, w19
+	add	x0, x0, x1
+	cmp	w2, 7
+	ldrb	w3, [x0, 12]
+	bne	.L1246
+	ldrb	w3, [x0, 20]
+.L1246:
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	ldrb	w0, [x0, x1]
+	cmp	w0, w3
+	beq	.L1245
+	ldp	x2, x0, [x29, 96]
+	ldrb	w1, [x0, 1]
+	mov	w0, w19
+	bl	HynixSetRRPara
+.L1245:
+	mov	w0, w19
+	bl	NandcFlashCs
+	ldr	w0, [x29, 148]
+	cmp	w0, 1
+	cset	w0, eq
+	orr	w24, w0, w24, lsr 31
+	cbz	w24, .L1247
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1247
+	mov	w0, w19
+	bl	flash_enter_slc_mode
+.L1248:
+	adrp	x0, .LANCHOR3
+	add	x0, x0, :lo12:.LANCHOR3
+	str	x0, [x29, 112]
+	ldr	x0, [x29, 128]
+	add	x0, x0, :lo12:.LANCHOR5
+	str	x0, [x29, 136]
+.L1254:
+	ldr	w1, [x29, 172]
+	cmn	w1, #1
+	bne	.L1249
+	cmp	w19, 255
+	beq	.L1276
+.L1249:
+	cbz	w20, .L1251
+	ldr	x0, [x29, 112]
+	ldr	w2, [x0]
+	mov	w0, w19
+	add	w2, w1, w2
+	bl	FlashReadDpCmd
+.L1252:
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	cbz	w20, .L1250
+	ldr	w1, [x29, 172]
+	mov	w0, w19
+	bl	FlashReadDpDataOutCmd
+.L1250:
+	ldrb	w2, [x29, 156]
+	mov	w1, 0
+	ldp	x3, x4, [x21, 8]
+	mov	w0, w19
+	bl	NandcXferData
+	mov	w28, w0
+	ldr	x0, [x29, 136]
+	ldrb	w0, [x0]
+	cbz	w0, .L1253
+	cmn	w28, #1
+	bne	.L1253
+	ldr	x0, [x29, 136]
+	mov	w20, 0
+	strb	wzr, [x0]
+	b	.L1254
+.L1247:
+	mov	w0, w19
+	bl	flash_exit_slc_mode
+	b	.L1248
+.L1251:
+	mov	w0, w19
+	bl	FlashReadCmd
+	b	.L1252
+.L1276:
+	mov	w20, 0
+	b	.L1250
+.L1253:
+	cbz	w20, .L1255
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 172]
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashReadDpDataOutCmd
+	add	w0, w22, 1
+	mov	w1, 56
+	ldrb	w2, [x29, 156]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w0, w1, x25
+	mov	w1, 0
+	ldp	x3, x4, [x0, 8]
+	mov	w0, w19
+	bl	NandcXferData
+	cmn	w0, #1
+	mov	w23, w0
+	csel	w20, w20, wzr, ne
+.L1255:
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	ldr	x0, [x29, 128]
+	cmn	w28, #1
+	ldrb	w1, [x29, 144]
+	strb	w1, [x0, #:lo12:.LANCHOR5]
+	bne	.L1256
+	adrp	x0, .LANCHOR28
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	cbnz	w0, .L1257
+.L1261:
+	adrp	x20, .LANCHOR143
+	ldr	x4, [x20, #:lo12:.LANCHOR143]
+	cbnz	x4, .L1258
+	ldr	w1, [x29, 172]
+	mov	w0, w19
+	ldp	x2, x3, [x21, 8]
+	bl	FlashReadRawPage
+	b	.L1313
+.L1257:
+	adrp	x0, .LANCHOR19
+	ldr	w1, [x29, 172]
+	ldp	x2, x3, [x21, 8]
+	mov	w4, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR19]
+	ldr	w20, [x0, 304]
+	mov	w0, w19
+	bl	FlashDdrTunningRead
+	mov	w28, w0
+	cmn	w0, #1
+	beq	.L1260
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	cmp	w28, w0, lsr 1
+	bls	.L1277
+.L1260:
+	lsr	w0, w20, 8
+	bl	NandcSetDdrPara
+	cmn	w28, #1
+	beq	.L1261
+.L1277:
+	mov	w20, 0
+.L1256:
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w28, w0, lsr 2
+	bls	.L1262
+	adrp	x0, .LANCHOR143
+	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	cmp	x0, 0
+	mov	w0, 256
+	csel	w28, w28, w0, ne
+.L1262:
+	cmp	w28, 256
+	ccmn	w28, #1, 4, ne
+	csel	w3, w28, wzr, eq
+	str	w3, [x25, x26]
+	cmn	w3, #1
+	bne	.L1269
+	adrp	x0, .LANCHOR31
+	ldr	w1, [x21, 4]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	bl	printf
+	ldr	x1, [x21, 16]
+	cbz	x1, .L1269
+	mov	w3, 4
+	adrp	x0, .LC22
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC22
+	bl	rknand_print_hex
+.L1269:
+	cbz	w20, .L1271
+	adrp	x0, .LANCHOR31
+	ldrb	w0, [x0, #:lo12:.LANCHOR31]
+	add	w0, w0, w0, lsl 1
+	cmp	w23, w0, lsr 2
+	bls	.L1272
+	adrp	x0, .LANCHOR143
+	ldr	x0, [x0, #:lo12:.LANCHOR143]
+	cmp	x0, 0
+	mov	w0, 256
+	csel	w23, w23, w0, ne
+.L1272:
+	add	w0, w22, 1
+	mov	w1, 56
+	cmp	w23, 256
+	ccmn	w23, #1, 4, ne
+	umull	x0, w0, w1
+	csel	w1, w23, wzr, eq
+	str	w1, [x25, x0]
+.L1271:
+	add	w22, w22, w20
+	cbz	w24, .L1243
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1243
+	mov	w0, w19
+	bl	flash_exit_slc_mode
+	b	.L1243
+.L1258:
+	ldr	w1, [x29, 172]
+	mov	w0, w19
+	ldp	x2, x3, [x21, 8]
+	blr	x4
+	mov	w28, w0
+	cmn	w0, #1
+	bne	.L1280
+	ldr	x0, [x29, 120]
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrb	w0, [x0, 19]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L1263
+	add	x0, x27, :lo12:.LANCHOR20
+	mov	w3, 0
+	add	x2, x0, 4
+	ldrb	w1, [x0, 1]
+	mov	w0, w19
+	bl	HynixSetRRPara
+.L1263:
+	ldp	x2, x3, [x21, 8]
+	mov	w0, w19
+	ldr	w1, [x29, 172]
+	bl	FlashReadRawPage
+	mov	w28, w0
+	mov	w3, w0
+	adrp	x0, .LANCHOR31
+	ldr	w1, [x21, 4]
+	ldrb	w2, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+	cmn	w28, #1
+	bne	.L1280
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1280
+	mov	w0, w19
+	cbz	w24, .L1264
+	bl	flash_enter_slc_mode
+.L1265:
+	ldr	x4, [x20, #:lo12:.LANCHOR143]
+	mov	w0, w19
+	ldr	w1, [x29, 172]
+	ldp	x2, x3, [x21, 8]
+	blr	x4
+.L1313:
+	mov	w28, w0
+.L1280:
+	mov	w20, 0
+	b	.L1262
+.L1264:
+	bl	flash_exit_slc_mode
+	b	.L1265
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FlashProgSlc2KPages,"ax",@progbits
+	.align	2
+	.global	FlashProgSlc2KPages
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	mov	w23, 56
+	adrp	x2, .LANCHOR29+9
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 255
+	stp	x25, x26, [sp, 64]
+	nop // between mem op and mult-accumulate
+	umaddl	x23, w1, w23, x0
+	ldrb	w25, [x2, #:lo12:.LANCHOR29+9]
+	adrp	x26, .LANCHOR3
+	stp	x27, x28, [sp, 80]
+	mov	w22, w21
+	stp	x19, x20, [sp, 16]
+	mov	x27, x0
+	mov	x20, x0
+	add	x28, x26, :lo12:.LANCHOR3
+	str	w3, [x29, 108]
+.L1315:
+	cmp	x20, x23
+	bne	.L1321
+	ldr	w0, [x29, 108]
+	cbnz	w0, .L1322
+.L1341:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1321:
+	mov	w1, w24
+	mov	w4, w22
+	add	x3, x29, 116
+	add	x2, x29, 112
+	mov	x0, x20
+	bl	LogAddr2PhyAddr
+	adrp	x0, .LANCHOR25
+	ldr	w1, [x29, 116]
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	cmp	w0, w1
+	bhi	.L1316
+	mov	w0, -1
+	str	w0, [x20]
+.L1317:
+	sub	w22, w22, #1
+	add	x20, x20, 56
+	and	w22, w22, 255
+	b	.L1315
+.L1316:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w19, [x0, w1, uxtw]
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	mov	w0, w19
+	bl	NandcFlashCs
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashProgFirstCmd
+	ldp	x3, x4, [x20, 8]
+	mov	w2, w25
+	mov	w1, 1
+	mov	w0, w19
+	bl	NandcXferData
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashProgSecondCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashReadStatus
+	sbfx	x0, x0, 0, 1
+	str	w0, [x20]
+	ldr	w1, [x29, 112]
+	ldr	w0, [x26, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashProgFirstCmd
+	ldr	x0, [x20, 8]
+	mov	w2, w25
+	mov	w1, 1
+	cmp	x0, 0
+	add	x3, x0, 2048
+	ldr	x0, [x20, 16]
+	csel	x3, x3, xzr, ne
+	cmp	x0, 0
+	add	x4, x0, 8
+	csel	x4, x4, xzr, ne
+	mov	w0, w19
+	bl	NandcXferData
+	ldr	w0, [x28]
+	ldr	w1, [x29, 112]
+	add	w1, w1, w0
+	mov	w0, w19
+	bl	FlashProgSecondCmd
+	mov	w0, w19
+	bl	NandcWaitFlashReady
+	ldr	w1, [x29, 112]
+	mov	w0, w19
+	bl	FlashReadStatus
+	tbz	x0, 0, .L1320
+	mov	w0, -1
+	str	w0, [x20]
+.L1320:
+	mov	w0, w19
+	bl	NandcFlashDeCs
+	b	.L1317
+.L1328:
+	ldr	w0, [x27]
+	cmn	w0, #1
+	bne	.L1323
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.L1324:
+	sub	w21, w21, #1
+	add	x27, x27, 56
+	and	w21, w21, 255
+.L1342:
+	cmp	x27, x20
+	bne	.L1328
+	b	.L1341
+.L1323:
+	adrp	x19, .LANCHOR196
+	mov	w4, w21
+	add	x3, x29, 116
+	add	x2, x29, 112
+	mov	w1, w24
+	mov	x0, x27
+	bl	LogAddr2PhyAddr
+	ldr	x26, [x22, #:lo12:.LANCHOR195]
+	ldr	x25, [x19, #:lo12:.LANCHOR196]
+	mov	x2, 56
+	mov	x1, x27
+	add	x0, x29, 120
+	str	wzr, [x26]
+	str	wzr, [x25]
+	bl	memcpy
+	stp	x26, x25, [x29, 128]
+	mov	w2, w24
+	mov	w1, 1
+	add	x0, x29, 120
+	bl	FlashReadPages
+	ldr	w25, [x29, 120]
+	cmn	w25, #1
+	bne	.L1325
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	bl	printf
+	str	w25, [x27]
+.L1325:
+	ldr	x0, [x27, 16]
+	cbz	x0, .L1326
+	ldr	w2, [x0]
+	ldr	x0, [x19, #:lo12:.LANCHOR196]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1326
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	bl	printf
+	mov	w0, -1
+	str	w0, [x27]
+.L1326:
+	ldr	x0, [x27, 8]
+	cbz	x0, .L1324
+	ldr	w2, [x0]
+	ldr	x0, [x23, #:lo12:.LANCHOR195]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1324
+	ldr	w1, [x27, 4]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	bl	printf
+	mov	w0, -1
+	str	w0, [x27]
+	b	.L1324
+.L1322:
+	adrp	x22, .LANCHOR195
+	mov	x23, x22
+	b	.L1342
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",@progbits
+	.align	2
+	.global	FlashProgPages
+	.type	FlashProgPages, %function
+FlashProgPages:
+	stp	x29, x30, [sp, -176]!
+	adrp	x4, .LANCHOR18
+	add	x29, sp, 0
+	ldr	x4, [x4, #:lo12:.LANCHOR18]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrb	w4, [x4, 19]
+	stp	w3, w4, [x29, 100]
+	adrp	x4, .LANCHOR1
+	ldrb	w4, [x4, #:lo12:.LANCHOR1]
+	cbnz	w4, .L1345
+	mov	x19, x0
+	adrp	x0, .LANCHOR29+9
+	adrp	x27, .LANCHOR23
+	mov	w24, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR29+9]
+	mov	w22, w2
+	add	x28, x27, :lo12:.LANCHOR23
+	mov	w21, 0
+	str	w0, [x29, 108]
+.L1346:
+	cmp	w21, w24
+	adrp	x26, .LANCHOR25
+	bcc	.L1359
+	adrp	x21, .LANCHOR8
+	adrp	x23, .LANCHOR23
+	add	x25, x26, :lo12:.LANCHOR25
+	add	x21, x21, :lo12:.LANCHOR8
+	add	x23, x23, :lo12:.LANCHOR23
+	mov	x20, 0
+.L1360:
+	ldrb	w0, [x25]
+	cmp	w0, w20
+	bhi	.L1362
+	ldr	w0, [x29, 100]
+	cbnz	w0, .L1363
+.L1371:
+	mov	w0, 0
+	b	.L1344
+.L1345:
+	bl	FlashProgSlc2KPages
+.L1344:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1359:
+	mov	w12, 56
+	mov	w1, w22
+	sub	w4, w24, w21
+	add	x3, x29, 116
+	umull	x12, w21, w12
+	add	x2, x29, 112
+	add	x25, x19, x12
+	mov	x0, x25
+	bl	LogAddr2PhyAddr
+	mov	w23, w0
+	ldrb	w1, [x26, #:lo12:.LANCHOR25]
+	ldr	w0, [x29, 116]
+	cmp	w1, w0
+	bhi	.L1348
+	mov	w0, -1
+	str	w0, [x19, x12]
+.L1349:
+	add	w21, w21, 1
+	b	.L1346
+.L1348:
+	adrp	x1, .LANCHOR27
+	add	x2, x27, :lo12:.LANCHOR23
+	mov	x3, 24
+	ldrb	w1, [x1, #:lo12:.LANCHOR27]
+	cmp	w1, 0
+	uxtw	x1, w0
+	csel	w23, w23, wzr, ne
+	madd	x1, x1, x3, x2
+	ldr	x1, [x1, 8]
+	cbz	x1, .L1351
+	bl	FlashWaitCmdDone
+.L1351:
+	ldp	w2, w1, [x29, 112]
+	mov	x0, 24
+	madd	x0, x1, x0, x28
+	str	w2, [x0, 4]
+	stp	x25, xzr, [x0, 8]
+	cbz	w23, .L1352
+	add	w2, w21, 1
+	mov	w3, 56
+	umaddl	x2, w2, w3, x19
+	str	x2, [x0, 16]
+.L1352:
+	adrp	x0, .LANCHOR26
+	add	x0, x0, :lo12:.LANCHOR26
+	ldrb	w20, [x0, x1]
+	mov	x0, 24
+	mul	x1, x1, x0
+	ldrb	w0, [x26, #:lo12:.LANCHOR25]
+	cmp	w0, 1
+	mov	w0, w20
+	strb	w20, [x28, x1]
+	bne	.L1353
+	bl	NandcWaitFlashReady
+.L1354:
+	ldr	w0, [x29, 104]
+	sub	w0, w0, #1
+	cmp	w0, 6
+	bhi	.L1355
+	adrp	x0, .LANCHOR21
+	add	x0, x0, :lo12:.LANCHOR21
+	ldrb	w0, [x0, w20, sxtw]
+	cbz	w0, .L1355
+	adrp	x0, .LANCHOR20
+	add	x0, x0, :lo12:.LANCHOR20
+	add	x2, x0, 4
+	mov	w3, 0
+	ldrb	w1, [x0, 1]
+	mov	w0, w20
+	bl	HynixSetRRPara
+.L1355:
+	mov	w0, w20
+	bl	NandcFlashCs
+	cmp	w22, 1
+	bne	.L1356
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1356
+	mov	w0, w20
+	bl	flash_enter_slc_mode
+.L1357:
+	ldr	w1, [x29, 112]
+	mov	w0, w20
+	bl	FlashProgFirstCmd
+	ldrb	w2, [x29, 108]
+	mov	w1, 1
+	ldp	x3, x4, [x25, 8]
+	mov	w0, w20
+	bl	NandcXferData
+	cbz	w23, .L1358
+	ldr	w1, [x29, 112]
+	mov	w0, w20
+	bl	FlashProgDpFirstCmd
+	ldr	w1, [x29, 116]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ldr	w0, [x0, x1, lsl 2]
+	ldr	w1, [x29, 112]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	adrp	x0, .LANCHOR3
+	ldr	w1, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR3]
+	add	w1, w1, w0
+	mov	w0, w20
+	bl	FlashProgDpSecondCmd
+	add	w0, w21, 1
+	mov	w1, 56
+	ldrb	w2, [x29, 108]
+	nop // between mem op and mult-accumulate
+	umaddl	x0, w0, w1, x19
+	mov	w1, 1
+	ldp	x3, x4, [x0, 8]
+	mov	w0, w20
+	bl	NandcXferData
+.L1358:
+	ldr	w1, [x29, 112]
+	mov	w0, w20
+	add	w21, w21, w23
+	bl	FlashProgSecondCmd
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	b	.L1349
+.L1353:
+	bl	NandcFlashCs
+	ldr	w1, [x29, 116]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	ldr	w0, [x0, x1, lsl 2]
+	ldr	w1, [x29, 112]
+	cmp	w0, 0
+	mov	w0, w20
+	cset	w2, ne
+	bl	FlashWaitReadyEN
+	mov	w0, w20
+	bl	NandcFlashDeCs
+	b	.L1354
+.L1356:
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+	b	.L1357
+.L1362:
+	mov	w0, w20
+	bl	FlashWaitCmdDone
+	cmp	w22, 1
+	bne	.L1361
+	ldrb	w0, [x21]
+	cbz	w0, .L1361
+	mov	x0, 24
+	mul	x0, x20, x0
+	ldrb	w0, [x0, x23]
+	bl	flash_exit_slc_mode
+.L1361:
+	add	x20, x20, 1
+	b	.L1360
+.L1363:
+	mov	w0, 56
+	and	w20, w24, 255
+	adrp	x23, .LANCHOR195
+	mov	x25, x23
+	umaddl	x24, w24, w0, x19
+.L1364:
+	cmp	x24, x19
+	beq	.L1371
+	ldr	w0, [x19]
+	cmn	w0, #1
+	bne	.L1365
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	bl	printf
+.L1366:
+	sub	w20, w20, #1
+	add	x19, x19, 56
+	and	w20, w20, 255
+	b	.L1364
+.L1365:
+	adrp	x21, .LANCHOR196
+	mov	w4, w20
+	add	x3, x29, 116
+	add	x2, x29, 112
+	mov	w1, w22
+	mov	x0, x19
+	bl	LogAddr2PhyAddr
+	ldr	x27, [x23, #:lo12:.LANCHOR195]
+	ldr	x26, [x21, #:lo12:.LANCHOR196]
+	mov	x2, 56
+	mov	x1, x19
+	add	x0, x29, 120
+	str	wzr, [x27]
+	str	wzr, [x26]
+	bl	memcpy
+	stp	x27, x26, [x29, 128]
+	mov	w2, w22
+	mov	w1, 1
+	add	x0, x29, 120
+	bl	FlashReadPages
+	ldr	w26, [x29, 120]
+	cmn	w26, #1
+	bne	.L1367
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC25
+	add	x0, x0, :lo12:.LC25
+	bl	printf
+	str	w26, [x19]
+.L1367:
+	ldr	x0, [x19, 16]
+	cbz	x0, .L1368
+	ldr	w2, [x0]
+	ldr	x0, [x21, #:lo12:.LANCHOR196]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1368
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC26
+	add	x0, x0, :lo12:.LC26
+	bl	printf
+	mov	w0, -1
+	str	w0, [x19]
+.L1368:
+	ldr	x0, [x19, 8]
+	cbz	x0, .L1366
+	ldr	w2, [x0]
+	ldr	x0, [x25, #:lo12:.LANCHOR195]
+	ldr	w3, [x0]
+	cmp	w2, w3
+	beq	.L1366
+	ldr	w1, [x19, 4]
+	adrp	x0, .LC27
+	add	x0, x0, :lo12:.LC27
+	bl	printf
+	mov	w0, -1
+	str	w0, [x19]
+	b	.L1366
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashTestBlk,"ax",@progbits
+	.align	2
+	.global	FlashTestBlk
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR147
+	ldr	w0, [x0, #:lo12:.LANCHOR147]
+	cmp	w19, w0
+	bcc	.L1399
+	adrp	x20, .LANCHOR151
+	mov	w2, 32
+	mov	w1, 165
+	lsl	w19, w19, 10
+	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	str	x0, [x29, 48]
+	add	x0, x29, 96
+	str	x0, [x29, 56]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR151]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	str	w19, [x29, 44]
+	mov	w2, 1
+	add	x0, x29, 40
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	add	x0, x29, 40
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x29, 40]
+	mov	w2, 1
+	mov	w1, 0
+	cmp	w0, 0
+	add	x0, x29, 40
+	csetm	w19, ne
+	bl	FlashEraseBlocks
+.L1397:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 160
+	ret
+.L1399:
+	mov	w19, 0
+	b	.L1397
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlLowFormatEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlLowFormatEraseBlock
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	adrp	x0, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L1424
+	adrp	x0, .LANCHOR72
+	and	w24, w1, 255
+	adrp	x23, .LANCHOR8
+	adrp	x1, .LANCHOR36
+	str	w25, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR186
+	adrp	x21, .LANCHOR76
+	ldrb	w10, [x23, #:lo12:.LANCHOR8]
+	ldr	x12, [x0, #:lo12:.LANCHOR186]
+	adrp	x0, .LANCHOR57
+	ldrh	w11, [x1, #:lo12:.LANCHOR36]
+	mov	x8, 56
+	ldr	x6, [x21, #:lo12:.LANCHOR76]
+	adrp	x7, .LANCHOR45
+	ldrh	w13, [x0, #:lo12:.LANCHOR57]
+	add	x7, x7, :lo12:.LANCHOR45
+	mov	w14, w8
+	mov	x5, 0
+	mov	w20, 0
+	mov	w19, 0
+	stp	x0, x1, [x29, 112]
+.L1403:
+	cmp	w11, w5, uxth
+	bhi	.L1407
+	cbz	w20, .L1401
+	cmp	w10, 0
+	mov	w2, w20
+	cset	w22, ne
+	mov	x0, x6
+	mov	w1, w22
+	mov	x26, 0
+	bl	FlashEraseBlocks
+	mov	w0, 56
+	umull	x20, w20, w0
+.L1410:
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x1, x0, x26
+	ldr	w0, [x0, x26]
+	cmn	w0, #1
+	bne	.L1409
+	ldr	w0, [x1, 4]
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+.L1409:
+	add	x26, x26, 56
+	cmp	x26, x20
+	bne	.L1410
+	cbnz	w24, .L1411
+	and	w22, w22, 65535
+	mov	w27, 6
+	mov	w26, 1
+.L1412:
+	adrp	x28, .LANCHOR45
+	mov	w23, 0
+	add	x0, x28, :lo12:.LANCHOR45
+	str	x0, [x29, 104]
+.L1420:
+	ldr	x0, [x29, 120]
+	mov	x5, 0
+	ldr	x6, [x21, #:lo12:.LANCHOR76]
+	mov	w20, 0
+	mov	w12, 56
+	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR183
+	ldr	x8, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR184
+	ldr	x10, [x0, #:lo12:.LANCHOR184]
+	ldr	x0, [x29, 112]
+	ldrh	w11, [x0, #:lo12:.LANCHOR57]
+.L1413:
+	cmp	w7, w5, uxth
+	bhi	.L1416
+	cbz	w20, .L1401
+	mov	w1, w20
+	mov	w3, 1
+	mov	w2, w22
+	mov	x0, x6
+	bl	FlashProgPages
+	mov	x28, 0
+	mov	w1, 56
+	umull	x1, w20, w1
+.L1419:
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x3, x0, x28
+	ldr	w0, [x0, x28]
+	cbz	w0, .L1418
+	ldr	w0, [x3, 4]
+	add	w19, w19, 1
+	str	x1, [x29, 96]
+	and	w19, w19, 65535
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldr	x1, [x29, 96]
+.L1418:
+	add	x28, x28, 56
+	cmp	x1, x28
+	bne	.L1419
+	add	w23, w23, w27
+	and	w23, w23, 65535
+	cmp	w23, w26
+	bcc	.L1420
+	mov	x23, 0
+.L1422:
+	cbz	w24, .L1421
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	add	x1, x0, x23
+	ldr	w0, [x0, x23]
+	cbnz	w0, .L1421
+	ldr	w0, [x1, 4]
+	mov	w1, 1
+	lsr	w0, w0, 10
+	bl	FtlFreeSysBlkQueueIn
+.L1421:
+	add	x23, x23, 56
+	cmp	x23, x28
+	bne	.L1422
+	cmp	w25, 63
+	ccmp	w24, 0, 0, hi
+	beq	.L1401
+	ldr	x0, [x21, #:lo12:.LANCHOR76]
+	mov	w2, w20
+	mov	w1, w22
+	bl	FlashEraseBlocks
+.L1401:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1407:
+	mul	x0, x5, x8
+	mov	w1, w25
+	str	wzr, [x6, x0]
+	ldrb	w0, [x7, x5]
+	bl	V2P_block
+	and	w15, w0, 65535
+	mov	w22, w15
+	cbz	w24, .L1404
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L1405
+.L1404:
+	mov	w0, w22
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L1406
+	umaddl	x1, w20, w14, x6
+	lsl	w15, w15, 10
+	mul	w0, w20, w13
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	asr	w0, w0, 2
+	str	w15, [x1, 4]
+	add	x0, x12, x0, sxtw 2
+	stp	xzr, x0, [x1, 8]
+.L1405:
+	add	x5, x5, 1
+	b	.L1403
+.L1406:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1405
+.L1411:
+	adrp	x0, .LANCHOR52
+	ldrh	w26, [x0, #:lo12:.LANCHOR52]
+	ldrb	w0, [x23, #:lo12:.LANCHOR8]
+	cbnz	w0, .L1425
+	lsr	w27, w26, 2
+	mov	w22, 1
+	b	.L1412
+.L1425:
+	mov	w22, 1
+	mov	w27, w22
+	b	.L1412
+.L1416:
+	mov	x0, 56
+	mov	w1, w25
+	mul	x0, x5, x0
+	str	wzr, [x6, x0]
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0, x5]
+	bl	V2P_block
+	and	w13, w0, 65535
+	mov	w14, w13
+	cbz	w24, .L1414
+	bl	IsBlkInVendorPart
+	cbnz	w0, .L1415
+.L1414:
+	mov	w0, w14
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L1415
+	umaddl	x1, w20, w12, x6
+	add	w13, w23, w13, lsl 10
+	mul	w0, w20, w11
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	asr	w0, w0, 2
+	str	w13, [x1, 4]
+	add	x0, x10, x0, sxtw 2
+	stp	x8, x0, [x1, 8]
+.L1415:
+	add	x5, x5, 1
+	b	.L1413
+.L1424:
+	mov	w19, 0
+	b	.L1401
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlBbmTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlBbmTblFlush
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	ldr	w0, [x22, #:lo12:.LANCHOR75]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L1448
+	adrp	x24, .LANCHOR185
+	adrp	x23, .LANCHOR79
+	adrp	x19, .LANCHOR199
+	add	x20, x19, :lo12:.LANCHOR199
+	ldr	x1, [x24, #:lo12:.LANCHOR185]
+	adrp	x21, .LANCHOR73
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	add	x26, x21, :lo12:.LANCHOR73
+	stp	x0, x1, [x20, 8]
+	adrp	x1, .LANCHOR56
+	adrp	x27, .LANCHOR43
+	adrp	x28, .LANCHOR120
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	add	x26, x26, 32
+	mov	w25, 0
+	add	x27, x27, :lo12:.LANCHOR43
+	add	x28, x28, :lo12:.LANCHOR120
+	mov	w1, 0
+	bl	ftl_memset
+.L1449:
+	ldrh	w0, [x27]
+	cmp	w25, w0
+	blt	.L1450
+	add	x19, x19, :lo12:.LANCHOR199
+	add	x20, x21, :lo12:.LANCHOR73
+	mov	w2, 16
+	mov	w1, 255
+	adrp	x25, .LC28
+	adrp	x27, .LANCHOR52
+	ldr	x28, [x19, 16]
+	add	x25, x25, :lo12:.LC28
+	add	x27, x27, :lo12:.LANCHOR52
+	mov	w26, 0
+	mov	x0, x28
+	bl	ftl_memset
+	mov	w0, -3887
+	strh	w0, [x28]
+	ldr	w0, [x20, 8]
+	str	w0, [x28, 4]
+	ldrh	w0, [x21, #:lo12:.LANCHOR73]
+	mov	w21, 0
+	strh	w0, [x28, 2]
+	ldrh	w0, [x20, 4]
+	strh	w0, [x28, 8]
+	ldrh	w0, [x20, 6]
+	strh	w0, [x28, 10]
+	adrp	x0, .LANCHOR35
+	ldr	w0, [x0, #:lo12:.LANCHOR35]
+	strh	w0, [x28, 12]
+.L1451:
+	ldrh	w4, [x28, 10]
+	ldrh	w1, [x20]
+	ldrh	w2, [x20, 2]
+	ldrh	w3, [x20, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	str	x0, [x19, 8]
+	ldr	x0, [x24, #:lo12:.LANCHOR185]
+	str	x0, [x19, 16]
+	orr	w0, w2, w1, lsl 10
+	str	wzr, [x19]
+	str	w0, [x19, 4]
+	mov	x0, x25
+	bl	printf
+	mov	w3, 1
+	mov	x0, x19
+	mov	w1, w3
+	mov	w2, w3
+	bl	FlashProgPages
+	ldrh	w0, [x27]
+	ldrh	w1, [x20, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1452
+	ldr	w0, [x20, 8]
+	mov	w2, 1
+	ldrh	w1, [x20, 4]
+	add	w0, w0, 1
+	str	w0, [x20, 8]
+	str	w0, [x28, 4]
+	ldrh	w0, [x20]
+	strh	w0, [x28, 8]
+	strh	w0, [x20, 4]
+	adrp	x0, .LANCHOR76
+	strh	w1, [x20]
+	lsl	w1, w1, 10
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	str	w1, [x19, 4]
+	strh	wzr, [x20, 2]
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x19
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+.L1452:
+	ldrh	w0, [x20, 2]
+	add	w0, w0, 1
+	strh	w0, [x20, 2]
+	ldr	w0, [x19]
+	cmn	w0, #1
+	bne	.L1453
+	ldr	w1, [x19, 4]
+	add	w21, w21, 1
+	adrp	x0, .LC29
+	and	w21, w21, 65535
+	add	x0, x0, :lo12:.LC29
+	bl	printf
+	cmp	w21, 3
+	bls	.L1451
+	ldr	w1, [x19, 4]
+	mov	w2, w21
+	adrp	x0, .LC30
+	add	x0, x0, :lo12:.LC30
+	bl	printf
+	mov	w0, 1
+	str	w0, [x22, #:lo12:.LANCHOR75]
+.L1448:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1450:
+	ldrh	w2, [x28]
+	ldr	x1, [x26], 8
+	ldr	x0, [x20, 8]
+	mul	w3, w2, w25
+	lsl	w2, w2, 2
+	add	w25, w25, 1
+	add	x0, x0, x3, sxtw 2
+	bl	ftl_memcpy
+	b	.L1449
+.L1453:
+	cbnz	w26, .L1448
+	mov	w26, 1
+	b	.L1451
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_data_superblock
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	adrp	x1, .LANCHOR75
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	cbnz	w1, .L1521
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR84
+	add	x0, x27, :lo12:.LANCHOR84
+	stp	x23, x24, [sp, 48]
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR87
+	add	x23, x0, :lo12:.LANCHOR87
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+.L1512:
+	ldr	x1, [x29, 120]
+	adrp	x0, .LANCHOR87
+	adrp	x25, .LANCHOR38
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	ldrh	w1, [x1]
+	add	w0, w0, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1461
+	mov	w2, 2822
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1461:
+	adrp	x0, .LANCHOR92
+	add	x0, x0, :lo12:.LANCHOR92
+	cmp	x19, x0
+	bne	.L1462
+	adrp	x1, .LANCHOR170
+	ldrh	w2, [x23]
+	ldr	w3, [x1, #:lo12:.LANCHOR170]
+	lsr	w0, w2, 1
+	add	w4, w0, 1
+	mul	w1, w2, w3
+	add	w1, w4, w1, lsr 2
+	adrp	x4, .LANCHOR101
+	and	w1, w1, 65535
+	ldr	w4, [x4, #:lo12:.LANCHOR101]
+	cbz	w4, .L1463
+	adrp	x4, .LANCHOR168
+	ldr	w4, [x4, #:lo12:.LANCHOR168]
+	cmp	w4, 29
+	bhi	.L1463
+	cmp	w4, 2
+	bls	.L1496
+	tbz	x2, 0, .L1492
+	cbz	w3, .L1496
+.L1492:
+	mov	w1, w0
+	b	.L1463
+.L1462:
+	ldrb	w0, [x19, 8]
+	cmp	w0, 1
+	bne	.L1496
+	adrp	x0, .LANCHOR42
+	ldrh	w0, [x0, #:lo12:.LANCHOR42]
+	cmp	w0, 1
+	beq	.L1496
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L1496
+	adrp	x2, .LANCHOR101
+	ldrh	w0, [x23]
+	ldr	w2, [x2, #:lo12:.LANCHOR101]
+	lsr	w1, w0, 3
+	cbz	w2, .L1463
+	adrp	x2, .LANCHOR168
+	ldr	w2, [x2, #:lo12:.LANCHOR168]
+	cmp	w2, 1
+	bhi	.L1463
+	mov	w1, 7
+	mul	w1, w0, w1
+	lsr	w1, w1, 3
+.L1463:
+	cbz	w1, .L1464
+	sub	w1, w1, #1
+	and	w1, w1, 65535
+.L1464:
+	ldrb	w2, [x19, 8]
+	adrp	x0, .LANCHOR86
+	add	x0, x0, :lo12:.LANCHOR86
+	bl	List_pop_index_node
+	and	w21, w0, 65535
+	ldrh	w0, [x23]
+	cbnz	w0, .L1465
+	mov	w2, 2842
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1465:
+	ldrh	w0, [x23]
+	sub	w0, w0, #1
+	strh	w0, [x23]
+	strh	w21, [x19]
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1466
+	adrp	x0, .LANCHOR82
+	ubfiz	x21, x21, 1, 16
+	mov	w1, -1
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	strh	w1, [x0, x21]
+	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1512
+	mov	w2, 2854
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L1512
+.L1496:
+	mov	w1, 0
+	b	.L1464
+.L1466:
+	ldrh	w1, [x27, #:lo12:.LANCHOR84]
+	ldrh	w0, [x23]
+	add	w0, w0, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1468
+	mov	w2, 2857
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1468:
+	adrp	x1, .LANCHOR36
+	adrp	x24, .LANCHOR76
+	mov	w2, 56
+	mov	x3, 8
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	add	x26, x19, 16
+	ldr	x4, [x24, #:lo12:.LANCHOR76]
+	mov	x5, x26
+	mov	w20, 0
+	mov	w6, 65535
+	add	x0, x4, 8
+	umaddl	x1, w2, w1, x3
+	add	x1, x4, x1
+.L1469:
+	cmp	x1, x0
+	bne	.L1471
+	cbnz	w20, .L1472
+	mov	w2, 2869
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1472:
+	adrp	x0, .LANCHOR101
+	uxtw	x22, w21
+	adrp	x28, .LANCHOR77
+	ldr	w0, [x0, #:lo12:.LANCHOR101]
+	cbz	w0, .L1473
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	cmp	x19, x0
+	bne	.L1473
+	ldr	x0, [x28, #:lo12:.LANCHOR77]
+	ldrh	w0, [x0, x22, lsl 1]
+	cmp	w0, 30
+	bls	.L1473
+	strb	wzr, [x19, 8]
+.L1473:
+	adrp	x0, .LANCHOR201
+	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+	cmp	w0, w21
+	bne	.L1474
+	mov	w2, 2876
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1474:
+	ldrb	w0, [x19, 8]
+	adrp	x6, .LANCHOR46
+	adrp	x5, .LANCHOR165
+	adrp	x4, .LANCHOR166
+	cbnz	w0, .L1475
+	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	lsl	x1, x22, 1
+	ldrh	w0, [x2, x1]
+	cbz	w0, .L1476
+	ldrh	w7, [x6, #:lo12:.LANCHOR46]
+	add	w0, w0, w7
+.L1524:
+	strh	w0, [x2, x1]
+	mov	w1, 0
+	ldr	w0, [x5, #:lo12:.LANCHOR165]
+	add	w0, w0, 1
+	str	w0, [x5, #:lo12:.LANCHOR165]
+	mov	w0, w21
+	bl	ftl_set_blk_mode
+.L1478:
+	ldr	x0, [x28, #:lo12:.LANCHOR77]
+	lsl	x22, x22, 1
+	ldrh	w1, [x0, x22]
+	adrp	x0, .LANCHOR167
+	ldr	w2, [x0, #:lo12:.LANCHOR167]
+	cmp	w1, w2
+	bls	.L1479
+	str	w1, [x0, #:lo12:.LANCHOR167]
+.L1479:
+	ldr	w2, [x5, #:lo12:.LANCHOR165]
+	mov	x3, 4
+	ldr	w1, [x4, #:lo12:.LANCHOR166]
+	ldrh	w0, [x6, #:lo12:.LANCHOR46]
+	madd	w0, w0, w2, w1
+	ldrh	w1, [x25, #:lo12:.LANCHOR38]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR202
+	str	w0, [x1, #:lo12:.LANCHOR202]
+	adrp	x0, .LANCHOR188
+	ldr	x1, [x0, #:lo12:.LANCHOR188]
+	ldr	w0, [x1, 16]
+	add	w0, w0, 1
+	str	w0, [x1, 16]
+	mov	w1, 56
+	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	nop // between mem op and mult-accumulate
+	umaddl	x1, w1, w20, x3
+	add	x2, x0, 4
+	add	x1, x0, x1
+.L1480:
+	cmp	x1, x2
+	bne	.L1481
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L1482
+	ldrb	w1, [x19, 8]
+	mov	w2, w20
+	cmp	w1, 1
+	bne	.L1483
+	mov	w1, 0
+.L1525:
+	bl	FlashEraseBlocks
+.L1482:
+	ldrb	w1, [x19, 8]
+	mov	w2, w20
+	ldr	x0, [x24, #:lo12:.LANCHOR76]
+	mov	x25, 0
+	bl	FlashEraseBlocks
+	mov	w1, 0
+	mov	x3, 56
+.L1484:
+	cmp	w20, w25, uxth
+	bhi	.L1486
+	cbz	w1, .L1487
+	mov	w0, w21
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1487:
+	ldrb	w0, [x19, 7]
+	adrp	x2, .LANCHOR82
+	cbnz	w0, .L1488
+	ldr	x0, [x2, #:lo12:.LANCHOR82]
+	mov	w1, -1
+	strh	w1, [x0, x22]
+	b	.L1512
+.L1471:
+	ldrh	w3, [x5]
+	stp	xzr, xzr, [x0]
+	cmp	w3, w6
+	beq	.L1470
+	umaddl	x7, w20, w2, x4
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	lsl	w3, w3, 10
+	str	w3, [x7, 4]
+.L1470:
+	add	x0, x0, 56
+	add	x5, x5, 2
+	b	.L1469
+.L1476:
+	mov	w0, 2
+	b	.L1524
+.L1475:
+	ldr	x2, [x28, #:lo12:.LANCHOR77]
+	lsl	x0, x22, 1
+	ldrh	w1, [x2, x0]
+	add	w1, w1, 1
+	strh	w1, [x2, x0]
+	ldr	w0, [x4, #:lo12:.LANCHOR166]
+	add	w0, w0, 1
+	str	w0, [x4, #:lo12:.LANCHOR166]
+	mov	w0, w21
+	bl	ftl_set_blk_mode.part.9
+	b	.L1478
+.L1481:
+	ldr	w3, [x2]
+	and	w3, w3, -1024
+	str	w3, [x2], 56
+	b	.L1480
+.L1483:
+	mov	w1, 1
+	b	.L1525
+.L1486:
+	mul	x0, x25, x3
+	ldr	x2, [x24, #:lo12:.LANCHOR76]
+	add	x4, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L1485
+	add	w1, w1, 1
+	ldr	w0, [x4, 4]
+	str	x3, [x29, 104]
+	stp	w2, w1, [x29, 112]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	ldp	w2, w1, [x29, 112]
+	strh	w2, [x26]
+	ldr	x3, [x29, 104]
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+.L1485:
+	add	x25, x25, 1
+	add	x26, x26, 2
+	b	.L1484
+.L1488:
+	adrp	x1, .LANCHOR51
+	adrp	x3, .LANCHOR157
+	strb	wzr, [x19, 6]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	strh	wzr, [x19, 2]
+	strh	w21, [x19]
+	mul	w0, w0, w1
+	ldr	w1, [x3, #:lo12:.LANCHOR157]
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x3, #:lo12:.LANCHOR157]
+	ldr	x1, [x2, #:lo12:.LANCHOR82]
+	and	w0, w0, 65535
+	strh	w0, [x19, 4]
+	strh	w0, [x1, x22]
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1489
+	ldrb	w0, [x19, 7]
+	cbnz	w0, .L1460
+.L1489:
+	mov	w2, 2935
+	adrp	x1, .LANCHOR200
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR200
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1460:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1521:
+	mov	w0, 0
+	ret
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeBadSuperBlk
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR114
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR114]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	str	x27, [sp, 80]
+	cbz	w0, .L1527
+	adrp	x23, .LANCHOR115
+	add	x24, x23, :lo12:.LANCHOR115
+	mov	w19, 0
+.L1528:
+	adrp	x0, .LANCHOR36
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w0, w19
+	bhi	.L1534
+	bl	FtlGcReFreshBadBlk
+.L1527:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1534:
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	mov	w1, w25
+	add	x22, x21, :lo12:.LANCHOR114
+	mov	w20, 0
+	ldrb	w0, [x0, w19, sxtw]
+	bl	V2P_block
+	and	w26, w0, 65535
+.L1529:
+	ldrh	w0, [x22]
+	cmp	w0, w20
+	bhi	.L1533
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1528
+.L1533:
+	add	x0, x23, :lo12:.LANCHOR115
+	add	w27, w20, 1
+	ldrh	w0, [x0, w20, sxtw 1]
+	cmp	w0, w26
+	bne	.L1530
+	mov	w0, w26
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	w1, [x22]
+	sxtw	x3, w27
+	and	x4, x20, 65535
+	mov	x0, 0
+.L1531:
+	add	w2, w20, w0
+	cmp	w1, w2, uxth
+	bhi	.L1532
+	sub	w1, w1, #1
+	strh	w1, [x22]
+.L1530:
+	and	w20, w27, 65535
+	b	.L1529
+.L1532:
+	add	x2, x3, x0
+	ldrh	w5, [x24, x2, lsl 1]
+	add	x2, x4, x0
+	add	x0, x0, 1
+	strh	w5, [x24, x2, lsl 1]
+	b	.L1531
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",@progbits
+	.align	2
+	.global	update_vpc_list
+	.type	update_vpc_list, %function
+update_vpc_list:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR82
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ubfiz	x0, x19, 1, 16
+	ldrh	w0, [x1, x0]
+	cbnz	w0, .L1540
+	adrp	x0, .LANCHOR201
+	ldrh	w1, [x0, #:lo12:.LANCHOR201]
+	cmp	w1, w19
+	bne	.L1541
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR201]
+.L1542:
+	adrp	x20, .LANCHOR84
+	mov	w1, w19
+	adrp	x0, .LANCHOR81
+	add	x0, x0, :lo12:.LANCHOR81
+	bl	List_remove_node
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	cbnz	w0, .L1544
+	mov	w2, 3046
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1544:
+	ldrh	w0, [x20, #:lo12:.LANCHOR84]
+	sub	w0, w0, #1
+	strh	w0, [x20, #:lo12:.LANCHOR84]
+	mov	w0, w19
+	bl	free_data_superblock
+	mov	w0, w19
+	bl	FtlGcFreeBadSuperBlk
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x20, #:lo12:.LANCHOR84]
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w0, w1
+	ble	.L1548
+	mov	w2, 3049
+	adrp	x1, .LANCHOR203
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR203
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1548:
+	mov	w0, 1
+	b	.L1539
+.L1541:
+	adrp	x0, .LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	cmp	w0, w19
+	beq	.L1547
+	adrp	x0, .LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w0, w19
+	beq	.L1547
+	adrp	x0, .LANCHOR92
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w19
+	bne	.L1542
+.L1547:
+	mov	w0, 0
+.L1539:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1540:
+	mov	w0, w19
+	bl	List_update_data_list
+	b	.L1547
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",@progbits
+	.align	2
+	.global	decrement_vpc_count
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	str	x21, [sp, 32]
+	mov	w0, 65535
+	cmp	w19, w0
+	beq	.L1551
+	adrp	x21, .LANCHOR82
+	ubfiz	x20, x19, 1, 16
+	ldr	x1, [x21, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x20]
+	cbnz	w0, .L1552
+	mov	w2, 0
+	mov	w1, w19
+	adrp	x0, .LC31
+	add	x0, x0, :lo12:.LC31
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, x20]
+	cbz	w0, .L1553
+.L1558:
+	mov	w20, 0
+.L1550:
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1553:
+	mov	w2, 3064
+	adrp	x1, .LANCHOR204
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR204
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L1558
+.L1552:
+	sub	w0, w0, #1
+	strh	w0, [x1, x20]
+.L1551:
+	adrp	x21, .LANCHOR130
+	mov	w1, 65535
+	ldrh	w0, [x21, #:lo12:.LANCHOR130]
+	cmp	w0, w1
+	bne	.L1555
+	strh	w19, [x21, #:lo12:.LANCHOR130]
+	b	.L1558
+.L1555:
+	cmp	w19, w0
+	beq	.L1558
+	bl	update_vpc_list
+	cmp	w0, 0
+	adrp	x1, .LANCHOR80
+	adrp	x0, .LANCHOR81
+	strh	w19, [x21, #:lo12:.LANCHOR130]
+	cset	w20, ne
+	ldr	x1, [x1, #:lo12:.LANCHOR80]
+	ldr	x0, [x0, #:lo12:.LANCHOR81]
+	sub	x0, x0, x1
+	mov	x1, -6148914691236517206
+	asr	x0, x0, 1
+	movk	x1, 0xaaab, lsl 0
+	mul	x0, x0, x1
+	adrp	x1, .LANCHOR82
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	and	x2, x0, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	cbnz	w1, .L1550
+	cmp	w19, w0, uxth
+	beq	.L1550
+	mov	w2, 3086
+	adrp	x1, .LANCHOR204
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR204
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L1550
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSlcSuperblockCheck,"ax",@progbits
+	.align	2
+	.global	FtlSlcSuperblockCheck
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+	ldrh	w1, [x0, 4]
+	cbz	w1, .L1571
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, 65535
+	ldrh	w1, [x0]
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w1, w20
+	beq	.L1559
+	mov	x19, x0
+	ldrb	w0, [x0, 6]
+	adrp	x22, .LANCHOR8
+	adrp	x21, .LANCHOR117
+	add	x0, x0, 8
+	add	x23, x22, :lo12:.LANCHOR8
+	add	x21, x21, :lo12:.LANCHOR117
+	ldrh	w0, [x19, x0, lsl 1]
+.L1563:
+	cmp	w0, w20
+	beq	.L1565
+	ldrb	w0, [x19, 8]
+	cmp	w0, 1
+	bne	.L1566
+	ldrb	w1, [x23]
+	cbnz	w1, .L1566
+	ldrh	w1, [x19, 2]
+	ldrh	w1, [x21, x1, lsl 1]
+	cmp	w1, w20
+	bne	.L1566
+	ldrh	w0, [x19, 4]
+	sub	w0, w0, #1
+	strh	w0, [x19, 4]
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1565
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+.L1574:
+	strh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+.L1559:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1565:
+	ldrb	w0, [x19, 6]
+	adrp	x1, .LANCHOR36
+	add	w0, w0, 1
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	and	w0, w0, 255
+	strb	w0, [x19, 6]
+	cmp	w1, w0
+	bne	.L1564
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L1564:
+	ldrb	w0, [x19, 6]
+	add	x0, x0, 8
+	ldrh	w0, [x19, x0, lsl 1]
+	b	.L1563
+.L1566:
+	ldrb	w1, [x22, #:lo12:.LANCHOR8]
+	cbz	w1, .L1559
+	cmp	w0, 1
+	bne	.L1559
+	adrp	x0, .LANCHOR52
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bcc	.L1559
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR82
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR51
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	b	.L1574
+.L1571:
+	ret
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.get_new_active_ppa,"ax",@progbits
+	.align	2
+	.global	get_new_active_ppa
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w1, [x0]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w1, w0
+	str	x25, [sp, 64]
+	bne	.L1576
+	mov	w2, 2986
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1576:
+	adrp	x20, .LANCHOR51
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	bne	.L1577
+	mov	w2, 2987
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1577:
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1578
+	mov	w2, 2988
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1578:
+	ldrb	w0, [x19, 6]
+	adrp	x21, .LANCHOR36
+	strb	wzr, [x19, 10]
+	adrp	x23, .LANCHOR8
+	add	x0, x0, 8
+	adrp	x24, .LANCHOR117
+	add	x23, x23, :lo12:.LANCHOR8
+	add	x24, x24, :lo12:.LANCHOR117
+	add	x25, x21, :lo12:.LANCHOR36
+	ldrh	w22, [x19, x0, lsl 1]
+.L1579:
+	mov	w2, 65535
+	cmp	w22, w2
+	beq	.L1580
+	ldrb	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	cmp	w0, 1
+	ldrh	w0, [x19, 2]
+	bne	.L1582
+	ldrb	w3, [x23]
+	cbnz	w3, .L1582
+	ldrh	w3, [x24, w0, sxtw 1]
+	cmp	w3, w2
+	bne	.L1582
+	ldrh	w0, [x19]
+	sub	w1, w1, #1
+	strh	w1, [x19, 4]
+	bl	decrement_vpc_count
+.L1580:
+	ldrb	w0, [x19, 6]
+	ldrh	w1, [x25]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x19, 6]
+	cmp	w1, w0
+	bne	.L1581
+	ldrh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L1581:
+	ldrb	w0, [x19, 6]
+	add	x0, x0, 8
+	ldrh	w22, [x19, x0, lsl 1]
+	b	.L1579
+.L1582:
+	adrp	x23, .LANCHOR8
+	adrp	x24, .LANCHOR117
+	orr	w22, w0, w22, lsl 10
+	add	x23, x23, :lo12:.LANCHOR8
+	add	x24, x24, :lo12:.LANCHOR117
+	sub	w1, w1, #1
+	strh	w1, [x19, 4]
+.L1583:
+	ldrb	w0, [x19, 6]
+	mov	w1, 65535
+	ldrh	w3, [x21, #:lo12:.LANCHOR36]
+.L1585:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w3
+	bne	.L1584
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	mov	w0, 0
+.L1584:
+	add	x2, x19, x0, sxtw 1
+	ldrh	w2, [x2, 16]
+	cmp	w2, w1
+	beq	.L1585
+	strb	w0, [x19, 6]
+	ldrb	w0, [x19, 8]
+	cmp	w0, 1
+	bne	.L1586
+	ldrb	w2, [x23]
+	ldrh	w0, [x19, 2]
+	cbnz	w2, .L1587
+	ldrh	w0, [x24, w0, sxtw 1]
+	cmp	w0, w1
+	bne	.L1586
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1586
+	sub	w0, w0, #1
+	strh	w0, [x19, 4]
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	b	.L1583
+.L1587:
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	cmp	w0, w1
+	bcc	.L1586
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR82
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	strh	w0, [x19, 2]
+	strb	wzr, [x19, 6]
+.L1586:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	bne	.L1575
+	ldrh	w0, [x19, 4]
+	cbz	w0, .L1575
+	mov	w2, 3032
+	adrp	x1, .LANCHOR205
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR205
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1575:
+	mov	w0, w22
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlVpcTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlVpcTblFlush
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	ldr	w0, [x23, #:lo12:.LANCHOR75]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	str	x23, [x29, 104]
+	cbnz	w0, .L1600
+	adrp	x25, .LANCHOR185
+	adrp	x28, .LANCHOR199
+	adrp	x27, .LANCHOR206
+	add	x21, x28, :lo12:.LANCHOR199
+	ldr	x20, [x25, #:lo12:.LANCHOR185]
+	adrp	x24, .LANCHOR79
+	ldrh	w2, [x27, #:lo12:.LANCHOR206]
+	add	x1, x27, :lo12:.LANCHOR206
+	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	mov	w3, 19539
+	stp	x0, x20, [x21, 8]
+	movk	w3, 0x4654, lsl 16
+	strh	w2, [x20, 2]
+	mov	w2, -3932
+	strh	w2, [x20]
+	adrp	x22, .LANCHOR157
+	ldr	w2, [x1, 8]
+	adrp	x26, .LANCHOR38
+	ldrh	w1, [x1, 6]
+	stp	w2, wzr, [x20, 4]
+	adrp	x2, .LANCHOR135
+	add	x19, x2, :lo12:.LANCHOR135
+	str	wzr, [x20, 12]
+	str	w3, [x2, #:lo12:.LANCHOR135]
+	mov	w2, 71
+	movk	w2, 0x5000, lsl 16
+	strh	w1, [x19, 8]
+	adrp	x1, .LANCHOR43
+	str	w2, [x19, 4]
+	adrp	x2, .LANCHOR90
+	ldrh	w1, [x1, #:lo12:.LANCHOR43]
+	strb	w1, [x19, 10]
+	add	x1, x2, :lo12:.LANCHOR90
+	ldrh	w2, [x2, #:lo12:.LANCHOR90]
+	strh	w2, [x19, 14]
+	ldrb	w3, [x1, 6]
+	ldrh	w2, [x1, 2]
+	ldrb	w1, [x1, 8]
+	strb	w1, [x19, 11]
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x19, 16]
+	adrp	x2, .LANCHOR91
+	add	x1, x2, :lo12:.LANCHOR91
+	ldrh	w2, [x2, #:lo12:.LANCHOR91]
+	ldrb	w3, [x1, 6]
+	strh	w2, [x19, 18]
+	ldrh	w2, [x1, 2]
+	ldrb	w1, [x1, 8]
+	strb	w1, [x19, 12]
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x19, 20]
+	adrp	x2, .LANCHOR92
+	add	x1, x2, :lo12:.LANCHOR92
+	ldrh	w2, [x2, #:lo12:.LANCHOR92]
+	strh	w2, [x19, 22]
+	ldrb	w3, [x1, 6]
+	ldrh	w2, [x1, 2]
+	ldrb	w1, [x1, 8]
+	strb	w1, [x19, 13]
+	adrp	x1, .LANCHOR165
+	orr	w2, w3, w2, lsl 6
+	strh	w2, [x19, 24]
+	ldr	w1, [x1, #:lo12:.LANCHOR165]
+	str	w1, [x19, 32]
+	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	str	w1, [x19, 40]
+	adrp	x1, .LANCHOR158
+	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	str	w1, [x19, 36]
+	adrp	x1, .LANCHOR56
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x21, 8]
+	mov	x1, x19
+	mov	w2, 48
+	mov	x19, x28
+	bl	ftl_memcpy
+	adrp	x1, .LANCHOR82
+	ldrh	w2, [x26, #:lo12:.LANCHOR38]
+	ldr	x0, [x21, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	lsl	w2, w2, 1
+	add	x0, x0, 48
+	bl	ftl_memcpy
+	ldrh	w0, [x26, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR0
+	ldr	x3, [x21, 8]
+	ldr	x1, [x1, #:lo12:.LANCHOR0]
+	lsr	w2, w0, 3
+	ubfiz	x0, x0, 1, 16
+	add	x0, x0, 48
+	add	w2, w2, 4
+	and	x0, x0, -4
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L1601
+	ldrh	w0, [x26, #:lo12:.LANCHOR38]
+	adrp	x1, .LANCHOR65
+	ldr	x3, [x21, 8]
+	ldrh	w2, [x1, #:lo12:.LANCHOR65]
+	lsr	w1, w0, 3
+	add	w0, w1, w0, lsl 1
+	adrp	x1, .LANCHOR128
+	add	w0, w0, 52
+	lsl	w2, w2, 2
+	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	and	x0, x0, 65532
+	add	x0, x3, x0
+	bl	ftl_memcpy
+.L1601:
+	mov	w0, 0
+	add	x28, x19, :lo12:.LANCHOR199
+	bl	FtlUpdateVaildLpn
+	add	x23, x27, :lo12:.LANCHOR206
+	mov	w21, 0
+	adrp	x27, .LANCHOR52
+	mov	w26, 65535
+	add	x0, x27, :lo12:.LANCHOR52
+	str	x0, [x29, 96]
+.L1602:
+	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	mov	w3, 1
+	str	x0, [x28, 8]
+	mov	w2, w3
+	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	ldrh	w1, [x23, 2]
+	str	x0, [x28, 16]
+	ldrh	w0, [x23]
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w3
+	str	w0, [x28, 4]
+	mov	x0, x28
+	bl	FlashProgPages
+	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	ldrh	w1, [x23, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1603
+	ldrh	w0, [x23]
+	ldrh	w26, [x23, 4]
+	strh	wzr, [x23, 2]
+	strh	w0, [x23, 4]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x23]
+	ldr	w1, [x22, #:lo12:.LANCHOR157]
+	mov	w3, 1
+	str	w1, [x23, 8]
+	add	w2, w1, 1
+	str	w2, [x22, #:lo12:.LANCHOR157]
+	ubfiz	w2, w0, 10, 16
+	str	w2, [x28, 4]
+	strh	w0, [x20, 2]
+	mov	w2, w3
+	str	w1, [x20, 4]
+	mov	x0, x28
+	mov	w1, w3
+	bl	FlashProgPages
+.L1603:
+	ldrh	w0, [x23, 2]
+	ldr	w1, [x28]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x23, 2]
+	cmn	w1, #1
+	bne	.L1604
+	cmp	w0, 1
+	bne	.L1605
+	mov	w2, 1180
+	adrp	x1, .LANCHOR207
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR207
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1605:
+	ldrh	w0, [x23, 2]
+	cmp	w0, 1
+	bne	.L1606
+	ldr	x0, [x29, 96]
+	ldrh	w0, [x0]
+	sub	w0, w0, #1
+	strh	w0, [x23, 2]
+.L1606:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	cmp	w21, 3
+	bls	.L1602
+	add	x19, x19, :lo12:.LANCHOR199
+	mov	w2, w21
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
+	ldr	w1, [x19, 4]
+	bl	printf
+	ldr	x1, [x29, 104]
+	mov	w0, 1
+	str	w0, [x1, #:lo12:.LANCHOR75]
+.L1600:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1604:
+	cmp	w0, 1
+	beq	.L1602
+	cmp	w1, 256
+	beq	.L1602
+	mov	w0, 65535
+	cmp	w26, w0
+	beq	.L1600
+	mov	w1, 1
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1600
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",@progbits
+	.align	2
+	.global	FtlSuperblockPowerLostFix
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1628
+	ldrb	w20, [x19, 8]
+	cmp	w20, 1
+	bne	.L1628
+	ldrh	w21, [x19, 4]
+.L1620:
+	adrp	x22, .LANCHOR158
+	add	x22, x22, :lo12:.LANCHOR158
+	mov	w24, -1
+	adrp	x23, .LANCHOR79
+.L1621:
+	sub	w21, w21, #1
+	cmn	w21, #1
+	beq	.L1623
+	ldrh	w0, [x19, 4]
+	cbnz	w0, .L1622
+.L1623:
+	ldrh	w0, [x19]
+	adrp	x1, .LANCHOR82
+	ldrh	w3, [x19, 4]
+	ldr	x2, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w1, [x2, x0]
+	sub	w1, w1, w3
+	strh	w1, [x2, x0]
+	adrp	x0, .LANCHOR51
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	strh	w0, [x19, 2]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1628:
+	mov	w20, 0
+	mov	w21, 12
+	b	.L1620
+.L1622:
+	mov	x0, x19
+	bl	get_new_active_ppa
+	str	w0, [x29, 76]
+	cmn	w0, #1
+	beq	.L1623
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	mov	w3, 0
+	str	x0, [x29, 80]
+	mov	w2, w20
+	adrp	x0, .LANCHOR185
+	str	w24, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR185]
+	str	x1, [x29, 88]
+	ldrh	w0, [x19]
+	strh	w0, [x1, 2]
+	ldr	w0, [x22]
+	stp	w0, w24, [x1, 4]
+	add	w0, w0, 1
+	strh	wzr, [x1]
+	cmn	w0, #1
+	str	w24, [x1, 12]
+	csel	w0, w0, wzr, ne
+	mov	w1, 1
+	str	w0, [x22]
+	add	x0, x29, 72
+	bl	FlashProgPages
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	b	.L1621
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadFactoryBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadFactoryBbt
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	stp	x29, x30, [sp, -112]!
+	adrp	x2, .LANCHOR79
+	adrp	x0, .LANCHOR199
+	add	x1, x0, :lo12:.LANCHOR199
+	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR79]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR49
+	stp	x27, x28, [sp, 80]
+	add	x28, x26, :lo12:.LANCHOR49
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR73
+	stp	x23, x24, [sp, 48]
+	add	x20, x20, :lo12:.LANCHOR73
+	str	x2, [x1, 8]
+	adrp	x2, .LANCHOR185
+	adrp	x23, .LANCHOR43
+	add	x20, x20, 12
+	ldr	x25, [x2, #:lo12:.LANCHOR185]
+	add	x23, x23, :lo12:.LANCHOR43
+	mov	w21, 0
+	mov	w27, -1
+	str	x25, [x1, 16]
+.L1635:
+	ldrh	w0, [x23]
+	cmp	w21, w0
+	bcc	.L1640
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1640:
+	ldrh	w19, [x26, #:lo12:.LANCHOR49]
+	add	x24, x22, :lo12:.LANCHOR199
+	strh	w27, [x20]
+	mov	w3, 61664
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L1636:
+	ldrh	w0, [x28]
+	sub	w1, w0, #15
+	cmp	w1, w19
+	bgt	.L1638
+	madd	w0, w0, w21, w19
+	mov	w2, 1
+	str	w3, [x29, 108]
+	mov	w1, w2
+	lsl	w0, w0, 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	ldr	w3, [x29, 108]
+	cmn	w0, #1
+	beq	.L1637
+	ldrh	w0, [x25]
+	cmp	w0, w3
+	bne	.L1637
+	strh	w19, [x20]
+.L1638:
+	add	w21, w21, 1
+	add	x20, x20, 2
+	b	.L1635
+.L1637:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1636
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",@progbits
+	.align	2
+	.global	FtlGetLastWrittenPage
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	stp	x29, x30, [sp, -192]!
+	cmp	w1, 1
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	bne	.L1646
+	adrp	x1, .LANCHOR52
+	ldrh	w19, [x1, #:lo12:.LANCHOR52]
+.L1647:
+	sub	w19, w19, #1
+	lsl	w21, w0, 10
+	sxth	w19, w19
+	add	x1, x29, 128
+	orr	w0, w19, w21
+	stp	xzr, x1, [x29, 80]
+	str	w0, [x29, 76]
+	mov	w2, w23
+	mov	w1, 1
+	add	x0, x29, 72
+	bl	FlashReadPages
+	ldr	w0, [x29, 128]
+	cmn	w0, #1
+	bne	.L1648
+	mov	w22, 0
+	mov	w24, 2
+.L1649:
+	cmp	w22, w19
+	ble	.L1652
+.L1648:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 192
+	ret
+.L1646:
+	adrp	x1, .LANCHOR51
+	ldrh	w19, [x1, #:lo12:.LANCHOR51]
+	b	.L1647
+.L1652:
+	add	w20, w22, w19
+	mov	w2, w23
+	mov	w1, 1
+	sdiv	w20, w20, w24
+	sxth	w0, w20
+	orr	w0, w0, w21
+	str	w0, [x29, 76]
+	add	x0, x29, 72
+	bl	FlashReadPages
+	ldr	w0, [x29, 128]
+	cmn	w0, #1
+	bne	.L1650
+	ldr	w0, [x29, 132]
+	cmn	w0, #1
+	bne	.L1650
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1650
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L1649
+.L1650:
+	add	w20, w20, 1
+	sxth	w22, w20
+	b	.L1649
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadBbt,"ax",@progbits
+	.align	2
+	.global	FtlLoadBbt
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR185
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR199
+	add	x20, x22, :lo12:.LANCHOR199
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR49
+	ldr	x21, [x0, #:lo12:.LANCHOR185]
+	str	x25, [sp, 64]
+	mov	w24, 61649
+	stp	xzr, x21, [x20, 8]
+	bl	FtlBbtMemInit
+	ldrh	w19, [x23, #:lo12:.LANCHOR49]
+	add	x23, x23, :lo12:.LANCHOR49
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L1658:
+	ldrh	w0, [x23]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L1661
+	lsl	w0, w19, 10
+	mov	w2, 1
+	str	w0, [x20, 4]
+	mov	w1, w2
+	mov	x0, x20
+	bl	FlashReadPages
+	ldr	w0, [x20]
+	cmn	w0, #1
+	bne	.L1659
+	ldr	w0, [x20, 4]
+	mov	w2, 1
+	mov	w1, w2
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+	mov	x0, x20
+	bl	FlashReadPages
+.L1659:
+	ldr	w0, [x20]
+	cmn	w0, #1
+	beq	.L1660
+	ldrh	w0, [x21]
+	cmp	w0, w24
+	bne	.L1660
+	adrp	x1, .LANCHOR73
+	add	x0, x1, :lo12:.LANCHOR73
+	strh	w19, [x1, #:lo12:.LANCHOR73]
+	ldr	w1, [x21, 4]
+	str	w1, [x0, 8]
+	ldrh	w1, [x21, 8]
+	strh	w1, [x0, 4]
+.L1661:
+	adrp	x19, .LANCHOR73
+	mov	w0, 65535
+	add	x20, x19, :lo12:.LANCHOR73
+	ldrh	w1, [x19, #:lo12:.LANCHOR73]
+	cmp	w1, w0
+	beq	.L1675
+	ldrh	w1, [x20, 4]
+	cmp	w1, w0
+	beq	.L1665
+	add	x0, x22, :lo12:.LANCHOR199
+	lsl	w1, w1, 10
+	mov	w2, 1
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldr	w0, [x22, #:lo12:.LANCHOR199]
+	cmn	w0, #1
+	beq	.L1665
+	ldrh	w1, [x21]
+	mov	w0, 61649
+	cmp	w1, w0
+	bne	.L1665
+	ldr	w1, [x20, 8]
+	ldr	w0, [x21, 4]
+	cmp	w0, w1
+	bls	.L1665
+	ldrh	w1, [x20, 4]
+	str	w0, [x20, 8]
+	ldrh	w0, [x21, 8]
+	strh	w1, [x19, #:lo12:.LANCHOR73]
+	strh	w0, [x20, 4]
+.L1665:
+	ldrh	w0, [x19, #:lo12:.LANCHOR73]
+	add	x23, x19, :lo12:.LANCHOR73
+	mov	w1, 1
+	adrp	x24, .LANCHOR79
+	mov	w25, 61649
+	bl	FtlGetLastWrittenPage
+	sxth	w20, w0
+	add	w0, w0, 1
+	strh	w0, [x23, 2]
+	add	x23, x22, :lo12:.LANCHOR199
+.L1667:
+	tbz	w20, #31, .L1670
+	mov	w2, 335
+	adrp	x1, .LANCHOR208
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR208
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1669:
+	add	x0, x19, :lo12:.LANCHOR73
+	ldrh	w1, [x21, 10]
+	strh	w1, [x0, 6]
+	mov	w1, 65535
+	ldrh	w0, [x21, 12]
+	cmp	w0, w1
+	beq	.L1672
+	adrp	x1, .LANCHOR35
+	ldr	w2, [x1, #:lo12:.LANCHOR35]
+	cmp	w0, w2
+	beq	.L1672
+	adrp	x1, .LANCHOR39
+	ldrh	w1, [x1, #:lo12:.LANCHOR39]
+	lsr	w1, w1, 2
+	cmp	w2, w1
+	bcs	.L1672
+	cmp	w0, w1
+	bcs	.L1672
+	bl	FtlSysBlkNumInit
+.L1672:
+	add	x19, x19, :lo12:.LANCHOR73
+	adrp	x21, .LANCHOR43
+	adrp	x23, .LANCHOR120
+	add	x19, x19, 32
+	add	x21, x21, :lo12:.LANCHOR43
+	add	x23, x23, :lo12:.LANCHOR120
+	add	x22, x22, :lo12:.LANCHOR199
+	mov	w20, 0
+.L1673:
+	ldrh	w0, [x21]
+	cmp	w20, w0
+	bcc	.L1674
+	mov	w0, 0
+.L1657:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1660:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L1658
+.L1670:
+	ldrh	w0, [x19, #:lo12:.LANCHOR73]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w20, w0, lsl 10
+	str	w0, [x23, 4]
+	ldr	x0, [x24, #:lo12:.LANCHOR79]
+	str	x0, [x23, 8]
+	mov	x0, x23
+	bl	FlashReadPages
+	ldr	w0, [x23]
+	cmn	w0, #1
+	beq	.L1668
+	ldrh	w0, [x21]
+	cmp	w0, w25
+	beq	.L1669
+.L1668:
+	sub	w20, w20, #1
+	sxth	w20, w20
+	b	.L1667
+.L1674:
+	ldrh	w2, [x23]
+	ldr	x0, [x22, 8]
+	mul	w1, w2, w20
+	lsl	w2, w2, 2
+	add	w20, w20, 1
+	add	x1, x0, x1, lsl 2
+	ldr	x0, [x19], 8
+	bl	ftl_memcpy
+	b	.L1673
+.L1675:
+	mov	w0, -1
+	b	.L1657
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.ftl_map_blk_gc,"ax",@progbits
+	.align	2
+	.global	ftl_map_blk_gc
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR52
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldr	x20, [x0, 16]
+	ldr	x22, [x0, 40]
+	bl	ftl_free_no_use_map_blk
+	ldrh	w4, [x19, 10]
+	ldrh	w2, [x19, 8]
+	sub	w1, w4, #4
+	cmp	w2, w1
+	ldrh	w1, [x19, 60]
+	bge	.L1688
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1690
+	ldrh	w3, [x19, 2]
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	cmp	w3, w2
+	bcc	.L1691
+.L1688:
+	mov	w2, 65535
+	and	w0, w0, 65535
+	cmp	w1, w2
+	beq	.L1692
+	ldrh	w3, [x19, 2]
+	ldrh	w2, [x21, #:lo12:.LANCHOR52]
+	cmp	w2, w3
+	bls	.L1693
+.L1692:
+	ubfiz	x0, x0, 1, 32
+	ldrh	w23, [x20, x0]
+	cbz	w23, .L1690
+	ldr	w1, [x19, 52]
+	cbnz	w1, .L1690
+	mov	w1, 1
+	str	w1, [x19, 52]
+	strh	wzr, [x20, x0]
+	ldrh	w0, [x19, 8]
+	ldrh	w1, [x19, 2]
+	sub	w0, w0, #1
+	strh	w0, [x19, 8]
+	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bcc	.L1698
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L1698:
+	adrp	x26, .LANCHOR199
+	adrp	x25, .LC34
+	add	x24, x26, :lo12:.LANCHOR199
+	add	x25, x25, :lo12:.LC34
+	mov	w20, 0
+.L1699:
+	ldrh	w0, [x19, 6]
+	cmp	w0, w20
+	bhi	.L1703
+	mov	w1, 1
+	mov	w0, w23
+	bl	FtlFreeSysBlkQueueIn
+	str	wzr, [x19, 52]
+.L1690:
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x21, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bcc	.L1691
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L1691:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1696:
+	ldrh	w6, [x20, x2, lsl 1]
+	add	x5, x2, 1
+	cmp	w6, w1
+	beq	.L1694
+	mov	x2, x5
+.L1695:
+	and	w23, w2, 65535
+	cmp	w23, w4
+	bcc	.L1696
+	mov	w23, w0
+.L1694:
+	and	x2, x2, 65535
+	adrp	x0, .LC33
+	add	x0, x0, :lo12:.LC33
+	ldrh	w2, [x20, x2, lsl 1]
+	bl	printf
+	mov	w0, -1
+	strh	w0, [x19, 60]
+	mov	w0, w23
+	b	.L1692
+.L1693:
+	mov	x2, 0
+	b	.L1695
+.L1703:
+	ubfiz	x27, x20, 2, 16
+	ldr	w1, [x22, x27]
+	cmp	w23, w1, lsr 10
+	bne	.L1700
+	adrp	x2, .LANCHOR181
+	add	x0, x26, :lo12:.LANCHOR199
+	ldr	x2, [x2, #:lo12:.LANCHOR181]
+	str	x2, [x0, 8]
+	adrp	x2, .LANCHOR185
+	str	w1, [x0, 4]
+	ldr	x28, [x2, #:lo12:.LANCHOR185]
+	mov	w2, 1
+	str	x28, [x0, 16]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x28, 8]
+	cmp	w0, w20
+	beq	.L1701
+	mov	w2, 638
+	adrp	x1, .LANCHOR209
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR209
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1701:
+	ldr	w0, [x24]
+	cmn	w0, #1
+	bne	.L1702
+	str	wzr, [x22, x27]
+	mov	x0, x25
+	ldrh	w2, [x28, 8]
+	ldr	w1, [x24, 4]
+	bl	printf
+	adrp	x0, .LANCHOR75
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR75]
+.L1700:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1699
+.L1702:
+	ldr	x2, [x24, 8]
+	mov	w1, w20
+	mov	x0, x19
+	bl	FtlMapWritePage
+	b	.L1700
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",@progbits
+	.align	2
+	.global	Ftl_write_map_blk_to_last_page
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	adrp	x1, .LANCHOR75
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	cbnz	w1, .L1719
+	stp	x29, x30, [sp, -64]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	ldr	x20, [x19, 16]
+	str	x23, [sp, 48]
+	cmp	w0, w1
+	bne	.L1710
+	ldrh	w0, [x19, 8]
+	cbz	w0, .L1711
+	mov	w2, 670
+	adrp	x1, .LANCHOR210
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR210
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1711:
+	ldrh	w0, [x19, 8]
+	add	w0, w0, 1
+	strh	w0, [x19, 8]
+	bl	FtlFreeSysBlkQueueOut
+	strh	w0, [x20]
+	ldr	w0, [x19, 48]
+	strh	wzr, [x19, 2]
+	add	w0, w0, 1
+	strh	wzr, [x19]
+	str	w0, [x19, 48]
+.L1709:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1710:
+	ubfiz	x0, x0, 1, 16
+	adrp	x1, .LANCHOR185
+	adrp	x23, .LANCHOR79
+	ldr	x22, [x19, 40]
+	ldr	x1, [x1, #:lo12:.LANCHOR185]
+	ldrh	w21, [x20, x0]
+	adrp	x20, .LANCHOR199
+	ldrh	w0, [x19, 2]
+	add	x2, x20, :lo12:.LANCHOR199
+	orr	w0, w0, w21, lsl 10
+	str	w0, [x2, 4]
+	ldr	x0, [x23, #:lo12:.LANCHOR79]
+	str	x1, [x2, 16]
+	str	x0, [x2, 8]
+	ldr	w2, [x19, 48]
+	str	w2, [x1, 4]
+	mov	w2, -1291
+	strh	w2, [x1, 8]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1]
+	strh	w21, [x1, 2]
+	adrp	x1, .LANCHOR52
+	ldrh	w2, [x1, #:lo12:.LANCHOR52]
+	mov	w1, 255
+	lsl	w2, w2, 3
+	bl	ftl_memset
+	ldrh	w4, [x19, 6]
+	mov	x1, 0
+	ldr	x3, [x23, #:lo12:.LANCHOR79]
+	mov	w2, 0
+.L1712:
+	cmp	w4, w1, uxth
+	bhi	.L1714
+	mov	w2, 1
+	mov	w3, 0
+	mov	w1, w2
+	add	x0, x20, :lo12:.LANCHOR199
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	b	.L1709
+.L1714:
+	ldr	w0, [x22, x1, lsl 2]
+	cmp	w21, w0, lsr 10
+	bne	.L1713
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	ubfiz	x0, x2, 1, 16
+	str	w1, [x3, x0, lsl 2]
+	add	x0, x0, 1
+	ldr	w5, [x22, x1, lsl 2]
+	str	w5, [x3, x0, lsl 2]
+.L1713:
+	add	x1, x1, 1
+	b	.L1712
+.L1719:
+	mov	w0, 0
+	ret
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",@progbits
+	.align	2
+	.global	FtlMapWritePage
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR75
+	stp	x19, x20, [sp, 16]
+	ldr	w3, [x24, #:lo12:.LANCHOR75]
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w3, .L1737
+	adrp	x23, .LANCHOR163
+	adrp	x25, .LANCHOR211
+	mov	w22, w1
+	add	x23, x23, :lo12:.LANCHOR163
+	add	x25, x25, :lo12:.LANCHOR211
+	mov	x19, x0
+	adrp	x27, .LANCHOR52
+	mov	w21, 0
+	add	x0, x27, :lo12:.LANCHOR52
+	stp	x2, x0, [x29, 96]
+.L1724:
+	ldr	w0, [x23]
+	ldrh	w1, [x19, 2]
+	add	w0, w0, 1
+	str	w0, [x23]
+	ldrh	w0, [x27, #:lo12:.LANCHOR52]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bge	.L1725
+	ldrh	w1, [x19]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L1726
+.L1725:
+	mov	x0, x19
+	bl	Ftl_write_map_blk_to_last_page
+.L1726:
+	ldrh	w1, [x19]
+	ldr	x0, [x19, 16]
+	ldrh	w0, [x0, x1, lsl 1]
+	cbnz	w0, .L1727
+	mov	w2, 731
+	mov	x1, x25
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1727:
+	ldrh	w1, [x19]
+	ldrh	w0, [x19, 10]
+	cmp	w1, w0
+	bcc	.L1728
+	mov	w2, 732
+	mov	x1, x25
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1728:
+	ldrh	w1, [x19]
+	adrp	x20, .LANCHOR199
+	ldr	x0, [x19, 16]
+	add	x28, x20, :lo12:.LANCHOR199
+	mov	w2, 16
+	ldrh	w26, [x0, x1, lsl 1]
+	mov	w1, 0
+	ldrh	w0, [x19, 2]
+	orr	w0, w0, w26, lsl 10
+	str	w0, [x28, 4]
+	ldr	x0, [x29, 96]
+	str	x0, [x28, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	str	x0, [x28, 16]
+	bl	ftl_memset
+	ldr	x0, [x28, 16]
+	mov	w3, 1
+	ldr	w1, [x19, 48]
+	mov	w2, w3
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	strh	w1, [x0]
+	mov	w1, w3
+	strh	w22, [x0, 8]
+	strh	w26, [x0, 2]
+	mov	x0, x28
+	bl	FlashProgPages
+	ldrh	w0, [x19, 2]
+	ldr	w1, [x20, #:lo12:.LANCHOR199]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 2]
+	cmn	w1, #1
+	bne	.L1729
+	ldr	w1, [x28, 4]
+	adrp	x0, .LC35
+	add	x0, x0, :lo12:.LC35
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	bl	printf
+	ldrh	w0, [x19, 2]
+	cmp	w0, 2
+	bhi	.L1730
+	ldr	x0, [x29, 104]
+	ldrh	w0, [x0]
+	sub	w0, w0, #1
+	strh	w0, [x19, 2]
+.L1730:
+	cmp	w21, 3
+	bls	.L1724
+	add	x20, x20, :lo12:.LANCHOR199
+	mov	w2, w21
+	adrp	x0, .LC36
+	add	x0, x0, :lo12:.LC36
+	ldr	w1, [x20, 4]
+	bl	printf
+	mov	w0, 1
+	str	w0, [x24, #:lo12:.LANCHOR75]
+.L1737:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1729:
+	cbz	w1, .L1732
+	strh	w26, [x19, 60]
+	cmp	w0, 1
+	beq	.L1724
+	cmp	w1, 256
+.L1745:
+	beq	.L1724
+	add	x20, x20, :lo12:.LANCHOR199
+	ldr	x0, [x19, 40]
+	ldr	w1, [x20, 4]
+	str	w1, [x0, w22, uxtw 2]
+	b	.L1737
+.L1732:
+	cmp	w0, 1
+	b	.L1745
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.flush_l2p_region,"ax",@progbits
+	.align	2
+	.global	flush_l2p_region
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR95
+	ubfiz	x19, x0, 4, 16
+	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	add	x1, x0, x19
+	ldr	x2, [x1, 8]
+	ldrh	w1, [x0, x19]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapWritePage
+	ldr	x0, [x20, #:lo12:.LANCHOR95]
+	add	x0, x0, x19
+	ldp	x19, x20, [sp, 16]
+	ldr	w1, [x0, 4]
+	and	w1, w1, 2147483647
+	str	w1, [x0, 4]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",@progbits
+	.align	2
+	.global	l2p_flush
+	.type	l2p_flush, %function
+l2p_flush:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR66
+	add	x20, x20, :lo12:.LANCHOR66
+	str	x21, [sp, 32]
+	mov	w19, 0
+	adrp	x21, .LANCHOR95
+.L1749:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L1751
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1751:
+	ldr	x1, [x21, #:lo12:.LANCHOR95]
+	ubfiz	x0, x19, 4, 16
+	add	x0, x1, x0
+	ldr	w0, [x0, 4]
+	tbz	w0, #31, .L1750
+	mov	w0, w19
+	bl	flush_l2p_region
+.L1750:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1749
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 65535
+	adrp	x0, .LANCHOR65
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	and	x19, x1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR65]
+	cmp	w0, w20
+	bcs	.L1754
+	mov	w2, 503
+	adrp	x1, .LANCHOR212
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR212
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1754:
+	adrp	x1, .LANCHOR128
+	ubfiz	x0, x20, 2, 16
+	adrp	x22, .LANCHOR95
+	ldr	x1, [x1, #:lo12:.LANCHOR128]
+	ldr	w21, [x1, x0]
+	cbnz	w21, .L1755
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	lsl	x19, x19, 4
+	adrp	x1, .LANCHOR56
+	add	x0, x0, x19
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 255
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	add	x1, x0, x19
+	strh	w20, [x0, x19]
+	str	wzr, [x1, 4]
+.L1756:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1755:
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	lsl	x19, x19, 4
+	adrp	x24, .LANCHOR199
+	add	x23, x24, :lo12:.LANCHOR199
+	add	x0, x0, x19
+	mov	w2, 1
+	mov	w1, w2
+	str	w21, [x23, 4]
+	ldr	x0, [x0, 8]
+	str	x0, [x23, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	str	x0, [x23, 16]
+	mov	x0, x23
+	bl	FlashReadPages
+	ldr	x23, [x23, 16]
+	ldr	w0, [x24, #:lo12:.LANCHOR199]
+	cmp	w0, 256
+	bne	.L1757
+	mov	w2, w21
+	mov	w1, w20
+	adrp	x0, .LC37
+	add	x0, x0, :lo12:.LC37
+	bl	printf
+	lsr	w21, w21, 10
+	ldr	x1, [x22, #:lo12:.LANCHOR95]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	add	x1, x1, x19
+	strh	w21, [x0, 60]
+	ldr	x2, [x1, 8]
+	mov	w1, w20
+	bl	FtlMapWritePage
+.L1757:
+	ldrh	w0, [x23, 8]
+	cmp	w0, w20
+	beq	.L1758
+	mov	w2, 529
+	adrp	x1, .LANCHOR212
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR212
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1758:
+	ldr	x0, [x22, #:lo12:.LANCHOR95]
+	add	x1, x0, x19
+	str	wzr, [x1, 4]
+	strh	w20, [x0, x19]
+	b	.L1756
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.log2phys,"ax",@progbits
+	.align	2
+	.global	log2phys
+	.type	log2phys, %function
+log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x1
+	adrp	x1, .LANCHOR55
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	w24, w2
+	ldrh	w19, [x1, #:lo12:.LANCHOR55]
+	str	x25, [sp, 64]
+	add	w1, w19, 7
+	mov	x19, 1
+	lsr	w22, w0, w1
+	and	w22, w22, 65535
+	lsl	x19, x19, x1
+	adrp	x1, .LANCHOR71
+	sub	w19, w19, #1
+	ldr	w1, [x1, #:lo12:.LANCHOR71]
+	and	w19, w19, w0
+	and	x19, x19, 65535
+	cmp	w0, w1
+	bcc	.L1761
+	mov	w2, 851
+	adrp	x1, .LANCHOR213
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR213
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1761:
+	adrp	x21, .LANCHOR95
+	adrp	x0, .LANCHOR66
+	ldr	x2, [x21, #:lo12:.LANCHOR95]
+	ldrh	w1, [x0, #:lo12:.LANCHOR66]
+	mov	x0, 0
+.L1762:
+	and	x20, x0, 65535
+	cmp	w20, w1
+	bcc	.L1767
+	bl	select_l2p_ram_region
+	and	x20, x0, 65535
+	ldr	x2, [x21, #:lo12:.LANCHOR95]
+	ubfiz	x1, x20, 4, 16
+	mov	w25, w0
+	add	x3, x2, x1
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L1768
+	ldr	w1, [x3, 4]
+	tbz	w1, #31, .L1768
+	bl	flush_l2p_region
+.L1768:
+	mov	w1, w25
+	mov	w0, w22
+	bl	load_l2p_region
+	b	.L1763
+.L1767:
+	add	x0, x0, 1
+	add	x3, x2, x0, lsl 4
+	ldrh	w3, [x3, -16]
+	cmp	w3, w22
+	bne	.L1762
+.L1763:
+	ldr	x0, [x21, #:lo12:.LANCHOR95]
+	add	x0, x0, x20, lsl 4
+	cbnz	w24, .L1764
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x19, lsl 2]
+	str	w0, [x23]
+.L1765:
+	ldr	x0, [x21, #:lo12:.LANCHOR95]
+	add	x20, x0, x20, lsl 4
+	ldr	w0, [x20, 4]
+	cmn	w0, #1
+	beq	.L1770
+	add	w0, w0, 1
+	str	w0, [x20, 4]
+.L1770:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1764:
+	ldr	x1, [x0, 8]
+	ldr	w2, [x23]
+	str	w2, [x1, x19, lsl 2]
+	ldr	w1, [x0, 4]
+	orr	w1, w1, -2147483648
+	str	w1, [x0, 4]
+	adrp	x0, .LANCHOR96
+	strh	w22, [x0, #:lo12:.LANCHOR96]
+	b	.L1765
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",@progbits
+	.align	2
+	.global	FtlReUsePrevPpa
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR82
+	stp	x19, x20, [sp, 16]
+	mov	w21, w0
+	str	w1, [x29, 76]
+	lsr	w0, w1, 10
+	str	x23, [sp, 48]
+	bl	P2V_block_in_plane
+	ldr	x2, [x22, #:lo12:.LANCHOR82]
+	and	w3, w0, 65535
+	ubfiz	x20, x3, 1, 16
+	ldrh	w1, [x2, x20]
+	cbnz	w1, .L1776
+	adrp	x0, .LANCHOR86
+	ldr	x19, [x0, #:lo12:.LANCHOR86]
+	cbz	x19, .L1777
+	adrp	x2, .LANCHOR80
+	mov	x5, -6148914691236517206
+	movk	x5, 0xaaab, lsl 0
+	adrp	x23, .LANCHOR87
+	ldr	x2, [x2, #:lo12:.LANCHOR80]
+	mov	w6, 65535
+	ldrh	w4, [x23, #:lo12:.LANCHOR87]
+	sub	x19, x19, x2
+	asr	x19, x19, 1
+	mul	x19, x19, x5
+	mov	w5, 6
+	and	w19, w19, 65535
+.L1778:
+	cmp	w1, w4
+	beq	.L1777
+	cmp	w19, w3
+	bne	.L1779
+	mov	w1, w19
+	add	x0, x0, :lo12:.LANCHOR86
+	bl	List_remove_node
+	ldrh	w0, [x23, #:lo12:.LANCHOR87]
+	cbnz	w0, .L1780
+	mov	w2, 1825
+	adrp	x1, .LANCHOR214
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR214
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1780:
+	ldrh	w0, [x23, #:lo12:.LANCHOR87]
+	sub	w0, w0, #1
+	strh	w0, [x23, #:lo12:.LANCHOR87]
+	mov	w0, w19
+	bl	INSERT_DATA_LIST
+	ldr	x1, [x22, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x20]
+	add	w0, w0, 1
+	strh	w0, [x1, x20]
+.L1777:
+	add	x1, x29, 76
+	mov	w2, 1
+	mov	w0, w21
+	bl	log2phys
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1779:
+	umull	x19, w19, w5
+	ldrh	w19, [x2, x19]
+	cmp	w19, w6
+	beq	.L1777
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L1778
+.L1776:
+	add	w1, w1, 1
+	strh	w1, [x2, x20]
+	b	.L1777
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlVendorPartWrite,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartWrite
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	stp	x21, x22, [sp, 32]
+	add	w1, w0, w1
+	mov	w22, w0
+	adrp	x0, .LANCHOR48
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1794
+	adrp	x0, .LANCHOR55
+	adrp	x26, .LANCHOR54
+	adrp	x27, .LANCHOR56
+	mov	x25, x2
+	ldrh	w21, [x0, #:lo12:.LANCHOR55]
+	add	x26, x26, :lo12:.LANCHOR54
+	add	x27, x27, :lo12:.LANCHOR56
+	mov	w24, 0
+	lsr	w21, w22, w21
+.L1788:
+	cbnz	w20, .L1793
+.L1786:
+	mov	w0, w24
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1793:
+	ldrh	w1, [x26]
+	adrp	x0, .LANCHOR191
+	adrp	x28, .LANCHOR182
+	ldr	x0, [x0, #:lo12:.LANCHOR191]
+	udiv	w23, w22, w1
+	ldr	w2, [x0, w21, uxtw 2]
+	and	w0, w20, 65535
+	msub	w23, w23, w1, w22
+	sub	w19, w1, w23
+	and	w19, w19, 65535
+	cmp	w20, w19
+	csel	w19, w0, w19, cc
+	cbz	w2, .L1790
+	cmp	w19, w1
+	beq	.L1790
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	str	w2, [x29, 124]
+	mov	w2, 1
+	stp	x0, xzr, [x29, 128]
+	mov	w1, w2
+	add	x0, x29, 120
+	bl	FlashReadPages
+.L1791:
+	lsl	w3, w19, 9
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	lsl	w23, w23, 7
+	mov	w2, w3
+	mov	x1, x25
+	str	w3, [x29, 108]
+	add	x0, x0, x23, sxtw 2
+	bl	ftl_memcpy
+	ldr	x2, [x28, #:lo12:.LANCHOR182]
+	mov	w1, w21
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	sub	w20, w20, w19
+	add	w22, w22, w19
+	add	w21, w21, 1
+	bl	FtlMapWritePage
+	cmn	w0, #1
+	ldr	w3, [x29, 108]
+	csinv	w24, w24, wzr, ne
+	add	x25, x25, x3, sxtw
+	b	.L1788
+.L1790:
+	ldrh	w2, [x27]
+	mov	w1, 0
+	ldr	x0, [x28, #:lo12:.LANCHOR182]
+	bl	ftl_memset
+	b	.L1791
+.L1794:
+	mov	w24, -1
+	b	.L1786
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_save_ext_data
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	adrp	x0, .LANCHOR136
+	add	x2, x0, :lo12:.LANCHOR136
+	ldr	w1, [x0, #:lo12:.LANCHOR136]
+	mov	w0, 19539
+	movk	w0, 0x4654, lsl 16
+	cmp	w1, w0
+	bne	.L1799
+	mov	w0, 71
+	mov	w1, 1
+	movk	w0, 0x5000, lsl 16
+	str	w0, [x2, 4]
+	adrp	x0, .LANCHOR216
+	ldr	w0, [x0, #:lo12:.LANCHOR216]
+	str	w0, [x2, 88]
+	adrp	x0, .LANCHOR217
+	ldr	w0, [x0, #:lo12:.LANCHOR217]
+	str	w0, [x2, 92]
+	adrp	x0, .LANCHOR159
+	ldr	w0, [x0, #:lo12:.LANCHOR159]
+	str	w0, [x2, 8]
+	adrp	x0, .LANCHOR160
+	ldr	w0, [x0, #:lo12:.LANCHOR160]
+	str	w0, [x2, 12]
+	adrp	x0, .LANCHOR164
+	ldr	w0, [x0, #:lo12:.LANCHOR164]
+	str	w0, [x2, 16]
+	adrp	x0, .LANCHOR163
+	ldr	w0, [x0, #:lo12:.LANCHOR163]
+	str	w0, [x2, 20]
+	adrp	x0, .LANCHOR166
+	ldr	w0, [x0, #:lo12:.LANCHOR166]
+	str	w0, [x2, 28]
+	adrp	x0, .LANCHOR78
+	ldr	w0, [x0, #:lo12:.LANCHOR78]
+	str	w0, [x2, 32]
+	adrp	x0, .LANCHOR161
+	ldr	w0, [x0, #:lo12:.LANCHOR161]
+	str	w0, [x2, 36]
+	adrp	x0, .LANCHOR162
+	ldr	w0, [x0, #:lo12:.LANCHOR162]
+	str	w0, [x2, 40]
+	adrp	x0, .LANCHOR167
+	ldr	w0, [x0, #:lo12:.LANCHOR167]
+	str	w0, [x2, 44]
+	adrp	x0, .LANCHOR168
+	ldr	w0, [x0, #:lo12:.LANCHOR168]
+	str	w0, [x2, 48]
+	adrp	x0, .LANCHOR156
+	ldr	w0, [x0, #:lo12:.LANCHOR156]
+	str	w0, [x2, 60]
+	adrp	x0, .LANCHOR155
+	ldr	w0, [x0, #:lo12:.LANCHOR155]
+	str	w0, [x2, 64]
+	mov	w0, 0
+	b	FtlVendorPartWrite
+.L1799:
+	ret
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",@progbits
+	.align	2
+	.global	FtlEctTblFlush
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	adrp	x1, .LANCHOR101
+	ldr	w1, [x1, #:lo12:.LANCHOR101]
+	cbz	w1, .L1806
+	adrp	x1, .LANCHOR168
+	mov	w2, 4
+	ldr	w1, [x1, #:lo12:.LANCHOR168]
+	cmp	w1, 29
+	mov	w1, 32
+	csel	w1, w1, w2, hi
+.L1802:
+	adrp	x3, .LANCHOR218
+	ldrh	w2, [x3, #:lo12:.LANCHOR218]
+	cmp	w2, 31
+	bhi	.L1803
+	add	w2, w2, 1
+	mov	w1, 1
+	strh	w2, [x3, #:lo12:.LANCHOR218]
+.L1803:
+	adrp	x2, .LANCHOR188
+	cbnz	w0, .L1804
+	ldr	x0, [x2, #:lo12:.LANCHOR188]
+	ldr	w3, [x0, 20]
+	ldr	w0, [x0, 16]
+	add	w1, w1, w3
+	cmp	w0, w1
+	bcc	.L1809
+.L1804:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR188]
+	ldr	w0, [x2, 16]
+	str	w0, [x2, 20]
+	mov	w0, 17221
+	str	wzr, [x2, 4]
+	movk	w0, 0x4254, lsl 16
+	str	w0, [x2]
+	adrp	x0, .LANCHOR187
+	ldrh	w1, [x0, #:lo12:.LANCHOR187]
+	lsl	w0, w1, 9
+	str	w0, [x2, 12]
+	ldr	w0, [x2, 8]
+	add	w0, w0, 1
+	str	w0, [x2, 8]
+	mov	w0, 64
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1806:
+	mov	w1, 32
+	b	.L1802
+.L1809:
+	mov	w0, 0
+	ret
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.allocate_new_data_superblock,"ax",@progbits
+	.align	2
+	.global	allocate_new_data_superblock
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w20, [x0]
+	adrp	x0, .LANCHOR38
+	str	x21, [sp, 32]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w0, w20
+	bcs	.L1812
+	mov	w2, 2943
+	adrp	x1, .LANCHOR219
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR219
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1812:
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L1813
+	mov	w0, 65535
+	cmp	w20, w0
+	beq	.L1814
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x20, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L1815
+	mov	w0, w20
+	bl	INSERT_DATA_LIST
+.L1814:
+	strb	wzr, [x19, 8]
+	adrp	x0, .LANCHOR91
+	add	x0, x0, :lo12:.LANCHOR91
+	cmp	x19, x0
+	beq	.L1816
+	adrp	x0, .LANCHOR42
+	ldrh	w1, [x0, #:lo12:.LANCHOR42]
+	cmp	w1, 1
+	beq	.L1816
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L1817
+.L1816:
+	mov	w0, 1
+	strb	w0, [x19, 8]
+.L1818:
+	adrp	x1, .LANCHOR130
+	mov	w2, 65535
+	mov	x21, x1
+	ldrh	w0, [x1, #:lo12:.LANCHOR130]
+	cmp	w0, w2
+	beq	.L1823
+	cmp	w20, w0
+	bne	.L1824
+	adrp	x2, .LANCHOR82
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L1825
+.L1824:
+	bl	update_vpc_list
+.L1825:
+	mov	w0, -1
+	strh	w0, [x21, #:lo12:.LANCHOR130]
+.L1823:
+	mov	x0, x19
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	mov	w0, 0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1813:
+	mov	w0, 0
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1815:
+	mov	w0, w20
+	bl	INSERT_FREE_LIST
+	b	.L1814
+.L1817:
+	adrp	x0, .LANCHOR90
+	add	x2, x0, :lo12:.LANCHOR90
+	cmp	x19, x2
+	bne	.L1818
+	cmp	w1, 3
+	beq	.L1820
+	adrp	x1, .LANCHOR156
+	ldr	w1, [x1, #:lo12:.LANCHOR156]
+	cmp	w1, 1
+	bne	.L1821
+.L1820:
+	add	x1, x0, :lo12:.LANCHOR90
+	mov	w2, 1
+	strb	w2, [x1, 8]
+.L1821:
+	adrp	x1, .LANCHOR101
+	ldr	w1, [x1, #:lo12:.LANCHOR101]
+	cbz	w1, .L1818
+	adrp	x1, .LANCHOR168
+	ldr	w1, [x1, #:lo12:.LANCHOR168]
+	cmp	w1, 29
+	bhi	.L1818
+	add	x0, x0, :lo12:.LANCHOR90
+	mov	w1, 1
+	strb	w1, [x0, 8]
+	b	.L1818
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",@progbits
+	.align	2
+	.global	FtlProgPages
+	.type	FtlProgPages, %function
+FtlProgPages:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	adrp	x0, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	mov	x20, x3
+	str	x25, [sp, 64]
+	cbz	w0, .L1853
+	ldrb	w0, [x3, 8]
+	cmp	w0, 1
+	cset	w22, eq
+.L1840:
+	ldrb	w3, [x20, 9]
+	mov	w1, w21
+	mov	w2, w22
+	mov	x0, x19
+	adrp	x24, .LANCHOR51
+	adrp	x23, .LANCHOR136
+	add	x24, x24, :lo12:.LANCHOR51
+	add	x23, x23, :lo12:.LANCHOR136
+	bl	FlashProgPages
+	mov	w0, 56
+	umaddl	x21, w21, w0, x19
+.L1841:
+	cmp	x21, x19
+	beq	.L1850
+	adrp	x25, .LANCHOR82
+	b	.L1851
+.L1853:
+	mov	w22, 0
+	b	.L1840
+.L1844:
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	ldrh	w2, [x20]
+	cmp	w2, w0, uxth
+	bne	.L1842
+	ldr	x1, [x25, #:lo12:.LANCHOR82]
+	ubfiz	x2, x2, 1, 16
+	ldrh	w3, [x20, 4]
+	ldrh	w0, [x1, x2]
+	sub	w0, w0, w3
+	strh	w0, [x1, x2]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x24]
+	strh	w0, [x20, 2]
+	strh	wzr, [x20, 4]
+.L1842:
+	ldrh	w0, [x20, 4]
+	cbnz	w0, .L1843
+	mov	x0, x20
+	bl	allocate_new_data_superblock
+.L1843:
+	ldr	w0, [x23, 96]
+	add	w0, w0, 1
+	str	w0, [x23, 96]
+	ldr	w0, [x19, 4]
+	lsr	w0, w0, 10
+	bl	FtlGcMarkBadPhyBlk
+	mov	x0, x20
+	bl	get_new_active_ppa
+	str	w0, [x19, 4]
+	mov	w2, w22
+	str	w0, [x29, 92]
+	mov	w1, 1
+	ldrb	w3, [x20, 9]
+	mov	x0, x19
+	bl	FlashProgPages
+.L1851:
+	ldr	w0, [x19]
+	cmn	w0, #1
+	beq	.L1844
+	adrp	x0, .LANCHOR36
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L1845
+	mov	w2, 1552
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1845:
+	ldr	w0, [x19, 4]
+	cbnz	w22, .L1846
+.L1858:
+	str	w0, [x29, 92]
+	add	x1, x29, 92
+	ldr	w0, [x19, 24]
+	mov	w2, 1
+	bl	log2phys
+	ldr	x0, [x19, 16]
+	ldr	w3, [x0, 12]
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w1, w0, 65535
+	mov	w25, w1
+	cmn	w3, #1
+	beq	.L1848
+	adrp	x2, .LANCHOR82
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldrh	w0, [x2, x0]
+	cbnz	w0, .L1849
+	adrp	x0, .LC38
+	mov	w2, 0
+	add	x0, x0, :lo12:.LC38
+	bl	printf
+.L1849:
+	mov	w0, w25
+	bl	decrement_vpc_count
+.L1848:
+	add	x19, x19, 56
+	b	.L1841
+.L1846:
+	orr	w0, w0, -2147483648
+	b	.L1858
+.L1850:
+	adrp	x0, .LANCHOR36
+	ldrb	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L1839
+	mov	w2, 1569
+	adrp	x1, .LANCHOR220
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR220
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1839:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",@progbits
+	.align	2
+	.global	FtlCacheWriteBack
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR129
+	ldr	x0, [x19, #:lo12:.LANCHOR129]
+	cbz	x0, .L1860
+	adrp	x1, .LANCHOR221
+	mov	w2, 0
+	ldr	x3, [x1, #:lo12:.LANCHOR221]
+	mov	w1, 1
+	bl	FtlProgPages
+	str	xzr, [x19, #:lo12:.LANCHOR129]
+.L1860:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR67
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	add	w1, w1, w2
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w1, w0
+	bhi	.L1873
+	mov	w19, w2
+	cmp	w2, 31
+	bhi	.L1867
+.L1881:
+	mov	w0, 0
+.L1865:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1867:
+	adrp	x22, .LANCHOR54
+	bl	FtlCacheWriteBack
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	udiv	w21, w20, w0
+	msub	w20, w0, w21, w20
+	ands	w20, w20, 65535
+	beq	.L1868
+	sub	w0, w0, w20
+	add	w21, w21, 1
+	cmp	w0, w19
+	csel	w0, w0, w19, ls
+	sub	w19, w19, w0, uxth
+.L1868:
+	adrp	x20, .LANCHOR222
+	adrp	x23, .LANCHOR161
+	add	x20, x20, :lo12:.LANCHOR222
+	add	x23, x23, :lo12:.LANCHOR161
+	mov	w0, -1
+	str	w0, [x29, 76]
+.L1869:
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	cmp	w19, w0
+	bcs	.L1871
+	adrp	x0, .LANCHOR222
+	ldr	w1, [x0, #:lo12:.LANCHOR222]
+	cmp	w1, 32
+	bls	.L1881
+	str	wzr, [x0, #:lo12:.LANCHOR222]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1881
+.L1871:
+	mov	w2, 0
+	add	x1, x29, 72
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	cmn	w0, #1
+	beq	.L1870
+	ldr	w0, [x20]
+	mov	w2, 1
+	add	x1, x29, 76
+	add	w0, w0, 1
+	str	w0, [x20]
+	ldr	w0, [x23]
+	add	w0, w0, 1
+	str	w0, [x23]
+	mov	w0, w21
+	bl	log2phys
+	ldr	w0, [x29, 72]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1870:
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	add	w21, w21, 1
+	sub	w19, w19, w0
+	b	.L1869
+.L1873:
+	mov	w0, -1
+	b	.L1865
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlSysFlush,"ax",@progbits
+	.align	2
+	.global	FtlSysFlush
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L1885
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	mov	w0, 1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1885:
+	mov	w0, 0
+	ret
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",@progbits
+	.align	2
+	.global	FtlDeInit
+	.type	FtlDeInit, %function
+FtlDeInit:
+	adrp	x0, .LANCHOR223
+	ldr	w0, [x0, #:lo12:.LANCHOR223]
+	cmp	w0, 1
+	bne	.L1891
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlSysFlush
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L1891:
+	mov	w0, 0
+	ret
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FlashDeInit
+	bl	FtlDeInit
+	ldp	x29, x30, [sp], 16
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlVendorPartRead,"ax",@progbits
+	.align	2
+	.global	FtlVendorPartRead
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	stp	x29, x30, [sp, -176]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w22, w0
+	mov	w21, w1
+	add	w1, w0, w1
+	adrp	x0, .LANCHOR48
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1905
+	adrp	x0, .LANCHOR55
+	adrp	x26, .LANCHOR182
+	mov	x25, x2
+	mov	x28, x26
+	ldrh	w20, [x0, #:lo12:.LANCHOR55]
+	mov	w24, 0
+	adrp	x0, .LANCHOR54
+	add	x0, x0, :lo12:.LANCHOR54
+	str	x0, [x29, 104]
+	lsr	w20, w22, w20
+.L1898:
+	cbnz	w21, .L1904
+.L1896:
+	mov	w0, w24
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1904:
+	adrp	x0, .LANCHOR191
+	ldr	x0, [x0, #:lo12:.LANCHOR191]
+	ldr	w3, [x0, w20, uxtw 2]
+	ldr	x0, [x29, 104]
+	ldrh	w19, [x0]
+	and	w0, w21, 65535
+	udiv	w23, w22, w19
+	msub	w23, w23, w19, w22
+	sub	w19, w19, w23
+	and	w19, w19, 65535
+	cmp	w21, w19
+	csel	w19, w0, w19, cc
+	lsl	w27, w19, 9
+	cbz	w3, .L1900
+	ldr	x0, [x26, #:lo12:.LANCHOR182]
+	mov	w2, 1
+	str	w3, [x29, 100]
+	mov	w1, w2
+	str	w3, [x29, 124]
+	stp	x0, xzr, [x29, 128]
+	add	x0, x29, 120
+	bl	FlashReadPages
+	ldr	w0, [x29, 120]
+	ldr	w3, [x29, 100]
+	cmn	w0, #1
+	adrp	x0, .LANCHOR199
+	csinv	w24, w24, wzr, ne
+	ldr	w0, [x0, #:lo12:.LANCHOR199]
+	cmp	w0, 256
+	bne	.L1902
+	mov	w2, w3
+	mov	w1, w20
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+	ldr	x2, [x26, #:lo12:.LANCHOR182]
+	adrp	x0, .LANCHOR215
+	mov	w1, w20
+	add	x0, x0, :lo12:.LANCHOR215
+	bl	FtlMapWritePage
+.L1902:
+	ldr	x1, [x28, #:lo12:.LANCHOR182]
+	lsl	w23, w23, 7
+	mov	w2, w27
+	mov	x0, x25
+	add	x1, x1, x23, sxtw 2
+	bl	ftl_memcpy
+.L1903:
+	add	w20, w20, 1
+	sub	w21, w21, w19
+	add	w22, w22, w19
+	add	x25, x25, x27, sxtw
+	b	.L1898
+.L1900:
+	mov	w2, w27
+	mov	w1, 0
+	mov	x0, x25
+	bl	ftl_memset
+	b	.L1903
+.L1905:
+	mov	w24, -1
+	b	.L1896
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",@progbits
+	.align	2
+	.global	FtlLoadEctTbl
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	stp	x29, x30, [sp, -32]!
+	mov	w0, 64
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR188
+	adrp	x20, .LANCHOR187
+	ldr	x2, [x19, #:lo12:.LANCHOR188]
+	ldrh	w1, [x20, #:lo12:.LANCHOR187]
+	bl	FtlVendorPartRead
+	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	ldr	w1, [x0]
+	mov	w0, 17221
+	movk	w0, 0x4254, lsl 16
+	cmp	w1, w0
+	beq	.L1908
+	adrp	x1, .LC40
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC40
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR188]
+	mov	w1, 0
+	ldrh	w2, [x20, #:lo12:.LANCHOR187]
+	lsl	w2, w2, 9
+	bl	ftl_memset
+.L1908:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",@progbits
+	.align	2
+	.global	Ftl_load_ext_data
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	stp	x29, x30, [sp, -48]!
+	mov	w1, 1
+	mov	w0, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR136
+	str	x21, [sp, 32]
+	add	x21, x19, :lo12:.LANCHOR136
+	mov	x2, x21
+	bl	FtlVendorPartRead
+	ldr	w0, [x19, #:lo12:.LANCHOR136]
+	mov	w20, 19539
+	movk	w20, 0x4654, lsl 16
+	cmp	w0, w20
+	beq	.L1911
+	mov	w2, 512
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+	str	w20, [x19, #:lo12:.LANCHOR136]
+.L1911:
+	ldr	w1, [x19, #:lo12:.LANCHOR136]
+	add	x0, x19, :lo12:.LANCHOR136
+	cmp	w1, w20
+	adrp	x20, .LANCHOR166
+	bne	.L1912
+	adrp	x1, .LANCHOR216
+	ldr	w2, [x0, 88]
+	str	w2, [x1, #:lo12:.LANCHOR216]
+	adrp	x1, .LANCHOR217
+	ldr	w2, [x0, 92]
+	str	w2, [x1, #:lo12:.LANCHOR217]
+	adrp	x1, .LANCHOR159
+	ldr	w2, [x0, 8]
+	str	w2, [x1, #:lo12:.LANCHOR159]
+	adrp	x1, .LANCHOR160
+	ldr	w2, [x0, 12]
+	str	w2, [x1, #:lo12:.LANCHOR160]
+	adrp	x1, .LANCHOR164
+	ldr	w2, [x0, 16]
+	str	w2, [x1, #:lo12:.LANCHOR164]
+	adrp	x1, .LANCHOR163
+	ldr	w2, [x0, 20]
+	str	w2, [x1, #:lo12:.LANCHOR163]
+	ldp	w1, w2, [x0, 28]
+	str	w1, [x20, #:lo12:.LANCHOR166]
+	adrp	x1, .LANCHOR78
+	str	w2, [x1, #:lo12:.LANCHOR78]
+	adrp	x1, .LANCHOR161
+	ldr	w2, [x0, 36]
+	str	w2, [x1, #:lo12:.LANCHOR161]
+	adrp	x1, .LANCHOR162
+	ldr	w2, [x0, 40]
+	str	w2, [x1, #:lo12:.LANCHOR162]
+	adrp	x1, .LANCHOR167
+	ldr	w2, [x0, 44]
+	str	w2, [x1, #:lo12:.LANCHOR167]
+	adrp	x1, .LANCHOR168
+	ldr	w2, [x0, 48]
+	str	w2, [x1, #:lo12:.LANCHOR168]
+	ldr	w1, [x0, 60]
+	adrp	x0, .LANCHOR156
+	str	w1, [x0, #:lo12:.LANCHOR156]
+.L1912:
+	add	x19, x19, :lo12:.LANCHOR136
+	adrp	x0, .LANCHOR155
+	str	wzr, [x0, #:lo12:.LANCHOR155]
+	mov	w0, 34661
+	ldr	w1, [x19, 68]
+	movk	w0, 0x1234, lsl 16
+	cmp	w1, w0
+	bne	.L1913
+	adrp	x0, .LANCHOR101
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR101]
+	adrp	x1, .LC41
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC41
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1913:
+	adrp	x1, .LANCHOR165
+	adrp	x0, .LANCHOR46
+	ldr	x21, [sp, 32]
+	ldr	w2, [x1, #:lo12:.LANCHOR165]
+	ldrh	w0, [x0, #:lo12:.LANCHOR46]
+	ldr	w1, [x20, #:lo12:.LANCHOR166]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	madd	w0, w0, w2, w1
+	adrp	x1, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR38]
+	udiv	w0, w0, w1
+	adrp	x1, .LANCHOR202
+	str	w0, [x1, #:lo12:.LANCHOR202]
+	ret
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlMapBlkWriteDumpData,"ax",@progbits
+	.align	2
+	.global	FtlMapBlkWriteDumpData
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	ldr	w1, [x0, 56]
+	cbz	w1, .L1929
+	stp	x29, x30, [sp, -80]!
+	adrp	x1, .LANCHOR75
+	add	x29, sp, 0
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrh	w20, [x0, 6]
+	str	x25, [sp, 64]
+	str	wzr, [x0, 56]
+	ldr	x25, [x0, 40]
+	cbnz	w1, .L1915
+	mov	x19, x0
+	adrp	x0, .LANCHOR181
+	adrp	x23, .LANCHOR199
+	add	x21, x23, :lo12:.LANCHOR199
+	ldr	x0, [x0, #:lo12:.LANCHOR181]
+	mov	x22, x23
+	str	x0, [x21, 8]
+	adrp	x0, .LANCHOR185
+	ldr	x24, [x0, #:lo12:.LANCHOR185]
+	ldrh	w0, [x19, 2]
+	str	x24, [x21, 16]
+	cbz	w0, .L1919
+	adrp	x1, .LANCHOR52
+	ldrh	w1, [x1, #:lo12:.LANCHOR52]
+	sub	w1, w1, #1
+	cmp	w0, w1
+	bge	.L1919
+	ldrh	w1, [x19]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L1919
+	ldr	x2, [x19, 16]
+	ubfiz	x1, x1, 1, 16
+	sub	w0, w0, #1
+	ldrh	w1, [x2, x1]
+	mov	w2, 1
+	orr	w0, w0, w1, lsl 10
+	mov	w1, w2
+	str	w0, [x21, 4]
+	mov	x0, x21
+	bl	FlashReadPages
+	ldr	w0, [x23, #:lo12:.LANCHOR199]
+	cmn	w0, #1
+	beq	.L1919
+	ldrh	w1, [x24, 8]
+	ldr	x2, [x19, 40]
+	ubfiz	x0, x1, 2, 16
+	ldr	w2, [x2, x0]
+	ldr	w0, [x21, 4]
+	cmp	w2, w0
+	bne	.L1919
+	ldr	x2, [x21, 8]
+.L1932:
+	mov	x0, x19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	b	FtlMapWritePage
+.L1919:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	ubfiz	x0, x20, 2, 16
+	ldr	w1, [x25, x0]
+	add	x0, x22, :lo12:.LANCHOR199
+	str	w1, [x0, 4]
+	cbz	w1, .L1920
+	mov	w2, 1
+	mov	w1, w2
+	bl	FlashReadPages
+.L1921:
+	add	x22, x22, :lo12:.LANCHOR199
+	mov	w1, w20
+	ldr	x2, [x22, 8]
+	b	.L1932
+.L1920:
+	adrp	x1, .LANCHOR56
+	ldr	x0, [x0, 8]
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 255
+	bl	ftl_memset
+	b	.L1921
+.L1915:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1929:
+	ret
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlScanSysBlk,"ax",@progbits
+	.align	2
+	.global	FtlScanSysBlk
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	stp	x29, x30, [sp, -176]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR63
+	ldr	x0, [x25, #:lo12:.LANCHOR127]
+	adrp	x22, .LANCHOR190
+	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR125
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR69
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LANCHOR126
+	lsl	w2, w2, 2
+	strh	wzr, [x20, #:lo12:.LANCHOR125]
+	strh	wzr, [x23, #:lo12:.LANCHOR69]
+	bl	ftl_memset
+	ldr	x0, [x27, #:lo12:.LANCHOR126]
+	mov	w1, 0
+	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	adrp	x19, .LANCHOR60
+	adrp	x28, .LANCHOR70
+	adrp	x24, .LANCHOR206
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR190]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldr	x0, [x28, #:lo12:.LANCHOR70]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	mov	w2, 12
+	mov	w1, 255
+	add	x0, x24, :lo12:.LANCHOR206
+	bl	ftl_memset
+	adrp	x0, .LANCHOR38
+	stp	x22, x25, [x29, 144]
+	str	x27, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	str	w0, [x29, 172]
+	adrp	x0, .LANCHOR39
+	add	x0, x0, :lo12:.LANCHOR39
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR157
+	add	x0, x0, :lo12:.LANCHOR157
+	str	x0, [x29, 112]
+.L1934:
+	ldr	x0, [x29, 120]
+	ldr	w1, [x29, 172]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bls	.L1975
+	adrp	x0, .LANCHOR36
+	adrp	x25, .LANCHOR178
+	adrp	x6, .LANCHOR45
+	mov	x5, 0
+	ldrh	w13, [x0, #:lo12:.LANCHOR36]
+	adrp	x0, .LANCHOR104
+	ldr	x7, [x25, #:lo12:.LANCHOR178]
+	mov	w22, 0
+	ldr	x12, [x0, #:lo12:.LANCHOR104]
+	adrp	x0, .LANCHOR105
+	add	x6, x6, :lo12:.LANCHOR45
+	mov	w8, 56
+	ldr	x11, [x0, #:lo12:.LANCHOR105]
+	adrp	x0, .LANCHOR57
+	ldrh	w10, [x0, #:lo12:.LANCHOR57]
+	b	.L1976
+.L1936:
+	ldrh	w1, [x29, 172]
+	ldrb	w0, [x6, x5]
+	bl	V2P_block
+	and	w4, w0, 65535
+	bl	FtlBbmIsBadBlock
+	cbnz	w0, .L1935
+	umaddl	x1, w22, w8, x7
+	lsl	w4, w4, 10
+	mul	w0, w22, w10
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	asr	w0, w0, 2
+	str	w4, [x1, 4]
+	add	x0, x11, x0, sxtw 2
+	stp	x12, x0, [x1, 8]
+.L1935:
+	add	x5, x5, 1
+.L1976:
+	cmp	w13, w5, uxth
+	bhi	.L1936
+	cbnz	w22, .L1937
+.L1974:
+	ldr	w0, [x29, 172]
+	add	w26, w0, 1
+	and	w0, w26, 65535
+	str	w0, [x29, 172]
+	b	.L1934
+.L1937:
+	mov	w1, w22
+	mov	w2, 1
+	mov	x0, x7
+	bl	FlashReadPages
+	mov	w0, 56
+	umull	x0, w22, w0
+	mov	x22, 0
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR224
+	add	x0, x0, :lo12:.LANCHOR224
+	str	x0, [x29, 136]
+.L1973:
+	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	ldr	w3, [x1, 4]
+	cmn	w0, #1
+	ldr	x27, [x1, 16]
+	ubfx	x26, x3, 10, 16
+	bne	.L1940
+	mov	w5, 16
+	mov	w7, 65535
+.L1942:
+	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	add	x6, x25, :lo12:.LANCHOR178
+	mov	w2, 1
+	str	w7, [x29, 100]
+	add	x0, x0, x22
+	str	x6, [x29, 104]
+	str	w5, [x29, 168]
+	ldr	w1, [x0, 4]
+	add	w1, w1, 1
+	str	w1, [x0, 4]
+	mov	w1, w2
+	bl	FlashReadPages
+	ldrh	w0, [x27]
+	ldr	w7, [x29, 100]
+	ldr	w5, [x29, 168]
+	cmp	w0, w7
+	ldr	x6, [x29, 104]
+	bne	.L1939
+	ldr	x0, [x6]
+	mov	w1, -1
+	str	w1, [x0, x22]
+	ldr	x0, [x6]
+	ldr	w0, [x0, x22]
+	cmp	w0, w1
+	beq	.L2012
+.L1940:
+	adrp	x0, .LANCHOR157
+	ldr	w1, [x0, #:lo12:.LANCHOR157]
+	ldr	w0, [x27, 4]
+	cmn	w1, #1
+	beq	.L1943
+	cmp	w1, w0
+	bhi	.L1944
+.L1943:
+	cmn	w0, #1
+	beq	.L1944
+	ldr	x2, [x29, 112]
+	add	w1, w0, 1
+	str	w1, [x2]
+.L1944:
+	ldrh	w1, [x27]
+	mov	w2, 61604
+	cmp	w1, w2
+	beq	.L1946
+	bhi	.L1947
+	mov	w0, 61574
+	cmp	w1, w0
+	beq	.L1948
+.L1945:
+	ldr	x0, [x29, 128]
+	add	x22, x22, 56
+	cmp	x0, x22
+	bne	.L1973
+	b	.L1974
+.L1939:
+	ldr	x0, [x25, #:lo12:.LANCHOR178]
+	ldr	w0, [x0, x22]
+	cmn	w0, #1
+	bne	.L1940
+	sub	w5, w5, #1
+	ands	w5, w5, 65535
+	bne	.L1942
+.L2012:
+	mov	w1, 0
+	mov	w0, w26
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1945
+.L1947:
+	mov	w0, 61634
+	cmp	w1, w0
+	beq	.L1949
+	mov	w0, 65535
+	cmp	w1, w0
+	beq	.L2012
+	b	.L1945
+.L1949:
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	cmp	w1, w0
+	bls	.L1951
+	ldr	x1, [x29, 136]
+	mov	w2, 1269
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1951:
+	ldr	w6, [x21, #:lo12:.LANCHOR63]
+	ldr	x3, [x29, 152]
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	and	w2, w6, 65535
+	sub	w0, w2, #1
+	sub	w2, w2, w1
+	sxth	x0, w0
+	sub	w2, w2, #1
+	ldr	x5, [x3, #:lo12:.LANCHOR127]
+	sxth	w2, w2
+.L1952:
+	cmp	w0, w2
+	bgt	.L1958
+	tbz	w0, #31, .L1993
+	b	.L1945
+.L1958:
+	sxtw	x8, w0
+	ldr	w11, [x27, 4]
+	lsl	x7, x8, 2
+	add	x10, x5, x7
+	ldr	w7, [x5, x7]
+	cmp	w11, w7
+	bls	.L1953
+	ldr	w2, [x5]
+	cbnz	w2, .L1954
+	cmp	w6, w1
+	beq	.L1954
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR125]
+.L1954:
+	ldr	x1, [x29, 160]
+	ldr	x6, [x1, #:lo12:.LANCHOR126]
+	mov	w1, 0
+.L1955:
+	cmp	w1, w0
+	bne	.L1956
+	ldr	w1, [x27, 4]
+	str	w1, [x10]
+	strh	w26, [x6, x8, lsl 1]
+	tbnz	w0, #31, .L1945
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w2, [x21, #:lo12:.LANCHOR63]
+	sub	w2, w2, w1
+	sub	w2, w2, #1
+	cmp	w0, w2, sxth
+	bgt	.L1945
+.L1993:
+	add	w1, w1, 1
+	strh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w1, [x27, 4]
+	str	w1, [x5, x0, lsl 2]
+	ldr	x1, [x29, 160]
+	ldr	x1, [x1, #:lo12:.LANCHOR126]
+.L2011:
+	strh	w26, [x1, x0, lsl 1]
+	b	.L1945
+.L1956:
+	sxtw	x2, w1
+	add	w1, w1, 1
+	lsl	x7, x2, 2
+	lsl	x2, x2, 1
+	add	x11, x5, x7
+	sxth	w1, w1
+	ldr	w11, [x11, 4]
+	str	w11, [x5, x7]
+	add	x7, x6, x2
+	ldrh	w7, [x7, 2]
+	strh	w7, [x6, x2]
+	b	.L1955
+.L1953:
+	sub	w0, w0, #1
+	sxth	x0, w0
+	b	.L1952
+.L1948:
+	ldrh	w1, [x23, #:lo12:.LANCHOR69]
+	ldrh	w0, [x19, #:lo12:.LANCHOR60]
+	cmp	w1, w0
+	bls	.L1961
+	ldr	x1, [x29, 136]
+	mov	w2, 1316
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L1961:
+	ldrh	w6, [x19, #:lo12:.LANCHOR60]
+	ldrh	w2, [x23, #:lo12:.LANCHOR69]
+	sub	w1, w6, #1
+	sxth	x0, w1
+	sub	w5, w1, w2
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR190]
+.L1962:
+	cmp	w0, w5
+	ble	.L1967
+	sxtw	x7, w0
+	ldr	w11, [x27, 4]
+	lsl	x8, x7, 2
+	add	x10, x1, x8
+	ldr	w8, [x1, x8]
+	cmp	w11, w8
+	bls	.L1963
+	ldr	w5, [x1]
+	cbnz	w5, .L1964
+	cmp	w6, w2
+	beq	.L1964
+	add	w2, w2, 1
+	strh	w2, [x23, #:lo12:.LANCHOR69]
+.L1964:
+	ldr	x6, [x28, #:lo12:.LANCHOR70]
+	mov	w2, 0
+.L1965:
+	cmp	w2, w0
+	bne	.L1966
+	ldr	w2, [x27, 4]
+	str	w2, [x10]
+	strh	w26, [x6, x7, lsl 1]
+.L1967:
+	tbnz	w0, #31, .L1945
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	ldrh	w5, [x23, #:lo12:.LANCHOR69]
+	sub	w2, w2, #1
+	sub	w2, w2, w5
+	cmp	w0, w2, sxth
+	bgt	.L1945
+	add	w5, w5, 1
+	ldr	w2, [x27, 4]
+	strh	w5, [x23, #:lo12:.LANCHOR69]
+	str	w2, [x1, x0, lsl 2]
+	ldr	x1, [x28, #:lo12:.LANCHOR70]
+	b	.L2011
+.L1966:
+	sxtw	x5, w2
+	add	w2, w2, 1
+	lsl	x8, x5, 2
+	lsl	x5, x5, 1
+	add	x11, x1, x8
+	sxth	w2, w2
+	ldr	w11, [x11, 4]
+	str	w11, [x1, x8]
+	add	x8, x6, x5
+	ldrh	w8, [x8, 2]
+	strh	w8, [x6, x5]
+	b	.L1965
+.L1963:
+	sub	w0, w0, #1
+	sxth	x0, w0
+	b	.L1962
+.L1946:
+	ldrh	w5, [x24, #:lo12:.LANCHOR206]
+	mov	w1, 65535
+	add	x2, x24, :lo12:.LANCHOR206
+	cmp	w5, w1
+	bne	.L1969
+	strh	w26, [x24, #:lo12:.LANCHOR206]
+	str	w0, [x2, 8]
+	b	.L1945
+.L1969:
+	ldrh	w0, [x2, 4]
+	cmp	w0, w1
+	beq	.L1970
+	mov	w1, 1
+	bl	FtlFreeSysBlkQueueIn
+.L1970:
+	add	x0, x24, :lo12:.LANCHOR206
+	ldr	w1, [x27, 4]
+	ldr	w2, [x0, 8]
+	cmp	w2, w1
+	bcs	.L1971
+	ldrh	w2, [x24, #:lo12:.LANCHOR206]
+	strh	w2, [x0, 4]
+	strh	w26, [x24, #:lo12:.LANCHOR206]
+	str	w1, [x0, 8]
+	b	.L1945
+.L1971:
+	strh	w26, [x0, 4]
+	b	.L1945
+.L1975:
+	ldr	x0, [x29, 160]
+	ldr	x2, [x0, #:lo12:.LANCHOR126]
+	ldrh	w0, [x2]
+	cbz	w0, .L1977
+.L1980:
+	ldr	x1, [x28, #:lo12:.LANCHOR70]
+	ldrh	w0, [x1]
+	cbz	w0, .L1978
+.L1979:
+	ldrh	w1, [x20, #:lo12:.LANCHOR125]
+	ldr	w0, [x21, #:lo12:.LANCHOR63]
+	cmp	w1, w0
+	bls	.L2009
+	mov	w2, 1450
+	adrp	x1, .LANCHOR224
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR224
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2009:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L1977:
+	ldrh	w0, [x20, #:lo12:.LANCHOR125]
+	cbz	w0, .L1980
+	ldr	w1, [x21, #:lo12:.LANCHOR63]
+	mov	w0, 0
+.L1981:
+	cmp	w0, w1
+	bcs	.L1980
+	ldrh	w3, [x2, w0, sxtw 1]
+	cbz	w3, .L1982
+	ldr	x1, [x29, 152]
+	add	x7, x21, :lo12:.LANCHOR63
+	ldr	x4, [x1, #:lo12:.LANCHOR127]
+	mov	w1, w0
+.L1983:
+	ldr	w3, [x7]
+	cmp	w1, w3
+	bcs	.L1980
+	sxtw	x6, w1
+	sub	w3, w1, w0
+	lsl	x5, x6, 1
+	sxtw	x3, w3
+	add	w1, w1, 1
+	ldr	w6, [x4, x6, lsl 2]
+	sxth	w1, w1
+	ldrh	w8, [x2, x5]
+	strh	w8, [x2, x3, lsl 1]
+	str	w6, [x4, x3, lsl 2]
+	strh	wzr, [x2, x5]
+	b	.L1983
+.L1982:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L1981
+.L1978:
+	ldrh	w0, [x23, #:lo12:.LANCHOR69]
+	cbz	w0, .L1979
+	ldrh	w2, [x19, #:lo12:.LANCHOR60]
+	mov	w0, 0
+.L1988:
+	mov	w6, w0
+	cmp	w0, w2
+	bge	.L1979
+	ldrh	w3, [x1, w0, sxtw 1]
+	cbz	w3, .L1989
+	ldr	x2, [x29, 144]
+	add	x19, x19, :lo12:.LANCHOR60
+	ldr	x3, [x2, #:lo12:.LANCHOR190]
+.L1990:
+	ldrh	w2, [x19]
+	cmp	w0, w2
+	bge	.L1979
+	sxtw	x5, w0
+	sub	w2, w0, w6
+	lsl	x4, x5, 1
+	sxtw	x2, w2
+	add	w0, w0, 1
+	ldr	w5, [x3, x5, lsl 2]
+	sxth	w0, w0
+	ldrh	w7, [x1, x4]
+	strh	w7, [x1, x2, lsl 1]
+	str	w5, [x3, x2, lsl 2]
+	strh	wzr, [x1, x4]
+	b	.L1990
+.L1989:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L1988
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadSysInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadSysInfo
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	stp	x29, x30, [sp, -96]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR206
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR199
+	stp	x25, x26, [sp, 64]
+	add	x19, x23, :lo12:.LANCHOR199
+	adrp	x25, .LANCHOR185
+	adrp	x24, .LANCHOR82
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR38
+	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	stp	x27, x28, [sp, 80]
+	stp	xzr, x0, [x19, 8]
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L2014
+.L2023:
+	mov	w0, -1
+.L2013:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2014:
+	add	x26, x20, :lo12:.LANCHOR206
+	mov	w27, 19539
+	mov	w1, 1
+	movk	w27, 0x4654, lsl 16
+	bl	FtlGetLastWrittenPage
+	mov	w28, 61604
+	sxth	w22, w0
+	add	w0, w0, 1
+	strh	w0, [x26, 2]
+	adrp	x26, .LANCHOR79
+.L2016:
+	tbz	w22, #31, .L2019
+	mov	w2, 1510
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2018:
+	adrp	x1, .LANCHOR56
+	ldrh	w0, [x21, #:lo12:.LANCHOR38]
+	ldrh	w1, [x1, #:lo12:.LANCHOR56]
+	add	x0, x0, 24
+	cmp	x1, x0, lsl 1
+	bcs	.L2021
+	mov	w2, 1512
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2021:
+	add	x23, x23, :lo12:.LANCHOR199
+	mov	w2, 48
+	adrp	x19, .LANCHOR135
+	add	x0, x19, :lo12:.LANCHOR135
+	ldr	x1, [x23, 8]
+	bl	ftl_memcpy
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	ldr	x1, [x23, 8]
+	lsl	w2, w2, 1
+	add	x1, x1, 48
+	bl	ftl_memcpy
+	ldrh	w1, [x21, #:lo12:.LANCHOR38]
+	ldr	x0, [x23, 8]
+	lsr	w2, w1, 3
+	ubfiz	x1, x1, 1, 16
+	add	x1, x1, 48
+	add	w2, w2, 4
+	and	x1, x1, -4
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR0
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L2022
+	ldrh	w1, [x21, #:lo12:.LANCHOR38]
+	adrp	x0, .LANCHOR65
+	ldrh	w2, [x0, #:lo12:.LANCHOR65]
+	lsr	w0, w1, 3
+	add	w1, w0, w1, lsl 1
+	ldr	x0, [x23, 8]
+	add	w1, w1, 52
+	lsl	w2, w2, 2
+	and	x1, x1, 65532
+	add	x1, x0, x1
+	adrp	x0, .LANCHOR192
+	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	bl	ftl_memcpy
+.L2022:
+	ldr	w2, [x19, #:lo12:.LANCHOR135]
+	mov	w1, 19539
+	movk	w1, 0x4654, lsl 16
+	add	x0, x19, :lo12:.LANCHOR135
+	cmp	w2, w1
+	bne	.L2023
+	add	x20, x20, :lo12:.LANCHOR206
+	ldrh	w1, [x0, 8]
+	ldrb	w2, [x0, 10]
+	adrp	x0, .LANCHOR43
+	strh	w1, [x20, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR43]
+	cmp	w2, w0
+	bne	.L2023
+	adrp	x0, .LANCHOR226
+	adrp	x2, .LANCHOR71
+	adrp	x3, .LANCHOR36
+	str	w1, [x0, #:lo12:.LANCHOR226]
+	adrp	x0, .LANCHOR51
+	ldrh	w3, [x3, #:lo12:.LANCHOR36]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	mul	w0, w0, w1
+	str	w0, [x2, #:lo12:.LANCHOR71]
+	adrp	x2, .LANCHOR54
+	ldrh	w2, [x2, #:lo12:.LANCHOR54]
+	mul	w0, w2, w0
+	adrp	x2, .LANCHOR67
+	str	w0, [x2, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR40
+	ldr	w2, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR73+6
+	ldrh	w0, [x0, #:lo12:.LANCHOR73+6]
+	cmp	w1, w2
+	sub	w0, w2, w0
+	sub	w0, w0, w1
+	udiv	w0, w0, w3
+	adrp	x3, .LANCHOR227
+	strh	w0, [x3, #:lo12:.LANCHOR227]
+	bls	.L2024
+	mov	w2, 1539
+	adrp	x1, .LANCHOR225
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR225
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2024:
+	add	x1, x19, :lo12:.LANCHOR135
+	adrp	x0, .LANCHOR90
+	add	x3, x0, :lo12:.LANCHOR90
+	adrp	x5, .LANCHOR201
+	mov	x22, x5
+	ldrh	w2, [x1, 16]
+	ldrh	w7, [x1, 14]
+	strh	w7, [x0, #:lo12:.LANCHOR90]
+	lsr	w4, w2, 6
+	and	w2, w2, 63
+	strb	w2, [x3, 6]
+	ldrb	w2, [x1, 11]
+	strb	w2, [x3, 8]
+	add	x2, x5, :lo12:.LANCHOR201
+	strh	w4, [x3, 2]
+	mov	w3, -1
+	strh	w3, [x5, #:lo12:.LANCHOR201]
+	strh	wzr, [x2, 2]
+	strb	wzr, [x2, 6]
+	strb	wzr, [x2, 8]
+	adrp	x2, .LANCHOR91
+	ldrh	w3, [x1, 18]
+	add	x4, x2, :lo12:.LANCHOR91
+	strh	w3, [x2, #:lo12:.LANCHOR91]
+	mov	x20, x2
+	ldrh	w3, [x1, 20]
+	lsr	w6, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x4, 6]
+	ldrb	w3, [x1, 12]
+	strh	w6, [x4, 2]
+	strb	w3, [x4, 8]
+	adrp	x4, .LANCHOR92
+	ldrh	w3, [x1, 22]
+	add	x6, x4, :lo12:.LANCHOR92
+	strh	w3, [x4, #:lo12:.LANCHOR92]
+	mov	x21, x4
+	ldrh	w3, [x1, 24]
+	lsr	w8, w3, 6
+	and	w3, w3, 63
+	strb	w3, [x6, 6]
+	ldrb	w3, [x1, 13]
+	strb	w3, [x6, 8]
+	adrp	x3, .LANCHOR159
+	strh	w8, [x6, 2]
+	ldr	w6, [x1, 32]
+	str	wzr, [x3, #:lo12:.LANCHOR159]
+	adrp	x3, .LANCHOR160
+	str	wzr, [x3, #:lo12:.LANCHOR160]
+	adrp	x3, .LANCHOR164
+	str	wzr, [x3, #:lo12:.LANCHOR164]
+	adrp	x3, .LANCHOR163
+	str	wzr, [x3, #:lo12:.LANCHOR163]
+	adrp	x3, .LANCHOR165
+	str	w6, [x3, #:lo12:.LANCHOR165]
+	adrp	x3, .LANCHOR166
+	str	wzr, [x3, #:lo12:.LANCHOR166]
+	adrp	x3, .LANCHOR167
+	str	wzr, [x3, #:lo12:.LANCHOR167]
+	adrp	x3, .LANCHOR162
+	str	wzr, [x3, #:lo12:.LANCHOR162]
+	ldr	w3, [x1, 40]
+	adrp	x1, .LANCHOR157
+	ldr	w6, [x1, #:lo12:.LANCHOR157]
+	cmp	w3, w6
+	bls	.L2025
+	str	w3, [x1, #:lo12:.LANCHOR157]
+.L2025:
+	add	x19, x19, :lo12:.LANCHOR135
+	adrp	x1, .LANCHOR158
+	ldr	w3, [x1, #:lo12:.LANCHOR158]
+	ldr	w2, [x19, 36]
+	cmp	w2, w3
+	bls	.L2026
+	str	w2, [x1, #:lo12:.LANCHOR158]
+.L2026:
+	mov	w1, 65535
+	cmp	w7, w1
+	beq	.L2027
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	make_superblock
+.L2027:
+	ldrh	w2, [x20, #:lo12:.LANCHOR91]
+	mov	w1, 65535
+	add	x0, x20, :lo12:.LANCHOR91
+	cmp	w2, w1
+	beq	.L2028
+	bl	make_superblock
+.L2028:
+	ldrh	w2, [x21, #:lo12:.LANCHOR92]
+	mov	w1, 65535
+	add	x0, x21, :lo12:.LANCHOR92
+	cmp	w2, w1
+	beq	.L2029
+	bl	make_superblock
+.L2029:
+	ldrh	w2, [x22, #:lo12:.LANCHOR201]
+	mov	w1, 65535
+	add	x0, x22, :lo12:.LANCHOR201
+	cmp	w2, w1
+	beq	.L2030
+	bl	make_superblock
+.L2030:
+	mov	w0, 0
+	b	.L2013
+.L2019:
+	ldrh	w0, [x20, #:lo12:.LANCHOR206]
+	mov	w2, 1
+	mov	w1, w2
+	orr	w0, w22, w0, lsl 10
+	str	w0, [x19, 4]
+	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	str	x0, [x19, 8]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	w0, [x19]
+	cmn	w0, #1
+	beq	.L2017
+	ldr	x0, [x26, #:lo12:.LANCHOR79]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L2017
+	ldr	x0, [x25, #:lo12:.LANCHOR185]
+	ldrh	w0, [x0]
+	cmp	w0, w28
+	beq	.L2018
+.L2017:
+	sub	w22, w22, #1
+	sxth	w22, w22
+	b	.L2016
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",@progbits
+	.align	2
+	.global	FtlMapTblRecovery
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	stp	x29, x30, [sp, -160]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR79
+	stp	x23, x24, [sp, 48]
+	adrp	x20, .LANCHOR199
+	ldrh	w23, [x0, 6]
+	ldr	x22, [x0, 40]
+	ldr	x0, [x0, 16]
+	str	x0, [x29, 152]
+	lsl	w2, w23, 2
+	ldr	x0, [x19, 24]
+	str	x0, [x29, 136]
+	ldrh	w0, [x19, 8]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR52
+	stp	x27, x28, [sp, 80]
+	mov	w26, 0
+	str	w0, [x29, 144]
+	mov	x0, x22
+	bl	ftl_memset
+	stp	wzr, wzr, [x19, 48]
+	add	x3, x20, :lo12:.LANCHOR199
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	mov	w1, -1
+	mov	x24, x3
+	str	x0, [x3, 8]
+	adrp	x0, .LANCHOR185
+	str	x0, [x29, 128]
+	ldr	x27, [x0, #:lo12:.LANCHOR185]
+	ldr	w0, [x29, 144]
+	str	x27, [x3, 16]
+	sub	w0, w0, #1
+	strh	w1, [x19]
+	strh	w1, [x19, 2]
+	mov	w1, 1
+	str	w0, [x29, 120]
+	add	x0, x25, :lo12:.LANCHOR52
+	str	w1, [x19, 56]
+	str	x0, [x29, 112]
+.L2040:
+	ldr	w0, [x29, 144]
+	cmp	w26, w0
+	bge	.L2058
+	ldr	w0, [x29, 120]
+	sxtw	x28, w26
+	cmp	w26, w0
+	bne	.L2041
+	ldr	x2, [x29, 152]
+	lsl	x0, x28, 1
+	ldr	x1, [x29, 152]
+	mov	w25, 0
+	add	x24, x1, x0
+	mov	w1, 1
+	ldrh	w0, [x2, x0]
+	bl	FtlGetLastWrittenPage
+	sxth	w3, w0
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+	ldr	x0, [x29, 136]
+	strh	w26, [x19]
+	add	x26, x20, :lo12:.LANCHOR199
+	ldr	w0, [x0, x28, lsl 2]
+	str	w0, [x19, 48]
+.L2042:
+	cmp	w25, w3
+	ble	.L2045
+.L2058:
+	adrp	x23, .LANCHOR124
+	str	x23, [x29, 136]
+	add	x0, x23, :lo12:.LANCHOR124
+	cmp	x19, x0
+	bne	.L2047
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	cbz	w0, .L2047
+	adrp	x26, .LANCHOR125
+	add	x27, x26, :lo12:.LANCHOR125
+	adrp	x24, .LANCHOR65
+	mov	w22, 0
+	add	x0, x24, :lo12:.LANCHOR65
+	adrp	x25, .LANCHOR192
+	str	x0, [x29, 144]
+.L2061:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0]
+	cmp	w22, w0
+	bcc	.L2067
+.L2047:
+	mov	x0, x19
+	bl	ftl_free_no_use_map_blk
+	adrp	x0, .LANCHOR52
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w1, w0
+	bne	.L2060
+	mov	x0, x19
+	bl	ftl_map_blk_alloc_new_blk
+.L2060:
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	x0, x19
+	bl	ftl_map_blk_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2045:
+	ldrh	w0, [x24]
+	mov	w2, 1
+	str	w3, [x29, 144]
+	mov	w1, w2
+	orr	w0, w25, w0, lsl 10
+	str	w0, [x26, 4]
+	mov	x0, x26
+	bl	FlashReadPages
+	ldr	w0, [x26]
+	ldr	w3, [x29, 144]
+	cmn	w0, #1
+	beq	.L2043
+	ldrh	w0, [x27, 8]
+	cmp	w23, w0
+	bls	.L2044
+	ldrh	w2, [x27]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L2044
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x26, 4]
+	str	w1, [x22, x0]
+.L2044:
+	add	w25, w25, 1
+	sxth	w25, w25
+	b	.L2042
+.L2043:
+	ldrh	w0, [x24]
+	strh	w0, [x19, 60]
+	b	.L2044
+.L2041:
+	ldr	x1, [x29, 152]
+	mov	w2, 1
+	ldr	x0, [x21, #:lo12:.LANCHOR79]
+	str	x0, [x24, 8]
+	lsl	x0, x28, 1
+	add	x28, x1, x0
+	ldrh	w0, [x1, x0]
+	ldrh	w1, [x25, #:lo12:.LANCHOR52]
+	sub	w1, w1, #1
+	orr	w0, w1, w0, lsl 10
+	mov	w1, w2
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	cmn	w0, #1
+	beq	.L2069
+	ldrh	w1, [x27]
+	ldrh	w0, [x19, 4]
+	cmp	w1, w0
+	bne	.L2069
+	ldrh	w1, [x27, 8]
+	mov	w0, 64245
+	cmp	w1, w0
+	beq	.L2049
+.L2069:
+	mov	w6, 0
+.L2050:
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0]
+	cmp	w6, w0
+	bge	.L2056
+	ldrh	w0, [x28]
+	mov	w2, 1
+	str	w6, [x29, 108]
+	mov	w1, w2
+	orr	w0, w6, w0, lsl 10
+	str	w0, [x24, 4]
+	mov	x0, x24
+	bl	FlashReadPages
+	ldr	w0, [x24]
+	ldr	w6, [x29, 108]
+	cmn	w0, #1
+	beq	.L2054
+	ldrh	w0, [x27, 8]
+	cmp	w23, w0
+	bls	.L2054
+	ldrh	w2, [x27]
+	ldrh	w1, [x19, 4]
+	cmp	w2, w1
+	bne	.L2054
+	ubfiz	x0, x0, 2, 16
+	ldr	w1, [x24, 4]
+	str	w1, [x22, x0]
+.L2054:
+	add	w6, w6, 1
+	sxth	w6, w6
+	b	.L2050
+.L2049:
+	ldrh	w6, [x25, #:lo12:.LANCHOR52]
+	mov	w0, 0
+	ldr	x10, [x21, #:lo12:.LANCHOR79]
+	sub	w6, w6, #1
+.L2051:
+	cmp	w0, w6
+	blt	.L2053
+.L2056:
+	add	w4, w26, 1
+	sxth	w26, w4
+	b	.L2040
+.L2053:
+	lsl	w2, w0, 1
+	sxtw	x2, w2
+	lsl	x1, x2, 2
+	ldrh	w1, [x10, x1]
+	cmp	w23, w1
+	bls	.L2052
+	add	x2, x2, 1
+	ubfiz	x1, x1, 2, 16
+	ldr	w2, [x10, x2, lsl 2]
+	str	w2, [x22, x1]
+.L2052:
+	add	w0, w0, 1
+	sxth	w0, w0
+	b	.L2051
+.L2067:
+	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	ubfiz	x28, x22, 2, 32
+	ldr	w0, [x0, x28]
+	sub	w1, w0, #1
+	cmn	w1, #3
+	bhi	.L2063
+	adrp	x24, .LANCHOR128
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	w1, [x1, x28]
+	cmp	w0, w1
+	beq	.L2063
+	add	x4, x20, :lo12:.LANCHOR199
+	ldr	x1, [x21, #:lo12:.LANCHOR79]
+	mov	w2, 1
+	str	x4, [x29, 120]
+	str	x1, [x4, 8]
+	ldr	x1, [x29, 128]
+	str	w0, [x4, 4]
+	mov	x0, x4
+	ldr	x23, [x1, #:lo12:.LANCHOR185]
+	mov	w1, w2
+	str	x23, [x4, 16]
+	bl	FlashReadPages
+	ldr	w0, [x20, #:lo12:.LANCHOR199]
+	cmn	w0, #1
+	beq	.L2063
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x23]
+	add	x0, x0, :lo12:.LANCHOR124
+	ldr	x4, [x29, 120]
+	ldrh	w0, [x0, 4]
+	cmp	w1, w0
+	bne	.L2063
+	ldr	x0, [x24, #:lo12:.LANCHOR128]
+	mov	w2, 1
+	ldr	w3, [x23, 4]
+	mov	w1, w2
+	str	w3, [x29, 120]
+	ldr	w0, [x0, x28]
+	str	w0, [x4, 4]
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	w4, [x23, 4]
+	ldr	w3, [x29, 120]
+	cmp	w3, w4
+	bls	.L2063
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	ldr	w2, [x1, x28]
+	ldr	w1, [x0, x28]
+	adrp	x0, .LC42
+	add	x0, x0, :lo12:.LC42
+	bl	printf
+	ldr	x0, [x25, #:lo12:.LANCHOR192]
+	ldr	x1, [x24, #:lo12:.LANCHOR128]
+	ldr	w2, [x0, x28]
+	str	w2, [x1, x28]
+	mov	w1, 0
+	ldrh	w2, [x26, #:lo12:.LANCHOR125]
+	ldr	w0, [x0, x28]
+	ubfx	x0, x0, 10, 16
+.L2065:
+	cmp	w1, w2
+	blt	.L2066
+	adrp	x1, .LANCHOR63
+	ldr	w1, [x1, #:lo12:.LANCHOR63]
+	cmp	w2, w1
+	bcs	.L2063
+	ldr	x1, [x29, 152]
+	ubfiz	x2, x2, 1, 16
+	strh	w0, [x1, x2]
+	ldrh	w1, [x27]
+	add	w1, w1, 1
+	strh	w1, [x27]
+	bl	remove_from_free_sys_Queue
+.L2063:
+	add	w22, w22, 1
+	b	.L2061
+.L2066:
+	ldr	x3, [x29, 152]
+	ldrh	w3, [x3, w1, sxtw 1]
+	cmp	w3, w0
+	beq	.L2063
+	add	w1, w1, 1
+	sxth	w1, w1
+	b	.L2065
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadVonderInfo
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR60
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	add	x29, sp, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR60]
+	strh	w1, [x0, 10]
+	mov	w1, -3962
+	strh	w1, [x0, 4]
+	adrp	x1, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR69]
+	strh	w1, [x0, 8]
+	adrp	x1, .LANCHOR61
+	ldrh	w1, [x1, #:lo12:.LANCHOR61]
+	strh	w1, [x0, 6]
+	adrp	x1, .LANCHOR70
+	ldr	x1, [x1, #:lo12:.LANCHOR70]
+	str	x1, [x0, 16]
+	adrp	x1, .LANCHOR190
+	ldr	x1, [x1, #:lo12:.LANCHOR190]
+	str	x1, [x0, 24]
+	adrp	x1, .LANCHOR189
+	ldr	x1, [x1, #:lo12:.LANCHOR189]
+	str	x1, [x0, 32]
+	adrp	x1, .LANCHOR191
+	ldr	x1, [x1, #:lo12:.LANCHOR191]
+	str	x1, [x0, 40]
+	mov	w1, -1
+	strh	w1, [x0, 60]
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",@progbits
+	.align	2
+	.global	FtlLoadMapInfo
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FtlL2PDataInit
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapTblRecovery
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlRecoverySuperblock,"ax",@progbits
+	.align	2
+	.global	FtlRecoverySuperblock
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	stp	x29, x30, [sp, -208]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x0]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w1
+	stp	x27, x28, [sp, 80]
+	beq	.L2243
+	ldrb	w0, [x19, 6]
+	str	w0, [x29, 180]
+	adrp	x0, .LANCHOR51
+	ldrh	w26, [x19, 2]
+	str	x0, [x29, 144]
+	ldrh	w2, [x0, #:lo12:.LANCHOR51]
+	cmp	w2, w26
+	bne	.L2087
+	strh	wzr, [x19, 4]
+.L2250:
+	strb	wzr, [x19, 6]
+.L2243:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 208
+	ret
+.L2087:
+	ldrh	w0, [x19, 16]
+	mov	w21, 0
+.L2088:
+	cmp	w0, w1
+	beq	.L2089
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2090
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2091
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2168
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w23, [x0, w20, sxtw 1]
+.L2092:
+	adrp	x1, .LANCHOR105
+	adrp	x2, .LANCHOR36
+	adrp	x22, .LANCHOR178
+	add	x4, x19, 16
+	ldr	x6, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR57
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w27, 0
+	ldrh	w7, [x1, #:lo12:.LANCHOR57]
+	add	x1, x19, 16
+	str	x1, [x29, 184]
+	mov	w8, 65535
+	ldrh	w1, [x2, #:lo12:.LANCHOR36]
+	mov	w10, 56
+	str	x2, [x29, 160]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+.L2093:
+	cmp	x1, x4
+	bne	.L2097
+	ldrb	w1, [x19, 8]
+	cmp	w1, 1
+	bne	.L2169
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, 0
+	cset	w1, ne
+	str	w1, [x29, 176]
+.L2098:
+	ldr	w2, [x29, 176]
+	mov	w1, w27
+	adrp	x24, .LC43
+	adrp	x25, .LANCHOR229
+	add	x24, x24, :lo12:.LC43
+	add	x25, x25, :lo12:.LANCHOR229
+	mov	x28, 0
+	bl	FlashReadPages
+	adrp	x0, .LANCHOR158
+	mov	w5, 65535
+	str	x0, [x29, 168]
+	ldr	w21, [x0, #:lo12:.LANCHOR158]
+	sub	w21, w21, #1
+.L2099:
+	and	w0, w28, 65535
+	cmp	w27, w0
+	bhi	.L2104
+	bne	.L2102
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	ldr	w0, [x0, 4]
+.L2245:
+	lsr	w0, w0, 10
+	bl	P2V_plane
+	ldrb	w1, [x19, 8]
+	and	w27, w0, 65535
+	cmp	w1, 1
+	bne	.L2106
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2106
+	adrp	x0, .LANCHOR16
+	add	x0, x0, :lo12:.LANCHOR16
+	ldrh	w20, [x0, w20, sxtw 1]
+.L2106:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w20
+	bne	.L2107
+	strh	w20, [x19, 2]
+	strb	wzr, [x19, 6]
+	strh	wzr, [x19, 4]
+.L2107:
+	ldr	w0, [x29, 180]
+	cmp	w20, w26
+	cset	w2, eq
+	cmp	w27, w0
+	cset	w0, eq
+	tst	w2, w0
+	beq	.L2108
+.L2251:
+	mov	w2, w27
+	mov	w1, w20
+	mov	x0, x19
+	bl	ftl_sb_update_avl_pages
+	b	.L2243
+.L2089:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	add	x0, x19, x21, sxtw 1
+	ldrh	w0, [x0, 16]
+	b	.L2088
+.L2090:
+	mov	w1, 0
+	bl	FtlGetLastWrittenPage
+	mov	w20, w0
+	cmn	w0, #1
+	beq	.L2091
+.L2168:
+	mov	w23, w20
+	b	.L2092
+.L2091:
+	cbz	w26, .L2094
+	mov	w2, 1896
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2094:
+	ldr	w0, [x29, 180]
+	cmp	w0, 0
+	ccmp	w21, w0, 4, ne
+	beq	.L2095
+	mov	w2, 1897
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2095:
+	strh	wzr, [x19, 2]
+	b	.L2250
+.L2097:
+	ldrh	w2, [x4]
+	cmp	w2, w8
+	beq	.L2096
+	umaddl	x5, w27, w10, x0
+	orr	w2, w23, w2, lsl 10
+	add	w3, w27, 1
+	str	w2, [x5, 4]
+	mul	w2, w27, w7
+	and	w27, w3, 65535
+	str	xzr, [x5, 8]
+	asr	w2, w2, 2
+	add	x2, x6, x2, sxtw 2
+	str	x2, [x5, 16]
+.L2096:
+	add	x4, x4, 2
+	b	.L2093
+.L2169:
+	str	wzr, [x29, 176]
+	b	.L2098
+.L2104:
+	mov	x0, 56
+	ldr	x2, [x22, #:lo12:.LANCHOR178]
+	mul	x0, x28, x0
+	add	x1, x2, x0
+	ldr	w0, [x2, x0]
+	cbnz	w0, .L2100
+	ldr	x6, [x1, 16]
+	ldr	w4, [x6, 4]
+	cmn	w4, #1
+	beq	.L2101
+	ldr	x0, [x29, 168]
+	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	mov	w0, w4
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2101
+	ldr	x0, [x29, 168]
+	add	w4, w4, 1
+	str	w4, [x0, #:lo12:.LANCHOR158]
+.L2101:
+	ldr	w0, [x6]
+	cmn	w0, #1
+	bne	.L2103
+.L2102:
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	and	x28, x28, 65535
+	mov	x1, 56
+	and	w20, w20, 65535
+	madd	x28, x28, x1, x0
+	ldr	w0, [x28, 4]
+	b	.L2245
+.L2100:
+	ldr	w1, [x1, 4]
+	mov	x0, x24
+	bl	printf
+	ldrh	w0, [x19]
+	and	w5, w23, 65535
+	strh	w0, [x25]
+.L2103:
+	add	x28, x28, 1
+	b	.L2099
+.L2108:
+	mov	w0, 65535
+	cmp	w5, w0
+	bne	.L2109
+	cbnz	w1, .L2110
+.L2109:
+	adrp	x24, .LANCHOR133
+	and	w6, w23, 65535
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	cmn	w0, #1
+	bne	.L2111
+	str	w21, [x24, #:lo12:.LANCHOR133]
+.L2111:
+	add	w0, w26, 7
+	ldr	w7, [x24, #:lo12:.LANCHOR133]
+	cmp	w0, w23, uxth
+	bge	.L2170
+	sub	w23, w6, #7
+	and	w23, w23, 65535
+.L2112:
+	mov	w3, -1
+	adrp	x5, .LANCHOR117
+	mov	w28, w3
+	add	x5, x5, :lo12:.LANCHOR117
+	mov	w4, 65535
+.L2113:
+	cmp	w23, w6
+	bhi	.L2128
+	ldr	x1, [x29, 160]
+	mov	w25, 0
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w10, 56
+	ldr	x2, [x29, 184]
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	add	x1, x1, 8
+	add	x1, x19, x1, lsl 1
+	b	.L2129
+.L2170:
+	mov	w23, w26
+	b	.L2112
+.L2115:
+	ldrh	w8, [x2]
+	cmp	w8, w4
+	beq	.L2114
+	umaddl	x11, w25, w10, x0
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	orr	w8, w23, w8, lsl 10
+	str	w8, [x11, 4]
+.L2114:
+	add	x2, x2, 2
+.L2129:
+	cmp	x2, x1
+	bne	.L2115
+	ldr	w2, [x29, 176]
+	mov	w1, w25
+	str	x5, [x29, 112]
+	str	w4, [x29, 120]
+	str	w7, [x29, 128]
+	str	w6, [x29, 136]
+	str	w3, [x29, 152]
+	bl	FlashReadPages
+	adrp	x1, .LANCHOR8
+	mov	w2, 56
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	sxtw	x12, w23
+	ldrb	w10, [x1, #:lo12:.LANCHOR8]
+	mov	w11, 1
+	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	ldr	w4, [x29, 120]
+	ldr	w7, [x29, 128]
+	ldr	w6, [x29, 136]
+	ldr	w3, [x29, 152]
+	nop // between mem op and mult-accumulate
+	umaddl	x25, w25, w2, x1
+	ldr	x5, [x29, 112]
+	mov	w2, 0
+.L2116:
+	cmp	x25, x1
+	bne	.L2126
+	cbz	w2, .L2127
+	str	w0, [x24, #:lo12:.LANCHOR133]
+.L2127:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L2113
+.L2126:
+	ldr	w8, [x1]
+	cbnz	w8, .L2117
+	ldr	x8, [x1, 16]
+	ldrh	w13, [x8]
+	cmp	w13, w4
+	beq	.L2172
+	ldr	w8, [x8, 4]
+	cmn	w8, #1
+	beq	.L2172
+	cmn	w3, #1
+	bne	.L2174
+	ldrh	w2, [x5, x12, lsl 1]
+	cmp	w2, w4
+	bne	.L2119
+	cbz	w10, .L2174
+.L2119:
+	cmp	w21, w0
+	mov	w2, w11
+	csel	w3, w3, w0, eq
+.L2118:
+	mov	w28, w0
+	add	x1, x1, 56
+	mov	w0, w8
+	b	.L2116
+.L2117:
+	cbz	w2, .L2120
+	str	w0, [x24, #:lo12:.LANCHOR133]
+.L2120:
+	adrp	x0, .LANCHOR229
+	ldrh	w1, [x19]
+	strh	w1, [x0, #:lo12:.LANCHOR229]
+	ldrb	w0, [x19, 8]
+	cbnz	w0, .L2110
+	adrp	x0, .LANCHOR117
+	add	x0, x0, :lo12:.LANCHOR117
+	ldrh	w1, [x0, w23, sxtw 1]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2122
+	cmn	w3, #1
+	beq	.L2123
+	str	w3, [x24, #:lo12:.LANCHOR133]
+.L2110:
+	mov	w1, 1
+	adrp	x0, .LANCHOR230
+	mov	w23, w26
+	adrp	x28, .LANCHOR133
+	strh	w1, [x0, #:lo12:.LANCHOR230]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapBlkWriteDumpData
+	add	x0, x28, :lo12:.LANCHOR133
+	str	x0, [x29, 112]
+.L2130:
+	ldr	x2, [x29, 160]
+	adrp	x1, .LANCHOR8
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w24, 0
+	ldrb	w5, [x1, #:lo12:.LANCHOR8]
+	mov	w6, 65535
+	ldr	x3, [x29, 184]
+	ldrh	w2, [x2, #:lo12:.LANCHOR36]
+	str	x1, [x29, 128]
+	add	x2, x2, 8
+	add	x2, x19, x2, lsl 1
+.L2131:
+	cmp	x2, x3
+	bne	.L2134
+	ldr	w2, [x29, 176]
+	mov	w1, w24
+	mov	x25, 0
+	bl	FlashReadPages
+	mov	w0, 56
+	umull	x0, w24, w0
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR229
+	add	x0, x0, :lo12:.LANCHOR229
+	str	x0, [x29, 120]
+.L2135:
+	ldr	x0, [x29, 136]
+	cmp	x25, x0
+	bne	.L2161
+	ldrb	w0, [x19, 8]
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	cmp	w0, 1
+	bne	.L2162
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2162
+	adrp	x0, .LANCHOR52
+	ldrh	w0, [x0, #:lo12:.LANCHOR52]
+	cmp	w0, w23
+	bne	.L2162
+	cmp	w20, w23
+	beq	.L2137
+.L2162:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w23
+	bne	.L2130
+	ldr	x0, [x29, 160]
+	mov	w2, 65535
+	strh	w23, [x19, 2]
+	strh	wzr, [x19, 4]
+	ldrh	w1, [x0, #:lo12:.LANCHOR36]
+	mov	w0, 0
+.L2163:
+	cmp	w0, w1
+	beq	.L2243
+	ldr	x4, [x29, 184]
+	ldrh	w3, [x4], 2
+	str	x4, [x29, 184]
+	cmp	w3, w2
+	beq	.L2164
+	strb	w0, [x19, 6]
+	b	.L2243
+.L2123:
+	cmp	w21, w7
+	beq	.L2124
+	str	w7, [x24, #:lo12:.LANCHOR133]
+	b	.L2110
+.L2124:
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+.L2252:
+	sub	w0, w0, #1
+.L2246:
+	str	w0, [x24, #:lo12:.LANCHOR133]
+	b	.L2110
+.L2122:
+	cmp	w28, w21
+	beq	.L2125
+	cmn	w28, #1
+	beq	.L2110
+	str	w28, [x24, #:lo12:.LANCHOR133]
+	b	.L2110
+.L2125:
+	ldr	w0, [x24, #:lo12:.LANCHOR133]
+	cmp	w21, w0
+	bne	.L2252
+	b	.L2110
+.L2172:
+	mov	w8, w0
+	mov	w0, w28
+	b	.L2118
+.L2174:
+	mov	w2, 1
+	b	.L2118
+.L2128:
+	mov	w0, -1
+	b	.L2246
+.L2134:
+	ldrh	w1, [x3]
+	cmp	w1, w6
+	beq	.L2132
+	mov	w4, 56
+	orr	w1, w23, w1, lsl 10
+	umaddl	x4, w24, w4, x0
+	str	w1, [x4, 4]
+	ldrb	w7, [x19, 8]
+	cmp	w7, 1
+	bne	.L2133
+	cbz	w5, .L2133
+	orr	w1, w1, -2147483648
+	str	w1, [x4, 4]
+.L2133:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+.L2132:
+	add	x3, x3, 2
+	b	.L2131
+.L2161:
+	ldr	x4, [x22, #:lo12:.LANCHOR178]
+	add	x4, x4, x25
+	ldr	w5, [x4, 4]
+	str	w5, [x29, 204]
+	lsr	w0, w5, 10
+	bl	P2V_plane
+	and	w0, w0, 65535
+	cmp	w23, w26
+	bcc	.L2136
+	ldr	w1, [x29, 180]
+	ccmp	w1, w0, 0, eq
+	bhi	.L2136
+	cmp	w23, w20
+	ccmp	w27, w0, 0, eq
+	beq	.L2137
+	ldr	w0, [x4]
+	cmn	w0, #1
+	beq	.L2138
+	ldr	x3, [x4, 16]
+	mov	w0, 61589
+	ldrh	w1, [x3]
+	cmp	w1, w0
+	beq	.L2139
+.L2145:
+	ldrh	w0, [x19]
+.L2249:
+	bl	decrement_vpc_count
+.L2136:
+	add	x25, x25, 56
+	b	.L2135
+.L2139:
+	ldr	w21, [x3, 4]
+	cmn	w21, #1
+	beq	.L2140
+	ldr	x0, [x29, 168]
+	ldr	w1, [x0, #:lo12:.LANCHOR158]
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2140
+	ldr	x1, [x29, 168]
+	add	w0, w21, 1
+	str	w0, [x1, #:lo12:.LANCHOR158]
+.L2140:
+	ldp	w24, w0, [x3, 8]
+	add	x1, x29, 200
+	str	w0, [x29, 196]
+	mov	w2, 0
+	mov	w0, w24
+	bl	log2phys
+	ldr	w1, [x28, #:lo12:.LANCHOR133]
+	cmn	w1, #1
+	beq	.L2141
+	mov	w0, w21
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2141
+	ldr	w1, [x29, 196]
+	cmn	w1, #1
+	beq	.L2142
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w2, 0
+	add	x0, x0, x25
+	ldr	x3, [x0, 16]
+	str	w1, [x0, 4]
+	mov	w1, 1
+	str	x3, [x29, 152]
+	bl	FlashReadPages
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	x3, [x29, 152]
+	add	x4, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L2143
+.L2144:
+	mov	w0, -1
+	str	w0, [x29, 196]
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+.L2152:
+	ldr	w3, [x29, 196]
+	cmn	w3, #1
+	beq	.L2136
+.L2167:
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	and	w24, w0, 65535
+	adrp	x0, .LANCHOR38
+	mov	w3, w24
+	ldrh	w0, [x0, #:lo12:.LANCHOR38]
+	cmp	w0, w24
+	bhi	.L2157
+	mov	w2, 2179
+	adrp	x1, .LANCHOR228
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR228
+	add	x0, x0, :lo12:.LC4
+	str	w24, [x29, 152]
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldr	w3, [x29, 152]
+.L2157:
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x24, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	ldrh	w0, [x1, x0]
+	cbz	w0, .L2158
+	mov	w0, w3
+	b	.L2249
+.L2142:
+	ldp	w1, w0, [x29, 200]
+	cmp	w1, w0
+	bne	.L2145
+	mov	w2, 1
+	add	x1, x29, 196
+	mov	w0, w24
+	bl	log2phys
+	b	.L2145
+.L2143:
+	ldr	w0, [x3, 8]
+	cmp	w24, w0
+	bne	.L2144
+	ldr	w0, [x3, 4]
+	str	w0, [x29, 152]
+	str	x3, [x29, 104]
+	uxtw	x1, w0
+	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2144
+	ldp	w0, w1, [x29, 200]
+	ldr	x3, [x29, 104]
+	cmp	w0, w1
+	ldr	w1, [x29, 196]
+	bne	.L2147
+.L2247:
+	mov	w0, w24
+	bl	FtlReUsePrevPpa
+	b	.L2144
+.L2147:
+	cmp	w0, w1
+	beq	.L2144
+	cmn	w0, #1
+	beq	.L2148
+	ldr	x3, [x4, 16]
+	mov	w2, 0
+	str	w0, [x4, 4]
+	mov	w1, 1
+	str	x3, [x29, 104]
+	mov	x0, x4
+	bl	FlashReadPages
+	ldr	x3, [x29, 104]
+.L2149:
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	beq	.L2150
+	ldr	x0, [x29, 112]
+	ldr	w3, [x3, 4]
+	mov	w1, w3
+	ldr	w0, [x0]
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2150
+	ldr	w0, [x29, 152]
+	mov	w1, w3
+	bl	ftl_cmp_data_ver
+	cbz	w0, .L2144
+.L2150:
+	ldr	w1, [x29, 196]
+	b	.L2247
+.L2148:
+	str	w0, [x4]
+	b	.L2149
+.L2141:
+	ldp	w1, w0, [x29, 200]
+	cmp	w1, w0
+	beq	.L2152
+	mov	w2, 1
+	add	x1, x29, 204
+	mov	w0, w24
+	bl	log2phys
+	ldr	w3, [x29, 200]
+	cmn	w3, #1
+	beq	.L2152
+	ldr	w0, [x29, 196]
+	cmp	w3, w0
+	beq	.L2167
+	lsr	w0, w3, 10
+	bl	P2V_block_in_plane
+	adrp	x1, .LANCHOR90
+	and	w0, w0, 65535
+	ldrh	w1, [x1, #:lo12:.LANCHOR90]
+	cmp	w1, w0
+	beq	.L2156
+	adrp	x1, .LANCHOR91
+	ldrh	w1, [x1, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	beq	.L2156
+	adrp	x1, .LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	cmp	w1, w0
+	bne	.L2152
+.L2156:
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w2, 0
+	mov	w1, 1
+	ldr	x4, [x0, 16]
+	str	w3, [x0, 4]
+	str	x4, [x29, 152]
+	bl	FlashReadPages
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	ldr	w0, [x0]
+	cmn	w0, #1
+	beq	.L2152
+	ldr	x4, [x29, 152]
+	mov	w0, w21
+	ldr	w1, [x4, 4]
+	bl	ftl_cmp_data_ver
+	cbnz	w0, .L2152
+	mov	w2, 1
+	add	x1, x29, 200
+	mov	w0, w24
+	bl	log2phys
+	b	.L2152
+.L2158:
+	mov	w1, w24
+	adrp	x0, .LC44
+	add	x0, x0, :lo12:.LC44
+	bl	printf
+	b	.L2136
+.L2138:
+	ldr	x1, [x29, 120]
+	mov	w2, w21
+	ldrh	w0, [x19]
+	strh	w0, [x1]
+	mov	w1, w5
+	adrp	x0, .LC45
+	add	x0, x0, :lo12:.LC45
+	bl	printf
+	adrp	x2, .LANCHOR231
+	ldr	w0, [x2, #:lo12:.LANCHOR231]
+	cmp	w0, 31
+	bhi	.L2159
+	adrp	x1, .LANCHOR232
+	add	x1, x1, :lo12:.LANCHOR232
+	ldr	w3, [x29, 204]
+	str	w3, [x1, w0, uxtw 2]
+	add	w0, w0, 1
+	str	w0, [x2, #:lo12:.LANCHOR231]
+.L2159:
+	ldrh	w0, [x19]
+	bl	decrement_vpc_count
+	ldr	w0, [x28, #:lo12:.LANCHOR133]
+	cmn	w0, #1
+	bne	.L2160
+.L2248:
+	str	w21, [x28, #:lo12:.LANCHOR133]
+	b	.L2136
+.L2160:
+	cmp	w21, w0
+	bcs	.L2136
+	b	.L2248
+.L2164:
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	b	.L2163
+.L2137:
+	strb	w27, [x19, 6]
+	strh	w20, [x19, 2]
+	b	.L2251
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",@progbits
+	.align	2
+	.global	FtlGcScanTempBlk
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR233
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	ldrh	w19, [x23, #:lo12:.LANCHOR233]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	cmp	w19, w0
+	stp	x27, x28, [sp, 80]
+	beq	.L2271
+	cbnz	w19, .L2254
+.L2255:
+	bl	FtlGcPageVarInit
+	b	.L2256
+.L2271:
+	mov	w19, 0
+.L2254:
+	adrp	x0, .LANCHOR51
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w1
+	beq	.L2255
+.L2256:
+	adrp	x25, .LANCHOR57
+	add	x25, x25, :lo12:.LANCHOR57
+	mov	w26, -1
+	mov	w24, 65535
+.L2268:
+	ldrh	w0, [x20]
+	strb	wzr, [x20, 8]
+	cmp	w0, w24
+	beq	.L2272
+	mov	w27, 56
+.L2270:
+	adrp	x1, .LANCHOR105
+	adrp	x22, .LANCHOR178
+	ldrh	w6, [x25]
+	add	x3, x20, 16
+	ldr	x5, [x1, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR36
+	ldr	x0, [x22, #:lo12:.LANCHOR178]
+	mov	w21, 0
+	ldrh	w1, [x1, #:lo12:.LANCHOR36]
+	add	x1, x1, 8
+	add	x1, x20, x1, lsl 1
+.L2258:
+	cmp	x3, x1
+	bne	.L2260
+	mov	w1, w21
+	umull	x21, w21, w27
+	mov	x28, 0
+	mov	w2, 0
+	bl	FlashReadPages
+.L2261:
+	cmp	x28, x21
+	bne	.L2269
+	adrp	x0, .LANCHOR51
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR51]
+	cmp	w0, w19
+	bhi	.L2270
+.L2272:
+	mov	w2, 0
+	b	.L2257
+.L2260:
+	ldrh	w2, [x3]
+	cmp	w2, w24
+	beq	.L2259
+	umaddl	x4, w21, w27, x0
+	orr	w2, w19, w2, lsl 10
+	str	w2, [x4, 4]
+	mul	w2, w21, w6
+	add	w21, w21, 1
+	str	xzr, [x4, 8]
+	and	w21, w21, 65535
+	asr	w2, w2, 2
+	add	x2, x5, x2, sxtw 2
+	str	x2, [x4, 16]
+.L2259:
+	add	x3, x3, 2
+	b	.L2258
+.L2269:
+	ldr	x6, [x22, #:lo12:.LANCHOR178]
+	add	x5, x6, x28
+	ldr	w4, [x5, 4]
+	lsr	w0, w4, 10
+	bl	P2V_plane
+	and	w2, w0, 65535
+	ldr	w0, [x6, x28]
+	cbnz	w0, .L2262
+	ldr	x0, [x5, 16]
+	add	x28, x28, 56
+	ldrh	w1, [x0]
+	cmp	w1, w24
+	bne	.L2263
+	adrp	x0, .LANCHOR132
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR132]
+.L2257:
+	strb	w2, [x20, 6]
+	mov	w0, -1
+	strh	w19, [x20, 2]
+	mov	w1, w19
+	strh	w0, [x23, #:lo12:.LANCHOR233]
+	mov	x0, x20
+	bl	ftl_sb_update_avl_pages
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2263:
+	ldp	w2, w0, [x0, 8]
+	mov	w1, w4
+	bl	FtlGcUpdatePage
+	b	.L2261
+.L2262:
+	ldrh	w1, [x20]
+	mov	w2, w4
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+	adrp	x0, .LANCHOR101
+	ldr	w1, [x0, #:lo12:.LANCHOR101]
+	ldrh	w0, [x20]
+	cbnz	w1, .L2264
+	adrp	x1, .LANCHOR8
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cbz	w1, .L2265
+.L2264:
+	adrp	x2, .LANCHOR77
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR77]
+	ldrh	w1, [x2, x1]
+	cmp	w1, 119
+	bls	.L2266
+.L2265:
+	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	ldr	w1, [x1, x28]
+	cmn	w1, #1
+	bne	.L2267
+.L2266:
+	ldr	x1, [x22, #:lo12:.LANCHOR178]
+	add	x28, x1, x28
+	ldr	w26, [x28, 4]
+.L2267:
+	adrp	x1, .LANCHOR82
+	ubfiz	x0, x0, 1, 16
+	mov	w19, 0
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	strh	wzr, [x1, x0]
+	ldrh	w0, [x20]
+	bl	INSERT_FREE_LIST
+	mov	w0, -1
+	strh	w0, [x20]
+	bl	FtlGcPageVarInit
+	b	.L2268
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlGcFreeTempBlock,"ax",@progbits
+	.align	2
+	.global	FtlGcFreeTempBlock
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbz	w0, .L2282
+	mov	w0, 0
+	ret
+.L2282:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR92
+	stp	x21, x22, [sp, 32]
+	add	x0, x19, :lo12:.LANCHOR92
+	ldrh	w20, [x19, #:lo12:.LANCHOR92]
+	adrp	x21, .LANCHOR132
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w20, w1
+	str	x27, [sp, 80]
+	beq	.L2284
+	adrp	x1, .LANCHOR51
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	bl	FtlGcScanTempBlk
+	str	w0, [x29, 108]
+	cmn	w0, #1
+	beq	.L2284
+	adrp	x0, .LANCHOR77
+	ubfiz	x20, x20, 1, 16
+	ldr	x1, [x0, #:lo12:.LANCHOR77]
+	ldrh	w0, [x1, x20]
+	cmp	w0, 4
+	bls	.L2285
+	sub	w0, w0, #5
+	strh	w0, [x1, x20]
+	mov	w0, 1
+	bl	FtlEctTblFlush
+.L2285:
+	ldr	w0, [x21, #:lo12:.LANCHOR132]
+	cbnz	w0, .L2286
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w1, [x0, 96]
+	add	w1, w1, 1
+	str	w1, [x0, 96]
+	ldr	w0, [x29, 108]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2286:
+	str	wzr, [x21, #:lo12:.LANCHOR132]
+	mov	w0, 1
+.L2281:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2284:
+	str	wzr, [x21, #:lo12:.LANCHOR132]
+	mov	w0, 65535
+	ldrh	w1, [x19, #:lo12:.LANCHOR92]
+	add	x21, x19, :lo12:.LANCHOR92
+	cmp	w1, w0
+	beq	.L2307
+	bl	FtlCacheWriteBack
+	adrp	x20, .LANCHOR110
+	adrp	x0, .LANCHOR51
+	ldrb	w1, [x21, 7]
+	ldrh	w2, [x20, #:lo12:.LANCHOR110]
+	mov	x21, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR51]
+	mul	w1, w1, w3
+	cmp	w2, w1
+	beq	.L2288
+	mov	w2, 163
+	adrp	x1, .LANCHOR234
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR234
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2288:
+	add	x0, x19, :lo12:.LANCHOR92
+	adrp	x23, .LANCHOR82
+	ldrh	w3, [x21, #:lo12:.LANCHOR51]
+	adrp	x25, .LANCHOR71
+	ldrh	w2, [x19, #:lo12:.LANCHOR92]
+	adrp	x26, .LANCHOR234
+	ldrb	w0, [x0, 7]
+	add	x25, x25, :lo12:.LANCHOR71
+	ldr	x1, [x23, #:lo12:.LANCHOR82]
+	add	x26, x26, :lo12:.LANCHOR234
+	mov	w21, 0
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x1, .LANCHOR159
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+	ldr	w2, [x1, #:lo12:.LANCHOR159]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR159]
+.L2289:
+	ldrh	w0, [x20, #:lo12:.LANCHOR110]
+	cmp	w0, w21
+	bhi	.L2293
+	mov	w0, -1
+	bl	decrement_vpc_count
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2294
+	ldrh	w1, [x19, #:lo12:.LANCHOR92]
+	adrp	x0, .LC47
+	add	x0, x0, :lo12:.LC47
+	bl	printf
+.L2294:
+	ldrh	w0, [x19, #:lo12:.LANCHOR92]
+	ldr	x2, [x23, #:lo12:.LANCHOR82]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2295
+	bl	INSERT_DATA_LIST
+.L2296:
+	adrp	x0, .LANCHOR108
+	mov	w21, -1
+	strh	wzr, [x20, #:lo12:.LANCHOR110]
+	strh	w21, [x19, #:lo12:.LANCHOR92]
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	adrp	x0, .LANCHOR87
+	ldrh	w1, [x0, #:lo12:.LANCHOR87]
+	adrp	x0, .LANCHOR227
+	ldrh	w0, [x0, #:lo12:.LANCHOR227]
+	add	w0, w0, w0, lsl 1
+	cmp	w1, w0, lsr 2
+	ble	.L2307
+	adrp	x0, .LANCHOR201
+	mov	w1, 20
+	strh	w21, [x0, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR174
+	strh	w1, [x0, #:lo12:.LANCHOR174]
+.L2307:
+	mov	w0, 0
+	b	.L2281
+.L2293:
+	adrp	x0, .LANCHOR111
+	mov	w24, 12
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	umull	x24, w21, w24
+	ldr	w0, [x25]
+	add	x22, x27, x24
+	ldr	w1, [x22, 8]
+	cmp	w1, w0
+	bcc	.L2290
+	mov	w2, 168
+	mov	x1, x26
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2290:
+	ldr	w0, [x22, 8]
+	add	x1, x29, 108
+	mov	w2, 0
+	bl	log2phys
+	ldr	w0, [x27, x24]
+	ldr	w1, [x29, 108]
+	cmp	w0, w1
+	bne	.L2291
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	mov	w24, w0
+	ldr	w0, [x22, 8]
+	mov	w2, 1
+	add	x1, x22, 4
+	bl	log2phys
+	mov	w0, w24
+.L2306:
+	bl	decrement_vpc_count
+.L2292:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2289
+.L2291:
+	ldr	w0, [x22, 4]
+	cmp	w1, w0
+	beq	.L2292
+	ldrh	w0, [x19, #:lo12:.LANCHOR92]
+	b	.L2306
+.L2295:
+	bl	INSERT_FREE_LIST
+	b	.L2296
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",@progbits
+	.align	2
+	.global	Ftl_get_new_temp_ppa
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR92
+	mov	w2, 65535
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	ldrh	w3, [x0, #:lo12:.LANCHOR92]
+	cmp	w3, w2
+	beq	.L2309
+	add	x1, x0, :lo12:.LANCHOR92
+	ldrh	w0, [x1, 4]
+	cbnz	w0, .L2310
+.L2309:
+	bl	FtlCacheWriteBack
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	add	x0, x19, :lo12:.LANCHOR92
+	strb	wzr, [x0, 8]
+	bl	allocate_data_superblock
+	adrp	x0, .LANCHOR108
+	strh	wzr, [x0, #:lo12:.LANCHOR108]
+	adrp	x0, .LANCHOR110
+	strh	wzr, [x0, #:lo12:.LANCHOR110]
+	bl	l2p_flush
+	mov	w0, 0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2310:
+	add	x0, x19, :lo12:.LANCHOR92
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	get_new_active_ppa
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",@progbits
+	.align	2
+	.global	Ftl_gc_temp_data_write_back
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR8
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR102
+	cbz	w0, .L2313
+	ldr	w0, [x19, #:lo12:.LANCHOR102]
+	tbz	x0, 0, .L2313
+	adrp	x0, .LANCHOR92+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
+	cbz	w0, .L2313
+.L2318:
+	mov	w0, 0
+.L2312:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2313:
+	adrp	x20, .LANCHOR179
+	ldr	w1, [x19, #:lo12:.LANCHOR102]
+	mov	w3, 0
+	mov	w2, 0
+	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	add	x19, x19, :lo12:.LANCHOR102
+	bl	FlashProgPages
+	mov	w11, 0
+	mov	w12, 56
+.L2315:
+	ldr	w1, [x19]
+	cmp	w11, w1
+	bcc	.L2317
+	ldr	x0, [x20, #:lo12:.LANCHOR179]
+	bl	FtlGcBufFree
+	str	wzr, [x19]
+	adrp	x0, .LANCHOR92+4
+	ldrh	w0, [x0, #:lo12:.LANCHOR92+4]
+	cbnz	w0, .L2318
+	mov	w0, 1
+	bl	FtlGcFreeTempBlock
+	b	.L2329
+.L2317:
+	umull	x0, w11, w12
+	ldr	x2, [x20, #:lo12:.LANCHOR179]
+	add	x1, x2, x0
+	ldr	w2, [x2, x0]
+	cmn	w2, #1
+	bne	.L2316
+	adrp	x0, .LANCHOR92
+	adrp	x3, .LANCHOR82
+	ldrh	w4, [x0, #:lo12:.LANCHOR92]
+	ldr	x3, [x3, #:lo12:.LANCHOR82]
+	strh	wzr, [x3, x4, lsl 1]
+	strh	w2, [x0, #:lo12:.LANCHOR92]
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w2, [x0, 96]
+	add	w2, w2, 1
+	str	w2, [x0, 96]
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2329:
+	mov	w0, 1
+	b	.L2312
+.L2316:
+	ldr	x0, [x1, 16]
+	ldr	w1, [x1, 4]
+	ldp	w2, w0, [x0, 8]
+	bl	FtlGcUpdatePage
+	add	w11, w11, 1
+	and	w11, w11, 65535
+	b	.L2315
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.FtlGcPageRecovery,"ax",@progbits
+	.align	2
+	.global	FtlGcPageRecovery
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR51
+	adrp	x19, .LANCHOR92
+	add	x19, x19, :lo12:.LANCHOR92
+	ldrh	w1, [x20, #:lo12:.LANCHOR51]
+	mov	x0, x19
+	bl	FtlGcScanTempBlk
+	ldrh	w1, [x19, 2]
+	ldrh	w0, [x20, #:lo12:.LANCHOR51]
+	cmp	w1, w0
+	bcc	.L2330
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapBlkWriteDumpData
+	mov	w0, 0
+	bl	FtlGcFreeTempBlock
+	adrp	x0, .LANCHOR132
+	str	wzr, [x0, #:lo12:.LANCHOR132]
+.L2330:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",@progbits
+	.align	2
+	.global	FtlPowerLostRecovery
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR231
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR90
+	add	x19, x19, :lo12:.LANCHOR90
+	str	wzr, [x0, #:lo12:.LANCHOR231]
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	adrp	x19, .LANCHOR91
+	bl	FtlSlcSuperblockCheck
+	add	x19, x19, :lo12:.LANCHOR91
+	mov	x0, x19
+	bl	FtlRecoverySuperblock
+	mov	x0, x19
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	mov	w0, -1
+	bl	decrement_vpc_count
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",@progbits
+	.align	2
+	.global	FtlSysBlkInit
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR229
+	mov	w1, -1
+	add	x29, sp, 0
+	strh	w1, [x0, #:lo12:.LANCHOR229]
+	adrp	x0, .LANCHOR37
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR230
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	stp	x21, x22, [sp, 32]
+	strh	wzr, [x19, #:lo12:.LANCHOR230]
+	str	x23, [sp, 48]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	adrp	x0, .LANCHOR206
+	ldrh	w1, [x0, #:lo12:.LANCHOR206]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2336
+.L2338:
+	mov	w23, -1
+.L2335:
+	mov	w0, w23
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L2336:
+	bl	FtlLoadSysInfo
+	mov	w23, w0
+	cbnz	w0, .L2338
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	mov	w0, 1
+	bl	FtlUpdateVaildLpn
+	adrp	x2, .LANCHOR66
+	adrp	x0, .LANCHOR95
+	mov	x3, 4
+	ldrh	w2, [x2, #:lo12:.LANCHOR66]
+	ldr	x0, [x0, #:lo12:.LANCHOR95]
+	add	x2, x3, x2, uxtw 4
+	add	x1, x0, 4
+	add	x0, x0, x2
+.L2339:
+	cmp	x1, x0
+	bne	.L2341
+	ldrh	w0, [x19, #:lo12:.LANCHOR230]
+	cbnz	w0, .L2340
+	b	.L2335
+.L2341:
+	ldr	w2, [x1], 16
+	tbz	w2, #31, .L2339
+.L2340:
+	adrp	x22, .LANCHOR90
+	add	x20, x22, :lo12:.LANCHOR90
+	mov	x0, x20
+	adrp	x21, .LANCHOR91
+	bl	FtlSuperblockPowerLostFix
+	add	x19, x21, :lo12:.LANCHOR91
+	mov	x0, x19
+	bl	FtlSuperblockPowerLostFix
+	adrp	x0, .LANCHOR82
+	ldrh	w3, [x20, 4]
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	ldrh	w0, [x22, #:lo12:.LANCHOR90]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w3
+	adrp	x3, .LANCHOR51
+	strh	w2, [x1, x0]
+	strb	wzr, [x20, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	strh	w0, [x20, 2]
+	ldrh	w0, [x21, #:lo12:.LANCHOR91]
+	strh	wzr, [x20, 4]
+	ldrh	w4, [x19, 4]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	sub	w2, w2, w4
+	strh	w2, [x1, x0]
+	strb	wzr, [x19, 6]
+	ldrh	w0, [x3, #:lo12:.LANCHOR51]
+	strh	w0, [x19, 2]
+	strh	wzr, [x19, 4]
+	adrp	x0, .LANCHOR124
+	add	x0, x0, :lo12:.LANCHOR124
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR215
+	add	x0, x0, :lo12:.LANCHOR215
+	bl	FtlMapBlkWriteDumpData
+	adrp	x0, .LANCHOR135
+	add	x0, x0, :lo12:.LANCHOR135
+	ldrh	w1, [x0, 30]
+	add	w1, w1, 1
+	strh	w1, [x0, 30]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2335
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.rk_ftl_garbage_collect,"ax",@progbits
+	.align	2
+	.global	rk_ftl_garbage_collect
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	adrp	x1, .LANCHOR75
+	ldr	w1, [x1, #:lo12:.LANCHOR75]
+	cbnz	w1, .L2398
+	stp	x29, x30, [sp, -192]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR169
+	stp	x19, x20, [sp, 16]
+	ldr	w1, [x21, #:lo12:.LANCHOR169]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w1, .L2400
+	adrp	x1, .LANCHOR84
+	ldrh	w1, [x1, #:lo12:.LANCHOR84]
+	cmp	w1, 47
+	bls	.L2400
+	adrp	x1, .LANCHOR113
+	mov	w4, 65535
+	ldrh	w3, [x1, #:lo12:.LANCHOR113]
+	cmp	w3, w4
+	beq	.L2348
+	adrp	x2, .LANCHOR112
+	ldrh	w5, [x2, #:lo12:.LANCHOR112]
+	cmp	w5, w4
+	bne	.L2348
+	strh	w3, [x2, #:lo12:.LANCHOR112]
+	mov	w2, -1
+	strh	w2, [x1, #:lo12:.LANCHOR113]
+.L2348:
+	cbnz	w0, .L2401
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, 24
+	bhi	.L2402
+	adrp	x1, .LANCHOR51
+	cmp	w0, 16
+	ldrh	w20, [x1, #:lo12:.LANCHOR51]
+	bls	.L2351
+	lsr	w20, w20, 5
+.L2350:
+	adrp	x2, .LANCHOR174
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR174]
+	cmp	w1, w0
+	bcs	.L2354
+	adrp	x0, .LANCHOR92
+	mov	w1, 65535
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w0, w1
+	bne	.L2355
+	adrp	x1, .LANCHOR112
+	ldrh	w1, [x1, #:lo12:.LANCHOR112]
+	cmp	w1, w0
+	bne	.L2355
+	adrp	x0, .LANCHOR235
+	ldrh	w0, [x0, #:lo12:.LANCHOR235]
+	cbnz	w0, .L2356
+	adrp	x1, .LANCHOR71
+	adrp	x4, .LANCHOR99
+	ldr	w1, [x1, #:lo12:.LANCHOR71]
+	ldr	w4, [x4, #:lo12:.LANCHOR99]
+	add	w1, w1, w1, lsl 1
+	cmp	w4, w1, lsr 2
+	bcs	.L2357
+.L2356:
+	adrp	x1, .LANCHOR227
+	ldrh	w1, [x1, #:lo12:.LANCHOR227]
+	add	w1, w1, w1, lsl 1
+	asr	w1, w1, 2
+	strh	w1, [x3, #:lo12:.LANCHOR174]
+.L2358:
+	adrp	x1, .LANCHOR170
+	str	wzr, [x1, #:lo12:.LANCHOR170]
+.L2346:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 192
+	ret
+.L2351:
+	cmp	w0, 12
+	bls	.L2352
+	lsr	w20, w20, 4
+	b	.L2350
+.L2352:
+	cmp	w0, 8
+	bls	.L2350
+	lsr	w20, w20, 2
+	b	.L2350
+.L2402:
+	mov	w20, 1
+	b	.L2350
+.L2357:
+	mov	w1, 18
+	strh	w1, [x2, #:lo12:.LANCHOR174]
+	b	.L2358
+.L2355:
+	adrp	x0, .LANCHOR227
+	ldrh	w0, [x0, #:lo12:.LANCHOR227]
+	add	w0, w0, w0, lsl 1
+	asr	w0, w0, 2
+	strh	w0, [x3, #:lo12:.LANCHOR174]
+.L2354:
+	adrp	x0, .LANCHOR114
+	ldrh	w0, [x0, #:lo12:.LANCHOR114]
+	cbz	w0, .L2349
+	add	w20, w20, 32
+	and	w20, w20, 65535
+.L2349:
+	adrp	x19, .LANCHOR201
+	mov	w0, 65535
+	ldrh	w2, [x19, #:lo12:.LANCHOR201]
+	cmp	w2, w0
+	bne	.L2361
+	adrp	x0, .LANCHOR112
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
+	cmp	w1, w2
+	beq	.L2362
+	adrp	x2, .LANCHOR82
+	ubfiz	x1, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR82]
+	ldrh	w1, [x2, x1]
+	cbnz	w1, .L2363
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2363:
+	ldrh	w1, [x0, #:lo12:.LANCHOR112]
+	strh	w1, [x19, #:lo12:.LANCHOR201]
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR112]
+.L2362:
+	add	x0, x19, :lo12:.LANCHOR201
+	mov	w1, 65535
+	strb	wzr, [x0, 8]
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	cmp	w0, w1
+	beq	.L2361
+	bl	IsBlkInGcList
+	cbz	w0, .L2365
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+.L2365:
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2366
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	add	x3, x19, :lo12:.LANCHOR201
+	bl	ftl_get_blk_mode
+	strb	w0, [x3, 8]
+.L2366:
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	mov	w0, 65535
+	add	x22, x19, :lo12:.LANCHOR201
+	cmp	w1, w0
+	beq	.L2361
+	mov	x0, x22
+	bl	make_superblock
+	adrp	x0, .LANCHOR236
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	strh	wzr, [x22, 2]
+	strh	wzr, [x0, #:lo12:.LANCHOR236]
+	adrp	x0, .LANCHOR82
+	strb	wzr, [x22, 6]
+	ldr	x0, [x0, #:lo12:.LANCHOR82]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR237
+	strh	w1, [x0, #:lo12:.LANCHOR237]
+.L2361:
+	adrp	x0, .LANCHOR90
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	str	x0, [x29, 144]
+	ldrh	w2, [x0, #:lo12:.LANCHOR90]
+	cmp	w2, w1
+	beq	.L2367
+	adrp	x0, .LANCHOR91
+	str	x0, [x29, 136]
+	ldrh	w2, [x0, #:lo12:.LANCHOR91]
+	cmp	w2, w1
+	beq	.L2367
+	adrp	x23, .LANCHOR176
+	add	x0, x23, :lo12:.LANCHOR176
+	str	x0, [x29, 168]
+.L2368:
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L2369
+	adrp	x0, .LANCHOR170
+	adrp	x22, .LANCHOR51
+	add	x22, x22, :lo12:.LANCHOR51
+	str	wzr, [x0, #:lo12:.LANCHOR170]
+.L2370:
+	ldrh	w5, [x23, #:lo12:.LANCHOR176]
+	add	x7, x23, :lo12:.LANCHOR176
+	mov	w0, w5
+	bl	List_get_gc_head_node
+	and	w6, w0, 65535
+	strh	w6, [x19, #:lo12:.LANCHOR201]
+	mov	w0, 65535
+	cmp	w6, w0
+	bne	.L2371
+	strh	wzr, [x7]
+	mov	w0, 8
+	b	.L2346
+.L2401:
+	mov	w20, 1
+	b	.L2349
+.L2367:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+.L2437:
+	adrp	x0, .LANCHOR235
+	ldrh	w0, [x0, #:lo12:.LANCHOR235]
+	b	.L2346
+.L2371:
+	mov	w0, w6
+	bl	IsBlkInGcList
+	add	w5, w5, 1
+	cbz	w0, .L2372
+	strh	w5, [x23, #:lo12:.LANCHOR176]
+	b	.L2370
+.L2372:
+	adrp	x24, .LANCHOR82
+	adrp	x4, .LANCHOR36
+	ldrh	w0, [x22]
+	ubfiz	x1, x6, 1, 16
+	ldr	x2, [x24, #:lo12:.LANCHOR82]
+	and	w5, w5, 65535
+	ldrh	w4, [x4, #:lo12:.LANCHOR36]
+	strh	w5, [x23, #:lo12:.LANCHOR176]
+	ldrh	w3, [x2, x1]
+	mul	w0, w0, w4
+	cmp	w3, w0, asr 1
+	bgt	.L2374
+	cmp	w5, 48
+	bls	.L2375
+	cmp	w3, 8
+	bls	.L2375
+	adrp	x3, .LANCHOR108
+	ldrh	w3, [x3, #:lo12:.LANCHOR108]
+	cmp	w3, 35
+	bhi	.L2375
+.L2374:
+	ldr	x3, [x29, 168]
+	strh	wzr, [x3]
+.L2375:
+	ldrh	w1, [x2, x1]
+	cmp	w0, w1
+	bgt	.L2376
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+	adrp	x0, .LANCHOR176
+	strh	wzr, [x0, #:lo12:.LANCHOR176]
+	b	.L2437
+.L2376:
+	cbnz	w1, .L2377
+	mov	w0, -1
+	bl	decrement_vpc_count
+	ldr	x0, [x29, 168]
+	ldr	x1, [x29, 168]
+	ldrh	w0, [x0]
+	add	w0, w0, 1
+	strh	w0, [x1]
+	b	.L2370
+.L2377:
+	adrp	x0, .LANCHOR8
+	add	x3, x19, :lo12:.LANCHOR201
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	strb	wzr, [x3, 8]
+	cbz	w0, .L2378
+	mov	w0, w6
+	bl	ftl_get_blk_mode
+	strb	w0, [x3, 8]
+.L2378:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	cmp	w0, w6
+	bne	.L2379
+	mov	w2, 835
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2379:
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	cmp	w1, w0
+	bne	.L2380
+	mov	w2, 836
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2380:
+	adrp	x0, .LANCHOR92
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	ldrh	w0, [x0, #:lo12:.LANCHOR92]
+	cmp	w1, w0
+	bne	.L2381
+	mov	w2, 837
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2381:
+	add	x22, x19, :lo12:.LANCHOR201
+	mov	x0, x22
+	bl	make_superblock
+	adrp	x0, .LANCHOR236
+	ldrh	w1, [x19, #:lo12:.LANCHOR201]
+	strh	wzr, [x0, #:lo12:.LANCHOR236]
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	ldrh	w1, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR237
+	strh	wzr, [x22, 2]
+	strh	w1, [x0, #:lo12:.LANCHOR237]
+	strb	wzr, [x22, 6]
+.L2369:
+	mov	w0, 1
+	str	w0, [x21, #:lo12:.LANCHOR169]
+	adrp	x0, .LANCHOR8
+	adrp	x1, .LANCHOR51
+	stp	x0, x1, [x29, 120]
+	ldrb	w2, [x0, #:lo12:.LANCHOR8]
+	ldrh	w26, [x1, #:lo12:.LANCHOR51]
+	cbz	w2, .L2382
+	add	x0, x19, :lo12:.LANCHOR201
+	ldrb	w0, [x0, 8]
+	cmp	w0, 1
+	bne	.L2382
+	adrp	x0, .LANCHOR52
+	ldrh	w26, [x0, #:lo12:.LANCHOR52]
+.L2382:
+	add	x0, x19, :lo12:.LANCHOR201
+	ldrh	w0, [x0, 2]
+	add	w1, w0, w20
+	cmp	w1, w26
+	ble	.L2383
+	sub	w20, w26, w0
+	and	w20, w20, 65535
+.L2383:
+	adrp	x0, .LANCHOR236
+	mov	w27, 0
+	add	x0, x0, :lo12:.LANCHOR236
+	str	x0, [x29, 160]
+.L2384:
+	cmp	w20, w27, uxth
+	bls	.L2392
+	add	x1, x19, :lo12:.LANCHOR201
+	adrp	x0, .LANCHOR36
+	adrp	x24, .LANCHOR106
+	add	x1, x1, 16
+	ldrh	w7, [x0, #:lo12:.LANCHOR36]
+	mov	w22, 0
+	ldrh	w4, [x1, -14]
+	mov	w2, 0
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	mov	w6, 65535
+	add	w4, w4, w27
+	mov	w5, 56
+	b	.L2393
+.L2386:
+	ldrh	w3, [x1]
+	cmp	w3, w6
+	beq	.L2385
+	umaddl	x8, w22, w5, x0
+	add	w22, w22, 1
+	and	w22, w22, 65535
+	orr	w3, w4, w3, lsl 10
+	str	w3, [x8, 4]
+.L2385:
+	add	w2, w2, 1
+	add	x1, x1, 2
+	and	w2, w2, 65535
+.L2393:
+	cmp	w2, w7
+	bne	.L2386
+	add	x1, x19, :lo12:.LANCHOR201
+	adrp	x25, .LANCHOR102
+	add	x25, x25, :lo12:.LANCHOR102
+	ldrb	w2, [x1, 8]
+	mov	w1, w22
+	bl	FlashReadPages
+	mov	w0, 56
+	umull	x0, w22, w0
+	mov	x22, 0
+	str	x0, [x29, 152]
+.L2387:
+	ldr	x0, [x29, 152]
+	cmp	x22, x0
+	bne	.L2391
+	add	w27, w27, 1
+	b	.L2384
+.L2391:
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	add	x1, x0, x22
+	ldr	w0, [x0, x22]
+	cmn	w0, #1
+	beq	.L2388
+	ldr	x28, [x1, 16]
+	mov	w0, 61589
+	ldrh	w1, [x28]
+	cmp	w1, w0
+	bne	.L2388
+	ldr	w4, [x28, 8]
+	cmn	w4, #1
+	bne	.L2389
+	mov	w2, 876
+	str	w4, [x29, 112]
+	adrp	x1, .LANCHOR238
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR238
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	ldr	w4, [x29, 112]
+.L2389:
+	mov	w2, 0
+	add	x1, x29, 188
+	mov	w0, w4
+	bl	log2phys
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	ldr	w1, [x29, 188]
+	add	x0, x0, x22
+	and	w1, w1, 2147483647
+	ldr	w2, [x0, 4]
+	cmp	w1, w2
+	bne	.L2388
+	ldr	x1, [x29, 160]
+	adrp	x4, .LANCHOR179
+	ldr	x2, [x29, 160]
+	ldr	x5, [x4, #:lo12:.LANCHOR179]
+	ldr	w0, [x0, 24]
+	ldrh	w1, [x1]
+	str	x4, [x29, 96]
+	add	w1, w1, 1
+	strh	w1, [x2]
+	ldr	w2, [x25]
+	mov	w1, 56
+	str	w1, [x29, 108]
+	nop // between mem op and mult-accumulate
+	umaddl	x2, w2, w1, x5
+	str	x2, [x29, 112]
+	str	w0, [x2, 24]
+	bl	Ftl_get_new_temp_ppa
+	ldr	x4, [x29, 96]
+	ldr	x2, [x29, 112]
+	ldr	w1, [x29, 108]
+	str	w0, [x2, 4]
+	ldr	x0, [x4, #:lo12:.LANCHOR179]
+	ldr	w2, [x25]
+	umaddl	x1, w2, w1, x0
+	ldr	x0, [x24, #:lo12:.LANCHOR106]
+	add	w2, w2, 1
+	add	x0, x0, x22
+	ldr	x4, [x0, 8]
+	str	x4, [x1, 8]
+	ldr	x4, [x0, 16]
+	str	x4, [x1, 16]
+	ldr	w1, [x29, 188]
+	str	w1, [x28, 12]
+	adrp	x1, .LANCHOR92
+	add	x12, x1, :lo12:.LANCHOR92
+	ldrh	w1, [x1, #:lo12:.LANCHOR92]
+	strh	w1, [x28, 2]
+	adrp	x1, .LANCHOR158
+	str	w2, [x25]
+	ldr	w1, [x1, #:lo12:.LANCHOR158]
+	str	w1, [x28, 4]
+	mov	w1, 1
+	bl	FtlGcBufAlloc
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbnz	w0, .L2390
+	ldrb	w1, [x12, 7]
+	ldr	w0, [x25]
+	cmp	w1, w0
+	beq	.L2390
+	ldrh	w0, [x12, 4]
+	cbnz	w0, .L2388
+.L2390:
+	bl	Ftl_gc_temp_data_write_back
+	cbz	w0, .L2388
+.L2438:
+	str	wzr, [x21, #:lo12:.LANCHOR169]
+	b	.L2437
+.L2388:
+	add	x22, x22, 56
+	b	.L2387
+.L2392:
+	add	x1, x19, :lo12:.LANCHOR201
+	ldrh	w0, [x1, 2]
+	add	w20, w20, w0
+	and	w20, w20, 65535
+	strh	w20, [x1, 2]
+	cmp	w26, w20
+	bhi	.L2394
+	adrp	x0, .LANCHOR102
+	ldr	w0, [x0, #:lo12:.LANCHOR102]
+	cbz	w0, .L2395
+	bl	Ftl_gc_temp_data_write_back
+	cbnz	w0, .L2438
+.L2395:
+	adrp	x0, .LANCHOR236
+	ldrh	w0, [x0, #:lo12:.LANCHOR236]
+	cbnz	w0, .L2396
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	adrp	x1, .LANCHOR82
+	ldr	x1, [x1, #:lo12:.LANCHOR82]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cbz	w2, .L2396
+	strh	wzr, [x1, x0]
+	ldrh	w0, [x19, #:lo12:.LANCHOR201]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2396:
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR201]
+.L2394:
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, 2
+	bhi	.L2397
+	ldr	x0, [x29, 128]
+	ldrh	w20, [x0, #:lo12:.LANCHOR51]
+	b	.L2368
+.L2397:
+	str	wzr, [x21, #:lo12:.LANCHOR169]
+	add	w0, w0, 1
+	b	.L2346
+.L2398:
+	mov	w0, 0
+	ret
+.L2400:
+	mov	w0, 0
+	b	.L2346
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.FtlInit,"ax",@progbits
+	.align	2
+	.global	FtlInit
+	.type	FtlInit, %function
+FtlInit:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LC48
+	add	x1, x1, :lo12:.LC48
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR223
+	mov	x20, x0
+	mov	w0, -1
+	str	w0, [x19, #:lo12:.LANCHOR223]
+	adrp	x0, .LANCHOR239
+	str	wzr, [x0, #:lo12:.LANCHOR239]
+	adrp	x0, .LANCHOR75
+	str	wzr, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	mov	x0, x20
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	adrp	x0, .LANCHOR37
+	ldrh	w0, [x0, #:lo12:.LANCHOR37]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	w0, .L2440
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC49
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC49
+.L2448:
+	bl	printf
+.L2441:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L2440:
+	bl	FtlSysBlkInit
+	cbz	w0, .L2442
+	adrp	x1, .LANCHOR240
+	adrp	x0, .LC50
+	add	x1, x1, :lo12:.LANCHOR240
+	add	x0, x0, :lo12:.LC50
+	b	.L2448
+.L2442:
+	mov	w1, 1
+	str	w1, [x19, #:lo12:.LANCHOR223]
+	bl	rk_ftl_garbage_collect
+	adrp	x0, .LANCHOR87
+	ldrh	w0, [x0, #:lo12:.LANCHOR87]
+	cmp	w0, 15
+	bhi	.L2441
+	mov	w19, 1024
+.L2444:
+	mov	w1, 1
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+	subs	w19, w19, #1
+	bne	.L2444
+	b	.L2441
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	FlashInit
+	mov	w19, w0
+	cbnz	w0, .L2450
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
+	bl	FtlInit
+.L2450:
+	mov	w1, w19
+	adrp	x0, .LC51
+	add	x0, x0, :lo12:.LC51
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",@progbits
+	.align	2
+	.global	ftl_fix_nand_power_lost_error
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	adrp	x0, .LANCHOR8
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cbz	w0, .L2467
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	str	x25, [sp, 64]
+	adrp	x25, .LANCHOR229
+	stp	x23, x24, [sp, 48]
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR82
+	ldrh	w23, [x25, #:lo12:.LANCHOR229]
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	mov	w1, w23
+	stp	x19, x20, [sp, 16]
+	ubfiz	x24, x23, 1, 16
+	adrp	x19, .LC52
+	ldrh	w2, [x0, x24]
+	add	x0, x19, :lo12:.LC52
+	bl	printf
+	adrp	x0, .LANCHOR90
+	add	x6, x0, :lo12:.LANCHOR90
+	ldrh	w0, [x0, #:lo12:.LANCHOR90]
+	bl	FtlGcRefreshBlock
+	adrp	x0, .LANCHOR91
+	add	x20, x0, :lo12:.LANCHOR91
+	ldrh	w0, [x0, #:lo12:.LANCHOR91]
+	bl	FtlGcRefreshBlock
+	mov	x0, x6
+	bl	allocate_new_data_superblock
+	mov	x0, x20
+	mov	w20, 4097
+	bl	allocate_new_data_superblock
+.L2454:
+	subs	w20, w20, #1
+	beq	.L2458
+	mov	w1, 1
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldrh	w0, [x0, x24]
+	cbnz	w0, .L2454
+.L2458:
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	mov	w1, w23
+	ldrh	w2, [x0, x24]
+	add	x0, x19, :lo12:.LC52
+	bl	printf
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	ldrh	w19, [x0, x24]
+	cbnz	w19, .L2456
+	add	x20, x29, 128
+	adrp	x22, .LANCHOR76
+	strh	w23, [x20, -48]!
+	mov	x0, x20
+	bl	make_superblock
+	adrp	x0, .LANCHOR36
+	ldr	x4, [x22, #:lo12:.LANCHOR76]
+	add	x20, x20, 16
+	mov	w5, 65535
+	ldrh	w3, [x0, #:lo12:.LANCHOR36]
+	mov	w6, 56
+	mov	w0, 0
+.L2459:
+	cmp	w0, w3
+	bne	.L2461
+	ldr	x0, [x21, #:lo12:.LANCHOR82]
+	mov	w1, w23
+	ldrh	w2, [x0, x24]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	mov	w2, w19
+	mov	w1, 0
+	bl	FlashEraseBlocks
+	ldr	x0, [x22, #:lo12:.LANCHOR76]
+	mov	w2, w19
+	mov	w1, 1
+	bl	FlashEraseBlocks
+.L2456:
+	mov	w0, -1
+	strh	w0, [x25, #:lo12:.LANCHOR229]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2461:
+	ldrh	w1, [x20]
+	cmp	w1, w5
+	beq	.L2460
+	umaddl	x2, w19, w6, x4
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	lsl	w1, w1, 10
+	stp	xzr, xzr, [x2, 8]
+	str	w1, [x2, 4]
+.L2460:
+	add	w0, w0, 1
+	add	x20, x20, 2
+	and	w0, w0, 65535
+	b	.L2459
+.L2467:
+	ret
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	stp	x29, x30, [sp, -176]!
+	and	w0, w0, 255
+	cmp	w0, 16
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	stp	x25, x26, [sp, 64]
+	mov	w26, w2
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	bne	.L2471
+	mov	x2, x3
+	mov	w1, w26
+	add	w0, w19, 256
+	bl	FtlVendorPartRead
+	mov	w21, w0
+.L2470:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+.L2471:
+	add	w0, w1, w2
+	str	w0, [x29, 136]
+	adrp	x0, .LANCHOR67
+	add	w1, w1, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w1, w0
+	bhi	.L2493
+	adrp	x0, .LANCHOR223
+	ldr	w21, [x0, #:lo12:.LANCHOR223]
+	cmn	w21, #1
+	beq	.L2470
+	adrp	x22, .LANCHOR54
+	bl	FtlCacheWriteBack
+	mov	w25, 0
+	mov	w21, 0
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	adrp	x27, .LANCHOR178
+	stp	wzr, wzr, [x29, 144]
+	udiv	w1, w19, w0
+	str	w1, [x29, 152]
+	add	w1, w19, w26
+	sub	w24, w1, #1
+	adrp	x1, .LANCHOR164
+	ldr	w20, [x29, 152]
+	udiv	w24, w24, w0
+	ldr	w0, [x29, 152]
+	sub	w0, w24, w0
+	add	w0, w0, 1
+	str	w0, [x29, 156]
+	ldr	w0, [x1, #:lo12:.LANCHOR164]
+	ldr	w2, [x29, 156]
+	add	w0, w0, w2
+	str	w0, [x1, #:lo12:.LANCHOR164]
+.L2473:
+	ldr	w0, [x29, 156]
+	cbnz	w0, .L2492
+	adrp	x0, .LANCHOR114
+	ldrh	w0, [x0, #:lo12:.LANCHOR114]
+	cbz	w0, .L2470
+	mov	w1, 1
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+	b	.L2470
+.L2492:
+	add	x1, x29, 172
+	mov	w2, 0
+	mov	w0, w20
+	bl	log2phys
+	ldr	w1, [x29, 172]
+	cmn	w1, #1
+	bne	.L2474
+	add	x3, x22, :lo12:.LANCHOR54
+	mov	w28, 0
+.L2475:
+	ldrh	w0, [x3]
+	cmp	w28, w0
+	bcc	.L2477
+.L2478:
+	ldr	w0, [x29, 156]
+	add	w20, w20, 1
+	subs	w0, w0, #1
+	str	w0, [x29, 156]
+	beq	.L2482
+	adrp	x0, .LANCHOR36
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w25, w0, lsl 2
+	bne	.L2473
+.L2482:
+	cbz	w25, .L2473
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	mov	w1, w25
+	mov	w2, 0
+	bl	FlashReadPages
+	ldr	w0, [x29, 144]
+	lsl	w0, w0, 9
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 140]
+	lsl	w0, w0, 9
+	str	x0, [x29, 128]
+	ldr	w0, [x29, 148]
+	lsl	w0, w0, 9
+	str	w0, [x29, 124]
+	mov	w0, 56
+	umull	x0, w25, w0
+	mov	x25, 0
+	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR136
+	add	x28, x0, :lo12:.LANCHOR136
+.L2491:
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	ldr	w2, [x29, 152]
+	add	x0, x0, x25
+	ldr	w1, [x0, 24]
+	cmp	w2, w1
+	bne	.L2484
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR183
+	ldr	x0, [x0, #:lo12:.LANCHOR183]
+	cmp	x1, x0
+	bne	.L2485
+	ldr	x0, [x29, 128]
+	ldr	w2, [x29, 124]
+	add	x1, x1, x0
+	mov	x0, x23
+.L2508:
+	bl	ftl_memcpy
+.L2485:
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	add	x1, x0, x25
+	ldr	w0, [x0, x25]
+	cmn	w0, #1
+	bne	.L2486
+	ldr	w1, [x28, 72]
+	mov	w21, w0
+	add	w1, w1, 1
+	str	w1, [x28, 72]
+.L2487:
+	ldr	x0, [x29, 104]
+	add	x25, x25, 56
+	cmp	x0, x25
+	bne	.L2491
+	mov	w25, 0
+	b	.L2473
+.L2477:
+	madd	w0, w20, w0, w28
+	cmp	w19, w0
+	bhi	.L2476
+	ldr	w1, [x29, 136]
+	cmp	w1, w0
+	bls	.L2476
+	sub	w0, w0, w19
+	str	x3, [x29, 128]
+	lsl	w0, w0, 9
+	mov	w2, 512
+	mov	w1, 0
+	add	x0, x23, x0
+	bl	ftl_memset
+	ldr	x3, [x29, 128]
+.L2476:
+	add	w28, w28, 1
+	b	.L2475
+.L2474:
+	ldr	x0, [x27, #:lo12:.LANCHOR178]
+	mov	w2, 56
+	umaddl	x0, w25, w2, x0
+	str	w1, [x0, 4]
+	ldr	w1, [x29, 152]
+	cmp	w20, w1
+	bne	.L2479
+	adrp	x1, .LANCHOR183
+	ldr	x1, [x1, #:lo12:.LANCHOR183]
+	str	x1, [x0, 8]
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	udiv	w2, w19, w1
+	msub	w2, w2, w1, w19
+	str	w2, [x29, 140]
+	sub	w2, w1, w2
+	cmp	w26, w2
+	csel	w2, w26, w2, ls
+	str	w2, [x29, 148]
+	cmp	w1, w2
+	bne	.L2480
+	str	x23, [x0, 8]
+.L2480:
+	adrp	x1, .LANCHOR57
+	adrp	x2, .LANCHOR186
+	str	w20, [x0, 24]
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	ldr	x2, [x2, #:lo12:.LANCHOR186]
+	mul	w1, w1, w25
+	add	w25, w25, 1
+	and	x1, x1, 4294967292
+	add	x1, x2, x1
+	str	x1, [x0, 16]
+	b	.L2478
+.L2479:
+	cmp	w20, w24
+	bne	.L2481
+	ldrh	w2, [x22, #:lo12:.LANCHOR54]
+	adrp	x1, .LANCHOR184
+	ldr	w3, [x29, 136]
+	ldr	x1, [x1, #:lo12:.LANCHOR184]
+	str	x1, [x0, 8]
+	mul	w1, w20, w2
+	sub	w3, w3, w1
+	str	w3, [x29, 144]
+	cmp	w2, w3
+	bne	.L2480
+.L2507:
+	sub	w1, w1, w19
+	lsl	w1, w1, 9
+	add	x1, x23, x1
+	str	x1, [x0, 8]
+	b	.L2480
+.L2481:
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	mul	w1, w1, w20
+	b	.L2507
+.L2484:
+	cmp	w24, w1
+	bne	.L2485
+	ldr	x1, [x0, 8]
+	adrp	x0, .LANCHOR184
+	ldr	x0, [x0, #:lo12:.LANCHOR184]
+	cmp	x1, x0
+	bne	.L2485
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	ldr	w2, [x29, 120]
+	mul	w0, w0, w24
+	sub	w0, w0, w19
+	lsl	w0, w0, 9
+	add	x0, x23, x0
+	b	.L2508
+.L2486:
+	cmp	w0, 256
+	bne	.L2487
+	ldr	w0, [x1, 4]
+	lsr	w0, w0, 10
+	bl	P2V_block_in_plane
+	and	w1, w0, 65535
+	str	w1, [x29, 116]
+	bl	FtlGcRefreshBlock
+	mov	w2, 2049
+.L2489:
+	subs	w2, w2, #1
+	bne	.L2488
+.L2490:
+	bl	FtlSysFlush
+	b	.L2487
+.L2488:
+	mov	w1, 1
+	str	w2, [x29, 112]
+	mov	w0, w1
+	bl	rk_ftl_garbage_collect
+	adrp	x0, .LANCHOR201
+	ldp	w2, w1, [x29, 112]
+	ldrh	w0, [x0, #:lo12:.LANCHOR201]
+	cmp	w0, w1
+	beq	.L2489
+	b	.L2490
+.L2493:
+	mov	w21, -1
+	b	.L2470
+	.size	ftl_read, .-ftl_read
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	stp	x29, x30, [sp, -240]!
+	and	w0, w0, 255
+	cmp	w0, 16
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x19, x20, [sp, 16]
+	mov	w22, w1
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	bne	.L2510
+	mov	x2, x3
+	mov	w1, w25
+	add	w0, w22, 256
+	bl	FtlVendorPartWrite
+.L2509:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 240
+	ret
+.L2510:
+	adrp	x0, .LANCHOR67
+	add	w2, w1, w2
+	ldr	w0, [x0, #:lo12:.LANCHOR67]
+	cmp	w2, w0
+	bhi	.L2544
+	adrp	x0, .LANCHOR223
+	ldr	w0, [x0, #:lo12:.LANCHOR223]
+	cmn	w0, #1
+	beq	.L2509
+	adrp	x0, .LANCHOR241
+	adrp	x3, .LANCHOR54
+	mov	w1, 2048
+	sub	w2, w2, #1
+	str	w1, [x0, #:lo12:.LANCHOR241]
+	ldrh	w1, [x3, #:lo12:.LANCHOR54]
+	str	x3, [x29, 160]
+	udiv	w0, w2, w1
+	adrp	x2, .LANCHOR160
+	udiv	w21, w22, w1
+	str	w0, [x29, 152]
+	sub	w23, w0, w21
+	ldr	w0, [x2, #:lo12:.LANCHOR160]
+	add	w24, w23, 1
+	add	w0, w0, w24
+	str	w0, [x2, #:lo12:.LANCHOR160]
+	adrp	x0, .LANCHOR129
+	str	x0, [x29, 120]
+	ldr	x2, [x0, #:lo12:.LANCHOR129]
+	cbz	x2, .L2512
+	ldr	w0, [x2, 24]
+	cmp	w21, w0
+	beq	.L2513
+	bl	FtlCacheWriteBack
+.L2512:
+	adrp	x0, .LANCHOR90
+	mov	w19, w21
+	add	x23, x0, :lo12:.LANCHOR90
+.L2514:
+	cbz	w24, .L2543
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	adrp	x1, .LANCHOR36
+	str	x1, [x29, 112]
+	ldrb	w2, [x0, 6]
+	ldrh	w0, [x1, #:lo12:.LANCHOR36]
+	cmp	w2, w0
+	bcc	.L2515
+	mov	w2, 1632
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2515:
+	ldrh	w0, [x23, 4]
+	cbnz	w0, .L2516
+	bl	FtlCacheWriteBack
+	mov	x0, x23
+	bl	allocate_new_data_superblock
+.L2516:
+	ldrb	w0, [x23, 7]
+	ldrh	w1, [x23, 4]
+	lsl	w0, w0, 2
+	cmp	w0, w1
+	csel	w0, w0, w1, ls
+	ldrb	w1, [x23, 6]
+	cmp	w0, w24
+	csel	w0, w0, w24, ls
+	str	w0, [x29, 144]
+	ldr	x0, [x29, 112]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L2517
+	mov	w2, 1665
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2517:
+	adrp	x0, .LANCHOR57
+	adrp	x28, .LANCHOR180
+	add	x0, x0, :lo12:.LANCHOR57
+	str	xzr, [x29, 168]
+	str	x0, [x29, 104]
+.L2518:
+	ldr	w1, [x29, 144]
+	ldr	w27, [x29, 168]
+	cmp	w27, w1
+	bcc	.L2539
+	mov	x27, x1
+.L2519:
+	ldr	x0, [x29, 120]
+	ldr	x0, [x0, #:lo12:.LANCHOR129]
+	cbz	x0, .L2540
+	sub	w24, w24, #1
+	subs	w27, w27, #1
+	bne	.L2540
+.L2543:
+	ldr	w0, [x29, 152]
+	sub	w1, w0, w21
+	mov	w0, 0
+	bl	rk_ftl_garbage_collect
+.L2546:
+	mov	w0, 0
+	b	.L2509
+.L2513:
+	adrp	x3, .LANCHOR162
+	ldr	w0, [x3, #:lo12:.LANCHOR162]
+	add	w0, w0, 1
+	str	w0, [x3, #:lo12:.LANCHOR162]
+	msub	w0, w21, w1, w22
+	ldr	x3, [x2, 8]
+	sub	w1, w1, w0
+	cmp	w25, w1
+	lsl	w0, w0, 9
+	csel	w19, w25, w1, ls
+	add	x0, x3, x0
+	lsl	w20, w19, 9
+	mov	x1, x26
+	mov	w2, w20
+	bl	ftl_memcpy
+	cbz	w23, .L2546
+	sub	w25, w25, w19
+	add	w22, w22, w19
+	add	x26, x26, x20
+	add	w21, w21, 1
+	bl	FtlCacheWriteBack
+	mov	w24, w23
+	b	.L2512
+.L2539:
+	ldrh	w0, [x23, 4]
+	cbz	w0, .L2519
+	add	x1, x29, 180
+	mov	w2, 0
+	mov	w0, w19
+	bl	log2phys
+	mov	x0, x23
+	mov	x20, 56
+	bl	get_new_active_ppa
+	ldr	x1, [x29, 168]
+	mul	x20, x1, x20
+	adrp	x1, .LANCHOR180
+	ldr	x1, [x1, #:lo12:.LANCHOR180]
+	add	x1, x1, x20
+	str	w0, [x1, 4]
+	ldr	x0, [x29, 104]
+	str	w19, [x1, 24]
+	ldrh	w2, [x0]
+	mul	w27, w27, w2
+	and	x0, x27, 4294967292
+	str	x0, [x29, 136]
+	adrp	x0, .LANCHOR186
+	ldr	x3, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR186]
+	str	x0, [x29, 128]
+	add	x27, x0, x3
+	str	x27, [x1, 16]
+	mov	x0, x27
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	w0, [x29, 152]
+	cmp	w19, w21
+	ccmp	w19, w0, 4, ne
+	bne	.L2520
+	cmp	w19, w21
+	bne	.L2521
+	ldr	x0, [x29, 160]
+	ldrh	w2, [x0, #:lo12:.LANCHOR54]
+	udiv	w0, w22, w2
+	msub	w0, w0, w2, w22
+	str	w0, [x29, 148]
+	sub	w2, w2, w0
+	cmp	w2, w25
+	csel	w0, w2, w25, ls
+	str	w0, [x29, 156]
+.L2522:
+	ldr	x0, [x29, 160]
+	ldr	w1, [x29, 156]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w1, w0
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	bne	.L2523
+	add	x20, x0, x20
+	cmp	w19, w21
+	bne	.L2524
+	str	x26, [x20, 8]
+.L2525:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x23, 6]
+	ldrh	w0, [x0, #:lo12:.LANCHOR36]
+	cmp	w1, w0
+	bcc	.L2536
+	mov	w2, 1739
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2536:
+	ldp	x1, x2, [x29, 128]
+	mov	w0, -3947
+	strh	w0, [x1, x2]
+	adrp	x1, .LANCHOR158
+	ldr	w0, [x1, #:lo12:.LANCHOR158]
+	stp	w0, w19, [x27, 4]
+	add	w19, w19, 1
+	add	w0, w0, 1
+	cmn	w0, #1
+	csel	w0, w0, wzr, ne
+	str	w0, [x1, #:lo12:.LANCHOR158]
+	ldr	w0, [x29, 180]
+	str	w0, [x27, 12]
+	ldrh	w0, [x23]
+	strh	w0, [x27, 2]
+	ldr	x0, [x29, 168]
+	add	x0, x0, 1
+	str	x0, [x29, 168]
+	b	.L2518
+.L2521:
+	ldr	x0, [x29, 160]
+	add	w2, w22, w25
+	str	wzr, [x29, 148]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	msub	w2, w19, w0, w2
+	and	w0, w2, 65535
+	str	w0, [x29, 156]
+	b	.L2522
+.L2524:
+	ldr	w0, [x29, 156]
+.L2561:
+	mul	w0, w0, w19
+	sub	w0, w0, w22
+	lsl	w0, w0, 9
+	add	x0, x26, x0
+	str	x0, [x20, 8]
+	b	.L2525
+.L2523:
+	add	x0, x0, x20
+	cmp	w19, w21
+	bne	.L2526
+	adrp	x1, .LANCHOR183
+	ldr	x1, [x1, #:lo12:.LANCHOR183]
+.L2560:
+	str	x1, [x0, 8]
+	ldr	w0, [x29, 180]
+	cmn	w0, #1
+	beq	.L2528
+	str	w0, [x29, 188]
+	mov	w2, 0
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	str	w19, [x29, 208]
+	add	x0, x0, x20
+	ldp	x1, x0, [x0, 8]
+	stp	x1, x0, [x29, 192]
+	mov	w1, 1
+	add	x0, x29, 184
+	bl	FlashReadPages
+	ldr	w0, [x29, 184]
+	cmn	w0, #1
+	bne	.L2529
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w1, [x0, 72]
+	add	w1, w1, 1
+	str	w1, [x0, 72]
+.L2532:
+	ldr	w0, [x29, 156]
+	cmp	w19, w21
+	lsl	w2, w0, 9
+	bne	.L2533
+	ldr	x1, [x28, #:lo12:.LANCHOR180]
+	ldr	w0, [x29, 148]
+	add	x1, x1, x20
+	lsl	w0, w0, 9
+	ldr	x4, [x1, 8]
+	mov	x1, x26
+	add	x0, x4, x0
+	bl	ftl_memcpy
+	ldr	w0, [x29, 152]
+	cmp	w19, w0
+	bne	.L2525
+.L2534:
+	ldrh	w0, [x23, 4]
+	cbz	w0, .L2525
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	add	x20, x0, x20
+	ldr	x0, [x29, 120]
+	str	x20, [x0, #:lo12:.LANCHOR129]
+	adrp	x0, .LANCHOR221
+	str	x23, [x0, #:lo12:.LANCHOR221]
+	b	.L2525
+.L2526:
+	adrp	x1, .LANCHOR184
+	ldr	x1, [x1, #:lo12:.LANCHOR184]
+	b	.L2560
+.L2529:
+	ldr	w1, [x27, 8]
+	cmp	w19, w1
+	beq	.L2531
+	adrp	x0, .LANCHOR136
+	add	x0, x0, :lo12:.LANCHOR136
+	ldr	w2, [x0, 72]
+	add	w2, w2, 1
+	str	w2, [x0, 72]
+	adrp	x0, .LC54
+	mov	w2, w19
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+.L2531:
+	ldr	w0, [x27, 8]
+	cmp	w19, w0
+	beq	.L2532
+	mov	w2, 1718
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+	b	.L2532
+.L2528:
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	adrp	x1, .LANCHOR56
+	add	x0, x0, x20
+	ldrh	w2, [x1, #:lo12:.LANCHOR56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	b	.L2532
+.L2533:
+	ldr	x0, [x29, 160]
+	ldrh	w1, [x0, #:lo12:.LANCHOR54]
+	ldr	x0, [x28, #:lo12:.LANCHOR180]
+	add	x0, x0, x20
+	mul	w1, w1, w19
+	ldr	x0, [x0, 8]
+	sub	w1, w1, w22
+	lsl	w1, w1, 9
+	add	x1, x26, x1
+	bl	ftl_memcpy
+	b	.L2534
+.L2520:
+	adrp	x0, .LANCHOR180
+	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	add	x20, x0, x20
+	ldr	x0, [x29, 160]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	b	.L2561
+.L2540:
+	adrp	x0, .LANCHOR180
+	mov	x3, x23
+	mov	w2, 0
+	mov	w1, w27
+	ldr	x0, [x0, #:lo12:.LANCHOR180]
+	bl	FtlProgPages
+	cmp	w24, w27
+	bcs	.L2541
+	mov	w2, 1754
+	adrp	x1, .LANCHOR242
+	adrp	x0, .LC4
+	add	x1, x1, :lo12:.LANCHOR242
+	add	x0, x0, :lo12:.LC4
+	bl	printf
+	adrp	x1, .LC5
+	adrp	x0, .LC6
+	add	x1, x1, :lo12:.LC5
+	add	x0, x0, :lo12:.LC6
+	bl	printf
+.L2541:
+	sub	w24, w24, w27
+	b	.L2514
+.L2544:
+	mov	w0, -1
+	b	.L2509
+	.size	ftl_write, .-ftl_write
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w1
+	adrp	x1, .LANCHOR15
+	add	x1, x1, :lo12:.LANCHOR15
+	stp	x23, x24, [sp, 48]
+	mov	x23, x0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR145
+	ldrh	w0, [x1, 14]
+	mov	w24, w2
+	ldrh	w1, [x1, 12]
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	w27, 61664
+	mul	w0, w0, w1
+	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	str	x1, [x29, 112]
+	and	w0, w0, 65535
+	adrp	x1, .LANCHOR194
+	sub	w20, w0, #1
+	sub	w19, w0, #15
+	ldr	x2, [x1, #:lo12:.LANCHOR194]
+	and	w20, w20, 65535
+	mul	w26, w0, w25
+	mov	x22, x1
+	str	x2, [x29, 120]
+.L2563:
+	cmp	w19, w20
+	ble	.L2570
+	mov	w0, -1
+.L2562:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2570:
+	add	w0, w20, w26
+	mov	w2, 1
+	lsl	w0, w0, 10
+	mov	w1, w2
+	str	w0, [x29, 108]
+	add	x0, x29, 104
+	bl	FlashReadPages
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2564
+	ldr	x0, [x22, #:lo12:.LANCHOR194]
+	ldrh	w0, [x0]
+	cmp	w0, w27
+	bne	.L2564
+	cbz	x23, .L2571
+	cbz	w25, .L2566
+.L2569:
+	ldr	x1, [x21, #:lo12:.LANCHOR145]
+	mov	w2, w24
+	mov	x0, x23
+	bl	ftl_memcpy
+	mov	w3, 4
+	adrp	x0, .LC55
+	mov	w2, w3
+	mov	x1, x23
+	add	x0, x0, :lo12:.LC55
+	bl	rknand_print_hex
+.L2571:
+	mov	w0, 0
+	b	.L2562
+.L2566:
+	ldr	x5, [x21, #:lo12:.LANCHOR145]
+	adrp	x2, .LANCHOR147
+	add	x2, x2, :lo12:.LANCHOR147
+	mov	w0, 0
+	mov	w6, 1
+.L2567:
+	ldr	w1, [x2]
+	cmp	w0, w1
+	bcs	.L2569
+	ubfx	x1, x0, 5, 11
+	and	w3, w0, 31
+	lsl	x1, x1, 2
+	add	w0, w0, 1
+	lsl	w4, w6, w3
+	and	w0, w0, 65535
+	ldr	w3, [x5, x1]
+	orr	w3, w3, w4
+	str	w3, [x5, x1]
+	b	.L2567
+.L2564:
+	sub	w20, w20, #1
+	and	w20, w20, 65535
+	b	.L2563
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",@progbits
+	.align	2
+	.global	FlashGetBadBlockList
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x20, x0
+	adrp	x0, .LANCHOR18
+	ldr	x0, [x0, #:lo12:.LANCHOR18]
+	ldrh	w19, [x0, 14]
+	str	x21, [sp, 32]
+	adrp	x21, .LANCHOR151
+	ldrb	w2, [x0, 13]
+	ldr	x0, [x21, #:lo12:.LANCHOR151]
+	mul	w19, w19, w2
+	and	w19, w19, 65535
+	add	w2, w19, 7
+	lsr	w2, w2, 3
+	bl	FlashReadFacBbtData
+	cmn	w0, #1
+	bne	.L2577
+.L2581:
+	mov	w0, 0
+.L2578:
+	ubfiz	x0, x0, 1, 16
+	mov	w1, -1
+	ldr	x21, [sp, 32]
+	strh	w1, [x20, x0]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+.L2577:
+	ldr	x4, [x21, #:lo12:.LANCHOR151]
+	lsr	w5, w19, 4
+	sub	w19, w19, #1
+	mov	w1, 0
+	mov	w0, 0
+	mov	w6, 1
+.L2579:
+	cmp	w1, w19
+	bge	.L2578
+	ubfx	x3, x1, 5, 11
+	and	w2, w1, 31
+	lsl	w2, w6, w2
+	ldr	w3, [x4, x3, lsl 2]
+	tst	w2, w3
+	beq	.L2580
+	add	w2, w0, 1
+	ubfiz	x0, x0, 1, 16
+	strh	w1, [x20, x0]
+	and	w0, w2, 65535
+.L2580:
+	cmp	w0, w5
+	bcs	.L2581
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L2579
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",@progbits
+	.align	2
+	.global	FtlMakeBbt
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR75
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	ldr	w21, [x0, #:lo12:.LANCHOR75]
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	cbnz	w21, .L2588
+	bl	FtlBbtMemInit
+	adrp	x20, .LANCHOR73
+	add	x22, x20, :lo12:.LANCHOR73
+	bl	FtlLoadFactoryBbt
+	add	x24, x22, 32
+	adrp	x28, .LANCHOR199
+	add	x22, x22, 12
+	add	x25, x28, :lo12:.LANCHOR199
+	adrp	x0, .LANCHOR43
+	add	x0, x0, :lo12:.LANCHOR43
+	str	x0, [x29, 120]
+.L2589:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w21, w0
+	bcc	.L2595
+	adrp	x21, .LANCHOR58
+	add	x21, x21, :lo12:.LANCHOR58
+	mov	w19, 0
+.L2596:
+	ldrh	w0, [x21]
+	cmp	w0, w19
+	bhi	.L2597
+	add	x21, x20, :lo12:.LANCHOR73
+	mov	w22, 65535
+	ldrh	w19, [x21, 12]
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+.L2598:
+	ldrh	w0, [x21, 12]
+	sub	w0, w0, #47
+	cmp	w0, w19
+	bgt	.L2602
+	mov	w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2599
+	mov	w0, w19
+	bl	FlashTestBlk
+	cbz	w0, .L2600
+	mov	w0, w19
+	bl	FtlBbmMapBadBlock
+.L2599:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2598
+.L2595:
+	adrp	x2, .LANCHOR185
+	adrp	x0, .LANCHOR79
+	add	x19, x28, :lo12:.LANCHOR199
+	ldrh	w1, [x22]
+	ldr	x0, [x0, #:lo12:.LANCHOR79]
+	mov	w3, 65535
+	ldr	x26, [x2, #:lo12:.LANCHOR185]
+	cmp	w1, w3
+	stp	x0, x26, [x19, 8]
+	adrp	x23, .LANCHOR49
+	str	x2, [x29, 112]
+	beq	.L2590
+	ldrh	w4, [x23, #:lo12:.LANCHOR49]
+	mov	w2, 1
+	madd	w27, w4, w21, w1
+	mov	w1, w2
+	lsl	w0, w27, 10
+	str	w0, [x19, 4]
+	mov	x0, x19
+	bl	FlashReadPages
+	ldr	x1, [x19, 8]
+	ldr	x0, [x24]
+	ldrh	w2, [x23, #:lo12:.LANCHOR49]
+	add	w2, w2, 7
+	lsr	w2, w2, 3
+	bl	ftl_memcpy
+.L2591:
+	mov	w0, w27
+	add	w21, w21, 1
+	bl	FtlBbmMapBadBlock
+	add	x24, x24, 8
+	add	x22, x22, 2
+	b	.L2589
+.L2590:
+	mov	w1, w21
+	bl	FlashGetBadBlockList
+	ldr	x0, [x19, 8]
+	adrp	x27, .LANCHOR120
+	ldr	x1, [x24]
+	bl	FtlBbt2Bitmap
+	ldrh	w19, [x23, #:lo12:.LANCHOR49]
+	add	x23, x23, :lo12:.LANCHOR49
+	add	x0, x27, :lo12:.LANCHOR120
+	sub	w19, w19, #1
+	str	x0, [x29, 104]
+	and	w19, w19, 65535
+.L2592:
+	ldrh	w0, [x23]
+	madd	w0, w21, w0, w19
+	bl	FtlBbmIsBadBlock
+	cmp	w0, 1
+	beq	.L2593
+	ldr	x0, [x29, 112]
+	mov	w2, 16
+	strh	w19, [x22]
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR185]
+	bl	ftl_memset
+	mov	w0, -3872
+	strh	w0, [x26]
+	ldrh	w4, [x23]
+	ldrh	w0, [x22]
+	strh	w0, [x26, 2]
+	ldr	x1, [x24]
+	str	wzr, [x26, 4]
+	madd	w27, w4, w21, w0
+	lsl	w0, w27, 10
+	str	w0, [x25, 4]
+	ldr	x0, [x29, 104]
+	ldrh	w2, [x0]
+	ldr	x0, [x25, 8]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	mov	w2, 1
+	mov	x0, x25
+	mov	w1, w2
+	bl	FlashEraseBlocks
+	mov	w3, 1
+	mov	x0, x25
+	mov	w2, w3
+	mov	w1, w3
+	bl	FlashProgPages
+	ldr	w0, [x25]
+	cmn	w0, #1
+	bne	.L2591
+	mov	w0, w27
+	bl	FtlBbmMapBadBlock
+	b	.L2592
+.L2593:
+	sub	w19, w19, #1
+	and	w19, w19, 65535
+	b	.L2592
+.L2597:
+	mov	w0, w19
+	add	w19, w19, 1
+	bl	FtlBbmMapBadBlock
+	and	w19, w19, 65535
+	b	.L2596
+.L2600:
+	ldrh	w0, [x21]
+	cmp	w0, w22
+	bne	.L2601
+	strh	w19, [x21]
+	b	.L2599
+.L2601:
+	strh	w19, [x21, 4]
+.L2602:
+	adrp	x0, .LANCHOR76
+	add	x19, x20, :lo12:.LANCHOR73
+	ldrh	w1, [x20, #:lo12:.LANCHOR73]
+	mov	w2, 2
+	ldr	x0, [x0, #:lo12:.LANCHOR76]
+	str	wzr, [x19, 8]
+	lsl	w1, w1, 10
+	strh	wzr, [x19, 2]
+	str	w1, [x0, 4]
+	ldrh	w1, [x19, 4]
+	lsl	w1, w1, 10
+	str	w1, [x0, 60]
+	mov	w1, 1
+	bl	FlashEraseBlocks
+	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	bl	FtlBbmMapBadBlock
+	ldrh	w0, [x19, 4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	strh	wzr, [x19, 2]
+	ldr	w0, [x19, 8]
+	ldrh	w1, [x19, 4]
+	add	w0, w0, 1
+	str	w0, [x19, 8]
+	ldrh	w0, [x20, #:lo12:.LANCHOR73]
+	strh	w0, [x19, 4]
+	strh	w1, [x20, #:lo12:.LANCHOR73]
+	bl	FtlBbmTblFlush
+.L2588:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlLowFormat,"ax",@progbits
+	.align	2
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR65
+	mov	w1, 0
+	add	x29, sp, 0
+	ldrh	w2, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR192
+	stp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR192]
+	stp	x21, x22, [sp, 32]
+	lsl	w2, w2, 2
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	bl	ftl_memset
+	adrp	x0, .LANCHOR75
+	ldr	w0, [x0, #:lo12:.LANCHOR75]
+	cbnz	w0, .L2610
+	adrp	x0, .LANCHOR158
+	adrp	x25, .LANCHOR37
+	adrp	x20, .LANCHOR157
+	str	wzr, [x0, #:lo12:.LANCHOR158]
+	ldrh	w0, [x25, #:lo12:.LANCHOR37]
+	str	wzr, [x20, #:lo12:.LANCHOR157]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	w0, .L2611
+	bl	FtlMakeBbt
+.L2611:
+	adrp	x22, .LANCHOR54
+	adrp	x0, .LANCHOR183
+	mov	w6, 23752
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	movk	w6, 0xa0f, lsl 16
+	ldr	x4, [x0, #:lo12:.LANCHOR183]
+	adrp	x0, .LANCHOR184
+	lsl	w1, w1, 7
+	ldr	x5, [x0, #:lo12:.LANCHOR184]
+	mov	w0, 0
+.L2612:
+	cmp	w0, w1
+	blt	.L2613
+	adrp	x21, .LANCHOR38
+	adrp	x19, .LANCHOR39
+	add	x26, x19, :lo12:.LANCHOR39
+	mov	w23, 0
+	ldrh	w24, [x21, #:lo12:.LANCHOR38]
+.L2614:
+	ldrh	w0, [x26]
+	cmp	w0, w24
+	bhi	.L2615
+	adrp	x24, .LANCHOR36
+	sub	w1, w23, #2
+	ldrh	w0, [x24, #:lo12:.LANCHOR36]
+	cmp	w1, w0, lsl 1
+	bgt	.L2616
+.L2620:
+	add	x26, x21, :lo12:.LANCHOR38
+	mov	w23, 0
+	mov	w25, 0
+.L2617:
+	ldrh	w0, [x26]
+	cmp	w0, w25
+	bhi	.L2621
+	adrp	x0, .LANCHOR72
+	ldrh	w1, [x19, #:lo12:.LANCHOR39]
+	ldrh	w3, [x24, #:lo12:.LANCHOR36]
+	str	w1, [x0, #:lo12:.LANCHOR72]
+	adrp	x0, .LANCHOR40
+	adrp	x1, .LANCHOR227
+	ldr	w2, [x0, #:lo12:.LANCHOR40]
+	adrp	x0, .LANCHOR71
+	udiv	w6, w2, w3
+	ubfx	x5, x6, 5, 16
+	str	w6, [x0, #:lo12:.LANCHOR71]
+	add	w4, w5, 36
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+	mov	w4, 24
+	mul	w4, w3, w4
+	cmp	w23, w4
+	ble	.L2622
+	sub	w2, w2, w23
+	udiv	w2, w2, w3
+	str	w2, [x0, #:lo12:.LANCHOR71]
+	lsr	w2, w2, 5
+	add	w2, w2, 24
+	strh	w2, [x1, #:lo12:.LANCHOR227]
+.L2622:
+	adrp	x2, .LANCHOR101
+	ldr	w2, [x2, #:lo12:.LANCHOR101]
+	cmp	w2, 1
+	bne	.L2623
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR227]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+.L2623:
+	adrp	x2, .LANCHOR8
+	ldrb	w2, [x2, #:lo12:.LANCHOR8]
+	cbz	w2, .L2624
+	udiv	w4, w23, w3
+	ldrh	w2, [x1, #:lo12:.LANCHOR227]
+	add	w4, w4, w2
+	add	w4, w2, w4, asr 2
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+.L2624:
+	adrp	x2, .LANCHOR47
+	ldrh	w2, [x2, #:lo12:.LANCHOR47]
+	cbz	w2, .L2626
+	ldrh	w4, [x1, #:lo12:.LANCHOR227]
+	add	w4, w4, w2, lsr 1
+	strh	w4, [x1, #:lo12:.LANCHOR227]
+	mul	w4, w2, w3
+	cmp	w23, w4
+	bge	.L2626
+	add	w2, w2, 32
+	str	w6, [x0, #:lo12:.LANCHOR71]
+	add	w2, w5, w2
+	strh	w2, [x1, #:lo12:.LANCHOR227]
+.L2626:
+	ldrh	w2, [x1, #:lo12:.LANCHOR227]
+	adrp	x25, .LANCHOR226
+	ldr	w1, [x0, #:lo12:.LANCHOR71]
+	adrp	x24, .LANCHOR82
+	mov	w23, -1
+	sub	w1, w1, w2
+	mul	w3, w1, w3
+	adrp	x1, .LANCHOR51
+	str	w3, [x25, #:lo12:.LANCHOR226]
+	ldrh	w1, [x1, #:lo12:.LANCHOR51]
+	mul	w3, w1, w3
+	str	w3, [x0, #:lo12:.LANCHOR71]
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	mul	w3, w0, w3
+	adrp	x0, .LANCHOR67
+	str	w3, [x0, #:lo12:.LANCHOR67]
+	bl	FtlBbmTblFlush
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	mov	w1, 0
+	ldrh	w2, [x19, #:lo12:.LANCHOR39]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	adrp	x0, .LANCHOR99
+	adrp	x1, .LANCHOR201
+	ldrh	w2, [x21, #:lo12:.LANCHOR38]
+	str	wzr, [x0, #:lo12:.LANCHOR99]
+	add	x0, x1, :lo12:.LANCHOR201
+	strh	w23, [x1, #:lo12:.LANCHOR201]
+	mov	w1, 255
+	lsr	w2, w2, 3
+	strh	wzr, [x0, 2]
+	strb	wzr, [x0, 6]
+	strb	wzr, [x0, 8]
+	adrp	x0, .LANCHOR90
+	add	x19, x0, :lo12:.LANCHOR90
+	strh	wzr, [x0, #:lo12:.LANCHOR90]
+	mov	w0, 1
+	strb	w0, [x19, 8]
+	adrp	x0, .LANCHOR0
+	strh	wzr, [x19, 2]
+	ldr	x0, [x0, #:lo12:.LANCHOR0]
+	strb	wzr, [x19, 6]
+	bl	ftl_memset
+.L2628:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2629
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2628
+.L2613:
+	ubfiz	x3, x0, 2, 16
+	mvn	w2, w0
+	orr	w2, w0, w2, lsl 16
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	str	w2, [x4, x3]
+	str	w6, [x5, x3]
+	b	.L2612
+.L2615:
+	mov	w0, w24
+	mov	w1, 1
+	add	w24, w24, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w24, w24, 65535
+	and	w23, w23, 65535
+	b	.L2614
+.L2616:
+	udiv	w0, w23, w0
+	adrp	x1, .LANCHOR64
+	ldr	w23, [x1, #:lo12:.LANCHOR64]
+	add	w0, w0, w23
+	bl	FtlSysBlkNumInit
+	ldrh	w0, [x25, #:lo12:.LANCHOR37]
+	add	x25, x19, :lo12:.LANCHOR39
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	w23, [x21, #:lo12:.LANCHOR38]
+.L2618:
+	ldrh	w0, [x25]
+	cmp	w0, w23
+	bls	.L2620
+	mov	w0, w23
+	add	w23, w23, 1
+	mov	w1, 1
+	and	w23, w23, 65535
+	bl	FtlLowFormatEraseBlock
+	b	.L2618
+.L2621:
+	mov	w0, w25
+	mov	w1, 0
+	add	w25, w25, 1
+	bl	FtlLowFormatEraseBlock
+	add	w23, w23, w0
+	and	w25, w25, 65535
+	and	w23, w23, 65535
+	b	.L2617
+.L2629:
+	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	mov	w23, -1
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR157]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x19, 4]
+	strh	w2, [x1, x0]
+	adrp	x2, .LANCHOR91
+	add	x0, x2, :lo12:.LANCHOR91
+	ldrh	w1, [x19]
+	mov	x19, x0
+	add	w1, w1, 1
+	strh	wzr, [x0, 2]
+	strh	w1, [x2, #:lo12:.LANCHOR91]
+	mov	w1, 1
+	strb	wzr, [x0, 6]
+	strb	w1, [x0, 8]
+.L2630:
+	mov	x0, x19
+	bl	make_superblock
+	ldrb	w1, [x19, 7]
+	ldrh	w0, [x19]
+	cbnz	w1, .L2631
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ubfiz	x0, x0, 1, 16
+	strh	w23, [x1, x0]
+	ldrh	w0, [x19]
+	add	w0, w0, 1
+	strh	w0, [x19]
+	b	.L2630
+.L2631:
+	ldr	w1, [x20, #:lo12:.LANCHOR157]
+	ubfiz	x0, x0, 1, 16
+	str	w1, [x19, 12]
+	add	w1, w1, 1
+	str	w1, [x20, #:lo12:.LANCHOR157]
+	ldr	x1, [x24, #:lo12:.LANCHOR82]
+	ldrh	w2, [x19, 4]
+	mov	w19, -1
+	strh	w2, [x1, x0]
+	adrp	x0, .LANCHOR92
+	strh	w19, [x0, #:lo12:.LANCHOR92]
+	bl	FtlFreeSysBlkQueueOut
+	adrp	x2, .LANCHOR206
+	add	x1, x2, :lo12:.LANCHOR206
+	strh	w0, [x2, #:lo12:.LANCHOR206]
+	ldr	w0, [x25, #:lo12:.LANCHOR226]
+	strh	w0, [x1, 6]
+	ldr	w0, [x20, #:lo12:.LANCHOR157]
+	str	w0, [x1, 8]
+	add	w0, w0, 1
+	strh	wzr, [x1, 2]
+	strh	w19, [x1, 4]
+	str	w0, [x20, #:lo12:.LANCHOR157]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	w0, .L2610
+	adrp	x0, .LANCHOR223
+	mov	w1, 1
+	str	w1, [x0, #:lo12:.LANCHOR223]
+.L2610:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
+	.global	FtlMallocOffset
+	.global	FtlMallocBuffer
+	.global	gc_ink_free_return_value
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	g_LowFormat
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	ToshibaRefValue
+	.global	Toshiba15RefValue
+	.global	ToshibaA19RefValue
+	.global	SamsungRefValue
+	.global	refValueDefault
+	.global	random_seed
+	.global	gSlcNandParaInfo
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	g_page_map_check_enable
+	.global	g_power_lost_ecc_error_blk
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_all_blk_used_slc_mode
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_refresh_block_temp_tbl
+	.global	g_free_slc_blk_num
+	.global	g_gc_refresh_block_temp_num
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_check_table
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_flash_read_only_en
+	.global	g_inkDie_check_enable
+	.global	g_SlcPartLbaEndSector
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.global	gMasterTempBuf
+	.global	gMasterInfo
+	.global	gNandcDumpWriteEn
+	.global	gToggleModeClkDiv
+	.global	gBootDdrMode
+	.global	gNandcEccBits
+	.global	gpNandc1
+	.global	gpNandc
+	.global	g_nandc_version_data
+	.global	gNandcVer
+	.global	gNandChipMap
+	.global	gNandIDataBuf
+	.global	FlashDdrTunningReadCount
+	.global	FlashWaitBusyScheduleEn
+	.global	gNandPhyInfo
+	.global	gFlashProgCheckSpareBuffer
+	.global	gFlashProgCheckBuffer
+	.global	gFlashSpareBuffer
+	.global	gFlashPageBuffer1
+	.global	gFlashPageBuffer0
+	.global	gpFlashSaveInfo
+	.global	gReadRetryInfo
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_slc2KBNand
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	gNandIDBResBlkNumSaveInFlash
+	.global	gNandIDBResBlkNum
+	.global	gNandFlashResEndPageAddr
+	.global	gNandFlashInfoBlockAddr
+	.global	gNandFlashIdbBlockAddr
+	.global	gNandFlashInfoBlockEcc
+	.global	gNandFlashIDBEccBits
+	.global	gNandFlashEccBits
+	.global	gNandRandomizer
+	.global	gBlockPageAlignSize
+	.global	gTotleBlock
+	.global	gNandMaxChip
+	.global	gNandMaxDie
+	.global	gFlashInterfaceMode
+	.global	gFlashSlcMode
+	.global	gFlashOnfiModeEn
+	.global	gFlashToggleModeEn
+	.global	gFlashSdrModeEn
+	.global	gMultiPageProgEn
+	.global	gMultiPageReadEn
+	.global	gpReadRetrial
+	.global	mlcPageToSlcPageTbl
+	.global	slcPageToMlcPageTbl
+	.global	DieAddrs
+	.global	gDieOp
+	.global	DieCsIndex
+	.global	IDByte
+	.global	read_retry_cur_offset
+	.section	.bss.DeviceCapacity,"aw",@nobits
+	.align	2
+	.set	.LANCHOR59,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.zero	4
+	.section	.bss.DieAddrs,"aw",@nobits
+	.align	2
+	.set	.LANCHOR17,. + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.zero	32
+	.section	.bss.DieCsIndex,"aw",@nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.zero	8
+	.section	.bss.FlashDdrTunningReadCount,"aw",@nobits
+	.align	2
+	.set	.LANCHOR142,. + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.zero	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",@nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.zero	4
+	.section	.bss.FtlMallocBuffer,"aw",@nobits
+	.align	6
+	.type	FtlMallocBuffer, %object
+	.size	FtlMallocBuffer, 1310720
+FtlMallocBuffer:
+	.zero	1310720
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",@nobits
+	.align	1
+	.set	.LANCHOR98,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.zero	2
+	.section	.bss.IDByte,"aw",@nobits
+	.align	2
+	.set	.LANCHOR22,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.zero	32
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR120,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.zero	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR39,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR49,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR50,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",@nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.zero	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR56,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR227,. + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_die_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR43,. + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR47,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR64,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR66,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR62,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.zero	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR65,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR40,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR63,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR37,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR51,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR52,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR36,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.zero	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",@nobits
+	.align	1
+	.set	.LANCHOR44,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.zero	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.zero	2
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits
+	.align	1
+	.set	.LANCHOR55,. + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.zero	2
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits
+	.align	2
+	.set	.LANCHOR35,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.zero	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",@nobits
+	.align	2
+	.set	.LANCHOR41,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.zero	4
+	.section	.bss.c_ftl_nand_type,"aw",@nobits
+	.align	1
+	.set	.LANCHOR42,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.zero	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR61,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.zero	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.zero	2
+	.section	.bss.c_gc_page_buf_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.zero	4
+	.section	.bss.c_mlc_erase_count_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR46,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.zero	2
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits
+	.align	2
+	.set	.LANCHOR132,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.zero	4
+	.section	.bss.gBbtInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR73,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 96
+gBbtInfo:
+	.zero	96
+	.section	.bss.gBlockPageAlignSize,"aw",@nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.zero	4
+	.section	.bss.gBootDdrMode,"aw",@nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
+	.zero	4
+	.section	.bss.gDieOp,"aw",@nobits
+	.align	2
+	.set	.LANCHOR23,. + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 192
+gDieOp:
+	.zero	192
+	.section	.bss.gFlashInterfaceMode,"aw",@nobits
+	.set	.LANCHOR24,. + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.zero	1
+	.section	.bss.gFlashOnfiModeEn,"aw",@nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.zero	1
+	.section	.bss.gFlashPageBuffer0,"aw",@nobits
+	.align	3
+	.set	.LANCHOR145,. + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 8
+gFlashPageBuffer0:
+	.zero	8
+	.section	.bss.gFlashPageBuffer1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR151,. + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 8
+gFlashPageBuffer1:
+	.zero	8
+	.section	.bss.gFlashProgCheckBuffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR195,. + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 8
+gFlashProgCheckBuffer:
+	.zero	8
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR196,. + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 8
+gFlashProgCheckSpareBuffer:
+	.zero	8
+	.section	.bss.gFlashSdrModeEn,"aw",@nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.zero	1
+	.section	.bss.gFlashSlcMode,"aw",@nobits
+	.set	.LANCHOR8,. + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.zero	1
+	.section	.bss.gFlashSpareBuffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR194,. + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 8
+gFlashSpareBuffer:
+	.zero	8
+	.section	.bss.gFlashToggleModeEn,"aw",@nobits
+	.set	.LANCHOR28,. + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.zero	1
+	.section	.bss.gL2pMapInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR124,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 64
+gL2pMapInfo:
+	.zero	64
+	.section	.bss.gMasterInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR33,. + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 48
+gMasterInfo:
+	.zero	48
+	.section	.bss.gMasterTempBuf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR154,. + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 8
+gMasterTempBuf:
+	.zero	8
+	.section	.bss.gMultiPageProgEn,"aw",@nobits
+	.set	.LANCHOR27,. + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.zero	1
+	.section	.bss.gMultiPageReadEn,"aw",@nobits
+	.set	.LANCHOR198,. + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.zero	1
+	.section	.bss.gNandChipMap,"aw",@nobits
+	.align	3
+	.set	.LANCHOR6,. + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 64
+gNandChipMap:
+	.zero	64
+	.section	.bss.gNandFlashEccBits,"aw",@nobits
+	.set	.LANCHOR31,. + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.zero	1
+	.section	.bss.gNandFlashIDBEccBits,"aw",@nobits
+	.set	.LANCHOR150,. + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.zero	1
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",@nobits
+	.align	2
+	.set	.LANCHOR147,. + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
+	.zero	4
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",@nobits
+	.align	2
+	.set	.LANCHOR146,. + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
+	.zero	4
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",@nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.zero	1
+	.section	.bss.gNandFlashResEndPageAddr,"aw",@nobits
+	.align	2
+	.type	gNandFlashResEndPageAddr, %object
+	.size	gNandFlashResEndPageAddr, 4
+gNandFlashResEndPageAddr:
+	.zero	4
+	.section	.bss.gNandIDBResBlkNum,"aw",@nobits
+	.set	.LANCHOR2,. + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.zero	1
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",@nobits
+	.set	.LANCHOR148,. + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.zero	1
+	.section	.bss.gNandIDataBuf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR139,. + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.zero	2048
+	.section	.bss.gNandMaxChip,"aw",@nobits
+	.set	.LANCHOR118,. + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.zero	1
+	.section	.bss.gNandMaxDie,"aw",@nobits
+	.set	.LANCHOR25,. + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.zero	1
+	.section	.bss.gNandOptPara,"aw",@nobits
+	.align	3
+	.set	.LANCHOR7,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.zero	32
+	.section	.bss.gNandPhyInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR15,. + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.zero	28
+	.section	.bss.gNandRandomizer,"aw",@nobits
+	.set	.LANCHOR5,. + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.zero	1
+	.section	.bss.gNandcDumpWriteEn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
+	.zero	4
+	.section	.bss.gNandcEccBits,"aw",@nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
+	.zero	4
+	.section	.bss.gNandcVer,"aw",@nobits
+	.align	2
+	.set	.LANCHOR32,. + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
+	.zero	4
+	.section	.bss.gReadRetryInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR20,. + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.zero	852
+	.section	.bss.gSysFreeQueue,"aw",@nobits
+	.align	3
+	.set	.LANCHOR74,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.zero	2056
+	.section	.bss.gSysInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR206,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.zero	12
+	.section	.bss.gToggleModeClkDiv,"aw",@nobits
+	.align	2
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
+	.zero	4
+	.section	.bss.gTotleBlock,"aw",@nobits
+	.align	1
+	.set	.LANCHOR119,. + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
+	.zero	2
+	.section	.bss.gVendorBlkInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR215,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 64
+gVendorBlkInfo:
+	.zero	64
+	.section	.bss.g_GlobalDataVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.zero	4
+	.section	.bss.g_GlobalSysVersion,"aw",@nobits
+	.align	2
+	.set	.LANCHOR157,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.zero	4
+	.section	.bss.g_LowFormat,"aw",@nobits
+	.align	2
+	.set	.LANCHOR239,. + 0
+	.type	g_LowFormat, %object
+	.size	g_LowFormat, 4
+g_LowFormat:
+	.zero	4
+	.section	.bss.g_MaxLbaSector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR67,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.zero	4
+	.section	.bss.g_MaxLbn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR226,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.zero	4
+	.section	.bss.g_MaxLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR71,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.zero	4
+	.section	.bss.g_SlcPartLbaEndSector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR155,. + 0
+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
+g_SlcPartLbaEndSector:
+	.zero	4
+	.section	.bss.g_VaildLpn,"aw",@nobits
+	.align	2
+	.set	.LANCHOR99,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.zero	4
+	.section	.bss.g_active_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR90,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.zero	48
+	.section	.bss.g_all_blk_used_slc_mode,"aw",@nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
+	.zero	4
+	.section	.bss.g_buffer_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR91,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.zero	48
+	.section	.bss.g_cur_erase_blk,"aw",@nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.zero	4
+	.section	.bss.g_ect_tbl_info_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR187,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.zero	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",@nobits
+	.align	1
+	.set	.LANCHOR218,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.zero	2
+	.section	.bss.g_flash_read_only_en,"aw",@nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.zero	4
+	.section	.bss.g_free_slc_blk_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.zero	2
+	.section	.bss.g_ftl_nand_free_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR241,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.zero	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR116,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR114,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.zero	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR115,. + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.zero	34
+	.section	.bss.g_gc_blk_index,"aw",@nobits
+	.align	1
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.zero	2
+	.section	.bss.g_gc_blk_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR108,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR237,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",@nobits
+	.align	1
+	.set	.LANCHOR236,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.zero	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_head_data_block,"aw",@nobits
+	.align	2
+	.set	.LANCHOR171,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.zero	4
+	.section	.bss.g_gc_head_data_block_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR172,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.zero	4
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",@nobits
+	.align	1
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.zero	2
+	.section	.bss.g_gc_next_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR112,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.zero	2
+	.section	.bss.g_gc_next_blk_1,"aw",@nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.zero	2
+	.section	.bss.g_gc_num_req,"aw",@nobits
+	.align	2
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.zero	4
+	.section	.bss.g_gc_page_offset,"aw",@nobits
+	.align	1
+	.set	.LANCHOR110,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.zero	2
+	.section	.bss.g_gc_refresh_block_temp_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR177,. + 0
+	.type	g_gc_refresh_block_temp_num, %object
+	.size	g_gc_refresh_block_temp_num, 2
+g_gc_refresh_block_temp_num:
+	.zero	2
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",@nobits
+	.align	3
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.zero	34
+	.section	.bss.g_gc_skip_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR173,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.zero	4
+	.section	.bss.g_gc_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR201,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.zero	48
+	.section	.bss.g_gc_temp_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR92,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.zero	48
+	.section	.bss.g_in_gc_progress,"aw",@nobits
+	.align	2
+	.set	.LANCHOR169,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.zero	4
+	.section	.bss.g_in_swl_replace,"aw",@nobits
+	.align	2
+	.set	.LANCHOR170,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.zero	4
+	.section	.bss.g_inkDie_check_enable,"aw",@nobits
+	.align	2
+	.set	.LANCHOR101,. + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
+	.zero	4
+	.section	.bss.g_l2p_last_update_region_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR96,. + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.zero	2
+	.section	.bss.g_maxRegNum,"aw",@nobits
+	.set	.LANCHOR13,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.zero	1
+	.section	.bss.g_maxRetryCount,"aw",@nobits
+	.set	.LANCHOR149,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.zero	1
+	.section	.bss.g_max_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR167,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.zero	4
+	.section	.bss.g_min_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.zero	4
+	.section	.bss.g_nandc_version_data,"aw",@nobits
+	.align	2
+	.set	.LANCHOR152,. + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
+	.zero	4
+	.section	.bss.g_num_data_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.zero	2
+	.section	.bss.g_num_free_superblocks,"aw",@nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.zero	2
+	.section	.bss.g_page_map_check_enable,"aw",@nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.zero	2
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR229,. + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.zero	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",@nobits
+	.align	1
+	.set	.LANCHOR230,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.zero	2
+	.section	.bss.g_recovery_page_min_ver,"aw",@nobits
+	.align	2
+	.set	.LANCHOR133,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.zero	4
+	.section	.bss.g_recovery_page_num,"aw",@nobits
+	.align	2
+	.set	.LANCHOR231,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.zero	4
+	.section	.bss.g_recovery_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR232,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.zero	128
+	.section	.bss.g_req_cache,"aw",@nobits
+	.align	3
+	.set	.LANCHOR129,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 8
+g_req_cache:
+	.zero	8
+	.section	.bss.g_retryMode,"aw",@nobits
+	.set	.LANCHOR11,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.zero	1
+	.section	.bss.g_slc2KBNand,"aw",@nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.zero	1
+	.section	.bss.g_sys_ext_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR136,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.zero	512
+	.section	.bss.g_sys_save_data,"aw",@nobits
+	.align	3
+	.set	.LANCHOR135,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.zero	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR130,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.zero	2
+	.section	.bss.g_totle_avg_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR202,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.zero	4
+	.section	.bss.g_totle_cache_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.zero	4
+	.section	.bss.g_totle_discard_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.zero	4
+	.section	.bss.g_totle_gc_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR159,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.zero	4
+	.section	.bss.g_totle_l2p_write_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR163,. + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.zero	4
+	.section	.bss.g_totle_map_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR125,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.zero	2
+	.section	.bss.g_totle_mlc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR165,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_read_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.zero	4
+	.section	.bss.g_totle_read_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.zero	4
+	.section	.bss.g_totle_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR166,. + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_swl_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.zero	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.zero	4
+	.section	.bss.g_totle_vendor_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.zero	2
+	.section	.bss.g_totle_write_page_count,"aw",@nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.zero	4
+	.section	.bss.g_totle_write_sector,"aw",@nobits
+	.align	2
+	.set	.LANCHOR216,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.zero	4
+	.section	.bss.gc_discard_updated,"aw",@nobits
+	.align	2
+	.set	.LANCHOR222,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.zero	4
+	.section	.bss.gc_ink_free_return_value,"aw",@nobits
+	.align	1
+	.set	.LANCHOR235,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.zero	2
+	.section	.bss.gpFlashSaveInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR144,. + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 8
+gpFlashSaveInfo:
+	.zero	8
+	.section	.bss.gpNandParaInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR18,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 8
+gpNandParaInfo:
+	.zero	8
+	.section	.bss.gpNandc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR19,. + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 8
+gpNandc:
+	.zero	8
+	.section	.bss.gpNandc1,"aw",@nobits
+	.align	3
+	.type	gpNandc1, %object
+	.size	gpNandc1, 8
+gpNandc1:
+	.zero	8
+	.section	.bss.gpReadRetrial,"aw",@nobits
+	.align	3
+	.set	.LANCHOR143,. + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 8
+gpReadRetrial:
+	.zero	8
+	.section	.bss.gp_ect_tbl_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR188,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 8
+gp_ect_tbl_info:
+	.zero	8
+	.section	.bss.gp_gc_page_buf_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR103,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 8
+gp_gc_page_buf_info:
+	.zero	8
+	.section	.bss.gp_last_act_superblock,"aw",@nobits
+	.align	3
+	.set	.LANCHOR221,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 8
+gp_last_act_superblock:
+	.zero	8
+	.section	.bss.mlcPageToSlcPageTbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR117,. + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.zero	1024
+	.section	.bss.p_blk_mode_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 8
+p_blk_mode_table:
+	.zero	8
+	.section	.bss.p_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR81,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 8
+p_data_block_list_head:
+	.zero	8
+	.section	.bss.p_data_block_list_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR80,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 8
+p_data_block_list_table:
+	.zero	8
+	.section	.bss.p_data_block_list_tail,"aw",@nobits
+	.align	3
+	.set	.LANCHOR83,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 8
+p_data_block_list_tail:
+	.zero	8
+	.section	.bss.p_erase_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR77,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 8
+p_erase_count_table:
+	.zero	8
+	.section	.bss.p_free_data_block_list_head,"aw",@nobits
+	.align	3
+	.set	.LANCHOR86,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 8
+p_free_data_block_list_head:
+	.zero	8
+	.section	.bss.p_gc_blk_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR109,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 8
+p_gc_blk_tbl:
+	.zero	8
+	.section	.bss.p_gc_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR104,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 8
+p_gc_data_buf:
+	.zero	8
+	.section	.bss.p_gc_page_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR111,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 8
+p_gc_page_info:
+	.zero	8
+	.section	.bss.p_gc_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR105,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 8
+p_gc_spare_buf:
+	.zero	8
+	.section	.bss.p_io_data_buf_0,"aw",@nobits
+	.align	3
+	.set	.LANCHOR183,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 8
+p_io_data_buf_0:
+	.zero	8
+	.section	.bss.p_io_data_buf_1,"aw",@nobits
+	.align	3
+	.set	.LANCHOR184,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 8
+p_io_data_buf_1:
+	.zero	8
+	.section	.bss.p_io_spare_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR186,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 8
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+	.zero	8
+	.section	.bss.p_l2p_map_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR123,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 8
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+	.zero	8
+	.section	.bss.p_l2p_ram_map,"aw",@nobits
+	.align	3
+	.set	.LANCHOR95,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 8
+p_l2p_ram_map:
+	.zero	8
+	.section	.bss.p_map_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR126,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 8
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+	.zero	8
+	.section	.bss.p_map_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 8
+p_map_block_valid_page_count:
+	.zero	8
+	.section	.bss.p_map_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR127,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 8
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+	.zero	8
+	.section	.bss.p_map_region_ppn_check_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR192,. + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 8
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+	.zero	8
+	.section	.bss.p_map_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR128,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 8
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+	.zero	8
+	.section	.bss.p_plane_order_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR45,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
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+	.section	.bss.p_swl_mul_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR134,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 8
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+	.zero	8
+	.section	.bss.p_sys_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR79,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 8
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+	.zero	8
+	.section	.bss.p_sys_data_buf_1,"aw",@nobits
+	.align	3
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+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 8
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+	.zero	8
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+	.align	3
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+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 8
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+	.zero	8
+	.section	.bss.p_valid_page_count_check_table,"aw",@nobits
+	.align	3
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 8
+p_valid_page_count_check_table:
+	.zero	8
+	.section	.bss.p_valid_page_count_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR82,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 8
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+	.zero	8
+	.section	.bss.p_vendor_block_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR70,. + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 8
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+	.zero	8
+	.section	.bss.p_vendor_block_valid_page_count,"aw",@nobits
+	.align	3
+	.set	.LANCHOR189,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 8
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+	.zero	8
+	.section	.bss.p_vendor_block_ver_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR190,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 8
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+	.zero	8
+	.section	.bss.p_vendor_data_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR182,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 8
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+	.zero	8
+	.section	.bss.p_vendor_region_ppn_table,"aw",@nobits
+	.align	3
+	.set	.LANCHOR191,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 8
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+	.zero	8
+	.section	.bss.read_retry_cur_offset,"aw",@nobits
+	.align	3
+	.set	.LANCHOR21,. + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
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+	.section	.bss.req_erase,"aw",@nobits
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+	.set	.LANCHOR76,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 8
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+	.section	.bss.req_gc,"aw",@nobits
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+	.type	req_gc, %object
+	.size	req_gc, 8
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+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 8
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+	.zero	8
+	.section	.bss.req_prgm,"aw",@nobits
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+	.type	req_prgm, %object
+	.size	req_prgm, 8
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+	.type	req_read, %object
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+	.type	req_sys, %object
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+	.section	.bss.slcPageToMlcPageTbl,"aw",@nobits
+	.align	2
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+	.type	slcPageToMlcPageTbl, %object
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+	.size	FtlMallocOffset, 4
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+	.align	3
+	.set	.LANCHOR141,. + 0
+	.type	NandOptPara, %object
+	.size	NandOptPara, 128
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+	.section	.data.SamsungRefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR14,. + 0
+	.type	SamsungRefValue, %object
+	.size	SamsungRefValue, 64
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+	.byte	-1
+	.byte	-5
+	.byte	-8
+	.byte	7
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+	.byte	2
+	.byte	0
+	.section	.data.Toshiba15RefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR9,. + 0
+	.type	Toshiba15RefValue, %object
+	.size	Toshiba15RefValue, 95
+Toshiba15RefValue:
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+	.section	.data.ToshibaA19RefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR10,. + 0
+	.type	ToshibaA19RefValue, %object
+	.size	ToshibaA19RefValue, 45
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+	.section	.data.ToshibaRefValue,"aw",@progbits
+	.align	3
+	.set	.LANCHOR12,. + 0
+	.type	ToshibaRefValue, %object
+	.size	ToshibaRefValue, 8
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+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits
+	.align	1
+	.set	.LANCHOR233,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.hword	-1
+	.section	.data.gFtlInitStatus,"aw",@progbits
+	.align	2
+	.set	.LANCHOR223,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.gNandParaInfo,"aw",@progbits
+	.align	3
+	.set	.LANCHOR29,. + 0
+	.type	gNandParaInfo, %object
+	.size	gNandParaInfo, 32
+gNandParaInfo:
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+	.zero	4
+	.section	.data.gSlcNandParaInfo,"aw",@progbits
+	.align	3
+	.set	.LANCHOR197,. + 0
+	.type	gSlcNandParaInfo, %object
+	.size	gSlcNandParaInfo, 32
+gSlcNandParaInfo:
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+	.section	.data.power_up_flag,"aw",@progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.data.random_seed,"aw",@progbits
+	.align	3
+	.set	.LANCHOR4,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
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+	.section	.data.refValueDefault,"aw",@progbits
+	.align	3
+	.set	.LANCHOR193,. + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
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+	.byte	-26
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+	.byte	0
+	.byte	0
+	.byte	-32
+	.byte	-37
+	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"sdr read ok %x ecc=%d\n"
+.LC8:
+	.string	"sync para %d\n"
+.LC9:
+	.string	"TOG mode Read error %x %x\n"
+	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"FlashEraseBlocks pageAddr error %x\n"
+	.section	.rodata.FlashInit.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"No.%d FLASH ID:%x %x %x %x %x %x\n"
+.LC19:
+	.string	"FlashLoadPhyInfo fail %x!!\n"
+	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",@progbits,1
+.LC24:
+	.string	"prog error: = %x\n"
+.LC25:
+	.string	"prog read error: = %x\n"
+.LC26:
+	.string	"prog read s error: = %x %x %x\n"
+.LC27:
+	.string	"prog read d error: = %x %x %x\n"
+	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",@progbits,1
+.LC55:
+	.string	"BBT:"
+	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",@progbits,1
+.LC12:
+	.string	"ECC:%d\n"
+	.section	.rodata.FlashReadPage.str1.1,"aMS",@progbits,1
+.LC10:
+	.string	"read retry status %x %x %x\n"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",@progbits,1
+.LC23:
+	.string	"ReadRetry pageadd=%x ecc=%x err=%x\n"
+	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",@progbits,1
+.LC20:
+	.string	"Read pageadd=%x  ecc=%x err=%x\n"
+.LC21:
+	.string	"data:"
+.LC22:
+	.string	"spare:"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",@progbits,1
+.LC2:
+	.string	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\n"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",@progbits,1
+.LC28:
+	.string	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\n"
+.LC29:
+	.string	"FtlBbmTblFlush error:%x\n"
+.LC30:
+	.string	"FtlBbmTblFlush error = %x error count = %d\n"
+	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",@progbits,1
+.LC47:
+	.string	"GC des block %x done\n"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",@progbits,1
+.LC46:
+	.string	"FtlGcScanTempBlkError ID %x %x!!!!!!!\n"
+	.section	.rodata.FtlInit.str1.1,"aMS",@progbits,1
+.LC48:
+	.string	"FTL version: 5.0.47 20180208"
+.LC49:
+	.string	"...%s: no bad block mapping table, format device\n"
+.LC50:
+	.string	"...%s FtlSysBlkInit error ,format device!\n"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",@progbits,1
+.LC40:
+	.string	"no ect"
+	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",@progbits,1
+.LC42:
+	.string	"page map lost %x %x %x %x\n"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",@progbits,1
+.LC35:
+	.string	"FtlMapWritePage error = %x\n"
+.LC36:
+	.string	"FtlMapWritePage error = %x error count = %d\n"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",@progbits,1
+.LC38:
+	.string	"Ftlwrite decrement_vpc_count %x = %d\n"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",@progbits,1
+.LC43:
+	.string	"RSB refresh addr %x\n"
+.LC44:
+	.string	"spuer block %x vpn is 0\n "
+.LC45:
+	.string	"g_recovery_ppa %x ver %x\n "
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"FtlVendorPartRead refresh = %x phyAddr = %x\n"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",@progbits,1
+.LC32:
+	.string	"FtlVpcTblFlush error = %x error count = %d\n"
+	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"slc mode"
+	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",@progbits,1
+.LC16:
+	.string	"otp error! %d"
+.LC17:
+	.string	"rr"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1
+.LC4:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
+.LC5:
+	.string	"!!!!! FTL sys Error !!!!!"
+.LC6:
+	.string	"%s\n"
+	.section	.rodata.MicronReadRetrial.str1.1,"aMS",@progbits,1
+.LC11:
+	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.__func__.10004,"a",@progbits
+	.align	3
+	.set	.LANCHOR214,. + 0
+	.type	__func__.10004, %object
+	.size	__func__.10004, 16
+__func__.10004:
+	.string	"FtlReUsePrevPpa"
+	.section	.rodata.__func__.10037,"a",@progbits
+	.align	3
+	.set	.LANCHOR228,. + 0
+	.type	__func__.10037, %object
+	.size	__func__.10037, 22
+__func__.10037:
+	.string	"FtlRecoverySuperblock"
+	.section	.rodata.__func__.10091,"a",@progbits
+	.align	3
+	.set	.LANCHOR100,. + 0
+	.type	__func__.10091, %object
+	.size	__func__.10091, 16
+__func__.10091:
+	.string	"make_superblock"
+	.section	.rodata.__func__.10111,"a",@progbits
+	.align	3
+	.set	.LANCHOR138,. + 0
+	.type	__func__.10111, %object
+	.size	__func__.10111, 18
+__func__.10111:
+	.string	"SupperBlkListInit"
+	.section	.rodata.__func__.10188,"a",@progbits
+	.align	3
+	.set	.LANCHOR200,. + 0
+	.type	__func__.10188, %object
+	.size	__func__.10188, 25
+__func__.10188:
+	.string	"allocate_data_superblock"
+	.section	.rodata.__func__.10202,"a",@progbits
+	.align	3
+	.set	.LANCHOR219,. + 0
+	.type	__func__.10202, %object
+	.size	__func__.10202, 29
+__func__.10202:
+	.string	"allocate_new_data_superblock"
+	.section	.rodata.__func__.10208,"a",@progbits
+	.align	3
+	.set	.LANCHOR205,. + 0
+	.type	__func__.10208, %object
+	.size	__func__.10208, 19
+__func__.10208:
+	.string	"get_new_active_ppa"
+	.section	.rodata.__func__.10219,"a",@progbits
+	.align	3
+	.set	.LANCHOR203,. + 0
+	.type	__func__.10219, %object
+	.size	__func__.10219, 16
+__func__.10219:
+	.string	"update_vpc_list"
+	.section	.rodata.__func__.10224,"a",@progbits
+	.align	3
+	.set	.LANCHOR204,. + 0
+	.type	__func__.10224, %object
+	.size	__func__.10224, 20
+__func__.10224:
+	.string	"decrement_vpc_count"
+	.section	.rodata.__func__.10292,"a",@progbits
+	.align	3
+	.set	.LANCHOR234,. + 0
+	.type	__func__.10292, %object
+	.size	__func__.10292, 19
+__func__.10292:
+	.string	"FtlGcFreeTempBlock"
+	.section	.rodata.__func__.10386,"a",@progbits
+	.align	3
+	.set	.LANCHOR238,. + 0
+	.type	__func__.10386, %object
+	.size	__func__.10386, 23
+__func__.10386:
+	.string	"rk_ftl_garbage_collect"
+	.section	.rodata.__func__.9318,"a",@progbits
+	.align	3
+	.set	.LANCHOR240,. + 0
+	.type	__func__.9318, %object
+	.size	__func__.9318, 8
+__func__.9318:
+	.string	"FtlInit"
+	.section	.rodata.__func__.9378,"a",@progbits
+	.align	3
+	.set	.LANCHOR220,. + 0
+	.type	__func__.9378, %object
+	.size	__func__.9378, 13
+__func__.9378:
+	.string	"FtlProgPages"
+	.section	.rodata.__func__.9404,"a",@progbits
+	.align	3
+	.set	.LANCHOR242,. + 0
+	.type	__func__.9404, %object
+	.size	__func__.9404, 10
+__func__.9404:
+	.string	"ftl_write"
+	.section	.rodata.__func__.9467,"a",@progbits
+	.align	3
+	.set	.LANCHOR121,. + 0
+	.type	__func__.9467, %object
+	.size	__func__.9467, 14
+__func__.9467:
+	.string	"FtlBbt2Bitmap"
+	.section	.rodata.__func__.9513,"a",@progbits
+	.align	3
+	.set	.LANCHOR208,. + 0
+	.type	__func__.9513, %object
+	.size	__func__.9513, 11
+__func__.9513:
+	.string	"FtlLoadBbt"
+	.section	.rodata.__func__.9622,"a",@progbits
+	.align	3
+	.set	.LANCHOR88,. + 0
+	.type	__func__.9622, %object
+	.size	__func__.9622, 17
+__func__.9622:
+	.string	"INSERT_FREE_LIST"
+	.section	.rodata.__func__.9626,"a",@progbits
+	.align	3
+	.set	.LANCHOR85,. + 0
+	.type	__func__.9626, %object
+	.size	__func__.9626, 17
+__func__.9626:
+	.string	"INSERT_DATA_LIST"
+	.section	.rodata.__func__.9656,"a",@progbits
+	.align	3
+	.set	.LANCHOR89,. + 0
+	.type	__func__.9656, %object
+	.size	__func__.9656, 17
+__func__.9656:
+	.string	"List_remove_node"
+	.section	.rodata.__func__.9686,"a",@progbits
+	.align	3
+	.set	.LANCHOR93,. + 0
+	.type	__func__.9686, %object
+	.size	__func__.9686, 22
+__func__.9686:
+	.string	"List_update_data_list"
+	.section	.rodata.__func__.9693,"a",@progbits
+	.align	3
+	.set	.LANCHOR212,. + 0
+	.type	__func__.9693, %object
+	.size	__func__.9693, 16
+__func__.9693:
+	.string	"load_l2p_region"
+	.section	.rodata.__func__.9723,"a",@progbits
+	.align	3
+	.set	.LANCHOR94,. + 0
+	.type	__func__.9723, %object
+	.size	__func__.9723, 26
+__func__.9723:
+	.string	"ftl_map_blk_alloc_new_blk"
+	.section	.rodata.__func__.9737,"a",@progbits
+	.align	3
+	.set	.LANCHOR209,. + 0
+	.type	__func__.9737, %object
+	.size	__func__.9737, 15
+__func__.9737:
+	.string	"ftl_map_blk_gc"
+	.section	.rodata.__func__.9750,"a",@progbits
+	.align	3
+	.set	.LANCHOR210,. + 0
+	.type	__func__.9750, %object
+	.size	__func__.9750, 31
+__func__.9750:
+	.string	"Ftl_write_map_blk_to_last_page"
+	.section	.rodata.__func__.9763,"a",@progbits
+	.align	3
+	.set	.LANCHOR211,. + 0
+	.type	__func__.9763, %object
+	.size	__func__.9763, 16
+__func__.9763:
+	.string	"FtlMapWritePage"
+	.section	.rodata.__func__.9783,"a",@progbits
+	.align	3
+	.set	.LANCHOR97,. + 0
+	.type	__func__.9783, %object
+	.size	__func__.9783, 22
+__func__.9783:
+	.string	"select_l2p_ram_region"
+	.section	.rodata.__func__.9799,"a",@progbits
+	.align	3
+	.set	.LANCHOR213,. + 0
+	.type	__func__.9799, %object
+	.size	__func__.9799, 9
+__func__.9799:
+	.string	"log2phys"
+	.section	.rodata.__func__.9861,"a",@progbits
+	.align	3
+	.set	.LANCHOR207,. + 0
+	.type	__func__.9861, %object
+	.size	__func__.9861, 15
+__func__.9861:
+	.string	"FtlVpcTblFlush"
+	.section	.rodata.__func__.9880,"a",@progbits
+	.align	3
+	.set	.LANCHOR224,. + 0
+	.type	__func__.9880, %object
+	.size	__func__.9880, 14
+__func__.9880:
+	.string	"FtlScanSysBlk"
+	.section	.rodata.__func__.9934,"a",@progbits
+	.align	3
+	.set	.LANCHOR225,. + 0
+	.type	__func__.9934, %object
+	.size	__func__.9934, 15
+__func__.9934:
+	.string	"FtlLoadSysInfo"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1
+.LC31:
+	.string	"decrement_vpc_count %x = %d\n"
+	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",@progbits,1
+.LC52:
+	.string	"fix power lost blk = %x vpc=%x\n"
+.LC53:
+	.string	"erase power lost blk = %x vpc=%x\n"
+	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",@progbits,1
+.LC33:
+	.string	"ftl_map_blk_gc blk info: %x %x %x\n"
+.LC34:
+	.string	"page map lost: %x %x\n"
+	.section	.rodata.ftl_write.str1.1,"aMS",@progbits,1
+.LC54:
+	.string	"FtlWrite: lpa error:%x %x\n"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
+.LC37:
+	.string	"load_l2p_region refresh = %x phyAddr = %x\n"
+	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"remove_from_free_sys_Queue %x\n"
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
+.LC51:
+	.string	"FtlInit %x\n"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"%s 0x%x:"
+.LC14:
+	.string	"%x "
+.LC15:
+	.string	""
+	.hidden	free
+	.ident	"GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/drivers/rknand/rk_zftl_arm_v7.S b/drivers/rknand/rk_zftl_arm_v7.S
new file mode 100644
index 0000000000..2b1d874c9e
--- /dev/null
+++ b/drivers/rknand/rk_zftl_arm_v7.S
@@ -0,0 +1,24010 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2018-02-11
+ */
+	.arch armv7-a
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 2
+	.file	"rk_zftl_arm_v7.S"
+	.section	.text.flash_mem_cmp8,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_mem_cmp8, %function
+flash_mem_cmp8:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	push	{r4, r5, lr}
+.L2:
+	cmp	r3, r2
+	bne	.L5
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L5:
+	ldrb	r5, [r0, r3]	@ zero_extendqisi2
+	ldrb	r4, [r1, r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r5, r4
+	beq	.L2
+	mov	r0, r3
+	pop	{r4, r5, pc}
+	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text.nand_flash_print_info,"ax",%progbits
+	.align	1
+	.global	nand_flash_print_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nand_flash_print_info, %function
+nand_flash_print_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.FlashTimingCfg,"ax",%progbits
+	.align	1
+	.global	FlashTimingCfg
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.timer_delay_ns,"ax",%progbits
+	.align	1
+	.global	timer_delay_ns
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	lsrs	r0, r0, #4
+	sub	sp, sp, #8
+	str	r0, [sp, #4]
+.L9:
+	ldr	r3, [sp, #4]
+	subs	r2, r3, #1
+	str	r2, [sp, #4]
+	cmp	r3, #0
+	bne	.L9
+	add	sp, sp, #8
+	@ sp needed
+	bx	lr
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",%progbits
+	.align	1
+	.global	flash_read_status
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_status, %function
+flash_read_status:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	movs	r3, #112
+	mov	r1, r0
+	str	r3, [r0, #8]
+	movs	r0, #120
+	bl	timer_delay_ns
+	ldr	r0, [r1]
+	uxtb	r0, r0
+	pop	{r3, pc}
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_set_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	add	r6, r1, r1, lsl #2
+	ldr	r8, .L20+16
+	mov	r5, r0
+	movs	r4, #0
+	ldr	r7, .L20
+.L13:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L17
+	pop	{r4, r5, r6, r7, r8, pc}
+.L17:
+	movs	r3, #85
+	movs	r0, #200
+	str	r3, [r5, #8]
+	ldrsb	r3, [r4, r7]
+	str	r3, [r5, #4]
+	bl	timer_delay_ns
+	ldr	r3, .L20+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L14
+	adds	r3, r4, r6
+	add	r3, r3, r7
+.L19:
+	ldrsb	r3, [r3, #5]
+.L18:
+	str	r3, [r5]
+	adds	r4, r4, #1
+	b	.L13
+.L14:
+	cmp	r3, #35
+	bne	.L16
+	ldr	r3, .L20+8
+	adds	r2, r4, r6
+	add	r3, r3, r2
+	b	.L19
+.L16:
+	ldr	r3, .L20+12
+	ldrsb	r3, [r3, r1]
+	b	.L18
+.L21:
+	.align	2
+.L20:
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LANCHOR4
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L25
+	push	{r4, r5, r6, r7, r8, lr}
+	lsls	r7, r0, #8
+	ldr	r2, .L25+4
+	ldr	r3, [r3]
+	ldr	r5, [r2]
+	movs	r2, #54
+	ldrb	r4, [r3, #113]	@ zero_extendqisi2
+	add	r6, r3, #127
+	add	r8, r5, r7
+	str	r2, [r8, #2056]
+	movs	r2, #160
+	muls	r1, r4, r1
+	mla	r1, r2, r0, r1
+	add	r1, r1, r3
+	add	r3, r3, r4
+	adds	r1, r1, #143
+	add	r4, r3, #127
+.L23:
+	cmp	r6, r4
+	bne	.L24
+	add	r5, r5, r7
+	movs	r3, #22
+	str	r3, [r5, #2056]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L24:
+	ldrb	r3, [r6, #1]!	@ zero_extendqisi2
+	movs	r0, #120
+	str	r3, [r8, #2052]
+	bl	timer_delay_ns
+	ldrsb	r3, [r1, #1]!
+	str	r3, [r8, #2048]
+	b	.L23
+.L26:
+	.align	2
+.L25:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",%progbits
+	.align	1
+	.global	hynix_reconfig_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L27
+	ldr	r5, .L32+4
+	ldr	r3, [r5]
+	add	r3, r3, r0
+	ldrb	r3, [r3, #120]	@ zero_extendqisi2
+	cbz	r3, .L27
+	movs	r1, #0
+	bl	hynix_set_rr_para
+	ldr	r0, [r5]
+	movs	r3, #0
+	add	r0, r0, r4
+	strb	r3, [r0, #120]
+.L27:
+	pop	{r3, r4, r5, pc}
+.L33:
+	.align	2
+.L32:
+	.word	.LANCHOR1
+	.word	.LANCHOR5
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
+	.section	.text.nandc_set_ddr_para,"ax",%progbits
+	.align	1
+	.global	nandc_set_ddr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L37
+	ldr	r2, .L37+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, [r2]
+	cmp	r3, #9
+	lsl	r3, r0, #16
+	lsl	r0, r0, #8
+	orr	r3, r3, r0
+	orr	r3, r3, #3
+	ite	eq
+	streq	r3, [r2, #80]
+	strne	r3, [r2, #304]
+	bx	lr
+.L38:
+	.align	2
+.L37:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",%progbits
+	.align	1
+	.global	nandc_get_ddr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L43
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ldr	r3, .L43+4
+	ldr	r3, [r3]
+	ite	eq
+	ldreq	r0, [r3, #80]
+	ldrne	r0, [r3, #304]
+	ubfx	r0, r0, #8, #8
+	bx	lr
+.L44:
+	.align	2
+.L43:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",%progbits
+	.align	1
+	.global	nandc_set_if_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L53
+	ands	r1, r0, #6
+	ldr	r3, [r3]
+	ldr	r2, [r3]
+	beq	.L46
+	lsls	r1, r0, #29
+	ldr	r1, .L53+4
+	orr	r2, r2, #24576
+	bfc	r2, #15, #1
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	orr	r2, r2, #196608
+	it	mi
+	orrmi	r2, r2, #32768
+	cmp	r1, #9
+	ldr	r1, .L53+8
+	bne	.L48
+	movw	r0, #8321
+	str	r0, [r3, #8]
+	str	r1, [r3, #80]
+	movs	r1, #38
+	str	r1, [r3, #84]
+	movs	r1, #39
+	str	r1, [r3, #84]
+.L49:
+	str	r2, [r3]
+	bx	lr
+.L48:
+	movw	r0, #8322
+	str	r0, [r3, #344]
+	str	r1, [r3, #304]
+	movs	r1, #38
+	str	r1, [r3, #308]
+	movs	r1, #39
+	str	r1, [r3, #308]
+	b	.L49
+.L46:
+	bfi	r2, r1, #13, #1
+	b	.L49
+.L54:
+	.align	2
+.L53:
+	.word	.LANCHOR6
+	.word	.LANCHOR7
+	.word	1052675
+	.size	nandc_set_if_mode, .-nandc_set_if_mode
+	.section	.text.nandc_cs,"ax",%progbits
+	.align	1
+	.global	nandc_cs
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_cs, %function
+nandc_cs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L56
+	movs	r2, #1
+	lsl	r0, r2, r0
+	ldr	r1, [r3]
+	ldr	r3, [r1]
+	bfi	r3, r0, #0, #8
+	str	r3, [r1]
+	bx	lr
+.L57:
+	.align	2
+.L56:
+	.word	.LANCHOR6
+	.size	nandc_cs, .-nandc_cs
+	.section	.text.nandc_de_cs,"ax",%progbits
+	.align	1
+	.global	nandc_de_cs
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_de_cs, %function
+nandc_de_cs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L59
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2]
+	bx	lr
+.L60:
+	.align	2
+.L59:
+	.word	.LANCHOR6
+	.size	nandc_de_cs, .-nandc_de_cs
+	.section	.text.flash_wait_device_ready_raw,"ax",%progbits
+	.align	1
+	.global	flash_wait_device_ready_raw
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_wait_device_ready_raw, %function
+flash_wait_device_ready_raw:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r1
+	ldr	r3, .L70
+	mov	r7, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L62
+	mov	r2, #604
+	ldr	r1, .L70+4
+	ldr	r0, .L70+8
+	bl	printf
+.L63:
+	b	.L63
+.L62:
+	ldr	r3, .L70+12
+	ldrb	r6, [r3, r0]	@ zero_extendqisi2
+	ldr	r3, .L70+16
+	mov	r0, r6
+	ldr	r4, [r3]
+	bl	nandc_cs
+	uxtb	r3, r5
+	movs	r0, #120
+	add	r4, r4, r6, lsl #8
+	str	r0, [r4, #2056]
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	lsrs	r5, r5, #16
+	str	r3, [r4, #2052]
+	str	r5, [r4, #2052]
+.L69:
+	bl	timer_delay_ns
+	ldr	r1, [r4, #2048]
+	uxtb	r1, r1
+	bics	r3, r7, r1
+	bne	.L65
+	cmp	r1, #255
+	beq	.L65
+	mov	r0, r6
+	bl	nandc_de_cs
+	mov	r0, r1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L65:
+	movs	r0, #20
+	b	.L69
+.L71:
+	.align	2
+.L70:
+	.word	.LANCHOR8
+	.word	.LANCHOR9
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
+	.global	__aeabi_uidiv
+	.global	__aeabi_uidivmod
+	.section	.text.flash_wait_device_ready,"ax",%progbits
+	.align	1
+	.global	flash_wait_device_ready
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_wait_device_ready, %function
+flash_wait_device_ready:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	tst	r0, #50331648
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r10, r1
+	ubfx	r4, r0, #0, #21
+	ubfx	r8, r0, #21, #3
+	bne	.L73
+	ldr	r3, .L82
+	ldr	r6, .L82+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L74
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L73
+.L74:
+	ldr	r3, .L82+8
+	mov	r0, r4
+	ldrh	r5, [r3]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	mov	r1, r5
+	mul	r7, r5, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cbz	r3, .L75
+	add	r4, r7, r1, lsl #1
+.L73:
+	mov	r2, r10
+	mov	r1, r4
+	mov	r0, r8
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	flash_wait_device_ready_raw
+.L75:
+	ldr	r3, .L82+12
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r7
+	b	.L73
+.L83:
+	.align	2
+.L82:
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_wait_flash_ready,"ax",%progbits
+	.align	1
+	.global	nandc_wait_flash_ready
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, lr}
+	ldr	r1, .L89
+	ldr	r4, .L89+4
+.L86:
+	movs	r0, #100
+	bl	timer_delay_ns
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #22
+	bmi	.L87
+	subs	r1, r1, #1
+	bne	.L86
+	mov	r0, #-1
+.L84:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, pc}
+.L87:
+	movs	r0, #0
+	b	.L84
+.L90:
+	.align	2
+.L89:
+	.word	100000
+	.word	.LANCHOR6
+	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
+	.section	.text.sandisk_set_rr_para,"ax",%progbits
+	.align	1
+	.global	sandisk_set_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sandisk_set_rr_para, %function
+sandisk_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #239
+	str	r3, [r0, #8]
+	movs	r3, #17
+	mov	r4, r0
+	str	r3, [r0, #4]
+	movs	r0, #200
+	bl	timer_delay_ns
+	ldr	r3, .L97
+	add	r1, r1, r1, lsl #2
+	ldr	r6, .L97+4
+	movs	r2, #0
+	ldr	r7, .L97+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L97+12
+	ldrb	r5, [r3]	@ zero_extendqisi2
+.L92:
+	cmp	r2, r0
+	bcc	.L95
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L95:
+	adds	r3, r2, r1
+	cmp	r5, #67
+	ite	eq
+	addeq	r3, r3, r7
+	addne	r3, r3, r6
+	ldrsb	r3, [r3, #5]
+	adds	r2, r2, #1
+	str	r3, [r4]
+	b	.L92
+.L98:
+	.align	2
+.L97:
+	.word	.LANCHOR4
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.word	.LANCHOR1
+	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
+	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_3d_set_tlc_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_3d_set_tlc_rr_para, %function
+toshiba_3d_set_tlc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #0
+	movs	r7, #213
+	mvn	r3, #118
+	adds	r1, r1, #1
+	mov	r4, r0
+	str	r7, [r0, #8]
+	rsb	r1, r1, r1, lsl #3
+	str	r6, [r0, #4]
+	str	r3, [r0, #4]
+	ldr	r3, .L100
+	adds	r5, r3, r1
+	ldrsb	r3, [r3, r1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #1]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #2]
+	str	r3, [r0]
+	ldrsb	r3, [r5, #3]
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	mvn	r3, #117
+	str	r7, [r4, #8]
+	str	r6, [r4, #4]
+	str	r3, [r4, #4]
+	ldrsb	r3, [r5, #4]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #5]
+	str	r3, [r4]
+	ldrsb	r3, [r5, #6]
+	str	r3, [r4]
+	str	r6, [r4]
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	nandc_wait_flash_ready
+.L101:
+	.align	2
+.L100:
+	.word	.LANCHOR15
+	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
+	.section	.text.toshiba_3d_set_slc_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_3d_set_slc_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_3d_set_slc_rr_para, %function
+toshiba_3d_set_slc_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r3, #213
+	mvn	r2, #116
+	str	r3, [r0, #8]
+	movs	r3, #0
+	str	r3, [r0, #4]
+	str	r2, [r0, #4]
+	ldr	r2, .L103
+	add	r1, r1, r2
+	ldrsb	r2, [r1, #1]
+	str	r2, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	str	r3, [r0]
+	b	nandc_wait_flash_ready
+.L104:
+	.align	2
+.L103:
+	.word	.LANCHOR16
+	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
+	.section	.text.toshiba_tlc_set_rr_para,"ax",%progbits
+	.align	1
+	.global	toshiba_tlc_set_rr_para
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_tlc_set_rr_para, %function
+toshiba_tlc_set_rr_para:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r6, #239
+	mov	r4, r0
+	str	r6, [r0, #8]
+	cbz	r2, .L106
+	movs	r3, #18
+	rsb	r1, r1, r1, lsl #3
+	str	r3, [r0, #4]
+	ldr	r3, .L108
+	adds	r5, r3, r1
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	str	r3, [r0]
+	ldrb	r3, [r5, #3]	@ zero_extendqisi2
+	str	r3, [r0]
+	bl	nandc_wait_flash_ready
+	movs	r3, #19
+	str	r6, [r4, #8]
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #4]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #5]	@ zero_extendqisi2
+	str	r3, [r4]
+	ldrb	r3, [r5, #6]	@ zero_extendqisi2
+	str	r3, [r4]
+	movs	r3, #0
+	str	r3, [r4]
+.L107:
+	pop	{r4, r5, r6, lr}
+	b	nandc_wait_flash_ready
+.L106:
+	movs	r3, #20
+	str	r3, [r0, #4]
+	ldr	r3, .L108+4
+	ldrb	r3, [r3, r1]	@ zero_extendqisi2
+	str	r3, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	str	r2, [r0]
+	b	.L107
+.L109:
+	.align	2
+.L108:
+	.word	.LANCHOR17
+	.word	.LANCHOR18
+	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.flash_enter_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_enter_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L122
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L110
+	ldr	r3, .L122+4
+	cmp	r2, #1
+	ldr	r3, [r3]
+	bne	.L112
+	ldr	r2, .L122+8
+	ldrb	r2, [r2, #29]	@ zero_extendqisi2
+	cbz	r2, .L110
+	add	r0, r3, r0, lsl #8
+	str	r2, [r0, #2056]
+	bx	lr
+.L112:
+	cmp	r2, #2
+	bne	.L110
+	ldr	r1, .L122+12
+	ldrb	r2, [r1]	@ zero_extendqisi2
+	cbz	r2, .L110
+	add	r0, r3, r0, lsl #8
+	movs	r3, #239
+	movs	r2, #0
+	str	r3, [r0, #2056]
+	movs	r3, #145
+	str	r3, [r0, #2052]
+	movs	r3, #1
+	str	r2, [r0, #2048]
+	str	r3, [r0, #2048]
+	str	r2, [r0, #2048]
+	str	r2, [r0, #2048]
+	strb	r2, [r1]
+	b	nandc_wait_flash_ready
+.L110:
+	bx	lr
+.L123:
+	.align	2
+.L122:
+	.word	.LANCHOR11
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_exit_slc_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L136
+	push	{r4}
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L124
+	ldr	r3, .L136+4
+	cmp	r2, #1
+	ldr	r3, [r3]
+	bne	.L126
+	ldr	r2, .L136+8
+	ldrb	r2, [r2, #30]	@ zero_extendqisi2
+	cbz	r2, .L124
+	add	r0, r3, r0, lsl #8
+	str	r2, [r0, #2056]
+.L124:
+	pop	{r4}
+	bx	lr
+.L126:
+	cmp	r2, #2
+	bne	.L124
+	ldr	r4, .L136+12
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L124
+	ldr	r2, .L136+8
+	add	r0, r3, r0, lsl #8
+	movs	r3, #239
+	str	r3, [r0, #2056]
+	movs	r3, #145
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	str	r3, [r0, #2052]
+	movs	r3, #1
+	cmp	r2, #2
+	it	ne
+	movne	r2, #4
+	str	r2, [r0, #2048]
+	strb	r2, [r4]
+	str	r3, [r0, #2048]
+	pop	{r4}
+	str	r1, [r0, #2048]
+	str	r1, [r0, #2048]
+	b	nandc_wait_flash_ready
+.L137:
+	.align	2
+.L136:
+	.word	.LANCHOR11
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.flash_erase_duplane_block,"ax",%progbits
+	.align	1
+	.global	flash_erase_duplane_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_duplane_block, %function
+flash_erase_duplane_block:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r1
+	ldr	r1, .L154
+	mov	r7, r2
+	mov	r6, r3
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, r0
+	bhi	.L139
+	movw	r2, #517
+	ldr	r1, .L154+4
+	ldr	r0, .L154+8
+	bl	printf
+.L140:
+	b	.L140
+.L139:
+	ldr	r1, .L154+12
+	ldrb	r4, [r1, r0]	@ zero_extendqisi2
+	ldr	r1, .L154+16
+	add	r8, r4, #8
+	ldr	r5, [r1]
+	ldr	r1, .L154+20
+	ldr	r1, [r1]
+	add	r8, r5, r8, lsl #8
+	lsls	r1, r1, #27
+	bpl	.L141
+	mov	r1, r4
+	ldr	r0, .L154+24
+	bl	printf
+.L141:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	fp, #0
+	bne	.L142
+	bl	flash_enter_slc_mode
+.L143:
+	lsls	r2, r4, #8
+	movs	r1, #96
+	adds	r3, r5, r2
+	str	r1, [r3, #2056]
+	uxtb	r1, r7
+	str	r1, [r3, #2052]
+	lsrs	r1, r7, #8
+	str	r1, [r3, #2052]
+	lsrs	r1, r7, #16
+	str	r1, [r3, #2052]
+	ldr	r1, .L154+28
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	bne	.L147
+	movs	r1, #208
+	str	r2, [sp, #4]
+	str	r1, [r3, #2056]
+	str	r3, [sp]
+	bl	nandc_wait_flash_ready
+	mov	r0, r8
+	bl	flash_read_status
+	ldr	r3, [sp]
+	and	r10, r0, #5
+	ldr	r2, [sp, #4]
+.L144:
+	add	r5, r5, r2
+	movs	r2, #96
+	str	r2, [r5, #2056]
+	uxtb	r2, r6
+	str	r2, [r3, #2052]
+	lsrs	r2, r6, #8
+	lsrs	r6, r6, #16
+	str	r2, [r3, #2052]
+	str	r6, [r3, #2052]
+	movs	r3, #208
+	str	r3, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r8
+	bl	flash_read_status
+	mov	r5, r0
+	cmp	fp, #0
+	bne	.L145
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L145:
+	mov	r0, r4
+	bl	nandc_de_cs
+	and	r0, r5, #5
+	orrs	r10, r0, r10
+	beq	.L146
+	mov	r2, r5
+	mov	r1, r7
+	ldr	r0, .L154+32
+	bl	printf
+.L146:
+	mov	r0, r10
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L142:
+	bl	flash_exit_slc_mode
+	b	.L143
+.L147:
+	mov	r10, #0
+	b	.L144
+.L155:
+	.align	2
+.L154:
+	.word	.LANCHOR8
+	.word	.LANCHOR21
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC1
+	.word	.LANCHOR23
+	.word	.LC2
+	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
+	.section	.text.flash_erase_block_en,"ax",%progbits
+	.align	1
+	.global	flash_erase_block_en
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_block_en, %function
+flash_erase_block_en:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L170
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r8, r1
+	mov	r6, r2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L157
+	movw	r2, #561
+	ldr	r1, .L170+4
+	ldr	r0, .L170+8
+	bl	printf
+.L158:
+	b	.L158
+.L157:
+	ldr	r3, .L170+12
+	ldrb	r4, [r3, r0]	@ zero_extendqisi2
+	ldr	r3, .L170+16
+	add	r7, r4, #8
+	ldr	r5, [r3]
+	ldr	r3, .L170+20
+	ldr	r3, [r3]
+	add	r7, r5, r7, lsl #8
+	lsls	r3, r3, #27
+	bpl	.L159
+	mov	r1, r4
+	ldr	r0, .L170+24
+	bl	printf
+.L159:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	bl	nandc_cs
+	mov	r0, r4
+	cmp	r8, #0
+	bne	.L160
+	bl	flash_enter_slc_mode
+.L161:
+	add	r3, r5, r4, lsl #8
+	movs	r1, #96
+	ubfx	r2, r6, #0, #21
+	str	r1, [r3, #2056]
+	uxtb	r1, r6
+	str	r1, [r3, #2052]
+	lsrs	r1, r2, #8
+	lsrs	r2, r2, #16
+	str	r1, [r3, #2052]
+	str	r2, [r3, #2052]
+	movs	r2, #208
+	str	r2, [r3, #2056]
+	bl	nandc_wait_flash_ready
+	mov	r0, r7
+	bl	flash_read_status
+	mov	r5, r0
+	cmp	r8, #0
+	bne	.L162
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L162:
+	mov	r0, r4
+	bl	nandc_de_cs
+	ands	r5, r5, #5
+	beq	.L163
+	ldr	r3, .L170+28
+	mov	r0, r6
+	ldrh	r1, [r3]
+	bl	__aeabi_uidiv
+	mov	r2, r5
+	mov	r1, r0
+	ldr	r0, .L170+32
+	bl	printf
+.L163:
+	mov	r0, r5
+	pop	{r4, r5, r6, r7, r8, pc}
+.L160:
+	bl	flash_exit_slc_mode
+	b	.L161
+.L171:
+	.align	2
+.L170:
+	.word	.LANCHOR8
+	.word	.LANCHOR24
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC3
+	.word	.LANCHOR13
+	.word	.LC4
+	.size	flash_erase_block_en, .-flash_erase_block_en
+	.section	.text.flash_erase_block,"ax",%progbits
+	.align	1
+	.global	flash_erase_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_block, %function
+flash_erase_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r2, r1
+	movs	r1, #0
+	b	flash_erase_block_en
+	.size	flash_erase_block, .-flash_erase_block
+	.section	.text.flash_erase_all,"ax",%progbits
+	.align	1
+	.global	flash_erase_all
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_erase_all, %function
+flash_erase_all:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L178
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r7, .L178+4
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+.L174:
+	ldr	r3, .L178+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L177
+	movs	r1, #0
+	ldr	r0, .L178+12
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	printf
+.L177:
+	ldr	r2, .L178+16
+	uxth	r3, r5
+	movs	r6, #0
+	ldrb	r8, [r2, r3]	@ zero_extendqisi2
+.L175:
+	uxth	r3, r6
+	cmp	r4, r3
+	bhi	.L176
+	adds	r5, r5, #1
+	b	.L174
+.L176:
+	ldrh	r1, [r7]
+	mov	r0, r8
+	muls	r1, r6, r1
+	adds	r6, r6, #1
+	bl	flash_erase_block
+	b	.L175
+.L179:
+	.align	2
+.L178:
+	.word	.LANCHOR19
+	.word	.LANCHOR13
+	.word	.LANCHOR8
+	.word	.LC5
+	.word	.LANCHOR10
+	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_set_interface_mode,"ax",%progbits
+	.align	1
+	.global	flash_set_interface_mode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_set_interface_mode, %function
+flash_set_interface_mode:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L202
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #239
+	ldr	ip, .L202+8
+	movs	r7, #128
+	mov	lr, #1
+	mov	r8, #35
+	ldr	r5, [r3]
+	mov	r10, #5
+	ldr	r3, .L202+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	and	r2, r3, #4
+	and	r3, r3, #1
+	str	r3, [sp]
+	movs	r3, #0
+	str	r2, [sp, #4]
+	mov	r2, r3
+.L188:
+	ldrb	r4, [ip, r3, lsl #3]	@ zero_extendqisi2
+	cmp	r4, #152
+	beq	.L181
+	cmp	r4, #69
+	beq	.L181
+	cmp	r4, #44
+	bne	.L182
+.L181:
+	cmp	r0, #1
+	bne	.L183
+	ldr	r1, [sp]
+	cbz	r1, .L182
+	lsls	r1, r3, #8
+	cmp	r4, #44
+	add	fp, r5, r1
+	str	r6, [fp, #2056]
+	itete	eq
+	streq	r0, [fp, #2052]
+	strne	r7, [fp, #2052]
+	streq	r10, [fp, #2048]
+	strne	r0, [fp, #2048]
+.L187:
+	add	r1, r1, r5
+	str	r2, [r1, #2048]
+	str	r2, [r1, #2048]
+	str	r2, [r1, #2048]
+.L182:
+	adds	r3, r3, #1
+	cmp	r3, #4
+	bne	.L188
+	bl	nandc_wait_flash_ready
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L183:
+	ldr	r1, [sp, #4]
+	cmp	r1, #0
+	beq	.L182
+	lsls	r1, r3, #8
+	cmp	r4, #44
+	add	fp, r5, r1
+	str	r6, [fp, #2056]
+	itete	eq
+	streq	lr, [fp, #2052]
+	strne	r7, [fp, #2052]
+	streq	r8, [fp, #2048]
+	strne	r2, [fp, #2048]
+	b	.L187
+.L203:
+	.align	2
+.L202:
+	.word	.LANCHOR6
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.flash_reset,"ax",%progbits
+	.align	1
+	.global	flash_reset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_reset, %function
+flash_reset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L205
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #8
+	movs	r3, #255
+	str	r3, [r0, #2056]
+	b	nandc_wait_flash_ready
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR6
+	.size	flash_reset, .-flash_reset
+	.section	.text.flash_read_id,"ax",%progbits
+	.align	1
+	.global	flash_read_id
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_id, %function
+flash_read_id:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L208
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	mov	r5, r1
+	ldr	r4, [r3]
+	bl	flash_reset
+	mov	r0, r6
+	bl	nandc_cs
+	add	r4, r4, r6, lsl #8
+	movs	r3, #144
+	movs	r0, #200
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	bl	timer_delay_ns
+	ldr	r3, [r4, #2048]
+	mov	r0, r6
+	strb	r3, [r5]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #1]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #2]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #3]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #4]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #5]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #6]
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5, #7]
+	pop	{r4, r5, r6, lr}
+	b	nandc_de_cs
+.L209:
+	.align	2
+.L208:
+	.word	.LANCHOR6
+	.size	flash_read_id, .-flash_read_id
+	.section	.text.flash_read_spare,"ax",%progbits
+	.align	1
+	.global	flash_read_spare
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_spare, %function
+flash_read_spare:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r5, r2
+	ldr	r3, .L211
+	ldr	r2, .L211+4
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	ldr	r4, [r2]
+	movs	r2, #0
+	lsls	r3, r3, #9
+	add	r4, r4, r0, lsl #8
+	str	r2, [r4, #2056]
+	str	r3, [r4, #2052]
+	lsrs	r3, r3, #8
+	str	r3, [r4, #2052]
+	uxtb	r3, r1
+	str	r3, [r4, #2052]
+	lsrs	r3, r1, #8
+	lsrs	r1, r1, #16
+	str	r3, [r4, #2052]
+	movs	r3, #48
+	str	r1, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #2048]
+	strb	r3, [r5]
+	pop	{r3, r4, r5, pc}
+.L212:
+	.align	2
+.L211:
+	.word	.LANCHOR19
+	.word	.LANCHOR6
+	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.sandisk_prog_test_bad_block,"ax",%progbits
+	.align	1
+	.global	sandisk_prog_test_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sandisk_prog_test_bad_block, %function
+sandisk_prog_test_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	lsls	r0, r0, #8
+	ldr	r3, .L220
+	ldr	r5, .L220+4
+	ldr	r4, [r3]
+	ldrb	r3, [r5, #29]	@ zero_extendqisi2
+	cbz	r3, .L214
+	adds	r2, r4, r0
+	str	r3, [r2, #2056]
+.L215:
+	add	r4, r4, r0
+	movs	r3, #128
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r1
+	str	r3, [r4, #2052]
+	lsrs	r3, r1, #8
+	lsrs	r1, r1, #16
+	str	r3, [r4, #2052]
+	movs	r3, #16
+	str	r1, [r4, #2052]
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	movs	r3, #112
+	movs	r0, #80
+	str	r3, [r4, #2056]
+	bl	timer_delay_ns
+	ldrb	r3, [r5, #30]	@ zero_extendqisi2
+	ldr	r0, [r4, #2048]
+	and	r0, r0, #5
+	cbz	r3, .L213
+	str	r3, [r4, #2056]
+.L213:
+	pop	{r3, r4, r5, pc}
+.L214:
+	adds	r3, r4, r0
+	movs	r2, #162
+	str	r2, [r3, #2056]
+	b	.L215
+.L221:
+	.align	2
+.L220:
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_bch_sel,"ax",%progbits
+	.align	1
+	.global	nandc_bch_sel
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_bch_sel, %function
+nandc_bch_sel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r1, .L236
+	movs	r2, #0
+	push	{r4, lr}
+	movs	r3, #1
+	strb	r0, [r1]
+	ldr	r1, .L236+4
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #9
+	ldr	r1, .L236+8
+	ldr	r1, [r1]
+	bne	.L223
+	cmp	r0, #70
+	str	r3, [r1, #16]
+	beq	.L224
+	cmp	r0, #60
+	beq	.L231
+	cmp	r0, #40
+	ite	eq
+	moveq	r2, #2
+	movne	r2, r3
+.L224:
+	lsls	r3, r2, #25
+	orr	r3, r3, #1
+	str	r3, [r1, #32]
+	pop	{r4, pc}
+.L231:
+	movs	r2, #3
+	b	.L224
+.L223:
+	movs	r4, #16
+	str	r3, [r1, #8]
+	cmp	r0, r4
+	mov	r3, r2
+	bfi	r3, r4, #8, #8
+	bfi	r3, r2, #18, #1
+	bne	.L226
+.L229:
+	bfc	r3, #4, #1
+.L227:
+	orr	r3, r3, #1
+	str	r3, [r1, #12]
+	pop	{r4, pc}
+.L226:
+	cmp	r0, #24
+	bne	.L228
+	orr	r3, r3, #16
+	b	.L227
+.L228:
+	cmp	r0, #40
+	orr	r3, r3, #262144
+	orr	r3, r3, #16
+	bne	.L227
+	b	.L229
+.L237:
+	.align	2
+.L236:
+	.word	.LANCHOR27
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_bch_sel, .-nandc_bch_sel
+	.section	.text.NandCIrqEnable,"ax",%progbits
+	.align	1
+	.global	NandCIrqEnable
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",%progbits
+	.align	1
+	.global	NandCIrqDisable
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
+	.align	1
+	.global	rk_nandc_get_irq_status
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L243
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	ite	eq
+	ldreq	r0, [r0, #296]
+	ldrne	r0, [r0, #372]
+	bx	lr
+.L244:
+	.align	2
+.L243:
+	.word	.LANCHOR7
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_ready
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
+	.align	1
+	.global	NandcIqrWaitFlashReady
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_xfer_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.nandc_xfer_start,"ax",%progbits
+	.align	1
+	.global	nandc_xfer_start
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer_start, %function
+nandc_xfer_start:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	ldr	r0, .L264
+	adds	r6, r1, #1
+	ldr	r5, .L264+4
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r10, .L264+24
+	cmp	r0, #9
+	bne	.L249
+	movs	r4, #0
+	movs	r1, #1
+	bfi	r4, r7, #1, #1
+	asrs	r6, r6, r1
+	orr	r4, r4, #8
+	bfi	r4, r1, #5, #2
+	ldr	r1, .L264+8
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bfc	r4, #4, #1
+	bfi	r4, r6, #22, #6
+	cbz	r1, .L250
+	ldr	r1, .L264+12
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cbz	r1, .L250
+	orr	r4, r4, #512
+.L250:
+	add	r1, r2, #63
+	and	r6, r6, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	add	r1, r1, r6, lsl #10
+	str	r2, [r5, #4]
+	str	r3, [r5, #8]
+	clz	r7, r7
+	str	r2, [r5, #12]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #2
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #52]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #56]
+	ldr	r3, [r2, #48]
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	ldr	r1, .L264+16
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	ldrh	r1, [r1]
+	orr	r3, r3, #1
+	bfi	r3, r1, #16, #11
+	str	r3, [r2, #48]
+	str	r4, [r2, #16]
+	orr	r4, r4, #4
+	str	r4, [r2, #16]
+.L248:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L249:
+	ldr	r0, [r10]
+	movs	r4, #0
+	bfi	r4, r7, #1, #1
+	orr	r4, r4, #8
+	ldr	r8, [r0, #12]
+	movs	r0, #16
+	bfi	r8, r0, #8, #8
+	movs	r0, #1
+	bfi	r4, r0, #5, #2
+	asrs	r6, r6, r0
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	bfc	r8, #3, #1
+	bfc	r4, #4, #1
+	bfc	r8, #5, #3
+	str	r6, [sp]
+	bfi	r4, r6, #22, #6
+	cmp	r7, #0
+	beq	.L252
+	ldr	r0, .L264+20
+	lsrs	r1, r1, #1
+	str	r1, [sp, #8]
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	ldr	r1, [r5]
+	cmp	r0, #24
+	ite	hi
+	movhi	r0, #128
+	movls	r0, #64
+	str	r1, [sp, #12]
+	movs	r1, #0
+	str	r0, [sp, #4]
+	mov	r0, r1
+.L254:
+	ldr	r6, [sp, #4]
+	add	fp, r3, r0, lsl #2
+	add	lr, r6, r1
+	ldr	r6, [sp, #8]
+	cmp	r0, r6
+	blt	.L255
+.L256:
+	ldr	r3, [r5]
+	add	r1, r2, #63
+	bic	r1, r1, #63
+	bic	r0, r2, #63
+	str	r2, [r5, #4]
+	clz	r7, r7
+	str	r3, [r5, #8]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #16]
+	ldr	r3, [sp]
+	str	r2, [r5, #12]
+	and	r6, r3, #63
+	add	r1, r1, r6, lsl #10
+	bl	flush_dcache_range
+	ldr	r0, [r5, #8]
+	add	r1, r0, #63
+	bic	r0, r0, #63
+	bic	r1, r1, #63
+	add	r1, r1, r6, lsl #7
+	bl	flush_dcache_range
+	movs	r3, #1
+	ldr	r2, [r10]
+	str	r3, [r5, #20]
+	movs	r1, #16
+	ldr	r3, [r5, #12]
+	str	r3, [r2, #20]
+	ldr	r3, [r5, #16]
+	str	r3, [r2, #24]
+	movs	r3, #0
+	bfi	r3, r1, #9, #5
+	movs	r1, #2
+	orr	r3, r3, #448
+	bfi	r3, r1, #3, #3
+	orr	r3, r3, #4
+	bfi	r3, r7, #1, #1
+	orr	r3, r3, #1
+	str	r3, [r2, #16]
+	str	r8, [r2, #12]
+	str	r4, [r2, #8]
+	orr	r4, r4, #4
+	str	r4, [r2, #8]
+	b	.L248
+.L255:
+	ldrh	ip, [r3, r0, lsl #2]
+	bic	r1, r1, #3
+	ldrh	fp, [fp, #2]
+	adds	r0, r0, #1
+	ldr	r6, [sp, #12]
+	orr	ip, ip, fp, lsl #16
+	str	ip, [r6, r1]
+	mov	r1, lr
+	b	.L254
+.L252:
+	ldr	r3, [r5]
+	str	r0, [r3]
+	b	.L256
+.L265:
+	.align	2
+.L264:
+	.word	.LANCHOR7
+	.word	.LANCHOR30
+	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR31
+	.word	.LANCHOR27
+	.word	.LANCHOR6
+	.size	nandc_xfer_start, .-nandc_xfer_start
+	.section	.text.nandc_set_seed,"ax",%progbits
+	.align	1
+	.global	nandc_set_seed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_set_seed, %function
+nandc_set_seed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L273
+	and	r0, r0, #127
+	ldr	r3, .L273+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r2, .L267
+	orr	r3, r3, #-1073741824
+.L267:
+	ldr	r2, .L273+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #9
+	ldr	r2, .L273+12
+	ldr	r2, [r2]
+	ite	eq
+	streq	r3, [r2, #520]
+	strne	r3, [r2, #336]
+	bx	lr
+.L274:
+	.align	2
+.L273:
+	.word	.LANCHOR29
+	.word	.LANCHOR32
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.size	nandc_set_seed, .-nandc_set_seed
+	.section	.text.flash_start_page_read,"ax",%progbits
+	.align	1
+	.global	flash_start_page_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ubfx	r3, r1, #21, #3
+	ldr	r2, .L293
+	str	r0, [sp, #4]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L276
+	movw	r2, #738
+	ldr	r1, .L293+4
+	ldr	r0, .L293+8
+	bl	printf
+.L277:
+	b	.L277
+.L276:
+	ldr	r2, .L293+12
+	ubfx	r5, r1, #24, #2
+	ubfx	r4, r1, #0, #21
+	ldr	r10, .L293+36
+	ldrb	r7, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L293+16
+	mov	r0, r7
+	ldr	r6, [r3]
+	lsl	fp, r7, #8
+	bl	nandc_cs
+	cmp	r5, #0
+	bne	.L278
+	ldr	r3, .L293+20
+	ldr	r2, .L293+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L279
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	cbz	r3, .L280
+.L279:
+	ldr	r3, .L293+28
+	mov	r0, r4
+	str	r2, [sp, #12]
+	ldrh	r8, [r3]
+	mov	r1, r8
+	bl	__aeabi_uidiv
+	mul	r3, r8, r0
+	mov	r1, r8
+	mov	r0, r4
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L281
+	add	r4, r3, r1, lsl #1
+.L280:
+	mov	r0, r7
+	bl	flash_enter_slc_mode
+	b	.L282
+.L281:
+	ldr	r2, .L293+32
+	ldrh	r4, [r2, r1, lsl #1]
+	add	r4, r4, r3
+.L282:
+	add	r6, r6, fp
+	movs	r3, #0
+	str	r3, [r6, #2056]
+	str	r3, [r6, #2052]
+	str	r3, [r6, #2052]
+	uxtb	r3, r4
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #8
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r6, #2052]
+	ldr	r3, [sp, #4]
+	str	r3, [r6, #2056]
+	ldr	r3, [r10]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L284
+	cbz	r5, .L284
+	add	r4, r4, r4, lsl #1
+	subs	r5, r5, #1
+	adds	r0, r4, r5
+.L292:
+	bl	nandc_set_seed
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs
+.L278:
+	ldr	r3, [r10]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L283
+	add	r3, r6, fp
+	str	r5, [r3, #2056]
+	b	.L282
+.L283:
+	mov	r0, r7
+	bl	flash_exit_slc_mode
+	b	.L282
+.L284:
+	mov	r0, r4
+	b	.L292
+.L294:
+	.align	2
+.L293:
+	.word	.LANCHOR8
+	.word	.LANCHOR33
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR34
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.FlashDeInit,"ax",%progbits
+	.align	1
+	.global	FlashDeInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashDeInit, %function
+FlashDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L307
+	bl	nandc_wait_flash_ready
+	movs	r0, #0
+	bl	hynix_reconfig_rr_para
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L296
+	ldr	r3, .L307+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L296
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L296:
+	ldr	r1, .L307+8
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	cbz	r3, .L297
+	movs	r0, #0
+	strb	r0, [r1]
+	bl	nandc_set_seed
+	movs	r3, #1
+	strb	r3, [r1]
+.L297:
+	movs	r0, #0
+	pop	{r4, pc}
+.L308:
+	.align	2
+.L307:
+	.word	.LANCHOR35
+	.word	.LANCHOR25
+	.word	.LANCHOR29
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.nandc_randomizer_enable,"ax",%progbits
+	.align	1
+	.global	nandc_randomizer_enable
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_randomizer_enable, %function
+nandc_randomizer_enable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L310
+	strb	r0, [r3]
+	bx	lr
+.L311:
+	.align	2
+.L310:
+	.word	.LANCHOR29
+	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
+	.section	.text.nandc_get_chip_if,"ax",%progbits
+	.align	1
+	.global	nandc_get_chip_if
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_get_chip_if, %function
+nandc_get_chip_if:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L313
+	adds	r0, r0, #8
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #8
+	bx	lr
+.L314:
+	.align	2
+.L313:
+	.word	.LANCHOR6
+	.size	nandc_get_chip_if, .-nandc_get_chip_if
+	.section	.text.buf_reinit,"ax",%progbits
+	.align	1
+	.global	buf_reinit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_reinit, %function
+buf_reinit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L318
+	movs	r2, #0
+	push	{r4, r5, lr}
+	mov	r1, r2
+	mov	r4, r3
+.L316:
+	uxtb	r0, r2
+	adds	r2, r2, #1
+	cmp	r2, #32
+	strb	r1, [r3, #2]
+	add	r5, r0, #1
+	strb	r0, [r3, #1]
+	strb	r5, [r3]
+	add	r3, r3, #48
+	str	r1, [r3, #-40]
+	bne	.L316
+	movs	r3, #255
+	strb	r3, [r4, #1488]
+	ldr	r3, .L318+4
+	strb	r1, [r3]
+	ldr	r3, .L318+8
+	strb	r2, [r3]
+	pop	{r4, r5, pc}
+.L319:
+	.align	2
+.L318:
+	.word	.LANCHOR36
+	.word	.LANCHOR37
+	.word	.LANCHOR38
+	.size	buf_reinit, .-buf_reinit
+	.section	.text.buf_add_tail,"ax",%progbits
+	.align	1
+	.global	buf_add_tail
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_add_tail, %function
+buf_add_tail:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #255
+	push	{r4, lr}
+	strb	r3, [r1]
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	cmp	r2, r3
+	bne	.L321
+	ldrb	r3, [r1, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L322
+	movs	r2, #74
+	ldr	r1, .L329
+	ldr	r0, .L329+4
+	bl	printf
+.L323:
+	b	.L323
+.L322:
+	strb	r3, [r0]
+	pop	{r4, pc}
+.L325:
+	muls	r3, r0, r3
+	strb	r2, [r4, r3]
+	pop	{r4, pc}
+.L321:
+	ldr	r4, .L329+8
+	movs	r3, #48
+.L328:
+	mov	r0, r2
+	muls	r2, r3, r2
+	ldrb	r2, [r4, r2]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L328
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L325
+	movs	r2, #81
+	ldr	r1, .L329
+	ldr	r0, .L329+4
+	bl	printf
+.L326:
+	b	.L326
+.L330:
+	.align	2
+.L329:
+	.word	.LANCHOR39
+	.word	.LC0
+	.word	.LANCHOR36
+	.size	buf_add_tail, .-buf_add_tail
+	.section	.text.buf_free,"ax",%progbits
+	.align	1
+	.global	buf_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_free, %function
+buf_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	and	r3, r3, #8
+	strb	r3, [r0, #2]
+	cbz	r3, .L332
+	ldr	r0, .L334
+	bl	buf_add_tail
+.L333:
+	ldr	r2, .L334+4
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2]
+	pop	{r3, pc}
+.L332:
+	ldr	r3, .L334
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r0]
+	ldrb	r2, [r0, #1]	@ zero_extendqisi2
+	strb	r2, [r3]
+	b	.L333
+.L335:
+	.align	2
+.L334:
+	.word	.LANCHOR37
+	.word	.LANCHOR38
+	.size	buf_free, .-buf_free
+	.section	.text.buf_alloc,"ax",%progbits
+	.align	1
+	.global	buf_alloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_alloc, %function
+buf_alloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r2, r0
+	ldr	r7, .L342
+	ldrb	r1, [r7]	@ zero_extendqisi2
+	cbnz	r1, .L337
+	movs	r2, #121
+	ldr	r1, .L342+4
+	ldr	r0, .L342+8
+	bl	printf
+.L338:
+	b	.L338
+.L337:
+	ldr	r5, .L342+12
+	ldr	r3, .L342+16
+	ldrb	r6, [r5]	@ zero_extendqisi2
+	add	r0, r6, r6, lsl #1
+	add	r0, r3, r0, lsl #4
+	cbnz	r2, .L339
+	cmp	r1, #1
+	beq	.L341
+.L339:
+	movs	r2, #48
+	subs	r1, r1, #1
+	muls	r2, r6, r2
+	strb	r1, [r7]
+	movs	r1, #1
+	adds	r4, r3, r2
+	ldrb	r6, [r3, r2]	@ zero_extendqisi2
+	strb	r1, [r4, #2]
+	movs	r1, #255
+	strb	r1, [r3, r2]
+	mov	r3, #-1
+	str	r3, [r4, #20]
+	movs	r3, #0
+	strb	r6, [r5]
+	strh	r3, [r4, #34]	@ movhi
+	str	r3, [r4, #8]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L341:
+	mov	r0, r2
+	pop	{r3, r4, r5, r6, r7, pc}
+.L343:
+	.align	2
+.L342:
+	.word	.LANCHOR38
+	.word	.LANCHOR40
+	.word	.LC0
+	.word	.LANCHOR37
+	.word	.LANCHOR36
+	.size	buf_alloc, .-buf_alloc
+	.section	.text.buf_remove_buf,"ax",%progbits
+	.align	1
+	.global	buf_remove_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_remove_buf, %function
+buf_remove_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldrb	r4, [r1, #1]	@ zero_extendqisi2
+	ldrb	r3, [r0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L345
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0]
+.L350:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L348:
+	mov	r5, r3
+	muls	r3, r2, r3
+	ldrb	r3, [r0, r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bne	.L347
+	muls	r2, r5, r2
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	strb	r3, [r0, r2]
+	movs	r3, #255
+	strb	r3, [r1]
+	b	.L350
+.L345:
+	ldr	r0, .L351
+	movs	r2, #48
+.L347:
+	cmp	r3, #255
+	bne	.L348
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L352:
+	.align	2
+.L351:
+	.word	.LANCHOR36
+	.size	buf_remove_buf, .-buf_remove_buf
+	.section	.text.buf_remove_free,"ax",%progbits
+	.align	1
+	.global	buf_remove_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_remove_free, %function
+buf_remove_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r5, .L357
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cbnz	r3, .L354
+	movs	r2, #170
+	ldr	r1, .L357+4
+	ldr	r0, .L357+8
+	bl	printf
+.L355:
+	b	.L355
+.L354:
+	mov	r1, r0
+	ldr	r0, .L357+12
+	bl	buf_remove_buf
+	cmp	r0, #1
+	bne	.L353
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r5]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #1
+	strb	r3, [r4, #2]
+.L353:
+	pop	{r3, r4, r5, pc}
+.L358:
+	.align	2
+.L357:
+	.word	.LANCHOR38
+	.word	.LANCHOR41
+	.word	.LC0
+	.word	.LANCHOR37
+	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.flash_check_bad_block,"ax",%progbits
+	.align	1
+	.global	flash_check_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_check_bad_block, %function
+flash_check_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L360
+	push	{r4, lr}
+	lsrs	r4, r1, #5
+	and	r1, r1, #31
+	ldrb	r3, [r2, #13]	@ zero_extendqisi2
+	ldrh	r2, [r2, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L360+4
+	uxth	r3, r3
+	ldr	r2, [r2]
+	adds	r3, r3, #31
+	asrs	r3, r3, #5
+	add	r2, r2, r4, lsl #2
+	lsls	r3, r3, #2
+	uxth	r3, r3
+	mla	r0, r0, r3, r2
+	ldr	r0, [r0, #912]
+	lsrs	r0, r0, r1
+	and	r0, r0, #1
+	pop	{r4, pc}
+.L361:
+	.align	2
+.L360:
+	.word	.LANCHOR19
+	.word	.LANCHOR5
+	.size	flash_check_bad_block, .-flash_check_bad_block
+	.section	.text.flash_mask_bad_block,"ax",%progbits
+	.align	1
+	.global	flash_mask_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_mask_bad_block, %function
+flash_mask_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L363
+	mov	r2, r1
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	mov	r6, r1
+	mov	r1, r0
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	ldr	r0, .L363+4
+	smulbb	r4, r4, r3
+	bl	printf
+	uxth	r4, r4
+	ldr	r3, .L363+8
+	add	r0, r4, #31
+	asrs	r0, r0, #5
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsls	r0, r0, #2
+	uxth	r0, r0
+	muls	r0, r5, r0
+	lsrs	r5, r6, #5
+	and	r6, r6, #31
+	lsl	r6, r3, r6
+	add	r0, r0, #912
+	add	r0, r0, r5, lsl #2
+	ldr	r3, [r2, r0]
+	orrs	r3, r3, r6
+	str	r3, [r2, r0]
+	pop	{r4, r5, r6, pc}
+.L364:
+	.align	2
+.L363:
+	.word	.LANCHOR19
+	.word	.LC6
+	.word	.LANCHOR5
+	.size	flash_mask_bad_block, .-flash_mask_bad_block
+	.section	.text.ftl_gc_write_buf,"ax",%progbits
+	.align	1
+	.global	ftl_gc_write_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_gc_write_buf, %function
+ftl_gc_write_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r1, r0
+	ldrb	r3, [r0, #2]	@ zero_extendqisi2
+	orr	r3, r3, #2
+	strb	r3, [r0, #2]
+	ldr	r0, .L366
+	bl	buf_add_tail
+	ldr	r3, .L366+4
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	adds	r0, r0, #1
+	uxtb	r0, r0
+	strb	r0, [r3]
+	pop	{r3, pc}
+.L367:
+	.align	2
+.L366:
+	.word	.LANCHOR42
+	.word	.LANCHOR43
+	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.ftl_write_buf,"ax",%progbits
+	.align	1
+	.global	ftl_write_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	cbnz	r0, .L369
+	movw	r2, #539
+	ldr	r1, .L375
+	ldr	r0, .L375+4
+	bl	printf
+.L370:
+	b	.L370
+.L369:
+	ldr	r2, .L375+8
+	ldrb	r3, [r0, #40]	@ zero_extendqisi2
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bcs	.L371
+	mov	r2, #544
+	ldr	r1, .L375
+	ldr	r0, .L375+4
+	bl	printf
+.L372:
+	b	.L372
+.L371:
+	ldr	r5, .L375+12
+	cbnz	r3, .L373
+	bl	buf_free
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	pop	{r3, r4, r5, pc}
+.L373:
+	mov	r1, r0
+	ldr	r0, .L375+16
+	bl	buf_add_tail
+	ldr	r3, .L375+20
+	ldrb	r1, [r4, #40]	@ zero_extendqisi2
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	adds	r0, r0, #1
+	ldr	r2, [r3, #16]
+	uxtb	r0, r0
+	strb	r0, [r5]
+	add	r2, r2, r1
+	str	r2, [r3, #16]
+	ldr	r2, [r3, #32]
+	adds	r2, r2, #1
+	str	r2, [r3, #32]
+	pop	{r3, r4, r5, pc}
+.L376:
+	.align	2
+.L375:
+	.word	.LANCHOR44
+	.word	.LC0
+	.word	.LANCHOR45
+	.word	.LANCHOR43
+	.word	.LANCHOR42
+	.word	.LANCHOR46
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_cache_flush,"ax",%progbits
+	.align	1
+	.global	ftl_cache_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_cache_flush, %function
+ftl_cache_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	ftl_cache_flush, .-ftl_cache_flush
+	.section	.text.ftl_read_buf,"ax",%progbits
+	.align	1
+	.global	ftl_read_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_buf, %function
+ftl_read_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r3, .L389
+	ldr	r3, [r3]
+	cmp	r3, r0
+	bhi	.L379
+	movw	r2, #771
+	ldr	r1, .L389+4
+	ldr	r0, .L389+8
+	bl	printf
+.L380:
+	b	.L380
+.L379:
+	ldr	r3, .L389+12
+	movs	r4, #0
+	mov	r5, r3
+.L383:
+	ldr	r2, [r3, #20]
+	cmp	r0, r2
+	bne	.L381
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	tst	r2, #8
+	beq	.L381
+	movs	r3, #48
+	mla	r4, r3, r4, r5
+	orr	r3, r2, #4
+	strb	r3, [r4, #2]
+	lsls	r3, r2, #31
+	bmi	.L378
+	mov	r0, r4
+	bl	buf_remove_free
+.L378:
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L381:
+	adds	r4, r4, #1
+	adds	r3, r3, #48
+	cmp	r4, #32
+	bne	.L383
+	ldr	r3, .L389+16
+	movs	r4, #0
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	ittt	eq
+	streq	r0, [r3]
+	ldreq	r3, .L389+20
+	streq	r1, [r3]
+	b	.L378
+.L390:
+	.align	2
+.L389:
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LC0
+	.word	.LANCHOR36
+	.word	.LANCHOR49
+	.word	.LANCHOR50
+	.size	ftl_read_buf, .-ftl_read_buf
+	.section	.text.ftl_read_buf_free,"ax",%progbits
+	.align	1
+	.global	ftl_read_buf_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_buf_free, %function
+ftl_read_buf_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r1, r0
+	mov	r4, r0
+	ldr	r0, .L395
+	bl	buf_remove_buf
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #30
+	bpl	.L392
+	bic	r3, r3, #4
+	strb	r3, [r4, #2]
+	pop	{r4, pc}
+.L392:
+	mov	r0, r4
+	pop	{r4, lr}
+	b	buf_free
+.L396:
+	.align	2
+.L395:
+	.word	.LANCHOR51
+	.size	ftl_read_buf_free, .-ftl_read_buf_free
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cbnz	r0, .L398
+	ldr	r3, .L401
+	ldr	r0, [r3]
+	bx	lr
+.L398:
+	cmp	r0, #4
+	ite	cc
+	movcc	r0, #8192
+	movcs	r0, #0
+	bx	lr
+.L402:
+	.align	2
+.L401:
+	.word	.LANCHOR52
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.gc_hook,"ax",%progbits
+	.align	1
+	.global	gc_hook
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_hook, %function
+gc_hook:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	gc_hook, .-gc_hook
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlGetCurEraseBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L405
+	ldrh	r0, [r3]
+	bx	lr
+.L406:
+	.align	2
+.L405:
+	.word	.LANCHOR53
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.align	1
+	.global	FtlGetAllBlockNum
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L408
+	ldrh	r0, [r3]
+	bx	lr
+.L409:
+	.align	2
+.L408:
+	.word	.LANCHOR54
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlLowFormat,"ax",%progbits
+	.align	1
+	.global	FtlLowFormat
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.gc_add_sblk,"ax",%progbits
+	.align	1
+	.global	gc_add_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_add_sblk, %function
+gc_add_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L438
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r5, r0
+	sub	sp, sp, #20
+	mov	r6, r1
+	mov	r7, r2
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L412
+	movs	r2, #240
+	ldr	r1, .L438+4
+	ldr	r0, .L438+8
+	bl	printf
+.L413:
+	b	.L413
+.L412:
+	ldr	r3, .L438+12
+	lsl	r8, r0, #2
+	ldr	r10, .L438+36
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r0, lsl #1]
+	ldr	r3, .L438+16
+	ldr	r3, [r3]
+	tst	r3, #256
+	beq	.L414
+	ldr	r2, .L438+20
+	ldr	r3, [r10]
+	ldrh	r2, [r2]
+	add	r3, r3, r8
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	ldr	r2, .L438+24
+	lsrs	r3, r3, #5
+	ldrh	r2, [r2, #52]
+	str	r4, [sp]
+	str	r2, [sp, #4]
+	mov	r2, r1
+	mov	r1, r0
+	ldr	r0, .L438+28
+	bl	printf
+.L414:
+	ldr	r3, [r10]
+	add	r3, r3, r8
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L415
+	cmp	r4, #0
+	beq	.L429
+	movs	r2, #245
+	ldr	r1, .L438+4
+	ldr	r0, .L438+8
+	bl	printf
+.L417:
+	b	.L417
+.L415:
+	ldr	r3, .L438+24
+	ldrh	r2, [r3]
+	cmp	r2, r5
+	beq	.L429
+	ldr	r2, .L438+32
+	ldr	r2, [r2]
+	ldrh	r1, [r2, #48]
+	cmp	r1, r5
+	beq	.L429
+	ldrh	r1, [r2, #16]
+	cmp	r1, r5
+	beq	.L429
+	ldrh	r1, [r2, #80]
+	cmp	r1, r5
+	beq	.L429
+	ldrh	r0, [r3, #52]!
+	movs	r1, #0
+.L418:
+	cmp	r1, r0
+	bcc	.L419
+	add	r3, r2, r7, lsl #7
+	adds	r3, r3, #136
+	cbz	r6, .L420
+	add	r3, r2, #392
+.L420:
+	add	r0, r3, #128
+	movw	r4, #65535
+.L423:
+	mov	r1, r3
+	adds	r3, r3, #2
+	ldrh	ip, [r1]
+	cmp	ip, r4
+	bne	.L421
+	strh	r5, [r1]	@ movhi
+	cbz	r6, .L422
+	ldrh	r3, [r2, #124]
+	adds	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+.L437:
+	movs	r0, #1
+.L411:
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L419:
+	ldrh	r4, [r3, #2]!
+	cmp	r4, r5
+	beq	.L429
+	adds	r1, r1, #1
+	b	.L418
+.L422:
+	add	r2, r2, r7, lsl #1
+	ldrh	r3, [r2, #120]
+	adds	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	b	.L437
+.L421:
+	cmp	r0, r3
+	bne	.L423
+	b	.L437
+.L429:
+	movs	r0, #0
+	b	.L411
+.L439:
+	.align	2
+.L438:
+	.word	.LANCHOR54
+	.word	.LANCHOR55
+	.word	.LC0
+	.word	.LANCHOR56
+	.word	.LANCHOR22
+	.word	.LANCHOR58
+	.word	.LANCHOR59
+	.word	.LC7
+	.word	.LANCHOR60
+	.word	.LANCHOR57
+	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_get_src_ppa_from_index,"ax",%progbits
+	.align	1
+	.global	gc_get_src_ppa_from_index
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_get_src_ppa_from_index, %function
+gc_get_src_ppa_from_index:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L441
+	ldr	r3, [r3]
+	ldr	r0, [r3, r0, lsl #2]
+	bx	lr
+.L442:
+	.align	2
+.L441:
+	.word	.LANCHOR61
+	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
+	.section	.text.gc_write_completed,"ax",%progbits
+	.align	1
+	.global	gc_write_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_write_completed, %function
+gc_write_completed:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r6, .L465
+.L444:
+	ldr	r1, .L465+4
+	ldrb	r5, [r1]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L457
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L457:
+	movs	r3, #48
+	muls	r3, r5, r3
+	adds	r2, r6, r3
+	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	ldrh	r4, [r2, #32]
+	strb	r3, [r1]
+	ldr	r1, [r2, #36]
+	cbz	r1, .L445
+	ldr	r3, .L465+8
+	movs	r0, #1
+	ldr	r2, [r2, #24]
+	strh	r0, [r3, #314]	@ movhi
+	ldr	r0, .L465+12
+	str	r2, [r3, #316]
+	bl	printf
+	mov	r2, #502
+	ldr	r1, .L465+16
+	ldr	r0, .L465+20
+	bl	printf
+.L446:
+	b	.L446
+.L445:
+	ldr	fp, .L465+40
+	ldr	r10, .L465+44
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	itett	eq
+	ldreq	r3, .L465+24
+	movne	r7, #1
+	ldreq	r3, [r3]
+	ldrbeq	r7, [r3, #89]	@ zero_extendqisi2
+	ldr	r3, .L465+28
+	ldr	r3, [r3]
+	it	eq
+	addeq	r7, r7, r7, lsl #1
+	tst	r3, #256
+	beq	.L448
+	movs	r3, #48
+	mov	r1, r4
+	mla	r3, r3, r5, r6
+	ldr	r0, .L465+32
+	ldrb	r2, [r3, #1]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	ldrb	r3, [r3, r4]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+.L448:
+	movs	r2, #48
+	ldr	r3, [r10]
+	mla	r5, r2, r5, r6
+	ldrb	r1, [r3, r4]	@ zero_extendqisi2
+	adds	r0, r3, r4
+	mov	r8, r4
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	cmp	r1, r3
+	beq	.L449
+	movw	r2, #509
+	ldr	r1, .L465+16
+	ldr	r0, .L465+20
+	bl	printf
+.L450:
+	b	.L450
+.L449:
+	ldrb	r3, [r5, #45]	@ zero_extendqisi2
+	cmp	r3, #3
+	beq	.L451
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L451
+	ldr	r3, .L465+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L451
+	mov	r4, r3
+.L452:
+	uxth	r1, r3
+	cmp	r7, r1
+	bls	.L444
+	ldrb	r1, [r0, r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	mla	r1, r2, r1, r6
+	strb	r4, [r1, #45]
+	b	.L452
+.L451:
+	ldr	r5, .L465+8
+	mov	fp, #255
+	movs	r3, #48
+	strh	r4, [r5, #312]	@ movhi
+.L453:
+	sub	r2, r8, r4
+	uxth	r2, r2
+	cmp	r7, r2
+	bls	.L444
+	ldr	r2, [r10]
+	movs	r1, #0
+	str	r3, [sp, #12]
+	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	strb	fp, [r2, r8]
+	add	r8, r8, #1
+	mla	r2, r3, r0, r6
+	add	r0, r0, r0, lsl #1
+	strb	r1, [r2, #45]
+	add	r0, r6, r0, lsl #4
+	bl	buf_free
+	ldrb	r2, [r5, #7]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	subs	r2, r2, #1
+	strb	r2, [r5, #7]
+	b	.L453
+.L466:
+	.align	2
+.L465:
+	.word	.LANCHOR36
+	.word	.LANCHOR62
+	.word	.LANCHOR59
+	.word	.LC8
+	.word	.LANCHOR63
+	.word	.LC0
+	.word	.LANCHOR60
+	.word	.LANCHOR22
+	.word	.LC9
+	.word	.LANCHOR66
+	.word	.LANCHOR64
+	.word	.LANCHOR65
+	.size	gc_write_completed, .-gc_write_completed
+	.section	.text.gc_get_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_get_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_get_src_blk, %function
+gc_get_src_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L476
+	push	{r4, r5, r6, r7, lr}
+	ldr	r2, [r3]
+	ldr	r3, .L476+4
+	ldrh	r4, [r2, #124]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbz	r4, .L468
+	add	r3, r2, #392
+	movs	r4, #1
+.L469:
+	add	r6, r3, #128
+	movw	r5, #65535
+.L473:
+	mov	r7, r3
+	ldrh	r0, [r3], #2
+	cmp	r0, r5
+	beq	.L471
+	strh	r5, [r7]	@ movhi
+	cbz	r4, .L472
+	ldrh	r3, [r2, #124]
+	subs	r3, r3, #1
+	strh	r3, [r2, #124]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L468:
+	add	r3, r1, #60
+	ldrh	r3, [r2, r3, lsl #1]
+	cbz	r3, .L474
+	add	r3, r2, r1, lsl #7
+	adds	r3, r3, #136
+	b	.L469
+.L472:
+	add	r2, r2, r1, lsl #1
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L471:
+	cmp	r3, r6
+	bne	.L473
+	pop	{r4, r5, r6, r7, pc}
+.L474:
+	movw	r0, #65535
+	pop	{r4, r5, r6, r7, pc}
+.L477:
+	.align	2
+.L476:
+	.word	.LANCHOR60
+	.word	.LANCHOR67
+	.size	gc_get_src_blk, .-gc_get_src_blk
+	.section	.text.gc_free_temp_buf,"ax",%progbits
+	.align	1
+	.global	gc_free_temp_buf
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_temp_buf, %function
+gc_free_temp_buf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r5, .L492
+	ldrb	r0, [r5, #7]	@ zero_extendqisi2
+	cbz	r0, .L478
+	ldr	r3, .L492+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	bhi	.L485
+	ldr	r3, .L492+8
+	movs	r7, #48
+	ldrh	r4, [r5, #312]
+	ldr	r6, .L492+12
+	ldrh	r2, [r3]
+	ldr	r3, .L492+16
+	add	r1, r4, #24
+	ldr	r0, .L492+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r2, r1
+	ldr	r1, [r6]
+.L480:
+	cmp	r4, r2
+	bcc	.L483
+.L485:
+	movs	r0, #0
+.L478:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L483:
+	ldrb	r3, [r1, r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L481
+	mla	ip, r7, r3, r0
+	ldrb	ip, [ip, #45]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L481
+	add	r3, r3, r3, lsl #1
+	add	r0, r0, r3, lsl #4
+	bl	buf_free
+	ldr	r3, .L492+24
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L482
+	ldr	r3, [r6]
+	mov	r1, r4
+	ldr	r0, .L492+28
+	ldrb	r2, [r3, r4]	@ zero_extendqisi2
+	bl	printf
+.L482:
+	ldr	r3, [r6]
+	movs	r2, #255
+	movs	r0, #1
+	strb	r2, [r3, r4]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	strb	r3, [r5, #7]
+	pop	{r3, r4, r5, r6, r7, pc}
+.L481:
+	adds	r4, r4, #1
+	b	.L480
+.L493:
+	.align	2
+.L492:
+	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR69
+	.word	.LANCHOR36
+	.word	.LANCHOR22
+	.word	.LC10
+	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.gc_static_wearleveling,"ax",%progbits
+	.align	1
+	.global	gc_static_wearleveling
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L542
+	ldr	r4, [r3]
+	ldr	r3, [r4, #32]
+	cmp	r3, #20480
+	bls	.L495
+	ldr	r2, [r4, #36]
+	add	r2, r2, r3, lsr #10
+	ubfx	r3, r3, #0, #10
+	str	r3, [r4, #32]
+	str	r2, [r4, #36]
+.L495:
+	ldr	r3, .L542+4
+	ldr	r0, [r4, #36]
+	ldr	r3, [r3]
+	ldr	r2, [r3, #568]
+	ldr	r1, [r3, #12]
+	add	r2, r2, #12910592
+	add	r2, r2, #49408
+	cmp	r1, r2
+	bhi	.L496
+	ldr	r2, [r3, #572]
+	adds	r2, r2, #128
+	cmp	r0, r2
+	bls	.L494
+.L496:
+	str	r0, [r3, #572]
+	movw	r6, #65535
+	str	r1, [r3, #568]
+	movs	r0, #0
+	ldr	r3, .L542+8
+	mov	r2, r0
+	ldrh	ip, [r4, #134]
+	mov	r8, r0
+	mov	r10, r0
+	mov	fp, r0
+	ldrh	r3, [r3]
+	mov	r7, r0
+	mov	r5, r6
+	str	r3, [sp, #8]
+	ldr	r3, .L542+12
+	ldr	r3, [r3]
+	add	r3, r3, ip, lsl #2
+.L498:
+	ldr	r1, [sp, #8]
+	cmp	ip, r1
+	bcc	.L502
+	ldrh	r3, [r4, #96]
+	mov	r1, r10
+	str	r2, [sp, #12]
+	cmp	r3, fp
+	ldrh	r3, [r4, #98]
+	it	cc
+	strhcc	fp, [r4, #96]	@ movhi
+	cmp	r3, r7
+	it	cc
+	strhcc	r7, [r4, #98]	@ movhi
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #12]
+	mov	r1, r8
+	strh	r0, [r4, #88]	@ movhi
+	str	r0, [sp, #8]
+	mov	r0, r2
+	bl	__aeabi_uidiv
+	strh	r0, [r4, #90]	@ movhi
+	ldr	r4, .L542+16
+	ldr	r3, [sp, #8]
+	ldr	r2, [r4]
+	tst	r2, #256
+	beq	.L505
+	uxth	r0, r0
+	uxth	r3, r3
+	str	r0, [sp]
+	mov	r2, r8
+	mov	r1, r10
+	ldr	r0, .L542+20
+	bl	printf
+.L505:
+	ldr	r3, [r4]
+	lsls	r2, r3, #23
+	bpl	.L506
+	str	r7, [sp]
+	mov	r3, fp
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, .L542+24
+	bl	printf
+.L506:
+	subs	r7, r7, r5
+	cmp	r7, #64
+	bgt	.L507
+.L513:
+	cmp	r5, #0
+	bne	.L508
+.L514:
+	cbz	r6, .L494
+	ldr	r3, .L542
+	ldr	r2, .L542+8
+	ldr	r1, [r3]
+	ldrh	r5, [r2]
+	ldr	r2, .L542+12
+	ldrh	r3, [r1, #134]
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+.L519:
+	cmp	r3, r5
+	bcc	.L521
+	ldrh	r3, [r1, #74]
+	add	r3, r3, r6
+	strh	r3, [r1, #74]	@ movhi
+	ldrh	r3, [r1, #96]
+	cmp	r6, r3
+	bcs	.L494
+	subs	r6, r3, r6
+	strh	r6, [r1, #96]	@ movhi
+.L494:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L502:
+	ldrb	r1, [r3, #2]	@ zero_extendqisi2
+	tst	r1, #8
+	beq	.L499
+	ldrh	lr, [r3]
+	ldr	r1, [r3]
+	ubfx	lr, lr, #0, #11
+	ubfx	r1, r1, #11, #8
+.L500:
+	cmp	r6, lr
+	add	r0, r0, lr
+	it	cs
+	movcs	r6, lr
+	cmp	fp, lr
+	it	cc
+	movcc	fp, lr
+	movw	lr, #65535
+	cmp	r1, lr
+	add	r10, r10, #1
+	uxth	r10, r10
+	bne	.L522
+	b	.L523
+.L499:
+	tst	r1, #24
+	bne	.L501
+	ldrh	lr, [r3]
+	movw	r1, #65535
+	ubfx	lr, lr, #0, #11
+	b	.L500
+.L501:
+	ldr	r1, [r3]
+	ubfx	r1, r1, #11, #8
+.L522:
+	cmp	r5, r1
+	add	r8, r8, #1
+	it	cs
+	movcs	r5, r1
+	uxth	r8, r8
+	cmp	r7, r1
+	add	r2, r2, r1
+	it	cc
+	movcc	r7, r1
+.L523:
+	add	ip, ip, #1
+	adds	r3, r3, #4
+	uxth	ip, ip
+	b	.L498
+.L507:
+	ldr	r3, .L542
+	ldr	r7, .L542+8
+	ldr	r8, .L542+12
+	ldr	r3, [r3]
+	ldrh	r4, [r3, #134]
+.L510:
+	ldrh	r3, [r7]
+	cmp	r3, r4
+	bls	.L513
+	ldr	r1, [r8]
+	lsls	r2, r4, #2
+	adds	r3, r1, r2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	tst	r3, #192
+	beq	.L511
+	and	r0, r3, #224
+	cmp	r0, #224
+	beq	.L511
+	ubfx	r3, r3, #3, #2
+	lsls	r3, r3, #30
+	bpl	.L511
+	ldr	r3, [r1, r2]
+	ubfx	r3, r3, #11, #8
+	cmp	r3, r5
+	bhi	.L511
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	gc_add_sblk
+.L511:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L510
+.L508:
+	ldr	r3, .L542
+	ldr	r2, .L542+8
+	ldr	r1, [r3]
+	ldrh	r7, [r2]
+	ldr	r2, .L542+12
+	ldrh	r3, [r1, #134]
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+.L515:
+	cmp	r3, r7
+	bcc	.L517
+	ldrh	r3, [r1, #72]
+	add	r3, r3, r5
+	strh	r3, [r1, #72]	@ movhi
+	ldrh	r3, [r1, #98]
+	cmp	r5, r3
+	itt	cc
+	subcc	r5, r3, r5
+	strhcc	r5, [r1, #98]	@ movhi
+	b	.L514
+.L517:
+	ldr	r0, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r2, r2, #4
+	ubfx	r4, r0, #11, #8
+	cmp	r5, r4
+	ittt	ls
+	subls	r4, r4, r5
+	bfils	r0, r4, #11, #8
+	strls	r0, [r2, #-4]
+	b	.L515
+.L521:
+	ldrh	r0, [r2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r2, r2, #4
+	ubfx	r4, r0, #0, #11
+	cmp	r4, r6
+	ittt	ge
+	subge	r4, r4, r6
+	bfige	r0, r4, #0, #11
+	strhge	r0, [r2, #-4]	@ movhi
+	b	.L519
+.L543:
+	.align	2
+.L542:
+	.word	.LANCHOR46
+	.word	.LANCHOR60
+	.word	.LANCHOR54
+	.word	.LANCHOR57
+	.word	.LANCHOR22
+	.word	.LC11
+	.word	.LC12
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.print_gc_debug_info,"ax",%progbits
+	.align	1
+	.global	print_gc_debug_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, lr}
+	ldr	r0, .L545
+	ldrh	r3, [r0, #310]
+	ldrh	r2, [r0, #2]
+	ldrh	r1, [r0]
+	ldrb	r0, [r0, #7]	@ zero_extendqisi2
+	str	r0, [sp, #4]
+	ldr	r0, .L545+4
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r0, .L545+8
+	bl	printf
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+.L546:
+	.align	2
+.L545:
+	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LC13
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.global	__aeabi_idiv
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_list_in_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L556
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	mov	r7, r1
+	mov	r5, r4
+	ldr	r3, [r3]
+	add	r3, r3, r0, lsl #2
+	ldrb	fp, [r3, #3]	@ zero_extendqisi2
+	ldr	r3, .L556+4
+	ldrb	r10, [r3]	@ zero_extendqisi2
+	ldr	r3, .L556+8
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, .L556+12
+	smulbb	r0, r8, r0
+	uxth	r6, r0
+.L548:
+	cmp	r5, r10
+	blt	.L552
+	mov	r3, r4
+	movw	r2, #65535
+.L553:
+	cmp	r3, r10
+	blt	.L554
+	mov	r0, r4
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L552:
+	asr	r2, fp, r5
+	lsls	r2, r2, #31
+	bmi	.L549
+	mov	r1, r8
+	mov	r0, r5
+	str	r3, [sp, #4]
+	bl	__aeabi_idiv
+	ldr	r3, [sp, #4]
+	cmp	r8, #1
+	ldrh	r2, [r3]
+	rsb	r2, r2, #21
+	lsl	r0, r0, r2
+	it	hi
+	andhi	r2, r5, #1
+	add	r0, r0, r6
+	uxth	r0, r0
+	it	hi
+	addhi	r0, r0, r2
+	strh	r0, [r7, r4, lsl #1]	@ movhi
+	adds	r4, r4, #1
+.L549:
+	adds	r5, r5, #1
+	b	.L548
+.L554:
+	strh	r2, [r7, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	b	.L553
+.L557:
+	.align	2
+.L556:
+	.word	.LANCHOR57
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
+	.section	.text.ftl_alloc_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+.L559:
+	ldr	r3, .L580
+	cmp	r0, #5
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	movw	r4, #65535
+	mov	r5, r0
+	mov	lr, #0
+	mov	ip, r4
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+	ite	ne
+	movne	r3, #0
+	moveq	r3, #2
+	ldr	r8, [sp, #8]
+	str	r3, [sp, #12]
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	str	r3, [sp, #20]
+	ldr	r3, .L580+4
+	ldr	r2, [r3]
+	ldr	r3, .L580+8
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+.L574:
+	ldrh	r7, [r2, #132]
+	ldr	r1, [sp, #16]
+	mov	r3, r7
+	add	r1, r1, r7, lsl #2
+.L560:
+	cmp	r3, r8
+	blt	.L572
+	subs	r3, r3, r7
+	ldr	r1, [sp, #8]
+	add	lr, lr, r3
+	ldrh	r3, [r2, #134]
+	uxth	lr, lr
+	subs	r1, r1, r3
+	cmp	lr, r1
+	blt	.L573
+	movw	r1, #65535
+	cmp	r4, r1
+	beq	.L573
+	ldr	r3, [sp, #16]
+	add	r6, r3, r4, lsl #2
+	b	.L564
+.L572:
+	ldrb	r0, [r1, #2]	@ zero_extendqisi2
+	mov	r6, r1
+	tst	r0, #224
+	bne	.L561
+	ubfx	r10, r0, #3, #2
+	ldr	r0, [sp, #20]
+	cmp	r0, r10
+	beq	.L561
+	ldr	r0, [sp, #12]
+	cbz	r0, .L562
+	ldr	r0, [r1]
+	ldrh	fp, [r2, #72]
+	ldrh	r10, [r2, #90]
+	ubfx	r0, r0, #11, #8
+	add	fp, fp, r0
+	add	r10, r10, #1
+	cmp	fp, r10
+	ble	.L563
+	uxth	r0, r0
+	cmp	ip, r0
+	bls	.L561
+	uxth	r4, r3
+	mov	ip, r0
+.L561:
+	adds	r3, r3, #1
+	adds	r1, r1, #4
+	b	.L560
+.L562:
+	ldrh	r0, [r1]
+	ldrh	fp, [r2, #74]
+	ldrh	r10, [r2, #88]
+	ubfx	r0, r0, #0, #11
+	add	fp, fp, r0
+	add	r10, r10, #1
+	cmp	fp, r10
+	ble	.L563
+	cmp	r0, ip
+	bge	.L561
+	mov	ip, r0
+	uxth	r4, r3
+	b	.L561
+.L563:
+	uxth	r4, r3
+.L564:
+	ldr	r3, .L580+12
+	ldr	r3, [r3]
+	lsls	r1, r3, #19
+	bpl	.L565
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	mov	r1, r4
+	ldrb	r2, [r6, #3]	@ zero_extendqisi2
+	ldr	r0, .L580+16
+	str	r2, [sp]
+	lsrs	r3, r3, #5
+	mov	r2, r5
+	bl	printf
+.L565:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bfi	r3, r5, #5, #3
+	uxtb	r3, r3
+	ubfx	r2, r3, #3, #2
+	orrs	r2, r2, r1
+	bfi	r3, r2, #3, #2
+	lsls	r2, r2, #31
+	strb	r3, [r6, #2]
+	ldr	r3, .L580+4
+	ldr	r3, [r3]
+	strh	r4, [r3, #132]	@ movhi
+	bpl	.L566
+	ldrh	r2, [r3, #116]
+	subs	r2, r2, #1
+	strh	r2, [r3, #116]	@ movhi
+.L567:
+	cmp	r5, #5
+	bne	.L569
+	ldrh	r2, [r3, #120]
+	adds	r2, r2, #1
+	strh	r2, [r3, #120]	@ movhi
+.L576:
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L566:
+	ldrb	r2, [r6, #2]	@ zero_extendqisi2
+	tst	r2, #24
+	itete	eq
+	ldrheq	r2, [r3, #114]
+	ldrhne	r2, [r3, #118]
+	addeq	r2, r2, #-1
+	addne	r2, r2, #-1
+	ite	eq
+	strheq	r2, [r3, #114]	@ movhi
+	strhne	r2, [r3, #118]	@ movhi
+	b	.L567
+.L569:
+	cmp	r5, #2
+	bne	.L571
+	ldrh	r2, [r3, #122]
+	adds	r2, r2, #1
+	strh	r2, [r3, #122]	@ movhi
+	b	.L576
+.L571:
+	cmp	r5, #3
+	bne	.L576
+	ldrh	r2, [r3, #124]
+	adds	r2, r2, #1
+	strh	r2, [r3, #124]	@ movhi
+	b	.L576
+.L573:
+	strh	r3, [r2, #132]	@ movhi
+	mov	r8, r7
+	b	.L574
+.L581:
+	.align	2
+.L580:
+	.word	.LANCHOR54
+	.word	.LANCHOR46
+	.word	.LANCHOR57
+	.word	.LANCHOR22
+	.word	.LC14
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_free_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L583
+	movw	r2, #313
+	ldr	r1, .L593
+	ldr	r0, .L593+4
+	bl	printf
+.L584:
+	b	.L584
+.L583:
+	ldr	r3, .L593+8
+	ldr	r2, [r3]
+	add	r2, r2, r0, lsl #2
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	ands	r1, r3, #224
+	bne	.L585
+	mov	r2, #316
+	ldr	r1, .L593
+	ldr	r0, .L593+4
+	bl	printf
+.L586:
+	b	.L586
+.L585:
+	cmp	r1, #160
+	ubfx	r4, r3, #3, #2
+	ldr	r3, .L593+12
+	bne	.L587
+	ldr	r5, [r3]
+	ldrh	r1, [r5, #120]
+	subs	r1, r1, #1
+	strh	r1, [r5, #120]	@ movhi
+.L588:
+	ldr	r1, [r3]
+	lsls	r3, r4, #31
+	bpl	.L590
+	ldrh	r3, [r1, #116]
+	adds	r3, r3, #1
+	strh	r3, [r1, #116]	@ movhi
+.L591:
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	bfc	r3, #5, #3
+	strb	r3, [r2, #2]
+	movs	r2, #0
+	ldr	r3, .L593+16
+	ldr	r3, [r3]
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L587:
+	cmp	r1, #64
+	bne	.L589
+	ldr	r5, [r3]
+	ldrh	r1, [r5, #122]
+	subs	r1, r1, #1
+	strh	r1, [r5, #122]	@ movhi
+	b	.L588
+.L589:
+	cmp	r1, #96
+	itttt	eq
+	ldreq	r5, [r3]
+	ldrheq	r1, [r5, #124]
+	addeq	r1, r1, #-1
+	strheq	r1, [r5, #124]	@ movhi
+	b	.L588
+.L590:
+	cbnz	r4, .L592
+	ldrh	r3, [r1, #114]
+	adds	r3, r3, #1
+	strh	r3, [r1, #114]	@ movhi
+	b	.L591
+.L592:
+	ldrh	r3, [r1, #118]
+	adds	r3, r3, #1
+	strh	r3, [r1, #118]	@ movhi
+	b	.L591
+.L594:
+	.align	2
+.L593:
+	.word	.LANCHOR72
+	.word	.LC0
+	.word	.LANCHOR57
+	.word	.LANCHOR46
+	.word	.LANCHOR56
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_free_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r5, #0
+	ldr	r6, .L634
+.L596:
+	uxth	r2, r5
+	ldr	r3, .L634+4
+	ldrh	r1, [r3, #52]
+	cmp	r1, r2
+	bhi	.L612
+	movs	r2, #0
+	strh	r2, [r3, #52]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L612:
+	uxth	r2, r5
+	add	r3, r3, r2, lsl #1
+	ldrh	r4, [r3, #54]
+	ldr	r3, [r6]
+	ldrh	r2, [r3, r4, lsl #1]
+	cbz	r2, .L597
+	mov	r1, r4
+	ldr	r0, .L634+8
+	bl	printf
+.L597:
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	bne	.L598
+	ldr	r3, .L634+12
+	ldr	r7, [r3]
+	ldr	r3, .L634+16
+	ldr	r3, [r3]
+	add	r7, r7, r4, lsl #2
+	lsls	r3, r3, #23
+	bpl	.L599
+	ldrb	r2, [r7, #2]	@ zero_extendqisi2
+	mov	r1, r4
+	ldr	r0, .L634+20
+	lsrs	r2, r2, #5
+	bl	printf
+.L599:
+	ldrb	r3, [r7, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L600
+	tst	r3, #192
+	bne	.L601
+.L600:
+	movw	r2, #753
+	ldr	r1, .L634+24
+	ldr	r0, .L634+28
+	bl	printf
+.L602:
+	b	.L602
+.L601:
+	mov	r0, r4
+	bl	ftl_free_sblk
+	ldr	r3, .L634+32
+	ldr	r3, [r3]
+	ldrh	r1, [r3, #124]
+	cbz	r1, .L603
+	add	r0, r3, #392
+	movs	r2, #0
+.L605:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L604
+	adds	r2, r2, #196
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #124]	@ movhi
+.L603:
+	ldrh	r1, [r3, #120]
+	cbz	r1, .L606
+	add	r0, r3, #136
+	movs	r2, #0
+.L608:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L607
+	adds	r2, r2, #68
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #120]	@ movhi
+.L606:
+	ldrh	r1, [r3, #122]
+	cbz	r1, .L609
+	add	r0, r3, #264
+	movs	r2, #0
+.L611:
+	ldrh	r7, [r0], #2
+	cmp	r4, r7
+	bne	.L610
+	adds	r2, r2, #132
+	movw	r0, #65535
+	subs	r1, r1, #1
+	strh	r0, [r3, r2, lsl #1]	@ movhi
+	strh	r1, [r3, #122]	@ movhi
+.L609:
+	adds	r5, r5, #1
+	b	.L596
+.L604:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L605
+	b	.L603
+.L607:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L608
+	b	.L606
+.L610:
+	adds	r2, r2, #1
+	cmp	r2, #64
+	bne	.L611
+	b	.L609
+.L598:
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r4
+	bl	gc_add_sblk
+	b	.L609
+.L635:
+	.align	2
+.L634:
+	.word	.LANCHOR56
+	.word	.LANCHOR59
+	.word	.LC15
+	.word	.LANCHOR57
+	.word	.LANCHOR22
+	.word	.LC16
+	.word	.LANCHOR73
+	.word	.LC0
+	.word	.LANCHOR60
+	.size	gc_free_src_blk, .-gc_free_src_blk
+	.section	.text.ftl_erase_phy_blk,"ax",%progbits
+	.align	1
+	.global	ftl_erase_phy_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r6, r1
+	ldr	r3, .L641
+	ldr	r7, .L641+4
+	ldrh	r4, [r3]
+	rsb	r3, r4, #21
+	movs	r4, #1
+	asr	r5, r0, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L641+8
+	subs	r4, r4, #1
+	uxtb	r5, r5
+	ands	r4, r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	sxth	r4, r4
+	cbz	r3, .L637
+	ldrh	r2, [r7]
+	clz	r1, r1
+	lsrs	r1, r1, #5
+	mov	r0, r5
+	muls	r2, r4, r2
+	bl	flash_erase_block_en
+.L637:
+	ldrh	r2, [r7]
+	uxtb	r1, r6
+	mov	r0, r5
+	muls	r2, r4, r2
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	flash_erase_block_en
+.L642:
+	.align	2
+.L641:
+	.word	.LANCHOR71
+	.word	.LANCHOR75
+	.word	.LANCHOR74
+	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
+	.section	.text.ftl_erase_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_erase_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_erase_sblk, %function
+ftl_erase_sblk:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r6, .L663
+	sub	sp, sp, #64
+	mov	r7, r1
+	movs	r5, #0
+	ldr	r3, [r6]
+	add	r3, r3, r0, lsl #2
+	ldrb	r8, [r3, #3]	@ zero_extendqisi2
+.L644:
+	ldr	r3, .L663+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bge	.L651
+	ldr	r3, .L663+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	ldr	r3, .L663+12
+	ldrh	ip, [r3]
+	movs	r3, #0
+	mul	r10, r0, r5
+	mov	r2, r3
+	mul	lr, r0, r4
+	b	.L652
+.L646:
+	add	r1, r2, r10
+	asr	r1, r8, r1
+	lsls	r1, r1, #31
+	bmi	.L645
+	add	r1, sp, #64
+	add	fp, r1, r3, lsl #2
+	and	r1, r2, #1
+	add	r1, r1, lr
+	mul	r1, ip, r1
+	adds	r3, r3, #1
+	str	r1, [fp, #-64]
+.L645:
+	adds	r2, r2, #1
+.L652:
+	cmp	r2, r0
+	blt	.L646
+	cmp	r3, #2
+	bne	.L647
+	ldr	r3, .L663+16
+	uxtb	r10, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L648
+	clz	r1, r7
+	ldm	sp, {r2, r3}
+	lsrs	r1, r1, #5
+	mov	r0, r10
+	bl	flash_erase_duplane_block
+.L648:
+	ldm	sp, {r2, r3}
+	uxtb	r1, r7
+	mov	r0, r10
+	bl	flash_erase_duplane_block
+.L649:
+	adds	r5, r5, #1
+	b	.L644
+.L647:
+	cmp	r3, #1
+	bne	.L649
+	ldr	r3, .L663+16
+	uxtb	r10, r5
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L650
+	clz	r1, r7
+	ldr	r2, [sp]
+	lsrs	r1, r1, #5
+	mov	r0, r10
+	bl	flash_erase_block_en
+.L650:
+	ldr	r2, [sp]
+	uxtb	r1, r7
+	mov	r0, r10
+	bl	flash_erase_block_en
+	b	.L649
+.L651:
+	ldr	r1, .L663+20
+	ldr	r0, [r6]
+	cbnz	r7, .L653
+	ldrh	r2, [r0, r4, lsl #2]
+	adds	r3, r2, #1
+	ubfx	r3, r3, #0, #11
+	bfi	r2, r3, #0, #11
+	strh	r2, [r0, r4, lsl #2]	@ movhi
+	ldr	r2, [r1]
+	ldr	r1, [r2, #84]
+	adds	r1, r1, #1
+	str	r1, [r2, #84]
+	ldrh	r1, [r2, #96]
+	cmp	r1, r3
+	bge	.L655
+	strh	r3, [r2, #96]	@ movhi
+.L655:
+	movs	r0, #0
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L653:
+	ldr	r2, [r0, r4, lsl #2]
+	ubfx	r3, r2, #11, #8
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	bfi	r2, r3, #11, #8
+	uxth	r3, r3
+	str	r2, [r0, r4, lsl #2]
+	ldr	r2, [r1]
+	ldr	r1, [r2, #80]
+	adds	r1, r1, #1
+	str	r1, [r2, #80]
+	ldrh	r1, [r2, #98]
+	cmp	r1, r3
+	it	cc
+	strhcc	r3, [r2, #98]	@ movhi
+	b	.L655
+.L664:
+	.align	2
+.L663:
+	.word	.LANCHOR57
+	.word	.LANCHOR76
+	.word	.LANCHOR70
+	.word	.LANCHOR75
+	.word	.LANCHOR74
+	.word	.LANCHOR46
+	.size	ftl_erase_sblk, .-ftl_erase_sblk
+	.section	.text.ftl_alloc_sys_blk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_sys_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_sys_blk, %function
+ftl_alloc_sys_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L675
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #136]
+	ldrh	r1, [r3, #112]
+	cmp	r2, #63
+	itt	hi
+	movhi	r2, #0
+	strhhi	r2, [r3, #136]	@ movhi
+	cbnz	r1, .L667
+	mov	r2, #440
+	ldr	r1, .L675+4
+	ldr	r0, .L675+8
+	bl	printf
+.L668:
+	b	.L668
+.L667:
+	movw	r5, #65535
+	movs	r6, #0
+	mov	r7, r5
+.L673:
+	ldrh	r2, [r3, #136]
+	add	r4, r3, r2, lsl #1
+	adds	r4, r4, #158
+.L669:
+	cmp	r2, #63
+	ble	.L671
+	strh	r6, [r3, #136]	@ movhi
+	b	.L673
+.L671:
+	ldrh	r0, [r4, #2]!
+	cmp	r0, r5
+	bne	.L674
+	adds	r2, r2, #1
+	b	.L669
+.L674:
+	add	r4, r2, #80
+	subs	r1, r1, #1
+	strh	r7, [r3, r4, lsl #1]	@ movhi
+	strh	r2, [r3, #136]	@ movhi
+	strh	r1, [r3, #112]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L676:
+	.align	2
+.L675:
+	.word	.LANCHOR46
+	.word	.LANCHOR77
+	.word	.LC0
+	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
+	.section	.text.ftl_free_sys_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_sys_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free_sys_blk, %function
+ftl_free_sys_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L686
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #138]
+	ldrh	r1, [r3, #112]
+	cmp	r2, #63
+	itt	hi
+	movhi	r2, #0
+	strhhi	r2, [r3, #138]	@ movhi
+	cmp	r1, #63
+	bls	.L679
+	mov	r2, #464
+	ldr	r1, .L686+4
+	ldr	r0, .L686+8
+	bl	printf
+.L680:
+	b	.L680
+.L679:
+	movw	r6, #65535
+	movs	r5, #0
+.L685:
+	ldrh	r2, [r3, #138]
+	add	r4, r3, r2, lsl #1
+	adds	r4, r4, #158
+.L681:
+	cmp	r2, #63
+	ble	.L683
+	strh	r5, [r3, #138]	@ movhi
+	b	.L685
+.L683:
+	ldrh	r7, [r4, #2]!
+	cmp	r7, r6
+	bne	.L682
+	add	r4, r2, #80
+	adds	r1, r1, #1
+	strh	r0, [r3, r4, lsl #1]	@ movhi
+	strh	r2, [r3, #138]	@ movhi
+	strh	r1, [r3, #112]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L682:
+	adds	r2, r2, #1
+	b	.L681
+.L687:
+	.align	2
+.L686:
+	.word	.LANCHOR46
+	.word	.LANCHOR78
+	.word	.LC0
+	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
+	.section	.text.ftl_info_data_recovery,"ax",%progbits
+	.align	1
+	.global	ftl_info_data_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_data_recovery, %function
+ftl_info_data_recovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0]
+	movw	r3, #65535
+	push	{r4, r5, lr}
+	cmp	r1, r3
+	beq	.L688
+	ldr	r3, .L697
+	ldr	r4, [r3]
+	add	r2, r4, r1, lsl #2
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L688
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	bfi	r3, r0, #5, #3
+	strb	r3, [r2, #2]
+	uxtb	r3, r3
+	ldr	r2, .L697+4
+	tst	r3, #8
+	ldr	r5, [r2]
+	beq	.L692
+	ldrh	r0, [r5, #116]
+	subs	r0, r0, #1
+	strh	r0, [r5, #116]	@ movhi
+.L693:
+	and	r3, r3, #224
+	cmp	r3, #160
+	bne	.L695
+	ldr	r3, [r4, r1, lsl #2]
+	ldr	r2, [r2]
+	ubfx	r0, r3, #11, #8
+	adds	r0, r0, #1
+	bfi	r3, r0, #11, #8
+	str	r3, [r4, r1, lsl #2]
+	ldrh	r3, [r2, #120]
+	subs	r3, r3, #1
+	strh	r3, [r2, #120]	@ movhi
+	pop	{r4, r5, pc}
+.L692:
+	tst	r3, #24
+	itete	eq
+	ldrheq	r0, [r5, #114]
+	ldrhne	r0, [r5, #118]
+	addeq	r0, r0, #-1
+	addne	r0, r0, #-1
+	ite	eq
+	strheq	r0, [r5, #114]	@ movhi
+	strhne	r0, [r5, #118]	@ movhi
+	b	.L693
+.L695:
+	ldrh	r0, [r4, r1, lsl #2]
+	cmp	r3, #64
+	add	r5, r0, #1
+	bfi	r0, r5, #0, #11
+	strh	r0, [r4, r1, lsl #2]	@ movhi
+	bne	.L696
+	ldr	r2, [r2]
+	ldrh	r3, [r2, #122]
+	subs	r3, r3, #1
+	strh	r3, [r2, #122]	@ movhi
+	pop	{r4, r5, pc}
+.L696:
+	cmp	r3, #96
+	itttt	eq
+	ldreq	r2, [r2]
+	ldrheq	r3, [r2, #124]
+	addeq	r3, r3, #-1
+	strheq	r3, [r2, #124]	@ movhi
+.L688:
+	pop	{r4, r5, pc}
+.L698:
+	.align	2
+.L697:
+	.word	.LANCHOR57
+	.word	.LANCHOR46
+	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
+	.section	.text.ftl_get_ppa_from_index,"ax",%progbits
+	.align	1
+	.global	ftl_get_ppa_from_index
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_ppa_from_index, %function
+ftl_get_ppa_from_index:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L704
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r5, [r3]
+	ldr	r3, .L704+4
+	ldrh	r2, [r3]
+	ldr	r3, .L704+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mul	r1, r3, r2
+	cmp	r0, r1
+	itet	ge
+	smulbbge	r3, r3, r2
+	addlt	r5, r5, #16
+	addge	r5, r5, #48
+	ldrb	r6, [r5, #9]	@ zero_extendqisi2
+	itt	ge
+	subge	r4, r0, r3
+	uxthge	r4, r4
+	mov	r1, r6
+	mov	r0, r4
+	bl	__aeabi_idiv
+	smulbb	r6, r0, r6
+	movw	r2, #65535
+	subs	r4, r4, r6
+	uxth	r4, r4
+	adds	r4, r4, #8
+	ldrh	r3, [r5, r4, lsl #1]
+	cmp	r3, r2
+	bne	.L702
+	movw	r2, #837
+	ldr	r1, .L704+12
+	ldr	r0, .L704+16
+	bl	printf
+.L703:
+	b	.L703
+.L702:
+	ldr	r2, .L704+20
+	ldrh	r2, [r2]
+	mla	r0, r3, r2, r0
+	pop	{r4, r5, r6, pc}
+.L705:
+	.align	2
+.L704:
+	.word	.LANCHOR60
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR80
+	.word	.LC0
+	.word	.LANCHOR75
+	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
+	.section	.text.lpa_hash_get_ppa,"ax",%progbits
+	.align	1
+	.global	lpa_hash_get_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_hash_get_ppa, %function
+lpa_hash_get_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L710
+	uxtb	r2, r0
+	push	{r4, r5}
+	ldrh	r3, [r3, r2, lsl #1]
+	ldr	r2, .L710+4
+	ldr	r1, [r2]
+	ldr	r2, .L710+8
+	ldr	r4, [r2]
+	movw	r2, #65535
+.L707:
+	cmp	r3, r2
+	bne	.L709
+	mov	r0, #-1
+	pop	{r4, r5}
+	bx	lr
+.L709:
+	ldr	r5, [r1, r3, lsl #2]
+	cmp	r0, r5
+	bne	.L708
+	mov	r0, r3
+	pop	{r4, r5}
+	b	ftl_get_ppa_from_index
+.L708:
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L707
+.L711:
+	.align	2
+.L710:
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
+	.section	.text.ftl_get_new_free_page,"ax",%progbits
+	.align	1
+	.global	ftl_get_new_free_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_get_new_free_page, %function
+ftl_get_new_free_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0]
+	movw	r2, #65535
+	push	{r4, r5, r6, lr}
+	mov	r3, r0
+	cmp	r1, r2
+	bne	.L713
+	mov	r2, #948
+	ldr	r1, .L723
+	ldr	r0, .L723+4
+	bl	printf
+.L714:
+	b	.L714
+.L713:
+	ldr	r1, .L723+8
+	ldrh	r0, [r0, #2]
+	ldrh	r1, [r1]
+	cmp	r0, r1
+	bne	.L715
+	movw	r2, #949
+	ldr	r1, .L723
+	ldr	r0, .L723+4
+	bl	printf
+.L716:
+	b	.L716
+.L715:
+	ldrh	r1, [r3, #6]
+	cbnz	r1, .L717
+	movw	r2, #950
+	ldr	r1, .L723
+	ldr	r0, .L723+4
+	bl	printf
+.L718:
+	b	.L718
+.L717:
+	ldrb	r0, [r3, #5]	@ zero_extendqisi2
+	movs	r6, #0
+	ldr	r4, .L723+12
+	adds	r0, r0, #8
+	ldrh	r0, [r3, r0, lsl #1]
+	ldrb	r5, [r4]	@ zero_extendqisi2
+	mov	r4, r2
+.L719:
+	cmp	r0, r4
+	ldrb	r2, [r3, #5]	@ zero_extendqisi2
+	beq	.L721
+	ldr	r6, .L723+16
+	adds	r2, r2, #1
+	uxtb	r2, r2
+	ldrh	r4, [r3, #2]
+	subs	r1, r1, #1
+	ldrh	r6, [r6]
+	cmp	r5, r2
+	strh	r1, [r3, #6]	@ movhi
+	ldrh	r1, [r3, #10]
+	strb	r2, [r3, #5]
+	it	eq
+	addeq	r2, r4, #1
+	mul	r0, r0, r6
+	it	eq
+	strheq	r2, [r3, #2]	@ movhi
+	add	r1, r1, #1
+	it	eq
+	moveq	r2, #0
+	strh	r1, [r3, #10]	@ movhi
+	it	eq
+	strbeq	r2, [r3, #5]
+	orrs	r0, r0, r4
+	pop	{r4, r5, r6, pc}
+.L721:
+	adds	r2, r2, #1
+	uxtb	r2, r2
+	cmp	r2, r5
+	strb	r2, [r3, #5]
+	itttt	eq
+	ldrheq	r2, [r3, #2]
+	strbeq	r6, [r3, #5]
+	addeq	r2, r2, #1
+	strheq	r2, [r3, #2]	@ movhi
+	ldrb	r2, [r3, #5]	@ zero_extendqisi2
+	adds	r2, r2, #8
+	ldrh	r0, [r3, r2, lsl #1]
+	b	.L719
+.L724:
+	.align	2
+.L723:
+	.word	.LANCHOR84
+	.word	.LC0
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR75
+	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
+	.section	.text.ftl_ext_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_ext_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_alloc_new_blk, %function
+ftl_ext_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	bl	ftl_alloc_sys_blk
+	subs	r3, r0, #1
+	movw	r2, #65533
+	uxth	r3, r3
+	mov	r4, r0
+	cmp	r3, r2
+	bls	.L726
+	movw	r2, #981
+	ldr	r1, .L728
+	ldr	r0, .L728+4
+	bl	printf
+.L727:
+	b	.L727
+.L726:
+	ldr	r5, .L728+8
+	movs	r1, #0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r5]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sys_blk
+	ldr	r3, [r5]
+	movs	r0, #0
+	strh	r4, [r3, #130]	@ movhi
+	strh	r0, [r3, #140]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L729:
+	.align	2
+.L728:
+	.word	.LANCHOR85
+	.word	.LC0
+	.word	.LANCHOR46
+	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
+	.section	.text.ftl_total_vpn_update,"ax",%progbits
+	.align	1
+	.global	ftl_total_vpn_update
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_total_vpn_update, %function
+ftl_total_vpn_update:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L737
+	push	{r4, r5, r6, r7, lr}
+	mov	r1, r2
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L731
+	cbnz	r0, .L731
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	pop	{r4, r5, r6, r7, pc}
+.L731:
+	ldr	r2, .L737+4
+	movs	r3, #0
+	strh	r3, [r1]	@ movhi
+	movw	ip, #65535
+	mov	r1, r3
+	ldrh	r5, [r2]
+	ldr	r2, .L737+8
+	ldr	r6, [r2]
+	ldr	r2, .L737+12
+	ldr	r7, [r2]
+	mov	r2, r3
+.L733:
+	uxth	r0, r3
+	cmp	r5, r0
+	bhi	.L736
+	ldr	r3, .L737+16
+	ldr	r3, [r3]
+	str	r1, [r3, #524]
+	str	r2, [r3, #528]
+	pop	{r4, r5, r6, r7, pc}
+.L736:
+	ldrh	r0, [r6, r3, lsl #1]
+	cmp	r0, ip
+	beq	.L734
+	add	r4, r7, r3, lsl #2
+	ldrb	r4, [r4, #2]	@ zero_extendqisi2
+	and	r4, r4, #224
+	cmp	r4, #160
+	ite	eq
+	addeq	r2, r2, r0
+	addne	r1, r1, r0
+.L734:
+	adds	r3, r3, #1
+	b	.L733
+.L738:
+	.align	2
+.L737:
+	.word	.LANCHOR86
+	.word	.LANCHOR54
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR60
+	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
+	.section	.text.ftl_debug_info_fill,"ax",%progbits
+	.align	1
+	.global	ftl_debug_info_fill
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
+	.section	.text.ftl_vpn_update,"ax",%progbits
+	.align	1
+	.global	ftl_vpn_update
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vpn_update, %function
+ftl_vpn_update:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L741
+	ldr	r3, [r3]
+	ldrh	r0, [r3, r0, lsl #1]
+	clz	r0, r0
+	lsrs	r0, r0, #5
+	bx	lr
+.L742:
+	.align	2
+.L741:
+	.word	.LANCHOR56
+	.size	ftl_vpn_update, .-ftl_vpn_update
+	.section	.text.ftl_vpn_decrement,"ax",%progbits
+	.align	1
+	.global	ftl_vpn_decrement
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_vpn_decrement, %function
+ftl_vpn_decrement:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r3, #65535
+	push	{r4, lr}
+	cmp	r0, r3
+	mov	r1, r0
+	beq	.L744
+	ldr	r3, .L749
+	ldr	r3, [r3]
+	ldrh	r4, [r3, r0, lsl #1]
+	cbnz	r4, .L745
+	mov	r2, r4
+	ldr	r0, .L749+4
+	bl	printf
+.L748:
+	movs	r0, #0
+	pop	{r4, pc}
+.L745:
+	subs	r4, r4, #1
+	strh	r4, [r3, r0, lsl #1]	@ movhi
+.L744:
+	ldr	r2, .L749+8
+	ldrh	r0, [r2]
+	cmp	r1, r0
+	beq	.L748
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L747
+	strh	r1, [r2]	@ movhi
+	b	.L748
+.L747:
+	bl	ftl_vpn_update
+	adds	r0, r0, #0
+	strh	r1, [r2]	@ movhi
+	it	ne
+	movne	r0, #1
+	pop	{r4, pc}
+.L750:
+	.align	2
+.L749:
+	.word	.LANCHOR56
+	.word	.LC17
+	.word	.LANCHOR87
+	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
+	.section	.text.lpa_hash_update_ppa,"ax",%progbits
+	.align	1
+	.global	lpa_hash_update_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_hash_update_ppa, %function
+lpa_hash_update_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	uxtb	ip, r0
+	ldr	r4, .L762
+	movw	r6, #65535
+	mov	fp, r6
+	ldr	r5, .L762+4
+	ldr	lr, [r4]
+	ldr	r4, .L762+8
+	ldrh	r3, [r5, ip, lsl #1]
+	ldr	r4, [r4]
+.L752:
+	cmp	r3, fp
+	beq	.L756
+	ldr	r7, [lr, r3, lsl #2]
+	add	r8, lr, r3, lsl #2
+	cmp	r0, r7
+	bne	.L753
+	cmp	r6, fp
+	mov	r10, #-1
+	ite	eq
+	ldrheq	r6, [r4, r3, lsl #1]
+	ldrhne	r7, [r4, r3, lsl #1]
+	str	r10, [r8]
+	ite	eq
+	strheq	r6, [r5, ip, lsl #1]	@ movhi
+	strhne	r7, [r4, r6, lsl #1]	@ movhi
+	movw	r6, #65535
+	strh	r6, [r4, r3, lsl #1]	@ movhi
+.L756:
+	ldrh	r3, [r5, ip, lsl #1]
+	str	r0, [lr, r2, lsl #2]
+	strh	r2, [r5, ip, lsl #1]	@ movhi
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r3, r1, #1
+	beq	.L758
+	ldr	r3, .L762+12
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L762+16
+	lsr	r0, r1, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L758:
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L753:
+	mov	r6, r3
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L752
+.L763:
+	.align	2
+.L762:
+	.word	.LANCHOR82
+	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
+	.section	.text.ftl_write_completed,"ax",%progbits
+	.align	1
+	.global	ftl_write_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, .L772
+	ldr	r6, .L772+4
+.L765:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L771
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L771:
+	movs	r2, #48
+	add	r5, r3, r3, lsl #1
+	muls	r3, r2, r3
+	add	r5, r6, r5, lsl #4
+	adds	r4, r6, r3
+	ldrb	r3, [r6, r3]	@ zero_extendqisi2
+	strb	r3, [r7]
+	ldr	r3, [r4, #36]
+	adds	r3, r3, #1
+	bne	.L766
+	ldr	r3, .L772+8
+	mov	r8, #1
+	ldr	r10, [r4, #24]
+	ldrh	r0, [r3]
+	ldr	r3, .L772+12
+	rsb	r2, r0, #21
+	lsl	r2, r8, r2
+	lsr	r0, r10, r0
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	ands	r0, r0, r2
+	bl	__aeabi_uidiv
+	uxth	fp, r0
+	mov	r3, r10
+	ldr	r2, [r4, #20]
+	mov	r1, fp
+	ldr	r0, .L772+16
+	bl	printf
+	movs	r2, #0
+	mov	r1, r8
+	mov	r0, fp
+	bl	gc_add_sblk
+	ldr	r3, .L772+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #16]
+	cmp	r2, fp
+	bne	.L767
+	movs	r2, #0
+	strh	r2, [r3, #22]	@ movhi
+.L768:
+	mov	r0, r5
+	bl	ftl_write_buf
+	b	.L765
+.L767:
+	ldrh	r2, [r3, #48]
+	cmp	r2, fp
+	itt	eq
+	moveq	r2, #0
+	strheq	r2, [r3, #54]	@ movhi
+	b	.L768
+.L766:
+	ldrh	r2, [r4, #32]
+	ldr	r1, [r4, #28]
+	ldr	r0, [r4, #20]
+	bl	lpa_hash_update_ppa
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	lsls	r2, r3, #29
+	bpl	.L770
+	bic	r3, r3, #2
+	strb	r3, [r4, #2]
+	b	.L765
+.L770:
+	mov	r0, r5
+	bl	buf_free
+	b	.L765
+.L773:
+	.align	2
+.L772:
+	.word	.LANCHOR88
+	.word	.LANCHOR36
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC18
+	.word	.LANCHOR60
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.ftl_mask_bad_block,"ax",%progbits
+	.align	1
+	.global	ftl_mask_bad_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ubfx	r4, r0, #21, #3
+	ldr	r3, .L780
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r1, r2, #21
+	lsls	r3, r3, r1
+	lsrs	r0, r0, r2
+	ldr	r2, .L780+4
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r3, .L780+8
+	uxtb	r5, r0
+	ldr	r3, [r3]
+	lsls	r3, r3, #17
+	bpl	.L775
+	mov	r2, r5
+	mov	r1, r4
+	ldr	r0, .L780+12
+	bl	printf
+.L775:
+	ldr	r3, .L780+16
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bls	.L774
+	ldr	r3, .L780+20
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsls	r3, r3, r4
+	add	r2, r2, r5, lsl #2
+	ldrb	r4, [r2, #3]	@ zero_extendqisi2
+	orrs	r4, r4, r3
+	strb	r4, [r2, #3]
+.L774:
+	pop	{r3, r4, r5, pc}
+.L781:
+	.align	2
+.L780:
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR22
+	.word	.LC19
+	.word	.LANCHOR54
+	.word	.LANCHOR57
+	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.print_ftl_debug_info,"ax",%progbits
+	.align	1
+	.global	print_ftl_debug_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	print_ftl_debug_info, %function
+print_ftl_debug_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L783
+	push	{r4, r5, r6, lr}
+	sub	sp, sp, #32
+	ldr	r4, .L783+4
+	ldr	r5, [r3]
+	ldr	r0, [r4]
+	ldr	r6, [r5, #528]
+	ldrh	r3, [r0, #116]
+	ldrh	r2, [r0, #118]
+	ldrh	r1, [r0, #114]
+	str	r6, [sp, #16]
+	ldr	r5, [r5, #524]
+	str	r5, [sp, #12]
+	ldrh	r5, [r0, #120]
+	str	r5, [sp, #8]
+	ldrh	r5, [r0, #124]
+	str	r5, [sp, #4]
+	ldrh	r0, [r0, #122]
+	str	r0, [sp]
+	ldr	r0, .L783+8
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r3, .L783+12
+	ldr	r0, .L783+16
+	ldr	r2, [r1, #64]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	ldr	r2, [r1, #8]
+	str	r2, [sp]
+	ldr	r2, [r1, #28]
+	ldr	r1, [r1, #20]
+	bl	printf
+	ldr	r1, [r4]
+	ldr	r0, .L783+20
+	ldr	r3, [r1, #16]
+	ldr	r2, [r1, #60]
+	ldr	r1, [r1, #52]
+	lsrs	r3, r3, #11
+	bl	printf
+	ldr	r2, [r4]
+	ldrh	r0, [r2, #98]
+	ldrh	r3, [r2, #88]
+	ldrh	r1, [r2, #74]
+	str	r0, [sp, #24]
+	ldrh	r0, [r2, #94]
+	str	r0, [sp, #20]
+	ldrh	r0, [r2, #90]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #80]
+	str	r0, [sp, #12]
+	ldrh	r0, [r2, #72]
+	str	r0, [sp, #8]
+	ldrh	r0, [r2, #96]
+	str	r0, [sp, #4]
+	ldrh	r0, [r2, #92]
+	str	r0, [sp]
+	ldr	r0, .L783+24
+	ldr	r2, [r2, #84]
+	bl	printf
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, pc}
+.L784:
+	.align	2
+.L783:
+	.word	.LANCHOR60
+	.word	.LANCHOR46
+	.word	.LC20
+	.word	.LANCHOR89
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.sblk_init,"ax",%progbits
+	.align	1
+	.global	sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_init, %function
+sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L786
+	movs	r3, #255
+	movs	r0, #0
+	strb	r3, [r2]
+	ldr	r2, .L786+4
+	strb	r3, [r2]
+	ldr	r2, .L786+8
+	strb	r3, [r2]
+	ldr	r2, .L786+12
+	strb	r3, [r2]
+	bx	lr
+.L787:
+	.align	2
+.L786:
+	.word	.LANCHOR90
+	.word	.LANCHOR88
+	.word	.LANCHOR51
+	.word	.LANCHOR62
+	.size	sblk_init, .-sblk_init
+	.section	.text.dump_sblk_queue,"ax",%progbits
+	.align	1
+	.global	dump_sblk_queue
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_sblk_queue, %function
+dump_sblk_queue:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	ldr	r4, .L797
+	ldr	r0, .L797+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	bl	printf
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L788
+	ldr	r5, .L797+8
+	add	r4, r4, r4, lsl #1
+	ldr	r6, .L797+12
+	add	r4, r5, r4, lsl #4
+.L790:
+	ldr	r3, [r4, #24]
+	mov	r0, r6
+	ldrb	r2, [r4, #42]	@ zero_extendqisi2
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	bl	printf
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cmp	r4, #255
+	beq	.L788
+	add	r4, r4, r4, lsl #1
+	add	r4, r5, r4, lsl #4
+	b	.L790
+.L788:
+	pop	{r4, r5, r6, pc}
+.L798:
+	.align	2
+.L797:
+	.word	.LANCHOR90
+	.word	.LC24
+	.word	.LANCHOR36
+	.word	.LC25
+	.size	dump_sblk_queue, .-dump_sblk_queue
+	.section	.text.queue_lun_state,"ax",%progbits
+	.align	1
+	.global	queue_lun_state
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_lun_state, %function
+queue_lun_state:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L816
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	beq	.L808
+	ldr	r3, .L816+4
+	ubfx	r10, r0, #21, #3
+	ldr	lr, .L816+12
+	mov	ip, #48
+	ldrh	r7, [r3]
+	movs	r3, #1
+	mov	r8, lr
+	rsb	r2, r7, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L816+8
+	subs	r3, r3, #1
+	ldrb	r6, [r2]	@ zero_extendqisi2
+	asr	r2, r0, r7
+	uxth	r3, r3
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ands	r2, r2, r6
+	ands	r2, r2, r3
+.L807:
+	mla	r0, ip, r5, lr
+	ldr	r4, [r0, #24]
+	ubfx	fp, r4, #21, #3
+	cmp	r10, fp
+	bne	.L801
+	lsrs	r4, r4, r7
+	ldrb	r0, [r0, #42]	@ zero_extendqisi2
+	ands	r4, r4, r6
+	ands	r4, r4, r3
+	cmp	r2, r4
+	bne	.L802
+	cmp	r1, #1
+	bne	.L799
+	cmp	r0, #6
+	beq	.L801
+	cmp	r0, #8
+	beq	.L801
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L802:
+	cmp	r1, #3
+	bhi	.L801
+	tbb	[pc, r1]
+.L804:
+	.byte	(.L803-.L804)/2
+	.byte	(.L805-.L804)/2
+	.byte	(.L806-.L804)/2
+	.byte	(.L799-.L804)/2
+	.p2align 1
+.L803:
+	cmp	r0, #2
+	beq	.L801
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L805:
+	cmp	r0, #6
+	beq	.L801
+	cmp	r0, #8
+	beq	.L801
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L806:
+	cmp	r0, #10
+	bne	.L799
+.L801:
+	mul	r5, ip, r5
+	ldrb	r5, [r8, r5]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L807
+.L808:
+	movs	r0, #0
+.L799:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L817:
+	.align	2
+.L816:
+	.word	.LANCHOR90
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR36
+	.size	queue_lun_state, .-queue_lun_state
+	.section	.text.queue_remove_completed_req,"ax",%progbits
+	.align	1
+	.global	queue_remove_completed_req
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_remove_completed_req, %function
+queue_remove_completed_req:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r5, .L834
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	cmp	r0, #255
+	beq	.L818
+	movs	r1, #48
+	ldr	r2, .L834+4
+	muls	r1, r0, r1
+	adds	r3, r2, r1
+	ldrb	r4, [r3, #42]	@ zero_extendqisi2
+	subs	r4, r4, #11
+	cmp	r4, #1
+	bhi	.L818
+	ldrb	r4, [r2, r1]	@ zero_extendqisi2
+	strb	r4, [r5]
+	movs	r4, #255
+	strb	r4, [r2, r1]
+	ldrb	r1, [r3, #43]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L820
+	ldrh	r3, [r3, #34]
+	cbnz	r3, .L821
+	ldr	r3, .L834+8
+.L833:
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #255
+	bne	.L823
+	movs	r1, #48
+	mla	r2, r1, r0, r2
+	ldrb	r2, [r2, #1]	@ zero_extendqisi2
+	strb	r2, [r3]
+	pop	{r4, r5, pc}
+.L821:
+	ldr	r3, .L834+12
+	b	.L833
+.L820:
+	cbnz	r1, .L818
+	ldr	r3, [r3, #20]
+	adds	r3, r3, #1
+	beq	.L818
+	ldr	r3, .L834+16
+	b	.L833
+.L823:
+	movs	r3, #48
+.L826:
+	mov	r4, r1
+	muls	r1, r3, r1
+	ldrb	r1, [r2, r1]	@ zero_extendqisi2
+	cmp	r1, #255
+	bne	.L826
+	muls	r4, r3, r4
+	mla	r3, r3, r0, r2
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	strb	r3, [r2, r4]
+	pop	{r4, r5, pc}
+.L818:
+	pop	{r4, r5, pc}
+.L835:
+	.align	2
+.L834:
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.word	.LANCHOR88
+	.word	.LANCHOR62
+	.word	.LANCHOR51
+	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	pm_alloc_new_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r4, .L854
+	ldr	r1, .L854+4
+	ldr	r2, [r4]
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	ldrh	r3, [r2, #690]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r1, r3
+	strh	r3, [r2, #690]	@ movhi
+	bls	.L837
+	add	r3, r3, #336
+	ldrh	r2, [r2, r3, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L838
+.L837:
+	ldr	r7, .L854+8
+	ldr	r6, .L854+12
+.L852:
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r5, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r4]
+	mov	r0, r5
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	uxth	r0, r0
+	cbnz	r0, .L839
+	mov	r1, r5
+	mov	r0, r7
+	bl	printf
+	ldr	r3, [r6]
+	add	r5, r3, r5, lsl #2
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+	b	.L852
+.L839:
+	ldr	r2, [r4]
+	movs	r0, #1
+	ldr	r1, .L854+16
+	movs	r3, #0
+	strh	r3, [r2, #690]	@ movhi
+	str	r0, [r1]
+	add	r1, r2, #416
+	movw	r0, #65535
+.L841:
+	ldrh	r6, [r1], #2
+	cmp	r6, r0
+	beq	.L840
+	adds	r3, r3, #1
+	cmp	r3, #128
+	bne	.L841
+	movs	r2, #188
+	ldr	r1, .L854+20
+	ldr	r0, .L854+24
+	bl	printf
+.L843:
+	b	.L843
+.L844:
+	movs	r2, #0
+	strh	r3, [r1, #692]	@ movhi
+	strh	r2, [r1, #696]	@ movhi
+	ldr	r2, .L854+28
+	ldrh	r2, [r2]
+	rsb	r2, r2, #21
+	asr	r0, r3, r2
+	strh	r0, [r1, #694]	@ movhi
+	ldr	r1, .L854+32
+	ldr	r1, [r1]
+	lsls	r1, r1, #19
+	bpl	.L849
+	movs	r1, #1
+	uxth	r0, r0
+	lsl	r2, r1, r2
+	mov	r1, r3
+	str	r0, [sp]
+	subs	r2, r2, #1
+	ldr	r0, .L854+36
+	bl	printf
+.L849:
+	movs	r0, #0
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L840:
+	adds	r3, r3, #208
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	ldrh	r3, [r2, #688]
+	adds	r3, r3, #1
+	strh	r3, [r2, #688]	@ movhi
+.L838:
+	ldr	r1, [r4]
+	movw	r0, #65533
+	ldrh	r3, [r1, #690]
+	add	r3, r3, #336
+	ldrh	r3, [r1, r3, lsl #1]
+	subs	r2, r3, #1
+	uxth	r2, r2
+	cmp	r2, r0
+	bls	.L844
+	movs	r2, #193
+	ldr	r1, .L854+20
+	ldr	r0, .L854+24
+	bl	printf
+.L845:
+	b	.L845
+.L855:
+	.align	2
+.L854:
+	.word	.LANCHOR46
+	.word	.LANCHOR69
+	.word	.LC26
+	.word	.LANCHOR57
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR22
+	.word	.LC27
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_select_ram_region,"ax",%progbits
+	.align	1
+	.global	pm_select_ram_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_select_ram_region, %function
+pm_select_ram_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L867
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	movw	r4, #65535
+	mov	r1, r2
+.L858:
+	ldrh	r5, [r2, r3, lsl #3]
+	uxth	r0, r3
+	cmp	r5, r4
+	beq	.L857
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L858
+	movs	r2, #0
+	mov	r4, #32768
+	mov	r0, r3
+.L860:
+	add	r3, r1, r2, lsl #3
+	uxth	r5, r2
+	ldrh	r3, [r3, #2]
+	lsls	r6, r3, #16
+	bmi	.L859
+	cmp	r3, r4
+	itt	cc
+	movcc	r4, r3
+	movcc	r0, r5
+.L859:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L860
+	cmp	r0, #32
+	bne	.L857
+	ldr	r3, .L867+4
+	mov	r2, #-1
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	movs	r3, #0
+.L862:
+	add	r4, r1, r3, lsl #3
+	uxth	r6, r3
+	ldrh	r4, [r4, #2]
+	cmp	r4, r2
+	bcs	.L861
+	ldrh	r7, [r1, r3, lsl #3]
+	cmp	r7, r5
+	itt	ne
+	movne	r2, r4
+	movne	r0, r6
+.L861:
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L862
+	cmp	r0, #32
+	bne	.L857
+	movw	r2, #289
+	ldr	r1, .L867+8
+	ldr	r0, .L867+12
+	bl	printf
+.L863:
+	b	.L863
+.L857:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L868:
+	.align	2
+.L867:
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.word	.LC0
+	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.flash_lsb_page_tbl_build,"ax",%progbits
+	.align	1
+	.global	flash_lsb_page_tbl_build
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_lsb_page_tbl_build, %function
+flash_lsb_page_tbl_build:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L905
+	cbnz	r0, .L871
+.L872:
+	strh	r0, [r4, r0, lsl #1]	@ movhi
+	adds	r0, r0, #1
+	cmp	r0, #256
+	bne	.L872
+.L878:
+	movs	r1, #255
+	mov	r2, #1024
+	ldr	r0, .L905+4
+	bl	ftl_memset
+	ldr	r1, .L905+4
+	movs	r3, #0
+.L873:
+	ldrh	r2, [r4, r3, lsl #1]
+	adds	r3, r3, #1
+	cmp	r3, #256
+	strh	r2, [r1, r2, lsl #1]	@ movhi
+	bne	.L873
+	pop	{r4, pc}
+.L871:
+	cmp	r0, #1
+	bne	.L874
+	movs	r3, #0
+.L877:
+	cmp	r3, #3
+	uxth	r2, r3
+	bls	.L875
+	tst	r2, #1
+	ite	ne
+	movne	r1, #3
+	moveq	r1, #2
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L875:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L877
+	b	.L878
+.L874:
+	cmp	r0, #2
+	bne	.L879
+	movs	r2, #0
+.L881:
+	uxth	r3, r2
+	cmp	r2, #1
+	ittt	hi
+	lslhi	r3, r3, #1
+	addhi	r3, r3, #-1
+	uxthhi	r3, r3
+	strh	r3, [r4, r2, lsl #1]	@ movhi
+	adds	r2, r2, #1
+	cmp	r2, #256
+	bne	.L881
+	b	.L878
+.L879:
+	cmp	r0, #3
+	bne	.L882
+	movs	r3, #0
+.L885:
+	cmp	r3, #5
+	uxth	r2, r3
+	bls	.L883
+	tst	r2, #1
+	ite	ne
+	movne	r1, #5
+	moveq	r1, #4
+	rsb	r2, r1, r2, lsl #1
+	uxth	r2, r2
+.L883:
+	strh	r2, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L885
+	b	.L878
+.L882:
+	cmp	r0, #4
+	mov	r3, #0
+	bne	.L886
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #2
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #3
+	strh	r3, [r4, #6]	@ movhi
+	movs	r3, #5
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #7
+	strh	r3, [r4, #12]	@ movhi
+	mov	r2, r4
+	movs	r3, #8
+	strh	r0, [r4, #8]	@ movhi
+	strh	r3, [r2, #14]!	@ movhi
+.L888:
+	tst	r3, #1
+	ite	ne
+	movne	r1, #7
+	moveq	r1, #6
+	rsb	r1, r1, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r1, [r2, #2]!	@ movhi
+	cmp	r3, #256
+	bne	.L888
+	b	.L878
+.L886:
+	cmp	r0, #5
+	bne	.L889
+.L890:
+	strh	r3, [r4, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #16
+	bne	.L890
+	ldr	r2, .L905+8
+.L891:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L891
+	b	.L878
+.L889:
+	cmp	r0, #8
+	bne	.L878
+.L892:
+	strh	r3, [r4, r3]	@ movhi
+	adds	r3, r3, #2
+	cmp	r3, #512
+	bne	.L892
+	b	.L878
+.L906:
+	.align	2
+.L905:
+	.word	.LANCHOR14
+	.word	.LANCHOR96
+	.word	.LANCHOR14+30
+	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
+	.section	.text.flash_die_info_init,"ax",%progbits
+	.align	1
+	.global	flash_die_info_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_die_info_init, %function
+flash_die_info_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r4, .L920
+	ldr	r6, .L920+4
+	ldrh	r3, [r4, #26]
+	add	r10, r4, #1
+	ldr	r7, .L920+8
+	ldrb	r1, [r4, #12]	@ zero_extendqisi2
+	ldrh	r0, [r4, #10]
+	strh	r3, [r7]	@ movhi
+	strb	r5, [r6]
+	bl	__aeabi_idiv
+	ldr	r3, .L920+12
+	movs	r2, #8
+	mov	r1, r5
+	ldr	r8, .L920+32
+	ldr	fp, .L920+20
+	strh	r0, [r3]	@ movhi
+	ldr	r0, .L920+16
+	bl	ftl_memset
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L920+20
+	bl	ftl_memset
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L920+16
+.L909:
+	ldr	r2, [sp]
+	add	r1, r8, r5, lsl #3
+	mov	r0, r10
+	str	r3, [sp, #4]
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L908
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	adds	r1, r2, #1
+	str	r0, [fp, r2, lsl #2]
+	strb	r1, [r6]
+	strb	r5, [r3, r2]
+.L908:
+	adds	r5, r5, #1
+	cmp	r5, #4
+	bne	.L909
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	beq	.L910
+.L914:
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldrh	r2, [r4, #14]
+	smulbb	r3, r3, r2
+	ldr	r2, .L920+24
+	strh	r3, [r2]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L910:
+	ldrh	r5, [r7]
+	movs	r7, #0
+	ldrb	r3, [r4, #13]	@ zero_extendqisi2
+	ldrb	r8, [r4, #23]	@ zero_extendqisi2
+	ldr	fp, .L920+16
+	muls	r3, r5, r3
+	ldrh	r5, [r4, #14]
+	and	r5, r5, #65280
+	muls	r5, r3, r5
+	ldr	r3, .L920+28
+	lsl	r10, r5, #1
+.L913:
+	ldr	r1, .L920+32
+	mov	r0, r3
+	ldr	r2, [sp]
+	str	r3, [sp, #4]
+	add	r1, r1, r7, lsl #3
+	bl	flash_mem_cmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L911
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r8, #0
+	ite	eq
+	moveq	r1, r5
+	movne	r1, r10
+	ldr	r0, .L920+20
+	strb	r7, [fp, r2]
+	str	r1, [r0, r2, lsl #2]
+	adds	r1, r2, #1
+	strb	r1, [r6]
+.L911:
+	adds	r7, r7, #1
+	cmp	r7, #4
+	bne	.L913
+	b	.L914
+.L921:
+	.align	2
+.L920:
+	.word	.LANCHOR19
+	.word	.LANCHOR8
+	.word	.LANCHOR13
+	.word	.LANCHOR97
+	.word	.LANCHOR10
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR19+1
+	.word	.LANCHOR26
+	.size	flash_die_info_init, .-flash_die_info_init
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.align	1
+	.global	FlashReadFacBbtData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	lsrs	r2, r2, #3
+	movs	r1, #0
+	bl	ftl_memset
+	movs	r0, #0
+	pop	{r3, pc}
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.lpa_hash_init,"ax",%progbits
+	.align	1
+	.global	lpa_hash_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_hash_init, %function
+lpa_hash_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r2, #512
+	movs	r1, #255
+	ldr	r0, .L924
+	bl	ftl_memset
+	ldr	r3, .L924+4
+	movs	r1, #255
+	ldr	r2, .L924+8
+	ldrh	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L924+12
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	pop	{r3, lr}
+	b	ftl_memset
+.L925:
+	.align	2
+.L924:
+	.word	.LANCHOR81
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR83
+	.size	lpa_hash_init, .-lpa_hash_init
+	.section	.text.lpa_rebuild_hash,"ax",%progbits
+	.align	1
+	.global	lpa_rebuild_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	lpa_rebuild_hash, %function
+lpa_rebuild_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L937
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L927
+	movs	r3, #0
+	movs	r2, #190
+	ldr	r1, .L937+4
+	ldr	r0, .L937+8
+	bl	printf
+.L927:
+	ldr	r6, .L937+12
+	mov	r2, #512
+	ldr	r4, .L937+16
+	movs	r1, #255
+	ldr	r0, .L937+20
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r5, .L937+24
+	muls	r2, r3, r2
+	ldr	r0, [r5]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, .L937+28
+	movs	r2, #0
+	ldrb	r6, [r6]	@ zero_extendqisi2
+	ldr	ip, [r5]
+	ldr	r7, [r3]
+	ldr	r0, .L937+20
+.L928:
+	ldrh	r3, [r4]
+	uxth	r5, r2
+	mov	r1, r5
+	muls	r3, r6, r3
+	cmp	r5, r3, lsl #1
+	blt	.L930
+	pop	{r3, r4, r5, r6, r7, pc}
+.L930:
+	ldr	r3, [r7, r1, lsl #2]
+	adds	r2, r2, #1
+	cmp	r3, #-1
+	itttt	ne
+	uxtbne	r3, r3
+	ldrhne	lr, [r0, r3, lsl #1]
+	strhne	r5, [r0, r3, lsl #1]	@ movhi
+	strhne	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L928
+.L938:
+	.align	2
+.L937:
+	.word	.LANCHOR22
+	.word	.LANCHOR100
+	.word	.LC28
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR82
+	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
+	.section	.text.ftl_open_sblk_init,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r8, .L945+12
+	mov	r6, r1
+	movs	r7, #0
+.L940:
+.L943:
+	mov	r0, r6
+	ldr	r10, .L945+16
+	bl	ftl_alloc_sblk
+	movs	r1, #0
+	mov	r5, r0
+	bl	ftl_erase_sblk
+	add	r1, r4, #16
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r1, .L945
+	cmp	r6, #2
+	ldrh	r2, [r8]
+	uxtb	r0, r0
+	strh	r5, [r4]	@ movhi
+	ite	eq
+	moveq	r3, #0
+	ldrbne	r3, [r1]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	strb	r0, [r4, #9]
+	smulbb	r0, r0, r2
+	strh	r7, [r4, #2]	@ movhi
+	it	ne
+	smulbbne	r3, r3, r2
+	strb	r7, [r4, #5]
+	mul	r2, r2, r1
+	ldr	r1, .L945+4
+	strh	r0, [r4, #6]	@ movhi
+	it	ne
+	uxthne	r3, r3
+	strh	r7, [r4, #10]	@ movhi
+	ldr	r0, [r1]
+	movs	r1, #255
+	strh	r3, [r4, #12]	@ movhi
+	lsls	r2, r2, #2
+	strb	r6, [r4, #4]
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r2, [r4, #6]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cbnz	r3, .L939
+	mov	r1, r5
+	ldr	r0, .L945+8
+	bl	printf
+	ldr	r3, [r10]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	movs	r3, #7
+	strb	r3, [r4, #4]
+	b	.L943
+.L939:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L946:
+	.align	2
+.L945:
+	.word	.LANCHOR69
+	.word	.LANCHOR82
+	.word	.LC26
+	.word	.LANCHOR79
+	.word	.LANCHOR56
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",%progbits
+	.align	1
+	.global	pm_free_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	@ args = 0, pretend = 0, frame = 280
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L962
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #280
+	ldrh	r2, [r3]
+	str	r3, [sp, #4]
+	cmp	r2, #128
+	bls	.L948
+	movs	r2, #74
+	ldr	r1, .L962+4
+	ldr	r0, .L962+8
+	bl	printf
+.L949:
+	b	.L949
+.L948:
+	mov	r2, #256
+	movs	r1, #0
+	add	r0, sp, #24
+	movs	r4, #1
+	bl	ftl_memset
+	ldr	r3, .L962+12
+	add	r10, sp, #24
+	ldr	r0, .L962+16
+	ldr	r1, .L962+20
+	ldrh	r7, [r3]
+	ldr	r6, [r0]
+	ldr	r5, [sp, #4]
+	rsb	r3, r7, #21
+	str	r0, [sp, #8]
+	lsls	r4, r4, r3
+	ldrh	r2, [r6, #698]
+	ldrb	r3, [r1]	@ zero_extendqisi2
+	add	r8, r6, #704
+	ldrh	fp, [r5]
+	subs	r4, r4, #1
+	movs	r5, #0
+	str	r1, [sp, #12]
+.L950:
+	uxth	r1, r5
+	cmp	r2, r1
+	bhi	.L954
+	ldr	r6, .L962+24
+	movs	r5, #0
+	ldr	r7, .L962+28
+	mov	r10, r5
+	ldrb	r4, [r6]	@ zero_extendqisi2
+	ldrh	r3, [r7]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+.L955:
+	ldr	r3, [sp, #4]
+	uxth	r2, r5
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bhi	.L960
+	mov	r0, r10
+	add	sp, sp, #280
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L954:
+	ldr	r0, [r8], #4
+	mov	r1, r3
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	lsrs	r0, r0, r7
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	uxth	r0, r0
+	ldr	r2, [sp, #20]
+	add	lr, r6, #416
+	movs	r1, #0
+.L951:
+	uxth	ip, r1
+	cmp	fp, ip
+	bhi	.L953
+	adds	r5, r5, #1
+	b	.L950
+.L953:
+	ldrh	ip, [lr], #2
+	cmp	r0, ip
+	ittt	eq
+	ldrheq	ip, [r10, r1, lsl #1]
+	addeq	ip, ip, #1
+	strheq	ip, [r10, r1, lsl #1]	@ movhi
+	adds	r1, r1, #1
+	b	.L951
+.L960:
+	ldr	r3, [sp, #8]
+	str	r2, [sp, #20]
+	ldr	r0, [r3]
+	uxth	r3, r5
+	add	fp, r3, #208
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #12]
+	ldrh	r8, [r0, fp, lsl #1]
+	ldrh	r0, [r0, #692]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	cmp	r0, r8
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	bne	.L956
+	ldrh	r0, [r7]
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	smulbb	r1, r1, r0
+	add	r0, sp, #24
+	strh	r1, [r0, r3, lsl #1]	@ movhi
+.L956:
+	add	r1, sp, #24
+	ldrh	r3, [r1, r3, lsl #1]
+	cmp	r4, r3
+	bls	.L957
+	cbnz	r3, .L961
+.L959:
+	movw	r3, #65535
+	cmp	r8, r3
+	str	r3, [sp, #16]
+	beq	.L958
+	mov	r0, r8
+	bl	ftl_free_sblk
+	ldr	r3, [sp, #8]
+	ldr	r2, [r3]
+	ldr	r3, [sp, #16]
+	strh	r3, [r2, fp, lsl #1]	@ movhi
+	ldrh	r3, [r2, #688]
+	subs	r3, r3, #1
+	strh	r3, [r2, #688]	@ movhi
+	b	.L958
+.L957:
+	cmp	r3, #0
+	beq	.L959
+.L958:
+	adds	r5, r5, #1
+	b	.L955
+.L961:
+	mov	r10, r2
+	mov	r4, r3
+	b	.L958
+.L963:
+	.align	2
+.L962:
+	.word	.LANCHOR101
+	.word	.LANCHOR102
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR46
+	.word	.LANCHOR70
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_into_data_init,"ax",%progbits
+	.align	1
+	.global	flash_into_data_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_into_data_init, %function
+flash_into_data_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r2, #2048
+	ldr	r4, .L966
+	movs	r1, #0
+	ldr	r0, [r4]
+	bl	ftl_memset
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r3, .L966+4
+	ldr	r1, .L966+8
+	adds	r0, r0, #80
+	str	r3, [r0, #-80]
+	mov	r3, #2032
+	str	r3, [r0, #-72]
+	movs	r3, #1
+	strh	r3, [r0, #-64]	@ movhi
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L966+12
+	pop	{r4, lr}
+	adds	r0, r0, #48
+	b	ftl_memcpy
+.L967:
+	.align	2
+.L966:
+	.word	.LANCHOR5
+	.word	1398362953
+	.word	.LANCHOR103
+	.word	.LANCHOR19
+	.size	flash_into_data_init, .-flash_into_data_init
+	.section	.text.ftl_memcpy32,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy32
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	push	{r4, lr}
+.L969:
+	cmp	r3, r2
+	bne	.L970
+	pop	{r4, pc}
+.L970:
+	ldr	r4, [r1, r3, lsl #2]
+	str	r4, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	b	.L969
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L973
+	bx	lr
+.L974:
+	.align	2
+.L973:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",%progbits
+	.align	1
+	.global	nandc_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_init, %function
+nandc_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	push	{r0, r1, r2, lr}
+	str	r3, [sp, #4]
+	movs	r2, #6
+	ldr	r3, .L981
+	ldr	r1, [r0, #352]
+	strb	r2, [r3]
+	ldr	r2, .L981+4
+	str	r0, [r2]
+	ldr	r2, .L981+8
+	cmp	r1, r2
+	ldr	r1, [r0, #128]
+	itt	eq
+	moveq	r2, #8
+	strbeq	r2, [r3]
+	ldr	r2, .L981+12
+	cmp	r1, r2
+	itt	eq
+	moveq	r2, #9
+	strbeq	r2, [r3]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r2, .L981+16
+	cmp	r3, #9
+	ldr	r3, .L981+20
+	bne	.L979
+	movs	r1, #1
+	strb	r1, [r3]
+	ldr	r3, [sp, #4]
+	orr	r3, r3, #256
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	str	r3, [r0]
+	movs	r3, #0
+	str	r3, [r0, #520]
+	movw	r3, #4225
+	str	r3, [r0, #4]
+	movw	r3, #8321
+	str	r3, [r0, #8]
+	movs	r3, #38
+	str	r2, [r0, #80]
+	str	r3, [r0, #84]
+	movs	r3, #39
+	str	r3, [r0, #84]
+.L980:
+	ldr	r3, .L981+24
+	movs	r2, #1
+	strb	r2, [r3]
+	movs	r3, #0
+	ldr	r2, .L981+28
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L981+32
+	strb	r3, [r2]
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+.L979:
+	movs	r1, #0
+	strb	r1, [r3]
+	ldr	r3, [sp, #4]
+	orr	r3, r3, #256
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	str	r3, [r0]
+	movw	r3, #4225
+	str	r1, [r0, #336]
+	str	r3, [r0, #4]
+	movw	r3, #8321
+	str	r3, [r0, #344]
+	movs	r3, #38
+	str	r2, [r0, #304]
+	str	r3, [r0, #308]
+	movs	r3, #39
+	str	r3, [r0, #308]
+	mov	r0, #2048
+	bl	ftl_malloc
+	ldr	r3, .L981+36
+	str	r0, [r3]
+	b	.L980
+.L982:
+	.align	2
+.L981:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	1446522928
+	.word	1446588464
+	.word	1052675
+	.word	.LANCHOR28
+	.word	.LANCHOR29
+	.word	.LANCHOR31
+	.word	.LANCHOR27
+	.word	.LANCHOR30
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",%progbits
+	.align	1
+	.global	buf_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	buf_init, %function
+buf_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r4, .L986
+	mov	r6, r5
+	ldr	r7, .L986+4
+	mov	r8, r4
+.L984:
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	uxtb	r3, r5
+	strb	r6, [r4, #2]
+	adds	r5, r5, #1
+	adds	r2, r3, #1
+	strb	r3, [r4, #1]
+	strb	r2, [r4]
+	adds	r4, r4, #48
+	str	r6, [r4, #-40]
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r4, #-44]
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	cmp	r5, #32
+	str	r0, [r4, #-36]
+	bne	.L984
+	movs	r3, #255
+	strb	r3, [r8, #1488]
+	ldr	r3, .L986+8
+	strb	r6, [r3]
+	ldr	r3, .L986+12
+	strb	r5, [r3]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L987:
+	.align	2
+.L986:
+	.word	.LANCHOR36
+	.word	.LANCHOR45
+	.word	.LANCHOR37
+	.word	.LANCHOR38
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",%progbits
+	.align	1
+	.global	gc_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_init, %function
+gc_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r5, #0
+	ldr	r3, .L989
+	mov	r1, r5
+	mov	r2, #320
+	ldr	r4, .L989+4
+	strb	r5, [r3]
+	ldr	r3, .L989+8
+	mov	r0, r4
+	strb	r5, [r3]
+	bl	ftl_memset
+	movw	r3, #65535
+	str	r5, [r4, #8]
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L989+12
+	ldr	r5, .L989+16
+	ldrh	r3, [r3]
+	lsrs	r2, r3, #2
+	lsrs	r1, r3, #1
+	strh	r2, [r4, #32]	@ movhi
+	strh	r1, [r4, #34]	@ movhi
+	ldr	r4, .L989+20
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	smulbb	r3, r0, r3
+	subs	r3, r3, #32
+	strh	r3, [r5]	@ movhi
+	ldr	r3, .L989+24
+	ldr	r5, .L989+28
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L989+32
+	strh	r2, [r3]	@ movhi
+	ldrh	r3, [r5]
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+36
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+40
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L989+44
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+48
+	str	r0, [r3]
+	ldrh	r3, [r5]
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L989+52
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L990:
+	.align	2
+.L989:
+	.word	.LANCHOR67
+	.word	.LANCHOR59
+	.word	.LANCHOR104
+	.word	.LANCHOR79
+	.word	.LANCHOR105
+	.word	.LANCHOR69
+	.word	.LANCHOR106
+	.word	.LANCHOR68
+	.word	.LANCHOR58
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR65
+	.word	.LANCHOR61
+	.word	.LANCHOR109
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",%progbits
+	.align	1
+	.global	js_hash
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	js_hash, %function
+js_hash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L995
+	add	r1, r1, r0
+	push	{r4, lr}
+.L993:
+	cmp	r0, r1
+	bne	.L994
+	mov	r0, r3
+	pop	{r4, pc}
+.L994:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L993
+.L996:
+	.align	2
+.L995:
+	.word	1204201446
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",%progbits
+	.align	1
+	.global	timer_get_time
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	timer_get_time, %function
+timer_get_time:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1001
+	ldr	r0, [r3]
+	bx	lr
+.L1002:
+	.align	2
+.L1001:
+	.word	.LANCHOR52
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L1012
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r4, r5
+.L1004:
+	cmp	r4, r10
+	bne	.L1010
+	ldr	r1, .L1012+4
+	ldr	r0, .L1012+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1010:
+	cbnz	r5, .L1005
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1012+12
+	bl	printf
+.L1005:
+	cmp	r8, #4
+	bne	.L1006
+	ldr	r1, [r6, r4, lsl #2]
+.L1011:
+	mov	r0, r7
+	adds	r5, r5, #1
+	bl	printf
+	cmp	r5, #15
+	bls	.L1009
+	movs	r5, #0
+	ldr	r1, .L1012+4
+	ldr	r0, .L1012+8
+	bl	printf
+.L1009:
+	adds	r4, r4, #1
+	b	.L1004
+.L1006:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1011
+.L1013:
+	.align	2
+.L1012:
+	.word	.LC30
+	.word	.LC31
+	.word	.LC32
+	.word	.LC29
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",%progbits
+	.align	1
+	.global	hynix_get_read_retry_default
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1107
+	cmp	r0, #2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	mov	r1, #173
+	mov	r2, #174
+	mov	r6, r0
+	ldr	r4, [r3]
+	add	r3, r4, #128
+	strb	r0, [r4, #112]
+	str	r3, [sp, #8]
+	mov	r3, #172
+	strb	r3, [r4, #128]
+	mov	r3, #175
+	strb	r1, [r4, #129]
+	strb	r2, [r4, #130]
+	strb	r3, [r4, #131]
+	bne	.L1015
+	movs	r3, #167
+	movs	r2, #247
+	strb	r3, [r4, #128]
+	ldr	r3, .L1107+4
+	strb	r2, [r3, #17]
+.L1069:
+	mov	r10, #7
+	b	.L1101
+.L1015:
+	cmp	r0, #3
+	bne	.L1017
+	add	r2, r4, #127
+	movs	r3, #176
+.L1018:
+	strb	r3, [r2, #1]!
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1018
+.L1102:
+	mov	r10, #8
+	mov	fp, r10
+.L1016:
+	subs	r3, r6, #1
+	cmp	r3, #1
+	bhi	.L1023
+	movs	r6, #0
+.L1024:
+	ldr	r3, .L1107+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r6
+	cmp	r2, r3
+	bhi	.L1029
+.L1030:
+	strb	fp, [r4, #113]
+	strb	r10, [r4, #114]
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1017:
+	cmp	r0, #4
+	bne	.L1019
+	movs	r0, #204
+	strb	r1, [r4, #133]
+	strb	r0, [r4, #128]
+	movs	r0, #191
+	strb	r0, [r4, #129]
+	movs	r0, #170
+	strb	r0, [r4, #130]
+	movs	r0, #171
+	strb	r0, [r4, #131]
+	movs	r0, #205
+	strb	r0, [r4, #132]
+	strb	r2, [r4, #134]
+	strb	r3, [r4, #135]
+	b	.L1102
+.L1019:
+	cmp	r0, #5
+	bne	.L1020
+	movs	r3, #56
+	mov	r10, #8
+	strb	r3, [r4, #128]
+	movs	r3, #57
+	strb	r3, [r4, #129]
+	movs	r3, #58
+	strb	r3, [r4, #130]
+	movs	r3, #59
+	strb	r3, [r4, #131]
+.L1101:
+	mov	fp, #4
+	b	.L1016
+.L1020:
+	cmp	r0, #6
+	bne	.L1021
+	movs	r3, #14
+	mov	r10, #12
+	strb	r3, [r4, #128]
+	movs	r3, #15
+	strb	r3, [r4, #129]
+	movs	r3, #16
+	strb	r3, [r4, #130]
+	movs	r3, #17
+	strb	r3, [r4, #131]
+	b	.L1101
+.L1021:
+	cmp	r0, #7
+	bne	.L1069
+	add	r2, r4, #127
+	movs	r3, #176
+.L1022:
+	strb	r3, [r2, #1]!
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #184
+	bne	.L1022
+	movs	r3, #212
+	mov	r10, #12
+	strb	r3, [r4, #136]
+	movs	r3, #213
+	strb	r3, [r4, #137]
+	mov	fp, #10
+	b	.L1016
+.L1029:
+	ldr	r2, .L1107+12
+	movs	r1, #160
+	add	r8, fp, #-1
+	add	r7, r4, #127
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	mla	r1, r1, r3, r4
+	add	r2, r1, #144
+	ldr	r1, [sp, #8]
+	str	r2, [sp, #4]
+	ldr	r2, .L1107+16
+	uxtab	r8, r1, r8
+	ldr	r5, [r2]
+	ldr	r2, [sp, #4]
+	add	r5, r5, r3, lsl #8
+	subs	r2, r2, #1
+	addw	r3, r5, #2056
+.L1025:
+	str	r2, [sp, #16]
+	movs	r2, #55
+	str	r2, [r3]
+	ldrb	r0, [r7, #1]!	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	str	r0, [r5, #2052]
+	movs	r0, #80
+	bl	timer_delay_ns
+	ldr	r0, [r5, #2048]
+	cmp	r8, r7
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #12]
+	strb	r0, [r2, #1]!
+	bne	.L1025
+	ldr	r0, [sp, #4]
+	movs	r2, #0
+	ldr	ip, .L1107+4
+.L1026:
+	movs	r3, #1
+	add	r7, ip, r2
+.L1027:
+	ldrb	r5, [r7, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	lr, [r0]	@ zero_extendqisi2
+	add	r5, r5, lr
+	strb	r5, [r0, r3, lsl #3]
+	adds	r3, r3, #1
+	cmp	r3, #7
+	bne	.L1027
+	adds	r2, r2, #1
+	adds	r0, r0, #1
+	cmp	r2, #4
+	bne	.L1026
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	adds	r6, r6, #1
+	strb	r3, [r2, #16]
+	strb	r3, [r2, #24]
+	strb	r3, [r2, #32]
+	strb	r3, [r2, #40]
+	strb	r3, [r2, #48]
+	strb	r3, [r2, #41]
+	strb	r3, [r2, #49]
+	b	.L1024
+.L1023:
+	subs	r3, r6, #3
+	cmp	r3, #4
+	bhi	.L1030
+	smulbb	r3, r10, fp
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #48]
+	lsls	r3, r2, #3
+	str	r2, [sp, #8]
+	str	r3, [sp, #52]
+	lsls	r3, r2, #2
+	str	r3, [sp, #36]
+	movs	r3, #0
+.L1106:
+	str	r3, [sp, #24]
+	ldr	r3, .L1107+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldrb	r3, [sp, #24]	@ zero_extendqisi2
+	cmp	r2, r3
+	bls	.L1030
+	ldr	r2, .L1107+12
+	movs	r1, #160
+	movs	r7, #255
+	ldrb	r3, [r2, r3]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	mla	r1, r1, r3, r4
+	ldr	r2, [sp, #4]
+	add	r3, r1, #144
+	str	r3, [sp, #44]
+	ldr	r3, .L1107+16
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	add	r5, r3, r2, lsl #8
+	str	r7, [r5, #2056]
+	bl	nandc_wait_flash_ready
+	cmp	r6, #4
+	mov	r3, #54
+	str	r3, [r5, #2056]
+	bne	.L1032
+	movs	r3, #64
+	str	r7, [r5, #2052]
+	str	r3, [r5, #2048]
+	movs	r3, #204
+.L1103:
+	str	r3, [r5, #2052]
+	movs	r3, #77
+	b	.L1104
+.L1032:
+	subs	r3, r6, #5
+	cmp	r3, #1
+	bhi	.L1034
+	ldrb	r3, [r4, #128]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #82
+.L1104:
+	str	r3, [r5, #2048]
+	cmp	r6, #6
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #4]
+	add	r5, r3, r2, lsl #8
+	mov	r3, #22
+	ldr	r2, [sp, #4]
+	str	r3, [r5, #2056]
+	mov	r3, #23
+	str	r3, [r5, #2056]
+	mov	r3, #4
+	str	r3, [r5, #2056]
+	mov	r3, #25
+	str	r3, [r5, #2056]
+	mov	r3, #0
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r5, #2052]
+	movs	r3, #2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	ldr	r3, [sp, #12]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
+	bl	nandc_wait_flash_ready
+	subs	r3, r6, #5
+	cmp	r3, #1
+	str	r3, [sp, #28]
+	bls	.L1070
+	cmp	r6, #7
+	ite	ne
+	movne	r2, #2
+	moveq	r2, #32
+.L1037:
+	ldr	r3, .L1107+20
+	subs	r2, r2, #1
+	ldr	r3, [r3]
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1038:
+	ldr	r7, [r5, #2048]
+	strb	r7, [r0, #1]!
+	cmp	r0, r2
+	bne	.L1038
+	cmp	r6, #7
+	bne	.L1039
+	movs	r2, #0
+.L1041:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1040
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1040
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1041
+.L1042:
+	movs	r1, #0
+	ldr	r0, .L1107+24
+	bl	printf
+.L1044:
+	b	.L1044
+.L1034:
+	movs	r3, #174
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	movs	r3, #176
+	b	.L1103
+.L1070:
+	movs	r2, #16
+	b	.L1037
+.L1108:
+	.align	2
+.L1107:
+	.word	.LANCHOR5
+	.word	.LANCHOR110
+	.word	.LANCHOR8
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR111
+	.word	.LC33
+.L1040:
+	cmp	r1, #6
+	bhi	.L1042
+.L1043:
+	ldr	r3, .L1109
+	ldr	r8, [r3]
+	mov	r3, r8
+.L1048:
+	ldr	r1, [sp, #48]
+	sub	r2, r3, r8
+	cmp	r1, r2
+	bgt	.L1049
+	ldr	r3, .L1109
+	ldr	r1, [r3]
+	ldr	r3, [sp, #36]
+	adds	r0, r1, r3
+	movs	r3, #8
+.L1051:
+	mov	ip, r0
+	movs	r7, #0
+.L1050:
+	ldr	r2, [ip]
+	adds	r7, r7, #1
+	mvns	r2, r2
+	str	r2, [ip], #4
+	ldr	r2, [sp, #8]
+	cmp	r2, r7
+	bgt	.L1050
+	ldr	r2, [sp, #52]
+	subs	r3, r3, #1
+	add	r0, r0, r2
+	bne	.L1051
+	mov	ip, r1
+	str	r3, [sp, #20]
+.L1052:
+	movs	r0, #0
+	mov	r2, r0
+.L1056:
+	movs	r3, #1
+	mov	lr, #0
+	lsl	r7, r3, r2
+	movs	r3, #16
+	str	ip, [sp, #16]
+	str	r7, [sp, #32]
+	str	r3, [sp, #40]
+.L1054:
+	ldr	r3, [sp, #32]
+	mov	r7, r3
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3]
+	bics	r3, r7, r3
+	ldr	r3, [sp, #36]
+	ldr	r7, [sp, #16]
+	it	eq
+	addeq	lr, lr, #1
+	add	r7, r7, r3
+	ldr	r3, [sp, #40]
+	str	r7, [sp, #16]
+	subs	r3, r3, #1
+	str	r3, [sp, #40]
+	bne	.L1054
+	cmp	lr, #8
+	add	r2, r2, #1
+	itt	hi
+	ldrhi	r3, [sp, #32]
+	orrhi	r0, r0, r3
+	cmp	r2, #32
+	bne	.L1056
+	ldr	r3, [sp, #20]
+	str	r0, [ip], #4
+	adds	r3, r3, #1
+	str	r3, [sp, #20]
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #8]
+	cmp	r3, r2
+	bgt	.L1052
+	subs	r2, r1, #4
+	add	r0, r1, #28
+	movs	r3, #0
+.L1059:
+	ldr	r7, [r2, #4]!
+	cbnz	r7, .L1058
+	adds	r3, r3, #1
+.L1058:
+	cmp	r0, r2
+	bne	.L1059
+	cmp	r3, #7
+	ble	.L1060
+	ldr	r0, .L1109+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1109+8
+	bl	printf
+.L1061:
+	b	.L1061
+.L1039:
+	cmp	r6, #6
+	bne	.L1043
+	adds	r3, r3, #7
+.L1045:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1043
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1043
+	cmp	r1, r3
+	bne	.L1045
+	movs	r1, #0
+	ldr	r0, .L1109+8
+	bl	printf
+.L1047:
+	b	.L1047
+.L1049:
+	ldr	r2, [r5, #2048]
+	strb	r2, [r3], #1
+	b	.L1048
+.L1060:
+	cmp	r6, #6
+	beq	.L1072
+	cmp	r6, #7
+	ite	ne
+	movne	lr, #8
+	moveq	lr, #10
+.L1062:
+	add	r3, fp, #-1
+	ldr	r1, [sp, #44]
+	uxtb	r3, r3
+	movs	r0, #0
+	adds	r3, r3, #1
+.L1063:
+	mov	ip, r1
+	mov	r2, r8
+.L1064:
+	ldrb	r7, [r2], #1	@ zero_extendqisi2
+	strb	r7, [ip], #1
+	sub	r7, r2, r8
+	uxtb	r7, r7
+	cmp	fp, r7
+	bhi	.L1064
+	adds	r0, r0, #1
+	add	r8, r8, r3
+	cmp	r10, r0
+	add	r1, r1, lr
+	bgt	.L1063
+	ldr	r3, [sp, #12]
+	mov	r8, #255
+	ldr	r2, [sp, #4]
+	add	r7, r3, r2, lsl #8
+	str	r8, [r7, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #28]
+	cmp	r3, #1
+	bhi	.L1066
+	movs	r3, #54
+	movs	r2, #22
+	str	r3, [r7, #2056]
+	ldrb	r3, [r4, #128]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	str	r2, [r7, #2056]
+	str	r3, [r7, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	movs	r3, #48
+	str	r8, [r5, #2052]
+	str	r8, [r5, #2052]
+	str	r8, [r5, #2052]
+.L1105:
+	str	r3, [r7, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	b	.L1106
+.L1072:
+	mov	lr, #4
+	b	.L1062
+.L1066:
+	movs	r3, #56
+	b	.L1105
+.L1110:
+	.align	2
+.L1109:
+	.word	.LANCHOR111
+	.word	.LC34
+	.word	.LC33
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",%progbits
+	.align	1
+	.global	flash_get_read_retry_tbl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1113
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r0, #1
+	cmp	r3, #6
+	bhi	.L1111
+	b	hynix_get_read_retry_default
+.L1111:
+	bx	lr
+.L1114:
+	.align	2
+.L1113:
+	.word	.LANCHOR19
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",%progbits
+	.align	1
+	.global	nandc_xfer_done
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1149
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	ldr	r4, .L1149+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r6, [r4]
+	cmp	r3, #9
+	bne	.L1116
+	ldr	r3, [r6, #16]
+	str	r3, [sp]
+	ldr	r5, [r6, #48]
+	ubfx	r5, r5, #1, #1
+	cbnz	r5, .L1117
+	ldr	r7, .L1149+8
+	ldr	r8, .L1149+24
+.L1118:
+	ldr	r3, [sp]
+	lsls	r0, r3, #11
+	bmi	.L1121
+	ldr	r3, [r4]
+	adds	r5, r5, #1
+	ldr	r3, [r3, #16]
+	str	r3, [sp]
+	bics	r3, r5, #-16777216
+	bne	.L1118
+	ldr	r2, [sp]
+	mov	r1, r5
+	ldr	r3, [r6, #64]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #6
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1118
+.L1117:
+	ldr	r7, .L1149+12
+	movs	r5, #0
+	ldr	r8, .L1149+24
+.L1119:
+	ldr	r2, [r6, #64]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #6
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	blt	.L1123
+.L1121:
+	ldr	r3, .L1149+16
+	movs	r2, #0
+	str	r2, [r3, #20]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1123:
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #18
+	bpl	.L1120
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #14
+	bmi	.L1121
+.L1120:
+	adds	r5, r5, #1
+	bics	r3, r5, #-16777216
+	bne	.L1119
+	ldr	r2, [r6, #64]
+	mov	r1, r5
+	ldr	r3, [sp]
+	mov	r0, r7
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1119
+.L1116:
+	ldr	r3, [r6, #8]
+	str	r3, [sp]
+	ldr	r5, [r6, #16]
+	ubfx	r5, r5, #1, #1
+	cbnz	r5, .L1127
+	ldr	r7, .L1149+8
+	ldr	r8, .L1149+24
+.L1128:
+	ldr	r3, [sp]
+	lsls	r3, r3, #11
+	bmi	.L1121
+	ldr	r3, [r4]
+	adds	r5, r5, #1
+	ldr	r3, [r3, #8]
+	str	r3, [sp]
+	bics	r3, r5, #-16777216
+	bne	.L1128
+	ldr	r2, [sp]
+	mov	r1, r5
+	ldr	r3, [r6, #28]
+	mov	r0, r7
+	ubfx	r3, r3, #16, #5
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1128
+.L1127:
+	ldr	r7, .L1149+12
+	movs	r5, #0
+	ldr	r8, .L1149+24
+.L1129:
+	ldr	r2, [r6, #28]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L1121
+	ldr	r3, [r4]
+	ldr	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #18
+	bpl	.L1130
+	ldr	r3, [sp, #4]
+	lsls	r2, r3, #14
+	bpl	.L1130
+	ldr	r1, [sp, #4]
+	ldr	r0, .L1149+20
+	bl	printf
+	b	.L1121
+.L1130:
+	adds	r5, r5, #1
+	bics	r3, r5, #-16777216
+	bne	.L1129
+	ldr	r2, [r6, #28]
+	mov	r1, r5
+	ldr	r3, [sp]
+	mov	r0, r7
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	bl	printf
+	mov	r3, #256
+	movs	r2, #4
+	ldr	r1, [r4]
+	mov	r0, r8
+	bl	rknand_print_hex
+	b	.L1129
+.L1150:
+	.align	2
+.L1149:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LC37
+	.word	.LC35
+	.word	.LANCHOR30
+	.word	.LC38
+	.word	.LC36
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",%progbits
+	.align	1
+	.global	nandc_xfer
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nandc_xfer, %function
+nandc_xfer:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r1
+	ldr	r4, [sp, #32]
+	mov	r6, r2
+	mov	r5, r3
+	mov	r1, r6
+	mov	r2, r5
+	mov	r0, r8
+	mov	r3, r4
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cmp	r8, #0
+	bne	.L1169
+	ldr	r3, .L1182
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #9
+	bne	.L1153
+	ldr	r5, .L1182+4
+	lsrs	r6, r6, #2
+	movs	r2, #1
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r4, [r5]
+.L1154:
+	cmp	r1, r6
+	bcc	.L1158
+	ldr	r4, [r4]
+	cmp	r2, #0
+	it	ne
+	movne	r0, #512
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1152
+	mov	r1, r4
+	ldr	r0, .L1182+8
+	bl	printf
+	ldr	r3, [r5]
+	orr	r4, r4, #131072
+.L1181:
+	mov	r0, #-1
+	str	r4, [r3]
+.L1152:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1158:
+	add	r3, r1, #84
+	ldr	r3, [r4, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	r7, [sp, #4]
+	ldr	r3, [sp, #4]
+	ubfx	r3, r3, #26, #1
+	and	r3, r3, r7, lsr #10
+	ands	r2, r2, r3
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1171
+	ldr	r3, [sp, #4]
+	lsls	r7, r3, #13
+	bmi	.L1171
+	ldr	r7, [sp, #4]
+	ldr	r3, [sp, #4]
+	ubfx	r7, r7, #3, #7
+	ubfx	r3, r3, #19, #7
+	cmp	r7, r3
+	ldr	r3, [sp, #4]
+	ite	gt
+	ubfxgt	r3, r3, #3, #7
+	ubfxle	r3, r3, #19, #7
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1155:
+	adds	r1, r1, #1
+	b	.L1154
+.L1171:
+	mov	r0, #-1
+	b	.L1155
+.L1153:
+	ldr	r3, .L1182+12
+	mov	r1, r8
+	mov	r0, r8
+	ldr	r8, .L1182+20
+	lsrs	r7, r6, #1
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #25
+	mov	r3, r4
+	ite	cc
+	movcc	lr, #64
+	movcs	lr, #128
+.L1161:
+	cmp	r0, r7
+	add	ip, lr, r1
+	add	r3, r3, #4
+	bcc	.L1162
+	lsrs	r7, r6, #2
+	ldr	r6, .L1182+4
+	movs	r2, #0
+	mov	r0, r2
+	ldr	r1, [r6]
+.L1163:
+	cmp	r2, r7
+	bcc	.L1167
+	movs	r3, #0
+	str	r3, [r1, #16]
+	adds	r3, r0, #1
+	beq	.L1168
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1168
+	ldr	r3, [r4, #4]
+	adds	r3, r3, #1
+	bne	.L1168
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	it	eq
+	moveq	r0, #512
+.L1168:
+	ldr	r4, [r1]
+	and	r3, r4, #139264
+	cmp	r3, #139264
+	bne	.L1152
+	mov	r1, r4
+	ldr	r0, .L1182+16
+	bl	printf
+	orr	r4, r4, #131072
+	ldr	r3, [r6]
+	b	.L1181
+.L1162:
+	ldr	r2, [r8]
+	bic	r1, r1, #3
+	adds	r0, r0, #1
+	ldr	r2, [r2, r1]
+	strb	r2, [r3, #-4]
+	lsrs	r1, r2, #8
+	strb	r1, [r3, #-3]
+	lsrs	r1, r2, #16
+	lsrs	r2, r2, #24
+	strb	r1, [r3, #-2]
+	mov	r1, ip
+	strb	r2, [r3, #-1]
+	b	.L1161
+.L1167:
+	add	r3, r2, #8
+	ldr	r3, [r1, r3, lsl #2]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #29
+	bmi	.L1174
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #16
+	bmi	.L1174
+	ldr	r3, [sp, #4]
+	ubfx	ip, r3, #3, #5
+	ldr	r3, [sp, #4]
+	ubfx	r8, r3, #27, #1
+	ldr	r3, [sp, #4]
+	ldr	lr, [sp, #4]
+	orr	ip, ip, r8, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	lr, lr, #29, #1
+	orr	r3, r3, lr, lsl #5
+	cmp	ip, r3
+	ldr	r3, [sp, #4]
+	itete	hi
+	ldrhi	ip, [sp, #4]
+	ldrls	ip, [sp, #4]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	ip, ip, #27, #1
+	ubfxls	ip, ip, #29, #1
+	orr	r3, r3, ip, lsl #5
+	cmp	r0, r3
+	it	cc
+	movcc	r0, r3
+.L1164:
+	adds	r2, r2, #1
+	b	.L1163
+.L1174:
+	mov	r0, #-1
+	b	.L1164
+.L1169:
+	movs	r0, #0
+	b	.L1152
+.L1183:
+	.align	2
+.L1182:
+	.word	.LANCHOR7
+	.word	.LANCHOR6
+	.word	.LC39
+	.word	.LANCHOR27
+	.word	.LC40
+	.word	.LANCHOR30
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",%progbits
+	.align	1
+	.global	flash_read_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_page, %function
+flash_read_page:
+	@ args = 4, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	str	r3, [sp, #16]
+	mov	r5, r0
+	mov	r8, r1
+	ubfx	r4, r1, #0, #21
+	ldr	r3, .L1200
+	ubfx	r6, r1, #24, #2
+	str	r2, [sp, #12]
+	ldr	r7, [r3]
+	ldr	r3, .L1200+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L1185
+	mov	r3, r1
+	mov	r2, r6
+	mov	r1, r0
+	ldr	r0, .L1200+8
+	bl	printf
+.L1185:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	lsl	r10, r5, #8
+	bl	nandc_cs
+	ldr	r1, .L1200+12
+	cbnz	r6, .L1186
+	mov	r0, r5
+	str	r1, [sp, #20]
+	bl	flash_enter_slc_mode
+.L1198:
+	ldr	r1, [sp, #20]
+	b	.L1187
+.L1186:
+	ldr	r3, [r1]
+	ldrb	r3, [r3, #12]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L1188
+	add	r3, r7, r10
+	str	r6, [r3, #2056]
+.L1187:
+	add	fp, r7, r10
+	movs	r2, #0
+	str	r2, [fp, #2056]
+	str	r2, [fp, #2052]
+	str	r2, [fp, #2052]
+	uxtb	r2, r8
+	str	r2, [fp, #2052]
+	lsrs	r2, r4, #8
+	str	r2, [fp, #2052]
+	lsrs	r2, r4, #16
+	str	r2, [fp, #2052]
+	movs	r2, #48
+	str	r2, [fp, #2056]
+	ldr	r2, [r1]
+	ldrb	r2, [r2, #12]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L1189
+	cbz	r6, .L1189
+	add	r4, r4, r4, lsl #1
+	subs	r0, r4, #1
+	add	r0, r0, r6
+.L1199:
+	bl	nandc_set_seed
+	add	r7, r7, r10
+	bl	nandc_wait_flash_ready
+	movs	r1, #0
+	movs	r2, #5
+	movs	r3, #224
+	str	r2, [r7, #2056]
+	str	r1, [fp, #2052]
+	mov	r0, r5
+	str	r1, [fp, #2052]
+	str	r3, [r7, #2056]
+	ldr	r3, [sp, #16]
+	ldrb	r2, [sp, #56]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, [sp, #12]
+	bl	nandc_xfer
+	mov	r4, r0
+	cbnz	r6, .L1191
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L1191:
+	movs	r0, #0
+	bl	nandc_de_cs
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1188:
+	mov	r0, r5
+	str	r1, [sp, #20]
+	bl	flash_exit_slc_mode
+	b	.L1198
+.L1189:
+	mov	r0, r4
+	b	.L1199
+.L1201:
+	.align	2
+.L1200:
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC41
+	.word	.LANCHOR34
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",%progbits
+	.align	1
+	.global	micron_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	@ args = 8, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	str	r3, [sp, #12]
+	mov	r7, r2
+	movs	r5, #0
+	mov	r4, #-1
+	ldr	r3, .L1215
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	asr	r10, r3, #2
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1215+4
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+.L1203:
+	ldr	r3, .L1215+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1207
+.L1206:
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	add	r8, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r8, #2056]
+	movs	r3, #137
+	str	r3, [r8, #2052]
+	bl	timer_delay_ns
+	cmp	r4, r10
+	mov	r3, #0
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	str	r3, [r8, #2048]
+	bcc	.L1202
+	adds	r3, r4, #1
+	mov	r2, r7
+	it	ne
+	movne	r4, #256
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r1, r5
+	ldr	r0, .L1215+12
+	bl	printf
+.L1202:
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1207:
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	add	fp, r5, #1
+	add	r1, r3, r8, lsl #8
+	movs	r3, #239
+	str	r3, [r1, #2056]
+	movs	r3, #137
+	str	r3, [r1, #2052]
+	bl	timer_delay_ns
+	movs	r3, #0
+	str	fp, [r1, #2048]
+	str	r3, [r1, #2048]
+	mov	r0, r8
+	str	r3, [r1, #2048]
+	str	r3, [r1, #2048]
+	mov	r1, r7
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #12]
+	str	r3, [sp]
+	ldr	r3, [sp, #48]
+	bl	flash_read_page
+	mov	r2, r7
+	mov	r6, r0
+	str	r4, [sp]
+	mov	r3, r5
+	mov	r1, r5
+	ldr	r0, .L1215+16
+	bl	printf
+	adds	r2, r6, #1
+	beq	.L1204
+	ldr	r3, .L1215+20
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r6
+	cmp	r6, r10
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1215+24
+	ldr	r3, [r3]
+	str	r3, [sp, #48]
+	bcc	.L1210
+.L1204:
+	mov	r5, fp
+	b	.L1203
+.L1210:
+	mov	r4, r6
+	b	.L1206
+.L1216:
+	.align	2
+.L1215:
+	.word	.LANCHOR27
+	.word	.LANCHOR6
+	.word	.LANCHOR113
+	.word	.LC43
+	.word	.LC42
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",%progbits
+	.align	1
+	.global	toshiba_3d_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	@ args = 8, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r10, r0
+	mov	r8, r2
+	mov	r4, r1
+	add	r7, r10, #8
+	str	r3, [sp, #12]
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1252
+	ldr	r6, [r3]
+	ldr	r3, .L1252+4
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r7, r6, r7, lsl #8
+	cmp	r2, #36
+	ite	ne
+	movne	r2, #56
+	moveq	r2, #46
+	str	r2, [sp, #20]
+	ite	ne
+	movne	r2, #10
+	moveq	r2, #26
+	str	r2, [sp, #16]
+	cmp	r4, #0
+	bne	.L1219
+	mov	r4, #-1
+	movs	r5, #1
+	str	r3, [sp, #20]
+.L1225:
+	ldr	r3, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1220
+	movs	r2, #0
+	mov	r1, r5
+	mov	r0, r7
+	bl	toshiba_tlc_set_rr_para
+	add	r3, r6, r10, lsl #8
+	movs	r2, #93
+	str	r2, [r3, #2056]
+.L1221:
+	ldr	r3, [sp, #60]
+	mov	r1, r8
+	ldr	r2, [sp, #12]
+	mov	r0, r10
+	str	r3, [sp]
+	ldr	r3, [sp, #56]
+	bl	flash_read_page
+	mov	r2, r8
+	mov	fp, r0
+	mov	r3, r0
+	mov	r1, r5
+	ldr	r0, .L1252+8
+	bl	printf
+	cmp	fp, #-1
+	beq	.L1222
+	ldr	r3, .L1252+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, fp
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1252+16
+	ldr	r3, [r3]
+	str	r3, [sp, #56]
+	ldr	r3, .L1252+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	fp, r3, asr #2
+	bcc	.L1238
+.L1222:
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1225
+.L1224:
+	ldr	r3, .L1252+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1226
+	movs	r2, #0
+.L1251:
+	movs	r1, #0
+	mov	r0, r7
+	bl	toshiba_tlc_set_rr_para
+	b	.L1227
+.L1220:
+	uxtb	r1, r5
+	mov	r0, r7
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1221
+.L1238:
+	mov	r4, fp
+	b	.L1224
+.L1226:
+	movs	r1, #0
+	mov	r0, r7
+	bl	toshiba_3d_set_slc_rr_para
+.L1227:
+	ldr	r3, .L1252+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1235
+	add	r6, r6, r10, lsl #8
+	movs	r3, #85
+	str	r3, [r6, #2056]
+	movs	r3, #0
+	str	r3, [r6, #2052]
+	str	r3, [r6, #2048]
+	movs	r3, #255
+	str	r3, [r6, #2056]
+.L1235:
+	mov	r3, r5
+	str	r4, [sp]
+	mov	r2, r8
+	mov	r1, r5
+	ldr	r0, .L1252+24
+	bl	printf
+	ldr	r3, .L1252+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1236
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
+.L1236:
+	bl	nandc_wait_flash_ready
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1219:
+	orr	r8, r8, r4, lsl #24
+	movs	r5, #1
+	mov	r4, #-1
+	str	r3, [sp, #16]
+.L1233:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1228
+	movs	r2, #1
+	mov	r1, r5
+	mov	r0, r7
+	bl	toshiba_tlc_set_rr_para
+	add	r3, r6, r10, lsl #8
+	movs	r2, #93
+.L1250:
+	str	r2, [r3, #2056]
+	mov	r1, r8
+	ldr	r3, [sp, #60]
+	mov	r0, r10
+	ldr	r2, [sp, #12]
+	str	r3, [sp]
+	ldr	r3, [sp, #56]
+	bl	flash_read_page
+	mov	r2, r8
+	mov	fp, r0
+	mov	r3, r0
+	mov	r1, r5
+	ldr	r0, .L1252+28
+	bl	printf
+	cmp	fp, #-1
+	beq	.L1230
+	ldr	r3, .L1252+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, fp
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1252+16
+	ldr	r3, [r3]
+	str	r3, [sp, #56]
+	ldr	r3, .L1252+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	fp, r3, asr #2
+	bcc	.L1239
+.L1230:
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	cmp	r3, r5
+	bne	.L1233
+.L1232:
+	ldr	r3, .L1252+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #36
+	bne	.L1234
+	movs	r2, #1
+	b	.L1251
+.L1228:
+	uxtb	r1, r5
+	mov	r0, r7
+	bl	toshiba_3d_set_tlc_rr_para
+	add	r3, r6, r10, lsl #8
+	movs	r2, #38
+	b	.L1250
+.L1239:
+	mov	r4, fp
+	b	.L1232
+.L1234:
+	movs	r1, #0
+	mov	r0, r7
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1227
+.L1253:
+	.align	2
+.L1252:
+	.word	.LANCHOR6
+	.word	.LANCHOR1
+	.word	.LC44
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.word	.LANCHOR27
+	.word	.LC46
+	.word	.LC45
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",%progbits
+	.align	1
+	.global	toshiba_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	@ args = 8, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r7, r0
+	str	r2, [sp, #12]
+	add	r10, r7, #8
+	str	r3, [sp, #16]
+	bl	nandc_wait_flash_ready
+	ldr	r3, .L1281
+	ldr	r2, .L1281+4
+	ldr	r6, [r3]
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	subs	r3, r3, #67
+	add	r10, r6, r10, lsl #8
+	cmp	r3, #1
+	bls	.L1272
+	ldr	r3, .L1281+8
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1256
+	movs	r5, #1
+	movs	r0, #1
+	bl	nandc_set_if_mode
+.L1256:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L1255:
+	mov	r8, #1
+	mov	fp, #-1
+.L1257:
+	ldr	r3, .L1281+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L1266
+	mov	r4, fp
+.L1265:
+	ldr	r3, .L1281+4
+	movs	r1, #0
+	mov	r0, r10
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1267
+	bl	sandisk_set_rr_para
+.L1268:
+	add	r6, r6, r7, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	ldr	r3, .L1281+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1269
+	adds	r3, r4, #1
+	ldr	r2, [sp, #12]
+	it	ne
+	movne	r4, #256
+	mov	r3, r8
+	str	r4, [sp]
+	mov	r1, r8
+	ldr	r0, .L1281+20
+	bl	printf
+.L1269:
+	bl	nandc_wait_flash_ready
+	cbz	r5, .L1254
+	movs	r0, #4
+	bl	nandc_set_if_mode
+.L1254:
+	mov	r0, r4
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1272:
+	movs	r5, #0
+	b	.L1255
+.L1266:
+	ldr	r3, [sp, #20]
+	mov	r0, r10
+	uxtb	r1, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L1258
+	bl	sandisk_set_rr_para
+.L1259:
+	ldr	r3, .L1281+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L1260
+	ldr	r3, .L1281+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r6, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L1260:
+	add	r3, r6, r7, lsl #8
+	movs	r2, #38
+	ldr	r1, [sp, #12]
+	mov	r0, r7
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #16]
+	str	r3, [sp]
+	ldr	r3, [sp, #56]
+	bl	flash_read_page
+	adds	r2, r0, #1
+	mov	r4, r0
+	beq	.L1263
+	ldr	r3, .L1281+24
+	cmp	fp, #-1
+	it	eq
+	moveq	fp, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1281+28
+	ldr	r3, [r3]
+	str	r3, [sp, #56]
+	ldr	r3, .L1281+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1265
+.L1263:
+	add	r8, r8, #1
+	b	.L1257
+.L1258:
+	bl	toshiba_set_rr_para
+	b	.L1259
+.L1267:
+	bl	toshiba_set_rr_para
+	b	.L1268
+.L1282:
+	.align	2
+.L1281:
+	.word	.LANCHOR6
+	.word	.LANCHOR1
+	.word	.LANCHOR35
+	.word	.LANCHOR113
+	.word	.LANCHOR27
+	.word	.LC46
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",%progbits
+	.align	1
+	.global	hynix_read_retrial
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	@ args = 8, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	str	r3, [sp, #12]
+	mov	r4, #-1
+	mov	r7, r0
+	mov	r8, r2
+	ldr	r3, .L1297
+	ldr	r3, [r3]
+	add	fp, r3, r0
+	ldrb	r10, [r3, #114]	@ zero_extendqisi2
+	ldrb	r5, [fp, #120]	@ zero_extendqisi2
+	bl	nandc_wait_flash_ready
+.L1284:
+	cmp	r6, r10
+	bcc	.L1289
+.L1288:
+	ldr	r3, .L1297+4
+	strb	r5, [fp, #120]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L1283
+	adds	r3, r4, #1
+	mov	r2, r8
+	it	ne
+	movne	r4, #256
+	mov	r3, r6
+	str	r4, [sp]
+	mov	r1, r6
+	ldr	r0, .L1297+8
+	bl	printf
+.L1283:
+	mov	r0, r4
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1289:
+	adds	r5, r5, #1
+	mov	r0, r7
+	uxtb	r5, r5
+	cmp	r10, r5
+	it	ls
+	movls	r5, #0
+	mov	r1, r5
+	bl	hynix_set_rr_para
+	ldr	r3, [sp, #52]
+	mov	r1, r8
+	ldr	r2, [sp, #12]
+	mov	r0, r7
+	str	r3, [sp]
+	ldr	r3, [sp, #48]
+	bl	flash_read_page
+	adds	r2, r0, #1
+	beq	.L1286
+	ldr	r3, .L1297+12
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L1297+16
+	ldr	r3, [r3]
+	str	r3, [sp, #48]
+	ldr	r3, .L1297+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1292
+.L1286:
+	adds	r6, r6, #1
+	b	.L1284
+.L1292:
+	mov	r4, r0
+	b	.L1288
+.L1298:
+	.align	2
+.L1297:
+	.word	.LANCHOR5
+	.word	.LANCHOR27
+	.word	.LC47
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tunning_read,"ax",%progbits
+	.align	1
+	.global	flash_ddr_tunning_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_ddr_tunning_read, %function
+flash_ddr_tunning_read:
+	@ args = 4, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, #0
+	mov	r5, r8
+	mov	r4, r8
+	mov	r7, #1024
+	movs	r6, #6
+	mov	fp, #-1
+	sub	sp, sp, #32
+	str	r0, [sp, #16]
+	str	r1, [sp, #12]
+	str	r2, [sp, #20]
+	str	r3, [sp, #24]
+	bl	nandc_get_ddr_para
+	str	r8, [sp, #8]
+	str	r0, [sp, #28]
+.L1304:
+	uxtb	r0, r6
+	bl	nandc_set_ddr_para
+	ldr	r3, [sp, #64]
+	ldr	r2, [sp, #20]
+	ldr	r1, [sp, #12]
+	str	r3, [sp]
+	ldr	r0, [sp, #16]
+	ldr	r3, [sp, #24]
+	bl	flash_read_page
+	ldr	r2, [sp, #12]
+	mov	r3, r0
+	mov	r10, r0
+	mov	r1, r6
+	ldr	r0, .L1316
+	bl	printf
+	adds	r3, r7, #1
+	cmp	r10, r3
+	bhi	.L1300
+	ldr	r3, .L1316+4
+	cmp	r10, #2
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L1316+8
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	bhi	.L1309
+	adds	r4, r4, #1
+	cmp	r4, #7
+	bls	.L1309
+	mov	r3, r5
+	mov	r7, r10
+	subs	r5, r6, r4
+	mov	fp, #0
+.L1302:
+	ldr	r2, [sp, #8]
+	cmp	r4, r2
+	it	ls
+	movls	r5, r3
+.L1303:
+	cbz	r5, .L1305
+	ldr	r3, .L1316+12
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1316+16
+	umull	r2, r3, r2, r3
+	ubfx	r3, r3, #1, #8
+	cmp	r3, r7
+	bls	.L1305
+	mov	r1, r5
+	ldr	r0, .L1316+20
+	bl	printf
+	uxtb	r0, r5
+.L1315:
+	bl	nandc_set_ddr_para
+	cmp	fp, #0
+	beq	.L1299
+	mov	r7, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #16]
+	ldr	r0, .L1316+24
+	bl	printf
+.L1299:
+	mov	r0, r7
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1300:
+	ldr	r3, [sp, #8]
+	cmp	r4, r3
+	bls	.L1310
+	cmp	r4, #7
+	sub	r5, r8, r4
+	bhi	.L1303
+	str	r4, [sp, #8]
+.L1310:
+	movs	r4, #0
+	b	.L1301
+.L1309:
+	mov	r8, r6
+	mov	r7, r10
+	mov	fp, #0
+.L1301:
+	adds	r6, r6, #2
+	cmp	r6, #50
+	bne	.L1304
+	mov	r3, r5
+	mov	r5, r8
+	b	.L1302
+.L1305:
+	ldrb	r0, [sp, #28]	@ zero_extendqisi2
+	b	.L1315
+.L1317:
+	.align	2
+.L1316:
+	.word	.LC48
+	.word	.LANCHOR111
+	.word	.LANCHOR112
+	.word	.LANCHOR27
+	.word	-1431655765
+	.word	.LC49
+	.word	.LC50
+	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	.section	.text.flash_read_page_en,"ax",%progbits
+	.align	1
+	.global	flash_read_page_en
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_read_page_en, %function
+flash_read_page_en:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L1347
+	mov	r4, r1
+	mov	r7, r2
+	ldr	r10, [sp, #48]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L1319
+	mov	r2, #386
+	ldr	r1, .L1347+4
+	ldr	r0, .L1347+8
+	bl	printf
+.L1320:
+	b	.L1320
+.L1319:
+	ldr	r3, .L1347+12
+	ldrb	r5, [r3, r0]	@ zero_extendqisi2
+	ldr	r3, .L1347+16
+	ldr	r3, [r3]
+	lsls	r0, r3, #27
+	bpl	.L1321
+	mov	r2, r1
+	ldr	r0, .L1347+20
+	mov	r1, r5
+	bl	printf
+.L1321:
+	tst	r4, #50331648
+	bne	.L1322
+	ldr	r3, .L1347+24
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1347+28
+	cbz	r2, .L1323
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cbz	r2, .L1322
+.L1323:
+	ldr	r2, .L1347+32
+	mov	r0, r4
+	str	r3, [sp, #12]
+	ldrh	r6, [r2]
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	mul	fp, r6, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1324
+	add	r4, fp, r1, lsl #1
+.L1322:
+	mov	r1, r4
+	str	r10, [sp]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r0, r5
+	bl	flash_read_page
+	adds	r1, r0, #1
+	mov	r6, r0
+	bne	.L1318
+	ldr	fp, .L1347+40
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	cbnz	r3, .L1326
+.L1329:
+	ldr	r3, .L1347+36
+	ldr	fp, [r3]
+	cmp	fp, #0
+	bne	.L1327
+.L1328:
+	ldr	r3, .L1347+40
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, .L1347+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L1347+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1318
+	str	r10, [sp, #48]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r4
+	mov	r0, r5
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	flash_ddr_tunning_read
+.L1324:
+	ldr	r3, .L1347+52
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, fp
+	b	.L1322
+.L1326:
+	movs	r3, #0
+	mov	r2, r7
+	strb	r3, [fp]
+	mov	r1, r4
+	mov	r3, r8
+	str	r10, [sp]
+	mov	r0, r5
+	bl	flash_read_page
+	ldrb	r3, [sp, #12]	@ zero_extendqisi2
+	adds	r2, r0, #1
+	strb	r3, [fp]
+	beq	.L1329
+.L1346:
+	mov	r6, r0
+.L1318:
+	mov	r0, r6
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1327:
+	mov	r3, r7
+	stm	sp, {r8, r10}
+	mov	r2, r4
+	movs	r1, #0
+	mov	r0, r5
+	blx	fp
+	adds	r3, r0, #1
+	bne	.L1346
+	b	.L1328
+.L1348:
+	.align	2
+.L1347:
+	.word	.LANCHOR8
+	.word	.LANCHOR114
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR22
+	.word	.LC51
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR115
+	.word	.LANCHOR29
+	.word	.LC52
+	.word	.LANCHOR35
+	.word	.LANCHOR14
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",%progbits
+	.align	1
+	.global	flash_get_last_written_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r4, .L1355
+	mov	r10, r2
+	mov	fp, r3
+	ldrh	r5, [r4]
+	ldr	r4, .L1355+4
+	subs	r5, r5, #1
+	ldrh	r6, [r4, #26]
+	sxth	r5, r5
+	muls	r6, r1, r6
+	ldr	r1, [sp, #40]
+	str	r1, [sp]
+	adds	r1, r5, r6
+	bl	flash_read_page_en
+	cmp	r0, #512
+	bne	.L1350
+	movs	r7, #0
+.L1351:
+	cmp	r7, r5
+	ble	.L1354
+.L1350:
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1354:
+	adds	r4, r7, r5
+	ldr	r3, [sp, #40]
+	add	r4, r4, r4, lsr #31
+	mov	r2, r10
+	mov	r0, r8
+	asrs	r4, r4, #1
+	str	r3, [sp]
+	mov	r3, fp
+	sxtah	r1, r6, r4
+	bl	flash_read_page_en
+	cmp	r0, #512
+	itete	eq
+	addeq	r4, r4, #-1
+	addne	r4, r4, #1
+	sxtheq	r5, r4
+	sxthne	r7, r4
+	b	.L1351
+.L1356:
+	.align	2
+.L1355:
+	.word	.LANCHOR97
+	.word	.LANCHOR19
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",%progbits
+	.align	1
+	.global	flash_get_last_written_page_ext
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, lr}
+	movs	r5, #1
+	ldr	r4, .L1358
+	ldrh	r4, [r4]
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	rsb	r4, r4, #21
+	lsls	r5, r5, r4
+	asr	r4, r0, r4
+	subs	r5, r5, #1
+	and	r1, r5, r0
+	uxtb	r0, r4
+	bl	flash_get_last_written_page
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L1359:
+	.align	2
+.L1358:
+	.word	.LANCHOR71
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_info_blk_init,"ax",%progbits
+	.align	1
+	.global	flash_info_blk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #4
+	ldr	r10, .L1384+12
+.L1363:
+	movs	r5, #4
+	movs	r0, #0
+	ldr	r8, .L1384+16
+	ldr	fp, .L1384+20
+	ldr	r6, .L1384
+	ldrh	r1, [r8]
+	str	r5, [sp]
+	mov	r7, fp
+	ldr	r3, [r6]
+	ldr	r2, [fp]
+	muls	r1, r4, r1
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L1361
+	ldr	r2, [fp]
+	ldr	r3, [r2]
+	cmp	r3, r10
+	beq	.L1362
+.L1361:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L1363
+.L1383:
+	mov	r0, #-1
+.L1360:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1371:
+	ldr	r3, [r7]
+	ldr	r2, [r3]
+	cmp	r2, r10
+	bne	.L1372
+	ldr	r4, [r3, #4]
+.L1365:
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	movs	r3, #4
+	ldrh	r0, [r8]
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r6]
+	muls	r1, r0, r1
+	movs	r0, #0
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L1366
+	ldr	r3, [r7]
+	ldr	r2, [r3]
+	cmp	r2, r10
+	bne	.L1366
+	ldr	r2, [r3, #4]
+	cmp	r4, r2
+	itttt	cc
+	ldrbcc	r2, [r3, #37]	@ zero_extendqisi2
+	ldrbcc	r3, [r3, #36]	@ zero_extendqisi2
+	strbcc	r2, [r5]
+	strbcc	r3, [r5, #1]
+.L1366:
+	mov	fp, #4
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	str	fp, [sp]
+	movs	r0, #0
+	ldr	r3, [r6]
+	ldr	r2, [r7]
+	bl	flash_get_last_written_page
+	adds	r3, r0, #1
+	mov	r4, r0
+	strh	r3, [r5, #2]	@ movhi
+	ldrb	r5, [r5]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	mla	r5, r3, r5, r0
+.L1367:
+	cmp	r4, #0
+	bge	.L1369
+	adds	r4, r4, #1
+	bne	.L1370
+	ldr	r3, [r7]
+	ldr	r0, .L1384+4
+	ldr	r1, [r3]
+	bl	printf
+	b	.L1383
+.L1369:
+	str	fp, [sp]
+	mov	r1, r5
+	ldr	r3, [r6]
+	movs	r0, #0
+	ldr	r2, [r7]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	beq	.L1368
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r3, r10
+	bne	.L1368
+.L1370:
+	movs	r0, #0
+	b	.L1360
+.L1368:
+	subs	r4, r4, #1
+	subs	r5, r5, #1
+	sxth	r4, r4
+	b	.L1367
+.L1362:
+	ldrb	r1, [r2, #36]	@ zero_extendqisi2
+	ldrh	r0, [r8]
+	ldrb	r3, [r2, #37]	@ zero_extendqisi2
+	ldr	r4, .L1384+8
+	strb	r1, [r4]
+	muls	r1, r0, r1
+	strb	r3, [r4, #1]
+	movs	r0, #0
+	str	r5, [sp]
+	mov	r5, r4
+	ldr	r3, [r6]
+	bl	flash_read_page_en
+	adds	r0, r0, #1
+	bne	.L1371
+.L1372:
+	movs	r4, #0
+	b	.L1365
+.L1385:
+	.align	2
+.L1384:
+	.word	.LANCHOR116
+	.word	.LC53
+	.word	.LANCHOR117
+	.word	1398362953
+	.word	.LANCHOR13
+	.word	.LANCHOR5
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.flash_ddr_para_scan,"ax",%progbits
+	.align	1
+	.global	flash_ddr_para_scan
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	ldr	r6, .L1392
+	movs	r5, #1
+	mov	r8, r1
+	ldr	r4, .L1392+4
+	ldr	fp, .L1392+8
+	ldr	r10, .L1392+12
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	strb	r5, [r4]
+	bl	flash_set_interface_mode
+	ldrb	r0, [r6]	@ zero_extendqisi2
+	bl	nandc_set_if_mode
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_ddr_tunning_read
+	movs	r3, #4
+	ldr	r2, [r10]
+	str	r3, [sp]
+	mov	r1, r8
+	ldr	r3, [fp]
+	mov	r0, r7
+	bl	flash_read_page
+	adds	r0, r0, #1
+	mov	r3, r4
+	bne	.L1387
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	lsls	r2, r2, #31
+	bpl	.L1387
+	mov	r0, r5
+	bl	flash_set_interface_mode
+	mov	r0, r5
+	bl	nandc_set_if_mode
+	movs	r3, #0
+	strb	r3, [r4]
+.L1388:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1387:
+	movs	r2, #1
+	strb	r2, [r3]
+	b	.L1388
+.L1393:
+	.align	2
+.L1392:
+	.word	.LANCHOR25
+	.word	.LANCHOR35
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_page_read,"ax",%progbits
+	.align	1
+	.global	flash_complete_page_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r2, .L1419
+	ubfx	r3, r0, #21, #3
+	sub	sp, sp, #24
+	str	r0, [sp, #12]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r1, [sp, #16]
+	cmp	r2, r3
+	bhi	.L1395
+	movw	r2, #791
+	ldr	r1, .L1419+4
+	ldr	r0, .L1419+8
+	bl	printf
+.L1396:
+	b	.L1396
+.L1395:
+	ldr	r2, [sp, #12]
+	ubfx	r4, r2, #0, #21
+	ubfx	r2, r2, #24, #2
+	str	r2, [sp, #8]
+	ldr	r2, .L1419+12
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1419+16
+	mov	r0, r5
+	ldr	r6, [r3]
+	bl	nandc_cs
+	ldr	r3, [sp, #8]
+	cbnz	r3, .L1397
+	ldr	r3, .L1419+20
+	ldr	fp, .L1419+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1398
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cbz	r3, .L1397
+.L1398:
+	ldr	r3, .L1419+24
+	mov	r0, r4
+	ldrh	r8, [r3]
+	mov	r1, r8
+	bl	__aeabi_uidiv
+	mov	r1, r8
+	mul	r10, r8, r0
+	mov	r0, r4
+	bl	__aeabi_uidivmod
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1399
+	add	r4, r10, r1, lsl #1
+.L1397:
+	add	r6, r6, r5, lsl #8
+	movs	r3, #5
+	mov	r8, #0
+	ldr	fp, .L1419+44
+	str	r3, [r6, #2056]
+	uxtb	r3, r4
+	str	r8, [r6, #2052]
+	mov	r1, r8
+	str	r8, [r6, #2052]
+	mov	r0, r5
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #8
+	ldrb	r2, [fp, #9]	@ zero_extendqisi2
+	str	r3, [r6, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r6, #2052]
+	movs	r3, #224
+	str	r3, [r6, #2056]
+	str	r7, [sp]
+	ldr	r3, [sp, #16]
+	bl	nandc_xfer
+	adds	r1, r0, #1
+	mov	r6, r0
+	bne	.L1394
+	ldr	r10, .L1419+32
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	str	r3, [sp, #20]
+	cbnz	r3, .L1401
+.L1404:
+	ldr	r3, .L1419+28
+	ldr	r8, [r3]
+	cmp	r8, #0
+	bne	.L1402
+.L1403:
+	ldr	r3, .L1419+32
+	movs	r1, #0
+	ldr	r2, [sp, #12]
+	ldr	r0, .L1419+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, #-1
+	bl	printf
+	ldr	r3, .L1419+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1394
+	ldr	r3, .L1419+44
+	mov	r0, r5
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #16]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	orr	r1, r4, r1, lsl #24
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_ddr_tunning_read
+	b	.L1418
+.L1399:
+	ldr	r3, .L1419+48
+	ldrh	r4, [r3, r1, lsl #1]
+	add	r4, r4, r10
+	b	.L1397
+.L1401:
+	ldr	r1, [sp, #8]
+	mov	r0, r5
+	ldrb	r3, [fp, #9]	@ zero_extendqisi2
+	strb	r8, [r10]
+	ldr	r2, [sp, #16]
+	str	r3, [sp]
+	orr	r1, r4, r1, lsl #24
+	mov	r3, r7
+	bl	flash_read_page
+	ldrb	r3, [sp, #20]	@ zero_extendqisi2
+	adds	r2, r0, #1
+	strb	r3, [r10]
+	beq	.L1404
+.L1418:
+	mov	r6, r0
+.L1394:
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1402:
+	ldr	r3, .L1419+44
+	mov	r2, r4
+	ldr	r1, [sp, #8]
+	mov	r0, r5
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r7, [sp]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #16]
+	blx	r8
+	adds	r3, r0, #1
+	beq	.L1403
+	b	.L1418
+.L1420:
+	.align	2
+.L1419:
+	.word	.LANCHOR8
+	.word	.LANCHOR120
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR11
+	.word	.LANCHOR13
+	.word	.LANCHOR115
+	.word	.LANCHOR29
+	.word	.LC54
+	.word	.LANCHOR35
+	.word	.LANCHOR19
+	.word	.LANCHOR14
+	.word	.LANCHOR12
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1458
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cmp	r5, #255
+	bne	.L1422
+.L1440:
+	movs	r4, #0
+	b	.L1421
+.L1422:
+	ldr	r6, .L1458+4
+	movs	r3, #48
+	mla	r3, r3, r5, r6
+	ldrb	r2, [r3, #42]	@ zero_extendqisi2
+	ldr	r4, [r3, #24]
+	subs	r3, r2, #1
+	cmp	r3, #9
+	bhi	.L1440
+	tbb	[pc, r3]
+.L1425:
+	.byte	(.L1424-.L1425)/2
+	.byte	(.L1424-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1427-.L1425)/2
+	.byte	(.L1428-.L1425)/2
+	.byte	(.L1429-.L1425)/2
+	.byte	(.L1426-.L1425)/2
+	.byte	(.L1429-.L1425)/2
+	.p2align 1
+.L1424:
+	movs	r1, #64
+	mov	r0, r4
+	bl	flash_wait_device_ready
+	lsls	r0, r0, #25
+	bpl	.L1440
+	movs	r3, #48
+	mov	r0, r4
+	mla	r5, r3, r5, r6
+	ldr	r3, [r5, #4]
+	ldr	r1, [r5, #8]
+	ldr	r2, [r5, #12]
+	cmp	r1, #0
+	it	eq
+	moveq	r1, r3
+	bl	flash_complete_page_read
+	movs	r3, #12
+	str	r0, [r5, #36]
+	strb	r3, [r5, #42]
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #8
+	strb	r3, [r5, #2]
+	b	.L1440
+.L1426:
+	movs	r1, #64
+	mov	r0, r4
+	bl	flash_wait_device_ready
+	lsls	r1, r0, #25
+	mov	r4, r0
+	bpl	.L1440
+	ands	r2, r0, #5
+	mov	r3, #48
+	mla	r5, r3, r5, r6
+	beq	.L1439
+	movs	r3, #11
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	strb	r3, [r5, #42]
+	ldr	r0, .L1458+8
+	str	r3, [sp]
+	ldr	r3, [r5, #24]
+	ldr	r2, [r5, #36]
+	bl	printf
+.L1457:
+	mov	r3, #-1
+	str	r3, [r5, #36]
+	b	.L1421
+.L1429:
+	add	r3, r5, r5, lsl #1
+	cmp	r2, #10
+	it	eq
+	moveq	r1, #9
+	add	r3, r6, r3, lsl #4
+	it	ne
+	movne	r1, #3
+	ubfx	r0, r4, #21, #3
+	movs	r7, #48
+.L1434:
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	cmp	r8, #255
+	bne	.L1438
+	mov	r4, #-1
+	b	.L1421
+.L1438:
+	mla	r2, r7, r8, r6
+	add	r3, r8, r8, lsl #1
+	ldrb	ip, [r2, #42]	@ zero_extendqisi2
+	add	r3, r6, r3, lsl #4
+	cmp	ip, r1
+	bne	.L1434
+	ldr	r2, [r2, #24]
+	ubfx	r2, r2, #21, #3
+	cmp	r0, r2
+	bne	.L1434
+	mov	r0, r4
+	movs	r1, #64
+	bl	flash_wait_device_ready
+	ands	r4, r0, #64
+	mov	r10, r0
+	beq	.L1436
+	ands	r4, r0, #15
+	mul	r7, r7, r5
+	beq	.L1437
+	adds	r4, r6, r7
+	movs	r7, #11
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L1458+8
+	str	r7, [sp]
+	ldr	r3, [r4, #24]
+	ldr	r2, [r4, #36]
+	bl	printf
+	mov	r3, #-1
+	strb	r7, [r4, #42]
+	str	r3, [r4, #36]
+	mov	r4, r10
+.L1436:
+	movs	r3, #48
+	mla	r5, r3, r5, r6
+	mla	r6, r3, r8, r6
+	ldrb	r2, [r5, #42]	@ zero_extendqisi2
+	ldr	r3, [r5, #36]
+	strb	r2, [r6, #42]
+	str	r3, [r6, #36]
+.L1421:
+	mov	r0, r4
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1437:
+	add	r7, r7, r6
+	movs	r3, #12
+	strb	r3, [r7, #42]
+	str	r4, [r7, #36]
+	b	.L1436
+.L1427:
+	mov	r0, r4
+	movs	r1, #32
+	bl	flash_wait_device_ready
+	lsls	r2, r0, #26
+	mov	r4, r0
+	bpl	.L1440
+	ands	r2, r0, #15
+	mov	r3, #48
+	mla	r5, r3, r5, r6
+	beq	.L1439
+	movs	r3, #11
+	strb	r3, [r5, #42]
+	b	.L1457
+.L1439:
+	movs	r3, #12
+	str	r2, [r5, #36]
+	strb	r3, [r5, #42]
+	b	.L1440
+.L1428:
+	movs	r1, #64
+	mov	r0, r4
+	bl	flash_wait_device_ready
+	lsls	r3, r0, #25
+	bpl	.L1440
+	movs	r3, #48
+	mla	r5, r3, r5, r6
+	movs	r3, #6
+	str	r0, [r5, #36]
+	strb	r3, [r5, #42]
+	b	.L1440
+.L1459:
+	.align	2
+.L1458:
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.word	.LC55
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",%progbits
+	.align	1
+	.global	sblk_wait_write_queue_completed
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L1463
+.L1461:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L1462
+	pop	{r4, pc}
+.L1462:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1461
+.L1464:
+	.align	2
+.L1463:
+	.word	.LANCHOR90
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",%progbits
+	.align	1
+	.global	ftl_read_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_page, %function
+ftl_read_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldr	r8, [sp, #24]
+	mov	r5, r1
+	mov	r6, r2
+	mov	r7, r3
+	bl	sblk_wait_write_queue_completed
+	str	r8, [sp, #24]
+	mov	r3, r7
+	mov	r2, r6
+	mov	r1, r5
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",%progbits
+	.align	1
+	.global	ftl_read_ppa_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	mov	r7, r3
+	bl	sblk_wait_write_queue_completed
+	str	r7, [sp]
+	mov	r3, r6
+	mov	r2, r5
+	mov	r1, r4
+	ubfx	r0, r4, #21, #3
+	bl	flash_read_page_en
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.ftl_open_sblk_read_test,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_read_test
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_read_test, %function
+ftl_open_sblk_read_test:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #0
+	ldr	r8, .L1477+20
+	sub	sp, sp, #32
+	mov	r4, r0
+	add	r1, sp, #16
+	bl	ftl_get_blk_list_in_sblk
+	strh	r4, [sp]	@ movhi
+	strb	r0, [sp, #9]
+.L1468:
+	ldr	r3, .L1477
+	ldrh	r2, [r3]
+	uxth	r3, r5
+	cmp	r2, r3
+	bls	.L1467
+	movs	r4, #0
+	ldr	r7, .L1477+4
+	b	.L1470
+.L1473:
+	uxth	r3, r4
+	add	r2, sp, #32
+	add	r3, r2, r3, lsl #1
+	ldrh	r0, [r3, #-16]
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L1469
+.L1472:
+	adds	r4, r4, #1
+.L1470:
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	uxth	r3, r4
+	cmp	r2, r3
+	bhi	.L1473
+	adds	r5, r5, #1
+	b	.L1468
+.L1469:
+	ldr	r3, .L1477+8
+	uxth	r6, r5
+	ldr	r2, .L1477+12
+	ldr	r1, .L1477+16
+	ldrh	ip, [r3]
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	mla	r0, r0, ip, r6
+	bl	ftl_read_ppa_page
+	cmp	r0, #512
+	bne	.L1472
+.L1467:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1478:
+	.align	2
+.L1477:
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR75
+	.word	.LANCHOR121
+	.word	ftl_tmp_buffer
+	.word	.LANCHOR45
+	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
+	.section	.text.sblk_read_page,"ax",%progbits
+	.align	1
+	.global	sblk_read_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_read_page, %function
+sblk_read_page:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r10, .L1493
+	mov	r5, r1
+	mov	r8, r0
+	mov	r6, r1
+.L1480:
+	cbnz	r6, .L1484
+.L1492:
+	ldr	r6, .L1493
+.L1485:
+	cbnz	r5, .L1488
+	mov	r0, r5
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1484:
+	ldrb	r7, [r8]	@ zero_extendqisi2
+	ldr	fp, [r8, #24]
+.L1481:
+	movs	r1, #0
+	mov	r0, fp
+	bl	queue_lun_state
+	cbnz	r0, .L1482
+	str	r0, [sp, #4]
+	movs	r0, #48
+	ldr	r1, [r8, #24]
+	bl	flash_start_page_read
+	ldr	r2, [sp, #4]
+	movs	r1, #1
+	strb	r1, [r8, #42]
+	mov	r1, r8
+	ldr	r0, .L1493+4
+	strb	r2, [r8, #43]
+	movs	r2, #255
+	strb	r2, [r8]
+	bl	buf_add_tail
+	subs	r6, r6, #1
+	beq	.L1492
+	add	r7, r7, r7, lsl #1
+	add	r8, r10, r7, lsl #4
+	b	.L1480
+.L1482:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1481
+.L1488:
+	ldrb	r3, [r4, #42]	@ zero_extendqisi2
+	cmp	r3, #12
+	bne	.L1486
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	subs	r5, r5, #1
+	add	r4, r4, r4, lsl #1
+	add	r4, r6, r4, lsl #4
+	b	.L1485
+.L1486:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1485
+.L1494:
+	.align	2
+.L1493:
+	.word	.LANCHOR36
+	.word	.LANCHOR90
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",%progbits
+	.align	1
+	.global	gc_check_data_one_wl
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r3, .L1520
+	ldr	r4, .L1520+4
+	ldr	r8, [r3]
+	ldr	r3, [r4, #8]
+	cbnz	r3, .L1496
+	movs	r0, #1
+	bl	buf_alloc
+	str	r0, [r4, #8]
+.L1496:
+	ldr	r5, [r4, #8]
+	cbz	r5, .L1497
+	ldr	fp, .L1520+40
+	add	r10, r8, #96
+	movs	r7, #0
+.L1498:
+	ldrb	r3, [r8, #89]	@ zero_extendqisi2
+	cmp	r7, r3
+	bge	.L1508
+	movs	r6, #1
+	b	.L1509
+.L1497:
+	movw	r2, #333
+	ldr	r1, .L1520+8
+	ldr	r0, .L1520+12
+	bl	printf
+.L1499:
+	b	.L1499
+.L1507:
+	ldrh	r3, [fp]
+	ldrh	r2, [r10]
+	muls	r2, r3, r2
+	ldr	r3, .L1520+16
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldrh	r3, [r4, #12]
+	cmp	r1, #3
+	bne	.L1500
+	add	r3, r3, r2
+	orr	r3, r3, r6, lsl #24
+.L1519:
+	movs	r1, #1
+	str	r3, [r5, #24]
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r2, [r5, #36]
+	ldr	r1, .L1520+20
+	adds	r0, r2, #1
+	beq	.L1503
+	ldr	r3, [r1]
+	ldrh	ip, [r4, #18]
+	ldr	r0, [r5, #12]
+	ldr	lr, [r3, ip, lsl #2]
+	ldr	r3, [r0, #4]
+	cmp	lr, r3
+	bne	.L1503
+	ldr	r3, .L1520+24
+	ldr	r3, [r3]
+	ldr	ip, [r3, ip, lsl #2]
+	ldr	r3, [r0, #8]
+	cmp	ip, r3
+	beq	.L1504
+.L1503:
+	ldrh	r3, [r4, #18]
+	ldr	r1, [r1]
+	lsls	r0, r3, #2
+	ldr	r3, [r1, r3, lsl #2]
+	adds	r1, r3, #1
+	beq	.L1504
+	ldr	r1, .L1520+28
+	ldr	r1, [r1]
+	lsls	r1, r1, #21
+	bpl	.L1505
+	ldr	r1, [r5, #12]
+	ldr	r4, [r1, #12]
+	str	r4, [sp, #16]
+	ldr	r4, [r1, #8]
+	str	r4, [sp, #12]
+	ldr	r4, [r1, #4]
+	str	r4, [sp, #8]
+	ldr	r1, [r1]
+	str	r1, [sp, #4]
+	ldr	r1, .L1520+24
+	ldr	r1, [r1]
+	ldr	r1, [r1, r0]
+	ldr	r0, .L1520+32
+	str	r1, [sp]
+	ldr	r1, [r5, #24]
+	bl	printf
+.L1505:
+	ldr	r3, .L1520+36
+	mov	r0, #-1
+	ldrh	r2, [r8, #80]
+	movs	r1, #0
+	ldr	r3, [r3]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L1495:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1500:
+	cmp	r1, #2
+	itett	eq
+	addeq	r3, r3, #-1
+	addne	r3, r3, r2
+	addeq	r3, r3, r2
+	addeq	r3, r3, r6
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L1519
+.L1504:
+	ldrh	r3, [r4, #18]
+	adds	r6, r6, #1
+	adds	r3, r3, #1
+	strh	r3, [r4, #18]	@ movhi
+.L1509:
+	ldrh	r3, [r4, #16]
+	cmp	r6, r3
+	ble	.L1507
+	adds	r7, r7, #1
+	add	r10, r10, #2
+	b	.L1498
+.L1508:
+.L1506:
+	ldrh	r3, [r4, #12]
+	movs	r0, #0
+	adds	r3, r3, #1
+	strh	r3, [r4, #12]	@ movhi
+	b	.L1495
+.L1521:
+	.align	2
+.L1520:
+	.word	.LANCHOR60
+	.word	.LANCHOR59
+	.word	.LANCHOR122
+	.word	.LC0
+	.word	.LANCHOR64
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR22
+	.word	.LC56
+	.word	.LANCHOR56
+	.word	.LANCHOR75
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.flash_prog_page,"ax",%progbits
+	.align	1
+	.global	flash_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_prog_page, %function
+flash_prog_page:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L1530
+	mov	r5, r0
+	mov	r6, r1
+	mov	r10, r2
+	ubfx	r8, r1, #0, #21
+	ubfx	r7, r1, #24, #2
+	ldr	r4, [r3]
+	add	r3, r0, #8
+	add	r3, r4, r3, lsl #8
+	str	r3, [sp, #4]
+	ldr	r3, .L1530+4
+	ldr	r3, [r3]
+	lsls	r3, r3, #27
+	bpl	.L1523
+	ldr	r3, [sp, #40]
+	mov	r2, r7
+	ldr	r0, .L1530+8
+	bl	printf
+.L1523:
+	bl	nandc_wait_flash_ready
+	mov	r0, r5
+	bl	hynix_reconfig_rr_para
+	mov	r0, r5
+	bl	nandc_cs
+	mov	r0, r5
+	cbnz	r7, .L1524
+	bl	flash_enter_slc_mode
+.L1525:
+	add	r4, r4, r5, lsl #8
+	movs	r3, #128
+	uxtb	r6, r6
+	mov	r0, r8
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsr	r3, r8, #8
+	str	r6, [r4, #2052]
+	str	r3, [r4, #2052]
+	lsr	r3, r8, #16
+	str	r3, [r4, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L1530+12
+	mov	r2, r10
+	mov	r3, fp
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	movs	r3, #16
+	str	r3, [r4, #2056]
+	bl	nandc_wait_flash_ready
+	ldr	r0, [sp, #4]
+	bl	flash_read_status
+	mov	r4, r0
+	cbnz	r7, .L1526
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L1526:
+	mov	r0, r5
+	bl	nandc_de_cs
+	and	r0, r4, #4
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1524:
+	bl	flash_exit_slc_mode
+	b	.L1525
+.L1531:
+	.align	2
+.L1530:
+	.word	.LANCHOR6
+	.word	.LANCHOR22
+	.word	.LC57
+	.word	.LANCHOR19
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",%progbits
+	.align	1
+	.global	flash_test_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_test_blk, %function
+flash_test_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r1
+	mov	r4, r0
+	cbnz	r0, .L1533
+	ldr	r3, .L1550
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r1
+	bhi	.L1537
+.L1533:
+	ldr	r6, .L1550+4
+	movs	r2, #32
+	ldr	r7, .L1550+8
+	movs	r1, #165
+	ldr	r0, [r6]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r7]
+	bl	ftl_memset
+	ldr	r3, .L1550+12
+	mov	r0, r4
+	ldrh	r3, [r3]
+	muls	r5, r3, r5
+	mov	r1, r5
+	bl	flash_erase_block
+	adds	r0, r0, #1
+	beq	.L1535
+	ldr	r8, .L1550+16
+	mov	r1, r5
+	mov	r0, r4
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r6]
+	bl	flash_prog_page
+	adds	r0, r0, #1
+	beq	.L1535
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	mov	r1, r5
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r2, [r7]
+	ldr	r3, [r6]
+	bl	flash_read_page
+	cmp	r0, #-1
+	mov	r8, r0
+	beq	.L1535
+	ldr	r3, [r7]
+	ldr	r3, [r3]
+	cmp	r3, #1515870810
+	bne	.L1535
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	cmp	r3, #-1515870811
+	beq	.L1536
+.L1535:
+	mov	r8, #-1
+.L1536:
+	mov	r1, r5
+	mov	r0, r4
+	bl	flash_erase_block
+	mov	r0, r8
+.L1532:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1537:
+	b	.L1532
+.L1551:
+	.align	2
+.L1550:
+	.word	.LANCHOR123
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR13
+	.word	.LANCHOR19
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.flash_start_tlc_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_tlc_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	@ args = 12, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	ldr	r2, .L1559
+	add	r5, sp, #40
+	mov	r4, r0
+	mov	fp, r1
+	ldm	r5, {r5, r8, r10}
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1553
+	movw	r2, #655
+	ldr	r1, .L1559+4
+	ldr	r0, .L1559+8
+	bl	printf
+.L1554:
+	b	.L1554
+.L1553:
+	ldr	r2, .L1559+12
+	ldrb	r6, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1559+16
+	mov	r0, r6
+	ldr	r2, [r3]
+	str	r2, [sp, #4]
+	bl	nandc_cs
+	lsls	r3, r6, #8
+	ldr	r2, [sp, #4]
+	cbz	r4, .L1555
+	adds	r1, r2, r3
+	str	r4, [r1, #2056]
+.L1555:
+	adds	r4, r2, r3
+	movs	r3, #128
+	str	fp, [r4, #2056]
+	str	r3, [r4, #2056]
+	movs	r3, #0
+	str	r3, [r4, #2052]
+	str	r3, [r4, #2052]
+	uxtb	r3, r5
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #8
+	str	r3, [r4, #2052]
+	lsrs	r3, r5, #16
+	add	r5, r5, r5, lsl #1
+	str	r3, [r4, #2052]
+	subs	r0, r5, #1
+	add	r0, r0, fp
+	bl	nandc_set_seed
+	ldr	r1, .L1559+20
+	mov	r3, r10
+	mov	r2, r8
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r7, [r4, #2056]
+	mov	r0, r6
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs
+.L1560:
+	.align	2
+.L1559:
+	.word	.LANCHOR8
+	.word	.LANCHOR124
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, lr}
+	mov	r4, r0
+	ldr	r3, [r0]
+	movs	r1, #1
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	ubfx	r6, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	movs	r1, #2
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #4
+	ldr	r0, .L1562
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, lr}
+	b	buf_add_tail
+.L1563:
+	.align	2
+.L1562:
+	.word	.LANCHOR90
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",%progbits
+	.align	1
+	.global	sblk_tlc_prog_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0]
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r6, [r3, #24]
+.L1565:
+	movs	r1, #1
+	mov	r0, r6
+	bl	queue_lun_state
+	mov	r4, r0
+	cbnz	r0, .L1566
+	mov	r0, r5
+	bl	queue_tlc_prog_cmd
+	mov	r0, r4
+	pop	{r4, r5, r6, pc}
+.L1566:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1565
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",%progbits
+	.align	1
+	.global	sblk_xlc_prog_pages
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0]
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	sub	sp, sp, #20
+	mov	r7, r1
+	mov	r10, r2
+	ldr	r5, [r3, #24]
+.L1568:
+	movs	r1, #1
+	mov	r0, r5
+	bl	queue_lun_state
+	cmp	r0, #0
+	bne	.L1569
+	cmp	r10, #2
+	bne	.L1570
+	ldr	r2, [r7]
+	movs	r1, #1
+	ldr	r3, [r4]
+	ldr	r6, [r2, #24]
+	ldr	r2, [r3, #12]
+	ldr	r5, [r3, #24]
+	ldrb	r0, [r3, #44]	@ zero_extendqisi2
+	ubfx	r6, r6, #0, #21
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	ubfx	r8, r5, #0, #21
+	ubfx	r5, r5, #21, #3
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7]
+	movs	r1, #1
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldm	r4, {r2, r3}
+	mov	r1, r10
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #4]
+	mov	r1, r10
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #26
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r4, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #17
+	ldr	r3, [r3, #4]
+	str	r8, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	r3, [r7, #8]
+	movs	r1, #3
+	ldr	r2, [r4]
+	ldrb	r0, [r2, #44]	@ zero_extendqisi2
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	movs	r2, #16
+	ldr	r3, [r3, #4]
+	str	r6, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r5
+	bl	flash_start_tlc_page_prog
+	ldr	r1, [r4]
+	movs	r3, #5
+	ldr	r0, .L1572
+	strb	r3, [r1, #42]
+	movs	r3, #1
+	strb	r3, [r1, #43]
+	movs	r3, #255
+	strb	r3, [r1]
+	bl	buf_add_tail
+.L1571:
+	movs	r0, #0
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1569:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1568
+.L1570:
+	mov	r0, r4
+	bl	queue_tlc_prog_cmd
+	b	.L1571
+.L1573:
+	.align	2
+.L1572:
+	.word	.LANCHOR90
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.flash_start_page_prog,"ax",%progbits
+	.align	1
+	.global	flash_start_page_prog
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r2
+	ldr	r2, .L1585
+	mov	r10, r3
+	ubfx	r3, r1, #21, #3
+	mov	r7, r0
+	mov	fp, r1
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1575
+	mov	r2, #692
+	ldr	r1, .L1585+4
+	ldr	r0, .L1585+8
+	bl	printf
+.L1576:
+	b	.L1576
+.L1575:
+	ldr	r2, .L1585+12
+	ubfx	r4, r1, #0, #21
+	ldrb	r6, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1585+16
+	mov	r0, r6
+	ldr	r5, [r3]
+	bl	hynix_reconfig_rr_para
+	mov	r0, r6
+	bl	nandc_cs
+	tst	fp, #50331648
+	bne	.L1577
+	ldr	r3, .L1585+20
+	ldr	r2, .L1585+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1578
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	cbz	r3, .L1579
+.L1578:
+	ldr	r3, .L1585+28
+	mov	r0, r4
+	str	r2, [sp, #4]
+	ldrh	fp, [r3]
+	mov	r1, fp
+	bl	__aeabi_uidiv
+	mul	r3, fp, r0
+	mov	r1, fp
+	mov	r0, r4
+	str	r3, [sp]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L1580
+	add	r4, r3, r1, lsl #1
+.L1579:
+	mov	r0, r6
+	bl	flash_enter_slc_mode
+	b	.L1581
+.L1580:
+	ldr	r2, .L1585+32
+	ldrh	r4, [r2, r1, lsl #1]
+	add	r4, r4, r3
+.L1581:
+	add	r5, r5, r6, lsl #8
+	movs	r3, #128
+	mov	r0, r4
+	str	r3, [r5, #2056]
+	movs	r3, #0
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	uxtb	r3, r4
+	str	r3, [r5, #2052]
+	lsrs	r3, r4, #8
+	str	r3, [r5, #2052]
+	lsrs	r3, r4, #16
+	str	r3, [r5, #2052]
+	bl	nandc_set_seed
+	ldr	r1, .L1585+36
+	mov	r3, r10
+	mov	r2, r8
+	movs	r0, #1
+	ldrb	r1, [r1, #9]	@ zero_extendqisi2
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	r7, [r5, #2056]
+	mov	r0, r6
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	nandc_de_cs
+.L1577:
+	mov	r0, r6
+	bl	flash_exit_slc_mode
+	b	.L1581
+.L1586:
+	.align	2
+.L1585:
+	.word	.LANCHOR8
+	.word	.LANCHOR125
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR6
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR19
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",%progbits
+	.align	1
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #12]
+	ldr	r2, [r0, #4]
+	ldr	r1, [r0, #24]
+	movs	r0, #16
+	bl	flash_start_page_prog
+	ldr	r3, .L1595
+	ldr	r2, [r4, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1588
+	ldr	r6, .L1595+4
+	ubfx	r2, r2, #21, #3
+	movs	r5, #48
+	mov	r7, r6
+.L1590:
+	mla	r1, r5, r3, r6
+	ldr	r0, [r1, #24]
+	ubfx	r0, r0, #21, #3
+	cmp	r2, r0
+	bne	.L1589
+	add	r0, r1, #42
+	ldrb	r1, [r1, #42]	@ zero_extendqisi2
+	cmp	r1, #6
+	bne	.L1589
+	movs	r3, #3
+	strb	r3, [r0]
+.L1588:
+	movs	r3, #3
+	mov	r1, r4
+	strb	r3, [r4, #42]
+	movs	r3, #1
+	strb	r3, [r4, #43]
+	movs	r3, #255
+	strb	r3, [r4]
+	ldr	r0, .L1595
+	pop	{r3, r4, r5, r6, r7, lr}
+	b	buf_add_tail
+.L1589:
+	muls	r3, r5, r3
+	ldrb	r3, [r7, r3]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L1590
+	b	.L1588
+.L1596:
+	.align	2
+.L1595:
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",%progbits
+	.align	1
+	.global	sblk_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0, #34]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	mov	r5, r1
+	cbz	r3, .L1598
+	ldr	r3, .L1620
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L1598
+	mov	r2, r1
+	ldr	r1, [r0, #24]
+	ldr	r0, .L1620+4
+	bl	printf
+.L1598:
+	movs	r6, #0
+.L1599:
+	cbnz	r5, .L1610
+	mov	r0, r5
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1610:
+	ldrb	r7, [r4]	@ zero_extendqisi2
+	ldr	r10, [r4, #24]
+.L1600:
+	movs	r1, #1
+	mov	r0, r10
+	bl	queue_lun_state
+	mov	fp, r0
+	cbnz	r0, .L1601
+	cmp	r5, #1
+	beq	.L1602
+	ldr	r3, .L1620+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1603
+.L1602:
+	mov	r0, r4
+	bl	queue_prog_cmd
+.L1604:
+	ldr	r3, .L1620+12
+	add	r7, r7, r7, lsl #1
+	subs	r5, r5, #1
+	add	r4, r3, r7, lsl #4
+	b	.L1599
+.L1601:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1600
+.L1603:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ubfx	r2, r10, #21, #3
+	cmp	r3, #255
+	bne	.L1605
+	mov	r2, #478
+	ldr	r1, .L1620+16
+	ldr	r0, .L1620+20
+	bl	printf
+.L1606:
+	b	.L1606
+.L1605:
+	ldr	r0, .L1620+12
+	movs	r1, #48
+	mla	r3, r1, r3, r0
+	ldr	ip, [r3, #24]
+	ubfx	r3, ip, #21, #3
+	cmp	r2, r3
+	bne	.L1607
+	ldr	r3, .L1620+24
+	mov	r8, #1
+	ldrh	r1, [r3]
+	ldr	r3, .L1620+28
+	lsl	r2, r8, r1
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	rsb	r3, r1, #21
+	lsl	r3, r8, r3
+	subs	r2, r2, #1
+	uxth	r2, r2
+	subs	r0, r0, #1
+	subs	r3, r3, #1
+	ands	r3, r3, r0
+	and	lr, r2, r10
+	uxth	r3, r3
+	lsr	r10, r10, r1
+	lsr	r1, ip, r1
+	and	r10, r3, r10
+	ands	r1, r1, r3
+	and	r2, r2, ip
+	cmp	r10, r1
+	beq	.L1608
+	cmp	lr, r2
+	bne	.L1608
+	cmp	r6, r0
+	beq	.L1607
+	ldr	r3, [r4, #12]
+	movs	r0, #17
+	ldr	r2, [r4, #4]
+	add	r6, r6, r8
+	ldr	r1, [r4, #24]
+	bl	flash_start_page_prog
+	movs	r3, #8
+	strb	r8, [r4, #43]
+	strb	r3, [r4, #42]
+	movs	r3, #255
+	strb	r3, [r4]
+	mov	r1, r4
+	ldr	r0, .L1620+32
+	bl	buf_add_tail
+	b	.L1604
+.L1608:
+	mov	r0, r4
+	movs	r6, #0
+	bl	queue_prog_cmd
+	b	.L1604
+.L1607:
+	mov	r0, r4
+	mov	r6, fp
+	bl	queue_prog_cmd
+	b	.L1604
+.L1621:
+	.align	2
+.L1620:
+	.word	.LANCHOR22
+	.word	.LC58
+	.word	.LANCHOR23
+	.word	.LANCHOR36
+	.word	.LANCHOR126
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR90
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",%progbits
+	.align	1
+	.global	ftl_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_flush, %function
+ftl_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L1627
+	ldr	r5, .L1627+4
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	cbz	r1, .L1623
+	ldrb	r0, [r5]	@ zero_extendqisi2
+	ldr	r3, .L1627+8
+	add	r0, r0, r0, lsl #1
+	add	r0, r3, r0, lsl #4
+	bl	sblk_prog_page
+.L1623:
+	movs	r3, #255
+	strb	r3, [r5]
+	movs	r3, #0
+	strb	r3, [r4]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	movw	r0, #65535
+	pop	{r3, r4, r5, lr}
+	b	ftl_vpn_decrement
+.L1628:
+	.align	2
+.L1627:
+	.word	.LANCHOR89
+	.word	.LANCHOR127
+	.word	.LANCHOR36
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",%progbits
+	.align	1
+	.global	flash_prog_page_en
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	@ args = 8, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L1658
+	mov	r7, r0
+	mov	r5, r1
+	mov	r10, r2
+	ldrb	r6, [sp, #52]	@ zero_extendqisi2
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L1630
+	mov	r2, #480
+	ldr	r1, .L1658+4
+	ldr	r0, .L1658+8
+	bl	printf
+.L1631:
+	b	.L1631
+.L1630:
+	ldr	r3, .L1658+12
+	tst	r1, #50331648
+	ldrb	fp, [r3, r0]	@ zero_extendqisi2
+	bne	.L1642
+	ldr	r3, .L1658+16
+	ldr	r2, .L1658+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1633
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1642
+.L1633:
+	ldr	r3, .L1658+24
+	mov	r0, r5
+	str	r2, [sp, #12]
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mul	r3, r4, r0
+	mov	r1, r4
+	mov	r0, r5
+	str	r3, [sp, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L1634
+	add	r4, r3, r1, lsl #1
+.L1632:
+	ldr	r3, .L1658+28
+	ldr	r3, [r3]
+	lsls	r2, r3, #27
+	bpl	.L1635
+	mov	r2, r5
+	mov	r1, fp
+	ldr	r0, .L1658+32
+	bl	printf
+.L1635:
+	ldr	r3, [sp, #48]
+	mov	r0, fp
+	mov	r2, r10
+	mov	r1, r4
+	str	r3, [sp]
+	mov	r3, r8
+	bl	flash_prog_page
+	mov	fp, r0
+	cmp	r6, #0
+	beq	.L1636
+	ldr	r3, [sp, #48]
+	mov	r1, r5
+	ldr	r6, .L1658+36
+	mov	r0, r7
+	ldr	r4, .L1658+40
+	str	r3, [sp]
+	ldr	r3, [r6]
+	ldr	r2, [r4]
+	bl	flash_read_page_en
+	adds	r3, r0, #1
+	beq	.L1637
+	cmp	r0, #512
+	beq	.L1637
+	ldr	r3, [r4]
+	ldr	r2, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bne	.L1637
+	ldr	r3, [r6]
+	ldr	r2, [r8]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1636
+.L1637:
+	movs	r3, #4
+	ldr	r1, [r6]
+	mov	r2, r3
+	ldr	r0, .L1658+44
+	bl	rknand_print_hex
+	movs	r3, #4
+	ldr	r1, [r4]
+	mov	r2, r3
+	ldr	r0, .L1658+48
+	bl	rknand_print_hex
+.L1638:
+	mov	r1, r5
+	ldr	r0, .L1658+52
+	bl	printf
+	mov	r2, #506
+	ldr	r1, .L1658+4
+	ldr	r0, .L1658+8
+	bl	printf
+.L1640:
+	b	.L1640
+.L1634:
+	ldr	r2, .L1658+56
+	ldrh	r4, [r2, r1, lsl #1]
+	add	r4, r4, r3
+	b	.L1632
+.L1642:
+	mov	r4, r5
+	b	.L1632
+.L1636:
+	cmp	fp, #-1
+	beq	.L1638
+	mov	r0, fp
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1659:
+	.align	2
+.L1658:
+	.word	.LANCHOR8
+	.word	.LANCHOR128
+	.word	.LC0
+	.word	.LANCHOR10
+	.word	.LANCHOR11
+	.word	.LANCHOR12
+	.word	.LANCHOR13
+	.word	.LANCHOR22
+	.word	.LC59
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LC60
+	.word	.LC61
+	.word	.LC62
+	.word	.LANCHOR14
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",%progbits
+	.align	1
+	.global	ftl_test_block
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_test_block, %function
+ftl_test_block:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r3, .L1677
+	mov	r10, r0
+	ldr	fp, .L1677+32
+	str	r5, [r3]
+	ldr	r3, .L1677+4
+	str	r5, [r3]
+.L1661:
+	uxth	r3, r5
+	str	r3, [sp, #12]
+	ldr	r3, .L1677+8
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L1668
+	mov	r8, #0
+	b	.L1669
+.L1667:
+	ldr	r3, .L1677+12
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1662
+	mov	r1, r10
+	ldr	r0, .L1677+16
+	bl	printf
+.L1662:
+	ldrb	r4, [fp]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	smulbb	r4, r4, r10
+	add	r4, r4, r6
+	uxth	r4, r4
+	cbnz	r3, .L1663
+	ldr	r3, .L1677+20
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #47]	@ zero_extendqisi2
+	cmp	r3, r4
+	bcs	.L1664
+.L1663:
+	uxtb	r6, r5
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_check_bad_block
+	cbnz	r0, .L1664
+	ldr	r3, .L1677+24
+	mov	r0, r6
+	ldrh	r7, [r3]
+	muls	r7, r4, r7
+	mov	r1, r7
+	bl	flash_erase_block
+	cbz	r0, .L1666
+.L1676:
+	mov	r1, r4
+	mov	r0, r6
+	bl	flash_mask_bad_block
+	b	.L1664
+.L1666:
+	movs	r3, #1
+	ldr	r2, .L1677
+	str	r3, [sp, #4]
+	mov	r1, r7
+	ldr	r3, .L1677+28
+	mov	r0, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1677+4
+	bl	flash_prog_page_en
+	cmp	r0, #0
+	bne	.L1676
+.L1664:
+	add	r8, r8, #1
+.L1669:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	uxth	r6, r8
+	cmp	r3, r6
+	bhi	.L1667
+	adds	r5, r5, #1
+	b	.L1661
+.L1668:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1678:
+	.align	2
+.L1677:
+	.word	ftl_tmp_buffer
+	.word	.LANCHOR121
+	.word	.LANCHOR76
+	.word	.LANCHOR22
+	.word	.LC63
+	.word	.LANCHOR5
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LANCHOR70
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",%progbits
+	.align	1
+	.global	ftl_prog_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r7, r3
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	bl	sblk_wait_write_queue_completed
+	movs	r3, #1
+	mov	r2, r6
+	str	r3, [sp, #4]
+	mov	r1, r5
+	ldr	r3, [sp, #32]
+	mov	r0, r4
+	str	r3, [sp]
+	mov	r3, r7
+	bl	flash_prog_page_en
+	adds	r3, r0, #1
+	bne	.L1679
+	movw	r2, #1414
+	ldr	r1, .L1682
+	ldr	r0, .L1682+4
+	bl	printf
+.L1681:
+	b	.L1681
+.L1679:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L1683:
+	.align	2
+.L1682:
+	.word	.LANCHOR129
+	.word	.LC0
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, #0
+	ldr	r4, .L1721
+	movs	r1, #0
+	ldr	r6, .L1721+4
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	mov	fp, r4
+	str	r0, [sp, #12]
+	mov	r4, r6
+	ldr	r0, .L1721+8
+	lsls	r2, r2, #1
+	bl	ftl_memset
+.L1685:
+	ldr	r7, .L1721+12
+	ldr	r1, [sp, #12]
+	ldrb	r10, [r6]	@ zero_extendqisi2
+	ldrh	r3, [r7]
+	ldrh	r5, [r6, #2]
+	str	r3, [sp, #8]
+	ldr	r3, .L1721+16
+	ldr	r2, [r3]
+	ldr	r3, [r2, #4]
+	adds	r3, r3, #1
+	str	r3, [r2, #4]
+	ldr	r2, .L1721+8
+	stm	r2, {r1, r3}
+	ldr	r2, .L1721+20
+	ldr	r2, [r2]
+	lsls	r2, r2, #19
+	bpl	.L1686
+	mov	r2, r5
+	mov	r1, r10
+	ldr	r0, .L1721+24
+	bl	printf
+.L1686:
+	ldr	r3, .L1721+28
+	ldrh	r0, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1687
+	ldr	r2, .L1721+32
+	movs	r0, #0
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r5, [r2]
+	ldrb	r2, [r4]	@ zero_extendqisi2
+.L1694:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #7
+	bls	.L1688
+	add	lr, r5, #40
+	movs	r1, #0
+.L1693:
+	ldrb	r8, [lr], #1	@ zero_extendqisi2
+	uxth	ip, r1
+	cmp	r8, #128
+	bls	.L1689
+	cmp	r8, #255
+	beq	.L1690
+	strb	r3, [r4, #1]
+	cbz	r0, .L1691
+	strb	r2, [r4]
+.L1691:
+	movs	r2, #156
+	ldr	r1, .L1721+36
+	ldr	r0, .L1721+40
+	bl	printf
+.L1692:
+	b	.L1692
+.L1690:
+	adds	r1, r1, #1
+	cmp	r1, #8
+	bne	.L1693
+	mov	ip, r1
+.L1689:
+	uxtb	r3, ip
+	mov	r8, #1
+.L1688:
+	adds	r2, r5, r3
+	ldrb	r2, [r2, #40]	@ zero_extendqisi2
+	movs	r0, #1
+	cmp	r2, #255
+	beq	.L1694
+	ldrh	r5, [r7]
+	movs	r0, #0
+	strb	r3, [r4, #1]
+	strb	r2, [r4]
+	muls	r5, r2, r5
+	mov	r1, r5
+	bl	flash_erase_block
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r2, .L1721+44
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L1721+8
+	bl	ftl_prog_page
+	movs	r3, #1
+	add	r5, r5, r3
+	strh	r3, [r4, #2]	@ movhi
+.L1695:
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r2, .L1721+44
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L1721+8
+	bl	ftl_prog_page
+	ldrh	r3, [r4, #2]
+	adds	r0, r0, #1
+	add	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	beq	.L1685
+	cmp	r8, #0
+	bne	.L1696
+.L1704:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L1720
+	movs	r2, #191
+	ldr	r1, .L1721+36
+	ldr	r0, .L1721+40
+	bl	printf
+.L1705:
+	b	.L1705
+.L1687:
+	ldr	r3, [sp, #8]
+	mla	r5, r10, r3, r5
+	cmp	r0, #0
+	bne	.L1695
+	mov	r1, r5
+	bl	flash_erase_block
+	b	.L1695
+.L1696:
+	ldrb	r5, [r4, #1]	@ zero_extendqisi2
+	ldr	r6, .L1721+32
+	adds	r5, r5, #1
+.L1699:
+	cmp	r5, #7
+	bhi	.L1704
+	ldr	r3, [r6]
+	add	r3, r3, r5
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	uxth	r2, r3
+	cmp	r2, #128
+	bls	.L1700
+	cmp	r2, #255
+	beq	.L1701
+	movs	r2, #184
+	ldr	r1, .L1721+36
+	ldr	r0, .L1721+40
+	bl	printf
+.L1702:
+	b	.L1702
+.L1700:
+	ldr	r2, .L1721+12
+	movs	r0, #0
+	ldrh	r1, [r2]
+	muls	r1, r3, r1
+	bl	flash_erase_block
+.L1701:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L1699
+.L1720:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1722:
+	.align	2
+.L1721:
+	.word	.LANCHOR45
+	.word	.LANCHOR131
+	.word	.LANCHOR130
+	.word	.LANCHOR75
+	.word	.LANCHOR46
+	.word	.LANCHOR22
+	.word	.LC64
+	.word	.LANCHOR79
+	.word	.LANCHOR5
+	.word	.LANCHOR132
+	.word	.LC0
+	.word	ftl_info_data_buffer
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",%progbits
+	.align	1
+	.global	ftl_info_blk_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L1755
+	mov	r1, r4
+	mov	r2, #16384
+	ldr	r0, .L1755+4
+	strb	r4, [r3]
+	ldr	r3, .L1755+8
+	ldr	r5, .L1755+12
+	ldr	r6, .L1755+16
+	str	r0, [r3]
+	ldr	r3, .L1755+20
+	ldrh	r3, [r3]
+	add	r3, r0, r3, lsl #2
+	str	r3, [r5]
+	bl	ftl_memset
+	mov	r2, #16384
+	mov	r1, r4
+	ldr	r0, .L1755+24
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, .L1755+28
+	ldrb	r2, [r2, #40]	@ zero_extendqisi2
+	strb	r4, [r3, #1]
+	strh	r4, [r3, #2]	@ movhi
+	movs	r4, #7
+	strb	r2, [r3]
+	str	r3, [sp, #12]
+.L1725:
+	ldr	r3, [r6]
+	sxth	r8, r4
+	add	r3, r3, r4
+	ldrb	r7, [r3, #40]	@ zero_extendqisi2
+	cmp	r7, #255
+	bne	.L1724
+.L1729:
+	adds	r4, r4, #-1
+	bcs	.L1725
+	mov	r8, #0
+.L1726:
+	ldr	r3, .L1755+32
+	ldr	r3, [r3]
+	lsls	r1, r3, #19
+	bpl	.L1730
+	ldr	r3, [r5]
+	mov	r2, #4800
+	mov	r1, r4
+	ldr	r0, .L1755+36
+	ldr	r3, [r3]
+	bl	printf
+.L1730:
+	adds	r2, r4, #1
+	bne	.L1731
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L1755+4
+	bl	ftl_memset
+	ldr	r3, [r5]
+	mov	r0, r4
+	ldr	r2, .L1755+40
+	str	r2, [r3]
+.L1723:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1724:
+	ldr	r3, .L1755+44
+	movs	r0, #0
+	ldr	fp, .L1755+56
+	ldr	r2, .L1755+4
+	ldrh	r3, [r3]
+	muls	r7, r3, r7
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r1, r7
+	ldr	r3, .L1755+48
+	bl	ftl_read_page
+	cmp	r0, #-1
+	mov	r10, r0
+	bne	.L1727
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	adds	r1, r7, #1
+	ldr	r2, .L1755+4
+	movs	r0, #0
+	str	r3, [sp]
+	ldr	r3, .L1755+48
+	bl	ftl_read_page
+	mov	r10, r0
+.L1727:
+	ldr	r3, .L1755+32
+	ldr	r3, [r3]
+	lsls	r0, r3, #19
+	bpl	.L1728
+	ldr	r3, [r5]
+	mov	r2, r10
+	mov	r1, r4
+	ldr	r0, .L1755+52
+	ldr	r3, [r3]
+	str	r3, [sp]
+	movs	r3, #64
+	bl	printf
+.L1728:
+	cmp	r10, #-1
+	beq	.L1729
+	ldr	r3, [r5]
+	ldr	r2, .L1755+40
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L1729
+	mov	r4, r8
+	b	.L1726
+.L1731:
+	ldr	r3, [r6]
+	movs	r0, #0
+	ldr	r2, .L1755+4
+	movs	r4, #0
+	ldr	r10, .L1755+40
+	add	r3, r3, r8
+	ldrb	r1, [r3, #40]	@ zero_extendqisi2
+	ldr	r3, [sp, #12]
+	strb	r8, [r3, #1]
+	strb	r1, [r3]
+	movs	r3, #4
+	str	r3, [sp]
+	ldr	r3, .L1755+48
+	bl	flash_get_last_written_page
+	uxth	r6, r0
+	mov	r7, r0
+	adds	r3, r6, #1
+	uxth	r8, r3
+	ldr	r3, [sp, #12]
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1755+44
+	ldrh	r3, [r3]
+	mul	fp, r3, fp
+.L1733:
+	subs	r3, r6, r4
+	lsls	r3, r3, #16
+	bmi	.L1738
+	ldr	r3, .L1755+56
+	add	r1, r7, fp
+	ldr	r2, .L1755+4
+	subs	r1, r1, r4
+	movs	r0, #0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp]
+	ldr	r3, .L1755+48
+	bl	ftl_read_page
+	adds	r0, r0, #1
+	beq	.L1734
+	ldr	r3, [r5]
+	ldr	r3, [r3]
+	cmp	r3, r10
+	bne	.L1734
+.L1738:
+	ldr	r3, [sp, #12]
+	strh	r8, [r3, #2]	@ movhi
+	ldr	r3, [r5]
+	ldr	r2, [r3, #16]
+	cmp	r2, #2048
+	bhi	.L1735
+.L1736:
+	ldr	r2, [r3, #24]
+	cmp	r2, #2048
+	bls	.L1739
+	ldr	r1, [r3, #28]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #24]
+	str	r1, [r3, #28]
+.L1739:
+	ldr	r2, [r3, #32]
+	cmp	r2, #1024
+	bls	.L1740
+	ldr	r1, [r3, #36]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #32]
+	str	r1, [r3, #36]
+.L1740:
+	ldr	r2, [r3, #40]
+	cmp	r2, #1024
+	bls	.L1741
+	ldr	r1, [r3, #44]
+	add	r1, r1, r2, lsr #10
+	ubfx	r2, r2, #0, #10
+	str	r2, [r3, #40]
+	str	r1, [r3, #44]
+.L1741:
+	ldr	r2, [r3, #64]
+	movs	r0, #0
+	adds	r2, r2, #1
+	str	r2, [r3, #64]
+	bl	ftl_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	movs	r0, #0
+	b	.L1723
+.L1734:
+	adds	r4, r4, #1
+	b	.L1733
+.L1735:
+	ldr	r1, [r3, #20]
+	add	r1, r1, r2, lsr #11
+	ubfx	r2, r2, #0, #11
+	str	r2, [r3, #16]
+	str	r1, [r3, #20]
+	b	.L1736
+.L1756:
+	.align	2
+.L1755:
+	.word	.LANCHOR133
+	.word	ftl_info_data_buffer
+	.word	.LANCHOR57
+	.word	.LANCHOR46
+	.word	.LANCHOR5
+	.word	.LANCHOR54
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR131
+	.word	.LANCHOR22
+	.word	.LC66
+	.word	1229739078
+	.word	.LANCHOR75
+	.word	.LANCHOR130
+	.word	.LC65
+	.word	.LANCHOR45
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1771
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, [r3]
+	ldr	r2, [r3, #520]
+	cbz	r2, .L1758
+	movs	r2, #0
+	str	r2, [r3, #520]
+.L1758:
+	ldr	r5, .L1771+4
+	movs	r0, #0
+	bl	ftl_total_vpn_update
+	mov	r4, r5
+.L1767:
+	ldr	r3, [r5]
+	ldr	r2, [r3, #56]
+	adds	r2, r2, #1
+	str	r2, [r3, #56]
+	ldrh	r2, [r3, #140]
+	ldr	r3, .L1771+8
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1759
+	bl	ftl_ext_alloc_new_blk
+.L1759:
+	ldr	r0, [r4]
+	movw	r3, #65535
+	ldrh	r1, [r0, #130]
+	cmp	r1, r3
+	bne	.L1760
+	mov	r2, #1048
+	ldr	r1, .L1771+12
+	ldr	r0, .L1771+16
+	bl	printf
+.L1761:
+	b	.L1761
+.L1760:
+	ldr	r3, .L1771+20
+	movs	r7, #0
+	ldr	fp, .L1771+32
+	ldr	r10, .L1771+36
+	ldrh	r3, [r3]
+	rsb	r2, r3, #21
+	movs	r3, #1
+	asr	r6, r1, r2
+	lsls	r3, r3, r2
+	ldr	r2, .L1771+24
+	subs	r3, r3, #1
+	ands	r3, r3, r1
+	movs	r1, #0
+	ldrh	r8, [r2]
+	ldrh	r2, [r0, #140]
+	mov	r0, r10
+	smlabb	r3, r8, r3, r2
+	ldrb	r2, [fp]	@ zero_extendqisi2
+	uxth	r8, r3
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r3, [r4]
+	mov	r1, r8
+	ldr	r2, .L1771+28
+	uxtb	r0, r6
+	str	r7, [r10]
+	ldr	r3, [r3, #56]
+	str	r3, [r10, #4]
+	ldrb	r3, [fp]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r10
+	bl	ftl_prog_page
+	ldr	r2, [r4]
+	ldrh	r3, [r2, #140]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	strh	r3, [r2, #140]	@ movhi
+	beq	.L1767
+	adds	r0, r0, #1
+	beq	.L1767
+	mov	r0, r7
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1772:
+	.align	2
+.L1771:
+	.word	.LANCHOR60
+	.word	.LANCHOR46
+	.word	.LANCHOR79
+	.word	.LANCHOR134
+	.word	.LC0
+	.word	.LANCHOR71
+	.word	.LANCHOR75
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR45
+	.word	.LANCHOR130
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",%progbits
+	.align	1
+	.global	ftl_ext_info_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #0
+	ldr	r3, .L1790
+	ldr	r5, .L1790+4
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L1790+8
+	ldr	r3, [r5]
+	mov	r10, r5
+	ldrh	r4, [r3, #130]
+	ldr	r3, .L1790+12
+	ubfx	r8, r4, #0, #14
+	ldrh	r3, [r3]
+	mov	r1, r8
+	rsb	r3, r3, #21
+	asrs	r4, r4, r3
+	movs	r3, #4
+	str	r3, [sp]
+	uxtb	r4, r4
+	ldr	r3, .L1790+16
+	mov	r0, r4
+	bl	flash_get_last_written_page
+	ldr	r3, .L1790+20
+	mov	r6, r0
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L1774
+	mov	r3, r0
+	movw	r2, #1091
+	ldr	r1, .L1790+24
+	ldr	r0, .L1790+28
+	bl	printf
+.L1774:
+	ldr	fp, .L1790+48
+	movs	r7, #0
+.L1775:
+	uxth	r5, r6
+	subs	r3, r5, r7
+	lsls	r3, r3, #16
+	bmi	.L1780
+	ldr	r3, .L1790+32
+	subs	r1, r6, r7
+	ldr	r2, .L1790+8
+	ldrh	r0, [r3]
+	ldr	r3, .L1790+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mla	r1, r8, r0, r1
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r3, .L1790+16
+	bl	flash_read_page_en
+	adds	r2, r0, #1
+	beq	.L1776
+	cmp	r0, #512
+	beq	.L1776
+	ldr	r3, .L1790+40
+	ldr	r3, [r3]
+	ldr	r3, [r3]
+	cmp	r3, fp
+	bne	.L1776
+.L1780:
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #140]
+	cmp	r2, r6
+	bgt	.L1778
+	adds	r5, r5, #1
+	strh	r5, [r3, #140]	@ movhi
+	bl	ftl_ext_info_flush
+.L1778:
+	ldr	r3, .L1790+40
+	movs	r0, #0
+	movw	r2, #65535
+	ldr	r3, [r3]
+	str	r0, [r3, #520]
+	ldr	r3, .L1790+44
+	strh	r2, [r3]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1776:
+	adds	r7, r7, #1
+	b	.L1775
+.L1791:
+	.align	2
+.L1790:
+	.word	.LANCHOR86
+	.word	.LANCHOR46
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR71
+	.word	.LANCHOR130
+	.word	.LANCHOR22
+	.word	.LANCHOR135
+	.word	.LC28
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LANCHOR60
+	.word	.LANCHOR87
+	.word	1162432070
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format,"ax",%progbits
+	.align	1
+	.global	ftl_low_format
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_low_format, %function
+ftl_low_format:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #8
+	ldr	r5, .L1829
+	sub	sp, sp, #40
+.L1796:
+	ldr	r3, [r5]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #32]	@ zero_extendqisi2
+	cmp	r3, #128
+	ble	.L1793
+	cmp	r3, #255
+	beq	.L1794
+	movw	r2, #1228
+	ldr	r1, .L1829+4
+	ldr	r0, .L1829+8
+	bl	printf
+.L1795:
+	b	.L1795
+.L1793:
+	ldr	r2, .L1829+12
+	movs	r0, #0
+	ldrh	r1, [r2]
+	muls	r1, r3, r1
+	bl	flash_erase_block
+.L1794:
+	adds	r4, r4, #1
+	cmp	r4, #16
+	bne	.L1796
+	ldr	r4, .L1829+16
+	mov	r10, #0
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L1829+20
+	bl	ftl_memset
+	ldr	r3, [r4]
+	ldr	r2, .L1829+24
+	str	r2, [r3]
+.L1797:
+	ldr	r3, .L1829+28
+	uxth	r0, r10
+	ldr	r6, .L1829+32
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L1804
+	ldr	r7, .L1829+36
+	mov	r2, #16384
+	movs	r1, #0
+	ldr	r0, .L1829+40
+	bl	ftl_memset
+	ldr	r3, [r7]
+	ldr	r2, .L1829+44
+	str	r2, [r3]
+	ldr	r3, .L1829+48
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1829
+	mov	r1, r8
+	ldr	r3, [r3]
+	ldrb	r0, [r3, #47]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	ip, [r6]
+	uxtb	r0, r0
+	cmp	r8, #1
+	str	r7, [sp, #8]
+	add	r5, r0, #1
+	mov	r3, #0
+	ite	eq
+	moveq	r0, #1
+	movne	r0, #3
+.L1805:
+	add	r1, ip, r3, lsl #2
+	adds	r3, r3, #1
+	ldrb	r2, [r1, #2]	@ zero_extendqisi2
+	strb	r0, [r1, #3]
+	orn	r2, r2, #31
+	bfc	r2, #3, #2
+	strb	r2, [r1, #2]
+	uxth	r2, r3
+	cmp	r5, r2
+	bhi	.L1805
+	mov	r1, r8
+	movs	r0, #16
+	bl	__aeabi_idiv
+	ldr	r3, [r4]
+	add	r0, r0, r5
+	uxth	r0, r0
+	strh	r0, [r3, #134]	@ movhi
+	ldr	r3, .L1829+52
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L1806
+	str	r0, [sp]
+	mov	r3, r5
+	movs	r2, #128
+	movw	r1, #1265
+	ldr	r0, .L1829+56
+	bl	printf
+.L1806:
+	ldr	r0, [r4]
+	movs	r2, #128
+	movs	r1, #255
+	adds	r0, r0, #160
+	bl	ftl_memset
+	ldr	r3, [r6]
+	ldr	r0, [r4]
+	str	r3, [sp, #24]
+	ldr	r3, .L1829+60
+	ldrh	ip, [r0, #134]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	ldr	r3, .L1829+48
+	ldrb	fp, [r3]	@ zero_extendqisi2
+	uxth	r3, fp
+	str	r3, [sp, #16]
+	ldrh	r3, [sp, #16]
+	smulbb	r2, r5, r3
+	ldr	r3, .L1829+64
+	ldrh	r1, [r3]
+	uxth	r2, r2
+	str	r3, [sp, #36]
+	rsb	r6, r1, #21
+	movs	r1, #1
+	lsls	r1, r1, r6
+	movs	r6, #0
+	uxth	r1, r1
+	str	r1, [sp, #32]
+.L1807:
+	cmp	r5, ip
+	bcc	.L1813
+	ldr	r3, .L1829+28
+	mov	r2, ip
+	mov	lr, #1
+	ldrh	r1, [r3]
+	ldr	r3, [sp, #24]
+	add	r3, r3, ip, lsl #2
+.L1814:
+	cmp	r2, r1
+	bcc	.L1815
+	sub	ip, r1, ip
+	movs	r5, #0
+	strh	ip, [r0, #116]	@ movhi
+	strh	r6, [r0, #112]	@ movhi
+	strh	r5, [r0, #114]	@ movhi
+	strh	r5, [r0, #118]	@ movhi
+	movs	r0, #1
+	bl	ftl_alloc_sblk
+	mov	r1, r5
+	mov	r6, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r4]
+	mov	r0, r6
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r0, [r4]
+	movw	r2, #65533
+	ldrh	r8, [r0, #672]
+	strh	r5, [r0, #690]	@ movhi
+	add	r3, r8, #-1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L1816
+	movw	r2, #1297
+	ldr	r1, .L1829+4
+	ldr	r0, .L1829+8
+	bl	printf
+.L1817:
+	b	.L1817
+.L1804:
+	ldr	r3, .L1829+68
+	strh	r0, [r3]	@ movhi
+	bl	ftl_test_block
+	ldr	r3, .L1829+60
+	uxth	r1, r10
+	ldr	r5, [r6]
+	movs	r6, #0
+	mov	fp, r6
+	mov	r7, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r5, r5, r1, lsl #2
+	str	r3, [sp, #8]
+	ldr	r3, .L1829+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	uxth	r2, r3
+	str	r2, [sp, #12]
+	mul	r2, r3, r1
+.L1798:
+	ldr	r0, [sp, #8]
+	uxth	r1, fp
+	cmp	r0, r1
+	bhi	.L1818
+	cbnz	r7, .L1803
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, #224
+	strb	r3, [r5, #2]
+.L1803:
+	add	r10, r10, #1
+	b	.L1797
+.L1801:
+	add	r1, r8, r2
+	ldr	r0, [sp, #16]
+	str	r3, [sp, #24]
+	str	r2, [sp, #20]
+	bl	flash_check_bad_block
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #24]
+	cbz	r0, .L1799
+	ldrb	r0, [r5, #3]	@ zero_extendqisi2
+	movs	r1, #1
+	lsl	r1, r1, r8
+	orrs	r1, r1, r0
+	strb	r1, [r5, #3]
+.L1800:
+	add	r8, r8, #1
+.L1802:
+	sub	r1, r8, r6
+	ldr	r0, [sp, #12]
+	uxth	r1, r1
+	cmp	r0, r1
+	bhi	.L1801
+	add	fp, fp, #1
+	add	r6, r6, r3
+	subs	r2, r2, r3
+	b	.L1798
+.L1799:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	b	.L1800
+.L1818:
+	uxtb	r1, fp
+	mov	r8, r6
+	str	r1, [sp, #16]
+	b	.L1802
+.L1813:
+	ldr	r3, [sp, #24]
+	add	r3, r3, r5, lsl #2
+	str	r3, [sp, #12]
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	orn	r3, r3, #31
+	bfc	r3, #3, #2
+	strb	r3, [r1, #2]
+	movs	r1, #0
+	mov	r8, r1
+	str	r1, [sp, #20]
+.L1808:
+	ldrh	r3, [sp, #20]
+	ldr	r7, [sp, #28]
+	cmp	r7, r3
+	bhi	.L1820
+	ldr	r3, [sp, #16]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	add	r2, r2, r3
+	uxth	r2, r2
+	b	.L1807
+.L1811:
+	ldr	r7, [sp, #12]
+	ldrb	r10, [r7, #3]	@ zero_extendqisi2
+	add	r7, lr, r8
+	asr	r10, r10, r7
+	tst	r10, #1
+	bne	.L1809
+	cmp	fp, #1
+	add	r10, r6, #80
+	it	hi
+	andhi	r3, r3, #1
+	add	r6, r6, #1
+	it	hi
+	addhi	r3, r3, r2
+	uxth	r6, r6
+	ite	hi
+	uxthhi	r3, r3
+	movls	r3, r2
+	add	r3, r3, r1
+	strh	r3, [r0, r10, lsl #1]	@ movhi
+.L1809:
+	add	lr, lr, #1
+.L1812:
+	ldr	r7, [sp, #16]
+	uxth	r3, lr
+	cmp	r3, r7
+	bcc	.L1811
+	ldr	r3, [sp, #20]
+	add	r8, r8, fp
+	adds	r3, r3, #1
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #32]
+	add	r1, r1, r3
+	uxth	r1, r1
+	b	.L1808
+.L1820:
+	mov	lr, #0
+	b	.L1812
+.L1815:
+	ldrb	r5, [r3, #2]	@ zero_extendqisi2
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r3, #4
+	and	r5, r5, #31
+	bfi	r5, lr, #3, #2
+	strb	r5, [r3, #-2]
+	b	.L1814
+.L1830:
+	.align	2
+.L1829:
+	.word	.LANCHOR5
+	.word	.LANCHOR136
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR46
+	.word	ftl_info_data_buffer
+	.word	1229739078
+	.word	.LANCHOR54
+	.word	.LANCHOR57
+	.word	.LANCHOR60
+	.word	ftl_ext_info_data_buffer
+	.word	1162432070
+	.word	.LANCHOR70
+	.word	.LANCHOR22
+	.word	.LC67
+	.word	.LANCHOR76
+	.word	.LANCHOR71
+	.word	.LANCHOR53
+.L1816:
+	strh	r5, [r0, #696]	@ movhi
+	movs	r1, #255
+	mov	r2, #256
+	add	r0, r0, #416
+	bl	ftl_memset
+	ldr	r2, [sp, #36]
+	ldr	r3, [r4]
+	ldrh	r2, [r2]
+	strh	r8, [r3, #692]	@ movhi
+	strh	r6, [r3, #416]	@ movhi
+	rsb	r2, r2, #21
+	asr	r2, r8, r2
+	strh	r2, [r3, #694]	@ movhi
+	movs	r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	ldr	r2, .L1831
+	ldrh	r2, [r2]
+	strh	r2, [r3, #698]	@ movhi
+	bl	ftl_alloc_sys_blk
+	mov	r1, r5
+	mov	r6, r0
+	bl	ftl_erase_phy_blk
+	ldr	r3, [r4]
+	movs	r1, #2
+	strh	r6, [r3, #130]	@ movhi
+	ldr	r3, [sp, #8]
+	ldr	r0, [r3]
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_init
+	ldr	r3, [sp, #8]
+	movs	r1, #3
+	ldr	r0, [r3]
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [sp, #8]
+	movs	r1, #255
+	ldr	r0, [r3]
+	ldr	r3, [r4]
+	adds	r0, r0, #136
+	ldrh	r2, [r3, #134]
+	strh	r5, [r0, #-12]	@ movhi
+	strh	r5, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r0, #-56]	@ movhi
+	strh	r2, [r0, #-6]	@ movhi
+	mov	r2, #-1
+	strh	r5, [r0, #-14]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	bl	ftl_memset
+	ldr	r3, [sp, #8]
+	movs	r2, #128
+	movs	r1, #255
+	ldr	r0, [r3]
+	add	r0, r0, #392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	r0, r5
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r5
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1832:
+	.align	2
+.L1831:
+	.word	.LANCHOR137
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format_test,"ax",%progbits
+	.align	1
+	.global	ftl_re_low_format_test
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_re_low_format_test, %function
+ftl_re_low_format_test:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r1, #1
+	ldr	r5, .L1841
+	ldr	r0, .L1841+4
+	bl	printf
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	r2, .L1841+8
+	ldr	r3, [r5]
+	ldr	r6, .L1841+12
+	ldr	r0, [r2]
+	movs	r2, #0
+	ldrh	r1, [r3, #134]
+	mov	r7, r2
+	ldrh	lr, [r6]
+	mov	ip, r2
+	add	r0, r0, r1, lsl #2
+.L1834:
+	cmp	r1, lr
+	bcc	.L1838
+	movs	r4, #0
+	strh	r7, [r3, #118]	@ movhi
+	strh	r2, [r3, #116]	@ movhi
+	movs	r0, #1
+	strh	ip, [r3, #114]	@ movhi
+	strh	r4, [r3, #122]	@ movhi
+	strh	r4, [r3, #120]	@ movhi
+	strh	r4, [r3, #124]	@ movhi
+	bl	ftl_alloc_sblk
+	mov	r1, r4
+	mov	r8, r0
+	bl	ftl_erase_sblk
+	ldr	r1, [r5]
+	mov	r0, r8
+	add	r1, r1, #672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r0, [r5]
+	movw	r2, #65533
+	ldrh	r7, [r0, #672]
+	strh	r4, [r0, #690]	@ movhi
+	subs	r3, r7, #1
+	uxth	r3, r3
+	cmp	r3, r2
+	bls	.L1839
+	movw	r2, #1366
+	ldr	r1, .L1841+16
+	ldr	r0, .L1841+20
+	bl	printf
+.L1840:
+	b	.L1840
+.L1838:
+	ldrb	r4, [r0, #2]	@ zero_extendqisi2
+	bfc	r4, #5, #3
+	strb	r4, [r0, #2]
+	ands	r4, r4, #24
+	bne	.L1835
+	add	ip, ip, #1
+	uxth	ip, ip
+.L1836:
+	adds	r1, r1, #1
+	uxth	r1, r1
+	adds	r0, r0, #4
+	b	.L1834
+.L1835:
+	cmp	r4, #16
+	itete	eq
+	addeq	r7, r7, #1
+	addne	r2, r2, #1
+	uxtheq	r7, r7
+	uxthne	r2, r2
+	b	.L1836
+.L1839:
+	strh	r4, [r0, #696]	@ movhi
+	mov	r2, #256
+	movs	r1, #255
+	add	r0, r0, #416
+	bl	ftl_memset
+	ldr	r0, [r5]
+	mov	r1, r4
+	mov	r2, #4096
+	add	r0, r0, #704
+	bl	ftl_memset
+	ldr	r3, [r5]
+	lsrs	r2, r7, #14
+	ubfx	r7, r7, #0, #14
+	mov	r1, r4
+	strh	r2, [r3, #694]	@ movhi
+	movs	r2, #1
+	strh	r2, [r3, #688]	@ movhi
+	ldr	r2, .L1841+24
+	strh	r7, [r3, #692]	@ movhi
+	strh	r8, [r3, #416]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #698]	@ movhi
+	ldrh	r2, [r6]
+	ldr	r3, .L1841+28
+	ldr	r6, .L1841+32
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r0, [r6]
+	movs	r1, #2
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_init
+	ldr	r0, [r6]
+	movs	r1, #3
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_init
+	ldr	r3, [r5]
+	movs	r1, #255
+	ldr	r0, [r6]
+	ldrh	r2, [r3, #134]
+	adds	r0, r0, #136
+	strh	r4, [r0, #-12]	@ movhi
+	strh	r4, [r0, #-16]	@ movhi
+	strh	r2, [r0, #-10]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r0, #-56]	@ movhi
+	strh	r2, [r0, #-6]	@ movhi
+	mov	r2, #-1
+	strh	r4, [r0, #-14]	@ movhi
+	str	r2, [r0, #408]
+	strh	r2, [r3, #126]	@ movhi
+	mov	r2, #256
+	bl	ftl_memset
+	ldr	r0, [r6]
+	movs	r2, #128
+	movs	r1, #255
+	add	r0, r0, #392
+	bl	ftl_memset
+	ldr	r3, [r6]
+	str	r4, [r3, #520]
+	str	r4, [r3, #524]
+	str	r4, [r3, #528]
+	bl	ftl_ext_info_flush
+	mov	r0, r4
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1842:
+	.align	2
+.L1841:
+	.word	.LANCHOR46
+	.word	.LC68
+	.word	.LANCHOR57
+	.word	.LANCHOR54
+	.word	.LANCHOR138
+	.word	.LC0
+	.word	.LANCHOR137
+	.word	.LANCHOR56
+	.word	.LANCHOR60
+	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	.section	.text.ftl_prog_ppa_page,"ax",%progbits
+	.align	1
+	.global	ftl_prog_ppa_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, lr}
+	str	r3, [sp]
+	mov	r3, r2
+	mov	r2, r1
+	ubfx	r1, r0, #0, #21
+	ubfx	r0, r0, #21, #3
+	bl	ftl_prog_page
+	add	sp, sp, #12
+	@ sp needed
+	ldr	pc, [sp], #4
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",%progbits
+	.align	1
+	.global	ftl_write_last_log_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldrh	r3, [r0, #6]
+	cmp	r3, #1
+	bne	.L1846
+	ldr	r3, .L1848
+	ldrh	r7, [r0, #12]
+	ldr	r4, [r3]
+	bl	ftl_get_new_free_page
+	adds	r3, r0, #1
+	mov	r6, r0
+	beq	.L1847
+	ldrh	r0, [r5]
+	add	r4, r4, r7, lsl #2
+	ldr	r5, .L1848+4
+	bl	ftl_vpn_decrement
+	ldr	r3, .L1848+8
+	mov	r0, r4
+	ldr	r2, .L1848+12
+	str	r3, [r5]
+	ldr	r3, .L1848+16
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	muls	r1, r3, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r3, .L1848+20
+	mov	r2, r5
+	str	r0, [r5, #4]
+	mov	r1, r4
+	mov	r0, r6
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+.L1847:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1846:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1849:
+	.align	2
+.L1848:
+	.word	.LANCHOR82
+	.word	.LANCHOR121
+	.word	-178307901
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.word	.LANCHOR45
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",%progbits
+	.align	1
+	.global	ftl_open_sblk_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1922
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	mov	r4, r0
+	str	r1, [sp, #52]
+	mov	r10, r3
+	ldr	r2, [r3]
+	tst	r2, #4096
+	beq	.L1851
+	ldrh	r1, [r0, #2]
+	ldr	r0, .L1922+4
+	bl	printf
+.L1851:
+	ldr	r3, [r10]
+	lsls	r0, r3, #19
+	bpl	.L1852
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldr	r0, .L1922+8
+	bl	printf
+.L1852:
+	ldr	r3, [r10]
+	lsls	r1, r3, #19
+	bpl	.L1853
+	ldrh	r1, [r4]
+	ldr	r0, .L1922+12
+	bl	printf
+.L1853:
+	ldr	r3, [r10]
+	lsls	r2, r3, #19
+	bpl	.L1854
+	ldrh	r2, [r4, #18]
+	ldrh	r1, [r4, #16]
+	ldr	r0, .L1922+16
+	bl	printf
+.L1854:
+	ldrh	r3, [r4, #10]
+	movs	r0, #1
+	strh	r3, [r4, #14]	@ movhi
+	bl	buf_alloc
+	ldrh	r3, [r4, #2]
+	mov	r5, r0
+	ldrb	fp, [r4, #5]	@ zero_extendqisi2
+	str	r3, [sp, #44]
+	movs	r3, #0
+	str	r3, [sp, #48]
+.L1855:
+	ldr	r3, .L1922+20
+	ldr	r2, [sp, #44]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bhi	.L1870
+.L1858:
+	ldrh	r3, [sp, #44]
+	movs	r7, #0
+	ldr	r6, .L1922+24
+	mov	r2, r7
+	ldrh	r0, [r4, #10]
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r3, [r6]
+	strb	fp, [r4, #5]
+.L1871:
+	cmp	r2, r0
+	bcc	.L1873
+	ldr	r2, .L1922+20
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	ldr	r8, .L1922+72
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
+	subs	r3, r3, r0
+	add	r7, r7, r3
+	ldr	r3, [r10]
+	uxth	r7, r7
+	tst	r3, #4096
+	beq	.L1874
+	ldrh	r1, [r4]
+	mov	r2, r7
+	ldr	r3, [r8]
+	ldr	r0, .L1922+28
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L1874:
+	ldrh	r2, [r4]
+	mov	r0, r5
+	ldr	r3, [r8]
+	ldr	fp, .L1922+76
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	movs	r7, #0
+	bl	buf_free
+.L1875:
+	ldr	r3, .L1922+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r7, r3, lsl #1
+	bcc	.L1878
+	ldr	r3, .L1922+20
+	ldrh	r2, [r4, #12]
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r6]
+	add	r3, r3, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	beq	.L1879
+	movw	r2, #811
+	ldr	r1, .L1922+36
+	ldr	r0, .L1922+40
+	bl	printf
+.L1880:
+	b	.L1880
+.L1870:
+	ldrb	fp, [r4, #5]	@ zero_extendqisi2
+.L1856:
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	cmp	r3, fp
+	bhi	.L1869
+	movs	r3, #0
+	strb	r3, [r4, #5]
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #44]
+	b	.L1855
+.L1869:
+	add	r3, fp, #8
+	ldrh	r8, [r4, r3, lsl #1]
+	movw	r3, #65535
+	cmp	r8, r3
+	beq	.L1857
+	ldr	r3, .L1922+44
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldrh	r6, [r3]
+	ldr	r3, [sp, #44]
+	mla	r6, r8, r6, r3
+	ldr	r3, .L1922+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r6
+	bl	ftl_read_ppa_page
+	cmp	r0, #512
+	mov	r7, r0
+	beq	.L1858
+	ldr	r3, [r10]
+	lsls	r3, r3, #19
+	bpl	.L1859
+	ldr	r2, [r5, #12]
+	ldr	r3, [r5, #4]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, r8
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [sp, #44]
+	str	r0, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	ldr	r0, .L1922+52
+	bl	printf
+.L1859:
+	ldr	r3, .L1922+56
+	mov	r8, #1
+	ldr	r2, [sp, #44]
+	ldrh	r1, [r4, #10]
+	strb	r8, [r3]
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mla	r2, r3, r2, fp
+	cmp	r1, r2
+	beq	.L1860
+	movw	r2, #707
+	ldr	r1, .L1922+36
+	ldr	r0, .L1922+40
+	bl	printf
+.L1861:
+	b	.L1861
+.L1860:
+	ldrh	r2, [r4, #6]
+	add	r2, r2, r1
+	ldr	r1, .L1922+20
+	ldrh	r1, [r1]
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1862
+	mov	r2, #708
+	ldr	r1, .L1922+36
+	ldr	r0, .L1922+40
+	bl	printf
+.L1863:
+	b	.L1863
+.L1862:
+	adds	r7, r7, #1
+	beq	.L1865
+	ldr	r7, [r5, #12]
+	ldr	r0, [r7, #4]
+	adds	r6, r0, #1
+	beq	.L1865
+	bl	lpa_hash_get_ppa
+	ldr	r3, [sp, #52]
+	mov	r6, r0
+	cmp	r3, #0
+	beq	.L1867
+	ldr	r3, [r7, #8]
+	cmp	r0, r3
+	beq	.L1867
+	adds	r1, r0, #1
+	beq	.L1867
+	ldr	r3, .L1922+60
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsl	r8, r8, r3
+	ldr	r3, .L1922+64
+	lsr	r0, r6, r0
+	add	r8, r8, #-1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	and	r0, r8, r0
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #52]
+	uxth	r0, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L1867
+	ldr	r8, [r7]
+	mov	r0, r6
+	ldr	r7, .L1922+68
+	ldr	r3, .L1922+48
+	ldr	r1, [r5, #4]
+	mov	r2, r7
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r3, [r7]
+	cmp	r8, r3
+	bhi	.L1867
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #8]
+	adds	r2, r0, #1
+	beq	.L1865
+	ldr	r3, .L1922+60
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r1, r2, #21
+	lsls	r3, r3, r1
+	lsrs	r0, r0, r2
+	ldr	r2, .L1922+64
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L1865:
+	ldrh	r3, [r4, #6]
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #10]
+	adds	r3, r3, #1
+	strh	r3, [r4, #10]	@ movhi
+	movs	r3, #1
+	str	r3, [sp, #48]
+.L1857:
+	add	fp, fp, #1
+	uxth	fp, fp
+	b	.L1856
+.L1873:
+	ldrh	r1, [r4, #12]
+	add	r1, r1, r2
+	adds	r2, r2, #1
+	ldr	r1, [r3, r1, lsl #2]
+	adds	r1, r1, #1
+	itt	ne
+	addne	r7, r7, #1
+	uxthne	r7, r7
+	b	.L1871
+.L1923:
+	.align	2
+.L1922:
+	.word	.LANCHOR22
+	.word	.LC69
+	.word	.LC70
+	.word	.LC71
+	.word	.LC72
+	.word	.LANCHOR79
+	.word	.LANCHOR82
+	.word	.LC74
+	.word	.LANCHOR69
+	.word	.LANCHOR139
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LC73
+	.word	.LANCHOR133
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR130
+	.word	.LANCHOR56
+	.word	.LANCHOR46
+.L1878:
+	ldr	r3, [sp, #48]
+	cbz	r3, .L1876
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bls	.L1876
+	mov	r0, r4
+	bl	ftl_get_new_free_page
+	ldr	r3, [r10]
+	mov	r8, r0
+	lsls	r3, r3, #19
+	bpl	.L1877
+	mov	r1, r0
+	ldr	r0, .L1924
+	bl	printf
+.L1877:
+	ldr	r3, [fp]
+	mov	r0, r8
+	ldr	r2, [r5, #12]
+	ldr	r1, [r5, #4]
+	ldr	r3, [r3, #8]
+	str	r3, [r2]
+	mov	r3, #-1
+	str	r3, [r2, #4]
+	str	r3, [r2, #8]
+	movs	r3, #0
+	str	r3, [r2, #12]
+	str	r3, [r1]
+	ldr	r3, .L1924+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_prog_ppa_page
+	ldrh	r0, [r4]
+	bl	ftl_vpn_decrement
+.L1876:
+	adds	r7, r7, #1
+	b	.L1875
+.L1879:
+	ldrh	r3, [r4, #6]
+	cmp	r3, #1
+	bne	.L1850
+	mov	r0, r4
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	ftl_write_last_log_page
+.L1867:
+	ldr	r0, [r5, #12]
+	ldr	r3, .L1924+8
+	ldr	r2, [r0, #4]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bcs	.L1865
+	ldr	r3, .L1924+12
+	ldrb	r1, [r4, #9]	@ zero_extendqisi2
+	ldrh	r2, [r4, #10]
+	ldrh	r3, [r3]
+	muls	r3, r1, r3
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L1865
+	ldr	r3, .L1924+16
+	ldr	r6, [r0]
+	ldr	r3, [r3]
+	ldr	r1, [r3, #8]
+	cmp	r6, r1
+	it	hi
+	strhi	r6, [r3, #8]
+	ldrh	r3, [r4, #12]
+	ldr	r1, [r0, #8]
+	ldr	r0, [r0, #4]
+	add	r2, r2, r3
+	uxth	r2, r2
+	bl	lpa_hash_update_ppa
+	b	.L1865
+.L1850:
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1925:
+	.align	2
+.L1924:
+	.word	.LC75
+	.word	.LANCHOR45
+	.word	.LANCHOR47
+	.word	.LANCHOR79
+	.word	.LANCHOR46
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",%progbits
+	.align	1
+	.global	pm_write_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_write_page, %function
+pm_write_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r7, .L1937
+	mov	r8, r1
+	mov	r6, r7
+.L1932:
+	ldr	r3, [r7]
+	ldr	r2, [r3, #48]
+	ldrh	r1, [r3, #696]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	ldr	r2, .L1937+4
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bcs	.L1928
+	ldrh	r2, [r3, #692]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1929
+.L1928:
+	bl	pm_alloc_new_blk
+	movs	r0, #0
+	bl	ftl_info_flush
+.L1929:
+	ldr	r2, [r6]
+	movw	r1, #65535
+	ldrh	r3, [r2, #692]
+	cmp	r3, r1
+	bne	.L1930
+	movs	r2, #224
+	ldr	r1, .L1937+8
+	ldr	r0, .L1937+12
+	bl	printf
+.L1931:
+	b	.L1931
+.L1930:
+	ldr	r1, .L1937+16
+	ldrh	r2, [r2, #696]
+	ldr	r10, .L1937+28
+	ldrh	r5, [r1]
+	movs	r1, #0
+	ldr	r0, [r10]
+	mla	r5, r3, r5, r2
+	movs	r2, #64
+	bl	ftl_memset
+	ldr	r2, [r6]
+	ldr	r3, [r10]
+	ldrb	r0, [r2, #694]	@ zero_extendqisi2
+	str	r4, [r3]
+	ldr	r1, [r2, #48]
+	ldr	r2, .L1937+20
+	str	r1, [r3, #4]
+	mov	r1, r5
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp]
+	mov	r2, r8
+	bl	ftl_prog_page
+	ldr	r2, [r6]
+	ldrh	r3, [r2, #696]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #1
+	strh	r3, [r2, #696]	@ movhi
+	beq	.L1932
+	adds	r0, r0, #1
+	bne	.L1933
+.L1927:
+	mov	r1, r5
+	ldr	r0, .L1937+24
+	bl	printf
+	b	.L1932
+.L1933:
+	ldrh	r3, [r2, #698]
+	movs	r0, #0
+	cmp	r4, r3
+	itt	cc
+	addcc	r4, r4, #176
+	strcc	r5, [r2, r4, lsl #2]
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L1938:
+	.align	2
+.L1937:
+	.word	.LANCHOR46
+	.word	.LANCHOR79
+	.word	.LANCHOR140
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LC76
+	.word	.LANCHOR141
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.flash_info_flush,"ax",%progbits
+	.align	1
+	.global	flash_info_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flash_info_flush, %function
+flash_info_flush:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r2, #64
+	ldr	r5, .L1947
+	movs	r1, #0
+	movs	r7, #0
+	ldr	r6, .L1947+4
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L1947+8
+	bl	rknand_print_hex
+	ldr	r4, [r6]
+	ldr	r1, [r4, #8]
+	add	r0, r4, #16
+	bl	js_hash
+	str	r5, [sp, #8]
+	ldr	r5, .L1947+12
+	str	r0, [r4, #12]
+	mov	r8, r5
+.L1940:
+	ldr	fp, .L1947+32
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	ldrh	r4, [r5, #2]
+	ldrh	r3, [fp]
+	mov	r1, r10
+	ldr	r0, .L1947+16
+	mov	r2, r4
+	str	r3, [sp, #12]
+	bl	printf
+	ldr	r2, .L1947+20
+	ldrh	r0, [r5, #2]
+	ldr	r3, [sp, #12]
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r0, r2
+	blt	.L1941
+	ldr	r4, [r6]
+	mov	r10, #0
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	strh	r10, [r5, #2]	@ movhi
+	ldr	r3, [r4, #4]
+	mov	r0, r4
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	strb	r2, [r5, #1]
+	ldrh	r2, [r4, #16]
+	strb	r3, [r5]
+	str	r3, [sp, #12]
+	adds	r2, r2, #1
+	strh	r2, [r0, #16]!	@ movhi
+	bl	js_hash
+	ldr	r3, [sp, #12]
+	str	r0, [r4, #12]
+	mov	r0, r10
+	ldrh	r4, [fp]
+	muls	r4, r3, r4
+	mov	r1, r4
+.L1946:
+	bl	flash_erase_block
+.L1942:
+	ldr	r2, [r6]
+	mov	r10, #1
+	ldr	r3, [sp, #8]
+	movs	r0, #0
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3]
+	str	r1, [r3]
+	ldr	r1, .L1947+24
+	str	r1, [r3, #4]
+	movs	r1, #4
+	stm	sp, {r1, r10}
+	mov	r1, r4
+	bl	flash_prog_page_en
+	ldrh	r3, [r8, #2]
+	adds	r0, r0, #1
+	add	r3, r3, r10
+	strh	r3, [r8, #2]	@ movhi
+	bne	.L1943
+	mov	r1, r4
+	ldr	r0, .L1947+28
+	bl	printf
+	b	.L1940
+.L1945:
+	mov	r7, r10
+	b	.L1940
+.L1941:
+	mla	r4, r10, r3, r4
+	cmp	r0, #0
+	bne	.L1942
+	mov	r1, r4
+	b	.L1946
+.L1943:
+	cmp	r7, #0
+	beq	.L1945
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1948:
+	.align	2
+.L1947:
+	.word	.LANCHOR116
+	.word	.LANCHOR5
+	.word	.LC77
+	.word	.LANCHOR117
+	.word	.LC78
+	.word	.LANCHOR97
+	.word	1398362953
+	.word	.LC79
+	.word	.LANCHOR13
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.nand_flash_init,"ax",%progbits
+	.align	1
+	.global	nand_flash_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	nand_flash_init, %function
+nand_flash_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r8, .L2005+140
+	movs	r2, #2
+	ldr	r3, .L2005
+	ldr	r7, .L2005+4
+	mov	r6, r8
+	ldr	r4, .L2005+8
+	strb	r2, [r3]
+	bl	nandc_init
+	str	r4, [r7]
+.L1955:
+	lsl	r10, r5, #3
+	uxtb	r0, r5
+	add	r1, r8, r10
+	bl	flash_read_id
+	cbnz	r5, .L1950
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bls	.L1951
+.L1953:
+	mvn	r0, #1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1951:
+	ldrb	r3, [r8, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1953
+.L1950:
+	ldrb	r3, [r6, r10]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r6, r10]
+	cmp	r5, #4
+	bne	.L1955
+	ldr	r5, .L2005+12
+	mov	r8, #0
+	ldr	r10, .L2005+140
+.L1958:
+	ldrb	r2, [r5, #-1]	@ zero_extendqisi2
+	mov	r1, r10
+	mov	r0, r5
+	lsl	fp, r8, #5
+	bl	flash_mem_cmp8
+	cmp	r0, #0
+	bne	.L1956
+	ldr	r5, .L2005+16
+	ldr	r3, .L2005+20
+	add	r5, r5, fp
+	ldrb	r2, [r5, #22]	@ zero_extendqisi2
+	mov	r1, r3
+.L1957:
+	lsl	ip, r0, #5
+	ldrb	ip, [ip, r3]	@ zero_extendqisi2
+	cmp	ip, r2
+	beq	.L1959
+	adds	r0, r0, #1
+	cmp	r0, #4
+	bne	.L1957
+.L1959:
+	add	r1, r1, r0, lsl #5
+	movs	r2, #32
+	ldr	r0, .L2005+24
+	bl	ftl_memcpy
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L2005+8
+	bl	ftl_memcpy
+	ldr	r2, .L2005+28
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	mov	r8, r2
+	cmp	r3, #8
+	bhi	.L1960
+	ldrb	r2, [r4, #20]	@ zero_extendqisi2
+	cmp	r2, #60
+	bls	.L1961
+	movs	r2, #60
+	strb	r2, [r4, #20]
+.L1961:
+	cmp	r3, #8
+	bne	.L1960
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #44
+	bne	.L1960
+	ldrb	r3, [r4, #28]	@ zero_extendqisi2
+	cmp	r3, #2
+	itt	eq
+	moveq	r3, #0
+	strbeq	r3, [r4, #28]
+.L1960:
+	mov	r0, #16384
+	ldr	r6, .L2005+32
+	bl	ftl_malloc
+	ldr	r3, .L2005+36
+	mov	r10, #0
+	str	r0, [r3]
+	mov	r0, #16384
+	bl	ftl_malloc
+	ldr	r3, .L2005+40
+	str	r0, [r3]
+	mov	r0, #2048
+	bl	ftl_malloc
+	str	r0, [r6]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L2005+44
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L2005+48
+	str	r0, [r3]
+	movs	r0, #64
+	bl	ftl_malloc
+	ldr	r3, .L2005+52
+	str	r0, [r3]
+	ldr	r3, .L2005+56
+	strb	r10, [r3]
+	bl	flash_die_info_init
+	ldrb	r0, [r4, #18]	@ zero_extendqisi2
+	bl	flash_lsb_page_tbl_build
+	ldrb	r0, [r4, #20]	@ zero_extendqisi2
+	bl	nandc_bch_sel
+	ldr	r2, [r7]
+	ldr	r7, .L2005+60
+	ldrh	r3, [r2, #16]
+	ubfx	r5, r3, #3, #1
+	lsrs	r1, r3, #8
+	and	r0, r1, #7
+	strb	r0, [r7]
+	ldr	r0, .L2005+64
+	strb	r5, [r0]
+	ubfx	r5, r3, #4, #1
+	ldr	r0, .L2005+68
+	strb	r5, [r0]
+	ubfx	r5, r3, #12, #1
+	ldr	r0, .L2005+72
+	strb	r5, [r0]
+	ubfx	r5, r3, #13, #1
+	ldr	r0, .L2005+76
+	ubfx	r3, r3, #14, #1
+	strb	r5, [r0]
+	ldr	r0, .L2005+80
+	ldr	r5, .L2005+84
+	strb	r3, [r0]
+	movs	r0, #60
+	ldrb	r3, [r2, #28]	@ zero_extendqisi2
+	ldr	r2, .L2005+88
+	str	r10, [r5]
+	strb	r3, [r2]
+	ldr	r2, .L2005+92
+	strb	r0, [r2]
+	ldrb	r0, [r8]	@ zero_extendqisi2
+	cmp	r0, #9
+	itt	eq
+	moveq	r0, #70
+	strbeq	r0, [r2]
+	ldr	r2, .L2005+96
+	ldrh	r0, [r4, #16]
+	strb	r3, [r2]
+	ldrb	r3, [r4, #19]	@ zero_extendqisi2
+	tst	r0, #64
+	ldr	r2, .L2005+100
+	strb	r3, [r2]
+	mov	r4, r2
+	beq	.L1964
+	sub	r2, r3, #17
+	cmp	r2, #2
+	bhi	.L1965
+	ldr	r2, .L2005+104
+	cmp	r3, #19
+	ldr	r3, .L2005+108
+	str	r2, [r5]
+	ite	ne
+	movne	r2, #7
+	moveq	r2, #15
+.L2003:
+	strb	r2, [r3]
+.L1964:
+	ldr	r3, .L2005+112
+	tst	r1, #1
+	mov	r2, #0
+	mov	r0, #4
+	strb	r2, [r3]
+	mov	r8, r3
+	beq	.L1975
+	bl	nandc_set_if_mode
+	movs	r0, #1
+	bl	flash_set_interface_mode
+	movs	r0, #1
+.L1975:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	adds	r2, r0, #1
+	beq	.L1949
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	itt	ls
+	ldrls	r3, .L2005+116
+	strls	r3, [r5]
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	lsls	r3, r3, #29
+	bmi	.L1978
+.L1979:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1956:
+	add	r8, r8, #1
+	adds	r5, r5, #32
+	cmp	r8, #24
+	bne	.L1958
+	b	.L1953
+.L1965:
+	cmp	r3, #33
+	beq	.L1968
+	sub	r2, r3, #65
+	cmp	r2, #1
+	bhi	.L1969
+.L1968:
+	ldr	r3, .L2005+120
+	movs	r2, #4
+	str	r3, [r5]
+	ldr	r3, .L2005+124
+	strb	r2, [r3]
+.L2004:
+	movs	r2, #7
+	ldr	r3, .L2005+108
+	b	.L2003
+.L1969:
+	sub	r2, r3, #67
+	uxtb	r2, r2
+	cmp	r2, #1
+	bls	.L1970
+	sub	r0, r3, #34
+	cmp	r0, #1
+	bhi	.L1971
+.L1970:
+	ldr	r0, .L2005+120
+	cmp	r3, #35
+	str	r0, [r5]
+	ldr	r0, .L2005+108
+	beq	.L1972
+	cmp	r3, #68
+	beq	.L1972
+	movs	r3, #7
+.L2002:
+	cmp	r2, #1
+	strb	r3, [r0]
+	it	ls
+	movls	r2, #4
+	ldr	r3, .L2005+124
+	it	hi
+	movhi	r2, #5
+	b	.L2003
+.L1972:
+	movs	r3, #17
+	b	.L2002
+.L1971:
+	subs	r3, r3, #36
+	cmp	r3, #1
+	bhi	.L1964
+	ldr	r3, .L2005+128
+	str	r3, [r5]
+	b	.L2004
+.L1978:
+	ldr	r3, [r6]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1979
+	ldr	r2, .L2005+132
+	movs	r0, #0
+	ldr	r3, .L2005+136
+	ldrh	r1, [r2]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r1, r3, r1
+	bl	flash_ddr_para_scan
+	ldrb	r4, [r8]	@ zero_extendqisi2
+	cmp	r4, #0
+	bne	.L1979
+	ldr	r3, [r6]
+	strb	r4, [r3, #19]
+	bl	flash_info_flush
+	b	.L1979
+.L1949:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2006:
+	.align	2
+.L2005:
+	.word	.LANCHOR20
+	.word	.LANCHOR34
+	.word	.LANCHOR19
+	.word	.LANCHOR142+1
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR103
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.word	.LANCHOR119
+	.word	.LANCHOR111
+	.word	.LANCHOR118
+	.word	.LANCHOR112
+	.word	.LANCHOR116
+	.word	.LANCHOR123
+	.word	.LANCHOR25
+	.word	.LANCHOR144
+	.word	.LANCHOR23
+	.word	.LANCHOR66
+	.word	.LANCHOR74
+	.word	.LANCHOR12
+	.word	.LANCHOR115
+	.word	.LANCHOR11
+	.word	.LANCHOR145
+	.word	.LANCHOR146
+	.word	.LANCHOR1
+	.word	micron_read_retrial
+	.word	.LANCHOR113
+	.word	.LANCHOR35
+	.word	hynix_read_retrial
+	.word	toshiba_read_retrial
+	.word	.LANCHOR4
+	.word	toshiba_3d_read_retrial
+	.word	.LANCHOR13
+	.word	.LANCHOR117
+	.word	.LANCHOR26
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sysblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r0
+	sub	sp, sp, #48
+	movs	r0, #1
+	movs	r6, #0
+	bl	buf_alloc
+	ldr	r3, [r0, #4]
+	mov	r4, r0
+	mov	r5, r6
+	str	r3, [sp, #44]
+.L2008:
+	ldr	r3, .L2015
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2010
+	mov	r0, r4
+	bl	buf_free
+	cmp	r5, #0
+	beq	.L2011
+	movw	r2, #655
+	ldr	r1, .L2015+4
+	ldr	r0, .L2015+8
+	bl	printf
+.L2012:
+	b	.L2012
+.L2010:
+	ldr	r3, .L2015+12
+	uxth	r7, r6
+	ldr	r2, [r4, #12]
+	ldr	r1, [r4, #4]
+	ldrh	r8, [r3]
+	ldr	r3, .L2015+16
+	mla	r8, fp, r8, r7
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r8
+	bl	ftl_read_ppa_page
+	ldr	r2, [r4, #12]
+	mov	r10, r0
+	ldr	r3, [r4, #4]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, fp
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	mov	r2, r7
+	ldr	r3, [r3]
+	str	r0, [sp]
+	ldr	r0, .L2015+20
+	str	r3, [sp, #4]
+	mov	r3, r8
+	bl	printf
+	ldr	r1, [sp, #44]
+	movs	r3, #32
+	movs	r2, #4
+	ldr	r0, .L2015+24
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	cmp	r10, #-1
+	beq	.L2013
+	cmp	r10, #512
+	it	eq
+	moveq	r5, #1
+.L2009:
+	adds	r6, r6, #1
+	b	.L2008
+.L2013:
+	movs	r5, #1
+	b	.L2009
+.L2011:
+	mov	r0, r5
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2016:
+	.align	2
+.L2015:
+	.word	.LANCHOR79
+	.word	.LANCHOR147
+	.word	.LC0
+	.word	.LANCHOR75
+	.word	.LANCHOR45
+	.word	.LC73
+	.word	.LC80
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",%progbits
+	.align	1
+	.global	dump_ftl_info
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	ldr	r1, .L2018
+	ldr	r5, .L2018+4
+	ldrh	r3, [r1, #2]
+	ldrb	r2, [r1, #1]	@ zero_extendqisi2
+	ldr	r0, .L2018+8
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	bl	printf
+	ldr	r3, [r5]
+	ldr	r4, .L2018+12
+	ldr	r0, .L2018+16
+	ldrh	r2, [r3, #140]
+	ldrh	r1, [r3, #130]
+	bl	printf
+	ldr	r0, [r4]
+	ldr	r7, .L2018+20
+	ldrh	r6, [r0, #26]
+	ldrb	r3, [r0, #21]	@ zero_extendqisi2
+	ldrh	r2, [r0, #18]
+	ldrh	r1, [r0, #16]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #22]
+	str	r0, [sp]
+	ldr	r0, .L2018+24
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r6, [r0, #58]
+	ldrb	r3, [r0, #53]	@ zero_extendqisi2
+	ldrh	r2, [r0, #50]
+	ldrh	r1, [r0, #48]
+	str	r6, [sp, #4]
+	ldrh	r0, [r0, #54]
+	ldr	r6, .L2018+28
+	str	r0, [sp]
+	ldr	r0, .L2018+32
+	bl	printf
+	ldr	r0, [r4]
+	ldrh	r4, [r0, #90]
+	ldrb	r3, [r0, #85]	@ zero_extendqisi2
+	ldrh	r2, [r0, #82]
+	ldrh	r1, [r0, #80]
+	str	r4, [sp, #4]
+	ldrh	r0, [r0, #86]
+	ldr	r4, .L2018+36
+	str	r0, [sp]
+	ldr	r0, .L2018+40
+	bl	printf
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L2018+44
+	ldr	r0, .L2018+48
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #4
+	lsls	r3, r3, #1
+	bl	rknand_print_hex
+	ldr	r1, .L2018+52
+	movs	r2, #2
+	ldrh	r3, [r7]
+	ldr	r0, .L2018+56
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	ldr	r1, [r5]
+	movs	r3, #32
+	movs	r2, #4
+	ldr	r0, .L2018+60
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	ldr	r1, .L2018+64
+	movs	r2, #4
+	ldrh	r3, [r7]
+	ldr	r0, .L2018+68
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+	mov	r3, #256
+	movs	r2, #2
+	ldr	r1, .L2018+72
+	ldr	r0, .L2018+76
+	bl	rknand_print_hex
+	ldrh	r2, [r6]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r1, .L2018+80
+	ldr	r0, .L2018+84
+	muls	r3, r2, r3
+	ldr	r1, [r1]
+	movs	r2, #2
+	lsls	r3, r3, #1
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, lr}
+	b	rknand_print_hex
+.L2019:
+	.align	2
+.L2018:
+	.word	.LANCHOR131
+	.word	.LANCHOR46
+	.word	.LC81
+	.word	.LANCHOR60
+	.word	.LC82
+	.word	.LANCHOR54
+	.word	.LC83
+	.word	.LANCHOR79
+	.word	.LC84
+	.word	.LANCHOR69
+	.word	.LC85
+	.word	.LANCHOR82
+	.word	.LC86
+	.word	.LANCHOR56
+	.word	.LC87
+	.word	.LC80
+	.word	.LANCHOR57
+	.word	.LC88
+	.word	.LANCHOR81
+	.word	.LC89
+	.word	.LANCHOR83
+	.word	.LC90
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",%progbits
+	.align	1
+	.global	pm_ppa_update_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L2027
+	movs	r4, #1
+	mov	r6, r1
+	mov	r7, r2
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsls	r4, r4, r3
+	ldr	r3, .L2027+4
+	lsr	r0, r2, r0
+	subs	r4, r4, #1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ands	r0, r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L2027+8
+	uxth	r0, r0
+	ldr	r3, [r3]
+	add	r0, r3, r0, lsl #2
+	ldrb	r1, [r0, #2]	@ zero_extendqisi2
+	lsrs	r1, r1, #5
+	cmp	r1, #1
+	beq	.L2021
+	cmp	r1, #7
+	bne	.L2023
+.L2021:
+	mov	r3, r7
+	mov	r2, r6
+	mov	r1, r5
+	ldr	r0, .L2027+12
+	bl	printf
+	bl	dump_ftl_info
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2023:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2028:
+	.align	2
+.L2027:
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR57
+	.word	.LC91
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #31
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	bls	.L2030
+	movs	r2, #30
+	ldr	r1, .L2039
+	ldr	r0, .L2039+4
+	bl	printf
+.L2031:
+	b	.L2031
+.L2030:
+	ldr	r10, .L2039+52
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #698]
+	cmp	r2, r0
+	bcs	.L2032
+	mov	r1, r0
+	ldr	r0, .L2039+8
+	bl	printf
+	ldr	r3, .L2039+12
+	movs	r1, #255
+	ldrh	r2, [r3]
+	movs	r3, #0
+	ldr	r0, [r3, #4]
+	bl	ftl_memset
+	ldr	r3, [r10]
+	ldrh	r3, [r3, #698]
+	cmp	r3, r4
+	bcs	.L2036
+	movs	r2, #34
+	ldr	r1, .L2039
+	ldr	r0, .L2039+4
+	bl	printf
+.L2034:
+	b	.L2034
+.L2032:
+	ldr	r5, .L2039+16
+	add	r2, r0, #176
+	ldr	r7, [r3, r2, lsl #2]
+	mov	r8, #0
+	strh	r0, [r5, r1, lsl #3]	@ movhi
+	add	r5, r5, r1, lsl #3
+	strh	r8, [r5, #2]	@ movhi
+	cbnz	r7, .L2035
+	ldr	r3, .L2039+12
+	movs	r1, #255
+	ldr	r0, [r5, #4]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L2036:
+	movs	r0, #0
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2035:
+	ldr	r6, .L2039+20
+	mov	r0, r7
+	ldr	r3, .L2039+24
+	ldr	r1, [r5, #4]
+	ldr	r2, [r6]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	bl	ftl_read_ppa_page
+	ldr	r2, [r6]
+	mov	r3, r0
+	ldr	r2, [r2]
+	cmp	r2, r4
+	beq	.L2037
+	str	r7, [sp]
+	mov	r1, r4
+	ldr	r0, .L2039+28
+	bl	printf
+	ldr	r1, [r10]
+	movs	r2, #4
+	ldr	r0, .L2039+32
+	ldrh	r3, [r1, #698]
+	add	r1, r1, #704
+	bl	rknand_print_hex
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r5, #4]
+	ldr	r0, .L2039+36
+	bl	rknand_print_hex
+	movs	r3, #16
+	movs	r2, #4
+	ldr	r1, [r6]
+	ldr	r0, .L2039+40
+	bl	rknand_print_hex
+	ldr	r3, .L2039+44
+	movs	r0, #1
+	ldrh	r3, [r3]
+	rsb	r2, r3, #21
+	lsls	r0, r0, r2
+	lsrs	r7, r7, r3
+	ldr	r3, .L2039+48
+	subs	r0, r0, #1
+	ands	r0, r0, r7
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	mov	r1, r8
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2037:
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	cmp	r4, r3
+	beq	.L2036
+	movs	r2, #55
+	ldr	r1, .L2039
+	ldr	r0, .L2039+4
+	bl	printf
+.L2038:
+	b	.L2038
+.L2040:
+	.align	2
+.L2039:
+	.word	.LANCHOR148
+	.word	.LC0
+	.word	.LC92
+	.word	.LANCHOR149
+	.word	.LANCHOR93
+	.word	.LANCHOR141
+	.word	.LANCHOR45
+	.word	.LC93
+	.word	.LC94
+	.word	.LC95
+	.word	.LC96
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR46
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",%progbits
+	.align	1
+	.global	pm_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_gc, %function
+pm_gc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L2054
+	ldr	r5, .L2054+4
+	ldr	r3, [r4]
+	mov	r8, r4
+	ldrh	r2, [r3, #688]
+	ldrh	r3, [r5]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L2043
+	bl	pm_free_sblk
+	ldr	r2, [r4]
+	ldrh	r3, [r5]
+	ldrh	r1, [r2, #688]
+	subs	r3, r3, #1
+	cmp	r1, r3
+	blt	.L2043
+	uxth	r0, r0
+	movw	r7, #65535
+	adds	r0, r0, #208
+	ldrh	r6, [r2, r0, lsl #1]
+	cmp	r6, r7
+	bne	.L2045
+	movs	r2, #127
+	ldr	r1, .L2054+8
+	ldr	r0, .L2054+12
+	bl	printf
+.L2046:
+	b	.L2046
+.L2045:
+	ldr	r4, .L2054+16
+	bl	pm_select_ram_region
+	mov	r5, r0
+	ldrh	r0, [r4, r0, lsl #3]
+	cmp	r0, r7
+	beq	.L2047
+	add	r7, r4, r5, lsl #3
+	ldr	r1, [r7, #4]
+	cbz	r1, .L2047
+	ldrsh	r3, [r7, #2]
+	cmp	r3, #0
+	bge	.L2047
+	bl	pm_write_page
+	ldrh	r3, [r7, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r7, #2]	@ movhi
+.L2047:
+	mov	fp, #0
+.L2048:
+	ldr	r1, [r8]
+	uxth	r10, fp
+	ldrh	r0, [r1, #698]
+	cmp	r0, r10
+	bhi	.L2050
+	bl	pm_free_sblk
+.L2043:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2050:
+	ldr	r3, .L2054+20
+	uxth	r7, fp
+	add	ip, r7, #176
+	ldrh	r0, [r3]
+	ldr	r1, [r1, ip, lsl #2]
+	ldr	r3, .L2054+24
+	lsr	ip, r1, r0
+	rsb	r1, r0, #21
+	movs	r0, #1
+	lsls	r0, r0, r1
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	subs	r0, r0, #1
+	and	r0, ip, r0
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	cmp	r6, r0
+	bne	.L2049
+	mov	r1, r5
+	mov	r0, r10
+	bl	load_l2p_region
+	add	r2, r4, r5, lsl #3
+	mov	r0, r7
+	ldr	r1, [r2, #4]
+	bl	pm_write_page
+.L2049:
+	add	fp, fp, #1
+	b	.L2048
+.L2055:
+	.align	2
+.L2054:
+	.word	.LANCHOR46
+	.word	.LANCHOR101
+	.word	.LANCHOR150
+	.word	.LC0
+	.word	.LANCHOR93
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",%progbits
+	.align	1
+	.global	pm_flush_id
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush_id, %function
+pm_flush_id:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2061
+	push	{r4, lr}
+	add	r4, r3, r0, lsl #3
+	ldrh	r0, [r3, r0, lsl #3]
+	ldr	r1, [r4, #4]
+	bl	pm_write_page
+	ldrh	r3, [r4, #2]
+	ubfx	r3, r3, #0, #15
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r4, .L2061+4
+	ldr	r3, [r4]
+	cbz	r3, .L2057
+	bl	pm_gc
+	movs	r3, #0
+	str	r3, [r4]
+.L2057:
+	movs	r0, #0
+	pop	{r4, pc}
+.L2062:
+	.align	2
+.L2061:
+	.word	.LANCHOR93
+	.word	.LANCHOR91
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",%progbits
+	.align	1
+	.global	pm_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_flush, %function
+pm_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L2067
+.L2065:
+	add	r3, r5, r4, lsl #3
+	uxth	r0, r4
+	ldrsh	r3, [r3, #2]
+	cmp	r3, #0
+	bge	.L2064
+	bl	pm_flush_id
+.L2064:
+	adds	r4, r4, #1
+	cmp	r4, #32
+	bne	.L2065
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2068:
+	.align	2
+.L2067:
+	.word	.LANCHOR93
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",%progbits
+	.align	1
+	.global	flt_sys_flush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	pop	{r3, lr}
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FlashDeInit
+	bl	flt_sys_flush
+	pop	{r3, lr}
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.pm_init,"ax",%progbits
+	.align	1
+	.global	pm_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_init, %function
+pm_init:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	ldr	r5, .L2088
+	movs	r4, #0
+	movs	r0, #64
+	ldr	r3, .L2088+4
+	ldr	r7, .L2088+8
+	mov	r10, r5
+	str	r4, [r3]
+	bl	ftl_malloc
+	str	r0, [r7]
+.L2073:
+	movw	r3, #65535
+	adds	r6, r5, r4
+	strh	r3, [r4, r5]	@ movhi
+	movs	r3, #0
+	strh	r3, [r6, #2]	@ movhi
+	cmp	r8, #0
+	beq	.L2072
+	ldr	r3, .L2088+12
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	str	r0, [r6, #4]
+.L2072:
+	adds	r4, r4, #8
+	cmp	r4, #256
+	bne	.L2073
+	ldr	r3, [r10, #4]
+	ldr	r4, .L2088+16
+	ldr	r8, [r7]
+	str	r3, [sp, #12]
+	ldr	r3, [r4]
+	ldr	r2, [sp, #12]
+	ldrh	r1, [r3, #692]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	movs	r3, #4
+	str	r3, [sp]
+	mov	r3, r8
+	bl	flash_get_last_written_page
+	ldr	r1, [r4]
+	mov	r5, r0
+	ldrh	r2, [r1, #696]
+	cmp	r2, r0
+	bgt	.L2074
+	mov	r3, r0
+	ldrh	r1, [r1, #692]
+	ldr	r0, .L2088+20
+	bl	printf
+	ldr	r3, [r4]
+	ldrsh	r6, [r3, #696]
+.L2075:
+	cmp	r6, r5
+	ble	.L2077
+	ldr	r3, .L2088+24
+	movs	r2, #1
+	add	r5, r5, r2
+	strb	r2, [r3]
+	ldr	r3, [r4]
+	strh	r5, [r3, #696]	@ movhi
+	bl	pm_free_sblk
+	ldr	r1, [r10, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+	ldr	r1, [r10, #4]
+	mov	r0, #-1
+	bl	pm_write_page
+.L2074:
+	bl	pm_free_sblk
+	bl	pm_gc
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2077:
+	ldr	r3, [r4]
+	ldr	r2, .L2088+28
+	ldrh	r7, [r3, #692]
+	ldrh	r2, [r2]
+	ldrb	r0, [r3, #694]	@ zero_extendqisi2
+	ldr	r3, .L2088+12
+	mla	r7, r2, r7, r6
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r1, r7
+	str	r3, [sp]
+	mov	r3, r8
+	bl	flash_read_page_en
+	ldr	r3, [r4]
+	mov	fp, r0
+	ldr	r0, .L2088+32
+	ldr	r2, [r3, #48]
+	adds	r2, r2, #1
+	str	r2, [r3, #48]
+	mov	r2, r7
+	ldrh	r3, [r3, #694]
+	ldr	r1, [r8]
+	bl	printf
+	cmp	fp, #-1
+	beq	.L2076
+	cmp	fp, #512
+	beq	.L2076
+	ldr	r2, [r4]
+	ldr	r3, [r8]
+	ldrh	r1, [r2, #698]
+	cmp	r3, r1
+	itt	cc
+	addcc	r3, r3, #176
+	strcc	r7, [r2, r3, lsl #2]
+.L2076:
+	adds	r6, r6, #1
+	sxth	r6, r6
+	b	.L2075
+.L2089:
+	.align	2
+.L2088:
+	.word	.LANCHOR93
+	.word	.LANCHOR91
+	.word	.LANCHOR141
+	.word	.LANCHOR45
+	.word	.LANCHOR46
+	.word	.LC97
+	.word	.LANCHOR133
+	.word	.LANCHOR75
+	.word	.LC98
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",%progbits
+	.align	1
+	.global	pm_log2phys
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	pm_log2phys, %function
+pm_log2phys:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2104
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r1
+	mov	r4, r0
+	mov	r8, r2
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	lsls	r1, r5, #7
+	lsls	r5, r5, #7
+	bl	__aeabi_uidiv
+	ldr	r3, .L2104+4
+	uxth	r10, r0
+	mov	r6, r0
+	smulbb	r5, r5, r10
+	ldr	r2, [r3]
+	subs	r5, r4, r5
+	cmp	r4, r2
+	uxth	r5, r5
+	bcc	.L2091
+	mov	r1, r4
+	ldr	r0, .L2104+8
+	bl	printf
+	mov	r0, #-1
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2091:
+	ldr	r2, .L2104+12
+	movs	r3, #0
+	mov	fp, r2
+.L2097:
+	add	r1, r2, r3, lsl #3
+	uxth	r4, r3
+	ldr	r1, [r1, #4]
+	cbz	r1, .L2093
+	ldrh	r1, [r2, r3, lsl #3]
+	cmp	r1, r10
+	bne	.L2093
+.L2094:
+	lsls	r4, r4, #3
+	cmp	r8, #0
+	bne	.L2095
+	add	r3, fp, r4
+	ldr	r3, [r3, #4]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r7]
+.L2096:
+	add	r4, r4, fp
+	movw	r2, #32767
+	ldrh	r3, [r4, #2]
+	ubfx	r1, r3, #0, #15
+	cmp	r1, r2
+	beq	.L2099
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L2099:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2095:
+	add	r2, fp, r4
+	ldr	r1, [r7]
+	ldr	r3, [r2, #4]
+	str	r1, [r3, r5, lsl #2]
+	ldrh	r3, [r2, #2]
+	mvn	r3, r3, lsl #17
+	mvn	r3, r3, lsr #17
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L2104+16
+	strb	r6, [r3]
+	b	.L2096
+.L2093:
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L2097
+	bl	pm_select_ram_region
+	ldrh	r2, [fp, r0, lsl #3]
+	movw	r3, #65535
+	mov	r4, r0
+	cmp	r2, r3
+	beq	.L2098
+	add	r3, fp, r0, lsl #3
+	ldrsh	r3, [r3, #2]
+	cmp	r3, #0
+	bge	.L2098
+	bl	pm_flush_id
+.L2098:
+	ldr	r3, .L2104+20
+	mov	r1, r4
+	mov	r0, r10
+	strb	r4, [r3]
+	bl	load_l2p_region
+	b	.L2094
+.L2105:
+	.align	2
+.L2104:
+	.word	.LANCHOR45
+	.word	.LANCHOR47
+	.word	.LC99
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR151
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.ftl_read_ahead,"ax",%progbits
+	.align	1
+	.global	ftl_read_ahead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read_ahead, %function
+ftl_read_ahead:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	sub	sp, sp, #28
+	ldr	r6, .L2119
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	beq	.L2107
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r4, r0
+	mov	r0, #-1
+	cbz	r4, .L2106
+	ldr	r5, [r6]
+	str	r0, [r6]
+	ldr	r7, [r4, #4]
+	str	r5, [r4, #20]
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #20]
+	adds	r0, r0, #1
+	ldr	r6, [r4, #12]
+	bne	.L2109
+	movs	r2, #0
+	add	r1, sp, #20
+	mov	r0, r5
+	bl	pm_log2phys
+.L2109:
+	ldr	r3, [sp, #20]
+	str	r3, [r4, #24]
+	str	r3, [r4, #28]
+	adds	r3, r3, #1
+	bne	.L2110
+	ldr	r3, .L2119+4
+	movs	r1, #0
+	mov	r0, r7
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #9
+	bl	ftl_memset
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #8
+	strb	r3, [r4, #2]
+.L2107:
+	movs	r0, #0
+.L2106:
+	add	sp, sp, #28
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2110:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r7, [r4, #36]
+	cmp	r7, #256
+	bne	.L2111
+	ldr	r3, .L2119+8
+	mov	r8, #1
+	ldr	r0, [sp, #20]
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsrs	r0, r0, r2
+	lsl	r3, r8, r3
+	ldr	r2, .L2119+12
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r2, [r4, #20]
+	uxth	r1, r0
+	mov	r10, r0
+	ldr	r3, [r4, #24]
+	ldr	r0, .L2119+16
+	bl	printf
+	movs	r2, #0
+	mov	r1, r8
+	uxth	r0, r10
+	bl	gc_add_sblk
+.L2111:
+	ldr	r3, [r6, #4]
+	cmp	r5, r3
+	beq	.L2112
+	ldr	r2, [r6, #12]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L2119+20
+	str	r2, [sp, #12]
+	ldr	r2, [r6, #8]
+	str	r3, [sp, #4]
+	str	r2, [sp, #8]
+	mov	r2, r5
+	ldr	r3, [r6]
+	str	r3, [sp]
+	ldr	r3, [sp, #20]
+	bl	printf
+.L2112:
+	ldr	r3, [r6, #4]
+	cmp	r5, r3
+	bne	.L2113
+	adds	r7, r7, #1
+	bne	.L2107
+.L2113:
+	movw	r2, #758
+	ldr	r1, .L2119+24
+	ldr	r0, .L2119+28
+	bl	printf
+.L2114:
+	b	.L2114
+.L2120:
+	.align	2
+.L2119:
+	.word	.LANCHOR49
+	.word	.LANCHOR45
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC100
+	.word	.LC101
+	.word	.LANCHOR152
+	.word	.LC0
+	.size	ftl_read_ahead, .-ftl_read_ahead
+	.section	.text.gc_update_l2p_map,"ax",%progbits
+	.align	1
+	.global	gc_update_l2p_map
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_update_l2p_map, %function
+gc_update_l2p_map:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2138
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	sub	sp, sp, #24
+	mov	r4, r5
+	mov	r8, r5
+	ldr	fp, [r3]
+.L2122:
+	ldr	r3, .L2138+4
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	bge	.L2132
+	lsls	r3, r4, #1
+	movs	r7, #0
+	subs	r3, r3, #1
+	str	r3, [sp, #8]
+	b	.L2133
+.L2129:
+	ldr	r3, .L2138+8
+	ldr	r3, [r3]
+	ldr	r10, [r3, r8, lsl #2]
+	cmp	r10, #-1
+	beq	.L2123
+	ldr	r2, .L2138+12
+	mov	r0, r10
+	ldr	r2, [r2]
+	ldr	r3, [r2, r8, lsl #2]
+	str	r3, [sp, #4]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #20]
+	adds	r0, r0, #1
+	bne	.L2124
+	movs	r2, #0
+	add	r1, sp, #20
+	mov	r0, r10
+	bl	pm_log2phys
+.L2124:
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bne	.L2125
+	ldr	r3, [sp, #12]
+	ldr	r2, .L2138+16
+	ldrh	r1, [r3, #96]
+	ldrh	r2, [r2]
+	ldr	r3, .L2138+20
+	muls	r2, r1, r2
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cmp	r1, #3
+	bne	.L2126
+	add	r2, r2, r4
+	orr	r2, r2, r6, lsl #24
+.L2137:
+	str	r2, [sp, #16]
+	add	r1, sp, #16
+	movs	r2, #1
+	mov	r0, r10
+	bl	pm_log2phys
+	ldr	r3, .L2138+24
+	adds	r5, r5, #1
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, [sp, #4]
+	subs	r3, r3, #1
+	lsrs	r2, r2, r0
+	mov	r0, r2
+	ldr	r2, .L2138+28
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+.L2125:
+	add	r8, r8, #1
+.L2123:
+	adds	r6, r6, #1
+.L2131:
+	ldr	r3, .L2138+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r6, r3
+	ble	.L2129
+	adds	r7, r7, #1
+.L2133:
+	ldrb	r3, [fp, #89]	@ zero_extendqisi2
+	cmp	r7, r3
+	bge	.L2130
+	add	r3, fp, r7, lsl #1
+	movs	r6, #1
+	str	r3, [sp, #12]
+	b	.L2131
+.L2126:
+	cmp	r1, #2
+	itett	eq
+	ldreq	r3, [sp, #8]
+	addne	r2, r2, r4
+	addeq	r2, r2, r3
+	addeq	r2, r2, r6
+	it	eq
+	orreq	r2, r2, #33554432
+	b	.L2137
+.L2130:
+	adds	r4, r4, #1
+	b	.L2122
+.L2132:
+	ldr	r3, .L2138+32
+	ldrh	r2, [fp, #80]
+	ldr	r3, [r3]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2139:
+	.align	2
+.L2138:
+	.word	.LANCHOR60
+	.word	.LANCHOR79
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR56
+	.size	gc_update_l2p_map, .-gc_update_l2p_map
+	.section	.text.gc_update_l2p_map_new,"ax",%progbits
+	.align	1
+	.global	gc_update_l2p_map_new
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2177
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r2, .L2177+4
+	ldr	r4, [r3]
+	ldrh	r2, [r2]
+	str	r3, [sp, #16]
+	ldrb	r1, [r4, #89]	@ zero_extendqisi2
+	muls	r2, r1, r2
+	str	r2, [sp, #4]
+	ldr	r2, .L2177+8
+	ldr	r2, [r2]
+	tst	r2, #256
+	beq	.L2141
+	ldrh	r1, [r4, #80]
+	ldr	r0, .L2177+12
+	bl	printf
+.L2141:
+	ldr	r3, .L2177+16
+	movs	r7, #0
+	ldr	r1, [sp, #4]
+	mov	r5, r7
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r3]
+	subs	r1, r1, #1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+.L2142:
+	ldr	r3, [sp, #4]
+	cmp	r5, r3
+	bne	.L2151
+	ldr	r3, .L2177+8
+	ldr	r5, .L2177+16
+	ldr	r3, [r3]
+	tst	r3, #256
+	beq	.L2152
+	ldr	r3, [sp, #16]
+	ldrh	r0, [r4, #80]
+	ldr	r2, [r5]
+	ldr	r1, [r3]
+	mov	r3, r7
+	ldrh	r2, [r2, r0, lsl #1]
+	ldrh	r1, [r1, #80]
+	ldr	r0, .L2177+20
+	bl	printf
+.L2152:
+	ldrh	r2, [r4, #80]
+	ldr	r3, [r5]
+	ldrh	r1, [r3, r2, lsl #1]
+	cmp	r7, r1
+	beq	.L2153
+	mov	r2, #448
+	ldr	r1, .L2177+24
+	ldr	r0, .L2177+28
+	bl	printf
+.L2154:
+	b	.L2154
+.L2151:
+	ldr	r3, .L2177+32
+	lsl	r8, r5, #2
+	ldr	r3, [r3]
+	ldr	r6, [r3, r5, lsl #2]
+	adds	r2, r6, #1
+	beq	.L2143
+	ldr	r3, .L2177+36
+	mov	r0, r6
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp, #12]
+	ldr	r3, .L2177+8
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2144
+	mov	r3, r5
+	mov	r2, r6
+	ldr	r1, [sp, #12]
+	ldr	r0, .L2177+40
+	bl	printf
+.L2144:
+	ldr	fp, .L2177+32
+	str	r5, [sp, #8]
+.L2150:
+	ldr	r3, [fp]
+	ldr	r6, [r3, r8]
+	adds	r0, r6, #1
+	beq	.L2145
+	ldr	r3, .L2177+36
+	mov	r0, r6
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #12]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L2145
+	ldr	r3, .L2177+44
+	mov	r0, r6
+	ldr	r3, [r3]
+	ldr	r10, [r3, r8]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L2146
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r6
+	bl	pm_log2phys
+.L2146:
+	ldr	r3, [sp, #28]
+	cmp	r10, r3
+	bne	.L2147
+	ldr	r3, .L2177+48
+	add	r1, sp, #32
+	movs	r2, #1
+	mov	r0, r6
+	adds	r7, r7, #1
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	str	r3, [r1, #-8]!
+	bl	pm_log2phys
+	ldr	r3, .L2177+52
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L2177+56
+	lsr	r0, r10, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	mov	r0, r3
+	str	r3, [sp, #20]
+	bl	ftl_vpn_decrement
+	ldrh	r2, [r4, #80]
+	ldr	r3, [sp, #20]
+	cmp	r2, r3
+	bne	.L2148
+	ldr	r3, .L2177+8
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L2148
+	ldr	r3, [sp, #28]
+	mov	r2, r10
+	mov	r1, r6
+	ldr	r0, .L2177+60
+	bl	printf
+.L2148:
+	ldr	r3, [fp]
+	mov	r2, #-1
+	str	r2, [r3, r8]
+.L2145:
+	ldr	r3, [sp, #8]
+	add	r8, r8, #4
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+	ldr	r2, [sp, #8]
+	ldr	r3, [sp, #4]
+	cmp	r3, r2
+	bne	.L2150
+.L2143:
+	adds	r5, r5, #1
+	b	.L2142
+.L2147:
+	ldr	r2, .L2177+8
+	ldr	r2, [r2]
+	lsls	r2, r2, #23
+	bpl	.L2149
+	mov	r2, r10
+	mov	r1, r6
+	ldr	r0, .L2177+64
+	bl	printf
+.L2149:
+	ldrh	r0, [r4, #80]
+	bl	ftl_vpn_decrement
+	b	.L2148
+.L2153:
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2178:
+	.align	2
+.L2177:
+	.word	.LANCHOR60
+	.word	.LANCHOR68
+	.word	.LANCHOR22
+	.word	.LC102
+	.word	.LANCHOR56
+	.word	.LC106
+	.word	.LANCHOR153
+	.word	.LC0
+	.word	.LANCHOR107
+	.word	.LANCHOR45
+	.word	.LC103
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC104
+	.word	.LC105
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk_one_page
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r0, #0
+	ldr	r4, .L2214
+	mov	r6, r0
+	movw	r7, #65535
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	add	r2, r4, r3, lsl #1
+	ldrh	r5, [r2, #36]
+	ldr	r2, .L2214+4
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ldrh	r2, [r4, #2]
+.L2180:
+	cmp	r5, r7
+	beq	.L2182
+	cbz	r6, .L2183
+	strb	r3, [r4, #4]
+.L2183:
+	cbz	r0, .L2184
+	strh	r2, [r4, #2]	@ movhi
+.L2184:
+	ldr	r3, .L2214+8
+	ldrh	r3, [r3]
+	muls	r5, r3, r5
+	ldr	r3, .L2214+12
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	mov	r8, r3
+	cmp	r2, #2
+	bne	.L2185
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2185
+	ldrh	r3, [r4, #2]
+	add	r5, r5, r3, lsl #1
+.L2186:
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r1, r3
+	strb	r3, [r4, #4]
+	bne	.L2187
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #4]
+.L2187:
+	ldr	r10, .L2214+16
+	movs	r0, #1
+	bl	buf_alloc
+	movs	r6, #0
+	mov	r7, r0
+.L2197:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2188
+	cmp	r6, #0
+	beq	.L2189
+.L2188:
+	cmp	r3, r6
+	bgt	.L2190
+.L2198:
+	mov	r0, r7
+	bl	buf_free
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2182:
+	adds	r3, r3, #1
+	movs	r6, #1
+	uxtb	r3, r3
+	cmp	r3, r1
+	itt	eq
+	moveq	r3, #0
+	addeq	r2, r2, #1
+	add	r5, r4, r3, lsl #1
+	itt	eq
+	uxtheq	r2, r2
+	moveq	r0, #1
+	ldrh	r5, [r5, #36]
+	b	.L2180
+.L2185:
+	ldrh	r3, [r4, #2]
+	add	r5, r5, r3
+	b	.L2186
+.L2190:
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	cmp	r2, #2
+	bne	.L2191
+	cbnz	r3, .L2191
+	adds	r3, r6, r5
+	orr	r3, r3, #33554432
+.L2213:
+	str	r3, [r7, #24]
+	movs	r1, #1
+	mov	r0, r7
+	bl	sblk_read_page
+	ldr	r3, [r7, #36]
+	adds	r2, r3, #1
+	beq	.L2194
+	cmp	r3, #512
+	beq	.L2194
+	ldr	r3, [r7, #12]
+	ldr	fp, [r3, #4]
+	mov	r0, fp
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #4]
+	adds	r0, r0, #1
+	bne	.L2196
+	movs	r2, #0
+	add	r1, sp, #4
+	mov	r0, fp
+	bl	pm_log2phys
+.L2196:
+	ldr	r3, [sp, #4]
+	cmp	r5, r3
+	bne	.L2194
+	ldrh	r3, [r4, #20]
+	ldr	r2, [r10]
+	str	r5, [r2, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L2194:
+	ldrh	r3, [r4, #22]
+	adds	r3, r3, #1
+	strh	r3, [r4, #22]	@ movhi
+.L2189:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L2197
+	b	.L2198
+.L2191:
+	orr	r3, r5, r6, lsl #24
+	b	.L2213
+.L2215:
+	.align	2
+.L2214:
+	.word	.LANCHOR59
+	.word	.LANCHOR69
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR61
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_static_data,"ax",%progbits
+	.align	1
+	.global	gc_scan_static_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, r8, r10, lr}
+	ldr	r4, .L2234
+	ldr	r3, [r4]
+	ldr	r2, [r3, #544]
+	adds	r2, r2, #1
+	beq	.L2217
+	ldr	r6, .L2234+4
+	movs	r5, #11
+	ldr	r7, .L2234+8
+.L2226:
+	ldr	r3, [r4]
+	movs	r2, #0
+	add	r1, sp, #4
+	ldr	r0, [r3, #544]
+	bl	pm_log2phys
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L2218
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #4]
+	mov	r8, r0
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r8, #36]
+	cmp	r3, #256
+	bne	.L2219
+	ldrh	r2, [r6]
+	mov	r10, #1
+	ldr	r0, [sp, #4]
+	ldrb	r1, [r7]	@ zero_extendqisi2
+	rsb	r3, r2, #21
+	lsl	r3, r10, r3
+	lsrs	r0, r0, r2
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	movs	r2, #0
+	mov	r1, r10
+	uxth	r0, r0
+	bl	gc_add_sblk
+.L2219:
+	ldr	r2, [r8, #12]
+	ldr	r3, [r4]
+	ldr	r2, [r2, #4]
+	ldr	r3, [r3, #544]
+	cmp	r2, r3
+	beq	.L2220
+	movw	r2, #1149
+	ldr	r1, .L2234+12
+	ldr	r0, .L2234+16
+	bl	printf
+.L2221:
+	b	.L2221
+.L2220:
+	mov	r0, r8
+	bl	buf_free
+.L2218:
+	ldr	r3, [r4]
+	ldr	r1, .L2234+20
+	ldr	r2, [r3, #544]
+	ldr	r1, [r1]
+	adds	r2, r2, #1
+	cmp	r2, r1
+	str	r2, [r3, #544]
+	bcc	.L2222
+	mov	r2, #-1
+	str	r2, [r3, #544]
+	ldr	r2, [r3, #548]
+	adds	r2, r2, #1
+	str	r2, [r3, #548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+.L2216:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L2222:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L2216
+	subs	r5, r5, #1
+	uxth	r5, r5
+	cmp	r5, #0
+	bne	.L2226
+	b	.L2216
+.L2217:
+	ldr	r2, .L2234+24
+	ldr	r2, [r2]
+	ldr	r1, [r2, #40]
+	cmp	r1, #20480
+	bls	.L2228
+	ldr	r0, [r2, #44]
+	add	r0, r0, r1, lsr #10
+	ubfx	r1, r1, #0, #10
+	str	r1, [r2, #40]
+	str	r0, [r2, #44]
+.L2228:
+	ldr	r1, [r3, #536]
+	ldr	r0, [r3, #12]
+	add	r1, r1, #12910592
+	add	r1, r1, #49408
+	cmp	r0, r1
+	ldr	r1, [r2, #44]
+	bhi	.L2229
+	ldr	r2, [r3, #540]
+	add	r2, r2, #99840
+	adds	r2, r2, #160
+	cmp	r1, r2
+	bls	.L2216
+.L2229:
+	movs	r2, #0
+	str	r1, [r3, #540]
+	str	r0, [r3, #536]
+	str	r2, [r3, #544]
+	b	.L2216
+.L2235:
+	.align	2
+.L2234:
+	.word	.LANCHOR60
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR154
+	.word	.LC0
+	.word	.LANCHOR47
+	.word	.LANCHOR46
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",%progbits
+	.align	1
+	.global	ftl_sblk_dump
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	cmp	r0, r3
+	sub	sp, sp, #120
+	mov	r7, r0
+	str	r1, [sp, #64]
+	beq	.L2258
+	ldr	r5, .L2286
+	lsls	r4, r0, #2
+	add	r1, sp, #104
+	strh	r0, [sp, #88]	@ movhi
+	ldr	r3, [r5]
+	add	r3, r3, r4
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	and	r3, r3, #224
+	cmp	r3, #160
+	itet	eq
+	ldreq	r3, .L2286+4
+	movne	r3, #1
+	ldrbeq	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #44]
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L2286+8
+	uxtb	r0, r0
+	movs	r2, #0
+	strb	r0, [sp, #97]
+	ldrh	r1, [r3]
+	ldr	r3, .L2286+12
+	strh	r2, [sp, #90]	@ movhi
+	strb	r2, [sp, #93]
+	ldr	r3, [r3]
+	smulbb	r1, r1, r0
+	strh	r2, [sp, #98]	@ movhi
+	lsls	r6, r3, #19
+	strh	r1, [sp, #94]	@ movhi
+	bpl	.L2239
+	ldr	r3, [r5]
+	mov	r1, r7
+	add	r3, r3, r4
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	str	r0, [sp]
+	ldr	r3, [sp, #44]
+	ldr	r0, .L2286+16
+	lsrs	r2, r2, #5
+	bl	printf
+.L2239:
+	movs	r6, #0
+	movs	r0, #1
+	bl	buf_alloc
+	mov	fp, r6
+	mov	r5, r0
+	str	r6, [sp, #52]
+	str	r6, [sp, #48]
+.L2240:
+	ldr	r3, .L2286+8
+	ldrh	r2, [r3]
+	uxth	r3, r6
+	cmp	r2, r3
+	bls	.L2255
+	str	r3, [sp, #68]
+	lsls	r3, r3, #1
+	ldr	r8, .L2286+12
+	subs	r3, r3, #1
+	str	r3, [sp, #72]
+	movs	r3, #0
+	str	r3, [sp, #56]
+	b	.L2256
+.L2252:
+	ldr	r3, [sp, #76]
+	add	r2, sp, #120
+	add	r3, r2, r3, lsl #1
+	ldrh	r10, [r3, #-32]
+	movw	r3, #65535
+	cmp	r10, r3
+	beq	.L2241
+	ldr	r3, .L2286+20
+	ldrh	r4, [r3]
+	ldr	r3, [sp, #44]
+	cmp	r3, #3
+	mul	r4, r10, r4
+	bne	.L2242
+	ldr	r3, [sp, #40]
+	uxtah	r4, r4, r6
+.L2284:
+	orr	r4, r4, r3, lsl #24
+.L2243:
+	movs	r1, #1
+	str	r4, [r5, #24]
+	mov	r0, r5
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	str	r3, [sp, #60]
+	ldr	r3, [r8]
+	lsls	r1, r3, #19
+	bpl	.L2245
+	ldr	r2, [r5, #12]
+	ldr	r3, [r5, #4]
+	ldr	r0, .L2286+24
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #32]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #28]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #24]
+	mov	r1, r10
+	ldr	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r2, [sp, #68]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #60]
+	str	r3, [sp]
+	mov	r3, r4
+	bl	printf
+.L2245:
+	ldr	r3, [sp, #60]
+	adds	r2, r3, #1
+	beq	.L2260
+	cmp	r3, #512
+	ldr	r3, [sp, #48]
+	it	eq
+	moveq	r3, #1
+.L2285:
+	str	r3, [sp, #48]
+	ldr	r3, [r5, #12]
+	ldr	r10, [r3, #4]
+	mov	r0, r10
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #84]
+	adds	r0, r0, #1
+	bne	.L2247
+	movs	r2, #0
+	add	r1, sp, #84
+	mov	r0, r10
+	bl	pm_log2phys
+.L2247:
+	ldr	r3, [sp, #84]
+	cmp	r4, r3
+	bne	.L2248
+	ldr	r3, [sp, #52]
+	adds	r3, r3, #1
+	str	r3, [sp, #52]
+	ldr	r3, [r8]
+	lsls	r0, r3, #19
+	bpl	.L2248
+	ldr	r2, [r5, #12]
+	mov	r1, r4
+	ldr	r3, [sp, #52]
+	ldr	r0, .L2286+28
+	ldr	r2, [r2, #4]
+	bl	printf
+.L2248:
+	ldr	r3, [sp, #64]
+	cbz	r3, .L2249
+	ldr	r2, [r3, fp, lsl #2]
+	lsl	r4, fp, #2
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	cmp	r3, r2
+	beq	.L2250
+	ldr	r3, [r8]
+	lsls	r1, r3, #19
+	bpl	.L2250
+	mov	r1, fp
+	ldr	r0, .L2286+32
+	bl	printf
+.L2250:
+	ldr	r3, [sp, #64]
+	ldr	r2, [r5, #12]
+	ldr	r3, [r3, r4]
+	ldr	r2, [r2, #4]
+	cmp	r2, r3
+	beq	.L2249
+	adds	r3, r3, #1
+	beq	.L2249
+	mov	r2, #616
+	ldr	r1, .L2286+36
+	ldr	r0, .L2286+40
+	bl	printf
+.L2251:
+	b	.L2251
+.L2242:
+	ldr	r3, [sp, #44]
+	cmp	r3, #2
+	bne	.L2244
+	ldr	r3, [sp, #72]
+	add	r4, r4, r3
+	ldr	r3, [sp, #40]
+	add	r4, r4, r3
+	ldr	r3, .L2286+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	b	.L2284
+.L2244:
+	uxtah	r4, r4, r6
+	b	.L2243
+.L2260:
+	movs	r3, #1
+	b	.L2285
+.L2249:
+	add	fp, fp, #1
+.L2241:
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #40]
+.L2254:
+	ldr	r3, [sp, #44]
+	ldr	r2, [sp, #40]
+	cmp	r3, r2
+	bcs	.L2252
+	ldr	r3, [sp, #56]
+	adds	r3, r3, #1
+	str	r3, [sp, #56]
+.L2256:
+	ldrb	r2, [sp, #97]	@ zero_extendqisi2
+	ldrh	r3, [sp, #56]
+	cmp	r2, r3
+	bls	.L2253
+	movs	r3, #1
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #56]
+	adds	r3, r3, #8
+	str	r3, [sp, #76]
+	b	.L2254
+.L2253:
+	adds	r6, r6, #1
+	b	.L2240
+.L2255:
+	mov	r0, r5
+	bl	buf_free
+	ldr	r3, .L2286+12
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2257
+	ldr	r3, .L2286+44
+	mov	r1, r7
+	ldr	r0, .L2286+48
+	ldr	r2, [r3]
+	ldr	r3, [sp, #52]
+	ldrh	r2, [r2, r7, lsl #1]
+	bl	printf
+.L2257:
+	ldr	r0, [sp, #48]
+.L2236:
+	add	sp, sp, #120
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2258:
+	movs	r0, #0
+	b	.L2236
+.L2287:
+	.align	2
+.L2286:
+	.word	.LANCHOR57
+	.word	.LANCHOR64
+	.word	.LANCHOR79
+	.word	.LANCHOR22
+	.word	.LC107
+	.word	.LANCHOR75
+	.word	.LC73
+	.word	.LC108
+	.word	.LC109
+	.word	.LANCHOR155
+	.word	.LC0
+	.word	.LANCHOR56
+	.word	.LC110
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.gc_search_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_search_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2360
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	str	r2, [sp, #12]
+	mov	r7, r0
+	mov	fp, r3
+	ldr	r2, [r3]
+	str	r1, [sp, #16]
+	add	r1, r0, #60
+	ldrh	r5, [r2, r1, lsl #1]
+	cmp	r5, #0
+	bne	.L2288
+	ldr	r3, .L2360+4
+	ldr	r6, .L2360+8
+	ldr	r2, [r3]
+	mov	r10, r3
+	ldrh	r4, [r2, #134]
+	ldr	r2, [r6]
+	tst	r2, #256
+	beq	.L2291
+	mov	r1, r0
+	ldr	r3, [sp, #12]
+	ldr	r2, [sp, #16]
+	ldr	r0, .L2360+12
+	bl	printf
+.L2291:
+	ldr	r3, [r6]
+	lsls	r2, r3, #23
+	bpl	.L2292
+	ldr	r2, [fp]
+	ldr	r1, [r10]
+	ldr	r3, .L2360+16
+	ldrh	r2, [r2, #126]
+	ldrh	r1, [r1, #134]
+	ldrh	r3, [r3]
+	ldr	r0, .L2360+12
+	bl	printf
+.L2292:
+	ldr	r3, [sp, #12]
+	cmp	r3, #64
+	bls	.L2293
+	movw	r2, #1028
+	ldr	r1, .L2360+20
+	ldr	r0, .L2360+24
+	bl	printf
+.L2294:
+	b	.L2294
+.L2293:
+	ldr	r3, .L2360+28
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L2360+32
+	ldrh	r6, [r3]
+	ldr	r3, .L2360+36
+	ldrh	r3, [r3]
+	smulbb	r6, r6, r2
+	uxth	r6, r6
+	smulbb	r3, r3, r2
+	uxth	r3, r3
+	str	r3, [sp, #8]
+	ldr	r3, [r10]
+	ldrh	r3, [r3, #134]
+.L2357:
+	str	r3, [sp, #4]
+	ldr	r3, .L2360+40
+	ldr	r0, [sp, #4]
+	ldrh	r2, [r3]
+	ldr	r3, [r10]
+	ldrh	r3, [r3, #134]
+	subs	r1, r2, r3
+	cmp	r0, r1
+	blt	.L2307
+.L2304:
+	ldr	r3, [r10]
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r3, #134]
+	ldr	r3, .L2360+40
+	ldrh	r3, [r3]
+	subs	r3, r3, r1
+	cmp	r2, r3
+	ldr	r2, .L2360+32
+	ldr	r3, [fp]
+	blt	.L2308
+	strh	r1, [r3, #126]	@ movhi
+	cmp	r7, #0
+	bne	.L2309
+	ldr	r3, .L2360+16
+	ldrh	r2, [r2]
+	ldrh	r1, [r3]
+	rsb	r0, r2, r2, lsl #3
+	cmp	r1, r6
+	it	cc
+	strhcc	r6, [r3]	@ movhi
+	ldrh	r1, [r3]
+	cmp	r1, r0, asr #3
+	bge	.L2312
+	add	r1, r1, r2, lsr #3
+	strh	r1, [r3]	@ movhi
+.L2312:
+	ldr	r3, .L2360+8
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2318
+	mov	r1, r5
+	ldr	r0, .L2360+44
+	bl	printf
+.L2318:
+	bl	print_ftl_debug_info
+.L2288:
+	mov	r0, r5
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2307:
+	ldr	r1, [fp]
+	ldrh	r4, [r1, #126]
+	ldr	r1, [sp, #4]
+	add	r4, r4, r1
+	uxth	r4, r4
+	cmp	r2, r4
+	bhi	.L2296
+	subs	r3, r3, r2
+	add	r4, r4, r3
+	uxth	r4, r4
+	cmp	r2, r4
+	bhi	.L2296
+	movw	r2, #1038
+	ldr	r1, .L2360+20
+	ldr	r0, .L2360+24
+	bl	printf
+.L2297:
+	b	.L2297
+.L2296:
+	ldr	r3, .L2360+48
+	ldr	r3, [r3]
+	add	r3, r3, r4, lsl #2
+	ldrb	r8, [r3, #2]	@ zero_extendqisi2
+	and	r8, r8, #224
+	cmp	r8, #32
+	beq	.L2298
+	cmp	r8, #224
+	beq	.L2298
+	ldr	r3, .L2360+52
+	cmp	r8, #0
+	bne	.L2299
+	lsls	r2, r4, #1
+	str	r2, [sp, #20]
+	ldr	r2, [r3]
+	ldrh	r1, [r2, r4, lsl #1]
+	cbz	r1, .L2300
+	mov	r2, r4
+	ldr	r0, .L2360+56
+	str	r3, [sp, #20]
+	bl	printf
+	mov	r1, r8
+	mov	r0, r4
+	bl	ftl_sblk_dump
+	ldr	r3, [sp, #20]
+.L2300:
+	ldr	r2, [r3]
+	lsls	r3, r4, #1
+	ldrh	r3, [r2, r3]
+	cmp	r3, #0
+	beq	.L2298
+	movw	r2, #1047
+	ldr	r1, .L2360+20
+	ldr	r0, .L2360+24
+	bl	printf
+.L2301:
+	b	.L2301
+.L2299:
+	ldr	r3, [r3]
+	movw	r2, #65535
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, r2
+	beq	.L2298
+	ldr	r1, [sp, #16]
+	cmp	r8, #160
+	ite	ne
+	movne	r2, #1
+	moveq	r2, #2
+	ands	r2, r2, r1
+	cbnz	r7, .L2303
+	cmp	r6, r3
+	it	cs
+	movcs	r6, r3
+	cbz	r2, .L2298
+	ldr	r2, .L2360+16
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L2298
+	mov	r2, r7
+	mov	r1, r7
+	mov	r0, r4
+	bl	gc_add_sblk
+	cbz	r0, .L2298
+.L2356:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	b	.L2305
+.L2303:
+	cbz	r2, .L2305
+	cmp	r8, #160
+	bne	.L2306
+	ldr	r2, [sp, #8]
+	cmp	r2, r3
+	it	cs
+	movcs	r2, r3
+	str	r2, [sp, #8]
+	ldr	r2, .L2360+60
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L2305
+.L2359:
+	mov	r2, r7
+	movs	r1, #0
+	mov	r0, r4
+	bl	gc_add_sblk
+	cbz	r0, .L2305
+	b	.L2356
+.L2306:
+	ldr	r2, .L2360+64
+	cmp	r6, r3
+	it	cs
+	movcs	r6, r3
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	bls	.L2359
+.L2305:
+	ldr	r3, [sp, #12]
+	cmp	r5, r3
+	bhi	.L2304
+.L2298:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	b	.L2357
+.L2309:
+	ldr	r3, .L2360+36
+	ldrh	r1, [r3]
+	ldr	r3, .L2360+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	ldr	r1, [sp, #8]
+	cmp	r1, r3
+	ldr	r1, .L2360+60
+	beq	.L2313
+	ldrh	r0, [r1]
+	ldr	r4, [sp, #8]
+	cmp	r0, r4
+	itt	cc
+	ldrhcc	r0, [sp, #8]
+	strhcc	r0, [r1]	@ movhi
+.L2313:
+	ldrh	r4, [r2]
+	ldrh	r0, [r1]
+	lsrs	r2, r4, #3
+	subs	r3, r3, r2
+	cmp	r0, r3
+	itt	lt
+	addlt	r0, r0, r2
+	strhlt	r0, [r1]	@ movhi
+	ldr	r1, .L2360+64
+	ldrh	r3, [r1]
+	cmp	r3, r4, lsr #1
+	bls	.L2312
+	subs	r3, r3, r2
+	strh	r3, [r1]	@ movhi
+	b	.L2312
+.L2308:
+	strh	r4, [r3, #126]	@ movhi
+	cbnz	r7, .L2316
+	ldrh	r1, [r2]
+	ldr	r2, .L2360+16
+	ldrh	r3, [r2]
+	cmp	r3, r1, lsr #2
+	bls	.L2312
+	sub	r3, r3, r1, lsr #3
+	strh	r3, [r2]	@ movhi
+	b	.L2312
+.L2316:
+	ldr	r1, .L2360+60
+	ldrh	r3, [r2]
+	ldr	r0, .L2360+68
+	ldrh	r2, [r1]
+	ldrb	r0, [r0]	@ zero_extendqisi2
+	cmp	r2, r3, lsr #1
+	it	hi
+	subhi	r2, r2, r3, lsr #3
+	mul	r3, r3, r0
+	it	hi
+	strhhi	r2, [r1]	@ movhi
+	ldr	r1, .L2360+64
+	subs	r3, r3, #32
+	ldrh	r2, [r1]
+	cmp	r2, r3
+	itt	lt
+	addlt	r2, r2, #32
+	strhlt	r2, [r1]	@ movhi
+	b	.L2312
+.L2361:
+	.align	2
+.L2360:
+	.word	.LANCHOR60
+	.word	.LANCHOR46
+	.word	.LANCHOR22
+	.word	.LC111
+	.word	.LANCHOR58
+	.word	.LANCHOR156
+	.word	.LC0
+	.word	.LANCHOR69
+	.word	.LANCHOR79
+	.word	.LANCHOR68
+	.word	.LANCHOR54
+	.word	.LC113
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LC112
+	.word	.LANCHOR106
+	.word	.LANCHOR105
+	.word	.LANCHOR70
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	sub	sp, sp, #64
+	mov	r7, r3
+	cmp	r0, #0
+	bne	.L2363
+	ldr	r3, .L2395
+	mov	r0, #24576
+	ldr	r3, [r3]
+.L2364:
+	add	r2, r1, r10
+	cmp	r3, r2
+	bcc	.L2388
+	ldr	r4, .L2395+4
+	add	fp, r0, r1
+	ldr	r5, .L2395+8
+	mov	r0, fp
+	ldr	r2, [r4]
+	ldrb	r6, [r5]	@ zero_extendqisi2
+	ldr	r3, [r2, #24]
+	mov	r1, r6
+	add	r3, r3, r10
+	str	r3, [r2, #24]
+	bl	__aeabi_uidiv
+	add	r3, r10, fp
+	str	r0, [sp, #28]
+	mov	r1, r6
+	subs	r0, r3, #1
+	str	r3, [sp, #40]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #28]
+	ldr	r6, [sp, #28]
+	str	r0, [sp, #44]
+	rsb	r3, r3, #1
+	str	r5, [sp, #32]
+	add	r3, r3, r0
+	str	r4, [sp, #52]
+	str	r3, [sp, #24]
+	movs	r3, #0
+	str	r3, [sp, #36]
+.L2366:
+	ldr	r3, [sp, #24]
+	cbnz	r3, .L2386
+	ldr	r0, [sp, #36]
+.L2362:
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2363:
+	cmp	r0, #3
+	bhi	.L2388
+	lsls	r0, r0, #13
+	mov	r3, #8192
+	b	.L2364
+.L2386:
+	ldr	r3, [sp, #32]
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #28]
+	cmp	r6, r3
+	uxth	r5, r1
+	bne	.L2367
+	mov	r0, fp
+	bl	__aeabi_uidivmod
+	uxth	r8, r1
+	sub	r5, r5, r8
+	uxth	r5, r5
+	cmp	r10, r5
+	bcs	.L2368
+	uxth	r5, r10
+.L2368:
+	ldr	r2, .L2395+12
+	movs	r3, #0
+.L2371:
+	ldr	r1, [r2, #20]
+	cmp	r6, r1
+	bne	.L2369
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r1, r1, #28
+	bpl	.L2369
+	ldr	r1, .L2395+12
+	movs	r2, #48
+	lsls	r5, r5, #9
+	mov	r0, r7
+	add	r7, r7, r5
+	mla	r3, r2, r3, r1
+	mov	r2, r5
+	ldr	r1, [r3, #4]
+	add	r1, r1, r8, lsl #9
+	bl	ftl_memcpy
+.L2370:
+	ldr	r3, [sp, #24]
+	adds	r6, r6, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #24]
+	b	.L2366
+.L2367:
+	ldr	r3, [sp, #44]
+	mov	r8, #0
+	cmp	r6, r3
+	ittt	eq
+	addeq	r5, fp, r10
+	mlseq	r1, r6, r1, r5
+	uxtbeq	r5, r1
+	b	.L2368
+.L2369:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L2371
+	mov	r0, r6
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #60]
+	adds	r0, r0, #1
+	bne	.L2372
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r6
+	bl	pm_log2phys
+.L2372:
+	ldr	r3, [sp, #60]
+	adds	r3, r3, #1
+	bne	.L2373
+	movs	r4, #0
+.L2374:
+	ldr	r3, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcs	.L2370
+	mla	r3, r3, r6, r4
+	cmp	fp, r3
+	bhi	.L2375
+	ldr	r2, [sp, #40]
+	cmp	r2, r3
+	bls	.L2375
+	mov	r0, r7
+	add	r7, r7, #512
+	mov	r2, #512
+	movs	r1, #0
+	bl	ftl_memset
+.L2375:
+	adds	r4, r4, #1
+	b	.L2374
+.L2373:
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r4, r0
+	cbnz	r0, .L2377
+	bl	ftl_read_ahead
+	b	.L2366
+.L2377:
+	ldr	r3, [sp, #52]
+	movs	r1, #1
+	ldr	r2, [r3]
+	ldr	r3, [r2, #40]
+	adds	r3, r3, #1
+	str	r3, [r2, #40]
+	ldr	r3, [sp, #60]
+	str	r3, [r0, #24]
+	str	r3, [r0, #28]
+	ldr	r3, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r5
+	it	eq
+	streq	r7, [r0, #8]
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r2, r3, #1
+	str	r3, [sp, #20]
+	beq	.L2390
+	cmp	r3, #256
+	bne	.L2380
+	ldr	r3, .L2395+16
+	movs	r1, #1
+	ldr	r0, [sp, #60]
+	ldrh	r2, [r3]
+	rsb	r3, r2, #21
+	lsl	r3, r1, r3
+	lsrs	r0, r0, r2
+	ldr	r2, .L2395+20
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r2, [r4, #20]
+	str	r0, [sp, #48]
+	ldr	r3, [r4, #24]
+	ldrh	r1, [sp, #48]
+	ldr	r0, .L2395+24
+	bl	printf
+	movs	r2, #0
+	movs	r1, #1
+	ldrh	r0, [sp, #48]
+	bl	gc_add_sblk
+.L2380:
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3, #4]
+	cmp	r6, r2
+	beq	.L2381
+	ldr	r0, [r3, #12]
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	str	r0, [sp, #12]
+	ldr	r0, [r3, #8]
+	str	r2, [sp, #4]
+	mov	r2, r6
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	ldr	r0, .L2395+28
+	str	r3, [sp]
+	ldr	r3, [sp, #60]
+	bl	printf
+	ldr	r3, .L2395+16
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #60]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2395+20
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2381:
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3, #4]
+	cmp	r6, r3
+	bne	.L2382
+	ldr	r3, [sp, #20]
+	adds	r3, r3, #1
+	bne	.L2383
+.L2382:
+	movw	r2, #911
+	ldr	r1, .L2395+32
+	ldr	r0, .L2395+36
+	bl	printf
+.L2384:
+	b	.L2384
+.L2390:
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #36]
+	b	.L2380
+.L2383:
+	ldr	r3, [r4, #8]
+	cbnz	r3, .L2385
+	ldr	r1, [r4, #4]
+	lsls	r2, r5, #9
+	mov	r0, r7
+	add	r1, r1, r8, lsl #9
+	bl	ftl_memcpy
+.L2385:
+	mov	r0, r4
+	add	r7, r7, r5, lsl #9
+	bl	buf_free
+	b	.L2370
+.L2388:
+	mov	r0, #-1
+	b	.L2362
+.L2396:
+	.align	2
+.L2395:
+	.word	.LANCHOR52
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.word	.LANCHOR36
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC114
+	.word	.LC101
+	.word	.LANCHOR157
+	.word	.LC0
+	.size	ftl_read, .-ftl_read
+	.section	.text.FtlRead,"ax",%progbits
+	.align	1
+	.global	FtlRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRead, %function
+FtlRead:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	ftl_read
+	.size	FtlRead, .-FtlRead
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
+	mov	r5, r0
+	mov	r2, #512
+	movs	r1, #0
+	mov	r0, r4
+	bl	ftl_memset
+	mov	r3, r4
+	mov	r1, r5
+	movs	r2, #1
+	movs	r0, #2
+	pop	{r4, r5, r6, lr}
+	b	ftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.vpn_check,"ax",%progbits
+	.align	1
+	.global	vpn_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	vpn_check, %function
+vpn_check:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
+	ldr	r5, .L2430
+	bl	dump_ftl_info
+	ldr	r1, [r5]
+	ldr	r0, .L2430+4
+	ldr	r4, .L2430+8
+	ldrh	r3, [r1, #80]
+	ldrh	r2, [r1, #48]
+	ldrh	r1, [r1, #16]
+	bl	printf
+	ldr	r3, [r5]
+	ldr	r6, .L2430+12
+	ldrh	r1, [r3, #16]
+	ldrh	r2, [r3, #22]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r1, lsl #1]
+	subs	r0, r3, r2
+	str	r0, [sp]
+	ldr	r0, .L2430+16
+	bl	printf
+	ldr	r3, [r5]
+	movs	r5, #0
+	ldrh	r1, [r3, #48]
+	ldrh	r2, [r3, #54]
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r1, lsl #1]
+	subs	r0, r3, r2
+	str	r0, [sp]
+	ldr	r0, .L2430+20
+	bl	printf
+	mov	r2, #4352
+	movs	r1, #0
+	ldr	r0, .L2430+24
+	bl	ftl_memset
+.L2400:
+	ldr	r3, .L2430+28
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bcc	.L2408
+	ldr	r6, .L2430+12
+	movs	r5, #0
+	mov	r7, r6
+.L2409:
+	ldrh	r2, [r6]
+	uxth	r3, r5
+	cmp	r2, r3
+	bhi	.L2411
+	ldr	r8, .L2430+24
+	movs	r6, #0
+.L2412:
+	ldrh	r2, [r7]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2417
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2408:
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	adds	r2, r0, #1
+	str	r0, [sp, #12]
+	bne	.L2401
+	movs	r2, #0
+	add	r1, sp, #12
+	mov	r0, r5
+	bl	pm_log2phys
+.L2402:
+	ldr	r7, [sp, #12]
+	adds	r3, r7, #1
+	beq	.L2404
+	ldr	r3, .L2430+32
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L2430+36
+	lsr	r0, r7, r0
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r3, [r6]
+	uxth	r8, r0
+	cmp	r3, r8
+	mov	r3, r8
+	bls	.L2405
+	ldr	r1, .L2430+24
+	ldrh	r2, [r1, r8, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r1, r8, lsl #1]	@ movhi
+.L2406:
+	ldrh	r3, [r6]
+	cmp	r3, r8
+	bhi	.L2404
+	movw	r2, #1111
+	ldr	r1, .L2430+40
+	ldr	r0, .L2430+44
+	bl	printf
+.L2407:
+	b	.L2407
+.L2401:
+	ldr	r3, .L2430+32
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r1, r2, #21
+	lsls	r3, r3, r1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2430+36
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r3, [r6]
+	uxth	r0, r0
+	cmp	r3, r0
+	bhi	.L2402
+	movw	r2, #1101
+	ldr	r1, .L2430+40
+	ldr	r0, .L2430+44
+	bl	printf
+.L2403:
+	b	.L2403
+.L2405:
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L2430+48
+	bl	printf
+	ldr	r3, .L2430+52
+	movs	r2, #4
+	ldr	r1, .L2430+56
+	ldr	r0, .L2430+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r1, #4]
+	lsls	r3, r3, #7
+	bl	rknand_print_hex
+	b	.L2406
+.L2404:
+	adds	r5, r5, #1
+	b	.L2400
+.L2411:
+	ldr	r3, [r4]
+	uxth	r1, r5
+	ldr	r2, .L2430+24
+	ldrh	r3, [r3, r1, lsl #1]
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r3, r2
+	beq	.L2410
+	ldr	r0, .L2430+64
+	ldr	r0, [r0]
+	add	r0, r0, r1, lsl #2
+	ldrb	r0, [r0, #2]	@ zero_extendqisi2
+	lsrs	r0, r0, #5
+	str	r0, [sp]
+	ldr	r0, .L2430+68
+	bl	printf
+.L2410:
+	adds	r5, r5, #1
+	b	.L2409
+.L2417:
+	ldr	r3, .L2430+64
+	uxth	r5, r6
+	ldr	r3, [r3]
+	add	r3, r3, r5, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	tst	r3, #224
+	bne	.L2413
+	ldrh	r3, [r8, r5, lsl #1]
+	cbnz	r3, .L2414
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2415
+	mov	r1, r5
+	ldr	r0, .L2430+72
+	bl	printf
+.L2415:
+	ldr	r3, [r4]
+	movs	r2, #0
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+.L2414:
+	ldr	r3, [r4]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2413
+	ldrh	r3, [r8, r5, lsl #1]
+	cbz	r3, .L2413
+	movw	r2, #1143
+	ldr	r1, .L2430+40
+	ldr	r0, .L2430+44
+	bl	printf
+.L2416:
+	b	.L2416
+.L2413:
+	adds	r6, r6, #1
+	b	.L2412
+.L2431:
+	.align	2
+.L2430:
+	.word	.LANCHOR60
+	.word	.LC115
+	.word	.LANCHOR56
+	.word	.LANCHOR54
+	.word	.LC116
+	.word	.LC117
+	.word	check_vpc_tbl
+	.word	.LANCHOR47
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR158
+	.word	.LC0
+	.word	.LC118
+	.word	.LANCHOR45
+	.word	.LANCHOR93
+	.word	.LC119
+	.word	.LANCHOR57
+	.word	.LC120
+	.word	.LC121
+	.size	vpn_check, .-vpn_check
+	.section	.text.ftl_info_check,"ax",%progbits
+	.align	1
+	.global	ftl_info_check
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_info_check, %function
+ftl_info_check:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	ldr	r3, .L2467
+	mov	r8, r5
+	mov	r10, r5
+	mov	r6, r5
+	ldr	fp, .L2467+44
+	mov	r7, r5
+	ldr	r2, [r3]
+	str	r5, [sp, #4]
+	str	r3, [sp, #8]
+	ldrh	r4, [r2, #134]
+.L2433:
+	ldr	r2, .L2467+4
+	ldrh	r2, [r2]
+	cmp	r2, r4
+	bhi	.L2448
+	ldr	r3, [sp, #4]
+	mov	r2, r6
+	mov	r1, r7
+	ldr	r0, .L2467+8
+	bl	printf
+	mov	r3, r5
+	mov	r2, r8
+	mov	r1, r10
+	ldr	r0, .L2467+12
+	bl	printf
+	ldr	r3, [sp, #8]
+	ldr	r1, [sp, #4]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, #114]
+	cmp	r2, r10
+	ldrh	r2, [r3, #118]
+	it	ne
+	strhne	r10, [r3, #114]	@ movhi
+	cmp	r2, r8
+	ldrh	r2, [r3, #116]
+	it	ne
+	strhne	r8, [r3, #118]	@ movhi
+	cmp	r2, r5
+	ldrh	r2, [r3, #122]
+	it	ne
+	strhne	r5, [r3, #116]	@ movhi
+	cmp	r2, r7
+	ldrh	r2, [r3, #120]
+	it	ne
+	strhne	r7, [r3, #122]	@ movhi
+	cmp	r2, r6
+	ldrh	r2, [r3, #124]
+	it	ne
+	strhne	r6, [r3, #120]	@ movhi
+	cmp	r2, r1
+	itt	ne
+	ldrhne	r2, [sp, #4]
+	strhne	r2, [r3, #124]	@ movhi
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2448:
+	ldr	r2, .L2467+16
+	ldr	r3, [r2]
+	add	r3, r3, r4, lsl #2
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	and	r1, r2, #224
+	cmp	r1, #64
+	bne	.L2434
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L2466:
+	ldr	r2, [fp]
+	ldrh	r1, [r2, r4, lsl #1]
+	cmp	r1, #15
+	bls	.L2440
+	ldr	r2, .L2467+20
+.L2463:
+	ldrh	r0, [r2]
+	ldr	r2, .L2467+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r0, r2
+	cmp	r1, r2
+	bne	.L2436
+.L2440:
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r4
+	bl	gc_add_sblk
+.L2436:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2433
+.L2434:
+	cmp	r1, #96
+	bne	.L2437
+	ldr	r2, [sp, #4]
+	adds	r2, r2, #1
+	uxth	r3, r2
+	str	r3, [sp, #4]
+	b	.L2466
+.L2437:
+	cmp	r1, #160
+	bne	.L2439
+	ldr	r2, [fp]
+	adds	r6, r6, #1
+	uxth	r6, r6
+	ldrh	r1, [r2, r4, lsl #1]
+	cmp	r1, #15
+	bls	.L2440
+	ldr	r2, .L2467+28
+	b	.L2463
+.L2439:
+	cmp	r1, #0
+	bne	.L2436
+	ands	r2, r2, #24
+	bne	.L2441
+	add	r10, r10, #1
+	uxth	r10, r10
+.L2442:
+	lsls	r2, r4, #1
+	str	r2, [sp, #12]
+	ldr	r2, [fp]
+	ldrh	r2, [r2, r4, lsl #1]
+	cbz	r2, .L2444
+	mov	r1, r4
+	ldr	r0, .L2467+32
+	str	r3, [sp, #12]
+	bl	printf
+	ldr	r3, [sp, #12]
+	mov	r0, r4
+	ldrb	r2, [r3, #2]	@ zero_extendqisi2
+	lsls	r1, r2, #27
+	ite	mi
+	movmi	r1, #5
+	movpl	r1, #2
+	bfi	r2, r1, #5, #3
+	movs	r1, #1
+	strb	r2, [r3, #2]
+	movs	r2, #0
+	bl	gc_add_sblk
+	bl	vpn_check
+.L2444:
+	ldr	r2, [fp]
+	lsls	r3, r4, #1
+	ldrh	r2, [r2, r3]
+	cmp	r2, #0
+	beq	.L2436
+	movw	r2, #1202
+	ldr	r1, .L2467+36
+	ldr	r0, .L2467+40
+	bl	printf
+.L2447:
+	b	.L2447
+.L2441:
+	cmp	r2, #16
+	itete	eq
+	addeq	r8, r8, #1
+	addne	r5, r5, #1
+	uxtheq	r8, r8
+	uxthne	r5, r5
+	b	.L2442
+.L2468:
+	.align	2
+.L2467:
+	.word	.LANCHOR46
+	.word	.LANCHOR54
+	.word	.LC123
+	.word	.LC124
+	.word	.LANCHOR57
+	.word	.LANCHOR79
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.word	.LC122
+	.word	.LANCHOR159
+	.word	.LC0
+	.word	.LANCHOR56
+	.size	ftl_info_check, .-ftl_info_check
+	.section	.text.gc_scan_src_blk,"ax",%progbits
+	.align	1
+	.global	gc_scan_src_blk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movw	r3, #65535
+	ldr	r4, .L2511
+	ldrh	r1, [r4]
+	cmp	r1, r3
+	bne	.L2470
+	mov	r2, #880
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2471:
+	b	.L2471
+.L2470:
+	ldr	r3, .L2511+12
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L2472
+	ldr	r3, .L2511+16
+	ldr	r0, .L2511+20
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r1, lsl #1]
+	bl	printf
+.L2472:
+	ldr	r1, .L2511+24
+	ldrh	r0, [r4]
+	bl	ftl_get_blk_list_in_sblk
+	uxtb	r0, r0
+	strb	r0, [r4, #5]
+	cbnz	r0, .L2473
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+.L2469:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2473:
+	ldr	r2, .L2511+28
+	ldrh	r3, [r4]
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r2, r2, #224
+	cmp	r2, #32
+	beq	.L2475
+	cmp	r2, #224
+	beq	.L2475
+	cbz	r2, .L2476
+	ldr	r1, .L2511+32
+	ldr	r1, [r1]
+	ldrh	r5, [r1, #16]
+	cmp	r5, r3
+	beq	.L2475
+	ldrh	r5, [r1, #48]
+	cmp	r5, r3
+	beq	.L2475
+	ldrh	r1, [r1, #80]
+	cmp	r1, r3
+	bne	.L2510
+.L2475:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r4]	@ movhi
+	strh	r0, [r4, #20]	@ movhi
+	b	.L2469
+.L2476:
+	ldr	r2, .L2511+16
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cmp	r3, #0
+	beq	.L2475
+	mov	r2, #900
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2478:
+	b	.L2478
+.L2510:
+	add	r0, r4, r0, lsl #1
+	movw	r3, #65535
+	ldrh	r7, [r0, #34]
+	cmp	r7, r3
+	bne	.L2479
+	mov	r2, #908
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2480:
+	b	.L2480
+.L2479:
+	ldr	r1, .L2511+36
+	cmp	r2, #160
+	ldr	r0, .L2511+40
+	ldr	r8, .L2511+64
+	ldrh	r3, [r1]
+	mov	r10, r1
+	ldrh	r0, [r0]
+	add	r3, r3, #-1
+	uxth	r3, r3
+	mul	r7, r7, r0
+	bne	.L2494
+	ldr	r2, .L2511+44
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #2
+	uxth	fp, r2
+	orr	r7, r7, r2, lsl #24
+	bne	.L2481
+	ldrh	r3, [r8]
+	mov	fp, #2
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L2481:
+	orrs	r7, r7, r3
+	strb	fp, [r4, #6]
+	movs	r5, #0
+	movs	r0, #1
+	strh	r5, [r4, #2]	@ movhi
+	strb	r5, [r4, #4]
+	strh	r5, [r4, #22]	@ movhi
+	bl	buf_alloc
+	str	r7, [r0, #24]
+	movs	r1, #1
+	ldr	r7, .L2511+48
+	mov	r6, r0
+	bl	sblk_read_page
+	ldrh	r3, [r8]
+	movs	r1, #255
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r8, .L2511+68
+	muls	r2, r3, r2
+	ldr	r0, [r8]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldr	r3, [r6, #36]
+	strh	r5, [r4, #20]	@ movhi
+	adds	r2, r3, #1
+	bne	.L2482
+.L2483:
+	mov	r0, #-1
+	b	.L2469
+.L2494:
+	mov	fp, #1
+	b	.L2481
+.L2482:
+	cmp	r3, #512
+	beq	.L2483
+	ldr	r2, [r6, #12]
+	ldr	r3, .L2511+52
+	ldr	r2, [r2]
+	str	r3, [sp, #4]
+	cmp	r2, r3
+	beq	.L2484
+	mov	r1, r5
+	ldrh	r0, [r4]
+	bl	ftl_sblk_dump
+	ldr	r2, [r6, #12]
+	ldr	r3, [sp, #4]
+	ldr	r2, [r2]
+	cmp	r2, r3
+	beq	.L2483
+	movw	r2, #937
+	ldr	r1, .L2511+4
+	ldr	r0, .L2511+8
+	bl	printf
+.L2485:
+	b	.L2485
+.L2484:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	ldrh	r2, [r10]
+	ldr	r7, [r6, #4]
+	ldr	r10, .L2511+72
+	smulbb	r3, r3, r2
+	subs	r7, r7, #4
+	smulbb	fp, r3, fp
+	uxth	fp, fp
+.L2486:
+	cmp	r5, fp
+	blt	.L2491
+	ldr	r5, .L2511+16
+	mov	r0, r6
+	bl	buf_free
+	ldrh	r1, [r4]
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r1, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	beq	.L2492
+	ldr	r0, .L2511+56
+	bl	printf
+.L2492:
+	ldr	r3, [r5]
+	ldrh	r2, [r4]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	bcs	.L2493
+	bl	vpn_check
+.L2493:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #20]
+	ldrh	r2, [r4]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #24]	@ movhi
+	ldrh	r0, [r4, #20]
+	b	.L2469
+.L2491:
+	ldr	r0, [r7, #4]!
+	adds	r3, r0, #1
+	beq	.L2488
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	bne	.L2489
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r7]
+	bl	pm_log2phys
+.L2489:
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	ldrh	r0, [r10]
+	str	r2, [sp, #4]
+	rsb	r1, r0, #21
+	lsls	r3, r3, r1
+	lsr	r0, r2, r0
+	ldr	r2, .L2511+60
+	subs	r3, r3, #1
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldrh	r3, [r4]
+	ldr	r2, [sp, #4]
+	cmp	r0, r3
+	bne	.L2488
+	ldrh	r3, [r4, #20]
+	ldr	r1, [r8]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #20]	@ movhi
+.L2488:
+	adds	r5, r5, #1
+	b	.L2486
+.L2512:
+	.align	2
+.L2511:
+	.word	.LANCHOR59
+	.word	.LANCHOR160
+	.word	.LC0
+	.word	.LANCHOR22
+	.word	.LANCHOR56
+	.word	.LC125
+	.word	.LANCHOR59+36
+	.word	.LANCHOR57
+	.word	.LANCHOR60
+	.word	.LANCHOR79
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR69
+	.word	-178307901
+	.word	.LC126
+	.word	.LANCHOR70
+	.word	.LANCHOR68
+	.word	.LANCHOR61
+	.word	.LANCHOR71
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.ftl_scan_all_data,"ax",%progbits
+	.align	1
+	.global	ftl_scan_all_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r0, #0
+	ldr	r8, .L2542+20
+	sub	sp, sp, #40
+	movs	r5, #0
+	bl	buf_alloc
+	movs	r1, #0
+	mov	r4, r0
+	ldr	r0, .L2542
+	bl	printf
+.L2514:
+	ldr	r3, [r8]
+	cmp	r5, r3
+	bcc	.L2527
+	mov	r0, r4
+	bl	buf_free
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2527:
+	mov	r3, #-1
+	str	r3, [r4, #20]
+	ubfx	r3, r5, #0, #12
+	cbnz	r3, .L2515
+	ldr	r2, [sp, #36]
+	mov	r1, r5
+	ldr	r0, .L2542+4
+	bl	printf
+.L2515:
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #36]
+	adds	r0, r0, #1
+	bne	.L2516
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r5
+	bl	pm_log2phys
+.L2516:
+	ldr	r3, [sp, #36]
+	str	r3, [r4, #24]
+	str	r3, [r4, #28]
+	adds	r3, r3, #1
+	bne	.L2517
+.L2519:
+	adds	r5, r5, #1
+	b	.L2514
+.L2517:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	ldr	r2, [r4, #12]
+	cmp	r3, #256
+	beq	.L2518
+	adds	r0, r3, #1
+	beq	.L2518
+	ldr	r1, [r2, #4]
+	cmp	r5, r1
+	beq	.L2519
+.L2518:
+	ldr	r1, [r4, #4]
+	ldr	r10, .L2542+24
+	ldr	r7, .L2542+8
+	ldr	r0, [r1, #4]
+	str	r0, [sp, #20]
+	ldr	r1, [r1]
+	ldr	r0, .L2542+12
+	str	r1, [sp, #16]
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #12]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #8]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #4]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp]
+	ldr	r2, [r4, #24]
+	bl	printf
+	ldr	r2, [r4, #12]
+	ldr	r3, [r2, #8]
+	adds	r1, r3, #1
+	bne	.L2520
+.L2522:
+	ldrb	r6, [r10]	@ zero_extendqisi2
+	mov	r0, r5
+	ldr	fp, .L2542+28
+	lsls	r1, r6, #7
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	lsls	r3, r6, #7
+	str	r0, [sp]
+	mov	r2, r10
+	ldr	r0, .L2542+16
+	subs	r3, r3, #1
+	mov	r1, r5
+	ands	r3, r3, r5
+	movs	r6, #0
+	uxth	r3, r3
+	bl	printf
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r5
+	bl	pm_log2phys
+.L2521:
+	adds	r3, r7, r6
+	ldr	r1, [r3, #4]
+	cbz	r1, .L2526
+	ldrh	r3, [r7, r6]
+	cmp	r3, r10
+	bne	.L2526
+	mov	r3, #4096
+	movs	r2, #4
+	mov	r0, fp
+	bl	rknand_print_hex
+.L2526:
+	adds	r6, r6, #8
+	cmp	r6, #256
+	bne	.L2521
+	b	.L2519
+.L2520:
+	ldr	r6, [r2, #4]
+	ldr	r2, .L2542+20
+	ldr	r2, [r2]
+	cmp	r6, r2
+	bcs	.L2522
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r2, [r4, #4]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2542+12
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #20]
+	mov	r1, r5
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r3, [r4, #36]
+	ldr	r2, [r4, #24]
+	bl	printf
+	mov	r0, r6
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #36]
+	adds	r0, r0, #1
+	bne	.L2523
+	movs	r2, #0
+	add	r1, sp, #36
+	mov	r0, r6
+	bl	pm_log2phys
+.L2523:
+	ldr	r3, [sp, #36]
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [r4, #24]
+	bl	sblk_read_page
+	ldr	r2, [r4, #4]
+	ldr	r3, [r4, #12]
+	ldr	r0, .L2542+12
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #20]
+	mov	r1, r6
+	ldr	r2, [r2]
+	str	r2, [sp, #16]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [sp]
+	ldr	r2, [r4, #24]
+	ldr	r3, [r4, #36]
+	bl	printf
+	ldrb	fp, [r10]	@ zero_extendqisi2
+	mov	r0, r6
+	lsl	r1, fp, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r0, [sp, #28]
+	mov	r0, r6
+	str	r3, [sp, #24]
+	bl	lpa_hash_get_ppa
+	lsl	r3, fp, #7
+	ldr	r2, [sp, #28]
+	ldr	fp, .L2542+32
+	mov	r1, r6
+	subs	r3, r3, #1
+	str	r0, [sp]
+	ands	r3, r3, r6
+	ldr	r0, .L2542+16
+	uxth	r3, r3
+	uxth	r2, r2
+	bl	printf
+	mov	r0, r6
+	movs	r6, #0
+	movs	r2, #0
+	add	r1, sp, #36
+	bl	pm_log2phys
+.L2525:
+	adds	r3, r7, r6
+	ldr	r1, [r3, #4]
+	cbz	r1, .L2524
+	ldrh	r3, [r7, r6]
+	ldr	r2, [sp, #24]
+	cmp	r3, r2
+	bne	.L2524
+	mov	r3, #4096
+	movs	r2, #4
+	mov	r0, fp
+	bl	rknand_print_hex
+.L2524:
+	adds	r6, r6, #8
+	cmp	r6, #256
+	bne	.L2525
+	b	.L2522
+.L2543:
+	.align	2
+.L2542:
+	.word	.LC127
+	.word	.LC128
+	.word	.LANCHOR93
+	.word	.LC129
+	.word	.LC130
+	.word	.LANCHOR47
+	.word	.LANCHOR45
+	.word	.LC132
+	.word	.LC131
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.gc_recovery,"ax",%progbits
+	.align	1
+	.global	gc_recovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_recovery, %function
+gc_recovery:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r3, .L2603
+	sub	sp, sp, #64
+	ldr	r7, .L2603+4
+	strb	r4, [r3]
+	ldr	r3, .L2603+8
+	ldr	r5, [r7]
+	strb	r4, [r3]
+	bl	gc_init
+	ldrh	r6, [r5, #80]
+	movw	r3, #65535
+	cmp	r6, r3
+	beq	.L2545
+	ldr	r2, [r7]
+	movs	r0, #1
+	ldr	r6, .L2603+12
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_alloc
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	mov	r4, r0
+	add	r3, r5, r3, lsl #1
+	ldrh	r2, [r3, #94]
+	ldr	r3, .L2603+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	cmp	r2, #3
+	str	r3, [sp, #56]
+	bne	.L2546
+	ldr	r2, .L2603+20
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	add	r3, r3, r2
+	orr	r3, r3, #50331648
+.L2598:
+	str	r3, [r4, #24]
+.L2547:
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r2, r3, #1
+	beq	.L2548
+	cmp	r3, #512
+	beq	.L2548
+	ldr	r3, [r4, #12]
+	ldr	r2, [r3]
+	ldr	r3, .L2603+24
+	cmp	r2, r3
+	beq	.L2549
+.L2548:
+	mov	r0, r4
+	bl	buf_free
+	ldr	r2, [r4, #12]
+	ldr	r3, [r4, #4]
+	ldr	r0, .L2603+28
+	ldr	r1, [r2, #12]
+	str	r1, [sp, #24]
+	ldr	r1, [r2, #8]
+	str	r1, [sp, #20]
+	ldr	r1, [r2, #4]
+	str	r1, [sp, #16]
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #8]
+	ldr	r2, [r3, #8]
+	str	r2, [sp, #4]
+	ldr	r2, [r3, #4]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r3, [r3]
+	ldr	r1, [r4, #24]
+	movs	r4, #0
+	bl	printf
+	ldr	r3, .L2603+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, [r7]
+.L2602:
+	ldrh	r2, [r5, #80]
+	strh	r2, [r3, #130]	@ movhi
+.L2550:
+	mov	r2, r4
+	ldrh	r1, [r5, #80]
+	movw	r4, #65535
+	ldr	r0, .L2603+36
+	bl	printf
+	strh	r4, [r5, #80]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, .L2603+4
+	ldr	r2, [r3]
+	ldrh	r0, [r2, #130]
+	cmp	r0, r4
+	mov	r4, r3
+	beq	.L2579
+	bl	ftl_free_sblk
+.L2579:
+	ldr	r3, .L2603+40
+	movs	r0, #0
+	ldr	r2, [r3]
+	movw	r3, #65535
+	strh	r3, [r2, #126]	@ movhi
+	ldr	r2, [r4]
+	strh	r3, [r2, #130]	@ movhi
+	bl	ftl_info_flush
+.L2544:
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2546:
+	cmp	r2, #2
+	bne	.L2547
+	ldr	r2, .L2603+20
+	ldrh	r2, [r2]
+	add	r3, r3, r2, lsl #1
+	subs	r3, r3, #1
+	orr	r3, r3, #33554432
+	b	.L2598
+.L2549:
+	ldr	r8, .L2603+68
+	ldr	r7, .L2603+44
+	ldr	fp, .L2603+56
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r1, [r4, #4]
+	ldr	r0, [fp]
+	ldr	r10, .L2603+60
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldrh	r3, [r8]
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r1, [r4, #4]
+	ldr	r0, [r10]
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	add	r1, r1, r2
+	bl	ftl_memcpy
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	ldr	r1, [fp]
+	ldr	r0, .L2603+48
+	muls	r3, r2, r3
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldrh	r3, [r8]
+	ldr	r1, [r10]
+	ldr	r0, .L2603+52
+	muls	r3, r2, r3
+	movs	r2, #4
+	bl	rknand_print_hex
+	ldr	r3, .L2603+20
+	ldrh	fp, [r3]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #2
+	itt	eq
+	moveq	r3, #1
+	lsleq	fp, fp, #1
+	str	r3, [sp, #44]
+	movs	r3, #0
+	mov	r10, r3
+	str	r3, [sp, #36]
+.L2553:
+	ldr	r3, [sp, #36]
+	cmp	r3, fp
+	beq	.L2562
+	mov	r8, #0
+	b	.L2563
+.L2559:
+	ldr	r3, [sp, #40]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L2603+16
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L2603+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r3, [sp, #56]
+	cmp	r2, #3
+	bne	.L2554
+	ldr	r2, [sp, #36]
+	add	r3, r3, r2
+	orr	r3, r3, r7, lsl #24
+.L2600:
+	str	r3, [r4, #24]
+	movs	r1, #1
+	mov	r0, r4
+	bl	sblk_read_page
+	ldr	r3, .L2603+56
+	ldr	r2, [r4, #12]
+	ldr	r3, [r3]
+	ldr	r1, [r2, #4]
+	ldr	r3, [r3, r6]
+	cmp	r3, r1
+	bne	.L2557
+	ldr	r0, .L2603+60
+	ldr	r0, [r0]
+	ldr	ip, [r0, r6]
+	ldr	r0, [r2, #8]
+	cmp	ip, r0
+	beq	.L2558
+.L2557:
+	ldr	r0, [r2, #12]
+	str	r0, [sp, #16]
+	ldr	r0, [r2, #8]
+	str	r1, [sp, #8]
+	str	r0, [sp, #12]
+	ldr	r2, [r2]
+	ldr	r0, .L2603+64
+	str	r2, [sp, #4]
+	ldr	r2, .L2603+60
+	ldr	r2, [r2]
+	ldr	r2, [r2, r6]
+	str	r2, [sp]
+	ldr	r2, [r4, #36]
+	ldr	r1, [r4, #24]
+	bl	printf
+	ldr	r3, .L2603+56
+	ldr	r3, [r3]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	beq	.L2558
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L2603+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2603+4
+	ldr	r3, [r3]
+	b	.L2602
+.L2554:
+	cmp	r2, #2
+	ldr	r2, [sp, #36]
+	itett	eq
+	addeq	r2, r2, #-1
+	addne	r3, r3, r2
+	addeq	r3, r3, r2
+	addeq	r3, r3, r7
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L2600
+.L2558:
+	add	r10, r10, #1
+	adds	r7, r7, #1
+	adds	r6, r6, #4
+.L2561:
+	ldr	r3, [sp, #44]
+	cmp	r3, r7
+	bcs	.L2559
+	add	r8, r8, #1
+.L2563:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	r8, r3
+	bge	.L2560
+	add	r3, r5, r8, lsl #1
+	lsl	r6, r10, #2
+	str	r3, [sp, #40]
+	movs	r7, #1
+	b	.L2561
+.L2560:
+	ldr	r3, [sp, #36]
+	adds	r3, r3, #1
+	str	r3, [sp, #36]
+	b	.L2553
+.L2562:
+	mov	r0, r4
+	movs	r4, #0
+	bl	buf_free
+	ldr	r3, .L2603+32
+	mov	r6, r4
+	ldr	r0, .L2603+68
+	ldrh	r1, [r5, #80]
+	ldr	r2, [r3]
+	ldrh	r0, [r0]
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	str	r4, [sp, #40]
+	smulbb	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+.L2564:
+	ldr	r3, [sp, #36]
+	cmp	r3, r6
+	beq	.L2577
+	mov	fp, #0
+	b	.L2578
+.L2604:
+	.align	2
+.L2603:
+	.word	.LANCHOR67
+	.word	.LANCHOR60
+	.word	.LANCHOR104
+	.word	.LANCHOR64
+	.word	.LANCHOR75
+	.word	.LANCHOR79
+	.word	-178307901
+	.word	.LC133
+	.word	.LANCHOR56
+	.word	.LC138
+	.word	.LANCHOR46
+	.word	.LANCHOR69
+	.word	.LC134
+	.word	.LC135
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LC136
+	.word	.LANCHOR68
+.L2574:
+	ldr	r3, .L2605
+	ldr	r2, [sp, #40]
+	ldr	r3, [r3]
+	ldr	r10, [r3, r2, lsl #2]
+	cmp	r10, #-1
+	beq	.L2565
+	ldr	r3, .L2605+4
+	mov	r0, r10
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2, lsl #2]
+	str	r3, [sp, #48]
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #60]
+	adds	r0, r0, #1
+	bne	.L2566
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r10
+	bl	pm_log2phys
+.L2566:
+	ldr	r3, [sp, #52]
+	ldrh	r2, [r3, #96]
+	ldr	r3, .L2605+8
+	ldrh	r3, [r3]
+	muls	r3, r2, r3
+	ldr	r2, .L2605+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, #3
+	bne	.L2567
+	add	r3, r3, r6
+	orr	r3, r3, r8, lsl #24
+.L2601:
+	str	r3, [sp, #56]
+	movs	r2, #1
+	ldr	r3, .L2605+16
+	ldrh	r0, [r3]
+	rsb	r3, r0, #21
+	lsl	r3, r2, r3
+	ldr	r2, [sp, #48]
+	subs	r3, r3, #1
+	lsr	r0, r2, r0
+	ldr	r2, .L2605+20
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	ldr	r2, [sp, #48]
+	mov	r7, r0
+	ldr	r3, [sp, #60]
+	cmp	r2, r3
+	ldr	r2, [sp, #56]
+	bne	.L2570
+	mov	r1, r10
+	ldr	r0, .L2605+24
+	bl	pm_ppa_update_check
+	cbz	r0, .L2571
+.L2597:
+	b	.L2597
+.L2567:
+	cmp	r2, #2
+	itett	eq
+	addeq	r2, r6, #-1
+	addne	r3, r3, r6
+	addeq	r3, r3, r2
+	addeq	r3, r3, r8
+	it	eq
+	orreq	r3, r3, #33554432
+	b	.L2601
+.L2571:
+	movs	r2, #1
+	add	r1, sp, #56
+	mov	r0, r10
+	adds	r4, r4, #1
+	bl	pm_log2phys
+	uxth	r0, r7
+	bl	ftl_vpn_decrement
+.L2573:
+	ldr	r3, [sp, #40]
+	uxth	r7, r7
+	adds	r3, r3, #1
+	str	r3, [sp, #40]
+	ldr	r3, .L2605+28
+	ldr	r3, [r3]
+	add	r3, r3, r7, lsl #2
+	ldrb	r3, [r3, #2]	@ zero_extendqisi2
+	ands	r3, r3, #224
+	bne	.L2565
+	ldr	r2, .L2605+32
+	ldr	r2, [r2]
+	ldrh	r1, [r2, r7, lsl #1]
+	cbz	r1, .L2565
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+.L2565:
+	add	r8, r8, #1
+.L2576:
+	ldr	r3, [sp, #44]
+	cmp	r3, r8
+	bcs	.L2574
+	add	fp, fp, #1
+.L2578:
+	ldrb	r3, [r5, #89]	@ zero_extendqisi2
+	cmp	fp, r3
+	bge	.L2575
+	add	r3, r5, fp, lsl #1
+	mov	r8, #1
+	str	r3, [sp, #52]
+	b	.L2576
+.L2570:
+	cmp	r3, r2
+	it	eq
+	addeq	r4, r4, #1
+	b	.L2573
+.L2575:
+	adds	r6, r6, #1
+	b	.L2564
+.L2577:
+	ldr	r3, .L2605+32
+	ldrh	r2, [r5, #80]
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	b	.L2550
+.L2545:
+	ldr	r3, [r7]
+	ldrh	r3, [r3, #130]
+	cmp	r3, r6
+	beq	.L2544
+	ldr	r5, .L2605+36
+	ldr	r2, [r5]
+	ldrh	r2, [r2, #126]
+	cmp	r2, r3
+	bne	.L2581
+	bl	pm_flush
+	ldr	r3, [r7]
+	ldrh	r0, [r3, #130]
+	bl	ftl_free_sblk
+	ldr	r3, [r5]
+	mov	r0, r4
+	strh	r6, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+.L2581:
+	ldr	r3, [r7]
+	movw	r2, #65535
+	strh	r2, [r3, #130]	@ movhi
+	b	.L2544
+.L2606:
+	.align	2
+.L2605:
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR75
+	.word	.LANCHOR64
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LC137
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LANCHOR46
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.ftl_init,"ax",%progbits
+	.align	1
+	.global	ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_init, %function
+ftl_init:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #255
+	ldr	r2, .L2619
+	movs	r5, #0
+	ldr	r6, .L2619+4
+	strb	r3, [r2]
+	ldr	r2, .L2619+8
+	ldr	r1, .L2619+12
+	ldr	r0, .L2619+16
+	strb	r5, [r2]
+	ldr	r2, .L2619+20
+	ldr	r8, .L2619+144
+	ldr	r7, .L2619+24
+	strb	r3, [r2]
+	mov	r2, #-1
+	ldr	r3, .L2619+28
+	strb	r5, [r3]
+	ldr	r3, .L2619+32
+	str	r2, [r3]
+	bl	printf
+	ldrb	r1, [r6, #12]	@ zero_extendqisi2
+	ldr	r3, .L2619+36
+	ldrb	r2, [r6, #9]	@ zero_extendqisi2
+	ldrh	r10, [r6, #10]
+	strb	r1, [r3]
+	ldr	r3, .L2619+40
+	mov	r0, r10
+	str	r2, [sp, #4]
+	strb	r2, [r3]
+	ldr	r3, .L2619+44
+	strh	r10, [r3]	@ movhi
+	bl	__aeabi_idiv
+	ldr	r1, .L2619+48
+	mov	r3, r0
+	strh	r0, [r8]	@ movhi
+	ldr	r0, .L2619+52
+	ldrb	r4, [r1]	@ zero_extendqisi2
+	ldr	r1, .L2619+56
+	ldr	r2, [sp, #4]
+	ldr	ip, .L2619+148
+	strb	r4, [r1]
+	ldrb	r1, [r6, #13]	@ zero_extendqisi2
+	lsl	fp, r2, #9
+	ldrh	r6, [r6, #14]
+	str	ip, [sp, #4]
+	strb	r1, [r0]
+	uxth	fp, fp
+	smulbb	r4, r4, r1
+	ldr	r1, .L2619+60
+	ldr	r0, .L2619+64
+	strh	r6, [ip]	@ movhi
+	ldrh	lr, [r1]
+	uxtb	r4, r4
+	ldr	r1, .L2619+68
+	strb	r4, [r7]
+	strh	fp, [r0]	@ movhi
+	strh	lr, [r1]	@ movhi
+	movs	r1, #1
+	str	r0, [sp, #8]
+.L2608:
+	cmp	lr, r1
+	uxth	r0, r5
+	add	r5, r5, #1
+	bcs	.L2609
+	mul	r10, r10, r2
+	subs	r1, r0, #1
+	ldr	r0, .L2619+72
+	mov	r5, #1892352
+	muls	r5, r4, r5
+	str	r3, [sp, #12]
+	strh	r1, [r0]	@ movhi
+	mul	r1, r6, r10
+	lsrs	r0, r1, #21
+	muls	r1, r4, r1
+	muls	r5, r0, r5
+	ldr	r0, .L2619+76
+	str	r5, [r0]
+	add	r5, r5, #24576
+	ldr	r0, .L2619+80
+	str	r1, [r0]
+	mov	r0, r5
+	ldr	r1, .L2619+84
+	str	r5, [r1]
+	mov	r1, r2
+	bl	__aeabi_uidiv
+	ldr	r2, .L2619+88
+	mov	r1, fp
+	str	r0, [r2]
+	add	r2, fp, #-1
+	add	r0, r2, r0, lsl #2
+	ldr	fp, .L2619+152
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #12]
+	strh	r0, [fp]	@ movhi
+	uxth	r0, r0
+	lsls	r0, r0, #4
+	mul	r1, r4, r3
+	bl	__aeabi_idiv
+	ldr	r3, .L2619+92
+	mul	r1, r4, r10
+	strh	r0, [r3]	@ movhi
+	mov	r0, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L2619+96
+	adds	r0, r0, #2
+	ldr	r2, .L2619+100
+	ldr	r5, .L2619+104
+	strh	r0, [r3]	@ movhi
+	add	r3, r6, r6, lsl #1
+	lsrs	r6, r6, #4
+	asrs	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L2619+108
+	strh	r6, [r3]	@ movhi
+	bl	buf_init
+	ldrh	r3, [r8]
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L2619+112
+	ldrb	r1, [r7]	@ zero_extendqisi2
+	ldr	r2, .L2619+116
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r3, .L2619+120
+	muls	r0, r1, r0
+	ldr	r1, .L2619+124
+	str	r2, [r3]
+	add	r3, r2, r0, lsl #3
+	str	r3, [r1]
+	ldr	r1, [sp, #4]
+	ldrh	r1, [r1]
+	lsrs	r1, r1, #1
+	add	r1, r1, r0, lsl #1
+	ldr	r0, .L2619+128
+	add	r1, r2, r1, lsl #2
+	str	r1, [r5]
+	bl	printf
+	ldrh	r2, [r8]
+	ldrb	r4, [r7]	@ zero_extendqisi2
+	ldr	r3, [sp, #4]
+	ldr	r0, .L2619+132
+	ldrh	r3, [r3]
+	muls	r4, r2, r4
+	ldrh	r2, [fp]
+	add	r4, r3, r4, lsl #2
+	lsls	r6, r3, #2
+	ldr	r3, [sp, #8]
+	add	r6, r6, r2, lsl #2
+	lsls	r4, r4, #1
+	add	r6, r6, #704
+	add	r4, r4, #600
+	ldrh	r3, [r3]
+	mov	r2, r6
+	mov	r1, r4
+	bl	printf
+	ldr	r3, [sp, #8]
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	bhi	.L2610
+	cmp	r6, r3
+	bls	.L2611
+.L2610:
+.L2618:
+	b	.L2618
+.L2609:
+	lsls	r1, r1, #1
+	b	.L2608
+.L2611:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	adds	r3, r0, #1
+	beq	.L2607
+	bl	ftl_ext_info_init
+	movs	r0, #1
+	ldr	r4, .L2619+136
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	r0, [r5]
+	movs	r1, #0
+	adds	r0, r0, #16
+	bl	ftl_open_sblk_recovery
+	ldr	r0, [r5]
+	add	r1, r0, #16
+	adds	r0, r0, #48
+	bl	ftl_open_sblk_recovery
+	ldr	r2, [r4]
+	ldr	r0, [r5]
+	ldr	r3, [r2, #8]
+	adds	r0, r0, #16
+	adds	r3, r3, #16
+	str	r3, [r2, #8]
+	bl	ftl_info_data_recovery
+	ldr	r0, [r5]
+	adds	r0, r0, #48
+	bl	ftl_info_data_recovery
+	ldr	r0, [r5]
+	adds	r0, r0, #80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	ftl_info_check
+	bl	pm_flush
+	movs	r0, #1
+	bl	ftl_total_vpn_update
+	ldr	r3, .L2619+140
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2613
+	ldr	r2, [r4]
+	ldr	r3, [r2, #68]
+	adds	r3, r3, #1
+	str	r3, [r2, #68]
+.L2613:
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	movs	r0, #0
+.L2607:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2620:
+	.align	2
+.L2619:
+	.word	.LANCHOR42
+	.word	.LANCHOR19
+	.word	.LANCHOR43
+	.word	.LC139
+	.word	.LC32
+	.word	.LANCHOR127
+	.word	.LANCHOR69
+	.word	.LANCHOR89
+	.word	.LANCHOR49
+	.word	.LANCHOR64
+	.word	.LANCHOR45
+	.word	.LANCHOR68
+	.word	.LANCHOR8
+	.word	.LANCHOR70
+	.word	.LANCHOR76
+	.word	.LANCHOR13
+	.word	.LANCHOR149
+	.word	.LANCHOR75
+	.word	.LANCHOR71
+	.word	.LANCHOR52
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR47
+	.word	.LANCHOR101
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR60
+	.word	.LANCHOR165
+	.word	.LANCHOR83
+	.word	ftl_ext_info_data_buffer
+	.word	.LANCHOR82
+	.word	.LANCHOR56
+	.word	.LC140
+	.word	.LC141
+	.word	.LANCHOR46
+	.word	.LANCHOR133
+	.word	.LANCHOR79
+	.word	.LANCHOR54
+	.word	.LANCHOR137
+	.size	ftl_init, .-ftl_init
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	nand_flash_init
+	mov	r4, r0
+	cbnz	r0, .L2622
+	bl	ftl_init
+	mov	r4, r0
+.L2622:
+	mov	r1, r4
+	ldr	r0, .L2623
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2624:
+	.align	2
+.L2623:
+	.word	.LC142
+	.size	rk_ftl_init, .-rk_ftl_init
+	.global	__aeabi_idivmod
+	.section	.text.ftl_update_l2p_map,"ax",%progbits
+	.align	1
+	.global	ftl_update_l2p_map
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2650
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r7, [r0, #9]	@ zero_extendqisi2
+	mov	r6, r0
+	ldrh	r3, [r3]
+	ldr	r2, .L2650+4
+	muls	r7, r3, r7
+	ldr	r4, [r2]
+	ldrh	r3, [r0, #12]
+	str	r2, [sp, #4]
+	add	r4, r4, r3, lsl #2
+	add	r3, r7, #1073741824
+	subs	r3, r3, #1
+	ldr	r3, [r4, r3, lsl #2]
+	adds	r3, r3, #1
+	bne	.L2626
+	movs	r5, #0
+	subs	r4, r4, #4
+	mov	r10, r5
+.L2627:
+	cmp	r10, r7
+	bne	.L2635
+	ldr	r3, .L2650+8
+	ldr	r4, .L2650+12
+	ldr	r3, [r3]
+	tst	r3, #4096
+	beq	.L2636
+	ldrh	r1, [r6]
+	mov	r2, r5
+	ldr	r3, [r4]
+	ldr	r0, .L2650+16
+	ldrh	r3, [r3, r1, lsl #1]
+	bl	printf
+.L2636:
+	ldrh	r2, [r6]
+	ldr	r3, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2626:
+	movw	r2, #882
+	ldr	r1, .L2650+20
+	ldr	r0, .L2650+24
+	bl	printf
+.L2628:
+	b	.L2628
+.L2635:
+	ldr	r8, [r4, #4]!
+	cmp	r8, #-1
+	beq	.L2629
+	ldr	r3, .L2650+28
+	mov	r0, r8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	uxth	r3, r0
+	str	r3, [sp]
+	ldr	r3, .L2650+8
+	ldr	r3, [r3]
+	lsls	r2, r3, #19
+	bpl	.L2630
+	mov	r3, r10
+	mov	r2, r8
+	ldr	r1, [sp]
+	ldr	r0, .L2650+32
+	bl	printf
+.L2630:
+	mov	r8, r4
+	mov	fp, r10
+.L2634:
+	ldr	r0, [r8]
+	adds	r3, r0, #1
+	beq	.L2631
+	ldr	r3, .L2650+28
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	lsls	r1, r1, #7
+	bl	__aeabi_uidiv
+	ldr	r3, [sp]
+	uxth	r0, r0
+	cmp	r3, r0
+	bne	.L2631
+	ldrb	r3, [r6, #9]	@ zero_extendqisi2
+	mov	r0, fp
+	mov	r1, r3
+	str	r3, [sp, #12]
+	bl	__aeabi_idivmod
+	ldr	r3, .L2650+36
+	adds	r1, r1, #8
+	ldrh	r0, [r6, r1, lsl #1]
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #12]
+	muls	r2, r0, r2
+	mov	r1, r3
+	mov	r0, fp
+	str	r2, [sp, #8]
+	bl	__aeabi_idiv
+	ldr	r2, [sp, #8]
+	add	r2, r2, r0
+	ldr	r0, .L2650+40
+	str	r2, [sp, #20]
+	ldr	r1, [r8]
+	bl	pm_ppa_update_check
+	cbz	r0, .L2632
+	ldr	r1, [sp, #4]
+	mov	r3, r7
+	movs	r2, #4
+	ldr	r0, .L2650+44
+	ldr	r1, [r1]
+	bl	rknand_print_hex
+.L2633:
+	b	.L2633
+.L2632:
+	adds	r5, r5, #1
+	movs	r2, #1
+	uxth	r5, r5
+	add	r1, sp, #20
+	ldr	r0, [r8]
+	bl	pm_log2phys
+	mov	r3, #-1
+	str	r3, [r8]
+.L2631:
+	add	fp, fp, #1
+	add	r8, r8, #4
+	cmp	r7, fp
+	bne	.L2634
+.L2629:
+	add	r10, r10, #1
+	b	.L2627
+.L2651:
+	.align	2
+.L2650:
+	.word	.LANCHOR79
+	.word	.LANCHOR82
+	.word	.LANCHOR22
+	.word	.LANCHOR56
+	.word	.LC146
+	.word	.LANCHOR166
+	.word	.LC0
+	.word	.LANCHOR45
+	.word	.LC143
+	.word	.LANCHOR75
+	.word	.LC144
+	.word	.LC145
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",%progbits
+	.align	1
+	.global	ftl_alloc_new_data_sblk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r4, r0
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	ldr	r3, .L2655
+	mov	r0, r4
+	ldr	r1, [r3]
+	adds	r1, r1, #16
+	cmp	r4, r1
+	ite	eq
+	moveq	r1, #2
+	movne	r1, #3
+	bl	ftl_open_sblk_init
+	bl	ftl_ext_info_flush
+	movs	r0, #0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	movs	r0, #0
+	pop	{r4, pc}
+.L2656:
+	.align	2
+.L2655:
+	.word	.LANCHOR60
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",%progbits
+	.align	1
+	.global	ftl_write_commit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r8, .L2717+24
+.L2658:
+	ldr	r0, .L2717
+	ldrb	r2, [r0]	@ zero_extendqisi2
+	cmp	r2, #0
+	beq	.L2660
+	ldr	r4, .L2717+4
+	movs	r1, #48
+	subs	r2, r2, #1
+	strb	r2, [r0]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r2, .L2717+8
+	str	r3, [sp, #16]
+	add	r3, r3, r3, lsl #1
+	ldr	r2, [r2]
+	add	r3, r8, r3, lsl #4
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #16]
+	muls	r1, r3, r1
+	add	r3, r8, r1
+	ldrb	r1, [r8, r1]	@ zero_extendqisi2
+	ldr	r7, [r3, #20]
+	strb	r1, [r4]
+	cmp	r7, r2
+	bcc	.L2662
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	mov	r0, #-1
+.L2657:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2662:
+	ldr	r2, [r3, #12]
+	ldr	fp, [r3, #4]
+	ldrb	r4, [r3, #41]	@ zero_extendqisi2
+	ldrb	r3, [r3, #40]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	ldr	r3, .L2717+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2664
+	ldr	r3, .L2717+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	add	r3, r8, r3, lsl #4
+.L2665:
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	cmp	r2, #255
+	bne	.L2666
+	ldr	r2, [r3, #20]
+	cmp	r7, r2
+	bne	.L2664
+	ldr	r0, [r3, #4]
+	lsls	r4, r4, #9
+	ldr	r3, [sp, #12]
+	add	r1, fp, r4
+	add	r0, r0, r4
+	lsls	r2, r3, #9
+	bl	ftl_memcpy
+	ldr	r0, [sp, #20]
+	bl	buf_free
+	b	.L2658
+.L2666:
+	add	r2, r2, r2, lsl #1
+	add	r3, r8, r2, lsl #4
+	b	.L2665
+.L2664:
+	mov	r0, r7
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #28]
+	adds	r0, r0, #1
+	bne	.L2668
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r7
+	bl	pm_log2phys
+.L2668:
+	ldr	r3, .L2717+20
+	ldr	r2, .L2717+24
+	ldr	r0, [r3]
+	movs	r3, #0
+.L2671:
+	ldr	r1, [r2, #20]
+	cmp	r7, r1
+	bne	.L2669
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	lsls	r5, r1, #28
+	bpl	.L2669
+	movs	r2, #48
+	bic	r1, r1, #8
+	mla	r3, r2, r3, r8
+	strb	r1, [r3, #2]
+	ldr	r5, [r3, #4]
+	ldr	r3, [r3, #24]
+	str	r3, [sp, #28]
+.L2670:
+	ldr	r6, .L2717+28
+	ldr	r2, [sp, #12]
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r2, r3
+	bcc	.L2672
+	add	r6, r0, #16
+.L2716:
+	mov	r10, #0
+.L2673:
+	ldrh	r3, [r6, #6]
+	cbnz	r3, .L2688
+	bl	ftl_flush
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L2688:
+	mov	r0, r6
+	ldr	r5, .L2717+12
+	bl	ftl_get_new_free_page
+	ldr	r2, [sp, #16]
+	movs	r3, #48
+	ldr	r4, [sp, #8]
+	muls	r3, r2, r3
+	add	r2, r8, r3
+	ldr	r1, [r2, #16]
+	str	r7, [r4, #4]
+	str	r10, [r4, #12]
+	str	r1, [r4]
+	ldr	r1, [sp, #28]
+	str	r1, [r4, #8]
+	str	r1, [r2, #28]
+	movs	r1, #255
+	strb	r1, [r8, r3]
+	ldrb	r3, [r2, #2]	@ zero_extendqisi2
+	ldrh	r1, [r6, #12]
+	str	r0, [r2, #24]
+	orr	r3, r3, #10
+	ldr	r0, .L2717+16
+	strb	r3, [r2, #2]
+	ldrh	r3, [r6, #10]
+	add	r3, r3, r1
+	ldr	r1, [sp, #20]
+	subs	r3, r3, #1
+	strh	r3, [r2, #32]	@ movhi
+	bl	buf_add_tail
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r2, .L2717+32
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	str	r1, [r2]
+	ldrh	r2, [r6, #6]
+	cmp	r3, #2
+	strb	r3, [r5]
+	bhi	.L2689
+	cmp	r2, #1
+	bne	.L2661
+.L2689:
+	ldr	r7, .L2717+16
+	mov	ip, #48
+	ldrb	r1, [r6, #5]	@ zero_extendqisi2
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	cmp	r1, #0
+	mov	r1, #0
+	ite	ne
+	movne	r4, #2
+	moveq	r4, #1
+	cmp	r2, #1
+	it	eq
+	moveq	r4, r3
+	mov	r2, r0
+.L2693:
+	cmp	r1, r4
+	bne	.L2694
+	uxtb	r1, r1
+	add	r0, r0, r0, lsl #1
+	strb	r2, [r7]
+	subs	r3, r3, r1
+	add	r0, r8, r0, lsl #4
+	strb	r3, [r5]
+	bl	sblk_prog_page
+	ldrh	r3, [r6, #6]
+	cmp	r3, #1
+	bne	.L2661
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	r0, r6
+	bl	ftl_write_last_log_page
+	mov	r0, r6
+	bl	ftl_alloc_new_data_sblk
+.L2661:
+	ldr	r3, .L2717
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2658
+.L2660:
+	bl	ftl_write_completed
+	movs	r0, #0
+	b	.L2657
+.L2669:
+	adds	r3, r3, #1
+	adds	r2, r2, #48
+	cmp	r3, #32
+	bne	.L2671
+	movs	r5, #0
+	b	.L2670
+.L2672:
+	cbz	r5, .L2674
+	cbz	r4, .L2675
+	lsls	r2, r4, #9
+	mov	r1, r5
+	mov	r0, fp
+	bl	ftl_memcpy
+.L2675:
+	ldr	r2, [sp, #12]
+	ldr	r3, .L2717+20
+	add	r4, r4, r2
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	cmp	r4, r2
+	bcc	.L2676
+	add	r6, r3, #16
+	b	.L2716
+.L2676:
+	lsls	r0, r4, #9
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	add	r6, r3, #48
+	adds	r1, r5, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L2716
+.L2674:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	beq	.L2677
+	movs	r0, #1
+	bl	buf_alloc
+	ldr	r3, [sp, #28]
+	mov	r5, r0
+	str	r7, [r0, #20]
+	movs	r1, #1
+	str	r3, [r0, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #12]
+	ldr	r2, [r3, #12]
+	ldr	r3, [r3, #4]
+	add	r10, r2, #1
+	cmp	r7, r3
+	ldr	r3, [r5, #36]
+	bne	.L2678
+	adds	r2, r3, #1
+	bne	.L2679
+.L2678:
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	ldr	r2, [sp, #28]
+	str	r3, [sp]
+	mov	r3, r7
+	ldr	r0, .L2717+36
+	bl	printf
+	movs	r3, #4
+	ldr	r1, [r5, #12]
+	mov	r2, r3
+	ldr	r0, .L2717+40
+	bl	rknand_print_hex
+	ldr	r3, .L2717+44
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #28]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2717+48
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2679:
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	cmp	r7, r3
+	bne	.L2680
+	ldr	r3, [r5, #36]
+	adds	r3, r3, #1
+	bne	.L2681
+.L2680:
+	movw	r2, #445
+	ldr	r1, .L2717+52
+	ldr	r0, .L2717+56
+	bl	printf
+.L2682:
+	b	.L2682
+.L2718:
+	.align	2
+.L2717:
+	.word	.LANCHOR43
+	.word	.LANCHOR42
+	.word	.LANCHOR47
+	.word	.LANCHOR89
+	.word	.LANCHOR127
+	.word	.LANCHOR60
+	.word	.LANCHOR36
+	.word	.LANCHOR45
+	.word	.LANCHOR168
+	.word	.LC147
+	.word	.LC96
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR167
+	.word	.LC0
+.L2681:
+	cbz	r4, .L2683
+	ldr	r3, [sp, #28]
+	lsls	r2, r4, #9
+	adds	r3, r3, #1
+	beq	.L2684
+	ldr	r1, [r5, #4]
+	mov	r0, fp
+	bl	ftl_memcpy
+.L2683:
+	ldr	r2, [sp, #12]
+	ldr	r3, .L2719
+	add	r4, r4, r2
+	ldr	r2, .L2719+4
+	ldr	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r6, r3, #48
+	cmp	r4, r2
+	bcc	.L2685
+	add	r6, r3, #16
+.L2686:
+	cmp	r5, #0
+	beq	.L2673
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	mov	r1, r5
+	ldr	r0, .L2719+8
+	bic	r3, r3, #8
+	strb	r3, [r5, #2]
+	bl	buf_remove_buf
+	mov	r0, r5
+	bl	buf_free
+	b	.L2673
+.L2685:
+	ldr	r3, [sp, #28]
+	subs	r2, r2, r4
+	lsls	r2, r2, #9
+	lsls	r0, r4, #9
+	adds	r3, r3, #1
+	beq	.L2687
+	ldr	r1, [r5, #4]
+	add	r1, r1, r0
+	add	r0, r0, fp
+	bl	ftl_memcpy
+	b	.L2686
+.L2687:
+	movs	r1, #0
+	add	r0, r0, fp
+	bl	ftl_memset
+	b	.L2686
+.L2694:
+	mul	r2, ip, r2
+	adds	r1, r1, #1
+	ldrb	r2, [r8, r2]	@ zero_extendqisi2
+	b	.L2693
+.L2695:
+	lsls	r2, r4, #9
+	mov	r10, r5
+.L2684:
+	movs	r1, #0
+	mov	r0, fp
+	bl	ftl_memset
+	b	.L2683
+.L2677:
+	cmp	r4, #0
+	bne	.L2695
+	mov	r10, r4
+	mov	r5, r4
+	b	.L2683
+.L2720:
+	.align	2
+.L2719:
+	.word	.LANCHOR60
+	.word	.LANCHOR45
+	.word	.LANCHOR51
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r5, r2
+	sub	sp, sp, #32
+	mov	r10, r3
+	cmp	r0, #0
+	bne	.L2722
+	ldr	r3, .L2773
+	mov	fp, #24576
+	ldr	r3, [r3]
+.L2723:
+	adds	r2, r1, r5
+	cmp	r3, r2
+	bcc	.L2744
+	ldr	r3, .L2773+4
+	add	fp, fp, r1
+	ldr	r3, [r3]
+	lsls	r3, r3, #19
+	bpl	.L2725
+	mov	r1, r0
+	str	r10, [sp]
+	mov	r3, r5
+	mov	r2, fp
+	ldr	r0, .L2773+8
+	bl	printf
+.L2725:
+	ldr	r6, .L2773+12
+	mov	r0, fp
+	ldr	r7, .L2773+16
+	ldr	r3, [r6]
+	ldrb	r8, [r7]	@ zero_extendqisi2
+	ldr	r2, [r3, #8]
+	mov	r1, r8
+	str	r2, [sp, #12]
+	adds	r2, r2, #1
+	str	r2, [r3, #8]
+	bl	__aeabi_uidiv
+	mov	r1, r8
+	mov	r4, r0
+	mov	r0, fp
+	bl	__aeabi_uidivmod
+	mov	fp, r1
+	cmp	r1, #0
+	beq	.L2726
+	sub	r3, r8, r1
+	cmp	r3, r5
+	it	cs
+	movcs	r3, r5
+	cmp	r10, #1
+	mov	r8, r3
+	uxth	r3, r3
+	str	r3, [sp, #16]
+	bhi	.L2728
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L2729
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r4
+	bl	pm_log2phys
+.L2729:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2728
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r3, r0
+	cbz	r0, .L2728
+	ldr	r2, [sp, #12]
+	movs	r1, #0
+	str	r4, [r0, #20]
+	strb	fp, [r0, #41]
+	str	r3, [sp, #20]
+	strb	r8, [r3, #40]
+	str	r2, [r0, #16]
+	ldr	r3, [sp, #16]
+	ldr	r0, [r0, #4]
+	lsls	r2, r3, #9
+	add	r0, r0, fp, lsl #9
+	bl	ftl_memset
+	ldr	r3, [sp, #20]
+	mov	r0, r3
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r6]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L2728:
+	ldr	r3, [sp, #16]
+	adds	r4, r4, #1
+	subs	r5, r5, r3
+.L2726:
+	cbz	r5, .L2731
+	bl	ftl_flush
+.L2731:
+	ldr	fp, .L2773+32
+	mov	r3, #-1
+	str	r3, [sp, #28]
+.L2732:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcs	.L2737
+	cmp	r10, #1
+	bls	.L2738
+.L2739:
+	movs	r0, #0
+.L2721:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2722:
+	cmp	r0, #3
+	bhi	.L2744
+	lsl	fp, r0, #13
+	mov	r3, #8192
+	b	.L2723
+.L2737:
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	add	r1, sp, #32
+	movs	r2, #0
+	str	r0, [r1, #-8]!
+	adds	r0, r0, #1
+	mov	r0, r4
+	beq	.L2733
+	bl	pm_log2phys
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2735
+	movs	r2, #1
+	add	r1, sp, #28
+	mov	r0, r4
+	bl	pm_log2phys
+.L2772:
+	ldr	r2, [r6]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+.L2735:
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	adds	r4, r4, #1
+	subs	r5, r5, r3
+	b	.L2732
+.L2733:
+	bl	pm_log2phys
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2735
+	add	r1, sp, #28
+	movs	r2, #1
+	mov	r0, r4
+	bl	pm_log2phys
+	ldr	r3, .L2773+20
+	ldrb	r1, [fp]	@ zero_extendqisi2
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [sp, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	bl	ftl_vpn_decrement
+	b	.L2772
+.L2738:
+	cmp	r5, #0
+	beq	.L2739
+	mov	r0, r4
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #24]
+	adds	r0, r0, #1
+	bne	.L2740
+	movs	r2, #0
+	add	r1, sp, #24
+	mov	r0, r4
+	bl	pm_log2phys
+.L2740:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	beq	.L2739
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r10, r0
+	cmp	r0, #0
+	beq	.L2739
+	ldr	r3, [sp, #12]
+	str	r4, [r0, #20]
+	movs	r4, #0
+	strb	r4, [r0, #41]
+	str	r3, [r0, #16]
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	strb	r5, [r0, #40]
+	cmp	r5, r3
+	bcc	.L2741
+	mov	r2, #1048
+	ldr	r1, .L2773+24
+	ldr	r0, .L2773+28
+	bl	printf
+.L2742:
+	b	.L2742
+.L2741:
+	lsls	r2, r5, #9
+	mov	r1, r4
+	ldr	r0, [r0, #4]
+	bl	ftl_memset
+	mov	r0, r10
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	r2, [r6]
+	ldr	r3, [r2, #76]
+	adds	r3, r3, #1
+	str	r3, [r2, #76]
+	b	.L2739
+.L2744:
+	mov	r0, #-1
+	b	.L2721
+.L2774:
+	.align	2
+.L2773:
+	.word	.LANCHOR52
+	.word	.LANCHOR22
+	.word	.LC148
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.word	.LANCHOR71
+	.word	.LANCHOR169
+	.word	.LC0
+	.word	.LANCHOR70
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlDiscard,"ax",%progbits
+	.align	1
+	.global	FtlDiscard
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlDiscard, %function
+FtlDiscard:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r3, #0
+	mov	r2, r1
+	mov	r1, r0
+	mov	r0, r3
+	b	ftl_discard
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.gc_do_copy_back,"ax",%progbits
+	.align	1
+	.global	gc_do_copy_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2877
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	cmp	r0, #0
+	bne	.L2777
+	bl	buf_alloc
+	mov	r4, r0
+	cmp	r0, #0
+	beq	.L2776
+	ldr	r6, .L2877+4
+	ldrh	r2, [r6, #22]
+	mov	r0, r2
+	bl	gc_get_src_ppa_from_index
+	movs	r1, #1
+	adds	r2, r2, #1
+	str	r0, [r4, #24]
+	mov	r7, r0
+	mov	r0, r4
+	strh	r2, [r6, #22]	@ movhi
+	bl	sblk_read_page
+	ldr	r3, [r4, #36]
+	adds	r0, r3, #1
+	beq	.L2779
+	cmp	r3, #512
+	bne	.L2780
+.L2779:
+	ldr	r3, .L2877+8
+	ldrh	r0, [r3]
+	movs	r3, #1
+	rsb	r2, r0, #21
+	lsls	r3, r3, r2
+	ldr	r2, .L2877+12
+	lsr	r0, r7, r0
+	subs	r3, r3, #1
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	ands	r0, r0, r3
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+.L2780:
+	ldr	r3, [r4, #36]
+	adds	r1, r3, #1
+	beq	.L2781
+	cmp	r3, #512
+	bne	.L2782
+.L2781:
+	mov	r2, #556
+	ldr	r1, .L2877+16
+	ldr	r0, .L2877+20
+	bl	printf
+.L2783:
+	b	.L2783
+.L2782:
+	ldr	r3, [r4, #12]
+	ldr	r5, [r3, #4]
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	str	r0, [sp, #48]
+	adds	r0, r0, #1
+	bne	.L2784
+	movs	r2, #0
+	add	r1, sp, #48
+	mov	r0, r5
+	bl	pm_log2phys
+.L2784:
+	ldr	r8, [sp, #48]
+	cmp	r7, r8
+	bne	.L2785
+	ldr	r0, .L2877+24
+	movs	r3, #0
+.L2788:
+	adds	r2, r0, r3
+	ldr	r1, [r2, #20]
+	cmp	r5, r1
+	bne	.L2786
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	lsls	r2, r2, #30
+	bpl	.L2786
+	mov	r0, r4
+	bl	buf_free
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r1, r3, #23
+	bpl	.L2776
+	ldrh	r3, [r6, #22]
+	mov	r2, r7
+	mov	r1, r5
+	ldr	r0, .L2877+32
+	bl	printf
+.L2776:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2786:
+	adds	r3, r3, #48
+	cmp	r3, #1536
+	bne	.L2788
+	movs	r3, #0
+	str	r5, [r4, #20]
+	strb	r3, [r4, #41]
+	ldr	r3, .L2877+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #40]
+	ldrb	r3, [r4, #2]	@ zero_extendqisi2
+	orr	r3, r3, #10
+	strb	r3, [r4, #2]
+	ldr	r3, [r4, #12]
+	ldr	r3, [r3]
+	str	r3, [r4, #16]
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r2, r3, #23
+	bpl	.L2789
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L2877+40
+	bl	printf
+.L2789:
+	mov	r0, r4
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	ldr	r3, .L2877+44
+	ldr	r2, [r3]
+	ldr	r3, [r2, #60]
+	adds	r3, r3, #1
+	str	r3, [r2, #60]
+	ldrh	r3, [r6, #24]
+	adds	r3, r3, #1
+	strh	r3, [r6, #24]	@ movhi
+	b	.L2776
+.L2785:
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2790
+	mov	r0, r5
+	bl	lpa_hash_get_ppa
+	ldrh	r3, [r6, #22]
+	mov	r2, r8
+	str	r7, [sp]
+	mov	r1, r5
+	str	r3, [sp, #4]
+	mov	r3, r0
+	ldr	r0, .L2877+40
+	bl	printf
+.L2790:
+	mov	r0, r4
+	bl	buf_free
+	b	.L2776
+.L2777:
+	ldr	r3, .L2877+48
+	ldr	r5, .L2877+4
+	ldr	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L2877+52
+	ldrb	r8, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #28]
+	cmp	r8, #3
+	ldrb	r7, [r3, #89]	@ zero_extendqisi2
+	bne	.L2791
+	ldr	r3, .L2877+56
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2792
+	add	r1, r7, r7, lsl #1
+	mov	r0, r4
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	sub	r0, r7, r7, lsl #2
+	str	r8, [sp, #32]
+	smulbb	r0, r0, r10
+	add	r0, r0, r4
+	uxth	fp, r0
+.L2793:
+	ldr	r3, [sp, #32]
+	muls	r3, r7, r3
+	str	r3, [sp, #36]
+	ldr	r3, .L2877+60
+	ldrh	r1, [r3]
+	ldr	r3, .L2877+64
+	ldr	r8, [r3]
+	muls	r1, r7, r1
+	ldrh	r3, [r5, #20]
+	movs	r7, #0
+	str	r3, [sp, #40]
+	subs	r1, r1, #1
+	ldr	r3, .L2877+4
+.L2796:
+	ldr	r0, [sp, #36]
+	uxth	r2, r7
+	cmp	r2, r0
+	blt	.L2798
+.L2829:
+	movs	r6, #1
+	b	.L2794
+.L2792:
+	mov	r0, r4
+	mov	r1, r7
+	bl	__aeabi_idiv
+	ldr	r3, .L2877+68
+	str	r8, [sp, #32]
+	ldrh	r6, [r3, r0, lsl #1]
+	smulbb	r0, r0, r7
+	subs	r0, r4, r0
+	lsr	r10, r6, #3
+	uxth	fp, r0
+	mla	r4, r7, r10, fp
+	and	r6, r6, #7
+	cmp	r6, #1
+	add	r4, r4, r4, lsl #1
+	uxth	r4, r4
+	beq	.L2793
+.L2794:
+	ldr	r3, .L2877+28
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L2799
+	ldr	r3, .L2877+64
+	mov	r2, r6
+	str	r4, [sp, #8]
+	mov	r1, r10
+	ldr	r0, .L2877+72
+	ldr	r3, [r3]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [sp, #4]
+	ldrh	r3, [r5, #310]
+	str	r3, [sp]
+	mov	r3, fp
+	bl	printf
+.L2799:
+	movs	r3, #0
+.L2875:
+	str	r3, [sp, #40]
+	ldrh	r3, [sp, #40]
+	mov	r8, r3
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #28]
+	ldrb	r2, [r3, #89]	@ zero_extendqisi2
+	ldr	r3, [sp, #32]
+	muls	r3, r2, r3
+	cmp	r8, r3
+	blt	.L2816
+	ldr	r1, .L2877+52
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #3
+	beq	.L2817
+	movs	r0, #0
+	subs	r3, r3, #1
+.L2818:
+	uxth	r1, r0
+	adds	r0, r0, #1
+	cmp	r1, r3
+	blt	.L2824
+	add	r1, sp, #72
+	add	r3, r1, r3, lsl #2
+	movs	r1, #255
+	ldr	r3, [r3, #-24]
+	strb	r1, [r3]
+	ldrh	r3, [sp, #32]
+	ldr	r0, [sp, #48]
+	smulbb	r1, r3, r2
+	uxtb	r1, r1
+	bl	sblk_prog_page
+	b	.L2823
+.L2791:
+	ldr	r3, .L2877+76
+	mov	r1, r7
+	ldrh	r4, [r5, #310]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	mov	r0, r4
+	cbnz	r3, .L2795
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #1
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+.L2873:
+	str	r3, [sp, #32]
+	b	.L2793
+.L2795:
+	bl	__aeabi_idiv
+	uxth	r10, r0
+	movs	r3, #2
+	smulbb	r0, r7, r10
+	subs	r0, r4, r0
+	uxth	fp, r0
+	b	.L2873
+.L2878:
+	.align	2
+.L2877:
+	.word	.LANCHOR67
+	.word	.LANCHOR59
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR170
+	.word	.LC0
+	.word	.LANCHOR36
+	.word	.LANCHOR22
+	.word	.LC149
+	.word	.LANCHOR45
+	.word	.LC150
+	.word	.LANCHOR46
+	.word	.LANCHOR60
+	.word	.LANCHOR64
+	.word	.LANCHOR66
+	.word	.LANCHOR68
+	.word	.LANCHOR108
+	.word	.LANCHOR171
+	.word	.LC151
+	.word	.LANCHOR74
+.L2798:
+	add	r2, r2, r4
+	cmp	r2, r1
+	beq	.L2829
+	ldr	r0, [r8, r2, lsl #2]
+	adds	r0, r0, #1
+	bne	.L2797
+	ldrh	r6, [r3, #22]
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #40]
+	cmp	r6, r3
+	bcs	.L2776
+	mov	r0, r6
+	adds	r6, r6, #1
+	bl	gc_get_src_ppa_from_index
+	ldr	r3, [sp, #44]
+	strh	r6, [r3, #22]	@ movhi
+	str	r0, [r8, r2, lsl #2]
+.L2797:
+	adds	r7, r7, #1
+	b	.L2796
+.L2816:
+	ldr	r3, .L2879
+	add	r7, r4, r8
+	ldr	r3, [r3]
+	ldrb	r3, [r3, r7]	@ zero_extendqisi2
+	cmp	r3, #255
+	bne	.L2801
+	movs	r0, #0
+	bl	buf_alloc
+	mov	r5, r0
+	cbnz	r0, .L2802
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	r0, r5
+	bl	buf_alloc
+	mov	r5, r0
+	cmp	r0, #0
+	beq	.L2776
+.L2802:
+	ldr	r3, .L2879
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	ldr	r3, [r3]
+	strb	r2, [r3, r7]
+	ldr	r2, .L2879+4
+	strb	r6, [r5, #45]
+	ldrb	r3, [r2, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r2, #7]
+	ldr	r3, [sp, #36]
+	add	r3, r3, r4
+	strh	r3, [r5, #32]	@ movhi
+	ldr	r3, .L2879+8
+	ldrh	r2, [r3]
+	ldr	r3, [sp, #28]
+	ldrb	r3, [r3, #89]	@ zero_extendqisi2
+	muls	r3, r2, r3
+	subs	r3, r3, #1
+	cmp	r7, r3
+	bne	.L2803
+	ldr	r3, .L2879+12
+	ldr	r0, [r5, #4]
+	ldr	r1, [r3]
+	mov	r3, #-1
+	str	r3, [r1, r7, lsl #2]
+	ldr	r3, .L2879+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	ldr	r3, .L2879+8
+	ldr	r2, .L2879+16
+	ldr	r0, [r5, #4]
+	ldrh	r3, [r3]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L2879+20
+	ldr	r1, [r3]
+	lsls	r2, r2, #2
+	add	r0, r0, r2
+	bl	ftl_memcpy
+	ldr	r3, .L2879+24
+	movs	r1, #0
+	ldr	r0, [r5, #12]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	lsls	r2, r2, #1
+	bl	ftl_memset
+	ldr	r3, [r5, #12]
+	ldr	r2, .L2879+28
+	ldr	r0, [r5, #4]
+	str	r3, [sp, #44]
+	str	r2, [r3]
+	ldr	r3, .L2879+8
+	ldrh	r2, [r3]
+	ldr	r3, .L2879+16
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	muls	r1, r2, r1
+	lsls	r1, r1, #2
+	bl	js_hash
+	ldr	r2, .L2879+32
+	ldr	r3, [sp, #44]
+	ldr	r2, [r2]
+	str	r0, [r3, #4]
+	ldr	r2, [r2, #132]
+.L2874:
+	str	r2, [r3, #8]
+.L2801:
+	ldr	r3, .L2879
+	ldr	r2, .L2879+36
+	ldr	ip, [r3]
+	add	r3, sp, #72
+	add	r1, r3, r8, lsl #2
+	ldrb	r5, [ip, r7]	@ zero_extendqisi2
+	add	r3, r5, r5, lsl #1
+	add	r3, r2, r3, lsl #4
+	str	r3, [r1, #-24]
+	movs	r3, #48
+	mla	r2, r3, r5, r2
+	movs	r3, #1
+	strh	r3, [r2, #34]	@ movhi
+	ldr	r3, .L2879+40
+	strb	r6, [r2, #45]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bne	.L2811
+	ldr	r3, [sp, #36]
+	ldr	r0, .L2879+44
+	umull	r0, r1, r3, r0
+	ldr	r0, [sp, #28]
+	lsrs	r3, r1, #1
+	uxtah	r1, fp, r3
+	add	r3, r3, r3, lsl #1
+	add	r1, r0, r1, lsl #1
+	ldrh	r0, [r1, #96]
+	ldr	r1, .L2879+48
+	ldrh	r1, [r1]
+	muls	r1, r0, r1
+	ldrh	r0, [r2, #32]
+	orr	r1, r1, r10
+	str	r1, [r2, #24]
+	ldr	r2, .L2879+52
+	ldr	lr, [r2]
+	ldr	r2, [sp, #36]
+	subs	r3, r2, r3
+	lsls	r3, r3, #24
+	add	r3, r3, #16777216
+	orrs	r1, r1, r3
+	str	r1, [lr, r0, lsl #2]
+.L2812:
+	ldr	r3, .L2879+56
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2815
+	ldr	r3, .L2879+4
+	movs	r2, #48
+	ldr	r0, .L2879+60
+	ldrb	r1, [r3, #6]	@ zero_extendqisi2
+	ldr	r3, .L2879+36
+	mla	r5, r2, r5, r3
+	ldr	r2, .L2879+44
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #36]
+	umull	r2, r3, r3, r2
+	mov	r2, r6
+	ubfx	r3, r3, #1, #16
+	add	r3, r3, fp
+	str	r3, [sp, #16]
+	ldrb	r3, [r5, #1]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+	ldrh	r3, [r5, #32]
+	str	r3, [sp, #8]
+	ldr	r3, [r5, #24]
+	str	r3, [sp, #4]
+	ldrb	r3, [ip, r7]	@ zero_extendqisi2
+	str	r3, [sp]
+	mov	r3, r1
+	mov	r1, r8
+	bl	printf
+.L2815:
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	b	.L2875
+.L2803:
+	ldr	r3, .L2879+20
+	movs	r1, #1
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r3, [r3, r7, lsl #2]
+	str	r3, [r5, #24]
+	bl	sblk_read_page
+	ldr	r3, [r5, #36]
+	adds	r1, r3, #1
+	beq	.L2804
+	cmp	r3, #512
+	bne	.L2808
+.L2804:
+	ldr	r3, .L2879+64
+	ldrh	r2, [r3]
+	movs	r3, #1
+	rsb	r0, r2, #21
+	lsls	r3, r3, r0
+	ldr	r0, [r5, #24]
+	subs	r3, r3, #1
+	lsrs	r0, r0, r2
+	ldr	r2, .L2879+68
+	ands	r0, r0, r3
+	ldrb	r1, [r2]	@ zero_extendqisi2
+	bl	__aeabi_uidiv
+	movs	r1, #0
+	uxth	r0, r0
+	bl	ftl_sblk_dump
+	ldr	r3, [r5, #36]
+	adds	r2, r3, #1
+	beq	.L2806
+	cmp	r3, #512
+	bne	.L2808
+.L2806:
+	ldr	r3, [r5, #12]
+	mov	r2, #-1
+	str	r2, [r3, #4]
+	ldr	r3, [r5, #36]
+	cmp	r3, r2
+	beq	.L2807
+	cmp	r3, #512
+	bne	.L2808
+.L2807:
+	movw	r2, #671
+	ldr	r1, .L2879+72
+	ldr	r0, .L2879+76
+	bl	printf
+.L2809:
+	b	.L2809
+.L2808:
+	ldr	r3, [r5, #12]
+	ldr	r2, .L2879+80
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	cmp	r1, r2
+	itt	cs
+	movcs	r2, #-1
+	strcs	r2, [r3, #4]
+	ldr	r2, .L2879+12
+	ldr	r1, [r3, #4]
+	ldr	r2, [r2]
+	str	r1, [r2, r7, lsl #2]
+	ldr	r2, [r5, #24]
+	b	.L2874
+.L2811:
+	cmp	r3, #2
+	bne	.L2813
+	ldr	r3, .L2879+84
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2814
+	ldr	r1, [sp, #28]
+	add	r3, r8, fp
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L2879+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+.L2876:
+	orr	r3, r3, #33554432
+	str	r3, [r2, #24]
+.L2813:
+	ldr	r2, .L2879+36
+	movs	r3, #48
+	mla	r3, r3, r5, r2
+	ldr	r2, [r3, #24]
+	ldrh	r1, [r3, #32]
+	ldr	r3, .L2879+52
+	ldr	r3, [r3]
+	str	r2, [r3, r1, lsl #2]
+	b	.L2812
+.L2814:
+	ldr	r3, [sp, #36]
+	ldr	r1, [sp, #28]
+	add	r3, fp, r3, lsr #1
+	add	r3, r1, r3, lsl #1
+	ldr	r1, .L2879+48
+	ldrh	r3, [r3, #96]
+	ldrh	r1, [r1]
+	mla	r3, r1, r3, r10
+	ldr	r1, [sp, #36]
+	and	r1, r1, #1
+	add	r3, r3, r1
+	b	.L2876
+.L2880:
+	.align	2
+.L2879:
+	.word	.LANCHOR65
+	.word	.LANCHOR59
+	.word	.LANCHOR68
+	.word	.LANCHOR107
+	.word	.LANCHOR69
+	.word	.LANCHOR108
+	.word	.LANCHOR45
+	.word	-178307901
+	.word	.LANCHOR60
+	.word	.LANCHOR36
+	.word	.LANCHOR64
+	.word	-1431655765
+	.word	.LANCHOR75
+	.word	.LANCHOR109
+	.word	.LANCHOR22
+	.word	.LC152
+	.word	.LANCHOR71
+	.word	.LANCHOR70
+	.word	.LANCHOR170
+	.word	.LC0
+	.word	.LANCHOR47
+	.word	.LANCHOR74
+.L2817:
+	ldr	r3, .L2881
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, [sp, #48]
+	cbz	r1, .L2819
+	movs	r1, #0
+.L2822:
+	strb	r1, [r3, #44]
+	add	r0, sp, #48
+	add	r1, sp, #60
+	bl	sblk_xlc_prog_pages
+.L2823:
+	ldr	r3, [sp, #28]
+	ldr	r1, .L2881
+	ldrb	r2, [r3, #89]	@ zero_extendqisi2
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	uxth	r3, r2
+	cmp	r1, #0
+	beq	.L2825
+	add	r3, r3, r3, lsl #1
+.L2826:
+	ldr	r1, .L2881+4
+	ldr	r0, [r1]
+	ldr	r1, [r0, #52]
+	add	r1, r1, r3
+	str	r1, [r0, #52]
+	ldr	r1, .L2881+8
+	ldrh	r0, [r1, #310]
+	add	r3, r3, r0
+	uxth	r3, r3
+	strh	r3, [r1, #310]	@ movhi
+	ldr	r1, .L2881+12
+	ldrh	r1, [r1]
+	muls	r2, r1, r2
+	cmp	r3, r2
+	itttt	ge
+	ldrge	r3, .L2881+16
+	movge	r2, #0
+	ldrge	r3, [r3]
+	strhge	r2, [r3, #86]	@ movhi
+	bl	gc_write_completed
+	b	.L2776
+.L2819:
+	cmp	r6, #1
+	bne	.L2821
+	movs	r1, #9
+	b	.L2822
+.L2821:
+	cmp	r6, #2
+	it	eq
+	moveq	r1, #13
+	b	.L2822
+.L2824:
+	add	r4, sp, #72
+	add	r5, sp, #72
+	add	r4, r4, r1, lsl #2
+	add	r1, r5, r1, lsl #2
+	ldr	r1, [r1, #-20]
+	ldr	r4, [r4, #-24]
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	strb	r1, [r4]
+	b	.L2818
+.L2825:
+	ldr	r1, .L2881+20
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	cmp	r1, #0
+	beq	.L2826
+	lsls	r3, r3, #1
+	uxth	r3, r3
+	b	.L2826
+.L2882:
+	.align	2
+.L2881:
+	.word	.LANCHOR66
+	.word	.LANCHOR46
+	.word	.LANCHOR59
+	.word	.LANCHOR68
+	.word	.LANCHOR60
+	.word	.LANCHOR74
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.do_gc,"ax",%progbits
+	.align	1
+	.global	do_gc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	do_gc, %function
+do_gc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r1, .L3019
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r5, .L3019+4
+	mov	r10, r1
+	ldr	r3, [r1]
+	ldr	r7, .L3019+8
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	ldrh	r4, [r3, #116]
+	ldrh	r6, [r3, #114]
+	mov	r8, r7
+	ldr	fp, [r7]
+	add	r6, r6, r4
+	uxth	r6, r6
+	cmp	r2, #6
+	bhi	.L2883
+	tbh	[pc, r2, lsl #1]
+.L2886:
+	.2byte	(.L2885-.L2886)/2
+	.2byte	(.L2887-.L2886)/2
+	.2byte	(.L2888-.L2886)/2
+	.2byte	(.L2889-.L2886)/2
+	.2byte	(.L2890-.L2886)/2
+	.2byte	(.L2891-.L2886)/2
+	.2byte	(.L2892-.L2886)/2
+	.p2align 1
+.L2885:
+	ldrh	r2, [r3, #118]
+	ldrh	r1, [fp, #80]
+	ldr	r7, .L3019+12
+	add	r4, r4, r2
+	movw	r2, #65535
+	cmp	r1, r2
+	uxth	r4, r4
+	beq	.L2893
+	ldr	r3, .L3019+16
+	cmp	r4, #7
+	ite	hi
+	movhi	r8, #3
+	movls	r8, #1
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2895
+	ldrh	r3, [fp, #122]
+	movw	r1, #1348
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	ldr	r0, .L3019+20
+	str	r3, [sp, #12]
+	ldrh	r3, [fp, #120]
+	str	r3, [sp, #8]
+	ldrh	r3, [fp, #124]
+	str	r4, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L2895:
+	movs	r2, #1
+	mov	r1, r8
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	bl	gc_search_src_blk
+	cmp	r0, #0
+	ble	.L2883
+.L2896:
+	movs	r3, #1
+.L3014:
+	strb	r3, [r5]
+	b	.L2883
+.L2893:
+	ldrh	r2, [r3, #122]
+	cmp	r0, #1
+	ldrh	r3, [r3, #124]
+	str	r3, [sp, #16]
+	bne	.L2897
+	str	r2, [sp, #20]
+	bl	gc_scan_static_data
+	bl	gc_static_wearleveling
+	ldr	r2, [sp, #20]
+.L2897:
+	ldr	r1, [r8]
+	movs	r3, #1
+	strb	r3, [r7]
+	ldrh	fp, [r1, #124]
+	cmp	fp, #0
+	beq	.L2898
+	strb	r3, [r5]
+	movs	r2, #0
+	ldr	r3, .L3019+16
+	strb	r2, [r7]
+	ldr	r3, [r3]
+	lsls	r0, r3, #23
+	bpl	.L2883
+	ldrh	r3, [r1, #122]
+	ldr	r0, .L3019+20
+	str	r3, [sp, #12]
+	ldrh	r3, [r1, #120]
+	movw	r1, #1373
+	stm	sp, {r4, fp}
+	str	r3, [sp, #8]
+	mov	r3, r6
+	bl	printf
+.L2883:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2898:
+	cmp	r6, #47
+	bhi	.L2900
+	cmp	r4, #1
+	bls	.L2901
+	cmp	r4, #16
+	bhi	.L2902
+	ldr	r2, [r10]
+	ldrh	r2, [r2, #120]
+	cmp	r2, #127
+	bhi	.L2903
+.L2902:
+	movs	r2, #16
+	movs	r1, #3
+.L3018:
+	movs	r0, #1
+.L3012:
+	bl	gc_search_src_blk
+	uxth	r0, r0
+.L2904:
+	cmp	r0, #0
+	bne	.L2896
+	b	.L2883
+.L2903:
+	movs	r2, #8
+	movs	r1, #2
+	b	.L3018
+.L2901:
+	ldr	r3, .L3019+16
+	strb	fp, [r7]
+	ldr	r3, [r3]
+	lsls	r3, r3, #23
+	bpl	.L2905
+	ldrh	r3, [r1, #122]
+	mov	r2, fp
+	ldr	r0, .L3019+20
+	str	r3, [sp, #12]
+	ldrh	r3, [r1, #120]
+	movw	r1, #1386
+	stm	sp, {r4, fp}
+	str	r3, [sp, #8]
+	mov	r3, r6
+	bl	printf
+.L2905:
+	cmp	r6, #16
+	bls	.L2906
+	movs	r2, #1
+.L3017:
+	movs	r1, #2
+.L3011:
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	b	.L3012
+.L2906:
+	movs	r2, #16
+.L2920:
+	movs	r1, #1
+	b	.L3011
+.L2900:
+	ldr	r1, [sp, #16]
+	cmp	r6, #127
+	add	r2, r2, r1
+	uxth	r2, r2
+	str	r2, [sp, #16]
+	bhi	.L2907
+	subs	r2, r4, #2
+	cmp	r2, #13
+	bhi	.L2908
+	movs	r2, #8
+	movs	r1, #2
+	mov	r0, r3
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #0
+	bne	.L2896
+.L2911:
+	ldr	r3, .L3019+24
+	ldr	fp, .L3019+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #2
+	ldr	r3, .L3019+16
+	bne	.L3009
+	cmp	r4, #1
+	mov	r2, #0
+	strh	r2, [fp, #30]	@ movhi
+	bls	.L2912
+.L2915:
+	ldr	r3, [r3]
+	movs	r2, #1
+	strb	r2, [r7]
+	lsls	r0, r3, #23
+	bpl	.L2914
+	ldr	r3, [r8]
+	ldr	r0, .L3019+20
+	ldrh	r1, [r3, #122]
+	str	r1, [sp, #12]
+	ldrh	r1, [r3, #120]
+	str	r1, [sp, #8]
+	movw	r1, #1411
+	ldrh	r3, [r3, #124]
+	str	r4, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L2914:
+	ldrh	r3, [fp, #30]
+	movs	r2, #16
+	movs	r1, #1
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strh	r3, [fp, #30]	@ movhi
+	movs	r3, #0
+	strh	r3, [fp, #28]	@ movhi
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #7
+	bhi	.L2916
+	cmp	r4, #31
+	bls	.L2917
+.L2916:
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #120]
+	ldr	r3, .L3019+28
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bls	.L2904
+.L2917:
+	ldr	r3, [sp, #16]
+	cmp	r3, #63
+	bhi	.L2918
+	movs	r2, #8
+	b	.L3017
+.L2908:
+	ldr	r3, .L3019+32
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bcs	.L2911
+	b	.L2883
+.L3009:
+	cmp	r4, #1
+	bls	.L2912
+	ldrh	r2, [fp, #30]
+	cmp	r2, #3
+	bls	.L2915
+.L2912:
+	ldr	r3, [r3]
+	movs	r2, #0
+	strh	r2, [fp, #30]	@ movhi
+	strb	r2, [r7]
+	lsls	r1, r3, #23
+	bpl	.L2919
+	ldr	r3, [r8]
+	ldr	r0, .L3019+20
+	ldrh	r1, [r3, #122]
+	str	r1, [sp, #12]
+	ldrh	r1, [r3, #120]
+	str	r1, [sp, #8]
+	movw	r1, #1426
+	ldrh	r3, [r3, #124]
+	str	r4, [sp]
+	str	r3, [sp, #4]
+	mov	r3, r6
+	bl	printf
+.L2919:
+	ldr	r3, .L3019+32
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bls	.L2883
+	cmp	r4, #31
+	mov	r2, #16
+	bhi	.L2920
+	b	.L3013
+.L2918:
+	movs	r2, #16
+.L3013:
+	movs	r1, #3
+	b	.L3011
+.L2907:
+	cmp	r6, #255
+	bhi	.L2921
+	ldr	r2, .L3019+32
+	ldr	r1, [sp, #16]
+	ldrh	r2, [r2]
+	cmp	r1, r2
+	bls	.L2921
+	cmp	r1, r2, lsr #1
+	bcc	.L2883
+	movs	r2, #16
+	mov	r1, r3
+	mov	r0, fp
+	strb	fp, [r7]
+	str	r3, [sp, #16]
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #7
+	bhi	.L2896
+	cmp	r4, #4
+	bls	.L2904
+	ldr	r0, [r8]
+	movs	r2, #128
+	movs	r1, #255
+	strh	fp, [r0, #120]	@ movhi
+	adds	r0, r0, #136
+	bl	ftl_memset
+	ldr	r3, [sp, #16]
+	strb	r3, [r7]
+	ldr	r3, [r10]
+	ldrh	r2, [r3, #120]
+	ldr	r3, .L3019+28
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bls	.L2923
+	cmp	r4, #16
+	bls	.L2924
+.L2926:
+	movs	r2, #8
+	movs	r1, #2
+.L3010:
+	movs	r0, #1
+	bl	gc_search_src_blk
+	movs	r3, #1
+	uxth	r0, r0
+	strb	r3, [r5]
+	b	.L2904
+.L3020:
+	.align	2
+.L3019:
+	.word	.LANCHOR46
+	.word	.LANCHOR104
+	.word	.LANCHOR60
+	.word	.LANCHOR67
+	.word	.LANCHOR22
+	.word	.LC153
+	.word	.LANCHOR64
+	.word	.LANCHOR163
+	.word	.LANCHOR165
+	.word	.LANCHOR59
+.L2923:
+	cmp	r4, #32
+	bls	.L2924
+	movs	r2, #16
+	movs	r1, #1
+	b	.L3010
+.L2924:
+	cmp	r4, #7
+	bls	.L2926
+	movs	r2, #16
+	movs	r1, #3
+	b	.L3010
+.L2921:
+	subs	r4, r4, #2
+	cmp	r4, #5
+	bhi	.L2883
+	ldr	r3, .L3021
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3, lsr #1
+	bls	.L2883
+	movs	r2, #16
+	movs	r1, #2
+	movs	r0, #1
+	bl	gc_search_src_blk
+	uxth	r0, r0
+	cmp	r0, #15
+	bhi	.L2896
+	ldrb	r0, [r7]	@ zero_extendqisi2
+	movs	r1, #0
+	ldr	r3, [r8]
+	add	r2, r0, #60
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r2, #128
+	mla	r0, r2, r0, r3
+	movs	r1, #255
+	adds	r0, r0, #136
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	ftl_memset
+.L2887:
+	ldr	r4, .L3021+4
+	movw	r3, #65535
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	bne	.L2928
+	bl	gc_get_src_blk
+	strh	r0, [r4]	@ movhi
+.L2928:
+	ldrh	r3, [r4]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L2929
+	ldrh	r1, [r4, #52]
+	cbz	r1, .L2930
+	ldr	r0, .L3021+8
+	movs	r2, #0
+.L2931:
+	uxth	r4, r2
+	cmp	r1, r4
+	bhi	.L2932
+.L2930:
+	ldr	r2, .L3021+12
+	ldr	r2, [r2]
+	add	r2, r2, r3, lsl #2
+	ldrb	r2, [r2, #2]	@ zero_extendqisi2
+	and	r1, r2, #224
+	cmp	r1, #224
+	beq	.L2933
+	tst	r2, #192
+	bne	.L2934
+.L2933:
+	ldr	r2, .L3021+16
+	ldr	r2, [r2]
+	ldrh	r3, [r2, r3, lsl #1]
+	cbz	r3, .L2935
+	movw	r2, #1497
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2936:
+	b	.L2936
+.L2932:
+	ldrh	r4, [r0, #2]!
+	adds	r2, r2, #1
+	cmp	r4, r3
+	bne	.L2931
+.L2935:
+	ldr	r3, .L3021+4
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+	b	.L2883
+.L2934:
+	movs	r3, #2
+	b	.L3014
+.L2929:
+	movs	r3, #0
+	b	.L3014
+.L2888:
+	bl	gc_scan_src_blk
+	adds	r0, r0, #1
+	bne	.L2937
+	movs	r3, #3
+	b	.L3014
+.L2937:
+	ldr	r4, .L3021+4
+	movw	r3, #65535
+	ldrh	r0, [r4]
+	cmp	r0, r3
+	beq	.L2896
+	ldrh	r3, [r4, #20]
+	cbz	r3, .L2938
+	movs	r3, #4
+	strb	r3, [r5]
+	movs	r3, #0
+	strh	r3, [r4, #22]	@ movhi
+	b	.L2883
+.L2938:
+	ldr	r6, .L3021+16
+	movs	r3, #1
+	strb	r3, [r5]
+	ldr	r3, [r6]
+	ldrh	r5, [r3, r0, lsl #1]
+	cbz	r5, .L2939
+	movw	r2, #1525
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2940:
+	b	.L2940
+.L2939:
+	bl	ftl_free_sblk
+	ldr	r3, [r6]
+	ldrh	r2, [r4]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	strh	r3, [r4, #26]	@ movhi
+	bls	.L2935
+	strh	r5, [r4, #26]	@ movhi
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	r0, r5
+	bl	ftl_info_flush
+	b	.L2935
+.L2889:
+	bl	gc_scan_src_blk_one_page
+	ldr	r4, .L3021+4
+	ldr	r3, .L3021+28
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2883
+	ldrh	r3, [r4, #20]
+	ldr	r2, .L3021+32
+	cbz	r3, .L2941
+	ldr	r2, [r2]
+	movs	r1, #4
+	strb	r1, [r5]
+	movs	r1, #0
+	strh	r1, [r4, #22]	@ movhi
+	tst	r2, #256
+	ldr	r5, .L3021+16
+	beq	.L2942
+	ldrh	r1, [r4]
+	ldr	r2, [r5]
+	ldr	r0, .L3021+36
+	ldrh	r2, [r2, r1, lsl #1]
+	bl	printf
+.L2942:
+	ldr	r3, [r5]
+	ldrh	r2, [r4]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	beq	.L2883
+	movw	r2, #1555
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2943:
+	b	.L2943
+.L2941:
+	ldr	r3, .L3021+12
+	ldrh	r1, [r4]
+	ldr	r6, [r3]
+	movs	r3, #1
+	strb	r3, [r5]
+	ldr	r3, [r2]
+	add	r6, r6, r1, lsl #2
+	lsls	r2, r3, #23
+	bpl	.L2944
+	ldrb	r2, [r6, #2]	@ zero_extendqisi2
+	ldr	r0, .L3021+40
+	lsrs	r2, r2, #5
+	bl	printf
+.L2944:
+	ldrb	r3, [r6, #2]	@ zero_extendqisi2
+	and	r2, r3, #224
+	cmp	r2, #224
+	beq	.L2945
+	tst	r3, #192
+	bne	.L2946
+.L2945:
+	movw	r2, #1565
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2947:
+	b	.L2947
+.L2946:
+	ldrh	r0, [r4]
+	bl	ftl_free_sblk
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	ldrh	r3, [r4, #26]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #8
+	strh	r3, [r4, #26]	@ movhi
+	bls	.L2883
+	movs	r3, #0
+	strh	r3, [r4, #26]	@ movhi
+.L3016:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	flt_sys_flush
+.L2890:
+	ldrh	r7, [fp, #80]
+	movw	r3, #65535
+	cmp	r7, r3
+	bne	.L2948
+	ldr	r3, .L3021+44
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	cmp	r4, #1
+	bne	.L2948
+	bl	ftl_flush
+	movs	r0, #5
+	bl	ftl_alloc_sblk
+	cmp	r0, r7
+	mov	r5, r0
+	bne	.L2949
+	movw	r2, #1581
+	ldr	r1, .L3021+20
+	ldr	r0, .L3021+24
+	bl	printf
+.L2950:
+	b	.L2950
+.L2949:
+	mov	r1, r4
+	movs	r4, #0
+	bl	ftl_erase_sblk
+	movs	r3, #5
+	add	r1, fp, #96
+	strb	r3, [fp, #84]
+	mov	r0, r5
+	bl	ftl_get_blk_list_in_sblk
+	ldr	r3, .L3021+28
+	uxtb	r0, r0
+	ldr	r6, .L3021+48
+	movs	r1, #255
+	strb	r0, [fp, #89]
+	ldrh	r3, [r3]
+	strh	r5, [fp, #80]	@ movhi
+	strh	r4, [fp, #82]	@ movhi
+	strb	r4, [fp, #85]
+	smulbb	r0, r3, r0
+	strh	r4, [fp, #90]	@ movhi
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	strh	r0, [fp, #86]	@ movhi
+	ldr	fp, .L3021+64
+	ldrh	r3, [fp]
+	muls	r2, r3, r2
+	ldr	r3, .L3021+52
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [fp]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3021+56
+	ldr	r0, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memset
+	ldrh	r3, [fp]
+	movs	r1, #255
+	ldrb	r2, [r6]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldr	r3, .L3021+60
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	strh	r7, [r3, #128]	@ movhi
+	strh	r7, [r3, #130]	@ movhi
+	str	r5, [r3, #132]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	r3, [r10]
+	mov	r2, #-1
+	mov	r0, r4
+	strh	r5, [r3, #126]	@ movhi
+	ldr	r3, .L3021+4
+	strh	r4, [r3, #310]	@ movhi
+	strh	r4, [r3, #52]	@ movhi
+	strh	r4, [r3, #312]	@ movhi
+	strh	r4, [r3, #314]	@ movhi
+	str	r2, [r3, #316]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	ftl_info_flush
+.L3022:
+	.align	2
+.L3021:
+	.word	.LANCHOR165
+	.word	.LANCHOR59
+	.word	.LANCHOR59+52
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LANCHOR172
+	.word	.LC0
+	.word	.LANCHOR79
+	.word	.LANCHOR22
+	.word	.LC154
+	.word	.LC155
+	.word	.LANCHOR67
+	.word	.LANCHOR69
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR65
+	.word	.LANCHOR68
+.L2948:
+	cmp	r6, #31
+	bls	.L2968
+	cmp	r6, #63
+	bls	.L2969
+	cmp	r6, #127
+	bls	.L2970
+	cmp	r6, #255
+	ite	hi
+	movhi	r6, #1
+	movls	r6, #2
+.L2951:
+	ldr	r7, .L3023
+	ldr	r4, .L3023+4
+.L2952:
+	subs	r6, r6, #1
+	uxtb	r6, r6
+	cmp	r6, #255
+	beq	.L2883
+	bl	gc_do_copy_back
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbnz	r3, .L2953
+	ldr	r3, .L3023+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #3
+	bhi	.L2954
+	bl	ftl_write_commit
+.L2954:
+	ldrh	r2, [r4, #22]
+	ldrh	r3, [r4, #20]
+	cmp	r2, r3
+	bcc	.L2952
+	movs	r3, #1
+	strb	r3, [r5]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldr	r3, .L3023+12
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L2956
+	movw	r2, #1638
+	ldr	r1, .L3023+16
+	ldr	r0, .L3023+20
+	bl	printf
+.L2957:
+	b	.L2957
+.L2968:
+	movs	r6, #9
+	b	.L2951
+.L2969:
+	movs	r6, #5
+	b	.L2951
+.L2970:
+	movs	r6, #3
+	b	.L2951
+.L2956:
+	bl	ftl_free_sblk
+.L3015:
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+	b	.L2883
+.L2953:
+	ldrh	r3, [r4, #314]
+	cbz	r3, .L2958
+	ldr	r0, [r4, #316]
+	movs	r6, #0
+	strh	r6, [r4, #314]	@ movhi
+	adds	r3, r0, #1
+	beq	.L2959
+	bl	ftl_mask_bad_block
+.L2959:
+	ldr	r3, [r8]
+	str	r6, [r4, #316]
+	strh	r6, [r4, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r0, [r4, #8]
+	movw	r3, #65535
+	ldr	r2, [r8]
+	ldr	r1, [r10]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	cbz	r0, .L2960
+	bl	buf_free
+.L2960:
+	movs	r6, #0
+	str	r6, [r4, #8]
+	bl	flt_sys_flush
+	movw	r2, #1671
+	ldr	r1, .L3023+16
+	ldr	r0, .L3023+20
+	strb	r6, [r5]
+	bl	printf
+.L2961:
+	b	.L2961
+.L2958:
+	ldrh	r3, [fp, #86]
+	ldrh	r2, [r4, #22]
+	cmp	r3, #1
+	ldrh	r3, [r4, #20]
+	bls	.L2962
+	cmp	r2, r3
+	bcc	.L2952
+	movs	r3, #1
+	strb	r3, [r5]
+	ldrh	r3, [r4, #52]
+	adds	r2, r3, #1
+	strh	r2, [r4, #52]	@ movhi
+	add	r3, r4, r3, lsl #1
+	ldrh	r2, [r4]
+	strh	r2, [r3, #54]	@ movhi
+	b	.L3015
+.L2962:
+	cmp	r2, r3
+	mov	r1, #5
+	strb	r1, [r5]
+	bcc	.L2963
+	ldrh	r3, [r4, #52]
+	adds	r2, r3, #1
+	strh	r2, [r4, #52]	@ movhi
+	add	r3, r4, r3, lsl #1
+	ldrh	r2, [r4]
+	strh	r2, [r3, #54]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r4]	@ movhi
+.L2963:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	r3, [r8]
+	ldrh	r2, [fp, #80]
+	strh	r2, [r3, #128]	@ movhi
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	movs	r3, #0
+	ldr	r2, .L3023+24
+	strh	r3, [r4, #12]	@ movhi
+	ldr	r3, .L3023+28
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, #2
+	strh	r2, [r4, #16]	@ movhi
+	strh	r3, [r4, #14]	@ movhi
+	itttt	eq
+	lsleq	r3, r3, #1
+	strheq	r3, [r4, #14]	@ movhi
+	moveq	r3, #1
+	strheq	r3, [r4, #16]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #18]	@ movhi
+	b	.L2883
+.L2891:
+	bl	gc_check_data_one_wl
+	ldr	r4, .L3023+4
+	mov	r6, r0
+	cbz	r0, .L2966
+	ldr	r3, [r7]
+	movs	r6, #0
+	strh	r6, [r4, #52]	@ movhi
+	ldrh	r0, [r3, #80]
+	bl	ftl_free_sblk
+	ldr	r2, [r7]
+	movw	r3, #65535
+	ldr	r1, [r10]
+	ldr	r0, [r4, #8]
+	strh	r3, [r2, #80]	@ movhi
+	strh	r3, [r1, #126]	@ movhi
+	strh	r3, [r2, #130]	@ movhi
+	bl	buf_free
+	str	r6, [r4, #8]
+	strb	r6, [r5]
+	b	.L3016
+.L2966:
+	ldrh	r2, [r4, #12]
+	ldrh	r3, [r4, #14]
+	cmp	r2, r3
+	bcc	.L2883
+	movs	r3, #6
+	ldr	r0, [r4, #8]
+	strb	r3, [r5]
+	bl	buf_free
+	str	r6, [r4, #8]
+	b	.L2883
+.L2892:
+	movw	r4, #65535
+	bl	gc_update_l2p_map_new
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	r4, [fp, #80]	@ movhi
+	bl	ftl_ext_info_flush
+	ldr	r3, [r10]
+	movs	r0, #0
+	strh	r4, [r3, #126]	@ movhi
+	bl	ftl_info_flush
+	movs	r3, #0
+	strb	r3, [r5]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	print_ftl_debug_info
+.L3024:
+	.align	2
+.L3023:
+	.word	.LANCHOR67
+	.word	.LANCHOR59
+	.word	.LANCHOR38
+	.word	.LANCHOR56
+	.word	.LANCHOR172
+	.word	.LC0
+	.word	.LANCHOR64
+	.word	.LANCHOR79
+	.size	do_gc, .-do_gc
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
+	mov	r10, r3
+	cbnz	r0, .L3026
+	mov	r0, #24576
+	ldr	r3, .L3039
+	ldr	r3, [r3]
+.L3027:
+	adds	r2, r1, r7
+	cmp	r3, r2
+	bcc	.L3038
+	ldr	fp, .L3039+8
+	adds	r5, r0, r1
+	mov	r0, r5
+	ldrb	r4, [fp]	@ zero_extendqisi2
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mov	r8, r0
+	subs	r0, r7, #1
+	mov	r1, r4
+	add	r0, r0, r5
+	bl	__aeabi_uidiv
+	sub	r4, r0, r8
+	mov	r6, r8
+	adds	r4, r4, #1
+	str	r0, [sp, #4]
+	str	fp, [sp, #8]
+.L3029:
+	cbnz	r4, .L3036
+	bl	ftl_write_commit
+	mov	r0, r4
+	movs	r1, #1
+	bl	do_gc
+	mov	r0, r4
+.L3025:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L3026:
+	cmp	r0, #3
+	bhi	.L3038
+	lsls	r0, r0, #13
+	mov	r3, #8192
+	b	.L3027
+.L3036:
+	movs	r0, #0
+	bl	buf_alloc
+	mov	fp, r0
+	cbnz	r0, .L3030
+	bl	ftl_write_commit
+	b	.L3029
+.L3030:
+	mov	r3, #0
+	cmp	r6, r8
+	strb	r3, [r0, #41]
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	strb	r2, [r0, #40]
+	bne	.L3032
+	mov	r1, r2
+	mov	r0, r5
+	str	r2, [sp, #12]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	uxtb	r1, r1
+	strb	r1, [fp, #41]
+	subs	r1, r2, r1
+	uxtb	r1, r1
+	cmp	r7, r1
+	ite	cs
+	strbcs	r1, [fp, #40]
+	strbcc	r7, [fp, #40]
+.L3034:
+	ldrb	ip, [fp, #41]	@ zero_extendqisi2
+	mov	r1, r10
+	ldrb	r2, [fp, #40]	@ zero_extendqisi2
+	subs	r4, r4, #1
+	ldr	r0, [fp, #4]
+	lsls	r2, r2, #9
+	add	r0, r0, ip, lsl #9
+	bl	ftl_memcpy
+	ldr	r3, .L3039+4
+	str	r6, [fp, #20]
+	adds	r6, r6, #1
+	ldr	r1, [r3]
+	ldr	r2, [r1, #8]
+	adds	r0, r2, #1
+	str	r0, [r1, #8]
+	mov	r0, fp
+	str	r2, [fp, #16]
+	bl	ftl_write_buf
+	ldrb	r3, [fp, #40]	@ zero_extendqisi2
+	add	r10, r10, r3, lsl #9
+	b	.L3029
+.L3032:
+	ldr	r3, [sp, #4]
+	cmp	r6, r3
+	itttt	eq
+	smulbbeq	r2, r6, r2
+	addeq	r1, r5, r7
+	subeq	r2, r1, r2
+	strbeq	r2, [r0, #40]
+	b	.L3034
+.L3038:
+	mov	r0, #-1
+	b	.L3025
+.L3040:
+	.align	2
+.L3039:
+	.word	.LANCHOR52
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlWrite,"ax",%progbits
+	.align	1
+	.global	FtlWrite
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlWrite, %function
+FtlWrite:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	ftl_write
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	mov	r1, r0
+	movs	r0, #2
+	b	ftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.global	g_pm_spare
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_slc_mode_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	check_vpc_tbl
+	.global	p_read_ahead_ext_buf
+	.global	read_ahead_lpa
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.space	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",%nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.space	2
+	.section	.bss._c_ftl_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR75,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.space	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR149,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.space	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss._c_ftl_nand_die_num,"aw",%nobits
+	.set	.LANCHOR76,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.space	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",%nobits
+	.set	.LANCHOR69,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.space	1
+	.section	.bss._c_ftl_nand_type,"aw",%nobits
+	.set	.LANCHOR64,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.space	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.space	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.space	2
+	.section	.bss._c_ftl_planes_per_die,"aw",%nobits
+	.set	.LANCHOR70,. + 0
+	.type	_c_ftl_planes_per_die, %object
+	.size	_c_ftl_planes_per_die, 1
+_c_ftl_planes_per_die:
+	.space	1
+	.section	.bss._c_ftl_pm_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	_c_ftl_pm_page_num, %object
+	.size	_c_ftl_pm_page_num, 2
+_c_ftl_pm_page_num:
+	.space	2
+	.section	.bss._c_ftl_sec_per_page,"aw",%nobits
+	.set	.LANCHOR45,. + 0
+	.type	_c_ftl_sec_per_page, %object
+	.size	_c_ftl_sec_per_page, 1
+_c_ftl_sec_per_page:
+	.space	1
+	.section	.bss._c_max_pm_sblk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	_c_max_pm_sblk, %object
+	.size	_c_max_pm_sblk, 2
+_c_max_pm_sblk:
+	.space	2
+	.section	.bss._c_totle_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	_c_totle_data_density, %object
+	.size	_c_totle_data_density, 4
+_c_totle_data_density:
+	.space	4
+	.section	.bss._c_totle_log_page,"aw",%nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	_c_totle_log_page, %object
+	.size	_c_totle_log_page, 4
+_c_totle_log_page:
+	.space	4
+	.section	.bss._c_totle_phy_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	_c_totle_phy_density, %object
+	.size	_c_totle_phy_density, 4
+_c_totle_phy_density:
+	.space	4
+	.section	.bss._c_user_data_density,"aw",%nobits
+	.align	2
+	.set	.LANCHOR52,. + 0
+	.type	_c_user_data_density, %object
+	.size	_c_user_data_density, 4
+_c_user_data_density:
+	.space	4
+	.section	.bss._max_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR164,. + 0
+	.type	_max_slc_super_block, %object
+	.size	_max_slc_super_block, 2
+_max_slc_super_block:
+	.space	2
+	.section	.bss._max_xlc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR163,. + 0
+	.type	_max_xlc_super_block, %object
+	.size	_max_xlc_super_block, 2
+_max_xlc_super_block:
+	.space	2
+	.section	.bss._min_slc_super_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR165,. + 0
+	.type	_min_slc_super_block, %object
+	.size	_min_slc_super_block, 2
+_min_slc_super_block:
+	.space	2
+	.section	.bss.check_vpc_tbl,"aw",%nobits
+	.align	1
+	.type	check_vpc_tbl, %object
+	.size	check_vpc_tbl, 4352
+check_vpc_tbl:
+	.space	4352
+	.section	.bss.fill_spare_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	fill_spare_size, %object
+	.size	fill_spare_size, 2
+fill_spare_size:
+	.space	2
+	.section	.bss.flash_read_retry,"aw",%nobits
+	.align	2
+	.set	.LANCHOR115,. + 0
+	.type	flash_read_retry, %object
+	.size	flash_read_retry, 4
+flash_read_retry:
+	.space	4
+	.section	.bss.free_buf_count,"aw",%nobits
+	.set	.LANCHOR38,. + 0
+	.type	free_buf_count, %object
+	.size	free_buf_count, 1
+free_buf_count:
+	.space	1
+	.section	.bss.ftl_ext_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_ext_info_data_buffer, %object
+	.size	ftl_ext_info_data_buffer, 16384
+ftl_ext_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_flush_jiffies,"aw",%nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	ftl_flush_jiffies, %object
+	.size	ftl_flush_jiffies, 4
+ftl_flush_jiffies:
+	.space	4
+	.section	.bss.ftl_info_data_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_info_data_buffer, %object
+	.size	ftl_info_data_buffer, 16384
+ftl_info_data_buffer:
+	.space	16384
+	.section	.bss.ftl_info_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR130,. + 0
+	.type	ftl_info_spare, %object
+	.size	ftl_info_spare, 256
+ftl_info_spare:
+	.space	256
+	.section	.bss.ftl_low_format_cur_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	ftl_low_format_cur_blk, %object
+	.size	ftl_low_format_cur_blk, 2
+ftl_low_format_cur_blk:
+	.space	2
+	.section	.bss.ftl_power_lost_flag,"aw",%nobits
+	.set	.LANCHOR133,. + 0
+	.type	ftl_power_lost_flag, %object
+	.size	ftl_power_lost_flag, 1
+ftl_power_lost_flag:
+	.space	1
+	.section	.bss.ftl_sblk_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR82,. + 0
+	.type	ftl_sblk_lpa_tbl, %object
+	.size	ftl_sblk_lpa_tbl, 4
+ftl_sblk_lpa_tbl:
+	.space	4
+	.section	.bss.ftl_sblk_vpn,"aw",%nobits
+	.align	2
+	.set	.LANCHOR56,. + 0
+	.type	ftl_sblk_vpn, %object
+	.size	ftl_sblk_vpn, 4
+ftl_sblk_vpn:
+	.space	4
+	.section	.bss.ftl_sblk_vpn_update_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	ftl_sblk_vpn_update_id, %object
+	.size	ftl_sblk_vpn_update_id, 2
+ftl_sblk_vpn_update_id:
+	.space	2
+	.section	.bss.ftl_tmp_buffer,"aw",%nobits
+	.align	6
+	.type	ftl_tmp_buffer, %object
+	.size	ftl_tmp_buffer, 16384
+ftl_tmp_buffer:
+	.space	16384
+	.section	.bss.ftl_tmp_spare,"aw",%nobits
+	.align	6
+	.set	.LANCHOR121,. + 0
+	.type	ftl_tmp_spare, %object
+	.size	ftl_tmp_spare, 256
+ftl_tmp_spare:
+	.space	256
+	.section	.bss.ftl_vpn_update_count,"aw",%nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	ftl_vpn_update_count, %object
+	.size	ftl_vpn_update_count, 2
+ftl_vpn_update_count:
+	.space	2
+	.section	.bss.gNandOptPara,"aw",%nobits
+	.set	.LANCHOR103,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.g_block_align_addr,"aw",%nobits
+	.align	1
+	.set	.LANCHOR13,. + 0
+	.type	g_block_align_addr, %object
+	.size	g_block_align_addr, 2
+g_block_align_addr:
+	.space	2
+	.section	.bss.g_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR36,. + 0
+	.type	g_buf, %object
+	.size	g_buf, 1536
+g_buf:
+	.space	1536
+	.section	.bss.g_die_addr,"aw",%nobits
+	.align	2
+	.set	.LANCHOR98,. + 0
+	.type	g_die_addr, %object
+	.size	g_die_addr, 32
+g_die_addr:
+	.space	32
+	.section	.bss.g_die_cs_idx,"aw",%nobits
+	.align	2
+	.set	.LANCHOR10,. + 0
+	.type	g_die_cs_idx, %object
+	.size	g_die_cs_idx, 8
+g_die_cs_idx:
+	.space	8
+	.section	.bss.g_flash_3d_mlc_flag,"aw",%nobits
+	.set	.LANCHOR74,. + 0
+	.type	g_flash_3d_mlc_flag, %object
+	.size	g_flash_3d_mlc_flag, 1
+g_flash_3d_mlc_flag:
+	.space	1
+	.section	.bss.g_flash_3d_tlc_flag,"aw",%nobits
+	.set	.LANCHOR66,. + 0
+	.type	g_flash_3d_tlc_flag, %object
+	.size	g_flash_3d_tlc_flag, 1
+g_flash_3d_tlc_flag:
+	.space	1
+	.section	.bss.g_flash_blk_info,"aw",%nobits
+	.align	1
+	.set	.LANCHOR117,. + 0
+	.type	g_flash_blk_info, %object
+	.size	g_flash_blk_info, 4
+g_flash_blk_info:
+	.space	4
+	.section	.bss.g_flash_cur_mode,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	g_flash_cur_mode, %object
+	.size	g_flash_cur_mode, 1
+g_flash_cur_mode:
+	.space	1
+	.section	.bss.g_flash_interface_mode,"aw",%nobits
+	.set	.LANCHOR25,. + 0
+	.type	g_flash_interface_mode, %object
+	.size	g_flash_interface_mode, 1
+g_flash_interface_mode:
+	.space	1
+	.section	.bss.g_flash_multi_page_prog_en,"aw",%nobits
+	.set	.LANCHOR23,. + 0
+	.type	g_flash_multi_page_prog_en, %object
+	.size	g_flash_multi_page_prog_en, 1
+g_flash_multi_page_prog_en:
+	.space	1
+	.section	.bss.g_flash_multi_page_read_en,"aw",%nobits
+	.set	.LANCHOR144,. + 0
+	.type	g_flash_multi_page_read_en, %object
+	.size	g_flash_multi_page_read_en, 1
+g_flash_multi_page_read_en:
+	.space	1
+	.section	.bss.g_flash_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR119,. + 0
+	.type	g_flash_page_buffer, %object
+	.size	g_flash_page_buffer, 4
+g_flash_page_buffer:
+	.space	4
+	.section	.bss.g_flash_reversd_blks,"aw",%nobits
+	.set	.LANCHOR123,. + 0
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
+	.space	1
+	.section	.bss.g_flash_slc_mode,"aw",%nobits
+	.set	.LANCHOR11,. + 0
+	.type	g_flash_slc_mode, %object
+	.size	g_flash_slc_mode, 1
+g_flash_slc_mode:
+	.space	1
+	.section	.bss.g_flash_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR118,. + 0
+	.type	g_flash_spare_buffer, %object
+	.size	g_flash_spare_buffer, 4
+g_flash_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_sys_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR116,. + 0
+	.type	g_flash_sys_spare_buffer, %object
+	.size	g_flash_sys_spare_buffer, 4
+g_flash_sys_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_page_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR111,. + 0
+	.type	g_flash_tmp_page_buffer, %object
+	.size	g_flash_tmp_page_buffer, 4
+g_flash_tmp_page_buffer:
+	.space	4
+	.section	.bss.g_flash_tmp_spare_buffer,"aw",%nobits
+	.align	2
+	.set	.LANCHOR112,. + 0
+	.type	g_flash_tmp_spare_buffer, %object
+	.size	g_flash_tmp_spare_buffer, 4
+g_flash_tmp_spare_buffer:
+	.space	4
+	.section	.bss.g_flash_toggle_mode_en,"aw",%nobits
+	.set	.LANCHOR35,. + 0
+	.type	g_flash_toggle_mode_en, %object
+	.size	g_flash_toggle_mode_en, 1
+g_flash_toggle_mode_en:
+	.space	1
+	.section	.bss.g_ftl_info_blk,"aw",%nobits
+	.align	6
+	.set	.LANCHOR131,. + 0
+	.type	g_ftl_info_blk, %object
+	.size	g_ftl_info_blk, 4
+g_ftl_info_blk:
+	.space	4
+	.section	.bss.g_gc_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR59,. + 0
+	.type	g_gc_info, %object
+	.size	g_gc_info, 320
+g_gc_info:
+	.space	320
+	.section	.bss.g_idb_ecc_bits,"aw",%nobits
+	.set	.LANCHOR145,. + 0
+	.type	g_idb_ecc_bits, %object
+	.size	g_idb_ecc_bits, 1
+g_idb_ecc_bits:
+	.space	1
+	.section	.bss.g_idb_slc_mode_enable,"aw",%nobits
+	.set	.LANCHOR146,. + 0
+	.type	g_idb_slc_mode_enable, %object
+	.size	g_idb_slc_mode_enable, 1
+g_idb_slc_mode_enable:
+	.space	1
+	.section	.bss.g_lsb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR14,. + 0
+	.type	g_lsb_page_tbl, %object
+	.size	g_lsb_page_tbl, 512
+g_lsb_page_tbl:
+	.space	512
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR4,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR113,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_msb_page_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	g_msb_page_tbl, %object
+	.size	g_msb_page_tbl, 1024
+g_msb_page_tbl:
+	.space	1024
+	.section	.bss.g_nand_max_die,"aw",%nobits
+	.set	.LANCHOR8,. + 0
+	.type	g_nand_max_die, %object
+	.size	g_nand_max_die, 1
+g_nand_max_die:
+	.space	1
+	.section	.bss.g_nandc_ecc_bits,"aw",%nobits
+	.set	.LANCHOR27,. + 0
+	.type	g_nandc_ecc_bits, %object
+	.size	g_nandc_ecc_bits, 1
+g_nandc_ecc_bits:
+	.space	1
+	.section	.bss.g_nandc_v6_master_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR30,. + 0
+	.type	g_nandc_v6_master_info, %object
+	.size	g_nandc_v6_master_info, 28
+g_nandc_v6_master_info:
+	.space	28
+	.section	.bss.g_nandc_ver,"aw",%nobits
+	.set	.LANCHOR7,. + 0
+	.type	g_nandc_ver, %object
+	.size	g_nandc_ver, 1
+g_nandc_ver:
+	.space	1
+	.section	.bss.g_pm_spare,"aw",%nobits
+	.align	2
+	.set	.LANCHOR141,. + 0
+	.type	g_pm_spare, %object
+	.size	g_pm_spare, 4
+g_pm_spare:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc_mode_addr2,"aw",%nobits
+	.set	.LANCHOR12,. + 0
+	.type	g_slc_mode_addr2, %object
+	.size	g_slc_mode_addr2, 1
+g_slc_mode_addr2:
+	.space	1
+	.section	.bss.g_slc_mode_enable,"aw",%nobits
+	.type	g_slc_mode_enable, %object
+	.size	g_slc_mode_enable, 1
+g_slc_mode_enable:
+	.space	1
+	.section	.bss.g_slc_page_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	g_slc_page_num, %object
+	.size	g_slc_page_num, 2
+g_slc_page_num:
+	.space	2
+	.section	.bss.g_totle_phy_block,"aw",%nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_totle_phy_block, %object
+	.size	g_totle_phy_block, 2
+g_totle_phy_block:
+	.space	2
+	.section	.bss.gc_des_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR109,. + 0
+	.type	gc_des_ppa_tbl, %object
+	.size	gc_des_ppa_tbl, 4
+gc_des_ppa_tbl:
+	.space	4
+	.section	.bss.gc_lpa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	gc_lpa_tbl, %object
+	.size	gc_lpa_tbl, 4
+gc_lpa_tbl:
+	.space	4
+	.section	.bss.gc_mode,"aw",%nobits
+	.set	.LANCHOR67,. + 0
+	.type	gc_mode, %object
+	.size	gc_mode, 1
+gc_mode:
+	.space	1
+	.section	.bss.gc_page_buf_id,"aw",%nobits
+	.align	2
+	.set	.LANCHOR65,. + 0
+	.type	gc_page_buf_id, %object
+	.size	gc_page_buf_id, 4
+gc_page_buf_id:
+	.space	4
+	.section	.bss.gc_pre_ppa_tbl,"aw",%nobits
+	.align	2
+	.set	.LANCHOR108,. + 0
+	.type	gc_pre_ppa_tbl, %object
+	.size	gc_pre_ppa_tbl, 4
+gc_pre_ppa_tbl:
+	.space	4
+	.section	.bss.gc_slc_mode_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	gc_slc_mode_vpn_th, %object
+	.size	gc_slc_mode_vpn_th, 2
+gc_slc_mode_vpn_th:
+	.space	2
+	.section	.bss.gc_state,"aw",%nobits
+	.set	.LANCHOR104,. + 0
+	.type	gc_state, %object
+	.size	gc_state, 1
+gc_state:
+	.space	1
+	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	gc_tlc_mode_slc_vpn_th, %object
+	.size	gc_tlc_mode_slc_vpn_th, 2
+gc_tlc_mode_slc_vpn_th:
+	.space	2
+	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",%nobits
+	.align	1
+	.set	.LANCHOR106,. + 0
+	.type	gc_tlc_mode_tlc_vpn_th, %object
+	.size	gc_tlc_mode_tlc_vpn_th, 2
+gc_tlc_mode_tlc_vpn_th:
+	.space	2
+	.section	.bss.gc_valid_page_ppa,"aw",%nobits
+	.align	2
+	.set	.LANCHOR61,. + 0
+	.type	gc_valid_page_ppa, %object
+	.size	gc_valid_page_ppa, 4
+gc_valid_page_ppa:
+	.space	4
+	.section	.bss.gpNandParaInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR34,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 4
+gpNandParaInfo:
+	.space	4
+	.section	.bss.gp_blk_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR57,. + 0
+	.type	gp_blk_info, %object
+	.size	gp_blk_info, 4
+gp_blk_info:
+	.space	4
+	.section	.bss.gp_flash_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR5,. + 0
+	.type	gp_flash_info, %object
+	.size	gp_flash_info, 4
+gp_flash_info:
+	.space	4
+	.section	.bss.gp_ftl_ext_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR60,. + 0
+	.type	gp_ftl_ext_info, %object
+	.size	gp_ftl_ext_info, 4
+gp_ftl_ext_info:
+	.space	4
+	.section	.bss.gp_ftl_info,"aw",%nobits
+	.align	2
+	.set	.LANCHOR46,. + 0
+	.type	gp_ftl_info, %object
+	.size	gp_ftl_info, 4
+gp_ftl_info:
+	.space	4
+	.section	.bss.gp_nandc,"aw",%nobits
+	.align	2
+	.set	.LANCHOR6,. + 0
+	.type	gp_nandc, %object
+	.size	gp_nandc, 4
+gp_nandc:
+	.space	4
+	.section	.bss.lpa_hash,"aw",%nobits
+	.align	1
+	.set	.LANCHOR81,. + 0
+	.type	lpa_hash, %object
+	.size	lpa_hash, 512
+lpa_hash:
+	.space	512
+	.section	.bss.lpa_hash_index,"aw",%nobits
+	.align	2
+	.set	.LANCHOR83,. + 0
+	.type	lpa_hash_index, %object
+	.size	lpa_hash_index, 4
+lpa_hash_index:
+	.space	4
+	.section	.bss.nandc_hw_seed,"aw",%nobits
+	.set	.LANCHOR28,. + 0
+	.type	nandc_hw_seed, %object
+	.size	nandc_hw_seed, 1
+nandc_hw_seed:
+	.space	1
+	.section	.bss.nandc_randomizer_en,"aw",%nobits
+	.set	.LANCHOR29,. + 0
+	.type	nandc_randomizer_en, %object
+	.size	nandc_randomizer_en, 1
+nandc_randomizer_en:
+	.space	1
+	.section	.bss.p_free_buf_head,"aw",%nobits
+	.set	.LANCHOR37,. + 0
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+__func__.10770:
+	.ascii	"gc_do_copy_back\000"
+	.section	.rodata.__func__.10792,"a",%progbits
+	.set	.LANCHOR73,. + 0
+	.type	__func__.10792, %object
+	.size	__func__.10792, 16
+__func__.10792:
+	.ascii	"gc_free_src_blk\000"
+	.section	.rodata.__func__.10837,"a",%progbits
+	.set	.LANCHOR160,. + 0
+	.type	__func__.10837, %object
+	.size	__func__.10837, 16
+__func__.10837:
+	.ascii	"gc_scan_src_blk\000"
+	.section	.rodata.__func__.10869,"a",%progbits
+	.set	.LANCHOR156,. + 0
+	.type	__func__.10869, %object
+	.size	__func__.10869, 18
+__func__.10869:
+	.ascii	"gc_search_src_blk\000"
+	.section	.rodata.__func__.10885,"a",%progbits
+	.set	.LANCHOR154,. + 0
+	.type	__func__.10885, %object
+	.size	__func__.10885, 20
+__func__.10885:
+	.ascii	"gc_scan_static_data\000"
+	.section	.rodata.__func__.10946,"a",%progbits
+	.set	.LANCHOR172,. + 0
+	.type	__func__.10946, %object
+	.size	__func__.10946, 6
+__func__.10946:
+	.ascii	"do_gc\000"
+	.section	.rodata.__func__.11007,"a",%progbits
+	.set	.LANCHOR132,. + 0
+	.type	__func__.11007, %object
+	.size	__func__.11007, 15
+__func__.11007:
+	.ascii	"ftl_info_flush\000"
+	.section	.rodata.__func__.11056,"a",%progbits
+	.set	.LANCHOR72,. + 0
+	.type	__func__.11056, %object
+	.size	__func__.11056, 14
+__func__.11056:
+	.ascii	"ftl_free_sblk\000"
+	.section	.rodata.__func__.11088,"a",%progbits
+	.set	.LANCHOR77,. + 0
+	.type	__func__.11088, %object
+	.size	__func__.11088, 18
+__func__.11088:
+	.ascii	"ftl_alloc_sys_blk\000"
+	.section	.rodata.__func__.11098,"a",%progbits
+	.set	.LANCHOR78,. + 0
+	.type	__func__.11098, %object
+	.size	__func__.11098, 17
+__func__.11098:
+	.ascii	"ftl_free_sys_blk\000"
+	.section	.rodata.__func__.11132,"a",%progbits
+	.set	.LANCHOR155,. + 0
+	.type	__func__.11132, %object
+	.size	__func__.11132, 14
+__func__.11132:
+	.ascii	"ftl_sblk_dump\000"
+	.section	.rodata.__func__.11156,"a",%progbits
+	.set	.LANCHOR147,. + 0
+	.type	__func__.11156, %object
+	.size	__func__.11156, 16
+__func__.11156:
+	.ascii	"ftl_sysblk_dump\000"
+	.section	.rodata.__func__.11175,"a",%progbits
+	.set	.LANCHOR139,. + 0
+	.type	__func__.11175, %object
+	.size	__func__.11175, 23
+__func__.11175:
+	.ascii	"ftl_open_sblk_recovery\000"
+	.section	.rodata.__func__.11200,"a",%progbits
+	.set	.LANCHOR80,. + 0
+	.type	__func__.11200, %object
+	.size	__func__.11200, 23
+__func__.11200:
+	.ascii	"ftl_get_ppa_from_index\000"
+	.section	.rodata.__func__.11221,"a",%progbits
+	.set	.LANCHOR166,. + 0
+	.type	__func__.11221, %object
+	.size	__func__.11221, 19
+__func__.11221:
+	.ascii	"ftl_update_l2p_map\000"
+	.section	.rodata.__func__.11240,"a",%progbits
+	.set	.LANCHOR84,. + 0
+	.type	__func__.11240, %object
+	.size	__func__.11240, 22
+__func__.11240:
+	.ascii	"ftl_get_new_free_page\000"
+	.section	.rodata.__func__.11251,"a",%progbits
+	.set	.LANCHOR85,. + 0
+	.type	__func__.11251, %object
+	.size	__func__.11251, 22
+__func__.11251:
+	.ascii	"ftl_ext_alloc_new_blk\000"
+	.section	.rodata.__func__.11276,"a",%progbits
+	.set	.LANCHOR134,. + 0
+	.type	__func__.11276, %object
+	.size	__func__.11276, 19
+__func__.11276:
+	.ascii	"ftl_ext_info_flush\000"
+	.section	.rodata.__func__.11288,"a",%progbits
+	.set	.LANCHOR135,. + 0
+	.type	__func__.11288, %object
+	.size	__func__.11288, 18
+__func__.11288:
+	.ascii	"ftl_ext_info_init\000"
+	.section	.rodata.__func__.11333,"a",%progbits
+	.set	.LANCHOR136,. + 0
+	.type	__func__.11333, %object
+	.size	__func__.11333, 15
+__func__.11333:
+	.ascii	"ftl_low_format\000"
+	.section	.rodata.__func__.11377,"a",%progbits
+	.set	.LANCHOR138,. + 0
+	.type	__func__.11377, %object
+	.size	__func__.11377, 23
+__func__.11377:
+	.ascii	"ftl_re_low_format_test\000"
+	.section	.rodata.__func__.11387,"a",%progbits
+	.set	.LANCHOR129,. + 0
+	.type	__func__.11387, %object
+	.size	__func__.11387, 14
+__func__.11387:
+	.ascii	"ftl_prog_page\000"
+	.section	.rodata.__func__.11562,"a",%progbits
+	.set	.LANCHOR126,. + 0
+	.type	__func__.11562, %object
+	.size	__func__.11562, 15
+__func__.11562:
+	.ascii	"sblk_prog_page\000"
+	.section	.rodata.__func__.11621,"a",%progbits
+	.set	.LANCHOR148,. + 0
+	.type	__func__.11621, %object
+	.size	__func__.11621, 16
+__func__.11621:
+	.ascii	"load_l2p_region\000"
+	.section	.rodata.__func__.11635,"a",%progbits
+	.set	.LANCHOR102,. + 0
+	.type	__func__.11635, %object
+	.size	__func__.11635, 13
+__func__.11635:
+	.ascii	"pm_free_sblk\000"
+	.section	.rodata.__func__.11655,"a",%progbits
+	.set	.LANCHOR150,. + 0
+	.type	__func__.11655, %object
+	.size	__func__.11655, 6
+__func__.11655:
+	.ascii	"pm_gc\000"
+	.section	.rodata.__func__.11671,"a",%progbits
+	.set	.LANCHOR92,. + 0
+	.type	__func__.11671, %object
+	.size	__func__.11671, 17
+__func__.11671:
+	.ascii	"pm_alloc_new_blk\000"
+	.section	.rodata.__func__.11681,"a",%progbits
+	.set	.LANCHOR140,. + 0
+	.type	__func__.11681, %object
+	.size	__func__.11681, 14
+__func__.11681:
+	.ascii	"pm_write_page\000"
+	.section	.rodata.__func__.11699,"a",%progbits
+	.set	.LANCHOR95,. + 0
+	.type	__func__.11699, %object
+	.size	__func__.11699, 21
+__func__.11699:
+	.ascii	"pm_select_ram_region\000"
+	.section	.rodata.__func__.9485,"a",%progbits
+	.set	.LANCHOR114,. + 0
+	.type	__func__.9485, %object
+	.size	__func__.9485, 19
+__func__.9485:
+	.ascii	"flash_read_page_en\000"
+	.section	.rodata.__func__.9514,"a",%progbits
+	.set	.LANCHOR128,. + 0
+	.type	__func__.9514, %object
+	.size	__func__.9514, 19
+__func__.9514:
+	.ascii	"flash_prog_page_en\000"
+	.section	.rodata.__func__.9529,"a",%progbits
+	.set	.LANCHOR21,. + 0
+	.type	__func__.9529, %object
+	.size	__func__.9529, 26
+__func__.9529:
+	.ascii	"flash_erase_duplane_block\000"
+	.section	.rodata.__func__.9540,"a",%progbits
+	.set	.LANCHOR24,. + 0
+	.type	__func__.9540, %object
+	.size	__func__.9540, 21
+__func__.9540:
+	.ascii	"flash_erase_block_en\000"
+	.section	.rodata.__func__.9554,"a",%progbits
+	.set	.LANCHOR9,. + 0
+	.type	__func__.9554, %object
+	.size	__func__.9554, 28
+__func__.9554:
+	.ascii	"flash_wait_device_ready_raw\000"
+	.section	.rodata.__func__.9579,"a",%progbits
+	.set	.LANCHOR124,. + 0
+	.type	__func__.9579, %object
+	.size	__func__.9579, 26
+__func__.9579:
+	.ascii	"flash_start_tlc_page_prog\000"
+	.section	.rodata.__func__.9592,"a",%progbits
+	.set	.LANCHOR125,. + 0
+	.type	__func__.9592, %object
+	.size	__func__.9592, 22
+__func__.9592:
+	.ascii	"flash_start_page_prog\000"
+	.section	.rodata.__func__.9605,"a",%progbits
+	.set	.LANCHOR33,. + 0
+	.type	__func__.9605, %object
+	.size	__func__.9605, 22
+__func__.9605:
+	.ascii	"flash_start_page_read\000"
+	.section	.rodata.__func__.9620,"a",%progbits
+	.set	.LANCHOR120,. + 0
+	.type	__func__.9620, %object
+	.size	__func__.9620, 25
+__func__.9620:
+	.ascii	"flash_complete_page_read\000"
+	.section	.rodata.do_gc.str1.1,"aMS",%progbits,1
+.LC153:
+	.ascii	"gc %d: %d %d %d %d %d %d\012\000"
+.LC154:
+	.ascii	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\012"
+	.ascii	"\000"
+.LC155:
+	.ascii	"gc free %x, %d\012\000"
+	.section	.rodata.dump_ftl_info.str1.1,"aMS",%progbits,1
+.LC81:
+	.ascii	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\012\000"
+.LC82:
+	.ascii	"ftl_ext_info_blk blk:0x%x, page:0x%x\012\000"
+.LC83:
+	.ascii	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
+	.ascii	"_index:0x%x\012\000"
+.LC84:
+	.ascii	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, pag"
+	.ascii	"e_index:0x%x\012\000"
+.LC85:
+	.ascii	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page"
+	.ascii	"_index:0x%x\012\000"
+.LC86:
+	.ascii	"lpa:\000"
+.LC87:
+	.ascii	"vpn:\000"
+.LC88:
+	.ascii	"sblk:\000"
+.LC89:
+	.ascii	"lpa_hash:\000"
+.LC90:
+	.ascii	"lpa_hash_index:\000"
+	.section	.rodata.dump_sblk_queue.str1.1,"aMS",%progbits,1
+.LC24:
+	.ascii	"dump_sblk_queue: %d\012\000"
+.LC25:
+	.ascii	"buf id= %d state = %d ppa = %x\012\000"
+	.section	.rodata.flash_complete_page_read.str1.1,"aMS",%progbits,1
+.LC54:
+	.ascii	"flash_complete_page_read %x %x error_ecc %d %d\012\000"
+	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",%progbits,1
+.LC48:
+	.ascii	"%d flash_ddr_tunning_read %x ecc=%d\012\000"
+.LC49:
+	.ascii	"sync para %d\012\000"
+.LC50:
+	.ascii	"DDR mode Read error %x %x\012\000"
+	.section	.rodata.flash_erase_all.str1.1,"aMS",%progbits,1
+.LC5:
+	.ascii	"erase done: %x\012\000"
+	.section	.rodata.flash_erase_block_en.str1.1,"aMS",%progbits,1
+.LC3:
+	.ascii	"flash_erase_block %x %x\012\000"
+.LC4:
+	.ascii	"flash_erase_block block = %x status = %x\012\000"
+	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"flash_erase_duplane_block %x %x %x\012\000"
+.LC2:
+	.ascii	"flash_erase_duplane_block pageadd = %x status = %x\012"
+	.ascii	"\000"
+	.section	.rodata.flash_info_blk_init.str1.1,"aMS",%progbits,1
+.LC53:
+	.ascii	"no sys info %x\012\000"
+	.section	.rodata.flash_info_flush.str1.1,"aMS",%progbits,1
+.LC77:
+	.ascii	"finfo:\000"
+.LC78:
+	.ascii	"flash_info_flush id = %x, page = %x\012\000"
+.LC79:
+	.ascii	"sys_info_flush error:%x\012\000"
+	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",%progbits,1
+.LC6:
+	.ascii	"flash_mask_bad_block %d %d\012\000"
+	.section	.rodata.flash_prog_page.str1.1,"aMS",%progbits,1
+.LC57:
+	.ascii	"flash_prog_page %x %x %x\012\000"
+	.section	.rodata.flash_prog_page_en.str1.1,"aMS",%progbits,1
+.LC59:
+	.ascii	"flash_prog_page_en:%x %x\012\000"
+.LC60:
+	.ascii	"spare\000"
+.LC61:
+	.ascii	"data\000"
+.LC62:
+	.ascii	"write error: %x\012\000"
+	.section	.rodata.flash_read_page.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"flash_read_page %x %x %x\012\000"
+	.section	.rodata.flash_read_page_en.str1.1,"aMS",%progbits,1
+.LC51:
+	.ascii	"flash_read_page_en %x %x\012\000"
+.LC52:
+	.ascii	"flash_read_page_en %x %x error_ecc %d %d\012\000"
+	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",%progbits,1
+.LC0:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",%progbits,1
+.LC14:
+	.ascii	"ftl_alloc_sblk %x, %d %d %d\012\000"
+	.section	.rodata.ftl_discard.str1.1,"aMS",%progbits,1
+.LC148:
+	.ascii	"ftl_discard:(%x, %x, %x, %x)\012\000"
+	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",%progbits,1
+.LC65:
+	.ascii	"%d %x @%d %x\012\000"
+.LC66:
+	.ascii	"ftl_info_blk_init %d %d %x\012\000"
+	.section	.rodata.ftl_info_check.str1.1,"aMS",%progbits,1
+.LC122:
+	.ascii	"free blk vpn error: %x %x\012\000"
+.LC123:
+	.ascii	"data blk: %d %d %d\012\000"
+.LC124:
+	.ascii	"free blk: %d %d %d\012\000"
+	.section	.rodata.ftl_info_flush.str1.1,"aMS",%progbits,1
+.LC64:
+	.ascii	"g_ftl_info_blk blk = %x, page = %x version = %d\012"
+	.ascii	"\000"
+	.section	.rodata.ftl_init.str1.1,"aMS",%progbits,1
+.LC139:
+	.ascii	"FTL version: 6.0.3 20180211\000"
+.LC140:
+	.ascii	"gp_ftl_ext_info %p %p %p\012\000"
+.LC141:
+	.ascii	"flash info size: %d %d %d\012\000"
+	.section	.rodata.ftl_low_format.str1.1,"aMS",%progbits,1
+.LC67:
+	.ascii	"low format %d %d %d %d\012\000"
+	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",%progbits,1
+.LC19:
+	.ascii	"mask bad block:cs %x block: %x\012\000"
+	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",%progbits,1
+.LC69:
+	.ascii	"saved_active_page  = %x\012\000"
+.LC70:
+	.ascii	"saved_active_plane = %x\012\000"
+.LC71:
+	.ascii	"sblk = %x\012\000"
+.LC72:
+	.ascii	"phy_blk = %x %x\012\000"
+.LC73:
+	.ascii	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x"
+	.ascii	" %x %x, spare: %x %x %x %x\012\000"
+.LC74:
+	.ascii	"sblk = %x, vpn0 = %d, vpn1 = %d\012\000"
+.LC75:
+	.ascii	"dump write = %x\012\000"
+	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",%progbits,1
+.LC68:
+	.ascii	"re low formaet %d\012\000"
+	.section	.rodata.ftl_read.str1.1,"aMS",%progbits,1
+.LC114:
+	.ascii	"ftl_read refresh =%x, lpa = %x, ppa= %x\012\000"
+	.section	.rodata.ftl_read_ahead.str1.1,"aMS",%progbits,1
+.LC100:
+	.ascii	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\012\000"
+.LC101:
+	.ascii	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\012\000"
+	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",%progbits,1
+.LC107:
+	.ascii	"ftl_sblk_dump = %x %x %x %x\012\000"
+.LC108:
+	.ascii	"page_addr = %x, lpa=%x vpn = %d\012\000"
+.LC109:
+	.ascii	"index= %x, lpa=%x\012\000"
+.LC110:
+	.ascii	"block = %x, vpn=%x check vpn = %d\012\000"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",%progbits,1
+.LC127:
+	.ascii	"ftl_scan_all_data = %x\012\000"
+.LC128:
+	.ascii	"scan lpa = %x ppa= %x\012\000"
+.LC129:
+	.ascii	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x "
+	.ascii	"data=%x %x\012\000"
+.LC130:
+	.ascii	"lba = %x, id= %x, index = %x hash ppa = %x\012\000"
+.LC131:
+	.ascii	"0pm:\000"
+.LC132:
+	.ascii	"1pm:\000"
+	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",%progbits,1
+.LC80:
+	.ascii	"l2p:\000"
+	.section	.rodata.ftl_test_block.str1.1,"aMS",%progbits,1
+.LC63:
+	.ascii	"low format %d\012\000"
+	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",%progbits,1
+.LC143:
+	.ascii	"ftl_update_l2p_map: %x %x %x\012\000"
+.LC144:
+	.ascii	"ftl_update_l2p_map\000"
+.LC145:
+	.ascii	"lpa_tbl:\000"
+.LC146:
+	.ascii	"sblk %x vpn: %d %d\012\000"
+	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",%progbits,1
+.LC17:
+	.ascii	"ftl_vpn_decrement %x = %d\012\000"
+	.section	.rodata.ftl_write_commit.str1.1,"aMS",%progbits,1
+.LC147:
+	.ascii	"%d read error: ppa:%x, lpa:%x, status:%x\012\000"
+	.section	.rodata.ftl_write_completed.str1.1,"aMS",%progbits,1
+.LC18:
+	.ascii	"ftl prog error =%x, lpa = %x, ppa= %x\012\000"
+	.section	.rodata.gc_add_sblk.str1.1,"aMS",%progbits,1
+.LC7:
+	.ascii	"gc_add_sblk = %d, %d, %d, %d, %d, %d\012\000"
+	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",%progbits,1
+.LC56:
+	.ascii	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
+	.ascii	"\000"
+	.section	.rodata.gc_do_copy_back.str1.1,"aMS",%progbits,1
+.LC149:
+	.ascii	"gc page in buf: lpa %x ppa = %x pageindex= %x\012\000"
+.LC150:
+	.ascii	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x "
+	.ascii	"page_index= %d\012\000"
+.LC151:
+	.ascii	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\012\000"
+.LC152:
+	.ascii	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id "
+	.ascii	"= %x plane = %x lpa=%x\012\000"
+	.section	.rodata.gc_free_src_blk.str1.1,"aMS",%progbits,1
+.LC15:
+	.ascii	"gc_free_src_blk = %x, vpn = %d\012\000"
+.LC16:
+	.ascii	"gc_free_src_blk %x, %d\012\000"
+	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",%progbits,1
+.LC10:
+	.ascii	"%d gc_free_temp_buf buf id= %x\012\000"
+	.section	.rodata.gc_recovery.str1.1,"aMS",%progbits,1
+.LC133:
+	.ascii	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x "
+	.ascii	"%x %x %x\012\000"
+.LC134:
+	.ascii	"gc_lpa:\000"
+.LC135:
+	.ascii	"gc_ppa:\000"
+.LC136:
+	.ascii	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\012"
+	.ascii	"\000"
+.LC137:
+	.ascii	"gc_recovery\000"
+.LC138:
+	.ascii	"gc_recovery: %x vpn = %x\012\000"
+	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",%progbits,1
+.LC125:
+	.ascii	"gc_scan_src_blk = %x, vpn = %d\012\000"
+.LC126:
+	.ascii	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\012\000"
+	.section	.rodata.gc_search_src_blk.str1.1,"aMS",%progbits,1
+.LC111:
+	.ascii	"gc_search_src_blk = %d, %d, %d\012\000"
+.LC112:
+	.ascii	"vpn gc = %d, id = %d\012\000"
+.LC113:
+	.ascii	"gc_search_src_blk count= %d\012\000"
+	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",%progbits,1
+.LC11:
+	.ascii	"gc_static_wearleveling: slc blk: %d, tlc blk: %d av"
+	.ascii	"g slc ec: %d, avg tlc ec: %d \012\000"
+.LC12:
+	.ascii	"gc_static_wearleveling: min slc ec: %d, min tlc ec:"
+	.ascii	" %d max slc ec: %d, max tlc ec: %d \012\000"
+	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",%progbits,1
+.LC102:
+	.ascii	"gc_update_l2p_map_new sblk %x\012\000"
+.LC103:
+	.ascii	"gc_update_l2p_map_new: %x %x %x\012\000"
+.LC104:
+	.ascii	"0lpa: %x %x %x\012\000"
+.LC105:
+	.ascii	"lpa: %x %x %x\012\000"
+.LC106:
+	.ascii	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\012"
+	.ascii	"\000"
+	.section	.rodata.gc_write_completed.str1.1,"aMS",%progbits,1
+.LC8:
+	.ascii	"status: %x, ppa: %x\012\000"
+.LC9:
+	.ascii	"gc_write_completed: %x  %x  %x %x\012\000"
+	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",%progbits,1
+.LC33:
+	.ascii	"otp error! %d\000"
+.LC34:
+	.ascii	"rr\000"
+	.section	.rodata.hynix_read_retrial.str1.1,"aMS",%progbits,1
+.LC47:
+	.ascii	"hynix RR %d row=%x, count %d, status=%d\012\000"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
+.LC92:
+	.ascii	"region_id = %d, pm_max_region = %d\012\000"
+.LC93:
+	.ascii	"load_l2p_region = %x,%x,%x, %x\012\000"
+.LC94:
+	.ascii	"pm_ppa:\000"
+.LC95:
+	.ascii	"data:\000"
+.LC96:
+	.ascii	"spare:\000"
+	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",%progbits,1
+.LC28:
+	.ascii	"%s %d %d\012\000"
+	.section	.rodata.micron_read_retrial.str1.1,"aMS",%progbits,1
+.LC42:
+	.ascii	"micron %d row=%x,count %d,status=%d\012\000"
+.LC43:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.nandc_xfer.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"dqs data abort %x\012\000"
+.LC40:
+	.ascii	"xfer error %x\012\000"
+	.section	.rodata.nandc_xfer_done.str1.1,"aMS",%progbits,1
+.LC35:
+	.ascii	"%d mtrans_cnt = %d page_num = %d\012\000"
+.LC36:
+	.ascii	"nandc:\000"
+.LC37:
+	.ascii	"%d flReg.d32=%x %x\012\000"
+.LC38:
+	.ascii	"nandc_xfer_done read error %x\012\000"
+	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",%progbits,1
+.LC26:
+	.ascii	"blk %x is bad block\012\000"
+.LC27:
+	.ascii	"pm_alloc_new_blk: %x %x %x %x\012\000"
+	.section	.rodata.pm_init.str1.1,"aMS",%progbits,1
+.LC97:
+	.ascii	"pm_init posr %x %x %x\012\000"
+.LC98:
+	.ascii	"pm_init recovery %x %x %x\012\000"
+	.section	.rodata.pm_log2phys.str1.1,"aMS",%progbits,1
+.LC99:
+	.ascii	"pm_log2phys  lpn = %d, max lpn = %d\012\000"
+	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",%progbits,1
+.LC91:
+	.ascii	"%s w error lpn = %x, max ppa = %d\012\000"
+	.section	.rodata.pm_write_page.str1.1,"aMS",%progbits,1
+.LC76:
+	.ascii	"pm_write_page write error: %x\012\000"
+	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",%progbits,1
+.LC20:
+	.ascii	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn:"
+	.ascii	" s:%x t:%x\012\000"
+.LC21:
+	.ascii	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\012\000"
+.LC22:
+	.ascii	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\012\000"
+.LC23:
+	.ascii	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\012\000"
+	.section	.rodata.print_gc_debug_info.str1.1,"aMS",%progbits,1
+.LC13:
+	.ascii	"gc: b:%x,p:%x,i:%x; free buf=%d %d\012\000"
+	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"set buf %d,status = %x, ppa = %x lun state = %d\012"
+	.ascii	"\000"
+	.section	.rodata.random_seed,"a",%progbits
+	.align	1
+	.set	.LANCHOR32,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.short	22378
+	.short	1512
+	.short	25245
+	.short	17827
+	.short	25756
+	.short	19440
+	.short	9026
+	.short	10030
+	.short	29528
+	.short	20467
+	.short	29676
+	.short	24432
+	.short	31328
+	.short	6872
+	.short	13426
+	.short	13842
+	.short	8783
+	.short	1108
+	.short	782
+	.short	28837
+	.short	30729
+	.short	9505
+	.short	18676
+	.short	23085
+	.short	18730
+	.short	1085
+	.short	32609
+	.short	14697
+	.short	20858
+	.short	15170
+	.short	30365
+	.short	1607
+	.short	32298
+	.short	4995
+	.short	18905
+	.short	1976
+	.short	9592
+	.short	20204
+	.short	17443
+	.short	13615
+	.short	23330
+	.short	29369
+	.short	13947
+	.short	9398
+	.short	32398
+	.short	8984
+	.short	27600
+	.short	21785
+	.short	6019
+	.short	6311
+	.short	31598
+	.short	30210
+	.short	19327
+	.short	13896
+	.short	11347
+	.short	27545
+	.short	3107
+	.short	26575
+	.short	32270
+	.short	19852
+	.short	20601
+	.short	8349
+	.short	9290
+	.short	29819
+	.short	13579
+	.short	3661
+	.short	28676
+	.short	27331
+	.short	32574
+	.short	8693
+	.short	31253
+	.short	9081
+	.short	5399
+	.short	6842
+	.short	20087
+	.short	5537
+	.short	1274
+	.short	11617
+	.short	9530
+	.short	4866
+	.short	8035
+	.short	23219
+	.short	1178
+	.short	23272
+	.short	7383
+	.short	18944
+	.short	12488
+	.short	12871
+	.short	29340
+	.short	20532
+	.short	11022
+	.short	22514
+	.short	228
+	.short	22363
+	.short	24978
+	.short	14584
+	.short	12138
+	.short	3092
+	.short	17916
+	.short	16863
+	.short	14554
+	.short	31457
+	.short	29474
+	.short	25311
+	.short	24121
+	.short	3684
+	.short	28037
+	.short	22865
+	.short	22839
+	.short	25217
+	.short	13217
+	.short	27186
+	.short	14938
+	.short	11180
+	.short	29754
+	.short	24180
+	.short	15150
+	.short	32455
+	.short	20434
+	.short	23848
+	.short	29983
+	.short	16120
+	.short	14769
+	.short	20041
+	.short	29803
+	.short	28406
+	.short	17598
+	.short	28087
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
+.LC142:
+	.ascii	"ftl_init %x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC29:
+	.ascii	"%s 0x%x:\000"
+.LC30:
+	.ascii	"%x \000"
+.LC31:
+	.ascii	"\000"
+.LC32:
+	.ascii	"%s\012\000"
+	.section	.rodata.sblk_prog_page.str1.1,"aMS",%progbits,1
+.LC58:
+	.ascii	"sblk_prog_page ppa = %x, count = %d\012\000"
+	.section	.rodata.toshiba_15ref_value,"a",%progbits
+	.set	.LANCHOR2,. + 0
+	.type	toshiba_15ref_value, %object
+	.size	toshiba_15ref_value, 95
+toshiba_15ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.rodata.toshiba_3D_slc_value,"a",%progbits
+	.set	.LANCHOR16,. + 0
+	.type	toshiba_3D_slc_value, %object
+	.size	toshiba_3D_slc_value, 11
+toshiba_3D_slc_value:
+	.byte	-117
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-24
+	.byte	24
+	.byte	-40
+	.byte	40
+	.byte	-56
+	.byte	56
+	.section	.rodata.toshiba_3D_tlc_value,"a",%progbits
+	.set	.LANCHOR15,. + 0
+	.type	toshiba_3D_tlc_value, %object
+	.size	toshiba_3D_tlc_value, 399
+toshiba_3D_tlc_value:
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-118
+	.byte	-118
+	.byte	-118
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
+	.byte	5
+	.byte	-2
+	.byte	-1
+	.byte	0
+	.byte	-3
+	.byte	-2
+	.byte	6
+	.byte	-6
+	.byte	-15
+	.byte	-15
+	.byte	-2
+	.byte	-12
+	.byte	-16
+	.byte	-6
+	.byte	-2
+	.byte	-19
+	.byte	-19
+	.byte	-6
+	.byte	-4
+	.byte	-12
+	.byte	-14
+	.byte	-2
+	.byte	-11
+	.byte	-23
+	.byte	-34
+	.byte	-4
+	.byte	-20
+	.byte	-22
+	.byte	-2
+	.byte	-7
+	.byte	-31
+	.byte	-30
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+	.byte	-18
+	.byte	2
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+	.byte	-36
+	.byte	-12
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+	.byte	-34
+	.byte	-6
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+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-6
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+	.byte	1
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+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",%progbits,1
+.LC44:
+	.ascii	"toshiba SRR %d row=%x, status=%d\012\000"
+.LC45:
+	.ascii	"toshiba TRR %d row=%x, status=%d\012\000"
+.LC46:
+	.ascii	"toshiba RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.toshiba_A19ref_value,"a",%progbits
+	.set	.LANCHOR0,. + 0
+	.type	toshiba_A19ref_value, %object
+	.size	toshiba_A19ref_value, 45
+toshiba_A19ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.rodata.toshiba_ref_value,"a",%progbits
+	.set	.LANCHOR3,. + 0
+	.type	toshiba_ref_value, %object
+	.size	toshiba_ref_value, 8
+toshiba_ref_value:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.rodata.vpn_check.str1.1,"aMS",%progbits,1
+.LC115:
+	.ascii	"acblk = %x, tempblk = %x, gc_des = %x\012\000"
+.LC116:
+	.ascii	"acblk = %x, free page = %x, vpn = %x %x\012\000"
+.LC117:
+	.ascii	"tmp_blk = %x, free page = %x, vpn = %x %x\012\000"
+.LC118:
+	.ascii	"vpn_check lpa = %x, ppa = %x, blk = %x\012\000"
+.LC119:
+	.ascii	"l2p\000"
+.LC120:
+	.ascii	"vpn_check %x = c %x  s %x function: %x\012\000"
+.LC121:
+	.ascii	"vpn_check blk = %x fix vpc\012\000"
+	.hidden	free
diff --git a/drivers/rknand/rk_zftl_arm_v8.S b/drivers/rknand/rk_zftl_arm_v8.S
new file mode 100644
index 0000000000..856443654f
--- /dev/null
+++ b/drivers/rknand/rk_zftl_arm_v8.S
@@ -0,0 +1,22081 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2018-02-11
+ */
+	.arch armv8-a
+	.file	"rk_zftl_arm_v8.S"
+	.section	.text.flash_mem_cmp8,"ax",@progbits
+	.align	2
+	.type	flash_mem_cmp8, %function
+flash_mem_cmp8:
+	mov	x3, 0
+.L2:
+	mov	w4, w3
+	cmp	w3, w2
+	bcc	.L4
+	mov	w0, 0
+	ret
+.L4:
+	ldrb	w5, [x0, x3]
+	add	x3, x3, 1
+	add	x6, x1, x3
+	ldrb	w6, [x6, -1]
+	cmp	w6, w5
+	beq	.L2
+	add	w0, w4, 1
+	ret
+	.size	flash_mem_cmp8, .-flash_mem_cmp8
+	.section	.text.nand_flash_print_info,"ax",@progbits
+	.align	2
+	.global	nand_flash_print_info
+	.type	nand_flash_print_info, %function
+nand_flash_print_info:
+	ret
+	.size	nand_flash_print_info, .-nand_flash_print_info
+	.section	.text.FlashTimingCfg,"ax",@progbits
+	.align	2
+	.global	FlashTimingCfg
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	ret
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.timer_delay_ns,"ax",@progbits
+	.align	2
+	.global	timer_delay_ns
+	.type	timer_delay_ns, %function
+timer_delay_ns:
+	sub	sp, sp, #16
+	lsr	w0, w0, 4
+	str	w0, [sp, 12]
+.L9:
+	ldr	w0, [sp, 12]
+	sub	w1, w0, #1
+	str	w1, [sp, 12]
+	cbnz	w0, .L9
+	add	sp, sp, 16
+	ret
+	.size	timer_delay_ns, .-timer_delay_ns
+	.section	.text.flash_read_status,"ax",@progbits
+	.align	2
+	.global	flash_read_status
+	.type	flash_read_status, %function
+flash_read_status:
+	stp	x29, x30, [sp, -16]!
+	mov	x2, x0
+	mov	w0, 112
+	add	x29, sp, 0
+	str	w0, [x2, 8]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldr	w0, [x2]
+	ldp	x29, x30, [sp], 16
+	and	w0, w0, 255
+	ret
+	.size	flash_read_status, .-flash_read_status
+	.section	.text.toshiba_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_set_rr_para
+	.type	toshiba_set_rr_para, %function
+toshiba_set_rr_para:
+	and	w11, w1, 255
+	mov	x4, x0
+	add	w2, w11, 1
+	mov	w0, 5
+	adrp	x6, .LANCHOR4
+	add	x6, x6, :lo12:.LANCHOR4
+	adrp	x3, .LANCHOR0
+	add	x3, x3, :lo12:.LANCHOR0
+	umull	x2, w2, w0
+	adrp	x0, .LANCHOR1
+	add	x7, x0, :lo12:.LANCHOR1
+	mov	x5, x0
+	ldrb	w0, [x6]
+	add	x3, x3, x2
+	add	x7, x7, x2
+	adrp	x8, .LANCHOR2
+	mov	x2, 0
+	adrp	x10, .LANCHOR3
+	add	x8, x8, :lo12:.LANCHOR2
+	add	x10, x10, :lo12:.LANCHOR3
+	cmp	w0, w2
+	bhi	.L22
+	ret
+.L16:
+	cmp	w0, 35
+	bne	.L18
+	ldrsb	w0, [x3, x2]
+	b	.L23
+.L18:
+	ldrsb	w0, [x10, w11, sxtw]
+	b	.L23
+.L22:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L19:
+	mov	w0, 85
+	str	w0, [x4, 8]
+	add	x0, x5, :lo12:.LANCHOR1
+	ldrsb	w0, [x2, x0]
+	str	w0, [x4, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	ldrb	w0, [x8]
+	cmp	w0, 34
+	bne	.L16
+	ldrsb	w0, [x7, x2]
+.L23:
+	str	w0, [x4]
+	add	x2, x2, 1
+	ldrb	w0, [x6]
+	cmp	w0, w2
+	bhi	.L19
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	toshiba_set_rr_para, .-toshiba_set_rr_para
+	.section	.text.hynix_set_rr_para,"ax",@progbits
+	.align	2
+	.type	hynix_set_rr_para, %function
+hynix_set_rr_para:
+	adrp	x2, .LANCHOR5
+	and	w1, w1, 255
+	mov	x3, 32
+	and	w0, w0, 255
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	mov	x4, 0
+	add	x6, x2, 128
+	add	x2, x2, 112
+	ldrb	w5, [x2, 1]
+	cmp	w5, w4, uxtb
+	umaddl	x3, w1, w5, x3
+	mov	w1, 160
+	umaddl	x1, w1, w0, x3
+	ubfiz	x0, x0, 8, 8
+	add	x2, x2, x1
+	adrp	x1, .LANCHOR6
+	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	add	x3, x3, x0
+	mov	w0, 54
+	str	w0, [x3, 2056]
+	bhi	.L30
+	mov	w0, 22
+	str	w0, [x3, 2056]
+	ret
+.L30:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+.L26:
+	ldrb	w0, [x6, x4]
+	str	w0, [x3, 2052]
+	mov	w0, 120
+	bl	timer_delay_ns
+	ldrsb	w0, [x2, x4]
+	str	w0, [x3, 2048]
+	add	x4, x4, 1
+	cmp	w5, w4, uxtb
+	bhi	.L26
+	mov	w0, 22
+	str	w0, [x3, 2056]
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	hynix_set_rr_para, .-hynix_set_rr_para
+	.section	.text.hynix_reconfig_rr_para,"ax",@progbits
+	.align	2
+	.global	hynix_reconfig_rr_para
+	.type	hynix_reconfig_rr_para, %function
+hynix_reconfig_rr_para:
+	adrp	x1, .LANCHOR2
+	ldrb	w1, [x1, #:lo12:.LANCHOR2]
+	sub	w1, w1, #1
+	and	w1, w1, 255
+	cmp	w1, 6
+	bhi	.L37
+	adrp	x8, .LANCHOR5
+	and	w0, w0, 255
+	sxtw	x7, w0
+	ldr	x1, [x8, #:lo12:.LANCHOR5]
+	add	x1, x1, x7
+	ldrb	w1, [x1, 120]
+	cbz	w1, .L37
+	stp	x29, x30, [sp, -16]!
+	mov	w1, 0
+	add	x29, sp, 0
+	bl	hynix_set_rr_para
+	ldr	x0, [x8, #:lo12:.LANCHOR5]
+	add	x0, x0, x7
+	strb	wzr, [x0, 120]
+	ldp	x29, x30, [sp], 16
+	ret
+.L37:
+	ret
+	.size	hynix_reconfig_rr_para, .-hynix_reconfig_rr_para
+	.section	.text.nandc_set_ddr_para,"ax",@progbits
+	.align	2
+	.global	nandc_set_ddr_para
+	.type	nandc_set_ddr_para, %function
+nandc_set_ddr_para:
+	adrp	x1, .LANCHOR7
+	and	w0, w0, 255
+	adrp	x2, .LANCHOR6
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	cmp	w1, 9
+	lsl	w1, w0, 16
+	lsl	w0, w0, 8
+	orr	w1, w1, w0
+	orr	w1, w1, 3
+	bne	.L41
+	str	w1, [x2, 80]
+	ret
+.L41:
+	str	w1, [x2, 304]
+	ret
+	.size	nandc_set_ddr_para, .-nandc_set_ddr_para
+	.section	.text.nandc_get_ddr_para,"ax",@progbits
+	.align	2
+	.global	nandc_get_ddr_para
+	.type	nandc_get_ddr_para, %function
+nandc_get_ddr_para:
+	adrp	x0, .LANCHOR7
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	cmp	w0, 9
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	bne	.L44
+	ldr	w0, [x0, 80]
+.L46:
+	ubfx	x0, x0, 8, 8
+	ret
+.L44:
+	ldr	w0, [x0, 304]
+	b	.L46
+	.size	nandc_get_ddr_para, .-nandc_get_ddr_para
+	.section	.text.nandc_set_if_mode,"ax",@progbits
+	.align	2
+	.global	nandc_set_if_mode
+	.type	nandc_set_if_mode, %function
+nandc_set_if_mode:
+	adrp	x1, .LANCHOR6
+	and	w0, w0, 255
+	tst	w0, 6
+	ldr	x2, [x1, #:lo12:.LANCHOR6]
+	ldr	w1, [x2]
+	beq	.L48
+	tst	x0, 4
+	orr	w1, w1, 24576
+	adrp	x0, .LANCHOR7
+	and	w1, w1, -32769
+	orr	w1, w1, 196608
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	orr	w3, w1, 32768
+	csel	w1, w3, w1, ne
+	cmp	w0, 9
+	mov	w0, 4099
+	movk	w0, 0x10, lsl 16
+	bne	.L50
+	mov	w3, 8321
+	str	w3, [x2, 8]
+	str	w0, [x2, 80]
+	mov	w0, 38
+	str	w0, [x2, 84]
+	mov	w0, 39
+	str	w0, [x2, 84]
+.L51:
+	str	w1, [x2]
+	ret
+.L50:
+	mov	w3, 8322
+	str	w3, [x2, 344]
+	str	w0, [x2, 304]
+	mov	w0, 38
+	str	w0, [x2, 308]
+	mov	w0, 39
+	str	w0, [x2, 308]
+	b	.L51
+.L48:
+	and	w1, w1, -8193
+	b	.L51
+	.size	nandc_set_if_mode, .-nandc_set_if_mode
+	.section	.text.nandc_cs,"ax",@progbits
+	.align	2
+	.global	nandc_cs
+	.type	nandc_cs, %function
+nandc_cs:
+	adrp	x1, .LANCHOR6
+	mov	w2, 1
+	lsl	w0, w2, w0
+	ldr	x3, [x1, #:lo12:.LANCHOR6]
+	ldr	w1, [x3]
+	bfi	w1, w0, 0, 8
+	str	w1, [x3]
+	ret
+	.size	nandc_cs, .-nandc_cs
+	.section	.text.nandc_de_cs,"ax",@progbits
+	.align	2
+	.global	nandc_de_cs
+	.type	nandc_de_cs, %function
+nandc_de_cs:
+	adrp	x0, .LANCHOR6
+	ldr	x1, [x0, #:lo12:.LANCHOR6]
+	ldr	w0, [x1]
+	and	w0, w0, -256
+	and	w0, w0, -131073
+	str	w0, [x1]
+	ret
+	.size	nandc_de_cs, .-nandc_de_cs
+	.section	.text.flash_wait_device_ready_raw,"ax",@progbits
+	.align	2
+	.global	flash_wait_device_ready_raw
+	.type	flash_wait_device_ready_raw, %function
+flash_wait_device_ready_raw:
+	stp	x29, x30, [sp, -16]!
+	mov	w5, w1
+	adrp	x1, .LANCHOR8
+	and	w0, w0, 255
+	add	x29, sp, 0
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, w0
+	bhi	.L57
+	adrp	x1, .LANCHOR9
+	adrp	x0, .LC0
+	mov	w2, 604
+	add	x1, x1, :lo12:.LANCHOR9
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L58:
+	b	.L58
+.L57:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	w7, w2
+	ldrb	w6, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w6
+	bl	nandc_cs
+	ubfiz	x3, x6, 8, 8
+	add	x3, x4, x3
+	mov	w0, 120
+	and	w1, w5, 255
+	str	w0, [x3, 2056]
+	str	w1, [x3, 2052]
+	lsr	w1, w5, 8
+	str	w1, [x3, 2052]
+	lsr	w5, w5, 16
+	str	w5, [x3, 2052]
+.L65:
+	bl	timer_delay_ns
+	ldr	w2, [x3, 2048]
+	and	w2, w2, 255
+	bics	wzr, w7, w2
+	bne	.L60
+	cmp	w2, 255
+	beq	.L60
+	mov	w0, w6
+	bl	nandc_de_cs
+	ldp	x29, x30, [sp], 16
+	mov	w0, w2
+	ret
+.L60:
+	mov	w0, 20
+	b	.L65
+	.size	flash_wait_device_ready_raw, .-flash_wait_device_ready_raw
+	.section	.text.flash_wait_device_ready,"ax",@progbits
+	.align	2
+	.global	flash_wait_device_ready
+	.type	flash_wait_device_ready, %function
+flash_wait_device_ready:
+	mov	w2, w1
+	ubfx	x6, x0, 21, 3
+	and	w1, w0, 2097151
+	tst	x0, 50331648
+	bne	.L67
+	adrp	x0, .LANCHOR11
+	adrp	x5, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L68
+	ldrb	w0, [x5, #:lo12:.LANCHOR12]
+	cbz	w0, .L67
+.L68:
+	adrp	x0, .LANCHOR13
+	ldrh	w3, [x0, #:lo12:.LANCHOR13]
+	ldrb	w0, [x5, #:lo12:.LANCHOR12]
+	udiv	w4, w1, w3
+	mul	w4, w4, w3
+	sub	w3, w1, w4
+	cbz	w0, .L69
+	add	w1, w4, w3, lsl 1
+.L67:
+	mov	w0, w6
+	b	flash_wait_device_ready_raw
+.L69:
+	adrp	x5, .LANCHOR14
+	add	x5, x5, :lo12:.LANCHOR14
+	ldrh	w3, [x5, w3, uxtw 1]
+	add	w1, w3, w4
+	b	.L67
+	.size	flash_wait_device_ready, .-flash_wait_device_ready
+	.section	.text.nandc_wait_flash_ready,"ax",@progbits
+	.align	2
+	.global	nandc_wait_flash_ready
+	.type	nandc_wait_flash_ready, %function
+nandc_wait_flash_ready:
+	mov	w2, 34464
+	stp	x29, x30, [sp, -32]!
+	movk	w2, 0x1, lsl 16
+	adrp	x3, .LANCHOR6
+	add	x29, sp, 0
+.L78:
+	mov	w0, 100
+	bl	timer_delay_ns
+	ldr	x0, [x3, #:lo12:.LANCHOR6]
+	ldr	w0, [x0]
+	str	w0, [x29, 24]
+	ldr	w0, [x29, 24]
+	tbnz	x0, 9, .L79
+	subs	w2, w2, #1
+	bne	.L78
+	mov	w0, -1
+.L76:
+	ldp	x29, x30, [sp], 32
+	ret
+.L79:
+	mov	w0, 0
+	b	.L76
+	.size	nandc_wait_flash_ready, .-nandc_wait_flash_ready
+	.section	.text.sandisk_set_rr_para,"ax",@progbits
+	.align	2
+	.global	sandisk_set_rr_para
+	.type	sandisk_set_rr_para, %function
+sandisk_set_rr_para:
+	stp	x29, x30, [sp, -16]!
+	mov	x3, x0
+	and	w2, w1, 255
+	mov	w0, 239
+	add	x29, sp, 0
+	str	w0, [x3, 8]
+	mov	w0, 17
+	str	w0, [x3, 4]
+	mov	w0, 200
+	bl	timer_delay_ns
+	add	w1, w2, 1
+	adrp	x0, .LANCHOR4
+	adrp	x2, .LANCHOR0
+	add	x2, x2, :lo12:.LANCHOR0
+	ldrb	w4, [x0, #:lo12:.LANCHOR4]
+	adrp	x0, .LANCHOR2
+	ldrb	w5, [x0, #:lo12:.LANCHOR2]
+	mov	w0, 5
+	umull	x1, w1, w0
+	adrp	x0, .LANCHOR1
+	add	x0, x0, :lo12:.LANCHOR1
+	add	x2, x2, x1
+	add	x1, x0, x1
+	mov	x0, 0
+.L83:
+	cmp	w4, w0
+	bhi	.L86
+	ldp	x29, x30, [sp], 16
+	b	nandc_wait_flash_ready
+.L86:
+	cmp	w5, 67
+	bne	.L84
+	ldrsb	w6, [x1, x0]
+.L88:
+	add	x0, x0, 1
+	str	w6, [x3]
+	b	.L83
+.L84:
+	ldrsb	w6, [x2, x0]
+	b	.L88
+	.size	sandisk_set_rr_para, .-sandisk_set_rr_para
+	.section	.text.toshiba_3d_set_tlc_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_set_tlc_rr_para
+	.type	toshiba_3d_set_tlc_rr_para, %function
+toshiba_3d_set_tlc_rr_para:
+	mov	x4, x0
+	stp	x29, x30, [sp, -16]!
+	and	x2, x1, 255
+	mov	x1, 7
+	add	x29, sp, 0
+	mov	w6, 213
+	str	w6, [x4, 8]
+	str	wzr, [x4, 4]
+	nop // between mem op and mult-accumulate
+	madd	x1, x2, x1, x1
+	mov	w0, -119
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR15
+	add	x0, x0, :lo12:.LANCHOR15
+	add	x5, x0, x1
+	ldrsb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 3]
+	str	w0, [x4]
+	bl	nandc_wait_flash_ready
+	ldp	x29, x30, [sp], 16
+	str	w6, [x4, 8]
+	str	wzr, [x4, 4]
+	mov	w0, -118
+	str	w0, [x4, 4]
+	ldrsb	w0, [x5, 4]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 5]
+	str	w0, [x4]
+	ldrsb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	b	nandc_wait_flash_ready
+	.size	toshiba_3d_set_tlc_rr_para, .-toshiba_3d_set_tlc_rr_para
+	.section	.text.toshiba_3d_set_slc_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_set_slc_rr_para
+	.type	toshiba_3d_set_slc_rr_para, %function
+toshiba_3d_set_slc_rr_para:
+	mov	w2, 213
+	str	w2, [x0, 8]
+	str	wzr, [x0, 4]
+	mov	w2, -117
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR16
+	add	x2, x2, :lo12:.LANCHOR16
+	add	x1, x2, x1, uxtb
+	ldrsb	w1, [x1, 1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	nandc_wait_flash_ready
+	.size	toshiba_3d_set_slc_rr_para, .-toshiba_3d_set_slc_rr_para
+	.section	.text.toshiba_tlc_set_rr_para,"ax",@progbits
+	.align	2
+	.global	toshiba_tlc_set_rr_para
+	.type	toshiba_tlc_set_rr_para, %function
+toshiba_tlc_set_rr_para:
+	mov	w6, 239
+	uxtw	x1, w1
+	cbz	w2, .L93
+	stp	x29, x30, [sp, -16]!
+	mov	x4, x0
+	mov	x2, 7
+	mov	w0, 18
+	add	x29, sp, 0
+	str	w6, [x4, 8]
+	mul	x1, x1, x2
+	str	w0, [x4, 4]
+	adrp	x0, .LANCHOR17
+	add	x0, x0, :lo12:.LANCHOR17
+	add	x5, x0, x1
+	ldrb	w0, [x0, x1]
+	str	w0, [x4]
+	ldrb	w0, [x5, 1]
+	str	w0, [x4]
+	ldrb	w0, [x5, 2]
+	str	w0, [x4]
+	ldrb	w0, [x5, 3]
+	str	w0, [x4]
+	bl	nandc_wait_flash_ready
+	str	w6, [x4, 8]
+	mov	w0, 19
+	str	w0, [x4, 4]
+	ldrb	w0, [x5, 4]
+	str	w0, [x4]
+	ldrb	w0, [x5, 5]
+	str	w0, [x4]
+	ldrb	w0, [x5, 6]
+	str	w0, [x4]
+	str	wzr, [x4]
+	ldp	x29, x30, [sp], 16
+.L96:
+	b	nandc_wait_flash_ready
+.L93:
+	str	w6, [x0, 8]
+	mov	w2, 20
+	str	w2, [x0, 4]
+	adrp	x2, .LANCHOR18
+	add	x2, x2, :lo12:.LANCHOR18
+	ldrb	w1, [x2, x1]
+	str	w1, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	str	wzr, [x0]
+	b	.L96
+	.size	toshiba_tlc_set_rr_para, .-toshiba_tlc_set_rr_para
+	.section	.text.flash_enter_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_enter_slc_mode
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	adrp	x1, .LANCHOR11
+	and	x0, x0, 255
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L99
+	adrp	x1, .LANCHOR6
+	cmp	w2, 1
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bne	.L101
+	adrp	x2, .LANCHOR19+29
+	ldrb	w2, [x2, #:lo12:.LANCHOR19+29]
+	cbz	w2, .L99
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	str	w2, [x0, 8]
+	ret
+.L101:
+	cmp	w2, 2
+	bne	.L99
+	adrp	x2, .LANCHOR20
+	ldrb	w3, [x2, #:lo12:.LANCHOR20]
+	cbz	w3, .L99
+	ubfiz	x0, x0, 8, 8
+	strb	wzr, [x2, #:lo12:.LANCHOR20]
+	add	x0, x1, x0
+	mov	w1, 239
+	str	w1, [x0, 2056]
+	mov	w1, 145
+	str	w1, [x0, 2052]
+	mov	w1, 1
+	str	wzr, [x0, 2048]
+	str	w1, [x0, 2048]
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+	b	nandc_wait_flash_ready
+.L99:
+	ret
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",@progbits
+	.align	2
+	.global	flash_exit_slc_mode
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	adrp	x1, .LANCHOR11
+	and	x0, x0, 255
+	ldrb	w2, [x1, #:lo12:.LANCHOR11]
+	cbz	w2, .L111
+	adrp	x1, .LANCHOR6
+	cmp	w2, 1
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bne	.L113
+	adrp	x2, .LANCHOR19+30
+	ldrb	w2, [x2, #:lo12:.LANCHOR19+30]
+	cbz	w2, .L111
+	add	x0, x0, 8
+	add	x0, x1, x0, lsl 8
+	str	w2, [x0, 8]
+	ret
+.L113:
+	cmp	w2, 2
+	bne	.L111
+	adrp	x3, .LANCHOR20
+	ldrb	w2, [x3, #:lo12:.LANCHOR20]
+	cbnz	w2, .L111
+	ubfiz	x0, x0, 8, 8
+	adrp	x2, .LANCHOR19+12
+	add	x0, x1, x0
+	mov	w1, 239
+	ldrb	w2, [x2, #:lo12:.LANCHOR19+12]
+	mov	w4, 4
+	str	w1, [x0, 2056]
+	cmp	w2, 2
+	mov	w1, 145
+	str	w1, [x0, 2052]
+	csel	w2, w2, w4, eq
+	str	w2, [x0, 2048]
+	mov	w1, 1
+	str	w1, [x0, 2048]
+	str	wzr, [x0, 2048]
+	str	wzr, [x0, 2048]
+	strb	w2, [x3, #:lo12:.LANCHOR20]
+	b	nandc_wait_flash_ready
+.L111:
+	ret
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.flash_erase_duplane_block,"ax",@progbits
+	.align	2
+	.global	flash_erase_duplane_block
+	.type	flash_erase_duplane_block, %function
+flash_erase_duplane_block:
+	stp	x29, x30, [sp, -80]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w1, 255
+	adrp	x1, .LANCHOR8
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	str	x25, [sp, 64]
+	cmp	w1, w0
+	bhi	.L124
+	adrp	x1, .LANCHOR21
+	adrp	x0, .LC0
+	mov	w2, 517
+	add	x1, x1, :lo12:.LANCHOR21
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L125:
+	b	.L125
+.L124:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	w22, w2
+	mov	w21, w3
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x25, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	and	x19, x20, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	add	x23, x19, 8
+	add	x23, x25, x23, lsl 8
+	tbz	x0, 4, .L126
+	adrp	x0, .LC1
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC1
+	bl	printf
+.L126:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w24, .L127
+	bl	flash_enter_slc_mode
+.L128:
+	add	x25, x25, x19, lsl 8
+	mov	w0, 96
+	str	w0, [x25, 2056]
+	and	w0, w22, 255
+	str	w0, [x25, 2052]
+	lsr	w0, w22, 8
+	str	w0, [x25, 2052]
+	lsr	w0, w22, 16
+	str	w0, [x25, 2052]
+	adrp	x0, .LANCHOR23
+	ldrb	w0, [x0, #:lo12:.LANCHOR23]
+	cbnz	w0, .L132
+	mov	w0, 208
+	str	w0, [x25, 2056]
+	mov	w19, 5
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	and	w5, w0, w19
+.L129:
+	mov	w0, 96
+	str	w0, [x25, 2056]
+	and	w0, w21, 255
+	str	w0, [x25, 2052]
+	lsr	w0, w21, 8
+	str	w0, [x25, 2052]
+	lsr	w21, w21, 16
+	str	w21, [x25, 2052]
+	mov	w0, 208
+	str	w0, [x25, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	mov	w6, w0
+	cbnz	w24, .L130
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L130:
+	mov	w0, w20
+	mov	w19, 5
+	bl	nandc_de_cs
+	and	w19, w6, w19
+	orr	w19, w19, w5
+	cbz	w19, .L131
+	adrp	x0, .LC2
+	mov	w2, w6
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC2
+	bl	printf
+.L131:
+	mov	w0, w19
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L127:
+	bl	flash_exit_slc_mode
+	b	.L128
+.L132:
+	mov	w5, 0
+	b	.L129
+	.size	flash_erase_duplane_block, .-flash_erase_duplane_block
+	.section	.text.flash_erase_block_en,"ax",@progbits
+	.align	2
+	.global	flash_erase_block_en
+	.type	flash_erase_block_en, %function
+flash_erase_block_en:
+	stp	x29, x30, [sp, -64]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w1, 255
+	adrp	x1, .LANCHOR8
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	cmp	w1, w0
+	bhi	.L141
+	adrp	x1, .LANCHOR24
+	adrp	x0, .LC0
+	mov	w2, 561
+	add	x1, x1, :lo12:.LANCHOR24
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L142:
+	b	.L142
+.L141:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	w21, w2
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x24, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	and	x19, x20, 255
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	add	x22, x19, 8
+	add	x22, x24, x22, lsl 8
+	tbz	x0, 4, .L143
+	adrp	x0, .LC3
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC3
+	bl	printf
+.L143:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w23, .L144
+	bl	flash_enter_slc_mode
+.L145:
+	add	x0, x24, x19, lsl 8
+	mov	w2, 96
+	and	w1, w21, 2097151
+	str	w2, [x0, 2056]
+	and	w2, w21, 255
+	str	w2, [x0, 2052]
+	lsr	w2, w1, 8
+	str	w2, [x0, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x0, 2052]
+	mov	w1, 208
+	str	w1, [x0, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x22
+	bl	flash_read_status
+	mov	w5, w0
+	cbnz	w23, .L146
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L146:
+	mov	w0, w20
+	mov	w19, 5
+	bl	nandc_de_cs
+	ands	w19, w5, w19
+	beq	.L147
+	adrp	x0, .LANCHOR13
+	mov	w2, w19
+	ldrh	w1, [x0, #:lo12:.LANCHOR13]
+	adrp	x0, .LC4
+	add	x0, x0, :lo12:.LC4
+	udiv	w1, w21, w1
+	bl	printf
+.L147:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L144:
+	bl	flash_exit_slc_mode
+	b	.L145
+	.size	flash_erase_block_en, .-flash_erase_block_en
+	.section	.text.flash_erase_block,"ax",@progbits
+	.align	2
+	.global	flash_erase_block
+	.type	flash_erase_block, %function
+flash_erase_block:
+	mov	w2, w1
+	mov	w1, 0
+	b	flash_erase_block_en
+	.size	flash_erase_block, .-flash_erase_block
+	.section	.text.flash_erase_all,"ax",@progbits
+	.align	2
+	.global	flash_erase_all
+	.type	flash_erase_all, %function
+flash_erase_all:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR13
+	stp	x21, x22, [sp, 32]
+	add	x23, x23, :lo12:.LANCHOR13
+	ldrh	w20, [x0, 14]
+	adrp	x22, .LANCHOR8
+	str	x25, [sp, 64]
+	add	x22, x22, :lo12:.LANCHOR8
+	adrp	x24, .LANCHOR10
+	ldrb	w1, [x0, 13]
+	mul	w20, w20, w1
+	and	w20, w20, 65535
+.L157:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L160
+	ldp	x19, x20, [sp, 16]
+	mov	w1, 0
+	ldp	x21, x22, [sp, 32]
+	adrp	x0, .LC5
+	ldp	x23, x24, [sp, 48]
+	add	x0, x0, :lo12:.LC5
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	b	printf
+.L160:
+	add	x0, x24, :lo12:.LANCHOR10
+	mov	w21, 0
+	ldrb	w25, [x0, w19, sxtw]
+.L158:
+	cmp	w20, w21, uxth
+	bhi	.L159
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L157
+.L159:
+	ldrh	w1, [x23]
+	mov	w0, w25
+	mul	w1, w1, w21
+	add	w21, w21, 1
+	bl	flash_erase_block
+	b	.L158
+	.size	flash_erase_all, .-flash_erase_all
+	.section	.text.flash_set_interface_mode,"ax",@progbits
+	.align	2
+	.global	flash_set_interface_mode
+	.type	flash_set_interface_mode, %function
+flash_set_interface_mode:
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR6
+	adrp	x5, .LANCHOR26
+	add	x5, x5, :lo12:.LANCHOR26
+	add	x29, sp, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR6]
+	adrp	x1, .LANCHOR25
+	mov	x2, 0
+	mov	w11, 69
+	ldrb	w1, [x1, #:lo12:.LANCHOR25]
+	mov	w7, 239
+	mov	w8, 128
+	mov	w12, 1
+	and	w10, w1, 4
+	and	w4, w1, 1
+	mov	w13, 35
+	mov	w14, 5
+.L170:
+	lsl	x1, x2, 3
+	ldrb	w3, [x1, x5]
+	cmp	w3, 152
+	ccmp	w3, w11, 4, ne
+	beq	.L163
+	cmp	w3, 44
+	bne	.L164
+.L163:
+	cmp	w0, 1
+	bne	.L165
+	cbz	w4, .L164
+	add	x1, x6, x2, lsl 8
+	cmp	w3, 44
+	str	w7, [x1, 2056]
+	bne	.L166
+	str	w0, [x1, 2052]
+	str	w14, [x1, 2048]
+.L169:
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+	str	wzr, [x1, 2048]
+.L164:
+	add	x2, x2, 1
+	cmp	x2, 4
+	bne	.L170
+	bl	nandc_wait_flash_ready
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+.L166:
+	str	w8, [x1, 2052]
+	str	w0, [x1, 2048]
+	b	.L169
+.L165:
+	cbz	w10, .L164
+	add	x1, x6, x2, lsl 8
+	cmp	w3, 44
+	str	w7, [x1, 2056]
+	bne	.L168
+	str	w12, [x1, 2052]
+	str	w13, [x1, 2048]
+	b	.L169
+.L168:
+	str	w8, [x1, 2052]
+	str	wzr, [x1, 2048]
+	b	.L169
+	.size	flash_set_interface_mode, .-flash_set_interface_mode
+	.section	.text.flash_reset,"ax",@progbits
+	.align	2
+	.global	flash_reset
+	.type	flash_reset, %function
+flash_reset:
+	adrp	x1, .LANCHOR6
+	ubfiz	x0, x0, 8, 8
+	add	x0, x0, 2048
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	add	x1, x1, x0
+	mov	w0, 255
+	str	w0, [x1, 8]
+	b	nandc_wait_flash_ready
+	.size	flash_reset, .-flash_reset
+	.section	.text.flash_read_id,"ax",@progbits
+	.align	2
+	.global	flash_read_id
+	.type	flash_read_id, %function
+flash_read_id:
+	and	w6, w0, 255
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LANCHOR6
+	mov	x5, x1
+	add	x29, sp, 0
+	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w6
+	bl	flash_reset
+	mov	w0, w6
+	bl	nandc_cs
+	ubfiz	x2, x6, 8, 8
+	add	x2, x4, x2
+	mov	w0, 144
+	str	w0, [x2, 2056]
+	mov	w0, 200
+	str	wzr, [x2, 2052]
+	bl	timer_delay_ns
+	ldr	w0, [x2, 2048]
+	ldp	x29, x30, [sp], 16
+	strb	w0, [x5]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 1]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 2]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 3]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 4]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 5]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 6]
+	ldr	w0, [x2, 2048]
+	strb	w0, [x5, 7]
+	mov	w0, w6
+	b	nandc_de_cs
+	.size	flash_read_id, .-flash_read_id
+	.section	.text.flash_read_spare,"ax",@progbits
+	.align	2
+	.global	flash_read_spare
+	.type	flash_read_spare, %function
+flash_read_spare:
+	stp	x29, x30, [sp, -16]!
+	mov	x5, x2
+	adrp	x2, .LANCHOR19+9
+	ubfiz	x0, x0, 8, 8
+	add	x29, sp, 0
+	ldrb	w3, [x2, #:lo12:.LANCHOR19+9]
+	adrp	x2, .LANCHOR6
+	ldr	x4, [x2, #:lo12:.LANCHOR6]
+	lsl	w3, w3, 9
+	add	x4, x4, x0
+	and	w0, w1, 255
+	str	wzr, [x4, 2056]
+	str	w3, [x4, 2052]
+	lsr	w3, w3, 8
+	str	w3, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w1, 8
+	str	w0, [x4, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x4, 2052]
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x4, 2048]
+	ldp	x29, x30, [sp], 16
+	strb	w0, [x5]
+	ret
+	.size	flash_read_spare, .-flash_read_spare
+	.section	.text.sandisk_prog_test_bad_block,"ax",@progbits
+	.align	2
+	.global	sandisk_prog_test_bad_block
+	.type	sandisk_prog_test_bad_block, %function
+sandisk_prog_test_bad_block:
+	stp	x29, x30, [sp, -16]!
+	adrp	x2, .LANCHOR6
+	and	w0, w0, 255
+	add	x29, sp, 0
+	ldr	x4, [x2, #:lo12:.LANCHOR6]
+	adrp	x2, .LANCHOR19
+	add	x3, x2, :lo12:.LANCHOR19
+	mov	x5, x2
+	sxtw	x2, w0
+	add	x2, x2, 8
+	ldrb	w3, [x3, 29]
+	add	x2, x4, x2, lsl 8
+	cbz	w3, .L185
+.L192:
+	ubfiz	x0, x0, 8, 8
+	str	w3, [x2, 8]
+	add	x4, x4, x0
+	mov	w0, 128
+	str	w0, [x4, 2056]
+	and	w0, w1, 255
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w1, 8
+	str	w0, [x4, 2052]
+	lsr	w1, w1, 16
+	str	w1, [x4, 2052]
+	mov	w0, 16
+	str	w0, [x4, 2056]
+	bl	nandc_wait_flash_ready
+	mov	w0, 112
+	str	w0, [x4, 2056]
+	mov	w0, 80
+	bl	timer_delay_ns
+	add	x2, x5, :lo12:.LANCHOR19
+	ldr	w0, [x4, 2048]
+	mov	w1, 5
+	and	w0, w0, w1
+	ldrb	w1, [x2, 30]
+	cbz	w1, .L184
+	str	w1, [x4, 2056]
+.L184:
+	ldp	x29, x30, [sp], 16
+	ret
+.L185:
+	mov	w3, 162
+	b	.L192
+	.size	sandisk_prog_test_bad_block, .-sandisk_prog_test_bad_block
+	.section	.text.nandc_bch_sel,"ax",@progbits
+	.align	2
+	.global	nandc_bch_sel
+	.type	nandc_bch_sel, %function
+nandc_bch_sel:
+	adrp	x2, .LANCHOR27
+	mov	w1, 1
+	strb	w0, [x2, #:lo12:.LANCHOR27]
+	adrp	x2, .LANCHOR7
+	ldrb	w2, [x2, #:lo12:.LANCHOR7]
+	cmp	w2, 9
+	adrp	x2, .LANCHOR6
+	ldr	x2, [x2, #:lo12:.LANCHOR6]
+	bne	.L194
+	str	w1, [x2, 16]
+	cmp	w0, 70
+	beq	.L201
+	cmp	w0, 60
+	beq	.L202
+	cmp	w0, 40
+	cset	w1, eq
+	add	w1, w1, 1
+.L195:
+	lsl	w1, w1, 25
+	orr	w1, w1, 1
+	str	w1, [x2, 32]
+	ret
+.L201:
+	mov	w1, 0
+	b	.L195
+.L202:
+	mov	w1, 3
+	b	.L195
+.L194:
+	str	w1, [x2, 8]
+	cmp	w0, 16
+	mov	w1, 4096
+	bne	.L197
+.L200:
+	and	w1, w1, -17
+.L198:
+	orr	w1, w1, 1
+	str	w1, [x2, 12]
+	ret
+.L197:
+	cmp	w0, 24
+	bne	.L199
+	orr	w1, w1, 16
+	b	.L198
+.L199:
+	orr	w1, w1, 262144
+	cmp	w0, 40
+	orr	w1, w1, 16
+	bne	.L198
+	b	.L200
+	.size	nandc_bch_sel, .-nandc_bch_sel
+	.section	.text.NandCIrqEnable,"ax",@progbits
+	.align	2
+	.global	NandCIrqEnable
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	ret
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",@progbits
+	.align	2
+	.global	NandCIrqDisable
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	ret
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",@progbits
+	.align	2
+	.global	rk_nandc_get_irq_status
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	adrp	x1, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	cmp	w1, 9
+	bne	.L210
+	ldr	w0, [x0, 296]
+	ret
+.L210:
+	ldr	w0, [x0, 372]
+	ret
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_ready
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	ret
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",@progbits
+	.align	2
+	.global	NandcIqrWaitFlashReady
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	ret
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",@progbits
+	.align	2
+	.global	rk_nandc_flash_xfer_completed
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	ret
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.nandc_xfer_start,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_start
+	.type	nandc_xfer_start, %function
+nandc_xfer_start:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 255
+	adrp	x4, .LANCHOR30
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w23, w0, 255
+	adrp	x0, .LANCHOR7
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	add	w20, w1, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	adrp	x24, .LANCHOR6
+	cmp	w0, 9
+	bne	.L216
+	ubfiz	w19, w23, 1, 1
+	mov	w0, 1
+	orr	w19, w19, 8
+	asr	w20, w20, 1
+	bfi	w19, w0, 5, 2
+	adrp	x0, .LANCHOR28
+	orr	w19, w19, 536870912
+	ldrb	w0, [x0, #:lo12:.LANCHOR28]
+	orr	w19, w19, 1024
+	and	w19, w19, -17
+	bfi	w19, w20, 22, 6
+	cbz	w0, .L217
+	adrp	x0, .LANCHOR29
+	ldrb	w1, [x0, #:lo12:.LANCHOR29]
+	orr	w0, w19, 512
+	cmp	w1, 0
+	csel	w19, w0, w19, ne
+.L217:
+	add	x21, x4, :lo12:.LANCHOR30
+	add	x0, x2, 63
+	and	w20, w20, 63
+	and	x0, x0, -64
+	ubfiz	x1, x20, 10, 6
+	ubfiz	x20, x20, 2, 6
+	add	x1, x0, x1
+	stp	x2, x3, [x21, 8]
+	and	x0, x2, -64
+	stp	w2, w3, [x21, 24]
+	bl	flush_dcache_range
+	ldr	x0, [x21, 16]
+	add	x1, x0, 63
+	and	x0, x0, -64
+	and	x1, x1, -64
+	add	x1, x1, x20
+	bl	flush_dcache_range
+	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	mov	w0, 1
+	str	w0, [x21, 32]
+	mov	w2, 16
+	ldr	w0, [x21, 24]
+	cmp	w23, 0
+	str	w0, [x1, 52]
+	ldr	w0, [x21, 28]
+	str	w0, [x1, 56]
+	ldr	w0, [x1, 48]
+	bfi	w0, w2, 9, 5
+	mov	w2, 2
+	orr	w0, w0, 448
+	bfi	w0, w2, 3, 3
+	cset	w2, eq
+	orr	w0, w0, 4
+	bfi	w0, w2, 1, 1
+	adrp	x2, .LANCHOR31
+	orr	w0, w0, 1
+	ldrh	w2, [x2, #:lo12:.LANCHOR31]
+	bfi	w0, w2, 16, 11
+	str	w0, [x1, 48]
+	str	w19, [x1, 16]
+	orr	w19, w19, 4
+	str	w19, [x1, 16]
+.L215:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L216:
+	ldr	x0, [x24, #:lo12:.LANCHOR6]
+	ubfiz	w19, w23, 1, 1
+	orr	w19, w19, 8
+	asr	w20, w20, 1
+	ldr	w22, [x0, 12]
+	mov	w0, 16
+	bfi	w22, w0, 8, 8
+	mov	w0, 1
+	bfi	w19, w0, 5, 2
+	and	w22, w22, -9
+	orr	w19, w19, 536870912
+	and	w22, w22, -225
+	orr	w19, w19, 1024
+	and	w19, w19, -17
+	bfi	w19, w20, 22, 6
+	cbz	w23, .L219
+	adrp	x0, .LANCHOR27
+	ubfx	x1, x1, 1, 7
+	ldr	x8, [x4, #:lo12:.LANCHOR30]
+	add	x1, x3, x1, lsl 2
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	mov	w5, 128
+	cmp	w0, 24
+	mov	w0, 64
+	csel	w5, w5, w0, hi
+	mov	w0, 0
+.L221:
+	add	w7, w5, w0
+	cmp	x3, x1
+	bne	.L222
+.L223:
+	add	x21, x4, :lo12:.LANCHOR30
+	ldr	x0, [x4, #:lo12:.LANCHOR30]
+	and	w20, w20, 63
+	ubfiz	x1, x20, 10, 6
+	ubfiz	x20, x20, 7, 6
+	stp	x2, x0, [x21, 8]
+	stp	w2, w0, [x21, 24]
+	add	x0, x2, 63
+	and	x0, x0, -64
+	add	x1, x0, x1
+	and	x0, x2, -64
+	bl	flush_dcache_range
+	ldr	x0, [x21, 16]
+	add	x1, x0, 63
+	and	x0, x0, -64
+	and	x1, x1, -64
+	add	x1, x1, x20
+	bl	flush_dcache_range
+	ldr	x1, [x24, #:lo12:.LANCHOR6]
+	mov	w0, 1
+	str	w0, [x21, 32]
+	cmp	w23, 0
+	ldr	w0, [x21, 24]
+	cset	w2, eq
+	str	w0, [x1, 20]
+	ldr	w0, [x21, 28]
+	str	w0, [x1, 24]
+	mov	w0, 8660
+	bfi	w0, w2, 1, 1
+	orr	w0, w0, 1
+	str	w0, [x1, 16]
+	str	w22, [x1, 12]
+	str	w19, [x1, 8]
+	orr	w19, w19, 4
+	str	w19, [x1, 8]
+	b	.L215
+.L222:
+	ldrh	w10, [x3]
+	and	x0, x0, 4294967292
+	ldrh	w6, [x3, 2]
+	add	x3, x3, 4
+	orr	x6, x10, x6, lsl 16
+	str	w6, [x8, x0]
+	mov	w0, w7
+	b	.L221
+.L219:
+	ldr	x1, [x4, #:lo12:.LANCHOR30]
+	str	w0, [x1]
+	b	.L223
+	.size	nandc_xfer_start, .-nandc_xfer_start
+	.section	.text.nandc_set_seed,"ax",@progbits
+	.align	2
+	.global	nandc_set_seed
+	.type	nandc_set_seed, %function
+nandc_set_seed:
+	and	x0, x0, 127
+	adrp	x1, .LANCHOR32
+	add	x1, x1, :lo12:.LANCHOR32
+	ldrh	w0, [x1, x0, lsl 1]
+	adrp	x1, .LANCHOR29
+	ldrb	w2, [x1, #:lo12:.LANCHOR29]
+	orr	w1, w0, -1073741824
+	cmp	w2, 0
+	csel	w0, w1, w0, ne
+	adrp	x1, .LANCHOR7
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR6
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	bne	.L233
+	str	w0, [x1, 520]
+	ret
+.L233:
+	str	w0, [x1, 336]
+	ret
+	.size	nandc_set_seed, .-nandc_set_seed
+	.section	.text.flash_start_page_read,"ax",@progbits
+	.align	2
+	.global	flash_start_page_read
+	.type	flash_start_page_read, %function
+flash_start_page_read:
+	stp	x29, x30, [sp, -16]!
+	and	w10, w0, 255
+	adrp	x0, .LANCHOR8
+	ubfx	x2, x1, 21, 3
+	add	x29, sp, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w2
+	bhi	.L238
+	adrp	x1, .LANCHOR33
+	adrp	x0, .LC0
+	mov	w2, 738
+	add	x1, x1, :lo12:.LANCHOR33
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L239:
+	b	.L239
+.L238:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	and	w5, w1, 2097151
+	ubfx	x8, x1, 24, 2
+	ldrb	w7, [x0, w2, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x6, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w7
+	bl	nandc_cs
+	adrp	x11, .LANCHOR34
+	cbnz	w8, .L240
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR12
+	cbz	w1, .L241
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+	cbz	w1, .L242
+.L241:
+	adrp	x1, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrh	w1, [x1, #:lo12:.LANCHOR13]
+	udiv	w2, w5, w1
+	mul	w2, w2, w1
+	sub	w5, w5, w2
+	cbz	w0, .L243
+	add	w5, w2, w5, lsl 1
+.L242:
+	mov	w0, w7
+	bl	flash_enter_slc_mode
+	b	.L244
+.L243:
+	adrp	x3, .LANCHOR14
+	add	x3, x3, :lo12:.LANCHOR14
+	ldrh	w5, [x3, w5, uxtw 1]
+	add	w5, w5, w2
+.L244:
+	ubfiz	x2, x7, 8, 8
+	and	w0, w5, 255
+	add	x2, x6, x2
+	str	wzr, [x2, 2056]
+	str	wzr, [x2, 2052]
+	str	wzr, [x2, 2052]
+	str	w0, [x2, 2052]
+	lsr	w0, w5, 8
+	str	w0, [x2, 2052]
+	lsr	w0, w5, 16
+	str	w0, [x2, 2052]
+	ldr	x0, [x11, #:lo12:.LANCHOR34]
+	str	w10, [x2, 2056]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L246
+	cbz	w8, .L246
+	add	w5, w5, w5, lsl 1
+	sub	w0, w8, #1
+	add	w0, w5, w0
+.L255:
+	bl	nandc_set_seed
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	nandc_de_cs
+.L240:
+	ldr	x0, [x11, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L245
+	sxtw	x0, w7
+	add	x0, x0, 8
+	add	x0, x6, x0, lsl 8
+	str	w8, [x0, 8]
+	b	.L244
+.L245:
+	mov	w0, w7
+	bl	flash_exit_slc_mode
+	b	.L244
+.L246:
+	mov	w0, w5
+	b	.L255
+	.size	flash_start_page_read, .-flash_start_page_read
+	.section	.text.FlashDeInit,"ax",@progbits
+	.align	2
+	.global	FlashDeInit
+	.type	FlashDeInit, %function
+FlashDeInit:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	nandc_wait_flash_ready
+	mov	w0, 0
+	bl	hynix_reconfig_rr_para
+	adrp	x15, .LANCHOR35
+	ldrb	w0, [x15, #:lo12:.LANCHOR35]
+	cbz	w0, .L257
+	adrp	x0, .LANCHOR25
+	ldrb	w0, [x0, #:lo12:.LANCHOR25]
+	tbz	x0, 0, .L257
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+	bl	nandc_set_if_mode
+	strb	wzr, [x15, #:lo12:.LANCHOR35]
+.L257:
+	adrp	x3, .LANCHOR29
+	ldrb	w0, [x3, #:lo12:.LANCHOR29]
+	cbz	w0, .L258
+	mov	w0, 0
+	strb	wzr, [x3, #:lo12:.LANCHOR29]
+	bl	nandc_set_seed
+	mov	w0, 1
+	strb	w0, [x3, #:lo12:.LANCHOR29]
+.L258:
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.nandc_randomizer_enable,"ax",@progbits
+	.align	2
+	.global	nandc_randomizer_enable
+	.type	nandc_randomizer_enable, %function
+nandc_randomizer_enable:
+	adrp	x1, .LANCHOR29
+	strb	w0, [x1, #:lo12:.LANCHOR29]
+	ret
+	.size	nandc_randomizer_enable, .-nandc_randomizer_enable
+	.section	.text.nandc_get_chip_if,"ax",@progbits
+	.align	2
+	.global	nandc_get_chip_if
+	.type	nandc_get_chip_if, %function
+nandc_get_chip_if:
+	adrp	x1, .LANCHOR6
+	ubfiz	x0, x0, 8, 8
+	add	x0, x0, 2048
+	ldr	x1, [x1, #:lo12:.LANCHOR6]
+	add	x0, x1, x0
+	ret
+	.size	nandc_get_chip_if, .-nandc_get_chip_if
+	.section	.text.buf_reinit,"ax",@progbits
+	.align	2
+	.global	buf_reinit
+	.type	buf_reinit, %function
+buf_reinit:
+	adrp	x0, .LANCHOR36
+	add	x1, x0, :lo12:.LANCHOR36
+	mov	w2, 0
+.L272:
+	and	w3, w2, 255
+	strb	wzr, [x1, 2]
+	add	w4, w3, 1
+	strb	w3, [x1, 1]
+	strb	w4, [x1]
+	add	w2, w2, 1
+	str	xzr, [x1, 16]
+	cmp	w2, 32
+	add	x1, x1, 64
+	bne	.L272
+	add	x0, x0, :lo12:.LANCHOR36
+	mov	w1, -1
+	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR37
+	strb	wzr, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR38
+	strb	w2, [x0, #:lo12:.LANCHOR38]
+	ret
+	.size	buf_reinit, .-buf_reinit
+	.section	.text.buf_add_tail,"ax",@progbits
+	.align	2
+	.global	buf_add_tail
+	.type	buf_add_tail, %function
+buf_add_tail:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, -1
+	add	x29, sp, 0
+	strb	w2, [x1]
+	ldrb	w3, [x0]
+	cmp	w3, 255
+	bne	.L282
+	ldrb	w1, [x1, 1]
+	cmp	w1, 255
+	bne	.L276
+	adrp	x1, .LANCHOR39
+	adrp	x0, .LC0
+	mov	w2, 74
+	add	x1, x1, :lo12:.LANCHOR39
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L277:
+	b	.L277
+.L276:
+	strb	w1, [x0]
+.L274:
+	ldp	x29, x30, [sp], 16
+	ret
+.L279:
+	sbfiz	x0, x0, 6, 32
+	strb	w1, [x2, x0]
+	b	.L274
+.L282:
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
+.L283:
+	mov	w0, w3
+	sbfiz	x3, x3, 6, 32
+	ldrb	w3, [x2, x3]
+	cmp	w3, 255
+	bne	.L283
+	ldrb	w1, [x1, 1]
+	cmp	w1, 255
+	bne	.L279
+	adrp	x1, .LANCHOR39
+	adrp	x0, .LC0
+	mov	w2, 81
+	add	x1, x1, :lo12:.LANCHOR39
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L280:
+	b	.L280
+	.size	buf_add_tail, .-buf_add_tail
+	.section	.text.buf_free,"ax",@progbits
+	.align	2
+	.global	buf_free
+	.type	buf_free, %function
+buf_free:
+	ldrb	w1, [x0, 2]
+	adrp	x2, .LANCHOR37
+	and	w1, w1, 8
+	strb	w1, [x0, 2]
+	cbz	w1, .L286
+	stp	x29, x30, [sp, -16]!
+	mov	x1, x0
+	add	x0, x2, :lo12:.LANCHOR37
+	add	x29, sp, 0
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR38
+	ldp	x29, x30, [sp], 16
+	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR38]
+	ret
+.L286:
+	ldrb	w1, [x2, #:lo12:.LANCHOR37]
+	strb	w1, [x0]
+	adrp	x1, .LANCHOR38
+	ldrb	w0, [x0, 1]
+	strb	w0, [x2, #:lo12:.LANCHOR37]
+	ldrb	w0, [x1, #:lo12:.LANCHOR38]
+	add	w0, w0, 1
+	strb	w0, [x1, #:lo12:.LANCHOR38]
+	ret
+	.size	buf_free, .-buf_free
+	.section	.text.buf_alloc,"ax",@progbits
+	.align	2
+	.global	buf_alloc
+	.type	buf_alloc, %function
+buf_alloc:
+	adrp	x1, .LANCHOR38
+	ldrb	w3, [x1, #:lo12:.LANCHOR38]
+	cbnz	w3, .L293
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR40
+	adrp	x0, .LC0
+	mov	w2, 121
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR40
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L294:
+	b	.L294
+.L293:
+	adrp	x6, .LANCHOR37
+	and	w7, w0, 255
+	mov	x5, x1
+	adrp	x1, .LANCHOR36
+	ldrb	w2, [x6, #:lo12:.LANCHOR37]
+	add	x4, x1, :lo12:.LANCHOR36
+	ubfiz	x0, x2, 6, 8
+	add	x0, x4, x0
+	cbnz	w7, .L295
+	cmp	w3, 1
+	beq	.L297
+.L295:
+	add	x1, x1, :lo12:.LANCHOR36
+	sbfiz	x2, x2, 6, 32
+	add	x4, x1, x2
+	sub	w3, w3, #1
+	strb	w3, [x5, #:lo12:.LANCHOR38]
+	mov	w3, 1
+	ldrb	w7, [x1, x2]
+	strb	w3, [x4, 2]
+	mov	w3, -1
+	strb	w7, [x6, #:lo12:.LANCHOR37]
+	strb	w3, [x1, x2]
+	mov	w1, -1
+	strh	wzr, [x4, 50]
+	str	xzr, [x4, 16]
+	str	w1, [x4, 36]
+.L292:
+	ret
+.L297:
+	mov	x0, 0
+	b	.L292
+	.size	buf_alloc, .-buf_alloc
+	.section	.text.buf_remove_buf,"ax",@progbits
+	.align	2
+	.global	buf_remove_buf
+	.type	buf_remove_buf, %function
+buf_remove_buf:
+	ldrb	w4, [x1, 1]
+	ldrb	w2, [x0]
+	cmp	w4, w2
+	bne	.L304
+	ldrb	w1, [x1]
+	strb	w1, [x0]
+.L308:
+	mov	w0, 1
+	ret
+.L305:
+	mov	w3, w2
+	sbfiz	x2, x2, 6, 32
+	ldrb	w2, [x0, x2]
+	cmp	w4, w2
+	bne	.L306
+	sbfiz	x3, x3, 6, 32
+	ldrb	w2, [x1]
+	strb	w2, [x0, x3]
+	mov	w0, -1
+	strb	w0, [x1]
+	b	.L308
+.L304:
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+.L306:
+	cmp	w2, 255
+	bne	.L305
+	mov	w0, 0
+	ret
+	.size	buf_remove_buf, .-buf_remove_buf
+	.section	.text.buf_remove_free,"ax",@progbits
+	.align	2
+	.global	buf_remove_free
+	.type	buf_remove_free, %function
+buf_remove_free:
+	stp	x29, x30, [sp, -16]!
+	adrp	x6, .LANCHOR38
+	mov	x5, x0
+	add	x29, sp, 0
+	ldrb	w0, [x6, #:lo12:.LANCHOR38]
+	cbnz	w0, .L310
+	adrp	x1, .LANCHOR41
+	adrp	x0, .LC0
+	mov	w2, 170
+	add	x1, x1, :lo12:.LANCHOR41
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L311:
+	b	.L311
+.L310:
+	mov	x1, x5
+	adrp	x0, .LANCHOR37
+	add	x0, x0, :lo12:.LANCHOR37
+	bl	buf_remove_buf
+	cmp	w0, 1
+	bne	.L309
+	ldrb	w0, [x6, #:lo12:.LANCHOR38]
+	sub	w0, w0, #1
+	strb	w0, [x6, #:lo12:.LANCHOR38]
+	ldrb	w0, [x5, 2]
+	orr	w0, w0, 1
+	strb	w0, [x5, 2]
+.L309:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	buf_remove_free, .-buf_remove_free
+	.section	.text.flash_check_bad_block,"ax",@progbits
+	.align	2
+	.global	flash_check_bad_block
+	.type	flash_check_bad_block, %function
+flash_check_bad_block:
+	adrp	x3, .LANCHOR19
+	add	x3, x3, :lo12:.LANCHOR19
+	and	w5, w0, 255
+	lsr	w4, w1, 5
+	and	w1, w1, 31
+	ldrb	w0, [x3, 13]
+	ldrh	w2, [x3, 14]
+	mul	w2, w2, w0
+	mov	x0, 912
+	and	w2, w2, 65535
+	add	w2, w2, 31
+	asr	w2, w2, 5
+	lsl	w2, w2, 2
+	umaddl	x0, w2, w5, x0
+	adrp	x2, .LANCHOR5
+	ldr	x2, [x2, #:lo12:.LANCHOR5]
+	add	x0, x0, x4, uxtw 2
+	ldr	w0, [x2, x0]
+	lsr	w0, w0, w1
+	and	w0, w0, 1
+	ret
+	.size	flash_check_bad_block, .-flash_check_bad_block
+	.section	.text.flash_mask_bad_block,"ax",@progbits
+	.align	2
+	.global	flash_mask_bad_block
+	.type	flash_mask_bad_block, %function
+flash_mask_bad_block:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, w1
+	add	x29, sp, 0
+	str	x21, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR19
+	stp	x19, x20, [sp, 16]
+	mov	w20, w1
+	ldrh	w19, [x0, 14]
+	ldrb	w1, [x0, 13]
+	adrp	x0, .LC6
+	add	x0, x0, :lo12:.LC6
+	mul	w19, w19, w1
+	mov	w1, w21
+	bl	printf
+	and	w19, w19, 65535
+	lsr	w0, w20, 5
+	add	w1, w19, 31
+	mov	x19, 912
+	asr	w1, w1, 5
+	and	w20, w20, 31
+	lsl	w1, w1, 2
+	umaddl	x1, w1, w21, x19
+	ldr	x21, [sp, 32]
+	add	x1, x1, x0, uxtw 2
+	adrp	x0, .LANCHOR5
+	ldr	x2, [x0, #:lo12:.LANCHOR5]
+	mov	w0, 1
+	lsl	w0, w0, w20
+	ldr	w20, [x2, x1]
+	orr	w20, w20, w0
+	str	w20, [x2, x1]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	flash_mask_bad_block, .-flash_mask_bad_block
+	.section	.text.ftl_gc_write_buf,"ax",@progbits
+	.align	2
+	.global	ftl_gc_write_buf
+	.type	ftl_gc_write_buf, %function
+ftl_gc_write_buf:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	ldrb	w1, [x0, 2]
+	orr	w1, w1, 2
+	strb	w1, [x0, 2]
+	mov	x1, x0
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR43
+	ldp	x29, x30, [sp], 16
+	ldrb	w0, [x1, #:lo12:.LANCHOR43]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x1, #:lo12:.LANCHOR43]
+	ret
+	.size	ftl_gc_write_buf, .-ftl_gc_write_buf
+	.section	.text.ftl_write_buf,"ax",@progbits
+	.align	2
+	.global	ftl_write_buf
+	.type	ftl_write_buf, %function
+ftl_write_buf:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	cbnz	x0, .L320
+	adrp	x1, .LANCHOR44
+	adrp	x0, .LC0
+	mov	w2, 539
+	add	x1, x1, :lo12:.LANCHOR44
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L321:
+	b	.L321
+.L320:
+	adrp	x2, .LANCHOR45
+	ldrb	w1, [x0, 56]
+	mov	x19, x0
+	ldrb	w2, [x2, #:lo12:.LANCHOR45]
+	cmp	w2, w1
+	bcs	.L322
+	adrp	x1, .LANCHOR44
+	adrp	x0, .LC0
+	mov	w2, 544
+	add	x1, x1, :lo12:.LANCHOR44
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L323:
+	b	.L323
+.L322:
+	adrp	x20, .LANCHOR43
+	cbnz	w1, .L324
+	bl	buf_free
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+.L319:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L324:
+	mov	x1, x0
+	adrp	x0, .LANCHOR42
+	add	x0, x0, :lo12:.LANCHOR42
+	bl	buf_add_tail
+	adrp	x1, .LANCHOR46
+	ldrb	w3, [x19, 56]
+	ldrb	w0, [x20, #:lo12:.LANCHOR43]
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x20, #:lo12:.LANCHOR43]
+	ldr	w2, [x1, 16]
+	add	w2, w2, w3
+	str	w2, [x1, 16]
+	ldr	w2, [x1, 32]
+	add	w2, w2, 1
+	str	w2, [x1, 32]
+	b	.L319
+	.size	ftl_write_buf, .-ftl_write_buf
+	.section	.text.ftl_cache_flush,"ax",@progbits
+	.align	2
+	.global	ftl_cache_flush
+	.type	ftl_cache_flush, %function
+ftl_cache_flush:
+	ret
+	.size	ftl_cache_flush, .-ftl_cache_flush
+	.section	.text.ftl_read_buf,"ax",@progbits
+	.align	2
+	.global	ftl_read_buf
+	.type	ftl_read_buf, %function
+ftl_read_buf:
+	stp	x29, x30, [sp, -32]!
+	adrp	x2, .LANCHOR47
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	ldr	w2, [x2, #:lo12:.LANCHOR47]
+	cmp	w2, w0
+	bhi	.L329
+	adrp	x1, .LANCHOR48
+	adrp	x0, .LC0
+	mov	w2, 771
+	add	x1, x1, :lo12:.LANCHOR48
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L330:
+	b	.L330
+.L329:
+	adrp	x19, .LANCHOR36
+	add	x3, x19, :lo12:.LANCHOR36
+	add	x3, x3, 2
+	mov	w2, 0
+.L333:
+	ldr	w4, [x3, 34]
+	cmp	w0, w4
+	bne	.L331
+	ldrb	w4, [x3]
+	tbz	x4, 3, .L331
+	add	x19, x19, :lo12:.LANCHOR36
+	ubfiz	x2, x2, 6, 32
+	add	x19, x19, x2
+	orr	w0, w4, 4
+	strb	w0, [x19, 2]
+	tbnz	x4, 0, .L328
+	mov	x0, x19
+	bl	buf_remove_free
+.L328:
+	mov	x0, x19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L331:
+	add	w2, w2, 1
+	add	x3, x3, 64
+	cmp	w2, 32
+	bne	.L333
+	adrp	x2, .LANCHOR49
+	ldr	w3, [x2, #:lo12:.LANCHOR49]
+	cmn	w3, #1
+	bne	.L334
+	str	w0, [x2, #:lo12:.LANCHOR49]
+	adrp	x0, .LANCHOR50
+	str	x1, [x0, #:lo12:.LANCHOR50]
+.L334:
+	mov	x19, 0
+	b	.L328
+	.size	ftl_read_buf, .-ftl_read_buf
+	.section	.text.ftl_read_buf_free,"ax",@progbits
+	.align	2
+	.global	ftl_read_buf_free
+	.type	ftl_read_buf_free, %function
+ftl_read_buf_free:
+	mov	x5, x0
+	stp	x29, x30, [sp, -16]!
+	mov	x1, x0
+	adrp	x0, .LANCHOR51
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	buf_remove_buf
+	ldrb	w0, [x5, 2]
+	tbz	x0, 1, .L341
+	and	w0, w0, -5
+	strb	w0, [x5, 2]
+	ldp	x29, x30, [sp], 16
+	ret
+.L341:
+	ldp	x29, x30, [sp], 16
+	mov	x0, x5
+	b	buf_free
+	.size	ftl_read_buf_free, .-ftl_read_buf_free
+	.section	.text.ftl_get_density,"ax",@progbits
+	.align	2
+	.global	ftl_get_density
+	.type	ftl_get_density, %function
+ftl_get_density:
+	cbnz	w0, .L346
+	adrp	x0, .LANCHOR52
+	ldr	w0, [x0, #:lo12:.LANCHOR52]
+	ret
+.L346:
+	cmp	w0, 4
+	cset	w0, cc
+	lsl	w0, w0, 13
+	ret
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.gc_hook,"ax",@progbits
+	.align	2
+	.global	gc_hook
+	.type	gc_hook, %function
+gc_hook:
+	ret
+	.size	gc_hook, .-gc_hook
+	.section	.text.FtlGetCurEraseBlock,"ax",@progbits
+	.align	2
+	.global	FtlGetCurEraseBlock
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	adrp	x0, .LANCHOR53
+	ldrh	w0, [x0, #:lo12:.LANCHOR53]
+	ret
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",@progbits
+	.align	2
+	.global	FtlGetAllBlockNum
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	adrp	x0, .LANCHOR54
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	ret
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlLowFormat,"ax",@progbits
+	.align	2
+	.global	FtlLowFormat
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	mov	w0, 0
+	ret
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.gc_add_sblk,"ax",@progbits
+	.align	2
+	.global	gc_add_sblk
+	.type	gc_add_sblk, %function
+gc_add_sblk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w0, w19
+	bhi	.L354
+	adrp	x1, .LANCHOR55
+	adrp	x0, .LC0
+	mov	w2, 240
+	add	x1, x1, :lo12:.LANCHOR55
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L355:
+	b	.L355
+.L354:
+	adrp	x0, .LANCHOR56
+	uxtw	x20, w19
+	and	w21, w1, 65535
+	and	w22, w2, 65535
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	adrp	x24, .LANCHOR59
+	ldrh	w23, [x0, x20, lsl 1]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L356
+	ldr	x0, [x24, #:lo12:.LANCHOR59]
+	mov	w4, w23
+	mov	w2, w21
+	mov	w1, w19
+	add	x0, x0, x20, lsl 2
+	ldrb	w3, [x0, 2]
+	adrp	x0, .LANCHOR57
+	ldrh	w6, [x0, #:lo12:.LANCHOR57]
+	adrp	x0, .LANCHOR58+56
+	ubfx	x3, x3, 5, 3
+	ldrh	w5, [x0, #:lo12:.LANCHOR58+56]
+	adrp	x0, .LC7
+	add	x0, x0, :lo12:.LC7
+	bl	printf
+.L356:
+	ldr	x0, [x24, #:lo12:.LANCHOR59]
+	add	x20, x0, x20, lsl 2
+	ldrb	w0, [x20, 2]
+	tst	w0, 224
+	bne	.L357
+	cbz	w23, .L371
+	adrp	x1, .LANCHOR55
+	adrp	x0, .LC0
+	mov	w2, 245
+	add	x1, x1, :lo12:.LANCHOR55
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L359:
+	b	.L359
+.L357:
+	adrp	x1, .LANCHOR58
+	add	x0, x1, :lo12:.LANCHOR58
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
+	cmp	w1, w19
+	beq	.L371
+	adrp	x1, .LANCHOR60
+	ldr	x2, [x1, #:lo12:.LANCHOR60]
+	ldrh	w1, [x2, 48]
+	cmp	w1, w19
+	beq	.L371
+	ldrh	w1, [x2, 16]
+	cmp	w1, w19
+	beq	.L371
+	ldrh	w1, [x2, 80]
+	cmp	w1, w19
+	beq	.L371
+	ldrh	w3, [x0, 56]
+	add	x0, x0, 58
+	mov	w1, 0
+.L360:
+	cmp	w1, w3
+	bcc	.L361
+	ubfiz	x1, x22, 7, 16
+	add	x0, x2, 392
+	add	x1, x1, 136
+	cmp	w21, 0
+	add	x1, x2, x1
+	mov	w3, 65535
+	csel	x0, x1, x0, eq
+	add	x1, x0, 128
+.L365:
+	ldrh	w4, [x0]
+	cmp	w4, w3
+	bne	.L363
+	strh	w19, [x0]
+	cbz	w21, .L364
+	ldrh	w0, [x2, 124]
+	add	w0, w0, 1
+	strh	w0, [x2, 124]
+.L379:
+	mov	w0, 1
+.L353:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L361:
+	ldrh	w4, [x0], 2
+	cmp	w4, w19
+	beq	.L371
+	add	w1, w1, 1
+	b	.L360
+.L364:
+	add	x2, x2, x22, uxth 1
+	ldrh	w0, [x2, 120]
+	add	w0, w0, 1
+	strh	w0, [x2, 120]
+	b	.L379
+.L363:
+	add	x0, x0, 2
+	cmp	x1, x0
+	bne	.L365
+	b	.L379
+.L371:
+	mov	w0, 0
+	b	.L353
+	.size	gc_add_sblk, .-gc_add_sblk
+	.section	.text.gc_get_src_ppa_from_index,"ax",@progbits
+	.align	2
+	.global	gc_get_src_ppa_from_index
+	.type	gc_get_src_ppa_from_index, %function
+gc_get_src_ppa_from_index:
+	adrp	x1, .LANCHOR61
+	ubfiz	x0, x0, 2, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR61]
+	ldr	w0, [x1, x0]
+	ret
+	.size	gc_get_src_ppa_from_index, .-gc_get_src_ppa_from_index
+	.section	.text.gc_write_completed,"ax",@progbits
+	.align	2
+	.global	gc_write_completed
+	.type	gc_write_completed, %function
+gc_write_completed:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR36
+	stp	x21, x22, [sp, 32]
+	add	x24, x23, :lo12:.LANCHOR36
+	adrp	x22, .LANCHOR62
+	add	x22, x22, :lo12:.LANCHOR62
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+.L382:
+	ldrb	w19, [x22]
+	cmp	w19, 255
+	bne	.L395
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L395:
+	lsl	x1, x19, 6
+	add	x0, x23, :lo12:.LANCHOR36
+	add	x2, x0, x1
+	ldrb	w0, [x0, x1]
+	ldr	w1, [x2, 52]
+	strb	w0, [x22]
+	ldrh	w26, [x2, 48]
+	cbz	w1, .L383
+	ldr	w2, [x2, 40]
+	adrp	x0, .LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR58
+	mov	w3, 1
+	str	w2, [x0, 320]
+	strh	w3, [x0, 318]
+	adrp	x0, .LC8
+	add	x0, x0, :lo12:.LC8
+	bl	printf
+	adrp	x1, .LANCHOR63
+	adrp	x0, .LC0
+	mov	w2, 502
+	add	x1, x1, :lo12:.LANCHOR63
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L384:
+	b	.L384
+.L383:
+	adrp	x0, .LANCHOR64
+	mov	x28, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	cmp	w1, 3
+	bne	.L396
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrb	w20, [x0, 89]
+	add	w20, w20, w20, lsl 1
+	and	w20, w20, 1023
+.L385:
+	adrp	x0, .LANCHOR22
+	adrp	x27, .LANCHOR65
+	and	x21, x26, 65535
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L386
+	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	add	x0, x24, x19, lsl 6
+	mov	w3, w26
+	ldrb	w2, [x0, 1]
+	adrp	x0, .LC9
+	ldrb	w4, [x1, x21]
+	add	x0, x0, :lo12:.LC9
+	mov	w1, w26
+	bl	printf
+.L386:
+	ldr	x0, [x27, #:lo12:.LANCHOR65]
+	add	x19, x24, x19, lsl 6
+	mov	x25, x21
+	add	x2, x0, x21
+	ldrb	w1, [x0, x21]
+	ldrb	w0, [x19, 1]
+	cmp	w1, w0
+	beq	.L387
+	adrp	x1, .LANCHOR63
+	adrp	x0, .LC0
+	mov	w2, 509
+	add	x1, x1, :lo12:.LANCHOR63
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L388:
+	b	.L388
+.L396:
+	mov	w20, 1
+	b	.L385
+.L387:
+	ldrb	w0, [x19, 61]
+	cmp	w0, 3
+	beq	.L389
+	ldrb	w0, [x28, #:lo12:.LANCHOR64]
+	cmp	w0, 3
+	bne	.L389
+	adrp	x0, .LANCHOR66
+	ldrb	w0, [x0, #:lo12:.LANCHOR66]
+	cbnz	w0, .L389
+	mov	x0, 0
+.L390:
+	cmp	w20, w0, uxth
+	bls	.L382
+	ldrb	w1, [x2, x0]
+	add	x0, x0, 1
+	add	x1, x24, x1, lsl 6
+	strb	wzr, [x1, 61]
+	b	.L390
+.L389:
+	adrp	x19, .LANCHOR58
+	add	x19, x19, :lo12:.LANCHOR58
+	add	x20, x21, x20, uxth
+	mov	w21, -1
+	strh	w26, [x19, 316]
+.L391:
+	cmp	x25, x20
+	beq	.L382
+	ldr	x1, [x27, #:lo12:.LANCHOR65]
+	ldrb	w0, [x1, x25]
+	strb	w21, [x1, x25]
+	add	x25, x25, 1
+	sbfiz	x1, x0, 6, 32
+	ubfiz	x0, x0, 6, 8
+	add	x1, x24, x1
+	add	x0, x24, x0
+	strb	wzr, [x1, 61]
+	bl	buf_free
+	ldrb	w0, [x19, 7]
+	sub	w0, w0, #1
+	strb	w0, [x19, 7]
+	b	.L391
+	.size	gc_write_completed, .-gc_write_completed
+	.section	.text.gc_get_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_get_src_blk
+	.type	gc_get_src_blk, %function
+gc_get_src_blk:
+	adrp	x0, .LANCHOR60
+	ldr	x2, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR67
+	ldrb	w3, [x0, #:lo12:.LANCHOR67]
+	ldrh	w0, [x2, 124]
+	cbz	w0, .L405
+	add	x1, x2, 392
+	mov	w4, 1
+.L406:
+	add	x5, x1, 128
+	mov	w6, 65535
+.L410:
+	ldrh	w0, [x1]
+	cmp	w0, w6
+	beq	.L408
+	mov	w5, -1
+	strh	w5, [x1]
+	cbz	w4, .L409
+	ldrh	w1, [x2, 124]
+	sub	w1, w1, #1
+	strh	w1, [x2, 124]
+	ret
+.L405:
+	add	x0, x2, x3, sxtw 1
+	ldrh	w0, [x0, 120]
+	cbz	w0, .L411
+	ubfiz	x1, x3, 7, 8
+	mov	w4, 0
+	add	x1, x1, 136
+	add	x1, x2, x1
+	b	.L406
+.L409:
+	add	x2, x2, x3, uxtb 1
+	ldrh	w1, [x2, 120]
+	sub	w1, w1, #1
+	strh	w1, [x2, 120]
+	ret
+.L408:
+	add	x1, x1, 2
+	cmp	x1, x5
+	bne	.L410
+	ret
+.L411:
+	mov	w0, 65535
+	ret
+	.size	gc_get_src_blk, .-gc_get_src_blk
+	.section	.text.gc_free_temp_buf,"ax",@progbits
+	.align	2
+	.global	gc_free_temp_buf
+	.type	gc_free_temp_buf, %function
+gc_free_temp_buf:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR58
+	add	x0, x20, :lo12:.LANCHOR58
+	stp	x21, x22, [sp, 32]
+	ldrb	w1, [x0, 7]
+	cbz	w1, .L420
+	adrp	x1, .LANCHOR38
+	ldrb	w1, [x1, #:lo12:.LANCHOR38]
+	cmp	w1, 1
+	bhi	.L420
+	ldrh	w19, [x0, 316]
+	adrp	x2, .LANCHOR69
+	adrp	x0, .LANCHOR68
+	adrp	x21, .LANCHOR65
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	add	w1, w19, 24
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	ldr	x4, [x21, #:lo12:.LANCHOR65]
+	mul	w0, w0, w2
+	cmp	w0, w1
+	csel	w1, w0, w1, ls
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+.L415:
+	cmp	w19, w1
+	bcc	.L418
+.L420:
+	mov	w0, 0
+	b	.L413
+.L418:
+	uxtw	x22, w19
+	ldrb	w2, [x4, x22]
+	cmp	w2, 255
+	beq	.L416
+	sbfiz	x3, x2, 6, 32
+	add	x3, x0, x3
+	ldrb	w3, [x3, 61]
+	cbnz	w3, .L416
+	ubfiz	x2, x2, 6, 8
+	add	x0, x0, x2
+	bl	buf_free
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L417
+	ldr	x0, [x21, #:lo12:.LANCHOR65]
+	mov	w1, w19
+	ldrb	w2, [x0, x22]
+	adrp	x0, .LC10
+	add	x0, x0, :lo12:.LC10
+	bl	printf
+.L417:
+	ldr	x0, [x21, #:lo12:.LANCHOR65]
+	add	x20, x20, :lo12:.LANCHOR58
+	mov	w1, -1
+	strb	w1, [x0, x22]
+	ldrb	w0, [x20, 7]
+	sub	w0, w0, #1
+	strb	w0, [x20, 7]
+	mov	w0, 1
+.L413:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L416:
+	add	w19, w19, 1
+	b	.L415
+	.size	gc_free_temp_buf, .-gc_free_temp_buf
+	.section	.text.gc_static_wearleveling,"ax",@progbits
+	.align	2
+	.global	gc_static_wearleveling
+	.type	gc_static_wearleveling, %function
+gc_static_wearleveling:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR46
+	stp	x19, x20, [sp, 16]
+	ldr	x5, [x21, #:lo12:.LANCHOR46]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	ldr	w0, [x5, 32]
+	cmp	w0, 20480
+	bls	.L429
+	ldr	w1, [x5, 36]
+	add	w1, w1, w0, lsr 10
+	and	w0, w0, 1023
+	stp	w0, w1, [x5, 32]
+.L429:
+	adrp	x0, .LANCHOR60
+	ldr	w3, [x5, 36]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldr	w1, [x0, 568]
+	ldr	w2, [x0, 12]
+	add	w1, w1, 12959744
+	add	w1, w1, 256
+	cmp	w2, w1
+	bhi	.L430
+	ldr	w1, [x0, 572]
+	add	w1, w1, 128
+	cmp	w3, w1
+	bls	.L428
+.L430:
+	adrp	x23, .LANCHOR59
+	ldrh	w10, [x5, 134]
+	adrp	x22, .LANCHOR54
+	mov	w20, 65535
+	ldr	x8, [x23, #:lo12:.LANCHOR59]
+	mov	w19, w20
+	ldrh	w11, [x22, #:lo12:.LANCHOR54]
+	mov	w12, w20
+	str	w2, [x0, 568]
+	mov	w4, 0
+	add	x8, x8, x10, uxth 2
+	str	w3, [x0, 572]
+	mov	w1, 0
+	mov	w25, 0
+	mov	w24, 0
+	mov	w3, 0
+	mov	w2, 0
+.L432:
+	cmp	w10, w11
+	bcc	.L436
+	ldrh	w0, [x5, 96]
+	cmp	w0, w25
+	bcs	.L437
+	strh	w25, [x5, 96]
+.L437:
+	ldrh	w0, [x5, 98]
+	cmp	w0, w24
+	bcs	.L438
+	strh	w24, [x5, 98]
+.L438:
+	udiv	w3, w3, w1
+	adrp	x0, .LANCHOR22
+	mov	x26, x0
+	udiv	w4, w4, w2
+	strh	w3, [x5, 88]
+	strh	w4, [x5, 90]
+	ldr	w5, [x0, #:lo12:.LANCHOR22]
+	tbz	x5, 8, .L439
+	adrp	x0, .LC11
+	and	w4, w4, 65535
+	and	w3, w3, 65535
+	add	x0, x0, :lo12:.LC11
+	bl	printf
+.L439:
+	ldr	w0, [x26, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L440
+	adrp	x0, .LC12
+	mov	w4, w24
+	mov	w3, w25
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC12
+	bl	printf
+.L440:
+	sub	w0, w24, w19
+	cmp	w0, 64
+	bgt	.L441
+.L447:
+	cbnz	w19, .L442
+.L448:
+	cbz	w20, .L428
+	ldr	x2, [x21, #:lo12:.LANCHOR46]
+	ldr	x1, [x23, #:lo12:.LANCHOR59]
+	ldrh	w5, [x22, #:lo12:.LANCHOR54]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L453:
+	cmp	w0, w5
+	bcc	.L455
+	ldrh	w0, [x2, 74]
+	add	w0, w20, w0
+	strh	w0, [x2, 74]
+	ldrh	w0, [x2, 96]
+	cmp	w20, w0
+	bcs	.L428
+	sub	w20, w0, w20
+	strh	w20, [x2, 96]
+.L428:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L436:
+	ldrb	w0, [x8, 2]
+	tbz	x0, 3, .L433
+	ldr	w0, [x8]
+	ldrh	w7, [x8]
+	ubfx	x0, x0, 11, 8
+	and	w6, w7, 2047
+.L434:
+	cmp	w6, w20
+	add	w1, w1, 1
+	csel	w20, w6, w20, cc
+	cmp	w6, w25
+	add	w3, w3, w6
+	csel	w6, w6, w25, hi
+	and	w1, w1, 65535
+	and	w20, w20, 65535
+	and	w25, w6, 65535
+	cmp	w0, w12
+	bne	.L456
+	b	.L457
+.L433:
+	tst	w0, 24
+	bne	.L435
+	ldrh	w7, [x8]
+	mov	w0, 65535
+	and	w6, w7, 2047
+	b	.L434
+.L435:
+	ldr	w0, [x8]
+	ubfx	x0, x0, 11, 8
+.L456:
+	cmp	w0, w19
+	add	w2, w2, 1
+	csel	w19, w0, w19, cc
+	cmp	w0, w24
+	add	w4, w4, w0
+	csel	w0, w0, w24, hi
+	and	w2, w2, 65535
+	and	w19, w19, 65535
+	and	w24, w0, 65535
+.L457:
+	add	w10, w10, 1
+	add	x8, x8, 4
+	and	w10, w10, 65535
+	b	.L432
+.L441:
+	ldr	x0, [x21, #:lo12:.LANCHOR46]
+	add	x25, x22, :lo12:.LANCHOR54
+	ldrh	w24, [x0, 134]
+.L444:
+	ldrh	w0, [x25]
+	cmp	w0, w24
+	bls	.L447
+	ldr	x2, [x23, #:lo12:.LANCHOR59]
+	ubfiz	x1, x24, 2, 16
+	add	x0, x2, x1
+	ldrb	w0, [x0, 2]
+	tst	w0, 192
+	beq	.L445
+	and	w3, w0, 224
+	cmp	w3, 224
+	beq	.L445
+	tbz	x0, 4, .L445
+	ldr	w0, [x2, x1]
+	ubfx	x0, x0, 11, 8
+	cmp	w0, w19
+	bhi	.L445
+	mov	w2, 1
+	mov	w0, w24
+	mov	w1, w2
+	bl	gc_add_sblk
+.L445:
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L444
+.L442:
+	ldr	x2, [x21, #:lo12:.LANCHOR46]
+	ldr	x1, [x23, #:lo12:.LANCHOR59]
+	ldrh	w5, [x22, #:lo12:.LANCHOR54]
+	ldrh	w0, [x2, 134]
+	add	x1, x1, x0, uxth 2
+.L449:
+	cmp	w0, w5
+	bcc	.L451
+	ldrh	w0, [x2, 72]
+	add	w0, w19, w0
+	strh	w0, [x2, 72]
+	ldrh	w0, [x2, 98]
+	cmp	w19, w0
+	bcs	.L448
+	sub	w19, w0, w19
+	strh	w19, [x2, 98]
+	b	.L448
+.L451:
+	ldr	w3, [x1]
+	ubfx	x4, x3, 11, 8
+	cmp	w19, w4
+	bhi	.L450
+	sub	w4, w4, w19
+	bfi	w3, w4, 11, 8
+	str	w3, [x1]
+.L450:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L449
+.L455:
+	ldrh	w3, [x1]
+	and	w4, w3, 2047
+	cmp	w4, w20
+	blt	.L454
+	sub	w4, w4, w20
+	bfi	w3, w4, 0, 11
+	strh	w3, [x1]
+.L454:
+	add	w0, w0, 1
+	add	x1, x1, 4
+	and	w0, w0, 65535
+	b	.L453
+	.size	gc_static_wearleveling, .-gc_static_wearleveling
+	.section	.text.print_gc_debug_info,"ax",@progbits
+	.align	2
+	.global	print_gc_debug_info
+	.type	print_gc_debug_info, %function
+print_gc_debug_info:
+	adrp	x1, .LANCHOR58
+	add	x0, x1, :lo12:.LANCHOR58
+	adrp	x2, .LANCHOR38
+	ldrh	w1, [x1, #:lo12:.LANCHOR58]
+	ldrb	w5, [x0, 7]
+	ldrb	w4, [x2, #:lo12:.LANCHOR38]
+	ldrh	w3, [x0, 314]
+	ldrh	w2, [x0, 2]
+	adrp	x0, .LC13
+	add	x0, x0, :lo12:.LC13
+	b	printf
+	.size	print_gc_debug_info, .-print_gc_debug_info
+	.section	.text.ftl_get_blk_list_in_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_get_blk_list_in_sblk
+	.type	ftl_get_blk_list_in_sblk, %function
+ftl_get_blk_list_in_sblk:
+	adrp	x2, .LANCHOR59
+	and	w0, w0, 65535
+	adrp	x6, .LANCHOR71
+	add	x6, x6, :lo12:.LANCHOR71
+	ldr	x2, [x2, #:lo12:.LANCHOR59]
+	mov	w3, 0
+	mov	w12, 21
+	add	x2, x2, x0, uxth 2
+	ldrb	w11, [x2, 3]
+	adrp	x2, .LANCHOR69
+	ldrb	w8, [x2, #:lo12:.LANCHOR69]
+	adrp	x2, .LANCHOR70
+	ldrb	w5, [x2, #:lo12:.LANCHOR70]
+	mul	w0, w0, w5
+	and	w4, w0, 65535
+	mov	w0, 0
+.L479:
+	cmp	w3, w8
+	blt	.L483
+	sxtw	x2, w0
+	mov	w3, -1
+.L484:
+	cmp	w8, w2
+	bgt	.L485
+	ret
+.L483:
+	asr	w2, w11, w3
+	tbnz	x2, 0, .L480
+	sdiv	w2, w3, w5
+	ldrh	w7, [x6]
+	sbfiz	x10, x0, 1, 32
+	cmp	w5, 1
+	sub	w7, w12, w7
+	lsl	w2, w2, w7
+	add	w2, w4, w2
+	and	w2, w2, 65535
+	bhi	.L481
+.L486:
+	add	w0, w0, 1
+	strh	w2, [x1, x10]
+.L480:
+	add	w3, w3, 1
+	b	.L479
+.L481:
+	and	w7, w3, 1
+	add	w2, w2, w7
+	b	.L486
+.L485:
+	strh	w3, [x1, x2, lsl 1]
+	add	x2, x2, 1
+	b	.L484
+	.size	ftl_get_blk_list_in_sblk, .-ftl_get_blk_list_in_sblk
+	.section	.text.ftl_alloc_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sblk
+	.type	ftl_alloc_sblk, %function
+ftl_alloc_sblk:
+.L488:
+	stp	x29, x30, [sp, -64]!
+	mov	w6, 2
+	mov	w7, 0
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w0
+	adrp	x0, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	cmp	w20, 5
+	ldrh	w11, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR59
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	mov	w19, 65535
+	ldr	x12, [x0, #:lo12:.LANCHOR59]
+	mov	w14, w11
+	str	x23, [sp, 48]
+	mov	w5, w19
+	csel	w23, wzr, w6, ne
+	mov	w13, w19
+	csel	w6, w6, wzr, ne
+.L503:
+	ldrh	w4, [x1, 132]
+	mov	w0, w4
+	add	x3, x12, x4, uxth 2
+.L489:
+	cmp	w0, w14
+	blt	.L501
+	sub	w0, w0, w4
+	add	w0, w7, w0
+	and	w7, w0, 65535
+	ldrh	w0, [x1, 134]
+	sub	w2, w11, w0
+	cmp	w7, w2
+	blt	.L502
+	cmp	w19, w13
+	beq	.L502
+	add	x21, x12, x19, uxth 2
+	b	.L493
+.L501:
+	ldrb	w2, [x3, 2]
+	mov	x21, x3
+	tst	w2, 224
+	bne	.L490
+	ubfx	x2, x2, 3, 2
+	cmp	w6, w2
+	beq	.L490
+	cbz	w23, .L491
+	ldr	w2, [x3]
+	ldrh	w10, [x1, 72]
+	ldrh	w8, [x1, 90]
+	ubfx	x2, x2, 11, 8
+	add	w8, w8, 1
+	add	w10, w10, w2
+	cmp	w10, w8
+	ble	.L492
+	and	w2, w2, 65535
+	cmp	w5, w2
+	bls	.L490
+	and	w19, w0, 65535
+	mov	w5, w2
+.L490:
+	add	w0, w0, 1
+	add	x3, x3, 4
+	b	.L489
+.L491:
+	ldrh	w2, [x3]
+	ldrh	w10, [x1, 74]
+	ldrh	w8, [x1, 88]
+	and	w2, w2, 2047
+	add	w10, w10, w2
+	add	w8, w8, 1
+	cmp	w10, w8
+	ble	.L492
+	cmp	w2, w5
+	bge	.L490
+	mov	w5, w2
+	and	w19, w0, 65535
+	b	.L490
+.L492:
+	and	w19, w0, 65535
+.L493:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L494
+	ldrb	w4, [x21, 3]
+	adrp	x0, .LC14
+	ldrb	w3, [x21, 2]
+	mov	w2, w20
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC14
+	ubfx	x3, x3, 5, 3
+	bl	printf
+.L494:
+	ldrb	w0, [x21, 2]
+	bfi	w0, w20, 5, 3
+	ubfx	x1, x0, 3, 2
+	orr	w1, w1, w23
+	bfi	w0, w1, 3, 2
+	strb	w0, [x21, 2]
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	strh	w19, [x0, 132]
+	tbz	x1, 0, .L495
+	ldrh	w1, [x0, 116]
+	sub	w1, w1, #1
+	strh	w1, [x0, 116]
+.L496:
+	cmp	w20, 5
+	bne	.L498
+	ldrh	w1, [x0, 120]
+	add	w1, w1, 1
+	strh	w1, [x0, 120]
+.L506:
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L495:
+	ldrb	w1, [x21, 2]
+	tst	w1, 24
+	bne	.L497
+	ldrh	w1, [x0, 114]
+	sub	w1, w1, #1
+	strh	w1, [x0, 114]
+	b	.L496
+.L497:
+	ldrh	w1, [x0, 118]
+	sub	w1, w1, #1
+	strh	w1, [x0, 118]
+	b	.L496
+.L498:
+	cmp	w20, 2
+	bne	.L500
+	ldrh	w1, [x0, 122]
+	add	w1, w1, 1
+	strh	w1, [x0, 122]
+	b	.L506
+.L500:
+	cmp	w20, 3
+	bne	.L506
+	ldrh	w1, [x0, 124]
+	add	w1, w1, 1
+	strh	w1, [x0, 124]
+	b	.L506
+.L502:
+	strh	w0, [x1, 132]
+	mov	w14, w4
+	b	.L503
+	.size	ftl_alloc_sblk, .-ftl_alloc_sblk
+	.section	.text.ftl_free_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sblk
+	.type	ftl_free_sblk, %function
+ftl_free_sblk:
+	stp	x29, x30, [sp, -16]!
+	and	x0, x0, 65535
+	mov	w1, 65535
+	cmp	w0, w1
+	add	x29, sp, 0
+	bne	.L511
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LC0
+	mov	w2, 313
+	add	x1, x1, :lo12:.LANCHOR72
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L512:
+	b	.L512
+.L511:
+	adrp	x1, .LANCHOR59
+	ldr	x3, [x1, #:lo12:.LANCHOR59]
+	add	x3, x3, x0, lsl 2
+	ldrb	w1, [x3, 2]
+	ands	w4, w1, 224
+	bne	.L513
+	adrp	x1, .LANCHOR72
+	adrp	x0, .LC0
+	mov	w2, 316
+	add	x1, x1, :lo12:.LANCHOR72
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L514:
+	b	.L514
+.L513:
+	ubfx	x2, x1, 3, 2
+	cmp	w4, 160
+	adrp	x1, .LANCHOR46
+	bne	.L515
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	ldrh	w4, [x5, 120]
+	sub	w4, w4, #1
+	strh	w4, [x5, 120]
+.L516:
+	tbz	x2, 0, .L518
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 116]
+	add	w1, w1, 1
+	strh	w1, [x2, 116]
+.L519:
+	ldrb	w1, [x3, 2]
+	and	w1, w1, 31
+	strb	w1, [x3, 2]
+	adrp	x1, .LANCHOR56
+	ldr	x1, [x1, #:lo12:.LANCHOR56]
+	strh	wzr, [x1, x0, lsl 1]
+	ldp	x29, x30, [sp], 16
+	ret
+.L515:
+	cmp	w4, 64
+	bne	.L517
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	ldrh	w4, [x5, 122]
+	sub	w4, w4, #1
+	strh	w4, [x5, 122]
+	b	.L516
+.L517:
+	cmp	w4, 96
+	bne	.L516
+	ldr	x5, [x1, #:lo12:.LANCHOR46]
+	ldrh	w4, [x5, 124]
+	sub	w4, w4, #1
+	strh	w4, [x5, 124]
+	b	.L516
+.L518:
+	cbnz	w2, .L520
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 114]
+	add	w1, w1, 1
+	strh	w1, [x2, 114]
+	b	.L519
+.L520:
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 118]
+	add	w1, w1, 1
+	strh	w1, [x2, 118]
+	b	.L519
+	.size	ftl_free_sblk, .-ftl_free_sblk
+	.section	.text.gc_free_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_free_src_blk
+	.type	gc_free_src_blk, %function
+gc_free_src_blk:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR58
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LC15
+	adrp	x23, .LANCHOR56
+	add	x21, x21, :lo12:.LANCHOR58
+	mov	x24, x23
+	add	x22, x22, :lo12:.LC15
+	stp	x19, x20, [sp, 16]
+	mov	w20, 0
+	stp	x25, x26, [sp, 64]
+.L523:
+	ldrh	w0, [x21, 56]
+	cmp	w0, w20
+	bhi	.L539
+	strh	wzr, [x21, 56]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L539:
+	add	x0, x21, x20, sxtw 1
+	ldrh	w25, [x0, 58]
+	ldr	x0, [x23, #:lo12:.LANCHOR56]
+	mov	x19, x25
+	lsl	x26, x25, 1
+	ldrh	w2, [x0, x26]
+	cbz	w2, .L524
+	mov	w1, w25
+	mov	x0, x22
+	bl	printf
+.L524:
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x26]
+	cbnz	w0, .L525
+	adrp	x0, .LANCHOR59
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x25, x0, x25, lsl 2
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L526
+	ldrb	w2, [x25, 2]
+	adrp	x0, .LC16
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC16
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L526:
+	ldrb	w0, [x25, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L527
+	tst	w0, 192
+	bne	.L528
+.L527:
+	adrp	x1, .LANCHOR73
+	adrp	x0, .LC0
+	mov	w2, 753
+	add	x1, x1, :lo12:.LANCHOR73
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L529:
+	b	.L529
+.L528:
+	mov	w0, w19
+	bl	ftl_free_sblk
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrh	w2, [x0, 124]
+	cbz	w2, .L530
+	add	x3, x0, 392
+	mov	w1, 0
+.L532:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L531
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 392]
+	strh	w2, [x0, 124]
+.L530:
+	ldrh	w2, [x0, 120]
+	cbz	w2, .L533
+	add	x3, x0, 136
+	mov	w1, 0
+.L535:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L534
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 136]
+	strh	w2, [x0, 120]
+.L533:
+	ldrh	w2, [x0, 122]
+	cbz	w2, .L536
+	add	x3, x0, 264
+	mov	w1, 0
+.L538:
+	ldrh	w4, [x3]
+	cmp	w4, w19
+	bne	.L537
+	add	x1, x0, x1, sxtw 1
+	mov	w3, -1
+	sub	w2, w2, #1
+	strh	w3, [x1, 264]
+	strh	w2, [x0, 122]
+.L536:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L523
+.L531:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L532
+	b	.L530
+.L534:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L535
+	b	.L533
+.L537:
+	add	w1, w1, 1
+	add	x3, x3, 2
+	cmp	w1, 64
+	bne	.L538
+	b	.L536
+.L525:
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w19
+	bl	gc_add_sblk
+	b	.L536
+	.size	gc_free_src_blk, .-gc_free_src_blk
+	.section	.text.ftl_erase_phy_blk,"ax",@progbits
+	.align	2
+	.global	ftl_erase_phy_blk
+	.type	ftl_erase_phy_blk, %function
+ftl_erase_phy_blk:
+	stp	x29, x30, [sp, -48]!
+	and	w0, w0, 65535
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, w1
+	adrp	x1, .LANCHOR71
+	stp	x19, x20, [sp, 16]
+	mov	w19, 21
+	adrp	x22, .LANCHOR75
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	sub	w1, w19, w1
+	mov	w19, 1
+	lsl	w19, w19, w1
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	asr	w20, w0, w1
+	adrp	x0, .LANCHOR74
+	sxth	w19, w19
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L563
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	cmp	w21, 0
+	cset	w1, eq
+	mov	w0, w20
+	mul	w2, w2, w19
+	bl	flash_erase_block_en
+.L563:
+	ldrh	w2, [x22, #:lo12:.LANCHOR75]
+	mov	w1, w21
+	mov	w0, w20
+	ldp	x21, x22, [sp, 32]
+	mul	w2, w2, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_erase_block_en
+	.size	ftl_erase_phy_blk, .-ftl_erase_phy_blk
+	.section	.text.ftl_erase_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_erase_sblk
+	.type	ftl_erase_sblk, %function
+ftl_erase_sblk:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR59
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 65535
+	ldr	x0, [x21, #:lo12:.LANCHOR59]
+	mov	w22, w1
+	stp	x19, x20, [sp, 16]
+	ubfiz	x20, x25, 2, 16
+	add	x0, x0, x20
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR76
+	adrp	x23, .LANCHOR70
+	add	x24, x24, :lo12:.LANCHOR76
+	add	x23, x23, :lo12:.LANCHOR70
+	ldrb	w26, [x0, 3]
+	mov	w19, 0
+	str	x27, [sp, 80]
+	add	x27, x29, 96
+.L569:
+	ldrb	w0, [x24]
+	cmp	w19, w0
+	bge	.L576
+	ldrb	w3, [x23]
+	adrp	x0, .LANCHOR75
+	mov	w1, 0
+	ldrh	w4, [x0, #:lo12:.LANCHOR75]
+	mov	w0, 0
+	mul	w6, w19, w3
+	mul	w5, w25, w3
+	b	.L577
+.L571:
+	add	w2, w0, w6
+	asr	w2, w26, w2
+	tbnz	x2, 0, .L570
+	and	w2, w0, 1
+	add	w2, w2, w5
+	mul	w2, w2, w4
+	str	w2, [x27, w1, sxtw 2]
+	add	w1, w1, 1
+.L570:
+	add	w0, w0, 1
+.L577:
+	cmp	w0, w3
+	blt	.L571
+	cmp	w1, 2
+	bne	.L572
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L573
+	ldp	w2, w3, [x29, 96]
+	cmp	w22, 0
+	cset	w1, eq
+	mov	w0, w19
+	bl	flash_erase_duplane_block
+.L573:
+	ldp	w2, w3, [x29, 96]
+	mov	w1, w22
+	mov	w0, w19
+	bl	flash_erase_duplane_block
+.L574:
+	add	w19, w19, 1
+	b	.L569
+.L572:
+	cmp	w1, 1
+	bne	.L574
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbz	w0, .L575
+	ldr	w2, [x29, 96]
+	cmp	w22, 0
+	cset	w1, eq
+	mov	w0, w19
+	bl	flash_erase_block_en
+.L575:
+	ldr	w2, [x29, 96]
+	mov	w1, w22
+	mov	w0, w19
+	bl	flash_erase_block_en
+	b	.L574
+.L576:
+	adrp	x2, .LANCHOR46
+	ldr	x3, [x21, #:lo12:.LANCHOR59]
+	cbnz	w22, .L578
+	ldrh	w1, [x3, x20]
+	add	w0, w1, 1
+	and	w0, w0, 2047
+	bfi	w1, w0, 0, 11
+	strh	w1, [x3, x20]
+	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 84]
+	add	w2, w2, 1
+	str	w2, [x1, 84]
+	ldrh	w2, [x1, 96]
+	cmp	w2, w0
+	bge	.L580
+	strh	w0, [x1, 96]
+.L580:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L578:
+	ldr	w1, [x3, x20]
+	ubfx	x0, x1, 11, 8
+	add	w0, w0, 1
+	and	w0, w0, 255
+	bfi	w1, w0, 11, 8
+	str	w1, [x3, x20]
+	and	w0, w0, 65535
+	ldr	x1, [x2, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 80]
+	add	w2, w2, 1
+	str	w2, [x1, 80]
+	ldrh	w2, [x1, 98]
+	cmp	w2, w0
+	bcs	.L580
+	strh	w0, [x1, 98]
+	b	.L580
+	.size	ftl_erase_sblk, .-ftl_erase_sblk
+	.section	.text.ftl_alloc_sys_blk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_sys_blk
+	.type	ftl_alloc_sys_blk, %function
+ftl_alloc_sys_blk:
+	adrp	x0, .LANCHOR46
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 136]
+	cmp	w0, 63
+	bls	.L590
+	strh	wzr, [x1, 136]
+.L590:
+	ldrh	w3, [x1, 112]
+	cbnz	w3, .L591
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR77
+	adrp	x0, .LC0
+	mov	w2, 440
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR77
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L592:
+	b	.L592
+.L591:
+	mov	w6, 65535
+.L597:
+	ldrh	w2, [x1, 136]
+.L593:
+	mov	w4, w2
+	cmp	w2, 63
+	ble	.L594
+	strh	wzr, [x1, 136]
+	b	.L597
+.L594:
+	add	x5, x2, 1
+	add	x0, x1, x5, lsl 1
+	ldrh	w0, [x0, 158]
+	cmp	w0, w6
+	bne	.L598
+	mov	x2, x5
+	b	.L593
+.L598:
+	add	x4, x1, x4, sxtw 1
+	mov	w5, -1
+	sub	w3, w3, #1
+	strh	w5, [x4, 160]
+	strh	w2, [x1, 136]
+	strh	w3, [x1, 112]
+	ret
+	.size	ftl_alloc_sys_blk, .-ftl_alloc_sys_blk
+	.section	.text.ftl_free_sys_blk,"ax",@progbits
+	.align	2
+	.global	ftl_free_sys_blk
+	.type	ftl_free_sys_blk, %function
+ftl_free_sys_blk:
+	adrp	x1, .LANCHOR46
+	and	w0, w0, 65535
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldrh	w2, [x1, 138]
+	cmp	w2, 63
+	bls	.L603
+	strh	wzr, [x1, 138]
+.L603:
+	ldrh	w3, [x1, 112]
+	cmp	w3, 63
+	bls	.L604
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR78
+	adrp	x0, .LC0
+	mov	w2, 464
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR78
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L605:
+	b	.L605
+.L604:
+	mov	w6, 65535
+.L610:
+	ldrh	w2, [x1, 138]
+.L606:
+	mov	w4, w2
+	cmp	w2, 63
+	ble	.L607
+	strh	wzr, [x1, 138]
+	b	.L610
+.L607:
+	add	x5, x2, 1
+	add	x7, x1, x5, lsl 1
+	ldrh	w7, [x7, 158]
+	cmp	w7, w6
+	bne	.L608
+	add	x4, x1, x4, sxtw 1
+	add	w3, w3, 1
+	strh	w0, [x4, 160]
+	strh	w2, [x1, 138]
+	strh	w3, [x1, 112]
+	ret
+.L608:
+	mov	x2, x5
+	b	.L606
+	.size	ftl_free_sys_blk, .-ftl_free_sys_blk
+	.section	.text.ftl_info_data_recovery,"ax",@progbits
+	.align	2
+	.global	ftl_info_data_recovery
+	.type	ftl_info_data_recovery, %function
+ftl_info_data_recovery:
+	ldrh	w1, [x0]
+	mov	w2, 65535
+	cmp	w1, w2
+	beq	.L614
+	adrp	x2, .LANCHOR59
+	ubfiz	x1, x1, 2, 16
+	ldr	x3, [x2, #:lo12:.LANCHOR59]
+	add	x4, x3, x1
+	ldrb	w2, [x4, 2]
+	tst	w2, 224
+	bne	.L614
+	ldrb	w0, [x0, 4]
+	bfi	w2, w0, 5, 3
+	adrp	x0, .LANCHOR46
+	strb	w2, [x4, 2]
+	ldr	x5, [x0, #:lo12:.LANCHOR46]
+	tbz	x2, 3, .L618
+	ldrh	w2, [x5, 116]
+	sub	w2, w2, #1
+	strh	w2, [x5, 116]
+.L619:
+	ldrb	w2, [x4, 2]
+	and	w2, w2, 224
+	cmp	w2, 160
+	bne	.L621
+	ldr	w2, [x3, x1]
+	ubfx	x4, x2, 11, 8
+	add	w4, w4, 1
+	bfi	w2, w4, 11, 8
+	str	w2, [x3, x1]
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 120]
+	sub	w0, w0, #1
+	strh	w0, [x1, 120]
+	ret
+.L618:
+	tst	w2, 24
+	bne	.L620
+	ldrh	w2, [x5, 114]
+	sub	w2, w2, #1
+	strh	w2, [x5, 114]
+	b	.L619
+.L620:
+	ldrh	w2, [x5, 118]
+	sub	w2, w2, #1
+	strh	w2, [x5, 118]
+	b	.L619
+.L621:
+	ldrh	w4, [x3, x1]
+	cmp	w2, 64
+	add	w5, w4, 1
+	bfi	w4, w5, 0, 11
+	strh	w4, [x3, x1]
+	bne	.L622
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 122]
+	sub	w0, w0, #1
+	strh	w0, [x1, 122]
+	ret
+.L622:
+	cmp	w2, 96
+	bne	.L614
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 124]
+	sub	w0, w0, #1
+	strh	w0, [x1, 124]
+.L614:
+	ret
+	.size	ftl_info_data_recovery, .-ftl_info_data_recovery
+	.section	.text.ftl_get_ppa_from_index,"ax",@progbits
+	.align	2
+	.global	ftl_get_ppa_from_index
+	.type	ftl_get_ppa_from_index, %function
+ftl_get_ppa_from_index:
+	and	w1, w0, 65535
+	adrp	x0, .LANCHOR60
+	adrp	x2, .LANCHOR69
+	ldr	x3, [x0, #:lo12:.LANCHOR60]
+	adrp	x0, .LANCHOR79
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	bge	.L624
+	add	x3, x3, 16
+.L625:
+	ldrb	w2, [x3, 9]
+	sdiv	w4, w1, w2
+	msub	w1, w4, w2, w1
+	add	x1, x3, x1, uxth 1
+	ldrh	w0, [x1, 16]
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L626
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR80
+	adrp	x0, .LC0
+	mov	w2, 837
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR80
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L627:
+	b	.L627
+.L624:
+	sub	w1, w1, w0
+	add	x3, x3, 48
+	and	w1, w1, 65535
+	b	.L625
+.L626:
+	adrp	x1, .LANCHOR75
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	madd	w0, w1, w0, w4
+	ret
+	.size	ftl_get_ppa_from_index, .-ftl_get_ppa_from_index
+	.section	.text.lpa_hash_get_ppa,"ax",@progbits
+	.align	2
+	.global	lpa_hash_get_ppa
+	.type	lpa_hash_get_ppa, %function
+lpa_hash_get_ppa:
+	and	x2, x0, 255
+	adrp	x1, .LANCHOR81
+	add	x1, x1, :lo12:.LANCHOR81
+	mov	w3, 65535
+	ldrh	w1, [x1, x2, lsl 1]
+	adrp	x2, .LANCHOR82
+	ldr	x4, [x2, #:lo12:.LANCHOR82]
+	adrp	x2, .LANCHOR83
+	ldr	x5, [x2, #:lo12:.LANCHOR83]
+.L632:
+	cmp	w1, w3
+	bne	.L634
+	mov	w0, -1
+	ret
+.L634:
+	uxtw	x2, w1
+	ldr	w6, [x4, x2, lsl 2]
+	cmp	w0, w6
+	bne	.L633
+	mov	w0, w1
+	b	ftl_get_ppa_from_index
+.L633:
+	ldrh	w1, [x5, x2, lsl 1]
+	b	.L632
+	.size	lpa_hash_get_ppa, .-lpa_hash_get_ppa
+	.section	.text.ftl_get_new_free_page,"ax",@progbits
+	.align	2
+	.global	ftl_get_new_free_page
+	.type	ftl_get_new_free_page, %function
+ftl_get_new_free_page:
+	stp	x29, x30, [sp, -16]!
+	mov	x1, x0
+	mov	w2, 65535
+	add	x29, sp, 0
+	ldrh	w0, [x0]
+	cmp	w0, w2
+	bne	.L636
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LC0
+	mov	w2, 948
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L637:
+	b	.L637
+.L636:
+	adrp	x0, .LANCHOR79
+	ldrh	w3, [x1, 2]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w3, w0
+	bne	.L638
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LC0
+	mov	w2, 949
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L639:
+	b	.L639
+.L638:
+	ldrh	w4, [x1, 6]
+	cbnz	w4, .L640
+	adrp	x1, .LANCHOR84
+	adrp	x0, .LC0
+	mov	w2, 950
+	add	x1, x1, :lo12:.LANCHOR84
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L641:
+	b	.L641
+.L640:
+	ldrb	w0, [x1, 5]
+	mov	w3, w2
+	add	x0, x0, 8
+	ldrh	w5, [x1, x0, lsl 1]
+	adrp	x0, .LANCHOR69
+	ldrb	w6, [x0, #:lo12:.LANCHOR69]
+.L642:
+	cmp	w5, w3
+	ldrb	w2, [x1, 5]
+	beq	.L644
+	adrp	x0, .LANCHOR75
+	sub	w4, w4, #1
+	strh	w4, [x1, 6]
+	add	w2, w2, 1
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	and	w2, w2, 255
+	ldrh	w4, [x1, 10]
+	cmp	w6, w2
+	ldrh	w3, [x1, 2]
+	add	w4, w4, 1
+	strb	w2, [x1, 5]
+	mul	w0, w0, w5
+	strh	w4, [x1, 10]
+	orr	w0, w0, w3
+	bne	.L635
+	add	w3, w3, 1
+	strb	wzr, [x1, 5]
+	strh	w3, [x1, 2]
+.L635:
+	ldp	x29, x30, [sp], 16
+	ret
+.L644:
+	add	w2, w2, 1
+	and	w2, w2, 255
+	strb	w2, [x1, 5]
+	cmp	w2, w6
+	bne	.L643
+	ldrh	w0, [x1, 2]
+	strb	wzr, [x1, 5]
+	add	w0, w0, 1
+	strh	w0, [x1, 2]
+.L643:
+	ldrb	w0, [x1, 5]
+	add	x0, x0, 8
+	ldrh	w5, [x1, x0, lsl 1]
+	b	.L642
+	.size	ftl_get_new_free_page, .-ftl_get_new_free_page
+	.section	.text.ftl_ext_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	ftl_ext_alloc_new_blk
+	.type	ftl_ext_alloc_new_blk, %function
+ftl_ext_alloc_new_blk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	bl	ftl_alloc_sys_blk
+	and	w1, w0, 65535
+	mov	w2, 65533
+	mov	w19, w1
+	sub	w1, w1, #1
+	cmp	w2, w1, uxth
+	bcs	.L648
+	adrp	x1, .LANCHOR85
+	adrp	x0, .LC0
+	mov	w2, 981
+	add	x1, x1, :lo12:.LANCHOR85
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L649:
+	b	.L649
+.L648:
+	adrp	x20, .LANCHOR46
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sys_blk
+	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	strh	w19, [x0, 130]
+	strh	wzr, [x0, 140]
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_ext_alloc_new_blk, .-ftl_ext_alloc_new_blk
+	.section	.text.ftl_total_vpn_update,"ax",@progbits
+	.align	2
+	.global	ftl_total_vpn_update
+	.type	ftl_total_vpn_update, %function
+ftl_total_vpn_update:
+	adrp	x2, .LANCHOR86
+	mov	x3, x2
+	ldrh	w1, [x2, #:lo12:.LANCHOR86]
+	cmp	w1, 4
+	bhi	.L652
+	cbnz	w0, .L652
+	add	w1, w1, 1
+	strh	w1, [x2, #:lo12:.LANCHOR86]
+	ret
+.L652:
+	adrp	x0, .LANCHOR54
+	strh	wzr, [x3, #:lo12:.LANCHOR86]
+	mov	w1, 0
+	mov	w2, 0
+	ldrh	w5, [x0, #:lo12:.LANCHOR54]
+	adrp	x0, .LANCHOR56
+	mov	w8, 65535
+	ldr	x6, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LANCHOR59
+	ldr	x7, [x0, #:lo12:.LANCHOR59]
+	mov	x0, 0
+.L654:
+	cmp	w5, w0, uxth
+	bhi	.L657
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	str	w2, [x0, 524]
+	str	w1, [x0, 528]
+	ret
+.L657:
+	ldrh	w3, [x6, x0, lsl 1]
+	cmp	w3, w8
+	beq	.L655
+	add	x4, x7, x0, lsl 2
+	ldrb	w4, [x4, 2]
+	and	w4, w4, 224
+	cmp	w4, 160
+	bne	.L656
+	add	w1, w1, w3
+.L655:
+	add	x0, x0, 1
+	b	.L654
+.L656:
+	add	w2, w2, w3
+	b	.L655
+	.size	ftl_total_vpn_update, .-ftl_total_vpn_update
+	.section	.text.ftl_debug_info_fill,"ax",@progbits
+	.align	2
+	.global	ftl_debug_info_fill
+	.type	ftl_debug_info_fill, %function
+ftl_debug_info_fill:
+	mov	w0, 0
+	ret
+	.size	ftl_debug_info_fill, .-ftl_debug_info_fill
+	.section	.text.ftl_vpn_update,"ax",@progbits
+	.align	2
+	.global	ftl_vpn_update
+	.type	ftl_vpn_update, %function
+ftl_vpn_update:
+	adrp	x1, .LANCHOR56
+	ubfiz	x0, x0, 1, 16
+	ldr	x1, [x1, #:lo12:.LANCHOR56]
+	ldrh	w0, [x1, x0]
+	cmp	w0, 0
+	cset	w0, eq
+	ret
+	.size	ftl_vpn_update, .-ftl_vpn_update
+	.section	.text.ftl_vpn_decrement,"ax",@progbits
+	.align	2
+	.global	ftl_vpn_decrement
+	.type	ftl_vpn_decrement, %function
+ftl_vpn_decrement:
+	stp	x29, x30, [sp, -16]!
+	and	w3, w0, 65535
+	mov	w0, 65535
+	cmp	w3, w0
+	add	x29, sp, 0
+	beq	.L661
+	adrp	x0, .LANCHOR56
+	ubfiz	x1, x3, 1, 16
+	ldr	x2, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x2, x1]
+	cbnz	w0, .L662
+	adrp	x0, .LC17
+	mov	w2, 0
+	mov	w1, w3
+	add	x0, x0, :lo12:.LC17
+	bl	printf
+.L665:
+	mov	w0, 0
+	b	.L660
+.L662:
+	sub	w0, w0, #1
+	strh	w0, [x2, x1]
+.L661:
+	adrp	x2, .LANCHOR87
+	ldrh	w0, [x2, #:lo12:.LANCHOR87]
+	cmp	w3, w0
+	beq	.L665
+	mov	w1, 65535
+	cmp	w0, w1
+	bne	.L664
+	strh	w3, [x2, #:lo12:.LANCHOR87]
+	b	.L665
+.L664:
+	bl	ftl_vpn_update
+	cmp	w0, 0
+	cset	w0, ne
+	strh	w3, [x2, #:lo12:.LANCHOR87]
+.L660:
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	ftl_vpn_decrement, .-ftl_vpn_decrement
+	.section	.text.lpa_hash_update_ppa,"ax",@progbits
+	.align	2
+	.global	lpa_hash_update_ppa
+	.type	lpa_hash_update_ppa, %function
+lpa_hash_update_ppa:
+	adrp	x3, .LANCHOR81
+	and	x5, x0, 255
+	add	x4, x3, :lo12:.LANCHOR81
+	mov	w7, 65535
+	and	w2, w2, 65535
+	mov	w12, w7
+	ldrh	w6, [x4, x5, lsl 1]
+	adrp	x4, .LANCHOR82
+	ldr	x8, [x4, #:lo12:.LANCHOR82]
+	adrp	x4, .LANCHOR83
+	ldr	x4, [x4, #:lo12:.LANCHOR83]
+.L668:
+	cmp	w6, w12
+	beq	.L672
+	uxtw	x11, w6
+	lsl	x10, x11, 2
+	add	x13, x8, x10
+	ldr	w10, [x8, x10]
+	cmp	w0, w10
+	lsl	x10, x11, 1
+	bne	.L669
+	mov	w6, -1
+	str	w6, [x13]
+	cmp	w7, w12
+	bne	.L670
+	add	x6, x3, :lo12:.LANCHOR81
+	ldrh	w7, [x4, x10]
+	strh	w7, [x6, x5, lsl 1]
+.L671:
+	mov	w6, -1
+	strh	w6, [x4, x11, lsl 1]
+.L672:
+	uxtw	x6, w2
+	add	x3, x3, :lo12:.LANCHOR81
+	cmn	w1, #1
+	str	w0, [x8, x6, lsl 2]
+	ldrh	w0, [x3, x5, lsl 1]
+	strh	w2, [x3, x5, lsl 1]
+	strh	w0, [x4, x6, lsl 1]
+	beq	.L679
+	stp	x29, x30, [sp, -16]!
+	adrp	x0, .LANCHOR71
+	add	x29, sp, 0
+	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w1, w0, w1
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w0, w1, w0
+	bl	ftl_vpn_decrement
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L670:
+	ldrh	w6, [x4, x10]
+	strh	w6, [x4, w7, uxtw 1]
+	b	.L671
+.L669:
+	mov	w7, w6
+	ldrh	w6, [x4, x10]
+	b	.L668
+.L679:
+	mov	w0, -1
+	ret
+	.size	lpa_hash_update_ppa, .-lpa_hash_update_ppa
+	.section	.text.ftl_write_completed,"ax",@progbits
+	.align	2
+	.global	ftl_write_completed
+	.type	ftl_write_completed, %function
+ftl_write_completed:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR88
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR36
+	adrp	x22, .LANCHOR71
+	add	x20, x20, :lo12:.LANCHOR88
+	add	x19, x19, :lo12:.LANCHOR36
+	add	x22, x22, :lo12:.LANCHOR71
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+.L683:
+	ldrb	w0, [x20]
+	cmp	w0, 255
+	bne	.L689
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L689:
+	ubfiz	x21, x0, 6, 8
+	sbfiz	x0, x0, 6, 32
+	add	x23, x19, x0
+	add	x21, x19, x21
+	ldrb	w0, [x19, x0]
+	strb	w0, [x20]
+	ldr	w0, [x23, 52]
+	cmn	w0, #1
+	bne	.L684
+	ldp	w2, w3, [x23, 36]
+	mov	w1, 21
+	ldrh	w0, [x22]
+	mov	w25, 1
+	sub	w1, w1, w0
+	lsr	w0, w3, w0
+	lsl	w1, w25, w1
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w1, w1, w0
+	adrp	x0, .LC18
+	add	x0, x0, :lo12:.LC18
+	and	w24, w1, 65535
+	mov	w1, w24
+	bl	printf
+	mov	w1, w25
+	mov	w2, 0
+	mov	w0, w24
+	bl	gc_add_sblk
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrh	w1, [x0, 16]
+	cmp	w1, w24
+	bne	.L685
+	strh	wzr, [x0, 22]
+.L686:
+	mov	x0, x21
+	bl	ftl_write_buf
+	b	.L683
+.L685:
+	ldrh	w1, [x0, 48]
+	cmp	w1, w24
+	bne	.L686
+	strh	wzr, [x0, 54]
+	b	.L686
+.L684:
+	ldrh	w2, [x23, 48]
+	ldr	w0, [x23, 36]
+	ldr	w1, [x23, 44]
+	bl	lpa_hash_update_ppa
+	ldrb	w0, [x23, 2]
+	tbz	x0, 2, .L688
+	and	w0, w0, -3
+	strb	w0, [x23, 2]
+	b	.L683
+.L688:
+	mov	x0, x21
+	bl	buf_free
+	b	.L683
+	.size	ftl_write_completed, .-ftl_write_completed
+	.section	.text.ftl_mask_bad_block,"ax",@progbits
+	.align	2
+	.global	ftl_mask_bad_block
+	.type	ftl_mask_bad_block, %function
+ftl_mask_bad_block:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR71
+	mov	w2, 21
+	add	x29, sp, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	stp	x19, x20, [sp, 16]
+	ubfx	x20, x0, 21, 3
+	sub	w1, w2, w3
+	mov	w2, 1
+	lsr	w0, w0, w3
+	lsl	w2, w2, w1
+	sub	w2, w2, #1
+	and	w2, w2, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w2, w2, w0
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	and	w19, w2, 255
+	tbz	x0, 14, .L692
+	adrp	x0, .LC19
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC19
+	bl	printf
+.L692:
+	adrp	x0, .LANCHOR54
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	cmp	w0, w19
+	bls	.L691
+	adrp	x0, .LANCHOR59
+	mov	w1, 1
+	lsl	w1, w1, w20
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x19, x0, x19, uxtb 2
+	ldrb	w0, [x19, 3]
+	orr	w1, w1, w0
+	strb	w1, [x19, 3]
+.L691:
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_mask_bad_block, .-ftl_mask_bad_block
+	.section	.text.print_ftl_debug_info,"ax",@progbits
+	.align	2
+	.global	print_ftl_debug_info
+	.type	print_ftl_debug_info, %function
+print_ftl_debug_info:
+	sub	sp, sp, #64
+	adrp	x1, .LANCHOR60
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	ldr	x7, [x1, #:lo12:.LANCHOR60]
+	str	x19, [sp, 48]
+	adrp	x19, .LANCHOR46
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	ldrh	w4, [x0, 122]
+	ldrh	w3, [x0, 116]
+	ldrh	w2, [x0, 118]
+	ldrh	w1, [x0, 114]
+	ldr	w0, [x7, 528]
+	str	w0, [sp]
+	adrp	x0, .LC20
+	add	x0, x0, :lo12:.LC20
+	ldr	w7, [x7, 524]
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	adrp	x1, .LANCHOR89
+	ldrb	w3, [x1, #:lo12:.LANCHOR89]
+	ldr	w4, [x0, 8]
+	ldr	w5, [x0, 64]
+	ldr	w1, [x0, 20]
+	ldr	w2, [x0, 28]
+	adrp	x0, .LC21
+	add	x0, x0, :lo12:.LC21
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldr	w1, [x0, 52]
+	ldr	w2, [x0, 60]
+	ldr	w3, [x0, 16]
+	adrp	x0, .LC22
+	add	x0, x0, :lo12:.LC22
+	lsr	w3, w3, 11
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldrh	w2, [x0, 98]
+	ldrh	w6, [x0, 72]
+	ldrh	w5, [x0, 96]
+	ldrh	w4, [x0, 92]
+	ldrh	w3, [x0, 88]
+	ldrh	w1, [x0, 74]
+	str	w2, [sp, 16]
+	ldrh	w2, [x0, 94]
+	str	w2, [sp, 8]
+	ldrh	w2, [x0, 90]
+	str	w2, [sp]
+	ldp	w7, w2, [x0, 80]
+	adrp	x0, .LC23
+	add	x0, x0, :lo12:.LC23
+	bl	printf
+	ldr	x19, [sp, 48]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 64
+	ret
+	.size	print_ftl_debug_info, .-print_ftl_debug_info
+	.section	.text.sblk_init,"ax",@progbits
+	.align	2
+	.global	sblk_init
+	.type	sblk_init, %function
+sblk_init:
+	adrp	x1, .LANCHOR90
+	mov	w0, -1
+	strb	w0, [x1, #:lo12:.LANCHOR90]
+	adrp	x1, .LANCHOR88
+	strb	w0, [x1, #:lo12:.LANCHOR88]
+	adrp	x1, .LANCHOR51
+	strb	w0, [x1, #:lo12:.LANCHOR51]
+	adrp	x1, .LANCHOR62
+	strb	w0, [x1, #:lo12:.LANCHOR62]
+	mov	w0, 0
+	ret
+	.size	sblk_init, .-sblk_init
+	.section	.text.dump_sblk_queue,"ax",@progbits
+	.align	2
+	.global	dump_sblk_queue
+	.type	dump_sblk_queue, %function
+dump_sblk_queue:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LC24
+	add	x0, x0, :lo12:.LC24
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR90
+	str	x21, [sp, 32]
+	ldrb	w1, [x19, #:lo12:.LANCHOR90]
+	bl	printf
+	ldrb	w19, [x19, #:lo12:.LANCHOR90]
+	cmp	w19, 255
+	beq	.L701
+	adrp	x1, .LANCHOR36
+	ubfiz	x19, x19, 6, 8
+	add	x1, x1, :lo12:.LANCHOR36
+	adrp	x21, .LC25
+	add	x19, x1, x19
+	add	x21, x21, :lo12:.LC25
+	mov	x20, x1
+.L703:
+	ldrb	w2, [x19, 58]
+	mov	x0, x21
+	ldrb	w1, [x19, 1]
+	ldr	w3, [x19, 40]
+	bl	printf
+	ldrb	w19, [x19]
+	cmp	w19, 255
+	beq	.L701
+	ubfiz	x19, x19, 6, 8
+	add	x19, x20, x19
+	b	.L703
+.L701:
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	dump_sblk_queue, .-dump_sblk_queue
+	.section	.text.queue_lun_state,"ax",@progbits
+	.align	2
+	.global	queue_lun_state
+	.type	queue_lun_state, %function
+queue_lun_state:
+	adrp	x2, .LANCHOR90
+	ldrb	w2, [x2, #:lo12:.LANCHOR90]
+	cmp	w2, 255
+	beq	.L720
+	adrp	x3, .LANCHOR71
+	adrp	x7, .LANCHOR36
+	add	x7, x7, :lo12:.LANCHOR36
+	adrp	x10, .L716
+	ldrh	w8, [x3, #:lo12:.LANCHOR71]
+	mov	w3, 21
+	ubfx	x11, x0, 21, 3
+	add	x10, x10, :lo12:.L716
+	sub	w4, w3, w8
+	mov	w3, 1
+	mov	x12, x7
+	lsl	w3, w3, w4
+	adrp	x4, .LANCHOR70
+	sub	w3, w3, #1
+	ldrb	w6, [x4, #:lo12:.LANCHOR70]
+	and	w3, w3, 65535
+	asr	w4, w0, w8
+	sub	w6, w6, #1
+	and	w6, w6, 65535
+	and	w4, w4, w6
+	and	w4, w4, w3
+.L719:
+	add	x0, x7, x2, lsl 6
+	ldr	w5, [x0, 40]
+	ubfx	x13, x5, 21, 3
+	cmp	w11, w13
+	bne	.L713
+	lsr	w5, w5, w8
+	and	w5, w6, w5
+	and	w5, w3, w5
+	ldrb	w0, [x0, 58]
+	cmp	w4, w5
+	bne	.L714
+	cmp	w1, 1
+	bne	.L711
+	cmp	w0, 6
+	ccmp	w0, 8, 4, ne
+	beq	.L713
+	ret
+.L714:
+	cmp	w1, 3
+	bhi	.L713
+	ldrb	w5, [x10,w1,uxtw]
+	adr	x13, .Lrtx716
+	add	x5, x13, w5, sxtb #2
+	br	x5
+.Lrtx716:
+	.section	.rodata.queue_lun_state,"a",@progbits
+	.align	0
+	.align	2
+.L716:
+	.byte	(.L715 - .Lrtx716) / 4
+	.byte	(.L717 - .Lrtx716) / 4
+	.byte	(.L718 - .Lrtx716) / 4
+	.byte	(.L711 - .Lrtx716) / 4
+	.section	.text.queue_lun_state
+.L715:
+	cmp	w0, 2
+	beq	.L713
+	ret
+.L717:
+	cmp	w0, 6
+	ccmp	w0, 8, 4, ne
+	beq	.L713
+	ret
+.L718:
+	cmp	w0, 10
+	bne	.L711
+.L713:
+	lsl	x2, x2, 6
+	ldrb	w2, [x12, x2]
+	cmp	w2, 255
+	bne	.L719
+.L720:
+	mov	w0, 0
+.L711:
+	ret
+	.size	queue_lun_state, .-queue_lun_state
+	.section	.text.queue_remove_completed_req,"ax",@progbits
+	.align	2
+	.global	queue_remove_completed_req
+	.type	queue_remove_completed_req, %function
+queue_remove_completed_req:
+	adrp	x6, .LANCHOR90
+	ldrb	w2, [x6, #:lo12:.LANCHOR90]
+	cmp	w2, 255
+	beq	.L722
+	adrp	x0, .LANCHOR36
+	lsl	x4, x2, 6
+	add	x5, x0, :lo12:.LANCHOR36
+	add	x3, x5, x4
+	ldrb	w1, [x3, 58]
+	sub	w1, w1, #11
+	and	w1, w1, 255
+	cmp	w1, 1
+	mov	x1, x0
+	bhi	.L722
+	ldrb	w0, [x5, x4]
+	strb	w0, [x6, #:lo12:.LANCHOR90]
+	mov	w0, -1
+	strb	w0, [x5, x4]
+	ldrb	w0, [x3, 59]
+	cmp	w0, 1
+	bne	.L724
+	ldrh	w0, [x3, 50]
+	cbnz	w0, .L725
+	adrp	x0, .LANCHOR88
+	ldrb	w3, [x0, #:lo12:.LANCHOR88]
+	add	x0, x0, :lo12:.LANCHOR88
+.L726:
+	cmp	w3, 255
+	bne	.L730
+	add	x1, x1, :lo12:.LANCHOR36
+	add	x1, x1, x2, lsl 6
+	ldrb	w1, [x1, 1]
+	strb	w1, [x0]
+	ret
+.L725:
+	adrp	x0, .LANCHOR62
+	ldrb	w3, [x0, #:lo12:.LANCHOR62]
+	add	x0, x0, :lo12:.LANCHOR62
+	b	.L726
+.L724:
+	cbnz	w0, .L722
+	ldr	w0, [x3, 36]
+	cmn	w0, #1
+	beq	.L722
+	adrp	x0, .LANCHOR51
+	ldrb	w3, [x0, #:lo12:.LANCHOR51]
+	add	x0, x0, :lo12:.LANCHOR51
+	b	.L726
+.L730:
+	add	x0, x1, :lo12:.LANCHOR36
+.L737:
+	mov	w1, w3
+	sbfiz	x3, x3, 6, 32
+	ldrb	w3, [x0, x3]
+	cmp	w3, 255
+	bne	.L737
+	add	x2, x0, x2, lsl 6
+	sbfiz	x1, x1, 6, 32
+	ldrb	w2, [x2, 1]
+	strb	w2, [x0, x1]
+	ret
+.L722:
+	ret
+	.size	queue_remove_completed_req, .-queue_remove_completed_req
+	.section	.text.pm_alloc_new_blk,"ax",@progbits
+	.align	2
+	.global	pm_alloc_new_blk
+	.type	pm_alloc_new_blk, %function
+pm_alloc_new_blk:
+	stp	x29, x30, [sp, -64]!
+	adrp	x2, .LANCHOR69
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR46
+	stp	x21, x22, [sp, 32]
+	ldr	x1, [x20, #:lo12:.LANCHOR46]
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	ldrh	w0, [x1, 690]
+	str	x23, [sp, 48]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x1, 690]
+	cmp	w2, w0
+	bls	.L739
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x0, 672]
+	mov	w0, 65535
+	cmp	w1, w0
+	bne	.L740
+.L739:
+	adrp	x21, .LC26
+	add	x21, x21, :lo12:.LC26
+	adrp	x23, .LANCHOR59
+.L754:
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	and	w19, w0, 65535
+	bl	ftl_erase_sblk
+	add	x13, x20, :lo12:.LANCHOR46
+	ldr	x1, [x20, #:lo12:.LANCHOR46]
+	mov	w0, w19
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	tst	w0, 65535
+	bne	.L741
+	mov	w1, w19
+	mov	x0, x21
+	bl	printf
+	ldr	x0, [x23, #:lo12:.LANCHOR59]
+	add	x19, x0, x19, uxth 2
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, -32
+	strb	w0, [x19, 2]
+	b	.L754
+.L741:
+	ldr	x1, [x13]
+	adrp	x0, .LANCHOR91
+	mov	w2, 1
+	mov	w3, 65535
+	str	w2, [x0, #:lo12:.LANCHOR91]
+	add	x2, x1, 416
+	mov	w0, 0
+	strh	wzr, [x1, 690]
+.L743:
+	ldrh	w4, [x2]
+	cmp	w4, w3
+	beq	.L742
+	add	w0, w0, 1
+	add	x2, x2, 2
+	cmp	w0, 128
+	bne	.L743
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LC0
+	mov	w2, 188
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L745:
+	b	.L745
+.L746:
+	adrp	x1, .LANCHOR71
+	mov	w2, 21
+	strh	wzr, [x0, 696]
+	ldrh	w1, [x1, #:lo12:.LANCHOR71]
+	strh	w3, [x0, 692]
+	sub	w2, w2, w1
+	asr	w4, w3, w2
+	strh	w4, [x0, 694]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L750
+	mov	w0, 1
+	and	w4, w4, 65535
+	lsl	w2, w0, w2
+	mov	w1, w3
+	adrp	x0, .LC27
+	sub	w2, w2, #1
+	add	x0, x0, :lo12:.LC27
+	bl	printf
+.L750:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L742:
+	add	x0, x1, x0, sxtw 1
+	strh	w19, [x0, 416]
+	ldrh	w0, [x1, 688]
+	add	w0, w0, 1
+	strh	w0, [x1, 688]
+.L740:
+	ldr	x0, [x20, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 690]
+	add	x1, x1, 336
+	ldrh	w3, [x0, x1, lsl 1]
+	mov	w1, 65533
+	sub	w2, w3, #1
+	cmp	w1, w2, uxth
+	bcs	.L746
+	adrp	x1, .LANCHOR92
+	adrp	x0, .LC0
+	mov	w2, 193
+	add	x1, x1, :lo12:.LANCHOR92
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L747:
+	b	.L747
+	.size	pm_alloc_new_blk, .-pm_alloc_new_blk
+	.section	.text.pm_select_ram_region,"ax",@progbits
+	.align	2
+	.global	pm_select_ram_region
+	.type	pm_select_ram_region, %function
+pm_select_ram_region:
+	adrp	x1, .LANCHOR93
+	add	x1, x1, :lo12:.LANCHOR93
+	mov	x2, 0
+	mov	w3, 65535
+.L759:
+	lsl	x4, x2, 4
+	and	w0, w2, 65535
+	ldrh	w4, [x4, x1]
+	cmp	w4, w3
+	beq	.L758
+	add	x2, x2, 1
+	cmp	x2, 32
+	bne	.L759
+	add	x1, x1, 2
+	mov	w0, w2
+	mov	x3, x1
+	mov	w5, 32768
+	mov	w2, 0
+.L761:
+	ldrh	w4, [x3]
+	tbnz	x4, 15, .L760
+	cmp	w4, w5
+	bcs	.L760
+	mov	w5, w4
+	mov	w0, w2
+.L760:
+	add	w2, w2, 1
+	add	x3, x3, 16
+	and	w2, w2, 65535
+	cmp	w2, 32
+	bne	.L761
+	cmp	w0, 32
+	bne	.L758
+	adrp	x2, .LANCHOR94
+	mov	w3, -1
+	ldrb	w4, [x2, #:lo12:.LANCHOR94]
+	mov	w2, 0
+.L763:
+	ldrh	w6, [x1]
+	cmp	w6, w3
+	bcs	.L762
+	ldrh	w5, [x1, -2]
+	cmp	w5, w4
+	csel	w3, w3, w6, eq
+	csel	w0, w0, w2, eq
+.L762:
+	add	w2, w2, 1
+	add	x1, x1, 16
+	and	w2, w2, 65535
+	cmp	w2, 32
+	bne	.L763
+	cmp	w0, 32
+	bne	.L758
+	stp	x29, x30, [sp, -16]!
+	adrp	x1, .LANCHOR95
+	adrp	x0, .LC0
+	mov	w2, 289
+	add	x29, sp, 0
+	add	x1, x1, :lo12:.LANCHOR95
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L764:
+	b	.L764
+.L758:
+	ret
+	.size	pm_select_ram_region, .-pm_select_ram_region
+	.section	.text.ftl_memset,"ax",@progbits
+	.align	2
+	.global	ftl_memset
+	.type	ftl_memset, %function
+ftl_memset:
+	uxtw	x2, w2
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.flash_lsb_page_tbl_build,"ax",@progbits
+	.align	2
+	.global	flash_lsb_page_tbl_build
+	.type	flash_lsb_page_tbl_build, %function
+flash_lsb_page_tbl_build:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR14
+	cbnz	w0, .L773
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	x0, 0
+.L774:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 256
+	bne	.L774
+.L780:
+	adrp	x20, .LANCHOR96
+	add	x20, x20, :lo12:.LANCHOR96
+	mov	w2, 1024
+	mov	w1, 255
+	mov	x0, x20
+	add	x19, x19, :lo12:.LANCHOR14
+	bl	ftl_memset
+	mov	x0, 0
+.L775:
+	ldrh	w1, [x0, x19]
+	add	x0, x0, 2
+	cmp	x0, 512
+	strh	w1, [x20, w1, sxtw 1]
+	bne	.L775
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L773:
+	cmp	w0, 1
+	bne	.L776
+	add	x3, x19, :lo12:.LANCHOR14
+	mov	x1, 0
+.L779:
+	and	w0, w1, 65535
+	cmp	x1, 3
+	bls	.L777
+	ubfiz	w2, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 2
+	sub	w0, w2, w0
+	and	w0, w0, 65535
+.L777:
+	strh	w0, [x3, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L779
+	b	.L780
+.L776:
+	cmp	w0, 2
+	bne	.L781
+	add	x3, x19, :lo12:.LANCHOR14
+	mov	w1, 65535
+	mov	x0, 0
+.L783:
+	cmp	x0, 2
+	and	w2, w0, 65535
+	csel	w2, w2, w1, cc
+	strh	w2, [x3, x0, lsl 1]
+	add	w1, w1, 2
+	add	x0, x0, 1
+	and	w1, w1, 65535
+	cmp	x0, 256
+	bne	.L783
+	b	.L780
+.L781:
+	cmp	w0, 3
+	bne	.L784
+	add	x3, x19, :lo12:.LANCHOR14
+	mov	x1, 0
+.L787:
+	and	w0, w1, 65535
+	cmp	x1, 5
+	bls	.L785
+	ubfiz	w2, w0, 1, 15
+	and	w0, w0, 1
+	add	w0, w0, 4
+	sub	w0, w2, w0
+	and	w0, w0, 65535
+.L785:
+	strh	w0, [x3, x1, lsl 1]
+	add	x1, x1, 1
+	cmp	x1, 256
+	bne	.L787
+	b	.L780
+.L784:
+	cmp	w0, 4
+	bne	.L788
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	w2, 1
+	add	x1, x1, 16
+	strh	wzr, [x19, #:lo12:.LANCHOR14]
+	strh	w0, [x1, -8]
+	mov	w0, 5
+	strh	w2, [x1, -14]
+	mov	w2, 2
+	strh	w0, [x1, -6]
+	mov	w0, 7
+	strh	w2, [x1, -12]
+	mov	w2, 3
+	strh	w0, [x1, -4]
+	mov	w0, 8
+	strh	w2, [x1, -10]
+	strh	w0, [x1, -2]
+	mov	w0, 8
+.L790:
+	and	w3, w0, 1
+	ubfiz	w2, w0, 1, 15
+	add	w3, w3, 6
+	add	w0, w0, 1
+	sub	w2, w2, w3
+	strh	w2, [x1], 2
+	and	w0, w0, 65535
+	cmp	w0, 256
+	bne	.L790
+	b	.L780
+.L788:
+	cmp	w0, 5
+	bne	.L791
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	x0, 0
+.L792:
+	strh	w0, [x1, x0, lsl 1]
+	add	x0, x0, 1
+	cmp	x0, 16
+	bne	.L792
+	add	x1, x1, 32
+.L793:
+	strh	w0, [x1], 2
+	add	w0, w0, 2
+	and	w0, w0, 65535
+	cmp	w0, 496
+	bne	.L793
+	b	.L780
+.L791:
+	cmp	w0, 8
+	bne	.L780
+	add	x1, x19, :lo12:.LANCHOR14
+	mov	x0, 0
+.L794:
+	strh	w0, [x0, x1]
+	add	x0, x0, 2
+	cmp	x0, 512
+	bne	.L794
+	b	.L780
+	.size	flash_lsb_page_tbl_build, .-flash_lsb_page_tbl_build
+	.section	.text.flash_die_info_init,"ax",@progbits
+	.align	2
+	.global	flash_die_info_init
+	.type	flash_die_info_init, %function
+flash_die_info_init:
+	stp	x29, x30, [sp, -80]!
+	mov	w2, 8
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR19
+	add	x19, x23, :lo12:.LANCHOR19
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR13
+	adrp	x26, .LANCHOR8
+	adrp	x22, .LANCHOR10
+	ldrh	w0, [x19, 26]
+	add	x21, x22, :lo12:.LANCHOR10
+	ldrb	w1, [x19, 12]
+	adrp	x24, .LANCHOR98
+	strh	w0, [x25, #:lo12:.LANCHOR13]
+	add	x20, x24, :lo12:.LANCHOR98
+	ldrh	w0, [x19, 10]
+	add	x19, x19, 1
+	strb	wzr, [x26, #:lo12:.LANCHOR8]
+	sdiv	w0, w0, w1
+	adrp	x1, .LANCHOR97
+	strh	w0, [x1, #:lo12:.LANCHOR97]
+	mov	w1, 0
+	mov	x0, x21
+	bl	ftl_memset
+	mov	w2, 32
+	mov	w1, 0
+	mov	x0, x20
+	bl	ftl_memset
+	ldrb	w13, [x23, #:lo12:.LANCHOR19]
+	mov	x7, x23
+	adrp	x14, .LANCHOR26
+	add	x11, x26, :lo12:.LANCHOR8
+	add	x23, x14, :lo12:.LANCHOR26
+	mov	x8, 0
+.L811:
+	mov	w2, w13
+	add	x1, x23, x8, lsl 3
+	mov	x0, x19
+	bl	flash_mem_cmp8
+	cbnz	w0, .L810
+	ldrb	w1, [x11]
+	add	w0, w1, 1
+	strb	w0, [x11]
+	str	wzr, [x20, x1, lsl 2]
+	strb	w8, [x21, x1]
+.L810:
+	add	x8, x8, 1
+	cmp	x8, 4
+	bne	.L811
+	add	x0, x7, :lo12:.LANCHOR19
+	ldrb	w1, [x0, 8]
+	cmp	w1, 2
+	beq	.L812
+.L816:
+	add	x7, x7, :lo12:.LANCHOR19
+	ldrb	w0, [x26, #:lo12:.LANCHOR8]
+	ldp	x19, x20, [sp, 16]
+	ldrb	w1, [x7, 13]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	mul	w0, w0, w1
+	ldrh	w1, [x7, 14]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR99
+	strh	w0, [x1, #:lo12:.LANCHOR99]
+	ret
+.L812:
+	ldrh	w1, [x25, #:lo12:.LANCHOR13]
+	add	x14, x14, :lo12:.LANCHOR26
+	ldrb	w11, [x0, 13]
+	add	x8, x0, 1
+	ldrb	w20, [x0, 23]
+	add	x19, x26, :lo12:.LANCHOR8
+	add	x15, x24, :lo12:.LANCHOR98
+	add	x22, x22, :lo12:.LANCHOR10
+	mov	x12, 0
+	mul	w11, w11, w1
+	ldrh	w1, [x0, 14]
+	and	w1, w1, 65280
+	mul	w11, w11, w1
+	lsl	w21, w11, 1
+.L815:
+	mov	w2, w13
+	add	x1, x14, x12, lsl 3
+	mov	x0, x8
+	bl	flash_mem_cmp8
+	cbnz	w0, .L813
+	ldrb	w1, [x19]
+	cmp	w20, 0
+	csel	w2, w11, w21, eq
+	add	w0, w1, 1
+	strb	w0, [x19]
+	str	w2, [x15, x1, lsl 2]
+	strb	w12, [x22, x1]
+.L813:
+	add	x12, x12, 1
+	cmp	x12, 4
+	bne	.L815
+	b	.L816
+	.size	flash_die_info_init, .-flash_die_info_init
+	.section	.text.FlashReadFacBbtData,"ax",@progbits
+	.align	2
+	.global	FlashReadFacBbtData
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	stp	x29, x30, [sp, -16]!
+	lsr	w2, w2, 3
+	mov	w1, 0
+	add	x29, sp, 0
+	bl	ftl_memset
+	mov	w0, 0
+	ldp	x29, x30, [sp], 16
+	ret
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.lpa_hash_init,"ax",@progbits
+	.align	2
+	.global	lpa_hash_init
+	.type	lpa_hash_init, %function
+lpa_hash_init:
+	stp	x29, x30, [sp, -16]!
+	mov	w2, 512
+	mov	w1, 255
+	adrp	x0, .LANCHOR81
+	add	x29, sp, 0
+	add	x0, x0, :lo12:.LANCHOR81
+	bl	ftl_memset
+	adrp	x0, .LANCHOR79
+	mov	w1, 255
+	ldp	x29, x30, [sp], 16
+	ldrh	w2, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR83
+	ldr	x0, [x0, #:lo12:.LANCHOR83]
+	lsl	w2, w2, 2
+	b	ftl_memset
+	.size	lpa_hash_init, .-lpa_hash_init
+	.section	.text.lpa_rebuild_hash,"ax",@progbits
+	.align	2
+	.global	lpa_rebuild_hash
+	.type	lpa_rebuild_hash, %function
+lpa_rebuild_hash:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR22
+	add	x29, sp, 0
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	tbz	x0, 12, .L828
+	adrp	x1, .LANCHOR100
+	adrp	x0, .LC28
+	mov	w3, 0
+	mov	w2, 190
+	add	x1, x1, :lo12:.LANCHOR100
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.L828:
+	adrp	x20, .LANCHOR79
+	adrp	x22, .LANCHOR69
+	adrp	x19, .LANCHOR81
+	add	x19, x19, :lo12:.LANCHOR81
+	mov	w2, 512
+	mov	w1, 255
+	mov	x0, x19
+	bl	ftl_memset
+	ldrh	w2, [x20, #:lo12:.LANCHOR79]
+	adrp	x21, .LANCHOR83
+	ldrb	w0, [x22, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	add	x20, x20, :lo12:.LANCHOR79
+	mul	w2, w2, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR83]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	adrp	x0, .LANCHOR82
+	ldrb	w3, [x22, #:lo12:.LANCHOR69]
+	ldr	x5, [x21, #:lo12:.LANCHOR83]
+	mov	w1, 0
+	ldr	x4, [x0, #:lo12:.LANCHOR82]
+.L829:
+	ldrh	w0, [x20]
+	mul	w0, w0, w3
+	cmp	w1, w0, lsl 1
+	blt	.L831
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L831:
+	uxtw	x2, w1
+	ldr	w0, [x4, x2, lsl 2]
+	cmn	w0, #1
+	beq	.L830
+	and	x0, x0, 255
+	ldrh	w6, [x19, x0, lsl 1]
+	strh	w1, [x19, x0, lsl 1]
+	strh	w6, [x5, x2, lsl 1]
+.L830:
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	b	.L829
+	.size	lpa_rebuild_hash, .-lpa_rebuild_hash
+	.section	.text.ftl_open_sblk_init,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_init
+	.type	ftl_open_sblk_init, %function
+ftl_open_sblk_init:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR69
+	stp	x21, x22, [sp, 32]
+	mov	x19, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LC26
+	adrp	x23, .LANCHOR79
+	mov	w22, w1
+	add	x23, x23, :lo12:.LANCHOR79
+	add	x20, x20, :lo12:.LANCHOR69
+	add	x21, x21, :lo12:.LC26
+	stp	x25, x26, [sp, 64]
+.L840:
+.L843:
+	mov	w0, w22
+	bl	ftl_alloc_sblk
+	mov	w1, 0
+	and	w24, w0, 65535
+	bl	ftl_erase_sblk
+	add	x1, x19, 16
+	mov	w0, w24
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	ldrh	w1, [x23]
+	cmp	w22, 2
+	strb	w0, [x19, 9]
+	strh	w24, [x19]
+	strh	wzr, [x19, 2]
+	mul	w0, w1, w0
+	strb	wzr, [x19, 5]
+	strh	w0, [x19, 6]
+	strh	wzr, [x19, 10]
+	strb	w22, [x19, 4]
+	beq	.L844
+	ldrb	w0, [x20]
+	mul	w0, w1, w0
+	and	w0, w0, 65535
+.L841:
+	ldrb	w2, [x20]
+	adrp	x26, .LANCHOR56
+	strh	w0, [x19, 12]
+	ubfiz	x25, x24, 1, 16
+	mul	w2, w2, w1
+	adrp	x1, .LANCHOR82
+	ldr	x3, [x1, #:lo12:.LANCHOR82]
+	mov	w1, 255
+	lsl	w2, w2, 2
+	add	x0, x3, x0, uxth 2
+	bl	ftl_memset
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	ldrh	w1, [x19, 6]
+	strh	w1, [x0, x25]
+	ldrb	w0, [x19, 9]
+	cbnz	w0, .L839
+	mov	w1, w24
+	mov	x0, x21
+	bl	printf
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	mov	w1, -1
+	strh	w1, [x0, x25]
+	mov	w0, 7
+	strb	w0, [x19, 4]
+	b	.L843
+.L844:
+	mov	w0, 0
+	b	.L841
+.L839:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_open_sblk_init, .-ftl_open_sblk_init
+	.section	.text.pm_free_sblk,"ax",@progbits
+	.align	2
+	.global	pm_free_sblk
+	.type	pm_free_sblk, %function
+pm_free_sblk:
+	stp	x29, x30, [sp, -368]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR101
+	stp	x21, x22, [sp, 32]
+	ldrh	w0, [x20, #:lo12:.LANCHOR101]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, 128
+	stp	x27, x28, [sp, 80]
+	bls	.L847
+	adrp	x1, .LANCHOR102
+	adrp	x0, .LC0
+	mov	w2, 74
+	add	x1, x1, :lo12:.LANCHOR102
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L848:
+	b	.L848
+.L847:
+	add	x23, x29, 112
+	mov	w2, 256
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	adrp	x24, .LANCHOR46
+	adrp	x0, .LANCHOR71
+	mov	w2, 21
+	ldr	x5, [x24, #:lo12:.LANCHOR46]
+	ldrh	w8, [x0, #:lo12:.LANCHOR71]
+	ldrh	w11, [x20, #:lo12:.LANCHOR101]
+	add	x4, x5, 704
+	sub	w0, w2, w8
+	mov	w2, 1
+	ldrh	w1, [x5, 698]
+	lsl	w2, w2, w0
+	adrp	x0, .LANCHOR70
+	add	x1, x1, 176
+	sub	w2, w2, #1
+	ldrb	w10, [x0, #:lo12:.LANCHOR70]
+	add	x1, x5, x1, lsl 2
+	mov	x27, x0
+.L849:
+	cmp	x4, x1
+	bne	.L853
+	adrp	x1, .LANCHOR69
+	adrp	x0, .LANCHOR79
+	add	x20, x20, :lo12:.LANCHOR101
+	add	x27, x27, :lo12:.LANCHOR70
+	ldrh	w2, [x0, #:lo12:.LANCHOR79]
+	add	x26, x1, :lo12:.LANCHOR69
+	ldrb	w21, [x1, #:lo12:.LANCHOR69]
+	add	x25, x0, :lo12:.LANCHOR79
+	mov	w28, 0
+	mov	w19, 0
+	mul	w21, w21, w2
+	mov	w2, 65535
+	and	w21, w21, 65535
+.L854:
+	ldrh	w0, [x20]
+	cmp	w0, w19
+	bhi	.L859
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 368
+	ret
+.L853:
+	ldr	w0, [x4]
+	add	x6, x5, 416
+	mov	x3, 0
+	lsr	w0, w0, w8
+	and	w0, w0, w2
+	udiv	w0, w0, w10
+	and	w0, w0, 65535
+.L850:
+	cmp	w11, w3, uxth
+	bhi	.L852
+	add	x4, x4, 4
+	b	.L849
+.L852:
+	ldrh	w7, [x6]
+	cmp	w7, w0
+	bne	.L851
+	ldrh	w7, [x23, x3, lsl 1]
+	add	w7, w7, 1
+	strh	w7, [x23, x3, lsl 1]
+.L851:
+	add	x3, x3, 1
+	add	x6, x6, 2
+	b	.L850
+.L859:
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	sxtw	x22, w19
+	add	x0, x22, 208
+	ldrb	w3, [x27]
+	ldrh	w0, [x1, x0, lsl 1]
+	ldrh	w1, [x1, 692]
+	sdiv	w1, w1, w3
+	cmp	w1, w0
+	bne	.L855
+	ldrb	w1, [x26]
+	ldrh	w3, [x25]
+	mul	w1, w1, w3
+	strh	w1, [x23, x22, lsl 1]
+.L855:
+	ldrh	w1, [x23, x22, lsl 1]
+	cmp	w21, w1
+	bls	.L856
+	cbnz	w1, .L860
+.L858:
+	cmp	w0, w2
+	beq	.L857
+	str	w2, [x29, 108]
+	bl	ftl_free_sblk
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	add	x22, x22, 208
+	mov	w1, -1
+	ldr	w2, [x29, 108]
+	strh	w1, [x0, x22, lsl 1]
+	ldrh	w1, [x0, 688]
+	sub	w1, w1, #1
+	strh	w1, [x0, 688]
+	b	.L857
+.L856:
+	cbz	w1, .L858
+.L857:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L854
+.L860:
+	mov	w28, w19
+	mov	w21, w1
+	b	.L857
+	.size	pm_free_sblk, .-pm_free_sblk
+	.section	.text.ftl_memcpy,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	uxtw	x2, w2
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.flash_into_data_init,"ax",@progbits
+	.align	2
+	.global	flash_into_data_init
+	.type	flash_into_data_init, %function
+flash_into_data_init:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 2048
+	mov	w1, 0
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR5
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	mov	w2, 32
+	add	x0, x0, 80
+	str	w1, [x0, -80]
+	mov	w1, 2032
+	str	w1, [x0, -72]
+	mov	w1, 1
+	strh	w1, [x0, -64]
+	adrp	x1, .LANCHOR103
+	add	x1, x1, :lo12:.LANCHOR103
+	bl	ftl_memcpy
+	ldr	x0, [x19, #:lo12:.LANCHOR5]
+	mov	w2, 32
+	ldr	x19, [sp, 16]
+	adrp	x1, .LANCHOR19
+	ldp	x29, x30, [sp], 32
+	add	x1, x1, :lo12:.LANCHOR19
+	add	x0, x0, 48
+	b	ftl_memcpy
+	.size	flash_into_data_init, .-flash_into_data_init
+	.section	.text.ftl_memcpy32,"ax",@progbits
+	.align	2
+	.global	ftl_memcpy32
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
+	mov	x3, 0
+.L866:
+	cmp	w2, w3
+	bhi	.L867
+	ret
+.L867:
+	ldr	w4, [x1, x3, lsl 2]
+	str	w4, [x0, x3, lsl 2]
+	add	x3, x3, 1
+	b	.L866
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.ftl_memcmp,"ax",@progbits
+	.align	2
+	.global	ftl_memcmp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	uxtw	x2, w2
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",@progbits
+	.align	2
+	.global	rknand_get_clk_rate
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	mov	w0, 19712
+	movk	w0, 0x8d2, lsl 16
+	ret
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",@progbits
+	.align	2
+	.global	ftl_malloc
+	.type	ftl_malloc, %function
+ftl_malloc:
+	mov	w1, 0
+	sxtw	x0, w0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.nandc_init,"ax",@progbits
+	.align	2
+	.global	nandc_init
+	.type	nandc_init, %function
+nandc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x1, .LANCHOR7
+	mov	w2, 6
+	add	x29, sp, 0
+	strb	w2, [x1, #:lo12:.LANCHOR7]
+	adrp	x2, .LANCHOR6
+	str	wzr, [x29, 24]
+	str	x0, [x2, #:lo12:.LANCHOR6]
+	mov	w2, 12336
+	ldr	w3, [x0, 352]
+	movk	w2, 0x5638, lsl 16
+	cmp	w3, w2
+	bne	.L872
+	mov	w2, 8
+	strb	w2, [x1, #:lo12:.LANCHOR7]
+.L872:
+	ldr	w3, [x0, 128]
+	mov	w2, 12336
+	movk	w2, 0x5639, lsl 16
+	cmp	w3, w2
+	bne	.L873
+	mov	w2, 9
+	strb	w2, [x1, #:lo12:.LANCHOR7]
+.L873:
+	ldrb	w1, [x1, #:lo12:.LANCHOR7]
+	cmp	w1, 9
+	adrp	x1, .LANCHOR28
+	bne	.L874
+	mov	w2, 1
+	strb	w2, [x1, #:lo12:.LANCHOR28]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 520]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 8]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 80]
+	mov	w1, 38
+	str	w1, [x0, 84]
+	mov	w1, 39
+	str	w1, [x0, 84]
+.L875:
+	adrp	x0, .LANCHOR29
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR29]
+	adrp	x0, .LANCHOR31
+	strh	wzr, [x0, #:lo12:.LANCHOR31]
+	adrp	x0, .LANCHOR27
+	strb	wzr, [x0, #:lo12:.LANCHOR27]
+	ldp	x29, x30, [sp], 32
+	ret
+.L874:
+	strb	wzr, [x1, #:lo12:.LANCHOR28]
+	ldr	w1, [x29, 24]
+	orr	w1, w1, 256
+	str	w1, [x29, 24]
+	ldr	w1, [x29, 24]
+	str	w1, [x0]
+	str	wzr, [x0, 336]
+	mov	w1, 4225
+	str	w1, [x0, 4]
+	mov	w1, 8321
+	str	w1, [x0, 344]
+	mov	w1, 4099
+	movk	w1, 0x10, lsl 16
+	str	w1, [x0, 304]
+	mov	w1, 38
+	str	w1, [x0, 308]
+	mov	w1, 39
+	str	w1, [x0, 308]
+	mov	w0, 2048
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR30
+	str	x0, [x1, #:lo12:.LANCHOR30]
+	b	.L875
+	.size	nandc_init, .-nandc_init
+	.section	.text.buf_init,"ax",@progbits
+	.align	2
+	.global	buf_init
+	.type	buf_init, %function
+buf_init:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR36
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	add	x19, x0, :lo12:.LANCHOR36
+	stp	x21, x22, [sp, 32]
+	mov	x20, x0
+	adrp	x22, .LANCHOR45
+	add	x22, x22, :lo12:.LANCHOR45
+	mov	w21, 0
+.L878:
+	and	w0, w21, 255
+	strb	w0, [x19, 1]
+	add	w1, w0, 1
+	ldrb	w0, [x22]
+	strb	w1, [x19]
+	add	w21, w21, 1
+	strb	wzr, [x19, 2]
+	add	x19, x19, 64
+	str	xzr, [x19, -48]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, -56]
+	ldrb	w0, [x22]
+	lsl	w0, w0, 1
+	bl	ftl_malloc
+	str	x0, [x19, -40]
+	cmp	w21, 32
+	bne	.L878
+	add	x0, x20, :lo12:.LANCHOR36
+	mov	w1, -1
+	strb	w1, [x0, 1984]
+	adrp	x0, .LANCHOR37
+	strb	wzr, [x0, #:lo12:.LANCHOR37]
+	adrp	x0, .LANCHOR38
+	ldp	x19, x20, [sp, 16]
+	strb	w21, [x0, #:lo12:.LANCHOR38]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	buf_init, .-buf_init
+	.section	.text.gc_init,"ax",@progbits
+	.align	2
+	.global	gc_init
+	.type	gc_init, %function
+gc_init:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR67
+	mov	w2, 328
+	mov	w1, 0
+	add	x29, sp, 0
+	strb	wzr, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR104
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR58
+	add	x19, x20, :lo12:.LANCHOR58
+	strb	wzr, [x0, #:lo12:.LANCHOR104]
+	mov	x0, x19
+	bl	ftl_memset
+	mov	w0, -1
+	strh	w0, [x20, #:lo12:.LANCHOR58]
+	adrp	x0, .LANCHOR79
+	str	xzr, [x19, 8]
+	adrp	x4, .LANCHOR105
+	adrp	x20, .LANCHOR68
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
+	lsr	w3, w1, 1
+	lsr	w0, w1, 2
+	strh	w3, [x19, 38]
+	strh	w0, [x19, 36]
+	adrp	x19, .LANCHOR69
+	ldrb	w2, [x19, #:lo12:.LANCHOR69]
+	mul	w1, w1, w2
+	sub	w1, w1, #32
+	strh	w1, [x4, #:lo12:.LANCHOR105]
+	adrp	x1, .LANCHOR106
+	strh	w3, [x1, #:lo12:.LANCHOR106]
+	adrp	x1, .LANCHOR57
+	strh	w0, [x1, #:lo12:.LANCHOR57]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w2
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR107
+	str	x0, [x1, #:lo12:.LANCHOR107]
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR108
+	str	x0, [x1, #:lo12:.LANCHOR108]
+	ldrh	w1, [x20, #:lo12:.LANCHOR68]
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mul	w0, w1, w0
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR65
+	str	x0, [x1, #:lo12:.LANCHOR65]
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR61
+	str	x0, [x1, #:lo12:.LANCHOR61]
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR109
+	ldp	x19, x20, [sp, 16]
+	str	x0, [x1, #:lo12:.LANCHOR109]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	gc_init, .-gc_init
+	.section	.text.ftl_free,"ax",@progbits
+	.align	2
+	.global	ftl_free
+	.type	ftl_free, %function
+ftl_free:
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.js_hash,"ax",@progbits
+	.align	2
+	.global	js_hash
+	.type	js_hash, %function
+js_hash:
+	mov	x4, x0
+	mov	w0, 42982
+	mov	x3, 0
+	movk	w0, 0x47c6, lsl 16
+.L885:
+	cmp	w1, w3
+	bhi	.L886
+	ret
+.L886:
+	lsr	w2, w0, 2
+	ldrb	w5, [x4, x3]
+	add	w2, w2, w0, lsl 5
+	add	x3, x3, 1
+	add	w2, w2, w5
+	eor	w0, w0, w2
+	b	.L885
+	.size	js_hash, .-js_hash
+	.section	.text.timer_get_time,"ax",@progbits
+	.align	2
+	.global	timer_get_time
+	.type	timer_get_time, %function
+timer_get_time:
+	mov	w0, 0
+	ret
+	.size	timer_get_time, .-timer_get_time
+	.section	.text.FlashCs123Init,"ax",@progbits
+	.align	2
+	.global	FlashCs123Init
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	ret
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",@progbits
+	.align	2
+	.global	rk_nand_de_init
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",@progbits
+	.align	2
+	.global	rk_ftl_get_capacity
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	adrp	x0, .LANCHOR52
+	ldr	w0, [x0, #:lo12:.LANCHOR52]
+	ret
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",@progbits
+	.align	2
+	.global	rknand_print_hex
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LC30
+	stp	x23, x24, [sp, 48]
+	mov	x22, x1
+	stp	x25, x26, [sp, 64]
+	adrp	x23, .LC29
+	mov	x26, x0
+	mov	w24, w2
+	uxtw	x25, w3
+	add	x23, x23, :lo12:.LC29
+	add	x21, x21, :lo12:.LC30
+	stp	x19, x20, [sp, 16]
+	str	x27, [sp, 80]
+	mov	x19, 0
+	mov	w20, 0
+	adrp	x27, .LC31
+.L892:
+	cmp	x25, x19
+	bne	.L898
+	ldp	x19, x20, [sp, 16]
+	adrp	x1, .LC31
+	ldp	x21, x22, [sp, 32]
+	add	x1, x1, :lo12:.LC31
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC32
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC32
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L898:
+	cbnz	w20, .L893
+	mov	w2, w19
+	mov	x1, x26
+	mov	x0, x23
+	bl	printf
+.L893:
+	cmp	w24, 4
+	bne	.L894
+	ldr	w1, [x22, x19, lsl 2]
+.L900:
+	mov	x0, x21
+	add	w20, w20, 1
+	bl	printf
+	cmp	w20, 15
+	bls	.L897
+	mov	w20, 0
+	add	x1, x27, :lo12:.LC31
+	adrp	x0, .LC32
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+.L897:
+	add	x19, x19, 1
+	b	.L892
+.L894:
+	cmp	w24, 2
+	bne	.L896
+	ldrsh	w1, [x22, x19, lsl 1]
+	b	.L900
+.L896:
+	ldrb	w1, [x22, x19]
+	b	.L900
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.hynix_get_read_retry_default,"ax",@progbits
+	.align	2
+	.global	hynix_get_read_retry_default
+	.type	hynix_get_read_retry_default, %function
+hynix_get_read_retry_default:
+	stp	x29, x30, [sp, -144]!
+	mov	w2, -83
+	mov	w1, -82
+	add	x29, sp, 0
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	str	w0, [x29, 140]
+	adrp	x0, .LANCHOR5
+	stp	x19, x20, [sp, 16]
+	ldr	x28, [x0, #:lo12:.LANCHOR5]
+	stp	x23, x24, [sp, 48]
+	add	x0, x28, 112
+	str	x0, [x29, 112]
+	ldrb	w0, [x29, 140]
+	add	x22, x28, 128
+	stp	x25, x26, [sp, 64]
+	strb	w0, [x28, 112]
+	mov	w0, -84
+	ldr	w3, [x29, 140]
+	strb	w0, [x28, 128]
+	mov	w0, -81
+	strb	w2, [x28, 129]
+	cmp	w3, 2
+	strb	w1, [x28, 130]
+	strb	w0, [x28, 131]
+	bne	.L902
+	mov	w0, -89
+	strb	w0, [x28, 128]
+	adrp	x0, .LANCHOR110+17
+	mov	w1, -9
+	strb	w1, [x0, #:lo12:.LANCHOR110+17]
+.L957:
+	mov	w0, 7
+	b	.L992
+.L902:
+	ldr	w3, [x29, 140]
+	cmp	w3, 3
+	bne	.L904
+	mov	x6, 0
+.L905:
+	sub	w0, w6, #80
+	strb	w0, [x22, x6]
+	add	x6, x6, 1
+	cmp	x6, 8
+	bne	.L905
+	stp	w6, w6, [x29, 132]
+.L903:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #1
+	cmp	w0, 1
+	bhi	.L910
+	adrp	x7, .LANCHOR8
+	adrp	x11, .LANCHOR10
+	add	x24, x7, :lo12:.LANCHOR8
+	add	x25, x11, :lo12:.LANCHOR10
+	mov	w20, 0
+	mov	w26, 55
+.L911:
+	ldrb	w0, [x24]
+	cmp	w0, w20
+	bhi	.L917
+.L918:
+	ldr	x0, [x29, 112]
+	ldrb	w1, [x29, 136]
+	strb	w1, [x0, 1]
+	ldrb	w1, [x29, 132]
+	strb	w1, [x0, 2]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L904:
+	ldr	w3, [x29, 140]
+	cmp	w3, 4
+	bne	.L906
+	mov	w3, -52
+	strb	w3, [x28, 128]
+	mov	w3, -65
+	strb	w3, [x28, 129]
+	mov	w3, -86
+	strb	w3, [x28, 130]
+	mov	w3, -85
+	strb	w0, [x28, 135]
+	strb	w3, [x28, 131]
+	mov	w0, 8
+	mov	w3, -51
+	strb	w2, [x28, 133]
+	strb	w3, [x28, 132]
+	strb	w1, [x28, 134]
+	str	w0, [x29, 132]
+.L993:
+	str	w0, [x29, 136]
+	b	.L903
+.L906:
+	ldr	w0, [x29, 140]
+	cmp	w0, 5
+	bne	.L907
+	mov	w0, 56
+	strb	w0, [x28, 128]
+	mov	w0, 57
+	strb	w0, [x28, 129]
+	mov	w0, 58
+	strb	w0, [x28, 130]
+	mov	w0, 59
+	strb	w0, [x28, 131]
+	mov	w0, 8
+.L992:
+	str	w0, [x29, 132]
+	mov	w0, 4
+	b	.L993
+.L907:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	bne	.L908
+	mov	w0, 14
+	strb	w0, [x28, 128]
+	mov	w0, 15
+	strb	w0, [x28, 129]
+	mov	w0, 16
+	strb	w0, [x28, 130]
+	mov	w0, 17
+	strb	w0, [x28, 131]
+	mov	w0, 12
+	b	.L992
+.L908:
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	bne	.L957
+	mov	x0, 0
+.L909:
+	sub	w1, w0, #80
+	strb	w1, [x22, x0]
+	add	x0, x0, 1
+	cmp	x0, 8
+	bne	.L909
+	mov	w0, -44
+	strb	w0, [x28, 136]
+	mov	w0, -43
+	strb	w0, [x28, 137]
+	mov	w0, 12
+	str	w0, [x29, 132]
+	mov	w0, 10
+	b	.L993
+.L917:
+	ldrb	w0, [x25, w20, sxtw]
+	mov	x1, 32
+	mov	w2, 160
+	mov	x21, 0
+	umaddl	x2, w2, w0, x1
+	ldr	x1, [x29, 112]
+	ubfiz	x0, x0, 8, 8
+	add	x19, x1, x2
+	adrp	x1, .LANCHOR6
+	ldr	x4, [x1, #:lo12:.LANCHOR6]
+	add	x23, x4, x0
+.L912:
+	str	w26, [x23, 2056]
+	ldrb	w0, [x22, x21]
+	str	w0, [x23, 2052]
+	mov	w0, 80
+	bl	timer_delay_ns
+	ldr	w0, [x23, 2048]
+	strb	w0, [x19, x21]
+	add	x21, x21, 1
+	ldr	w0, [x29, 136]
+	cmp	w0, w21, uxtb
+	bhi	.L912
+	adrp	x3, .LANCHOR110
+	add	x3, x3, :lo12:.LANCHOR110
+	mov	x0, 0
+.L915:
+	add	x15, x19, x0
+	add	x14, x3, x0
+	mov	x1, 1
+.L914:
+	lsl	x4, x1, 2
+	lsl	x16, x1, 3
+	ldrb	w17, [x19, x0]
+	add	x1, x1, 1
+	cmp	x1, 7
+	ldrb	w4, [x14, x4]
+	add	w4, w4, w17
+	strb	w4, [x15, x16]
+	bne	.L914
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L915
+	add	w5, w20, 1
+	strb	wzr, [x19, 16]
+	strb	wzr, [x19, 24]
+	and	w20, w5, 255
+	strb	wzr, [x19, 32]
+	strb	wzr, [x19, 40]
+	strb	wzr, [x19, 48]
+	strb	wzr, [x19, 41]
+	strb	wzr, [x19, 49]
+	b	.L911
+.L910:
+	ldr	w0, [x29, 140]
+	sub	w0, w0, #3
+	cmp	w0, 4
+	bhi	.L918
+	ldp	w0, w1, [x29, 132]
+	adrp	x19, .LANCHOR8
+	add	x19, x19, :lo12:.LANCHOR8
+	sub	w13, w1, #1
+	mul	w15, w0, w1
+	and	x13, x13, 255
+	asr	w0, w15, 2
+	stp	w0, wzr, [x29, 124]
+	lsl	w0, w15, 4
+	str	w0, [x29, 120]
+	ldr	w0, [x29, 124]
+	lsl	w22, w0, 1
+	sbfiz	x21, x0, 2, 32
+	ldr	w0, [x29, 140]
+	sub	w20, w0, #5
+	add	x0, x13, 1
+	str	x0, [x29, 96]
+.L919:
+	ldrb	w0, [x19]
+	ldr	w1, [x29, 128]
+	cmp	w0, w1
+	bls	.L918
+	ldr	w1, [x29, 128]
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	mov	w10, 160
+	mov	w23, 255
+	ldrb	w4, [x0, w1, sxtw]
+	mov	x0, 32
+	umaddl	x10, w10, w4, x0
+	ldr	x0, [x29, 112]
+	ubfiz	x4, x4, 8, 8
+	add	x0, x0, x10
+	str	x0, [x29, 104]
+	adrp	x0, .LANCHOR6
+	ldr	x0, [x0, #:lo12:.LANCHOR6]
+	add	x27, x0, x4
+	str	w23, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldr	w0, [x29, 140]
+	cmp	w0, 4
+	bne	.L920
+	mov	w0, 64
+	str	w23, [x27, 2052]
+	str	w0, [x27, 2048]
+	mov	w0, 204
+.L994:
+	str	w0, [x27, 2052]
+	mov	w0, 77
+	b	.L995
+.L920:
+	cmp	w20, 1
+	bhi	.L922
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	mov	w0, 82
+.L995:
+	str	w0, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 23
+	str	w0, [x27, 2056]
+	mov	w0, 4
+	str	w0, [x27, 2056]
+	mov	w0, 25
+	str	w0, [x27, 2056]
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	ldr	w0, [x29, 140]
+	str	wzr, [x27, 2052]
+	cmp	w0, 6
+	bne	.L923
+	mov	w0, 31
+	str	w0, [x27, 2052]
+.L924:
+	mov	w23, 2
+	str	w23, [x27, 2052]
+	str	wzr, [x27, 2052]
+	mov	w0, 48
+	str	w0, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w20, 1
+	bls	.L958
+	ldr	w0, [x29, 140]
+	cmp	w0, 7
+	mov	w0, 32
+	csel	w23, w23, w0, ne
+.L925:
+	adrp	x3, .LANCHOR111
+	mov	x1, 0
+	ldr	x0, [x3, #:lo12:.LANCHOR111]
+.L926:
+	ldr	w2, [x27, 2048]
+	strb	w2, [x0, x1]
+	add	x1, x1, 1
+	cmp	w23, w1, uxtb
+	bhi	.L926
+	ldr	w1, [x29, 140]
+	cmp	w1, 7
+	bne	.L927
+	mov	w1, 0
+.L929:
+	ldrb	w2, [x0]
+	cmp	w2, 12
+	beq	.L928
+	ldrb	w2, [x0, 1]
+	cmp	w2, 10
+	beq	.L928
+	add	w1, w1, 1
+	add	x0, x0, 4
+	and	w1, w1, 255
+	cmp	w1, 8
+	bne	.L929
+.L930:
+	adrp	x0, .LC33
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L932:
+	b	.L932
+.L922:
+	mov	w0, 174
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 176
+	b	.L994
+.L923:
+	str	wzr, [x27, 2052]
+	b	.L924
+.L958:
+	mov	w23, 16
+	b	.L925
+.L928:
+	cmp	w1, 6
+	bhi	.L930
+.L931:
+	ldr	x2, [x3, #:lo12:.LANCHOR111]
+	mov	x0, 0
+.L936:
+	ldr	w1, [x29, 120]
+	cmp	w1, w0
+	bgt	.L937
+	ldr	x1, [x3, #:lo12:.LANCHOR111]
+	mov	w16, 8
+	add	x3, x1, x21
+.L939:
+	mov	x0, 0
+.L938:
+	ldr	w17, [x3, x0, lsl 2]
+	ldr	w4, [x29, 124]
+	mvn	w17, w17
+	str	w17, [x3, x0, lsl 2]
+	add	x0, x0, 1
+	cmp	w4, w0
+	bgt	.L938
+	add	x3, x3, x22, uxtw 2
+	subs	w16, w16, #1
+	bne	.L939
+	mov	x17, x1
+	mov	w23, 0
+	mov	w26, 1
+.L940:
+	mov	w3, 0
+	mov	w0, 0
+.L944:
+	mov	x25, x17
+	lsl	w16, w26, w0
+	mov	w24, 16
+	mov	w30, 0
+.L942:
+	ldr	w4, [x25]
+	add	x25, x25, x21
+	bics	wzr, w16, w4
+	cinc	w30, w30, eq
+	subs	w24, w24, #1
+	bne	.L942
+	cmp	w30, 9
+	orr	w16, w3, w16
+	add	w0, w0, 1
+	csel	w3, w16, w3, cs
+	cmp	w0, 32
+	bne	.L944
+	ldr	w0, [x29, 124]
+	add	w23, w23, 1
+	str	w3, [x17], 4
+	cmp	w0, w23
+	bgt	.L940
+	mov	x0, 0
+	mov	w3, 0
+.L947:
+	ldr	w16, [x1, x0]
+	add	x0, x0, 4
+	cmp	w16, 0
+	cinc	w3, w3, eq
+	cmp	x0, 32
+	bne	.L947
+	cmp	w3, 7
+	ble	.L948
+	mov	w3, 1024
+	mov	w2, 1
+	adrp	x0, .LC34
+	add	x0, x0, :lo12:.LC34
+	bl	rknand_print_hex
+	adrp	x0, .LC33
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L949:
+	b	.L949
+.L927:
+	ldr	w1, [x29, 140]
+	cmp	w1, 6
+	bne	.L931
+	mov	x1, 0
+.L933:
+	ldrb	w2, [x0, x1]
+	cmp	w2, 12
+	beq	.L931
+	add	x2, x0, x1
+	ldrb	w2, [x2, 8]
+	cmp	w2, 4
+	beq	.L931
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L933
+	adrp	x0, .LC33
+	mov	w1, 0
+	add	x0, x0, :lo12:.LC33
+	bl	printf
+.L935:
+	b	.L935
+.L937:
+	ldr	w1, [x27, 2048]
+	strb	w1, [x2, x0]
+	add	x0, x0, 1
+	b	.L936
+.L948:
+	ldr	w0, [x29, 140]
+	cmp	w0, 6
+	beq	.L960
+	cmp	w0, 7
+	mov	x1, 10
+	mov	x0, 8
+	csel	x0, x0, x1, ne
+.L950:
+	ldr	x10, [x29, 104]
+	mov	w3, 0
+.L951:
+	mov	x1, 0
+.L952:
+	ldrb	w16, [x2, x1]
+	ldr	w4, [x29, 136]
+	strb	w16, [x10, x1]
+	add	x1, x1, 1
+	cmp	w4, w1, uxtb
+	bhi	.L952
+	ldr	x1, [x29, 96]
+	add	w3, w3, 1
+	add	x10, x10, x0
+	add	x2, x2, x1
+	ldr	w1, [x29, 132]
+	cmp	w1, w3
+	bgt	.L951
+	mov	w23, 255
+	str	w23, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	cmp	w20, 1
+	bhi	.L954
+	mov	w0, 54
+	str	w0, [x27, 2056]
+	ldrb	w0, [x28, 128]
+	str	w0, [x27, 2052]
+	str	wzr, [x27, 2048]
+	mov	w0, 22
+	str	w0, [x27, 2056]
+	mov	w0, 48
+	str	wzr, [x27, 2056]
+	str	wzr, [x27, 2052]
+	str	wzr, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+	str	w23, [x27, 2052]
+.L996:
+	str	w0, [x27, 2056]
+	bl	nandc_wait_flash_ready
+	ldr	w0, [x29, 128]
+	add	w11, w0, 1
+	and	w0, w11, 255
+	str	w0, [x29, 128]
+	b	.L919
+.L960:
+	mov	x0, 4
+	b	.L950
+.L954:
+	mov	w0, 56
+	b	.L996
+	.size	hynix_get_read_retry_default, .-hynix_get_read_retry_default
+	.section	.text.flash_get_read_retry_tbl,"ax",@progbits
+	.align	2
+	.global	flash_get_read_retry_tbl
+	.type	flash_get_read_retry_tbl, %function
+flash_get_read_retry_tbl:
+	adrp	x0, .LANCHOR19+19
+	ldrb	w0, [x0, #:lo12:.LANCHOR19+19]
+	sub	w1, w0, #1
+	and	w1, w1, 255
+	cmp	w1, 6
+	bhi	.L997
+	b	hynix_get_read_retry_default
+.L997:
+	ret
+	.size	flash_get_read_retry_tbl, .-flash_get_read_retry_tbl
+	.section	.text.nandc_xfer_done,"ax",@progbits
+	.align	2
+	.global	nandc_xfer_done
+	.type	nandc_xfer_done, %function
+nandc_xfer_done:
+	stp	x29, x30, [sp, -80]!
+	adrp	x0, .LANCHOR7
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR6
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	cmp	w0, 9
+	ldr	x20, [x19, #:lo12:.LANCHOR6]
+	bne	.L1000
+	ldr	w0, [x20, 16]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 48]
+	tbnz	x0, 1, .L1001
+	adrp	x22, .LC37
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC37
+	add	x23, x23, :lo12:.LC36
+.L1002:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1005
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 16]
+	str	w0, [x29, 64]
+	bne	.L1002
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 64]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1002
+.L1001:
+	adrp	x22, .LC35
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC35
+	add	x23, x23, :lo12:.LC36
+.L1003:
+	ldr	w1, [x20, 64]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 6
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	blt	.L1007
+.L1005:
+	adrp	x0, .LANCHOR30+32
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	str	wzr, [x0, #:lo12:.LANCHOR30+32]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1007:
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1004
+	ldr	w0, [x29, 72]
+	tbnz	x0, 17, .L1005
+.L1004:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1003
+	ldr	w2, [x20, 64]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1003
+.L1000:
+	ldr	w0, [x20, 8]
+	mov	w21, 0
+	str	w0, [x29, 64]
+	ldr	w0, [x20, 16]
+	tbnz	x0, 1, .L1011
+	adrp	x22, .LC37
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC37
+	add	x23, x23, :lo12:.LC36
+.L1012:
+	ldr	w0, [x29, 64]
+	tbnz	x0, 20, .L1005
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	add	w21, w21, 1
+	tst	x21, 16777215
+	ldr	w0, [x0, 8]
+	str	w0, [x29, 64]
+	bne	.L1012
+	ldr	w2, [x29, 64]
+	mov	w1, w21
+	ldr	w3, [x20, 28]
+	mov	x0, x22
+	ubfx	x3, x3, 16, 5
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1012
+.L1011:
+	adrp	x22, .LC35
+	adrp	x23, .LC36
+	add	x22, x22, :lo12:.LC35
+	add	x23, x23, :lo12:.LC36
+.L1013:
+	ldr	w1, [x20, 28]
+	ldr	w0, [x29, 64]
+	ubfx	x1, x1, 16, 5
+	ubfx	x0, x0, 22, 6
+	cmp	w1, w0
+	bge	.L1005
+	ldr	x0, [x19, #:lo12:.LANCHOR6]
+	ldr	w0, [x0]
+	str	w0, [x29, 72]
+	ldr	w0, [x29, 72]
+	tbz	x0, 13, .L1014
+	ldr	w0, [x29, 72]
+	tbz	x0, 17, .L1014
+	ldr	w1, [x29, 72]
+	adrp	x0, .LC38
+	add	x0, x0, :lo12:.LC38
+	bl	printf
+	b	.L1005
+.L1014:
+	add	w21, w21, 1
+	tst	x21, 16777215
+	bne	.L1013
+	ldr	w2, [x20, 28]
+	mov	w1, w21
+	ldr	w3, [x29, 64]
+	mov	x0, x22
+	ubfx	x2, x2, 16, 5
+	ubfx	x3, x3, 22, 6
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR6]
+	mov	w3, 256
+	mov	w2, 4
+	mov	x0, x23
+	bl	rknand_print_hex
+	b	.L1013
+	.size	nandc_xfer_done, .-nandc_xfer_done
+	.section	.text.nandc_xfer,"ax",@progbits
+	.align	2
+	.global	nandc_xfer
+	.type	nandc_xfer, %function
+nandc_xfer:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w2, 255
+	stp	x21, x22, [sp, 32]
+	and	w22, w1, 255
+	mov	x21, x3
+	mov	w1, w19
+	mov	x3, x4
+	mov	x2, x21
+	mov	w0, w22
+	mov	x20, x4
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	cbnz	w22, .L1052
+	adrp	x0, .LANCHOR7
+	ldrb	w0, [x0, #:lo12:.LANCHOR7]
+	cmp	w0, 9
+	bne	.L1036
+	adrp	x1, .LANCHOR6
+	lsr	w19, w19, 2
+	mov	x20, x1
+	mov	w3, 1
+	ldr	x5, [x1, #:lo12:.LANCHOR6]
+	mov	w2, 0
+	mov	w0, 0
+.L1037:
+	cmp	w2, w19
+	bcc	.L1041
+	ldr	w19, [x5]
+	cmp	w3, 0
+	mov	w1, 512
+	csel	w0, w0, w1, eq
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1035
+	mov	w1, w19
+	adrp	x0, .LC39
+	add	x0, x0, :lo12:.LC39
+	bl	printf
+	ldr	x0, [x20, #:lo12:.LANCHOR6]
+	orr	w19, w19, 131072
+.L1065:
+	str	w19, [x0]
+	mov	w0, -1
+.L1035:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1041:
+	uxtw	x1, w2
+	add	x1, x1, 84
+	ldr	w1, [x5, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	ldr	w4, [x29, 56]
+	ubfx	x4, x4, 26, 1
+	and	w1, w4, w1, lsr 10
+	and	w3, w3, w1
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1054
+	ldr	w1, [x29, 56]
+	tbnz	x1, 18, .L1054
+	ldr	w4, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x4, x4, 3, 7
+	ubfx	x1, x1, 19, 7
+	cmp	w4, w1
+	ldr	w1, [x29, 56]
+	ble	.L1039
+	ubfx	x1, x1, 3, 7
+.L1040:
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1038:
+	add	w2, w2, 1
+	b	.L1037
+.L1039:
+	ubfx	x1, x1, 19, 7
+	b	.L1040
+.L1054:
+	mov	w0, -1
+	b	.L1038
+.L1036:
+	adrp	x0, .LANCHOR27
+	lsr	w4, w19, 1
+	mov	w3, 64
+	mov	w1, 1
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	mov	w2, 0
+	adrp	x6, .LANCHOR30
+	cmp	w0, 25
+	mov	w0, 128
+	csel	w3, w3, w0, cc
+	mov	w0, 0
+.L1044:
+	add	w5, w3, w0
+	cmp	w2, w4
+	bcc	.L1045
+	adrp	x22, .LANCHOR6
+	lsr	w19, w19, 2
+	mov	w3, 0
+	mov	w0, 0
+	ldr	x4, [x22, #:lo12:.LANCHOR6]
+.L1046:
+	cmp	w3, w19
+	bcc	.L1050
+	str	wzr, [x4, 16]
+	cmn	w0, #1
+	beq	.L1051
+	ldr	w1, [x20]
+	cmn	w1, #1
+	bne	.L1051
+	ldr	w1, [x20, 4]
+	cmn	w1, #1
+	bne	.L1051
+	ldr	w1, [x21]
+	cmn	w1, #1
+	mov	w1, 512
+	csel	w0, w0, w1, ne
+.L1051:
+	ldr	w19, [x4]
+	mov	w1, 8192
+	movk	w1, 0x2, lsl 16
+	and	w1, w19, w1
+	cmp	w1, 139264
+	bne	.L1035
+	mov	w1, w19
+	adrp	x0, .LC40
+	add	x0, x0, :lo12:.LC40
+	bl	printf
+	orr	w19, w19, 131072
+	ldr	x0, [x22, #:lo12:.LANCHOR6]
+	b	.L1065
+.L1045:
+	ldr	x7, [x6, #:lo12:.LANCHOR30]
+	and	x0, x0, 4294967292
+	ldr	w0, [x7, x0]
+	lsl	w7, w2, 2
+	add	w2, w2, 1
+	strb	w0, [x20, x7]
+	lsr	w7, w0, 8
+	strb	w7, [x20, w1, uxtw]
+	add	w7, w1, 1
+	lsr	w8, w0, 16
+	lsr	w0, w0, 24
+	strb	w8, [x20, x7]
+	add	w7, w1, 2
+	add	w1, w1, 4
+	strb	w0, [x20, x7]
+	mov	w0, w5
+	b	.L1044
+.L1050:
+	uxtw	x1, w3
+	add	x1, x1, 8
+	ldr	w1, [x4, x1, lsl 2]
+	str	w1, [x29, 56]
+	ldr	w1, [x29, 56]
+	tbnz	x1, 2, .L1057
+	ldr	w1, [x29, 56]
+	tbnz	x1, 15, .L1057
+	ldr	w2, [x29, 56]
+	ubfx	x6, x2, 3, 5
+	ldr	w2, [x29, 56]
+	ldr	w1, [x29, 56]
+	ubfx	x2, x2, 27, 1
+	ubfx	x5, x1, 16, 5
+	ldr	w1, [x29, 56]
+	orr	w2, w6, w2, lsl 5
+	ubfx	x1, x1, 29, 1
+	orr	w1, w5, w1, lsl 5
+	cmp	w2, w1
+	ldr	w1, [x29, 56]
+	bls	.L1048
+	ubfx	x2, x1, 3, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 27, 1
+.L1064:
+	orr	w1, w2, w1, lsl 5
+	cmp	w0, w1
+	csel	w0, w0, w1, cs
+.L1047:
+	add	w3, w3, 1
+	b	.L1046
+.L1048:
+	ubfx	x2, x1, 16, 5
+	ldr	w1, [x29, 56]
+	ubfx	x1, x1, 29, 1
+	b	.L1064
+.L1057:
+	mov	w0, -1
+	b	.L1047
+.L1052:
+	mov	w0, 0
+	b	.L1035
+	.size	nandc_xfer, .-nandc_xfer
+	.section	.text.flash_read_page,"ax",@progbits
+	.align	2
+	.global	flash_read_page
+	.type	flash_read_page, %function
+flash_read_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR6
+	stp	x19, x20, [sp, 16]
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	ldr	x19, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	stp	x25, x26, [sp, 64]
+	mov	w24, w4
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	mov	x25, x2
+	mov	x26, x3
+	and	w20, w1, 2097151
+	ubfx	x22, x23, 24, 2
+	tbz	x0, 4, .L1067
+	mov	w3, w1
+	adrp	x0, .LC41
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC41
+	bl	printf
+.L1067:
+	bl	nandc_wait_flash_ready
+	mov	w0, w21
+	bl	nandc_cs
+	adrp	x5, .LANCHOR34
+	cbnz	w22, .L1068
+	mov	w0, w21
+	bl	flash_enter_slc_mode
+.L1069:
+	ubfiz	x4, x21, 8, 8
+	lsr	w0, w20, 8
+	add	x4, x19, x4
+	and	w23, w23, 255
+	str	wzr, [x4, 2056]
+	str	wzr, [x4, 2052]
+	str	wzr, [x4, 2052]
+	str	w23, [x4, 2052]
+	str	w0, [x4, 2052]
+	lsr	w0, w20, 16
+	str	w0, [x4, 2052]
+	mov	w0, 48
+	str	w0, [x4, 2056]
+	ldr	x0, [x5, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1071
+	cbz	w22, .L1071
+	add	w20, w20, w20, lsl 1
+	sub	w0, w20, #1
+	add	w0, w0, w22
+.L1081:
+	bl	nandc_set_seed
+	bl	nandc_wait_flash_ready
+	mov	w0, 5
+	str	w0, [x4, 2056]
+	str	wzr, [x4, 2052]
+	mov	w0, 224
+	str	wzr, [x4, 2052]
+	mov	x3, x25
+	str	w0, [x4, 2056]
+	mov	w2, w24
+	mov	w1, 0
+	mov	x4, x26
+	mov	w0, w21
+	bl	nandc_xfer
+	mov	w5, w0
+	cbnz	w22, .L1073
+	mov	w0, w21
+	bl	flash_exit_slc_mode
+.L1073:
+	mov	w0, 0
+	bl	nandc_de_cs
+	ldp	x19, x20, [sp, 16]
+	mov	w0, w5
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1068:
+	ldr	x0, [x5, #:lo12:.LANCHOR34]
+	ldrb	w0, [x0, 12]
+	cmp	w0, 3
+	bne	.L1070
+	sxtw	x0, w21
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w22, [x0, 8]
+	b	.L1069
+.L1070:
+	mov	w0, w21
+	bl	flash_exit_slc_mode
+	b	.L1069
+.L1071:
+	mov	w0, w20
+	b	.L1081
+	.size	flash_read_page, .-flash_read_page
+	.section	.text.micron_read_retrial,"ax",@progbits
+	.align	2
+	.global	micron_read_retrial
+	.type	micron_read_retrial, %function
+micron_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	adrp	x0, .LANCHOR27
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	mov	x26, x3
+	stp	x23, x24, [sp, 48]
+	mov	w23, w2
+	stp	x27, x28, [sp, 80]
+	mov	x27, x4
+	ldrb	w21, [x0, #:lo12:.LANCHOR27]
+	and	x20, x25, 255
+	str	w5, [x29, 124]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR6
+	adrp	x24, .LC42
+	add	w21, w21, w21, lsl 1
+	adrp	x7, .LANCHOR113
+	ldr	x8, [x0, #:lo12:.LANCHOR6]
+	asr	w21, w21, 2
+	add	x24, x24, :lo12:.LC42
+	add	x7, x7, :lo12:.LANCHOR113
+	mov	w22, 0
+	mov	w19, -1
+	add	x28, x8, x20, lsl 8
+.L1083:
+	ldrb	w0, [x7]
+	cmp	w22, w0
+	bcc	.L1087
+.L1086:
+	add	x8, x8, x20, lsl 8
+	mov	w0, 239
+	str	w0, [x8, 2056]
+	mov	w0, 137
+	str	w0, [x8, 2052]
+	mov	w0, 200
+	bl	timer_delay_ns
+	str	wzr, [x8, 2048]
+	str	wzr, [x8, 2048]
+	cmp	w19, w21
+	str	wzr, [x8, 2048]
+	str	wzr, [x8, 2048]
+	bcc	.L1088
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1088:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1082
+	adrp	x0, .LC43
+	mov	w4, w19
+	mov	w3, w22
+	mov	w2, w23
+	mov	w1, w22
+	add	x0, x0, :lo12:.LC43
+	bl	printf
+.L1082:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1087:
+	mov	w0, 239
+	str	w0, [x28, 2056]
+	mov	w0, 137
+	str	w0, [x28, 2052]
+	stp	x7, x8, [x29, 96]
+	mov	w0, 200
+	bl	timer_delay_ns
+	add	w10, w22, 1
+	str	w10, [x28, 2048]
+	str	wzr, [x28, 2048]
+	mov	x3, x27
+	ldr	w4, [x29, 124]
+	mov	x2, x26
+	str	wzr, [x28, 2048]
+	mov	w1, w23
+	str	wzr, [x28, 2048]
+	mov	w0, w25
+	str	w10, [x29, 116]
+	bl	flash_read_page
+	mov	w6, w0
+	mov	w4, w19
+	str	w6, [x29, 120]
+	mov	w3, w22
+	mov	w2, w23
+	mov	w1, w22
+	mov	x0, x24
+	bl	printf
+	ldp	w10, w6, [x29, 116]
+	ldp	x7, x8, [x29, 96]
+	cmn	w6, #1
+	beq	.L1084
+	adrp	x0, .LANCHOR111
+	cmn	w19, #1
+	csel	w19, w19, w6, ne
+	cmp	w6, w21
+	ldr	x26, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x27, [x0, #:lo12:.LANCHOR112]
+	bcc	.L1090
+.L1084:
+	mov	w22, w10
+	b	.L1083
+.L1090:
+	mov	w19, w6
+	b	.L1086
+	.size	micron_read_retrial, .-micron_read_retrial
+	.section	.text.toshiba_3d_read_retrial,"ax",@progbits
+	.align	2
+	.global	toshiba_3d_read_retrial
+	.type	toshiba_3d_read_retrial, %function
+toshiba_3d_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	and	w6, w1, 255
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR2
+	stp	x25, x26, [sp, 64]
+	and	w25, w0, 255
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
+	stp	x23, x24, [sp, 48]
+	mov	x28, x4
+	mov	w23, w2
+	stp	x19, x20, [sp, 16]
+	str	w5, [x29, 124]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR6
+	mov	w1, 46
+	mov	w2, 56
+	ldr	x26, [x0, #:lo12:.LANCHOR6]
+	and	x0, x25, 255
+	add	x21, x0, 8
+	str	x0, [x29, 112]
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	add	x21, x26, x21, lsl 8
+	cmp	w0, 36
+	mov	w0, 26
+	csel	w1, w2, w1, ne
+	str	w1, [x29, 96]
+	mov	w1, 10
+	csel	w0, w1, w0, ne
+	str	w0, [x29, 104]
+	cbnz	w6, .L1102
+	sxtw	x24, w25
+	adrp	x0, .LC44
+	add	x24, x24, 8
+	add	x0, x0, :lo12:.LC44
+	add	x24, x26, x24, lsl 8
+	mov	w19, -1
+	mov	w20, 1
+	str	x0, [x29, 96]
+.L1108:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1103
+	mov	x0, x21
+	mov	w2, 0
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+	str	w0, [x24, 8]
+.L1104:
+	ldr	w4, [x29, 124]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	mov	w3, w0
+	ldr	x0, [x29, 96]
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	bl	printf
+	ldr	w4, [x29, 120]
+	cmn	w4, #1
+	beq	.L1105
+	adrp	x0, .LANCHOR111
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x28, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1121
+.L1105:
+	ldr	w0, [x29, 104]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1108
+.L1107:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1109
+	mov	w2, 0
+.L1135:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_tlc_set_rr_para
+	b	.L1110
+.L1103:
+	mov	w1, w20
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+	b	.L1104
+.L1121:
+	mov	w19, w4
+	b	.L1107
+.L1109:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_slc_rr_para
+.L1110:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1118
+	ldr	x0, [x29, 112]
+	add	x26, x26, x0, lsl 8
+	mov	w0, 85
+	str	w0, [x26, 2056]
+	mov	w0, 255
+	str	wzr, [x26, 2052]
+	str	wzr, [x26, 2048]
+	str	w0, [x26, 2056]
+.L1118:
+	mov	w4, w19
+	mov	w3, w20
+	mov	w2, w23
+	mov	w1, w20
+	adrp	x0, .LC46
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1119
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1119:
+	bl	nandc_wait_flash_ready
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1102:
+	sxtw	x24, w25
+	orr	w23, w23, w6, lsl 24
+	add	x24, x24, 8
+	adrp	x0, .LC45
+	add	x24, x26, x24, lsl 8
+	add	x0, x0, :lo12:.LC45
+	mov	w19, -1
+	mov	w20, 1
+	str	x0, [x29, 104]
+.L1116:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1111
+	mov	x0, x21
+	mov	w2, 1
+	mov	w1, w20
+	bl	toshiba_tlc_set_rr_para
+	mov	w0, 93
+.L1134:
+	str	w0, [x24, 8]
+	mov	x3, x28
+	mov	x2, x27
+	mov	w1, w23
+	ldr	w4, [x29, 124]
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	mov	w3, w0
+	ldr	x0, [x29, 104]
+	str	w4, [x29, 120]
+	mov	w2, w23
+	mov	w1, w20
+	bl	printf
+	ldr	w4, [x29, 120]
+	cmn	w4, #1
+	beq	.L1113
+	adrp	x0, .LANCHOR111
+	cmn	w19, #1
+	csel	w19, w19, w4, ne
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x28, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w4, w0, lsr 2
+	bcc	.L1122
+.L1113:
+	ldr	w0, [x29, 96]
+	add	w20, w20, 1
+	cmp	w0, w20
+	bne	.L1116
+.L1115:
+	ldrb	w0, [x22, #:lo12:.LANCHOR2]
+	cmp	w0, 36
+	bne	.L1117
+	mov	w2, 1
+	b	.L1135
+.L1111:
+	mov	x0, x21
+	mov	w1, w20
+	bl	toshiba_3d_set_tlc_rr_para
+	mov	w0, 38
+	b	.L1134
+.L1122:
+	mov	w19, w4
+	b	.L1115
+.L1117:
+	mov	w1, 0
+	mov	x0, x21
+	bl	toshiba_3d_set_tlc_rr_para
+	b	.L1110
+	.size	toshiba_3d_read_retrial, .-toshiba_3d_read_retrial
+	.section	.text.toshiba_read_retrial,"ax",@progbits
+	.align	2
+	.global	toshiba_read_retrial
+	.type	toshiba_read_retrial, %function
+toshiba_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	mov	x27, x3
+	stp	x19, x20, [sp, 16]
+	mov	x28, x4
+	stp	x25, x26, [sp, 64]
+	and	w19, w0, 255
+	stp	x23, x24, [sp, 48]
+	and	x26, x19, 255
+	stp	w5, w2, [x29, 120]
+	bl	nandc_wait_flash_ready
+	adrp	x0, .LANCHOR6
+	adrp	x1, .LANCHOR2
+	str	x1, [x29, 112]
+	add	x21, x26, 8
+	ldr	x22, [x0, #:lo12:.LANCHOR6]
+	ldrb	w0, [x1, #:lo12:.LANCHOR2]
+	sub	w0, w0, #67
+	add	x21, x22, x21, lsl 8
+	and	w0, w0, 255
+	cmp	w0, 1
+	bls	.L1154
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L1155
+	mov	w23, 1
+	mov	w0, 1
+	bl	nandc_set_if_mode
+.L1138:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 92
+	str	w1, [x0, 2056]
+	mov	w1, 197
+	str	w1, [x0, 2056]
+.L1137:
+	sxtw	x0, w19
+	mov	w20, 1
+	add	x0, x0, 8
+	mov	w24, -1
+	add	x0, x22, x0, lsl 8
+	str	x0, [x29, 104]
+.L1139:
+	adrp	x0, .LANCHOR113
+	ldrb	w0, [x0, #:lo12:.LANCHOR113]
+	add	w0, w0, 1
+	cmp	w20, w0
+	bcc	.L1148
+	mov	w25, w24
+.L1147:
+	ldr	x0, [x29, 112]
+	mov	w1, 0
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1149
+	bl	sandisk_set_rr_para
+.L1150:
+	sxtw	x19, w19
+	mov	w0, 255
+	add	x19, x19, 8
+	add	x22, x22, x19, lsl 8
+	str	w0, [x22, 8]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1151
+	cmn	w25, #1
+	mov	w0, 256
+	csel	w25, w25, w0, eq
+.L1151:
+	cmp	w25, 256
+	ccmn	w25, #1, 4, ne
+	bne	.L1152
+	ldr	w2, [x29, 124]
+	adrp	x0, .LC46
+	mov	w4, w25
+	mov	w3, w20
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC46
+	bl	printf
+.L1152:
+	bl	nandc_wait_flash_ready
+	cbz	w23, .L1136
+	mov	w0, 4
+	bl	nandc_set_if_mode
+.L1136:
+	mov	w0, w25
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1155:
+	mov	w23, 0
+	b	.L1138
+.L1154:
+	mov	w23, 0
+	b	.L1137
+.L1148:
+	ldr	x0, [x29, 112]
+	mov	w1, w20
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	sub	w0, w0, #67
+	and	w0, w0, 255
+	cmp	w0, 1
+	mov	x0, x21
+	bhi	.L1140
+	bl	sandisk_set_rr_para
+.L1141:
+	ldr	x0, [x29, 112]
+	ldrb	w0, [x0, #:lo12:.LANCHOR2]
+	cmp	w0, 34
+	bne	.L1142
+	adrp	x0, .LANCHOR113
+	ldrb	w0, [x0, #:lo12:.LANCHOR113]
+	sub	w0, w0, #3
+	cmp	w20, w0
+	bne	.L1142
+	ldr	x1, [x29, 104]
+	mov	w0, 179
+	str	w0, [x1, 8]
+.L1142:
+	add	x0, x22, x26, lsl 8
+	mov	w1, 38
+	ldr	w4, [x29, 120]
+	mov	x3, x28
+	mov	x2, x27
+	str	w1, [x0, 2056]
+	mov	w1, 93
+	str	w1, [x0, 2056]
+	mov	w0, w19
+	ldr	w1, [x29, 124]
+	bl	flash_read_page
+	mov	w25, w0
+	cmn	w0, #1
+	beq	.L1145
+	cmn	w24, #1
+	csel	w24, w24, w0, ne
+	adrp	x0, .LANCHOR111
+	ldr	x27, [x0, #:lo12:.LANCHOR111]
+	adrp	x0, .LANCHOR112
+	ldr	x28, [x0, #:lo12:.LANCHOR112]
+	adrp	x0, .LANCHOR27
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	add	w0, w0, w0, lsl 1
+	cmp	w25, w0, lsr 2
+	bcc	.L1147
+.L1145:
+	add	w20, w20, 1
+	b	.L1139
+.L1140:
+	bl	toshiba_set_rr_para
+	b	.L1141
+.L1149:
+	bl	toshiba_set_rr_para
+	b	.L1150
+	.size	toshiba_read_retrial, .-toshiba_read_retrial
+	.section	.text.hynix_read_retrial,"ax",@progbits
+	.align	2
+	.global	hynix_read_retrial
+	.type	hynix_read_retrial, %function
+hynix_read_retrial:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	x23, x0, 255
+	adrp	x0, .LANCHOR5
+	stp	x27, x28, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	mov	w27, w5
+	ldr	x28, [x0, #:lo12:.LANCHOR5]
+	mov	w22, w2
+	stp	x25, x26, [sp, 64]
+	mov	x25, x3
+	add	x28, x28, 112
+	stp	x19, x20, [sp, 16]
+	add	x0, x28, x23
+	mov	x26, x4
+	mov	x21, x23
+	mov	w19, -1
+	ldrb	w24, [x28, 2]
+	ldrb	w20, [x0, 8]
+	bl	nandc_wait_flash_ready
+	adrp	x6, .LANCHOR27
+	add	x6, x6, :lo12:.LANCHOR27
+	mov	w5, 0
+	adrp	x7, .LANCHOR111
+	adrp	x8, .LANCHOR112
+.L1169:
+	cmp	w5, w24
+	bcc	.L1174
+.L1173:
+	adrp	x0, .LANCHOR27
+	add	x23, x28, x23
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	strb	w20, [x23, 8]
+	add	w0, w0, w0, lsl 1
+	cmp	w19, w0, lsr 2
+	bcc	.L1175
+	cmn	w19, #1
+	mov	w0, 256
+	csel	w19, w19, w0, eq
+.L1175:
+	cmp	w19, 256
+	ccmn	w19, #1, 4, ne
+	bne	.L1168
+	adrp	x0, .LC47
+	mov	w4, w19
+	mov	w3, w5
+	mov	w2, w22
+	mov	w1, w5
+	add	x0, x0, :lo12:.LC47
+	bl	printf
+.L1168:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1174:
+	add	w20, w20, 1
+	stp	x6, x8, [x29, 96]
+	and	w20, w20, 255
+	str	x7, [x29, 112]
+	cmp	w24, w20
+	str	w5, [x29, 124]
+	csel	w20, w20, wzr, hi
+	mov	w0, w21
+	mov	w1, w20
+	bl	hynix_set_rr_para
+	mov	w4, w27
+	mov	x3, x26
+	mov	x2, x25
+	mov	w1, w22
+	mov	w0, w21
+	bl	flash_read_page
+	ldr	w5, [x29, 124]
+	cmn	w0, #1
+	ldp	x6, x8, [x29, 96]
+	ldr	x7, [x29, 112]
+	beq	.L1171
+	ldrb	w1, [x6]
+	cmn	w19, #1
+	csel	w19, w19, w0, ne
+	ldr	x25, [x7, #:lo12:.LANCHOR111]
+	ldr	x26, [x8, #:lo12:.LANCHOR112]
+	add	w1, w1, w1, lsl 1
+	cmp	w0, w1, lsr 2
+	bcc	.L1177
+.L1171:
+	add	w5, w5, 1
+	b	.L1169
+.L1177:
+	mov	w19, w0
+	b	.L1173
+	.size	hynix_read_retrial, .-hynix_read_retrial
+	.section	.text.flash_ddr_tunning_read,"ax",@progbits
+	.align	2
+	.global	flash_ddr_tunning_read
+	.type	flash_ddr_tunning_read, %function
+flash_ddr_tunning_read:
+	stp	x29, x30, [sp, -144]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, 0
+	stp	x21, x22, [sp, 32]
+	mov	w19, 0
+	stp	x23, x24, [sp, 48]
+	mov	w23, w1
+	stp	x25, x26, [sp, 64]
+	adrp	x24, .LC48
+	stp	x27, x28, [sp, 80]
+	and	w25, w0, 255
+	mov	x26, x2
+	mov	x27, x3
+	str	w4, [x29, 140]
+	add	x24, x24, :lo12:.LC48
+	bl	nandc_get_ddr_para
+	mov	w8, w0
+	mov	w28, 1024
+	mov	w21, 6
+	mov	w22, -1
+	mov	w6, 0
+	mov	w7, 0
+	adrp	x10, .LANCHOR111
+	adrp	x11, .LANCHOR112
+.L1192:
+	stp	x11, x10, [x29, 104]
+	mov	w0, w21
+	stp	w8, w6, [x29, 124]
+	str	w7, [x29, 132]
+	bl	nandc_set_ddr_para
+	ldr	w4, [x29, 140]
+	mov	x3, x27
+	mov	x2, x26
+	mov	w1, w23
+	mov	w0, w25
+	bl	flash_read_page
+	mov	w4, w0
+	mov	w3, w0
+	str	w4, [x29, 136]
+	mov	w2, w23
+	mov	w1, w21
+	mov	x0, x24
+	bl	printf
+	ldp	w7, w4, [x29, 132]
+	add	w0, w28, 1
+	ldp	w8, w6, [x29, 124]
+	cmp	w4, w0
+	ldp	x11, x10, [x29, 104]
+	bhi	.L1188
+	ldr	x26, [x10, #:lo12:.LANCHOR111]
+	cmp	w4, 2
+	ldr	x27, [x11, #:lo12:.LANCHOR112]
+	bhi	.L1197
+	add	w19, w19, 1
+	cmp	w19, 7
+	bls	.L1197
+	mov	w0, w20
+	mov	w28, w4
+	sub	w20, w21, w19
+	mov	w22, 0
+.L1190:
+	cmp	w19, w7
+	csel	w20, w20, w0, hi
+.L1191:
+	cbz	w20, .L1193
+	adrp	x0, .LANCHOR27
+	mov	w1, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR27]
+	udiv	w0, w0, w1
+	cmp	w0, w28
+	bls	.L1193
+	mov	w1, w20
+	adrp	x0, .LC49
+	add	x0, x0, :lo12:.LC49
+	bl	printf
+	mov	w0, w20
+.L1204:
+	bl	nandc_set_ddr_para
+	cbz	w22, .L1187
+	mov	w28, w22
+	mov	w2, w23
+	mov	w1, w25
+	adrp	x0, .LC50
+	add	x0, x0, :lo12:.LC50
+	bl	printf
+.L1187:
+	mov	w0, w28
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L1188:
+	cmp	w19, w7
+	bls	.L1198
+	sub	w20, w6, w19
+	cmp	w19, 7
+	bhi	.L1191
+	mov	w7, w19
+.L1198:
+	mov	w19, 0
+	b	.L1189
+.L1197:
+	mov	w6, w21
+	mov	w28, w4
+	mov	w22, 0
+.L1189:
+	add	w21, w21, 2
+	cmp	w21, 50
+	bne	.L1192
+	mov	w0, w20
+	mov	w20, w6
+	b	.L1190
+.L1193:
+	mov	w0, w8
+	b	.L1204
+	.size	flash_ddr_tunning_read, .-flash_ddr_tunning_read
+	.section	.text.flash_read_page_en,"ax",@progbits
+	.align	2
+	.global	flash_read_page_en
+	.type	flash_read_page_en, %function
+flash_read_page_en:
+	stp	x29, x30, [sp, -96]!
+	and	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w1
+	adrp	x1, .LANCHOR8
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldrb	w1, [x1, #:lo12:.LANCHOR8]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cmp	w1, w0
+	bhi	.L1206
+	adrp	x1, .LANCHOR114
+	adrp	x0, .LC0
+	mov	w2, 386
+	add	x1, x1, :lo12:.LANCHOR114
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1207:
+	b	.L1207
+.L1206:
+	adrp	x1, .LANCHOR10
+	add	x1, x1, :lo12:.LANCHOR10
+	mov	x22, x2
+	mov	x23, x3
+	mov	w24, w4
+	ldrb	w20, [x1, w0, sxtw]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 4, .L1208
+	adrp	x0, .LC51
+	mov	w2, w19
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC51
+	bl	printf
+.L1208:
+	tst	x19, 50331648
+	bne	.L1209
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1210
+	ldrb	w0, [x1, #:lo12:.LANCHOR12]
+	cbz	w0, .L1209
+.L1210:
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR12]
+	ldrh	w2, [x0, #:lo12:.LANCHOR13]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1211
+	add	w19, w0, w19, lsl 1
+.L1209:
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_read_page
+	mov	w21, w0
+	cmn	w0, #1
+	bne	.L1205
+	adrp	x25, .LANCHOR29
+	mov	x26, x25
+	ldrb	w27, [x25, #:lo12:.LANCHOR29]
+	cbnz	w27, .L1213
+.L1216:
+	adrp	x0, .LANCHOR115
+	ldr	x6, [x0, #:lo12:.LANCHOR115]
+	cbnz	x6, .L1214
+.L1215:
+	ldrb	w4, [x26, #:lo12:.LANCHOR29]
+	mov	w3, -1
+	mov	w2, w19
+	mov	w1, 0
+	adrp	x0, .LC52
+	add	x0, x0, :lo12:.LC52
+	bl	printf
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L1205
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	b	flash_ddr_tunning_read
+.L1211:
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1209
+.L1213:
+	strb	wzr, [x25, #:lo12:.LANCHOR29]
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w1, w19
+	mov	w0, w20
+	bl	flash_read_page
+	strb	w27, [x25, #:lo12:.LANCHOR29]
+	cmn	w0, #1
+	beq	.L1216
+.L1234:
+	mov	w21, w0
+.L1205:
+	mov	w0, w21
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1214:
+	mov	w5, w24
+	mov	x4, x23
+	mov	x3, x22
+	mov	w2, w19
+	mov	w1, 0
+	mov	w0, w20
+	blr	x6
+	cmn	w0, #1
+	bne	.L1234
+	b	.L1215
+	.size	flash_read_page_en, .-flash_read_page_en
+	.section	.text.flash_get_last_written_page,"ax",@progbits
+	.align	2
+	.global	flash_get_last_written_page
+	.type	flash_get_last_written_page, %function
+flash_get_last_written_page:
+	stp	x29, x30, [sp, -96]!
+	and	w1, w1, 65535
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w0, 255
+	adrp	x0, .LANCHOR97
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	mov	x22, x2
+	ldrh	w19, [x0, #:lo12:.LANCHOR97]
+	adrp	x0, .LANCHOR19+26
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	ldrh	w25, [x0, #:lo12:.LANCHOR19+26]
+	sub	w19, w19, #1
+	sxth	w19, w19
+	mov	w24, w4
+	mov	w0, w21
+	str	x27, [sp, 80]
+	mul	w25, w25, w1
+	add	w1, w19, w25
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1236
+	mov	w26, 0
+	mov	w27, 2
+.L1237:
+	cmp	w26, w19
+	ble	.L1240
+.L1236:
+	mov	w0, w19
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1240:
+	add	w20, w26, w19
+	mov	w4, w24
+	mov	x3, x23
+	mov	x2, x22
+	mov	w0, w21
+	sdiv	w20, w20, w27
+	add	w1, w25, w20, sxth
+	bl	flash_read_page_en
+	cmp	w0, 512
+	bne	.L1238
+	sub	w19, w20, #1
+	sxth	w19, w19
+	b	.L1237
+.L1238:
+	add	w20, w20, 1
+	sxth	w26, w20
+	b	.L1237
+	.size	flash_get_last_written_page, .-flash_get_last_written_page
+	.section	.text.flash_get_last_written_page_ext,"ax",@progbits
+	.align	2
+	.global	flash_get_last_written_page_ext
+	.type	flash_get_last_written_page_ext, %function
+flash_get_last_written_page_ext:
+	adrp	x4, .LANCHOR71
+	mov	w6, 21
+	and	w0, w0, 65535
+	mov	w5, 1
+	ldrh	w4, [x4, #:lo12:.LANCHOR71]
+	sub	w6, w6, w4
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	lsl	w5, w5, w6
+	sub	w5, w5, #1
+	and	w1, w5, w0
+	asr	w0, w0, w6
+	b	flash_get_last_written_page
+	.size	flash_get_last_written_page_ext, .-flash_get_last_written_page_ext
+	.section	.text.flash_info_blk_init,"ax",@progbits
+	.align	2
+	.global	flash_info_blk_init
+	.type	flash_info_blk_init, %function
+flash_info_blk_init:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR13
+	stp	x23, x24, [sp, 48]
+	mov	w24, 21321
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR116
+	stp	x27, x28, [sp, 80]
+	mov	x21, x26
+	add	x27, x22, :lo12:.LANCHOR13
+	stp	x19, x20, [sp, 16]
+	movk	w24, 0x5359, lsl 16
+	mov	w19, 4
+.L1246:
+	ldrh	w1, [x27]
+	adrp	x20, .LANCHOR5
+	ldr	x3, [x26, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	mov	w0, 0
+	add	x28, x26, :lo12:.LANCHOR116
+	add	x25, x20, :lo12:.LANCHOR5
+	mul	w1, w1, w19
+	mov	x23, x20
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1244
+	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	ldr	w0, [x2]
+	cmp	w0, w24
+	beq	.L1245
+.L1244:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L1246
+.L1267:
+	mov	w0, -1
+.L1243:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1254:
+	ldr	x0, [x25]
+	ldr	w1, [x0]
+	cmp	w1, w24
+	bne	.L1255
+	ldr	w19, [x0, 4]
+.L1248:
+	add	x24, x20, :lo12:.LANCHOR117
+	ldrh	w0, [x22, #:lo12:.LANCHOR13]
+	ldr	x3, [x21, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	ldrb	w1, [x24, 1]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1249
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w1, 21321
+	movk	w1, 0x5359, lsl 16
+	ldr	w2, [x0]
+	cmp	w2, w1
+	bne	.L1249
+	ldr	w1, [x0, 4]
+	cmp	w19, w1
+	bcs	.L1249
+	ldrb	w1, [x0, 37]
+	ldrb	w0, [x0, 36]
+	strb	w1, [x20, #:lo12:.LANCHOR117]
+	strb	w0, [x24, 1]
+.L1249:
+	ldrb	w1, [x20, #:lo12:.LANCHOR117]
+	add	x24, x20, :lo12:.LANCHOR117
+	ldr	x3, [x21, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	mov	w0, 0
+	bl	flash_get_last_written_page
+	sxth	w19, w0
+	add	w0, w0, 1
+	ldrb	w20, [x20, #:lo12:.LANCHOR117]
+	strh	w0, [x24, 2]
+	ldrh	w0, [x22, #:lo12:.LANCHOR13]
+	mov	w22, 21321
+	movk	w22, 0x5359, lsl 16
+	madd	w20, w20, w0, w19
+.L1250:
+	tbz	w19, #31, .L1252
+	cmn	w19, #1
+	bne	.L1253
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	w1, [x0]
+	adrp	x0, .LC53
+	add	x0, x0, :lo12:.LC53
+	bl	printf
+	b	.L1267
+.L1252:
+	ldr	x3, [x21, #:lo12:.LANCHOR116]
+	mov	w4, 4
+	ldr	x2, [x23, #:lo12:.LANCHOR5]
+	mov	w1, w20
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	beq	.L1251
+	ldr	x0, [x23, #:lo12:.LANCHOR5]
+	ldr	w0, [x0]
+	cmp	w0, w22
+	bne	.L1251
+.L1253:
+	mov	w0, 0
+	b	.L1243
+.L1251:
+	sub	w19, w19, #1
+	sub	w20, w20, #1
+	sxth	w19, w19
+	b	.L1250
+.L1245:
+	adrp	x20, .LANCHOR117
+	add	x1, x20, :lo12:.LANCHOR117
+	ldrb	w3, [x2, 37]
+	mov	w4, 4
+	ldrb	w0, [x2, 36]
+	strb	w3, [x1, 1]
+	ldrh	w1, [x27]
+	ldr	x3, [x28]
+	strb	w0, [x20, #:lo12:.LANCHOR117]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_read_page_en
+	cmn	w0, #1
+	bne	.L1254
+.L1255:
+	mov	w19, 0
+	b	.L1248
+	.size	flash_info_blk_init, .-flash_info_blk_init
+	.section	.text.flash_ddr_para_scan,"ax",@progbits
+	.align	2
+	.global	flash_ddr_para_scan
+	.type	flash_ddr_para_scan, %function
+flash_ddr_para_scan:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR25
+	stp	x21, x22, [sp, 32]
+	and	w22, w0, 255
+	ldrb	w0, [x20, #:lo12:.LANCHOR25]
+	adrp	x19, .LANCHOR35
+	stp	x23, x24, [sp, 48]
+	mov	w21, 1
+	mov	w23, w1
+	str	x25, [sp, 64]
+	strb	w21, [x19, #:lo12:.LANCHOR35]
+	adrp	x24, .LANCHOR119
+	bl	flash_set_interface_mode
+	adrp	x25, .LANCHOR118
+	ldrb	w0, [x20, #:lo12:.LANCHOR25]
+	bl	nandc_set_if_mode
+	ldr	x3, [x25, #:lo12:.LANCHOR118]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR119]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_ddr_tunning_read
+	ldr	x3, [x25, #:lo12:.LANCHOR118]
+	mov	w4, 4
+	ldr	x2, [x24, #:lo12:.LANCHOR119]
+	mov	w1, w23
+	mov	w0, w22
+	bl	flash_read_page
+	cmn	w0, #1
+	mov	x0, x19
+	bne	.L1269
+	ldrb	w1, [x20, #:lo12:.LANCHOR25]
+	tbz	x1, 0, .L1269
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, w21
+	bl	nandc_set_if_mode
+	strb	wzr, [x19, #:lo12:.LANCHOR35]
+.L1270:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1269:
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR35]
+	b	.L1270
+	.size	flash_ddr_para_scan, .-flash_ddr_para_scan
+	.section	.text.flash_complete_page_read,"ax",@progbits
+	.align	2
+	.global	flash_complete_page_read
+	.type	flash_complete_page_read, %function
+flash_complete_page_read:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	mov	w25, w0
+	adrp	x0, .LANCHOR8
+	stp	x23, x24, [sp, 48]
+	stp	x19, x20, [sp, 16]
+	mov	x23, x1
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	ubfx	x1, x25, 21, 3
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	cmp	w0, w1
+	bhi	.L1276
+	adrp	x1, .LANCHOR120
+	adrp	x0, .LC0
+	mov	w2, 791
+	add	x1, x1, :lo12:.LANCHOR120
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1277:
+	b	.L1277
+.L1276:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	ubfx	x22, x25, 24, 2
+	mov	x24, x2
+	and	w19, w25, 2097151
+	ldrb	w21, [x0, w1, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x4, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w21
+	bl	nandc_cs
+	cbnz	w22, .L1278
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1279
+	ldrb	w0, [x1, #:lo12:.LANCHOR12]
+	cbz	w0, .L1278
+.L1279:
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR12]
+	ldrh	w2, [x0, #:lo12:.LANCHOR13]
+	udiv	w0, w19, w2
+	mul	w0, w0, w2
+	sub	w19, w19, w0
+	cbz	w1, .L1280
+	add	w19, w0, w19, lsl 1
+.L1278:
+	ubfiz	x0, x21, 8, 8
+	mov	w1, 5
+	add	x0, x4, x0
+	adrp	x20, .LANCHOR19
+	add	x6, x20, :lo12:.LANCHOR19
+	mov	x4, x24
+	str	x6, [x29, 104]
+	mov	x3, x23
+	str	w1, [x0, 2056]
+	and	w1, w19, 255
+	str	wzr, [x0, 2052]
+	str	wzr, [x0, 2052]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 8
+	ldrb	w2, [x6, 9]
+	str	w1, [x0, 2052]
+	lsr	w1, w19, 16
+	str	w1, [x0, 2052]
+	mov	w1, 224
+	str	w1, [x0, 2056]
+	mov	w1, 0
+	mov	w0, w21
+	bl	nandc_xfer
+	mov	w26, w0
+	cmn	w0, #1
+	ldr	x6, [x29, 104]
+	bne	.L1275
+	adrp	x27, .LANCHOR29
+	mov	x28, x27
+	ldrb	w5, [x27, #:lo12:.LANCHOR29]
+	cbnz	w5, .L1282
+.L1285:
+	adrp	x0, .LANCHOR115
+	ldr	x6, [x0, #:lo12:.LANCHOR115]
+	cbnz	x6, .L1283
+.L1284:
+	ldrb	w4, [x28, #:lo12:.LANCHOR29]
+	mov	w3, -1
+	mov	w2, w25
+	mov	w1, 0
+	adrp	x0, .LC54
+	add	x0, x0, :lo12:.LC54
+	bl	printf
+	adrp	x0, .LANCHOR35
+	ldrb	w0, [x0, #:lo12:.LANCHOR35]
+	cbz	w0, .L1275
+	add	x20, x20, :lo12:.LANCHOR19
+	orr	w1, w19, w22, lsl 24
+	ldp	x25, x26, [sp, 64]
+	mov	x3, x24
+	ldrb	w4, [x20, 9]
+	mov	x2, x23
+	ldp	x19, x20, [sp, 16]
+	mov	w0, w21
+	ldp	x23, x24, [sp, 48]
+	ldp	x21, x22, [sp, 32]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	b	flash_ddr_tunning_read
+.L1280:
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	ldrh	w19, [x1, w19, uxtw 1]
+	add	w19, w19, w0
+	b	.L1278
+.L1282:
+	ldrb	w4, [x6, 9]
+	mov	x3, x24
+	str	w5, [x29, 104]
+	mov	x2, x23
+	strb	wzr, [x27, #:lo12:.LANCHOR29]
+	orr	w1, w19, w22, lsl 24
+	mov	w0, w21
+	bl	flash_read_page
+	cmn	w0, #1
+	ldr	w5, [x29, 104]
+	strb	w5, [x27, #:lo12:.LANCHOR29]
+	beq	.L1285
+.L1300:
+	mov	w26, w0
+.L1275:
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1283:
+	add	x0, x20, :lo12:.LANCHOR19
+	mov	x4, x24
+	mov	x3, x23
+	mov	w2, w19
+	mov	w1, w22
+	ldrb	w5, [x0, 9]
+	mov	w0, w21
+	blr	x6
+	cmn	w0, #1
+	beq	.L1284
+	b	.L1300
+	.size	flash_complete_page_read, .-flash_complete_page_read
+	.section	.text.queue_wait_first_req_completed,"ax",@progbits
+	.align	2
+	.type	queue_wait_first_req_completed, %function
+queue_wait_first_req_completed:
+	stp	x29, x30, [sp, -64]!
+	adrp	x0, .LANCHOR90
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR90]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	cmp	w0, 255
+	bne	.L1302
+.L1320:
+	mov	w21, 0
+	b	.L1301
+.L1302:
+	adrp	x19, .LANCHOR36
+	sxtw	x22, w0
+	add	x1, x19, :lo12:.LANCHOR36
+	add	x1, x1, x22, lsl 6
+	ldrb	w2, [x1, 58]
+	ldr	w21, [x1, 40]
+	sub	w3, w2, #1
+	cmp	w3, 9
+	bhi	.L1320
+	adrp	x1, .L1305
+	add	x1, x1, :lo12:.L1305
+	ldrb	w1, [x1,w3,uxtw]
+	adr	x3, .Lrtx1305
+	add	x1, x3, w1, sxtb #2
+	br	x1
+.Lrtx1305:
+	.section	.rodata.queue_wait_first_req_completed,"a",@progbits
+	.align	0
+	.align	2
+.L1305:
+	.byte	(.L1304 - .Lrtx1305) / 4
+	.byte	(.L1304 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1307 - .Lrtx1305) / 4
+	.byte	(.L1308 - .Lrtx1305) / 4
+	.byte	(.L1309 - .Lrtx1305) / 4
+	.byte	(.L1306 - .Lrtx1305) / 4
+	.byte	(.L1309 - .Lrtx1305) / 4
+	.section	.text.queue_wait_first_req_completed
+.L1304:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	add	x19, x19, x22, lsl 6
+	ldp	x1, x0, [x19, 8]
+	ldr	x2, [x19, 24]
+	cmp	x0, 0
+	csel	x1, x0, x1, ne
+	mov	w0, w21
+	bl	flash_complete_page_read
+	str	w0, [x19, 52]
+	mov	w0, 12
+	strb	w0, [x19, 58]
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+	b	.L1320
+.L1306:
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 6, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	mov	w0, 5
+	add	x19, x19, x22, lsl 6
+	tst	w21, w0
+	beq	.L1319
+	ldrb	w1, [x19, 1]
+	mov	w0, 11
+	ldr	w3, [x19, 40]
+	mov	w4, 11
+	ldr	w2, [x19, 52]
+	strb	w0, [x19, 58]
+	adrp	x0, .LC55
+	add	x0, x0, :lo12:.LC55
+	bl	printf
+.L1338:
+	mov	w0, -1
+	str	w0, [x19, 52]
+	b	.L1301
+.L1309:
+	cmp	w2, 10
+	add	x20, x19, :lo12:.LANCHOR36
+	ubfiz	x0, x0, 6, 8
+	mov	w1, 3
+	mov	w2, 9
+	add	x0, x20, x0
+	csel	w2, w2, w1, eq
+	ubfx	x3, x21, 21, 3
+.L1314:
+	ldrb	w1, [x0]
+	cmp	w1, 255
+	bne	.L1318
+	mov	w21, -1
+	b	.L1301
+.L1318:
+	sxtw	x23, w1
+	ubfiz	x0, x1, 6, 8
+	add	x1, x20, x23, lsl 6
+	add	x0, x20, x0
+	ldrb	w4, [x1, 58]
+	cmp	w4, w2
+	bne	.L1314
+	ldr	w1, [x1, 40]
+	ubfx	x1, x1, 21, 3
+	cmp	w3, w1
+	bne	.L1314
+	mov	w0, w21
+	mov	w1, 64
+	bl	flash_wait_device_ready
+	mov	w24, w0
+	and	w21, w0, 64
+	tbz	x24, 6, .L1316
+	add	x20, x20, x22, lsl 6
+	ands	w21, w0, 15
+	beq	.L1317
+	ldrb	w1, [x20, 1]
+	mov	w4, 11
+	ldr	w3, [x20, 40]
+	adrp	x0, .LC55
+	ldr	w2, [x20, 52]
+	add	x0, x0, :lo12:.LC55
+	mov	w21, w24
+	bl	printf
+	mov	w0, 11
+	strb	w0, [x20, 58]
+	mov	w0, -1
+	str	w0, [x20, 52]
+.L1316:
+	add	x1, x19, :lo12:.LANCHOR36
+	add	x22, x1, x22, lsl 6
+	add	x1, x1, x23, lsl 6
+	ldrb	w0, [x22, 58]
+	strb	w0, [x1, 58]
+	ldr	w0, [x22, 52]
+	str	w0, [x1, 52]
+.L1301:
+	mov	w0, w21
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1317:
+	mov	w0, 12
+	str	wzr, [x20, 52]
+	strb	w0, [x20, 58]
+	b	.L1316
+.L1307:
+	mov	w0, w21
+	mov	w1, 32
+	bl	flash_wait_device_ready
+	mov	w21, w0
+	tbz	x21, 5, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	tst	x21, 15
+	add	x19, x19, x22, lsl 6
+	beq	.L1319
+	mov	w0, 11
+	strb	w0, [x19, 58]
+	b	.L1338
+.L1319:
+	mov	w0, 12
+	str	wzr, [x19, 52]
+	strb	w0, [x19, 58]
+	b	.L1320
+.L1308:
+	mov	w1, 64
+	mov	w0, w21
+	bl	flash_wait_device_ready
+	tbz	x0, 6, .L1320
+	add	x19, x19, :lo12:.LANCHOR36
+	add	x19, x19, x22, lsl 6
+	str	w0, [x19, 52]
+	mov	w0, 6
+	strb	w0, [x19, 58]
+	b	.L1320
+	.size	queue_wait_first_req_completed, .-queue_wait_first_req_completed
+	.section	.text.sblk_wait_write_queue_completed,"ax",@progbits
+	.align	2
+	.global	sblk_wait_write_queue_completed
+	.type	sblk_wait_write_queue_completed, %function
+sblk_wait_write_queue_completed:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	adrp	x19, .LANCHOR90
+	add	x19, x19, :lo12:.LANCHOR90
+.L1340:
+	ldrb	w0, [x19]
+	cmp	w0, 255
+	bne	.L1341
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1341:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1340
+	.size	sblk_wait_write_queue_completed, .-sblk_wait_write_queue_completed
+	.section	.text.ftl_read_page,"ax",@progbits
+	.align	2
+	.global	ftl_read_page
+	.type	ftl_read_page, %function
+ftl_read_page:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	b	flash_read_page_en
+	.size	ftl_read_page, .-ftl_read_page
+	.section	.text.ftl_read_ppa_page,"ax",@progbits
+	.align	2
+	.global	ftl_read_ppa_page
+	.type	ftl_read_ppa_page, %function
+ftl_read_ppa_page:
+	stp	x29, x30, [sp, -48]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w19, w0
+	stp	x21, x22, [sp, 32]
+	mov	x20, x1
+	mov	x21, x2
+	mov	w22, w3
+	bl	sblk_wait_write_queue_completed
+	ubfx	x0, x19, 21, 3
+	mov	w4, w22
+	mov	x3, x21
+	mov	x2, x20
+	mov	w1, w19
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	flash_read_page_en
+	.size	ftl_read_ppa_page, .-ftl_read_ppa_page
+	.section	.text.ftl_open_sblk_read_test,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_read_test
+	.type	ftl_open_sblk_read_test, %function
+ftl_open_sblk_read_test:
+	stp	x29, x30, [sp, -96]!
+	and	w13, w0, 65535
+	mov	w0, w13
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR79
+	adrp	x24, .LANCHOR45
+	add	x23, x23, :lo12:.LANCHOR79
+	add	x24, x24, :lo12:.LANCHOR45
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	add	x1, x29, 80
+	mov	w20, 0
+	bl	ftl_get_blk_list_in_sblk
+	strb	w0, [x29, 73]
+	strh	w13, [x29, 64]
+.L1348:
+	ldrh	w0, [x23]
+	cmp	w0, w20
+	bls	.L1347
+	adrp	x22, .LANCHOR69
+	adrp	x21, .LANCHOR121
+	mov	w19, 0
+	add	x22, x22, :lo12:.LANCHOR69
+	add	x21, x21, :lo12:.LANCHOR121
+	b	.L1350
+.L1353:
+	add	x0, x29, 64
+	mov	w1, 65535
+	add	x0, x0, x19, sxtw 1
+	ldrh	w0, [x0, 16]
+	cmp	w0, w1
+	bne	.L1349
+.L1352:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+.L1350:
+	ldrb	w0, [x22]
+	cmp	w0, w19
+	bhi	.L1353
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1348
+.L1349:
+	adrp	x1, .LANCHOR75
+	ldrb	w3, [x24]
+	mov	x2, x21
+	ldrh	w4, [x1, #:lo12:.LANCHOR75]
+	adrp	x1, ftl_tmp_buffer
+	add	x1, x1, :lo12:ftl_tmp_buffer
+	madd	w0, w4, w0, w20
+	bl	ftl_read_ppa_page
+	cmp	w0, 512
+	bne	.L1352
+.L1347:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	ftl_open_sblk_read_test, .-ftl_open_sblk_read_test
+	.section	.text.sblk_read_page,"ax",@progbits
+	.align	2
+	.global	sblk_read_page
+	.type	sblk_read_page, %function
+sblk_read_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	and	w21, w1, 255
+	stp	x19, x20, [sp, 16]
+	mov	w22, w21
+	stp	x23, x24, [sp, 48]
+	mov	x20, x0
+	adrp	x23, .LANCHOR90
+	adrp	x24, .LANCHOR36
+	mov	x19, x0
+	add	x23, x23, :lo12:.LANCHOR90
+	add	x24, x24, :lo12:.LANCHOR36
+	stp	x25, x26, [sp, 64]
+.L1359:
+	cbnz	w22, .L1363
+.L1371:
+	adrp	x19, .LANCHOR36
+	add	x19, x19, :lo12:.LANCHOR36
+.L1364:
+	cbnz	w21, .L1367
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1363:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1360:
+	mov	w1, 0
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1361
+	ldr	w1, [x19, 40]
+	mov	w0, 48
+	bl	flash_start_page_read
+	strb	wzr, [x19, 59]
+	mov	w0, 1
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	mov	x0, x23
+	bl	buf_add_tail
+	subs	w22, w22, #1
+	beq	.L1371
+	ubfiz	x19, x25, 6, 8
+	add	x19, x24, x19
+	b	.L1359
+.L1361:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1360
+.L1367:
+	ldrb	w0, [x20, 58]
+	cmp	w0, 12
+	bne	.L1365
+	ldrb	w20, [x20]
+	sub	w21, w21, #1
+	add	x20, x19, x20, lsl 6
+	b	.L1364
+.L1365:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1364
+	.size	sblk_read_page, .-sblk_read_page
+	.section	.text.gc_check_data_one_wl,"ax",@progbits
+	.align	2
+	.global	gc_check_data_one_wl
+	.type	gc_check_data_one_wl, %function
+gc_check_data_one_wl:
+	sub	sp, sp, #112
+	adrp	x0, .LANCHOR60
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	adrp	x19, .LANCHOR58
+	stp	x21, x22, [sp, 48]
+	add	x21, x19, :lo12:.LANCHOR58
+	ldr	x20, [x0, #:lo12:.LANCHOR60]
+	stp	x23, x24, [sp, 64]
+	ldr	x0, [x21, 8]
+	stp	x25, x26, [sp, 80]
+	str	x27, [sp, 96]
+	cbnz	x0, .L1374
+	mov	w0, 1
+	bl	buf_alloc
+	str	x0, [x21, 8]
+.L1374:
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x21, [x0, 8]
+	cbz	x21, .L1375
+	adrp	x26, .LANCHOR75
+	adrp	x27, .LANCHOR64
+	add	x25, x20, 96
+	add	x26, x26, :lo12:.LANCHOR75
+	add	x27, x27, :lo12:.LANCHOR64
+	mov	w24, 0
+.L1376:
+	ldrb	w0, [x20, 89]
+	cmp	w24, w0
+	bge	.L1386
+	mov	w23, 1
+	add	x22, x19, :lo12:.LANCHOR58
+	b	.L1387
+.L1375:
+	adrp	x1, .LANCHOR122
+	adrp	x0, .LC0
+	mov	w2, 333
+	add	x1, x1, :lo12:.LANCHOR122
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1377:
+	b	.L1377
+.L1385:
+	ldrh	w0, [x25]
+	ldrh	w1, [x26]
+	ldrb	w2, [x27]
+	cmp	w2, 3
+	mul	w1, w0, w1
+	ldrh	w0, [x22, 16]
+	bne	.L1378
+	add	w0, w0, w1
+	orr	w0, w0, w23, lsl 24
+.L1398:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w2, [x21, 52]
+	adrp	x1, .LANCHOR107
+	cmn	w2, #1
+	beq	.L1381
+	ldrh	w0, [x22, 22]
+	ldr	x4, [x1, #:lo12:.LANCHOR107]
+	ldr	x3, [x21, 24]
+	lsl	x0, x0, 2
+	ldr	w5, [x4, x0]
+	ldr	w4, [x3, 4]
+	cmp	w5, w4
+	bne	.L1381
+	adrp	x4, .LANCHOR108
+	ldr	x4, [x4, #:lo12:.LANCHOR108]
+	ldr	w4, [x4, x0]
+	ldr	w0, [x3, 8]
+	cmp	w4, w0
+	beq	.L1382
+.L1381:
+	ldrh	w0, [x22, 22]
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	lsl	x0, x0, 2
+	ldr	w3, [x1, x0]
+	cmn	w3, #1
+	beq	.L1382
+	adrp	x1, .LANCHOR22
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 10, .L1383
+	ldr	x1, [x21, 24]
+	adrp	x4, .LANCHOR108
+	ldr	x4, [x4, #:lo12:.LANCHOR108]
+	ldr	w5, [x1, 12]
+	str	w5, [sp]
+	ldr	w4, [x4, x0]
+	adrp	x0, .LC56
+	ldp	w5, w6, [x1]
+	add	x0, x0, :lo12:.LC56
+	ldr	w7, [x1, 8]
+	ldr	w1, [x21, 40]
+	bl	printf
+.L1383:
+	adrp	x0, .LANCHOR56
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	strh	wzr, [x0, x1, lsl 1]
+	mov	w0, -1
+.L1373:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x29, x30, [sp, 16]
+	ldr	x27, [sp, 96]
+	add	sp, sp, 112
+	ret
+.L1378:
+	cmp	w2, 2
+	bne	.L1380
+	sub	w0, w0, #1
+	add	w1, w23, w1
+	add	w0, w0, w1
+	orr	w0, w0, 33554432
+	b	.L1398
+.L1380:
+	add	w0, w0, w1
+	b	.L1398
+.L1382:
+	ldrh	w0, [x22, 22]
+	add	w23, w23, 1
+	add	w0, w0, 1
+	strh	w0, [x22, 22]
+.L1387:
+	ldrh	w0, [x22, 20]
+	cmp	w23, w0
+	ble	.L1385
+	add	w24, w24, 1
+	add	x25, x25, 2
+	b	.L1376
+.L1386:
+.L1384:
+	add	x19, x19, :lo12:.LANCHOR58
+	ldrh	w0, [x19, 16]
+	add	w0, w0, 1
+	strh	w0, [x19, 16]
+	mov	w0, 0
+	b	.L1373
+	.size	gc_check_data_one_wl, .-gc_check_data_one_wl
+	.section	.text.flash_prog_page,"ax",@progbits
+	.align	2
+	.global	flash_prog_page
+	.type	flash_prog_page, %function
+flash_prog_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR6
+	str	x27, [sp, 80]
+	stp	x21, x22, [sp, 32]
+	and	x19, x20, 255
+	ldr	x27, [x0, #:lo12:.LANCHOR6]
+	adrp	x0, .LANCHOR22
+	stp	x23, x24, [sp, 48]
+	mov	w21, w1
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	add	x23, x19, 8
+	stp	x25, x26, [sp, 64]
+	and	w24, w1, 2097151
+	mov	x25, x2
+	mov	x26, x3
+	ubfx	x22, x21, 24, 2
+	add	x23, x27, x23, lsl 8
+	tbz	x0, 4, .L1400
+	adrp	x0, .LC57
+	mov	w3, w4
+	mov	w2, w22
+	add	x0, x0, :lo12:.LC57
+	bl	printf
+.L1400:
+	bl	nandc_wait_flash_ready
+	mov	w0, w20
+	bl	hynix_reconfig_rr_para
+	mov	w0, w20
+	bl	nandc_cs
+	mov	w0, w20
+	cbnz	w22, .L1401
+	bl	flash_enter_slc_mode
+.L1402:
+	add	x19, x27, x19, lsl 8
+	mov	w0, 128
+	and	w21, w21, 255
+	str	w0, [x19, 2056]
+	lsr	w0, w24, 8
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w21, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w24, 16
+	str	w0, [x19, 2052]
+	mov	w0, w24
+	bl	nandc_set_seed
+	adrp	x0, .LANCHOR19+9
+	mov	x3, x26
+	mov	x2, x25
+	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	mov	w0, 16
+	str	w0, [x19, 2056]
+	bl	nandc_wait_flash_ready
+	mov	x0, x23
+	bl	flash_read_status
+	mov	w5, w0
+	cbnz	w22, .L1403
+	mov	w0, w20
+	bl	flash_exit_slc_mode
+.L1403:
+	mov	w0, w20
+	bl	nandc_de_cs
+	ldp	x19, x20, [sp, 16]
+	and	w0, w5, 4
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L1401:
+	bl	flash_exit_slc_mode
+	b	.L1402
+	.size	flash_prog_page, .-flash_prog_page
+	.section	.text.flash_test_blk,"ax",@progbits
+	.align	2
+	.global	flash_test_blk
+	.type	flash_test_blk, %function
+flash_test_blk:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w1, 65535
+	stp	x21, x22, [sp, 32]
+	ands	w21, w0, 255
+	str	x23, [sp, 48]
+	bne	.L1409
+	adrp	x0, .LANCHOR123
+	ldrb	w0, [x0, #:lo12:.LANCHOR123]
+	cmp	w0, w19
+	bhi	.L1413
+.L1409:
+	adrp	x22, .LANCHOR118
+	adrp	x23, .LANCHOR119
+	mov	w2, 32
+	mov	w1, 165
+	ldr	x0, [x22, #:lo12:.LANCHOR118]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR119]
+	mov	w2, 8
+	mov	w1, 90
+	bl	ftl_memset
+	adrp	x0, .LANCHOR13
+	ldrh	w20, [x0, #:lo12:.LANCHOR13]
+	mov	w0, w21
+	mul	w20, w20, w19
+	mov	w1, w20
+	bl	flash_erase_block
+	cmn	w0, #1
+	beq	.L1411
+	adrp	x19, .LANCHOR19
+	add	x19, x19, :lo12:.LANCHOR19
+	ldr	x3, [x22, #:lo12:.LANCHOR118]
+	mov	w1, w20
+	ldr	x2, [x23, #:lo12:.LANCHOR119]
+	mov	w0, w21
+	ldrb	w4, [x19, 9]
+	bl	flash_prog_page
+	cmn	w0, #1
+	beq	.L1411
+	ldrb	w4, [x19, 9]
+	mov	w1, w20
+	ldr	x3, [x22, #:lo12:.LANCHOR118]
+	mov	w0, w21
+	ldr	x2, [x23, #:lo12:.LANCHOR119]
+	bl	flash_read_page
+	mov	w19, w0
+	cmn	w0, #1
+	beq	.L1411
+	ldr	x0, [x23, #:lo12:.LANCHOR119]
+	ldr	w1, [x0]
+	mov	w0, 23130
+	movk	w0, 0x5a5a, lsl 16
+	cmp	w1, w0
+	bne	.L1411
+	ldr	x0, [x22, #:lo12:.LANCHOR118]
+	ldr	w1, [x0]
+	mov	w0, 42405
+	movk	w0, 0xa5a5, lsl 16
+	cmp	w1, w0
+	beq	.L1412
+.L1411:
+	mov	w19, -1
+.L1412:
+	mov	w1, w20
+	mov	w0, w21
+	bl	flash_erase_block
+	mov	w0, w19
+.L1408:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1413:
+	mov	w0, 0
+	b	.L1408
+	.size	flash_test_blk, .-flash_test_blk
+	.section	.text.flash_start_tlc_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_tlc_page_prog
+	.type	flash_start_tlc_page_prog, %function
+flash_start_tlc_page_prog:
+	stp	x29, x30, [sp, -48]!
+	and	w8, w0, 255
+	adrp	x0, .LANCHOR8
+	and	w3, w3, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	str	x21, [sp, 32]
+	cmp	w0, w3
+	bhi	.L1425
+	adrp	x1, .LANCHOR124
+	adrp	x0, .LC0
+	mov	w2, 655
+	add	x1, x1, :lo12:.LANCHOR124
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1426:
+	b	.L1426
+.L1425:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	and	w7, w1, 255
+	and	w21, w2, 255
+	ldrb	w20, [x0, w3, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x19, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w20
+	bl	nandc_cs
+	cbz	w8, .L1427
+	sxtw	x0, w20
+	add	x0, x0, 8
+	add	x0, x19, x0, lsl 8
+	str	w8, [x0, 8]
+.L1427:
+	ubfiz	x0, x20, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w7, [x19, 2056]
+	str	w0, [x19, 2056]
+	and	w0, w4, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w4, 16
+	add	w4, w4, w4, lsl 1
+	str	w0, [x19, 2052]
+	sub	w0, w4, #1
+	add	w0, w0, w7
+	bl	nandc_set_seed
+	mov	x3, x6
+	adrp	x0, .LANCHOR19+9
+	mov	x2, x5
+	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	str	w21, [x19, 2056]
+	mov	w0, w20
+	ldr	x21, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+	.size	flash_start_tlc_page_prog, .-flash_start_tlc_page_prog
+	.section	.text.queue_tlc_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_tlc_prog_cmd, %function
+queue_tlc_prog_cmd:
+	stp	x29, x30, [sp, -48]!
+	mov	w2, 26
+	mov	w1, 1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	str	x21, [sp, 32]
+	and	w21, w20, 2097151
+	ubfx	x20, x20, 21, 3
+	mov	w4, w21
+	ldrb	w0, [x0, 60]
+	mov	w3, w20
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 26
+	mov	w1, 2
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x19, 16]
+	mov	w4, w21
+	ldr	x7, [x19]
+	mov	w3, w20
+	mov	w2, 16
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 4
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	ldp	x19, x20, [sp, 16]
+	ldr	x21, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	b	buf_add_tail
+	.size	queue_tlc_prog_cmd, .-queue_tlc_prog_cmd
+	.section	.text.sblk_tlc_prog_one_page,"ax",@progbits
+	.align	2
+	.global	sblk_tlc_prog_one_page
+	.type	sblk_tlc_prog_one_page, %function
+sblk_tlc_prog_one_page:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	ldr	w20, [x0, 40]
+.L1435:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1436
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+.L1436:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1435
+	.size	sblk_tlc_prog_one_page, .-sblk_tlc_prog_one_page
+	.section	.text.sblk_xlc_prog_pages,"ax",@progbits
+	.align	2
+	.global	sblk_xlc_prog_pages
+	.type	sblk_xlc_prog_pages, %function
+sblk_xlc_prog_pages:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldr	x0, [x0]
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
+	stp	x23, x24, [sp, 48]
+	mov	w24, w2
+	ldr	w20, [x0, 40]
+.L1439:
+	mov	w1, 1
+	mov	w0, w20
+	bl	queue_lun_state
+	cbnz	w0, .L1440
+	cmp	w24, 2
+	bne	.L1441
+	ldr	x0, [x19]
+	mov	w2, 17
+	ldr	x1, [x22]
+	ldr	w20, [x0, 40]
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	and	w23, w20, 2097151
+	ldrb	w0, [x0, 60]
+	ubfx	x20, x20, 21, 3
+	mov	w4, w23
+	mov	w3, w20
+	ldr	w21, [x1, 40]
+	mov	w1, 1
+	bl	flash_start_tlc_page_prog
+	and	w21, w21, 2097151
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22]
+	mov	w3, w20
+	mov	w2, 26
+	mov	w1, 1
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldp	x7, x0, [x19]
+	mov	w4, w23
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 17
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w21
+	ldr	x0, [x22, 8]
+	mov	w3, w20
+	mov	w1, w24
+	mov	w2, 26
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x7, [x19]
+	mov	w4, w23
+	ldr	x0, [x19, 16]
+	mov	w3, w20
+	mov	w2, 17
+	mov	w1, 3
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	bl	nandc_wait_flash_ready
+	ldr	x0, [x22, 16]
+	mov	w1, 3
+	ldr	x7, [x19]
+	mov	w4, w21
+	mov	w3, w20
+	mov	w2, 16
+	ldr	x5, [x0, 8]
+	ldr	x6, [x0, 24]
+	ldrb	w0, [x7, 60]
+	bl	flash_start_tlc_page_prog
+	ldr	x1, [x19]
+	mov	w0, 5
+	strb	w0, [x1, 58]
+	mov	w0, 1
+	strb	w0, [x1, 59]
+	mov	w0, -1
+	strb	w0, [x1]
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	buf_add_tail
+.L1442:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1440:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1439
+.L1441:
+	mov	x0, x19
+	bl	queue_tlc_prog_cmd
+	b	.L1442
+	.size	sblk_xlc_prog_pages, .-sblk_xlc_prog_pages
+	.section	.text.flash_start_page_prog,"ax",@progbits
+	.align	2
+	.global	flash_start_page_prog
+	.type	flash_start_page_prog, %function
+flash_start_page_prog:
+	stp	x29, x30, [sp, -48]!
+	mov	w11, w1
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w20, w0, 255
+	adrp	x0, .LANCHOR8
+	str	x21, [sp, 32]
+	ubfx	x1, x11, 21, 3
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	cmp	w0, w1
+	bhi	.L1445
+	adrp	x1, .LANCHOR125
+	adrp	x0, .LC0
+	mov	w2, 692
+	add	x1, x1, :lo12:.LANCHOR125
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1446:
+	b	.L1446
+.L1445:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	mov	x12, x2
+	mov	x13, x3
+	and	w10, w11, 2097151
+	ldrb	w21, [x0, w1, sxtw]
+	adrp	x0, .LANCHOR6
+	ldr	x19, [x0, #:lo12:.LANCHOR6]
+	mov	w0, w21
+	bl	hynix_reconfig_rr_para
+	mov	w0, w21
+	bl	nandc_cs
+	tst	x11, 50331648
+	bne	.L1447
+	adrp	x0, .LANCHOR11
+	adrp	x1, .LANCHOR12
+	ldrb	w0, [x0, #:lo12:.LANCHOR11]
+	cbz	w0, .L1448
+	ldrb	w0, [x1, #:lo12:.LANCHOR12]
+	cbz	w0, .L1449
+.L1448:
+	adrp	x0, .LANCHOR13
+	ldrb	w1, [x1, #:lo12:.LANCHOR12]
+	ldrh	w2, [x0, #:lo12:.LANCHOR13]
+	udiv	w0, w10, w2
+	mul	w0, w0, w2
+	sub	w10, w10, w0
+	cbz	w1, .L1450
+	add	w10, w0, w10, lsl 1
+.L1449:
+	mov	w0, w21
+	bl	flash_enter_slc_mode
+	b	.L1451
+.L1450:
+	adrp	x1, .LANCHOR14
+	add	x1, x1, :lo12:.LANCHOR14
+	ldrh	w10, [x1, w10, uxtw 1]
+	add	w10, w10, w0
+.L1451:
+	ubfiz	x0, x21, 8, 8
+	add	x19, x19, x0
+	mov	w0, 128
+	str	w0, [x19, 2056]
+	and	w0, w10, 255
+	str	wzr, [x19, 2052]
+	str	wzr, [x19, 2052]
+	str	w0, [x19, 2052]
+	lsr	w0, w10, 8
+	str	w0, [x19, 2052]
+	lsr	w0, w10, 16
+	str	w0, [x19, 2052]
+	mov	w0, w10
+	bl	nandc_set_seed
+	mov	x3, x13
+	adrp	x0, .LANCHOR19+9
+	mov	x2, x12
+	ldrb	w1, [x0, #:lo12:.LANCHOR19+9]
+	mov	w0, 1
+	bl	nandc_xfer_start
+	bl	nandc_xfer_done
+	mov	w0, w21
+	ldr	x21, [sp, 32]
+	str	w20, [x19, 2056]
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 48
+	b	nandc_de_cs
+.L1447:
+	mov	w0, w21
+	bl	flash_exit_slc_mode
+	b	.L1451
+	.size	flash_start_page_prog, .-flash_start_page_prog
+	.section	.text.queue_prog_cmd,"ax",@progbits
+	.align	2
+	.type	queue_prog_cmd, %function
+queue_prog_cmd:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	ldr	w1, [x0, 40]
+	ldr	x3, [x0, 24]
+	ldr	x2, [x0, 8]
+	str	x19, [sp, 16]
+	mov	x19, x0
+	mov	w0, 16
+	bl	flash_start_page_prog
+	adrp	x0, .LANCHOR90
+	ldr	w3, [x19, 40]
+	ldrb	w1, [x0, #:lo12:.LANCHOR90]
+	cmp	w1, 255
+	beq	.L1457
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
+	ubfx	x3, x3, 21, 3
+	mov	x6, x2
+.L1459:
+	add	x4, x2, x1, lsl 6
+	ldr	w5, [x4, 40]
+	ubfx	x5, x5, 21, 3
+	cmp	w3, w5
+	bne	.L1458
+	ldrb	w5, [x4, 58]
+	cmp	w5, 6
+	bne	.L1458
+	mov	w1, 3
+	strb	w1, [x4, 58]
+.L1457:
+	mov	w1, 3
+	strb	w1, [x19, 58]
+	mov	w1, 1
+	strb	w1, [x19, 59]
+	mov	w1, -1
+	strb	w1, [x19]
+	mov	x1, x19
+	add	x0, x0, :lo12:.LANCHOR90
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	b	buf_add_tail
+.L1458:
+	lsl	x1, x1, 6
+	ldrb	w1, [x6, x1]
+	cmp	w1, 255
+	bne	.L1459
+	b	.L1457
+	.size	queue_prog_cmd, .-queue_prog_cmd
+	.section	.text.sblk_prog_page,"ax",@progbits
+	.align	2
+	.global	sblk_prog_page
+	.type	sblk_prog_page, %function
+sblk_prog_page:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	ldrh	w0, [x0, 50]
+	and	w20, w1, 255
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cbz	w0, .L1466
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1466
+	ldr	w1, [x19, 40]
+	adrp	x0, .LC58
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC58
+	bl	printf
+.L1466:
+	adrp	x24, .LANCHOR23
+	adrp	x22, .LANCHOR36
+	add	x24, x24, :lo12:.LANCHOR23
+	add	x22, x22, :lo12:.LANCHOR36
+	mov	w21, 0
+	mov	w23, 1
+.L1467:
+	cbnz	w20, .L1478
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1478:
+	ldrb	w25, [x19]
+	ldr	w26, [x19, 40]
+.L1468:
+	mov	w1, 1
+	mov	w0, w26
+	bl	queue_lun_state
+	cbnz	w0, .L1469
+	cmp	w20, 1
+	beq	.L1470
+	ldrb	w0, [x24]
+	cbnz	w0, .L1471
+.L1470:
+	mov	x0, x19
+	bl	queue_prog_cmd
+.L1472:
+	ubfiz	x19, x25, 6, 8
+	sub	w20, w20, #1
+	add	x19, x22, x19
+	b	.L1467
+.L1469:
+	bl	queue_wait_first_req_completed
+	bl	queue_remove_completed_req
+	b	.L1468
+.L1471:
+	ldrb	w0, [x19]
+	ubfx	x1, x26, 21, 3
+	cmp	w0, 255
+	bne	.L1473
+	adrp	x1, .LANCHOR126
+	adrp	x0, .LC0
+	mov	w2, 478
+	add	x1, x1, :lo12:.LANCHOR126
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1474:
+	b	.L1474
+.L1473:
+	sbfiz	x0, x0, 6, 32
+	add	x0, x22, x0
+	ldr	w5, [x0, 40]
+	ubfx	x0, x5, 21, 3
+	cmp	w1, w0
+	bne	.L1475
+	adrp	x0, .LANCHOR71
+	ldrh	w2, [x0, #:lo12:.LANCHOR71]
+	adrp	x0, .LANCHOR70
+	ldrb	w3, [x0, #:lo12:.LANCHOR70]
+	mov	w0, 21
+	sub	w0, w0, w2
+	lsl	w1, w23, w2
+	sub	w3, w3, #1
+	sub	w1, w1, #1
+	lsl	w0, w23, w0
+	sub	w0, w0, #1
+	and	w0, w0, w3
+	lsr	w4, w26, w2
+	and	w0, w0, 65535
+	and	w1, w1, 65535
+	and	w4, w0, w4
+	lsr	w2, w5, w2
+	and	w0, w0, w2
+	and	w26, w1, w26
+	cmp	w4, w0
+	and	w1, w1, w5
+	ccmp	w26, w1, 0, ne
+	bne	.L1475
+	cmp	w21, w3
+	beq	.L1475
+	ldr	w1, [x19, 40]
+	mov	w0, 17
+	ldr	x2, [x19, 8]
+	add	w21, w21, 1
+	ldr	x3, [x19, 24]
+	bl	flash_start_page_prog
+	strb	w23, [x19, 59]
+	mov	w0, 8
+	strb	w0, [x19, 58]
+	mov	w0, -1
+	strb	w0, [x19]
+	mov	x1, x19
+	adrp	x0, .LANCHOR90
+	add	x0, x0, :lo12:.LANCHOR90
+	bl	buf_add_tail
+	b	.L1472
+.L1475:
+	mov	x0, x19
+	mov	w21, 0
+	bl	queue_prog_cmd
+	b	.L1472
+	.size	sblk_prog_page, .-sblk_prog_page
+	.section	.text.ftl_flush,"ax",@progbits
+	.align	2
+	.global	ftl_flush
+	.type	ftl_flush, %function
+ftl_flush:
+	stp	x29, x30, [sp, -32]!
+	adrp	x0, .LANCHOR89
+	add	x29, sp, 0
+	ldrb	w1, [x0, #:lo12:.LANCHOR89]
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	adrp	x20, .LANCHOR127
+	cbz	w1, .L1490
+	ldrb	w2, [x20, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+	add	x0, x0, x2, lsl 6
+	bl	sblk_prog_page
+.L1490:
+	mov	w0, -1
+	strb	wzr, [x19, #:lo12:.LANCHOR89]
+	strb	w0, [x20, #:lo12:.LANCHOR127]
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	ldp	x19, x20, [sp, 16]
+	mov	w0, -1
+	ldp	x29, x30, [sp], 32
+	b	ftl_vpn_decrement
+	.size	ftl_flush, .-ftl_flush
+	.section	.text.flash_prog_page_en,"ax",@progbits
+	.align	2
+	.global	flash_prog_page_en
+	.type	flash_prog_page_en, %function
+flash_prog_page_en:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	and	w24, w0, 255
+	adrp	x0, .LANCHOR8
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	ldrb	w0, [x0, #:lo12:.LANCHOR8]
+	stp	x25, x26, [sp, 64]
+	cmp	w0, w24
+	bhi	.L1496
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC0
+	mov	w2, 480
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1497:
+	b	.L1497
+.L1496:
+	adrp	x0, .LANCHOR10
+	add	x0, x0, :lo12:.LANCHOR10
+	mov	w20, w1
+	mov	x23, x2
+	mov	x22, x3
+	mov	w25, w4
+	and	w21, w5, 255
+	ldrb	w26, [x0, w24, sxtw]
+	tst	x20, 50331648
+	bne	.L1508
+	adrp	x0, .LANCHOR11
+	ldrb	w1, [x0, #:lo12:.LANCHOR11]
+	adrp	x0, .LANCHOR12
+	cbz	w1, .L1499
+	ldrb	w1, [x0, #:lo12:.LANCHOR12]
+	cbz	w1, .L1508
+.L1499:
+	adrp	x1, .LANCHOR13
+	ldrb	w0, [x0, #:lo12:.LANCHOR12]
+	ldrh	w1, [x1, #:lo12:.LANCHOR13]
+	udiv	w19, w20, w1
+	mul	w19, w19, w1
+	sub	w1, w20, w19
+	cbz	w0, .L1500
+	add	w19, w19, w1, lsl 1
+.L1498:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 4, .L1501
+	adrp	x0, .LC59
+	mov	w2, w20
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC59
+	bl	printf
+.L1501:
+	mov	w0, w26
+	mov	w4, w25
+	mov	x3, x22
+	mov	x2, x23
+	mov	w1, w19
+	bl	flash_prog_page
+	mov	w26, w0
+	cbz	w21, .L1502
+	adrp	x21, .LANCHOR118
+	adrp	x19, .LANCHOR119
+	mov	w4, w25
+	mov	w1, w20
+	ldr	x3, [x21, #:lo12:.LANCHOR118]
+	mov	w0, w24
+	ldr	x2, [x19, #:lo12:.LANCHOR119]
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L1503
+	ldr	x0, [x19, #:lo12:.LANCHOR119]
+	ldr	w1, [x23]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	bne	.L1503
+	ldr	x0, [x21, #:lo12:.LANCHOR118]
+	ldr	w1, [x22]
+	ldr	w0, [x0]
+	cmp	w1, w0
+	beq	.L1502
+.L1503:
+	ldr	x1, [x21, #:lo12:.LANCHOR118]
+	mov	w3, 4
+	adrp	x0, .LC60
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC60
+	bl	rknand_print_hex
+	ldr	x1, [x19, #:lo12:.LANCHOR119]
+	mov	w3, 4
+	adrp	x0, .LC61
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC61
+	bl	rknand_print_hex
+.L1504:
+	mov	w1, w20
+	adrp	x0, .LC62
+	add	x0, x0, :lo12:.LC62
+	bl	printf
+	adrp	x1, .LANCHOR128
+	adrp	x0, .LC0
+	mov	w2, 506
+	add	x1, x1, :lo12:.LANCHOR128
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1506:
+	b	.L1506
+.L1500:
+	adrp	x0, .LANCHOR14
+	add	x0, x0, :lo12:.LANCHOR14
+	ldrh	w0, [x0, w1, uxtw 1]
+	add	w19, w0, w19
+	b	.L1498
+.L1508:
+	mov	w19, w20
+	b	.L1498
+.L1502:
+	cmn	w26, #1
+	beq	.L1504
+	mov	w0, w26
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	flash_prog_page_en, .-flash_prog_page_en
+	.section	.text.ftl_test_block,"ax",@progbits
+	.align	2
+	.global	ftl_test_block
+	.type	ftl_test_block, %function
+ftl_test_block:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, ftl_tmp_buffer
+	adrp	x22, .LANCHOR121
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR76
+	add	x24, x24, :lo12:.LANCHOR76
+	stp	x25, x26, [sp, 64]
+	and	w26, w0, 65535
+	stp	x19, x20, [sp, 16]
+	adrp	x25, .LANCHOR70
+	stp	x27, x28, [sp, 80]
+	add	x0, x25, :lo12:.LANCHOR70
+	str	wzr, [x21, #:lo12:ftl_tmp_buffer]
+	mov	w19, 0
+	str	wzr, [x22, #:lo12:.LANCHOR121]
+	str	x0, [x29, 112]
+.L1520:
+	ldrb	w0, [x24]
+	cmp	w0, w19
+	bls	.L1527
+	add	x0, x25, :lo12:.LANCHOR70
+	adrp	x23, .LANCHOR22
+	mov	w20, 0
+	add	x23, x23, :lo12:.LANCHOR22
+	str	x0, [x29, 120]
+	b	.L1528
+.L1526:
+	ldr	w0, [x23]
+	tbz	x0, 12, .L1521
+	adrp	x0, .LC63
+	mov	w1, w26
+	add	x0, x0, :lo12:.LC63
+	bl	printf
+.L1521:
+	ldr	x0, [x29, 112]
+	ldrb	w6, [x0]
+	madd	w6, w26, w6, w20
+	and	w28, w6, 65535
+	cbnz	w19, .L1522
+	adrp	x0, .LANCHOR5
+	ldr	x0, [x0, #:lo12:.LANCHOR5]
+	ldrb	w0, [x0, 47]
+	cmp	w0, w28
+	bcs	.L1523
+.L1522:
+	and	w27, w19, 255
+	mov	w1, w28
+	mov	w0, w27
+	bl	flash_check_bad_block
+	cbnz	w0, .L1523
+	adrp	x0, .LANCHOR75
+	ldrh	w8, [x0, #:lo12:.LANCHOR75]
+	mov	w0, w27
+	mul	w8, w8, w28
+	str	w8, [x29, 108]
+	mov	w1, w8
+	bl	flash_erase_block
+	ldr	w8, [x29, 108]
+	cbz	w0, .L1525
+.L1536:
+	mov	w1, w28
+	mov	w0, w27
+	bl	flash_mask_bad_block
+	b	.L1523
+.L1525:
+	adrp	x0, .LANCHOR45
+	mov	w5, 1
+	add	x3, x22, :lo12:.LANCHOR121
+	add	x2, x21, :lo12:ftl_tmp_buffer
+	ldrb	w4, [x0, #:lo12:.LANCHOR45]
+	mov	w1, w8
+	mov	w0, w27
+	bl	flash_prog_page_en
+	cbnz	w0, .L1536
+.L1523:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+.L1528:
+	ldr	x0, [x29, 120]
+	ldrb	w0, [x0]
+	cmp	w0, w20
+	bhi	.L1526
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1520
+.L1527:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+	.size	ftl_test_block, .-ftl_test_block
+	.section	.text.ftl_prog_page,"ax",@progbits
+	.align	2
+	.global	ftl_prog_page
+	.type	ftl_prog_page, %function
+ftl_prog_page:
+	stp	x29, x30, [sp, -64]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	and	w19, w0, 255
+	stp	x21, x22, [sp, 32]
+	mov	w20, w1
+	mov	x21, x2
+	mov	x22, x3
+	str	x23, [sp, 48]
+	mov	w23, w4
+	bl	sblk_wait_write_queue_completed
+	mov	w5, 1
+	mov	w4, w23
+	mov	x3, x22
+	mov	x2, x21
+	mov	w1, w20
+	mov	w0, w19
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	bne	.L1537
+	adrp	x1, .LANCHOR129
+	adrp	x0, .LC0
+	mov	w2, 1414
+	add	x1, x1, :lo12:.LANCHOR129
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1539:
+	b	.L1539
+.L1537:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	ftl_prog_page, .-ftl_prog_page
+	.section	.text.ftl_info_flush,"ax",@progbits
+	.align	2
+	.global	ftl_info_flush
+	.type	ftl_info_flush, %function
+ftl_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR45
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR131
+	ldrb	w2, [x21, #:lo12:.LANCHOR45]
+	mov	x23, x22
+	stp	x25, x26, [sp, 64]
+	adrp	x25, .LANCHOR75
+	stp	x27, x28, [sp, 80]
+	mov	w26, 0
+	stp	x19, x20, [sp, 16]
+	lsl	w2, w2, 1
+	adrp	x20, .LANCHOR130
+	str	w0, [x29, 108]
+	mov	x24, x25
+	add	x27, x22, :lo12:.LANCHOR131
+	add	x28, x25, :lo12:.LANCHOR75
+	add	x0, x20, :lo12:.LANCHOR130
+	bl	ftl_memset
+.L1542:
+	add	x0, x22, :lo12:.LANCHOR131
+	ldr	w1, [x29, 108]
+	ldrb	w6, [x22, #:lo12:.LANCHOR131]
+	ldrh	w19, [x25, #:lo12:.LANCHOR75]
+	ldrh	w4, [x0, 2]
+	adrp	x0, .LANCHOR46
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldr	w3, [x0, 4]
+	add	w3, w3, 1
+	str	w3, [x0, 4]
+	add	x0, x20, :lo12:.LANCHOR130
+	str	w1, [x20, #:lo12:.LANCHOR130]
+	str	w3, [x0, 4]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1543
+	mov	w2, w4
+	mov	w1, w6
+	stp	w4, w6, [x29, 100]
+	adrp	x0, .LC64
+	add	x0, x0, :lo12:.LC64
+	bl	printf
+	ldp	w4, w6, [x29, 100]
+.L1543:
+	adrp	x1, .LANCHOR79
+	ldrh	w0, [x27, 2]
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	cmp	w1, w0
+	bhi	.L1544
+	adrp	x1, .LANCHOR5
+	ldrb	w0, [x27, 1]
+	ldrb	w2, [x27]
+	mov	w4, 0
+	ldr	x6, [x1, #:lo12:.LANCHOR5]
+.L1551:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, 7
+	bls	.L1545
+	mov	x1, 0
+.L1550:
+	add	x3, x6, x1
+	and	w7, w1, 65535
+	ldrb	w8, [x3, 40]
+	add	w3, w8, 127
+	and	w3, w3, 255
+	cmp	w3, 125
+	bhi	.L1546
+	add	x1, x23, :lo12:.LANCHOR131
+	strb	w0, [x1, 1]
+	cbz	w4, .L1547
+	strb	w2, [x23, #:lo12:.LANCHOR131]
+.L1547:
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	mov	w2, 156
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1548:
+	b	.L1548
+.L1546:
+	cmp	w8, 255
+	bne	.L1549
+	add	x1, x1, 1
+	cmp	x1, 8
+	bne	.L1550
+	mov	w7, w1
+.L1549:
+	and	w0, w7, 255
+	mov	w26, 1
+.L1545:
+	add	w1, w0, 8
+	mov	w4, 1
+	add	x1, x6, x1, sxtw
+	ldrb	w2, [x1, 32]
+	cmp	w2, 255
+	beq	.L1551
+	ldrh	w19, [x28]
+	strb	w0, [x27, 1]
+	mov	w0, 0
+	strb	w2, [x27]
+	mul	w19, w19, w2
+	mov	w1, w19
+	bl	flash_erase_block
+	ldrb	w4, [x21, #:lo12:.LANCHOR45]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR130
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	mov	w0, 1
+	add	w19, w19, w0
+	strh	w0, [x27, 2]
+.L1552:
+	ldrb	w4, [x21, #:lo12:.LANCHOR45]
+	mov	w1, w19
+	add	x3, x20, :lo12:.LANCHOR130
+	adrp	x2, ftl_info_data_buffer
+	mov	w0, 0
+	add	x2, x2, :lo12:ftl_info_data_buffer
+	bl	ftl_prog_page
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	beq	.L1542
+	cbnz	w26, .L1553
+.L1561:
+	ldrb	w0, [x23, #:lo12:.LANCHOR131]
+	cmp	w0, 255
+	bne	.L1577
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	mov	w2, 191
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1562:
+	b	.L1562
+.L1544:
+	madd	w19, w19, w6, w4
+	cbnz	w0, .L1552
+	mov	w1, w19
+	bl	flash_erase_block
+	b	.L1552
+.L1553:
+	ldrb	w19, [x27, 1]
+	add	x24, x24, :lo12:.LANCHOR75
+	adrp	x20, .LANCHOR5
+	add	w19, w19, 1
+.L1556:
+	cmp	w19, 7
+	bhi	.L1561
+	ldr	x1, [x20, #:lo12:.LANCHOR5]
+	add	w0, w19, 8
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1557
+	adrp	x1, .LANCHOR132
+	adrp	x0, .LC0
+	mov	w2, 184
+	add	x1, x1, :lo12:.LANCHOR132
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1558:
+	b	.L1558
+.L1557:
+	cmp	w0, 255
+	beq	.L1559
+	ldrh	w1, [x24]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_erase_block
+.L1559:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1556
+.L1577:
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	ftl_info_flush, .-ftl_info_flush
+	.section	.text.ftl_info_blk_init,"ax",@progbits
+	.align	2
+	.global	ftl_info_blk_init
+	.type	ftl_info_blk_init, %function
+ftl_info_blk_init:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR133
+	adrp	x1, .LANCHOR59
+	mov	w2, 16384
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, ftl_info_data_buffer
+	strb	wzr, [x0, #:lo12:.LANCHOR133]
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR59]
+	adrp	x1, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	ldrh	w1, [x1, #:lo12:.LANCHOR54]
+	adrp	x21, .LANCHOR131
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR75
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR5
+	add	x1, x0, x1, lsl 2
+	stp	x27, x28, [sp, 80]
+	str	x1, [x22, #:lo12:.LANCHOR46]
+	mov	w1, 0
+	bl	ftl_memset
+	adrp	x25, .LANCHOR45
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	mov	w27, 21574
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	add	x0, x21, :lo12:.LANCHOR131
+	add	x26, x26, :lo12:.LANCHOR75
+	add	x25, x25, :lo12:.LANCHOR45
+	mov	x19, 7
+	movk	w27, 0x494c, lsl 16
+	strb	wzr, [x0, 1]
+	ldrb	w1, [x1, 40]
+	strb	w1, [x21, #:lo12:.LANCHOR131]
+	strh	wzr, [x0, 2]
+.L1581:
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	add	w0, w19, 8
+	sxth	w24, w19
+	mov	w28, w19
+	add	x0, x1, x0, sxtw
+	ldrb	w0, [x0, 32]
+	cmp	w0, 255
+	bne	.L1580
+.L1585:
+	sub	x19, x19, #1
+	cmn	x19, #1
+	bne	.L1581
+	mov	w24, 0
+.L1582:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1586
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w2, 4800
+	mov	w1, w19
+	ldr	w3, [x0]
+	adrp	x0, .LC66
+	add	x0, x0, :lo12:.LC66
+	bl	printf
+.L1586:
+	cmn	w19, #1
+	bne	.L1587
+	mov	w1, 0
+	mov	w2, 16384
+	add	x0, x20, :lo12:ftl_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w1, 21574
+	movk	w1, 0x494c, lsl 16
+	str	w1, [x0]
+	mov	w0, w19
+.L1579:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L1580:
+	ldrh	w6, [x26]
+	add	x8, x20, :lo12:ftl_info_data_buffer
+	ldrb	w4, [x25]
+	adrp	x7, .LANCHOR130
+	add	x7, x7, :lo12:.LANCHOR130
+	mov	x2, x8
+	mov	x3, x7
+	stp	x7, x8, [x29, 104]
+	mul	w6, w6, w0
+	mov	w0, 0
+	str	w6, [x29, 124]
+	mov	w1, w6
+	bl	ftl_read_page
+	mov	w5, w0
+	cmn	w0, #1
+	ldr	w6, [x29, 124]
+	ldp	x7, x8, [x29, 104]
+	bne	.L1583
+	ldrb	w4, [x25]
+	mov	x3, x7
+	mov	x2, x8
+	add	w1, w6, 1
+	mov	w0, 0
+	bl	ftl_read_page
+	mov	w5, w0
+.L1583:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1584
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w2, w5
+	str	w5, [x29, 124]
+	mov	w3, 64
+	mov	w1, w28
+	ldr	w4, [x0]
+	adrp	x0, .LC65
+	add	x0, x0, :lo12:.LC65
+	bl	printf
+	ldr	w5, [x29, 124]
+.L1584:
+	cmn	w5, #1
+	beq	.L1585
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1585
+	mov	w19, w24
+	b	.L1582
+.L1587:
+	ldr	x1, [x23, #:lo12:.LANCHOR5]
+	add	w0, w24, 8
+	add	x20, x20, :lo12:ftl_info_data_buffer
+	mov	w4, 4
+	mov	x2, x20
+	adrp	x26, .LANCHOR45
+	add	x0, x1, x0, sxtw
+	mov	w27, 21574
+	add	x26, x26, :lo12:.LANCHOR45
+	movk	w27, 0x494c, lsl 16
+	ldrb	w1, [x0, 32]
+	add	x0, x21, :lo12:.LANCHOR131
+	strb	w1, [x21, #:lo12:.LANCHOR131]
+	strb	w24, [x0, 1]
+	adrp	x24, .LANCHOR130
+	add	x24, x24, :lo12:.LANCHOR130
+	mov	w0, 0
+	mov	x3, x24
+	bl	flash_get_last_written_page
+	sxth	w23, w0
+	add	w0, w0, 1
+	and	w19, w0, 65535
+	adrp	x0, .LANCHOR75
+	ldrb	w25, [x21, #:lo12:.LANCHOR131]
+	ldrh	w0, [x0, #:lo12:.LANCHOR75]
+	madd	w25, w25, w0, w23
+.L1589:
+	tbnz	w23, #31, .L1594
+	ldrb	w4, [x26]
+	mov	x3, x24
+	mov	x2, x20
+	mov	w1, w25
+	mov	w0, 0
+	bl	ftl_read_page
+	cmn	w0, #1
+	beq	.L1590
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x0]
+	cmp	w0, w27
+	bne	.L1590
+.L1594:
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	add	x21, x21, :lo12:.LANCHOR131
+	strh	w19, [x21, 2]
+	ldr	w1, [x0, 16]
+	cmp	w1, 2048
+	bhi	.L1591
+.L1592:
+	ldr	w1, [x0, 24]
+	cmp	w1, 2048
+	bls	.L1595
+	ldr	w2, [x0, 28]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 24]
+.L1595:
+	ldr	w1, [x0, 32]
+	cmp	w1, 1024
+	bls	.L1596
+	ldr	w2, [x0, 36]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 32]
+.L1596:
+	ldr	w1, [x0, 40]
+	cmp	w1, 1024
+	bls	.L1597
+	ldr	w2, [x0, 44]
+	add	w2, w2, w1, lsr 10
+	and	w1, w1, 1023
+	stp	w1, w2, [x0, 40]
+.L1597:
+	ldr	w1, [x0, 64]
+	add	w1, w1, 1
+	str	w1, [x0, 64]
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	mov	w0, 0
+	b	.L1579
+.L1590:
+	sub	w23, w23, #1
+	sub	w25, w25, #1
+	sxth	w23, w23
+	b	.L1589
+.L1591:
+	ldr	w2, [x0, 20]
+	add	w2, w2, w1, lsr 11
+	and	w1, w1, 2047
+	stp	w1, w2, [x0, 16]
+	b	.L1592
+	.size	ftl_info_blk_init, .-ftl_info_blk_init
+	.section	.text.ftl_ext_info_flush,"ax",@progbits
+	.align	2
+	.global	ftl_ext_info_flush
+	.type	ftl_ext_info_flush, %function
+ftl_ext_info_flush:
+	stp	x29, x30, [sp, -96]!
+	adrp	x0, .LANCHOR60
+	add	x29, sp, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	ldr	w1, [x0, 520]
+	stp	x25, x26, [sp, 64]
+	str	x27, [sp, 80]
+	cbz	w1, .L1613
+	str	wzr, [x0, 520]
+.L1613:
+	adrp	x24, .LANCHOR46
+	adrp	x20, .LANCHOR79
+	adrp	x21, .LANCHOR71
+	add	x20, x20, :lo12:.LANCHOR79
+	mov	x22, x24
+	add	x21, x21, :lo12:.LANCHOR71
+	mov	w0, 0
+	bl	ftl_total_vpn_update
+.L1622:
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	ldr	w1, [x0, 56]
+	add	w1, w1, 1
+	str	w1, [x0, 56]
+	ldrh	w1, [x0, 140]
+	ldrh	w0, [x20]
+	cmp	w1, w0
+	bcc	.L1614
+	bl	ftl_ext_alloc_new_blk
+.L1614:
+	ldr	x2, [x22, #:lo12:.LANCHOR46]
+	mov	w0, 65535
+	ldrh	w1, [x2, 130]
+	cmp	w1, w0
+	bne	.L1615
+	adrp	x1, .LANCHOR134
+	adrp	x0, .LC0
+	mov	w2, 1048
+	add	x1, x1, :lo12:.LANCHOR134
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1616:
+	b	.L1616
+.L1615:
+	ldrh	w0, [x21]
+	mov	w19, 21
+	adrp	x25, .LANCHOR45
+	adrp	x26, .LANCHOR130
+	sub	w0, w19, w0
+	mov	w19, 1
+	add	x23, x26, :lo12:.LANCHOR130
+	asr	w27, w1, w0
+	lsl	w19, w19, w0
+	adrp	x0, .LANCHOR75
+	sub	w19, w19, #1
+	and	w19, w19, w1
+	ldrh	w1, [x0, #:lo12:.LANCHOR75]
+	ldrh	w0, [x2, 140]
+	ldrb	w2, [x25, #:lo12:.LANCHOR45]
+	madd	w19, w19, w1, w0
+	lsl	w2, w2, 1
+	mov	w1, 0
+	mov	x0, x23
+	bl	ftl_memset
+	and	w19, w19, 65535
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	mov	w1, w19
+	ldrb	w4, [x25, #:lo12:.LANCHOR45]
+	mov	x3, x23
+	str	wzr, [x26, #:lo12:.LANCHOR130]
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	ldr	w0, [x0, 56]
+	str	w0, [x23, 4]
+	mov	w0, w27
+	bl	ftl_prog_page
+	ldr	x2, [x22, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 140]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 140]
+	cmp	w1, 1
+	beq	.L1622
+	cmn	w0, #1
+	beq	.L1622
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	ftl_ext_info_flush, .-ftl_ext_info_flush
+	.section	.text.ftl_ext_info_init,"ax",@progbits
+	.align	2
+	.global	ftl_ext_info_init
+	.type	ftl_ext_info_init, %function
+ftl_ext_info_init:
+	stp	x29, x30, [sp, -112]!
+	adrp	x0, .LANCHOR86
+	mov	w4, 4
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	strh	wzr, [x0, #:lo12:.LANCHOR86]
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	adrp	x25, ftl_ext_info_data_buffer
+	stp	x23, x24, [sp, 48]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	ldrh	w19, [x0, 130]
+	adrp	x0, .LANCHOR71
+	stp	x27, x28, [sp, 80]
+	adrp	x24, .LANCHOR130
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	and	w26, w19, 16383
+	add	x3, x24, :lo12:.LANCHOR130
+	sub	w0, w0, w1
+	mov	w1, w26
+	asr	w19, w19, w0
+	and	w19, w19, 255
+	mov	w0, w19
+	bl	flash_get_last_written_page
+	sxth	w21, w0
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1628
+	adrp	x1, .LANCHOR135
+	adrp	x0, .LC28
+	mov	w3, w21
+	mov	w2, 1091
+	add	x1, x1, :lo12:.LANCHOR135
+	add	x0, x0, :lo12:.LC28
+	bl	printf
+.L1628:
+	adrp	x27, .LANCHOR45
+	adrp	x28, .LANCHOR75
+	mov	w5, 20038
+	add	x27, x27, :lo12:.LANCHOR45
+	add	x28, x28, :lo12:.LANCHOR75
+	mov	w23, 0
+	movk	w5, 0x4549, lsl 16
+.L1629:
+	and	w20, w21, 65535
+	sub	w0, w20, w23
+	tbnz	x0, 15, .L1634
+	ldrh	w0, [x28]
+	sub	w1, w21, w23
+	ldrb	w4, [x27]
+	add	x3, x24, :lo12:.LANCHOR130
+	str	w5, [x29, 108]
+	add	x2, x25, :lo12:ftl_ext_info_data_buffer
+	madd	w1, w0, w26, w1
+	mov	w0, w19
+	bl	flash_read_page_en
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	ldr	w5, [x29, 108]
+	beq	.L1630
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldr	w0, [x0]
+	cmp	w0, w5
+	bne	.L1630
+.L1634:
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 140]
+	cmp	w1, w21
+	bgt	.L1632
+	add	w20, w20, 1
+	strh	w20, [x0, 140]
+	bl	ftl_ext_info_flush
+.L1632:
+	adrp	x0, .LANCHOR60
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	wzr, [x0, 520]
+	adrp	x0, .LANCHOR87
+	strh	w1, [x0, #:lo12:.LANCHOR87]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 112
+	ret
+.L1630:
+	add	w23, w23, 1
+	b	.L1629
+	.size	ftl_ext_info_init, .-ftl_ext_info_init
+	.section	.text.ftl_low_format,"ax",@progbits
+	.align	2
+	.global	ftl_low_format
+	.type	ftl_low_format, %function
+ftl_low_format:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR75
+	stp	x21, x22, [sp, 32]
+	add	x20, x20, :lo12:.LANCHOR75
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR5
+	mov	x24, x21
+	stp	x25, x26, [sp, 64]
+	mov	w19, 8
+.L1646:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	add	x0, x0, x19, sxtw
+	ldrb	w0, [x0, 32]
+	add	w1, w0, 127
+	and	w1, w1, 255
+	cmp	w1, 125
+	bhi	.L1643
+	adrp	x1, .LANCHOR136
+	adrp	x0, .LC0
+	mov	w2, 1228
+	add	x1, x1, :lo12:.LANCHOR136
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1644:
+	b	.L1644
+.L1643:
+	cmp	w0, 255
+	beq	.L1645
+	ldrh	w1, [x20]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_erase_block
+.L1645:
+	add	w19, w19, 1
+	cmp	w19, 16
+	bne	.L1646
+	bl	sblk_init
+	adrp	x19, .LANCHOR46
+	bl	ftl_info_blk_init
+	adrp	x20, .LANCHOR54
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_info_data_buffer
+	add	x0, x0, :lo12:ftl_info_data_buffer
+	bl	ftl_memset
+	add	x25, x20, :lo12:.LANCHOR54
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 21574
+	movk	w1, 0x494c, lsl 16
+	mov	w21, 0
+	mov	w26, 1
+	str	w1, [x0]
+.L1647:
+	ldrh	w0, [x25]
+	adrp	x22, .LANCHOR70
+	adrp	x23, .LANCHOR59
+	cmp	w0, w21
+	bhi	.L1655
+	adrp	x21, .LANCHOR60
+	mov	w1, 0
+	mov	w2, 16384
+	adrp	x0, ftl_ext_info_data_buffer
+	add	x0, x0, :lo12:ftl_ext_info_data_buffer
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, 20038
+	movk	w1, 0x4549, lsl 16
+	mov	w3, 3
+	str	w1, [x0]
+	ldr	x0, [x24, #:lo12:.LANCHOR5]
+	ldrb	w5, [x22, #:lo12:.LANCHOR70]
+	ldr	x1, [x23, #:lo12:.LANCHOR59]
+	cmp	w5, 1
+	ldrb	w0, [x0, 47]
+	csinc	w3, w3, wzr, ne
+	and	w3, w3, 255
+	udiv	w0, w0, w5
+	add	w24, w0, 1
+	ubfiz	x0, x0, 2, 8
+	add	x0, x0, 4
+	add	x0, x1, x0
+.L1656:
+	ldrb	w2, [x1, 2]
+	add	x1, x1, 4
+	strb	w3, [x1, -1]
+	orr	w2, w2, -32
+	and	w2, w2, -25
+	strb	w2, [x1, -2]
+	cmp	x1, x0
+	bne	.L1656
+	mov	w4, 16
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	sdiv	w4, w4, w5
+	add	w4, w24, w4
+	and	w4, w4, 65535
+	strh	w4, [x0, 134]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1657
+	adrp	x0, .LC67
+	mov	w3, w24
+	mov	w2, 128
+	mov	w1, 1265
+	add	x0, x0, :lo12:.LC67
+	bl	printf
+.L1657:
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 160
+	bl	ftl_memset
+	ldrb	w11, [x22, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR76
+	adrp	x22, .LANCHOR71
+	ldr	x3, [x19, #:lo12:.LANCHOR46]
+	and	w13, w11, 65535
+	ldrb	w12, [x0, #:lo12:.LANCHOR76]
+	ldrh	w0, [x22, #:lo12:.LANCHOR71]
+	mov	w5, 21
+	ldr	x2, [x23, #:lo12:.LANCHOR59]
+	mov	w4, 0
+	sub	w0, w5, w0
+	mul	w1, w24, w13
+	mov	w5, 1
+	ldrh	w7, [x3, 134]
+	lsl	w5, w5, w0
+	and	w1, w1, 65535
+	and	w5, w5, 65535
+.L1658:
+	cmp	w24, w7
+	bcc	.L1664
+	ldrh	w5, [x20, #:lo12:.LANCHOR54]
+	add	x0, x2, x7, uxth 2
+	mov	w1, w7
+	mov	w6, 1
+.L1665:
+	cmp	w1, w5
+	bcc	.L1666
+	sub	w5, w5, w7
+	strh	w4, [x3, 112]
+	strh	w5, [x3, 116]
+	mov	w0, 1
+	strh	wzr, [x3, 114]
+	strh	wzr, [x3, 118]
+	bl	ftl_alloc_sblk
+	mov	w23, w0
+	mov	w1, 0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	mov	w0, w23
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1667
+	adrp	x1, .LANCHOR136
+	adrp	x0, .LC0
+	mov	w2, 1297
+	add	x1, x1, :lo12:.LANCHOR136
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1668:
+	b	.L1668
+.L1655:
+	adrp	x0, .LANCHOR53
+	strh	w21, [x0, #:lo12:.LANCHOR53]
+	mov	w0, w21
+	bl	ftl_test_block
+	ldrb	w11, [x22, #:lo12:.LANCHOR70]
+	adrp	x0, .LANCHOR76
+	ldr	x6, [x23, #:lo12:.LANCHOR59]
+	mov	w8, 0
+	ldrb	w13, [x0, #:lo12:.LANCHOR76]
+	mov	w7, 1
+	mov	w10, 0
+	mul	w12, w21, w11
+	add	x6, x6, x21, uxth 2
+	add	w13, w13, 1
+.L1648:
+	cmp	w7, w13
+	beq	.L1652
+	add	w15, w11, w8
+	sub	w14, w7, #1
+	b	.L1653
+.L1651:
+	add	w1, w8, w12
+	mov	w0, w14
+	bl	flash_check_bad_block
+	cbz	w0, .L1649
+	ldrb	w1, [x6, 3]
+	lsl	w0, w26, w8
+	orr	w0, w0, w1
+	strb	w0, [x6, 3]
+.L1650:
+	add	w8, w8, 1
+.L1653:
+	cmp	w8, w15
+	bne	.L1651
+	add	w7, w7, 1
+	sub	w12, w12, w11
+	and	w7, w7, 65535
+	b	.L1648
+.L1649:
+	add	w10, w10, 1
+	and	w10, w10, 65535
+	b	.L1650
+.L1652:
+	cbnz	w10, .L1654
+	ldrb	w0, [x6, 2]
+	orr	w0, w0, -32
+	strb	w0, [x6, 2]
+.L1654:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L1647
+.L1664:
+	add	x14, x2, x24, uxth 2
+	mov	w15, 0
+	mov	w16, 0
+	mov	w6, 0
+	ldrb	w0, [x14, 2]
+	orr	w0, w0, -32
+	and	w0, w0, -25
+	strb	w0, [x14, 2]
+.L1659:
+	cmp	w6, w12
+	bcc	.L1670
+	add	w24, w24, 1
+	add	w1, w13, w1
+	and	w24, w24, 65535
+	and	w1, w1, 65535
+	b	.L1658
+.L1662:
+	ldrb	w10, [x14, 3]
+	add	w17, w16, w8
+	asr	w10, w10, w17
+	tbnz	x10, 0, .L1660
+	cmp	w11, 1
+	bls	.L1669
+	and	w0, w0, 1
+	add	w0, w1, w0
+	and	w0, w0, 65535
+.L1661:
+	add	x10, x3, x4, sxtw 1
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	add	w0, w0, w15
+	strh	w0, [x10, 160]
+.L1660:
+	add	x8, x8, 1
+.L1663:
+	and	w0, w8, 65535
+	cmp	w0, w13
+	bcc	.L1662
+	add	w6, w6, 1
+	add	w0, w5, w15
+	and	w6, w6, 65535
+	add	w16, w16, w11
+	and	w15, w0, 65535
+	b	.L1659
+.L1669:
+	mov	w0, w1
+	b	.L1661
+.L1670:
+	mov	x8, 0
+	b	.L1663
+.L1666:
+	ldrb	w2, [x0, 2]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	add	x0, x0, 4
+	and	w2, w2, 31
+	bfi	w2, w6, 3, 2
+	strb	w2, [x0, -2]
+	b	.L1665
+.L1667:
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldrh	w2, [x22, #:lo12:.LANCHOR71]
+	mov	w1, 21
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	sub	w1, w1, w2
+	asr	w1, w20, w1
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR137
+	strh	w20, [x0, 692]
+	ldrh	w1, [x1, #:lo12:.LANCHOR137]
+	strh	w23, [x0, 416]
+	strh	w1, [x0, 698]
+	bl	ftl_alloc_sys_blk
+	mov	w20, w0
+	mov	w1, 0
+	bl	ftl_erase_phy_blk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 2
+	strh	w20, [x0, 130]
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+	.size	ftl_low_format, .-ftl_low_format
+	.section	.text.ftl_re_low_format_test,"ax",@progbits
+	.align	2
+	.global	ftl_re_low_format_test
+	.type	ftl_re_low_format_test, %function
+ftl_re_low_format_test:
+	stp	x29, x30, [sp, -48]!
+	mov	w1, 1
+	adrp	x0, .LC68
+	add	x0, x0, :lo12:.LC68
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR46
+	stp	x21, x22, [sp, 32]
+	bl	printf
+	bl	sblk_init
+	adrp	x21, .LANCHOR54
+	bl	ftl_info_blk_init
+	bl	ftl_ext_info_init
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	adrp	x2, .LANCHOR59
+	ldrh	w7, [x21, #:lo12:.LANCHOR54]
+	mov	w3, 0
+	ldr	x2, [x2, #:lo12:.LANCHOR59]
+	mov	w4, 0
+	mov	w5, 0
+	ldrh	w1, [x0, 134]
+	add	x2, x2, x1, uxth 2
+.L1681:
+	cmp	w1, w7
+	bcc	.L1685
+	strh	w5, [x0, 114]
+	strh	w4, [x0, 118]
+	strh	w3, [x0, 116]
+	strh	wzr, [x0, 122]
+	strh	wzr, [x0, 120]
+	strh	wzr, [x0, 124]
+	mov	w0, 1
+	bl	ftl_alloc_sblk
+	mov	w22, w0
+	mov	w1, 0
+	bl	ftl_erase_sblk
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	mov	w0, w22
+	add	x1, x1, 672
+	bl	ftl_get_blk_list_in_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, 65533
+	ldrh	w20, [x0, 672]
+	strh	wzr, [x0, 690]
+	sub	w2, w20, #1
+	cmp	w1, w2, uxth
+	bcs	.L1686
+	adrp	x1, .LANCHOR138
+	adrp	x0, .LC0
+	mov	w2, 1366
+	add	x1, x1, :lo12:.LANCHOR138
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1687:
+	b	.L1687
+.L1685:
+	ldrb	w6, [x2, 2]
+	and	w8, w6, 31
+	strb	w8, [x2, 2]
+	ands	w6, w6, 24
+	bne	.L1682
+	add	w5, w5, 1
+	and	w5, w5, 65535
+.L1683:
+	add	w1, w1, 1
+	add	x2, x2, 4
+	and	w1, w1, 65535
+	b	.L1681
+.L1682:
+	cmp	w6, 16
+	bne	.L1684
+	add	w4, w4, 1
+	and	w4, w4, 65535
+	b	.L1683
+.L1684:
+	add	w3, w3, 1
+	and	w3, w3, 65535
+	b	.L1683
+.L1686:
+	strh	wzr, [x0, 696]
+	mov	w2, 256
+	mov	w1, 255
+	add	x0, x0, 416
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w2, 4096
+	mov	w1, 0
+	add	x0, x0, 704
+	bl	ftl_memset
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	lsr	w1, w20, 14
+	and	w20, w20, 16383
+	ldrh	w2, [x21, #:lo12:.LANCHOR54]
+	strh	w1, [x0, 694]
+	mov	w1, 1
+	strh	w1, [x0, 688]
+	adrp	x1, .LANCHOR137
+	strh	w20, [x0, 692]
+	adrp	x20, .LANCHOR60
+	ldrh	w1, [x1, #:lo12:.LANCHOR137]
+	lsl	w2, w2, 1
+	strh	w22, [x0, 416]
+	strh	w1, [x0, 698]
+	adrp	x0, .LANCHOR56
+	mov	w1, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w1, 2
+	add	x0, x0, 16
+	bl	ftl_open_sblk_init
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w1, 3
+	add	x0, x0, 48
+	bl	ftl_open_sblk_init
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	add	x0, x0, 136
+	ldrh	w2, [x1, 134]
+	strh	w2, [x0, -10]
+	mov	w2, -1
+	strh	wzr, [x0, -12]
+	strh	w2, [x0, -56]
+	strh	w2, [x0, -6]
+	mov	w2, -1
+	strh	wzr, [x0, -16]
+	str	w2, [x0, 408]
+	strh	wzr, [x0, -14]
+	strh	w2, [x1, 126]
+	mov	w2, 256
+	mov	w1, 255
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	mov	w2, 128
+	mov	w1, 255
+	add	x0, x0, 392
+	bl	ftl_memset
+	ldr	x0, [x20, #:lo12:.LANCHOR60]
+	str	wzr, [x0, 520]
+	str	wzr, [x0, 524]
+	str	wzr, [x0, 528]
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	ftl_info_blk_init
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+	.size	ftl_re_low_format_test, .-ftl_re_low_format_test
+	.section	.text.ftl_prog_ppa_page,"ax",@progbits
+	.align	2
+	.global	ftl_prog_ppa_page
+	.type	ftl_prog_ppa_page, %function
+ftl_prog_ppa_page:
+	ubfx	x5, x0, 21, 3
+	mov	w4, w3
+	mov	x3, x2
+	mov	x2, x1
+	and	w1, w0, 2097151
+	mov	w0, w5
+	b	ftl_prog_page
+	.size	ftl_prog_ppa_page, .-ftl_prog_ppa_page
+	.section	.text.ftl_write_last_log_page,"ax",@progbits
+	.align	2
+	.global	ftl_write_last_log_page
+	.type	ftl_write_last_log_page, %function
+ftl_write_last_log_page:
+	ldrh	w1, [x0, 6]
+	cmp	w1, 1
+	bne	.L1692
+	stp	x29, x30, [sp, -48]!
+	adrp	x1, .LANCHOR82
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x0
+	stp	x21, x22, [sp, 32]
+	ldr	x20, [x1, #:lo12:.LANCHOR82]
+	ldrh	w22, [x0, 12]
+	bl	ftl_get_new_free_page
+	mov	w21, w0
+	cmn	w0, #1
+	beq	.L1693
+	ldrh	w0, [x19]
+	add	x20, x20, x22, uxth 2
+	bl	ftl_vpn_decrement
+	adrp	x0, .LANCHOR121
+	mov	w1, 15555
+	add	x6, x0, :lo12:.LANCHOR121
+	movk	w1, 0xf55f, lsl 16
+	str	w1, [x0, #:lo12:.LANCHOR121]
+	adrp	x0, .LANCHOR79
+	ldrh	w1, [x0, #:lo12:.LANCHOR79]
+	adrp	x0, .LANCHOR69
+	ldrb	w0, [x0, #:lo12:.LANCHOR69]
+	mul	w1, w1, w0
+	mov	x0, x20
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	adrp	x0, .LANCHOR45
+	mov	x2, x6
+	mov	x1, x20
+	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	mov	w0, w21
+	bl	ftl_prog_ppa_page
+.L1693:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 48
+	ret
+.L1692:
+	mov	w0, -1
+	ret
+	.size	ftl_write_last_log_page, .-ftl_write_last_log_page
+	.section	.text.ftl_open_sblk_recovery,"ax",@progbits
+	.align	2
+	.global	ftl_open_sblk_recovery
+	.type	ftl_open_sblk_recovery, %function
+ftl_open_sblk_recovery:
+	sub	sp, sp, #176
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x21, x22, [sp, 80]
+	adrp	x22, .LANCHOR22
+	stp	x27, x28, [sp, 128]
+	mov	x28, x0
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	stp	x25, x26, [sp, 112]
+	mov	x25, x1
+	stp	x19, x20, [sp, 64]
+	stp	x23, x24, [sp, 96]
+	tbz	x0, 12, .L1699
+	ldrh	w1, [x28, 2]
+	adrp	x0, .LC69
+	add	x0, x0, :lo12:.LC69
+	bl	printf
+.L1699:
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1700
+	ldrb	w1, [x28, 5]
+	adrp	x0, .LC70
+	add	x0, x0, :lo12:.LC70
+	bl	printf
+.L1700:
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1701
+	ldrh	w1, [x28]
+	adrp	x0, .LC71
+	add	x0, x0, :lo12:.LC71
+	bl	printf
+.L1701:
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1702
+	ldrh	w2, [x28, 18]
+	adrp	x0, .LC72
+	ldrh	w1, [x28, 16]
+	add	x0, x0, :lo12:.LC72
+	bl	printf
+.L1702:
+	ldrh	w0, [x28, 10]
+	adrp	x26, .LANCHOR45
+	strh	w0, [x28, 14]
+	mov	w27, 0
+	mov	w0, 1
+	adrp	x23, .LANCHOR79
+	bl	buf_alloc
+	ldrb	w20, [x28, 5]
+	ldrh	w21, [x28, 2]
+	mov	x19, x0
+	add	x0, x26, :lo12:.LANCHOR45
+	str	x0, [x29, 120]
+.L1703:
+	ldrh	w0, [x23, #:lo12:.LANCHOR79]
+	cmp	w0, w21
+	bhi	.L1718
+.L1706:
+	strh	w21, [x28, 2]
+	adrp	x21, .LANCHOR82
+	strb	w20, [x28, 5]
+	mov	w0, 0
+	ldrh	w3, [x28, 10]
+	mov	w1, 0
+	ldr	x4, [x21, #:lo12:.LANCHOR82]
+.L1719:
+	cmp	w1, w3
+	bcc	.L1721
+	ldrb	w20, [x28, 9]
+	adrp	x24, .LANCHOR56
+	ldrh	w1, [x23, #:lo12:.LANCHOR79]
+	madd	w20, w20, w1, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	sub	w20, w20, w3
+	and	w20, w20, 65535
+	tbz	x0, 12, .L1722
+	ldrh	w1, [x28]
+	ldr	x2, [x24, #:lo12:.LANCHOR56]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC74
+	mov	w2, w20
+	add	x0, x0, :lo12:.LC74
+	bl	printf
+.L1722:
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	adrp	x25, .LANCHOR45
+	ldrh	w1, [x28]
+	adrp	x24, .LANCHOR69
+	adrp	x26, .LC75
+	add	x24, x24, :lo12:.LANCHOR69
+	add	x25, x25, :lo12:.LANCHOR45
+	add	x26, x26, :lo12:.LC75
+	strh	w20, [x0, x1, lsl 1]
+	mov	w20, 0
+	mov	x0, x19
+	bl	buf_free
+.L1723:
+	ldrb	w0, [x24]
+	cmp	w20, w0, lsl 1
+	bcc	.L1726
+	ldrh	w1, [x28, 12]
+	ldrh	w0, [x23, #:lo12:.LANCHOR79]
+	ldrb	w2, [x28, 9]
+	madd	w0, w0, w2, w1
+	mov	x1, -4
+	add	x0, x1, x0, sxtw 2
+	ldr	x1, [x21, #:lo12:.LANCHOR82]
+	ldr	w0, [x1, x0]
+	cmn	w0, #1
+	beq	.L1727
+	adrp	x1, .LANCHOR139
+	adrp	x0, .LC0
+	mov	w2, 811
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1728:
+	b	.L1728
+.L1718:
+	ldrb	w20, [x28, 5]
+	adrp	x24, .LANCHOR75
+	add	x24, x24, :lo12:.LANCHOR75
+.L1704:
+	ldrb	w0, [x28, 9]
+	cmp	w0, w20
+	bhi	.L1717
+	add	w21, w21, 1
+	strb	wzr, [x28, 5]
+	and	w21, w21, 65535
+	b	.L1703
+.L1717:
+	add	x0, x28, x20, sxtw 1
+	ldrh	w12, [x0, 16]
+	mov	w0, 65535
+	cmp	w12, w0
+	beq	.L1705
+	ldrh	w10, [x24]
+	ldrb	w3, [x26, #:lo12:.LANCHOR45]
+	ldr	x1, [x19, 8]
+	ldr	x2, [x19, 24]
+	madd	w10, w10, w12, w21
+	stp	w12, w10, [x29, 108]
+	mov	w0, w10
+	bl	ftl_read_ppa_page
+	mov	w11, w0
+	cmp	w0, 512
+	beq	.L1706
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	ldp	w12, w10, [x29, 108]
+	tbz	x0, 12, .L1707
+	ldr	x1, [x19, 24]
+	mov	w4, w11
+	ldr	x0, [x19, 8]
+	mov	w3, w10
+	str	w11, [x29, 112]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w21
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w12
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	ldr	w11, [x29, 112]
+.L1707:
+	ldrb	w2, [x28, 9]
+	adrp	x0, .LANCHOR133
+	mov	w1, 1
+	strb	w1, [x0, #:lo12:.LANCHOR133]
+	ldrh	w0, [x28, 10]
+	madd	w1, w21, w2, w20
+	cmp	w0, w1
+	beq	.L1708
+	adrp	x1, .LANCHOR139
+	adrp	x0, .LC0
+	mov	w2, 707
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1709:
+	b	.L1709
+.L1708:
+	ldrh	w1, [x28, 6]
+	add	w1, w1, w0
+	ldrh	w0, [x23, #:lo12:.LANCHOR79]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	beq	.L1710
+	adrp	x1, .LANCHOR139
+	adrp	x0, .LC0
+	mov	w2, 708
+	add	x1, x1, :lo12:.LANCHOR139
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1711:
+	b	.L1711
+.L1710:
+	cmn	w11, #1
+	beq	.L1713
+	ldr	x5, [x19, 24]
+	str	x5, [x29, 112]
+	ldr	w0, [x5, 4]
+	cmn	w0, #1
+	beq	.L1713
+	bl	lpa_hash_get_ppa
+	cbz	x25, .L1715
+	ldr	x5, [x29, 112]
+	ldr	w1, [x5, 8]
+	cmp	w0, w1
+	beq	.L1715
+	cmn	w0, #1
+	beq	.L1715
+	adrp	x3, .LANCHOR71
+	mov	w1, 21
+	adrp	x27, .LANCHOR70
+	ldrh	w6, [x3, #:lo12:.LANCHOR71]
+	sub	w4, w1, w6
+	mov	w1, 1
+	lsr	w2, w0, w6
+	lsl	w1, w1, w4
+	sub	w1, w1, #1
+	and	w1, w1, w2
+	ldrb	w2, [x27, #:lo12:.LANCHOR70]
+	mov	x4, x3
+	udiv	w1, w1, w2
+	ldrh	w2, [x25]
+	cmp	w2, w1, uxth
+	bne	.L1715
+	ldr	x1, [x29, 120]
+	ldr	w6, [x5]
+	adrp	x5, .LANCHOR130
+	str	w6, [x29, 108]
+	add	x2, x5, :lo12:.LANCHOR130
+	str	x5, [x29, 112]
+	ldrb	w3, [x1]
+	ldr	x1, [x19, 8]
+	str	x4, [x29, 96]
+	bl	ftl_read_ppa_page
+	ldr	x5, [x29, 112]
+	ldr	w6, [x29, 108]
+	ldr	w0, [x5, #:lo12:.LANCHOR130]
+	cmp	w6, w0
+	bhi	.L1715
+	ldr	x0, [x19, 24]
+	ldr	w1, [x0, 8]
+	cmn	w1, #1
+	beq	.L1713
+	ldr	x4, [x29, 96]
+	mov	w0, 21
+	ldrh	w3, [x4, #:lo12:.LANCHOR71]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	ldrb	w1, [x27, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+.L1713:
+	ldrh	w0, [x28, 6]
+	mov	w27, 1
+	sub	w0, w0, #1
+	strh	w0, [x28, 6]
+	ldrh	w0, [x28, 10]
+	add	w0, w0, 1
+	strh	w0, [x28, 10]
+.L1705:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L1704
+.L1721:
+	ldrh	w2, [x28, 12]
+	add	w2, w2, w1
+	ldr	w2, [x4, x2, lsl 2]
+	cmn	w2, #1
+	beq	.L1720
+	add	w20, w0, 1
+	and	w0, w20, 65535
+.L1720:
+	add	w1, w1, 1
+	b	.L1719
+.L1726:
+	cbz	w27, .L1724
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bls	.L1724
+	mov	x0, x28
+	bl	ftl_get_new_free_page
+	mov	w4, w0
+	ldr	w0, [x22, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L1725
+	mov	w1, w4
+	str	w4, [x29, 120]
+	mov	x0, x26
+	bl	printf
+	ldr	w4, [x29, 120]
+.L1725:
+	adrp	x0, .LANCHOR46
+	ldr	x2, [x19, 24]
+	ldr	x1, [x19, 8]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldr	w0, [x0, 8]
+	str	w0, [x2]
+	str	wzr, [x2, 12]
+	mov	w0, -1
+	stp	w0, w0, [x2, 4]
+	mov	w0, w4
+	str	wzr, [x1]
+	ldrb	w3, [x25]
+	bl	ftl_prog_ppa_page
+	ldrh	w0, [x28]
+	bl	ftl_vpn_decrement
+.L1724:
+	add	w20, w20, 1
+	b	.L1723
+.L1727:
+	ldrh	w0, [x28, 6]
+	cmp	w0, 1
+	bne	.L1698
+	ldp	x19, x20, [sp, 64]
+	mov	x0, x28
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	b	ftl_write_last_log_page
+.L1715:
+	ldr	x3, [x19, 24]
+	adrp	x0, .LANCHOR47
+	ldr	w0, [x0, #:lo12:.LANCHOR47]
+	ldr	w1, [x3, 4]
+	cmp	w1, w0
+	bcs	.L1713
+	ldrb	w0, [x28, 9]
+	ldrh	w1, [x23, #:lo12:.LANCHOR79]
+	ldrh	w2, [x28, 10]
+	mul	w0, w0, w1
+	sub	w0, w0, #1
+	cmp	w2, w0
+	bge	.L1713
+	adrp	x0, .LANCHOR46
+	ldr	w1, [x3]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldr	w4, [x0, 8]
+	cmp	w1, w4
+	bls	.L1716
+	str	w1, [x0, 8]
+.L1716:
+	ldrh	w0, [x28, 12]
+	add	w2, w2, w0
+	ldp	w0, w1, [x3, 4]
+	bl	lpa_hash_update_ppa
+	b	.L1713
+.L1698:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 176
+	ret
+	.size	ftl_open_sblk_recovery, .-ftl_open_sblk_recovery
+	.section	.text.pm_write_page,"ax",@progbits
+	.align	2
+	.global	pm_write_page
+	.type	pm_write_page, %function
+pm_write_page:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR79
+	stp	x21, x22, [sp, 32]
+	mov	w19, w0
+	stp	x23, x24, [sp, 48]
+	adrp	x22, .LANCHOR46
+	mov	x24, x1
+	add	x20, x20, :lo12:.LANCHOR79
+	mov	x21, x22
+	stp	x25, x26, [sp, 64]
+	mov	w23, 65535
+	str	x27, [sp, 80]
+.L1772:
+	adrp	x25, .LANCHOR75
+.L1777:
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldr	w1, [x0, 48]
+	ldrh	w2, [x0, 696]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	ldrh	w1, [x20]
+	cmp	w2, w1
+	bcs	.L1773
+	ldrh	w0, [x0, 692]
+	cmp	w0, w23
+	bne	.L1774
+.L1773:
+	bl	pm_alloc_new_blk
+	mov	w0, 0
+	bl	ftl_info_flush
+.L1774:
+	ldr	x1, [x21, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 692]
+	cmp	w0, w23
+	bne	.L1775
+	adrp	x1, .LANCHOR140
+	adrp	x0, .LC0
+	mov	w2, 224
+	add	x1, x1, :lo12:.LANCHOR140
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1776:
+	b	.L1776
+.L1775:
+	ldrh	w1, [x1, 696]
+	adrp	x27, .LANCHOR141
+	ldrh	w26, [x25, #:lo12:.LANCHOR75]
+	mov	w2, 64
+	madd	w26, w26, w0, w1
+	ldr	x0, [x27, #:lo12:.LANCHOR141]
+	mov	w1, 0
+	bl	ftl_memset
+	ldr	x3, [x27, #:lo12:.LANCHOR141]
+	mov	x2, x24
+	ldr	x0, [x21, #:lo12:.LANCHOR46]
+	str	w19, [x3]
+	ldr	w1, [x0, 48]
+	ldrb	w0, [x0, 694]
+	str	w1, [x3, 4]
+	adrp	x1, .LANCHOR45
+	ldrb	w4, [x1, #:lo12:.LANCHOR45]
+	mov	w1, w26
+	bl	ftl_prog_page
+	ldr	x2, [x21, #:lo12:.LANCHOR46]
+	ldrh	w1, [x2, 696]
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	strh	w1, [x2, 696]
+	cmp	w1, 1
+	beq	.L1777
+	cmn	w0, #1
+	bne	.L1778
+	mov	w1, w26
+	adrp	x0, .LC76
+	add	x0, x0, :lo12:.LC76
+	bl	printf
+	b	.L1772
+.L1778:
+	ldrh	w0, [x2, 698]
+	cmp	w19, w0
+	bcs	.L1779
+	add	x19, x2, x19, uxtw 2
+	str	w26, [x19, 704]
+.L1779:
+	mov	w0, 0
+	ldr	x27, [sp, 80]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+	.size	pm_write_page, .-pm_write_page
+	.section	.text.flash_info_flush,"ax",@progbits
+	.align	2
+	.global	flash_info_flush
+	.type	flash_info_flush, %function
+flash_info_flush:
+	stp	x29, x30, [sp, -112]!
+	mov	w2, 64
+	mov	w1, 0
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x23, .LANCHOR116
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR5
+	ldr	x0, [x23, #:lo12:.LANCHOR116]
+	adrp	x24, .LC78
+	stp	x21, x22, [sp, 32]
+	add	x24, x24, :lo12:.LC78
+	stp	x25, x26, [sp, 64]
+	adrp	x21, .LANCHOR117
+	stp	x27, x28, [sp, 80]
+	adrp	x22, .LANCHOR13
+	bl	ftl_memset
+	adrp	x25, .LANCHOR97
+	ldr	x1, [x20, #:lo12:.LANCHOR5]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC77
+	add	x0, x0, :lo12:.LC77
+	add	x22, x22, :lo12:.LANCHOR13
+	add	x25, x25, :lo12:.LANCHOR97
+	add	x27, x21, :lo12:.LANCHOR117
+	bl	rknand_print_hex
+	mov	w26, 0
+	ldr	x6, [x20, #:lo12:.LANCHOR5]
+	add	x0, x6, 16
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	str	w0, [x6, 12]
+.L1784:
+	add	x28, x21, :lo12:.LANCHOR117
+	ldrb	w4, [x21, #:lo12:.LANCHOR117]
+	ldrh	w19, [x22]
+	mov	x0, x24
+	mov	w1, w4
+	ldrh	w3, [x28, 2]
+	stp	w3, w4, [x29, 104]
+	mov	w2, w3
+	bl	printf
+	ldrh	w0, [x25]
+	ldrh	w1, [x28, 2]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	ldp	w3, w4, [x29, 104]
+	blt	.L1785
+	ldr	x6, [x20, #:lo12:.LANCHOR5]
+	ldrb	w7, [x28, 1]
+	strh	wzr, [x28, 2]
+	ldr	w0, [x6, 4]
+	ldrh	w1, [x6, 16]
+	add	w0, w0, 1
+	str	w0, [x6, 4]
+	ldrb	w0, [x21, #:lo12:.LANCHOR117]
+	add	w1, w1, 1
+	strb	w0, [x28, 1]
+	mov	x0, x6
+	strb	w7, [x21, #:lo12:.LANCHOR117]
+	strh	w1, [x0, 16]!
+	ldr	w1, [x6, 8]
+	bl	js_hash
+	ldrh	w19, [x22]
+	str	w0, [x6, 12]
+	mul	w19, w19, w7
+.L1791:
+	mov	w1, w19
+	mov	w0, 0
+	bl	flash_erase_block
+	b	.L1786
+.L1789:
+	mov	w26, 1
+	b	.L1784
+.L1785:
+	madd	w19, w19, w4, w3
+	cbz	w1, .L1791
+.L1786:
+	ldr	x2, [x20, #:lo12:.LANCHOR5]
+	mov	w1, w19
+	ldr	x3, [x23, #:lo12:.LANCHOR116]
+	mov	w5, 1
+	mov	w4, 4
+	ldr	w0, [x2, 4]
+	str	w0, [x3]
+	mov	w0, 21321
+	movk	w0, 0x5359, lsl 16
+	str	w0, [x3, 4]
+	mov	w0, 0
+	bl	flash_prog_page_en
+	cmn	w0, #1
+	ldrh	w1, [x27, 2]
+	add	w1, w1, 1
+	strh	w1, [x27, 2]
+	bne	.L1787
+	mov	w1, w19
+	adrp	x0, .LC79
+	add	x0, x0, :lo12:.LC79
+	bl	printf
+	b	.L1784
+.L1787:
+	cbz	w26, .L1789
+	ldp	x19, x20, [sp, 16]
+	mov	w0, 0
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+	.size	flash_info_flush, .-flash_info_flush
+	.section	.text.nand_flash_init,"ax",@progbits
+	.align	2
+	.global	nand_flash_init
+	.type	nand_flash_init, %function
+nand_flash_init:
+	stp	x29, x30, [sp, -64]!
+	mov	w2, 2
+	adrp	x1, .LANCHOR20
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR26
+	stp	x21, x22, [sp, 32]
+	adrp	x21, .LANCHOR34
+	stp	x23, x24, [sp, 48]
+	adrp	x19, .LANCHOR19
+	strb	w2, [x1, #:lo12:.LANCHOR20]
+	bl	nandc_init
+	add	x8, x20, :lo12:.LANCHOR26
+	add	x0, x19, :lo12:.LANCHOR19
+	mov	x10, x8
+	str	x0, [x21, #:lo12:.LANCHOR34]
+	mov	w7, 0
+	mov	w11, 44
+.L1798:
+	mov	x1, x8
+	mov	w0, w7
+	bl	flash_read_id
+	cbnz	w7, .L1793
+	ldrb	w0, [x10]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 253
+	bls	.L1794
+.L1796:
+	mov	w0, -2
+.L1792:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1794:
+	ldrb	w0, [x10, 1]
+	cmp	w0, 255
+	beq	.L1796
+.L1793:
+	ldrb	w0, [x8]
+	cmp	w0, 181
+	bne	.L1797
+	strb	w11, [x8]
+.L1797:
+	add	w7, w7, 1
+	add	x8, x8, 8
+	and	w7, w7, 255
+	cmp	w7, 4
+	bne	.L1798
+	adrp	x0, .LANCHOR142
+	add	x8, x0, :lo12:.LANCHOR142
+	add	x8, x8, 1
+	mov	x7, x0
+	add	x12, x20, :lo12:.LANCHOR26
+	mov	x10, 0
+.L1801:
+	ldrb	w2, [x8, -1]
+	mov	w11, w10
+	lsl	x23, x10, 5
+	mov	x1, x12
+	mov	x0, x8
+	bl	flash_mem_cmp8
+	cbnz	w0, .L1799
+	add	x0, x7, :lo12:.LANCHOR142
+	ubfiz	x11, x11, 5, 32
+	add	x23, x0, x23
+	add	x0, x0, x11
+	adrp	x1, .LANCHOR143
+	add	x4, x1, :lo12:.LANCHOR143
+	ldrb	w3, [x0, 22]
+	mov	x0, 0
+.L1800:
+	lsl	x5, x0, 5
+	mov	w2, w0
+	ldrb	w5, [x5, x4]
+	cmp	w5, w3
+	beq	.L1802
+	add	x0, x0, 1
+	cmp	x0, 4
+	bne	.L1800
+	mov	w2, w0
+.L1802:
+	ubfiz	x0, x2, 5, 32
+	add	x1, x1, :lo12:.LANCHOR143
+	add	x1, x1, x0
+	mov	w2, 32
+	adrp	x0, .LANCHOR103
+	add	x22, x19, :lo12:.LANCHOR19
+	add	x0, x0, :lo12:.LANCHOR103
+	bl	ftl_memcpy
+	mov	x1, x23
+	mov	w2, 32
+	mov	x0, x22
+	bl	ftl_memcpy
+	adrp	x1, .LANCHOR7
+	mov	x24, x1
+	ldrb	w0, [x1, #:lo12:.LANCHOR7]
+	cmp	w0, 8
+	bhi	.L1803
+	ldrb	w1, [x22, 20]
+	cmp	w1, 60
+	bls	.L1804
+	mov	w1, 60
+	strb	w1, [x22, 20]
+.L1804:
+	cmp	w0, 8
+	bne	.L1803
+	ldrb	w0, [x20, #:lo12:.LANCHOR26]
+	cmp	w0, 44
+	bne	.L1803
+	add	x0, x19, :lo12:.LANCHOR19
+	ldrb	w1, [x0, 28]
+	cmp	w1, 2
+	bne	.L1803
+	strb	wzr, [x0, 28]
+.L1803:
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR119
+	adrp	x23, .LANCHOR5
+	add	x20, x19, :lo12:.LANCHOR19
+	adrp	x22, .LANCHOR25
+	str	x0, [x1, #:lo12:.LANCHOR119]
+	mov	w0, 16384
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR111
+	str	x0, [x1, #:lo12:.LANCHOR111]
+	mov	w0, 2048
+	bl	ftl_malloc
+	str	x0, [x23, #:lo12:.LANCHOR5]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR118
+	str	x0, [x1, #:lo12:.LANCHOR118]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR112
+	str	x0, [x1, #:lo12:.LANCHOR112]
+	mov	w0, 64
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR116
+	str	x0, [x1, #:lo12:.LANCHOR116]
+	adrp	x0, .LANCHOR123
+	strb	wzr, [x0, #:lo12:.LANCHOR123]
+	bl	flash_die_info_init
+	ldrb	w0, [x20, 18]
+	bl	flash_lsb_page_tbl_build
+	ldrb	w0, [x20, 20]
+	adrp	x20, .LANCHOR115
+	bl	nandc_bch_sel
+	str	xzr, [x20, #:lo12:.LANCHOR115]
+	ldr	x1, [x21, #:lo12:.LANCHOR34]
+	mov	x21, x23
+	ldrh	w0, [x1, 16]
+	lsr	w3, w0, 8
+	ubfx	x4, x0, 3, 1
+	and	w2, w3, 7
+	strb	w2, [x22, #:lo12:.LANCHOR25]
+	adrp	x2, .LANCHOR144
+	strb	w4, [x2, #:lo12:.LANCHOR144]
+	adrp	x2, .LANCHOR23
+	ubfx	x4, x0, 4, 1
+	strb	w4, [x2, #:lo12:.LANCHOR23]
+	adrp	x2, .LANCHOR66
+	ubfx	x4, x0, 12, 1
+	strb	w4, [x2, #:lo12:.LANCHOR66]
+	adrp	x2, .LANCHOR74
+	ubfx	x4, x0, 13, 1
+	ubfx	x0, x0, 14, 1
+	strb	w4, [x2, #:lo12:.LANCHOR74]
+	adrp	x2, .LANCHOR12
+	strb	w0, [x2, #:lo12:.LANCHOR12]
+	mov	w2, 60
+	ldrb	w0, [x1, 28]
+	adrp	x1, .LANCHOR11
+	strb	w0, [x1, #:lo12:.LANCHOR11]
+	adrp	x1, .LANCHOR145
+	strb	w2, [x1, #:lo12:.LANCHOR145]
+	ldrb	w2, [x24, #:lo12:.LANCHOR7]
+	cmp	w2, 9
+	bne	.L1805
+	mov	w2, 70
+	strb	w2, [x1, #:lo12:.LANCHOR145]
+.L1805:
+	add	x19, x19, :lo12:.LANCHOR19
+	adrp	x1, .LANCHOR146
+	adrp	x23, .LANCHOR2
+	strb	w0, [x1, #:lo12:.LANCHOR146]
+	ldrh	w1, [x19, 16]
+	ldrb	w0, [x19, 19]
+	strb	w0, [x23, #:lo12:.LANCHOR2]
+	tbz	x1, 6, .L1807
+	sub	w1, w0, #17
+	and	w1, w1, 255
+	cmp	w1, 2
+	bhi	.L1808
+	adrp	x1, micron_read_retrial
+	add	x1, x1, :lo12:micron_read_retrial
+	str	x1, [x20, #:lo12:.LANCHOR115]
+	cmp	w0, 19
+	adrp	x0, .LANCHOR113
+	beq	.L1809
+	mov	w1, 7
+.L1836:
+	strb	w1, [x0, #:lo12:.LANCHOR113]
+	b	.L1807
+.L1799:
+	add	x10, x10, 1
+	add	x8, x8, 32
+	cmp	x10, 24
+	bne	.L1801
+	b	.L1796
+.L1809:
+	mov	w1, 15
+	b	.L1836
+.L1808:
+	sub	w1, w0, #65
+	cmp	w0, 33
+	and	w1, w1, 255
+	ccmp	w1, 1, 0, ne
+	bhi	.L1811
+	adrp	x0, toshiba_read_retrial
+	add	x0, x0, :lo12:toshiba_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR115]
+	adrp	x0, .LANCHOR4
+	mov	w1, 4
+	strb	w1, [x0, #:lo12:.LANCHOR4]
+.L1838:
+	mov	w1, 7
+	adrp	x0, .LANCHOR113
+	b	.L1836
+.L1811:
+	sub	w2, w0, #34
+	sub	w1, w0, #67
+	and	w2, w2, 255
+	and	w1, w1, 255
+	cmp	w2, 1
+	ccmp	w1, 1, 0, hi
+	bhi	.L1812
+	adrp	x2, toshiba_read_retrial
+	add	x2, x2, :lo12:toshiba_read_retrial
+	str	x2, [x20, #:lo12:.LANCHOR115]
+	cmp	w0, 35
+	mov	w2, 68
+	ccmp	w0, w2, 4, ne
+	adrp	x0, .LANCHOR113
+	beq	.L1813
+	mov	w2, 7
+.L1835:
+	strb	w2, [x0, #:lo12:.LANCHOR113]
+	cmp	w1, 1
+	adrp	x0, .LANCHOR4
+	bhi	.L1815
+	mov	w1, 4
+.L1837:
+	strb	w1, [x0, #:lo12:.LANCHOR4]
+.L1807:
+	adrp	x19, .LANCHOR35
+	mov	w0, 4
+	strb	wzr, [x19, #:lo12:.LANCHOR35]
+	tbz	x3, 0, .L1816
+	bl	nandc_set_if_mode
+	mov	w0, 1
+	bl	flash_set_interface_mode
+	mov	w0, 1
+.L1816:
+	bl	nandc_set_if_mode
+	bl	flash_info_blk_init
+	cmn	w0, #1
+	beq	.L1792
+	ldrb	w0, [x23, #:lo12:.LANCHOR2]
+	sub	w0, w0, #1
+	and	w0, w0, 255
+	cmp	w0, 6
+	bhi	.L1818
+	adrp	x0, hynix_read_retrial
+	add	x0, x0, :lo12:hynix_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR115]
+.L1818:
+	ldrb	w0, [x22, #:lo12:.LANCHOR25]
+	tbnz	x0, 2, .L1819
+.L1839:
+	mov	w0, 0
+	b	.L1792
+.L1813:
+	mov	w2, 17
+	b	.L1835
+.L1815:
+	mov	w1, 5
+	b	.L1837
+.L1812:
+	sub	w0, w0, #36
+	and	w0, w0, 255
+	cmp	w0, 1
+	bhi	.L1807
+	adrp	x0, toshiba_3d_read_retrial
+	add	x0, x0, :lo12:toshiba_3d_read_retrial
+	str	x0, [x20, #:lo12:.LANCHOR115]
+	b	.L1838
+.L1819:
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	ldrb	w0, [x0, 19]
+	cbz	w0, .L1839
+	adrp	x0, .LANCHOR117
+	ldrb	w1, [x0, #:lo12:.LANCHOR117]
+	adrp	x0, .LANCHOR13
+	ldrh	w0, [x0, #:lo12:.LANCHOR13]
+	mul	w1, w1, w0
+	mov	w0, 0
+	bl	flash_ddr_para_scan
+	ldrb	w0, [x19, #:lo12:.LANCHOR35]
+	cbnz	w0, .L1839
+	ldr	x0, [x21, #:lo12:.LANCHOR5]
+	strb	wzr, [x0, 19]
+	bl	flash_info_flush
+	b	.L1839
+	.size	nand_flash_init, .-nand_flash_init
+	.section	.text.ftl_sysblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sysblk_dump
+	.type	ftl_sysblk_dump, %function
+ftl_sysblk_dump:
+	sub	sp, sp, #144
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	stp	x25, x26, [sp, 112]
+	adrp	x26, .LANCHOR79
+	stp	x27, x28, [sp, 128]
+	add	x26, x26, :lo12:.LANCHOR79
+	stp	x19, x20, [sp, 64]
+	adrp	x27, .LANCHOR75
+	stp	x21, x22, [sp, 80]
+	and	w22, w0, 65535
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	x23, [x0, 8]
+	adrp	x28, .LANCHOR45
+	mov	x24, x0
+	add	x27, x27, :lo12:.LANCHOR75
+	add	x28, x28, :lo12:.LANCHOR45
+	mov	w25, 0
+	mov	w19, 0
+.L1841:
+	ldrh	w0, [x26]
+	cmp	w0, w19
+	bhi	.L1843
+	mov	x0, x24
+	bl	buf_free
+	cbz	w25, .L1844
+	adrp	x1, .LANCHOR147
+	adrp	x0, .LC0
+	mov	w2, 655
+	add	x1, x1, :lo12:.LANCHOR147
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1845:
+	b	.L1845
+.L1843:
+	ldrh	w20, [x27]
+	ldrb	w3, [x28]
+	ldr	x1, [x24, 8]
+	ldr	x2, [x24, 24]
+	madd	w20, w20, w22, w19
+	mov	w0, w20
+	bl	ftl_read_ppa_page
+	mov	w21, w0
+	ldr	x1, [x24, 24]
+	mov	w4, w0
+	ldr	x0, [x24, 8]
+	mov	w3, w20
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w19
+	add	w19, w19, 1
+	ldr	w1, [x1]
+	and	w19, w19, 65535
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w22
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	mov	w3, 32
+	mov	w2, 4
+	add	x1, x23, 704
+	adrp	x0, .LC80
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	cmp	w21, 512
+	ccmn	w21, #1, 4, ne
+	csinc	w25, w25, wzr, ne
+	b	.L1841
+.L1844:
+	mov	w0, 0
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 144
+	ret
+	.size	ftl_sysblk_dump, .-ftl_sysblk_dump
+	.section	.text.dump_ftl_info,"ax",@progbits
+	.align	2
+	.global	dump_ftl_info
+	.type	dump_ftl_info, %function
+dump_ftl_info:
+	stp	x29, x30, [sp, -48]!
+	adrp	x0, .LANCHOR131
+	add	x1, x0, :lo12:.LANCHOR131
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	adrp	x22, .LANCHOR46
+	ldrh	w3, [x1, 2]
+	adrp	x20, .LANCHOR79
+	ldrb	w2, [x1, 1]
+	adrp	x21, .LANCHOR54
+	ldrb	w1, [x0, #:lo12:.LANCHOR131]
+	adrp	x0, .LC81
+	add	x0, x0, :lo12:.LC81
+	bl	printf
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	ldrh	w2, [x0, 140]
+	ldrh	w1, [x0, 130]
+	adrp	x0, .LC82
+	add	x0, x0, :lo12:.LC82
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR60]
+	adrp	x0, .LC83
+	add	x0, x0, :lo12:.LC83
+	ldrh	w5, [x1, 26]
+	ldrh	w4, [x1, 22]
+	ldrb	w3, [x1, 21]
+	ldrh	w2, [x1, 18]
+	ldrh	w1, [x1, 16]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR60]
+	adrp	x0, .LC84
+	add	x0, x0, :lo12:.LC84
+	ldrh	w5, [x1, 58]
+	ldrh	w4, [x1, 54]
+	ldrb	w3, [x1, 53]
+	ldrh	w2, [x1, 50]
+	ldrh	w1, [x1, 48]
+	bl	printf
+	ldr	x1, [x19, #:lo12:.LANCHOR60]
+	adrp	x19, .LANCHOR69
+	adrp	x0, .LC85
+	add	x0, x0, :lo12:.LC85
+	ldrh	w5, [x1, 90]
+	ldrh	w4, [x1, 86]
+	ldrb	w3, [x1, 85]
+	ldrh	w2, [x1, 82]
+	ldrh	w1, [x1, 80]
+	bl	printf
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 4
+	ldrh	w3, [x20, #:lo12:.LANCHOR79]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR82
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LC86
+	lsl	w3, w3, 1
+	add	x0, x0, :lo12:.LC86
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR56
+	ldrh	w3, [x21, #:lo12:.LANCHOR54]
+	mov	w2, 2
+	ldr	x1, [x0, #:lo12:.LANCHOR56]
+	adrp	x0, .LC87
+	add	x0, x0, :lo12:.LC87
+	bl	rknand_print_hex
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	mov	w3, 32
+	mov	w2, 4
+	adrp	x0, .LC80
+	add	x1, x1, 704
+	add	x0, x0, :lo12:.LC80
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR59
+	ldrh	w3, [x21, #:lo12:.LANCHOR54]
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR59]
+	adrp	x0, .LC88
+	add	x0, x0, :lo12:.LC88
+	bl	rknand_print_hex
+	mov	w3, 256
+	mov	w2, 2
+	adrp	x1, .LANCHOR81
+	adrp	x0, .LC89
+	add	x1, x1, :lo12:.LANCHOR81
+	add	x0, x0, :lo12:.LC89
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 2
+	ldrh	w3, [x20, #:lo12:.LANCHOR79]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR83
+	ldp	x29, x30, [sp], 48
+	lsl	w3, w3, 1
+	ldr	x1, [x0, #:lo12:.LANCHOR83]
+	adrp	x0, .LC90
+	add	x0, x0, :lo12:.LC90
+	b	rknand_print_hex
+	.size	dump_ftl_info, .-dump_ftl_info
+	.section	.text.pm_ppa_update_check,"ax",@progbits
+	.align	2
+	.global	pm_ppa_update_check
+	.type	pm_ppa_update_check, %function
+pm_ppa_update_check:
+	adrp	x3, .LANCHOR71
+	mov	w4, 21
+	ldrh	w3, [x3, #:lo12:.LANCHOR71]
+	sub	w5, w4, w3
+	mov	w4, 1
+	lsr	w3, w2, w3
+	lsl	w4, w4, w5
+	sub	w4, w4, #1
+	and	w4, w4, w3
+	adrp	x3, .LANCHOR70
+	ldrb	w3, [x3, #:lo12:.LANCHOR70]
+	udiv	w4, w4, w3
+	adrp	x3, .LANCHOR59
+	ldr	x3, [x3, #:lo12:.LANCHOR59]
+	add	x4, x3, x4, uxth 2
+	ldrb	w3, [x4, 2]
+	ubfx	x3, x3, 5, 3
+	cmp	w3, 1
+	ccmp	w3, 7, 4, ne
+	bne	.L1853
+	stp	x29, x30, [sp, -16]!
+	mov	w3, w2
+	mov	w2, w1
+	mov	x1, x0
+	add	x29, sp, 0
+	adrp	x0, .LC91
+	add	x0, x0, :lo12:.LC91
+	bl	printf
+	bl	dump_ftl_info
+	mov	w0, -1
+	ldp	x29, x30, [sp], 16
+	ret
+.L1853:
+	mov	w0, 0
+	ret
+	.size	pm_ppa_update_check, .-pm_ppa_update_check
+	.section	.text.load_l2p_region,"ax",@progbits
+	.align	2
+	.global	load_l2p_region
+	.type	load_l2p_region, %function
+load_l2p_region:
+	stp	x29, x30, [sp, -64]!
+	and	w1, w1, 65535
+	cmp	w1, 31
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	str	x23, [sp, 48]
+	bls	.L1859
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 30
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1860:
+	b	.L1860
+.L1859:
+	adrp	x23, .LANCHOR46
+	and	w19, w0, 65535
+	ldr	x0, [x23, #:lo12:.LANCHOR46]
+	ldrh	w2, [x0, 698]
+	cmp	w2, w19
+	bcs	.L1861
+	mov	w1, w19
+	adrp	x0, .LC92
+	add	x0, x0, :lo12:.LC92
+	bl	printf
+	adrp	x0, .LANCHOR149
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR149]
+	mov	x0, 0
+	ldr	x0, [x0, 8]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 698]
+	cmp	w0, w19
+	bcs	.L1865
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 34
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1863:
+	b	.L1863
+.L1861:
+	add	x0, x0, x19, sxtw 2
+	sbfiz	x1, x1, 4, 32
+	ldr	w21, [x0, 704]
+	adrp	x0, .LANCHOR93
+	add	x0, x0, :lo12:.LANCHOR93
+	add	x22, x0, x1
+	strh	w19, [x0, x1]
+	strh	wzr, [x22, 2]
+	cbnz	w21, .L1864
+	adrp	x0, .LANCHOR149
+	mov	w1, 255
+	ldrh	w2, [x0, #:lo12:.LANCHOR149]
+	ldr	x0, [x22, 8]
+	bl	ftl_memset
+.L1865:
+	mov	w0, 0
+	ldr	x23, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 64
+	ret
+.L1864:
+	adrp	x20, .LANCHOR141
+	adrp	x0, .LANCHOR45
+	ldr	x1, [x22, 8]
+	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	mov	w0, w21
+	ldr	x2, [x20, #:lo12:.LANCHOR141]
+	bl	ftl_read_ppa_page
+	ldr	x1, [x20, #:lo12:.LANCHOR141]
+	ldr	w2, [x1]
+	cmp	w2, w19
+	beq	.L1866
+	mov	w4, w21
+	mov	w3, w0
+	mov	w1, w19
+	adrp	x0, .LC93
+	add	x0, x0, :lo12:.LC93
+	bl	printf
+	ldr	x1, [x23, #:lo12:.LANCHOR46]
+	mov	w2, 4
+	adrp	x0, .LC94
+	add	x0, x0, :lo12:.LC94
+	add	x1, x1, 704
+	ldrh	w3, [x1, -6]
+	bl	rknand_print_hex
+	ldr	x1, [x22, 8]
+	mov	w3, 16
+	mov	w2, 4
+	adrp	x0, .LC95
+	add	x0, x0, :lo12:.LC95
+	bl	rknand_print_hex
+	ldr	x1, [x20, #:lo12:.LANCHOR141]
+	mov	w2, 4
+	mov	w3, 16
+	adrp	x0, .LC96
+	add	x0, x0, :lo12:.LC96
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR71
+	ldrh	w2, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsr	w21, w21, w2
+	lsl	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	sub	w0, w0, #1
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	and	w0, w0, w21
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L1866:
+	ldr	x0, [x20, #:lo12:.LANCHOR141]
+	ldr	w0, [x0]
+	cmp	w19, w0
+	beq	.L1865
+	adrp	x1, .LANCHOR148
+	adrp	x0, .LC0
+	mov	w2, 55
+	add	x1, x1, :lo12:.LANCHOR148
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1867:
+	b	.L1867
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.pm_gc,"ax",@progbits
+	.align	2
+	.global	pm_gc
+	.type	pm_gc, %function
+pm_gc:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR46
+	adrp	x20, .LANCHOR101
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	stp	x23, x24, [sp, 48]
+	ldrh	w1, [x0, 688]
+	ldrh	w0, [x20, #:lo12:.LANCHOR101]
+	str	x25, [sp, 64]
+	sub	w0, w0, #1
+	cmp	w1, w0
+	blt	.L1871
+	bl	pm_free_sblk
+	ldr	x2, [x19, #:lo12:.LANCHOR46]
+	ldrh	w1, [x20, #:lo12:.LANCHOR101]
+	sub	w1, w1, #1
+	ldrh	w3, [x2, 688]
+	cmp	w3, w1
+	blt	.L1871
+	add	x0, x2, x0, uxth 1
+	mov	w23, 65535
+	ldrh	w20, [x0, 416]
+	cmp	w20, w23
+	bne	.L1873
+	adrp	x1, .LANCHOR150
+	adrp	x0, .LC0
+	mov	w2, 127
+	add	x1, x1, :lo12:.LANCHOR150
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1874:
+	b	.L1874
+.L1873:
+	bl	pm_select_ram_region
+	and	x24, x0, 65535
+	adrp	x1, .LANCHOR93
+	lsl	x0, x24, 4
+	add	x2, x1, :lo12:.LANCHOR93
+	mov	x22, x19
+	add	x19, x2, x0
+	mov	x21, x24
+	ldrh	w0, [x2, x0]
+	cmp	w0, w23
+	mov	x23, x1
+	beq	.L1875
+	ldr	x1, [x19, 8]
+	cbz	x1, .L1875
+	ldrsh	w2, [x19, 2]
+	tbz	w2, #31, .L1875
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+.L1875:
+	add	x1, x23, :lo12:.LANCHOR93
+	adrp	x25, .LANCHOR71
+	add	x24, x1, x24, lsl 4
+	add	x25, x25, :lo12:.LANCHOR71
+	mov	w19, 0
+.L1876:
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldrh	w0, [x1, 698]
+	cmp	w0, w19
+	bhi	.L1878
+	bl	pm_free_sblk
+.L1871:
+	mov	w0, 0
+	ldr	x25, [sp, 64]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1878:
+	add	x1, x1, x19, sxtw 2
+	ldrh	w3, [x25]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	ldr	w1, [x1, 704]
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w1, w3
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	cmp	w20, w0, uxth
+	bne	.L1877
+	mov	w1, w21
+	mov	w0, w19
+	bl	load_l2p_region
+	ldr	x1, [x24, 8]
+	mov	w0, w19
+	bl	pm_write_page
+.L1877:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L1876
+	.size	pm_gc, .-pm_gc
+	.section	.text.pm_flush_id,"ax",@progbits
+	.align	2
+	.global	pm_flush_id
+	.type	pm_flush_id, %function
+pm_flush_id:
+	stp	x29, x30, [sp, -32]!
+	ubfiz	x0, x0, 4, 16
+	adrp	x2, .LANCHOR93
+	add	x2, x2, :lo12:.LANCHOR93
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	add	x19, x2, x0
+	ldrh	w0, [x2, x0]
+	ldr	x1, [x19, 8]
+	bl	pm_write_page
+	ldrh	w0, [x19, 2]
+	and	w0, w0, 32767
+	strh	w0, [x19, 2]
+	adrp	x19, .LANCHOR91
+	ldr	w0, [x19, #:lo12:.LANCHOR91]
+	cbz	w0, .L1884
+	bl	pm_gc
+	str	wzr, [x19, #:lo12:.LANCHOR91]
+.L1884:
+	mov	w0, 0
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush_id, .-pm_flush_id
+	.section	.text.pm_flush,"ax",@progbits
+	.align	2
+	.global	pm_flush
+	.type	pm_flush, %function
+pm_flush:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR93
+	add	x19, x19, :lo12:.LANCHOR93
+	mov	w20, 0
+	add	x19, x19, 2
+.L1891:
+	ldrsh	w0, [x19]
+	tbz	w0, #31, .L1890
+	mov	w0, w20
+	bl	pm_flush_id
+.L1890:
+	add	w20, w20, 1
+	add	x19, x19, 16
+	and	w20, w20, 65535
+	cmp	w20, 32
+	bne	.L1891
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	pm_flush, .-pm_flush
+	.section	.text.flt_sys_flush,"ax",@progbits
+	.align	2
+	.global	flt_sys_flush
+	.type	flt_sys_flush, %function
+flt_sys_flush:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldp	x29, x30, [sp], 16
+	mov	w0, 0
+	b	ftl_info_flush
+	.size	flt_sys_flush, .-flt_sys_flush
+	.section	.text.rk_ftl_de_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_de_init
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	stp	x29, x30, [sp, -16]!
+	add	x29, sp, 0
+	bl	FlashDeInit
+	bl	flt_sys_flush
+	ldp	x29, x30, [sp], 16
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.pm_init,"ax",@progbits
+	.align	2
+	.global	pm_init
+	.type	pm_init, %function
+pm_init:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, w0
+	adrp	x0, .LANCHOR91
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR93
+	stp	x25, x26, [sp, 64]
+	add	x19, x20, :lo12:.LANCHOR93
+	str	wzr, [x0, #:lo12:.LANCHOR91]
+	mov	w0, 64
+	stp	x27, x28, [sp, 80]
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR141
+	adrp	x22, .LANCHOR45
+	add	x23, x19, 512
+	mov	x21, x1
+	add	x22, x22, :lo12:.LANCHOR45
+	str	x0, [x1, #:lo12:.LANCHOR141]
+	mov	w25, -1
+.L1900:
+	strh	w25, [x19]
+	strh	wzr, [x19, 2]
+	cbz	w24, .L1899
+	ldrb	w0, [x22]
+	lsl	w0, w0, 9
+	bl	ftl_malloc
+	str	x0, [x19, 8]
+.L1899:
+	add	x19, x19, 16
+	cmp	x19, x23
+	bne	.L1900
+	add	x0, x20, :lo12:.LANCHOR93
+	adrp	x19, .LANCHOR46
+	ldr	x24, [x21, #:lo12:.LANCHOR141]
+	mov	w4, 4
+	ldr	x25, [x0, 8]
+	mov	x3, x24
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	x2, x25
+	ldrh	w1, [x0, 692]
+	ldrb	w0, [x0, 694]
+	bl	flash_get_last_written_page
+	sxth	w26, w0
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w23, w26
+	ldrh	w2, [x0, 696]
+	cmp	w2, w26
+	bgt	.L1901
+	ldrh	w1, [x0, 692]
+	mov	w3, w26
+	adrp	x0, .LC97
+	add	x0, x0, :lo12:.LC97
+	adrp	x27, .LANCHOR75
+	adrp	x28, .LANCHOR45
+	add	x27, x27, :lo12:.LANCHOR75
+	add	x28, x28, :lo12:.LANCHOR45
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	ldrsh	w21, [x0, 696]
+.L1902:
+	cmp	w21, w26
+	ble	.L1904
+	adrp	x0, .LANCHOR133
+	mov	w1, 1
+	add	x20, x20, :lo12:.LANCHOR93
+	add	w23, w23, 1
+	strb	w1, [x0, #:lo12:.LANCHOR133]
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	strh	w23, [x0, 696]
+	bl	pm_free_sblk
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+	ldr	x1, [x20, 8]
+	mov	w0, -1
+	bl	pm_write_page
+.L1901:
+	bl	pm_free_sblk
+	bl	pm_gc
+	mov	w0, 0
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L1904:
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	x3, x24
+	ldrh	w1, [x27]
+	mov	x2, x25
+	ldrb	w4, [x28]
+	ldrh	w22, [x0, 692]
+	ldrb	w0, [x0, 694]
+	madd	w22, w22, w1, w21
+	mov	w1, w22
+	bl	flash_read_page_en
+	mov	w4, w0
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	str	w4, [x29, 108]
+	mov	w2, w22
+	ldr	w1, [x0, 48]
+	ldrh	w3, [x0, 694]
+	add	w1, w1, 1
+	str	w1, [x0, 48]
+	adrp	x0, .LC98
+	add	x0, x0, :lo12:.LC98
+	ldr	w1, [x24]
+	bl	printf
+	ldr	w4, [x29, 108]
+	cmp	w4, 512
+	ccmn	w4, #1, 4, ne
+	beq	.L1903
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	w0, [x24]
+	ldrh	w2, [x1, 698]
+	cmp	w0, w2
+	bcs	.L1903
+	add	x0, x1, x0, uxtw 2
+	str	w22, [x0, 704]
+.L1903:
+	add	w21, w21, 1
+	sxth	w21, w21
+	b	.L1902
+	.size	pm_init, .-pm_init
+	.section	.text.pm_log2phys,"ax",@progbits
+	.align	2
+	.global	pm_log2phys
+	.type	pm_log2phys, %function
+pm_log2phys:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x1
+	adrp	x1, .LANCHOR45
+	stp	x19, x20, [sp, 16]
+	stp	x25, x26, [sp, 64]
+	ldrb	w1, [x1, #:lo12:.LANCHOR45]
+	stp	x23, x24, [sp, 48]
+	mov	w23, w2
+	lsl	w21, w1, 7
+	ubfiz	w20, w1, 7, 9
+	adrp	x1, .LANCHOR47
+	udiv	w21, w0, w21
+	ldr	w2, [x1, #:lo12:.LANCHOR47]
+	cmp	w0, w2
+	and	w25, w21, 65535
+	msub	w20, w25, w20, w0
+	bcc	.L1914
+	mov	w1, w0
+	adrp	x0, .LC99
+	add	x0, x0, :lo12:.LC99
+	bl	printf
+	mov	w0, -1
+.L1913:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1914:
+	adrp	x24, .LANCHOR93
+	add	x0, x24, :lo12:.LANCHOR93
+	and	x20, x20, 65535
+	add	x0, x0, 8
+	mov	x19, 0
+.L1920:
+	ldr	x1, [x0]
+	cbz	x1, .L1916
+	ldrh	w1, [x0, -8]
+	cmp	w1, w25
+	bne	.L1916
+.L1917:
+	cbnz	w23, .L1918
+	add	x0, x24, :lo12:.LANCHOR93
+	add	x0, x0, x19, lsl 4
+	ldr	x0, [x0, 8]
+	ldr	w0, [x0, x20, lsl 2]
+	str	w0, [x22]
+.L1919:
+	add	x24, x24, :lo12:.LANCHOR93
+	add	x19, x24, x19, lsl 4
+	ldrh	w0, [x19, 2]
+	mvn	x1, x0
+	tst	x1, 32767
+	beq	.L1922
+	add	w0, w0, 1
+	strh	w0, [x19, 2]
+.L1922:
+	mov	w0, 0
+	b	.L1913
+.L1918:
+	add	x0, x24, :lo12:.LANCHOR93
+	ldr	w2, [x22]
+	add	x0, x0, x19, lsl 4
+	ldr	x1, [x0, 8]
+	str	w2, [x1, x20, lsl 2]
+	ldrh	w1, [x0, 2]
+	orr	w1, w1, -32768
+	strh	w1, [x0, 2]
+	adrp	x0, .LANCHOR94
+	strb	w21, [x0, #:lo12:.LANCHOR94]
+	b	.L1919
+.L1916:
+	add	w19, w19, 1
+	add	x0, x0, 16
+	and	x19, x19, 65535
+	cmp	w19, 32
+	bne	.L1920
+	bl	pm_select_ram_region
+	and	x19, x0, 65535
+	sbfiz	x1, x19, 4, 32
+	add	x2, x24, :lo12:.LANCHOR93
+	add	x3, x2, x1
+	mov	w26, w0
+	ldrh	w2, [x2, x1]
+	mov	w1, 65535
+	cmp	w2, w1
+	beq	.L1921
+	ldrsh	w1, [x3, 2]
+	tbz	w1, #31, .L1921
+	bl	pm_flush_id
+.L1921:
+	adrp	x0, .LANCHOR151
+	mov	w1, w26
+	strb	w19, [x0, #:lo12:.LANCHOR151]
+	mov	w0, w25
+	bl	load_l2p_region
+	b	.L1917
+	.size	pm_log2phys, .-pm_log2phys
+	.section	.text.ftl_read_ahead,"ax",@progbits
+	.align	2
+	.global	ftl_read_ahead
+	.type	ftl_read_ahead, %function
+ftl_read_ahead:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR49
+	stp	x21, x22, [sp, 32]
+	ldr	w0, [x20, #:lo12:.LANCHOR49]
+	stp	x23, x24, [sp, 48]
+	cmn	w0, #1
+	beq	.L1929
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x19, x0
+	mov	w0, -1
+	cbz	x19, .L1928
+	ldr	w21, [x20, #:lo12:.LANCHOR49]
+	str	w21, [x19, 36]
+	str	w0, [x20, #:lo12:.LANCHOR49]
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 76]
+	ldr	x20, [x19, 8]
+	cmn	w0, #1
+	ldr	x22, [x19, 24]
+	bne	.L1931
+	mov	w2, 0
+	add	x1, x29, 76
+	mov	w0, w21
+	bl	pm_log2phys
+.L1931:
+	ldr	w0, [x29, 76]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L1932
+	adrp	x0, .LANCHOR45
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	mov	x0, x20
+	lsl	w2, w2, 9
+	bl	ftl_memset
+	ldrb	w0, [x19, 2]
+	orr	w0, w0, 8
+	strb	w0, [x19, 2]
+.L1929:
+	mov	w0, 0
+.L1928:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L1932:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w23, [x19, 52]
+	cmp	w23, 256
+	bne	.L1933
+	adrp	x0, .LANCHOR71
+	mov	w20, 21
+	mov	w24, 1
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x29, 76]
+	sub	w20, w20, w1
+	ldp	w2, w3, [x19, 36]
+	lsr	w0, w0, w1
+	lsl	w20, w24, w20
+	sub	w20, w20, #1
+	and	w20, w20, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w20, w20, w0
+	adrp	x0, .LC100
+	add	x0, x0, :lo12:.LC100
+	and	w1, w20, 65535
+	bl	printf
+	mov	w2, 0
+	mov	w1, w24
+	mov	w0, w20
+	bl	gc_add_sblk
+.L1933:
+	ldr	w5, [x22, 4]
+	cmp	w21, w5
+	beq	.L1934
+	ldrb	w1, [x19, 1]
+	adrp	x0, .LC101
+	ldr	w4, [x22]
+	mov	w2, w21
+	ldp	w6, w7, [x22, 8]
+	add	x0, x0, :lo12:.LC101
+	ldr	w3, [x29, 76]
+	bl	printf
+.L1934:
+	ldr	w0, [x22, 4]
+	cmp	w21, w0
+	bne	.L1935
+	cmn	w23, #1
+	bne	.L1929
+.L1935:
+	adrp	x1, .LANCHOR152
+	adrp	x0, .LC0
+	mov	w2, 758
+	add	x1, x1, :lo12:.LANCHOR152
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1936:
+	b	.L1936
+	.size	ftl_read_ahead, .-ftl_read_ahead
+	.section	.text.gc_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	gc_update_l2p_map
+	.type	gc_update_l2p_map, %function
+gc_update_l2p_map:
+	stp	x29, x30, [sp, -144]!
+	adrp	x0, .LANCHOR60
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	w21, 0
+	stp	x23, x24, [sp, 48]
+	mov	w24, 0
+	stp	x25, x26, [sp, 64]
+	adrp	x26, .LANCHOR64
+	stp	x27, x28, [sp, 80]
+	mov	w27, 0
+	ldr	x22, [x0, #:lo12:.LANCHOR60]
+	add	x0, x26, :lo12:.LANCHOR64
+	stp	x19, x20, [sp, 16]
+	str	x0, [x29, 104]
+.L1943:
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w27, w0
+	bge	.L1953
+	lsl	w23, w27, 1
+	mov	x19, 0
+	sub	w0, w23, #1
+	str	w0, [x29, 124]
+	b	.L1954
+.L1950:
+	adrp	x1, .LANCHOR107
+	sbfiz	x0, x24, 2, 32
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	ldr	w23, [x1, x0]
+	cmn	w23, #1
+	beq	.L1944
+	adrp	x1, .LANCHOR108
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w20, [x1, x0]
+	mov	w0, w23
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L1945
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w23
+	bl	pm_log2phys
+.L1945:
+	ldr	w0, [x29, 140]
+	cmp	w20, w0
+	bne	.L1946
+	ldr	x0, [x29, 112]
+	ldrh	w1, [x25]
+	ldrh	w0, [x0, 96]
+	mul	w0, w0, w1
+	ldr	x1, [x29, 104]
+	ldrb	w1, [x1]
+	cmp	w1, 3
+	bne	.L1947
+	add	w0, w0, w27
+	orr	w0, w0, w28, lsl 24
+.L1959:
+	mov	w2, 1
+	add	x1, x29, 136
+	str	w0, [x29, 136]
+	mov	w0, w23
+	bl	pm_log2phys
+	add	w21, w21, 1
+	adrp	x0, .LANCHOR71
+	ldrh	w2, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w1, w0, w2
+	mov	w0, 1
+	lsr	w20, w20, w2
+	lsl	w0, w0, w1
+	sub	w0, w0, #1
+	and	w20, w0, w20
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w0, w20, w0
+	bl	ftl_vpn_decrement
+.L1946:
+	add	w24, w24, 1
+.L1944:
+	add	w28, w28, 1
+.L1952:
+	ldrb	w0, [x26, #:lo12:.LANCHOR64]
+	cmp	w28, w0
+	ble	.L1950
+	add	x19, x19, 1
+.L1954:
+	ldrb	w0, [x22, 89]
+	cmp	w0, w19
+	ble	.L1951
+	add	x0, x22, x19, lsl 1
+	adrp	x25, .LANCHOR75
+	mov	w28, 1
+	add	x25, x25, :lo12:.LANCHOR75
+	str	x0, [x29, 112]
+	b	.L1952
+.L1947:
+	cmp	w1, 2
+	bne	.L1949
+	ldr	w1, [x29, 124]
+	add	w0, w0, w1
+	add	w0, w0, w28
+	orr	w0, w0, 33554432
+	b	.L1959
+.L1949:
+	add	w0, w0, w27
+	b	.L1959
+.L1951:
+	add	w27, w27, 1
+	b	.L1943
+.L1953:
+	adrp	x0, .LANCHOR56
+	ldrh	w1, [x22, 80]
+	ldp	x19, x20, [sp, 16]
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	strh	w21, [x0, x1, lsl 1]
+	ldp	x27, x28, [sp, 80]
+	ldp	x21, x22, [sp, 32]
+	ldp	x29, x30, [sp], 144
+	ret
+	.size	gc_update_l2p_map, .-gc_update_l2p_map
+	.section	.text.gc_update_l2p_map_new,"ax",@progbits
+	.align	2
+	.global	gc_update_l2p_map_new
+	.type	gc_update_l2p_map_new, %function
+gc_update_l2p_map_new:
+	stp	x29, x30, [sp, -176]!
+	adrp	x0, .LANCHOR60
+	adrp	x1, .LANCHOR68
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	ldr	x24, [x0, #:lo12:.LANCHOR60]
+	stp	x25, x26, [sp, 64]
+	ldrh	w25, [x1, #:lo12:.LANCHOR68]
+	add	x1, x24, 80
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR22
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	str	x1, [x29, 144]
+	ldrb	w1, [x1, 9]
+	str	x0, [x29, 128]
+	mul	w25, w25, w1
+	ldr	w1, [x20, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L1961
+	ldrh	w1, [x24, 80]
+	adrp	x0, .LC102
+	add	x0, x0, :lo12:.LC102
+	bl	printf
+.L1961:
+	adrp	x23, .LANCHOR56
+	ldrh	w1, [x24, 80]
+	sub	w2, w25, #1
+	mov	x21, 0
+	ldr	x0, [x23, #:lo12:.LANCHOR56]
+	mov	w22, 0
+	strh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LANCHOR45
+	add	x0, x0, :lo12:.LANCHOR45
+	str	x0, [x29, 104]
+.L1962:
+	mov	w27, w21
+	cmp	w25, w21
+	bhi	.L1972
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1973
+	ldr	x0, [x29, 128]
+	mov	w3, w22
+	ldr	x1, [x23, #:lo12:.LANCHOR56]
+	ldrh	w2, [x24, 80]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldrh	w2, [x1, x2, lsl 1]
+	ldrh	w1, [x0, 80]
+	adrp	x0, .LC106
+	add	x0, x0, :lo12:.LC106
+	bl	printf
+.L1973:
+	ldrh	w0, [x24, 80]
+	ldr	x1, [x23, #:lo12:.LANCHOR56]
+	lsl	x0, x0, 1
+	ldrh	w2, [x1, x0]
+	cmp	w22, w2
+	beq	.L1974
+	adrp	x1, .LANCHOR153
+	adrp	x0, .LC0
+	mov	w2, 448
+	add	x1, x1, :lo12:.LANCHOR153
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L1975:
+	b	.L1975
+.L1972:
+	adrp	x26, .LANCHOR107
+	lsl	x19, x21, 2
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	ldr	w2, [x0, x19]
+	cmn	w2, #1
+	beq	.L1963
+	adrp	x0, .LANCHOR45
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	lsl	w0, w0, 7
+	udiv	w0, w2, w0
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1964
+	ldr	w1, [x29, 156]
+	adrp	x0, .LC103
+	mov	w3, w21
+	add	x0, x0, :lo12:.LC103
+	bl	printf
+.L1964:
+	sub	w27, w25, w27
+	add	x27, x27, x21
+	lsl	x0, x27, 2
+	str	x0, [x29, 136]
+	adrp	x0, .LC105
+	add	x0, x0, :lo12:.LC105
+	str	x0, [x29, 120]
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	str	x0, [x29, 112]
+.L1965:
+	ldr	x0, [x29, 136]
+	cmp	x0, x19
+	bne	.L1971
+.L1963:
+	add	x21, x21, 1
+	b	.L1962
+.L1971:
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	ldr	w28, [x0, x19]
+	cmn	w28, #1
+	beq	.L1966
+	ldr	x0, [x29, 104]
+	ldr	w1, [x29, 156]
+	ldrb	w0, [x0]
+	lsl	w0, w0, 7
+	udiv	w0, w28, w0
+	cmp	w1, w0, uxth
+	bne	.L1966
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
+	ldr	w27, [x0, x19]
+	mov	w0, w28
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	bne	.L1967
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w28
+	bl	pm_log2phys
+.L1967:
+	ldr	w3, [x29, 172]
+	cmp	w27, w3
+	bne	.L1968
+	adrp	x0, .LANCHOR109
+	mov	w2, 1
+	add	x1, x29, 168
+	add	w22, w22, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR109]
+	ldr	w0, [x0, x19]
+	str	w0, [x29, 168]
+	mov	w0, w28
+	bl	pm_log2phys
+	ldr	x0, [x29, 112]
+	mov	w1, 21
+	ldrh	w0, [x0]
+	sub	w2, w1, w0
+	mov	w1, 1
+	lsr	w0, w27, w0
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w1, w1, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w1, w1, w0
+	and	w1, w1, 65535
+	str	w1, [x29, 152]
+	mov	w0, w1
+	bl	ftl_vpn_decrement
+	ldr	x0, [x29, 144]
+	ldr	w1, [x29, 152]
+	ldrh	w0, [x0]
+	cmp	w0, w1
+	bne	.L1969
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1969
+	ldr	w3, [x29, 172]
+	adrp	x0, .LC104
+	mov	w2, w27
+	mov	w1, w28
+	add	x0, x0, :lo12:.LC104
+	bl	printf
+.L1969:
+	ldr	x0, [x26, #:lo12:.LANCHOR107]
+	mov	w1, -1
+	str	w1, [x0, x19]
+.L1966:
+	add	x19, x19, 4
+	b	.L1965
+.L1968:
+	ldr	w0, [x20, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L1970
+	ldr	x0, [x29, 120]
+	mov	w2, w27
+	mov	w1, w28
+	bl	printf
+.L1970:
+	ldr	x0, [x29, 144]
+	ldrh	w0, [x0]
+	bl	ftl_vpn_decrement
+	b	.L1969
+.L1974:
+	strh	w22, [x1, x0]
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 176
+	ret
+	.size	gc_update_l2p_map_new, .-gc_update_l2p_map_new
+	.section	.text.gc_scan_src_blk_one_page,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk_one_page
+	.type	gc_scan_src_blk_one_page, %function
+gc_scan_src_blk_one_page:
+	stp	x29, x30, [sp, -96]!
+	mov	w5, 0
+	mov	w6, 0
+	mov	w7, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR58
+	add	x1, x19, :lo12:.LANCHOR58
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	str	x25, [sp, 64]
+	ldrb	w0, [x1, 4]
+	add	x2, x1, x0, sxtw 1
+	ldrh	w3, [x2, 40]
+	adrp	x2, .LANCHOR69
+	ldrb	w4, [x2, #:lo12:.LANCHOR69]
+	ldrh	w2, [x1, 2]
+.L1999:
+	cmp	w3, w7
+	beq	.L2001
+	cbz	w6, .L2002
+	add	x1, x19, :lo12:.LANCHOR58
+	strb	w0, [x1, 4]
+.L2002:
+	cbz	w5, .L2003
+	add	x0, x19, :lo12:.LANCHOR58
+	strh	w2, [x0, 2]
+.L2003:
+	adrp	x0, .LANCHOR75
+	ldrh	w22, [x0, #:lo12:.LANCHOR75]
+	adrp	x0, .LANCHOR64
+	mov	x23, x0
+	ldrb	w1, [x0, #:lo12:.LANCHOR64]
+	mul	w22, w22, w3
+	cmp	w1, 2
+	bne	.L2004
+	add	x0, x19, :lo12:.LANCHOR58
+	ldrb	w1, [x0, 6]
+	cbnz	w1, .L2004
+	ldrh	w0, [x0, 2]
+	add	w22, w22, w0, lsl 1
+.L2005:
+	add	x1, x19, :lo12:.LANCHOR58
+	ldrb	w0, [x1, 4]
+	add	w0, w0, 1
+	and	w0, w0, 255
+	strb	w0, [x1, 4]
+	cmp	w4, w0
+	bne	.L2006
+	ldrh	w0, [x1, 2]
+	strb	wzr, [x1, 4]
+	add	w0, w0, 1
+	strh	w0, [x1, 2]
+.L2006:
+	mov	w0, 1
+	add	x19, x19, :lo12:.LANCHOR58
+	bl	buf_alloc
+	add	x23, x23, :lo12:.LANCHOR64
+	mov	x21, x0
+	mov	w20, 0
+	adrp	x24, .LANCHOR61
+.L2016:
+	ldrb	w0, [x19, 6]
+	cmp	w0, 3
+	bne	.L2007
+	cbz	w20, .L2008
+.L2007:
+	cmp	w0, w20
+	bgt	.L2009
+.L2017:
+	mov	x0, x21
+	bl	buf_free
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldr	x25, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2001:
+	add	w0, w0, 1
+	and	w0, w0, 255
+	cmp	w0, w4
+	bne	.L2000
+	add	w2, w2, 1
+	mov	w5, 1
+	and	w2, w2, 65535
+	mov	w0, 0
+.L2000:
+	add	x3, x1, x0, sxtw 1
+	mov	w6, 1
+	ldrh	w3, [x3, 40]
+	b	.L1999
+.L2004:
+	add	x0, x19, :lo12:.LANCHOR58
+	ldrh	w0, [x0, 2]
+	add	w22, w0, w22
+	b	.L2005
+.L2009:
+	ldrb	w1, [x23]
+	cmp	w1, 2
+	bne	.L2010
+	cbnz	w0, .L2010
+	add	w0, w20, w22
+	orr	w0, w0, 33554432
+.L2030:
+	str	w0, [x21, 40]
+	mov	w1, 1
+	mov	x0, x21
+	bl	sblk_read_page
+	ldr	w0, [x21, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2013
+	ldr	x0, [x21, 24]
+	ldr	w25, [x0, 4]
+	mov	w0, w25
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2014
+	mov	w2, 0
+	add	x1, x29, 92
+	mov	w0, w25
+	bl	pm_log2phys
+.L2014:
+	ldr	w0, [x29, 92]
+	cmp	w22, w0
+	bne	.L2013
+	ldrh	w0, [x19, 24]
+	ldr	x2, [x24, #:lo12:.LANCHOR61]
+	ubfiz	x1, x0, 2, 16
+	add	w0, w0, 1
+	str	w22, [x2, x1]
+	strh	w0, [x19, 24]
+.L2013:
+	ldrh	w0, [x19, 26]
+	add	w0, w0, 1
+	strh	w0, [x19, 26]
+.L2008:
+	add	w20, w20, 1
+	cmp	w20, 4
+	bne	.L2016
+	b	.L2017
+.L2010:
+	orr	w0, w22, w20, lsl 24
+	b	.L2030
+	.size	gc_scan_src_blk_one_page, .-gc_scan_src_blk_one_page
+	.section	.text.gc_scan_static_data,"ax",@progbits
+	.align	2
+	.global	gc_scan_static_data
+	.type	gc_scan_static_data, %function
+gc_scan_static_data:
+	stp	x29, x30, [sp, -80]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	ldr	w1, [x0, 544]
+	str	x23, [sp, 48]
+	cmn	w1, #1
+	beq	.L2032
+	adrp	x21, .LANCHOR71
+	adrp	x22, .LANCHOR70
+	add	x21, x21, :lo12:.LANCHOR71
+	add	x22, x22, :lo12:.LANCHOR70
+	mov	w20, 11
+.L2041:
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	mov	w2, 0
+	add	x1, x29, 76
+	ldr	w0, [x0, 544]
+	bl	pm_log2phys
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	beq	.L2033
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 76]
+	mov	x23, x0
+	str	w1, [x0, 40]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	w0, [x23, 52]
+	cmp	w0, 256
+	bne	.L2034
+	ldrh	w3, [x21]
+	mov	w0, 21
+	ldr	w2, [x29, 76]
+	mov	w1, 1
+	sub	w0, w0, w3
+	lsr	w2, w2, w3
+	ldrb	w3, [x22]
+	lsl	w0, w1, w0
+	sub	w0, w0, #1
+	and	w0, w0, w2
+	mov	w2, 0
+	udiv	w0, w0, w3
+	bl	gc_add_sblk
+.L2034:
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	ldr	x1, [x23, 24]
+	ldr	w0, [x0, 544]
+	ldr	w1, [x1, 4]
+	cmp	w1, w0
+	beq	.L2035
+	adrp	x1, .LANCHOR154
+	adrp	x0, .LC0
+	mov	w2, 1149
+	add	x1, x1, :lo12:.LANCHOR154
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2036:
+	b	.L2036
+.L2035:
+	mov	x0, x23
+	bl	buf_free
+.L2033:
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	adrp	x2, .LANCHOR47
+	ldr	w2, [x2, #:lo12:.LANCHOR47]
+	ldr	w1, [x0, 544]
+	add	w1, w1, 1
+	str	w1, [x0, 544]
+	cmp	w1, w2
+	bcc	.L2037
+	mov	w1, -1
+	str	w1, [x0, 544]
+	ldr	w1, [x0, 548]
+	add	w1, w1, 1
+	str	w1, [x0, 548]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2031:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldr	x23, [sp, 48]
+	ldp	x29, x30, [sp], 80
+	ret
+.L2037:
+	ldr	w0, [x29, 76]
+	cmn	w0, #1
+	bne	.L2031
+	sub	w20, w20, #1
+	ands	w20, w20, 65535
+	bne	.L2041
+	b	.L2031
+.L2032:
+	adrp	x1, .LANCHOR46
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 40]
+	cmp	w2, 20480
+	bls	.L2043
+	ldr	w3, [x1, 44]
+	add	w3, w3, w2, lsr 10
+	and	w2, w2, 1023
+	stp	w2, w3, [x1, 40]
+.L2043:
+	ldr	w2, [x0, 536]
+	ldr	w3, [x0, 12]
+	add	w2, w2, 12959744
+	add	w2, w2, 256
+	cmp	w3, w2
+	ldr	w2, [x1, 44]
+	bhi	.L2044
+	ldr	w1, [x0, 540]
+	add	w1, w1, 98304
+	add	w1, w1, 1696
+	cmp	w2, w1
+	bls	.L2031
+.L2044:
+	str	w3, [x0, 536]
+	str	w2, [x0, 540]
+	str	wzr, [x0, 544]
+	b	.L2031
+	.size	gc_scan_static_data, .-gc_scan_static_data
+	.section	.text.ftl_sblk_dump,"ax",@progbits
+	.align	2
+	.global	ftl_sblk_dump
+	.type	ftl_sblk_dump, %function
+ftl_sblk_dump:
+	sub	sp, sp, #256
+	stp	x29, x30, [sp, 48]
+	add	x29, sp, 48
+	stp	x23, x24, [sp, 96]
+	and	w23, w0, 65535
+	stp	x19, x20, [sp, 64]
+	mov	w0, 65535
+	stp	x21, x22, [sp, 80]
+	cmp	w23, w0
+	stp	x25, x26, [sp, 112]
+	stp	x27, x28, [sp, 128]
+	beq	.L2072
+	uxtw	x0, w23
+	str	x0, [x29, 128]
+	lsl	x14, x0, 2
+	adrp	x0, .LANCHOR59
+	mov	x13, x0
+	ldr	x2, [x0, #:lo12:.LANCHOR59]
+	add	x2, x2, x14
+	ldrb	w2, [x2, 2]
+	and	w2, w2, 224
+	cmp	w2, 160
+	bne	.L2073
+	adrp	x0, .LANCHOR64
+	ldrb	w25, [x0, #:lo12:.LANCHOR64]
+.L2052:
+	add	x28, x29, 208
+	str	x1, [x29, 144]
+	mov	w0, w23
+	adrp	x21, .LANCHOR22
+	strh	w23, [x28, -32]!
+	add	x1, x28, 16
+	bl	ftl_get_blk_list_in_sblk
+	adrp	x2, .LANCHOR79
+	and	w1, w0, 255
+	strb	w1, [x29, 185]
+	ldrh	w3, [x2, #:lo12:.LANCHOR79]
+	strh	wzr, [x29, 178]
+	strb	wzr, [x29, 181]
+	strh	wzr, [x29, 186]
+	mul	w1, w1, w3
+	str	x2, [x29, 120]
+	strh	w1, [x29, 182]
+	ldr	w1, [x21, #:lo12:.LANCHOR22]
+	tbz	x1, 12, .L2053
+	ldr	x1, [x13, #:lo12:.LANCHOR59]
+	and	w4, w0, 255
+	mov	w3, w25
+	adrp	x0, .LC107
+	add	x1, x1, x14
+	add	x0, x0, :lo12:.LC107
+	ldrb	w2, [x1, 2]
+	mov	w1, w23
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2053:
+	mov	w0, 1
+	bl	buf_alloc
+	mov	w27, 0
+	mov	x26, x0
+	mov	w20, 0
+	adrp	x0, .LANCHOR75
+	stp	wzr, wzr, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR75
+	str	x0, [x29, 96]
+.L2054:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	cmp	w0, w20
+	bls	.L2069
+	lsl	w0, w20, 1
+	mov	w24, 0
+	sub	w0, w0, #1
+	str	w0, [x29, 140]
+	adrp	x0, .LC109
+	add	x0, x0, :lo12:.LC109
+	str	x0, [x29, 104]
+	b	.L2070
+.L2073:
+	mov	w25, 1
+	b	.L2052
+.L2066:
+	ldr	x0, [x29, 112]
+	ldrh	w10, [x28, x0]
+	mov	w0, 65535
+	cmp	w10, w0
+	beq	.L2055
+	ldr	x0, [x29, 96]
+	cmp	w25, 3
+	ldrh	w19, [x0]
+	mul	w19, w19, w10
+	bne	.L2056
+	add	w19, w20, w19
+	orr	w19, w19, w22, lsl 24
+.L2057:
+	str	w19, [x26, 40]
+	mov	w1, 1
+	str	w10, [x29, 136]
+	mov	x0, x26
+	bl	sblk_read_page
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	ldr	w11, [x26, 52]
+	ldr	w10, [x29, 136]
+	tbz	x0, 12, .L2059
+	ldr	x1, [x26, 24]
+	mov	w4, w11
+	ldr	x0, [x26, 8]
+	mov	w3, w19
+	str	w11, [x29, 136]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 32]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 16]
+	mov	w2, w20
+	ldr	w1, [x1]
+	str	w1, [sp, 8]
+	ldr	w1, [x0, 12]
+	str	w1, [sp]
+	mov	w1, w10
+	ldp	w5, w6, [x0]
+	ldr	w7, [x0, 8]
+	adrp	x0, .LC73
+	add	x0, x0, :lo12:.LC73
+	bl	printf
+	ldr	w11, [x29, 136]
+.L2059:
+	cmp	w11, 512
+	ldr	w0, [x29, 152]
+	ccmn	w11, #1, 4, ne
+	csinc	w0, w0, wzr, ne
+	str	w0, [x29, 152]
+	ldr	x0, [x26, 24]
+	ldr	w3, [x0, 4]
+	str	w3, [x29, 136]
+	mov	w0, w3
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 172]
+	cmn	w0, #1
+	ldr	w3, [x29, 136]
+	bne	.L2061
+	mov	w2, 0
+	add	x1, x29, 172
+	mov	w0, w3
+	bl	pm_log2phys
+.L2061:
+	ldr	w0, [x29, 172]
+	cmp	w19, w0
+	bne	.L2062
+	ldr	w0, [x29, 156]
+	add	w0, w0, 1
+	str	w0, [x29, 156]
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2062
+	ldr	x0, [x26, 24]
+	mov	w1, w19
+	ldr	w3, [x29, 156]
+	ldr	w2, [x0, 4]
+	adrp	x0, .LC108
+	add	x0, x0, :lo12:.LC108
+	bl	printf
+.L2062:
+	ldr	x0, [x29, 144]
+	cbz	x0, .L2063
+	ubfiz	x19, x27, 2, 32
+	ldr	w2, [x0, x19]
+	ldr	x0, [x26, 24]
+	ldr	w0, [x0, 4]
+	cmp	w0, w2
+	beq	.L2064
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2064
+	ldr	x0, [x29, 104]
+	mov	w1, w27
+	bl	printf
+.L2064:
+	ldr	x1, [x26, 24]
+	ldr	x0, [x29, 144]
+	ldr	w1, [x1, 4]
+	ldr	w0, [x0, x19]
+	cmp	w1, w0
+	beq	.L2063
+	cmn	w0, #1
+	beq	.L2063
+	adrp	x1, .LANCHOR155
+	adrp	x0, .LC0
+	mov	w2, 616
+	add	x1, x1, :lo12:.LANCHOR155
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2065:
+	b	.L2065
+.L2056:
+	cmp	w25, 2
+	bne	.L2058
+	ldr	w0, [x29, 140]
+	add	w19, w19, w0
+	adrp	x0, .LANCHOR64
+	add	w19, w19, w22
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	orr	w19, w19, w0, lsl 24
+	b	.L2057
+.L2058:
+	add	w19, w20, w19
+	b	.L2057
+.L2063:
+	add	w27, w27, 1
+.L2055:
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2068:
+	cmp	w25, w22
+	bcs	.L2066
+	add	w24, w24, 1
+	and	w24, w24, 65535
+.L2070:
+	ldrb	w0, [x29, 185]
+	cmp	w0, w24
+	bls	.L2067
+	sxtw	x0, w24
+	mov	w22, 1
+	add	x0, x0, 8
+	lsl	x0, x0, 1
+	str	x0, [x29, 112]
+	b	.L2068
+.L2067:
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2054
+.L2069:
+	mov	x0, x26
+	bl	buf_free
+	ldr	w0, [x21, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2071
+	adrp	x0, .LANCHOR56
+	ldr	x1, [x29, 128]
+	ldr	w3, [x29, 156]
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w2, [x0, x1, lsl 1]
+	adrp	x0, .LC110
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC110
+	bl	printf
+.L2071:
+	ldr	w0, [x29, 152]
+.L2050:
+	ldp	x19, x20, [sp, 64]
+	ldp	x21, x22, [sp, 80]
+	ldp	x23, x24, [sp, 96]
+	ldp	x25, x26, [sp, 112]
+	ldp	x27, x28, [sp, 128]
+	ldp	x29, x30, [sp, 48]
+	add	sp, sp, 256
+	ret
+.L2072:
+	mov	w0, 0
+	b	.L2050
+	.size	ftl_sblk_dump, .-ftl_sblk_dump
+	.section	.text.gc_search_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_search_src_blk
+	.type	gc_search_src_blk, %function
+gc_search_src_blk:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR60
+	and	w23, w0, 255
+	and	w0, w1, 255
+	str	w0, [x29, 156]
+	ldr	x0, [x24, #:lo12:.LANCHOR60]
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	add	x0, x0, x23, sxtw 1
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w19, [x0, 120]
+	cbnz	w19, .L2098
+	adrp	x26, .LANCHOR46
+	and	w27, w2, 255
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w20, [x0, 134]
+	adrp	x0, .LANCHOR22
+	str	x0, [x29, 144]
+	ldr	w1, [x0, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2101
+	ldr	w2, [x29, 156]
+	adrp	x0, .LC111
+	mov	w3, w27
+	mov	w1, w23
+	add	x0, x0, :lo12:.LC111
+	bl	printf
+.L2101:
+	ldr	x0, [x29, 144]
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2102
+	ldr	x1, [x24, #:lo12:.LANCHOR60]
+	adrp	x2, .LANCHOR57
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w3, [x2, #:lo12:.LANCHOR57]
+	ldrh	w2, [x1, 126]
+	ldrh	w1, [x0, 134]
+	adrp	x0, .LC111
+	add	x0, x0, :lo12:.LC111
+	bl	printf
+.L2102:
+	cmp	w27, 64
+	bls	.L2103
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 1028
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2104:
+	b	.L2104
+.L2103:
+	adrp	x0, .LANCHOR69
+	adrp	x22, .LANCHOR79
+	ldrb	w21, [x0, #:lo12:.LANCHOR69]
+	adrp	x0, .LANCHOR68
+	ldrh	w3, [x22, #:lo12:.LANCHOR79]
+	ldrh	w1, [x0, #:lo12:.LANCHOR68]
+	str	x0, [x29, 128]
+	adrp	x0, .LANCHOR54
+	str	x0, [x29, 120]
+	mul	w3, w21, w3
+	mul	w21, w21, w1
+	ldr	x1, [x26, #:lo12:.LANCHOR46]
+	and	w28, w3, 65535
+	and	w21, w21, 65535
+	ldrh	w25, [x1, 134]
+	add	x1, x0, :lo12:.LANCHOR54
+	adrp	x0, .LANCHOR105
+	str	x1, [x29, 136]
+	add	x0, x0, :lo12:.LANCHOR105
+	str	x0, [x29, 112]
+.L2105:
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x0]
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 134]
+	sub	w2, w1, w0
+	cmp	w25, w2
+	blt	.L2117
+.L2114:
+	ldr	x0, [x26, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 134]
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0, #:lo12:.LANCHOR54]
+	sub	w0, w0, w1
+	cmp	w25, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR60]
+	blt	.L2118
+	strh	w1, [x0, 126]
+	cbnz	w23, .L2119
+	adrp	x0, .LANCHOR57
+	ldrh	w1, [x0, #:lo12:.LANCHOR57]
+	cmp	w1, w28
+	bcs	.L2120
+	strh	w28, [x0, #:lo12:.LANCHOR57]
+.L2120:
+	ldrh	w1, [x22, #:lo12:.LANCHOR79]
+	mov	w2, 7
+	ldrh	w3, [x0, #:lo12:.LANCHOR57]
+	mul	w2, w1, w2
+	cmp	w3, w2, lsr 3
+	bge	.L2122
+	add	w1, w3, w1, lsr 3
+	strh	w1, [x0, #:lo12:.LANCHOR57]
+.L2122:
+	ldr	x0, [x29, 144]
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2128
+	adrp	x0, .LC113
+	mov	w1, w19
+	add	x0, x0, :lo12:.LC113
+	bl	printf
+.L2128:
+	bl	print_ftl_debug_info
+.L2098:
+	mov	w0, w19
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2117:
+	ldr	x2, [x24, #:lo12:.LANCHOR60]
+	ldrh	w20, [x2, 126]
+	add	w20, w25, w20
+	and	w20, w20, 65535
+	cmp	w1, w20
+	bhi	.L2106
+	sub	w0, w0, w1
+	add	w20, w20, w0
+	and	w20, w20, 65535
+	cmp	w1, w20
+	bhi	.L2106
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 1038
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2107:
+	b	.L2107
+.L2106:
+	adrp	x0, .LANCHOR59
+	uxtw	x4, w20
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x0, x0, x4, lsl 2
+	ldrb	w1, [x0, 2]
+	mov	w0, 224
+	and	w1, w1, 224
+	cmp	w1, 32
+	ccmp	w1, w0, 4, ne
+	beq	.L2108
+	adrp	x5, .LANCHOR56
+	lsl	x4, x4, 1
+	ldr	x0, [x5, #:lo12:.LANCHOR56]
+	cbnz	w1, .L2109
+	ldrh	w1, [x0, x4]
+	cbz	w1, .L2110
+	mov	w2, w20
+	stp	x5, x4, [x29, 96]
+	adrp	x0, .LC112
+	add	x0, x0, :lo12:.LC112
+	bl	printf
+	mov	x1, 0
+	mov	w0, w20
+	bl	ftl_sblk_dump
+	ldp	x5, x4, [x29, 96]
+.L2110:
+	ldr	x0, [x5, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x4]
+	cbz	w0, .L2108
+	adrp	x1, .LANCHOR156
+	adrp	x0, .LC0
+	mov	w2, 1047
+	add	x1, x1, :lo12:.LANCHOR156
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2111:
+	b	.L2111
+.L2109:
+	ldrh	w0, [x0, x4]
+	mov	w2, 65535
+	cmp	w0, w2
+	beq	.L2108
+	cmp	w1, 160
+	ldr	w3, [x29, 156]
+	cset	w2, eq
+	add	w2, w2, 1
+	and	w2, w3, w2
+	cbnz	w23, .L2113
+	cmp	w0, w28
+	csel	w3, w0, w28, cc
+	and	w28, w3, 65535
+	cbz	w2, .L2108
+	adrp	x1, .LANCHOR57
+	ldrh	w1, [x1, #:lo12:.LANCHOR57]
+	cmp	w1, w0
+	bls	.L2108
+	mov	w2, 0
+	mov	w1, 0
+	mov	w0, w20
+	bl	gc_add_sblk
+	cbz	w0, .L2108
+.L2161:
+	add	w19, w19, 1
+	and	w19, w19, 65535
+	b	.L2115
+.L2113:
+	cbz	w2, .L2115
+	bne	.L2116
+	adrp	x1, .LANCHOR106
+	cmp	w0, w21
+	csel	w21, w0, w21, cc
+	ldrh	w1, [x1, #:lo12:.LANCHOR106]
+	and	w21, w21, 65535
+	cmp	w1, w0
+	bls	.L2115
+.L2163:
+	mov	w2, w23
+	mov	w1, 0
+	mov	w0, w20
+	bl	gc_add_sblk
+	cbz	w0, .L2115
+	b	.L2161
+.L2116:
+	ldr	x1, [x29, 112]
+	cmp	w0, w28
+	csel	w3, w0, w28, cc
+	and	w28, w3, 65535
+	ldrh	w1, [x1]
+	cmp	w1, w0
+	bls	.L2163
+.L2115:
+	cmp	w19, w27
+	bhi	.L2114
+.L2108:
+	add	w25, w25, 1
+	and	w25, w25, 65535
+	b	.L2105
+.L2119:
+	ldr	x0, [x29, 128]
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	adrp	x1, .LANCHOR106
+	cmp	w21, w0
+	beq	.L2123
+	ldrh	w2, [x1, #:lo12:.LANCHOR106]
+	cmp	w2, w21
+	bcs	.L2123
+	strh	w21, [x1, #:lo12:.LANCHOR106]
+.L2123:
+	ldrh	w4, [x22, #:lo12:.LANCHOR79]
+	ldrh	w2, [x1, #:lo12:.LANCHOR106]
+	lsr	w3, w4, 3
+	sub	w0, w0, w3
+	cmp	w2, w0
+	bge	.L2124
+	add	w2, w2, w3
+	strh	w2, [x1, #:lo12:.LANCHOR106]
+.L2124:
+	adrp	x1, .LANCHOR105
+	ldrh	w0, [x1, #:lo12:.LANCHOR105]
+	cmp	w0, w4, lsr 1
+	bls	.L2122
+	sub	w0, w0, w3
+	strh	w0, [x1, #:lo12:.LANCHOR105]
+	b	.L2122
+.L2118:
+	strh	w20, [x0, 126]
+	cbnz	w23, .L2126
+	adrp	x1, .LANCHOR57
+	ldrh	w0, [x22, #:lo12:.LANCHOR79]
+	ldrh	w2, [x1, #:lo12:.LANCHOR57]
+	cmp	w2, w0, lsr 2
+	bls	.L2122
+	sub	w0, w2, w0, lsr 3
+	strh	w0, [x1, #:lo12:.LANCHOR57]
+	b	.L2122
+.L2126:
+	adrp	x0, .LANCHOR106
+	ldrh	w2, [x22, #:lo12:.LANCHOR79]
+	ldrh	w1, [x0, #:lo12:.LANCHOR106]
+	cmp	w1, w2, lsr 1
+	bls	.L2127
+	sub	w1, w1, w2, lsr 3
+	strh	w1, [x0, #:lo12:.LANCHOR106]
+.L2127:
+	adrp	x0, .LANCHOR70
+	adrp	x3, .LANCHOR105
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	ldrh	w1, [x3, #:lo12:.LANCHOR105]
+	mul	w0, w0, w2
+	sub	w0, w0, #32
+	cmp	w1, w0
+	bge	.L2122
+	add	w1, w1, 32
+	strh	w1, [x3, #:lo12:.LANCHOR105]
+	b	.L2122
+	.size	gc_search_src_blk, .-gc_search_src_blk
+	.section	.text.ftl_read,"ax",@progbits
+	.align	2
+	.global	ftl_read
+	.type	ftl_read, %function
+ftl_read:
+	stp	x29, x30, [sp, -160]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	stp	x25, x26, [sp, 64]
+	mov	w26, w2
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L2165
+	adrp	x0, .LANCHOR52
+	ldr	w2, [x0, #:lo12:.LANCHOR52]
+	mov	w0, 24576
+.L2166:
+	add	w3, w1, w26
+	cmp	w2, w3
+	bcc	.L2190
+	add	w22, w0, w1
+	adrp	x1, .LANCHOR46
+	adrp	x24, .LANCHOR45
+	str	x1, [x29, 120]
+	ldr	x2, [x1, #:lo12:.LANCHOR46]
+	ldr	w0, [x2, 24]
+	add	w0, w0, w26
+	str	w0, [x2, 24]
+	ldrb	w0, [x24, #:lo12:.LANCHOR45]
+	add	w2, w26, w22
+	stp	w2, wzr, [x29, 136]
+	sub	w2, w2, #1
+	udiv	w27, w22, w0
+	udiv	w0, w2, w0
+	mov	w20, w27
+	sub	w25, w0, w27
+	str	w0, [x29, 132]
+	add	w25, w25, 1
+	adrp	x0, .LC101
+	add	x0, x0, :lo12:.LC101
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+	str	x0, [x29, 104]
+.L2168:
+	cbnz	w25, .L2188
+	ldr	w0, [x29, 140]
+.L2164:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 160
+	ret
+.L2165:
+	cmp	w0, 3
+	bhi	.L2190
+	lsl	w0, w0, 13
+	mov	w2, 8192
+	b	.L2166
+.L2188:
+	ldrb	w1, [x24, #:lo12:.LANCHOR45]
+	cmp	w20, w27
+	ldr	w0, [x29, 132]
+	and	w19, w1, 65535
+	ccmp	w20, w0, 4, ne
+	bne	.L2191
+	cmp	w20, w27
+	bne	.L2170
+	udiv	w21, w22, w1
+	and	w0, w26, 65535
+	msub	w1, w21, w1, w22
+	and	w21, w1, 65535
+	sub	w19, w19, w21
+	and	w19, w19, 65535
+	cmp	w26, w19
+	csel	w19, w0, w19, cc
+.L2169:
+	adrp	x0, .LANCHOR36
+	add	x1, x0, :lo12:.LANCHOR36
+	add	x1, x1, 2
+	mov	w0, 0
+.L2173:
+	ldr	w2, [x1, 34]
+	cmp	w20, w2
+	bne	.L2171
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2171
+	ldr	x1, [x29, 104]
+	ubfiz	x0, x0, 6, 32
+	lsl	w2, w19, 9
+	ubfiz	x19, x19, 9, 16
+	add	x0, x1, x0
+	ubfiz	x21, x21, 9, 16
+	ldr	x1, [x0, 8]
+	mov	x0, x23
+	add	x23, x23, x19
+	add	x1, x1, x21
+	bl	ftl_memcpy
+.L2172:
+	add	w20, w20, 1
+	sub	w25, w25, #1
+	b	.L2168
+.L2170:
+	ldr	w0, [x29, 136]
+	msub	w19, w1, w20, w0
+	and	w19, w19, 255
+.L2191:
+	mov	w21, 0
+	b	.L2169
+.L2171:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2173
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 156]
+	cmn	w0, #1
+	bne	.L2174
+	mov	w2, 0
+	add	x1, x29, 156
+	mov	w0, w20
+	bl	pm_log2phys
+.L2174:
+	ldr	w0, [x29, 156]
+	cmn	w0, #1
+	bne	.L2175
+	add	x21, x24, :lo12:.LANCHOR45
+	mov	w19, 0
+.L2176:
+	ldrb	w0, [x21]
+	cmp	w19, w0
+	bcs	.L2172
+	madd	w0, w20, w0, w19
+	cmp	w22, w0
+	bhi	.L2177
+	ldr	w1, [x29, 136]
+	cmp	w1, w0
+	bls	.L2177
+	mov	x0, x23
+	add	x23, x23, 512
+	mov	w2, 512
+	mov	w1, 0
+	bl	ftl_memset
+.L2177:
+	add	w19, w19, 1
+	b	.L2176
+.L2175:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2179
+	bl	ftl_read_ahead
+	b	.L2168
+.L2179:
+	ldr	x0, [x29, 120]
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 40]
+	add	w0, w0, 1
+	str	w0, [x1, 40]
+	ldr	w0, [x29, 156]
+	stp	w0, w0, [x28, 40]
+	ldrb	w0, [x24, #:lo12:.LANCHOR45]
+	cmp	w0, w19
+	bne	.L2181
+	str	x23, [x28, 16]
+.L2181:
+	mov	w1, 1
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w10, [x28, 52]
+	cmn	w10, #1
+	beq	.L2192
+	cmp	w10, 256
+	bne	.L2182
+	adrp	x0, .LANCHOR71
+	mov	w4, 21
+	mov	w5, 1
+	stp	w10, w5, [x29, 96]
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	ldr	w0, [x29, 156]
+	sub	w4, w4, w1
+	ldp	w2, w3, [x28, 36]
+	lsl	w4, w5, w4
+	lsr	w0, w0, w1
+	sub	w4, w4, #1
+	and	w4, w4, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w4, w4, w0
+	adrp	x0, .LC114
+	add	x0, x0, :lo12:.LC114
+	and	w1, w4, 65535
+	str	w4, [x29, 128]
+	bl	printf
+	ldr	w5, [x29, 100]
+	mov	w2, 0
+	ldr	w4, [x29, 128]
+	mov	w1, w5
+	mov	w0, w4
+	bl	gc_add_sblk
+	ldr	w10, [x29, 96]
+.L2182:
+	ldr	x0, [x28, 24]
+	ldr	w5, [x0, 4]
+	cmp	w20, w5
+	beq	.L2183
+	ldr	w4, [x0]
+	mov	w2, w20
+	ldp	w6, w7, [x0, 8]
+	str	w10, [x29, 128]
+	ldrb	w1, [x28, 1]
+	ldr	w3, [x29, 156]
+	ldr	x0, [x29, 112]
+	bl	printf
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x29, 156]
+	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w10, [x29, 128]
+.L2183:
+	ldr	x0, [x28, 24]
+	ldr	w0, [x0, 4]
+	cmp	w20, w0
+	bne	.L2184
+	cmn	w10, #1
+	bne	.L2185
+.L2184:
+	adrp	x1, .LANCHOR157
+	adrp	x0, .LC0
+	mov	w2, 911
+	add	x1, x1, :lo12:.LANCHOR157
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2186:
+	b	.L2186
+.L2192:
+	str	w10, [x29, 140]
+	b	.L2182
+.L2185:
+	ldr	x0, [x28, 16]
+	cbnz	x0, .L2187
+	ldr	x1, [x28, 8]
+	ubfiz	x21, x21, 9, 16
+	lsl	w2, w19, 9
+	mov	x0, x23
+	add	x1, x1, x21
+	bl	ftl_memcpy
+.L2187:
+	ubfiz	x19, x19, 9, 16
+	mov	x0, x28
+	add	x23, x23, x19
+	bl	buf_free
+	b	.L2172
+.L2190:
+	mov	w0, -1
+	b	.L2164
+	.size	ftl_read, .-ftl_read
+	.section	.text.FtlRead,"ax",@progbits
+	.align	2
+	.global	FtlRead
+	.type	FtlRead, %function
+FtlRead:
+	and	w0, w0, 255
+	b	ftl_read
+	.size	FtlRead, .-FtlRead
+	.section	.text.StorageSysDataLoad,"ax",@progbits
+	.align	2
+	.global	StorageSysDataLoad
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	stp	x29, x30, [sp, -32]!
+	mov	w2, 512
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	x19, x1
+	mov	w20, w0
+	mov	w1, 0
+	mov	x0, x19
+	bl	ftl_memset
+	mov	x3, x19
+	mov	w1, w20
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 1
+	ldp	x29, x30, [sp], 32
+	mov	w0, 2
+	b	ftl_read
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.vpn_check,"ax",@progbits
+	.align	2
+	.global	vpn_check
+	.type	vpn_check, %function
+vpn_check:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	adrp	x20, .LANCHOR56
+	stp	x23, x24, [sp, 48]
+	adrp	x21, .LANCHOR47
+	stp	x25, x26, [sp, 64]
+	adrp	x22, .LANCHOR54
+	str	x27, [sp, 80]
+	bl	dump_ftl_info
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	mov	w24, 0
+	add	x21, x21, :lo12:.LANCHOR47
+	add	x23, x22, :lo12:.LANCHOR54
+	ldrh	w3, [x0, 80]
+	ldrh	w2, [x0, 48]
+	ldrh	w1, [x0, 16]
+	adrp	x0, .LC115
+	add	x0, x0, :lo12:.LC115
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	ldr	x3, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, 16]
+	ldrh	w2, [x0, 22]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC116
+	add	x0, x0, :lo12:.LC116
+	sub	w4, w3, w2
+	bl	printf
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	adrp	x19, check_vpc_tbl
+	ldr	x3, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, 48]
+	ldrh	w2, [x0, 54]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x3, x0]
+	adrp	x0, .LC117
+	add	x0, x0, :lo12:.LC117
+	sub	w4, w3, w2
+	bl	printf
+	mov	w2, 4352
+	mov	w1, 0
+	add	x0, x19, :lo12:check_vpc_tbl
+	bl	ftl_memset
+.L2202:
+	ldr	w0, [x21]
+	cmp	w24, w0
+	bcc	.L2210
+	adrp	x0, .LANCHOR54
+	adrp	x23, .LC120
+	add	x24, x0, :lo12:.LANCHOR54
+	mov	x22, x0
+	add	x23, x23, :lo12:.LC120
+	mov	w21, 0
+.L2211:
+	ldrh	w0, [x24]
+	cmp	w0, w21
+	bhi	.L2213
+	adrp	x23, .LC121
+	add	x22, x22, :lo12:.LANCHOR54
+	add	x19, x19, :lo12:check_vpc_tbl
+	add	x23, x23, :lo12:.LC121
+	mov	w21, 0
+	adrp	x27, .LANCHOR59
+.L2214:
+	ldrh	w0, [x22]
+	cmp	w0, w21
+	bhi	.L2219
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldr	x27, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2210:
+	mov	w0, w24
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 108]
+	cmn	w0, #1
+	bne	.L2203
+	mov	w2, 0
+	add	x1, x29, 108
+	mov	w0, w24
+	bl	pm_log2phys
+.L2204:
+	ldr	w2, [x29, 108]
+	cmn	w2, #1
+	beq	.L2206
+	adrp	x0, .LANCHOR71
+	mov	w3, 21
+	ldrh	w0, [x0, #:lo12:.LANCHOR71]
+	sub	w1, w3, w0
+	mov	w3, 1
+	lsr	w0, w2, w0
+	lsl	w3, w3, w1
+	sub	w3, w3, #1
+	and	w3, w3, w0
+	adrp	x0, .LANCHOR70
+	ldrb	w0, [x0, #:lo12:.LANCHOR70]
+	udiv	w3, w3, w0
+	ldrh	w0, [x22, #:lo12:.LANCHOR54]
+	and	w25, w3, 65535
+	and	w3, w3, 65535
+	cmp	w0, w25
+	bls	.L2207
+	add	x0, x19, :lo12:check_vpc_tbl
+	sxtw	x3, w3
+	ldrh	w1, [x0, x3, lsl 1]
+	add	w1, w1, 1
+	strh	w1, [x0, x3, lsl 1]
+.L2208:
+	ldrh	w0, [x23]
+	cmp	w0, w25
+	bhi	.L2206
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC0
+	mov	w2, 1111
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2209:
+	b	.L2209
+.L2203:
+	adrp	x1, .LANCHOR71
+	ldrh	w3, [x1, #:lo12:.LANCHOR71]
+	mov	w1, 21
+	sub	w2, w1, w3
+	mov	w1, 1
+	lsr	w0, w0, w3
+	lsl	w1, w1, w2
+	sub	w1, w1, #1
+	and	w0, w1, w0
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	cmp	w1, w0, uxth
+	bhi	.L2204
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC0
+	mov	w2, 1101
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2205:
+	b	.L2205
+.L2207:
+	mov	w1, w24
+	adrp	x0, .LC118
+	add	x0, x0, :lo12:.LC118
+	bl	printf
+	adrp	x0, .LANCHOR45
+	mov	w2, 4
+	ldrb	w3, [x0, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR93+8
+	ldr	x1, [x0, #:lo12:.LANCHOR93+8]
+	adrp	x0, .LC119
+	lsl	w3, w3, 7
+	add	x0, x0, :lo12:.LC119
+	bl	rknand_print_hex
+	b	.L2208
+.L2206:
+	add	w24, w24, 1
+	b	.L2202
+.L2213:
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	uxtw	x0, w21
+	ldrh	w3, [x1, x0, lsl 1]
+	add	x1, x19, :lo12:check_vpc_tbl
+	ldrh	w2, [x1, w21, sxtw 1]
+	cmp	w3, w2
+	beq	.L2212
+	adrp	x1, .LANCHOR59
+	ldr	x1, [x1, #:lo12:.LANCHOR59]
+	add	x0, x1, x0, lsl 2
+	mov	w1, w21
+	ldrb	w4, [x0, 2]
+	mov	x0, x23
+	ubfx	x4, x4, 5, 3
+	bl	printf
+.L2212:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2211
+.L2219:
+	ldr	x0, [x27, #:lo12:.LANCHOR59]
+	uxtw	x24, w21
+	add	x0, x0, x24, lsl 2
+	ldrb	w0, [x0, 2]
+	tst	w0, 224
+	bne	.L2215
+	sxtw	x25, w21
+	ldrh	w0, [x19, x25, lsl 1]
+	cbnz	w0, .L2216
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	lsl	x26, x24, 1
+	ldrh	w0, [x0, x26]
+	cbz	w0, .L2217
+	mov	w1, w21
+	mov	x0, x23
+	bl	printf
+.L2217:
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	strh	wzr, [x0, x26]
+.L2216:
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x24, lsl 1]
+	cbz	w0, .L2215
+	ldrh	w0, [x19, x25, lsl 1]
+	cbz	w0, .L2215
+	adrp	x1, .LANCHOR158
+	adrp	x0, .LC0
+	mov	w2, 1143
+	add	x1, x1, :lo12:.LANCHOR158
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2218:
+	b	.L2218
+.L2215:
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	b	.L2214
+	.size	vpn_check, .-vpn_check
+	.section	.text.ftl_info_check,"ax",@progbits
+	.align	2
+	.global	ftl_info_check
+	.type	ftl_info_check, %function
+ftl_info_check:
+	stp	x29, x30, [sp, -128]!
+	adrp	x0, .LANCHOR46
+	add	x29, sp, 0
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	stp	x27, x28, [sp, 80]
+	adrp	x27, .LC122
+	stp	x25, x26, [sp, 64]
+	add	x27, x27, :lo12:.LC122
+	adrp	x26, .LANCHOR54
+	stp	x21, x22, [sp, 32]
+	ldrh	w28, [x1, 134]
+	mov	w25, 0
+	stp	x23, x24, [sp, 48]
+	mov	w21, 0
+	stp	x19, x20, [sp, 16]
+	mov	w23, 0
+	str	x0, [x29, 112]
+	mov	w24, 0
+	add	x0, x26, :lo12:.LANCHOR54
+	mov	w20, 0
+	mov	w22, 0
+	adrp	x26, .LANCHOR56
+	str	x0, [x29, 120]
+.L2234:
+	ldr	x0, [x29, 120]
+	ldrh	w0, [x0]
+	cmp	w0, w28
+	bhi	.L2249
+	mov	w3, w20
+	mov	w2, w21
+	mov	w1, w22
+	adrp	x0, .LC123
+	add	x0, x0, :lo12:.LC123
+	bl	printf
+	mov	w1, w25
+	mov	w3, w23
+	mov	w2, w24
+	adrp	x0, .LC124
+	add	x0, x0, :lo12:.LC124
+	bl	printf
+	ldr	x0, [x29, 112]
+	ldr	x0, [x0, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 114]
+	cmp	w1, w25
+	beq	.L2250
+	strh	w25, [x0, 114]
+.L2250:
+	ldrh	w1, [x0, 118]
+	cmp	w1, w24
+	beq	.L2251
+	strh	w24, [x0, 118]
+.L2251:
+	ldrh	w1, [x0, 116]
+	cmp	w1, w23
+	beq	.L2252
+	strh	w23, [x0, 116]
+.L2252:
+	ldrh	w1, [x0, 122]
+	cmp	w1, w22
+	beq	.L2253
+	strh	w22, [x0, 122]
+.L2253:
+	ldrh	w1, [x0, 120]
+	cmp	w1, w21
+	beq	.L2254
+	strh	w21, [x0, 120]
+.L2254:
+	ldrh	w1, [x0, 124]
+	cmp	w1, w20
+	beq	.L2233
+	strh	w20, [x0, 124]
+.L2233:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2249:
+	adrp	x0, .LANCHOR59
+	uxtw	x19, w28
+	ldr	x4, [x0, #:lo12:.LANCHOR59]
+	add	x4, x4, x19, lsl 2
+	ldrb	w0, [x4, 2]
+	and	w1, w0, 224
+	cmp	w1, 64
+	bne	.L2235
+	add	w22, w22, 1
+	and	w22, w22, 65535
+.L2268:
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	ldrh	w1, [x0, x19, lsl 1]
+	cmp	w1, 15
+	bls	.L2241
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+.L2265:
+	adrp	x2, .LANCHOR69
+	ldrb	w2, [x2, #:lo12:.LANCHOR69]
+	mul	w0, w0, w2
+	cmp	w1, w0
+	bne	.L2237
+.L2241:
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w28
+	bl	gc_add_sblk
+.L2237:
+	add	w3, w28, 1
+	and	w28, w3, 65535
+	b	.L2234
+.L2235:
+	cmp	w1, 96
+	bne	.L2238
+	add	w20, w20, 1
+	and	w20, w20, 65535
+	b	.L2268
+.L2238:
+	cmp	w1, 160
+	bne	.L2240
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	add	w21, w21, 1
+	and	w21, w21, 65535
+	ldrh	w1, [x0, x19, lsl 1]
+	cmp	w1, 15
+	bls	.L2241
+	adrp	x0, .LANCHOR68
+	ldrh	w0, [x0, #:lo12:.LANCHOR68]
+	b	.L2265
+.L2240:
+	cbnz	w1, .L2237
+	ands	w0, w0, 24
+	bne	.L2242
+	add	w25, w25, 1
+	and	w25, w25, 65535
+.L2243:
+	ldr	x0, [x26, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 1
+	ldrh	w2, [x0, x19]
+	cbz	w2, .L2245
+	str	x4, [x29, 104]
+	mov	w1, w28
+	mov	x0, x27
+	bl	printf
+	ldr	x4, [x29, 104]
+	ldrb	w0, [x4, 2]
+	tbz	x0, 4, .L2246
+	mov	w1, 5
+.L2263:
+	bfi	w0, w1, 5, 3
+	strb	w0, [x4, 2]
+	mov	w2, 0
+	mov	w1, 1
+	mov	w0, w28
+	bl	gc_add_sblk
+	bl	vpn_check
+.L2245:
+	adrp	x0, .LANCHOR56
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x19]
+	cbz	w0, .L2237
+	adrp	x1, .LANCHOR159
+	adrp	x0, .LC0
+	mov	w2, 1202
+	add	x1, x1, :lo12:.LANCHOR159
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2248:
+	b	.L2248
+.L2242:
+	cmp	w0, 16
+	bne	.L2244
+	add	w24, w24, 1
+	and	w24, w24, 65535
+	b	.L2243
+.L2244:
+	add	w23, w23, 1
+	and	w23, w23, 65535
+	b	.L2243
+.L2246:
+	mov	w1, 2
+	b	.L2263
+	.size	ftl_info_check, .-ftl_info_check
+	.section	.text.gc_scan_src_blk,"ax",@progbits
+	.align	2
+	.global	gc_scan_src_blk
+	.type	gc_scan_src_blk, %function
+gc_scan_src_blk:
+	stp	x29, x30, [sp, -96]!
+	mov	w0, 65535
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	adrp	x19, .LANCHOR58
+	stp	x21, x22, [sp, 32]
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	stp	x23, x24, [sp, 48]
+	stp	x25, x26, [sp, 64]
+	cmp	w1, w0
+	bne	.L2270
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 880
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2271:
+	b	.L2271
+.L2270:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2272
+	adrp	x2, .LANCHOR56
+	ubfiz	x0, x1, 1, 16
+	ldr	x2, [x2, #:lo12:.LANCHOR56]
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC125
+	add	x0, x0, :lo12:.LC125
+	bl	printf
+.L2272:
+	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	add	x13, x19, :lo12:.LANCHOR58
+	add	x1, x13, 40
+	bl	ftl_get_blk_list_in_sblk
+	and	w1, w0, 255
+	strb	w1, [x13, 5]
+	cbnz	w1, .L2273
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR58]
+.L2309:
+	mov	w0, 0
+.L2269:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2273:
+	adrp	x1, .LANCHOR59
+	ldrh	w3, [x19, #:lo12:.LANCHOR58]
+	ldr	x1, [x1, #:lo12:.LANCHOR59]
+	mov	x2, x3
+	add	x1, x1, x3, lsl 2
+	ldrb	w1, [x1, 2]
+	and	w1, w1, 224
+	cmp	w1, 32
+	beq	.L2275
+	cmp	w1, 224
+	beq	.L2275
+	cbz	w1, .L2276
+	adrp	x3, .LANCHOR60
+	ldr	x3, [x3, #:lo12:.LANCHOR60]
+	ldrh	w4, [x3, 16]
+	cmp	w4, w2
+	beq	.L2275
+	ldrh	w4, [x3, 48]
+	cmp	w4, w2
+	beq	.L2275
+	ldrh	w3, [x3, 80]
+	cmp	w3, w2
+	bne	.L2307
+.L2275:
+	add	x0, x19, :lo12:.LANCHOR58
+	mov	w1, -1
+	strh	w1, [x19, #:lo12:.LANCHOR58]
+	strh	wzr, [x0, 24]
+	b	.L2309
+.L2276:
+	adrp	x0, .LANCHOR56
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, x3, lsl 1]
+	cbz	w0, .L2275
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 900
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2278:
+	b	.L2278
+.L2307:
+	and	w0, w0, 255
+	sub	w0, w0, #1
+	add	x0, x13, x0, sxtw 1
+	ldrh	w3, [x0, 40]
+	mov	w0, 65535
+	cmp	w3, w0
+	bne	.L2279
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 908
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2280:
+	b	.L2280
+.L2279:
+	adrp	x4, .LANCHOR75
+	adrp	x2, .LANCHOR79
+	cmp	w1, 160
+	mov	x24, x2
+	ldrh	w20, [x4, #:lo12:.LANCHOR75]
+	adrp	x21, .LANCHOR68
+	ldrh	w0, [x2, #:lo12:.LANCHOR79]
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+	mul	w20, w20, w3
+	bne	.L2294
+	adrp	x1, .LANCHOR64
+	ldrb	w1, [x1, #:lo12:.LANCHOR64]
+	and	w22, w1, 65535
+	cmp	w1, 2
+	orr	w20, w20, w1, lsl 24
+	bne	.L2281
+	ldrh	w0, [x21, #:lo12:.LANCHOR68]
+	mov	w22, 2
+	sub	w0, w0, #1
+	and	w0, w0, 65535
+.L2281:
+	add	x23, x19, :lo12:.LANCHOR58
+	orr	w20, w0, w20
+	mov	w0, 1
+	strb	w22, [x23, 6]
+	strh	wzr, [x23, 2]
+	strb	wzr, [x23, 4]
+	strh	wzr, [x23, 26]
+	bl	buf_alloc
+	str	w20, [x0, 40]
+	adrp	x20, .LANCHOR69
+	mov	x25, x0
+	mov	w1, 1
+	bl	sblk_read_page
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	adrp	x21, .LANCHOR61
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	mul	w2, w2, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR61]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	strh	wzr, [x23, 24]
+	ldr	w0, [x25, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2282
+.L2284:
+	mov	w0, -1
+	b	.L2269
+.L2294:
+	mov	w22, 1
+	b	.L2281
+.L2282:
+	ldr	x0, [x25, 24]
+	mov	w23, 15555
+	movk	w23, 0xf55f, lsl 16
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2283
+	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	mov	x1, 0
+	bl	ftl_sblk_dump
+	ldr	x0, [x25, 24]
+	ldr	w0, [x0]
+	cmp	w0, w23
+	beq	.L2284
+	adrp	x1, .LANCHOR160
+	adrp	x0, .LC0
+	mov	w2, 937
+	add	x1, x1, :lo12:.LANCHOR160
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2285:
+	b	.L2285
+.L2283:
+	ldrh	w0, [x24, #:lo12:.LANCHOR79]
+	adrp	x23, .LANCHOR70
+	ldrb	w20, [x20, #:lo12:.LANCHOR69]
+	add	x23, x23, :lo12:.LANCHOR70
+	ldr	x24, [x25, 8]
+	mov	x26, 0
+	mul	w20, w20, w0
+	mul	w20, w22, w20
+	adrp	x22, .LANCHOR71
+	add	x22, x22, :lo12:.LANCHOR71
+	and	w20, w20, 65535
+.L2286:
+	cmp	w20, w26
+	bgt	.L2291
+	mov	x0, x25
+	bl	buf_free
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	adrp	x20, .LANCHOR56
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x3, [x20, #:lo12:.LANCHOR56]
+	ubfiz	x2, x1, 1, 16
+	ldrh	w2, [x3, x2]
+	ldrh	w3, [x0, 24]
+	cmp	w2, w3
+	beq	.L2292
+	adrp	x0, .LC126
+	add	x0, x0, :lo12:.LC126
+	bl	printf
+.L2292:
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	bcs	.L2293
+	bl	vpn_check
+.L2293:
+	add	x0, x19, :lo12:.LANCHOR58
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	ldrh	w3, [x0, 24]
+	strh	w3, [x1, x2, lsl 1]
+	strh	wzr, [x0, 28]
+	ldrh	w0, [x0, 24]
+	b	.L2269
+.L2291:
+	ldr	w0, [x24, x26, lsl 2]
+	cmn	w0, #1
+	beq	.L2288
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 92]
+	cmn	w0, #1
+	bne	.L2289
+	ldr	w0, [x24, x26, lsl 2]
+	mov	w2, 0
+	add	x1, x29, 92
+	bl	pm_log2phys
+.L2289:
+	ldrh	w1, [x22]
+	mov	w0, 21
+	ldr	w3, [x29, 92]
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	lsr	w1, w3, w1
+	and	w0, w0, w1
+	ldrb	w1, [x23]
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	udiv	w0, w0, w1
+	add	x1, x19, :lo12:.LANCHOR58
+	cmp	w0, w2
+	bne	.L2288
+	ldrh	w0, [x1, 24]
+	ldr	x4, [x21, #:lo12:.LANCHOR61]
+	ubfiz	x2, x0, 2, 16
+	add	w0, w0, 1
+	str	w3, [x4, x2]
+	strh	w0, [x1, 24]
+.L2288:
+	add	x26, x26, 1
+	b	.L2286
+	.size	gc_scan_src_blk, .-gc_scan_src_blk
+	.section	.text.ftl_scan_all_data,"ax",@progbits
+	.align	2
+	.global	ftl_scan_all_data
+	.type	ftl_scan_all_data, %function
+ftl_scan_all_data:
+	sub	sp, sp, #160
+	mov	w0, 0
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	stp	x19, x20, [sp, 32]
+	mov	w20, 0
+	stp	x23, x24, [sp, 64]
+	adrp	x23, .LANCHOR47
+	stp	x27, x28, [sp, 96]
+	add	x28, x23, :lo12:.LANCHOR47
+	stp	x21, x22, [sp, 48]
+	adrp	x24, .LC129
+	stp	x25, x26, [sp, 80]
+	bl	buf_alloc
+	mov	w1, 0
+	mov	x19, x0
+	adrp	x0, .LC127
+	add	x0, x0, :lo12:.LC127
+	bl	printf
+	add	x0, x24, :lo12:.LC129
+	str	x0, [x29, 120]
+.L2311:
+	ldr	w0, [x23, #:lo12:.LANCHOR47]
+	cmp	w20, w0
+	bcc	.L2324
+	mov	x0, x19
+	bl	buf_free
+	ldp	x29, x30, [sp, 16]
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	add	sp, sp, 160
+	ret
+.L2324:
+	mov	w0, -1
+	str	w0, [x19, 36]
+	tst	x20, 4095
+	bne	.L2312
+	ldr	w2, [x29, 140]
+	adrp	x0, .LC128
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC128
+	bl	printf
+.L2312:
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2313
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2313:
+	ldr	w0, [x29, 140]
+	stp	w0, w0, [x19, 40]
+	cmn	w0, #1
+	bne	.L2314
+.L2316:
+	add	w20, w20, 1
+	b	.L2311
+.L2314:
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w3, [x19, 52]
+	ldr	x0, [x19, 24]
+	cmp	w3, 256
+	ccmn	w3, #1, 4, ne
+	beq	.L2315
+	ldr	w1, [x0, 4]
+	cmp	w20, w1
+	beq	.L2316
+.L2315:
+	ldr	x1, [x19, 8]
+	add	x27, x24, :lo12:.LC129
+	adrp	x25, .LANCHOR45
+	adrp	x26, .LC130
+	adrp	x22, .LANCHOR93
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	bl	printf
+	ldr	x1, [x19, 24]
+	ldr	w0, [x1, 8]
+	cmn	w0, #1
+	bne	.L2317
+.L2319:
+	ldrb	w21, [x25, #:lo12:.LANCHOR45]
+	mov	w0, w20
+	bl	lpa_hash_get_ppa
+	add	x22, x22, :lo12:.LANCHOR93
+	mov	w4, w0
+	add	x0, x26, :lo12:.LC130
+	lsl	w27, w21, 7
+	ubfiz	w3, w21, 7, 9
+	sub	w3, w3, #1
+	add	x21, x22, 8
+	and	w3, w3, w20
+	adrp	x26, .LC132
+	sdiv	w27, w20, w27
+	and	w3, w3, 65535
+	add	x22, x22, 520
+	add	x26, x26, :lo12:.LC132
+	mov	w1, w20
+	and	w25, w27, 65535
+	mov	w2, w25
+	bl	printf
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w20
+	bl	pm_log2phys
+.L2318:
+	ldr	x1, [x21]
+	cbz	x1, .L2323
+	ldrh	w0, [x21, -8]
+	cmp	w0, w25
+	bne	.L2323
+	mov	w3, 4096
+	mov	w2, 4
+	mov	x0, x26
+	bl	rknand_print_hex
+.L2323:
+	add	x21, x21, 16
+	cmp	x22, x21
+	bne	.L2318
+	b	.L2316
+.L2317:
+	ldr	w21, [x1, 4]
+	ldr	w1, [x28]
+	cmp	w21, w1
+	bcs	.L2319
+	str	w0, [x19, 40]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w20
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	mov	x0, x27
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	bl	printf
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2320
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w21
+	bl	pm_log2phys
+.L2320:
+	ldr	w0, [x29, 140]
+	mov	w1, 1
+	str	w0, [x19, 40]
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	x1, [x19, 8]
+	ldr	x0, [x19, 24]
+	ldr	w2, [x1, 4]
+	str	w2, [sp, 8]
+	ldr	w1, [x1]
+	str	w1, [sp]
+	mov	w1, w21
+	ldp	w4, w5, [x0]
+	ldp	w6, w7, [x0, 8]
+	ldr	w2, [x19, 40]
+	ldr	w3, [x19, 52]
+	ldr	x0, [x29, 120]
+	bl	printf
+	ldrb	w3, [x25, #:lo12:.LANCHOR45]
+	mov	w0, w21
+	str	w3, [x29, 104]
+	lsl	w2, w3, 7
+	udiv	w2, w21, w2
+	and	w27, w2, 65535
+	str	w2, [x29, 112]
+	bl	lpa_hash_get_ppa
+	mov	w4, w0
+	ldr	w3, [x29, 104]
+	mov	w1, w21
+	ldr	w2, [x29, 112]
+	add	x0, x26, :lo12:.LC130
+	ubfiz	w3, w3, 7, 9
+	and	w2, w2, 65535
+	sub	w3, w3, #1
+	and	w3, w3, w21
+	and	w3, w3, 65535
+	bl	printf
+	mov	w0, w21
+	mov	w2, 0
+	add	x1, x29, 140
+	bl	pm_log2phys
+	add	x0, x22, :lo12:.LANCHOR93
+	adrp	x5, .LC131
+	add	x21, x0, 8
+	add	x4, x0, 520
+	add	x5, x5, :lo12:.LC131
+.L2322:
+	ldr	x1, [x21]
+	cbz	x1, .L2321
+	ldrh	w0, [x21, -8]
+	cmp	w0, w27
+	bne	.L2321
+	mov	x0, x5
+	stp	x4, x5, [x29, 104]
+	mov	w3, 4096
+	mov	w2, 4
+	bl	rknand_print_hex
+	ldp	x4, x5, [x29, 104]
+.L2321:
+	add	x21, x21, 16
+	cmp	x4, x21
+	bne	.L2322
+	b	.L2319
+	.size	ftl_scan_all_data, .-ftl_scan_all_data
+	.section	.text.gc_recovery,"ax",@progbits
+	.align	2
+	.global	gc_recovery
+	.type	gc_recovery, %function
+gc_recovery:
+	sub	sp, sp, #240
+	adrp	x0, .LANCHOR67
+	stp	x29, x30, [sp, 32]
+	add	x29, sp, 32
+	stp	x21, x22, [sp, 64]
+	adrp	x21, .LANCHOR60
+	stp	x19, x20, [sp, 48]
+	ldr	x20, [x21, #:lo12:.LANCHOR60]
+	strb	wzr, [x0, #:lo12:.LANCHOR67]
+	adrp	x0, .LANCHOR104
+	stp	x23, x24, [sp, 80]
+	strb	wzr, [x0, #:lo12:.LANCHOR104]
+	stp	x25, x26, [sp, 96]
+	stp	x27, x28, [sp, 112]
+	bl	gc_init
+	add	x0, x20, 80
+	ldrh	w1, [x20, 80]
+	str	x0, [x29, 168]
+	mov	w0, 65535
+	cmp	w1, w0
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	beq	.L2335
+	mov	w1, -1
+	strh	w1, [x0, 130]
+	mov	w0, 1
+	bl	buf_alloc
+	mov	x27, x0
+	ldrb	w0, [x20, 89]
+	add	x1, x20, 80
+	adrp	x3, .LANCHOR75
+	adrp	x2, .LANCHOR64
+	sub	w0, w0, #1
+	str	x3, [x29, 128]
+	add	x0, x1, x0, sxtw 1
+	ldrh	w1, [x3, #:lo12:.LANCHOR75]
+	str	x2, [x29, 160]
+	ldrh	w0, [x0, 16]
+	mul	w1, w0, w1
+	ldrb	w0, [x2, #:lo12:.LANCHOR64]
+	str	w1, [x29, 200]
+	cmp	w0, 3
+	bne	.L2336
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	sub	w0, w0, #1
+	add	w0, w0, w1
+	orr	w0, w0, 50331648
+.L2383:
+	str	w0, [x27, 40]
+.L2337:
+	mov	w1, 1
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	w0, [x27, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	beq	.L2338
+	ldr	x0, [x27, 24]
+	ldr	w1, [x0]
+	mov	w0, 15555
+	movk	w0, 0xf55f, lsl 16
+	cmp	w1, w0
+	beq	.L2339
+.L2338:
+	mov	x0, x27
+	bl	buf_free
+	ldr	x1, [x27, 24]
+	ldr	x0, [x27, 8]
+	ldr	w2, [x1, 12]
+	str	w2, [sp, 16]
+	ldr	w2, [x1, 8]
+	str	w2, [sp, 8]
+	ldr	w2, [x1, 4]
+	str	w2, [sp]
+	ldp	w3, w4, [x0]
+	ldp	w5, w6, [x0, 8]
+	adrp	x0, .LC133
+	ldr	w7, [x1]
+	add	x0, x0, :lo12:.LC133
+	ldr	w1, [x27, 40]
+	ldr	w2, [x27, 52]
+	bl	printf
+.L2387:
+	adrp	x0, .LANCHOR56
+	ldrh	w1, [x20, 80]
+	mov	w22, 0
+	ldr	x0, [x0, #:lo12:.LANCHOR56]
+	strh	wzr, [x0, x1, lsl 1]
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldrh	w1, [x20, 80]
+	strh	w1, [x0, 130]
+.L2340:
+	ldrh	w1, [x20, 80]
+	mov	w2, w22
+	adrp	x0, .LC138
+	add	x0, x0, :lo12:.LC138
+	bl	printf
+	mov	w0, -1
+	strh	w0, [x20, 80]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, 65535
+	ldrh	w0, [x0, 130]
+	cmp	w0, w1
+	beq	.L2369
+	bl	ftl_free_sblk
+.L2369:
+	adrp	x0, .LANCHOR46
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	mov	w0, -1
+	strh	w0, [x1, 126]
+	ldr	x1, [x21, #:lo12:.LANCHOR60]
+	strh	w0, [x1, 130]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2334:
+	ldp	x19, x20, [sp, 48]
+	ldp	x21, x22, [sp, 64]
+	ldp	x23, x24, [sp, 80]
+	ldp	x25, x26, [sp, 96]
+	ldp	x27, x28, [sp, 112]
+	ldp	x29, x30, [sp, 32]
+	add	sp, sp, 240
+	ret
+.L2336:
+	cmp	w0, 2
+	bne	.L2337
+	adrp	x0, .LANCHOR79
+	ldrh	w0, [x0, #:lo12:.LANCHOR79]
+	add	w0, w1, w0, lsl 1
+	sub	w0, w0, #1
+	orr	w0, w0, 33554432
+	b	.L2383
+.L2339:
+	adrp	x26, .LANCHOR68
+	adrp	x19, .LANCHOR69
+	adrp	x23, .LANCHOR107
+	ldr	x1, [x27, 8]
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	adrp	x22, .LANCHOR108
+	ldrh	w2, [x26, #:lo12:.LANCHOR68]
+	mul	w2, w2, w0
+	ldr	x0, [x23, #:lo12:.LANCHOR107]
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x26, #:lo12:.LANCHOR68]
+	mul	w0, w0, w1
+	ldr	x1, [x27, 8]
+	lsl	w2, w0, 2
+	add	x1, x1, x0, sxtw 2
+	ldr	x0, [x22, #:lo12:.LANCHOR108]
+	bl	ftl_memcpy
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 4
+	ldrh	w3, [x26, #:lo12:.LANCHOR68]
+	ldr	x1, [x23, #:lo12:.LANCHOR107]
+	mul	w3, w3, w0
+	adrp	x0, .LC134
+	add	x0, x0, :lo12:.LC134
+	bl	rknand_print_hex
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mov	w2, 4
+	ldrh	w3, [x26, #:lo12:.LANCHOR68]
+	ldr	x1, [x22, #:lo12:.LANCHOR108]
+	mul	w3, w3, w0
+	adrp	x0, .LC135
+	add	x0, x0, :lo12:.LC135
+	bl	rknand_print_hex
+	str	x26, [x29, 120]
+	adrp	x0, .LANCHOR79
+	stp	x22, x23, [x29, 144]
+	ldrh	w24, [x0, #:lo12:.LANCHOR79]
+	ldr	x0, [x29, 160]
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 2
+	beq	.L2341
+.L2384:
+	str	w0, [x29, 180]
+	adrp	x23, .LC136
+	ldr	x0, [x29, 128]
+	add	x23, x23, :lo12:.LC136
+	mov	w26, 0
+	mov	w22, 0
+	add	x0, x0, :lo12:.LANCHOR75
+	str	x0, [x29, 104]
+.L2343:
+	sub	w0, w26, #1
+	str	w0, [x29, 184]
+	cmp	w26, w24
+	beq	.L2352
+	mov	x19, 0
+	b	.L2353
+.L2341:
+	lsl	w24, w24, 1
+	mov	w0, 1
+	b	.L2384
+.L2349:
+	ldr	x1, [x29, 104]
+	ldr	x0, [x29, 136]
+	ldrh	w1, [x1]
+	ldrh	w0, [x0, 96]
+	mul	w0, w0, w1
+	ldr	x1, [x29, 112]
+	str	w0, [x29, 200]
+	ldrb	w1, [x1]
+	cmp	w1, 3
+	bne	.L2344
+	add	w0, w26, w0
+	orr	w0, w0, w25, lsl 24
+.L2385:
+	str	w0, [x27, 40]
+	mov	w1, 1
+	mov	x0, x27
+	bl	sblk_read_page
+	ldr	x0, [x29, 152]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	w3, [x0, x28]
+	ldr	x0, [x27, 24]
+	ldr	w6, [x0, 4]
+	cmp	w3, w6
+	bne	.L2347
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w2, [x1, x28]
+	ldr	w1, [x0, 8]
+	cmp	w2, w1
+	beq	.L2348
+.L2347:
+	ldr	x1, [x29, 144]
+	ldr	w2, [x0, 12]
+	str	w2, [sp]
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w5, [x0]
+	ldr	w7, [x0, 8]
+	mov	x0, x23
+	ldr	w2, [x27, 52]
+	ldr	w4, [x1, x28]
+	ldr	w1, [x27, 40]
+	bl	printf
+	ldr	x0, [x29, 152]
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	ldr	w0, [x0, x28]
+	cmn	w0, #1
+	beq	.L2348
+	mov	x0, x27
+	bl	buf_free
+	b	.L2387
+.L2344:
+	cmp	w1, 2
+	bne	.L2346
+	ldr	w1, [x29, 184]
+	add	w0, w0, w1
+	add	w0, w0, w25
+	orr	w0, w0, 33554432
+	b	.L2385
+.L2346:
+	add	w0, w26, w0
+	b	.L2385
+.L2348:
+	add	w22, w22, 1
+	add	w25, w25, 1
+	add	x28, x28, 4
+.L2351:
+	ldr	w0, [x29, 180]
+	cmp	w0, w25
+	bcs	.L2349
+	add	x19, x19, 1
+.L2353:
+	ldr	x0, [x29, 168]
+	ldrb	w0, [x0, 9]
+	cmp	w0, w19
+	ble	.L2350
+	add	x0, x20, x19, lsl 1
+	str	x0, [x29, 136]
+	ldr	x0, [x29, 160]
+	sbfiz	x28, x22, 2, 32
+	mov	w25, 1
+	add	x0, x0, :lo12:.LANCHOR64
+	str	x0, [x29, 112]
+	b	.L2351
+.L2350:
+	add	w26, w26, 1
+	b	.L2343
+.L2352:
+	mov	x0, x27
+	bl	buf_free
+	ldr	x3, [x29, 120]
+	adrp	x24, .LANCHOR56
+	ldr	x0, [x29, 168]
+	mov	w22, 0
+	ldrh	w2, [x20, 80]
+	mov	w23, 0
+	ldr	x1, [x24, #:lo12:.LANCHOR56]
+	mov	w27, 0
+	ldrh	w3, [x3, #:lo12:.LANCHOR68]
+	ldrb	w0, [x0, 9]
+	mul	w0, w0, w3
+	strh	w0, [x1, x2, lsl 1]
+	adrp	x0, .LANCHOR71
+	add	x0, x0, :lo12:.LANCHOR71
+	str	x0, [x29, 96]
+.L2354:
+	sub	w0, w23, #1
+	str	w0, [x29, 120]
+	cmp	w26, w23
+	beq	.L2367
+	str	xzr, [x29, 184]
+	b	.L2368
+.L2364:
+	ldr	x1, [x29, 152]
+	sbfiz	x0, x27, 2, 32
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	ldr	w28, [x1, x0]
+	cmn	w28, #1
+	beq	.L2355
+	ldr	x1, [x29, 144]
+	ldr	x1, [x1, #:lo12:.LANCHOR108]
+	ldr	w0, [x1, x0]
+	str	w0, [x29, 136]
+	mov	w0, w28
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 204]
+	cmn	w0, #1
+	bne	.L2356
+	mov	w2, 0
+	add	x1, x29, 204
+	mov	w0, w28
+	bl	pm_log2phys
+.L2356:
+	ldr	x0, [x29, 112]
+	ldr	x1, [x29, 128]
+	ldrh	w0, [x0, 96]
+	ldrh	w1, [x1, #:lo12:.LANCHOR75]
+	mul	w0, w0, w1
+	ldr	x1, [x29, 160]
+	ldrb	w1, [x1, #:lo12:.LANCHOR64]
+	cmp	w1, 3
+	bne	.L2357
+	add	w0, w23, w0
+	orr	w0, w0, w25, lsl 24
+.L2386:
+	str	w0, [x29, 200]
+	mov	w19, 21
+	ldr	x0, [x29, 96]
+	mov	w4, 1
+	ldr	w1, [x29, 136]
+	ldrh	w0, [x0]
+	sub	w19, w19, w0
+	lsr	w0, w1, w0
+	lsl	w19, w4, w19
+	sub	w19, w19, #1
+	and	w19, w19, w0
+	ldr	x0, [x29, 104]
+	ldrb	w0, [x0]
+	udiv	w19, w19, w0
+	ldr	w0, [x29, 204]
+	cmp	w1, w0
+	and	x19, x19, 65535
+	bne	.L2360
+	ldr	w2, [x29, 200]
+	mov	w1, w28
+	str	w4, [x29, 136]
+	adrp	x0, .LC137
+	add	x0, x0, :lo12:.LC137
+	bl	pm_ppa_update_check
+	ldr	w4, [x29, 136]
+	cbz	w0, .L2361
+.L2381:
+	b	.L2381
+.L2357:
+	cmp	w1, 2
+	bne	.L2359
+	ldr	w1, [x29, 120]
+	add	w0, w0, w1
+	add	w0, w0, w25
+	orr	w0, w0, 33554432
+	b	.L2386
+.L2359:
+	add	w0, w23, w0
+	b	.L2386
+.L2361:
+	mov	w2, w4
+	add	x1, x29, 200
+	mov	w0, w28
+	bl	pm_log2phys
+	add	w22, w22, 1
+	mov	w0, w19
+	bl	ftl_vpn_decrement
+.L2363:
+	adrp	x0, .LANCHOR59
+	add	w27, w27, 1
+	ldr	x0, [x0, #:lo12:.LANCHOR59]
+	add	x0, x0, x19, lsl 2
+	ldrb	w0, [x0, 2]
+	tst	w0, 224
+	bne	.L2355
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	lsl	x19, x19, 1
+	ldrh	w1, [x0, x19]
+	cbz	w1, .L2355
+	strh	wzr, [x0, x19]
+.L2355:
+	add	w25, w25, 1
+.L2366:
+	ldr	w0, [x29, 180]
+	cmp	w0, w25
+	bcs	.L2364
+	ldr	x0, [x29, 184]
+	add	x0, x0, 1
+	str	x0, [x29, 184]
+.L2368:
+	ldr	x0, [x29, 168]
+	ldr	w1, [x29, 184]
+	ldrb	w0, [x0, 9]
+	cmp	w0, w1
+	ble	.L2365
+	ldr	x0, [x29, 184]
+	mov	w25, 1
+	add	x0, x20, x0, lsl 1
+	str	x0, [x29, 112]
+	adrp	x0, .LANCHOR70
+	add	x0, x0, :lo12:.LANCHOR70
+	str	x0, [x29, 104]
+	b	.L2366
+.L2360:
+	ldr	w1, [x29, 200]
+	cmp	w0, w1
+	cinc	w22, w22, eq
+	b	.L2363
+.L2365:
+	add	w23, w23, 1
+	b	.L2354
+.L2367:
+	ldrh	w1, [x20, 80]
+	ldr	x0, [x24, #:lo12:.LANCHOR56]
+	strh	w22, [x0, x1, lsl 1]
+	b	.L2340
+.L2335:
+	ldrh	w0, [x0, 130]
+	cmp	w0, w1
+	beq	.L2334
+	adrp	x19, .LANCHOR46
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldrh	w1, [x1, 126]
+	cmp	w1, w0
+	bne	.L2371
+	bl	pm_flush
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	ldrh	w0, [x0, 130]
+	bl	ftl_free_sblk
+	ldr	x0, [x19, #:lo12:.LANCHOR46]
+	mov	w1, -1
+	strh	w1, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+.L2371:
+	ldr	x0, [x21, #:lo12:.LANCHOR60]
+	mov	w1, -1
+	strh	w1, [x0, 130]
+	b	.L2334
+	.size	gc_recovery, .-gc_recovery
+	.section	.text.ftl_init,"ax",@progbits
+	.align	2
+	.global	ftl_init
+	.type	ftl_init, %function
+ftl_init:
+	stp	x29, x30, [sp, -64]!
+	adrp	x1, .LANCHOR42
+	mov	w0, -1
+	add	x29, sp, 0
+	strb	w0, [x1, #:lo12:.LANCHOR42]
+	adrp	x1, .LANCHOR43
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR79
+	strb	wzr, [x1, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR127
+	stp	x21, x22, [sp, 32]
+	adrp	x19, .LANCHOR69
+	strb	w0, [x1, #:lo12:.LANCHOR127]
+	adrp	x0, .LANCHOR89
+	mov	w1, -1
+	stp	x23, x24, [sp, 48]
+	strb	wzr, [x0, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR49
+	adrp	x22, .LANCHOR54
+	adrp	x21, .LANCHOR149
+	str	w1, [x0, #:lo12:.LANCHOR49]
+	adrp	x1, .LC139
+	adrp	x0, .LC32
+	add	x1, x1, :lo12:.LC139
+	add	x0, x0, :lo12:.LC32
+	bl	printf
+	adrp	x3, .LANCHOR19
+	add	x3, x3, :lo12:.LANCHOR19
+	adrp	x0, .LANCHOR64
+	adrp	x1, .LANCHOR45
+	adrp	x2, .LANCHOR68
+	adrp	x5, .LANCHOR70
+	ldrb	w7, [x3, 12]
+	strb	w7, [x0, #:lo12:.LANCHOR64]
+	ldrb	w0, [x3, 9]
+	strb	w0, [x1, #:lo12:.LANCHOR45]
+	ldrh	w1, [x3, 10]
+	strh	w1, [x2, #:lo12:.LANCHOR68]
+	adrp	x2, .LANCHOR8
+	ubfiz	w8, w0, 9, 7
+	strh	w8, [x21, #:lo12:.LANCHOR149]
+	ldrb	w4, [x2, #:lo12:.LANCHOR8]
+	adrp	x2, .LANCHOR76
+	sdiv	w7, w1, w7
+	strb	w4, [x2, #:lo12:.LANCHOR76]
+	ldrb	w2, [x3, 13]
+	strb	w2, [x5, #:lo12:.LANCHOR70]
+	ldrh	w5, [x3, 14]
+	adrp	x3, .LANCHOR13
+	strh	w7, [x20, #:lo12:.LANCHOR79]
+	mul	w4, w4, w2
+	ldrh	w6, [x3, #:lo12:.LANCHOR13]
+	adrp	x3, .LANCHOR75
+	strh	w5, [x22, #:lo12:.LANCHOR54]
+	and	w2, w4, 255
+	mov	w4, 1
+	strh	w6, [x3, #:lo12:.LANCHOR75]
+	mov	w3, 0
+	strb	w2, [x19, #:lo12:.LANCHOR69]
+.L2389:
+	cmp	w6, w4
+	bcs	.L2390
+	mul	w6, w0, w1
+	adrp	x4, .LANCHOR71
+	mov	w1, 57344
+	sub	w3, w3, #1
+	movk	w1, 0x1c, lsl 16
+	strh	w3, [x4, #:lo12:.LANCHOR71]
+	adrp	x24, .LANCHOR137
+	adrp	x23, .LANCHOR60
+	mul	w4, w6, w5
+	mul	w1, w2, w1
+	lsr	w3, w4, 21
+	mul	w4, w4, w2
+	mul	w1, w1, w3
+	adrp	x3, .LANCHOR52
+	str	w1, [x3, #:lo12:.LANCHOR52]
+	add	w1, w1, 24576
+	adrp	x3, .LANCHOR161
+	udiv	w0, w1, w0
+	str	w4, [x3, #:lo12:.LANCHOR161]
+	adrp	x3, .LANCHOR162
+	str	w1, [x3, #:lo12:.LANCHOR162]
+	adrp	x3, .LANCHOR47
+	str	w0, [x3, #:lo12:.LANCHOR47]
+	sub	w3, w8, #1
+	add	w0, w3, w0, lsl 2
+	mul	w3, w7, w2
+	mul	w2, w6, w2
+	udiv	w0, w0, w8
+	udiv	w1, w1, w2
+	strh	w0, [x24, #:lo12:.LANCHOR137]
+	ubfiz	w0, w0, 4, 16
+	add	w1, w1, 2
+	sdiv	w0, w0, w3
+	adrp	x3, .LANCHOR101
+	strh	w0, [x3, #:lo12:.LANCHOR101]
+	adrp	x0, .LANCHOR163
+	strh	w1, [x0, #:lo12:.LANCHOR163]
+	add	w0, w5, w5, lsl 1
+	adrp	x1, .LANCHOR164
+	asr	w0, w0, 2
+	strh	w0, [x1, #:lo12:.LANCHOR164]
+	lsr	w0, w5, 4
+	adrp	x1, .LANCHOR165
+	strh	w0, [x1, #:lo12:.LANCHOR165]
+	bl	buf_init
+	ldrb	w1, [x19, #:lo12:.LANCHOR69]
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	mul	w0, w0, w1
+	lsl	w0, w0, 2
+	bl	ftl_malloc
+	adrp	x1, .LANCHOR83
+	adrp	x2, ftl_ext_info_data_buffer
+	add	x2, x2, :lo12:ftl_ext_info_data_buffer
+	str	x0, [x1, #:lo12:.LANCHOR83]
+	adrp	x0, .LANCHOR82
+	ldrh	w1, [x20, #:lo12:.LANCHOR79]
+	str	x2, [x0, #:lo12:.LANCHOR82]
+	ldrb	w0, [x19, #:lo12:.LANCHOR69]
+	mul	w1, w1, w0
+	lsl	w0, w1, 1
+	adrp	x1, .LANCHOR56
+	add	x3, x2, x0, sxtw 2
+	str	x3, [x1, #:lo12:.LANCHOR56]
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	add	w1, w0, w1, lsr 1
+	adrp	x0, .LC140
+	add	x1, x2, x1, sxtw 2
+	add	x0, x0, :lo12:.LC140
+	str	x1, [x23, #:lo12:.LANCHOR60]
+	bl	printf
+	ldrh	w0, [x20, #:lo12:.LANCHOR79]
+	ldrb	w19, [x19, #:lo12:.LANCHOR69]
+	ldrh	w1, [x22, #:lo12:.LANCHOR54]
+	ldrh	w20, [x24, #:lo12:.LANCHOR137]
+	ldrh	w3, [x21, #:lo12:.LANCHOR149]
+	mul	w19, w0, w19
+	adrp	x0, .LC141
+	add	x0, x0, :lo12:.LC141
+	add	w19, w1, w19, lsl 2
+	lsl	w1, w1, 2
+	add	w20, w1, w20, lsl 2
+	lsl	w19, w19, 1
+	add	w19, w19, 600
+	add	w20, w20, 704
+	mov	w2, w20
+	mov	w1, w19
+	bl	printf
+	ldrh	w0, [x21, #:lo12:.LANCHOR149]
+	cmp	w19, w0
+	bhi	.L2391
+	cmp	w20, w0
+	bls	.L2392
+.L2391:
+.L2399:
+	b	.L2399
+.L2390:
+	add	w3, w3, 1
+	lsl	w4, w4, 1
+	and	w3, w3, 65535
+	b	.L2389
+.L2392:
+	bl	sblk_init
+	bl	ftl_info_blk_init
+	cmn	w0, #1
+	beq	.L2388
+	bl	ftl_ext_info_init
+	adrp	x19, .LANCHOR46
+	mov	w0, 1
+	bl	pm_init
+	bl	lpa_rebuild_hash
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	x1, 0
+	add	x0, x0, 16
+	bl	ftl_open_sblk_recovery
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x1, x0, 16
+	add	x0, x0, 48
+	bl	ftl_open_sblk_recovery
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 8]
+	add	w0, w0, 16
+	str	w0, [x1, 8]
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x0, x0, 16
+	bl	ftl_info_data_recovery
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x0, x0, 48
+	bl	ftl_info_data_recovery
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x0, x0, 80
+	bl	ftl_info_data_recovery
+	bl	gc_recovery
+	bl	ftl_info_check
+	bl	pm_flush
+	mov	w0, 1
+	bl	ftl_total_vpn_update
+	adrp	x0, .LANCHOR133
+	ldrb	w0, [x0, #:lo12:.LANCHOR133]
+	cbz	w0, .L2394
+	ldr	x1, [x19, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 68]
+	add	w0, w0, 1
+	str	w0, [x1, 68]
+.L2394:
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	print_ftl_debug_info
+	mov	w0, 0
+.L2388:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x29, x30, [sp], 64
+	ret
+	.size	ftl_init, .-ftl_init
+	.section	.text.rk_ftl_init,"ax",@progbits
+	.align	2
+	.global	rk_ftl_init
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	bl	nand_flash_init
+	cbnz	w0, .L2403
+	bl	ftl_init
+.L2403:
+	mov	w19, w0
+	mov	w1, w0
+	adrp	x0, .LC142
+	add	x0, x0, :lo12:.LC142
+	bl	printf
+	mov	w0, w19
+	ldr	x19, [sp, 16]
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_update_l2p_map,"ax",@progbits
+	.align	2
+	.global	ftl_update_l2p_map
+	.type	ftl_update_l2p_map, %function
+ftl_update_l2p_map:
+	stp	x29, x30, [sp, -128]!
+	add	x29, sp, 0
+	stp	x21, x22, [sp, 32]
+	mov	x22, x0
+	stp	x23, x24, [sp, 48]
+	adrp	x0, .LANCHOR79
+	stp	x19, x20, [sp, 16]
+	adrp	x24, .LANCHOR82
+	stp	x25, x26, [sp, 64]
+	stp	x27, x28, [sp, 80]
+	ldrh	w23, [x0, #:lo12:.LANCHOR79]
+	ldrb	w0, [x22, 9]
+	ldrh	w19, [x22, 12]
+	str	x24, [x29, 104]
+	mul	w23, w23, w0
+	ldr	x0, [x24, #:lo12:.LANCHOR82]
+	add	x19, x0, x19, lsl 2
+	add	x0, x19, x23, sxtw 2
+	ldr	w0, [x0, -4]
+	cmn	w0, #1
+	bne	.L2406
+	adrp	x27, .LANCHOR45
+	mov	x28, 0
+	add	x0, x27, :lo12:.LANCHOR45
+	mov	w21, 0
+	str	x0, [x29, 96]
+.L2407:
+	cmp	w28, w23
+	blt	.L2415
+	adrp	x0, .LANCHOR22
+	adrp	x19, .LANCHOR56
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 12, .L2416
+	ldrh	w1, [x22]
+	ldr	x2, [x19, #:lo12:.LANCHOR56]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w3, [x2, x0]
+	adrp	x0, .LC146
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC146
+	bl	printf
+.L2416:
+	ldrh	w1, [x22]
+	ldr	x0, [x19, #:lo12:.LANCHOR56]
+	ldp	x23, x24, [sp, 48]
+	ldp	x19, x20, [sp, 16]
+	strh	w21, [x0, x1, lsl 1]
+	ldp	x25, x26, [sp, 64]
+	ldp	x21, x22, [sp, 32]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 128
+	ret
+.L2406:
+	adrp	x1, .LANCHOR166
+	adrp	x0, .LC0
+	mov	w2, 882
+	add	x1, x1, :lo12:.LANCHOR166
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2408:
+	b	.L2408
+.L2415:
+	ldr	w2, [x19, x28, lsl 2]
+	cmn	w2, #1
+	beq	.L2409
+	ldrb	w20, [x27, #:lo12:.LANCHOR45]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	lsl	w20, w20, 7
+	udiv	w20, w2, w20
+	and	w20, w20, 65535
+	tbz	x0, 12, .L2410
+	adrp	x0, .LC143
+	mov	w3, w28
+	mov	w1, w20
+	add	x0, x0, :lo12:.LC143
+	bl	printf
+.L2410:
+	adrp	x25, .LANCHOR75
+	adrp	x26, .LC144
+	mov	x24, x28
+	add	x25, x25, :lo12:.LANCHOR75
+	add	x26, x26, :lo12:.LC144
+.L2414:
+	ldr	w1, [x19, x24, lsl 2]
+	cmn	w1, #1
+	beq	.L2411
+	ldr	x0, [x29, 96]
+	ldrb	w2, [x0]
+	lsl	w2, w2, 7
+	udiv	w1, w1, w2
+	cmp	w20, w1, uxth
+	bne	.L2411
+	ldrb	w0, [x22, 9]
+	sdiv	w1, w24, w0
+	msub	w0, w1, w0, w24
+	add	x0, x22, x0, sxtw 1
+	ldrh	w2, [x0, 16]
+	ldrh	w0, [x25]
+	madd	w2, w2, w0, w1
+	mov	x0, x26
+	str	w2, [x29, 124]
+	ldr	w1, [x19, x24, lsl 2]
+	bl	pm_ppa_update_check
+	cbz	w0, .L2412
+	ldr	x0, [x29, 104]
+	mov	w3, w23
+	mov	w2, 4
+	ldr	x1, [x0, #:lo12:.LANCHOR82]
+	adrp	x0, .LC145
+	add	x0, x0, :lo12:.LC145
+	bl	rknand_print_hex
+.L2413:
+	b	.L2413
+.L2412:
+	ldr	w0, [x19, x24, lsl 2]
+	add	w21, w21, 1
+	mov	w2, 1
+	add	x1, x29, 124
+	and	w21, w21, 65535
+	bl	pm_log2phys
+	mov	w0, -1
+	str	w0, [x19, x24, lsl 2]
+.L2411:
+	add	x24, x24, 1
+	cmp	w23, w24
+	bgt	.L2414
+.L2409:
+	add	x28, x28, 1
+	b	.L2407
+	.size	ftl_update_l2p_map, .-ftl_update_l2p_map
+	.section	.text.ftl_alloc_new_data_sblk,"ax",@progbits
+	.align	2
+	.global	ftl_alloc_new_data_sblk
+	.type	ftl_alloc_new_data_sblk, %function
+ftl_alloc_new_data_sblk:
+	stp	x29, x30, [sp, -32]!
+	add	x29, sp, 0
+	str	x19, [sp, 16]
+	mov	x19, x0
+	bl	ftl_update_l2p_map
+	bl	pm_flush
+	adrp	x0, .LANCHOR60
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	add	x0, x0, 16
+	cmp	x19, x0
+	mov	x0, x19
+	cset	w1, ne
+	add	w1, w1, 2
+	bl	ftl_open_sblk_init
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	bl	lpa_rebuild_hash
+	ldr	x19, [sp, 16]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 32
+	ret
+	.size	ftl_alloc_new_data_sblk, .-ftl_alloc_new_data_sblk
+	.section	.text.ftl_write_commit,"ax",@progbits
+	.align	2
+	.global	ftl_write_commit
+	.type	ftl_write_commit, %function
+ftl_write_commit:
+	stp	x29, x30, [sp, -144]!
+	adrp	x0, .LANCHOR36
+	add	x29, sp, 0
+	stp	x25, x26, [sp, 64]
+	add	x25, x0, :lo12:.LANCHOR36
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+.L2436:
+	adrp	x3, .LANCHOR43
+	ldrb	w1, [x3, #:lo12:.LANCHOR43]
+	cbz	w1, .L2438
+	adrp	x4, .LANCHOR42
+	adrp	x2, .LANCHOR36
+	add	x2, x2, :lo12:.LANCHOR36
+	sub	w1, w1, #1
+	ldrb	w0, [x4, #:lo12:.LANCHOR42]
+	strb	w1, [x3, #:lo12:.LANCHOR43]
+	adrp	x1, .LANCHOR47
+	ubfiz	x27, x0, 6, 8
+	ldr	w1, [x1, #:lo12:.LANCHOR47]
+	add	x5, x2, x27
+	stp	x0, x5, [x29, 112]
+	lsl	x5, x0, 6
+	add	x0, x2, x5
+	ldrb	w5, [x2, x5]
+	ldr	w22, [x0, 36]
+	strb	w5, [x4, #:lo12:.LANCHOR42]
+	cmp	w22, w1
+	bcc	.L2440
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	mov	w0, -1
+.L2435:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 144
+	ret
+.L2440:
+	adrp	x26, .LANCHOR89
+	ldrb	w21, [x0, 57]
+	ldrb	w20, [x0, 56]
+	ldr	x24, [x0, 8]
+	ldr	x28, [x0, 24]
+	ldrb	w0, [x26, #:lo12:.LANCHOR89]
+	cbz	w0, .L2442
+	adrp	x0, .LANCHOR127
+	ldrb	w1, [x0, #:lo12:.LANCHOR127]
+	add	x1, x2, x1, lsl 6
+.L2443:
+	ldrb	w0, [x1]
+	cmp	w0, 255
+	bne	.L2444
+	ldr	w0, [x1, 36]
+	cmp	w22, w0
+	bne	.L2442
+	ldr	x0, [x1, 8]
+	ubfiz	x21, x21, 9, 8
+	lsl	w2, w20, 9
+	add	x1, x24, x21
+	add	x0, x0, x21
+	bl	ftl_memcpy
+	ldr	x0, [x29, 120]
+	bl	buf_free
+	b	.L2436
+.L2444:
+	ubfiz	x1, x0, 6, 8
+	add	x1, x25, x1
+	b	.L2443
+.L2442:
+	mov	w0, w22
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 140]
+	cmn	w0, #1
+	bne	.L2446
+	mov	w2, 0
+	add	x1, x29, 140
+	mov	w0, w22
+	bl	pm_log2phys
+.L2446:
+	adrp	x19, .LANCHOR60
+	add	x1, x25, 2
+	mov	w0, 0
+	ldr	x3, [x19, #:lo12:.LANCHOR60]
+.L2449:
+	ldr	w2, [x1, 34]
+	cmp	w22, w2
+	bne	.L2447
+	ldrb	w2, [x1]
+	tbz	x2, 3, .L2447
+	ubfiz	x0, x0, 6, 32
+	and	w2, w2, -9
+	add	x0, x25, x0
+	strb	w2, [x0, 2]
+	ldr	x23, [x0, 8]
+	ldr	w0, [x0, 40]
+	str	w0, [x29, 140]
+.L2448:
+	adrp	x0, .LANCHOR45
+	str	x0, [x29, 104]
+	ldrb	w1, [x0, #:lo12:.LANCHOR45]
+	cmp	w20, w1
+	bcc	.L2450
+	add	x19, x3, 16
+.L2495:
+	mov	w23, 0
+.L2451:
+	ldrh	w0, [x19, 6]
+	cbnz	w0, .L2466
+	bl	ftl_flush
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2466:
+	mov	x0, x19
+	bl	ftl_get_new_free_page
+	ldr	x1, [x29, 112]
+	adrp	x20, .LANCHOR127
+	lsl	x2, x1, 6
+	add	x1, x25, x2
+	ldr	w3, [x1, 32]
+	stp	w3, w22, [x28]
+	str	w23, [x28, 12]
+	ldr	w3, [x29, 140]
+	str	w3, [x28, 8]
+	stp	w0, w3, [x1, 40]
+	mov	w0, -1
+	strb	w0, [x25, x2]
+	mov	w2, 10
+	ldrb	w0, [x1, 2]
+	orr	w0, w0, w2
+	ldrh	w2, [x19, 12]
+	strb	w0, [x1, 2]
+	ldrh	w0, [x19, 10]
+	add	w0, w0, w2
+	sub	w0, w0, #1
+	strh	w0, [x1, 48]
+	ldr	x1, [x29, 120]
+	add	x0, x20, :lo12:.LANCHOR127
+	bl	buf_add_tail
+	ldrb	w2, [x26, #:lo12:.LANCHOR89]
+	adrp	x0, .LANCHOR168
+	add	w2, w2, 1
+	str	wzr, [x0, #:lo12:.LANCHOR168]
+	and	w2, w2, 255
+	strb	w2, [x26, #:lo12:.LANCHOR89]
+	cmp	w2, 2
+	ldrh	w0, [x19, 6]
+	bhi	.L2467
+	cmp	w0, 1
+	bne	.L2439
+.L2467:
+	ldrb	w1, [x19, 5]
+	cmp	w1, 0
+	mov	w1, 0
+	cset	w4, ne
+	cmp	w0, 1
+	ldrb	w0, [x20, #:lo12:.LANCHOR127]
+	csinc	w4, w2, w4, eq
+	mov	w3, w0
+.L2471:
+	cmp	w1, w4
+	bne	.L2472
+	and	w1, w1, 255
+	ubfiz	x0, x0, 6, 8
+	sub	w2, w2, w1
+	strb	w3, [x20, #:lo12:.LANCHOR127]
+	strb	w2, [x26, #:lo12:.LANCHOR89]
+	add	x0, x25, x0
+	bl	sblk_prog_page
+	ldrh	w0, [x19, 6]
+	cmp	w0, 1
+	bne	.L2439
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	mov	x0, x19
+	bl	ftl_write_last_log_page
+	mov	x0, x19
+	bl	ftl_alloc_new_data_sblk
+.L2439:
+	adrp	x0, .LANCHOR43
+	ldrb	w0, [x0, #:lo12:.LANCHOR43]
+	cbnz	w0, .L2436
+.L2438:
+	bl	ftl_write_completed
+	mov	w0, 0
+	b	.L2435
+.L2447:
+	add	w0, w0, 1
+	add	x1, x1, 64
+	cmp	w0, 32
+	bne	.L2449
+	mov	x23, 0
+	b	.L2448
+.L2450:
+	cbz	x23, .L2452
+	cbz	w21, .L2453
+	lsl	w2, w21, 9
+	mov	x1, x23
+	mov	x0, x24
+	bl	ftl_memcpy
+.L2453:
+	ldr	x0, [x29, 104]
+	add	w20, w21, w20
+	ldr	x19, [x19, #:lo12:.LANCHOR60]
+	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	cmp	w20, w2
+	bcc	.L2454
+	add	x19, x19, 16
+	b	.L2495
+.L2454:
+	ubfiz	x0, x20, 9, 9
+	sub	w2, w2, w20
+	add	x1, x23, x0
+	add	x19, x19, 48
+	lsl	w2, w2, 9
+	add	x0, x24, x0
+	bl	ftl_memcpy
+	b	.L2495
+.L2452:
+	ldr	w0, [x29, 140]
+	cmn	w0, #1
+	beq	.L2455
+	mov	w0, 1
+	bl	buf_alloc
+	ldr	w1, [x29, 140]
+	mov	x27, x0
+	stp	w22, w1, [x0, 36]
+	mov	w1, 1
+	bl	sblk_read_page
+	ldr	x0, [x27, 24]
+	ldr	w23, [x0, 12]
+	ldr	w0, [x0, 4]
+	add	w23, w23, 1
+	cmp	w22, w0
+	bne	.L2456
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2457
+.L2456:
+	ldrb	w1, [x27, 1]
+	mov	w3, w22
+	ldr	w4, [x27, 52]
+	adrp	x0, .LC147
+	ldr	w2, [x29, 140]
+	add	x0, x0, :lo12:.LC147
+	bl	printf
+	ldr	x1, [x27, 24]
+	mov	w3, 4
+	adrp	x0, .LC96
+	mov	w2, w3
+	add	x0, x0, :lo12:.LC96
+	bl	rknand_print_hex
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x29, 140]
+	ldrh	w3, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2457:
+	ldr	x0, [x27, 24]
+	ldr	w0, [x0, 4]
+	cmp	w22, w0
+	bne	.L2458
+	ldr	w0, [x27, 52]
+	cmn	w0, #1
+	bne	.L2459
+.L2458:
+	adrp	x1, .LANCHOR167
+	adrp	x0, .LC0
+	mov	w2, 445
+	add	x1, x1, :lo12:.LANCHOR167
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2460:
+	b	.L2460
+.L2459:
+	cbz	w21, .L2461
+	ldr	w0, [x29, 140]
+	lsl	w2, w21, 9
+	cmn	w0, #1
+	beq	.L2462
+	ldr	x1, [x27, 8]
+	mov	x0, x24
+	bl	ftl_memcpy
+.L2461:
+	ldr	x1, [x29, 104]
+	add	w20, w21, w20
+	ldr	x0, [x19, #:lo12:.LANCHOR60]
+	add	x19, x0, 48
+	ldrb	w2, [x1, #:lo12:.LANCHOR45]
+	cmp	w20, w2
+	bcc	.L2463
+	add	x19, x0, 16
+.L2464:
+	cbz	x27, .L2451
+	ldrb	w0, [x27, 2]
+	mov	x1, x27
+	and	w0, w0, -9
+	strb	w0, [x27, 2]
+	adrp	x0, .LANCHOR51
+	add	x0, x0, :lo12:.LANCHOR51
+	bl	buf_remove_buf
+	mov	x0, x27
+	bl	buf_free
+	b	.L2451
+.L2463:
+	ldr	w0, [x29, 140]
+	sub	w2, w2, w20
+	lsl	w2, w2, 9
+	ubfiz	x20, x20, 7, 9
+	cmn	w0, #1
+	beq	.L2465
+	ldr	x1, [x27, 8]
+	lsl	x20, x20, 2
+	add	x0, x24, x20
+	add	x1, x1, x20
+	bl	ftl_memcpy
+	b	.L2464
+.L2465:
+	mov	w1, 0
+	add	x0, x24, x20, lsl 2
+	bl	ftl_memset
+	b	.L2464
+.L2472:
+	ubfiz	x3, x3, 6, 8
+	add	w1, w1, 1
+	ldrb	w3, [x25, x3]
+	b	.L2471
+.L2473:
+	lsl	w2, w21, 9
+	mov	x27, 0
+	mov	w23, 0
+.L2462:
+	mov	w1, 0
+	mov	x0, x24
+	bl	ftl_memset
+	b	.L2461
+.L2455:
+	cbnz	w21, .L2473
+	mov	w23, 0
+	mov	x27, 0
+	b	.L2461
+	.size	ftl_write_commit, .-ftl_write_commit
+	.section	.text.ftl_discard,"ax",@progbits
+	.align	2
+	.global	ftl_discard
+	.type	ftl_discard, %function
+ftl_discard:
+	stp	x29, x30, [sp, -112]!
+	ands	w0, w0, 255
+	add	x29, sp, 0
+	stp	x19, x20, [sp, 16]
+	mov	w20, w2
+	stp	x25, x26, [sp, 64]
+	mov	w26, w3
+	stp	x21, x22, [sp, 32]
+	stp	x23, x24, [sp, 48]
+	stp	x27, x28, [sp, 80]
+	bne	.L2497
+	adrp	x2, .LANCHOR52
+	mov	w21, 24576
+	ldr	w2, [x2, #:lo12:.LANCHOR52]
+.L2498:
+	add	w3, w1, w20
+	cmp	w2, w3
+	bcc	.L2519
+	add	w21, w21, w1
+	adrp	x1, .LANCHOR22
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 12, .L2500
+	mov	w1, w0
+	mov	w4, w26
+	adrp	x0, .LC148
+	mov	w3, w20
+	mov	w2, w21
+	add	x0, x0, :lo12:.LC148
+	bl	printf
+.L2500:
+	adrp	x22, .LANCHOR46
+	adrp	x23, .LANCHOR45
+	cmp	w26, 1
+	ldr	x0, [x22, #:lo12:.LANCHOR46]
+	cset	w25, ls
+	ldr	w24, [x0, 8]
+	add	w1, w24, 1
+	str	w1, [x0, 8]
+	ldrb	w0, [x23, #:lo12:.LANCHOR45]
+	udiv	w19, w21, w0
+	msub	w21, w19, w0, w21
+	cbz	w21, .L2501
+	sub	w0, w0, w21
+	cmp	w0, w20
+	csel	w28, w0, w20, ls
+	cmp	w26, 1
+	and	w27, w28, 65535
+	bhi	.L2503
+	mov	w0, w19
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 104]
+	cmn	w0, #1
+	bne	.L2504
+	mov	w2, 0
+	add	x1, x29, 104
+	mov	w0, w19
+	bl	pm_log2phys
+.L2504:
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2503
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x26, x0
+	cbz	x0, .L2503
+	strb	w21, [x0, 57]
+	lsl	w2, w27, 9
+	strb	w28, [x0, 56]
+	mov	w1, 0
+	ldr	x0, [x0, 8]
+	ubfiz	x21, x21, 9, 25
+	stp	w24, w19, [x26, 32]
+	add	x0, x0, x21
+	bl	ftl_memset
+	mov	x0, x26
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2503:
+	add	w19, w19, 1
+	sub	w20, w20, w27
+.L2501:
+	cbz	w20, .L2506
+	bl	ftl_flush
+.L2506:
+	adrp	x21, .LANCHOR71
+	add	x26, x23, :lo12:.LANCHOR45
+	add	x21, x21, :lo12:.LANCHOR71
+	mov	w0, -1
+	str	w0, [x29, 108]
+.L2507:
+	ldrb	w0, [x26]
+	cmp	w20, w0
+	bcs	.L2512
+	cmp	w20, 0
+	cset	w0, ne
+	tst	w25, w0
+	bne	.L2513
+.L2546:
+	mov	w0, 0
+.L2496:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2497:
+	cmp	w0, 3
+	bhi	.L2519
+	lsl	w21, w0, 13
+	mov	w2, 8192
+	b	.L2498
+.L2512:
+	mov	w0, w19
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 104]
+	cmn	w0, #1
+	mov	w2, 0
+	add	x1, x29, 104
+	mov	w0, w19
+	beq	.L2508
+	bl	pm_log2phys
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2510
+	mov	w2, 1
+	add	x1, x29, 108
+	mov	w0, w19
+	bl	pm_log2phys
+.L2545:
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+.L2510:
+	ldrb	w0, [x26]
+	add	w19, w19, 1
+	sub	w20, w20, w0
+	b	.L2507
+.L2508:
+	bl	pm_log2phys
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2510
+	add	x1, x29, 108
+	mov	w2, 1
+	mov	w0, w19
+	bl	pm_log2phys
+	ldrh	w3, [x21]
+	mov	w0, 21
+	ldr	w1, [x29, 104]
+	sub	w2, w0, w3
+	mov	w0, 1
+	lsr	w1, w1, w3
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w1, [x1, #:lo12:.LANCHOR70]
+	udiv	w0, w0, w1
+	bl	ftl_vpn_decrement
+	b	.L2545
+.L2513:
+	mov	w0, w19
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 104]
+	cmn	w0, #1
+	bne	.L2514
+	mov	w2, 0
+	add	x1, x29, 104
+	mov	w0, w19
+	bl	pm_log2phys
+.L2514:
+	ldr	w0, [x29, 104]
+	cmn	w0, #1
+	beq	.L2546
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x21, x0
+	cbz	x0, .L2546
+	strb	wzr, [x0, 57]
+	strb	w20, [x0, 56]
+	stp	w24, w19, [x21, 32]
+	ldrb	w0, [x23, #:lo12:.LANCHOR45]
+	cmp	w20, w0
+	bcc	.L2516
+	adrp	x1, .LANCHOR169
+	adrp	x0, .LC0
+	mov	w2, 1048
+	add	x1, x1, :lo12:.LANCHOR169
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2517:
+	b	.L2517
+.L2516:
+	ldr	x0, [x21, 8]
+	lsl	w2, w20, 9
+	mov	w1, 0
+	bl	ftl_memset
+	mov	x0, x21
+	bl	ftl_write_buf
+	bl	ftl_write_commit
+	ldr	x1, [x22, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 76]
+	add	w0, w0, 1
+	str	w0, [x1, 76]
+	b	.L2546
+.L2519:
+	mov	w0, -1
+	b	.L2496
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlDiscard,"ax",@progbits
+	.align	2
+	.global	FtlDiscard
+	.type	FtlDiscard, %function
+FtlDiscard:
+	mov	w2, w1
+	mov	w3, 0
+	mov	w1, w0
+	mov	w0, 0
+	b	ftl_discard
+	.size	FtlDiscard, .-FtlDiscard
+	.section	.text.gc_do_copy_back,"ax",@progbits
+	.align	2
+	.global	gc_do_copy_back
+	.type	gc_do_copy_back, %function
+gc_do_copy_back:
+	sub	sp, sp, #224
+	adrp	x0, .LANCHOR67
+	stp	x29, x30, [sp, 16]
+	add	x29, sp, 16
+	ldrb	w0, [x0, #:lo12:.LANCHOR67]
+	stp	x19, x20, [sp, 32]
+	stp	x21, x22, [sp, 48]
+	stp	x23, x24, [sp, 64]
+	stp	x25, x26, [sp, 80]
+	stp	x27, x28, [sp, 96]
+	cbnz	w0, .L2549
+	bl	buf_alloc
+	mov	x19, x0
+	cbz	x0, .L2548
+	adrp	x20, .LANCHOR58
+	add	x3, x20, :lo12:.LANCHOR58
+	ldrh	w2, [x3, 26]
+	mov	w0, w2
+	bl	gc_get_src_ppa_from_index
+	add	w2, w2, 1
+	mov	w22, w0
+	str	w22, [x19, 40]
+	strh	w2, [x3, 26]
+	mov	w1, 1
+	mov	x0, x19
+	bl	sblk_read_page
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2551
+	adrp	x0, .LANCHOR71
+	ldrh	w1, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w1
+	mov	w0, 1
+	lsr	w1, w22, w1
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+.L2551:
+	ldr	w0, [x19, 52]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2552
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC0
+	mov	w2, 556
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2553:
+	b	.L2553
+.L2552:
+	ldr	x0, [x19, 24]
+	ldr	w21, [x0, 4]
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	str	w0, [x29, 160]
+	cmn	w0, #1
+	bne	.L2554
+	mov	w2, 0
+	add	x1, x29, 160
+	mov	w0, w21
+	bl	pm_log2phys
+.L2554:
+	ldr	w23, [x29, 160]
+	cmp	w22, w23
+	bne	.L2555
+	adrp	x0, .LANCHOR36
+	add	x0, x0, :lo12:.LANCHOR36
+	add	x1, x0, 2
+	add	x0, x0, 2050
+.L2558:
+	ldr	w2, [x1, 34]
+	cmp	w21, w2
+	bne	.L2556
+	ldrb	w2, [x1]
+	tbz	x2, 1, .L2556
+	mov	x0, x19
+	bl	buf_free
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2548
+	add	x20, x20, :lo12:.LANCHOR58
+	adrp	x0, .LC149
+	mov	w2, w22
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC149
+	ldrh	w3, [x20, 26]
+	bl	printf
+.L2548:
+	ldp	x19, x20, [sp, 32]
+	ldp	x21, x22, [sp, 48]
+	ldp	x23, x24, [sp, 64]
+	ldp	x25, x26, [sp, 80]
+	ldp	x27, x28, [sp, 96]
+	ldp	x29, x30, [sp, 16]
+	add	sp, sp, 224
+	ret
+.L2556:
+	add	x1, x1, 64
+	cmp	x0, x1
+	bne	.L2558
+	adrp	x0, .LANCHOR45
+	mov	w1, 10
+	strb	wzr, [x19, 57]
+	ldrb	w0, [x0, #:lo12:.LANCHOR45]
+	strb	w0, [x19, 56]
+	ldrb	w0, [x19, 2]
+	str	w21, [x19, 36]
+	orr	w0, w0, w1
+	strb	w0, [x19, 2]
+	ldr	x0, [x19, 24]
+	ldr	w0, [x0]
+	str	w0, [x19, 32]
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2559
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	add	x1, x20, :lo12:.LANCHOR58
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	mov	w2, w23
+	add	x0, x0, :lo12:.LC150
+	ldrh	w5, [x1, 26]
+	mov	w1, w21
+	bl	printf
+.L2559:
+	mov	x0, x19
+	bl	ftl_gc_write_buf
+	bl	ftl_write_commit
+	add	x20, x20, :lo12:.LANCHOR58
+	adrp	x0, .LANCHOR46
+	ldr	x1, [x0, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 60]
+	add	w0, w0, 1
+	str	w0, [x1, 60]
+	ldrh	w0, [x20, 28]
+	add	w0, w0, 1
+	strh	w0, [x20, 28]
+	b	.L2548
+.L2555:
+	adrp	x0, .LANCHOR22
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2560
+	add	x20, x20, :lo12:.LANCHOR58
+	mov	w0, w21
+	bl	lpa_hash_get_ppa
+	mov	w3, w0
+	mov	w4, w22
+	adrp	x0, .LC150
+	ldrh	w5, [x20, 26]
+	mov	w2, w23
+	mov	w1, w21
+	add	x0, x0, :lo12:.LC150
+	bl	printf
+.L2560:
+	mov	x0, x19
+	bl	buf_free
+	b	.L2548
+.L2549:
+	adrp	x1, .LANCHOR60
+	adrp	x0, .LANCHOR64
+	stp	x0, x1, [x29, 128]
+	adrp	x24, .LANCHOR58
+	ldr	x22, [x1, #:lo12:.LANCHOR60]
+	ldrb	w25, [x0, #:lo12:.LANCHOR64]
+	add	x22, x22, 80
+	cmp	w25, 3
+	bne	.L2561
+	adrp	x0, .LANCHOR66
+	ldrb	w0, [x0, #:lo12:.LANCHOR66]
+	cbz	w0, .L2562
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w19, [x22, 9]
+	ldrh	w20, [x0, 314]
+	add	w21, w19, w19, lsl 1
+	sub	w19, w19, w19, lsl 2
+	sdiv	w21, w20, w21
+	madd	w19, w21, w19, w20
+	and	w19, w19, 65535
+.L2563:
+	adrp	x1, .LANCHOR68
+	ldrb	w0, [x22, 9]
+	add	x4, x24, :lo12:.LANCHOR58
+	mov	w2, 0
+	ldrh	w3, [x1, #:lo12:.LANCHOR68]
+	mul	w8, w25, w0
+	ldrh	w10, [x4, 24]
+	mul	w3, w3, w0
+	adrp	x0, .LANCHOR108
+	ldr	x7, [x0, #:lo12:.LANCHOR108]
+	sub	w3, w3, #1
+.L2566:
+	cmp	w2, w8
+	blt	.L2568
+.L2596:
+	mov	w23, 1
+	b	.L2564
+.L2562:
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w20, [x22, 9]
+	ldrh	w1, [x0, 314]
+	adrp	x0, .LANCHOR171
+	add	x0, x0, :lo12:.LANCHOR171
+	sdiv	w19, w1, w20
+	ldrh	w23, [x0, w19, sxtw 1]
+	msub	w19, w19, w20, w1
+	and	w19, w19, 65535
+	lsr	w21, w23, 3
+	and	w23, w23, 7
+	cmp	w23, 1
+	madd	w20, w21, w20, w19
+	add	w20, w20, w20, lsl 1
+	and	w20, w20, 65535
+	beq	.L2563
+.L2564:
+	adrp	x0, .LANCHOR22
+	str	x0, [x29, 112]
+	ldr	w1, [x0, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2569
+	adrp	x0, .LANCHOR108
+	ubfiz	x1, x20, 2, 16
+	mov	w6, w20
+	mov	w3, w19
+	ldr	x2, [x0, #:lo12:.LANCHOR108]
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrh	w4, [x0, 314]
+	adrp	x0, .LC151
+	ldr	w5, [x2, x1]
+	add	x0, x0, :lo12:.LC151
+	mov	w2, w23
+	mov	w1, w21
+	bl	printf
+.L2569:
+	adrp	x0, .LANCHOR36
+	str	wzr, [x29, 152]
+	add	x0, x0, :lo12:.LANCHOR36
+	str	x0, [x29, 120]
+.L2570:
+	ldrb	w2, [x22, 9]
+	ldr	w0, [x29, 152]
+	ldrh	w26, [x29, 152]
+	and	w0, w0, 65535
+	str	w0, [x29, 156]
+	mul	w1, w25, w2
+	cmp	w0, w1
+	blt	.L2583
+	ldr	x0, [x29, 128]
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 3
+	add	x0, x29, 160
+	beq	.L2584
+	sub	w3, w1, #1
+	mov	w2, 0
+.L2585:
+	cmp	w2, w3
+	blt	.L2591
+	ldr	x0, [x0, w3, sxtw 3]
+	mov	w2, -1
+	strb	w2, [x0]
+	ldr	x0, [x29, 160]
+	bl	sblk_prog_page
+	b	.L2590
+.L2561:
+	adrp	x0, .LANCHOR74
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L2565
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w19, [x22, 9]
+	mov	w25, 1
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2563
+.L2565:
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w19, [x22, 9]
+	mov	w25, 2
+	ldrh	w20, [x0, 314]
+	sdiv	w21, w20, w19
+	msub	w19, w21, w19, w20
+	and	w19, w19, 65535
+	b	.L2563
+.L2568:
+	add	w5, w20, w2
+	cmp	w5, w3
+	beq	.L2596
+	sbfiz	x5, x5, 2, 32
+	ldr	w0, [x7, x5]
+	cmn	w0, #1
+	bne	.L2567
+	ldrh	w6, [x4, 26]
+	cmp	w6, w10
+	bcs	.L2548
+	mov	w0, w6
+	bl	gc_get_src_ppa_from_index
+	add	w6, w6, 1
+	strh	w6, [x4, 26]
+	str	w0, [x7, x5]
+.L2567:
+	add	w2, w2, 1
+	and	w2, w2, 65535
+	b	.L2566
+.L2583:
+	ldr	w0, [x29, 156]
+	add	w0, w20, w0
+	str	w0, [x29, 144]
+	sxtw	x27, w0
+	adrp	x0, .LANCHOR65
+	ldr	x0, [x0, #:lo12:.LANCHOR65]
+	ldrb	w0, [x0, x27]
+	cmp	w0, 255
+	bne	.L2571
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbnz	x0, .L2572
+	bl	sblk_wait_write_queue_completed
+	bl	ftl_write_completed
+	bl	gc_write_completed
+	bl	gc_free_temp_buf
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x28, x0
+	cbz	x0, .L2548
+.L2572:
+	adrp	x0, .LANCHOR65
+	ldrb	w1, [x28, 1]
+	adrp	x5, .LANCHOR68
+	adrp	x6, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR65]
+	strb	w1, [x0, x27]
+	add	x1, x24, :lo12:.LANCHOR58
+	strb	w23, [x28, 61]
+	ldrh	w7, [x5, #:lo12:.LANCHOR68]
+	ldrb	w0, [x1, 7]
+	add	w0, w0, 1
+	strb	w0, [x1, 7]
+	add	w0, w26, w20
+	strh	w0, [x28, 48]
+	ldr	w1, [x29, 144]
+	ldrb	w0, [x22, 9]
+	mul	w0, w0, w7
+	sub	w0, w0, #1
+	cmp	w1, w0
+	bne	.L2573
+	adrp	x0, .LANCHOR107
+	adrp	x4, .LANCHOR69
+	stp	x6, x5, [x29, 96]
+	ldr	x1, [x0, #:lo12:.LANCHOR107]
+	mov	w0, -1
+	str	x4, [x29, 144]
+	str	w0, [x1, x27, lsl 2]
+	ldr	x0, [x28, 8]
+	ldrb	w2, [x4, #:lo12:.LANCHOR69]
+	mul	w2, w2, w7
+	lsl	w2, w2, 2
+	bl	ftl_memcpy
+	ldp	x6, x5, [x29, 96]
+	ldr	x4, [x29, 144]
+	ldr	x7, [x28, 8]
+	ldrh	w0, [x5, #:lo12:.LANCHOR68]
+	ldrb	w1, [x4, #:lo12:.LANCHOR69]
+	mul	w0, w0, w1
+	ldr	x1, [x6, #:lo12:.LANCHOR108]
+	lsl	w2, w0, 2
+	add	x0, x7, x0, sxtw 2
+	bl	ftl_memcpy
+	adrp	x0, .LANCHOR45
+	mov	w1, 0
+	ldrb	w2, [x0, #:lo12:.LANCHOR45]
+	ldr	x0, [x28, 24]
+	lsl	w2, w2, 1
+	bl	ftl_memset
+	ldr	x6, [x28, 24]
+	mov	w0, 15555
+	ldr	x5, [x29, 104]
+	movk	w0, 0xf55f, lsl 16
+	ldr	x4, [x29, 144]
+	ldrh	w1, [x5, #:lo12:.LANCHOR68]
+	str	w0, [x6]
+	ldrb	w0, [x4, #:lo12:.LANCHOR69]
+	mul	w1, w1, w0
+	ldr	x0, [x28, 8]
+	lsl	w1, w1, 2
+	bl	js_hash
+	str	w0, [x6, 4]
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	ldr	w0, [x0, 132]
+	str	w0, [x6, 8]
+.L2571:
+	adrp	x0, .LANCHOR65
+	ldr	w5, [x29, 156]
+	add	x3, x29, 160
+	ldr	x4, [x0, #:lo12:.LANCHOR65]
+	adrp	x0, .LANCHOR36
+	add	x2, x0, :lo12:.LANCHOR36
+	ldrb	w1, [x4, x27]
+	ubfiz	x0, x1, 6, 8
+	add	x0, x2, x0
+	add	x2, x2, x1, lsl 6
+	str	x0, [x3, w5, sxtw 3]
+	mov	w0, 1
+	adrp	x5, .LANCHOR109
+	strh	w0, [x2, 50]
+	ldr	x0, [x29, 128]
+	strb	w23, [x2, 61]
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 3
+	bne	.L2578
+	udiv	w0, w26, w0
+	adrp	x6, .LANCHOR75
+	ldrh	w6, [x6, #:lo12:.LANCHOR75]
+	add	w3, w0, w19
+	add	w0, w0, w0, lsl 1
+	add	x3, x22, x3, sxtw 1
+	sub	w0, w26, w0
+	and	w0, w0, 65535
+	add	w0, w0, 1
+	ldrh	w3, [x3, 16]
+	mul	w3, w3, w6
+	ldrh	w6, [x2, 48]
+	orr	w3, w3, w21
+	str	w3, [x2, 40]
+	ldr	x2, [x5, #:lo12:.LANCHOR109]
+	orr	w0, w3, w0, lsl 24
+	str	w0, [x2, x6, lsl 2]
+.L2579:
+	ldr	x0, [x29, 112]
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2582
+	ldr	x0, [x29, 120]
+	mov	w2, w23
+	ldrb	w4, [x4, x27]
+	add	x1, x0, x1, lsl 6
+	add	x0, x24, :lo12:.LANCHOR58
+	ldrb	w3, [x0, 6]
+	ldr	x0, [x1, 24]
+	ldrb	w7, [x1, 1]
+	ldrh	w6, [x1, 48]
+	ldr	w0, [x0, 4]
+	str	w0, [sp, 8]
+	mov	w0, 3
+	udiv	w26, w26, w0
+	adrp	x0, .LC152
+	add	x0, x0, :lo12:.LC152
+	add	w26, w26, w19
+	str	w26, [sp]
+	ldr	w5, [x1, 40]
+	ldr	w1, [x29, 156]
+	bl	printf
+.L2582:
+	ldr	w0, [x29, 152]
+	add	w0, w0, 1
+	str	w0, [x29, 152]
+	b	.L2570
+.L2573:
+	ldr	x0, [x6, #:lo12:.LANCHOR108]
+	lsl	x4, x27, 2
+	mov	w1, 1
+	str	x4, [x29, 144]
+	ldr	w0, [x0, x4]
+	str	w0, [x28, 40]
+	mov	x0, x28
+	bl	sblk_read_page
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2575
+	adrp	x0, .LANCHOR71
+	ldr	w1, [x28, 40]
+	ldrh	w5, [x0, #:lo12:.LANCHOR71]
+	mov	w0, 21
+	sub	w2, w0, w5
+	mov	w0, 1
+	lsr	w1, w1, w5
+	lsl	w0, w0, w2
+	sub	w0, w0, #1
+	and	w0, w0, w1
+	adrp	x1, .LANCHOR70
+	ldrb	w2, [x1, #:lo12:.LANCHOR70]
+	mov	x1, 0
+	udiv	w0, w0, w2
+	bl	ftl_sblk_dump
+	ldr	w0, [x28, 52]
+	ldr	x4, [x29, 144]
+	cmp	w0, 512
+	ccmn	w0, #1, 4, ne
+	bne	.L2575
+	ldr	x0, [x28, 24]
+	mov	w1, -1
+	str	w1, [x0, 4]
+	ldr	w0, [x28, 52]
+	cmp	w0, 512
+	ccmp	w0, w1, 4, ne
+	bne	.L2575
+	adrp	x1, .LANCHOR170
+	adrp	x0, .LC0
+	mov	w2, 671
+	add	x1, x1, :lo12:.LANCHOR170
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2576:
+	b	.L2576
+.L2575:
+	ldr	x0, [x28, 24]
+	adrp	x1, .LANCHOR47
+	ldr	w1, [x1, #:lo12:.LANCHOR47]
+	ldr	w2, [x0, 4]
+	cmp	w2, w1
+	bcc	.L2577
+	mov	w1, -1
+	str	w1, [x0, 4]
+.L2577:
+	adrp	x1, .LANCHOR107
+	ldr	w2, [x0, 4]
+	ldr	x1, [x1, #:lo12:.LANCHOR107]
+	str	w2, [x1, x4]
+	ldr	w1, [x28, 40]
+	str	w1, [x0, 8]
+	b	.L2571
+.L2578:
+	cmp	w0, 2
+	bne	.L2580
+	adrp	x0, .LANCHOR74
+	adrp	x3, .LANCHOR75
+	ldrb	w0, [x0, #:lo12:.LANCHOR74]
+	cbnz	w0, .L2581
+	ldr	w0, [x29, 156]
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	add	w0, w19, w0
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+.L2639:
+	orr	w0, w0, 33554432
+	str	w0, [x2, 40]
+.L2580:
+	ldr	x0, [x29, 120]
+	add	x0, x0, x1, lsl 6
+	ldrh	w2, [x0, 48]
+	ldr	w3, [x0, 40]
+	ldr	x0, [x5, #:lo12:.LANCHOR109]
+	str	w3, [x0, x2, lsl 2]
+	b	.L2579
+.L2581:
+	add	w0, w19, w26, lsr 1
+	ldrh	w3, [x3, #:lo12:.LANCHOR75]
+	add	x0, x22, x0, sxtw 1
+	ldrh	w0, [x0, 16]
+	madd	w0, w0, w3, w21
+	and	w3, w26, 1
+	add	w0, w0, w3
+	b	.L2639
+.L2584:
+	adrp	x1, .LANCHOR66
+	ldrb	w3, [x1, #:lo12:.LANCHOR66]
+	ldr	x1, [x29, 160]
+	cbz	w3, .L2586
+.L2589:
+	strb	wzr, [x1, 60]
+	b	.L2587
+.L2586:
+	cmp	w23, 1
+	bne	.L2588
+	mov	w3, 9
+.L2638:
+	strb	w3, [x1, 60]
+.L2587:
+	add	x1, x0, 24
+	bl	sblk_xlc_prog_pages
+.L2590:
+	adrp	x1, .LANCHOR66
+	ldrb	w3, [x22, 9]
+	ldrb	w1, [x1, #:lo12:.LANCHOR66]
+	and	w0, w3, 65535
+	cbz	w1, .L2592
+	add	w0, w0, w0, lsl 1
+.L2593:
+	adrp	x1, .LANCHOR46
+	add	x24, x24, :lo12:.LANCHOR58
+	ldr	x1, [x1, #:lo12:.LANCHOR46]
+	ldr	w2, [x1, 52]
+	add	w2, w2, w0
+	str	w2, [x1, 52]
+	ldrh	w1, [x24, 314]
+	add	w0, w0, w1
+	adrp	x1, .LANCHOR68
+	and	w0, w0, 65535
+	strh	w0, [x24, 314]
+	ldrh	w1, [x1, #:lo12:.LANCHOR68]
+	mul	w1, w1, w3
+	cmp	w0, w1
+	blt	.L2594
+	ldr	x0, [x29, 136]
+	ldr	x0, [x0, #:lo12:.LANCHOR60]
+	strh	wzr, [x0, 86]
+.L2594:
+	bl	gc_write_completed
+	b	.L2548
+.L2588:
+	cmp	w23, 2
+	bne	.L2589
+	mov	w3, 13
+	b	.L2638
+.L2591:
+	ldr	x4, [x0, w2, sxtw 3]
+	add	w2, w2, 1
+	ldr	x5, [x0, w2, sxtw 3]
+	and	w2, w2, 65535
+	ldrb	w5, [x5, 1]
+	strb	w5, [x4]
+	b	.L2585
+.L2592:
+	adrp	x1, .LANCHOR74
+	ldrb	w2, [x1, #:lo12:.LANCHOR74]
+	mov	w1, w0
+	ubfiz	w0, w0, 1, 15
+	cmp	w2, 0
+	csel	w0, w0, w1, ne
+	b	.L2593
+	.size	gc_do_copy_back, .-gc_do_copy_back
+	.section	.text.do_gc,"ax",@progbits
+	.align	2
+	.global	do_gc
+	.type	do_gc, %function
+do_gc:
+	stp	x29, x30, [sp, -96]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	adrp	x24, .LANCHOR46
+	stp	x19, x20, [sp, 16]
+	adrp	x20, .LANCHOR104
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	adrp	x23, .LANCHOR60
+	stp	x21, x22, [sp, 32]
+	stp	x25, x26, [sp, 64]
+	ldrb	w3, [x20, #:lo12:.LANCHOR104]
+	ldrh	w19, [x1, 116]
+	ldrh	w21, [x1, 114]
+	cmp	w3, 6
+	stp	x27, x28, [sp, 80]
+	ldr	x25, [x23, #:lo12:.LANCHOR60]
+	add	w21, w19, w21
+	bhi	.L2640
+	adrp	x2, .L2643
+	and	w21, w21, 65535
+	add	x2, x2, :lo12:.L2643
+	ldrh	w2, [x2,w3,uxtw #1]
+	adr	x3, .Lrtx2643
+	add	x2, x3, w2, sxth #2
+	br	x2
+.Lrtx2643:
+	.section	.rodata.do_gc,"a",@progbits
+	.align	0
+	.align	2
+.L2643:
+	.2byte	(.L2642 - .Lrtx2643) / 4
+	.2byte	(.L2644 - .Lrtx2643) / 4
+	.2byte	(.L2645 - .Lrtx2643) / 4
+	.2byte	(.L2646 - .Lrtx2643) / 4
+	.2byte	(.L2647 - .Lrtx2643) / 4
+	.2byte	(.L2648 - .Lrtx2643) / 4
+	.2byte	(.L2649 - .Lrtx2643) / 4
+	.section	.text.do_gc
+.L2642:
+	ldrh	w2, [x1, 118]
+	adrp	x22, .LANCHOR67
+	ldrh	w3, [x25, 80]
+	add	w19, w19, w2
+	mov	w2, 65535
+	and	w19, w19, 65535
+	cmp	w3, w2
+	beq	.L2650
+	adrp	x0, .LANCHOR22
+	cmp	w19, 7
+	mov	w23, 3
+	csinc	w23, w23, wzr, hi
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	tbz	x0, 8, .L2652
+	ldrh	w7, [x25, 122]
+	adrp	x0, .LC153
+	ldrh	w6, [x25, 120]
+	mov	w4, w19
+	ldrh	w5, [x25, 124]
+	mov	w3, w21
+	ldrb	w2, [x22, #:lo12:.LANCHOR67]
+	mov	w1, 1348
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2652:
+	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	mov	w2, 1
+	mov	w1, w23
+	bl	gc_search_src_blk
+	cmp	w0, 0
+	ble	.L2640
+.L2653:
+	mov	w0, 1
+.L2774:
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	b	.L2640
+.L2650:
+	ldrh	w25, [x1, 122]
+	cmp	w0, 1
+	ldrh	w27, [x1, 124]
+	bne	.L2654
+	bl	gc_scan_static_data
+	bl	gc_static_wearleveling
+.L2654:
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w26, 1
+	strb	w26, [x22, #:lo12:.LANCHOR67]
+	ldrh	w5, [x0, 124]
+	cbz	w5, .L2655
+	adrp	x1, .LANCHOR22
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	strb	w26, [x20, #:lo12:.LANCHOR104]
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2640
+	ldrh	w7, [x0, 122]
+	mov	w4, w19
+	ldrh	w6, [x0, 120]
+	mov	w3, w21
+	ldp	x19, x20, [sp, 16]
+	mov	w2, 0
+	ldp	x21, x22, [sp, 32]
+	mov	w1, 1373
+	ldp	x23, x24, [sp, 48]
+	adrp	x0, .LC153
+	ldp	x25, x26, [sp, 64]
+	add	x0, x0, :lo12:.LC153
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	printf
+.L2655:
+	cmp	w21, 47
+	bhi	.L2657
+	cmp	w19, 1
+	bls	.L2658
+	cmp	w19, 16
+	bhi	.L2659
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	ldrh	w0, [x0, 120]
+	cmp	w0, 127
+	bhi	.L2660
+.L2659:
+	mov	w2, 16
+	mov	w1, 3
+.L2779:
+	mov	w0, 1
+.L2772:
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+.L2661:
+	cbnz	w0, .L2653
+	b	.L2640
+.L2660:
+	mov	w2, 8
+	mov	w1, 2
+	b	.L2779
+.L2658:
+	adrp	x1, .LANCHOR22
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	ldr	w1, [x1, #:lo12:.LANCHOR22]
+	tbz	x1, 8, .L2662
+	ldrh	w7, [x0, 122]
+	mov	w5, 0
+	ldrh	w6, [x0, 120]
+	mov	w4, w19
+	adrp	x0, .LC153
+	mov	w3, w21
+	mov	w2, 0
+	mov	w1, 1386
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2662:
+	cmp	w21, 16
+	bls	.L2663
+	mov	w2, 1
+.L2777:
+	mov	w1, 2
+	b	.L2771
+.L2663:
+	mov	w2, 16
+.L2773:
+	mov	w1, 1
+.L2771:
+	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	b	.L2772
+.L2657:
+	add	w25, w25, w27
+	cmp	w21, 127
+	and	w25, w25, 65535
+	bhi	.L2664
+	sub	w0, w19, #2
+	and	w0, w0, 65535
+	cmp	w0, 13
+	bhi	.L2665
+	mov	w2, 8
+	mov	w1, 2
+	mov	w0, w26
+	bl	gc_search_src_blk
+	tst	w0, 65535
+	bne	.L2653
+.L2668:
+	adrp	x0, .LANCHOR64
+	adrp	x26, .LANCHOR58
+	ldrb	w0, [x0, #:lo12:.LANCHOR64]
+	cmp	w0, 2
+	adrp	x0, .LANCHOR22
+	bne	.L2768
+	add	x1, x26, :lo12:.LANCHOR58
+	cmp	w19, 1
+	strh	wzr, [x1, 34]
+	bls	.L2669
+.L2672:
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	mov	w1, 1
+	strb	w1, [x22, #:lo12:.LANCHOR67]
+	tbz	x0, 8, .L2671
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w4, w19
+	mov	w3, w21
+	mov	w2, 1
+	mov	w1, 1411
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2671:
+	add	x26, x26, :lo12:.LANCHOR58
+	mov	w2, 16
+	mov	w1, 1
+	ldrh	w0, [x26, 34]
+	strh	wzr, [x26, 32]
+	add	w0, w0, 1
+	strh	w0, [x26, 34]
+	ldrb	w0, [x22, #:lo12:.LANCHOR67]
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cmp	w0, 7
+	ccmp	w19, 31, 2, ls
+	bls	.L2673
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	ldrh	w2, [x1, 120]
+	adrp	x1, .LANCHOR163
+	ldrh	w1, [x1, #:lo12:.LANCHOR163]
+	cmp	w2, w1
+	bls	.L2661
+.L2673:
+	cmp	w25, 63
+	bhi	.L2674
+	mov	w2, 8
+	b	.L2777
+.L2665:
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0, lsr 1
+	bcs	.L2668
+.L2640:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	ret
+.L2768:
+	cmp	w19, 1
+	bls	.L2669
+	add	x1, x26, :lo12:.LANCHOR58
+	ldrh	w1, [x1, 34]
+	cmp	w1, 3
+	bls	.L2672
+.L2669:
+	add	x26, x26, :lo12:.LANCHOR58
+	ldr	w0, [x0, #:lo12:.LANCHOR22]
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	strh	wzr, [x26, 34]
+	tbz	x0, 8, .L2675
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w4, w19
+	mov	w3, w21
+	mov	w2, 0
+	mov	w1, 1426
+	ldrh	w7, [x0, 122]
+	ldrh	w6, [x0, 120]
+	ldrh	w5, [x0, 124]
+	adrp	x0, .LC153
+	add	x0, x0, :lo12:.LC153
+	bl	printf
+.L2675:
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0, lsr 1
+	bls	.L2640
+	mov	w2, 16
+	cmp	w19, 31
+	bhi	.L2773
+	b	.L2778
+.L2674:
+	mov	w2, 16
+.L2778:
+	mov	w1, 3
+	b	.L2771
+.L2664:
+	cmp	w21, 255
+	bhi	.L2677
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0
+	bls	.L2677
+	cmp	w25, w0, lsr 1
+	bcc	.L2640
+	strb	wzr, [x22, #:lo12:.LANCHOR67]
+	mov	w2, 16
+	mov	w1, w26
+	mov	w0, 0
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cmp	w0, 7
+	ccmp	w19, 4, 0, ls
+	bls	.L2661
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w1, 255
+	mov	w2, 128
+	add	x0, x0, 136
+	strh	wzr, [x0, -16]
+	bl	ftl_memset
+	strb	w26, [x22, #:lo12:.LANCHOR67]
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	ldrh	w1, [x0, 120]
+	adrp	x0, .LANCHOR163
+	ldrh	w0, [x0, #:lo12:.LANCHOR163]
+	cmp	w1, w0
+	bls	.L2678
+	cmp	w19, 16
+	bls	.L2679
+.L2681:
+	mov	w2, 8
+	mov	w1, 2
+.L2770:
+	mov	w0, 1
+	bl	gc_search_src_blk
+	mov	w1, 1
+	and	w0, w0, 65535
+	strb	w1, [x20, #:lo12:.LANCHOR104]
+	b	.L2661
+.L2678:
+	cmp	w19, 32
+	bls	.L2679
+	mov	w2, 16
+	mov	w1, w26
+	b	.L2770
+.L2679:
+	cmp	w19, 7
+	bls	.L2681
+	mov	w2, 16
+	mov	w1, 3
+	b	.L2770
+.L2677:
+	sub	w19, w19, #2
+	and	w19, w19, 65535
+	cmp	w19, 5
+	bhi	.L2640
+	adrp	x0, .LANCHOR165
+	ldrh	w0, [x0, #:lo12:.LANCHOR165]
+	cmp	w25, w0, lsr 1
+	bls	.L2640
+	mov	w2, 16
+	mov	w1, 2
+	mov	w0, 1
+	bl	gc_search_src_blk
+	and	w0, w0, 65535
+	cmp	w0, 15
+	bhi	.L2653
+	ldr	x3, [x23, #:lo12:.LANCHOR60]
+	mov	w2, 128
+	ldrb	w1, [x22, #:lo12:.LANCHOR67]
+	ldp	x19, x20, [sp, 16]
+	add	x0, x3, x1, sxtw 1
+	ubfiz	x1, x1, 7, 8
+	ldp	x21, x22, [sp, 32]
+	strh	wzr, [x0, 120]
+	add	x0, x1, 136
+	ldp	x23, x24, [sp, 48]
+	mov	w1, 255
+	ldp	x25, x26, [sp, 64]
+	add	x0, x3, x0
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	ftl_memset
+.L2644:
+	adrp	x7, .LANCHOR58
+	mov	w0, 65535
+	ldrh	w1, [x7, #:lo12:.LANCHOR58]
+	cmp	w1, w0
+	bne	.L2684
+	bl	gc_get_src_blk
+	strh	w0, [x7, #:lo12:.LANCHOR58]
+.L2684:
+	ldrh	w0, [x7, #:lo12:.LANCHOR58]
+	mov	w1, 65535
+	add	x2, x7, :lo12:.LANCHOR58
+	cmp	w0, w1
+	beq	.L2685
+	ldrh	w3, [x2, 56]
+	cbz	w3, .L2686
+	add	x2, x2, 58
+	mov	w1, 0
+.L2688:
+	ldrh	w4, [x2], 2
+	cmp	w4, w0
+	bne	.L2687
+.L2691:
+	adrp	x0, .LANCHOR58
+	mov	w1, -1
+	strh	w1, [x0, #:lo12:.LANCHOR58]
+	b	.L2640
+.L2687:
+	add	w1, w1, 1
+	and	w1, w1, 65535
+	cmp	w3, w1
+	bne	.L2688
+.L2686:
+	adrp	x1, .LANCHOR59
+	ldr	x1, [x1, #:lo12:.LANCHOR59]
+	add	x1, x1, x0, lsl 2
+	ldrb	w1, [x1, 2]
+	and	w2, w1, 224
+	cmp	w2, 224
+	beq	.L2689
+	tst	w1, 192
+	bne	.L2690
+.L2689:
+	adrp	x1, .LANCHOR56
+	ldr	x1, [x1, #:lo12:.LANCHOR56]
+	ldrh	w0, [x1, x0, lsl 1]
+	cbz	w0, .L2691
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1497
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2692:
+	b	.L2692
+.L2690:
+	mov	w0, 2
+	b	.L2774
+.L2685:
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	b	.L2640
+.L2645:
+	bl	gc_scan_src_blk
+	cmn	w0, #1
+	bne	.L2693
+	mov	w0, 3
+	b	.L2774
+.L2693:
+	adrp	x21, .LANCHOR58
+	mov	w1, 65535
+	add	x19, x21, :lo12:.LANCHOR58
+	ldrh	w0, [x21, #:lo12:.LANCHOR58]
+	cmp	w0, w1
+	beq	.L2653
+	ldrh	w1, [x19, 24]
+	cbz	w1, .L2694
+	mov	w0, 4
+	strh	wzr, [x19, 26]
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	b	.L2640
+.L2694:
+	mov	w1, 1
+	strb	w1, [x20, #:lo12:.LANCHOR104]
+	adrp	x20, .LANCHOR56
+	ubfiz	x1, x0, 1, 16
+	ldr	x2, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2695
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1525
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2696:
+	b	.L2696
+.L2695:
+	bl	ftl_free_sblk
+	ldr	x0, [x20, #:lo12:.LANCHOR56]
+	ldrh	w1, [x21, #:lo12:.LANCHOR58]
+	strh	wzr, [x0, x1, lsl 1]
+	ldrh	w0, [x19, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x19, 30]
+	cmp	w0, 8
+	bls	.L2691
+	strh	wzr, [x19, 30]
+	bl	ftl_flush
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	mov	w0, 0
+	bl	ftl_info_flush
+	b	.L2691
+.L2646:
+	bl	gc_scan_src_blk_one_page
+	adrp	x19, .LANCHOR58
+	add	x0, x19, :lo12:.LANCHOR58
+	adrp	x1, .LANCHOR79
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	ldrh	w2, [x0, 2]
+	cmp	w2, w1
+	bcc	.L2640
+	ldrh	w3, [x0, 24]
+	adrp	x2, .LANCHOR22
+	cbz	w3, .L2697
+	strh	wzr, [x0, 26]
+	mov	w1, 4
+	ldr	w0, [x2, #:lo12:.LANCHOR22]
+	strb	w1, [x20, #:lo12:.LANCHOR104]
+	adrp	x20, .LANCHOR56
+	tbz	x0, 8, .L2698
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	ldr	x2, [x20, #:lo12:.LANCHOR56]
+	ubfiz	x0, x1, 1, 16
+	ldrh	w2, [x2, x0]
+	adrp	x0, .LC154
+	add	x0, x0, :lo12:.LC154
+	bl	printf
+.L2698:
+	ldrh	w2, [x19, #:lo12:.LANCHOR58]
+	add	x0, x19, :lo12:.LANCHOR58
+	ldr	x1, [x20, #:lo12:.LANCHOR56]
+	ldrh	w0, [x0, 24]
+	ldrh	w1, [x1, x2, lsl 1]
+	cmp	w1, w0
+	beq	.L2640
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1555
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2699:
+	b	.L2699
+.L2697:
+	adrp	x0, .LANCHOR59
+	ldrh	w1, [x19, #:lo12:.LANCHOR58]
+	ldr	x21, [x0, #:lo12:.LANCHOR59]
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	ldr	w0, [x2, #:lo12:.LANCHOR22]
+	add	x21, x21, x1, uxth 2
+	tbz	x0, 8, .L2700
+	ldrb	w2, [x21, 2]
+	adrp	x0, .LC155
+	add	x0, x0, :lo12:.LC155
+	ubfx	x2, x2, 5, 3
+	bl	printf
+.L2700:
+	ldrb	w0, [x21, 2]
+	and	w1, w0, 224
+	cmp	w1, 224
+	beq	.L2701
+	tst	w0, 192
+	bne	.L2702
+.L2701:
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1565
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2703:
+	b	.L2703
+.L2702:
+	ldrh	w0, [x19, #:lo12:.LANCHOR58]
+	add	x20, x19, :lo12:.LANCHOR58
+	bl	ftl_free_sblk
+	mov	w0, -1
+	strh	w0, [x19, #:lo12:.LANCHOR58]
+	ldrh	w0, [x20, 30]
+	add	w0, w0, 1
+	and	w0, w0, 65535
+	strh	w0, [x20, 30]
+	cmp	w0, 8
+	bls	.L2640
+	strh	wzr, [x20, 30]
+.L2776:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	flt_sys_flush
+.L2647:
+	ldrh	w27, [x25, 80]
+	mov	w0, 65535
+	add	x26, x25, 80
+	cmp	w27, w0
+	bne	.L2704
+	adrp	x0, .LANCHOR67
+	ldrb	w22, [x0, #:lo12:.LANCHOR67]
+	cmp	w22, 1
+	bne	.L2704
+	bl	ftl_flush
+	mov	w0, 5
+	bl	ftl_alloc_sblk
+	and	w28, w0, 65535
+	cmp	w28, w27
+	bne	.L2705
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1581
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2706:
+	b	.L2706
+.L2705:
+	mov	w1, w22
+	bl	ftl_erase_sblk
+	mov	w0, 5
+	strb	w0, [x26, 4]
+	add	x1, x25, 96
+	mov	w0, w28
+	bl	ftl_get_blk_list_in_sblk
+	and	w0, w0, 255
+	adrp	x1, .LANCHOR79
+	strb	w0, [x26, 9]
+	adrp	x21, .LANCHOR68
+	adrp	x20, .LANCHOR69
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	strh	w28, [x25, 80]
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	strh	wzr, [x26, 2]
+	mul	w0, w0, w1
+	strb	wzr, [x26, 5]
+	strh	w0, [x26, 6]
+	mov	w1, 255
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	strh	wzr, [x26, 10]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR107
+	ldr	x0, [x0, #:lo12:.LANCHOR107]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR108
+	ldr	x0, [x0, #:lo12:.LANCHOR108]
+	lsl	w2, w2, 2
+	bl	ftl_memset
+	ldrb	w0, [x20, #:lo12:.LANCHOR69]
+	mov	w1, 255
+	ldrh	w2, [x21, #:lo12:.LANCHOR68]
+	mul	w2, w2, w0
+	adrp	x0, .LANCHOR65
+	ldr	x0, [x0, #:lo12:.LANCHOR65]
+	bl	ftl_memset
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	mov	w1, -1
+	str	w28, [x0, 132]
+	strh	w1, [x0, 128]
+	strh	w1, [x0, 130]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	mov	w1, -1
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	strh	w28, [x0, 126]
+	adrp	x0, .LANCHOR58
+	add	x0, x0, :lo12:.LANCHOR58
+	ldp	x23, x24, [sp, 48]
+	strh	wzr, [x0, 314]
+	strh	wzr, [x0, 56]
+	strh	wzr, [x0, 316]
+	strh	wzr, [x0, 318]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	str	w1, [x0, 320]
+	mov	w0, 0
+	ldp	x29, x30, [sp], 96
+	b	ftl_info_flush
+.L2704:
+	cmp	w21, 31
+	bls	.L2724
+	cmp	w21, 63
+	bls	.L2725
+	cmp	w21, 127
+	bls	.L2726
+	cmp	w21, 255
+	cset	w21, ls
+	add	w21, w21, 1
+.L2707:
+	adrp	x27, .LANCHOR67
+	adrp	x22, .LANCHOR58
+	add	x27, x27, :lo12:.LANCHOR67
+	add	x19, x22, :lo12:.LANCHOR58
+	adrp	x28, .LANCHOR38
+.L2708:
+	sub	w21, w21, #1
+	and	w21, w21, 255
+	cmp	w21, 255
+	beq	.L2640
+	bl	gc_do_copy_back
+	ldrb	w0, [x27]
+	cbnz	w0, .L2709
+	ldrb	w0, [x28, #:lo12:.LANCHOR38]
+	cmp	w0, 3
+	bhi	.L2710
+	bl	ftl_write_commit
+.L2710:
+	ldrh	w1, [x19, 26]
+	ldrh	w0, [x19, 24]
+	cmp	w1, w0
+	bcc	.L2708
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	bl	ftl_write_commit
+	bl	ftl_flush
+	ldrh	w0, [x19]
+	adrp	x2, .LANCHOR56
+	ldr	x2, [x2, #:lo12:.LANCHOR56]
+	ubfiz	x1, x0, 1, 16
+	ldrh	w1, [x2, x1]
+	cbz	w1, .L2712
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	mov	w2, 1638
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2713:
+	b	.L2713
+.L2724:
+	mov	w21, 9
+	b	.L2707
+.L2725:
+	mov	w21, 5
+	b	.L2707
+.L2726:
+	mov	w21, 3
+	b	.L2707
+.L2712:
+	bl	ftl_free_sblk
+.L2775:
+	mov	w0, -1
+	strh	w0, [x19]
+	b	.L2640
+.L2709:
+	ldrh	w0, [x19, 318]
+	cbz	w0, .L2714
+	ldr	w0, [x19, 320]
+	strh	wzr, [x19, 318]
+	cmn	w0, #1
+	beq	.L2715
+	bl	ftl_mask_bad_block
+.L2715:
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	add	x19, x22, :lo12:.LANCHOR58
+	strh	wzr, [x19, 56]
+	ldrh	w0, [x0, 80]
+	str	wzr, [x19, 320]
+	bl	ftl_free_sblk
+	ldr	x1, [x23, #:lo12:.LANCHOR60]
+	mov	w0, -1
+	ldr	x2, [x24, #:lo12:.LANCHOR46]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x19, 8]
+	cbz	x0, .L2716
+	bl	buf_free
+.L2716:
+	add	x22, x22, :lo12:.LANCHOR58
+	str	xzr, [x22, 8]
+	bl	flt_sys_flush
+	adrp	x1, .LANCHOR172
+	adrp	x0, .LC0
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	mov	w2, 1671
+	add	x1, x1, :lo12:.LANCHOR172
+	add	x0, x0, :lo12:.LC0
+	bl	printf
+.L2717:
+	b	.L2717
+.L2714:
+	ldrh	w0, [x26, 6]
+	ldrh	w1, [x19, 26]
+	cmp	w0, 1
+	ldrh	w0, [x19, 24]
+	bls	.L2718
+	cmp	w1, w0
+	bcc	.L2708
+	mov	w0, 1
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	ldrh	w0, [x19, 56]
+	add	w1, w0, 1
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
+	strh	w1, [x0, 58]
+	b	.L2775
+.L2718:
+	mov	w2, 5
+	strb	w2, [x20, #:lo12:.LANCHOR104]
+	cmp	w1, w0
+	bcc	.L2719
+	ldrh	w0, [x19, 56]
+	add	w1, w0, 1
+	strh	w1, [x19, 56]
+	add	x0, x19, x0, sxtw 1
+	ldrh	w1, [x19]
+	strh	w1, [x0, 58]
+	mov	w0, -1
+	strh	w0, [x19]
+.L2719:
+	bl	ftl_flush
+	bl	sblk_wait_write_queue_completed
+	bl	gc_write_completed
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	ldrh	w1, [x25, 80]
+	strh	w1, [x0, 128]
+	bl	pm_flush
+	bl	ftl_ext_info_flush
+	add	x0, x22, :lo12:.LANCHOR58
+	adrp	x1, .LANCHOR79
+	adrp	x2, .LANCHOR64
+	ldrh	w1, [x1, #:lo12:.LANCHOR79]
+	ldrb	w2, [x2, #:lo12:.LANCHOR64]
+	strh	wzr, [x0, 16]
+	strh	w1, [x0, 18]
+	cmp	w2, 2
+	strh	w2, [x0, 20]
+	bne	.L2720
+	ubfiz	w1, w1, 1, 15
+	strh	w1, [x0, 18]
+	mov	w1, 1
+	strh	w1, [x0, 20]
+.L2720:
+	add	x22, x22, :lo12:.LANCHOR58
+	strh	wzr, [x22, 22]
+	b	.L2640
+.L2648:
+	adrp	x19, .LANCHOR58
+	bl	gc_check_data_one_wl
+	add	x19, x19, :lo12:.LANCHOR58
+	cbz	w0, .L2722
+	ldr	x0, [x23, #:lo12:.LANCHOR60]
+	strh	wzr, [x19, 56]
+	ldrh	w0, [x0, 80]
+	bl	ftl_free_sblk
+	ldr	x1, [x23, #:lo12:.LANCHOR60]
+	mov	w0, -1
+	ldr	x2, [x24, #:lo12:.LANCHOR46]
+	strh	w0, [x1, 80]
+	strh	w0, [x2, 126]
+	strh	w0, [x1, 130]
+	ldr	x0, [x19, 8]
+	bl	buf_free
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	str	xzr, [x19, 8]
+	b	.L2776
+.L2722:
+	ldrh	w1, [x19, 16]
+	ldrh	w0, [x19, 18]
+	cmp	w1, w0
+	bcc	.L2640
+	mov	w0, 6
+	strb	w0, [x20, #:lo12:.LANCHOR104]
+	ldr	x0, [x19, 8]
+	bl	buf_free
+	str	xzr, [x19, 8]
+	b	.L2640
+.L2649:
+	bl	gc_update_l2p_map_new
+	mov	w19, -1
+	bl	gc_free_src_blk
+	bl	ftl_flush
+	bl	pm_flush
+	strh	w19, [x25, 80]
+	bl	ftl_ext_info_flush
+	ldr	x0, [x24, #:lo12:.LANCHOR46]
+	strh	w19, [x0, 126]
+	mov	w0, 0
+	bl	ftl_info_flush
+	strb	wzr, [x20, #:lo12:.LANCHOR104]
+	ldp	x21, x22, [sp, 32]
+	ldp	x19, x20, [sp, 16]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 96
+	b	print_ftl_debug_info
+	.size	do_gc, .-do_gc
+	.section	.text.ftl_write,"ax",@progbits
+	.align	2
+	.global	ftl_write
+	.type	ftl_write, %function
+ftl_write:
+	stp	x29, x30, [sp, -112]!
+	add	x29, sp, 0
+	stp	x23, x24, [sp, 48]
+	mov	x23, x3
+	stp	x25, x26, [sp, 64]
+	mov	w25, w2
+	stp	x19, x20, [sp, 16]
+	stp	x21, x22, [sp, 32]
+	stp	x27, x28, [sp, 80]
+	cbnz	w0, .L2781
+	adrp	x0, .LANCHOR52
+	ldr	w2, [x0, #:lo12:.LANCHOR52]
+	mov	w0, 24576
+.L2782:
+	add	w3, w1, w25
+	cmp	w2, w3
+	bcc	.L2794
+	adrp	x22, .LANCHOR45
+	add	w27, w0, w1
+	sub	w19, w25, #1
+	adrp	x24, .LANCHOR46
+	ldrb	w0, [x22, #:lo12:.LANCHOR45]
+	add	w19, w19, w27
+	add	x22, x22, :lo12:.LANCHOR45
+	udiv	w21, w27, w0
+	udiv	w19, w19, w0
+	add	w0, w27, w25
+	str	w0, [x29, 108]
+	mov	w28, w21
+	sub	w20, w19, w21
+	add	w20, w20, 1
+.L2784:
+	cbnz	w20, .L2792
+	bl	ftl_write_commit
+	mov	w0, 0
+	mov	w1, 1
+	bl	do_gc
+	mov	w0, 0
+.L2780:
+	ldp	x19, x20, [sp, 16]
+	ldp	x21, x22, [sp, 32]
+	ldp	x23, x24, [sp, 48]
+	ldp	x25, x26, [sp, 64]
+	ldp	x27, x28, [sp, 80]
+	ldp	x29, x30, [sp], 112
+	ret
+.L2781:
+	cmp	w0, 3
+	bhi	.L2794
+	lsl	w0, w0, 13
+	mov	w2, 8192
+	b	.L2782
+.L2792:
+	mov	w0, 0
+	bl	buf_alloc
+	mov	x26, x0
+	cbnz	x0, .L2785
+	bl	ftl_write_commit
+	b	.L2784
+.L2785:
+	strb	wzr, [x0, 57]
+	cmp	w28, w21
+	ldrb	w0, [x22]
+	ccmp	w28, w19, 4, ne
+	strb	w0, [x26, 56]
+	bne	.L2788
+	cmp	w28, w21
+	bne	.L2789
+	udiv	w1, w27, w0
+	msub	w1, w1, w0, w27
+	and	w1, w1, 255
+	strb	w1, [x26, 57]
+	sub	w0, w0, w1
+	and	w0, w0, 255
+	cmp	w25, w0
+	csel	w0, w25, w0, cc
+.L2796:
+	strb	w0, [x26, 56]
+.L2788:
+	ldr	x3, [x26, 8]
+	mov	x1, x23
+	ldrb	w0, [x26, 57]
+	sub	w20, w20, #1
+	ldrb	w2, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	lsl	w2, w2, 9
+	add	x0, x3, x0
+	bl	ftl_memcpy
+	ldr	x1, [x24, #:lo12:.LANCHOR46]
+	ldr	w0, [x1, 8]
+	str	w28, [x26, 36]
+	add	w28, w28, 1
+	add	w2, w0, 1
+	str	w2, [x1, 8]
+	str	w0, [x26, 32]
+	mov	x0, x26
+	bl	ftl_write_buf
+	ldrb	w0, [x26, 56]
+	ubfiz	x0, x0, 9, 8
+	add	x23, x23, x0
+	b	.L2784
+.L2789:
+	ldr	w1, [x29, 108]
+	msub	w0, w0, w28, w1
+	b	.L2796
+.L2794:
+	mov	w0, -1
+	b	.L2780
+	.size	ftl_write, .-ftl_write
+	.section	.text.FtlWrite,"ax",@progbits
+	.align	2
+	.global	FtlWrite
+	.type	FtlWrite, %function
+FtlWrite:
+	and	w0, w0, 255
+	b	ftl_write
+	.size	FtlWrite, .-FtlWrite
+	.section	.text.StorageSysDataStore,"ax",@progbits
+	.align	2
+	.global	StorageSysDataStore
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	mov	x3, x1
+	mov	w2, 1
+	mov	w1, w0
+	mov	w0, 2
+	b	ftl_write
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.global	g_pm_spare
+	.global	pm_gc_enable
+	.global	pm_last_load_ram_id
+	.global	pm_last_update_ram_id
+	.global	pm_ram_info
+	.global	sblk_gc_write_completed_queue_head
+	.global	sblk_read_completed_queue_head
+	.global	sblk_write_completed_queue_head
+	.global	sblk_queue_head
+	.global	ftl_low_format_cur_blk
+	.global	ftl_power_lost_flag
+	.global	ftl_vpn_update_count
+	.global	ftl_sblk_vpn_update_id
+	.global	ftl_sblk_lpa_tbl
+	.global	ftl_sblk_vpn
+	.global	gp_ftl_ext_info
+	.global	gp_ftl_info
+	.global	gp_blk_info
+	.global	ftl_tmp_spare
+	.global	ftl_info_spare
+	.global	ftl_ext_info_data_buffer
+	.global	ftl_info_data_buffer
+	.global	ftl_tmp_buffer
+	.global	g_ftl_info_blk
+	.global	tlc_prog_order
+	.global	gc_des_ppa_tbl
+	.global	gc_valid_page_ppa
+	.global	gc_page_buf_id
+	.global	gc_pre_ppa_tbl
+	.global	gc_lpa_tbl
+	.global	g_gc_info
+	.global	gc_slc_mode_vpn_th
+	.global	gc_tlc_mode_tlc_vpn_th
+	.global	gc_tlc_mode_slc_vpn_th
+	.global	gc_state
+	.global	gc_mode
+	.global	check_vpc_tbl
+	.global	p_read_ahead_ext_buf
+	.global	read_ahead_lpa
+	.global	write_commit_count
+	.global	write_commit_head
+	.global	write_buf_count
+	.global	write_buf_head
+	.global	ftl_flush_jiffies
+	.global	lpa_hash
+	.global	lpa_hash_index
+	.global	_min_slc_super_block
+	.global	_max_slc_super_block
+	.global	_max_xlc_super_block
+	.global	_c_max_pm_sblk
+	.global	_c_ftl_pm_page_num
+	.global	_c_totle_log_page
+	.global	_c_totle_data_density
+	.global	_c_user_data_density
+	.global	_c_totle_phy_density
+	.global	_c_ftl_block_addr_log2
+	.global	_c_ftl_block_align_addr
+	.global	_c_ftl_byte_pre_page
+	.global	_c_ftl_nand_blks_per_die
+	.global	_c_ftl_page_pre_slc_blk
+	.global	_c_ftl_page_pre_blk
+	.global	_c_ftl_blk_pre_plane
+	.global	_c_ftl_nand_planes_num
+	.global	_c_ftl_planes_per_die
+	.global	_c_ftl_sec_per_page
+	.global	_c_ftl_nand_die_num
+	.global	_c_ftl_nand_type
+	.global	zftl_debug
+	.global	g_flash_blk_info
+	.global	gp_flash_info
+	.global	p_free_buf_head
+	.global	free_buf_count
+	.global	g_buf
+	.global	g_nandc_v6_master_info
+	.global	nandc_randomizer_en
+	.global	nandc_hw_seed
+	.global	fill_spare_size
+	.global	g_nandc_ecc_bits
+	.global	g_nandc_ver
+	.global	gp_nandc
+	.global	hy_f26_ref_value
+	.global	sd15_tlc_rr
+	.global	sd15_slc_rr
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_msb_page_tbl
+	.global	g_lsb_page_tbl
+	.global	g_die_addr
+	.global	g_die_cs_idx
+	.global	IDByte
+	.global	flash_read_retry
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	g_flash_toggle_mode_en
+	.global	g_flash_3d_mlc_flag
+	.global	g_flash_3d_tlc_flag
+	.global	g_flash_multi_page_prog_en
+	.global	g_flash_multi_page_read_en
+	.global	g_flash_interface_mode
+	.global	g_idb_ecc_bits
+	.global	g_idb_slc_mode_enable
+	.global	g_slc_mode_addr2
+	.global	g_slc_mode_enable
+	.global	g_flash_cur_mode
+	.global	g_flash_slc_mode
+	.global	g_slc_page_num
+	.global	g_totle_phy_block
+	.global	g_block_align_addr
+	.global	g_flash_reversd_blks
+	.global	g_nand_max_die
+	.global	g_flash_tmp_spare_buffer
+	.global	g_flash_tmp_page_buffer
+	.global	g_flash_sys_spare_buffer
+	.global	g_flash_spare_buffer
+	.global	g_flash_page_buffer
+	.section	.bss.IDByte,"aw",@nobits
+	.align	2
+	.set	.LANCHOR26,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.zero	32
+	.section	.bss._c_ftl_blk_pre_plane,"aw",@nobits
+	.align	1
+	.set	.LANCHOR54,. + 0
+	.type	_c_ftl_blk_pre_plane, %object
+	.size	_c_ftl_blk_pre_plane, 2
+_c_ftl_blk_pre_plane:
+	.zero	2
+	.section	.bss._c_ftl_block_addr_log2,"aw",@nobits
+	.align	1
+	.set	.LANCHOR71,. + 0
+	.type	_c_ftl_block_addr_log2, %object
+	.size	_c_ftl_block_addr_log2, 2
+_c_ftl_block_addr_log2:
+	.zero	2
+	.section	.bss._c_ftl_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR75,. + 0
+	.type	_c_ftl_block_align_addr, %object
+	.size	_c_ftl_block_align_addr, 2
+_c_ftl_block_align_addr:
+	.zero	2
+	.section	.bss._c_ftl_byte_pre_page,"aw",@nobits
+	.align	1
+	.set	.LANCHOR149,. + 0
+	.type	_c_ftl_byte_pre_page, %object
+	.size	_c_ftl_byte_pre_page, 2
+_c_ftl_byte_pre_page:
+	.zero	2
+	.section	.bss._c_ftl_nand_blks_per_die,"aw",@nobits
+	.align	1
+	.type	_c_ftl_nand_blks_per_die, %object
+	.size	_c_ftl_nand_blks_per_die, 2
+_c_ftl_nand_blks_per_die:
+	.zero	2
+	.section	.bss._c_ftl_nand_die_num,"aw",@nobits
+	.set	.LANCHOR76,. + 0
+	.type	_c_ftl_nand_die_num, %object
+	.size	_c_ftl_nand_die_num, 1
+_c_ftl_nand_die_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_planes_num,"aw",@nobits
+	.set	.LANCHOR69,. + 0
+	.type	_c_ftl_nand_planes_num, %object
+	.size	_c_ftl_nand_planes_num, 1
+_c_ftl_nand_planes_num:
+	.zero	1
+	.section	.bss._c_ftl_nand_type,"aw",@nobits
+	.set	.LANCHOR64,. + 0
+	.type	_c_ftl_nand_type, %object
+	.size	_c_ftl_nand_type, 1
+_c_ftl_nand_type:
+	.zero	1
+	.section	.bss._c_ftl_page_pre_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	_c_ftl_page_pre_blk, %object
+	.size	_c_ftl_page_pre_blk, 2
+_c_ftl_page_pre_blk:
+	.zero	2
+	.section	.bss._c_ftl_page_pre_slc_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR79,. + 0
+	.type	_c_ftl_page_pre_slc_blk, %object
+	.size	_c_ftl_page_pre_slc_blk, 2
+_c_ftl_page_pre_slc_blk:
+	.zero	2
+	.section	.bss._c_ftl_planes_per_die,"aw",@nobits
+	.set	.LANCHOR70,. + 0
+	.type	_c_ftl_planes_per_die, %object
+	.size	_c_ftl_planes_per_die, 1
+_c_ftl_planes_per_die:
+	.zero	1
+	.section	.bss._c_ftl_pm_page_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	_c_ftl_pm_page_num, %object
+	.size	_c_ftl_pm_page_num, 2
+_c_ftl_pm_page_num:
+	.zero	2
+	.section	.bss._c_ftl_sec_per_page,"aw",@nobits
+	.set	.LANCHOR45,. + 0
+	.type	_c_ftl_sec_per_page, %object
+	.size	_c_ftl_sec_per_page, 1
+_c_ftl_sec_per_page:
+	.zero	1
+	.section	.bss._c_max_pm_sblk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR101,. + 0
+	.type	_c_max_pm_sblk, %object
+	.size	_c_max_pm_sblk, 2
+_c_max_pm_sblk:
+	.zero	2
+	.section	.bss._c_totle_data_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR162,. + 0
+	.type	_c_totle_data_density, %object
+	.size	_c_totle_data_density, 4
+_c_totle_data_density:
+	.zero	4
+	.section	.bss._c_totle_log_page,"aw",@nobits
+	.align	2
+	.set	.LANCHOR47,. + 0
+	.type	_c_totle_log_page, %object
+	.size	_c_totle_log_page, 4
+_c_totle_log_page:
+	.zero	4
+	.section	.bss._c_totle_phy_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR161,. + 0
+	.type	_c_totle_phy_density, %object
+	.size	_c_totle_phy_density, 4
+_c_totle_phy_density:
+	.zero	4
+	.section	.bss._c_user_data_density,"aw",@nobits
+	.align	2
+	.set	.LANCHOR52,. + 0
+	.type	_c_user_data_density, %object
+	.size	_c_user_data_density, 4
+_c_user_data_density:
+	.zero	4
+	.section	.bss._max_slc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR164,. + 0
+	.type	_max_slc_super_block, %object
+	.size	_max_slc_super_block, 2
+_max_slc_super_block:
+	.zero	2
+	.section	.bss._max_xlc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR163,. + 0
+	.type	_max_xlc_super_block, %object
+	.size	_max_xlc_super_block, 2
+_max_xlc_super_block:
+	.zero	2
+	.section	.bss._min_slc_super_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR165,. + 0
+	.type	_min_slc_super_block, %object
+	.size	_min_slc_super_block, 2
+_min_slc_super_block:
+	.zero	2
+	.section	.bss.check_vpc_tbl,"aw",@nobits
+	.align	3
+	.type	check_vpc_tbl, %object
+	.size	check_vpc_tbl, 4352
+check_vpc_tbl:
+	.zero	4352
+	.section	.bss.fill_spare_size,"aw",@nobits
+	.align	1
+	.set	.LANCHOR31,. + 0
+	.type	fill_spare_size, %object
+	.size	fill_spare_size, 2
+fill_spare_size:
+	.zero	2
+	.section	.bss.flash_read_retry,"aw",@nobits
+	.align	3
+	.set	.LANCHOR115,. + 0
+	.type	flash_read_retry, %object
+	.size	flash_read_retry, 8
+flash_read_retry:
+	.zero	8
+	.section	.bss.free_buf_count,"aw",@nobits
+	.set	.LANCHOR38,. + 0
+	.type	free_buf_count, %object
+	.size	free_buf_count, 1
+free_buf_count:
+	.zero	1
+	.section	.bss.ftl_ext_info_data_buffer,"aw",@nobits
+	.align	6
+	.type	ftl_ext_info_data_buffer, %object
+	.size	ftl_ext_info_data_buffer, 16384
+ftl_ext_info_data_buffer:
+	.zero	16384
+	.section	.bss.ftl_flush_jiffies,"aw",@nobits
+	.align	2
+	.set	.LANCHOR168,. + 0
+	.type	ftl_flush_jiffies, %object
+	.size	ftl_flush_jiffies, 4
+ftl_flush_jiffies:
+	.zero	4
+	.section	.bss.ftl_info_data_buffer,"aw",@nobits
+	.align	6
+	.type	ftl_info_data_buffer, %object
+	.size	ftl_info_data_buffer, 16384
+ftl_info_data_buffer:
+	.zero	16384
+	.section	.bss.ftl_info_spare,"aw",@nobits
+	.align	6
+	.set	.LANCHOR130,. + 0
+	.type	ftl_info_spare, %object
+	.size	ftl_info_spare, 256
+ftl_info_spare:
+	.zero	256
+	.section	.bss.ftl_low_format_cur_blk,"aw",@nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	ftl_low_format_cur_blk, %object
+	.size	ftl_low_format_cur_blk, 2
+ftl_low_format_cur_blk:
+	.zero	2
+	.section	.bss.ftl_power_lost_flag,"aw",@nobits
+	.set	.LANCHOR133,. + 0
+	.type	ftl_power_lost_flag, %object
+	.size	ftl_power_lost_flag, 1
+ftl_power_lost_flag:
+	.zero	1
+	.section	.bss.ftl_sblk_lpa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR82,. + 0
+	.type	ftl_sblk_lpa_tbl, %object
+	.size	ftl_sblk_lpa_tbl, 8
+ftl_sblk_lpa_tbl:
+	.zero	8
+	.section	.bss.ftl_sblk_vpn,"aw",@nobits
+	.align	3
+	.set	.LANCHOR56,. + 0
+	.type	ftl_sblk_vpn, %object
+	.size	ftl_sblk_vpn, 8
+ftl_sblk_vpn:
+	.zero	8
+	.section	.bss.ftl_sblk_vpn_update_id,"aw",@nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	ftl_sblk_vpn_update_id, %object
+	.size	ftl_sblk_vpn_update_id, 2
+ftl_sblk_vpn_update_id:
+	.zero	2
+	.section	.bss.ftl_tmp_buffer,"aw",@nobits
+	.align	6
+	.type	ftl_tmp_buffer, %object
+	.size	ftl_tmp_buffer, 16384
+ftl_tmp_buffer:
+	.zero	16384
+	.section	.bss.ftl_tmp_spare,"aw",@nobits
+	.align	6
+	.set	.LANCHOR121,. + 0
+	.type	ftl_tmp_spare, %object
+	.size	ftl_tmp_spare, 256
+ftl_tmp_spare:
+	.zero	256
+	.section	.bss.ftl_vpn_update_count,"aw",@nobits
+	.align	1
+	.set	.LANCHOR86,. + 0
+	.type	ftl_vpn_update_count, %object
+	.size	ftl_vpn_update_count, 2
+ftl_vpn_update_count:
+	.zero	2
+	.section	.bss.gNandOptPara,"aw",@nobits
+	.align	3
+	.set	.LANCHOR103,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.zero	32
+	.section	.bss.g_block_align_addr,"aw",@nobits
+	.align	1
+	.set	.LANCHOR13,. + 0
+	.type	g_block_align_addr, %object
+	.size	g_block_align_addr, 2
+g_block_align_addr:
+	.zero	2
+	.section	.bss.g_buf,"aw",@nobits
+	.align	3
+	.set	.LANCHOR36,. + 0
+	.type	g_buf, %object
+	.size	g_buf, 2048
+g_buf:
+	.zero	2048
+	.section	.bss.g_die_addr,"aw",@nobits
+	.align	2
+	.set	.LANCHOR98,. + 0
+	.type	g_die_addr, %object
+	.size	g_die_addr, 32
+g_die_addr:
+	.zero	32
+	.section	.bss.g_die_cs_idx,"aw",@nobits
+	.align	2
+	.set	.LANCHOR10,. + 0
+	.type	g_die_cs_idx, %object
+	.size	g_die_cs_idx, 8
+g_die_cs_idx:
+	.zero	8
+	.section	.bss.g_flash_3d_mlc_flag,"aw",@nobits
+	.set	.LANCHOR74,. + 0
+	.type	g_flash_3d_mlc_flag, %object
+	.size	g_flash_3d_mlc_flag, 1
+g_flash_3d_mlc_flag:
+	.zero	1
+	.section	.bss.g_flash_3d_tlc_flag,"aw",@nobits
+	.set	.LANCHOR66,. + 0
+	.type	g_flash_3d_tlc_flag, %object
+	.size	g_flash_3d_tlc_flag, 1
+g_flash_3d_tlc_flag:
+	.zero	1
+	.section	.bss.g_flash_blk_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR117,. + 0
+	.type	g_flash_blk_info, %object
+	.size	g_flash_blk_info, 4
+g_flash_blk_info:
+	.zero	4
+	.section	.bss.g_flash_cur_mode,"aw",@nobits
+	.set	.LANCHOR20,. + 0
+	.type	g_flash_cur_mode, %object
+	.size	g_flash_cur_mode, 1
+g_flash_cur_mode:
+	.zero	1
+	.section	.bss.g_flash_interface_mode,"aw",@nobits
+	.set	.LANCHOR25,. + 0
+	.type	g_flash_interface_mode, %object
+	.size	g_flash_interface_mode, 1
+g_flash_interface_mode:
+	.zero	1
+	.section	.bss.g_flash_multi_page_prog_en,"aw",@nobits
+	.set	.LANCHOR23,. + 0
+	.type	g_flash_multi_page_prog_en, %object
+	.size	g_flash_multi_page_prog_en, 1
+g_flash_multi_page_prog_en:
+	.zero	1
+	.section	.bss.g_flash_multi_page_read_en,"aw",@nobits
+	.set	.LANCHOR144,. + 0
+	.type	g_flash_multi_page_read_en, %object
+	.size	g_flash_multi_page_read_en, 1
+g_flash_multi_page_read_en:
+	.zero	1
+	.section	.bss.g_flash_page_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR119,. + 0
+	.type	g_flash_page_buffer, %object
+	.size	g_flash_page_buffer, 8
+g_flash_page_buffer:
+	.zero	8
+	.section	.bss.g_flash_reversd_blks,"aw",@nobits
+	.set	.LANCHOR123,. + 0
+	.type	g_flash_reversd_blks, %object
+	.size	g_flash_reversd_blks, 1
+g_flash_reversd_blks:
+	.zero	1
+	.section	.bss.g_flash_slc_mode,"aw",@nobits
+	.set	.LANCHOR11,. + 0
+	.type	g_flash_slc_mode, %object
+	.size	g_flash_slc_mode, 1
+g_flash_slc_mode:
+	.zero	1
+	.section	.bss.g_flash_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR118,. + 0
+	.type	g_flash_spare_buffer, %object
+	.size	g_flash_spare_buffer, 8
+g_flash_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_sys_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR116,. + 0
+	.type	g_flash_sys_spare_buffer, %object
+	.size	g_flash_sys_spare_buffer, 8
+g_flash_sys_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_tmp_page_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR111,. + 0
+	.type	g_flash_tmp_page_buffer, %object
+	.size	g_flash_tmp_page_buffer, 8
+g_flash_tmp_page_buffer:
+	.zero	8
+	.section	.bss.g_flash_tmp_spare_buffer,"aw",@nobits
+	.align	3
+	.set	.LANCHOR112,. + 0
+	.type	g_flash_tmp_spare_buffer, %object
+	.size	g_flash_tmp_spare_buffer, 8
+g_flash_tmp_spare_buffer:
+	.zero	8
+	.section	.bss.g_flash_toggle_mode_en,"aw",@nobits
+	.set	.LANCHOR35,. + 0
+	.type	g_flash_toggle_mode_en, %object
+	.size	g_flash_toggle_mode_en, 1
+g_flash_toggle_mode_en:
+	.zero	1
+	.section	.bss.g_ftl_info_blk,"aw",@nobits
+	.align	6
+	.set	.LANCHOR131,. + 0
+	.type	g_ftl_info_blk, %object
+	.size	g_ftl_info_blk, 4
+g_ftl_info_blk:
+	.zero	4
+	.section	.bss.g_gc_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR58,. + 0
+	.type	g_gc_info, %object
+	.size	g_gc_info, 328
+g_gc_info:
+	.zero	328
+	.section	.bss.g_idb_ecc_bits,"aw",@nobits
+	.set	.LANCHOR145,. + 0
+	.type	g_idb_ecc_bits, %object
+	.size	g_idb_ecc_bits, 1
+g_idb_ecc_bits:
+	.zero	1
+	.section	.bss.g_idb_slc_mode_enable,"aw",@nobits
+	.set	.LANCHOR146,. + 0
+	.type	g_idb_slc_mode_enable, %object
+	.size	g_idb_slc_mode_enable, 1
+g_idb_slc_mode_enable:
+	.zero	1
+	.section	.bss.g_lsb_page_tbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR14,. + 0
+	.type	g_lsb_page_tbl, %object
+	.size	g_lsb_page_tbl, 512
+g_lsb_page_tbl:
+	.zero	512
+	.section	.bss.g_maxRegNum,"aw",@nobits
+	.set	.LANCHOR4,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.zero	1
+	.section	.bss.g_maxRetryCount,"aw",@nobits
+	.set	.LANCHOR113,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.zero	1
+	.section	.bss.g_msb_page_tbl,"aw",@nobits
+	.align	2
+	.set	.LANCHOR96,. + 0
+	.type	g_msb_page_tbl, %object
+	.size	g_msb_page_tbl, 1024
+g_msb_page_tbl:
+	.zero	1024
+	.section	.bss.g_nand_max_die,"aw",@nobits
+	.set	.LANCHOR8,. + 0
+	.type	g_nand_max_die, %object
+	.size	g_nand_max_die, 1
+g_nand_max_die:
+	.zero	1
+	.section	.bss.g_nandc_ecc_bits,"aw",@nobits
+	.set	.LANCHOR27,. + 0
+	.type	g_nandc_ecc_bits, %object
+	.size	g_nandc_ecc_bits, 1
+g_nandc_ecc_bits:
+	.zero	1
+	.section	.bss.g_nandc_v6_master_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR30,. + 0
+	.type	g_nandc_v6_master_info, %object
+	.size	g_nandc_v6_master_info, 40
+g_nandc_v6_master_info:
+	.zero	40
+	.section	.bss.g_nandc_ver,"aw",@nobits
+	.set	.LANCHOR7,. + 0
+	.type	g_nandc_ver, %object
+	.size	g_nandc_ver, 1
+g_nandc_ver:
+	.zero	1
+	.section	.bss.g_pm_spare,"aw",@nobits
+	.align	3
+	.set	.LANCHOR141,. + 0
+	.type	g_pm_spare, %object
+	.size	g_pm_spare, 8
+g_pm_spare:
+	.zero	8
+	.section	.bss.g_retryMode,"aw",@nobits
+	.set	.LANCHOR2,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.zero	1
+	.section	.bss.g_slc_mode_addr2,"aw",@nobits
+	.set	.LANCHOR12,. + 0
+	.type	g_slc_mode_addr2, %object
+	.size	g_slc_mode_addr2, 1
+g_slc_mode_addr2:
+	.zero	1
+	.section	.bss.g_slc_mode_enable,"aw",@nobits
+	.type	g_slc_mode_enable, %object
+	.size	g_slc_mode_enable, 1
+g_slc_mode_enable:
+	.zero	1
+	.section	.bss.g_slc_page_num,"aw",@nobits
+	.align	1
+	.set	.LANCHOR97,. + 0
+	.type	g_slc_page_num, %object
+	.size	g_slc_page_num, 2
+g_slc_page_num:
+	.zero	2
+	.section	.bss.g_totle_phy_block,"aw",@nobits
+	.align	1
+	.set	.LANCHOR99,. + 0
+	.type	g_totle_phy_block, %object
+	.size	g_totle_phy_block, 2
+g_totle_phy_block:
+	.zero	2
+	.section	.bss.gc_des_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR109,. + 0
+	.type	gc_des_ppa_tbl, %object
+	.size	gc_des_ppa_tbl, 8
+gc_des_ppa_tbl:
+	.zero	8
+	.section	.bss.gc_lpa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR107,. + 0
+	.type	gc_lpa_tbl, %object
+	.size	gc_lpa_tbl, 8
+gc_lpa_tbl:
+	.zero	8
+	.section	.bss.gc_mode,"aw",@nobits
+	.set	.LANCHOR67,. + 0
+	.type	gc_mode, %object
+	.size	gc_mode, 1
+gc_mode:
+	.zero	1
+	.section	.bss.gc_page_buf_id,"aw",@nobits
+	.align	3
+	.set	.LANCHOR65,. + 0
+	.type	gc_page_buf_id, %object
+	.size	gc_page_buf_id, 8
+gc_page_buf_id:
+	.zero	8
+	.section	.bss.gc_pre_ppa_tbl,"aw",@nobits
+	.align	3
+	.set	.LANCHOR108,. + 0
+	.type	gc_pre_ppa_tbl, %object
+	.size	gc_pre_ppa_tbl, 8
+gc_pre_ppa_tbl:
+	.zero	8
+	.section	.bss.gc_slc_mode_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	gc_slc_mode_vpn_th, %object
+	.size	gc_slc_mode_vpn_th, 2
+gc_slc_mode_vpn_th:
+	.zero	2
+	.section	.bss.gc_state,"aw",@nobits
+	.set	.LANCHOR104,. + 0
+	.type	gc_state, %object
+	.size	gc_state, 1
+gc_state:
+	.zero	1
+	.section	.bss.gc_tlc_mode_slc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR105,. + 0
+	.type	gc_tlc_mode_slc_vpn_th, %object
+	.size	gc_tlc_mode_slc_vpn_th, 2
+gc_tlc_mode_slc_vpn_th:
+	.zero	2
+	.section	.bss.gc_tlc_mode_tlc_vpn_th,"aw",@nobits
+	.align	1
+	.set	.LANCHOR106,. + 0
+	.type	gc_tlc_mode_tlc_vpn_th, %object
+	.size	gc_tlc_mode_tlc_vpn_th, 2
+gc_tlc_mode_tlc_vpn_th:
+	.zero	2
+	.section	.bss.gc_valid_page_ppa,"aw",@nobits
+	.align	3
+	.set	.LANCHOR61,. + 0
+	.type	gc_valid_page_ppa, %object
+	.size	gc_valid_page_ppa, 8
+gc_valid_page_ppa:
+	.zero	8
+	.section	.bss.gpNandParaInfo,"aw",@nobits
+	.align	3
+	.set	.LANCHOR34,. + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 8
+gpNandParaInfo:
+	.zero	8
+	.section	.bss.gp_blk_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR59,. + 0
+	.type	gp_blk_info, %object
+	.size	gp_blk_info, 8
+gp_blk_info:
+	.zero	8
+	.section	.bss.gp_flash_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR5,. + 0
+	.type	gp_flash_info, %object
+	.size	gp_flash_info, 8
+gp_flash_info:
+	.zero	8
+	.section	.bss.gp_ftl_ext_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR60,. + 0
+	.type	gp_ftl_ext_info, %object
+	.size	gp_ftl_ext_info, 8
+gp_ftl_ext_info:
+	.zero	8
+	.section	.bss.gp_ftl_info,"aw",@nobits
+	.align	3
+	.set	.LANCHOR46,. + 0
+	.type	gp_ftl_info, %object
+	.size	gp_ftl_info, 8
+gp_ftl_info:
+	.zero	8
+	.section	.bss.gp_nandc,"aw",@nobits
+	.align	3
+	.set	.LANCHOR6,. + 0
+	.type	gp_nandc, %object
+	.size	gp_nandc, 8
+gp_nandc:
+	.zero	8
+	.section	.bss.lpa_hash,"aw",@nobits
+	.align	3
+	.set	.LANCHOR81,. + 0
+	.type	lpa_hash, %object
+	.size	lpa_hash, 512
+lpa_hash:
+	.zero	512
+	.section	.bss.lpa_hash_index,"aw",@nobits
+	.align	3
+	.set	.LANCHOR83,. + 0
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+	.size	__func__.10161, 22
+__func__.10161:
+	.string	"ftl_get_new_free_page"
+	.section	.rodata.__func__.10172,"a",@progbits
+	.align	3
+	.set	.LANCHOR85,. + 0
+	.type	__func__.10172, %object
+	.size	__func__.10172, 22
+__func__.10172:
+	.string	"ftl_ext_alloc_new_blk"
+	.section	.rodata.__func__.10197,"a",@progbits
+	.align	3
+	.set	.LANCHOR134,. + 0
+	.type	__func__.10197, %object
+	.size	__func__.10197, 19
+__func__.10197:
+	.string	"ftl_ext_info_flush"
+	.section	.rodata.__func__.10209,"a",@progbits
+	.align	3
+	.set	.LANCHOR135,. + 0
+	.type	__func__.10209, %object
+	.size	__func__.10209, 18
+__func__.10209:
+	.string	"ftl_ext_info_init"
+	.section	.rodata.__func__.10254,"a",@progbits
+	.align	3
+	.set	.LANCHOR136,. + 0
+	.type	__func__.10254, %object
+	.size	__func__.10254, 15
+__func__.10254:
+	.string	"ftl_low_format"
+	.section	.rodata.__func__.10298,"a",@progbits
+	.align	3
+	.set	.LANCHOR138,. + 0
+	.type	__func__.10298, %object
+	.size	__func__.10298, 23
+__func__.10298:
+	.string	"ftl_re_low_format_test"
+	.section	.rodata.__func__.10308,"a",@progbits
+	.align	3
+	.set	.LANCHOR129,. + 0
+	.type	__func__.10308, %object
+	.size	__func__.10308, 14
+__func__.10308:
+	.string	"ftl_prog_page"
+	.section	.rodata.__func__.10483,"a",@progbits
+	.align	3
+	.set	.LANCHOR126,. + 0
+	.type	__func__.10483, %object
+	.size	__func__.10483, 15
+__func__.10483:
+	.string	"sblk_prog_page"
+	.section	.rodata.__func__.10542,"a",@progbits
+	.align	3
+	.set	.LANCHOR148,. + 0
+	.type	__func__.10542, %object
+	.size	__func__.10542, 16
+__func__.10542:
+	.string	"load_l2p_region"
+	.section	.rodata.__func__.10556,"a",@progbits
+	.align	3
+	.set	.LANCHOR102,. + 0
+	.type	__func__.10556, %object
+	.size	__func__.10556, 13
+__func__.10556:
+	.string	"pm_free_sblk"
+	.section	.rodata.__func__.10576,"a",@progbits
+	.align	3
+	.set	.LANCHOR150,. + 0
+	.type	__func__.10576, %object
+	.size	__func__.10576, 6
+__func__.10576:
+	.string	"pm_gc"
+	.section	.rodata.__func__.10592,"a",@progbits
+	.align	3
+	.set	.LANCHOR92,. + 0
+	.type	__func__.10592, %object
+	.size	__func__.10592, 17
+__func__.10592:
+	.string	"pm_alloc_new_blk"
+	.section	.rodata.__func__.10602,"a",@progbits
+	.align	3
+	.set	.LANCHOR140,. + 0
+	.type	__func__.10602, %object
+	.size	__func__.10602, 14
+__func__.10602:
+	.string	"pm_write_page"
+	.section	.rodata.__func__.10620,"a",@progbits
+	.align	3
+	.set	.LANCHOR95,. + 0
+	.type	__func__.10620, %object
+	.size	__func__.10620, 21
+__func__.10620:
+	.string	"pm_select_ram_region"
+	.section	.rodata.__func__.8406,"a",@progbits
+	.align	3
+	.set	.LANCHOR114,. + 0
+	.type	__func__.8406, %object
+	.size	__func__.8406, 19
+__func__.8406:
+	.string	"flash_read_page_en"
+	.section	.rodata.__func__.8435,"a",@progbits
+	.align	3
+	.set	.LANCHOR128,. + 0
+	.type	__func__.8435, %object
+	.size	__func__.8435, 19
+__func__.8435:
+	.string	"flash_prog_page_en"
+	.section	.rodata.__func__.8450,"a",@progbits
+	.align	3
+	.set	.LANCHOR21,. + 0
+	.type	__func__.8450, %object
+	.size	__func__.8450, 26
+__func__.8450:
+	.string	"flash_erase_duplane_block"
+	.section	.rodata.__func__.8461,"a",@progbits
+	.align	3
+	.set	.LANCHOR24,. + 0
+	.type	__func__.8461, %object
+	.size	__func__.8461, 21
+__func__.8461:
+	.string	"flash_erase_block_en"
+	.section	.rodata.__func__.8475,"a",@progbits
+	.align	3
+	.set	.LANCHOR9,. + 0
+	.type	__func__.8475, %object
+	.size	__func__.8475, 28
+__func__.8475:
+	.string	"flash_wait_device_ready_raw"
+	.section	.rodata.__func__.8500,"a",@progbits
+	.align	3
+	.set	.LANCHOR124,. + 0
+	.type	__func__.8500, %object
+	.size	__func__.8500, 26
+__func__.8500:
+	.string	"flash_start_tlc_page_prog"
+	.section	.rodata.__func__.8513,"a",@progbits
+	.align	3
+	.set	.LANCHOR125,. + 0
+	.type	__func__.8513, %object
+	.size	__func__.8513, 22
+__func__.8513:
+	.string	"flash_start_page_prog"
+	.section	.rodata.__func__.8526,"a",@progbits
+	.align	3
+	.set	.LANCHOR33,. + 0
+	.type	__func__.8526, %object
+	.size	__func__.8526, 22
+__func__.8526:
+	.string	"flash_start_page_read"
+	.section	.rodata.__func__.8541,"a",@progbits
+	.align	3
+	.set	.LANCHOR120,. + 0
+	.type	__func__.8541, %object
+	.size	__func__.8541, 25
+__func__.8541:
+	.string	"flash_complete_page_read"
+	.section	.rodata.__func__.9099,"a",@progbits
+	.align	3
+	.set	.LANCHOR39,. + 0
+	.type	__func__.9099, %object
+	.size	__func__.9099, 13
+__func__.9099:
+	.string	"buf_add_tail"
+	.section	.rodata.__func__.9112,"a",@progbits
+	.align	3
+	.set	.LANCHOR40,. + 0
+	.type	__func__.9112, %object
+	.size	__func__.9112, 10
+__func__.9112:
+	.string	"buf_alloc"
+	.section	.rodata.__func__.9126,"a",@progbits
+	.align	3
+	.set	.LANCHOR41,. + 0
+	.type	__func__.9126, %object
+	.size	__func__.9126, 16
+__func__.9126:
+	.string	"buf_remove_free"
+	.section	.rodata.__func__.9234,"a",@progbits
+	.align	3
+	.set	.LANCHOR100,. + 0
+	.type	__func__.9234, %object
+	.size	__func__.9234, 17
+__func__.9234:
+	.string	"lpa_rebuild_hash"
+	.section	.rodata.__func__.9286,"a",@progbits
+	.align	3
+	.set	.LANCHOR167,. + 0
+	.type	__func__.9286, %object
+	.size	__func__.9286, 17
+__func__.9286:
+	.string	"ftl_write_commit"
+	.section	.rodata.__func__.9297,"a",@progbits
+	.align	3
+	.set	.LANCHOR44,. + 0
+	.type	__func__.9297, %object
+	.size	__func__.9297, 14
+__func__.9297:
+	.string	"ftl_write_buf"
+	.section	.rodata.__func__.9345,"a",@progbits
+	.align	3
+	.set	.LANCHOR152,. + 0
+	.type	__func__.9345, %object
+	.size	__func__.9345, 15
+__func__.9345:
+	.string	"ftl_read_ahead"
+	.section	.rodata.__func__.9353,"a",@progbits
+	.align	3
+	.set	.LANCHOR48,. + 0
+	.type	__func__.9353, %object
+	.size	__func__.9353, 13
+__func__.9353:
+	.string	"ftl_read_buf"
+	.section	.rodata.__func__.9391,"a",@progbits
+	.align	3
+	.set	.LANCHOR157,. + 0
+	.type	__func__.9391, %object
+	.size	__func__.9391, 9
+__func__.9391:
+	.string	"ftl_read"
+	.section	.rodata.__func__.9417,"a",@progbits
+	.align	3
+	.set	.LANCHOR169,. + 0
+	.type	__func__.9417, %object
+	.size	__func__.9417, 12
+__func__.9417:
+	.string	"ftl_discard"
+	.section	.rodata.__func__.9438,"a",@progbits
+	.align	3
+	.set	.LANCHOR158,. + 0
+	.type	__func__.9438, %object
+	.size	__func__.9438, 10
+__func__.9438:
+	.string	"vpn_check"
+	.section	.rodata.__func__.9463,"a",@progbits
+	.align	3
+	.set	.LANCHOR159,. + 0
+	.type	__func__.9463, %object
+	.size	__func__.9463, 15
+__func__.9463:
+	.string	"ftl_info_check"
+	.section	.rodata.__func__.9572,"a",@progbits
+	.align	3
+	.set	.LANCHOR55,. + 0
+	.type	__func__.9572, %object
+	.size	__func__.9572, 12
+__func__.9572:
+	.string	"gc_add_sblk"
+	.section	.rodata.__func__.9615,"a",@progbits
+	.align	3
+	.set	.LANCHOR122,. + 0
+	.type	__func__.9615, %object
+	.size	__func__.9615, 21
+__func__.9615:
+	.string	"gc_check_data_one_wl"
+	.section	.rodata.__func__.9649,"a",@progbits
+	.align	3
+	.set	.LANCHOR153,. + 0
+	.type	__func__.9649, %object
+	.size	__func__.9649, 22
+__func__.9649:
+	.string	"gc_update_l2p_map_new"
+	.section	.rodata.__func__.9662,"a",@progbits
+	.align	3
+	.set	.LANCHOR63,. + 0
+	.type	__func__.9662, %object
+	.size	__func__.9662, 19
+__func__.9662:
+	.string	"gc_write_completed"
+	.section	.rodata.__func__.9691,"a",@progbits
+	.align	3
+	.set	.LANCHOR170,. + 0
+	.type	__func__.9691, %object
+	.size	__func__.9691, 16
+__func__.9691:
+	.string	"gc_do_copy_back"
+	.section	.rodata.__func__.9713,"a",@progbits
+	.align	3
+	.set	.LANCHOR73,. + 0
+	.type	__func__.9713, %object
+	.size	__func__.9713, 16
+__func__.9713:
+	.string	"gc_free_src_blk"
+	.section	.rodata.__func__.9758,"a",@progbits
+	.align	3
+	.set	.LANCHOR160,. + 0
+	.type	__func__.9758, %object
+	.size	__func__.9758, 16
+__func__.9758:
+	.string	"gc_scan_src_blk"
+	.section	.rodata.__func__.9790,"a",@progbits
+	.align	3
+	.set	.LANCHOR156,. + 0
+	.type	__func__.9790, %object
+	.size	__func__.9790, 18
+__func__.9790:
+	.string	"gc_search_src_blk"
+	.section	.rodata.__func__.9806,"a",@progbits
+	.align	3
+	.set	.LANCHOR154,. + 0
+	.type	__func__.9806, %object
+	.size	__func__.9806, 20
+__func__.9806:
+	.string	"gc_scan_static_data"
+	.section	.rodata.__func__.9867,"a",@progbits
+	.align	3
+	.set	.LANCHOR172,. + 0
+	.type	__func__.9867, %object
+	.size	__func__.9867, 6
+__func__.9867:
+	.string	"do_gc"
+	.section	.rodata.__func__.9928,"a",@progbits
+	.align	3
+	.set	.LANCHOR132,. + 0
+	.type	__func__.9928, %object
+	.size	__func__.9928, 15
+__func__.9928:
+	.string	"ftl_info_flush"
+	.section	.rodata.__func__.9977,"a",@progbits
+	.align	3
+	.set	.LANCHOR72,. + 0
+	.type	__func__.9977, %object
+	.size	__func__.9977, 14
+__func__.9977:
+	.string	"ftl_free_sblk"
+	.section	.rodata.do_gc.str1.1,"aMS",@progbits,1
+.LC153:
+	.string	"gc %d: %d %d %d %d %d %d\n"
+.LC154:
+	.string	"GC_STATE_SCAN_ALL_PAGE = %x, vpn0 = %d, vpn1 = %d\n"
+.LC155:
+	.string	"gc free %x, %d\n"
+	.section	.rodata.dump_ftl_info.str1.1,"aMS",@progbits,1
+.LC81:
+	.string	"g_ftl_info_blk blk:0x%x, index:0x%x, page:0x%x\n"
+.LC82:
+	.string	"ftl_ext_info_blk blk:0x%x, page:0x%x\n"
+.LC83:
+	.string	"ac_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC84:
+	.string	"tmp_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC85:
+	.string	"gc_blk:0x%x, page:0x%x, index:0x%x, free:0x%x, page_index:0x%x\n"
+.LC86:
+	.string	"lpa:"
+.LC87:
+	.string	"vpn:"
+.LC88:
+	.string	"sblk:"
+.LC89:
+	.string	"lpa_hash:"
+.LC90:
+	.string	"lpa_hash_index:"
+	.section	.rodata.dump_sblk_queue.str1.1,"aMS",@progbits,1
+.LC24:
+	.string	"dump_sblk_queue: %d\n"
+.LC25:
+	.string	"buf id= %d state = %d ppa = %x\n"
+	.section	.rodata.flash_complete_page_read.str1.1,"aMS",@progbits,1
+.LC54:
+	.string	"flash_complete_page_read %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_ddr_tunning_read.str1.1,"aMS",@progbits,1
+.LC48:
+	.string	"%d flash_ddr_tunning_read %x ecc=%d\n"
+.LC49:
+	.string	"sync para %d\n"
+.LC50:
+	.string	"DDR mode Read error %x %x\n"
+	.section	.rodata.flash_erase_all.str1.1,"aMS",@progbits,1
+.LC5:
+	.string	"erase done: %x\n"
+	.section	.rodata.flash_erase_block_en.str1.1,"aMS",@progbits,1
+.LC3:
+	.string	"flash_erase_block %x %x\n"
+.LC4:
+	.string	"flash_erase_block block = %x status = %x\n"
+	.section	.rodata.flash_erase_duplane_block.str1.1,"aMS",@progbits,1
+.LC1:
+	.string	"flash_erase_duplane_block %x %x %x\n"
+.LC2:
+	.string	"flash_erase_duplane_block pageadd = %x status = %x\n"
+	.section	.rodata.flash_info_blk_init.str1.1,"aMS",@progbits,1
+.LC53:
+	.string	"no sys info %x\n"
+	.section	.rodata.flash_info_flush.str1.1,"aMS",@progbits,1
+.LC77:
+	.string	"finfo:"
+.LC78:
+	.string	"flash_info_flush id = %x, page = %x\n"
+.LC79:
+	.string	"sys_info_flush error:%x\n"
+	.section	.rodata.flash_mask_bad_block.str1.1,"aMS",@progbits,1
+.LC6:
+	.string	"flash_mask_bad_block %d %d\n"
+	.section	.rodata.flash_prog_page.str1.1,"aMS",@progbits,1
+.LC57:
+	.string	"flash_prog_page %x %x %x\n"
+	.section	.rodata.flash_prog_page_en.str1.1,"aMS",@progbits,1
+.LC59:
+	.string	"flash_prog_page_en:%x %x\n"
+.LC60:
+	.string	"spare"
+.LC61:
+	.string	"data"
+.LC62:
+	.string	"write error: %x\n"
+	.section	.rodata.flash_read_page.str1.1,"aMS",@progbits,1
+.LC41:
+	.string	"flash_read_page %x %x %x\n"
+	.section	.rodata.flash_read_page_en.str1.1,"aMS",@progbits,1
+.LC51:
+	.string	"flash_read_page_en %x %x\n"
+.LC52:
+	.string	"flash_read_page_en %x %x error_ecc %d %d\n"
+	.section	.rodata.flash_wait_device_ready_raw.str1.1,"aMS",@progbits,1
+.LC0:
+	.string	"\n!!!!! error @ func:%s - line:%d\n"
+	.section	.rodata.ftl_alloc_sblk.str1.1,"aMS",@progbits,1
+.LC14:
+	.string	"ftl_alloc_sblk %x, %d %d %d\n"
+	.section	.rodata.ftl_discard.str1.1,"aMS",@progbits,1
+.LC148:
+	.string	"ftl_discard:(%x, %x, %x, %x)\n"
+	.section	.rodata.ftl_info_blk_init.str1.1,"aMS",@progbits,1
+.LC65:
+	.string	"%d %x @%d %x\n"
+.LC66:
+	.string	"ftl_info_blk_init %d %d %x\n"
+	.section	.rodata.ftl_info_check.str1.1,"aMS",@progbits,1
+.LC122:
+	.string	"free blk vpn error: %x %x\n"
+.LC123:
+	.string	"data blk: %d %d %d\n"
+.LC124:
+	.string	"free blk: %d %d %d\n"
+	.section	.rodata.ftl_info_flush.str1.1,"aMS",@progbits,1
+.LC64:
+	.string	"g_ftl_info_blk blk = %x, page = %x version = %d\n"
+	.section	.rodata.ftl_init.str1.1,"aMS",@progbits,1
+.LC139:
+	.string	"FTL version: 6.0.3 20180211"
+.LC140:
+	.string	"gp_ftl_ext_info %p %p %p\n"
+.LC141:
+	.string	"flash info size: %d %d %d\n"
+	.section	.rodata.ftl_low_format.str1.1,"aMS",@progbits,1
+.LC67:
+	.string	"low format %d %d %d %d\n"
+	.section	.rodata.ftl_mask_bad_block.str1.1,"aMS",@progbits,1
+.LC19:
+	.string	"mask bad block:cs %x block: %x\n"
+	.section	.rodata.ftl_open_sblk_recovery.str1.1,"aMS",@progbits,1
+.LC69:
+	.string	"saved_active_page  = %x\n"
+.LC70:
+	.string	"saved_active_plane = %x\n"
+.LC71:
+	.string	"sblk = %x\n"
+.LC72:
+	.string	"phy_blk = %x %x\n"
+.LC73:
+	.string	"blk= %x, page=%x, ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC74:
+	.string	"sblk = %x, vpn0 = %d, vpn1 = %d\n"
+.LC75:
+	.string	"dump write = %x\n"
+	.section	.rodata.ftl_re_low_format_test.str1.1,"aMS",@progbits,1
+.LC68:
+	.string	"re low formaet %d\n"
+	.section	.rodata.ftl_read.str1.1,"aMS",@progbits,1
+.LC114:
+	.string	"ftl_read refresh =%x, lpa = %x, ppa= %x\n"
+	.section	.rodata.ftl_read_ahead.str1.1,"aMS",@progbits,1
+.LC100:
+	.string	"ftl_read_ahead refresh =%x, lpa = %x, ppa= %x\n"
+.LC101:
+	.string	"id=%d, lpa = %x, ppa = %x spare = %x %x %x %x\n"
+	.section	.rodata.ftl_sblk_dump.str1.1,"aMS",@progbits,1
+.LC107:
+	.string	"ftl_sblk_dump = %x %x %x %x\n"
+.LC108:
+	.string	"page_addr = %x, lpa=%x vpn = %d\n"
+.LC109:
+	.string	"index= %x, lpa=%x\n"
+.LC110:
+	.string	"block = %x, vpn=%x check vpn = %d\n"
+	.section	.rodata.ftl_scan_all_data.str1.1,"aMS",@progbits,1
+.LC127:
+	.string	"ftl_scan_all_data = %x\n"
+.LC128:
+	.string	"scan lpa = %x ppa= %x\n"
+.LC129:
+	.string	"lba = %x,addr= %x, ststus = %x, spare= %x %x %x %x data=%x %x\n"
+.LC130:
+	.string	"lba = %x, id= %x, index = %x hash ppa = %x\n"
+.LC131:
+	.string	"0pm:"
+.LC132:
+	.string	"1pm:"
+	.section	.rodata.ftl_sysblk_dump.str1.1,"aMS",@progbits,1
+.LC80:
+	.string	"l2p:"
+	.section	.rodata.ftl_test_block.str1.1,"aMS",@progbits,1
+.LC63:
+	.string	"low format %d\n"
+	.section	.rodata.ftl_update_l2p_map.str1.1,"aMS",@progbits,1
+.LC143:
+	.string	"ftl_update_l2p_map: %x %x %x\n"
+.LC144:
+	.string	"ftl_update_l2p_map"
+.LC145:
+	.string	"lpa_tbl:"
+.LC146:
+	.string	"sblk %x vpn: %d %d\n"
+	.section	.rodata.ftl_vpn_decrement.str1.1,"aMS",@progbits,1
+.LC17:
+	.string	"ftl_vpn_decrement %x = %d\n"
+	.section	.rodata.ftl_write_commit.str1.1,"aMS",@progbits,1
+.LC147:
+	.string	"%d read error: ppa:%x, lpa:%x, status:%x\n"
+	.section	.rodata.ftl_write_completed.str1.1,"aMS",@progbits,1
+.LC18:
+	.string	"ftl prog error =%x, lpa = %x, ppa= %x\n"
+	.section	.rodata.gc_add_sblk.str1.1,"aMS",@progbits,1
+.LC7:
+	.string	"gc_add_sblk = %d, %d, %d, %d, %d, %d\n"
+	.section	.rodata.gc_check_data_one_wl.str1.1,"aMS",@progbits,1
+.LC56:
+	.string	"1ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+	.section	.rodata.gc_do_copy_back.str1.1,"aMS",@progbits,1
+.LC149:
+	.string	"gc page in buf: lpa %x ppa = %x pageindex= %x\n"
+.LC150:
+	.string	"gc_do_copy_back: lpa %x des_ppa = %x %x gc_ppa= %x page_index= %d\n"
+.LC151:
+	.string	"gc_do_copy_back: %x %x %x %x gc_ppa:%x %x\n"
+.LC152:
+	.string	"%d prog_step: %x %x buf id= %x ppa = %x hash=%x id = %x plane = %x lpa=%x\n"
+	.section	.rodata.gc_free_src_blk.str1.1,"aMS",@progbits,1
+.LC15:
+	.string	"gc_free_src_blk = %x, vpn = %d\n"
+.LC16:
+	.string	"gc_free_src_blk %x, %d\n"
+	.section	.rodata.gc_free_temp_buf.str1.1,"aMS",@progbits,1
+.LC10:
+	.string	"%d gc_free_temp_buf buf id= %x\n"
+	.section	.rodata.gc_recovery.str1.1,"aMS",@progbits,1
+.LC133:
+	.string	"ppa = %x, status = %x, data:%x %x %x %x, spare: %x %x %x %x\n"
+.LC134:
+	.string	"gc_lpa:"
+.LC135:
+	.string	"gc_ppa:"
+.LC136:
+	.string	"ppa = %x, status = %x, %x %x spare: %x %x %x %x\n"
+.LC137:
+	.string	"gc_recovery"
+.LC138:
+	.string	"gc_recovery: %x vpn = %x\n"
+	.section	.rodata.gc_scan_src_blk.str1.1,"aMS",@progbits,1
+.LC125:
+	.string	"gc_scan_src_blk = %x, vpn = %d\n"
+.LC126:
+	.string	"gc_scan_src_blk = %x, s vpn0 = %d, c vpn1 = %d\n"
+	.section	.rodata.gc_search_src_blk.str1.1,"aMS",@progbits,1
+.LC111:
+	.string	"gc_search_src_blk = %d, %d, %d\n"
+.LC112:
+	.string	"vpn gc = %d, id = %d\n"
+.LC113:
+	.string	"gc_search_src_blk count= %d\n"
+	.section	.rodata.gc_static_wearleveling.str1.1,"aMS",@progbits,1
+.LC11:
+	.string	"gc_static_wearleveling: slc blk: %d, tlc blk: %d avg slc ec: %d, avg tlc ec: %d \n"
+.LC12:
+	.string	"gc_static_wearleveling: min slc ec: %d, min tlc ec: %d max slc ec: %d, max tlc ec: %d \n"
+	.section	.rodata.gc_update_l2p_map_new.str1.1,"aMS",@progbits,1
+.LC102:
+	.string	"gc_update_l2p_map_new sblk %x\n"
+.LC103:
+	.string	"gc_update_l2p_map_new: %x %x %x\n"
+.LC104:
+	.string	"0lpa: %x %x %x\n"
+.LC105:
+	.string	"lpa: %x %x %x\n"
+.LC106:
+	.string	"gc_update_l2p_map_new: %x vpn = %x vpn1 = %x done\n"
+	.section	.rodata.gc_write_completed.str1.1,"aMS",@progbits,1
+.LC8:
+	.string	"status: %x, ppa: %x\n"
+.LC9:
+	.string	"gc_write_completed: %x  %x  %x %x\n"
+	.section	.rodata.hynix_get_read_retry_default.str1.1,"aMS",@progbits,1
+.LC33:
+	.string	"otp error! %d"
+.LC34:
+	.string	"rr"
+	.section	.rodata.hynix_read_retrial.str1.1,"aMS",@progbits,1
+.LC47:
+	.string	"hynix RR %d row=%x, count %d, status=%d\n"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",@progbits,1
+.LC92:
+	.string	"region_id = %d, pm_max_region = %d\n"
+.LC93:
+	.string	"load_l2p_region = %x,%x,%x, %x\n"
+.LC94:
+	.string	"pm_ppa:"
+.LC95:
+	.string	"data:"
+.LC96:
+	.string	"spare:"
+	.section	.rodata.lpa_rebuild_hash.str1.1,"aMS",@progbits,1
+.LC28:
+	.string	"%s %d %d\n"
+	.section	.rodata.micron_read_retrial.str1.1,"aMS",@progbits,1
+.LC42:
+	.string	"micron %d row=%x,count %d,status=%d\n"
+.LC43:
+	.string	"micron RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.nandc_xfer.str1.1,"aMS",@progbits,1
+.LC39:
+	.string	"dqs data abort %x\n"
+.LC40:
+	.string	"xfer error %x\n"
+	.section	.rodata.nandc_xfer_done.str1.1,"aMS",@progbits,1
+.LC35:
+	.string	"%d mtrans_cnt = %d page_num = %d\n"
+.LC36:
+	.string	"nandc:"
+.LC37:
+	.string	"%d flReg.d32=%x %x\n"
+.LC38:
+	.string	"nandc_xfer_done read error %x\n"
+	.section	.rodata.pm_alloc_new_blk.str1.1,"aMS",@progbits,1
+.LC26:
+	.string	"blk %x is bad block\n"
+.LC27:
+	.string	"pm_alloc_new_blk: %x %x %x %x\n"
+	.section	.rodata.pm_init.str1.1,"aMS",@progbits,1
+.LC97:
+	.string	"pm_init posr %x %x %x\n"
+.LC98:
+	.string	"pm_init recovery %x %x %x\n"
+	.section	.rodata.pm_log2phys.str1.1,"aMS",@progbits,1
+.LC99:
+	.string	"pm_log2phys  lpn = %d, max lpn = %d\n"
+	.section	.rodata.pm_ppa_update_check.str1.1,"aMS",@progbits,1
+.LC91:
+	.string	"%s w error lpn = %x, max ppa = %d\n"
+	.section	.rodata.pm_write_page.str1.1,"aMS",@progbits,1
+.LC76:
+	.string	"pm_write_page write error: %x\n"
+	.section	.rodata.print_ftl_debug_info.str1.1,"aMS",@progbits,1
+.LC20:
+	.string	"free blk: s:%x,t:%x,m:%x, data blk:s:%x,%x,t%x vpn: s:%x t:%x\n"
+.LC21:
+	.string	"totle w: %d MB,r: %d MB %d dv:0x%X,poc:%d\n"
+.LC22:
+	.string	"gc xlc page: %d,gc slc page: %d, tmp w: %d MB\n"
+.LC23:
+	.string	"slc ec: %d,%d,%d,%d,%d,tlc ec: %d,%d,%d,%d,%d\n"
+	.section	.rodata.print_gc_debug_info.str1.1,"aMS",@progbits,1
+.LC13:
+	.string	"gc: b:%x,p:%x,i:%x; free buf=%d %d\n"
+	.section	.rodata.queue_wait_first_req_completed.str1.1,"aMS",@progbits,1
+.LC55:
+	.string	"set buf %d,status = %x, ppa = %x lun state = %d\n"
+	.section	.rodata.random_seed,"a",@progbits
+	.align	3
+	.set	.LANCHOR32,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.hword	22378
+	.hword	1512
+	.hword	25245
+	.hword	17827
+	.hword	25756
+	.hword	19440
+	.hword	9026
+	.hword	10030
+	.hword	29528
+	.hword	20467
+	.hword	29676
+	.hword	24432
+	.hword	31328
+	.hword	6872
+	.hword	13426
+	.hword	13842
+	.hword	8783
+	.hword	1108
+	.hword	782
+	.hword	28837
+	.hword	30729
+	.hword	9505
+	.hword	18676
+	.hword	23085
+	.hword	18730
+	.hword	1085
+	.hword	32609
+	.hword	14697
+	.hword	20858
+	.hword	15170
+	.hword	30365
+	.hword	1607
+	.hword	32298
+	.hword	4995
+	.hword	18905
+	.hword	1976
+	.hword	9592
+	.hword	20204
+	.hword	17443
+	.hword	13615
+	.hword	23330
+	.hword	29369
+	.hword	13947
+	.hword	9398
+	.hword	32398
+	.hword	8984
+	.hword	27600
+	.hword	21785
+	.hword	6019
+	.hword	6311
+	.hword	31598
+	.hword	30210
+	.hword	19327
+	.hword	13896
+	.hword	11347
+	.hword	27545
+	.hword	3107
+	.hword	26575
+	.hword	32270
+	.hword	19852
+	.hword	20601
+	.hword	8349
+	.hword	9290
+	.hword	29819
+	.hword	13579
+	.hword	3661
+	.hword	28676
+	.hword	27331
+	.hword	32574
+	.hword	8693
+	.hword	31253
+	.hword	9081
+	.hword	5399
+	.hword	6842
+	.hword	20087
+	.hword	5537
+	.hword	1274
+	.hword	11617
+	.hword	9530
+	.hword	4866
+	.hword	8035
+	.hword	23219
+	.hword	1178
+	.hword	23272
+	.hword	7383
+	.hword	18944
+	.hword	12488
+	.hword	12871
+	.hword	29340
+	.hword	20532
+	.hword	11022
+	.hword	22514
+	.hword	228
+	.hword	22363
+	.hword	24978
+	.hword	14584
+	.hword	12138
+	.hword	3092
+	.hword	17916
+	.hword	16863
+	.hword	14554
+	.hword	31457
+	.hword	29474
+	.hword	25311
+	.hword	24121
+	.hword	3684
+	.hword	28037
+	.hword	22865
+	.hword	22839
+	.hword	25217
+	.hword	13217
+	.hword	27186
+	.hword	14938
+	.hword	11180
+	.hword	29754
+	.hword	24180
+	.hword	15150
+	.hword	32455
+	.hword	20434
+	.hword	23848
+	.hword	29983
+	.hword	16120
+	.hword	14769
+	.hword	20041
+	.hword	29803
+	.hword	28406
+	.hword	17598
+	.hword	28087
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",@progbits,1
+.LC142:
+	.string	"ftl_init %x\n"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",@progbits,1
+.LC29:
+	.string	"%s 0x%x:"
+.LC30:
+	.string	"%x "
+.LC31:
+	.string	""
+.LC32:
+	.string	"%s\n"
+	.section	.rodata.sblk_prog_page.str1.1,"aMS",@progbits,1
+.LC58:
+	.string	"sblk_prog_page ppa = %x, count = %d\n"
+	.section	.rodata.toshiba_15ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR0,. + 0
+	.type	toshiba_15ref_value, %object
+	.size	toshiba_15ref_value, 95
+toshiba_15ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.rodata.toshiba_3D_slc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR16,. + 0
+	.type	toshiba_3D_slc_value, %object
+	.size	toshiba_3D_slc_value, 11
+toshiba_3D_slc_value:
+	.byte	-117
+	.byte	0
+	.byte	-8
+	.byte	8
+	.byte	-16
+	.byte	-24
+	.byte	24
+	.byte	-40
+	.byte	40
+	.byte	-56
+	.byte	56
+	.section	.rodata.toshiba_3D_tlc_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR15,. + 0
+	.type	toshiba_3D_tlc_value, %object
+	.size	toshiba_3D_tlc_value, 399
+toshiba_3D_tlc_value:
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-119
+	.byte	-118
+	.byte	-118
+	.byte	-118
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	-9
+	.byte	-12
+	.byte	-9
+	.byte	-7
+	.byte	-13
+	.byte	-12
+	.byte	-7
+	.byte	5
+	.byte	-2
+	.byte	-1
+	.byte	0
+	.byte	-3
+	.byte	-2
+	.byte	6
+	.byte	-6
+	.byte	-15
+	.byte	-15
+	.byte	-2
+	.byte	-12
+	.byte	-16
+	.byte	-6
+	.byte	-2
+	.byte	-19
+	.byte	-19
+	.byte	-6
+	.byte	-4
+	.byte	-12
+	.byte	-14
+	.byte	-2
+	.byte	-11
+	.byte	-23
+	.byte	-34
+	.byte	-4
+	.byte	-20
+	.byte	-22
+	.byte	-2
+	.byte	-7
+	.byte	-31
+	.byte	-30
+	.byte	-12
+	.byte	-20
+	.byte	-18
+	.byte	2
+	.byte	-15
+	.byte	-19
+	.byte	-36
+	.byte	-12
+	.byte	-28
+	.byte	-34
+	.byte	-6
+	.byte	-15
+	.byte	-11
+	.byte	2
+	.byte	-12
+	.byte	-8
+	.byte	-2
+	.byte	2
+	.byte	-3
+	.byte	-7
+	.byte	-10
+	.byte	-4
+	.byte	-8
+	.byte	-6
+	.byte	-6
+	.byte	-11
+	.byte	-27
+	.byte	-38
+	.byte	-16
+	.byte	-12
+	.byte	-2
+	.byte	2
+	.byte	-7
+	.byte	-31
+	.byte	-22
+	.byte	-4
+	.byte	-16
+	.byte	-22
+	.byte	-7
+	.byte	-31
+	.byte	-23
+	.byte	-22
+	.byte	-28
+	.byte	-28
+	.byte	-26
+	.byte	2
+	.byte	-7
+	.byte	-11
+	.byte	-14
+	.byte	-8
+	.byte	-12
+	.byte	-10
+	.byte	-10
+	.byte	-27
+	.byte	-25
+	.byte	-22
+	.byte	-20
+	.byte	-28
+	.byte	-22
+	.byte	-7
+	.byte	-23
+	.byte	-29
+	.byte	-34
+	.byte	-24
+	.byte	-32
+	.byte	-22
+	.byte	-10
+	.byte	-11
+	.byte	-29
+	.byte	-18
+	.byte	-12
+	.byte	-24
+	.byte	-22
+	.byte	6
+	.byte	1
+	.byte	-3
+	.byte	-6
+	.byte	0
+	.byte	-4
+	.byte	-2
+	.byte	10
+	.byte	-3
+	.byte	-7
+	.byte	-6
+	.byte	4
+	.byte	-4
+	.byte	-2
+	.byte	-10
+	.byte	-23
+	.byte	-39
+	.byte	-22
+	.byte	-19
+	.byte	-24
+	.byte	-18
+	.byte	-14
+	.byte	-23
+	.byte	-29
+	.byte	-30
+	.byte	-15
+	.byte	-30
+	.byte	-30
+	.byte	-7
+	.byte	-27
+	.byte	-35
+	.byte	-26
+	.byte	-15
+	.byte	-24
+	.byte	-26
+	.byte	6
+	.byte	-11
+	.byte	5
+	.byte	-2
+	.byte	-16
+	.byte	-16
+	.byte	-2
+	.byte	-2
+	.byte	-15
+	.byte	-15
+	.byte	-20
+	.byte	-8
+	.byte	-16
+	.byte	-18
+	.byte	6
+	.byte	5
+	.byte	-15
+	.byte	-2
+	.byte	-24
+	.byte	-28
+	.byte	-22
+	.byte	10
+	.byte	-15
+	.byte	-3
+	.byte	-30
+	.byte	-8
+	.byte	-24
+	.byte	-30
+	.byte	-10
+	.byte	-27
+	.byte	-19
+	.byte	-30
+	.byte	-12
+	.byte	-16
+	.byte	-10
+	.byte	14
+	.byte	-19
+	.byte	-3
+	.byte	-30
+	.byte	4
+	.byte	4
+	.byte	6
+	.byte	2
+	.byte	1
+	.byte	-3
+	.byte	-10
+	.byte	-8
+	.byte	-4
+	.byte	-6
+	.byte	-2
+	.byte	-15
+	.byte	-11
+	.byte	-26
+	.byte	-8
+	.byte	-20
+	.byte	-30
+	.byte	6
+	.byte	-19
+	.byte	-3
+	.byte	-46
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	6
+	.byte	9
+	.byte	5
+	.byte	2
+	.byte	4
+	.byte	8
+	.byte	6
+	.byte	8
+	.byte	9
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	8
+	.byte	6
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.byte	-12
+	.byte	-14
+	.byte	-20
+	.byte	-18
+	.byte	-16
+	.byte	-16
+	.byte	-14
+	.byte	-12
+	.byte	-10
+	.byte	-21
+	.byte	-14
+	.byte	-12
+	.byte	-12
+	.byte	-10
+	.byte	-12
+	.byte	-18
+	.byte	-22
+	.byte	-24
+	.byte	-18
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-14
+	.byte	-23
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-20
+	.byte	-12
+	.byte	-24
+	.byte	-24
+	.byte	-30
+	.byte	-24
+	.byte	-28
+	.byte	-28
+	.byte	-12
+	.byte	-26
+	.byte	-25
+	.byte	-34
+	.byte	-24
+	.byte	-24
+	.byte	-24
+	.byte	-12
+	.byte	-13
+	.byte	-26
+	.byte	-20
+	.byte	-14
+	.byte	-18
+	.byte	-18
+	.byte	-12
+	.byte	-15
+	.byte	-27
+	.byte	-22
+	.byte	-20
+	.byte	-24
+	.byte	-22
+	.byte	-12
+	.byte	-21
+	.byte	-28
+	.byte	-28
+	.byte	-24
+	.byte	-26
+	.byte	-24
+	.byte	20
+	.byte	16
+	.byte	6
+	.byte	10
+	.byte	16
+	.byte	12
+	.byte	12
+	.byte	16
+	.byte	16
+	.byte	8
+	.byte	8
+	.byte	12
+	.byte	12
+	.byte	12
+	.byte	18
+	.byte	18
+	.byte	10
+	.byte	8
+	.byte	14
+	.byte	14
+	.byte	14
+	.byte	16
+	.byte	14
+	.byte	6
+	.byte	6
+	.byte	12
+	.byte	14
+	.byte	8
+	.byte	20
+	.byte	18
+	.byte	8
+	.byte	6
+	.byte	14
+	.byte	14
+	.byte	10
+	.byte	20
+	.byte	20
+	.byte	6
+	.byte	10
+	.byte	10
+	.byte	12
+	.byte	12
+	.byte	10
+	.byte	13
+	.byte	5
+	.byte	2
+	.byte	14
+	.byte	8
+	.byte	6
+	.byte	6
+	.byte	13
+	.byte	9
+	.byte	4
+	.byte	14
+	.byte	10
+	.byte	10
+	.byte	10
+	.byte	13
+	.byte	9
+	.byte	6
+	.byte	8
+	.byte	12
+	.byte	10
+	.byte	2
+	.byte	5
+	.byte	1
+	.byte	-2
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	12
+	.byte	1
+	.byte	13
+	.byte	2
+	.byte	12
+	.byte	12
+	.byte	14
+	.section	.rodata.toshiba_3d_read_retrial.str1.1,"aMS",@progbits,1
+.LC44:
+	.string	"toshiba SRR %d row=%x, status=%d\n"
+.LC45:
+	.string	"toshiba TRR %d row=%x, status=%d\n"
+.LC46:
+	.string	"toshiba RR %d row=%x,count %d,status=%d\n"
+	.section	.rodata.toshiba_A19ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR1,. + 0
+	.type	toshiba_A19ref_value, %object
+	.size	toshiba_A19ref_value, 45
+toshiba_A19ref_value:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.rodata.toshiba_ref_value,"a",@progbits
+	.align	3
+	.set	.LANCHOR3,. + 0
+	.type	toshiba_ref_value, %object
+	.size	toshiba_ref_value, 8
+toshiba_ref_value:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.rodata.vpn_check.str1.1,"aMS",@progbits,1
+.LC115:
+	.string	"acblk = %x, tempblk = %x, gc_des = %x\n"
+.LC116:
+	.string	"acblk = %x, free page = %x, vpn = %x %x\n"
+.LC117:
+	.string	"tmp_blk = %x, free page = %x, vpn = %x %x\n"
+.LC118:
+	.string	"vpn_check lpa = %x, ppa = %x, blk = %x\n"
+.LC119:
+	.string	"l2p"
+.LC120:
+	.string	"vpn_check %x = c %x  s %x function: %x\n"
+.LC121:
+	.string	"vpn_check blk = %x fix vpc\n"
+	.hidden	free

commit fe23c529d1c7de4a88edb5b41300b0b0e30c69f5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 9 17:22:00 2018 +0800

    configs: evb-rk3126: enable adc and pmic keys
    
    Change-Id: I46e2a21d4afa3f07e50e78dbeb22d8758ce066ab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 8cb856bc1d..9f55b4c675 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -81,3 +81,5 @@ CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_TEST_ROCKCHIP=y
+CONFIG_ADC_KEY=y
+CONFIG_RK8XX_PWRKEY=y

commit e87597928cd5aa636a1a4cda66fbe8da41ff872d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 18:00:19 2018 +0800

    image-fdt: print reserved-memory node name
    
    Change-Id: Ib7d4d7d4ae8355877b45eccc93deb03298f1e138
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index d64763eb86..9f87829f24 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -111,7 +111,8 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 							      &rsv_size, false);
 		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_size)
 			continue;
-		printf("  'reserved-memory' region: addr=%llx size=%llx\n",
+		printf("  'reserved-memory' %s: addr=%llx size=%llx\n",
+			fdt_get_name(fdt_blob, offset, NULL),
 			(unsigned long long)rsv_addr, (unsigned long long)rsv_size);
 		lmb_reserve(lmb, rsv_addr, rsv_size);
 	}

commit 1cd698aefc59b10c9d15dae44afda5a9f35b344a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 17:46:26 2018 +0800

    armv8: sleep.S: move data to data section
    
    Change-Id: Ib70cd8afb937882de9a067f3424fc4b6a399a22e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/sleep.S b/arch/arm/cpu/armv8/sleep.S
index 74ddbeda3e..a0232739d2 100644
--- a/arch/arm/cpu/armv8/sleep.S
+++ b/arch/arm/cpu/armv8/sleep.S
@@ -189,6 +189,7 @@ ENTRY(cpu_do_resume)
 	b	suspend_return
 ENDPROC(cpu_do_resume)
 
-.align 8
+.data
+.align 3
 _suspend_gd:
-	.long	0x0
+	.long	0x0
\ No newline at end of file

commit 26e9b49cf8b24a80c43be906d18eed8be27886e3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 16:26:24 2018 +0800

    ARMv8: Makefile: apply -nosimd
    
    If not apply -nosimd, gcc would compile with SMID structure which
    enables float register usage. During U-Boot charge, cpu will system
    suspend to ATF for low power, and cpu maybe lose power. But float
    register are not saved and restore, so we don't wan't to enable them.
    
    Change-Id: I17e89794712a5976d9c1f6461a9da03e57f00f9f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0e0ae77822..65a493d580 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -18,7 +18,7 @@ arch-$(CONFIG_CPU_ARM1136)	=-march=armv5
 arch-$(CONFIG_CPU_ARM1176)	=-march=armv5t
 arch-$(CONFIG_CPU_V7)		=$(call cc-option, -march=armv7-a, \
 				 $(call cc-option, -march=armv7, -march=armv5))
-arch-$(CONFIG_ARM64)		=-march=armv8-a
+arch-$(CONFIG_ARM64)		=-march=armv8-a+nosimd
 
 # On Tegra systems we must build SPL for the armv4 core on the device
 # but otherwise we can use the value in CONFIG_SYS_ARM_ARCH

commit 07de173ac272fb3e70e9a7c1c1a0a2776e7dc7c8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 10 09:43:05 2018 +0800

    make.sh: add subcomand "map" and ".config"
    
    Example:
            ./make.sh evb-px30 map          ---- edit System.map
            ./make.sh evb-px30 .config      ---- edit .config
    
    Change-Id: Iba731a07a4da9cd56c2099237620358dc4967315
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index d08025be87..0779c4e9c2 100755
--- a/make.sh
+++ b/make.sh
@@ -100,7 +100,7 @@ sub_commands()
 	if [ "$SUBCMD" = 'clean' -o "$SUBCMD" = 'distclean' -o "$SUBCMD" = 'mrproper' ]; then
 		make $SUBCMD O=${DSTDIR}/out
 		exit 0
-	elif [ ${elf} = 'elf' ]; then
+	elif [ "$elf" = 'elf' ]; then
 		if [ ! -f ${DSTDIR}/out/u-boot ]; then
 			echo "Can't find elf file: ${DSTDIR}/out/u-boot"
 			exit 1
@@ -113,6 +113,22 @@ sub_commands()
 			${TOOLCHAIN_OBJDUMP} -${opt} ${DSTDIR}/out/u-boot | less
 			exit 0
 		fi
+	elif [ "$SUBCMD" = 'map' ]; then
+		if [ ! -f ${DSTDIR}/out/System.map ]; then
+			echo "Can't find map file: ${DSTDIR}/out/System.map"
+			exit 1
+		else
+			vim ${DSTDIR}/out/System.map
+			exit 0
+		fi
+	elif [ "$SUBCMD" = '.config' ]; then
+		if [ ! -f ${DSTDIR}/out/.config ]; then
+			echo "Can't find .config file: ${DSTDIR}/out/.config"
+			exit 1
+		else
+			vim ${DSTDIR}/out/.config
+			exit 0
+		fi
 	fi
 }
 

commit d8540eac213b7101de3570c0b99a2d28e687472c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 9 16:25:03 2018 +0800

    make.sh: update gcc toolchain to version 6.3.1
    
    32-bit: gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf
    64-bit: gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu
    
    Change-Id: Iafe288a640ed61362fda4845ca169b677c6b7e35
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 9324abe09f..d08025be87 100755
--- a/make.sh
+++ b/make.sh
@@ -17,13 +17,13 @@ RKBIN_TOOLS=../rkbin/tools
 TOOLCHAIN_GCC=./
 TOOLCHAIN_OBJDUMP=./
 # GCC toolchain
-GCC_ARM32=arm-linux-androideabi-
-GCC_ARM64=aarch64-linux-android-
-TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
-TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+GCC_ARM32=arm-linux-gnueabihf-
+GCC_ARM64=aarch64-linux-gnu-
+TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/gcc-linaro-6.3.1-2017.05-x86_64_arm-linux-gnueabihf/bin
+TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin
 # OBJDMP
-OBJ_ARM32=arm-linux-androideabi-objdump
-OBJ_ARM64=aarch64-linux-android-objdump
+OBJ_ARM32=arm-linux-gnueabihf-objdump
+OBJ_ARM64=aarch64-linux-gnu-objdump
 
 prepare()
 {

commit 0291804aa731f13afa5d74caa30ffaeccc3b181c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 9 17:03:16 2018 +0800

    bootm-fdt: fix compile warning
    
    Change-Id: Idc1af16d966d19921cf19c233bab0cd35337e8ae
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index d6bb3031d7..39c0c8d566 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -42,10 +42,10 @@ int arch_fixup_fdt(void *blob)
 	u64 size[CONFIG_NR_DRAM_BANKS];
 
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
-		if (size[bank] == 0)
-			continue;
 		start[bank] = bd->bi_dram[bank].start;
 		size[bank] = bd->bi_dram[bank].size;
+		if (size[bank] == 0)
+			continue;
 		printf("Adding bank: start=0x%08lx, size=0x%08lx\n",
 		       gd->bd->bi_dram[bank].start, gd->bd->bi_dram[bank].size);
 

commit 9af1ce3cfadb95a1396c0d7205ba2d6a1e5cfea7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 11:21:38 2018 +0800

    rockchip: dts: px30: enable nandc in pre-reloc
    
    Change-Id: I78224188bc2a54a5a0fc11d2c002f4600e6a8d9c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index be9e5e23d2..bcd74f8240 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -11,6 +11,11 @@
 	status = "okay";
 };
 
+&nandc0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 };

commit 5e5c11fefa1a470efc05c24ae53775d63a35cb56
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sun Feb 11 10:48:32 2018 +0800

    rockchip: px30: defconfig: clean config with make savedefconfig
    
    Change-Id: Id032b304c4b071c10c841a9b4af4244bd3c2dafe
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 117ae87e64..5e33d6f9be 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -1,81 +1,58 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_RKIMG_BOOTLOADER=y
-CONFIG_CMD_BOOT_ROCKCHIP=y
-CONFIG_RKPARM_PARTITION=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ROCKCHIP_PX30=y
-CONFIG_TARGET_EVB_PX30=y
-CONFIG_TPL_SERIAL_PRESENT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_TARGET_EVB_PX30=y
 CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
-CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=5
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_TPL=y
-CONFIG_TPL_BOOTROM_SUPPORT=y
-CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SERIAL_PRESENT=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_TPL_OF_PLATDATA=y
-CONFIG_TPL_DM=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
-CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_ADC_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_SPL_RAM=y
-CONFIG_TPL_RAM=y
-CONFIG_BOOTDELAY=0
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
@@ -86,19 +63,3 @@ CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
-CONFIG_SARADC_ROCKCHIP=y
-CONFIG_DM_KEY=y
-CONFIG_ADC_KEY=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_PINCTRL=y
-CONFIG_RK8XX_PWRKEY=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_CHARGE_DISPLAY=y
-CONFIG_CHARGE_ANIMATION=y
-CONFIG_DM_FUEL_GAUGE=y

commit f4b2e9588321c290fa147358d844a175285949cb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 16:44:45 2018 +0800

    serial: ns16550: work around for rockchip kernel dtb support
    
    With kernel dtb support, serial ofnode not able to get cru phandle,
    do not return err because rockchip uart always get 24MHz clock.
    
    Change-Id: Ibd76eb553570cdf73a151c038432c0801cd3230f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index c702304e79..89843cedd7 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -443,6 +443,10 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 			plat->clock = err;
 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
 		debug("ns16550 failed to get clock\n");
+#ifdef CONFIG_USING_KERNEL_DTB
+/* With kernel dtb support, serial ofnode not able to get cru phandle */
+		if(err != -EINVAL)
+#endif
 		return err;
 	}
 

commit 1e6866ec0b718be1c96e289041b05d7df72b9ac2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 16:43:19 2018 +0800

    rockchip: px30: fix grf reg base
    
    fix base addr to correct grf reg base.
    
    Change-Id: I71b1fc8c5ea9ea246290f79b73d3c6055b7ea017
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 71cf3ce7f7..1655bf7726 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -31,18 +31,15 @@ static struct mm_region px30_mem_map[] = {
 
 struct mm_region *mem_map = px30_mem_map;
 
-#define SGRF_DDR_CON0 0x10150000
-
 int arch_cpu_init(void)
 {
 #ifdef CONFIG_SPL_BUILD
 	/* We do some SoC one time setting here. */
 	/* Disable the ddr secure region setting to make it non-secure */
-	rk_clrreg(SGRF_DDR_CON0, 0x4000);
 #endif
 	return 0;
 }
-#define GRF_BASE	0x11000000
+#define GRF_BASE	0xff140000
 void board_debug_uart_init(void)
 {
 static struct px30_grf * const grf = (void *)GRF_BASE;

commit 575777c587fdb37716bd5b31299cb252c65b89df
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 16:41:01 2018 +0800

    rockchip: board: init uart iomux in board_init if no SPL support
    
    Rockchip may use miniloader instead of SPL, in this case, the iomux
    for uart intput is setting, we need to init it in boart_init().
    
    Change-Id: I1ad4fc8cef1aeb222c284dfaf5c2d34a3f1625dd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 6cffaefe75..b1521e88b5 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <debug_uart.h>
 #include <ram.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -157,6 +158,9 @@ int board_init(void)
 {
 	int ret;
 
+#if !defined(CONFIG_SUPPORT_SPL)
+	board_debug_uart_init();
+#endif
 #ifdef CONFIG_USING_KERNEL_DTB
 	init_kernel_dtb();
 #endif

commit 15a7587bba2ffa33a2e08d02a707fe54b7e24d94
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 17:43:12 2018 +0800

    rockchip: rk3128: add a dummy board_debug_uart_init()
    
    Change-Id: Ibb9698b52ee0926eed33198a62d111538022434e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index ef0ed3bcd4..3e5f6f6a47 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -37,3 +37,7 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+void board_debug_uart_init(void)
+{
+}

commit 33f9288d653252c075c5d388b4903600773acc37
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:28:38 2018 +0800

    rockchip: px30: defconfig: enable live dt
    
    Enable CONFIG_OF_LIVE for px30.
    Remove ENV_IS_IN_EMMC for we use ENV_IS_NOWHERE.
    
    Change-Id: I98d0372433e42e56b3c303d0a4b18c81f4103c37
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 4047cae04d..117ae87e64 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -50,8 +50,8 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
-CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
+CONFIG_OF_LIVE=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_TPL_REGMAP=y

commit 4203970b721d90b11cce0a33231b9538ef7d9f2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:27:48 2018 +0800

    rockchip: clk: px30: convert to live dt api
    
    use live dt api to get cru base addr.
    
    Change-Id: I4abbcea1bc47c4e238898fb12181e44acf6ae310
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 9d8757bc8e..91c91fcea5 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -649,7 +649,7 @@ static int px30_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct px30_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct px30_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 
 	return 0;
 }

commit bfa332729442d7b79a980eff8760414c60754d80
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:26:44 2018 +0800

    rockchip: dts: px30: enable cru in pre-relocate
    
    We need cru in pre-relocate for serial/mmc driver.
    
    Change-Id: I59eb8c27a9033838a52079e27c133c5b3d48c367
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 83b7f11bb7..be9e5e23d2 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -18,3 +18,7 @@
 &pmugrf {
 	u-boot,dm-pre-reloc;
 };
+
+&cru {
+	u-boot,dm-pre-reloc;
+};

commit f9bf27e6a5708e63cf19b5dbb2988d46adb9782a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 15:20:54 2018 +0800

    disk: part: add error handle for get partition fail
    
    System may fail to get partition table, return directly in this case.
    
    Change-Id: Ib61f800302aee23fbc362d0d68a5f42ab353a2f0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index 1903a31abc..49cda42e09 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -650,6 +650,8 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	int i;
 
 	part_drv = part_driver_lookup_type(dev_desc);
+	if (!part_drv)
+		return -1;
 	for (i = 1; i < part_drv->max_entries; i++) {
 		ret = part_drv->get_info(dev_desc, i, info);
 		if (ret != 0) {

commit c4867301edbafedefb393d86b1d4281d6cd9f45f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 11:52:05 2018 +0800

    rockchip: clk: px30: fix compile warning
    
    Change-Id: Ib1b2821c507dc61699ef7744d74001e98e536631
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index d79833341f..9d8757bc8e 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -32,9 +32,7 @@ enum {
 	.refdiv = _refdiv,\
 	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
 	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
-static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 2, 1);
 
 static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
@@ -113,7 +111,7 @@ static void rkclk_init(struct px30_cru *cru)
 		     PLLMUX_FROM_XIN24M << GPLL_MODE_SHIFT);
 
 	/* init pll */
-	rkclk_set_pll(&cru->pll[0] , &apll_816_cfg);
+	rkclk_set_pll(&cru->pll[0] , apll_cfgs[APLL_816_MHZ]);
 	rkclk_set_pll(&cru->gpll, &gpll_init_cfg);
 
 	/*
@@ -274,7 +272,7 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	int src_clk_div;
 	u32 con_id;
 
-	debug("%s %d %d\n", __func__, clk_id, set_rate);
+	debug("%s %ld %ld\n", __func__, clk_id, set_rate);
 	switch (clk_id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -478,7 +476,7 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	debug("%s %d %d\n", __func__, clk->id, rate);
+	debug("%s %ld %ld\n", __func__, clk->id, rate);
 	switch (clk->id) {
 	case 0 ... 15:
 		return 0;
@@ -509,7 +507,6 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		return -ENOENT;
 	}
 
-	debug("%s %d\n", __func__, ret);
 	return ret;
 }
 

commit 6d284848847f3c4179d96bc6b6cd1672a9590ca8
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Sat Feb 10 09:48:03 2018 +0800

    rockchip: rk3229: config: boot_android suport ab and avb
    
    add these configs:
    1,CONFIG_RK_AVB_LIBAVB_USER
    2,CONFIG_ANDROID_AB
    3,CONFIG_ANDROID_AVB
    
    Change-Id: I707780021b90ab6386cf39939f45be6fdb11ceaf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index ac9dd3c4ed..d54c2028db 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -80,4 +80,7 @@ CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
 CONFIG_AVB_LIBAVB_ATX=y
 CONFIG_AVB_LIBAVB_USER=y
+CONFIG_RK_AVB_LIBAVB_USER=y
 CONFIG_OPTEE_CLIENT=y
+CONFIG_ANDROID_AB=y
+CONFIG_ANDROID_AVB=y

commit 99ff1ad0c6b513340aca706087f84771ec4e683c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 29 19:51:59 2018 +0800

    lib: avb: fix compile warning
    
    Change-Id: I0cdddc0da44a839371fd8b6d6402053e505976fd
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index 64ff648ed1..9b04ecbd98 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -167,8 +167,8 @@ int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
 		}
 
 		ret = trusty_read_flash_lock_state(flash_lock_state);
-		if (ret == 0)
-			return 0;
+
+		return ret;
 	} else if (ret == 0) {
 		return 0;
 	} else {
@@ -222,8 +222,8 @@ int rk_avb_read_lock_state(uint8_t *lock_state)
 		}
 
 		ret = trusty_read_lock_state(lock_state);
-		if (ret == 0)
-			return 0;
+
+		return ret;
 	} else if (ret == 0) {
 		return 0;
 	} else {
@@ -263,8 +263,8 @@ int rk_avb_read_perm_attr_flag(uint8_t *flag)
 		}
 
 		ret = trusty_read_permanent_attributes_flag(flag);
-		if (ret == 0)
-			return 0;
+
+		return ret;
 	} else if (ret == 0) {
 		return 0;
 	} else {

commit b666ac0523ace7caf88c8ef462e9583767b0a05c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 29 15:36:21 2018 +0800

    android: support android verified boot(AVB)
    
    Define CONFIG_ANDROID_AVB to open avb.
    
    Change-Id: Iae0306391e403b25aa454205dd5a70a578752aba
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/Kconfig b/common/Kconfig
index 20f97ed8bc..5172bb3346 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -583,6 +583,15 @@ config ANDROID_AB
 	  allows a bootloader to try a new version of the system but roll back
 	  to previous version if the new one didn't boot all the way.
 
+config ANDROID_AVB
+	bool"Support Android Verified Boot"
+	default n
+	help
+	  If enabled, adds support the android verified boot. The avb get the
+	  digital signature and key from vemeta. Then use the RSA2048 and sha256
+	  to verify the boot images. The vbmeta must be matched with images,
+	  if not, verify failed.
+
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
 	help
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a6e9591923..2d9adec2d6 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -6,6 +6,7 @@
 
 #include <android_bootloader.h>
 #include <android_bootloader_message.h>
+#include <android_avb/avb_slot_verify.h>
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/rk_avb_ops_user.h>
 
@@ -354,11 +355,96 @@ char *android_assemble_cmdline(const char *slot_suffix,
 	return cmdline;
 }
 
+static void slot_set_unbootable(AvbABSlotData* slot)
+{
+	slot->priority = 0;
+	slot->tries_remaining = 0;
+	slot->successful_boot = 0;
+}
+
+#ifdef CONFIG_ANDROID_AVB
+static AvbSlotVerifyResult android_slot_verify(char *boot_partname,
+			       unsigned long load_address,
+			       char *slot_suffix)
+{
+	const char *requested_partitions[1] = {NULL};
+	uint8_t unlocked = true;
+	AvbOps *ops;
+	AvbSlotVerifyFlags flags;
+	AvbSlotVerifyData *slot_data[1] = {NULL};
+	AvbSlotVerifyResult verify_result;
+	AvbABData ab_data, ab_data_orig;
+	size_t slot_index_to_boot = 0;
+
+	requested_partitions[0] = boot_partname;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+	}
+
+	if (ops->read_is_device_unlocked(ops, (bool *)&unlocked) != AVB_IO_RESULT_OK)
+		printf("Error determining whether device is unlocked.\n");
+
+	printf("read_is_device_unlocked() ops returned that device is %s\n",
+	       (unlocked & LOCK_MASK)? "UNLOCKED" : "LOCKED");
+
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	if (unlocked & LOCK_MASK)
+		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
+
+	if(load_metadata(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not load metadata\n");
+		return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+	}
+
+	if (strncmp(slot_suffix, "_a", 2))
+		slot_index_to_boot = 0;
+	else if(strncmp(slot_suffix, "_b", 2))
+		slot_index_to_boot = 1;
+	else
+		slot_index_to_boot = 0;
+
+	verify_result =
+	avb_slot_verify(ops,
+			requested_partitions,
+			slot_suffix,
+			flags,
+			AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+			&slot_data[0]);
+
+	if (verify_result != AVB_SLOT_VERIFY_RESULT_OK) {
+		slot_set_unbootable(&ab_data.slots[slot_index_to_boot]);
+		goto out;
+	}
+
+	memcpy((uint8_t*)load_address,
+	       slot_data[0]->loaded_partitions->data,
+	       slot_data[0]->loaded_partitions->data_size);
+	env_set("bootargs", slot_data[0]->cmdline);
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+out:
+	if (save_metadata_if_changed(ops->ab_ops, &ab_data, &ab_data_orig)) {
+		printf("Can not save metadata\n");
+		verify_result = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+	}
+
+	if (slot_data[0] != NULL)
+		avb_slot_verify_data_free(slot_data[0]);
+
+	return verify_result;
+}
+#endif
+
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 unsigned long load_address)
 {
 	enum android_boot_mode mode;
-	disk_partition_t boot_part_info;
 	disk_partition_t misc_part_info;
 	int part_num;
 	int ret;
@@ -416,10 +502,15 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 #endif
 
+#ifdef CONFIG_ANDROID_AVB
+	if (android_slot_verify(boot_partname, load_address, slot_suffix))
+		return -1;
+#else
 	/*
 	 * 2. Load the boot/recovery from the desired "boot" partition.
 	 * Determine if this is an AOSP image.
 	 */
+	disk_partition_t boot_part_info;
 	part_num =
 	    android_part_get_info_by_name_suffix(dev_desc,
 						 boot_partname,
@@ -438,6 +529,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		printf("%s %s part load fail\n", __func__, boot_part_info.name);
 		return ret;
 	}
+#endif
 
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
@@ -445,7 +537,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	/* Assemble the command line */
 	command_line = android_assemble_cmdline(slot_suffix, mode_cmdline);
-	env_set("bootargs", command_line);
+	env_update("bootargs", command_line);
 
 	debug("ANDROID: bootargs: \"%s\"\n", command_line);
 

commit 187a5bc522f5681becdd2016168e441e21b6ed32
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 29 15:25:44 2018 +0800

    lib: avb: declare some functions externally
    
    1. extern load_metadata
    2. extern save_metadata_if_changed
    
    Change-Id: I3afe604c39a5f7cf31a0a28d7cc939da51295c10
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
index f6aca9b0fa..0ba5ccd47c 100644
--- a/include/android_avb/avb_ab_flow.h
+++ b/include/android_avb/avb_ab_flow.h
@@ -256,6 +256,20 @@ AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
 AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
                                         unsigned int slot_number);
 
+/*
+ * Load metadata.
+ */
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+			  AvbABData* ab_data,
+			  AvbABData* ab_data_orig);
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+				     AvbABData* ab_data,
+				     AvbABData* ab_data_orig);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
index 55f0a04065..7ed1ab9107 100644
--- a/lib/avb/libavb_ab/avb_ab_flow.c
+++ b/lib/avb/libavb_ab/avb_ab_flow.c
@@ -168,7 +168,7 @@ static const char* slot_suffixes[2] = {"_a", "_b"};
 /* Helper function to load metadata - returns AVB_IO_RESULT_OK on
  * success, error code otherwise.
  */
-static AvbIOResult load_metadata(AvbABOps* ab_ops,
+AvbIOResult load_metadata(AvbABOps* ab_ops,
                                  AvbABData* ab_data,
                                  AvbABData* ab_data_orig) {
   AvbIOResult io_ret;
@@ -192,7 +192,7 @@ static AvbIOResult load_metadata(AvbABOps* ab_ops,
 /* Writes A/B metadata to disk only if it has changed - returns
  * AVB_IO_RESULT_OK on success, error code otherwise.
  */
-static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
                                             AvbABData* ab_data,
                                             AvbABData* ab_data_orig) {
   if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {

commit 8f254cea36a5cc9746af8c913137ab2778f39bbc
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 17:34:33 2018 +0800

    android: change enter recovery and a/b mode
    
    Choose which partition to enter recovery and a/b depend
    on CONFIG_ANDROID_AB.
    
    Change-Id: I10d03f1c592702f857e6224566deea3a4d607788
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index b0b26987ff..a6e9591923 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -393,7 +393,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		/* In recovery mode we still boot the kernel from "boot" but
 		 * don't skip the initramfs so it boots to recovery.
 		 */
-#ifndef CONFIG_RK_AVB_LIBAVB_USER
+#ifndef CONFIG_ANDROID_AB
 		boot_partname = ANDROID_PARTITION_RECOVERY;
 #endif
 		break;
@@ -405,10 +405,15 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-#ifdef CONFIG_RK_AVB_LIBAVB_USER
+#ifdef CONFIG_ANDROID_AB
 	/*TODO: get from pre-loader or misc partition*/
 	if (rk_avb_get_current_slot(slot_suffix))
 		return -1;
+
+	if (slot_suffix[0] != '_') {
+		printf("There is no bootable slot!\n");
+		return -1;
+	}
 #endif
 
 	/*

commit 459bc93392ed13d7d5ee9fe03bb3e4dab27f6ce4
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 17:27:15 2018 +0800

    lib: avb: get the dev_desc by function rockchip_get_bootdev
    
    Change-Id: I62211b54b0efc11e232d9473a9f566c9fa82b3d8
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
index 959044a931..c7263be901 100644
--- a/lib/avb/libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -40,6 +40,7 @@
 #include <optee_include/tee_api_defines.h>
 #include <android_avb/avb_vbmeta_image.h>
 #include <android_avb/avb_atx_validate.h>
+#include <boot_rkimg.h>
 
 static void byte_to_block(int64_t *offset,
 			  size_t *num_bytes,
@@ -74,16 +75,14 @@ static AvbIOResult read_from_partition(AvbOps* ops,
                                        void* buffer,
                                        size_t* out_num_read)
 {
-	char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	lbaint_t offset_blk, blkcnt;
 	disk_partition_t part_info;
 
 	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
@@ -117,8 +116,6 @@ static AvbIOResult write_to_partition(AvbOps* ops,
                                       size_t num_bytes,
                                       const void* buffer)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	char *buffer_temp;
 	disk_partition_t part_info;
@@ -131,9 +128,9 @@ static AvbIOResult write_to_partition(AvbOps* ops,
 		return AVB_IO_RESULT_ERROR_OOM;
 	}
 	memset(buffer_temp, 0, 512 * blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
@@ -270,14 +267,12 @@ static AvbIOResult get_size_of_partition(AvbOps *ops,
                                          const char *partition,
                                          uint64_t *out_size_in_bytes)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
@@ -294,13 +289,11 @@ static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
                                                  char *guid_buf,
                                                  size_t guid_buf_size)
 {
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device\n", __func__);
 		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
 	}
 
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
index f4a7559ec5..64ff648ed1 100644
--- a/lib/avb/rk_avb_user/rk_avb_ops_user.c
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -23,6 +23,7 @@
 #include <android_avb/avb_vbmeta_image.h>
 #include <android_avb/avb_atx_validate.h>
 #include <android_avb/rk_avb_ops_user.h>
+#include <boot_rkimg.h>
 
 /* rk used */
 int rk_avb_read_slot_count(char *slot_count)
@@ -634,14 +635,12 @@ int rk_avb_get_part_has_slot_info(const char *base_name)
 	int part_num;
 	size_t part_name_len;
 	disk_partition_t part_info;
-	const char *dev_iface = "mmc";
 	struct blk_desc *dev_desc;
-	int dev_num = 0;
 	const char *slot_suffix = "_a";
 
-	dev_desc = blk_get_dev(dev_iface, dev_num);
+	dev_desc = rockchip_get_bootdev();
 	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
+		printf("%s: Could not find device!\n", __func__);
 		return -1;
 	}
 

commit 37a7bc39c0a3beca986e8c1c85d1dd6b9921e313
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 16:38:05 2018 +0800

    lib: avb: update and modify the avb library
    
    The commit point is updated to google external/avb/
    which commit point is cf8c56208d2d9643804a7f123b196c7ebc9af276.
    
    Change-Id: I5a10a8a45d3e9e2c9d20d9b3d44946073c9a49ff
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index a9c195ae0b..5df2e9b270 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -14,6 +14,7 @@
 #include <bootm.h>
 #include <command.h>
 #include <android_bootloader_message.h>
+#include <android_avb/rk_avb_ops_user.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
@@ -73,7 +74,7 @@ U_BOOT_CMD(
 	"      the partition table. This is commonly the \"misc\" partition.\n"
 );
 
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 static int bootloader_message_read(struct android_bootloader_message *data)
 {
 	AvbOps *ops;
@@ -145,8 +146,7 @@ int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	}
 
-	ops->ab_ops->init_ab_metadata(&ab_data);
-	debug("init");
+	avb_ab_data_init(&ab_data);
 	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
 		printf("do_avb_init_ab_metadata error!\n");
 		avb_ops_user_free(ops);
@@ -516,38 +516,6 @@ int do_avb_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-int do_avb_load_ab_metadata(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
-{
-	AvbOps *ops;
-	AvbABData ab_data, ab_data_orig;
-	char *data;
-	int i;
-
-	if (argc != 1)
-		return CMD_RET_USAGE;
-
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return CMD_RET_FAILURE;
-	}
-
-	if (load_metadata(ops->ab_ops, &ab_data, &ab_data_orig) != 0) {
-		printf("do_avb_write_ab_metadata error!\n");
-		avb_ops_user_free(ops);
-		return CMD_RET_FAILURE;
-	}
-
-	data = (char *)&ab_data;
-	for (i = 0; i < 33; i++)
-		printf("%d\n", data[i]);
-
-	avb_ops_user_free(ops);
-
-	return CMD_RET_SUCCESS;
-}
-
 int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -643,9 +611,10 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	AvbSlotVerifyFlags flags;
 	const char *requested_partitions[] = {"boot", "system", NULL};
 	char *command_line;
-	bool unlocked = true;
+	bool unlocked;
 	const char *mode_cmdline = NULL;
 	char root_data[70] = "root=PARTUUID=";
+	char *vboot_state = "androidboot.verifiedbootstate=";
 	char avb_root_data[2000] = {0};
 	size_t guid_buf_size = 37;
 	char guid_buf[37];
@@ -653,6 +622,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	char boot_slot_select[5];
 	struct android_bootloader_message data;
 	const char *fastboot_cmd = env_get("fastbootcmd");
+	AvbABFlowResult ab_result;
 
 	if (argc != 2)
 		return CMD_RET_USAGE;
@@ -666,7 +636,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			return run_command(fastboot_cmd, CMD_FLAG_ENV);
 		} else {
 			printf("The fastbootcmd is NULL!\n");
-			return CMD_RET_SUCCESS;
+			goto fail;
 		}
 	} else if (!strcmp("boot-recovery", data.command)) {
 		printf("Enter boot-recovery!\n");
@@ -691,11 +661,23 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	avb_version = avb_version_string();
 	printf("Android avb version is %s.\n", avb_version);
 	ops = avb_ops_user_new();
-	if (ops == NULL)
+	if (ops == NULL) {
 		printf("avb_ops_user_new() failed!\n");
+		goto fail;
+	}
 
-	if (ops->read_is_device_unlocked(ops, &unlocked) != 0)
+	if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
 		printf("Error determining whether device is unlocked.\n");
+		unlocked = ANDROID_VBOOT_UNLOCK;
+		if (ops->write_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not write lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+		if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not read lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+	}
 
 	printf("read_is_device_unlocked() ops returned that device is %s\n",
 	       unlocked ? "UNLOCKED" : "LOCKED");
@@ -707,15 +689,27 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	verify_flag = argv[1][0];
 	if (verify_flag == 'v') {
 		debug("start with verify!\n");
-		if (avb_ab_flow(ops->ab_ops,
+		ab_result =
+		    avb_ab_flow(ops->ab_ops,
 				requested_partitions,
 				flags,
 				AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-				&slot_data)) {
-			avb_slot_verify_data_free(slot_data);
-			avb_ops_user_free(ops);
+				&slot_data);
+		if ((ab_result != AVB_AB_FLOW_RESULT_OK) &&
+		    (ab_result !=
+		    AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR)) {
 			printf("avb_ab_flow() error!\n");
-			return CMD_RET_FAILURE;
+			avb_ops_user_free(ops);
+			goto fail;
+		}
+
+		if (ab_result ==\
+		    AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR) {
+			strcat(avb_root_data, vboot_state);
+			strcat(avb_root_data, "orange");
+		} else if (ab_result == AVB_AB_FLOW_RESULT_OK) {
+			strcat(avb_root_data, vboot_state);
+			strcat(avb_root_data, "green");
 		}
 
 		command_line = android_assemble_cmdline(slot_data->ab_suffix,
@@ -726,16 +720,17 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(avb_root_data, slot_data->cmdline);
 		env_set("bootargs", avb_root_data);
 		load_address = CONFIG_SYS_LOAD_ADDR;
-		if (avb_close_optee_client())
+		if (rk_avb_close_optee_client())
 			printf("Can not close optee client!\n");
 
 		memcpy((uint8_t*)load_address,
 		       slot_data->loaded_partitions->data,
 		       slot_data->loaded_partitions->data_size);
 		android_bootloader_boot_kernel(load_address);
+		avb_ops_user_free(ops);
 	} else if (verify_flag == 'n') {
 		load_address = CONFIG_SYS_LOAD_ADDR;
-		avb_ab_slot_select(ops->ab_ops, boot_slot_select);
+		rk_avb_ab_slot_select(ops->ab_ops, boot_slot_select);
 		strcat(slot_partition[1], requested_partitions[1]);
 		strcat(slot_partition[1], boot_slot_select);
 		printf("%s\n", slot_partition[1]);
@@ -749,7 +744,12 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, " ");
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
-		android_avb_boot_flow(boot_slot_select, load_address);
+		if (android_avb_boot_flow(boot_slot_select, load_address)) {
+			printf("Cannot boot the system, goto the fastboot!\n");
+			avb_ops_user_free(ops);
+			goto fail;
+		}
+		avb_ops_user_free(ops);
 	} else if (verify_flag == 'o') {
 		load_address = CONFIG_SYS_LOAD_ADDR;
 		strcat(slot_partition[1], requested_partitions[1]);
@@ -763,12 +763,24 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, " ");
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
-		android_boot_flow(load_address);
+		if (android_boot_flow(load_address)) {
+			printf("Cannot boot the system, goto the fastboot!\n");
+			avb_ops_user_free(ops);
+			goto fail;
+		}
+		avb_ops_user_free(ops);
 	} else {
 		return CMD_RET_USAGE;
 	}
 
 	return CMD_RET_SUCCESS;
+fail:
+	if (fastboot_cmd == NULL) {
+		printf("fastboot_cmd is null, run default fastboot_cmd!\n");
+		fastboot_cmd = "fastboot usb 0";
+	}
+
+	return run_command(fastboot_cmd, CMD_FLAG_ENV);
 }
 
 static cmd_tbl_t cmd_avb[] = {
@@ -794,7 +806,6 @@ static cmd_tbl_t cmd_avb[] = {
 			 do_avb_get_get_unique_guid_for_partition, "", ""),
 	U_BOOT_CMD_MKENT(read, 4, 1, do_avb_read, "", ""),
 	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
-	U_BOOT_CMD_MKENT(loadabmisc, 1, 1, do_avb_load_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
 	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
@@ -837,7 +848,6 @@ U_BOOT_CMD(
 	"bootavb part_guid partitions_name\n"
 	"bootavb read partition offset_blk cnt\n"
 	"bootavb write partition offset_blk cnt\n"
-	"bootavb loadabmisc\n"
 	"bootavb readabmisc\n"
 	"bootavb writeabmisc\n"
 	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 1295e0215c..b0b26987ff 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -7,6 +7,7 @@
 #include <android_bootloader.h>
 #include <android_bootloader_message.h>
 #include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
 
 #include <cli.h>
 #include <common.h>
@@ -202,8 +203,8 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 	memset(&boot_part_info, 0, sizeof(boot_part_info));
 
-#ifdef CONFIG_AVB_LIBAVB_USER
-	if (avb_get_current_slot(slot_suffix)) {
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
+	if (rk_avb_get_current_slot(slot_suffix)) {
 		printf("ANDROID: Get Current Slot error.\n");
 		return -1;
 	}
@@ -392,7 +393,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		/* In recovery mode we still boot the kernel from "boot" but
 		 * don't skip the initramfs so it boots to recovery.
 		 */
-#ifndef CONFIG_AVB_LIBAVB_USER
+#ifndef CONFIG_RK_AVB_LIBAVB_USER
 		boot_partname = ANDROID_PARTITION_RECOVERY;
 #endif
 		break;
@@ -404,9 +405,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 	/*TODO: get from pre-loader or misc partition*/
-	if (avb_get_current_slot(slot_suffix))
+	if (rk_avb_get_current_slot(slot_suffix))
 		return -1;
 #endif
 
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 0bf1908a4b..007cdc3b3f 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -22,6 +22,7 @@
 #include <version.h>
 #include <g_dnl.h>
 #include <android_avb/avb_ops_user.h>
+#include <android_avb/rk_avb_ops_user.h>
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 #include <fb_mmc.h>
 #endif
@@ -468,12 +469,12 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 
 		strncat(response, uuid, chars_left);
 	} else if (!strcmp_l1("slot-count", cmd)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char slot_count[2];
 		char temp;
 
 		slot_count[1] = '\0';
-		avb_read_slot_count(&temp);
+		rk_avb_read_slot_count(&temp);
 		slot_count[0] = temp + 0x30;
 		strncat(response, slot_count, chars_left);
 #else
@@ -481,10 +482,10 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strcmp_l1("current-slot", cmd)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char slot_surrent[8] = {0};
 
-		if (!avb_get_current_slot(slot_surrent))
+		if (!rk_avb_get_current_slot(slot_surrent))
 			strncat(response, slot_surrent+1, chars_left);
 		else
 			strcpy(response, "FAILgeterror");
@@ -493,14 +494,14 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strcmp_l1("slot-suffixes", cmd)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char slot_suffixes_temp[4];
 		char slot_suffixes[9];
 		int slot_cnt = 0;
 
 		memset(slot_suffixes_temp, 0, 4);
 		memset(slot_suffixes, 0, 9);
-		avb_read_slot_suffixes(slot_suffixes_temp);
+		rk_avb_read_slot_suffixes(slot_suffixes_temp);
 		while (slot_suffixes_temp[slot_cnt] != '\0') {
 			slot_suffixes[slot_cnt * 2]
 				= slot_suffixes_temp[slot_cnt];
@@ -513,7 +514,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("has-slot", cmd, 8)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *part_name = cmd;
 
 		cmd = strsep(&part_name, ":");
@@ -531,7 +532,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("slot-unbootable", cmd, 15)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *slot_name = cmd;
 
 		cmd = strsep(&slot_name, ":");
@@ -546,7 +547,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("slot-successful", cmd, 15)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *slot_name = cmd;
 
 		cmd = strsep(&slot_name, ":");
@@ -561,7 +562,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (!strncmp("slot-retry-count", cmd, 16)) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		char *slot_name = cmd;
 		char count[10] = {0};
 		static int cnt[2] = {0};
@@ -841,14 +842,14 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAIL: missing slot name");
 		return;
 	}
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 	unsigned int slot_number;
 	if (strncmp("a", cmd, 1) == 0) {
 		slot_number = 0;
-		avb_set_slot_active(&slot_number);
+		rk_avb_set_slot_active(&slot_number);
 	} else if (strncmp("b", cmd, 1) == 0) {
 		slot_number = 1;
-		avb_set_slot_active(&slot_number);
+		rk_avb_set_slot_active(&slot_number);
 	} else {
 		fastboot_tx_write_str("FAIL: unkown slot name");
 		return;
@@ -867,10 +868,10 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
 	char response[FASTBOOT_RESPONSE_LEN] = {0};
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 
-	if (avb_read_flash_lock_state(&flash_lock_state)) {
+	if (rk_avb_read_flash_lock_state(&flash_lock_state)) {
 		fastboot_tx_write_str("FAIL");
 		return;
 	}
@@ -905,10 +906,10 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 	char *cmd = req->buf;
 
 	if (strncmp("lock", cmd + 9, 4) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 0;
-		if (avb_write_flash_lock_state(flash_lock_state))
+		if (rk_avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -916,10 +917,10 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("unlock", cmd + 9, 6) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 1;
-		if (avb_write_flash_lock_state(flash_lock_state))
+		if (rk_avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -998,10 +999,10 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		return;
 #endif
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 0;
-		if (avb_write_lock_state(lock_state))
+		if (rk_avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -1009,15 +1010,15 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
-		if (avb_read_lock_state(&lock_state))
+		if (rk_avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAIL");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
-			if (avb_write_lock_state(lock_state))
+			if (rk_avb_write_lock_state(lock_state))
 				fastboot_tx_write_str("FAIL");
 			else
 				fastboot_tx_write_str("OKAY");
@@ -1026,10 +1027,10 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 2;
-		if (avb_write_lock_state(lock_state))
+		if (rk_avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -1037,14 +1038,14 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
 			printf("Permanent attribute size is not equal!\n");
 			fastboot_tx_write_str("FAIL");
 			return;
 		}
 
-		if (avb_write_permanent_attributes((uint8_t *)
+		if (rk_avb_write_permanent_attributes((uint8_t *)
 					       CONFIG_FASTBOOT_BUF_ADDR,
 					       download_bytes
 					       - PERM_ATTR_DIGEST_SIZE)) {
@@ -1052,7 +1053,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (avb_write_attribute_hash((uint8_t *)
+		if (rk_avb_write_attribute_hash((uint8_t *)
 					     (CONFIG_FASTBOOT_BUF_ADDR
 					     + download_bytes
 					     - PERM_ATTR_DIGEST_SIZE),
@@ -1061,7 +1062,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			return;
 		}
 
-		if (avb_write_perm_attr_flag(1)) {
+		if (rk_avb_write_perm_attr_flag(1)) {
 			fastboot_tx_write_str("FAIL");
 			return;
 		}
@@ -1071,13 +1072,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
-#ifdef CONFIG_AVB_LIBAVB_USER
+#ifdef CONFIG_RK_AVB_LIBAVB_USER
 		if (download_bytes != VBOOT_KEY_HASH_SIZE) {
 			fastboot_tx_write_str("FAIL");
 			printf("The vboot key size error!\n");
 		}
 
-		if (avb_write_vbootkey_hash((uint8_t *)
+		if (rk_avb_write_vbootkey_hash((uint8_t *)
 					    CONFIG_FASTBOOT_BUF_ADDR,
 					    VBOOT_KEY_HASH_SIZE)) {
 			fastboot_tx_write_str("FAIL");
diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
index 6b3d9e4e1c..f6aca9b0fa 100644
--- a/include/android_avb/avb_ab_flow.h
+++ b/include/android_avb/avb_ab_flow.h
@@ -1,279 +1,263 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-/*
-#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
-#endif
-*/
-
-#ifndef AVB_AB_FLOW_H_
-#define AVB_AB_FLOW_H_
-
-#include <android_avb/avb_ab_ops.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Magic for the A/B struct when serialized. */
-#define AVB_AB_MAGIC "\0AB0"
-#define AVB_AB_MAGIC_LEN 4
-
-/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
-#define AVB_AB_MAJOR_VERSION 1
-#define AVB_AB_MINOR_VERSION 0
-
-/* Size of AvbABData struct. */
-#define AVB_AB_DATA_SIZE 512
-
-/* Maximum values for slot data */
-#define AVB_AB_MAX_PRIORITY 15
-#define AVB_AB_MAX_TRIES_REMAINING 7
-
-/* Struct used for recording per-slot metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABSlotData {
-  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
-   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
-   * being the highest. The special value 0 is used to indicate the
-   * slot is unbootable.
-   */
-  uint8_t priority : 4;
-
-  /* Number of times left attempting to boot this slot ranging from 0
-   * to AVB_AB_MAX_TRIES_REMAINING.
-   */
-  uint8_t tries_remaining : 3;
-
-  /* Non-zero if this slot has booted successfully, 0 otherwise. */
-  uint8_t successful_boot : 1;
-    /* 1 if this slot is corrupted from a dm-verity corruption, 0 */
-    /* otherwise. */
-    uint8_t verity_corrupted : 1;
-  /* Reserved for future use. */
-  uint8_t reserved : 7;
-} AVB_ATTR_PACKED AvbABSlotData;
-
-/* Struct used for recording A/B metadata.
- *
- * When serialized, data is stored in network byte-order.
- */
-typedef struct AvbABData
-{
-	/* NUL terminated active slot suffix. */
-	char slot_suffix[4];
-	/* Magic number used for identification - see AVB_AB_MAGIC. */
-	uint8_t magic[AVB_AB_MAGIC_LEN];
-
-	/* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
-	uint8_t version_major;
-
-	/* Number of slots being managed. */
-	uint8_t nb_slot : 3;
-	/* Number of times left attempting to boot recovery. */
-	uint8_t recovery_tries_remaining : 3;
-	/* Padding to ensure |slots| field start eight bytes in. */
-	uint8_t reserved1[2];
-
-	/* Per-slot metadata. */
-	AvbABSlotData slots[4];
-
-	/* Reserved for future use. */
-	uint8_t reserved2[8];
-	//uint8_t reserved3[480];
-
-	/* CRC32 of all 28 bytes preceding this field. */
-	uint32_t crc32;
-	uint8_t version_minor;
-} AVB_ATTR_PACKED AvbABData;
-
-/* Copies |src| to |dest|, byte-swapping fields in the
- * process. Returns false if the data is invalid (e.g. wrong magic,
- * wrong CRC32 etc.), true otherwise.
- */
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Copies |src| to |dest|, byte-swapping fields in the process. Also
- * updates the |crc32| field in |dest|.
- */
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
-
-/* Initializes |data| such that it has two slots and both slots have
- * maximum tries remaining. The CRC is not set.
- */
-void avb_ab_data_init(AvbABData* data);
-
-/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
- * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- *
- * If the data read from disk is invalid (e.g. wrong magic or CRC
- * checksum failure), the metadata will be reset using
- * avb_ab_data_init() and then written to disk.
- */
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
-
-/* Load A/B metadata, like function avb_ab_data_read*/
-AvbIOResult load_metadata(AvbABOps* ab_ops,
-                                 AvbABData* ab_data,
-                                 AvbABData* ab_data_orig);
-
-/* Writes A/B metadata to the 'misc' partition using |ops|. This will
- * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
-
-/* Return codes used in avb_ab_flow(), see that function for
- * documentation of each value.
- */
-typedef enum {
-  AVB_AB_FLOW_RESULT_OK,
-  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
-  AVB_AB_FLOW_RESULT_ERROR_OOM,
-  AVB_AB_FLOW_RESULT_ERROR_IO,
-  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
-  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
-} AvbABFlowResult;
-
-/* Get a textual representation of |result|. */
-const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
-
-/* High-level function to select a slot to boot. The following
- * algorithm is used:
- *
- * 1. A/B metadata is loaded and validated using the
- * read_ab_metadata() operation. Typically this means it's read from
- * the 'misc' partition and if it's invalid then it's reset using
- * avb_ab_data_init() and this reset metadata is returned.
- *
- * 2. All bootable slots listed in the A/B metadata are verified using
- * avb_slot_verify(). If a slot is invalid or if it fails verification
- * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
- * below), it will be marked as unbootable in the A/B metadata and the
- * metadata will be saved to disk before returning.
- *
- * 3. If there are no bootable slots, the value
- * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
- *
- * 4. For each bootable slot, the Stored Rollback Indexes are updated
- * such that for each rollback index location, the Stored Rollback
- * Index is the largest number smaller than or equal to the Rollback
- * Index of each slot.
- *
- * 5. The bootable slot with the highest priority is selected and
- * returned in |out_data|. If this slot is already marked as
- * successful, the A/B metadata is not modified. However, if the slot
- * is not marked as bootable its |tries_remaining| count is
- * decremented and the A/B metadata is saved to disk before returning.
- * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
- *
- * The partitions to load is given in |requested_partitions| as a
- * NULL-terminated array of NUL-terminated strings. Typically the
- * |requested_partitions| array only contains a single item for the
- * boot partition, 'boot'.
- *
- * If the device is unlocked (and _only_ if it's unlocked), the
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
- * in the |flags| parameter. This will allow considering slots as
- * verified even when avb_slot_verify() returns
- * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
- * question.
- *
- * Note that neither androidboot.slot_suffix nor androidboot.slot are
- * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
- * to pass these yourself.
- *
- * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
- * is returned.
- *
- * If a slot was selected but it didn't verify then
- * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
- * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
- * flag is set.
- *
- * If an I/O operation - such as loading/saving metadata or checking
- * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
- * returned.
- *
- * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
- * returned.
- *
- * If invalid arguments are passed,
- * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
- * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
- *
- * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
- * is to initiate device repair (which is device-dependent).
- */
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data);
-
-AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
-
-/* Marks the slot with the given slot number as active. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater when completing
- * an update. It can also used by the firmware for implementing the
- * "set_active" command.
- */
-AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
-
-/* Marks the slot with the given slot number as unbootable. Returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- *
- * This function is typically used by the OS updater before writing to
- * a slot.
- */
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-/* Marks the slot with the given slot number as having booted
- * successfully. Returns AVB_IO_RESULT_OK on success, error code
- * otherwise.
- *
- * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
- * will be returned yet the function will have no side-effects.
- *
- * This function is typically used by the OS updater after having
- * confirmed that the slot works as intended.
- */
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
-                                        unsigned int slot_number);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_AB_FLOW_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_FLOW_H_
+#define AVB_AB_FLOW_H_
+
+#include <android_avb/avb_ab_ops.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the A/B struct when serialized. */
+#define AVB_AB_MAGIC "\0AB0"
+#define AVB_AB_MAGIC_LEN 4
+
+/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
+#define AVB_AB_MAJOR_VERSION 1
+#define AVB_AB_MINOR_VERSION 0
+
+/* Size of AvbABData struct. */
+#define AVB_AB_DATA_SIZE 32
+
+/* Maximum values for slot data */
+#define AVB_AB_MAX_PRIORITY 15
+#define AVB_AB_MAX_TRIES_REMAINING 7
+
+/* Struct used for recording per-slot metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABSlotData {
+  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
+   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
+   * being the highest. The special value 0 is used to indicate the
+   * slot is unbootable.
+   */
+  uint8_t priority;
+
+  /* Number of times left attempting to boot this slot ranging from 0
+   * to AVB_AB_MAX_TRIES_REMAINING.
+   */
+  uint8_t tries_remaining;
+
+  /* Non-zero if this slot has booted successfully, 0 otherwise. */
+  uint8_t successful_boot;
+
+  /* Reserved for future use. */
+  uint8_t reserved[1];
+} AVB_ATTR_PACKED AvbABSlotData;
+
+/* Struct used for recording A/B metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABData {
+  /* Magic number used for identification - see AVB_AB_MAGIC. */
+  uint8_t magic[AVB_AB_MAGIC_LEN];
+
+  /* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
+  uint8_t version_major;
+  uint8_t version_minor;
+
+  /* Padding to ensure |slots| field start eight bytes in. */
+  uint8_t reserved1[2];
+
+  /* Per-slot metadata. */
+  AvbABSlotData slots[2];
+
+  /* Reserved for future use. */
+  uint8_t reserved2[12];
+
+  /* CRC32 of all 28 bytes preceding this field. */
+  uint32_t crc32;
+} AVB_ATTR_PACKED AvbABData;
+
+/* Copies |src| to |dest|, byte-swapping fields in the
+ * process. Returns false if the data is invalid (e.g. wrong magic,
+ * wrong CRC32 etc.), true otherwise.
+ */
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Copies |src| to |dest|, byte-swapping fields in the process. Also
+ * updates the |crc32| field in |dest|.
+ */
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Initializes |data| such that it has two slots and both slots have
+ * maximum tries remaining. The CRC is not set.
+ */
+void avb_ab_data_init(AvbABData* data);
+
+/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
+ * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ *
+ * If the data read from disk is invalid (e.g. wrong magic or CRC
+ * checksum failure), the metadata will be reset using
+ * avb_ab_data_init() and then written to disk.
+ */
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
+
+/* Writes A/B metadata to the 'misc' partition using |ops|. This will
+ * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
+
+/* Return codes used in avb_ab_flow(), see that function for
+ * documentation of each value.
+ */
+typedef enum {
+  AVB_AB_FLOW_RESULT_OK,
+  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
+  AVB_AB_FLOW_RESULT_ERROR_OOM,
+  AVB_AB_FLOW_RESULT_ERROR_IO,
+  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
+  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
+} AvbABFlowResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
+
+/* High-level function to select a slot to boot. The following
+ * algorithm is used:
+ *
+ * 1. A/B metadata is loaded and validated using the
+ * read_ab_metadata() operation. Typically this means it's read from
+ * the 'misc' partition and if it's invalid then it's reset using
+ * avb_ab_data_init() and this reset metadata is returned.
+ *
+ * 2. All bootable slots listed in the A/B metadata are verified using
+ * avb_slot_verify(). If a slot is invalid or if it fails verification
+ * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
+ * below), it will be marked as unbootable in the A/B metadata and the
+ * metadata will be saved to disk before returning.
+ *
+ * 3. If there are no bootable slots, the value
+ * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
+ *
+ * 4. For each bootable slot, the Stored Rollback Indexes are updated
+ * such that for each rollback index location, the Stored Rollback
+ * Index is the largest number smaller than or equal to the Rollback
+ * Index of each slot.
+ *
+ * 5. The bootable slot with the highest priority is selected and
+ * returned in |out_data|. If this slot is already marked as
+ * successful, the A/B metadata is not modified. However, if the slot
+ * is not marked as bootable its |tries_remaining| count is
+ * decremented and the A/B metadata is saved to disk before returning.
+ * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
+ *
+ * The partitions to load is given in |requested_partitions| as a
+ * NULL-terminated array of NUL-terminated strings. Typically the
+ * |requested_partitions| array only contains a single item for the
+ * boot partition, 'boot'.
+ *
+ * If the device is unlocked (and _only_ if it's unlocked), the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
+ * in the |flags| parameter. This will allow considering slots as
+ * verified even when avb_slot_verify() returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
+ * question.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
+ * is returned.
+ *
+ * If a slot was selected but it didn't verify then
+ * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
+ * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+ * flag is set.
+ *
+ * If an I/O operation - such as loading/saving metadata or checking
+ * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
+ * returned.
+ *
+ * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
+ * returned.
+ *
+ * If invalid arguments are passed,
+ * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
+ * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ *
+ * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
+ * is to initiate device repair (which is device-dependent).
+ */
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data);
+
+/* Marks the slot with the given slot number as active. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater when completing
+ * an update. It can also used by the firmware for implementing the
+ * "set_active" command.
+ */
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
+
+/* Marks the slot with the given slot number as unbootable. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater before writing to
+ * a slot.
+ */
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/* Marks the slot with the given slot number as having booted
+ * successfully. Returns AVB_IO_RESULT_OK on success, error code
+ * otherwise.
+ *
+ * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
+ * will be returned yet the function will have no side-effects.
+ *
+ * This function is typically used by the OS updater after having
+ * confirmed that the slot works as intended.
+ */
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_FLOW_H_ */
diff --git a/include/android_avb/avb_ab_ops.h b/include/android_avb/avb_ab_ops.h
index d440e75b18..60e9a497b6 100644
--- a/include/android_avb/avb_ab_ops.h
+++ b/include/android_avb/avb_ab_ops.h
@@ -1,81 +1,81 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
-#endif
-*/
-
-#ifndef AVB_AB_OPS_H_
-#define AVB_AB_OPS_H_
-
-#include <android_avb/libavb.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct AvbABOps;
-typedef struct AvbABOps AvbABOps;
-
-struct AvbABData;
-
-/* High-level operations/functions/methods for A/B that are platform
- * dependent.
- */
-struct AvbABOps {
-	/* Operations from libavb. */
-	AvbOps* ops;
-
-	/* Reads A/B metadata from persistent storage. Returned data is
-	 * properly byteswapped. Returns AVB_IO_RESULT_OK on success, error
-	 * code otherwise.
-	 *
-	 * If the data read is invalid (e.g. wrong magic or CRC checksum
-	 * failure), the metadata shoule be reset using avb_ab_data_init()
-	 * and then written to persistent storage.
-	 *
-	 * Implementations will typically want to use avb_ab_data_read()
-	 * here to use the 'misc' partition for persistent storage.
-	 */
-	AvbIOResult (*read_ab_metadata)(AvbABOps *ab_ops, struct AvbABData *data);
-
-	/* Writes A/B metadata to persistent storage. This will byteswap and
-	 * update the CRC as needed. Returns AVB_IO_RESULT_OK on success,
-	 * error code otherwise.
-	 *
-	 * Implementations will typically want to use avb_ab_data_write()
-	 * here to use the 'misc' partition for persistent storage.
-	 */
-	AvbIOResult (*write_ab_metadata)(AvbABOps *ab_ops, const struct AvbABData *data);
-	void (*init_ab_metadata)(struct AvbABData *data);
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_AB_OPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_OPS_H_
+#define AVB_AB_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbABOps;
+typedef struct AvbABOps AvbABOps;
+
+struct AvbABData;
+
+/* High-level operations/functions/methods for A/B that are platform
+ * dependent.
+ */
+struct AvbABOps {
+  /* Operations from libavb. */
+  AvbOps* ops;
+
+  /* Reads A/B metadata from persistent storage. Returned data is
+   * properly byteswapped. Returns AVB_IO_RESULT_OK on success, error
+   * code otherwise.
+   *
+   * If the data read is invalid (e.g. wrong magic or CRC checksum
+   * failure), the metadata shoule be reset using avb_ab_data_init()
+   * and then written to persistent storage.
+   *
+   * Implementations will typically want to use avb_ab_data_read()
+   * here to use the 'misc' partition for persistent storage.
+   */
+  AvbIOResult (*read_ab_metadata)(AvbABOps* ab_ops, struct AvbABData* data);
+
+  /* Writes A/B metadata to persistent storage. This will byteswap and
+   * update the CRC as needed. Returns AVB_IO_RESULT_OK on success,
+   * error code otherwise.
+   *
+   * Implementations will typically want to use avb_ab_data_write()
+   * here to use the 'misc' partition for persistent storage.
+   */
+  AvbIOResult (*write_ab_metadata)(AvbABOps* ab_ops,
+                                   const struct AvbABData* data);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_OPS_H_ */
diff --git a/include/android_avb/avb_atx_ops.h b/include/android_avb/avb_atx_ops.h
index 668a4e2b5b..726dd6a8a1 100644
--- a/include/android_avb/avb_atx_ops.h
+++ b/include/android_avb/avb_atx_ops.h
@@ -1,70 +1,77 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
-#endif
-*/
-
-#ifndef AVB_ATX_OPS_H_
-#define AVB_ATX_OPS_H_
-
-#include <android_avb/libavb.h>
-
-#include <android_avb/avb_atx_types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct AvbAtxOps;
-typedef struct AvbAtxOps AvbAtxOps;
-
-/* An extension to AvbOps required by avb_atx_validate_vbmeta_public_key(). */
-struct AvbAtxOps {
-  /* Operations from libavb. */
-  AvbOps* ops;
-
-  /* Reads permanent |attributes| data. There are no restrictions on where this
-   * data is stored. On success, returns AVB_IO_RESULT_OK and populates
-   * |attributes|.
-   */
-  AvbIOResult (*read_permanent_attributes)(
-      AvbAtxOps* atx_ops, AvbAtxPermanentAttributes* attributes);
-
-  /* Reads a |hash| of permanent attributes. This hash MUST be retrieved from a
-   * permanently read-only location (e.g. fuses) when a device is LOCKED. On
-   * success, returned AVB_IO_RESULT_OK and populates |hash|.
-   */
-  AvbIOResult (*read_permanent_attributes_hash)(
-      AvbAtxOps* atx_ops, uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_ATX_OPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_OPS_H_
+#define AVB_ATX_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbAtxOps;
+typedef struct AvbAtxOps AvbAtxOps;
+
+/* An extension to AvbOps required by avb_atx_validate_vbmeta_public_key(). */
+struct AvbAtxOps {
+  /* Operations from libavb. */
+  AvbOps* ops;
+
+  /* Reads permanent |attributes| data. There are no restrictions on where this
+   * data is stored. On success, returns AVB_IO_RESULT_OK and populates
+   * |attributes|.
+   */
+  AvbIOResult (*read_permanent_attributes)(
+      AvbAtxOps* atx_ops, AvbAtxPermanentAttributes* attributes);
+
+  /* Reads a |hash| of permanent attributes. This hash MUST be retrieved from a
+   * permanently read-only location (e.g. fuses) when a device is LOCKED. On
+   * success, returned AVB_IO_RESULT_OK and populates |hash|.
+   */
+  AvbIOResult (*read_permanent_attributes_hash)(
+      AvbAtxOps* atx_ops, uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
+
+  /* Provides the key version of a key used during verification. This may be
+   * useful for managing the minimum key version.
+   */
+  void (*set_key_version)(AvbAtxOps* atx_ops,
+                          size_t rollback_index_location,
+                          uint64_t key_version);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_OPS_H_ */
diff --git a/include/android_avb/avb_atx_types.h b/include/android_avb/avb_atx_types.h
index e52c11dfd8..9b1c36a3c3 100644
--- a/include/android_avb/avb_atx_types.h
+++ b/include/android_avb/avb_atx_types.h
@@ -1,79 +1,80 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-/*
-#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
-#endif
-*/
-
-#ifndef AVB_ATX_TYPES_H_
-#define AVB_ATX_TYPES_H_
-
-#include <android_avb/libavb.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Size in bytes of an Android Things product ID. */
-#define AVB_ATX_PRODUCT_ID_SIZE 16
-
-/* Size in bytes of a serialized public key with a 4096-bit modulus. */
-#define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
-
-/* Data structure of Android Things permanent attributes. */
-typedef struct AvbAtxPermanentAttributes {
-  uint32_t version;
-  uint8_t product_root_public_key[AVB_ATX_PUBLIC_KEY_SIZE];
-  uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE];
-} AVB_ATTR_PACKED AvbAtxPermanentAttributes;
-
-/* Data structure of signed fields in an Android Things certificate. */
-typedef struct AvbAtxCertificateSignedData {
-  uint32_t version;
-  uint8_t public_key[AVB_ATX_PUBLIC_KEY_SIZE];
-  uint8_t subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t usage[AVB_SHA256_DIGEST_SIZE];
-  uint64_t key_version;
-} AVB_ATTR_PACKED AvbAtxCertificateSignedData;
-
-/* Data structure of an Android Things certificate. */
-typedef struct AvbAtxCertificate {
-  AvbAtxCertificateSignedData signed_data;
-  uint8_t signature[AVB_RSA4096_NUM_BYTES];
-} AVB_ATTR_PACKED AvbAtxCertificate;
-
-/* Data structure of Android Things public key metadata in vbmeta. */
-typedef struct AvbAtxPublicKeyMetadata {
-  uint32_t version;
-  AvbAtxCertificate product_intermediate_key_certificate;
-  AvbAtxCertificate product_signing_key_certificate;
-} AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_ATX_TYPES_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_TYPES_H_
+#define AVB_ATX_TYPES_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size in bytes of an Android Things product ID. */
+#define AVB_ATX_PRODUCT_ID_SIZE 16
+
+/* Size in bytes of a serialized public key with a 4096-bit modulus. */
+#define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
+
+/* Data structure of Android Things permanent attributes. */
+typedef struct AvbAtxPermanentAttributes {
+  uint32_t version;
+  uint8_t product_root_public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE];
+} AVB_ATTR_PACKED AvbAtxPermanentAttributes;
+
+/* Data structure of signed fields in an Android Things certificate. */
+typedef struct AvbAtxCertificateSignedData {
+  uint32_t version;
+  uint8_t public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t usage[AVB_SHA256_DIGEST_SIZE];
+  uint64_t key_version;
+} AVB_ATTR_PACKED AvbAtxCertificateSignedData;
+
+/* Data structure of an Android Things certificate. */
+typedef struct AvbAtxCertificate {
+  AvbAtxCertificateSignedData signed_data;
+  uint8_t signature[AVB_RSA4096_NUM_BYTES];
+} AVB_ATTR_PACKED AvbAtxCertificate;
+
+/* Data structure of Android Things public key metadata in vbmeta. */
+typedef struct AvbAtxPublicKeyMetadata {
+  uint32_t version;
+  AvbAtxCertificate product_intermediate_key_certificate;
+  AvbAtxCertificate product_signing_key_certificate;
+} AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_TYPES_H_ */
diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
index 28d5be030d..9989bb1ddb 100644
--- a/include/android_avb/avb_atx_validate.h
+++ b/include/android_avb/avb_atx_validate.h
@@ -1,104 +1,79 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
-#error \
-    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
-#endif
-*/
-
-#ifndef AVB_ATX_VALIDATE_H_
-#define AVB_ATX_VALIDATE_H_
-
-#include <android_avb/avb_atx_ops.h>
-#include <android_avb/avb_atx_types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Rollback index locations for Android Things key versions. */
-#define AVB_ATX_PIK_VERSION_LOCATION 0x1000
-#define AVB_ATX_PSK_VERSION_LOCATION 0x1001
-
-/**
- * read permanent attributes from rpmb
- *
- * @param atx_ops
- *
- * @param attributes The attributes inclue psk_public product id,
- * 		     ref:AvbAtxPermanentAttributes.
- *
- * @return AvbIOResult
- */
-AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
-				      AvbAtxPermanentAttributes* attributes);
-
-/**
- * read permanent attributes hash from efuse
- *
- * @param atx_ops
- *
- * @param attributes The attributes inclue psk_public product id,
- * 		     ref:AvbAtxPermanentAttributes.
- *
- * @return AvbIOResult
- */
-AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
-					   uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
-/* An implementation of validate_vbmeta_public_key for Android Things. See
- * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
- * implementation uses the metadata expected with Android Things vbmeta images
- * to perform validation on the public key. The ATX ops must be implemented.
- * That is, |ops->atx_ops| must be valid.
- *
- * There are a multiple values that need verification:
- *   - Permanent Product Attributes: A hash of these attributes is fused into
- *                                   hardware. Consistency is checked.
- *   - Product Root Key (PRK): This key is provided in permanent attributes and
- *                             is the root authority for all Android Things
- *                             products.
- *   - Product Intermediate Key (PIK): This key is a rotated intermediary. It is
- *                                     certified by the PRK.
- *   - Product Signing Key (PSK): This key is a rotated authority for a specific
- *                                Android Things product. It is certified by a
- *                                PIK and must match |public_key_data|.
- *   - Product ID: This value is provided in permanent attributes and is unique
- *                 to a specific Android Things product. This value must match
- *                 the subject of the PSK certificate.
- */
-AvbIOResult avb_atx_validate_vbmeta_public_key(
-    AvbOps* ops,
-    const uint8_t* public_key_data,
-    size_t public_key_length,
-    const uint8_t* public_key_metadata,
-    size_t public_key_metadata_length,
-    bool* out_is_trusted);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_ATX_VALIDATE_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_VALIDATE_H_
+#define AVB_ATX_VALIDATE_H_
+
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Rollback index locations for Android Things key versions. */
+#define AVB_ATX_PIK_VERSION_LOCATION 0x1000
+#define AVB_ATX_PSK_VERSION_LOCATION 0x1001
+
+/* An implementation of validate_vbmeta_public_key for Android Things. See
+ * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
+ * implementation uses the metadata expected with Android Things vbmeta images
+ * to perform validation on the public key. The ATX ops must be implemented.
+ * That is, |ops->atx_ops| must be valid.
+ *
+ * There are a multiple values that need verification:
+ *   - Permanent Product Attributes: A hash of these attributes is fused into
+ *                                   hardware. Consistency is checked.
+ *   - Product Root Key (PRK): This key is provided in permanent attributes and
+ *                             is the root authority for all Android Things
+ *                             products.
+ *   - Product Intermediate Key (PIK): This key is a rotated intermediary. It is
+ *                                     certified by the PRK.
+ *   - Product Signing Key (PSK): This key is a rotated authority for a specific
+ *                                Android Things product. It is certified by a
+ *                                PIK and must match |public_key_data|.
+ *   - Product ID: This value is provided in permanent attributes and is unique
+ *                 to a specific Android Things product. This value must match
+ *                 the subject of the PSK certificate.
+ */
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_VALIDATE_H_ */
diff --git a/include/android_avb/avb_chain_partition_descriptor.h b/include/android_avb/avb_chain_partition_descriptor.h
index 3e5395fec5..2c0a38d58a 100644
--- a/include/android_avb/avb_chain_partition_descriptor.h
+++ b/include/android_avb/avb_chain_partition_descriptor.h
@@ -1,74 +1,74 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_CHAIN_PARTITION_DESCRIPTOR_H_
-#define AVB_CHAIN_PARTITION_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor containing a pointer to signed integrity data stored
- * on another partition. The descriptor contains the partition name in
- * question (without the A/B suffix), the public key used to sign the
- * integrity data, and rollback index location to use for rollback
- * protection.
- *
- * Following this struct are |partition_name_len| bytes of the
- * partition name (UTF-8 encoded) and |public_key_len| bytes of the
- * public key.
- *
- * The |reserved| field is for future expansion and must be set to NUL
- * bytes.
- */
-typedef struct AvbChainPartitionDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint32_t rollback_index_location;
-  uint32_t partition_name_len;
-  uint32_t public_key_len;
-  uint8_t reserved[64];
-} AVB_ATTR_PACKED AvbChainPartitionDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_chain_partition_descriptor_validate_and_byteswap(
-    const AvbChainPartitionDescriptor* src,
-    AvbChainPartitionDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_CHAIN_PARTITION_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+#define AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing a pointer to signed integrity data stored
+ * on another partition. The descriptor contains the partition name in
+ * question (without the A/B suffix), the public key used to sign the
+ * integrity data, and rollback index location to use for rollback
+ * protection.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded) and |public_key_len| bytes of the
+ * public key.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbChainPartitionDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t rollback_index_location;
+  uint32_t partition_name_len;
+  uint32_t public_key_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbChainPartitionDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src,
+    AvbChainPartitionDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CHAIN_PARTITION_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_cmdline.h b/include/android_avb/avb_cmdline.h
new file mode 100644
index 0000000000..717381a3f4
--- /dev/null
+++ b/include/android_avb/avb_cmdline.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+*/
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_CMDLINE_H_
+#define AVB_CMDLINE_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_slot_verify.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define AVB_PART_NAME_MAX_SIZE 32
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
+                      bool using_boot_for_vbmeta);
+
+AvbSlotVerifyResult avb_append_options(
+    AvbOps* ops,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode);
+
+#endif
diff --git a/include/android_avb/avb_crypto.h b/include/android_avb/avb_crypto.h
index a5b790cc55..b99a905d70 100644
--- a/include/android_avb/avb_crypto.h
+++ b/include/android_avb/avb_crypto.h
@@ -1,167 +1,167 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_CRYPTO_H_
-#define AVB_CRYPTO_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Size of a RSA-2048 signature. */
-#define AVB_RSA2048_NUM_BYTES 256
-
-/* Size of a RSA-4096 signature. */
-#define AVB_RSA4096_NUM_BYTES 512
-
-/* Size of a RSA-8192 signature. */
-#define AVB_RSA8192_NUM_BYTES 1024
-
-/* Size in bytes of a SHA-256 digest. */
-#define AVB_SHA256_DIGEST_SIZE 32
-
-/* Size in bytes of a SHA-512 digest. */
-#define AVB_SHA512_DIGEST_SIZE 64
-
-/* Algorithms that can be used in the vbmeta image for
- * verification. An algorithm consists of a hash type and a signature
- * type.
- *
- * The data used to calculate the hash is the three blocks mentioned
- * in the documentation for |AvbVBMetaImageHeader| except for the data
- * in the "Authentication data" block.
- *
- * For signatures with RSA keys, PKCS v1.5 padding is used. The public
- * key data is stored in the auxiliary data block, see
- * |AvbRSAPublicKeyHeader| for the serialization format.
- *
- * Each algorithm type is described below:
- *
- * AVB_ALGORITHM_TYPE_NONE: There is no hash, no signature of the
- * data, and no public key. The data cannot be verified. The fields
- * |hash_size|, |signature_size|, and |public_key_size| must be zero.
- *
- * AVB_ALGORITHM_TYPE_SHA256_RSA2048: The hash function used is
- * SHA-256, resulting in 32 bytes of hash digest data. This hash is
- * signed with a 2048-bit RSA key. The field |hash_size| must be 32,
- * |signature_size| must be 256, and the public key data must have
- * |key_num_bits| set to 2048.
- *
- * AVB_ALGORITHM_TYPE_SHA256_RSA4096: Like above, but only with
- * a 4096-bit RSA key and |signature_size| set to 512.
- *
- * AVB_ALGORITHM_TYPE_SHA256_RSA8192: Like above, but only with
- * a 8192-bit RSA key and |signature_size| set to 1024.
- *
- * AVB_ALGORITHM_TYPE_SHA512_RSA2048: The hash function used is
- * SHA-512, resulting in 64 bytes of hash digest data. This hash is
- * signed with a 2048-bit RSA key. The field |hash_size| must be 64,
- * |signature_size| must be 256, and the public key data must have
- * |key_num_bits| set to 2048.
- *
- * AVB_ALGORITHM_TYPE_SHA512_RSA4096: Like above, but only with
- * a 4096-bit RSA key and |signature_size| set to 512.
- *
- * AVB_ALGORITHM_TYPE_SHA512_RSA8192: Like above, but only with
- * a 8192-bit RSA key and |signature_size| set to 1024.
- */
-typedef enum {
-  AVB_ALGORITHM_TYPE_NONE,
-  AVB_ALGORITHM_TYPE_SHA256_RSA2048,
-  AVB_ALGORITHM_TYPE_SHA256_RSA4096,
-  AVB_ALGORITHM_TYPE_SHA256_RSA8192,
-  AVB_ALGORITHM_TYPE_SHA512_RSA2048,
-  AVB_ALGORITHM_TYPE_SHA512_RSA4096,
-  AVB_ALGORITHM_TYPE_SHA512_RSA8192,
-  _AVB_ALGORITHM_NUM_TYPES
-} AvbAlgorithmType;
-
-/* Holds algorithm-specific data. The |padding| is needed by avb_rsa_verify. */
-typedef struct {
-  const uint8_t* padding;
-  size_t padding_len;
-  size_t hash_len;
-} AvbAlgorithmData;
-
-/* Provides algorithm-specific data for a given |algorithm|. Returns NULL if
- * |algorithm| is invalid.
- */
-const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* The header for a serialized RSA public key.
- *
- * The size of the key is given by |key_num_bits|, for example 2048
- * for a RSA-2048 key. By definition, a RSA public key is the pair (n,
- * e) where |n| is the modulus (which can be represented in
- * |key_num_bits| bits) and |e| is the public exponent. The exponent
- * is not stored since it's assumed to always be 65537.
- *
- * To optimize verification, the key block includes two precomputed
- * values, |n0inv| (fits in 32 bits) and |rr| and can always be
- * represented in |key_num_bits|.
-
- * The value |n0inv| is the value -1/n[0] (mod 2^32). The value |rr|
- * is (2^key_num_bits)^2 (mod n).
- *
- * Following this header is |key_num_bits| bits of |n|, then
- * |key_num_bits| bits of |rr|. Both values are stored with most
- * significant bit first. Each serialized number takes up
- * |key_num_bits|/8 bytes.
- *
- * All fields in this struct are stored in network byte order when
- * serialized.  To generate a copy with fields swapped to native byte
- * order, use the function avb_rsa_public_key_header_validate_and_byteswap().
- *
- * The avb_rsa_verify() function expects a key in this serialized
- * format.
- *
- * The 'avbtool extract_public_key' command can be used to generate a
- * serialized RSA public key.
- */
-typedef struct AvbRSAPublicKeyHeader {
-  uint32_t key_num_bits;
-  uint32_t n0inv;
-} AVB_ATTR_PACKED AvbRSAPublicKeyHeader;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- */
-bool avb_rsa_public_key_header_validate_and_byteswap(
-    const AvbRSAPublicKeyHeader* src,
-    AvbRSAPublicKeyHeader* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_CRYPTO_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CRYPTO_H_
+#define AVB_CRYPTO_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size of a RSA-2048 signature. */
+#define AVB_RSA2048_NUM_BYTES 256
+
+/* Size of a RSA-4096 signature. */
+#define AVB_RSA4096_NUM_BYTES 512
+
+/* Size of a RSA-8192 signature. */
+#define AVB_RSA8192_NUM_BYTES 1024
+
+/* Size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_DIGEST_SIZE 32
+
+/* Size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_DIGEST_SIZE 64
+
+/* Algorithms that can be used in the vbmeta image for
+ * verification. An algorithm consists of a hash type and a signature
+ * type.
+ *
+ * The data used to calculate the hash is the three blocks mentioned
+ * in the documentation for |AvbVBMetaImageHeader| except for the data
+ * in the "Authentication data" block.
+ *
+ * For signatures with RSA keys, PKCS v1.5 padding is used. The public
+ * key data is stored in the auxiliary data block, see
+ * |AvbRSAPublicKeyHeader| for the serialization format.
+ *
+ * Each algorithm type is described below:
+ *
+ * AVB_ALGORITHM_TYPE_NONE: There is no hash, no signature of the
+ * data, and no public key. The data cannot be verified. The fields
+ * |hash_size|, |signature_size|, and |public_key_size| must be zero.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA2048: The hash function used is
+ * SHA-256, resulting in 32 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 32,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA2048: The hash function used is
+ * SHA-512, resulting in 64 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 64,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ */
+typedef enum {
+  AVB_ALGORITHM_TYPE_NONE,
+  AVB_ALGORITHM_TYPE_SHA256_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA256_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA256_RSA8192,
+  AVB_ALGORITHM_TYPE_SHA512_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA512_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA512_RSA8192,
+  _AVB_ALGORITHM_NUM_TYPES
+} AvbAlgorithmType;
+
+/* Holds algorithm-specific data. The |padding| is needed by avb_rsa_verify. */
+typedef struct {
+  const uint8_t* padding;
+  size_t padding_len;
+  size_t hash_len;
+} AvbAlgorithmData;
+
+/* Provides algorithm-specific data for a given |algorithm|. Returns NULL if
+ * |algorithm| is invalid.
+ */
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* The header for a serialized RSA public key.
+ *
+ * The size of the key is given by |key_num_bits|, for example 2048
+ * for a RSA-2048 key. By definition, a RSA public key is the pair (n,
+ * e) where |n| is the modulus (which can be represented in
+ * |key_num_bits| bits) and |e| is the public exponent. The exponent
+ * is not stored since it's assumed to always be 65537.
+ *
+ * To optimize verification, the key block includes two precomputed
+ * values, |n0inv| (fits in 32 bits) and |rr| and can always be
+ * represented in |key_num_bits|.
+
+ * The value |n0inv| is the value -1/n[0] (mod 2^32). The value |rr|
+ * is (2^key_num_bits)^2 (mod n).
+ *
+ * Following this header is |key_num_bits| bits of |n|, then
+ * |key_num_bits| bits of |rr|. Both values are stored with most
+ * significant bit first. Each serialized number takes up
+ * |key_num_bits|/8 bytes.
+ *
+ * All fields in this struct are stored in network byte order when
+ * serialized.  To generate a copy with fields swapped to native byte
+ * order, use the function avb_rsa_public_key_header_validate_and_byteswap().
+ *
+ * The avb_rsa_verify() function expects a key in this serialized
+ * format.
+ *
+ * The 'avbtool extract_public_key' command can be used to generate a
+ * serialized RSA public key.
+ */
+typedef struct AvbRSAPublicKeyHeader {
+  uint32_t key_num_bits;
+  uint32_t n0inv;
+} AVB_ATTR_PACKED AvbRSAPublicKeyHeader;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src,
+    AvbRSAPublicKeyHeader* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CRYPTO_H_ */
diff --git a/include/android_avb/avb_descriptor.h b/include/android_avb/avb_descriptor.h
index 9b0ef2a46f..2af9f5a5c2 100644
--- a/include/android_avb/avb_descriptor.h
+++ b/include/android_avb/avb_descriptor.h
@@ -1,133 +1,133 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_DESCRIPTOR_H_
-#define AVB_DESCRIPTOR_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Well-known descriptor tags.
- *
- * AVB_DESCRIPTOR_TAG_PROPERTY: see |AvbPropertyDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_HASHTREE: see |AvbHashtreeDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_HASH: see |AvbHashDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: see |AvbKernelCmdlineDescriptor| struct.
- * AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: see |AvbChainPartitionDescriptor| struct.
- */
-typedef enum {
-  AVB_DESCRIPTOR_TAG_PROPERTY,
-  AVB_DESCRIPTOR_TAG_HASHTREE,
-  AVB_DESCRIPTOR_TAG_HASH,
-  AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE,
-  AVB_DESCRIPTOR_TAG_CHAIN_PARTITION,
-} AvbDescriptorTag;
-
-/* The header for a serialized descriptor.
- *
- * A descriptor always have two fields, a |tag| (denoting its type,
- * see the |AvbDescriptorTag| enumeration) and the size of the bytes
- * following, |num_bytes_following|.
- *
- * For padding, |num_bytes_following| is always a multiple of 8.
- */
-typedef struct AvbDescriptor {
-  uint64_t tag;
-  uint64_t num_bytes_following;
-} AVB_ATTR_PACKED AvbDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_descriptor_validate_and_byteswap(
-    const AvbDescriptor* src, AvbDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Signature for callback function used in avb_descriptor_foreach().
- * The passed in descriptor is given by |descriptor| and the
- * |user_data| passed to avb_descriptor_foreach() function is in
- * |user_data|. Return true to continue iterating, false to stop
- * iterating.
- *
- * Note that |descriptor| points into the image passed to
- * avb_descriptor_foreach() - all fields need to be byteswapped!
- */
-typedef bool AvbDescriptorForeachFunc(const AvbDescriptor* descriptor,
-                                      void* user_data);
-
-/* Convenience function to iterate over all descriptors in an vbmeta
- * image.
- *
- * The function given by |foreach_func| will be called for each
- * descriptor. The given function should return true to continue
- * iterating, false to stop.
- *
- * The |user_data| parameter will be passed to |foreach_func|.
- *
- * Returns false if the iteration was short-circuited, that is if
- * an invocation of |foreach_func| returned false.
- *
- * Before using this function, you MUST verify |image_data| with
- * avb_vbmeta_image_verify() and reject it unless it's signed by a known
- * good public key. Additionally, |image_data| must be word-aligned.
- */
-bool avb_descriptor_foreach(const uint8_t* image_data,
-                            size_t image_size,
-                            AvbDescriptorForeachFunc foreach_func,
-                            void* user_data);
-
-/* Gets all descriptors in a vbmeta image.
- *
- * The return value is a NULL-pointer terminated array of
- * AvbDescriptor pointers. Free with avb_free() when you are done with
- * it. If |out_num_descriptors| is non-NULL, the number of descriptors
- * will be returned there.
- *
- * Note that each AvbDescriptor pointer in the array points into
- * |image_data| - all fields need to be byteswapped!
- *
- * Before using this function, you MUST verify |image_data| with
- * avb_vbmeta_image_verify() and reject it unless it's signed by a known
- * good public key. Additionally, |image_data| must be word-aligned.
- */
-const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
-                                             size_t image_size,
-                                             size_t* out_num_descriptors)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_DESCRIPTOR_H_
+#define AVB_DESCRIPTOR_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Well-known descriptor tags.
+ *
+ * AVB_DESCRIPTOR_TAG_PROPERTY: see |AvbPropertyDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASHTREE: see |AvbHashtreeDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASH: see |AvbHashDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: see |AvbKernelCmdlineDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: see |AvbChainPartitionDescriptor| struct.
+ */
+typedef enum {
+  AVB_DESCRIPTOR_TAG_PROPERTY,
+  AVB_DESCRIPTOR_TAG_HASHTREE,
+  AVB_DESCRIPTOR_TAG_HASH,
+  AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE,
+  AVB_DESCRIPTOR_TAG_CHAIN_PARTITION,
+} AvbDescriptorTag;
+
+/* The header for a serialized descriptor.
+ *
+ * A descriptor always have two fields, a |tag| (denoting its type,
+ * see the |AvbDescriptorTag| enumeration) and the size of the bytes
+ * following, |num_bytes_following|.
+ *
+ * For padding, |num_bytes_following| is always a multiple of 8.
+ */
+typedef struct AvbDescriptor {
+  uint64_t tag;
+  uint64_t num_bytes_following;
+} AVB_ATTR_PACKED AvbDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_descriptor_validate_and_byteswap(
+    const AvbDescriptor* src, AvbDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Signature for callback function used in avb_descriptor_foreach().
+ * The passed in descriptor is given by |descriptor| and the
+ * |user_data| passed to avb_descriptor_foreach() function is in
+ * |user_data|. Return true to continue iterating, false to stop
+ * iterating.
+ *
+ * Note that |descriptor| points into the image passed to
+ * avb_descriptor_foreach() - all fields need to be byteswapped!
+ */
+typedef bool AvbDescriptorForeachFunc(const AvbDescriptor* descriptor,
+                                      void* user_data);
+
+/* Convenience function to iterate over all descriptors in an vbmeta
+ * image.
+ *
+ * The function given by |foreach_func| will be called for each
+ * descriptor. The given function should return true to continue
+ * iterating, false to stop.
+ *
+ * The |user_data| parameter will be passed to |foreach_func|.
+ *
+ * Returns false if the iteration was short-circuited, that is if
+ * an invocation of |foreach_func| returned false.
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data);
+
+/* Gets all descriptors in a vbmeta image.
+ *
+ * The return value is a NULL-pointer terminated array of
+ * AvbDescriptor pointers. Free with avb_free() when you are done with
+ * it. If |out_num_descriptors| is non-NULL, the number of descriptors
+ * will be returned there.
+ *
+ * Note that each AvbDescriptor pointer in the array points into
+ * |image_data| - all fields need to be byteswapped!
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_footer.h b/include/android_avb/avb_footer.h
index 48f2c378d5..668d553adb 100644
--- a/include/android_avb/avb_footer.h
+++ b/include/android_avb/avb_footer.h
@@ -1,88 +1,88 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_FOOTER_H_
-#define AVB_FOOTER_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Magic for the footer. */
-#define AVB_FOOTER_MAGIC "AVBf"
-#define AVB_FOOTER_MAGIC_LEN 4
-
-/* Size of the footer. */
-#define AVB_FOOTER_SIZE 64
-
-/* The current footer version used - keep in sync with avbtool. */
-#define AVB_FOOTER_VERSION_MAJOR 1
-#define AVB_FOOTER_VERSION_MINOR 0
-
-/* The struct used as a footer used on partitions, used to find the
- * AvbVBMetaImageHeader struct. This struct is always stored at the
- * end of a partition.
- */
-typedef struct AvbFooter {
-  /*   0: Four bytes equal to "AVBf" (AVB_FOOTER_MAGIC). */
-  uint8_t magic[AVB_FOOTER_MAGIC_LEN];
-  /*   4: The major version of the footer struct. */
-  uint32_t version_major;
-  /*   8: The minor version of the footer struct. */
-  uint32_t version_minor;
-
-  /*  12: The original size of the image on the partition. */
-  uint64_t original_image_size;
-
-  /*  20: The offset of the |AvbVBMetaImageHeader| struct. */
-  uint64_t vbmeta_offset;
-
-  /*  28: The size of the vbmeta block (header + auth + aux blocks). */
-  uint64_t vbmeta_size;
-
-  /*  36: Padding to ensure struct is size AVB_FOOTER_SIZE bytes. This
-   * must be set to zeroes.
-   */
-  uint8_t reserved[28];
-} AVB_ATTR_PACKED AvbFooter;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- */
-bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_FOOTER_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_FOOTER_H_
+#define AVB_FOOTER_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the footer. */
+#define AVB_FOOTER_MAGIC "AVBf"
+#define AVB_FOOTER_MAGIC_LEN 4
+
+/* Size of the footer. */
+#define AVB_FOOTER_SIZE 64
+
+/* The current footer version used - keep in sync with avbtool. */
+#define AVB_FOOTER_VERSION_MAJOR 1
+#define AVB_FOOTER_VERSION_MINOR 0
+
+/* The struct used as a footer used on partitions, used to find the
+ * AvbVBMetaImageHeader struct. This struct is always stored at the
+ * end of a partition.
+ */
+typedef struct AvbFooter {
+  /*   0: Four bytes equal to "AVBf" (AVB_FOOTER_MAGIC). */
+  uint8_t magic[AVB_FOOTER_MAGIC_LEN];
+  /*   4: The major version of the footer struct. */
+  uint32_t version_major;
+  /*   8: The minor version of the footer struct. */
+  uint32_t version_minor;
+
+  /*  12: The original size of the image on the partition. */
+  uint64_t original_image_size;
+
+  /*  20: The offset of the |AvbVBMetaImageHeader| struct. */
+  uint64_t vbmeta_offset;
+
+  /*  28: The size of the vbmeta block (header + auth + aux blocks). */
+  uint64_t vbmeta_size;
+
+  /*  36: Padding to ensure struct is size AVB_FOOTER_SIZE bytes. This
+   * must be set to zeroes.
+   */
+  uint8_t reserved[28];
+} AVB_ATTR_PACKED AvbFooter;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_FOOTER_H_ */
diff --git a/include/android_avb/avb_hash_descriptor.h b/include/android_avb/avb_hash_descriptor.h
index 57333ad97a..ef3f27117a 100644
--- a/include/android_avb/avb_hash_descriptor.h
+++ b/include/android_avb/avb_hash_descriptor.h
@@ -1,75 +1,75 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_HASH_DESCRIPTOR_H_
-#define AVB_HASH_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor containing information about hash for an image.
- *
- * This descriptor is typically used for boot partitions to verify the
- * entire kernel+initramfs image before executing it.
- *
- * Following this struct are |partition_name_len| bytes of the
- * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
- * |digest_len| bytes of the digest.
- *
- * The |reserved| field is for future expansion and must be set to NUL
- * bytes.
- */
-typedef struct AvbHashDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint64_t image_size;
-  uint8_t hash_algorithm[32];
-  uint32_t partition_name_len;
-  uint32_t salt_len;
-  uint32_t digest_len;
-  uint8_t reserved[64];
-} AVB_ATTR_PACKED AvbHashDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
-                                               AvbHashDescriptor* dest)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_HASH_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASH_DESCRIPTOR_H_
+#define AVB_HASH_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about hash for an image.
+ *
+ * This descriptor is typically used for boot partitions to verify the
+ * entire kernel+initramfs image before executing it.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |digest_len| bytes of the digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t image_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASH_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_hashtree_descriptor.h b/include/android_avb/avb_hashtree_descriptor.h
index e4e0218c0e..d579275e73 100644
--- a/include/android_avb/avb_hashtree_descriptor.h
+++ b/include/android_avb/avb_hashtree_descriptor.h
@@ -1,85 +1,85 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_HASHTREE_DESCRIPTOR_H_
-#define AVB_HASHTREE_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor containing information about a dm-verity hashtree.
- *
- * Hash-trees are used to verify large partitions typically containing
- * file systems. See
- * https://gitlab.com/cryptsetup/cryptsetup/wikis/DMVerity for more
- * information about dm-verity.
- *
- * Following this struct are |partition_name_len| bytes of the
- * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
- * |root_digest_len| bytes of the root digest.
- *
- * The |reserved| field is for future expansion and must be set to NUL
- * bytes.
- */
-typedef struct AvbHashtreeDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint32_t dm_verity_version;
-  uint64_t image_size;
-  uint64_t tree_offset;
-  uint64_t tree_size;
-  uint32_t data_block_size;
-  uint32_t hash_block_size;
-  uint32_t fec_num_roots;
-  uint64_t fec_offset;
-  uint64_t fec_size;
-  uint8_t hash_algorithm[32];
-  uint32_t partition_name_len;
-  uint32_t salt_len;
-  uint32_t root_digest_len;
-  uint8_t reserved[64];
-} AVB_ATTR_PACKED AvbHashtreeDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_hashtree_descriptor_validate_and_byteswap(
-    const AvbHashtreeDescriptor* src,
-    AvbHashtreeDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_HASHTREE_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASHTREE_DESCRIPTOR_H_
+#define AVB_HASHTREE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about a dm-verity hashtree.
+ *
+ * Hash-trees are used to verify large partitions typically containing
+ * file systems. See
+ * https://gitlab.com/cryptsetup/cryptsetup/wikis/DMVerity for more
+ * information about dm-verity.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |root_digest_len| bytes of the root digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashtreeDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t dm_verity_version;
+  uint64_t image_size;
+  uint64_t tree_offset;
+  uint64_t tree_size;
+  uint32_t data_block_size;
+  uint32_t hash_block_size;
+  uint32_t fec_num_roots;
+  uint64_t fec_offset;
+  uint64_t fec_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t root_digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashtreeDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src,
+    AvbHashtreeDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASHTREE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_kernel_cmdline_descriptor.h b/include/android_avb/avb_kernel_cmdline_descriptor.h
index aee042cded..af9bba2f66 100644
--- a/include/android_avb/avb_kernel_cmdline_descriptor.h
+++ b/include/android_avb/avb_kernel_cmdline_descriptor.h
@@ -1,83 +1,83 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
-#define AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Flags for kernel command-line descriptors.
- *
- * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED: The
- * cmdline will only be applied if hashtree verification is not
- * disabled (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
- *
- * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED: The cmdline
- * will only be applied if hashtree verification is disabled
- * (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
- */
-typedef enum {
-  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED = (1 << 0),
-  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED = (1 << 1)
-} AvbKernelCmdlineFlags;
-
-/* A descriptor containing information to be appended to the kernel
- * command-line.
- *
- * The |flags| field contains flags from the AvbKernelCmdlineFlags
- * enumeration.
- *
- * Following this struct are |kernel_cmdline_len| bytes with the
- * kernel command-line (UTF-8 encoded).
- */
-typedef struct AvbKernelCmdlineDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint32_t flags;
-  uint32_t kernel_cmdline_length;
-} AVB_ATTR_PACKED AvbKernelCmdlineDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
-    const AvbKernelCmdlineDescriptor* src,
-    AvbKernelCmdlineDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_KERNEL_CMDLINE_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+#define AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Flags for kernel command-line descriptors.
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED: The
+ * cmdline will only be applied if hashtree verification is not
+ * disabled (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED: The cmdline
+ * will only be applied if hashtree verification is disabled
+ * (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ */
+typedef enum {
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED = (1 << 0),
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED = (1 << 1)
+} AvbKernelCmdlineFlags;
+
+/* A descriptor containing information to be appended to the kernel
+ * command-line.
+ *
+ * The |flags| field contains flags from the AvbKernelCmdlineFlags
+ * enumeration.
+ *
+ * Following this struct are |kernel_cmdline_len| bytes with the
+ * kernel command-line (UTF-8 encoded).
+ */
+typedef struct AvbKernelCmdlineDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t flags;
+  uint32_t kernel_cmdline_length;
+} AVB_ATTR_PACKED AvbKernelCmdlineDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src,
+    AvbKernelCmdlineDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_KERNEL_CMDLINE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
index 0900b0e0be..2a418454d4 100644
--- a/include/android_avb/avb_ops.h
+++ b/include/android_avb/avb_ops.h
@@ -1,231 +1,256 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_OPS_H_
-#define AVB_OPS_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Return codes used for I/O operations.
- *
- * AVB_IO_RESULT_OK is returned if the requested operation was
- * successful.
- *
- * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
- * or other subsystem) encountered an I/O error.
- *
- * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
- *
- * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
- * partition does not exist.
- *
- * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
- * range of bytes requested to be read or written is outside the range
- * of the partition.
- */
-typedef enum {
-	AVB_IO_RESULT_OK,
-	AVB_IO_RESULT_ERROR_OOM,
-	AVB_IO_RESULT_ERROR_IO,
-	AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
-	AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
-} AvbIOResult;
-
-struct AvbOps;
-typedef struct AvbOps AvbOps;
-
-/* Forward-declaration of operations in libavb_ab. */
-struct AvbABOps;
-
-/* Forward-declaration of operations in libavb_atx. */
-struct AvbAtxOps;
-
-/* High-level operations/functions/methods that are platform
- * dependent.
- *
- * Operations may be added in the future so when implementing it
- * always make sure to zero out sizeof(AvbOps) bytes of the struct to
- * ensure that unimplemented operations are set to NULL.
- */
-struct AvbOps {
-	/* This pointer can be used by the application/bootloader using
-	 * libavb and is typically used in each operation to get a pointer
-	 * to platform-specific resources. It cannot be used by libraries.
-	 */
-	void* user_data;
-
-	/* If libavb_ab is used, this should point to the
-	 * AvbABOps. Otherwise it must be set to NULL.
-	 */
-	struct AvbABOps* ab_ops;
-
-	/* If libavb_atx is used, this should point to the
-	 * AvbAtxOps. Otherwise it must be set to NULL.
-	 */
-	struct AvbAtxOps* atx_ops;
-
-	/* Reads |num_bytes| from offset |offset| from partition with name
-	 * |partition| (NUL-terminated UTF-8 string). If |offset| is
-	 * negative, its absolute value should be interpreted as the number
-	 * of bytes from the end of the partition.
-	 *
-	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
-	 * there is no partition with the given name,
-	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
-	 * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
-	 * there was an I/O error from the underlying I/O subsystem.  If the
-	 * operation succeeds as requested AVB_IO_RESULT_OK is returned and
-	 * the data is available in |buffer|.
-	 *
-	 * The only time partial I/O may occur is if reading beyond the end
-	 * of the partition. In this case the value returned in
-	 * |out_num_read| may be smaller than |num_bytes|.
-	 */
-	AvbIOResult (*read_from_partition)(AvbOps* ops,
-                                       const char* partition,
-                                       int64_t offset,
-                                       size_t num_bytes,
-                                       void* buffer,
-                                       size_t* out_num_read);
-
-	/* Writes |num_bytes| from |bffer| at offset |offset| to partition
-	 * with name |partition| (NUL-terminated UTF-8 string). If |offset|
-	 * is negative, its absolute value should be interpreted as the
-	 * number of bytes from the end of the partition.
-	 *
-	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
-	 * there is no partition with the given name,
-	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
-	 * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
-	 * if there was an I/O error from the underlying I/O subsystem.  If
-	 * the operation succeeds as requested AVB_IO_RESULT_OK is
-	 * returned.
-	 *
-	 * This function never does any partial I/O, it either transfers all
-	 * of the requested bytes or returns an error.
-	 */
-	AvbIOResult (*write_to_partition)(AvbOps* ops,
-                                      const char* partition,
-                                      int64_t offset,
-                                      size_t num_bytes,
-                                      const void* buffer);
-
-	/* Checks if the given public key used to sign the 'vbmeta'
-	 * partition is trusted. Boot loaders typically compare this with
-	 * embedded key material generated with 'avbtool
-	 * extract_public_key'.
-	 *
-	 * The public key is in the array pointed to by |public_key_data|
-	 * and is of |public_key_length| bytes.
-	 *
-	 * If there is no public key metadata (set with the avbtool option
-	 * --public_key_metadata) then |public_key_metadata| will be set to
-	 * NULL. Otherwise this field points to the data which is
-	 * |public_key_metadata_length| bytes long.
-	 *
-	 * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
-	 * true if trusted or false if untrusted.
-	 */
-	AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
-                                            	  const uint8_t* public_key_data,
-                                            	  size_t public_key_length,
-                                            	  const uint8_t* public_key_metadata,
-                                            	  size_t public_key_metadata_length,
-                                            	  bool* out_is_trusted);
-
-	/* Gets the rollback index corresponding to the location given by
-	 * |rollback_index_location|. The value is returned in
-	 * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
-	 * index was retrieved, otherwise an error code.
-	 *
-	 * A device may have a limited amount of rollback index locations (say,
-	 * one or four) so may error out if |rollback_index_location| exceeds
-	 * this number.
-	 */
-	AvbIOResult (*read_rollback_index)(AvbOps* ops,
-                                     	   size_t rollback_index_location,
-                                     	   uint64_t* out_rollback_index);
-
-	/* Sets the rollback index corresponding to the location given by
-	 * |rollback_index_location| to |rollback_index|. Returns
-	 * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
-	 * error code.
-	 *
-	 * A device may have a limited amount of rollback index locations (say,
-	 * one or four) so may error out if |rollback_index_location| exceeds
-	 * this number.
-	 */
-	AvbIOResult (*write_rollback_index)(AvbOps* ops,
-                                      	    size_t rollback_index_location,
-                                      	    uint64_t rollback_index);
-
-	/* Gets whether the device is unlocked. The value is returned in
-	 * |out_is_unlocked| (true if unlocked, false otherwise). Returns
-	 * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
-	 * code.
-	 */
-	AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
-	AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
-
-	/* Gets the unique partition GUID for a partition with name in
-	 * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
-	 * a string into |guid_buf| of size |guid_buf_size| and will be NUL
-	 * terminated. The string must be lower-case and properly
-	 * hyphenated. For example:
-	 *
-	 *  527c1c6d-6361-4593-8842-3c78fcd39219
-	 *
-	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-	 */
-	 AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
-                                                      const char* partition,
-                                                      char* guid_buf,
-                                                      size_t guid_buf_size);
-
-	/* Gets the size of a partition with the name in |partition|
-	 * (NUL-terminated UTF-8 string). Returns the value in
-	 * |out_size_num_bytes|.
-	 *
-	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
-	 */
-	AvbIOResult (*get_size_of_partition)(AvbOps* ops,
-                                       	     const char* partition,
-                                             uint64_t* out_size_num_bytes);
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_OPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_OPS_H_
+#define AVB_OPS_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used for I/O operations.
+ *
+ * AVB_IO_RESULT_OK is returned if the requested operation was
+ * successful.
+ *
+ * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
+ * or other subsystem) encountered an I/O error.
+ *
+ * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
+ * partition does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
+ * range of bytes requested to be read or written is outside the range
+ * of the partition.
+ */
+typedef enum {
+  AVB_IO_RESULT_OK,
+  AVB_IO_RESULT_ERROR_OOM,
+  AVB_IO_RESULT_ERROR_IO,
+  AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
+  AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
+} AvbIOResult;
+
+struct AvbOps;
+typedef struct AvbOps AvbOps;
+
+/* Forward-declaration of operations in libavb_ab. */
+struct AvbABOps;
+
+/* Forward-declaration of operations in libavb_atx. */
+struct AvbAtxOps;
+
+/* High-level operations/functions/methods that are platform
+ * dependent.
+ *
+ * Operations may be added in the future so when implementing it
+ * always make sure to zero out sizeof(AvbOps) bytes of the struct to
+ * ensure that unimplemented operations are set to NULL.
+ */
+struct AvbOps {
+  /* This pointer can be used by the application/bootloader using
+   * libavb and is typically used in each operation to get a pointer
+   * to platform-specific resources. It cannot be used by libraries.
+   */
+  void* user_data;
+
+  /* If libavb_ab is used, this should point to the
+   * AvbABOps. Otherwise it must be set to NULL.
+   */
+  struct AvbABOps* ab_ops;
+
+  /* If libavb_atx is used, this should point to the
+   * AvbAtxOps. Otherwise it must be set to NULL.
+   */
+  struct AvbAtxOps* atx_ops;
+
+  /* Reads |num_bytes| from offset |offset| from partition with name
+   * |partition| (NUL-terminated UTF-8 string). If |offset| is
+   * negative, its absolute value should be interpreted as the number
+   * of bytes from the end of the partition.
+   *
+   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+   * there is no partition with the given name,
+   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+   * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
+   * there was an I/O error from the underlying I/O subsystem.  If the
+   * operation succeeds as requested AVB_IO_RESULT_OK is returned and
+   * the data is available in |buffer|.
+   *
+   * The only time partial I/O may occur is if reading beyond the end
+   * of the partition. In this case the value returned in
+   * |out_num_read| may be smaller than |num_bytes|.
+   */
+  AvbIOResult (*read_from_partition)(AvbOps* ops,
+                                     const char* partition,
+                                     int64_t offset,
+                                     size_t num_bytes,
+                                     void* buffer,
+                                     size_t* out_num_read);
+
+  /* Gets the starting pointer of a partition that is pre-loaded in memory, and
+   * save it to |out_pointer|. The preloaded partition is expected to be
+   * |num_bytes|, where the actual preloaded byte count is returned in
+   * |out_num_bytes_preloaded|. |out_num_bytes_preloaded| must be no larger than
+   * |num_bytes|.
+   *
+   * This provides an alternative way to access a partition that is preloaded
+   * into memory without a full memory copy. When this function pointer is not
+   * set (has value NULL), or when the |out_pointer| is set to NULL as a result,
+   * |read_from_partition| will be used as the fallback. This function is mainly
+   * used for accessing the entire partition content to calculate its hash.
+   *
+   * Preloaded partition data must outlive the lifespan of the
+   * |AvbSlotVerifyData| structure that |avb_slot_verify| outputs.
+   */
+  AvbIOResult (*get_preloaded_partition)(AvbOps* ops,
+                                         const char* partition,
+                                         size_t num_bytes,
+                                         uint8_t** out_pointer,
+                                         size_t* out_num_bytes_preloaded);
+
+  /* Writes |num_bytes| from |bffer| at offset |offset| to partition
+   * with name |partition| (NUL-terminated UTF-8 string). If |offset|
+   * is negative, its absolute value should be interpreted as the
+   * number of bytes from the end of the partition.
+   *
+   * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+   * there is no partition with the given name,
+   * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+   * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
+   * if there was an I/O error from the underlying I/O subsystem.  If
+   * the operation succeeds as requested AVB_IO_RESULT_OK is
+   * returned.
+   *
+   * This function never does any partial I/O, it either transfers all
+   * of the requested bytes or returns an error.
+   */
+  AvbIOResult (*write_to_partition)(AvbOps* ops,
+                                    const char* partition,
+                                    int64_t offset,
+                                    size_t num_bytes,
+                                    const void* buffer);
+
+  /* Checks if the given public key used to sign the 'vbmeta'
+   * partition is trusted. Boot loaders typically compare this with
+   * embedded key material generated with 'avbtool
+   * extract_public_key'.
+   *
+   * The public key is in the array pointed to by |public_key_data|
+   * and is of |public_key_length| bytes.
+   *
+   * If there is no public key metadata (set with the avbtool option
+   * --public_key_metadata) then |public_key_metadata| will be set to
+   * NULL. Otherwise this field points to the data which is
+   * |public_key_metadata_length| bytes long.
+   *
+   * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
+   * true if trusted or false if untrusted.
+   */
+  AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
+                                            const uint8_t* public_key_data,
+                                            size_t public_key_length,
+                                            const uint8_t* public_key_metadata,
+                                            size_t public_key_metadata_length,
+                                            bool* out_is_trusted);
+
+  /* Gets the rollback index corresponding to the location given by
+   * |rollback_index_location|. The value is returned in
+   * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
+   * index was retrieved, otherwise an error code.
+   *
+   * A device may have a limited amount of rollback index locations (say,
+   * one or four) so may error out if |rollback_index_location| exceeds
+   * this number.
+   */
+  AvbIOResult (*read_rollback_index)(AvbOps* ops,
+                                     size_t rollback_index_location,
+                                     uint64_t* out_rollback_index);
+
+  /* Sets the rollback index corresponding to the location given by
+   * |rollback_index_location| to |rollback_index|. Returns
+   * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
+   * error code.
+   *
+   * A device may have a limited amount of rollback index locations (say,
+   * one or four) so may error out if |rollback_index_location| exceeds
+   * this number.
+   */
+  AvbIOResult (*write_rollback_index)(AvbOps* ops,
+                                      size_t rollback_index_location,
+                                      uint64_t rollback_index);
+
+  /* Gets whether the device is unlocked. The value is returned in
+   * |out_is_unlocked| (true if unlocked, false otherwise). Returns
+   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+   * code.
+   */
+  AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+
+  /* write the device lock flag. Returns
+   * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+   * code.
+   */
+  AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+  /* Gets the unique partition GUID for a partition with name in
+   * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
+   * a string into |guid_buf| of size |guid_buf_size| and will be NUL
+   * terminated. The string must be lower-case and properly
+   * hyphenated. For example:
+   *
+   *  527c1c6d-6361-4593-8842-3c78fcd39219
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
+                                               const char* partition,
+                                               char* guid_buf,
+                                               size_t guid_buf_size);
+
+  /* Gets the size of a partition with the name in |partition|
+   * (NUL-terminated UTF-8 string). Returns the value in
+   * |out_size_num_bytes|.
+   *
+   * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+   */
+  AvbIOResult (*get_size_of_partition)(AvbOps* ops,
+                                       const char* partition,
+                                       uint64_t* out_size_num_bytes);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_OPS_H_ */
diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index ad57615aa6..36a98da08e 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -1,238 +1,70 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef AVB_OPS_USER_H_
-#define AVB_OPS_USER_H_
-
-#include <android_avb/libavb.h>
-#include <android_avb/avb_ab_flow.h>
-
-#define PERM_ATTR_DIGEST_SIZE 32
-#define PERM_ATTR_TOTAL_SIZE  1084
-#define VBOOT_KEY_HASH_SIZE   32
-
-/* Allocates an AvbOps instance suitable for use in Android userspace
- * on the device. Returns NULL on OOM.
- *
- * The returned AvbOps has the following characteristics:
- *
- * - The read_from_partition(), write_to_partition(), and
- *   get_size_of_partition() operations are implemented, however for
- *   these operations to work the fstab file on the device must have a
- *   /misc entry using a by-name device file scheme and the containing
- *   by-name/ subdirectory must have files for other partitions.
- *
- * - The remaining operations are implemented and never fails and
- *   return the following values:
- *   - validate_vbmeta_public_key(): always returns |true|.
- *   - read_rollback_index(): returns 0 for any roolback index.
- *   - write_rollback_index(): no-op.
- *   - read_is_device_unlocked(): always returns |true|.
- *   - get_unique_guid_for_partition(): always returns the empty string.
- *
- * - The |ab_ops| member will point to a valid AvbABOps instance
- *   implemented via libavb_ab/. This should only be used if the AVB
- *   A/B stack is used on the device. This is what is used in
- *   bootctrl.avb boot control implementation.
- *
- * Free with avb_ops_user_free().
- */
-AvbOps* avb_ops_user_new(void);
-
-/* Frees an AvbOps instance previously allocated with avb_ops_device_new(). */
-void avb_ops_user_free(AvbOps* ops);
-
-/**
- * Provided to fastboot to read how many slot in this system.
- *
- * @param slot_count  We use parameter slot_count to obtain
- *                    how many slots in the system.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_slot_count(char *slot_count);
-
-/**
- * The android things supply many slots, their name like '_a', '_b'.
- * We can use this function to read current slot is '_a' or '_b'.
- *
- * @slot_suffixes  read value '_a' or '_b'.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_slot_suffixes(char *slot_suffixes);
-
-/**
- * Use this function to set which slot boot first.
- *
- * @param slot_number set '0' or '1'
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_set_slot_active(unsigned int *slot_number);
-
-/**
- * Get current slot: '_a' or '_b'.
- *
- * @param select_slot  obtain current slot.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_get_current_slot(char *select_slot);
-
-/**
- * The android things defines permanent attributes to
- * store PSK_public, product id. We can use this function
- * to read them.
- *
- * @param attributes  PSK_public, product id....
- *
- * @param size        The size of attributes.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size);
-
-/**
- * The android things defines permanent attributes to
- * store PSK_public, product id. We can use this function
- * to write them.
- *
- * @param attributes  PSK_public, product id....
- *
- * @param size        The size of attributes.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size);
-
-/**
- * The funtion can be use to read the device state to judge
- * whether the device can be flash.
- *
- * @param flash_lock_state  A flag indicate the device flash state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_flash_lock_state(uint8_t *flash_lock_state);
-
-/**
- * The function is provided to write device flash state.
- *
- * @param flash_lock_state   A flag indicate the device flash state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_flash_lock_state(uint8_t flash_lock_state);
-
-/**
- * The android things use the flag of lock state to indicate
- * whether the device can be booted when verified error.
- *
- * @param lock_state  A flag indicate the device lock state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_lock_state(uint8_t *lock_state);
-
-/**
- * The android things use the flag of lock state to indicate
- * whether the device can be booted when verified error.
- *
- * @param lock_state   A flag indicate the device lock state.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_lock_state(uint8_t lock_state);
-
-/**
- * The android things uses fastboot to flash the permanent attributes.
- * And if them were written, there must have a flag to indicate.
- *
- * @param flag   indicate the permanent attributes have been written
- *               or not.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_perm_attr_flag(uint8_t *flag);
-
-/**
- * The android things uses fastboot to flash the permanent attributes.
- * And if them were written, there must have a flag to indicate.
- *
- * @param flag   We can call this function to write the flag '1'
- *               to indicate the permanent attributes has been
- *               written.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_perm_attr_flag(uint8_t flag);
-
-/**
- * The android things require the soc-v key hash to be flashed
- * using the fastboot. So the function can be used in fastboot
- * to flash the key hash.
- *
- * @param buf    The vboot key hash data.
- *
- * @param length The length of key hash.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
-
-/**
- * The android things require the soc-v key hash to be flashed
- * using the fastboot. So the function can be used in fastboot
- * to flash the key hash.
- *
- * @param buf    The vboot key hash data.
- *
- * @param length The length of key hash.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
-
-/**
- * U-boot close the optee client when start kernel
- * to prevent the optee client being invoking by other
- * program.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_close_optee_client(void);
-
-/**
- * Write the permanent attributes hash.
- *
- * @param buf    The permanent attributes hash data.
- *
- * @param length The length of permanent attributes hash.
- *
- * @return 0 if the command succeeded, -1 if it failed
- */
-int avb_write_attribute_hash(uint8_t *buf, uint8_t length);
-
-#endif
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef AVB_OPS_USER_H_
+#define AVB_OPS_USER_H_
+
+#include <android_avb/libavb.h>
+#include <android_avb/avb_ab_flow.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Allocates an AvbOps instance suitable for use in Android userspace
+ * on the device. Returns NULL on OOM.
+ *
+ * The returned AvbOps has the following characteristics:
+ *
+ * - The read_from_partition(), write_to_partition(), and
+ *   get_size_of_partition() operations are implemented, however for
+ *   these operations to work the fstab file on the device must have a
+ *   /misc entry using a by-name device file scheme and the containing
+ *   by-name/ subdirectory must have files for other partitions.
+ *
+ * - The remaining operations are implemented and never fails and
+ *   return the following values:
+ *   - validate_vbmeta_public_key(): always returns |true|.
+ *   - read_rollback_index(): returns 0 for any roolback index.
+ *   - write_rollback_index(): no-op.
+ *   - read_is_device_unlocked(): always returns |true|.
+ *   - get_unique_guid_for_partition(): always returns the empty string.
+ *
+ * - The |ab_ops| member will point to a valid AvbABOps instance
+ *   implemented via libavb_ab/. This should only be used if the AVB
+ *   A/B stack is used on the device. This is what is used in
+ *   bootctrl.avb boot control implementation.
+ *
+ * Free with avb_ops_user_free().
+ */
+AvbOps* avb_ops_user_new(void);
+
+/* Frees an AvbOps instance previously allocated with avb_ops_device_new(). */
+void avb_ops_user_free(AvbOps* ops);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_OPS_USER_H_ */
diff --git a/include/android_avb/avb_property_descriptor.h b/include/android_avb/avb_property_descriptor.h
index 08409892a9..28c35cb560 100644
--- a/include/android_avb/avb_property_descriptor.h
+++ b/include/android_avb/avb_property_descriptor.h
@@ -1,109 +1,109 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_PROPERTY_DESCRIPTOR_H_
-#define AVB_PROPERTY_DESCRIPTOR_H_
-
-#include <android_avb/avb_descriptor.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* A descriptor for properties (free-form key/value pairs).
- *
- * Following this struct are |key_num_bytes| bytes of key data,
- * followed by a NUL byte, then |value_num_bytes| bytes of value data,
- * followed by a NUL byte and then enough padding to make the combined
- * size a multiple of 8.
- */
-typedef struct AvbPropertyDescriptor {
-  AvbDescriptor parent_descriptor;
-  uint64_t key_num_bytes;
-  uint64_t value_num_bytes;
-} AVB_ATTR_PACKED AvbPropertyDescriptor;
-
-/* Copies |src| to |dest| and validates, byte-swapping fields in the
- * process if needed. Returns true if valid, false if invalid.
- *
- * Data following the struct is not validated nor copied.
- */
-bool avb_property_descriptor_validate_and_byteswap(
-    const AvbPropertyDescriptor* src,
-    AvbPropertyDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Convenience function for looking up the value for a property with
- * name |key| in a vbmeta image. If |key_size| is 0, |key| must be
- * NUL-terminated.
- *
- * The |image_data| parameter must be a pointer to a vbmeta image of
- * size |image_size|.
- *
- * This function returns a pointer to the value inside the passed-in
- * image or NULL if not found. Note that the value is always
- * guaranteed to be followed by a NUL byte.
- *
- * If the value was found and |out_value_size| is not NULL, the size
- * of the value is returned there.
- *
- * This function is O(n) in number of descriptors so if you need to
- * look up a lot of values, you may want to build a more efficient
- * lookup-table by manually walking all descriptors using
- * avb_descriptor_foreach().
- *
- * Before using this function, you MUST verify |image_data| with
- * avb_vbmeta_image_verify() and reject it unless it's signed by a
- * known good public key.
- */
-const char* avb_property_lookup(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                size_t* out_value_size)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Like avb_property_lookup() but parses the intial portions of the
- * value as an unsigned 64-bit integer. Both decimal and hexadecimal
- * representations (e.g. "0x2a") are supported. Returns false on
- * failure and true on success. On success, the parsed value is
- * returned in |out_value|.
- */
-bool avb_property_lookup_uint64(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                uint64_t* out_value)
-    AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_PROPERTY_DESCRIPTOR_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_PROPERTY_DESCRIPTOR_H_
+#define AVB_PROPERTY_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor for properties (free-form key/value pairs).
+ *
+ * Following this struct are |key_num_bytes| bytes of key data,
+ * followed by a NUL byte, then |value_num_bytes| bytes of value data,
+ * followed by a NUL byte and then enough padding to make the combined
+ * size a multiple of 8.
+ */
+typedef struct AvbPropertyDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t key_num_bytes;
+  uint64_t value_num_bytes;
+} AVB_ATTR_PACKED AvbPropertyDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src,
+    AvbPropertyDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Convenience function for looking up the value for a property with
+ * name |key| in a vbmeta image. If |key_size| is 0, |key| must be
+ * NUL-terminated.
+ *
+ * The |image_data| parameter must be a pointer to a vbmeta image of
+ * size |image_size|.
+ *
+ * This function returns a pointer to the value inside the passed-in
+ * image or NULL if not found. Note that the value is always
+ * guaranteed to be followed by a NUL byte.
+ *
+ * If the value was found and |out_value_size| is not NULL, the size
+ * of the value is returned there.
+ *
+ * This function is O(n) in number of descriptors so if you need to
+ * look up a lot of values, you may want to build a more efficient
+ * lookup-table by manually walking all descriptors using
+ * avb_descriptor_foreach().
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a
+ * known good public key.
+ */
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_property_lookup() but parses the intial portions of the
+ * value as an unsigned 64-bit integer. Both decimal and hexadecimal
+ * representations (e.g. "0x2a") are supported. Returns false on
+ * failure and true on success. On success, the parsed value is
+ * returned in |out_value|.
+ */
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_PROPERTY_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_rsa.h b/include/android_avb/avb_rsa.h
index 728c215a31..e8b0c50e71 100644
--- a/include/android_avb/avb_rsa.h
+++ b/include/android_avb/avb_rsa.h
@@ -1,75 +1,77 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifdef AVB_INSIDE_LIBAVB_H
-#error "You can't include avb_rsa.h in the public header libavb.h."
-#endif
-
-/*
-#ifndef AVB_COMPILATION
-#error "Never include this file, it may only be used from internal avb code."
-#endif
-*/
-
-#ifndef AVB_RSA_H_
-#define AVB_RSA_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_sysdeps.h>
-
-/* Using the key given by |key|, verify a RSA signature |sig| of
- * length |sig_num_bytes| against an expected |hash| of length
- * |hash_num_bytes|. The padding to expect must be passed in using
- * |padding| of length |padding_num_bytes|.
- *
- * The data in |key| must match the format defined in
- * |AvbRSAPublicKeyHeader|, including the two large numbers
- * following. The |key_num_bytes| must be the size of the entire
- * serialized key.
- *
- * Returns false if verification fails, true otherwise.
- */
-bool avb_rsa_verify(const uint8_t* key,
-                    size_t key_num_bytes,
-                    const uint8_t* sig,
-                    size_t sig_num_bytes,
-                    const uint8_t* hash,
-                    size_t hash_num_bytes,
-                    const uint8_t* padding,
-                    size_t padding_num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_RSA_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_rsa.h in the public header libavb.h."
+#endif
+*/
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_RSA_H_
+#define AVB_RSA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Using the key given by |key|, verify a RSA signature |sig| of
+ * length |sig_num_bytes| against an expected |hash| of length
+ * |hash_num_bytes|. The padding to expect must be passed in using
+ * |padding| of length |padding_num_bytes|.
+ *
+ * The data in |key| must match the format defined in
+ * |AvbRSAPublicKeyHeader|, including the two large numbers
+ * following. The |key_num_bytes| must be the size of the entire
+ * serialized key.
+ *
+ * Returns false if verification fails, true otherwise.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_RSA_H_ */
diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
index 94ac339a2d..c4b7c7705e 100644
--- a/include/android_avb/avb_sha.h
+++ b/include/android_avb/avb_sha.h
@@ -1,92 +1,92 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifdef AVB_INSIDE_LIBAVB_H
-#error "You can't include avb_sha.h in the public header libavb.h."
-#endif
-
-/*
-#ifndef AVB_COMPILATION
-#error "Never include this file, it may only be used from internal avb code."
-#endif
-*/
-
-#ifndef AVB_SHA_H_
-#define AVB_SHA_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_sysdeps.h>
-
-/* Block size in bytes of a SHA-256 digest. */
-#define AVB_SHA256_BLOCK_SIZE 64
-
-
-/* Block size in bytes of a SHA-512 digest. */
-#define AVB_SHA512_BLOCK_SIZE 128
-
-/* Data structure used for SHA-256. */
-typedef struct {
-  uint32_t h[8];
-  uint32_t tot_len;
-  uint32_t len;
-  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
-  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
-} AvbSHA256Ctx;
-
-/* Data structure used for SHA-512. */
-typedef struct {
-  uint64_t h[8];
-  uint32_t tot_len;
-  uint32_t len;
-  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
-  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
-} AvbSHA512Ctx;
-
-/* Initializes the SHA-256 context. */
-void avb_sha256_init(AvbSHA256Ctx* ctx);
-
-/* Updates the SHA-256 context with |len| bytes from |data|. */
-void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len);
-
-/* Returns the SHA-256 digest. */
-uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Initializes the SHA-512 context. */
-void avb_sha512_init(AvbSHA512Ctx* ctx);
-
-/* Updates the SHA-512 context with |len| bytes from |data|. */
-void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len);
-
-/* Returns the SHA-512 digest. */
-uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SHA_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_SHA_H_
+#define AVB_SHA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Block size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_BLOCK_SIZE 64
+
+
+/* Block size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_BLOCK_SIZE 128
+
+/* Data structure used for SHA-256. */
+typedef struct {
+  uint32_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA256Ctx;
+
+/* Data structure used for SHA-512. */
+typedef struct {
+  uint64_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA512Ctx;
+
+/* Initializes the SHA-256 context. */
+void avb_sha256_init(AvbSHA256Ctx* ctx);
+
+/* Updates the SHA-256 context with |len| bytes from |data|. */
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-256 digest. */
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Initializes the SHA-512 context. */
+void avb_sha512_init(AvbSHA512Ctx* ctx);
+
+/* Updates the SHA-512 context with |len| bytes from |data|. */
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-512 digest. */
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SHA_H_ */
diff --git a/include/android_avb/avb_slot_verify.h b/include/android_avb/avb_slot_verify.h
index a34a872a6f..1b7932496c 100644
--- a/include/android_avb/avb_slot_verify.h
+++ b/include/android_avb/avb_slot_verify.h
@@ -1,341 +1,352 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_SLOT_VERIFY_H_
-#define AVB_SLOT_VERIFY_H_
-
-#include <android_avb/avb_ops.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Return codes used in avb_slot_verify(), see that function for
- * documentation for each field.
- *
- * Use avb_slot_verify_result_to_string() to get a textual
- * representation usable for error/debug output.
- */
-typedef enum {
-  AVB_SLOT_VERIFY_RESULT_OK,
-  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
-  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
-  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
-  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
-  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
-  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
-  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
-  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
-} AvbSlotVerifyResult;
-
-/* Various error handling modes for when verification fails using a
- * hashtree at runtime inside the HLOS.
- *
- * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
- * will invalidate the current slot and restart.
- *
- * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
- *
- * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
- * returned to applications.
- *
- * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
- * and corrupt data may be returned to applications. This mode should
- * be used ONLY for diagnostics and debugging. It cannot be used
- * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
- * used.
- */
-typedef enum {
-  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-  AVB_HASHTREE_ERROR_MODE_RESTART,
-  AVB_HASHTREE_ERROR_MODE_EIO,
-  AVB_HASHTREE_ERROR_MODE_LOGGING
-} AvbHashtreeErrorMode;
-
-/* Flags that influence how avb_slot_verify() works.
- *
- * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
- * avb_slot_verify() will bail out as soon as an error is encountered
- * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
- * returned.
- *
- * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
- * avb_slot_verify() will continue verification efforts and |out_data|
- * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
- * undefined which error is returned if more than one distinct error
- * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
- * returned if, and only if, there are no errors. This mode is needed
- * to boot valid but unverified slots when the device is unlocked.
- *
- * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
- * contents loaded from |requested_partition| will be the contents of
- * the entire partition instead of just the size specified in the hash
- * descriptor.
- */
-typedef enum {
-  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
-  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0)
-} AvbSlotVerifyFlags;
-
-/* Get a textual representation of |result|. */
-const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
-
-/* Maximum number of rollback index locations supported. */
-#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
-
-/* AvbPartitionData contains data loaded from partitions when using
- * avb_slot_verify(). The |partition_name| field contains the name of
- * the partition (without A/B suffix), |data| points to the loaded
- * data which is |data_size| bytes long.
- *
- * Note that this is strictly less than the partition size - it's only
- * the image stored there, not the entire partition nor any of the
- * metadata.
- */
-typedef struct {
-  char* partition_name;
-  uint8_t* data;
-  size_t data_size;
-} AvbPartitionData;
-
-/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
- * using avb_slot_verify(). The |partition_name| field contains the
- * name of the partition (without A/B suffix), |vbmeta_data| points to
- * the loaded data which is |vbmeta_size| bytes long.
- *
- * The |verify_result| field contains the result of
- * avb_vbmeta_image_verify() on the data. This is guaranteed to be
- * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
- * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
- *
- * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
- * avb_vbmeta_image_header_to_host_byte_order() with this data.
- */
-typedef struct {
-  char* partition_name;
-  uint8_t* vbmeta_data;
-  size_t vbmeta_size;
-  AvbVBMetaVerifyResult verify_result;
-} AvbVBMetaData;
-
-/* AvbSlotVerifyData contains data needed to boot a particular slot
- * and is returned by avb_slot_verify() if partitions in a slot are
- * successfully verified.
- *
- * All data pointed to by this struct - including data in each item in
- * the |partitions| array - will be freed when the
- * avb_slot_verify_data_free() function is called.
- *
- * The |ab_suffix| field is the copy of the of |ab_suffix| field
- * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
- * value includes the leading underscore - typical values are "" (if
- * no slots are in use), "_a" (for the first slot), and "_b" (for the
- * second slot).
- *
- * The VBMeta images that were checked are available in the
- * |vbmeta_images| field. The field |num_vbmeta_images| contains the
- * number of elements in this array. The first element -
- * vbmeta_images[0] - is guaranteed to be from the partition with the
- * top-level vbmeta struct. This is usually the "vbmeta" partition in
- * the requested slot but if there is no "vbmeta" partition it can
- * also be the "boot" partition.
- *
- * The partitions loaded and verified from from the slot are
- * accessible in the |loaded_partitions| array. The field
- * |num_loaded_partitions| contains the number of elements in this
- * array. The order of partitions in this array may not necessarily be
- * the same order as in the passed-in |requested_partitions| array.
- *
- * Rollback indexes for the verified slot are stored in the
- * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
- * modify stored_rollback_index[n] locations e.g. it will never use
- * the write_rollback_index() AvbOps operation. Instead it is the job
- * of the caller of avb_slot_verify() to do this based on e.g. A/B
- * policy and other factors. See libavb_ab/avb_ab_flow.c for an
- * example of how to do this.
- *
- * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
- * from concatenating all |AvbKernelCmdlineDescriptor| and then
- * performing proper substitution of the variables
- * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
- * $(ANDROID_VBMETA_PARTUUID) using the
- * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
- * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
- * option depending on the value of |hashtree_error_mode|.
- *
- * Additionally, the |cmdline| field will have the following kernel
- * command-line options set:
- *
- *   androidboot.veritymode: This is set to 'disabled' if the
- *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
- *   vbmeta struct. Otherwise it is set to 'enforcing' if the
- *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
- *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
- *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
- *   AVB_HASHTREE_ERROR_MODE_LOGGING.
- *
- *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
- *   if hashtree validation isn't disabled and the passed-in hashtree
- *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
- *
- *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
- *   depending on the result of the result of AvbOps's
- *   read_is_unlocked() function.
- *
- *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
- *   the digest of all images in |vbmeta_images|.
- *
- *   androidboot.vbmeta.device: This is set to the value
- *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
- *   will end up pointing to the vbmeta partition for the verified
- *   slot. If there is no vbmeta partition it will point to the boot
- *   partition of the verified slot.
- *
- *   androidboot.vbmeta.avb_version: This is set to the decimal value
- *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
- *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
- *   version number represents the vbmeta file format version
- *   supported by libavb copy used in the boot loader. This is not
- *   necessarily the same version number of the on-disk metadata for
- *   the slot that was verified.
- *
- * Note that neither androidboot.slot_suffix nor androidboot.slot are
- * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
- * to pass these yourself.
- *
- * Also note that androidboot.veritymode is set by libavb and since
- * AVB only supports 'enforcing' and 'disabled' values, the boot
- * loader is relieved of managing any state related to dm-verity or
- * setting this cmdline parameter.
- *
- * This struct may grow in the future without it being considered an
- * ABI break.
- */
-typedef struct {
-  char* ab_suffix;
-  AvbVBMetaData* vbmeta_images;
-  size_t num_vbmeta_images;
-  AvbPartitionData* loaded_partitions;
-  size_t num_loaded_partitions;
-  char* cmdline;
-  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
-} AvbSlotVerifyData;
-
-/* Frees a |AvbSlotVerifyData| including all data it points to. */
-void avb_slot_verify_data_free(AvbSlotVerifyData* data);
-
-/* Performs a full verification of the slot identified by |ab_suffix|
- * and load and verify the contents of the partitions whose name is in
- * the NULL-terminated string array |requested_partitions| (each
- * partition must use hash verification). If not using A/B, pass an
- * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
- * must include the leading underscore, for example "_a" should be
- * used to refer to the first slot.
- *
- * Typically the |requested_partitions| array only contains a single
- * item for the boot partition, 'boot'.
- *
- * Verification includes loading and verifying data from the 'vbmeta',
- * the requested hash partitions, and possibly other partitions (with
- * |ab_suffix| appended), inspecting rollback indexes, and checking if
- * the public key used to sign the data is acceptable. The functions
- * in |ops| will be used to do this.
- *
- * If |out_data| is not NULL, it will be set to a newly allocated
- * |AvbSlotVerifyData| struct containing all the data needed to
- * actually boot the slot. This data structure should be freed with
- * avb_slot_verify_data_free() when you are done with it. See below
- * for when this is returned.
- *
- * The |flags| parameter is used to influence the semantics of
- * avb_slot_verify() - for example the
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
- * ignore verification errors which is something needed in the
- * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
- *
- * The |hashtree_error_mode| parameter should be set to the desired
- * error handling mode when hashtree validation fails inside the
- * HLOS. This value isn't used by libavb per se - it is forwarded to
- * the HLOS through the androidboot.veritymode and
- * androidboot.vbmeta.invalidate_on_error cmdline parameters. See the
- * AvbHashtreeErrorMode enumeration for details.
- *
- * Also note that |out_data| is never set if
- * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
- * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
- *
- * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
- * correctly and all public keys are accepted.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
- * everything is verified correctly out but one or more public keys
- * are not accepted. This includes the case where integrity data is
- * not signed.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
- * allocate memory.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
- * occurred while trying to load data or get a rollback index.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
- * did not verify, e.g. the digest didn't match or signature checks
- * failed.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
- * rollback index was less than its stored value.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
- * of the metadata is invalid or inconsistent.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
- * some of the metadata requires a newer version of libavb than what
- * is in use.
- *
- * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
- * caller passed invalid parameters, for example trying to use
- * AVB_HASHTREE_ERROR_MODE_LOGGING without
- * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
- */
-AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
-                                    const char* const* requested_partitions,
-                                    const char* ab_suffix,
-                                    AvbSlotVerifyFlags flags,
-                                    AvbHashtreeErrorMode hashtree_error_mode,
-                                    AvbSlotVerifyData** out_data);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SLOT_VERIFY_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SLOT_VERIFY_H_
+#define AVB_SLOT_VERIFY_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used in avb_slot_verify(), see that function for
+ * documentation for each field.
+ *
+ * Use avb_slot_verify_result_to_string() to get a textual
+ * representation usable for error/debug output.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_RESULT_OK,
+  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
+  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
+  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
+  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
+} AvbSlotVerifyResult;
+
+/* Various error handling modes for when verification fails using a
+ * hashtree at runtime inside the HLOS.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
+ * will invalidate the current slot and restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
+ * returned to applications.
+ *
+ * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
+ * and corrupt data may be returned to applications. This mode should
+ * be used ONLY for diagnostics and debugging. It cannot be used
+ * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
+ * used.
+ */
+typedef enum {
+  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+  AVB_HASHTREE_ERROR_MODE_RESTART,
+  AVB_HASHTREE_ERROR_MODE_EIO,
+  AVB_HASHTREE_ERROR_MODE_LOGGING
+} AvbHashtreeErrorMode;
+
+/* Flags that influence how avb_slot_verify() works.
+ *
+ * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
+ * avb_slot_verify() will bail out as soon as an error is encountered
+ * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
+ * returned.
+ *
+ * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
+ * avb_slot_verify() will continue verification efforts and |out_data|
+ * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
+ * undefined which error is returned if more than one distinct error
+ * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
+ * returned if, and only if, there are no errors. This mode is needed
+ * to boot valid but unverified slots when the device is unlocked.
+ *
+ * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
+ * contents loaded from |requested_partition| will be the contents of
+ * the entire partition instead of just the size specified in the hash
+ * descriptor.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
+  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0)
+} AvbSlotVerifyFlags;
+
+/* Get a textual representation of |result|. */
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
+
+/* Maximum number of rollback index locations supported. */
+#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
+
+/* AvbPartitionData contains data loaded from partitions when using
+ * avb_slot_verify(). The |partition_name| field contains the name of
+ * the partition (without A/B suffix), |data| points to the loaded
+ * data which is |data_size| bytes long. If |preloaded| is set to true,
+ * this structure dose not own |data|. The caller of |avb_slot_verify|
+ * needs to make sure that the preloaded data outlives this
+ * |AvbPartitionData| structure.
+ *
+ * Note that this is strictly less than the partition size - it's only
+ * the image stored there, not the entire partition nor any of the
+ * metadata.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* data;
+  size_t data_size;
+  bool preloaded;
+} AvbPartitionData;
+
+/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
+ * using avb_slot_verify(). The |partition_name| field contains the
+ * name of the partition (without A/B suffix), |vbmeta_data| points to
+ * the loaded data which is |vbmeta_size| bytes long.
+ *
+ * The |verify_result| field contains the result of
+ * avb_vbmeta_image_verify() on the data. This is guaranteed to be
+ * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
+ * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
+ *
+ * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
+ * avb_vbmeta_image_header_to_host_byte_order() with this data.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* vbmeta_data;
+  size_t vbmeta_size;
+  AvbVBMetaVerifyResult verify_result;
+} AvbVBMetaData;
+
+/* AvbSlotVerifyData contains data needed to boot a particular slot
+ * and is returned by avb_slot_verify() if partitions in a slot are
+ * successfully verified.
+ *
+ * All data pointed to by this struct - including data in each item in
+ * the |partitions| array - will be freed when the
+ * avb_slot_verify_data_free() function is called.
+ *
+ * The |ab_suffix| field is the copy of the of |ab_suffix| field
+ * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
+ * value includes the leading underscore - typical values are "" (if
+ * no slots are in use), "_a" (for the first slot), and "_b" (for the
+ * second slot).
+ *
+ * The VBMeta images that were checked are available in the
+ * |vbmeta_images| field. The field |num_vbmeta_images| contains the
+ * number of elements in this array. The first element -
+ * vbmeta_images[0] - is guaranteed to be from the partition with the
+ * top-level vbmeta struct. This is usually the "vbmeta" partition in
+ * the requested slot but if there is no "vbmeta" partition it can
+ * also be the "boot" partition.
+ *
+ * The partitions loaded and verified from from the slot are
+ * accessible in the |loaded_partitions| array. The field
+ * |num_loaded_partitions| contains the number of elements in this
+ * array. The order of partitions in this array may not necessarily be
+ * the same order as in the passed-in |requested_partitions| array.
+ *
+ * Rollback indexes for the verified slot are stored in the
+ * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
+ * modify stored_rollback_index[n] locations e.g. it will never use
+ * the write_rollback_index() AvbOps operation. Instead it is the job
+ * of the caller of avb_slot_verify() to do this based on e.g. A/B
+ * policy and other factors. See libavb_ab/avb_ab_flow.c for an
+ * example of how to do this.
+ *
+ * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
+ * from concatenating all |AvbKernelCmdlineDescriptor| and then
+ * performing proper substitution of the variables
+ * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
+ * $(ANDROID_VBMETA_PARTUUID) using the
+ * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
+ * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
+ * option depending on the value of |hashtree_error_mode|.
+ *
+ * Additionally, the |cmdline| field will have the following kernel
+ * command-line options set (unless verification is disabled, see
+ * below):
+ *
+ *   androidboot.veritymode: This is set to 'disabled' if the
+ *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
+ *   vbmeta struct. Otherwise it is set to 'enforcing' if the
+ *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
+ *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
+ *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
+ *   AVB_HASHTREE_ERROR_MODE_LOGGING.
+ *
+ *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
+ *   if hashtree validation isn't disabled and the passed-in hashtree
+ *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
+ *
+ *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
+ *   depending on the result of the result of AvbOps's
+ *   read_is_unlocked() function.
+ *
+ *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
+ *   the digest of all images in |vbmeta_images|.
+ *
+ *   androidboot.vbmeta.device: This is set to the value
+ *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
+ *   will end up pointing to the vbmeta partition for the verified
+ *   slot. If there is no vbmeta partition it will point to the boot
+ *   partition of the verified slot.
+ *
+ *   androidboot.vbmeta.avb_version: This is set to the decimal value
+ *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
+ *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
+ *   version number represents the vbmeta file format version
+ *   supported by libavb copy used in the boot loader. This is not
+ *   necessarily the same version number of the on-disk metadata for
+ *   the slot that was verified.
+ *
+ * Note that androidboot.slot_suffix is not set in the |cmdline| field
+ * in |AvbSlotVerifyData| - you will have to set this yourself.
+ *
+ * If the |AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED| flag is set
+ * in the top-level vbmeta struct then only the top-level vbmeta
+ * struct is verified and descriptors will not processed. The return
+ * value will be set accordingly (if this flag is set via 'avbctl
+ * disable-verification' then the return value will be
+ * |AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION|) and
+ * |AvbSlotVerifyData| is returned. Additionally all partitions in the
+ * |requested_partitions| are loaded and the |cmdline| field is set to
+ * "root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)" and the GUID for the
+ * appropriate system partition is substituted in. Note that none of
+ * the androidboot.* options mentioned above will be set.
+ *
+ * This struct may grow in the future without it being considered an
+ * ABI break.
+ */
+typedef struct {
+  char* ab_suffix;
+  AvbVBMetaData* vbmeta_images;
+  size_t num_vbmeta_images;
+  AvbPartitionData* loaded_partitions;
+  size_t num_loaded_partitions;
+  char* cmdline;
+  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
+} AvbSlotVerifyData;
+
+/* Frees a |AvbSlotVerifyData| including all data it points to. */
+void avb_slot_verify_data_free(AvbSlotVerifyData* data);
+
+/* Performs a full verification of the slot identified by |ab_suffix|
+ * and load and verify the contents of the partitions whose name is in
+ * the NULL-terminated string array |requested_partitions| (each
+ * partition must use hash verification). If not using A/B, pass an
+ * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
+ * must include the leading underscore, for example "_a" should be
+ * used to refer to the first slot.
+ *
+ * Typically the |requested_partitions| array only contains a single
+ * item for the boot partition, 'boot'.
+ *
+ * Verification includes loading and verifying data from the 'vbmeta',
+ * the requested hash partitions, and possibly other partitions (with
+ * |ab_suffix| appended), inspecting rollback indexes, and checking if
+ * the public key used to sign the data is acceptable. The functions
+ * in |ops| will be used to do this.
+ *
+ * If |out_data| is not NULL, it will be set to a newly allocated
+ * |AvbSlotVerifyData| struct containing all the data needed to
+ * actually boot the slot. This data structure should be freed with
+ * avb_slot_verify_data_free() when you are done with it. See below
+ * for when this is returned.
+ *
+ * The |flags| parameter is used to influence the semantics of
+ * avb_slot_verify() - for example the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
+ * ignore verification errors which is something needed in the
+ * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
+ *
+ * The |hashtree_error_mode| parameter should be set to the desired
+ * error handling mode when hashtree validation fails inside the
+ * HLOS. This value isn't used by libavb per se - it is forwarded to
+ * the HLOS through the androidboot.veritymode and
+ * androidboot.vbmeta.invalidate_on_error cmdline parameters. See the
+ * AvbHashtreeErrorMode enumeration for details.
+ *
+ * Also note that |out_data| is never set if
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+ * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
+ *
+ * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
+ * correctly and all public keys are accepted.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
+ * everything is verified correctly out but one or more public keys
+ * are not accepted. This includes the case where integrity data is
+ * not signed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
+ * allocate memory.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
+ * occurred while trying to load data or get a rollback index.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
+ * did not verify, e.g. the digest didn't match or signature checks
+ * failed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
+ * rollback index was less than its stored value.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
+ * of the metadata is invalid or inconsistent.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
+ * some of the metadata requires a newer version of libavb than what
+ * is in use.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
+ * caller passed invalid parameters, for example trying to use
+ * AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ */
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SLOT_VERIFY_H_ */
diff --git a/include/android_avb/avb_sysdeps.h b/include/android_avb/avb_sysdeps.h
index df7f1d2028..b2ba7f8321 100644
--- a/include/android_avb/avb_sysdeps.h
+++ b/include/android_avb/avb_sysdeps.h
@@ -1,126 +1,130 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_SYSDEPS_H_
-#define AVB_SYSDEPS_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Change these includes to match your platform to bring in the
- * equivalent types available in a normal C runtime. At least things
- * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
- * must be present.
- */
-#include <inttypes.h>
-#include <stdbool.h>
-#include <stddef.h>
-#ifdef CONFIG_USE_STDINT
-/* Provided by gcc. */
-#include <stdint.h>
-#else
-/* Type for `void *' pointers. */
-typedef unsigned long int uintptr_t;
-#endif
-
-/* If you don't have gcc or clang, these attribute macros may need to
- * be adjusted.
- */
-#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
-#define AVB_ATTR_PACKED __attribute__((packed))
-#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
-#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
-
-/* Size in bytes used for alignment. */
-#ifdef __LP64__
-#define AVB_ALIGNMENT_SIZE 8
-#else
-#define AVB_ALIGNMENT_SIZE 4
-#endif
-
-/* Compare |n| bytes in |src1| and |src2|.
- *
- * Returns an integer less than, equal to, or greater than zero if the
- * first |n| bytes of |src1| is found, respectively, to be less than,
- * to match, or be greater than the first |n| bytes of |src2|. */
-int avb_memcmp(const void* src1,
-               const void* src2,
-               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Compare two strings.
- *
- * Return an integer less than, equal to, or greater than zero if |s1|
- * is found, respectively, to be less than, to match, or be greater
- * than |s2|.
- */
-int avb_strcmp(const char* s1, const char* s2);
-
-/* Copy |n| bytes from |src| to |dest|. */
-void* avb_memcpy(void* dest, const void* src, size_t n);
-
-/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
-void* avb_memset(void* dest, const int c, size_t n);
-
-/* Prints out a message. The string passed must be a NUL-terminated
- * UTF-8 string.
- */
-void avb_print(const char* message);
-
-/* Prints out a vector of strings. Each argument must point to a
- * NUL-terminated UTF-8 string and NULL should be the last argument.
- */
-void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
-
-/* Aborts the program or reboots the device. */
-void avb_abort(void) AVB_ATTR_NO_RETURN;
-
-/* Allocates |size| bytes. Returns NULL if no memory is available,
- * otherwise a pointer to the allocated memory.
- *
- * The memory is not initialized.
- *
- * The pointer returned is guaranteed to be word-aligned.
- *
- * The memory should be freed with avb_free() when you are done with it.
- */
-void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Frees memory previously allocated with avb_malloc(). */
-void avb_free(void* ptr);
-
-/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
-size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_SYSDEPS_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SYSDEPS_H_
+#define AVB_SYSDEPS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Change these includes to match your platform to bring in the
+ * equivalent types available in a normal C runtime. At least things
+ * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
+ * must be present.
+ */
+#include <inttypes.h>
+#include <stdbool.h>
+#include <stddef.h>
+#ifdef CONFIG_USE_STDINT
+/* Provided by gcc. */
+#include <stdint.h>
+#else
+/* Type for `void *' pointers. */
+typedef unsigned long int uintptr_t;
+#endif
+
+/* If you don't have gcc or clang, these attribute macros may need to
+ * be adjusted.
+ */
+#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
+#define AVB_ATTR_PACKED __attribute__((packed))
+#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
+#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
+
+/* Size in bytes used for alignment. */
+#ifdef __LP64__
+#define AVB_ALIGNMENT_SIZE 8
+#else
+#define AVB_ALIGNMENT_SIZE 4
+#endif
+
+/* Compare |n| bytes in |src1| and |src2|.
+ *
+ * Returns an integer less than, equal to, or greater than zero if the
+ * first |n| bytes of |src1| is found, respectively, to be less than,
+ * to match, or be greater than the first |n| bytes of |src2|. */
+int avb_memcmp(const void* src1,
+               const void* src2,
+               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare two strings.
+ *
+ * Return an integer less than, equal to, or greater than zero if |s1|
+ * is found, respectively, to be less than, to match, or be greater
+ * than |s2|.
+ */
+int avb_strcmp(const char* s1, const char* s2);
+
+/* Copy |n| bytes from |src| to |dest|. */
+void* avb_memcpy(void* dest, const void* src, size_t n);
+
+/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
+void* avb_memset(void* dest, const int c, size_t n);
+
+/* Prints out a message. The string passed must be a NUL-terminated
+ * UTF-8 string.
+ */
+void avb_print(const char* message);
+
+/* Prints out a vector of strings. Each argument must point to a
+ * NUL-terminated UTF-8 string and NULL should be the last argument.
+ */
+void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
+
+/* Aborts the program or reboots the device. */
+void avb_abort(void);
+
+/* Allocates |size| bytes. Returns NULL if no memory is available,
+ * otherwise a pointer to the allocated memory.
+ *
+ * The memory is not initialized.
+ *
+ * The pointer returned is guaranteed to be word-aligned.
+ *
+ * The memory should be freed with avb_free() when you are done with it.
+ */
+void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Frees memory previously allocated with avb_malloc(). */
+void avb_free(void* ptr);
+
+/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
+size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Divide the |dividend| by 10 and saves back to the pointer. Return the
+ * remainder. */
+uint32_t avb_div_by_10(uint64_t* dividend);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SYSDEPS_H_ */
diff --git a/include/android_avb/avb_util.h b/include/android_avb/avb_util.h
index 6c04a880f0..d23c961e10 100644
--- a/include/android_avb/avb_util.h
+++ b/include/android_avb/avb_util.h
@@ -1,273 +1,279 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_UTIL_H_
-#define AVB_UTIL_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-/* Converts a 32-bit unsigned integer from big-endian to host byte order. */
-uint32_t avb_be32toh(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Converts a 64-bit unsigned integer from big-endian to host byte order. */
-uint64_t avb_be64toh(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
-uint32_t avb_htobe32(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
-uint64_t avb_htobe64(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Compare |n| bytes starting at |s1| with |s2| and return 0 if they
- * match, 1 if they don't.  Returns 0 if |n|==0, since no bytes
- * mismatched.
- *
- * Time taken to perform the comparison is only dependent on |n| and
- * not on the relationship of the match between |s1| and |s2|.
- *
- * Note that unlike avb_memcmp(), this only indicates inequality, not
- * whether |s1| is less than or greater than |s2|.
- */
-int avb_safe_memcmp(const void* s1,
-                    const void* s2,
-                    size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Adds |value_to_add| to |value| with overflow protection.
- *
- * Returns false if the addition overflows, true otherwise. In either
- * case, |value| is always modified.
- */
-bool avb_safe_add_to(uint64_t* value,
-                     uint64_t value_to_add) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Adds |a| and |b| with overflow protection, returning the value in
- * |out_result|.
- *
- * It's permissible to pass NULL for |out_result| if you just want to
- * check that the addition would not overflow.
- *
- * Returns false if the addition overflows, true otherwise.
- */
-bool avb_safe_add(uint64_t* out_result,
-                  uint64_t a,
-                  uint64_t b) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Checks if |num_bytes| data at |data| is a valid UTF-8
- * string. Returns true if valid UTF-8, false otherwise.
- */
-bool avb_validate_utf8(const uint8_t* data,
-                       size_t num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Concatenates |str1| (of |str1_len| bytes) and |str2| (of |str2_len|
- * bytes) and puts the result in |buf| which holds |buf_size|
- * bytes. The result is also guaranteed to be NUL terminated. Fail if
- * there is not enough room in |buf| for the resulting string plus
- * terminating NUL byte.
- *
- * Returns true if the operation succeeds, false otherwise.
- */
-bool avb_str_concat(char* buf,
-                    size_t buf_size,
-                    const char* str1,
-                    size_t str1_len,
-                    const char* str2,
-                    size_t str2_len);
-
-/* Like avb_malloc_() but prints a error using avb_error() if memory
- * allocation fails.
- */
-void* avb_malloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Like avb_malloc() but sets the memory with zeroes. */
-void* avb_calloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Duplicates a NUL-terminated string. Returns NULL on OOM. */
-char* avb_strdup(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Duplicates a NULL-terminated array of NUL-terminated strings by
- * concatenating them. The returned string will be
- * NUL-terminated. Returns NULL on OOM.
- */
-char* avb_strdupv(const char* str,
-                  ...) AVB_ATTR_WARN_UNUSED_RESULT AVB_ATTR_SENTINEL;
-
-/* Finds the first occurrence of |needle| in the string |haystack|
- * where both strings are NUL-terminated strings. The terminating NUL
- * bytes are not compared.
- *
- * Returns NULL if not found, otherwise points into |haystack| for the
- * first occurrence of |needle|.
- */
-const char* avb_strstr(const char* haystack,
-                       const char* needle) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Finds the first occurrence of |str| in the NULL-terminated string
- * array |strings|. Each element in |strings| must be
- * NUL-terminated. The string given by |str| need not be
- * NUL-terminated but its size must be given in |str_size|.
- *
- * Returns NULL if not found, otherwise points into |strings| for the
- * first occurrence of |str|.
- */
-const char* avb_strv_find_str(const char* const* strings,
-                              const char* str,
-                              size_t str_size);
-
-/* Replaces all occurrences of |search| with |replace| in |str|.
- *
- * Returns a newly allocated string or NULL if out of memory.
- */
-char* avb_replace(const char* str,
-                  const char* search,
-                  const char* replace) AVB_ATTR_WARN_UNUSED_RESULT;
-
-/* Calculates the CRC-32 for data in |buf| of size |buf_size|. */
-uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
-
-/* Returns the basename of |str|. This is defined as the last path
- * component, assuming the normal POSIX separator '/'. If there are no
- * separators, returns |str|.
- */
-const char *avb_basename(const char* str);
-
-
-
-#define AVB_STRINGIFY(x) #x
-#define AVB_TO_STRING(x) AVB_STRINGIFY(x)
-
-#ifdef AVB_ENABLE_DEBUG
-/* Aborts the program if |expr| is false.
- *
- * This has no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#define avb_assert(expr)                     \
-  do {                                       \
-    if (!(expr)) {                           \
-      avb_fatal("assert fail: " #expr "\n"); \
-    }                                        \
-  } while (0)
-#else
-#define avb_assert(expr)
-#endif
-
-/* Aborts the program if reached.
- *
- * This has no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#ifdef AVB_ENABLE_DEBUG
-#define avb_assert_not_reached()         \
-  do {                                   \
-    avb_fatal("assert_not_reached()\n"); \
-  } while (0)
-#else
-#define avb_assert_not_reached()
-#endif
-
-/* Aborts the program if |addr| is not word-aligned.
- *
- * This has no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#define avb_assert_aligned(addr) \
-  avb_assert((((uintptr_t)addr) & (AVB_ALIGNMENT_SIZE - 1)) == 0)
-
-#ifdef AVB_ENABLE_DEBUG
-/* Print functions, used for diagnostics.
- *
- * These have no effect unless AVB_ENABLE_DEBUG is defined.
- */
-#define avb_debug(message)              \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": DEBUG: ",             \
-               message,                 \
-               NULL);                   \
-  } while (0)
-#define avb_debugv(message, ...)        \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": DEBUG: ",             \
-               message,                 \
-               ##__VA_ARGS__);          \
-  } while (0)
-#else
-#define avb_debug(message)
-#define avb_debugv(message, ...)
-#endif
-
-/* Prints out a message. This is typically used if a runtime-error
- * occurs.
- */
-#define avb_error(message)              \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": ERROR: ",             \
-               message,                 \
-               NULL);                   \
-  } while (0)
-#define avb_errorv(message, ...)        \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": ERROR: ",             \
-               message,                 \
-               ##__VA_ARGS__);          \
-  } while (0)
-
-/* Prints out a message and calls avb_abort().
- */
-#define avb_fatal(message)              \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": FATAL: ",             \
-               message,                 \
-               NULL);                   \
-    avb_abort();                        \
-  } while (0)
-#define avb_fatalv(message, ...)        \
-  do {                                  \
-    avb_printv(avb_basename(__FILE__),  \
-               ":",                     \
-               AVB_TO_STRING(__LINE__), \
-               ": FATAL: ",             \
-               message,                 \
-               ##__VA_ARGS__);          \
-    avb_abort();                        \
-  } while (0)
-
-#endif /* AVB_UTIL_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_UTIL_H_
+#define AVB_UTIL_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AVB_STRINGIFY(x) #x
+#define AVB_TO_STRING(x) AVB_STRINGIFY(x)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Aborts the program if |expr| is false.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert(expr)                     \
+  do {                                       \
+    if (!(expr)) {                           \
+      avb_fatal("assert fail: " #expr "\n"); \
+    }                                        \
+  } while (0)
+#else
+#define avb_assert(expr)
+#endif
+
+/* Aborts the program if reached.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#ifdef AVB_ENABLE_DEBUG
+#define avb_assert_not_reached()         \
+  do {                                   \
+    avb_fatal("assert_not_reached()\n"); \
+  } while (0)
+#else
+#define avb_assert_not_reached()
+#endif
+
+/* Aborts the program if |addr| is not word-aligned.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert_aligned(addr) \
+  avb_assert((((uintptr_t)addr) & (AVB_ALIGNMENT_SIZE - 1)) == 0)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Print functions, used for diagnostics.
+ *
+ * These have no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_debug(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_debugv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+#else
+#define avb_debug(message)
+#define avb_debugv(message, ...)
+#endif
+
+/* Prints out a message. This is typically used if a runtime-error
+ * occurs.
+ */
+#define avb_error(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_errorv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+
+/* Prints out a message and calls avb_abort().
+ */
+#define avb_fatal(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               NULL);                   \
+    avb_abort();                        \
+  } while (0)
+#define avb_fatalv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+    avb_abort();                        \
+  } while (0)
+
+/* Converts a 32-bit unsigned integer from big-endian to host byte order. */
+uint32_t avb_be32toh(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from big-endian to host byte order. */
+uint64_t avb_be64toh(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare |n| bytes starting at |s1| with |s2| and return 0 if they
+ * match, 1 if they don't.  Returns 0 if |n|==0, since no bytes
+ * mismatched.
+ *
+ * Time taken to perform the comparison is only dependent on |n| and
+ * not on the relationship of the match between |s1| and |s2|.
+ *
+ * Note that unlike avb_memcmp(), this only indicates inequality, not
+ * whether |s1| is less than or greater than |s2|.
+ */
+int avb_safe_memcmp(const void* s1,
+                    const void* s2,
+                    size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |value_to_add| to |value| with overflow protection.
+ *
+ * Returns false if the addition overflows, true otherwise. In either
+ * case, |value| is always modified.
+ */
+bool avb_safe_add_to(uint64_t* value,
+                     uint64_t value_to_add) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |a| and |b| with overflow protection, returning the value in
+ * |out_result|.
+ *
+ * It's permissible to pass NULL for |out_result| if you just want to
+ * check that the addition would not overflow.
+ *
+ * Returns false if the addition overflows, true otherwise.
+ */
+bool avb_safe_add(uint64_t* out_result,
+                  uint64_t a,
+                  uint64_t b) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Checks if |num_bytes| data at |data| is a valid UTF-8
+ * string. Returns true if valid UTF-8, false otherwise.
+ */
+bool avb_validate_utf8(const uint8_t* data,
+                       size_t num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Concatenates |str1| (of |str1_len| bytes) and |str2| (of |str2_len|
+ * bytes) and puts the result in |buf| which holds |buf_size|
+ * bytes. The result is also guaranteed to be NUL terminated. Fail if
+ * there is not enough room in |buf| for the resulting string plus
+ * terminating NUL byte.
+ *
+ * Returns true if the operation succeeds, false otherwise.
+ */
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len);
+
+/* Like avb_malloc_() but prints a error using avb_error() if memory
+ * allocation fails.
+ */
+void* avb_malloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_malloc() but sets the memory with zeroes. */
+void* avb_calloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NUL-terminated string. Returns NULL on OOM. */
+char* avb_strdup(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NULL-terminated array of NUL-terminated strings by
+ * concatenating them. The returned string will be
+ * NUL-terminated. Returns NULL on OOM.
+ */
+char* avb_strdupv(const char* str,
+                  ...) AVB_ATTR_WARN_UNUSED_RESULT AVB_ATTR_SENTINEL;
+
+/* Finds the first occurrence of |needle| in the string |haystack|
+ * where both strings are NUL-terminated strings. The terminating NUL
+ * bytes are not compared.
+ *
+ * Returns NULL if not found, otherwise points into |haystack| for the
+ * first occurrence of |needle|.
+ */
+const char* avb_strstr(const char* haystack,
+                       const char* needle) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Finds the first occurrence of |str| in the NULL-terminated string
+ * array |strings|. Each element in |strings| must be
+ * NUL-terminated. The string given by |str| need not be
+ * NUL-terminated but its size must be given in |str_size|.
+ *
+ * Returns NULL if not found, otherwise points into |strings| for the
+ * first occurrence of |str|.
+ */
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size);
+
+/* Replaces all occurrences of |search| with |replace| in |str|.
+ *
+ * Returns a newly allocated string or NULL if out of memory.
+ */
+char* avb_replace(const char* str,
+                  const char* search,
+                  const char* replace) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Calculates the CRC-32 for data in |buf| of size |buf_size|. */
+uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
+
+/* Returns the basename of |str|. This is defined as the last path
+ * component, assuming the normal POSIX separator '/'. If there are no
+ * separators, returns |str|.
+ */
+const char* avb_basename(const char* str);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_UTIL_H_ */
diff --git a/include/android_avb/avb_vbmeta_image.h b/include/android_avb/avb_vbmeta_image.h
index ab78e0f4e8..fbd82ff65b 100644
--- a/include/android_avb/avb_vbmeta_image.h
+++ b/include/android_avb/avb_vbmeta_image.h
@@ -1,293 +1,296 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_VBMETA_IMAGE_H_
-#define AVB_VBMETA_IMAGE_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_descriptor.h>
-
-/* Size of the vbmeta image header. */
-#define AVB_VBMETA_IMAGE_HEADER_SIZE 256
-
-/* Magic for the vbmeta image header. */
-#define AVB_MAGIC "AVB0"
-#define AVB_MAGIC_LEN 4
-
-/* Maximum size of the release string including the terminating NUL byte. */
-#define AVB_RELEASE_STRING_SIZE 48
-
-/* Flags for the vbmeta image.
- *
- * AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED: If this flag is set,
- * hashtree image verification will be disabled.
- */
-typedef enum {
-  AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED = (1 << 0),
-  AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED = (1 << 1)
-} AvbVBMetaImageFlags;
-
-/* Binary format for header of the vbmeta image.
- *
- * The vbmeta image consists of three blocks:
- *
- *  +-----------------------------------------+
- *  | Header data - fixed size                |
- *  +-----------------------------------------+
- *  | Authentication data - variable size     |
- *  +-----------------------------------------+
- *  | Auxiliary data - variable size          |
- *  +-----------------------------------------+
- *
- * The "Header data" block is described by this struct and is always
- * |AVB_VBMETA_IMAGE_HEADER_SIZE| bytes long.
- *
- * The "Authentication data" block is |authentication_data_block_size|
- * bytes long and contains the hash and signature used to authenticate
- * the vbmeta image. The type of the hash and signature is defined by
- * the |algorithm_type| field.
- *
- * The "Auxiliary data" is |auxiliary_data_block_size| bytes long and
- * contains the auxiliary data including the public key used to make
- * the signature and descriptors.
- *
- * The public key is at offset |public_key_offset| with size
- * |public_key_size| in this block. The size of the public key data is
- * defined by the |algorithm_type| field. The format of the public key
- * data is described in the |AvbRSAPublicKeyHeader| struct.
- *
- * The descriptors starts at |descriptors_offset| from the beginning
- * of the "Auxiliary Data" block and take up |descriptors_size|
- * bytes. Each descriptor is stored as a |AvbDescriptor| with tag and
- * number of bytes following. The number of descriptors can be
- * determined by walking this data until |descriptors_size| is
- * exhausted.
- *
- * The size of each of the "Authentication data" and "Auxiliary data"
- * blocks must be divisible by 64. This is to ensure proper alignment.
- *
- * Descriptors are free-form blocks stored in a part of the vbmeta
- * image subject to the same integrity checks as the rest of the
- * image. See the documentation for |AvbDescriptor| for well-known
- * descriptors. See avb_descriptor_foreach() for a convenience
- * function to iterate over descriptors.
- *
- * This struct is versioned, see the |required_libavb_version_major|
- * and |required_libavb_version_minor| fields. This represents the
- * minimum version of libavb required to verify the header and depends
- * on the features (e.g. algorithms, descriptors) used. Note that this
- * may be 1.0 even if generated by an avbtool from 1.4 but where no
- * features introduced after 1.0 has been used. See the "Versioning
- * and compatibility" section in the README.md file for more details.
- *
- * All fields are stored in network byte order when serialized. To
- * generate a copy with fields swapped to native byte order, use the
- * function avb_vbmeta_image_header_to_host_byte_order().
- *
- * Before reading and/or using any of this data, you MUST verify it
- * using avb_vbmeta_image_verify() and reject it unless it's signed by
- * a known good public key.
- */
-typedef struct AvbVBMetaImageHeader {
-  /*   0: Four bytes equal to "AVB0" (AVB_MAGIC). */
-  uint8_t magic[AVB_MAGIC_LEN];
-
-  /*   4: The major version of libavb required for this header. */
-  uint32_t required_libavb_version_major;
-  /*   8: The minor version of libavb required for this header. */
-  uint32_t required_libavb_version_minor;
-
-  /*  12: The size of the signature block. */
-  uint64_t authentication_data_block_size;
-  /*  20: The size of the auxiliary data block. */
-  uint64_t auxiliary_data_block_size;
-
-  /*  28: The verification algorithm used, see |AvbAlgorithmType| enum. */
-  uint32_t algorithm_type;
-
-  /*  32: Offset into the "Authentication data" block of hash data. */
-  uint64_t hash_offset;
-  /*  40: Length of the hash data. */
-  uint64_t hash_size;
-
-  /*  48: Offset into the "Authentication data" block of signature data. */
-  uint64_t signature_offset;
-  /*  56: Length of the signature data. */
-  uint64_t signature_size;
-
-  /*  64: Offset into the "Auxiliary data" block of public key data. */
-  uint64_t public_key_offset;
-  /*  72: Length of the public key data. */
-  uint64_t public_key_size;
-
-  /*  80: Offset into the "Auxiliary data" block of public key metadata. */
-  uint64_t public_key_metadata_offset;
-  /*  88: Length of the public key metadata. Must be set to zero if there
-   *  is no public key metadata.
-   */
-  uint64_t public_key_metadata_size;
-
-  /*  96: Offset into the "Auxiliary data" block of descriptor data. */
-  uint64_t descriptors_offset;
-  /* 104: Length of descriptor data. */
-  uint64_t descriptors_size;
-
-  /* 112: The rollback index which can be used to prevent rollback to
-   *  older versions.
-   */
-  uint64_t rollback_index;
-
-  /* 120: Flags from the AvbVBMetaImageFlags enumeration. This must be
-   * set to zero if the vbmeta image is not a top-level image.
-   */
-  uint32_t flags;
-
-  /* 124: Reserved to ensure |release_string| start on a 16-byte
-   * boundary. Must be set to zeroes.
-   */
-  uint8_t reserved0[4];
-
-  /* 128: The release string from avbtool, e.g. "avbtool 1.0.0" or
-   * "avbtool 1.0.0 xyz_board Git-234abde89". Is guaranteed to be NUL
-   * terminated. Applications must not make assumptions about how this
-   * string is formatted.
-   */
-  uint8_t release_string[AVB_RELEASE_STRING_SIZE];
-
-  /* 176: Padding to ensure struct is size AVB_VBMETA_IMAGE_HEADER_SIZE
-   * bytes. This must be set to zeroes.
-   */
-  uint8_t reserved[80];
-} AVB_ATTR_PACKED AvbVBMetaImageHeader;
-
-/* Copies |src| to |dest|, byte-swapping fields in the process.
- *
- * Make sure you've verified |src| using avb_vbmeta_image_verify()
- * before accessing the data and/or using this function.
- */
-void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
-                                                AvbVBMetaImageHeader* dest);
-
-/* Return codes used in avb_vbmeta_image_verify().
- *
- * AVB_VBMETA_VERIFY_RESULT_OK is returned if the vbmeta image header
- * is valid, the hash is correct and the signature is correct. Keep in
- * mind that you still need to check that you know the public key used
- * to sign the image, see avb_vbmeta_image_verify() for details.
- *
- * AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED is returned if the vbmeta
- * image header is valid but there is no signature or hash.
- *
- * AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER is returned if the
- * header of the vbmeta image is invalid, for example, invalid magic
- * or inconsistent data.
- *
- * AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION is returned if a) the
- * vbmeta image requires a minimum version of libavb which exceeds the
- * version of libavb used; or b) the vbmeta image major version
- * differs from the major version of libavb in use.
- *
- * AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH is returned if the hash
- * stored in the "Authentication data" block does not match the
- * calculated hash.
- *
- * AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH is returned if the
- * signature stored in the "Authentication data" block is invalid or
- * doesn't match the public key stored in the vbmeta image.
- */
-typedef enum {
-  AVB_VBMETA_VERIFY_RESULT_OK,
-  AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED,
-  AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER,
-  AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION,
-  AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH,
-  AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH,
-} AvbVBMetaVerifyResult;
-
-/* Get a textual representation of |result|. */
-const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result);
-
-/* Checks that vbmeta image at |data| of size |length| is a valid
- * vbmeta image. The complete contents of the vbmeta image must be
- * passed in. It's fine if |length| is bigger than the actual image,
- * typically callers of this function will load the entire contents of
- * the 'vbmeta_a' or 'vbmeta_b' partition and pass in its length (for
- * example, 1 MiB).
- *
- * See the |AvbVBMetaImageHeader| struct for information about the
- * three blocks (header, authentication, auxiliary) that make up a
- * vbmeta image.
- *
- * If the function returns |AVB_VBMETA_VERIFY_RESULT_OK| and
- * |out_public_key_data| is non-NULL, it will be set to point inside
- * |data| for where the serialized public key data is stored and
- * |out_public_key_length|, if non-NULL, will be set to the length of
- * the public key data. If there is no public key in the metadata then
- * |out_public_key_data| is set to NULL.
- *
- * See the |AvbVBMetaVerifyResult| enum for possible return values.
- *
- * VERY IMPORTANT:
- *
- *   1. Even if |AVB_VBMETA_VERIFY_RESULT_OK| is returned, you still
- *      need to check that the public key embedded in the image
- *      matches a known key! You can use 'avbtool extract_public_key'
- *      to extract the key (at build time, then store it along your
- *      code) and compare it to what is returned in
- *      |out_public_key_data|.
- *
- *   2. You need to check the |rollback_index| field against a stored
- *      value in NVRAM and reject the vbmeta image if the value in
- *      NVRAM is bigger than |rollback_index|. You must also update
- *      the value stored in NVRAM to the smallest value of
- *      |rollback_index| field from boot images in all bootable and
- *      authentic slots marked as GOOD.
- *
- * This is a low-level function to only verify the vbmeta data - you
- * are likely looking for avb_slot_verify() instead for verifying
- * integrity data for a whole set of partitions.
- */
-AvbVBMetaVerifyResult avb_vbmeta_image_verify(
-    const uint8_t* data,
-    size_t length,
-    const uint8_t** out_public_key_data,
-    size_t* out_public_key_length) AVB_ATTR_WARN_UNUSED_RESULT;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_VBMETA_IMAGE_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VBMETA_IMAGE_H_
+#define AVB_VBMETA_IMAGE_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "avb_crypto.h"
+#include "avb_descriptor.h"
+
+/* Size of the vbmeta image header. */
+#define AVB_VBMETA_IMAGE_HEADER_SIZE 256
+
+/* Magic for the vbmeta image header. */
+#define AVB_MAGIC "AVB0"
+#define AVB_MAGIC_LEN 4
+
+/* Maximum size of the release string including the terminating NUL byte. */
+#define AVB_RELEASE_STRING_SIZE 48
+
+/* Flags for the vbmeta image.
+ *
+ * AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED: If this flag is set,
+ * hashtree image verification will be disabled.
+ *
+ * AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED: If this flag is set,
+ * verification will be disabled and descriptors will not be parsed.
+ */
+typedef enum {
+  AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED = (1 << 0),
+  AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED = (1 << 1)
+} AvbVBMetaImageFlags;
+
+/* Binary format for header of the vbmeta image.
+ *
+ * The vbmeta image consists of three blocks:
+ *
+ *  +-----------------------------------------+
+ *  | Header data - fixed size                |
+ *  +-----------------------------------------+
+ *  | Authentication data - variable size     |
+ *  +-----------------------------------------+
+ *  | Auxiliary data - variable size          |
+ *  +-----------------------------------------+
+ *
+ * The "Header data" block is described by this struct and is always
+ * |AVB_VBMETA_IMAGE_HEADER_SIZE| bytes long.
+ *
+ * The "Authentication data" block is |authentication_data_block_size|
+ * bytes long and contains the hash and signature used to authenticate
+ * the vbmeta image. The type of the hash and signature is defined by
+ * the |algorithm_type| field.
+ *
+ * The "Auxiliary data" is |auxiliary_data_block_size| bytes long and
+ * contains the auxiliary data including the public key used to make
+ * the signature and descriptors.
+ *
+ * The public key is at offset |public_key_offset| with size
+ * |public_key_size| in this block. The size of the public key data is
+ * defined by the |algorithm_type| field. The format of the public key
+ * data is described in the |AvbRSAPublicKeyHeader| struct.
+ *
+ * The descriptors starts at |descriptors_offset| from the beginning
+ * of the "Auxiliary Data" block and take up |descriptors_size|
+ * bytes. Each descriptor is stored as a |AvbDescriptor| with tag and
+ * number of bytes following. The number of descriptors can be
+ * determined by walking this data until |descriptors_size| is
+ * exhausted.
+ *
+ * The size of each of the "Authentication data" and "Auxiliary data"
+ * blocks must be divisible by 64. This is to ensure proper alignment.
+ *
+ * Descriptors are free-form blocks stored in a part of the vbmeta
+ * image subject to the same integrity checks as the rest of the
+ * image. See the documentation for |AvbDescriptor| for well-known
+ * descriptors. See avb_descriptor_foreach() for a convenience
+ * function to iterate over descriptors.
+ *
+ * This struct is versioned, see the |required_libavb_version_major|
+ * and |required_libavb_version_minor| fields. This represents the
+ * minimum version of libavb required to verify the header and depends
+ * on the features (e.g. algorithms, descriptors) used. Note that this
+ * may be 1.0 even if generated by an avbtool from 1.4 but where no
+ * features introduced after 1.0 has been used. See the "Versioning
+ * and compatibility" section in the README.md file for more details.
+ *
+ * All fields are stored in network byte order when serialized. To
+ * generate a copy with fields swapped to native byte order, use the
+ * function avb_vbmeta_image_header_to_host_byte_order().
+ *
+ * Before reading and/or using any of this data, you MUST verify it
+ * using avb_vbmeta_image_verify() and reject it unless it's signed by
+ * a known good public key.
+ */
+typedef struct AvbVBMetaImageHeader {
+  /*   0: Four bytes equal to "AVB0" (AVB_MAGIC). */
+  uint8_t magic[AVB_MAGIC_LEN];
+
+  /*   4: The major version of libavb required for this header. */
+  uint32_t required_libavb_version_major;
+  /*   8: The minor version of libavb required for this header. */
+  uint32_t required_libavb_version_minor;
+
+  /*  12: The size of the signature block. */
+  uint64_t authentication_data_block_size;
+  /*  20: The size of the auxiliary data block. */
+  uint64_t auxiliary_data_block_size;
+
+  /*  28: The verification algorithm used, see |AvbAlgorithmType| enum. */
+  uint32_t algorithm_type;
+
+  /*  32: Offset into the "Authentication data" block of hash data. */
+  uint64_t hash_offset;
+  /*  40: Length of the hash data. */
+  uint64_t hash_size;
+
+  /*  48: Offset into the "Authentication data" block of signature data. */
+  uint64_t signature_offset;
+  /*  56: Length of the signature data. */
+  uint64_t signature_size;
+
+  /*  64: Offset into the "Auxiliary data" block of public key data. */
+  uint64_t public_key_offset;
+  /*  72: Length of the public key data. */
+  uint64_t public_key_size;
+
+  /*  80: Offset into the "Auxiliary data" block of public key metadata. */
+  uint64_t public_key_metadata_offset;
+  /*  88: Length of the public key metadata. Must be set to zero if there
+   *  is no public key metadata.
+   */
+  uint64_t public_key_metadata_size;
+
+  /*  96: Offset into the "Auxiliary data" block of descriptor data. */
+  uint64_t descriptors_offset;
+  /* 104: Length of descriptor data. */
+  uint64_t descriptors_size;
+
+  /* 112: The rollback index which can be used to prevent rollback to
+   *  older versions.
+   */
+  uint64_t rollback_index;
+
+  /* 120: Flags from the AvbVBMetaImageFlags enumeration. This must be
+   * set to zero if the vbmeta image is not a top-level image.
+   */
+  uint32_t flags;
+
+  /* 124: Reserved to ensure |release_string| start on a 16-byte
+   * boundary. Must be set to zeroes.
+   */
+  uint8_t reserved0[4];
+
+  /* 128: The release string from avbtool, e.g. "avbtool 1.0.0" or
+   * "avbtool 1.0.0 xyz_board Git-234abde89". Is guaranteed to be NUL
+   * terminated. Applications must not make assumptions about how this
+   * string is formatted.
+   */
+  uint8_t release_string[AVB_RELEASE_STRING_SIZE];
+
+  /* 176: Padding to ensure struct is size AVB_VBMETA_IMAGE_HEADER_SIZE
+   * bytes. This must be set to zeroes.
+   */
+  uint8_t reserved[80];
+} AVB_ATTR_PACKED AvbVBMetaImageHeader;
+
+/* Copies |src| to |dest|, byte-swapping fields in the process.
+ *
+ * Make sure you've verified |src| using avb_vbmeta_image_verify()
+ * before accessing the data and/or using this function.
+ */
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest);
+
+/* Return codes used in avb_vbmeta_image_verify().
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK is returned if the vbmeta image header
+ * is valid, the hash is correct and the signature is correct. Keep in
+ * mind that you still need to check that you know the public key used
+ * to sign the image, see avb_vbmeta_image_verify() for details.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED is returned if the vbmeta
+ * image header is valid but there is no signature or hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER is returned if the
+ * header of the vbmeta image is invalid, for example, invalid magic
+ * or inconsistent data.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION is returned if a) the
+ * vbmeta image requires a minimum version of libavb which exceeds the
+ * version of libavb used; or b) the vbmeta image major version
+ * differs from the major version of libavb in use.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH is returned if the hash
+ * stored in the "Authentication data" block does not match the
+ * calculated hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH is returned if the
+ * signature stored in the "Authentication data" block is invalid or
+ * doesn't match the public key stored in the vbmeta image.
+ */
+typedef enum {
+  AVB_VBMETA_VERIFY_RESULT_OK,
+  AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED,
+  AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER,
+  AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION,
+  AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH,
+  AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH,
+} AvbVBMetaVerifyResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result);
+
+/* Checks that vbmeta image at |data| of size |length| is a valid
+ * vbmeta image. The complete contents of the vbmeta image must be
+ * passed in. It's fine if |length| is bigger than the actual image,
+ * typically callers of this function will load the entire contents of
+ * the 'vbmeta_a' or 'vbmeta_b' partition and pass in its length (for
+ * example, 1 MiB).
+ *
+ * See the |AvbVBMetaImageHeader| struct for information about the
+ * three blocks (header, authentication, auxiliary) that make up a
+ * vbmeta image.
+ *
+ * If the function returns |AVB_VBMETA_VERIFY_RESULT_OK| and
+ * |out_public_key_data| is non-NULL, it will be set to point inside
+ * |data| for where the serialized public key data is stored and
+ * |out_public_key_length|, if non-NULL, will be set to the length of
+ * the public key data. If there is no public key in the metadata then
+ * |out_public_key_data| is set to NULL.
+ *
+ * See the |AvbVBMetaVerifyResult| enum for possible return values.
+ *
+ * VERY IMPORTANT:
+ *
+ *   1. Even if |AVB_VBMETA_VERIFY_RESULT_OK| is returned, you still
+ *      need to check that the public key embedded in the image
+ *      matches a known key! You can use 'avbtool extract_public_key'
+ *      to extract the key (at build time, then store it along your
+ *      code) and compare it to what is returned in
+ *      |out_public_key_data|.
+ *
+ *   2. You need to check the |rollback_index| field against a stored
+ *      value in NVRAM and reject the vbmeta image if the value in
+ *      NVRAM is bigger than |rollback_index|. You must also update
+ *      the value stored in NVRAM to the smallest value of
+ *      |rollback_index| field from boot images in all bootable and
+ *      authentic slots marked as GOOD.
+ *
+ * This is a low-level function to only verify the vbmeta data - you
+ * are likely looking for avb_slot_verify() instead for verifying
+ * integrity data for a whole set of partitions.
+ */
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VBMETA_IMAGE_H_ */
diff --git a/include/android_avb/avb_version.h b/include/android_avb/avb_version.h
index 3479acc484..48e11705a9 100644
--- a/include/android_avb/avb_version.h
+++ b/include/android_avb/avb_version.h
@@ -1,61 +1,61 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/*
-#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
-#error "Never include this file directly, include libavb.h instead."
-#endif
-*/
-
-#ifndef AVB_VERSION_H_
-#define AVB_VERSION_H_
-
-#include <android_avb/avb_sysdeps.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* The version number of AVB - keep in sync with avbtool. */
-#define AVB_VERSION_MAJOR 1
-#define AVB_VERSION_MINOR 0
-#define AVB_VERSION_SUB 0
-
-/* Returns a NUL-terminated string for the libavb version in use.  The
- * returned string usually looks like "%d.%d.%d". Applications must
- * not make assumptions about the content of this string.
- *
- * Boot loaders should display this string in debug/diagnostics output
- * to aid with debugging.
- *
- * This is similar to the string put in the |release_string| string
- * field in the VBMeta struct by avbtool.
- */
-const char* avb_version_string(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* AVB_VERSION_H_ */
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VERSION_H_
+#define AVB_VERSION_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The version number of AVB - keep in sync with avbtool. */
+#define AVB_VERSION_MAJOR 1
+#define AVB_VERSION_MINOR 0
+#define AVB_VERSION_SUB 0
+
+/* Returns a NUL-terminated string for the libavb version in use.  The
+ * returned string usually looks like "%d.%d.%d". Applications must
+ * not make assumptions about the content of this string.
+ *
+ * Boot loaders should display this string in debug/diagnostics output
+ * to aid with debugging.
+ *
+ * This is similar to the string put in the |release_string| string
+ * field in the VBMeta struct by avbtool.
+ */
+const char* avb_version_string(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VERSION_H_ */
diff --git a/include/android_avb/libavb.h b/include/android_avb/libavb.h
index 596a8b7245..0e2b9c7cac 100644
--- a/include/android_avb/libavb.h
+++ b/include/android_avb/libavb.h
@@ -1,50 +1,50 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef LIBAVB_H_
-#define LIBAVB_H_
-
-/* The AVB_INSIDE_LIBAVB_H preprocessor symbol is used to enforce
- * library users to include only this file. All public interfaces, and
- * only public interfaces, must be included here.
- */
-
-#define AVB_INSIDE_LIBAVB_H
-#include <android_avb/avb_chain_partition_descriptor.h>
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_descriptor.h>
-#include <android_avb/avb_footer.h>
-#include <android_avb/avb_hash_descriptor.h>
-#include <android_avb/avb_hashtree_descriptor.h>
-#include <android_avb/avb_kernel_cmdline_descriptor.h>
-#include <android_avb/avb_ops.h>
-#include <android_avb/avb_property_descriptor.h>
-#include <android_avb/avb_slot_verify.h>
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_version.h>
-#undef AVB_INSIDE_LIBAVB_H
-
-#endif /* LIBAVB_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_H_
+#define LIBAVB_H_
+
+/* The AVB_INSIDE_LIBAVB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_H
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+#undef AVB_INSIDE_LIBAVB_H
+
+#endif /* LIBAVB_H_ */
diff --git a/include/android_avb/libavb_ab.h b/include/android_avb/libavb_ab.h
index fcedfd61bf..562cee1fa7 100644
--- a/include/android_avb/libavb_ab.h
+++ b/include/android_avb/libavb_ab.h
@@ -1,40 +1,54 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef LIBAVB_AB_H_
-#define LIBAVB_AB_H_
-
-#include <android_avb/libavb.h>
-
-/* The AVB_INSIDE_LIBAVB_AB_H preprocessor symbol is used to enforce
- * library users to include only this file. All public interfaces, and
- * only public interfaces, must be included here.
- */
-
-#define AVB_INSIDE_LIBAVB_AB_H
-#include <android_avb/avb_ab_flow.h>
-#include <android_avb/avb_ab_ops.h>
-#undef AVB_INSIDE_LIBAVB_AB_H
-
-#endif /* LIBAVB_AB_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_AB_H_
+#define LIBAVB_AB_H_
+
+#include <android_avb/libavb.h>
+
+/* The libavb_ab/ and boot_control/ code has been marked for some time
+ * as experimental in anticipation of being removed in the future. It
+ * is now deprecated and to continue using it you must define
+ * AVB_AB_I_UNDERSTAND_LIBAVB_AB_IS_DEPRECATED. It will be removed Jun
+ * 1 2018.
+ */
+
+/*
+#ifndef AVB_AB_I_UNDERSTAND_LIBAVB_AB_IS_DEPRECATED
+#error \
+    "You must define AVB_AB_I_UNDERSTAND_LIBAVB_AB_IS_DEPRECATED to use this library."
+#endif
+*/
+
+/* The AVB_INSIDE_LIBAVB_AB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_AB_H
+#include <android_avb/avb_ab_flow.h>
+#include <android_avb/avb_ab_ops.h>
+#undef AVB_INSIDE_LIBAVB_AB_H
+
+#endif /* LIBAVB_AB_H_ */
diff --git a/include/android_avb/libavb_atx.h b/include/android_avb/libavb_atx.h
index fc7c876a18..36ae6daa59 100644
--- a/include/android_avb/libavb_atx.h
+++ b/include/android_avb/libavb_atx.h
@@ -1,41 +1,41 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#ifndef LIBAVB_ATX_H_
-#define LIBAVB_ATX_H_
-
-#include <android_avb/libavb.h>
-
-/* The AVB_INSIDE_LIBAVB_ATX_H preprocessor symbol is used to enforce
- * library users to include only this file. All public interfaces, and
- * only public interfaces, must be included here.
- */
-
-#define AVB_INSIDE_LIBAVB_ATX_H
-#include <android_avb/avb_atx_ops.h>
-#include <android_avb/avb_atx_types.h>
-#include <android_avb/avb_atx_validate.h>
-#undef AVB_INSIDE_LIBAVB_ATX_H
-
-#endif /* LIBAVB_ATX_H_ */
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_ATX_H_
+#define LIBAVB_ATX_H_
+
+#include <android_avb/libavb.h>
+
+/* The AVB_INSIDE_LIBAVB_ATX_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_ATX_H
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+#include <android_avb/avb_atx_validate.h>
+#undef AVB_INSIDE_LIBAVB_ATX_H
+
+#endif /* LIBAVB_ATX_H_ */
diff --git a/include/android_avb/libavb_user.h b/include/android_avb/libavb_user.h
index 2bca7a5dcb..aaf7fde2fc 100644
--- a/include/android_avb/libavb_user.h
+++ b/include/android_avb/libavb_user.h
@@ -25,7 +25,7 @@
 #ifndef LIBAVB_USER_H_
 #define LIBAVB_USER_H_
 
-#include <android_avb/libavb_ab.h>
+#include <android_avb/libavb.h>
 
 /* The AVB_INSIDE_LIBAVB_USER_H preprocessor symbol is used to enforce
  * library users to include only this file. All public interfaces, and
diff --git a/include/android_avb/rk_avb_ops_user.h b/include/android_avb/rk_avb_ops_user.h
new file mode 100644
index 0000000000..fff8060cb0
--- /dev/null
+++ b/include/android_avb/rk_avb_ops_user.h
@@ -0,0 +1,247 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef RK_AVB_OPS_USER_H_
+#define RK_AVB_OPS_USER_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* rk used */
+#define PERM_ATTR_DIGEST_SIZE 32
+#define PERM_ATTR_TOTAL_SIZE  1052
+#define VBOOT_KEY_HASH_SIZE   32
+#define ANDROID_VBOOT_LOCK 0
+#define ANDROID_VBOOT_UNLOCK 1
+#define SLOT_NUM 2
+#define CURR_SYSTEM_SLOT_SUFFIX "ab"
+#define VBMETA_MAX_SIZE 65536
+#define ROLLBACK_MAX_SIZE 20
+#define LOCK_MASK 0x1
+#define UNLOCK_DISABLE_MASK 0x2
+#define VBOOT_STATE_SIZE    300
+#define PERM_ATTR_SUCCESS_FLAG 1
+/* soc-v use the rsa2048 */
+#define VBOOT_KEY_SIZE   256
+
+/**
+ * Provided to fastboot to read how many slot in this system.
+ *
+ * @param slot_count  We use parameter slot_count to obtain
+ *                    how many slots in the system.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_slot_count(char *slot_count);
+
+/**
+ * The android things supply many slots, their name like '_a', '_b'.
+ * We can use this function to read current slot is '_a' or '_b'.
+ *
+ * @slot_suffixes  read value '_a' or '_b'.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_slot_suffixes(char *slot_suffixes);
+
+/**
+ * Use this function to set which slot boot first.
+ *
+ * @param slot_number set '0' or '1'
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_set_slot_active(unsigned int *slot_number);
+
+/**
+ * Get current slot: '_a' or '_b'.
+ *
+ * @param select_slot  obtain current slot.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_get_current_slot(char *select_slot);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to read them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to write them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The funtion can be use to read the device state to judge
+ * whether the device can be flash.
+ *
+ * @param flash_lock_state  A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state);
+
+/**
+ * The function is provided to write device flash state.
+ *
+ * @param flash_lock_state   A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_flash_lock_state(uint8_t flash_lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state  A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_lock_state(uint8_t *lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state   A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_lock_state(uint8_t lock_state);
+
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   indicate the permanent attributes have been written
+ *               or not.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_perm_attr_flag(uint8_t *flag);
+
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   We can call this function to write the flag '1'
+ *               to indicate the permanent attributes has been
+ *               written.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_perm_attr_flag(uint8_t flag);
+
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * U-boot close the optee client when start kernel
+ * to prevent the optee client being invoking by other
+ * program.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_close_optee_client(void);
+
+/**
+ * read the permanent attributes hash.
+ *
+ * @param buf    The permanent attributes hash data.
+ *
+ * @param length The length of permanent attributes hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_read_attribute_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * Write the permanent attributes hash.
+ *
+ * @param buf    The permanent attributes hash data.
+ *
+ * @param length The length of permanent attributes hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_write_attribute_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * Get the avb vboot state
+ *
+ * @param buf    store the vboot state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+void rk_avb_get_at_vboot_state(char *buf);
+
+/**
+ * Get ab information from misc partition
+ *
+ * @param ab_data    the struct of ab information
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int rk_avb_get_ab_info(AvbABData* ab_data);
+
+/**
+ * Get the information whether the partition has slot
+ *
+ * @param the partition name
+ *
+ * @return 0 if the partition has slot, -1 if not
+ */
+int rk_avb_get_part_has_slot_info(const char *base_name);
+
+AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* RK_AVB_OPS_USER_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 78e44aca0c..0743d91360 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -298,10 +298,11 @@ endmenu
 
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
-source lib/avb/rk_libavb/Kconfig
-source lib/avb/rk_libavb_ab/Kconfig
-source lib/avb/rk_libavb_atx/Kconfig
-source lib/avb/rk_libavb_user/Kconfig
+source lib/avb/libavb/Kconfig
+source lib/avb/libavb_ab/Kconfig
+source lib/avb/libavb_atx/Kconfig
+source lib/avb/libavb_user/Kconfig
+source lib/avb/rk_avb_user/Kconfig
 source lib/optee_clientApi/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 6000cd15d0..fdb9f8e043 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -44,10 +44,11 @@ obj-y += list_sort.o
 obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 endif
 
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/rk_libavb/
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/rk_libavb_ab/
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
-obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/rk_libavb_user/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/libavb/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/libavb_ab/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/libavb_atx/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/libavb_user/
+obj-$(CONFIG_$(SPL_TPL_)RK_AVB_LIBAVB_USER) += avb/rk_avb_user/
 
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/avb/rk_libavb/Kconfig b/lib/avb/libavb/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb/Kconfig
rename to lib/avb/libavb/Kconfig
diff --git a/lib/avb/rk_libavb/Makefile b/lib/avb/libavb/Makefile
similarity index 95%
rename from lib/avb/rk_libavb/Makefile
rename to lib/avb/libavb/Makefile
index 07ddb0cb9a..7b3d37b052 100644
--- a/lib/avb/rk_libavb/Makefile
+++ b/lib/avb/libavb/Makefile
@@ -1,4 +1,5 @@
 obj-y	+= avb_chain_partition_descriptor.o
+obj-y	+= avb_cmdline.o
 obj-y	+= avb_crc32.o
 obj-y	+= avb_crypto.o
 obj-y	+= avb_descriptor.o
diff --git a/lib/avb/rk_libavb/avb_chain_partition_descriptor.c b/lib/avb/libavb/avb_chain_partition_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_chain_partition_descriptor.c
rename to lib/avb/libavb/avb_chain_partition_descriptor.c
index 145b01b560..c325f7daf3 100644
--- a/lib/avb/rk_libavb/avb_chain_partition_descriptor.c
+++ b/lib/avb/libavb/avb_chain_partition_descriptor.c
@@ -1,64 +1,64 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_chain_partition_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_chain_partition_descriptor_validate_and_byteswap(
-    const AvbChainPartitionDescriptor* src, AvbChainPartitionDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbChainPartitionDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_CHAIN_PARTITION) {
-    avb_error("Invalid tag for chain partition descriptor.\n");
-    return false;
-  }
-
-  dest->rollback_index_location = avb_be32toh(dest->rollback_index_location);
-  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
-  dest->public_key_len = avb_be32toh(dest->public_key_len);
-
-  if (dest->rollback_index_location < 1) {
-    avb_error("Invalid rollback index location value.\n");
-    return false;
-  }
-
-  /* Check that partition_name and public_key are fully contained. */
-  expected_size = sizeof(AvbChainPartitionDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
-      !avb_safe_add_to(&expected_size, dest->public_key_len)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src, AvbChainPartitionDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbChainPartitionDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_CHAIN_PARTITION) {
+    avb_error("Invalid tag for chain partition descriptor.\n");
+    return false;
+  }
+
+  dest->rollback_index_location = avb_be32toh(dest->rollback_index_location);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->public_key_len = avb_be32toh(dest->public_key_len);
+
+  if (dest->rollback_index_location < 1) {
+    avb_error("Invalid rollback index location value.\n");
+    return false;
+  }
+
+  /* Check that partition_name and public_key are fully contained. */
+  expected_size = sizeof(AvbChainPartitionDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->public_key_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/libavb/avb_cmdline.c b/lib/avb/libavb/avb_cmdline.c
new file mode 100644
index 0000000000..ecf582ebd9
--- /dev/null
+++ b/lib/avb/libavb/avb_cmdline.c
@@ -0,0 +1,371 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_cmdline.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+#define NUM_GUIDS 3
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+char* avb_sub_cmdline(AvbOps* ops, const char* cmdline, const char* ab_suffix,
+                      bool using_boot_for_vbmeta) {
+  const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
+  const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
+                                        "$(ANDROID_BOOT_PARTUUID)",
+                                        "$(ANDROID_VBMETA_PARTUUID)"};
+  char* ret = NULL;
+  AvbIOResult io_ret;
+  size_t n;
+
+  /* Special-case for when the top-level vbmeta struct is in the boot
+   * partition.
+   */
+  if (using_boot_for_vbmeta) {
+    part_name_str[2] = "boot";
+  }
+
+  /* Replace unique partition GUIDs */
+  for (n = 0; n < NUM_GUIDS; n++) {
+    char part_name[AVB_PART_NAME_MAX_SIZE];
+    char guid_buf[37];
+
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        part_name_str[n],
+                        avb_strlen(part_name_str[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      goto fail;
+    }
+
+    io_ret = ops->get_unique_guid_for_partition(
+        ops, part_name, guid_buf, sizeof guid_buf);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return NULL;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_error("Error getting unique GUID for partition.\n");
+      goto fail;
+    }
+
+    if (ret == NULL) {
+      ret = avb_replace(cmdline, replace_str[n], guid_buf);
+    } else {
+      char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
+      avb_free(ret);
+      ret = new_ret;
+    }
+    if (ret == NULL) {
+      goto fail;
+    }
+  }
+
+  return ret;
+
+fail:
+  if (ret != NULL) {
+    avb_free(ret);
+  }
+  return NULL;
+}
+
+static int cmdline_append_option(AvbSlotVerifyData* slot_data,
+                                 const char* key,
+                                 const char* value) {
+  size_t offset, key_len, value_len;
+  char* new_cmdline;
+
+  key_len = avb_strlen(key);
+  value_len = avb_strlen(value);
+
+  offset = 0;
+  if (slot_data->cmdline != NULL) {
+    offset = avb_strlen(slot_data->cmdline);
+    if (offset > 0) {
+      offset += 1;
+    }
+  }
+
+  new_cmdline = avb_calloc(offset + key_len + value_len + 2);
+  if (new_cmdline == NULL) {
+    return 0;
+  }
+  if (offset > 0) {
+    avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
+    new_cmdline[offset - 1] = ' ';
+  }
+  avb_memcpy(new_cmdline + offset, key, key_len);
+  new_cmdline[offset + key_len] = '=';
+  avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
+  if (slot_data->cmdline != NULL) {
+    avb_free(slot_data->cmdline);
+  }
+  slot_data->cmdline = new_cmdline;
+
+  return 1;
+}
+
+#define AVB_MAX_DIGITS_UINT64 32
+
+/* Writes |value| to |digits| in base 10 followed by a NUL byte.
+ * Returns number of characters written excluding the NUL byte.
+ */
+static size_t uint64_to_base10(uint64_t value,
+                               char digits[AVB_MAX_DIGITS_UINT64]) {
+  char rev_digits[AVB_MAX_DIGITS_UINT64];
+  size_t n, num_digits;
+
+  for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
+    rev_digits[num_digits++] = avb_div_by_10(&value) + '0';
+    if (value == 0) {
+      break;
+    }
+  }
+
+  for (n = 0; n < num_digits; n++) {
+    digits[n] = rev_digits[num_digits - 1 - n];
+  }
+  digits[n] = '\0';
+  return n;
+}
+
+static int cmdline_append_version(AvbSlotVerifyData* slot_data,
+                                  const char* key,
+                                  uint64_t major_version,
+                                  uint64_t minor_version) {
+  char major_digits[AVB_MAX_DIGITS_UINT64];
+  char minor_digits[AVB_MAX_DIGITS_UINT64];
+  char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
+  size_t num_major_digits, num_minor_digits;
+
+  num_major_digits = uint64_to_base10(major_version, major_digits);
+  num_minor_digits = uint64_to_base10(minor_version, minor_digits);
+  avb_memcpy(combined, major_digits, num_major_digits);
+  combined[num_major_digits] = '.';
+  avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
+  combined[num_major_digits + 1 + num_minor_digits] = '\0';
+
+  return cmdline_append_option(slot_data, key, combined);
+}
+
+static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
+                                        const char* key,
+                                        uint64_t value) {
+  char digits[AVB_MAX_DIGITS_UINT64];
+  uint64_to_base10(value, digits);
+  return cmdline_append_option(slot_data, key, digits);
+}
+
+static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
+                              const char* key,
+                              const uint8_t* data,
+                              size_t data_len) {
+  char hex_digits[17] = "0123456789abcdef";
+  char* hex_data;
+  int ret;
+  size_t n;
+
+  hex_data = avb_malloc(data_len * 2 + 1);
+  if (hex_data == NULL) {
+    return 0;
+  }
+
+  for (n = 0; n < data_len; n++) {
+    hex_data[n * 2] = hex_digits[data[n] >> 4];
+    hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
+  }
+  hex_data[n * 2] = '\0';
+
+  ret = cmdline_append_option(slot_data, key, hex_data);
+  avb_free(hex_data);
+  return ret;
+}
+
+AvbSlotVerifyResult avb_append_options(
+    AvbOps* ops,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode) {
+  AvbSlotVerifyResult ret;
+  const char* verity_mode = NULL;
+  bool is_device_unlocked;
+  AvbIOResult io_ret;
+
+  /* Add androidboot.vbmeta.device option. */
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device",
+                             "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Add androidboot.vbmeta.avb_version option. */
+  if (!cmdline_append_version(slot_data,
+                              "androidboot.vbmeta.avb_version",
+                              AVB_VERSION_MAJOR,
+                              AVB_VERSION_MINOR)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
+  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error getting device state.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device_state",
+                             is_device_unlocked ? "unlocked" : "locked")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
+   * function as is used to sign vbmeta.
+   */
+  switch (algorithm_type) {
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_NONE:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
+      AvbSHA256Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha256_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha256_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha256_final(&ctx),
+                              AVB_SHA256_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
+      AvbSHA512Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha512_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha512_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha512_final(&ctx),
+                              AVB_SHA512_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    case _AVB_ALGORITHM_NUM_TYPES:
+      avb_assert_not_reached();
+      break;
+  }
+
+  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
+  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+    verity_mode = "disabled";
+  } else {
+    const char* dm_verity_mode = NULL;
+    char* new_ret;
+
+    switch (hashtree_error_mode) {
+      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
+        if (!cmdline_append_option(
+                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+          goto out;
+        }
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_RESTART:
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_EIO:
+        verity_mode = "eio";
+        /* For now there's no option to specify the EIO mode. So
+         * just use 'ignore_zero_blocks' since that's already set
+         * and dm-verity-target.c supports specifying this multiple
+         * times.
+         */
+        dm_verity_mode = "ignore_zero_blocks";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_LOGGING:
+        verity_mode = "logging";
+        dm_verity_mode = "ignore_corruption";
+        break;
+    }
+    new_ret = avb_replace(
+        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
+    avb_free(slot_data->cmdline);
+    slot_data->cmdline = new_ret;
+    if (slot_data->cmdline == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+  }
+  if (!cmdline_append_option(
+          slot_data, "androidboot.veritymode", verity_mode)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  return ret;
+}
+
diff --git a/lib/avb/rk_libavb/avb_crc32.c b/lib/avb/libavb/avb_crc32.c
similarity index 94%
rename from lib/avb/rk_libavb/avb_crc32.c
rename to lib/avb/libavb/avb_crc32.c
index 674dfe38c6..8629eb627b 100644
--- a/lib/avb/rk_libavb/avb_crc32.c
+++ b/lib/avb/libavb/avb_crc32.c
@@ -1,114 +1,114 @@
-/*-
- *  COPYRIGHT (C) 1986 Gary S. Brown.  You may use this program, or
- *  code or tables extracted from it, as desired without restriction.
- */
-
-/*
- *  First, the polynomial itself and its table of feedback terms.  The
- *  polynomial is
- *  X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
- *
- *  Note that we take it "backwards" and put the highest-order term in
- *  the lowest-order bit.  The X^32 term is "implied"; the LSB is the
- *  X^31 term, etc.  The X^0 term (usually shown as "+1") results in
- *  the MSB being 1
- *
- *  Note that the usual hardware shift register implementation, which
- *  is what we're using (we're merely optimizing it by doing eight-bit
- *  chunks at a time) shifts bits into the lowest-order term.  In our
- *  implementation, that means shifting towards the right.  Why do we
- *  do it this way?  Because the calculated CRC must be transmitted in
- *  order from highest-order term to lowest-order term.  UARTs transmit
- *  characters in order from LSB to MSB.  By storing the CRC this way
- *  we hand it to the UART in the order low-byte to high-byte; the UART
- *  sends each low-bit to hight-bit; and the result is transmission bit
- *  by bit from highest- to lowest-order term without requiring any bit
- *  shuffling on our part.  Reception works similarly
- *
- *  The feedback terms table consists of 256, 32-bit entries.  Notes
- *
- *      The table can be generated at runtime if desired; code to do so
- *      is shown later.  It might not be obvious, but the feedback
- *      terms simply represent the results of eight shift/xor opera
- *      tions for all combinations of data and CRC register values
- *
- *      The values must be right-shifted by eight bits by the "updcrc
- *      logic; the shift must be unsigned (bring in zeroes).  On some
- *      hardware you could probably optimize the shift in assembler by
- *      using byte-swap instructions
- *      polynomial $edb88320
- *
- *
- * CRC32 code derived from work by Gary S. Brown.
- */
-
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-
-/* Code taken from FreeBSD 8 */
-
-static uint32_t crc32_tab[] = {
-    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
-    0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
-    0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
-    0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
-    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
-    0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
-    0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
-    0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
-    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
-    0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
-    0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
-    0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
-    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
-    0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
-    0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
-    0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
-    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
-    0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
-    0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
-    0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
-    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
-    0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
-    0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
-    0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
-    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
-    0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
-    0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
-    0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
-    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
-    0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
-    0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
-    0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
-    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
-    0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
-    0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
-    0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
-    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
-    0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
-    0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
-    0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
-    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
-    0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
-    0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d};
-
-/*
- * A function that calculates the CRC-32 based on the table above is
- * given below for documentation purposes. An equivalent implementation
- * of this function that's actually used in the kernel can be found
- * in sys/libkern.h, where it can be inlined.
- */
-
-static uint32_t crc32(uint32_t crc_in, const uint8_t* buf, int size) {
-  const uint8_t* p = buf;
-  uint32_t crc;
-
-  crc = crc_in ^ ~0U;
-  while (size--)
-    crc = crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8);
-  return crc ^ ~0U;
-}
-
-uint32_t avb_crc32(const uint8_t* buf, size_t size) {
-  return crc32(0, buf, size);
-}
+/*-
+ *  COPYRIGHT (C) 1986 Gary S. Brown.  You may use this program, or
+ *  code or tables extracted from it, as desired without restriction.
+ */
+
+/*
+ *  First, the polynomial itself and its table of feedback terms.  The
+ *  polynomial is
+ *  X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
+ *
+ *  Note that we take it "backwards" and put the highest-order term in
+ *  the lowest-order bit.  The X^32 term is "implied"; the LSB is the
+ *  X^31 term, etc.  The X^0 term (usually shown as "+1") results in
+ *  the MSB being 1
+ *
+ *  Note that the usual hardware shift register implementation, which
+ *  is what we're using (we're merely optimizing it by doing eight-bit
+ *  chunks at a time) shifts bits into the lowest-order term.  In our
+ *  implementation, that means shifting towards the right.  Why do we
+ *  do it this way?  Because the calculated CRC must be transmitted in
+ *  order from highest-order term to lowest-order term.  UARTs transmit
+ *  characters in order from LSB to MSB.  By storing the CRC this way
+ *  we hand it to the UART in the order low-byte to high-byte; the UART
+ *  sends each low-bit to hight-bit; and the result is transmission bit
+ *  by bit from highest- to lowest-order term without requiring any bit
+ *  shuffling on our part.  Reception works similarly
+ *
+ *  The feedback terms table consists of 256, 32-bit entries.  Notes
+ *
+ *      The table can be generated at runtime if desired; code to do so
+ *      is shown later.  It might not be obvious, but the feedback
+ *      terms simply represent the results of eight shift/xor opera
+ *      tions for all combinations of data and CRC register values
+ *
+ *      The values must be right-shifted by eight bits by the "updcrc
+ *      logic; the shift must be unsigned (bring in zeroes).  On some
+ *      hardware you could probably optimize the shift in assembler by
+ *      using byte-swap instructions
+ *      polynomial $edb88320
+ *
+ *
+ * CRC32 code derived from work by Gary S. Brown.
+ */
+
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Code taken from FreeBSD 8 */
+
+static uint32_t iavb_crc32_tab[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
+    0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+    0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
+    0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
+    0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+    0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
+    0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
+    0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+    0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
+    0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
+    0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
+    0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
+    0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
+    0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
+    0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
+    0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
+    0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
+    0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
+    0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
+    0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
+    0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
+    0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
+    0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
+    0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
+    0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
+    0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
+    0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
+    0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
+    0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
+    0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
+    0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
+    0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
+    0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d};
+
+/*
+ * A function that calculates the CRC-32 based on the table above is
+ * given below for documentation purposes. An equivalent implementation
+ * of this function that's actually used in the kernel can be found
+ * in sys/libkern.h, where it can be inlined.
+ */
+
+static uint32_t iavb_crc32(uint32_t crc_in, const uint8_t* buf, int size) {
+  const uint8_t* p = buf;
+  uint32_t crc;
+
+  crc = crc_in ^ ~0U;
+  while (size--)
+    crc = iavb_crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8);
+  return crc ^ ~0U;
+}
+
+uint32_t avb_crc32(const uint8_t* buf, size_t size) {
+  return iavb_crc32(0, buf, size);
+}
diff --git a/lib/avb/rk_libavb/avb_crypto.c b/lib/avb/libavb/avb_crypto.c
similarity index 98%
rename from lib/avb/rk_libavb/avb_crypto.c
rename to lib/avb/libavb/avb_crypto.c
index 89c814803c..a99979a622 100644
--- a/lib/avb/rk_libavb/avb_crypto.c
+++ b/lib/avb/libavb/avb_crypto.c
@@ -1,373 +1,372 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-
-/* NOTE: The PKC1-v1.5 padding is a blob of binary DER of ASN.1 and is
- * obtained from section 5.2.2 of RFC 4880.
- */
-
-static const uint8_t
-    padding_RSA2048_SHA256[AVB_RSA2048_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
-        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
-
-static const uint8_t
-    padding_RSA4096_SHA256[AVB_RSA4096_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,
-        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
-
-static const uint8_t
-    padding_RSA8192_SHA256[AVB_RSA8192_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
-        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
-
-static const uint8_t
-    padding_RSA2048_SHA512[AVB_RSA2048_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
-        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
-
-static const uint8_t
-    padding_RSA4096_SHA512[AVB_RSA4096_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30,
-        0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03,
-        0x05, 0x00, 0x04, 0x40};
-
-static const uint8_t
-    padding_RSA8192_SHA512[AVB_RSA8192_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
-        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
-        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
-
-static AvbAlgorithmData algorithm_data[_AVB_ALGORITHM_NUM_TYPES] = {
-    /* AVB_ALGORITHM_TYPE_NONE */
-    {.padding = NULL, .padding_len = 0, .hash_len = 0},
-    /* AVB_ALGORITHM_TYPE_SHA256_RSA2048 */
-    {.padding = padding_RSA2048_SHA256,
-     .padding_len = sizeof(padding_RSA2048_SHA256),
-     .hash_len = AVB_SHA256_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA256_RSA4096 */
-    {.padding = padding_RSA4096_SHA256,
-     .padding_len = sizeof(padding_RSA4096_SHA256),
-     .hash_len = AVB_SHA256_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA256_RSA8192 */
-    {.padding = padding_RSA8192_SHA256,
-     .padding_len = sizeof(padding_RSA8192_SHA256),
-     .hash_len = AVB_SHA256_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA512_RSA2048 */
-    {.padding = padding_RSA2048_SHA512,
-     .padding_len = sizeof(padding_RSA2048_SHA512),
-     .hash_len = AVB_SHA512_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA512_RSA4096 */
-    {.padding = padding_RSA4096_SHA512,
-     .padding_len = sizeof(padding_RSA4096_SHA512),
-     .hash_len = AVB_SHA512_DIGEST_SIZE},
-    /* AVB_ALGORITHM_TYPE_SHA512_RSA8192 */
-    {.padding = padding_RSA8192_SHA512,
-     .padding_len = sizeof(padding_RSA8192_SHA512),
-     .hash_len = AVB_SHA512_DIGEST_SIZE},
-};
-
-const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm) {
-  if (algorithm >= AVB_ALGORITHM_TYPE_NONE &&
-      algorithm < _AVB_ALGORITHM_NUM_TYPES) {
-    return &algorithm_data[algorithm];
-  }
-  return NULL;
-}
-
-bool avb_rsa_public_key_header_validate_and_byteswap(
-    const AvbRSAPublicKeyHeader* src, AvbRSAPublicKeyHeader* dest) {
-  avb_memcpy(dest, src, sizeof(AvbRSAPublicKeyHeader));
-
-  dest->key_num_bits = avb_be32toh(dest->key_num_bits);
-  dest->n0inv = avb_be32toh(dest->n0inv);
-
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+
+/* NOTE: The PKC1-v1.5 padding is a blob of binary DER of ASN.1 and is
+ * obtained from section 5.2.2 of RFC 4880.
+ */
+
+static const uint8_t
+    padding_RSA2048_SHA256[AVB_RSA2048_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA4096_SHA256[AVB_RSA4096_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA8192_SHA256[AVB_RSA8192_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA2048_SHA512[AVB_RSA2048_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA4096_SHA512[AVB_RSA4096_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30,
+        0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03,
+        0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA8192_SHA512[AVB_RSA8192_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static AvbAlgorithmData algorithm_data[_AVB_ALGORITHM_NUM_TYPES] = {
+    /* AVB_ALGORITHM_TYPE_NONE */
+    {.padding = NULL, .padding_len = 0, .hash_len = 0},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA2048 */
+    {.padding = padding_RSA2048_SHA256,
+     .padding_len = sizeof(padding_RSA2048_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA4096 */
+    {.padding = padding_RSA4096_SHA256,
+     .padding_len = sizeof(padding_RSA4096_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA8192 */
+    {.padding = padding_RSA8192_SHA256,
+     .padding_len = sizeof(padding_RSA8192_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA2048 */
+    {.padding = padding_RSA2048_SHA512,
+     .padding_len = sizeof(padding_RSA2048_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA4096 */
+    {.padding = padding_RSA4096_SHA512,
+     .padding_len = sizeof(padding_RSA4096_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA8192 */
+    {.padding = padding_RSA8192_SHA512,
+     .padding_len = sizeof(padding_RSA8192_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+};
+
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm) {
+  if ((size_t)algorithm < _AVB_ALGORITHM_NUM_TYPES) {
+    return &algorithm_data[algorithm];
+  }
+  return NULL;
+}
+
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src, AvbRSAPublicKeyHeader* dest) {
+  avb_memcpy(dest, src, sizeof(AvbRSAPublicKeyHeader));
+
+  dest->key_num_bits = avb_be32toh(dest->key_num_bits);
+  dest->n0inv = avb_be32toh(dest->n0inv);
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_descriptor.c b/lib/avb/libavb/avb_descriptor.c
similarity index 96%
rename from lib/avb/rk_libavb/avb_descriptor.c
rename to lib/avb/libavb/avb_descriptor.c
index ffe9add145..c90b2d94fd 100644
--- a/lib/avb/rk_libavb/avb_descriptor.c
+++ b/lib/avb/libavb/avb_descriptor.c
@@ -1,160 +1,160 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_descriptor.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
-                                          AvbDescriptor* dest) {
-  dest->tag = avb_be64toh(src->tag);
-  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
-
-  if ((dest->num_bytes_following & 0x07) != 0) {
-    avb_error("Descriptor size is not divisible by 8.\n");
-    return false;
-  }
-  return true;
-}
-
-bool avb_descriptor_foreach(const uint8_t* image_data,
-                            size_t image_size,
-                            AvbDescriptorForeachFunc foreach_func,
-                            void* user_data) {
-  const AvbVBMetaImageHeader* header = NULL;
-  bool ret = false;
-  const uint8_t* image_end;
-  const uint8_t* desc_start;
-  const uint8_t* desc_end;
-  const uint8_t* p;
-
-  if (image_data == NULL) {
-    avb_error("image_data is NULL\n.");
-    goto out;
-  }
-
-  if (foreach_func == NULL) {
-    avb_error("foreach_func is NULL\n.");
-    goto out;
-  }
-
-  if (image_size < sizeof(AvbVBMetaImageHeader)) {
-    avb_error("Length is smaller than header.\n");
-    goto out;
-  }
-
-  /* Ensure magic is correct. */
-  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
-    avb_error("Magic is incorrect.\n");
-    goto out;
-  }
-
-  /* Careful, not byteswapped - also ensure it's aligned properly. */
-  avb_assert_aligned(image_data);
-  header = (const AvbVBMetaImageHeader*)image_data;
-  image_end = image_data + image_size;
-
-  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
-               avb_be64toh(header->authentication_data_block_size) +
-               avb_be64toh(header->descriptors_offset);
-
-  desc_end = desc_start + avb_be64toh(header->descriptors_size);
-
-  if (desc_start < image_data || desc_start > image_end ||
-      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
-    avb_error("Descriptors not inside passed-in data.\n");
-    goto out;
-  }
-
-  for (p = desc_start; p < desc_end;) {
-    const AvbDescriptor* dh = (const AvbDescriptor*)p;
-    avb_assert_aligned(dh);
-    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
-    uint64_t nb_total = sizeof(AvbDescriptor) + nb_following;
-
-    if ((nb_total & 7) != 0) {
-      avb_error("Invalid descriptor length.\n");
-      goto out;
-    }
-
-    if (nb_total + p < desc_start || nb_total + p > desc_end) {
-      avb_error("Invalid data in descriptors array.\n");
-      goto out;
-    }
-
-    if (foreach_func(dh, user_data) == 0) {
-      goto out;
-    }
-
-    p += nb_total;
-  }
-
-  ret = true;
-
-out:
-  return ret;
-}
-
-static bool count_descriptors(const AvbDescriptor* descriptor,
-                              void* user_data) {
-  size_t* num_descriptors = user_data;
-  *num_descriptors += 1;
-  return true;
-}
-
-typedef struct {
-  size_t descriptor_number;
-  const AvbDescriptor** descriptors;
-} SetDescriptorData;
-
-static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
-  SetDescriptorData* data = user_data;
-  data->descriptors[data->descriptor_number++] = descriptor;
-  return true;
-}
-
-const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
-                                             size_t image_size,
-                                             size_t* out_num_descriptors) {
-  size_t num_descriptors = 0;
-  SetDescriptorData data;
-
-  avb_descriptor_foreach(
-      image_data, image_size, count_descriptors, &num_descriptors);
-
-  data.descriptor_number = 0;
-  data.descriptors =
-      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
-  if (data.descriptors == NULL) {
-    return NULL;
-  }
-  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
-  avb_assert(data.descriptor_number == num_descriptors);
-
-  if (out_num_descriptors != NULL) {
-    *out_num_descriptors = num_descriptors;
-  }
-
-  return data.descriptors;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
+                                          AvbDescriptor* dest) {
+  dest->tag = avb_be64toh(src->tag);
+  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
+
+  if ((dest->num_bytes_following & 0x07) != 0) {
+    avb_error("Descriptor size is not divisible by 8.\n");
+    return false;
+  }
+  return true;
+}
+
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data) {
+  const AvbVBMetaImageHeader* header = NULL;
+  bool ret = false;
+  const uint8_t* image_end;
+  const uint8_t* desc_start;
+  const uint8_t* desc_end;
+  const uint8_t* p;
+
+  if (image_data == NULL) {
+    avb_error("image_data is NULL\n.");
+    goto out;
+  }
+
+  if (foreach_func == NULL) {
+    avb_error("foreach_func is NULL\n.");
+    goto out;
+  }
+
+  if (image_size < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  /* Careful, not byteswapped - also ensure it's aligned properly. */
+  avb_assert_aligned(image_data);
+  header = (const AvbVBMetaImageHeader*)image_data;
+  image_end = image_data + image_size;
+
+  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
+               avb_be64toh(header->authentication_data_block_size) +
+               avb_be64toh(header->descriptors_offset);
+
+  desc_end = desc_start + avb_be64toh(header->descriptors_size);
+
+  if (desc_start < image_data || desc_start > image_end ||
+      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
+    avb_error("Descriptors not inside passed-in data.\n");
+    goto out;
+  }
+
+  for (p = desc_start; p < desc_end;) {
+    const AvbDescriptor* dh = (const AvbDescriptor*)p;
+    avb_assert_aligned(dh);
+    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
+    uint64_t nb_total = sizeof(AvbDescriptor) + nb_following;
+
+    if ((nb_total & 7) != 0) {
+      avb_error("Invalid descriptor length.\n");
+      goto out;
+    }
+
+    if (nb_total + p < desc_start || nb_total + p > desc_end) {
+      avb_error("Invalid data in descriptors array.\n");
+      goto out;
+    }
+
+    if (foreach_func(dh, user_data) == 0) {
+      goto out;
+    }
+
+    p += nb_total;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+static bool count_descriptors(const AvbDescriptor* descriptor,
+                              void* user_data) {
+  size_t* num_descriptors = user_data;
+  *num_descriptors += 1;
+  return true;
+}
+
+typedef struct {
+  size_t descriptor_number;
+  const AvbDescriptor** descriptors;
+} SetDescriptorData;
+
+static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
+  SetDescriptorData* data = user_data;
+  data->descriptors[data->descriptor_number++] = descriptor;
+  return true;
+}
+
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors) {
+  size_t num_descriptors = 0;
+  SetDescriptorData data;
+
+  avb_descriptor_foreach(
+      image_data, image_size, count_descriptors, &num_descriptors);
+
+  data.descriptor_number = 0;
+  data.descriptors =
+      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
+  if (data.descriptors == NULL) {
+    return NULL;
+  }
+  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
+  avb_assert(data.descriptor_number == num_descriptors);
+
+  if (out_num_descriptors != NULL) {
+    *out_num_descriptors = num_descriptors;
+  }
+
+  return data.descriptors;
+}
diff --git a/lib/avb/rk_libavb/avb_footer.c b/lib/avb/libavb/avb_footer.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_footer.c
rename to lib/avb/libavb/avb_footer.c
index 31257d0949..f3fd95dcf0 100644
--- a/lib/avb/rk_libavb/avb_footer.c
+++ b/lib/avb/libavb/avb_footer.c
@@ -1,54 +1,54 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_footer.h>
-#include <android_avb/avb_util.h>
-
-bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest) {
-  avb_memcpy(dest, src, sizeof(AvbFooter));
-
-  dest->version_major = avb_be32toh(dest->version_major);
-  dest->version_minor = avb_be32toh(dest->version_minor);
-
-  dest->original_image_size = avb_be64toh(dest->original_image_size);
-  dest->vbmeta_offset = avb_be64toh(dest->vbmeta_offset);
-  dest->vbmeta_size = avb_be64toh(dest->vbmeta_size);
-
-  /* Check that magic is correct. */
-  if (avb_safe_memcmp(dest->magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) !=
-      0) {
-    avb_error("Footer magic is incorrect.\n");
-    return false;
-  }
-
-  /* Ensure we don't attempt to access any fields if the footer major
-   * version is not supported.
-   */
-  if (dest->version_major > AVB_FOOTER_VERSION_MAJOR) {
-    avb_error("No support for footer version.\n");
-    return false;
-  }
-
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_util.h>
+
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest) {
+  avb_memcpy(dest, src, sizeof(AvbFooter));
+
+  dest->version_major = avb_be32toh(dest->version_major);
+  dest->version_minor = avb_be32toh(dest->version_minor);
+
+  dest->original_image_size = avb_be64toh(dest->original_image_size);
+  dest->vbmeta_offset = avb_be64toh(dest->vbmeta_offset);
+  dest->vbmeta_size = avb_be64toh(dest->vbmeta_size);
+
+  /* Check that magic is correct. */
+  if (avb_safe_memcmp(dest->magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) !=
+      0) {
+    avb_error("Footer magic is incorrect.\n");
+    return false;
+  }
+
+  /* Ensure we don't attempt to access any fields if the footer major
+   * version is not supported.
+   */
+  if (dest->version_major > AVB_FOOTER_VERSION_MAJOR) {
+    avb_error("No support for footer version.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hash_descriptor.c b/lib/avb/libavb/avb_hash_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_hash_descriptor.c
rename to lib/avb/libavb/avb_hash_descriptor.c
index 5444ca2d6a..294f3d648e 100644
--- a/lib/avb/rk_libavb/avb_hash_descriptor.c
+++ b/lib/avb/libavb/avb_hash_descriptor.c
@@ -1,61 +1,61 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_hash_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
-                                               AvbHashDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbHashDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASH) {
-    avb_error("Invalid tag for hash descriptor.\n");
-    return false;
-  }
-
-  dest->image_size = avb_be64toh(dest->image_size);
-  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
-  dest->salt_len = avb_be32toh(dest->salt_len);
-  dest->digest_len = avb_be32toh(dest->digest_len);
-
-  /* Check that partition_name, salt, and digest are fully contained. */
-  expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
-      !avb_safe_add_to(&expected_size, dest->salt_len) ||
-      !avb_safe_add_to(&expected_size, dest->digest_len)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASH) {
+    avb_error("Invalid tag for hash descriptor.\n");
+    return false;
+  }
+
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->digest_len = avb_be32toh(dest->digest_len);
+
+  /* Check that partition_name, salt, and digest are fully contained. */
+  expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hashtree_descriptor.c b/lib/avb/libavb/avb_hashtree_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_hashtree_descriptor.c
rename to lib/avb/libavb/avb_hashtree_descriptor.c
index 2b4b03da52..0e95e8762d 100644
--- a/lib/avb/rk_libavb/avb_hashtree_descriptor.c
+++ b/lib/avb/libavb/avb_hashtree_descriptor.c
@@ -1,69 +1,69 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_hashtree_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_hashtree_descriptor_validate_and_byteswap(
-    const AvbHashtreeDescriptor* src, AvbHashtreeDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbHashtreeDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASHTREE) {
-    avb_error("Invalid tag for hashtree descriptor.\n");
-    return false;
-  }
-
-  dest->dm_verity_version = avb_be32toh(dest->dm_verity_version);
-  dest->image_size = avb_be64toh(dest->image_size);
-  dest->tree_offset = avb_be64toh(dest->tree_offset);
-  dest->tree_size = avb_be64toh(dest->tree_size);
-  dest->data_block_size = avb_be32toh(dest->data_block_size);
-  dest->hash_block_size = avb_be32toh(dest->hash_block_size);
-  dest->fec_num_roots = avb_be32toh(dest->fec_num_roots);
-  dest->fec_offset = avb_be64toh(dest->fec_offset);
-  dest->fec_size = avb_be64toh(dest->fec_size);
-  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
-  dest->salt_len = avb_be32toh(dest->salt_len);
-  dest->root_digest_len = avb_be32toh(dest->root_digest_len);
-
-  /* Check that partition_name, salt, and root_digest are fully contained. */
-  expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
-      !avb_safe_add_to(&expected_size, dest->salt_len) ||
-      !avb_safe_add_to(&expected_size, dest->root_digest_len)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src, AvbHashtreeDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashtreeDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASHTREE) {
+    avb_error("Invalid tag for hashtree descriptor.\n");
+    return false;
+  }
+
+  dest->dm_verity_version = avb_be32toh(dest->dm_verity_version);
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->tree_offset = avb_be64toh(dest->tree_offset);
+  dest->tree_size = avb_be64toh(dest->tree_size);
+  dest->data_block_size = avb_be32toh(dest->data_block_size);
+  dest->hash_block_size = avb_be32toh(dest->hash_block_size);
+  dest->fec_num_roots = avb_be32toh(dest->fec_num_roots);
+  dest->fec_offset = avb_be64toh(dest->fec_offset);
+  dest->fec_size = avb_be64toh(dest->fec_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->root_digest_len = avb_be32toh(dest->root_digest_len);
+
+  /* Check that partition_name, salt, and root_digest are fully contained. */
+  expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->root_digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c b/lib/avb/libavb/avb_kernel_cmdline_descriptor.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
rename to lib/avb/libavb/avb_kernel_cmdline_descriptor.c
index b33e19d997..9f3187c439 100644
--- a/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
+++ b/lib/avb/libavb/avb_kernel_cmdline_descriptor.c
@@ -1,58 +1,58 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_kernel_cmdline_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
-    const AvbKernelCmdlineDescriptor* src, AvbKernelCmdlineDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbKernelCmdlineDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE) {
-    avb_error("Invalid tag for kernel cmdline descriptor.\n");
-    return false;
-  }
-
-  dest->flags = avb_be32toh(dest->flags);
-  dest->kernel_cmdline_length = avb_be32toh(dest->kernel_cmdline_length);
-
-  /* Check that kernel_cmdline is fully contained. */
-  expected_size = sizeof(AvbKernelCmdlineDescriptor) - sizeof(AvbDescriptor);
-  if (!avb_safe_add_to(&expected_size, dest->kernel_cmdline_length)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-
-  return true;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src, AvbKernelCmdlineDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbKernelCmdlineDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE) {
+    avb_error("Invalid tag for kernel cmdline descriptor.\n");
+    return false;
+  }
+
+  dest->flags = avb_be32toh(dest->flags);
+  dest->kernel_cmdline_length = avb_be32toh(dest->kernel_cmdline_length);
+
+  /* Check that kernel_cmdline is fully contained. */
+  expected_size = sizeof(AvbKernelCmdlineDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->kernel_cmdline_length)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_property_descriptor.c b/lib/avb/libavb/avb_property_descriptor.c
similarity index 96%
rename from lib/avb/rk_libavb/avb_property_descriptor.c
rename to lib/avb/libavb/avb_property_descriptor.c
index f567fd7033..e039433334 100644
--- a/lib/avb/rk_libavb/avb_property_descriptor.c
+++ b/lib/avb/libavb/avb_property_descriptor.c
@@ -1,185 +1,185 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_property_descriptor.h>
-#include <android_avb/avb_util.h>
-
-bool avb_property_descriptor_validate_and_byteswap(
-    const AvbPropertyDescriptor* src, AvbPropertyDescriptor* dest) {
-  uint64_t expected_size;
-
-  avb_memcpy(dest, src, sizeof(AvbPropertyDescriptor));
-
-  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
-                                            (AvbDescriptor*)dest))
-    return false;
-
-  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
-    avb_error("Invalid tag for property descriptor.\n");
-    return false;
-  }
-
-  dest->key_num_bytes = avb_be64toh(dest->key_num_bytes);
-  dest->value_num_bytes = avb_be64toh(dest->value_num_bytes);
-
-  /* Check that key and value are fully contained. */
-  expected_size = sizeof(AvbPropertyDescriptor) - sizeof(AvbDescriptor) + 2;
-  if (!avb_safe_add_to(&expected_size, dest->key_num_bytes) ||
-      !avb_safe_add_to(&expected_size, dest->value_num_bytes)) {
-    avb_error("Overflow while adding up sizes.\n");
-    return false;
-  }
-  if (expected_size > dest->parent_descriptor.num_bytes_following) {
-    avb_error("Descriptor payload size overflow.\n");
-    return false;
-  }
-
-  return true;
-}
-
-typedef struct {
-  const char* key;
-  size_t key_size;
-  const char* ret_value;
-  size_t ret_value_size;
-} PropertyIteratorData;
-
-static bool property_lookup_desc_foreach(const AvbDescriptor* header,
-                                         void* user_data) {
-  PropertyIteratorData* data = (PropertyIteratorData*)user_data;
-  AvbPropertyDescriptor prop_desc;
-  const uint8_t* p;
-  bool ret = true;
-
-  if (header->tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
-    goto out;
-  }
-
-  if (!avb_property_descriptor_validate_and_byteswap(
-          (const AvbPropertyDescriptor*)header, &prop_desc)) {
-    goto out;
-  }
-
-  p = (const uint8_t*)header;
-  if (p[sizeof(AvbPropertyDescriptor) + prop_desc.key_num_bytes] != 0) {
-    avb_error("No terminating NUL byte in key.\n");
-    goto out;
-  }
-
-  if (data->key_size == prop_desc.key_num_bytes) {
-    if (avb_memcmp(p + sizeof(AvbPropertyDescriptor),
-                   data->key,
-                   data->key_size) == 0) {
-      data->ret_value = (const char*)(p + sizeof(AvbPropertyDescriptor) +
-                                      prop_desc.key_num_bytes + 1);
-      data->ret_value_size = prop_desc.value_num_bytes;
-      /* Stop iterating. */
-      ret = false;
-      goto out;
-    }
-  }
-
-out:
-  return ret;
-}
-
-const char* avb_property_lookup(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                size_t* out_value_size) {
-  PropertyIteratorData data;
-
-  if (key_size == 0) {
-    key_size = avb_strlen(key);
-  }
-
-  data.key = key;
-  data.key_size = key_size;
-
-  if (avb_descriptor_foreach(
-          image_data, image_size, property_lookup_desc_foreach, &data) == 0) {
-    if (out_value_size != NULL) {
-      *out_value_size = data.ret_value_size;
-    }
-    return data.ret_value;
-  }
-
-  if (out_value_size != NULL) {
-    *out_value_size = 0;
-  }
-  return NULL;
-}
-
-bool avb_property_lookup_uint64(const uint8_t* image_data,
-                                size_t image_size,
-                                const char* key,
-                                size_t key_size,
-                                uint64_t* out_value) {
-  const char* value;
-  bool ret = false;
-  uint64_t parsed_val;
-  int base;
-  int n;
-
-  value = avb_property_lookup(image_data, image_size, key, key_size, NULL);
-  if (value == NULL) {
-    goto out;
-  }
-
-  base = 10;
-  if (avb_memcmp(value, "0x", 2) == 0) {
-    base = 16;
-    value += 2;
-  }
-
-  parsed_val = 0;
-  for (n = 0; value[n] != '\0'; n++) {
-    int c = value[n];
-    int digit;
-
-    parsed_val *= base;
-
-    if (c >= '0' && c <= '9') {
-      digit = c - '0';
-    } else if (base == 16 && c >= 'a' && c <= 'f') {
-      digit = c - 'a' + 10;
-    } else if (base == 16 && c >= 'A' && c <= 'F') {
-      digit = c - 'A' + 10;
-    } else {
-      avb_error("Invalid digit.\n");
-      goto out;
-    }
-
-    parsed_val += digit;
-  }
-
-  ret = true;
-  if (out_value != NULL) {
-    *out_value = parsed_val;
-  }
-
-out:
-  return ret;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src, AvbPropertyDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbPropertyDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    avb_error("Invalid tag for property descriptor.\n");
+    return false;
+  }
+
+  dest->key_num_bytes = avb_be64toh(dest->key_num_bytes);
+  dest->value_num_bytes = avb_be64toh(dest->value_num_bytes);
+
+  /* Check that key and value are fully contained. */
+  expected_size = sizeof(AvbPropertyDescriptor) - sizeof(AvbDescriptor) + 2;
+  if (!avb_safe_add_to(&expected_size, dest->key_num_bytes) ||
+      !avb_safe_add_to(&expected_size, dest->value_num_bytes)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
+
+typedef struct {
+  const char* key;
+  size_t key_size;
+  const char* ret_value;
+  size_t ret_value_size;
+} PropertyIteratorData;
+
+static bool property_lookup_desc_foreach(const AvbDescriptor* header,
+                                         void* user_data) {
+  PropertyIteratorData* data = (PropertyIteratorData*)user_data;
+  AvbPropertyDescriptor prop_desc;
+  const uint8_t* p;
+  bool ret = true;
+
+  if (header->tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    goto out;
+  }
+
+  if (!avb_property_descriptor_validate_and_byteswap(
+          (const AvbPropertyDescriptor*)header, &prop_desc)) {
+    goto out;
+  }
+
+  p = (const uint8_t*)header;
+  if (p[sizeof(AvbPropertyDescriptor) + prop_desc.key_num_bytes] != 0) {
+    avb_error("No terminating NUL byte in key.\n");
+    goto out;
+  }
+
+  if (data->key_size == prop_desc.key_num_bytes) {
+    if (avb_memcmp(p + sizeof(AvbPropertyDescriptor),
+                   data->key,
+                   data->key_size) == 0) {
+      data->ret_value = (const char*)(p + sizeof(AvbPropertyDescriptor) +
+                                      prop_desc.key_num_bytes + 1);
+      data->ret_value_size = prop_desc.value_num_bytes;
+      /* Stop iterating. */
+      ret = false;
+      goto out;
+    }
+  }
+
+out:
+  return ret;
+}
+
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size) {
+  PropertyIteratorData data;
+
+  if (key_size == 0) {
+    key_size = avb_strlen(key);
+  }
+
+  data.key = key;
+  data.key_size = key_size;
+
+  if (avb_descriptor_foreach(
+          image_data, image_size, property_lookup_desc_foreach, &data) == 0) {
+    if (out_value_size != NULL) {
+      *out_value_size = data.ret_value_size;
+    }
+    return data.ret_value;
+  }
+
+  if (out_value_size != NULL) {
+    *out_value_size = 0;
+  }
+  return NULL;
+}
+
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value) {
+  const char* value;
+  bool ret = false;
+  uint64_t parsed_val;
+  int base;
+  int n;
+
+  value = avb_property_lookup(image_data, image_size, key, key_size, NULL);
+  if (value == NULL) {
+    goto out;
+  }
+
+  base = 10;
+  if (avb_memcmp(value, "0x", 2) == 0) {
+    base = 16;
+    value += 2;
+  }
+
+  parsed_val = 0;
+  for (n = 0; value[n] != '\0'; n++) {
+    int c = value[n];
+    int digit;
+
+    parsed_val *= base;
+
+    if (c >= '0' && c <= '9') {
+      digit = c - '0';
+    } else if (base == 16 && c >= 'a' && c <= 'f') {
+      digit = c - 'a' + 10;
+    } else if (base == 16 && c >= 'A' && c <= 'F') {
+      digit = c - 'A' + 10;
+    } else {
+      avb_error("Invalid digit.\n");
+      goto out;
+    }
+
+    parsed_val += digit;
+  }
+
+  ret = true;
+  if (out_value != NULL) {
+    *out_value = parsed_val;
+  }
+
+out:
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_rsa.c b/lib/avb/libavb/avb_rsa.c
similarity index 88%
rename from lib/avb/rk_libavb/avb_rsa.c
rename to lib/avb/libavb/avb_rsa.c
index e2f62f113d..c018e2be39 100644
--- a/lib/avb/rk_libavb/avb_rsa.c
+++ b/lib/avb/libavb/avb_rsa.c
@@ -1,299 +1,299 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Implementation of RSA signature verification which uses a pre-processed
- * key for computation. The code extends libmincrypt RSA verification code to
- * support multiple RSA key lengths and hash digest algorithms.
- */
-
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-
-typedef struct Key {
-  unsigned int len; /* Length of n[] in number of uint32_t */
-  uint32_t n0inv;   /* -1 / n[0] mod 2^32 */
-  uint32_t* n;      /* modulus as array (host-byte order) */
-  uint32_t* rr;     /* R^2 as array (host-byte order) */
-} Key;
-
-Key* parse_key_data(const uint8_t* data, size_t length) {
-  AvbRSAPublicKeyHeader h;
-  Key* key = NULL;
-  size_t expected_length;
-  unsigned int i;
-  const uint8_t* n;
-  const uint8_t* rr;
-
-  if (!avb_rsa_public_key_header_validate_and_byteswap(
-          (const AvbRSAPublicKeyHeader*)data, &h)) {
-    avb_error("Invalid key.\n");
-    goto fail;
-  }
-
-  if (!(h.key_num_bits == 2048 || h.key_num_bits == 4096 ||
-        h.key_num_bits == 8192)) {
-    avb_error("Unexpected key length.\n");
-    goto fail;
-  }
-
-  expected_length = sizeof(AvbRSAPublicKeyHeader) + 2 * h.key_num_bits / 8;
-  if (length != expected_length) {
-    avb_error("Key does not match expected length.\n");
-    goto fail;
-  }
-
-  n = data + sizeof(AvbRSAPublicKeyHeader);
-  rr = data + sizeof(AvbRSAPublicKeyHeader) + h.key_num_bits / 8;
-
-  /* Store n and rr following the key header so we only have to do one
-   * allocation.
-   */
-  key = (Key*)(avb_malloc(sizeof(Key) + 2 * h.key_num_bits / 8));
-  if (key == NULL) {
-    goto fail;
-  }
-
-  key->len = h.key_num_bits / 32;
-  key->n0inv = h.n0inv;
-  key->n = (uint32_t*)(key + 1); /* Skip ahead sizeof(Key) bytes. */
-  key->rr = key->n + key->len;
-
-  /* Crypto-code below (modpowF4() and friends) expects the key in
-   * little-endian format (rather than the format we're storing the
-   * key in), so convert it.
-   */
-  for (i = 0; i < key->len; i++) {
-    key->n[i] = avb_be32toh(((uint32_t*)n)[key->len - i - 1]);
-    key->rr[i] = avb_be32toh(((uint32_t*)rr)[key->len - i - 1]);
-  }
-  return key;
-
-fail:
-  if (key != NULL) {
-    avb_free(key);
-  }
-  return NULL;
-}
-
-void free_parsed_key(Key* key) {
-  avb_free(key);
-}
-
-/* a[] -= mod */
-static void subM(const Key* key, uint32_t* a) {
-  int64_t A = 0;
-  uint32_t i;
-  for (i = 0; i < key->len; ++i) {
-    A += (uint64_t)a[i] - key->n[i];
-    a[i] = (uint32_t)A;
-    A >>= 32;
-  }
-}
-
-/* return a[] >= mod */
-static int geM(const Key* key, uint32_t* a) {
-  uint32_t i;
-  for (i = key->len; i;) {
-    --i;
-    if (a[i] < key->n[i]) {
-      return 0;
-    }
-    if (a[i] > key->n[i]) {
-      return 1;
-    }
-  }
-  return 1; /* equal */
-}
-
-/* montgomery c[] += a * b[] / R % mod */
-static void montMulAdd(const Key* key,
-                       uint32_t* c,
-                       const uint32_t a,
-                       const uint32_t* b) {
-  uint64_t A = (uint64_t)a * b[0] + c[0];
-  uint32_t d0 = (uint32_t)A * key->n0inv;
-  uint64_t B = (uint64_t)d0 * key->n[0] + (uint32_t)A;
-  uint32_t i;
-
-  for (i = 1; i < key->len; ++i) {
-    A = (A >> 32) + (uint64_t)a * b[i] + c[i];
-    B = (B >> 32) + (uint64_t)d0 * key->n[i] + (uint32_t)A;
-    c[i - 1] = (uint32_t)B;
-  }
-
-  A = (A >> 32) + (B >> 32);
-
-  c[i - 1] = (uint32_t)A;
-
-  if (A >> 32) {
-    subM(key, c);
-  }
-}
-
-/* montgomery c[] = a[] * b[] / R % mod */
-static void montMul(const Key* key, uint32_t* c, uint32_t* a, uint32_t* b) {
-  uint32_t i;
-  for (i = 0; i < key->len; ++i) {
-    c[i] = 0;
-  }
-  for (i = 0; i < key->len; ++i) {
-    montMulAdd(key, c, a[i], b);
-  }
-}
-
-/* In-place public exponentiation. (65537}
- * Input and output big-endian byte array in inout.
- */
-static void modpowF4(const Key* key, uint8_t* inout) {
-  uint32_t* a = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
-  uint32_t* aR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
-  uint32_t* aaR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
-  if (a == NULL || aR == NULL || aaR == NULL) {
-    goto out;
-  }
-
-  uint32_t* aaa = aaR; /* Re-use location. */
-  int i;
-
-  /* Convert from big endian byte array to little endian word array. */
-  for (i = 0; i < (int)key->len; ++i) {
-    uint32_t tmp = (inout[((key->len - 1 - i) * 4) + 0] << 24) |
-                   (inout[((key->len - 1 - i) * 4) + 1] << 16) |
-                   (inout[((key->len - 1 - i) * 4) + 2] << 8) |
-                   (inout[((key->len - 1 - i) * 4) + 3] << 0);
-    a[i] = tmp;
-  }
-
-  montMul(key, aR, a, key->rr); /* aR = a * RR / R mod M   */
-  for (i = 0; i < 16; i += 2) {
-    montMul(key, aaR, aR, aR);  /* aaR = aR * aR / R mod M */
-    montMul(key, aR, aaR, aaR); /* aR = aaR * aaR / R mod M */
-  }
-  montMul(key, aaa, aR, a); /* aaa = aR * a / R mod M */
-
-  /* Make sure aaa < mod; aaa is at most 1x mod too large. */
-  if (geM(key, aaa)) {
-    subM(key, aaa);
-  }
-
-  /* Convert to bigendian byte array */
-  for (i = (int)key->len - 1; i >= 0; --i) {
-    uint32_t tmp = aaa[i];
-    *inout++ = (uint8_t)(tmp >> 24);
-    *inout++ = (uint8_t)(tmp >> 16);
-    *inout++ = (uint8_t)(tmp >> 8);
-    *inout++ = (uint8_t)(tmp >> 0);
-  }
-
-out:
-  if (a != NULL) {
-    avb_free(a);
-  }
-  if (aR != NULL) {
-    avb_free(aR);
-  }
-  if (aaR != NULL) {
-    avb_free(aaR);
-  }
-}
-
-/* Verify a RSA PKCS1.5 signature against an expected hash.
- * Returns false on failure, true on success.
- */
-bool avb_rsa_verify(const uint8_t* key,
-                    size_t key_num_bytes,
-                    const uint8_t* sig,
-                    size_t sig_num_bytes,
-                    const uint8_t* hash,
-                    size_t hash_num_bytes,
-                    const uint8_t* padding,
-                    size_t padding_num_bytes) {
-  uint8_t* buf = NULL;
-  Key* parsed_key = NULL;
-  bool success = false;
-
-  if (key == NULL || sig == NULL || hash == NULL || padding == NULL) {
-    avb_error("Invalid input.\n");
-    goto out;
-  }
-
-  parsed_key = parse_key_data(key, key_num_bytes);
-  if (parsed_key == NULL) {
-    avb_error("Error parsing key.\n");
-    goto out;
-  }
-
-  if (sig_num_bytes != (parsed_key->len * sizeof(uint32_t))) {
-    avb_error("Signature length does not match key length.\n");
-    goto out;
-  }
-
-  if (padding_num_bytes != sig_num_bytes - hash_num_bytes) {
-    avb_error("Padding length does not match hash and signature lengths.\n");
-    goto out;
-  }
-
-  buf = (uint8_t*)avb_malloc(sig_num_bytes);
-  if (buf == NULL) {
-    avb_error("Error allocating memory.\n");
-    goto out;
-  }
-  avb_memcpy(buf, sig, sig_num_bytes);
-
-  modpowF4(parsed_key, buf);
-
-  /* Check padding bytes.
-   *
-   * Even though there are probably no timing issues here, we use
-   * avb_safe_memcmp() just to be on the safe side.
-   */
-  if (avb_safe_memcmp(buf, padding, padding_num_bytes)) {
-    avb_error("Padding check failed.\n");
-    goto out;
-  }
-
-  /* Check hash. */
-  if (avb_safe_memcmp(buf + padding_num_bytes, hash, hash_num_bytes)) {
-    avb_error("Hash check failed.\n");
-    goto out;
-  }
-
-  success = true;
-
-out:
-  if (parsed_key != NULL) {
-    free_parsed_key(parsed_key);
-  }
-  if (buf != NULL) {
-    avb_free(buf);
-  }
-  return success;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Implementation of RSA signature verification which uses a pre-processed
+ * key for computation. The code extends libmincrypt RSA verification code to
+ * support multiple RSA key lengths and hash digest algorithms.
+ */
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+typedef struct IAvbKey {
+  unsigned int len; /* Length of n[] in number of uint32_t */
+  uint32_t n0inv;   /* -1 / n[0] mod 2^32 */
+  uint32_t* n;      /* modulus as array (host-byte order) */
+  uint32_t* rr;     /* R^2 as array (host-byte order) */
+} IAvbKey;
+
+static IAvbKey* iavb_parse_key_data(const uint8_t* data, size_t length) {
+  AvbRSAPublicKeyHeader h;
+  IAvbKey* key = NULL;
+  size_t expected_length;
+  unsigned int i;
+  const uint8_t* n;
+  const uint8_t* rr;
+
+  if (!avb_rsa_public_key_header_validate_and_byteswap(
+          (const AvbRSAPublicKeyHeader*)data, &h)) {
+    avb_error("Invalid key.\n");
+    goto fail;
+  }
+
+  if (!(h.key_num_bits == 2048 || h.key_num_bits == 4096 ||
+        h.key_num_bits == 8192)) {
+    avb_error("Unexpected key length.\n");
+    goto fail;
+  }
+
+  expected_length = sizeof(AvbRSAPublicKeyHeader) + 2 * h.key_num_bits / 8;
+  if (length != expected_length) {
+    avb_error("Key does not match expected length.\n");
+    goto fail;
+  }
+
+  n = data + sizeof(AvbRSAPublicKeyHeader);
+  rr = data + sizeof(AvbRSAPublicKeyHeader) + h.key_num_bits / 8;
+
+  /* Store n and rr following the key header so we only have to do one
+   * allocation.
+   */
+  key = (IAvbKey*)(avb_malloc(sizeof(IAvbKey) + 2 * h.key_num_bits / 8));
+  if (key == NULL) {
+    goto fail;
+  }
+
+  key->len = h.key_num_bits / 32;
+  key->n0inv = h.n0inv;
+  key->n = (uint32_t*)(key + 1); /* Skip ahead sizeof(IAvbKey) bytes. */
+  key->rr = key->n + key->len;
+
+  /* Crypto-code below (modpowF4() and friends) expects the key in
+   * little-endian format (rather than the format we're storing the
+   * key in), so convert it.
+   */
+  for (i = 0; i < key->len; i++) {
+    key->n[i] = avb_be32toh(((uint32_t*)n)[key->len - i - 1]);
+    key->rr[i] = avb_be32toh(((uint32_t*)rr)[key->len - i - 1]);
+  }
+  return key;
+
+fail:
+  if (key != NULL) {
+    avb_free(key);
+  }
+  return NULL;
+}
+
+static void iavb_free_parsed_key(IAvbKey* key) {
+  avb_free(key);
+}
+
+/* a[] -= mod */
+static void subM(const IAvbKey* key, uint32_t* a) {
+  int64_t A = 0;
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    A += (uint64_t)a[i] - key->n[i];
+    a[i] = (uint32_t)A;
+    A >>= 32;
+  }
+}
+
+/* return a[] >= mod */
+static int geM(const IAvbKey* key, uint32_t* a) {
+  uint32_t i;
+  for (i = key->len; i;) {
+    --i;
+    if (a[i] < key->n[i]) {
+      return 0;
+    }
+    if (a[i] > key->n[i]) {
+      return 1;
+    }
+  }
+  return 1; /* equal */
+}
+
+/* montgomery c[] += a * b[] / R % mod */
+static void montMulAdd(const IAvbKey* key,
+                       uint32_t* c,
+                       const uint32_t a,
+                       const uint32_t* b) {
+  uint64_t A = (uint64_t)a * b[0] + c[0];
+  uint32_t d0 = (uint32_t)A * key->n0inv;
+  uint64_t B = (uint64_t)d0 * key->n[0] + (uint32_t)A;
+  uint32_t i;
+
+  for (i = 1; i < key->len; ++i) {
+    A = (A >> 32) + (uint64_t)a * b[i] + c[i];
+    B = (B >> 32) + (uint64_t)d0 * key->n[i] + (uint32_t)A;
+    c[i - 1] = (uint32_t)B;
+  }
+
+  A = (A >> 32) + (B >> 32);
+
+  c[i - 1] = (uint32_t)A;
+
+  if (A >> 32) {
+    subM(key, c);
+  }
+}
+
+/* montgomery c[] = a[] * b[] / R % mod */
+static void montMul(const IAvbKey* key, uint32_t* c, uint32_t* a, uint32_t* b) {
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    c[i] = 0;
+  }
+  for (i = 0; i < key->len; ++i) {
+    montMulAdd(key, c, a[i], b);
+  }
+}
+
+/* In-place public exponentiation. (65537}
+ * Input and output big-endian byte array in inout.
+ */
+static void modpowF4(const IAvbKey* key, uint8_t* inout) {
+  uint32_t* a = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aaR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  if (a == NULL || aR == NULL || aaR == NULL) {
+    goto out;
+  }
+
+  uint32_t* aaa = aaR; /* Re-use location. */
+  int i;
+
+  /* Convert from big endian byte array to little endian word array. */
+  for (i = 0; i < (int)key->len; ++i) {
+    uint32_t tmp = (inout[((key->len - 1 - i) * 4) + 0] << 24) |
+                   (inout[((key->len - 1 - i) * 4) + 1] << 16) |
+                   (inout[((key->len - 1 - i) * 4) + 2] << 8) |
+                   (inout[((key->len - 1 - i) * 4) + 3] << 0);
+    a[i] = tmp;
+  }
+
+  montMul(key, aR, a, key->rr); /* aR = a * RR / R mod M   */
+  for (i = 0; i < 16; i += 2) {
+    montMul(key, aaR, aR, aR);  /* aaR = aR * aR / R mod M */
+    montMul(key, aR, aaR, aaR); /* aR = aaR * aaR / R mod M */
+  }
+  montMul(key, aaa, aR, a); /* aaa = aR * a / R mod M */
+
+  /* Make sure aaa < mod; aaa is at most 1x mod too large. */
+  if (geM(key, aaa)) {
+    subM(key, aaa);
+  }
+
+  /* Convert to bigendian byte array */
+  for (i = (int)key->len - 1; i >= 0; --i) {
+    uint32_t tmp = aaa[i];
+    *inout++ = (uint8_t)(tmp >> 24);
+    *inout++ = (uint8_t)(tmp >> 16);
+    *inout++ = (uint8_t)(tmp >> 8);
+    *inout++ = (uint8_t)(tmp >> 0);
+  }
+
+out:
+  if (a != NULL) {
+    avb_free(a);
+  }
+  if (aR != NULL) {
+    avb_free(aR);
+  }
+  if (aaR != NULL) {
+    avb_free(aaR);
+  }
+}
+
+/* Verify a RSA PKCS1.5 signature against an expected hash.
+ * Returns false on failure, true on success.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) {
+  uint8_t* buf = NULL;
+  IAvbKey* parsed_key = NULL;
+  bool success = false;
+
+  if (key == NULL || sig == NULL || hash == NULL || padding == NULL) {
+    avb_error("Invalid input.\n");
+    goto out;
+  }
+
+  parsed_key = iavb_parse_key_data(key, key_num_bytes);
+  if (parsed_key == NULL) {
+    avb_error("Error parsing key.\n");
+    goto out;
+  }
+
+  if (sig_num_bytes != (parsed_key->len * sizeof(uint32_t))) {
+    avb_error("Signature length does not match key length.\n");
+    goto out;
+  }
+
+  if (padding_num_bytes != sig_num_bytes - hash_num_bytes) {
+    avb_error("Padding length does not match hash and signature lengths.\n");
+    goto out;
+  }
+
+  buf = (uint8_t*)avb_malloc(sig_num_bytes);
+  if (buf == NULL) {
+    avb_error("Error allocating memory.\n");
+    goto out;
+  }
+  avb_memcpy(buf, sig, sig_num_bytes);
+
+  modpowF4(parsed_key, buf);
+
+  /* Check padding bytes.
+   *
+   * Even though there are probably no timing issues here, we use
+   * avb_safe_memcmp() just to be on the safe side.
+   */
+  if (avb_safe_memcmp(buf, padding, padding_num_bytes)) {
+    avb_error("Padding check failed.\n");
+    goto out;
+  }
+
+  /* Check hash. */
+  if (avb_safe_memcmp(buf + padding_num_bytes, hash, hash_num_bytes)) {
+    avb_error("Hash check failed.\n");
+    goto out;
+  }
+
+  success = true;
+
+out:
+  if (parsed_key != NULL) {
+    iavb_free_parsed_key(parsed_key);
+  }
+  if (buf != NULL) {
+    avb_free(buf);
+  }
+  return success;
+}
diff --git a/lib/avb/rk_libavb/avb_sha256.c b/lib/avb/libavb/avb_sha256.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_sha256.c
rename to lib/avb/libavb/avb_sha256.c
index b6d30c112e..b567643f9b 100644
--- a/lib/avb/rk_libavb/avb_sha256.c
+++ b/lib/avb/libavb/avb_sha256.c
@@ -1,390 +1,390 @@
-/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
- * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
- */
-
-/*
- * FIPS 180-2 SHA-224/256/384/512 implementation
- * Last update: 02/02/2007
- * Issue date:  04/30/2005
- *
- * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the project nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <android_avb/avb_sha.h>
-
-#define SHFR(x, n) (x >> n)
-#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
-#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
-#define CH(x, y, z) ((x & y) ^ (~x & z))
-#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
-
-#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
-#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
-#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
-#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
-
-#define UNPACK32(x, str)                 \
-  {                                      \
-    *((str) + 3) = (uint8_t)((x));       \
-    *((str) + 2) = (uint8_t)((x) >> 8);  \
-    *((str) + 1) = (uint8_t)((x) >> 16); \
-    *((str) + 0) = (uint8_t)((x) >> 24); \
-  }
-
-#define PACK32(str, x)                                                    \
-  {                                                                       \
-    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
-           ((uint32_t) * ((str) + 1) << 16) |                             \
-           ((uint32_t) * ((str) + 0) << 24);                              \
-  }
-
-/* Macros used for loops unrolling */
-
-#define SHA256_SCR(i) \
-  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
-
-#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
-  {                                                                         \
-    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
-         w[j];                                                              \
-    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
-    wv[d] += t1;                                                            \
-    wv[h] = t1 + t2;                                                        \
-  }
-
-static const uint32_t sha256_h0[8] = {0x6a09e667,
-                                      0xbb67ae85,
-                                      0x3c6ef372,
-                                      0xa54ff53a,
-                                      0x510e527f,
-                                      0x9b05688c,
-                                      0x1f83d9ab,
-                                      0x5be0cd19};
-
-static const uint32_t sha256_k[64] = {
-    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
-    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
-    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
-    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
-    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
-    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
-    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
-    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
-    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
-    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
-    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
-
-/* SHA-256 implementation */
-void avb_sha256_init(AvbSHA256Ctx* ctx) {
-#ifndef UNROLL_LOOPS
-  int i;
-  for (i = 0; i < 8; i++) {
-    ctx->h[i] = sha256_h0[i];
-  }
-#else
-  ctx->h[0] = sha256_h0[0];
-  ctx->h[1] = sha256_h0[1];
-  ctx->h[2] = sha256_h0[2];
-  ctx->h[3] = sha256_h0[3];
-  ctx->h[4] = sha256_h0[4];
-  ctx->h[5] = sha256_h0[5];
-  ctx->h[6] = sha256_h0[6];
-  ctx->h[7] = sha256_h0[7];
-#endif /* !UNROLL_LOOPS */
-
-  ctx->len = 0;
-  ctx->tot_len = 0;
-}
-
-static void SHA256_transform(AvbSHA256Ctx* ctx,
-                             const uint8_t* message,
-                             unsigned int block_nb) {
-  uint32_t w[64];
-  uint32_t wv[8];
-  uint32_t t1, t2;
-  const unsigned char* sub_block;
-  int i;
-
-#ifndef UNROLL_LOOPS
-  int j;
-#endif
-
-  for (i = 0; i < (int)block_nb; i++) {
-    sub_block = message + (i << 6);
-
-#ifndef UNROLL_LOOPS
-    for (j = 0; j < 16; j++) {
-      PACK32(&sub_block[j << 2], &w[j]);
-    }
-
-    for (j = 16; j < 64; j++) {
-      SHA256_SCR(j);
-    }
-
-    for (j = 0; j < 8; j++) {
-      wv[j] = ctx->h[j];
-    }
-
-    for (j = 0; j < 64; j++) {
-      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
-           w[j];
-      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
-      wv[7] = wv[6];
-      wv[6] = wv[5];
-      wv[5] = wv[4];
-      wv[4] = wv[3] + t1;
-      wv[3] = wv[2];
-      wv[2] = wv[1];
-      wv[1] = wv[0];
-      wv[0] = t1 + t2;
-    }
-
-    for (j = 0; j < 8; j++) {
-      ctx->h[j] += wv[j];
-    }
-#else
-    PACK32(&sub_block[0], &w[0]);
-    PACK32(&sub_block[4], &w[1]);
-    PACK32(&sub_block[8], &w[2]);
-    PACK32(&sub_block[12], &w[3]);
-    PACK32(&sub_block[16], &w[4]);
-    PACK32(&sub_block[20], &w[5]);
-    PACK32(&sub_block[24], &w[6]);
-    PACK32(&sub_block[28], &w[7]);
-    PACK32(&sub_block[32], &w[8]);
-    PACK32(&sub_block[36], &w[9]);
-    PACK32(&sub_block[40], &w[10]);
-    PACK32(&sub_block[44], &w[11]);
-    PACK32(&sub_block[48], &w[12]);
-    PACK32(&sub_block[52], &w[13]);
-    PACK32(&sub_block[56], &w[14]);
-    PACK32(&sub_block[60], &w[15]);
-
-    SHA256_SCR(16);
-    SHA256_SCR(17);
-    SHA256_SCR(18);
-    SHA256_SCR(19);
-    SHA256_SCR(20);
-    SHA256_SCR(21);
-    SHA256_SCR(22);
-    SHA256_SCR(23);
-    SHA256_SCR(24);
-    SHA256_SCR(25);
-    SHA256_SCR(26);
-    SHA256_SCR(27);
-    SHA256_SCR(28);
-    SHA256_SCR(29);
-    SHA256_SCR(30);
-    SHA256_SCR(31);
-    SHA256_SCR(32);
-    SHA256_SCR(33);
-    SHA256_SCR(34);
-    SHA256_SCR(35);
-    SHA256_SCR(36);
-    SHA256_SCR(37);
-    SHA256_SCR(38);
-    SHA256_SCR(39);
-    SHA256_SCR(40);
-    SHA256_SCR(41);
-    SHA256_SCR(42);
-    SHA256_SCR(43);
-    SHA256_SCR(44);
-    SHA256_SCR(45);
-    SHA256_SCR(46);
-    SHA256_SCR(47);
-    SHA256_SCR(48);
-    SHA256_SCR(49);
-    SHA256_SCR(50);
-    SHA256_SCR(51);
-    SHA256_SCR(52);
-    SHA256_SCR(53);
-    SHA256_SCR(54);
-    SHA256_SCR(55);
-    SHA256_SCR(56);
-    SHA256_SCR(57);
-    SHA256_SCR(58);
-    SHA256_SCR(59);
-    SHA256_SCR(60);
-    SHA256_SCR(61);
-    SHA256_SCR(62);
-    SHA256_SCR(63);
-
-    wv[0] = ctx->h[0];
-    wv[1] = ctx->h[1];
-    wv[2] = ctx->h[2];
-    wv[3] = ctx->h[3];
-    wv[4] = ctx->h[4];
-    wv[5] = ctx->h[5];
-    wv[6] = ctx->h[6];
-    wv[7] = ctx->h[7];
-
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
-    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
-    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
-    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
-    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
-    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
-    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
-    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
-    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
-
-    ctx->h[0] += wv[0];
-    ctx->h[1] += wv[1];
-    ctx->h[2] += wv[2];
-    ctx->h[3] += wv[3];
-    ctx->h[4] += wv[4];
-    ctx->h[5] += wv[5];
-    ctx->h[6] += wv[6];
-    ctx->h[7] += wv[7];
-#endif /* !UNROLL_LOOPS */
-  }
-}
-
-void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len) {
-  unsigned int block_nb;
-  unsigned int new_len, rem_len, tmp_len;
-  const uint8_t* shifted_data;
-
-  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
-  rem_len = len < tmp_len ? len : tmp_len;
-
-  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
-
-  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
-    ctx->len += len;
-    return;
-  }
-
-  new_len = len - rem_len;
-  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
-
-  shifted_data = data + rem_len;
-
-  SHA256_transform(ctx, ctx->block, 1);
-  SHA256_transform(ctx, shifted_data, block_nb);
-
-  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
-
-  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
-
-  ctx->len = rem_len;
-  ctx->tot_len += (block_nb + 1) << 6;
-}
-
-uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
-  unsigned int block_nb;
-  unsigned int pm_len;
-  unsigned int len_b;
-#ifndef UNROLL_LOOPS
-  int i;
-#endif
-
-  block_nb =
-      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
-
-  len_b = (ctx->tot_len + ctx->len) << 3;
-  pm_len = block_nb << 6;
-
-  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
-  ctx->block[ctx->len] = 0x80;
-  UNPACK32(len_b, ctx->block + pm_len - 4);
-
-  SHA256_transform(ctx, ctx->block, block_nb);
-
-#ifndef UNROLL_LOOPS
-  for (i = 0; i < 8; i++) {
-    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
-  }
-#else
-  UNPACK32(ctx->h[0], &ctx->buf[0]);
-  UNPACK32(ctx->h[1], &ctx->buf[4]);
-  UNPACK32(ctx->h[2], &ctx->buf[8]);
-  UNPACK32(ctx->h[3], &ctx->buf[12]);
-  UNPACK32(ctx->h[4], &ctx->buf[16]);
-  UNPACK32(ctx->h[5], &ctx->buf[20]);
-  UNPACK32(ctx->h[6], &ctx->buf[24]);
-  UNPACK32(ctx->h[7], &ctx->buf[28]);
-#endif /* !UNROLL_LOOPS */
-
-  return ctx->buf;
-}
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
+#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
+#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
+#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define PACK32(str, x)                                                    \
+  {                                                                       \
+    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
+           ((uint32_t) * ((str) + 1) << 16) |                             \
+           ((uint32_t) * ((str) + 0) << 24);                              \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA256_SCR(i) \
+  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
+         w[j];                                                              \
+    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint32_t sha256_h0[8] = {0x6a09e667,
+                                      0xbb67ae85,
+                                      0x3c6ef372,
+                                      0xa54ff53a,
+                                      0x510e527f,
+                                      0x9b05688c,
+                                      0x1f83d9ab,
+                                      0x5be0cd19};
+
+static const uint32_t sha256_k[64] = {
+    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
+    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
+    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
+    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
+    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
+    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
+
+/* SHA-256 implementation */
+void avb_sha256_init(AvbSHA256Ctx* ctx) {
+#ifndef UNROLL_LOOPS
+  int i;
+  for (i = 0; i < 8; i++) {
+    ctx->h[i] = sha256_h0[i];
+  }
+#else
+  ctx->h[0] = sha256_h0[0];
+  ctx->h[1] = sha256_h0[1];
+  ctx->h[2] = sha256_h0[2];
+  ctx->h[3] = sha256_h0[3];
+  ctx->h[4] = sha256_h0[4];
+  ctx->h[5] = sha256_h0[5];
+  ctx->h[6] = sha256_h0[6];
+  ctx->h[7] = sha256_h0[7];
+#endif /* !UNROLL_LOOPS */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA256_transform(AvbSHA256Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint32_t w[64];
+  uint32_t wv[8];
+  uint32_t t1, t2;
+  const unsigned char* sub_block;
+  int i;
+
+#ifndef UNROLL_LOOPS
+  int j;
+#endif
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 6);
+
+#ifndef UNROLL_LOOPS
+    for (j = 0; j < 16; j++) {
+      PACK32(&sub_block[j << 2], &w[j]);
+    }
+
+    for (j = 16; j < 64; j++) {
+      SHA256_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 64; j++) {
+      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
+           w[j];
+      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++) {
+      ctx->h[j] += wv[j];
+    }
+#else
+    PACK32(&sub_block[0], &w[0]);
+    PACK32(&sub_block[4], &w[1]);
+    PACK32(&sub_block[8], &w[2]);
+    PACK32(&sub_block[12], &w[3]);
+    PACK32(&sub_block[16], &w[4]);
+    PACK32(&sub_block[20], &w[5]);
+    PACK32(&sub_block[24], &w[6]);
+    PACK32(&sub_block[28], &w[7]);
+    PACK32(&sub_block[32], &w[8]);
+    PACK32(&sub_block[36], &w[9]);
+    PACK32(&sub_block[40], &w[10]);
+    PACK32(&sub_block[44], &w[11]);
+    PACK32(&sub_block[48], &w[12]);
+    PACK32(&sub_block[52], &w[13]);
+    PACK32(&sub_block[56], &w[14]);
+    PACK32(&sub_block[60], &w[15]);
+
+    SHA256_SCR(16);
+    SHA256_SCR(17);
+    SHA256_SCR(18);
+    SHA256_SCR(19);
+    SHA256_SCR(20);
+    SHA256_SCR(21);
+    SHA256_SCR(22);
+    SHA256_SCR(23);
+    SHA256_SCR(24);
+    SHA256_SCR(25);
+    SHA256_SCR(26);
+    SHA256_SCR(27);
+    SHA256_SCR(28);
+    SHA256_SCR(29);
+    SHA256_SCR(30);
+    SHA256_SCR(31);
+    SHA256_SCR(32);
+    SHA256_SCR(33);
+    SHA256_SCR(34);
+    SHA256_SCR(35);
+    SHA256_SCR(36);
+    SHA256_SCR(37);
+    SHA256_SCR(38);
+    SHA256_SCR(39);
+    SHA256_SCR(40);
+    SHA256_SCR(41);
+    SHA256_SCR(42);
+    SHA256_SCR(43);
+    SHA256_SCR(44);
+    SHA256_SCR(45);
+    SHA256_SCR(46);
+    SHA256_SCR(47);
+    SHA256_SCR(48);
+    SHA256_SCR(49);
+    SHA256_SCR(50);
+    SHA256_SCR(51);
+    SHA256_SCR(52);
+    SHA256_SCR(53);
+    SHA256_SCR(54);
+    SHA256_SCR(55);
+    SHA256_SCR(56);
+    SHA256_SCR(57);
+    SHA256_SCR(58);
+    SHA256_SCR(59);
+    SHA256_SCR(60);
+    SHA256_SCR(61);
+    SHA256_SCR(62);
+    SHA256_SCR(63);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#endif /* !UNROLL_LOOPS */
+  }
+}
+
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA256_transform(ctx, ctx->block, 1);
+  SHA256_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 6;
+}
+
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+#ifndef UNROLL_LOOPS
+  int i;
+#endif
+
+  block_nb =
+      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 6;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA256_transform(ctx, ctx->block, block_nb);
+
+#ifndef UNROLL_LOOPS
+  for (i = 0; i < 8; i++) {
+    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
+  }
+#else
+  UNPACK32(ctx->h[0], &ctx->buf[0]);
+  UNPACK32(ctx->h[1], &ctx->buf[4]);
+  UNPACK32(ctx->h[2], &ctx->buf[8]);
+  UNPACK32(ctx->h[3], &ctx->buf[12]);
+  UNPACK32(ctx->h[4], &ctx->buf[16]);
+  UNPACK32(ctx->h[5], &ctx->buf[20]);
+  UNPACK32(ctx->h[6], &ctx->buf[24]);
+  UNPACK32(ctx->h[7], &ctx->buf[28]);
+#endif /* !UNROLL_LOOPS */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/rk_libavb/avb_sha512.c b/lib/avb/libavb/avb_sha512.c
similarity index 97%
rename from lib/avb/rk_libavb/avb_sha512.c
rename to lib/avb/libavb/avb_sha512.c
index cb4a2eeb41..020e9c9019 100644
--- a/lib/avb/rk_libavb/avb_sha512.c
+++ b/lib/avb/libavb/avb_sha512.c
@@ -1,388 +1,388 @@
-/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
- * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
- */
-
-/*
- * FIPS 180-2 SHA-224/256/384/512 implementation
- * Last update: 02/02/2007
- * Issue date:  04/30/2005
- *
- * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the project nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <android_avb/avb_sha.h>
-
-#define SHFR(x, n) (x >> n)
-#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
-#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
-#define CH(x, y, z) ((x & y) ^ (~x & z))
-#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
-
-#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
-#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
-#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
-#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
-
-#define UNPACK32(x, str)                 \
-  {                                      \
-    *((str) + 3) = (uint8_t)((x));       \
-    *((str) + 2) = (uint8_t)((x) >> 8);  \
-    *((str) + 1) = (uint8_t)((x) >> 16); \
-    *((str) + 0) = (uint8_t)((x) >> 24); \
-  }
-
-#define UNPACK64(x, str)                         \
-  {                                              \
-    *((str) + 7) = (uint8_t)x;                   \
-    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
-    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
-    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
-    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
-    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
-    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
-    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
-  }
-
-#define PACK64(str, x)                                                        \
-  {                                                                           \
-    *(x) =                                                                    \
-        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
-        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
-        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
-        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
-  }
-
-/* Macros used for loops unrolling */
-
-#define SHA512_SCR(i) \
-  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
-
-#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
-  {                                                                         \
-    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
-         w[j];                                                              \
-    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
-    wv[d] += t1;                                                            \
-    wv[h] = t1 + t2;                                                        \
-  }
-
-static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
-                                      0xbb67ae8584caa73bULL,
-                                      0x3c6ef372fe94f82bULL,
-                                      0xa54ff53a5f1d36f1ULL,
-                                      0x510e527fade682d1ULL,
-                                      0x9b05688c2b3e6c1fULL,
-                                      0x1f83d9abfb41bd6bULL,
-                                      0x5be0cd19137e2179ULL};
-
-static const uint64_t sha512_k[80] = {
-    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
-    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
-    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
-    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
-    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
-    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
-    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
-    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
-    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
-    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
-    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
-    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
-    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
-    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
-    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
-    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
-    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
-    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
-    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
-    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
-    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
-    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
-    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
-    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
-    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
-    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
-    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
-
-/* SHA-512 implementation */
-
-void avb_sha512_init(AvbSHA512Ctx* ctx) {
-#ifdef UNROLL_LOOPS_SHA512
-  ctx->h[0] = sha512_h0[0];
-  ctx->h[1] = sha512_h0[1];
-  ctx->h[2] = sha512_h0[2];
-  ctx->h[3] = sha512_h0[3];
-  ctx->h[4] = sha512_h0[4];
-  ctx->h[5] = sha512_h0[5];
-  ctx->h[6] = sha512_h0[6];
-  ctx->h[7] = sha512_h0[7];
-#else
-  int i;
-
-  for (i = 0; i < 8; i++)
-    ctx->h[i] = sha512_h0[i];
-#endif /* UNROLL_LOOPS_SHA512 */
-
-  ctx->len = 0;
-  ctx->tot_len = 0;
-}
-
-static void SHA512_transform(AvbSHA512Ctx* ctx,
-                             const uint8_t* message,
-                             unsigned int block_nb) {
-  uint64_t w[80];
-  uint64_t wv[8];
-  uint64_t t1, t2;
-  const uint8_t* sub_block;
-  int i, j;
-
-  for (i = 0; i < (int)block_nb; i++) {
-    sub_block = message + (i << 7);
-
-#ifdef UNROLL_LOOPS_SHA512
-    PACK64(&sub_block[0], &w[0]);
-    PACK64(&sub_block[8], &w[1]);
-    PACK64(&sub_block[16], &w[2]);
-    PACK64(&sub_block[24], &w[3]);
-    PACK64(&sub_block[32], &w[4]);
-    PACK64(&sub_block[40], &w[5]);
-    PACK64(&sub_block[48], &w[6]);
-    PACK64(&sub_block[56], &w[7]);
-    PACK64(&sub_block[64], &w[8]);
-    PACK64(&sub_block[72], &w[9]);
-    PACK64(&sub_block[80], &w[10]);
-    PACK64(&sub_block[88], &w[11]);
-    PACK64(&sub_block[96], &w[12]);
-    PACK64(&sub_block[104], &w[13]);
-    PACK64(&sub_block[112], &w[14]);
-    PACK64(&sub_block[120], &w[15]);
-
-    SHA512_SCR(16);
-    SHA512_SCR(17);
-    SHA512_SCR(18);
-    SHA512_SCR(19);
-    SHA512_SCR(20);
-    SHA512_SCR(21);
-    SHA512_SCR(22);
-    SHA512_SCR(23);
-    SHA512_SCR(24);
-    SHA512_SCR(25);
-    SHA512_SCR(26);
-    SHA512_SCR(27);
-    SHA512_SCR(28);
-    SHA512_SCR(29);
-    SHA512_SCR(30);
-    SHA512_SCR(31);
-    SHA512_SCR(32);
-    SHA512_SCR(33);
-    SHA512_SCR(34);
-    SHA512_SCR(35);
-    SHA512_SCR(36);
-    SHA512_SCR(37);
-    SHA512_SCR(38);
-    SHA512_SCR(39);
-    SHA512_SCR(40);
-    SHA512_SCR(41);
-    SHA512_SCR(42);
-    SHA512_SCR(43);
-    SHA512_SCR(44);
-    SHA512_SCR(45);
-    SHA512_SCR(46);
-    SHA512_SCR(47);
-    SHA512_SCR(48);
-    SHA512_SCR(49);
-    SHA512_SCR(50);
-    SHA512_SCR(51);
-    SHA512_SCR(52);
-    SHA512_SCR(53);
-    SHA512_SCR(54);
-    SHA512_SCR(55);
-    SHA512_SCR(56);
-    SHA512_SCR(57);
-    SHA512_SCR(58);
-    SHA512_SCR(59);
-    SHA512_SCR(60);
-    SHA512_SCR(61);
-    SHA512_SCR(62);
-    SHA512_SCR(63);
-    SHA512_SCR(64);
-    SHA512_SCR(65);
-    SHA512_SCR(66);
-    SHA512_SCR(67);
-    SHA512_SCR(68);
-    SHA512_SCR(69);
-    SHA512_SCR(70);
-    SHA512_SCR(71);
-    SHA512_SCR(72);
-    SHA512_SCR(73);
-    SHA512_SCR(74);
-    SHA512_SCR(75);
-    SHA512_SCR(76);
-    SHA512_SCR(77);
-    SHA512_SCR(78);
-    SHA512_SCR(79);
-
-    wv[0] = ctx->h[0];
-    wv[1] = ctx->h[1];
-    wv[2] = ctx->h[2];
-    wv[3] = ctx->h[3];
-    wv[4] = ctx->h[4];
-    wv[5] = ctx->h[5];
-    wv[6] = ctx->h[6];
-    wv[7] = ctx->h[7];
-
-    j = 0;
-
-    do {
-      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
-      j++;
-      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
-      j++;
-      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
-      j++;
-      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
-      j++;
-      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
-      j++;
-      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
-      j++;
-      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
-      j++;
-      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
-      j++;
-    } while (j < 80);
-
-    ctx->h[0] += wv[0];
-    ctx->h[1] += wv[1];
-    ctx->h[2] += wv[2];
-    ctx->h[3] += wv[3];
-    ctx->h[4] += wv[4];
-    ctx->h[5] += wv[5];
-    ctx->h[6] += wv[6];
-    ctx->h[7] += wv[7];
-#else
-    for (j = 0; j < 16; j++) {
-      PACK64(&sub_block[j << 3], &w[j]);
-    }
-
-    for (j = 16; j < 80; j++) {
-      SHA512_SCR(j);
-    }
-
-    for (j = 0; j < 8; j++) {
-      wv[j] = ctx->h[j];
-    }
-
-    for (j = 0; j < 80; j++) {
-      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
-           w[j];
-      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
-      wv[7] = wv[6];
-      wv[6] = wv[5];
-      wv[5] = wv[4];
-      wv[4] = wv[3] + t1;
-      wv[3] = wv[2];
-      wv[2] = wv[1];
-      wv[1] = wv[0];
-      wv[0] = t1 + t2;
-    }
-
-    for (j = 0; j < 8; j++)
-      ctx->h[j] += wv[j];
-#endif /* UNROLL_LOOPS_SHA512 */
-  }
-}
-
-void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len) {
-  unsigned int block_nb;
-  unsigned int new_len, rem_len, tmp_len;
-  const uint8_t* shifted_data;
-
-  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
-  rem_len = len < tmp_len ? len : tmp_len;
-
-  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
-
-  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
-    ctx->len += len;
-    return;
-  }
-
-  new_len = len - rem_len;
-  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
-
-  shifted_data = data + rem_len;
-
-  SHA512_transform(ctx, ctx->block, 1);
-  SHA512_transform(ctx, shifted_data, block_nb);
-
-  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
-
-  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
-
-  ctx->len = rem_len;
-  ctx->tot_len += (block_nb + 1) << 7;
-}
-
-uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
-  unsigned int block_nb;
-  unsigned int pm_len;
-  unsigned int len_b;
-
-#ifndef UNROLL_LOOPS_SHA512
-  int i;
-#endif
-
-  block_nb =
-      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
-
-  len_b = (ctx->tot_len + ctx->len) << 3;
-  pm_len = block_nb << 7;
-
-  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
-  ctx->block[ctx->len] = 0x80;
-  UNPACK32(len_b, ctx->block + pm_len - 4);
-
-  SHA512_transform(ctx, ctx->block, block_nb);
-
-#ifdef UNROLL_LOOPS_SHA512
-  UNPACK64(ctx->h[0], &ctx->buf[0]);
-  UNPACK64(ctx->h[1], &ctx->buf[8]);
-  UNPACK64(ctx->h[2], &ctx->buf[16]);
-  UNPACK64(ctx->h[3], &ctx->buf[24]);
-  UNPACK64(ctx->h[4], &ctx->buf[32]);
-  UNPACK64(ctx->h[5], &ctx->buf[40]);
-  UNPACK64(ctx->h[6], &ctx->buf[48]);
-  UNPACK64(ctx->h[7], &ctx->buf[56]);
-#else
-  for (i = 0; i < 8; i++)
-    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
-#endif /* UNROLL_LOOPS_SHA512 */
-
-  return ctx->buf;
-}
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
+#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
+#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
+#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define UNPACK64(x, str)                         \
+  {                                              \
+    *((str) + 7) = (uint8_t)x;                   \
+    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
+    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
+    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
+    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
+    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
+    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
+    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
+  }
+
+#define PACK64(str, x)                                                        \
+  {                                                                           \
+    *(x) =                                                                    \
+        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
+        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
+        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
+        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA512_SCR(i) \
+  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
+         w[j];                                                              \
+    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
+                                      0xbb67ae8584caa73bULL,
+                                      0x3c6ef372fe94f82bULL,
+                                      0xa54ff53a5f1d36f1ULL,
+                                      0x510e527fade682d1ULL,
+                                      0x9b05688c2b3e6c1fULL,
+                                      0x1f83d9abfb41bd6bULL,
+                                      0x5be0cd19137e2179ULL};
+
+static const uint64_t sha512_k[80] = {
+    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
+    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
+    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
+    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
+    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
+    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
+    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
+    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
+    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
+    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
+    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
+    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
+    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
+    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
+    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
+    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
+    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
+    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
+    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
+    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
+    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
+    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
+    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
+    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
+    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
+    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
+    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
+
+/* SHA-512 implementation */
+
+void avb_sha512_init(AvbSHA512Ctx* ctx) {
+#ifdef UNROLL_LOOPS_SHA512
+  ctx->h[0] = sha512_h0[0];
+  ctx->h[1] = sha512_h0[1];
+  ctx->h[2] = sha512_h0[2];
+  ctx->h[3] = sha512_h0[3];
+  ctx->h[4] = sha512_h0[4];
+  ctx->h[5] = sha512_h0[5];
+  ctx->h[6] = sha512_h0[6];
+  ctx->h[7] = sha512_h0[7];
+#else
+  int i;
+
+  for (i = 0; i < 8; i++)
+    ctx->h[i] = sha512_h0[i];
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA512_transform(AvbSHA512Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint64_t w[80];
+  uint64_t wv[8];
+  uint64_t t1, t2;
+  const uint8_t* sub_block;
+  int i, j;
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 7);
+
+#ifdef UNROLL_LOOPS_SHA512
+    PACK64(&sub_block[0], &w[0]);
+    PACK64(&sub_block[8], &w[1]);
+    PACK64(&sub_block[16], &w[2]);
+    PACK64(&sub_block[24], &w[3]);
+    PACK64(&sub_block[32], &w[4]);
+    PACK64(&sub_block[40], &w[5]);
+    PACK64(&sub_block[48], &w[6]);
+    PACK64(&sub_block[56], &w[7]);
+    PACK64(&sub_block[64], &w[8]);
+    PACK64(&sub_block[72], &w[9]);
+    PACK64(&sub_block[80], &w[10]);
+    PACK64(&sub_block[88], &w[11]);
+    PACK64(&sub_block[96], &w[12]);
+    PACK64(&sub_block[104], &w[13]);
+    PACK64(&sub_block[112], &w[14]);
+    PACK64(&sub_block[120], &w[15]);
+
+    SHA512_SCR(16);
+    SHA512_SCR(17);
+    SHA512_SCR(18);
+    SHA512_SCR(19);
+    SHA512_SCR(20);
+    SHA512_SCR(21);
+    SHA512_SCR(22);
+    SHA512_SCR(23);
+    SHA512_SCR(24);
+    SHA512_SCR(25);
+    SHA512_SCR(26);
+    SHA512_SCR(27);
+    SHA512_SCR(28);
+    SHA512_SCR(29);
+    SHA512_SCR(30);
+    SHA512_SCR(31);
+    SHA512_SCR(32);
+    SHA512_SCR(33);
+    SHA512_SCR(34);
+    SHA512_SCR(35);
+    SHA512_SCR(36);
+    SHA512_SCR(37);
+    SHA512_SCR(38);
+    SHA512_SCR(39);
+    SHA512_SCR(40);
+    SHA512_SCR(41);
+    SHA512_SCR(42);
+    SHA512_SCR(43);
+    SHA512_SCR(44);
+    SHA512_SCR(45);
+    SHA512_SCR(46);
+    SHA512_SCR(47);
+    SHA512_SCR(48);
+    SHA512_SCR(49);
+    SHA512_SCR(50);
+    SHA512_SCR(51);
+    SHA512_SCR(52);
+    SHA512_SCR(53);
+    SHA512_SCR(54);
+    SHA512_SCR(55);
+    SHA512_SCR(56);
+    SHA512_SCR(57);
+    SHA512_SCR(58);
+    SHA512_SCR(59);
+    SHA512_SCR(60);
+    SHA512_SCR(61);
+    SHA512_SCR(62);
+    SHA512_SCR(63);
+    SHA512_SCR(64);
+    SHA512_SCR(65);
+    SHA512_SCR(66);
+    SHA512_SCR(67);
+    SHA512_SCR(68);
+    SHA512_SCR(69);
+    SHA512_SCR(70);
+    SHA512_SCR(71);
+    SHA512_SCR(72);
+    SHA512_SCR(73);
+    SHA512_SCR(74);
+    SHA512_SCR(75);
+    SHA512_SCR(76);
+    SHA512_SCR(77);
+    SHA512_SCR(78);
+    SHA512_SCR(79);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    j = 0;
+
+    do {
+      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
+      j++;
+      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
+      j++;
+      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
+      j++;
+      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
+      j++;
+      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
+      j++;
+      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
+      j++;
+      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
+      j++;
+      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
+      j++;
+    } while (j < 80);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#else
+    for (j = 0; j < 16; j++) {
+      PACK64(&sub_block[j << 3], &w[j]);
+    }
+
+    for (j = 16; j < 80; j++) {
+      SHA512_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 80; j++) {
+      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
+           w[j];
+      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++)
+      ctx->h[j] += wv[j];
+#endif /* UNROLL_LOOPS_SHA512 */
+  }
+}
+
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA512_transform(ctx, ctx->block, 1);
+  SHA512_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 7;
+}
+
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+
+#ifndef UNROLL_LOOPS_SHA512
+  int i;
+#endif
+
+  block_nb =
+      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 7;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA512_transform(ctx, ctx->block, block_nb);
+
+#ifdef UNROLL_LOOPS_SHA512
+  UNPACK64(ctx->h[0], &ctx->buf[0]);
+  UNPACK64(ctx->h[1], &ctx->buf[8]);
+  UNPACK64(ctx->h[2], &ctx->buf[16]);
+  UNPACK64(ctx->h[3], &ctx->buf[24]);
+  UNPACK64(ctx->h[4], &ctx->buf[32]);
+  UNPACK64(ctx->h[5], &ctx->buf[40]);
+  UNPACK64(ctx->h[6], &ctx->buf[48]);
+  UNPACK64(ctx->h[7], &ctx->buf[56]);
+#else
+  for (i = 0; i < 8; i++)
+    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/libavb/avb_slot_verify.c b/lib/avb/libavb/avb_slot_verify.c
new file mode 100644
index 0000000000..972fda0e9c
--- /dev/null
+++ b/lib/avb/libavb/avb_slot_verify.c
@@ -0,0 +1,1155 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_cmdline.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+
+/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
+
+/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_VBMETA_IMAGES 32
+
+/* Maximum size of a vbmeta image - 64 KiB. */
+#define VBMETA_MAX_SIZE (64 * 1024)
+
+/* Helper function to see if we should continue with verification in
+ * allow_verification_error=true mode if something goes wrong. See the
+ * comments for the avb_slot_verify() function for more information.
+ */
+static inline bool result_should_continue(AvbSlotVerifyResult result) {
+  switch (result) {
+    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+      return false;
+
+    case AVB_SLOT_VERIFY_RESULT_OK:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+      return true;
+  }
+
+  return false;
+}
+
+static AvbSlotVerifyResult load_full_partition(
+    AvbOps* ops, const char* part_name,
+    uint64_t image_size, uint8_t** out_image_buf,
+    bool* out_image_preloaded) {
+  size_t part_num_read;
+  AvbIOResult io_ret;
+
+  /* Make sure that we do not overwrite existing data. */
+  avb_assert(*out_image_buf == NULL);
+  avb_assert(!*out_image_preloaded);
+
+  /* We are going to implicitly cast image_size from uint64_t to size_t in the
+   * following code, so we need to make sure that the cast is safe. */
+  if (image_size != (size_t)(image_size)) {
+    avb_errorv(part_name, ": Partition size too large to load.\n", NULL);
+    return AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+  }
+
+  /* Try use a preloaded one. */
+  if (ops->get_preloaded_partition != NULL) {
+    io_ret = ops->get_preloaded_partition(
+        ops, part_name, image_size, out_image_buf, &part_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+
+    if (*out_image_buf != NULL) {
+      if (part_num_read != image_size) {
+        avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
+        return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      }
+      *out_image_preloaded = true;
+    }
+  }
+
+  /* Allocate and copy the partition. */
+  if (!*out_image_preloaded) {
+    *out_image_buf = avb_malloc(image_size);
+    if (*out_image_buf == NULL) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    }
+
+    io_ret = ops->read_from_partition(
+        ops, part_name, 0 /* offset */, image_size, *out_image_buf,
+        &part_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      return AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+    if (part_num_read != image_size) {
+      avb_errorv(part_name, ": Read incorrect number of bytes.\n", NULL);
+      return AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    }
+  }
+
+  return AVB_SLOT_VERIFY_RESULT_OK;
+}
+
+static AvbSlotVerifyResult load_and_verify_hash_partition(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    bool allow_verification_error,
+    const AvbDescriptor* descriptor,
+    AvbSlotVerifyData* slot_data) {
+  AvbHashDescriptor hash_desc;
+  const uint8_t* desc_partition_name = NULL;
+  const uint8_t* desc_salt;
+  const uint8_t* desc_digest;
+  char part_name[AVB_PART_NAME_MAX_SIZE];
+  AvbSlotVerifyResult ret;
+  AvbIOResult io_ret;
+  uint8_t* image_buf = NULL;
+  bool image_preloaded = false;
+  uint8_t* digest;
+  size_t digest_len;
+  const char* found;
+  uint64_t image_size = 0;
+
+  if (!avb_hash_descriptor_validate_and_byteswap(
+          (const AvbHashDescriptor*)descriptor, &hash_desc)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  desc_partition_name =
+      ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
+  desc_salt = desc_partition_name + hash_desc.partition_name_len;
+  desc_digest = desc_salt + hash_desc.salt_len;
+
+  if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
+    avb_error("Partition name is not valid UTF-8.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* Don't bother loading or validating unless the partition was
+   * requested in the first place.
+   */
+  found = avb_strv_find_str(requested_partitions,
+                            (const char*)desc_partition_name,
+                            hash_desc.partition_name_len);
+  if (found == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_OK;
+    goto out;
+  }
+
+  if (!avb_str_concat(part_name,
+                      sizeof part_name,
+                      (const char*)desc_partition_name,
+                      hash_desc.partition_name_len,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* If we're allowing verification errors then hash_desc.image_size
+   * may no longer match what's in the partition... so in this case
+   * just load the entire partition.
+   *
+   * For example, this can happen if a developer does 'fastboot flash
+   * boot /path/to/new/and/bigger/boot.img'. We want this to work
+   * since it's such a common workflow.
+   */
+  image_size = hash_desc.image_size;
+  if (0) {
+    if (ops->get_size_of_partition == NULL) {
+      avb_errorv(part_name,
+                 ": The get_size_of_partition() operation is "
+                 "not implemented so we may not load the entire partition. "
+                 "Please implement.",
+                 NULL);
+    } else {
+      io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+        goto out;
+      }
+      avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+    }
+  }
+
+  ret = load_full_partition(
+      ops, part_name, image_size, &image_buf, &image_preloaded);
+  if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+    goto out;
+  }
+
+  if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
+    AvbSHA256Ctx sha256_ctx;
+    avb_sha256_init(&sha256_ctx);
+    avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
+    avb_sha256_update(&sha256_ctx, image_buf, hash_desc.image_size);
+    digest = avb_sha256_final(&sha256_ctx);
+    digest_len = AVB_SHA256_DIGEST_SIZE;
+  } else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
+    AvbSHA512Ctx sha512_ctx;
+    avb_sha512_init(&sha512_ctx);
+    avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
+    avb_sha512_update(&sha512_ctx, image_buf, hash_desc.image_size);
+    digest = avb_sha512_final(&sha512_ctx);
+    digest_len = AVB_SHA512_DIGEST_SIZE;
+  } else {
+    avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  if (digest_len != hash_desc.digest_len) {
+    avb_errorv(
+        part_name, ": Digest in descriptor not of expected size.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
+    avb_errorv(part_name,
+               ": Hash of data does not match digest in descriptor.\n",
+               NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+    goto out;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  /* If it worked and something was loaded, copy to slot_data. */
+  if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
+      image_buf != NULL) {
+    AvbPartitionData* loaded_partition;
+    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto fail;
+    }
+    loaded_partition =
+        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+    loaded_partition->partition_name = avb_strdup(found);
+    loaded_partition->data_size = image_size;
+    loaded_partition->data = image_buf;
+    loaded_partition->preloaded = image_preloaded;
+    image_buf = NULL;
+  }
+
+fail:
+  if (image_buf != NULL && !image_preloaded) {
+    avb_free(image_buf);
+  }
+  return ret;
+}
+
+static AvbSlotVerifyResult load_requested_partitions(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    AvbSlotVerifyData* slot_data) {
+  AvbSlotVerifyResult ret;
+  uint8_t* image_buf = NULL;
+  bool image_preloaded = false;
+  size_t n;
+
+  if (ops->get_size_of_partition == NULL) {
+    avb_error("get_size_of_partition() not implemented.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+    goto out;
+  }
+
+  for (n = 0; requested_partitions[n] != NULL; n++) {
+    char part_name[AVB_PART_NAME_MAX_SIZE];
+    AvbIOResult io_ret;
+    uint64_t image_size;
+    AvbPartitionData* loaded_partition;
+
+    if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        requested_partitions[n],
+                        avb_strlen(requested_partitions[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+    avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+
+    ret = load_full_partition(
+        ops, part_name, image_size, &image_buf, &image_preloaded);
+    if (ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      goto out;
+    }
+
+    /* Move to slot_data. */
+    if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+      avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+    loaded_partition =
+        &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+    loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
+    if (loaded_partition->partition_name == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+    loaded_partition->data_size = image_size;
+    loaded_partition->data = image_buf;  /* Transferring the owner. */
+    loaded_partition->preloaded = image_preloaded;
+    image_buf = NULL;
+    image_preloaded = false;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+  /* Free the current buffer if any. */
+  if (image_buf != NULL && !image_preloaded) {
+    avb_free(image_buf);
+  }
+  /* Buffers that are already saved in slot_data will be handled by the caller
+   * even on failure. */
+  return ret;
+}
+
+static AvbSlotVerifyResult load_and_verify_vbmeta(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    bool allow_verification_error,
+    AvbVBMetaImageFlags toplevel_vbmeta_flags,
+    int rollback_index_location,
+    const char* partition_name,
+    size_t partition_name_len,
+    const uint8_t* expected_public_key,
+    size_t expected_public_key_length,
+    AvbSlotVerifyData* slot_data,
+    AvbAlgorithmType* out_algorithm_type) {
+  char full_partition_name[AVB_PART_NAME_MAX_SIZE];
+  AvbSlotVerifyResult ret;
+  AvbIOResult io_ret;
+  size_t vbmeta_offset;
+  size_t vbmeta_size;
+  uint8_t* vbmeta_buf = NULL;
+  size_t vbmeta_num_read;
+  AvbVBMetaVerifyResult vbmeta_ret;
+  const uint8_t* pk_data;
+  size_t pk_len;
+  AvbVBMetaImageHeader vbmeta_header;
+  uint64_t stored_rollback_index;
+  const AvbDescriptor** descriptors = NULL;
+  size_t num_descriptors;
+  size_t n;
+  bool is_main_vbmeta;
+  bool is_vbmeta_partition;
+  AvbVBMetaData* vbmeta_image_data = NULL;
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+  avb_assert(slot_data != NULL);
+
+  /* Since we allow top-level vbmeta in 'boot', use
+   * rollback_index_location to determine whether we're the main
+   * vbmeta struct.
+   */
+  is_main_vbmeta = (rollback_index_location == 0);
+  is_vbmeta_partition = (avb_strcmp(partition_name, "vbmeta") == 0);
+
+  if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
+    avb_error("Partition name is not valid UTF-8.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  /* Construct full partition name. */
+  if (!avb_str_concat(full_partition_name,
+                      sizeof full_partition_name,
+                      partition_name,
+                      partition_name_len,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  avb_debugv("Loading vbmeta struct from partition '",
+             full_partition_name,
+             "'.\n",
+             NULL);
+
+  /* If we're loading from the main vbmeta partition, the vbmeta
+   * struct is in the beginning. Otherwise we have to locate it via a
+   * footer.
+   */
+  if (is_vbmeta_partition) {
+    vbmeta_offset = 0;
+    vbmeta_size = VBMETA_MAX_SIZE;
+  } else {
+    uint8_t footer_buf[AVB_FOOTER_SIZE];
+    size_t footer_num_read;
+    AvbFooter footer;
+
+    io_ret = ops->read_from_partition(ops,
+                                      full_partition_name,
+                                      -AVB_FOOTER_SIZE,
+                                      AVB_FOOTER_SIZE,
+                                      footer_buf,
+                                      &footer_num_read);
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    } else if (io_ret != AVB_IO_RESULT_OK) {
+      avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+    avb_assert(footer_num_read == AVB_FOOTER_SIZE);
+
+    if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,
+                                          &footer)) {
+      avb_errorv(full_partition_name, ": Error validating footer.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    /* Basic footer sanity check since the data is untrusted. */
+    if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
+      avb_errorv(
+          full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    vbmeta_offset = footer.vbmeta_offset;
+    vbmeta_size = footer.vbmeta_size;
+  }
+
+  vbmeta_buf = avb_malloc(vbmeta_size);
+  if (vbmeta_buf == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  io_ret = ops->read_from_partition(ops,
+                                    full_partition_name,
+                                    vbmeta_offset,
+                                    vbmeta_size,
+                                    vbmeta_buf,
+                                    &vbmeta_num_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    /* If we're looking for 'vbmeta' but there is no such partition,
+     * go try to get it from the boot partition instead.
+     */
+    if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION &&
+        is_vbmeta_partition) {
+      avb_debugv(full_partition_name,
+                 ": No such partition. Trying 'boot' instead.\n",
+                 NULL);
+      ret = load_and_verify_vbmeta(ops,
+                                   requested_partitions,
+                                   ab_suffix,
+                                   allow_verification_error,
+                                   0 /* toplevel_vbmeta_flags */,
+                                   0 /* rollback_index_location */,
+                                   "boot",
+                                   avb_strlen("boot"),
+                                   NULL /* expected_public_key */,
+                                   0 /* expected_public_key_length */,
+                                   slot_data,
+                                   out_algorithm_type);
+      goto out;
+    } else {
+      avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+      goto out;
+    }
+  }
+  avb_assert(vbmeta_num_read <= vbmeta_size);
+
+  /* Check if the image is properly signed and get the public key used
+   * to sign the image.
+   */
+  vbmeta_ret =
+      avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
+  switch (vbmeta_ret) {
+    case AVB_VBMETA_VERIFY_RESULT_OK:
+      avb_assert(pk_data != NULL && pk_len > 0);
+      break;
+
+    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: ",
+                 avb_vbmeta_verify_result_to_string(vbmeta_ret),
+                 "\n",
+                 NULL);
+      if (!allow_verification_error) {
+        goto out;
+      }
+      break;
+
+    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+      /* No way to continue this case. */
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: invalid vbmeta header\n",
+                 NULL);
+      goto out;
+
+    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+      /* No way to continue this case. */
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
+      avb_errorv(full_partition_name,
+                 ": Error verifying vbmeta image: unsupported AVB version\n",
+                 NULL);
+      goto out;
+  }
+
+  /* Byteswap the header. */
+  avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
+                                             &vbmeta_header);
+
+  /* If we're the toplevel, assign flags so they'll be passed down. */
+  if (is_main_vbmeta) {
+    toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
+  } else {
+    if (vbmeta_header.flags != 0) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      avb_errorv(full_partition_name,
+                 ": chained vbmeta image has non-zero flags\n",
+                 NULL);
+      goto out;
+    }
+  }
+
+  /* Check if key used to make signature matches what is expected. */
+  if (pk_data != NULL) {
+    if (expected_public_key != NULL) {
+      avb_assert(!is_main_vbmeta);
+      if (expected_public_key_length != pk_len ||
+          avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
+        avb_errorv(full_partition_name,
+                   ": Public key used to sign data does not match key in chain "
+                   "partition descriptor.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+        if (!allow_verification_error) {
+          goto out;
+        }
+      }
+    } else {
+      bool key_is_trusted = false;
+      const uint8_t* pk_metadata = NULL;
+      size_t pk_metadata_len = 0;
+
+      if (vbmeta_header.public_key_metadata_size > 0) {
+        pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
+                      vbmeta_header.authentication_data_block_size +
+                      vbmeta_header.public_key_metadata_offset;
+        pk_metadata_len = vbmeta_header.public_key_metadata_size;
+      }
+
+      avb_assert(is_main_vbmeta);
+      io_ret = ops->validate_vbmeta_public_key(
+          ops, pk_data, pk_len, pk_metadata, pk_metadata_len, &key_is_trusted);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_errorv(full_partition_name,
+                   ": Error while checking public key used to sign data.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+        goto out;
+      }
+      if (!key_is_trusted) {
+        avb_errorv(full_partition_name,
+                   ": Public key used to sign data rejected.\n",
+                   NULL);
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+        if (!allow_verification_error) {
+          goto out;
+        }
+      }
+    }
+  }
+
+  /* Check rollback index. */
+  io_ret = ops->read_rollback_index(
+      ops, rollback_index_location, &stored_rollback_index);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_errorv(full_partition_name,
+               ": Error getting rollback index for location.\n",
+               NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (vbmeta_header.rollback_index < stored_rollback_index) {
+    avb_errorv(
+        full_partition_name,
+        ": Image rollback index is less than the stored rollback index.\n",
+        NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
+    if (!allow_verification_error) {
+      goto out;
+    }
+  }
+
+  /* Copy vbmeta to vbmeta_images before recursing. */
+  if (is_main_vbmeta) {
+    avb_assert(slot_data->num_vbmeta_images == 0);
+  } else {
+    avb_assert(slot_data->num_vbmeta_images > 0);
+  }
+  if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
+    avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+  vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
+  vbmeta_image_data->partition_name = avb_strdup(partition_name);
+  vbmeta_image_data->vbmeta_data = vbmeta_buf;
+  /* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
+   * and this includes data past the end of the image. Pass the
+   * actual size of the vbmeta image. Also, no need to use
+   * avb_safe_add() since the header has already been verified.
+   */
+  vbmeta_image_data->vbmeta_size =
+      sizeof(AvbVBMetaImageHeader) +
+      vbmeta_header.authentication_data_block_size +
+      vbmeta_header.auxiliary_data_block_size;
+  vbmeta_image_data->verify_result = vbmeta_ret;
+
+  /* If verification has been disabled by setting a bit in the image,
+   * we're done... except that we need to load the entirety of the
+   * requested partitions.
+   */
+  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+    AvbSlotVerifyResult sub_ret;
+    avb_debugv(
+        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
+    /* If load_requested_partitions() fail it is always a fatal
+     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
+     * than recoverable (e.g. one where result_should_continue()
+     * returns true) and we want to convey that error.
+     */
+    sub_ret = load_requested_partitions(
+        ops, requested_partitions, ab_suffix, slot_data);
+    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      ret = sub_ret;
+    }
+    goto out;
+  }
+
+  /* Now go through all descriptors and take the appropriate action:
+   *
+   * - hash descriptor: Load data from partition, calculate hash, and
+   *   checks that it matches what's in the hash descriptor.
+   *
+   * - hashtree descriptor: Do nothing since verification happens
+   *   on-the-fly from within the OS.
+   *
+   * - chained partition descriptor: Load the footer, load the vbmeta
+   *   image, verify vbmeta image (includes rollback checks, hash
+   *   checks, bail on chained partitions).
+   */
+  descriptors =
+      avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
+  for (n = 0; n < num_descriptors; n++) {
+    AvbDescriptor desc;
+
+    if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
+      avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+      goto out;
+    }
+
+    switch (desc.tag) {
+      case AVB_DESCRIPTOR_TAG_HASH: {
+        AvbSlotVerifyResult sub_ret;
+        sub_ret = load_and_verify_hash_partition(ops,
+                                                 requested_partitions,
+                                                 ab_suffix,
+                                                 allow_verification_error,
+                                                 descriptors[n],
+                                                 slot_data);
+        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+          ret = sub_ret;
+          if (!allow_verification_error || !result_should_continue(ret)) {
+            goto out;
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
+        AvbSlotVerifyResult sub_ret;
+        AvbChainPartitionDescriptor chain_desc;
+        const uint8_t* chain_partition_name;
+        const uint8_t* chain_public_key;
+
+        /* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
+        if (!is_main_vbmeta) {
+          avb_errorv(full_partition_name,
+                     ": Encountered chain descriptor not in main image.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        if (!avb_chain_partition_descriptor_validate_and_byteswap(
+                (AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
+          avb_errorv(full_partition_name,
+                     ": Chain partition descriptor is invalid.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        if (chain_desc.rollback_index_location == 0) {
+          avb_errorv(full_partition_name,
+                     ": Chain partition has invalid "
+                     "rollback_index_location field.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        chain_partition_name = ((const uint8_t*)descriptors[n]) +
+                               sizeof(AvbChainPartitionDescriptor);
+        chain_public_key = chain_partition_name + chain_desc.partition_name_len;
+
+        sub_ret = load_and_verify_vbmeta(ops,
+                                         requested_partitions,
+                                         ab_suffix,
+                                         allow_verification_error,
+                                         toplevel_vbmeta_flags,
+                                         chain_desc.rollback_index_location,
+                                         (const char*)chain_partition_name,
+                                         chain_desc.partition_name_len,
+                                         chain_public_key,
+                                         chain_desc.public_key_len,
+                                         slot_data,
+                                         NULL /* out_algorithm_type */);
+        if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+          ret = sub_ret;
+          if (!result_should_continue(ret)) {
+            goto out;
+          }
+        }
+      } break;
+
+      case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
+        const uint8_t* kernel_cmdline;
+        AvbKernelCmdlineDescriptor kernel_cmdline_desc;
+        bool apply_cmdline;
+
+        if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
+                (AvbKernelCmdlineDescriptor*)descriptors[n],
+                &kernel_cmdline_desc)) {
+          avb_errorv(full_partition_name,
+                     ": Kernel cmdline descriptor is invalid.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        kernel_cmdline = ((const uint8_t*)descriptors[n]) +
+                         sizeof(AvbKernelCmdlineDescriptor);
+
+        if (!avb_validate_utf8(kernel_cmdline,
+                               kernel_cmdline_desc.kernel_cmdline_length)) {
+          avb_errorv(full_partition_name,
+                     ": Kernel cmdline is not valid UTF-8.\n",
+                     NULL);
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+          goto out;
+        }
+
+        /* Compare the flags for top-level VBMeta struct with flags in
+         * the command-line descriptor so command-line snippets only
+         * intended for a certain mode (dm-verity enabled/disabled)
+         * are skipped if applicable.
+         */
+        apply_cmdline = true;
+        if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+          if (kernel_cmdline_desc.flags &
+              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
+            apply_cmdline = false;
+          }
+        } else {
+          if (kernel_cmdline_desc.flags &
+              AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
+            apply_cmdline = false;
+          }
+        }
+
+        if (apply_cmdline) {
+          if (slot_data->cmdline == NULL) {
+            slot_data->cmdline =
+                avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
+            if (slot_data->cmdline == NULL) {
+              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+              goto out;
+            }
+            avb_memcpy(slot_data->cmdline,
+                       kernel_cmdline,
+                       kernel_cmdline_desc.kernel_cmdline_length);
+          } else {
+            /* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
+            size_t orig_size = avb_strlen(slot_data->cmdline);
+            size_t new_size =
+                orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
+            char* new_cmdline = avb_calloc(new_size);
+            if (new_cmdline == NULL) {
+              ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+              goto out;
+            }
+            avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
+            new_cmdline[orig_size] = ' ';
+            avb_memcpy(new_cmdline + orig_size + 1,
+                       kernel_cmdline,
+                       kernel_cmdline_desc.kernel_cmdline_length);
+            avb_free(slot_data->cmdline);
+            slot_data->cmdline = new_cmdline;
+          }
+        }
+      } break;
+
+      /* Explicit fall-through */
+      case AVB_DESCRIPTOR_TAG_PROPERTY:
+      case AVB_DESCRIPTOR_TAG_HASHTREE:
+        /* Do nothing. */
+        break;
+    }
+  }
+
+  if (rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
+    avb_errorv(
+        full_partition_name, ": Invalid rollback_index_location.\n", NULL);
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+    goto out;
+  }
+
+  slot_data->rollback_indexes[rollback_index_location] =
+      vbmeta_header.rollback_index;
+
+  if (out_algorithm_type != NULL) {
+    *out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
+  }
+
+out:
+  /* If |vbmeta_image_data| isn't NULL it means that it adopted
+   * |vbmeta_buf| so in that case don't free it here.
+   */
+  if (vbmeta_image_data == NULL) {
+    if (vbmeta_buf != NULL) {
+      avb_free(vbmeta_buf);
+    }
+  }
+  if (descriptors != NULL) {
+    avb_free(descriptors);
+  }
+  return ret;
+}
+
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data) {
+  AvbSlotVerifyResult ret;
+  AvbSlotVerifyData* slot_data = NULL;
+  AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_NONE;
+  bool using_boot_for_vbmeta = false;
+  AvbVBMetaImageHeader toplevel_vbmeta;
+  bool allow_verification_error =
+      (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+
+  /* Fail early if we're missing the AvbOps needed for slot verification.
+   *
+   * For now, handle get_size_of_partition() not being implemented. In
+   * a later release we may change that.
+   */
+  avb_assert(ops->read_is_device_unlocked != NULL);
+  avb_assert(ops->read_from_partition != NULL);
+  avb_assert(ops->validate_vbmeta_public_key != NULL);
+  avb_assert(ops->read_rollback_index != NULL);
+  avb_assert(ops->get_unique_guid_for_partition != NULL);
+
+  if (out_data != NULL) {
+    *out_data = NULL;
+  }
+
+  /* Allowing dm-verity errors defeats the purpose of verified boot so
+   * only allow this if set up to allow verification errors
+   * (e.g. typically only UNLOCKED mode).
+   */
+  if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
+      !allow_verification_error) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+    goto fail;
+  }
+
+  slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
+  if (slot_data == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+  slot_data->vbmeta_images =
+      avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
+  if (slot_data->vbmeta_images == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+  slot_data->loaded_partitions =
+      avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
+  if (slot_data->loaded_partitions == NULL) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto fail;
+  }
+
+  ret = load_and_verify_vbmeta(ops,
+                               requested_partitions,
+                               ab_suffix,
+                               allow_verification_error,
+                               0 /* toplevel_vbmeta_flags */,
+                               0 /* rollback_index_location */,
+                               "vbmeta",
+                               avb_strlen("vbmeta"),
+                               NULL /* expected_public_key */,
+                               0 /* expected_public_key_length */,
+                               slot_data,
+                               &algorithm_type);
+  if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
+    goto fail;
+  }
+
+  /* If things check out, mangle the kernel command-line as needed. */
+  if (result_should_continue(ret)) {
+    if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
+      avb_assert(
+          avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
+      using_boot_for_vbmeta = true;
+    }
+
+    /* Byteswap top-level vbmeta header since we'll need it below. */
+    avb_vbmeta_image_header_to_host_byte_order(
+        (const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
+        &toplevel_vbmeta);
+
+    /* Fill in |ab_suffix| field. */
+    slot_data->ab_suffix = avb_strdup(ab_suffix);
+    if (slot_data->ab_suffix == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto fail;
+    }
+
+    /* If verification is disabled, we are done ... we specifically
+     * don't want to add any androidboot.* options since verification
+     * is disabled.
+     */
+    if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+      /* Since verification is disabled we didn't process any
+       * descriptors and thus there's no cmdline... so set root= such
+       * that the system partition is mounted.
+       */
+      avb_assert(slot_data->cmdline == NULL);
+      slot_data->cmdline =
+          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
+      if (slot_data->cmdline == NULL) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto fail;
+      }
+    } else {
+      /* Add options - any failure in avb_append_options() is either an
+       * I/O or OOM error.
+       */
+      AvbSlotVerifyResult sub_ret = avb_append_options(
+          ops, slot_data, &toplevel_vbmeta, algorithm_type,
+          hashtree_error_mode);
+      if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+        ret = sub_ret;
+        goto fail;
+      }
+    }
+
+    /* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
+    if (slot_data->cmdline != NULL) {
+      char* new_cmdline;
+      new_cmdline = avb_sub_cmdline(
+          ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
+      if (new_cmdline != slot_data->cmdline) {
+        if (new_cmdline == NULL) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+          goto fail;
+        }
+        avb_free(slot_data->cmdline);
+        slot_data->cmdline = new_cmdline;
+      }
+    }
+
+    if (out_data != NULL) {
+      *out_data = slot_data;
+    } else {
+      avb_slot_verify_data_free(slot_data);
+    }
+  }
+
+  if (!allow_verification_error) {
+    avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
+  }
+
+  return ret;
+
+fail:
+  if (slot_data != NULL) {
+    avb_slot_verify_data_free(slot_data);
+  }
+  return ret;
+}
+
+void avb_slot_verify_data_free(AvbSlotVerifyData* data) {
+  if (data->ab_suffix != NULL) {
+    avb_free(data->ab_suffix);
+  }
+  if (data->cmdline != NULL) {
+    avb_free(data->cmdline);
+  }
+  if (data->vbmeta_images != NULL) {
+    size_t n;
+    for (n = 0; n < data->num_vbmeta_images; n++) {
+      AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
+      if (vbmeta_image->partition_name != NULL) {
+        avb_free(vbmeta_image->partition_name);
+      }
+      if (vbmeta_image->vbmeta_data != NULL) {
+        avb_free(vbmeta_image->vbmeta_data);
+      }
+    }
+    avb_free(data->vbmeta_images);
+  }
+  if (data->loaded_partitions != NULL) {
+    size_t n;
+    for (n = 0; n < data->num_loaded_partitions; n++) {
+      AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
+      if (loaded_partition->partition_name != NULL) {
+        avb_free(loaded_partition->partition_name);
+      }
+      if (loaded_partition->data != NULL && !loaded_partition->preloaded) {
+        avb_free(loaded_partition->data);
+      }
+    }
+    avb_free(data->loaded_partitions);
+  }
+  avb_free(data);
+}
+
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_SLOT_VERIFY_RESULT_OK:
+      ret = "OK";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+      ret = "ERROR_OOM";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+      ret = "ERROR_IO";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+      ret = "ERROR_VERIFICATION";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+      ret = "ERROR_ROLLBACK_INDEX";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+      ret = "ERROR_PUBLIC_KEY_REJECTED";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+      ret = "ERROR_INVALID_METADATA";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+      ret = "ERROR_UNSUPPORTED_VERSION";
+      break;
+    case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+      ret = "ERROR_INVALID_ARGUMENT";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbSlotVerifyResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_sysdeps_posix.c b/lib/avb/libavb/avb_sysdeps_posix.c
similarity index 91%
rename from lib/avb/rk_libavb/avb_sysdeps_posix.c
rename to lib/avb/libavb/avb_sysdeps_posix.c
index 562f9214be..9df018f7c8 100644
--- a/lib/avb/rk_libavb/avb_sysdeps_posix.c
+++ b/lib/avb/libavb/avb_sysdeps_posix.c
@@ -1,82 +1,87 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-//#include <bits/endian.h>
-#include <common.h>
-#include <stdarg.h>
-#include <stdlib.h>
-#include <malloc.h>
-#include <errno.h>
-#include <asm/io.h>
-
-#include <android_avb/avb_sysdeps.h>
-
-void abort(void);
-
-int avb_memcmp(const void* src1, const void* src2, size_t n) {
-  return memcmp(src1, src2, n);
-}
-
-void* avb_memcpy(void* dest, const void* src, size_t n) {
-  return memcpy(dest, src, n);
-}
-
-void* avb_memset(void* dest, const int c, size_t n) {
-  return memset(dest, c, n);
-}
-
-int avb_strcmp(const char* s1, const char* s2) {
-  return strcmp(s1, s2);
-}
-
-size_t avb_strlen(const char* str) {
-  return strlen(str);
-}
-
-void avb_abort(void) {
-  abort();
-}
-
-void avb_print(const char* message) {
-  fprintf(stderr, "%s", message);
-}
-
-void avb_printv(const char* message, ...) {
-  va_list ap;
-  const char* m;
-
-  va_start(ap, message);
-  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
-    fprintf(stderr, "%s", m);
-  }
-  va_end(ap);
-}
-
-void* avb_malloc_(size_t size) {
-  return malloc(size);
-}
-
-void avb_free(void* ptr) {
-  free(ptr);
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#include <android_avb/avb_sysdeps.h>
+
+void abort(void);
+
+int avb_memcmp(const void* src1, const void* src2, size_t n) {
+  return memcmp(src1, src2, n);
+}
+
+void* avb_memcpy(void* dest, const void* src, size_t n) {
+  return memcpy(dest, src, n);
+}
+
+void* avb_memset(void* dest, const int c, size_t n) {
+  return memset(dest, c, n);
+}
+
+int avb_strcmp(const char* s1, const char* s2) {
+  return strcmp(s1, s2);
+}
+
+size_t avb_strlen(const char* str) {
+  return strlen(str);
+}
+
+void avb_abort(void) {
+  abort();
+}
+
+void avb_print(const char* message) {
+  fprintf(stderr, "%s", message);
+}
+
+void avb_printv(const char* message, ...) {
+  va_list ap;
+  const char* m;
+
+  va_start(ap, message);
+  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
+    fprintf(stderr, "%s", m);
+  }
+  va_end(ap);
+}
+
+void* avb_malloc_(size_t size) {
+  return malloc(size);
+}
+
+void avb_free(void* ptr) {
+  free(ptr);
+}
+
+uint32_t avb_div_by_10(uint64_t* dividend) {
+  uint32_t rem = (uint32_t)(*dividend % 10);
+  *dividend /= 10;
+  return rem;
+}
diff --git a/lib/avb/rk_libavb/avb_util.c b/lib/avb/libavb/avb_util.c
similarity index 95%
rename from lib/avb/rk_libavb/avb_util.c
rename to lib/avb/libavb/avb_util.c
index f18267a89e..434cb39e2b 100644
--- a/lib/avb/rk_libavb/avb_util.c
+++ b/lib/avb/libavb/avb_util.c
@@ -1,404 +1,403 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_util.h>
-#include <malloc.h>
-#include <stdarg.h>
-
-uint32_t avb_be32toh(uint32_t in) {
-  uint8_t* d = (uint8_t*)&in;
-  uint32_t ret;
-  ret = ((uint32_t)d[0]) << 24;
-  ret |= ((uint32_t)d[1]) << 16;
-  ret |= ((uint32_t)d[2]) << 8;
-  ret |= ((uint32_t)d[3]);
-  return ret;
-}
-
-uint64_t avb_be64toh(uint64_t in) {
-  uint8_t* d = (uint8_t*)&in;
-  uint64_t ret;
-  ret = ((uint64_t)d[0]) << 56;
-  ret |= ((uint64_t)d[1]) << 48;
-  ret |= ((uint64_t)d[2]) << 40;
-  ret |= ((uint64_t)d[3]) << 32;
-  ret |= ((uint64_t)d[4]) << 24;
-  ret |= ((uint64_t)d[5]) << 16;
-  ret |= ((uint64_t)d[6]) << 8;
-  ret |= ((uint64_t)d[7]);
-  return ret;
-}
-
-/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
-uint32_t avb_htobe32(uint32_t in) {
-  union {
-    uint32_t word;
-    uint8_t bytes[4];
-  } ret;
-  ret.bytes[0] = (in >> 24) & 0xff;
-  ret.bytes[1] = (in >> 16) & 0xff;
-  ret.bytes[2] = (in >> 8) & 0xff;
-  ret.bytes[3] = in & 0xff;
-  return ret.word;
-}
-
-/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
-uint64_t avb_htobe64(uint64_t in) {
-  union {
-    uint64_t word;
-    uint8_t bytes[8];
-  } ret;
-  ret.bytes[0] = (in >> 56) & 0xff;
-  ret.bytes[1] = (in >> 48) & 0xff;
-  ret.bytes[2] = (in >> 40) & 0xff;
-  ret.bytes[3] = (in >> 32) & 0xff;
-  ret.bytes[4] = (in >> 24) & 0xff;
-  ret.bytes[5] = (in >> 16) & 0xff;
-  ret.bytes[6] = (in >> 8) & 0xff;
-  ret.bytes[7] = in & 0xff;
-  return ret.word;
-}
-
-int avb_safe_memcmp(const void* s1, const void* s2, size_t n) {
-  const unsigned char* us1 = s1;
-  const unsigned char* us2 = s2;
-  int result = 0;
-
-  if (0 == n) {
-    return 0;
-  }
-
-  /*
-   * Code snippet without data-dependent branch due to Nate Lawson
-   * (nate@root.org) of Root Labs.
-   */
-  while (n--) {
-    result |= *us1++ ^ *us2++;
-  }
-
-  return result != 0;
-}
-
-bool avb_safe_add_to(uint64_t* value, uint64_t value_to_add) {
-  uint64_t original_value;
-
-  avb_assert(value != NULL);
-
-  original_value = *value;
-
-  *value += value_to_add;
-  if (*value < original_value) {
-    avb_error("Overflow when adding values.\n");
-    return false;
-  }
-
-  return true;
-}
-
-bool avb_safe_add(uint64_t* out_result, uint64_t a, uint64_t b) {
-  uint64_t dummy;
-  if (out_result == NULL) {
-    out_result = &dummy;
-  }
-  *out_result = a;
-  return avb_safe_add_to(out_result, b);
-}
-
-bool avb_validate_utf8(const uint8_t* data, size_t num_bytes) {
-  size_t n;
-  unsigned int num_cc;
-
-  for (n = 0, num_cc = 0; n < num_bytes; n++) {
-    uint8_t c = data[n];
-
-    if (num_cc > 0) {
-      if ((c & (0x80 | 0x40)) == 0x80) {
-        /* 10xx xxxx */
-      } else {
-        goto fail;
-      }
-      num_cc--;
-    } else {
-      if (c < 0x80) {
-        num_cc = 0;
-      } else if ((c & (0x80 | 0x40 | 0x20)) == (0x80 | 0x40)) {
-        /* 110x xxxx */
-        num_cc = 1;
-      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10)) == (0x80 | 0x40 | 0x20)) {
-        /* 1110 xxxx */
-        num_cc = 2;
-      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10 | 0x08)) ==
-                 (0x80 | 0x40 | 0x20 | 0x10)) {
-        /* 1111 0xxx */
-        num_cc = 3;
-      } else {
-        goto fail;
-      }
-    }
-  }
-
-  if (num_cc != 0) {
-    goto fail;
-  }
-
-  return true;
-
-fail:
-  return false;
-}
-
-bool avb_str_concat(char* buf,
-                    size_t buf_size,
-                    const char* str1,
-                    size_t str1_len,
-                    const char* str2,
-                    size_t str2_len) {
-  uint64_t combined_len;
-
-  if (!avb_safe_add(&combined_len, str1_len, str2_len)) {
-    avb_error("Overflow when adding string sizes.\n");
-    return false;
-  }
-
-  if (combined_len > buf_size - 1) {
-    avb_error("Insufficient buffer space.\n");
-    return false;
-  }
-
-  avb_memcpy(buf, str1, str1_len);
-  avb_memcpy(buf + str1_len, str2, str2_len);
-  buf[combined_len] = '\0';
-
-  return true;
-}
-
-void* avb_malloc(size_t size) {
-  void* ret = avb_malloc_(size);
-  if (ret == NULL) {
-    avb_error("Failed to allocate memory.\n");
-    return NULL;
-  }
-  return ret;
-}
-
-void* avb_calloc(size_t size) {
-  void* ret = avb_malloc(size);
-  if (ret == NULL) {
-    return NULL;
-  }
-
-  avb_memset(ret, '\0', size);
-  return ret;
-}
-
-char* avb_strdup(const char* str) {
-  size_t len = avb_strlen(str);
-  char* ret = avb_malloc(len + 1);
-  if (ret == NULL) {
-    return NULL;
-  }
-
-  avb_memcpy(ret, str, len);
-  ret[len] = '\0';
-
-  return ret;
-}
-
-const char* avb_strstr(const char* haystack, const char* needle) {
-  size_t n, m;
-
-  /* Look through |haystack| and check if the first character of
-   * |needle| matches. If so, check the rest of |needle|.
-   */
-  for (n = 0; haystack[n] != '\0'; n++) {
-    if (haystack[n] != needle[0]) {
-      continue;
-    }
-
-    for (m = 1;; m++) {
-      if (needle[m] == '\0') {
-        return haystack + n;
-      }
-
-      if (haystack[n + m] != needle[m]) {
-        break;
-      }
-    }
-  }
-
-  return NULL;
-}
-
-const char* avb_strv_find_str(const char* const* strings,
-                              const char* str,
-                              size_t str_size) {
-  size_t n;
-  for (n = 0; strings[n] != NULL; n++) {
-    if (avb_strlen(strings[n]) == str_size &&
-        avb_memcmp(strings[n], str, str_size) == 0) {
-      return strings[n];
-    }
-  }
-  return NULL;
-}
-
-char* avb_replace(const char* str, const char* search, const char* replace) {
-  char* ret = NULL;
-  size_t ret_len = 0;
-  size_t search_len, replace_len;
-  const char* str_after_last_replace;
-
-  search_len = avb_strlen(search);
-  replace_len = avb_strlen(replace);
-
-  str_after_last_replace = str;
-  while (*str != '\0') {
-    const char* s;
-    size_t num_before;
-    size_t num_new;
-
-    s = avb_strstr(str, search);
-    if (s == NULL) {
-      break;
-    }
-
-    num_before = s - str;
-
-    if (ret == NULL) {
-      num_new = num_before + replace_len + 1;
-      ret = avb_malloc(num_new);
-      if (ret == NULL) {
-        goto out;
-      }
-      avb_memcpy(ret, str, num_before);
-      avb_memcpy(ret + num_before, replace, replace_len);
-      ret[num_new - 1] = '\0';
-      ret_len = num_new - 1;
-    } else {
-      char* new_str;
-      num_new = ret_len + num_before + replace_len + 1;
-      new_str = avb_malloc(num_new);
-      if (ret == NULL) {
-        goto out;
-      }
-      avb_memcpy(new_str, ret, ret_len);
-      avb_memcpy(new_str + ret_len, str, num_before);
-      avb_memcpy(new_str + ret_len + num_before, replace, replace_len);
-      new_str[num_new - 1] = '\0';
-      avb_free(ret);
-      ret = new_str;
-      ret_len = num_new - 1;
-    }
-
-    str = s + search_len;
-    str_after_last_replace = str;
-  }
-
-  if (ret == NULL) {
-    ret = avb_strdup(str_after_last_replace);
-    if (ret == NULL) {
-      goto out;
-    }
-  } else {
-    size_t num_remaining = avb_strlen(str_after_last_replace);
-    size_t num_new = ret_len + num_remaining + 1;
-    char* new_str = avb_malloc(num_new);
-    if (ret == NULL) {
-      goto out;
-    }
-    avb_memcpy(new_str, ret, ret_len);
-    avb_memcpy(new_str + ret_len, str_after_last_replace, num_remaining);
-    new_str[num_new - 1] = '\0';
-    avb_free(ret);
-    ret = new_str;
-    ret_len = num_new - 1;
-  }
-
-out:
-  return ret;
-}
-
-/* We only support a limited amount of strings in avb_strdupv(). */
-#define AVB_STRDUPV_MAX_NUM_STRINGS 32
-
-char* avb_strdupv(const char* str, ...) {
-  va_list ap;
-  const char* strings[AVB_STRDUPV_MAX_NUM_STRINGS];
-  size_t lengths[AVB_STRDUPV_MAX_NUM_STRINGS];
-  size_t num_strings, n;
-  uint64_t total_length;
-  char *ret = NULL, *dest;
-
-  num_strings = 0;
-  total_length = 0;
-  va_start(ap, str);
-  do {
-    size_t str_len = avb_strlen(str);
-    strings[num_strings] = str;
-    lengths[num_strings] = str_len;
-    if (!avb_safe_add_to(&total_length, str_len)) {
-      avb_fatal("Overflow while determining total length.\n");
-      break;
-    }
-    num_strings++;
-    if (num_strings == AVB_STRDUPV_MAX_NUM_STRINGS) {
-      avb_fatal("Too many strings passed.\n");
-      break;
-    }
-    str = va_arg(ap, const char*);
-  } while (str != NULL);
-  va_end(ap);
-
-  ret = avb_malloc(total_length + 1);
-  if (ret == NULL) {
-    goto out;
-  }
-
-  dest = ret;
-  for (n = 0; n < num_strings; n++) {
-    avb_memcpy(dest, strings[n], lengths[n]);
-    dest += lengths[n];
-  }
-  *dest = '\0';
-  avb_assert(dest == ret + total_length);
-
-out:
-  return ret;
-}
-
-const char* avb_basename(const char* str) {
-  int64_t n;
-  size_t len;
-
-  len = avb_strlen(str);
-  if (len >= 2) {
-    for (n = len - 2; n >= 0; n--) {
-      if (str[n] == '/') {
-        return str + n + 1;
-      }
-    }
-  }
-  return str;
-}
-
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_util.h>
+
+#include <stdarg.h>
+
+uint32_t avb_be32toh(uint32_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint32_t ret;
+  ret = ((uint32_t)d[0]) << 24;
+  ret |= ((uint32_t)d[1]) << 16;
+  ret |= ((uint32_t)d[2]) << 8;
+  ret |= ((uint32_t)d[3]);
+  return ret;
+}
+
+uint64_t avb_be64toh(uint64_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint64_t ret;
+  ret = ((uint64_t)d[0]) << 56;
+  ret |= ((uint64_t)d[1]) << 48;
+  ret |= ((uint64_t)d[2]) << 40;
+  ret |= ((uint64_t)d[3]) << 32;
+  ret |= ((uint64_t)d[4]) << 24;
+  ret |= ((uint64_t)d[5]) << 16;
+  ret |= ((uint64_t)d[6]) << 8;
+  ret |= ((uint64_t)d[7]);
+  return ret;
+}
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) {
+  union {
+    uint32_t word;
+    uint8_t bytes[4];
+  } ret;
+  ret.bytes[0] = (in >> 24) & 0xff;
+  ret.bytes[1] = (in >> 16) & 0xff;
+  ret.bytes[2] = (in >> 8) & 0xff;
+  ret.bytes[3] = in & 0xff;
+  return ret.word;
+}
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) {
+  union {
+    uint64_t word;
+    uint8_t bytes[8];
+  } ret;
+  ret.bytes[0] = (in >> 56) & 0xff;
+  ret.bytes[1] = (in >> 48) & 0xff;
+  ret.bytes[2] = (in >> 40) & 0xff;
+  ret.bytes[3] = (in >> 32) & 0xff;
+  ret.bytes[4] = (in >> 24) & 0xff;
+  ret.bytes[5] = (in >> 16) & 0xff;
+  ret.bytes[6] = (in >> 8) & 0xff;
+  ret.bytes[7] = in & 0xff;
+  return ret.word;
+}
+
+int avb_safe_memcmp(const void* s1, const void* s2, size_t n) {
+  const unsigned char* us1 = s1;
+  const unsigned char* us2 = s2;
+  int result = 0;
+
+  if (0 == n) {
+    return 0;
+  }
+
+  /*
+   * Code snippet without data-dependent branch due to Nate Lawson
+   * (nate@root.org) of Root Labs.
+   */
+  while (n--) {
+    result |= *us1++ ^ *us2++;
+  }
+
+  return result != 0;
+}
+
+bool avb_safe_add_to(uint64_t* value, uint64_t value_to_add) {
+  uint64_t original_value;
+
+  avb_assert(value != NULL);
+
+  original_value = *value;
+
+  *value += value_to_add;
+  if (*value < original_value) {
+    avb_error("Overflow when adding values.\n");
+    return false;
+  }
+
+  return true;
+}
+
+bool avb_safe_add(uint64_t* out_result, uint64_t a, uint64_t b) {
+  uint64_t dummy;
+  if (out_result == NULL) {
+    out_result = &dummy;
+  }
+  *out_result = a;
+  return avb_safe_add_to(out_result, b);
+}
+
+bool avb_validate_utf8(const uint8_t* data, size_t num_bytes) {
+  size_t n;
+  unsigned int num_cc;
+
+  for (n = 0, num_cc = 0; n < num_bytes; n++) {
+    uint8_t c = data[n];
+
+    if (num_cc > 0) {
+      if ((c & (0x80 | 0x40)) == 0x80) {
+        /* 10xx xxxx */
+      } else {
+        goto fail;
+      }
+      num_cc--;
+    } else {
+      if (c < 0x80) {
+        num_cc = 0;
+      } else if ((c & (0x80 | 0x40 | 0x20)) == (0x80 | 0x40)) {
+        /* 110x xxxx */
+        num_cc = 1;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10)) == (0x80 | 0x40 | 0x20)) {
+        /* 1110 xxxx */
+        num_cc = 2;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10 | 0x08)) ==
+                 (0x80 | 0x40 | 0x20 | 0x10)) {
+        /* 1111 0xxx */
+        num_cc = 3;
+      } else {
+        goto fail;
+      }
+    }
+  }
+
+  if (num_cc != 0) {
+    goto fail;
+  }
+
+  return true;
+
+fail:
+  return false;
+}
+
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len) {
+  uint64_t combined_len;
+
+  if (!avb_safe_add(&combined_len, str1_len, str2_len)) {
+    avb_error("Overflow when adding string sizes.\n");
+    return false;
+  }
+
+  if (combined_len > buf_size - 1) {
+    avb_error("Insufficient buffer space.\n");
+    return false;
+  }
+
+  avb_memcpy(buf, str1, str1_len);
+  avb_memcpy(buf + str1_len, str2, str2_len);
+  buf[combined_len] = '\0';
+
+  return true;
+}
+
+void* avb_malloc(size_t size) {
+  void* ret = avb_malloc_(size);
+  if (ret == NULL) {
+    avb_error("Failed to allocate memory.\n");
+    return NULL;
+  }
+  return ret;
+}
+
+void* avb_calloc(size_t size) {
+  void* ret = avb_malloc(size);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memset(ret, '\0', size);
+  return ret;
+}
+
+char* avb_strdup(const char* str) {
+  size_t len = avb_strlen(str);
+  char* ret = avb_malloc(len + 1);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memcpy(ret, str, len);
+  ret[len] = '\0';
+
+  return ret;
+}
+
+const char* avb_strstr(const char* haystack, const char* needle) {
+  size_t n, m;
+
+  /* Look through |haystack| and check if the first character of
+   * |needle| matches. If so, check the rest of |needle|.
+   */
+  for (n = 0; haystack[n] != '\0'; n++) {
+    if (haystack[n] != needle[0]) {
+      continue;
+    }
+
+    for (m = 1;; m++) {
+      if (needle[m] == '\0') {
+        return haystack + n;
+      }
+
+      if (haystack[n + m] != needle[m]) {
+        break;
+      }
+    }
+  }
+
+  return NULL;
+}
+
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size) {
+  size_t n;
+  for (n = 0; strings[n] != NULL; n++) {
+    if (avb_strlen(strings[n]) == str_size &&
+        avb_memcmp(strings[n], str, str_size) == 0) {
+      return strings[n];
+    }
+  }
+  return NULL;
+}
+
+char* avb_replace(const char* str, const char* search, const char* replace) {
+  char* ret = NULL;
+  size_t ret_len = 0;
+  size_t search_len, replace_len;
+  const char* str_after_last_replace;
+
+  search_len = avb_strlen(search);
+  replace_len = avb_strlen(replace);
+
+  str_after_last_replace = str;
+  while (*str != '\0') {
+    const char* s;
+    size_t num_before;
+    size_t num_new;
+
+    s = avb_strstr(str, search);
+    if (s == NULL) {
+      break;
+    }
+
+    num_before = s - str;
+
+    if (ret == NULL) {
+      num_new = num_before + replace_len + 1;
+      ret = avb_malloc(num_new);
+      if (ret == NULL) {
+        goto out;
+      }
+      avb_memcpy(ret, str, num_before);
+      avb_memcpy(ret + num_before, replace, replace_len);
+      ret[num_new - 1] = '\0';
+      ret_len = num_new - 1;
+    } else {
+      char* new_str;
+      num_new = ret_len + num_before + replace_len + 1;
+      new_str = avb_malloc(num_new);
+      if (new_str == NULL) {
+        goto out;
+      }
+      avb_memcpy(new_str, ret, ret_len);
+      avb_memcpy(new_str + ret_len, str, num_before);
+      avb_memcpy(new_str + ret_len + num_before, replace, replace_len);
+      new_str[num_new - 1] = '\0';
+      avb_free(ret);
+      ret = new_str;
+      ret_len = num_new - 1;
+    }
+
+    str = s + search_len;
+    str_after_last_replace = str;
+  }
+
+  if (ret == NULL) {
+    ret = avb_strdup(str_after_last_replace);
+    if (ret == NULL) {
+      goto out;
+    }
+  } else {
+    size_t num_remaining = avb_strlen(str_after_last_replace);
+    size_t num_new = ret_len + num_remaining + 1;
+    char* new_str = avb_malloc(num_new);
+    if (new_str == NULL) {
+      goto out;
+    }
+    avb_memcpy(new_str, ret, ret_len);
+    avb_memcpy(new_str + ret_len, str_after_last_replace, num_remaining);
+    new_str[num_new - 1] = '\0';
+    avb_free(ret);
+    ret = new_str;
+    ret_len = num_new - 1;
+  }
+
+out:
+  return ret;
+}
+
+/* We only support a limited amount of strings in avb_strdupv(). */
+#define AVB_STRDUPV_MAX_NUM_STRINGS 32
+
+char* avb_strdupv(const char* str, ...) {
+  va_list ap;
+  const char* strings[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t lengths[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t num_strings, n;
+  uint64_t total_length;
+  char *ret = NULL, *dest;
+
+  num_strings = 0;
+  total_length = 0;
+  va_start(ap, str);
+  do {
+    size_t str_len = avb_strlen(str);
+    strings[num_strings] = str;
+    lengths[num_strings] = str_len;
+    if (!avb_safe_add_to(&total_length, str_len)) {
+      avb_fatal("Overflow while determining total length.\n");
+      break;
+    }
+    num_strings++;
+    if (num_strings == AVB_STRDUPV_MAX_NUM_STRINGS) {
+      avb_fatal("Too many strings passed.\n");
+      break;
+    }
+    str = va_arg(ap, const char*);
+  } while (str != NULL);
+  va_end(ap);
+
+  ret = avb_malloc(total_length + 1);
+  if (ret == NULL) {
+    goto out;
+  }
+
+  dest = ret;
+  for (n = 0; n < num_strings; n++) {
+    avb_memcpy(dest, strings[n], lengths[n]);
+    dest += lengths[n];
+  }
+  *dest = '\0';
+  avb_assert(dest == ret + total_length);
+
+out:
+  return ret;
+}
+
+const char* avb_basename(const char* str) {
+  int64_t n;
+  size_t len;
+
+  len = avb_strlen(str);
+  if (len >= 2) {
+    for (n = len - 2; n >= 0; n--) {
+      if (str[n] == '/') {
+        return str + n + 1;
+      }
+    }
+  }
+  return str;
+}
diff --git a/lib/avb/libavb/avb_vbmeta_image.c b/lib/avb/libavb/avb_vbmeta_image.c
new file mode 100644
index 0000000000..3f6d33e90b
--- /dev/null
+++ b/lib/avb/libavb/avb_vbmeta_image.c
@@ -0,0 +1,308 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length) {
+  AvbVBMetaVerifyResult ret;
+  AvbVBMetaImageHeader h;
+  uint8_t* computed_hash;
+  const AvbAlgorithmData* algorithm;
+  AvbSHA256Ctx sha256_ctx;
+  AvbSHA512Ctx sha512_ctx;
+  const uint8_t* header_block;
+  const uint8_t* authentication_block;
+  const uint8_t* auxiliary_block;
+  int verification_result;
+
+  ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
+
+  if (out_public_key_data != NULL) {
+    *out_public_key_data = NULL;
+  }
+  if (out_public_key_length != NULL) {
+    *out_public_key_length = 0;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  /* Before we byteswap, ensure length is long enough. */
+  if (length < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+  avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
+                                             &h);
+
+  /* Ensure we don't attempt to access any fields if we do not meet
+   * the specified minimum version of libavb.
+   */
+  if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
+      (h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
+    avb_error("Mismatch between image version and libavb version.\n");
+    ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
+    goto out;
+  }
+
+  /* Ensure |release_string| ends with a NUL byte. */
+  if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
+    avb_error("Release string does not end with a NUL byte.\n");
+    goto out;
+  }
+
+  /* Ensure inner block sizes are multiple of 64. */
+  if ((h.authentication_data_block_size & 0x3f) != 0 ||
+      (h.auxiliary_data_block_size & 0x3f) != 0) {
+    avb_error("Block size is not a multiple of 64.\n");
+    goto out;
+  }
+
+  /* Ensure block sizes all add up to at most |length|. */
+  uint64_t block_total = sizeof(AvbVBMetaImageHeader);
+  if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
+      !avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
+    avb_error("Overflow while computing size of boot image.\n");
+    goto out;
+  }
+  if (block_total > length) {
+    avb_error("Block sizes add up to more than given length.\n");
+    goto out;
+  }
+
+  uintptr_t data_ptr = (uintptr_t)data;
+  /* Ensure passed in memory doesn't wrap. */
+  if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
+    avb_error("Boot image location and length mismatch.\n");
+    goto out;
+  }
+
+  /* Ensure hash and signature are entirely in the Authentication data block. */
+  uint64_t hash_end;
+  if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
+      hash_end > h.authentication_data_block_size) {
+    avb_error("Hash is not entirely in its block.\n");
+    goto out;
+  }
+  uint64_t signature_end;
+  if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
+      signature_end > h.authentication_data_block_size) {
+    avb_error("Signature is not entirely in its block.\n");
+    goto out;
+  }
+
+  /* Ensure public key is entirely in the Auxiliary data block. */
+  uint64_t pubkey_end;
+  if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
+      pubkey_end > h.auxiliary_data_block_size) {
+    avb_error("Public key is not entirely in its block.\n");
+    goto out;
+  }
+
+  /* Ensure public key metadata (if set) is entirely in the Auxiliary
+   * data block. */
+  if (h.public_key_metadata_size > 0) {
+    uint64_t pubkey_md_end;
+    if (!avb_safe_add(&pubkey_md_end,
+                      h.public_key_metadata_offset,
+                      h.public_key_metadata_size) ||
+        pubkey_md_end > h.auxiliary_data_block_size) {
+      avb_error("Public key metadata is not entirely in its block.\n");
+      goto out;
+    }
+  }
+
+  /* Bail early if there's no hash or signature. */
+  if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
+    ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
+    goto out;
+  }
+
+  /* Ensure algorithm field is supported. */
+  algorithm = avb_get_algorithm_data(h.algorithm_type);
+  if (!algorithm) {
+    avb_error("Invalid or unknown algorithm.\n");
+    goto out;
+  }
+
+  /* Bail if the embedded hash size doesn't match the chosen algorithm. */
+  if (h.hash_size != algorithm->hash_len) {
+    avb_error("Embedded hash has wrong size.\n");
+    goto out;
+  }
+
+  /* No overflow checks needed from here-on after since all block
+   * sizes and offsets have been verified above.
+   */
+
+  header_block = data;
+  authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
+  auxiliary_block = authentication_block + h.authentication_data_block_size;
+
+  switch (h.algorithm_type) {
+    /* Explicit fall-through: */
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
+      avb_sha256_init(&sha256_ctx);
+      avb_sha256_update(
+          &sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+      avb_sha256_update(
+          &sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
+      computed_hash = avb_sha256_final(&sha256_ctx);
+      break;
+    /* Explicit fall-through: */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
+      avb_sha512_init(&sha512_ctx);
+      avb_sha512_update(
+          &sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+      avb_sha512_update(
+          &sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
+      computed_hash = avb_sha512_final(&sha512_ctx);
+      break;
+    default:
+      avb_error("Unknown algorithm.\n");
+      goto out;
+  }
+
+  if (avb_safe_memcmp(authentication_block + h.hash_offset,
+                      computed_hash,
+                      h.hash_size) != 0) {
+    avb_error("Hash does not match!\n");
+    ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
+    goto out;
+  }
+
+  verification_result =
+      avb_rsa_verify(auxiliary_block + h.public_key_offset,
+                     h.public_key_size,
+                     authentication_block + h.signature_offset,
+                     h.signature_size,
+                     authentication_block + h.hash_offset,
+                     h.hash_size,
+                     algorithm->padding,
+                     algorithm->padding_len);
+
+  if (verification_result == 0) {
+    ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
+    goto out;
+  }
+
+  if (h.public_key_size > 0) {
+    if (out_public_key_data != NULL) {
+      *out_public_key_data = auxiliary_block + h.public_key_offset;
+    }
+    if (out_public_key_length != NULL) {
+      *out_public_key_length = h.public_key_size;
+    }
+  }
+
+  ret = AVB_VBMETA_VERIFY_RESULT_OK;
+
+out:
+  return ret;
+}
+
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest) {
+  avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
+
+  dest->required_libavb_version_major =
+      avb_be32toh(dest->required_libavb_version_major);
+  dest->required_libavb_version_minor =
+      avb_be32toh(dest->required_libavb_version_minor);
+
+  dest->authentication_data_block_size =
+      avb_be64toh(dest->authentication_data_block_size);
+  dest->auxiliary_data_block_size =
+      avb_be64toh(dest->auxiliary_data_block_size);
+
+  dest->algorithm_type = avb_be32toh(dest->algorithm_type);
+
+  dest->hash_offset = avb_be64toh(dest->hash_offset);
+  dest->hash_size = avb_be64toh(dest->hash_size);
+
+  dest->signature_offset = avb_be64toh(dest->signature_offset);
+  dest->signature_size = avb_be64toh(dest->signature_size);
+
+  dest->public_key_offset = avb_be64toh(dest->public_key_offset);
+  dest->public_key_size = avb_be64toh(dest->public_key_size);
+
+  dest->public_key_metadata_offset =
+      avb_be64toh(dest->public_key_metadata_offset);
+  dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
+
+  dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
+  dest->descriptors_size = avb_be64toh(dest->descriptors_size);
+
+  dest->rollback_index = avb_be64toh(dest->rollback_index);
+  dest->flags = avb_be32toh(dest->flags);
+}
+
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_VBMETA_VERIFY_RESULT_OK:
+      ret = "OK";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+      ret = "OK_NOT_SIGNED";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+      ret = "INVALID_VBMETA_HEADER";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+      ret = "UNSUPPORTED_VERSION";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+      ret = "HASH_MISMATCH";
+      break;
+    case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+      ret = "SIGNATURE_MISMATCH";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbVBMetaVerifyResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_version.c b/lib/avb/libavb/avb_version.c
similarity index 95%
rename from lib/avb/rk_libavb/avb_version.c
rename to lib/avb/libavb/avb_version.c
index 8137a7201a..915e3c8388 100644
--- a/lib/avb/rk_libavb/avb_version.c
+++ b/lib/avb/libavb/avb_version.c
@@ -1,34 +1,34 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/libavb.h>
-
-#define AVB_QUOTE(str) #str
-#define AVB_EXPAND_AND_QUOTE(str) AVB_QUOTE(str)
-
-/* Keep in sync with get_release_string() in avbtool. */
-const char* avb_version_string(void) {
-  return AVB_EXPAND_AND_QUOTE(AVB_VERSION_MAJOR) "." AVB_EXPAND_AND_QUOTE(
-      AVB_VERSION_MINOR) "." AVB_EXPAND_AND_QUOTE(AVB_VERSION_SUB);
-}
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_version.h>
+
+#define AVB_QUOTE(str) #str
+#define AVB_EXPAND_AND_QUOTE(str) AVB_QUOTE(str)
+
+/* Keep in sync with get_release_string() in avbtool. */
+const char* avb_version_string(void) {
+  return AVB_EXPAND_AND_QUOTE(AVB_VERSION_MAJOR) "." AVB_EXPAND_AND_QUOTE(
+      AVB_VERSION_MINOR) "." AVB_EXPAND_AND_QUOTE(AVB_VERSION_SUB);
+}
diff --git a/lib/avb/rk_libavb_ab/Kconfig b/lib/avb/libavb_ab/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb_ab/Kconfig
rename to lib/avb/libavb_ab/Kconfig
diff --git a/lib/avb/rk_libavb_ab/Makefile b/lib/avb/libavb_ab/Makefile
similarity index 100%
rename from lib/avb/rk_libavb_ab/Makefile
rename to lib/avb/libavb_ab/Makefile
diff --git a/lib/avb/libavb_ab/avb_ab_flow.c b/lib/avb/libavb_ab/avb_ab_flow.c
new file mode 100644
index 0000000000..55f0a04065
--- /dev/null
+++ b/lib/avb/libavb_ab/avb_ab_flow.c
@@ -0,0 +1,531 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_ab_flow.h>
+
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest) {
+  /* Ensure magic is correct. */
+  if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    return false;
+  }
+
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_be32toh(dest->crc32);
+
+  /* Ensure we don't attempt to access any fields if the major version
+   * is not supported.
+   */
+  if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+    avb_error("No support for given major version.\n");
+    return false;
+  }
+
+  /* Bail if CRC32 doesn't match. */
+  if (dest->crc32 !=
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t))) {
+    avb_error("CRC32 does not match.\n");
+    return false;
+  }
+
+  return true;
+}
+
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
+                                         AvbABData* dest) {
+  avb_memcpy(dest, src, sizeof(AvbABData));
+  dest->crc32 = avb_htobe32(
+      avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t)));
+}
+
+void avb_ab_data_init(AvbABData* data) {
+  avb_memset(data, '\0', sizeof(AvbABData));
+  avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+  data->version_major = AVB_AB_MAJOR_VERSION;
+  data->version_minor = AVB_AB_MINOR_VERSION;
+  data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+  data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[0].successful_boot = 0;
+  data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+  data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  data->slots[1].successful_boot = 0;
+}
+
+/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
+ * following the 'struct bootloader_message' field. The struct is
+ * compatible with the guidelines in bootable/recovery/bootloader.h -
+ * e.g. it is stored in the |slot_suffix| field, starts with a
+ * NUL-byte, and is 32 bytes long.
+ */
+#define AB_METADATA_MISC_PARTITION_OFFSET 2048
+
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+  size_t num_bytes_read;
+
+  io_ret = ops->read_from_partition(ops,
+                                    "misc",
+                                    AB_METADATA_MISC_PARTITION_OFFSET,
+                                    sizeof(AvbABData),
+                                    &serialized,
+                                    &num_bytes_read);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK ||
+             num_bytes_read != sizeof(AvbABData)) {
+    avb_error("Error reading A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+
+  if (!avb_ab_data_verify_and_byteswap(&serialized, data)) {
+    avb_error(
+        "Error validating A/B metadata from disk. "
+        "Resetting and writing new A/B metadata to disk.\n");
+    avb_ab_data_init(data);
+    return avb_ab_data_write(ab_ops, data);
+  }
+
+  return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbABData serialized;
+  AvbIOResult io_ret;
+
+  avb_ab_data_update_crc_and_byteswap(data, &serialized);
+  io_ret = ops->write_to_partition(ops,
+                                   "misc",
+                                   AB_METADATA_MISC_PARTITION_OFFSET,
+                                   sizeof(AvbABData),
+                                   &serialized);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    return AVB_IO_RESULT_ERROR_OOM;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error writing A/B metadata.\n");
+    return AVB_IO_RESULT_ERROR_IO;
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot) {
+  return slot->priority > 0 &&
+         (slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+static void slot_set_unbootable(AvbABSlotData* slot) {
+  slot->priority = 0;
+  slot->tries_remaining = 0;
+  slot->successful_boot = 0;
+}
+
+/* Ensure all unbootable and/or illegal states are marked as the
+ * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
+ * and successful_boot=0.
+ */
+static void slot_normalize(AvbABSlotData* slot) {
+  if (slot->priority > 0) {
+    if (slot->tries_remaining == 0 && !slot->successful_boot) {
+      /* We've exhausted all tries -> unbootable. */
+      slot_set_unbootable(slot);
+    }
+    if (slot->tries_remaining > 0 && slot->successful_boot) {
+      /* Illegal state - avb_ab_mark_slot_successful() will clear
+       * tries_remaining when setting successful_boot.
+       */
+      slot_set_unbootable(slot);
+    }
+  } else {
+    slot_set_unbootable(slot);
+  }
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+static AvbIOResult load_metadata(AvbABOps* ab_ops,
+                                 AvbABData* ab_data,
+                                 AvbABData* ab_data_orig) {
+  AvbIOResult io_ret;
+
+  io_ret = ab_ops->read_ab_metadata(ab_ops, ab_data);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("I/O error while loading A/B metadata.\n");
+    return io_ret;
+  }
+  *ab_data_orig = *ab_data;
+
+  /* Ensure data is normalized, e.g. illegal states will be marked as
+   * unbootable and all unbootable states are represented with
+   * (priority=0, tries_remaining=0, successful_boot=0).
+   */
+  slot_normalize(&ab_data->slots[0]);
+  slot_normalize(&ab_data->slots[1]);
+  return AVB_IO_RESULT_OK;
+}
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+                                            AvbABData* ab_data,
+                                            AvbABData* ab_data_orig) {
+  if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
+    avb_debug("Writing A/B metadata to disk.\n");
+    return ab_ops->write_ab_metadata(ab_ops, ab_data);
+  }
+  return AVB_IO_RESULT_OK;
+}
+
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data) {
+  AvbOps* ops = ab_ops->ops;
+  AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
+  AvbSlotVerifyData* data = NULL;
+  AvbABFlowResult ret;
+  AvbABData ab_data, ab_data_orig;
+  size_t slot_index_to_boot, n;
+  AvbIOResult io_ret;
+  bool saw_and_allowed_verification_error = false;
+
+  io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    goto out;
+  }
+
+  /* Validate all bootable slots. */
+  for (n = 0; n < 2; n++) {
+    if (slot_is_bootable(&ab_data.slots[n])) {
+      AvbSlotVerifyResult verify_result;
+      bool set_slot_unbootable = false;
+
+      verify_result = avb_slot_verify(ops,
+                                      requested_partitions,
+                                      slot_suffixes[n],
+                                      flags,
+                                      hashtree_error_mode,
+                                      &slot_data[n]);
+      switch (verify_result) {
+        case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+
+        case AVB_SLOT_VERIFY_RESULT_OK:
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+          /* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+           * these mean game over.
+           */
+          set_slot_unbootable = true;
+          break;
+
+        /* explicit fallthrough. */
+        case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+        case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+          if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
+            /* Do nothing since we allow this. */
+            avb_debugv("Allowing slot ",
+                       slot_suffixes[n],
+                       " which verified "
+                       "with result ",
+                       avb_slot_verify_result_to_string(verify_result),
+                       " because "
+                       "AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
+                       "is set.\n",
+                       NULL);
+            saw_and_allowed_verification_error = true;
+          } else {
+            set_slot_unbootable = true;
+          }
+          break;
+
+        case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+          ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
+          goto out;
+          /* Do not add a 'default:' case here because of -Wswitch. */
+      }
+
+      if (set_slot_unbootable) {
+        avb_errorv("Error verifying slot ",
+                   slot_suffixes[n],
+                   " with result ",
+                   avb_slot_verify_result_to_string(verify_result),
+                   " - setting unbootable.\n",
+                   NULL);
+        slot_set_unbootable(&ab_data.slots[n]);
+      }
+    }
+  }
+
+  if (slot_is_bootable(&ab_data.slots[0]) &&
+      slot_is_bootable(&ab_data.slots[1])) {
+    if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+      slot_index_to_boot = 1;
+    } else {
+      slot_index_to_boot = 0;
+    }
+  } else if (slot_is_bootable(&ab_data.slots[0])) {
+    slot_index_to_boot = 0;
+  } else if (slot_is_bootable(&ab_data.slots[1])) {
+    slot_index_to_boot = 1;
+  } else {
+    /* No bootable slots! */
+    avb_error("No bootable slots found.\n");
+    ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+    goto out;
+  }
+
+  /* Update stored rollback index such that the stored rollback index
+   * is the largest value supporting all currently bootable slots. Do
+   * this for every rollback index location.
+   */
+  for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+    uint64_t rollback_index_value = 0;
+
+    if (slot_data[0] != NULL && slot_data[1] != NULL) {
+      uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+      uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+      rollback_index_value =
+          (a_rollback_index < b_rollback_index ? a_rollback_index
+                                               : b_rollback_index);
+    } else if (slot_data[0] != NULL) {
+      rollback_index_value = slot_data[0]->rollback_indexes[n];
+    } else if (slot_data[1] != NULL) {
+      rollback_index_value = slot_data[1]->rollback_indexes[n];
+    }
+
+    if (rollback_index_value != 0) {
+      uint64_t current_rollback_index_value;
+      io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
+      if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+        ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+        goto out;
+      } else if (io_ret != AVB_IO_RESULT_OK) {
+        avb_error("Error getting rollback index for slot.\n");
+        ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+        goto out;
+      }
+      if (current_rollback_index_value != rollback_index_value) {
+        io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
+        if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+          ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+          goto out;
+        } else if (io_ret != AVB_IO_RESULT_OK) {
+          avb_error("Error setting stored rollback index.\n");
+          ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          goto out;
+        }
+      }
+    }
+  }
+
+  /* Finally, select this slot. */
+  avb_assert(slot_data[slot_index_to_boot] != NULL);
+  data = slot_data[slot_index_to_boot];
+  slot_data[slot_index_to_boot] = NULL;
+  if (saw_and_allowed_verification_error) {
+    avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+    ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
+  } else {
+    ret = AVB_AB_FLOW_RESULT_OK;
+  }
+
+  /* ... and decrement tries remaining, if applicable. */
+  if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+      ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+    ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+  }
+
+out:
+  io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  if (io_ret != AVB_IO_RESULT_OK) {
+    if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+      ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+    } else {
+      ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+    }
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+      data = NULL;
+    }
+  }
+
+  for (n = 0; n < 2; n++) {
+    if (slot_data[n] != NULL) {
+      avb_slot_verify_data_free(slot_data[n]);
+    }
+  }
+
+  if (out_data != NULL) {
+    *out_data = data;
+  } else {
+    if (data != NULL) {
+      avb_slot_verify_data_free(data);
+    }
+  }
+
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops,
+                                    unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  unsigned int other_slot_number;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  /* Make requested slot top priority, unsuccessful, and with max tries. */
+  ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
+  ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+  ab_data.slots[slot_number].successful_boot = 0;
+
+  /* Ensure other slot doesn't have as high a priority. */
+  other_slot_number = 1 - slot_number;
+  if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
+    ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
+  }
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  slot_set_unbootable(&ab_data.slots[slot_number]);
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number) {
+  AvbABData ab_data, ab_data_orig;
+  AvbIOResult ret;
+
+  avb_assert(slot_number < 2);
+
+  ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+  if (ret != AVB_IO_RESULT_OK) {
+    goto out;
+  }
+
+  if (!slot_is_bootable(&ab_data.slots[slot_number])) {
+    avb_error("Cannot mark unbootable slot as successful.\n");
+    ret = AVB_IO_RESULT_OK;
+    goto out;
+  }
+
+  ab_data.slots[slot_number].tries_remaining = 0;
+  ab_data.slots[slot_number].successful_boot = 1;
+
+  ret = AVB_IO_RESULT_OK;
+
+out:
+  if (ret == AVB_IO_RESULT_OK) {
+    ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+  }
+  return ret;
+}
+
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result) {
+  const char* ret = NULL;
+
+  switch (result) {
+    case AVB_AB_FLOW_RESULT_OK:
+      ret = "OK";
+      break;
+
+    case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
+      ret = "OK_WITH_VERIFICATION_ERROR";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_OOM:
+      ret = "ERROR_OOM";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_IO:
+      ret = "ERROR_IO";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
+      ret = "ERROR_NO_BOOTABLE_SLOTS";
+      break;
+
+    case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
+      ret = "ERROR_INVALID_ARGUMENT";
+      break;
+      /* Do not add a 'default:' case here because of -Wswitch. */
+  }
+
+  if (ret == NULL) {
+    avb_error("Unknown AvbABFlowResult value.\n");
+    ret = "(unknown)";
+  }
+
+  return ret;
+}
diff --git a/lib/avb/rk_libavb_atx/Kconfig b/lib/avb/libavb_atx/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb_atx/Kconfig
rename to lib/avb/libavb_atx/Kconfig
diff --git a/lib/avb/rk_libavb_atx/Makefile b/lib/avb/libavb_atx/Makefile
similarity index 100%
rename from lib/avb/rk_libavb_atx/Makefile
rename to lib/avb/libavb_atx/Makefile
diff --git a/lib/avb/rk_libavb_atx/avb_atx_validate.c b/lib/avb/libavb_atx/avb_atx_validate.c
similarity index 92%
rename from lib/avb/rk_libavb_atx/avb_atx_validate.c
rename to lib/avb/libavb_atx/avb_atx_validate.c
index 4002038273..e0f205a728 100644
--- a/lib/avb/rk_libavb_atx/avb_atx_validate.c
+++ b/lib/avb/libavb_atx/avb_atx_validate.c
@@ -1,275 +1,256 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_atx_validate.h>
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_sysdeps.h>
-#include <android_avb/avb_util.h>
-#include <optee_include/OpteeClientInterface.h>
-
-/* read permanent attributes from rpmb */
-AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
-				      AvbAtxPermanentAttributes* attributes)
-{
-	if (attributes != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_permanent_attributes((uint8_t *)attributes,
-						 sizeof(struct AvbAtxPermanentAttributes));
-		return AVB_IO_RESULT_OK;
-#endif
-	}
-
-	return -1;
-}
-
-/*read permanent attributes hash from efuse */
-AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
-					   uint8_t hash[AVB_SHA256_DIGEST_SIZE])
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
-		return -1;
-#else
-	avb_error("Please open the macro!\n");
-	return -1;
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-/* Computes the SHA256 |hash| of |length| bytes of |data|. */
-static void sha256(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  AvbSHA256Ctx context;
-  avb_sha256_init(&context);
-  avb_sha256_update(&context, data, length);
-  uint8_t* tmp = avb_sha256_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
-}
-
-/* Computes the SHA512 |hash| of |length| bytes of |data|. */
-static void sha512(const uint8_t* data,
-                   uint32_t length,
-                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
-  AvbSHA512Ctx context;
-  avb_sha512_init(&context);
-  avb_sha512_update(&context, data, length);
-  uint8_t* tmp = avb_sha512_final(&context);
-  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
-}
-
-/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
-static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
-  sha256((const uint8_t*)str, avb_strlen(str), hash);
-}
-
-/* Verifies structure and |expected_hash| of permanent |attributes|. */
-static bool verify_permanent_attributes(
-    const AvbAtxPermanentAttributes* attributes,
-    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
-  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
-
-  if (attributes->version != 1) {
-    avb_error("Unsupported permanent attributes version.\n");
-    return false;
-  }
-  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
-  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid permanent attributes.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies the format, key version, usage, and signature of a certificate. */
-static bool verify_certificate(AvbAtxCertificate* certificate,
-                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                               uint64_t minimum_key_version,
-                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
-  const AvbAlgorithmData* algorithm_data;
-  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
-
-  if (certificate->signed_data.version != 1) {
-    avb_error("Unsupported certificate format.\n");
-    return false;
-  }
-  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
-  sha512((const uint8_t*)&certificate->signed_data,
-         sizeof(AvbAtxCertificateSignedData),
-         certificate_hash);
-  if (!avb_rsa_verify(authority,
-                      AVB_ATX_PUBLIC_KEY_SIZE,
-                      certificate->signature,
-                      AVB_RSA4096_NUM_BYTES,
-                      certificate_hash,
-                      AVB_SHA512_DIGEST_SIZE,
-                      algorithm_data->padding,
-                      algorithm_data->padding_len)) {
-    avb_error("Invalid certificate signature.\n");
-    return false;
-  }
-  if (certificate->signed_data.key_version < minimum_key_version) {
-    avb_error("Key rollback detected.\n");
-    return false;
-  }
-  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
-                           expected_usage,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Invalid certificate usage.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PIK certificate. */
-static bool verify_pik_certificate(AvbAtxCertificate* certificate,
-                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-                                   uint64_t minimum_version) {
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot.ca", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PIK certificate.\n");
-    return false;
-  }
-  return true;
-}
-
-/* Verifies signature and fields of a PSK certificate. */
-static bool verify_psk_certificate(
-    AvbAtxCertificate* certificate,
-    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
-    uint64_t minimum_version,
-    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
-  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
-  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
-
-  sha256_str("com.google.android.things.vboot", expected_usage);
-  if (!verify_certificate(
-          certificate, authority, minimum_version, expected_usage)) {
-    avb_error("Invalid PSK certificate.\n");
-    return false;
-  }
-  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
-  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
-                           expected_subject,
-                           AVB_SHA256_DIGEST_SIZE)) {
-    avb_error("Product ID mismatch.\n");
-    return false;
-  }
-  return true;
-}
-
-AvbIOResult avb_atx_validate_vbmeta_public_key(
-    AvbOps* ops,
-    const uint8_t* public_key_data,
-    size_t public_key_length,
-    const uint8_t* public_key_metadata,
-    size_t public_key_metadata_length,
-    bool* out_is_trusted) {
-  AvbIOResult result = AVB_IO_RESULT_OK;
-  AvbAtxPermanentAttributes permanent_attributes;
-  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
-  AvbAtxPublicKeyMetadata metadata;
-  uint64_t minimum_version;
-
-  /* Be pessimistic so we can exit early without having to remember to clear.
-   */
-  *out_is_trusted = false;
-
-  /* Read and verify permanent attributes. */
-  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
-                                                   &permanent_attributes);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes.\n");
-    return result;
-  }
-  result = ops->atx_ops->read_permanent_attributes_hash(
-      ops->atx_ops, permanent_attributes_hash);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read permanent attributes hash.\n");
-    return result;
-  }
-  if (!verify_permanent_attributes(&permanent_attributes,
-                                   permanent_attributes_hash)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Sanity check public key metadata. */
-  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
-    avb_error("Invalid public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
-  if (metadata.version != 1) {
-    avb_error("Unsupported public key metadata.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PIK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PIK minimum version.\n");
-    return result;
-  }
-  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
-                              permanent_attributes.product_root_public_key,
-                              minimum_version)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK certificate. */
-  result = ops->read_rollback_index(
-      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
-  if (result != AVB_IO_RESULT_OK) {
-    avb_error("Failed to read PSK minimum version.\n");
-    return result;
-  }
-  if (!verify_psk_certificate(
-          &metadata.product_signing_key_certificate,
-          metadata.product_intermediate_key_certificate.signed_data.public_key,
-          minimum_version,
-          permanent_attributes.product_id)) {
-    return AVB_IO_RESULT_OK;
-  }
-
-  /* Verify the PSK is the same key that verified vbmeta. */
-  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
-    avb_error("Public key length mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-  if (0 != avb_safe_memcmp(
-               metadata.product_signing_key_certificate.signed_data.public_key,
-               public_key_data,
-               AVB_ATX_PUBLIC_KEY_SIZE)) {
-    avb_error("Public key mismatch.\n");
-    return AVB_IO_RESULT_OK;
-  }
-
-  *out_is_trusted = true;
-  return AVB_IO_RESULT_OK;
-}
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_atx_validate.h>
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Computes the SHA256 |hash| of |length| bytes of |data|. */
+static void sha256(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  AvbSHA256Ctx context;
+  avb_sha256_init(&context);
+  avb_sha256_update(&context, data, length);
+  uint8_t* tmp = avb_sha256_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
+}
+
+/* Computes the SHA512 |hash| of |length| bytes of |data|. */
+static void sha512(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
+  AvbSHA512Ctx context;
+  avb_sha512_init(&context);
+  avb_sha512_update(&context, data, length);
+  uint8_t* tmp = avb_sha512_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
+}
+
+/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
+static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  sha256((const uint8_t*)str, avb_strlen(str), hash);
+}
+
+/* Verifies structure and |expected_hash| of permanent |attributes|. */
+static bool verify_permanent_attributes(
+    const AvbAtxPermanentAttributes* attributes,
+    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+
+  if (attributes->version != 1) {
+    avb_error("Unsupported permanent attributes version.\n");
+    return false;
+  }
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid permanent attributes.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies the format, key version, usage, and signature of a certificate. */
+static bool verify_certificate(AvbAtxCertificate* certificate,
+                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                               uint64_t minimum_key_version,
+                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
+
+  if (certificate->signed_data.version != 1) {
+    avb_error("Unsupported certificate format.\n");
+    return false;
+  }
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512((const uint8_t*)&certificate->signed_data,
+         sizeof(AvbAtxCertificateSignedData),
+         certificate_hash);
+  if (!avb_rsa_verify(authority,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      certificate->signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      certificate_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid certificate signature.\n");
+    return false;
+  }
+  if (certificate->signed_data.key_version < minimum_key_version) {
+    avb_error("Key rollback detected.\n");
+    return false;
+  }
+  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
+                           expected_usage,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid certificate usage.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PIK certificate. */
+static bool verify_pik_certificate(AvbAtxCertificate* certificate,
+                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                                   uint64_t minimum_version) {
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.ca", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PIK certificate.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PSK certificate. */
+static bool verify_psk_certificate(
+    AvbAtxCertificate* certificate,
+    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PSK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  AvbAtxPublicKeyMetadata metadata;
+  uint64_t minimum_version;
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Read and verify permanent attributes. */
+  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
+                                                   &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = ops->atx_ops->read_permanent_attributes_hash(
+      ops->atx_ops, permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Sanity check public key metadata. */
+  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
+    avb_error("Invalid public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
+  if (metadata.version != 1) {
+    avb_error("Unsupported public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
+                              permanent_attributes.product_root_public_key,
+                              minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_psk_certificate(
+          &metadata.product_signing_key_certificate,
+          metadata.product_intermediate_key_certificate.signed_data.public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK is the same key that verified vbmeta. */
+  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
+    avb_error("Public key length mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  if (0 != avb_safe_memcmp(
+               metadata.product_signing_key_certificate.signed_data.public_key,
+               public_key_data,
+               AVB_ATX_PUBLIC_KEY_SIZE)) {
+    avb_error("Public key mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Report the key versions used during verification. */
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PIK_VERSION_LOCATION,
+      metadata.product_intermediate_key_certificate.signed_data.key_version);
+  ops->atx_ops->set_key_version(
+      ops->atx_ops,
+      AVB_ATX_PSK_VERSION_LOCATION,
+      metadata.product_signing_key_certificate.signed_data.key_version);
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}
diff --git a/lib/avb/rk_libavb_user/Kconfig b/lib/avb/libavb_user/Kconfig
similarity index 100%
rename from lib/avb/rk_libavb_user/Kconfig
rename to lib/avb/libavb_user/Kconfig
diff --git a/lib/avb/rk_libavb_user/Makefile b/lib/avb/libavb_user/Makefile
similarity index 100%
rename from lib/avb/rk_libavb_user/Makefile
rename to lib/avb/libavb_user/Makefile
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/libavb_user/avb_ops_user.c
similarity index 58%
rename from lib/avb/rk_libavb_user/avb_ops_user.c
rename to lib/avb/libavb_user/avb_ops_user.c
index 887bb6b274..959044a931 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/libavb_user/avb_ops_user.c
@@ -1,489 +1,395 @@
-/*
- * Copyright (C) 2017 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <common.h>
-#include <image.h>
-#include <android_image.h>
-#include <malloc.h>
-#include <mapmem.h>
-#include <errno.h>
-#include <command.h>
-#include <mmc.h>
-#include <blk.h>
-#include <part.h>
-#include <android_avb/avb_ops_user.h>
-#include <android_avb/libavb_ab.h>
-#include <android_avb/avb_atx_validate.h>
-#include <optee_include/OpteeClientInterface.h>
-
-static void byte_to_block(int64_t *offset,
-			  size_t *num_bytes,
-			  lbaint_t *offset_blk,
-			  lbaint_t *blkcnt)
-{
-	*offset_blk = (lbaint_t)(*offset / 512);
-	if (*num_bytes % 512 == 0) {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512);
-		} else {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		}
-	} else {
-		if (*offset % 512 == 0) {
-			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-		} else {
-			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
-			    (*offset % 512) + (*num_bytes % 512) == 512) {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
-			} else {
-				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
-			}
-			
-		}
-	}
-}
-
-static AvbIOResult read_from_partition(AvbOps* ops,
-                                       const char* partition,
-                                       int64_t offset,
-                                       size_t num_bytes,
-                                       void* buffer,
-                                       size_t* out_num_read)
-{
-	char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	lbaint_t offset_blk, blkcnt;
-	disk_partition_t part_info;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-
-	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-		*out_num_read = blkcnt * 512;
-	} else {
-		char *buffer_temp;
-		buffer_temp = malloc(512 * blkcnt);
-		if (buffer_temp == NULL) {
-			printf("malloc error!\n");
-			return -1;
-		}
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
-		*out_num_read = num_bytes;
-		free(buffer_temp);
-	}
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_to_partition(AvbOps* ops,
-                                      const char* partition,
-                                      int64_t offset,
-                                      size_t num_bytes,
-                                      const void* buffer)
-{
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	char *buffer_temp;
-	disk_partition_t part_info;
-	lbaint_t offset_blk, blkcnt;
-
-	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	buffer_temp = malloc(512 * blkcnt);
-	if (buffer_temp == NULL) {
-		printf("malloc error!\n");
-		return -1;
-	}
-	memset(buffer_temp, 0, 512 * blkcnt);
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-
-	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
-		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
-	}
-
-	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
-	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
-	free(buffer_temp);
-
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult validate_vbmeta_public_key(
-	AvbOps *ops,
-	const uint8_t *public_key_data,
-	size_t public_key_length,
-	const uint8_t *public_key_metadata,
-	size_t public_key_metadata_length,
-	bool *out_is_trusted)
-{
-#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
-	if (out_is_trusted != NULL) {
-		avb_atx_validate_vbmeta_public_key(ops,
-						   public_key_data,
-						   public_key_length,
-						   public_key_metadata,
-						   public_key_metadata_length,
-						   out_is_trusted);
-	}
-#else
-	if (out_is_trusted != NULL) {
-		*out_is_trusted = true;
-	}
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-
-static AvbIOResult read_rollback_index(AvbOps *ops,
-                                       size_t rollback_index_location,
-                                       uint64_t *out_rollback_index)
-{
-	if (out_rollback_index != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_rollback_index(rollback_index_location, out_rollback_index);
-#endif
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_rollback_index(AvbOps *ops,
-                                        size_t rollback_index_location,
-                                        uint64_t rollback_index)
-{
-#ifdef CONFIG_OPTEE_CLIENT
-	trusty_write_rollback_index(rollback_index_location, rollback_index);
-#endif
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_read_lock_state((uint8_t *)out_is_unlocked);
-#endif
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
-{
-	if (out_is_unlocked != NULL) {
-#ifdef CONFIG_OPTEE_CLIENT
-		trusty_write_lock_state(*out_is_unlocked);
-#endif
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult get_size_of_partition(AvbOps *ops,
-                                         const char *partition,
-                                         uint64_t *out_size_in_bytes)
-{
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-	*out_size_in_bytes = (part_info.size) * 512;
-	return AVB_IO_RESULT_OK;
-}
-
-static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
-                                                 const char *partition,
-                                                 char *guid_buf,
-                                                 size_t guid_buf_size)
-{
-	const char *dev_iface = "mmc";
-	int dev_num = 0;
-	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
-	dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-
-	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", partition);
-		return -1;
-	}
-	if (guid_buf != NULL && guid_buf_size > 0) {
-		memcpy(guid_buf, part_info.uuid, guid_buf_size);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-AvbOps* avb_ops_user_new(void)
-{
-	AvbOps* ops;
-
-	ops = calloc(1, sizeof(AvbOps));
-	if (ops == NULL) {
-		avb_error("Error allocating memory for AvbOps.\n");
-		goto out;
-	}
-
-	ops->ab_ops = calloc(1, sizeof(AvbABOps));
-	if (ops->ab_ops == NULL) {
-		avb_error("Error allocating memory for AvbABOps.\n");
-		free(ops);
-		goto out;
-	}
-	ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
-	if (ops->atx_ops == NULL) {
-		avb_error("Error allocating memory for AvbAtxOps.\n");
-		free(ops->ab_ops);
-		free(ops);
-		goto out;
-	}
-	ops->ab_ops->ops = ops;
-	ops->atx_ops->ops = ops;
-
-	ops->read_from_partition = read_from_partition;
-	ops->write_to_partition = write_to_partition;
-	ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
-	ops->read_rollback_index = read_rollback_index;
-	ops->write_rollback_index = write_rollback_index;
-	ops->read_is_device_unlocked = read_is_device_unlocked;
-	ops->write_is_device_unlocked = write_is_device_unlocked;
-	ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
-	ops->get_size_of_partition = get_size_of_partition;
-	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
-	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
-	ops->ab_ops->init_ab_metadata = avb_ab_data_init;
-	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
-	ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
-out:
-	return ops;
-}
-
-void avb_ops_user_free(AvbOps *ops)
-{
-	free(ops->ab_ops);
-	free(ops->atx_ops);
-	free(ops);
-}
-
-
-int avb_read_slot_count(char *slot_count)
-{
-	AvbOps* ops;
-	AvbABData ab_data;
-	memset(&ab_data,0,sizeof(AvbABData));
-	ops = avb_ops_user_new();
-	printf("read_slot_count\n");
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
-		printf("read_slot_count error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-	*slot_count = ab_data.nb_slot;
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_read_slot_suffixes(char *slot_suffixes)
-{
-	AvbOps* ops;
-	AvbABData ab_data;
-	memset(&ab_data,0,sizeof(AvbABData));
-	ops = avb_ops_user_new();
-	printf("read_slot_suffixes\n");
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
-		printf("read_slot_suffixes error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-	memcpy(slot_suffixes,ab_data.slot_suffix,4);
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_set_slot_active(unsigned int *slot_number)
-{
-	AvbOps* ops;
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	printf("set_slot_active\n");
-	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
-		printf("set_slot_active error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_get_current_slot(char *select_slot)
-{
-	AvbOps* ops;
-	ops = avb_ops_user_new();
-	if (ops == NULL) {
-		printf("avb_ops_user_new() failed!\n");
-		return -1;
-	}
-	if (avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
-		printf("get_current_slot error!\n");
-		avb_ops_user_free(ops);
-		return -1;
-	}
-
-	avb_ops_user_free(ops);
-	return 0;
-}
-
-int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
-{
-	if(trusty_read_permanent_attributes(attributes, size) != 0) {
-		return -1;
-	}
-
-	return 0;
-}
-
-int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size)
-{
-	if(trusty_write_permanent_attributes(attributes, size) != 0) {
-		return -1;
-	}
-
-	return 0;
-}
-
-int avb_read_flash_lock_state(uint8_t *flash_lock_state)
-{
-	if (trusty_read_flash_lock_state(flash_lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_write_flash_lock_state(uint8_t flash_lock_state)
-{
-	if (trusty_write_flash_lock_state(flash_lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_read_lock_state(uint8_t *lock_state)
-{
-	if (trusty_read_lock_state(lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_write_lock_state(uint8_t lock_state)
-{
-	if (trusty_write_lock_state(lock_state))
-		return -1;
-	return 0;
-}
-
-int avb_read_perm_attr_flag(uint8_t *flag)
-{
-	if (trusty_read_permanent_attributes_flag(flag))
-		return -1;
-	return 0;
-}
-
-int avb_write_perm_attr_flag(uint8_t flag)
-{
-	if (trusty_write_permanent_attributes_flag(flag))
-		return -1;
-	return 0;
-}
-
-int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length)
-{
-	if (trusty_read_vbootkey_hash((uint32_t *)buf,
-				      (uint32_t)length / sizeof(uint32_t)))
-		return -1;
-	return 0;
-}
-
-int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
-{
-	if (trusty_write_vbootkey_hash((uint32_t *)buf,
-				       (uint32_t)length / sizeof(uint32_t)))
-		return -1;
-	return 0;
-}
-
-int avb_close_optee_client(void)
-{
-	if(trusty_notify_optee_uboot_end())
-		return -1;
-	return 0;
-}
-
-int avb_write_attribute_hash(uint8_t *buf, uint8_t length)
-{
-	if (trusty_write_attribute_hash((uint32_t *)buf,
-	    (uint32_t)(length/sizeof(uint32_t))))
-		return -1;
-	return 0;
-}
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/avb_atx_types.h>
+#include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_atx_validate.h>
+
+static void byte_to_block(int64_t *offset,
+			  size_t *num_bytes,
+			  lbaint_t *offset_blk,
+			  lbaint_t *blkcnt)
+{
+	*offset_blk = (lbaint_t)(*offset / 512);
+	if (*num_bytes % 512 == 0) {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512);
+		} else {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		}
+	} else {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		} else {
+			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
+			    (*offset % 512) + (*num_bytes % 512) == 512) {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+			} else {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
+			}
+		}
+	}
+}
+
+static AvbIOResult read_from_partition(AvbOps* ops,
+                                       const char* partition,
+                                       int64_t offset,
+                                       size_t num_bytes,
+                                       void* buffer,
+                                       size_t* out_num_read)
+{
+	char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	lbaint_t offset_blk, blkcnt;
+	disk_partition_t part_info;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+		*out_num_read = blkcnt * 512;
+	} else {
+		char *buffer_temp;
+		buffer_temp = malloc(512 * blkcnt);
+		if (buffer_temp == NULL) {
+			printf("malloc error!\n");
+			return AVB_IO_RESULT_ERROR_OOM;
+		}
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
+		*out_num_read = num_bytes;
+		free(buffer_temp);
+	}
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_to_partition(AvbOps* ops,
+                                      const char* partition,
+                                      int64_t offset,
+                                      size_t num_bytes,
+                                      const void* buffer)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	char *buffer_temp;
+	disk_partition_t part_info;
+	lbaint_t offset_blk, blkcnt;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	if (buffer_temp == NULL) {
+		printf("malloc error!\n");
+		return AVB_IO_RESULT_ERROR_OOM;
+	}
+	memset(buffer_temp, 0, 512 * blkcnt);
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+	}
+
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult validate_vbmeta_public_key(
+	AvbOps *ops,
+	const uint8_t *public_key_data,
+	size_t public_key_length,
+	const uint8_t *public_key_metadata,
+	size_t public_key_metadata_length,
+	bool *out_is_trusted)
+{
+#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+	if (out_is_trusted != NULL) {
+		avb_atx_validate_vbmeta_public_key(ops,
+						   public_key_data,
+						   public_key_length,
+						   public_key_metadata,
+						   public_key_metadata_length,
+						   out_is_trusted);
+	}
+#else
+	if (out_is_trusted != NULL) {
+		*out_is_trusted = true;
+	}
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult read_rollback_index(AvbOps *ops,
+                                       size_t rollback_index_location,
+                                       uint64_t *out_rollback_index)
+{
+	if (out_rollback_index != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+		ret = trusty_read_rollback_index(rollback_index_location,
+						 out_rollback_index);
+		if (ret == TEE_ERROR_GENERIC) {
+			*out_rollback_index = 0;
+			ret = trusty_write_rollback_index(rollback_index_location,
+							  *out_rollback_index);
+			if (ret != 0) {
+				printf("%s: init rollback index error\n", __FILE__);
+				return AVB_IO_RESULT_ERROR_IO;
+			}
+			ret = trusty_read_rollback_index(rollback_index_location,
+							 out_rollback_index);
+			if (ret == 0)
+				return AVB_IO_RESULT_OK;
+		} else if (ret == 0) {
+			return AVB_IO_RESULT_OK;
+		} else {
+			printf("trusty_read_rollback_index ret = %x\n", ret);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_rollback_index(AvbOps *ops,
+                                        size_t rollback_index_location,
+                                        uint64_t rollback_index)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_rollback_index(rollback_index_location, rollback_index)) {
+		printf("%s: Fail to write rollback index\n", __FILE__);
+		return AVB_IO_RESULT_ERROR_IO;
+	}
+	return AVB_IO_RESULT_OK;
+#endif
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		int ret;
+
+		ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
+		if (ret == TEE_ERROR_GENERIC) {
+			*out_is_unlocked = 1;
+			if (trusty_write_lock_state(*out_is_unlocked)) {
+				printf("%s: init lock state error\n", __FILE__);
+				return AVB_IO_RESULT_ERROR_IO;
+			}
+
+			ret = trusty_read_lock_state((uint8_t *)out_is_unlocked);
+			if(ret == 0)
+				return 0;
+		} else if (ret == 0) {
+			return AVB_IO_RESULT_OK;
+		} else {
+			printf("read_is_device_unlocked ret = %x\n", ret);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		if (trusty_write_lock_state(*out_is_unlocked)) {
+			printf("%s: Fail to write lock state\n", __FILE__);
+			return AVB_IO_RESULT_ERROR_IO;
+		}
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+	return AVB_IO_RESULT_ERROR_IO;
+}
+
+static AvbIOResult get_size_of_partition(AvbOps *ops,
+                                         const char *partition,
+                                         uint64_t *out_size_in_bytes)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	*out_size_in_bytes = (part_info.size) * 512;
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
+                                                 const char *partition,
+                                                 char *guid_buf,
+                                                 size_t guid_buf_size)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION;
+	}
+	if (guid_buf != NULL && guid_buf_size > 0) {
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+/* read permanent attributes from rpmb */
+AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
+			       AvbAtxPermanentAttributes* attributes)
+{
+	if (attributes != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		trusty_read_permanent_attributes((uint8_t *)attributes,
+						 sizeof(struct AvbAtxPermanentAttributes));
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+
+	return -1;
+}
+
+/*read permanent attributes hash from efuse */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
+				    uint8_t hash[AVB_SHA256_DIGEST_SIZE])
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
+		return -1;
+#else
+	avb_error("Please open the macro!\n");
+	return -1;
+#endif
+	return AVB_IO_RESULT_OK;
+}
+
+AvbOps* avb_ops_user_new(void) {
+  AvbOps* ops;
+
+  ops = calloc(1, sizeof(AvbOps));
+  if (ops == NULL) {
+    avb_error("Error allocating memory for AvbOps.\n");
+    goto out;
+  }
+
+  ops->ab_ops = calloc(1, sizeof(AvbABOps));
+  if (ops->ab_ops == NULL) {
+    avb_error("Error allocating memory for AvbABOps.\n");
+    free(ops);
+    goto out;
+  }
+
+  ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
+  if (ops->atx_ops == NULL) {
+    avb_error("Error allocating memory for AvbAtxOps.\n");
+    free(ops->ab_ops);
+    free(ops);
+    goto out;
+  }
+  ops->ab_ops->ops = ops;
+  ops->atx_ops->ops = ops;
+
+  ops->read_from_partition = read_from_partition;
+  ops->write_to_partition = write_to_partition;
+  ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
+  ops->read_rollback_index = read_rollback_index;
+  ops->write_rollback_index = write_rollback_index;
+  ops->read_is_device_unlocked = read_is_device_unlocked;
+  ops->write_is_device_unlocked = write_is_device_unlocked;
+  ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
+  ops->get_size_of_partition = get_size_of_partition;
+  ops->ab_ops->read_ab_metadata = avb_ab_data_read;
+  ops->ab_ops->write_ab_metadata = avb_ab_data_write;
+  ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
+  ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
+
+out:
+  return ops;
+}
+
+
+void avb_ops_user_free(AvbOps* ops) {
+  free(ops->ab_ops);
+  free(ops->atx_ops);
+  free(ops);
+}
diff --git a/lib/avb/rk_libavb_user/avb_user_verification.c b/lib/avb/libavb_user/avb_user_verification.c
similarity index 100%
rename from lib/avb/rk_libavb_user/avb_user_verification.c
rename to lib/avb/libavb_user/avb_user_verification.c
diff --git a/lib/avb/rk_libavb_user/avb_user_verity.c b/lib/avb/libavb_user/avb_user_verity.c
similarity index 100%
rename from lib/avb/rk_libavb_user/avb_user_verity.c
rename to lib/avb/libavb_user/avb_user_verity.c
diff --git a/lib/avb/rk_avb_user/Kconfig b/lib/avb/rk_avb_user/Kconfig
new file mode 100644
index 0000000000..b183bfcc72
--- /dev/null
+++ b/lib/avb/rk_avb_user/Kconfig
@@ -0,0 +1,22 @@
+config RK_AVB_LIBAVB_USER
+	bool "Rockchip AVB support"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config SPL_RK_AVB_LIBAVB_USER
+	bool "Rockchip AVB support for spl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config TPL_RK_AVB_LIBAVB_USER
+	bool "Rockchip AVB support for tpl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
diff --git a/lib/avb/rk_avb_user/Makefile b/lib/avb/rk_avb_user/Makefile
new file mode 100644
index 0000000000..c636ea7eb3
--- /dev/null
+++ b/lib/avb/rk_avb_user/Makefile
@@ -0,0 +1 @@
+obj-y	+= rk_avb_ops_user.o
diff --git a/lib/avb/rk_avb_user/rk_avb_ops_user.c b/lib/avb/rk_avb_user/rk_avb_ops_user.c
new file mode 100644
index 0000000000..f4a7559ec5
--- /dev/null
+++ b/lib/avb/rk_avb_user/rk_avb_ops_user.c
@@ -0,0 +1,671 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/avb_atx_types.h>
+#include <optee_include/OpteeClientInterface.h>
+#include <optee_include/tee_api_defines.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_atx_validate.h>
+#include <android_avb/rk_avb_ops_user.h>
+
+/* rk used */
+int rk_avb_read_slot_count(char *slot_count)
+{
+	*slot_count = SLOT_NUM;
+
+	return 0;
+}
+
+int rk_avb_read_slot_suffixes(char *slot_suffixes)
+{
+	memcpy(slot_suffixes, CURR_SYSTEM_SLOT_SUFFIX,
+	       strlen(CURR_SYSTEM_SLOT_SUFFIX));
+
+	return 0;
+}
+
+int rk_avb_set_slot_active(unsigned int *slot_number)
+{
+	AvbOps* ops;
+	ops = avb_ops_user_new();
+	int ret = 0;
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	debug("set_slot_active\n");
+	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
+		printf("set_slot_active error!\n");
+		ret = -1;
+	}
+
+	avb_ops_user_free(ops);
+	return ret;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot) {
+	return (slot->priority > 0) && 
+	       (slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+AvbABFlowResult rk_avb_ab_slot_select(AvbABOps* ab_ops,char* select_slot)
+{
+	AvbABFlowResult ret = AVB_AB_FLOW_RESULT_OK;
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	AvbABData ab_data;
+	size_t slot_index_to_boot;
+
+	io_ret = ab_ops->read_ab_metadata(ab_ops, &ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+			slot_index_to_boot = 1;
+		} else {
+			slot_index_to_boot = 0;
+		}
+	} else if(slot_is_bootable(&ab_data.slots[0])) {
+		slot_index_to_boot = 0;
+	} else if(slot_is_bootable(&ab_data.slots[1])) {
+		slot_index_to_boot = 1;
+	} else {
+		avb_error("No bootable slots found.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+		goto out;
+	}
+
+	if (slot_index_to_boot == 0) {
+		strcpy(select_slot, "_a");
+	} else if(slot_index_to_boot == 1) {
+		strcpy(select_slot, "_b");
+	}
+out:
+	return ret;
+}
+
+int rk_avb_get_current_slot(char *select_slot)
+{
+	AvbOps* ops;
+	int ret = 0;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if (rk_avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
+		printf("get_current_slot error!\n");
+		ret = -1;
+	}
+
+	avb_ops_user_free(ops);
+	return ret;
+}
+
+int rk_avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if(trusty_read_permanent_attributes(attributes, size) != 0) {
+		printf("trusty_read_permanent_attributes failed!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if(trusty_write_permanent_attributes(attributes, size) != 0) {
+		printf("trusty_write_permanent_attributes failed!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_flash_lock_state(uint8_t *flash_lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_flash_lock_state(flash_lock_state);
+	if (ret == TEE_ERROR_GENERIC) {
+		*flash_lock_state = 1;
+		if (trusty_write_flash_lock_state(*flash_lock_state)) {
+			printf("trusty_write_flash_lock_state error!\n");
+			return -1;
+		}
+
+		ret = trusty_read_flash_lock_state(flash_lock_state);
+		if (ret == 0)
+			return 0;
+	} else if (ret == 0) {
+		return 0;
+	} else {
+		printf("avb_read_flash_lock_state ret = %x\n", ret);
+		return -1;
+	}
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_flash_lock_state(uint8_t flash_lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_flash_lock_state(flash_lock_state)) {
+		printf("trusty_write_flash_lock_state error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_lock_state(uint8_t lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_lock_state(lock_state)) {
+		printf("trusty_write_lock_state error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_lock_state(uint8_t *lock_state)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_lock_state(lock_state);
+	if (ret == TEE_ERROR_GENERIC) {
+		*lock_state = 1;
+		if (rk_avb_write_lock_state(*lock_state)) {
+			printf("avb_write_lock_state error!\n");
+			return -1;
+		}
+
+		ret = trusty_read_lock_state(lock_state);
+		if (ret == 0)
+			return 0;
+	} else if (ret == 0) {
+		return 0;
+	} else {
+		printf("avb_read_lock_state ret = %x\n", ret);
+		return -1;
+	}
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_perm_attr_flag(uint8_t flag)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_permanent_attributes_flag(flag)) {
+		printf("trusty_write_permanent_attributes_flag error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_perm_attr_flag(uint8_t *flag)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	int ret;
+
+	ret = trusty_read_permanent_attributes_flag(flag);
+	if (ret != TEE_SUCCESS) {
+		*flag = 0;
+		if (rk_avb_write_perm_attr_flag(*flag)) {
+			printf("avb_write_perm_attr_flag error!\n");
+			return -1;
+		}
+
+		ret = trusty_read_permanent_attributes_flag(flag);
+		if (ret == 0)
+			return 0;
+	} else if (ret == 0) {
+		return 0;
+	} else {
+		printf("avb_read_perm_attr_flag ret = %x\n", ret);
+		return -1;
+	}
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_vbootkey_hash((uint32_t *)buf,
+				      (uint32_t)length / sizeof(uint32_t))) {
+		printf("trusty_read_vbootkey_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_vbootkey_hash((uint32_t *)buf,
+				       (uint32_t)length / sizeof(uint32_t))) {
+		printf("trusty_write_vbootkey_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_close_optee_client(void)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if(trusty_notify_optee_uboot_end()) {
+		printf("trusty_notify_optee_uboot_end error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_read_attribute_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)buf,
+	    (uint32_t)(length/sizeof(uint32_t)))) {
+		printf("trusty_read_attribute_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+int rk_avb_write_attribute_hash(uint8_t *buf, uint8_t length)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_write_attribute_hash((uint32_t *)buf,
+	    (uint32_t)(length/sizeof(uint32_t)))) {
+		printf("trusty_write_attribute_hash error!\n");
+		return -1;
+	}
+
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+int rk_avb_read_all_rollback_index(char *buffer)
+{
+	AvbOps* ops;
+	AvbVBMetaImageHeader vbmeta_header;
+	uint64_t stored_rollback_index = 0;
+	uint64_t pik_rollback_index = 0;
+	uint64_t psk_rollback_index = 0;
+	AvbSlotVerifyFlags flags;
+	AvbIOResult io_ret;
+	char temp[ROLLBACK_MAX_SIZE] = {0};
+	AvbAtxPublicKeyMetadata *metadata;
+	int n;
+	bool unlocked;
+	AvbSlotVerifyResult verify_result;
+	AvbSlotVerifyData *slot_data[SLOT_NUM] = {NULL, NULL};
+	const char *requested_partitions[1] = {"vbmeta"};
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+
+	if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
+		printf("Error determining whether device is unlocked.\n");
+		unlocked = ANDROID_VBOOT_UNLOCK;
+		if (ops->write_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not write lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+		if (ops->read_is_device_unlocked(ops, &unlocked) != 0) {
+			printf("Can not read lock state!\n");
+			unlocked = ANDROID_VBOOT_LOCK;
+		}
+	}
+
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	if (unlocked)
+		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
+
+	for (n = 0; n < SLOT_NUM; n++) {
+		verify_result = avb_slot_verify(ops,
+						requested_partitions,
+						slot_suffixes[n],
+						flags,
+						AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+						&slot_data[n]);
+		switch (verify_result) {
+		case AVB_SLOT_VERIFY_RESULT_OK:
+			break;
+
+		case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+		case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+		/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+		 * these mean game over.
+		 */
+			printf("Invalid metadata!\n");
+			goto out;
+
+		/* explicit fallthrough. */
+		case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+			printf("Error verify!\n");
+			goto out;
+		case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+			printf("error rollback index!\n");
+			goto out;
+		case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+			printf("error key!\n");
+			goto out;
+		default:
+			printf("Some abnormal condition occur!\n");
+			goto out;
+		}
+	}
+	debug("partition_name = %s\n", slot_data[0]->vbmeta_images->partition_name);
+	debug("vbmeta_size = %d\n", slot_data[0]->vbmeta_images->vbmeta_size);
+
+	for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+		uint64_t rollback_index_value = 0;
+		if (slot_data[0] != NULL && slot_data[1] != NULL) {
+			uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+			uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+			rollback_index_value =
+				(a_rollback_index < b_rollback_index ? a_rollback_index
+								: b_rollback_index);
+		} else if (slot_data[0] != NULL) {
+			rollback_index_value = slot_data[0]->rollback_indexes[n];
+		} else if (slot_data[1] != NULL) {
+			rollback_index_value = slot_data[1]->rollback_indexes[n];
+		}
+
+		io_ret = ops->read_rollback_index(
+			ops, n, &stored_rollback_index);
+		if (io_ret != AVB_IO_RESULT_OK)
+			goto out;
+		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
+			 stored_rollback_index);
+		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+		strncat(buffer, ":", 1);
+		snprintf(temp, sizeof(uint64_t) + 1, "%lld",
+			 rollback_index_value);
+		strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+		strncat(buffer, ",", 1);
+	}
+
+	for (n = 0; n < SLOT_NUM; n++) {
+		avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader *)
+							   slot_data[n]->vbmeta_images->\
+							   vbmeta_data,
+							   &vbmeta_header);
+		if (vbmeta_header.public_key_metadata_size > 0) {
+			metadata = (AvbAtxPublicKeyMetadata *)(slot_data[n]->\
+				vbmeta_images->vbmeta_data +
+			   	sizeof(AvbVBMetaImageHeader) +
+			   	vbmeta_header.authentication_data_block_size +
+			   	vbmeta_header.public_key_metadata_offset);
+			if (n == 0) {
+				pik_rollback_index =
+					metadata->product_intermediate_key_certificate.\
+					signed_data.key_version;
+				psk_rollback_index =
+					metadata->product_signing_key_certificate.\
+					signed_data.key_version;
+			}
+
+			if (pik_rollback_index > metadata->\
+				product_intermediate_key_certificate.\
+				signed_data.key_version) {
+				pik_rollback_index = metadata->\
+				product_intermediate_key_certificate.\
+				signed_data.key_version;
+			}
+
+			if (psk_rollback_index > metadata->\
+				product_signing_key_certificate.\
+				signed_data.key_version) {
+				psk_rollback_index = metadata->\
+				product_signing_key_certificate.\
+				signed_data.key_version;
+			}
+		}
+	}
+	io_ret =
+		ops->read_rollback_index(ops,
+					 AVB_ATX_PIK_VERSION_LOCATION,
+					 &stored_rollback_index);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("Failed to read PIK minimum version.\n");
+		goto out;
+	}
+	/* PIK rollback index */
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", pik_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ",", 1);
+	io_ret = ops->read_rollback_index(ops,
+					  AVB_ATX_PSK_VERSION_LOCATION,
+					  &stored_rollback_index);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("Failed to read PSK minimum version.\n");
+		goto out;
+	}
+	/* PSK rollback index */
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", stored_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	strncat(buffer, ":", 1);
+	snprintf(temp, sizeof(uint64_t) + 1, "%lld", psk_rollback_index);
+	strncat(buffer, temp, ROLLBACK_MAX_SIZE);
+	debug("%s\n", buffer);
+
+	for (n = 0; n < SLOT_NUM; n++) {
+		if (slot_data[n] != NULL) {
+			avb_slot_verify_data_free(slot_data[n]);
+		}
+	}
+	avb_ops_user_free(ops);
+
+	return 0;
+out:
+	for (n = 0; n < SLOT_NUM; n++) {
+		if (slot_data[n] != NULL) {
+			avb_slot_verify_data_free(slot_data[n]);
+		}
+	}
+	avb_ops_user_free(ops);
+
+	return -1;
+}
+
+int rk_avb_read_bootloader_locked_flag(uint8_t *flag)
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_vbootkey_enable_flag(flag)) {
+		return -1;
+	}
+	return 0;
+#else
+	return -1;
+#endif
+}
+
+void rk_avb_get_at_vboot_state(char *buf)
+{
+	char temp_buffer[150] = {0};
+	char temp_flag = 0;
+	char crlf[2] = {'\n', 0};
+	char *lock_val = NULL;
+	char *unlocK_dis_val = NULL;
+	char *perm_attr_flag = NULL;
+	char *bootloader_locked_flag = NULL;
+	char *lock_state = "bootloader-locked=";
+	char *btld_min_ver = "bootloader-min-versions=";
+	char *avb_perm_attr_set = "avb-perm-attr-set=";
+	char *avb_lock = "avb-locked=";
+	char *avb_unlock_dis = "avb-unlock-disabled=";
+	char *avb_min_ver = "avb-min-versions=";
+
+	if (rk_avb_read_perm_attr_flag((uint8_t *)&temp_flag)) {
+		printf("Can not read perm_attr_flag!\n");
+		perm_attr_flag = "";
+	} else {
+		perm_attr_flag = temp_flag ? "1" : "0";
+	}
+	sprintf(buf, "%s%s%s%s", buf, avb_perm_attr_set, perm_attr_flag, crlf);
+
+	if (rk_avb_read_lock_state((uint8_t *)&temp_flag)) {
+		printf("Can not read lock state!\n");
+		lock_val = "";
+		unlocK_dis_val = "";
+	} else {
+		lock_val = (temp_flag & LOCK_MASK) ? "0" : "1";
+		unlocK_dis_val = (temp_flag & UNLOCK_DISABLE_MASK) ? "1" : "0";
+	}
+	sprintf(buf, "%s%s%s%s%s%s%s", buf, avb_lock, lock_val, crlf,
+		avb_unlock_dis, unlocK_dis_val, crlf);
+
+	if (rk_avb_read_bootloader_locked_flag((uint8_t *)&temp_flag)) {
+		printf("Can not read bootloader locked flag!\n");
+		bootloader_locked_flag = "";
+	} else {
+		bootloader_locked_flag = temp_flag ? "1" : "0";
+	}
+	sprintf(buf, "%s%s%s%s", buf, lock_state, bootloader_locked_flag, crlf);
+
+	if (rk_avb_read_all_rollback_index(temp_buffer))
+		printf("Can not avb_min_ver!\n");
+	sprintf(buf, "%s%s%s%s", buf, avb_min_ver, temp_buffer, crlf);
+
+	/* miniloader is not ready, bootloader-min-versions=-1 */
+	sprintf(buf, "%s%s%d%s", buf, btld_min_ver, -1, crlf);
+}
+
+int rk_avb_get_ab_info(AvbABData* ab_data)
+{
+	AvbOps* ops;
+	AvbIOResult io_ret = AVB_IO_RESULT_OK;
+	int ret = 0;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("%s: avb_ops_user_new() failed!\n", __FILE__);
+		return -1;
+	}
+
+	io_ret = ops->ab_ops->read_ab_metadata(ops->ab_ops, ab_data);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		ret = -1;
+	}
+
+	avb_ops_user_free(ops);
+
+	return ret;
+}
+
+int rk_avb_get_part_has_slot_info(const char *base_name)
+{
+	char *part_name;
+	int part_num;
+	size_t part_name_len;
+	disk_partition_t part_info;
+	const char *dev_iface = "mmc";
+	struct blk_desc *dev_desc;
+	int dev_num = 0;
+	const char *slot_suffix = "_a";
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (base_name == NULL) {
+		printf("The base_name is NULL!\n");
+		return -1;
+	}
+
+	part_name_len = strlen(base_name) + 1;
+	part_name_len += strlen(slot_suffix);
+	part_name = malloc(part_name_len);
+	if (!part_name) {
+		printf("%s can not malloc a buffer!\n", __FILE__);
+		return -1;
+	}
+
+	memset(part_name, 0, part_name_len);
+	snprintf(part_name, part_name_len, "%s%s", base_name, slot_suffix);
+	part_num = part_get_info_by_name(dev_desc, part_name, &part_info);
+	if (part_num < 0) {
+		printf("Could not find partition \"%s\"\n", part_name);
+		part_num = -1;
+	}
+
+	free(part_name);
+	return part_num;
+}
diff --git a/lib/avb/rk_libavb/avb_slot_verify.c b/lib/avb/rk_libavb/avb_slot_verify.c
deleted file mode 100644
index 342144f290..0000000000
--- a/lib/avb/rk_libavb/avb_slot_verify.c
+++ /dev/null
@@ -1,1465 +0,0 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_slot_verify.h>
-#include <android_avb/avb_chain_partition_descriptor.h>
-#include <android_avb/avb_footer.h>
-#include <android_avb/avb_hash_descriptor.h>
-#include <android_avb/avb_kernel_cmdline_descriptor.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_version.h>
-
-/* Maximum allow length (in bytes) of a partition name, including
- * ab_suffix.
- */
-#define PART_NAME_MAX_SIZE 32
-
-/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
-#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
-
-/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
-#define MAX_NUMBER_OF_VBMETA_IMAGES 32
-
-/* Maximum size of a vbmeta image - 64 KiB. */
-#define VBMETA_MAX_SIZE (64 * 1024)
-
-/* Helper function to see if we should continue with verification in
- * allow_verification_error=true mode if something goes wrong. See the
- * comments for the avb_slot_verify() function for more information.
- */
-static inline bool result_should_continue(AvbSlotVerifyResult result)
-{
-	switch (result) {
-	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-		return false;
-
-	case AVB_SLOT_VERIFY_RESULT_OK:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-		return true;
-  }
-
-  return false;
-}
-
-static AvbSlotVerifyResult load_and_verify_hash_partition(
-    AvbOps* ops,
-    const char* const* requested_partitions,
-    const char* ab_suffix,
-    bool allow_verification_error,
-    const AvbDescriptor* descriptor,
-    AvbSlotVerifyData* slot_data)
-{
-	AvbHashDescriptor hash_desc;
-	const uint8_t* desc_partition_name = NULL;
-	const uint8_t* desc_salt;
-	const uint8_t* desc_digest;
-	char part_name[PART_NAME_MAX_SIZE];
-	AvbSlotVerifyResult ret;
-	AvbIOResult io_ret;
-	uint8_t* image_buf = NULL;
-	size_t part_num_read;
-	uint8_t* digest;
-	size_t digest_len;
-	const char* found;
-	uint64_t image_size;
-
-	if (!avb_hash_descriptor_validate_and_byteswap(
-		(const AvbHashDescriptor*)descriptor, &hash_desc)) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-	desc_partition_name = ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
-	desc_salt = desc_partition_name + hash_desc.partition_name_len;
-	desc_digest = desc_salt + hash_desc.salt_len;
-
-	if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
-		avb_error("Partition name is not valid UTF-8.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-	/* Don't bother loading or validating unless the partition was
-	 * requested in the first place.
-	 */
-	found = avb_strv_find_str(requested_partitions,
-                            (const char*)desc_partition_name,
-                            hash_desc.partition_name_len);
-	if (found == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_OK;
-		goto out;
-	}
-	if (!avb_str_concat(part_name,
-                      sizeof part_name,
-                      (const char*)desc_partition_name,
-                      hash_desc.partition_name_len,
-                      ab_suffix,
-                      avb_strlen(ab_suffix))) {
-		avb_error("Partition name and suffix does not fit.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-	/* If we're allowing verification errors then hash_desc.image_size
-	 * may no longer match what's in the partition... so in this case
-	 * just load the entire partition.
-	 *
-	 * For example, this can happen if a developer does 'fastboot flash
-	 * boot /path/to/new/and/bigger/boot.img'. We want this to work
-	 * since it's such a common workflow.
-	 */
-	image_size = hash_desc.image_size;
-	if (0) {
-		if (ops->get_size_of_partition == NULL) {
-			avb_errorv(part_name,
-			": The get_size_of_partition() operation is "
-			"not implemented so we may not load the entire partition. "
-			"Please implement.",
-			NULL);
-		} else {
-			io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
-			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-				goto out;
-			} else if (io_ret != AVB_IO_RESULT_OK) {
-				avb_errorv(part_name, ": Error determining partition size.\n", NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-				goto out;
-			}
-			avb_debugv(part_name, ": Loading entire partition.\n", NULL);
-		}
-	}
-	image_buf = avb_malloc(image_size);
-	if (image_buf == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	}
-	io_ret = ops->read_from_partition(ops, part_name, 0 /* offset */, 
-					image_size, image_buf, &part_num_read);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-		goto out;
-	}
-	if (part_num_read != image_size) {
-		avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-		goto out;
-	}
-
-	if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
-		AvbSHA256Ctx sha256_ctx;
-		avb_sha256_init(&sha256_ctx);
-		avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
-		avb_sha256_update(&sha256_ctx, image_buf, hash_desc.image_size);
-		digest = avb_sha256_final(&sha256_ctx);
-		digest_len = AVB_SHA256_DIGEST_SIZE;
-	} else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
-		AvbSHA512Ctx sha512_ctx;
-		avb_sha512_init(&sha512_ctx);
-		avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
-		avb_sha512_update(&sha512_ctx, image_buf, hash_desc.image_size);
-		digest = avb_sha512_final(&sha512_ctx);
-		digest_len = AVB_SHA512_DIGEST_SIZE;
-	} else {
-		avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	if (digest_len != hash_desc.digest_len) {
-		avb_errorv(
-			part_name, ": Digest in descriptor not of expected size.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
-		avb_errorv(part_name,
-			": Hash of data does not match digest in descriptor.\n",
-			NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
-		goto out;
-	}
-
-	ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-	/* If it worked and something was loaded, copy to slot_data. */
-	if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
-		image_buf != NULL) {
-		AvbPartitionData* loaded_partition;
-		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
-			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto fail;
-		}
-		loaded_partition = &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
-		loaded_partition->partition_name = avb_strdup(found);
-		loaded_partition->data_size = image_size;
-		loaded_partition->data = image_buf;
-		image_buf = NULL;
-	}
-
-fail:
-	if (image_buf != NULL) {
-		avb_free(image_buf);
-	}
-	return ret;
-}
-
-static AvbSlotVerifyResult load_requested_partitions(
-	AvbOps* ops,
-	const char* const* requested_partitions,
-	const char* ab_suffix,
-	AvbSlotVerifyData* slot_data)
-{
-	AvbSlotVerifyResult ret;
-	uint8_t* image_buf = NULL;
-	size_t n;
-
-	if (ops->get_size_of_partition == NULL) {
-		avb_error("get_size_of_partition() not implemented.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
-		goto out;
-	}
-
-	for (n = 0; requested_partitions[n] != NULL; n++) {
-		char part_name[PART_NAME_MAX_SIZE];
-		AvbIOResult io_ret;
-		uint64_t image_size;
-		size_t part_num_read;
-		AvbPartitionData* loaded_partition;
-
-		if (!avb_str_concat(part_name,
-                        sizeof part_name,
-                        requested_partitions[n],
-                        avb_strlen(requested_partitions[n]),
-                        ab_suffix,
-                        avb_strlen(ab_suffix))) {
- 			avb_error("Partition name and suffix does not fit.\n");
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_errorv(part_name, ": Error determining partition size.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-		avb_debugv(part_name, ": Loading entire partition.\n", NULL);
-
-		image_buf = avb_malloc(image_size);
-		if (image_buf == NULL) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		}
-
-		io_ret = ops->read_from_partition(
-		ops, part_name, 0 /* offset */, image_size, image_buf, &part_num_read);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-		if (part_num_read != image_size) {
-			avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-
-		/* Move to slot_data. */
-		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
-			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		}
-		loaded_partition =
-			&slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
-		loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
-		if (loaded_partition->partition_name == NULL) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		}
-		loaded_partition->data_size = image_size;
-		loaded_partition->data = image_buf;
-		image_buf = NULL;
-	}
-
-	ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-	if (image_buf != NULL) {
-		avb_free(image_buf);
-	}
-	return ret;
-}
-
-static AvbSlotVerifyResult load_and_verify_vbmeta
-(
-	AvbOps* ops,
-	const char* const* requested_partitions,
-	const char* ab_suffix,
-	bool allow_verification_error,
-	AvbVBMetaImageFlags toplevel_vbmeta_flags,
-	int rollback_index_location,
-	const char* partition_name,
-	size_t partition_name_len,
-	const uint8_t* expected_public_key,
-	size_t expected_public_key_length,
-	AvbSlotVerifyData* slot_data,
-	AvbAlgorithmType* out_algorithm_type)
-{
-	char full_partition_name[PART_NAME_MAX_SIZE];
-	AvbSlotVerifyResult ret;
-	AvbIOResult io_ret;
-	size_t vbmeta_offset;
-	size_t vbmeta_size;
-	uint8_t* vbmeta_buf = NULL;
-	size_t vbmeta_num_read;
-	AvbVBMetaVerifyResult vbmeta_ret;
-	const uint8_t* pk_data;
-	size_t pk_len;
-	AvbVBMetaImageHeader vbmeta_header;
-	uint64_t stored_rollback_index;
-	const AvbDescriptor** descriptors = NULL;
-	size_t num_descriptors;
-	size_t n;
-	bool is_main_vbmeta;
-	bool is_vbmeta_partition;
-	AvbVBMetaData* vbmeta_image_data = NULL;
-
-	ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-	avb_assert(slot_data != NULL);
-
-	/* Since we allow top-level vbmeta in 'boot', use
-	 * rollback_index_location to determine whether we're the main
-	 * vbmeta struct.
-	 */
-	is_main_vbmeta = (rollback_index_location == 0);
-	is_vbmeta_partition = (avb_strcmp(partition_name, "vbmeta") == 0);
-
-	if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
-		avb_error("Partition name is not valid UTF-8.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	/* Construct full partition name. */
-	if (!avb_str_concat(full_partition_name,
-		sizeof full_partition_name,
-		partition_name,
-		partition_name_len,
-		ab_suffix,
-		avb_strlen(ab_suffix))) {
-		avb_error("Partition name and suffix does not fit.\n");
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	avb_debugv("Loading vbmeta struct from partition '",
-		full_partition_name,
-		"'.\n",
-		NULL);
-
-	/* If we're loading from the main vbmeta partition, the vbmeta
-	 * struct is in the beginning. Otherwise we have to locate it via a
-	 * footer.
-	 */
-	if (is_vbmeta_partition) {
-		vbmeta_offset = 0;
-		vbmeta_size = VBMETA_MAX_SIZE;
-	} else {
-		uint8_t footer_buf[AVB_FOOTER_SIZE];
-		size_t footer_num_read;
-		AvbFooter footer;
-
-		io_ret = ops->read_from_partition(ops,
-					full_partition_name,
-					-AVB_FOOTER_SIZE,
-					AVB_FOOTER_SIZE,
-					footer_buf,
-					&footer_num_read);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto out;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-		avb_assert(footer_num_read == AVB_FOOTER_SIZE);
-
-		if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,&footer)) {
-			avb_errorv(full_partition_name, ": Error validating footer.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		/* Basic footer sanity check since the data is untrusted. */
-		if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
-			avb_errorv(full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		vbmeta_offset = footer.vbmeta_offset;
-		vbmeta_size = footer.vbmeta_size;
-	}
-
-	vbmeta_buf = avb_malloc(vbmeta_size);
-	if (vbmeta_buf == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	}
-	io_ret = ops->read_from_partition(ops,
-					full_partition_name,
-					vbmeta_offset,
-					vbmeta_size,
-					vbmeta_buf,
-					&vbmeta_num_read);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		/* If we're looking for 'vbmeta' but there is no such partition,
-		* go try to get it from the boot partition instead.
-		*/
-		if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION && is_vbmeta_partition) {
-			avb_debugv(full_partition_name,
-			": No such partition. Trying 'boot' instead.\n",
-			NULL);
-			ret = load_and_verify_vbmeta(ops,
-					requested_partitions,
-					ab_suffix,
-					allow_verification_error,
-					0 /* toplevel_vbmeta_flags */,
-					0 /* rollback_index_location */,
-					"boot",
-					avb_strlen("boot"),
-					NULL /* expected_public_key */,
-					0 /* expected_public_key_length */,
-					slot_data,
-					out_algorithm_type);
-			goto out;
-		} else {
-			avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-			goto out;
-		}
-	}
-	avb_assert(vbmeta_num_read <= vbmeta_size);
-	/* Check if the image is properly signed and get the public key used
-	 * to sign the image.
-	 */
-	vbmeta_ret = avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
-	switch (vbmeta_ret) {
-	case AVB_VBMETA_VERIFY_RESULT_OK:
-		avb_assert(pk_data != NULL && pk_len > 0);
-		break;
-
-	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
-	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
-	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
-		avb_errorv(full_partition_name,
-			": Error verifying vbmeta image: ",
-			avb_vbmeta_verify_result_to_string(vbmeta_ret),
-			"\n",
-			NULL);
-		if (!allow_verification_error) {
-			goto out;
-		}
-		break;
-
-	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
-		/* No way to continue this case. */
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		avb_errorv(full_partition_name,
-			": Error verifying vbmeta image: invalid vbmeta header\n",
-			NULL);
-		goto out;
-
-	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
-		/* No way to continue this case. */
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
-		avb_errorv(full_partition_name,
-			": Error verifying vbmeta image: unsupported AVB version\n",
-			NULL);
-		goto out;
-	}
-
-	/* Byteswap the header. */
-	avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
-                                             &vbmeta_header);
-
-	/* If we're the toplevel, assign flags so they'll be passed down. */
-	if (is_main_vbmeta) {
-		toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
-	} else {
-		if (vbmeta_header.flags != 0) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			avb_errorv(full_partition_name,
-				": chained vbmeta image has non-zero flags\n",
-				NULL);
-			goto out;
-		}
-	}
-
-	/* Check if key used to make signature matches what is expected. */
-	if (pk_data != NULL) {
-		if (expected_public_key != NULL) {
-			avb_assert(!is_main_vbmeta);
-			if (expected_public_key_length != pk_len ||
-			avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
-				avb_errorv(full_partition_name,
-					": Public key used to sign data does not match key in chain "
-					"partition descriptor.\n",
-					NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
-				if (!allow_verification_error) {
-					goto out;
-				}
-			}
-		} else {
-			bool key_is_trusted = false;
-			const uint8_t* pk_metadata = NULL;
-			size_t pk_metadata_len = 0;
-
-			if (vbmeta_header.public_key_metadata_size > 0) {
-				pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
-				vbmeta_header.authentication_data_block_size +
-				vbmeta_header.public_key_metadata_offset;
-				pk_metadata_len = vbmeta_header.public_key_metadata_size;
-			}
-
-			avb_assert(is_main_vbmeta);
-			io_ret = ops->validate_vbmeta_public_key(
-				ops, pk_data, pk_len, pk_metadata, pk_metadata_len, &key_is_trusted);
-			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-				goto out;
-			} else if (io_ret != AVB_IO_RESULT_OK) {
-				avb_errorv(full_partition_name,
-				": Error while checking public key used to sign data.\n",
-				NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-				goto out;
-			}
-			if (!key_is_trusted) {
-				avb_errorv(full_partition_name,
-				": Public key used to sign data rejected.\n",
-				NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
-				if (!allow_verification_error) {
-					goto out;
-				}
-			}
-		}
-	}
-
-	/* Check rollback index. */
-	io_ret = ops->read_rollback_index(
-		ops, rollback_index_location, &stored_rollback_index);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		avb_errorv(full_partition_name,
-			": Error getting rollback index for location.\n",
-			NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-		goto out;
-	}
-	if (vbmeta_header.rollback_index < stored_rollback_index) {
-		avb_errorv(
-			full_partition_name,
-			": Image rollback index is less than the stored rollback index.\n",
-			NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
-		if (!allow_verification_error) {
-			goto out;
-		}
-	}
-
-	/* Copy vbmeta to vbmeta_images before recursing. */
-	if (is_main_vbmeta) {
-		avb_assert(slot_data->num_vbmeta_images == 0);
-	} else {
-		avb_assert(slot_data->num_vbmeta_images > 0);
-	}
-	if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
-		avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto out;
-	}
-	vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
-	vbmeta_image_data->partition_name = avb_strdup(partition_name);
-	vbmeta_image_data->vbmeta_data = vbmeta_buf;
-	/* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
-	 * and this includes data past the end of the image. Pass the
-	 * actual size of the vbmeta image. Also, no need to use
-	 * avb_safe_add() since the header has already been verified.
-	 */
-	vbmeta_image_data->vbmeta_size =
-	sizeof(AvbVBMetaImageHeader) +
-	vbmeta_header.authentication_data_block_size +
-	vbmeta_header.auxiliary_data_block_size;
-	vbmeta_image_data->verify_result = vbmeta_ret;
-  /* If verification has been disabled by setting a bit in the image,
-   * we're done... except that we need to load the entirety of the
-   * requested partitions.
-   */
-  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
-    AvbSlotVerifyResult sub_ret;
-    avb_debugv(
-        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
-    /* If load_requested_partitions() fail it is always a fatal
-     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
-     * than recoverable (e.g. one where result_should_continue()
-     * returns true) and we want to convey that error.
-     */
-    sub_ret = load_requested_partitions(
-        ops, requested_partitions, ab_suffix, slot_data);
-    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-      ret = sub_ret;
-    }
-    goto out;
-  }
-	/* Now go through all descriptors and take the appropriate action:
-	 *
-	 * - hash descriptor: Load data from partition, calculate hash, and
-	 *   checks that it matches what's in the hash descriptor.
-	 *
-	 * - hashtree descriptor: Do nothing since verification happens
-	 *   on-the-fly from within the OS.
-	 *
-	 * - chained partition descriptor: Load the footer, load the vbmeta
-	 *   image, verify vbmeta image (includes rollback checks, hash
-	 *   checks, bail on chained partitions).
-	 */
-	descriptors =
-	avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
-	for (n = 0; n < num_descriptors; n++) {
-		AvbDescriptor desc;
-
-		if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
-			avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-			goto out;
-		}
-
-		switch (desc.tag) {
-		case AVB_DESCRIPTOR_TAG_HASH: {
-			AvbSlotVerifyResult sub_ret;
-			sub_ret = load_and_verify_hash_partition(ops,
-                                                 requested_partitions,
-                                                 ab_suffix,
-                                                 allow_verification_error,
-                                                 descriptors[n],
-                                                 slot_data);
-			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-				ret = sub_ret;
-				if (!allow_verification_error || !result_should_continue(ret)) {
-					goto out;
-				}
-			}
-		} break;
-
-		case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
-			AvbSlotVerifyResult sub_ret;
-			AvbChainPartitionDescriptor chain_desc;
-			const uint8_t* chain_partition_name;
-			const uint8_t* chain_public_key;
-
-			/* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
-			if (!is_main_vbmeta) {
-				avb_errorv(full_partition_name,
-                     			": Encountered chain descriptor not in main image.\n",
-                     			NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			if (!avb_chain_partition_descriptor_validate_and_byteswap(
-				(AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
-				avb_errorv(full_partition_name,
-                    			 ": Chain partition descriptor is invalid.\n",
-                    			 NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			if (chain_desc.rollback_index_location == 0) {
-				avb_errorv(full_partition_name,
-                     			": Chain partition has invalid "
-                     			"rollback_index_location field.\n",
-                    			 NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			chain_partition_name = ((const uint8_t*)descriptors[n]) +
-                               sizeof(AvbChainPartitionDescriptor);
-			chain_public_key = chain_partition_name + chain_desc.partition_name_len;
-
-			sub_ret = load_and_verify_vbmeta(ops,
-                                         requested_partitions,
-                                         ab_suffix,
-                                         allow_verification_error,
-                                         toplevel_vbmeta_flags,
-                                         chain_desc.rollback_index_location,
-                                         (const char*)chain_partition_name,
-                                         chain_desc.partition_name_len,
-                                         chain_public_key,
-                                         chain_desc.public_key_len,
-                                         slot_data,
-                                         NULL /* out_algorithm_type */);
-			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-				ret = sub_ret;
-				if (!result_should_continue(ret)) {
-					goto out;
-				}
-			}
-		} break;
-
-		case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
-			const uint8_t* kernel_cmdline;
-			AvbKernelCmdlineDescriptor kernel_cmdline_desc;
-			bool apply_cmdline;
-
-			if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
-				(AvbKernelCmdlineDescriptor*)descriptors[n],
-				&kernel_cmdline_desc)) {
-				avb_errorv(full_partition_name,
-                     			": Kernel cmdline descriptor is invalid.\n",
-                     			NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			kernel_cmdline = ((const uint8_t*)descriptors[n]) +
-				sizeof(AvbKernelCmdlineDescriptor);
-
-			if (!avb_validate_utf8(kernel_cmdline,
-                               kernel_cmdline_desc.kernel_cmdline_length)) {
-				avb_errorv(full_partition_name,
-                     			": Kernel cmdline is not valid UTF-8.\n",
-                     			NULL);
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-				goto out;
-			}
-
-			/* Compare the flags for top-level VBMeta struct with flags in
-			 * the command-line descriptor so command-line snippets only
-			 * intended for a certain mode (dm-verity enabled/disabled)
-			 * are skipped if applicable.
-			 */
-			apply_cmdline = true;
-			if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
-				if (kernel_cmdline_desc.flags &
-  					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
-					apply_cmdline = false;
-				}
-			} else {
-				if (kernel_cmdline_desc.flags &
-					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
-					apply_cmdline = false;
-				}
-			}
-
-			if (apply_cmdline) {
-				if (slot_data->cmdline == NULL) {
-					slot_data->cmdline =
-					avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
-					if (slot_data->cmdline == NULL) {
-						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-						goto out;
-					}
-					avb_memcpy(slot_data->cmdline,
-                       				kernel_cmdline,
-                       				kernel_cmdline_desc.kernel_cmdline_length);
-					} else {
-					/* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
-					size_t orig_size = avb_strlen(slot_data->cmdline);
-					size_t new_size =
-                				orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
-					char* new_cmdline = avb_calloc(new_size);
-					if (new_cmdline == NULL) {
-						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-						goto out;
-					}
-					avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
-					new_cmdline[orig_size] = ' ';
-					avb_memcpy(new_cmdline + orig_size + 1,
- 					kernel_cmdline,
-					kernel_cmdline_desc.kernel_cmdline_length);
-					avb_free(slot_data->cmdline);
-					slot_data->cmdline = new_cmdline;
-				}
-			}
-		} break;
-
-		/* Explicit fall-through */
-		case AVB_DESCRIPTOR_TAG_PROPERTY:
-		case AVB_DESCRIPTOR_TAG_HASHTREE:
-		/* Do nothing. */
-		break;
-		}
-	}
-
-	if (rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
-		avb_errorv(
-		full_partition_name, ": Invalid rollback_index_location.\n", NULL);
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
-		goto out;
-	}
-
-	slot_data->rollback_indexes[rollback_index_location] =
-		vbmeta_header.rollback_index;
-
-	if (out_algorithm_type != NULL) {
-		*out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
-	}
-
-out:
-	/* If |vbmeta_image_data| isn't NULL it means that it adopted
-	 * |vbmeta_buf| so in that case don't free it here.
-	 */
-	if (vbmeta_image_data == NULL) {
-		if (vbmeta_buf != NULL) {
-			avb_free(vbmeta_buf);
-		}
-	}
-	if (descriptors != NULL) {
-		avb_free(descriptors);
-	}
-	return ret;
-}
-
-#define NUM_GUIDS 3
-
-/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
- * values. Returns NULL on OOM, otherwise the cmdline with values
- * replaced.
- */
-static char* sub_cmdline(AvbOps* ops,
-                         const char* cmdline,
-                         const char* ab_suffix,
-                         bool using_boot_for_vbmeta)
-{
-	const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
-	const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
-                                        "$(ANDROID_BOOT_PARTUUID)",
-                                        "$(ANDROID_VBMETA_PARTUUID)"};
-	char* ret = NULL;
-	AvbIOResult io_ret;
-	size_t n;
-
-	/* Special-case for when the top-level vbmeta struct is in the boot
-	 * partition.
-	 */
-	if (using_boot_for_vbmeta) {
-		part_name_str[2] = "boot";
-	}
-
-	/* Replace unique partition GUIDs */
-	for (n = 0; n < NUM_GUIDS; n++) {
-		char part_name[PART_NAME_MAX_SIZE];
-		char guid_buf[37];
-
-		if (!avb_str_concat(part_name,
-                        	sizeof part_name,
-                        	part_name_str[n],
-                        	avb_strlen(part_name_str[n]),
-                        	ab_suffix,
-                        	avb_strlen(ab_suffix))) {
-			avb_error("Partition name and suffix does not fit.\n");
-			goto fail;
-		}
-
-		io_ret = ops->get_unique_guid_for_partition(
-			ops, part_name, guid_buf, sizeof guid_buf);
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-			return NULL;
-		} else if (io_ret != AVB_IO_RESULT_OK) {
-			avb_error("Error getting unique GUID for partition.\n");
-			goto fail;
-		}
-
-		if (ret == NULL) {
-			ret = avb_replace(cmdline, replace_str[n], guid_buf);
-		} else {
-			char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
-			avb_free(ret);
- 			ret = new_ret;
-		}
-		if (ret == NULL) {
-			goto fail;
-		}
-	}
-
-	return ret;
-
-fail:
-	if (ret != NULL) {
-		avb_free(ret);
-	}
-	return NULL;
-}
-
-static int cmdline_append_option(AvbSlotVerifyData* slot_data,
-                                 const char* key,
-                                 const char* value)
-{
-	size_t offset, key_len, value_len;
-	char* new_cmdline;
-
-	key_len = avb_strlen(key);
-	value_len = avb_strlen(value);
-
-	offset = 0;
-	if (slot_data->cmdline != NULL) {
-		offset = avb_strlen(slot_data->cmdline);
-		if (offset > 0) {
-			offset += 1;
-		}
-	}
-
-	new_cmdline = avb_calloc(offset + key_len + value_len + 2);
-	if (new_cmdline == NULL) {
-		return 0;
-	}
-	if (offset > 0) {
-		avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
-		new_cmdline[offset - 1] = ' ';
-	}
-	avb_memcpy(new_cmdline + offset, key, key_len);
-	new_cmdline[offset + key_len] = '=';
-	avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
-	if (slot_data->cmdline != NULL) {
-		avb_free(slot_data->cmdline);
-	}
-	slot_data->cmdline = new_cmdline;
-
-	return 1;
-}
-
-#define AVB_MAX_DIGITS_UINT64 32
-
-/* Writes |value| to |digits| in base 10 followed by a NUL byte.
- * Returns number of characters written excluding the NUL byte.
- */
-static size_t uint64_to_base10(uint64_t value,
-                               char digits[AVB_MAX_DIGITS_UINT64])
-{
-	char rev_digits[AVB_MAX_DIGITS_UINT64];
-	size_t n, num_digits;
-
-	for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
-		rev_digits[num_digits++] = (value % 10) + '0';
-		value /= 10;
-		if (value == 0) {
-			break;
-		}
-	}
-
-	for (n = 0; n < num_digits; n++) {
-		digits[n] = rev_digits[num_digits - 1 - n];
-	}
-	digits[n] = '\0';
-	return n;
-}
-
-static int cmdline_append_version(AvbSlotVerifyData* slot_data,
-                                  const char* key,
-                                  uint64_t major_version,
-                                  uint64_t minor_version)
-{
-	char major_digits[AVB_MAX_DIGITS_UINT64];
-	char minor_digits[AVB_MAX_DIGITS_UINT64];
-	char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
-	size_t num_major_digits, num_minor_digits;
-
-	num_major_digits = uint64_to_base10(major_version, major_digits);
-	num_minor_digits = uint64_to_base10(minor_version, minor_digits);
-	avb_memcpy(combined, major_digits, num_major_digits);
-	combined[num_major_digits] = '.';
-	avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
-	combined[num_major_digits + 1 + num_minor_digits] = '\0';
-
-	return cmdline_append_option(slot_data, key, combined);
-}
-
-static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
-                                        const char* key,
-                                        uint64_t value)
-{
-	char digits[AVB_MAX_DIGITS_UINT64];
-	uint64_to_base10(value, digits);
-	return cmdline_append_option(slot_data, key, digits);
-}
-
-static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
-                              const char* key,
-                              const uint8_t* data,
-                              size_t data_len)
-{
-	char hex_digits[17] = "0123456789abcdef";
-	char* hex_data;
-	int ret;
-	size_t n;
-
-	hex_data = avb_malloc(data_len * 2 + 1);
-	if (hex_data == NULL) {
-		return 0;
-	}
-
-	for (n = 0; n < data_len; n++) {
-		hex_data[n * 2] = hex_digits[data[n] >> 4];
-		hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
-	}
-	hex_data[n * 2] = '\0';
-
-	ret = cmdline_append_option(slot_data, key, hex_data);
-	avb_free(hex_data);
-	return ret;
-}
-
-static AvbSlotVerifyResult append_options(
-    AvbOps* ops,
-    AvbSlotVerifyData* slot_data,
-    AvbVBMetaImageHeader* toplevel_vbmeta,
-    AvbAlgorithmType algorithm_type,
-    AvbHashtreeErrorMode hashtree_error_mode) {
-  AvbSlotVerifyResult ret;
-  const char* verity_mode = NULL;
-  bool is_device_unlocked;
-  AvbIOResult io_ret;
-
-  /* Add androidboot.vbmeta.device option. */
-  if (!cmdline_append_option(slot_data,
-                             "androidboot.vbmeta.device",
-                             "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Add androidboot.vbmeta.avb_version option. */
-  if (!cmdline_append_version(slot_data,
-                              "androidboot.vbmeta.avb_version",
-                              AVB_VERSION_MAJOR,
-                              AVB_VERSION_MINOR)) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
-  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
-  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  } else if (io_ret != AVB_IO_RESULT_OK) {
-    avb_error("Error getting device state.\n");
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
-    goto out;
-  }
-  if (!cmdline_append_option(slot_data,
-                             "androidboot.vbmeta.device_state",
-                             is_device_unlocked ? "unlocked" : "locked")) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
-   * function as is used to sign vbmeta.
-   */
-  switch (algorithm_type) {
-    /* Explicit fallthrough. */
-    case AVB_ALGORITHM_TYPE_NONE:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
-      AvbSHA256Ctx ctx;
-      size_t n, total_size = 0;
-      avb_sha256_init(&ctx);
-      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha256_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
-        total_size += slot_data->vbmeta_images[n].vbmeta_size;
-      }
-      if (!cmdline_append_option(
-              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
-          !cmdline_append_uint64_base10(
-              slot_data, "androidboot.vbmeta.size", total_size) ||
-          !cmdline_append_hex(slot_data,
-                              "androidboot.vbmeta.digest",
-                              avb_sha256_final(&ctx),
-                              AVB_SHA256_DIGEST_SIZE)) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      }
-    } break;
-    /* Explicit fallthrough. */
-    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
-    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
-      AvbSHA512Ctx ctx;
-      size_t n, total_size = 0;
-      avb_sha512_init(&ctx);
-      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
-        avb_sha512_update(&ctx,
-                          slot_data->vbmeta_images[n].vbmeta_data,
-                          slot_data->vbmeta_images[n].vbmeta_size);
-        total_size += slot_data->vbmeta_images[n].vbmeta_size;
-      }
-      if (!cmdline_append_option(
-              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
-          !cmdline_append_uint64_base10(
-              slot_data, "androidboot.vbmeta.size", total_size) ||
-          !cmdline_append_hex(slot_data,
-                              "androidboot.vbmeta.digest",
-                              avb_sha512_final(&ctx),
-                              AVB_SHA512_DIGEST_SIZE)) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto out;
-      }
-    } break;
-    case _AVB_ALGORITHM_NUM_TYPES:
-      avb_assert_not_reached();
-      break;
-  }
-
-  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
-  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
-    verity_mode = "disabled";
-  } else {
-    const char* dm_verity_mode = NULL;
-    char* new_ret;
-
-    switch (hashtree_error_mode) {
-      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
-        if (!cmdline_append_option(
-                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
-          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-          goto out;
-        }
-        verity_mode = "enforcing";
-        dm_verity_mode = "restart_on_corruption";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_RESTART:
-        verity_mode = "enforcing";
-        dm_verity_mode = "restart_on_corruption";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_EIO:
-        verity_mode = "eio";
-        /* For now there's no option to specify the EIO mode. So
-         * just use 'ignore_zero_blocks' since that's already set
-         * and dm-verity-target.c supports specifying this multiple
-         * times.
-         */
-        dm_verity_mode = "ignore_zero_blocks";
-        break;
-      case AVB_HASHTREE_ERROR_MODE_LOGGING:
-        verity_mode = "logging";
-        dm_verity_mode = "ignore_corruption";
-        break;
-    }
-    new_ret = avb_replace(
-        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
-    avb_free(slot_data->cmdline);
-    slot_data->cmdline = new_ret;
-    if (slot_data->cmdline == NULL) {
-      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-      goto out;
-    }
-  }
-  if (!cmdline_append_option(
-          slot_data, "androidboot.veritymode", verity_mode)) {
-    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-    goto out;
-  }
-
-  ret = AVB_SLOT_VERIFY_RESULT_OK;
-
-out:
-
-  return ret;
-}
-
-AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
-                                    const char* const* requested_partitions,
-                                    const char* ab_suffix,
-                                    AvbSlotVerifyFlags flags,
-                                    AvbHashtreeErrorMode hashtree_error_mode,
-                                    AvbSlotVerifyData** out_data)
-{
-	AvbSlotVerifyResult ret;
-	AvbSlotVerifyData* slot_data = NULL;
-	AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_SHA256_RSA4096;
-	bool using_boot_for_vbmeta = false;
-	AvbVBMetaImageHeader toplevel_vbmeta;
-	bool allow_verification_error =
-		(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
-
-	/* Fail early if we're missing the AvbOps needed for slot verification.
-	 *
-	 * For now, handle get_size_of_partition() not being implemented. In
-	 * a later release we may change that.
-	 */
-	avb_assert(ops->read_is_device_unlocked != NULL);
-	avb_assert(ops->read_from_partition != NULL);
-	avb_assert(ops->validate_vbmeta_public_key != NULL);
-	avb_assert(ops->read_rollback_index != NULL);
-	avb_assert(ops->get_unique_guid_for_partition != NULL);
-	/* avb_assert(ops->get_size_of_partition != NULL); */
-
-	if (out_data != NULL) {
-		*out_data = NULL;
-	}
-
-	/* Allowing dm-verity errors defeats the purpose of verified boot so
-	 * only allow this if set up to allow verification errors
-	 * (e.g. typically only UNLOCKED mode).
-	 */
-	if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
-		!allow_verification_error) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
-		goto fail;
-	}
-
-	slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
-	if (slot_data == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto fail;
-	}
-	slot_data->vbmeta_images =
-		avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
-	if (slot_data->vbmeta_images == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto fail;
-	}
-	slot_data->loaded_partitions =
-		avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
-	if (slot_data->loaded_partitions == NULL) {
-		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-		goto fail;
-	}
-
-	ret = load_and_verify_vbmeta(ops,
-                               requested_partitions,
-                               ab_suffix,
-                               allow_verification_error,
-                               0 /* toplevel_vbmeta_flags */,
-                               0 /* rollback_index_location */,
-                               "vbmeta",
-                               avb_strlen("vbmeta"),
-                               NULL /* expected_public_key */,
-                               0 /* expected_public_key_length */,
-                               slot_data,
-                               &algorithm_type);
-	if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
-		goto fail;
-	}
-
-	/* If things check out, mangle the kernel command-line as needed. */
-	if (result_should_continue(ret)) {
-		if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
-		avb_assert(
-  			avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
-			using_boot_for_vbmeta = true;
-		}
-
-		/* Byteswap top-level vbmeta header since we'll need it below. */
-		avb_vbmeta_image_header_to_host_byte_order(
-        		(const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
-        		&toplevel_vbmeta);
-
-		/* Fill in |ab_suffix| field. */
-		slot_data->ab_suffix = avb_strdup(ab_suffix);
-		if (slot_data->ab_suffix == NULL) {
-			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-			goto fail;
-		}
-
-    /* If verification is disabled, we are done ... we specifically
-     * don't want to add any androidboot.* options since verification
-     * is disabled.
-     */
-    if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
-      /* Since verification is disabled we didn't process any
-       * descriptors and thus there's no cmdline... so set root= such
-       * that the system partition is mounted.
-       */
-      avb_assert(slot_data->cmdline == NULL);
-      slot_data->cmdline =
-          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
-      if (slot_data->cmdline == NULL) {
-        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-        goto fail;
-      }
-    } else {
-      /* Add options - any failure in append_options() is either an
-       * I/O or OOM error.
-       */
-      AvbSlotVerifyResult sub_ret = append_options(ops,
-                                                   slot_data,
-                                                   &toplevel_vbmeta,
-                                                   algorithm_type,
-                                                   hashtree_error_mode);
-      if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
-        ret = sub_ret;
-        goto fail;
-      }
-    }
-
-		/* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
-		if (slot_data->cmdline != NULL) {
-			char* new_cmdline;
-			new_cmdline = sub_cmdline(
-			ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
-			if (new_cmdline == NULL) {
-				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
-				goto fail;
-			}
-			avb_free(slot_data->cmdline);
-			slot_data->cmdline = new_cmdline;
-		}
-
-		if (out_data != NULL) {
-			*out_data = slot_data;
-		} else {
-			avb_slot_verify_data_free(slot_data);
-		}
-	}
-
-	if (!allow_verification_error) {
-		avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
-	}
-
-	return ret;
-
-fail:
-	if (slot_data != NULL) {
-		avb_slot_verify_data_free(slot_data);
-	}
-	return ret;
-}
-
-void avb_slot_verify_data_free(AvbSlotVerifyData* data)
-{
-	if (data->ab_suffix != NULL) {
-		avb_free(data->ab_suffix);
-	}
-	if (data->cmdline != NULL) {
-		avb_free(data->cmdline);
-	}
-	if (data->vbmeta_images != NULL) {
-		size_t n;
-		for (n = 0; n < data->num_vbmeta_images; n++) {
-			AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
-			if (vbmeta_image->partition_name != NULL) {
-				avb_free(vbmeta_image->partition_name);
-			}
-			if (vbmeta_image->vbmeta_data != NULL) {
-				avb_free(vbmeta_image->vbmeta_data);
-			}
-		}
-		avb_free(data->vbmeta_images);
-	}
-	if (data->loaded_partitions != NULL) {
-		size_t n;
-		for (n = 0; n < data->num_loaded_partitions; n++) {
-			AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
-			if (loaded_partition->partition_name != NULL) {
-				avb_free(loaded_partition->partition_name);
-			}
-			if (loaded_partition->data != NULL) {
-				avb_free(loaded_partition->data);
-			}
-		}
-		avb_free(data->loaded_partitions);
-	}
-	avb_free(data);
-}
-
-const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result)
-{
-	const char* ret = NULL;
-
-	switch (result) {
-	case AVB_SLOT_VERIFY_RESULT_OK:
-		ret = "OK";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-		ret = "ERROR_OOM";
- 		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-		ret = "ERROR_IO";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-		ret = "ERROR_VERIFICATION";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-		ret = "ERROR_ROLLBACK_INDEX";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-		ret = "ERROR_PUBLIC_KEY_REJECTED";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-		ret = "ERROR_INVALID_METADATA";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-		ret = "ERROR_UNSUPPORTED_VERSION";
-		break;
-	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-		ret = "ERROR_INVALID_ARGUMENT";
-		break;
-	/* Do not add a 'default:' case here because of -Wswitch. */
-	}
-
-	if (ret == NULL) {
-		avb_error("Unknown AvbSlotVerifyResult value.\n");
-		ret = "(unknown)";
-	}
-
-	return ret;
-}
diff --git a/lib/avb/rk_libavb/avb_vbmeta_image.c b/lib/avb/rk_libavb/avb_vbmeta_image.c
deleted file mode 100644
index 76ea3ad230..0000000000
--- a/lib/avb/rk_libavb/avb_vbmeta_image.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-#include <android_avb/avb_vbmeta_image.h>
-#include <android_avb/avb_crypto.h>
-#include <android_avb/avb_rsa.h>
-#include <android_avb/avb_sha.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_version.h>
-
-AvbVBMetaVerifyResult avb_vbmeta_image_verify(
-    const uint8_t* data,
-    size_t length,
-    const uint8_t** out_public_key_data,
-    size_t* out_public_key_length)
-{
-	AvbVBMetaVerifyResult ret;
-	AvbVBMetaImageHeader h;
-	uint8_t* computed_hash;
-	const AvbAlgorithmData* algorithm;
-	AvbSHA256Ctx sha256_ctx;
-	AvbSHA512Ctx sha512_ctx;
-	const uint8_t* header_block;
-	const uint8_t* authentication_block;
-	const uint8_t* auxiliary_block;
-	int verification_result;
-
-	ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
-
-	if (out_public_key_data != NULL) {
-		*out_public_key_data = NULL;
-	}
-	if (out_public_key_length != NULL) {
-		*out_public_key_length = 0;
-	}
-
-	/* Ensure magic is correct. */
-	if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
-		avb_error("Magic is incorrect.\n");
-		goto out;
-	}
-
-	/* Before we byteswap, ensure length is long enough. */
-	if (length < sizeof(AvbVBMetaImageHeader)) {
-		avb_error("Length is smaller than header.\n");
-		goto out;
-	}
-	avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
-                                             &h);
-
-	/* Ensure we don't attempt to access any fields if we do not meet
-	 * the specified minimum version of libavb.
-	 */
-	if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
-		(h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
-		avb_error("Mismatch between image version and libavb version.\n");
-		ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
-		goto out;
-	}
-
-	/* Ensure |release_string| ends with a NUL byte. */
-	if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
-		avb_error("Release string does not end with a NUL byte.\n");
-		goto out;
-	}
-
-	/* Ensure inner block sizes are multiple of 64. */
-	if ((h.authentication_data_block_size & 0x3f) != 0 ||
-		(h.auxiliary_data_block_size & 0x3f) != 0) {
-		avb_error("Block size is not a multiple of 64.\n");
-		goto out;
-	}
-
-	/* Ensure block sizes all add up to at most |length|. */
-	uint64_t block_total = sizeof(AvbVBMetaImageHeader);
-	if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
-		!avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
-		avb_error("Overflow while computing size of boot image.\n");
-		goto out;
-	}
-	if (block_total > length) {
-		avb_error("Block sizes add up to more than given length.\n");
-		goto out;
-	}
-
-	uintptr_t data_ptr = (uintptr_t)data;
-	/* Ensure passed in memory doesn't wrap. */
-	if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
-		avb_error("Boot image location and length mismatch.\n");
-		goto out;
-	}
-
-	/* Ensure hash and signature are entirely in the Authentication data block. */
-	uint64_t hash_end;
-	if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
-		hash_end > h.authentication_data_block_size) {
-		avb_error("Hash is not entirely in its block.\n");
-		goto out;
-	}
-	uint64_t signature_end;
-	if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
-		signature_end > h.authentication_data_block_size) {
-		avb_error("Signature is not entirely in its block.\n");
-		goto out;
-	}
-
-	/* Ensure public key is entirely in the Auxiliary data block. */
-	uint64_t pubkey_end;
-	if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
-		pubkey_end > h.auxiliary_data_block_size) {
-		avb_error("Public key is not entirely in its block.\n");
-		goto out;
-	}
-
-	/* Ensure public key metadata (if set) is entirely in the Auxiliary
-	 * data block. */
-	if (h.public_key_metadata_size > 0) {
-		uint64_t pubkey_md_end;
-		if (!avb_safe_add(&pubkey_md_end,
-			h.public_key_metadata_offset,
-			h.public_key_metadata_size) ||
-			pubkey_md_end > h.auxiliary_data_block_size) {
-			avb_error("Public key metadata is not entirely in its block.\n");
-			goto out;
-		}
-	}
-
-	/* Bail early if there's no hash or signature. */
-	if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
-		ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
-		goto out;
-	}
-
-	/* Ensure algorithm field is supported. */
-	algorithm = avb_get_algorithm_data(h.algorithm_type);
-	if (!algorithm) {
-		avb_error("Invalid or unknown algorithm.\n");
-		goto out;
-	}
-
-	/* Bail if the embedded hash size doesn't match the chosen algorithm. */
-	if (h.hash_size != algorithm->hash_len) {
-		avb_error("Embedded hash has wrong size.\n");
-		goto out;
-	}
-
-	/* No overflow checks needed from here-on after since all block
-	 * sizes and offsets have been verified above.
-	 */
-
-	header_block = data;
-	authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
-	auxiliary_block = authentication_block + h.authentication_data_block_size;
-
-	switch (h.algorithm_type) {
-	/* Explicit fall-through: */
-	case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
-	case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
-	case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
-		avb_sha256_init(&sha256_ctx);
-		avb_sha256_update(
-			&sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
-		avb_sha256_update(
-			&sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
-		computed_hash = avb_sha256_final(&sha256_ctx);
-		break;
-	/* Explicit fall-through: */
-	case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
-	case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
-	case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
-		avb_sha512_init(&sha512_ctx);
-		avb_sha512_update(
-			&sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
-		avb_sha512_update(
-			&sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
-		computed_hash = avb_sha512_final(&sha512_ctx);
-		break;
-	default:
-		avb_error("Unknown algorithm.\n");
-		goto out;
-	}
-
-	if (avb_safe_memcmp(authentication_block + h.hash_offset,
-                      computed_hash,
-                      h.hash_size) != 0) {
-		avb_error("Hash does not match!\n");
-		ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
-		goto out;
-	}
-
-	verification_result = avb_rsa_verify(auxiliary_block + h.public_key_offset,
-					h.public_key_size,
-					authentication_block + h.signature_offset,
-					h.signature_size,
-					authentication_block + h.hash_offset,
-					h.hash_size,
-					algorithm->padding,
-					algorithm->padding_len);
-
-	if (verification_result == 0) {
-		ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
-		goto out;
-	}
-
-	if (h.public_key_size > 0) {
-		if (out_public_key_data != NULL) {
-			*out_public_key_data = auxiliary_block + h.public_key_offset;
-		}
-		if (out_public_key_length != NULL) {
-			*out_public_key_length = h.public_key_size;
-		}
-	}
-
-	ret = AVB_VBMETA_VERIFY_RESULT_OK;
-
-out:
-	return ret;
-}
-
-void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
-                                                AvbVBMetaImageHeader* dest)
-{
-	avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
-
-	dest->required_libavb_version_major =
-		avb_be32toh(dest->required_libavb_version_major);
-	dest->required_libavb_version_minor =
-		avb_be32toh(dest->required_libavb_version_minor);
-
-	dest->authentication_data_block_size =
-		avb_be64toh(dest->authentication_data_block_size);
-	dest->auxiliary_data_block_size =
-		avb_be64toh(dest->auxiliary_data_block_size);
-
-	dest->algorithm_type = avb_be32toh(dest->algorithm_type);
-
-	dest->hash_offset = avb_be64toh(dest->hash_offset);
-	dest->hash_size = avb_be64toh(dest->hash_size);
-
-	dest->signature_offset = avb_be64toh(dest->signature_offset);
-	dest->signature_size = avb_be64toh(dest->signature_size);
-
-	dest->public_key_offset = avb_be64toh(dest->public_key_offset);
-	dest->public_key_size = avb_be64toh(dest->public_key_size);
-
-	dest->public_key_metadata_offset =
-		avb_be64toh(dest->public_key_metadata_offset);
-	dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
-
-	dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
-	dest->descriptors_size = avb_be64toh(dest->descriptors_size);
-
-	dest->rollback_index = avb_be64toh(dest->rollback_index);
-	dest->flags = avb_be32toh(dest->flags);
-}
-
-const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result)
-{
-	const char* ret = NULL;
-
-	switch (result) {
-	case AVB_VBMETA_VERIFY_RESULT_OK:
-		ret = "OK";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
-		ret = "OK_NOT_SIGNED";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
-		ret = "INVALID_VBMETA_HEADER";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
-		ret = "UNSUPPORTED_VERSION";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
-		ret = "HASH_MISMATCH";
-		break;
-	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
-		ret = "SIGNATURE_MISMATCH";
-		break;
-	/* Do not add a 'default:' case here because of -Wswitch. */
-	}
-
-	if (ret == NULL) {
-		avb_error("Unknown AvbVBMetaVerifyResult value.\n");
-		ret = "(unknown)";
-	}
-
-	return ret;
-}
diff --git a/lib/avb/rk_libavb_ab/avb_ab_flow.c b/lib/avb/rk_libavb_ab/avb_ab_flow.c
deleted file mode 100644
index 9f1fa6df6e..0000000000
--- a/lib/avb/rk_libavb_ab/avb_ab_flow.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- *
- * Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use, copy,
- * modify, merge, publish, distribute, sublicense, and/or sell copies
- * of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-#include <common.h>
-#include <image.h>
-#include <android_image.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <mapmem.h>
-#include <errno.h>
-#include <command.h>
-#include <mmc.h>
-#include <blk.h>
-#include <part.h>
-#include <android_avb/libavb_ab.h>
-#include <config.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/types.h>
-#include <api_public.h>
-#include <android_avb/libavb.h>
-#include <android_avb/avb_util.h>
-#include <android_avb/avb_ab_flow.h>
-
-
-bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest)
-{
-	/* Ensure magic is correct. */
-	if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
-		avb_error("Magic is incorrect.\n");
-		return false;
-	}
-
-	avb_memcpy(dest, src, sizeof(AvbABData));
-	dest->crc32 = avb_be32toh(dest->crc32);
-
-	/* Ensure we don't attempt to access any fields if the major version
-	* is not supported.
-	*/
-	if (dest->version_major > AVB_AB_MAJOR_VERSION) {
-		avb_error("No support for given major version.\n");
-		return false;
-	}
-
-	/* Bail if CRC32 doesn't match. */
-	if (dest->crc32 !=
-		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1)) {
-		avb_error("CRC32 does not match.\n");
-		return false;
-	}
-
-	return true;
-}
-
-void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
-                                         AvbABData* dest)
-{
-	avb_memcpy(dest, src, sizeof(AvbABData));
-	dest->crc32 = avb_htobe32(
-		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1));
-}
-
-void avb_ab_data_init(AvbABData *data)
-{
-	avb_memset(data, '\0', sizeof(AvbABData));
-	avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
-	data->nb_slot = 2;
-	data->slot_suffix[0] = 'a';
-	data->slot_suffix[1] = 'b';
-	data->slot_suffix[2] = '\0';
-	data->slot_suffix[3] = '\0';
-	data->version_major = AVB_AB_MAJOR_VERSION;
-	data->version_minor = AVB_AB_MINOR_VERSION;
-	data->slots[0].priority = AVB_AB_MAX_PRIORITY;
-	data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-	data->slots[0].successful_boot = 0;
-	data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
-	data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-	data->slots[1].successful_boot = 0;
-}
-
-/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
- * following the 'struct bootloader_message' field. The struct is
- * compatible with the guidelines in bootable/recovery/bootloader.h -
- * e.g. it is stored in the |slot_suffix| field, starts with a
- * NUL-byte, and is 32 bytes long.
- */
-#define AB_METADATA_MISC_PARTITION_OFFSET 2048
-
-AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data)
-{
-	AvbOps* ops = ab_ops->ops;
-	ALLOC_CACHE_ALIGN_BUFFER(u8, serialized, 512);
-	size_t num_bytes_read;
-
-	memset(serialized,0,sizeof(u8) * 512);
-	ops->read_from_partition(ops,
-				"misc",
-				AB_METADATA_MISC_PARTITION_OFFSET,
-				512,
-				(AvbABData*)serialized,
-				&num_bytes_read);
-	if (!avb_ab_data_verify_and_byteswap((AvbABData*)serialized, data)) {
-	avb_error(
-		"Error validating A/B metadata from disk. "
-		"Resetting and writing new A/B metadata to disk.\n");
-		avb_ab_data_init(data);
-		return avb_ab_data_write(ab_ops, data);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
-	AvbOps* ops = ab_ops->ops;
-	AvbIOResult io_ret;
-	ALLOC_CACHE_ALIGN_BUFFER(u8, temp, 512);
-	memset(temp,0,sizeof(u8) * 512);
-
-	avb_ab_data_update_crc_and_byteswap(data, (AvbABData*)temp);
-	io_ret = ops->write_to_partition(ops,
-                                   "misc",
-                                   AB_METADATA_MISC_PARTITION_OFFSET,
-                                   512,
-                                   temp);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		return AVB_IO_RESULT_ERROR_OOM;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		avb_error("Error writing A/B metadata.\n");
-		return AVB_IO_RESULT_ERROR_IO;
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-static bool slot_is_bootable(AvbABSlotData* slot)
-{
-	return slot->priority > 0 &&
-		(slot->successful_boot || (slot->tries_remaining > 0));
-}
-
-static void slot_set_unbootable(AvbABSlotData* slot)
-{
-	slot->priority = 0;
-	slot->tries_remaining = 0;
-	slot->successful_boot = 0;
-}
-
-/* Ensure all unbootable and/or illegal states are marked as the
- * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
- * and successful_boot=0.
- */
-static void slot_normalize(AvbABSlotData* slot)
-{
-	if (slot->priority > 0) {
-		if (slot->tries_remaining == 0 && !slot->successful_boot) {
-		/* We've exhausted all tries -> unbootable. */
-		slot_set_unbootable(slot);
-	}
-	if (slot->tries_remaining > 0 && slot->successful_boot) {
-		/* Illegal state - avb_ab_mark_slot_successful() will clear
-		 * tries_remaining when setting successful_boot.
-		 */
-		slot_set_unbootable(slot);
-	}
-	} else {
-		slot_set_unbootable(slot);
-	}
-}
-
-static const char* slot_suffixes[2] = {"_a", "_b"};
-
-/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
- * success, error code otherwise.
- */
-AvbIOResult load_metadata(AvbABOps *ab_ops,
-				AvbABData *ab_data,
-				AvbABData *ab_data_orig)
-{
-	AvbIOResult io_ret;
-	io_ret = ab_ops->read_ab_metadata(ab_ops,ab_data);
-	if(io_ret != AVB_IO_RESULT_OK) {
-		avb_error("I/O error while loading A/B metadata.\n");
-		return io_ret;
-	}
-
-	*ab_data_orig = *ab_data;
-	slot_normalize(&ab_data->slots[0]);
-	slot_normalize(&ab_data->slots[1]);
-	return AVB_IO_RESULT_OK;
-}
-
-
-/* Writes A/B metadata to disk only if it has changed - returns
- * AVB_IO_RESULT_OK on success, error code otherwise.
- */
-static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
-                                            AvbABData* ab_data,
-                                            AvbABData* ab_data_orig)
-{
-	if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
-		avb_debug("Writing A/B metadata to disk.\n");
-		return ab_ops->write_ab_metadata(ab_ops, ab_data);
-	}
-	return AVB_IO_RESULT_OK;
-}
-
-AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
-                            const char* const* requested_partitions,
-                            AvbSlotVerifyFlags flags,
-                            AvbHashtreeErrorMode hashtree_error_mode,
-                            AvbSlotVerifyData** out_data)
-{
-	AvbOps* ops = ab_ops->ops;
-	AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
-	AvbSlotVerifyData* data = NULL;
-	AvbABFlowResult ret;
-	AvbABData ab_data, ab_data_orig;
-	size_t slot_index_to_boot, n;
-	AvbIOResult io_ret;
-	bool saw_and_allowed_verification_error = false;
-	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-		goto out;
-	}
-
-	/* Validate all bootable slots. */
-	for (n = 0; n < 2; n++) {
-		if (slot_is_bootable(&ab_data.slots[n])) {
-			AvbSlotVerifyResult verify_result;
-			bool set_slot_unbootable = false;
-
-			verify_result = avb_slot_verify(ops,
-                                      requested_partitions,
-                                      slot_suffixes[n],
-                                      flags,
-                                      hashtree_error_mode,
-                                      &slot_data[n]);
-			switch (verify_result) {
-			case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
-				ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-				goto out;
-
-			case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
-				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-				goto out;
-
-			case AVB_SLOT_VERIFY_RESULT_OK:
-				break;
-
-			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
-			case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
-			/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
-		 	 * these mean game over.
-		 	 */
-				set_slot_unbootable = true;
-				break;
-
-			/* explicit fallthrough. */
-			case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
-			case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
-			case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
-				if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
-				/* Do nothing since we allow this. */
-					avb_debugv("Allowing slot ",
-					slot_suffixes[n],
-					" which verified "
-					"with result ",
-					avb_slot_verify_result_to_string(verify_result),
-					" because "
-					"AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
-					"is set.\n",
-					NULL);
-					saw_and_allowed_verification_error = true;
-				} else {
-					set_slot_unbootable = true;
-				}
-				break;
-
-			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
-				ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
-				goto out;
-			/* Do not add a 'default:' case here because of -Wswitch. */
-			}
-
-			if (set_slot_unbootable) {
-				avb_errorv("Error verifying slot ",
-					slot_suffixes[n],
-					" with result ",
-					avb_slot_verify_result_to_string(verify_result),
-					" - setting unbootable.\n",
-					NULL);
-				slot_set_unbootable(&ab_data.slots[n]);
-			}
-		}
-	}
-
-	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
-		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
-			slot_index_to_boot = 1;
-		} else {
-			slot_index_to_boot = 0;
-		}
-		} else if (slot_is_bootable(&ab_data.slots[0])) {
-			slot_index_to_boot = 0;
-		} else if (slot_is_bootable(&ab_data.slots[1])) {
-			slot_index_to_boot = 1;
-		} else {
-		/* No bootable slots! */
-			avb_error("No bootable slots found.\n");
-			ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
-			goto out;
-		}
-
-		/* Update stored rollback index such that the stored rollback index
-		 * is the largest value supporting all currently bootable slots. Do
-		 * this for every rollback index location.
-		 */
-		for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
-			uint64_t rollback_index_value = 0;
-
-			if (slot_data[0] != NULL && slot_data[1] != NULL) {
-				uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
-				uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
-				rollback_index_value =
-				(a_rollback_index < b_rollback_index ? a_rollback_index
-								: b_rollback_index);
-			} else if (slot_data[0] != NULL) {
-				rollback_index_value = slot_data[0]->rollback_indexes[n];
-			} else if (slot_data[1] != NULL) {
-				rollback_index_value = slot_data[1]->rollback_indexes[n];
-			}
-
-			if (rollback_index_value != 0) {
-				uint64_t current_rollback_index_value;
-				io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
-				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-					goto out;
-			} else if (io_ret != AVB_IO_RESULT_OK) {
-				avb_error("Error getting rollback index for slot.\n");
-				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-				goto out;
-			}
-			if (current_rollback_index_value != rollback_index_value) {
-				io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
-				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
- 					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-					goto out;
-				} else if (io_ret != AVB_IO_RESULT_OK) {
-					avb_error("Error setting stored rollback index.\n");
-          				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-          				goto out;
-				}
-			}
-		}
-	}
-
-	/* Finally, select this slot. */
-	avb_assert(slot_data[slot_index_to_boot] != NULL);
-	data = slot_data[slot_index_to_boot];
-	slot_data[slot_index_to_boot] = NULL;
-	if (saw_and_allowed_verification_error) {
-		avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
-		ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
-	} else {
-		ret = AVB_AB_FLOW_RESULT_OK;
-	}
-
-	/* ... and decrement tries remaining, if applicable. */
-	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
-		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
-		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
-	}
-
-out:
-	io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	if (io_ret != AVB_IO_RESULT_OK) {
-		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-	} else {
-			ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-		}
-		if (data != NULL) {
-			avb_slot_verify_data_free(data);
-			data = NULL;
-		}
-	}
-
-	for (n = 0; n < 2; n++) {
-		if (slot_data[n] != NULL) {
-			avb_slot_verify_data_free(slot_data[n]);
-		}
-	}
-
-	if (out_data != NULL) {
-		*out_data = data;
-	} else {
-		if (data != NULL) {
-			avb_slot_verify_data_free(data);
-		}
-	}
-
-	return ret;
-}
-
-AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[])
-{
-	AvbABFlowResult ret = 0;
-	AvbIOResult io_ret = 0;
-	AvbABData ab_data, ab_data_orig;
-	size_t slot_index_to_boot;
-	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
-		goto out;
-	} else if (io_ret != AVB_IO_RESULT_OK) {
-		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
-		goto out;
-	}
-	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
-		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
-			slot_index_to_boot = 1;
-		} else {
-			slot_index_to_boot = 0;
-		}
-	} else if(slot_is_bootable(&ab_data.slots[0])) {
-		slot_index_to_boot = 0;
-	} else if(slot_is_bootable(&ab_data.slots[1])) {
-		slot_index_to_boot = 1;
-	} else {
-		avb_error("No bootable slots found.\n");
-		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
-		goto out;
-	}
-	if (slot_index_to_boot == 0) {
-		select_slot[0] = '_';
-		select_slot[1] = 'a';
-		select_slot[2] = '\0';
-	} else if(slot_index_to_boot == 1) {
-		select_slot[0] = '_';
-		select_slot[1] = 'b';
-		select_slot[2] = '\0';
-	}
-out:
-	return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_active(AvbABOps *ab_ops,
-                                    unsigned int slot_number)
-{
-	AvbABData ab_data, ab_data_orig;
-	unsigned int other_slot_number;
-	AvbIOResult ret;
-
-	if( slot_number > 1) {
-		avb_error("slot_number can not > 1");
-		return -1;
-	}
-	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (ret != AVB_IO_RESULT_OK) {
-		goto out;
-	}
-	/* Make requested slot top priority, unsuccessful, and with max tries. */
-	ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
-	ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
-	ab_data.slots[slot_number].successful_boot = 0;
-
-	/* Ensure other slot doesn't have as high a priority. */
-	other_slot_number = 1 - slot_number;
-	if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
-		ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
-	}
-
-	ret = AVB_IO_RESULT_OK;
-
-out:
-	if (ret == AVB_IO_RESULT_OK) {
-		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	}
-	return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps *ab_ops,
-                                        unsigned int slot_number)
-{
-	AvbABData ab_data, ab_data_orig;
-	AvbIOResult ret;
-
-	if( slot_number > 1) {
-		avb_error("slot_number can not > 1");
-		return -1;
-	}
-
-	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (ret != AVB_IO_RESULT_OK) {
-		goto out;
-	}
-
-	slot_set_unbootable(&ab_data.slots[slot_number]);
-
-	ret = AVB_IO_RESULT_OK;
-
-out:
-	if (ret == AVB_IO_RESULT_OK) {
-		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	}
-	return ret;
-}
-
-AvbIOResult avb_ab_mark_slot_successful(AvbABOps *ab_ops,
-                                        unsigned int slot_number)
-{
-	AvbABData ab_data, ab_data_orig;
-	AvbIOResult ret;
-
-	if( slot_number > 1) {
-		avb_error("slot_number can not > 1");
-		return -1;
-	}
-
-	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
-	if (ret != AVB_IO_RESULT_OK) {
-		goto out;
-	}
-
-	if (!slot_is_bootable(&ab_data.slots[slot_number])) {
-		avb_error("Cannot mark unbootable slot as successful.\n");
-		ret = AVB_IO_RESULT_OK;
-		goto out;
-	}
-
-	ab_data.slots[slot_number].tries_remaining = 0;
-	ab_data.slots[slot_number].successful_boot = 1;
-
-	ret = AVB_IO_RESULT_OK;
-
-out:
-	if (ret == AVB_IO_RESULT_OK) {
-		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
-	}
-	return ret;
-}
-
-const char *avb_ab_flow_result_to_string(AvbABFlowResult result)
-{
-	const char* ret = NULL;
-
-	switch (result) {
-	case AVB_AB_FLOW_RESULT_OK:
-		ret = "OK";
-		break;
-
-	case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
-		ret = "OK_WITH_VERIFICATION_ERROR";
-		break;
-
-	case AVB_AB_FLOW_RESULT_ERROR_OOM:
-		ret = "ERROR_OOM";
-		break;
-
-	case AVB_AB_FLOW_RESULT_ERROR_IO:
-		ret = "ERROR_IO";
-		break;
-
-	case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
-		ret = "ERROR_NO_BOOTABLE_SLOTS";
-		break;
-	case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
-		ret = "ERROR_INVALID_ARGUMENT";
-		break;
-	/* Do not add a 'default:' case here because of -Wswitch. */
-	}
-
-	if (ret == NULL) {
-		avb_error("Unknown AvbABFlowResult value.\n");
-		ret = "(unknown)";
-	}
-
-	return ret;
-}

commit fac2f0408a1fdd0f6aa1aa3d48951388c9b658cd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Feb 10 09:41:12 2018 +0800

    common: board_r: init env before board_init()
    
    We need to get and update env if we need to read kernel dtb in board_init().
    Note that the env is NOWHERE now, or else we need to init emmc first if
    ENV_IS_IN_MMC.
    
    Change-Id: I22685fea77315811f3ff2bac7fb29d3b9206be34
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/board_r.c b/common/board_r.c
index 09167c13cc..582a155e98 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -704,6 +704,9 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_DM
 	initr_dm,
 #endif
+#ifdef CONFIG_USING_KERNEL_DTB
+	initr_env,
+#endif
 #if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
 	board_init,	/* Setup chipselects */
 #endif
@@ -771,7 +774,9 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_MMC
 	initr_mmc,
 #endif
+#ifndef CONFIG_USING_KERNEL_DTB
 	initr_env,
+#endif
 #ifdef CONFIG_SYS_BOOTPARAMS_LEN
 	initr_malloc_bootparams,
 #endif

commit 7048c21cd453ddd702e51e28f12c4caf076e2bd7
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Feb 7 11:05:29 2018 +0800

    ARM: dts: rockchip: fix usb-phy node for px30
    
    Fix the reference clock source for usb-phy on rockchip px30 SoC.
    
    Change-Id: I1a458acd03e21b8824eba24f128bc2fcf0ad306b
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index 560d3eebfe..793d60d0cd 100644
--- a/arch/arm/dts/px30.dtsi
+++ b/arch/arm/dts/px30.dtsi
@@ -657,7 +657,7 @@
 			compatible = "rockchip,px30-usb2phy",
 				     "rockchip,rk3328-usb2phy";
 			reg = <0x100 0x10>;
-			clocks = <&cru SCLK_USBPHY_REF>;
+			clocks = <&pmucru SCLK_USBPHY_REF>;
 			clock-names = "phyclk";
 			#clock-cells = <0>;
 			assigned-clocks = <&cru USB480M>;

commit 065655143ece0dd8f414b21b8b7f4d9c6b4dced0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Feb 9 18:17:59 2018 +0800

    phy: phy-rockchip-inno-usb2: amend dt parse api
    
    This change amend getting PHY udevice direct instead of parsing
    ofnode_path step by step.
    
    Change-Id: I145f5ef8361c471f3e69f193430e98ef8168b901
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index f6d00c7edc..2848ed2722 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -183,88 +183,6 @@ static inline bool property_enabled(void __iomem *base,
 	return tmp == reg->enable;
 }
 
-static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
-{
-	const struct rockchip_usb2phy_cfg *phy_cfgs;
-	ofnode u2phy_node = ofnode_null();
-	ofnode grf_node = ofnode_null();
-	void __iomem *usbgrf_base = NULL;
-	void __iomem *grf_base = NULL;
-	struct udevice *udev;
-	fdt_size_t size;
-	u32 reg, index;
-	int ret;
-
-	memset((void *)rphy, 0, sizeof(struct rockchip_usb2phy));
-
-	u2phy_node = ofnode_path("/usb2-phy");
-	if (ofnode_valid(u2phy_node)) {
-		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
-			grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-		if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf"))
-			usbgrf_base =
-				syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
-		else
-			usbgrf_base = NULL;
-	} else {
-		grf_node = ofnode_path("/syscon-usb");
-		if (ofnode_valid(grf_node)) {
-			grf_base = (void __iomem *)
-				ofnode_get_addr_size(grf_node, "reg", &size);
-			u2phy_node = ofnode_find_subnode(grf_node, "usb2-phy");
-		}
-	}
-
-	if (!grf_base && !usbgrf_base) {
-		pr_err("%s: get grf/usbgrf node failed\n", __func__);
-		return -EINVAL;
-	}
-
-	if (!ofnode_valid(u2phy_node)) {
-		pr_err("%s: missing u2phy node\n", __func__);
-		return -EINVAL;
-	}
-
-	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
-		pr_err("%s: could not read reg from u2phy node\n", __func__);
-		return -EINVAL;
-	}
-
-	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &udev);
-	if (ret) {
-		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
-		return -ENODEV;
-	}
-
-	phy_cfgs =
-		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(udev);
-	if (!phy_cfgs) {
-		pr_err("%s: unable to get phy_cfgs\n", __func__);
-		return -EINVAL;
-	}
-
-	/* find out a proper config which can be matched with dt. */
-	index = 0;
-	while (phy_cfgs[index].reg) {
-		if (phy_cfgs[index].reg == reg) {
-			rphy->phy_cfg = &phy_cfgs[index];
-			break;
-		}
-		++index;
-	}
-
-	if (!rphy->phy_cfg) {
-		pr_err("%s: no phy-config can be matched\n", __func__);
-		return -EINVAL;
-	}
-
-	rphy->grf_base = grf_base;
-	rphy->usbgrf_base = usbgrf_base;
-
-	return 0;
-}
-
 static const char *chg_to_string(enum power_supply_type chg_type)
 {
 	switch (chg_type) {
@@ -330,57 +248,59 @@ int rockchip_chg_get_type(void)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
 	enum power_supply_type chg_type;
-	struct rockchip_usb2phy rphy;
+	struct rockchip_usb2phy *rphy;
+	struct udevice *udev;
 	void __iomem *base;
 	bool is_dcd, vout;
 	int ret;
 
-	ret = rockchip_usb2phy_parse(&rphy);
-	if (ret) {
-		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
+	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	if (ret == -ENODEV) {
+		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return ret;
 	}
 
-	base = get_reg_base(&rphy);
-	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	rphy = dev_get_priv(udev);
+	base = get_reg_base(rphy);
+	port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
 	/* Suspend USB-PHY and put the controller in non-driving mode */
 	property_enable(base, &port_cfg->phy_sus, true);
-	property_enable(base, &rphy.phy_cfg->chg_det.opmode, false);
+	property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);
 
-	rphy.dcd_retries = CHG_DCD_MAX_RETRIES;
-	rphy.primary_retries = CHG_PRI_MAX_RETRIES;
+	rphy->dcd_retries = CHG_DCD_MAX_RETRIES;
+	rphy->primary_retries = CHG_PRI_MAX_RETRIES;
 
 	/* stage 1, start DCD processing stage */
-	rockchip_chg_enable_dcd(&rphy, true);
+	rockchip_chg_enable_dcd(rphy, true);
 
-	while (rphy.dcd_retries--) {
+	while (rphy->dcd_retries--) {
 		mdelay(CHG_DCD_POLL_TIME);
 
 		/* get data contact detection status */
-		is_dcd = property_enabled(rphy.grf_base,
-					  &rphy.phy_cfg->chg_det.dp_det);
+		is_dcd = property_enabled(rphy->grf_base,
+					  &rphy->phy_cfg->chg_det.dp_det);
 
-		if (is_dcd || !rphy.dcd_retries) {
+		if (is_dcd || !rphy->dcd_retries) {
 			/*
 			 * stage 2, turn off DCD circuitry, then
 			 * voltage source on DP, probe on DM.
 			 */
-			rockchip_chg_enable_dcd(&rphy, false);
-			rockchip_chg_enable_primary_det(&rphy, true);
+			rockchip_chg_enable_dcd(rphy, false);
+			rockchip_chg_enable_primary_det(rphy, true);
 			break;
 		}
 	}
 
 	mdelay(CHG_PRIMARY_DET_TIME);
-	vout = property_enabled(rphy.grf_base,
-				&rphy.phy_cfg->chg_det.cp_det);
-	rockchip_chg_enable_primary_det(&rphy, false);
+	vout = property_enabled(rphy->grf_base,
+				&rphy->phy_cfg->chg_det.cp_det);
+	rockchip_chg_enable_primary_det(rphy, false);
 	if (vout) {
 		/* stage 3, voltage source on DM, probe on DP */
-		rockchip_chg_enable_secondary_det(&rphy, true);
+		rockchip_chg_enable_secondary_det(rphy, true);
 	} else {
-		if (!rphy.dcd_retries) {
+		if (!rphy->dcd_retries) {
 			/* floating charger found */
 			chg_type = POWER_SUPPLY_TYPE_USB_FLOATING;
 			goto out;
@@ -389,10 +309,10 @@ int rockchip_chg_get_type(void)
 			 * Retry some times to make sure that it's
 			 * really a USB SDP charger.
 			 */
-			vout = rockchip_chg_primary_det_retry(&rphy);
+			vout = rockchip_chg_primary_det_retry(rphy);
 			if (vout) {
 				/* stage 3, voltage source on DM, probe on DP */
-				rockchip_chg_enable_secondary_det(&rphy, true);
+				rockchip_chg_enable_secondary_det(rphy, true);
 			} else {
 				/* USB SDP charger found */
 				chg_type = POWER_SUPPLY_TYPE_USB;
@@ -402,10 +322,10 @@ int rockchip_chg_get_type(void)
 	}
 
 	mdelay(CHG_SECONDARY_DET_TIME);
-	vout = property_enabled(rphy.grf_base,
-				&rphy.phy_cfg->chg_det.dcp_det);
+	vout = property_enabled(rphy->grf_base,
+				&rphy->phy_cfg->chg_det.dcp_det);
 	/* stage 4, turn off voltage source */
-	rockchip_chg_enable_secondary_det(&rphy, false);
+	rockchip_chg_enable_secondary_det(rphy, false);
 	if (vout)
 		chg_type = POWER_SUPPLY_TYPE_USB_DCP;
 	else
@@ -413,7 +333,7 @@ int rockchip_chg_get_type(void)
 
 out:
 	/* Resume USB-PHY and put the controller in normal mode */
-	property_enable(base, &rphy.phy_cfg->chg_det.opmode, true);
+	property_enable(base, &rphy->phy_cfg->chg_det.opmode, true);
 	property_enable(base, &port_cfg->phy_sus, false);
 
 	debug("charger is %s\n", chg_to_string(chg_type));
@@ -424,21 +344,23 @@ out:
 void otg_phy_init(struct dwc2_udc *dev)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	struct rockchip_usb2phy rphy;
+	struct rockchip_usb2phy *rphy;
+	struct udevice *udev;
 	void __iomem *base;
 	int ret;
 
-	ret = rockchip_usb2phy_parse(&rphy);
-	if (ret) {
-		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
+	ret = uclass_get_device(UCLASS_PHY, 0, &udev);
+	if (ret == -ENODEV) {
+		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return;
 	}
 
-	base = get_reg_base(&rphy);
-	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	rphy = dev_get_priv(udev);
+	base = get_reg_base(rphy);
+	port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
 	/* Set the USB-PHY COMMONONN to 1'b0 to ensure USB's clocks */
-	property_enable(base, &rphy.phy_cfg->clkout_ctl, false);
+	property_enable(base, &rphy->phy_cfg->clkout_ctl, false);
 
 	/* Reset USB-PHY */
 	property_enable(base, &port_cfg->phy_sus, true);

commit 335adcb55f47e6021f59c77de88d48046b5e755a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Feb 9 20:19:58 2018 +0800

    rockchip: video: fix for lvds display
    
    lvds panel do not need phy.
    add panel->node for separate panel dts node.
    
    Change-Id: I07e9e1365bd6a080f04af8e7bc4635e3c48bed06
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index c3dde0ff86..1c05de3383 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -125,9 +125,10 @@ static struct udevice *get_panel_device(struct display_state *state, ofnode conn
 							  np_to_ofnode(panel),
 							  &dev);
 			if (ret) {
-				printf("Warn: can't find crtc driver\n");
+				printf("Warn: can't find panel drv %d\n", ret);
 				continue;
 			}
+			panel_state->node = np_to_ofnode(panel);
 			return dev;
 		}
 	}
@@ -146,7 +147,7 @@ static int connector_phy_init(struct display_state *state)
 					   &dev);
 	if (ret) {
 		printf("Warn: can't find phy driver\n");
-		return ret;
+		return 0;
 	}
 	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
@@ -843,7 +844,7 @@ static int rockchip_display_probe(struct udevice *dev)
 						  np_to_ofnode(vop_node),
 						  &crtc_dev);
 		if (ret) {
-			printf("Warn: can't find crtc driver\n");
+			printf("Warn: can't find crtc driver %d\n", ret);
 			continue;
 		}
 		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);

commit e18a7d002c12b3af1a2fd09b988df46582a0e732
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 20:11:34 2018 +0800

    configs: px30_common.h: enable CONFIG_PREBOOT
    
    Change-Id: I5b2055ab20917a0ee0ef8181e23a5f3c97203c5c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 657c5d4db4..e8d8d4cc23 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -41,7 +41,7 @@
 #define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
-
+#define CONFIG_PREBOOT
 
 #ifndef CONFIG_SPL_BUILD
 

commit 93f9f01933ecd59b8051642aa3391c25cc660ead
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 11:36:21 2018 +0800

    rockchip: px30: enable ARM_SMCCC
    
    Change-Id: Ifce57bda8c40c849c85135eecb13c9c361a19363
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 6d44919b95..ad488a53b4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -4,6 +4,7 @@ config ROCKCHIP_PX30
 	bool "Support Rockchip PX30"
 	select ARM64
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options

commit f7df4e785970d5bd2548149f08dac3e61a68d13e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 10:19:28 2018 +0800

    configs: evb-px30: enable charge animation
    
    Change-Id: If1955f5df956914cb30130ee0666aff98504071c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 164fd2161b..4047cae04d 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -99,3 +99,6 @@ CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_DM_REGULATOR=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_DM_FUEL_GAUGE=y

commit ac1dc0c37a5bde2bf6a399028a52c0fbe3f99d65
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 18:02:09 2018 +0800

    charge animation: export struct charge_animation_pdata
    
    This is the most flexsible way for all fuel gauge driver to get
    fdt config info from charge animation platdata.
    
    Change-Id: I33aa52c34f2c62c10b58003a10e5a8d1d6e5d7d3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/charge.c b/cmd/charge.c
index a9ee0d4306..a06eae90c7 100644
--- a/cmd/charge.c
+++ b/cmd/charge.c
@@ -8,6 +8,7 @@
 #include <command.h>
 #include <dm.h>
 #include <power/charge_display.h>
+#include <power/charge_animation.h>
 
 static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 			  char *const argv[])
@@ -15,6 +16,7 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 	int on_soc, on_voltage, screen_voltage;
 	int ret, save[3];
 	struct udevice *dev;
+	struct charge_animation_pdata *pdata;
 
 	if (argc != 4 && argc != 1)
 		return CMD_RET_USAGE;
@@ -30,9 +32,10 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 	}
 
 	if (argc == 4) {
-		save[0] = charge_display_get_power_on_soc(dev);
-		save[1] = charge_display_get_power_on_voltage(dev);
-		save[2] = charge_display_get_screen_on_voltage(dev);
+		pdata = dev_get_platdata(dev);
+		save[0] = pdata->exit_charge_level;
+		save[1] = pdata->exit_charge_voltage;
+		save[2] = pdata->screen_on_voltage;
 
 		on_soc = simple_strtoul(argv[1], NULL, 0);
 		on_voltage = simple_strtoul(argv[2], NULL, 0);
@@ -40,16 +43,15 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 		debug("new: on_soc=%d, on_voltage=%d, screen_voltage=%d\n",
 		      on_soc, on_voltage, screen_voltage);
 
-		charge_display_set_power_on_soc(dev, on_soc);
-		charge_display_set_power_on_voltage(dev, on_voltage);
-		charge_display_set_screen_on_voltage(dev, screen_voltage);
+		pdata->exit_charge_level = on_soc;
+		pdata->exit_charge_voltage = on_voltage;
+		pdata->screen_on_voltage = screen_voltage;
 
 		charge_display_show(dev);
 
-		charge_display_set_power_on_soc(dev, save[0]);
-		charge_display_set_power_on_voltage(dev, save[1]);
-		charge_display_set_screen_on_voltage(dev, save[2]);
-
+		pdata->exit_charge_level = save[0];
+		pdata->exit_charge_voltage = save[1];
+		pdata->screen_on_voltage = save[2];
 	} else if (argc == 1) {
 		charge_display_show(dev);
 	} else {
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index d3899b972f..7d3f16457c 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -9,36 +9,6 @@
 #include <dm.h>
 #include <power/charge_display.h>
 
-int charge_display_get_power_on_soc(struct udevice *dev)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->get_power_on_soc)
-		return -ENOSYS;
-
-	return ops->get_power_on_soc(dev);
-}
-
-int charge_display_get_power_on_voltage(struct udevice *dev)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->get_power_on_voltage)
-		return -ENOSYS;
-
-	return ops->get_power_on_voltage(dev);
-}
-
-int charge_display_get_screen_on_voltage(struct udevice *dev)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->get_screen_on_voltage)
-		return -ENOSYS;
-
-	return ops->get_screen_on_voltage(dev);
-}
-
 int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
@@ -49,36 +19,6 @@ int charge_display_show(struct udevice *dev)
 	return ops->show(dev);
 }
 
-int charge_display_set_power_on_soc(struct udevice *dev, int val)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->set_power_on_soc)
-		return -ENOSYS;
-
-	return ops->set_power_on_soc(dev, val);
-}
-
-int charge_display_set_power_on_voltage(struct udevice *dev, int val)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->set_power_on_voltage)
-		return -ENOSYS;
-
-	return ops->set_power_on_voltage(dev, val);
-}
-
-int charge_display_set_screen_on_voltage(struct udevice *dev, int val)
-{
-	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
-
-	if (!ops || !ops->set_screen_on_voltage)
-		return -ENOSYS;
-
-	return ops->set_screen_on_voltage(dev, val);
-}
-
 UCLASS_DRIVER(charge_display) = {
 	.id	= UCLASS_CHARGE_DISPLAY,
 	.name	= "charge_display",
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 597eea10e9..b462e4a84c 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -16,6 +16,7 @@
 #include <asm/suspend.h>
 #include <linux/input.h>
 #include <power/charge_display.h>
+#include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
@@ -39,85 +40,6 @@ struct charge_animation_priv {
 	int image_num;
 };
 
-struct charge_animation_pdata {
-	int android_charge;
-	int uboot_charge;
-
-	int exit_charge_voltage;
-	int exit_charge_level;
-
-	int low_power_voltage;
-
-	int screen_on_voltage;
-	int system_suspend;
-};
-
-static int charge_animation_get_power_on_soc(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	return pdata->exit_charge_level;
-}
-
-static int charge_animation_get_power_on_voltage(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	return pdata->exit_charge_voltage;
-}
-
-static int charge_animation_get_screen_on_voltage(struct udevice *dev)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	return pdata->screen_on_voltage;
-}
-
-static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	pdata->exit_charge_level = val;
-
-	return 0;
-}
-
-static int charge_animation_set_power_on_voltage(struct udevice *dev, int val)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	pdata->exit_charge_voltage = val;
-
-	return 0;
-}
-
-static int charge_animation_set_screen_on_voltage(struct udevice *dev, int val)
-{
-	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
-
-	if (!pdata)
-		return -ENOSYS;
-
-	pdata->screen_on_voltage = val;
-
-	return 0;
-}
-
 /*
  * IF you want to use your own charge images, please:
  *
@@ -590,12 +512,6 @@ static int charge_animation_show(struct udevice *dev)
 }
 
 static const struct dm_charge_display_ops charge_animation_ops = {
-	.get_power_on_soc = charge_animation_get_power_on_soc,
-	.get_power_on_voltage = charge_animation_get_power_on_voltage,
-	.get_screen_on_voltage = charge_animation_get_screen_on_voltage,
-	.set_power_on_soc = charge_animation_set_power_on_soc,
-	.set_power_on_voltage = charge_animation_set_power_on_voltage,
-	.set_screen_on_voltage = charge_animation_set_screen_on_voltage,
 	.show = charge_animation_show,
 };
 
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 91c7d74efd..84e1ee46f8 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -15,6 +15,7 @@
 #include <power/pmic.h>
 #include <dm/uclass-internal.h>
 #include <power/charge_display.h>
+#include <power/charge_animation.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
@@ -919,22 +920,19 @@ static int rk816_bat_get_charger_type(struct battery_priv *di)
 	return rk816_bat_get_usb_state(di);
 }
 
-static bool rk816_bat_is_under_threshold(struct battery_priv *di)
+static bool rk816_bat_need_initialize(struct battery_priv *di)
 {
+	struct charge_animation_pdata *pdata;
 	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 	struct udevice *dev;
-	int soc, voltage, est_voltage;
-	int err;
+	int est_voltage;
 
-	err = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
-	if (!err) {
+	if (!uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev)) {
+		pdata = dev_get_platdata(dev);
 		est_voltage = rk816_bat_get_avg_voltage(di);
-		soc = charge_display_get_power_on_soc(dev);
-		voltage = charge_display_get_power_on_voltage(dev);
-		DBG("threshold: %d%%, %dmv; now: %d%%, %dmv\n",
-		    soc, voltage, di->dsoc, est_voltage);
-		if ((di->dsoc <= soc) || (est_voltage <= voltage))
+		if ((pdata->uboot_charge) ||
+		    (pdata->low_power_voltage >= est_voltage))
 			initialize = true;
 	}
 #endif
@@ -952,7 +950,9 @@ void rk816_bat_init_rsoc(struct battery_priv *di)
 		initialize = true;
 	/* Only charger online and under threshold, we do initialization */
 	else if (rk816_bat_get_charger_type(di) != NO_CHARGER)
-		initialize = rk816_bat_is_under_threshold(di);
+		initialize = rk816_bat_need_initialize(di);
+
+	printf("Fuel gauge initialize = %d\n", initialize);
 
 	if (!initialize)
 		return;
diff --git a/include/power/charge_animation.h b/include/power/charge_animation.h
new file mode 100644
index 0000000000..7cbc6d9952
--- /dev/null
+++ b/include/power/charge_animation.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _CHARGE_ANIMATION_H_
+#define _CHARGE_ANIMATION_H_
+
+struct charge_animation_pdata {
+	int android_charge;
+	int uboot_charge;
+
+	int exit_charge_voltage;
+	int exit_charge_level;
+	int low_power_voltage;
+	int screen_on_voltage;
+
+	int system_suspend;
+};
+
+#endif
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 2fc9b3adec..302a277329 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -8,22 +8,9 @@
 #define _CHARGE_DISPLAY_H_
 
 struct dm_charge_display_ops {
-	int (*get_power_on_soc)(struct udevice *dev);
-	int (*get_power_on_voltage)(struct udevice *dev);
-	int (*get_screen_on_voltage)(struct udevice *dev);
-	int (*set_power_on_soc)(struct udevice *dev, int val);
-	int (*set_power_on_voltage)(struct udevice *dev, int val);
-	int (*set_screen_on_voltage)(struct udevice *dev, int val);
 	int (*show)(struct udevice *dev);
 };
 
-int charge_display_get_power_on_soc(struct udevice *dev);
-int charge_display_get_power_on_voltage(struct udevice *dev);
-int charge_display_get_screen_on_voltage(struct udevice *dev);
-int charge_display_set_power_on_soc(struct udevice *dev, int val);
-int charge_display_set_power_on_voltage(struct udevice *dev, int val);
-int charge_display_set_screen_on_voltage(struct udevice *dev, int val);
-
 int charge_display_show(struct udevice *dev);
 
 #endif

commit 037c289fda1036212ef9421bdd7b2d31c21f80ac
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 17:27:03 2018 +0800

    fuel gauge: rk816: refactor code
    
    1. use ofdata_to_platdata() to parse fdt;
    2. clean up code.
    
    Change-Id: I75a6cb721e10fa1f30e59b101b3db0bb19df8001
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 812c91bf68..91c7d74efd 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -64,6 +64,7 @@ static int dbg_enable = 0;
 #define BAT_CON			(1 << 4)
 #define VOL_INSTANT		(1 << 0)
 #define VOL_AVG			(0 << 0)
+#define VOL_AVG_MASK		(1 << 0)
 
 /* TS_CTRL_REG */
 #define GG_EN			(1 << 7)
@@ -116,7 +117,8 @@ static int dbg_enable = 0;
 #define DIV(x)			((x) ? (x) : 1)
 
 /***********************************************************/
-struct battery_info {
+struct battery_priv {
+	struct udevice *dev;
 	int		chrg_type;
 	int		poffset;
 	int		bat_res;
@@ -128,9 +130,9 @@ struct battery_info {
 	int		dsoc;
 	int		rsoc;
 	int		fcc;
-	int		qmax;
+	u32		qmax;
 	int		remain_cap;
-	int		design_cap;
+	u32		design_cap;
 	int		nac;
 	u32		*ocv_table;
 	u32		ocv_size;
@@ -180,8 +182,6 @@ enum dc_type {
 	DC_TYPE_OF_ADC,
 };
 
-static struct udevice *g_pmic_dev;
-
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
 };
@@ -194,14 +194,14 @@ static const u32 CHRG_CUR_INPUT[] = {
 	450, 800, 850, 1000, 1250, 1500, 1750, 2000
 };
 
-static int rk816_bat_read(u8 reg)
+static int rk816_bat_read(struct battery_priv *di, u8 reg)
 {
-	return pmic_reg_read(g_pmic_dev, reg);
+	return pmic_reg_read(di->dev->parent, reg);
 }
 
-static void rk816_bat_write(u8 reg, u8 buf)
+static void rk816_bat_write(struct battery_priv *di, u8 reg, u8 buf)
 {
-	pmic_reg_write(g_pmic_dev, reg, buf);
+	pmic_reg_write(di->dev->parent, reg, buf);
 }
 
 static int rk816_bat_dwc_otg_check_dpdm(void)
@@ -214,88 +214,85 @@ static int rk816_bat_dwc_otg_check_dpdm(void)
 #endif
 }
 
-static int rk816_bat_get_rsoc(struct battery_info *di)
+static int rk816_bat_get_rsoc(struct battery_priv *di)
 {
 	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
 }
 
-static int rk816_bat_get_dsoc(struct  battery_info *di)
+static int rk816_bat_get_dsoc(struct  battery_priv *di)
 {
-	return rk816_bat_read(SOC_REG);
+	return rk816_bat_read(di, SOC_REG);
 }
 
-static void rk816_bat_enable_gauge(struct battery_info *di)
+static void rk816_bat_enable_gauge(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(TS_CTRL_REG);
+	val = rk816_bat_read(di, TS_CTRL_REG);
 	val |= GG_EN;
-	rk816_bat_write(TS_CTRL_REG, val);
+	rk816_bat_write(di, TS_CTRL_REG, val);
 }
 
-static void rk816_bat_set_vol_instant_mode(struct battery_info *di)
+static void rk816_bat_set_vol_instant_mode(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(GGSTS_REG);
+	val = rk816_bat_read(di, GGSTS_REG);
 	val |= VOL_INSTANT;
-	rk816_bat_write(GGSTS_REG, val);
+	rk816_bat_write(di, GGSTS_REG, val);
 }
 
-static void rk816_bat_set_vol_avg_mode(struct battery_info *di)
+static void rk816_bat_set_vol_avg_mode(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(GGSTS_REG);
-	val &= ~0x01;
+	val = rk816_bat_read(di, GGSTS_REG);
+	val &= ~VOL_AVG_MASK;
 	val |= VOL_AVG;
-	rk816_bat_write(GGSTS_REG, val);
+	rk816_bat_write(di, GGSTS_REG, val);
 }
 
-static int rk816_bat_get_vcalib0(struct battery_info *di)
+static int rk816_bat_get_vcalib0(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(VCALIB0_REGL) << 0;
-	val |= rk816_bat_read(VCALIB0_REGH) << 8;
+	val |= rk816_bat_read(di, VCALIB0_REGL) << 0;
+	val |= rk816_bat_read(di, VCALIB0_REGH) << 8;
 
 	return val;
 }
 
-static int rk816_bat_get_vcalib1(struct battery_info *di)
+static int rk816_bat_get_vcalib1(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(VCALIB1_REGL) << 0;
-	val |= rk816_bat_read(VCALIB1_REGH) << 8;
+	val |= rk816_bat_read(di, VCALIB1_REGL) << 0;
+	val |= rk816_bat_read(di, VCALIB1_REGH) << 8;
 
-	DBG("<%s>. coffset: 0x%x\n", __func__, val);
 	return val;
 }
 
-static void rk816_bat_set_coffset(struct battery_info *di, int val)
+static void rk816_bat_set_coffset(struct battery_priv *di, int val)
 {
 	u8 buf;
 
 	buf = (val >> 0) & 0xff;
-	rk816_bat_write(CAL_OFFSET_REGL, buf);
+	rk816_bat_write(di, CAL_OFFSET_REGL, buf);
 	buf = (val >> 8) & 0xff;
-	rk816_bat_write(CAL_OFFSET_REGH, buf);
-
-	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+	rk816_bat_write(di, CAL_OFFSET_REGH, buf);
 }
 
-static int rk816_bat_get_ioffset(struct battery_info *di)
+static int rk816_bat_get_ioffset(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(IOFFSET_REGL) << 0;
-	val |= rk816_bat_read(IOFFSET_REGH) << 8;
+	val |= rk816_bat_read(di, IOFFSET_REGL) << 0;
+	val |= rk816_bat_read(di, IOFFSET_REGH) << 8;
 
 	return val;
 }
 
-static void rk816_bat_init_voltage_kb(struct battery_info *di)
+static void rk816_bat_init_voltage_kb(struct battery_priv *di)
 {
 	int vcalib0, vcalib1;
 
@@ -306,24 +303,24 @@ static void rk816_bat_init_voltage_kb(struct battery_info *di)
 	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
 }
 
-static int rk816_bat_get_ocv_voltage(struct battery_info *di)
+static int rk816_bat_get_ocv_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk816_bat_read(BAT_OCV_REGL) << 0;
-	val |= rk816_bat_read(BAT_OCV_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_OCV_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_OCV_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 	vol = vol * 1100 / 1000;
 
 	return vol;
 }
 
-static int rk816_bat_get_avg_current(struct battery_info *di)
+static int rk816_bat_get_avg_current(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 
 	if (val & 0x800)
 		val -= 4096;
@@ -332,19 +329,19 @@ static int rk816_bat_get_avg_current(struct battery_info *di)
 	return val;
 }
 
-static int rk816_bat_get_avg_voltage(struct battery_info *di)
+static int rk816_bat_get_avg_voltage(struct battery_priv *di)
 {
 	int vol, val = 0;
 
-	val |= rk816_bat_read(BAT_VOL_REGL) << 0;
-	val |= rk816_bat_read(BAT_VOL_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_VOL_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_VOL_REGH) << 8;
 	vol = di->voltage_k * val / 1000 + di->voltage_b;
 	vol = vol * 1100 / 1000;
 
 	return vol;
 }
 
-static int rk816_bat_get_est_voltage(struct battery_info *di)
+static int rk816_bat_get_est_voltage(struct battery_priv *di)
 {
 	int est_vol, vol, curr;
 
@@ -371,7 +368,7 @@ static u8 rk816_bat_finish_ma(int fcc)
 	return ma;
 }
 
-static void rk816_bat_select_chrg_cv(struct battery_info *di)
+static void rk816_bat_select_chrg_cv(struct battery_priv *di)
 {
 	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
 
@@ -401,7 +398,7 @@ static void rk816_bat_select_chrg_cv(struct battery_info *di)
 	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
 }
 
-static void rk816_bat_init_chrg_config(struct battery_info *di)
+static void rk816_bat_init_chrg_config(struct battery_priv *di)
 {
 	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
 	u8 sup_sts, ggcon, thermal, finish_ma;
@@ -409,12 +406,12 @@ static void rk816_bat_init_chrg_config(struct battery_info *di)
 	rk816_bat_select_chrg_cv(di);
 	finish_ma = rk816_bat_finish_ma(di->fcc);
 
-	ggcon = rk816_bat_read(GGCON_REG);
-	sup_sts = rk816_bat_read(SUP_STS_REG);
-	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
-	thermal = rk816_bat_read(THERMAL_REG);
-	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk816_bat_read(di, GGCON_REG);
+	sup_sts = rk816_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(di, USB_CTRL_REG);
+	thermal = rk816_bat_read(di, THERMAL_REG);
+	chrg_ctrl2 = rk816_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(di, CHRG_CTRL_REG3);
 
 	/* set charge current and voltage */
 	usb_ctrl &= ~INPUT_CUR_MSK;
@@ -441,13 +438,13 @@ static void rk816_bat_init_chrg_config(struct battery_info *di)
 	/* adc current mode */
 	ggcon |= ADC_CUR_MODE;
 
-	rk816_bat_write(GGCON_REG, ggcon);
-	rk816_bat_write(SUP_STS_REG, sup_sts);
-	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
-	rk816_bat_write(THERMAL_REG, thermal);
-	rk816_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
-	rk816_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
-	rk816_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+	rk816_bat_write(di, GGCON_REG, ggcon);
+	rk816_bat_write(di, SUP_STS_REG, sup_sts);
+	rk816_bat_write(di, USB_CTRL_REG, usb_ctrl);
+	rk816_bat_write(di, THERMAL_REG, thermal);
+	rk816_bat_write(di, CHRG_CTRL_REG1, chrg_ctrl1);
+	rk816_bat_write(di, CHRG_CTRL_REG2, chrg_ctrl2);
+	rk816_bat_write(di, CHRG_CTRL_REG3, chrg_ctrl3);
 }
 
 static u32 interpolate(int value, u32 *table, int size)
@@ -497,7 +494,7 @@ static int32_t ab_div_c(u32 a, u32 b, u32 c)
 	return ans;
 }
 
-static int rk816_bat_vol_to_cap(struct battery_info *di, int voltage)
+static int rk816_bat_vol_to_cap(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_cap;
@@ -510,7 +507,7 @@ static int rk816_bat_vol_to_cap(struct battery_info *di, int voltage)
 	return ocv_cap;
 }
 
-static int rk816_bat_vol_to_soc(struct battery_info *di, int voltage)
+static int rk816_bat_vol_to_soc(struct battery_priv *di, int voltage)
 {
 	u32 *ocv_table, tmp;
 	int ocv_size, ocv_soc;
@@ -523,40 +520,40 @@ static int rk816_bat_vol_to_soc(struct battery_info *di, int voltage)
 	return ocv_soc;
 }
 
-static int rk816_bat_get_prev_cap(struct battery_info *di)
+static int rk816_bat_get_prev_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(REMAIN_CAP_REG3) << 24;
-	val |= rk816_bat_read(REMAIN_CAP_REG2) << 16;
-	val |= rk816_bat_read(REMAIN_CAP_REG1) << 8;
-	val |= rk816_bat_read(REMAIN_CAP_REG0) << 0;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG3) << 24;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG2) << 16;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG1) << 8;
+	val |= rk816_bat_read(di, REMAIN_CAP_REG0) << 0;
 
 	return val;
 }
 
-static void rk816_bat_save_fcc(struct battery_info *di, u32 cap)
+static void rk816_bat_save_fcc(struct battery_priv *di, u32 cap)
 {
 	u8 buf;
 
 	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(NEW_FCC_REG3, buf);
+	rk816_bat_write(di, NEW_FCC_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(NEW_FCC_REG2, buf);
+	rk816_bat_write(di, NEW_FCC_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(NEW_FCC_REG1, buf);
+	rk816_bat_write(di, NEW_FCC_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(NEW_FCC_REG0, buf);
+	rk816_bat_write(di, NEW_FCC_REG0, buf);
 }
 
-static int rk816_bat_get_fcc(struct battery_info *di)
+static int rk816_bat_get_fcc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(NEW_FCC_REG3) << 24;
-	val |= rk816_bat_read(NEW_FCC_REG2) << 16;
-	val |= rk816_bat_read(NEW_FCC_REG1) << 8;
-	val |= rk816_bat_read(NEW_FCC_REG0) << 0;
+	val |= rk816_bat_read(di, NEW_FCC_REG3) << 24;
+	val |= rk816_bat_read(di, NEW_FCC_REG2) << 16;
+	val |= rk816_bat_read(di, NEW_FCC_REG1) << 8;
+	val |= rk816_bat_read(di, NEW_FCC_REG0) << 0;
 
 	if (val < MIN_FCC)
 		val = di->design_cap;
@@ -566,31 +563,31 @@ static int rk816_bat_get_fcc(struct battery_info *di)
 	return val;
 }
 
-static u8 rk816_bat_get_pwroff_min(struct battery_info *di)
+static u8 rk816_bat_get_pwroff_min(struct battery_priv *di)
 {
 	u8 cur, last;
 
-	cur = rk816_bat_read(NON_ACT_TIMER_CNT_REG);
-	last = rk816_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
-	rk816_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+	cur = rk816_bat_read(di, NON_ACT_TIMER_CNT_REG);
+	last = rk816_bat_read(di, NON_ACT_TIMER_CNT_SAVE_REG);
+	rk816_bat_write(di, NON_ACT_TIMER_CNT_SAVE_REG, cur);
 
 	return (cur != last) ? cur : 0;
 }
 
-static int rk816_bat_get_coulomb_cap(struct battery_info *di)
+static int rk816_bat_get_coulomb_cap(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(GASCNT_REG3) << 24;
-	val |= rk816_bat_read(GASCNT_REG2) << 16;
-	val |= rk816_bat_read(GASCNT_REG1) << 8;
-	val |= rk816_bat_read(GASCNT_REG0) << 0;
+	val |= rk816_bat_read(di, GASCNT_REG3) << 24;
+	val |= rk816_bat_read(di, GASCNT_REG2) << 16;
+	val |= rk816_bat_read(di, GASCNT_REG1) << 8;
+	val |= rk816_bat_read(di, GASCNT_REG0) << 0;
 	val /= 2390;
 
 	return val;
 }
 
-static void rk816_bat_init_capacity(struct battery_info *di, u32 capacity)
+static void rk816_bat_init_capacity(struct battery_priv *di, u32 capacity)
 {
 	u8 buf;
 	u32 cap;
@@ -602,30 +599,30 @@ static void rk816_bat_init_capacity(struct battery_info *di, u32 capacity)
 
 	cap = capacity * 2390;
 	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG3, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG2, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG1, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(GASCNT_CAL_REG0, buf);
+	rk816_bat_write(di, GASCNT_CAL_REG0, buf);
 
 	di->remain_cap = rk816_bat_get_coulomb_cap(di);
 	di->rsoc = rk816_bat_get_rsoc(di);
 }
 
-static bool is_rk816_bat_ocv_valid(struct battery_info *di)
+static bool is_rk816_bat_ocv_valid(struct battery_priv *di)
 {
 	return di->pwroff_min >= 30 ? true : false;
 }
 
-static int rk816_bat_get_usb_state(struct battery_info *di)
+static int rk816_bat_get_usb_state(struct battery_priv *di)
 {
 	int charger_type;
 
 	switch (rk816_bat_dwc_otg_check_dpdm()) {
 	case 0:
-		if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+		if ((rk816_bat_read(di, VB_MON_REG) & PLUG_IN_STS) != 0)
 			charger_type = DC_CHARGER;
 		else
 			charger_type = NO_CHARGER;
@@ -644,35 +641,35 @@ static int rk816_bat_get_usb_state(struct battery_info *di)
 	return charger_type;
 }
 
-static void rk816_bat_clr_initialized_state(struct battery_info *di)
+static void rk816_bat_clr_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(MISC_MARK_REG);
+	val = rk816_bat_read(di, MISC_MARK_REG);
 	val &= ~FG_INIT;
-	rk816_bat_write(MISC_MARK_REG, val);
+	rk816_bat_write(di, MISC_MARK_REG, val);
 }
 
-static bool rk816_bat_is_initialized(struct battery_info *di)
+static bool rk816_bat_is_initialized(struct battery_priv *di)
 {
-	return (rk816_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+	return (rk816_bat_read(di, MISC_MARK_REG) & FG_INIT) ? true : false;
 }
 
-static void rk816_bat_set_initialized_state(struct battery_info *di)
+static void rk816_bat_set_initialized_state(struct battery_priv *di)
 {
 	u8 val;
 
-	val = rk816_bat_read(MISC_MARK_REG);
+	val = rk816_bat_read(di, MISC_MARK_REG);
 	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
 		val |= FG_INIT;
-		rk816_bat_write(MISC_MARK_REG, val);
+		rk816_bat_write(di, MISC_MARK_REG, val);
 		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
 			 rk816_bat_get_est_voltage(di),
 			 rk816_bat_get_usb_state(di));
 	}
 }
 
-static void rk816_bat_first_pwron(struct battery_info *di)
+static void rk816_bat_first_pwron(struct battery_priv *di)
 {
 	int ocv_vol;
 
@@ -688,20 +685,20 @@ static void rk816_bat_first_pwron(struct battery_info *di)
 	BAT_INFO("first power on: soc=%d\n", di->dsoc);
 }
 
-static u8 rk816_bat_get_halt_cnt(struct battery_info *di)
+static u8 rk816_bat_get_halt_cnt(struct battery_priv *di)
 {
-	return rk816_bat_read(HALT_CNT_REG);
+	return rk816_bat_read(di, HALT_CNT_REG);
 }
 
-static void rk816_bat_inc_halt_cnt(struct battery_info *di)
+static void rk816_bat_inc_halt_cnt(struct battery_priv *di)
 {
 	u8 cnt;
 
-	cnt = rk816_bat_read(HALT_CNT_REG);
-	rk816_bat_write(HALT_CNT_REG, ++cnt);
+	cnt = rk816_bat_read(di, HALT_CNT_REG);
+	rk816_bat_write(di, HALT_CNT_REG, ++cnt);
 }
 
-static bool is_rk816_bat_last_halt(struct battery_info *di)
+static bool is_rk816_bat_last_halt(struct battery_priv *di)
 {
 	int pre_cap = rk816_bat_get_prev_cap(di);
 	int now_cap = rk816_bat_get_coulomb_cap(di);
@@ -715,7 +712,7 @@ static bool is_rk816_bat_last_halt(struct battery_info *di)
 	}
 }
 
-static void rk816_bat_not_first_pwron(struct battery_info *di)
+static void rk816_bat_not_first_pwron(struct battery_priv *di)
 {
 	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
 
@@ -766,30 +763,30 @@ finish:
 		 );
 }
 
-static bool is_rk816_bat_first_poweron(struct battery_info *di)
+static bool is_rk816_bat_first_poweron(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk816_bat_read(GGSTS_REG);
+	buf = rk816_bat_read(di, GGSTS_REG);
 	if (buf & BAT_CON) {
 		buf &= ~BAT_CON;
-		rk816_bat_write(GGSTS_REG, buf);
+		rk816_bat_write(di, GGSTS_REG, buf);
 		return true;
 	}
 
 	return false;
 }
 
-static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
+static bool rk816_bat_ocv_sw_reset(struct battery_priv *di)
 {
 	u8 buf;
 
-	buf = rk816_bat_read(MISC_MARK_REG);
+	buf = rk816_bat_read(di, MISC_MARK_REG);
 	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
 	    (buf & FG_RESET_NOW)) {
 		buf &= ~FG_RESET_LATE;
 		buf &= ~FG_RESET_NOW;
-		rk816_bat_write(MISC_MARK_REG, buf);
+		rk816_bat_write(di, MISC_MARK_REG, buf);
 		BAT_INFO("manual reset fuel gauge\n");
 		return true;
 	} else {
@@ -797,7 +794,7 @@ static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
 	}
 }
 
-static int rk816_bat_calc_linek(struct battery_info *di)
+static int rk816_bat_calc_linek(struct battery_priv *di)
 {
 	int linek, diff, delta;
 
@@ -826,17 +823,17 @@ static int rk816_bat_calc_linek(struct battery_info *di)
 	return linek;
 }
 
-static int rk816_bat_get_coffset(struct battery_info *di)
+static int rk816_bat_get_coffset(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(CAL_OFFSET_REGL) << 0;
-	val |= rk816_bat_read(CAL_OFFSET_REGH) << 8;
+	val |= rk816_bat_read(di, CAL_OFFSET_REGL) << 0;
+	val |= rk816_bat_read(di, CAL_OFFSET_REGH) << 8;
 
 	return val;
 }
 
-static void rk816_bat_init_poffset(struct battery_info *di)
+static void rk816_bat_init_poffset(struct battery_priv *di)
 {
 	int coffset, ioffset;
 
@@ -845,33 +842,33 @@ static void rk816_bat_init_poffset(struct battery_info *di)
 	di->poffset = coffset - ioffset;
 }
 
-static bool is_rk816_bat_exist(struct  battery_info *di)
+static bool is_rk816_bat_exist(struct  battery_priv *di)
 {
-	return (rk816_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+	return (rk816_bat_read(di, SUP_STS_REG) & BAT_EXS) ? true : false;
 }
 
-static void rk816_bat_set_current(int input_current)
+static void rk816_bat_set_current(struct battery_priv *di, int input_current)
 {
 	u8 usb_ctrl;
 
-	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	usb_ctrl = rk816_bat_read(di, USB_CTRL_REG);
 	usb_ctrl &= ~INPUT_CUR_MSK;
 	usb_ctrl |= (input_current);
-	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk816_bat_write(di, USB_CTRL_REG, usb_ctrl);
 }
 
-static void rk816_bat_charger_setting(struct battery_info *di, int charger)
+static void rk816_bat_charger_setting(struct battery_priv *di, int charger)
 {
 	static u8 old_charger = UNDEF_CHARGER;
 
 	/*charger changed*/
 	if (old_charger != charger) {
 		if (charger == NO_CHARGER)
-			rk816_bat_set_current(ILIM_450MA);
+			rk816_bat_set_current(di, ILIM_450MA);
 		else if (charger == USB_CHARGER)
-			rk816_bat_set_current(ILIM_450MA);
+			rk816_bat_set_current(di, ILIM_450MA);
 		else if (charger == DC_CHARGER || charger == AC_CHARGER)
-			rk816_bat_set_current(di->chrg_cur_input);
+			rk816_bat_set_current(di, di->chrg_cur_input);
 		else
 			BAT_INFO("charger setting error %d\n", charger);
 
@@ -879,7 +876,7 @@ static void rk816_bat_charger_setting(struct battery_info *di, int charger)
 	}
 }
 
-static int rk816_bat_get_dc_state(struct battery_info *di)
+static int rk816_bat_get_dc_state(struct battery_priv *di)
 {
 	/* struct adc_channel val; */
 
@@ -901,12 +898,12 @@ static int rk816_bat_get_dc_state(struct battery_info *di)
 	}
 }
 
-static int rk816_bat_get_charger_type(struct battery_info *di)
+static int rk816_bat_get_charger_type(struct battery_priv *di)
 {
 	int charger_type = NO_CHARGER;
 
 	/* check by ic hardware: this check make check work safer */
-	if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+	if ((rk816_bat_read(di, VB_MON_REG) & PLUG_IN_STS) == 0)
 		return NO_CHARGER;
 
 	/* virtual or bat not exist */
@@ -922,7 +919,7 @@ static int rk816_bat_get_charger_type(struct battery_info *di)
 	return rk816_bat_get_usb_state(di);
 }
 
-static bool rk816_bat_is_under_threshold(struct battery_info *di)
+static bool rk816_bat_is_under_threshold(struct battery_priv *di)
 {
 	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
@@ -945,7 +942,7 @@ static bool rk816_bat_is_under_threshold(struct battery_info *di)
 	return initialize;
 }
 
-void rk816_bat_init_rsoc(struct battery_info *di)
+void rk816_bat_init_rsoc(struct battery_priv *di)
 {
 	bool initialize = false;
 
@@ -969,7 +966,7 @@ void rk816_bat_init_rsoc(struct battery_info *di)
 		rk816_bat_not_first_pwron(di);
 }
 
-static int rk816_fg_init(struct battery_info *di)
+static int rk816_fg_init(struct battery_priv *di)
 {
 	rk816_bat_enable_gauge(di);
 	rk816_bat_set_vol_instant_mode(di);
@@ -998,17 +995,17 @@ static int rk816_fg_init(struct battery_info *di)
 	return 0;
 }
 
-static void rk816_bat_save_dsoc(struct  battery_info *di, u8 save_soc)
+static void rk816_bat_save_dsoc(struct  battery_priv *di, u8 save_soc)
 {
 	static int old_soc = -1;
 
 	if (old_soc != save_soc) {
 		old_soc = save_soc;
-		rk816_bat_write(SOC_REG, save_soc);
+		rk816_bat_write(di, SOC_REG, save_soc);
 	}
 }
 
-static void rk816_bat_save_cap(struct battery_info *di, int cap)
+static void rk816_bat_save_cap(struct battery_priv *di, int cap)
 {
 	u8 buf;
 	static int old_cap;
@@ -1021,20 +1018,20 @@ static void rk816_bat_save_cap(struct battery_info *di, int cap)
 
 	old_cap = cap;
 	buf = (cap >> 24) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG3, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG3, buf);
 	buf = (cap >> 16) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG2, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG2, buf);
 	buf = (cap >> 8) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG1, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk816_bat_write(REMAIN_CAP_REG0, buf);
+	rk816_bat_write(di, REMAIN_CAP_REG0, buf);
 }
 
-static u8 rk816_bat_get_chrg_status(struct battery_info *di)
+static u8 rk816_bat_get_chrg_status(struct battery_priv *di)
 {
 	u8 status;
 
-	status = rk816_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	status = rk816_bat_read(di, SUP_STS_REG) & BAT_STATUS_MSK;
 	switch (status) {
 	case CHARGE_OFF:
 		DBG("CHARGE-OFF...\n");
@@ -1073,7 +1070,7 @@ static u8 rk816_bat_get_chrg_status(struct battery_info *di)
 	return status;
 }
 
-static void rk816_bat_finish_chrg(struct battery_info *di)
+static void rk816_bat_finish_chrg(struct battery_priv *di)
 {
 	u32 tgt_sec = 0;
 
@@ -1088,7 +1085,7 @@ static void rk816_bat_finish_chrg(struct battery_info *di)
 	    get_timer(di->finish_chrg_base));
 }
 
-static void rk816_bat_debug_info(struct battery_info *di)
+static void rk816_bat_debug_info(struct battery_priv *di)
 {
 	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
 	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
@@ -1096,17 +1093,17 @@ static void rk816_bat_debug_info(struct battery_info *di)
 
 	if (!dbg_enable)
 		return;
-	ggcon = rk816_bat_read(GGCON_REG);
-	ggsts = rk816_bat_read(GGSTS_REG);
-	sup_sts = rk816_bat_read(SUP_STS_REG);
-	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
-	thermal = rk816_bat_read(THERMAL_REG);
-	vb_mod = rk816_bat_read(VB_MON_REG);
-	misc = rk816_bat_read(MISC_MARK_REG);
-	rtc = rk816_bat_read(SECONDS_REG);
-	chrg_ctrl1 = rk816_bat_read(CHRG_CTRL_REG1);
-	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
-	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+	ggcon = rk816_bat_read(di, GGCON_REG);
+	ggsts = rk816_bat_read(di, GGSTS_REG);
+	sup_sts = rk816_bat_read(di, SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(di, USB_CTRL_REG);
+	thermal = rk816_bat_read(di, THERMAL_REG);
+	vb_mod = rk816_bat_read(di, VB_MON_REG);
+	misc = rk816_bat_read(di, MISC_MARK_REG);
+	rtc = rk816_bat_read(di, SECONDS_REG);
+	chrg_ctrl1 = rk816_bat_read(di, CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk816_bat_read(di, CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(di, CHRG_CTRL_REG3);
 
 	DBG("\n---------------------- DEBUG REGS ------------------------\n"
 	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
@@ -1138,7 +1135,7 @@ static void rk816_bat_debug_info(struct battery_info *di)
 	DBG("###########################################################\n");
 }
 
-static void rk816_bat_linek_algorithm(struct battery_info *di)
+static void rk816_bat_linek_algorithm(struct battery_priv *di)
 {
 	int delta_cap, ydsoc, tmp;
 	u8 chg_st = rk816_bat_get_chrg_status(di);
@@ -1176,19 +1173,19 @@ static void rk816_bat_linek_algorithm(struct battery_info *di)
 	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
 }
 
-static int rk816_bat_get_iadc(struct battery_info *di)
+static int rk816_bat_get_iadc(struct battery_priv *di)
 {
 	int val = 0;
 
-	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
-	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(di, BAT_CUR_AVG_REGH) << 8;
 	if (val > 2047)
 		val -= 4096;
 
 	return val;
 }
 
-static bool rk816_bat_adc_calib(struct battery_info *di)
+static bool rk816_bat_adc_calib(struct battery_priv *di)
 {
 	int i, ioffset, coffset, adc;
 
@@ -1205,7 +1202,7 @@ static bool rk816_bat_adc_calib(struct battery_info *di)
 			coffset = rk816_bat_get_coffset(di);
 			ioffset = rk816_bat_get_ioffset(di);
 			di->poffset = coffset - ioffset;
-			rk816_bat_write(POFFSET_REG, di->poffset);
+			rk816_bat_write(di, POFFSET_REG, di->poffset);
 			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
 				 coffset, ioffset, di->poffset);
 			return true;
@@ -1219,7 +1216,7 @@ static bool rk816_bat_adc_calib(struct battery_info *di)
 	return false;
 }
 
-static void rk816_bat_smooth_charge(struct battery_info *di)
+static void rk816_bat_smooth_charge(struct battery_priv *di)
 {
 	u8 chg_st = rk816_bat_get_chrg_status(di);
 
@@ -1272,7 +1269,7 @@ out:
 
 static int rk816_bat_update_get_soc(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 	static ulong seconds;
 
 	/* set charge current */
@@ -1297,7 +1294,7 @@ static int rk816_bat_update_get_soc(struct udevice *dev)
 
 static int rk816_bat_update_get_voltage(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	if (!di->virtual_power && di->voltage_k)
 		return rk816_bat_get_est_voltage(di);
@@ -1307,7 +1304,7 @@ static int rk816_bat_update_get_voltage(struct udevice *dev)
 
 static int rk816_bat_update_get_current(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	if (!di->virtual_power && di->voltage_k)
 		return rk816_bat_get_avg_current(di);
@@ -1317,7 +1314,7 @@ static int rk816_bat_update_get_current(struct udevice *dev)
 
 static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 {
-	struct battery_info *di = dev_get_priv(dev);
+	struct battery_priv *di = dev_get_priv(dev);
 
 	return rk816_bat_get_charger_type(di);
 }
@@ -1329,30 +1326,23 @@ static struct dm_fuel_gauge_ops fg_ops = {
 	.get_chrg_online = rk816_bat_update_get_chrg_online,
 };
 
-static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
+static int rk816_fg_ofdata_to_platdata(struct udevice *dev)
 {
-	int node, parent, len, err;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
 	const char *prop;
+	int len;
 
-	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk816");
-	if (parent < 0) {
-		printf("can't find rockchip,rk816 node\n");
-		return -ENODEV;
-	}
-
-	if (!fdtdec_get_is_enabled(blob, parent)) {
-		DBG("rk816 node disabled\n");
-		return -ENODEV;
-	}
-
-	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
-	if (node < 0) {
-		debug("can't find battery node\n");
-		di->chrg_cur_input = ILIM_2000MA;
+	if (rk8xx->variant != 0x8160) {
+		debug("%s: Not support pmic variant: rk%x\n",
+			__func__, rk8xx->variant);
 		return -EINVAL;
+	} else {
+		di->dev = dev;
 	}
 
-	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	/* Parse ocv table */
+	prop = dev_read_prop(dev, "ocv_table", &len);
 	if (!prop) {
 		printf("can't find ocv_table prop\n");
 		return -EINVAL;
@@ -1365,37 +1355,38 @@ static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
 	}
 
 	di->ocv_size = len / 4;
-	err = fdtdec_get_int_array(blob, node, "ocv_table",
-				   di->ocv_table, di->ocv_size);
-	if (err < 0) {
-		printf("read ocv_table error\n");
+	if (dev_read_u32_array(dev, "ocv_table",
+			       di->ocv_table, di->ocv_size)) {
+		printf("can't read ocv_table\n");
 		free(di->ocv_table);
 		return -EINVAL;
 	}
 
-	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	/* Parse neccessay */
+	di->design_cap = dev_read_u32_default(dev, "design_capacity", -1);
 	if (di->design_cap < 0) {
-		printf("read design_capacity error\n");
+		printf("can't read design_capacity\n");
 		return -EINVAL;
 	}
 
-	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	di->qmax = dev_read_u32_default(dev, "design_qmax", -1);
 	if (di->qmax < 0) {
-		printf("read design_qmax error\n");
+		printf("can't read design_qmax\n");
 		return -EINVAL;
 	}
 
-	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
-	di->dts_cur_input = fdtdec_get_int(blob, node,
-					   "max_input_current", 2000);
-	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
-	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
-	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
-	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
-	di->dc_det_adc = fdtdec_get_int(blob, node, "dc_det_adc", 0);
+	/* Parse un-neccessay */
+	di->dts_vol_sel = dev_read_u32_default(dev, "max_chrg_voltage", 4200);
+	di->dts_cur_input = dev_read_u32_default(dev, "max_input_current", 2000);
+	di->dts_cur_sel = dev_read_u32_default(dev, "max_chrg_current", 1200);
+	di->max_soc_offset = dev_read_u32_default(dev, "max_soc_offset", 70);
+	di->virtual_power = dev_read_u32_default(dev, "virtual_power", 0);
+	di->bat_res = dev_read_u32_default(dev, "bat_res", 135);
+
+	/* Parse dc type */
+	di->dc_det_adc = dev_read_u32_default(dev, "dc_det_adc", 0);
 	if (di->dc_det_adc <= 0) {
-		if (!gpio_request_by_name_nodev(offset_to_ofnode(node),
-						"dc_det_gpio",
+		if (!gpio_request_by_name_nodev(dev_ofnode(dev), "dc_det_gpio",
 						0, di->dc_det, GPIOD_IS_IN)) {
 			di->dc_type = DC_TYPE_OF_GPIO;
 		} else {
@@ -1405,6 +1396,7 @@ static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
 		di->dc_type = DC_TYPE_OF_ADC;
 	}
 
+	/* Is battery attached */
 	if (!is_rk816_bat_exist(di))
 		di->virtual_power = 1;
 
@@ -1422,20 +1414,14 @@ static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
 
 static int rk816_fg_probe(struct udevice *dev)
 {
-	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
-	struct battery_info *di = dev_get_priv(dev);
-	int ret;
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct battery_priv *di = dev_get_priv(dev);
 
-	if (priv->variant != 0x8160) {
-		debug("Not support pmic variant: rk%x\n", priv->variant);
+	if (rk8xx->variant != 0x8160) {
+		printf("Not support pmic variant: rk%x\n", rk8xx->variant);
 		return -EINVAL;
 	}
 
-	g_pmic_dev = dev->parent;
-	ret = rk816_bat_parse_dt(di, gd->fdt_blob);
-	if (ret)
-		return ret;
-
 	return rk816_fg_init(di);
 }
 
@@ -1444,6 +1430,6 @@ U_BOOT_DRIVER(rk816_fg) = {
 	.id = UCLASS_FG,
 	.probe = rk816_fg_probe,
 	.ops = &fg_ops,
-	.priv_auto_alloc_size = sizeof(struct battery_info),
+	.ofdata_to_platdata = rk816_fg_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct battery_priv),
 };
-

commit f23c35a88c56ad7590799e55ffe6b0aa884f7e0a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 13:03:31 2018 +0800

    power: charge animation: optimise code
    
    1. compatible fdt node used on legacy U-Boot;
    2. clean up code.
    
    Change-Id: If9ad1df379b14d096e3310568bc39d2c5820753b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index c5471bc71e..597eea10e9 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -43,12 +43,13 @@ struct charge_animation_pdata {
 	int android_charge;
 	int uboot_charge;
 
-	int screen_on_voltage;
 	int exit_charge_voltage;
-
 	int exit_charge_level;
-	int low_power_level;
 
+	int low_power_voltage;
+
+	int screen_on_voltage;
+	int system_suspend;
 };
 
 static int charge_animation_get_power_on_soc(struct udevice *dev)
@@ -143,28 +144,27 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	pdata->android_charge =
 		dev_read_u32_default(dev, "rockchip,android-charge-on", 0);
 
-	/* level */
 	pdata->exit_charge_level =
 		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-level", 0);
-	pdata->low_power_level =
-		dev_read_u32_default(dev, "rockchip,uboot-low-power-level", 0);
-
-	/* voltage */
 	pdata->exit_charge_voltage =
 		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-voltage", 0);
+
+	pdata->low_power_voltage =
+		dev_read_u32_default(dev, "rockchip,uboot-low-power-voltage", 0);
+
 	pdata->screen_on_voltage =
 		dev_read_u32_default(dev, "rockchip,screen-on-voltage", 0);
+	pdata->system_suspend =
+		dev_read_u32_default(dev, "rockchip,system-suspend", 0);
 
-	if (pdata->screen_on_voltage >
-	    pdata->exit_charge_voltage)
-		pdata->screen_on_voltage =
-					pdata->exit_charge_voltage;
+	if (pdata->screen_on_voltage > pdata->exit_charge_voltage)
+		pdata->screen_on_voltage = pdata->exit_charge_voltage;
 
 	debug("mode: uboot=%d, android=%d; exit: soc=%d%%, voltage=%dmv;\n"
-	      "lp_soc=%d%%, screen_on=%dmv\n",
+	      "lp_voltage=%d%%, screen_on=%dmv\n",
 	      pdata->uboot_charge, pdata->android_charge,
 	      pdata->exit_charge_level, pdata->exit_charge_voltage,
-	      pdata->low_power_level, pdata->screen_on_voltage);
+	      pdata->low_power_voltage, pdata->screen_on_voltage);
 
 	return 0;
 }
@@ -185,15 +185,15 @@ static int check_key_press(void)
 	return state;
 }
 
-static int system_suspend_enter(void)
+static int system_suspend_enter(struct charge_animation_pdata *pdata)
 {
 	/*
 	 * TODO: enter low power mode:
 	 * 3. auto turn off screen when timout;
 	 * 4. power key wakeup;
-	 * 5. timer period wakeup for pmic fg ?
+	 * 5. timer period wakeup for pmic fg
 	 */
-	if (IS_ENABLED(CONFIG_ARM_SMCCC)) {
+	if (pdata->system_suspend && IS_ENABLED(CONFIG_ARM_SMCCC)) {
 		printf("\nSystem suspend: ");
 		putc('1');
 		local_irq_disable();
@@ -226,6 +226,75 @@ static int system_suspend_enter(void)
 	return 0;
 }
 
+#ifdef CONFIG_DRM_ROCKCHIP
+static void charge_show_bmp(const char *name)
+{
+	rockchip_show_bmp(name);
+}
+
+static void charge_show_logo(void)
+{
+	rockchip_show_logo();
+}
+#else
+static void charge_show_bmp(const char *name) {}
+static void charge_show_logo(void) {}
+#endif
+
+static int charge_extrem_low_power(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	struct udevice *pmic = priv->pmic;
+	struct udevice *fg = priv->fg;
+	int voltage, soc, charging = 1;
+
+	voltage = fuel_gauge_get_voltage(fg);
+	if (voltage < 0)
+		return -EINVAL;
+
+	while (voltage < pdata->low_power_voltage + 50) {
+		/* Check charger online */
+		charging = fuel_gauge_get_chrg_online(fg);
+		if (charging <= 0) {
+			printf("Not charging, online=%d. Shutdown...\n",
+			       charging);
+			/* wait uart flush before shutdown */
+			mdelay(500);
+			/* PMIC shutdown */
+			pmic_shutdown(pmic);
+
+			printf("Cpu should never reach here, shutdown failed !\n");
+			continue;
+		}
+
+		/*
+		 * Just for fuel gauge to update something important,
+		 * including charge current, coulometer or other.
+		 */
+		soc = fuel_gauge_get_soc(fg);
+		if (soc < 0 || soc > 100) {
+			printf("get soc failed: %d\n", soc);
+			continue;
+		}
+
+		printf("Extrem low power, force charging... threshold=%dmv, now=%dmv\n",
+		       pdata->low_power_voltage, voltage);
+
+		/* System suspend */
+		system_suspend_enter(pdata);
+
+		/* Update voltage */
+		voltage = fuel_gauge_get_voltage(fg);
+		if (voltage < 0) {
+			printf("get voltage failed: %d\n", voltage);
+			continue;
+		}
+	}
+
+	return 0;
+}
+
 static int charge_animation_show(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
@@ -241,15 +310,34 @@ static int charge_animation_show(struct udevice *dev)
 	ulong ms = 0, sec = 0;
 	int start_idx = 0, show_idx = -1;
 	int soc, voltage, current, key_state;
-	int i, charging = 1;
+	int i, charging = 1, ret;
 	int boot_mode;
 
+/*
+ * Check sequence:
+ *
+ * 1. Extrem low power charge?
+ * 2. Preboot cmd?
+ * 3. Valid boot mode?
+ * 4. U-Boot charge enabled by dts config?
+ * 5. Screen off before charge?
+ * 6. Enter charge !
+ *
+ */
+	/* Extrem low power charge */
+	ret = charge_extrem_low_power(dev);
+	if (ret < 0) {
+		printf("extrem low power charge failed, ret=%d\n", ret);
+		return ret;
+	}
+
 	/* If there is preboot command, exit */
 	if (preboot) {
 		debug("preboot: %s\n", preboot);
 		return 0;
 	}
 
+	/* Not valid charge mode, exit */
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
 	if ((boot_mode != BOOT_MODE_CHARGING) &&
@@ -259,13 +347,13 @@ static int charge_animation_show(struct udevice *dev)
 	}
 #endif
 
-	/* Enter android charge */
+	/* Enter android charge, set property for kernel */
 	if (pdata->android_charge) {
 		env_update("bootargs", "androidboot.mode=charger");
 		printf("Android charge mode\n");
-		return 0;
 	}
 
+	/* Not enable U-Boot charge, exit */
 	if (!pdata->uboot_charge)
 		return 0;
 
@@ -284,7 +372,7 @@ static int charge_animation_show(struct udevice *dev)
 	if (voltage <= pdata->screen_on_voltage + 50) {
 		screen_on = false;
 		ever_lowpower_screen_off = true;
-		rockchip_show_bmp(NULL);
+		charge_show_bmp(NULL);
 	}
 
 	printf("Enter U-Boot charging mode\n");
@@ -345,7 +433,7 @@ static int charge_animation_show(struct udevice *dev)
 		}
 
 		/*
-		 * If ever lowpower screen off, force screen on false, which
+		 * If ever lowpower screen off, force screen_on=false, which
 		 * means key event can't modify screen_on, only voltage higher
 		 * then threshold can update screen_on=true;
 		 */
@@ -398,9 +486,9 @@ static int charge_animation_show(struct udevice *dev)
 		/* Step3: show images */
 		if (screen_on) {
 			debug("SHOW: %s\n", image[show_idx].name);
-			rockchip_show_bmp(image[show_idx].name);
+			charge_show_bmp(image[show_idx].name);
 		} else {
-			system_suspend_enter();
+			system_suspend_enter(pdata);
 		}
 
 		mdelay(5);
@@ -426,7 +514,7 @@ static int charge_animation_show(struct udevice *dev)
 		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
-				rockchip_show_bmp(NULL);
+				charge_show_bmp(NULL);
 
 			/*
 			 * Clear current image index, and show image
@@ -435,7 +523,7 @@ static int charge_animation_show(struct udevice *dev)
 			show_idx = IMAGE_SHOW_RESET;
 
 			/*
-			 * We turn off screen by rockchip_show_bmp(NULL), so we
+			 * We turn off screen by charge_show_bmp(NULL), so we
 			 * should tell while loop to stop show images any more.
 			 *
 			 * If screen_on=false, means this short key pressed
@@ -472,7 +560,7 @@ static int charge_animation_show(struct udevice *dev)
 
 			/* Success exit charging */
 			printf("Exit charge animation...\n");
-			rockchip_show_logo();
+			charge_show_logo();
 			break;
 		} else {
 			/* Do nothing */
@@ -483,7 +571,7 @@ static int charge_animation_show(struct udevice *dev)
 		/* Step5: Exit by ctrl+c */
 		if (ctrlc()) {
 			if (voltage >= pdata->screen_on_voltage)
-				rockchip_show_logo();
+				charge_show_logo();
 			printf("Exit charge, due to ctrl+c\n");
 			break;
 		}
@@ -515,9 +603,9 @@ static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
 	struct udevice *fg, *pmic;
-	int ret;
+	int ret, soc;
 
-	/* Get PMIC */
+	/* Get PMIC: used for power off system  */
 	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
 	if (ret) {
 		printf("Get UCLASS PMIC failed: %d\n", ret);
@@ -525,7 +613,7 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->pmic = pmic;
 
-	/* Get fuel gauge */
+	/* Get fuel gauge: used for charging */
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {
 		printf("Get UCLASS FG failed: %d\n", ret);
@@ -533,7 +621,21 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->fg = fg;
 
-	/* Get image */
+	/* Get PWRKEY: used for wakeup and trun off/on LCD */
+	ret = platform_key_read(KEY_POWER);
+	if (ret == KEY_NOT_EXIST) {
+		printf("Can't find power key\n");
+		return -EINVAL;
+	}
+
+	/* Initialize charge current */
+	soc = fuel_gauge_get_soc(fg);
+	if (soc < 0 || soc > 100) {
+		printf("get soc failed: %d\n", soc);
+		return -EINVAL;
+	}
+
+	/* Get charge images */
 	priv->image = image;
 	priv->image_num = ARRAY_SIZE(image);
 

commit 35d17bf709a179613d65c5437d613707596b833c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 12:00:12 2018 +0800

    input: rk8xx: support plugout interrupt for rk816 and rk817
    
    Change-Id: I474236292025f5656673191b10ad25f5362970b1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index f9a8dd7816..9cba035e83 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -23,6 +23,7 @@
 #define	RK817_INT_MSK_REG2	0xfd
 #define RK817_PWRON_RISE_INT	(1 << 1)
 #define RK817_PWRON_FALL_INT	(1 << 0)
+#define RK817_PLUG_OUT_INT	(1 << 1)
 #define RK817_INT_POL_MSK	BIT(1)
 
 #define	RK816_INT_STS_REG1	0x49
@@ -33,6 +34,7 @@
 #define	RK816_INT_MSK_REG3	0x4f
 #define RK816_PWRON_RISE_INT	(1 << 6)
 #define RK816_PWRON_FALL_INT	(1 << 5)
+#define RK816_PLUG_OUT_INT	(1 << 1)
 
 #define	RK805_INT_STS_REG	0x4c
 #define	RK805_INT_MSK_REG	0x4d
@@ -45,10 +47,13 @@ struct reg_data {
 };
 
 struct rk8xx_key_priv {
-	u8 int_sts_reg;
-	u8 int_msk_reg;
+	u8 key_int_sts_reg;
+	u8 key_int_msk_reg;
+	u8 plug_int_sts_reg;
+	u8 plug_int_msk_reg;
 	u8 pwron_rise_int;
 	u8 pwron_fall_int;
+	u8 plug_out_int;
 	struct reg_data *init_reg;
 	u32 init_reg_num;
 	struct reg_data *irq_reg;
@@ -56,9 +61,9 @@ struct rk8xx_key_priv {
 };
 
 static struct reg_data rk817_init_reg[] = {
-	/* only enable rise/fall interrupt */
+	/* only enable rise/fall interrupt, plugout */
 	{ RK817_INT_MSK_REG0, 0xfc },
-	{ RK817_INT_MSK_REG1, 0xff },
+	{ RK817_INT_MSK_REG1, 0xfd },
 	{ RK817_INT_MSK_REG2, 0xff },
 	/* clear all interrupt states */
 	{ RK817_INT_STS_REG0, 0xff },
@@ -76,10 +81,10 @@ static struct reg_data rk817_irq_reg[] = {
 };
 
 static struct reg_data rk816_init_reg[] = {
-	/* only enable rise/fall interrupt */
+	/* only enable rise/fall interrupt, plugout */
 	{ RK816_INT_MSK_REG1, 0x9f },
 	{ RK816_INT_MSK_REG2, 0xff },
-	{ RK816_INT_MSK_REG3, 0xff },
+	{ RK816_INT_MSK_REG3, 0xfd },
 	/* clear all interrupt states */
 	{ RK816_INT_STS_REG1, 0xff },
 	{ RK816_INT_STS_REG2, 0xff },
@@ -151,8 +156,24 @@ static void pwrkey_irq_handler(int irq, void *data)
 
 	debug("%s: irq = %d\n", __func__, irq);
 
-	/* read status */
-	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
+	/*
+	 * This plug out interrupt only used to wakeup cpu while U-Boot
+	 * charging and system suspend. Because we need to detect charger
+	 * plug out event and then shutdown system.
+	 */
+	if (priv->plug_int_sts_reg) {
+		val = pmic_reg_read(dev->parent, priv->plug_int_sts_reg);
+		if (val < 0) {
+			printf("%s: i2c read failed, ret=%d\n", __func__, val);
+			return;
+		}
+
+		if (val & priv->plug_out_int)
+			printf("Plug out interrupt\n");
+	}
+
+	/* read key status */
+	val = pmic_reg_read(dev->parent, priv->key_int_sts_reg);
 	if (val < 0) {
 		printf("%s: i2c read failed, ret=%d\n", __func__, val);
 		return;
@@ -226,8 +247,8 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 
 	switch (rk8xx->variant) {
 	case RK805_ID:
-		priv->int_sts_reg = RK805_INT_STS_REG;
-		priv->int_msk_reg = RK805_INT_MSK_REG;
+		priv->key_int_sts_reg = RK805_INT_STS_REG;
+		priv->key_int_msk_reg = RK805_INT_MSK_REG;
 		priv->pwron_rise_int = RK805_PWRON_RISE_INT;
 		priv->pwron_fall_int = RK805_PWRON_FALL_INT;
 		priv->init_reg = rk805_init_reg;
@@ -237,20 +258,26 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		break;
 
 	case RK816_ID:
-		priv->int_sts_reg = RK816_INT_STS_REG1;
-		priv->int_msk_reg = RK816_INT_MSK_REG1;
+		priv->key_int_sts_reg = RK816_INT_STS_REG1;
+		priv->key_int_msk_reg = RK816_INT_MSK_REG1;
+		priv->plug_int_sts_reg = RK816_INT_STS_REG3;
+		priv->plug_int_msk_reg = RK816_INT_MSK_REG3;
 		priv->pwron_rise_int = RK816_PWRON_RISE_INT;
 		priv->pwron_fall_int = RK816_PWRON_FALL_INT;
+		priv->plug_out_int = RK816_PLUG_OUT_INT;
 		priv->init_reg = rk816_init_reg;
 		priv->init_reg_num = ARRAY_SIZE(rk816_init_reg);
 		priv->irq_reg = rk816_irq_reg;
 		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
 	case RK817_ID:
-		priv->int_sts_reg = RK817_INT_STS_REG0;
-		priv->int_msk_reg = RK817_INT_MSK_REG0;
+		priv->key_int_sts_reg = RK817_INT_STS_REG0;
+		priv->key_int_msk_reg = RK817_INT_MSK_REG0;
+		priv->plug_int_sts_reg = RK817_INT_STS_REG1;
+		priv->plug_int_msk_reg = RK817_INT_MSK_REG1;
 		priv->pwron_rise_int = RK817_PWRON_RISE_INT;
 		priv->pwron_fall_int = RK817_PWRON_FALL_INT;
+		priv->plug_out_int = RK817_PLUG_OUT_INT;
 		priv->init_reg = rk817_init_reg;
 		priv->init_reg_num = ARRAY_SIZE(rk817_init_reg);
 		priv->irq_reg = rk817_irq_reg;
@@ -260,7 +287,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	/* mask and clear intertup */
+	/* mask and clear interrupt */
 	for (i = 0; i < priv->init_reg_num; i++) {
 		ret = pmic_reg_write(dev->parent,
 				     priv->init_reg[i].reg,

commit f7ec925b706a9b3c72a805266a9504903be94c1d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 19:37:53 2018 +0800

    rockchip: dts: px30-evb: enable RK817 pwrkey
    
    Change-Id: Iec05e7d31596c4f84bed523f619022cdda474597
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index c890607954..7fd0d4feb3 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -116,6 +116,10 @@
 			function = "gpio";
 		};
 
+		pwrkey {
+			status = "okay";
+		};
+
 		regulators {
 			vdd_arm: DCDC_REG1 {
 				regulator-always-on;
@@ -357,4 +361,4 @@
 			<0 7 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
-};
\ No newline at end of file
+};

commit 3e0925058e5d0ac9c98291f9bef8c687653aa76a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 17:21:01 2018 +0800

    regulator: add min_sel for rk816 buck and ldo
    
    This fixes get voltage error
    
    Change-Id: I8e0b6bd16b82ebdd0fe9d2d81a19bee0f8881037
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index eae5112010..edad841e13 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -65,13 +65,13 @@ static const struct rk8xx_reg_info rk808_buck[] = {
 
 static const struct rk8xx_reg_info rk816_buck[] = {
 	/* buck 1 */
-	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 2 */
-	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x00, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3c, },
+	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, 0x3f, },
 	/* buck 3 */
 	{ 712500, 12500, -1, -1, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */

commit 7f18d96c7080c9ed0c4236884e6094197f250da3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 15:08:31 2018 +0800

    pmic: add RK817 support
    
    include sub modules: pmic, regulator, pwrkey
    
    Change-Id: I3a1cbaa3c4d069cbac17124f9c0fe3b01184697c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 68530a6fd0..f9a8dd7816 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -14,6 +14,17 @@
 #include <asm/arch/periph.h>
 #include <dm/pinctrl.h>
 
+#define RK817_GPIO_INT_CFG	0xfe
+#define	RK817_INT_STS_REG0	0xf8
+#define	RK817_INT_MSK_REG0	0xf9
+#define	RK817_INT_STS_REG1	0xfa
+#define	RK817_INT_MSK_REG1	0xfb
+#define	RK817_INT_STS_REG2	0xfc
+#define	RK817_INT_MSK_REG2	0xfd
+#define RK817_PWRON_RISE_INT	(1 << 1)
+#define RK817_PWRON_FALL_INT	(1 << 0)
+#define RK817_INT_POL_MSK	BIT(1)
+
 #define	RK816_INT_STS_REG1	0x49
 #define	RK816_INT_MSK_REG1	0x4a
 #define	RK816_INT_STS_REG2	0x4c
@@ -44,6 +55,26 @@ struct rk8xx_key_priv {
 	u32 irq_reg_num;
 };
 
+static struct reg_data rk817_init_reg[] = {
+	/* only enable rise/fall interrupt */
+	{ RK817_INT_MSK_REG0, 0xfc },
+	{ RK817_INT_MSK_REG1, 0xff },
+	{ RK817_INT_MSK_REG2, 0xff },
+	/* clear all interrupt states */
+	{ RK817_INT_STS_REG0, 0xff },
+	{ RK817_INT_STS_REG1, 0xff },
+	{ RK817_INT_STS_REG2, 0xff },
+	/* pmic_int active low */
+	{ RK817_GPIO_INT_CFG, 0x20 },
+};
+
+static struct reg_data rk817_irq_reg[] = {
+	/* clear all interrupt states */
+	{ RK817_INT_STS_REG0, 0xff },
+	{ RK817_INT_STS_REG1, 0xff },
+	{ RK817_INT_STS_REG2, 0xff },
+};
+
 static struct reg_data rk816_init_reg[] = {
 	/* only enable rise/fall interrupt */
 	{ RK816_INT_MSK_REG1, 0x9f },
@@ -118,6 +149,8 @@ static void pwrkey_irq_handler(int irq, void *data)
 	struct input_key *key = dev_get_platdata(dev);
 	int ret, val, i;
 
+	debug("%s: irq = %d\n", __func__, irq);
+
 	/* read status */
 	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
 	if (val < 0) {
@@ -146,6 +179,9 @@ static void pwrkey_irq_handler(int irq, void *data)
 			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
 			       __func__, priv->irq_reg[i].reg, ret);
 		}
+
+		debug("%s: reg[0x%x] = 0x%x\n", __func__, priv->irq_reg[i].reg,
+		      pmic_reg_read(dev->parent, priv->irq_reg[i].reg));
 	}
 }
 
@@ -210,7 +246,16 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		priv->irq_reg = rk816_irq_reg;
 		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
-
+	case RK817_ID:
+		priv->int_sts_reg = RK817_INT_STS_REG0;
+		priv->int_msk_reg = RK817_INT_MSK_REG0;
+		priv->pwron_rise_int = RK817_PWRON_RISE_INT;
+		priv->pwron_fall_int = RK817_PWRON_FALL_INT;
+		priv->init_reg = rk817_init_reg;
+		priv->init_reg_num = ARRAY_SIZE(rk817_init_reg);
+		priv->irq_reg = rk817_irq_reg;
+		priv->irq_reg_num = ARRAY_SIZE(rk817_irq_reg);
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -225,6 +270,9 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 			       __func__, priv->init_reg[i].reg, ret);
 			return ret;
 		}
+
+		debug("%s: reg[%x] = 0x%x\n", __func__, priv->init_reg[i].reg,
+		      pmic_reg_read(dev->parent, priv->init_reg[i].reg));
 	}
 
 	return pwrkey_interrupt_init(dev);
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 4aa6e64978..81bbc38891 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -27,6 +27,7 @@ static const struct pmic_child_info power_key_info[] = {
 
 static const struct pmic_child_info fuel_gauge_info[] = {
 	{ .prefix = "battery", .driver = "rk818_fg"},
+	{ .prefix = "battery", .driver = "rk817_fg"},
 	{ .prefix = "battery", .driver = "rk816_fg"},
 	{ },
 };
@@ -66,16 +67,22 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 static int rk8xx_shutdown(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
-	u8 val, dev_off;
+	u8 val, dev_off, devctrl_reg;
 	int ret = 0;
 
 	switch (priv->variant) {
 	case RK808_ID:
+		devctrl_reg = REG_DEVCTRL;
 		dev_off = BIT(3);
 		break;
 	case RK805_ID:
 	case RK816_ID:
 	case RK818_ID:
+		devctrl_reg = REG_DEVCTRL;
+		dev_off = BIT(0);
+		break;
+	case RK817_ID:
+		devctrl_reg = RK817_REG_SYS_CFG3;
 		dev_off = BIT(0);
 		break;
 	default:
@@ -83,18 +90,18 @@ static int rk8xx_shutdown(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	ret = dm_i2c_read(dev, REG_DEVCTRL, &val, 1);
+	ret = dm_i2c_read(dev, devctrl_reg, &val, 1);
 	if (ret) {
 		printf("read error from device: %p register: %#x!",
-		       dev, REG_DEVCTRL);
+		       dev, devctrl_reg);
 		return ret;
 	}
 
 	val |= dev_off;
-	ret = dm_i2c_write(dev, REG_DEVCTRL, &val, 1);
+	ret = dm_i2c_write(dev, devctrl_reg, &val, 1);
 	if (ret) {
 		printf("write error to device: %p register: %#x!",
-		       dev, REG_DEVCTRL);
+		       dev, devctrl_reg);
 		return ret;
 	}
 
@@ -136,14 +143,24 @@ static int rk8xx_bind(struct udevice *dev)
 static int rk8xx_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *priv = dev_get_priv(dev);
-	uint8_t msb, lsb;
+	uint8_t msb, lsb, id_msb, id_lsb;
 
 	/* read Chip variant */
-	rk8xx_read(dev, ID_MSB, &msb, 1);
-	rk8xx_read(dev, ID_LSB, &lsb, 1);
+	if (device_is_compatible(dev, "rockchip,rk817")) {
+		id_msb = RK817_ID_MSB;
+		id_lsb = RK817_ID_LSB;
+	} else {
+		id_msb = ID_MSB;
+		id_lsb = ID_LSB;
+	}
+
+	rk8xx_read(dev, id_msb, &msb, 1);
+	rk8xx_read(dev, id_lsb, &lsb, 1);
 
 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
 
+	printf("PMIC:  RK%x\n", priv->variant);
+
 	return 0;
 }
 
@@ -158,6 +175,7 @@ static const struct udevice_id rk8xx_ids[] = {
 	{ .compatible = "rockchip,rk805" },
 	{ .compatible = "rockchip,rk808" },
 	{ .compatible = "rockchip,rk816" },
+	{ .compatible = "rockchip,rk817" },
 	{ .compatible = "rockchip,rk818" },
 	{ }
 };
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 9b51c243dc..eae5112010 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -33,12 +33,27 @@
 #define RK818_USB_ILIM_SEL_MASK		0x0f
 #define RK818_USB_CHG_SD_VSEL_MASK	0x70
 
+/* RK817 BUCK */
+#define RK817_BUCK_ON_VSEL(n)		(0xbb + 3 * (n - 1))
+#define RK817_BUCK_SLP_VSEL(n)		(0xbc + 3 * (n - 1))
+#define RK817_BUCK_VSEL_MASK		0x7f
+
+/* RK817 LDO */
+#define RK817_LDO_ON_VSEL(n)		(0xcc + 2 * (n - 1))
+#define RK817_LDO_SLP_VSEL(n)		(0xcd + 2 * (n - 1))
+#define RK817_LDO_VSEL_MASK		0x7f
+
+/* RK817 ENABLE */
+#define RK817_POWER_EN(n)		(0xb1 + (n))
+#define RK817_POWER_SLP_EN(n)		(0xb5 + (n))
+
 struct rk8xx_reg_info {
 	uint min_uv;
 	uint step_uv;
-	s8 vsel_reg;
-	s8 vsel_sleep_reg;
+	u8 vsel_reg;
+	u8 vsel_sleep_reg;
 	u8 vsel_mask;
+	u8 min_sel;
 };
 
 static const struct rk8xx_reg_info rk808_buck[] = {
@@ -63,6 +78,25 @@ static const struct rk8xx_reg_info rk816_buck[] = {
 	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk817_buck[] = {
+	/* buck 1 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_VSEL_MASK, 0x59, },
+	/* buck 2 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_VSEL_MASK, 0x59, },
+	/* buck 3 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 2400000,	0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_VSEL_MASK, 0x59, },
+	/* buck 4 */
+	{  500000,  12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x00, },
+	{ 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x50, },
+	{ 3400000,	0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_VSEL_MASK, 0x63, },
+};
+
 static const struct rk8xx_reg_info rk818_buck[] = {
 	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
 	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
@@ -91,6 +125,36 @@ static const struct rk8xx_reg_info rk816_ldo[] = {
 	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk817_ldo[] = {
+	/* ldo1 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo2 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo3 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo4 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo5 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo6 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo7 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo8 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), RK817_LDO_VSEL_MASK, 0x70, },
+	/* ldo9 */
+	{  600000, 25000, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x00, },
+	{ 3400000,     0, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), RK817_LDO_VSEL_MASK, 0x70, },
+};
+
 static const struct rk8xx_reg_info rk818_ldo[] = {
 	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
@@ -131,6 +195,24 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 		default:
 			return &rk816_buck[num + 4];
 		}
+
+	case RK817_ID:
+		switch (num) {
+		case 0 ... 2:
+			if (uvolt < 1500000)
+				return &rk817_buck[num * 3 + 0];
+			else if (uvolt < 2400000)
+				return &rk817_buck[num * 3 + 1];
+			else
+				return &rk817_buck[num * 3 + 2];
+		default:
+			if (uvolt < 1500000)
+				return &rk817_buck[num * 3 + 0];
+			else if (uvolt < 3400000)
+				return &rk817_buck[num * 3 + 1];
+			else
+				return &rk817_buck[num * 3 + 2];
+		}
 	case RK818_ID:
 		return &rk818_buck[num];
 	default:
@@ -146,9 +228,14 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 
 	if (info->vsel_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)	/* Fixed voltage */
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, buck+1, info->vsel_reg, mask, val);
 
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
@@ -191,6 +278,13 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
 				      enable ? mask : 0);
 		break;
+	case RK817_ID:
+		if (enable)
+			value = ((1 << buck) | (1 << (buck + 4)));
+		else
+			value = ((0 << buck) | (1 << (buck + 4)));
+		ret = pmic_reg_write(pmic, RK817_POWER_EN(0), value);
+		break;
 	default:
 		ret = -EINVAL;
 	}
@@ -207,9 +301,14 @@ static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
 
 	if (info->vsel_sleep_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, buck+1, info->vsel_sleep_reg, mask, val);
 
 	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
 }
@@ -238,6 +337,11 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK817_ID:
+		mask = 1 << buck;
+		ret = pmic_reg_read(pmic, RK817_POWER_EN(0));
+			debug("%s: %s, buck=%d, en=%x\n", __func__, pmic->name, buck, ret);
+		break;
 	}
 	return ret & mask ? true : false;
 }
@@ -262,6 +366,11 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK817_ID:
+		mask = 1 << buck;
+		ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
+				      enable ? mask : 0);
+		break;
 	default:
 		ret = -EINVAL;
 	}
@@ -270,7 +379,7 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 }
 
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
-					     int num)
+						int num, int uvolt)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
@@ -278,6 +387,11 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	case RK805_ID:
 	case RK816_ID:
 		return &rk816_ldo[num];
+	case RK817_ID:
+		if (uvolt < 3400000)
+			return &rk817_ldo[num * 2 + 0];
+		else
+			return &rk817_ldo[num * 2 + 1];
 	case RK818_ID:
 		return &rk818_ldo[num];
 	default:
@@ -309,6 +423,20 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 		if (ret < 0)
 			return ret;
 		break;
+	case RK817_ID:
+		if (ldo < 4) {
+			mask = 1 << ldo;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(1));
+		} else if (ldo < 8) {
+			mask = 1 << (ldo - 4);
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(2));
+		} else if (ldo == 8) {
+			mask = 1 << 0;
+			ret = pmic_reg_read(pmic, RK817_POWER_EN(3));
+		} else {
+			return false;
+		}
+		break;
 	}
 	return ret & mask ? true : false;
 }
@@ -341,6 +469,24 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
 				       enable ? mask : 0);
 		break;
+	case RK817_ID:
+		if (ldo < 4) {
+			en_reg = RK817_POWER_EN(1);
+		} else if (ldo < 8) {
+			ldo -= 4;
+			en_reg = RK817_POWER_EN(2);
+		} else if (ldo == 8) {
+			ldo = 0;	/* BIT 0 */
+			en_reg = RK817_POWER_EN(3);
+		} else {
+			return -EINVAL;
+		}
+		if (enable)
+			value = ((1 << ldo) | (1 << (ldo + 4)));
+		else
+			value = ((0 << ldo) | (1 << (ldo + 4)));
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
 	}
 
 	return ret;
@@ -365,6 +511,17 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
 				      enable ? 0 : mask);
 		break;
+	case RK817_ID:
+		if (ldo == 8) {
+			mask = 1 << 4;	/* LDO9 */
+			ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
+					      enable ? mask : 0);
+		} else {
+			mask = 1 << ldo;
+			ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(1), mask,
+					      enable ? mask : 0);
+		}
+		break;
 	}
 
 	return ret;
@@ -373,12 +530,14 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
+	/* We assume level-1 voltage is enough for usage in U-Boot */
 	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
 	int mask = info->vsel_mask;
 	int ret, val;
 
 	if (info->vsel_reg == -1)
 		return -ENOSYS;
+
 	ret = pmic_reg_read(dev->parent, info->vsel_reg);
 	if (ret < 0)
 		return ret;
@@ -425,7 +584,7 @@ static int buck_get_enable(struct udevice *dev)
 static int ldo_get_value(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
 	int mask = info->vsel_mask;
 	int ret, val;
 
@@ -442,15 +601,20 @@ static int ldo_get_value(struct udevice *dev)
 static int ldo_set_value(struct udevice *dev, int uvolt)
 {
 	int ldo = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
 	int mask = info->vsel_mask;
 	int val;
 
 	if (info->vsel_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, ldo+1, info->vsel_reg, mask, val);
 
 	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
 }
@@ -458,15 +622,20 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
 {
 	int ldo = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
 	int mask = info->vsel_mask;
 	int val;
 
 	if (info->vsel_sleep_reg == -1)
 		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
-	      val);
+
+	if (info->step_uv == 0)
+		val = info->min_sel;
+	else
+		val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
+
+	debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
+	      __func__, uvolt, ldo+1, info->vsel_sleep_reg, mask, val);
 
 	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
 }
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 699fd87dba..79c57896bd 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -170,6 +170,10 @@ enum {
 	RK808_NUM_OF_REGS,
 };
 
+enum {
+	RK817_REG_SYS_CFG3 = 0xf4,
+};
+
 enum {
 	RK816_REG_DCDC_EN1 = 0x23,
 	RK816_REG_DCDC_EN2,
@@ -183,9 +187,12 @@ enum {
 	RK805_ID = 0x8050,
 	RK808_ID = 0x0000,
 	RK816_ID = 0x8160,
+	RK817_ID = 0x8170,
 	RK818_ID = 0x8180,
 };
 
+#define RK817_ID_MSB	0xed
+#define RK817_ID_LSB	0xee
 #define RK8XX_ID_MSK	0xfff0
 
 struct rk8xx_reg_table {

commit 2f22a22f29a6e6bba40267116a23224891b5006d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Feb 7 20:36:23 2018 +0800

    regulator: uclass: remove suspend voltage min and max validate
    
    min and max voltage are used to limit run time voltage, suspend
    voltage should not limited by them.
    
    Change-Id: I8b3660c51992d8baec6401630e3ec093b01b1260
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index a2aab2b4cf..2c1a1854f6 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -58,13 +58,6 @@ int regulator_set_value(struct udevice *dev, int uV)
 int regulator_set_suspend_value(struct udevice *dev, int uV)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
-	struct dm_regulator_uclass_platdata *uc_pdata;
-
-	uc_pdata = dev_get_uclass_platdata(dev);
-	if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
-		return -EINVAL;
-	if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV)
-		return -EINVAL;
 
 	if (!ops || !ops->set_suspend_value)
 		return -ENOSYS;
@@ -378,6 +371,11 @@ static int regulator_pre_probe(struct udevice *dev)
 	    (uc_pdata->min_uA == uc_pdata->max_uA))
 		uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_UA;
 
+	debug("dev.name=%s: min_uV=%d, max_uV=%d, boot-on=%d, always-on=%d, "
+	      "off-in-suspend=%d, suspend_volt=%d\n",
+	      dev->name, uc_pdata->min_uV, uc_pdata->max_uV, uc_pdata->boot_on,
+	      uc_pdata->always_on, !uc_pdata->suspend_on, uc_pdata->suspend_uV);
+
 	return 0;
 }
 

commit 0ff0e214445925825c27fa2a904b18d08f7db6c1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Feb 8 11:21:43 2018 +0800

    make.sh: support a lot of sub commands
    
    1. make clean, make distclean and make mrproper;
    2. objdump elf file;
    
    Append 'clean', 'distclean', 'mrproper' or 'elf' to build command
    
    Example:
            ./make.sh evb-px30 clean
            ./make.sh evb-px30 distclean
            ./make.sh evb-px30 mrproper
            ./make.sh evb-px30 elf
    
    you can also use 'elf[option]', like: 'elf-D', 'elf-d', 'elf-S'...
    [option] is not necessary(default -D), it would be used as objdump
    command option.
    
    Change-Id: If6402ee9b0f9bd79aa7f18703ce0061106b11e26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index ac8689f80b..9324abe09f 100755
--- a/make.sh
+++ b/make.sh
@@ -1,6 +1,7 @@
 #!/bin/sh
 set -e
 BOARD=$1
+SUBCMD=$2
 RKCHIP=${BOARD##*-}
 DSTDIR=rockdev/${RKCHIP}
 RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
@@ -14,11 +15,15 @@ RKBIN_TOOLS=../rkbin/tools
 
 # Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
 TOOLCHAIN_GCC=./
+TOOLCHAIN_OBJDUMP=./
 # GCC toolchain
 GCC_ARM32=arm-linux-androideabi-
 GCC_ARM64=aarch64-linux-android-
 TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
 TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+# OBJDMP
+OBJ_ARM32=arm-linux-androideabi-objdump
+OBJ_ARM64=aarch64-linux-android-objdump
 
 prepare()
 {
@@ -68,6 +73,7 @@ select_toolchain()
 		if [ -d ${TOOLCHAIN_ARM64} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
+			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM64}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
 			exit 1
@@ -76,6 +82,7 @@ select_toolchain()
 		if [ -d ${TOOLCHAIN_ARM32} ]; then
 			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
 			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
+			TOOLCHAIN_OBJDUMP=${absolute_path}/bin/${OBJ_ARM32}
 		else
 			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
 			exit 1
@@ -85,6 +92,30 @@ select_toolchain()
 	echo "toolchain: ${TOOLCHAIN_GCC}"
 }
 
+sub_commands()
+{
+	local elf=${SUBCMD%-*} opt=${SUBCMD#*-}
+
+	# Make clean, distclean and mrproper
+	if [ "$SUBCMD" = 'clean' -o "$SUBCMD" = 'distclean' -o "$SUBCMD" = 'mrproper' ]; then
+		make $SUBCMD O=${DSTDIR}/out
+		exit 0
+	elif [ ${elf} = 'elf' ]; then
+		if [ ! -f ${DSTDIR}/out/u-boot ]; then
+			echo "Can't find elf file: ${DSTDIR}/out/u-boot"
+			exit 1
+		else
+			# default 'elf' without option, use '-D'
+			if [ "${elf}" = 'elf' -a "${opt}" = 'elf' ]; then
+				opt=D
+			fi
+
+			${TOOLCHAIN_OBJDUMP} -${opt} ${DSTDIR}/out/u-boot | less
+			exit 0
+		fi
+	fi
+}
+
 fixup_chip_name()
 {
 	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
@@ -176,6 +207,7 @@ prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
+sub_commands
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
 fixup_chip_name
 pack_uboot_image

commit c0ae4ef9469c25a17b0b6a72c63bd90b162c9045
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 22:02:17 2018 +0800

    rockchip: rkimg: fix compile warning
    
    Change-Id: I8988761a6504d9e7bfca3a6702266b8b69631984
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 5ace1893fe..3c58fa14db 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -147,7 +147,7 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
-	char *boot_media = NULL, *boot_mode = NULL;
+	char *boot_media = NULL;
 	char boot_options[128] = {0};
 	static int appended;
 

commit 5c47e3d4734d329f41880f3b6ccf76f598763980
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 20:09:10 2018 +0800

    dts: Kconfig: always enable OF_SPL_REMOVE_PROPS macros
    
    We need this even if there is no SPL.
    
    Change-Id: Ib61f6fd08204dd68730a2d006cef75bcae07084b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/dts/Kconfig b/dts/Kconfig
index 0cef225ba9..edd5d7f830 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -226,7 +226,6 @@ config SPL_MULTI_DTB_FIT_USER_DEF_ADDR
 
 config OF_SPL_REMOVE_PROPS
 	string "List of device tree properties to drop for SPL"
-	depends on SPL_OF_CONTROL
 	default "interrupt-parent" if SPL_PINCTRL && SPL_CLK
 	default "clocks clock-names interrupt-parent" if SPL_PINCTRL
 	default "pinctrl-0 pinctrl-names interrupt-parent" if SPL_CLK

commit ca62cda2282aa664ea0ba2191734658a17947309
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 20:07:48 2018 +0800

    pwm-backlight: make power-supply as option
    
    Some pwm backlight may not need 'power-supply', let's make it as option
    in pwm-backlight driver.
    
    Change-Id: Ie25ab972b352cd66670fdccfdee45fa1199741ed
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index b99d2eaf95..13c20c2f9d 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -32,16 +32,18 @@ static int pwm_backlight_enable(struct udevice *dev)
 	uint duty_cycle;
 	int ret;
 
-	plat = dev_get_uclass_platdata(priv->reg);
-	debug("%s: Enable '%s', regulator '%s'/'%s'\n", __func__, dev->name,
-	      priv->reg->name, plat->name);
-	ret = regulator_set_enable(priv->reg, true);
-	if (ret) {
-		debug("%s: Cannot enable regulator for PWM '%s'\n", __func__,
-		      dev->name);
-		return ret;
+	if (priv->reg) {
+		plat = dev_get_uclass_platdata(priv->reg);
+		debug("%s: Enable '%s', regulator '%s'/'%s'\n", __func__,
+		      dev->name, priv->reg->name, plat->name);
+		ret = regulator_set_enable(priv->reg, true);
+		if (ret) {
+			debug("%s: Cannot enable regulator for PWM '%s'\n",
+			      __func__, dev->name);
+			return ret;
+		}
+		mdelay(120);
 	}
-	mdelay(120);
 
 	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
 		(priv->max_level - priv->min_level + 1);
@@ -79,15 +81,17 @@ static int pwm_backlight_disable(struct udevice *dev)
 	mdelay(10);
 	dm_gpio_set_value(&priv->enable, 0);
 
-	plat = dev_get_uclass_platdata(priv->reg);
-	printf("%s: Disable '%s', regulator '%s'/'%s'\n", __func__, dev->name,
-	      priv->reg->name, plat->name);
-	ret = regulator_set_enable(priv->reg, false);
-	if (ret) {
-		debug("%s: Cannot enable regulator for PWM '%s'\n", __func__,
-		      dev->name);
+	if (priv->reg) {
+		plat = dev_get_uclass_platdata(priv->reg);
+		debug("%s: Disable '%s', regulator '%s'/'%s'\n", __func__,
+		      dev->name, priv->reg->name, plat->name);
+		ret = regulator_set_enable(priv->reg, false);
+		if (ret) {
+			debug("%s: Cannot enable regulator for PWM '%s'\n",
+			      __func__, dev->name);
+		}
+		mdelay(120);
 	}
-	mdelay(120);
 
 	return 0;
 }
@@ -102,10 +106,8 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 	debug("%s: start\n", __func__);
 	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
 					   "power-supply", &priv->reg);
-	if (ret) {
+	if (ret)
 		debug("%s: Cannot get power supply: ret=%d\n", __func__, ret);
-		return ret;
-	}
 	ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable,
 				   GPIOD_IS_OUT);
 	if (ret) {

commit 75de74fe7377569655ee628ce5fa2c146f0ae2e6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 22:21:56 2018 +0800

    rockchip: dts: rk3128: sync the mipi dts compatible name with kernel
    
    Change-Id: I2d32aadbd440219471a2638be415469b1dd49eea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index dd2b781226..9e2568f516 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -388,7 +388,7 @@
 	};
 
 	dsi: dsi@10110000 {
-		compatible = "rockchip,rk312x-mipi-dsi";
+		compatible = "rockchip,rk3128-mipi-dsi";
 		reg = <0x10110000 0x4000>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&mipi_dphy>;
@@ -541,7 +541,7 @@
 	};
 
 	mipi_dphy: mipi-dphy@20038000 {
-		compatible = "rockchip,rk312x-mipi-dphy";
+		compatible = "rockchip,rk3128-mipi-dphy";
 		reg = <0x20038000 0x4000>;
 		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>, <&cru HCLK_VIO_H2P>;
 		clock-names = "ref", "pclk", "h2p";

commit b7e3dd5707c6ec3318d27d6236c6d7c4636e395b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 22:20:59 2018 +0800

    rockchip: mipi: sync the rk312x compatible name with kernel
    
    Change-Id: Idc98c3caa3b1fcc318a8d24eb39fd03ca4ee4f9e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 8a8551e536..05175fe44c 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -1270,7 +1270,7 @@ static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	 .compatible = "rockchip,rk3399-mipi-dsi",
 	 .data = (ulong)&rk3399_mipi_dsi_data,
 	},{
-	 .compatible = "rockchip,rk312x-mipi-dsi",
+	 .compatible = "rockchip,rk3128-mipi-dsi",
 	 .data = (ulong)&rk312x_mipi_dsi_data,
 	},
 	{}
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index d1dbe05f81..4b3fd5f1a1 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -41,7 +41,7 @@ static const struct udevice_id rockchip_phy_ids[] = {
 	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
 	},
 	{
-	 .compatible = "rockchip,rk312x-mipi-dphy",
+	 .compatible = "rockchip,rk3128-mipi-dphy",
 	 .data = (ulong)&rockchip_rk312x_mipi_dphy_data,
 	},
 #endif

commit 4851da812fe1109c28a72ebc002a364b9d408afd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 21:51:14 2018 +0800

    rockchip: config: bnd-rk3126: remove pinctrl name for spl dtb
    
    Change-Id: Ib9634694b3f43e91d4b10472037c03de04fdc5ee
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 55f4bc4ca7..49534e1ccf 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SYS_MALLOC_F_LEN=0x38000
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y

commit 764853138da44d1ed011ea794e041f20c85a1953
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 17:58:57 2018 +0800

    rockchip: dts: rk312x: fix otg_vbus_drv pinctrl name
    
    Need to use a different name from host_vbus_drv
    
    Change-Id: Ic62d9d1ef3321367aa1fdd703034a66524df2c9b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 9159edd3c5..a49504b5f1 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -375,7 +375,7 @@
 
 &pinctrl {
 	usb_otg {
-		otg_vbus_drv: host-vbus-drv {
+		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 1ad1829464..4982b82c17 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -386,7 +386,7 @@
 
 &pinctrl {
 	usb_otg {
-		otg_vbus_drv: host-vbus-drv {
+		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index a3e538cd5e..9546bdad03 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -83,7 +83,7 @@
 
 &pinctrl {
 	usb_otg {
-		otg_vbus_drv: host-vbus-drv {
+		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};

commit 89f947ecb4be33b215acca4bf00e38261d2070db
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 11:44:27 2018 +0800

    core: device: skip bind device already there
    
    With kernel dtb support, there have two dtb and some device may the same,
    skip it if already in the list, node in u-boot dtb will be used.
    
    Change-Id: Ic9f8b73e3708a03416a9dc4ab6c72fa0184a6fdb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 9a46a7bbe5..00f8d7d13c 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -48,6 +48,15 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 		return ret;
 	}
 
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		if (!strcmp(name, dev->name)){
+			debug("%s do not bind dev already in list %s\n",
+			        __func__, name);
+			dev->node = node;
+			return 0;
+		}
+	}
+
 	dev = calloc(1, sizeof(struct udevice));
 	if (!dev)
 		return -ENOMEM;

commit 01236d99d8d44379f3506065b7806df562dfe28d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 29 18:03:42 2018 +0800

    rockchip: bnd-rk3126: use large buffer to support kernel dtb
    
    Change-Id: I910e1a1a8d9dc89e09e447b4abd0e37373ff240c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 261c6c5c81..55f4bc4ca7 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_SYS_MALLOC_F_LEN=0x38000
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y

commit e07576b3843f5f2314581dfe764a9db87195569c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 16:38:12 2018 +0800

    rockchip: bnd-rk3126: enable nandc in pre-relocate
    
    Change-Id: I760012fb26385e68d41fc7dc92cb7e363118d73a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 09f4b69a81..9159edd3c5 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -341,6 +341,7 @@
 };
 
 &nandc {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 

commit 26542506fbc70fb38896e5b942d5028b4600f883
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:35:33 2018 +0800

    rockchip: rk3126: enable live dt
    
    Change-Id: I32398167a4e9dda749fe36d82f591d9f662d7fc9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index a94df64af9..261c6c5c81 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -37,6 +37,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_CHECKS=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index c44891c1a4..8cb856bc1d 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -9,6 +9,8 @@ CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SYS_MALLOC_F_LEN=0x38000
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y
@@ -36,6 +38,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_CHECKS=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y

commit 9aa59efb89ea54fce279be17e1fcbf607146fdb0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Feb 9 11:59:10 2018 +0800

    rockchip: drm: fix live dt use in lvds
    
    Change-Id: I144750e3e10180055ac02480c2ef989d44e4d7bf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 260b800336..6eb77b0c1c 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -13,6 +13,7 @@
 #include <linux/media-bus-format.h>
 #include <dm/uclass.h>
 #include <dm/uclass-id.h>
+#include <dm/ofnode.h>
 #include <asm/gpio.h>
 #include <backlight.h>
 #include <power/regulator.h>
@@ -27,7 +28,7 @@
 struct panel_simple {
 	struct udevice *dev;
 	const void *blob;
-	int node;
+	ofnode node;
 
 	const struct drm_display_mode *mode;
 	int bus_format;
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index ce8004233b..45216750b2 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -10,8 +10,11 @@
 #include <malloc.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
+#include <linux/ioport.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <dm/read.h>
+#include <dm/ofnode.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/gpio.h>
@@ -506,13 +509,12 @@ static int rockchip_lvds_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct rockchip_lvds_chip_data *pdata = connector->data;
-	int lvds_node = conn_state->node;
 	struct rockchip_lvds_device *lvds;
 	const char *name;
 	int i, width;
-	struct fdt_resource lvds_phy, lvds_ctrl;
+	struct resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
-	int panel_node = panel_state->node;
+	ofnode panel_node = panel_state->node;
 	int ret;
 
 	lvds = malloc(sizeof(*lvds));

commit 69cea70e22adbdf882f82d4ca7b9210f09a875c1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 20:30:35 2018 +0800

    pwm-backlight: support rockchip invert level array
    
    Some Rockchip dts use invert level array for backligh.
    
    Change-Id: Ic6b5e22031cf570a56bb2854ed10f3e7c24029cc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index 5f7ea88db8..b99d2eaf95 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -135,6 +135,9 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 	if (cell && count > index) {
 		priv->default_level = fdt32_to_cpu(cell[index]);
 		priv->max_level = fdt32_to_cpu(cell[count - 1]);
+		/* Rockchip dts may use a invert sequence level array */
+		if(fdt32_to_cpu(cell[0]) > priv->max_level)
+			priv->max_level = fdt32_to_cpu(cell[0]);
 	} else {
 		priv->default_level = index;
 		priv->max_level = 255;

commit 53497b6bdd0588d4a8127494c2e194f1f7702ed9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 20:34:17 2018 +0800

    rockchip: dts: rk3128: sync pinctrl from kernel
    
    Some pinctrl setting are not correct for rk3128, sync from kernel.
    
    Change-Id: Ib98455ca61ca8a8b19cf2d8134d71ab358ac0a37
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e3223b2402..dd2b781226 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -226,18 +226,14 @@
 		reg = <0x20000110 0x24>;
 		#reset-cells = <1>;
 	};
-
 	nandc: nandc@10500000 {
 		compatible = "rockchip,rk-nandc";
 		reg = <0x10500000 0x4000>;
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
 		nandc_id = <0>;
-		clocks = <&cru SCLK_NANDC>,
-			 <&cru HCLK_NANDC>,
-			 <&cru SRST_NANDC>;
-		clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
 	};
 
 	dmc: dmc@20004000 {
@@ -629,17 +625,14 @@
 		compatible = "rockchip,rk3128-spi", "rockchip,rk3288-spi";
 		reg = <0x20074000 0x1000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-		#address-cells = <1>;
-		#size-cells = <0>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&spi0_txd_mux0 &spi0_rxd_mux0 &spi0_clk_mux0 &spi0_cs0_mux0 &spi0_cs1_mux0>;
-		rockchip,spi-src-clk = <0>;
-		num-cs = <2>;
-		clocks =<&cru SCLK_SPI>, <&cru PCLK_SPI>;
-		clock-names = "spi","pclk_spi0";
+		pinctrl-0 = <&spi0_tx &spi0_rx &spi0_clk &spi0_cs0 &spi0_cs1>;
+		clock-names = "spiclk", "apb_pclk";
 		dmas = <&pdma 8>, <&pdma 9>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
 	};
 
 	grf: syscon@20008000 {
@@ -751,66 +744,78 @@
 			};
 		};
 
-
-		nandc{
-			nandc_ale:nandc-ale {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			nandc_cle:nandc-cle {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			nandc_wrn:nandc-wrn {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			nandc_rdn:nandc-rdn {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
+						<0 RK_PA1 1 &pcfg_pull_none>;
 			};
+		};
 
-			nandc_rdy:nandc-rdy {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
+						<0 RK_PA3 1 &pcfg_pull_none>;
 			};
+		};
 
-			nandc_cs0:nandc-cs0 {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins = <2 RK_PC4 3 &pcfg_pull_none>,
+						<2 RK_PC5 3 &pcfg_pull_none>;
 			};
+		};
 
-			nandc_data: nandc-data {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
+						<0 RK_PA7 1 &pcfg_pull_none>;
 			};
 		};
 
-
 		uart0 {
 			uart0_xfer: uart0-xfer {
-				rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_none>,
-						<0 17 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD2 2 &pcfg_pull_default>,
+						<2 RK_PD3 2 &pcfg_pull_none>;
 			};
 
 			uart0_cts: uart0-cts {
-				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD5 2 &pcfg_pull_none>;
 			};
 
 			uart0_rts: uart0-rts {
-				rockchip,pins = <0 19 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PC1 2 &pcfg_pull_none>;
 			};
 		};
 
 		uart1 {
 			uart1_xfer: uart1-xfer {
-				rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_none>,
-						<2 23 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PB1 2 &pcfg_pull_default>,
+						<1 RK_PB2 2 &pcfg_pull_default>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins = <1 RK_PB0 2 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins = <1 RK_PB3 2 &pcfg_pull_none>;
 			};
 		};
 
-                uart2 {
-                        uart2_xfer: uart2-xfer {
-                                rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,
-                                                <1 19 RK_FUNC_2 &pcfg_pull_none>;
-                        };
-                };
+		uart2 {
+			uart2_xfer: uart2-xfer {
+				rockchip,pins = <1 RK_PC2 2 &pcfg_pull_default>,
+						<1 RK_PC3 2 &pcfg_pull_none>;
+			};
+
+			uart2_cts: uart2-cts {
+				rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>;
+			};
+
+			uart2_rts: uart2-rts {
+				rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>;
+			};
+		};
 
 		sdmmc {
 			sdmmc_clk: sdmmc-clk {
@@ -818,7 +823,7 @@
 			};
 
 			sdmmc_cmd: sdmmc-cmd {
-				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_default>;
+				rockchip,pins = <1 RK_PB7 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_wp: sdmmc-wp {
@@ -837,79 +842,173 @@
 			};
 		};
 
+		sdio {
+			sdio_clk: sdio-clk {
+				rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>;
+			};
+
+			sdio_cmd: sdio-cmd {
+				rockchip,pins = <0 RK_PA3 2 &pcfg_pull_default>;
+			};
+
+			sdio_pwren: sdio-pwren {
+				rockchip,pins = <0 RK_PD6 1 &pcfg_pull_default>;
+			};
+
+			sdio_bus4: sdio-bus4 {
+				rockchip,pins = <1 RK_PA1 2 &pcfg_pull_default>,
+						<1 RK_PA2 2 &pcfg_pull_default>,
+						<1 RK_PA4 2 &pcfg_pull_default>,
+						<1 RK_PA5 2 &pcfg_pull_default>;
+			};
+		};
+
+		hdmi {
+			hdmii2c_xfer: hdmii2c-xfer {
+				rockchip,pins = <0 RK_PA6 2 &pcfg_pull_none>,
+						<0 RK_PA7 2 &pcfg_pull_none>;
+			};
+		};
+
+		i2s {
+			i2s_bus: i2s-bus {
+				rockchip,pins = <0 RK_PB0 1 &pcfg_pull_none>,
+						<0 RK_PB1 1 &pcfg_pull_none>,
+						<0 RK_PB3 1 &pcfg_pull_none>,
+						<0 RK_PB4 1 &pcfg_pull_none>,
+						<0 RK_PB5 1 &pcfg_pull_none>,
+						<0 RK_PB6 1 &pcfg_pull_none>;
+			};
+
+			i2s1_bus: i2s1-bus {
+				rockchip,pins = <1 RK_PA0 1 &pcfg_pull_none>,
+						<1 RK_PA1 1 &pcfg_pull_none>,
+						<1 RK_PA2 1 &pcfg_pull_none>,
+						<1 RK_PA3 1 &pcfg_pull_none>,
+						<1 RK_PA4 1 &pcfg_pull_none>,
+						<1 RK_PA5 1 &pcfg_pull_none>;
+			};
+		};
+
 		pwm0 {
 			pwm0_pin: pwm0-pin {
-				rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD2 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm1 {
 			pwm1_pin: pwm1-pin {
-				rockchip,pins = <0 1 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm2 {
 			pwm2_pin: pwm2-pin {
-				rockchip,pins = <0 1 2 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm3 {
 			pwm3_pin: pwm3-pin {
-				rockchip,pins = <0 27 1 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PD2 1 &pcfg_pull_none>;
 			};
 		};
 
-		i2c0 {
-			i2c0_xfer: i2c0-xfer {
-				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
-						<0 1 RK_FUNC_1 &pcfg_pull_none>;
+		gmac {
+			rgmii_pins: rgmii-pins {
+				rockchip,pins = <2 RK_PB0 3 &pcfg_pull_default>,
+						<2 RK_PB1 3 &pcfg_pull_default>,
+						<2 RK_PB3 3 &pcfg_pull_default>,
+						<2 RK_PB4 3 &pcfg_pull_default>,
+						<2 RK_PB5 3 &pcfg_pull_default>,
+						<2 RK_PB6 3 &pcfg_pull_default>,
+						<2 RK_PC0 3 &pcfg_pull_default>,
+						<2 RK_PC1 3 &pcfg_pull_default>,
+						<2 RK_PC2 3 &pcfg_pull_default>,
+						<2 RK_PC3 3 &pcfg_pull_default>,
+						<2 RK_PD1 3 &pcfg_pull_default>,
+						<2 RK_PC4 4 &pcfg_pull_default>,
+						<2 RK_PC5 4 &pcfg_pull_default>,
+						<2 RK_PC6 4 &pcfg_pull_default>,
+						<2 RK_PC7 4 &pcfg_pull_default>;
 			};
-		};
 
-		i2c1 {
-			i2c1_xfer: i2c1-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			rmii_pins: rmii-pins {
+				rockchip,pins = <2 RK_PB0 3 &pcfg_pull_default>,
+						<2 RK_PB4 3 &pcfg_pull_default>,
+						<2 RK_PB5 3 &pcfg_pull_default>,
+						<2 RK_PB6 3 &pcfg_pull_default>,
+						<2 RK_PB7 3 &pcfg_pull_default>,
+						<2 RK_PC0 3 &pcfg_pull_default>,
+						<2 RK_PC1 3 &pcfg_pull_default>,
+						<2 RK_PC3 3 &pcfg_pull_default>,
+						<2 RK_PC4 3 &pcfg_pull_default>,
+						<2 RK_PD1 3 &pcfg_pull_default>;
 			};
 		};
 
-		i2c2 {
-			i2c2_xfer: i2c2-xfer {
-				rockchip,pins = <2 20 3 &pcfg_pull_none>,
-						<2 21 3 &pcfg_pull_none>;
+		spdif {
+			spdif_tx: spdif-tx {
+				rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>;
 			};
 		};
 
-		i2c3 {
-			i2c3_xfer: i2c3-xfer {
-				rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
-						<0 7 RK_FUNC_1 &pcfg_pull_none>;
+		spi {
+			spi0_clk: spi0-clk {
+				rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>;
 			};
-		};
 
-		spi0 {
-			spi0_txd_mux0:spi0-txd-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_cs0: spi0-cs0 {
+				rockchip,pins = <1 RK_PB3 1 &pcfg_pull_default>;
 			};
 
-			spi0_rxd_mux0:spi0-rxd-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_tx: spi0-tx {
+				rockchip,pins = <1 RK_PB1 1 &pcfg_pull_default>;
 			};
 
-			spi0_clk_mux0:spi0-clk-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_rx: spi0-rx {
+				rockchip,pins = <1 RK_PB2 1 &pcfg_pull_default>;
 			};
 
-			spi0_cs0_mux0:spi0-cs0-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi0_cs1: spi0-cs1 {
+				rockchip,pins = <1 RK_PB4 1 &pcfg_pull_default>;
 			};
 
-			spi0_cs1_mux0:spi0-cs1-mux0 {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			spi1_clk: spi1-clk {
+				rockchip,pins = <2 RK_PA0 2 &pcfg_pull_default>;
+			};
+
+			spi1_cs0: spi1-cs0 {
+				rockchip,pins = <1 RK_PD6 3 &pcfg_pull_default>;
+			};
+
+			spi1_tx: spi1-tx {
+				rockchip,pins = <1 RK_PD5 3 &pcfg_pull_default>;
+			};
+
+			spi1_rx: spi1-rx {
+				rockchip,pins = <1 RK_PD4 3 &pcfg_pull_default>;
 			};
-		};
 
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <1 RK_PD7 3 &pcfg_pull_default>;
+			};
+
+			spi2_clk: spi2-clk {
+				rockchip,pins = <0 RK_PB1 2 &pcfg_pull_default>;
+			};
+
+			spi2_cs0: spi2-cs0 {
+				rockchip,pins = <0 RK_PB6 2 &pcfg_pull_default>;
+			};
+
+			spi2_tx: spi2-tx {
+				rockchip,pins = <0 RK_PB3 2 &pcfg_pull_default>;
+			};
+
+			spi2_rx: spi2-rx {
+				rockchip,pins = <0 RK_PB5 2 &pcfg_pull_default>;
+			};
+		};
 	};
 };

commit 2208cfa92d0aab6f63c2f0d4334949b33f05bc2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 15:40:29 2018 +0800

    rockchip: pinctrl: convert to live dt
    
    Use live dt api
    
    Change-Id: Icb7d9fe52053b7436c262fbe79007e7f4394c715
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index ad103560d4..d05a3f5630 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
+#include <dm/ofnode.h>
 #include <regmap.h>
 #include <syscon.h>
 
@@ -1823,21 +1824,29 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 {
 	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
 	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(config);
 	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
 	u32 bank, pin, mux, conf, arg, default_val;
 	int ret, count, i;
 	const char *prop_name;
-	int pcfg_node, property_offset, prop_len, param;
 	const void *value;
-
-	count = fdtdec_get_int_array_count(blob, node, "rockchip,pins",
-					   cells, ARRAY_SIZE(cells));
+	int prop_len, param;
+	const u32 *data;
+	ofnode node;
+#ifdef CONFIG_OF_LIVE
+	const struct device_node *np;
+	struct property *pp;
+#else
+	int property_offset, pcfg_node;
+	const void *blob = gd->fdt_blob;
+#endif
+	data = dev_read_prop(config, "rockchip,pins", &count);
 	if (count < 0) {
 		debug("%s: bad array %d\n", __func__, count);
 		return -EINVAL;
 	}
+	count /= sizeof(u32);
+	for (i = 0; i < count; i++)
+		cells[i] = fdt32_to_cpu(data[i]);
 
 	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
 		debug("%s: unsupported pins array count %d\n",
@@ -1859,16 +1868,23 @@ static int rockchip_pinctrl_set_state(struct udevice *dev,
 		if (ret)
 			return ret;
 
-		pcfg_node = fdt_node_offset_by_phandle(blob, conf);
-		if (pcfg_node < 0)
+		node = ofnode_get_by_phandle(conf);
+		if (!ofnode_valid(node))
 			return -ENODEV;
-
+#ifdef CONFIG_OF_LIVE
+		np = ofnode_to_np(node);
+		for (pp = np->properties; pp; pp = pp->next) {
+			prop_name = pp->name;
+			prop_len = pp->length;
+			value = pp->value;
+#else
+		pcfg_node = ofnode_to_offset(node);
 		fdt_for_each_property_offset(property_offset, blob, pcfg_node) {
 			value = fdt_getprop_by_offset(blob, property_offset,
 						      &prop_name, &prop_len);
 			if (!value)
 				return -ENOENT;
-
+#endif
 			param = rockchip_pinconf_prop_name_to_param(prop_name,
 								    &default_val);
 			if (param < 0)

commit df5ceb01dbc6914ca7c4e6c2288ae27e11a24500
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 21:54:20 2018 +0800

    core: add ofnode_get_by_phandle() api
    
    We need to get ofnode from a phandle, add interface to support
    both live dt and fdt.
    
    Change-Id: I01a5241e2eced37b68ab6556cc1b16001eecbe0f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 0fc8bd4129..59c8ff3014 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -177,6 +177,19 @@ const char *ofnode_get_name(ofnode node)
 	return fdt_get_name(gd->fdt_blob, ofnode_to_offset(node), NULL);
 }
 
+ofnode ofnode_get_by_phandle(uint phandle)
+{
+	ofnode node;
+
+	if (of_live_active())
+		node = np_to_ofnode(of_find_node_by_phandle(phandle));
+	else
+		node.of_offset = fdt_node_offset_by_phandle(gd->fdt_blob,
+							    phandle);
+
+	return node;
+}
+
 int ofnode_read_size(ofnode node, const char *propname)
 {
 	int len;
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 8b9932a569..b1681e256e 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -309,6 +309,14 @@ ofnode ofnode_next_subnode(ofnode node);
  */
 const char *ofnode_get_name(ofnode node);
 
+/**
+ * ofnode_get_by_phandle() - get ofnode from phandle
+ *
+ * @phandle:	phandle to look up
+ * @return ofnode reference to the phandle
+ */
+ofnode ofnode_get_by_phandle(uint phandle);
+
 /**
  * ofnode_read_size() - read the size of a property
  *

commit 2d06d52c9913ecf0a43db06cb7559b56bf5d828c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 18:01:07 2018 +0800

    pinctrl-uclass: convert to use live dt
    
    Use live dt interface for pinctrl_select_state_full()
    
    Change-Id: I1cc892f59004a48f4f2e6adac2a17a03dbfcb81c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index 114952a1da..5abfeba3bf 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -5,13 +5,13 @@
  */
 
 #include <common.h>
-#include <libfdt.h>
 #include <linux/err.h>
 #include <linux/list.h>
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/pinctrl.h>
 #include <dm/util.h>
+#include <dm/of_access.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -63,16 +63,13 @@ static int pinctrl_config_one(struct udevice *config)
  */
 static int pinctrl_select_state_full(struct udevice *dev, const char *statename)
 {
-	const void *fdt = gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	char propname[32]; /* long enough */
 	const fdt32_t *list;
 	uint32_t phandle;
-	int config_node;
 	struct udevice *config;
 	int state, size, i, ret;
 
-	state = fdt_stringlist_search(fdt, node, "pinctrl-names", statename);
+	state = dev_read_stringlist_search(dev, "pinctrl-names", statename);
 	if (state < 0) {
 		char *end;
 		/*
@@ -85,22 +82,15 @@ static int pinctrl_select_state_full(struct udevice *dev, const char *statename)
 	}
 
 	snprintf(propname, sizeof(propname), "pinctrl-%d", state);
-	list = fdt_getprop(fdt, node, propname, &size);
+	list = dev_read_prop(dev, propname, &size);
 	if (!list)
 		return -EINVAL;
 
 	size /= sizeof(*list);
 	for (i = 0; i < size; i++) {
 		phandle = fdt32_to_cpu(*list++);
-
-		config_node = fdt_node_offset_by_phandle(fdt, phandle);
-		if (config_node < 0) {
-			dev_err(dev, "prop %s index %d invalid phandle\n",
-				propname, i);
-			return -EINVAL;
-		}
-		ret = uclass_get_device_by_of_offset(UCLASS_PINCONFIG,
-						     config_node, &config);
+		ret = uclass_get_device_by_phandle_id(UCLASS_PINCONFIG, phandle,
+						      &config);
 		if (ret)
 			return ret;
 

commit 1d5894f27353bd22223521c82ffaebb2810d4781
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Feb 8 20:52:56 2018 +0800

    core: add uclass_get_device_by_phandle_id() api
    
    Add to api for who can not get phandle from a device property.
    
    Change-Id: I8395f02d1731a4bbb00af1e4fa9d151830fc54b0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index af665361ce..197ac1c0a8 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -446,6 +446,34 @@ int uclass_get_device_by_ofnode(enum uclass_id id, ofnode node,
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+int uclass_get_device_by_phandle_id(enum uclass_id id, int phandle_id,
+				    struct udevice **devp)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	*devp = NULL;
+	ret = uclass_get(id, &uc);
+	if (ret)
+		return ret;
+
+	ret = -ENODEV;
+	list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+		uint phandle;
+
+		phandle = dev_read_phandle(dev);
+
+		if (phandle == phandle_id) {
+			*devp = dev;
+			ret = 0;
+			break;
+		}
+	}
+
+	return uclass_get_device_tail(dev, ret, devp);
+}
+
 int uclass_get_device_by_phandle(enum uclass_id id, struct udevice *parent,
 				 const char *name, struct udevice **devp)
 {
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 18188497c2..f6fe785583 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -202,6 +202,22 @@ int uclass_get_device_by_of_offset(enum uclass_id id, int node,
 int uclass_get_device_by_ofnode(enum uclass_id id, ofnode node,
 				struct udevice **devp);
 
+/**
+ * uclass_get_device_by_phandle_id() - Get a uclass device by phandle id
+ *
+ * This searches the devices in the uclass for one with the given phandle id.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @id: uclass ID to look up
+ * @phandle_id: the phandle id to look up
+ * @devp: Returns pointer to device (there is only one for each node)
+ * @return 0 if OK, -ENODEV if there is no device match the phandle, other
+ *	-ve on error
+ */
+int uclass_get_device_by_phandle_id(enum uclass_id id, int phandle_id,
+				    struct udevice **devp);
+
 /**
  * uclass_get_device_by_phandle() - Get a uclass device by phandle
  *

commit f8aaa2c25fb717c0a9063219608622ff00507c52
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 11:10:27 2018 +0800

    rockchip: board: add kernel dtb support
    
    Load dtb from mmc/nand, rebuild live dt and scan dev.
    
    Change-Id: If079b23702d0df333b62a14fcf3f6c2c37d3d670
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 00efa6bf1e..6d44919b95 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -361,6 +361,15 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
+config USING_KERNEL_DTB
+	bool "Using dtb from Kernel/resource for U-Boot"
+	depends on RKIMG_BOOTLOADER && OF_LIVE
+	default y
+	help
+	  This enable support to read dtb from resource and use it for U-Boot,
+	  the uart and emmc will still using U-Boot dtb, but other devices like
+	  regulator/pmic, display, usb will use dts node from kernel.
+
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
 	help
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4848c3ea3a..6cffaefe75 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -22,6 +22,9 @@
 #ifdef CONFIG_DRM_ROCKCHIP
 #include <video_rockchip.h>
 #endif
+#include <mmc.h>
+#include <of_live.h>
+#include <dm/root.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -97,10 +100,66 @@ int board_late_init(void)
 	return rk_board_late_init();
 }
 
+#ifdef CONFIG_USING_KERNEL_DTB
+#include <asm/arch/resource_img.h>
+#define DTB_FILE                        "rk-kernel.dtb"
+int init_kernel_dtb(void)
+{
+	int ret = 0;
+	struct mmc *mmc;
+	struct udevice *dev;
+	ulong fdt_addr = 0;
+
+	ret = mmc_initialize(gd->bd);
+	if (ret)
+		goto scan_nand;
+	mmc = find_mmc_device(0);
+	if (!mmc) {
+		printf("no mmc device at slot 0\n");
+		goto scan_nand;
+	}
+	ret = mmc_init(mmc);
+	if (!ret)
+		goto init_dtb;
+	printf("%s mmc init fail %d\n", __func__, ret);
+scan_nand:
+	ret = uclass_get_device(UCLASS_RKNAND, 0, &dev);
+	if (ret) {
+		printf("%s: Cannot find rknand device\n", __func__);
+		return -1;
+	}
+
+init_dtb:
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
+	}
+
+	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
+	if (ret < 0) {
+		printf("%s dtb in resource read fail\n", __func__);
+		return 0;
+	}
+
+	of_live_build((void *)fdt_addr, (struct device_node **)&gd->of_root);
+
+	dm_scan_fdt((void *)fdt_addr, false);
+
+	gd->fdt_blob = (void *)fdt_addr;
+
+	return 0;
+}
+#endif
+
+
 int board_init(void)
 {
 	int ret;
 
+#ifdef CONFIG_USING_KERNEL_DTB
+	init_kernel_dtb();
+#endif
 #ifdef CONFIG_DM_REGULATOR
 	ret = regulators_enable_boot_on(false);
 	if (ret)

commit d2e8ba4eb0c5122b72750d0fead1a52ba6234665
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Feb 7 11:14:07 2018 +0800

    Revert "rockchip: add support to load and use kernel dtb"
    
    This reverts commit af586a3812f626a0f7ff0aded53414ac6c08b15c.
    
    Change-Id: Ie1f8012b89ac810e3bc6219459127bc9ee88c674
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 6d44919b95..00efa6bf1e 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -361,15 +361,6 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
-config USING_KERNEL_DTB
-	bool "Using dtb from Kernel/resource for U-Boot"
-	depends on RKIMG_BOOTLOADER && OF_LIVE
-	default y
-	help
-	  This enable support to read dtb from resource and use it for U-Boot,
-	  the uart and emmc will still using U-Boot dtb, but other devices like
-	  regulator/pmic, display, usb will use dts node from kernel.
-
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
 	help
diff --git a/common/board_r.c b/common/board_r.c
index 8055c72581..09167c13cc 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -103,41 +103,6 @@ static int initr_reloc(void)
 
 	return 0;
 }
-#ifdef CONFIG_USING_KERNEL_DTB
-#include <asm/arch/resource_img.h>
-#define DTB_FILE                        "rk-kernel.dtb"
-int get_fdt_from_resource(void)
-{
-	int ret = 0;
-	struct mmc *mmc;
-	ulong fdt_addr = 0;
-
-	mmc_initialize(gd->bd);
-	mmc = find_mmc_device(0);
-	if (!mmc) {
-		printf("no mmc device at slot 0\n");
-		return -1;
-	}
-	ret = mmc_init(mmc);
-	if (ret)
-		printf("%s mmc init fail %d\n", __func__, ret);
-
-	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
-	if (!fdt_addr) {
-		printf("No Found FDT Load Address.\n");
-		return -1;
-	}
-
-	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
-	if (ret < 0) {
-		printf("%s dtb in resource read fail\n", __func__);
-		return 0;
-	}
-	gd->kernel_fdt = (void *)fdt_addr;
-
-	return 0;
-}
-#endif
 
 #ifdef CONFIG_ARM
 /*
@@ -733,9 +698,6 @@ static init_fnc_t init_sequence_r[] = {
 	initr_noncached,
 #endif
 	bootstage_relocate,
-#ifdef CONFIG_USING_KERNEL_DTB
-	get_fdt_from_resource,
-#endif
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,
 #endif
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 5525d74bc3..976e2c4fdd 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -306,20 +306,8 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
 {
 #if CONFIG_IS_ENABLED(OF_LIVE)
 	if (of_live_active())
-#ifndef CONFIG_USING_KERNEL_DTB
 		return dm_scan_fdt_live(gd->dm_root, gd->of_root,
 					pre_reloc_only);
-#else
-	{
-		dm_scan_fdt_live(gd->dm_root, gd->of_root,
-					pre_reloc_only);
-		if (!gd->kernel_of_root)
-			return 0;
-
-		return dm_scan_fdt_live(gd->dm_root, gd->kernel_of_root,
-					pre_reloc_only);
-	}
-#endif
 	else
 #endif
 	return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 591a431cf3..5aaa78b06a 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -81,10 +81,6 @@ typedef struct global_data {
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
 #ifdef CONFIG_OF_LIVE
 	struct device_node *of_root;
-#ifdef CONFIG_USING_KERNEL_DTB
-	void *kernel_fdt;		/* Kernel FDT */
-	struct device_node *kernel_of_root;
-#endif
 #endif
 	struct jt_funcs *jt;		/* jump table */
 	char env_buf[32];		/* buffer for env_get() before reloc. */
diff --git a/lib/of_live.c b/lib/of_live.c
index 12c9abcf89..f351483387 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -332,15 +332,6 @@ int of_live_build(const void *fdt_blob, struct device_node **rootp)
 		debug("Failed to scan live tree aliases: err=%d\n", ret);
 		return ret;
 	}
-#ifdef CONFIG_USING_KERNEL_DTB
-	ret = unflatten_device_tree(gd->kernel_fdt,
-				    (struct device_node **)&gd->kernel_of_root);
-	if (ret) {
-		printf("%s fail to build live dt from kernel dtb.\n", __func__);
-		return 0;
-	}
-	gd->fdt_blob = gd->kernel_fdt;
-#endif
 	debug("%s: stop\n", __func__);
 
 	return ret;

commit b96443cc1c591fb96264e3a6e6365f4b59216cfd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 16:40:25 2018 +0800

    core: break when uclass_find() get UCLASS_ROOT
    
    After reloc and before dm_scan_init again, the dm_root is broken.
    
    Change-Id: Ia5b1f762a396daa78d2498b160f89a951a4ec544
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index f5e4067922..af665361ce 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -34,6 +34,9 @@ struct uclass *uclass_find(enum uclass_id key)
 	list_for_each_entry(uc, &gd->uclass_root, sibling_node) {
 		if (uc->uc_drv->id == key)
 			return uc;
+
+		if (uc->uc_drv->id == UCLASS_ROOT)
+			break;
 	}
 
 	return NULL;

commit a49612a6a220044829b38538551d7251562c5f28
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:33:47 2018 +0800

    core: do not assert if node not valid in ofnode_get_name()
    
    In some case with LIVE DT, some node always not valid.
    
    Change-Id: I20ebc530f7addfef167dd5abbab46e8da0627dd8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 0030ab962e..0fc8bd4129 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -167,7 +167,10 @@ ofnode ofnode_next_subnode(ofnode node)
 
 const char *ofnode_get_name(ofnode node)
 {
-	assert(ofnode_valid(node));
+	if(!ofnode_valid(node)){
+		debug("%s node not valid\n", __func__);
+		return NULL;
+	}
 	if (ofnode_is_np(node))
 		return strrchr(node.np->full_name, '/') + 1;
 

commit e2bce6e47ed7066d1c98ee2286d8ceb3443768e3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:31:18 2018 +0800

    rockchip: video: convert display driver to live dt
    
    Convert to live dt for kernel dtb, display driver will depends on
    OF_LIVE after this patch.
    
    Change-Id: I536e936d551c0320f30dca82c9cf376e77589ffc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 08aebd99d1..305df5c5a5 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -1,6 +1,6 @@
 menuconfig DRM_ROCKCHIP
 	bool "Rockchip DRM Support"
-	depends on DM_VIDEO
+	depends on DM_VIDEO && OF_LIVE
 	help
 	  Rockchip SoCs provide video output capabilities for High-Definition
 	  Multimedia Interface (HDMI), Low-voltage Differential Signalling
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
index 746afcd0f6..5edfc2238e 100644
--- a/drivers/video/drm/dw_hdmi.c
+++ b/drivers/video/drm/dw_hdmi.c
@@ -5,12 +5,13 @@
  */
 
 #include <common.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 #include <edid.h>
+#include <dm/device.h>
+#include <dm/of_node.h>
+#include <dm/read.h>
 #include <linux/hdmi.h>
 #include <linux/media-bus-format.h>
 #include <linux/dw_hdmi.h>
@@ -2087,7 +2088,7 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct dw_hdmi *hdmi;
 	struct drm_display_mode *mode_buf;
-	int hdmi_node = conn_state->node;
+	ofnode hdmi_node = conn_state->node;
 	u32 val;
 
 	hdmi = malloc(sizeof(struct dw_hdmi));
@@ -2101,10 +2102,8 @@ int rockchip_dw_hdmi_init(struct display_state *state)
 		return -ENOMEM;
 	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
 
-	hdmi->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-					hdmi_node, "reg", 0, NULL, false);
-	hdmi->io_width = fdtdec_get_int(state->blob, hdmi_node,
-					"reg-io-width", -1);
+	hdmi->regs = dev_read_addr_ptr(conn_state->dev);
+	hdmi->io_width = ofnode_read_s32_default(hdmi_node, "reg-io-width", -1);
 	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (hdmi->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 318d347098..260b800336 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <linux/media-bus-format.h>
@@ -106,7 +104,7 @@ static int panel_simple_disable(struct display_state *state)
 	return 0;
 }
 
-static int panel_simple_parse_dt(const void *blob, int node,
+static int panel_simple_parse_dt(const void *blob, ofnode node,
 				 struct panel_simple *panel)
 {
 	int ret;
@@ -134,13 +132,13 @@ static int panel_simple_parse_dt(const void *blob, int node,
 		return ret;
 	}
 
-	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+	panel->power_invert = !!ofnode_read_s32_default(node, "power_invert", 0);
 
-	panel->delay_prepare = fdtdec_get_int(blob, node, "delay,prepare", 0);
-	panel->delay_unprepare = fdtdec_get_int(blob, node, "delay,unprepare", 0);
-	panel->delay_enable = fdtdec_get_int(blob, node, "delay,enable", 0);
-	panel->delay_disable = fdtdec_get_int(blob, node, "delay,disable", 0);
-	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+	panel->delay_prepare = ofnode_read_s32_default(node, "delay,prepare", 0);
+	panel->delay_unprepare = ofnode_read_s32_default(node, "delay,unprepare", 0);
+	panel->delay_enable = ofnode_read_s32_default(node, "delay,enable", 0);
+	panel->delay_disable = ofnode_read_s32_default(node, "delay,disable", 0);
+	panel->bus_format = ofnode_read_s32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
 
 	printf("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
 	       panel->delay_prepare, panel->delay_unprepare,
@@ -157,7 +155,7 @@ static int panel_simple_init(struct display_state *state)
 	const void *blob = state->blob;
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	int node = panel_state->node;
+	ofnode node = panel_state->node;
 	const struct drm_display_mode *mode = panel_state->panel->data;
 	struct panel_simple *panel;
 	int ret;
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index 55e068a9f1..8a8551e536 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -8,12 +8,12 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>
 #include <dm/device.h>
+#include <dm/read.h>
+#include <dm/of_access.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 
@@ -340,7 +340,7 @@ struct dw_mipi_dsi {
 	void *base;
 	void *grf;
 	const void *blob;
-	int node;
+	ofnode node;
 
 	/* dual-channel */
 	struct dw_mipi_dsi *master;
@@ -531,7 +531,7 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
-		printf("failed to wait for phy lock state\n");
+		printf("failed to wait for phy lock state %p\n", dsi->base);
 		return ret;
 	}
 
@@ -554,8 +554,7 @@ static unsigned long rockchip_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
 	int rate;
 
 	/* optional override of the desired bandwidth */
-	rate = fdt_getprop_u32_default_node(dsi->blob, dsi->node, 0,
-					     "rockchip,lane-rate", -1);
+	rate = ofnode_read_u32_default(dsi->node, "rockchip,lane-rate", -1);
 	if (rate > 0) {
 		return rate;
 	}
@@ -955,21 +954,21 @@ static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
 
 static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 {
-	int node0, node1;
+	int phandle;
+	struct device_node *np;
 	struct dw_mipi_dsi *slave = NULL;
 
-	node0 = fdt_getprop_u32_default_node(master->blob, master->node, 0,
-					       "rockchip,dual-channel", -1);
-	if (node0 < 0)
+	phandle = ofnode_read_u32_default(master->node, "rockchip,dual-channel", -1);
+	if (phandle < 0)
 		return 0;
 
-	node1 = fdt_node_offset_by_phandle(master->blob, node0);
-	if (node1 < 0) {
+	np = of_find_node_by_phandle(phandle);
+	if (ofnode_valid(np_to_ofnode(np))) {
 		printf("failed to find dsi slave node\n");
 		return -ENODEV;
 	}
 
-	if (!fdt_device_is_available(master->blob, node1)) {
+	if (!of_device_is_available(np)) {
 		printf("dsi slave node is not available\n");
 		return -ENODEV;
 	}
@@ -985,10 +984,8 @@ static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
 	slave->master = master;
 
 	slave->blob = master->blob;
-	slave->node = node1;
-	slave->base = (void *)fdtdec_get_addr_size_auto_noparent(slave->blob,
-								 node1, "reg",
-								 0, NULL, false);
+	slave->node = np_to_ofnode(np);
+	slave->base = (u32 *)ofnode_get_addr_index(slave->node, 0);
 	slave->pdata = master->pdata;
 	slave->dphy.phy = master->dphy.phy;
 	slave->lanes = master->lanes;
@@ -1004,9 +1001,9 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
-	int mipi_node = conn_state->node;
+	ofnode mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
-	int panel;
+	ofnode panel;
 	int ret;
 
 	dsi = malloc(sizeof(*dsi));
@@ -1014,9 +1011,7 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 		return -ENOMEM;
 	memset(dsi, 0, sizeof(*dsi));
 
-	dsi->base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-						mipi_node, "reg", 0, NULL, false);
-
+	dsi->base = dev_read_addr_ptr(conn_state->dev);
 	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (dsi->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -1030,14 +1025,14 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	conn_state->private = dsi;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
-	panel = fdt_subnode_offset(state->blob, mipi_node, "panel");
-	if (panel < 0) {
+	panel = dev_read_subnode(conn_state->dev, "panel");
+	if (!ofnode_valid(panel)) {
 		printf("failed to find panel node\n");
 		return -1;
 	}
 
 #define FDT_GET_INT(val, name) \
-	val = fdtdec_get_int(state->blob, panel, name, -1); \
+	val = ofnode_read_s32_default(panel, name, -1); \
 	if (val < 0) { \
 		printf("Can't get %s\n", name); \
 		return -1; \
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
index 9b0c073e61..a808c0bcd9 100644
--- a/drivers/video/drm/rockchip-inno-mipi-dphy.c
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>
@@ -125,7 +123,7 @@ struct inno_mipi_dphy_timing {
 
 struct inno_mipi_dphy {
 	const void *blob;
-	int node;
+	ofnode node;
 	u32 regs;
 
 	unsigned int lane_mbps;
@@ -507,7 +505,7 @@ static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
 	fin = 24000000;
 	fout = inno_mipi_dphy_pll_round_rate(fin, rate, &prediv, &fbdiv);
 
-	printf("%s: fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
+	debug("%s: fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
 	       __func__, fin, fout, prediv, fbdiv);
 
 	m = FBDIV_HI_MASK | PREDIV_MASK;
@@ -523,16 +521,15 @@ static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
 	return fout;
 }
 
-static int inno_mipi_dphy_parse_dt(int panel_node, struct inno_mipi_dphy *inno)
+static int inno_mipi_dphy_parse_dt(ofnode panel_node, struct inno_mipi_dphy *inno)
 {
-	const void *blob = inno->blob;
 	int format;
 
-	inno->lanes = fdtdec_get_int(blob, panel_node, "dsi,lanes", -1);
+	inno->lanes = ofnode_read_s32_default(panel_node, "dsi,lanes", -1);
 	if (inno->lanes < 0)
 		inno->lanes = 4;
 
-	format = fdtdec_get_int(blob, panel_node, "dsi,format", -1);
+	format = ofnode_read_s32_default(panel_node, "dsi,format", -1);
 	inno->bpp = mipi_dsi_pixel_format_to_bpp(format);
 	if (inno->bpp < 0)
 		inno->bpp = 24;
@@ -545,8 +542,8 @@ static int inno_mipi_dphy_init(struct display_state *state)
 	const void *blob = state->blob;
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	int node = conn_state->phy_node;
-	int panel_node = panel_state->node;
+	ofnode node = conn_state->phy_node;
+	ofnode panel_node = panel_state->node;
 	struct inno_mipi_dphy *inno;
 	int ret;
 
@@ -563,8 +560,7 @@ static int inno_mipi_dphy_init(struct display_state *state)
 		return ret;
 	}
 
-	inno->regs = fdtdec_get_addr_size_auto_noparent(blob, node, "reg",
-							0, NULL, false);
+	inno->regs = (u32)ofnode_get_addr(node);
 	if (inno->regs == FDT_ADDR_T_NONE) {
 		printf("%s: failed to get mipi phy address\n", __func__);
 		return -ENOMEM;
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
index 2ba56fce84..da7b1a0495 100644
--- a/drivers/video/drm/rockchip_analogix_dp.c
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <dm/device.h>
@@ -856,8 +854,7 @@ static int rockchip_analogix_dp_init(struct display_state *state)
 	plat_data = malloc(sizeof(*pdata));
 	if (!plat_data)
 		return -ENOMEM;
-	dp->reg_base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-						dp_node, "reg", 0, NULL, false);
+	dp->reg_base = dev_read_addr_ptr(conn_state->dev);
 	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (dp->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/rockchip_analogix_dp_reg.c
index 7e6c638972..4cdcdfd0ab 100644
--- a/drivers/video/drm/rockchip_analogix_dp_reg.c
+++ b/drivers/video/drm/rockchip_analogix_dp_reg.c
@@ -15,8 +15,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <dm/device.h>
diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index 03118acc75..45d827a9ab 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <dm/device.h>
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 473e139118..c3dde0ff86 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -27,6 +27,9 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
+#include <dm.h>
+#include <dm/of_access.h>
+#include <dm/ofnode.h>
 
 #define RK_BLK_SIZE 512
 
@@ -71,68 +74,61 @@ static bool can_direct_logo(int bpp)
 	return bpp == 24 || bpp == 32;
 }
 
-static struct udevice *find_panel_device_by_node(const void *blob,
-						 int panel_node)
-{
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
-	if (ret) {
-		printf("Warn: %s: can't find panel driver\n",
-		       fdt_get_name(blob, panel_node, NULL));
-		return NULL;
-	}
 
-	return dev;
-}
-
-static struct udevice *get_panel_device(struct display_state *state, int conn_node)
+static struct udevice *get_panel_device(struct display_state *state, ofnode conn_node)
 {
 	struct panel_state *panel_state = &state->panel_state;
-	const void *blob = state->blob;
-	int panel, ports, port, ep, remote, ph, nodedepth;
 	struct udevice *dev;
+	struct connector_state *conn_state = &state->conn_state;
+	ofnode node, ports_node, port_node;
+	struct device_node *port, *panel, *ep;
+	int ph;
+	int ret;
 
-	panel = fdt_subnode_offset(blob, conn_node, "panel");
-	if (panel > 0 && fdt_device_is_available(blob, panel)) {
-		dev = find_panel_device_by_node(blob, panel);
-		if (dev) {
-			panel_state->node = panel;
+	node = dev_read_subnode(conn_state->dev, "panel");
+	if (ofnode_valid(node) &&
+	    of_device_is_available(ofnode_to_np(node))){
+		ret = uclass_get_device_by_ofnode(UCLASS_PANEL, node, &dev);
+		if(!ret) {
+			printf("%s get panel dev\n", __func__);
+			panel_state->node = node;
 			return dev;
 		}
 	}
 
-	ports = fdt_subnode_offset(blob, conn_node, "ports");
-	if (ports < 0)
+	/* TODO: this path not tested */
+	ports_node = dev_read_subnode(conn_state->dev, "ports");
+	if (!ofnode_valid(ports_node))
 		return NULL;
 
-	fdt_for_each_subnode(port, blob, ports) {
-		fdt_for_each_subnode(ep, blob, port) {
-			ph = fdt_getprop_u32_default_node(blob, ep, 0,
-							  "remote-endpoint", 0);
+	ofnode_for_each_subnode(port_node, ports_node) {
+		ofnode_for_each_subnode(node, port_node) {
+			ph = ofnode_read_u32_default(node, "remote-endpoint", -1);
 			if (!ph)
 				continue;
-
-			remote = fdt_node_offset_by_phandle(blob, ph);
-
-			nodedepth = fdt_node_depth(blob, remote);
-			if (nodedepth < 2)
+			ep = of_find_node_by_phandle(ph);
+			if (!ofnode_valid(np_to_ofnode(ep))) {
+				printf("Warn: can't find endpoint from phdl\n");
 				continue;
-
-			panel = fdt_supernode_atdepth_offset(blob, remote,
-							     nodedepth - 2,
-							     NULL);
-			if (!fdt_device_is_available(blob, panel)) {
-				debug("[%s]: panel is disabled\n",
-				      fdt_get_name(blob, panel, NULL));
+			}
+			port = of_get_parent(ep);
+			if (!ofnode_valid(np_to_ofnode(port))) {
+				printf("Warn: can't find port node\n");
 				continue;
 			}
-			dev = find_panel_device_by_node(blob, panel);
-			if (dev) {
-				panel_state->node = panel;
-				return dev;
+			panel = of_get_parent(port);
+			if (!ofnode_valid(np_to_ofnode(panel))) {
+				printf("Warn: can't find panel node\n");
+				continue;
+			}
+			ret = uclass_get_device_by_ofnode(UCLASS_PANEL,
+							  np_to_ofnode(panel),
+							  &dev);
+			if (ret) {
+				printf("Warn: can't find crtc driver\n");
+				continue;
 			}
+			return dev;
 		}
 	}
 
@@ -142,28 +138,14 @@ static struct udevice *get_panel_device(struct display_state *state, int conn_no
 static int connector_phy_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	int conn_node = conn_state->node;
-	const void *blob = state->blob;
 	const struct rockchip_phy *phy;
-	int phy_node, phandle;
 	struct udevice *dev;
 	int ret;
 
-	phandle = fdt_getprop_u32_default_node(blob, conn_node, 0,
-					       "phys", -1);
-	if (phandle < 0)
-		return 0;
-
-	phy_node = fdt_node_offset_by_phandle(blob, phandle);
-	if (phy_node < 0) {
-		printf("failed to find phy node\n");
-		return phy_node;
-	}
-
-	ret = uclass_find_device_by_of_offset(UCLASS_PHY, phy_node, &dev);
+	ret = uclass_get_device_by_phandle(UCLASS_PHY, conn_state->dev, "phys",
+					   &dev);
 	if (ret) {
-		printf("Warn: %s: can't find phy driver\n",
-		       fdt_get_name(blob, phy_node, NULL));
+		printf("Warn: can't find phy driver\n");
 		return ret;
 	}
 	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
@@ -173,7 +155,7 @@ static int connector_phy_init(struct display_state *state)
 	}
 
 	conn_state->phy_dev = dev;
-	conn_state->phy_node = phy_node;
+	conn_state->phy_node = dev->node;
 
 	if (!phy->funcs || !phy->funcs->init ||
 	    phy->funcs->init(state)) {
@@ -190,10 +172,9 @@ static int connector_panel_init(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
 	struct udevice *dev;
-	const void *blob = state->blob;
-	int conn_node = conn_state->node;
+	ofnode conn_node = conn_state->node;
 	const struct rockchip_panel *panel;
-	int dsp_lut_node;
+	ofnode dsp_lut_node;
 	int ret, len;
 
 	dm_scan_fdt_dev(conn_state->dev);
@@ -217,19 +198,22 @@ static int connector_panel_init(struct display_state *state)
 		printf("failed to init panel driver\n");
 		return ret;
 	}
-
-	dsp_lut_node = fdt_subnode_offset(blob, panel_state->node, "dsp-lut");
-	fdt_getprop(blob, dsp_lut_node, "gamma-lut", &len);
+	dsp_lut_node = dev_read_subnode(dev, "dsp-lut");
+	if (!ofnode_valid(dsp_lut_node)) {
+		printf("%s can not find dsp-lut node\n", __func__);
+	}
+	ofnode_get_property(dsp_lut_node, "gamma-lut", &len);
 	if (len > 0) {
-		conn_state->gamma.size  = len / sizeof(u32);
+		conn_state->gamma.size = len / sizeof(u32);
 		conn_state->gamma.lut = malloc(len);
 		if (!conn_state->gamma.lut) {
 			printf("malloc gamma lut failed\n");
 			return -ENOMEM;
 		}
-		if (fdtdec_get_int_array(blob, dsp_lut_node, "gamma-lut",
-					 conn_state->gamma.lut,
-					 conn_state->gamma.size)) {
+		ret = ofnode_read_u32_array(dsp_lut_node, "gamma-lut",
+					    conn_state->gamma.lut,
+					    conn_state->gamma.size);
+		if (ret) {
 			printf("Cannot decode gamma_lut\n");
 			conn_state->gamma.lut = NULL;
 			return -EINVAL;
@@ -266,32 +250,32 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode)
 	return refresh;
 }
 
-static int display_get_timing_from_dts(int panel, const void *blob,
+static int display_get_timing_from_dts(struct panel_state *panel_state,
 				       struct drm_display_mode *mode)
 {
-	int timing, phandle, native_mode;
+	int phandle;
 	int hactive, vactive, pixelclock;
 	int hfront_porch, hback_porch, hsync_len;
 	int vfront_porch, vback_porch, vsync_len;
 	int val, flags = 0;
+	ofnode timing, native_mode;
 
-	timing = fdt_subnode_offset(blob, panel, "display-timings");
-	if (timing < 0)
+	timing = dev_read_subnode(panel_state->dev, "display-timings");
+	if (!ofnode_valid(timing))
 		return -ENODEV;
 
-	native_mode = fdt_subnode_offset(blob, timing, "timing");
-	if (native_mode < 0) {
-		phandle = fdt_getprop_u32_default_node(blob, timing, 0,
-						       "native-mode", -1);
-		native_mode = fdt_node_offset_by_phandle_node(blob, timing, phandle);
-		if (native_mode <= 0) {
+	native_mode = ofnode_find_subnode(timing, "timing");
+	if (!ofnode_valid(native_mode)) {
+		phandle = ofnode_read_u32_default(timing, "native-mode", -1);
+		native_mode = np_to_ofnode(of_find_node_by_phandle(phandle));
+		if (!ofnode_valid(native_mode)) {
 			printf("failed to get display timings from DT\n");
 			return -ENXIO;
 		}
 	}
 
 #define FDT_GET_INT(val, name) \
-	val = fdtdec_get_int(blob, native_mode, name, -1); \
+	val = ofnode_read_s32_default(native_mode, name, -1); \
 	if (val < 0) { \
 		printf("Can't get %s\n", name); \
 		return -ENXIO; \
@@ -334,11 +318,10 @@ static int display_get_timing(struct display_state *state)
 	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
-	const void *blob = state->blob;
 	struct panel_state *panel_state = &state->panel_state;
-	int panel = panel_state->node;
+	ofnode panel = panel_state->node;
 
-	if (panel > 0 && !display_get_timing_from_dts(panel, blob, mode)) {
+	if (ofnode_valid(panel) && !display_get_timing_from_dts(panel_state, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
@@ -619,18 +602,17 @@ static int display_logo(struct display_state *state)
 	return 0;
 }
 
-static int get_crtc_id(const void *blob, int connect)
+static int get_crtc_id(ofnode connect)
 {
-	int phandle, remote;
+	int phandle;
+	struct device_node *remote;
 	int val;
 
-	phandle = fdt_getprop_u32_default_node(blob, connect, 0,
-					       "remote-endpoint", -1);
+	phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
 	if (phandle < 0)
 		goto err;
-	remote = fdt_node_offset_by_phandle(blob, phandle);
-
-	val = fdtdec_get_int(blob, remote, "reg", -1);
+	remote = of_find_node_by_phandle(phandle);
+	val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
 	if (val < 0)
 		goto err;
 
@@ -640,31 +622,6 @@ err:
 	return 0;
 }
 
-static int find_crtc_node(const void *blob, int node)
-{
-	int nodedepth = fdt_node_depth(blob, node);
-
-	if (nodedepth < 2)
-		return -EINVAL;
-
-	return fdt_supernode_atdepth_offset(blob, node,
-					    nodedepth - 2, NULL);
-}
-
-static int find_connector_node(const void *blob, int node)
-{
-	int phandle, remote;
-	int nodedepth;
-
-	phandle = fdt_getprop_u32_default_node(blob, node, 0,
-					       "remote-endpoint", -1);
-	remote = fdt_node_offset_by_phandle(blob, phandle);
-	nodedepth = fdt_node_depth(blob, remote);
-
-	return fdt_supernode_atdepth_offset(blob, remote,
-					    nodedepth - 3, NULL);
-}
-
 struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 {
 	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
@@ -841,73 +798,76 @@ static int rockchip_display_probe(struct udevice *dev)
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
 	const void *blob = gd->fdt_blob;
-	int route, child, phandle, connect, crtc_node, conn_node;
+	int phandle;
 	struct udevice *crtc_dev, *conn_dev;
 	const struct rockchip_crtc *crtc;
 	const struct rockchip_connector *conn;
 	struct display_state *s;
 	const char *name;
 	int ret;
+	ofnode node, route_node;
+	struct device_node *port_node, *vop_node, *ep_node;
+	struct device_node *cnt_node, *p;
 
 	/* Before relocation we don't need to do anything */
 	if (!(gd->flags & GD_FLG_RELOC))
 		return 0;
-
-	route = fdt_path_offset(blob, "/display-subsystem/route");
-	if (route < 0) {
-		printf("Can't find display display route node\n");
-		return -ENODEV;
-	}
-
-	if (!fdt_device_is_available(blob, route))
-		return -ENODEV;
-
 	init_display_buffer(plat->base);
 
-	fdt_for_each_subnode(child, blob, route) {
-		if (!fdt_device_is_available(blob, child))
-			continue;
+	route_node = dev_read_subnode(dev, "route");
+	if (!ofnode_valid(route_node))
+		return -ENODEV;
 
-		phandle = fdt_getprop_u32_default_node(blob, child, 0,
-						       "connect", -1);
+	ofnode_for_each_subnode(node, route_node){
+		phandle = ofnode_read_u32_default(node, "connect", -1);
 		if (phandle < 0) {
-			printf("Warn: %s: can't find connect node's handle\n",
-			       fdt_get_name(blob, child, NULL));
+			printf("Warn: can't find connect node's handle\n");
 			continue;
 		}
-
-		connect = fdt_node_offset_by_phandle(blob, phandle);
-		if (connect < 0) {
-			printf("Warn: %s: can't find connect node\n",
-			       fdt_get_name(blob, child, NULL));
+		ep_node = of_find_node_by_phandle(phandle);
+		if (!ofnode_valid(np_to_ofnode(ep_node))) {
+			printf("Warn: can't find endpoint node from phandle\n");
 			continue;
 		}
-
-		crtc_node = find_crtc_node(blob, connect);
-		if (!fdt_device_is_available(blob, crtc_node)) {
-			printf("Warn: %s: crtc node is not available\n",
-			       fdt_get_name(blob, child, NULL));
+		port_node = of_get_parent(ep_node);
+		if (!ofnode_valid(np_to_ofnode(port_node))) {
+			printf("Warn: can't find port node from phandle\n");
 			continue;
 		}
-		ret = uclass_find_device_by_of_offset(UCLASS_VIDEO_CRTC, crtc_node, &crtc_dev);
+		vop_node = of_get_parent(port_node);
+		if (!ofnode_valid(np_to_ofnode(vop_node))) {
+			printf("Warn: can't find crtc node from phandle\n");
+			continue;
+		}
+		ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
+						  np_to_ofnode(vop_node),
+						  &crtc_dev);
 		if (ret) {
-			printf("Warn: %s: can't find crtc driver\n",
-			       fdt_get_name(blob, child, NULL));
+			printf("Warn: can't find crtc driver\n");
 			continue;
 		}
-
 		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
 
-		conn_node = find_connector_node(blob, connect);
-		if (!fdt_device_is_available(blob, conn_node)) {
-			printf("Warn: %s: connector node is not available\n",
-			       fdt_get_name(blob, child, NULL));
+		phandle = ofnode_read_u32_default(np_to_ofnode(ep_node),
+						  "remote-endpoint", -1);
+		cnt_node = of_find_node_by_phandle(phandle);
+		if (phandle < 0) {
+			printf("Warn: can't find remote-endpoint's handle\n");
 			continue;
 		}
-		ret = uclass_get_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
+		while (cnt_node->parent){
+			p = of_get_parent(cnt_node);
+			if (!strcmp(p->full_name, "/"))
+				break;
+			cnt_node = p;
+		}
+		if (!of_device_is_available(cnt_node))
+			continue;
+		ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY,
+						  np_to_ofnode(cnt_node),
+						  &conn_dev);
 		if (ret) {
-			printf("Warn: %s: can't find connector driver\n",
-			       fdt_get_name(blob, child, NULL));
+			printf("Warn: can't find connect driver\n");
 			continue;
 		}
 		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
@@ -919,43 +879,42 @@ static int rockchip_display_probe(struct udevice *dev)
 		memset(s, 0, sizeof(*s));
 
 		INIT_LIST_HEAD(&s->head);
-		s->ulogo_name = fdt_stringlist_get(blob, child, "logo,uboot", 0, NULL);
-		s->klogo_name = fdt_stringlist_get(blob, child, "logo,kernel", 0, NULL);
-		name = fdt_stringlist_get(blob, child, "logo,mode", 0, NULL);
+		ret = ofnode_read_string_index(node, "logo,uboot", 0, &s->ulogo_name);
+		ret = ofnode_read_string_index(node, "logo,kernel", 0, &s->klogo_name);
+		ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
 		if (!strcmp(name, "fullscreen"))
 			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
 		else
 			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
-		name = fdt_stringlist_get(blob, child, "charge_logo,mode", 0, NULL);
+		ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
 		if (!strcmp(name, "fullscreen"))
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
 		else
 			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
 
 		s->blob = blob;
-		s->conn_state.node = conn_node;
+		s->conn_state.node = np_to_ofnode(cnt_node);
 		s->conn_state.dev = conn_dev;
 		s->conn_state.connector = conn;
-		s->crtc_state.node = crtc_node;
+		s->crtc_state.node = np_to_ofnode(vop_node);
 		s->crtc_state.dev = crtc_dev;
 		s->crtc_state.crtc = crtc;
-		s->crtc_state.crtc_id = get_crtc_id(blob, connect);
-		s->node = child;
+		s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node));
+		s->node = node;
 
-		if (connector_phy_init(s)) {
-			printf("Warn: %s: Failed to init phy drivers\n",
-			       fdt_get_name(blob, child, NULL));
+		if (connector_panel_init(s)) {
+			printf("Warn: Failed to init panel drivers\n");
 			free(s);
 			continue;
 		}
 
-		if (connector_panel_init(s)) {
-			printf("Warn: %s: Failed to init panel drivers\n",
-			       fdt_get_name(blob, child, NULL));
+		if (connector_phy_init(s)) {
+			printf("Warn: Failed to init phy drivers\n");
 			free(s);
 			continue;
 		}
 		list_add_tail(&s->head, &rockchip_display_list);
+
 	}
 
 	if (list_empty(&rockchip_display_list)) {
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index d1826da186..0ddab1c355 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -10,6 +10,7 @@
 #include <bmp_layout.h>
 #include <drm_modes.h>
 #include <edid.h>
+#include <dm/ofnode.h>
 
 #define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL	BIT(0)
 #define ROCKCHIP_OUTPUT_DSI_DUAL_LINK		BIT(1)
@@ -41,7 +42,7 @@ struct crtc_state {
 	struct udevice *dev;
 	const struct rockchip_crtc *crtc;
 	void *private;
-	int node;
+	ofnode node;
 	int crtc_id;
 
 	int format;
@@ -61,8 +62,8 @@ struct crtc_state {
 
 struct panel_state {
 	struct udevice *dev;
-	int node;
-	int dsp_lut_node;
+	ofnode node;
+	ofnode dsp_lut_node;
 
 	const struct rockchip_panel *panel;
 	void *private;
@@ -73,8 +74,8 @@ struct connector_state {
 	const struct rockchip_connector *connector;
 	struct udevice *phy_dev;
 	const struct rockchip_phy *phy;
-	int node;
-	int phy_node;
+	ofnode node;
+	ofnode phy_node;
 
 	void *private;
 	void *phy_private;
@@ -112,7 +113,7 @@ struct display_state {
 	struct list_head head;
 
 	const void *blob;
-	int node;
+	ofnode node;
 
 	struct crtc_state crtc_state;
 	struct connector_state conn_state;
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
index fed1fbc5fb..95ffa3238e 100755
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <linux/media-bus-format.h>
@@ -51,7 +49,7 @@ struct dsi_panel_cmds {
 struct rockchip_dsi_panel {
 	struct udevice *dev;
 	const void *blob;
-	int node;
+	ofnode node;
 
 	int bus_format;
 
@@ -72,7 +70,7 @@ struct rockchip_dsi_panel {
 	struct dsi_panel_cmds *off_cmds;
 };
 
-static int rockchip_dsi_panel_parse_cmds(const void *blob, int node,
+static int rockchip_dsi_panel_parse_cmds(ofnode node,
 					 const u8 *data, int blen,
 					 struct dsi_panel_cmds *pcmds)
 {
@@ -263,27 +261,27 @@ static int rockchip_dsi_panel_disable(struct display_state *state)
 	return 0;
 }
 
-static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockchip_dsi_panel *panel)
+static int rockchip_dsi_panel_parse_dt(ofnode node, struct rockchip_dsi_panel *panel)
 {
 	const void *data;
 	int len = 0;
 	int ret = 0;
 
-	panel->delay_prepare = fdtdec_get_int(blob, node, "prepare-delay-ms", 0);
-	panel->delay_unprepare = fdtdec_get_int(blob, node, "unprepare-delay-ms", 0);
-	panel->delay_enable = fdtdec_get_int(blob, node, "enable-delay-ms", 0);
-	panel->delay_disable = fdtdec_get_int(blob, node, "disable-delay-ms", 0);
-	panel->delay_init = fdtdec_get_int(blob, node, "init-delay-ms", 0);
-	panel->delay_reset = fdtdec_get_int(blob, node, "reset-delay-ms", 0);
-	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+	panel->delay_prepare = ofnode_read_u32_default(node, "prepare-delay-ms", 0);
+	panel->delay_unprepare = ofnode_read_u32_default(node, "unprepare-delay-ms", 0);
+	panel->delay_enable = ofnode_read_u32_default(node, "enable-delay-ms", 0);
+	panel->delay_disable = ofnode_read_u32_default(node, "disable-delay-ms", 0);
+	panel->delay_init = ofnode_read_u32_default(node, "init-delay-ms", 0);
+	panel->delay_reset = ofnode_read_u32_default(node, "reset-delay-ms", 0);
+	panel->bus_format = ofnode_read_u32_default(node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
 
-	data = fdt_getprop(blob, node, "panel-init-sequence", &len);
+	data = ofnode_get_property(node, "panel-init-sequence", &len);
 	if (data) {
 		panel->on_cmds = malloc(sizeof(*panel->on_cmds));
 		if (!panel->on_cmds)
 			return -ENOMEM;
 
-		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
 						    panel->on_cmds);
 		if (ret) {
 			printf("failed to parse panel init sequence\n");
@@ -291,7 +289,7 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 		}
 	}
 
-	data = fdt_getprop(blob, node, "panel-exit-sequence", &len);
+	data = ofnode_get_property(node, "panel-exit-sequence", &len);
 	if (data) {
 		panel->off_cmds = malloc(sizeof(*panel->off_cmds));
 		if (!panel->off_cmds) {
@@ -299,7 +297,7 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 			goto free_on_cmds;
 		}
 
-		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+		ret = rockchip_dsi_panel_parse_cmds(node, data, len,
 						    panel->off_cmds);
 		if (ret) {
 			printf("failed to parse panel exit sequence\n");
@@ -338,7 +336,7 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 		return ret;
 	}
 
-	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+	panel->power_invert = !!ofnode_read_u32_default(node, "power_invert", 0);
 
 	/* keep panel blank on init. */
 	dm_gpio_set_value(&panel->enable, 0);
@@ -358,7 +356,7 @@ static int rockchip_dsi_panel_init(struct display_state *state)
 	const void *blob = state->blob;
 	struct connector_state *conn_state = &state->conn_state;
 	struct panel_state *panel_state = &state->panel_state;
-	int node = panel_state->node;
+	ofnode node = panel_state->node;
 	struct rockchip_dsi_panel *panel;
 	int ret;
 
@@ -373,7 +371,7 @@ static int rockchip_dsi_panel_init(struct display_state *state)
 	panel->dev = panel_state->dev;
 	panel_state->private = panel;
 
-	ret = rockchip_dsi_panel_parse_dt(blob, node, panel);
+	ret = rockchip_dsi_panel_parse_dt(node, panel);
 	if (ret) {
 		printf("%s: failed to parse DT\n", __func__);
 		free(panel);
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 48cb756f13..ce8004233b 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 #include <asm/io.h>
@@ -515,6 +513,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	struct fdt_resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
 	int panel_node = panel_state->node;
+	int ret;
 
 	lvds = malloc(sizeof(*lvds));
 	if (!lvds)
@@ -522,19 +521,16 @@ static int rockchip_lvds_init(struct display_state *state)
 	lvds->pdata = pdata;
 
 	if (pdata->chip_type == RK3288_LVDS) {
-		lvds->regbase = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-						lvds_node, "reg", 0, NULL, false);
+		lvds->regbase = dev_read_addr_ptr(conn_state->dev);
 	} else {
-		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
-					   "mipi_lvds_phy", &lvds_phy);
+		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_phy", &lvds_phy);
 		if (i) {
 			printf("can't get regs lvds_phy addresses!\n");
 			free(lvds);
 			return -ENOMEM;
 		}
 
-		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
-					   "mipi_lvds_ctl", &lvds_ctrl);
+		i = dev_read_resource_byname(conn_state->dev, "mipi_lvds_ctl", &lvds_ctrl);
 		if (i) {
 			printf("can't get regs lvds_ctrl addresses!\n");
 			free(lvds);
@@ -544,7 +540,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		lvds->regbase = (void *)lvds_phy.start;
 		lvds->ctrl_reg = (void *)lvds_ctrl.start;
 	}
-
+	printf("%s regbase %p\n", __func__, lvds->regbase);
 	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (lvds->grf <= 0) {
 		printf("%s: Get syscon grf failed (ret=%p)\n",
@@ -552,8 +548,8 @@ static int rockchip_lvds_init(struct display_state *state)
 		return  -ENXIO;
 	}
 
-	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,output", 0, NULL);
-	if (!name)
+	ret = dev_read_string_index(panel_state->dev, "rockchip,output", 0, &name);
+	if (ret)
 		/* default set it as output rgb */
 		lvds->output = DISPLAY_OUTPUT_RGB;
 	else
@@ -563,8 +559,8 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->output;
 	}
-	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,data-mapping", 0, NULL);
-	if (!name)
+	ret = dev_read_string_index(panel_state->dev, "rockchip,data-mapping", 0, &name);
+	if (ret)
 		/* default set it as format jeida */
 		lvds->format = LVDS_FORMAT_JEIDA;
 	else
@@ -575,7 +571,7 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->format;
 	}
-	width = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
+	width = ofnode_read_u32_default(panel_node, "rockchip,data-width", 24);
 	if (width == 24) {
 		lvds->format |= LVDS_24BIT;
 	} else if (width == 18) {
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
index c07d385ffa..e2bba46a34 100644
--- a/drivers/video/drm/rockchip_mipi_dsi.c
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index b69e263af4..5e0e85d7e1 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -9,8 +9,6 @@
 #include <common.h>
 #include <errno.h>
 #include <dm/device.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 2c7f146953..d1dbe05f81 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <dm/device.h>
 #include <errno.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <linux/list.h>
 
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index 7518e8c14d..8ad5c0c005 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -17,6 +17,8 @@
 #include <clk.h>
 #include <asm/arch/clock.h>
 #include <linux/err.h>
+#include <dm/device.h>
+#include <dm/read.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -33,7 +35,6 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct connector_state *conn_state = &state->conn_state;
 	u32 *lut = conn_state->gamma.lut;
-	int node = crtc_state->node;
 	fdt_size_t lut_size;
 	int i, lut_len;
 	u32 *lut_regs;
@@ -41,14 +42,12 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	if (!conn_state->gamma.lut)
 		return 0;
 
-	i = fdt_stringlist_search(state->blob, node, "reg-names", "gamma_lut");
+	i = dev_read_stringlist_search(crtc_state->dev, "reg-names", "gamma_lut");
 	if (i < 0) {
 		printf("Warning: vop not support gamma\n");
 		return 0;
 	}
-	lut_regs = (u32 *)fdtdec_get_addr_size_auto_noparent(state->blob,
-							     node, "reg", i,
-							     &lut_size, false);
+	lut_regs = (u32 *)dev_read_addr_size(crtc_state->dev, "reg", &lut_size);
 	if (lut_regs == (u32 *)FDT_ADDR_T_NONE) {
 		printf("failed to get gamma lut register\n");
 		return 0;
@@ -111,8 +110,7 @@ static int rockchip_vop_init(struct display_state *state)
 	memset(vop, 0, sizeof(*vop));
 
 	crtc_state->private = vop;
-	vop->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
-					crtc_state->node, "reg", 0, NULL, false);
+	vop->regs = dev_read_addr_ptr(crtc_state->dev);
 	vop->regsbak = malloc(vop_data->reg_len);
 	vop->win = vop_data->win;
 	vop->win_offset = vop_data->win_offset;
@@ -435,15 +433,15 @@ static int rockchip_vop_disable(struct display_state *state)
 
 static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
 {
+#if 0
 	struct crtc_state *crtc_state = &state->crtc_state;
 	struct panel_state *pstate = &state->panel_state;
 	uint32_t phandle;
 	char path[100];
 	int ret, dsp_lut_node;
 
-	if (!pstate->dsp_lut_node)
+	if (!ofnode_valid(pstate->dsp_lut_node))
 		return 0;
-
 	ret = fdt_get_path(state->blob, pstate->dsp_lut_node, path, sizeof(path));
 	if (ret < 0) {
 		printf("failed to get dsp_lut path[%s], ret=%d\n",
@@ -471,7 +469,7 @@ static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
 	}
 
 	do_fixup_by_path_u32(blob, path, "dsp-lut", phandle, 1);
-
+#endif
 	return 0;
 }
 
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
index c8730cf22c..057448c51c 100644
--- a/drivers/video/drm/rockchip_vop_reg.c
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
-#include <fdtdec.h>
-#include <fdt_support.h>
 #include <asm/unaligned.h>
 #include <asm/io.h>
 #include <linux/list.h>

commit 3d29ee38ce97e85c997d1b78b606818af641194e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:58:38 2018 +0800

    rockchip: power: charge animation depends on DRM_ROCKCHIP
    
    charge animation need display provided by DRM_ROCKCHIP.
    
    Change-Id: I58113e81dd2899c969d1e748548a498eb04db550
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index d6fe1af5b3..febe58f6f4 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -77,7 +77,7 @@ endchoice
 
 config CHARGE_ANIMATION
 	bool "Enable charge animation"
-	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
+	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE && DRM_ROCKCHIP
 	help
 	  This adds a simple function for charge animation display.
 

commit 9169f300ee9d4fc4c65407eb9a49534b7a1b9aab
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:26:41 2018 +0800

    rockchip: pwm: convert to use live dt
    
    use live dt api to get base addr
    
    Change-Id: Ia01e6fa2ca08c336a1a767630460a956ff293c0b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 2364c2dfdd..7d3e11d667 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -76,7 +76,7 @@ static int rk_pwm_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk_pwm_priv *priv = dev_get_priv(dev);
 
-	priv->regs = (struct rk3288_pwm *)devfdt_get_addr(dev);
+	priv->regs = (struct rk3288_pwm *)dev_read_addr(dev);
 
 	return 0;
 }

commit 2f37ae52b7fd7ebe19686a11465adbdcb89ebac1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Feb 6 21:26:11 2018 +0800

    rockchip: video: fix compile warning
    
    Change-Id: I05dbb0cdc33f71f66feedad2033d702177b31ede
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 79e9cc85d7..bef7ffea90 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -72,7 +72,9 @@ static ulong alloc_fb(struct udevice *dev, ulong *addrp)
 
 int video_reserve(ulong *addrp)
 {
+#ifndef CONFIG_DRM_ROCKCHIP
 	struct udevice *dev;
+#endif
 	ulong size;
 
 	gd->video_top = *addrp;

commit fb568ba04219580bdbbe656a65beab6d1f10ab9e
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Feb 6 16:27:06 2018 +0800

    configs: rockchip: px30: enable rockusb and fastboot
    
    This commit adds rockusb and fastboot support for evb-px30 board.
    
    Change-Id: I0ce468a829a506f74123427c5ac3d0fe9162bcae
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 011f6b15c8..164fd2161b 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -33,6 +33,13 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_TPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_LOAD_ANDROID=y
@@ -69,6 +76,13 @@ CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330d
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index f6cb4f0b95..657c5d4db4 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -45,6 +45,10 @@
 
 #ifndef CONFIG_SPL_BUILD
 
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_ROCKUSB_G_DNL_PID        0x330d
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \

commit f67f522b54c0b5a249daa34aa63d01988a785ccd
Author: Finley Xiao <finley.xiao@rock-chips.com>
Date:   Mon Feb 5 23:02:00 2018 +0800

    rockchip: clk: px30: Add support for i2c, pwm, spi and saradc
    
    Change-Id: I81e1bf5776952da62dcdc7fdf58587ba0ddf20ae
    Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 883cec0b79..088017d50d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -235,6 +235,46 @@ enum {
 	UART2_DIVNP5_SHIFT	= 0,
 	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
 
+	/* CRU_CLK_SEL49_CON */
+	CLK_I2C_PLL_SEL_GPLL		= 0,
+	CLK_I2C_PLL_SEL_24M,
+	CLK_I2C_DIV_CON_MASK		= 0x7f,
+	CLK_I2C_PLL_SEL_MASK		= 1,
+	CLK_I2C1_PLL_SEL_SHIFT		= 15,
+	CLK_I2C1_DIV_CON_SHIFT		= 8,
+	CLK_I2C0_PLL_SEL_SHIFT		= 7,
+	CLK_I2C0_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL50_CON */
+	CLK_I2C3_PLL_SEL_SHIFT		= 15,
+	CLK_I2C3_DIV_CON_SHIFT		= 8,
+	CLK_I2C2_PLL_SEL_SHIFT		= 7,
+	CLK_I2C2_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL52_CON */
+	CLK_PWM_PLL_SEL_GPLL		= 0,
+	CLK_PWM_PLL_SEL_24M,
+	CLK_PWM_DIV_CON_MASK		= 0x7f,
+	CLK_PWM_PLL_SEL_MASK		= 1,
+	CLK_PWM1_PLL_SEL_SHIFT		= 15,
+	CLK_PWM1_DIV_CON_SHIFT		= 8,
+	CLK_PWM0_PLL_SEL_SHIFT		= 7,
+	CLK_PWM0_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL53_CON */
+	CLK_SPI_PLL_SEL_GPLL		= 0,
+	CLK_SPI_PLL_SEL_24M,
+	CLK_SPI_DIV_CON_MASK		= 0x7f,
+	CLK_SPI_PLL_SEL_MASK		= 1,
+	CLK_SPI1_PLL_SEL_SHIFT		= 15,
+	CLK_SPI1_DIV_CON_SHIFT		= 8,
+	CLK_SPI0_PLL_SEL_SHIFT		= 7,
+	CLK_SPI0_DIV_CON_SHIFT		= 0,
+
+	/* CRU_CLK_SEL55_CON */
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= 0x7ff,
+
 	/* CRU_PMU_MODE */
 	GPLL_MODE_SHIFT		= 0,
 	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index f5a7a15d19..d79833341f 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -173,12 +173,20 @@ static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
 
 	switch (clk_id) {
 	case SCLK_I2C0:
+		con = readl(&cru->clksel_con[49]);
+		div = con >> CLK_I2C0_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	case SCLK_I2C1:
+		con = readl(&cru->clksel_con[49]);
+		div = con >> CLK_I2C1_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	case SCLK_I2C2:
+		con = readl(&cru->clksel_con[50]);
+		div = con >> CLK_I2C2_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	case SCLK_I2C3:
+		con = readl(&cru->clksel_con[50]);
+		div = con >> CLK_I2C3_DIV_CON_SHIFT & CLK_I2C_DIV_CON_MASK;
 		break;
 	default:
 		printf("do not support this i2c bus\n");
@@ -197,12 +205,32 @@ static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 
 	switch (clk_id) {
 	case SCLK_I2C0:
+		rk_clrsetreg(&cru->clksel_con[49],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C0_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C0_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C0_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C0_PLL_SEL_SHIFT);
 		break;
 	case SCLK_I2C1:
+		rk_clrsetreg(&cru->clksel_con[49],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C1_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C1_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C1_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C1_PLL_SEL_SHIFT);
 		break;
 	case SCLK_I2C2:
+		rk_clrsetreg(&cru->clksel_con[50],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C2_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C2_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C2_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C2_PLL_SEL_SHIFT);
 		break;
 	case SCLK_I2C3:
+		rk_clrsetreg(&cru->clksel_con[50],
+			     CLK_I2C_DIV_CON_MASK << CLK_I2C3_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_MASK << CLK_I2C3_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_I2C3_DIV_CON_SHIFT |
+			     CLK_I2C_PLL_SEL_GPLL << CLK_I2C3_PLL_SEL_SHIFT);
 		break;
 	default:
 		printf("do not support this i2c bus\n");
@@ -282,23 +310,63 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	return px30_mmc_get_clk(cru, clk_id);
 }
 
-static ulong px30_pwm_get_clk(struct px30_cru *cru)
+static ulong px30_pwm_get_clk(struct px30_cru *cru, ulong clk_id)
 {
 	u32 div, con;
 
+	switch (clk_id) {
+	case SCLK_PWM0:
+		con = readl(&cru->clksel_con[52]);
+		div = con >> CLK_PWM0_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+		break;
+	case SCLK_PWM1:
+		con = readl(&cru->clksel_con[52]);
+		div = con >> CLK_PWM1_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
 	return DIV_TO_RATE(GPLL_HZ, div);
 }
 
-static ulong px30_pwm_set_clk(struct px30_cru *cru, uint hz)
+static ulong px30_pwm_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
 {
-	u32 div = GPLL_HZ / hz;
+	int src_clk_div;
 
-	return DIV_TO_RATE(GPLL_HZ, div);
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		rk_clrsetreg(&cru->clksel_con[52],
+			     CLK_PWM_DIV_CON_MASK << CLK_PWM0_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_MASK << CLK_PWM0_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_PWM0_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_PWM1:
+		rk_clrsetreg(&cru->clksel_con[52],
+			     CLK_PWM_DIV_CON_MASK << CLK_PWM1_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_MASK << CLK_PWM1_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_PWM1_DIV_CON_SHIFT |
+			     CLK_PWM_PLL_SEL_GPLL << CLK_PWM1_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
 static ulong px30_saradc_get_clk(struct px30_cru *cru)
 {
-	u32 div, val;
+	u32 div, con;
+
+	con = readl(&cru->clksel_con[55]);
+	div = con >> CLK_SARADC_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK;
 
 	return DIV_TO_RATE(OSC_HZ, div);
 }
@@ -307,9 +375,65 @@ static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
 {
 	int src_clk_div;
 
-	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	src_clk_div = OSC_HZ / hz;
+	assert(src_clk_div - 1 < 2047);
 
-	return px30_saradc_get_clk(cru);
+	rk_clrsetreg(&cru->clksel_con[55],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return DIV_TO_RATE(OSC_HZ, src_clk_div);
+}
+
+static ulong px30_spi_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_PWM0:
+		con = readl(&cru->clksel_con[53]);
+		div = con >> CLK_SPI0_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
+		break;
+	case SCLK_PWM1:
+		con = readl(&cru->clksel_con[53]);
+		div = con >> CLK_SPI1_DIV_CON_SHIFT & CLK_SPI_DIV_CON_MASK;
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_spi_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_SPI0:
+		rk_clrsetreg(&cru->clksel_con[53],
+			     CLK_SPI_DIV_CON_MASK << CLK_SPI0_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_MASK << CLK_SPI0_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_SPI0_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI0_PLL_SEL_SHIFT);
+		break;
+	case SCLK_SPI1:
+		rk_clrsetreg(&cru->clksel_con[53],
+			     CLK_SPI_DIV_CON_MASK << CLK_SPI1_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_MASK << CLK_SPI1_PLL_SEL_SHIFT,
+			     (src_clk_div - 1) << CLK_SPI1_DIV_CON_SHIFT |
+			     CLK_SPI_PLL_SEL_GPLL << CLK_SPI1_PLL_SEL_SHIFT);
+		break;
+	default:
+		printf("do not support this pwm bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
 }
 
 static ulong px30_clk_get_rate(struct clk *clk)
@@ -333,11 +457,15 @@ static ulong px30_clk_get_rate(struct clk *clk)
 		rate = px30_i2c_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_PWM0:
-		rate = px30_pwm_get_clk(priv->cru);
+		rate = px30_pwm_get_clk(priv->cru, clk->id);
 		break;
 	case SCLK_SARADC:
 		rate = px30_saradc_get_clk(priv->cru);
 		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		rate = px30_spi_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -367,11 +495,16 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		ret = px30_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_PWM0:
-		ret = px30_pwm_set_clk(priv->cru, rate);
+	case SCLK_PWM1:
+		ret = px30_pwm_set_clk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_SARADC:
 		ret = px30_saradc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		ret = px30_spi_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 793770df466d2b0bd9abce5517173d672df21382
Author: David Wu <david.wu@rock-chips.com>
Date:   Tue Feb 6 15:24:12 2018 +0800

    pinctrl: rockchip: Fix the uart2 & uart3 route bit of px30
    
    Uart2 and uart3 both have routed bit, use their rx pin to
    switch m0 or m1.
    
    Change-Id: Iae64bb675a1f8cc8e54c7b798bffcf89d68fb64f
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 68bf30d8e6..ad103560d4 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -488,31 +488,31 @@ static struct rockchip_mux_route_data px30_mux_route_data[] = {
 	}, {
 		/* uart2-rxm0 */
 		.bank_num = 1,
-		.pin = 26,
+		.pin = 27,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 9),
+		.route_val = BIT(16 + 10),
 	}, {
 		/* uart2-rxm1 */
 		.bank_num = 2,
 		.pin = 14,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 9) | BIT(9),
+		.route_val = BIT(16 + 10) | BIT(10),
 	}, {
 		/* uart3-rxm0 */
 		.bank_num = 0,
 		.pin = 17,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 10),
+		.route_val = BIT(16 + 9),
 	}, {
 		/* uart3-rxm1 */
 		.bank_num = 1,
-		.pin = 13,
+		.pin = 15,
 		.func = 2,
 		.route_offset = 0x184,
-		.route_val = BIT(16 + 10) | BIT(10),
+		.route_val = BIT(16 + 9) | BIT(9),
 	},
 };
 

commit 6e6b06ab81d3c89fe73975eaf3596c947bcc0056
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 16:19:27 2018 +0800

    rockchip: dts: px30-evb: add rk817 node
    
    Change-Id: Ic861dabfdf84b8893d99a28c67a96e2464c0da83
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index 7736908966..c890607954 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -62,6 +62,276 @@
 };
 
 
+&i2c0 {
+	status = "okay";
+
+	rk817: pmic@20 {
+		compatible = "rockchip,rk817";
+		reg = <0x20>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vccsys>;
+		vcc2-supply = <&vccsys>;
+		vcc3-supply = <&vccsys>;
+		vcc4-supply = <&vccsys>;
+		vcc5-supply = <&vccsys>;
+		vcc6-supply = <&vccsys>;
+		vcc7-supply = <&vcc_3v0>;
+		vcc8-supply = <&vccsys>;
+		vcc9-supply = <&dcdc_boost>;
+
+		vccsys: vccsys{
+			compatible = "regulator-fixed";
+			regulator-name = "vcc3v8_sys";
+			regulator-always-on;
+			regulator-boot-on;
+			regulator-min-microvolt = <3800000>;
+			regulator-max-microvolt = <3800000>;
+		};
+
+		rk817_pin0_ts: rk817_pin0_ts {
+			pins = "gpio0";
+			function = "pin_fun0";
+		};
+
+		rk817_pin0_gpio: rk817_pin0_gpio {
+			pins = "gpio0";
+			function = "gpio";
+		};
+
+		rk817_pin1_gt: rk817_pin1_gt {
+			pins = "gpio1";
+			function = "pin_fun0";
+		};
+
+		rk817_pin1_gpio: rk817_pin1_gpio {
+			pins = "gpio1";
+			function = "gpio";
+		};
+
+		regulators {
+			vdd_arm: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_arm";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <700000>;
+				};
+			};
+
+			vdd_logic: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <950000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vdd_logic";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <800000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_ddr";
+					regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_3v0: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-initial-mode = <0x1>;
+				regulator-name = "vcc_3v0";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc2v5_ddr: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2500000>;
+				regulator-max-microvolt = <2500000>;
+				regulator-name = "vcc2v5_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <2500000>;
+				};
+			};
+
+			vcc1v8_soc: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_soc";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v0_soc: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+
+				regulator-name = "vcc1v0_soc";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc3v0_pmu: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-name = "vcc3v0_pmu";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_sd: LDO_REG6 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+
+				regulator-name = "vcc_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc2v8_dvp: LDO_REG7 {
+			regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+
+				regulator-name = "vcc2v8_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <2800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-name = "vcc1v8_dvp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd1v5_dvp: LDO_REG9 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-name = "vdd1v5_dvp";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			dcdc_boost: BOOST {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <4700000>;
+				regulator-max-microvolt = <5400000>;
+				regulator-name = "boost";
+			};
+
+			otg_switch: OTG_SWITCH {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "otg_switch";
+			};
+		};
+
+		battery {
+			compatible = "rk817,battery";
+			ocv_table = <3500 3625 3685 3697 3718 3735 3748
+						3760 3774 3788 3802 3816 3834 3853
+						3877 3908 3946 3975 4018 4071 4106>;
+			design_capacity = <2500>;
+			design_qmax = <2750>;
+			bat_res = <100>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3850>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			sample_res = <10>;
+			virtual_power = <1>;
+		};
+
+		charger {
+			compatible = "rk817,charger";
+			min_input_voltage = <4500>;
+			max_input_current = <1500>;
+			max_chrg_current = <1300>;
+			max_chrg_voltage = <4200>;
+			chrg_term_mode = <1>;
+			chrg_finish_cur = <300>;
+			virtual_power = <0>;
+			dc_det_adc = <0>;
+		};
+	};
+};
+
 &emmc {
 	u-boot,dm-pre-reloc;
 	fifo-mode;
@@ -79,3 +349,12 @@
 &saradc {
 	status = "okay";
 };
+
+&pinctrl {
+	pmic {
+	pmic_int: pmic_int {
+		rockchip,pins =
+			<0 7 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
\ No newline at end of file

commit bd03c51b6a5edaa3af2ab5ff1a089cbf485796e7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 15:25:08 2018 +0800

    configs: evb-px30: enable some drivers
    
    include: pmic, reguator, gpio, i2c, pinctrl
    
    Change-Id: I03490904c1a93bc0bdc9e9ab55ff5295610dd37b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 1d537d7a9c..011f6b15c8 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -75,3 +75,13 @@ CONFIG_ERRNO_STR=y
 CONFIG_SARADC_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_ADC_KEY=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_RK8XX_PWRKEY=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_REGULATOR=y

commit 608481098860868d8082e0dbdc274fd1a98d04a6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 15:21:07 2018 +0800

    rockchip: irq: enable GICv2 on px30
    
    Change-Id: I797fa071091f6856c3a7eef6ae6a9f0c4bcb377a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7328ba467e..6d44919b95 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -3,6 +3,7 @@ if ARCH_ROCKCHIP
 config ROCKCHIP_PX30
 	bool "Support Rockchip PX30"
 	select ARM64
+	select GICV2
 	help
 	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index 44838774b4..f6cb4f0b95 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -29,8 +29,8 @@
 
 #define COUNTER_FREQUENCY		24000000
 
-#define GICD_BASE			0xFF811000
-#define GICC_BASE			0xFF812000
+#define GICD_BASE			0xff131000
+#define GICC_BASE			0xff132000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
diff --git a/include/irq-platform.h b/include/irq-platform.h
index d4269c9761..f6e1b88a29 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -131,6 +131,27 @@
 
 #define GPIO_BANK_NUM			5
 #define GPIO_BANK_PINS			32
+
+#elif defined(CONFIG_ROCKCHIP_PX30)
+#define GPIO0_PHYS			0xff040000
+#define GPIO1_PHYS			0xff250000
+#define GPIO2_PHYS			0xff260000
+#define GPIO3_PHYS			0xff270000
+
+#define IRQ_GPIO0			35
+#define IRQ_GPIO1			36
+#define IRQ_GPIO2			37
+#define IRQ_GPIO3			38
+#define IRQ_PWM0			56
+#define IRQ_PWM1			57
+#define IRQ_TIMER1			63	/* non-secure */
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
 #else
 "Missing define RIQ relative things"
 #endif

commit 0c05cc95806ba5fcca372745e1a32db5fb450160
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 15:19:09 2018 +0800

    clk: clk_px30: use debug instead of printf
    
    Change-Id: I12eceee41ebfb2269a90fc8dbc7ca1f6a39a1770
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 89b18a2f8e..f5a7a15d19 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -246,7 +246,7 @@ static ulong px30_mmc_set_clk(struct px30_cru *cru,
 	int src_clk_div;
 	u32 con_id;
 
-	printf("%s %d %d\n", __func__, clk_id, set_rate);
+	debug("%s %d %d\n", __func__, clk_id, set_rate);
 	switch (clk_id) {
 	case HCLK_SDMMC:
 	case SCLK_SDMMC:
@@ -350,7 +350,7 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
 	ulong ret = 0;
 
-	printf("%s %d %d\n", __func__, clk->id, rate);
+	debug("%s %d %d\n", __func__, clk->id, rate);
 	switch (clk->id) {
 	case 0 ... 15:
 		return 0;
@@ -376,7 +376,7 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
 		return -ENOENT;
 	}
 
-	printf("%s %d\n", __func__, ret);
+	debug("%s %d\n", __func__, ret);
 	return ret;
 }
 

commit 26dd90f7bcaeedfc7511f018f029958f42beb920
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 14:19:53 2018 +0800

    configs: evb-px30: enable adc keys
    
    Change-Id: I02c6d6388191cb1b23cbf5f4c5ef9f3dadc22128
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index 39799afb56..1d537d7a9c 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -72,3 +72,6 @@ CONFIG_SPL_SYSRESET=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_SARADC_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y

commit 28d30d4c661e55838c624f63a22863e8d9b41b10
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 14:11:02 2018 +0800

    input: Kconfig: do not enable key driver
    
    Change-Id: I4c32843d74039e46f629915bce16853540b6f575
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 85eb573323..6a88c7918e 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -48,27 +48,23 @@ config I8042_KEYB
 config RK8XX_PWRKEY
 	bool "Enable RK805/816 pwrkey support"
 	depends on DM_KEY && PMIC_RK8XX
-	default y
 	help
 	  This adds a driver for the RK805/816 pwrkey support.
 
 config ADC_KEY
 	bool "Enable adc keys support"
 	depends on DM_KEY
-	default y
 	help
 	  This adds a driver for the adc keys support.
 
 config GPIO_KEY
 	bool "Enable gpio keys support"
 	depends on DM_KEY
-	default y
 	help
 	  This adds a driver for the gpio keys support.
 
 config RK_KEY
 	bool "Enable rk keys support"
 	depends on DM_KEY
-	default y
 	help
 	  This adds a driver for the rk keys support.

commit 4e1791d386b22cb49f957139f0871c96d76fa7b4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 14:07:42 2018 +0800

    rockchip: dts: px30-evb: add adc-keys
    
    Change-Id: I5978e33200b70510380cecfe232ec47862bff588
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index d08a19d680..7736908966 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 #include "px30.dtsi"
 #include "px30-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip PX30 EVB";
@@ -21,6 +22,43 @@
 		compatible = "rockchip,px30-dmc", "syscon";
 		reg = <0x0 0xff2a0000 0x0 0x1000>;
 	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+
+		vol-up-key {
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <10000>;
+		};
+
+		vol-down-key {
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <170000>;
+		};
+
+		home-key {
+			linux,code = <KEY_HOME>;
+			label = "home";
+			press-threshold-microvolt = <254000>;
+		};
+
+		menu-key {
+			linux,code = <KEY_MENU>;
+			label = "menu";
+			press-threshold-microvolt = <414000>;
+		};
+
+		esc-key {
+			linux,code = <KEY_ESC>;
+			label = "esc";
+			press-threshold-microvolt = <614000>;
+		};
+	};
 };
 
 
@@ -37,3 +75,7 @@
 	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
 	status = "okay";
 };
+
+&saradc {
+	status = "okay";
+};

commit 829f2b853dd881ed5b34e91a54d6d37b01c206a3
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Feb 5 16:29:47 2018 +0800

    usb: gadget: add getting chip-info command for rockusb
    
    This change adds getting chip-info command support for rockusb.
    
    Change-Id: Ie158c94eb0591e658947f3b0c47f4fc0ec0333d1
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 250bcd4a79..586c0cd2c5 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -7,6 +7,7 @@
 
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/chip_info.h>
 #include <rockusb.h>
 
 #define ROCKUSB_INTERFACE_CLASS	0xff
@@ -207,6 +208,25 @@ static int rkusb_do_read_flash_info(struct fsg_common *common,
 	return len;
 }
 
+static int rkusb_do_get_chip_info(struct fsg_common *common,
+				  struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+	u32 chip_info[4];
+
+	memset((void *)chip_info, 0, sizeof(chip_info));
+	rockchip_rockusb_get_chip_info(chip_info);
+
+	memset((void *)&buf[0], 0, len);
+	memcpy((void *)&buf[0], (void *)chip_info, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
 static int rkusb_do_lba_erase(struct fsg_common *common,
 			      struct fsg_buffhd *bh)
 {
@@ -315,6 +335,11 @@ static int rkusb_cmd_process(struct fsg_common *common,
 		rc = RKUSB_RC_FINISHED;
 		break;
 
+	case RKUSB_GET_CHIP_VER:
+		*reply = rkusb_do_get_chip_info(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
 	case RKUSB_LBA_ERASE:
 		*reply = rkusb_do_lba_erase(common, bh);
 		rc = RKUSB_RC_FINISHED;
@@ -342,7 +367,6 @@ static int rkusb_cmd_process(struct fsg_common *common,
 	case RKUSB_SDRAM_READ_10:
 	case RKUSB_SDRAM_WRITE_10:
 	case RKUSB_SDRAM_EXECUTE:
-	case RKUSB_GET_CHIP_VER:
 	case RKUSB_LOW_FORMAT:
 	case RKUSB_SET_RESET_FLAG:
 	case RKUSB_SPI_READ_10:

commit 53cb838439731ad54380bf86fa3aaa4aeadec494
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Feb 6 10:39:46 2018 +0800

    board: rockchip: update README of rv1108 evb
    
    The RV1108 EVB switch to spl now, so we need
    to update the README.
    
    Change-Id: I1c300a53a8a5c76aafa4857f55956e0203df8634
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/board/rockchip/evb_rv1108/README b/board/rockchip/evb_rv1108/README
index 79a97c3138..f9df7b2b8f 100644
--- a/board/rockchip/evb_rv1108/README
+++ b/board/rockchip/evb_rv1108/README
@@ -1,12 +1,11 @@
 Here is the step-by-step to boot U-Boot on rv1108 evb.
 
-Get ddr init binary
-==============================================================================
-  > git clone  https://github.com/rockchip-linux/rkbin.git
 
 Compile  U-Boot
 ===========================
-  > make CROSS_COMPILE=arm-linux-gnueabi- evb-rv1108_defconfig  all
+  > make CROSS_COMPILE=arm-linux-gnueabihf- evb-rv1108_defconfig  all
+  > ./tools/mkimage  -n rv1108 -T rksd -d ./out/u-boot-spl.bin spl.bin
+  You can also use the ddr bin from rockchip official release [0] instead of u-boot-spl:
   > ./tools/mkimage  -n rv1108 -T rksd -d ../rkbin/rv1x/rv1108ddr_v1.00.bin spl.bin
   > cat spl.bin u-boot.bin > u-boot.img
 
@@ -19,28 +18,28 @@ Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > rkdeveloptool wl 0x40 u-boot.img
   > rkdeveloptool RD
 
-You should be able to get U-Boot log message from boot console:
 
-DDR Version V1.02 20170220
-In
-400MHz
-DDR3
-Bus Width=16 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=512MB
-mach:2
-OUT
+You should be able to get U-Boot log message from boot console with baudrate 1500000:
 
+U-Boot SPL board initReturning to boot ROM...
 
-U-Boot 2017.05-00693-g3a5b171 (Jun 01 2017 - 17:37:53 +0800)
+
+U-Boot 2017.09-01119-gc3ef4c0-dirty (Feb 06 2018 - 10:04:12 +0800)
 
 Model: Rockchip RV1108 Evaluation board
-DRAM:  128 MiB
-APLL: 600000000 DPLL:792000000 GPLL:384000000
+DRAM:  256 MiB
+APLL: 400000000 DPLL:798000000 GPLL:384000000
 MMC:
 Using default environment
 
 In:    serial@10210000
 Out:   serial@10210000
 Err:   serial@10210000
+Model: Rockchip RV1108 Evaluation board
 Net:   No ethernet found.
 Hit any key to stop autoboot:  0
 =>
+
+
+
+[0] git clone  https://github.com/rockchip-linux/rkbin.git

commit 55fe151c8c910020ab775a428f68a97da7d3a236
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 11:42:49 2018 +0800

    bootm-fdt: printf memory bank information
    
    Change-Id: I8630ad245a301d7c1d31ce85a7b67f511cc23fd3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index fcc2a0e214..d6bb3031d7 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -42,8 +42,13 @@ int arch_fixup_fdt(void *blob)
 	u64 size[CONFIG_NR_DRAM_BANKS];
 
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+		if (size[bank] == 0)
+			continue;
 		start[bank] = bd->bi_dram[bank].start;
 		size[bank] = bd->bi_dram[bank].size;
+		printf("Adding bank: start=0x%08lx, size=0x%08lx\n",
+		       gd->bd->bi_dram[bank].start, gd->bd->bi_dram[bank].size);
+
 #ifdef CONFIG_ARMV7_NONSEC
 		ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
 		if (ret)

commit f60795f1552c51333cebf3bd6bee326b5f23a91c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 11:41:54 2018 +0800

    configs: px30_common.h: set CONFIG_NR_DRAM_BANKS=2
    
    Change-Id: Ic2e299707e6885f625d101977f592bf271204881
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
index e9f17dd7a9..44838774b4 100644
--- a/include/configs/px30_common.h
+++ b/include/configs/px30_common.h
@@ -38,7 +38,7 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_NR_DRAM_BANKS		2
 #define SDRAM_MAX_SIZE			0xff000000
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit ca5e018d11966407f38b42e3090c31b785a33ae8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 10:45:03 2018 +0800

    common: fdt_support: add bootargs debug output
    
    Change-Id: I06636c498b015774968b3c52ce53f54637fa8525
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 884db34119..0e8e90481d 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -315,6 +315,8 @@ int fdt_chosen(void *fdt)
 		}
 	}
 
+	debug("bootargs = %s\n", env_get("bootargs"));
+
 	return fdt_fixup_stdout(fdt, nodeoffset);
 }
 

commit 89f991f8329ff91bbacc07baebeeafc014d57e94
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Feb 6 10:43:16 2018 +0800

    rockchip: px30: fix clk and pmugrf issue
    
    Change-Id: I481abacc5f69e645b4b3ca2cc5b27bf6cc3a6ca7
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index 1ece341901..83b7f11bb7 100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -13,4 +13,8 @@
 
 &emmc {
 	u-boot,dm-pre-reloc;
-};
\ No newline at end of file
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index d27283f192..883cec0b79 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -12,7 +12,7 @@
 #define OSC_HZ		(24 * MHz)
 
 #define APLL_HZ		(816 * MHz)
-#define GPLL_HZ		(1200 * MHz)
+#define GPLL_HZ		(600 * MHz)
 #define CPLL_HZ		(594 * MHz)
 
 #define CORE_PERI_HZ	204000000
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index a23e220571..f98ba8cc29 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -22,7 +22,7 @@ static int px30_dmc_probe(struct udevice *dev)
 {
 	struct dram_info *priv = dev_get_priv(dev);
 
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(

commit a60961a3df3a145c9dbfdea22a070ae8ac7a1fcb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:07:00 2018 +0800

    rockchip: px30: add clock driver
    
    Add basic clock for px30 which including cpu, bus, emmc clock init.
    
    Change-Id: I43a1eaee20bda330ce4ff0556b3fda14a0451681
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
new file mode 100644
index 0000000000..d27283f192
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -0,0 +1,243 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_CRU_px30_H
+#define _ASM_ARCH_CRU_px30_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(816 * MHz)
+#define GPLL_HZ		(1200 * MHz)
+#define CPLL_HZ		(594 * MHz)
+
+#define CORE_PERI_HZ	204000000
+#define CORE_ACLK_HZ	408000000
+
+#define BUS_ACLK_HZ	148500000
+#define BUS_HCLK_HZ	148500000
+#define BUS_PCLK_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+enum apll_frequencies {
+	APLL_816_MHZ,
+	APLL_600_MHZ,
+};
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct px30_clk_priv {
+	struct px30_cru *cru;
+	ulong rate;
+};
+
+struct px30_cru {
+	struct px30_pll {
+		unsigned int con0;
+		unsigned int con1;
+		unsigned int con2;
+		unsigned int con3;
+		unsigned int con4;
+		unsigned int reserved0[3];
+	} pll[4];
+	unsigned int reserved1[8];
+	unsigned int mode;
+	unsigned int misc;
+	unsigned int reserved2[2];
+	unsigned int glb_cnt_th;
+	unsigned int glb_rst_st;
+	unsigned int glb_srst_fst;
+	unsigned int glb_srst_snd;
+	unsigned int glb_rst_con;
+	unsigned int reserved3[7];
+	unsigned int hwffc_con0;
+	unsigned int reserved4;
+	unsigned int hwffc_th;
+	unsigned int hwffc_intst;
+	unsigned int apll_con0_s;
+	unsigned int apll_con1_s;
+	unsigned int clksel_con0_s;
+	unsigned int reserved5;
+	unsigned int clksel_con[60];
+	unsigned int reserved6[4];
+	unsigned int clkgate_con[18];
+	unsigned int reserved7[(0x280 - 0x244) / 4 - 1];
+	unsigned int ssgtbl[32];
+	unsigned int softrst_con[12];
+	unsigned int reserved8[(0x380 - 0x32c) / 4 - 1];
+	unsigned int sdmmc_con[2];
+	unsigned int sdio_con[2];
+	unsigned int emmc_con[2];
+	unsigned int reserved9[(0x400 - 0x394) / 4 - 1];
+	unsigned int autocs_con[8];
+	unsigned int reserved10[(0xc000 - 0x41c) / 4 - 1];
+	struct px30_pll gpll;
+	unsigned int pmu_mode;
+	unsigned int reserved11[7];
+	unsigned int pmu_clksel_con[6];
+	unsigned int pmu_clkgate_con[2];
+	unsigned int reserved12[(0xc0c0 - 0xc05c) / 4 - 1];
+	unsigned int pmu_autocs_con[2];
+};
+check_member(px30_cru, pmu_autocs_con[1], 0xc0c4);
+
+struct pll_div {
+	u32 refdiv;
+	u32 fbdiv;
+	u32 postdiv1;
+	u32 postdiv2;
+	u32 frac;
+};
+
+enum {
+	/* PLLCON0*/
+	PLL_BP_SHIFT		= 15,
+	PLL_POSTDIV1_SHIFT	= 12,
+	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
+	PLL_FBDIV_SHIFT		= 0,
+	PLL_FBDIV_MASK		= 0xfff,
+
+	/* PLLCON1 */
+	PLL_PDSEL_SHIFT		= 15,
+	PLL_PD1_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
+	PLL_DSMPD_SHIFT		= 12,
+	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
+	PLL_LOCK_STATUS_SHIFT	= 10,
+	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
+	PLL_POSTDIV2_SHIFT	= 6,
+	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
+	PLL_REFDIV_SHIFT	= 0,
+	PLL_REFDIV_MASK		= 0x3f,
+
+	/* PLLCON2 */
+	PLL_FOUT4PHASEPD_SHIFT	= 27,
+	PLL_FOUTVCOPD_SHIFT	= 26,
+	PLL_FOUTPOSTDIVPD_SHIFT	= 25,
+	PLL_DACPD_SHIFT		= 24,
+	PLL_FRAC_DIV	= 0xffffff,
+
+	/* CRU_MODE */
+	PLLMUX_FROM_XIN24M	= 0,
+	PLLMUX_FROM_PLL,
+	PLLMUX_FROM_RTC32K,
+	USBPHY480M_MODE_SHIFT	= 8,
+	USBPHY480M_MODE_MASK	= 3 << USBPHY480M_MODE_SHIFT,
+	NPLL_MODE_SHIFT		= 6,
+	NPLL_MODE_MASK		= 3 << NPLL_MODE_SHIFT,
+	DPLL_MODE_SHIFT		= 4,
+	DPLL_MODE_MASK		= 3 << DPLL_MODE_SHIFT,
+	CPLL_MODE_SHIFT		= 2,
+	CPLL_MODE_MASK		= 3 << CPLL_MODE_SHIFT,
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 3 << APLL_MODE_SHIFT,
+
+	/* CRU_CLK_SEL0_CON */
+	CORE_ACLK_DIV_SHIFT	= 12,
+	CORE_ACLK_DIV_MASK	= 0x07 << CORE_ACLK_DIV_SHIFT,
+	CORE_DBG_DIV_SHIFT	= 8,
+	CORE_DBG_DIV_MASK	= 0x03 << CORE_DBG_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT	= 7,
+	CORE_CLK_PLL_SEL_MASK	= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL	= 0,
+	CORE_CLK_PLL_SEL_GPLL,
+	CORE_DIV_CON_SHIFT	= 0,
+	CORE_DIV_CON_MASK	= 0x0f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL14_CON */
+	PERI_PLL_SEL_SHIFT	=15,
+	PERI_PLL_SEL_MASK	= 3 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_GPLL		= 0,
+	PERI_PLL_CPLL,
+	PERI_HCLK_DIV_SHIFT	= 8,
+	PERI_HCLK_DIV_MASK	= 0x1f << PERI_HCLK_DIV_SHIFT,
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+
+	/* CRU_CLKSEL20_CON */
+	EMMC_PLL_SHIFT		= 14,
+	EMMC_PLL_MASK		= 3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_GPLL		= 0,
+	EMMC_SEL_CPLL,
+	EMMC_SEL_NPLL,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT		= 0,
+	EMMC_DIV_MASK		= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLKSEL21_CON */
+	EMMC_CLK_SEL_SHIFT	= 15,
+	EMMC_CLK_SEL_MASK	= 1 << EMMC_CLK_SEL_SHIFT,
+	EMMC_CLK_SEL_EMMC	= 0,
+	EMMC_CLK_SEL_EMMC_DIV50,
+	EMMC_DIV50_SHIFT	= 0,
+	EMMC_DIV50_MASK		= 0xff << EMMC_DIV_SHIFT,
+
+	/* CRU_CLKSEL22_CON */
+	GMAC_PLL_SEL_SHIFT	= 14,
+	GMAC_PLL_SEL_MASK	= 3 << GMAC_PLL_SEL_SHIFT,
+	GMAC_PLL_SEL_GPLL	= 0,
+	GMAC_PLL_SEL_CPLL,
+	GMAC_PLL_SEL_NPLL,
+	CLK_GMAC_DIV_SHIFT	= 8,
+	CLK_GMAC_DIV_MASK	= 0x1f << CLK_GMAC_DIV_SHIFT,
+	SFC_PLL_SEL_SHIFT	= 7,
+	SFC_PLL_SEL_MASK	= 1 << SFC_PLL_SEL_SHIFT,
+	SFC_DIV_CON_SHIFT	= 0,
+	SFC_DIV_CON_MASK	= 0x7f,
+
+	/* CRU_CLK_SEL23_CON */
+	BUS_PLL_SEL_SHIFT	=15,
+	BUS_PLL_SEL_MASK	= 3 << BUS_PLL_SEL_SHIFT,
+	BUS_PLL_SEL_GPLL	= 0,
+	BUS_PLL_SEL_CPLL,
+	BUS_ACLK_DIV_SHIFT	= 8,
+	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+	RMII_CLK_SEL_SHIFT	= 7,
+	RMII_CLK_SEL_MASK	= 1 << RMII_CLK_SEL_SHIFT,
+	RMII_CLK_SEL_10M	= 0,
+	RMII_CLK_SEL_100M,
+	RMII_EXTCLK_SEL_SHIFT	= 6,
+	RMII_EXTCLK_SEL_MASK	= 1 << RMII_EXTCLK_SEL_SHIFT,
+	RMII_EXTCLK_SEL_INT	= 0,
+	RMII_EXTCLK_SEL_EXT,
+	PCLK_GMAC_DIV_SHIFT	= 0,
+	PCLK_GMAC_DIV_MASK	= 0x0f << PCLK_GMAC_DIV_SHIFT,
+
+	/* CRU_CLK_SEL24_CON */
+	BUS_PCLK_DIV_SHIFT	= 8,
+	BUS_PCLK_DIV_MASK	= 3 << BUS_PCLK_DIV_SHIFT,
+	BUS_HCLK_DIV_SHIFT	= 0,
+	BUS_HCLK_DIV_MASK	= 0x1f << BUS_HCLK_DIV_SHIFT,
+
+	/* CRU_CLK_SEL24_CON */
+	UART2_PLL_SEL_SHIFT	= 14,
+	UART2_PLL_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
+	UART2_PLL_SEL_GPLL	= 0,
+	UART2_PLL_SEL_24M,
+	UART2_PLL_SEL_480M,
+	UART2_PLL_SEL_NPLL,
+	UART2_DIV_CON_SHIFT	= 0,
+	UART2_DIV_CON_MASK	= 0x1f << UART2_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL25_CON */
+	UART2_CLK_SEL_SHIFT	= 14,
+	UART2_CLK_SEL_MASK	= 3 << UART2_PLL_SEL_SHIFT,
+	UART2_CLK_SEL_UART2	= 0,
+	UART2_CLK_SEL_UART2_NP5,
+	UART2_CLK_SEL_UART2_FRAC,
+	UART2_DIVNP5_SHIFT	= 0,
+	UART2_DIVNP5_MASK	= 0x1f << UART2_DIVNP5_SHIFT,
+
+	/* CRU_PMU_MODE */
+	GPLL_MODE_SHIFT		= 0,
+	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
+	
+};
+#endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index c662de1230..62d318cade 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -4,6 +4,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-$(CONFIG_ROCKCHIP_PX30) += clk_px30.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
new file mode 100644
index 0000000000..89b18a2f8e
--- /dev/null
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -0,0 +1,577 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <bitfield.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/px30-cru.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 3200U * 1000000,
+	VCO_MIN_HZ	= 800 * 1000000,
+	OUTPUT_MAX_HZ	= 3200U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)    ((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
+static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 2, 1);
+
+static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1);
+static const struct pll_div apll_600_cfg = PLL_DIVISORS(600 * MHz, 1, 3, 1);
+
+static const struct pll_div *apll_cfgs[] = {
+	[APLL_816_MHZ] = &apll_816_cfg,
+	[APLL_600_MHZ] = &apll_600_cfg,
+};
+
+/*
+ *  the div restructions of pll in integer mode, these are defined in
+ *  * CRU_*PLL_CON0 or PMUCRU_*PLL_CON0
+ */
+#define PLL_DIV_MIN	16
+#define PLL_DIV_MAX	3200
+
+/*
+ * How to calculate the PLL(from TRM V0.3 Part 1 Page 63):
+ * Formulas also embedded within the Fractional PLL Verilog model:
+ * If DSMPD = 1 (DSM is disabled, "integer mode")
+ * FOUTVCO = FREF / REFDIV * FBDIV
+ * FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2
+ * Where:
+ * FOUTVCO = Fractional PLL non-divided output frequency
+ * FOUTPOSTDIV = Fractional PLL divided output frequency
+ *               (output of second post divider)
+ * FREF = Fractional PLL input reference frequency, (the OSC_HZ 24MHz input)
+ * REFDIV = Fractional PLL input reference clock divider
+ * FBDIV = Integer value programmed into feedback divide
+ *
+ */
+static void rkclk_set_pll(void *pll_base, const struct pll_div *div)
+{
+	struct px30_pll *pll = (struct px30_pll *)pll_base;
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+		udelay(1);
+
+	return;
+}
+
+static void rkclk_init(struct px30_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
+		     PLLMUX_FROM_XIN24M << APLL_MODE_SHIFT);
+	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
+		     PLLMUX_FROM_XIN24M << GPLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(&cru->pll[0] , &apll_816_cfg);
+	rkclk_set_pll(&cru->gpll, &gpll_init_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	rk_clrsetreg(&cru->clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK |
+		     CORE_ACLK_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
+	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     BUS_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_PLL_SEL_GPLL << BUS_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->clksel_con[24],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	hclk_div = GPLL_HZ / PERI_HCLK_HZ - 1;
+
+	rk_clrsetreg(&cru->clksel_con[14],
+		     PERI_PLL_SEL_MASK |
+		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->mode, APLL_MODE_MASK,
+		     PLLMUX_FROM_PLL << APLL_MODE_SHIFT);
+	rk_clrsetreg(&cru->pmu_mode, GPLL_MODE_MASK,
+		     PLLMUX_FROM_PLL << GPLL_MODE_SHIFT);
+}
+
+static ulong px30_i2c_get_clk(struct px30_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		break;
+	case SCLK_I2C1:
+		break;
+	case SCLK_I2C2:
+		break;
+	case SCLK_I2C3:
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_i2c_set_clk(struct px30_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 127);
+
+	switch (clk_id) {
+	case SCLK_I2C0:
+		break;
+	case SCLK_I2C1:
+		break;
+	case SCLK_I2C2:
+		break;
+	case SCLK_I2C3:
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(GPLL_HZ, src_clk_div);
+}
+
+static ulong px30_mmc_get_clk(struct px30_cru *cru, uint clk_id)
+{
+	u32 div, con, con_id;
+
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 16;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 20;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	con = readl(&cru->clksel_con[con_id]);
+	div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+
+	if ((con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT
+	    == EMMC_SEL_24M)
+		return DIV_TO_RATE(OSC_HZ, div) / 2;
+	else
+		return DIV_TO_RATE(GPLL_HZ, div) / 2;
+
+}
+
+static ulong px30_mmc_set_clk(struct px30_cru *cru,
+				ulong clk_id, ulong set_rate)
+{
+	int src_clk_div;
+	u32 con_id;
+
+	printf("%s %d %d\n", __func__, clk_id, set_rate);
+	switch (clk_id) {
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con_id = 16;
+		break;
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+		con_id = 20;
+		break;
+	default:
+		return -EINVAL;
+	}
+	/* Select clk_sdmmc/emmc source from GPLL by default */
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate);
+
+	if (src_clk_div > 127) {
+		/* use 24MHz source for 400KHz clock */
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, set_rate);
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_24M << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	} else {
+		rk_clrsetreg(&cru->clksel_con[con_id],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     EMMC_SEL_GPLL << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+	}
+	rk_clrsetreg(&cru->clksel_con[con_id +1], EMMC_CLK_SEL_MASK,
+		     EMMC_CLK_SEL_EMMC);
+
+	return px30_mmc_get_clk(cru, clk_id);
+}
+
+static ulong px30_pwm_get_clk(struct px30_cru *cru)
+{
+	u32 div, con;
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_pwm_set_clk(struct px30_cru *cru, uint hz)
+{
+	u32 div = GPLL_HZ / hz;
+
+	return DIV_TO_RATE(GPLL_HZ, div);
+}
+
+static ulong px30_saradc_get_clk(struct px30_cru *cru)
+{
+	u32 div, val;
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong px30_saradc_set_clk(struct px30_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+
+	return px30_saradc_get_clk(cru);
+}
+
+static ulong px30_clk_get_rate(struct clk *clk)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong rate = 0;
+
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+		rate = px30_mmc_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		rate = px30_i2c_get_clk(priv->cru, clk->id);
+		break;
+	case SCLK_PWM0:
+		rate = px30_pwm_get_clk(priv->cru);
+		break;
+	case SCLK_SARADC:
+		rate = px30_saradc_get_clk(priv->cru);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return rate;
+}
+
+static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong ret = 0;
+
+	printf("%s %d %d\n", __func__, clk->id, rate);
+	switch (clk->id) {
+	case 0 ... 15:
+		return 0;
+	case HCLK_SDMMC:
+	case HCLK_EMMC:
+	case SCLK_SDMMC:
+	case SCLK_EMMC:
+		ret = px30_mmc_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_I2C0:
+	case SCLK_I2C1:
+	case SCLK_I2C2:
+	case SCLK_I2C3:
+		ret = px30_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_PWM0:
+		ret = px30_pwm_set_clk(priv->cru, rate);
+		break;
+	case SCLK_SARADC:
+		ret = px30_saradc_set_clk(priv->cru, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	printf("%s %d\n", __func__, ret);
+	return ret;
+}
+
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rockchip_mmc_get_phase(struct clk *clk)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = px30_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->emmc_con[1]);
+	else
+		raw_value = readl(&cru->sdmmc_con[1]);
+
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct px30_clk_priv *priv = dev_get_priv(clk->dev);
+	struct px30_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = px30_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->emmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->sdmmc_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rockchip_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int px30_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int px30_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static struct clk_ops px30_clk_ops = {
+	.get_rate = px30_clk_get_rate,
+	.set_rate = px30_clk_set_rate,
+	.get_phase	= px30_clk_get_phase,
+	.set_phase	= px30_clk_set_phase,
+};
+
+static int px30_clk_probe(struct udevice *dev)
+{
+	struct px30_clk_priv *priv = dev_get_priv(dev);
+
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int px30_clk_ofdata_to_platdata(struct udevice *dev)
+{
+	struct px30_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct px30_cru *)devfdt_get_addr(dev);
+
+	return 0;
+}
+
+static int px30_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct px30_cru,
+						    glb_srst_fst);
+		priv->glb_srst_snd_value = offsetof(struct px30_cru,
+						    glb_srst_snd);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct px30_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id px30_clk_ids[] = {
+	{ .compatible = "rockchip,px30-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_px30_cru) = {
+	.name		= "rockchip_px30_cru",
+	.id		= UCLASS_CLK,
+	.of_match	= px30_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct px30_clk_priv),
+	.ofdata_to_platdata = px30_clk_ofdata_to_platdata,
+	.ops		= &px30_clk_ops,
+	.bind		= px30_clk_bind,
+	.probe		= px30_clk_probe,
+};

commit d14f7e1ef9967e7b1e8b70125c0d2eb27fe5fc06
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 15:45:51 2018 +0800

    rockchip: updata the style of reporting sdram cap
    
    updata the style of reporting sdram capacity to uboot
    
    Change-Id: I6a652f233d8d26e842398edcc184cbbe89099401
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 8a1d7cd8a3..44cf33359e 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <ram.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/grf_rv1108.h>
 
@@ -32,3 +34,23 @@ void board_debug_uart_init(void)
 #endif /*CONFIG_SPL_BUILD*/
 }
 
+int dram_init(void)
+{
+	struct rv1108_grf *grf = (void *)GRF_BASE;
+
+	gd->ram_size = rockchip_sdram_size((phys_addr_t)&grf->os_reg2);
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	size_t max_size = min((unsigned long)(gd->ram_size +
+			      CONFIG_SYS_SDRAM_BASE), gd->ram_top);
+
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
+
+	return 0;
+}
+
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c
index 3538f72046..f497615d9f 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -3,44 +3,3 @@
  * Authors: Andy Yan <andy.yan@rock-chips.com>
  * SPDX-License-Identifier:     GPL-2.0+
  */
-
-#include <common.h>
-#include <asm/io.h>
-#include <fdtdec.h>
-#include <asm/arch/grf_rv1108.h>
-#include <asm/arch/hardware.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int mach_cpu_init(void)
-{
-	int node;
-	struct rv1108_grf *grf;
-
-	node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
-	grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
-
-	/*evb board use UART2 m0 for debug*/
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D2_MASK | GPIO2D1_MASK,
-		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
-		     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
-	rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK);
-
-	return 0;
-}
-
-int dram_init(void)
-{
-	gd->ram_size = 0x8000000;
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = 0x60000000;
-	gd->bd->bi_dram[0].size = 0x8000000;
-
-	return 0;
-}

commit 52f7b21d4bf4e380d25ecb170591495f0f6f01b3
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 15:40:55 2018 +0800

    rockchip: Add RV1108 SPL support
    
    add rv1108 spl support so we can load u-boot from SPL
    
    Change-Id: I9d36cd590a22d26a46dd84bc3ee0c761048f7b01
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 9e55d01bd0..7328ba467e 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -214,6 +214,8 @@ config ROCKCHIP_RK3399
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
+	select SUPPORT_SPL
+	select SPL
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.
diff --git a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
index 968c356447..f65225a661 100644
--- a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
@@ -12,8 +12,12 @@
 
 int rockchip_get_clk(struct udevice **devp)
 {
+#ifndef CONFIG_SPL_BUILD
 	return uclass_get_device_by_driver(UCLASS_CLK,
 			DM_GET_DRIVER(clk_rv1108), devp);
+#else
+	return -1;
+#endif
 }
 
 void *rockchip_get_cru(void)
diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 3b6b21d4f9..8a1d7cd8a3 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -1,7 +1,34 @@
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rv1108.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE		0x10300000
+
+void board_debug_uart_init(void)
+{
+#ifdef CONFIG_SPL_BUILD
+	struct rv1108_grf *grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0x10230000)
+	rk_clrsetreg(&grf->gpio3a_iomux,	/* UART0 */
+		     GPIO3A6_MASK | GPIO3A5_MASK,
+		     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
+		     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
+#else
+	rk_clrsetreg(&grf->gpio2d_iomux,	/* UART2 */
+		     GPIO2D2_MASK | GPIO2D1_MASK,
+		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
+		     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
+#endif
+#endif /*CONFIG_SPL_BUILD*/
+}
+
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index b1528dfd4e..cb7459e80e 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -40,6 +40,7 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
+#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
 int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
@@ -66,6 +67,7 @@ int dram_init_banksize(void)
 
 	return 0;
 }
+#endif
 
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
@@ -107,6 +109,7 @@ size_t rockchip_sdram_size(phys_addr_t reg)
 	return (size_t)size_mb << 20;
 }
 
+#if defined(CONFIG_SPL_FRAMEWORK) || !defined(CONFIG_SPL_OF_PLATDATA)
 int dram_init(void)
 {
 	struct ram_info ram;
@@ -129,6 +132,7 @@ int dram_init(void)
 
 	return 0;
 }
+#endif
 
 ulong board_get_usable_ram_top(ulong total_size)
 {
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index cc12a2afe3..c9f91efeee 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -10,6 +10,7 @@
 #include <ram.h>
 #include <spl.h>
 #include <asm/arch/bootrom.h>
+#include <asm/arch-rockchip/sys_proto.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 1df6d46d98..fe77072827 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -1,10 +1,18 @@
 CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TARGET_EVB_RV1108=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -19,6 +27,8 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_OF_PLATDATA=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -37,12 +47,15 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
@@ -58,4 +71,5 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x110a
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 065ecc8193..4f3f7a0434 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -14,11 +14,20 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
+#define SDRAM_MAX_SIZE			0x80000000
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+/* SPL support */
+#define CONFIG_SPL_STACK		0x10080700
+#define CONFIG_SPL_TEXT_BASE		0x10080800
+#define CONFIG_SPL_MAX_SIZE		0x1700
+
+/* BSS setup */
+#define CONFIG_SPL_BSS_MAX_SIZE		0x100
+
 #define CONFIG_ROCKUSB_G_DNL_PID	0x110A
 
 #define CONFIG_BOUNCE_BUFFER

commit 95b95808a8fc64259adb9b191663720244e58101
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 14:44:59 2018 +0800

    rockchip: add rv1108 sdram driver
    
    add rv1108 sdram driver so we can set up sdram in SPL
    
    Change-Id: Iecc6e896921b68ec97bf7d890a61a4ff75d6876b
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index ad2dc96467..f7b8c13d0f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -1,8 +1,9 @@
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0
  */
+
 #ifndef _ASM_ARCH_CRU_RV1108_H
 #define _ASM_ARCH_CRU_RV1108_H
 
@@ -56,61 +57,129 @@ struct pll_div {
 
 enum {
 	/* PLL CON0 */
-	FBDIV_MASK		= 0xfff,
-	FBDIV_SHIFT		= 0,
+	FBDIV_MASK			= 0xfff,
+	FBDIV_SHIFT			= 0,
 
 	/* PLL CON1 */
-	POSTDIV2_SHIFT          = 12,
-	POSTDIV2_MASK		= 7 << POSTDIV2_SHIFT,
-	POSTDIV1_SHIFT          = 8,
-	POSTDIV1_MASK		= 7 << POSTDIV1_SHIFT,
-	REFDIV_MASK		= 0x3f,
-	REFDIV_SHIFT		= 0,
+	POSTDIV2_SHIFT			= 12,
+	POSTDIV2_MASK			= 7 << POSTDIV2_SHIFT,
+	POSTDIV1_SHIFT			= 8,
+	POSTDIV1_MASK			= 7 << POSTDIV1_SHIFT,
+	REFDIV_MASK			= 0x3f,
+	REFDIV_SHIFT			= 0,
 
 	/* PLL CON2 */
-	LOCK_STA_SHIFT          = 31,
-	LOCK_STA_MASK		= 1 << LOCK_STA_SHIFT,
-	FRACDIV_MASK		= 0xffffff,
-	FRACDIV_SHIFT		= 0,
+	LOCK_STA_SHIFT			= 31,
+	LOCK_STA_MASK			= 1 << LOCK_STA_SHIFT,
+	FRACDIV_MASK			= 0xffffff,
+	FRACDIV_SHIFT			= 0,
 
 	/* PLL CON3 */
-	WORK_MODE_SHIFT         = 8,
-	WORK_MODE_MASK		= 1 << WORK_MODE_SHIFT,
-	WORK_MODE_SLOW		= 0,
-	WORK_MODE_NORMAL	= 1,
-	DSMPD_SHIFT             = 3,
-	DSMPD_MASK		= 1 << DSMPD_SHIFT,
+	WORK_MODE_SHIFT			= 8,
+	WORK_MODE_MASK			= 1 << WORK_MODE_SHIFT,
+	WORK_MODE_SLOW			= 0,
+	WORK_MODE_NORMAL		= 1,
+	DSMPD_SHIFT			= 3,
+	DSMPD_MASK			= 1 << DSMPD_SHIFT,
+	INTEGER_MODE			= 1,
+	GLOBAL_POWER_DOWN_SHIFT		= 0,
+	GLOBAL_POWER_DOWN_MASK		= 1 << GLOBAL_POWER_DOWN_SHIFT,
+	GLOBAL_POWER_DOWN		= 1,
+	GLOBAL_POWER_UP			= 0,
 
 	/* CLKSEL0_CON */
-	CORE_PLL_SEL_SHIFT	= 8,
-	CORE_PLL_SEL_MASK	= 3 << CORE_PLL_SEL_SHIFT,
-	CORE_PLL_SEL_APLL	= 0,
-	CORE_PLL_SEL_GPLL	= 1,
-	CORE_PLL_SEL_DPLL	= 2,
-	CORE_CLK_DIV_SHIFT	= 0,
-	CORE_CLK_DIV_MASK	= 0x1f << CORE_CLK_DIV_SHIFT,
+	CORE_PLL_SEL_SHIFT		= 8,
+	CORE_PLL_SEL_MASK		= 3 << CORE_PLL_SEL_SHIFT,
+	CORE_PLL_SEL_APLL		= 0,
+	CORE_PLL_SEL_GPLL		= 1,
+	CORE_PLL_SEL_DPLL		= 2,
+	CORE_CLK_DIV_SHIFT		= 0,
+	CORE_CLK_DIV_MASK		= 0x1f << CORE_CLK_DIV_SHIFT,
+
+	/* CLKSEL_CON1 */
+	PCLK_DBG_DIV_CON_SHIFT		= 4,
+	PCLK_DBG_DIV_CON_MASK		= 0xf << PCLK_DBG_DIV_CON_SHIFT,
+	ACLK_CORE_DIV_CON_SHIFT		= 0,
+	ACLK_CORE_DIV_CON_MASK		= 7 << ACLK_CORE_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON2 */
+	ACLK_BUS_PLL_SEL_SHIFT		= 8,
+	ACLK_BUS_PLL_SEL_MASK		= 3 << ACLK_BUS_PLL_SEL_SHIFT,
+	ACLK_BUS_PLL_SEL_GPLL		= 0,
+	ACLK_BUS_PLL_SEL_APLL		= 1,
+	ACLK_BUS_PLL_SEL_DPLL		= 2,
+	ACLK_BUS_DIV_CON_SHIFT		= 0,
+	ACLK_BUS_DIV_CON_MASK		= 0x1f << ACLK_BUS_DIV_CON_SHIFT,
+
+	/* CLKSEL_CON3 */
+	PCLK_BUS_DIV_CON_SHIFT		= 8,
+	PCLK_BUS_DIV_CON_MASK		= 0x1f << PCLK_BUS_DIV_CON_SHIFT,
+	HCLK_BUS_DIV_CON_SHIFT		= 0,
+	HCLK_BUS_DIV_CON_MASK		= 0x1f,
+
+	/* CLKSEL_CON4 */
+	CLK_DDR_PLL_SEL_SHIFT		= 8,
+	CLK_DDR_PLL_SEL_MASK		= 0x3 << CLK_DDR_PLL_SEL_SHIFT,
+	CLK_DDR_DIV_CON_SHIFT		= 0,
+	CLK_DDR_DIV_CON_MASK		= 0x3 << CLK_DDR_DIV_CON_SHIFT,
 
 	/* CLKSEL_CON22 */
-	CLK_SARADC_DIV_CON_SHIFT= 0,
-	CLK_SARADC_DIV_CON_MASK	= GENMASK(9, 0),
-	CLK_SARADC_DIV_CON_WIDTH= 10,
+	CLK_SARADC_DIV_CON_SHIFT	= 0,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH	= 10,
+
+	/* CLKSEL_CON23 */
+	ACLK_PERI_PLL_SEL_SHIFT		= 15,
+	ACLK_PERI_PLL_SEL_MASK		= 1 << ACLK_PERI_PLL_SEL_SHIFT,
+	ACLK_PERI_PLL_SEL_GPLL		= 0,
+	ACLK_PERI_PLL_SEL_DPLL		= 1,
+	PCLK_PERI_DIV_CON_SHIFT		= 10,
+	PCLK_PERI_DIV_CON_MASK		= 0x1f << PCLK_PERI_DIV_CON_SHIFT,
+	HCLK_PERI_DIV_CON_SHIFT		= 5,
+	HCLK_PERI_DIV_CON_MASK		= 0x1f << HCLK_PERI_DIV_CON_SHIFT,
+	ACLK_PERI_DIV_CON_SHIFT		= 0,
+	ACLK_PERI_DIV_CON_MASK		= 0x1f,
 
 	/* CLKSEL24_CON */
-	MAC_PLL_SEL_SHIFT	= 12,
-	MAC_PLL_SEL_MASK	= 1 << MAC_PLL_SEL_SHIFT,
-	MAC_PLL_SEL_APLL	= 0,
-	MAC_PLL_SEL_GPLL	= 1,
-	RMII_EXTCLK_SEL_SHIFT   = 8,
-	RMII_EXTCLK_SEL_MASK	= 1 << RMII_EXTCLK_SEL_SHIFT,
-	MAC_CLK_DIV_MASK	= 0x1f,
-	MAC_CLK_DIV_SHIFT	= 0,
+	MAC_PLL_SEL_SHIFT		= 12,
+	MAC_PLL_SEL_MASK		= 1 << MAC_PLL_SEL_SHIFT,
+	MAC_PLL_SEL_APLL		= 0,
+	MAC_PLL_SEL_GPLL		= 1,
+	RMII_EXTCLK_SEL_SHIFT		= 8,
+	RMII_EXTCLK_SEL_MASK		= 1 << RMII_EXTCLK_SEL_SHIFT,
+	MAC_CLK_DIV_MASK		= 0x1f,
+	MAC_CLK_DIV_SHIFT		= 0,
 
 	/* CLKSEL27_CON */
-	SFC_PLL_SEL_SHIFT	= 7,
-	SFC_PLL_SEL_MASK	= 1 << SFC_PLL_SEL_SHIFT,
-	SFC_PLL_SEL_DPLL	= 0,
-	SFC_PLL_SEL_GPLL	= 1,
-	SFC_CLK_DIV_SHIFT	= 0,
-	SFC_CLK_DIV_MASK	= 0x3f << SFC_CLK_DIV_SHIFT,
+	SFC_PLL_SEL_SHIFT		= 7,
+	SFC_PLL_SEL_MASK		= 1 << SFC_PLL_SEL_SHIFT,
+	SFC_PLL_SEL_DPLL		= 0,
+	SFC_PLL_SEL_GPLL		= 1,
+	SFC_CLK_DIV_SHIFT		= 0,
+	SFC_CLK_DIV_MASK		= 0x3f << SFC_CLK_DIV_SHIFT,
+
+	/* SOFTRST1_CON*/
+	DDRPHY_SRSTN_CLKDIV_REQ_SHIFT	= 0,
+	DDRPHY_SRSTN_CLKDIV_REQ		= 1,
+	DDRPHY_SRSTN_CLKDIV_DIS		= 0,
+	DDRPHY_SRSTN_CLKDIV_REQ_MASK	= 1 << DDRPHY_SRSTN_CLKDIV_REQ_SHIFT,
+	DDRPHY_SRSTN_REQ_SHIFT		= 1,
+	DDRPHY_SRSTN_REQ		= 1,
+	DDRPHY_SRSTN_DIS		= 0,
+	DDRPHY_SRSTN_REQ_MASK		= 1 << DDRPHY_SRSTN_REQ_SHIFT,
+	DDRPHY_PSRSTN_REQ_SHIFT		= 2,
+	DDRPHY_PSRSTN_REQ		= 1,
+	DDRPHY_PSRSTN_DIS		= 0,
+	DDRPHY_PSRSTN_REQ_MASK		= 1 << DDRPHY_PSRSTN_REQ_SHIFT,
+
+	/* SOFTRST2_CON*/
+	DDRUPCTL_PSRSTN_REQ_SHIFT	= 0,
+	DDRUPCTL_PSRSTN_REQ		= 1,
+	DDRUPCTL_PSRSTN_DIS		= 0,
+	DDRUPCTL_PSRSTN_REQ_MASK	= 1 << DDRUPCTL_PSRSTN_REQ_SHIFT,
+	DDRUPCTL_NSRSTN_REQ_SHIFT	= 1,
+	DDRUPCTL_NSRSTN_REQ		= 1,
+	DDRUPCTL_NSRSTN_DIS		= 0,
+	DDRUPCTL_NSRSTN_REQ_MASK	= 1 << DDRUPCTL_NSRSTN_REQ_SHIFT,
 };
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
index c816a5bf8f..a518b05727 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
@@ -1,8 +1,9 @@
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
  */
+
 #ifndef _ASM_ARCH_GRF_RV1108_H
 #define _ASM_ARCH_GRF_RV1108_H
 
@@ -108,6 +109,43 @@ struct rv1108_grf {
 };
 check_member(rv1108_grf, chip_id, 0xf90);
 
+struct rv1108_pmu_grf {
+	u32 gpioa_iomux;
+	u32 gpiob_iomux;
+	u32 gpioc_iomux;
+	u32 reserved1;
+	u32 gpioa_p;
+	u32 gpiob_p;
+	u32 gpioc_p;
+	u32 reserved2;
+	u32 gpioa_e;
+	u32 gpiob_e;
+	u32 gpioc_e;
+	u32 reserved3;
+	u32 gpioa_smt;
+	u32 gpiob_smt;
+	u32 gpioc_smt;
+	u32 reserved4;
+	u32 gpio0a_sr;
+	u32 gpio0b_sr;
+	u32 gpio0c_sr;
+	u32 reserved5[(0x100-0x4c)/4];
+	u32 soc_con[4];
+	u32 reserved6[(0x180-0x110)/4];
+	u32 dll_con[2];
+	u32 reserved7[2];
+	u32 dll_status[2];
+	u32 reserved8[(0x200-0x198)/4];
+	u32 os_reg[4];
+	u32 reserved9[(0x300-0x210)/4];
+	u32 fast_boot_addr;
+	u32 reserved10[(0x380-0x304)/4];
+	u32 a7_jtag_mask;
+	u32 reserved11[(0x388-0x384)/4];
+	u32 ceva_jtag_mask;
+};
+check_member(rv1108_pmu_grf, ceva_jtag_mask, 0x388);
+
 /* GRF_GPIO1B_IOMUX */
 enum {
 	GPIO1B7_SHIFT		= 14,
@@ -211,7 +249,7 @@ enum {
 	GPIO1C1_I2S_SDI_M0,
 	GPIO1C1_PWM4,
 
-	GPIO1C0_SHIFT           = 0,
+	GPIO1C0_SHIFT		= 0,
 	GPIO1C0_MASK		= 3,
 	GPIO1C0_GPIO		= 0,
 	GPIO1C0_LCDC_D11,
@@ -285,48 +323,48 @@ enum {
 	GPIO2A6_FLASH_D6,
 	GPIO2A6_EMMC_D6,
 
-	GPIO2A5_SHIFT           = 10,
-	GPIO2A5_MASK            = 3 << GPIO2A5_SHIFT,
-	GPIO2A5_GPIO            = 0,
+	GPIO2A5_SHIFT		= 10,
+	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
+	GPIO2A5_GPIO		= 0,
 	GPIO2A5_FLASH_D5,
 	GPIO2A5_EMMC_D5,
 
-	GPIO2A4_SHIFT           = 8,
-	GPIO2A4_MASK            = 3 << GPIO2A4_SHIFT,
-	GPIO2A4_GPIO            = 0,
+	GPIO2A4_SHIFT		= 8,
+	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
+	GPIO2A4_GPIO		= 0,
 	GPIO2A4_FLASH_D4,
 	GPIO2A4_EMMC_D4,
 
-	GPIO2A3_SHIFT           = 6,
-	GPIO2A3_MASK            = 3 << GPIO2A3_SHIFT,
-	GPIO2A3_GPIO            = 0,
+	GPIO2A3_SHIFT		= 6,
+	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
+	GPIO2A3_GPIO		= 0,
 	GPIO2A3_FLASH_D3,
 	GPIO2A3_EMMC_D3,
 	GPIO2A3_SFC_HOLD_IO3,
 
-	GPIO2A2_SHIFT           = 4,
-	GPIO2A2_MASK            = 3 << GPIO2A2_SHIFT,
-	GPIO2A2_GPIO            = 0,
+	GPIO2A2_SHIFT		= 4,
+	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
+	GPIO2A2_GPIO		= 0,
 	GPIO2A2_FLASH_D2,
 	GPIO2A2_EMMC_D2,
 	GPIO2A2_SFC_WP_IO2,
 
-	GPIO2A1_SHIFT           = 2,
-	GPIO2A1_MASK            = 3 << GPIO2A1_SHIFT,
-	GPIO2A1_GPIO            = 0,
+	GPIO2A1_SHIFT		= 2,
+	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
+	GPIO2A1_GPIO		= 0,
 	GPIO2A1_FLASH_D1,
 	GPIO2A1_EMMC_D1,
 	GPIO2A1_SFC_SO_IO1,
 
-	GPIO2A0_SHIFT           = 0,
-	GPIO2A0_MASK            = 3 << GPIO2A0_SHIFT,
-	GPIO2A0_GPIO            = 0,
+	GPIO2A0_SHIFT		= 0,
+	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
+	GPIO2A0_GPIO		= 0,
 	GPIO2A0_FLASH_D0,
 	GPIO2A0_EMMC_D0,
 	GPIO2A0_SFC_SI_IO0,
 };
 
-/* GRF_GPIO2D_IOMUX */
+/* GRF_GPIO2B_IOMUX */
 enum {
 	GPIO2B7_SHIFT		= 14,
 	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
@@ -334,41 +372,41 @@ enum {
 	GPIO2B7_FLASH_CS1,
 	GPIO2B7_SFC_CLK,
 
-	GPIO2B6_SHIFT           = 12,
-	GPIO2B6_MASK            = 1 << GPIO2B6_SHIFT,
-	GPIO2B6_GPIO            = 0,
+	GPIO2B6_SHIFT		= 12,
+	GPIO2B6_MASK		= 1 << GPIO2B6_SHIFT,
+	GPIO2B6_GPIO		= 0,
 	GPIO2B6_EMMC_CLKO,
 
-	GPIO2B5_SHIFT           = 10,
-	GPIO2B5_MASK            = 1 << GPIO2B5_SHIFT,
-	GPIO2B5_GPIO            = 0,
+	GPIO2B5_SHIFT		= 10,
+	GPIO2B5_MASK		= 1 << GPIO2B5_SHIFT,
+	GPIO2B5_GPIO		= 0,
 	GPIO2B5_FLASH_CS0,
 
-	GPIO2B4_SHIFT           = 8,
-	GPIO2B4_MASK            = 3 << GPIO2B4_SHIFT,
-	GPIO2B4_GPIO            = 0,
+	GPIO2B4_SHIFT		= 8,
+	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
+	GPIO2B4_GPIO		= 0,
 	GPIO2B4_FLASH_RDY,
 	GPIO2B4_EMMC_CMD,
 	GPIO2B4_SFC_CSN0,
 
-	GPIO2B3_SHIFT           = 6,
-	GPIO2B3_MASK            = 1 << GPIO2B3_SHIFT,
-	GPIO2B3_GPIO            = 0,
+	GPIO2B3_SHIFT		= 6,
+	GPIO2B3_MASK		= 1 << GPIO2B3_SHIFT,
+	GPIO2B3_GPIO		= 0,
 	GPIO2B3_FLASH_RDN,
 
-	GPIO2B2_SHIFT           = 4,
-	GPIO2B2_MASK            = 1 << GPIO2B2_SHIFT,
-	GPIO2B2_GPIO            = 0,
+	GPIO2B2_SHIFT		= 4,
+	GPIO2B2_MASK		= 1 << GPIO2B2_SHIFT,
+	GPIO2B2_GPIO		= 0,
 	GPIO2B2_FLASH_WRN,
 
-	GPIO2B1_SHIFT           = 2,
-	GPIO2B1_MASK            = 1 << GPIO2B1_SHIFT,
-	GPIO2B1_GPIO            = 0,
+	GPIO2B1_SHIFT		= 2,
+	GPIO2B1_MASK		= 1 << GPIO2B1_SHIFT,
+	GPIO2B1_GPIO		= 0,
 	GPIO2B1_FLASH_CLE,
 
-	GPIO2B0_SHIFT           = 0,
-	GPIO2B0_MASK            = 1 << GPIO2B0_SHIFT,
-	GPIO2B0_GPIO            = 0,
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= 1 << GPIO2B0_SHIFT,
+	GPIO2B0_GPIO		= 0,
 	GPIO2B0_FLASH_ALE,
 };
 
@@ -427,12 +465,12 @@ enum {
 	GPIO3A7_GPIO		= 0,
 
 	GPIO3A6_SHIFT		= 12,
-	GPIO3A6_MASK		= 1 << GPIO3A6_SHIFT,
+	GPIO3A6_MASK		= 3 << GPIO3A6_SHIFT,
 	GPIO3A6_GPIO		= 0,
 	GPIO3A6_UART1_SOUT,
 
 	GPIO3A5_SHIFT		= 10,
-	GPIO3A5_MASK		= 1 << GPIO3A5_SHIFT,
+	GPIO3A5_MASK		= 3 << GPIO3A5_SHIFT,
 	GPIO3A5_GPIO		= 0,
 	GPIO3A5_UART1_SIN,
 
@@ -506,4 +544,20 @@ enum {
 	GPIO3C0_GPIO		= 0,
 	GPIO3C0_SDMMC_D3,
 };
+
+enum {
+	/* GRF_SOC_CON0 */
+	MSCH_MAINDDR3_SHIFT		= 4,
+	MSCH_MAINDDR3			= 1 << MSCH_MAINDDR3_SHIFT,
+	MSCH_MAINPARTIALPOP_SHIFT	= 5,
+	MSCH_MAINPARTIALPOP		= 1 << MSCH_MAINPARTIALPOP_SHIFT,
+	MSCH_MAINPARTIALPOP_MASK	= 1 << MSCH_MAINPARTIALPOP_SHIFT,
+};
+
+enum {
+	/* PMU_GRF_SOC_CON0 */
+	DDRPHY_BUFFEREN_CORE_SHIFT	= 2,
+	DDRPHY_BUFFEREN_CORE_MASK	= 1 << DDRPHY_BUFFEREN_CORE_SHIFT,
+	DDRPHY_BUFFEREN_CORE_EN		= 1 << DDRPHY_BUFFEREN_CORE_SHIFT,
+};
 #endif
diff --git a/arch/arm/include/asm/arch-rockchip/pmu_rv1108.h b/arch/arm/include/asm/arch-rockchip/pmu_rv1108.h
new file mode 100644
index 0000000000..f04392b0cf
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/pmu_rv1108.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef _ASM_ARCH_PMU_RV1108_H
+#define _ASM_ARCH_PMU_RV1108_H
+
+struct rv1108_pmu {
+	u32 wakeup_cfg[3];
+	u32 reserved0[2];
+	u32 pwrmode_core_con;
+	u32 pwrmode_common_con;
+	u32 sft_con;
+	u32 reserved1[7];
+	u32 bus_idle_req;
+	u32 bus_idle_st;
+	u32 reserved2;
+	u32 osc_cnt;
+	u32 plllock_cnt;
+	u32 reserved3;
+	u32 stable_cnt;
+	u32 reserved4;
+	u32 wakeup_rst_clr_cnt;
+	u32 ddr_sref_st;
+	u32 sys_reg[4];
+	u32 timeout_cnt;
+};
+
+check_member(rv1108_pmu, timeout_cnt, 0x0074);
+
+enum { /* PMU_SFT_CON */
+	DDR_IO_RET_SHIFT		= 11,
+	DDR_IO_RET_EN			= 1 << DDR_IO_RET_SHIFT,
+};
+
+#endif
+
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
new file mode 100644
index 0000000000..96591750ca
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RV1108_H
+#define _ASM_ARCH_SDRAM_RV1108_H
+
+#include <common.h>
+#include <ram.h>
+#include <asm/arch/cru_rv1108.h>
+#include <asm/arch/grf_rv1108.h>
+#include <asm/arch/pmu_rv1108.h>
+#include <asm/arch/sdram_rv1108_pctl_phy.h>
+
+#define SR_IDLE			3
+#define PD_IDLE			64
+#define SDRAM_BEGIN_ADDR	0x60000000
+#define SDRAM_END_ADDR		0x80000000
+#define PATTERN			(0x5aa5f00f)
+
+
+struct rv1108_service_msch {
+	u32 id_coreid;
+	u32 id_revisionid;
+	u32 ddrconf;
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 reserveds1[8];
+	u32 activate;
+	u32 devtodev;
+};
+
+enum {
+	/*memory scheduler ddrtiming*/
+	BWRATIO_HALF_BW				= 0x80000000,
+	BWRATIO_HALF_BW_DIS			= 0x0,
+};
+
+struct dram_info {
+	struct rv1108_cru *cru;
+	struct rv1108_grf *grf;
+	struct rv1108_pmu *pmu;
+	struct rv1108_pmu_grf *pmu_grf;
+	struct ddr_phy *phy;
+	struct ddr_pctl *pctl;
+	struct rv1108_service_msch *service_msch;
+	struct ram_info info;
+};
+
+struct sdram_params {
+	struct ddr_config ddr_config;
+	struct pll_div dpll_init_cfg;
+	struct ddr_timing ddr_timing_t;
+};
+
+void enable_ddr_io_ret(struct dram_info *priv);
+void rkdclk_init(struct dram_info *priv,
+		 struct sdram_params *params_priv);
+void phy_pctrl_reset_cru(struct dram_info *priv);
+void set_bw_grf(struct dram_info *priv);
+void pctl_cfg_grf(struct dram_info *priv);
+int rv1108_sdram_init(struct dram_info *sdram_priv,
+		      struct sdram_params *params_priv);
+
+#endif
diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index 3617ac2c60..7b7e336bda 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,5 +7,8 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
+#ifndef CONFIG_SPL_FRAMEWORK
+void sdram_init(void);
+#endif
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 071abb7725..5db731b60b 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,7 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
-obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o
+obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o sdram_rv1108.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rv1108.c b/drivers/ram/rockchip/sdram_rv1108.c
new file mode 100644
index 0000000000..f068604d3b
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rv1108.c
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <dm/root.h>
+#include <dt-structs.h>
+#include <regmap.h>
+#include <asm/io.h>
+#include <asm/types.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram_rv1108.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/sdram_common.h>
+
+struct dram_info info;
+
+struct rockchip_dmc_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rv1108_dmc dtplat;
+#else
+	struct sdram_params params;
+#endif
+	struct regmap *map;
+};
+
+void enable_ddr_io_ret(struct dram_info *priv)
+{
+	writel(DDR_IO_RET_EN, &priv->pmu->sft_con);
+	rk_clrsetreg(&priv->pmu_grf->soc_con[0],
+		     DDRPHY_BUFFEREN_CORE_MASK,
+		     DDRPHY_BUFFEREN_CORE_EN);
+}
+
+void rkdclk_init(struct dram_info *priv,
+		 struct sdram_params *params_priv)
+{
+	rk_clrsetreg(&priv->cru->pll[1].con3, WORK_MODE_MASK,
+		     WORK_MODE_SLOW << WORK_MODE_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, GLOBAL_POWER_DOWN_MASK,
+		     GLOBAL_POWER_DOWN << GLOBAL_POWER_DOWN_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, DSMPD_MASK,
+		     INTEGER_MODE << DSMPD_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con0, FBDIV_MASK,
+		     params_priv->dpll_init_cfg.fbdiv << FBDIV_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con1,
+		     POSTDIV2_MASK | POSTDIV1_MASK | REFDIV_MASK,
+		     params_priv->dpll_init_cfg.postdiv2 << POSTDIV2_SHIFT |
+		     params_priv->dpll_init_cfg.postdiv1 << POSTDIV1_SHIFT |
+		     params_priv->dpll_init_cfg.refdiv << REFDIV_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, GLOBAL_POWER_DOWN_MASK,
+		     GLOBAL_POWER_UP << GLOBAL_POWER_DOWN_SHIFT);
+	while (!(readl(&priv->cru->pll[1].con2) & (1u << LOCK_STA_SHIFT)))
+		udelay(1);
+
+	rk_clrsetreg(&priv->cru->clksel_con[4], CLK_DDR_PLL_SEL_MASK |
+		     CLK_DDR_DIV_CON_MASK, 0 << CLK_DDR_PLL_SEL_SHIFT |
+		     0 << CLK_DDR_DIV_CON_SHIFT);
+	rk_clrsetreg(&priv->cru->pll[1].con3, WORK_MODE_MASK,
+		     WORK_MODE_NORMAL << WORK_MODE_SHIFT);
+}
+
+void phy_pctrl_reset_cru(struct dram_info *priv)
+{
+	rk_clrsetreg(&priv->cru->softrst_con[2], DDRUPCTL_PSRSTN_REQ_MASK |
+		     DDRUPCTL_NSRSTN_REQ_MASK,
+		     DDRUPCTL_PSRSTN_REQ << DDRUPCTL_PSRSTN_REQ_SHIFT |
+		     DDRUPCTL_NSRSTN_REQ << DDRUPCTL_NSRSTN_REQ_SHIFT);
+	rk_clrsetreg(&priv->cru->softrst_con[1],
+		     DDRPHY_SRSTN_CLKDIV_REQ_MASK | DDRPHY_SRSTN_REQ_MASK |
+		     DDRPHY_PSRSTN_REQ_MASK,
+		     DDRPHY_SRSTN_CLKDIV_REQ << DDRPHY_SRSTN_CLKDIV_REQ_SHIFT |
+		     DDRPHY_SRSTN_REQ << DDRPHY_SRSTN_REQ_SHIFT |
+		     DDRPHY_PSRSTN_REQ << DDRPHY_PSRSTN_REQ_SHIFT);
+
+	udelay(10);
+
+	rk_clrsetreg(&priv->cru->softrst_con[1],
+		     DDRPHY_SRSTN_CLKDIV_REQ_MASK | DDRPHY_SRSTN_REQ_MASK |
+		     DDRPHY_PSRSTN_REQ_MASK,
+		     DDRPHY_SRSTN_CLKDIV_DIS << DDRPHY_SRSTN_CLKDIV_REQ_SHIFT |
+		     DDRPHY_PSRSTN_DIS << DDRPHY_PSRSTN_REQ_SHIFT |
+		     DDRPHY_SRSTN_DIS << DDRPHY_SRSTN_REQ_SHIFT);
+	udelay(10);
+
+	rk_clrsetreg(&priv->cru->softrst_con[2], DDRUPCTL_PSRSTN_REQ_MASK |
+		     DDRUPCTL_NSRSTN_REQ_MASK,
+		     DDRUPCTL_PSRSTN_DIS << DDRUPCTL_PSRSTN_REQ_SHIFT |
+		     DDRUPCTL_NSRSTN_DIS << DDRUPCTL_NSRSTN_REQ_SHIFT);
+	udelay(10);
+}
+
+void set_bw_grf(struct dram_info *priv)
+{
+	rk_clrsetreg(&priv->grf->soc_con0,
+		     MSCH_MAINPARTIALPOP_MASK,
+		     MSCH_MAINPARTIALPOP);
+}
+
+void pctl_cfg_grf(struct dram_info *priv)
+{
+	writel(RK_SETBITS(MSCH_MAINDDR3 | MSCH_MAINPARTIALPOP),
+	       &priv->grf->soc_con0);
+}
+
+void *get_base_addr(unsigned int *reg, unsigned int offset)
+{
+	u32 p = *(reg + 2 * offset);
+
+	return (void *)p;
+}
+
+void sdram_init(void)
+{
+	int ret;
+	struct dram_info *sdram_priv = &info;
+	struct driver_info *info =
+		ll_entry_start(struct driver_info, driver_info);
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rv1108_dmc *dtplat = (void *)info->platdata;
+	struct sdram_params *params = (void *)dtplat->rockchip_sdram_params;
+
+	sdram_priv->pctl = get_base_addr((void *)dtplat->reg, 0);
+	sdram_priv->phy = get_base_addr((void *)dtplat->reg, 1);
+	sdram_priv->service_msch = get_base_addr((void *)dtplat->reg, 2);
+	sdram_priv->grf = get_base_addr((void *)dtplat->reg, 3);
+	sdram_priv->pmu_grf = get_base_addr((void *)dtplat->reg, 4);
+	sdram_priv->cru = get_base_addr((void *)dtplat->reg, 5);
+	sdram_priv->pmu = get_base_addr((void *)dtplat->reg, 6);
+#else
+	struct sdram_params *params = (void *)info->platdata;
+#endif
+	ret = rv1108_sdram_init(sdram_priv, params);
+	if (ret)
+		debug("rv1108_sdram_init() fail!");
+}

commit 24b30f4ffb1dcbcf600b79699a1d2650afcdde5f
Author: Zhihuan He <huan.he@rock-chips.com>
Date:   Thu Feb 1 14:34:09 2018 +0800

    rockchip: add rv1108 pctl and phy
    
    add rv1108 pctl and phy code
    
    Change-Id: I744b1d47e4e9ac611caeb7457f0ece57d649cdda
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
new file mode 100644
index 0000000000..d8bc6883ac
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rv1108_pctl_phy.h
@@ -0,0 +1,551 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RV1108_PCTL_PHY_H
+#define _ASM_ARCH_SDRAM_RV1108_PCTL_PHY_H
+
+#include <common.h>
+
+struct ddr_pctl {
+	u32 scfg;
+	u32 sctl;
+	u32 stat;
+	u32 intrstat;
+	u32 reserved0[(0x40-0x10)/4];
+	u32 mcmd;
+	u32 powctl;
+	u32 powstat;
+	u32 cmdtstat;
+	u32 cmdtstaten;
+	u32 reserved1[(0x60-0x54)/4];
+	u32 mrrcfg0;
+	u32 mrrstat0;
+	u32 mrrstat1;
+	u32 reserved2[(0x7c-0x6c)/4];
+	u32 mcfg1;
+	u32 mcfg;
+	u32 ppcfg;
+	u32 mstat;
+	u32 lpddr2zqcfg;
+	u32 reserved3;
+	u32 dtupdes;
+	u32 dtuna;
+	u32 dtune;
+	u32 dtuprd0;
+	u32 dtuprd1;
+	u32 dtuprd2;
+	u32 dtuprd3;
+	u32 dtuawdt;
+	u32 reserved4[(0xc0-0xb4)/4];
+	u32 togcnt1u;
+	u32 tinit;
+	u32 trsth;
+	u32 togcnt100n;
+	u32 trefi;
+	u32 tmrd;
+	u32 trfc;
+	u32 trp;
+	u32 trtw;
+	u32 tal;
+	u32 tcl;
+	u32 tcwl;
+	u32 tras;
+	u32 trc;
+	u32 trcd;
+	u32 trrd;
+	u32 trtp;
+	u32 twr;
+	u32 twtr;
+	u32 texsr;
+	u32 txp;
+	u32 txpdll;
+	u32 tzqcs;
+	u32 tzqcsi;
+	u32 tdqs;
+	u32 tcksre;
+	u32 tcksrx;
+	u32 tcke;
+	u32 tmod;
+	u32 trstl;
+	u32 tzqcl;
+	u32 tmrr;
+	u32 tckesr;
+	u32 tdpd;
+	u32 trefi_mem_ddr3;
+	u32 reserved5[(0x180-0x14c)/4];
+	u32 ecccfg;
+	u32 ecctst;
+	u32 eccclr;
+	u32 ecclog;
+	u32 reserved6[(0x200-0x190)/4];
+	u32 dtuwactl;
+	u32 dturactl;
+	u32 dtucfg;
+	u32 dtuectl;
+	u32 dtuwd0;
+	u32 dtuwd1;
+	u32 dtuwd2;
+	u32 dtuwd3;
+	u32 dtuwdm;
+	u32 dturd0;
+	u32 dturd1;
+	u32 dturd2;
+	u32 dturd3;
+	u32 dtulfsrwd;
+	u32 dtulfsrrd;
+	u32 dtueaf;
+	u32 dfitctrldelay;
+	u32 dfiodtcfg;
+	u32 dfiodtcfg1;
+	u32 dfiodtrankmap;
+	u32 dfitphywrdata;
+	u32 dfitphywrlat;
+	u32 dfitphywrdatalat;
+	u32 reserved7;
+	u32 dfitrddataen;
+	u32 dfitphyrdlat;
+	u32 reserved8[(0x270-0x268)/4];
+	u32 dfitphyupdtype0;
+	u32 dfitphyupdtype1;
+	u32 dfitphyupdtype2;
+	u32 dfitphyupdtype3;
+	u32 dfitctrlupdmin;
+	u32 dfitctrlupdmax;
+	u32 dfitctrlupddly;
+	u32 reserved9;
+	u32 dfiupdcfg;
+	u32 dfitrefmski;
+	u32 dfitctrlupdi;
+	u32 reserved10[(0x2ac-0x29c)/4];
+	u32 dfitrcfg0;
+	u32 dfitrstat0;
+	u32 dfitrwrlvlen;
+	u32 dfitrrdlvlen;
+	u32 dfitrrdlvlgateen;
+	u32 dfiststat0;
+	u32 dfistcfg0;
+	u32 dfistcfg1;
+	u32 reserved11;
+	u32 dfitdramclken;
+	u32 dfitdramclkdis;
+	u32 dfistcfg2;
+	u32 dfistparclr;
+	u32 dfistparlog;
+	u32 reserved12[(0x2f0-0x2e4)/4];
+	u32 dfilpcfg0;
+	u32 reserved13[(0x300-0x2f4)/4];
+	u32 dfitrwrlvlresp0;
+	u32 dfitrwrlvlresp1;
+	u32 dfitrwrlvlresp2;
+	u32 dfitrrdlvlresp0;
+	u32 dfitrrdlvlresp1;
+	u32 dfitrrdlvlresp2;
+	u32 dfitrwrlvldelay0;
+	u32 dfitrwrlvldelay1;
+	u32 dfitrwrlvldelay2;
+	u32 dfitrrdlvldelay0;
+	u32 dfitrrdlvldelay1;
+	u32 dfitrrdlvldelay2;
+	u32 dfitrrdlvlgatedelay0;
+	u32 dfitrrdlvlgatedelay1;
+	u32 dfitrrdlvlgatedelay2;
+	u32 dfitrcmd;
+	u32 reserved14[(0x3f8-0x340)/4];
+	u32 ipvr;
+	u32 iptr;
+};
+check_member(ddr_pctl, iptr, 0x03fc);
+
+struct ddr_phy {
+	u32 phy_reg0;
+	u32 phy_reg1;
+	u32 phy_reg2;
+	u32 phy_reg3;
+	u32 reserved0;
+	u32 phy_reg5;
+	u32 phy_reg6;
+	u32 reserveds1[(0x24-0x1c)/4];
+	u32 phy_reg9;
+	u32 reserveds2[(0x2c-0x28)/4];
+	u32 phy_regb;
+	u32 phy_regc;
+	u32 reserveds3[(0x44-0x34)/4];
+	u32 phy_reg11;
+	u32 phy_reg12;
+	u32 phy_reg13;
+	u32 phy_reg14;
+	u32 reserved4;
+	u32 phy_reg16;
+	u32 phy_reg17;
+	u32 phy_reg18;
+	u32 reserveds5[(0x80-0x64)/4];
+	u32 phy_reg20;
+	u32 phy_reg21;
+	u32 reserveds6[(0x98-0x88)/4];
+	u32 phy_reg26;
+	u32 phy_reg27;
+	u32 phy_reg28;
+	u32 reserveds7[(0xac-0xa4)/4];
+	u32 phy_reg2b;
+	u32 reserveds8[(0xb8-0xb0)/4];
+	u32 phy_reg2e;
+	u32 phy_reg2f;
+	u32 phy_reg30;
+	u32 phy_reg31;
+	u32 reserveds9[(0xd8-0xc8)/4];
+	u32 phy_reg36;
+	u32 phy_reg37;
+	u32 phy_reg38;
+	u32 reserveds10[(0xec-0xe4)/4];
+	u32 phy_reg3b;
+	u32 reserveds11[(0xf8-0xf0)/4];
+	u32 phy_reg3e;
+	u32 phy_reg3f;
+	u32 reserveds12[(0x1c0-0x100)/4];
+	u32 phy_reg_skew_cs0data[(0x218-0x1c0)/4];
+	u32 reserveds13[(0x28c-0x218)/4];
+	u32 phy_vref;
+	u32 phy_regdll;/*dll bypass switch reg,0x290*/
+	u32 reserveds14[(0x2c0-0x294)/4];
+	u32 phy_reg_ca_skew[(0x2f8-0x2c0)/4];
+	u32 reserveds15[(0x300-0x2f8)/4];
+	u32 phy_reg_skew_cs1data[(0x358-0x300)/4];
+	u32 reserveds16[(0x3c0-0x358)/4];
+	u32 phy_regf0;
+	u32 phy_regf1;
+	u32 reserveds17[(0x3e8-0x3c8)/4];
+	u32 phy_regfa;
+	u32 phy_regfb;
+	u32 phy_regfc;
+	u32 reserved18;
+	u32 reserved19;
+	u32 phy_regff;
+};
+check_member(ddr_phy, phy_regff, 0x03fc);
+
+struct ddr_timing {
+	u32 freq;
+	struct pctl_timing {
+		u32 togcnt1u;
+		u32 tinit;
+		u32 trsth;
+		u32 togcnt100n;
+		u32 trefi;
+		u32 tmrd;
+		u32 trfc;
+		u32 trp;
+		u32 trtw;
+		u32 tal;
+		u32 tcl;
+		u32 tcwl;
+		u32 tras;
+		u32 trc;
+		u32 trcd;
+		u32 trrd;
+		u32 trtp;
+		u32 twr;
+		u32 twtr;
+		u32 texsr;
+		u32 txp;
+		u32 txpdll;
+		u32 tzqcs;
+		u32 tzqcsi;
+		u32 tdqs;
+		u32 tcksre;
+		u32 tcksrx;
+		u32 tcke;
+		u32 tmod;
+		u32 trstl;
+		u32 tzqcl;
+		u32 tmrr;
+		u32 tckesr;
+		u32 tdpd;
+		u32 trefi_mem_ddr3;
+	} pctl_timing;
+	struct phy_timing {
+		u32 mr[4];
+		u32 bl;
+		u32 cl_al;
+	} phy_timing;
+	u32 noc_timing;
+	u32 readlatency;
+	u32 activate;
+	u32 devtodev;
+};
+
+struct ddr_config {
+	/*
+	 * 000: lpddr
+	 * 001: ddr
+	 * 010: ddr2
+	 * 011: ddr3
+	 * 100: lpddr2-s2
+	 * 101: lpddr2-s4
+	 * 110: lpddr3
+	 */
+	u32 ddr_type;
+	u32 chn_cnt;
+	u32 rank;
+	u32 cs0_row;
+	u32 cs1_row;
+
+	/* 2: 4bank, 3: 8bank */
+	u32 bank;
+	u32 col;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	u32 dbw;
+	/* bw(0: 8bit, 1: 16bit, 2: 32bit) */
+	u32 bw;
+};
+
+enum {
+	PHY_LOW_SPEED_MHZ		= 400,
+	/* PHY_REG0 */
+	CHN_ENABLE_SHIFT		= 4,
+	DQ_16BIT_EN_MASK		= 3 << 4,
+	DQ_16BIT_EN			= 3 << 4,
+	DQ_32BIT_EN_MASK		= 0xf << 4,
+	DQ_32BIT_EN			= 0xf << 4,
+	RESET_DIGITAL_CORE_SHIFT	= 3,
+	RESET_DIGITAL_CORE_MASK		= 1 << RESET_DIGITAL_CORE_SHIFT,
+	RESET_DIGITAL_CORE_ACT		= 0,
+	RESET_DIGITAL_CORE_DIS		= 1,
+	RESET_ANALOG_LOGIC_SHIFT	= 2,
+	RESET_ANALOG_LOGIC_MASK		= 1 << RESET_ANALOG_LOGIC_SHIFT,
+	RESET_ANALOG_LOGIC_ACT		= 0,
+	RESET_ANALOG_LOGIC_DIS		= 1,
+
+	/* PHY_REG1 */
+	MEMORY_SELECT_DDR3		= 0,
+	PHY_BL_8			= 1 << 2,
+
+	/* PHY_REG2 */
+	DQS_GATE_TRAINING_SEL_CS0	= 1 << 5,
+	DQS_GATE_TRAINING_ACT		= 1,
+	DQS_GATE_TRAINING_DIS		= 0,
+
+	/* PHY_REG12 */
+	CMD_PRCOMP_SHIFT		= 3,
+	CMD_PRCOMP_MASK			= 0x1f << CMD_PRCOMP_SHIFT,
+
+	/* DDRPHY_REG13 */
+	CMD_DLL_BYPASS_SHIFT		= 4,
+	CMD_DLL_BYPASS			= 1,
+	CMD_DLL_BYPASS_MASK		= 1,
+	CMD_DLL_BYPASS_DISABLE		= 0,
+
+	/* DDRPHY_REG14 */
+	CK_DLL_BYPASS_SHIFT		= 3,
+	CK_DLL_BYPASS			= 1,
+	CK_DLL_BYPASS_DISABLE		= 0,
+
+	/* DDRPHY_REG26 */
+	LEFT_CHN_A_DQ_DLL_SHIFT		= 4,
+	LEFT_CHN_A_DQ_DLL_BYPASS	= 1,
+	LEFT_CHN_A_DQ_DLL_BYPASS_MASK	= 1,
+	LEFT_CHN_A_DQ_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG27 */
+	LEFT_CHN_A_DQS_DLL_SHIFT	= 3,
+	LEFT_CHN_A_DQS_DLL_BYPASS	= 1,
+	LEFT_CHN_A_DQS_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG28 */
+	LEFT_CHN_A_READ_DQS_45_DELAY	= 2,
+
+	/* DDRPHY_REG36 */
+	RIGHT_CHN_A_DQ_DLL_SHIFT	= 4,
+	RIGHT_CHN_A_DQ_DLL_BYPASS	= 1,
+	RIGHT_CHN_A_DQ_DLL_BYPASS_MASK	= 1,
+	RIGHT_CHN_A_DQ_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG37 */
+	RIGHT_CHN_A_DQS_DLL_SHIFT	= 3,
+	RIGHT_CHN_A_DQS_DLL_BYPASS	= 1,
+	RIGHT_CHN_A_DQS_DLL_BYPASS_DIS	= 0,
+
+	/* DDRPHY_REG38 */
+	RIGHT_CHN_A_READ_DQS_45_DELAY	= 2,
+
+	/* PHY_REGDLL */
+	RIGHT_CHN_A_TX_DQ_BYPASS_SHIFT	= 2,
+	RIGHT_CHN_A_TX_DQ_BYPASS_SET	= 1,
+	RIGHT_CHN_A_TX_DQ_BYPASS_DIS	= 0,
+	LEFT_CHN_A_TX_DQ_BYPASS_SHIFT	= 1,
+	LEFT_CHN_A_TX_DQ_BYPASS_SET	= 1,
+	LEFT_CHN_A_TX_DQ_BYPASS_DIS	= 0,
+	CMD_CK_DLL_BYPASS_SHIFT		= 0,
+	CMD_CK_DLL_BYPASS_SET		= 1,
+	CMD_CK_DLL_BYPASS_DIS		= 0,
+
+	/* PHY_REGFF */
+	CHN_A_TRAINING_DONE_MASK	= 3,
+	CHN_A_HIGH_8BIT_TRAINING_DONE	= 1 << 1,
+	CHN_A_LOW_8BIT_TRAINING_DONE	= 1,
+};
+
+/*PCTL*/
+enum {
+	/* PCTL_SCTL */
+	INIT_STATE				= 0,
+	CFG_STATE				= 1,
+	GO_STATE				= 2,
+	SLEEP_STATE				= 3,
+	WAKEUP_STATE				= 4,
+
+	/* PCTL_STAT*/
+	PCTL_CTL_STAT_MASK			= 0x7,
+	INIT_MEM				= 0,
+	CONFIG					= 1,
+	CONFIG_REQ				= 2,
+	ACCESS					= 3,
+	ACCESS_REQ				= 4,
+	LOW_POWER				= 5,
+	LOW_POWER_ENTRY_REQ			= 6,
+	LOW_POWER_EXIT_REQ			= 7,
+
+	/* PCTL_MCMD */
+	START_CMD				= 0x80000000,
+	RANK_SEL_SHIFT				= 20,
+	RANK_SEL_CS0				= 1,
+	RANK_SEL_CS1				= 2,
+	RANK_SEL_CS0_CS1			= 3,
+	BANK_ADDR_SHIFT				= 17,
+	BANK_ADDR_MASK				= 0x7,
+	CMD_ADDR_SHIFT				= 4,
+	CMD_ADDR_MASK				= 0x1fff,
+	DDR3_DLL_RESET				= 1 << 8,
+	DESELECT_CMD				= 0x0,
+	PREA_CMD				= 0x1,
+	REF_CMD					= 0x2,
+	MRS_CMD					= 0x3,
+	ZQCS_CMD				= 0x4,
+	ZQCL_CMD				= 0x5,
+	RSTL_CMD				= 0x6,
+	MPR_CMD					= 0x8,
+	DFICTRLUPD_CMD				= 0xa,
+	MR0					= 0x0,
+	MR1					= 0x1,
+	MR2					= 0x2,
+	MR3					= 0x3,
+
+	/* PCTL_POWCTL */
+	POWER_UP_START				= 1,
+	POWER_UP_START_MASK			= 1,
+
+	/* PCTL_POWSTAT */
+	POWER_UP_DONE				= 1,
+
+	/*PCTL_PPCFG*/
+	PPMEM_EN_MASK				= 1,
+	PPMEM_EN				= 1,
+	PPMEM_DIS				= 0,
+	/* PCTL_TREFI */
+	UPD_REF					= 0x80000000,
+
+	/* PCTL_DFISTCFG0 */
+	DFI_DATA_BYTE_DISABLE_EN_SHIFT		= 2,
+	DFI_DATA_BYTE_DISABLE_EN		= 1,
+	DFI_FREQ_RATIO_EN_SHIFT			= 1,
+	DFI_FREQ_RATIO_EN			= 1,
+	DFI_INIT_START_SHIFT			= 0,
+	DFI_INIT_START_EN			= 1,
+
+	/* PCTL_DFISTCFG1 */
+	DFI_DRAM_CLK_DISABLE_EN_DPD_SHIFT	= 1,
+	DFI_DRAM_CLK_DISABLE_EN_DPD		= 1,
+	DFI_DRAM_CLK_DISABLE_EN_SHIFT		= 0,
+	DFI_DRAM_CLK_DISABLE_EN			= 1,
+
+	/* PCTL_DFISTCFG2 */
+	PARITY_EN_SHIFT				= 1,
+	PARITY_EN				= 1,
+	PARITY_INTR_EN_SHIFT			= 0,
+	PARITY_INTR_EN				= 1,
+
+	/* PCTL_DFILPCFG0 */
+	DFI_LP_EN_SR_SHIFT			= 8,
+	DFI_LP_EN_SR				= 1,
+	DFI_LP_WAKEUP_SR_SHIFT			= 12,
+	DFI_LP_WAKEUP_SR_32_CYCLES		= 1,
+	DFI_TLP_RESP_SHIFT			= 16,
+	DFI_TLP_RESP				= 5,
+
+	/* PCTL_DFITPHYUPDTYPE0 */
+	TPHYUPD_TYPE0				= 1,
+
+	/* PCTL_DFITPHYRDLAT */
+	TPHY_RDLAT				= 0xd,
+
+	/* PCTL_DFITPHYWRDATA */
+	TPHY_WRDATA				= 0x0,
+
+	/* PCTL_DFIUPDCFG */
+	DFI_PHYUPD_DISABLE			= 0 << 1,
+	DFI_CTRLUPD_DISABLE			= 0,
+
+	/* PCTL_DFIODTCFG */
+	RANK0_ODT_WRITE_SEL_SHIFT		= 3,
+	RANK0_ODT_WRITE_SEL			= 1,
+	RANK1_ODT_WRITE_SEL_SHIFT		= 11,
+	RANK1_ODT_WRITE_SEL			= 1,
+
+	/* PCTL_DFIODTCFG1 */
+	ODT_LEN_BL8_W_SHIFT			= 16,
+	ODT_LEN_BL8_W				= 7,
+
+	/* PCTL_MCFG */
+	MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS	= 0 << 24,
+	DDR3_EN					= 1 << 5,
+	MEM_BL_8				= 1,
+	TFAW_CFG_5_TDDR				= 1 << 18,
+	PD_EXIT_SLOW_EXIT_MODE			= 0 << 17,
+	PD_TYPE_ACT_PD				= 1 << 16,
+	PD_IDLE_DISABLE				= 0 << 8,
+	PD_IDLE_MASK				= 0xff << 8,
+	PD_IDLE_SHIFT				= 8,
+
+	/* PCTL_MCFG1 */
+	SR_IDLE_MASK				= 0xff,
+	HW_EXIT_IDLE_EN_SHIFT			= 31,
+	HW_EXIT_IDLE_EN_MASK			= 1 << HW_EXIT_IDLE_EN_SHIFT,
+	HW_EXIT_IDLE_EN				= 1 << HW_EXIT_IDLE_EN_SHIFT,
+
+	/* PCTL_SCFG */
+	HW_LOW_POWER_EN				= 1,
+};
+
+enum {
+	/* PHY_DDR3_RON_RTT */
+	PHY_RON_RTT_DISABLE			= 0,
+	PHY_RON_RTT_451OHM			= 1,
+	PHY_RON_RTT_225OHM			= 2,
+	PHY_RON_RTT_150OHM			= 3,
+	PHY_RON_RTT_112OHM			= 4,
+	PHY_RON_RTT_90OHM			= 5,
+	PHY_RON_RTT_75OHM			= 6,
+	PHY_RON_RTT_64OHM			= 7,
+
+	PHY_RON_RTT_56OHM			= 16,
+	PHY_RON_RTT_50OHM			= 17,
+	PHY_RON_RTT_45OHM			= 18,
+	PHY_RON_RTT_41OHM			= 19,
+	PHY_RON_RTT_37OHM			= 20,
+	PHY_RON_RTT_34OHM			= 21,
+	PHY_RON_RTT_33OHM			= 22,
+	PHY_RON_RTT_30OHM			= 23,
+
+	PHY_RON_RTT_28OHM			= 24,
+	PHY_RON_RTT_26OHM			= 25,
+	PHY_RON_RTT_25OHM			= 26,
+	PHY_RON_RTT_23OHM			= 27,
+	PHY_RON_RTT_22OHM			= 28,
+	PHY_RON_RTT_21OHM			= 29,
+	PHY_RON_RTT_20OHM			= 30,
+	PHY_RON_RTT_19OHM			= 31,
+};
+
+#endif
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 2cae3c6061..071abb7725 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RV1108) = sdram_rv1108_pctl_phy.o
 obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
new file mode 100644
index 0000000000..d5b6749251
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rv1108_pctl_phy.c
@@ -0,0 +1,467 @@
+/*
+ * Copyright (C) 2018 Rockchip Electronics Co., Ltd
+ * Author: Zhihuan He <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <dm/root.h>
+#include <dt-structs.h>
+#include <ram.h>
+#include <regmap.h>
+#include <asm/io.h>
+#include <asm/types.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram_rv1108_pctl_phy.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/sdram_common.h>
+
+#if defined(CONFIG_ROCKCHIP_RV1108)
+#include <asm/arch/sdram_rv1108.h>
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+#include <asm/arch/sdram_rk3308.h>
+#endif
+
+/*
+ * we can not fit the code to access the device tree in SPL
+ * (due to 6K SRAM size limits), so these are hard-coded
+ */
+
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+static void phy_pctrl_reset(struct dram_info *priv)
+{
+	phy_pctrl_reset_cru(priv);
+	clrsetbits_le32(&priv->phy->phy_reg0,
+			RESET_DIGITAL_CORE_MASK | RESET_ANALOG_LOGIC_MASK,
+			RESET_DIGITAL_CORE_ACT << RESET_DIGITAL_CORE_SHIFT |
+			RESET_ANALOG_LOGIC_ACT << RESET_ANALOG_LOGIC_SHIFT);
+	udelay(1);
+	clrsetbits_le32(&priv->phy->phy_reg0,
+			RESET_ANALOG_LOGIC_MASK,
+			RESET_ANALOG_LOGIC_DIS << RESET_ANALOG_LOGIC_SHIFT);
+	udelay(5);
+	clrsetbits_le32(&priv->phy->phy_reg0,
+			RESET_DIGITAL_CORE_MASK,
+			RESET_DIGITAL_CORE_DIS << RESET_DIGITAL_CORE_SHIFT);
+	udelay(1);
+}
+
+static void phy_dll_bypass_set(struct dram_info *priv, unsigned int freq)
+{
+	clrsetbits_le32(&priv->phy->phy_reg13, CMD_DLL_BYPASS_MASK,
+			CMD_DLL_BYPASS << CMD_DLL_BYPASS_SHIFT);
+
+	writel(CK_DLL_BYPASS_DISABLE << CK_DLL_BYPASS_SHIFT,
+	       &priv->phy->phy_reg14);
+
+	clrsetbits_le32(&priv->phy->phy_reg26, LEFT_CHN_A_DQ_DLL_BYPASS_MASK,
+			LEFT_CHN_A_DQ_DLL_BYPASS << LEFT_CHN_A_DQ_DLL_SHIFT);
+	writel(LEFT_CHN_A_DQS_DLL_BYPASS_DIS <<
+	       LEFT_CHN_A_DQS_DLL_SHIFT, &priv->phy->phy_reg27);
+
+	clrsetbits_le32(&priv->phy->phy_reg36, RIGHT_CHN_A_DQ_DLL_BYPASS_MASK,
+			RIGHT_CHN_A_DQ_DLL_BYPASS <<
+			RIGHT_CHN_A_DQ_DLL_SHIFT);
+	writel(RIGHT_CHN_A_DQS_DLL_BYPASS_DIS <<
+	       RIGHT_CHN_A_DQS_DLL_SHIFT, &priv->phy->phy_reg37);
+
+	if (freq <= PHY_LOW_SPEED_MHZ) {
+		writel(RIGHT_CHN_A_TX_DQ_BYPASS_SET <<
+		       RIGHT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       LEFT_CHN_A_TX_DQ_BYPASS_SET <<
+		       LEFT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       CMD_CK_DLL_BYPASS_SET << CMD_CK_DLL_BYPASS_SHIFT,
+		       &priv->phy->phy_regdll);
+	} else {
+		writel(RIGHT_CHN_A_TX_DQ_BYPASS_DIS <<
+		       RIGHT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       LEFT_CHN_A_TX_DQ_BYPASS_DIS <<
+		       LEFT_CHN_A_TX_DQ_BYPASS_SHIFT |
+		       CMD_CK_DLL_BYPASS_DIS << CMD_CK_DLL_BYPASS_SHIFT,
+				&priv->phy->phy_regdll);
+	}
+
+	/* 45 degree delay */
+	writel(LEFT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg28);
+	writel(RIGHT_CHN_A_READ_DQS_45_DELAY, &priv->phy->phy_reg38);
+}
+
+static void send_command(struct dram_info *priv,
+			 u32 rank, u32 cmd, u32 arg)
+{
+	writel((START_CMD | (rank << RANK_SEL_SHIFT) | arg | cmd),
+	       &priv->pctl->mcmd);
+	while (readl(&priv->pctl->mcmd) & START_CMD)
+		;
+}
+
+static void memory_init(struct dram_info *priv,
+			struct sdram_params *params_priv)
+{
+	send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
+	udelay(1);
+	send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
+
+	send_command(priv, RANK_SEL_CS0_CS1, DESELECT_CMD, 0);
+	udelay(1);
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR2 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[2] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR3 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[3] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR1 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[1] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+	send_command(priv, RANK_SEL_CS0_CS1, MRS_CMD,
+		     (MR0 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+		     (params_priv->ddr_timing_t.phy_timing.mr[0] &
+		     CMD_ADDR_MASK) << CMD_ADDR_SHIFT | DDR3_DLL_RESET);
+
+	send_command(priv, RANK_SEL_CS0_CS1, ZQCL_CMD, 0);
+}
+
+static void set_bw(struct dram_info *priv,
+		   struct sdram_params *params_priv)
+{
+	if (readl(&params_priv->ddr_config.bw) == 1) {
+		clrsetbits_le32(&priv->pctl->ppcfg, PPMEM_EN_MASK, PPMEM_EN);
+		clrsetbits_le32(&priv->phy->phy_reg0, DQ_16BIT_EN_MASK,
+				DQ_16BIT_EN);
+		set_bw_grf(priv);
+		clrsetbits_le32(&priv->service_msch->ddrtiming,
+				BWRATIO_HALF_BW, BWRATIO_HALF_BW);
+	}
+}
+
+static void move_to_config_state(struct dram_info *priv)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK)
+				!= ACCESS)
+				;
+			/*
+			 * If at low power state, need wakeup first, and then
+			 * enter the config, so fallthrough
+			 */
+		case ACCESS:
+		case INIT_MEM:
+			writel(CFG_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK)
+				!= CONFIG)
+				;
+			break;
+		case CONFIG:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void move_to_access_state(struct dram_info *priv)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&priv->pctl->stat) & PCTL_CTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) &
+				PCTL_CTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case INIT_MEM:
+			writel(CFG_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) &
+				PCTL_CTL_STAT_MASK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &priv->pctl->sctl);
+			while ((readl(&priv->pctl->stat) &
+				PCTL_CTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case ACCESS:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void pctl_cfg(struct dram_info *priv,
+		     struct sdram_params *params_priv)
+{
+	u32 reg;
+
+	/* DFI config */
+	writel(DFI_DATA_BYTE_DISABLE_EN << DFI_DATA_BYTE_DISABLE_EN_SHIFT |
+	       DFI_INIT_START_EN << DFI_INIT_START_SHIFT,
+	       &priv->pctl->dfistcfg0);
+	writel(DFI_DRAM_CLK_DISABLE_EN_DPD <<
+	       DFI_DRAM_CLK_DISABLE_EN_DPD_SHIFT |
+	       DFI_DRAM_CLK_DISABLE_EN << DFI_DRAM_CLK_DISABLE_EN_SHIFT,
+	       &priv->pctl->dfistcfg1);
+	writel(PARITY_EN << PARITY_EN_SHIFT |
+	       PARITY_INTR_EN << PARITY_INTR_EN_SHIFT, &priv->pctl->dfistcfg2);
+	writel(DFI_LP_EN_SR << DFI_LP_EN_SR_SHIFT |
+	       DFI_LP_WAKEUP_SR_32_CYCLES << DFI_LP_WAKEUP_SR_SHIFT |
+	       DFI_TLP_RESP << DFI_TLP_RESP_SHIFT,
+	       &priv->pctl->dfilpcfg0);
+
+	writel(TPHYUPD_TYPE0, &priv->pctl->dfitphyupdtype0);
+	writel(TPHY_RDLAT, &priv->pctl->dfitphyrdlat);
+	writel(TPHY_WRDATA, &priv->pctl->dfitphywrdata);
+
+	writel(DFI_PHYUPD_DISABLE | DFI_CTRLUPD_DISABLE,
+	       &priv->pctl->dfiupdcfg);
+
+	copy_to_reg(&priv->pctl->togcnt1u,
+		    &(params_priv->ddr_timing_t.pctl_timing.togcnt1u),
+		    sizeof(struct pctl_timing));
+
+	writel((RANK0_ODT_WRITE_SEL << RANK0_ODT_WRITE_SEL_SHIFT |
+	       RANK1_ODT_WRITE_SEL << RANK1_ODT_WRITE_SEL_SHIFT),
+	       &priv->pctl->dfiodtcfg);
+
+	writel(ODT_LEN_BL8_W << ODT_LEN_BL8_W_SHIFT,
+	       &priv->pctl->dfiodtcfg1);
+
+	reg = readl(&priv->pctl->tcl);
+	writel((reg - 1) / 2 - 1, &priv->pctl->dfitrddataen);
+	reg = readl(&priv->pctl->tcwl);
+	writel((reg - 1) / 2 - 1, &priv->pctl->dfitphywrlat);
+
+	writel(params_priv->ddr_timing_t.pctl_timing.trsth, &priv->pctl->trsth);
+	writel(MDDR_LPDDR23_CLOCK_STOP_IDLE_DIS | DDR3_EN | MEM_BL_8 |
+	       TFAW_CFG_5_TDDR | PD_EXIT_SLOW_EXIT_MODE |
+	       PD_TYPE_ACT_PD | PD_IDLE_DISABLE, &priv->pctl->mcfg);
+
+	pctl_cfg_grf(priv);
+	setbits_le32(&priv->pctl->scfg, HW_LOW_POWER_EN);
+}
+
+static void phy_cfg(struct dram_info *priv,
+		    struct sdram_params *params_priv)
+{
+	writel((readl(&priv->service_msch->ddrtiming) & BWRATIO_HALF_BW)|
+	       params_priv->ddr_timing_t.noc_timing,
+	       &priv->service_msch->ddrtiming);
+	writel(params_priv->ddr_timing_t.readlatency,
+	       &priv->service_msch->readlatency);
+	writel(params_priv->ddr_timing_t.activate,
+	       &priv->service_msch->activate);
+	writel(params_priv->ddr_timing_t.devtodev,
+	       &priv->service_msch->devtodev);
+
+	writel(MEMORY_SELECT_DDR3 | PHY_BL_8, &priv->phy->phy_reg1);
+
+	writel(params_priv->ddr_timing_t.phy_timing.cl_al,
+	       &priv->phy->phy_regb);
+	writel(params_priv->ddr_timing_t.pctl_timing.tcwl,
+	       &priv->phy->phy_regc);
+
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg11);
+	clrsetbits_le32(&priv->phy->phy_reg12, CMD_PRCOMP_MASK,
+			PHY_RON_RTT_34OHM << CMD_PRCOMP_SHIFT);
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg16);
+	writel(PHY_RON_RTT_45OHM, &priv->phy->phy_reg18);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg20);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg2f);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg30);
+	writel(PHY_RON_RTT_34OHM, &priv->phy->phy_reg3f);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg21);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg2e);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg31);
+	writel(PHY_RON_RTT_225OHM, &priv->phy->phy_reg3e);
+}
+
+static void dram_cfg_rbc(struct dram_info *priv,
+			 struct sdram_params *params_priv)
+{
+	int i = 0;
+
+	move_to_config_state(priv);
+#if defined(CONFIG_ROCKCHIP_RV1108)
+	if (params_priv->ddr_config.col == 10)
+		i = 2;
+	else
+		i = 3;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+
+#endif
+	writel(i, &priv->service_msch->ddrconf);
+	move_to_access_state(priv);
+}
+
+static void enable_low_power(struct dram_info *priv)
+{
+	move_to_config_state(priv);
+
+	clrsetbits_le32(&priv->pctl->mcfg, PD_IDLE_MASK,
+			PD_IDLE << PD_IDLE_SHIFT);
+	clrsetbits_le32(&priv->pctl->mcfg1, SR_IDLE_MASK | HW_EXIT_IDLE_EN_MASK,
+			SR_IDLE | HW_EXIT_IDLE_EN);
+
+	/* uPCTL in low_power status because of auto self-refreh */
+	writel(GO_STATE, &priv->pctl->sctl);
+}
+
+static void data_training(struct dram_info *priv)
+{
+	u32 value;
+	u32 tmp = 0;
+
+	/* disable auto refresh */
+	value = readl(&priv->pctl->trefi);
+	writel(UPD_REF, &priv->pctl->trefi);
+
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS,
+	       &priv->phy->phy_reg2);
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_ACT,
+	       &priv->phy->phy_reg2);
+
+	/* delay untill data training done */
+	while (tmp != (CHN_A_HIGH_8BIT_TRAINING_DONE |
+	       CHN_A_LOW_8BIT_TRAINING_DONE)) {
+		udelay(1);
+		tmp = (readl(&priv->phy->phy_regff) & CHN_A_TRAINING_DONE_MASK);
+	}
+
+	writel(DQS_GATE_TRAINING_SEL_CS0 | DQS_GATE_TRAINING_DIS,
+	       &priv->phy->phy_reg2);
+
+	send_command(priv, RANK_SEL_CS0_CS1, PREA_CMD, 0);
+
+	writel(value | UPD_REF, &priv->pctl->trefi);
+}
+
+static u32 sdram_detect(struct dram_info *priv,
+			struct sdram_params *params_priv)
+{
+	u32 row, col, row_max, col_max;
+	u32 test_addr;
+
+	move_to_config_state(priv);
+#if defined(CONFIG_ROCKCHIP_RV1108)
+	writel(1, &priv->service_msch->ddrconf);
+	col_max = 11;
+	row_max = 16;
+#elif defined(CONFIG_ROCKCHIP_RK3308)
+
+#endif
+	move_to_access_state(priv);
+
+	/* detect col */
+	for (col = col_max; col >= 10; col--) {
+		writel(0, SDRAM_BEGIN_ADDR);
+		test_addr = SDRAM_BEGIN_ADDR + (1u << (col +
+				params_priv->ddr_config.bw - 1u));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_BEGIN_ADDR) == 0))
+				break;
+	}
+	if (col <= 8)
+		goto cap_err;
+	params_priv->ddr_config.col = col;
+
+	/* detect row */
+	col = col_max;
+	for (row = row_max; row >= 12; row--) {
+		writel(0, SDRAM_BEGIN_ADDR);
+		test_addr = SDRAM_BEGIN_ADDR + (1u << (row +
+				params_priv->ddr_config.bank + col +
+				params_priv->ddr_config.bw - 1u));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_BEGIN_ADDR) == 0))
+			break;
+	}
+	if (row <= 11)
+		goto cap_err;
+	params_priv->ddr_config.cs0_row = row;
+	return 0;
+cap_err:
+	return 1;
+}
+
+static void sdram_all_config(struct dram_info *priv,
+			     struct sdram_params *params_priv)
+{
+	u32 os_reg = 0;
+	u32 cs1_row = 0;
+
+	if (params_priv->ddr_config.rank > 1)
+		cs1_row = params_priv->ddr_config.cs1_row - 13;
+
+	os_reg = params_priv->ddr_config.ddr_type << SYS_REG_DDRTYPE_SHIFT |
+		 params_priv->ddr_config.chn_cnt << SYS_REG_NUM_CH_SHIFT |
+		 (params_priv->ddr_config.rank - 1) << SYS_REG_RANK_SHIFT(0) |
+		 (params_priv->ddr_config.col - 9) << SYS_REG_COL_SHIFT(0) |
+		 (params_priv->ddr_config.bank == 3 ? 0 : 1) <<
+		 SYS_REG_BK_SHIFT(0) |
+		 (params_priv->ddr_config.cs0_row - 13) <<
+		 SYS_REG_CS0_ROW_SHIFT(0) |
+		 cs1_row << SYS_REG_CS1_ROW_SHIFT(0) |
+		 params_priv->ddr_config.bw << SYS_REG_BW_SHIFT(0) |
+		 params_priv->ddr_config.dbw << SYS_REG_DBW_SHIFT(0);
+
+	writel(os_reg, &priv->grf->os_reg2);
+}
+
+int rv1108_sdram_init(struct dram_info *sdram_priv,
+		      struct sdram_params *params_priv)
+{
+	/* pmu enable ddr io retention */
+	enable_ddr_io_ret(sdram_priv);
+	rkdclk_init(sdram_priv, params_priv);
+	phy_pctrl_reset(sdram_priv);
+	phy_dll_bypass_set(sdram_priv, params_priv->ddr_timing_t.freq);
+	pctl_cfg(sdram_priv, params_priv);
+	phy_cfg(sdram_priv, params_priv);
+
+	writel(POWER_UP_START, &sdram_priv->pctl->powctl);
+	while (!(readl(&sdram_priv->pctl->powstat) & POWER_UP_DONE))
+		;
+
+	memory_init(sdram_priv, params_priv);
+	move_to_config_state(sdram_priv);
+	set_bw(sdram_priv, params_priv);
+	data_training(sdram_priv);
+	move_to_access_state(sdram_priv);
+	if (sdram_detect(sdram_priv, params_priv)) {
+		while (1)
+			;
+	}
+	dram_cfg_rbc(sdram_priv, params_priv);
+	sdram_all_config(sdram_priv, params_priv);
+	enable_low_power(sdram_priv);
+
+	return 0;
+}

commit a36e90ea68fd408308ce581469d287a466716850
Author: Zhihuan He <huan.he@rockchip.com>
Date:   Thu Feb 1 11:19:50 2018 +0800

    rockchip: add rv1108 sdram dts
    
    add rv1108 sdram dts,and we can transmit params through dts.
    
    Change-Id: I7d5d1de720205d746db38f69a28e6f3eddc9058d
    Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index ed3ebf20cf..568e082a53 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rv1108.dtsi"
+#include "rv1108-sdram-ddr3-400.dtsi"
 
 / {
 	model = "Rockchip RV1108 Evaluation board";
diff --git a/arch/arm/dts/rv1108-sdram-ddr3-400.dtsi b/arch/arm/dts/rv1108-sdram-ddr3-400.dtsi
new file mode 100644
index 0000000000..220f86c5ad
--- /dev/null
+++ b/arch/arm/dts/rv1108-sdram-ddr3-400.dtsi
@@ -0,0 +1,76 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd
+ * Author: zhihuan he <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+&dmc {
+        rockchip,sdram-params = <
+		0x3
+		0x0
+		0x1
+		0x0
+		0x0
+		0x3
+		0x0
+		0x1
+		0x1
+
+		1
+		133
+		4
+		1
+		0
+
+		0xc8
+
+		0xc8
+		0xc8
+		0x1f4
+		0x14
+		0x4e
+		0x4
+		0x78
+		0x6
+		0x3
+		0x0
+		0x6
+		0x5
+		0xf
+		0x15
+		0x6
+		0x4
+		0x4
+		0x6
+		0x4
+		0x200
+		0x3
+		0xa
+		0x40
+		0x2710
+		0x1
+		0x5
+		0x5
+		0x3
+		0xc
+		0x28
+		0x100
+		0x0
+		0x4
+		0x0
+		0x618
+
+		0x420
+		0x40
+		0x0
+		0x0
+
+		0x01
+		0x60
+
+		0x9028b18a
+		0x18
+		0x4a4
+		0x15
+	>;
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index e7863e239f..7349239007 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -545,4 +545,16 @@
 			};
 		};
 	};
+
+	dmc: dmc@202b0000 {
+                u-boot,dm-pre-reloc;
+                compatible = "rockchip,rv1108-dmc";
+                reg = <0x202b0000 0x400
+		       0x20210000 0x400
+		       0x31070000 0x40
+		       0x10300000 0xf94
+		       0x20060000 0x38c
+		       0x20200000 0x1f0
+		       0x20010000 0x78>;
+        };
 };

commit f52e474fa56c54cb6f713c71291c399fcf0580f9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 11:14:49 2018 +0800

    android: support slot suffix
    
    If the device support the AB system, must add the slot suffix
    to partition.
    
    Change-Id: Ibac54109dd937e22a76e6fa68e9fdd1c0be48cc1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 102ed9215e..1295e0215c 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -362,7 +362,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	int part_num;
 	int ret;
 	char *command_line;
-	char slot_suffix[3];
+	char slot_suffix[3] = {0};
 	const char *mode_cmdline = NULL;
 	char *boot_partname = ANDROID_PARTITION_BOOT;
 	ulong fdt_addr;
@@ -404,12 +404,10 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
-	slot_suffix[0] = '\0';
 #ifdef CONFIG_AVB_LIBAVB_USER
 	/*TODO: get from pre-loader or misc partition*/
-	slot_suffix[0] = '_';
-	slot_suffix[1] = 'a';
-	slot_suffix[2] = '\0';
+	if (avb_get_current_slot(slot_suffix))
+		return -1;
 #endif
 
 	/*

commit c6d59f035ff4a9fda15b274e1948f8c12909fcf5
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Feb 1 11:25:01 2018 +0800

    spi: rockchip sfc: remove header file
    
    The header file only used in sfc driver itself, so
    we can move the all definition in header file to
    the c source file.
    
    Change-Id: I255a54e2570e79caea03287d8c6c8700d30e4fdd
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 67d0fc2121..f81d87b1f1 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -1,10 +1,10 @@
 /*
- * sfc driver for rockchip
+ * SFC driver for rockchip
  *
- * (C) Copyright 2008-2016 Rockchip Electronics
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
  * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
  *
- * SPDX-License-Identifier:	GPL-2.0+
+ * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
@@ -19,10 +19,83 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <dm/pinctrl.h>
-#include "rockchip_sfc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct rockchip_sfc_reg {
+	u32 ctrl;
+	u32 imr;
+	u32 iclr;
+	u32 ftlr;
+	u32 rcvr;
+	u32 ax;
+	u32 abit;
+	u32 isr;
+	u32 fsr;
+	u32 sr;
+	u32 risr;
+	u32 reserved[21];
+	u32 dmatr;
+	u32 dmaaddr;
+	u32 reserved1[30];
+	u32 cmd;
+	u32 addr;
+	u32 data;
+};
+check_member(rockchip_sfc_reg, data, 0x108);
+
+/*SFC_CTRL*/
+#define SFC_DATA_WIDTH_SHIFT	12
+#define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
+#define SFC_ADDR_WIDTH_SHIFT	10
+#define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
+#define SFC_CMD_WIDTH_SHIFT	8
+#define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
+#define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
+
+/*SFC_CMD*/
+#define SFC_DUMMY_BITS_SHIFT	8
+#define SFC_RW_SHIFT		12
+#define SFC_WR			1
+#define SFC_RD			0
+#define SFC_ADDR_BITS_SHIFT	14
+#define SFC_ADDR_BITS_MASK	GENMASK(15, 14)
+#define SFC_ADDR_0BITS		0
+#define SFC_ADDR_24BITS		1
+#define SFC_ADDR_32BITS		2
+#define SFC_ADDR_XBITS		3
+#define SFC_TRB_SHIFT		(16)
+#define SFC_TRB_MASK		GENMASK(29, 16)
+
+/* Dma start trigger signal. Auto cleared after write */
+#define SFC_DMA_START		BIT(0)
+
+#define SFC_RESET		BIT(0)
+
+/*SFC_FSR*/
+#define SFC_RXLV_SHIFT		(16)
+#define SFC_RXLV_MASK		GENMASK(20, 16)
+#define SFC_TXLV_SHIFT		(8)
+#define SFC_TXLV_MASK		GENMASK(12, 8)
+#define SFC_RX_FULL		BIT(3)	/* rx fifo full */
+#define SFC_RX_EMPTY		BIT(2)	/* rx fifo empty */
+#define SFC_TX_EMPTY		BIT(1)	/* tx fifo empty */
+#define SFC_TX_FULL		BIT(0)	/* tx fifo full */
+
+#define SFC_BUSY		BIT(0)	/* sfc busy flag */
+
+/*SFC_RISR*/
+#define DMA_FINISH_INT		BIT(7)        /* dma interrupt */
+#define SPI_ERR_INT		BIT(6)        /* Nspi error interrupt */
+#define AHB_ERR_INT		BIT(5)        /* Ahb bus error interrupt */
+#define TRANS_FINISH_INT	BIT(4)        /* Transfer finish interrupt */
+#define TX_EMPTY_INT		BIT(3)        /* Tx fifo empty interrupt */
+#define TX_OF_INT		BIT(2)        /* Tx fifo overflow interrupt */
+#define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
+#define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
+
+#define SFC_MAX_TRB		(512 * 31)
+
 enum rockchip_sfc_if_type {
 	IF_TYPE_STD,
 	IF_TYPE_DUAL,
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
deleted file mode 100644
index 25f4937c60..0000000000
--- a/drivers/spi/rockchip_sfc.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * sfc driver for rockchip
- *
- * (C) Copyright 2008-2016 Rockchip Electronics
- * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __RK_SFC_H
-#define __RK_SFC_H
-
-struct rockchip_sfc_reg {
-	u32 ctrl;
-	u32 imr;
-	u32 iclr;
-	u32 ftlr;
-	u32 rcvr;
-	u32 ax;
-	u32 abit;
-	u32 isr;
-	u32 fsr;
-	u32 sr;
-	u32 risr;
-	u32 reserved[21];
-	u32 dmatr;
-	u32 dmaaddr;
-	u32 reserved1[30];
-	u32 cmd;
-	u32 addr;
-	u32 data;
-};
-check_member(rockchip_sfc_reg, data, 0x108);
-
-/*SFC_CTRL*/
-#define SFC_DATA_WIDTH_SHIFT	12
-#define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
-#define SFC_ADDR_WIDTH_SHIFT	10
-#define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
-#define SFC_CMD_WIDTH_SHIFT	8
-#define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
-#define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
-
-/*SFC_CMD*/
-#define SFC_DUMMY_BITS_SHIFT	8
-#define SFC_RW_SHIFT		12
-#define SFC_WR			1
-#define SFC_RD			0
-#define SFC_ADDR_BITS_SHIFT	14
-#define SFC_ADDR_BITS_MASK	GENMASK(15, 14)
-#define SFC_ADDR_0BITS		0
-#define SFC_ADDR_24BITS		1
-#define SFC_ADDR_32BITS		2
-#define SFC_ADDR_XBITS		3
-#define SFC_TRB_SHIFT		(16)
-#define SFC_TRB_MASK		GENMASK(29, 16)
-
-/* Dma start trigger signal. Auto cleared after write */
-#define SFC_DMA_START		BIT(0)
-
-#define SFC_RESET		BIT(0)
-
-/*SFC_FSR*/
-#define SFC_RXLV_SHIFT		(16)
-#define SFC_RXLV_MASK		GENMASK(20, 16)
-#define SFC_TXLV_SHIFT		(8)
-#define SFC_TXLV_MASK		GENMASK(12, 8)
-#define SFC_RX_FULL		BIT(3)	/* rx fifo full */
-#define SFC_RX_EMPTY		BIT(2)	/* rx fifo empty */
-#define SFC_TX_EMPTY		BIT(1)	/* tx fifo empty */
-#define SFC_TX_FULL		BIT(0)	/* tx fifo full */
-
-#define SFC_BUSY		BIT(0)	/* sfc busy flag */
-
-/*SFC_RISR*/
-#define DMA_FINISH_INT		BIT(7)        /* dma interrupt */
-#define SPI_ERR_INT		BIT(6)        /* Nspi error interrupt */
-#define AHB_ERR_INT		BIT(5)        /* Ahb bus error interrupt */
-#define TRANS_FINISH_INT	BIT(4)        /* Transfer finish interrupt */
-#define TX_EMPTY_INT		BIT(3)        /* Tx fifo empty interrupt */
-#define TX_OF_INT		BIT(2)        /* Tx fifo overflow interrupt */
-#define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
-#define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
-
-#define SFC_MAX_TRB		(512 * 31)
-
-#endif

commit be63f83e22b2d158da8682eda1a778327f55c9d7
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Feb 1 10:57:51 2018 +0800

    arm: dts: rockchip: enable quad mode for spi-nor read
    
    Standard read/write mode:
    
    => sf test 0x8000 0x200000
    SPI flash test:
    0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
    1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
    2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
    3 read: 355 ticks, 5769 KiB/s 46.152 Mbps
    Test passed
    0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
    1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
    2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
    3 read: 355 ticks, 5769 KiB/s 46.152 Mbps
    
    Quad mode read
    Standard mode write:
    
    => sf test 0x0 0x500000
    SPI flash test:
    0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
    1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
    2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
    3 read: 231 ticks, 22164 KiB/s 177.312 Mbps
    Test passed
    0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
    1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
    2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
    3 read: 231 ticks, 22164 KiB/s 177.312 Mbps
    
    Change-Id: I39e49778dd503de9836099990fd1186771c08546
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 71bdcd2207..ed3ebf20cf 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -49,7 +49,7 @@
 		compatible = "gd25q256","spi-flash";
 		reg = <0>;
 		spi-tx-bus-width = <1>;
-		spi-rx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
 		spi-max-frequency = <96000000>;
 	};
 };

commit 30f161d1009a2f329748014028ac10500b5f97b9
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Feb 1 10:51:33 2018 +0800

    spi: rockchip sfc: split read/write transfer
    
    The read/write mechanism of spi-nor are different:
    
    For write: upper spi flash framework will split write request
    page by page chunk, and the underlying spi nor driver must
    handle all the chunk(chunk_len <= page_size) from upper framework
    in one transfer, then the upper framework will check the flash_ready
    status, then send next chunk.
    
    For read: the upper spi flash framework will send all the
    read request in one transfer, buf the underlying spi nor driver
    may not be able to transfer them in one time(if trb > SFC_MAX_TRB),
    so the underlying spi nor controller driver need to split the read
    request at this condition.
    
    Change-Id: I0a8970c066e41bbdb997909c7fefb96829318ce4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 0c7314a170..67d0fc2121 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -199,7 +199,7 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 		writel(sfc->addr, &regs->addr);
 }
 
-static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 trb)
+static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, void *buffer, size_t trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	struct bounce_buffer bb;
@@ -214,9 +214,10 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 t
 	else
 		bb_flags = GEN_BB_WRITE;
 
-	ret = bounce_buffer_start(&bb, (void *)buffer, trb, bb_flags);
+	ret = bounce_buffer_start(&bb, buffer, trb, bb_flags);
 	if (ret)
 		return ret;
+
 	rockchip_sfc_setup_xfer(sfc, bb.len_aligned);
 
 	writel(0xFFFFFFFF, &regs->iclr);
@@ -241,24 +242,6 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 t
 	return ret;
 }
 
-static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
-{
-	u32 trb;
-	int ret = 0;
-
-	while (len) {
-		trb = min(len, (u32)SFC_MAX_TRB);
-		ret = rockchip_sfc_do_dma_xfer(sfc, buf, trb);
-		if (ret < 0)
-			break;
-		len -= trb;
-		sfc->addr += trb;
-		buf += (trb >> 2);
-	}
-
-	return ret;
-}
-
 static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int rw,
 					u32 timeout)
 {
@@ -343,48 +326,81 @@ static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	return 0;
 }
 
-static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, void *buf, u32 len)
 {
 	int ret = 0;
 
 	rockchip_sfc_setup_xfer(sfc, len);
+
 	if (len) {
 		if (sfc->rw == SFC_WR)
-			ret = rockchip_sfc_write_fifo(sfc, buf, len);
+			ret = rockchip_sfc_write_fifo(sfc, (u32 *)buf, len);
 		else
-			ret = rockchip_sfc_read_fifo(sfc, buf, len);
+			ret = rockchip_sfc_read_fifo(sfc, (u32 *)buf, len);
 	}
 
 	return ret;
 }
 
-static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 offset,
+                             void *buf, size_t len)
 {
-	int ret = 0;
-	u32 bytes = len & 0x3;
 	u32 dma_trans;
+	u32 trb;
+	u8 bytes;
+	int ret;
 
 	if (len >= ARCH_DMA_MINALIGN) {
+		bytes = len & (ARCH_DMA_MINALIGN - 1);
 		dma_trans = len - bytes;
 	} else {
 		dma_trans = 0;
 		bytes = len;
 	}
 
-	if (dma_trans) {
-		ret = rockchip_sfc_dma_xfer(sfc, buf, dma_trans);
-		buf += (dma_trans  >> 2);
+	while (dma_trans) {
+		trb = min_t(size_t, dma_trans, SFC_MAX_TRB);
+		ret = rockchip_sfc_dma_xfer(sfc, buf, trb);
+		if (ret < 0)
+			return ret;
+		dma_trans -= trb;
+		sfc->addr += trb;
+		buf += trb;
 	}
 
 	/*
-	 * transfer the last non 4 bytes anligned byte by pio mode
-	 * there are also some commands like WREN(0x06) that execute
-	 * whth no data, we also need to handle it here.
+	 * transfer the last non dma anligned byte by pio mode
 	 */
-	if (bytes || (!bytes && !dma_trans))
+	if (bytes)
 		ret = rockchip_sfc_pio_xfer(sfc, buf, bytes);
 
-	return ret;
+	return 0;
+}
+
+static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 offset,
+                              void *buf, size_t len)
+{
+
+	if (len > SFC_MAX_TRB) {
+		printf("out of the max sfc trb");
+		return -EINVAL;
+	}
+
+	if (len && !(len & (ARCH_DMA_MINALIGN - 1)))
+		return rockchip_sfc_dma_xfer(sfc, buf, len);
+	else
+		return rockchip_sfc_pio_xfer(sfc, buf,len);
+
+	return 0;
+}
+
+static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, void *buf, size_t len)
+{
+
+	if (sfc->rw)
+		return rockchip_sfc_write(sfc, sfc->addr, buf, len);
+	else
+		return rockchip_sfc_read(sfc, sfc->addr, buf, len);
 }
 
 static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
@@ -394,6 +410,7 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 	struct rockchip_sfc *sfc = dev_get_priv(bus);
 	int len = bitlen >> 3;
 	u8 *pcmd = (u8 *)dout;
+	void *data_buf;
 	int ret = 0;
 
 	if (flags & SPI_XFER_BEGIN) {
@@ -409,18 +426,22 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 		}
 	}
 
-	if (flags == (SPI_XFER_BEGIN | SPI_XFER_END))
-		len = 0;
-
 	if (flags & SPI_XFER_END) {
 
 		if (din) {
 			sfc->rw = SFC_RD;
-			ret = rockchip_sfc_do_xfer(sfc, (u32 *)din, len);
-		} else if (dout) {
+			data_buf = din;
+		} else {
 			sfc->rw = SFC_WR;
-			ret = rockchip_sfc_do_xfer(sfc, (u32 *)dout, len);
+			data_buf = (void *)dout;
 		}
+
+		if (flags == (SPI_XFER_BEGIN | SPI_XFER_END)) {
+			len = 0;
+			data_buf = NULL;
+		}
+
+		ret = rockchip_sfc_do_xfer(sfc, data_buf, len);
 	}
 
 	return ret;

commit 37911cf692cce29e3f96fb66eeee9675405e47a7
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jan 29 14:43:51 2018 +0800

    spi: rockchip sfc: use bounce buffer to deal with data transfer between cpu and sfc in dma mode
    
    Bounce buffer implementation takes care of proper data buffer alignemt
    and correct flush/invalidation of data cache at once so we no longer
    depend on input data variety and make sure CPU and SFC controller deal
    with expected data in case of enabled data cache.
    
    Bounce buffer requires to add its definition (CONFIG_BOUNCE_BUFFER) in
    board configuration, otherwise corresponding library won't be compiled
    and linker will fail to build resulting executable.
    
    Change-Id: Idbd0499d7ce2baa9cbbb04ade97ddb5bf49952ac
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 48f2457338..0c7314a170 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <bouncebuf.h>
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
@@ -201,15 +202,25 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
+	struct bounce_buffer bb;
+	unsigned int bb_flags;
 	int timeout = 1000;
 	int ret = 0;
 	int risr;
 	unsigned long tbase;
 
-	rockchip_sfc_setup_xfer(sfc, trb);
+	if (sfc->rw == SFC_WR)
+		bb_flags = GEN_BB_READ;
+	else
+		bb_flags = GEN_BB_WRITE;
+
+	ret = bounce_buffer_start(&bb, (void *)buffer, trb, bb_flags);
+	if (ret)
+		return ret;
+	rockchip_sfc_setup_xfer(sfc, bb.len_aligned);
 
 	writel(0xFFFFFFFF, &regs->iclr);
-	writel((u32)buffer, &regs->dmaaddr);
+	writel((u32)bb.bounce_buffer, &regs->dmaaddr);
 	writel(SFC_DMA_START, &regs->dmatr);
 
 	tbase = get_timer(0);
@@ -225,6 +236,8 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 t
 
 	writel(0xFFFFFFFF, &regs->iclr);
 
+	bounce_buffer_stop(&bb);
+
 	return ret;
 }
 
@@ -351,7 +364,7 @@ static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	u32 bytes = len & 0x3;
 	u32 dma_trans;
 
-	if (len >= SFC_MAX_TRB) {
+	if (len >= ARCH_DMA_MINALIGN) {
 		dma_trans = len - bytes;
 	} else {
 		dma_trans = 0;
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
index 2aefb0fa17..25f4937c60 100644
--- a/drivers/spi/rockchip_sfc.h
+++ b/drivers/spi/rockchip_sfc.h
@@ -82,6 +82,6 @@ check_member(rockchip_sfc_reg, data, 0x108);
 #define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
 #define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
 
-#define SFC_MAX_TRB		(1024 << 3)
+#define SFC_MAX_TRB		(512 * 31)
 
 #endif

commit 990d8537943d9820ee726bc2a678f6d15db96af2
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Fri Feb 2 15:42:37 2018 +0800

    driver: rknand: support 128MB SLC NAND ESMT F59L1G81LB
    
    Flash ID is:c8 d1 80 95 42 7f
    
    Change-Id: I848ca16b27da7a8186f25672ff018ead70ccbab0
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index e47273ae39..aa26ca5fe2 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -5,11 +5,10 @@
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
- * date: 2017-12-21
+ * date: 2018-02-01
  */
 	.syntax unified
 	.arch armv7-a
-	.fpu softvfp
 	.eabi_attribute 20, 1
 	.eabi_attribute 21, 1
 	.eabi_attribute 23, 3
@@ -19,519 +18,566 @@
 	.eabi_attribute 30, 4
 	.eabi_attribute 34, 0
 	.eabi_attribute 18, 4
+	.file	"rk_ftl_arm_v7.S"
+	.section	.text.ftl_set_blk_mode.part.9,"ax",%progbits
+	.align	1
+	.syntax unified
 	.thumb
-	.file	"rk_ftl_arm_v7.c"
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_set_blk_mode.part.9, %function
+ftl_set_blk_mode.part.9:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L2
+	lsrs	r1, r0, #5
+	and	r0, r0, #31
+	ldr	r2, [r3]
+	movs	r3, #1
+	lsl	r0, r3, r0
+	ldr	r3, [r2, r1, lsl #2]
+	orrs	r3, r3, r0
+	str	r3, [r2, r1, lsl #2]
+	bx	lr
+.L3:
+	.align	2
+.L2:
+	.word	.LANCHOR0
+	.size	ftl_set_blk_mode.part.9, .-ftl_set_blk_mode.part.9
 	.section	.text.FlashMemCmp8,"ax",%progbits
 	.align	1
 	.global	FlashMemCmp8
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashMemCmp8, %function
 FlashMemCmp8:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L10
+	ldr	r3, .L12
 	push	{r4, r5, lr}
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L9
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L7
 	ldrb	r4, [r0, #1]	@ zero_extendqisi2
 	ldrb	r3, [r1, #1]	@ zero_extendqisi2
 	cmp	r4, r3
-	beq	.L8
+	beq	.L11
 	movs	r3, #0
-	b	.L9
-.L6:
+.L7:
+	cmp	r3, r2
+	bne	.L9
+.L11:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L9:
 	ldrb	r5, [r0, r3]	@ zero_extendqisi2
 	ldrb	r4, [r1, r3]	@ zero_extendqisi2
-	add	r3, r3, #1
+	adds	r3, r3, #1
 	cmp	r5, r4
-	beq	.L9
+	beq	.L7
 	mov	r0, r3
 	pop	{r4, r5, pc}
-.L9:
-	cmp	r3, r2
-	bne	.L6
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L8:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L11:
+.L13:
 	.align	2
-.L10:
-	.word	.LANCHOR0
+.L12:
+	.word	.LANCHOR1
 	.size	FlashMemCmp8, .-FlashMemCmp8
 	.section	.text.FlashRsvdBlkChk,"ax",%progbits
 	.align	1
 	.global	FlashRsvdBlkChk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashRsvdBlkChk, %function
 FlashRsvdBlkChk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L15
-	ldr	r2, .L15+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
+	ldr	r3, .L17
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	ldr	r3, .L17+4
+	ldr	r3, [r3]
 	muls	r3, r2, r3
-	cmp	r1, r3
-	bcs	.L14
+	cmp	r3, r1
+	bls	.L16
 	adds	r0, r0, #0
 	it	ne
 	movne	r0, #1
 	bx	lr
-.L14:
+.L16:
 	movs	r0, #1
 	bx	lr
-.L16:
+.L18:
 	.align	2
-.L15:
-	.word	.LANCHOR1
+.L17:
 	.word	.LANCHOR2
+	.word	.LANCHOR3
 	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
 	.section	.text.FlashGetRandomizer,"ax",%progbits
 	.align	1
 	.global	FlashGetRandomizer
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashGetRandomizer, %function
 FlashGetRandomizer:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L19
+	ldr	r3, .L27
 	and	r2, r1, #127
 	push	{r4, lr}
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L19+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L18
+	ldr	r3, .L27+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L19
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L18
+	cbz	r0, .L19
 	orr	r4, r4, #-1073741824
-.L18:
+.L19:
 	mov	r0, r4
 	pop	{r4, pc}
-.L20:
+.L28:
 	.align	2
-.L19:
-	.word	.LANCHOR3
+.L27:
 	.word	.LANCHOR4
+	.word	.LANCHOR5
 	.size	FlashGetRandomizer, .-FlashGetRandomizer
 	.section	.text.FlashSetRandomizer,"ax",%progbits
 	.align	1
 	.global	FlashSetRandomizer
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashSetRandomizer, %function
 FlashSetRandomizer:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	and	r2, r1, #127
-	ldr	r3, .L23
+	ldr	r3, .L37
 	mov	r5, r0
 	ldrh	r4, [r3, r2, lsl #1]
-	ldr	r3, .L23+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L22
+	ldr	r3, .L37+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L30
 	bl	FlashRsvdBlkChk
-	cbz	r0, .L22
+	cbz	r0, .L30
 	orr	r4, r4, #-1073741824
-.L22:
-	ldr	r3, .L23+8
+.L30:
+	ldr	r3, .L37+8
 	ldr	r3, [r3, r5, lsl #3]
 	str	r4, [r3, #336]
 	pop	{r3, r4, r5, pc}
-.L24:
+.L38:
 	.align	2
-.L23:
-	.word	.LANCHOR3
+.L37:
 	.word	.LANCHOR4
 	.word	.LANCHOR5
+	.word	.LANCHOR6
 	.size	FlashSetRandomizer, .-FlashSetRandomizer
 	.section	.text.FlashReadCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadCmd, %function
 FlashReadCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	@ link register save eliminated.
+	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L26
-	mov	r5, r0
-	ldr	r6, [r4, r0, lsl #3]
+	ldr	r4, .L40
+	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+	add	r3, r3, r4, lsl #8
 	movs	r4, #0
-	adds	r3, r3, #8
-	add	r3, r6, r3, lsl #8
-	str	r4, [r3, #8]
-	str	r4, [r3, #4]
-	str	r4, [r3, #4]
+	str	r4, [r3, #2056]
+	str	r4, [r3, #2052]
+	str	r4, [r3, #2052]
 	uxtb	r4, r1
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
 	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	str	r2, [r3, #4]
+	str	r4, [r3, #2052]
+	str	r2, [r3, #2052]
 	movs	r2, #48
-	str	r2, [r3, #8]
-	pop	{r4, r5, r6, lr}
+	str	r2, [r3, #2056]
+	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L27:
+.L41:
 	.align	2
-.L26:
-	.word	.LANCHOR5
+.L40:
+	.word	.LANCHOR6
 	.size	FlashReadCmd, .-FlashReadCmd
 	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadDpDataOutCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadDpDataOutCmd, %function
 FlashReadDpDataOutCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L32
-	push	{r4, lr}
-	ldr	r4, [r2, r0, lsl #3]
+	@ link register save eliminated.
+	ldr	r2, .L46
+	push	{r4, r5, r6}
+	uxtb	r6, r1
+	ldr	r4, .L46+4
+	lsrs	r5, r1, #8
+	ldr	r3, [r2, r0, lsl #3]
 	add	r2, r2, r0, lsl #3
-	ldrb	r3, [r2, #4]	@ zero_extendqisi2
-	ldr	r2, .L32+4
-	adds	r3, r3, #8
-	ldrb	r2, [r2, #16]	@ zero_extendqisi2
-	add	r3, r4, r3, lsl #8
-	cmp	r2, #1
-	mov	r2, #0
-	bne	.L29
-	movs	r4, #6
-	str	r4, [r3, #8]
-	str	r2, [r3, #4]
-	str	r2, [r3, #4]
-	uxtb	r2, r1
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #16
-	b	.L31
-.L29:
-	str	r2, [r3, #8]
-	uxtb	r4, r1
-	str	r2, [r3, #4]
-	str	r2, [r3, #4]
-	str	r4, [r3, #4]
-	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	lsrs	r4, r1, #16
-	str	r4, [r3, #4]
-	movs	r4, #5
-	str	r4, [r3, #8]
-	str	r2, [r3, #4]
-.L31:
-	str	r2, [r3, #4]
+	ldrb	r4, [r4, #16]	@ zero_extendqisi2
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	cmp	r4, #1
+	lsr	r4, r1, #16
+	lsl	r2, r2, #8
+	add	r3, r3, r2
+	bne	.L43
+	movs	r2, #6
+	str	r2, [r3, #2056]
+	movs	r2, #0
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	str	r6, [r3, #2052]
+	str	r5, [r3, #2052]
+	str	r4, [r3, #2052]
+.L45:
 	movs	r2, #224
-	str	r2, [r3, #8]
-	pop	{r4, lr}
+	str	r2, [r3, #2056]
+	pop	{r4, r5, r6}
 	b	FlashSetRandomizer
-.L33:
+.L43:
+	movs	r2, #0
+	str	r2, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	str	r6, [r3, #2052]
+	str	r5, [r3, #2052]
+	str	r4, [r3, #2052]
+	movs	r4, #5
+	str	r4, [r3, #2056]
+	str	r2, [r3, #2052]
+	str	r2, [r3, #2052]
+	b	.L45
+.L47:
 	.align	2
-.L32:
-	.word	.LANCHOR5
+.L46:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
 	.section	.text.flash_enter_slc_mode,"ax",%progbits
 	.align	1
 	.global	flash_enter_slc_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	flash_enter_slc_mode, %function
 flash_enter_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L34
-	ldr	r3, .L36+4
+	ldr	r3, .L53
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L48
+	ldr	r3, .L53+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
 	movs	r2, #218
-	str	r2, [r3, #8]
-.L34:
+	str	r2, [r3, #2056]
+.L48:
 	bx	lr
-.L37:
+.L54:
 	.align	2
-.L36:
-	.word	.LANCHOR7
-	.word	.LANCHOR5
+.L53:
+	.word	.LANCHOR8
+	.word	.LANCHOR6
 	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
 	.section	.text.flash_exit_slc_mode,"ax",%progbits
 	.align	1
 	.global	flash_exit_slc_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	flash_exit_slc_mode, %function
 flash_exit_slc_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L40
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L38
-	ldr	r3, .L40+4
+	ldr	r3, .L60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L55
+	ldr	r3, .L60+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
 	movs	r2, #223
-	str	r2, [r3, #8]
-.L38:
+	str	r2, [r3, #2056]
+.L55:
 	bx	lr
-.L41:
+.L61:
 	.align	2
-.L40:
-	.word	.LANCHOR7
-	.word	.LANCHOR5
+.L60:
+	.word	.LANCHOR8
+	.word	.LANCHOR6
 	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
 	.section	.text.FlashProgFirstCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgFirstCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgFirstCmd, %function
 FlashProgFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	@ link register save eliminated.
+	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L43
-	mov	r5, r0
-	ldr	r6, [r4, r0, lsl #3]
+	ldr	r4, .L63
+	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldrb	r4, [r4, #4]	@ zero_extendqisi2
+	add	r3, r3, r4, lsl #8
 	movs	r4, #128
-	adds	r3, r3, #8
-	add	r3, r6, r3, lsl #8
-	str	r4, [r3, #8]
+	str	r4, [r3, #2056]
 	movs	r4, #0
-	str	r4, [r3, #4]
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
+	str	r4, [r3, #2052]
 	uxtb	r4, r1
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
 	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	str	r2, [r3, #4]
-	pop	{r4, r5, r6, lr}
+	str	r4, [r3, #2052]
+	str	r2, [r3, #2052]
+	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L44:
+.L64:
 	.align	2
-.L43:
-	.word	.LANCHOR5
+.L63:
+	.word	.LANCHOR6
 	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
 	.section	.text.FlashEraseCmd,"ax",%progbits
 	.align	1
 	.global	FlashEraseCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashEraseCmd, %function
 FlashEraseCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L47
-	ldr	r5, [r4, r0, lsl #3]
-	add	r0, r4, r0, lsl #3
-	ldrb	r3, [r0, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	add	r3, r5, r3, lsl #8
-	cbz	r2, .L46
-	movs	r2, #96
-	str	r2, [r3, #8]
-	uxtb	r2, r1
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r3, #4]
-	lsrs	r2, r1, #16
-	str	r2, [r3, #4]
-	ldr	r2, .L47+4
-	ldr	r2, [r2, #0]
-	adds	r1, r1, r2
-.L46:
+	push	{r4, lr}
+	ldr	r4, .L70
+	ldr	r3, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r0, [r4, #4]	@ zero_extendqisi2
+	lsls	r0, r0, #8
+	cbz	r2, .L66
+	adds	r2, r3, r0
+	movs	r4, #96
+	str	r4, [r2, #2056]
+	uxtb	r4, r1
+	str	r4, [r2, #2052]
+	lsrs	r4, r1, #8
+	str	r4, [r2, #2052]
+	lsrs	r4, r1, #16
+	str	r4, [r2, #2052]
+	ldr	r2, .L70+4
+	ldr	r2, [r2]
+	add	r1, r1, r2
+.L66:
+	add	r3, r3, r0
 	movs	r2, #96
-	str	r2, [r3, #8]
+	str	r2, [r3, #2056]
 	uxtb	r2, r1
-	str	r2, [r3, #4]
+	str	r2, [r3, #2052]
 	lsrs	r2, r1, #8
 	lsrs	r1, r1, #16
-	str	r2, [r3, #4]
+	str	r2, [r3, #2052]
 	movs	r2, #208
-	str	r1, [r3, #4]
-	str	r2, [r3, #8]
-	pop	{r4, r5, pc}
-.L48:
+	str	r1, [r3, #2052]
+	str	r2, [r3, #2056]
+	pop	{r4, pc}
+.L71:
 	.align	2
-.L47:
-	.word	.LANCHOR5
-	.word	.LANCHOR2
+.L70:
+	.word	.LANCHOR6
+	.word	.LANCHOR3
 	.size	FlashEraseCmd, .-FlashEraseCmd
 	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgDpSecondCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgDpSecondCmd, %function
 FlashProgDpSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	@ link register save eliminated.
+	push	{r4, r5}
 	lsrs	r2, r1, #16
-	ldr	r4, .L50
-	mov	r5, r0
-	ldr	r6, [r4, r0, lsl #3]
+	ldr	r4, .L73
+	ldr	r3, [r4, r0, lsl #3]
 	add	r4, r4, r0, lsl #3
-	ldrb	r3, [r4, #4]	@ zero_extendqisi2
-	ldr	r4, .L50+4
-	adds	r3, r3, #8
+	ldrb	r5, [r4, #4]	@ zero_extendqisi2
+	ldr	r4, .L73+4
 	ldrb	r4, [r4, #11]	@ zero_extendqisi2
-	add	r3, r6, r3, lsl #8
-	str	r4, [r3, #8]
+	add	r3, r3, r5, lsl #8
+	str	r4, [r3, #2056]
 	movs	r4, #0
-	str	r4, [r3, #4]
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
+	str	r4, [r3, #2052]
 	uxtb	r4, r1
-	str	r4, [r3, #4]
+	str	r4, [r3, #2052]
 	lsrs	r4, r1, #8
-	str	r4, [r3, #4]
-	str	r2, [r3, #4]
-	pop	{r4, r5, r6, lr}
+	str	r4, [r3, #2052]
+	str	r2, [r3, #2052]
+	pop	{r4, r5}
 	b	FlashSetRandomizer
-.L51:
+.L74:
 	.align	2
-.L50:
-	.word	.LANCHOR5
+.L73:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
 	.section	.text.FlashProgSecondCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgSecondCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgSecondCmd, %function
 FlashProgSecondCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L53
+	ldr	r3, .L76
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
 	movs	r2, #16
-	str	r2, [r3, #8]
+	str	r2, [r3, #2056]
 	bx	lr
-.L54:
+.L77:
 	.align	2
-.L53:
-	.word	.LANCHOR5
+.L76:
+	.word	.LANCHOR6
 	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
 	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
 	.align	1
 	.global	FlashProgDpFirstCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashProgDpFirstCmd, %function
 FlashProgDpFirstCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L56
+	ldr	r3, .L79
+	ldr	r1, .L79+4
 	ldr	r2, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
+	ldrb	r1, [r1, #10]	@ zero_extendqisi2
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	adds	r3, r3, #8
 	add	r3, r2, r3, lsl #8
-	ldr	r2, .L56+4
-	ldrb	r2, [r2, #10]	@ zero_extendqisi2
-	str	r2, [r3, #8]
+	str	r1, [r3, #2056]
 	bx	lr
-.L57:
+.L80:
 	.align	2
-.L56:
-	.word	.LANCHOR5
+.L79:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
 	.section	.text.FlashReadStatus,"ax",%progbits
 	.align	1
 	.global	FlashReadStatus
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadStatus, %function
 FlashReadStatus:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #112
-	ldr	r3, .L59
+	ldr	r3, .L82
 	ldr	r5, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
 	movs	r0, #80
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	add	r3, r5, r4, lsl #8
 	adds	r4, r4, #8
 	lsls	r4, r4, #8
-	adds	r3, r5, r4
-	str	r2, [r3, #8]
+	str	r2, [r3, #2056]
 	bl	udelay
 	ldr	r0, [r5, r4]
 	pop	{r3, r4, r5, pc}
-.L60:
+.L83:
 	.align	2
-.L59:
-	.word	.LANCHOR5
+.L82:
+	.word	.LANCHOR6
 	.size	FlashReadStatus, .-FlashReadStatus
 	.section	.text.JSHash,"ax",%progbits
 	.align	1
 	.global	JSHash
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	JSHash, %function
 JSHash:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	mov	r3, r0
-	movs	r2, #0
-	push	{r4, r5, lr}
-	ldr	r0, .L64
-	b	.L62
-.L63:
-	lsls	r4, r0, #5
-	ldrb	r5, [r3, r2]	@ zero_extendqisi2
-	add	r4, r4, r0, lsr #2
-	adds	r2, r2, #1
-	adds	r4, r4, r5
-	eors	r0, r0, r4
-.L62:
-	cmp	r2, r1
-	bne	.L63
-	pop	{r4, r5, pc}
-.L65:
+	ldr	r3, .L87
+	add	r1, r1, r0
+	push	{r4, lr}
+.L85:
+	cmp	r0, r1
+	bne	.L86
+	mov	r0, r3
+	pop	{r4, pc}
+.L86:
+	lsrs	r2, r3, #2
+	ldrb	r4, [r0], #1	@ zero_extendqisi2
+	add	r2, r2, r3, lsl #5
+	add	r2, r2, r4
+	eors	r3, r3, r2
+	b	.L85
+.L88:
 	.align	2
-.L64:
+.L87:
 	.word	1204201446
 	.size	JSHash, .-JSHash
 	.section	.text.FlashLoadIdbInfo,"ax",%progbits
 	.align	1
 	.global	FlashLoadIdbInfo
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashLoadIdbInfo, %function
 FlashLoadIdbInfo:
 	@ args = 0, pretend = 0, frame = 0
@@ -540,201 +586,15 @@ FlashLoadIdbInfo:
 	movs	r0, #0
 	bx	lr
 	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
-	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
+	.section	.text.FlashPrintInfo,"ax",%progbits
 	.align	1
-	.global	BuildFlashLsbPageTable
+	.global	FlashPrintInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	BuildFlashLsbPageTable, %function
-BuildFlashLsbPageTable:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r4, r1
-	cbnz	r0, .L68
-	ldr	r3, .L107
-.L69:
-	strh	r0, [r3, #2]!	@ movhi
-	adds	r0, r0, #1
-	uxth	r0, r0
-	cmp	r0, #256
-	bne	.L69
-	b	.L70
-.L68:
-	cmp	r0, #1
-	bne	.L71
-	movs	r2, #0
-	ldr	r0, .L107+4
-	mov	r3, r2
-.L74:
-	uxth	r1, r3
-	cmp	r1, #3
-	bls	.L72
-	tst	r3, #1
-	ite	eq
-	moveq	r1, #2
-	movne	r1, #3
-	subs	r1, r2, r1
-	uxth	r1, r1
-.L72:
-	adds	r3, r3, #1
-	strh	r1, [r2, r0]	@ movhi
-	adds	r2, r2, #2
-	cmp	r3, #256
-	bne	.L74
-	b	.L70
-.L71:
-	cmp	r0, #2
-	bne	.L75
-	movs	r3, #0
-	ldr	r0, .L107
-	movw	r2, #65535
-	mov	r1, r3
-	b	.L106
-.L78:
-	cmp	r3, #1
-	ite	ls
-	movls	r1, r3
-	movhi	r1, r2
-.L106:
-	adds	r3, r3, #1
-	adds	r2, r2, #2
-	strh	r1, [r0, #2]!	@ movhi
-	uxth	r3, r3
-	uxth	r2, r2
-	cmp	r3, #256
-	bne	.L78
-	b	.L70
-.L75:
-	cmp	r0, #3
-	mov	r2, #0
-	bne	.L79
-	ldr	r0, .L107+4
-	mov	r3, r2
-.L82:
-	uxth	r1, r2
-	cmp	r1, #5
-	bls	.L80
-	tst	r2, #1
-	ite	eq
-	moveq	r1, #4
-	movne	r1, #5
-	subs	r1, r3, r1
-	uxth	r1, r1
-.L80:
-	adds	r2, r2, #1
-	strh	r1, [r3, r0]	@ movhi
-	adds	r3, r3, #2
-	cmp	r2, #256
-	bne	.L82
-	b	.L70
-.L79:
-	cmp	r0, #4
-	bne	.L83
-	ldr	r3, .L107+4
-	movs	r1, #16
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #1
-	strh	r0, [r3, #8]	@ movhi
-	strh	r2, [r3, #2]	@ movhi
-	movs	r2, #2
-	strh	r2, [r3, #4]	@ movhi
-	movs	r2, #3
-	strh	r2, [r3, #6]	@ movhi
-	movs	r2, #5
-	strh	r2, [r3, #10]	@ movhi
-	movs	r2, #7
-	strh	r2, [r3, #12]	@ movhi
-	movs	r2, #8
-	strh	r2, [r3, #14]!	@ movhi
-.L85:
-	tst	r2, #1
-	ite	eq
-	moveq	r0, #6
-	movne	r0, #7
-	adds	r2, r2, #1
-	subs	r0, r1, r0
-	adds	r1, r1, #2
-	cmp	r2, #256
-	strh	r0, [r3, #2]!	@ movhi
-	uxth	r1, r1
-	bne	.L85
-	b	.L70
-.L83:
-	cmp	r0, #5
-	bne	.L86
-	ldr	r1, .L107
-	mov	r3, r2
-.L87:
-	strh	r3, [r1, #2]!	@ movhi
-	adds	r3, r3, #1
-	uxth	r3, r3
-	cmp	r3, #16
-	bne	.L87
-	ldr	r2, .L107+8
-.L88:
-	strh	r3, [r2, #2]!	@ movhi
-	adds	r3, r3, #2
-	uxth	r3, r3
-	cmp	r3, #496
-	bne	.L88
-	b	.L70
-.L86:
-	cmp	r0, #6
-	bne	.L70
-	ldr	r0, .L107
-	mov	r3, r2
-.L91:
-	uxth	r1, r3
-	cmp	r1, #5
-	bls	.L89
-	tst	r3, #1
-	ite	eq
-	moveq	r1, #10
-	movne	r1, #12
-	subs	r1, r2, r1
-	uxth	r1, r1
-.L89:
-	adds	r3, r3, #1
-	adds	r2, r2, #3
-	cmp	r3, #256
-	strh	r1, [r0, #2]!	@ movhi
-	uxth	r2, r2
-	bne	.L91
-.L70:
-	mov	r2, #1024
-	ldr	r0, .L107+12
-	movs	r1, #255
-	uxth	r4, r4
-	bl	memset
-	ldr	r2, .L107
-	movs	r3, #0
-	ldr	r0, .L107+12
-	b	.L92
-.L93:
-	adds	r3, r3, #1
-	ldrh	r1, [r2, #2]!
-	uxth	r3, r3
-	strh	r1, [r0, r1, lsl #1]	@ movhi
-.L92:
-	cmp	r3, r4
-	bcc	.L93
-	pop	{r4, pc}
-.L108:
-	.align	2
-.L107:
-	.word	.LANCHOR8-2
-	.word	.LANCHOR8
-	.word	.LANCHOR8+30
-	.word	.LANCHOR9
-	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
-	.section	.text.FlashPrintInfo,"ax",%progbits
-	.align	1
-	.global	FlashPrintInfo
-	.thumb
-	.thumb_func
-	.type	FlashPrintInfo, %function
-FlashPrintInfo:
+	.fpu softvfp
+	.type	FlashPrintInfo, %function
+FlashPrintInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
@@ -743,569 +603,293 @@ FlashPrintInfo:
 	.section	.text.ToshibaSetRRPara,"ax",%progbits
 	.align	1
 	.global	ToshibaSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ToshibaSetRRPara, %function
 ToshibaSetRRPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	add	r7, r1, r1, lsl #2
-	ldr	r3, .L118
-	mov	r4, r0
+	ldr	r10, .L99+12
+	mov	r5, r0
 	mov	r6, r1
-	movs	r5, #0
-	add	sl, r3, r7
-	b	.L111
-.L115:
-	ldr	r8, .L118+16
+	movs	r4, #0
+	ldr	r8, .L99+16
+.L92:
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L96
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L96:
 	movs	r3, #85
-	str	r3, [r4, #8]
 	movs	r0, #200
-	ldrsb	r3, [r5, r8]
-	str	r3, [r4, #4]
+	str	r3, [r5, #8]
+	ldrsb	r3, [r4, r8]
+	str	r3, [r5, #4]
 	bl	udelay
-	ldr	r3, .L118+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L99
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L112
-	add	r8, r8, r7
-	add	r3, r8, r5
-	b	.L117
-.L112:
-	cmp	r3, #35
-	bne	.L114
-	add	r3, sl, r5
-.L117:
+	bne	.L93
+	adds	r3, r4, r7
+	add	r3, r3, r8
+.L98:
 	ldrsb	r3, [r3, #5]
-	b	.L116
-.L114:
-	ldr	r3, .L118+8
+.L97:
+	str	r3, [r5]
+	adds	r4, r4, #1
+	b	.L92
+.L93:
+	cmp	r3, #35
+	bne	.L95
+	ldr	r3, .L99+4
+	adds	r2, r4, r7
+	add	r3, r3, r2
+	b	.L98
+.L95:
+	ldr	r3, .L99+8
 	ldrsb	r3, [r3, r6]
-.L116:
-	adds	r5, r5, #1
-	str	r3, [r4, #0]
-.L111:
-	ldr	r3, .L118+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r5, r3
-	bcc	.L115
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L119:
+	b	.L97
+.L100:
 	.align	2
-.L118:
-	.word	.LANCHOR12
+.L99:
+	.word	.LANCHOR10
 	.word	.LANCHOR11
+	.word	.LANCHOR12
 	.word	.LANCHOR13
-	.word	.LANCHOR14
-	.word	.LANCHOR10
+	.word	.LANCHOR9
 	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
 	.section	.text.SamsungSetRRPara,"ax",%progbits
 	.align	1
 	.global	SamsungSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	SamsungSetRRPara, %function
 SamsungSetRRPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r5, r0
-	ldr	r6, .L123
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r6, r0
+	ldr	r7, .L104
 	movs	r4, #0
-	ldr	r7, .L123+4
-	add	r8, r6, r1, lsl #2
-	b	.L121
-.L122:
-	movs	r3, #161
-	str	r3, [r5, #8]
+	mov	r10, #161
+	ldr	r8, .L104+4
+	add	r1, r7, r1, lsl #2
+	adds	r5, r1, #3
+.L102:
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L103
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L103:
 	movs	r3, #0
-	str	r3, [r5, #0]
-	ldrsb	r3, [r4, r6]
+	str	r10, [r6, #8]
+	str	r3, [r6]
 	mov	r0, #300
-	str	r3, [r5, #0]
-	add	r3, r8, r4
+	ldrsb	r3, [r7, r4]
 	adds	r4, r4, #1
-	ldrsb	r3, [r3, #4]
-	str	r3, [r5, #0]
+	str	r3, [r6]
+	ldrsb	r3, [r5, #1]!
+	str	r3, [r6]
 	bl	udelay
-.L121:
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L122
-	pop	{r4, r5, r6, r7, r8, pc}
-.L124:
+	b	.L102
+.L105:
 	.align	2
-.L123:
-	.word	.LANCHOR15
+.L104:
 	.word	.LANCHOR14
+	.word	.LANCHOR13
 	.size	SamsungSetRRPara, .-SamsungSetRRPara
-	.section	.text.FlashDieInfoInit,"ax",%progbits
+	.global	__aeabi_uidiv
+	.global	__aeabi_uidivmod
+	.section	.text.LogAddr2PhyAddr,"ax",%progbits
 	.align	1
-	.global	FlashDieInfoInit
+	.global	LogAddr2PhyAddr
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashDieInfoInit, %function
-FlashDieInfoInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	LogAddr2PhyAddr, %function
+LogAddr2PhyAddr:
+	@ args = 4, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L137
-	movs	r3, #0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	strb	r3, [r2, #0]
-	ldr	r2, .L137+4
-	strb	r3, [r2, #0]
-	ldr	r3, .L137+8
-	ldrh	r2, [r3, #10]
-	ldr	r3, .L137+12
-	cmp	r2, #256
-	str	r2, [r3, #0]
-	bls	.L126
-	mov	r2, #512
-	b	.L136
-.L126:
-	cmp	r2, #128
-	bls	.L127
-	mov	r2, #256
-.L136:
-	str	r2, [r3, #0]
-.L127:
-	movs	r1, #0
-	movs	r2, #8
-	ldr	r0, .L137+16
-	movs	r5, #0
-	bl	memset
-	movs	r1, #0
-	movs	r2, #32
-	ldr	r0, .L137+20
-	bl	memset
-	ldr	r6, .L137+24
-	ldr	r0, .L137+28
-	movs	r1, #0
-	movs	r2, #128
-	ldr	sl, .L137+36
-	bl	memset
-	ldr	r8, .L137
-	ldr	r3, .L137+20
-	mov	r7, r6
-.L129:
-	ldr	r4, [sl, #0]
-	mov	r1, r7
-	mov	r0, r4
-	ldrb	fp, [r0], #1	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	mov	r2, fp
-	bl	FlashMemCmp8
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L128
-	ldrb	r2, [r8, #0]	@ zero_extendqisi2
-	ldr	r1, .L137+16
-	str	r0, [r3, r2, lsl #2]
-	strb	r5, [r1, r2]
-	adds	r2, r2, #1
-	strb	r2, [r8, #0]
-.L128:
-	adds	r5, r5, #1
-	adds	r7, r7, #8
-	cmp	r5, #4
-	bne	.L129
-	ldr	r2, .L137
-	ldr	r3, .L137+4
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	strb	r1, [r3, #0]
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #2
-	bne	.L130
-	ldr	r7, .L137+20
-	movs	r5, #0
-	ldr	r8, .L137+12
-	adds	r3, r4, #1
-	mov	sl, r2
-.L133:
-	mov	r0, r3
-	mov	r1, r6
-	mov	r2, fp
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r6, r3
+	ldr	r3, .L111
+	mov	r8, r1
+	mov	r7, r2
+	mov	r5, r0
+	ldrh	r4, [r3, #14]
+	ldrh	r3, [r3, #12]
+	smulbb	r4, r4, r3
+	ldr	r3, .L111+4
+	ldrh	fp, [r3]
+	uxth	r4, r4
+	ldr	r3, .L111+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	ldr	r3, [r0, #4]
+	it	eq
+	lsleq	r1, fp, #1
+	ubfx	r2, r3, #10, #16
+	it	eq
+	uxtheq	fp, r1
+	mov	r0, r2
 	str	r3, [sp, #4]
-	bl	FlashMemCmp8
+	mov	r1, r4
+	str	r2, [sp]
+	bl	__aeabi_uidiv
+	ldr	r2, [sp]
+	uxth	r10, r0
+	mov	r1, r4
+	mov	r0, r2
+	bl	__aeabi_uidivmod
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L131
-	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	ldrb	r1, [r4, #13]	@ zero_extendqisi2
-	ldr	r0, [r8, #0]
-	muls	r0, r1, r0
-	ldrh	r1, [r4, #14]
-	and	r1, r1, #65280
-	muls	r1, r0, r1
-	str	r1, [r7, r2, lsl #2]
-	ldrb	r0, [r4, #23]	@ zero_extendqisi2
-	cbz	r0, .L132
-	lsls	r1, r1, #1
-	str	r1, [r7, r2, lsl #2]
-.L132:
-	ldr	r1, .L137+16
-	strb	r5, [r1, r2]
-	adds	r2, r2, #1
-	ldr	r1, .L137
-	strb	r2, [r1, #0]
-.L131:
-	adds	r5, r5, #1
-	adds	r6, r6, #8
-	cmp	r5, #4
-	bne	.L133
-.L130:
-	ldr	r3, .L137
-	ldrb	r2, [r4, #13]	@ zero_extendqisi2
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	muls	r2, r3, r2
-	ldrh	r3, [r4, #14]
-	muls	r2, r3, r2
-	ldr	r3, .L137+32
-	strh	r2, [r3, #0]	@ movhi
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L138:
+	cmp	r8, #1
+	uxth	r1, r1
+	ubfx	r3, r3, #0, #10
+	bne	.L108
+	ldr	r2, .L111+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L108
+	ldr	r2, .L111+16
+	ldrh	r3, [r2, r3, lsl #1]
+.L108:
+	ldr	r2, .L111+20
+	ldr	r2, [r2, r10, lsl #2]
+	mla	r1, fp, r1, r2
+	add	r1, r1, r3
+	ldrb	r3, [sp, #40]	@ zero_extendqisi2
+	str	r1, [r7]
+	str	r10, [r6]
+	cmp	r3, #1
+	bls	.L110
+	ldr	r0, [r5, #4]
+	ldr	r3, [r5, #40]
+	add	r0, r0, #1024
+	subs	r3, r0, r3
+	rsbs	r0, r3, #0
+	adcs	r0, r0, r3
+.L109:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L110:
+	movs	r0, #0
+	b	.L109
+.L112:
 	.align	2
-.L137:
+.L111:
+	.word	.LANCHOR15
+	.word	.LANCHOR3
+	.word	.LANCHOR1
+	.word	.LANCHOR8
 	.word	.LANCHOR16
 	.word	.LANCHOR17
-	.word	.LANCHOR18
-	.word	.LANCHOR2
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.word	.LANCHOR22
-	.word	.LANCHOR21
-	.word	.LANCHOR24
-	.word	.LANCHOR23
-	.size	FlashDieInfoInit, .-FlashDieInfoInit
-	.section	.text.FlashReadIdbData,"ax",%progbits
+	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
+	.section	.text.FlashReadStatusEN,"ax",%progbits
 	.align	1
-	.global	FlashReadIdbData
+	.global	FlashReadStatusEN
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadIdbData, %function
-FlashReadIdbData:
+	.fpu softvfp
+	.type	FlashReadStatusEN, %function
+FlashReadStatusEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	mov	r2, #2048
-	ldr	r1, .L140
-	bl	memcpy
-	movs	r0, #0
-	pop	{r3, pc}
-.L141:
-	.align	2
-.L140:
-	.word	.LANCHOR25
-	.size	FlashReadIdbData, .-FlashReadIdbData
-	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
-	.align	1
-	.global	FlashLoadPhyInfoInRam
-	.thumb
-	.thumb_func
-	.type	FlashLoadPhyInfoInRam, %function
-FlashLoadPhyInfoInRam:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r5, #0
-	ldr	r6, .L154
-.L146:
-	lsls	r3, r5, #5
-	ldr	r1, .L154+4
-	adds	r4, r6, r3
-	adds	r0, r4, #1
-	ldrb	r2, [r6, r3]	@ zero_extendqisi2
-	bl	FlashMemCmp8
-	cbnz	r0, .L143
-	cbnz	r4, .L152
-	b	.L153
-.L143:
-	adds	r5, r5, #1
-	cmp	r5, #72
-	bne	.L146
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L152:
-	ldrb	r2, [r4, #22]	@ zero_extendqisi2
-	mov	r1, r0
-	ldr	r3, .L154+8
-.L148:
-	lsls	r0, r1, #5
-	ldrb	r0, [r0, r3]	@ zero_extendqisi2
-	cmp	r0, r2
-	beq	.L147
-	adds	r1, r1, #1
-	cmp	r1, #4
-	bne	.L148
-.L147:
-	ldr	r3, .L154+8
-	movs	r2, #32
-	ldr	r0, .L154+12
-	add	r1, r3, r1, lsl #5
-	bl	memcpy
-	ldr	r0, .L154+16
-	mov	r1, r4
-	movs	r2, #32
-	bl	memcpy
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L153:
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L155:
-	.align	2
-.L154:
-	.word	.LANCHOR26
-	.word	.LANCHOR22
-	.word	.LANCHOR27
-	.word	.LANCHOR6
-	.word	.LANCHOR18
-	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
-	.global	__aeabi_uidiv
-	.section	.text.LogAddr2PhyAddr,"ax",%progbits
-	.align	1
-	.global	LogAddr2PhyAddr
-	.thumb
-	.thumb_func
-	.type	LogAddr2PhyAddr, %function
-LogAddr2PhyAddr:
-	@ args = 4, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L161
-	mov	r5, r2
-	mov	r4, r0
-	mov	ip, r1
-	ldrh	r2, [r3, #12]
-	ldrh	r8, [r3, #14]
-	ldr	r3, .L161+4
-	mul	r8, r8, r2
-	ldrh	r6, [r3, #0]
-	ldr	r3, .L161+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	uxth	r8, r8
-	cmp	r3, #1
-	bne	.L157
-	lsls	r6, r6, #1
-	uxth	r6, r6
-.L157:
-	ldr	r7, [r4, #4]
-	mov	r1, r8
-	str	ip, [sp, #4]
-	bic	r7, r7, #-2147483648
-	ubfx	sl, r7, #10, #16
-	mov	r0, sl
-	lsls	r7, r7, #22
-	bl	__aeabi_uidiv
-	ldr	ip, [sp, #4]
-	lsrs	r7, r7, #22
-	cmp	ip, #1
-	uxth	r0, r0
-	mls	r8, r8, r0, sl
-	uxth	r8, r8
-	bne	.L158
-	ldr	r3, .L161+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L158
-	ldr	r3, .L161+16
-	ldrh	r7, [r3, r7, lsl #1]
-.L158:
-	ldr	r3, .L161+20
-	ldr	r3, [r3, r0, lsl #2]
-	mla	r6, r6, r8, r3
-	ldrb	r3, [sp, #40]	@ zero_extendqisi2
-	cmp	r3, #1
-	add	r7, r6, r7
-	str	r7, [r5, #0]
-	str	r0, [fp, #0]
-	bls	.L160
-	ldr	r0, [r4, #4]
-	ldr	r3, [r4, #40]
-	add	r0, r0, #1024
-	subs	r3, r0, r3
-	rsbs	r0, r3, #0
-	adc	r0, r0, r3
-	b	.L159
-.L160:
-	movs	r0, #0
-.L159:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L162:
-	.align	2
-.L161:
-	.word	.LANCHOR28
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.word	.LANCHOR7
-	.word	.LANCHOR8
-	.word	.LANCHOR20
-	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
-	.section	.text.FlashReadStatusEN,"ax",%progbits
-	.align	1
-	.global	FlashReadStatusEN
-	.thumb
-	.thumb_func
-	.type	FlashReadStatusEN, %function
-FlashReadStatusEN:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L172
+	ldr	r3, .L125
 	push	{r4, r5, r6, lr}
 	ldr	r5, [r3, r0, lsl #3]
-	add	r0, r3, r0, lsl #3
-	ldrb	r4, [r0, #4]	@ zero_extendqisi2
-	ldr	r0, .L172+4
-	adds	r4, r4, #8
-	ldr	r0, [r0, #0]
-	lsls	r4, r4, #8
-	adds	r3, r5, r4
-	ldrb	r0, [r0, #8]	@ zero_extendqisi2
-	cmp	r0, #2
-	bne	.L164
-	ldr	r0, .L172+8
-	cbnz	r2, .L165
+	add	r3, r3, r0, lsl #3
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L125+4
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	lsl	r3, r4, #8
+	add	r4, r4, #8
+	bne	.L114
+	ldr	r0, .L125+8
+	cbnz	r2, .L115
 	ldrb	r2, [r0, #13]	@ zero_extendqisi2
-	b	.L171
-.L165:
-	ldrb	r2, [r0, #14]	@ zero_extendqisi2
-.L171:
-	str	r2, [r3, #8]
+.L124:
+	add	r3, r3, r5
+	str	r2, [r3, #2056]
 	ldrb	r0, [r0, #15]	@ zero_extendqisi2
-	cbnz	r0, .L170
-	b	.L168
-.L169:
-	lsls	r6, r2, #3
-	adds	r2, r2, #1
-	lsr	r6, r1, r6
-	uxtb	r6, r6
-	str	r6, [r3, #4]
-	b	.L167
-.L170:
+	cbz	r0, .L119
+	add	r6, r5, r4, lsl #8
 	movs	r2, #0
-.L167:
+.L118:
 	cmp	r2, r0
-	bcc	.L169
-	b	.L168
-.L164:
-	movs	r2, #112
-	str	r2, [r3, #8]
-.L168:
+	bcc	.L120
+.L119:
+	lsls	r4, r4, #8
 	movs	r0, #80
 	bl	udelay
 	ldr	r0, [r5, r4]
 	uxtb	r0, r0
 	pop	{r4, r5, r6, pc}
-.L173:
+.L115:
+	ldrb	r2, [r0, #14]	@ zero_extendqisi2
+	b	.L124
+.L120:
+	lsls	r3, r2, #3
+	adds	r2, r2, #1
+	lsr	r3, r1, r3
+	uxtb	r3, r3
+	str	r3, [r6, #4]
+	b	.L118
+.L114:
+	add	r3, r3, r5
+	movs	r2, #112
+	str	r2, [r3, #2056]
+	b	.L119
+.L126:
 	.align	2
-.L172:
-	.word	.LANCHOR5
-	.word	.LANCHOR23
+.L125:
 	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.word	.LANCHOR7
 	.size	FlashReadStatusEN, .-FlashReadStatusEN
 	.section	.text.FlashWaitReadyEN,"ax",%progbits
 	.align	1
 	.global	FlashWaitReadyEN
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashWaitReadyEN, %function
 FlashWaitReadyEN:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	mov	r6, r0
+	mov	r4, r0
 	mov	r5, r1
-	mov	r4, r2
-.L178:
-	mov	r0, r6
+	mov	r6, r2
+.L131:
+	mov	r2, r6
 	mov	r1, r5
-	mov	r2, r4
+	mov	r0, r4
 	bl	FlashReadStatusEN
 	cmp	r0, #255
-	beq	.L178
-	lsls	r2, r0, #25
-	bpl	.L178
+	mov	r3, r0
+	beq	.L131
+	lsls	r3, r3, #25
+	bpl	.L131
 	pop	{r4, r5, r6, pc}
 	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
-	.section	.text.ReadFlashInfo,"ax",%progbits
-	.align	1
-	.global	ReadFlashInfo
-	.thumb
-	.thumb_func
-	.type	ReadFlashInfo, %function
-ReadFlashInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	movs	r1, #0
-	movs	r2, #11
-	mov	r4, r0
-	bl	memset
-	ldr	r3, .L182
-	ldr	r1, .L182+4
-	ldr	r3, [r3, #0]
-	ldr	r1, [r1, #0]
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	muls	r2, r1, r2
-	uxth	r2, r2
-	strb	r2, [r4, #4]
-	movs	r1, #0
-	lsrs	r0, r2, #8
-	strb	r0, [r4, #5]
-	ldr	r0, .L182+8
-	ldrb	r0, [r0, #0]	@ zero_extendqisi2
-	strb	r0, [r4, #7]
-	ldrb	r0, [r3, #13]	@ zero_extendqisi2
-	muls	r2, r0, r2
-	ldrh	r0, [r3, #14]
-	muls	r2, r0, r2
-	ldrb	r0, [r3, #8]	@ zero_extendqisi2
-	muls	r2, r0, r2
-	strb	r2, [r4, #0]
-	ubfx	r0, r2, #8, #8
-	strb	r0, [r4, #1]
-	ubfx	r0, r2, #16, #8
-	lsrs	r2, r2, #24
-	strb	r0, [r4, #2]
-	strb	r2, [r4, #3]
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	strb	r2, [r4, #6]
-	movs	r2, #32
-	strb	r2, [r4, #8]
-	movs	r2, #1
-	ldrb	r3, [r3, #7]	@ zero_extendqisi2
-	strb	r1, [r4, #10]
-	strb	r3, [r4, #9]
-	ldr	r3, .L182+12
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	mov	r3, r1
-	ldr	r1, .L182+16
-	b	.L180
-.L181:
-	ldrb	r5, [r3, r1]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	ldrb	r6, [r4, #10]	@ zero_extendqisi2
-	lsl	r5, r2, r5
-	orrs	r5, r5, r6
-	strb	r5, [r4, #10]
-.L180:
-	uxtb	r5, r3
-	cmp	r5, r0
-	bcc	.L181
-	pop	{r4, r5, r6, pc}
-.L183:
-	.align	2
-.L182:
-	.word	.LANCHOR23
-	.word	.LANCHOR2
-	.word	.LANCHOR29
-	.word	.LANCHOR16
-	.word	.LANCHOR19
-	.size	ReadFlashInfo, .-ReadFlashInfo
 	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
 	.align	1
 	.global	NandcReadDontCaseBusyEn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcReadDontCaseBusyEn, %function
 NandcReadDontCaseBusyEn:
 	@ args = 0, pretend = 0, frame = 0
@@ -1316,111 +900,123 @@ NandcReadDontCaseBusyEn:
 	.section	.text.NandcGetChipIf,"ax",%progbits
 	.align	1
 	.global	NandcGetChipIf
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcGetChipIf, %function
 NandcGetChipIf:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L186
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r0, [r3, #4]	@ zero_extendqisi2
-	adds	r0, r0, #8
-	add	r0, r2, r0, lsl #8
+	ldr	r2, .L136
+	add	r3, r2, r0, lsl #3
+	ldr	r0, [r2, r0, lsl #3]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r0, r0, r3, lsl #8
 	bx	lr
-.L187:
+.L137:
 	.align	2
-.L186:
-	.word	.LANCHOR5
+.L136:
+	.word	.LANCHOR6
 	.size	NandcGetChipIf, .-NandcGetChipIf
 	.section	.text.NandcSetDdrPara,"ax",%progbits
 	.align	1
 	.global	NandcSetDdrPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetDdrPara, %function
 NandcSetDdrPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L189
-	lsls	r2, r0, #8
-	orr	r2, r2, r0, lsl #16
-	orr	r2, r2, #1
-	ldr	r3, [r3, #0]
-	str	r2, [r3, #304]
+	ldr	r3, .L139
+	ldr	r2, [r3]
+	lsls	r3, r0, #8
+	orr	r0, r3, r0, lsl #16
+	orr	r0, r0, #1
+	str	r0, [r2, #304]
 	bx	lr
-.L190:
+.L140:
 	.align	2
-.L189:
-	.word	.LANCHOR30
+.L139:
+	.word	.LANCHOR19
 	.size	NandcSetDdrPara, .-NandcSetDdrPara
 	.section	.text.NandcSetDdrDiv,"ax",%progbits
 	.align	1
 	.global	NandcSetDdrDiv
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetDdrDiv, %function
 NandcSetDdrDiv:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L192
+	ldr	r3, .L142
 	orr	r0, r0, #16640
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	str	r0, [r3, #344]
 	bx	lr
-.L193:
+.L143:
 	.align	2
-.L192:
-	.word	.LANCHOR30
+.L142:
+	.word	.LANCHOR19
 	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
 	.section	.text.NandcSetDdrMode,"ax",%progbits
 	.align	1
 	.global	NandcSetDdrMode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetDdrMode, %function
 NandcSetDdrMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L196
-	ldr	r2, [r3, #0]
-	ldr	r3, [r2, #0]
-	bfc	r3, #13, #1
-	cbz	r0, .L195
-	orr	r3, r3, #253952
-.L195:
-	str	r3, [r2, #0]
+	ldr	r3, .L147
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	cbnz	r0, .L145
+	bfi	r3, r0, #13, #1
+.L146:
+	str	r3, [r2]
 	bx	lr
-.L197:
+.L145:
+	orr	r3, r3, #253952
+	b	.L146
+.L148:
 	.align	2
-.L196:
-	.word	.LANCHOR30
+.L147:
+	.word	.LANCHOR19
 	.size	NandcSetDdrMode, .-NandcSetDdrMode
 	.section	.text.NandcSetMode,"ax",%progbits
 	.align	1
 	.global	NandcSetMode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSetMode, %function
 NandcSetMode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L202
+	ldr	r3, .L156
 	ands	r1, r0, #6
-	ldr	r2, [r3, #0]
-	ldr	r3, [r2, #0]
-	beq	.L199
+	ldr	r2, [r3]
+	ldr	r3, [r2]
+	beq	.L150
 	lsls	r1, r0, #29
-	orr	r3, r3, #24576
 	movw	r1, #16641
 	str	r1, [r2, #344]
-	ldr	r1, .L202+4
+	orr	r3, r3, #24576
+	ldr	r1, .L156+4
 	bfc	r3, #15, #1
 	orr	r3, r3, #196608
 	it	mi
@@ -1430,244 +1026,260 @@ NandcSetMode:
 	str	r1, [r2, #308]
 	movs	r1, #39
 	str	r1, [r2, #308]
-	b	.L201
-.L199:
-	bfi	r3, r1, #13, #1
-.L201:
-	str	r3, [r2, #0]
+.L152:
+	str	r3, [r2]
 	movs	r0, #0
 	bx	lr
-.L203:
+.L150:
+	bfi	r3, r1, #13, #1
+	b	.L152
+.L157:
 	.align	2
-.L202:
-	.word	.LANCHOR30
+.L156:
+	.word	.LANCHOR19
 	.word	1710595
 	.size	NandcSetMode, .-NandcSetMode
 	.section	.text.NandcFlashCs,"ax",%progbits
 	.align	1
 	.global	NandcFlashCs
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcFlashCs, %function
 NandcFlashCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L205
-	ldr	r3, [r2, r0, lsl #3]
-	add	r2, r2, r0, lsl #3
-	movs	r0, #1
-	ldrb	r1, [r2, #4]	@ zero_extendqisi2
-	ldr	r2, [r3, #0]
-	lsl	r1, r0, r1
-	bfi	r2, r1, #0, #8
-	str	r2, [r3, #0]
+	ldr	r3, .L159
+	movs	r2, #1
+	ldr	r1, [r3, r0, lsl #3]
+	add	r0, r3, r0, lsl #3
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	ldr	r3, [r1]
+	lsls	r2, r2, r0
+	bfi	r3, r2, #0, #8
+	str	r3, [r1]
 	bx	lr
-.L206:
+.L160:
 	.align	2
-.L205:
-	.word	.LANCHOR5
+.L159:
+	.word	.LANCHOR6
 	.size	NandcFlashCs, .-NandcFlashCs
 	.section	.text.NandcFlashDeCs,"ax",%progbits
 	.align	1
 	.global	NandcFlashDeCs
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcFlashDeCs, %function
 NandcFlashDeCs:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L208
+	ldr	r3, .L162
 	ldr	r2, [r3, r0, lsl #3]
-	ldr	r3, [r2, #0]
+	ldr	r3, [r2]
 	bfc	r3, #0, #8
 	bfc	r3, #17, #1
-	str	r3, [r2, #0]
+	str	r3, [r2]
 	bx	lr
-.L209:
+.L163:
 	.align	2
-.L208:
-	.word	.LANCHOR5
+.L162:
+	.word	.LANCHOR6
 	.size	NandcFlashDeCs, .-NandcFlashDeCs
-	.section	.text.FlashWaitCmdDone,"ax",%progbits
-	.align	1
-	.global	FlashWaitCmdDone
-	.thumb
-	.thumb_func
-	.type	FlashWaitCmdDone, %function
-FlashWaitCmdDone:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L213
-	lsls	r3, r0, #4
-	push	{r4, r5, r6, lr}
-	adds	r4, r2, r3
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	mov	r6, r0
-	ldr	r3, [r4, #8]
-	cbz	r3, .L211
-	mov	r0, r5
-	bl	NandcFlashCs
-	ldr	r3, .L213+4
-	ldr	r1, [r4, #4]
-	mov	r0, r5
-	ldr	r2, [r3, r6, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	mov	r6, r0
-	mov	r0, r5
-	bl	NandcFlashDeCs
-	ldr	r3, [r4, #8]
-	ldr	r2, [r4, #12]
-	ands	r6, r6, #1
-	it	ne
-	movne	r6, #-1
-	str	r6, [r3, #0]
-	movs	r3, #0
-	str	r3, [r4, #8]
-	cbz	r2, .L211
-	str	r6, [r2, #0]
-	str	r3, [r4, #12]
-.L211:
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L214:
-	.align	2
-.L213:
-	.word	.LANCHOR21
-	.word	.LANCHOR20
-	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
-	.section	.text.HynixSetRRPara,"ax",%progbits
+	.section	.text.HynixSetRRPara,"ax",%progbits
 	.align	1
 	.global	HynixSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	HynixSetRRPara, %function
 HynixSetRRPara:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r8, r3
-	ldr	r3, .L221
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
-	sxth	fp, r0
-	ldr	r3, [r3, #0]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r3
+	ldr	r3, .L171
+	mov	r5, r0
+	mov	r6, r1
+	mov	r10, r2
+	ldr	r4, .L171+4
+	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #6
-	bne	.L216
-	ldr	r3, .L221+4
-	add	fp, r3, fp, lsl #6
-	add	fp, fp, r8, lsl #2
-	b	.L217
-.L216:
-	cmp	r3, #7
-	bne	.L218
-	lsl	r3, fp, #7
-	add	fp, r3, fp, lsl #5
-	ldr	r3, .L221+8
-	add	fp, r3, fp
-	sxth	r3, r8
-	lsls	r2, r3, #3
-	add	r3, r2, r3, lsl #1
-	add	fp, fp, r3
-	b	.L217
-.L218:
-	add	fp, r8, fp, lsl #3
-	ldr	r3, .L221+4
-	add	fp, r3, fp, lsl #3
-.L217:
-	ldr	r3, .L221+12
-	mov	r0, r4
-	movs	r7, #0
-	ldr	r2, [r3, r4, lsl #3]
-	add	r3, r3, r4, lsl #3
-	ldrb	sl, [r3, #4]	@ zero_extendqisi2
-	add	sl, sl, #8
-	add	sl, r2, sl, lsl #8
+	bne	.L165
+	movs	r3, #20
+	add	r3, r3, r0, lsl #6
+	add	r3, r3, r7, lsl #2
+.L170:
+	add	r4, r4, r3
+.L166:
+	ldr	r3, .L171+8
+	mov	r0, r5
+	subs	r6, r6, #1
+	subs	r4, r4, #1
+	add	r6, r6, r10
+	ldr	r8, [r3, r5, lsl #3]
+	add	r3, r3, r5, lsl #3
+	ldrb	fp, [r3, #4]	@ zero_extendqisi2
 	bl	NandcFlashCs
 	movs	r3, #54
-	str	r3, [sl, #8]
-	b	.L219
-.L220:
-	ldrb	r3, [r6, r7]	@ zero_extendqisi2
-	movs	r0, #200
-	str	r3, [sl, #4]
-	bl	udelay
-	ldrsb	r3, [fp, r7]
-	adds	r7, r7, #1
-	str	r3, [sl, #0]
-.L219:
-	uxtb	r3, r7
-	cmp	r3, r5
-	bcc	.L220
+	lsl	fp, fp, #8
+	add	r0, r8, fp
+	str	r3, [r0, #2056]
+	add	r3, r10, #-1
+	mov	r10, r0
+.L168:
+	cmp	r3, r6
+	bne	.L169
 	movs	r3, #22
-	mov	r0, r4
-	str	r3, [sl, #8]
+	add	r8, r8, fp
+	str	r3, [r8, #2056]
+	mov	r0, r5
 	bl	NandcFlashDeCs
-	ldr	r3, .L221+16
-	strb	r8, [r3, r4]
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L222:
+	ldr	r3, .L171+12
+	strb	r7, [r3, r5]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L165:
+	cmp	r3, #7
+	bne	.L167
+	movs	r3, #160
+	movs	r2, #28
+	smlabb	r2, r3, r0, r2
+	movs	r3, #10
+	smlabb	r3, r3, r7, r2
+	b	.L170
+.L167:
+	adds	r3, r7, #2
+	add	r3, r3, r0, lsl #3
+	add	r4, r4, r3, lsl #3
+	adds	r4, r4, #4
+	b	.L166
+.L169:
+	ldrb	r2, [r3, #1]!	@ zero_extendqisi2
+	movs	r0, #200
+	str	r2, [r10, #2052]
+	str	r3, [sp, #4]
+	bl	udelay
+	ldrsb	r2, [r4, #1]!
+	ldr	r3, [sp, #4]
+	str	r2, [r10, #2048]
+	b	.L168
+.L172:
 	.align	2
-.L221:
-	.word	.LANCHOR23
-	.word	.LANCHOR31+20
-	.word	.LANCHOR31+28
-	.word	.LANCHOR5
-	.word	.LANCHOR32
+.L171:
+	.word	.LANCHOR18
+	.word	.LANCHOR20
+	.word	.LANCHOR6
+	.word	.LANCHOR21
 	.size	HynixSetRRPara, .-HynixSetRRPara
 	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
 	.align	1
 	.global	FlashSetReadRetryDefault
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashSetReadRetryDefault, %function
 FlashSetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L228
+	ldr	r3, .L179
 	push	{r4, r5, r6, lr}
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L223
-	ldr	r6, .L228+4
+	bhi	.L173
+	ldr	r5, .L179+4
 	movs	r4, #0
-	ldr	r5, .L228+8
-.L226:
-	ldrb	r3, [r6, r4, lsl #3]	@ zero_extendqisi2
+	adds	r6, r5, #4
+.L176:
+	ldr	r3, .L179+8
 	uxtb	r0, r4
+	ldrb	r3, [r3, r4, lsl #3]	@ zero_extendqisi2
 	cmp	r3, #173
-	bne	.L225
-	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	bne	.L175
 	movs	r3, #0
-	ldr	r2, .L228+12
+	mov	r2, r6
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
 	bl	HynixSetRRPara
-.L225:
+.L175:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L226
-.L223:
+	bne	.L176
+.L173:
 	pop	{r4, r5, r6, pc}
-.L229:
+.L180:
 	.align	2
-.L228:
-	.word	.LANCHOR23
+.L179:
+	.word	.LANCHOR18
+	.word	.LANCHOR20
 	.word	.LANCHOR22
-	.word	.LANCHOR31
-	.word	.LANCHOR31+4
 	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
+	.section	.text.FlashWaitCmdDone,"ax",%progbits
+	.align	1
+	.global	FlashWaitCmdDone
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashWaitCmdDone, %function
+FlashWaitCmdDone:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L188
+	lsls	r3, r0, #4
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	adds	r4, r2, r3
+	ldr	r1, [r4, #8]
+	cbz	r1, .L183
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r3, .L188+4
+	mov	r0, r5
+	ldr	r1, [r4, #4]
+	ldr	r2, [r3, r6, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r1, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, [r4, #8]
+	sbfx	r1, r1, #0, #1
+	ldr	r2, [r4, #12]
+	str	r1, [r3]
+	movs	r3, #0
+	str	r3, [r4, #8]
+	cbz	r2, .L183
+	str	r1, [r2]
+	str	r3, [r4, #12]
+.L183:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L189:
+	.align	2
+.L188:
+	.word	.LANCHOR23
+	.word	.LANCHOR17
+	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
 	.section	.text.NandcDelayns,"ax",%progbits
 	.align	1
 	.global	NandcDelayns
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcDelayns, %function
 NandcDelayns:
 	@ args = 0, pretend = 0, frame = 0
@@ -1680,736 +1292,765 @@ NandcDelayns:
 	.section	.text.NandcWaitFlashReady,"ax",%progbits
 	.align	1
 	.global	NandcWaitFlashReady
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcWaitFlashReady, %function
 NandcWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L236
+	ldr	r3, .L196
 	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r4, .L196+4
 	ldr	r5, [r3, r0, lsl #3]
-	ldr	r4, .L236+4
-.L233:
+.L193:
 	movs	r0, #100
 	bl	udelay
-	ldr	r3, [r5, #0]
+	ldr	r3, [r5]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
-	lsls	r0, r3, #22
-	bmi	.L234
+	lsls	r3, r3, #22
+	bmi	.L194
 	subs	r4, r4, #1
-	bne	.L233
+	bne	.L193
 	mov	r0, #-1
-	b	.L232
-.L234:
+.L191:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, pc}
+.L194:
 	movs	r0, #0
-.L232:
-	pop	{r1, r2, r3, r4, r5, pc}
-.L237:
+	b	.L191
+.L197:
 	.align	2
-.L236:
-	.word	.LANCHOR5
+.L196:
+	.word	.LANCHOR6
 	.word	100000
 	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
-	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
+	.section	.text.FlashReset,"ax",%progbits
 	.align	1
-	.global	FlashEraseSLc2KBlocks
+	.global	FlashReset
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashEraseSLc2KBlocks, %function
-FlashEraseSLc2KBlocks:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashReset, %function
+FlashReset:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r6, r1
+	ldr	r3, .L199
+	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	movs	r5, #0
-	ldr	r7, .L246
-	ldr	sl, .L246+12
-	ldr	fp, .L246+16
-	b	.L239
-.L245:
-	subs	r3, r6, r5
-	movs	r1, #0
-	add	r2, sp, #8
-	mov	r0, r4
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #12
-	bl	LogAddr2PhyAddr
-	ldr	r3, [sp, #12]
-	ldrb	r2, [r7, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bcc	.L240
-	mov	r3, #-1
-	str	r3, [r4, #0]
-	b	.L241
-.L240:
-	ldrb	r8, [sl, r3]	@ zero_extendqisi2
-	lsls	r3, r3, #4
-	mov	r0, r8
-	strb	r8, [fp, r3]
-	bl	NandcWaitFlashReady
-	mov	r0, r8
+	ldr	r5, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r6, [r3, #4]	@ zero_extendqisi2
 	bl	NandcFlashCs
-	movs	r2, #0
-	ldr	r1, [sp, #8]
-	mov	r0, r8
-	bl	FlashEraseCmd
-	mov	r0, r8
-	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #8]
-	mov	r0, r8
-	bl	FlashReadStatus
-	ldr	r3, .L246+4
-	ldr	r1, [r3, #0]
-	ldr	r3, [sp, #8]
-	adds	r1, r1, r3
-	ands	r0, r0, #1
-	it	ne
-	movne	r0, #-1
-	movs	r2, #0
-	str	r0, [r4, #0]
-	mov	r0, r8
-	bl	FlashEraseCmd
-	mov	r0, r8
+	movs	r3, #255
+	mov	r0, r4
+	add	r5, r5, r6, lsl #8
+	str	r3, [r5, #2056]
 	bl	NandcWaitFlashReady
-	mov	r0, r8
-	ldr	r1, [sp, #8]
-	bl	FlashReadStatus
-	lsls	r3, r0, #31
-	itt	mi
-	movmi	r3, #-1
-	strmi	r3, [r4, #0]
-	ldr	r3, [r4, #0]
-	adds	r3, r3, #1
-	bne	.L244
-	ldr	r0, .L246+8
-	ldr	r1, [sp, #8]
-	bl	printf
-.L244:
-	mov	r0, r8
-	bl	NandcFlashDeCs
-.L241:
-	adds	r5, r5, #1
-	adds	r4, r4, #36
-.L239:
-	cmp	r5, r6
-	bne	.L245
-	movs	r0, #0
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L247:
+	mov	r0, r4
+	pop	{r4, r5, r6, lr}
+	b	NandcFlashDeCs
+.L200:
 	.align	2
-.L246:
-	.word	.LANCHOR16
-	.word	.LANCHOR2
-	.word	.LC1
-	.word	.LANCHOR19
-	.word	.LANCHOR21
-	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
-	.section	.text.FlashEraseBlocks,"ax",%progbits
+.L199:
+	.word	.LANCHOR6
+	.size	FlashReset, .-FlashReset
+	.section	.text.FlashEraseBlock,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlocks
+	.global	FlashEraseBlock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashEraseBlocks, %function
-FlashEraseBlocks:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L264
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldrb	r4, [r3, #0]	@ zero_extendqisi2
-	mov	r5, r0
-	str	r1, [sp, #12]
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	mov	r5, r1
 	mov	r6, r2
-	cmp	r4, #0
-	beq	.L262
-	mov	r1, r2
-	bl	FlashEraseSLc2KBlocks
-	b	.L250
-.L258:
-	rsb	r3, r4, r8
-	movs	r6, #36
-	muls	r6, r4, r6
-	add	fp, r5, r6
-	movs	r1, #0
-	uxtb	r3, r3
-	mov	r0, fp
-	str	r3, [sp, #0]
-	add	r2, sp, #16
-	add	r3, sp, #20
-	bl	LogAddr2PhyAddr
-	ldr	r1, .L264+4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	mov	r7, r0
-	ldr	r0, [sp, #20]
-	cmp	r0, r3
-	bcc	.L251
-	mov	r3, #-1
-	str	r3, [r5, r6]
-	b	.L252
-.L251:
-	ldr	r3, .L264+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
-	it	eq
-	moveq	r7, #0
-	add	r3, sl, r0, lsl #4
-	ldr	r3, [r3, #8]
-	cbz	r3, .L254
-	uxtb	r0, r0
-	bl	FlashWaitCmdDone
-.L254:
-	ldr	r2, [sp, #20]
-	ldr	r1, .L264+12
-	add	r3, r1, r2, lsl #4
-	movs	r1, #0
-	str	r1, [r3, #12]
-	ldr	r1, [sp, #16]
-	str	fp, [r3, #8]
-	str	r1, [r3, #4]
-	cbz	r7, .L255
-	adds	r1, r4, #1
-	movs	r0, #36
-	mla	r1, r0, r1, r5
-	str	r1, [r3, #12]
-.L255:
-	ldr	r3, .L264+16
-	ldrb	r6, [r3, r2]	@ zero_extendqisi2
-	lsls	r2, r2, #4
-	mov	r0, r6
-	strb	r6, [sl, r2]
+	bl	NandcWaitFlashReady
+	mov	r0, r4
 	bl	NandcFlashCs
-	ldr	r2, [sp, #12]
-	mov	r0, r6
-	cmp	r2, #1
-	bne	.L256
-	ldr	r3, .L264+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L256
-	bl	flash_enter_slc_mode
-	b	.L257
-.L256:
-	bl	flash_exit_slc_mode
-.L257:
-	ldr	r3, .L264+24
-	mov	r0, r6
-	ldr	r2, [sp, #20]
-	adds	r4, r4, r7
-	ldr	r1, [sp, #16]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	mov	r0, r6
-	ldr	r1, [sp, #16]
-	mov	r2, r7
+	mov	r2, r6
+	mov	r1, r5
+	mov	r0, r4
 	bl	FlashEraseCmd
-	mov	r0, r6
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r1, r0
+	mov	r0, r4
 	bl	NandcFlashDeCs
-.L252:
-	adds	r4, r4, #1
-	b	.L249
-.L262:
-	ldr	sl, .L264+12
-	mov	r8, r2
-.L249:
-	cmp	r4, r8
-	bcc	.L258
-	movs	r4, #0
-	ldr	r7, .L264+4
-	ldr	r6, .L264+20
-	ldr	r5, .L264+12
-	b	.L259
-.L261:
-	uxtb	r0, r4
-	bl	FlashWaitCmdDone
-	ldr	r3, [sp, #12]
-	cmp	r3, #1
-	bne	.L260
-	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L260
-	lsls	r3, r4, #4
-	ldrb	r0, [r5, r3]	@ zero_extendqisi2
-	bl	flash_exit_slc_mode
-.L260:
-	adds	r4, r4, #1
-.L259:
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L261
+	and	r0, r1, #1
+	pop	{r4, r5, r6, pc}
+	.size	FlashEraseBlock, .-FlashEraseBlock
+	.section	.text.FlashSetInterfaceMode,"ax",%progbits
+	.align	1
+	.global	FlashSetInterfaceMode
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashSetInterfaceMode, %function
+FlashSetInterfaceMode:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L230
+	mov	ip, #128
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r5, #0
+	movs	r7, #239
+	mov	lr, #1
+	mov	r8, #35
+	mov	r10, #32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	and	r2, r3, #4
+	and	r3, r3, #1
+	str	r2, [sp]
+	mov	r2, r5
+	str	r3, [sp, #4]
+.L212:
+	ldr	r3, .L230+4
+	ldrb	r4, [r5, r3]	@ zero_extendqisi2
+	cmp	r4, #152
+	beq	.L203
+	cmp	r4, #69
+	beq	.L203
+	cmp	r4, #173
+	beq	.L203
+	cmp	r4, #44
+	bne	.L204
+.L203:
+	ldr	r3, .L230+8
+	cmp	r0, #1
+	ldr	r1, [r5, r3]
+	add	r3, r3, r5
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	bne	.L205
+	ldr	r6, [sp, #4]
+	cbz	r6, .L204
+	lsls	r3, r3, #8
+	cmp	r4, #173
+	add	fp, r1, r3
+	str	r7, [fp, #2056]
+	bne	.L206
+	str	r0, [fp, #2052]
+.L229:
+	str	r2, [fp, #2048]
+	b	.L210
+.L206:
+	cmp	r4, #44
+	ittet	eq
+	moveq	r4, #5
+	streq	r0, [fp, #2052]
+	strne	ip, [fp, #2052]
+	streq	r4, [fp, #2048]
+	it	ne
+	strne	r0, [fp, #2048]
+.L210:
+	add	r3, r3, r1
+	str	r2, [r3, #2048]
+	str	r2, [r3, #2048]
+	str	r2, [r3, #2048]
+.L204:
+	adds	r5, r5, #8
+	cmp	r5, #32
+	bne	.L212
 	movs	r0, #0
-.L250:
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L265:
+	bl	NandcWaitFlashReady
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L205:
+	ldr	r6, [sp]
+	cmp	r6, #0
+	beq	.L204
+	lsls	r3, r3, #8
+	cmp	r4, #173
+	add	fp, r1, r3
+	str	r7, [fp, #2056]
+	bne	.L209
+	str	lr, [fp, #2052]
+	str	r10, [fp, #2048]
+	b	.L210
+.L209:
+	cmp	r4, #44
+	bne	.L211
+	str	lr, [fp, #2052]
+	str	r8, [fp, #2048]
+	b	.L210
+.L211:
+	str	ip, [fp, #2052]
+	b	.L229
+.L231:
 	.align	2
-.L264:
-	.word	.LANCHOR0
-	.word	.LANCHOR16
-	.word	.LANCHOR33
-	.word	.LANCHOR21
-	.word	.LANCHOR19
-	.word	.LANCHOR7
-	.word	.LANCHOR20
-	.size	FlashEraseBlocks, .-FlashEraseBlocks
+.L230:
+	.word	.LANCHOR24
+	.word	.LANCHOR22
+	.word	.LANCHOR6
+	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
 	.section	.text.SandiskSetRRPara,"ax",%progbits
 	.align	1
 	.global	SandiskSetRRPara
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	SandiskSetRRPara, %function
 SandiskSetRRPara:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
+	push	{r3, r4, r5, r6, r7, lr}
 	movs	r3, #239
-	mov	r4, r0
 	str	r3, [r0, #8]
 	movs	r3, #17
+	mov	r5, r0
+	mov	r4, r1
 	str	r3, [r0, #4]
 	movs	r0, #200
-	mov	r5, r1
 	bl	udelay
-	ldr	r3, .L272
-	ldr	r1, .L272+4
-	add	r5, r5, r5, lsl #2
-	ldr	r2, .L272+8
-	ldrb	r6, [r3, #0]	@ zero_extendqisi2
-	adds	r1, r1, r5
-	ldr	r3, .L272+12
-	adds	r5, r2, r5
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	movs	r3, #0
-	b	.L267
-.L270:
-	cmp	r0, #67
-	ite	eq
-	addeq	r2, r5, r3
-	addne	r2, r1, r3
-	adds	r3, r3, #1
-	ldrsb	r2, [r2, #5]
-	str	r2, [r4, #0]
-.L267:
-	cmp	r3, r6
-	bcc	.L270
+	ldr	r3, .L238
+	add	r4, r4, r4, lsl #2
+	ldr	r6, .L238+4
+	movs	r2, #0
+	ldr	r7, .L238+8
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	ldr	r3, .L238+12
+	ldrb	r0, [r3]	@ zero_extendqisi2
+.L233:
+	cmp	r2, r1
+	bcc	.L236
 	movs	r0, #0
-	pop	{r4, r5, r6, lr}
+	pop	{r3, r4, r5, r6, r7, lr}
 	b	NandcWaitFlashReady
-.L273:
+.L236:
+	adds	r3, r2, r4
+	cmp	r0, #67
+	ite	eq
+	addeq	r3, r3, r7
+	addne	r3, r3, r6
+	ldrsb	r3, [r3, #5]
+	adds	r2, r2, #1
+	str	r3, [r5]
+	b	.L233
+.L239:
 	.align	2
-.L272:
-	.word	.LANCHOR14
-	.word	.LANCHOR12
-	.word	.LANCHOR10
+.L238:
+	.word	.LANCHOR13
 	.word	.LANCHOR11
+	.word	.LANCHOR9
+	.word	.LANCHOR10
 	.size	SandiskSetRRPara, .-SandiskSetRRPara
-	.section	.text.FlashEraseBlock,"ax",%progbits
+	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
 	.align	1
-	.global	FlashEraseBlock
+	.global	FlashEraseSLc2KBlocks
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashEraseBlock, %function
-FlashEraseBlock:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashEraseSLc2KBlocks, %function
+FlashEraseSLc2KBlocks:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	mov	r5, r1
-	mov	r6, r2
+	push	{r4, r5, r6, r7, r8, r10, lr}
+	mov	r7, r1
+	ldr	r8, .L250+12
+	sub	sp, sp, #20
+	mov	r5, r0
+	movs	r6, #0
+	ldr	r10, .L250+16
+.L241:
+	cmp	r6, r7
+	bne	.L246
+	movs	r0, #0
+	add	sp, sp, #20
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, pc}
+.L246:
+	subs	r3, r7, r6
+	add	r2, sp, #8
+	uxtb	r3, r3
+	movs	r1, #0
+	mov	r0, r5
+	str	r3, [sp]
+	add	r3, sp, #12
+	bl	LogAddr2PhyAddr
+	ldr	r3, [sp, #12]
+	ldrb	r2, [r8]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L242
+	mov	r3, #-1
+	str	r3, [r5]
+.L243:
+	adds	r6, r6, #1
+	adds	r5, r5, #36
+	b	.L241
+.L242:
+	ldrb	r4, [r10, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	ldr	r2, .L250
+	mov	r0, r4
+	strb	r4, [r2, r3]
 	bl	NandcWaitFlashReady
 	mov	r0, r4
 	bl	NandcFlashCs
-	mov	r2, r6
-	mov	r1, r5
+	movs	r2, #0
+	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashEraseCmd
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	mov	r1, r5
+	ldr	r1, [sp, #8]
 	mov	r0, r4
 	bl	FlashReadStatus
-	mov	r5, r0
+	ldr	r3, .L250+4
+	sbfx	r0, r0, #0, #1
+	str	r0, [r5]
+	movs	r2, #0
+	ldr	r1, [sp, #8]
 	mov	r0, r4
-	bl	NandcFlashDeCs
-	and	r0, r5, #1
-	pop	{r4, r5, r6, pc}
-	.size	FlashEraseBlock, .-FlashEraseBlock
-	.section	.text.FlashReset,"ax",%progbits
-	.align	1
-	.global	FlashReset
-	.thumb
-	.thumb_func
-	.type	FlashReset, %function
-FlashReset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L276
-	ldr	r2, [r3, r0, lsl #3]
-	add	r3, r3, r0, lsl #3
-	ldrb	r5, [r3, #4]	@ zero_extendqisi2
-	adds	r5, r5, #8
-	add	r5, r2, r5, lsl #8
-	bl	NandcFlashCs
-	movs	r3, #255
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashEraseCmd
 	mov	r0, r4
-	str	r3, [r5, #8]
 	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #8]
 	mov	r0, r4
-	pop	{r3, r4, r5, lr}
-	b	NandcFlashDeCs
-.L277:
+	bl	FlashReadStatus
+	lsls	r3, r0, #31
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r5]
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L245
+	ldr	r1, [sp, #8]
+	ldr	r0, .L250+8
+	bl	printf
+.L245:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	b	.L243
+.L251:
 	.align	2
-.L276:
-	.word	.LANCHOR5
-	.size	FlashReset, .-FlashReset
-	.section	.text.FlashSetInterfaceMode,"ax",%progbits
+.L250:
+	.word	.LANCHOR23
+	.word	.LANCHOR3
+	.word	.LC1
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
+	.section	.text.FlashEraseBlocks,"ax",%progbits
 	.align	1
-	.global	FlashSetInterfaceMode
+	.global	FlashEraseBlocks
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashSetInterfaceMode, %function
-FlashSetInterfaceMode:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L292
-	mov	ip, #239
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r6, #0
-	ldr	r8, .L292+8
-	mov	r1, r6
-	ldrb	sl, [r3, #0]	@ zero_extendqisi2
-	mov	lr, #128
-	and	fp, sl, #1
-	and	sl, sl, #4
-	str	sl, [sp, #4]
-.L288:
-	add	r3, r8, r6
-	ldr	r7, .L292+4
-	ldr	r2, [r6, r8]
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	ldrb	r5, [r6, r7]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	lsls	r3, r3, #8
-	cmp	r5, #152
-	add	r4, r2, r3
-	beq	.L279
-	cmp	r5, #69
-	beq	.L279
-	cmp	r5, #173
-	beq	.L279
-	cmp	r5, #44
-	bne	.L280
-.L279:
-	cmp	r0, #1
-	bne	.L281
-	cmp	fp, #0
-	beq	.L280
-	cmp	r5, #173
-	str	ip, [r4, #8]
-	bne	.L282
-	str	r0, [r4, #4]
-	b	.L291
-.L282:
-	cmp	r5, #44
-	bne	.L284
-	str	r0, [r4, #4]
-	movs	r4, #5
-	str	r4, [r2, r3]
-	b	.L286
-.L284:
-	str	lr, [r4, #4]
-	str	r0, [r2, r3]
-	b	.L286
-.L281:
-	ldr	r7, [sp, #4]
-	cbz	r7, .L280
-	cmp	r5, #173
-	str	ip, [r4, #8]
-	bne	.L285
-	movs	r5, #1
-	movs	r7, #32
-	str	r5, [r4, #4]
-	b	.L290
-.L285:
-	cmp	r5, #44
-	bne	.L287
-	movs	r7, #35
-	movs	r5, #1
-	str	r5, [r4, #4]
-.L290:
-	str	r7, [r2, r3]
-	b	.L286
-.L287:
-	str	lr, [r4, #4]
-.L291:
-	str	r1, [r2, r3]
-.L286:
-	str	r1, [r2, r3]
-	str	r1, [r2, r3]
-	str	r1, [r2, r3]
-.L280:
-	adds	r6, r6, #8
-	cmp	r6, #32
-	bne	.L288
+	ldr	r3, .L279
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r0
+	sub	sp, sp, #24
+	mov	fp, r1
+	mov	r7, r2
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	cbnz	r4, .L253
+	ldr	r10, .L279+8
+.L254:
+	cmp	r4, r7
+	bcc	.L263
+	ldr	r5, .L279+4
+	movs	r4, #0
+	ldr	r6, .L279+8
+.L264:
+	ldr	r3, .L279+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L266
 	movs	r0, #0
-	bl	NandcWaitFlashReady
+	b	.L252
+.L253:
+	mov	r1, r2
+	bl	FlashEraseSLc2KBlocks
+.L252:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L263:
+	movs	r5, #36
+	add	r2, sp, #16
+	muls	r5, r4, r5
+	movs	r1, #0
+	add	r3, r8, r5
+	str	r3, [sp, #12]
+	subs	r3, r7, r4
+	uxtb	r3, r3
+	ldr	r0, [sp, #12]
+	str	r3, [sp]
+	add	r3, sp, #20
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L279+12
+	mov	r6, r0
+	ldr	r0, [sp, #20]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L256
+	mov	r3, #-1
+	str	r3, [r8, r5]
+.L257:
+	adds	r4, r4, #1
+	b	.L254
+.L256:
+	ldr	r3, .L279+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	add	r3, r10, r0, lsl #4
+	it	eq
+	moveq	r6, #0
+	ldr	r3, [r3, #8]
+	cbz	r3, .L259
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L259:
+	ldr	r1, [sp, #20]
+	ldr	r0, [sp, #12]
+	lsls	r2, r1, #4
+	add	r3, r10, r2
+	str	r0, [r3, #8]
 	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L293:
+	str	r0, [r3, #12]
+	ldr	r0, [sp, #16]
+	str	r0, [r3, #4]
+	cbz	r6, .L260
+	adds	r5, r5, #36
+	add	r5, r5, r8
+	str	r5, [r3, #12]
+.L260:
+	ldr	r3, .L279+20
+	ldrb	r5, [r3, r1]	@ zero_extendqisi2
+	mov	r0, r5
+	strb	r5, [r10, r2]
+	bl	NandcFlashCs
+	cmp	fp, #1
+	mov	r0, r5
+	bne	.L261
+	ldr	r3, .L279+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L261
+	bl	flash_enter_slc_mode
+.L262:
+	ldr	r3, .L279+24
+	mov	r0, r5
+	ldr	r2, [sp, #20]
+	add	r4, r4, r6
+	ldr	r1, [sp, #16]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r2, r6
+	ldr	r1, [sp, #16]
+	mov	r0, r5
+	bl	FlashEraseCmd
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	b	.L257
+.L261:
+	bl	flash_exit_slc_mode
+	b	.L262
+.L266:
+	uxtb	r0, r4
+	bl	FlashWaitCmdDone
+	cmp	fp, #1
+	bne	.L265
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	cbz	r3, .L265
+	lsls	r3, r4, #4
+	ldrb	r0, [r6, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L265:
+	adds	r4, r4, #1
+	b	.L264
+.L280:
 	.align	2
-.L292:
-	.word	.LANCHOR34
-	.word	.LANCHOR22
-	.word	.LANCHOR5
-	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
+.L279:
+	.word	.LANCHOR1
+	.word	.LANCHOR8
+	.word	.LANCHOR23
+	.word	.LANCHOR25
+	.word	.LANCHOR27
+	.word	.LANCHOR26
+	.word	.LANCHOR17
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
 	.section	.text.FlashReadDpCmd,"ax",%progbits
 	.align	1
 	.global	FlashReadDpCmd
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashReadDpCmd, %function
 FlashReadDpCmd:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L298
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r7, r2
-	ldr	r2, [r3, r0, lsl #3]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r5, r2
+	ldr	r3, .L285
+	mov	r6, r1
+	uxtb	lr, r1
+	mov	r7, r0
+	lsrs	r1, r1, #8
+	uxtb	r8, r5
+	ldr	r10, [r3, r0, lsl #3]
 	add	r3, r3, r0, lsl #3
-	mov	r4, r0
-	mov	r5, r1
-	ldrb	r6, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L298+4
-	adds	r6, r6, #8
-	add	r6, r2, r6, lsl #8
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L285+4
 	ldrb	r2, [r3, #16]	@ zero_extendqisi2
-	cmp	r2, #1
-	ldrb	r2, [r3, #8]	@ zero_extendqisi2
-	str	r2, [r6, #8]
-	bne	.L295
-	mov	r8, #0
-	uxtb	r2, r1
-	str	r8, [r6, #4]
-	str	r8, [r6, #4]
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #16
-	str	r2, [r6, #4]
+	lsls	r4, r4, #8
+	ldrb	ip, [r3, #8]	@ zero_extendqisi2
+	add	r4, r4, r10
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [r6, #8]
+	cmp	r2, #1
+	lsr	r2, r6, #16
+	str	ip, [r4, #2056]
+	bne	.L282
+	mov	r10, #0
+	str	r10, [r4, #2052]
+	str	r10, [r4, #2052]
+	str	lr, [r4, #2052]
+	str	r1, [r4, #2052]
+	str	r2, [r4, #2052]
+	str	r3, [r4, #2056]
 	bl	NandcWaitFlashReady
-	str	r8, [r6, #8]
-	str	r8, [r6, #4]
-	str	r8, [r6, #4]
-	b	.L297
-.L295:
-	uxtb	r2, r1
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #8
-	str	r2, [r6, #4]
-	lsrs	r2, r1, #16
-	str	r2, [r6, #4]
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r3, [r6, #8]
-.L297:
-	uxtb	r3, r7
-	mov	r0, r4
-	str	r3, [r6, #4]
-	mov	r1, r5
-	lsrs	r3, r7, #8
-	lsrs	r7, r7, #16
-	str	r3, [r6, #4]
+	str	r10, [r4, #2056]
+	str	r10, [r4, #2052]
+	str	r10, [r4, #2052]
+.L284:
+	lsrs	r3, r5, #8
+	lsrs	r5, r5, #16
+	str	r8, [r4, #2052]
+	str	r3, [r4, #2052]
 	movs	r3, #48
-	str	r7, [r6, #4]
-	str	r3, [r6, #8]
-	pop	{r4, r5, r6, r7, r8, lr}
+	str	r5, [r4, #2052]
+	mov	r1, r6
+	str	r3, [r4, #2056]
+	mov	r0, r7
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
 	b	FlashSetRandomizer
-.L299:
+.L282:
+	str	lr, [r4, #2052]
+	str	r1, [r4, #2052]
+	str	r2, [r4, #2052]
+	str	r3, [r4, #2056]
+	b	.L284
+.L286:
 	.align	2
-.L298:
-	.word	.LANCHOR5
+.L285:
 	.word	.LANCHOR6
+	.word	.LANCHOR7
 	.size	FlashReadDpCmd, .-FlashReadDpCmd
 	.section	.text.FlashDeInit,"ax",%progbits
 	.align	1
 	.global	FlashDeInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashDeInit, %function
 FlashDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
 	movs	r0, #0
-	ldr	r4, .L302
+	ldr	r4, .L295
 	bl	NandcWaitFlashReady
 	bl	FlashSetReadRetryDefault
-	ldrb	r3, [r4, #0]	@ zero_extendqisi2
-	cbz	r3, .L301
-	ldr	r3, .L302+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	lsls	r2, r3, #31
-	bpl	.L301
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	cbz	r3, .L288
+	ldr	r3, .L295+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L288
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r3, #0
-	strb	r3, [r4, #0]
-.L301:
-	ldr	r3, .L302+8
+	strb	r3, [r4]
+.L288:
+	ldr	r3, .L295+8
 	movs	r0, #0
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	str	r0, [r3, #336]
 	pop	{r4, pc}
-.L303:
+.L296:
 	.align	2
-.L302:
-	.word	.LANCHOR35
-	.word	.LANCHOR34
-	.word	.LANCHOR5
+.L295:
+	.word	.LANCHOR28
+	.word	.LANCHOR24
+	.word	.LANCHOR6
 	.size	FlashDeInit, .-FlashDeInit
 	.section	.text.NandcRandmzSel,"ax",%progbits
 	.align	1
 	.global	NandcRandmzSel
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcRandmzSel, %function
 NandcRandmzSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L305
+	ldr	r3, .L298
 	ldr	r3, [r3, r0, lsl #3]
 	str	r1, [r3, #336]
 	bx	lr
-.L306:
+.L299:
 	.align	2
-.L305:
-	.word	.LANCHOR5
+.L298:
+	.word	.LANCHOR6
 	.size	NandcRandmzSel, .-NandcRandmzSel
 	.section	.text.NandcTimeCfg,"ax",%progbits
 	.align	1
 	.global	NandcTimeCfg
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcTimeCfg, %function
 NandcTimeCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L312
+	ldr	r3, .L305
 	cmp	r0, #35
-	ldr	r3, [r3, #0]
-	bhi	.L308
+	ldr	r3, [r3]
+	bhi	.L301
 	movw	r2, #4193
-	b	.L311
-.L308:
+.L304:
+	str	r2, [r3, #4]
+	bx	lr
+.L301:
 	cmp	r0, #99
 	ite	hi
 	movwhi	r2, #8322
 	movwls	r2, #4225
-.L311:
-	str	r2, [r3, #4]
-	bx	lr
-.L313:
+	b	.L304
+.L306:
 	.align	2
-.L312:
-	.word	.LANCHOR30
+.L305:
+	.word	.LANCHOR19
 	.size	NandcTimeCfg, .-NandcTimeCfg
 	.section	.text.FlashTimingCfg,"ax",%progbits
 	.align	1
 	.global	FlashTimingCfg
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashTimingCfg, %function
 FlashTimingCfg:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L315
+	ldr	r3, .L308
 	ldrb	r0, [r3, #21]	@ zero_extendqisi2
 	b	NandcTimeCfg
-.L316:
+.L309:
 	.align	2
-.L315:
-	.word	.LANCHOR18
+.L308:
+	.word	.LANCHOR29
 	.size	FlashTimingCfg, .-FlashTimingCfg
 	.section	.text.NandcBchSel,"ax",%progbits
 	.align	1
 	.global	NandcBchSel
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcBchSel, %function
 NandcBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L322
-	movs	r1, #16
-	ldr	r2, [r3, #0]
-	movs	r3, #1
+	ldr	r3, .L318
+	movs	r1, #0
+	push	{r4, lr}
+	movs	r4, #16
+	cmp	r0, r4
+	ldr	r2, [r3]
+	mov	r3, #1
 	str	r3, [r2, #8]
-	ldr	r3, .L322+4
-	str	r0, [r3, #0]
-	movs	r3, #0
-	cmp	r0, r1
-	bfi	r3, r1, #8, #8
-	bfc	r3, #18, #1
-	beq	.L321
-.L318:
+	ldr	r3, .L318+4
+	str	r0, [r3]
+	mov	r3, r1
+	bfi	r3, r4, #8, #8
+	bfi	r3, r1, #18, #1
+	bne	.L311
+.L314:
+	bfc	r3, #4, #1
+.L312:
+	orr	r3, r3, #1
+	str	r3, [r2, #12]
+	pop	{r4, pc}
+.L311:
 	cmp	r0, #24
-	bne	.L320
+	bne	.L313
 	orr	r3, r3, #16
-	b	.L319
-.L320:
+	b	.L312
+.L313:
 	cmp	r0, #40
 	orr	r3, r3, #262144
 	orr	r3, r3, #16
-	bne	.L319
-.L321:
-	bfc	r3, #4, #1
+	bne	.L312
+	b	.L314
 .L319:
-	orr	r3, r3, #1
-	str	r3, [r2, #12]
-	bx	lr
-.L323:
 	.align	2
-.L322:
+.L318:
+	.word	.LANCHOR19
 	.word	.LANCHOR30
-	.word	.LANCHOR36
 	.size	NandcBchSel, .-NandcBchSel
 	.section	.text.FlashBchSel,"ax",%progbits
 	.align	1
 	.global	FlashBchSel
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FlashBchSel, %function
 FlashBchSel:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L325
-	strb	r0, [r3, #0]
+	ldr	r3, .L321
+	strb	r0, [r3]
 	b	NandcBchSel
-.L326:
+.L322:
 	.align	2
-.L325:
-	.word	.LANCHOR29
+.L321:
+	.word	.LANCHOR31
 	.size	FlashBchSel, .-FlashBchSel
 	.section	.text.NandCIrqEnable,"ax",%progbits
 	.align	1
 	.global	NandCIrqEnable
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandCIrqEnable, %function
 NandCIrqEnable:
 	@ args = 0, pretend = 0, frame = 0
@@ -2420,8 +2061,10 @@ NandCIrqEnable:
 	.section	.text.NandCIrqDisable,"ax",%progbits
 	.align	1
 	.global	NandCIrqDisable
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandCIrqDisable, %function
 NandCIrqDisable:
 	@ args = 0, pretend = 0, frame = 0
@@ -2432,8 +2075,10 @@ NandCIrqDisable:
 	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
 	.align	1
 	.global	rk_nandc_get_irq_status
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	rk_nandc_get_irq_status, %function
 rk_nandc_get_irq_status:
 	@ args = 0, pretend = 0, frame = 0
@@ -2445,8 +2090,10 @@ rk_nandc_get_irq_status:
 	.section	.text.rk_nandc_flash_ready,"ax",%progbits
 	.align	1
 	.global	rk_nandc_flash_ready
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	rk_nandc_flash_ready, %function
 rk_nandc_flash_ready:
 	@ args = 0, pretend = 0, frame = 0
@@ -2457,8 +2104,10 @@ rk_nandc_flash_ready:
 	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
 	.align	1
 	.global	NandcIqrWaitFlashReady
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcIqrWaitFlashReady, %function
 NandcIqrWaitFlashReady:
 	@ args = 0, pretend = 0, frame = 0
@@ -2469,8 +2118,10 @@ NandcIqrWaitFlashReady:
 	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
 	.align	1
 	.global	rk_nandc_flash_xfer_completed
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	rk_nandc_flash_xfer_completed, %function
 rk_nandc_flash_xfer_completed:
 	@ args = 0, pretend = 0, frame = 0
@@ -2481,8 +2132,10 @@ rk_nandc_flash_xfer_completed:
 	.section	.text.NandcSendDumpDataStart,"ax",%progbits
 	.align	1
 	.global	NandcSendDumpDataStart
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSendDumpDataStart, %function
 NandcSendDumpDataStart:
 	@ args = 0, pretend = 0, frame = 8
@@ -2490,7 +2143,7 @@ NandcSendDumpDataStart:
 	@ link register save eliminated.
 	ldr	r2, [r0, #16]
 	sub	sp, sp, #8
-	ldr	r3, .L334
+	ldr	r3, .L330
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
 	bfc	r2, #2, #1
@@ -2501,320 +2154,338 @@ NandcSendDumpDataStart:
 	orr	r3, r3, #4
 	str	r3, [r0, #8]
 	add	sp, sp, #8
+	@ sp needed
 	bx	lr
-.L335:
+.L331:
 	.align	2
-.L334:
+.L330:
 	.word	538969130
 	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
 	.section	.text.NandcSendDumpDataDone,"ax",%progbits
 	.align	1
 	.global	NandcSendDumpDataDone
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcSendDumpDataDone, %function
 NandcSendDumpDataDone:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	sub	sp, sp, #8
-.L337:
+.L333:
 	ldr	r3, [r0, #8]
 	str	r3, [sp, #4]
 	ldr	r3, [sp, #4]
-	lsls	r1, r3, #11
-	bpl	.L337
+	lsls	r3, r3, #11
+	bpl	.L333
 	add	sp, sp, #8
+	@ sp needed
 	bx	lr
 	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
 	.section	.text.NandcXferStart,"ax",%progbits
 	.align	1
 	.global	NandcXferStart
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcXferStart, %function
 NandcXferStart:
 	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #24
-	mov	r4, r1
+	mov	r7, r1
 	ldr	r1, [sp, #60]
-	ldr	r8, [sp, #56]
-	cbnz	r1, .L351
-	adds	r1, r8, #0
+	str	r2, [sp, #4]
+	ldr	fp, [sp, #56]
+	cmp	r1, #0
+	bne	.L350
+	adds	r5, fp, #0
 	it	ne
-	movne	r1, #1
-	b	.L340
-.L351:
+	movne	r5, #1
+.L337:
+	ldr	r1, .L355
+	movs	r4, #0
+	ldr	r6, [r1, r0, lsl #3]
+	add	r1, r1, r0, lsl #3
+	movs	r0, #16
+	ldr	r8, [r6, #12]
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	bfi	r8, r0, #8, #8
+	bfi	r8, r4, #3, #1
+	bfi	r4, r7, #1, #1
+	bfi	r8, r1, #5, #3
+	orr	r4, r4, #8
 	movs	r1, #1
-.L340:
-	ldr	r5, .L354
-	mov	ip, #16
-	ldr	r6, [r5, r0, lsl #3]
-	add	r0, r5, r0, lsl #3
-	movs	r5, #0
-	ldrb	r0, [r0, #4]	@ zero_extendqisi2
-	ldr	r7, [r6, #12]
-	bfi	r7, ip, #8, #8
-	bfi	r7, r5, #3, #1
-	bfi	r5, r4, #1, #1
-	bfi	r7, r0, #5, #3
-	orr	r5, r5, #8
-	movs	r0, #1
-	bfi	r5, r0, #5, #2
-	lsr	r3, r3, r0
-	orr	r5, r5, #536870912
-	orr	r5, r5, #1024
-	bfi	r5, r3, #4, #1
-	ldr	r3, .L354+4
-	ldr	r3, [r3, #0]
+	bfi	r4, r1, #5, #2
+	lsrs	r3, r3, r1
+	orr	r4, r4, #536870912
+	orr	r4, r4, #1024
+	bfi	r4, r3, #4, #1
+	ldr	r3, .L355+4
+	ldr	r3, [r3]
 	cmp	r3, #3
-	bls	.L341
+	bls	.L338
 	ldr	r3, [r6, #16]
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
 	str	r3, [sp, #20]
-	cmp	r1, #0
-	beq	.L342
-	cbz	r4, .L343
-	ldr	r3, .L354+8
-	str	r2, [sp, #4]
-	ldr	r3, [r3, #0]
-	cmp	r3, #24
-	ite	hi
-	movhi	r3, #128
-	movls	r3, #64
-	str	r3, [sp, #8]
-	lsr	r3, r2, r0
-	str	r3, [sp, #12]
-	ldr	r3, .L354+12
-	ldr	r0, [sp, #60]
-	ldr	lr, [r3, #4]
-	movs	r3, #0
-	mov	r1, r3
-	b	.L345
+	cmp	r5, #0
+	beq	.L339
+	ldr	r5, .L355+8
+	cmp	r7, #0
+	bne	.L340
 .L348:
-	ldr	r2, [sp, #60]
-	lsr	ip, r3, #2
-	cbz	r2, .L346
-	ldrh	fp, [r0, #2]
-	ldrh	sl, [r0], #4
-	orr	sl, sl, fp, lsl #16
-	str	sl, [lr, ip, lsl #2]
-	b	.L347
-.L346:
-	mov	r2, #-1
-	str	r2, [lr, ip, lsl #2]
-.L347:
-	ldr	r2, [sp, #8]
-	adds	r1, r1, #1
-	adds	r3, r3, r2
-.L345:
-	ldr	r2, [sp, #12]
-	cmp	r1, r2
-	bcc	.L348
 	ldr	r2, [sp, #4]
-.L343:
 	adds	r2, r2, #1
-	ldr	sl, .L354+12
 	asrs	r2, r2, #1
-	bfi	r5, r2, #22, #6
-	cmp	r8, #0
-	bne	.L353
-	ldr	r0, [sl, #0]
-	b	.L349
-.L353:
-	mov	r0, r8
-.L349:
-	ldr	r3, [sl, #4]
-	ubfx	fp, r5, #22, #5
-	str	r0, [sl, #8]
-	add	r1, r0, fp, lsl #10
-	str	r0, [sl, #16]
-	str	r3, [sl, #12]
-	str	r3, [sl, #20]
+	bfi	r4, r2, #22, #6
+	cmp	fp, #0
+	beq	.L341
+	mov	r0, fp
+.L342:
+	ldr	r3, [r5, #4]
+	ubfx	r10, r4, #22, #5
+	add	r1, r0, r10, lsl #10
+	str	r0, [r5, #8]
+	str	r0, [r5, #16]
+	clz	r7, r7
+	str	r3, [r5, #12]
+	lsrs	r7, r7, #5
+	str	r3, [r5, #20]
 	bl	flush_dcache_range
-	ldr	r0, [sl, #12]
-	add	r1, r0, fp, lsl #7
+	ldr	r0, [r5, #12]
+	add	r1, r0, r10, lsl #7
 	bl	flush_dcache_range
 	movs	r3, #1
-	str	r3, [sl, #24]
 	movs	r2, #16
-	ldr	r3, [sl, #16]
+	str	r3, [r5, #24]
+	tst	fp, #3
+	ldr	r3, [r5, #16]
 	str	r3, [r6, #20]
-	ldr	r3, [sl, #20]
+	ldr	r3, [r5, #20]
 	str	r3, [r6, #24]
-	movs	r3, #0
+	mov	r3, #0
 	str	r3, [sp, #20]
-	tst	r8, #3
 	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
+	it	eq
+	moveq	r2, #2
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
 	str	r3, [sp, #20]
-	bne	.L350
-	ldr	r3, [sp, #20]
-	movs	r2, #2
-	bfi	r3, r2, #3, #3
-	str	r3, [sp, #20]
-.L350:
+	ittt	eq
+	ldreq	r3, [sp, #20]
+	bfieq	r3, r2, #3, #3
+	streq	r3, [sp, #20]
 	ldr	r3, [sp, #20]
-	rsbs	r4, r4, #1
-	it	cc
-	movcc	r4, #0
 	orr	r3, r3, #4
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
-	bfi	r3, r4, #1, #1
+	bfi	r3, r7, #1, #1
 	str	r3, [sp, #20]
 	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
 	str	r3, [sp, #20]
-.L342:
+.L339:
 	ldr	r3, [sp, #20]
 	str	r3, [r6, #16]
-.L341:
-	str	r7, [r6, #12]
-	str	r5, [r6, #8]
-	orr	r5, r5, #4
-	str	r5, [r6, #8]
+.L338:
+	str	r8, [r6, #12]
+	str	r4, [r6, #8]
+	orr	r4, r4, #4
+	str	r4, [r6, #8]
 	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L355:
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L350:
+	movs	r5, #1
+	b	.L337
+.L340:
+	ldr	r3, .L355+12
+	movs	r1, #0
+	ldr	lr, [r5, #4]
+	mov	r0, r1
+	ldr	r3, [r3]
+	cmp	r3, #25
+	ite	cc
+	movcc	r3, #64
+	movcs	r3, #128
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #4]
+	lsrs	r3, r3, #1
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #60]
+.L344:
+	ldr	r2, [sp, #12]
+	cmp	r0, r2
+	bcs	.L348
+	ldr	r2, [sp, #60]
+	bic	r10, r1, #3
+	cbz	r2, .L345
+	ldrh	ip, [r3]
+	adds	r3, r3, #4
+	ldrh	r2, [r3, #-2]
+	orr	ip, ip, r2, lsl #16
+	str	ip, [lr, r10]
+.L346:
+	ldr	r2, [sp, #8]
+	adds	r0, r0, #1
+	add	r1, r1, r2
+	b	.L344
+.L345:
+	mov	r2, #-1
+	str	r2, [lr, r10]
+	b	.L346
+.L341:
+	ldr	r3, .L355+8
+	ldr	r0, [r3]
+	b	.L342
+.L356:
 	.align	2
-.L354:
-	.word	.LANCHOR5
-	.word	.LANCHOR37
-	.word	.LANCHOR36
-	.word	.LANCHOR38
+.L355:
+	.word	.LANCHOR6
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.word	.LANCHOR30
 	.size	NandcXferStart, .-NandcXferStart
 	.section	.text.NandcXferComp,"ax",%progbits
 	.align	1
 	.global	NandcXferComp
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	NandcXferComp, %function
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L373
-	push	{r0, r1, r2, r4, r5, lr}
-	ldr	r4, [r3, r0, lsl #3]
-	ldr	r3, .L373+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #3
-	bls	.L369
-	ldr	r2, [r4, #16]
-	lsls	r2, r2, #29
-	bpl	.L369
-	ldr	r2, [r4, #16]
-	lsls	r0, r2, #30
-	bpl	.L365
-	ldr	r2, [r4, #8]
-	str	r2, [sp, #0]
-	b	.L372
-.L362:
-	cmp	r3, #5
-	bls	.L372
-	ldr	r2, [r4, #0]
-	str	r2, [sp, #4]
-	ldr	r2, [sp, #4]
-	lsls	r1, r2, #18
-	bpl	.L372
-	ldr	r2, [sp, #4]
-	lsls	r2, r2, #14
-	bmi	.L361
-.L372:
-	ldr	r1, [r4, #28]
-	ldr	r2, [sp, #0]
-	ubfx	r1, r1, #16, #5
-	ubfx	r2, r2, #22, #6
-	cmp	r1, r2
-	blt	.L362
+	ldr	r3, .L387
+	push	{r0, r1, r4, lr}
+	ldr	r1, [r3, r0, lsl #3]
+	ldr	r3, .L387+4
+	ldr	r0, [r3]
+	cmp	r0, #3
+	bls	.L380
+	ldr	r3, [r1, #16]
+	lsls	r2, r3, #29
+	bpl	.L380
+	ldr	r3, [r1, #16]
+	tst	r3, #2
+	ldr	r3, [r1, #8]
+	str	r3, [sp]
+	beq	.L367
 .L361:
-	ldr	r4, .L373+8
+	ldr	r2, [r1, #28]
+	ldr	r3, [sp]
+	ubfx	r2, r2, #16, #5
+	ubfx	r3, r3, #22, #6
+	cmp	r2, r3
+	bge	.L365
+	cmp	r0, #5
+	bls	.L361
+	ldr	r3, [r1]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r3, r3, #18
+	bpl	.L361
+	ldr	r3, [sp, #4]
+	lsls	r4, r3, #14
+	bpl	.L361
+.L365:
+	ldr	r4, .L387+8
 	ldr	r3, [r4, #24]
-	cbz	r3, .L363
-	ldr	r1, [sp, #0]
+	cbz	r3, .L366
 	ldr	r0, [r4, #16]
+	ldr	r1, [sp]
 	ubfx	r1, r1, #22, #5
 	add	r1, r0, r1, lsl #10
 	bl	invalidate_dcache_range
-	ldr	r1, [sp, #0]
 	ldr	r0, [r4, #20]
+	ldr	r1, [sp]
 	ubfx	r1, r1, #22, #5
 	add	r1, r0, r1, lsl #7
 	bl	invalidate_dcache_range
-	b	.L363
-.L365:
-	ldr	r3, [r4, #8]
-	str	r3, [sp, #0]
-	ldr	r3, [sp, #0]
-	lsls	r5, r3, #11
-	bpl	.L365
-	ldr	r5, .L373+12
-	ldr	r3, [r5, #0]
-	cbz	r3, .L366
-	mov	r0, r4
-	bl	NandcSendDumpDataStart
 .L366:
-	ldr	r3, [r5, #0]
-	cbz	r3, .L363
-	mov	r0, r4
-	bl	NandcSendDumpDataDone
-.L363:
-	ldr	r3, .L373+8
+	ldr	r3, .L387+8
 	movs	r2, #0
 	str	r2, [r3, #24]
-	b	.L356
+.L357:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, pc}
+.L368:
+	ldr	r3, [r1, #8]
+	str	r3, [sp]
+.L367:
+	ldr	r3, [sp]
+	lsls	r2, r3, #11
+	bpl	.L368
+	ldr	r4, .L387+12
+	ldr	r2, [r4]
+	cbz	r2, .L369
+	mov	r0, r1
+	bl	NandcSendDumpDataStart
 .L369:
-	ldr	r3, [r4, #8]
-	str	r3, [sp, #0]
-	ldr	r3, [sp, #0]
-	lsls	r0, r3, #11
-	bpl	.L369
-.L356:
-	pop	{r1, r2, r3, r4, r5, pc}
-.L374:
+	ldr	r3, [r4]
+	cmp	r3, #0
+	beq	.L366
+	mov	r0, r1
+	bl	NandcSendDumpDataDone
+	b	.L366
+.L380:
+	ldr	r3, [r1, #8]
+	str	r3, [sp]
+	ldr	r3, [sp]
+	lsls	r3, r3, #11
+	bpl	.L380
+	b	.L357
+.L388:
 	.align	2
-.L373:
-	.word	.LANCHOR5
-	.word	.LANCHOR37
-	.word	.LANCHOR38
-	.word	.LANCHOR39
+.L387:
+	.word	.LANCHOR6
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.word	.LANCHOR34
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
 	.global	Ftl_log2
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	Ftl_log2, %function
 Ftl_log2:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
+	movs	r1, #0
 	movs	r2, #1
-	movs	r3, #0
-	b	.L376
-.L377:
-	adds	r3, r3, #1
-	lsls	r2, r2, #1
-	uxth	r3, r3
-.L376:
+.L390:
 	cmp	r2, r0
-	bls	.L377
-	subs	r3, r3, #1
-	uxth	r0, r3
+	uxth	r3, r1
+	add	r1, r1, #1
+	bls	.L391
+	subs	r0, r3, #1
+	uxth	r0, r0
 	bx	lr
+.L391:
+	lsls	r2, r2, #1
+	b	.L390
 	.size	Ftl_log2, .-Ftl_log2
 	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
 	.global	FtlPrintInfo
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlPrintInfo, %function
 FtlPrintInfo:
 	@ args = 0, pretend = 0, frame = 0
@@ -2825,606 +2496,617 @@ FtlPrintInfo:
 	.section	.text.FtlSysBlkNumInit,"ax",%progbits
 	.align	1
 	.global	FtlSysBlkNumInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlSysBlkNumInit, %function
 FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L382
-	cmp	r0, #23
-	it	ls
-	movls	r0, #24
-	ldr	r2, .L382+4
-	str	r0, [r3, #0]
-	ldr	r3, .L382+8
-	ldrh	r3, [r3, #0]
+	ldr	r3, .L394
+	cmp	r0, #24
+	it	cc
+	movcc	r0, #24
+	ldr	r2, .L394+4
+	str	r0, [r3]
+	ldr	r3, .L394+8
+	ldrh	r3, [r3]
 	muls	r3, r0, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L382+12
-	ldrh	r2, [r2, #0]
+	str	r3, [r2]
+	ldr	r2, .L394+12
+	ldrh	r2, [r2]
 	subs	r0, r2, r0
-	ldr	r2, .L382+16
-	strh	r0, [r2, #0]	@ movhi
+	ldr	r2, .L394+16
+	strh	r0, [r2]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L382+20
-	ldr	r2, [r2, #0]
+	ldr	r2, .L394+20
+	ldr	r2, [r2]
 	subs	r3, r2, r3
-	ldr	r2, .L382+24
-	str	r3, [r2, #0]
+	ldr	r2, .L394+24
+	str	r3, [r2]
 	bx	lr
-.L383:
+.L395:
 	.align	2
-.L382:
-	.word	.LANCHOR40
-	.word	.LANCHOR42
+.L394:
+	.word	.LANCHOR35
+	.word	.LANCHOR37
+	.word	.LANCHOR36
+	.word	.LANCHOR39
+	.word	.LANCHOR38
 	.word	.LANCHOR41
-	.word	.LANCHOR44
-	.word	.LANCHOR43
-	.word	.LANCHOR46
-	.word	.LANCHOR45
+	.word	.LANCHOR40
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
 	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
 	.align	1
 	.global	FtlConstantsInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlConstantsInit, %function
 FtlConstantsInit:
-	@ args = 0, pretend = 0, frame = 32
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
 	ldrh	r7, [r0, #8]
-	sub	sp, sp, #32
-	ldr	r3, .L400
-	ldrh	r1, [r0, #10]
+	sub	sp, sp, #24
+	ldr	r3, .L424
+	ldr	r1, .L424+4
+	ldrh	r6, [r10, #14]
+	ldr	r2, .L424+8
+	strh	r7, [r3]	@ movhi
+	ldrh	r3, [r0, #10]
 	ldrh	r0, [r0, #12]
-	strh	r7, [r3, #0]	@ movhi
-	ldr	r3, .L400+4
-	ldrh	ip, [r4, #14]
-	ldr	r2, .L400+8
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+12
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L400+16
-	strh	ip, [r3, #0]	@ movhi
-	movs	r3, #0
-.L385:
-	strb	r3, [r3, r2]
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L385
-	ldrh	r2, [r4, #14]
-	ldrh	r3, [r4, #20]
-	cmp	r3, r2, lsr #8
-	bcs	.L386
-	ldr	r3, .L400+8
-	uxtb	sl, r0
+	strh	r6, [r1]	@ movhi
+	str	r1, [sp, #20]
+	ldr	r1, .L424+12
+	ldr	r4, .L424+16
+	strh	r0, [r2]	@ movhi
 	movs	r2, #0
-	subs	r6, r3, r0
-	str	r6, [sp, #24]
-	subs	r6, r1, #1
-	lsl	r8, sl, #1
-	mla	r6, r0, r6, r3
-	uxtb	r8, r8
-	rsb	r5, r8, #0
-	uxtb	r5, r5
-	str	r6, [sp, #28]
-	b	.L387
-.L388:
-	ldr	r2, [sp, #12]
-	add	fp, r6, r5
-	add	lr, lr, #1
-	strb	fp, [r2, r3]
-	ldr	r2, [sp, #20]
-	add	fp, r6, r2
-	ldr	r2, [sp, #16]
-	strb	fp, [r2, r3]
-	b	.L389
-.L398:
-	ldr	fp, [sp, #24]
-	movs	r3, #0
-	mov	r6, r3
-	mov	lr, r3
-	add	fp, fp, r2
-	str	fp, [sp, #12]
-	ldr	fp, [sp, #28]
-	str	r2, [sp, #4]
-	add	fp, fp, r2
-	str	fp, [sp, #16]
-	add	fp, r5, sl
-	str	fp, [sp, #20]
-.L389:
-	add	r6, r6, r8
-	cmp	lr, r1
-	add	r3, r3, r0
-	uxtb	r6, r6
-	bcc	.L388
-	ldr	r2, [sp, #4]
-	adds	r5, r5, #1
+	strh	r3, [r4]	@ movhi
+	str	r4, [sp, #8]
+.L397:
+	strb	r2, [r2, r1]
 	adds	r2, r2, #1
-	uxtb	r5, r5
-.L387:
+	cmp	r2, #32
+	bne	.L397
+	ldrh	r1, [r10, #14]
+	ldrh	r2, [r10, #20]
+	cmp	r2, r1, lsr #8
+	bcs	.L398
+	uxtb	r8, r0
+	lsl	r2, r8, #1
+	uxtb	r2, r2
+	str	r2, [sp, #4]
+	subs	r2, r3, #1
+	muls	r2, r0, r2
+	str	r2, [sp, #12]
+	movs	r2, #0
+.L399:
 	cmp	r2, r0
-	bcc	.L398
-	ldr	r3, .L400+4
-	lsls	r1, r1, #1
-	lsr	ip, ip, #1
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+16
-	strh	ip, [r3, #0]	@ movhi
-.L386:
-	ldr	r3, .L400+20
+	bcs	.L401
+	ldr	r4, [sp, #12]
+	sub	fp, r2, r0
+	uxtb	r1, r2
+	adds	r5, r2, r4
+	ldr	r4, .L424+12
+	add	r4, r4, r5
+	movs	r5, #0
+	mov	lr, r4
+	ldr	r4, .L424+12
+	mov	ip, r5
+	add	fp, fp, r4
+	b	.L402
+.L400:
+	add	r4, r8, r1
+	strb	r1, [fp, r5]
+	str	r4, [sp, #16]
+	add	ip, ip, #1
+	ldrb	r4, [sp, #16]	@ zero_extendqisi2
+	strb	r4, [lr, r5]
+	ldr	r4, [sp, #4]
+	add	r1, r1, r4
+	uxtb	r1, r1
+.L402:
+	cmp	ip, r3
+	add	r5, r5, r0
+	bcc	.L400
+	adds	r2, r2, #1
+	b	.L399
+.L401:
+	ldr	r2, [sp, #8]
+	lsls	r3, r3, #1
+	lsrs	r6, r6, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L424+4
+	strh	r6, [r3]	@ movhi
+.L398:
+	ldr	r3, .L424+20
 	movs	r2, #5
-	movs	r1, #0
 	cmp	r7, #1
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L400+24
+	mov	r1, #0
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L424+24
 	it	eq
-	strheq	r7, [r3, #0]	@ movhi
-	ldr	r3, .L400+28
-	strh	r1, [r2, #0]	@ movhi
-	mov	r2, #4352
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L400+32
-	ldrb	r8, [r2, #0]	@ zero_extendqisi2
-	cmp	r8, #0
-	beq	.L391
-	mov	r2, #384
-	strh	r2, [r3, #0]	@ movhi
-.L391:
-	ldr	r3, .L400+4
-	ldrh	r5, [r3, #0]
-	muls	r5, r0, r5
-	ldr	r3, .L400+36
+	strheq	r7, [r3]	@ movhi
+	ldr	r3, .L424+28
+	strh	r1, [r2]	@ movhi
+	mov	r1, #4352
+	strh	r1, [r3]	@ movhi
+	ldr	r1, .L424+32
+	ldrb	r1, [r1]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	cbz	r1, .L404
+	mov	r1, #384
+	strh	r1, [r3]	@ movhi
+.L404:
+	ldr	r3, [sp, #8]
+	str	r2, [sp, #16]
+	ldr	fp, .L424+120
+	ldrh	r5, [r3]
+	ldr	r3, .L424+36
+	ldr	r8, .L424+124
+	smulbb	r5, r5, r0
 	uxth	r5, r5
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L400+16
-	ldrh	r6, [r3, #0]
-	muls	r0, r6, r0
-	ldr	r3, .L400+40
+	strh	r5, [r3]	@ movhi
+	ldr	r3, [sp, #20]
+	ldrh	r4, [r3]
+	ldr	r3, .L424+40
+	smulbb	r0, r0, r4
 	uxth	r0, r0
-	strh	r0, [r3, #0]	@ movhi
+	strh	r0, [r3]	@ movhi
 	bl	Ftl_log2
-	ldr	r3, .L400+44
-	ldrh	fp, [r4, #16]
-	ldrh	r1, [r4, #18]
-	ldrh	sl, [r4, #20]
-	mul	r2, fp, r5
-	strh	r0, [r3, #0]	@ movhi
-	mov	r0, sl
-	ldr	r3, .L400+48
-	strh	fp, [r3, #0]	@ movhi
-	ldr	r3, .L400+52
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+56
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L400+60
-	strh	sl, [r3, #0]	@ movhi
-	str	r1, [sp, #8]
+	ldr	r3, .L424+44
+	ldrh	r6, [r10, #16]
+	ldrh	r1, [r10, #18]
+	strh	r0, [r3]	@ movhi
+	ldr	r3, .L424+48
+	smulbb	r0, r5, r6
+	strh	r6, [fp]	@ movhi
+	str	r1, [sp, #12]
+	strh	r1, [r3]	@ movhi
+	ldr	r3, .L424+52
+	strh	r0, [r3]	@ movhi
+	ldrh	r3, [r10, #20]
+	mov	r0, r3
+	strh	r3, [r8]	@ movhi
+	str	r3, [sp, #8]
 	bl	Ftl_log2
-	ldr	r3, .L400+64
-	ldr	r2, .L400+68
-	ldr	r1, [sp, #8]
-	mul	r1, r1, sl
-	strh	r0, [r3, #0]	@ movhi
-	lsl	r3, sl, #9
+	ldr	r3, [sp, #8]
 	mov	r7, r0
-	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L400+72
-	lsrs	r3, r3, #8
-	cmp	r6, #1024
-	strh	r3, [r2, #0]	@ movhi
-	ldrh	r2, [r4, #26]
-	ldr	r3, .L400+76
-	ldr	r4, .L400+28
-	strh	r2, [r3, #0]	@ movhi
-	mul	r2, r6, r5
-	ldr	r3, .L400+80
-	ldrh	r0, [r4, #0]
-	str	r2, [r3, #0]
-	it	hi
-	uxtbhi	r2, r6
-	ldr	r3, .L400+24
-	it	hi
-	strhhi	r2, [r3, #0]	@ movhi
-	lsls	r0, r0, #3
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L400+84
-	subs	r2, r6, r2
+	ldr	ip, .L424+128
+	cmp	r4, #1024
+	ldr	lr, .L424+132
+	ldr	r2, [sp, #16]
+	strh	r0, [ip]	@ movhi
+	lsl	r0, r3, #9
+	ldr	r1, [sp, #12]
+	uxth	r0, r0
+	strh	r0, [lr]	@ movhi
+	lsr	r0, r0, #8
+	ldr	lr, .L424+136
+	mul	r1, r3, r1
+	strh	r0, [lr]	@ movhi
+	ldrh	lr, [r10, #26]
+	mov	r10, ip
+	ldr	r0, .L424+56
+	strh	lr, [r0]	@ movhi
+	mul	lr, r4, r5
+	ldr	r0, .L424+60
+	str	lr, [r0]
+	itt	hi
+	uxtbhi	r0, r4
+	strhhi	r0, [r2]	@ movhi
+	ldrh	r2, [r2]
+	subs	r2, r4, r2
 	muls	r2, r5, r2
-	mul	r2, sl, r2
-	mul	fp, fp, r2
-	asr	r2, fp, #11
-	str	r2, [r3, #0]
+	muls	r2, r3, r2
+	muls	r6, r2, r6
+	ldr	r2, .L424+64
+	asrs	r6, r6, #11
+	str	r6, [r2]
+	ldr	r6, .L424+28
+	ldrh	r0, [r6]
+	lsls	r0, r0, #3
 	bl	__aeabi_idiv
-	ldr	r3, .L400+88
 	uxth	r0, r0
-	strh	r0, [r3, #0]	@ movhi
+	mov	r3, r6
+	ldr	r6, .L424+68
 	cmp	r0, #4
-	bhi	.L393
-	movs	r2, #4
-	strh	r2, [r3, #0]	@ movhi
-.L393:
-	cmp	r8, #0
-	beq	.L394
-	mov	r3, #640
-	strh	r3, [r4, #0]	@ movhi
-.L394:
-	ldrh	r2, [r4, #0]
-	lsls	r6, r6, #6
-	ldr	r3, .L400+92
+	itt	ls
+	movls	r2, #4
+	strhls	r2, [r6]	@ movhi
+	ldr	r2, [sp, #4]
+	it	hi
+	strhhi	r0, [r6]	@ movhi
+	cbz	r2, .L408
+	mov	r2, #640
+	strh	r2, [r3]	@ movhi
+.L408:
+	ldrh	r3, [r3]
+	lsls	r4, r4, #6
+	ldr	r2, .L424+72
 	mov	r1, r5
-	ldr	r4, .L400+96
-	asr	r2, r2, r7
+	ldrh	r0, [r6]
+	asrs	r3, r3, r7
 	adds	r7, r7, #9
-	asr	r6, r6, r7
-	adds	r2, r2, #2
-	strh	r2, [r3, #0]	@ movhi
-	uxth	r6, r6
-	ldr	r3, .L400+100
-	mul	r2, r5, r6
-	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L400+104
-	adds	r6, r6, #8
-	str	r2, [r3, #0]
-	ldr	r3, .L400+88
-	ldrh	r0, [r3, #0]
-	bl	__aeabi_uidiv
-	cmp	r5, #1
-	uxtah	r6, r6, r0
-	str	r6, [r4, #0]
-	bne	.L395
-	adds	r6, r6, #4
-	str	r6, [r4, #0]
-.L395:
-	ldrh	r0, [r4, #0]
+	asrs	r4, r4, r7
+	ldr	r7, .L424+76
+	adds	r3, r3, #2
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L424+80
+	strh	r4, [r3]	@ movhi
+	uxth	r4, r4
+	mul	r3, r4, r5
+	adds	r4, r4, #8
+	str	r3, [r7]
+	bl	__aeabi_uidiv
+	uxtah	r0, r4, r0
+	ldr	r4, .L424+84
+	cmp	r5, #1
+	it	eq
+	addeq	r0, r0, #4
+	str	r0, [r4]
+	ldrh	r0, [r4]
 	bl	FtlSysBlkNumInit
-	ldr	r2, [r4, #0]
-	ldr	r3, .L400+108
-	str	r2, [r3, #0]
-	movs	r2, #24
-	ldr	r3, .L400+112
-	ldr	r1, [r3, #0]
-	ldr	r3, .L400+48
-	lsls	r1, r1, #2
-	ldrh	r3, [r3, #0]
-	muls	r1, r3, r1
-	ldr	r3, .L400+64
-	ldrh	r3, [r3, #0]
-	adds	r3, r3, #9
-	lsr	r1, r1, r3
-	ldr	r3, .L400+116
-	adds	r1, r1, #2
-	uxth	r1, r1
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L400+120
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #0
-	ldr	r3, .L400+124
-	str	r2, [r3, #0]
-	ldr	r2, .L400+88
-	ldrh	r4, [r2, #0]
-	adds	r3, r4, #3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L400+104
-	ldr	r0, [r3, #0]
-	adds	r5, r0, #3
-	str	r5, [r3, #0]
-	ldr	r5, .L400+128
-	ldrb	r5, [r5, #0]	@ zero_extendqisi2
-	cbz	r5, .L396
-	adds	r4, r4, #4
-	adds	r0, r0, #5
-	strh	r4, [r2, #0]	@ movhi
-	str	r0, [r3, #0]
-.L396:
-	ldr	r3, .L400+132
+	ldr	r2, [r4]
+	movs	r0, #24
+	ldr	r3, .L424+88
+	str	r2, [r3]
+	ldr	r3, .L424+92
+	ldr	r2, [r3]
+	ldrh	r3, [fp]
+	lsls	r2, r2, #2
+	muls	r3, r2, r3
+	ldrh	r2, [r10]
+	adds	r2, r2, #9
+	lsrs	r3, r3, r2
+	ldr	r2, .L424+96
+	adds	r3, r3, #2
+	uxth	r3, r3
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L424+100
+	strh	r0, [r2]	@ movhi
+	movs	r0, #0
+	ldr	r2, .L424+104
+	str	r0, [r2]
+	ldrh	r0, [r6]
+	adds	r2, r0, #3
+	strh	r2, [r6]	@ movhi
+	ldr	r2, [r7]
+	adds	r4, r2, #3
+	str	r4, [r7]
+	ldr	r4, .L424+108
+	ldrb	r4, [r4]	@ zero_extendqisi2
+	cbz	r4, .L411
+	adds	r0, r0, #4
+	adds	r2, r2, #5
+	strh	r0, [r6]	@ movhi
+	str	r2, [r7]
+.L411:
+	ldr	r1, .L424+112
 	movs	r2, #0
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L400+136
-	ldrh	r2, [r2, #0]
-	lsrs	r0, r2, #3
-	add	r2, r0, r2, lsl #1
-	adds	r2, r2, #52
-	add	r1, r2, r1, lsl #2
-	ldr	r2, .L400+60
-	ldrh	r2, [r2, #0]
-	cmp	r1, r2, lsl #9
-	bcs	.L397
-	movs	r2, #1
-	strh	r2, [r3, #0]	@ movhi
-.L397:
+	strh	r2, [r1]	@ movhi
+	ldr	r2, .L424+116
+	ldrh	r0, [r2]
+	lsrs	r2, r0, #3
+	add	r2, r2, r0, lsl #1
 	movs	r0, #0
-	add	sp, sp, #32
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L401:
+	adds	r2, r2, #52
+	add	r3, r2, r3, lsl #2
+	ldrh	r2, [r8]
+	cmp	r3, r2, lsl #9
+	itt	cc
+	movcc	r3, #1
+	strhcc	r3, [r1]	@ movhi
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L425:
 	.align	2
-.L400:
+.L424:
+	.word	.LANCHOR42
+	.word	.LANCHOR39
+	.word	.LANCHOR44
+	.word	.LANCHOR45
+	.word	.LANCHOR43
+	.word	.LANCHOR46
 	.word	.LANCHOR47
 	.word	.LANCHOR48
-	.word	.LANCHOR50
+	.word	.LANCHOR1
+	.word	.LANCHOR36
 	.word	.LANCHOR49
-	.word	.LANCHOR44
-	.word	.LANCHOR51
+	.word	.LANCHOR50
 	.word	.LANCHOR52
 	.word	.LANCHOR53
-	.word	.LANCHOR0
-	.word	.LANCHOR41
-	.word	.LANCHOR54
-	.word	.LANCHOR55
-	.word	.LANCHOR56
-	.word	.LANCHOR57
 	.word	.LANCHOR58
+	.word	.LANCHOR41
 	.word	.LANCHOR59
 	.word	.LANCHOR60
 	.word	.LANCHOR61
-	.word	.LANCHOR62
 	.word	.LANCHOR63
-	.word	.LANCHOR46
+	.word	.LANCHOR62
+	.word	.LANCHOR35
 	.word	.LANCHOR64
+	.word	.LANCHOR40
 	.word	.LANCHOR65
 	.word	.LANCHOR66
-	.word	.LANCHOR40
 	.word	.LANCHOR67
+	.word	.LANCHOR8
 	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR45
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR7
-	.word	.LANCHOR73
-	.word	.LANCHOR43
+	.word	.LANCHOR38
+	.word	.LANCHOR51
+	.word	.LANCHOR54
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.word	.LANCHOR57
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
 	.global	IsBlkInVendorPart
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	IsBlkInVendorPart, %function
 IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L409
-	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L407
-	ldr	r3, .L409+4
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L409+8
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	b	.L404
-.L406:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L408
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L404:
-	cmp	r3, r1
-	bne	.L406
+	@ link register save eliminated.
+	ldr	r3, .L433
+	ldrh	r3, [r3]
+	cbz	r3, .L432
+	ldr	r3, .L433+4
+	ldr	r2, .L433+8
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L428:
+	cmp	r3, r2
+	bne	.L429
+.L432:
 	movs	r0, #0
-	pop	{r4, pc}
-.L408:
+	bx	lr
+.L429:
+	ldrh	r1, [r3], #2
+	cmp	r0, r1
+	bne	.L428
 	movs	r0, #1
-	pop	{r4, pc}
-.L407:
-	mov	r0, r3
-	pop	{r4, pc}
-.L410:
+	bx	lr
+.L434:
 	.align	2
-.L409:
-	.word	.LANCHOR74
-	.word	.LANCHOR65
-	.word	.LANCHOR75
+.L433:
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR60
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
 	.global	FtlGetCap
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetCap, %function
 FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L412
-	ldr	r0, [r3, #0]
+	ldr	r3, .L436
+	ldr	r0, [r3]
 	bx	lr
-.L413:
+.L437:
 	.align	2
-.L412:
-	.word	.LANCHOR72
+.L436:
+	.word	.LANCHOR67
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
 	.align	1
 	.global	FtlGetCapacity
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetCapacity, %function
 FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L415
-	ldr	r0, [r3, #0]
+	ldr	r3, .L439
+	ldr	r0, [r3]
 	bx	lr
-.L416:
+.L440:
 	.align	2
-.L415:
-	.word	.LANCHOR72
+.L439:
+	.word	.LANCHOR67
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
 	.align	1
 	.global	ftl_get_density
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_get_density, %function
 ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L418
-	ldr	r0, [r3, #0]
+	ldr	r3, .L442
+	ldr	r0, [r3]
 	bx	lr
-.L419:
+.L443:
 	.align	2
-.L418:
-	.word	.LANCHOR72
+.L442:
+	.word	.LANCHOR67
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
 	.align	1
 	.global	FtlGetLpn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetLpn, %function
 FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L421
-	ldr	r0, [r3, #0]
+	ldr	r3, .L445
+	ldr	r0, [r3]
 	bx	lr
-.L422:
+.L446:
 	.align	2
-.L421:
-	.word	.LANCHOR76
+.L445:
+	.word	.LANCHOR71
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
 	.global	FtlGetCurEraseBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetCurEraseBlock, %function
 FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L424
-	ldr	r3, .L424+4
-	ldr	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
+	ldr	r2, .L448
+	ldr	r3, .L448+4
+	ldr	r0, [r2]
+	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L425:
+.L449:
 	.align	2
-.L424:
-	.word	.LANCHOR77
-	.word	.LANCHOR41
+.L448:
+	.word	.LANCHOR72
+	.word	.LANCHOR36
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
 	.align	1
 	.global	FtlGetAllBlockNum
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGetAllBlockNum, %function
 FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L427
-	ldr	r3, .L427+4
-	ldrh	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
+	ldr	r2, .L451
+	ldr	r3, .L451+4
+	ldrh	r0, [r2]
+	ldrh	r3, [r3]
 	muls	r0, r3, r0
 	bx	lr
-.L428:
+.L452:
 	.align	2
-.L427:
-	.word	.LANCHOR41
-	.word	.LANCHOR44
+.L451:
+	.word	.LANCHOR36
+	.word	.LANCHOR39
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
 	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
 	.align	1
 	.global	FtlBbmMapBadBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlBbmMapBadBlock, %function
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L430
+	ldr	r3, .L454
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldrh	r4, [r3, #0]
-	movs	r7, #1
+	ldrh	r4, [r3]
 	mov	r1, r4
 	bl	__aeabi_uidiv
-	uxth	r2, r0
-	mls	r3, r4, r2, r5
-	ldr	r4, .L430+4
-	add	r1, r4, r2, lsl #2
-	ldr	r0, [r1, #28]
-	uxth	r3, r3
-	and	r1, r3, #31
-	lsrs	r6, r3, #5
-	lsl	r1, r7, r1
-	ldr	r7, [r0, r6, lsl #2]
-	orrs	r1, r1, r7
-	str	r1, [r0, r6, lsl #2]
-	str	r1, [sp, #0]
+	mov	r1, r4
+	ldr	r4, .L454+4
+	uxth	r6, r0
+	mov	r0, r5
+	bl	__aeabi_uidivmod
+	add	r2, r4, r6, lsl #2
+	uxth	r3, r1
+	ldr	r2, [r2, #28]
+	lsrs	r1, r3, #5
+	and	r7, r3, #31
+	movs	r0, #1
+	lsls	r0, r0, r7
+	ldr	r7, [r2, r1, lsl #2]
+	orrs	r0, r0, r7
+	str	r0, [r2, r1, lsl #2]
+	mov	r2, r6
+	str	r0, [sp]
 	mov	r1, r5
-	ldr	r0, .L430+8
+	ldr	r0, .L454+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L431:
+	add	sp, sp, #12
+	@ sp needed
+	pop	{r4, r5, r6, r7, pc}
+.L455:
 	.align	2
-.L430:
-	.word	.LANCHOR54
-	.word	.LANCHOR78
+.L454:
+	.word	.LANCHOR49
+	.word	.LANCHOR73
 	.word	.LC2
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
-	.global	__aeabi_uidivmod
 	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
 	.align	1
 	.global	FtlBbmIsBadBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlBbmIsBadBlock, %function
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L433
+	ldr	r3, .L457
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
-	ldrh	r5, [r3, #0]
+	ldrh	r5, [r3]
 	mov	r1, r5
 	bl	__aeabi_uidivmod
 	mov	r0, r6
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L433+4
+	ldr	r3, .L457+4
+	uxth	r0, r0
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
-	uxth	r0, r0
 	add	r0, r3, r0, lsl #2
 	ldr	r3, [r0, #28]
 	ldr	r0, [r3, r2, lsl #2]
-	lsr	r0, r0, r4
+	lsrs	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L434:
+.L458:
 	.align	2
-.L433:
-	.word	.LANCHOR54
-	.word	.LANCHOR78
+.L457:
+	.word	.LANCHOR49
+	.word	.LANCHOR73
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
 	.global	FtlBbtInfoPrint
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlBbtInfoPrint, %function
 FtlBbtInfoPrint:
 	@ args = 0, pretend = 0, frame = 0
@@ -3432,194 +3114,120 @@ FtlBbtInfoPrint:
 	@ link register save eliminated.
 	bx	lr
 	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
-	.align	1
-	.global	FtlBbt2Bitmap
-	.thumb
-	.thumb_func
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L441
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldrh	r2, [r3, #0]
-	mov	r0, r1
-	mov	r5, r1
-	movs	r1, #0
-	ldr	r7, .L441+4
-	movs	r4, #0
-	lsls	r2, r2, #2
-	movw	r8, #65535
-	bl	memset
-.L439:
-	ldrh	r3, [r6, r4]
-	cmp	r3, r8
-	beq	.L436
-	ldrh	r2, [r7, #0]
-	cmp	r2, r3
-	bhi	.L438
-	ldr	r1, .L441+8
-	movs	r2, #79
-	ldr	r0, .L441+12
-	bl	printf
-	ldr	r0, .L441+16
-	ldr	r1, .L441+20
-	bl	printf
-.L438:
-	ldrh	r2, [r6, r4]
-	movs	r1, #1
-	adds	r4, r4, #2
-	lsrs	r3, r2, #5
-	and	r2, r2, #31
-	lsl	r2, r1, r2
-	cmp	r4, #1024
-	ldr	r1, [r5, r3, lsl #2]
-	orr	r2, r1, r2
-	str	r2, [r5, r3, lsl #2]
-	bne	.L439
-.L436:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L442:
-	.align	2
-.L441:
-	.word	.LANCHOR79
-	.word	.LANCHOR54
-	.word	.LANCHOR80
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
-	.align	1
-	.global	FtlBbtMemInit
-	.thumb
-	.thumb_func
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L444
-	movw	r3, #65535
-	movs	r1, #255
-	movs	r2, #16
-	strh	r3, [r0, #0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	memset
-.L445:
-	.align	2
-.L444:
-	.word	.LANCHOR78
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
 	.global	V2P_block
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	V2P_block, %function
 V2P_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	mov	r7, r1
-	ldr	r3, .L447
-	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	muls	r7, r4, r7
-	mov	r1, r4
+	mov	r5, r1
+	ldr	r3, .L461
+	mov	r7, r0
+	ldrh	r6, [r3]
+	mov	r1, r6
 	bl	__aeabi_uidiv
-	ldr	r3, .L447+4
-	mov	r1, r4
-	ldrh	r5, [r3, #0]
-	mla	r5, r0, r5, r7
-	mov	r0, r6
+	ldr	r3, .L461+4
+	smulbb	r5, r6, r5
+	mov	r1, r6
+	ldrh	r4, [r3]
+	smulbb	r4, r4, r0
+	mov	r0, r7
 	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
-	uxth	r0, r1
+	adds	r0, r5, r1
+	add	r0, r0, r4
+	uxth	r0, r0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L448:
+.L462:
 	.align	2
-.L447:
+.L461:
+	.word	.LANCHOR44
 	.word	.LANCHOR49
-	.word	.LANCHOR54
 	.size	V2P_block, .-V2P_block
 	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
 	.global	P2V_plane
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	P2V_plane, %function
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L450
+	ldr	r3, .L464
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	ldr	r3, .L450+4
-	ldrh	r1, [r3, #0]
+	ldrh	r5, [r3]
+	ldr	r3, .L464+4
+	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
-	mov	r1, r4
-	mul	r5, r0, r4
+	smulbb	r4, r0, r5
+	mov	r1, r5
 	mov	r0, r6
 	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
+	add	r1, r1, r4
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L451:
+.L465:
 	.align	2
-.L450:
+.L464:
+	.word	.LANCHOR44
 	.word	.LANCHOR49
-	.word	.LANCHOR54
 	.size	P2V_plane, .-P2V_plane
 	.section	.text.P2V_block_in_plane,"ax",%progbits
 	.align	1
 	.global	P2V_block_in_plane
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	P2V_block_in_plane, %function
 P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L453
-	ldrh	r1, [r3, #0]
+	ldr	r3, .L467
+	ldrh	r1, [r3]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L453+4
+	ldr	r3, .L467+4
 	uxth	r0, r1
-	ldrh	r1, [r3, #0]
+	ldrh	r1, [r3]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L454:
+.L468:
 	.align	2
-.L453:
-	.word	.LANCHOR54
+.L467:
 	.word	.LANCHOR49
+	.word	.LANCHOR44
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
 	.section	.text.ftl_cmp_data_ver,"ax",%progbits
 	.align	1
 	.global	ftl_cmp_data_ver
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_cmp_data_ver, %function
 ftl_cmp_data_ver:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L456
+	bls	.L470
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L456:
+.L470:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -3627,2349 +3235,1871 @@ ftl_cmp_data_ver:
 	movhi	r0, #1
 	bx	lr
 	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
-	.align	1
-	.global	FtlFreeSysBlkQueueInit
-	.thumb
-	.thumb_func
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L459
-	mov	r2, #2048
-	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	memset
-	mov	r0, r4
-	pop	{r4, pc}
-.L460:
-	.align	2
-.L459:
-	.word	.LANCHOR81
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueEmpty
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueEmpty, %function
 FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L462
+	ldr	r3, .L473
 	ldrh	r0, [r3, #6]
-	rsbs	r0, r0, #1
-	it	cc
-	movcc	r0, #0
+	clz	r0, r0
+	lsrs	r0, r0, #5
 	bx	lr
-.L463:
+.L474:
 	.align	2
-.L462:
-	.word	.LANCHOR81
+.L473:
+	.word	.LANCHOR74
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueFull
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueFull, %function
 FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L465
+	ldr	r3, .L476
 	ldrh	r0, [r3, #6]
-	sub	r1, r0, #1024
-	rsbs	r0, r1, #0
-	adc	r0, r0, r1
+	sub	r3, r0, #1024
+	rsbs	r0, r3, #0
+	adcs	r0, r0, r3
 	bx	lr
-.L466:
+.L477:
 	.align	2
-.L465:
-	.word	.LANCHOR81
+.L476:
+	.word	.LANCHOR74
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueIn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueIn, %function
 FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, .L470
-	ldrh	r3, [r3, #6]
+	push	{r4, r5, r6, lr}
+	mov	r5, r0
+	ldr	r4, .L487
+	ldrh	r3, [r4, #6]
 	cmp	r3, #1024
-	beq	.L467
-	cbz	r1, .L469
-	ldr	r3, .L470+4
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L469
+	beq	.L478
+	cbz	r1, .L480
+	ldr	r3, .L487+4
+	ldr	r3, [r3]
+	cbnz	r3, .L480
 	bl	P2V_block_in_plane
-	ldr	r3, .L470+8
-	movs	r1, #1
-	mov	r2, r1
-	mov	r5, r0
-	ldr	r0, [r3, #0]
-	lsls	r3, r4, #10
+	ldr	r3, .L487+8
+	mov	r6, r0
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	lsls	r3, r5, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L470+12
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L470+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-.L469:
-	ldr	r3, .L470
-	ldrh	r2, [r3, #6]
-	adds	r2, r2, #1
-	strh	r2, [r3, #6]	@ movhi
-	ldrh	r2, [r3, #4]
-	adds	r1, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #4]	@ movhi
-	strh	r4, [r3, r1, lsl #1]	@ movhi
-.L467:
-	pop	{r3, r4, r5, pc}
-.L471:
+	ldr	r3, .L487+12
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L487+16
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L480:
+	ldrh	r3, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	ldrh	r3, [r4, #4]
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	strh	r5, [r4, r2, lsl #1]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+.L478:
+	pop	{r4, r5, r6, pc}
+.L488:
 	.align	2
-.L470:
-	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR84
-	.word	.LANCHOR85
+.L487:
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	.LANCHOR78
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBLkSort
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBLkSort, %function
 FtlFreeSysBLkSort:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	ldr	r5, .L482
-	ldr	r7, .L482+4
-	ldr	r6, .L482+8
-	b	.L473
-.L474:
-	add	r8, r4, r8
-	add	r8, r8, #4
-	ldrh	r0, [r5, r8, lsl #1]
-	bl	P2V_block_in_plane
-	ldr	r2, [r6, #0]
-	ldr	r3, [r7, #0]
-	ldrh	r2, [r2, r0, lsl #1]
-	str	r2, [r3, r4, lsl #2]
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L473:
-	ldrh	ip, [r5, #6]
-	ldrh	r8, [r5, #2]
-	cmp	r4, ip
-	bcc	.L474
-	ldr	r3, .L482+4
-	add	r6, ip, #-1
-	ldr	r4, .L482
-	ldr	r1, [r3, #0]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r4, .L498
+	ldr	r3, .L498+4
+	ldrh	r7, [r4, #2]
+	ldrh	r6, [r4, #6]
+	ldr	r5, [r3]
+	ldr	r3, .L498+8
+	add	r8, r4, r7, lsl #1
+	mov	r10, r5
+	ldr	r3, [r3]
+	add	fp, r5, r6, lsl #2
+	add	r8, r8, #6
+.L490:
+	cmp	r10, fp
+	bne	.L491
 	movs	r3, #0
-	b	.L475
-.L480:
-	adds	r5, r3, #1
+	add	lr, r6, #-1
+.L492:
+	cmp	r3, lr
+	blt	.L497
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L491:
+	ldrh	r0, [r8, #2]!
+	str	r3, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, [sp, #4]
+	ldrh	r2, [r3, r0, lsl #1]
+	str	r2, [r10], #4
+	b	.L490
+.L497:
+	add	ip, r3, #1
 	mov	r2, r3
-	uxth	r5, r5
-	mov	r0, r5
-	b	.L476
-.L478:
-	ldr	r7, [r1, r0, lsl #2]
-	ldr	sl, [r1, r2, lsl #2]
-	cmp	sl, r7
-	it	hi
-	movhi	r2, r0
-	adds	r0, r0, #1
-	uxth	r0, r0
-.L476:
-	cmp	r0, ip
-	bcc	.L478
+	uxth	ip, ip
+	mov	r8, ip
+.L493:
+	cmp	r8, r6
+	bcc	.L495
 	cmp	r3, r2
-	beq	.L479
-	ldr	r0, [r1, r2, lsl #2]
-	ldr	r7, [r1, r3, lsl #2]
-	str	r7, [r1, r2, lsl #2]
-	add	r2, r8, r2
-	str	r0, [r1, r3, lsl #2]
-	add	r3, r8, r3
+	beq	.L496
+	ldr	r0, [r5, r2, lsl #2]
+	ldr	r1, [r5, r3, lsl #2]
+	str	r1, [r5, r2, lsl #2]
+	add	r2, r2, r7
+	str	r0, [r5, r3, lsl #2]
+	add	r3, r3, r7
 	adds	r2, r2, #4
 	adds	r3, r3, #4
-	ldrh	r0, [r4, r2, lsl #1]
-	ldrh	r7, [r4, r3, lsl #1]
-	strh	r7, [r4, r2, lsl #1]	@ movhi
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-.L479:
-	mov	r3, r5
-.L475:
-	cmp	r3, r6
-	blt	.L480
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L483:
+	ldrh	r1, [r4, r2, lsl #1]
+	ldrh	r0, [r4, r3, lsl #1]
+	strh	r0, [r4, r2, lsl #1]	@ movhi
+	strh	r1, [r4, r3, lsl #1]	@ movhi
+.L496:
+	mov	r3, ip
+	b	.L492
+.L495:
+	ldr	r1, [r5, r8, lsl #2]
+	ldr	r0, [r5, r2, lsl #2]
+	cmp	r0, r1
+	it	hi
+	movhi	r2, r8
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L493
+.L499:
 	.align	2
-.L482:
-	.word	.LANCHOR81
-	.word	.LANCHOR86
-	.word	.LANCHOR84
+.L498:
+	.word	.LANCHOR74
+	.word	.LANCHOR79
+	.word	.LANCHOR77
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
 	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
 	.global	remove_from_free_sys_Queue
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	remove_from_free_sys_Queue, %function
 remove_from_free_sys_Queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L490
+	push	{r3, r4, r5, lr}
 	mov	r1, r0
-	push	{r4, r5, r6, lr}
-	ldrh	r0, [r3, #6]
-	cbz	r0, .L485
-	ldrh	r2, [r3, #2]
-	movs	r5, #0
-	b	.L486
-.L488:
-	adds	r6, r5, r2
-	ldr	r4, .L490
-	lsls	r6, r6, #22
-	add	r6, r3, r6, lsr #21
-	ldrh	r6, [r6, #8]
-	cmp	r6, r1
-	bne	.L487
-	ldr	r0, .L490+4
+	ldr	r5, .L507
+	ldrh	r3, [r5, #6]
+	cbz	r3, .L506
+	ldrh	r0, [r5, #2]
+	movs	r4, #0
+.L502:
+	cmp	r4, r3
+	bcc	.L504
+.L506:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L504:
+	adds	r2, r4, r0
+	ubfx	r2, r2, #0, #10
+	adds	r2, r2, #4
+	ldrh	r2, [r5, r2, lsl #1]
+	cmp	r2, r1
+	bne	.L503
+	ldr	r0, .L507+4
 	bl	printf
-	ldrh	r3, [r4, #2]
+	ldrh	r3, [r5, #2]
 	movs	r0, #1
-	adds	r5, r5, r3
 	adds	r2, r3, #4
+	add	r4, r4, r3
 	adds	r3, r3, #1
-	lsls	r5, r5, #22
-	ldrh	r2, [r4, r2, lsl #1]
-	bic	r3, r3, #64512
-	strh	r3, [r4, #2]	@ movhi
-	add	r5, r4, r5, lsr #21
-	ldrh	r3, [r4, #6]
-	strh	r2, [r5, #8]	@ movhi
+	ldrh	r2, [r5, r2, lsl #1]
+	ubfx	r3, r3, #0, #10
+	ubfx	r4, r4, #0, #10
+	strh	r3, [r5, #2]	@ movhi
+	adds	r4, r4, #4
+	ldrh	r3, [r5, #6]
+	strh	r2, [r5, r4, lsl #1]	@ movhi
 	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	pop	{r4, r5, r6, pc}
-.L487:
-	adds	r5, r5, #1
-.L486:
-	cmp	r5, r0
-	bcc	.L488
-	movs	r0, #0
-.L485:
-	pop	{r4, r5, r6, pc}
-.L491:
+	strh	r3, [r5, #6]	@ movhi
+	pop	{r3, r4, r5, pc}
+.L503:
+	adds	r4, r4, #1
+	b	.L502
+.L508:
 	.align	2
-.L490:
-	.word	.LANCHOR81
-	.word	.LC6
+.L507:
+	.word	.LANCHOR74
+	.word	.LC3
 	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueOut
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlFreeSysBlkQueueOut, %function
 FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L516
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L496
-	ldrh	r1, [r3, #6]
-	cmp	r1, #0
-	beq	.L495
-	ldrh	r2, [r3, #2]
+	ldrh	r1, [r2, #6]
+	cbz	r1, .L512
+	ldrh	r3, [r2, #2]
 	subs	r1, r1, #1
-	strh	r1, [r3, #6]	@ movhi
-	adds	r0, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #2]	@ movhi
-	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L496+4
-	ldr	r7, [r3, #0]
-	cbnz	r7, .L493
+	strh	r1, [r2, #6]	@ movhi
+	adds	r0, r3, #4
+	adds	r3, r3, #1
+	ubfx	r3, r3, #0, #10
+	ldrh	r4, [r2, r0, lsl #1]
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L516+4
+	ldr	r7, [r3]
+	cbnz	r7, .L510
+	ldr	r5, .L516+8
 	mov	r0, r4
-	ldr	r6, .L496+8
 	bl	P2V_block_in_plane
-	lsls	r3, r4, #10
-	mov	r5, r0
-	ldr	r0, [r6, #0]
-	str	r3, [r0, #4]
-	ldr	r3, .L496+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L494
-	mov	r1, r7
+	mov	r6, r0
+	lsls	r2, r4, #10
+	ldr	r0, [r5]
+	str	r2, [r0, #4]
+	ldr	r2, .L516+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbz	r2, .L511
 	movs	r2, #1
+	mov	r1, r7
 	bl	FlashEraseBlocks
-.L494:
-	movs	r1, #1
-	ldr	r0, [r6, #0]
-	mov	r2, r1
+.L511:
+	movs	r2, #1
+	ldr	r0, [r5]
+	mov	r1, r2
 	bl	FlashEraseBlocks
-	ldr	r3, .L496+16
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L496+20
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	b	.L493
-.L495:
-	movw	r4, #65535
-.L493:
+	ldr	r3, .L516+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	adds	r3, r3, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	ldr	r2, .L516+20
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L510:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L497:
+.L512:
+	movw	r4, #65535
+	b	.L510
+.L517:
 	.align	2
-.L496:
-	.word	.LANCHOR81
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR7
-	.word	.LANCHOR84
-	.word	.LANCHOR85
+.L516:
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.word	.LANCHOR76
+	.word	.LANCHOR8
+	.word	.LANCHOR77
+	.word	.LANCHOR78
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
 	.global	insert_data_list
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	insert_data_list, %function
 insert_data_list:
-	@ args = 0, pretend = 0, frame = 24
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L514
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldrh	fp, [r3, #0]
-	cmp	r0, fp
-	bcs	.L499
-	ldr	r3, .L514+4
-	movs	r6, #6
-	muls	r6, r0, r6
-	ldr	r1, [r3, #0]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L534
+	ldrh	lr, [r3]
+	cmp	lr, r0
+	bls	.L520
+	ldr	r3, .L534+4
+	movs	r5, #6
+	ldr	r4, [r3]
+	mul	r3, r5, r0
+	str	r3, [sp, #4]
+	adds	r1, r4, r3
+	ldr	r2, [sp, #4]
 	movw	r3, #65535
-	adds	r2, r1, r6
-	strh	r3, [r1, r6]	@ movhi
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L514+8
-	ldr	r5, [r3, #0]
-	cmp	r5, #0
-	beq	.L513
-.L500:
-	ldr	r3, .L514+12
-	ldrh	r4, [r2, #4]
-	ldr	ip, [r3, #0]
-	lsls	r3, r0, #1
-	ldrh	r7, [ip, r0, lsl #1]
-	cbz	r4, .L509
-	muls	r4, r7, r4
-	b	.L512
-.L509:
-	mov	r4, #-1
-.L512:
-	str	r4, [sp, #8]
-	subs	r4, r5, r1
-	ldr	r7, .L514+16
-	mov	sl, r2
-	asrs	r4, r4, #1
-	muls	r4, r7, r4
-	ldr	r7, .L514+20
-	uxth	r4, r4
-	str	ip, [sp, #4]
-	ldr	r7, [r7, #0]
-	adds	r3, r7, r3
-	str	r3, [sp, #20]
-	str	r7, [sp, #12]
-	mov	r3, r5
-	movs	r7, #0
-.L507:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, fp
-	bhi	.L499
-	cmp	r0, r4
-	beq	.L499
-	ldr	r2, [sp, #4]
-	lsl	r8, r4, #1
-	str	r8, [sp, #16]
-	ldrh	r8, [r2, r4, lsl #1]
-	ldrh	r2, [r3, #4]
-	cbz	r2, .L510
-	mul	r2, r2, r8
-	b	.L502
-.L510:
-	mov	r2, #-1
-.L502:
-	ldr	r8, [sp, #8]
-	cmp	r2, r8
-	bne	.L503
-	ldr	r2, [sp, #12]
-	ldr	ip, [sp, #16]
-	ldrh	r8, [r2, ip]
-	ldr	r2, [sp, #20]
-	ldrh	ip, [r2, #0]
-	cmp	r8, ip
-	bcc	.L505
-	b	.L511
-.L503:
-	bhi	.L511
-.L505:
-	ldrh	r2, [r3, #0]
-	movw	r8, #65535
-	cmp	r2, r8
-	bne	.L506
-	mov	r2, sl
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L514+24
-	strh	r4, [r2, #2]	@ movhi
-	b	.L513
-.L506:
-	mov	ip, #6
-	mov	r4, r2
-	mla	r3, ip, r2, r1
-	b	.L507
-.L511:
-	strh	r4, [r1, r6]	@ movhi
-	mov	r2, sl
-	ldrh	r4, [r3, #2]
-	cmp	r3, r5
-	strh	r4, [r2, #2]	@ movhi
-	bne	.L508
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L514+8
-.L513:
-	str	r2, [r3, #0]
-	b	.L499
-.L508:
-	ldrh	r2, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r2, r4, r2
-	strh	r0, [r1, r2]	@ movhi
-.L499:
+	strh	r3, [r1, #2]	@ movhi
+	strh	r3, [r4, r2]	@ movhi
+	ldr	r3, .L534+8
+	ldr	ip, [r3]
+	cmp	ip, #0
+	bne	.L521
+.L533:
+	str	r1, [r3]
+.L520:
 	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L515:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L521:
+	ldr	r3, .L534+12
+	lsls	r2, r0, #1
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldrh	r6, [r3, r0, lsl #1]
+	ldrh	r3, [r1, #4]
+	cbz	r3, .L531
+	mul	fp, r3, r6
+.L522:
+	sub	r3, ip, r4
+	asrs	r6, r3, #1
+	ldr	r3, .L534+16
+	muls	r3, r6, r3
+	ldr	r6, .L534+20
+	ldr	r8, [r6]
+	movs	r6, #0
+	uxth	r3, r3
+	add	r2, r8, r2
+	str	r2, [sp, #12]
+	mov	r2, ip
+.L529:
+	adds	r6, r6, #1
+	uxth	r6, r6
+	cmp	lr, r6
+	bcc	.L520
+	cmp	r3, r0
+	beq	.L520
+	ldr	r7, [sp, #8]
+	lsl	r10, r3, #1
+	ldrh	r7, [r7, r3, lsl #1]
+	mov	r5, r7
+	ldrh	r7, [r2, #4]
+	cbz	r7, .L532
+	muls	r7, r5, r7
+.L524:
+	cmp	fp, r7
+	bne	.L525
+	ldr	r5, [sp, #12]
+	ldrh	r10, [r8, r10]
+	ldrh	r7, [r5]
+	cmp	r10, r7
+	bcc	.L527
+.L526:
+	ldr	r5, [sp, #4]
+	cmp	r2, ip
+	strh	r3, [r4, r5]	@ movhi
+	ldrh	r3, [r2, #2]
+	strh	r3, [r1, #2]	@ movhi
+	bne	.L530
+	strh	r0, [r2, #2]	@ movhi
+	ldr	r3, .L534+8
+	b	.L533
+.L531:
+	mov	fp, #-1
+	b	.L522
+.L532:
+	mov	r7, #-1
+	b	.L524
+.L525:
+	bcc	.L526
+.L527:
+	ldrh	r7, [r2]
+	movw	r5, #65535
+	cmp	r7, r5
+	bne	.L528
+	strh	r3, [r1, #2]	@ movhi
+	strh	r0, [r2]	@ movhi
+	ldr	r3, .L534+24
+	b	.L533
+.L528:
+	movs	r3, #6
+	mla	r2, r3, r7, r4
+	mov	r3, r7
+	b	.L529
+.L530:
+	ldrh	r1, [r2, #2]
+	movs	r3, #6
+	muls	r3, r1, r3
+	strh	r0, [r4, r3]	@ movhi
+	strh	r0, [r2, #2]	@ movhi
+	b	.L520
+.L535:
 	.align	2
-.L514:
-	.word	.LANCHOR43
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR89
+.L534:
+	.word	.LANCHOR38
+	.word	.LANCHOR80
+	.word	.LANCHOR81
+	.word	.LANCHOR82
 	.word	-1431655765
-	.word	.LANCHOR84
-	.word	.LANCHOR90
+	.word	.LANCHOR77
+	.word	.LANCHOR83
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
 	.global	INSERT_DATA_LIST
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	INSERT_DATA_LIST, %function
 INSERT_DATA_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L518
-	ldrh	r3, [r2, #0]
+	ldr	r2, .L538
+	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L518+4
-	ldrh	r2, [r2, #0]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L538+4
+	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L516
-	ldr	r1, .L518+8
+	bcs	.L536
+	ldr	r1, .L538+8
 	movs	r2, #205
-	ldr	r0, .L518+12
+	ldr	r0, .L538+12
 	bl	printf
-	ldr	r0, .L518+16
-	ldr	r1, .L518+20
+	ldr	r1, .L538+16
+	ldr	r0, .L538+20
 	pop	{r3, lr}
 	b	printf
-.L516:
+.L536:
 	pop	{r3, pc}
-.L519:
+.L539:
 	.align	2
-.L518:
-	.word	.LANCHOR91
-	.word	.LANCHOR43
-	.word	.LANCHOR92
-	.word	.LC3
+.L538:
+	.word	.LANCHOR84
+	.word	.LANCHOR38
+	.word	.LANCHOR85
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
 	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
 	.global	insert_free_list
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	insert_free_list, %function
 insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movw	r8, #65535
-	cmp	r0, r8
-	beq	.L521
-	ldr	r3, .L528
-	mov	fp, #6
-	mul	r6, fp, r0
-	ldr	r2, [r3, #0]
-	ldr	r3, .L528+4
-	adds	r1, r2, r6
-	ldr	r4, [r3, #0]
-	strh	r8, [r1, #2]	@ movhi
-	strh	r8, [r2, r6]	@ movhi
-	cbz	r4, .L527
-.L522:
-	ldr	r3, .L528+8
-	subs	r5, r4, r2
-	asrs	r5, r5, #1
-	ldr	ip, [r3, #0]
-	ldr	r3, .L528+12
-	muls	r5, r3, r5
-	mov	r3, r4
-	uxth	r5, r5
-	ldrh	sl, [ip, r0, lsl #1]
-.L525:
-	ldrh	r7, [ip, r5, lsl #1]
-	cmp	r7, sl
-	bcs	.L523
-	ldrh	r7, [r3, #0]
-	cmp	r7, r8
-	bne	.L524
-	strh	r5, [r1, #2]	@ movhi
-	strh	r0, [r3, #0]	@ movhi
-	b	.L521
-.L524:
-	mla	r3, fp, r7, r2
-	mov	r5, r7
-	b	.L525
-.L523:
-	ldrh	r7, [r3, #2]
-	cmp	r3, r4
-	strh	r5, [r2, r6]	@ movhi
-	strh	r7, [r1, #2]	@ movhi
-	bne	.L526
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L528+4
-.L527:
-	str	r1, [r3, #0]
-	b	.L521
-.L526:
-	ldrh	r1, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r1, r4, r1
-	strh	r0, [r2, r1]	@ movhi
-.L521:
+	movw	r1, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	cmp	r0, r1
+	beq	.L541
+	ldr	r3, .L547
+	mov	r10, #6
+	mul	r7, r10, r0
+	ldr	r4, [r3]
+	ldr	r3, .L547+4
+	adds	r5, r4, r7
+	ldr	r6, [r3]
+	mov	lr, r3
+	strh	r1, [r5, #2]	@ movhi
+	strh	r1, [r4, r7]	@ movhi
+	cbnz	r6, .L542
+	str	r5, [r3]
+.L541:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L529:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L542:
+	ldr	r3, .L547+8
+	subs	r2, r6, r4
+	mov	fp, r1
+	ldr	ip, [r3]
+	asrs	r3, r2, #1
+	ldr	r2, .L547+12
+	ldrh	r8, [ip, r0, lsl #1]
+	muls	r2, r3, r2
+	mov	r3, r6
+	uxth	r2, r2
+.L545:
+	ldrh	r1, [ip, r2, lsl #1]
+	cmp	r1, r8
+	bcs	.L543
+	ldrh	r1, [r3]
+	cmp	r1, fp
+	bne	.L544
+	strh	r2, [r5, #2]	@ movhi
+	strh	r0, [r3]	@ movhi
+	b	.L541
+.L544:
+	mla	r3, r10, r1, r4
+	mov	r2, r1
+	b	.L545
+.L543:
+	ldrh	r1, [r3, #2]
+	cmp	r3, r6
+	strh	r1, [r5, #2]	@ movhi
+	it	ne
+	ldrhne	r1, [r3, #2]
+	strh	r2, [r4, r7]	@ movhi
+	iteet	ne
+	movne	r2, #6
+	strheq	r0, [r3, #2]	@ movhi
+	streq	r5, [lr]
+	mulne	r2, r2, r1
+	itt	ne
+	strhne	r0, [r4, r2]	@ movhi
+	strhne	r0, [r3, #2]	@ movhi
+	b	.L541
+.L548:
 	.align	2
-.L528:
-	.word	.LANCHOR87
-	.word	.LANCHOR93
-	.word	.LANCHOR84
+.L547:
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR77
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
 	.global	INSERT_FREE_LIST
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	INSERT_FREE_LIST, %function
 INSERT_FREE_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L532
-	ldrh	r3, [r2, #0]
+	ldr	r2, .L551
+	ldrh	r3, [r2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L532+4
-	ldrh	r2, [r2, #0]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L551+4
+	ldrh	r2, [r2]
 	cmp	r2, r3
-	bcs	.L530
-	ldr	r1, .L532+8
+	bcs	.L549
+	ldr	r1, .L551+8
 	movs	r2, #198
-	ldr	r0, .L532+12
+	ldr	r0, .L551+12
 	bl	printf
-	ldr	r0, .L532+16
-	ldr	r1, .L532+20
+	ldr	r1, .L551+16
+	ldr	r0, .L551+20
 	pop	{r3, lr}
 	b	printf
-.L530:
+.L549:
 	pop	{r3, pc}
-.L533:
+.L552:
 	.align	2
-.L532:
-	.word	.LANCHOR94
-	.word	.LANCHOR43
-	.word	.LANCHOR95
-	.word	.LC3
+.L551:
+	.word	.LANCHOR87
+	.word	.LANCHOR38
+	.word	.LANCHOR88
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
 	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
 	.global	List_remove_node
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_remove_node, %function
 List_remove_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r6, #6
+	ldr	r5, .L559
 	muls	r6, r1, r6
-	ldr	r3, .L540
-	mov	r5, r0
-	ldr	r7, [r3, #0]
 	movw	r3, #65535
+	mov	r8, r0
+	ldr	r7, [r5]
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L535
-	ldr	r3, [r0, #0]
+	bne	.L554
+	ldr	r3, [r0]
 	cmp	r4, r3
-	beq	.L535
-	ldr	r1, .L540+4
+	beq	.L554
+	ldr	r1, .L559+4
 	movw	r2, #363
-	ldr	r0, .L540+8
+	ldr	r0, .L559+8
 	bl	printf
-	ldr	r0, .L540+12
-	ldr	r1, .L540+16
+	ldr	r1, .L559+12
+	ldr	r0, .L559+16
 	bl	printf
-.L535:
-	ldr	r3, [r5, #0]
-	movw	r2, #65535
+.L554:
+	ldr	r3, [r8]
+	movw	r1, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L536
-	cmp	r3, r2
-	bne	.L537
-	movs	r3, #0
-	str	r3, [r5, #0]
-	b	.L538
-.L537:
-	ldr	r1, .L540
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r3, r0, r3, r1
-	str	r3, [r5, #0]
-	strh	r2, [r3, #2]	@ movhi
-	b	.L538
-.L536:
-	cmp	r3, r2
-	ldrh	r2, [r4, #2]
-	bne	.L539
-	cmp	r2, r3
-	beq	.L538
-	ldr	r1, .L540
-	movs	r0, #6
-	muls	r2, r0, r2
-	ldr	r1, [r1, #0]
-	strh	r3, [r1, r2]	@ movhi
-	b	.L538
-.L539:
-	ldr	r1, .L540
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r5, r0, r3, r1
-	strh	r2, [r5, #2]	@ movhi
-	ldrh	r2, [r4, #2]
-	muls	r0, r2, r0
-	strh	r3, [r1, r0]	@ movhi
-.L538:
+	bne	.L555
+	cmp	r3, r1
+	ittee	ne
+	ldrne	r0, [r5]
+	movne	r2, #6
+	moveq	r3, #0
+	streq	r3, [r8]
+	ittt	ne
+	mlane	r3, r2, r3, r0
+	strne	r3, [r8]
+	strhne	r1, [r3, #2]	@ movhi
+.L557:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L541:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L555:
+	cmp	r3, r1
+	ldrh	r1, [r4, #2]
+	bne	.L558
+	cmp	r1, r3
+	beq	.L557
+	movs	r2, #6
+	ldr	r0, [r5]
+	muls	r1, r2, r1
+	strh	r3, [r0, r1]	@ movhi
+	b	.L557
+.L558:
+	ldr	r0, [r5]
+	movs	r2, #6
+	mla	r5, r2, r3, r0
+	strh	r1, [r5, #2]	@ movhi
+	ldrh	r1, [r4, #2]
+	muls	r2, r1, r2
+	strh	r3, [r0, r2]	@ movhi
+	b	.L557
+.L560:
 	.align	2
-.L540:
-	.word	.LANCHOR87
-	.word	.LANCHOR96
-	.word	.LC3
+.L559:
+	.word	.LANCHOR80
+	.word	.LANCHOR89
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	List_remove_node, .-List_remove_node
 	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
 	.global	List_pop_index_node
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_pop_index_node, %function
 List_pop_index_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #0]
+	ldr	r3, [r0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L547
-	ldr	r2, .L548
-	movw	r6, #65535
-	movs	r5, #6
-	ldr	r4, [r2, #0]
-	b	.L544
-.L546:
-	mla	r3, r5, r2, r4
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L544:
-	cbz	r1, .L545
-	ldrh	r2, [r3, #0]
-	cmp	r2, r6
-	bne	.L546
-.L545:
-	subs	r4, r3, r4
-	ldr	r3, .L548+4
-	asrs	r4, r4, #1
+	cbz	r3, .L567
+	ldr	r2, .L568
+	movw	r5, #65535
+	movs	r6, #6
+	ldr	r2, [r2]
+.L563:
+	cbnz	r1, .L564
+.L566:
+	ldr	r4, .L568+4
+	subs	r3, r3, r2
+	asrs	r3, r3, #1
 	muls	r4, r3, r4
-	uxth	r4, r4
-	mov	r1, r4
+	uxth	r1, r4
 	bl	List_remove_node
-	mov	r0, r4
+	uxth	r0, r4
 	pop	{r4, r5, r6, pc}
-.L547:
+.L564:
+	ldrh	r4, [r3]
+	cmp	r4, r5
+	beq	.L566
+	subs	r1, r1, #1
+	mla	r3, r6, r4, r2
+	uxth	r1, r1
+	b	.L563
+.L567:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L549:
+.L569:
 	.align	2
-.L548:
-	.word	.LANCHOR87
+.L568:
+	.word	.LANCHOR80
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
 	.global	List_get_gc_head_node
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_get_gc_head_node, %function
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L556
+	ldr	r3, .L576
 	push	{r4, lr}
-	ldr	r3, [r3, #0]
-	cbz	r3, .L555
-	ldr	r2, .L556+4
-	movw	r1, #65535
+	ldr	r3, [r3]
+	cbz	r3, .L575
+	ldr	r2, .L576+4
 	movs	r4, #6
-	ldr	r2, [r2, #0]
-	b	.L552
-.L554:
-	mla	r3, r4, r3, r2
+	ldr	r1, [r2]
+	movw	r2, #65535
+.L572:
+	cbz	r0, .L573
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bne	.L574
+.L575:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L574:
 	subs	r0, r0, #1
+	mla	r3, r4, r3, r1
 	uxth	r0, r0
-.L552:
-	cbz	r0, .L553
-	ldrh	r3, [r3, #0]
-	cmp	r3, r1
-	bne	.L554
-	mov	r0, r1
-	pop	{r4, pc}
-.L553:
-	subs	r3, r3, r2
-	ldr	r0, .L556+8
+	b	.L572
+.L573:
+	ldr	r0, .L576+8
+	subs	r3, r3, r1
 	asrs	r3, r3, #1
-	muls	r0, r3, r0
-	uxth	r0, r0
-	pop	{r4, pc}
-.L555:
-	movw	r0, #65535
+	muls	r3, r0, r3
+	uxth	r0, r3
 	pop	{r4, pc}
-.L557:
+.L577:
 	.align	2
-.L556:
-	.word	.LANCHOR88
-	.word	.LANCHOR87
+.L576:
+	.word	.LANCHOR81
+	.word	.LANCHOR80
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
 	.global	List_update_data_list
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	List_update_data_list, %function
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L567
-	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r3, .L587
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldrh	r3, [r3, #0]
+	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L559
-	ldr	r3, .L567+4
-	ldrh	r3, [r3, #0]
+	beq	.L580
+	ldr	r3, .L587+4
+	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L559
-	ldr	r3, .L567+8
-	ldrh	r3, [r3, #0]
+	beq	.L580
+	ldr	r3, .L587+8
+	ldrh	r3, [r3]
 	cmp	r3, r0
-	beq	.L559
-	ldr	r3, .L567+12
-	movs	r7, #6
-	muls	r7, r0, r7
-	ldr	r8, [r3, #0]
-	ldr	r3, .L567+16
-	add	r5, r8, r7
-	ldr	r3, [r3, #0]
-	cmp	r5, r3
-	beq	.L559
-	ldr	r3, .L567+20
+	beq	.L580
+	ldr	r7, .L587+12
+	movs	r6, #6
+	ldr	r3, .L587+16
+	muls	r6, r0, r6
+	ldr	fp, [r7]
+	ldr	r3, [r3]
+	add	r10, fp, r6
+	cmp	r10, r3
+	beq	.L580
+	ldr	r2, .L587+20
+	ldrh	r5, [r10, #4]
+	ldr	r3, [r2]
+	mov	r8, r2
 	movw	r2, #65535
-	ldrh	r6, [r5, #4]
-	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	muls	r6, r3, r6
-	ldrh	r3, [r5, #2]
+	muls	r5, r3, r5
+	ldrh	r3, [r10, #2]
 	it	eq
-	moveq	r6, #-1
+	moveq	r5, #-1
 	cmp	r3, r2
-	bne	.L561
-	ldrh	r2, [r8, r7]
+	bne	.L583
+	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	bne	.L561
-	ldr	r1, .L567+24
+	bne	.L583
+	ldr	r1, .L587+24
 	movw	r2, #481
-	ldr	r0, .L567+28
+	ldr	r0, .L587+28
 	bl	printf
-	ldr	r0, .L567+32
-	ldr	r1, .L567+36
+	ldr	r1, .L587+32
+	ldr	r0, .L587+36
 	bl	printf
-.L561:
-	ldrh	r3, [r5, #2]
+.L583:
+	ldrh	r3, [r10, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L562
-	ldrh	r2, [r8, r7]
+	bne	.L584
+	ldrh	r2, [fp, r6]
 	cmp	r2, r3
-	beq	.L559
-.L562:
-	ldr	r2, .L567+12
-	movs	r1, #6
-	ldr	r2, [r2, #0]
-	mla	r3, r1, r3, r2
-	ldr	r1, .L567+40
-	subs	r2, r3, r2
-	asrs	r2, r2, #1
-	muls	r2, r1, r2
-	ldr	r1, .L567+20
-	uxth	r2, r2
-	ldrh	r3, [r3, #4]
-	ldr	r1, [r1, #0]
-	ldrh	r2, [r1, r2, lsl #1]
-	muls	r3, r2, r3
+	beq	.L580
+.L584:
+	movs	r2, #6
+	muls	r2, r3, r2
+	ldr	r3, .L587+40
+	asrs	r1, r2, #1
+	muls	r3, r1, r3
+	ldr	r1, [r8]
+	ldrh	r0, [r1, r3, lsl #1]
+	ldr	r1, [r7]
+	add	r2, r2, r1
+	ldrh	r3, [r2, #4]
+	muls	r3, r0, r3
 	it	eq
 	moveq	r3, #-1
-	cmp	r6, r3
-	bcs	.L559
-	ldr	r5, .L567+44
+	cmp	r5, r3
+	bcs	.L580
+	ldr	r5, .L587+44
 	mov	r1, r4
-	ldr	r0, .L567+16
+	ldr	r0, .L587+16
 	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L564
-	ldr	r1, .L567+24
+	ldrh	r3, [r5]
+	cbnz	r3, .L586
+	ldr	r1, .L587+24
 	mov	r2, #492
-	ldr	r0, .L567+28
+	ldr	r0, .L587+28
 	bl	printf
-	ldr	r0, .L567+32
-	ldr	r1, .L567+36
+	ldr	r1, .L587+32
+	ldr	r0, .L587+36
 	bl	printf
-.L564:
-	ldrh	r3, [r5, #0]
+.L586:
+	ldrh	r3, [r5]
 	mov	r0, r4
 	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
+	strh	r3, [r5]	@ movhi
 	bl	INSERT_DATA_LIST
-.L559:
+.L580:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L568:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L588:
 	.align	2
-.L567:
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR87
-	.word	.LANCHOR88
-	.word	.LANCHOR89
-	.word	.LANCHOR100
-	.word	.LC3
+.L587:
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR80
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR93
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.word	-1431655765
-	.word	.LANCHOR91
+	.word	.LANCHOR84
 	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
-	.align	1
-	.global	ftl_free_no_use_map_blk
-	.thumb
-	.thumb_func
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #20]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #12]
-	movs	r1, #0
-	ldr	r7, [r0, #24]
-	mov	r0, r5
-	bl	memset
-	movs	r2, #0
-	b	.L570
-.L574:
-	ldr	r1, [r7, r2, lsl #2]
-	movs	r3, #0
-	ubfx	r1, r1, #10, #16
-	b	.L571
-.L573:
-	ldrh	r0, [r6, r3, lsl #1]
-	cmp	r0, r1
-	bne	.L572
-	ldrh	r0, [r5, r3, lsl #1]
-	adds	r0, r0, #1
-	strh	r0, [r5, r3, lsl #1]	@ movhi
-.L572:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L571:
-	ldrh	r0, [r4, #10]
-	cmp	r0, r3
-	bhi	.L573
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L570:
-	ldrh	r3, [r4, #6]
-	cmp	r3, r2
-	bhi	.L574
-	mov	sl, #0
-	ldrh	r3, [r5, #0]
-	mov	r7, sl
-	ldr	r2, .L580
-	b	.L575
-.L579:
-	ldrh	r1, [r4, #0]
-	cmp	r1, r7
-	bne	.L576
-	ldrh	r1, [r2, #0]
-	ldrh	r0, [r4, #2]
-	cmp	r0, r1
-	it	cc
-	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L576:
-	ldrh	r8, [r5, r7, lsl #1]
-	lsl	fp, r7, #1
-	cmp	r3, r8
-	itt	hi
-	movhi	sl, r7
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L578
-	ldrh	r0, [r6, fp]
-	cbz	r0, .L578
-	movs	r1, #1
-	stmia	sp, {r2, r3}
-	bl	FtlFreeSysBlkQueueIn
-	ldmia	sp, {r2, r3}
-	strh	r8, [r6, fp]	@ movhi
-	ldrh	r1, [r4, #8]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L578:
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L575:
-	ldrh	r1, [r4, #10]
-	cmp	r1, r7
-	bhi	.L579
-	mov	r0, sl
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L581:
-	.align	2
-.L580:
-	.word	.LANCHOR57
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
 	.global	ftl_map_blk_alloc_new_blk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_map_blk_alloc_new_blk, %function
 ftl_map_blk_alloc_new_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r1, [r0, #10]
+	ldr	r2, [r0, #12]
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldrh	r2, [r0, #10]
-	movs	r5, #0
-	ldr	r3, [r0, #12]
-	b	.L583
-.L586:
-	mov	r7, r3
-	adds	r3, r3, #2
-	ldrh	r6, [r7, #0]
-	cbnz	r6, .L584
+	movs	r3, #0
+.L590:
+	uxth	r5, r3
+	cmp	r5, r1
+	bcc	.L592
+.L593:
+	movw	r2, #594
+	ldr	r1, .L599
+	ldr	r0, .L599+4
+	bl	printf
+	ldr	r1, .L599+8
+	ldr	r0, .L599+12
+	bl	printf
+	b	.L594
+.L592:
+	mov	r7, r2
+	adds	r3, r3, #1
+	ldrh	r6, [r7]
+	adds	r2, r2, #2
+	cmp	r6, #0
+	bne	.L590
 	bl	FtlFreeSysBlkQueueOut
-	strh	r0, [r7, #0]	@ movhi
-	cbz	r0, .L585
+	strh	r0, [r7]	@ movhi
+	cbz	r0, .L591
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
+	strh	r5, [r4]	@ movhi
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
 	ldrh	r3, [r4, #8]
-	strh	r5, [r4, #0]	@ movhi
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L585
-.L584:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L583:
-	cmp	r5, r2
-	bne	.L586
-.L585:
+.L591:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L587
-	ldr	r1, .L588
-	movw	r2, #594
-	ldr	r0, .L588+4
-	bl	printf
-	ldr	r0, .L588+8
-	ldr	r1, .L588+12
-	bl	printf
-.L587:
+	bls	.L593
+.L594:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L589:
+.L600:
 	.align	2
-.L588:
-	.word	.LANCHOR101
-	.word	.LC3
+.L599:
+	.word	.LANCHOR94
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
 	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
 	.global	select_l2p_ram_region
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	select_l2p_ram_region, %function
 select_l2p_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L602
-	movw	r1, #65535
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L602+4
-	ldr	r0, [r2, #0]
-	movs	r2, #0
+	movs	r1, #0
+	ldr	r3, .L611
+	movs	r0, #12
+	movw	r5, #65535
+	ldrh	r2, [r3]
+	ldr	r3, .L611+4
+	ldr	r3, [r3]
+.L602:
+	uxth	r4, r1
+	cmp	r4, r2
+	bcc	.L604
 	mov	r4, r2
-	ldrh	r3, [r3, #0]
-	b	.L591
-.L593:
-	adds	r2, r2, #12
-	adds	r5, r0, r2
-	ldrh	r5, [r5, #-12]
-	cmp	r5, r1
-	beq	.L592
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L591:
-	cmp	r4, r3
-	bne	.L593
 	movs	r1, #0
-	mov	r4, r3
 	mov	r6, #-2147483648
-	mov	r2, r1
-	b	.L594
-.L596:
-	adds	r5, r0, r1
-	ldr	r5, [r5, #4]
-	cmp	r5, #0
-	blt	.L595
-	cmp	r5, r6
-	itt	cc
-	movcc	r6, r5
-	movcc	r4, r2
-.L595:
-	adds	r2, r2, #1
-	adds	r1, r1, #12
-	uxth	r2, r2
-.L594:
-	cmp	r2, r3
-	bne	.L596
-	cmp	r4, r3
-	bcc	.L592
-	ldr	r2, .L602+8
+	movs	r7, #12
+.L605:
+	uxth	r5, r1
+	cmp	r5, r2
+	bcc	.L607
+	cmp	r4, r2
+	bcc	.L603
+	ldr	r1, .L611+8
+	mov	r4, r2
+	mov	r0, #-1
+	ldrh	r7, [r1]
 	movs	r1, #0
-	mov	r4, r3
-	mov	r5, #-1
-	ldrh	r7, [r2, #0]
-	mov	r2, r1
-	b	.L597
-.L599:
-	adds	r6, r0, r1
-	ldr	r6, [r6, #4]
-	cmp	r6, r5
-	bcs	.L598
-	ldrh	ip, [r0, r1]
-	cmp	ip, r7
-	it	ne
-	movne	r5, r6
-	it	ne
-	movne	r4, r2
-.L598:
-	adds	r2, r2, #1
-	adds	r1, r1, #12
-	uxth	r2, r2
-.L597:
-	cmp	r2, r3
-	bne	.L599
+.L608:
+	uxth	r5, r1
+	cmp	r5, r2
+	bcc	.L610
 	cmp	r4, r2
-	bcc	.L592
-	ldr	r1, .L602+12
+	bcc	.L603
 	movw	r2, #826
-	ldr	r0, .L602+16
+	ldr	r1, .L611+12
+	ldr	r0, .L611+16
 	bl	printf
-	ldr	r0, .L602+20
-	ldr	r1, .L602+24
+	ldr	r1, .L611+20
+	ldr	r0, .L611+24
 	bl	printf
-.L592:
+	b	.L603
+.L604:
+	adds	r1, r1, #1
+	mla	r6, r0, r1, r3
+	ldrh	r6, [r6, #-12]
+	cmp	r6, r5
+	bne	.L602
+.L603:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L603:
+.L607:
+	mla	r0, r7, r1, r3
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L606
+	cmp	r6, r0
+	itt	hi
+	movhi	r6, r0
+	movhi	r4, r5
+.L606:
+	adds	r1, r1, #1
+	b	.L605
+.L610:
+	ldr	r6, [r3, #4]
+	cmp	r0, r6
+	bls	.L609
+	ldrh	ip, [r3]
+	cmp	ip, r7
+	itt	ne
+	movne	r0, r6
+	movne	r4, r5
+.L609:
+	adds	r1, r1, #1
+	adds	r3, r3, #12
+	b	.L608
+.L612:
 	.align	2
-.L602:
-	.word	.LANCHOR102
-	.word	.LANCHOR71
-	.word	.LANCHOR103
-	.word	.LANCHOR104
-	.word	.LC3
+.L611:
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.word	.LC4
 	.word	.LC5
+	.word	.LC6
 	.size	select_l2p_ram_region, .-select_l2p_ram_region
 	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
 	.global	FtlUpdateVaildLpn
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlUpdateVaildLpn, %function
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L610
-	push	{r4, r5, lr}
-	ldrh	r2, [r3, #0]
-	adds	r1, r2, #1
-	cmp	r2, #4
-	strh	r1, [r3, #0]	@ movhi
-	mov	r2, r3
-	bhi	.L605
-	cbz	r0, .L604
-.L605:
+	ldr	r2, .L623
+	push	{r4, r5, r6, lr}
+	mov	r1, r2
+	ldrh	r3, [r2]
+	cmp	r3, #4
+	bhi	.L614
+	cbnz	r0, .L614
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L614:
 	movs	r3, #0
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L610+4
-	movw	r4, #65535
-	ldrh	r5, [r2, #0]
-	ldr	r2, .L610+8
-	ldr	r1, [r2, #0]
-	mov	r2, r3
-	b	.L607
-.L609:
-	ldrh	r0, [r1], #2
-	cmp	r0, r4
-	it	ne
-	addne	r3, r3, r0
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L607:
-	cmp	r2, r5
-	bne	.L609
-	ldr	r2, .L610+12
-	str	r3, [r2, #0]
-.L604:
-	pop	{r4, r5, pc}
-.L611:
+	ldr	r0, .L623+4
+	strh	r3, [r1]	@ movhi
+	movw	r6, #65535
+	ldr	r1, .L623+8
+	ldrh	r4, [r0]
+	mov	r0, r3
+	ldr	r2, .L623+12
+	ldr	r1, [r1]
+	str	r3, [r2]
+	add	r4, r1, r4, lsl #1
+.L615:
+	cmp	r1, r4
+	bne	.L617
+	cbz	r3, .L613
+	str	r0, [r2]
+.L613:
+	pop	{r4, r5, r6, pc}
+.L617:
+	ldrh	r5, [r1], #2
+	cmp	r5, r6
+	itt	ne
+	addne	r0, r0, r5
+	movne	r3, #1
+	b	.L615
+.L624:
 	.align	2
-.L610:
-	.word	.LANCHOR105
-	.word	.LANCHOR43
-	.word	.LANCHOR89
-	.word	.LANCHOR106
+.L623:
+	.word	.LANCHOR98
+	.word	.LANCHOR38
+	.word	.LANCHOR82
+	.word	.LANCHOR99
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
 	.global	ftl_set_blk_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_set_blk_mode, %function
 ftl_set_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L616
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-	uxth	r2, r2
-	ldr	r3, [r3, #0]
-	cbz	r1, .L613
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	orrs	r0, r0, r1
-	b	.L615
-.L613:
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	bic	r0, r1, r0
-.L615:
-	str	r0, [r3, r2, lsl #2]
+	mov	r3, r0
+	cbz	r1, .L626
+	b	ftl_set_blk_mode.part.9
+.L626:
+	ldr	r2, .L627
+	lsrs	r0, r0, #5
+	and	r3, r3, #31
+	ldr	r1, [r2]
+	movs	r2, #1
+	lsl	r3, r2, r3
+	ldr	r2, [r1, r0, lsl #2]
+	bic	r2, r2, r3
+	str	r2, [r1, r0, lsl #2]
 	bx	lr
-.L617:
+.L628:
 	.align	2
-.L616:
-	.word	.LANCHOR107
+.L627:
+	.word	.LANCHOR0
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
 	.global	ftl_get_blk_mode
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_get_blk_mode, %function
 ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L619
+	ldr	r3, .L630
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	ldr	r3, [r3, r2, lsl #2]
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L620:
+.L631:
 	.align	2
-.L619:
-	.word	.LANCHOR107
+.L630:
+	.word	.LANCHOR0
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
-	.section	.text.FtlL2PDataInit,"ax",%progbits
-	.align	1
-	.global	FtlL2PDataInit
-	.thumb
-	.thumb_func
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L624
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, lr}
-	ldr	r2, [r3, #0]
-	ldr	r3, .L624+4
-	ldr	r5, .L624+8
-	ldr	r4, .L624+12
-	lsls	r2, r2, #1
-	ldr	r6, .L624+16
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r3, [r4, #0]
-	ldrh	r2, [r6, #0]
-	movs	r1, #255
-	muls	r2, r3, r2
-	ldr	r0, [r5, #0]
-	bl	memset
-	ldr	r3, .L624+20
-	ldrh	r7, [r6, #0]
-	ldr	ip, [r5, #0]
-	movw	r5, #65535
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	ldrh	r6, [r4, #0]
-	mov	r0, r3
-	mov	r4, r3
-	b	.L622
-.L623:
-	adds	r0, r0, #1
-	bic	r3, r3, #3
-	add	r3, ip, r3
-	str	r3, [r2, #-4]
-	uxth	r0, r0
-	mov	r3, r8
-	str	r4, [r2, #-8]
-	strh	r5, [r2, #-12]	@ movhi
-.L622:
-	adds	r2, r2, #12
-	cmp	r0, r7
-	add	r8, r3, r6
-	movw	r1, #65535
-	bne	.L623
-	ldr	r2, .L624
-	ldr	r3, .L624+24
-	ldr	r2, [r2, #0]
-	strh	r1, [r3, #2]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L624+28
-	strh	r1, [r3, #40]	@ movhi
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L624+32
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L624+36
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #12]
-	ldr	r2, .L624+40
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #16]
-	ldr	r2, .L624+4
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #20]
-	ldr	r2, .L624+44
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L625:
-	.align	2
-.L624:
-	.word	.LANCHOR68
-	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LANCHOR61
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR70
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.word	.LANCHOR114
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
 	.global	ftl_sb_update_avl_pages
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_sb_update_avl_pages, %function
 ftl_sb_update_avl_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
+	push	{r4, r5, r6, lr}
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L633
-	push	{r4, r5, r6, r7, lr}
-	movw	r4, #65535
-	ldrh	r3, [r3, #0]
-	b	.L627
-.L629:
-	add	r5, r2, #8
-	ldrh	r5, [r0, r5, lsl #1]
-	cmp	r5, r4
-	beq	.L628
-	ldrh	r5, [r0, #4]
-	adds	r5, r5, #1
-	strh	r5, [r0, #4]	@ movhi
-.L628:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L627:
-	cmp	r2, r3
-	bcc	.L629
-	ldr	r2, .L633+4
-	mov	r4, r0
-	movw	r5, #65535
-	mvns	r1, r1
-	ldrh	r6, [r2, #0]
-	movs	r2, #0
-	b	.L630
-.L632:
-	ldrh	r7, [r4, #16]
-	cmp	r7, r5
-	beq	.L631
-	ldrh	r7, [r0, #4]
-	adds	r7, r6, r7
-	adds	r7, r7, r1
-	strh	r7, [r0, #4]	@ movhi
-.L631:
+	movw	r6, #65535
+	ldr	r3, .L639
+	ldrh	r4, [r3]
+	add	r3, r0, r2, lsl #1
+	adds	r3, r3, #14
+.L633:
+	cmp	r2, r4
+	bcc	.L635
+	ldr	r3, .L639+4
+	add	r5, r0, #16
+	movw	r6, #65535
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	subs	r1, r3, r1
+	movs	r3, #0
+	uxth	r1, r1
+.L636:
+	uxth	r2, r3
+	cmp	r4, r2
+	bhi	.L638
+	pop	{r4, r5, r6, pc}
+.L635:
+	ldrh	r5, [r3, #2]!
 	adds	r2, r2, #1
-	adds	r4, r4, #2
 	uxth	r2, r2
-.L630:
-	cmp	r2, r3
-	bne	.L632
-	pop	{r4, r5, r6, r7, pc}
-.L634:
+	cmp	r5, r6
+	ittt	ne
+	ldrhne	r5, [r0, #4]
+	addne	r5, r5, #1
+	strhne	r5, [r0, #4]	@ movhi
+	b	.L633
+.L638:
+	ldrh	r2, [r5], #2
+	adds	r3, r3, #1
+	cmp	r2, r6
+	ittt	ne
+	ldrhne	r2, [r0, #4]
+	addne	r2, r2, r1
+	strhne	r2, [r0, #4]	@ movhi
+	b	.L636
+.L640:
 	.align	2
-.L633:
-	.word	.LANCHOR41
-	.word	.LANCHOR56
+.L639:
+	.word	.LANCHOR36
+	.word	.LANCHOR51
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
 	.section	.text.make_superblock,"ax",%progbits
 	.align	1
 	.global	make_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	make_superblock, %function
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L642
-	ldrh	r2, [r0, #0]
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, .L654
+	ldrh	r2, [r0]
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldrh	r3, [r3, #0]
+	ldrh	r3, [r3]
 	cmp	r2, r3
-	bcc	.L636
-	ldr	r1, .L642+4
+	bcc	.L642
+	ldr	r1, .L654+4
 	movw	r2, #2296
-	ldr	r0, .L642+8
+	ldr	r0, .L654+8
 	bl	printf
-	ldr	r0, .L642+12
-	ldr	r1, .L642+16
+	ldr	r1, .L654+12
+	ldr	r0, .L654+16
 	bl	printf
-.L636:
+.L642:
+	ldr	r3, .L654+20
+	add	r6, r4, #16
+	ldr	r10, .L654+40
+	movw	r7, #65535
 	movs	r5, #0
-	ldr	r8, .L642+40
+	ldrh	r8, [r3]
 	strh	r5, [r4, #4]	@ movhi
-	movw	r6, #65535
 	strb	r5, [r4, #7]
-	ldr	r7, .L642+20
-	b	.L637
-.L639:
-	ldrb	r0, [r7, r5]	@ zero_extendqisi2
-	add	sl, r5, #8
-	ldrh	r1, [r4, #0]
-	bl	V2P_block
-	strh	r6, [r4, sl, lsl #1]	@ movhi
-	mov	fp, r0
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L638
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	strh	fp, [r4, sl, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	strb	r3, [r4, #7]
-.L638:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L637:
-	ldrh	r3, [r8, #0]
-	cmp	r3, r5
-	bhi	.L639
-	ldr	r2, .L642+24
+.L643:
+	uxth	r3, r5
+	cmp	r8, r3
+	bhi	.L645
+	ldr	r2, .L654+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
+	ldrh	r2, [r2]
+	smulbb	r3, r3, r2
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L642+28
-	ldr	r3, [r3, #0]
-	cbz	r3, .L640
-	ldr	r3, .L642+32
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
+	ldr	r3, .L654+28
+	ldr	r3, [r3]
+	cbz	r3, .L646
+	ldr	r3, .L654+32
+	ldrh	r2, [r4]
+	ldr	r3, [r3]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #59
-	bhi	.L640
-	movs	r3, #1
-	strb	r3, [r4, #9]
-.L640:
-	ldr	r3, .L642+36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L641
+	itt	ls
+	movls	r3, #1
+	strbls	r3, [r4, #9]
+.L646:
+	ldr	r3, .L654+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L647
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L641:
+.L647:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L643:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L645:
+	ldrh	r1, [r4]
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
+	bl	V2P_block
+	strh	r7, [r6]	@ movhi
+	mov	fp, r0
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L644
+	strh	fp, [r6]	@ movhi
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L644:
+	adds	r5, r5, #1
+	adds	r6, r6, #2
+	b	.L643
+.L655:
 	.align	2
-.L642:
-	.word	.LANCHOR43
-	.word	.LANCHOR115
-	.word	.LC3
+.L654:
+	.word	.LANCHOR38
+	.word	.LANCHOR100
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR50
-	.word	.LANCHOR56
-	.word	.LANCHOR116
-	.word	.LANCHOR84
-	.word	.LANCHOR0
-	.word	.LANCHOR41
+	.word	.LC6
+	.word	.LANCHOR36
+	.word	.LANCHOR51
+	.word	.LANCHOR101
+	.word	.LANCHOR77
+	.word	.LANCHOR1
+	.word	.LANCHOR45
 	.size	make_superblock, .-make_superblock
-	.section	.text.SupperBlkListInit,"ax",%progbits
+	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	update_multiplier_value
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L655
-	ldr	r3, .L655+4
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r1, #0
-	ldrh	r3, [r3, #0]
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
 	movs	r5, #0
-	ldr	r0, [r2, #0]
-	movs	r2, #6
-	muls	r2, r3, r2
+	ldr	r3, .L662
+	mov	r6, r0
 	mov	r4, r5
-	bl	memset
-	ldr	r3, .L655+8
-	mov	r8, r5
-	mov	sl, r5
-	str	r5, [r3, #0]
-	ldr	r3, .L655+12
-	str	r5, [r3, #0]
-	ldr	r3, .L655+16
-	str	r5, [r3, #0]
-	ldr	r3, .L655+20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L655+24
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L655+28
-	strh	r5, [r3, #0]	@ movhi
-	b	.L645
-.L647:
-	ldr	r2, .L655+32
+	ldr	r10, .L662+12
+	ldrh	r7, [r3]
+	ldr	r3, .L662+4
+	ldrh	r8, [r3]
+.L657:
+	uxth	r3, r5
+	cmp	r7, r3
+	bhi	.L659
+	cbz	r4, .L661
 	mov	r1, r4
-	ldrb	r0, [r2, r7]	@ zero_extendqisi2
-	str	ip, [sp, #4]
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	ip, [sp, #4]
-	cbnz	r0, .L646
-	ldrh	r2, [fp, #0]
-	adds	r6, r6, r2
-	uxth	r6, r6
-.L646:
-	adds	r7, r7, #1
-	b	.L652
-.L654:
-	movs	r7, #0
-	uxth	r3, r4
-	ldr	fp, .L655+76
-	mov	ip, r4
-	mov	r6, r7
-	mov	r4, r3
-.L652:
-	ldr	r3, .L655+36
-	ldrh	r2, [r3, #0]
-	cmp	r7, r2
-	blt	.L647
-	mov	r4, ip
-	cbz	r6, .L648
-	sxth	r1, r6
 	mov	r0, #32768
 	bl	__aeabi_idiv
-	uxth	r6, r0
-	b	.L649
-.L648:
-	ldr	r3, .L655+40
-	movw	r2, #65535
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, ip, lsl #1]	@ movhi
-.L649:
-	ldr	r3, .L655
-	ldr	r3, [r3, #0]
-	adds	r3, r3, r5
-	strh	r6, [r3, #4]	@ movhi
-	ldr	r3, .L655+44
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L650
-	ldr	r3, .L655+48
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L650
-	ldr	r3, .L655+52
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L650
-	ldr	r3, .L655+40
-	uxth	r0, r4
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L651
-	add	r8, r8, #1
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-	b	.L650
-.L651:
-	add	sl, sl, #1
-	uxth	sl, sl
-	bl	INSERT_DATA_LIST
-.L650:
-	adds	r4, r4, #1
-	adds	r5, r5, #6
-.L645:
-	ldr	r2, .L655+56
-	ldrh	r3, [r2, #0]
-	cmp	r4, r3
-	blt	.L654
-	ldr	r2, .L655+20
-	strh	sl, [r2, #0]	@ movhi
-	ldr	r2, .L655+24
-	strh	r8, [r2, #0]	@ movhi
-	add	r8, sl, r8
-	cmp	r8, r3
-	ble	.L653
-	ldr	r1, .L655+60
-	movw	r2, #2366
-	ldr	r0, .L655+64
-	bl	printf
-	ldr	r0, .L655+68
-	ldr	r1, .L655+72
-	bl	printf
-.L653:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L656:
-	.align	2
-.L655:
-	.word	.LANCHOR87
-	.word	.LANCHOR44
-	.word	.LANCHOR93
-	.word	.LANCHOR88
-	.word	.LANCHOR90
-	.word	.LANCHOR91
-	.word	.LANCHOR94
-	.word	.LANCHOR117
-	.word	.LANCHOR50
-	.word	.LANCHOR41
-	.word	.LANCHOR89
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR43
-	.word	.LANCHOR118
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR56
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.update_multiplier_value,"ax",%progbits
-	.align	1
-	.global	update_multiplier_value
-	.thumb
-	.thumb_func
-	.type	update_multiplier_value, %function
-update_multiplier_value:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	mov	r6, r0
-	mov	r5, r4
-	ldr	sl, .L662+8
-	ldr	r8, .L662+12
-	ldr	r7, .L662
-	b	.L658
 .L660:
+	ldr	r3, .L662+8
+	movs	r2, #6
+	ldr	r3, [r3]
+	mla	r6, r2, r6, r3
+	strh	r0, [r6, #4]	@ movhi
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L659:
 	mov	r1, r6
-	ldrb	r0, [r8, r5]	@ zero_extendqisi2
+	ldrb	r0, [r10, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L659
-	ldrh	r3, [r7, #0]
-	adds	r4, r4, r3
+	cbnz	r0, .L658
+	add	r4, r4, r8
 	uxth	r4, r4
-.L659:
-	adds	r5, r5, #1
-	uxth	r5, r5
 .L658:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L660
-	cbz	r4, .L661
-	mov	r1, r4
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	uxth	r4, r0
+	adds	r5, r5, #1
+	b	.L657
 .L661:
-	ldr	r3, .L662+4
-	movs	r2, #6
-	movs	r0, #0
-	ldr	r3, [r3, #0]
-	mla	r6, r2, r6, r3
-	strh	r4, [r6, #4]	@ movhi
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+	mov	r0, r4
+	b	.L660
 .L663:
 	.align	2
 .L662:
-	.word	.LANCHOR56
-	.word	.LANCHOR87
-	.word	.LANCHOR41
-	.word	.LANCHOR50
+	.word	.LANCHOR36
+	.word	.LANCHOR51
+	.word	.LANCHOR80
+	.word	.LANCHOR45
 	.size	update_multiplier_value, .-update_multiplier_value
 	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
 	.align	1
 	.global	GetFreeBlockMinEraseCount
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	GetFreeBlockMinEraseCount, %function
 GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	ldr	r3, .L667
-	ldr	r0, [r3, #0]
+	ldr	r0, [r3]
 	cbz	r0, .L665
 	ldr	r3, .L667+4
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	subs	r0, r0, r3
 	ldr	r3, .L667+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
 	ldr	r3, .L667+12
+	ldr	r3, [r3]
 	uxth	r0, r0
-	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r0, lsl #1]
 .L665:
 	bx	lr
 .L668:
 	.align	2
 .L667:
-	.word	.LANCHOR93
-	.word	.LANCHOR87
+	.word	.LANCHOR86
+	.word	.LANCHOR80
 	.word	-1431655765
-	.word	.LANCHOR84
+	.word	.LANCHOR77
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
 	.global	GetFreeBlockMaxEraseCount
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	GetFreeBlockMaxEraseCount, %function
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L676
+	ldr	r3, .L677
 	push	{r4, r5, r6, lr}
-	ldr	r3, [r3, #0]
+	ldr	r3, [r3]
 	cbz	r3, .L675
-	ldr	r2, .L676+4
-	movs	r1, #7
-	movw	r5, #65535
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
+	ldr	r2, .L677+4
+	movs	r5, #6
+	movw	r6, #65535
+	ldrh	r2, [r2]
+	rsb	r2, r2, r2, lsl #3
 	asrs	r2, r2, #3
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L676+8
-	movs	r6, #6
-	ldr	r1, [r2, #0]
-	ldr	r2, .L676+12
+	ldr	r2, .L677+8
+	ldr	r1, [r2]
+	ldr	r2, .L677+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-	b	.L672
-.L674:
-	mul	r4, r6, r3
-	ldrh	r4, [r1, r4]
-	cmp	r4, r5
-	beq	.L673
-	adds	r2, r2, #1
-	mov	r3, r4
-	uxth	r2, r2
 .L672:
-	cmp	r2, r0
-	bne	.L674
-.L673:
-	ldr	r2, .L676+16
-	ldr	r2, [r2, #0]
+	uxth	r4, r2
+	cmp	r0, r4
+	bls	.L674
+	mul	r4, r5, r3
+	adds	r2, r2, #1
+	ldrh	r4, [r1, r4]
+	cmp	r4, r6
+	bne	.L676
+.L674:
+	ldr	r2, .L677+16
+	ldr	r2, [r2]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
+.L676:
+	mov	r3, r4
+	b	.L672
 .L675:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L677:
+.L678:
 	.align	2
-.L676:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
+.L677:
+	.word	.LANCHOR86
 	.word	.LANCHOR87
+	.word	.LANCHOR80
 	.word	-1431655765
-	.word	.LANCHOR84
+	.word	.LANCHOR77
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
 	.global	free_data_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	free_data_superblock, %function
 free_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movw	r2, #65535
-	cmp	r0, r2
 	push	{r3, lr}
-	beq	.L679
-	ldr	r2, .L680
+	cmp	r0, r2
+	beq	.L680
+	ldr	r2, .L681
 	movs	r1, #0
-	ldr	r2, [r2, #0]
+	ldr	r2, [r2]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L679:
+.L680:
 	movs	r0, #0
 	pop	{r3, pc}
-.L681:
+.L682:
 	.align	2
-.L680:
-	.word	.LANCHOR89
+.L681:
+	.word	.LANCHOR82
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
 	.global	FtlGcBufInit
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcBufInit, %function
 FtlGcBufInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L687
-	movs	r2, #0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r2
-	str	r2, [r3, #0]
-	ldr	r3, .L687+4
-	ldrh	ip, [r3, #0]
-	ldr	r3, .L687+8
-	ldr	r7, [r3, #0]
-	ldr	r3, .L687+12
-	ldr	r6, [r3, #0]
-	ldr	r3, .L687+16
-	ldr	r1, [r3, #0]
-	ldr	r3, .L687+20
-	ldrh	r5, [r3, #0]
-	ldr	r3, .L687+24
-	str	r5, [sp, #4]
-	ldrh	fp, [r3, #0]
-	ldr	r3, .L687+28
-	ldr	r0, [r3, #0]
-	mov	r3, r2
-	b	.L683
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #0
+	ldr	r1, .L688
+	mov	fp, #1
+	ldr	r2, .L688+4
+	ldr	r5, [r1]
+	ldr	r1, .L688+8
+	str	r3, [r2]
+	ldr	r2, .L688+12
+	mov	r0, r5
+	ldr	r1, [r1]
+	ldrh	r2, [r2]
+	str	r1, [sp, #4]
+	ldr	r1, .L688+16
+	ldrh	r1, [r1]
+	str	r1, [sp]
+	ldr	r1, .L688+20
+	ldr	r10, [r1]
+	ldr	r1, .L688+24
+	ldrh	r7, [r1]
+	ldr	r1, .L688+28
+	ldr	r4, [r1]
+	movs	r1, #12
+	mla	r1, r2, r1, r1
+	adds	r4, r4, #8
+	add	r8, r5, r1
+	mov	r1, r3
 .L684:
-	movs	r5, #1
-	bic	r4, r4, #3
-	adds	r3, r3, r5
-	bic	r2, r2, #3
-	adds	r4, r7, r4
-	adds	r2, r6, r2
-	str	r4, [r1, #-12]
-	uxth	r3, r3
-	str	r2, [r1, #-8]
-	str	r5, [r1, #-4]
-	str	r4, [r0, #-28]
-	mov	r4, r8
-	str	r2, [r0, #-24]
-	mov	r2, sl
-.L683:
-	adds	r1, r1, #12
-	ldr	r5, [sp, #4]
-	adds	r0, r0, #36
-	cmp	r3, ip
-	add	r8, r4, r5
-	add	sl, r2, fp
-	bne	.L684
-	ldr	r1, .L687+8
-	movs	r4, #12
-	ldr	r2, .L687+32
-	mov	fp, #0
-	ldr	ip, [r1, #0]
-	ldr	r1, .L687+20
-	ldr	r8, [r2, #0]
-	ldr	r2, .L687+16
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L687+12
-	ldr	r2, [r2, #0]
-	ldr	r6, [r1, #0]
-	ldr	r1, .L687+24
-	ldrh	r5, [r1, #0]
-	b	.L685
+	adds	r0, r0, #12
+	ldr	r6, [sp]
+	cmp	r0, r8
+	add	ip, r3, r7
+	add	r4, r4, #36
+	add	lr, r1, r6
+	bne	.L685
+	ldr	r3, .L688+32
+	mov	lr, #12
+	mov	r8, #0
+	ldr	r0, [r3]
+	ldr	r3, .L688+8
+	ldr	r4, [r3]
+	ldr	r3, .L688+20
+	ldr	ip, [r3]
 .L686:
-	mul	r1, r4, r3
-	mul	r0, r7, r3
-	add	sl, r2, r1
-	bic	r0, r0, #3
-	str	fp, [sl, #8]
-	add	r0, ip, r0
-	str	r0, [r2, r1]
-	mul	r1, r5, r3
-	adds	r3, r3, #1
-	uxth	r3, r3
-	bic	r1, r1, #3
-	adds	r1, r6, r1
-	str	r1, [sl, #4]
+	cmp	r2, r0
+	bcc	.L687
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L685:
-	cmp	r3, r8
-	bcc	.L686
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L688:
-	.align	2
+	bic	r1, r1, #3
+	bic	r3, r3, #3
+	mov	r6, r1
+	ldr	r1, [sp, #4]
+	add	r3, r3, r10
+	str	fp, [r0, #-4]
+	str	r3, [r0, #-8]
+	add	r6, r6, r1
+	mov	r1, lr
+	str	r6, [r0, #-12]
+	str	r3, [r4, #-32]
+	mov	r3, ip
+	str	r6, [r4, #-36]
+	b	.L684
 .L687:
-	.word	.LANCHOR119
-	.word	.LANCHOR41
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR122
-	.word	.LANCHOR61
-	.word	.LANCHOR62
-	.word	.LANCHOR123
-	.word	.LANCHOR124
+	ldr	r3, [sp]
+	mul	r10, lr, r2
+	muls	r3, r2, r3
+	add	r1, r5, r10
+	str	r8, [r1, #8]
+	bic	r3, r3, #3
+	add	r3, r3, r4
+	str	r3, [r5, r10]
+	mul	r3, r2, r7
+	adds	r2, r2, #1
+	uxth	r2, r2
+	bic	r3, r3, #3
+	add	r3, r3, ip
+	str	r3, [r1, #4]
+	b	.L686
+.L689:
+	.align	2
+.L688:
+	.word	.LANCHOR103
+	.word	.LANCHOR102
+	.word	.LANCHOR104
+	.word	.LANCHOR36
+	.word	.LANCHOR56
+	.word	.LANCHOR105
+	.word	.LANCHOR57
+	.word	.LANCHOR106
+	.word	.LANCHOR107
 	.size	FtlGcBufInit, .-FtlGcBufInit
-	.section	.text.FtlVariablesInit,"ax",%progbits
+	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
-	.global	FtlVariablesInit
+	.global	FtlGcBufFree
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
+	.fpu softvfp
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	ldr	r3, .L697
+	mov	ip, #12
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r4, #0
-	ldr	r3, .L690
-	movw	r2, #65535
-	ldr	r5, .L690+4
-	mov	r1, r4
-	str	r4, [r3, #0]
-	ldr	r3, .L690+8
-	strh	r2, [r3, #0]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L690+12
-	str	r4, [r3, #0]
-	ldr	r3, .L690+16
-	str	r4, [r3, #0]
-	ldr	r3, .L690+20
-	str	r2, [r3, #0]
-	ldr	r3, .L690+24
-	str	r4, [r3, #0]
-	ldr	r3, .L690+28
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L690+32
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L690+36
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r2, [r5, #0]
-	ldr	r3, .L690+40
-	mov	r1, r4
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L690+44
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L690+48
-	bl	memset
-	mov	r1, r4
-	mov	r2, #512
-	ldr	r0, .L690+52
-	bl	memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
-	mov	r0, r4
-	pop	{r3, r4, r5, pc}
+	mov	fp, #36
+	mov	lr, r4
+	ldr	r7, [r3]
+	ldr	r3, .L697+4
+	ldr	r5, [r3]
 .L691:
-	.align	2
+	uxth	r3, r4
+	cmp	r1, r3
+	bls	.L690
+	mla	r8, fp, r3, r0
+	movs	r2, #0
+.L692:
+	uxth	r3, r2
+	cmp	r7, r3
+	bls	.L693
+	mul	r3, ip, r3
+	ldr	r6, [r8, #8]
+	adds	r2, r2, #1
+	add	r10, r5, r3
+	ldr	r3, [r5, r3]
+	cmp	r3, r6
+	bne	.L692
+	str	lr, [r10, #8]
+.L693:
+	adds	r4, r4, #1
+	b	.L691
 .L690:
-	.word	.LANCHOR125
-	.word	.LANCHOR44
-	.word	.LANCHOR126
-	.word	.LANCHOR127
-	.word	.LANCHOR128
-	.word	.LANCHOR129
-	.word	.LANCHOR116
-	.word	.LANCHOR74
-	.word	.LANCHOR65
-	.word	.LANCHOR75
-	.word	.LANCHOR84
-	.word	.LANCHOR130
-	.word	.LANCHOR131
-	.word	.LANCHOR132
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.FtlGcBufFree,"ax",%progbits
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L698:
+	.align	2
+.L697:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
-	.global	FtlGcBufFree
+	.global	FtlGcBufAlloc
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcBufFree, %function
-FtlGcBufFree:
+	.fpu softvfp
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L699
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #36
-	ldr	r6, [r3, #0]
-	ldr	r3, .L699+4
-	ldr	r4, [r3, #0]
-	movs	r3, #0
-	mov	fp, r3
-	b	.L693
-.L696:
+	ldr	r3, .L706
+	movs	r2, #0
+	push	{r4, r5, r6, r7, r8, r10, lr}
 	mov	ip, #12
-	mul	r3, ip, r2
-	add	sl, r4, r3
-	ldr	ip, [r4, r3]
-	ldr	r3, [r7, #8]
-	cmp	ip, r3
-	bne	.L694
-	mov	r3, r8
-	str	fp, [sl, #8]
-	b	.L695
-.L694:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L698:
-	cmp	r2, r6
-	bcc	.L696
-	mov	r3, r8
-.L695:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L693:
-	cmp	r3, r1
-	bcs	.L692
-	mla	r7, r5, r3, r0
-	movs	r2, #0
-	mov	r8, r3
-	b	.L698
-.L692:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	movs	r7, #1
+	mov	lr, #36
+	ldr	r4, [r3]
+	ldr	r3, .L706+4
+	ldr	r5, [r3]
 .L700:
-	.align	2
-.L699:
-	.word	.LANCHOR124
-	.word	.LANCHOR122
-	.size	FtlGcBufFree, .-FtlGcBufFree
-	.section	.text.FtlGcBufAlloc,"ax",%progbits
-	.align	1
-	.global	FtlGcBufAlloc
-	.thumb
-	.thumb_func
-	.type	FtlGcBufAlloc, %function
-FtlGcBufAlloc:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L708
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	movs	r7, #12
-	ldr	r8, [r3, #0]
-	movs	r6, #1
-	ldr	r3, .L708+4
-	movs	r5, #36
-	ldr	ip, [r3, #0]
-	movs	r3, #0
-	b	.L702
-.L705:
-	mla	r4, r7, r2, ip
-	ldr	sl, [r4, #8]
-	cmp	sl, #0
-	bne	.L703
-	mla	r2, r5, r3, r0
-	str	r6, [r4, #8]
-	ldr	sl, [r4, #0]
-	ldr	r4, [r4, #4]
-	str	sl, [r2, #8]
-	str	r4, [r2, #12]
-	b	.L704
-.L703:
-	adds	r2, r2, #1
-	uxth	r2, r2
-	b	.L706
-.L707:
-	movs	r2, #0
-.L706:
-	cmp	r2, r8
-	bcc	.L705
+	uxth	r8, r2
+	cmp	r1, r8
+	bhi	.L704
+	pop	{r4, r5, r6, r7, r8, r10, pc}
 .L704:
-	adds	r3, r3, #1
-	uxth	r3, r3
+	mov	r10, #0
+.L701:
+	uxth	r3, r10
+	cmp	r4, r3
+	bls	.L702
+	mla	r3, ip, r3, r5
+	add	r10, r10, #1
+	ldr	r6, [r3, #8]
+	cmp	r6, #0
+	bne	.L701
+	mla	r8, lr, r8, r0
+	str	r7, [r3, #8]
+	ldr	r6, [r3]
+	ldr	r3, [r3, #4]
+	str	r6, [r8, #8]
+	str	r3, [r8, #12]
 .L702:
-	cmp	r3, r1
-	bcc	.L707
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L709:
+	adds	r2, r2, #1
+	b	.L700
+.L707:
 	.align	2
-.L708:
-	.word	.LANCHOR124
-	.word	.LANCHOR122
+.L706:
+	.word	.LANCHOR107
+	.word	.LANCHOR103
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
 	.global	IsBlkInGcList
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	IsBlkInGcList, %function
 IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L715
-	push	{r4, lr}
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L715+4
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	b	.L711
-.L713:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L714
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L711:
-	cmp	r3, r1
-	bne	.L713
+	@ link register save eliminated.
+	ldr	r3, .L713
+	ldr	r2, .L713+4
+	ldr	r3, [r3]
+	ldrh	r2, [r2]
+	add	r2, r3, r2, lsl #1
+.L709:
+	cmp	r3, r2
+	bne	.L711
 	movs	r0, #0
-	pop	{r4, pc}
-.L714:
+	bx	lr
+.L711:
+	ldrh	r1, [r3], #2
+	cmp	r1, r0
+	bne	.L709
 	movs	r0, #1
-	pop	{r4, pc}
-.L716:
+	bx	lr
+.L714:
 	.align	2
-.L715:
-	.word	.LANCHOR133
-	.word	.LANCHOR134
+.L713:
+	.word	.LANCHOR108
+	.word	.LANCHOR109
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
 	.global	FtlGcUpdatePage
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcUpdatePage, %function
 FtlGcUpdatePage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
+	mov	r5, r0
+	ldr	r4, .L719
 	ubfx	r0, r0, #10, #16
-	mov	r5, r1
-	mov	r6, r2
+	mov	r6, r1
+	mov	r7, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L721
-	ldrh	r7, [r3, #0]
-	ldr	r3, .L721+4
-	ldr	r2, [r3, #0]
+	ldr	r3, .L719+4
+	ldrh	r1, [r4]
+	ldr	r2, [r3]
 	movs	r3, #0
-	mov	r1, r2
-	b	.L718
-.L720:
-	ldrh	ip, [r1], #2
-	cmp	ip, r0
-	beq	.L719
+.L716:
+	uxth	ip, r3
+	cmp	ip, r1
+	bcc	.L718
+	bne	.L717
+	strh	r0, [r2, ip, lsl #1]	@ movhi
+	ldrh	r3, [r4]
 	adds	r3, r3, #1
-	uxth	r3, r3
+	strh	r3, [r4]	@ movhi
+	b	.L717
 .L718:
-	cmp	r3, r7
-	bne	.L720
-	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L721
-	ldrh	r2, [r3, #0]
-	adds	r2, r2, #1
-	strh	r2, [r3, #0]	@ movhi
-.L719:
-	ldr	r0, .L721+8
-	movs	r1, #12
-	ldr	r3, .L721+12
-	ldr	r0, [r0, #0]
-	ldrh	r2, [r3, #0]
-	muls	r1, r2, r1
-	adds	r7, r0, r1
-	str	r4, [r0, r1]
-	adds	r2, r2, #1
-	str	r5, [r7, #4]
-	str	r6, [r7, #8]
-	strh	r2, [r3, #0]	@ movhi
+	adds	r3, r3, #1
+	add	ip, r2, r3, lsl #1
+	ldrh	ip, [ip, #-2]
+	cmp	ip, r0
+	bne	.L716
+.L717:
+	ldr	r2, .L719+8
+	movs	r0, #12
+	ldr	r1, .L719+12
+	ldrh	r3, [r2]
+	ldr	r1, [r1]
+	muls	r0, r3, r0
+	adds	r3, r3, #1
+	adds	r4, r1, r0
+	str	r6, [r4, #4]
+	str	r7, [r4, #8]
+	str	r5, [r1, r0]
+	strh	r3, [r2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L722:
+.L720:
 	.align	2
-.L721:
-	.word	.LANCHOR133
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.word	.LANCHOR135
+.L719:
+	.word	.LANCHOR109
+	.word	.LANCHOR108
+	.word	.LANCHOR110
+	.word	.LANCHOR111
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FtlGcRefreshBlock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.fpu softvfp
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L724
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r4, .L724+4
-	ldr	r2, .L724+8
-	strh	r3, [r2, #0]	@ movhi
-	ldrh	r2, [r4, #0]
-	ldr	r3, .L724+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r2, .L724+16
-	ldrh	r3, [r4, #0]
-	movs	r1, #255
-	ldr	r0, [r2, #0]
-	movs	r2, #12
-	muls	r2, r3, r2
-	bl	memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
+	push	{r4, r5, lr}
+	ldr	r4, .L724
+	ldrh	r5, [r4]
+	cmp	r5, r0
+	beq	.L722
+	ldr	r3, .L724+4
+	ldrh	r1, [r3]
+	cmp	r0, r1
+	beq	.L722
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L723
+	strh	r0, [r4]	@ movhi
+.L722:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L723:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3]	@ movhi
+	b	.L722
 .L725:
 	.align	2
 .L724:
-	.word	.LANCHOR133
-	.word	.LANCHOR58
-	.word	.LANCHOR135
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
 	.global	FtlGcRefreshOpenBlock
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcRefreshOpenBlock, %function
 FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L729
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L727
-	ldr	r3, .L729+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L727
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L728
-	strh	r0, [r4, #0]	@ movhi
-	b	.L727
-.L728:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L727:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L730:
-	.align	2
-.L729:
-	.word	.LANCHOR137
-	.word	.LANCHOR138
+	@ link register save eliminated.
+	b	FtlGcRefreshBlock
 	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
-	.align	1
-	.global	FtlGcRefreshBlock
-	.thumb
-	.thumb_func
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L734
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L732
-	ldr	r3, .L734+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L732
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L733
-	strh	r0, [r4, #0]	@ movhi
-	b	.L732
-.L733:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L732:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L735:
-	.align	2
-.L734:
-	.word	.LANCHOR137
-	.word	.LANCHOR138
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
 	.global	FtlGcMarkBadPhyBlk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcMarkBadPhyBlk, %function
 FtlGcMarkBadPhyBlk:
 	@ args = 0, pretend = 0, frame = 0
@@ -5979,99 +5109,101 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L741
-	ldr	r3, [r3, #0]
-	cbz	r3, .L737
-	ldr	r3, .L741+4
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	cmp	r2, #29
-	bls	.L737
-	subs	r2, r2, #30
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L737:
-	ldr	r3, .L741+8
-	ldr	r2, .L741+12
-	ldrh	r1, [r3, #0]
-	movs	r3, #0
-	b	.L738
-.L740:
-	ldrh	r0, [r2, #2]!
-	cmp	r0, r4
-	beq	.L739
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L738:
-	cmp	r3, r1
-	bne	.L740
+	ldr	r3, .L735
+	ldr	r3, [r3]
+	cbz	r3, .L728
+	ldr	r3, .L735+4
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r5, lsl #1]
+	cmp	r3, #29
+	itt	hi
+	subhi	r3, r3, #30
+	strhhi	r3, [r2, r5, lsl #1]	@ movhi
+.L728:
+	ldr	r2, .L735+8
+	movs	r1, #0
+	ldr	r5, .L735+12
+	ldrh	r3, [r2]
+.L729:
+	uxth	r0, r1
+	cmp	r3, r0
+	bhi	.L731
 	cmp	r3, #15
-	bhi	.L739
-	ldr	r2, .L741+16
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	ldr	r2, .L741+8
-	strh	r3, [r2, #0]	@ movhi
-.L739:
+	itttt	ls
+	addls	r1, r3, #1
+	strhls	r1, [r2]	@ movhi
+	ldrls	r2, .L735+12
+	strhls	r4, [r2, r3, lsl #1]	@ movhi
+	b	.L730
+.L731:
+	adds	r1, r1, #1
+	add	r0, r5, r1, lsl #1
+	ldrh	r0, [r0, #-2]
+	cmp	r0, r4
+	bne	.L729
+.L730:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L742:
+.L736:
 	.align	2
-.L741:
-	.word	.LANCHOR116
-	.word	.LANCHOR84
-	.word	.LANCHOR139
-	.word	.LANCHOR140-2
-	.word	.LANCHOR140
+.L735:
+	.word	.LANCHOR101
+	.word	.LANCHOR77
+	.word	.LANCHOR114
+	.word	.LANCHOR115
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
 	.global	FtlGcReFreshBadBlk
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	FtlGcReFreshBadBlk, %function
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L746
+	ldr	r3, .L743
 	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L744
-	ldr	r2, .L746+4
-	ldrh	r1, [r2, #0]
+	ldrh	r3, [r3]
+	cbz	r3, .L738
+	ldr	r2, .L743+4
+	ldrh	r1, [r2]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L744
-	ldr	r4, .L746+8
-	ldrh	r2, [r4, #0]
+	bne	.L738
+	ldr	r4, .L743+8
+	ldrh	r2, [r4]
 	cmp	r2, r3
-	bcc	.L745
-	movs	r3, #0
-	strh	r3, [r4, #0]	@ movhi
-.L745:
-	ldr	r3, .L746+12
-	ldrh	r2, [r4, #0]
+	itt	cs
+	movcs	r3, #0
+	strhcs	r3, [r4]	@ movhi
+	ldr	r3, .L743+12
+	ldrh	r2, [r4]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
 	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4, #0]
+	ldrh	r3, [r4]
 	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
-.L744:
+	strh	r3, [r4]	@ movhi
+.L738:
 	movs	r0, #0
 	pop	{r4, pc}
-.L747:
+.L744:
 	.align	2
-.L746:
-	.word	.LANCHOR139
-	.word	.LANCHOR137
-	.word	.LANCHOR141
-	.word	.LANCHOR140
+.L743:
+	.word	.LANCHOR114
+	.word	.LANCHOR112
+	.word	.LANCHOR116
+	.word	.LANCHOR115
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
 	.global	ftl_memset
+	.syntax unified
 	.thumb
 	.thumb_func
+	.fpu softvfp
 	.type	ftl_memset, %function
 ftl_memset:
 	@ args = 0, pretend = 0, frame = 0
@@ -6079,14314 +5211,15316 @@ ftl_memset:
 	@ link register save eliminated.
 	b	memset
 	.size	ftl_memset, .-ftl_memset
-	.section	.text.ftl_memcpy,"ax",%progbits
+	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy
+	.global	BuildFlashLsbPageTable
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_memcpy, %function
-ftl_memcpy:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
-	.section	.text.ftl_memcpy32,"ax",%progbits
-	.align	1
-	.global	ftl_memcpy32
-	.thumb
-	.thumb_func
-	.type	ftl_memcpy32, %function
-ftl_memcpy32:
+	.fpu softvfp
+	.type	BuildFlashLsbPageTable, %function
+BuildFlashLsbPageTable:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r4, r1
+	cbnz	r0, .L747
+	ldr	r3, .L784
+.L748:
+	strh	r0, [r3, r0, lsl #1]	@ movhi
+	adds	r0, r0, #1
+	cmp	r0, #256
+	bne	.L748
+.L754:
+	movs	r1, #255
+	mov	r2, #1024
+	ldr	r0, .L784+4
+	uxth	r4, r4
+	bl	ftl_memset
+	ldr	r1, .L784
 	movs	r3, #0
-	push	{r4, r5, lr}
-	mov	r4, r3
-	b	.L751
-.L752:
-	ldr	r5, [r1, r3]
-	adds	r4, r4, #1
-	str	r5, [r0, r3]
-	adds	r3, r3, #4
-.L751:
+	ldr	r0, .L784+4
+.L749:
+	uxth	r2, r3
 	cmp	r4, r2
-	bne	.L752
-	pop	{r4, r5, pc}
-	.size	ftl_memcpy32, .-ftl_memcpy32
-	.section	.text.NandcCopy1KB,"ax",%progbits
-	.align	1
-	.global	NandcCopy1KB
-	.thumb
-	.thumb_func
-	.type	NandcCopy1KB, %function
-NandcCopy1KB:
-	@ args = 4, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	cmp	r1, #1
-	mov	r4, r2
-	add	r2, r0, #4096
-	ldr	r5, [sp, #16]
-	add	r6, r0, #512
-	add	r2, r2, r4, lsl #9
-	bne	.L754
-	cbz	r3, .L755
-	mov	r0, r2
-	lsls	r2, r3, #30
-	mov	r1, r3
-	bne	.L756
-	mov	r2, #256
-	bl	ftl_memcpy32
-	b	.L755
-.L756:
-	mov	r2, #1024
-	bl	memcpy
+	bhi	.L771
+	pop	{r4, pc}
+.L747:
+	cmp	r0, #1
+	bne	.L750
+	ldr	r1, .L784
+	movs	r3, #0
+.L753:
+	cmp	r3, #3
+	uxth	r2, r3
+	bls	.L751
+	tst	r2, #1
+	ite	ne
+	movne	r0, #3
+	moveq	r0, #2
+	rsb	r2, r0, r2, lsl #1
+	uxth	r2, r2
+.L751:
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
+	bne	.L753
+	b	.L754
+.L750:
+	cmp	r0, #2
+	bne	.L755
+	ldr	r1, .L784
+	movs	r2, #0
+.L757:
+	uxth	r3, r2
+	cmp	r2, #1
+	ittt	hi
+	lslhi	r3, r3, #1
+	addhi	r3, r3, #-1
+	uxthhi	r3, r3
+	strh	r3, [r1, r2, lsl #1]	@ movhi
+	adds	r2, r2, #1
+	cmp	r2, #256
+	bne	.L757
+	b	.L754
 .L755:
-	cbz	r5, .L753
-	lsrs	r4, r4, #1
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	lsls	r3, r3, #16
-	orr	r3, r3, r2, lsl #8
-	ldrb	r2, [r5, #0]	@ zero_extendqisi2
-	orrs	r3, r3, r2
-	ldrb	r2, [r5, #3]	@ zero_extendqisi2
-	orr	r3, r3, r2, lsl #24
-	str	r3, [r6, r4]
-	pop	{r4, r5, r6, pc}
-.L754:
-	cbz	r3, .L758
-	mov	r0, r3
-	lsls	r3, r3, #30
-	mov	r1, r2
-	bne	.L759
-	mov	r2, #256
-	bl	ftl_memcpy32
-	b	.L758
+	cmp	r0, #3
+	bne	.L758
+	ldr	r1, .L784
+	movs	r3, #0
+.L761:
+	cmp	r3, #5
+	uxth	r2, r3
+	bls	.L759
+	tst	r2, #1
+	ite	ne
+	movne	r0, #5
+	moveq	r0, #4
+	rsb	r2, r0, r2, lsl #1
+	uxth	r2, r2
 .L759:
-	mov	r2, #1024
-	bl	memcpy
-.L758:
-	cbz	r5, .L753
-	lsrs	r4, r4, #1
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldr	r3, [r6, r4]
-	lsrs	r2, r3, #8
-	strb	r3, [r5, #0]
-	strb	r2, [r5, #1]
-	lsrs	r2, r3, #16
-	lsrs	r3, r3, #24
-	strb	r2, [r5, #2]
-	strb	r3, [r5, #3]
-.L753:
-	pop	{r4, r5, r6, pc}
-	.size	NandcCopy1KB, .-NandcCopy1KB
-	.section	.text.NandcXferData,"ax",%progbits
-	.align	1
-	.global	NandcXferData
-	.thumb
-	.thumb_func
-	.type	NandcXferData, %function
-NandcXferData:
-	@ args = 4, pretend = 0, frame = 80
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	mov	fp, r3
-	ldr	r3, .L798
-	mov	r6, r0
-	str	r1, [sp, #12]
-	lsls	r1, r4, #26
-	mov	sl, r2
-	ldr	r5, [sp, #120]
-	ldr	r8, [r3, r0, lsl #3]
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #256
 	bne	.L761
-	cbnz	r5, .L762
-	add	r0, sp, #20
-	movs	r1, #255
-	movs	r2, #64
-	add	r5, sp, #20
-	bl	memset
+	b	.L754
+.L758:
+	cmp	r0, #4
+	mov	r3, #0
+	bne	.L762
+	ldr	r2, .L784
+	strh	r3, [r2]	@ movhi
+	movs	r3, #1
+	strh	r3, [r2, #2]	@ movhi
+	movs	r3, #2
+	strh	r3, [r2, #4]	@ movhi
+	movs	r3, #3
+	strh	r3, [r2, #6]	@ movhi
+	movs	r3, #5
+	strh	r3, [r2, #10]	@ movhi
+	movs	r3, #7
+	strh	r3, [r2, #12]	@ movhi
+	movs	r3, #8
+	strh	r0, [r2, #8]	@ movhi
+	strh	r3, [r2, #14]!	@ movhi
+.L764:
+	tst	r3, #1
+	ite	ne
+	movne	r1, #7
+	moveq	r1, #6
+	rsb	r1, r1, r3, lsl #1
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r1, [r2, #2]!	@ movhi
+	cmp	r3, #256
+	bne	.L764
+	b	.L754
 .L762:
-	movs	r3, #0
-	mov	r0, r6
-	ldr	r1, [sp, #12]
-	mov	r2, sl
-	stmia	sp, {r4, r5}
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L785
-	ldr	r3, .L798+4
-	lsr	r0, sl, #1
-	ldr	r1, .L798+8
-	ldr	r4, [r3, #0]
-	ldr	r3, [sp, #12]
-	cmp	r4, #24
-	ite	hi
-	movhi	r4, #128
-	movls	r4, #64
-	mov	r2, r3
-	b	.L765
+	cmp	r0, #5
+	bne	.L765
+	ldr	r2, .L784
 .L766:
-	ldr	r7, [r1, #4]
-	lsrs	r3, r3, #2
-	adds	r2, r2, #1
-	ldr	r3, [r7, r3, lsl #2]
-	lsrs	r7, r3, #8
-	strb	r3, [r5, #0]
-	strb	r7, [r5, #1]
-	lsrs	r7, r3, #16
-	lsrs	r3, r3, #24
-	strb	r7, [r5, #2]
-	strb	r3, [r5, #3]
-	adds	r5, r5, #4
-	mov	r3, r6
+	strh	r3, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	cmp	r3, #16
+	bne	.L766
+	ldr	r2, .L784+8
+.L767:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L767
+	b	.L754
 .L765:
-	cmp	r2, r0
-	add	r6, r3, r4
-	bcc	.L766
-	ldr	r3, .L798+4
-	lsr	sl, sl, #2
-	ldr	r0, [r3, #0]
-	ldr	r3, .L798+12
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	mov	r4, r3
-	b	.L767
-.L773:
-	add	r2, r3, #8
-	ldr	r2, [r8, r2, lsl #2]
-	str	r2, [sp, #84]
-	ldr	r2, [sp, #84]
-	lsls	r2, r2, #29
-	bmi	.L788
-	ldr	r2, [sp, #84]
-	ands	r2, r2, #32768
-	bne	.L788
-	cmp	r1, #5
-	bls	.L769
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #27, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #29, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L770
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #27, #1
-	b	.L797
+	cmp	r0, #6
+	bne	.L754
+	ldr	r0, .L784
+	mov	r1, r3
 .L770:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #29, #1
-	b	.L797
-.L769:
-	cmp	r1, #3
-	bls	.L771
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #28, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #30, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L772
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #28, #1
-	b	.L797
-.L772:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #30, #1
-.L797:
-	orr	r2, r5, r2, lsl #5
-.L771:
-	cmp	r4, r2
-	it	cc
-	movcc	r4, r2
-	b	.L768
-.L788:
-	mov	r4, #-1
+	cmp	r1, #5
+	uxth	r2, r1
+	bls	.L768
+	tst	r2, #1
+	ite	ne
+	movne	r2, #12
+	moveq	r2, #10
+	subs	r2, r3, r2
+	uxth	r2, r2
 .L768:
+	strh	r2, [r0, r1, lsl #1]	@ movhi
+	adds	r1, r1, #1
+	cmp	r1, #256
+	add	r3, r3, #3
+	uxth	r3, r3
+	bne	.L770
+	b	.L754
+.L771:
+	ldrh	r2, [r1, r3, lsl #1]
 	adds	r3, r3, #1
-.L767:
-	cmp	r3, sl
-	bcs	.L763
-	cmp	r0, #0
-	bne	.L773
-	b	.L763
+	strh	r2, [r0, r2, lsl #1]	@ movhi
+	b	.L749
 .L785:
-	movs	r4, #0
-.L763:
-	movs	r3, #0
-	str	r3, [r8, #16]
-	b	.L774
-.L761:
-	ldr	r3, [sp, #12]
-	mov	r7, #0
-	cmp	r3, #1
-	bne	.L795
-	b	.L775
-.L778:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	and	r4, r7, #3
-	mov	r0, r8
-	movs	r1, #1
-	mla	r3, r7, r3, r5
-	mov	r2, r4
-	adds	r7, r7, #2
-	str	r3, [sp, #0]
-	mov	r3, fp
-	bl	NandcCopy1KB
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	str	r3, [sp, #4]
-	movs	r1, #1
-	movs	r2, #2
-	mov	r3, r4
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	add	fp, fp, #1024
-.L775:
-	cmp	r7, sl
-	bcc	.L778
-	movs	r4, #0
-	b	.L774
-.L795:
-	mov	r1, r7
-	movs	r2, #2
-	mov	r3, r7
-	str	r7, [sp, #0]
-	str	r7, [sp, #4]
-	mov	r4, r7
-	bl	NandcXferStart
-	b	.L779
-.L783:
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [r8, #32]
-	add	ip, r7, #2
-	cmp	ip, sl
-	str	r3, [sp, #84]
-	bcs	.L780
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	mov	r1, r3
-	str	r3, [sp, #4]
-	movs	r2, #2
-	and	r3, ip, #3
-	str	ip, [sp, #8]
-	bl	NandcXferStart
-	ldr	ip, [sp, #8]
-.L780:
-	ldr	r3, [sp, #84]
-	lsls	r1, r3, #29
-	bmi	.L792
-	ldr	r2, [sp, #84]
-	ldr	r3, [sp, #84]
-	ubfx	r2, r2, #3, #5
-	ubfx	r3, r3, #27, #1
-	orr	r3, r2, r3, lsl #5
-	cmp	r4, r3
-	it	cc
-	movcc	r4, r3
-	b	.L781
-.L792:
-	mov	r4, #-1
-.L781:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	sub	r2, ip, #2
-	mov	r0, r8
-	movs	r1, #0
-	mla	r7, r7, r3, r5
-	and	r2, r2, #3
-	mov	r3, fp
-	str	ip, [sp, #8]
-	add	fp, fp, #1024
-	str	r7, [sp, #0]
-	bl	NandcCopy1KB
-	ldr	ip, [sp, #8]
-	mov	r7, ip
-.L779:
-	cmp	r7, sl
-	bcc	.L783
-.L774:
-	ldr	r3, .L798+12
-	ldr	r3, [r3, #0]
-	cmp	r3, #5
-	bls	.L784
-	ldr	r3, [sp, #12]
-	cbnz	r3, .L784
-	ldr	r3, [r8, #0]
-	and	r2, r3, #139264
-	cmp	r2, #139264
-	bne	.L784
-	mov	r4, #-1
-	orr	r3, r3, #131072
-	str	r3, [r8, #0]
-.L784:
-	mov	r0, r4
-	add	sp, sp, #88
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L799:
 	.align	2
-.L798:
-	.word	.LANCHOR5
-	.word	.LANCHOR36
-	.word	.LANCHOR38
-	.word	.LANCHOR37
-	.size	NandcXferData, .-NandcXferData
-	.section	.text.FlashProgPage,"ax",%progbits
+.L784:
+	.word	.LANCHOR16
+	.word	.LANCHOR117
+	.word	.LANCHOR16+30
+	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
+	.section	.text.FlashDieInfoInit,"ax",%progbits
 	.align	1
-	.global	FlashProgPage
+	.global	FlashDieInfoInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashProgPage, %function
-FlashProgPage:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashDieInfoInit, %function
+FlashDieInfoInit:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L803
-	mov	r5, r1
-	mov	r6, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L801
-	ldr	r3, .L803+4
-	ldr	r2, .L803+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	bcs	.L801
-	ldr	r3, .L803+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L802
-	subs	r7, r7, #2
-	b	.L801
-.L802:
-	movs	r7, #4
-.L801:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r0, r4
-	mov	r1, r5
-	bl	FlashProgFirstCmd
-	uxtb	r2, r7
-	mov	r3, r6
-	movs	r1, #1
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashReadStatus
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	and	r0, r5, #1
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L804:
-	.align	2
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #0
+	ldr	r2, .L804
+	ldr	r4, .L804+4
+	strb	r3, [r2]
+	str	r2, [sp]
+	strb	r3, [r4]
+	ldr	r3, .L804+8
+	ldr	r7, .L804+12
+	ldrh	r3, [r3, #10]
+	cmp	r3, #256
+	bls	.L787
+	mov	r3, #512
 .L803:
+	movs	r2, #8
+	movs	r1, #0
+	ldr	r0, .L804+16
+	movs	r6, #0
+	str	r3, [r7]
+	bl	ftl_memset
+	movs	r2, #32
+	movs	r1, #0
+	ldr	r0, .L804+20
+	bl	ftl_memset
+	movs	r2, #128
+	movs	r1, #0
+	ldr	r0, .L804+24
+	bl	ftl_memset
+	ldr	r3, .L804+28
+	ldr	fp, .L804+36
+	ldr	r5, [r3]
+	ldr	r3, .L804+16
+	ldrb	r10, [r5]	@ zero_extendqisi2
+	add	r8, r5, #1
+.L791:
+	mov	r2, r10
+	add	r1, fp, r6, lsl #3
+	mov	r0, r8
+	str	r3, [sp, #4]
+	bl	FlashMemCmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L790
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	ldr	r1, .L804+20
+	strb	r6, [r3, r2]
+	str	r0, [r1, r2, lsl #2]
+	adds	r1, r2, #1
+	strb	r1, [r4]
+.L790:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L791
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	ldr	r2, [sp]
+	strb	r3, [r2]
+	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	beq	.L792
+.L796:
+	ldrh	r2, [r5, #14]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	smulbb	r3, r3, r2
+	ldr	r2, .L804+32
+	strh	r3, [r2]	@ movhi
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L787:
+	cmp	r3, #128
+	it	hi
+	movhi	r3, #256
+	b	.L803
+.L792:
+	ldr	fp, [r7]
+	movs	r6, #0
+	ldr	r7, .L804+20
+	ldr	r3, .L804+16
+.L795:
+	str	r3, [sp]
+	mov	r2, r10
+	ldr	r3, .L804+36
+	mov	r0, r8
+	add	r1, r3, r6, lsl #3
+	bl	FlashMemCmp8
+	ldr	r3, [sp]
+	cbnz	r0, .L793
+	ldrh	r2, [r5, #14]
+	ldrb	r1, [r4]	@ zero_extendqisi2
+	and	r0, r2, #65280
+	ldrb	r2, [r5, #13]	@ zero_extendqisi2
+	mul	r2, fp, r2
+	muls	r2, r0, r2
+	str	r2, [r7, r1, lsl #2]
+	ldrb	r0, [r5, #23]	@ zero_extendqisi2
+	cbz	r0, .L794
+	lsls	r2, r2, #1
+	str	r2, [r7, r1, lsl #2]
+.L794:
+	adds	r2, r1, #1
+	strb	r6, [r3, r1]
+	strb	r2, [r4]
+.L793:
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L795
+	b	.L796
+.L805:
+	.align	2
+.L804:
+	.word	.LANCHOR118
+	.word	.LANCHOR25
+	.word	.LANCHOR29
+	.word	.LANCHOR3
+	.word	.LANCHOR26
+	.word	.LANCHOR17
+	.word	.LANCHOR23
 	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.size	FlashProgPage, .-FlashProgPage
-	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.word	.LANCHOR119
+	.word	.LANCHOR22
+	.size	FlashDieInfoInit, .-FlashDieInfoInit
+	.section	.text.ReadFlashInfo,"ax",%progbits
 	.align	1
-	.global	FlashPageProgMsbFFData
+	.global	ReadFlashInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashPageProgMsbFFData, %function
-FlashPageProgMsbFFData:
+	.fpu softvfp
+	.type	ReadFlashInfo, %function
+ReadFlashInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L813
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r2
-	ldr	r2, .L813+4
-	mov	r8, r0
-	ldr	r3, [r3, #0]
-	mov	r7, r1
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r2, .L806
-	ldr	r2, .L813+8
-	ldr	r1, [r2, #0]
-	ldr	r2, .L813+12
-	cmp	r1, r2
-	beq	.L805
-.L806:
-	subs	r2, r3, #5
-	cmp	r2, #2
-	bls	.L810
-	cmp	r3, #68
-	beq	.L810
-	cmp	r3, #35
-	beq	.L810
-	cmp	r3, #19
-	bne	.L805
-	b	.L810
-.L811:
-	ldrh	r3, [sl, r4, lsl #1]
-	cmp	r3, fp
-	bne	.L805
-	movs	r1, #255
-	mov	r2, #32768
-	ldr	r0, [r5, #0]
-	bl	memset
-	adds	r1, r4, r7
-	adds	r4, r4, #1
-	mov	r0, r8
-	ldr	r2, [r5, #0]
-	movs	r3, #0
-	bl	FlashProgPage
-	uxth	r4, r4
-	b	.L812
+	push	{r4, r5, r6, lr}
+	movs	r1, #0
+	ldr	r6, .L809
+	movs	r2, #11
+	mov	r4, r0
+	movs	r5, #0
+	bl	ftl_memset
+	ldr	r3, [r6]
+	mov	r0, r5
+	ldr	r2, .L809+4
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	ldr	r2, [r2]
+	smulbb	r3, r3, r2
+	uxth	r3, r3
+	strb	r3, [r4, #4]
+	lsrs	r3, r3, #8
+	strb	r3, [r4, #5]
+	ldr	r3, .L809+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strb	r3, [r4, #7]
+	bl	FlashBootGetCapacity
+	ubfx	r3, r0, #8, #8
+	strb	r0, [r4]
+	strb	r3, [r4, #1]
+	ubfx	r3, r0, #16, #8
+	strb	r3, [r4, #2]
+	lsrs	r0, r0, #24
+	ldr	r3, [r6]
+	strb	r0, [r4, #3]
+	mov	r0, r5
+	ldr	r1, .L809+12
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	strb	r2, [r4, #6]
+	movs	r2, #32
+	strb	r2, [r4, #8]
+	ldrb	r3, [r3, #7]	@ zero_extendqisi2
+	strb	r5, [r4, #10]
+	movs	r5, #1
+	strb	r3, [r4, #9]
+	ldr	r3, .L809+16
+	ldrb	r2, [r3]	@ zero_extendqisi2
+.L807:
+	uxtb	r3, r0
+	cmp	r2, r3
+	bhi	.L808
+	pop	{r4, r5, r6, pc}
+.L808:
+	ldrb	r3, [r0, r1]	@ zero_extendqisi2
+	adds	r0, r0, #1
+	ldrb	r6, [r4, #10]	@ zero_extendqisi2
+	lsl	r3, r5, r3
+	orrs	r3, r3, r6
+	strb	r3, [r4, #10]
+	b	.L807
 .L810:
-	ldr	r6, .L813
-	movw	fp, #65535
-	ldr	sl, .L813+20
-	ldr	r5, .L813+16
-.L812:
-	ldr	r3, [r6, #0]
-	ldrh	r3, [r3, #10]
-	cmp	r3, r4
-	bhi	.L811
-.L805:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L814:
 	.align	2
-.L813:
-	.word	.LANCHOR23
-	.word	.LANCHOR7
-	.word	.LANCHOR142
-	.word	1446522928
-	.word	.LANCHOR143
-	.word	.LANCHOR9
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.FlashReadRawPage,"ax",%progbits
+.L809:
+	.word	.LANCHOR18
+	.word	.LANCHOR3
+	.word	.LANCHOR31
+	.word	.LANCHOR26
+	.word	.LANCHOR25
+	.size	ReadFlashInfo, .-ReadFlashInfo
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
 	.align	1
-	.global	FlashReadRawPage
+	.global	FtlBbt2Bitmap
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadRawPage, %function
-FlashReadRawPage:
+	.fpu softvfp
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L818
+	ldr	r3, .L817
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r7, .L817+4
 	mov	r6, r1
-	mov	r5, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L816
-	ldr	r3, .L818+4
-	ldr	r2, .L818+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	it	cc
-	movcc	r7, #4
-.L816:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r1, r6
-	mov	r0, r4
-	bl	FlashReadCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r3, r5
+	subs	r4, r5, #2
+	addw	r5, r5, #1022
+	ldrh	r2, [r3]
 	movs	r1, #0
-	mov	r2, r7
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L819:
-	.align	2
+	ldr	r8, .L817+20
+	mov	r0, r6
+	lsls	r2, r2, #2
+	bl	ftl_memset
+.L814:
+	ldrh	r3, [r4, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L811
+	ldrh	r2, [r7]
+	cmp	r2, r3
+	bhi	.L813
+	mov	r1, r8
+	movs	r2, #79
+	ldr	r0, .L817+8
+	bl	printf
+	ldr	r1, .L817+12
+	ldr	r0, .L817+16
+	bl	printf
+.L813:
+	ldrh	r3, [r4, #2]!
+	movs	r2, #1
+	cmp	r5, r4
+	lsr	r1, r3, #5
+	and	r3, r3, #31
+	lsl	r3, r2, r3
+	ldr	r2, [r6, r1, lsl #2]
+	orr	r2, r2, r3
+	str	r2, [r6, r1, lsl #2]
+	bne	.L814
+.L811:
+	pop	{r4, r5, r6, r7, r8, pc}
 .L818:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadRawPage, .-FlashReadRawPage
-	.section	.text.HynixReadRetrial,"ax",%progbits
+	.align	2
+.L817:
+	.word	.LANCHOR120
+	.word	.LANCHOR49
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR121
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
-	.global	HynixReadRetrial
+	.global	FtlBbtMemInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	HynixReadRetrial, %function
-HynixReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r2
-	ldr	r2, .L835
-	mov	r7, r3
-	mov	r6, r0
-	str	r1, [sp, #4]
-	adds	r3, r2, r0
-	mov	r8, #0
-	ldrb	fp, [r2, #2]	@ zero_extendqisi2
-	mov	r5, #-1
-	ldr	r2, .L835+4
-	ldrb	r4, [r3, #12]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
-	bl	NandcWaitFlashReady
-	b	.L822
-.L827:
-	adds	r4, r4, #1
-	ldr	r2, .L835
-	mov	r0, r6
-	uxtb	r4, r4
-	cmp	r4, fp
-	it	cs
-	movcs	r4, #0
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	mov	r3, r4
-	adds	r2, r2, #4
-	bl	HynixSetRRPara
-	mov	r3, r7
-	mov	r0, r6
-	ldr	r1, [sp, #4]
-	mov	r2, sl
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	beq	.L824
-	ldr	r2, .L835+8
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L833
-	movs	r7, #0
-	mov	sl, r7
-.L824:
-	add	r8, r8, #1
-.L822:
-	cmp	r8, fp
-	bcc	.L827
-	b	.L826
-.L833:
-	mov	r5, r0
-.L826:
-	ldr	r3, .L835+4
-	ldr	r3, [r3, #0]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L835
-	add	r6, r3, r6
-	ldr	r3, .L835+8
-	it	eq
-	strbeq	r4, [r6, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	it	ne
-	strbne	r4, [r6, #12]
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L830
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L830:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L836:
+	@ link register save eliminated.
+	ldr	r0, .L820
+	movw	r3, #65535
+	movs	r2, #16
+	movs	r1, #255
+	strh	r3, [r0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	ftl_memset
+.L821:
 	.align	2
-.L835:
-	.word	.LANCHOR31
-	.word	.LANCHOR23
-	.word	.LANCHOR29
-	.size	HynixReadRetrial, .-HynixReadRetrial
-	.section	.text.MicronReadRetrial,"ax",%progbits
+.L820:
+	.word	.LANCHOR73
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
-	.global	MicronReadRetrial
+	.global	FtlFreeSysBlkQueueInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	MicronReadRetrial, %function
-MicronReadRetrial:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L851
-	mov	sl, r0
-	sub	sp, sp, #24
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L851+4
-	str	r1, [sp, #16]
-	str	r2, [sp, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L838
-	add	r0, r0, r0, lsl #1
-	ubfx	r0, r0, #2, #8
-	b	.L850
-.L838:
-	movs	r1, #3
-	bl	__aeabi_idiv
-	uxtb	r0, r0
-.L850:
-	str	r0, [sp, #12]
-	mov	r0, sl
-	bl	NandcWaitFlashReady
-	ldr	r3, .L851+8
-	mov	r8, #0
-	mov	r4, #-1
-	ldr	r6, [r3, sl, lsl #3]
-	add	r3, r3, sl, lsl #3
-	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-	adds	r7, r7, #8
-	lsls	r7, r7, #8
-	adds	r5, r6, r7
-	b	.L840
-.L844:
-	movs	r2, #239
-	movs	r3, #137
-	str	r2, [r5, #8]
-	movs	r0, #200
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r2, #0
-	add	ip, r8, #1
-	mov	r0, sl
-	str	ip, [r5, #0]
-	mov	r3, fp
-	str	r2, [r5, #0]
-	ldr	r1, [sp, #16]
-	str	r2, [r5, #0]
-	str	r2, [r5, #0]
-	ldr	r2, [sp, #20]
-	str	ip, [sp, #8]
-	bl	FlashReadRawPage
-	ldr	ip, [sp, #8]
-	adds	r2, r0, #1
-	beq	.L841
-	ldr	r3, [sp, #12]
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	cmp	r0, r3
-	bcc	.L848
-	mov	fp, #0
-	str	fp, [sp, #20]
-.L841:
-	mov	r8, ip
-.L840:
-	ldr	r2, .L851+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r8, r3
-	bcc	.L844
-	b	.L843
-.L848:
-	mov	r4, r0
-.L843:
-	movs	r3, #239
-	movs	r0, #200
-	str	r3, [r5, #8]
-	movs	r3, #137
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r3, #0
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	ldr	r3, [sp, #12]
-	cmp	r4, r3
-	bcc	.L845
-	ldr	r0, .L851+16
-	mov	r1, r8
-	ldr	r2, [sp, #16]
-	mov	r3, r8
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-	str	r4, [sp, #0]
-	bl	printf
-.L845:
+	ldr	r3, .L823
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	ftl_memset
 	mov	r0, r4
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L852:
+	pop	{r4, pc}
+.L824:
 	.align	2
-.L851:
-	.word	.LANCHOR29
-	.word	.LANCHOR7
-	.word	.LANCHOR5
-	.word	.LANCHOR144
-	.word	.LC7
-	.size	MicronReadRetrial, .-MicronReadRetrial
-	.section	.text.SamsungReadRetrial,"ax",%progbits
+.L823:
+	.word	.LANCHOR74
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
-	.global	SamsungReadRetrial
+	.global	ftl_free_no_use_map_blk
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	SamsungReadRetrial, %function
-SamsungReadRetrial:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	r8, r2
-	mov	r6, r3
-	mov	fp, r1
-	bl	NandcWaitFlashReady
-	ldr	r3, .L863
-	movs	r5, #1
-	mov	r4, #-1
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	sl, [r3, #4]	@ zero_extendqisi2
-	add	sl, sl, #8
-	add	sl, r2, sl, lsl #8
-	b	.L854
-.L858:
-	mov	r0, sl
-	uxtb	r1, r5
-	bl	SamsungSetRRPara
-	mov	r1, fp
-	mov	r0, r7
-	mov	r2, r8
-	mov	r3, r6
-	bl	FlashReadRawPage
-	adds	r1, r0, #1
-	beq	.L855
-	ldr	r2, .L863+4
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L861
-	movs	r6, #0
-	mov	r8, r6
-.L855:
-	adds	r5, r5, #1
-.L854:
-	ldr	r2, .L863+8
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r5, r3
-	bcc	.L858
-	b	.L857
-.L861:
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-.L857:
+	ldr	r5, [r0, #20]
 	movs	r1, #0
-	mov	r0, sl
-	bl	SamsungSetRRPara
-	ldr	r3, .L863+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, lsr #2
-	bcc	.L859
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-.L859:
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L864:
+	ldr	r10, [r0, #12]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #24]
+	mov	r0, r5
+	bl	ftl_memset
+	movs	r3, #0
+.L826:
+	ldrh	r1, [r4, #6]
+	uxth	r2, r3
+	cmp	r1, r2
+	bhi	.L830
+	ldrh	r3, [r5]
+	movs	r6, #0
+	ldr	r2, .L839
+	mov	fp, r6
+.L831:
+	ldrh	r0, [r4, #10]
+	uxth	r1, r6
+	cmp	r0, r1
+	bhi	.L835
+	mov	r0, fp
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L830:
+	uxth	r2, r3
+	ldr	r1, [r6, r2, lsl #2]
+	movs	r2, #0
+	ubfx	r1, r1, #10, #16
+.L827:
+	ldrh	r7, [r4, #10]
+	uxth	r0, r2
+	cmp	r7, r0
+	bhi	.L829
+	adds	r3, r3, #1
+	b	.L826
+.L829:
+	uxth	r0, r2
+	adds	r2, r2, #1
+	ldrh	r7, [r10, r0, lsl #1]
+	cmp	r7, r1
+	ittt	eq
+	ldrheq	r7, [r5, r0, lsl #1]
+	addeq	r7, r7, #1
+	strheq	r7, [r5, r0, lsl #1]	@ movhi
+	b	.L827
+.L835:
+	ldrh	r0, [r4]
+	uxth	r7, r6
+	cmp	r0, r1
+	bne	.L832
+	ldrh	r0, [r2]
+	ldrh	ip, [r4, #2]
+	cmp	ip, r0
+	it	cc
+	strhcc	r0, [r5, r7, lsl #1]	@ movhi
+.L832:
+	ldrh	r8, [r5, r7, lsl #1]
+	cmp	r3, r8
+	itt	hi
+	movhi	fp, r1
+	movhi	r3, r8
+	cmp	r8, #0
+	bne	.L834
+	ldrh	r0, [r10, r7, lsl #1]
+	cbz	r0, .L834
+	movs	r1, #1
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	bl	FtlFreeSysBlkQueueIn
+	strh	r8, [r10, r7, lsl #1]	@ movhi
+	ldr	r2, [sp, #4]
+	ldrh	r1, [r4, #8]
+	ldr	r3, [sp]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.L834:
+	adds	r6, r6, #1
+	b	.L831
+.L840:
 	.align	2
-.L863:
-	.word	.LANCHOR5
-	.word	.LANCHOR29
-	.word	.LANCHOR144
-	.size	SamsungReadRetrial, .-SamsungReadRetrial
-	.section	.text.ToshibaReadRetrial,"ax",%progbits
+.L839:
+	.word	.LANCHOR52
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
-	.global	ToshibaReadRetrial
+	.global	FtlL2PDataInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	fp, r2
-	mov	r8, r3
-	str	r1, [sp, #4]
-	bl	NandcWaitFlashReady
-	ldr	r3, .L887
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L887+4
-	adds	r4, r4, #8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r4, r2, r4, lsl #8
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bls	.L882
-	ldr	r3, .L887+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L883
-	movs	r0, #0
-	mov	sl, #1
-	bl	NandcSetDdrMode
-	b	.L867
-.L883:
-	mov	sl, r3
-.L867:
-	movs	r3, #92
-	str	r3, [r4, #8]
-	movs	r3, #197
-	str	r3, [r4, #8]
-	b	.L866
-.L882:
-	mov	sl, #0
-.L866:
-	movs	r6, #1
-	mov	r5, #-1
-	b	.L868
-.L877:
-	ldr	r1, .L887+4
-	mov	r0, r4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	uxtb	r1, r6
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L869
-	bl	SandiskSetRRPara
-	b	.L870
-.L869:
-	bl	ToshibaSetRRPara
-.L870:
-	ldr	r2, .L887+4
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L871
-	ldr	r1, .L887+12
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r6, r3
-	bne	.L871
-	movs	r2, #179
-	str	r2, [r4, #8]
-.L871:
-	movs	r3, #38
-	str	r3, [r4, #8]
-	movs	r3, #93
-	str	r3, [r4, #8]
-	cmp	sl, #0
-	beq	.L872
-	movs	r0, #4
-	bl	NandcSetDdrMode
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	mov	r3, r8
-	mov	r0, r7
-	bl	FlashReadRawPage
-	mov	r3, r0
-	movs	r0, #0
-	str	r3, [sp, #0]
-	bl	NandcSetDdrMode
-	ldr	r3, [sp, #0]
-	b	.L873
-.L872:
-	mov	r3, r8
-	mov	r0, r7
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	bl	FlashReadRawPage
-	mov	r3, r0
-.L873:
-	adds	r0, r3, #1
-	beq	.L874
-	ldr	r1, .L887+16
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r3
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	add	r2, r2, r2, lsl #1
-	cmp	r3, r2, lsr #2
-	bcc	.L885
-	mov	r8, #0
-	mov	fp, r8
-.L874:
-	adds	r6, r6, #1
-.L868:
-	ldr	r2, .L887+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r6, r3
-	bcc	.L877
-	b	.L876
-.L885:
-	mov	r5, r3
-.L876:
-	ldr	r3, .L887+4
+	push	{r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	mov	r0, r4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L878
-	bl	SandiskSetRRPara
-	b	.L879
-.L878:
-	bl	ToshibaSetRRPara
-.L879:
-	movs	r3, #255
-	str	r3, [r4, #8]
-	ldr	r3, .L887+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L880
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L880:
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-	cmp	sl, #0
-	beq	.L881
-	movs	r0, #4
-	bl	NandcSetDdrMode
-.L881:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L888:
+	ldr	r5, .L844
+	ldr	r4, .L844+4
+	ldr	r2, [r5]
+	ldr	r7, .L844+8
+	ldr	r6, .L844+12
+	ldr	r0, [r4]
+	lsls	r2, r2, #1
+	ldr	r8, .L844+44
+	bl	ftl_memset
+	ldrh	r3, [r7]
+	movs	r1, #255
+	ldrh	r2, [r6]
+	ldr	r0, [r8]
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L844+16
+	movw	r0, #65535
+	ldrh	r1, [r6]
+	ldr	ip, [r8]
+	ldr	r2, [r3]
+	movs	r3, #12
+	ldrh	r7, [r7]
+	mla	r3, r1, r3, r3
+	adds	r1, r2, r3
+	movs	r3, #0
+	mov	lr, r3
+.L842:
+	adds	r2, r2, #12
+	adds	r6, r3, r7
+	cmp	r2, r1
+	bne	.L843
+	ldr	r3, .L844+20
+	ldr	r2, [r5]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L844+24
+	strh	r0, [r3]	@ movhi
+	strh	r0, [r3, #40]	@ movhi
+	ldrh	r2, [r2]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L844+28
+	ldrh	r2, [r2]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L844+32
+	ldr	r2, [r2]
+	str	r2, [r3, #12]
+	ldr	r2, .L844+36
+	ldr	r2, [r2]
+	str	r2, [r3, #16]
+	ldr	r2, [r4]
+	str	r2, [r3, #20]
+	ldr	r2, .L844+40
+	ldr	r2, [r2]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L843:
+	bic	r3, r3, #3
+	str	lr, [r2, #-8]
+	add	r3, r3, ip
+	strh	r0, [r2, #-12]	@ movhi
+	str	r3, [r2, #-4]
+	mov	r3, r6
+	b	.L842
+.L845:
 	.align	2
-.L887:
-	.word	.LANCHOR5
-	.word	.LANCHOR11
-	.word	.LANCHOR35
-	.word	.LANCHOR144
-	.word	.LANCHOR29
-	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
-	.section	.text.FlashSavePhyInfo,"ax",%progbits
+.L844:
+	.word	.LANCHOR63
+	.word	.LANCHOR122
+	.word	.LANCHOR56
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.word	.LANCHOR124
+	.word	.LANCHOR125
+	.word	.LANCHOR65
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR128
+	.word	.LANCHOR123
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
-	.global	FlashSavePhyInfo
+	.global	FtlVariablesInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashSavePhyInfo, %function
-FlashSavePhyInfo:
+	.fpu softvfp
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L896
-	ldr	r8, .L896+60
-	ldr	sl, .L896+64
-	ldr	r3, [r7, #0]
-	ldr	fp, .L896+48
-	ldr	r6, .L896+4
-	str	r3, [r8, #0]
-	ldr	r3, .L896+8
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r1, #0
-	mov	r2, #2048
-	ldr	r0, [r7, #0]
-	bl	memset
-	ldr	r0, [r8, #0]
-	ldr	r3, .L896+12
-	movs	r2, #32
-	ldr	r1, .L896+16
-	str	sl, [r0, #0]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #12]	@ movhi
-	ldr	r3, .L896+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #14]	@ movhi
-	ldr	r3, .L896+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [r0, #1076]
-	adds	r0, r0, #16
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+28
-	movs	r2, #8
-	adds	r0, r0, #80
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+32
-	movs	r2, #32
-	adds	r0, r0, #96
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+36
-	movs	r2, #32
-	adds	r0, r0, #160
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L896+40
-	movs	r2, #32
-	adds	r0, r0, #192
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	mov	r2, #852
-	ldr	r1, .L896+44
-	adds	r0, r0, #224
-	bl	memcpy
-	ldr	r4, [r8, #0]
-	movw	r1, #2036
-	add	r0, r4, #12
-	bl	JSHash
-	mov	r3, #1592
-	str	r3, [r4, #4]
-	ldr	r3, [fp, #0]
-	str	r3, [r8, #0]
-	str	r0, [r4, #8]
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	mov	r4, r5
-.L892:
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r2, r0
-	muls	r1, r4, r1
-	bl	FlashEraseBlock
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	bl	FlashProgPage
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	adds	r1, r1, #1
-	bl	FlashProgPage
-	ldr	r3, .L896+48
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L890
-	ldr	fp, [r8, #0]
-	ldr	r3, [fp, #0]
-	cmp	r3, sl
-	bne	.L890
-	add	r0, fp, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [fp, #8]
-	cmp	r3, r0
-	bne	.L890
-	ldr	r3, .L896+52
-	adds	r2, r4, #1
-	adds	r5, r5, #1
-	str	r2, [r3, #0]
-	ldr	r3, .L896+56
-	ldr	r2, [r6, #0]
-	muls	r2, r4, r2
-	cmp	r5, #1
-	str	r2, [r3, #0]
-	bhi	.L891
-.L890:
-	adds	r4, r4, #1
-	cmp	r4, #4
-	bne	.L892
-.L891:
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-	cmp	r5, #0
-	ite	eq
-	moveq	r0, #-1
-	movne	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L897:
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L847
+	movw	r2, #65535
+	mov	r1, r4
+	ldr	r5, .L847+4
+	str	r4, [r3]
+	ldr	r3, .L847+8
+	strh	r2, [r3]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L847+12
+	str	r4, [r3]
+	ldr	r3, .L847+16
+	str	r4, [r3]
+	ldr	r3, .L847+20
+	str	r2, [r3]
+	ldr	r3, .L847+24
+	str	r4, [r3]
+	ldr	r3, .L847+28
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L847+32
+	ldrh	r2, [r3]
+	ldr	r3, .L847+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L847+40
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L847+44
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L847+48
+	bl	ftl_memset
+	mov	r2, #512
+	mov	r1, r4
+	ldr	r0, .L847+52
+	bl	ftl_memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L848:
 	.align	2
-.L896:
-	.word	.LANCHOR146
-	.word	.LANCHOR2
-	.word	.LANCHOR147
-	.word	.LANCHOR16
-	.word	.LANCHOR22
-	.word	.LANCHOR1
-	.word	.LANCHOR35
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.word	.LANCHOR18
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR143
-	.word	.LANCHOR148
-	.word	.LANCHOR149
-	.word	.LANCHOR145
-	.word	1312902724
-	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
-	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
+.L847:
+	.word	.LANCHOR129
+	.word	.LANCHOR39
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.word	.LANCHOR101
+	.word	.LANCHOR69
+	.word	.LANCHOR60
+	.word	.LANCHOR70
+	.word	.LANCHOR77
+	.word	.LANCHOR134
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
-	.global	FlashReadIdbDataRaw
+	.global	SupperBlkListInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadIdbDataRaw, %function
-FlashReadIdbDataRaw:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	mov	r8, r0
-	ldr	r1, .L909
-	add	r0, sp, #12
-	bl	memcpy
-	ldr	r3, .L909+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	ldr	r3, .L909+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L909+12
-	cmp	r2, r3
-	bne	.L899
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-.L899:
-	mov	r0, r8
+	ldr	r3, .L860
+	movs	r2, #6
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r1, #0
-	mov	r2, #2048
-	mov	r7, #-1
-	bl	memset
-	movs	r4, #2
-	ldr	sl, .L909+32
-	ldr	fp, .L909+36
-	ldr	r6, .L909+16
-	b	.L900
-.L907:
-	movs	r5, #0
-.L902:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r5]	@ zero_extendqisi2
-	bl	FlashBchSel
-	ldr	r3, .L909+16
-	movs	r0, #0
-	ldr	r1, [fp, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L901
+	ldr	r6, .L860+4
+	sub	sp, sp, #24
+	movs	r4, #0
+	ldrh	r3, [r3]
+	mov	r8, r4
+	ldr	r0, [r6]
+	mov	r5, r4
+	mov	r10, r6
+	muls	r2, r3, r2
+	bl	ftl_memset
+	ldr	r3, .L860+8
+	ldr	r2, .L860+12
+	ldr	r1, .L860+16
+	str	r4, [r3]
+	ldr	r3, .L860+20
+	strh	r4, [r2]	@ movhi
+	strh	r4, [r1]	@ movhi
+	str	r4, [r3]
+	ldr	r3, .L860+24
+	str	r2, [sp, #8]
+	str	r4, [r3]
+	ldr	r3, .L860+28
+	mov	fp, r3
+	strh	r4, [r3]	@ movhi
+.L850:
+	ldr	r3, .L860+32
+	sxth	r7, r4
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bge	.L857
+	ldr	r3, .L860+36
+	uxth	r1, r4
+	str	r1, [sp, #12]
+	ldrh	r2, [r3]
+	ldr	r3, .L860+40
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+	movs	r3, #0
+	mov	r6, r3
+	b	.L858
+.L852:
+	str	r3, [sp, #20]
+	ldr	r3, .L860+44
+	ldr	r1, [sp, #12]
+	str	r2, [sp, #16]
+	ldrb	r0, [r3, r0]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #20]
+	cbnz	r0, .L851
+	ldr	r1, [sp, #4]
+	add	r6, r6, r1
+	sxth	r6, r6
+.L851:
+	adds	r3, r3, #1
+.L858:
+	sxth	r0, r3
+	cmp	r0, r2
+	blt	.L852
+	lsls	r3, r7, #1
+	cbz	r6, .L853
+	mov	r1, r6
+	str	r3, [sp, #4]
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	ldr	r3, [sp, #4]
+	sxth	r6, r0
+.L854:
+	ldr	r2, [r10]
+	add	r3, r3, r7
+	add	r2, r2, r3, lsl #1
+	ldr	r3, .L860+48
+	strh	r6, [r2, #4]	@ movhi
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	beq	.L855
+	ldr	r3, .L860+52
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	beq	.L855
+	ldr	r3, .L860+56
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	beq	.L855
+	ldr	r3, .L860+60
+	uxth	r0, r4
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r7, lsl #1]
+	cbnz	r3, .L856
+	add	r8, r8, #1
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+.L855:
+	adds	r4, r4, #1
+	b	.L850
+.L853:
+	ldr	r2, .L860+60
+	movw	r1, #65535
+	ldr	r2, [r2]
+	strh	r1, [r2, r7, lsl #1]	@ movhi
+	b	.L854
+.L856:
 	adds	r5, r5, #1
-	cmp	r5, #4
-	bne	.L902
-	b	.L903
-.L901:
-	ldr	r3, [r6, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L909+20
-	cmp	r2, r3
-	bne	.L903
-	add	r3, sp, #16
-	ldr	r0, .L909+24
-	adds	r5, r3, r5
-	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
+	uxth	r5, r5
+	bl	INSERT_DATA_LIST
+	b	.L855
+.L857:
+	ldr	r2, [sp, #8]
+	strh	r8, [fp]	@ movhi
+	strh	r5, [r2]	@ movhi
+	add	r5, r5, r8
+	cmp	r3, r5
+	bge	.L859
+	ldr	r1, .L860+64
+	movw	r2, #2366
+	ldr	r0, .L860+68
 	bl	printf
-	mov	r2, #2048
-	mov	r0, r8
-	ldr	r1, [r6, #0]
-	bl	memcpy
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #512]
-	strb	r3, [sl, #0]
-	ldr	r3, .L909+28
-	ldr	r2, [r3, #0]
-	cmp	r2, r4
-	bls	.L906
-	str	r4, [r3, #0]
-	movs	r7, #0
-	bl	FlashSavePhyInfo
-.L903:
-	adds	r4, r4, #1
-.L900:
-	ldrb	r3, [sl, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L907
-	b	.L904
-.L906:
-	movs	r7, #0
-.L904:
-	ldr	r0, [sp, #4]
-	bl	FlashBchSel
-	ldr	r3, .L909+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L909+12
-	cmp	r2, r3
-	bne	.L905
+	ldr	r1, .L860+72
+	ldr	r0, .L860+76
+	bl	printf
+.L859:
 	movs	r0, #0
-	bl	flash_exit_slc_mode
-.L905:
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L910:
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L861:
 	.align	2
-.L909:
-	.word	.LANCHOR150
-	.word	.LANCHOR29
-	.word	.LANCHOR142
-	.word	1446522928
-	.word	.LANCHOR146
-	.word	-52655045
-	.word	.LC8
-	.word	.LANCHOR148
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
-	.section	.text.FlashLoadPhyInfo,"ax",%progbits
+.L860:
+	.word	.LANCHOR39
+	.word	.LANCHOR80
+	.word	.LANCHOR86
+	.word	.LANCHOR84
+	.word	.LANCHOR137
+	.word	.LANCHOR81
+	.word	.LANCHOR83
+	.word	.LANCHOR87
+	.word	.LANCHOR38
+	.word	.LANCHOR36
+	.word	.LANCHOR51
+	.word	.LANCHOR45
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR82
+	.word	.LANCHOR138
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
-	.global	FlashLoadPhyInfo
+	.global	FtlGcPageVarInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	ldr	sl, .L923+40
-	add	r0, sp, #12
-	ldr	r1, .L923
-	movs	r4, #0
-	bl	memcpy
-	ldr	r5, .L923+4
-	ldr	r3, [sl, #0]
-	mov	r0, r4
-	ldr	r6, .L923+8
-	mov	r8, #4
-	mov	r7, #-1
-	str	r3, [r5, #0]
-	ldr	r3, .L923+12
-	ldrh	r2, [r6, #10]
-	str	r4, [r3, #0]
-	str	r2, [sp, #4]
-	bl	flash_enter_slc_mode
-	b	.L912
-.L914:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r6]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r0, #0
-	mov	r1, r4
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L913
-	movs	r0, #0
-	mov	r1, fp
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L913
-	adds	r6, r6, #1
-	cmp	r6, #4
-	beq	.L915
-	b	.L914
-.L913:
-	ldr	r6, [r5, #0]
-	ldr	r2, .L923+16
-	ldr	r3, [r6, #0]
-	cmp	r3, r2
-	bne	.L915
-	cbnz	r7, .L916
-	ldr	r3, .L923+8
-	mov	r0, r4
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L923+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	mov	r0, r7
-	b	.L922
-.L916:
-	add	r0, r6, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [r6, #8]
-	cmp	r3, r0
-	bne	.L915
-	add	r1, r6, #160
-	movs	r2, #32
-	ldr	r0, .L923+8
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	movs	r2, #32
-	ldr	r0, .L923+24
-	adds	r1, r1, #192
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	mov	r2, #852
-	ldr	r0, .L923+28
-	adds	r1, r1, #224
-	bl	memcpy
-	ldr	r6, [r5, #0]
-	ldr	r3, .L923+32
-	mov	r0, r4
-	ldr	r2, [r6, #1076]
-	strb	r2, [r3, #0]
-	ldr	r3, .L923+12
-	str	r4, [r3, #0]
-	ldr	r3, .L923+8
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L923+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	cmp	r0, #1
-	bne	.L918
-	movs	r2, #2
-	str	r2, [r3, #0]
-.L918:
-	ldrh	r2, [r6, #14]
-	movs	r7, #0
-	ldr	r3, .L923+36
-	strb	r2, [r3, #0]
-.L915:
-	ldr	r2, [sp, #4]
-	subs	r8, r8, #1
-	add	r4, r4, r2
-	beq	.L919
-.L912:
-	add	fp, r4, #1
-	movs	r6, #0
-	b	.L914
-.L919:
-	mov	r0, r8
-.L922:
-	bl	flash_exit_slc_mode
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L924:
+	ldr	r2, .L863
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	ldr	r4, .L863+4
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L863+8
+	strh	r3, [r2]	@ movhi
+	ldrh	r2, [r4]
+	ldr	r3, .L863+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r3, [r4]
+	movs	r2, #12
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r3, .L863+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L864:
 	.align	2
-.L923:
-	.word	.LANCHOR150
-	.word	.LANCHOR145
-	.word	.LANCHOR18
-	.word	.LANCHOR149
-	.word	1312902724
-	.word	.LANCHOR148
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR35
-	.word	.LANCHOR151
-	.word	.LANCHOR146
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.FlashDdrTunningRead,"ax",%progbits
+.L863:
+	.word	.LANCHOR109
+	.word	.LANCHOR53
+	.word	.LANCHOR110
+	.word	.LANCHOR108
+	.word	.LANCHOR111
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	FlashDdrTunningRead
+	.global	ftl_memcpy
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashDdrTunningRead, %function
-FlashDdrTunningRead:
-	@ args = 4, pretend = 0, frame = 24
+	.fpu softvfp
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	ldr	r3, .L945
-	sub	sp, sp, #24
-	mov	fp, r2
-	str	r0, [sp, #8]
-	ldr	r3, [r3, #0]
-	str	r1, [sp, #12]
-	ldr	r3, [r3, #304]
-	str	r3, [sp, #20]
-	ldr	r3, .L945+4
-	ldr	r7, [r3, #0]
-	ldr	r3, [sp, #56]
-	cmp	r7, #7
-	ite	hi
-	movhi	r7, #12
-	movls	r7, #6
-	cbz	r3, .L937
-	movs	r0, #1
-	ldr	r4, .L945+8
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	ldr	r0, [sp, #8]
-	bl	FlashReset
-	ldr	r1, [sp, #12]
-	mov	r2, fp
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	bl	FlashReadRawPage
-	mov	r8, r0
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	cmp	r8, #-1
-	beq	.L928
-	mov	r2, r8
-	ldr	r0, .L945+12
-	ldr	r1, [sp, #12]
-	bl	printf
-	ldr	r3, .L945+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	cmp	r2, #2048
-	bcc	.L928
-	movs	r2, #0
-	str	r2, [r3, #0]
-	mov	sl, r2
-	mov	fp, r2
-	b	.L927
-.L937:
-	mov	r8, #1024
-.L927:
-	movs	r4, #0
-	mov	r6, #-1
-	mov	ip, r4
-	mov	r5, r4
-	str	r4, [sp, #16]
-.L933:
-	uxtb	r0, r7
-	str	ip, [sp, #4]
-	bl	NandcSetDdrPara
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	mov	r2, fp
-	ldr	r1, [sp, #12]
-	bl	FlashReadRawPage
-	add	r3, r8, #1
-	ldr	ip, [sp, #4]
-	cmp	r0, r3
-	bhi	.L929
-	cmp	r0, #2
-	bhi	.L939
-	adds	r5, r5, #1
-	cmp	r5, #9
-	bls	.L939
-	subs	r4, r7, r5
-	mov	r8, r0
-	movs	r6, #0
-	b	.L931
-.L929:
-	cmp	ip, r5
-	bcs	.L940
-	cmp	r5, #7
-	rsb	r3, r5, r4
-	str	r3, [sp, #16]
-	bhi	.L932
-	mov	ip, r5
-	b	.L940
-.L939:
-	movs	r6, #0
-	mov	r4, r7
-	mov	r8, r0
-	mov	sl, r6
-	mov	fp, r6
-	b	.L930
-.L940:
-	movs	r5, #0
-.L930:
-	adds	r7, r7, #2
-	cmp	r7, #69
-	bls	.L933
-.L931:
-	cmp	ip, r5
-	bcc	.L934
-.L932:
-	ldr	r4, [sp, #16]
-.L934:
-	cbz	r4, .L935
-	ldr	r0, .L945+20
-	mov	r1, r4
-	bl	printf
-	uxtb	r0, r4
-	bl	NandcSetDdrPara
-.L935:
-	cbz	r6, .L928
-	ldr	r0, .L945+24
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #12]
-	bl	printf
-	ldr	r3, [sp, #56]
-	cbz	r3, .L942
-	ldr	r3, [sp, #20]
-	ubfx	r0, r3, #8, #8
-	bl	NandcSetDdrPara
-	b	.L928
-.L942:
-	mov	r8, r6
-.L928:
-	mov	r0, r8
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L946:
-	.align	2
-.L945:
-	.word	.LANCHOR30
-	.word	.LANCHOR37
-	.word	.LANCHOR34
-	.word	.LC9
-	.word	.LANCHOR152
-	.word	.LC10
-	.word	.LC11
-	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
-	.section	.text.FlashDdrParaScan,"ax",%progbits
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.FlashReadIdbData,"ax",%progbits
 	.align	1
-	.global	FlashDdrParaScan
+	.global	FlashReadIdbData
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashDdrParaScan, %function
-FlashDdrParaScan:
+	.fpu softvfp
+	.type	FlashReadIdbData, %function
+FlashReadIdbData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L952
-	movs	r4, #0
-	mov	r7, r1
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r0, r6
-	str	r4, [sp, #0]
-	bl	FlashDdrTunningRead
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r8, r0
-	mov	r0, r6
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L948
-	cmp	r8, #-1
-	bne	.L949
-.L948:
-	ldrb	r3, [r5, #0]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L949
-	movs	r0, #1
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	movs	r2, #0
-	b	.L951
-.L949:
-	movs	r2, #1
-.L951:
-	ldr	r3, .L952+4
+	push	{r3, lr}
+	mov	r2, #2048
+	ldr	r1, .L867
+	bl	ftl_memcpy
 	movs	r0, #0
-	strb	r2, [r3, #0]
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L953:
+	pop	{r3, pc}
+.L868:
 	.align	2
-.L952:
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.size	FlashDdrParaScan, .-FlashDdrParaScan
-	.section	.text.FlashReadPage,"ax",%progbits
+.L867:
+	.word	.LANCHOR139
+	.size	FlashReadIdbData, .-FlashReadIdbData
+	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
 	.align	1
-	.global	FlashReadPage
+	.global	FlashLoadPhyInfoInRam
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadPage, %function
-FlashReadPage:
+	.fpu softvfp
+	.type	FlashLoadPhyInfoInRam, %function
+FlashLoadPhyInfoInRam:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	mov	r5, r0
-	mov	r7, r1
-	mov	r8, r2
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	mov	r4, r0
-	bne	.L955
-	ldr	r6, .L960
-	ldrb	fp, [r6, #0]	@ zero_extendqisi2
-	cmp	fp, #0
-	beq	.L956
-	movs	r3, #0
-	mov	r0, r5
-	strb	r3, [r6, #0]
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	bl	FlashReadRawPage
-	strb	fp, [r6, #0]
-	adds	r6, r0, #1
-	bne	.L959
-.L956:
-	ldr	r3, .L960+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L955
-	ldr	r3, .L960+8
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, #304]
-	movs	r3, #1
-	str	r3, [sp, #0]
-	mov	r3, sl
-	bl	FlashDdrTunningRead
-	mov	r4, r0
-	adds	r0, r0, #1
-	beq	.L957
-	ldr	r3, .L960+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r4, r3, lsr #1
-	bls	.L955
-.L957:
-	ubfx	r0, r6, #8, #8
-	bl	NandcSetDdrPara
-	b	.L955
-.L959:
-	mov	r4, r0
-.L955:
-	ldr	fp, .L960+24
-	ldr	r6, [fp, #0]
-	cbz	r6, .L958
-	adds	r1, r4, #1
-	bne	.L958
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	mov	r0, r5
-	blx	r6
-	mov	r2, r5
-	mov	r3, r7
-	mov	r4, r0
-	ldr	r0, .L960+16
-	mov	r1, r4
-	bl	printf
-	adds	r2, r4, #1
-	bne	.L958
-	ldr	r3, .L960+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L958
-	mov	r0, r5
-	bl	flash_enter_slc_mode
-	ldr	r4, [fp, #0]
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	blx	r4
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r6, #0
+	ldr	r7, .L877
+	ldr	r5, .L877+4
+.L872:
+	ldrb	r2, [r7, #-1]	@ zero_extendqisi2
+	mov	r1, r5
+	mov	r0, r7
+	lsl	r8, r6, #5
+	bl	FlashMemCmp8
 	mov	r4, r0
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L958:
+	cbnz	r0, .L870
+	ldr	r5, .L877+8
+	mov	r3, r4
+	ldr	r2, .L877+12
+	add	r5, r5, r8
+	ldrb	r0, [r5, #22]	@ zero_extendqisi2
+	mov	r1, r2
+.L871:
+	lsls	r6, r3, #5
+	ldrb	r6, [r6, r2]	@ zero_extendqisi2
+	cmp	r6, r0
+	beq	.L874
+	adds	r3, r3, #1
+	cmp	r3, #4
+	bne	.L871
+.L874:
+	add	r1, r1, r3, lsl #5
+	movs	r2, #32
+	ldr	r0, .L877+16
+	bl	ftl_memcpy
+	movs	r2, #32
+	mov	r1, r5
+	ldr	r0, .L877+20
+	bl	ftl_memcpy
+	b	.L869
+.L870:
+	adds	r6, r6, #1
+	adds	r7, r7, #32
+	cmp	r6, #73
+	bne	.L872
+	mov	r4, #-1
+.L869:
 	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L961:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L878:
 	.align	2
-.L960:
-	.word	.LANCHOR4
-	.word	.LANCHOR35
-	.word	.LANCHOR30
-	.word	.LANCHOR29
-	.word	.LC12
+.L877:
+	.word	.LANCHOR140+1
+	.word	.LANCHOR22
+	.word	.LANCHOR140
+	.word	.LANCHOR141
 	.word	.LANCHOR7
-	.word	.LANCHOR153
-	.size	FlashReadPage, .-FlashReadPage
-	.section	.text.ftl_memcmp,"ax",%progbits
+	.word	.LANCHOR29
+	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
+	.section	.text.ftl_memcpy32,"ax",%progbits
 	.align	1
-	.global	ftl_memcmp
+	.global	ftl_memcpy32
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_memcmp, %function
-ftl_memcmp:
+	.fpu softvfp
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcmp
-	.size	ftl_memcmp, .-ftl_memcmp
-	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	movs	r3, #0
+	push	{r4, lr}
+.L880:
+	cmp	r3, r2
+	bne	.L881
+	pop	{r4, pc}
+.L881:
+	ldr	r4, [r1, r3, lsl #2]
+	str	r4, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	b	.L880
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
-	.global	rknand_get_clk_rate
+	.global	NandcCopy1KB
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rknand_get_clk_rate, %function
-rknand_get_clk_rate:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	@ args = 4, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L964
-	bx	lr
-.L965:
-	.align	2
-.L964:
-	.word	148000000
-	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
-	.section	.text.ftl_malloc,"ax",%progbits
+	cmp	r1, #1
+	push	{r4, r5, r6, lr}
+	mov	r4, r2
+	add	r2, r0, #4096
+	add	r6, r0, #512
+	add	r0, r2, r4, lsl #9
+	ldr	r5, [sp, #16]
+	bne	.L883
+	cbz	r3, .L884
+	lsls	r1, r3, #30
+	bne	.L885
+	mov	r2, #256
+	mov	r1, r3
+	bl	ftl_memcpy32
+.L884:
+	cbz	r5, .L882
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	lsrs	r4, r4, #1
+	ldrb	r3, [r5]	@ zero_extendqisi2
+	add	r4, r4, r4, lsl #1
+	lsls	r4, r4, #4
+	orr	r3, r3, r2, lsl #8
+	ldrb	r2, [r5, #2]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #16
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r6, r4]
+	pop	{r4, r5, r6, pc}
+.L885:
+	mov	r2, #1024
+	mov	r1, r3
+	bl	ftl_memcpy
+	b	.L884
+.L883:
+	cbz	r3, .L888
+	lsls	r2, r3, #30
+	bne	.L889
+	mov	r1, r0
+	mov	r2, #256
+	mov	r0, r3
+	bl	ftl_memcpy32
+.L888:
+	cbz	r5, .L882
+	lsrs	r4, r4, #1
+	add	r4, r4, r4, lsl #1
+	lsls	r4, r4, #4
+	ldr	r3, [r6, r4]
+	strb	r3, [r5]
+	lsrs	r2, r3, #8
+	strb	r2, [r5, #1]
+	lsrs	r2, r3, #16
+	lsrs	r3, r3, #24
+	strb	r2, [r5, #2]
+	strb	r3, [r5, #3]
+.L882:
+	pop	{r4, r5, r6, pc}
+.L889:
+	mov	r1, r0
+	mov	r2, #1024
+	mov	r0, r3
+	bl	ftl_memcpy
+	b	.L888
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
-	.global	ftl_malloc
+	.global	NandcXferData
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_malloc, %function
-ftl_malloc:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	NandcXferData, %function
+NandcXferData:
+	@ args = 4, pretend = 0, frame = 88
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r3
+	ldr	r3, .L936
+	sub	sp, sp, #96
+	mov	r6, r0
+	mov	r10, r2
+	str	r1, [sp, #12]
+	ldr	r5, [r3, r0, lsl #3]
+	lsls	r3, r7, #26
+	ldr	r4, [sp, #128]
+	bne	.L901
+	cbnz	r4, .L902
+	add	r4, sp, #32
+	movs	r2, #64
+	movs	r1, #255
+	add	r0, sp, #32
+	bl	ftl_memset
+.L902:
+	movs	r3, #0
+	mov	r2, r10
+	ldr	r1, [sp, #12]
+	mov	r0, r6
+	str	r4, [sp, #4]
+	str	r7, [sp]
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L926
+	ldr	r2, .L936+4
+	lsr	r0, r10, #1
+	ldr	ip, .L936+12
+	ldr	r3, [r2]
+	cmp	r3, #25
+	ldr	r3, [sp, #12]
+	ite	cc
+	movcc	r7, #64
+	movcs	r7, #128
+	mov	r1, r3
+.L905:
+	cmp	r1, r0
+	add	r4, r4, #4
+	add	r6, r7, r3
+	bcc	.L906
+	ldr	r3, .L936+8
+	lsr	r4, r10, #2
+	ldr	r0, [r2]
+	movs	r2, #0
+	mov	r8, r2
+	ldr	r1, [r3]
+.L907:
+	cmp	r2, r4
+	bcs	.L903
+	cbnz	r0, .L913
+.L903:
+	movs	r3, #0
+	str	r3, [r5, #16]
+.L914:
+	ldr	r3, .L936+8
+	ldr	r3, [r3]
+	cmp	r3, #5
+	bls	.L900
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L900
+	ldr	r3, [r5]
+	and	r2, r3, #139264
+	cmp	r2, #139264
+	ittt	eq
+	moveq	r8, #-1
+	orreq	r3, r3, #131072
+	streq	r3, [r5]
+.L900:
+	mov	r0, r8
+	add	sp, sp, #96
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L906:
+	bic	lr, r3, #3
+	ldr	r3, [ip, #4]
+	adds	r1, r1, #1
+	ldr	r3, [r3, lr]
+	strb	r3, [r4, #-4]
+	lsr	lr, r3, #8
+	strb	lr, [r4, #-3]
+	lsr	lr, r3, #16
+	lsrs	r3, r3, #24
+	strb	lr, [r4, #-2]
+	strb	r3, [r4, #-1]
+	mov	r3, r6
+	b	.L905
+.L913:
+	add	r3, r2, #8
+	ldr	r3, [r5, r3, lsl #2]
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	lsls	r6, r3, #29
+	bmi	.L929
+	ldr	r3, [sp, #28]
+	ubfx	r3, r3, #15, #1
+	cmp	r3, #0
+	bne	.L929
+	cmp	r1, #5
+	bls	.L909
+	ldr	r6, [sp, #28]
+	ldr	r3, [sp, #28]
+	ubfx	r6, r6, #3, #5
+	ubfx	ip, r3, #27, #1
+	ldr	r3, [sp, #28]
+	ldr	r7, [sp, #28]
+	orr	r6, r6, ip, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	r7, r7, #29, #1
+	orr	r3, r3, r7, lsl #5
+	cmp	r6, r3
+	ldr	r3, [sp, #28]
+	itete	hi
+	ldrhi	r6, [sp, #28]
+	ldrls	r6, [sp, #28]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	r6, r6, #27, #1
+	ubfxls	r6, r6, #29, #1
+.L935:
+	orr	r3, r3, r6, lsl #5
+.L911:
+	cmp	r8, r3
+	it	cc
+	movcc	r8, r3
+.L908:
+	adds	r2, r2, #1
+	b	.L907
+.L909:
+	cmp	r1, #3
+	bls	.L911
+	ldr	r6, [sp, #28]
+	ldr	r3, [sp, #28]
+	ubfx	r6, r6, #3, #5
+	ubfx	ip, r3, #28, #1
+	ldr	r3, [sp, #28]
+	ldr	r7, [sp, #28]
+	orr	r6, r6, ip, lsl #5
+	ubfx	r3, r3, #16, #5
+	ubfx	r7, r7, #30, #1
+	orr	r3, r3, r7, lsl #5
+	cmp	r6, r3
+	ldr	r3, [sp, #28]
+	itete	hi
+	ldrhi	r6, [sp, #28]
+	ldrls	r6, [sp, #28]
+	ubfxhi	r3, r3, #3, #5
+	ubfxls	r3, r3, #16, #5
+	ite	hi
+	ubfxhi	r6, r6, #28, #1
+	ubfxls	r6, r6, #30, #1
+	b	.L935
+.L929:
+	mov	r8, #-1
+	b	.L908
+.L926:
+	mov	r8, #0
+	b	.L903
+.L901:
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bne	.L915
+	cmp	r4, #0
+	mov	r8, #0
+	ite	ne
+	movne	r3, #4
+	moveq	r3, #0
+	str	r3, [sp, #16]
+.L916:
+	cmp	r8, r10
+	bcc	.L918
+	mov	r8, #0
+	b	.L914
+.L918:
+	and	fp, r8, #3
+	cbz	r7, .L931
+	add	r3, r7, r8, lsl #9
+.L917:
+	str	r4, [sp]
+	mov	r2, fp
+	movs	r1, #1
+	mov	r0, r5
+	bl	NandcCopy1KB
+	movs	r3, #0
+	movs	r2, #2
+	str	r3, [sp, #4]
+	movs	r1, #1
+	str	r3, [sp]
+	mov	r0, r6
+	mov	r3, fp
+	add	r8, r8, #2
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #16]
+	add	r4, r4, r3
+	b	.L916
+.L931:
+	mov	r3, r7
+	b	.L917
+.L915:
+	mov	r8, #0
+	movs	r2, #2
+	mov	r3, r8
+	str	r8, [sp, #4]
+	str	r8, [sp]
+	mov	r1, r8
+	bl	NandcXferStart
+	mov	fp, r7
+	cmp	r4, r8
+	str	r4, [sp, #16]
+	mov	r4, r8
+	ite	ne
+	movne	r3, #4
+	moveq	r3, r8
+	str	r3, [sp, #20]
+.L919:
+	cmp	r4, r10
+	bcs	.L914
+	mov	r0, r6
+	adds	r4, r4, #2
+	bl	NandcXferComp
+	ldr	r3, [r5, #32]
+	cmp	r10, r4
+	str	r3, [sp, #28]
+	bls	.L920
+	movs	r3, #0
+	movs	r2, #2
+	str	r3, [sp, #4]
 	movs	r1, #0
-	b	kmalloc
-	.size	ftl_malloc, .-ftl_malloc
-	.section	.text.FtlMemInit,"ax",%progbits
+	str	r3, [sp]
+	mov	r0, r6
+	and	r3, r4, #3
+	bl	NandcXferStart
+.L920:
+	ldr	r3, [sp, #28]
+	lsls	r3, r3, #29
+	bmi	.L932
+	ldr	r3, [sp, #28]
+	ldr	r2, [sp, #28]
+	ubfx	r3, r3, #3, #5
+	ubfx	r2, r2, #27, #1
+	orr	r3, r3, r2, lsl #5
+	cmp	r8, r3
+	it	cc
+	movcc	r8, r3
+.L921:
+	ldr	r3, [sp, #16]
+	cmp	r7, #0
+	sub	r2, r4, #2
+	mov	r1, #0
+	and	r2, r2, #3
+	mov	r0, r5
+	str	r3, [sp]
+	ite	ne
+	movne	r3, fp
+	moveq	r3, #0
+	add	fp, fp, #1024
+	bl	NandcCopy1KB
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	add	r3, r3, r2
+	str	r3, [sp, #16]
+	b	.L919
+.L932:
+	mov	r8, #-1
+	b	.L921
+.L937:
+	.align	2
+.L936:
+	.word	.LANCHOR6
+	.word	.LANCHOR30
+	.word	.LANCHOR32
+	.word	.LANCHOR33
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
-	.global	FtlMemInit
+	.global	FlashReadRawPage
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlMemInit, %function
-FtlMemInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L972
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	movs	r1, #0
-	strh	r1, [r3, #0]	@ movhi
-	movs	r5, #12
-	ldr	r3, .L972+4
-	ldr	r2, .L972+8
-	ldr	r4, .L972+12
-	str	r1, [r3, #0]
-	ldr	r3, .L972+16
-	ldrh	r0, [r4, #0]
-	ldr	r8, .L972+304
-	str	r1, [r3, #0]
-	ldr	r3, .L972+20
-	lsls	r0, r0, #1
-	ldr	r7, .L972+24
-	str	r1, [r3, #0]
-	ldr	r3, .L972+28
-	str	r1, [r3, #0]
-	ldr	r3, .L972+32
-	str	r1, [r3, #0]
-	ldr	r3, .L972+36
-	str	r1, [r3, #0]
-	ldr	r3, .L972+40
-	str	r1, [r3, #0]
-	ldr	r3, .L972+44
-	str	r1, [r3, #0]
-	ldr	r3, .L972+48
-	str	r1, [r3, #0]
-	ldr	r3, .L972+52
-	str	r1, [r3, #0]
-	ldr	r3, .L972+56
-	str	r1, [r3, #0]
-	ldr	r3, .L972+60
-	str	r1, [r3, #0]
-	ldr	r3, .L972+64
-	str	r1, [r3, #0]
-	ldr	r3, .L972+68
-	str	r1, [r3, #0]
-	ldr	r3, .L972+72
-	str	r1, [r3, #0]
-	ldr	r3, .L972+76
-	str	r1, [r3, #0]
-	ldr	r3, .L972+80
-	str	r1, [r3, #0]
-	movw	r3, #65535
-	str	r3, [r2, #0]
-	ldr	r2, .L972+84
-	str	r1, [r2, #0]
-	ldr	r2, .L972+88
-	str	r1, [r2, #0]
-	ldr	r2, .L972+92
-	str	r1, [r2, #0]
-	ldr	r2, .L972+96
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L972+100
-	strh	r3, [r2, #0]	@ movhi
-	movs	r2, #32
-	ldr	r3, .L972+104
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #128
-	ldr	r3, .L972+108
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L972+112
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L972+116
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L972+120
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L972+124
-	strh	r1, [r3, #0]	@ movhi
-	str	r1, [sp, #4]
-	bl	ftl_malloc
-	ldr	r3, .L972+128
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+132
-	movs	r4, #36
-	str	r0, [r3, #0]
-	ldrh	r3, [r8, #0]
-	muls	r4, r3, r4
-	lsls	r6, r4, #2
-	mov	r0, r6
-	bl	ftl_malloc
-	ldr	r3, .L972+136
-	str	r0, [r3, #0]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+140
-	str	r0, [r3, #0]
-	mov	r0, r6
-	bl	ftl_malloc
-	ldr	r3, .L972+144
-	ldr	r6, .L972+148
-	str	r0, [r3, #0]
-	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+152
-	str	r0, [r3, #0]
+	mov	r8, r3
+	ldr	r3, .L940
+	mov	r6, r1
+	mov	r7, r2
+	mov	r4, r0
+	ldrb	r5, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L939
+	ldr	r3, .L940+4
+	ldr	r2, .L940+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r0, [r2]
+	muls	r0, r3, r0
+	cmp	r0, r1
+	it	hi
+	movhi	r5, #4
+.L939:
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+156
-	ldrh	r4, [r6, #0]
-	str	r0, [r3, #0]
+	bl	NandcWaitFlashReady
 	mov	r0, r4
-	ldrh	r3, [r8, #0]
-	lsls	r3, r3, #1
-	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	bl	ftl_malloc
-	ldr	r3, .L972+160
-	str	r0, [r3, #0]
+	bl	NandcFlashCs
+	mov	r1, r6
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+164
-	str	r0, [r3, #0]
+	bl	FlashReadCmd
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+168
-	str	r0, [r3, #0]
-	ldr	r0, [r7, #0]
-	muls	r0, r4, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+172
-	str	r0, [r3, #0]
+	bl	NandcWaitFlashReady
+	mov	r3, r7
+	mov	r2, r5
+	str	r8, [sp]
+	movs	r1, #0
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+176
-	str	r0, [r3, #0]
+	bl	NandcXferData
+	mov	r1, r0
 	mov	r0, r4
-	bl	ftl_malloc
-	ldr	r3, .L972+180
-	ldr	r4, .L972+184
-	str	r0, [r3, #0]
-	ldr	r0, [r7, #0]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+188
-	ldrh	r8, [r8, #0]
-	str	r0, [r3, #0]
-	ldrh	r3, [r4, #0]
-	mul	r8, r8, r3
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+192
-	str	r0, [r3, #0]
-	lsl	r0, r8, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+196
-	str	r0, [r3, #0]
-	ldrh	r3, [r4, #0]
-	ldr	r0, [r7, #0]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r4, .L972+200
-	ldr	r3, .L972+204
-	ldr	r7, .L972+208
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	lsls	r0, r0, #1
-	uxth	r0, r0
-	strh	r0, [r7, #0]	@ movhi
-	bl	ftl_malloc
-	ldr	r3, .L972+212
-	str	r0, [r3, #0]
-	ldrh	r0, [r7, #0]
-	addw	r0, r0, #547
-	lsrs	r0, r0, #9
-	strh	r0, [r7, #0]	@ movhi
-	ldr	r7, .L972+216
-	lsls	r0, r0, #9
-	bl	ftl_malloc
-	ldr	r3, .L972+220
-	str	r0, [r3, #0]
-	adds	r0, r0, #32
-	ldr	r3, .L972+224
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L972+228
-	str	r0, [r3, #0]
-	ldr	r3, [r7, #0]
-	lsl	r8, r3, #1
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+232
-	str	r0, [r3, #0]
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+236
-	ldr	r8, .L972+308
-	str	r0, [r3, #0]
-	ldrh	r0, [r4, #0]
-	lsrs	r0, r0, #3
-	adds	r0, r0, #4
-	bl	ftl_malloc
-	ldr	r3, .L972+240
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L972+244
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	lsls	r0, r0, #1
-	bl	ftl_malloc
-	ldr	r3, .L972+248
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	ldr	r8, .L972+312
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+252
-	str	r0, [r3, #0]
-	ldrh	r0, [r8, #0]
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+256
-	ldrh	r2, [r8, #0]
-	ldr	r1, [sp, #4]
-	lsls	r2, r2, #2
-	str	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L972+260
-	ldrh	r8, [r3, #0]
-	lsl	r8, r8, #2
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+264
-	str	r0, [r3, #0]
-	mov	r0, r8
-	bl	ftl_malloc
-	ldr	r3, .L972+268
-	str	r0, [r3, #0]
-	ldr	r0, [r7, #0]
-	ldr	r7, .L972+272
-	lsls	r0, r0, #2
-	bl	ftl_malloc
-	ldr	r3, .L972+276
-	str	r0, [r3, #0]
-	ldrh	r0, [r7, #0]
-	muls	r0, r5, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+280
-	ldr	r5, .L972+284
-	str	r0, [r3, #0]
-	ldrh	r3, [r7, #0]
-	ldrh	r0, [r6, #0]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+288
-	str	r0, [r3, #0]
-	movs	r0, #6
-	ldrh	r3, [r4, #0]
-	muls	r0, r3, r0
-	bl	ftl_malloc
-	ldr	r3, .L972+292
-	ldr	r4, .L972+296
-	ldrh	r2, [r5, #0]
-	str	r0, [r3, #0]
-	ldr	r3, .L972+300
-	ldrh	r3, [r3, #0]
-	adds	r3, r3, #31
-	lsrs	r3, r3, #5
-	strh	r3, [r4, #0]	@ movhi
-	muls	r3, r2, r3
-	lsls	r0, r3, #2
-	bl	ftl_malloc
-	b	.L973
-.L974:
-	.align	2
-.L972:
-	.word	.LANCHOR117
-	.word	.LANCHOR154
-	.word	.LANCHOR170
-	.word	.LANCHOR58
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR124
-	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR85
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR168
-	.word	.LANCHOR169
-	.word	.LANCHOR171
-	.word	.LANCHOR172
-	.word	.LANCHOR77
-	.word	.LANCHOR137
-	.word	.LANCHOR138
-	.word	.LANCHOR173
-	.word	.LANCHOR174
-	.word	.LANCHOR175
-	.word	.LANCHOR139
-	.word	.LANCHOR176
-	.word	.LANCHOR141
-	.word	.LANCHOR134
-	.word	.LANCHOR136
-	.word	.LANCHOR177
-	.word	.LANCHOR178
-	.word	.LANCHOR179
-	.word	.LANCHOR61
-	.word	.LANCHOR83
-	.word	.LANCHOR123
-	.word	.LANCHOR86
-	.word	.LANCHOR180
-	.word	.LANCHOR181
-	.word	.LANCHOR120
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR62
-	.word	.LANCHOR122
-	.word	.LANCHOR184
-	.word	.LANCHOR185
-	.word	.LANCHOR44
-	.word	.LANCHOR121
-	.word	.LANCHOR186
-	.word	.LANCHOR130
-	.word	.LANCHOR68
-	.word	.LANCHOR187
-	.word	.LANCHOR84
-	.word	.LANCHOR89
-	.word	.LANCHOR112
-	.word	.LANCHOR108
-	.word	.LANCHOR107
-	.word	.LANCHOR75
-	.word	.LANCHOR188
-	.word	.LANCHOR189
-	.word	.LANCHOR190
-	.word	.LANCHOR70
-	.word	.LANCHOR114
-	.word	.LANCHOR191
-	.word	.LANCHOR71
-	.word	.LANCHOR113
-	.word	.LANCHOR102
-	.word	.LANCHOR48
-	.word	.LANCHOR109
-	.word	.LANCHOR87
-	.word	.LANCHOR79
-	.word	.LANCHOR54
-	.word	.LANCHOR41
-	.word	.LANCHOR65
-	.word	.LANCHOR66
-.L973:
-	ldr	r2, .L975
-	ldrh	r4, [r4, #0]
-	movs	r1, #1
-	mov	r3, r2
-	ldrh	r5, [r5, #0]
-	lsls	r4, r4, #2
-	str	r0, [r3, #28]!
-	mov	r0, r4
-	b	.L968
-.L969:
-	ldr	r6, [r2, #28]
-	adds	r1, r1, #1
-	adds	r6, r6, r0
-	adds	r0, r0, r4
-	str	r6, [r3, #4]!
-.L968:
-	cmp	r1, r5
-	bcc	.L969
-	ldr	r0, .L975
-	movs	r3, #0
-	mov	r2, r3
-	add	r0, r0, r1, lsl #2
-	b	.L970
-.L971:
-	adds	r4, r0, r3
-	adds	r1, r1, #1
-	adds	r3, r3, #4
-	str	r2, [r4, #28]
-.L970:
-	cmp	r1, #7
-	bls	.L971
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L976:
+	bl	NandcFlashDeCs
+	mov	r0, r1
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L941:
 	.align	2
-.L975:
-	.word	.LANCHOR78
-	.size	FtlMemInit, .-FtlMemInit
-	.section	.text.NandcInit,"ax",%progbits
+.L940:
+	.word	.LANCHOR29
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
-	.global	NandcInit
+	.global	FlashLoadPhyInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	NandcInit, %function
-NandcInit:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r2, #1
-	ldr	r3, .L978
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #60
+	sub	sp, sp, #24
+	ldr	fp, .L957+8
 	movs	r4, #0
-	ldr	r5, .L978+4
-	stmia	r3, {r0, r4}
-	str	r2, [r3, #12]
+	movs	r7, #4
+	strb	r3, [sp, #20]
+	movs	r3, #40
+	strb	r3, [sp, #21]
+	movs	r3, #24
+	strb	r3, [sp, #22]
+	movs	r3, #16
+	ldr	r1, .L957
+	mov	r0, r4
+	strb	r3, [sp, #23]
+	mov	r6, #-1
+	ldrh	r3, [fp, #10]
+	ldr	r8, .L957+36
+	ldr	r5, .L957+4
+	str	r3, [sp, #4]
+	ldr	r3, [r1]
+	str	r4, [r8]
+	str	r3, [r5]
+	bl	flash_enter_slc_mode
+	mov	r10, r1
+	str	r8, [sp, #12]
+.L943:
+	mov	r8, #0
+	adds	r3, r4, #1
+	str	r3, [sp, #8]
+.L945:
+	add	r3, sp, #20
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r3, #0
+	ldr	r2, [r10]
+	mov	r1, r4
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L944
+	movs	r3, #0
+	ldr	r2, [r10]
+	ldr	r1, [sp, #8]
+	mov	r0, r3
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L944
+	add	r8, r8, #1
+	cmp	r8, #4
+	bne	.L945
+.L946:
+	ldr	r3, [sp, #4]
+	subs	r7, r7, #1
+	add	r4, r4, r3
+	bne	.L943
+	mov	r0, r7
+	b	.L956
+.L947:
+	movw	r1, #2036
+	add	r0, r8, #12
+	bl	JSHash
+	ldr	r3, [r8, #8]
+	cmp	r3, r0
+	bne	.L953
+	movs	r2, #32
+	add	r1, r8, #160
+	ldr	r0, .L957+8
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	movs	r2, #32
+	ldr	r0, .L957+12
+	adds	r1, r1, #192
+	bl	ftl_memcpy
+	ldr	r1, [r5]
+	mov	r2, #852
+	ldr	r0, .L957+16
+	adds	r1, r1, #224
+	bl	ftl_memcpy
+	ldr	r6, [r5]
+	mov	r0, r4
+	ldr	r3, .L957+20
+	ldrh	r1, [fp, #10]
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3]
+	ldr	r3, [sp, #12]
+	str	r4, [r3]
+	bl	__aeabi_uidiv
+	ldr	r3, .L957+24
+	adds	r2, r0, #1
+	cbz	r0, .L949
+.L955:
+	str	r2, [r3]
+	ldrh	r2, [r6, #14]
+	movs	r6, #0
+	ldr	r3, .L957+28
+	strb	r2, [r3]
+	b	.L946
+.L949:
 	movs	r2, #2
-	str	r0, [r3, #8]
-	str	r2, [r3, #20]
-	movs	r2, #3
-	str	r0, [r3, #16]
-	str	r2, [r3, #28]
-	str	r0, [r3, #24]
-	str	r0, [r5, #0]
-	ldr	r2, .L978+8
-	ldr	r3, [r0, #0]
-	and	r3, r3, #253952
-	ubfx	r1, r3, #13, #1
-	str	r1, [r2, #0]
-	ldr	r2, .L978+12
-	and	r3, r3, #245760
-	ldr	r1, [r0, #352]
-	orr	r3, r3, #256
-	ubfx	r1, r1, #16, #4
-	str	r1, [r2, #0]
-	ldr	r1, [r0, #352]
-	ldr	r2, .L978+16
-	str	r1, [r2, #0]
-	str	r3, [r0, #0]
-	str	r4, [r0, #336]
-	movs	r0, #40
-	bl	NandcTimeCfg
-	ldr	r3, [r5, #0]
-	movw	r2, #8322
-	mov	r0, #36864
-	str	r2, [r3, #344]
-	ldr	r2, .L978+20
-	str	r2, [r3, #304]
-	bl	ftl_malloc
-	ldr	r3, .L978+24
-	str	r0, [r3, #0]
-	ldr	r3, .L978+28
-	str	r0, [r3, #0]
-	add	r0, r0, #32768
-	str	r4, [r3, #24]
-	str	r0, [r3, #4]
-	ldr	r3, .L978+32
-	str	r4, [r3, #0]
-	pop	{r3, r4, r5, pc}
-.L979:
+	b	.L955
+.L953:
+	mov	r6, #-1
+	b	.L946
+.L944:
+	ldr	r8, [r5]
+	ldr	r2, .L957+32
+	ldr	r3, [r8]
+	cmp	r3, r2
+	bne	.L946
+	cmp	r6, #0
+	bne	.L947
+	ldrh	r1, [fp, #10]
+	mov	r0, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L957+24
+	adds	r0, r0, #1
+	str	r0, [r3]
+	mov	r0, r6
+.L956:
+	bl	flash_exit_slc_mode
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L958:
 	.align	2
-.L978:
-	.word	.LANCHOR5
-	.word	.LANCHOR30
-	.word	.LANCHOR192
-	.word	.LANCHOR37
+.L957:
+	.word	.LANCHOR143
 	.word	.LANCHOR142
-	.word	1710593
-	.word	.LANCHOR193
-	.word	.LANCHOR38
-	.word	.LANCHOR39
-	.size	NandcInit, .-NandcInit
-	.section	.text.ftl_free,"ax",%progbits
-	.align	1
-	.global	ftl_free
-	.thumb
-	.thumb_func
-	.type	ftl_free, %function
-ftl_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	free
-	.size	ftl_free, .-ftl_free
-	.section	.text.StorageSysDataLoad,"ax",%progbits
-	.align	1
-	.global	StorageSysDataLoad
-	.thumb
-	.thumb_func
-	.type	StorageSysDataLoad, %function
-StorageSysDataLoad:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	mov	r2, #512
-	mov	r5, r0
-	mov	r4, r1
-	mov	r0, r1
-	movs	r1, #0
-	bl	memset
-	movs	r0, #16
-	add	r1, r5, #256
-	movs	r2, #1
-	mov	r3, r4
-	pop	{r4, r5, r6, lr}
-	b	FtlRead
-	.size	StorageSysDataLoad, .-StorageSysDataLoad
-	.section	.text.StorageSysDataStore,"ax",%progbits
-	.align	1
-	.global	StorageSysDataStore
-	.thumb
-	.thumb_func
-	.type	StorageSysDataStore, %function
-StorageSysDataStore:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r1
-	movs	r2, #1
-	add	r1, r0, #256
-	movs	r0, #16
-	b	FtlWrite
-	.size	StorageSysDataStore, .-StorageSysDataStore
-	.section	.text.FlashCs123Init,"ax",%progbits
-	.align	1
-	.global	FlashCs123Init
-	.thumb
-	.thumb_func
-	.type	FlashCs123Init, %function
-FlashCs123Init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FlashCs123Init, .-FlashCs123Init
-	.section	.text.rk_nand_de_init,"ax",%progbits
-	.align	1
-	.global	rk_nand_de_init
-	.thumb
-	.thumb_func
-	.type	rk_nand_de_init, %function
-rk_nand_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	FlashDeInit
-	.size	rk_nand_de_init, .-rk_nand_de_init
-	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.word	.LANCHOR28
+	.word	.LANCHOR145
+	.word	.LANCHOR146
+	.word	1312902724
+	.word	.LANCHOR144
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
-	.global	rk_ftl_get_capacity
+	.global	ToshibaReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_get_capacity, %function
-rk_ftl_get_capacity:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r6, r0
+	str	r2, [sp, #12]
+	mov	fp, r3
+	str	r1, [sp, #20]
+	bl	NandcWaitFlashReady
 	ldr	r3, .L986
-	ldr	r0, [r3, #0]
-	bx	lr
+	ldr	r2, .L986+4
+	ldr	r4, [r3, r6, lsl #3]
+	add	r3, r3, r6, lsl #3
+	str	r2, [sp, #16]
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	ldrb	r3, [r2]	@ zero_extendqisi2
+	add	r5, r7, #8
+	subs	r3, r3, #67
+	add	r5, r4, r5, lsl #8
+	cmp	r3, #1
+	bls	.L976
+	ldr	r3, .L986+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L977
+	movs	r0, #0
+	bl	NandcSetDdrMode
+	movs	r3, #1
+.L977:
+	str	r3, [sp, #8]
+	add	r3, r4, r7, lsl #8
+	movs	r2, #92
+	str	r2, [r3, #2056]
+	movs	r2, #197
+	str	r2, [r3, #2056]
+.L960:
+	mov	r8, #1
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.L962:
+	ldr	r3, .L986+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r8, r3
+	bcc	.L971
+	ldr	r10, [sp, #4]
+.L970:
+	ldr	r3, [sp, #16]
+	movs	r1, #0
+	mov	r0, r5
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	subs	r2, r2, #67
+	cmp	r2, #1
+	bhi	.L972
+	bl	SandiskSetRRPara
+.L973:
+	add	r4, r4, r7, lsl #8
+	movs	r2, #255
+	str	r2, [r4, #2056]
+	ldr	r2, .L986+16
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
+	bcc	.L974
+	cmp	r10, #-1
+	it	ne
+	movne	r10, #256
+.L974:
+	mov	r0, r6
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #8]
+	cbz	r3, .L959
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L959:
+	mov	r0, r10
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L976:
+	movs	r3, #0
+	str	r3, [sp, #8]
+	b	.L960
+.L971:
+	ldr	r3, [sp, #16]
+	mov	r0, r5
+	uxtb	r1, r8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L963
+	bl	SandiskSetRRPara
+.L964:
+	ldr	r3, [sp, #16]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L965
+	ldr	r3, .L986+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r8, r3
+	ittt	eq
+	addeq	r3, r4, r7, lsl #8
+	moveq	r2, #179
+	streq	r2, [r3, #2056]
+.L965:
+	add	r3, r4, r7, lsl #8
+	movs	r2, #38
+	str	r2, [r3, #2056]
+	movs	r2, #93
+	str	r2, [r3, #2056]
+	ldr	r3, [sp, #8]
+	cbz	r3, .L966
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
+	bl	FlashReadRawPage
+	mov	r10, r0
+	movs	r0, #0
+	bl	NandcSetDdrMode
+.L967:
+	cmp	r10, #-1
+	beq	.L968
+	ldr	r2, .L986+16
+	ldr	r3, [sp, #4]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r3, #-1
+	it	eq
+	moveq	r3, r10
+	str	r3, [sp, #4]
+	add	r2, r2, r2, lsl #1
+	cmp	r10, r2, asr #2
+	bcc	.L970
+	mov	fp, #0
+	str	fp, [sp, #12]
+.L968:
+	add	r8, r8, #1
+	b	.L962
+.L963:
+	bl	ToshibaSetRRPara
+	b	.L964
+.L966:
+	mov	r3, fp
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #20]
+	mov	r0, r6
+	bl	FlashReadRawPage
+	mov	r10, r0
+	b	.L967
+.L972:
+	bl	ToshibaSetRRPara
+	b	.L973
 .L987:
 	.align	2
 .L986:
-	.word	.LANCHOR72
-	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
-	.section	.text.rknand_print_hex,"ax",%progbits
+	.word	.LANCHOR6
+	.word	.LANCHOR10
+	.word	.LANCHOR28
+	.word	.LANCHOR147
+	.word	.LANCHOR31
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
-	.global	rknand_print_hex
+	.global	SamsungReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rknand_print_hex, %function
-rknand_print_hex:
+	.fpu softvfp
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r7, #0
-	mov	sl, r0
-	mov	r4, r1
-	mov	r5, r2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r0
+	mov	r10, r2
 	mov	r8, r3
-	mov	r6, r7
-	b	.L989
-.L995:
-	cbnz	r7, .L990
-	ldr	r0, .L997
-	mov	r1, sl
-	mov	r2, r6
-	bl	printf
+	mov	fp, r1
+	movs	r6, #1
+	bl	NandcWaitFlashReady
+	ldr	r2, .L1001
+	mov	r4, #-1
+	add	r3, r2, r7, lsl #3
+	ldrb	r5, [r3, #4]	@ zero_extendqisi2
+	add	r3, r5, #8
+	ldr	r5, [r2, r7, lsl #3]
+	add	r5, r5, r3, lsl #8
+.L989:
+	ldr	r3, .L1001+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r6, r3
+	bcc	.L993
+.L992:
+	movs	r1, #0
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	ldr	r3, .L1001+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, asr #2
+	bcc	.L988
+	adds	r3, r4, #1
+	it	ne
+	movne	r4, #256
+.L988:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L993:
+	uxtb	r1, r6
+	mov	r0, r5
+	bl	SamsungSetRRPara
+	mov	r2, r10
+	mov	r3, r8
+	mov	r1, fp
+	mov	r0, r7
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L990
+	ldr	r3, .L1001+8
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L996
+	mov	r8, #0
+	mov	r10, r8
 .L990:
-	cmp	r5, #4
-	ldr	r0, .L997+4
-	bne	.L991
-	ldr	r1, [r4, r6, lsl #2]
-	b	.L996
-.L991:
-	cmp	r5, #2
-	ite	eq
-	ldrsheq	r1, [r4, r6, lsl #1]
-	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
-.L996:
-	adds	r7, r7, #1
-	bl	printf
-	cmp	r7, #15
-	bls	.L994
-	ldr	r0, .L997+8
-	movs	r7, #0
-	ldr	r1, .L997+12
-	bl	printf
-.L994:
 	adds	r6, r6, #1
-.L989:
-	cmp	r6, r8
-	bne	.L995
-	ldr	r0, .L997+8
-	ldr	r1, .L997+12
-	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
-	b	printf
-.L998:
+	b	.L989
+.L996:
+	mov	r4, r0
+	b	.L992
+.L1002:
 	.align	2
-.L997:
-	.word	.LC13
-	.word	.LC14
-	.word	.LC4
-	.word	.LC15
-	.size	rknand_print_hex, .-rknand_print_hex
-	.section	.text.FlashReadSlc2KPages,"ax",%progbits
+.L1001:
+	.word	.LANCHOR6
+	.word	.LANCHOR147
+	.word	.LANCHOR31
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashReadSlc2KPages
+	.global	MicronReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadSlc2KPages, %function
-FlashReadSlc2KPages:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1013
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	mov	r7, r1
-	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	str	r2, [sp, #12]
-	mov	r4, r0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r3
+	ldr	r3, .L1018
+	sub	sp, sp, #32
+	mov	r7, r0
+	mov	fp, r2
+	str	r1, [sp, #16]
+	ldrb	r4, [r3]	@ zero_extendqisi2
+	ldr	r3, .L1018+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1004
+	add	r4, r4, r4, lsl #1
+	asrs	r4, r4, #2
+.L1005:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1018+8
 	movs	r6, #0
-	ldr	sl, .L1013+28
-	b	.L1000
+	mov	r5, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	lsls	r3, r3, #8
+	str	r3, [sp, #24]
+.L1006:
+	ldr	r3, .L1018+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r6, r3
+	bcc	.L1010
 .L1009:
-	subs	r3, r7, r6
-	ldr	r1, [sp, #12]
-	add	r2, sp, #20
-	mov	r0, r4
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #16
-	bl	LogAddr2PhyAddr
-	ldr	r1, .L1013+4
-	ldr	r3, [sp, #16]
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bcc	.L1001
-	mov	r3, #-1
-	str	r3, [r4, #0]
-	b	.L1002
-.L1001:
-	ldr	r2, .L1013+8
-	ldrb	r5, [r2, r3]	@ zero_extendqisi2
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	mov	r0, r5
-	bl	NandcFlashCs
-	ldr	r1, [sp, #20]
-	mov	r0, r5
-	bl	FlashReadCmd
-	mov	r0, r5
-	bl	NandcWaitFlashReady
-	ldr	r3, [r4, #12]
-	movs	r1, #0
-	mov	r2, r8
-	mov	r0, r5
-	str	r3, [sp, #0]
-	ldr	r3, [r4, #8]
-	bl	NandcXferData
-	ldr	r3, [sp, #20]
-	ldr	r1, [sl, #0]
-	adds	r1, r1, r3
-	mov	fp, r0
-	mov	r0, r5
-	bl	FlashReadCmd
-	ldr	r3, [r4, #8]
-	cbz	r3, .L1003
-	add	r3, r3, #2048
+	ldr	r3, [sp, #8]
+	movs	r0, #200
+	ldr	r2, [sp, #12]
+	add	r7, r3, r2, lsl #8
+	movs	r3, #239
+	str	r3, [r7, #2056]
+	movs	r3, #137
+	str	r3, [r7, #2052]
+	bl	udelay
+	cmp	r5, r4
+	mov	r3, #0
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	str	r3, [r7, #2048]
+	bcc	.L1003
+	adds	r3, r5, #1
+	ldr	r2, [sp, #16]
+	it	ne
+	movne	r5, #256
+	mov	r3, r6
+	str	r5, [sp]
+	mov	r1, r6
+	ldr	r0, .L1018+16
+	bl	printf
 .L1003:
-	ldr	r2, [r4, #12]
-	cbz	r2, .L1004
-	adds	r2, r2, #8
-.L1004:
-	movs	r1, #0
-	str	r2, [sp, #0]
 	mov	r0, r5
-	mov	r2, r8
-	bl	NandcXferData
-	mov	r3, r0
-	mov	r0, r5
-	str	r3, [sp, #8]
-	bl	NandcFlashDeCs
-	ldr	r2, .L1013+12
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1004:
+	ldr	r3, .L1018+20
+	smull	r4, r5, r4, r3
+	mov	r4, r5
+	b	.L1005
+.L1010:
+	ldr	r2, [sp, #24]
+	movs	r0, #200
 	ldr	r3, [sp, #8]
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, fp
-	it	cc
-	movcc	r3, fp
-	add	r2, r2, r2, lsl #1
-	cmp	r3, r2, lsr #2
-	bls	.L1005
-	cmp	r3, #-1
-	ite	eq
-	moveq	r3, #-1
-	movne	r3, #256
-.L1005:
-	adds	r0, r3, #1
-	str	r3, [r4, #0]
-	beq	.L1006
-	cmp	r3, #256
-	beq	.L1006
-	movs	r3, #0
-	str	r3, [r4, #0]
-.L1006:
-	ldr	r3, [r4, #12]
-	cbz	r3, .L1007
-	ldr	r2, [r3, #8]
-	adds	r1, r2, #1
-	bne	.L1007
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	it	ne
-	strne	r2, [r4, #0]
+	mov	r8, #0
+	add	r3, r3, r2
+	movs	r2, #239
+	str	r2, [r3, #2056]
+	movs	r2, #137
+	str	r2, [r3, #2052]
+	str	r3, [sp, #28]
+	bl	udelay
+	adds	r3, r6, #1
+	ldr	r1, [sp, #16]
+	mov	r2, r3
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #28]
+	mov	r0, r7
+	str	r2, [r3, #2048]
+	mov	r2, fp
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	str	r8, [r3, #2048]
+	mov	r3, r10
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1007
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	cmp	r0, r4
+	bcc	.L1013
+	mov	r10, r8
+	mov	fp, r8
 .L1007:
-	ldr	r3, [r4, #0]
-	adds	r2, r3, #1
-	bne	.L1002
-	ldr	r2, .L1013+12
-	ldr	r1, [r4, #4]
-	ldr	r0, .L1013+16
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	bl	printf
-	ldr	r1, [r4, #8]
-	cbz	r1, .L1008
-	ldr	r0, .L1013+20
-	movs	r2, #4
-	movs	r3, #8
-	bl	rknand_print_hex
-.L1008:
-	ldr	r1, [r4, #12]
-	cbz	r1, .L1002
-	movs	r2, #4
-	ldr	r0, .L1013+24
-	mov	r3, r2
-	bl	rknand_print_hex
-.L1002:
-	adds	r6, r6, #1
-	adds	r4, r4, #36
-.L1000:
-	cmp	r6, r7
-	bne	.L1009
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1014:
-	.align	2
+	ldr	r6, [sp, #20]
+	b	.L1006
 .L1013:
-	.word	.LANCHOR18
-	.word	.LANCHOR16
-	.word	.LANCHOR19
-	.word	.LANCHOR29
-	.word	.LC16
-	.word	.LC17
-	.word	.LC18
-	.word	.LANCHOR2
-	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
-	.section	.text.FlashReadPages,"ax",%progbits
+	mov	r5, r0
+	b	.L1009
+.L1019:
+	.align	2
+.L1018:
+	.word	.LANCHOR31
+	.word	.LANCHOR8
+	.word	.LANCHOR6
+	.word	.LANCHOR147
+	.word	.LC7
+	.word	1431655766
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
-	.global	FlashReadPages
+	.global	HynixReadRetrial
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadPages, %function
-FlashReadPages:
-	@ args = 0, pretend = 0, frame = 40
+	.fpu softvfp
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1063
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #48
-	ldrb	r3, [r3, #9]	@ zero_extendqisi2
-	str	r0, [sp, #12]
-	str	r1, [sp, #32]
-	str	r3, [sp, #28]
-	ldr	r3, .L1063+4
-	str	r2, [sp, #20]
-	ldrb	r4, [r3, #0]	@ zero_extendqisi2
-	str	r4, [sp, #36]
-	ldr	r4, .L1063+8
-	ldrb	r4, [r4, #0]	@ zero_extendqisi2
-	cmp	r4, #0
-	beq	.L1049
-	bl	FlashReadSlc2KPages
-	b	.L1017
-.L1048:
-	movs	r3, #36
-	ldr	r4, [sp, #12]
-	add	r2, sp, #44
-	ldr	r1, [sp, #20]
-	mul	r3, r3, fp
-	adds	r7, r4, r3
-	ldr	r4, [sp, #32]
-	mov	r0, r7
-	str	r3, [sp, #16]
-	rsb	r3, fp, r4
-	ldr	r5, [r7, #4]
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #40
-	bl	LogAddr2PhyAddr
-	ldr	r2, .L1063+12
-	ldr	r3, [sp, #40]
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	mov	r8, r0
-	bcc	.L1018
-	ldr	r1, [sp, #12]
-	mov	r3, #-1
-	ldr	r4, [sp, #16]
-	str	r3, [r1, r4]
-	b	.L1019
-.L1018:
-	ldr	r2, .L1063+16
-	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1063+20
-	mov	r0, r4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r4, .L1037
+	mov	r8, #0
+	mov	r6, #-1
+	mov	r10, r3
+	mov	r7, r0
+	str	r1, [sp, #4]
+	ldrb	r2, [r4, #2]	@ zero_extendqisi2
+	adds	r3, r4, r0
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	str	r2, [sp]
+	ldr	r2, .L1037+4
+	ldr	r2, [r2]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
 	it	eq
-	moveq	r8, #0
+	ldrbeq	r5, [r3, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1063+24
-	ldr	r3, [r3, #0]
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r0, #1
-	cmp	r3, #6
-	bhi	.L1021
-	ldr	r2, .L1063+28
-	cmp	r0, #7
-	add	r1, r2, r4
-	ldrb	r3, [r1, #12]	@ zero_extendqisi2
-	it	eq
-	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
-	ldr	r1, .L1063+32
-	ldrb	r1, [r1, r4]	@ zero_extendqisi2
-	cmp	r1, r3
-	beq	.L1021
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	mov	r0, r4
-	ldr	r2, .L1063+36
+.L1022:
+	ldr	r3, [sp]
+	cmp	r8, r3
+	bcc	.L1027
+.L1026:
+	ldr	r3, .L1037+4
+	add	r4, r4, r7
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L1037+8
+	ite	eq
+	strbeq	r5, [r4, #20]
+	strbne	r5, [r4, #12]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bcc	.L1020
+	adds	r3, r6, #1
+	it	ne
+	movne	r6, #256
+.L1020:
+	mov	r0, r6
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1027:
+	ldr	r3, [sp]
+	adds	r5, r5, #1
+	uxtb	r5, r5
+	ldr	r2, .L1037+12
+	ldrb	r1, [r4, #1]	@ zero_extendqisi2
+	mov	r0, r7
+	cmp	r3, r5
+	it	ls
+	movls	r5, #0
+	mov	r3, r5
 	bl	HynixSetRRPara
-.L1021:
-	mov	r0, r4
-	and	r5, r5, #-2147483648
-	str	r5, [sp, #24]
-	bl	NandcFlashCs
-	ldr	r2, [sp, #20]
-	cmp	r2, #1
-	beq	.L1023
-	ldr	r5, [sp, #24]
-	cbz	r5, .L1024
-.L1023:
-	ldr	r3, .L1063+40
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1024
-	mov	r0, r4
-	bl	flash_enter_slc_mode
-	b	.L1025
+	mov	r2, fp
+	mov	r3, r10
+	ldr	r1, [sp, #4]
+	mov	r0, r7
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	beq	.L1024
+	ldr	r3, .L1037+8
+	cmp	r6, #-1
+	it	eq
+	moveq	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, asr #2
+	bcc	.L1031
+	mov	r10, #0
+	mov	fp, r10
 .L1024:
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L1025:
-	mov	r5, r7
-	movs	r6, #0
-	mov	r7, r8
-.L1062:
-	ldr	r1, [sp, #44]
-	adds	r2, r1, #1
-	bne	.L1027
-	cmp	r4, #255
-	beq	.L1051
-.L1027:
-	cbz	r7, .L1029
-	ldr	r3, .L1063+44
-	mov	r0, r4
-	ldr	r2, [r3, #0]
-	adds	r2, r1, r2
-	bl	FlashReadDpCmd
-	b	.L1030
-.L1029:
-	mov	r0, r4
-	bl	FlashReadCmd
-.L1030:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	cbz	r7, .L1028
-	mov	r0, r4
-	ldr	r1, [sp, #44]
-	bl	FlashReadDpDataOutCmd
-	b	.L1028
+	add	r8, r8, #1
+	b	.L1022
+.L1031:
+	mov	r6, r0
+	b	.L1026
+.L1038:
+	.align	2
+.L1037:
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR31
+	.word	.LANCHOR20+4
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
+	.align	1
+	.global	FlashDdrTunningRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r3
+	ldr	r3, .L1064
+	sub	sp, sp, #24
+	str	r0, [sp, #8]
+	ldr	r3, [r3]
+	str	r1, [sp, #12]
+	str	r2, [sp, #4]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L1064+4
+	ldr	r3, [r3]
+	cmp	r3, #8
+	ldr	r3, [sp, #56]
+	ite	cc
+	movcc	fp, #6
+	movcs	fp, #12
+	cmp	r3, #0
+	beq	.L1053
+	movs	r0, #1
+	ldr	r4, .L1064+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	mov	r6, r0
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	adds	r3, r6, #1
+	bne	.L1042
 .L1051:
+	mov	r6, #-1
+.L1039:
+	mov	r0, r6
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1042:
+	mov	r2, r6
+	ldr	r1, [sp, #12]
+	ldr	r0, .L1064+12
+	bl	printf
+	ldr	r2, .L1064+16
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	cmp	r3, #2048
+	bcs	.L1044
+	str	r3, [r2]
+	b	.L1039
+.L1044:
 	movs	r7, #0
-.L1028:
-	ldr	r3, [r5, #12]
-	movs	r1, #0
-	mov	r0, r4
-	ldr	r2, [sp, #28]
-	str	r3, [sp, #0]
-	ldr	r3, [r5, #8]
-	bl	NandcXferData
-	ldr	r1, .L1063+4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1053
-	adds	r3, r0, #1
-	bne	.L1053
-	strb	r6, [r1, #0]
-	movs	r7, #0
-	b	.L1062
+	str	r7, [r2]
+	str	r7, [sp, #4]
+.L1041:
+	mov	r10, #0
+	mov	r8, #-1
+	mov	r5, r10
+	mov	r4, r10
+	str	r10, [sp, #16]
+.L1049:
+	uxtb	r0, fp
+	bl	NandcSetDdrPara
+	mov	r3, r7
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #12]
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	adds	r3, r6, #1
+	cmp	r0, r3
+	bhi	.L1045
+	cmp	r0, #2
+	bhi	.L1055
+	adds	r4, r4, #1
+	cmp	r4, #9
+	bls	.L1055
+	mov	r3, r5
+	mov	r6, r0
+	sub	r5, fp, r4
+	mov	r8, #0
+.L1047:
+	ldr	r2, [sp, #16]
+	cmp	r4, r2
+	it	ls
+	movls	r5, r3
+.L1048:
+	cbz	r5, .L1050
+	mov	r1, r5
+	ldr	r0, .L1064+20
+	bl	printf
+	uxtb	r0, r5
+	bl	NandcSetDdrPara
+.L1050:
+	cmp	r8, #0
+	beq	.L1039
+	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #8]
+	ldr	r0, .L1064+24
+	bl	printf
+	ldr	r3, [sp, #56]
+	cmp	r3, #0
+	beq	.L1051
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L1039
 .L1053:
-	mov	r8, r7
-	mov	r7, r5
-	mov	r6, r8
+	mov	r6, #1024
+	b	.L1041
+.L1045:
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	bls	.L1056
+	cmp	r4, #7
+	sub	r5, r10, r4
+	bhi	.L1048
+	str	r4, [sp, #16]
+.L1056:
+	movs	r4, #0
+	b	.L1046
+.L1055:
+	mov	r8, #0
+	mov	r10, fp
+	mov	r6, r0
+	mov	r7, r8
+	str	r8, [sp, #4]
+.L1046:
+	add	fp, fp, #2
+	cmp	fp, #69
+	bls	.L1049
+	mov	r3, r5
+	mov	r5, r10
+	b	.L1047
+.L1065:
+	.align	2
+.L1064:
+	.word	.LANCHOR19
+	.word	.LANCHOR32
+	.word	.LANCHOR24
+	.word	.LC8
+	.word	.LANCHOR148
+	.word	.LC9
+	.word	.LC10
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashReadPage,"ax",%progbits
+	.align	1
+	.global	FlashReadPage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadPage, %function
+FlashReadPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r2
 	mov	r5, r0
-	cmp	r8, #0
-	beq	.L1032
-	ldr	r2, .L1063+44
-	mov	r0, r4
-	ldr	r3, [sp, #44]
-	ldr	r1, [r2, #0]
-	adds	r1, r1, r3
-	bl	FlashReadDpDataOutCmd
-	ldr	r1, [sp, #12]
-	movs	r2, #36
-	add	r3, fp, #1
-	mov	r0, r4
-	mla	r3, r2, r3, r1
-	movs	r1, #0
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #0]
-	ldr	r2, [sp, #28]
-	ldr	r3, [r3, #8]
-	bl	NandcXferData
-	mov	sl, r0
-	cmp	r0, #-1
-	ite	ne
-	movne	r6, r8
-	moveq	r6, #0
-.L1032:
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	ldr	r3, [sp, #36]
-	ldr	r2, .L1063+4
-	adds	r0, r5, #1
-	strb	r3, [r2, #0]
-	bne	.L1036
-	ldr	r3, .L1063+48
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1034
-	ldr	r3, .L1063+52
-	mov	r0, r4
-	ldr	r1, [sp, #44]
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, #304]
+	mov	r6, r1
+	mov	r8, r3
+	bl	FlashReadRawPage
+	adds	r2, r0, #1
+	mov	r4, r0
+	bne	.L1067
+	ldr	r10, .L1085+20
+	ldrb	fp, [r10]	@ zero_extendqisi2
+	cmp	fp, #0
+	bne	.L1068
+.L1070:
+	ldr	r3, .L1085
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1067
+	ldr	r3, .L1085+4
+	mov	r1, r6
+	mov	r2, r7
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldr	r10, [r3, #304]
 	movs	r3, #1
-	str	r3, [sp, #0]
-	ldr	r2, [r7, #8]
-	ldr	r3, [r7, #12]
+	str	r3, [sp]
+	mov	r3, r8
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
-	mov	r5, r0
-	beq	.L1035
-	ldr	r3, .L1063+56
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	mov	r4, r0
+	beq	.L1071
+	ldr	r3, .L1085+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1056
-.L1035:
-	ubfx	r0, r6, #8, #8
+	bls	.L1067
+.L1071:
+	ubfx	r0, r10, #8, #8
 	bl	NandcSetDdrPara
-	adds	r2, r5, #1
-	bne	.L1056
-.L1034:
-	ldr	r3, .L1063+60
-	mov	r0, r4
-	ldr	r1, [sp, #44]
-	ldr	r2, [r7, #8]
-	ldr	r6, [r3, #0]
-	ldr	r3, [r7, #12]
-	cmp	r6, #0
-	beq	.L1037
-	blx	r6
-	adds	r3, r0, #1
-	mov	r5, r0
-	bne	.L1058
-	ldr	r3, .L1063+24
-	ldr	r3, [r3, #0]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	cmp	r3, #6
-	bhi	.L1039
-	ldr	r2, .L1063+28
-	mov	r0, r4
+	b	.L1067
+.L1068:
 	movs	r3, #0
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	adds	r2, r2, #4
-	bl	HynixSetRRPara
-.L1039:
-	ldr	r1, [sp, #44]
-	mov	r0, r4
-	ldr	r2, [r7, #8]
-	ldr	r3, [r7, #12]
+	mov	r2, r7
+	strb	r3, [r10]
+	mov	r1, r6
+	mov	r3, r8
+	mov	r0, r5
 	bl	FlashReadRawPage
-	ldr	r3, .L1063+56
-	ldr	r1, [r7, #4]
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	mov	r5, r0
-	ldr	r0, .L1063+64
-	mov	r3, r5
+	adds	r3, r0, #1
+	strb	fp, [r10]
+	beq	.L1070
+	mov	r4, r0
+.L1067:
+	ldr	r10, .L1085+24
+	ldr	fp, [r10]
+	cmp	fp, #0
+	beq	.L1066
+	adds	r2, r4, #1
+	bne	.L1066
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	fp
+	mov	r3, r6
+	mov	r4, r0
+	mov	r1, r0
+	mov	r2, r5
+	ldr	r0, .L1085+12
 	bl	printf
-	adds	r6, r5, #1
-	bne	.L1058
-	ldr	r3, .L1063+40
-	ldrb	r6, [r3, #0]	@ zero_extendqisi2
-	cmp	r6, #0
-	beq	.L1038
-	ldr	r1, [sp, #20]
-	mov	r0, r4
-	cmp	r1, #1
-	beq	.L1040
-	ldr	r2, [sp, #24]
-	cbz	r2, .L1041
-.L1040:
+	adds	r3, r4, #1
+	bne	.L1066
+	ldr	r3, .L1085+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1066
+	mov	r0, r5
 	bl	flash_enter_slc_mode
-	b	.L1042
-.L1041:
+	ldr	r4, [r10]
+	mov	r3, r8
+	mov	r2, r7
+	mov	r1, r6
+	mov	r0, r5
+	blx	r4
+	mov	r4, r0
+	mov	r0, r5
 	bl	flash_exit_slc_mode
-.L1042:
-	ldr	r3, .L1063+60
+.L1066:
 	mov	r0, r4
-	ldr	r1, [sp, #44]
-	ldr	r2, [r7, #8]
-	ldr	r5, [r3, #0]
-	ldr	r3, [r7, #12]
-	blx	r5
-	mov	r5, r0
-	b	.L1058
-.L1037:
-	bl	FlashReadRawPage
-	mov	r5, r0
-	b	.L1038
-.L1064:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1086:
 	.align	2
-.L1063:
-	.word	.LANCHOR18
-	.word	.LANCHOR4
-	.word	.LANCHOR0
-	.word	.LANCHOR16
+.L1085:
+	.word	.LANCHOR28
 	.word	.LANCHOR19
-	.word	.LANCHOR194
-	.word	.LANCHOR23
 	.word	.LANCHOR31
-	.word	.LANCHOR32
-	.word	.LANCHOR31+4
-	.word	.LANCHOR7
-	.word	.LANCHOR2
-	.word	.LANCHOR35
-	.word	.LANCHOR30
-	.word	.LANCHOR29
-	.word	.LANCHOR153
-	.word	.LC19
-.L1056:
-	movs	r6, #0
-.L1036:
-	ldr	r3, .L1065
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bls	.L1038
-	ldr	r3, .L1065+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	it	eq
-	moveq	r5, #256
-	b	.L1038
-.L1058:
-	movs	r6, #0
-.L1038:
-	ldr	r1, [sp, #12]
-	adds	r0, r5, #1
-	ldr	r3, [sp, #16]
-	str	r5, [r1, r3]
-	beq	.L1043
-	cmp	r5, #256
-	beq	.L1043
-	ldr	r2, [sp, #16]
-	movs	r3, #0
-	str	r3, [r1, r2]
-.L1043:
-	ldr	r2, [sp, #12]
-	ldr	r1, [sp, #16]
-	ldr	r3, [r2, r1]
-	adds	r2, r3, #1
-	bne	.L1044
-	ldr	r2, .L1065
-	ldr	r1, [r7, #4]
-	ldr	r0, .L1065+8
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	bl	printf
-	ldr	r1, [r7, #12]
-	cbz	r1, .L1044
-	movs	r2, #4
-	ldr	r0, .L1065+12
-	mov	r3, r2
-	bl	rknand_print_hex
-.L1044:
-	cbz	r6, .L1045
-	ldr	r3, .L1065
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	sl, r3, lsr #2
-	bls	.L1046
-	ldr	r3, .L1065+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	it	eq
-	moveq	sl, #256
-.L1046:
-	ldr	r1, [sp, #12]
-	movs	r2, #36
-	add	r3, fp, #1
-	muls	r3, r2, r3
-	cmp	sl, #-1
-	str	sl, [r1, r3]
-	beq	.L1045
-	cmp	sl, #256
-	beq	.L1045
-	movs	r2, #0
-	str	r2, [r1, r3]
-.L1045:
-	ldr	r2, [sp, #20]
-	add	fp, fp, r6
-	cmp	r2, #1
-	beq	.L1047
-	ldr	r3, [sp, #24]
-	cbz	r3, .L1019
-.L1047:
-	ldr	r3, .L1065+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1019
-	mov	r0, r4
-	bl	flash_exit_slc_mode
-.L1019:
-	add	fp, fp, #1
-	b	.L1016
-.L1049:
-	mov	sl, r4
-	mov	fp, r4
-.L1016:
-	ldr	r4, [sp, #32]
-	cmp	fp, r4
-	bcc	.L1048
-	movs	r0, #0
-.L1017:
-	add	sp, sp, #48
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1066:
-	.align	2
-.L1065:
-	.word	.LANCHOR29
-	.word	.LANCHOR153
-	.word	.LC16
-	.word	.LC18
-	.word	.LANCHOR7
-	.size	FlashReadPages, .-FlashReadPages
-	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.word	.LC11
+	.word	.LANCHOR8
+	.word	.LANCHOR5
+	.word	.LANCHOR149
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
-	.global	FtlGcScanTempBlk
+	.global	FlashDdrParaScan
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcScanTempBlk, %function
-FtlGcScanTempBlk:
-	@ args = 0, pretend = 0, frame = 24
+	.fpu softvfp
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1090
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrh	r5, [r3, #0]
-	movw	r3, #65535
-	sub	sp, sp, #24
-	cmp	r5, r3
-	beq	.L1086
-	cbnz	r5, .L1068
-	b	.L1069
-.L1086:
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r4, .L1098
 	movs	r5, #0
-.L1068:
-	ldr	r3, .L1090+4
-	ldrh	r3, [r3, #0]
-	cmp	r1, r3
-	bne	.L1070
-.L1069:
-	bl	FtlGcPageVarInit
-.L1070:
-	ldr	r8, .L1090+44
-	movw	sl, #65535
-	mov	r3, #-1
-	str	r3, [sp, #20]
-.L1083:
-	ldrh	r3, [r4, #0]
-	movs	r2, #0
-	strb	r2, [r4, #8]
-	cmp	r3, sl
-	beq	.L1071
-.L1072:
-	mov	r7, r4
+	mov	r7, r1
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r3, r5
+	mov	r2, r5
+	str	r5, [sp]
+	mov	r1, r7
+	mov	r0, r6
+	bl	FlashDdrTunningRead
+	mov	r3, r5
+	mov	r2, r5
+	mov	r8, r0
+	mov	r1, r7
+	mov	r0, r6
+	ldr	r5, .L1098+4
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L1088
+	cmp	r8, #-1
+	bne	.L1089
 .L1088:
-	ldr	r3, .L1090+8
-	mov	r2, r7
-	ldr	r6, .L1090+12
-	ldr	ip, [r8, #0]
-	ldr	lr, [r3, #0]
-	ldr	r3, .L1090+16
-	ldrh	fp, [r6, #0]
-	ldrh	r6, [r3, #0]
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L1089
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
 	movs	r3, #0
-	mov	r4, r3
-	stmia	sp, {r6, ip}
-	b	.L1073
-.L1075:
-	ldrh	r0, [r2, #16]
-	cmp	r0, sl
-	beq	.L1074
-	ldr	r6, [sp, #4]
-	mov	ip, #36
-	orr	r0, r5, r0, lsl #10
-	mla	r1, ip, r4, r6
-	ldr	r6, [sp, #0]
-	str	r0, [r1, #4]
+.L1097:
 	movs	r0, #0
-	str	r0, [r1, #8]
-	mul	r0, r6, r4
-	adds	r4, r4, #1
-	uxth	r4, r4
-	bic	r0, r0, #3
-	add	r0, lr, r0
-	str	r0, [r1, #12]
-.L1074:
-	adds	r3, r3, #1
-	adds	r2, r2, #2
-	uxth	r3, r3
-.L1073:
-	cmp	r3, fp
-	bne	.L1075
-	ldr	r0, [r8, #0]
-	mov	r1, r4
-	movs	r2, #0
-	movs	r6, #0
-	bl	FlashReadPages
-	mov	fp, r6
-	b	.L1076
-.L1084:
-	ldr	r3, [r8, #0]
-	adds	r2, r3, r6
-	ldr	r1, [r2, #4]
-	str	r2, [sp, #16]
-	ubfx	r0, r1, #10, #16
-	str	r3, [sp, #12]
-	str	r1, [sp, #8]
-	bl	P2V_plane
-	ldr	r3, [sp, #12]
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #16]
-	ldr	r3, [r3, r6]
-	cbnz	r3, .L1077
-	ldr	r3, [r2, #12]
-	adds	r6, r6, #36
-	ldrh	r2, [r3, #0]
-	cmp	r2, sl
-	bne	.L1078
-	ldr	r3, .L1090+20
+	strb	r3, [r5]
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1089:
+	movs	r3, #1
+	b	.L1097
+.L1099:
+	.align	2
+.L1098:
+	.word	.LANCHOR24
+	.word	.LANCHOR28
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashProgPage,"ax",%progbits
+	.align	1
+	.global	FlashProgPage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashProgPage, %function
+FlashProgPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L1103
+	mov	r5, r1
+	mov	r7, r2
+	mov	r4, r0
+	ldrb	r6, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L1101
+	ldr	r3, .L1103+4
+	ldr	r2, .L1103+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	ldr	r1, [r2]
+	muls	r1, r3, r1
+	cmp	r1, r5
+	bls	.L1101
+	ldr	r3, .L1103+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1102
+	subs	r6, r6, #2
+.L1101:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgFirstCmd
+	mov	r3, r7
+	uxtb	r2, r6
+	str	r8, [sp]
 	movs	r1, #1
-	mov	r2, r0
-	mov	r4, r7
-	str	r1, [r3, #0]
-	b	.L1071
-.L1078:
-	add	fp, fp, #1
-	ldr	r0, [r3, #12]
-	ldr	r2, [r3, #8]
-	bl	FtlGcUpdatePage
-	uxth	fp, fp
-	b	.L1076
-.L1077:
-	mov	fp, r1
-	ldr	r0, .L1090+24
-	ldrh	r1, [r7, #0]
-	mov	r2, fp
-	bl	printf
-	ldr	r3, .L1090+28
-	mov	r4, r7
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L1079
-	ldr	r3, .L1090+32
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1080
-.L1079:
-	ldr	r3, .L1090+36
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #119
-	bls	.L1081
-.L1080:
-	ldr	r3, [r8, #0]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	bne	.L1082
-.L1081:
-	ldr	r3, [r8, #0]
-	adds	r6, r3, r6
-	ldr	r6, [r6, #4]
-	str	r6, [sp, #20]
-.L1082:
-	ldr	r3, .L1090+40
-	movs	r5, #0
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r4, #0]
-	bl	INSERT_FREE_LIST
-	strh	sl, [r4, #0]	@ movhi
-	bl	FtlGcPageVarInit
-	b	.L1083
-.L1076:
-	cmp	fp, r4
-	bne	.L1084
-	ldr	r3, .L1090+4
-	adds	r5, r5, #1
-	uxth	r5, r5
-	ldrh	r3, [r3, #0]
-	cmp	r3, r5
-	bhi	.L1088
-	mov	r4, r7
-	movs	r2, #0
-.L1071:
-	ldr	r3, .L1090
 	mov	r0, r4
-	movw	r1, #65535
-	strh	r5, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	strh	r1, [r3, #0]	@ movhi
+	bl	NandcXferData
 	mov	r1, r5
-	bl	ftl_sb_update_avl_pages
-	ldr	r0, [sp, #20]
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1091:
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r1, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r1, #1
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1102:
+	movs	r6, #4
+	b	.L1101
+.L1104:
 	.align	2
-.L1090:
-	.word	.LANCHOR195
-	.word	.LANCHOR56
-	.word	.LANCHOR121
-	.word	.LANCHOR41
-	.word	.LANCHOR62
-	.word	.LANCHOR128
-	.word	.LC20
-	.word	.LANCHOR116
-	.word	.LANCHOR7
-	.word	.LANCHOR84
-	.word	.LANCHOR89
-	.word	.LANCHOR177
-	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
-	.section	.text.FtlScanSysBlk,"ax",%progbits
+.L1103:
+	.word	.LANCHOR29
+	.word	.LANCHOR2
+	.word	.LANCHOR3
+	.word	.LANCHOR1
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
-	.global	FtlScanSysBlk
+	.global	FlashSavePhyInfo
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlScanSysBlk, %function
-FtlScanSysBlk:
-	@ args = 0, pretend = 0, frame = 40
+	.fpu softvfp
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1152
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r4, #0
-	ldr	r5, .L1152+4
-	sub	sp, sp, #40
-	strh	r4, [r3, #0]	@ movhi
-	mov	r1, r4
-	ldr	r3, .L1152+8
-	ldr	r2, [r5, #0]
-	ldr	r7, .L1152+12
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1152+16
-	lsls	r2, r2, #2
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r2, [r5, #0]
-	ldr	r3, .L1152+20
-	mov	r1, r4
-	ldr	r5, .L1152+24
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L1152+28
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #2
-	bl	memset
-	ldr	r3, .L1152+32
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	ldr	r0, .L1152+36
-	movs	r1, #255
-	movs	r2, #12
-	bl	memset
-	ldr	r3, .L1152+40
-	ldrh	r3, [r3, #0]
-	str	r3, [sp, #24]
-	b	.L1093
-.L1095:
-	ldrb	r0, [fp, r4]	@ zero_extendqisi2
-	ldr	r1, [sp, #24]
-	str	r3, [sp, #4]
-	bl	V2P_block
-	str	r0, [sp, #8]
-	bl	FtlBbmIsBadBlock
-	ldr	r2, [sp, #8]
-	ldr	r3, [sp, #4]
-	cbnz	r0, .L1094
-	ldr	r1, [r7, #0]
-	lsls	r2, r2, #10
-	ldr	r0, [r6, #0]
-	mla	r1, sl, r3, r1
-	str	r2, [r1, #4]
-	ldr	r2, [r8, #0]
-	str	r2, [r1, #8]
-	ldrh	r2, [r5, #0]
-	muls	r2, r3, r2
-	adds	r3, r3, #1
-	bic	r2, r2, #3
-	adds	r2, r0, r2
-	str	r2, [r1, #12]
-	uxth	r3, r3
-.L1094:
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1130
-.L1142:
-	movs	r3, #0
-	ldr	fp, .L1152+76
-	ldr	r8, .L1152+80
-	mov	r4, r3
-	ldr	r6, .L1152+44
-	mov	sl, #36
-	ldr	r5, .L1152+48
-	str	r3, [sp, #20]
-.L1130:
-	ldr	r1, .L1152+52
-	ldrh	r2, [r1, #0]
-	cmp	r2, r4
-	bhi	.L1095
-	str	r3, [sp, #20]
-	cmp	r3, #0
-	beq	.L1096
-	ldr	r0, [r7, #0]
-	mov	r1, r3
-	movs	r2, #1
-	movs	r6, #0
-	bl	FlashReadPages
-	str	r6, [sp, #32]
-.L1129:
-	ldr	r3, [r7, #0]
-	adds	r2, r3, r6
-	ldr	r3, [r3, r6]
-	ldr	r5, [r2, #4]
-	adds	r3, r3, #1
-	ldr	r4, [r2, #12]
-	ubfx	r5, r5, #10, #16
-	bne	.L1097
-	mov	r8, #16
-.L1099:
-	ldr	r0, [r7, #0]
-	movs	r1, #1
-	mov	r2, r1
-	adds	r0, r0, r6
-	ldr	r3, [r0, #4]
-	adds	r3, r3, #1
-	str	r3, [r0, #4]
-	bl	FlashReadPages
-	ldrh	r3, [r4, #0]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1098
-	ldr	r1, .L1152+12
-	mov	r2, #-1
-	ldr	r3, [r1, #0]
-	str	r2, [r3, r6]
-	b	.L1097
-.L1098:
-	ldr	r3, [r7, #0]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	bne	.L1097
-	add	r8, r8, #-1
-	uxth	r8, r8
-	cmp	r8, #0
-	bne	.L1099
-.L1097:
-	ldr	r3, [r7, #0]
-	ldr	r3, [r3, r6]
-	adds	r3, r3, #1
-	beq	.L1100
-	ldr	r2, .L1152+56
-	ldr	r3, [r4, #4]
-	ldr	r1, [r2, #0]
-	adds	r0, r1, #1
-	beq	.L1101
-	cmp	r1, r3
-	bhi	.L1102
-.L1101:
-	adds	r1, r3, #1
-	beq	.L1102
-	adds	r3, r3, #1
-	str	r3, [r2, #0]
-.L1102:
-	ldrh	r3, [r4, #0]
-	movw	r2, #61604
-	cmp	r3, r2
-	beq	.L1105
-	bhi	.L1108
-	movw	r2, #61574
-	cmp	r3, r2
-	bne	.L1103
-	b	.L1150
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, .L1114
+	ldr	r4, .L1114+4
+	ldr	r3, [r7]
+	ldr	r10, .L1114+60
+	ldr	r8, .L1114+64
+	str	r3, [r4]
+	ldr	r3, .L1114+8
+	ldrb	r0, [r3]	@ zero_extendqisi2
+	bl	FlashBchSel
+	mov	r2, #2048
+	movs	r1, #0
+	ldr	r0, [r7]
+	bl	ftl_memset
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r3, .L1114+12
+	ldr	r1, .L1114+16
+	str	r10, [r0]
+	adds	r0, r0, #16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r0, #-4]	@ movhi
+	ldr	r3, .L1114+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r0, #-2]	@ movhi
+	ldr	r3, .L1114+24
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [r0, #1060]
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #8
+	ldr	r1, .L1114+28
+	adds	r0, r0, #80
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1114+32
+	adds	r0, r0, #96
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1114+36
+	adds	r0, r0, #160
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	movs	r2, #32
+	ldr	r1, .L1114+40
+	adds	r0, r0, #192
+	bl	ftl_memcpy
+	ldr	r0, [r4]
+	mov	r2, #852
+	ldr	r1, .L1114+44
+	adds	r0, r0, #224
+	bl	ftl_memcpy
+	ldr	r5, [r4]
+	movw	r1, #2036
+	add	r0, r5, #12
+	bl	JSHash
+	ldr	r1, .L1114+48
+	mov	r3, #1592
+	str	r3, [r5, #4]
+	str	r0, [r5, #8]
+	movs	r0, #0
+	ldr	r3, [r1]
+	movs	r5, #0
+	mov	r6, r5
+	str	r3, [r4]
+	bl	flash_enter_slc_mode
+	mov	fp, r1
 .L1108:
-	movw	r2, #61634
-	cmp	r3, r2
+	ldr	r1, [r8]
+	movs	r2, #0
+	mov	r0, r2
+	muls	r1, r6, r1
+	bl	FlashEraseBlock
+	ldr	r1, [r8]
+	movs	r3, #0
+	ldr	r2, [r7]
+	mov	r0, r3
+	muls	r1, r6, r1
+	bl	FlashProgPage
+	ldr	r1, [r8]
+	movs	r3, #0
+	ldr	r2, [r7]
+	mov	r0, r3
+	muls	r1, r6, r1
+	adds	r1, r1, #1
+	bl	FlashProgPage
+	ldr	r1, [r8]
+	movs	r3, #0
+	ldr	r2, [fp]
+	mov	r0, r3
+	muls	r1, r6, r1
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	add	r2, r6, #1
 	beq	.L1106
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1103
-	b	.L1151
+	ldr	r3, [r4]
+	ldr	r1, [r3]
+	cmp	r1, r10
+	bne	.L1106
+	add	r0, r3, #12
+	movw	r1, #2036
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	bl	JSHash
+	ldr	r3, [sp]
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, #8]
+	cmp	r3, r0
+	bne	.L1106
+	ldr	r3, .L1114+52
+	cmp	r5, #1
+	str	r2, [r3]
+	ldr	r3, [r8]
+	mul	r6, r6, r3
+	ldr	r3, .L1114+56
+	str	r6, [r3]
+	beq	.L1109
+	movs	r5, #1
 .L1106:
-	ldr	r3, .L1152
-	ldr	r8, .L1152+4
-	ldrh	r2, [r3, #0]
-	ldr	r3, [r8, #0]
-	cmp	r2, r3
-	bls	.L1109
-	ldr	r1, .L1152+60
-	movw	r2, #1269
-	ldr	r0, .L1152+64
-	bl	printf
-	ldr	r0, .L1152+68
-	ldr	r1, .L1152+72
-	bl	printf
+	cmp	r2, #4
+	mov	r6, r2
+	bne	.L1108
+.L1107:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	clz	r0, r5
+	lsrs	r0, r0, #5
+	negs	r0, r0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
 .L1109:
-	ldr	r3, [r8, #0]
-	mov	ip, #0
-	ldr	r1, .L1152
-	uxth	r2, r3
+	movs	r5, #2
+	b	.L1107
+.L1115:
+	.align	2
+.L1114:
+	.word	.LANCHOR143
+	.word	.LANCHOR142
+	.word	.LANCHOR150
+	.word	.LANCHOR25
+	.word	.LANCHOR22
+	.word	.LANCHOR2
+	.word	.LANCHOR28
+	.word	.LANCHOR26
+	.word	.LANCHOR17
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.word	.LANCHOR151
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.word	1312902724
+	.word	.LANCHOR3
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
+	.align	1
+	.global	FlashReadIdbDataRaw
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #60
+	sub	sp, sp, #24
+	ldr	r2, .L1128
+	mov	r10, r0
+	strb	r3, [sp, #20]
+	movs	r3, #40
+	strb	r3, [sp, #21]
+	movs	r3, #24
+	strb	r3, [sp, #22]
+	movs	r3, #16
+	strb	r3, [sp, #23]
+	ldr	r3, .L1128+4
+	ldr	r1, [r2]
+	str	r2, [sp, #8]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	ldr	r3, .L1128+8
+	cmp	r1, r3
 	str	r3, [sp, #12]
-	subs	r3, r2, #1
-	ldrh	r0, [r1, #0]
-	ldr	r1, .L1152+16
-	uxth	r3, r3
-	subs	r2, r2, r0
-	subs	r2, r2, #1
-	ldr	r1, [r1, #0]
-	sxth	fp, r3
-	sxth	r2, r2
-	str	r2, [sp, #36]
-	add	sl, r1, fp, lsl #2
-	str	sl, [sp, #16]
-	mov	sl, r5
-	b	.L1110
-.L1116:
-	rsb	r2, ip, fp
-	str	r2, [sp, #28]
-	ldr	r2, [sp, #16]
-	add	ip, ip, #1
-	ldr	r8, [r4, #4]
-	subs	r5, r2, #4
-	str	r5, [sp, #16]
-	ldr	r5, [r2, #0]
-	cmp	r8, r5
-	bls	.L1111
-	ldr	ip, [r1, #0]
-	mov	r5, sl
-	str	r2, [sp, #16]
-	cmp	ip, #0
-	bne	.L1112
+	bne	.L1117
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L1117:
+	mov	r7, #-1
+	movs	r4, #2
+	mov	r2, #2048
+	movs	r1, #0
+	mov	r0, r10
+	bl	ftl_memset
+.L1118:
+	ldr	r3, .L1128+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L1123
+.L1122:
+	ldr	r0, [sp, #4]
+	bl	FlashBchSel
+	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	cmp	r0, r2
-	beq	.L1112
-	add	ip, r0, #1
-	ldr	r0, .L1152
-	strh	ip, [r0, #0]	@ movhi
-.L1112:
-	ldr	r0, .L1152+20
-	sxth	sl, r3
-	mov	fp, r3
-	str	sl, [sp, #12]
-	mov	r3, r1
-	ldr	ip, [r0, #0]
+	ldr	r3, [r3]
+	cmp	r3, r2
+	bne	.L1116
 	movs	r0, #0
-	mov	r8, ip
-	b	.L1113
-.L1114:
-	ldr	sl, [r1, #4]!
+	bl	flash_exit_slc_mode
+.L1116:
+	mov	r0, r7
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1123:
+	ldr	r5, .L1128+16
+	movs	r6, #0
+	ldr	fp, .L1128+32
+.L1120:
+	add	r3, sp, #20
+	ldrb	r8, [r6, r3]	@ zero_extendqisi2
+	mov	r0, r8
+	bl	FlashBchSel
+	ldr	r1, [fp]
+	movs	r3, #0
+	ldr	r2, [r5]
+	mov	r0, r3
+	muls	r1, r4, r1
+	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	uxth	r0, r0
-	str	sl, [r3], #4
-	ldrh	sl, [ip, #2]!
-	strh	sl, [r8], #2	@ movhi
-.L1113:
-	ldr	r2, [sp, #12]
-	sxth	sl, r0
-	cmp	sl, r2
-	bne	.L1114
-	ldr	r1, [r4, #4]
-	mov	r3, fp
-	ldr	r2, [sp, #16]
-	ldr	sl, [sp, #28]
-	str	r1, [r2, #0]
-	ldr	r2, .L1152+20
-	ldr	r2, [r2, #0]
-	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1115
-.L1111:
-	subs	r3, r3, #1
-	uxth	r3, r3
-.L1110:
-	ldr	r5, [sp, #36]
-	sxth	r2, r3
-	cmp	r2, r5
-	bgt	.L1116
-	mov	r5, sl
-.L1115:
-	sxth	r3, r3
-	cmp	r3, #0
-	blt	.L1103
-	ldr	r2, .L1152
-	ldr	r0, .L1152+4
-	ldrh	r1, [r2, #0]
-	ldr	r0, [r0, #0]
-	subs	r0, r0, r1
-	subs	r0, r0, #1
-	sxth	r0, r0
-	cmp	r3, r0
-	bgt	.L1103
-	adds	r1, r1, #1
-	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1152+16
-	ldr	r1, [r4, #4]
-	ldr	r2, [r2, #0]
-	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1152+20
-	b	.L1148
-.L1153:
+	bne	.L1119
+	adds	r6, r6, #1
+	cmp	r6, #4
+	bne	.L1120
+.L1121:
+	adds	r4, r4, #1
+	b	.L1118
+.L1126:
+	movs	r7, #0
+	b	.L1122
+.L1119:
+	ldr	r3, [r5]
+	ldr	r2, [r3]
+	ldr	r3, .L1128+20
+	cmp	r2, r3
+	bne	.L1121
+	mov	r1, r8
+	ldr	r0, .L1128+24
+	bl	printf
+	mov	r2, #2048
+	ldr	r1, [r5]
+	mov	r0, r10
+	bl	ftl_memcpy
+	ldr	r3, [r5]
+	ldr	r2, .L1128+12
+	ldr	r3, [r3, #512]
+	strb	r3, [r2]
+	ldr	r3, .L1128+28
+	ldr	r2, [r3]
+	cmp	r4, r2
+	bcs	.L1126
+	str	r4, [r3]
+	movs	r7, #0
+	bl	FlashSavePhyInfo
+	b	.L1121
+.L1129:
 	.align	2
-.L1152:
-	.word	.LANCHOR111
-	.word	.LANCHOR68
-	.word	.LANCHOR74
-	.word	.LANCHOR177
-	.word	.LANCHOR113
-	.word	.LANCHOR112
-	.word	.LANCHOR65
-	.word	.LANCHOR189
-	.word	.LANCHOR75
-	.word	.LANCHOR196
-	.word	.LANCHOR43
-	.word	.LANCHOR121
-	.word	.LANCHOR62
-	.word	.LANCHOR41
-	.word	.LANCHOR156
-	.word	.LANCHOR197
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR50
-	.word	.LANCHOR120
-.L1150:
-	ldr	r3, .L1154
-	ldr	r8, .L1154+28
-	ldrh	r2, [r3, #0]
-	ldrh	r3, [r8, #0]
-	cmp	r2, r3
-	bls	.L1117
-	ldr	r1, .L1154+4
-	movw	r2, #1316
-	ldr	r0, .L1154+8
-	bl	printf
-	ldr	r0, .L1154+12
-	ldr	r1, .L1154+16
-	bl	printf
-.L1117:
-	ldr	r1, .L1154
-	mov	ip, #0
-	ldrh	r8, [r8, #0]
-	ldrh	r0, [r1, #0]
-	add	r2, r8, #-1
-	str	r8, [sp, #16]
-	uxth	r3, r2
-	subs	r2, r2, r0
-	str	r2, [sp, #36]
-	ldr	r2, .L1154+20
-	sxth	fp, r3
-	ldr	r1, [r2, #0]
-	add	sl, r1, fp, lsl #2
-	str	sl, [sp, #28]
-	mov	sl, r5
-	b	.L1118
-.L1124:
-	ldr	r2, [sp, #28]
-	add	ip, ip, #1
-	ldr	r8, [r4, #4]
-	subs	r5, r2, #4
-	str	r5, [sp, #28]
-	ldr	r5, [r2, #0]
-	cmp	r8, r5
-	bls	.L1119
-	ldr	ip, [r1, #0]
-	mov	r5, sl
-	cmp	ip, #0
-	bne	.L1120
-	ldr	sl, [sp, #16]
-	cmp	r0, sl
-	beq	.L1120
-	add	ip, r0, #1
-	ldr	r0, .L1154
-	strh	ip, [r0, #0]	@ movhi
-.L1120:
-	ldr	r0, .L1154+24
-	sxth	sl, r3
-	mov	fp, r3
-	str	sl, [sp, #16]
-	str	r2, [sp, #28]
-	mov	r3, r1
-	ldr	ip, [r0, #0]
-	movs	r0, #0
-	mov	r8, ip
-	b	.L1121
-.L1122:
-	ldr	sl, [r1, #4]!
-	adds	r0, r0, #1
-	uxth	r0, r0
-	str	sl, [r3], #4
-	ldrh	sl, [r8, #2]!
-	strh	sl, [ip], #2	@ movhi
-.L1121:
-	ldr	r2, [sp, #16]
-	sxth	sl, r0
-	cmp	sl, r2
-	bne	.L1122
-	ldr	r2, [sp, #28]
-	mov	r3, fp
-	ldr	r1, [r4, #4]
-	ldr	sl, [sp, #12]
-	str	r1, [r2, #0]
-	ldr	r2, .L1154+24
-	ldr	r2, [r2, #0]
-	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1123
-.L1119:
-	subs	r3, r3, #1
-	uxth	r3, r3
-.L1118:
-	ldr	r5, [sp, #36]
-	rsb	r2, ip, fp
-	str	r2, [sp, #12]
-	cmp	r2, r5
-	bgt	.L1124
-	mov	r5, sl
-.L1123:
-	sxth	r3, r3
-	cmp	r3, #0
-	blt	.L1103
-	ldr	r0, .L1154+28
-	ldr	r2, .L1154
-	ldrh	r0, [r0, #0]
-	ldrh	r1, [r2, #0]
-	subs	r0, r0, #1
-	subs	r0, r0, r1
-	sxth	r0, r0
-	cmp	r3, r0
-	bgt	.L1103
-	adds	r1, r1, #1
-	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1154+20
-	ldr	r1, [r4, #4]
-	ldr	r2, [r2, #0]
-	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1154+24
-.L1148:
-	ldr	r2, [r2, #0]
-	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L1103
-.L1105:
-	ldr	r8, .L1154+32
-	movw	sl, #65535
-	ldrh	r3, [r8, #0]
-	cmp	r3, sl
-	bne	.L1125
-	ldr	r3, [r4, #4]
-	strh	r5, [r8, #0]	@ movhi
-	str	r3, [r8, #8]
-	b	.L1103
-.L1125:
-	ldrh	r0, [r8, #4]
-	movw	ip, #65535
-	cmp	r0, ip
-	beq	.L1126
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.L1126:
-	ldr	r2, [r4, #4]
-	ldr	r1, [r8, #8]
-	ldr	r3, .L1154+32
-	cmp	r1, r2
-	bcs	.L1127
-	ldrh	r1, [r3, #0]
-	str	r2, [r3, #8]
-	strh	r5, [r3, #0]	@ movhi
-	strh	r1, [r3, #4]	@ movhi
-	b	.L1103
-.L1127:
-	strh	r5, [r3, #4]	@ movhi
-	b	.L1103
-.L1151:
-	mov	r0, r5
-	b	.L1149
-.L1100:
-	ldr	r2, .L1154+36
-	mov	r0, r5
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	cbz	r1, .L1128
-.L1149:
-	movs	r1, #0
 .L1128:
-	bl	FtlFreeSysBlkQueueIn
-.L1103:
-	ldr	r5, [sp, #32]
-	adds	r6, r6, #36
-	adds	r3, r5, #1
-	ldr	r5, [sp, #20]
-	uxth	r3, r3
-	str	r3, [sp, #32]
-	cmp	r3, r5
-	bne	.L1129
-.L1096:
-	ldr	sl, [sp, #24]
-	add	r3, sl, #1
-	uxth	r3, r3
-	str	r3, [sp, #24]
-.L1093:
-	ldr	r3, .L1154+40
-	ldr	ip, [sp, #24]
-	ldrh	r3, [r3, #0]
-	cmp	r3, ip
-	bhi	.L1142
-	ldr	r3, .L1154+44
-	ldr	r1, [r3, #0]
-	ldrh	r3, [r1, #0]
-	cbnz	r3, .L1131
-	ldr	r2, .L1154+48
-	ldrh	r2, [r2, #0]
-	cbz	r2, .L1131
-	ldr	r2, .L1154+52
-	ldr	r4, [r2, #0]
-	mov	r2, r1
-	b	.L1132
+	.word	.LANCHOR152
+	.word	.LANCHOR31
+	.word	1446522928
+	.word	.LANCHOR2
+	.word	.LANCHOR143
+	.word	-52655045
+	.word	.LC12
+	.word	.LANCHOR145
+	.word	.LANCHOR3
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.align	1
+	.global	FlashPageProgMsbFFData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r2
+	ldr	r5, .L1140
+	mov	r6, r0
+	mov	r7, r1
+	ldr	r3, [r5]
+	ldrb	r2, [r3, #19]	@ zero_extendqisi2
+	ldr	r3, .L1140+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1131
+	ldr	r3, .L1140+8
+	ldr	r1, [r3]
+	ldr	r3, .L1140+12
+	cmp	r1, r3
+	beq	.L1130
+.L1131:
+	subs	r3, r2, #5
+	uxtb	r3, r3
+	cmp	r3, #30
+	bhi	.L1132
+	ldr	r2, .L1140+16
+	lsr	r3, r2, r3
+	lsls	r3, r3, #31
+	bmi	.L1134
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
 .L1135:
-	ldrh	r5, [r2], #2
-	adds	r3, r3, #1
-	cbz	r5, .L1132
-	ldr	r3, .L1154+56
-	sxth	r0, r0
-	ldr	ip, .L1154+52
-	mov	sl, r1
-	add	r6, r1, r0, lsl #1
-	ldr	r5, [r3, #0]
-	movs	r3, #0
-	mov	r2, r3
-	mov	r4, r3
-	add	r7, r5, r0, lsl #2
-	mov	fp, r3
-	b	.L1133
-.L1134:
-	ldrh	r1, [r6, r2]
-	strh	r1, [sl, r2]	@ movhi
-	ldr	r1, [r7, r3]
-	str	r1, [r5, r3]
-	adds	r3, r3, #4
-	strh	fp, [r6, r2]	@ movhi
-	adds	r2, r2, #2
-.L1133:
-	ldr	r1, [ip, #0]
-	add	r8, r4, r0
+	ldrh	r2, [r10, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1130
+	mov	r2, #32768
+	movs	r1, #255
+	ldr	r0, [r8]
+	bl	ftl_memset
+	adds	r1, r4, r7
 	adds	r4, r4, #1
-	cmp	r8, r1
-	bcc	.L1134
-	b	.L1131
-.L1132:
-	cmp	r3, r4
-	uxth	r0, r3
-	bne	.L1135
-.L1131:
-	ldr	r3, .L1154+24
-	ldr	r0, [r3, #0]
-	ldrh	r3, [r0, #0]
-	cmp	r3, #0
-	bne	.L1136
-	ldr	r2, .L1154
-	ldrh	r2, [r2, #0]
-	cmp	r2, #0
-	beq	.L1136
-	ldr	r2, .L1154+28
-	ldrh	r4, [r2, #0]
-	mov	r2, r0
-	b	.L1137
-.L1140:
-	ldrh	r5, [r2], #2
-	adds	r3, r3, #1
-	cmp	r5, #0
-	beq	.L1137
-	ldr	r3, .L1154+20
-	sxth	r1, r1
-	subs	r6, r1, r6
-	add	r7, r0, r1, lsl #1
-	ldr	r5, [r3, #0]
+	uxth	r4, r4
 	movs	r3, #0
-	mov	r2, r3
-	mov	r4, r3
-	add	r0, r0, r6, lsl #1
-	add	ip, r5, r1, lsl #2
-	b	.L1138
-.L1139:
-	ldrh	r8, [r7, r2]
-	ldr	sl, [ip, r3]
-	strh	r8, [r0, r2]	@ movhi
-	add	r8, r5, r6, lsl #2
-	str	sl, [r8, r3]
-	mov	r8, #0
-	adds	r3, r3, #4
-	strh	r8, [r7, r2]	@ movhi
-	adds	r2, r2, #2
-.L1138:
-	ldr	r8, .L1154+28
-	add	sl, r4, r1
-	adds	r4, r4, #1
-	ldrh	r8, [r8, #0]
-	cmp	sl, r8
-	blt	.L1139
-	b	.L1136
-.L1155:
-	.align	2
-.L1154:
-	.word	.LANCHOR74
-	.word	.LANCHOR197
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR189
-	.word	.LANCHOR75
-	.word	.LANCHOR65
-	.word	.LANCHOR196
-	.word	.LANCHOR7
-	.word	.LANCHOR44
-	.word	.LANCHOR112
-	.word	.LANCHOR111
-	.word	.LANCHOR68
-	.word	.LANCHOR113
-.L1137:
-	cmp	r3, r4
-	uxth	r1, r3
-	mov	r6, r3
-	blt	.L1140
+	ldr	r2, [r8]
+	mov	r0, r6
+	bl	FlashProgPage
 .L1136:
-	ldr	r3, .L1156
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1156+4
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	bls	.L1141
-	ldr	r1, .L1156+8
-	movw	r2, #1450
-	ldr	r0, .L1156+12
-	bl	printf
-	ldr	r0, .L1156+16
-	ldr	r1, .L1156+20
-	bl	printf
+	ldr	r3, [r5]
+	ldrh	r3, [r3, #10]
+	cmp	r3, r4
+	bhi	.L1135
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1132:
+	cmp	r2, #68
+	bne	.L1130
+.L1134:
+	ldr	r10, .L1140+20
+	ldr	r8, .L1140+24
+	b	.L1136
+.L1130:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
 .L1141:
-	movs	r0, #0
-	add	sp, sp, #40
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1157:
 	.align	2
-.L1156:
-	.word	.LANCHOR111
-	.word	.LANCHOR68
-	.word	.LANCHOR197
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+.L1140:
+	.word	.LANCHOR18
+	.word	.LANCHOR8
+	.word	.LANCHOR152
+	.word	1446522928
+	.word	1073758215
+	.word	.LANCHOR117
+	.word	.LANCHOR151
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
-	.global	FtlGetLastWrittenPage
+	.global	ftl_memcmp
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 104
+	.fpu softvfp
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	sub	sp, sp, #108
-	it	eq
-	ldreq	r3, .L1169
-	mov	r5, r1
-	it	ne
-	ldrne	r3, .L1169+4
-	add	sl, sp, #68
-	lsl	r8, r0, #10
-	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	ldrh	r4, [r3, #0]
-	add	r3, sp, #4
-	str	r3, [sp, #80]
-	movs	r7, #0
-	subs	r4, r4, #1
-	str	r7, [sp, #76]
-	uxth	r4, r4
-	sxth	r3, r4
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L1162
-	b	.L1167
-.L1165:
-	adds	r6, r6, r3
-	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	add	r6, r6, r6, lsr #31
-	ubfx	r6, r6, #1, #16
-	sxth	r3, r6
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
-	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L1163
-	ldr	r3, [sp, #8]
-	adds	r3, r3, #1
-	bne	.L1163
-	ldr	r3, [sp, #68]
-	adds	r3, r3, #1
-	beq	.L1163
-	subs	r4, r6, #1
-	uxth	r4, r4
-	b	.L1167
-.L1163:
-	adds	r6, r6, #1
-	uxth	r7, r6
-.L1167:
-	sxth	r6, r7
-	sxth	r3, r4
-	cmp	r6, r3
-	ble	.L1165
-.L1162:
-	sxth	r0, r4
-	add	sp, sp, #108
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L1170:
-	.align	2
-.L1169:
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadSysInfo
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L1144
+	bx	lr
+.L1145:
+	.align	2
+.L1144:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.NandcInit,"ax",%progbits
+	.align	1
+	.global	NandcInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	NandcInit, %function
+NandcInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, .L1148
+	movs	r2, #1
+	push	{r4, lr}
 	movs	r4, #0
-	ldr	r6, .L1192
-	mov	r1, r4
-	ldr	r5, .L1192+4
-	ldr	r8, .L1192+60
-	ldr	r3, [r6, #0]
-	str	r4, [r5, #8]
-	str	r3, [r5, #12]
-	ldr	r3, .L1192+8
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1192+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r0, [r8, #0]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1188
-	movs	r1, #1
-	mov	fp, r8
-	bl	FtlGetLastWrittenPage
-	uxth	sl, r0
-	mov	r7, r0
-	add	r3, sl, #1
-	strh	r3, [r8, #2]	@ movhi
-	ldr	r8, .L1192+160
-	ldr	r3, .L1192+16
-	b	.L1173
-.L1176:
-	ldrh	r1, [fp, #0]
-	sxth	r2, sl
-	subs	r2, r2, r4
-	ldr	r0, .L1192+4
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
-	ldr	r2, [r8, #0]
-	movs	r1, #1
-	str	r2, [r5, #8]
-	mov	r2, r1
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r2, [r5, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1174
-	ldr	r2, [r8, #0]
-	ldr	r2, [r2, #0]
-	cmp	r2, r3
-	bne	.L1174
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r2, #0]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L1175
-.L1174:
-	adds	r4, r4, #1
-.L1173:
-	subs	r2, r7, r4
-	lsls	r2, r2, #16
-	bpl	.L1176
-	b	.L1191
-.L1175:
-	ldr	r3, .L1192+8
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1192+20
-	adds	r2, r2, #24
-	ldrh	r3, [r3, #0]
-	cmp	r3, r2, lsl #1
-	bcs	.L1178
-	ldr	r1, .L1192+24
-	mov	r2, #1512
-	ldr	r0, .L1192+28
-	bl	printf
-	ldr	r0, .L1192+32
-	ldr	r1, .L1192+36
-	bl	printf
-.L1178:
-	ldr	r4, .L1192+4
-	movs	r2, #48
-	ldr	r5, .L1192+8
-	ldr	r0, .L1192+40
-	ldr	r1, [r4, #8]
-	bl	memcpy
-	ldr	r3, .L1192+12
-	ldrh	r2, [r5, #0]
-	ldr	r1, [r4, #8]
-	ldr	r0, [r3, #0]
-	adds	r1, r1, #48
-	lsls	r2, r2, #1
-	bl	memcpy
-	ldrh	r2, [r5, #0]
-	ldr	r0, .L1192+44
-	add	r1, r2, #24
-	ldr	r3, [r4, #8]
-	lsrs	r2, r2, #3
-	lsrs	r1, r1, #1
-	ldr	r0, [r0, #0]
-	adds	r2, r2, #4
-	add	r1, r3, r1, lsl #2
-	bl	memcpy
-	ldr	r3, .L1192+48
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1179
-	ldrh	r3, [r5, #0]
-	ldr	r2, .L1192+52
-	ldr	r0, .L1192+56
-	lsrs	r1, r3, #3
-	add	r1, r1, r3, lsl #1
-	ldrh	r2, [r2, #0]
-	adds	r1, r1, #52
-	ldr	r3, [r4, #8]
-	ubfx	r1, r1, #2, #14
-	ldr	r0, [r0, #0]
-	lsls	r2, r2, #2
-	add	r1, r3, r1, lsl #2
-	bl	memcpy
-.L1179:
-	ldr	r3, .L1192+40
-	ldr	r2, .L1192+16
-	ldr	r1, [r3, #0]
-	cmp	r1, r2
-	bne	.L1188
-	ldrh	r4, [r3, #8]
-	ldr	r2, .L1192+60
-	strh	r4, [r2, #6]	@ movhi
-	ldrb	r2, [r3, #10]	@ zero_extendqisi2
-	ldr	r3, .L1192+64
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1188
-	ldr	r3, .L1192+68
-	ldr	r2, .L1192+72
-	str	r4, [r3, #0]
-	ldr	r3, .L1192+76
-	ldrh	r3, [r3, #0]
-	muls	r3, r4, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L1192+80
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	ldr	r2, .L1192+84
-	str	r3, [r2, #0]
-	ldr	r3, .L1192+88
-	ldr	r5, [r3, #0]
-	ldr	r3, .L1192+92
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L1192+96
-	subs	r0, r5, r0
-	subs	r0, r0, r4
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1192+100
-	cmp	r4, r5
-	strh	r0, [r3, #0]	@ movhi
-	bls	.L1180
-	ldr	r1, .L1192+24
-	movw	r2, #1539
-	ldr	r0, .L1192+28
-	bl	printf
-	ldr	r0, .L1192+32
-	ldr	r1, .L1192+36
-	bl	printf
-.L1180:
-	ldr	r3, .L1192+40
-	ldr	r2, .L1192+104
-	ldrh	r1, [r3, #16]
-	ldrh	r0, [r3, #14]
-	ldrh	r5, [r3, #18]
-	lsrs	r4, r1, #6
-	and	r1, r1, #63
-	strb	r1, [r2, #6]
-	ldrb	r1, [r3, #11]	@ zero_extendqisi2
-	strh	r4, [r2, #2]	@ movhi
-	movw	r4, #65535
-	strh	r0, [r2, #0]	@ movhi
-	strb	r1, [r2, #8]
-	movs	r2, #0
-	ldr	r1, .L1192+108
-	strh	r2, [r1, #2]	@ movhi
-	strh	r4, [r1, #0]	@ movhi
-	strb	r2, [r1, #6]
-	strb	r2, [r1, #8]
-	ldr	r1, .L1192+112
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #20]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1192+116
-	ldrh	r5, [r3, #22]
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #13]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1192+120
-	ldr	r5, [r3, #32]
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+124
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+128
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+132
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+136
-	str	r5, [r1, #0]
-	ldr	r1, .L1192+140
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+144
-	str	r2, [r1, #0]
-	ldr	r1, .L1192+148
-	str	r2, [r1, #0]
-	ldr	r2, .L1192+152
-	ldr	r1, [r3, #40]
-	ldr	r5, [r2, #0]
-	cmp	r1, r5
-	it	hi
-	strhi	r1, [r2, #0]
-	ldr	r2, [r3, #36]
-	ldr	r3, .L1192+156
-	ldr	r1, [r3, #0]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3, #0]
-	cmp	r0, r4
-	beq	.L1183
-	ldr	r0, .L1192+104
-	bl	make_superblock
-.L1183:
-	ldr	r0, .L1192+112
-	movw	r4, #65535
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1184
-	bl	make_superblock
-.L1184:
-	ldr	r0, .L1192+116
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1185
-	bl	make_superblock
-.L1185:
-	ldr	r0, .L1192+108
-	movw	r3, #65535
-	ldrh	r2, [r0, #0]
-	cmp	r2, r3
-	beq	.L1189
-	bl	make_superblock
-	b	.L1189
-.L1188:
-	mov	r0, #-1
-	b	.L1172
-.L1189:
-	movs	r0, #0
-.L1172:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1191:
-	ldr	r1, .L1192+24
-	movw	r2, #1510
-	ldr	r0, .L1192+28
-	bl	printf
-	ldr	r1, .L1192+36
-	ldr	r0, .L1192+32
-	bl	printf
-	b	.L1175
-.L1193:
+	str	r2, [r3, #12]
+	movs	r2, #2
+	str	r2, [r3, #20]
+	movs	r2, #3
+	stm	r3, {r0, r4}
+	str	r0, [r3, #8]
+	str	r0, [r3, #16]
+	str	r2, [r3, #28]
+	str	r0, [r3, #24]
+	ldr	r3, .L1148+4
+	ldr	r2, .L1148+8
+	str	r0, [r3]
+	ldr	r3, [r0]
+	and	r3, r3, #253952
+	ubfx	r1, r3, #13, #1
+	and	r3, r3, #245760
+	str	r1, [r2]
+	orr	r3, r3, #256
+	ldr	r2, [r0, #352]
+	ldr	r1, .L1148+12
+	ubfx	r2, r2, #16, #4
+	str	r2, [r1]
+	ldr	r1, [r0, #352]
+	ldr	r2, .L1148+16
+	str	r1, [r2]
+	str	r3, [r0]
+	movw	r3, #4225
+	str	r4, [r0, #336]
+	str	r3, [r0, #4]
+	movw	r3, #8322
+	str	r3, [r0, #344]
+	ldr	r3, .L1148+20
+	str	r3, [r0, #304]
+	mov	r0, #36864
+	bl	ftl_malloc
+	ldr	r3, .L1148+24
+	str	r0, [r3]
+	ldr	r3, .L1148+28
+	str	r0, [r3]
+	add	r0, r0, #32768
+	str	r0, [r3, #4]
+	str	r4, [r3, #24]
+	ldr	r3, .L1148+32
+	str	r4, [r3]
+	pop	{r4, pc}
+.L1149:
 	.align	2
-.L1192:
-	.word	.LANCHOR184
-	.word	.LANCHOR198
-	.word	.LANCHOR43
-	.word	.LANCHOR89
-	.word	1179929683
-	.word	.LANCHOR61
-	.word	.LANCHOR199
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR131
-	.word	.LANCHOR107
-	.word	.LANCHOR73
-	.word	.LANCHOR70
-	.word	.LANCHOR191
-	.word	.LANCHOR196
-	.word	.LANCHOR48
-	.word	.LANCHOR200
-	.word	.LANCHOR76
-	.word	.LANCHOR56
-	.word	.LANCHOR59
-	.word	.LANCHOR72
-	.word	.LANCHOR45
-	.word	.LANCHOR78
-	.word	.LANCHOR41
-	.word	.LANCHOR201
-	.word	.LANCHOR97
-	.word	.LANCHOR202
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR166
-	.word	.LANCHOR161
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR86
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlLoadBbt,"ax",%progbits
+.L1148:
+	.word	.LANCHOR6
+	.word	.LANCHOR19
+	.word	.LANCHOR153
+	.word	.LANCHOR32
+	.word	.LANCHOR152
+	.word	1710593
+	.word	.LANCHOR154
+	.word	.LANCHOR33
+	.word	.LANCHOR34
+	.size	NandcInit, .-NandcInit
+	.section	.text.FtlMemInit,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	FtlMemInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlMemInit, %function
+FtlMemInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r3, #0
-	ldr	r6, .L1213
-	movw	sl, #61649
-	str	r3, [r6, #8]
-	ldr	r3, .L1213+4
-	ldr	r4, [r3, #0]
-	str	r4, [r6, #12]
-	bl	FtlBbtMemInit
-	ldr	r3, .L1213+8
-	mov	r8, r3
-	ldrh	r5, [r3, #0]
-	subs	r5, r5, #1
-	uxth	r5, r5
-	b	.L1195
-.L1199:
-	movs	r1, #1
-	ldr	r0, .L1213
-	mov	r2, r1
-	lsls	r3, r5, #10
-	str	r3, [r6, #4]
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
-	ldr	r7, .L1213
-	adds	r3, r3, #1
-	bne	.L1196
-	ldr	r3, [r6, #4]
-	movs	r1, #1
-	mov	r0, r7
-	mov	r2, r1
-	adds	r3, r3, #1
-	str	r3, [r6, #4]
-	bl	FlashReadPages
-.L1196:
-	ldr	r3, [r7, #0]
-	adds	r3, r3, #1
-	beq	.L1197
-	ldrh	r3, [r4, #0]
-	cmp	r3, sl
-	bne	.L1197
-	ldr	r3, .L1213+12
-	ldr	r2, [r4, #4]
-	strh	r5, [r3, #0]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r4, #8]
-	strh	r2, [r3, #4]	@ movhi
-	b	.L1198
-.L1197:
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1195:
-	ldrh	r3, [r8, #0]
-	subs	r3, r3, #47
-	cmp	r3, r5
-	ble	.L1199
-.L1198:
-	ldr	r5, .L1213+12
+	ldr	r3, .L1155
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r2, .L1155+4
+	movs	r6, #12
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+8
+	ldr	r5, .L1155+12
+	ldr	r10, .L1155+296
+	str	r4, [r3]
+	ldr	r3, .L1155+16
+	ldrh	r0, [r5]
+	ldr	r8, .L1155+300
+	str	r4, [r3]
+	ldr	r3, .L1155+20
+	lsls	r0, r0, #1
+	ldr	fp, .L1155+304
+	str	r4, [r3]
+	ldr	r3, .L1155+24
+	str	r4, [r3]
+	ldr	r3, .L1155+28
+	str	r4, [r3]
+	ldr	r3, .L1155+32
+	str	r4, [r3]
+	ldr	r3, .L1155+36
+	str	r4, [r3]
+	ldr	r3, .L1155+40
+	str	r4, [r3]
+	ldr	r3, .L1155+44
+	str	r4, [r3]
+	ldr	r3, .L1155+48
+	str	r4, [r3]
+	ldr	r3, .L1155+52
+	str	r4, [r3]
+	ldr	r3, .L1155+56
+	str	r4, [r3]
+	ldr	r3, .L1155+60
+	str	r4, [r3]
+	ldr	r3, .L1155+64
+	str	r4, [r3]
+	ldr	r3, .L1155+68
+	str	r4, [r3]
+	ldr	r3, .L1155+72
+	str	r4, [r3]
+	ldr	r3, .L1155+76
+	str	r4, [r3]
 	movw	r3, #65535
-	ldrh	r2, [r5, #0]
-	cmp	r2, r3
-	beq	.L1210
-	ldrh	r2, [r5, #4]
-	cmp	r2, r3
-	beq	.L1201
-	ldr	r6, .L1213
-	movs	r1, #1
-	lsls	r2, r2, #10
-	mov	r0, r6
-	str	r2, [r6, #4]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
+	str	r3, [r2]
+	ldr	r2, .L1155+80
+	str	r4, [r2]
+	ldr	r2, .L1155+84
+	str	r4, [r2]
+	ldr	r2, .L1155+88
+	str	r4, [r2]
+	ldr	r2, .L1155+92
+	strh	r3, [r2]	@ movhi
+	ldr	r2, .L1155+96
+	strh	r3, [r2]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L1155+100
+	strh	r2, [r3]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L1155+104
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1155+108
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+112
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+116
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L1155+120
+	strh	r4, [r3]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1155+124
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	movs	r5, #36
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+128
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	muls	r5, r3, r5
+	lsls	r7, r5, #2
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L1155+132
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+136
+	str	r0, [r3]
+	mov	r0, r7
+	bl	ftl_malloc
+	ldr	r3, .L1155+140
+	ldr	r7, .L1155+144
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+148
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+152
+	ldrh	r5, [r7]
+	str	r0, [r3]
+	ldrh	r3, [r10]
+	mov	r0, r5
+	lsls	r3, r3, #1
 	adds	r3, r3, #1
-	beq	.L1201
-	ldrh	r2, [r4, #0]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1201
-	ldr	r3, [r4, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L1201
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r4, #8]
-	strh	r2, [r5, #0]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L1201:
-	ldr	fp, .L1213+12
-	movs	r1, #1
-	movs	r5, #0
-	ldr	r6, .L1213
-	ldr	r8, .L1213+48
-	ldrh	r0, [fp, #0]
-	bl	FtlGetLastWrittenPage
-	uxth	sl, r0
-	mov	r7, r0
-	add	r3, sl, #1
-	strh	r3, [fp, #2]	@ movhi
-	sxth	sl, sl
-	movw	r3, #61649
-	b	.L1202
-.L1205:
-	ldrh	r1, [fp, #0]
-	rsb	r2, r5, sl
-	ldr	r0, .L1213
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #4]
-	ldr	r2, [r8, #0]
-	movs	r1, #1
-	str	r3, [sp, #4]
-	str	r2, [r6, #8]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1203
-	ldrh	r2, [r4, #0]
-	cmp	r2, r3
-	beq	.L1204
-.L1203:
-	adds	r5, r5, #1
-.L1202:
-	subs	r2, r7, r5
-	lsls	r1, r2, #16
-	bpl	.L1205
-	b	.L1212
-.L1204:
-	ldr	r3, .L1213+12
-	ldrh	r2, [r4, #10]
-	ldrh	r0, [r4, #12]
-	strh	r2, [r3, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1207
-	ldr	r3, .L1213+16
-	ldr	r2, [r3, #0]
-	cmp	r0, r2
-	beq	.L1207
-	ldr	r3, .L1213+20
-	ldrh	r3, [r3, #0]
-	lsrs	r3, r3, #2
-	cmp	r2, r3
-	bcs	.L1207
-	cmp	r0, r3
-	bcs	.L1207
-	bl	FtlSysBlkNumInit
-.L1207:
-	ldr	r5, .L1213+24
-	movs	r4, #0
-	ldr	r8, .L1213+52
-	ldr	r7, .L1213+28
-	ldr	r6, .L1213
-	b	.L1208
-.L1209:
-	ldrh	r2, [r7, #0]
-	ldr	r1, [r6, #8]
-	ldr	r0, [r5, #4]!
+	str	r3, [r8]
+	bl	ftl_malloc
+	ldr	r3, .L1155+156
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+160
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+164
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+168
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+172
+	str	r0, [r3]
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+176
+	str	r0, [r3]
+	ldr	r0, [r8]
+	muls	r0, r6, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+180
+	ldrh	r5, [r10]
+	ldr	r10, .L1155+308
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	muls	r5, r3, r5
+	mov	r0, r5
+	bl	ftl_malloc
+	ldr	r3, .L1155+184
+	str	r0, [r3]
+	lsls	r0, r5, #2
+	ldr	r5, .L1155+188
+	bl	ftl_malloc
+	ldr	r3, .L1155+192
+	str	r0, [r3]
+	ldrh	r3, [fp]
+	ldr	r0, [r8]
+	ldr	r8, .L1155+312
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+196
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1155+200
+	str	r0, [r3]
+	ldrh	r3, [r8]
+	ldr	r0, .L1155+204
+	addw	r3, r3, #547
+	lsrs	r3, r3, #9
+	and	r0, r0, r3, lsl #9
+	strh	r3, [r8]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L1155+208
+	str	r0, [r3]
+	adds	r0, r0, #32
+	ldr	r3, .L1155+212
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1155+216
+	str	r0, [r3]
+	ldr	r3, [r10]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1155+220
+	str	r0, [r3]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L1155+224
+	ldr	r8, .L1155+316
+	str	r0, [r3]
+	ldrh	r0, [r5]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L1155+228
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1155+232
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L1155+236
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	ldr	r8, .L1155+320
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1155+240
+	str	r0, [r3]
+	ldrh	r0, [r8]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r2, [r8]
+	mov	r1, r4
+	ldr	r3, .L1155+244
 	lsls	r2, r2, #2
-	mla	r1, r4, r2, r1
-	bl	memcpy
-	adds	r4, r4, #1
-.L1208:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcc	.L1209
-	movs	r0, #0
-	b	.L1200
-.L1210:
-	mov	r0, #-1
-.L1200:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1212:
-	ldr	r1, .L1213+32
-	mov	r2, #336
-	ldr	r0, .L1213+36
-	bl	printf
-	ldr	r1, .L1213+40
-	ldr	r0, .L1213+44
-	bl	printf
-	b	.L1204
-.L1214:
+	str	r0, [r3]
+	bl	ftl_memset
+	ldr	r3, .L1155+248
+	ldrh	r4, [r3]
+	lsls	r4, r4, #2
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1155+252
+	str	r0, [r3]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L1155+256
+	ldr	r4, .L1155+260
+	str	r0, [r3]
+	ldr	r0, [r10]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L1155+264
+	str	r0, [r3]
+	ldrh	r0, [r4]
+	muls	r0, r6, r0
+	ldr	r6, .L1155+268
+	bl	ftl_malloc
+	ldr	r3, .L1155+272
+	str	r0, [r3]
+	ldrh	r3, [r4]
+	ldrh	r0, [r7]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+276
+	str	r0, [r3]
+	movs	r0, #6
+	ldrh	r3, [r5]
+	ldr	r5, .L1155+280
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L1155+284
+	str	r0, [r3]
+	ldr	r3, .L1155+288
+	ldrh	r0, [r3]
+	ldrh	r3, [r6]
+	adds	r0, r0, #31
+	asrs	r0, r0, #5
+	strh	r0, [r5]	@ movhi
+	muls	r0, r3, r0
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldrh	r1, [r5]
+	movs	r2, #1
+	ldr	r3, .L1155+292
+	ldrh	r6, [r6]
+	lsls	r1, r1, #2
+	mov	r4, r3
+	str	r0, [r4, #28]!
+	mov	r0, r1
+	b	.L1156
+.L1157:
 	.align	2
-.L1213:
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LANCHOR54
+.L1155:
+	.word	.LANCHOR137
+	.word	.LANCHOR171
+	.word	.LANCHOR155
+	.word	.LANCHOR53
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
 	.word	.LANCHOR78
-	.word	.LANCHOR40
-	.word	.LANCHOR44
-	.word	.LANCHOR78+24
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR170
+	.word	.LANCHOR172
+	.word	.LANCHOR173
+	.word	.LANCHOR72
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR176
+	.word	.LANCHOR114
+	.word	.LANCHOR177
+	.word	.LANCHOR116
+	.word	.LANCHOR108
+	.word	.LANCHOR111
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR180
+	.word	.LANCHOR56
+	.word	.LANCHOR76
+	.word	.LANCHOR106
 	.word	.LANCHOR79
-	.word	.LANCHOR203
-	.word	.LC3
-	.word	.LC5
-	.word	.LC4
-	.word	.LANCHOR86
-	.word	.LANCHOR48
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.word	.LANCHOR181
+	.word	.LANCHOR182
+	.word	.LANCHOR104
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR103
+	.word	.LANCHOR185
+	.word	.LANCHOR39
+	.word	.LANCHOR186
+	.word	.LANCHOR105
+	.word	.LANCHOR134
+	.word	33553920
+	.word	.LANCHOR188
+	.word	.LANCHOR77
+	.word	.LANCHOR82
+	.word	.LANCHOR126
+	.word	.LANCHOR122
+	.word	.LANCHOR0
+	.word	.LANCHOR70
+	.word	.LANCHOR189
+	.word	.LANCHOR190
+	.word	.LANCHOR191
+	.word	.LANCHOR65
+	.word	.LANCHOR128
+	.word	.LANCHOR192
+	.word	.LANCHOR66
+	.word	.LANCHOR127
+	.word	.LANCHOR43
+	.word	.LANCHOR95
+	.word	.LANCHOR123
+	.word	.LANCHOR120
+	.word	.LANCHOR80
+	.word	.LANCHOR49
+	.word	.LANCHOR73
+	.word	.LANCHOR36
+	.word	.LANCHOR107
+	.word	.LANCHOR57
+	.word	.LANCHOR63
+	.word	.LANCHOR187
+	.word	.LANCHOR60
+	.word	.LANCHOR61
+.L1156:
+.L1151:
+	cmp	r2, r6
+	bcc	.L1152
+	add	r3, r3, r2, lsl #2
+	ldr	r2, .L1158
+	movs	r1, #0
+	adds	r3, r3, #24
+.L1153:
+	cmp	r3, r2
+	bne	.L1154
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1152:
+	ldr	r5, [r3, #28]
+	adds	r2, r2, #1
+	add	r5, r5, r0
+	add	r0, r0, r1
+	str	r5, [r4, #4]!
+	b	.L1151
+.L1154:
+	str	r1, [r3, #4]!
+	b	.L1153
+.L1159:
+	.align	2
+.L1158:
+	.word	.LANCHOR73+56
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.ftl_free,"ax",%progbits
 	.align	1
-	.global	FtlLoadFactoryBbt
+	.global	ftl_free
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1222
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1222+4
-	ldr	r3, [r3, #0]
-	ldr	r6, .L1222+8
-	ldr	r8, .L1222+20
-	str	r3, [r7, #8]
-	ldr	r3, .L1222+12
-	ldr	sl, [r3, #0]
-	ldr	r3, .L1222+16
-	str	sl, [r7, #12]
-	b	.L1216
-.L1221:
-	ldrh	r4, [r8, #0]
-	movw	r2, #65535
-	movw	fp, #61664
-	strh	r2, [r6], #2	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1217
-.L1220:
-	mla	r2, r2, r5, r4
-	movs	r1, #1
-	ldr	r0, .L1222+4
-	lsls	r2, r2, #10
-	str	r2, [r7, #4]
-	mov	r2, r1
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r2, [r7, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1218
-	ldrh	r2, [sl, #0]
-	cmp	r2, fp
-	bne	.L1218
-	strh	r4, [r6, #-2]	@ movhi
-	b	.L1219
-.L1218:
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1217:
-	ldrh	r2, [r8, #0]
-	sub	r1, r2, #15
-	cmp	r1, r4
-	ble	.L1220
-.L1219:
-	adds	r5, r5, #1
-.L1216:
-	ldrh	r2, [r3, #0]
-	cmp	r5, r2
-	bcc	.L1221
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1223:
-	.align	2
-.L1222:
-	.word	.LANCHOR86
-	.word	.LANCHOR198
-	.word	.LANCHOR78+12
-	.word	.LANCHOR184
-	.word	.LANCHOR48
-	.word	.LANCHOR54
-	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
-	.section	.text.FlashProgSlc2KPages,"ax",%progbits
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",%progbits
 	.align	1
-	.global	FlashProgSlc2KPages
+	.global	StorageSysDataLoad
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashProgSlc2KPages, %function
-FlashProgSlc2KPages:
-	@ args = 0, pretend = 0, frame = 56
+	.fpu softvfp
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #64
-	mov	sl, r0
-	mov	fp, r1
-	str	r3, [sp, #12]
+	push	{r4, r5, r6, lr}
+	mov	r4, r1
 	mov	r5, r0
-	ldr	r3, .L1242
-	movs	r6, #0
-	str	r2, [sp, #8]
-	ldr	r7, .L1242+4
-	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	b	.L1225
-.L1232:
-	rsb	r3, r6, fp
-	ldr	r1, [sp, #8]
-	add	r2, sp, #56
-	mov	r0, r5
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #60
-	bl	LogAddr2PhyAddr
-	ldr	r1, .L1242+8
-	ldr	r3, [sp, #60]
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bcc	.L1226
-	mov	r3, #-1
-	str	r3, [r5, #0]
-	b	.L1227
-.L1226:
-	ldr	r2, .L1242+12
-	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r0, r4
-	ldr	r1, [sp, #56]
-	bl	FlashProgFirstCmd
-	ldr	r3, [r5, #12]
-	mov	r2, r8
-	movs	r1, #1
-	mov	r0, r4
-	str	r3, [sp, #0]
-	ldr	r3, [r5, #8]
-	bl	NandcXferData
-	ldr	r1, [sp, #56]
-	mov	r0, r4
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #56]
-	mov	r0, r4
-	bl	FlashReadStatus
-	ldr	r3, [sp, #56]
-	ldr	r1, [r7, #0]
-	adds	r1, r1, r3
-	ands	r0, r0, #1
-	it	ne
-	movne	r0, #-1
-	str	r0, [r5, #0]
-	mov	r0, r4
-	bl	FlashProgFirstCmd
-	ldr	r3, [r5, #8]
-	cbz	r3, .L1229
-	add	r3, r3, #2048
-.L1229:
-	ldr	r2, [r5, #12]
-	cbz	r2, .L1230
-	adds	r2, r2, #8
-.L1230:
-	movs	r1, #1
-	str	r2, [sp, #0]
-	mov	r0, r4
-	mov	r2, r8
-	bl	NandcXferData
-	ldr	r3, [sp, #56]
-	ldr	r1, [r7, #0]
-	mov	r0, r4
-	adds	r1, r1, r3
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	ldr	r1, [sp, #56]
-	bl	FlashReadStatus
-	lsls	r3, r0, #31
+	mov	r2, #512
+	movs	r1, #0
 	mov	r0, r4
-	itt	mi
-	movmi	r3, #-1
-	strmi	r3, [r5, #0]
-	bl	NandcFlashDeCs
-.L1227:
-	adds	r6, r6, #1
-	adds	r5, r5, #36
-.L1225:
-	cmp	r6, fp
-	bne	.L1232
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	beq	.L1233
+	bl	memset
+	mov	r3, r4
+	add	r1, r5, #256
+	movs	r2, #1
+	movs	r0, #16
+	pop	{r4, r5, r6, lr}
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L1166
+	ldr	r0, [r3]
+	bx	lr
+.L1167:
+	.align	2
+.L1166:
+	.word	.LANCHOR67
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	movs	r5, #0
-	add	r4, sl, #8
-	ldr	r6, .L1242+16
-	mov	sl, r5
-	ldr	r8, .L1242+36
-	b	.L1234
-.L1239:
-	ldr	r3, [r4, #-8]
-	sub	r7, r4, #8
-	adds	r3, r3, #1
-	bne	.L1235
-	ldr	r1, [r4, #-4]
-	ldr	r0, .L1242+20
+	ldr	r7, .L1177
+	mov	fp, r0
+	mov	r6, r1
+	mov	r8, r2
+	mov	r10, r3
+	mov	r4, r5
+.L1169:
+	cmp	r4, r10
+	bne	.L1175
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
+	pop	{r4, r5, r6, r7, r8, r10, fp, lr}
+	b	printf
+.L1175:
+	cbnz	r5, .L1170
+	mov	r2, r4
+	mov	r1, fp
+	ldr	r0, .L1177+12
 	bl	printf
-	b	.L1236
-.L1235:
-	rsb	r3, sl, fp
+.L1170:
+	cmp	r8, #4
+	bne	.L1171
+	ldr	r1, [r6, r4, lsl #2]
+.L1176:
 	mov	r0, r7
-	ldr	r1, [sp, #8]
-	add	r2, sp, #56
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #60
-	add	r5, sp, #20
-	bl	LogAddr2PhyAddr
-	ldr	lr, [r6, #0]
-	ldr	ip, [r8, #0]
-	movs	r3, #0
-	str	r3, [lr, #0]
-	str	r3, [ip, #0]
-	ldmia	r7!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	r7!, {r0, r1, r2, r3}
-	str	lr, [sp, #28]
-	str	ip, [sp, #32]
-	stmia	r5!, {r0, r1, r2, r3}
-	movs	r1, #1
-	ldr	r3, [r7, #0]
-	add	r0, sp, #20
-	ldr	r2, [sp, #8]
-	str	r3, [r5, #0]
-	bl	FlashReadPages
-	ldr	r5, [sp, #20]
-	adds	r0, r5, #1
-	bne	.L1237
-	ldr	r0, .L1242+24
-	ldr	r1, [r4, #-4]
-	bl	printf
-	str	r5, [r4, #-8]
-.L1237:
-	ldr	r3, [r4, #4]
-	cbz	r3, .L1238
-	ldr	r2, [r3, #0]
-	ldr	r3, [r8, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1238
-	ldr	r0, .L1242+28
-	ldr	r1, [r4, #-4]
+	adds	r5, r5, #1
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1238:
-	ldr	r3, [r4, #0]
-	cbz	r3, .L1236
-	ldr	r2, [r3, #0]
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1236
-	ldr	r0, .L1242+32
-	ldr	r1, [r4, #-4]
+	cmp	r5, #15
+	bls	.L1174
+	movs	r5, #0
+	ldr	r1, .L1177+4
+	ldr	r0, .L1177+8
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1236:
-	add	sl, sl, #1
-	adds	r4, r4, #36
-.L1234:
-	cmp	sl, fp
-	bne	.L1239
-.L1233:
-	movs	r0, #0
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1243:
+.L1174:
+	adds	r4, r4, #1
+	b	.L1169
+.L1171:
+	cmp	r8, #2
+	ite	eq
+	ldrsheq	r1, [r6, r4, lsl #1]
+	ldrbne	r1, [r6, r4]	@ zero_extendqisi2
+	b	.L1176
+.L1178:
 	.align	2
-.L1242:
-	.word	.LANCHOR18
-	.word	.LANCHOR2
-	.word	.LANCHOR16
-	.word	.LANCHOR19
-	.word	.LANCHOR204
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LC24
-	.word	.LANCHOR205
-	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
-	.section	.text.FlashProgPages,"ax",%progbits
+.L1177:
+	.word	.LC14
+	.word	.LC15
+	.word	.LC6
+	.word	.LC13
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FlashProgPages
+	.global	HynixGetReadRetryDefault
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashProgPages, %function
-FlashProgPages:
-	@ args = 0, pretend = 0, frame = 64
+	.fpu softvfp
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #72
-	ldr	r4, .L1271
-	mov	r8, r0
-	str	r1, [sp, #8]
-	mov	fp, r2
-	str	r3, [sp, #16]
-	ldr	r4, [r4, #0]
-	ldrb	r4, [r4, #19]	@ zero_extendqisi2
-	str	r4, [sp, #20]
-	ldr	r4, .L1271+4
-	ldrb	r4, [r4, #9]	@ zero_extendqisi2
-	str	r4, [sp, #12]
-	ldr	r4, .L1271+8
-	ldrb	r5, [r4, #0]	@ zero_extendqisi2
-	cmp	r5, #0
-	beq	.L1268
-	bl	FlashProgSlc2KPages
-	b	.L1246
-.L1258:
-	ldr	r1, [sp, #8]
-	movs	r4, #36
-	muls	r4, r5, r4
-	add	r6, r8, r4
-	subs	r3, r1, r5
-	mov	r0, r6
-	mov	r1, fp
-	add	r2, sp, #64
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #68
-	bl	LogAddr2PhyAddr
-	ldr	r3, .L1271+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	mov	r7, r0
-	ldr	r0, [sp, #68]
-	cmp	r0, r3
-	bcc	.L1247
-	mov	r3, #-1
-	str	r3, [r8, r4]
-	b	.L1248
-.L1247:
-	ldr	r3, .L1271+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
-	it	eq
-	moveq	r7, #0
-	add	r3, sl, r0, lsl #4
-	ldr	r3, [r3, #8]
-	cbz	r3, .L1250
-	uxtb	r0, r0
-	bl	FlashWaitCmdDone
-.L1250:
-	ldr	r2, [sp, #68]
-	ldr	r1, .L1271+20
-	add	r3, r1, r2, lsl #4
-	movs	r1, #0
-	str	r1, [r3, #12]
-	ldr	r1, [sp, #64]
-	str	r6, [r3, #8]
-	str	r1, [r3, #4]
-	cbz	r7, .L1251
-	adds	r1, r5, #1
-	movs	r0, #36
-	mla	r1, r0, r1, r8
-	str	r1, [r3, #12]
-.L1251:
-	ldr	r3, .L1271+24
-	ldrb	r4, [r3, r2]	@ zero_extendqisi2
-	lsls	r2, r2, #4
-	ldr	r3, .L1271+12
-	mov	r0, r4
-	strb	r4, [sl, r2]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r3, #172
+	ldr	r5, .L1278
+	cmp	r0, #2
+	mov	r1, #173
+	mov	r2, #174
+	sub	sp, sp, #56
+	mov	r4, r0
+	strb	r3, [r5, #4]
+	mov	r3, #175
+	strb	r0, [r5]
+	strb	r1, [r5, #5]
+	strb	r2, [r5, #6]
+	strb	r3, [r5, #7]
+	bne	.L1180
+	movs	r3, #167
+	movs	r2, #247
+	strb	r3, [r5, #4]
+	ldr	r3, .L1278+4
+	strb	r2, [r3, #17]
+.L1236:
+	mov	r10, #7
+	b	.L1272
+.L1180:
+	cmp	r0, #3
+	bne	.L1182
+	movs	r3, #176
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+.L1273:
+	mov	r10, #8
+	strb	r3, [r5, #11]
+	mov	fp, r10
+.L1181:
+	subs	r3, r4, #1
 	cmp	r3, #1
-	bne	.L1252
-	bl	NandcWaitFlashReady
-	b	.L1253
-.L1252:
-	bl	NandcFlashCs
-	ldr	r2, [sp, #68]
-	ldr	r3, .L1271+28
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	mov	r0, r4
-	bl	NandcFlashDeCs
-.L1253:
-	ldr	r2, [sp, #20]
-	subs	r3, r2, #1
-	cmp	r3, #6
-	bhi	.L1254
-	ldr	r3, .L1271+32
-	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	cbz	r3, .L1254
-	ldr	r3, .L1271+36
-	mov	r0, r4
-	adds	r2, r3, #4
-	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	bhi	.L1186
+	mov	r8, #0
+.L1187:
+	ldr	r3, .L1278+8
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	uxtb	r3, r8
+	cmp	r2, r3
+	bhi	.L1193
+.L1194:
+	ldr	r3, .L1278
+	strb	fp, [r3, #1]
+	strb	r10, [r3, #2]
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1182:
+	cmp	r0, #4
+	bne	.L1183
+	movs	r0, #204
+	strb	r1, [r5, #9]
+	strb	r0, [r5, #4]
+	movs	r0, #191
+	strb	r0, [r5, #5]
+	movs	r0, #170
+	strb	r0, [r5, #6]
+	movs	r0, #171
+	strb	r0, [r5, #7]
+	movs	r0, #205
+	strb	r0, [r5, #8]
+	strb	r2, [r5, #10]
+	b	.L1273
+.L1183:
+	cmp	r0, #5
+	bne	.L1184
+	movs	r3, #56
+	mov	r10, #8
+	strb	r3, [r5, #4]
+	movs	r3, #57
+	strb	r3, [r5, #5]
+	movs	r3, #58
+	strb	r3, [r5, #6]
+	movs	r3, #59
+	strb	r3, [r5, #7]
+.L1272:
+	mov	fp, #4
+	b	.L1181
+.L1184:
+	cmp	r0, #6
+	bne	.L1185
+	movs	r3, #14
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #15
+	strb	r3, [r5, #5]
+	movs	r3, #16
+	strb	r3, [r5, #6]
+	movs	r3, #17
+	strb	r3, [r5, #7]
+	b	.L1272
+.L1185:
+	cmp	r0, #7
+	bne	.L1236
+	movs	r3, #176
+	mov	r10, #12
+	strb	r3, [r5, #4]
+	movs	r3, #177
+	strb	r3, [r5, #5]
+	movs	r3, #178
+	strb	r3, [r5, #6]
+	movs	r3, #179
+	strb	r3, [r5, #7]
+	movs	r3, #180
+	strb	r3, [r5, #8]
+	movs	r3, #181
+	strb	r3, [r5, #9]
+	movs	r3, #182
+	strb	r3, [r5, #10]
+	movs	r3, #183
+	strb	r3, [r5, #11]
+	movs	r3, #212
+	strb	r3, [r5, #12]
+	movs	r3, #213
+	strb	r3, [r5, #13]
+	mov	fp, #10
+	b	.L1181
+.L1193:
+	ldr	r2, .L1278+12
+	movs	r6, #0
+	ldrb	r2, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1278+16
+	ldr	r7, [r3, r2, lsl #3]
+	add	r4, r5, r2, lsl #6
+	add	r3, r3, r2, lsl #3
+	movs	r2, #55
+	adds	r4, r4, #20
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	add	r7, r7, r3, lsl #8
+	addw	r3, r7, #2056
+.L1188:
+	adds	r1, r5, r6
+	str	r2, [r3]
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	movs	r0, #80
+	str	r2, [sp, #8]
+	str	r3, [sp, #4]
+	str	r1, [r7, #2052]
+	bl	udelay
+	ldr	r1, [r7, #2048]
+	ldr	r3, [sp, #4]
+	ldr	r2, [sp, #8]
+	strb	r1, [r4, r6]
+	adds	r6, r6, #1
+	uxtb	r1, r6
+	cmp	fp, r1
+	bhi	.L1188
+	ldr	r7, .L1278+4
+	mov	r1, r4
+	movs	r2, #0
+.L1191:
+	movs	r3, #1
+	adds	r6, r7, r2
+.L1190:
+	ldrb	r0, [r6, r3, lsl #2]	@ zero_extendqisi2
+	ldrb	ip, [r1]	@ zero_extendqisi2
+	add	r0, r0, ip
+	strb	r0, [r1, r3, lsl #3]
+	adds	r3, r3, #1
+	cmp	r3, #7
+	bne	.L1190
+	adds	r2, r2, #1
+	adds	r1, r1, #1
+	cmp	r2, #4
+	bne	.L1191
 	movs	r3, #0
-	bl	HynixSetRRPara
-.L1254:
-	mov	r0, r4
-	bl	NandcFlashCs
-	cmp	fp, #1
-	mov	r0, r4
-	bne	.L1255
-	ldr	r3, .L1271+40
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1255
-	bl	flash_enter_slc_mode
-	b	.L1256
-.L1255:
-	bl	flash_exit_slc_mode
-.L1256:
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	bl	FlashProgFirstCmd
-	ldr	r3, [r6, #12]
-	mov	r0, r4
-	movs	r1, #1
-	ldr	r2, [sp, #12]
-	str	r3, [sp, #0]
-	ldr	r3, [r6, #8]
-	bl	NandcXferData
-	cbz	r7, .L1257
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1271+28
-	ldr	r2, [sp, #68]
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	ldr	r2, [r3, r2, lsl #2]
-	adds	r2, r2, #0
-	it	ne
-	movne	r2, #1
-	bl	FlashWaitReadyEN
-	ldr	r3, .L1271+44
-	mov	r0, r4
-	ldr	r1, [r3, #0]
-	ldr	r3, [sp, #64]
-	adds	r1, r1, r3
-	bl	FlashProgDpSecondCmd
-	movs	r2, #36
-	adds	r3, r5, #1
-	mov	r0, r4
-	movs	r1, #1
-	mla	r3, r2, r3, r8
-	ldr	r2, [r3, #12]
-	str	r2, [sp, #0]
-	ldr	r2, [sp, #12]
-	ldr	r3, [r3, #8]
-	bl	NandcXferData
-.L1257:
-	mov	r0, r4
-	ldr	r1, [sp, #64]
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	adds	r5, r5, r7
-.L1248:
-	adds	r5, r5, #1
-	b	.L1245
-.L1268:
-	ldr	sl, .L1271+20
-.L1245:
-	ldr	r1, [sp, #8]
-	cmp	r5, r1
-	bcc	.L1258
-	movs	r4, #0
-	ldr	r7, .L1271+12
-	ldr	r6, .L1271+40
-	ldr	r5, .L1271+20
-	b	.L1259
-.L1261:
-	uxtb	r0, r4
-	bl	FlashWaitCmdDone
-	cmp	fp, #1
-	bne	.L1260
-	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L1260
-	lsls	r3, r4, #4
-	ldrb	r0, [r5, r3]	@ zero_extendqisi2
-	bl	flash_exit_slc_mode
-.L1260:
-	adds	r4, r4, #1
-.L1259:
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L1261
+	add	r8, r8, #1
+	strb	r3, [r4, #16]
+	strb	r3, [r4, #24]
+	strb	r3, [r4, #32]
+	strb	r3, [r4, #40]
+	strb	r3, [r4, #48]
+	strb	r3, [r4, #41]
+	strb	r3, [r4, #49]
+	b	.L1187
+.L1186:
+	subs	r3, r4, #3
+	cmp	r3, #4
+	bhi	.L1194
+	smulbb	r3, r10, fp
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #52]
+	lsls	r3, r2, #3
+	str	r2, [sp, #12]
+	str	r3, [sp, #48]
+	lsls	r3, r2, #2
+	str	r3, [sp, #32]
+	movs	r3, #0
+.L1277:
+	str	r3, [sp, #28]
+	ldrb	r3, [sp, #28]	@ zero_extendqisi2
+	str	r3, [sp, #16]
+	ldr	r3, .L1278+8
 	ldr	r2, [sp, #16]
-	cmp	r2, #0
-	beq	.L1270
-	movs	r5, #0
-	add	r4, r8, #8
-	ldr	r6, .L1271+48
-	mov	sl, r5
-	ldr	r8, .L1271+68
-	b	.L1262
-.L1267:
-	ldr	r3, [r4, #-8]
-	sub	r7, r4, #8
-	adds	r3, r3, #1
-	bne	.L1263
-	ldr	r1, [r4, #-4]
-	ldr	r0, .L1271+52
-	bl	printf
-	b	.L1264
-.L1263:
-	ldr	r1, [sp, #8]
-	mov	r0, r7
-	add	r2, sp, #64
-	add	r5, sp, #28
-	rsb	r3, sl, r1
-	mov	r1, fp
-	uxtb	r3, r3
-	str	r3, [sp, #0]
-	add	r3, sp, #68
-	bl	LogAddr2PhyAddr
-	ldr	lr, [r6, #0]
-	ldr	ip, [r8, #0]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r2
+	bls	.L1194
+	ldr	r2, [sp, #16]
+	ldr	r3, .L1278+12
+	ldrb	r8, [r3, r2]	@ zero_extendqisi2
+	ldr	r3, .L1278+16
+	mov	r0, r8
+	ldr	r2, [r3, r8, lsl #3]
+	add	r3, r3, r8, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r2, [sp, #4]
+	str	r3, [sp, #8]
+	mov	r3, r2
+	ldr	r2, [sp, #8]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #255
+	str	r2, [r3, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r1, .L1278
+	cmp	r4, #7
+	it	eq
+	moveq	r3, #160
+	ldr	r2, [sp, #8]
+	itete	eq
+	mlaeq	r1, r3, r8, r1
+	addne	r1, r1, r8, lsl #6
+	addeq	r3, r1, #28
+	addne	r3, r1, #20
+	str	r3, [sp, #36]
+	cmp	r4, #4
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	mov	r2, #54
+	str	r2, [r3, #2056]
+	bne	.L1198
+	movs	r2, #255
+	str	r2, [r3, #2052]
+	movs	r2, #64
+	str	r2, [r3, #2048]
+	movs	r2, #204
+.L1275:
+	str	r2, [r3, #2052]
+	movs	r2, #77
+	b	.L1276
+.L1198:
+	subs	r2, r4, #5
+	cmp	r2, #1
+	bhi	.L1200
+	ldr	r2, .L1278
+	ldrb	r2, [r2, #4]	@ zero_extendqisi2
+	str	r2, [r3, #2052]
+	movs	r2, #82
+.L1276:
+	str	r2, [r3, #2048]
+	cmp	r4, #6
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r5, r3, r2, lsl #8
+	mov	r3, #22
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #2056]
+	mov	r3, #23
+	str	r3, [r5, #2056]
+	mov	r3, #4
+	str	r3, [r5, #2056]
+	mov	r3, #25
+	str	r3, [r5, #2056]
+	mov	r3, #0
+	str	r3, [r5, #2056]
+	str	r3, [r5, #2052]
+	str	r3, [r5, #2052]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r5, #2052]
+	movs	r3, #2
+	str	r3, [r5, #2052]
 	movs	r3, #0
-	str	r3, [lr, #0]
-	str	r3, [ip, #0]
-	ldmia	r7!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	ldmia	r7!, {r0, r1, r2, r3}
-	stmia	r5!, {r0, r1, r2, r3}
-	movs	r1, #1
-	ldr	r3, [r7, #0]
-	mov	r2, fp
-	add	r0, sp, #28
-	str	lr, [sp, #36]
-	str	ip, [sp, #40]
-	str	r3, [r5, #0]
-	bl	FlashReadPages
-	ldr	r5, [sp, #28]
-	adds	r2, r5, #1
-	bne	.L1265
-	ldr	r0, .L1271+56
-	ldr	r1, [r4, #-4]
-	bl	printf
-	str	r5, [r4, #-8]
-.L1265:
-	ldr	r3, [r4, #4]
-	cbz	r3, .L1266
-	ldr	r2, [r3, #0]
-	ldr	r3, [r8, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1266
-	ldr	r0, .L1271+60
-	ldr	r1, [r4, #-4]
-	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1266:
-	ldr	r3, [r4, #0]
-	cbz	r3, .L1264
-	ldr	r2, [r3, #0]
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #0]
-	cmp	r2, r3
-	beq	.L1264
-	ldr	r0, .L1271+64
-	ldr	r1, [r4, #-4]
+	str	r3, [r5, #2052]
+	ldr	r3, [sp, #4]
+	add	r3, r3, r2, lsl #8
+	movs	r2, #48
+	str	r2, [r3, #2056]
+	bl	NandcWaitFlashReady
+	subs	r3, r4, #5
+	cmp	r3, #1
+	str	r3, [sp, #40]
+	bls	.L1237
+	cmp	r4, #7
+	ite	eq
+	moveq	r2, #32
+	movne	r2, #2
+.L1203:
+	ldr	r3, .L1278+20
+	subs	r2, r2, #1
+	ldr	r3, [r3]
+	subs	r1, r3, #1
+	uxtab	r2, r3, r2
+	mov	r0, r1
+.L1204:
+	ldr	r6, [r5, #2048]
+	strb	r6, [r0, #1]!
+	cmp	r2, r0
+	bne	.L1204
+	cmp	r4, #7
+	bne	.L1205
+	movs	r2, #0
+.L1207:
+	ldrb	r0, [r3, r2, lsl #2]	@ zero_extendqisi2
+	uxtb	r1, r2
+	cmp	r0, #12
+	beq	.L1206
+	add	r0, r3, r2, lsl #2
+	ldrb	r0, [r0, #1]	@ zero_extendqisi2
+	cmp	r0, #10
+	beq	.L1206
+	adds	r2, r2, #1
+	cmp	r2, #8
+	bne	.L1207
+.L1208:
+	movs	r1, #0
+	ldr	r0, .L1278+24
 	bl	printf
-	mov	r3, #-1
-	str	r3, [r4, #-8]
-.L1264:
-	add	sl, sl, #1
-	adds	r4, r4, #36
-.L1262:
-	ldr	r2, [sp, #8]
-	cmp	sl, r2
-	bne	.L1267
-	movs	r0, #0
-	b	.L1246
-.L1272:
+.L1210:
+	b	.L1210
+.L1200:
+	movs	r2, #174
+	str	r2, [r3, #2052]
+	movs	r2, #0
+	str	r2, [r3, #2048]
+	movs	r2, #176
+	b	.L1275
+.L1237:
+	movs	r2, #16
+	b	.L1203
+.L1279:
 	.align	2
-.L1271:
-	.word	.LANCHOR23
-	.word	.LANCHOR18
-	.word	.LANCHOR0
-	.word	.LANCHOR16
-	.word	.LANCHOR33
-	.word	.LANCHOR21
-	.word	.LANCHOR19
+.L1278:
 	.word	.LANCHOR20
-	.word	.LANCHOR32
-	.word	.LANCHOR31
-	.word	.LANCHOR7
-	.word	.LANCHOR2
-	.word	.LANCHOR204
-	.word	.LC21
-	.word	.LC22
-	.word	.LC23
-	.word	.LC24
-	.word	.LANCHOR205
-.L1270:
-	ldr	r0, [sp, #16]
-.L1246:
-	add	sp, sp, #72
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-	.size	FlashProgPages, .-FlashProgPages
-	.section	.text.FtlVpcTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlVpcTblFlush
-	.thumb
-	.thumb_func
-	.type	FtlVpcTblFlush, %function
-FtlVpcTblFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1285
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1274
-	ldr	r2, .L1285+4
-	ldr	r6, .L1285+8
-	ldr	r4, .L1285+12
-	ldr	r0, [r2, #0]
-	ldr	r2, .L1285+16
-	ldr	r7, .L1285+20
-	str	r0, [r6, #8]
-	ldr	r5, [r2, #0]
-	ldr	r2, .L1285+24
-	str	r5, [r6, #12]
-	ldrh	r1, [r2, #0]
-	str	r3, [r5, #12]
-	strh	r1, [r5, #2]	@ movhi
-	movw	r1, #61604
-	strh	r1, [r5, #0]	@ movhi
-	ldr	r1, [r2, #8]
-	str	r3, [r5, #8]
-	ldr	r3, .L1285+28
-	str	r1, [r5, #4]
-	stmia	r4, {r3, r7}
-	ldrh	r3, [r2, #6]
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1285+32
-	ldrh	r3, [r3, #0]
-	strb	r3, [r4, #10]
-	ldr	r3, .L1285+36
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r4, #14]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	orr	r2, r2, r1, lsl #6
-	strh	r2, [r4, #16]	@ movhi
-	strb	r3, [r4, #11]
-	ldr	r3, .L1285+40
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r4, #18]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	orr	r2, r2, r1, lsl #6
-	strh	r2, [r4, #20]	@ movhi
-	strb	r3, [r4, #12]
-	ldr	r3, .L1285+44
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r3, #2]
-	strh	r2, [r4, #22]	@ movhi
-	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	orr	r2, r2, r1, lsl #6
-	strh	r2, [r4, #24]	@ movhi
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
-	movs	r1, #255
-	strb	r3, [r4, #13]
-	ldr	r3, .L1285+48
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #32]
-	ldr	r3, .L1285+52
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #40]
-	ldr	r3, .L1285+56
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #36]
-	ldr	r3, .L1285+60
-	ldrh	r2, [r3, #0]
-	bl	memset
-	mov	r1, r4
-	ldr	r4, .L1285+64
-	movs	r2, #48
-	ldr	r0, [r6, #8]
-	bl	memcpy
-	ldr	r3, .L1285+68
-	ldrh	r2, [r4, #0]
-	ldr	r0, [r6, #8]
-	ldr	r1, [r3, #0]
-	lsls	r2, r2, #1
-	adds	r0, r0, #48
-	bl	memcpy
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r6, #8]
-	add	r0, r2, #24
-	lsrs	r2, r2, #3
-	lsrs	r0, r0, #1
-	adds	r2, r2, #4
-	add	r0, r3, r0, lsl #2
-	ldr	r3, .L1285+72
-	ldr	r1, [r3, #0]
-	bl	memcpy
-	ldr	r3, .L1285+76
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1275
-	ldrh	r3, [r4, #0]
-	ldr	r1, [r6, #8]
-	lsrs	r0, r3, #3
-	add	r0, r0, r3, lsl #1
-	ldr	r3, .L1285+80
-	adds	r0, r0, #52
-	ubfx	r0, r0, #2, #14
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1285+84
-	add	r0, r1, r0, lsl #2
-	lsls	r2, r2, #2
-	ldr	r1, [r3, #0]
-	bl	memcpy
-.L1275:
+	.word	.LANCHOR193
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR6
+	.word	.LANCHOR143
+	.word	.LC16
+.L1206:
+	cmp	r1, #6
+	bhi	.L1208
+.L1209:
+	ldr	r3, .L1280
+	ldr	lr, [r3]
+	mov	r3, lr
+.L1214:
+	ldr	r1, [sp, #52]
+	sub	r2, r3, lr
+	cmp	r1, r2
+	bgt	.L1215
+	ldr	r3, .L1280
+	ldr	r1, [r3]
+	ldr	r3, [sp, #32]
+	adds	r0, r1, r3
+	movs	r3, #8
+.L1217:
+	mov	r7, r0
+	movs	r6, #0
+.L1216:
+	ldr	r2, [r7]
+	adds	r6, r6, #1
+	mvns	r2, r2
+	str	r2, [r7], #4
+	ldr	r2, [sp, #12]
+	cmp	r2, r6
+	bgt	.L1216
+	ldr	r2, [sp, #48]
+	subs	r3, r3, #1
+	add	r0, r0, r2
+	bne	.L1217
+	str	r1, [sp, #20]
+	str	r3, [sp, #24]
+.L1223:
 	movs	r0, #0
-	ldr	r6, .L1285+8
-	bl	FtlUpdateVaildLpn
-	ldr	sl, .L1285+4
-	ldr	fp, .L1285+16
-	movs	r7, #0
-	ldr	r4, .L1285+24
-	movw	r8, #65535
-.L1284:
-	ldr	r3, [sl, #0]
-	movs	r1, #1
-	ldrh	r2, [r4, #0]
-	ldr	r0, .L1285+8
-	str	r3, [r6, #8]
-	ldr	r3, [fp, #0]
-	str	r3, [r6, #12]
-	ldrh	r3, [r4, #2]
-	orr	r3, r3, r2, lsl #10
-	mov	r2, r1
-	str	r3, [r6, #4]
-	mov	r3, r1
-	bl	FlashProgPages
-	ldr	r3, .L1285+88
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
+	mov	r2, r0
+.L1222:
+	movs	r3, #1
+	mov	ip, #0
+	lsl	r7, r3, r2
+	movs	r3, #16
+	str	r3, [sp, #44]
+	mov	r6, r7
+	ldr	r7, [sp, #20]
+.L1220:
+	ldr	r3, [r7]
+	bics	r3, r6, r3
+	ldr	r3, [sp, #32]
+	it	eq
+	addeq	ip, ip, #1
+	add	r7, r7, r3
+	ldr	r3, [sp, #44]
 	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1277
-	ldrh	r3, [r4, #0]
-	ldrh	r8, [r4, #4]
-	strh	r3, [r4, #4]	@ movhi
+	str	r3, [sp, #44]
+	bne	.L1220
+	cmp	ip, #8
+	add	r2, r2, #1
+	itt	hi
+	movhi	r3, r6
+	orrhi	r0, r0, r3
+	cmp	r2, #32
+	bne	.L1222
+	ldr	r3, [sp, #20]
+	str	r0, [r3], #4
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	str	r3, [sp, #24]
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #12]
+	cmp	r3, r2
+	bgt	.L1223
+	subs	r2, r1, #4
+	add	r0, r1, #28
 	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1285+52
-	ldr	r3, [r2, #0]
-	adds	r1, r3, #1
-	str	r1, [r2, #0]
-	movs	r1, #1
-	str	r3, [r4, #8]
-	lsls	r2, r0, #10
-	strh	r0, [r4, #0]	@ movhi
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	r3, [r5, #4]
-	mov	r3, r1
-	strh	r0, [r5, #2]	@ movhi
-	ldr	r0, .L1285+8
-	bl	FlashProgPages
-.L1277:
-	ldrh	r3, [r4, #2]
-	ldr	r2, [r6, #0]
+.L1226:
+	ldr	r6, [r2, #4]!
+	cbnz	r6, .L1225
 	adds	r3, r3, #1
-	adds	r1, r2, #1
-	uxth	r3, r3
-	strh	r3, [r4, #2]	@ movhi
-	bne	.L1278
-	cmp	r3, #1
-	bne	.L1279
-	ldr	r1, .L1285+92
-	movw	r2, #1180
-	ldr	r0, .L1285+96
-	bl	printf
-	ldr	r0, .L1285+100
-	ldr	r1, .L1285+104
+.L1225:
+	cmp	r0, r2
+	bne	.L1226
+	cmp	r3, #7
+	ble	.L1227
+	ldr	r0, .L1280+4
+	mov	r3, #1024
+	movs	r2, #1
+	bl	rknand_print_hex
+	movs	r1, #0
+	ldr	r0, .L1280+8
 	bl	printf
-.L1279:
-	ldr	r2, .L1285+24
-	ldrh	r3, [r2, #2]
-	cmp	r3, #1
-	bne	.L1280
-	ldr	r3, .L1285+88
-	ldrh	r3, [r3, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1280:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, #3
-	bls	.L1284
-	ldr	r3, .L1285+8
-	mov	r2, r7
-	ldr	r0, .L1285+108
-	ldr	r1, [r3, #4]
+.L1228:
+	b	.L1228
+.L1205:
+	cmp	r4, #6
+	bne	.L1209
+	adds	r3, r3, #7
+.L1211:
+	ldrb	r2, [r1, #1]!	@ zero_extendqisi2
+	cmp	r2, #12
+	beq	.L1209
+	ldrb	r2, [r1, #8]	@ zero_extendqisi2
+	cmp	r2, #4
+	beq	.L1209
+	cmp	r3, r1
+	bne	.L1211
+	movs	r1, #0
+	ldr	r0, .L1280+8
 	bl	printf
-	ldr	r3, .L1285
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L1274
-.L1278:
+.L1213:
+	b	.L1213
+.L1215:
+	ldr	r2, [r5, #2048]
+	strb	r2, [r3], #1
+	b	.L1214
+.L1227:
+	cmp	r4, #6
+	beq	.L1239
+	cmp	r4, #7
+	ite	eq
+	moveq	ip, #10
+	movne	ip, #8
+.L1229:
+	add	r3, fp, #-1
+	ldr	r1, [sp, #36]
+	uxtb	r3, r3
+	movs	r0, #0
+	adds	r3, r3, #1
+.L1230:
+	mov	r7, r1
+	mov	r2, lr
+.L1231:
+	ldrb	r6, [r2], #1	@ zero_extendqisi2
+	strb	r6, [r7], #1
+	sub	r6, r2, lr
+	uxtb	r6, r6
+	cmp	fp, r6
+	bhi	.L1231
+	adds	r0, r0, #1
+	add	lr, lr, r3
+	cmp	r10, r0
+	add	r1, r1, ip
+	bgt	.L1230
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	ldr	r2, [sp, #8]
+	add	r6, r3, r2, lsl #8
+	movs	r3, #255
+	str	r3, [r6, #2056]
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #40]
 	cmp	r3, #1
-	beq	.L1284
-	cmp	r2, #256
-	beq	.L1284
-	movw	r3, #65535
-	cmp	r8, r3
-	beq	.L1274
+	bhi	.L1233
+	movs	r3, #54
+	mov	r1, #-1
+	str	r3, [r6, #2056]
+	ldr	r3, .L1280+12
+	ldr	r0, [sp, #16]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r5, #2052]
+	movs	r3, #0
+	str	r3, [r5, #2048]
+	movs	r3, #22
+	str	r3, [r6, #2056]
+	bl	FlashReadCmd
+.L1234:
 	mov	r0, r8
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
-.L1274:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1286:
+	bl	NandcWaitFlashReady
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	b	.L1277
+.L1239:
+	mov	ip, #4
+	b	.L1229
+.L1233:
+	movs	r3, #56
+	str	r3, [r6, #2056]
+	b	.L1234
+.L1281:
 	.align	2
-.L1285:
-	.word	.LANCHOR82
-	.word	.LANCHOR86
-	.word	.LANCHOR198
-	.word	.LANCHOR131
-	.word	.LANCHOR184
-	.word	1342177351
-	.word	.LANCHOR196
-	.word	1179929683
-	.word	.LANCHOR48
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR164
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR61
-	.word	.LANCHOR43
-	.word	.LANCHOR89
-	.word	.LANCHOR107
-	.word	.LANCHOR73
-	.word	.LANCHOR70
-	.word	.LANCHOR114
-	.word	.LANCHOR57
-	.word	.LANCHOR206
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LC25
-	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
-	.section	.text.FtlBbmTblFlush,"ax",%progbits
+.L1280:
+	.word	.LANCHOR143
+	.word	.LC17
+	.word	.LC16
+	.word	.LANCHOR20
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
 	.align	1
-	.global	FtlBbmTblFlush
-	.thumb
-	.thumb_func
-	.type	FtlBbmTblFlush, %function
-FtlBbmTblFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1299
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r4, [r3, #0]
-	cmp	r4, #0
-	bne	.L1288
-	ldr	r3, .L1299+4
-	mov	r1, r4
-	ldr	r7, .L1299+8
-	ldr	r5, .L1299+12
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1299+16
-	ldr	r8, .L1299+52
-	str	r0, [r7, #8]
-	ldr	r3, [r3, #0]
-	ldr	sl, .L1299+56
-	str	r3, [r7, #12]
-	ldr	r3, .L1299+20
-	ldrh	r2, [r3, #0]
-	bl	memset
-	b	.L1289
-.L1290:
-	ldrh	r2, [sl, #0]
-	ldr	r3, [r7, #8]
-	ldr	r1, [r5, #4]!
-	mul	r0, r2, r4
-	lsls	r2, r2, #2
-	adds	r4, r4, #1
-	add	r0, r3, r0, lsl #2
-	bl	memcpy
-.L1289:
-	ldrh	r3, [r8, #0]
-	ldr	r6, .L1299+8
-	cmp	r4, r3
-	blt	.L1290
-	ldr	r5, [r6, #12]
-	movs	r2, #16
-	movs	r1, #255
-	movs	r7, #0
-	mov	r0, r5
-	mov	r8, r7
-	bl	memset
-	movw	r3, #61649
-	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, .L1299+24
-	ldr	sl, .L1299+4
-	ldr	fp, .L1299+16
-	ldr	r2, [r3, #8]
-	str	r2, [r5, #4]
-	ldrh	r2, [r3, #0]
-	strh	r2, [r5, #2]	@ movhi
-	ldrh	r2, [r3, #4]
-	ldrh	r3, [r3, #6]
-	strh	r2, [r5, #8]	@ movhi
-	strh	r3, [r5, #10]	@ movhi
-	ldr	r3, .L1299+28
-	ldr	r3, [r3, #0]
-	strh	r3, [r5, #12]	@ movhi
-	b	.L1298
-.L1295:
-	mov	r8, #1
-.L1298:
-	ldr	r3, [sl, #0]
-	movs	r1, #0
-	ldr	r4, .L1299+24
-	ldrh	r0, [r5, #10]
-	str	r3, [r6, #8]
-	str	r1, [r6, #0]
-	ldr	r3, [fp, #0]
-	ldrh	r1, [r4, #0]
-	ldrh	r2, [r4, #2]
-	str	r3, [r6, #12]
-	orr	r3, r2, r1, lsl #10
-	str	r3, [r6, #4]
-	ldrh	r3, [r4, #4]
-	str	r0, [sp, #0]
-	ldr	r0, .L1299+32
-	bl	printf
-	movs	r1, #1
-	mov	r2, r1
-	mov	r3, r1
-	ldr	r0, .L1299+8
-	bl	FlashProgPages
-	ldr	r3, .L1299+36
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	blt	.L1292
-	ldrh	r2, [r4, #0]
-	movs	r1, #0
-	ldr	r3, [r4, #8]
-	strh	r1, [r4, #2]	@ movhi
-	movs	r1, #1
-	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	str	r3, [r5, #4]
-	strh	r2, [r5, #8]	@ movhi
-	ldrh	r3, [r4, #4]
-	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1299+40
-	strh	r3, [r4, #0]	@ movhi
-	lsls	r3, r3, #10
-	str	r3, [r6, #4]
-	ldr	r0, [r2, #0]
-	mov	r2, r1
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	movs	r1, #1
-	ldr	r0, .L1299+8
-	mov	r2, r1
-	mov	r3, r1
-	bl	FlashProgPages
-.L1292:
-	ldr	r3, .L1299+24
-	ldrh	r2, [r3, #2]
-	adds	r2, r2, #1
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r3, [r6, #0]
-	adds	r3, r3, #1
-	bne	.L1293
-	adds	r7, r7, #1
-	ldr	r0, .L1299+44
-	ldr	r1, [r6, #4]
-	uxth	r7, r7
-	bl	printf
-	cmp	r7, #3
-	bls	.L1298
-	ldr	r3, .L1299+8
-	mov	r2, r7
-	ldr	r0, .L1299+48
-	ldr	r1, [r3, #4]
-	bl	printf
-	ldr	r3, .L1299
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L1288
-.L1293:
-	cmp	r8, #0
-	beq	.L1295
-.L1288:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1300:
-	.align	2
-.L1299:
-	.word	.LANCHOR82
-	.word	.LANCHOR86
-	.word	.LANCHOR198
-	.word	.LANCHOR78+24
-	.word	.LANCHOR184
-	.word	.LANCHOR61
-	.word	.LANCHOR78
-	.word	.LANCHOR40
-	.word	.LC26
-	.word	.LANCHOR57
-	.word	.LANCHOR83
-	.word	.LC27
-	.word	.LC28
-	.word	.LANCHOR48
-	.word	.LANCHOR79
-	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
-	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
-	.align	1
-	.global	FtlGcFreeBadSuperBlk
+	.global	FlashGetReadRetryDefault
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcFreeBadSuperBlk, %function
-FtlGcFreeBadSuperBlk:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r0
-	ldr	r5, .L1311
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1310
-	b	.L1303
-.L1309:
-	ldr	r3, .L1311+4
-	mov	r1, sl
-	mov	fp, #0
-	ldrb	r0, [r3, r4]	@ zero_extendqisi2
-	bl	V2P_block
+	@ link register save eliminated.
 	mov	r3, r0
+	cbz	r0, .L1282
+	subs	r2, r0, #1
+	cmp	r2, #6
+	bhi	.L1284
+	b	HynixGetReadRetryDefault
+.L1284:
+	cmp	r0, #49
+	bne	.L1285
+	ldr	r0, .L1305
+	movs	r2, #64
+	ldr	r1, .L1305+4
+	strb	r3, [r0]
+	movs	r3, #4
+	strb	r3, [r0, #1]
+	movs	r3, #15
+	strb	r3, [r0, #2]
+.L1303:
+	adds	r0, r0, #4
+	b	ftl_memcpy
+.L1285:
+	cmp	r0, #33
+	beq	.L1286
+	sub	r2, r0, #65
+	cmp	r2, #1
+	bhi	.L1287
+.L1286:
+	ldr	r0, .L1305
+	strb	r3, [r0]
+	movs	r3, #4
+.L1304:
+	strb	r3, [r0, #1]
+	movs	r3, #7
+	strb	r3, [r0, #2]
+	movs	r2, #45
+	ldr	r1, .L1305+8
+	b	.L1303
+.L1287:
+	cmp	r0, #34
+	beq	.L1288
+	cmp	r0, #67
+	bne	.L1289
+.L1288:
+	ldr	r0, .L1305
+	strb	r3, [r0]
+	movs	r3, #5
 	b	.L1304
-.L1308:
-	ldrh	r2, [r7, fp, lsl #1]
-	cmp	r2, r3
-	bne	.L1305
-	mov	r0, r3
-	str	r3, [sp, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldrh	r1, [r5, #0]
-	mov	r2, fp
-	ldr	r3, [sp, #4]
-	b	.L1306
-.L1307:
-	adds	r0, r2, #1
-	ldrh	lr, [r6, r0, lsl #1]
-	strh	lr, [r6, r2, lsl #1]	@ movhi
-	uxth	r2, r0
+.L1289:
+	cmp	r0, #35
+	beq	.L1290
+	cmp	r0, #68
+	bne	.L1282
+.L1290:
+	ldr	r0, .L1305
+	movs	r2, #95
+	ldr	r1, .L1305+12
+	strb	r3, [r0]
+	movs	r3, #5
+	strb	r3, [r0, #1]
+	movs	r3, #17
+	strb	r3, [r0, #2]
+	b	.L1303
+.L1282:
+	bx	lr
 .L1306:
-	cmp	r2, r1
-	bcc	.L1307
-	subs	r1, r1, #1
-	strh	r1, [r5, #0]	@ movhi
-.L1305:
-	add	fp, fp, #1
-	uxth	fp, fp
-.L1304:
-	ldrh	r2, [r5, #0]
-	cmp	r2, fp
-	bhi	.L1308
-	adds	r4, r4, #1
-	uxth	r4, r4
-	b	.L1302
-.L1310:
-	ldr	r7, .L1311+8
-	movs	r4, #0
-	ldr	r8, .L1311+12
-	mov	r6, r7
-.L1302:
-	ldrh	r3, [r8, #0]
-	cmp	r3, r4
-	bhi	.L1309
-	bl	FtlGcReFreshBadBlk
-.L1303:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1312:
 	.align	2
-.L1311:
-	.word	.LANCHOR139
-	.word	.LANCHOR50
-	.word	.LANCHOR140
-	.word	.LANCHOR41
-	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
-	.section	.text.update_vpc_list,"ax",%progbits
+.L1305:
+	.word	.LANCHOR20
+	.word	.LANCHOR14
+	.word	.LANCHOR9
+	.word	.LANCHOR11
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",%progbits
 	.align	1
-	.global	update_vpc_list
+	.global	FlashInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	update_vpc_list, %function
-update_vpc_list:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashInit, %function
+FlashInit:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldr	r3, .L1323
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cmp	r3, #0
-	bne	.L1314
-	ldr	r2, .L1323+4
-	ldrh	r1, [r2, #0]
-	cmp	r1, r0
-	bne	.L1315
-	movw	r3, #65535
-	strh	r3, [r2, #0]	@ movhi
-	b	.L1316
-.L1315:
-	ldr	r2, .L1323+8
-	ldrh	r2, [r2, #0]
-	cmp	r2, r0
-	beq	.L1317
-	ldr	r2, .L1323+12
-	ldrh	r2, [r2, #0]
-	cmp	r2, r0
-	beq	.L1317
-	ldr	r2, .L1323+16
-	ldrh	r2, [r2, #0]
-	cmp	r2, r0
-	beq	.L1317
-.L1316:
-	ldr	r5, .L1323+20
-	mov	r1, r4
-	ldr	r0, .L1323+24
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1318
-	ldr	r1, .L1323+28
-	movw	r2, #3042
-	ldr	r0, .L1323+32
-	bl	printf
-	ldr	r0, .L1323+36
-	ldr	r1, .L1323+40
-	bl	printf
-.L1318:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	free_data_superblock
+	sub	sp, sp, #32
+	mov	r0, #32768
+	movs	r5, #0
+	bl	ftl_malloc
+	ldr	r3, .L1399
+	ldr	r10, .L1399+132
+	ldr	r8, .L1399+136
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1399+4
+	ldr	r6, .L1399+8
+	ldr	r7, .L1399+12
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1399+16
+	str	r0, [r3]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L1399+20
+	str	r0, [r3]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L1399+24
+	ldr	r2, .L1399+28
+	strb	r5, [r8]
+	str	r0, [r3]
+	movs	r3, #50
+	strb	r3, [r10]
 	mov	r0, r4
-	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1323+44
-	ldrh	r2, [r3, #0]
-	ldrh	r3, [r5, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1323+48
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	ble	.L1322
-	ldr	r1, .L1323+28
-	movw	r2, #3045
-	ldr	r0, .L1323+32
-	bl	printf
-	ldr	r1, .L1323+40
-	ldr	r0, .L1323+36
-	bl	printf
-	b	.L1322
-.L1314:
-	bl	List_update_data_list
-	movs	r3, #0
-	b	.L1317
-.L1322:
-	movs	r3, #1
-.L1317:
-	mov	r0, r3
-	pop	{r3, r4, r5, pc}
-.L1324:
-	.align	2
-.L1323:
-	.word	.LANCHOR89
-	.word	.LANCHOR202
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR91
-	.word	.LANCHOR88
-	.word	.LANCHOR207
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR94
-	.word	.LANCHOR43
-	.size	update_vpc_list, .-update_vpc_list
-	.section	.text.decrement_vpc_count,"ax",%progbits
-	.align	1
-	.global	decrement_vpc_count
-	.thumb
-	.thumb_func
-	.type	decrement_vpc_count, %function
-decrement_vpc_count:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r3, #65535
-	cmp	r0, r3
-	push	{r4, r5, r6, lr}
-	mov	r4, r0
-	beq	.L1326
-	ldr	r6, .L1332
-	ldr	r3, [r6, #0]
-	ldrh	r5, [r3, r0, lsl #1]
-	cbnz	r5, .L1327
-	mov	r1, r4
-	ldr	r0, .L1332+4
-	mov	r2, r5
-	bl	printf
-	ldr	r3, [r6, #0]
-	ldrh	r4, [r3, r4, lsl #1]
-	cmp	r4, #0
-	bne	.L1328
-	ldr	r1, .L1332+8
-	movw	r2, #3060
-	ldr	r0, .L1332+12
-	mov	r5, r4
+	strb	r3, [r2]
+	movs	r2, #128
+	ldr	r3, .L1399+32
+	ldr	r4, .L1399+36
+	strb	r5, [r7]
+	str	r5, [r3]
+	ldr	r3, .L1399+40
+	str	r2, [r3]
+	ldr	r3, .L1399+44
+	str	r5, [r3]
+	movs	r3, #60
+	strb	r3, [r6]
+	bl	NandcInit
+	str	r10, [sp, #20]
+	ldr	r10, .L1399+140
+	str	r8, [sp, #16]
+	mov	r8, r6
+	mov	r6, r4
+.L1312:
+	uxtb	fp, r5
+	mov	r0, fp
+	bl	FlashReset
+	add	r1, r10, r5, lsl #3
+	ldr	r3, [r10, r5, lsl #3]
+	mov	r0, fp
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	str	r3, [sp, #28]
+	str	r1, [sp, #24]
+	bl	NandcFlashCs
+	ldr	r1, [sp, #24]
+	movs	r0, #200
+	ldr	r3, [sp, #28]
+	add	r3, r3, r1, lsl #8
+	movs	r1, #144
+	str	r1, [r3, #2056]
+	movs	r1, #0
+	str	r1, [r3, #2052]
+	str	r3, [sp, #24]
+	bl	udelay
+	ldr	r3, [sp, #24]
+	mov	r0, fp
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #1]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #2]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #3]
+	ldr	r1, [r3, #2048]
+	strb	r1, [r4, #4]
+	ldr	r3, [r3, #2048]
+	strb	r3, [r4, #5]
+	bl	NandcFlashDeCs
+	ldrb	r2, [r4]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1308
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L1399+48
+	str	r1, [sp, #12]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	str	r1, [sp]
+	adds	r1, r5, #1
 	bl	printf
-	ldr	r0, .L1332+16
-	ldr	r1, .L1332+20
+.L1308:
+	cbnz	r5, .L1309
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L1352
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L1352
+.L1309:
+	ldrb	r3, [r4]	@ zero_extendqisi2
+	adds	r5, r5, #1
+	adds	r4, r4, #8
+	cmp	r3, #181
+	itt	eq
+	moveq	r3, #44
+	strbeq	r3, [r4, #-8]
+	cmp	r5, #4
+	bne	.L1312
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #173
+	beq	.L1313
+	ldr	r3, .L1399+52
+	ldr	r0, [r3]
+	bl	NandcSetDdrMode
+.L1313:
+	mov	r2, #852
+	movs	r1, #0
+	ldr	r0, .L1399+56
+	bl	ftl_memset
+	ldr	r4, .L1399+60
+	ldr	r3, .L1399+64
+	ldr	r5, .L1399+68
+	str	r3, [r4]
+	movs	r3, #0
+	strb	r3, [r5]
+	ldrb	r3, [r6, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L1314
+	cmp	r3, #218
+	beq	.L1314
+	and	r2, r3, #223
+	cmp	r2, #209
+	beq	.L1314
+	cmp	r3, #220
+	bne	.L1315
+	ldrb	r2, [r6, #3]	@ zero_extendqisi2
+	cmp	r2, #149
+	bne	.L1315
+.L1314:
+	ldr	r1, [sp, #16]
+	movs	r2, #1
+	strb	r2, [r1]
+	movs	r2, #16
+	ldr	r1, [sp, #20]
+	strb	r2, [r8]
+	strb	r2, [r1]
+	ldrb	r1, [r6]	@ zero_extendqisi2
+	ldr	r2, .L1399+72
+	cmp	r1, #152
+	strb	r1, [r2, #1]
+	strb	r3, [r2, #2]
+	bne	.L1316
+	ldrsb	r1, [r6, #4]
+	cmp	r1, #0
+	itt	ge
+	movge	r1, #24
+	strbge	r1, [r8]
+.L1316:
+	ldr	r1, .L1399+76
+	ldr	r0, [r1]
+	ldr	r1, .L1399+80
+	cmp	r0, r1
+	itt	eq
+	moveq	r1, #16
+	strbeq	r1, [r8]
+	cmp	r3, #218
+	bne	.L1318
+	mov	r1, #2048
+.L1395:
+	strh	r1, [r2, #14]	@ movhi
+	strb	r3, [r2, #2]
+.L1319:
+	movs	r2, #32
+	ldr	r1, .L1399+84
+	ldr	r0, .L1399+88
+	bl	ftl_memcpy
+	movs	r2, #32
+	ldr	r1, .L1399+72
+	ldr	r0, .L1399+64
+	bl	ftl_memcpy
+.L1315:
+	ldr	r3, [sp, #16]
+	ldr	r8, .L1399+144
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1321
+	bl	FlashLoadPhyInfoInRam
+	cbnz	r0, .L1323
+	ldr	r3, [r4]
+	ldr	r10, .L1399+100
+	ldrh	r3, [r3, #16]
+	lsrs	r3, r3, #8
+	lsls	r1, r3, #31
+	and	r0, r3, #7
+	strb	r0, [r10]
+	bmi	.L1323
+	movs	r3, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r10]	@ zero_extendqisi2
+	bl	NandcSetMode
+.L1323:
+	ldr	r3, [r4]
+	ldrb	r3, [r3, #26]	@ zero_extendqisi2
+	strb	r3, [r8]
+	bl	FlashLoadPhyInfo
+	cmp	r0, #0
+	beq	.L1321
+	ldr	r3, [r4]
+	ldr	r0, .L1399+92
+	ldrh	r1, [r3, #14]
 	bl	printf
-	b	.L1328
-.L1327:
-	subs	r5, r5, #1
-	strh	r5, [r3, r0, lsl #1]	@ movhi
+	bl	FlashLoadPhyInfoInRam
+	adds	r2, r0, #1
+	beq	.L1307
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	bl	FlashGetReadRetryDefault
+	ldr	r3, [r4]
+	ldr	r2, .L1399+96
+	ldrb	r1, [r3, #9]	@ zero_extendqisi2
+	ldrh	r2, [r2]
+	addw	r2, r2, #4095
+	cmp	r1, r2, asr #12
+	blt	.L1326
+	ldrh	r2, [r3, #14]
+	adds	r2, r2, #255
+	cmp	r1, r2, asr #8
+	bge	.L1327
 .L1326:
-	ldr	r6, .L1332+24
-	movw	r3, #65535
-	ldrh	r0, [r6, #0]
-	cmp	r0, r3
-	bne	.L1329
-	strh	r4, [r6, #0]	@ movhi
-	b	.L1331
-.L1329:
-	cmp	r0, r4
-	beq	.L1331
-	bl	update_vpc_list
-	ldr	r3, .L1332+28
-	strh	r4, [r6, #0]	@ movhi
-	ldr	r2, [r3, #0]
-	ldr	r3, .L1332+32
-	ldr	r3, [r3, #0]
-	subs	r3, r2, r3
-	ldr	r2, .L1332+36
-	adds	r5, r0, #0
-	it	ne
-	movne	r5, #1
-	asrs	r3, r3, #1
-	muls	r3, r2, r3
-	ldr	r2, .L1332
-	uxth	r3, r3
-	ldr	r2, [r2, #0]
-	ldrh	r2, [r2, r3, lsl #1]
-	cbnz	r2, .L1328
-	cmp	r4, r3
+	ldrh	r2, [r3, #14]
+	bic	r2, r2, #255
+	strh	r2, [r3, #14]	@ movhi
+.L1327:
+	ldr	r3, .L1399+100
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	tst	r3, #6
 	beq	.L1328
-	ldr	r1, .L1332+8
-	movw	r2, #3082
-	ldr	r0, .L1332+12
-	bl	printf
-	ldr	r1, .L1332+20
-	ldr	r0, .L1332+16
-	bl	printf
-	b	.L1328
-.L1331:
-	movs	r5, #0
+	bl	FlashSavePhyInfo
+	ldr	r3, .L1399+104
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
 .L1328:
-	mov	r0, r5
-	pop	{r4, r5, r6, pc}
-.L1333:
+	bl	FlashSavePhyInfo
+.L1321:
+	ldr	fp, [r4]
+	ldr	r10, .L1399+100
+	ldrb	r3, [fp, #26]	@ zero_extendqisi2
+	ldrh	r0, [fp, #10]
+	strb	r3, [r8]
+	ldrh	r3, [fp, #16]
+	ubfx	r2, r3, #7, #1
+	ubfx	r1, r3, #3, #1
+	strb	r2, [r5]
+	ldr	r2, .L1399+108
+	ldr	r5, .L1399+112
+	strb	r1, [r2]
+	ubfx	r1, r3, #4, #1
+	ldr	r2, .L1399+116
+	ubfx	r3, r3, #8, #3
+	strb	r3, [r10]
+	movs	r3, #0
+	str	r3, [r5]
+	strb	r1, [r2]
+	ldrb	r1, [fp, #12]	@ zero_extendqisi2
+	bl	__aeabi_idiv
+	mov	r1, r0
+	ldrb	r0, [fp, #18]	@ zero_extendqisi2
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	r3, [r4]
+	mov	ip, r5
+	ldrh	r2, [r3, #16]
+	tst	r2, #64
+	beq	.L1330
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	ldr	r3, .L1399+120
+	ldr	r2, .L1399+124
+	strb	r0, [r3]
+	ldr	r3, .L1399+56
+	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	ldrb	lr, [r3, #2]	@ zero_extendqisi2
+	strb	r1, [r2]
+	ldr	r1, .L1399+128
+	strb	lr, [r1]
+	add	lr, r0, #-1
+	cmp	lr, #6
+	b	.L1400
+.L1401:
 	.align	2
-.L1332:
-	.word	.LANCHOR89
-	.word	.LC29
-	.word	.LANCHOR208
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR126
-	.word	.LANCHOR88
-	.word	.LANCHOR87
-	.word	-1431655765
-	.size	decrement_vpc_count, .-decrement_vpc_count
-	.section	.text.get_new_active_ppa,"ax",%progbits
-	.align	1
-	.global	get_new_active_ppa
-	.thumb
-	.thumb_func
-	.type	get_new_active_ppa, %function
-get_new_active_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #0]
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movw	r3, #65535
-	cmp	r2, r3
-	mov	r4, r0
-	bne	.L1335
-	ldr	r1, .L1350
-	movw	r2, #2982
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
+.L1399:
+	.word	.LANCHOR143
+	.word	.LANCHOR151
+	.word	.LANCHOR150
+	.word	.LANCHOR28
+	.word	.LANCHOR194
+	.word	.LANCHOR195
+	.word	.LANCHOR196
+	.word	.LANCHOR146
+	.word	.LANCHOR145
+	.word	.LANCHOR22
+	.word	.LANCHOR3
+	.word	.LANCHOR148
+	.word	.LC18
+	.word	.LANCHOR153
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR29
+	.word	.LANCHOR5
+	.word	.LANCHOR197
+	.word	.LANCHOR152
+	.word	1446522928
+	.word	.LANCHOR141+32
+	.word	.LANCHOR7
+	.word	.LC19
+	.word	.LANCHOR119
+	.word	.LANCHOR24
+	.word	.LANCHOR144
+	.word	.LANCHOR198
+	.word	.LANCHOR149
+	.word	.LANCHOR27
+	.word	.LANCHOR10
+	.word	.LANCHOR13
+	.word	.LANCHOR147
+	.word	.LANCHOR2
+	.word	.LANCHOR1
+	.word	.LANCHOR6
+	.word	.LANCHOR8
+.L1400:
+	mov	lr, r1
+	bhi	.L1331
+	ldr	r2, .L1402
+	str	r2, [r5]
+	subs	r2, r0, #5
+	cmp	r2, #1
+	bhi	.L1332
+	ldr	r2, .L1402+4
+	adds	r3, r3, #20
+	movs	r1, #1
+	str	r1, [r2]
+.L1333:
+	subs	r1, r3, #1
+	movs	r2, #0
+	adds	r3, r3, #31
 .L1335:
-	ldr	r3, .L1350+16
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1336
-	ldr	r1, .L1350
-	movw	r2, #2983
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
-.L1336:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1337
-	ldr	r1, .L1350
-	movw	r2, #2984
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
-.L1337:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	movs	r7, #0
-	movw	r6, #65535
-	strb	r7, [r4, #10]
-	adds	r3, r3, #8
-	ldr	sl, .L1350+24
-	ldr	r8, .L1350+28
-	ldrh	r3, [r4, r3, lsl #1]
-	ldr	r5, .L1350+20
-	b	.L1338
-.L1339:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldrh	r2, [r5, #0]
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	strb	r3, [r4, #6]
+	ldrsb	r5, [r1, #1]!
+	cbnz	r5, .L1334
+	adds	r2, r2, #1
+.L1334:
+	cmp	r3, r1
+	bne	.L1335
+	cmp	r2, #27
+	bls	.L1330
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+.L1330:
+	ldr	r3, .L1402+8
+	ldr	r2, [r3]
+	ldr	r3, .L1402+12
 	cmp	r2, r3
-	bne	.L1340
-	ldrh	r3, [r4, #2]
-	strb	r7, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1340:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r3, [r4, r3, lsl #1]
-.L1338:
-	cmp	r3, r6
-	beq	.L1339
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	cmp	r2, #1
-	bne	.L1341
-	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1341
-	ldrh	r2, [r4, #2]
-	ldrh	r2, [r8, r2, lsl #1]
-	cmp	r2, r6
-	bne	.L1341
-	ldrh	r3, [r4, #4]
-	ldrh	r0, [r4, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	b	.L1339
-.L1341:
-	ldrh	r5, [r4, #2]
-	movw	r6, #65535
-	ldr	sl, .L1350+20
-	mov	r8, r6
-	ldr	r7, .L1350+24
-	orr	r5, r5, r3, lsl #10
-	ldrh	r3, [r4, #4]
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
+	bne	.L1346
+	ldrb	r3, [r8]	@ zero_extendqisi2
+	cbz	r3, .L1346
+	ldr	r3, [r4]
+	movs	r2, #0
+	strb	r2, [r3, #18]
 .L1346:
-	ldrh	r2, [sl, #0]
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-.L1343:
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, r2
-	bne	.L1342
-	ldrh	r3, [r4, #2]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-.L1342:
-	add	r1, r3, #8
-	ldrh	r1, [r4, r1, lsl #1]
-	cmp	r1, r6
-	beq	.L1343
-	strb	r3, [r4, #6]
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1344
-	ldrb	r2, [r7, #0]	@ zero_extendqisi2
-	ldrh	r3, [r4, #2]
-	cbnz	r2, .L1348
-	ldr	r2, .L1350+28
-	ldrh	r3, [r2, r3, lsl #1]
-	cmp	r3, r8
-	bne	.L1344
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1344
-	subs	r3, r3, #1
-	ldrh	r0, [r4, #0]
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	b	.L1346
-.L1348:
-	ldr	r2, .L1350+32
-	ldrh	r2, [r2, #0]
-	cmp	r3, r2
-	bcc	.L1344
-	ldr	r3, .L1350+36
-	ldrh	r2, [r4, #0]
-	ldrh	r1, [r4, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #4]	@ movhi
-	mov	r2, r3	@ movhi
-	ldr	r3, .L1350+16
-	strb	r2, [r4, #6]
-	ldrh	r3, [r3, #0]
-	strh	r3, [r4, #2]	@ movhi
-.L1344:
-	ldr	r3, .L1350+16
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r3, #44
 	bne	.L1347
-	ldrh	r3, [r4, #4]
+	ldrb	r3, [r7]	@ zero_extendqisi2
 	cbz	r3, .L1347
-	ldr	r1, .L1350
-	movw	r2, #3028
-	ldr	r0, .L1350+4
-	bl	printf
-	ldr	r0, .L1350+8
-	ldr	r1, .L1350+12
-	bl	printf
+	movs	r3, #0
+	movs	r0, #1
+	strb	r3, [r7]
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
 .L1347:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldrb	r3, [r10]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L1348
+	ldrb	r2, [r7]	@ zero_extendqisi2
+	cbnz	r2, .L1349
+	lsls	r3, r3, #31
+	bmi	.L1348
+.L1349:
+	ldr	r3, .L1402+16
+	movs	r0, #0
+	ldr	r1, [r3]
+	bl	FlashDdrParaScan
+.L1348:
+	movs	r0, #0
+	movs	r7, #16
+	bl	flash_exit_slc_mode
+	ldr	r3, [r4]
+	ldrb	r0, [r3, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r0, .L1402+20
+	bl	FlashReadIdbDataRaw
+	ldr	r8, [r4]
+	ldr	r3, [sp, #20]
+	ldr	r4, .L1402+24
+	ldrb	r1, [r8, #12]	@ zero_extendqisi2
+	strb	r7, [r3]
+	ldrh	r5, [r8, #10]
+	strh	r1, [r4, #8]	@ movhi
+	ldrb	r3, [r8, #7]	@ zero_extendqisi2
 	mov	r0, r5
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1351:
-	.align	2
+	str	r3, [r4, #4]
+	ldr	r3, [r6]
+	ldrh	r6, [r8, #14]
+	str	r3, [r4]
+	ldr	r3, .L1402+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	strh	r3, [r4, #10]	@ movhi
+	ldrb	r3, [r8, #13]	@ zero_extendqisi2
+	strh	r5, [r4, #16]	@ movhi
+	strh	r6, [r4, #14]	@ movhi
+	strh	r3, [r4, #12]	@ movhi
+	bl	__aeabi_idiv
+	mov	r2, #512
+	strh	r0, [r4, #18]	@ movhi
+	ldrb	r3, [r8, #9]	@ zero_extendqisi2
+	strh	r2, [r4, #24]	@ movhi
+	ldr	r2, [sp, #16]
+	strh	r3, [r4, #20]	@ movhi
+	smulbb	r5, r5, r3
+	strh	r7, [r4, #26]	@ movhi
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	uxth	r5, r5
+	cmp	r2, #1
+	strh	r5, [r4, #22]	@ movhi
+	bne	.L1350
+	lsls	r3, r3, #1
+	lsrs	r2, r6, #1
+	lsls	r5, r5, #1
+	strh	r3, [r4, #20]	@ movhi
+	movs	r3, #8
+	strh	r2, [r4, #14]	@ movhi
+	strh	r5, [r4, #22]	@ movhi
+	strh	r3, [r4, #26]	@ movhi
 .L1350:
-	.word	.LANCHOR209
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR56
-	.word	.LANCHOR41
-	.word	.LANCHOR7
-	.word	.LANCHOR9
-	.word	.LANCHOR57
-	.word	.LANCHOR89
-	.size	get_new_active_ppa, .-get_new_active_ppa
-	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
-	.align	1
-	.global	FtlSlcSuperblockCheck
-	.thumb
-	.thumb_func
-	.type	FtlSlcSuperblockCheck, %function
-FtlSlcSuperblockCheck:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	mov	r4, r0
-	ldrh	r3, [r0, #4]
-	cmp	r3, #0
-	beq	.L1352
-	ldrh	r3, [r0, #0]
-	movw	r5, #65535
-	cmp	r3, r5
-	beq	.L1352
-	ldrb	r3, [r0, #6]	@ zero_extendqisi2
-	movs	r6, #0
-	ldr	sl, .L1358+4
-	adds	r3, r3, #8
-	ldr	r8, .L1358+20
-	ldr	r7, .L1358
-	ldrh	r3, [r0, r3, lsl #1]
-	b	.L1354
-.L1355:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	ldrh	r2, [r7, #0]
-	adds	r3, r3, #1
+	ldrb	r0, [r8, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+.L1307:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1318:
+	cmp	r3, #220
+	bne	.L1319
+	mov	r1, #4096
+	b	.L1395
+.L1332:
+	add	r2, r3, #28
+	adds	r3, r3, #20
+	cmp	r0, #7
+	it	eq
+	moveq	r3, r2
+	b	.L1333
+.L1331:
+	sub	r3, r0, #17
+	cmp	r3, #2
+	bhi	.L1337
+	ldr	r3, .L1402+32
+	cmp	r0, #19
+	str	r3, [r5]
+	ite	ne
+	movne	r3, #7
+	moveq	r3, #15
+	strb	r3, [r1]
+	b	.L1330
+.L1337:
+	cmp	r0, #33
+	beq	.L1339
+	sub	r3, r0, #65
+	cmp	r3, #1
+	bhi	.L1340
+.L1339:
+	ldr	r3, .L1402+36
+	str	r3, [ip]
+	movs	r3, #4
+	strb	r3, [r2]
+	movs	r3, #7
+	strb	r3, [lr]
+	b	.L1330
+.L1340:
+	sub	r3, r0, #67
 	uxtb	r3, r3
-	strb	r3, [r4, #6]
-	cmp	r2, r3
-	bne	.L1356
-	ldrh	r3, [r4, #2]
-	strb	r6, [r4, #6]
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1356:
-	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-	adds	r3, r3, #8
-	ldrh	r3, [r4, r3, lsl #1]
-.L1354:
-	cmp	r3, r5
-	beq	.L1355
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1357
-	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1357
-	ldrh	r2, [r4, #2]
-	ldrh	r2, [r8, r2, lsl #1]
-	cmp	r2, r5
-	bne	.L1357
-	ldrh	r3, [r4, #4]
-	ldrh	r0, [r4, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #4]	@ movhi
-	bl	decrement_vpc_count
-	ldrh	r3, [r4, #4]
-	cmp	r3, #0
-	bne	.L1355
-	ldrh	r2, [r4, #2]
-	strb	r3, [r4, #6]
-	adds	r2, r2, #1
-	strh	r2, [r4, #2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1357:
-	ldr	r2, .L1358+4
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1352
+	bls	.L1341
+	sub	r1, r0, #34
+	cmp	r1, #1
+	bhi	.L1342
+.L1341:
+	ldr	r1, .L1402+36
+	cmp	r0, #35
+	str	r1, [ip]
+	ldr	r1, .L1402+40
+	beq	.L1343
+	cmp	r0, #68
+	beq	.L1343
+	movs	r0, #7
+.L1396:
 	cmp	r3, #1
-	bne	.L1352
-	ldr	r3, .L1358+8
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1352
-	ldr	r3, .L1358+12
-	ldrh	r2, [r4, #0]
-	ldrh	r1, [r4, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	movs	r3, #0
-	strh	r3, [r4, #4]	@ movhi
-	mov	r2, r3	@ movhi
-	ldr	r3, .L1358+16
-	strb	r2, [r4, #6]
-	ldrh	r3, [r3, #0]
-	strh	r3, [r4, #2]	@ movhi
+	strb	r0, [r1]
+	ite	ls
+	movls	r3, #4
+	movhi	r3, #5
+	strb	r3, [r2]
+	b	.L1330
+.L1343:
+	movs	r0, #17
+	b	.L1396
+.L1342:
+	cmp	r0, #49
+	itt	eq
+	ldreq	r3, .L1402+44
+	streq	r3, [r5]
+	b	.L1330
 .L1352:
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1359:
+	mvn	r0, #1
+	b	.L1307
+.L1403:
 	.align	2
-.L1358:
-	.word	.LANCHOR41
-	.word	.LANCHOR7
-	.word	.LANCHOR57
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR9
-	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
-	.section	.text.allocate_data_superblock,"ax",%progbits
+.L1402:
+	.word	HynixReadRetrial
+	.word	.LANCHOR34
+	.word	.LANCHOR152
+	.word	1446522928
+	.word	.LANCHOR144
+	.word	.LANCHOR139
+	.word	.LANCHOR15
+	.word	.LANCHOR25
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+	.word	.LANCHOR147
+	.word	SamsungReadRetrial
+	.size	FlashInit, .-FlashInit
+	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
-	.global	allocate_data_superblock
+	.global	FlashReadSlc2KPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	allocate_data_superblock, %function
-allocate_data_superblock:
-	@ args = 0, pretend = 0, frame = 24
+	.fpu softvfp
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1405
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r8, r1
+	ldr	r3, .L1433
+	mov	fp, r2
 	mov	r4, r0
-	ldr	r3, [r3, #0]
-	sub	sp, sp, #24
-	cmp	r3, #0
-	bne	.L1361
-	ldr	r7, .L1405+4
-	ldr	r8, .L1405+104
-.L1401:
-	ldr	r1, .L1405+8
-	ldrh	r2, [r7, #0]
-	ldrh	r3, [r1, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r3, [r3, #0]
+	movs	r7, #0
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1405:
+	cmp	r7, r8
+	bne	.L1418
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1418:
+	sub	r3, r8, r7
+	add	r2, sp, #12
+	uxtb	r3, r3
+	mov	r1, fp
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #8
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1433+4
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	cmp	r2, r3
-	ble	.L1363
-	ldr	r1, .L1405+16
-	movw	r2, #2818
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1363:
-	ldr	r3, .L1405+32
-	cmp	r4, r3
-	bne	.L1364
-	ldr	r3, .L1405+36
-	ldrh	r2, [r7, #0]
-	ldr	r3, [r3, #0]
-	lsrs	r1, r2, #1
-	adds	r0, r1, #1
-	mul	r5, r3, r2
-	add	r0, r0, r5, lsr #2
-	ldr	r5, .L1405+40
-	uxth	r0, r0
-	ldr	r5, [r5, #0]
-	cbz	r5, .L1393
-	ldr	r5, .L1405+44
-	ldr	r5, [r5, #0]
-	cmp	r5, #29
-	bhi	.L1393
-	cmp	r5, #2
-	bls	.L1398
-	lsls	r0, r2, #31
-	bpl	.L1365
-	cbz	r3, .L1395
-	b	.L1365
-.L1364:
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1398
-	ldr	r3, .L1405+48
-	ldrh	r3, [r3, #0]
-	cmp	r3, #1
-	beq	.L1398
-	ldr	r3, .L1405+52
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1398
-	ldr	r2, .L1405+40
-	ldrh	r3, [r7, #0]
-	ldr	r2, [r2, #0]
-	lsrs	r1, r3, #3
-	cbz	r2, .L1365
-	ldr	r2, .L1405+44
-	ldr	r2, [r2, #0]
-	cmp	r2, #1
-	bhi	.L1365
-	movs	r1, #7
-	muls	r1, r3, r1
-	lsrs	r1, r1, #3
-	b	.L1365
-.L1393:
-	mov	r1, r0
-.L1365:
-	cbz	r1, .L1366
-	subs	r1, r1, #1
-	uxth	r1, r1
-	b	.L1366
-.L1395:
-	mov	r1, r3
-	b	.L1366
-.L1398:
-	movs	r1, #0
-.L1366:
-	ldr	r0, .L1405+56
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	bl	List_pop_index_node
-	ldrh	r3, [r7, #0]
-	uxth	r5, r0
-	cbnz	r3, .L1367
-	ldr	r1, .L1405+16
-	movw	r2, #2838
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1367:
-	ldr	r2, .L1405+4
-	mov	r0, r4
-	ldrh	r3, [r2, #0]
-	subs	r3, r3, #1
-	strh	r3, [r2, #0]	@ movhi
-	strh	r5, [r4, #0]	@ movhi
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1368
-	ldr	r3, .L1405+60
-	movw	r2, #65535
-	ldr	r1, .L1405+8
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldrh	r3, [r1, #0]
-	ldrh	r2, [r7, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	ble	.L1401
-	ldr	r1, .L1405+16
-	movw	r2, #2850
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r1, .L1405+28
-	ldr	r0, .L1405+24
-	bl	printf
-	b	.L1401
-.L1368:
-	ldr	r1, .L1405+8
-	ldrh	r2, [r7, #0]
-	ldrh	r3, [r1, #0]
-	adds	r2, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	ble	.L1370
-	ldr	r1, .L1405+16
-	movw	r2, #2853
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1370:
-	ldr	r3, .L1405+64
-	movs	r6, #0
-	ldr	lr, [r8, #0]
-	mov	sl, r4
-	mov	r1, r4
-	mov	r2, r6
-	ldrh	r3, [r3, #0]
-	mov	r0, r6
-	stmia	sp, {r4, lr}
-	str	r3, [sp, #20]
-	mov	r3, lr
-	b	.L1371
-.L1373:
-	str	r0, [r3, #8]
-	movw	r4, #65535
-	str	r0, [r3, #12]
-	ldrh	ip, [r1, #16]
-	cmp	ip, r4
-	beq	.L1372
-	ldr	r4, [sp, #4]
-	mov	lr, #36
-	lsl	ip, ip, #10
-	mla	fp, lr, r6, r4
-	adds	r6, r6, #1
-	uxth	r6, r6
-	str	ip, [fp, #4]
-.L1372:
-	adds	r2, r2, #1
-	adds	r3, r3, #36
-	adds	r1, r1, #2
-	uxth	r2, r2
-.L1371:
-	ldr	r4, [sp, #20]
-	cmp	r2, r4
-	bne	.L1373
-	ldr	r4, [sp, #0]
-	cbnz	r6, .L1374
-	ldr	r1, .L1405+16
-	movw	r2, #2865
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1374:
-	ldr	r3, .L1405+40
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1375
-	ldr	r3, .L1405+68
-	cmp	r4, r3
-	bne	.L1375
-	ldr	r3, .L1405+72
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r5, lsl #1]
-	cmp	r3, #30
-	bls	.L1375
-	movs	r3, #0
-	strb	r3, [r4, #8]
-.L1375:
-	ldr	r3, .L1405+76
-	ldrh	r3, [r3, #0]
-	cmp	r3, r5
-	bne	.L1376
-	ldr	r1, .L1405+16
-	movw	r2, #2872
-	ldr	r0, .L1405+20
-	bl	printf
-	ldr	r0, .L1405+24
-	ldr	r1, .L1405+28
-	bl	printf
-.L1376:
-	ldr	r3, .L1405+72
-	ldrb	r2, [r4, #8]	@ zero_extendqisi2
-	ldr	r3, [r3, #0]
-	cbnz	r2, .L1377
-	ldrh	r2, [r3, r5, lsl #1]
-	cbz	r2, .L1378
-	ldr	r1, .L1405+80
-	ldrh	r1, [r1, #0]
-	adds	r2, r2, r1
-	b	.L1402
-.L1378:
-	movs	r2, #2
-.L1402:
-	strh	r2, [r3, r5, lsl #1]	@ movhi
+	bhi	.L1406
+	mov	r3, #-1
+	str	r3, [r4]
+.L1407:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1405
+.L1406:
+	ldr	r2, .L1433+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #12]
 	mov	r0, r5
-	ldr	r3, .L1405+84
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r3, [r4, #12]
+	mov	r2, r10
 	movs	r1, #0
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	b	.L1403
-.L1377:
-	ldrh	r2, [r3, r5, lsl #1]
 	mov	r0, r5
-	movs	r1, #1
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1405+88
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-.L1403:
-	bl	ftl_set_blk_mode
-	ldr	r3, .L1405+72
-	lsl	fp, r5, #1
-	str	fp, [sp, #20]
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1405+92
-	ldr	r1, [r3, #0]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3, #0]
-	ldr	r3, .L1405+80
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1405+84
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1405+88
-	ldr	r3, [r3, #0]
-	mla	r0, r0, r2, r3
-	ldr	r3, .L1405+12
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1405+96
-	str	r0, [r3, #0]
-	ldr	r3, .L1405+100
-	ldr	r3, [r3, #0]
-	ldr	r2, [r3, #16]
-	adds	r2, r2, #1
-	str	r2, [r3, #16]
-	ldr	r3, [r8, #0]
-	movs	r2, #0
-	b	.L1382
-.L1406:
-	.align	2
-.L1405:
-	.word	.LANCHOR82
-	.word	.LANCHOR94
-	.word	.LANCHOR91
-	.word	.LANCHOR43
-	.word	.LANCHOR210
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR99
-	.word	.LANCHOR169
-	.word	.LANCHOR116
-	.word	.LANCHOR167
-	.word	.LANCHOR47
-	.word	.LANCHOR7
-	.word	.LANCHOR93
-	.word	.LANCHOR89
-	.word	.LANCHOR41
-	.word	.LANCHOR97
-	.word	.LANCHOR84
-	.word	.LANCHOR202
-	.word	.LANCHOR51
-	.word	.LANCHOR164
-	.word	.LANCHOR165
-	.word	.LANCHOR166
-	.word	.LANCHOR211
-	.word	.LANCHOR187
-	.word	.LANCHOR83
-.L1383:
-	adds	r2, r2, #1
-	ldr	r1, [r3, #-32]
-	uxth	r2, r2
-	bic	r1, r1, #1020
-	bic	r1, r1, #3
-	str	r1, [r3, #-32]
-.L1382:
-	adds	r3, r3, #36
-	cmp	r2, r6
-	bne	.L1383
-	ldr	r3, .L1407
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1384
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	ldr	r0, [r8, #0]
-	cmp	r3, #1
-	bne	.L1385
+	str	r3, [sp]
+	ldr	r3, [r4, #8]
+	bl	NandcXferData
+	ldr	r3, .L1433+12
+	mov	r6, r0
+	ldr	r1, [sp, #12]
+	mov	r0, r5
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashReadCmd
+	ldr	r3, [r4, #8]
+	cbz	r3, .L1408
+	add	r3, r3, #2048
+.L1408:
+	ldr	r2, [r4, #12]
+	cbz	r2, .L1409
+	adds	r2, r2, #8
+.L1409:
+	str	r2, [sp]
 	movs	r1, #0
-	b	.L1404
-.L1385:
-	movs	r1, #1
-.L1404:
-	mov	r2, r6
-	bl	FlashEraseBlocks
-.L1384:
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	mov	r2, r6
-	mov	fp, #0
-	ldr	r0, [r8, #0]
-	bl	FlashEraseBlocks
-	mov	ip, r5
-	mov	r3, r6
-	mov	r5, fp
-	mov	r6, r4
-	mov	r4, fp
-	b	.L1386
-.L1388:
-	ldr	r1, [r8, #0]
-	add	r0, r1, fp
-	ldr	r1, [r1, fp]
-	adds	r2, r1, #1
-	bne	.L1387
-	ldr	r0, [r0, #4]
-	adds	r5, r5, #1
-	str	r1, [sp, #16]
-	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #8]
-	str	ip, [sp, #12]
-	bl	FtlBbmMapBadBlock
-	ldr	r1, [sp, #16]
-	strh	r1, [sl, #16]	@ movhi
-	ldrb	r1, [r6, #7]	@ zero_extendqisi2
-	subs	r1, r1, #1
-	strb	r1, [r6, #7]
-	ldr	ip, [sp, #12]
-	ldr	r3, [sp, #8]
-.L1387:
-	adds	r4, r4, #1
-	add	fp, fp, #36
-	add	sl, sl, #2
-	uxth	r4, r4
-.L1386:
-	cmp	r4, r3
-	bne	.L1388
-	mov	r3, r5
-	mov	r4, r6
-	mov	r5, ip
-	cbz	r3, .L1389
-	mov	r0, ip
-	bl	update_multiplier_value
-	bl	FtlBbmTblFlush
-.L1389:
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1390
-	ldr	r3, .L1407+4
-	movw	r2, #65535
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1401
-.L1390:
-	ldr	r2, .L1407+8
-	ldr	fp, [sp, #20]
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	uxth	r3, r3
-	ldr	r2, .L1407+12
-	strh	r5, [r4, #0]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	ldr	r1, [r2, #0]
-	str	r1, [r4, #12]
-	adds	r1, r1, #1
-	str	r1, [r2, #0]
-	ldr	r2, .L1407+4
-	ldr	r2, [r2, #0]
-	strh	r3, [r2, fp]	@ movhi
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1391
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1361
-.L1391:
-	ldr	r1, .L1407+16
-	movw	r2, #2931
-	ldr	r0, .L1407+20
-	bl	printf
-	ldr	r0, .L1407+24
-	ldr	r1, .L1407+28
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	mov	r1, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, .L1433+16
+	cmp	r6, r1
+	it	cc
+	movcc	r6, r1
+	ldrb	r2, [r3]	@ zero_extendqisi2
+	add	r3, r2, r2, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1410
+	adds	r5, r6, #1
+	it	ne
+	movne	r6, #256
+	str	r6, [r4]
+.L1413:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1414
+	ldr	r1, [r3, #8]
+	adds	r0, r1, #1
+	bne	.L1414
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	it	ne
+	strne	r1, [r4]
+.L1414:
+	ldr	r3, [r4]
+	adds	r1, r3, #1
+	bne	.L1407
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1433+20
 	bl	printf
-.L1361:
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1408:
+	ldr	r1, [r4, #8]
+	cbz	r1, .L1416
+	movs	r3, #8
+	movs	r2, #4
+	ldr	r0, .L1433+24
+	bl	rknand_print_hex
+.L1416:
+	ldr	r1, [r4, #12]
+	cmp	r1, #0
+	beq	.L1407
+	movs	r3, #4
+	ldr	r0, .L1433+28
+	mov	r2, r3
+	bl	rknand_print_hex
+	b	.L1407
+.L1410:
+	movs	r3, #0
+	str	r3, [r4]
+	b	.L1413
+.L1434:
 	.align	2
-.L1407:
-	.word	.LANCHOR7
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR156
-	.word	.LANCHOR210
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	allocate_data_superblock, .-allocate_data_superblock
-	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+.L1433:
+	.word	.LANCHOR29
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR3
+	.word	.LANCHOR31
+	.word	.LC20
+	.word	.LC21
+	.word	.LC22
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",%progbits
 	.align	1
-	.global	FtlSuperblockPowerLostFix
+	.global	FlashReadPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlSuperblockPowerLostFix, %function
-FtlSuperblockPowerLostFix:
-	@ args = 0, pretend = 0, frame = 40
+	.fpu softvfp
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1418
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrb	r6, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1526
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
 	sub	sp, sp, #40
-	cbz	r6, .L1417
-	ldrb	r6, [r0, #8]	@ zero_extendqisi2
-	cmp	r6, #1
-	bne	.L1416
-	ldrh	r5, [r0, #4]
-	b	.L1410
-.L1416:
-	movs	r6, #0
-.L1417:
-	movs	r5, #12
-.L1410:
-	mov	r7, #-1
-	ldr	sl, .L1418+12
-	ldr	fp, .L1418+16
-	ldr	r8, .L1418+20
-	b	.L1411
-.L1414:
-	ldrh	r3, [r4, #4]
-	cbz	r3, .L1412
-	mov	r0, r4
-	bl	get_new_active_ppa
-	str	r0, [sp, #8]
-	adds	r0, r0, #1
-	beq	.L1412
-	ldr	r3, [sl, #0]
-	add	r0, sp, #4
-	ldr	r2, [fp, #0]
-	subs	r5, r5, #1
-	ldr	r1, [r8, #0]
-	str	r3, [sp, #12]
-	ldrh	r3, [r4, #0]
-	str	r2, [sp, #16]
-	str	r7, [sp, #20]
-	strh	r3, [r2, #2]	@ movhi
-	movs	r3, #0
-	str	r1, [r2, #4]
-	strh	r3, [r2, #0]	@ movhi
-	str	r7, [r2, #8]
-	str	r7, [r2, #12]
-	adds	r2, r1, #1
-	cmp	r2, #-1
-	it	eq
-	moveq	r2, r3
-	movs	r1, #1
-	str	r2, [r8, #0]
-	mov	r2, r6
-	bl	FlashProgPages
-	ldrh	r0, [r4, #0]
-	bl	decrement_vpc_count
-.L1411:
-	cmp	r5, #0
-	bne	.L1414
-.L1412:
-	ldr	r3, .L1418+4
-	ldrh	r2, [r4, #0]
-	ldrh	r1, [r4, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1418+8
-	ldrh	r3, [r3, #0]
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #6]
-	strh	r3, [r4, #4]	@ movhi
-	add	sp, sp, #40
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1419:
-	.align	2
-.L1418:
-	.word	.LANCHOR7
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR157
-	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
-	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
-	.align	1
-	.global	FtlLowFormatEraseBlock
-	.thumb
-	.thumb_func
-	.type	FtlLowFormatEraseBlock, %function
-FtlLowFormatEraseBlock:
-	@ args = 0, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1451
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldr	r6, [r3, #0]
-	mov	r8, r1
-	str	r0, [sp, #12]
-	cmp	r6, #0
-	bne	.L1444
-	ldr	r3, .L1451+4
-	mov	r5, r6
-	mov	r4, r6
-	ldr	sl, .L1451+28
-	movs	r7, #36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	mov	r10, r0
+	str	r1, [sp, #24]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	cbnz	r3, .L1436
+	ldr	r2, .L1526+4
+	mov	r8, r3
 	str	r3, [sp, #8]
-	ldr	r3, .L1451+8
-	str	r0, [r3, #0]
-	b	.L1422
-.L1426:
-	mul	r3, r7, r6
-	ldr	r1, .L1451+12
-	ldr	fp, [sl, #0]
+	ldrb	r2, [r2, #9]	@ zero_extendqisi2
+	str	r2, [sp, #20]
+	ldr	r2, .L1526+8
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	str	r2, [sp, #28]
+.L1437:
+	ldr	r3, [sp, #8]
+	ldr	r2, [sp, #24]
+	cmp	r3, r2
+	bcc	.L1475
 	movs	r0, #0
-	str	r0, [fp, r3]
-	ldrb	r0, [r1, r6]	@ zero_extendqisi2
-	ldr	r1, [sp, #12]
-	bl	V2P_block
-	str	r0, [sp, #4]
-	cmp	r8, #0
-	beq	.L1423
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L1424
-.L1423:
-	ldr	r0, [sp, #4]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1425
-	mul	r3, r7, r5
-	ldr	r2, [sl, #0]
-	ldr	ip, [sp, #4]
-	adds	r2, r2, r3
-	add	r3, fp, r3
-	lsl	r1, ip, #10
-	str	r0, [r3, #8]
-	ldr	r0, .L1451+16
-	str	r1, [r2, #4]
-	ldrh	r2, [r0, #0]
-	muls	r2, r5, r2
-	ldr	r0, .L1451+20
-	adds	r5, r5, #1
-	bic	r2, r2, #3
-	uxth	r5, r5
-	ldr	r1, [r0, #0]
-	adds	r2, r1, r2
-	str	r2, [r3, #12]
-	b	.L1424
-.L1425:
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L1424:
-	adds	r6, r6, #1
-	uxth	r6, r6
-.L1422:
-	ldr	r1, .L1451+24
-	ldrh	r3, [r1, #0]
-	cmp	r3, r6
-	bhi	.L1426
-	cmp	r5, #0
-	beq	.L1421
-	ldr	r2, [sp, #8]
-	mov	sl, #0
-	ldr	r7, .L1451+28
-	mov	fp, sl
-	adds	r6, r2, #0
-	mov	r2, r5
-	it	ne
-	movne	r6, #1
-	ldr	r0, [r7, #0]
-	mov	r1, r6
-	bl	FlashEraseBlocks
-.L1430:
-	ldr	r3, [r7, #0]
-	add	r2, r3, sl
-	ldr	r3, [r3, sl]
-	adds	r3, r3, #1
-	bne	.L1429
-	ldr	r0, [r2, #4]
-	adds	r4, r4, #1
-	ubfx	r0, r0, #10, #16
-	uxth	r4, r4
-	bl	FtlBbmMapBadBlock
-.L1429:
-	add	fp, fp, #1
-	add	sl, sl, #36
-	uxth	fp, fp
-	cmp	fp, r5
-	bne	.L1430
-	cmp	r8, #0
-	beq	.L1445
-	ldr	r3, .L1451+32
-	ldrh	r3, [r3, #0]
-	str	r3, [sp, #4]
-	ldr	r3, .L1451+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1446
-	ldr	ip, [sp, #4]
-	movs	r6, #1
-	lsr	ip, ip, #2
-	str	ip, [sp, #8]
-	b	.L1431
-.L1445:
-	mov	ip, #6
-	str	ip, [sp, #8]
-	mov	ip, #1
-	str	ip, [sp, #4]
-	b	.L1431
-.L1446:
-	movs	r6, #1
-	str	r6, [sp, #8]
-.L1431:
-	ldr	sl, .L1451+28
-	movs	r7, #0
-.L1439:
-	mov	fp, #0
-	mov	r5, fp
-	b	.L1432
+	b	.L1435
+.L1436:
+	bl	FlashReadSlc2KPages
 .L1435:
-	mov	ip, #36
-	ldr	r2, [sl, #0]
-	ldr	r1, .L1451+12
-	movs	r0, #0
-	mul	r3, ip, fp
-	str	r2, [sp, #16]
-	str	r0, [r2, r3]
-	ldrb	r0, [r1, fp]	@ zero_extendqisi2
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1475:
+	ldr	r2, [sp, #8]
+	movs	r3, #36
 	ldr	r1, [sp, #12]
-	bl	V2P_block
-	str	r0, [sp, #20]
-	cmp	r8, #0
-	beq	.L1433
-	bl	IsBlkInVendorPart
-	cbnz	r0, .L1434
-.L1433:
-	ldr	r0, [sp, #20]
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1434
-	ldr	r2, [sp, #16]
-	mov	ip, #36
-	ldr	r1, [sp, #20]
-	ldr	r0, .L1451+36
-	mla	r3, ip, r5, r2
-	add	r2, r7, r1, lsl #10
-	ldr	r1, .L1451+16
-	str	r2, [r3, #4]
-	ldr	r2, [r0, #0]
-	ldr	r0, .L1451+40
-	str	r2, [r3, #8]
-	ldrh	r2, [r1, #0]
-	muls	r2, r5, r2
-	adds	r5, r5, #1
-	ldr	r1, [r0, #0]
-	bic	r2, r2, #3
-	uxth	r5, r5
-	adds	r2, r1, r2
-	str	r2, [r3, #12]
-.L1434:
-	add	fp, fp, #1
-	uxth	fp, fp
-.L1432:
-	ldr	r1, .L1451+24
-	ldrh	r3, [r1, #0]
-	cmp	r3, fp
-	bhi	.L1435
-	cmp	r5, #0
-	beq	.L1421
-	mov	r1, r5
-	mov	r2, r6
-	ldr	r0, [sl, #0]
-	movs	r3, #1
-	mov	fp, #0
-	bl	FlashProgPages
-	mov	ip, r8
-	mov	r8, r7
-	mov	r7, r6
-	mov	r6, r5
-	mov	r5, fp
-.L1438:
-	ldr	r2, [sl, #0]
-	add	r1, r2, fp
-	ldr	r2, [r2, fp]
-	cbz	r2, .L1437
-	ldr	r0, [r1, #4]
-	adds	r4, r4, #1
-	str	ip, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	uxth	r4, r4
-	bl	FtlBbmMapBadBlock
-	ldr	ip, [sp, #0]
-.L1437:
-	adds	r5, r5, #1
-	add	fp, fp, #36
-	uxth	r5, r5
-	cmp	r5, r6
-	bne	.L1438
-	mov	r5, r6
-	mov	r6, r7
-	mov	r7, r8
-	mov	r8, ip
-	ldr	ip, [sp, #8]
-	add	r7, r7, ip
-	ldr	ip, [sp, #4]
-	uxth	r7, r7
-	cmp	r7, ip
-	bcc	.L1439
-	movs	r7, #0
-	ldr	fp, .L1451+28
-	mov	sl, r7
-.L1441:
-	cmp	r8, #0
-	beq	.L1440
-	ldr	r3, [fp, #0]
-	adds	r2, r3, r7
-	ldr	r3, [r3, r7]
-	cbnz	r3, .L1440
-	ldr	r0, [r2, #4]
-	movs	r1, #1
-	ubfx	r0, r0, #10, #16
-	bl	FtlFreeSysBlkQueueIn
+	mul	fp, r3, r2
+	add	r7, r10, fp
+	ldr	r3, [r7, #4]
+	mov	r0, r7
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #24]
+	subs	r3, r3, r2
+	add	r2, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1526+12
+	mov	r5, r0
+	ldr	r3, [sp, #32]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1439
+	mov	r3, #-1
+	str	r3, [r10, fp]
 .L1440:
-	add	sl, sl, #1
-	adds	r7, r7, #36
-	uxth	sl, sl
-	cmp	sl, r5
-	bne	.L1441
-	ldr	r0, [sp, #12]
-	cmp	r0, #63
-	bls	.L1442
-	cmp	r8, #0
-	beq	.L1421
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	str	r3, [sp, #8]
+	b	.L1437
+.L1439:
+	ldr	r2, .L1526+16
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1526+20
+	mov	r0, r4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r5, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1526+24
+	ldr	r3, [r3]
+	ldrb	r1, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r1, #1
+	cmp	r3, #6
+	bhi	.L1442
+	ldr	r3, .L1526+28
+	cmp	r1, #7
+	add	r2, r3, r4
+	ldrb	r3, [r2, #12]	@ zero_extendqisi2
+	it	eq
+	ldrbeq	r3, [r2, #20]	@ zero_extendqisi2
+	ldr	r2, .L1526+32
+	ldrb	r2, [r2, r4]	@ zero_extendqisi2
+	cmp	r2, r3
+	beq	.L1442
+	ldr	r2, .L1526+36
+	mov	r0, r4
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
 .L1442:
-	ldr	r3, .L1451+28
-	mov	r1, r6
-	mov	r2, r5
-	ldr	r0, [r3, #0]
-	bl	FlashEraseBlocks
-	b	.L1421
+	mov	r0, r4
+	bl	NandcFlashCs
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1444
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1445
 .L1444:
-	movs	r4, #0
-.L1421:
+	ldr	r3, .L1526+40
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1445
 	mov	r0, r4
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	bl	flash_enter_slc_mode
 .L1452:
-	.align	2
-.L1451:
-	.word	.LANCHOR82
-	.word	.LANCHOR7
-	.word	.LANCHOR77
-	.word	.LANCHOR50
-	.word	.LANCHOR62
-	.word	.LANCHOR185
-	.word	.LANCHOR41
-	.word	.LANCHOR83
-	.word	.LANCHOR57
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
-	.section	.text.FlashTestBlk,"ax",%progbits
-	.align	1
-	.global	FlashTestBlk
-	.thumb
-	.thumb_func
-	.type	FlashTestBlk, %function
-FlashTestBlk:
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1458
-	push	{r4, r5, lr}
-	mov	r4, r0
-	ldr	r3, [r3, #0]
-	sub	sp, sp, #108
-	cmp	r0, r3
-	bcc	.L1456
-.L1455:
-	ldr	r5, .L1458+4
-	add	r0, sp, #4
-	movs	r1, #165
-	movs	r2, #32
-	str	r0, [sp, #80]
-	lsls	r4, r4, #10
-	ldr	r3, [r5, #0]
-	str	r3, [sp, #76]
-	bl	memset
-	movs	r1, #90
-	movs	r2, #8
-	ldr	r0, [r5, #0]
-	bl	memset
-	movs	r1, #1
-	mov	r2, r1
-	add	r0, sp, #68
-	str	r4, [sp, #72]
-	bl	FlashEraseBlocks
-	movs	r1, #1
-	add	r0, sp, #68
-	mov	r2, r1
-	mov	r3, r1
-	bl	FlashProgPages
-	ldr	r4, [sp, #68]
-	add	r0, sp, #68
-	movs	r1, #0
-	movs	r2, #1
-	cmp	r4, #0
-	ite	ne
-	movne	r4, #-1
-	moveq	r4, #0
-	bl	FlashEraseBlocks
-	b	.L1454
-.L1456:
-	movs	r4, #0
-.L1454:
+	ldr	r1, [sp, #36]
+	adds	r6, r1, #1
+	bne	.L1447
+	cmp	r4, #255
+	beq	.L1477
+.L1447:
+	cbz	r5, .L1449
+	ldr	r3, .L1526+44
 	mov	r0, r4
-	add	sp, sp, #108
-	pop	{r4, r5, pc}
-.L1459:
-	.align	2
+	ldr	r2, [r3]
+	add	r2, r2, r1
+	bl	FlashReadDpCmd
+.L1450:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	cbz	r5, .L1448
+	ldr	r1, [sp, #36]
+	mov	r0, r4
+	bl	FlashReadDpDataOutCmd
+.L1448:
+	ldr	r3, [r7, #12]
+	movs	r1, #0
+	ldr	r2, [sp, #20]
+	mov	r0, r4
+	str	r3, [sp]
+	ldr	r3, [r7, #8]
+	bl	NandcXferData
+	ldr	r3, .L1526+8
+	mov	r6, r0
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1451
+	adds	r0, r0, #1
+	bne	.L1451
+	ldr	r3, .L1526+8
+	movs	r5, #0
+	strb	r5, [r3]
+	b	.L1452
+.L1445:
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+	b	.L1452
+.L1449:
+	mov	r0, r4
+	bl	FlashReadCmd
+	b	.L1450
+.L1477:
+	movs	r5, #0
+	b	.L1448
+.L1451:
+	cbz	r5, .L1453
+	ldr	r3, .L1526+44
+	mov	r0, r4
+	ldr	r1, [sp, #36]
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashReadDpDataOutCmd
+	add	r3, fp, #36
+	movs	r1, #0
+	add	r3, r3, r10
+	mov	r0, r4
+	ldr	r2, [r3, #12]
+	str	r2, [sp]
+	ldr	r2, [sp, #20]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+	cmp	r0, #-1
+	mov	r8, r0
+	it	eq
+	moveq	r5, #0
+.L1453:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	ldr	r3, .L1526+8
+	adds	r1, r6, #1
+	ldrb	r2, [sp, #28]	@ zero_extendqisi2
+	strb	r2, [r3]
+	bne	.L1454
+	ldr	r3, .L1526+48
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1455
+.L1459:
+	ldr	r3, .L1526+52
+	ldr	r5, [r3]
+	cmp	r5, #0
+	bne	.L1456
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	b	.L1525
+.L1455:
+	ldr	r3, .L1526+56
+	mov	r0, r4
+	ldr	r1, [sp, #36]
+	ldr	r3, [r3]
+	ldr	r5, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp]
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashDdrTunningRead
+	adds	r2, r0, #1
+	mov	r6, r0
+	beq	.L1458
+	ldr	r3, .L1526+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r0, r3, lsr #1
+	bls	.L1478
 .L1458:
-	.word	.LANCHOR148
-	.word	.LANCHOR143
-	.size	FlashTestBlk, .-FlashTestBlk
-	.section	.text.ftl_map_blk_gc,"ax",%progbits
-	.align	1
-	.global	ftl_map_blk_gc
-	.thumb
-	.thumb_func
-	.type	ftl_map_blk_gc, %function
-ftl_map_blk_gc:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #12]
-	ldr	fp, [r0, #24]
-	bl	ftl_free_no_use_map_blk
-	ldrh	r7, [r4, #10]
-	ldrh	r2, [r4, #8]
-	subs	r3, r7, #4
-	cmp	r2, r3
-	bge	.L1461
-	ldrh	r2, [r4, #40]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1462
-	ldr	r3, .L1475
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1462
-.L1461:
-	ldrh	r1, [r4, #40]
-	movw	r3, #65535
-	uxth	r6, r0
-	cmp	r1, r3
-	beq	.L1463
-	ldr	r2, .L1475
-	ldrh	r3, [r4, #2]
-	ldrh	r2, [r2, #0]
-	cmp	r2, r3
-	bhi	.L1463
-	mov	r0, r5
-	movs	r2, #0
-	b	.L1464
-.L1466:
-	ldrh	lr, [r0], #2
-	cmp	lr, r1
-	beq	.L1474
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L1464:
-	cmp	r2, r7
-	bne	.L1466
-	b	.L1465
-.L1474:
-	mov	r6, r2
-.L1465:
-	ldr	r0, .L1475+4
-	ldrh	r2, [r5, r2, lsl #1]
-	bl	printf
-	movw	r3, #65535
-	strh	r3, [r4, #40]	@ movhi
-.L1463:
-	ldrh	r7, [r5, r6, lsl #1]
-	lsls	r2, r6, #1
-	cmp	r7, #0
-	beq	.L1462
-	ldr	r3, [r4, #32]
+	ubfx	r0, r5, #8, #8
+	bl	NandcSetDdrPara
+	adds	r3, r6, #1
+	beq	.L1459
+.L1478:
+	movs	r5, #0
+.L1454:
+	ldr	r3, .L1526+60
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r6, r3, asr #2
+	bls	.L1467
+	ldr	r3, .L1526+52
+	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L1462
-	movs	r1, #1
-	str	r1, [r4, #32]
-	strh	r3, [r5, r2]	@ movhi
-	ldrh	r3, [r4, #8]
-	ldrh	r2, [r4, #2]
+	bne	.L1467
+	mov	r6, #256
+	b	.L1462
+.L1527:
+	.align	2
+.L1526:
+	.word	.LANCHOR1
+	.word	.LANCHOR29
+	.word	.LANCHOR5
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LANCHOR198
+	.word	.LANCHOR18
+	.word	.LANCHOR20
+	.word	.LANCHOR21
+	.word	.LANCHOR20+4
+	.word	.LANCHOR8
+	.word	.LANCHOR3
+	.word	.LANCHOR28
+	.word	.LANCHOR149
+	.word	.LANCHOR19
+	.word	.LANCHOR31
+.L1456:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	blx	r5
+	adds	r5, r0, #1
+	mov	r6, r0
+	bne	.L1460
+	ldr	r3, .L1528
+	ldr	r3, [r3]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1475
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1467
+	cmp	r3, #6
+	bhi	.L1461
+	ldr	r2, .L1528+4
+	movs	r3, #0
 	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L1467:
-	movs	r5, #0
-	ldr	r6, .L1475+8
-	ldr	sl, .L1475+40
-	b	.L1468
-.L1472:
-	lsls	r3, r5, #2
-	str	r3, [sp, #4]
-	ldr	r3, [fp, r5, lsl #2]
-	cmp	r7, r3, lsr #10
-	bne	.L1469
-	ldr	r2, [sl, #0]
-	movs	r1, #1
-	str	r3, [r6, #4]
-	ldr	r0, .L1475+8
-	str	r2, [r6, #8]
-	ldr	r2, .L1475+12
-	ldr	r8, [r2, #0]
-	mov	r2, r1
-	str	r8, [r6, #12]
-	bl	FlashReadPages
-	ldrh	r3, [r8, #8]
-	cmp	r3, r5
-	beq	.L1470
-	ldr	r1, .L1475+16
-	movw	r2, #638
-	ldr	r0, .L1475+20
+	ldrb	r1, [r2, #-3]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1461:
+	ldr	r3, [r7, #12]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	bl	FlashReadRawPage
+	ldr	r2, .L1528+8
+	mov	r6, r0
+	mov	r3, r0
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1528+12
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
-	ldr	r0, .L1475+24
-	ldr	r1, .L1475+28
+	adds	r0, r6, #1
+	bne	.L1460
+	ldr	r3, .L1528+16
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1462
+	ldr	r3, [sp, #12]
+	mov	r0, r4
+	cmp	r3, #1
+	beq	.L1463
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1464
+.L1463:
+	bl	flash_enter_slc_mode
+.L1465:
+	ldr	r3, .L1528+20
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r1, [sp, #36]
+	ldr	r5, [r3]
+	ldr	r3, [r7, #12]
+	blx	r5
+.L1525:
+	adds	r1, r0, #1
+	mov	r6, r0
+	mov	r5, #0
+	bne	.L1467
+.L1462:
+	str	r6, [r10, fp]
+.L1468:
+	ldr	r3, [r10, fp]
+	adds	r2, r3, #1
+	bne	.L1470
+	ldr	r2, .L1528+8
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1528+24
+	ldrb	r2, [r2]	@ zero_extendqisi2
 	bl	printf
+	ldr	r1, [r7, #12]
+	cbz	r1, .L1470
+	movs	r3, #4
+	ldr	r0, .L1528+28
+	mov	r2, r3
+	bl	rknand_print_hex
 .L1470:
-	ldr	r3, .L1475+8
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	bne	.L1471
-	ldr	r2, [sp, #4]
-	movs	r3, #0
-	ldr	r0, .L1475+32
-	str	r3, [fp, r2]
-	ldrh	r2, [r8, #8]
-	ldr	r1, [r6, #4]
-	bl	printf
-	ldr	r2, .L1475+36
-	movs	r3, #1
-	str	r3, [r2, #0]
-	b	.L1469
-.L1471:
+	cbz	r5, .L1472
+	ldr	r3, .L1528+8
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r8, r3, asr #2
+	bls	.L1473
+	ldr	r3, .L1528+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	it	eq
+	moveq	r8, #256
+.L1473:
+	cmp	r8, #-1
+	add	r3, fp, #36
+	str	r8, [r10, r3]
+	beq	.L1472
+	cmp	r8, #256
+	itt	ne
+	movne	r2, #0
+	strne	r2, [r10, r3]
+.L1472:
+	ldr	r3, [sp, #8]
+	add	r3, r3, r5
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	beq	.L1474
+	ldr	r3, [sp, #16]
+	cmp	r3, #0
+	bge	.L1440
+.L1474:
+	ldr	r3, .L1528+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1440
 	mov	r0, r4
-	mov	r1, r5
-	ldr	r2, [r6, #8]
-	bl	FtlMapWritePage
-.L1469:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L1468:
-	ldrh	r3, [r4, #6]
-	cmp	r3, r5
-	bhi	.L1472
-	mov	r0, r7
-	movs	r1, #1
-	bl	FtlFreeSysBlkQueueIn
+	bl	flash_exit_slc_mode
+	b	.L1440
+.L1464:
+	bl	flash_exit_slc_mode
+	b	.L1465
+.L1460:
+	movs	r5, #0
+.L1467:
+	cmp	r6, #256
+	beq	.L1462
 	movs	r3, #0
-	str	r3, [r4, #32]
-.L1462:
-	ldr	r3, .L1475
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1473
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L1473:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1476:
+	str	r3, [r10, fp]
+	b	.L1468
+.L1529:
 	.align	2
-.L1475:
-	.word	.LANCHOR57
-	.word	.LC30
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LANCHOR212
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LC31
-	.word	.LANCHOR82
-	.word	.LANCHOR180
-	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
-	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+.L1528:
+	.word	.LANCHOR18
+	.word	.LANCHOR20+4
+	.word	.LANCHOR31
+	.word	.LC23
+	.word	.LANCHOR8
+	.word	.LANCHOR149
+	.word	.LC20
+	.word	.LC22
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
-	.global	Ftl_write_map_blk_to_last_page
+	.global	FlashProgSlc2KPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	Ftl_write_map_blk_to_last_page, %function
-Ftl_write_map_blk_to_last_page:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1484
-	push	{r4, r5, r6, r7, r8, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #64
+	str	r3, [sp, #12]
+	mov	r8, r1
 	mov	r4, r0
-	ldr	r6, [r3, #0]
-	ldr	r5, [r0, #12]
-	ldr	r8, [r0, #24]
-	cmp	r6, #0
-	bne	.L1478
-	ldrh	r3, [r0, #0]
-	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L1479
-	ldrh	r3, [r0, #8]
-	cbz	r3, .L1480
-	ldr	r1, .L1484+4
-	movw	r2, #670
-	ldr	r0, .L1484+8
-	bl	printf
-	ldr	r0, .L1484+12
-	ldr	r1, .L1484+16
-	bl	printf
-.L1480:
-	ldrh	r3, [r4, #8]
+	mov	r6, r0
+	ldr	r3, .L1559
+	movs	r7, #0
+	ldr	fp, .L1559+28
+	str	r2, [sp, #8]
+	ldrb	r10, [r3, #9]	@ zero_extendqisi2
+.L1531:
+	cmp	r7, r8
+	bne	.L1537
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L1548
+.L1558:
+	movs	r0, #0
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1537:
+	sub	r3, r8, r7
+	add	r2, sp, #20
+	uxtb	r3, r3
+	ldr	r1, [sp, #8]
+	mov	r0, r6
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1559+4
+	ldr	r3, [sp, #24]
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cmp	r2, r3
+	bhi	.L1532
+	mov	r3, #-1
+	str	r3, [r6]
+.L1533:
+	adds	r7, r7, #1
+	adds	r6, r6, #36
+	b	.L1531
+.L1532:
+	ldr	r2, .L1559+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #12]
+	mov	r2, r10
+	movs	r1, #1
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	sbfx	r0, r0, #0, #1
+	ldr	r1, [sp, #20]
+	str	r0, [r6]
+	mov	r0, r5
+	ldr	r3, [fp]
+	add	r1, r1, r3
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #8]
+	cbz	r3, .L1534
+	add	r3, r3, #2048
+.L1534:
+	ldr	r2, [r6, #12]
+	cbz	r2, .L1535
+	adds	r2, r2, #8
+.L1535:
+	str	r2, [sp]
+	movs	r1, #1
+	mov	r2, r10
+	mov	r0, r5
+	bl	NandcXferData
+	ldr	r3, [fp]
+	mov	r0, r5
+	ldr	r1, [sp, #20]
+	add	r1, r1, r3
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadStatus
+	lsls	r2, r0, #31
+	mov	r0, r5
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r6]
+	bl	NandcFlashDeCs
+	b	.L1533
+.L1544:
+	ldr	r3, [r4]
 	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
+	bne	.L1539
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+12
+	bl	printf
+.L1540:
+	add	r8, r8, #1
+	adds	r4, r4, #36
+.L1538:
+	cmp	r7, r8
+	bne	.L1544
+	b	.L1558
+.L1539:
+	sub	r3, r7, r8
+	ldr	fp, .L1559+32
+	uxtb	r3, r3
+	add	r2, sp, #20
+	ldr	r1, [sp, #8]
+	mov	r0, r4
+	str	r3, [sp]
+	add	r3, sp, #24
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
 	movs	r3, #0
-	strh	r0, [r5, #0]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	strh	r3, [r4, #0]	@ movhi
-	ldr	r3, [r4, #28]
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	b	.L1478
-.L1479:
-	ldrh	r5, [r5, r3, lsl #1]
-	movs	r1, #255
-	ldr	r2, .L1484+20
-	ldrh	r3, [r0, #2]
-	ldr	r7, .L1484+24
-	orr	r3, r3, r5, lsl #10
-	str	r3, [r2, #4]
-	ldr	r3, .L1484+28
-	ldr	r0, [r7, #0]
-	ldr	r3, [r3, #0]
-	str	r0, [r2, #8]
-	str	r3, [r2, #12]
-	ldr	r2, [r4, #28]
-	str	r2, [r3, #4]
-	movw	r2, #64245
-	strh	r2, [r3, #8]	@ movhi
-	ldrh	r2, [r4, #4]
-	strh	r5, [r3, #2]	@ movhi
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1484+32
-	ldrh	r2, [r3, #0]
-	lsls	r2, r2, #3
-	bl	memset
-	ldrh	r0, [r4, #6]
-	ldr	r1, [r7, #0]
-	mov	r2, r8
-	mov	r3, r6
-	b	.L1481
-.L1483:
-	ldr	r7, [r2], #4
-	cmp	r5, r7, lsr #10
-	bne	.L1482
-	adds	r3, r3, #1
-	uxth	r3, r3
-	str	r6, [r1, r3, lsl #3]
-	add	r7, r1, r3, lsl #3
-	ldr	lr, [r2, #-4]
-	str	lr, [r7, #4]
-.L1482:
-	adds	r6, r6, #1
-.L1481:
-	uxth	r7, r6
-	cmp	r7, r0
-	bcc	.L1483
+	ldr	ip, [fp]
+	mov	r6, r4
+	add	r5, sp, #28
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #36]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #40]
+	stmia	r5!, {r0, r1, r2, r3}
 	movs	r1, #1
-	movs	r3, #0
-	ldr	r0, .L1484+20
-	mov	r2, r1
-	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	mov	r0, r4
-	adds	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-	bl	ftl_map_blk_gc
-.L1478:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1485:
+	ldr	r3, [r6]
+	add	r0, sp, #28
+	ldr	r2, [sp, #8]
+	str	r3, [r5]
+	bl	FlashReadPages
+	ldr	r5, [sp, #28]
+	adds	r3, r5, #1
+	bne	.L1541
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+16
+	bl	printf
+	str	r5, [r4]
+.L1541:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1542
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1542
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+20
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+.L1542:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1540
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1540
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1559+24
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1540
+.L1548:
+	mov	r8, #0
+	ldr	r10, .L1559+36
+	b	.L1538
+.L1560:
 	.align	2
-.L1484:
-	.word	.LANCHOR82
-	.word	.LANCHOR213
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR198
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR57
-	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
-	.section	.text.FtlMapWritePage,"ax",%progbits
+.L1559:
+	.word	.LANCHOR29
+	.word	.LANCHOR25
+	.word	.LANCHOR26
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.word	.LANCHOR3
+	.word	.LANCHOR196
+	.word	.LANCHOR195
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
-	.global	FtlMapWritePage
+	.global	FlashProgPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlMapWritePage, %function
-FtlMapWritePage:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1500
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #72
+	ldr	r5, .L1613
 	mov	r4, r0
-	ldr	r6, [r3, #0]
-	stmia	sp, {r1, r2}
-	cmp	r6, #0
-	bne	.L1487
-	ldr	r8, .L1500+32
-	ldr	sl, .L1500+36
-	ldr	r5, .L1500+4
-	ldr	fp, .L1500+40
-.L1499:
-	ldr	r3, [r8, #0]
-	ldrh	r2, [r4, #2]
-	adds	r3, r3, #1
-	str	r3, [r8, #0]
-	ldrh	r3, [sl, #0]
-	subs	r3, r3, #1
-	cmp	r2, r3
-	bge	.L1489
-	ldrh	r3, [r4, #0]
-	movw	r1, #65535
-	cmp	r3, r1
-	bne	.L1490
-.L1489:
-	mov	r0, r4
-	bl	Ftl_write_map_blk_to_last_page
-.L1490:
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r4, #12]
-	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1491
-	ldr	r1, .L1500+8
-	movw	r2, #731
-	ldr	r0, .L1500+12
-	bl	printf
-	ldr	r0, .L1500+16
-	ldr	r1, .L1500+20
-	bl	printf
-.L1491:
-	ldrh	r2, [r4, #0]
-	ldrh	r3, [r4, #10]
-	cmp	r2, r3
-	bcc	.L1492
-	ldr	r1, .L1500+8
-	mov	r2, #732
-	ldr	r0, .L1500+12
-	bl	printf
-	ldr	r0, .L1500+16
-	ldr	r1, .L1500+20
-	bl	printf
-.L1492:
-	ldrh	r2, [r4, #0]
-	movs	r1, #0
-	ldr	r3, [r4, #12]
-	ldr	r0, [fp, #0]
-	ldrh	r7, [r3, r2, lsl #1]
-	ldr	r2, [sp, #4]
-	ldrh	r3, [r4, #2]
-	str	r0, [r5, #12]
-	str	r2, [r5, #8]
-	movs	r2, #16
-	orr	r3, r3, r7, lsl #10
-	str	r3, [r5, #4]
-	bl	memset
-	ldr	r3, [r5, #12]
-	ldr	r2, [r4, #28]
-	ldr	r1, [sp, #0]
-	ldr	r0, .L1500+4
-	str	r2, [r3, #4]
-	ldrh	r2, [r4, #4]
-	strh	r1, [r3, #8]	@ movhi
-	movs	r1, #1
-	strh	r7, [r3, #2]	@ movhi
-	strh	r2, [r3, #0]	@ movhi
-	mov	r2, r1
-	mov	r3, r1
-	bl	FlashProgPages
-	ldrh	r2, [r4, #2]
-	ldr	r3, [r5, #0]
-	adds	r2, r2, #1
-	adds	r1, r3, #1
-	uxth	r2, r2
-	strh	r2, [r4, #2]	@ movhi
-	bne	.L1493
-	ldr	r0, .L1500+24
-	adds	r6, r6, #1
-	ldr	r1, [r5, #4]
-	bl	printf
-	ldrh	r3, [r4, #2]
-	uxth	r6, r6
-	cmp	r3, #2
-	bhi	.L1494
-	ldrh	r3, [sl, #0]
-	subs	r3, r3, #1
-	strh	r3, [r4, #2]	@ movhi
-.L1494:
-	cmp	r6, #3
-	bls	.L1499
-	ldr	r3, .L1500+4
-	mov	r2, r6
-	ldr	r0, .L1500+28
-	ldr	r1, [r3, #4]
-	bl	printf
-	ldr	r3, .L1500
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L1487
-.L1493:
-	cbz	r3, .L1496
-	strh	r7, [r4, #40]	@ movhi
-.L1496:
-	cmp	r2, #1
-	beq	.L1499
-	cmp	r3, #256
-	beq	.L1499
-	ldr	r3, .L1500+4
-	ldr	r1, [sp, #0]
-	ldr	r2, [r3, #4]
-	ldr	r3, [r4, #24]
-	str	r2, [r3, r1, lsl #2]
-.L1487:
+	mov	r8, r2
+	str	r1, [sp, #8]
+	ldr	r5, [r5]
+	str	r3, [sp, #20]
+	ldrb	r5, [r5, #19]	@ zero_extendqisi2
+	str	r5, [sp, #16]
+	ldr	r5, .L1613+4
+	ldrb	r7, [r5]	@ zero_extendqisi2
+	cbnz	r7, .L1562
+	ldr	r3, .L1613+8
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [sp, #12]
+.L1563:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	bcc	.L1576
+	ldr	r6, .L1613+12
+	movs	r5, #0
+	ldr	r7, .L1613+16
+.L1577:
+	ldrb	r3, [r6]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L1579
+	ldr	r3, [sp, #20]
+	cmp	r3, #0
+	bne	.L1580
+.L1588:
 	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1501:
-	.align	2
-.L1500:
-	.word	.LANCHOR82
-	.word	.LANCHOR198
-	.word	.LANCHOR214
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LC32
-	.word	.LC33
-	.word	.LANCHOR162
-	.word	.LANCHOR57
-	.word	.LANCHOR184
-	.size	FtlMapWritePage, .-FtlMapWritePage
-	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
-	.align	1
-	.global	FtlMapBlkWriteDumpData
-	.thumb
-	.thumb_func
-	.type	FtlMapBlkWriteDumpData, %function
-FtlMapBlkWriteDumpData:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #36]
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldrh	r6, [r0, #6]
-	ldr	r8, [r0, #24]
+	b	.L1561
+.L1562:
+	bl	FlashProgSlc2KPages
+.L1561:
+	add	sp, sp, #72
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1576:
+	ldr	r3, [sp, #8]
+	movs	r6, #36
+	muls	r6, r7, r6
+	add	r2, sp, #28
+	mov	r1, r8
+	subs	r3, r3, r7
+	uxtb	r3, r3
+	add	fp, r4, r6
+	str	r3, [sp]
+	mov	r0, fp
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L1613+12
+	mov	r10, r0
+	ldr	r0, [sp, #32]
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, r0
+	bhi	.L1565
+	mov	r3, #-1
+	str	r3, [r4, r6]
+.L1566:
+	adds	r7, r7, #1
+	b	.L1563
+.L1565:
+	ldr	r3, .L1613+20
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1502
+	ldr	r3, .L1613+24
+	it	eq
+	moveq	r10, #0
+	add	r3, r3, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L1568
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L1568:
+	ldr	r3, [sp, #32]
+	movs	r1, #0
+	ldr	r2, .L1613+24
+	add	r2, r2, r3, lsl #4
+	str	r1, [r2, #12]
+	ldr	r1, [sp, #28]
+	str	fp, [r2, #8]
+	str	r1, [r2, #4]
+	cmp	r10, #0
+	beq	.L1569
+	add	r1, r6, #36
+	add	r1, r1, r4
+	str	r1, [r2, #12]
+.L1569:
+	ldr	r2, .L1613+28
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	ldr	r2, .L1613+24
+	mov	r0, r5
+	strb	r5, [r2, r3]
+	ldr	r3, .L1613+12
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1570
+	bl	NandcWaitFlashReady
+.L1571:
+	ldr	r3, [sp, #16]
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L1572
+	ldr	r3, .L1613+32
+	ldrb	r3, [r3, r5]	@ zero_extendqisi2
+	cbz	r3, .L1572
+	ldr	r1, .L1613+36
 	movs	r3, #0
-	str	r3, [r0, #36]
-	ldr	r3, .L1508
-	ldr	r3, [r3, #0]
+	mov	r0, r5
+	adds	r2, r1, #4
+	ldrb	r1, [r1, #1]	@ zero_extendqisi2
+	bl	HynixSetRRPara
+.L1572:
+	mov	r0, r5
+	bl	NandcFlashCs
+	cmp	r8, #1
+	mov	r0, r5
+	bne	.L1573
+	ldr	r3, .L1613+16
+	ldrb	r3, [r3]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L1502
-	ldr	r3, .L1508+4
-	ldr	r5, .L1508+8
-	ldr	r3, [r3, #0]
-	str	r3, [r5, #8]
-	ldr	r3, .L1508+12
-	ldr	r7, [r3, #0]
-	ldrh	r3, [r0, #2]
-	str	r7, [r5, #12]
-	cbz	r3, .L1504
-	ldr	r2, .L1508+16
-	ldrh	r2, [r2, #0]
-	subs	r2, r2, #1
-	cmp	r3, r2
-	bge	.L1504
-	ldrh	r2, [r0, #0]
-	movw	r1, #65535
-	cmp	r2, r1
-	beq	.L1504
-	ldr	r1, [r0, #12]
-	subs	r3, r3, #1
+	beq	.L1573
+	bl	flash_enter_slc_mode
+.L1574:
+	ldr	r1, [sp, #28]
 	mov	r0, r5
-	ldrh	r2, [r1, r2, lsl #1]
+	bl	FlashProgFirstCmd
+	ldr	r3, [fp, #12]
 	movs	r1, #1
-	orr	r3, r3, r2, lsl #10
-	mov	r2, r1
-	str	r3, [r5, #4]
-	bl	FlashReadPages
-	ldr	r3, [r5, #0]
-	adds	r3, r3, #1
-	beq	.L1504
-	ldr	r3, [r4, #24]
-	ldrh	r1, [r7, #8]
-	ldr	r2, [r3, r1, lsl #2]
-	ldr	r3, [r5, #4]
-	cmp	r2, r3
-	bne	.L1504
-	mov	r0, r4
-	b	.L1507
-.L1504:
-	subs	r6, r6, #1
-	ldr	r5, .L1508+8
-	uxth	r6, r6
-	ldr	r3, [r8, r6, lsl #2]
-	str	r3, [r5, #4]
-	cbz	r3, .L1505
+	ldr	r2, [sp, #12]
+	mov	r0, r5
+	str	r3, [sp]
+	ldr	r3, [fp, #8]
+	bl	NandcXferData
+	cmp	r10, #0
+	beq	.L1575
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgDpFirstCmd
+	ldr	r3, .L1613+40
+	mov	r0, r5
+	ldr	r2, [sp, #32]
+	adds	r6, r6, #36
+	ldr	r1, [sp, #28]
+	add	r6, r6, r4
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	ldr	r3, .L1613+44
+	mov	r0, r5
+	ldr	r1, [sp, #28]
+	ldr	r3, [r3]
+	add	r1, r1, r3
+	bl	FlashProgDpSecondCmd
+	ldr	r3, [r6, #12]
 	movs	r1, #1
+	ldr	r2, [sp, #12]
 	mov	r0, r5
-	mov	r2, r1
-	bl	FlashReadPages
-	b	.L1506
-.L1505:
-	ldr	r3, .L1508+20
-	movs	r1, #255
-	ldr	r0, [r5, #8]
-	ldrh	r2, [r3, #0]
-	bl	memset
-.L1506:
+	str	r3, [sp]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+.L1575:
+	ldr	r1, [sp, #28]
+	mov	r0, r5
+	bl	FlashProgSecondCmd
+	mov	r0, r5
+	add	r7, r7, r10
+	bl	NandcFlashDeCs
+	b	.L1566
+.L1570:
+	bl	NandcFlashCs
+	ldr	r2, [sp, #32]
+	mov	r0, r5
+	ldr	r3, .L1613+40
+	ldr	r1, [sp, #28]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	b	.L1571
+.L1573:
+	bl	flash_exit_slc_mode
+	b	.L1574
+.L1579:
+	uxtb	r0, r5
+	bl	FlashWaitCmdDone
+	cmp	r8, #1
+	bne	.L1578
+	ldrb	r3, [r7]	@ zero_extendqisi2
+	cbz	r3, .L1578
+	ldr	r2, .L1613+24
+	lsls	r3, r5, #4
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L1578:
+	adds	r5, r5, #1
+	b	.L1577
+.L1580:
+	ldr	r10, .L1613+64
+	movs	r7, #0
+.L1581:
+	ldr	r3, [sp, #8]
+	cmp	r7, r3
+	beq	.L1588
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1582
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+48
+	bl	printf
+.L1583:
+	adds	r7, r7, #1
+	adds	r4, r4, #36
+	b	.L1581
+.L1582:
+	ldr	r3, [sp, #8]
+	add	r2, sp, #28
+	ldr	fp, .L1613+68
+	mov	r1, r8
 	mov	r0, r4
-	mov	r1, r6
-.L1507:
-	ldr	r2, [r5, #8]
-	pop	{r4, r5, r6, r7, r8, lr}
-	b	FtlMapWritePage
-.L1502:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1509:
-	.align	2
-.L1508:
-	.word	.LANCHOR82
-	.word	.LANCHOR180
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LANCHOR57
-	.word	.LANCHOR61
-	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
-	.section	.text.FtlVendorPartRead,"ax",%progbits
-	.align	1
-	.global	FtlVendorPartRead
-	.thumb
-	.thumb_func
-	.type	FtlVendorPartRead, %function
-FtlVendorPartRead:
-	@ args = 0, pretend = 0, frame = 56
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1521
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r2
-	ldrh	r6, [r3, #0]
-	adds	r2, r1, r0
-	ldr	r3, .L1521+4
-	sub	sp, sp, #56
-	mov	r7, r0
-	mov	r5, r1
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bhi	.L1519
-	lsr	r6, r0, r6
-	ldr	r8, .L1521+28
-	lsls	r3, r6, #2
-	str	r3, [sp, #8]
+	mov	r6, r4
+	subs	r3, r3, r7
+	add	r5, sp, #36
+	uxtb	r3, r3
+	str	r3, [sp]
+	add	r3, sp, #32
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r10]
 	movs	r3, #0
-	str	r3, [sp, #4]
-	b	.L1512
-.L1518:
-	ldr	r2, .L1521+8
-	mov	r0, r7
-	ldr	r3, [r2, #0]
-	ldr	r2, [sp, #8]
-	ldr	sl, [r3, r2]
-	ldr	r3, .L1521+12
-	ldrh	r4, [r3, #0]
-	mov	r1, r4
-	bl	__aeabi_uidivmod
-	uxth	r1, r1
-	str	r1, [sp, #12]
-	subs	r4, r4, r1
-	uxth	r4, r4
-	cmp	r4, r5
-	it	hi
-	uxthhi	r4, r5
-	cmp	sl, #0
-	beq	.L1514
-	ldr	r3, [r8, #0]
+	ldr	ip, [fp]
+	str	r3, [lr]
+	str	r3, [ip]
+	ldmia	r6!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	str	lr, [sp, #44]
+	ldmia	r6!, {r0, r1, r2, r3}
+	str	ip, [sp, #48]
+	stmia	r5!, {r0, r1, r2, r3}
+	mov	r2, r8
+	ldr	r3, [r6]
 	movs	r1, #1
-	mov	r2, r1
-	add	r0, sp, #20
-	str	sl, [sp, #24]
-	str	r3, [sp, #28]
-	movs	r3, #0
-	str	r3, [sp, #32]
+	add	r0, sp, #36
+	str	r3, [r5]
 	bl	FlashReadPages
-	ldr	r3, [sp, #20]
-	ldr	r2, [sp, #4]
-	cmp	r3, #-1
-	it	eq
-	moveq	r2, #-1
-	str	r2, [sp, #4]
-	ldr	r2, .L1521+16
-	ldr	r3, [r2, #0]
-	cmp	r3, #256
-	bne	.L1516
-	mov	r1, r6
-	mov	r2, sl
-	ldr	r0, .L1521+20
+	ldr	r5, [sp, #36]
+	adds	r3, r5, #1
+	bne	.L1584
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+52
+	bl	printf
+	str	r5, [r4]
+.L1584:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L1585
+	ldr	r2, [r3]
+	ldr	r3, [fp]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	beq	.L1585
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+56
 	bl	printf
-	ldr	r0, .L1521+24
-	mov	r1, r6
-	ldr	r2, [r8, #0]
-	bl	FtlMapWritePage
-.L1516:
-	ldr	r3, [sp, #12]
-	mov	r0, fp
-	ldr	r1, [r8, #0]
-	lsls	r2, r4, #9
-	add	r1, r1, r3, lsl #9
-	bl	memcpy
-	b	.L1517
-.L1514:
-	mov	r0, fp
-	mov	r1, sl
-	lsls	r2, r4, #9
-	bl	memset
-.L1517:
-	ldr	r3, [sp, #8]
-	adds	r6, r6, #1
-	subs	r5, r5, r4
-	adds	r7, r7, r4
-	add	fp, fp, r4, lsl #9
-	adds	r3, r3, #4
-	str	r3, [sp, #8]
-.L1512:
-	cmp	r5, #0
-	bne	.L1518
-	b	.L1511
-.L1519:
 	mov	r3, #-1
-	str	r3, [sp, #4]
-.L1511:
-	ldr	r0, [sp, #4]
-	add	sp, sp, #56
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1522:
-	.align	2
-.L1521:
-	.word	.LANCHOR60
-	.word	.LANCHOR53
-	.word	.LANCHOR190
-	.word	.LANCHOR59
-	.word	.LANCHOR198
-	.word	.LC34
-	.word	.LANCHOR215
-	.word	.LANCHOR181
-	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.section	.text.Ftl_load_ext_data,"ax",%progbits
-	.align	1
-	.global	Ftl_load_ext_data
-	.thumb
-	.thumb_func
-	.type	Ftl_load_ext_data, %function
-Ftl_load_ext_data:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #0
-	ldr	r4, .L1527
-	movs	r1, #1
-	ldr	r5, .L1527+4
-	mov	r2, r4
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	cmp	r3, r5
-	beq	.L1524
-	mov	r0, r4
-	movs	r1, #0
-	mov	r2, #512
-	bl	memset
-	str	r5, [r4, #0]
-.L1524:
-	ldr	r2, [r4, #0]
-	ldr	r3, .L1527
-	cmp	r2, r5
-	bne	.L1525
-	ldr	r1, [r3, #88]
-	ldr	r2, .L1527+8
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #92]
-	ldr	r2, .L1527+12
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #8]
-	ldr	r2, .L1527+16
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #12]
-	ldr	r2, .L1527+20
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #16]
-	ldr	r2, .L1527+24
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #20]
-	ldr	r2, .L1527+28
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #28]
-	ldr	r2, .L1527+32
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #32]
-	ldr	r2, .L1527+36
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #36]
-	ldr	r2, .L1527+40
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #40]
-	ldr	r2, .L1527+44
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #44]
-	ldr	r2, .L1527+48
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #48]
-	ldr	r2, .L1527+52
-	str	r1, [r2, #0]
-	ldr	r2, [r3, #60]
-	ldr	r3, .L1527+56
-	str	r2, [r3, #0]
-.L1525:
-	ldr	r3, .L1527+60
-	movs	r2, #0
-	str	r2, [r3, #0]
-	ldr	r3, .L1527
-	ldr	r2, [r3, #68]
-	ldr	r3, .L1527+64
+	str	r3, [r4]
+.L1585:
+	ldr	r3, [r4, #8]
+	cmp	r3, #0
+	beq	.L1583
+	ldr	r2, [r3]
+	ldr	r3, [r10]
+	ldr	r3, [r3]
 	cmp	r2, r3
-	bne	.L1526
-	ldr	r3, .L1527+68
-	movs	r2, #1
-	ldr	r0, .L1527+72
-	ldr	r1, .L1527+76
-	str	r2, [r3, #0]
+	beq	.L1583
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1613+60
 	bl	printf
-.L1526:
-	ldr	r3, .L1527+80
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1527+84
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1527+32
-	ldr	r3, [r3, #0]
-	mla	r0, r0, r2, r3
-	ldr	r3, .L1527+88
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1527+92
-	str	r0, [r3, #0]
-	pop	{r3, r4, r5, pc}
-.L1528:
+	mov	r3, #-1
+	str	r3, [r4]
+	b	.L1583
+.L1614:
 	.align	2
-.L1527:
-	.word	.LANCHOR132
-	.word	1179929683
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR165
-	.word	.LANCHOR85
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-	.word	305432421
-	.word	.LANCHOR116
-	.word	.LC4
-	.word	.LC35
-	.word	.LANCHOR51
-	.word	.LANCHOR164
-	.word	.LANCHOR43
-	.word	.LANCHOR211
-	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.FtlLoadEctTbl,"ax",%progbits
+.L1613:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR29
+	.word	.LANCHOR25
+	.word	.LANCHOR8
+	.word	.LANCHOR27
+	.word	.LANCHOR23
+	.word	.LANCHOR26
+	.word	.LANCHOR21
+	.word	.LANCHOR20
+	.word	.LANCHOR17
+	.word	.LANCHOR3
+	.word	.LC24
+	.word	.LC25
+	.word	.LC26
+	.word	.LC27
+	.word	.LANCHOR195
+	.word	.LANCHOR196
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
-	.global	FtlLoadEctTbl
+	.global	FlashTestBlk
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadEctTbl, %function
-FtlLoadEctTbl:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #64
-	ldr	r4, .L1531
-	ldr	r5, .L1531+4
-	ldr	r2, [r4, #0]
-	ldrh	r1, [r5, #0]
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L1531+8
-	cmp	r2, r3
-	beq	.L1530
-	ldr	r1, .L1531+12
-	ldr	r0, .L1531+16
-	bl	printf
-	ldrh	r2, [r5, #0]
-	ldr	r0, [r4, #0]
+	ldr	r3, .L1618
+	push	{r4, r5, lr}
+	mov	r4, r0
+	sub	sp, sp, #108
+	ldr	r3, [r3]
+	cmp	r0, r3
+	bcc	.L1617
+	ldr	r5, .L1618+4
+	add	r0, sp, #40
+	movs	r2, #32
+	movs	r1, #165
+	str	r0, [sp, #16]
+	lsls	r4, r4, #10
+	ldr	r3, [r5]
+	str	r3, [sp, #12]
+	bl	ftl_memset
+	movs	r2, #8
+	movs	r1, #90
+	ldr	r0, [r5]
+	bl	ftl_memset
+	movs	r2, #1
+	add	r0, sp, #4
+	mov	r1, r2
+	str	r4, [sp, #8]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	add	r0, sp, #4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r4, [sp, #4]
+	movs	r2, #1
 	movs	r1, #0
-	lsls	r2, r2, #9
-	bl	memset
-.L1530:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L1532:
+	add	r0, sp, #4
+	adds	r4, r4, #0
+	it	ne
+	movne	r4, #1
+	negs	r4, r4
+	bl	FlashEraseBlocks
+.L1615:
+	mov	r0, r4
+	add	sp, sp, #108
+	@ sp needed
+	pop	{r4, r5, pc}
+.L1617:
+	movs	r4, #0
+	b	.L1615
+.L1619:
 	.align	2
-.L1531:
-	.word	.LANCHOR187
-	.word	.LANCHOR186
-	.word	1112818501
-	.word	.LC36
-	.word	.LC4
-	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.section	.text.FtlVendorPartWrite,"ax",%progbits
+.L1618:
+	.word	.LANCHOR145
+	.word	.LANCHOR151
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartWrite
+	.global	FtlLowFormatEraseBlock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
-	@ args = 0, pretend = 0, frame = 56
+	.fpu softvfp
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1543
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #56
-	ldrh	sl, [r3, #0]
-	mov	r6, r0
-	ldr	r3, .L1543+4
-	mov	r4, r1
+	ldr	r3, .L1665
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	str	r0, [sp, #4]
+	ldr	r3, [r3]
+	str	r1, [sp]
+	cmp	r3, #0
+	bne	.L1647
+	ldr	r2, .L1665+4
+	mov	fp, r3
+	ldr	r7, .L1665+8
+	mov	r5, r3
+	mov	r4, r3
+	mov	r10, #36
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	ldr	r8, [r7]
 	str	r2, [sp, #8]
-	adds	r2, r1, r0
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bhi	.L1541
-	lsr	sl, r0, sl
-	mov	fp, #0
-	ldr	r7, .L1543+8
-	lsl	r3, sl, #2
-	str	r3, [sp, #4]
-	b	.L1535
-.L1540:
-	ldr	r2, .L1543+12
-	mov	r0, r6
-	ldr	r3, [r2, #0]
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, r2]
-	ldr	r2, .L1543+16
-	ldrh	r8, [r2, #0]
-	str	r3, [sp, #0]
-	mov	r1, r8
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #0]
-	uxth	r1, r1
-	str	r1, [sp, #12]
-	rsb	r5, r1, r8
-	uxth	r5, r5
-	cmp	r5, r4
-	it	hi
-	uxthhi	r5, r4
-	cbz	r3, .L1537
-	cmp	r5, r8
-	beq	.L1537
-	str	r3, [sp, #24]
-	movs	r1, #1
-	ldr	r3, [r7, #0]
-	add	r0, sp, #20
-	mov	r2, r1
-	str	r3, [sp, #28]
-	movs	r3, #0
-	str	r3, [sp, #32]
-	bl	FlashReadPages
-	b	.L1538
-.L1537:
-	ldr	r3, .L1543+20
-	movs	r1, #0
-	ldr	r0, [r7, #0]
-	ldrh	r2, [r3, #0]
-	bl	memset
-.L1538:
-	ldr	r3, [sp, #12]
-	lsl	r8, r5, #9
-	ldr	r0, [r7, #0]
-	mov	r2, r8
-	ldr	r1, [sp, #8]
-	subs	r4, r4, r5
-	add	r0, r0, r3, lsl #9
-	adds	r6, r6, r5
-	bl	memcpy
-	mov	r1, sl
-	ldr	r0, .L1543+24
-	add	sl, sl, #1
-	ldr	r2, [r7, #0]
-	bl	FtlMapWritePage
+	ldr	r2, .L1665+12
+	str	r0, [r2]
+	ldr	r2, .L1665+16
+	ldrh	r2, [r2]
+	str	r2, [sp, #20]
+	ldr	r2, .L1665+20
+	ldr	r2, [r2]
+	str	r2, [sp, #12]
+	ldr	r2, .L1665+24
+	ldrh	r2, [r2]
+	str	r2, [sp, #16]
+.L1622:
+	ldr	r3, [sp, #20]
+	uxth	r2, fp
+	cmp	r3, r2
+	bhi	.L1626
+	cmp	r5, #0
+	beq	.L1620
 	ldr	r3, [sp, #8]
-	add	r3, r3, r8
-	str	r3, [sp, #8]
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #4
-	str	r3, [sp, #4]
-	cmp	r0, #-1
-	it	eq
-	moveq	fp, #-1
-.L1535:
-	cmp	r4, #0
-	bne	.L1540
-	b	.L1534
-.L1541:
-	mov	fp, #-1
-.L1534:
+	mov	r0, r8
+	mov	r10, #36
+	mov	r8, #0
+	mov	r2, r5
+	adds	r6, r3, #0
+	it	ne
+	movne	r6, #1
+	mov	r1, r6
+	bl	FlashEraseBlocks
+.L1628:
+	uxth	r3, r8
+	cmp	r5, r3
+	bhi	.L1630
+	ldr	r3, [sp]
+	cmp	r3, #0
+	bne	.L1631
+	uxth	r6, r6
+	mov	r10, #6
+	movs	r3, #1
+	str	r3, [sp, #8]
+.L1632:
+	movs	r7, #0
+.L1641:
+	ldr	r3, .L1665+16
+	mov	r8, #0
+	mov	r5, r8
+	ldrh	r3, [r3]
+	str	r3, [sp, #28]
+	ldr	r3, .L1665+8
+	ldr	fp, [r3]
+	ldr	r3, .L1665+28
+	ldr	r3, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, .L1665+32
+	ldr	r3, [r3]
+	str	r3, [sp, #20]
+	ldr	r3, .L1665+24
+	ldrh	r3, [r3]
+	str	r3, [sp, #24]
+.L1633:
+	ldr	r3, [sp, #28]
+	uxth	r2, r8
+	cmp	r3, r2
+	bhi	.L1636
+	cbz	r5, .L1620
 	mov	r0, fp
-	add	sp, sp, #56
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1544:
-	.align	2
-.L1543:
-	.word	.LANCHOR60
-	.word	.LANCHOR53
-	.word	.LANCHOR181
-	.word	.LANCHOR190
-	.word	.LANCHOR59
-	.word	.LANCHOR61
-	.word	.LANCHOR215
-	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
-	.section	.text.Ftl_save_ext_data,"ax",%progbits
-	.align	1
-	.global	Ftl_save_ext_data
-	.thumb
-	.thumb_func
-	.type	Ftl_save_ext_data, %function
-Ftl_save_ext_data:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L1547
-	ldr	r3, .L1547+4
-	ldr	r1, [r2, #0]
-	cmp	r1, r3
-	bne	.L1545
-	ldr	r3, .L1547+8
-	movs	r0, #0
-	movs	r1, #1
-	str	r3, [r2, #4]
-	ldr	r3, .L1547+12
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #88]
-	ldr	r3, .L1547+16
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #92]
-	ldr	r3, .L1547+20
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #8]
-	ldr	r3, .L1547+24
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #12]
-	ldr	r3, .L1547+28
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #16]
-	ldr	r3, .L1547+32
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #20]
-	ldr	r3, .L1547+36
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #28]
-	ldr	r3, .L1547+40
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #32]
-	ldr	r3, .L1547+44
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #36]
-	ldr	r3, .L1547+48
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #40]
-	ldr	r3, .L1547+52
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #44]
-	ldr	r3, .L1547+56
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #48]
-	ldr	r3, .L1547+60
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #60]
-	ldr	r3, .L1547+64
-	ldr	r3, [r3, #0]
-	str	r3, [r2, #64]
-	b	FtlVendorPartWrite
-.L1545:
-	bx	lr
-.L1548:
-	.align	2
-.L1547:
-	.word	.LANCHOR132
-	.word	1179929683
-	.word	1342177351
-	.word	.LANCHOR216
-	.word	.LANCHOR217
-	.word	.LANCHOR158
-	.word	.LANCHOR159
-	.word	.LANCHOR163
-	.word	.LANCHOR162
-	.word	.LANCHOR165
-	.word	.LANCHOR85
-	.word	.LANCHOR160
-	.word	.LANCHOR161
-	.word	.LANCHOR166
-	.word	.LANCHOR167
-	.word	.LANCHOR155
-	.word	.LANCHOR154
-	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
-	.section	.text.FtlEctTblFlush,"ax",%progbits
-	.align	1
-	.global	FtlEctTblFlush
-	.thumb
-	.thumb_func
-	.type	FtlEctTblFlush, %function
-FtlEctTblFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1556
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1554
-	ldr	r3, .L1556+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #29
-	ite	ls
-	movls	r3, #4
-	movhi	r3, #32
-	b	.L1550
-.L1554:
-	movs	r3, #32
-.L1550:
-	ldr	r2, .L1556+8
-	ldrh	r1, [r2, #0]
-	cmp	r1, #31
-	bhi	.L1551
+	ldr	fp, .L1665+8
 	movs	r3, #1
-	adds	r1, r1, #1
-	strh	r1, [r2, #0]	@ movhi
-.L1551:
-	ldr	r2, .L1556+12
-	cbnz	r0, .L1552
-	ldr	r1, [r2, #0]
-	ldr	r0, [r1, #20]
-	ldr	r1, [r1, #16]
-	adds	r3, r3, r0
-	cmp	r1, r3
-	bcc	.L1553
-.L1552:
-	ldr	r2, [r2, #0]
-	movs	r0, #64
-	ldr	r3, [r2, #16]
-	str	r3, [r2, #20]
-	ldr	r3, .L1556+16
-	str	r3, [r2, #0]
-	ldr	r3, .L1556+20
-	ldrh	r1, [r3, #0]
-	lsls	r3, r1, #9
-	str	r3, [r2, #12]
-	ldr	r3, [r2, #8]
+	mov	r2, r6
+	mov	r1, r5
+	mov	r8, #0
+	bl	FlashProgPages
+	movs	r3, #36
+.L1638:
+	uxth	r2, r8
+	cmp	r5, r2
+	bhi	.L1640
+	add	r7, r7, r10
+	ldr	r3, [sp, #8]
+	uxth	r7, r7
+	cmp	r7, r3
+	bcc	.L1641
+	ldr	r8, .L1665+8
+	movs	r7, #0
+	mov	r10, #36
+.L1642:
+	uxth	r3, r7
+	cmp	r5, r3
+	bhi	.L1644
+	ldr	r3, [sp, #4]
+	cmp	r3, #63
+	bls	.L1645
+	ldr	r3, [sp]
+	cbz	r3, .L1620
+.L1645:
+	ldr	r3, .L1665+8
+	mov	r2, r5
+	mov	r1, r6
+	ldr	r0, [r3]
+	bl	FlashEraseBlocks
+.L1620:
+	mov	r0, r4
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1626:
+	mul	r2, r10, fp
+	movs	r3, #0
+	ldr	r1, [sp, #4]
+	str	r3, [r8, r2]
+	ldr	r3, .L1665+36
+	ldrb	r0, [r3, fp]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp]
+	mov	r6, r0
+	cbz	r3, .L1623
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1624
+.L1623:
+	mov	r0, r6
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1625
+	ldr	r3, [sp, #16]
+	mla	r1, r10, r5, r8
+	lsls	r6, r6, #10
+	mul	r2, r3, r5
+	ldr	r3, [sp, #12]
+	adds	r5, r5, #1
+	str	r6, [r1, #4]
+	uxth	r5, r5
+	str	r0, [r1, #8]
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1624:
+	add	fp, fp, #1
+	b	.L1622
+.L1625:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1624
+.L1630:
+	mul	r3, r10, r8
+	ldr	r2, [r7]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
 	adds	r3, r3, #1
-	str	r3, [r2, #8]
+	bne	.L1629
+	ldr	r0, [r1, #4]
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+.L1629:
+	add	r8, r8, #1
+	b	.L1628
+.L1631:
+	ldr	r3, .L1665+40
+	ldrh	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L1665+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L1648
+	ldr	r3, [sp, #8]
+	movs	r6, #1
+	lsr	r10, r3, #2
+	b	.L1632
+.L1648:
+	movs	r6, #1
+	mov	r10, r6
+	b	.L1632
+.L1636:
+	movs	r3, #36
+	ldr	r1, [sp, #4]
+	mul	r2, r3, r8
 	movs	r3, #0
-	str	r3, [r2, #4]
-	bl	FtlVendorPartWrite
-	bl	Ftl_save_ext_data
-.L1553:
-	movs	r0, #0
-	pop	{r3, pc}
-.L1557:
+	str	r3, [fp, r2]
+	ldr	r3, .L1665+36
+	ldrb	r0, [r3, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	ldr	r3, [sp]
+	str	r0, [sp, #12]
+	cbz	r3, .L1634
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1635
+.L1634:
+	ldr	r0, [sp, #12]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1635
+	movs	r3, #36
+	mla	r1, r3, r5, fp
+	ldr	r3, [sp, #12]
+	add	r2, r7, r3, lsl #10
+	ldr	r3, [sp, #16]
+	str	r2, [r1, #4]
+	str	r3, [r1, #8]
+	ldr	r3, [sp, #24]
+	mul	r2, r3, r5
+	ldr	r3, [sp, #20]
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r2, r2, #3
+	add	r2, r2, r3
+	str	r2, [r1, #12]
+.L1635:
+	add	r8, r8, #1
+	b	.L1633
+.L1640:
+	mul	r2, r3, r8
+	ldr	r1, [fp]
+	add	ip, r1, r2
+	ldr	r2, [r1, r2]
+	cbz	r2, .L1639
+	ldr	r0, [ip, #4]
+	adds	r4, r4, #1
+	str	r3, [sp, #12]
+	uxth	r4, r4
+	ubfx	r0, r0, #10, #16
+	bl	FtlBbmMapBadBlock
+	ldr	r3, [sp, #12]
+.L1639:
+	add	r8, r8, #1
+	b	.L1638
+.L1644:
+	ldr	r3, [sp]
+	cbz	r3, .L1643
+	mul	r3, r10, r7
+	ldr	r2, [r8]
+	adds	r1, r2, r3
+	ldr	r3, [r2, r3]
+	cbnz	r3, .L1643
+	ldr	r0, [r1, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L1643:
+	adds	r7, r7, #1
+	b	.L1642
+.L1647:
+	movs	r4, #0
+	b	.L1620
+.L1666:
 	.align	2
-.L1556:
-	.word	.LANCHOR116
-	.word	.LANCHOR167
-	.word	.LANCHOR218
-	.word	.LANCHOR187
-	.word	1112818501
+.L1665:
+	.word	.LANCHOR75
+	.word	.LANCHOR8
+	.word	.LANCHOR76
+	.word	.LANCHOR72
+	.word	.LANCHOR36
 	.word	.LANCHOR186
-	.size	FtlEctTblFlush, .-FtlEctTblFlush
-	.section	.text.flush_l2p_region,"ax",%progbits
+	.word	.LANCHOR57
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR45
+	.word	.LANCHOR52
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
-	.global	flush_l2p_region
+	.global	FtlBbmTblFlush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	flush_l2p_region, %function
-flush_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #12
-	muls	r4, r0, r4
-	ldr	r5, .L1559
-	ldr	r0, .L1559+4
-	ldr	r2, [r5, #0]
-	adds	r3, r2, r4
-	ldrh	r1, [r2, r4]
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-	ldr	r3, [r5, #0]
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L1678
+	ldr	r4, [r3]
+	str	r3, [sp, #12]
+	cmp	r4, #0
+	bne	.L1669
+	ldr	r3, .L1678+4
+	mov	r1, r4
+	ldr	r7, .L1678+8
+	ldr	r5, .L1678+12
+	ldr	r3, [r3]
+	ldr	r0, [r7]
+	mov	r8, r7
+	ldr	r6, .L1678+16
+	str	r3, [r5, #12]
+	ldr	r7, .L1678+20
+	ldr	r3, .L1678+24
+	ldr	r10, .L1678+56
+	str	r0, [r5, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+.L1670:
+	ldrh	r3, [r7]
+	cmp	r4, r3
+	blt	.L1671
+	ldr	r6, [r5, #12]
+	movs	r2, #16
+	ldr	r4, .L1678+28
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r6
+	bl	ftl_memset
+	movw	r3, #61649
+	mov	r10, r4
+	strh	r3, [r6]	@ movhi
+	ldr	r3, [r4, #8]
+	str	r7, [sp, #8]
+	str	r3, [r6, #4]
+	ldrh	r3, [r4]
+	strh	r3, [r6, #2]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r3, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #6]
+	strh	r3, [r6, #10]	@ movhi
+	ldr	r3, .L1678+32
+	ldr	r3, [r3]
+	strh	r3, [r6, #12]	@ movhi
+.L1672:
+	ldr	r3, [r8]
+	mov	fp, #0
+	ldrh	r1, [r4]
+	ldrh	r2, [r4, #2]
+	str	r3, [r5, #8]
+	ldr	r3, .L1678+4
+	ldrh	r0, [r6, #10]
+	str	fp, [r5]
+	ldr	r3, [r3]
+	str	r3, [r5, #12]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r5, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp]
+	ldr	r0, .L1678+36
+	bl	printf
+	movs	r3, #1
+	ldr	r0, .L1678+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1678+40
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1673
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4]
+	strh	fp, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	str	r3, [r6, #4]
+	strh	r2, [r6, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1678+44
+	strh	r3, [r4]	@ movhi
+	lsls	r3, r3, #10
+	ldr	r0, [r2]
+	movs	r2, #1
+	str	r3, [r5, #4]
+	mov	r1, r2
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	ldr	r0, .L1678+12
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+.L1673:
+	ldrh	r3, [r10, #2]
+	adds	r3, r3, #1
+	strh	r3, [r10, #2]	@ movhi
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	bne	.L1674
+	adds	r7, r7, #1
+	ldr	r1, [r5, #4]
+	uxth	r7, r7
+	ldr	r0, .L1678+48
+	bl	printf
+	cmp	r7, #3
+	bls	.L1672
+	mov	r2, r7
+	ldr	r1, [r5, #4]
+	ldr	r0, .L1678+52
+	bl	printf
+	ldr	r2, [sp, #12]
+	movs	r3, #1
+	str	r3, [r2]
+.L1669:
 	movs	r0, #0
-	adds	r4, r3, r4
-	ldr	r3, [r4, #4]
-	bic	r3, r3, #-2147483648
-	str	r3, [r4, #4]
-	pop	{r3, r4, r5, pc}
-.L1560:
-	.align	2
-.L1559:
-	.word	.LANCHOR102
-	.word	.LANCHOR110
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.l2p_flush,"ax",%progbits
-	.align	1
-	.global	l2p_flush
-	.thumb
-	.thumb_func
-	.type	l2p_flush, %function
-l2p_flush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r4, #0
-	ldr	r7, .L1565
-	movs	r5, #12
-	ldr	r6, .L1565+4
-	b	.L1562
-.L1564:
-	ldr	r3, [r6, #0]
-	mla	r3, r5, r4, r3
-	ldr	r3, [r3, #4]
-	cmp	r3, #0
-	bge	.L1563
-	mov	r0, r4
-	bl	flush_l2p_region
-.L1563:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1671:
+	ldrh	r2, [r10]
+	ldr	r3, [r5, #8]
+	ldr	r1, [r6, #4]!
+	mul	r0, r4, r2
+	lsls	r2, r2, #2
 	adds	r4, r4, #1
-	uxth	r4, r4
-.L1562:
-	ldrh	r3, [r7, #0]
-	cmp	r3, r4
-	bhi	.L1564
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1566:
+	add	r0, r3, r0, lsl #2
+	bl	ftl_memcpy
+	b	.L1670
+.L1674:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1669
+	movs	r3, #1
+	str	r3, [sp, #8]
+	b	.L1672
+.L1679:
 	.align	2
-.L1565:
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.size	l2p_flush, .-l2p_flush
-	.section	.text.allocate_new_data_superblock,"ax",%progbits
+.L1678:
+	.word	.LANCHOR75
+	.word	.LANCHOR185
+	.word	.LANCHOR79
+	.word	.LANCHOR199
+	.word	.LANCHOR73+24
+	.word	.LANCHOR43
+	.word	.LANCHOR56
+	.word	.LANCHOR73
+	.word	.LANCHOR35
+	.word	.LC28
+	.word	.LANCHOR52
+	.word	.LANCHOR76
+	.word	.LC29
+	.word	.LC30
+	.word	.LANCHOR120
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.allocate_data_superblock,"ax",%progbits
 	.align	1
-	.global	allocate_new_data_superblock
+	.global	allocate_data_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	allocate_new_data_superblock, %function
-allocate_new_data_superblock:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1580
-	push	{r4, r5, r6, lr}
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
 	mov	r4, r0
-	ldrh	r5, [r0, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r3, r5
-	bcs	.L1568
-	ldr	r1, .L1580+4
-	movw	r2, #2939
-	ldr	r0, .L1580+8
+	ldr	r3, .L1743
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L1682
+	ldr	r7, .L1743+4
+.L1681:
+	ldr	r3, .L1743+4
+	ldr	r6, .L1743+8
+	ldrh	r3, [r3]
+	ldrh	r2, [r6]
+	add	r3, r3, r2
+	ldr	r2, .L1743+12
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1683
+	ldr	r1, .L1743+16
+	movw	r2, #2818
+	ldr	r0, .L1743+20
 	bl	printf
-	ldr	r0, .L1580+12
-	ldr	r1, .L1580+16
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
 	bl	printf
-.L1568:
-	ldr	r3, .L1580+20
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1569
-	movw	r3, #65535
-	cmp	r5, r3
-	beq	.L1570
-	ldr	r3, .L1580+24
-	mov	r0, r5
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1571
-	bl	INSERT_DATA_LIST
-	b	.L1570
-.L1571:
-	bl	INSERT_FREE_LIST
-.L1570:
-	movs	r3, #0
-	strb	r3, [r4, #8]
-	ldr	r3, .L1580+28
+.L1683:
+	ldr	r3, .L1743+32
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r4, r3
-	beq	.L1572
-	ldr	r3, .L1580+32
-	ldrh	r3, [r3, #0]
-	cmp	r3, #1
-	beq	.L1572
-	ldr	r2, .L1580+36
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1573
-.L1572:
-	movs	r3, #1
-	strb	r3, [r4, #8]
-	b	.L1574
-.L1573:
-	ldr	r2, .L1580+40
-	cmp	r4, r2
-	bne	.L1574
-	cmp	r3, #3
-	beq	.L1575
-	ldr	r3, .L1580+44
-	ldr	r3, [r3, #0]
+	bne	.L1684
+	ldr	r3, .L1743+36
+	ldrh	r5, [r7]
+	ldr	r3, [r3]
+	lsrs	r0, r5, #1
+	mul	ip, r3, r5
+	adds	r1, r0, #1
+	add	r1, r1, ip, lsr #2
+	ldr	ip, .L1743+48
+	uxth	r1, r1
+	ldr	ip, [ip]
+	cmp	ip, #0
+	beq	.L1685
+	ldr	ip, .L1743+52
+	ldr	ip, [ip]
+	cmp	ip, #29
+	bhi	.L1685
+	cmp	ip, #2
+	bls	.L1718
+	lsls	r5, r5, #31
+	bpl	.L1714
+	cmp	r3, #0
+	beq	.L1718
+.L1714:
+	mov	r1, r0
+	b	.L1685
+.L1684:
+	cmp	r2, #1
+	bne	.L1718
+	ldr	r3, .L1743+40
+	ldrh	r3, [r3]
 	cmp	r3, #1
-	bne	.L1576
-.L1575:
-	movs	r3, #1
-	strb	r3, [r2, #8]
-.L1576:
-	ldr	r3, .L1580+48
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1574
-	ldr	r3, .L1580+52
-	ldr	r3, [r3, #0]
-	cmp	r3, #29
-	bhi	.L1574
-	ldr	r3, .L1580+40
-	movs	r2, #1
-	strb	r2, [r3, #8]
-.L1574:
-	ldr	r6, .L1580+56
-	movw	r3, #65535
-	ldrh	r0, [r6, #0]
-	cmp	r0, r3
-	beq	.L1577
-	cmp	r5, r0
-	bne	.L1578
-	ldr	r3, .L1580+24
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1579
-.L1578:
-	bl	update_vpc_list
-.L1579:
-	movw	r3, #65535
-	strh	r3, [r6, #0]	@ movhi
-.L1577:
+	beq	.L1718
+	ldr	r3, .L1743+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L1718
+	ldr	r0, .L1743+48
+	ldrh	r3, [r7]
+	ldr	r0, [r0]
+	lsrs	r1, r3, #3
+	cbz	r0, .L1685
+	ldr	r0, .L1743+52
+	ldr	r0, [r0]
+	cmp	r0, #1
+	bhi	.L1685
+	rsb	r3, r3, r3, lsl #3
+	ubfx	r1, r3, #3, #16
+.L1685:
+	cbz	r1, .L1686
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L1686:
+	ldr	r0, .L1743+56
+	bl	List_pop_index_node
+	ldrh	r3, [r7]
+	mov	r5, r0
+	uxth	r8, r0
+	cbnz	r3, .L1687
+	ldr	r1, .L1743+16
+	movw	r2, #2838
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1687:
+	ldrh	r3, [r7]
 	mov	r0, r4
-	bl	allocate_data_superblock
-	bl	l2p_flush
-	movs	r0, #0
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1569:
-	movs	r0, #0
-	pop	{r4, r5, r6, pc}
-.L1581:
-	.align	2
-.L1580:
-	.word	.LANCHOR43
-	.word	.LANCHOR219
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR82
-	.word	.LANCHOR89
-	.word	.LANCHOR98
-	.word	.LANCHOR47
-	.word	.LANCHOR7
-	.word	.LANCHOR97
-	.word	.LANCHOR155
-	.word	.LANCHOR116
-	.word	.LANCHOR167
-	.word	.LANCHOR126
-	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
-	.align	1
-	.global	FtlMapTblRecovery
-	.thumb
-	.thumb_func
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	sub	sp, sp, #24
-	ldr	fp, [r0, #24]
-	ldr	r3, [r4, #16]
+	subs	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	strh	r8, [r4]	@ movhi
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1688
+	ldr	r3, .L1743+60
+	uxth	r5, r5
+	movw	r2, #65535
+	ldr	r3, [r3]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrh	r2, [r6]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1743+12
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1681
+	movw	r2, #2850
+	ldr	r1, .L1743+16
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+	b	.L1681
+.L1718:
 	movs	r1, #0
-	ldrh	sl, [r4, #6]
-	ldr	r0, [r0, #12]
-	str	r3, [sp, #20]
-	ldrh	r3, [r4, #8]
-	lsl	r2, sl, #2
-	str	r0, [sp, #12]
-	mov	r0, fp
-	ldr	r6, .L1619
-	str	r3, [sp, #16]
-	bl	memset
-	ldr	r1, .L1619+4
-	movs	r2, #0
-	mov	r8, r2
-	str	r2, [r4, #32]
-	str	r2, [r4, #28]
-	ldr	r3, [r1, #0]
-	str	r3, [r6, #8]
-	ldr	r3, .L1619+8
-	ldr	r5, [r3, #0]
-	movw	r3, #65535
-	str	r5, [r6, #12]
-	strh	r3, [r4, #0]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #1
-	str	r3, [r4, #36]
-	ldr	r3, [sp, #12]
-	mov	r7, r3
-	mov	r3, fp
-	mov	fp, sl
-	mov	sl, r4
-	b	.L1583
-.L1597:
-	ldr	r0, [sp, #16]
-	subs	r2, r0, #1
-	cmp	r8, r2
-	bne	.L1584
-	sxth	r6, r1
-	mov	r7, r1
-	ldr	r1, [sp, #12]
-	mov	r4, sl
-	mov	sl, fp
-	mov	fp, r3
-	add	r8, r1, r6, lsl #1
-	ldrh	r0, [r1, r6, lsl #1]
-	movs	r1, #1
-	bl	FtlGetLastWrittenPage
-	strh	r7, [r4, #0]	@ movhi
-	ldr	r7, .L1619
-	uxth	r3, r0
-	ldr	r0, [sp, #20]
-	adds	r2, r3, #1
-	strh	r2, [r4, #2]	@ movhi
-	sxth	r3, r3
-	ldr	r2, [r0, r6, lsl #2]
-	movs	r6, #0
-	str	r2, [r4, #28]
-	b	.L1585
-.L1588:
-	ldrh	r2, [r8, #0]
-	movs	r1, #1
-	ldr	r0, .L1619
-	orr	r2, r6, r2, lsl #10
-	str	r2, [r7, #4]
-	mov	r2, r1
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r2, [r7, #0]
-	ldr	r3, [sp, #8]
-	adds	r2, r2, #1
-	beq	.L1586
-	ldrh	r2, [r5, #8]
-	cmp	r2, sl
-	bcs	.L1587
-	ldrh	r0, [r5, #0]
-	ldrh	r1, [r4, #4]
-	cmp	r0, r1
-	bne	.L1587
-	ldr	r1, [r7, #4]
-	str	r1, [fp, r2, lsl #2]
-	b	.L1587
-.L1586:
-	ldrh	r2, [r8, #0]
-	strh	r2, [r4, #40]	@ movhi
-.L1587:
-	adds	r6, r6, #1
-.L1585:
-	sxth	r2, r6
+	b	.L1686
+.L1688:
+	ldrh	r2, [r6]
+	ldrh	r3, [r7]
+	add	r3, r3, r2
+	ldr	r2, .L1743+12
+	ldrh	r2, [r2]
 	cmp	r3, r2
-	bge	.L1588
-	b	.L1589
-.L1584:
-	ldr	r1, .L1619+4
-	ldr	r0, .L1619+12
-	ldr	r2, [r1, #0]
-	ldrh	r1, [r7], #2
-	str	r2, [r6, #8]
-	ldrh	r2, [r0, #0]
-	ldr	r0, .L1619
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	movs	r1, #1
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	r3, [sp, #8]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #8]
-	adds	r2, r2, #1
-	beq	.L1610
-	ldrh	r1, [r5, #0]
-	ldrh	r2, [sl, #4]
-	cmp	r1, r2
-	bne	.L1610
-	ldrh	r2, [r5, #8]
-	movw	r1, #64245
-	cmp	r2, r1
-	bne	.L1610
-	ldr	r2, .L1619+12
+	ble	.L1690
+	ldr	r1, .L1743+16
+	movw	r2, #2853
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1690:
+	ldr	r2, .L1743+64
+	movs	r6, #0
+	ldr	fp, .L1743+100
+	add	ip, r4, #16
+	mov	lr, r6
+	movw	r10, #65535
+	ldrh	r1, [r2]
+	movs	r2, #36
+	ldr	r0, [fp]
+	str	r2, [sp, #4]
+	mov	r3, r0
+	mla	r1, r2, r1, r0
+	str	r1, [sp]
+.L1691:
+	ldr	r2, [sp]
+	cmp	r2, r3
+	bne	.L1693
+	cbnz	r6, .L1694
+	ldr	r1, .L1743+16
+	movw	r2, #2865
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1694:
+	ldr	r3, .L1743+48
+	uxth	r5, r5
+	ldr	r10, .L1743+104
+	ldr	r3, [r3]
+	cbz	r3, .L1695
+	ldr	r3, .L1743+68
+	cmp	r4, r3
+	bne	.L1695
+	ldr	r3, [r10]
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, #30
+	itt	hi
+	movhi	r3, #0
+	strbhi	r3, [r4, #8]
+.L1695:
+	ldr	r3, .L1743+72
+	ldrh	r3, [r3]
+	cmp	r3, r8
+	bne	.L1696
+	ldr	r1, .L1743+16
+	movw	r2, #2872
+	ldr	r0, .L1743+20
+	bl	printf
+	ldr	r1, .L1743+24
+	ldr	r0, .L1743+28
+	bl	printf
+.L1696:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldr	r2, .L1743+76
+	ldr	r3, .L1743+80
+	cmp	r1, #0
+	bne	.L1697
+	ldr	r0, [r10]
+	ldrh	lr, [r0, r5, lsl #1]
+	cmp	lr, #0
+	beq	.L1698
+	ldr	r1, .L1743+84
+	ldrh	ip, [r1]
+	add	r1, lr, ip
+.L1741:
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r2]
+	str	r3, [sp, #4]
+	str	r2, [sp]
+	adds	r1, r1, #1
+	str	r1, [r2]
 	movs	r1, #0
-	ldr	r0, .L1619+4
-	mov	lr, r3
-	ldrh	r4, [r2, #0]
-	ldr	r2, [r0, #0]
-	subs	r4, r4, #1
-	b	.L1591
-.L1593:
-	ldrh	r0, [r2, #0]
-	cmp	r0, fp
-	itt	cc
-	ldrcc	r3, [r2, #4]
-	strcc	r3, [lr, r0, lsl #2]
+	bl	ftl_set_blk_mode
+	ldm	sp, {r2, r3}
+.L1700:
+	lsls	r1, r5, #1
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	str	r1, [sp]
+	ldr	r1, [r10]
+	ldrh	ip, [r1, r5, lsl #1]
+	ldr	r1, .L1743+88
+	ldr	r0, [r1]
+	cmp	ip, r0
+	it	hi
+	strhi	ip, [r1]
+	ldr	r1, .L1743+84
+	ldrh	r0, [r1]
+	ldr	r1, .L1743+12
+	mla	r0, r2, r0, r3
+	ldrh	r1, [r1]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1743+92
+	ldr	ip, .L1743+108
+	str	r0, [r3]
+	ldr	r3, .L1743+96
+	ldr	r0, [fp]
+	ldr	r2, [r3]
+	adds	r1, r0, #4
+	ldr	r3, [r2, #16]
+	adds	r3, r3, #1
+	str	r3, [r2, #16]
+	movs	r3, #36
+	mla	r3, r3, r6, r0
+	adds	r3, r3, #40
+.L1702:
+	adds	r1, r1, #36
+	cmp	r3, r1
+	bne	.L1703
+	ldr	r3, .L1743+44
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L1704
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	cmp	r3, #1
+	ite	eq
+	moveq	r1, #0
+	movne	r1, #1
+	bl	FlashEraseBlocks
+.L1704:
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	ldr	r0, [fp]
+	mov	r10, #0
+	bl	FlashEraseBlocks
+	mov	r3, r10
+	movs	r1, #36
+.L1706:
+	uxth	r2, r10
+	cmp	r6, r2
+	bhi	.L1708
+	cbz	r3, .L1709
+	mov	r0, r8
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1709:
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r1, .L1743+60
+	cmp	r2, #0
+	bne	.L1710
+	ldr	r3, [r1]
+	movw	r2, #65535
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1681
+.L1744:
+	.align	2
+.L1743:
+	.word	.LANCHOR75
+	.word	.LANCHOR87
+	.word	.LANCHOR84
+	.word	.LANCHOR38
+	.word	.LANCHOR200
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR92
+	.word	.LANCHOR170
+	.word	.LANCHOR42
+	.word	.LANCHOR8
+	.word	.LANCHOR101
+	.word	.LANCHOR168
+	.word	.LANCHOR86
+	.word	.LANCHOR82
+	.word	.LANCHOR36
+	.word	.LANCHOR90
+	.word	.LANCHOR201
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR46
+	.word	.LANCHOR167
+	.word	.LANCHOR202
+	.word	.LANCHOR188
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	-1024
+.L1693:
+	ldrh	r1, [ip], #2
+	str	lr, [r3, #8]
+	str	lr, [r3, #12]
+	cmp	r1, r10
+	beq	.L1692
+	ldr	r2, [sp, #4]
+	lsls	r1, r1, #10
+	mla	r2, r2, r6, r0
+	adds	r6, r6, #1
+	uxth	r6, r6
+	str	r1, [r2, #4]
+.L1692:
+	adds	r3, r3, #36
+	b	.L1691
+.L1698:
+	movs	r1, #2
+	b	.L1741
+.L1697:
+	ldr	r0, [r10]
+	str	r2, [sp, #4]
+	str	r3, [sp]
+	ldrh	r1, [r0, r5, lsl #1]
 	adds	r1, r1, #1
-	adds	r2, r2, #8
-.L1591:
-	cmp	r1, r4
-	blt	.L1593
-	mov	r3, lr
-	b	.L1594
-.L1596:
-	ldrh	r2, [r7, #-2]
-	movs	r1, #1
-	ldr	r0, .L1619
-	orr	r2, r4, r2, lsl #10
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	ip, [sp, #8]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	ip, [sp, #8]
-	adds	r2, r2, #1
-	beq	.L1595
-	ldrh	r2, [r5, #8]
-	cmp	r2, fp
-	bcs	.L1595
-	ldrh	r1, [sl, #4]
-	ldrh	r0, [r5, #0]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r6, #4]
-	streq	r1, [r8, r2, lsl #2]
-.L1595:
-	adds	r4, r4, #1
-	b	.L1614
-.L1610:
-	mov	ip, r8
-	movs	r4, #0
-	mov	r8, r3
-.L1614:
-	ldr	r1, .L1619+12
-	ldrh	r2, [r1, #0]
-	cmp	r4, r2
-	blt	.L1596
-	mov	r3, r8
-	mov	r8, ip
-.L1594:
-	add	r8, r8, #1
-.L1583:
-	ldr	r2, [sp, #16]
-	uxth	r1, r8
-	cmp	r8, r2
-	blt	.L1597
-	mov	r4, sl
-.L1589:
-	ldr	r3, .L1619+16
-	cmp	r4, r3
-	bne	.L1598
-	ldr	r3, .L1619+20
-	ldrh	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1611
-	b	.L1598
-.L1605:
-	ldr	r3, [r8, #0]
-	lsls	r4, r7, #2
-	ldr	r3, [r3, r7, lsl #2]
-	subs	r2, r3, #1
-	adds	r2, r2, #3
-	bhi	.L1600
-	ldr	r2, [r6, #0]
-	ldr	r2, [r2, r7, lsl #2]
-	cmp	r3, r2
-	beq	.L1600
-	ldr	r0, .L1619+4
-	movs	r1, #1
-	str	r3, [sl, #4]
-	ldr	r2, [r0, #0]
-	ldr	r0, .L1619
-	str	r2, [sl, #8]
-	ldr	r2, .L1619+8
-	ldr	r5, [r2, #0]
-	mov	r2, r1
-	str	r5, [sl, #12]
-	bl	FlashReadPages
-	ldr	r3, [sl, #0]
+	strh	r1, [r0, r5, lsl #1]	@ movhi
+	mov	r0, r8
+	ldr	r1, [r3]
+	adds	r1, r1, #1
+	str	r1, [r3]
+	bl	ftl_set_blk_mode.part.9
+	ldr	r2, [sp, #4]
+	ldr	r3, [sp]
+	b	.L1700
+.L1703:
+	ldr	r2, [r1, #-36]
+	and	r2, r2, ip
+	str	r2, [r1, #-36]
+	b	.L1702
+.L1708:
+	ldr	r0, .L1745
+	mul	r2, r1, r10
+	ldr	r0, [r0]
+	add	ip, r0, r2
+	ldr	r2, [r0, r2]
+	adds	r0, r2, #1
+	bne	.L1707
+	ldr	r0, [ip, #4]
 	adds	r3, r3, #1
-	beq	.L1613
-	ldr	r3, .L1619+16
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #4]
-	cmp	r2, r3
-	bne	.L1613
-	ldr	fp, [r5, #4]
-	b	.L1601
-.L1613:
-	mov	fp, #0
-.L1601:
-	ldr	r3, [r6, #0]
-	movs	r1, #1
-	mov	r2, r1
-	ldr	r0, .L1619
-	ldr	r3, [r3, r4]
-	str	r3, [sl, #4]
-	bl	FlashReadPages
-	ldr	r1, [r5, #4]
-	cmp	fp, r1
-	bls	.L1600
-	ldr	r2, [r8, #0]
-	ldr	r3, [r6, #0]
-	ldr	r0, .L1619+24
-	str	r1, [sp, #0]
-	ldr	r1, [r2, r4]
-	ldr	r2, [r3, r4]
-	mov	r3, fp
-	bl	printf
-	ldr	r3, [r8, #0]
-	ldr	r2, [r6, #0]
-	ldr	r1, [r3, r4]
-	str	r1, [r2, r4]
-	movs	r2, #0
-	ldr	r0, [r3, r4]
-	ldr	r3, .L1619+28
+	str	r1, [sp, #12]
+	str	r2, [sp, #8]
 	ubfx	r0, r0, #10, #16
+	str	r3, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	ldr	r2, [sp, #8]
+	add	r0, r4, r10, lsl #1
 	ldr	r1, [sp, #12]
-	ldrh	r3, [r3, #0]
-	b	.L1602
-.L1603:
-	ldrh	r4, [r1], #2
-	adds	r2, r2, #1
-	cmp	r4, r0
-	beq	.L1600
-.L1602:
-	cmp	r2, r3
-	blt	.L1603
-	b	.L1617
-.L1618:
-	ldr	r1, [sp, #12]
-	strh	r0, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L1619+28
-	ldrh	r2, [r3, #0]
+	ldr	r3, [sp, #4]
+	strh	r2, [r0, #16]	@ movhi
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	subs	r2, r2, #1
+	strb	r2, [r4, #7]
+.L1707:
+	add	r10, r10, #1
+	b	.L1706
+.L1710:
+	ldr	r3, .L1745+4
+	ldr	r0, .L1745+8
+	ldrh	r3, [r3]
+	strh	r8, [r4]	@ movhi
+	smulbb	r3, r3, r2
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldr	r2, [r0]
+	uxth	r3, r3
+	strh	r3, [r4, #4]	@ movhi
+	str	r2, [r4, #12]
 	adds	r2, r2, #1
-	strh	r2, [r3, #0]	@ movhi
-	bl	remove_from_free_sys_Queue
-.L1600:
-	adds	r7, r7, #1
-	b	.L1599
-.L1620:
+	str	r2, [r0]
+	ldr	r2, [r1]
+	ldr	r1, [sp]
+	strh	r3, [r2, r1]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1711
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1682
+.L1711:
+	ldr	r1, .L1745+12
+	movw	r2, #2931
+	ldr	r0, .L1745+16
+	bl	printf
+	ldr	r1, .L1745+20
+	ldr	r0, .L1745+24
+	bl	printf
+.L1682:
+	movs	r0, #0
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1746:
 	.align	2
-.L1619:
-	.word	.LANCHOR198
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR57
-	.word	.LANCHOR110
-	.word	.LANCHOR73
-	.word	.LC37
-	.word	.LANCHOR111
-.L1611:
-	ldr	r8, .L1621+16
-	movs	r7, #0
-	ldr	r6, .L1621
-	ldr	sl, .L1621+20
-	str	r4, [sp, #16]
-.L1599:
-	ldr	r2, .L1621+4
-	ldrh	r3, [r2, #0]
-	cmp	r7, r3
-	bcc	.L1605
-	ldr	r4, [sp, #16]
-.L1598:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1621+8
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1606
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
-.L1606:
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-	mov	r0, r4
-	bl	ftl_map_blk_gc
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1617:
-	ldr	r2, .L1621+12
-	ldr	r2, [r2, #0]
-	cmp	r3, r2
-	bcs	.L1600
-	b	.L1618
-.L1622:
-	.align	2
-.L1621:
-	.word	.LANCHOR114
-	.word	.LANCHOR70
-	.word	.LANCHOR57
-	.word	.LANCHOR68
-	.word	.LANCHOR191
-	.word	.LANCHOR198
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadMapInfo
-	.thumb
-	.thumb_func
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L1624
-	bl	FtlMapTblRecovery
-	movs	r0, #0
-	pop	{r3, pc}
-.L1625:
-	.align	2
-.L1624:
-	.word	.LANCHOR110
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+.L1745:
+	.word	.LANCHOR76
+	.word	.LANCHOR51
+	.word	.LANCHOR157
+	.word	.LANCHOR200
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
-	.global	FtlLoadVonderInfo
+	.global	FtlGcFreeBadSuperBlk
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1627
-	ldr	r0, .L1627+4
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1627+8
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1627+12
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1627+16
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #12]
-	ldr	r3, .L1627+20
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #16]
-	ldr	r3, .L1627+24
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #20]
-	ldr	r3, .L1627+28
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #24]
-	movw	r3, #65535
-	strh	r3, [r0, #40]	@ movhi
-	bl	FtlMapTblRecovery
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	ldr	r4, .L1759
+	ldrh	r3, [r4]
+	cbz	r3, .L1748
+	ldr	r8, .L1759+12
+	movs	r7, #0
+.L1749:
+	ldr	r3, .L1759+4
+	ldrh	r2, [r3]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L1755
+	bl	FtlGcReFreshBadBlk
+.L1748:
 	movs	r0, #0
-	pop	{r3, pc}
-.L1628:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1755:
+	ldr	r2, .L1759+8
+	uxth	r3, r7
+	mov	r1, r10
+	mov	fp, #0
+	ldrb	r0, [r2, r3]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r1, r0
+.L1750:
+	ldrh	r3, [r4]
+	uxth	r5, fp
+	cmp	r3, r5
+	bhi	.L1754
+	adds	r7, r7, #1
+	b	.L1749
+.L1754:
+	uxth	r6, fp
+	ldrh	r3, [r8, r6, lsl #1]
+	cmp	r3, r1
+	bne	.L1751
+	mov	r0, r1
+	str	r1, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r4]
+	add	r3, r8, r6, lsl #1
+	ldr	r1, [sp, #4]
+.L1752:
+	cmp	r5, r2
+	bcc	.L1753
+	subs	r2, r2, #1
+	strh	r2, [r4]	@ movhi
+.L1751:
+	add	fp, fp, #1
+	b	.L1750
+.L1753:
+	ldrh	r0, [r3, #2]!
+	adds	r5, r5, #1
+	uxth	r5, r5
+	strh	r0, [r3, #-2]	@ movhi
+	b	.L1752
+.L1760:
 	.align	2
-.L1627:
-	.word	.LANCHOR65
-	.word	.LANCHOR215
-	.word	.LANCHOR74
-	.word	.LANCHOR66
-	.word	.LANCHOR75
-	.word	.LANCHOR189
-	.word	.LANCHOR188
-	.word	.LANCHOR190
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
-	.section	.text.load_l2p_region,"ax",%progbits
+.L1759:
+	.word	.LANCHOR114
+	.word	.LANCHOR36
+	.word	.LANCHOR45
+	.word	.LANCHOR115
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	update_vpc_list
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	load_l2p_region, %function
-load_l2p_region:
+	.fpu softvfp
+	.type	update_vpc_list, %function
+update_vpc_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1635
-	mov	r7, r1
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	bcs	.L1630
-	ldr	r1, .L1635+4
-	movw	r2, #503
-	ldr	r0, .L1635+8
-	bl	printf
-	ldr	r0, .L1635+12
-	ldr	r1, .L1635+16
-	bl	printf
-.L1630:
-	ldr	r3, .L1635+20
-	ldr	r8, .L1635+44
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, r4, lsl #2]
-	movs	r3, #12
-	cbnz	r6, .L1631
-	muls	r7, r3, r7
-	ldr	r3, [r8, #0]
-	movs	r1, #255
-	adds	r3, r3, r7
-	ldr	r0, [r3, #8]
-	ldr	r3, .L1635+24
-	ldrh	r2, [r3, #0]
-	bl	memset
-	ldr	r3, [r8, #0]
-	adds	r2, r3, r7
-	strh	r4, [r3, r7]	@ movhi
-	str	r6, [r2, #4]
-	b	.L1632
-.L1631:
-	muls	r7, r3, r7
-	ldr	r3, [r8, #0]
-	ldr	r5, .L1635+28
-	movs	r1, #1
-	adds	r3, r3, r7
-	mov	r2, r1
-	mov	r0, r5
-	ldr	r3, [r3, #8]
-	str	r6, [r5, #4]
-	str	r3, [r5, #8]
-	ldr	r3, .L1635+32
-	ldr	r3, [r3, #0]
-	str	r3, [r5, #12]
-	bl	FlashReadPages
-	ldr	r3, [r5, #0]
-	ldr	sl, [r5, #12]
-	cmp	r3, #256
-	bne	.L1633
-	mov	r2, r6
+	ldr	r3, .L1771
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1762
+	ldr	r2, .L1771+4
+	ldrh	r1, [r2]
+	cmp	r1, r0
+	bne	.L1763
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L1764:
+	ldr	r5, .L1771+8
 	mov	r1, r4
-	ldr	r0, .L1635+36
-	lsrs	r6, r6, #10
+	ldr	r0, .L1771+12
+	bl	List_remove_node
+	ldrh	r3, [r5]
+	cbnz	r3, .L1766
+	ldr	r1, .L1771+16
+	movw	r2, #3042
+	ldr	r0, .L1771+20
 	bl	printf
-	ldr	r3, [r8, #0]
-	ldr	r0, .L1635+40
-	mov	r1, r4
-	adds	r3, r3, r7
-	strh	r6, [r0, #40]	@ movhi
-	ldr	r2, [r3, #8]
-	bl	FtlMapWritePage
-.L1633:
-	ldrh	r3, [sl, #8]
-	cmp	r3, r4
-	beq	.L1634
-	ldr	r1, .L1635+4
-	movw	r2, #529
-	ldr	r0, .L1635+8
+	ldr	r1, .L1771+24
+	ldr	r0, .L1771+28
 	bl	printf
-	ldr	r0, .L1635+12
-	ldr	r1, .L1635+16
+.L1766:
+	ldrh	r3, [r5]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1771+32
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	add	r3, r3, r2
+	ldr	r2, .L1771+36
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	ble	.L1770
+	ldr	r1, .L1771+16
+	movw	r2, #3045
+	ldr	r0, .L1771+20
 	bl	printf
-.L1634:
-	ldr	r3, .L1635+44
-	movs	r1, #0
-	ldr	r3, [r3, #0]
-	adds	r2, r3, r7
-	strh	r4, [r3, r7]	@ movhi
-	str	r1, [r2, #4]
-.L1632:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1636:
+	ldr	r1, .L1771+24
+	ldr	r0, .L1771+28
+	bl	printf
+.L1770:
+	movs	r3, #1
+	b	.L1761
+.L1763:
+	ldr	r2, .L1771+40
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1761
+	ldr	r2, .L1771+44
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	beq	.L1761
+	ldr	r2, .L1771+48
+	ldrh	r2, [r2]
+	cmp	r2, r0
+	bne	.L1764
+.L1761:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1762:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L1761
+.L1772:
 	.align	2
-.L1635:
-	.word	.LANCHOR70
-	.word	.LANCHOR220
-	.word	.LC3
+.L1771:
+	.word	.LANCHOR82
+	.word	.LANCHOR201
+	.word	.LANCHOR84
+	.word	.LANCHOR81
+	.word	.LANCHOR203
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR114
-	.word	.LANCHOR61
-	.word	.LANCHOR198
-	.word	.LANCHOR184
-	.word	.LC38
-	.word	.LANCHOR110
-	.word	.LANCHOR102
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.log2phys,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR87
+	.word	.LANCHOR38
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
-	.global	log2phys
+	.global	decrement_vpc_count
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	log2phys, %function
-log2phys:
+	.fpu softvfp
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1647
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #1
-	ldrh	r3, [r3, #0]
-	mov	r6, r1
-	mov	r7, r2
-	adds	r3, r3, #7
-	lsr	r4, r0, r3
-	lsl	r5, r5, r3
-	ldr	r3, .L1647+4
-	subs	r5, r5, #1
-	ands	r5, r5, r0
-	uxth	r4, r4
-	ldr	r3, [r3, #0]
-	uxth	r5, r5
+	movw	r3, #65535
+	push	{r4, r5, r6, lr}
 	cmp	r0, r3
-	bcc	.L1638
-	ldr	r1, .L1647+8
-	movw	r2, #851
-	ldr	r0, .L1647+12
+	mov	r4, r0
+	beq	.L1774
+	ldr	r5, .L1782
+	ldr	r3, [r5]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L1775
+	mov	r1, r0
+	ldr	r0, .L1782+4
 	bl	printf
-	ldr	r0, .L1647+16
-	ldr	r1, .L1647+20
+	ldr	r3, [r5]
+	ldrh	r5, [r3, r4, lsl #1]
+	cbz	r5, .L1776
+.L1780:
+	movs	r5, #0
+.L1773:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1776:
+	movw	r2, #3060
+.L1781:
+	ldr	r1, .L1782+8
+	ldr	r0, .L1782+12
 	bl	printf
-.L1638:
-	ldr	r3, .L1647+24
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1647+28
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	mov	r8, r3
-	b	.L1639
-.L1645:
-	adds	r3, r3, #12
-	adds	r0, r2, r3
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r4
-	bne	.L1640
-.L1641:
-	ldr	r2, .L1647+28
-	movs	r3, #12
-	ldr	r2, [r2, #0]
-	mla	r3, r3, r8, r2
-	cbnz	r7, .L1642
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r5, lsl #2]
-	str	r3, [r6, #0]
-	b	.L1643
-.L1642:
-	ldr	r1, [r6, #0]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r5, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L1647+32
-	strh	r4, [r3, #0]	@ movhi
-.L1643:
-	ldr	r3, .L1647+28
-	movs	r2, #12
-	ldr	r3, [r3, #0]
-	mla	r3, r2, r8, r3
-	ldr	r2, [r3, #4]
-	adds	r0, r2, #1
-	beq	.L1644
-	adds	r2, r2, #1
-	str	r2, [r3, #4]
-.L1644:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1640:
-	add	r8, r8, #1
-	uxth	r8, r8
-.L1639:
-	cmp	r8, r1
-	bne	.L1645
-	bl	select_l2p_ram_region
-	movs	r3, #12
-	ldr	r2, .L1647+28
-	ldr	r2, [r2, #0]
-	mul	r3, r3, r0
-	mov	r8, r0
-	adds	r1, r2, r3
-	ldrh	r2, [r2, r3]
+	ldr	r1, .L1782+16
+	ldr	r0, .L1782+20
+	bl	printf
+	b	.L1773
+.L1775:
+	subs	r2, r2, #1
+	strh	r2, [r3, r0, lsl #1]	@ movhi
+.L1774:
+	ldr	r6, .L1782+24
 	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1646
-	ldr	r3, [r1, #4]
-	cmp	r3, #0
-	bge	.L1646
-	bl	flush_l2p_region
-.L1646:
-	mov	r0, r4
-	mov	r1, r8
-	bl	load_l2p_region
-	b	.L1641
-.L1648:
+	ldrh	r0, [r6]
+	cmp	r0, r3
+	bne	.L1778
+	strh	r4, [r6]	@ movhi
+	b	.L1780
+.L1778:
+	cmp	r4, r0
+	beq	.L1780
+	bl	update_vpc_list
+	ldr	r3, .L1782+28
+	adds	r5, r0, #0
+	ldr	r2, .L1782+32
+	it	ne
+	movne	r5, #1
+	strh	r4, [r6]	@ movhi
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	subs	r3, r3, r2
+	asrs	r2, r3, #1
+	ldr	r3, .L1782+36
+	muls	r3, r2, r3
+	ldr	r2, .L1782
+	ldr	r2, [r2]
+	uxth	r1, r3
+	ldrh	r2, [r2, r1, lsl #1]
+	cmp	r2, #0
+	bne	.L1773
+	cmp	r4, r1
+	beq	.L1773
+	movw	r2, #3082
+	b	.L1781
+.L1783:
 	.align	2
-.L1647:
-	.word	.LANCHOR60
-	.word	.LANCHOR76
-	.word	.LANCHOR221
-	.word	.LC3
+.L1782:
+	.word	.LANCHOR82
+	.word	.LC31
+	.word	.LANCHOR204
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.word	.LANCHOR103
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR130
+	.word	.LANCHOR81
+	.word	.LANCHOR80
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
-	.global	FtlReUsePrevPpa
+	.global	FtlSlcSuperblockCheck
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r6, r0
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r3, .L1656
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r0, lsl #1]
+	ldrh	r3, [r0, #4]
+	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	cmp	r2, #0
-	bne	.L1650
-	ldr	r3, .L1656+4
-	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	beq	.L1651
-	ldr	r1, .L1656+8
-	movs	r5, #6
-	ldr	r0, .L1656+12
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L1656+16
-	ldr	r1, [r1, #0]
-	subs	r3, r3, r1
-	asrs	r3, r3, #1
-	muls	r3, r0, r3
-	movw	r0, #65535
-	uxth	r3, r3
-	b	.L1652
-.L1655:
-	cmp	r3, r4
-	bne	.L1653
-	ldr	r5, .L1656+8
-	mov	r1, r4
-	ldr	r0, .L1656+4
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1654
-	ldr	r1, .L1656+20
-	movw	r2, #1823
-	ldr	r0, .L1656+24
-	bl	printf
-	ldr	r0, .L1656+28
-	ldr	r1, .L1656+32
-	bl	printf
-.L1654:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
+	beq	.L1784
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1784
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r5, .L1795
+	ldr	r6, .L1795+4
+	adds	r3, r3, #8
+	ldrh	r3, [r0, r3, lsl #1]
+.L1788:
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L1790
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1791
+	ldrb	r1, [r5]	@ zero_extendqisi2
+	cbnz	r1, .L1791
+	ldrh	r1, [r4, #2]
+	ldrh	r1, [r6, r1, lsl #1]
+	cmp	r1, r2
+	bne	.L1791
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4]
 	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r3, .L1656
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	b	.L1650
-.L1653:
-	muls	r3, r5, r3
-	ldrh	r3, [r1, r3]
-	cmp	r3, r0
-	beq	.L1651
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L1652:
-	cmp	r2, r7
-	bne	.L1655
-	b	.L1651
-.L1650:
-	adds	r2, r2, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1651:
-	mov	r0, r6
-	add	r1, sp, #4
-	movs	r2, #1
-	bl	log2phys
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L1657:
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	ldrh	r2, [r4, #4]
+	cbnz	r2, .L1790
+	ldrh	r3, [r4, #2]
+	strb	r2, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L1790:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r2, .L1795+8
+	adds	r3, r3, #1
+	ldrh	r2, [r2]
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1789
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1789:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+	b	.L1788
+.L1791:
+	ldrb	r2, [r5]	@ zero_extendqisi2
+	cbz	r2, .L1784
+	cmp	r3, #1
+	bne	.L1784
+	ldr	r3, .L1795+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L1784
+	ldr	r3, .L1795+16
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldr	r2, .L1795+20
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r2, [r2]
+	strh	r2, [r4, #2]	@ movhi
+.L1784:
+	pop	{r4, r5, r6, pc}
+.L1796:
 	.align	2
-.L1656:
-	.word	.LANCHOR89
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	-1431655765
-	.word	.LANCHOR87
-	.word	.LANCHOR222
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
-	.section	.text.FtlProgPages,"ax",%progbits
+.L1795:
+	.word	.LANCHOR8
+	.word	.LANCHOR117
+	.word	.LANCHOR36
+	.word	.LANCHOR52
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.get_new_active_ppa,"ax",%progbits
 	.align	1
-	.global	FtlProgPages
+	.global	get_new_active_ppa
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlProgPages, %function
-FtlProgPages:
-	@ args = 0, pretend = 0, frame = 16
+	.fpu softvfp
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r3
-	ldr	r3, .L1674
-	mov	r5, r0
-	str	r1, [sp, #4]
-	ldrb	r7, [r3, #0]	@ zero_extendqisi2
-	cbz	r7, .L1659
-	ldrb	r7, [r4, #8]	@ zero_extendqisi2
-	sub	r2, r7, #1
-	rsbs	r7, r2, #0
-	adc	r7, r7, r2
-.L1659:
-	mov	r0, r5
-	ldr	r1, [sp, #4]
-	mov	r2, r7
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	mov	sl, #0
-	ldr	r6, .L1674+4
-	ldr	fp, .L1674+36
-	b	.L1660
-.L1663:
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r4, #0]
-	cmp	r3, r0
-	bne	.L1661
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r2, r3, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r2, r3, lsl #1]	@ movhi
-	ldr	r2, .L1674+8
-	strb	r8, [r4, #6]
-	strh	r8, [r4, #4]	@ movhi
-	ldrh	r3, [r2, #0]
-	strh	r3, [r4, #2]	@ movhi
-.L1661:
+	ldrh	r2, [r0]
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	cmp	r2, r3
+	bne	.L1798
+	ldr	r1, .L1819
+	movw	r2, #2982
+	ldr	r0, .L1819+4
+	bl	printf
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
+	bl	printf
+.L1798:
+	ldr	r5, .L1819+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1799
+	ldr	r1, .L1819
+	movw	r2, #2983
+	ldr	r0, .L1819+4
+	bl	printf
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
+	bl	printf
+.L1799:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1662
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.L1662:
-	ldr	r0, [r5, #4]
-	ldr	r3, [fp, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [fp, #96]
-	bl	FtlGcMarkBadPhyBlk
-	mov	r0, r4
-	bl	get_new_active_ppa
-	movs	r1, #1
-	mov	r2, r7
-	str	r0, [r5, #4]
-	str	r0, [sp, #12]
-	mov	r0, r5
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	b	.L1672
-.L1673:
-	mov	r8, #0
-.L1672:
-	ldr	r3, [r5, #0]
-	adds	r3, r3, #1
-	beq	.L1663
-	ldr	r3, .L1674+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L1664
-	ldr	r1, .L1674+16
-	movw	r2, #1550
-	ldr	r0, .L1674+20
-	bl	printf
-	ldr	r0, .L1674+24
-	ldr	r1, .L1674+28
+	cbnz	r3, .L1800
+	ldr	r1, .L1819
+	movw	r2, #2984
+	ldr	r0, .L1819+4
 	bl	printf
-.L1664:
-	ldr	r3, [r5, #4]
-	str	r3, [sp, #12]
-	cbz	r7, .L1665
-	orr	r3, r3, #-2147483648
-	str	r3, [sp, #12]
-.L1665:
-	movs	r2, #1
-	ldr	r0, [r5, #16]
-	add	r1, sp, #12
-	bl	log2phys
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #12]
-	adds	r3, r0, #1
-	beq	.L1666
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, [r6, #0]
-	ldrh	r2, [r3, r0, lsl #1]
-	mov	r8, r0
-	cbnz	r2, .L1667
-	ldr	r0, .L1674+32
-	mov	r1, r8
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
 	bl	printf
-.L1667:
-	mov	r0, r8
+.L1800:
+	movs	r3, #0
+	ldr	r7, .L1819+20
+	strb	r3, [r4, #10]
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldr	r6, .L1819+24
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+.L1801:
+	movw	r0, #65535
+	cmp	r2, r0
+	beq	.L1802
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldrh	r1, [r4, #2]
+	cmp	r3, #1
+	ldrh	r3, [r4, #4]
+	bne	.L1804
+	ldrb	ip, [r6]	@ zero_extendqisi2
+	cmp	ip, #0
+	bne	.L1804
+	ldr	ip, .L1819+28
+	ldrh	ip, [ip, r1, lsl #1]
+	cmp	ip, r0
+	bne	.L1804
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-.L1666:
-	add	sl, sl, #1
-	adds	r5, r5, #36
-.L1660:
-	ldr	r3, [sp, #4]
-	cmp	sl, r3
-	bne	.L1673
-	ldr	r3, .L1674+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
-	ldrh	r3, [r3, #0]
+.L1802:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r7]
+	adds	r3, r3, #1
+	uxtb	r3, r3
 	cmp	r2, r3
-	bcc	.L1658
-	ldr	r1, .L1674+16
-	movw	r2, #1567
-	ldr	r0, .L1674+20
+	strb	r3, [r4, #6]
+	bne	.L1803
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+.L1803:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r2, [r4, r3, lsl #1]
+	b	.L1801
+.L1804:
+	ldr	r8, .L1819+24
+	orr	r6, r1, r2, lsl #10
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+.L1805:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movw	r2, #65535
+	ldrh	r0, [r7]
+.L1807:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r0
+	itttt	eq
+	ldrheq	r3, [r4, #2]
+	addeq	r3, r3, #1
+	strheq	r3, [r4, #2]	@ movhi
+	moveq	r3, #0
+	add	r1, r3, #8
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r2
+	beq	.L1807
+	strb	r3, [r4, #6]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1808
+	ldrb	r1, [r8]	@ zero_extendqisi2
+	ldrh	r3, [r4, #2]
+	cbnz	r1, .L1809
+	ldr	r1, .L1819+28
+	ldrh	r3, [r1, r3, lsl #1]
+	cmp	r3, r2
+	bne	.L1808
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1808
+	subs	r3, r3, #1
+	ldrh	r0, [r4]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1805
+.L1809:
+	ldr	r2, .L1819+32
+	ldrh	r2, [r2]
+	cmp	r3, r2
+	bcc	.L1808
+	ldr	r3, .L1819+36
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	movs	r3, #0
+	ldrh	r2, [r5]
+	strh	r3, [r4, #4]	@ movhi
+	strb	r3, [r4, #6]
+	strh	r2, [r4, #2]	@ movhi
+.L1808:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r5]
+	cmp	r2, r3
+	bne	.L1797
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1797
+	ldr	r1, .L1819
+	movw	r2, #3028
+	ldr	r0, .L1819+4
 	bl	printf
-	ldr	r0, .L1674+24
-	ldr	r1, .L1674+28
+	ldr	r1, .L1819+8
+	ldr	r0, .L1819+12
 	bl	printf
-.L1658:
-	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1675:
+.L1797:
+	mov	r0, r6
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1820:
 	.align	2
-.L1674:
-	.word	.LANCHOR7
-	.word	.LANCHOR89
-	.word	.LANCHOR56
-	.word	.LANCHOR41
-	.word	.LANCHOR223
-	.word	.LC3
+.L1819:
+	.word	.LANCHOR205
 	.word	.LC4
 	.word	.LC5
-	.word	.LC39
-	.word	.LANCHOR132
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR51
+	.word	.LANCHOR36
+	.word	.LANCHOR8
+	.word	.LANCHOR117
+	.word	.LANCHOR52
+	.word	.LANCHOR82
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlVpcTblFlush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L1678
-	ldr	r0, [r4, #0]
-	cbz	r0, .L1677
-	ldr	r3, .L1678+4
-	movs	r1, #1
-	movs	r2, #0
-	ldr	r3, [r3, #0]
-	bl	FtlProgPages
+	ldr	r3, .L1841
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r1, [r3]
+	str	r3, [sp]
+	cmp	r1, #0
+	bne	.L1823
+	ldr	r3, .L1841+4
+	ldr	r7, .L1841+8
+	ldr	r8, .L1841+104
+	ldr	r4, .L1841+12
+	ldr	r6, [r7]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	str	r6, [r4, #12]
+	str	r0, [r4, #8]
+	strh	r2, [r6, #2]	@ movhi
+	movw	r2, #61604
+	ldr	r5, .L1841+16
+	strh	r2, [r6]	@ movhi
+	ldr	r2, [r3, #8]
+	ldrh	r3, [r3, #6]
+	str	r1, [r6, #8]
+	str	r2, [r6, #4]
+	strh	r3, [r5, #8]	@ movhi
+	ldr	r3, .L1841+20
+	ldr	ip, .L1841+108
+	ldr	r2, .L1841+24
+	ldrh	r3, [r3]
+	str	r1, [r6, #12]
+	stm	r5, {r2, ip}
+	strb	r3, [r5, #10]
+	ldr	r3, .L1841+28
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #14]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #11]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1841+32
+	strh	r2, [r5, #16]	@ movhi
+	ldrh	r2, [r3]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r5, #18]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #12]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1841+36
+	strh	r2, [r5, #20]	@ movhi
+	ldrh	r2, [r3]
+	strh	r2, [r5, #22]	@ movhi
+	ldrh	r1, [r3, #2]
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	strb	r3, [r5, #13]
+	orr	r2, r2, r1, lsl #6
+	ldr	r3, .L1841+40
+	movs	r1, #255
+	strh	r2, [r5, #24]	@ movhi
+	ldr	r3, [r3]
+	str	r3, [r5, #32]
+	ldr	r3, .L1841+44
+	ldr	r3, [r3]
+	str	r3, [r5, #40]
+	ldr	r3, .L1841+48
+	ldr	r3, [r3]
+	str	r3, [r5, #36]
+	ldr	r3, .L1841+52
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	mov	r1, r5
+	ldr	r5, .L1841+56
+	movs	r2, #48
+	ldr	r0, [r4, #8]
+	bl	ftl_memcpy
+	ldrh	r2, [r5]
+	ldr	r3, .L1841+60
+	ldr	r0, [r4, #8]
+	ldr	r1, [r3]
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	bl	ftl_memcpy
+	ldrh	r0, [r5]
+	ldr	r3, [r4, #8]
+	ldr	r1, .L1841+64
+	lsrs	r2, r0, #3
+	adds	r0, r0, #24
+	lsls	r0, r0, #1
+	ldr	r1, [r1]
+	adds	r2, r2, #4
+	bic	r0, r0, #3
+	add	r0, r0, r3
+	bl	ftl_memcpy
+	ldr	r3, .L1841+68
+	str	r7, [sp, #4]
+	ldrh	r3, [r3]
+	cbz	r3, .L1824
+	ldrh	r0, [r5]
+	ldr	r3, .L1841+72
+	ldr	r1, .L1841+76
+	ldrh	r2, [r3]
+	lsrs	r3, r0, #3
+	ldr	r1, [r1]
+	add	r3, r3, r0, lsl #1
+	ldr	r0, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r0, r0, r3, lsl #2
+	bl	ftl_memcpy
+.L1824:
+	ldr	r5, .L1841+4
+	movs	r7, #0
+	movw	fp, #65535
+	movs	r0, #0
+	bl	FtlUpdateVaildLpn
+	mov	r10, r5
+.L1825:
+	ldr	r3, [r8]
+	ldrh	r2, [r5]
+	ldr	r0, .L1841+12
+	str	r3, [r4, #8]
+	ldr	r3, [sp, #4]
+	ldr	r3, [r3]
+	str	r3, [r4, #12]
+	ldrh	r3, [r5, #2]
+	orr	r3, r3, r2, lsl #10
+	str	r3, [r4, #4]
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, .L1841+80
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r3]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1826
+	ldrh	r3, [r5]
+	ldrh	fp, [r5, #4]
+	strh	r3, [r5, #4]	@ movhi
 	movs	r3, #0
-	str	r3, [r4, #0]
-.L1677:
+	strh	r3, [r5, #2]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r2, .L1841+44
+	strh	r0, [r5]	@ movhi
+	ldr	r3, [r2]
+	adds	r1, r3, #1
+	str	r3, [r5, #8]
+	str	r1, [r2]
+	lsls	r2, r0, #10
+	str	r2, [r4, #4]
+	str	r3, [r6, #4]
+	movs	r3, #1
+	strh	r0, [r6, #2]	@ movhi
+	mov	r2, r3
+	mov	r1, r3
+	ldr	r0, .L1841+12
+	bl	FlashProgPages
+.L1826:
+	ldrh	r3, [r10, #2]
+	ldr	r2, [r4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	adds	r1, r2, #1
+	strh	r3, [r10, #2]	@ movhi
+	bne	.L1827
+	cmp	r3, #1
+	bne	.L1828
+	ldr	r1, .L1841+84
+	movw	r2, #1180
+	ldr	r0, .L1841+88
+	bl	printf
+	ldr	r1, .L1841+92
+	ldr	r0, .L1841+96
+	bl	printf
+.L1828:
+	ldrh	r3, [r10, #2]
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r3, #1
+	itttt	eq
+	ldreq	r3, .L1841+80
+	ldrheq	r3, [r3]
+	addeq	r3, r3, #-1
+	strheq	r3, [r10, #2]	@ movhi
+	cmp	r7, #3
+	bls	.L1825
+	mov	r2, r7
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1841+100
+	bl	printf
+	ldr	r2, [sp]
+	movs	r3, #1
+	str	r3, [r2]
+.L1823:
 	movs	r0, #0
-	pop	{r4, pc}
-.L1679:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1827:
+	cmp	r3, #1
+	beq	.L1825
+	cmp	r2, #256
+	beq	.L1825
+	movw	r3, #65535
+	cmp	fp, r3
+	beq	.L1823
+	movs	r1, #1
+	mov	r0, fp
+	bl	FtlFreeSysBlkQueueIn
+	b	.L1823
+.L1842:
 	.align	2
-.L1678:
-	.word	.LANCHOR125
-	.word	.LANCHOR224
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.thumb
-	.thumb_func
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1682
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L1681
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	movs	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1681:
-	movs	r0, #0
-	pop	{r3, pc}
-.L1683:
+.L1841:
+	.word	.LANCHOR75
+	.word	.LANCHOR206
+	.word	.LANCHOR185
+	.word	.LANCHOR199
+	.word	.LANCHOR135
+	.word	.LANCHOR43
+	.word	1179929683
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR165
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR56
+	.word	.LANCHOR38
+	.word	.LANCHOR82
+	.word	.LANCHOR0
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR128
+	.word	.LANCHOR52
+	.word	.LANCHOR207
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC32
+	.word	.LANCHOR79
+	.word	1342177351
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1858
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	sub	sp, sp, #40
+	ldrb	r5, [r3]	@ zero_extendqisi2
+	cbz	r5, .L1857
+	ldrb	r5, [r0, #8]	@ zero_extendqisi2
+	cmp	r5, #1
+	bne	.L1852
+	ldrh	r6, [r0, #4]
+.L1844:
+	ldr	r7, .L1858+4
+	ldr	r8, .L1858+20
+.L1845:
+	adds	r6, r6, #-1
+	bcc	.L1847
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1846
+.L1847:
+	ldr	r3, .L1858+8
+	ldrh	r1, [r4]
+	ldrh	r0, [r4, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldr	r3, .L1858+12
+	ldrh	r3, [r3]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	add	sp, sp, #40
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1852:
+	movs	r5, #0
+.L1857:
+	movs	r6, #12
+	b	.L1844
+.L1846:
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1847
+	ldr	r1, [r8]
+	mov	r3, #-1
+	ldr	r2, [r7]
+	ldr	r0, .L1858+16
+	str	r3, [sp, #20]
+	str	r1, [sp, #16]
+	str	r2, [sp, #12]
+	str	r3, [r1, #12]
+	ldr	r2, [r0]
+	str	r3, [r1, #8]
+	ldrh	r3, [r4]
+	str	r2, [r1, #4]
+	adds	r2, r2, #1
+	strh	r3, [r1, #2]	@ movhi
+	movs	r3, #0
+	strh	r3, [r1]	@ movhi
+	adds	r1, r2, #1
+	it	eq
+	moveq	r2, r3
+	movs	r1, #1
+	str	r2, [r0]
+	mov	r2, r5
+	add	r0, sp, #4
+	bl	FlashProgPages
+	ldrh	r0, [r4]
+	bl	decrement_vpc_count
+	b	.L1845
+.L1859:
 	.align	2
-.L1682:
+.L1858:
+	.word	.LANCHOR8
+	.word	.LANCHOR79
 	.word	.LANCHOR82
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",%progbits
+	.word	.LANCHOR51
+	.word	.LANCHOR158
+	.word	.LANCHOR185
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlDeInit
+	.global	FtlLoadFactoryBbt
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlDeInit, %function
-FtlDeInit:
+	.fpu softvfp
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1686
-	ldr	r3, [r3, #0]
-	cmp	r3, #1
-	bne	.L1685
-	bl	FtlSysFlush
-.L1685:
+	ldr	r3, .L1870
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r6, #0
+	ldr	r5, .L1870+4
+	ldr	r3, [r3]
+	ldr	r7, .L1870+8
+	ldr	r10, .L1870+20
+	str	r3, [r5, #8]
+	ldr	r3, .L1870+12
+	ldr	r8, [r3]
+	str	r8, [r5, #12]
+.L1861:
+	ldr	r3, .L1870+16
+	ldrh	r3, [r3]
+	cmp	r6, r3
+	bcc	.L1866
 	movs	r0, #0
-	pop	{r3, pc}
-.L1687:
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1866:
+	ldrh	r4, [r10]
+	movw	r3, #65535
+	ldr	fp, .L1870+4
+	strh	r3, [r7, #2]!	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1862:
+	ldrh	r3, [r10]
+	sub	r2, r3, #15
+	cmp	r2, r4
+	bgt	.L1864
+	mla	r3, r6, r3, r4
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, fp
+	lsls	r3, r3, #10
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L1863
+	ldrh	r2, [r8]
+	movw	r3, #61664
+	cmp	r2, r3
+	bne	.L1863
+	strh	r4, [r7]	@ movhi
+.L1864:
+	adds	r6, r6, #1
+	b	.L1861
+.L1863:
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1862
+.L1871:
 	.align	2
-.L1686:
-	.word	.LANCHOR225
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",%progbits
+.L1870:
+	.word	.LANCHOR79
+	.word	.LANCHOR199
+	.word	.LANCHOR73+10
+	.word	.LANCHOR185
+	.word	.LANCHOR43
+	.word	.LANCHOR49
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	rk_ftl_de_init
+	.global	FtlGetLastWrittenPage
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	rk_nand_de_init
-	bl	FtlDeInit
-	pop	{r3, lr}
-	b	rk_nand_de_init
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, lr}
+	it	eq
+	ldreq	r3, .L1884
+	sub	sp, sp, #104
+	lsl	r7, r0, #10
+	mov	r2, r1
+	it	ne
+	ldrne	r3, .L1884+4
+	mov	r8, r1
+	movs	r6, #0
+	movs	r1, #1
+	add	r0, sp, #4
+	ldrh	r5, [r3]
+	add	r3, sp, #40
+	str	r3, [sp, #16]
+	str	r6, [sp, #12]
+	subs	r5, r5, #1
+	sxth	r5, r5
+	orr	r3, r5, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1875
+.L1876:
+	cmp	r6, r5
+	ble	.L1879
+.L1875:
+	mov	r0, r5
+	add	sp, sp, #104
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1879:
+	adds	r3, r6, r5
+	mov	r2, r8
+	add	r3, r3, r3, lsr #31
+	movs	r1, #1
+	add	r0, sp, #4
+	asrs	r4, r3, #1
+	sxth	r3, r4
+	orrs	r3, r3, r7
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1877
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L1877
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	beq	.L1877
+	subs	r4, r4, #1
+	sxth	r5, r4
+	b	.L1876
+.L1877:
+	adds	r4, r4, #1
+	sxth	r6, r4
+	b	.L1876
+.L1885:
+	.align	2
+.L1884:
+	.word	.LANCHOR52
+	.word	.LANCHOR51
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeTempBlock
+	.global	FtlLoadBbt
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1707
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1707+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1703
-	ldr	r0, .L1707+8
-	movw	r3, #65535
-	ldrh	r4, [r0, #0]
-	cmp	r4, r3
-	beq	.L1691
-	bl	FtlGcScanTempBlk
-	str	r0, [sp, #4]
-	adds	r0, r0, #1
-	beq	.L1691
-	ldr	r3, .L1707+12
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	cmp	r2, #4
-	bls	.L1692
-	subs	r2, r2, #5
-	movs	r0, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	bl	FtlEctTblFlush
-.L1692:
-	ldr	r3, .L1707+16
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L1693
-	ldr	r3, .L1707+20
-	ldr	r0, [sp, #4]
-	ldr	r2, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r2, r2, #1
-	str	r2, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1693:
-	ldr	r3, .L1707+16
-	movs	r2, #0
-	movs	r4, #1
-	str	r2, [r3, #0]
-	b	.L1690
-.L1691:
-	ldr	r5, .L1707+8
-	movs	r4, #0
-	ldr	r3, .L1707+16
-	ldrh	r2, [r5, #0]
-	str	r4, [r3, #0]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1690
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1707+24
-	ldr	r1, .L1707
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r1, #0]
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1694
-	ldr	r1, .L1707+28
-	movs	r2, #163
-	ldr	r0, .L1707+32
-	bl	printf
-	ldr	r0, .L1707+36
-	ldr	r1, .L1707+40
-	bl	printf
-.L1694:
-	ldr	r3, .L1707+8
-	movs	r5, #0
-	ldr	r2, .L1707+44
-	ldr	r4, .L1707
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r4, #0]
-	ldrb	r0, [r3, #7]	@ zero_extendqisi2
-	muls	r0, r4, r0
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldr	r1, .L1707+48
-	ldr	r2, .L1707+24
-	ldr	fp, .L1707+80
-	ldr	r0, [r1, #0]
-	mov	sl, r2
-	ldrh	r4, [r2, #0]
-	ldr	r8, .L1707+84
-	adds	r0, r4, r0
-	str	r0, [r1, #0]
-	b	.L1695
-.L1699:
-	ldr	r7, [fp, #0]
-	movs	r6, #12
-	muls	r6, r5, r6
-	ldr	r3, [r8, #0]
-	adds	r4, r7, r6
-	ldr	r2, [r4, #8]
-	cmp	r2, r3
-	bcc	.L1696
-	ldr	r1, .L1707+28
-	movs	r2, #168
-	ldr	r0, .L1707+32
-	bl	printf
-	ldr	r0, .L1707+36
-	ldr	r1, .L1707+40
-	bl	printf
-.L1696:
-	movs	r2, #0
-	ldr	r0, [r4, #8]
-	add	r1, sp, #4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	ldr	r3, [r7, r6]
-	cmp	r0, r3
-	bne	.L1697
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	adds	r1, r4, #4
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	movs	r3, #0
+	ldr	r4, .L1915
+	ldr	r7, .L1915+4
+	str	r3, [r4, #8]
+	mov	r8, r4
+	ldr	r3, .L1915+8
+	ldr	r6, [r3]
+	str	r6, [r4, #12]
+	bl	FtlBbtMemInit
+	ldrh	r5, [r7]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1887:
+	ldrh	r3, [r7]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L1890
+	lsls	r3, r5, #10
 	movs	r2, #1
-	mov	r6, r0
-	ldr	r0, [r4, #8]
-	bl	log2phys
-	mov	r0, r6
-	b	.L1706
-.L1697:
+	mov	r1, r2
+	mov	r0, r8
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L1888
 	ldr	r3, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r8
+	adds	r3, r3, #1
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+.L1888:
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1889
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1889
+	ldr	r3, .L1915+12
+	ldr	r2, [r6, #4]
+	strh	r5, [r3]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r6, #8]
+	strh	r2, [r3, #4]	@ movhi
+.L1890:
+	ldr	r5, .L1915+12
+	movw	r2, #65535
+	ldrh	r3, [r5]
+	cmp	r3, r2
+	beq	.L1904
+	ldrh	r3, [r5, #4]
+	cmp	r3, r2
+	beq	.L1894
+	lsls	r3, r3, #10
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, .L1915
+	str	r3, [r4, #4]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1894
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1894
+	ldr	r3, [r6, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1894
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r6, #8]
+	strh	r2, [r5]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1894:
+	ldr	r8, .L1915+48
+	movs	r1, #1
+	ldr	r10, .L1915
+	ldrh	r0, [r5]
+	bl	FtlGetLastWrittenPage
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L1896:
+	cmp	r7, #0
+	bge	.L1899
+	ldr	r1, .L1915+16
+	mov	r2, #336
+	ldr	r0, .L1915+20
+	bl	printf
+	ldr	r1, .L1915+24
+	ldr	r0, .L1915+28
+	bl	printf
+.L1898:
+	ldrh	r3, [r6, #10]
+	ldrh	r0, [r6, #12]
+	strh	r3, [r5, #6]	@ movhi
+	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1698
-	ldr	r3, .L1707+8
-	ldrh	r0, [r3, #0]
-.L1706:
-	bl	decrement_vpc_count
-.L1698:
-	adds	r5, r5, #1
+	beq	.L1901
+	ldr	r3, .L1915+32
+	ldr	r2, [r3]
+	cmp	r0, r2
+	beq	.L1901
+	ldr	r3, .L1915+36
+	ldrh	r3, [r3]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1901
+	cmp	r0, r3
+	bcs	.L1901
+	bl	FtlSysBlkNumInit
+.L1901:
+	ldr	r6, .L1915+40
+	movs	r5, #0
+	ldr	r7, .L1915+44
+	ldr	r8, .L1915+52
+.L1902:
+	ldrh	r3, [r7]
+	cmp	r5, r3
+	bcc	.L1903
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1889:
+	subs	r5, r5, #1
 	uxth	r5, r5
-.L1695:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L1699
-	movw	r0, #65535
-	ldr	r4, .L1707+8
-	bl	decrement_vpc_count
-	ldr	r3, .L1707+52
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1700
-	ldr	r0, .L1707+56
-	ldrh	r1, [r4, #0]
-	bl	printf
-.L1700:
-	ldr	r3, .L1707+44
-	ldrh	r0, [r4, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1701
-	bl	INSERT_DATA_LIST
-	b	.L1702
-.L1701:
-	bl	INSERT_FREE_LIST
-.L1702:
-	ldr	r3, .L1707+8
-	movw	r5, #65535
-	movs	r4, #0
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1707+24
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1707+60
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	ldr	r3, .L1707+64
-	ldr	r2, .L1707+68
-	movs	r1, #3
-	ldrh	r3, [r3, #0]
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
-	cmp	r3, r2, lsr #2
-	ble	.L1690
-	ldr	r3, .L1707+72
-	movs	r2, #20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1707+76
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1690
-.L1703:
-	movs	r4, #0
-.L1690:
-	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1708:
+	b	.L1887
+.L1899:
+	ldrh	r3, [r5]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r10
+	orr	r3, r7, r3, lsl #10
+	str	r3, [r4, #4]
+	ldr	r3, [r8]
+	str	r3, [r4, #8]
+	bl	FlashReadPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	beq	.L1897
+	ldrh	r2, [r6]
+	movw	r3, #61649
+	cmp	r2, r3
+	beq	.L1898
+.L1897:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L1896
+.L1903:
+	ldrh	r2, [r8]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r6, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r5, r2, r1
+	adds	r5, r5, #1
+	bl	ftl_memcpy
+	b	.L1902
+.L1904:
+	mov	r0, #-1
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1916:
 	.align	2
-.L1707:
-	.word	.LANCHOR56
-	.word	.LANCHOR82
-	.word	.LANCHOR99
-	.word	.LANCHOR84
-	.word	.LANCHOR128
-	.word	.LANCHOR132
-	.word	.LANCHOR135
-	.word	.LANCHOR226
-	.word	.LC3
+.L1915:
+	.word	.LANCHOR199
+	.word	.LANCHOR49
+	.word	.LANCHOR185
+	.word	.LANCHOR73
+	.word	.LANCHOR208
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR89
-	.word	.LANCHOR158
-	.word	.LANCHOR7
-	.word	.LC40
-	.word	.LANCHOR133
-	.word	.LANCHOR94
-	.word	.LANCHOR201
-	.word	.LANCHOR202
-	.word	.LANCHOR173
-	.word	.LANCHOR136
-	.word	.LANCHOR76
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
-	.align	1
-	.global	Ftl_gc_temp_data_write_back
-	.thumb
-	.thumb_func
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1718
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1718+4
-	cbz	r2, .L1710
-	ldr	r2, [r3, #0]
-	lsls	r2, r2, #31
-	bpl	.L1710
-	ldr	r2, .L1718+8
-	ldrh	r2, [r2, #4]
-	cmp	r2, #0
-	bne	.L1715
-.L1710:
-	ldr	r4, .L1718+12
-	movs	r2, #0
-	ldr	r1, [r3, #0]
-	mov	r3, r2
-	movs	r5, #0
-	ldr	r7, .L1718+4
-	ldr	r0, [r4, #0]
-	movs	r6, #36
-	bl	FlashProgPages
-	b	.L1712
-.L1714:
-	mul	r3, r6, r5
-	ldr	r1, [r4, #0]
-	adds	r2, r1, r3
-	ldr	r1, [r1, r3]
-	adds	r0, r1, #1
-	bne	.L1713
-	ldr	r3, .L1718+8
-	movs	r5, #0
-	ldr	r0, .L1718+16
-	ldrh	r4, [r3, #0]
-	ldr	r0, [r0, #0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L1718+20
-	ldr	r0, [r2, #4]
-	ldr	r1, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r1, r1, #1
-	str	r1, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-	b	.L1717
-.L1713:
-	ldr	r3, [r2, #12]
-	adds	r5, r5, #1
-	ldr	r1, [r2, #4]
-	uxth	r5, r5
-	ldr	r0, [r3, #12]
-	ldr	r2, [r3, #8]
-	bl	FtlGcUpdatePage
-.L1712:
-	ldr	r1, [r7, #0]
-	cmp	r5, r1
-	bcc	.L1714
-	ldr	r3, .L1718+12
-	ldr	r0, [r3, #0]
-	bl	FtlGcBufFree
-	ldr	r3, .L1718+4
-	movs	r0, #0
-	str	r0, [r3, #0]
-	ldr	r3, .L1718+8
-	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1711
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
-.L1717:
-	movs	r0, #1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1715:
-	movs	r0, #0
-.L1711:
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1719:
-	.align	2
-.L1718:
-	.word	.LANCHOR7
-	.word	.LANCHOR119
-	.word	.LANCHOR99
-	.word	.LANCHOR178
-	.word	.LANCHOR89
-	.word	.LANCHOR132
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR35
+	.word	.LANCHOR39
+	.word	.LANCHOR73+24
+	.word	.LANCHOR43
+	.word	.LANCHOR79
+	.word	.LANCHOR120
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
-	.global	Ftl_get_new_temp_ppa
+	.global	ftl_map_blk_gc
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	ldr	r3, [r0, #24]
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	str	r3, [sp]
+	bl	ftl_free_no_use_map_blk
+	ldrh	ip, [r4, #10]
+	ldrh	r2, [r4, #8]
+	ldrh	r1, [r4, #40]
+	sub	r3, ip, #4
+	ldr	r6, .L1937
+	cmp	r2, r3
+	bge	.L1918
 	movw	r3, #65535
-	ldr	r5, .L1723
-	ldrh	r2, [r5, #0]
+	cmp	r1, r3
+	beq	.L1920
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
 	cmp	r2, r3
-	beq	.L1721
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1722
-.L1721:
-	bl	FtlCacheWriteBack
-	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1723
-	movs	r4, #0
-	strb	r4, [r5, #8]
-	bl	allocate_data_superblock
-	ldr	r3, .L1723+4
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1723+8
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
-	mov	r0, r4
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1722:
-	ldr	r0, .L1723
-	pop	{r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L1724:
-	.align	2
-.L1723:
-	.word	.LANCHOR99
-	.word	.LANCHOR133
-	.word	.LANCHOR135
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.FtlGcPageRecovery,"ax",%progbits
-	.align	1
-	.global	FtlGcPageRecovery
-	.thumb
-	.thumb_func
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L1727
-	ldr	r5, .L1727+4
-	ldrh	r1, [r4, #0]
-	mov	r0, r5
-	bl	FtlGcScanTempBlk
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4, #0]
+	bcc	.L1921
+.L1918:
+	movw	r3, #65535
+	uxth	r0, r0
+	cmp	r1, r3
+	beq	.L1922
+	ldrh	r3, [r4, #2]
+	ldrh	r2, [r6]
 	cmp	r2, r3
-	bcc	.L1725
-	ldr	r0, .L1727+8
-	bl	FtlMapBlkWriteDumpData
+	bls	.L1923
+.L1922:
+	ldrh	r8, [r5, r0, lsl #1]
+	lsls	r2, r0, #1
+	cmp	r8, #0
+	beq	.L1920
+	ldr	r3, [r4, #32]
+	cbnz	r3, .L1920
+	movs	r1, #1
+	str	r1, [r4, #32]
+	strh	r3, [r5, r2]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L1928
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1928:
+	ldr	r5, .L1937+4
+	movs	r7, #0
+.L1929:
+	ldrh	r2, [r4, #6]
+	uxth	r3, r7
+	cmp	r2, r3
+	bhi	.L1933
+	movs	r1, #1
+	mov	r0, r8
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L1920:
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L1921
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1921:
 	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1727+12
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1926:
+	ldrh	r8, [r5, r2, lsl #1]
+	add	lr, r2, #1
+	cmp	r8, r1
+	beq	.L1924
+	mov	r2, lr
+.L1925:
+	uxth	r7, r2
+	cmp	r7, ip
+	bcc	.L1926
+	mov	r7, r0
+.L1924:
+	uxth	r2, r2
+	ldr	r0, .L1937+8
+	ldrh	r2, [r5, r2, lsl #1]
+	bl	printf
+	movw	r3, #65535
+	mov	r0, r7
+	strh	r3, [r4, #40]	@ movhi
+	b	.L1922
+.L1923:
 	movs	r2, #0
-	str	r2, [r3, #0]
-.L1725:
-	pop	{r3, r4, r5, pc}
-.L1728:
-	.align	2
-.L1727:
-	.word	.LANCHOR56
-	.word	.LANCHOR99
-	.word	.LANCHOR110
-	.word	.LANCHOR128
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.ftl_discard,"ax",%progbits
-	.align	1
-	.global	ftl_discard
-	.thumb
-	.thumb_func
-	.type	ftl_discard, %function
-ftl_discard:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1738
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r4, r2
-	ldr	r3, [r3, #0]
-	adds	r2, r2, r1
-	mov	r6, r1
-	cmp	r2, r3
-	bhi	.L1735
-	cmp	r4, #31
-	bls	.L1736
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1738+4
-	mov	r0, r6
-	ldrh	r7, [r3, #0]
-	mov	r1, r7
-	bl	__aeabi_uidiv
-	mls	r6, r0, r7, r6
-	mov	r5, r0
-	uxth	r6, r6
-	cbz	r6, .L1731
-	subs	r6, r7, r6
-	adds	r5, r0, #1
-	cmp	r6, r4
-	it	cs
-	movcs	r6, r4
-	uxth	r6, r6
-	subs	r4, r4, r6
-.L1731:
-	mov	r3, #-1
-	ldr	r8, .L1738+4
+	b	.L1925
+.L1933:
+	ldr	r2, [sp]
+	uxth	r10, r7
+	ldr	r2, [r2, r10, lsl #2]
+	cmp	r8, r2, lsr #10
+	bne	.L1930
 	str	r3, [sp, #4]
-	ldr	r7, .L1738+8
-	ldr	r6, .L1738+12
-	b	.L1732
-.L1734:
-	movs	r2, #0
-	mov	r0, r5
-	mov	r1, sp
-	bl	log2phys
-	ldr	r3, [sp, #0]
-	adds	r3, r3, #1
-	beq	.L1733
-	ldr	r3, [r7, #0]
-	add	r1, sp, #4
+	ldr	r3, .L1937+12
+	str	r2, [r5, #4]
 	movs	r2, #1
-	mov	r0, r5
-	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	ldr	r3, [r6, #0]
+	ldr	r0, .L1937+4
+	ldr	r1, [r3]
+	str	r1, [r5, #8]
+	ldr	r1, .L1937+16
+	ldr	fp, [r1]
+	mov	r1, r2
+	str	fp, [r5, #12]
+	bl	FlashReadPages
+	ldrh	r2, [fp, #8]
+	ldr	r3, [sp, #4]
+	cmp	r2, r3
+	beq	.L1931
+	ldr	r1, .L1937+20
+	movw	r2, #638
+	ldr	r0, .L1937+24
+	bl	printf
+	ldr	r1, .L1937+28
+	ldr	r0, .L1937+32
+	bl	printf
+.L1931:
+	ldr	r3, [r5]
 	adds	r3, r3, #1
-	str	r3, [r6, #0]
-	bl	log2phys
-	ldr	r0, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
-.L1733:
-	ldrh	r3, [r8, #0]
-	adds	r5, r5, #1
-	subs	r4, r4, r3
-.L1732:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcs	.L1734
-	ldr	r3, .L1738+8
-	mov	r4, #0
-	ldr	r2, [r3, #0]
-	cmp	r2, #32
-	bls	.L1737
-	str	r4, [r3, #0]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1737
-.L1735:
-	mov	r0, #-1
-	b	.L1730
-.L1736:
-	movs	r0, #0
-	b	.L1730
-.L1737:
+	bne	.L1932
+	ldr	r2, [sp]
+	movs	r3, #0
+	ldr	r0, .L1937+36
+	str	r3, [r2, r10, lsl #2]
+	ldrh	r2, [fp, #8]
+	ldr	r1, [r5, #4]
+	bl	printf
+	ldr	r3, .L1937+40
+	movs	r2, #1
+	str	r2, [r3]
+.L1930:
+	adds	r7, r7, #1
+	b	.L1929
+.L1932:
+	ldr	r2, [r5, #8]
+	mov	r1, r10
 	mov	r0, r4
-.L1730:
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L1739:
+	bl	FtlMapWritePage
+	b	.L1930
+.L1938:
 	.align	2
-.L1738:
-	.word	.LANCHOR72
-	.word	.LANCHOR59
-	.word	.LANCHOR227
-	.word	.LANCHOR160
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+.L1937:
+	.word	.LANCHOR52
+	.word	.LANCHOR199
+	.word	.LC33
+	.word	.LANCHOR181
+	.word	.LANCHOR185
+	.word	.LANCHOR209
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC34
+	.word	.LANCHOR75
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
-	.global	FtlRecoverySuperblock
+	.global	Ftl_write_map_blk_to_last_page
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlRecoverySuperblock, %function
-FtlRecoverySuperblock:
-	@ args = 0, pretend = 0, frame = 64
+	.fpu softvfp
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #0]
-	movw	r3, #65535
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	cmp	r2, r3
-	sub	sp, sp, #64
+	ldr	r3, .L1949
+	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
-	beq	.L1741
-	ldrh	r5, [r0, #2]
-	ldr	r2, .L1833
-	str	r5, [sp, #20]
-	ldrb	r5, [r0, #6]	@ zero_extendqisi2
-	ldrh	r2, [r2, #0]
-	str	r5, [sp, #28]
-	ldr	r5, [sp, #20]
-	cmp	r2, r5
-	mov	r5, #0
-	bne	.L1742
-	mov	r3, r5	@ movhi
-	strh	r5, [r0, #4]	@ movhi
-	b	.L1830
-.L1742:
-	ldrh	r0, [r0, #16]
-	b	.L1743
-.L1744:
-	adds	r5, r5, #1
-	uxth	r5, r5
-	add	r2, r5, #8
-	ldrh	r0, [r4, r2, lsl #1]
-.L1743:
-	cmp	r0, r3
-	beq	.L1744
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L1745
-	bl	FtlGetLastWrittenPage
-	adds	r2, r0, #1
-	mov	r6, r0
-	beq	.L1746
-	ldr	r3, .L1833+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1825
-	ldr	r3, .L1833+8
-	ldrh	r7, [r3, r0, lsl #1]
-	b	.L1815
-.L1745:
-	movs	r1, #0
-	bl	FtlGetLastWrittenPage
-	adds	r3, r0, #1
-	mov	r6, r0
-	beq	.L1746
-.L1825:
-	mov	r7, r6
-.L1815:
-	ldr	r3, .L1833+12
-	movs	r5, #0
-	str	r4, [sp, #44]
-	mov	r2, r4
-	ldrh	fp, [r3, #0]
-	ldr	r3, .L1833+16
-	ldr	sl, [r3, #0]
-	ldr	r3, .L1833+20
-	ldr	r8, [r3, #0]
-	ldr	r3, .L1833+24
-	ldrh	ip, [r3, #0]
-	mov	r3, r5
-	b	.L1748
-.L1746:
-	ldr	r3, [sp, #20]
-	cbz	r3, .L1749
-	ldr	r1, .L1833+28
-	movw	r2, #1894
-	ldr	r0, .L1833+32
-	bl	printf
-	ldr	r0, .L1833+36
-	ldr	r1, .L1833+40
-	bl	printf
-.L1749:
-	ldr	r3, [sp, #28]
-	cbz	r3, .L1750
-	cmp	r3, r5
-	beq	.L1750
-	ldr	r1, .L1833+28
-	movw	r2, #1895
-	ldr	r0, .L1833+32
+	ldr	r5, [r3]
+	cbnz	r5, .L1940
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	ldr	r6, [r0, #12]
+	cmp	r3, r2
+	bne	.L1941
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L1942
+	ldr	r1, .L1949+4
+	movw	r2, #670
+	ldr	r0, .L1949+8
 	bl	printf
-	ldr	r0, .L1833+36
-	ldr	r1, .L1833+40
+	ldr	r1, .L1949+12
+	ldr	r0, .L1949+16
 	bl	printf
-.L1750:
+.L1942:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
 	movs	r3, #0
+	strh	r0, [r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	b	.L1741
-.L1752:
-	ldrh	r0, [r2, #16]
-	movw	lr, #65535
-	cmp	r0, lr
-	beq	.L1751
-	mov	lr, #36
-	orr	r0, r7, r0, lsl #10
-	mla	r1, lr, r5, sl
-	str	r0, [r1, #4]
+	strh	r3, [r4]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+.L1940:
 	movs	r0, #0
-	str	r0, [r1, #8]
-	mul	r0, ip, r5
-	adds	r5, r5, #1
-	uxth	r5, r5
-	bic	r0, r0, #3
-	add	r0, r8, r0
-	str	r0, [r1, #12]
-.L1751:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1941:
+	ldrh	r6, [r6, r3, lsl #1]
+	movs	r1, #255
+	ldrh	r3, [r0, #2]
+	ldr	r2, .L1949+20
+	ldr	r8, .L1949+32
+	ldr	r7, [r0, #24]
+	orr	r3, r3, r6, lsl #10
+	ldr	r0, [r8]
+	str	r3, [r2, #4]
+	ldr	r3, .L1949+24
+	str	r0, [r2, #8]
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r6, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r3, .L1949+28
+	ldrh	r2, [r3]
+	lsls	r2, r2, #3
+	bl	ftl_memset
+	ldrh	ip, [r4, #6]
+	mov	r3, r5
+	ldr	r1, [r8]
+	mov	r2, r5
+.L1943:
+	uxth	r0, r3
+	cmp	ip, r0
+	bhi	.L1945
+	movs	r2, #1
+	movs	r3, #0
+	mov	r1, r2
+	ldr	r0, .L1949+20
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
 	adds	r3, r3, #1
-	adds	r2, r2, #2
-	uxth	r3, r3
-.L1748:
-	cmp	r3, fp
-	bne	.L1752
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	bne	.L1817
-	ldr	r3, .L1833+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	adds	r3, r3, #0
-	it	ne
-	movne	r3, #1
-	b	.L1826
-.L1817:
-	movs	r3, #0
-.L1826:
-	ldr	r8, .L1833+16
-	mov	r1, r5
-	str	r3, [sp, #24]
-	mov	fp, #0
-	ldr	r2, [sp, #24]
-	mov	sl, fp
-	ldr	r0, [r8, #0]
-	bl	FlashReadPages
-	ldr	r3, .L1833+44
-	movw	ip, #65535
-	str	ip, [sp, #8]
-	ldr	r2, [r3, #0]
-	str	r2, [sp, #12]
-	uxth	r2, r7
-	str	r2, [sp, #16]
-	b	.L1754
-.L1759:
-	ldr	r3, .L1833+16
-	ldr	r2, [r3, #0]
-	add	r3, r2, fp
-	ldr	r2, [r2, fp]
-	cbnz	r2, .L1755
-	ldr	r3, [r3, #12]
-	ldr	r8, [r3, #4]
-	cmp	r8, #-1
-	beq	.L1756
-	ldr	r2, .L1833+44
-	mov	r0, r8
-	ldr	r1, [r2, #0]
-	str	r3, [sp, #0]
-	bl	ftl_cmp_data_ver
-	ldr	r3, [sp, #0]
-	cbz	r0, .L1756
-	ldr	r0, .L1833+44
-	add	r2, r8, #1
-	str	r2, [r0, #0]
-.L1756:
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	bne	.L1757
-	ldr	r3, .L1833+16
-	movs	r2, #36
-	uxth	r6, r6
-	ldr	r3, [r3, #0]
-	mla	r3, r2, sl, r3
-	b	.L1827
-.L1755:
-	ldr	r1, [r3, #4]
-	ldr	r0, .L1833+48
-	bl	printf
-	ldr	r2, [sp, #16]
-	ldrh	r3, [r4, #0]
-	ldr	r0, .L1833+52
-	str	r2, [sp, #8]
-	strh	r3, [r0, #0]	@ movhi
-.L1757:
-	add	sl, sl, #1
-	add	fp, fp, #36
-	uxth	sl, sl
-.L1754:
-	cmp	sl, r5
-	bne	.L1759
-	ldr	r3, .L1833+16
-	adds	r6, r6, #1
-	uxth	r6, r6
-	ldr	r3, [r3, #0]
-.L1827:
-	ldr	r0, [r3, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_plane
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	cmp	r3, #1
-	str	r0, [sp, #16]
-	bne	.L1760
-	ldr	r2, .L1833+4
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1760
-	ldr	r2, .L1833+8
-	ldrh	r6, [r2, r6, lsl #1]
-.L1760:
-	ldr	r2, .L1833
-	ldrh	r2, [r2, #0]
-	cmp	r2, r6
-	bne	.L1761
-	movs	r2, #0
-	strh	r6, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	strh	r2, [r4, #4]	@ movhi
-.L1761:
-	ldr	r5, [sp, #20]
-	cmp	r6, r5
-	bne	.L1762
-	ldr	r8, [sp, #16]
-	ldr	r5, [sp, #28]
-	cmp	r8, r5
-	bne	.L1762
-	mov	r0, r4
-	mov	r1, r6
-	mov	r2, r8
-	b	.L1831
-.L1762:
-	ldr	r2, [sp, #12]
-	ldr	r8, [sp, #8]
-	subs	r5, r2, #1
-	movw	r2, #65535
-	cmp	r8, r2
-	bne	.L1763
-	cmp	r3, #0
-	bne	.L1764
-.L1763:
-	ldr	r2, .L1833+56
-	uxth	r3, r7
-	ldr	r0, [sp, #20]
-	ldr	r1, [r2, #0]
-	adds	r1, r1, #1
-	it	eq
-	streq	r5, [r2, #0]
-	ldr	r2, [r2, #0]
-	str	r2, [sp, #8]
-	adds	r2, r0, #7
-	cmp	r3, r2
-	ble	.L1818
-	subs	r7, r3, #7
-	uxth	r7, r7
-	b	.L1766
-.L1818:
-	ldr	r7, [sp, #20]
-.L1766:
-	mov	fp, #-1
-	mov	r8, r3
-	mov	sl, fp
-	mov	r3, r6
-	mov	r6, r5
-	b	.L1767
-.L1769:
-	ldrh	r0, [r1, #16]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1768
-	ldr	r3, [sp, #12]
-	mov	lr, #36
-	orr	r0, r7, r0, lsl #10
-	mla	ip, lr, r5, r3
-	adds	r5, r5, #1
-	uxth	r5, r5
-	str	r0, [ip, #4]
-.L1768:
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+	b	.L1940
+.L1945:
+	ldr	r0, [r7, r3, lsl #2]
+	cmp	r6, r0, lsr #10
+	bne	.L1944
 	adds	r2, r2, #1
-	adds	r1, r1, #2
 	uxth	r2, r2
-.L1780:
-	ldr	r0, [sp, #36]
-	cmp	r2, r0
-	bne	.L1769
-	ldr	ip, .L1833+16
-	mov	r1, r5
-	ldr	r3, [sp, #32]
-	ldr	r2, [sp, #24]
-	ldr	r0, [ip, #0]
-	stmia	sp, {r3, ip}
-	bl	FlashReadPages
-	ldr	r2, .L1833+4
-	movs	r0, #0
-	ldr	ip, [sp, #4]
-	ldr	r3, [sp, #0]
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	ldr	r1, [ip, #0]
-	mov	ip, r3
-	str	r5, [sp, #32]
-	str	r2, [sp, #12]
-	ldr	r2, .L1833+56
-	ldr	r2, [r2, #0]
-	b	.L1770
-.L1834:
+	str	r3, [r1, r2, lsl #3]
+	add	r5, r1, r2, lsl #3
+	ldr	r0, [r7, r3, lsl #2]
+	str	r0, [r5, #4]
+.L1944:
+	adds	r3, r3, #1
+	b	.L1943
+.L1950:
 	.align	2
-.L1833:
-	.word	.LANCHOR56
-	.word	.LANCHOR7
-	.word	.LANCHOR8
-	.word	.LANCHOR41
-	.word	.LANCHOR177
-	.word	.LANCHOR121
-	.word	.LANCHOR62
-	.word	.LANCHOR228
-	.word	.LC3
+.L1949:
+	.word	.LANCHOR75
+	.word	.LANCHOR210
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR157
-	.word	.LC41
-	.word	.LANCHOR229
-	.word	.LANCHOR129
-.L1778:
-	ldr	r3, [r1, #0]
-	cbnz	r3, .L1771
-	ldr	r3, [r1, #12]
-	movw	r5, #65535
-	ldrh	lr, [r3, #0]
-	cmp	lr, r5
-	beq	.L1820
-	ldr	r3, [r3, #4]
-	adds	r5, r3, #1
-	beq	.L1820
-	cmp	fp, #-1
-	bne	.L1772
-	ldr	r5, .L1835
-	ldrh	lr, [r5, r7, lsl #1]
-	movw	r5, #65535
-	cmp	lr, r5
-	bne	.L1773
-	ldr	r5, [sp, #12]
+	.word	.LC6
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LANCHOR52
+	.word	.LANCHOR79
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1974
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r0
+	mov	r8, r1
+	str	r2, [sp]
+	ldr	r5, [r3]
+	str	r3, [sp, #4]
 	cmp	r5, #0
-	beq	.L1772
-.L1773:
-	cmp	r2, r6
-	ite	ne
-	movne	fp, r2
-	moveq	fp, #-1
-	b	.L1772
-.L1771:
-	ldr	r1, .L1835+4
-	mov	r5, r6
-	ldrh	r0, [r4, #0]
-	mov	r6, ip
-	ldr	r3, .L1835+8
-	strh	r0, [r1, #0]	@ movhi
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
-	str	r2, [r3, #0]
-	cmp	r1, #0
-	bne	.L1764
-	ldr	r1, .L1835
-	ldrh	r0, [r1, r7, lsl #1]
-	movw	r1, #65535
-	cmp	r0, r1
-	bne	.L1774
-	cmp	fp, #-1
-	beq	.L1775
-	str	fp, [r3, #0]
-	b	.L1764
-.L1775:
-	ldr	r0, [sp, #8]
-	cmp	r0, r5
-	beq	.L1832
-	str	r0, [r3, #0]
-	b	.L1764
-.L1774:
-	cmp	sl, r5
-	beq	.L1777
-	cmp	sl, #-1
-	beq	.L1764
-	str	sl, [r3, #0]
-	b	.L1764
-.L1777:
-	cmp	r2, r5
-	beq	.L1764
-.L1832:
-	subs	r2, r2, #1
-	b	.L1828
-.L1820:
-	mov	r3, r2
-	mov	r2, sl
-.L1772:
-	adds	r0, r0, #1
-	mov	sl, r2
-	adds	r1, r1, #36
-	mov	r2, r3
-	uxth	r0, r0
-.L1770:
-	ldr	r3, [sp, #32]
-	cmp	r0, r3
-	bne	.L1778
-	adds	r7, r7, #1
-	ldr	r1, .L1835+8
-	mov	r3, ip
-	uxth	r7, r7
-	str	r2, [r1, #0]
-.L1767:
-	cmp	r7, r8
-	bhi	.L1779
-	ldr	r5, .L1835+12
-	mov	r1, r4
-	ldr	r2, .L1835+16
-	str	r3, [sp, #32]
-	ldrh	lr, [r5, #0]
-	movs	r5, #0
-	ldr	r2, [r2, #0]
-	str	lr, [sp, #36]
-	str	r2, [sp, #12]
-	mov	r2, r5
-	b	.L1780
-.L1779:
-	mov	r5, r6
-	mov	r6, r3
-	ldr	r3, .L1835+8
-	mov	r2, #-1
-.L1828:
-	str	r2, [r3, #0]
-.L1764:
-	ldr	r3, .L1835+20
-	movs	r2, #1
-	ldr	r0, .L1835+24
-	ldr	r7, .L1835+16
-	strh	r2, [r3, #0]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	sl, [sp, #20]
-	str	r6, [sp, #12]
-.L1781:
-	ldr	r3, .L1835+28
-	movs	r6, #0
-	ldr	r0, .L1835+12
-	mov	r2, r4
-	ldr	lr, [r7, #0]
-	ldrb	fp, [r3, #0]	@ zero_extendqisi2
-	mov	r3, r6
-	ldrh	ip, [r0, #0]
-	b	.L1782
-.L1785:
-	ldrh	r0, [r2, #16]
-	movw	r1, #65535
-	cmp	r0, r1
-	beq	.L1783
-	mov	r8, #36
-	orr	r0, sl, r0, lsl #10
-	mla	r1, r8, r6, lr
-	str	r0, [r1, #4]
-	ldrb	r8, [r4, #8]	@ zero_extendqisi2
-	cmp	r8, #1
-	bne	.L1784
-	cmp	fp, #0
-	beq	.L1784
-	orr	r0, r0, #-2147483648
-	str	r0, [r1, #4]
-.L1784:
-	adds	r6, r6, #1
-	uxth	r6, r6
-.L1783:
-	adds	r3, r3, #1
-	adds	r2, r2, #2
-	uxth	r3, r3
-.L1782:
-	cmp	r3, ip
-	bne	.L1785
-	ldr	r0, [r7, #0]
-	mov	r1, r6
-	ldr	r2, [sp, #24]
-	mov	r8, #0
-	bl	FlashReadPages
-	movs	r3, #36
-	str	sl, [sp, #32]
-	muls	r3, r6, r3
-	str	r3, [sp, #40]
-	b	.L1786
-.L1810:
-	ldr	r3, [r7, #0]
-	add	sl, r3, r8
-	ldr	r6, [sl, #4]
-	ubfx	r0, r6, #10, #16
-	str	r6, [sp, #60]
-	bl	P2V_plane
-	ldr	ip, [sp, #32]
-	ldr	r3, [sp, #20]
-	cmp	ip, r3
-	bcc	.L1787
-	bne	.L1788
-	ldr	r3, [sp, #28]
-	cmp	r0, r3
-	bcc	.L1787
-.L1788:
-	ldr	ip, [sp, #32]
-	ldr	r3, [sp, #12]
-	cmp	ip, r3
-	bne	.L1789
-	ldr	ip, [sp, #16]
-	cmp	r0, ip
-	beq	.L1824
-.L1789:
-	ldr	r3, [sl, #0]
+	bne	.L1969
+	ldr	r10, .L1974+36
+.L1953:
+	ldr	r2, .L1974+4
+	ldr	r3, [r2]
 	adds	r3, r3, #1
-	beq	.L1791
-	ldr	r6, [sl, #12]
-	movw	r3, #61589
-	ldrh	r2, [r6, #0]
+	str	r3, [r2]
+	ldrh	r3, [r10]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
 	cmp	r2, r3
-	bne	.L1798
-.L1792:
-	ldr	r5, [r6, #4]
-	adds	r3, r5, #1
-	beq	.L1793
-	ldr	sl, .L1835+32
-	mov	r0, r5
-	ldr	r1, [sl, #0]
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1793
-	adds	r3, r5, #1
-	str	r3, [sl, #0]
-.L1793:
-	ldr	sl, [r6, #8]
-	add	r1, sp, #56
-	ldr	r3, [r6, #12]
-	movs	r2, #0
-	mov	r0, sl
-	str	r3, [sp, #52]
-	bl	log2phys
-	ldr	r0, .L1835+8
-	ldr	r1, [r0, #0]
-	adds	r0, r1, #1
-	beq	.L1794
-	mov	r0, r5
-	bl	ftl_cmp_data_ver
-	cmp	r0, #0
-	beq	.L1794
-	ldr	r3, [sp, #52]
-	adds	r1, r3, #1
-	beq	.L1795
-	ldr	r0, [r7, #0]
-	movs	r2, #0
-	add	r0, r0, r8
-	ldr	r1, [r0, #12]
-	str	r3, [r0, #4]
-	str	r1, [sp, #8]
-	movs	r1, #1
-	bl	FlashReadPages
-	ldr	r3, [sp, #8]
-	ldr	r3, [r3, #4]
-	str	r3, [sp, #36]
-	ldr	r3, [r7, #0]
-	add	fp, r3, r8
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	bne	.L1796
-	b	.L1797
-.L1795:
-	ldr	r3, [sp, #60]
-	ldr	r2, [sp, #56]
+	bge	.L1954
+	ldrh	r2, [r4]
+	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1798
-	mov	r0, sl
-	add	r1, sp, #52
-	movs	r2, #1
-	bl	log2phys
-.L1798:
-	ldrh	r0, [r4, #0]
-	b	.L1829
-.L1796:
-	ldr	r3, [sp, #8]
-	ldr	r6, [r3, #8]
-	cmp	r6, sl
-	bne	.L1797
-	ldr	r1, .L1835+8
-	ldr	r0, [r1, #0]
-	ldr	r1, [sp, #36]
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1797
-	ldr	r3, [sp, #56]
-	ldr	r2, [sp, #60]
-	cmp	r3, r2
-	beq	.L1802
-.L1799:
-	ldr	r2, [sp, #52]
-	cmp	r3, r2
-	beq	.L1797
-	adds	r2, r3, #1
-	beq	.L1800
-	ldr	r2, [fp, #12]
-	mov	r0, fp
-	str	r3, [fp, #4]
-	movs	r1, #1
-	str	r2, [sp, #8]
-	movs	r2, #0
-	bl	FlashReadPages
-	b	.L1801
-.L1800:
-	str	r3, [fp, #0]
-.L1801:
-	ldr	r3, [r7, #0]
-	ldr	r3, [r3, r8]
-	adds	r3, r3, #1
-	beq	.L1802
-	ldr	r3, [sp, #8]
-	ldr	r1, .L1835+8
-	ldr	sl, [r3, #4]
-	ldr	r0, [r1, #0]
-	mov	r1, sl
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1802
-	ldr	r0, [sp, #36]
-	mov	r1, sl
-	bl	ftl_cmp_data_ver
-	cbz	r0, .L1797
-.L1802:
-	mov	r0, r6
-	ldr	r1, [sp, #52]
-	bl	FtlReUsePrevPpa
-.L1797:
-	ldrh	r0, [r4, #0]
-	mov	r3, #-1
-	str	r3, [sp, #52]
-	bl	decrement_vpc_count
-	b	.L1804
-.L1836:
-	.align	2
-.L1835:
-	.word	.LANCHOR9
-	.word	.LANCHOR229
-	.word	.LANCHOR129
-	.word	.LANCHOR41
-	.word	.LANCHOR177
-	.word	.LANCHOR230
-	.word	.LANCHOR110
-	.word	.LANCHOR7
-	.word	.LANCHOR157
-.L1794:
-	ldr	r3, [sp, #60]
-	ldr	r2, [sp, #56]
+	bne	.L1955
+.L1954:
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.L1955:
+	ldrh	r2, [r4]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L1956
+	ldr	r1, .L1974+8
+	movw	r2, #731
+	ldr	r0, .L1974+12
+	bl	printf
+	ldr	r1, .L1974+16
+	ldr	r0, .L1974+20
+	bl	printf
+.L1956:
+	ldrh	r2, [r4]
+	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	beq	.L1804
-	movs	r2, #1
-	mov	r0, sl
-	add	r1, sp, #60
-	bl	log2phys
-	ldr	fp, [sp, #56]
-	cmp	fp, #-1
-	beq	.L1804
-	ldr	r3, [sp, #52]
-	cmp	fp, r3
-	beq	.L1804
-	ubfx	r0, fp, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1837
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L1805
-	ldr	r3, .L1837+4
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L1805
-	ldr	r3, .L1837+8
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	bne	.L1804
-.L1805:
-	ldr	r0, [r7, #0]
-	movs	r1, #1
-	movs	r2, #0
-	str	fp, [r0, #4]
-	ldr	r6, [r0, #12]
-	bl	FlashReadPages
-	ldr	r3, [r7, #0]
-	ldr	r1, [r6, #4]
-	ldr	r3, [r3, #0]
-	adds	r3, r3, #1
-	beq	.L1804
-	mov	r0, r5
-	bl	ftl_cmp_data_ver
-	cbnz	r0, .L1804
-	mov	r0, sl
-	add	r1, sp, #56
-	movs	r2, #1
-	bl	log2phys
-.L1804:
-	ldr	r0, [sp, #52]
-	adds	r3, r0, #1
-	beq	.L1787
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldr	r3, .L1837+12
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	mov	r6, r0
-	bhi	.L1806
-	ldr	r1, .L1837+16
-	movw	r2, #2177
-	ldr	r0, .L1837+20
+	bcc	.L1957
+	ldr	r1, .L1974+8
+	mov	r2, #732
+	ldr	r0, .L1974+12
 	bl	printf
-	ldr	r0, .L1837+24
-	ldr	r1, .L1837+28
+	ldr	r1, .L1974+16
+	ldr	r0, .L1974+20
 	bl	printf
-.L1806:
-	ldr	r3, .L1837+32
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L1807
+.L1957:
+	ldrh	r2, [r4]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r6, .L1974+24
+	ldrh	r7, [r3, r2, lsl #1]
+	movs	r2, #16
+	ldrh	r3, [r4, #2]
+	mov	fp, r6
+	orr	r3, r3, r7, lsl #10
+	str	r3, [r6, #4]
+	ldr	r3, [sp]
+	str	r3, [r6, #8]
+	ldr	r3, .L1974+28
+	ldr	r0, [r3]
+	str	r0, [r6, #12]
+	bl	ftl_memset
+	ldr	r3, [r6, #12]
 	mov	r0, r6
-.L1829:
-	bl	decrement_vpc_count
-	b	.L1787
-.L1807:
-	mov	r1, r6
-	ldr	r0, .L1837+36
+	ldr	r2, [r4, #28]
+	strh	r8, [r3, #8]	@ movhi
+	str	r2, [r3, #4]
+	ldrh	r2, [r4, #4]
+	strh	r7, [r3, #2]	@ movhi
+	strh	r2, [r3]	@ movhi
+	movs	r3, #1
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldrh	r2, [r4, #2]
+	ldr	r1, [r6]
+	adds	r2, r2, #1
+	uxth	r2, r2
+	adds	r3, r1, #1
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L1958
+	ldr	r1, [r6, #4]
+	adds	r5, r5, #1
+	ldr	r0, .L1974+32
+	uxth	r5, r5
 	bl	printf
-	b	.L1787
-.L1791:
-	ldrh	r3, [r4, #0]
-	mov	r1, r6
-	ldr	r2, .L1837+40
-	ldr	r0, .L1837+44
-	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #2]
+	cmp	r2, #2
+	itttt	ls
+	ldrls	r3, .L1974+36
+	ldrhls	r2, [r3]
+	addls	r2, r2, #-1
+	strhls	r2, [r4, #2]	@ movhi
+	cmp	r5, #3
+	bls	.L1953
 	mov	r2, r5
+	ldr	r1, [r6, #4]
+	ldr	r0, .L1974+40
 	bl	printf
-	ldr	r0, .L1837+48
-	ldr	r3, [r0, #0]
-	cmp	r3, #31
-	bhi	.L1808
-	ldr	r2, [sp, #60]
-	ldr	r1, .L1837+52
-	str	r2, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	str	r3, [r0, #0]
-.L1808:
-	ldrh	r0, [r4, #0]
-	bl	decrement_vpc_count
-	ldr	r2, .L1837+56
-	ldr	r3, [r2, #0]
-	adds	r1, r3, #1
-	bne	.L1809
-	str	r5, [r2, #0]
-	b	.L1787
-.L1809:
-	cmp	r3, r5
-	itt	hi
-	ldrhi	r3, .L1837+56
-	strhi	r5, [r3, #0]
-.L1787:
-	add	r8, r8, #36
-.L1786:
-	ldr	ip, [sp, #40]
-	cmp	r8, ip
-	bne	.L1810
-	ldr	sl, [sp, #32]
-	ldrb	r3, [r4, #8]	@ zero_extendqisi2
-	add	sl, sl, #1
-	cmp	r3, #1
-	uxth	sl, sl
-	bne	.L1811
-	ldr	r3, .L1837+60
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1811
-	ldr	r3, .L1837+64
-	ldrh	r3, [r3, #0]
-	cmp	r3, sl
-	bne	.L1811
-	ldr	r3, [sp, #12]
-	cmp	r3, sl
-	beq	.L1824
-.L1811:
-	ldr	r3, .L1837+68
-	ldrh	r3, [r3, #0]
-	cmp	sl, r3
-	bne	.L1781
-	ldr	r2, .L1837+72
-	movs	r3, #0
-	strh	sl, [r4, #2]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	ldrh	r1, [r2, #0]
-	movw	r2, #65535
-	ldr	r0, [sp, #44]
-	b	.L1812
-.L1814:
-	adds	r0, r0, #2
-	ldrh	r5, [r0, #14]
-	cmp	r5, r2
-	beq	.L1813
-.L1830:
-	strb	r3, [r4, #6]
-	b	.L1741
-.L1813:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L1812:
-	cmp	r3, r1
-	bne	.L1814
-	b	.L1741
-.L1824:
-.L1790:
-	ldr	r6, [sp, #12]
-	mov	r0, r4
-	ldr	r5, [sp, #16]
-	mov	r1, r6
-	mov	r2, r5
-	strh	r6, [r4, #2]	@ movhi
-	strb	r5, [r4, #6]
-.L1831:
-	bl	ftl_sb_update_avl_pages
-.L1741:
+	ldr	r2, [sp, #4]
+	movs	r3, #1
+	str	r3, [r2]
+.L1969:
 	movs	r0, #0
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1838:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1958:
+	cbz	r1, .L1961
+	cmp	r2, #1
+	strh	r7, [r4, #40]	@ movhi
+	beq	.L1953
+	cmp	r1, #256
+.L1973:
+	beq	.L1953
+	ldr	r2, [fp, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r8, lsl #2]
+	b	.L1969
+.L1961:
+	cmp	r2, #1
+	b	.L1973
+.L1975:
 	.align	2
-.L1837:
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR43
-	.word	.LANCHOR228
-	.word	.LC3
+.L1974:
+	.word	.LANCHOR75
+	.word	.LANCHOR163
+	.word	.LANCHOR211
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR89
-	.word	.LC42
-	.word	.LANCHOR229
-	.word	.LC43
-	.word	.LANCHOR231
-	.word	.LANCHOR232
-	.word	.LANCHOR129
-	.word	.LANCHOR7
-	.word	.LANCHOR57
-	.word	.LANCHOR56
-	.word	.LANCHOR41
-	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
-	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LC35
+	.word	.LANCHOR52
+	.word	.LC36
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
-	.global	FtlPowerLostRecovery
+	.global	flush_l2p_region
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlPowerLostRecovery, %function
-FtlPowerLostRecovery:
+	.fpu softvfp
+	.type	flush_l2p_region, %function
+flush_l2p_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r3, .L1840
-	ldr	r5, .L1840+4
-	str	r4, [r3, #0]
-	mov	r0, r5
-	bl	FtlRecoverySuperblock
-	mov	r0, r5
-	ldr	r5, .L1840+8
-	bl	FtlSlcSuperblockCheck
-	mov	r0, r5
-	bl	FtlRecoverySuperblock
-	mov	r0, r5
-	bl	FtlSlcSuperblockCheck
-	bl	FtlGcPageRecovery
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	mov	r0, r4
+	movs	r4, #12
+	ldr	r5, .L1977
+	muls	r4, r0, r4
+	ldr	r0, .L1977+4
+	ldr	r3, [r5]
+	adds	r2, r3, r4
+	ldrh	r1, [r3, r4]
+	ldr	r2, [r2, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5]
+	movs	r0, #0
+	add	r4, r4, r3
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1841:
+.L1978:
 	.align	2
-.L1840:
-	.word	.LANCHOR231
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
-	.section	.text.FtlSysBlkInit,"ax",%progbits
+.L1977:
+	.word	.LANCHOR95
+	.word	.LANCHOR124
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
-	.global	FtlSysBlkInit
+	.global	l2p_flush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlSysBlkInit, %function
-FtlSysBlkInit:
+	.fpu softvfp
+	.type	l2p_flush, %function
+l2p_flush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1852
-	movs	r2, #0
 	push	{r4, r5, r6, lr}
-	movw	r4, #65535
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1852+4
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1852+8
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlScanSysBlk
-	ldr	r3, .L1852+12
-	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L1848
-	bl	FtlLoadSysInfo
-	mov	r4, r0
-	cmp	r0, #0
-	bne	.L1849
-	bl	FtlLoadMapInfo
-	bl	FtlLoadVonderInfo
-	bl	Ftl_load_ext_data
-	bl	FtlLoadEctTbl
-	bl	FtlFreeSysBLkSort
-	bl	SupperBlkListInit
-	bl	FtlPowerLostRecovery
-	movs	r0, #1
-	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1852+16
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1852+20
-	ldr	r2, [r3, #0]
-	mov	r3, r4
-	b	.L1844
-.L1846:
-	adds	r0, r2, r4
-	adds	r4, r4, #12
-	ldr	r0, [r0, #4]
-	cmp	r0, #0
-	blt	.L1845
-	adds	r3, r3, #1
-.L1844:
-	cmp	r3, r1
-	blt	.L1846
-	b	.L1851
-.L1845:
-	ldr	r5, .L1852+24
-	movs	r6, #0
-	ldr	r4, .L1852+28
-	mov	r0, r5
-	bl	FtlSuperblockPowerLostFix
-	mov	r0, r4
-	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1852+32
-	ldrh	r2, [r5, #0]
-	ldrh	r1, [r5, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r2, .L1852+36
-	ldrh	r0, [r4, #4]
-	strb	r6, [r5, #6]
-	ldrh	r1, [r2, #0]
-	strh	r6, [r5, #4]	@ movhi
-	strh	r1, [r5, #2]	@ movhi
-	ldrh	r1, [r4, #0]
-	ldrh	r5, [r3, r1, lsl #1]
-	subs	r0, r5, r0
-	strh	r0, [r3, r1, lsl #1]	@ movhi
-	ldrh	r3, [r2, #0]
-	ldr	r0, .L1852+40
-	strb	r6, [r4, #6]
-	strh	r3, [r4, #2]	@ movhi
-	strh	r6, [r4, #4]	@ movhi
-	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L1852+44
-	bl	FtlMapBlkWriteDumpData
-	ldr	r3, .L1852+48
-	ldrh	r2, [r3, #30]
-	adds	r2, r2, #1
-	strh	r2, [r3, #30]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	bl	FtlVpcTblFlush
-	mov	r0, r6
-	pop	{r4, r5, r6, pc}
-.L1848:
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L1849:
-	mov	r0, #-1
-	pop	{r4, r5, r6, pc}
-.L1851:
-	ldr	r3, .L1852
-	ldrh	r0, [r3, #0]
-	cmp	r0, #0
-	bne	.L1845
+	movs	r4, #0
+	ldr	r5, .L1983
+	ldr	r6, .L1983+4
+.L1980:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	cmp	r3, r0
+	bhi	.L1982
+	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1853:
+.L1982:
+	ldr	r2, [r6]
+	uxth	r3, r4
+	movs	r1, #12
+	mla	r3, r1, r3, r2
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1981
+	bl	flush_l2p_region
+.L1981:
+	adds	r4, r4, #1
+	b	.L1980
+.L1984:
 	.align	2
-.L1852:
-	.word	.LANCHOR230
-	.word	.LANCHOR229
-	.word	.LANCHOR42
-	.word	.LANCHOR196
-	.word	.LANCHOR71
-	.word	.LANCHOR102
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR89
+.L1983:
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r7, r0
+	ldr	r3, .L1991
+	mov	r10, r1
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bcs	.L1986
+	ldr	r1, .L1991+4
+	movw	r2, #503
+	ldr	r0, .L1991+8
+	bl	printf
+	ldr	r1, .L1991+12
+	ldr	r0, .L1991+16
+	bl	printf
+.L1986:
+	ldr	r3, .L1991+20
+	movs	r4, #12
+	ldr	r8, .L1991+44
+	ldr	r3, [r3]
+	ldr	r5, [r3, r7, lsl #2]
+	cbnz	r5, .L1987
+	mul	r4, r4, r10
+	ldr	r3, [r8]
+	ldr	r2, .L1991+24
+	movs	r1, #255
+	add	r3, r3, r4
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	ldr	r3, [r8]
+	adds	r2, r3, r4
+	strh	r7, [r3, r4]	@ movhi
+	str	r5, [r2, #4]
+.L1988:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L1987:
+	mul	r4, r4, r10
+	ldr	r3, [r8]
+	ldr	r6, .L1991+28
+	movs	r2, #1
+	mov	r1, r2
+	add	r3, r3, r4
+	mov	r0, r6
+	ldr	r3, [r3, #8]
+	str	r5, [r6, #4]
+	str	r3, [r6, #8]
+	ldr	r3, .L1991+32
+	ldr	r3, [r3]
+	str	r3, [r6, #12]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	ldr	r10, [r6, #12]
+	cmp	r3, #256
+	bne	.L1989
+	mov	r2, r5
+	mov	r1, r7
+	ldr	r0, .L1991+36
+	lsrs	r5, r5, #10
+	bl	printf
+	ldr	r3, [r8]
+	mov	r1, r7
+	ldr	r0, .L1991+40
+	add	r3, r3, r4
+	ldr	r2, [r3, #8]
+	strh	r5, [r0, #40]	@ movhi
+	bl	FtlMapWritePage
+.L1989:
+	ldrh	r3, [r10, #8]
+	cmp	r3, r7
+	beq	.L1990
+	ldr	r1, .L1991+4
+	movw	r2, #529
+	ldr	r0, .L1991+8
+	bl	printf
+	ldr	r1, .L1991+12
+	ldr	r0, .L1991+16
+	bl	printf
+.L1990:
+	ldr	r3, [r8]
+	movs	r1, #0
+	adds	r2, r3, r4
+	str	r1, [r2, #4]
+	strh	r7, [r3, r4]	@ movhi
+	b	.L1988
+.L1992:
+	.align	2
+.L1991:
+	.word	.LANCHOR65
+	.word	.LANCHOR212
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR128
 	.word	.LANCHOR56
-	.word	.LANCHOR110
-	.word	.LANCHOR215
-	.word	.LANCHOR131
-	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LC37
+	.word	.LANCHOR124
+	.word	.LANCHOR95
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	rk_ftl_garbage_collect
+	.global	log2phys
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
-	@ args = 0, pretend = 0, frame = 32
+	.fpu softvfp
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1916
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #32
-	ldr	r2, [r3, #0]
-	cmp	r2, #0
-	bne	.L1905
-	ldr	r3, .L1916+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L1906
-	ldr	r2, .L1916+8
-	ldrh	r2, [r2, #0]
-	cmp	r2, #47
-	bls	.L1907
-	ldr	r3, .L1916+12
-	movw	r5, #65535
-	ldrh	r4, [r3, #0]
-	cmp	r4, r5
-	beq	.L1856
-	ldr	r1, .L1916+16
-	ldrh	r2, [r1, #0]
-	cmp	r2, r5
-	itt	eq
-	strheq	r4, [r1, #0]	@ movhi
-	strheq	r2, [r3, #0]	@ movhi
-.L1856:
-	cmp	r0, #0
-	bne	.L1908
-	ldr	r3, .L1916+20
-	ldrh	r3, [r3, #0]
-	cmp	r3, #24
-	bhi	.L1909
-	ldr	r2, .L1916+24
-	cmp	r3, #16
-	ldrh	r4, [r2, #0]
-	bls	.L1859
-	lsrs	r4, r4, #5
-	b	.L1858
-.L1859:
-	cmp	r3, #12
-	bls	.L1860
-	lsrs	r4, r4, #4
-	b	.L1858
-.L1860:
-	cmp	r3, #8
-	bls	.L1858
-	lsrs	r4, r4, #2
-	b	.L1858
-.L1909:
+	ldr	r3, .L2007
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r7, r1
+	mov	r10, r2
+	ldrh	r4, [r3]
+	adds	r3, r4, #7
 	movs	r4, #1
-.L1858:
-	ldr	r2, .L1916+28
-	ldrh	r1, [r2, #0]
-	cmp	r1, r3
-	mov	r1, r2
-	bcs	.L1862
-	ldr	r3, .L1916+32
-	movw	r0, #65535
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	bne	.L1863
-	ldr	r0, .L1916+16
-	ldrh	r0, [r0, #0]
-	cmp	r0, r3
-	bne	.L1863
-	ldr	r3, .L1916+36
-	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1864
-	ldr	r3, .L1916+40
-	movs	r1, #3
-	ldr	r3, [r3, #0]
-	muls	r1, r3, r1
-	ldr	r3, .L1916+44
-	ldr	r3, [r3, #0]
-	cmp	r3, r1, lsr #2
-	bcs	.L1865
-.L1864:
-	ldr	r3, .L1916+48
-	movs	r2, #3
-	ldrh	r3, [r3, #0]
-	muls	r2, r3, r2
-	ldr	r3, .L1916+28
-	asrs	r2, r2, #2
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1866
-.L1865:
-	movs	r3, #18
-	strh	r3, [r2, #0]	@ movhi
-.L1866:
-	ldr	r3, .L1916+52
-	movs	r2, #0
-	str	r2, [r3, #0]
-	b	.L1855
-.L1863:
-	ldr	r3, .L1916+48
-	movs	r2, #3
-	ldrh	r3, [r3, #0]
-	muls	r3, r2, r3
-	asrs	r3, r3, #2
-	strh	r3, [r1, #0]	@ movhi
-.L1862:
-	ldr	r3, .L1916+56
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1857
-	adds	r4, r4, #32
+	lsr	r8, r0, r3
+	lsls	r4, r4, r3
+	ldr	r3, .L2007+4
+	subs	r4, r4, #1
+	uxth	r8, r8
+	ands	r4, r4, r0
+	ldr	r3, [r3]
 	uxth	r4, r4
-	b	.L1857
-.L1908:
-	movs	r4, #1
-.L1857:
-	ldr	r3, .L1916+60
-	ldrh	r2, [r3, #0]
-	movw	r3, #65535
-	cmp	r2, r3
-	bne	.L1868
-	ldr	r3, .L1916+16
-	ldrh	r1, [r3, #0]
-	cmp	r1, r2
-	beq	.L1869
-	ldr	r0, .L1916+64
-	ldr	r0, [r0, #0]
-	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1870
-	strh	r2, [r3, #0]	@ movhi
-.L1870:
-	ldrh	r1, [r3, #0]
-	ldr	r2, .L1916+60
-	strh	r1, [r2, #0]	@ movhi
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1869:
-	ldr	r5, .L1916+60
-	movw	r6, #65535
+	cmp	r0, r3
+	bcc	.L1994
+	ldr	r1, .L2007+8
+	movw	r2, #851
+	ldr	r0, .L2007+12
+	bl	printf
+	ldr	r1, .L2007+16
+	ldr	r0, .L2007+20
+	bl	printf
+.L1994:
+	ldr	r6, .L2007+24
+	mov	fp, #12
+	ldr	r3, .L2007+28
+	ldr	r1, [r6]
+	ldrh	r2, [r3]
 	movs	r3, #0
-	ldrh	r0, [r5, #0]
-	strb	r3, [r5, #8]
-	cmp	r0, r6
-	beq	.L1868
-	bl	IsBlkInGcList
-	cbz	r0, .L1871
-	strh	r6, [r5, #0]	@ movhi
-.L1871:
-	ldr	r3, .L1916+68
-	ldr	r6, .L1916+60
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1872
-	ldrh	r0, [r6, #0]
-	bl	ftl_get_blk_mode
-	strb	r0, [r6, #8]
-.L1872:
-	ldrh	r2, [r6, #0]
+.L1995:
+	uxth	r5, r3
+	cmp	r5, r2
+	bcc	.L2000
+	bl	select_l2p_ram_region
+	mul	fp, fp, r0
+	ldr	r3, [r6]
+	mov	r5, r0
+	ldrh	r1, [r3, fp]
+	add	r2, r3, fp
 	movw	r3, #65535
-	ldr	r5, .L1916+60
-	cmp	r2, r3
-	beq	.L1868
-	mov	r0, r5
-	bl	make_superblock
-	ldr	r2, .L1916+72
-	movs	r3, #0
-	strh	r3, [r5, #2]	@ movhi
-	strb	r3, [r5, #6]
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L1916+64
-	ldrh	r2, [r5, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1916+76
-	strh	r2, [r3, #0]	@ movhi
-.L1868:
-	ldr	r2, .L1916+60
-	ldr	r1, .L1916+80
-	ldrh	r3, [r2, #0]
-	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	beq	.L1873
-	ldr	r1, .L1916+84
-	ldrh	r1, [r1, #0]
-	cmp	r1, r3
-	bne	.L1910
-.L1874:
-.L1873:
-	movw	r3, #65535
-	strh	r3, [r2, #0]	@ movhi
-	b	.L1915
-.L1910:
-	ldr	r6, .L1916+88
-	ldr	r7, .L1916+92
-.L1912:
-	ldr	r3, .L1916+60
-	movw	r2, #65535
-	ldrh	r8, [r3, #0]
-	cmp	r8, r2
-	bne	.L1876
-	ldr	r2, .L1916+52
-	mov	sl, r3
-	ldr	fp, .L1916+64
-	movs	r1, #0
-	str	r1, [r2, #0]
-.L1911:
-	ldrh	r1, [r6, #0]
-	mov	r0, r1
-	str	r1, [sp, #8]
-	bl	List_get_gc_head_node
-	uxth	r5, r0
-	strh	r5, [sl, #0]	@ movhi
-	cmp	r5, r8
-	bne	.L1878
-	ldr	r3, .L1916+88
-	movs	r2, #0
-	movs	r0, #8
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1855
-.L1878:
-	mov	r0, r5
-	bl	IsBlkInGcList
-	ldr	r2, [sp, #8]
-	adds	r3, r2, #1
-	cbnz	r0, .L1913
-.L1879:
-	ldr	r1, .L1916+24
-	uxth	r0, r3
-	ldr	r3, [fp, #0]
-	strh	r0, [r6, #0]	@ movhi
-	ldrh	ip, [r1, #0]
-	ldr	r1, .L1916+96
-	ldrh	r2, [r3, r5, lsl #1]
-	ldrh	r1, [r1, #0]
-	mul	r1, r1, ip
-	cmp	r2, r1, asr #1
-	bgt	.L1881
-	cmp	r0, #48
-	bls	.L1882
-	cmp	r2, #8
-	bls	.L1882
-	ldr	r2, .L1916+100
-	ldrh	r2, [r2, #0]
-	cmp	r2, #35
-	bhi	.L1882
-.L1881:
-	movs	r2, #0
-	strh	r2, [r6, #0]	@ movhi
-.L1882:
-	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1916+60
-	cmp	r2, r1
-	blt	.L1883
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1916+88
-	movs	r2, #0
-	strh	r2, [r3, #0]	@ movhi
-	b	.L1915
-.L1883:
-	cmp	r2, #0
-	bne	.L1884
-	movw	r0, #65535
-	bl	decrement_vpc_count
-	ldrh	r3, [r6, #0]
-	adds	r3, r3, #1
-.L1913:
-	strh	r3, [r6, #0]	@ movhi
-	b	.L1911
-.L1917:
-	.align	2
-.L1916:
-	.word	.LANCHOR82
-	.word	.LANCHOR168
-	.word	.LANCHOR91
-	.word	.LANCHOR138
-	.word	.LANCHOR137
-	.word	.LANCHOR94
-	.word	.LANCHOR56
-	.word	.LANCHOR173
-	.word	.LANCHOR99
-	.word	.LANCHOR233
-	.word	.LANCHOR76
-	.word	.LANCHOR106
-	.word	.LANCHOR201
-	.word	.LANCHOR169
-	.word	.LANCHOR139
-	.word	.LANCHOR202
-	.word	.LANCHOR89
-	.word	.LANCHOR7
-	.word	.LANCHOR234
-	.word	.LANCHOR235
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR175
-	.word	.LANCHOR123
-	.word	.LANCHOR41
-	.word	.LANCHOR133
-.L1884:
-	movs	r2, #0
-	strb	r2, [r3, #8]
-	ldr	r2, .L1918
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1885
-	mov	r0, r5
-	str	r3, [sp, #4]
-	bl	ftl_get_blk_mode
-	ldr	r3, [sp, #4]
-	strb	r0, [r3, #8]
-.L1885:
-	ldr	r5, .L1918+4
-	ldr	r3, .L1918+8
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1886
-	ldr	r1, .L1918+12
-	movw	r2, #835
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1886:
-	ldr	r3, .L1918+28
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1887
-	ldr	r1, .L1918+12
-	mov	r2, #836
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1887:
-	ldr	r5, .L1918+4
-	ldr	r3, .L1918+32
-	ldrh	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1888
-	ldr	r1, .L1918+12
-	movw	r2, #837
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1888:
-	ldr	r0, .L1918+4
-	bl	make_superblock
-	ldr	r1, .L1918+36
-	movs	r3, #0
-	ldrh	r0, [r5, #0]
-	strh	r3, [r1, #0]	@ movhi
-	ldr	r1, .L1918+40
-	ldr	r1, [r1, #0]
-	ldrh	r0, [r1, r0, lsl #1]
-	ldr	r1, .L1918+44
-	strh	r3, [r5, #2]	@ movhi
-	strb	r3, [r5, #6]
-	strh	r0, [r1, #0]	@ movhi
-.L1876:
-	ldr	r3, .L1918+48
-	movs	r2, #1
-	str	r2, [r3, #0]
-	ldr	r3, .L1918+52
-	ldrh	r3, [r3, #0]
-	str	r3, [sp, #8]
-	ldr	r3, .L1918
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1918+4
-	cbz	r2, .L1889
-	ldrb	r2, [r3, #8]	@ zero_extendqisi2
-	cmp	r2, #1
-	bne	.L1889
-	ldr	r2, .L1918+56
-	ldrh	r2, [r2, #0]
-	str	r2, [sp, #8]
-.L1889:
-	ldrh	r3, [r3, #2]
-	ldr	r8, [sp, #8]
-	adds	r2, r3, r4
-	cmp	r2, r8
-	itt	gt
-	rsbgt	r4, r3, r8
-	uxthgt	r4, r4
-	movs	r3, #0
-	str	r4, [sp, #20]
-	str	r3, [sp, #12]
-	b	.L1891
-.L1893:
-	ldrh	r1, [r2, #2]!
-	movw	r8, #65535
-	cmp	r1, r8
-	beq	.L1892
-	mla	r8, r0, r5, lr
-	adds	r5, r5, #1
-	orr	r1, r4, r1, lsl #10
-	uxth	r5, r5
-	str	r1, [r8, #4]
-.L1892:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L1900:
-	cmp	r3, ip
-	bne	.L1893
-	ldr	r3, .L1918+4
+	beq	.L2001
+	ldr	r3, [r2, #4]
+	cmp	r3, #0
+	bge	.L2001
+	bl	flush_l2p_region
+.L2001:
 	mov	r1, r5
-	ldr	r0, [r7, #0]
-	movs	r4, #0
-	mov	sl, r5
-	ldrb	r2, [r3, #8]	@ zero_extendqisi2
-	bl	FlashReadPages
-	str	r4, [sp, #16]
-	b	.L1894
-.L1898:
-	ldr	r3, [r7, #0]
-	adds	r2, r3, r4
-	ldr	r3, [r3, r4]
-	ldr	r5, [r2, #12]
-	adds	r3, r3, #1
-	beq	.L1895
-	ldrh	r3, [r5, #0]
-	movw	r8, #61589
-	cmp	r3, r8
-	bne	.L1895
-	ldr	r8, [r5, #8]
-	cmp	r8, #-1
-	bne	.L1896
-	ldr	r1, .L1918+12
-	mov	r2, #876
-	ldr	r0, .L1918+16
-	bl	printf
-	ldr	r0, .L1918+20
-	ldr	r1, .L1918+24
-	bl	printf
-.L1896:
-	movs	r2, #0
-	add	r1, sp, #28
 	mov	r0, r8
-	bl	log2phys
-	ldr	r2, [r7, #0]
-	ldr	r1, [sp, #28]
-	adds	r2, r2, r4
-	bic	r1, r1, #-2147483648
-	ldr	r3, [r2, #4]
-	cmp	r1, r3
-	bne	.L1895
-	ldr	r0, .L1918+36
-	mov	fp, #36
-	ldr	r8, .L1918+72
-	ldr	r2, [r2, #16]
-	ldrh	r3, [r0, #0]
-	ldr	r1, [r8, #0]
+	bl	load_l2p_region
+	b	.L1996
+.L2000:
 	adds	r3, r3, #1
-	strh	r3, [r0, #0]	@ movhi
-	ldr	r0, .L1918+60
-	ldr	r3, [r0, #0]
-	mla	r3, fp, r1, r3
-	str	r2, [r3, #16]
-	str	r3, [sp, #4]
-	bl	Ftl_get_new_temp_ppa
-	ldr	r3, [sp, #4]
-	ldr	r1, .L1918+60
-	ldr	r2, [r1, #0]
-	str	r0, [r3, #4]
-	ldr	r3, [r8, #0]
-	ldr	r0, [r7, #0]
-	mla	r2, fp, r3, r2
-	adds	r0, r0, r4
-	ldr	fp, .L1918+32
+	mla	r0, fp, r3, r1
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r8
+	bne	.L1995
+.L1996:
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r3, r3, r5, r2
+	cmp	r10, #0
+	bne	.L1997
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r4, lsl #2]
+	str	r3, [r7]
+.L1998:
+	ldr	r2, [r6]
+	movs	r3, #12
+	mla	r5, r3, r5, r2
+	ldr	r3, [r5, #4]
+	adds	r2, r3, #1
+	beq	.L2004
 	adds	r3, r3, #1
-	ldr	r1, [r0, #8]
-	str	r1, [r2, #8]
-	ldr	r1, [r0, #12]
-	str	r1, [r2, #12]
-	movs	r1, #1
-	ldr	r2, [sp, #28]
-	str	r2, [r5, #12]
-	ldrh	r2, [fp, #0]
-	strh	r2, [r5, #2]	@ movhi
-	ldr	r2, .L1918+64
-	str	r3, [r8, #0]
-	ldr	r2, [r2, #0]
-	str	r2, [r5, #4]
-	bl	FtlGcBufAlloc
-	ldr	r3, .L1918
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1897
-	ldrb	r3, [fp, #7]	@ zero_extendqisi2
-	ldr	r2, [r8, #0]
-	cmp	r2, r3
-	beq	.L1897
-	ldrh	r3, [fp, #4]
-	cbnz	r3, .L1895
-.L1897:
-	bl	Ftl_gc_temp_data_write_back
-	cmp	r0, #0
-	bne	.L1914
-.L1895:
-	ldr	r8, [sp, #16]
-	adds	r4, r4, #36
-	add	r3, r8, #1
-	uxth	r3, r3
-	str	r3, [sp, #16]
-.L1894:
-	ldr	r3, [sp, #16]
-	cmp	r3, sl
-	bne	.L1898
-	ldr	r8, [sp, #12]
-	add	r8, r8, #1
-	str	r8, [sp, #12]
-.L1891:
-	ldr	r8, [sp, #12]
-	ldr	r2, .L1918+4
-	uxth	r3, r8
-	ldr	r8, [sp, #20]
-	cmp	r3, r8
-	bcs	.L1899
-	ldr	r3, .L1918+68
-	movs	r5, #0
-	ldrh	r4, [r2, #2]
-	movs	r0, #36
-	ldr	lr, [r7, #0]
-	adds	r2, r2, #14
-	ldrh	ip, [r3, #0]
-	ldr	r3, [sp, #12]
-	adds	r4, r4, r3
-	mov	r3, r5
-	b	.L1900
-.L1899:
-	ldrh	r3, [r2, #2]
-	ldr	r4, [sp, #20]
-	ldr	r8, [sp, #8]
-	adds	r4, r4, r3
-	uxth	r4, r4
-	strh	r4, [r2, #2]	@ movhi
-	cmp	r4, r8
-	bcc	.L1901
-	ldr	r3, .L1918+72
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1902
-	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1902
-.L1914:
-	ldr	r3, .L1918+48
-	movs	r2, #0
-	str	r2, [r3, #0]
-.L1915:
-	ldr	r3, .L1918+76
-	ldrh	r0, [r3, #0]
-	b	.L1855
-.L1902:
-	ldr	r3, .L1918+36
-	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1903
-	ldr	r3, .L1918+4
-	ldr	r2, .L1918+40
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r2, r1, lsl #1]
-	cbz	r4, .L1903
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldrh	r0, [r3, #0]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1903:
-	ldr	r3, .L1918+4
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1901:
-	ldr	r3, .L1918+80
-	ldrh	r0, [r3, #0]
-	cmp	r0, #2
-	bhi	.L1904
-	ldr	r3, .L1918+52
-	ldrh	r4, [r3, #0]
-	b	.L1912
-.L1904:
-	ldr	r3, .L1918+48
-	movs	r2, #0
-	adds	r0, r0, #1
-	str	r2, [r3, #0]
-	b	.L1855
-.L1919:
+	str	r3, [r5, #4]
+.L2004:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L1997:
+	ldr	r1, [r7]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r4, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L2007+32
+	strh	r8, [r3]	@ movhi
+	b	.L1998
+.L2008:
 	.align	2
-.L1918:
-	.word	.LANCHOR7
-	.word	.LANCHOR202
-	.word	.LANCHOR97
-	.word	.LANCHOR236
-	.word	.LC3
+.L2007:
+	.word	.LANCHOR55
+	.word	.LANCHOR71
+	.word	.LANCHOR213
 	.word	.LC4
 	.word	.LC5
-	.word	.LANCHOR98
-	.word	.LANCHOR99
-	.word	.LANCHOR234
-	.word	.LANCHOR89
-	.word	.LANCHOR235
-	.word	.LANCHOR168
-	.word	.LANCHOR56
-	.word	.LANCHOR57
-	.word	.LANCHOR178
-	.word	.LANCHOR157
-	.word	.LANCHOR41
-	.word	.LANCHOR119
-	.word	.LANCHOR233
-	.word	.LANCHOR94
-.L1905:
-	movs	r0, #0
-	b	.L1855
-.L1906:
-	mov	r0, r2
-	b	.L1855
-.L1907:
-	mov	r0, r3
-.L1855:
-	add	sp, sp, #32
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
-	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+	.word	.LC6
+	.word	.LANCHOR95
+	.word	.LANCHOR66
+	.word	.LANCHOR96
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	ftl_fix_nand_power_lost_error
+	.global	FtlReUsePrevPpa
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
-	@ args = 0, pretend = 0, frame = 48
+	.fpu softvfp
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1929
-	push	{r4, r5, r6, r7, r8, lr}
-	sub	sp, sp, #48
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L2019
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r2, [r5]
+	mov	r7, r0
+	ldrh	r3, [r2, r0, lsl #1]
 	cmp	r3, #0
-	beq	.L1920
-	ldr	r3, .L1929+4
-	ldr	r5, .L1929+8
-	ldr	r8, .L1929+32
-	ldrh	r4, [r3, #0]
-	ldr	r3, [r5, #0]
-	ldr	r7, .L1929+12
+	bne	.L2010
+	ldr	r2, .L2019+4
+	ldr	r4, [r2]
+	cmp	r4, #0
+	beq	.L2011
+	ldr	r2, .L2019+8
+	movw	lr, #65535
+	ldr	ip, .L2019+32
+	ldr	r0, .L2019+12
+	ldr	r2, [r2]
+	ldrh	r1, [r0]
+	mov	r8, r0
+	subs	r4, r4, r2
+	asrs	r4, r4, #1
+	mul	r4, ip, r4
+	mov	ip, #6
+	uxth	r4, r4
+.L2012:
+	uxth	r0, r3
+	cmp	r1, r0
+	bls	.L2011
+	cmp	r4, r7
+	bne	.L2013
 	mov	r1, r4
-	ldr	r0, .L1929+16
-	lsls	r6, r4, #1
-	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r0, .L2019+4
+	bl	List_remove_node
+	ldrh	r3, [r8]
+	cbnz	r3, .L2014
+	ldr	r1, .L2019+16
+	movw	r2, #1823
+	ldr	r0, .L2019+20
 	bl	printf
-	ldrh	r0, [r8, #0]
-	bl	FtlGcRefreshOpenBlock
-	ldrh	r0, [r7, #0]
-	bl	FtlGcRefreshOpenBlock
-	mov	r0, r8
-	bl	allocate_new_data_superblock
-	mov	r0, r7
-	bl	allocate_new_data_superblock
-	movw	r7, #4097
-	b	.L1922
-.L1924:
-	movs	r0, #1
-	mov	r1, r0
-	bl	rk_ftl_garbage_collect
-	ldr	r3, [r5, #0]
-	ldrh	r3, [r3, r6]
-	cbz	r3, .L1923
-.L1922:
-	subs	r7, r7, #1
-	bne	.L1924
-.L1923:
-	ldr	r5, .L1929+8
-	mov	r1, r4
-	ldr	r0, .L1929+16
-	ldr	r3, [r5, #0]
-	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r1, .L2019+24
+	ldr	r0, .L2019+28
 	bl	printf
-	ldr	r3, [r5, #0]
-	ldrh	r5, [r3, r4, lsl #1]
-	cmp	r5, #0
-	bne	.L1925
-	add	r6, sp, #48
-	mov	r0, sp
-	movs	r7, #36
-	strh	r4, [r6, #-48]!	@ movhi
-	adds	r6, r6, #14
-	bl	make_superblock
-	ldr	r3, .L1929+20
-	movw	lr, #65535
-	mov	r1, r5
-	ldrh	r8, [r3, #0]
-	ldr	r3, .L1929+24
-	ldr	ip, [r3, #0]
-	mov	r3, r5
-	b	.L1926
-.L1928:
-	ldrh	r0, [r6, #2]!
-	cmp	r0, lr
-	beq	.L1927
-	mla	r2, r7, r5, ip
-	adds	r5, r5, #1
-	lsls	r0, r0, #10
-	uxth	r5, r5
-	str	r0, [r2, #4]
-	str	r1, [r2, #8]
-	str	r1, [r2, #12]
-.L1927:
+.L2014:
+	ldrh	r3, [r8]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r8]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r2, [r5]
+	ldrh	r3, [r2, r7, lsl #1]
+.L2010:
 	adds	r3, r3, #1
-	uxth	r3, r3
-.L1926:
-	cmp	r3, r8
-	bne	.L1928
-	ldr	r3, .L1929+8
-	mov	r1, r4
-	ldr	r0, .L1929+28
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	ldr	r4, .L1929+24
-	bl	printf
-	movs	r1, #0
-	mov	r2, r5
-	ldr	r0, [r4, #0]
-	bl	FlashEraseBlocks
-	ldr	r0, [r4, #0]
-	movs	r1, #1
-	mov	r2, r5
-	bl	FlashEraseBlocks
-.L1925:
-	ldr	r3, .L1929+4
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1920:
-	add	sp, sp, #48
+	strh	r3, [r2, r7, lsl #1]	@ movhi
+	b	.L2011
+.L2013:
+	mul	r4, ip, r4
+	adds	r3, r3, #1
+	ldrh	r4, [r2, r4]
+	cmp	r4, lr
+	bne	.L2012
+.L2011:
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r6
+	bl	log2phys
+	add	sp, sp, #8
+	@ sp needed
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1930:
-	.align	2
-.L1929:
-	.word	.LANCHOR7
-	.word	.LANCHOR229
-	.word	.LANCHOR89
-	.word	.LANCHOR98
-	.word	.LC44
-	.word	.LANCHOR41
-	.word	.LANCHOR83
-	.word	.LC45
-	.word	.LANCHOR97
-	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
-	.section	.text.FtlInit,"ax",%progbits
-	.align	1
-	.global	FtlInit
-	.thumb
-	.thumb_func
-	.type	FtlInit, %function
-FtlInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-.L1932:
-	push	{r3, r4, r5, lr}
-	mov	r3, #-1
-	ldr	r2, .L1939
-	mov	r5, r0
-	ldr	r4, .L1939+4
-	ldr	r1, .L1939+8
-	ldr	r0, .L1939+12
-	str	r3, [r4, #0]
-	movs	r3, #0
-	str	r3, [r2, #0]
-	ldr	r2, .L1939+16
-	str	r3, [r2, #0]
-	bl	printf
-	mov	r0, r5
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1939+20
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	r0, .L1933
-	ldr	r0, .L1939+24
-	b	.L1938
-.L1933:
-	bl	FtlSysBlkInit
-	cbz	r0, .L1935
-	ldr	r0, .L1939+28
-.L1938:
-	ldr	r1, .L1939+32
-	bl	printf
-	b	.L1934
-.L1935:
-	movs	r1, #1
-	str	r1, [r4, #0]
-	bl	rk_ftl_garbage_collect
-	ldr	r3, .L1939+36
-	ldrh	r3, [r3, #0]
-	cmp	r3, #15
-	bhi	.L1934
-	mov	r4, #1024
-.L1936:
-	movs	r0, #1
-	mov	r1, r0
-	bl	rk_ftl_garbage_collect
-	subs	r4, r4, #1
-	bne	.L1936
-.L1934:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L1940:
+.L2020:
 	.align	2
-.L1939:
-	.word	.LANCHOR237
-	.word	.LANCHOR225
-	.word	.LC46
-	.word	.LC4
+.L2019:
 	.word	.LANCHOR82
-	.word	.LANCHOR42
-	.word	.LC47
-	.word	.LC48
-	.word	.LANCHOR238
-	.word	.LANCHOR94
-	.size	FtlInit, .-FtlInit
-	.section	.text.ftl_write,"ax",%progbits
+	.word	.LANCHOR86
+	.word	.LANCHOR80
+	.word	.LANCHOR87
+	.word	.LANCHOR214
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	-1431655765
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
-	.global	ftl_write
+	.global	FtlVendorPartWrite
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_write, %function
-ftl_write:
-	@ args = 0, pretend = 0, frame = 80
+	.fpu softvfp
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	cmp	r0, #16
-	sub	sp, sp, #80
+	ldr	r3, .L2033
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	str	r2, [sp]
+	adds	r2, r0, r1
+	mov	r7, r0
 	mov	r5, r1
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2029
+	ldr	r3, .L2033+4
+	mov	r8, #0
+	ldrh	r6, [r3]
+	lsr	r6, r0, r6
+	lsl	fp, r6, #2
+.L2023:
+	cbnz	r5, .L2028
+.L2021:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2028:
+	ldr	r3, .L2033+8
+	mov	r0, r7
+	ldr	r10, .L2033+24
+	ldr	r3, [r3]
+	ldr	r2, [r3, fp]
+	ldr	r3, .L2033+12
 	str	r2, [sp, #12]
-	str	r3, [sp, #4]
-	bne	.L1942
-	add	r0, r1, #256
-	mov	r1, r2
-	mov	r2, r3
-	bl	FtlVendorPartWrite
-	b	.L1943
-.L1942:
-	ldr	r3, .L1984
-	ldr	r0, [sp, #12]
-	ldr	r3, [r3, #0]
-	adds	r7, r0, r1
-	cmp	r7, r3
-	bhi	.L1974
-	ldr	r3, .L1984+4
-	ldr	r0, [r3, #0]
-	adds	r3, r0, #1
-	beq	.L1943
-	ldr	r3, .L1984+8
-	mov	r2, #2048
-	mov	r0, r1
-	str	r2, [r3, #0]
-	ldr	r3, .L1984+12
-	ldrh	r6, [r3, #0]
-	mov	r1, r6
-	bl	__aeabi_uidiv
-	mov	r1, r6
-	mov	sl, r0
-	subs	r0, r7, #1
-	bl	__aeabi_uidiv
-	ldr	r3, .L1984+16
-	ldr	r2, [r3, #0]
-	rsb	r4, sl, r0
-	str	r0, [sp, #24]
-	adds	r1, r4, #1
-	str	r1, [sp, #0]
-	adds	r2, r1, r2
-	str	r2, [r3, #0]
-	ldr	r3, .L1984+20
-	ldr	r7, [r3, #0]
-	cbz	r7, .L1944
-	ldr	r3, [r7, #16]
-	cmp	sl, r3
-	beq	.L1945
-	bl	FtlCacheWriteBack
-	b	.L1944
-.L1945:
-	ldr	r3, .L1984+24
-	mov	r1, r6
-	mov	r0, r5
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
+	ldrh	r3, [r3]
+	mov	r1, r3
+	str	r3, [sp, #8]
 	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #8]
 	ldr	r2, [sp, #12]
-	ldr	r0, [r7, #8]
-	subs	r6, r6, r1
-	add	r0, r0, r1, lsl #9
-	cmp	r6, r2
-	it	cs
-	movcs	r6, r2
-	ldr	r1, [sp, #4]
-	lsl	r8, r6, #9
-	mov	r2, r8
-	bl	memcpy
-	cmp	r4, #0
-	beq	.L1976
-	ldr	r3, [sp, #12]
-	adds	r5, r5, r6
-	ldr	r0, [sp, #4]
-	add	sl, sl, #1
-	subs	r3, r3, r6
-	str	r3, [sp, #12]
-	add	r0, r0, r8
-	str	r0, [sp, #4]
-	bl	FtlCacheWriteBack
-	str	r4, [sp, #0]
-.L1944:
-	mov	r4, sl
-	str	sl, [sp, #20]
-	ldr	r6, .L1984+28
-	mov	sl, r5
-	b	.L1946
-.L1973:
-	ldr	r1, .L1984+32
-	ldrb	r2, [r6, #6]	@ zero_extendqisi2
-	ldrh	r3, [r1, #0]
-	cmp	r2, r3
-	bcc	.L1947
-	ldr	r1, .L1984+36
-	movw	r2, #1630
-	ldr	r0, .L1984+40
-	bl	printf
-	ldr	r0, .L1984+44
-	ldr	r1, .L1984+48
-	bl	printf
-.L1947:
-	ldr	r2, .L1984+28
-	ldrh	r3, [r2, #4]
-	cbnz	r3, .L1948
-	bl	FtlCacheWriteBack
-	ldr	r0, .L1984+28
-	bl	allocate_new_data_superblock
-.L1948:
-	ldrb	r3, [r6, #7]	@ zero_extendqisi2
-	ldrh	r2, [r6, #4]
-	ldr	r1, .L1984+32
-	lsls	r3, r3, #2
-	ldr	r0, [sp, #0]
-	cmp	r3, r2
-	it	cs
-	movcs	r3, r2
-	ldrb	r2, [r6, #6]	@ zero_extendqisi2
-	cmp	r3, r0
+	str	r1, [sp, #4]
+	subs	r4, r3, r1
+	uxth	r4, r4
+	cmp	r5, r4
 	it	cc
-	movcc	r0, r3
-	ldrh	r3, [r1, #0]
-	str	r0, [sp, #8]
-	cmp	r2, r3
-	bcc	.L1949
-	ldr	r1, .L1984+36
-	movw	r2, #1663
-	ldr	r0, .L1984+40
-	bl	printf
-	ldr	r0, .L1984+44
-	ldr	r1, .L1984+48
-	bl	printf
-.L1949:
-	movs	r3, #0
-	ldr	r5, .L1984+52
-	str	r3, [sp, #16]
-	b	.L1950
-.L1969:
-	ldrh	r3, [r6, #4]
-	cmp	r3, #0
-	beq	.L1977
-	movs	r2, #0
-	add	r1, sp, #76
-	mov	r0, r4
-	movs	r7, #36
-	bl	log2phys
-	ldr	r0, .L1984+28
-	bl	get_new_active_ppa
-	ldr	r3, [sp, #16]
-	muls	r7, r3, r7
-	ldr	r3, [r5, #0]
-	adds	r3, r3, r7
-	str	r4, [r3, #16]
-	str	r0, [r3, #4]
-	ldr	r0, .L1984+56
-	ldrh	r2, [r0, #0]
-	ldr	r0, [sp, #16]
-	mul	r1, r2, r0
-	lsrs	r1, r1, #2
-	str	r1, [sp, #32]
-	ldr	r1, .L1984+60
-	ldr	r0, [sp, #32]
-	ldr	r1, [r1, #0]
-	add	r8, r1, r0, lsl #2
-	str	r8, [r3, #12]
-	str	r1, [sp, #36]
-	mov	r0, r8
-	movs	r1, #0
-	bl	memset
-	ldr	r1, [sp, #20]
-	ldr	r3, .L1984+12
-	cmp	r4, r1
-	beq	.L1952
-	ldr	r2, [sp, #24]
-	cmp	r4, r2
-	bne	.L1979
-	b	.L1983
-.L1952:
-	ldrh	fp, [r3, #0]
-	mov	r0, sl
-	mov	r1, fp
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #12]
-	rsb	fp, r1, fp
-	str	r1, [sp, #28]
-	cmp	fp, r3
-	it	cs
-	movcs	fp, r3
-	b	.L1955
-.L1983:
-	ldr	r0, [sp, #12]
-	ldrh	fp, [r3, #0]
-	movs	r3, #0
-	add	r2, sl, r0
-	str	r3, [sp, #28]
-	mls	fp, r4, fp, r2
-	uxth	fp, fp
-.L1955:
-	ldr	r3, .L1984+12
-	ldrh	r3, [r3, #0]
-	cmp	fp, r3
-	bne	.L1956
-	ldr	r0, [sp, #20]
-	ldr	r3, [r5, #0]
-	cmp	r4, r0
-	add	r7, r3, r7
-	bne	.L1957
-	ldr	r1, [sp, #4]
-	str	r1, [r7, #8]
-	b	.L1958
-.L1957:
-	mul	r3, fp, r4
-	ldr	r2, [sp, #4]
-	rsb	r3, sl, r3
-	add	r3, r2, r3, lsl #9
-	b	.L1982
-.L1956:
-	ldr	r3, [sp, #20]
+	uxthcc	r4, r5
+	cbz	r2, .L2025
 	cmp	r4, r3
-	ldr	r3, [r5, #0]
-	it	eq
-	ldreq	r2, .L1984+64
-	add	r3, r3, r7
-	it	ne
-	ldrne	r2, .L1984+68
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #8]
-	ldr	r3, [sp, #76]
-	adds	r1, r3, #1
-	beq	.L1961
-	str	r3, [sp, #44]
-	movs	r1, #1
-	ldr	r3, [r5, #0]
-	add	r0, sp, #40
-	str	r4, [sp, #56]
-	adds	r3, r3, r7
-	ldr	r2, [r3, #8]
-	ldr	r3, [r3, #12]
-	str	r2, [sp, #48]
-	movs	r2, #0
-	str	r3, [sp, #52]
+	beq	.L2025
+	ldr	r3, [r10]
+	add	r0, sp, #20
+	str	r2, [sp, #24]
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
 	bl	FlashReadPages
-	ldr	r3, [sp, #40]
-	adds	r3, r3, #1
-	bne	.L1962
-	ldr	r3, .L1984+72
-	ldr	r2, [r3, #72]
-	adds	r2, r2, #1
-	str	r2, [r3, #72]
-	b	.L1963
-.L1962:
-	ldr	r1, [r8, #8]
-	cmp	r1, r4
-	beq	.L1964
-	ldr	r3, .L1984+72
-	ldr	r0, .L1984+76
-	ldr	r2, [r3, #72]
-	adds	r2, r2, #1
-	str	r2, [r3, #72]
-	mov	r2, r4
-	bl	printf
-.L1964:
-	ldr	r3, [r8, #8]
-	cmp	r3, r4
-	beq	.L1963
-	ldr	r1, .L1984+36
-	movw	r2, #1716
-	ldr	r0, .L1984+40
-	bl	printf
-	ldr	r1, .L1984+48
-	ldr	r0, .L1984+44
-	bl	printf
-	b	.L1963
-.L1961:
-	ldr	r3, [r5, #0]
-	movs	r1, #0
-	adds	r3, r3, r7
-	ldr	r0, [r3, #8]
-	ldr	r3, .L1984+80
-	ldrh	r2, [r3, #0]
-	bl	memset
-.L1963:
-	ldr	r0, [sp, #20]
-	ldr	r3, [r5, #0]
-	cmp	r4, r0
-	add	r3, r3, r7
-	bne	.L1965
-	ldr	r0, [r3, #8]
-	ldr	r3, [sp, #28]
-	ldr	r1, [sp, #4]
+.L2026:
+	lsls	r3, r4, #9
+	ldr	r0, [r10]
+	subs	r5, r5, r4
+	mov	r2, r3
+	str	r3, [sp, #8]
+	ldm	sp, {r1, r3}
+	add	r7, r7, r4
+	add	fp, fp, #4
 	add	r0, r0, r3, lsl #9
-	b	.L1981
-.L1985:
+	bl	ftl_memcpy
+	ldr	r2, [r10]
+	mov	r1, r6
+	ldr	r0, .L2033+16
+	adds	r6, r6, #1
+	bl	FtlMapWritePage
+	ldr	r3, [sp]
+	adds	r0, r0, #1
+	it	eq
+	moveq	r8, #-1
+	mov	r2, r3
+	ldr	r3, [sp, #8]
+	add	r2, r2, r3
+	str	r2, [sp]
+	b	.L2023
+.L2025:
+	ldr	r3, .L2033+20
+	movs	r1, #0
+	ldr	r0, [r10]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L2026
+.L2029:
+	mov	r8, #-1
+	b	.L2021
+.L2034:
 	.align	2
-.L1984:
-	.word	.LANCHOR72
-	.word	.LANCHOR225
-	.word	.LANCHOR239
-	.word	.LANCHOR59
+.L2033:
+	.word	.LANCHOR48
+	.word	.LANCHOR55
+	.word	.LANCHOR191
+	.word	.LANCHOR54
+	.word	.LANCHOR215
+	.word	.LANCHOR56
+	.word	.LANCHOR182
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_save_ext_data
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L2037
+	ldr	r3, .L2037+4
+	ldr	r1, [r2]
+	cmp	r1, r3
+	bne	.L2035
+	ldr	r3, .L2037+8
+	movs	r1, #1
+	movs	r0, #0
+	str	r3, [r2, #4]
+	ldr	r3, .L2037+12
+	ldr	r3, [r3]
+	str	r3, [r2, #88]
+	ldr	r3, .L2037+16
+	ldr	r3, [r3]
+	str	r3, [r2, #92]
+	ldr	r3, .L2037+20
+	ldr	r3, [r3]
+	str	r3, [r2, #8]
+	ldr	r3, .L2037+24
+	ldr	r3, [r3]
+	str	r3, [r2, #12]
+	ldr	r3, .L2037+28
+	ldr	r3, [r3]
+	str	r3, [r2, #16]
+	ldr	r3, .L2037+32
+	ldr	r3, [r3]
+	str	r3, [r2, #20]
+	ldr	r3, .L2037+36
+	ldr	r3, [r3]
+	str	r3, [r2, #28]
+	ldr	r3, .L2037+40
+	ldr	r3, [r3]
+	str	r3, [r2, #32]
+	ldr	r3, .L2037+44
+	ldr	r3, [r3]
+	str	r3, [r2, #36]
+	ldr	r3, .L2037+48
+	ldr	r3, [r3]
+	str	r3, [r2, #40]
+	ldr	r3, .L2037+52
+	ldr	r3, [r3]
+	str	r3, [r2, #44]
+	ldr	r3, .L2037+56
+	ldr	r3, [r3]
+	str	r3, [r2, #48]
+	ldr	r3, .L2037+60
+	ldr	r3, [r3]
+	str	r3, [r2, #60]
+	ldr	r3, .L2037+64
+	ldr	r3, [r3]
+	str	r3, [r2, #64]
+	b	FtlVendorPartWrite
+.L2035:
+	bx	lr
+.L2038:
+	.align	2
+.L2037:
+	.word	.LANCHOR136
+	.word	1179929683
+	.word	1342177351
+	.word	.LANCHOR216
+	.word	.LANCHOR217
 	.word	.LANCHOR159
-	.word	.LANCHOR125
+	.word	.LANCHOR160
+	.word	.LANCHOR164
+	.word	.LANCHOR163
+	.word	.LANCHOR166
+	.word	.LANCHOR78
 	.word	.LANCHOR161
-	.word	.LANCHOR97
-	.word	.LANCHOR41
-	.word	.LANCHOR240
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR179
-	.word	.LANCHOR62
-	.word	.LANCHOR185
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR132
-	.word	.LC49
-	.word	.LANCHOR61
-.L1965:
-	ldr	r2, .L1986
-	ldr	r0, [r3, #8]
-	ldrh	r1, [r2, #0]
-	muls	r1, r4, r1
-	ldr	r2, [sp, #4]
-	rsb	r1, sl, r1
-	add	r1, r2, r1, lsl #9
-.L1981:
-	lsl	r2, fp, #9
-	bl	memcpy
-	ldr	r3, [sp, #24]
-	cmp	r4, r3
-	bne	.L1958
-	ldrh	r3, [r6, #4]
-	cbz	r3, .L1958
-	ldr	r3, [r5, #0]
-	adds	r7, r3, r7
-	ldr	r3, .L1986+4
-	str	r7, [r3, #0]
-	ldr	r3, .L1986+8
-	str	r6, [r3, #0]
-	b	.L1958
-.L1979:
-	ldr	r2, [r5, #0]
-	ldrh	r3, [r3, #0]
-	muls	r3, r4, r3
-	ldr	r0, [sp, #4]
-	rsb	r3, sl, r3
-	adds	r7, r2, r7
-	add	r3, r0, r3, lsl #9
-.L1982:
-	str	r3, [r7, #8]
-.L1958:
-	ldr	r1, .L1986+12
-	ldrb	r2, [r6, #6]	@ zero_extendqisi2
-	ldrh	r3, [r1, #0]
-	cmp	r2, r3
-	bcc	.L1967
-	ldr	r1, .L1986+16
-	movw	r2, #1737
-	ldr	r0, .L1986+20
-	bl	printf
-	ldr	r0, .L1986+24
-	ldr	r1, .L1986+28
-	bl	printf
-.L1967:
-	ldr	r2, [sp, #36]
-	movw	r3, #61589
-	ldr	r0, [sp, #32]
-	strh	r3, [r2, r0, lsl #2]	@ movhi
-	ldr	r3, .L1986+32
-	ldr	r2, [r3, #0]
-	str	r2, [r8, #4]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	adds	r2, r2, #1
-	bne	.L1968
-	movs	r2, #0
-	str	r2, [r3, #0]
-.L1968:
-	ldr	r3, [sp, #76]
-	str	r4, [r8, #8]
-	adds	r4, r4, #1
-	str	r3, [r8, #12]
-	ldrh	r3, [r6, #0]
-	strh	r3, [r8, #2]	@ movhi
-	ldr	r3, [sp, #16]
+	.word	.LANCHOR162
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR156
+	.word	.LANCHOR155
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2046
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2044
+	ldr	r3, .L2046+4
+	ldr	r3, [r3]
+	cmp	r3, #29
+	ite	hi
+	movhi	r3, #32
+	movls	r3, #4
+.L2040:
+	ldr	r1, .L2046+8
+	ldrh	r2, [r1]
+	cmp	r2, #31
+	ittt	ls
+	addls	r2, r2, #1
+	movls	r3, #1
+	strhls	r2, [r1]	@ movhi
+	ldr	r2, .L2046+12
+	cbnz	r0, .L2042
+	ldr	r1, [r2]
+	ldr	r0, [r1, #20]
+	ldr	r1, [r1, #16]
+	add	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L2043
+.L2042:
+	ldr	r2, [r2]
+	movs	r0, #64
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	ldr	r3, .L2046+16
+	str	r3, [r2]
+	ldr	r3, .L2046+20
+	ldrh	r1, [r3]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	ldr	r3, [r2, #8]
 	adds	r3, r3, #1
-	str	r3, [sp, #16]
-.L1950:
-	ldr	r3, [sp, #16]
-	ldr	r0, [sp, #8]
-	cmp	r3, r0
-	bne	.L1969
-	b	.L1951
-.L1977:
-	ldr	r3, [sp, #16]
-	str	r3, [sp, #8]
-.L1951:
-	ldr	r3, .L1986+4
-	ldr	r3, [r3, #0]
-	cbz	r3, .L1970
-	ldr	r0, [sp, #8]
-	subs	r0, r0, #1
-	str	r0, [sp, #8]
-	beq	.L1971
-	ldr	r1, [sp, #0]
-	subs	r1, r1, #1
-	str	r1, [sp, #0]
-.L1970:
-	ldr	r3, .L1986+36
-	movs	r2, #0
-	ldr	r1, [sp, #8]
-	ldr	r0, [r3, #0]
-	ldr	r3, .L1986+40
-	bl	FtlProgPages
-	ldr	r2, [sp, #0]
-	ldr	r3, [sp, #8]
-	cmp	r2, r3
-	bcs	.L1972
-	ldr	r1, .L1986+16
-	mov	r2, #1752
-	ldr	r0, .L1986+20
-	bl	printf
-	ldr	r0, .L1986+24
-	ldr	r1, .L1986+28
-	bl	printf
-.L1972:
-	ldr	r0, [sp, #0]
-	ldr	r1, [sp, #8]
-	subs	r0, r0, r1
-	str	r0, [sp, #0]
-.L1946:
-	ldr	r2, [sp, #0]
-	cmp	r2, #0
-	bne	.L1973
-.L1971:
-	ldr	sl, [sp, #20]
-	movs	r0, #0
-	ldr	r3, [sp, #24]
-	rsb	r1, sl, r3
-	bl	rk_ftl_garbage_collect
+	str	r3, [r2, #8]
+	movs	r3, #0
+	str	r3, [r2, #4]
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+.L2043:
 	movs	r0, #0
-	b	.L1943
-.L1974:
-	mov	r0, #-1
-	b	.L1943
-.L1976:
-	mov	r0, r4
-.L1943:
-	add	sp, sp, #80
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1987:
+	pop	{r3, pc}
+.L2044:
+	movs	r3, #32
+	b	.L2040
+.L2047:
 	.align	2
-.L1986:
-	.word	.LANCHOR59
-	.word	.LANCHOR125
-	.word	.LANCHOR224
-	.word	.LANCHOR41
-	.word	.LANCHOR240
-	.word	.LC3
-	.word	.LC4
-	.word	.LC5
-	.word	.LANCHOR157
-	.word	.LANCHOR179
-	.word	.LANCHOR97
-	.size	ftl_write, .-ftl_write
-	.section	.text.ftl_read,"ax",%progbits
+.L2046:
+	.word	.LANCHOR101
+	.word	.LANCHOR168
+	.word	.LANCHOR218
+	.word	.LANCHOR188
+	.word	1112818501
+	.word	.LANCHOR187
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
-	.global	ftl_read
+	.global	allocate_new_data_superblock
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	ftl_read, %function
-ftl_read:
-	@ args = 0, pretend = 0, frame = 72
+	.fpu softvfp
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	cmp	r0, #16
-	sub	sp, sp, #72
-	mov	r4, r1
-	mov	r7, r3
-	str	r2, [sp, #36]
-	bne	.L1989
-	add	r0, r1, #256
-	mov	r1, r2
-	mov	r2, r3
-	bl	FtlVendorPartRead
-	str	r0, [sp, #12]
-	b	.L1990
-.L1989:
-	ldr	r3, [sp, #36]
-	adds	r3, r3, r1
-	str	r3, [sp, #16]
-	ldr	r3, .L2022
-	ldr	r1, [sp, #16]
-	ldr	r3, [r3, #0]
-	cmp	r1, r3
-	bhi	.L2010
-	ldr	r3, .L2022+4
-	ldr	r3, [r3, #0]
-	adds	r2, r3, #1
-	beq	.L2011
-	ldr	fp, .L2022+48
-	bl	FtlCacheWriteBack
-	mov	r0, r4
-	mov	sl, #0
-	mov	r8, r4
-	ldrh	r5, [fp, #0]
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r3, [sp, #16]
-	mov	r1, r5
-	mov	r5, sl
-	str	r0, [sp, #20]
-	subs	r0, r3, #1
-	bl	__aeabi_uidiv
-	ldr	r1, [sp, #20]
-	ldr	r6, [sp, #20]
-	rsb	r3, r1, #1
-	str	sl, [sp, #32]
-	str	sl, [sp, #12]
-	adds	r3, r3, r0
-	str	r3, [sp, #8]
-	ldr	r3, .L2022+8
-	ldr	r1, [sp, #8]
-	str	r0, [sp, #24]
-	ldr	r2, [r3, #0]
-	adds	r2, r1, r2
-	str	r2, [r3, #0]
-	b	.L2017
-.L2009:
-	movs	r2, #0
-	mov	r0, r6
-	add	r1, sp, #68
-	bl	log2phys
-	ldr	r3, [sp, #68]
-	adds	r0, r3, #1
-	bne	.L2018
-	b	.L2021
-.L1995:
-	mla	r0, r0, r6, r4
-	cmp	r0, r8
-	bcc	.L1994
-	ldr	r3, [sp, #16]
-	cmp	r0, r3
-	bcs	.L1994
-	rsb	r0, r8, r0
-	movs	r1, #0
-	mov	r2, #512
-	add	r0, r7, r0, lsl #9
-	bl	memset
-.L1994:
-	adds	r4, r4, #1
-	b	.L1992
-.L2021:
-	movs	r4, #0
-.L1992:
-	ldrh	r0, [fp, #0]
-	cmp	r4, r0
-	bcc	.L1995
-	b	.L1996
-.L2018:
-	ldr	r2, .L2022+12
-	movs	r4, #36
-	ldr	r2, [r2, #0]
-	mla	r4, r4, r5, r2
-	str	r3, [r4, #4]
-	ldr	r3, [sp, #20]
-	cmp	r6, r3
-	bne	.L1997
-	ldr	r3, .L2022+16
-	mov	r0, r8
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #8]
-	ldrh	r3, [fp, #0]
-	mov	r1, r3
-	str	r3, [sp, #4]
-	bl	__aeabi_uidivmod
-	ldr	r3, [sp, #4]
-	str	r1, [sp, #40]
-	subs	r2, r3, r1
-	ldr	r1, [sp, #36]
-	cmp	r2, r1
-	it	cc
-	movcc	r1, r2
-	str	r1, [sp, #32]
-	cmp	r1, r3
-	bne	.L1998
-	str	r7, [r4, #8]
-	b	.L1998
-.L1997:
-	ldr	r3, [sp, #24]
-	cmp	r6, r3
-	bne	.L1999
-	ldr	r3, .L2022+20
-	ldrh	r2, [fp, #0]
-	ldr	r1, [sp, #16]
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #8]
-	mul	r3, r2, r6
-	rsb	sl, r3, r1
-	cmp	sl, r2
-	bne	.L1998
-	b	.L2019
-.L1999:
-	ldrh	r3, [fp, #0]
-	muls	r3, r6, r3
-.L2019:
-	rsb	r3, r8, r3
-	add	r3, r7, r3, lsl #9
-	str	r3, [r4, #8]
-.L1998:
-	ldr	r3, .L2022+24
-	ldr	r2, .L2022+28
-	str	r6, [r4, #16]
-	ldrh	r3, [r3, #0]
-	muls	r3, r5, r3
-	ldr	r2, [r2, #0]
-	adds	r5, r5, #1
-	bic	r3, r3, #3
-	adds	r3, r2, r3
-	str	r3, [r4, #12]
-.L1996:
-	ldr	r3, [sp, #8]
-	adds	r6, r6, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #8]
-	beq	.L2000
-	ldr	r3, .L2022+32
-	ldrh	r3, [r3, #0]
-	cmp	r5, r3, lsl #2
-	bne	.L2017
-.L2000:
-	cmp	r5, #0
-	beq	.L2017
-	ldr	r4, .L2022+12
-	mov	r1, r5
-	movs	r2, #0
-	ldr	r0, [r4, #0]
-	bl	FlashReadPages
-	ldr	r3, [sp, #40]
-	str	r6, [sp, #60]
-	lsls	r3, r3, #9
-	str	r3, [sp, #44]
-	ldr	r3, [sp, #32]
-	lsls	r3, r3, #9
-	str	r3, [sp, #48]
-	lsl	r3, sl, #9
-	str	r3, [sp, #52]
-	movs	r3, #0
-	str	r3, [sp, #28]
-.L2008:
-	movs	r6, #36
-	ldr	r3, [sp, #28]
-	muls	r6, r3, r6
-	ldr	r3, [r4, #0]
-	ldr	r1, [sp, #20]
-	adds	r3, r3, r6
-	ldr	r2, [r3, #16]
-	cmp	r2, r1
-	bne	.L2002
-	ldr	r1, [r3, #8]
-	ldr	r3, .L2022+16
-	ldr	r3, [r3, #0]
-	cmp	r1, r3
-	bne	.L2003
-	ldr	r3, [sp, #44]
-	mov	r0, r7
-	ldr	r2, [sp, #48]
-	adds	r1, r1, r3
-	b	.L2020
-.L2002:
-	ldr	r1, [sp, #24]
-	cmp	r2, r1
-	bne	.L2003
-	ldr	r2, .L2022+20
-	ldr	r1, [r3, #8]
-	ldr	r3, [r2, #0]
-	cmp	r1, r3
-	bne	.L2003
-	ldrh	r0, [fp, #0]
-	ldr	r3, [sp, #24]
-	muls	r0, r3, r0
-	rsb	r0, r8, r0
-	ldr	r2, [sp, #52]
-	add	r0, r7, r0, lsl #9
-.L2020:
-	bl	memcpy
-.L2003:
-	ldr	r3, [r4, #0]
-	adds	r2, r3, r6
-	ldr	r3, [r3, r6]
-	adds	r1, r3, #1
-	bne	.L2004
-	ldr	r2, .L2022+36
-	str	r3, [sp, #12]
-	ldr	r1, [r2, #72]
-	adds	r1, r1, #1
-	str	r1, [r2, #72]
-	b	.L2005
-.L2004:
-	cmp	r3, #256
-	bne	.L2005
-	ldr	r0, [r2, #4]
-	movw	r6, #2049
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	str	r0, [sp, #56]
-	bl	FtlGcRefreshBlock
-.L2007:
-	subs	r6, r6, #1
-	beq	.L2006
-	movs	r0, #1
-	mov	r1, r0
-	bl	rk_ftl_garbage_collect
-	ldr	r1, .L2022+40
-	ldr	r2, [sp, #56]
-	ldrh	r3, [r1, #0]
-	cmp	r3, r2
-	beq	.L2007
-.L2006:
-	bl	FtlSysFlush
-.L2005:
-	ldr	r3, [sp, #28]
-	adds	r3, r3, #1
-	str	r3, [sp, #28]
+	ldr	r3, .L2075
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldrh	r5, [r0]
+	ldrh	r3, [r3]
 	cmp	r3, r5
-	bne	.L2008
-	ldr	r6, [sp, #60]
-	movs	r5, #0
-.L2017:
-	ldr	r3, [sp, #8]
+	bcs	.L2049
+	ldr	r1, .L2075+4
+	movw	r2, #2939
+	ldr	r0, .L2075+8
+	bl	printf
+	ldr	r1, .L2075+12
+	ldr	r0, .L2075+16
+	bl	printf
+.L2049:
+	ldr	r3, .L2075+20
+	ldr	r3, [r3]
 	cmp	r3, #0
-	bne	.L2009
-	ldr	r3, .L2022+44
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L1990
-	ldr	r0, [sp, #8]
-	movs	r1, #1
-	bl	rk_ftl_garbage_collect
-	b	.L1990
-.L2010:
-	mov	r3, #-1
-.L2011:
-	str	r3, [sp, #12]
-.L1990:
-	ldr	r0, [sp, #12]
-	add	sp, sp, #72
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2023:
+	bne	.L2050
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L2051
+	ldr	r3, .L2075+24
+	mov	r0, r5
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L2052
+	bl	INSERT_DATA_LIST
+.L2051:
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L2075+28
+	cmp	r4, r3
+	beq	.L2053
+	ldr	r3, .L2075+32
+	ldrh	r2, [r3]
+	cmp	r2, #1
+	beq	.L2053
+	ldr	r3, .L2075+36
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2054
+.L2053:
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2055:
+	ldr	r6, .L2075+40
+	movw	r2, #65535
+	ldrh	r0, [r6]
+	cmp	r0, r2
+	beq	.L2060
+	cmp	r5, r0
+	bne	.L2061
+	ldr	r3, .L2075+24
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L2062
+.L2061:
+	bl	update_vpc_list
+.L2062:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L2060:
+	mov	r0, r4
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	movs	r0, #0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2050:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L2052:
+	bl	INSERT_FREE_LIST
+	b	.L2051
+.L2054:
+	ldr	r3, .L2075+44
+	cmp	r4, r3
+	bne	.L2055
+	cmp	r2, #3
+	beq	.L2057
+	ldr	r2, .L2075+48
+	ldr	r2, [r2]
+	cmp	r2, #1
+	bne	.L2058
+.L2057:
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L2058:
+	ldr	r2, .L2075+52
+	ldr	r2, [r2]
+	cmp	r2, #0
+	beq	.L2055
+	ldr	r2, .L2075+56
+	ldr	r2, [r2]
+	cmp	r2, #29
+	itt	ls
+	movls	r2, #1
+	strbls	r2, [r3, #8]
+	b	.L2055
+.L2076:
 	.align	2
-.L2022:
-	.word	.LANCHOR72
-	.word	.LANCHOR225
-	.word	.LANCHOR163
-	.word	.LANCHOR177
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR62
-	.word	.LANCHOR185
-	.word	.LANCHOR41
-	.word	.LANCHOR132
-	.word	.LANCHOR202
-	.word	.LANCHOR139
-	.word	.LANCHOR59
-	.size	ftl_read, .-ftl_read
-	.section	.text.FlashReadFacBbtData,"ax",%progbits
+.L2075:
+	.word	.LANCHOR38
+	.word	.LANCHOR219
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR75
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LANCHOR42
+	.word	.LANCHOR8
+	.word	.LANCHOR130
+	.word	.LANCHOR90
+	.word	.LANCHOR156
+	.word	.LANCHOR101
+	.word	.LANCHOR168
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
-	.global	FlashReadFacBbtData
+	.global	FtlProgPages
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashReadFacBbtData, %function
-FlashReadFacBbtData:
-	@ args = 0, pretend = 0, frame = 48
+	.fpu softvfp
+	.type	FtlProgPages, %function
+FtlProgPages:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	mov	r3, r2
-	ldr	r2, .L2033
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r6, r1
-	ldrh	sl, [r2, #14]
-	sub	sp, sp, #48
-	ldrh	r1, [r2, #12]
-	mov	r4, r0
-	ldr	r2, .L2033+4
-	movw	fp, #61664
-	ldr	r7, .L2033+8
-	mul	sl, sl, r1
-	ldr	r2, [r2, #0]
-	str	r2, [sp, #20]
-	ldr	r2, [r7, #0]
-	uxth	sl, sl
-	add	r5, sl, #-1
-	mul	r8, sl, r6
-	str	r2, [sp, #24]
-	uxth	r5, r5
-	sub	sl, sl, #15
-	b	.L2025
-.L2031:
-	add	r2, r5, r8
-	movs	r1, #1
-	add	r0, sp, #12
-	str	r3, [sp, #4]
-	lsls	r2, r2, #10
-	str	r2, [sp, #16]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L2026
-	ldr	r2, [r7, #0]
-	ldrh	r2, [r2, #0]
-	cmp	r2, fp
-	bne	.L2026
-	cbz	r4, .L2032
-	cbnz	r6, .L2028
-	ldr	r2, .L2033+4
-	movs	r0, #1
-	ldr	r5, .L2033+12
-	ldr	r2, [r2, #0]
-	b	.L2029
-.L2030:
-	ubfx	r1, r6, #5, #16
-	and	r7, r6, #31
-	adds	r6, r6, #1
-	lsl	r7, r0, r7
-	ldr	lr, [r2, r1, lsl #2]
-	uxth	r6, r6
-	orr	r7, lr, r7
-	str	r7, [r2, r1, lsl #2]
-.L2029:
-	ldr	r1, [r5, #0]
-	cmp	r6, r1
-	bcc	.L2030
-.L2028:
-	ldr	r2, .L2033+4
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r4, r3
+	ldr	r3, .L2096
+	mov	r5, r0
+	mov	r8, r1
+	ldrb	r6, [r3]	@ zero_extendqisi2
+	cbz	r6, .L2078
+	ldrb	r6, [r4, #8]	@ zero_extendqisi2
+	subs	r3, r6, #1
+	rsbs	r6, r3, #0
+	adcs	r6, r6, r3
+.L2078:
+	ldr	r10, .L2096+32
+	movs	r7, #0
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r2, r6
+	mov	r1, r8
+	mov	r0, r5
+	bl	FlashProgPages
+.L2079:
+	cmp	r7, r8
+	beq	.L2088
+	ldr	fp, .L2096+36
+	b	.L2089
+.L2082:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4]
+	cmp	r3, r0
+	bne	.L2080
+	ldr	r1, [r10]
+	ldrh	r0, [r4, #4]
+	ldrh	r2, [r1, r3, lsl #1]
+	subs	r2, r2, r0
+	strh	r2, [r1, r3, lsl #1]	@ movhi
+	ldrh	r3, [fp]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+.L2080:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2081
 	mov	r0, r4
-	ldr	r1, [r2, #0]
-	mov	r2, r3
-	bl	memcpy
-	movs	r2, #4
-	ldr	r0, .L2033+16
-	mov	r1, r4
-	mov	r3, r2
-	bl	rknand_print_hex
-	movs	r0, #0
-	b	.L2027
-.L2026:
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L2025:
-	cmp	sl, r5
-	ble	.L2031
-	mov	r0, #-1
-	b	.L2027
-.L2032:
+	bl	allocate_new_data_superblock
+.L2081:
+	ldr	r2, .L2096+4
+	ldr	r3, [r2, #96]
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	FtlGcMarkBadPhyBlk
 	mov	r0, r4
-.L2027:
-	add	sp, sp, #48
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2034:
+	bl	get_new_active_ppa
+	mov	r2, r6
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
+	movs	r1, #1
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	FlashProgPages
+.L2089:
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2082
+	ldr	r3, .L2096+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2083
+	ldr	r1, .L2096+12
+	movw	r2, #1550
+	ldr	r0, .L2096+16
+	bl	printf
+	ldr	r1, .L2096+20
+	ldr	r0, .L2096+24
+	bl	printf
+.L2083:
+	ldr	r3, [r5, #4]
+	cbnz	r6, .L2084
+.L2095:
+	movs	r2, #1
+	add	r1, sp, #12
+	ldr	r0, [r5, #16]
+	str	r3, [sp, #12]
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r3, [r3, #12]
+	ubfx	r0, r3, #10, #16
+	str	r3, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, [sp, #4]
+	mov	fp, r0
+	adds	r3, r3, #1
+	beq	.L2086
+	ldr	r3, [r10]
+	ldrh	r2, [r3, r0, lsl #1]
+	cbnz	r2, .L2087
+	mov	r1, r0
+	ldr	r0, .L2096+28
+	bl	printf
+.L2087:
+	mov	r0, fp
+	bl	decrement_vpc_count
+.L2086:
+	adds	r7, r7, #1
+	adds	r5, r5, #36
+	b	.L2079
+.L2084:
+	orr	r3, r3, #-2147483648
+	b	.L2095
+.L2088:
+	ldr	r3, .L2096+8
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2077
+	ldr	r1, .L2096+12
+	movw	r2, #1567
+	ldr	r0, .L2096+16
+	bl	printf
+	ldr	r1, .L2096+20
+	ldr	r0, .L2096+24
+	bl	printf
+.L2077:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2097:
 	.align	2
-.L2033:
-	.word	.LANCHOR28
-	.word	.LANCHOR146
-	.word	.LANCHOR241
-	.word	.LANCHOR148
-	.word	.LC50
-	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
-	.section	.text.FlashGetBadBlockList,"ax",%progbits
+.L2096:
+	.word	.LANCHOR8
+	.word	.LANCHOR136
+	.word	.LANCHOR36
+	.word	.LANCHOR220
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC38
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
-	.global	FlashGetBadBlockList
+	.global	FtlCacheWriteBack
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashGetBadBlockList, %function
-FlashGetBadBlockList:
+	.fpu softvfp
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldr	r3, .L2042
-	ldr	r6, .L2042+4
-	ldr	r3, [r3, #0]
-	ldr	r0, [r6, #0]
-	ldrb	r2, [r3, #13]	@ zero_extendqisi2
-	ldrh	r4, [r3, #14]
-	muls	r4, r2, r4
-	uxth	r4, r4
-	adds	r2, r4, #7
-	lsrs	r2, r2, #3
-	bl	FlashReadFacBbtData
-	adds	r0, r0, #1
-	beq	.L2041
+	push	{r4, lr}
+	ldr	r4, .L2103
+	ldr	r0, [r4]
+	cbz	r0, .L2099
+	ldr	r3, .L2103+4
 	movs	r2, #0
-	lsrs	r0, r4, #4
-	ldr	r6, [r6, #0]
-	mov	r3, r2
-	subs	r4, r4, #1
 	movs	r1, #1
-	b	.L2037
-.L2039:
-	lsrs	r7, r2, #5
-	and	ip, r2, #31
-	lsl	ip, r1, ip
-	ldr	r7, [r6, r7, lsl #2]
-	tst	ip, r7
-	beq	.L2038
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L2038:
-	cmp	r3, r0
-	bcs	.L2041
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L2037:
-	cmp	r2, r4
-	blt	.L2039
-	b	.L2036
-.L2041:
+	ldr	r3, [r3]
+	bl	FtlProgPages
 	movs	r3, #0
-.L2036:
-	movw	r2, #65535
+	str	r3, [r4]
+.L2099:
 	movs	r0, #0
-	strh	r2, [r5, r3, lsl #1]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L2043:
+	pop	{r4, pc}
+.L2104:
 	.align	2
-.L2042:
-	.word	.LANCHOR23
-	.word	.LANCHOR143
-	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
-	.section	.text.FtlMakeBbt,"ax",%progbits
+.L2103:
+	.word	.LANCHOR129
+	.word	.LANCHOR221
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
-	.global	FtlMakeBbt
+	.global	ftl_discard
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlMakeBbt, %function
-FtlMakeBbt:
+	.fpu softvfp
+	.type	ftl_discard, %function
+ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2063
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r4, [r3, #0]
-	cmp	r4, #0
-	bne	.L2045
-	ldr	r5, .L2063+4
-	bl	FtlBbtMemInit
-	ldr	r6, .L2063+8
-	bl	FtlLoadFactoryBbt
-	add	r2, r5, #12
-	str	r2, [sp, #4]
-	b	.L2046
-.L2052:
-	ldr	r3, .L2063+12
-	ldr	r2, [sp, #4]
-	ldr	r8, .L2063+24
-	ldr	r0, [r3, #0]
-	ldr	r3, .L2063+16
-	str	r0, [r8, #8]
-	ldr	sl, [r3, #0]
-	ldrh	r3, [r2], #2
-	str	sl, [r8, #12]
-	str	r2, [sp, #4]
-	movw	r2, #65535
-	cmp	r3, r2
-	beq	.L2047
-	ldrh	r7, [r6, #0]
-	movs	r1, #1
-	mov	r2, r1
-	mov	r0, r8
-	mla	r7, r7, r4, r3
-	lsls	r3, r7, #10
-	str	r3, [r8, #4]
-	bl	FlashReadPages
-	ldrh	r2, [r6, #0]
-	ldr	r0, [r5, #28]
-	adds	r2, r2, #7
-	ldr	r1, [r8, #8]
-	lsrs	r2, r2, #3
-	bl	memcpy
-	b	.L2048
-.L2047:
+	ldr	r3, .L2120
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r5, r2
+	adds	r2, r1, r2
+	mov	r6, r1
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2113
+	cmp	r5, #31
+	bhi	.L2107
+.L2112:
+	movs	r0, #0
+.L2105:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, pc}
+.L2107:
+	ldr	r8, .L2120+12
+	bl	FtlCacheWriteBack
+	mov	r0, r6
+	ldrh	r4, [r8]
 	mov	r1, r4
-	bl	FlashGetBadBlockList
-	ldr	r1, [r5, #28]
-	ldr	r0, [r8, #8]
-	bl	FtlBbt2Bitmap
-	ldrh	fp, [r6, #0]
-	mov	r3, r5
-	mov	r5, r4
-	add	fp, fp, #-1
-	mov	r4, sl
-	mov	sl, r3
-	uxth	fp, fp
-	b	.L2061
-.L2050:
-	add	fp, fp, #-1
-	uxth	fp, fp
-.L2061:
-	ldrh	r0, [r6, #0]
-	mla	r0, r5, r0, fp
-	uxth	r0, r0
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L2050
-	ldr	r3, [sp, #4]
-	movs	r1, #0
-	ldr	r2, .L2063+16
-	strh	fp, [r3, #-2]	@ movhi
-	ldr	r0, [r2, #0]
-	movs	r2, #16
-	bl	memset
-	ldr	r2, [sp, #4]
-	movw	r3, 61664	@ movhi
-	ldrh	r7, [r6, #0]
-	strh	r3, [r4, #0]	@ movhi
-	movs	r3, #0
-	str	r3, [r4, #4]
-	ldrh	r3, [r2, #-2]
-	ldr	r0, [r8, #8]
-	mla	r7, r7, r5, r3
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r1, [sl, #28]
-	lsls	r3, r7, #10
-	str	r3, [r8, #4]
-	ldr	r3, .L2063+20
-	ldrh	r2, [r3, #0]
-	lsls	r2, r2, #2
-	bl	memcpy
-	movs	r1, #1
-	mov	r2, r1
-	ldr	r0, .L2063+24
-	bl	FlashEraseBlocks
-	movs	r1, #1
-	mov	r3, r1
-	ldr	r0, .L2063+24
-	mov	r2, r1
-	bl	FlashProgPages
-	ldr	r3, [r8, #0]
-	adds	r3, r3, #1
-	bne	.L2062
-	uxth	r0, r7
-	bl	FtlBbmMapBadBlock
-	b	.L2061
-.L2062:
-	mov	r4, r5
-	mov	r5, sl
-.L2048:
-	uxth	r0, r7
-	adds	r4, r4, #1
-	bl	FtlBbmMapBadBlock
-	adds	r5, r5, #4
-.L2046:
-	ldr	r2, .L2063+28
-	ldrh	r3, [r2, #0]
-	cmp	r4, r3
-	bcc	.L2052
-	movs	r4, #0
-	ldr	r5, .L2063+32
-	b	.L2053
-.L2054:
-	mov	r0, r4
-	adds	r4, r4, #1
-	bl	FtlBbmMapBadBlock
-	uxth	r4, r4
-.L2053:
-	ldrh	r3, [r5, #0]
-	cmp	r3, r4
-	bhi	.L2054
-	ldr	r5, .L2063+4
-	movw	r6, #65535
-	ldrh	r4, [r5, #12]
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L2055
-.L2060:
-	mov	r0, r4
-	bl	FtlBbmIsBadBlock
-	cmp	r0, #1
-	beq	.L2056
-	mov	r0, r4
-	bl	FlashTestBlk
-	cbz	r0, .L2057
-	mov	r0, r4
-	bl	FtlBbmMapBadBlock
-	b	.L2056
-.L2057:
-	ldrh	r3, [r5, #0]
-	cmp	r3, r6
-	bne	.L2058
-	strh	r4, [r5, #0]	@ movhi
-	b	.L2056
-.L2058:
-	ldr	r3, .L2063+4
-	strh	r4, [r3, #4]	@ movhi
-	b	.L2059
-.L2056:
-	subs	r4, r4, #1
+	bl	__aeabi_uidiv
+	smulbb	r3, r0, r4
+	mov	r7, r0
+	subs	r6, r6, r3
+	uxth	r6, r6
+	cbz	r6, .L2108
+	subs	r4, r4, r6
+	adds	r7, r7, #1
+	cmp	r4, r5
+	it	cs
+	movcs	r4, r5
 	uxth	r4, r4
-.L2055:
-	ldrh	r3, [r5, #12]
-	subs	r3, r3, #47
-	cmp	r3, r4
-	ble	.L2060
-.L2059:
-	ldr	r4, .L2063+4
-	movs	r5, #0
-	ldr	r3, .L2063+36
-	movs	r2, #2
-	movs	r1, #1
-	str	r5, [r4, #8]
-	ldr	r0, [r3, #0]
-	ldrh	r3, [r4, #0]
-	strh	r5, [r4, #2]	@ movhi
-	lsls	r3, r3, #10
-	str	r3, [r0, #4]
-	ldrh	r3, [r4, #4]
-	lsls	r3, r3, #10
-	str	r3, [r0, #40]
-	bl	FlashEraseBlocks
-	ldrh	r0, [r4, #0]
-	bl	FtlBbmMapBadBlock
-	ldrh	r0, [r4, #4]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	ldr	r3, [r4, #8]
-	ldrh	r2, [r4, #4]
+	subs	r5, r5, r4
+.L2108:
+	ldr	r4, .L2120+4
+	mov	r3, #-1
+	ldr	r6, .L2120+8
+	str	r3, [sp, #4]
+.L2109:
+	ldrh	r3, [r8]
+	cmp	r5, r3
+	bcs	.L2111
+	ldr	r3, .L2120+4
+	ldr	r2, [r3]
+	cmp	r2, #32
+	bls	.L2112
+	movs	r4, #0
+	str	r4, [r3]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L2112
+.L2111:
+	movs	r2, #0
+	mov	r1, sp
+	mov	r0, r7
+	bl	log2phys
+	ldr	r3, [sp]
 	adds	r3, r3, #1
-	str	r3, [r4, #8]
-	ldrh	r3, [r4, #0]
-	strh	r5, [r4, #2]	@ movhi
-	strh	r2, [r4, #0]	@ movhi
-	strh	r3, [r4, #4]	@ movhi
-	bl	FtlBbmTblFlush
-.L2045:
-	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L2064:
+	beq	.L2110
+	ldr	r3, [r4]
+	movs	r2, #1
+	add	r1, sp, #4
+	mov	r0, r7
+	adds	r3, r3, #1
+	str	r3, [r4]
+	ldr	r3, [r6]
+	adds	r3, r3, #1
+	str	r3, [r6]
+	bl	log2phys
+	ldr	r0, [sp]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L2110:
+	ldrh	r3, [r8]
+	adds	r7, r7, #1
+	subs	r5, r5, r3
+	b	.L2109
+.L2113:
+	mov	r0, #-1
+	b	.L2105
+.L2121:
 	.align	2
-.L2063:
-	.word	.LANCHOR82
-	.word	.LANCHOR78
+.L2120:
+	.word	.LANCHOR67
+	.word	.LANCHOR222
+	.word	.LANCHOR161
 	.word	.LANCHOR54
-	.word	.LANCHOR86
-	.word	.LANCHOR184
-	.word	.LANCHOR79
-	.word	.LANCHOR198
-	.word	.LANCHOR48
-	.word	.LANCHOR63
-	.word	.LANCHOR83
-	.size	FtlMakeBbt, .-FtlMakeBbt
-	.section	.text.FtlLowFormat,"ax",%progbits
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlSysFlush,"ax",%progbits
 	.align	1
-	.global	FtlLowFormat
+	.global	FtlSysFlush
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FtlLowFormat, %function
-FtlLowFormat:
+	.fpu softvfp
+	.type	FtlSysFlush, %function
+FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2086
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	bne	.L2066
-	ldr	r2, .L2086+4
-	str	r3, [r2, #0]
-	ldr	r2, .L2086+8
-	str	r3, [r2, #0]
-	ldr	r3, .L2086+12
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbz	r0, .L2067
-	bl	FtlMakeBbt
-.L2067:
-	ldr	r3, .L2086+16
-	ldr	r2, .L2086+20
-	ldrh	r4, [r3, #0]
-	ldr	r3, .L2086+24
-	lsls	r4, r4, #7
-	ldr	r0, [r3, #0]
-	ldr	r3, .L2086+28
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	b	.L2068
-.L2069:
-	mvns	r5, r3
-	orr	r5, r3, r5, lsl #16
-	str	r5, [r0, r3, lsl #2]
-	str	r2, [r1, r3, lsl #2]
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L2068:
-	cmp	r3, r4
-	blt	.L2069
-	ldr	r3, .L2086+32
-	movs	r4, #0
-	ldr	r6, .L2086+36
-	ldrh	r5, [r3, #0]
-	b	.L2070
-.L2071:
-	mov	r0, r5
-	movs	r1, #1
-	bl	FtlLowFormatEraseBlock
-	adds	r5, r5, #1
-	uxth	r5, r5
-	adds	r4, r4, r0
-	uxth	r4, r4
-.L2070:
-	ldrh	r3, [r6, #0]
-	cmp	r3, r5
-	bhi	.L2071
-	ldr	r3, .L2086+40
-	ldrh	r1, [r3, #0]
-	subs	r3, r4, #2
-	cmp	r3, r1, lsl #1
-	bgt	.L2072
-.L2076:
-	movs	r4, #0
-	ldr	r6, .L2086+32
-	mov	r5, r4
-	b	.L2073
-.L2072:
-	mov	r0, r4
-	ldr	r5, .L2086+36
-	bl	__aeabi_uidiv
-	ldr	r3, .L2086+44
-	ldr	r3, [r3, #0]
-	adds	r0, r0, r3
-	uxth	r0, r0
-	bl	FtlSysBlkNumInit
-	ldr	r3, .L2086+12
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	ldr	r3, .L2086+32
-	ldrh	r4, [r3, #0]
-	b	.L2074
-.L2075:
-	mov	r0, r4
-	movs	r1, #1
-	bl	FtlLowFormatEraseBlock
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L2074:
-	ldrh	r3, [r5, #0]
-	cmp	r3, r4
-	bhi	.L2075
-	b	.L2076
-.L2077:
-	mov	r0, r5
-	movs	r1, #0
-	bl	FtlLowFormatEraseBlock
-	adds	r5, r5, #1
-	uxth	r5, r5
-	adds	r4, r4, r0
-	uxth	r4, r4
-.L2073:
-	ldrh	r3, [r6, #0]
-	cmp	r3, r5
-	bhi	.L2077
-	ldr	r3, .L2086+36
-	ldr	r8, .L2086+68
-	ldr	sl, .L2086+72
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L2086+48
-	str	r2, [r3, #0]
-	ldr	r3, .L2086+52
-	ldr	fp, [r3, #0]
-	ldr	r3, .L2086+40
-	mov	r0, fp
-	ldrh	r5, [r3, #0]
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ubfx	r7, r0, #5, #16
-	mov	r6, r0
-	add	r3, r7, #36
-	strh	r3, [r8, #0]	@ movhi
-	movs	r3, #24
-	muls	r3, r5, r3
-	cmp	r4, r3
-	str	r0, [sl, #0]
-	ble	.L2078
-	rsb	r0, r4, fp
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	str	r0, [sl, #0]
-	lsrs	r0, r0, #5
-	adds	r0, r0, #24
-	strh	r0, [r8, #0]	@ movhi
-.L2078:
-	ldr	r3, .L2086+56
-	ldr	r3, [r3, #0]
-	cmp	r3, #1
-	bne	.L2079
-	mov	r0, r4
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r8, .L2086+68
-	ldrh	sl, [r8, #0]
-	uxtah	r0, sl, r0
-	add	sl, sl, r0, lsr #2
-	strh	sl, [r8, #0]	@ movhi
-.L2079:
-	ldr	r3, .L2086+60
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2080
-	mov	r0, r4
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r8, .L2086+68
-	ldrh	sl, [r8, #0]
-	uxtah	r0, sl, r0
-	add	sl, sl, r0, lsr #2
-	strh	sl, [r8, #0]	@ movhi
-.L2080:
-	ldr	r3, .L2086+64
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L2081
-	ldr	r2, .L2086+68
-	ldrh	r1, [r2, #0]
-	add	r1, r1, r3, lsr #1
-	strh	r1, [r2, #0]	@ movhi
-	mul	r1, r5, r3
-	cmp	r1, r4
-	ble	.L2081
-	ldr	r1, .L2086+72
-	adds	r3, r3, #32
-	adds	r7, r7, r3
-	strh	r7, [r2, #0]	@ movhi
-	str	r6, [r1, #0]
-.L2081:
-	ldr	r3, .L2086+72
-	ldr	r2, .L2086+68
-	ldr	r6, .L2086+76
-	ldr	r1, [r3, #0]
-	ldrh	r2, [r2, #0]
-	ldr	r4, .L2086+80
-	subs	r2, r1, r2
-	muls	r5, r2, r5
-	ldr	r2, .L2086+84
-	str	r5, [r2, #0]
-	ldr	r2, .L2086+88
-	ldrh	r2, [r2, #0]
-	muls	r5, r2, r5
-	str	r5, [r3, #0]
-	ldr	r3, .L2086+16
-	ldrh	r3, [r3, #0]
-	muls	r5, r3, r5
-	ldr	r3, .L2086+92
-	str	r5, [r3, #0]
-	movw	r5, #65535
-	bl	FtlBbmTblFlush
-	ldr	r3, .L2086+36
-	movs	r1, #0
-	ldr	r0, [r6, #0]
-	ldrh	r2, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	ldr	r2, .L2086+96
-	movs	r3, #0
-	strh	r3, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-	movs	r1, #255
-	str	r3, [r2, #0]
-	ldr	r2, .L2086+100
-	strh	r3, [r4, #0]	@ movhi
-	strh	r3, [r2, #2]	@ movhi
-	strb	r3, [r2, #6]
-	strb	r3, [r2, #8]
-	movs	r3, #1
-	strb	r3, [r4, #8]
-	ldr	r3, .L2086+32
-	strh	r5, [r2, #0]	@ movhi
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L2086+104
-	lsrs	r2, r2, #3
-	ldr	r0, [r3, #0]
-	bl	memset
-.L2082:
-	ldr	r7, .L2086+80
-	mov	r0, r7
-	bl	make_superblock
-	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r3, .L2086+76
-	cbnz	r2, .L2083
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r6, #0]
-	strh	r5, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4, #0]
-	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
-	b	.L2082
-.L2083:
-	ldr	r2, .L2086+4
-	movw	r6, #65535
-	ldr	r4, .L2086+108
-	ldrh	r0, [r7, #4]
-	ldr	r1, [r2, #0]
-	str	r1, [r7, #12]
-	adds	r1, r1, #1
-	str	r1, [r2, #0]
-	ldrh	r1, [r7, #0]
-	ldr	r2, [r3, #0]
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	movs	r2, #0
-	strh	r2, [r4, #2]	@ movhi
-	strb	r2, [r4, #6]
-	ldrh	r2, [r7, #0]
-	mov	r7, r3
-	adds	r2, r2, #1
-	strh	r2, [r4, #0]	@ movhi
-	movs	r2, #1
-	strb	r2, [r4, #8]
-.L2084:
-	ldr	r5, .L2086+108
-	mov	r0, r5
-	bl	make_superblock
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2085
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r7, #0]
-	strh	r6, [r3, r2, lsl #1]	@ movhi
-	ldrh	r3, [r4, #0]
-	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
-	b	.L2084
-.L2087:
-	.align	2
-.L2086:
-	.word	.LANCHOR82
-	.word	.LANCHOR156
-	.word	.LANCHOR157
-	.word	.LANCHOR42
-	.word	.LANCHOR59
-	.word	168778952
-	.word	.LANCHOR182
-	.word	.LANCHOR183
-	.word	.LANCHOR43
-	.word	.LANCHOR44
-	.word	.LANCHOR41
-	.word	.LANCHOR69
-	.word	.LANCHOR77
-	.word	.LANCHOR45
-	.word	.LANCHOR116
-	.word	.LANCHOR7
-	.word	.LANCHOR52
-	.word	.LANCHOR201
-	.word	.LANCHOR76
-	.word	.LANCHOR89
-	.word	.LANCHOR97
-	.word	.LANCHOR200
-	.word	.LANCHOR56
-	.word	.LANCHOR72
-	.word	.LANCHOR106
-	.word	.LANCHOR202
-	.word	.LANCHOR107
-	.word	.LANCHOR98
-.L2085:
-	ldr	r4, .L2088
-	ldrh	r1, [r5, #4]
-	ldrh	r2, [r5, #0]
-	ldr	r3, [r4, #0]
-	str	r3, [r5, #12]
-	adds	r3, r3, #1
-	str	r3, [r4, #0]
-	movw	r5, #65535
-	ldr	r3, .L2088+4
-	ldr	r3, [r3, #0]
-	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2088+8
-	strh	r5, [r3, #0]	@ movhi
-	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2088+12
-	movs	r2, #0
-	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, .L2088+16
-	strh	r5, [r3, #4]	@ movhi
-	ldr	r2, [r2, #0]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, [r4, #0]
-	str	r2, [r3, #8]
-	adds	r2, r2, #1
-	str	r2, [r4, #0]
-	strh	r0, [r3, #0]	@ movhi
+	push	{r3, lr}
+	ldr	r3, .L2124
+	ldr	r3, [r3]
+	cbnz	r3, .L2123
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-	bl	FtlSysBlkInit
-	cbnz	r0, .L2066
-	ldr	r3, .L2088+20
-	movs	r2, #1
-	str	r2, [r3, #0]
-.L2066:
+.L2123:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2089:
+	pop	{r3, pc}
+.L2125:
 	.align	2
-.L2088:
-	.word	.LANCHOR156
-	.word	.LANCHOR89
-	.word	.LANCHOR99
-	.word	.LANCHOR196
-	.word	.LANCHOR200
-	.word	.LANCHOR225
-	.size	FtlLowFormat, .-FtlLowFormat
-	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
+.L2124:
+	.word	.LANCHOR75
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
-	.global	HynixGetReadRetryDefault
+	.global	FtlDeInit
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	HynixGetReadRetryDefault, %function
-HynixGetReadRetryDefault:
-	@ args = 0, pretend = 0, frame = 64
+	.fpu softvfp
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2179
-	movs	r2, #172
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	movs	r1, #174
-	strb	r0, [r3, #0]
-	strb	r2, [r3, #4]
-	movs	r0, #173
-	movs	r2, #175
-	cmp	r4, #2
-	sub	sp, sp, #64
-	strb	r0, [r3, #5]
-	strb	r1, [r3, #6]
-	strb	r2, [r3, #7]
-	bne	.L2091
-	movs	r2, #167
-	strb	r2, [r3, #4]
-	ldr	r3, .L2179+4
-	movs	r2, #247
-	strb	r2, [r3, #17]
-	b	.L2146
-.L2091:
-	cmp	r4, #3
-	bne	.L2093
-	movs	r2, #176
-	strb	r2, [r3, #4]
-	movs	r2, #177
-	strb	r2, [r3, #5]
-	movs	r2, #178
-	strb	r2, [r3, #6]
-	movs	r2, #179
-	strb	r2, [r3, #7]
-	movs	r2, #180
-	strb	r2, [r3, #8]
-	movs	r2, #181
-	strb	r2, [r3, #9]
-	movs	r2, #182
-	strb	r2, [r3, #10]
-	movs	r2, #183
-	b	.L2173
-.L2093:
-	cmp	r4, #4
-	bne	.L2094
-	movs	r5, #204
-	strb	r0, [r3, #9]
-	strb	r5, [r3, #4]
-	movs	r5, #191
-	strb	r1, [r3, #10]
-	strb	r5, [r3, #5]
-	movs	r5, #170
-	strb	r5, [r3, #6]
-	movs	r5, #171
-	strb	r5, [r3, #7]
-	movs	r5, #205
-	strb	r5, [r3, #8]
-.L2173:
-	movs	r6, #8
-	strb	r2, [r3, #11]
-	mov	r5, r6
-	b	.L2092
-.L2094:
-	cmp	r4, #5
-	bne	.L2095
-	movs	r2, #56
-	movs	r6, #8
-	strb	r2, [r3, #4]
-	movs	r2, #57
-	strb	r2, [r3, #5]
-	movs	r2, #58
-	strb	r2, [r3, #6]
-	movs	r2, #59
-	strb	r2, [r3, #7]
-	b	.L2172
-.L2095:
-	cmp	r4, #6
-	bne	.L2096
-	movs	r2, #14
-	movs	r6, #12
-	strb	r2, [r3, #4]
-	movs	r2, #15
-	strb	r2, [r3, #5]
-	movs	r2, #16
-	strb	r2, [r3, #6]
-	movs	r2, #17
-	strb	r2, [r3, #7]
-	b	.L2172
-.L2096:
-	cmp	r4, #7
-	bne	.L2146
-	movs	r2, #176
-	movs	r6, #12
-	strb	r2, [r3, #4]
-	movs	r5, #10
-	movs	r2, #177
-	strb	r2, [r3, #5]
-	movs	r2, #178
-	strb	r2, [r3, #6]
-	movs	r2, #179
-	strb	r2, [r3, #7]
-	movs	r2, #180
-	strb	r2, [r3, #8]
-	movs	r2, #181
-	strb	r2, [r3, #9]
-	movs	r2, #182
-	strb	r2, [r3, #10]
-	movs	r2, #183
-	strb	r2, [r3, #11]
-	movs	r2, #212
-	strb	r2, [r3, #12]
-	movs	r2, #213
-	strb	r2, [r3, #13]
-	b	.L2092
-.L2146:
-	movs	r6, #7
-.L2172:
-	movs	r5, #4
-.L2092:
-	subs	r3, r4, #1
+	push	{r3, lr}
+	ldr	r3, .L2128
+	ldr	r3, [r3]
 	cmp	r3, #1
-	bhi	.L2168
-	b	.L2177
-.L2103:
-	ldr	r3, .L2179+8
-	mov	sl, #0
-	ldr	r1, .L2179+12
-	ldr	r4, .L2179+16
-	ldrb	r2, [r3, r7]	@ zero_extendqisi2
-	ldr	r0, [r1, r2, lsl #3]
-	add	r4, r4, r2, lsl #6
-	add	r2, r1, r2, lsl #3
-	ldrb	r3, [r2, #4]	@ zero_extendqisi2
-	movs	r2, #55
-	adds	r3, r3, #8
-	add	r3, r0, r3, lsl #8
-.L2099:
-	add	r1, r8, sl
-	str	r2, [r3, #8]
-	movs	r0, #80
-	ldrb	r1, [r1, #4]	@ zero_extendqisi2
-	str	r1, [r3, #4]
+	bne	.L2127
+	bl	FtlSysFlush
+.L2127:
+	movs	r0, #0
+	pop	{r3, pc}
+.L2129:
+	.align	2
+.L2128:
+	.word	.LANCHOR223
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FlashDeInit
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	FlashDeInit
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartRead
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2141
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r2
+	adds	r2, r0, r1
+	sub	sp, sp, #56
+	mov	r7, r0
+	mov	r6, r1
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2140
+	ldr	r3, .L2141+4
+	mov	r8, #0
+	ldr	fp, .L2141+28
+	ldrh	r5, [r3]
+	lsr	r5, r0, r5
+	lsls	r3, r5, #2
+	str	r3, [sp]
+.L2133:
+	cbnz	r6, .L2139
+.L2131:
+	mov	r0, r8
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2139:
+	ldr	r3, .L2141+8
+	mov	r0, r7
+	ldr	r2, [sp]
+	ldr	r3, [r3]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L2141+12
+	str	r3, [sp, #8]
+	ldrh	r4, [r2]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+	subs	r4, r4, r1
+	ldr	r3, [sp, #8]
+	uxth	r4, r4
+	str	r1, [sp, #4]
+	cmp	r6, r4
+	it	cc
+	uxthcc	r4, r6
+	lsls	r2, r4, #9
 	str	r2, [sp, #8]
+	cmp	r3, #0
+	beq	.L2135
+	ldr	r2, [fp]
+	add	r0, sp, #20
+	str	r3, [sp, #24]
 	str	r3, [sp, #12]
-	bl	udelay
+	str	r2, [sp, #28]
+	movs	r2, #0
+	str	r2, [sp, #32]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [sp, #20]
 	ldr	r3, [sp, #12]
-	ldr	r1, [r3, #0]
-	strb	r1, [r4, sl]
-	add	sl, sl, #1
-	ldr	r2, [sp, #8]
-	uxtb	r1, sl
-	cmp	r1, r5
-	bcc	.L2099
-	movs	r3, #0
-	b	.L2100
-.L2101:
-	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
-	ldrb	r0, [r4, r3]	@ zero_extendqisi2
-	add	r0, ip, r0
-	strb	r0, [r1, r2, lsl #3]
 	adds	r2, r2, #1
-	cmp	r2, #7
-	bne	.L2101
-	adds	r3, r3, #1
-	cmp	r3, #4
-	beq	.L2102
-.L2100:
-	movs	r2, #1
-	adds	r1, r4, r3
-	add	sl, fp, r3
-	b	.L2101
-.L2102:
-	adds	r7, r7, #1
-	movs	r3, #0
-	strb	r3, [r4, #16]
-	strb	r3, [r4, #24]
-	uxtb	r7, r7
-	strb	r3, [r4, #32]
-	strb	r3, [r4, #40]
-	strb	r3, [r4, #48]
-	strb	r3, [r4, #41]
-	strb	r3, [r4, #49]
-	b	.L2097
-.L2177:
-	ldr	r8, .L2179
-	movs	r7, #0
-	ldr	fp, .L2179+4
-.L2097:
-	ldr	r3, .L2179+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, r7
-	bhi	.L2103
-	b	.L2104
-.L2168:
-	subs	r3, r4, #3
-	cmp	r3, #4
-	bhi	.L2104
-	smulbb	r3, r5, r6
-	str	r6, [sp, #48]
-	asrs	r2, r3, #2
-	lsls	r3, r3, #4
-	str	r3, [sp, #52]
-	movs	r3, #0
-	str	r3, [sp, #20]
-	subs	r3, r5, #1
-	str	r2, [sp, #24]
-	uxtb	r3, r3
-	str	r3, [sp, #56]
-	b	.L2105
-.L2145:
-	ldr	r3, .L2179+8
-	ldr	fp, [sp, #20]
-	ldrb	r6, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2179+12
-	mov	r0, r6
-	ldr	sl, [r3, r6, lsl #3]
-	add	r3, r3, r6, lsl #3
-	ldrb	r8, [r3, #4]	@ zero_extendqisi2
-	movs	r3, #255
-	add	r8, r8, #8
-	lsl	r8, r8, #8
-	add	r7, sl, r8
-	str	r3, [r7, #8]
-	bl	NandcWaitFlashReady
-	cmp	r4, #7
-	sxth	r3, r6
-	beq	.L2106
-	ldr	r1, .L2179+16
-	add	r3, r1, r3, lsl #6
-	b	.L2174
-.L2106:
-	lsls	r1, r3, #7
-	add	r3, r1, r3, lsl #5
-	ldr	r1, .L2179+24
-	adds	r3, r1, r3
-.L2174:
-	str	r3, [sp, #32]
-	movs	r3, #54
-	cmp	r4, #4
-	str	r3, [r7, #8]
-	bne	.L2108
-	movs	r3, #255
-	str	r3, [r7, #4]
-	movs	r3, #64
-	str	r3, [sl, r8]
-	movs	r3, #204
-	b	.L2175
-.L2108:
-	subs	r3, r4, #5
-	cmp	r3, #1
-	bhi	.L2110
-	ldr	r3, .L2179
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r7, #4]
-	movs	r3, #82
-	b	.L2176
-.L2110:
-	movs	r3, #174
-	str	r3, [r7, #4]
-	movs	r3, #0
-	str	r3, [sl, r8]
-	movs	r3, #176
-.L2175:
-	str	r3, [r7, #4]
-	movs	r3, #77
-.L2176:
-	str	r3, [sl, r8]
-	movs	r3, #22
-	str	r3, [r7, #8]
-	movs	r3, #23
-	str	r3, [r7, #8]
-	movs	r3, #4
-	str	r3, [r7, #8]
-	movs	r3, #25
-	str	r3, [r7, #8]
-	movs	r3, #0
-	cmp	r4, #6
-	str	r3, [r7, #8]
-	mov	r0, r6
-	str	r3, [r7, #4]
-	str	r3, [r7, #4]
+	ldr	r2, .L2141+16
 	it	eq
-	moveq	r3, #31
-	str	r3, [r7, #4]
-	movs	r3, #2
-	str	r3, [r7, #4]
-	movs	r3, #0
-	str	r3, [r7, #4]
-	movs	r3, #48
-	str	r3, [r7, #8]
-	bl	NandcWaitFlashReady
-	sub	ip, r4, #5
-	mov	r1, ip
-	str	ip, [sp, #36]
-	cmp	r1, #1
-	bls	.L2148
-	cmp	r4, #7
-	ite	eq
-	moveq	r1, #32
-	movne	r1, #2
-	b	.L2114
-.L2148:
-	movs	r1, #16
-.L2114:
-	ldr	r3, .L2179+28
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-.L2115:
-	ldr	r0, [r7, #0]
-	strb	r0, [r2, r3]
-	adds	r3, r3, #1
-	uxtb	r0, r3
-	cmp	r0, r1
-	bcc	.L2115
-	cmp	r4, #7
-	bne	.L2116
-	movs	r3, #0
-.L2118:
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	cmp	r1, #12
-	beq	.L2117
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	cmp	r1, #10
-	beq	.L2117
-	adds	r3, r3, #1
-	adds	r2, r2, #4
-	uxtb	r3, r3
-	cmp	r3, #8
-	bne	.L2118
-	b	.L2119
-.L2117:
-	cmp	r3, #6
-	bls	.L2120
-.L2119:
-	ldr	r0, .L2179+32
-	movs	r1, #0
+	moveq	r8, #-1
+	ldr	r2, [r2]
+	cmp	r2, #256
+	bne	.L2137
+	mov	r2, r3
+	mov	r1, r5
+	ldr	r0, .L2141+20
 	bl	printf
-.L2121:
-	b	.L2121
-.L2116:
-	cmp	r4, #6
-	bne	.L2120
-	movs	r3, #0
-.L2122:
-	ldrb	r1, [r2], #1	@ zero_extendqisi2
-	cmp	r1, #12
-	beq	.L2120
-	ldrb	r1, [r2, #7]	@ zero_extendqisi2
-	cmp	r1, #4
-	beq	.L2120
-	adds	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #8
-	bne	.L2122
-	b	.L2178
-.L2124:
-	b	.L2124
-.L2180:
-	.align	2
-.L2179:
-	.word	.LANCHOR31
-	.word	.LANCHOR242
-	.word	.LANCHOR19
-	.word	.LANCHOR5
-	.word	.LANCHOR31+20
-	.word	.LANCHOR16
-	.word	.LANCHOR31+28
-	.word	.LANCHOR146
-	.word	.LC51
-.L2120:
-	ldr	r0, .L2181
-	movs	r3, #0
-	ldr	r0, [r0, #0]
-	str	r0, [sp, #40]
-.L2125:
-	ldr	r2, [r7, #0]
-	ldr	r1, [sp, #40]
-	strb	r2, [r1, r3]
-	adds	r3, r3, #1
-	ldr	r2, [sp, #52]
-	cmp	r3, r2
-	blt	.L2125
-	ldr	r3, .L2181
-	movs	r2, #8
-	ldr	ip, [sp, #24]
-	ldr	r1, [r3, #0]
-	lsl	r0, ip, #2
-	lsl	fp, ip, #3
-	str	r0, [sp, #44]
-	adds	r0, r1, r0
-.L2127:
-	movs	r3, #0
-	mov	lr, r3
-.L2126:
-	ldr	ip, [r0, r3]
-	add	lr, lr, #1
-	mvn	ip, ip
-	str	ip, [r0, r3]
-	ldr	ip, [sp, #24]
+	ldr	r2, [fp]
+	mov	r1, r5
+	ldr	r0, .L2141+24
+	bl	FtlMapWritePage
+.L2137:
+	ldr	r1, [fp]
+	lsls	r2, r4, #9
+	ldr	r3, [sp, #4]
+	mov	r0, r10
+	add	r1, r1, r3, lsl #9
+	bl	ftl_memcpy
+.L2138:
+	ldr	r3, [sp, #8]
+	adds	r5, r5, #1
+	subs	r6, r6, r4
+	add	r7, r7, r4
+	add	r10, r10, r3
+	ldr	r3, [sp]
 	adds	r3, r3, #4
-	cmp	lr, ip
-	blt	.L2126
-	subs	r2, r2, #1
-	add	r0, r0, fp
-	bne	.L2127
-	mov	lr, r1
-	str	r2, [sp, #16]
-	str	r5, [sp, #60]
-	b	.L2128
-.L2132:
-	movs	r0, #1
-	mov	fp, #16
-	str	r3, [sp, #4]
-	lsl	r5, r0, r3
-	movs	r0, #0
-	mov	ip, r0
-	str	fp, [sp, #28]
-.L2130:
-	ldr	fp, [lr, r0]
-	ldr	r3, [sp, #44]
-	and	fp, r5, fp
-	adds	r0, r0, r3
-	ldr	r3, [sp, #28]
-	cmp	fp, r5
-	it	eq
-	addeq	ip, ip, #1
-	subs	r3, r3, #1
-	str	r3, [sp, #28]
-	bne	.L2130
-	ldr	r3, [sp, #4]
-	cmp	ip, #8
-	it	hi
-	orrhi	r2, r2, r5
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L2132
-	ldr	fp, [sp, #16]
-	ldr	ip, [sp, #24]
-	add	fp, fp, #1
-	str	r2, [lr], #4
-	cmp	fp, ip
-	str	fp, [sp, #16]
-	bge	.L2150
-.L2128:
-	movs	r2, #0
-	mov	r3, r2
-	b	.L2132
-.L2150:
-	movs	r3, #0
-	ldr	r5, [sp, #60]
-	mov	r2, r3
-.L2133:
-	ldr	r0, [r1, r3]
-	cbnz	r0, .L2134
-	adds	r2, r2, #1
-.L2134:
-	adds	r3, r3, #4
-	cmp	r3, #32
-	bne	.L2133
-	cmp	r2, #7
-	ble	.L2135
-	ldr	r0, .L2181+4
-	movs	r2, #1
-	mov	r3, #1024
-	bl	rknand_print_hex
-	ldr	r0, .L2181+8
-	movs	r1, #0
-	bl	printf
-.L2136:
-	b	.L2136
+	str	r3, [sp]
+	b	.L2133
 .L2135:
-	cmp	r4, #6
-	beq	.L2151
-	cmp	r4, #7
-	ite	eq
-	moveq	r0, #10
-	movne	r0, #8
-	str	r0, [sp, #16]
-	b	.L2137
-.L2151:
-	movs	r1, #4
-	str	r1, [sp, #16]
-.L2137:
-	cbz	r5, .L2138
-	ldr	r2, [sp, #56]
-	add	lr, r2, #1
-	b	.L2139
-.L2138:
-	mov	lr, #1
-.L2139:
-	ldr	r0, [sp, #40]
-	movs	r2, #0
-	ldr	r1, [sp, #32]
-	mov	fp, r4
-	b	.L2140
-.L2141:
-	ldrb	ip, [r4], #1	@ zero_extendqisi2
-	strb	ip, [r1, r3]
-	adds	r3, r3, #1
-	uxtb	ip, r3
-	cmp	ip, r5
-	bcc	.L2141
-	ldr	ip, [sp, #48]
-	adds	r2, r2, #1
-	ldr	r3, [sp, #16]
-	add	r0, r0, lr
-	cmp	r2, ip
-	add	r1, r1, r3
-	bge	.L2142
+	lsls	r2, r4, #9
+	mov	r1, r3
+	mov	r0, r10
+	bl	ftl_memset
+	b	.L2138
 .L2140:
-	mov	r4, r0
-	movs	r3, #0
-	b	.L2141
+	mov	r8, #-1
+	b	.L2131
 .L2142:
-	movs	r3, #255
-	mov	r0, r6
-	str	r3, [r7, #8]
-	mov	r4, fp
-	bl	NandcWaitFlashReady
-	ldr	r1, [sp, #36]
-	cmp	r1, #1
-	bhi	.L2143
-	movs	r3, #54
-	str	r3, [r7, #8]
-	ldr	r3, .L2181+12
-	mov	r1, #-1
-	ldr	r0, [sp, #20]
-	ldrb	r3, [r3, #4]	@ zero_extendqisi2
-	str	r3, [r7, #4]
-	movs	r3, #0
-	str	r3, [sl, r8]
-	movs	r3, #22
-	str	r3, [r7, #8]
-	bl	FlashReadCmd
-	b	.L2144
-.L2143:
-	movs	r3, #56
-	str	r3, [r7, #8]
-.L2144:
-	mov	r0, r6
-	bl	NandcWaitFlashReady
-	ldr	r2, [sp, #20]
-	adds	r3, r2, #1
-	uxtb	r3, r3
-	str	r3, [sp, #20]
-.L2105:
-	ldr	r0, .L2181+16
-	ldr	r2, [sp, #20]
-	ldrb	r3, [r0, #0]	@ zero_extendqisi2
-	cmp	r3, r2
-	bhi	.L2145
-	ldr	r6, [sp, #48]
-.L2104:
-	ldr	r3, .L2181+12
-	strb	r5, [r3, #1]
-	strb	r6, [r3, #2]
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2178:
-	movs	r1, #0
-	ldr	r0, .L2181+8
-	bl	printf
-	b	.L2124
-.L2182:
 	.align	2
-.L2181:
-	.word	.LANCHOR146
-	.word	.LC52
-	.word	.LC51
-	.word	.LANCHOR31
-	.word	.LANCHOR16
-	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
-	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
+.L2141:
+	.word	.LANCHOR48
+	.word	.LANCHOR55
+	.word	.LANCHOR191
+	.word	.LANCHOR54
+	.word	.LANCHOR199
+	.word	.LC39
+	.word	.LANCHOR215
+	.word	.LANCHOR182
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
 	.align	1
-	.global	FlashGetReadRetryDefault
+	.global	FtlLoadEctTbl
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashGetReadRetryDefault, %function
-FlashGetReadRetryDefault:
+	.fpu softvfp
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	mov	r3, r0
-	cmp	r0, #0
-	beq	.L2183
-	subs	r2, r0, #1
-	cmp	r2, #6
-	bhi	.L2185
-	b	HynixGetReadRetryDefault
-.L2185:
-	cmp	r0, #49
-	bne	.L2186
-	ldr	r0, .L2194
-	movs	r2, #64
-	ldr	r1, .L2194+4
-	strb	r3, [r0, #0]
-	movs	r3, #4
-	strb	r3, [r0, #1]
-	movs	r3, #15
-	strb	r3, [r0, #2]
-	adds	r0, r0, #4
-	b	.L2192
-.L2186:
-	cmp	r0, #33
-	beq	.L2187
-	cmp	r0, #65
-	beq	.L2187
-	cmp	r0, #66
-	bne	.L2188
-.L2187:
-	ldr	r0, .L2194
-	strb	r3, [r0, #0]
-	movs	r3, #4
-	b	.L2193
-.L2188:
-	cmp	r0, #34
-	beq	.L2189
-	cmp	r0, #67
-	bne	.L2190
-.L2189:
-	ldr	r0, .L2194
-	strb	r3, [r0, #0]
-	movs	r3, #5
-.L2193:
-	strb	r3, [r0, #1]
-	movs	r2, #45
-	movs	r3, #7
-	ldr	r1, .L2194+8
-	strb	r3, [r0, #2]
-	adds	r0, r0, #4
-	b	.L2192
-.L2190:
-	cmp	r0, #35
-	beq	.L2191
-	cmp	r0, #68
-	bne	.L2183
-.L2191:
-	ldr	r0, .L2194
-	movs	r2, #95
-	ldr	r1, .L2194+12
-	strb	r3, [r0, #0]
-	movs	r3, #5
-	strb	r3, [r0, #1]
-	movs	r3, #17
-	strb	r3, [r0, #2]
-	adds	r0, r0, #4
-.L2192:
-	b	memcpy
-.L2183:
-	bx	lr
-.L2195:
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L2145
+	ldr	r5, .L2145+4
+	ldr	r2, [r4]
+	ldrh	r1, [r5]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	ldr	r2, [r3]
+	ldr	r3, .L2145+8
+	cmp	r2, r3
+	beq	.L2144
+	ldr	r1, .L2145+12
+	ldr	r0, .L2145+16
+	bl	printf
+	ldrh	r2, [r5]
+	movs	r1, #0
+	ldr	r0, [r4]
+	lsls	r2, r2, #9
+	bl	ftl_memset
+.L2144:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2146:
 	.align	2
-.L2194:
-	.word	.LANCHOR31
-	.word	.LANCHOR15
-	.word	.LANCHOR10
-	.word	.LANCHOR12
-	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
-	.section	.text.FlashInit,"ax",%progbits
+.L2145:
+	.word	.LANCHOR188
+	.word	.LANCHOR187
+	.word	1112818501
+	.word	.LC40
+	.word	.LC6
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
 	.align	1
-	.global	FlashInit
+	.global	Ftl_load_ext_data
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	FlashInit, %function
-FlashInit:
-	@ args = 0, pretend = 0, frame = 8
+	.fpu softvfp
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	sub	sp, sp, #24
-	mov	r0, #32768
-	bl	ftl_malloc
-	ldr	r3, .L2242
-	movs	r5, #0
-	ldr	r8, .L2242+84
-	mov	r6, r5
-	str	r0, [r3, #0]
-	mov	r0, #32768
-	bl	ftl_malloc
-	ldr	r3, .L2242+4
-	str	r0, [r3, #0]
-	mov	r0, #4096
-	bl	ftl_malloc
-	ldr	r3, .L2242+8
-	str	r0, [r3, #0]
-	mov	r0, #32768
-	bl	ftl_malloc
-	ldr	r3, .L2242+12
-	str	r0, [r3, #0]
-	mov	r0, #4096
-	bl	ftl_malloc
-	ldr	r3, .L2242+16
-	ldr	r2, .L2242+20
-	str	r0, [r3, #0]
-	movs	r3, #50
-	strb	r3, [r2, #0]
-	mov	r0, r4
-	ldr	r2, .L2242+24
-	ldr	r4, .L2242+28
-	strb	r3, [r2, #0]
-	movs	r2, #128
-	ldr	r3, .L2242+32
-	mov	r7, r4
-	str	r5, [r3, #0]
-	ldr	r3, .L2242+36
-	str	r2, [r3, #0]
-	movs	r2, #60
-	ldr	r3, .L2242+40
-	strb	r5, [r3, #0]
-	ldr	r3, .L2242+44
-	str	r5, [r3, #0]
-	ldr	r3, .L2242+48
-	strb	r5, [r3, #0]
-	ldr	r3, .L2242+52
-	strb	r2, [r3, #0]
-	bl	NandcInit
-.L2201:
-	uxtb	r3, r6
-	str	r3, [sp, #16]
-	mov	r0, r3
-	bl	FlashReset
-	add	r2, r8, r5
-	ldr	r3, [sp, #16]
-	ldrb	sl, [r2, #4]	@ zero_extendqisi2
-	ldr	fp, [r5, r8]
-	mov	r0, r3
-	add	sl, sl, #8
-	lsl	sl, sl, #8
-	add	r2, fp, sl
-	str	r2, [sp, #20]
-	bl	NandcFlashCs
-	ldr	r2, [sp, #20]
-	movs	r1, #144
-	movs	r0, #200
-	str	r1, [r2, #8]
+	push	{r3, r4, r5, lr}
+	movs	r1, #1
+	ldr	r4, .L2151
+	movs	r0, #0
+	ldr	r5, .L2151+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4]
+	cmp	r3, r5
+	beq	.L2148
+	mov	r2, #512
 	movs	r1, #0
-	str	r1, [r2, #4]
-	bl	udelay
-	ldr	r2, [fp, sl]
-	strb	r2, [r5, r7]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #1]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #2]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #3]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #4]
-	ldr	r2, [fp, sl]
-	strb	r2, [r4, #5]
-	ldr	r3, [sp, #16]
-	mov	r0, r3
-	bl	NandcFlashDeCs
-	ldrb	r2, [r5, r7]	@ zero_extendqisi2
-	subs	r3, r2, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L2197
-	ldrb	r1, [r4, #2]	@ zero_extendqisi2
-	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2242+56
-	str	r1, [sp, #0]
-	ldrb	r1, [r4, #3]	@ zero_extendqisi2
-	str	r1, [sp, #4]
-	ldrb	r1, [r4, #4]	@ zero_extendqisi2
-	str	r1, [sp, #8]
-	ldrb	r1, [r4, #5]	@ zero_extendqisi2
-	str	r1, [sp, #12]
-	adds	r1, r6, #1
+	mov	r0, r4
+	bl	ftl_memset
+	str	r5, [r4]
+.L2148:
+	ldr	r3, [r4]
+	cmp	r3, r5
+	ldr	r5, .L2151+8
+	bne	.L2149
+	ldr	r2, [r4, #88]
+	ldr	r3, .L2151+12
+	str	r2, [r3]
+	ldr	r2, [r4, #92]
+	ldr	r3, .L2151+16
+	str	r2, [r3]
+	ldr	r2, [r4, #8]
+	ldr	r3, .L2151+20
+	str	r2, [r3]
+	ldr	r2, [r4, #12]
+	ldr	r3, .L2151+24
+	str	r2, [r3]
+	ldr	r2, [r4, #16]
+	ldr	r3, .L2151+28
+	str	r2, [r3]
+	ldr	r2, [r4, #20]
+	ldr	r3, .L2151+32
+	str	r2, [r3]
+	ldr	r3, [r4, #28]
+	ldr	r2, [r4, #32]
+	str	r3, [r5]
+	ldr	r3, .L2151+36
+	str	r2, [r3]
+	ldr	r2, [r4, #36]
+	ldr	r3, .L2151+40
+	str	r2, [r3]
+	ldr	r2, [r4, #40]
+	ldr	r3, .L2151+44
+	str	r2, [r3]
+	ldr	r2, [r4, #44]
+	ldr	r3, .L2151+48
+	str	r2, [r3]
+	ldr	r2, [r4, #48]
+	ldr	r3, .L2151+52
+	str	r2, [r3]
+	ldr	r2, [r4, #60]
+	ldr	r3, .L2151+56
+	str	r2, [r3]
+.L2149:
+	ldr	r3, .L2151+60
+	movs	r2, #0
+	str	r2, [r3]
+	ldr	r2, [r4, #68]
+	ldr	r3, .L2151+64
+	cmp	r2, r3
+	bne	.L2150
+	ldr	r3, .L2151+68
+	movs	r2, #1
+	ldr	r1, .L2151+72
+	ldr	r0, .L2151+76
+	str	r2, [r3]
+	bl	printf
+.L2150:
+	ldr	r3, .L2151+80
+	ldr	r1, .L2151+84
+	ldrh	r2, [r3]
+	ldr	r3, .L2151+88
+	ldrh	r1, [r1]
+	ldr	r0, [r3]
+	ldr	r3, [r5]
+	mla	r0, r0, r2, r3
+	bl	__aeabi_uidiv
+	ldr	r3, .L2151+92
+	str	r0, [r3]
+	pop	{r3, r4, r5, pc}
+.L2152:
+	.align	2
+.L2151:
+	.word	.LANCHOR136
+	.word	1179929683
+	.word	.LANCHOR166
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR164
+	.word	.LANCHOR163
+	.word	.LANCHOR78
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR167
+	.word	.LANCHOR168
+	.word	.LANCHOR156
+	.word	.LANCHOR155
+	.word	305432421
+	.word	.LANCHOR101
+	.word	.LC41
+	.word	.LC6
+	.word	.LANCHOR46
+	.word	.LANCHOR38
+	.word	.LANCHOR165
+	.word	.LANCHOR202
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDumpData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, r10, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #36]
+	cmp	r3, #0
+	beq	.L2153
+	movs	r3, #0
+	ldrh	r6, [r0, #6]
+	str	r3, [r0, #36]
+	ldr	r3, .L2167
+	ldr	r10, [r0, #24]
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2153
+	ldr	r3, .L2167+4
+	ldr	r5, .L2167+8
+	ldr	r3, [r3]
+	mov	r7, r5
+	str	r3, [r5, #8]
+	ldr	r3, .L2167+12
+	ldr	r8, [r3]
+	ldrh	r3, [r0, #2]
+	str	r8, [r5, #12]
+	cbz	r3, .L2157
+	ldr	r2, .L2167+16
+	ldrh	r2, [r2]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L2157
+	ldrh	r2, [r0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L2157
+	ldr	r1, [r0, #12]
+	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5]
+	adds	r3, r3, #1
+	beq	.L2157
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r8, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
+	cmp	r2, r3
+	bne	.L2157
+	ldr	r2, [r5, #8]
+.L2166:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, r8, r10, lr}
+	b	FtlMapWritePage
+.L2157:
+	subs	r6, r6, #1
+	uxth	r6, r6
+	ldr	r3, [r10, r6, lsl #2]
+	str	r3, [r7, #4]
+	cbz	r3, .L2158
+	movs	r2, #1
+	ldr	r0, .L2167+8
+	mov	r1, r2
+	bl	FlashReadPages
+.L2159:
+	ldr	r2, [r7, #8]
+	mov	r1, r6
+	b	.L2166
+.L2158:
+	ldr	r3, .L2167+20
+	movs	r1, #255
+	ldr	r0, [r7, #8]
+	ldrh	r2, [r3]
+	bl	ftl_memset
+	b	.L2159
+.L2153:
+	pop	{r3, r4, r5, r6, r7, r8, r10, pc}
+.L2168:
+	.align	2
+.L2167:
+	.word	.LANCHOR75
+	.word	.LANCHOR181
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LANCHOR52
+	.word	.LANCHOR56
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L2251
+	sub	sp, sp, #32
+	mov	r1, r4
+	ldr	r3, .L2251+4
+	ldr	r2, [r5]
+	ldr	r6, .L2251+8
+	strh	r4, [r3]	@ movhi
+	ldr	r3, .L2251+12
+	lsls	r2, r2, #2
+	strh	r4, [r6]	@ movhi
+	ldr	r7, .L2251+16
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [r5]
+	mov	r1, r4
+	ldr	r3, .L2251+20
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2251+24
+	lsls	r2, r2, #2
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldrh	r2, [r7]
+	mov	r1, r4
+	ldr	r3, .L2251+28
+	lsls	r2, r2, #1
+	ldr	r0, [r3]
+	bl	ftl_memset
+	movs	r2, #12
+	movs	r1, #255
+	ldr	r0, .L2251+32
+	bl	ftl_memset
+	ldr	r3, .L2251+36
+	str	r6, [sp, #12]
+	str	r5, [sp, #16]
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+.L2170:
+	ldr	r3, .L2251+40
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r3]
+	cmp	r3, r2
+	bls	.L2212
+	ldr	r3, .L2251+44
+	movs	r5, #0
+	ldr	r1, .L2251+48
+	mov	fp, r5
+	movs	r7, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2251+52
+	ldr	r2, [r1]
+	ldr	r1, .L2251+56
+	ldr	r6, [r3]
+	ldr	r3, .L2251+60
+	str	r2, [sp, #8]
+	ldrh	r10, [r1]
+	ldr	r3, [r3]
+	ldr	r2, .L2251+64
+	b	.L2213
+.L2172:
+	ldrb	r0, [r2, r5]	@ zero_extendqisi2
+	ldr	r1, [sp, #4]
+	str	r3, [sp, #28]
+	str	r2, [sp, #24]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #24]
+	ldr	r3, [sp, #28]
+	cbnz	r0, .L2171
+	ldr	r1, [sp, #20]
+	mla	r0, r7, fp, r6
+	ldr	r4, [sp, #8]
+	lsls	r1, r1, #10
+	str	r3, [r0, #8]
+	str	r1, [r0, #4]
+	mul	r1, r10, fp
+	bic	r1, r1, #3
+	add	r1, r1, r4
+	str	r1, [r0, #12]
+	add	r1, fp, #1
+	uxth	fp, r1
+.L2171:
+	adds	r5, r5, #1
+.L2213:
+	uxth	r1, r5
+	cmp	r8, r1
+	bhi	.L2172
+	cmp	fp, #0
+	bne	.L2173
+.L2211:
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #4]
+	b	.L2170
+.L2173:
+	movs	r7, #0
+	movs	r2, #1
+	mov	r1, fp
+	mov	r0, r6
+	bl	FlashReadPages
+.L2174:
+	uxth	r3, r7
+	cmp	fp, r3
+	bls	.L2211
+	ldr	r3, .L2251+52
+	mov	r8, #36
+	mul	r8, r8, r7
+	ldr	r3, [r3]
+	add	r2, r3, r8
+	ldr	r3, [r3, r8]
+	ldr	r5, [r2, #4]
+	ldr	r6, [r2, #12]
+	adds	r3, r3, #1
+	ubfx	r5, r5, #10, #16
+	bne	.L2177
+	mov	r10, #16
+.L2179:
+	ldr	r3, .L2251+52
+	movs	r2, #1
+	mov	r1, r2
+	ldr	r0, [r3]
+	add	r0, r0, r8
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	ldr	r3, .L2251+52
+	ldr	r3, [r3]
+	bne	.L2176
+	mov	r2, #-1
+	str	r2, [r3, r8]
+	ldr	r3, .L2251+52
+	ldr	r3, [r3]
+	ldr	r3, [r3, r8]
+	cmp	r3, r2
+	beq	.L2178
+.L2177:
+	ldr	r3, .L2251+68
+	ldr	r2, [r3]
+	ldr	r3, [r6, #4]
+	adds	r1, r2, #1
+	beq	.L2180
+	cmp	r2, r3
+	bhi	.L2181
+.L2180:
+	adds	r2, r3, #1
+	ittt	ne
+	ldrne	r1, .L2251+68
+	addne	r2, r3, #1
+	strne	r2, [r1]
+.L2181:
+	ldrh	r2, [r6]
+	movw	r1, #61604
+	cmp	r2, r1
+	beq	.L2183
+	bhi	.L2184
+	movw	r3, #61574
+	cmp	r2, r3
+	beq	.L2185
+.L2182:
+	adds	r7, r7, #1
+	b	.L2174
+.L2176:
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L2177
+	add	r10, r10, #-1
+	uxth	r10, r10
+	cmp	r10, #0
+	bne	.L2179
+.L2178:
+	ldr	r3, .L2251+72
+	ldrb	r1, [r3]	@ zero_extendqisi2
+	cbnz	r1, .L2250
+.L2209:
+	mov	r0, r5
+	bl	FtlFreeSysBlkQueueIn
+	b	.L2182
+.L2184:
+	movw	r3, #61634
+	cmp	r2, r3
+	beq	.L2186
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2182
+.L2250:
+	movs	r1, #0
+	b	.L2209
+.L2186:
+	ldr	r3, .L2251+8
+	ldrh	r2, [r3]
+	ldr	r3, .L2251
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L2188
+	ldr	r1, .L2251+76
+	movw	r2, #1269
+	ldr	r0, .L2251+80
+	bl	printf
+	ldr	r1, .L2251+84
+	ldr	r0, .L2251+88
+	bl	printf
+.L2188:
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r1, [r3]
+	ldrh	r0, [r2]
+	ldr	r2, .L2251+12
+	uxth	r10, r1
+	ldr	ip, [r2]
+	add	r3, r10, #-1
+	sub	r10, r10, r0
+	add	r10, r10, #-1
+	sxth	r3, r3
+	sxth	r10, r10
+.L2189:
+	cmp	r3, r10
+	bgt	.L2195
+	cmp	r3, #0
+	bge	.L2228
+	b	.L2182
+.L2195:
+	ldr	r2, [ip, r3, lsl #2]
+	add	r8, ip, r3, lsl #2
+	ldr	r4, [r6, #4]
+	cmp	r4, r2
+	bls	.L2190
+	ldr	r2, [ip]
+	cbnz	r2, .L2191
+	cmp	r1, r0
+	ittt	ne
+	ldrne	r2, .L2251+8
+	addne	r0, r0, #1
+	strhne	r0, [r2]	@ movhi
+.L2191:
+	ldr	r2, .L2251+20
+	uxth	r10, r3
+	ldr	r0, [r2]
+	movs	r2, #0
+.L2192:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2193
+	ldr	r2, [r6, #4]
+	cmp	r3, #0
+	str	r2, [r8]
+	strh	r5, [r0, r3, lsl #1]	@ movhi
+	blt	.L2182
+	ldr	r2, .L2251+8
+	ldrh	r0, [r2]
+	ldr	r2, .L2251
+	ldr	r2, [r2]
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2182
+.L2228:
+	ldr	r2, .L2251+8
+	adds	r0, r0, #1
+	strh	r0, [r2]	@ movhi
+	ldr	r2, [r6, #4]
+	str	r2, [ip, r3, lsl #2]
+	ldr	r2, .L2251+20
+.L2248:
+	ldr	r2, [r2]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L2182
+.L2193:
+	add	lr, ip, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, r0, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [ip, r1, lsl #2]
+	strh	lr, [r0, r1, lsl #1]	@ movhi
+	b	.L2192
+.L2190:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2189
+.L2252:
+	.align	2
+.L2251:
+	.word	.LANCHOR63
+	.word	.LANCHOR69
+	.word	.LANCHOR125
+	.word	.LANCHOR127
+	.word	.LANCHOR60
+	.word	.LANCHOR126
+	.word	.LANCHOR190
+	.word	.LANCHOR70
+	.word	.LANCHOR206
+	.word	.LANCHOR38
+	.word	.LANCHOR39
+	.word	.LANCHOR36
+	.word	.LANCHOR105
+	.word	.LANCHOR178
+	.word	.LANCHOR57
+	.word	.LANCHOR104
+	.word	.LANCHOR45
+	.word	.LANCHOR157
+	.word	.LANCHOR8
+	.word	.LANCHOR224
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+.L2185:
+	ldr	r8, .L2253+20
+	ldr	r10, .L2253+28
+	ldrh	r2, [r8]
+	ldrh	r3, [r10]
+	cmp	r2, r3
+	bls	.L2198
+	ldr	r1, .L2253
+	movw	r2, #1316
+	ldr	r0, .L2253+4
+	bl	printf
+	ldr	r1, .L2253+8
+	ldr	r0, .L2253+12
 	bl	printf
-.L2197:
-	cbnz	r6, .L2198
-	ldrb	r3, [r7, #0]	@ zero_extendqisi2
-	subs	r3, r3, #1
-	uxtb	r3, r3
-	cmp	r3, #253
-	bhi	.L2235
-	ldrb	r3, [r7, #1]	@ zero_extendqisi2
-	cmp	r3, #255
-	beq	.L2235
 .L2198:
-	ldrb	r3, [r5, r7]	@ zero_extendqisi2
-	cmp	r3, #181
-	bne	.L2200
-	movs	r3, #44
-	strb	r3, [r5, r7]
+	ldr	r2, .L2253+16
+	ldrh	lr, [r10]
+	ldrh	ip, [r8]
+	ldr	r0, [r2]
+	add	r10, lr, #-1
+	sxth	r3, r10
+	sub	r10, r10, ip
+.L2199:
+	cmp	r3, r10
+	ble	.L2204
+	ldr	r1, [r6, #4]
+	add	r8, r0, r3, lsl #2
+	ldr	r2, [r0, r3, lsl #2]
+	cmp	r1, r2
+	bls	.L2200
+	ldr	r2, [r0]
+	cbnz	r2, .L2201
+	cmp	lr, ip
+	ittt	ne
+	ldrne	r2, .L2253+20
+	addne	ip, ip, #1
+	strhne	ip, [r2]	@ movhi
+.L2201:
+	ldr	r2, .L2253+24
+	uxth	r10, r3
+	ldr	ip, [r2]
+	movs	r2, #0
+.L2202:
+	uxth	lr, r2
+	sxth	r1, r2
+	cmp	r10, lr
+	bhi	.L2203
+	ldr	r2, [r6, #4]
+	str	r2, [r8]
+	strh	r5, [ip, r3, lsl #1]	@ movhi
+.L2204:
+	cmp	r3, #0
+	blt	.L2182
+	ldr	r2, .L2253+28
+	ldr	ip, .L2253+20
+	ldrh	r2, [r2]
+	ldrh	r1, [ip]
+	subs	r2, r2, #1
+	subs	r2, r2, r1
+	sxth	r2, r2
+	cmp	r3, r2
+	bgt	.L2182
+	ldr	r2, [r6, #4]
+	adds	r1, r1, #1
+	strh	r1, [ip]	@ movhi
+	str	r2, [r0, r3, lsl #2]
+	ldr	r2, .L2253+24
+	b	.L2248
+.L2203:
+	add	lr, r0, r1, lsl #2
+	adds	r2, r2, #1
+	ldr	r4, [lr, #4]
+	add	lr, ip, r1, lsl #1
+	ldrh	lr, [lr, #2]
+	str	r4, [r0, r1, lsl #2]
+	strh	lr, [ip, r1, lsl #1]	@ movhi
+	b	.L2202
 .L2200:
+	subs	r3, r3, #1
+	sxth	r3, r3
+	b	.L2199
+.L2183:
+	ldr	r8, .L2253+48
+	movw	r2, #65535
+	ldrh	r1, [r8]
+	cmp	r1, r2
+	bne	.L2206
+.L2249:
+	strh	r5, [r8]	@ movhi
+	str	r3, [r8, #8]
+	b	.L2182
+.L2206:
+	ldrh	r0, [r8, #4]
+	cmp	r0, r2
+	beq	.L2207
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L2207:
+	ldr	r3, [r6, #4]
+	ldr	r2, [r8, #8]
+	cmp	r2, r3
+	bcs	.L2208
+	ldrh	r2, [r8]
+	strh	r2, [r8, #4]	@ movhi
+	b	.L2249
+.L2208:
+	strh	r5, [r8, #4]	@ movhi
+	b	.L2182
+.L2212:
+	ldr	r3, .L2253+32
+	ldr	r2, [r3]
+	ldrh	r3, [r2]
+	cbz	r3, .L2214
+.L2217:
+	ldr	r3, .L2253+24
+	ldr	r4, [r3]
+	ldrh	r2, [r4]
+	cmp	r2, #0
+	beq	.L2215
+.L2216:
+	ldr	r3, .L2253+36
+	ldrh	r2, [r3]
+	ldr	r3, .L2253+40
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bls	.L2247
+	ldr	r1, .L2253
+	movw	r2, #1450
+	ldr	r0, .L2253+4
+	bl	printf
+	ldr	r1, .L2253+8
+	ldr	r0, .L2253+12
+	bl	printf
+.L2247:
+	movs	r0, #0
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2214:
+	ldr	r1, .L2253+36
+	ldrh	r1, [r1]
+	cmp	r1, #0
+	beq	.L2217
+	ldr	r5, .L2253+40
+	ldr	r0, [r5]
+.L2218:
+	sxth	r1, r3
+	cmp	r1, r0
+	bcs	.L2217
+	ldrh	r4, [r2, r1, lsl #1]
+	adds	r3, r3, #1
+	cmp	r4, #0
+	beq	.L2218
+	ldr	r3, .L2253+44
+	movs	r6, #0
+	ldr	r0, [r3]
+	mov	r3, r1
+.L2219:
+	ldr	r4, [r5]
+	cmp	r3, r4
+	bcs	.L2217
+	ldrh	r7, [r2, r3, lsl #1]
+	subs	r4, r3, r1
+	strh	r7, [r2, r4, lsl #1]	@ movhi
+	ldr	r7, [r0, r3, lsl #2]
+	str	r7, [r0, r4, lsl #2]
+	strh	r6, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	sxth	r3, r3
+	b	.L2219
+.L2215:
+	ldr	r3, .L2253+20
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2216
+	ldr	r5, .L2253+28
+	ldrh	r1, [r5]
+.L2224:
+	sxth	r3, r2
+	cmp	r3, r1
+	mov	r6, r3
+	bge	.L2216
+	ldrh	r0, [r4, r3, lsl #1]
+	adds	r2, r2, #1
+	cmp	r0, #0
+	beq	.L2224
+	ldr	r2, .L2253+16
+	movs	r0, #0
+	ldr	r2, [r2]
+.L2225:
+	ldrh	r1, [r5]
+	cmp	r3, r1
+	bge	.L2216
+	ldrh	r7, [r4, r3, lsl #1]
+	subs	r1, r3, r6
+	strh	r7, [r4, r1, lsl #1]	@ movhi
+	ldr	r7, [r2, r3, lsl #2]
+	str	r7, [r2, r1, lsl #2]
+	adds	r1, r3, #1
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+	sxth	r3, r1
+	b	.L2225
+.L2254:
+	.align	2
+.L2253:
+	.word	.LANCHOR224
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR190
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR60
+	.word	.LANCHOR126
+	.word	.LANCHOR125
+	.word	.LANCHOR63
+	.word	.LANCHOR127
+	.word	.LANCHOR206
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	movs	r1, #0
+	ldr	r6, .L2280
+	ldr	r10, .L2280+156
+	ldrh	r2, [r6]
+	ldr	r7, .L2280+4
+	ldr	r3, [r10]
+	ldr	r4, .L2280+8
+	ldr	r5, .L2280+12
+	lsls	r2, r2, #1
+	ldr	r0, [r7]
+	mov	r8, r7
+	str	r3, [r4, #12]
+	str	r1, [r4, #8]
+	bl	ftl_memset
+	ldrh	r0, [r5]
+	movw	r3, #65535
+	cmp	r0, r3
+	bne	.L2256
+.L2265:
+	mov	r0, #-1
+.L2255:
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2256:
+	movs	r1, #1
+	ldr	fp, .L2280+160
+	bl	FtlGetLastWrittenPage
+	ldr	r3, .L2280+16
+	sxth	r7, r0
+	adds	r0, r0, #1
+	strh	r0, [r5, #2]	@ movhi
+.L2258:
+	cmp	r7, #0
+	bge	.L2261
+	ldr	r1, .L2280+20
+	movw	r2, #1510
+	ldr	r0, .L2280+24
+	bl	printf
+	ldr	r1, .L2280+28
+	ldr	r0, .L2280+32
+	bl	printf
+.L2260:
+	ldr	r2, .L2280+36
+	ldrh	r3, [r6]
+	ldrh	r2, [r2]
+	adds	r3, r3, #24
+	cmp	r2, r3, lsl #1
+	bcs	.L2263
+	ldr	r1, .L2280+20
+	mov	r2, #1512
+	ldr	r0, .L2280+24
+	bl	printf
+	ldr	r1, .L2280+28
+	ldr	r0, .L2280+32
+	bl	printf
+.L2263:
+	movs	r2, #48
+	ldr	r1, [r4, #8]
+	ldr	r0, .L2280+40
+	bl	ftl_memcpy
+	ldrh	r2, [r6]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r8]
+	lsls	r2, r2, #1
+	adds	r1, r1, #48
+	bl	ftl_memcpy
+	ldrh	r1, [r6]
+	ldr	r3, [r4, #8]
+	lsrs	r2, r1, #3
+	adds	r1, r1, #24
+	lsls	r1, r1, #1
+	adds	r2, r2, #4
+	bic	r1, r1, #3
+	add	r1, r1, r3
+	ldr	r3, .L2280+44
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+	ldr	r3, .L2280+48
+	ldrh	r3, [r3]
+	cbz	r3, .L2264
+	ldrh	r1, [r6]
+	ldr	r3, .L2280+52
+	ldrh	r2, [r3]
+	lsrs	r3, r1, #3
+	add	r3, r3, r1, lsl #1
+	ldr	r1, [r4, #8]
+	adds	r3, r3, #52
+	lsls	r2, r2, #2
+	ubfx	r3, r3, #2, #14
+	add	r1, r1, r3, lsl #2
+	ldr	r3, .L2280+56
+	ldr	r0, [r3]
+	bl	ftl_memcpy
+.L2264:
+	ldr	r4, .L2280+40
+	ldr	r3, .L2280+16
+	ldr	r2, [r4]
+	cmp	r2, r3
+	bne	.L2265
+	ldr	r3, .L2280+60
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	ldrh	r6, [r4, #8]
+	ldrh	r3, [r3]
+	strh	r6, [r5, #6]	@ movhi
+	cmp	r2, r3
+	bne	.L2265
+	ldr	r3, .L2280+64
+	ldr	r2, .L2280+68
+	str	r6, [r3]
+	ldr	r3, .L2280+72
+	ldrh	r3, [r3]
+	muls	r3, r6, r3
+	str	r3, [r2]
+	ldr	r2, .L2280+76
+	ldrh	r2, [r2]
+	muls	r3, r2, r3
+	ldr	r2, .L2280+80
+	str	r3, [r2]
+	ldr	r3, .L2280+84
+	ldr	r5, [r3]
+	ldr	r3, .L2280+88
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L2280+92
+	subs	r0, r5, r0
+	ldrh	r1, [r3]
+	subs	r0, r0, r6
+	bl	__aeabi_uidiv
+	ldr	r3, .L2280+96
+	cmp	r6, r5
+	strh	r0, [r3]	@ movhi
+	bls	.L2266
+	ldr	r1, .L2280+20
+	movw	r2, #1539
+	ldr	r0, .L2280+24
+	bl	printf
+	ldr	r1, .L2280+28
+	ldr	r0, .L2280+32
+	bl	printf
+.L2266:
+	ldrh	r2, [r4, #16]
+	ldr	r3, .L2280+100
+	ldrh	ip, [r4, #14]
+	ldr	r7, .L2280+104
+	lsrs	r1, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r3, #6]
+	ldrb	r2, [r4, #11]	@ zero_extendqisi2
+	strh	r1, [r3, #2]	@ movhi
+	ldr	r1, .L2280+108
+	strb	r2, [r3, #8]
+	ldrh	r2, [r4, #18]
+	strh	ip, [r3]	@ movhi
+	movw	r3, #65535
+	strh	r3, [r7]	@ movhi
+	movs	r3, #0
+	strh	r2, [r1]	@ movhi
+	ldrh	r2, [r4, #20]
+	strh	r3, [r7, #2]	@ movhi
+	strb	r3, [r7, #6]
+	strb	r3, [r7, #8]
+	lsrs	r5, r2, #6
+	and	r2, r2, #63
+	strb	r2, [r1, #6]
+	ldrb	r2, [r4, #12]	@ zero_extendqisi2
+	strh	r5, [r1, #2]	@ movhi
+	ldrh	r5, [r4, #22]
+	strb	r2, [r1, #8]
+	ldr	r2, .L2280+112
+	strh	r5, [r2]	@ movhi
+	ldrh	r5, [r4, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r2, #6]
+	ldrb	r5, [r4, #13]	@ zero_extendqisi2
+	strh	r6, [r2, #2]	@ movhi
+	ldr	r6, [r4, #32]
+	strb	r5, [r2, #8]
+	ldr	r5, .L2280+116
+	str	r3, [r5]
+	ldr	r5, .L2280+120
+	str	r3, [r5]
+	ldr	r5, .L2280+124
+	str	r3, [r5]
+	ldr	r5, .L2280+128
+	str	r3, [r5]
+	ldr	r5, .L2280+132
+	str	r6, [r5]
+	mov	r6, r1
+	ldr	r5, .L2280+136
+	str	r3, [r5]
+	ldr	r5, .L2280+140
+	str	r3, [r5]
+	ldr	r5, .L2280+144
+	ldr	lr, [r4, #40]
+	str	r3, [r5]
+	ldr	r3, .L2280+148
+	ldr	r5, [r3]
+	cmp	lr, r5
+	mov	r5, r2
+	it	hi
+	strhi	lr, [r3]
+	ldr	r3, .L2280+152
+	ldr	r2, [r4, #36]
+	ldr	r1, [r3]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3]
+	movw	r3, #65535
+	cmp	ip, r3
+	beq	.L2269
+	ldr	r0, .L2280+100
+	bl	make_superblock
+.L2269:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2270
+	ldr	r0, .L2280+108
+	bl	make_superblock
+.L2270:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2271
+	ldr	r0, .L2280+112
+	bl	make_superblock
+.L2271:
+	ldrh	r2, [r7]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2272
+	ldr	r0, .L2280+104
+	bl	make_superblock
+.L2272:
+	movs	r0, #0
+	b	.L2255
+.L2261:
+	ldrh	r2, [r5]
+	ldr	r0, .L2280+8
+	str	r3, [sp, #4]
+	orr	r2, r7, r2, lsl #10
+	str	r2, [r4, #4]
+	ldr	r2, [fp]
+	str	r2, [r4, #8]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r4]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2259
+	ldr	r2, [fp]
+	ldr	r2, [r2]
+	cmp	r2, r3
+	bne	.L2259
+	ldr	r2, [r10]
+	ldrh	r1, [r2]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L2260
+.L2259:
+	subs	r7, r7, #1
+	sxth	r7, r7
+	b	.L2258
+.L2281:
+	.align	2
+.L2280:
+	.word	.LANCHOR38
+	.word	.LANCHOR82
+	.word	.LANCHOR199
+	.word	.LANCHOR206
+	.word	1179929683
+	.word	.LANCHOR225
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR56
+	.word	.LANCHOR135
+	.word	.LANCHOR0
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR192
+	.word	.LANCHOR43
+	.word	.LANCHOR226
+	.word	.LANCHOR71
+	.word	.LANCHOR51
+	.word	.LANCHOR54
+	.word	.LANCHOR67
+	.word	.LANCHOR40
+	.word	.LANCHOR73
+	.word	.LANCHOR36
+	.word	.LANCHOR227
+	.word	.LANCHOR90
+	.word	.LANCHOR201
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR164
+	.word	.LANCHOR163
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR162
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR185
+	.word	.LANCHOR79
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #24]
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldrh	fp, [r0, #6]
+	mov	r7, r0
+	movs	r4, #0
+	str	r3, [sp, #12]
+	ldr	r3, [r0, #12]
+	lsl	r2, fp, #2
+	str	r3, [sp, #8]
+	ldr	r3, [r0, #16]
+	str	r3, [sp, #20]
+	ldrh	r3, [r0, #8]
+	ldr	r0, [sp, #12]
+	str	r3, [sp, #16]
+	bl	ftl_memset
+	ldr	r2, .L2322
+	ldr	r3, .L2322+4
+	str	r4, [r7, #32]
+	ldr	r1, [r2]
+	mov	r10, r2
+	mov	r8, r3
+	str	r4, [r7, #28]
+	str	r1, [r3, #8]
+	ldr	r1, .L2322+8
+	ldr	r5, [r1]
+	movw	r1, #65535
+	str	r5, [r3, #12]
+	strh	r1, [r7]	@ movhi
+	strh	r1, [r7, #2]	@ movhi
+	movs	r1, #1
+	str	r1, [r7, #36]
+.L2283:
+	ldr	r2, [sp, #16]
+	sxth	r3, r4
+	cmp	r3, r2
+	bge	.L2301
+	ldr	r2, [sp, #16]
+	lsls	r6, r3, #1
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bne	.L2284
+	ldr	r2, [sp, #8]
+	movs	r1, #1
+	str	r3, [sp, #16]
+	ldr	r10, .L2322+4
+	ldrh	r0, [r2, r3, lsl #1]
+	add	r6, r6, r2
+	bl	FtlGetLastWrittenPage
+	ldr	r3, [sp, #20]
+	sxth	r8, r0
+	strh	r4, [r7]	@ movhi
+	movs	r4, #0
+	adds	r0, r0, #1
+	mov	r2, r3
+	ldr	r3, [sp, #16]
+	strh	r0, [r7, #2]	@ movhi
+	ldr	r3, [r2, r3, lsl #2]
+	str	r3, [r7, #28]
+.L2285:
+	sxth	r3, r4
+	cmp	r3, r8
+	ble	.L2288
+.L2301:
+	ldr	r3, .L2322+12
+	cmp	r7, r3
+	str	r3, [sp, #12]
+	bne	.L2290
+	ldr	r3, .L2322+16
+	ldrh	r3, [r3]
+	cbz	r3, .L2290
+	ldr	fp, .L2322+40
+	movs	r4, #0
+.L2304:
+	ldr	r3, .L2322+20
+	ldrh	r3, [r3]
+	cmp	r4, r3
+	bcc	.L2311
+.L2290:
+	mov	r0, r7
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L2322+24
+	ldrh	r2, [r7, #2]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2303
+	mov	r0, r7
+	bl	ftl_map_blk_alloc_new_blk
+.L2303:
+	mov	r0, r7
+	bl	ftl_map_blk_gc
+	mov	r0, r7
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2288:
+	ldrh	r2, [r6]
+	ldr	r0, .L2322+4
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r10, #4]
+	bl	FlashReadPages
+	ldr	r3, [r10]
+	adds	r3, r3, #1
+	beq	.L2286
+	ldrh	r3, [r5, #8]
+	cmp	fp, r3
+	bls	.L2287
+	ldrh	r1, [r5]
+	ldrh	r2, [r7, #4]
+	cmp	r1, r2
+	bne	.L2287
+	ldr	r2, [r10, #4]
+	ldr	r1, [sp, #12]
+	str	r2, [r1, r3, lsl #2]
+.L2287:
+	adds	r4, r4, #1
+	b	.L2285
+.L2286:
+	ldrh	r3, [r6]
+	strh	r3, [r7, #40]	@ movhi
+	b	.L2287
+.L2284:
+	ldr	r2, [r10]
+	ldr	r0, .L2322+4
+	str	r2, [r8, #8]
+	ldr	r2, [sp, #8]
+	add	r2, r2, r6
+	ldr	r6, .L2322+24
+	str	r2, [sp, #24]
+	ldr	r2, [sp, #8]
+	ldrh	r2, [r2, r3, lsl #1]
+	ldrh	r3, [r6]
+	subs	r3, r3, #1
+	orr	r3, r3, r2, lsl #10
+	movs	r2, #1
+	mov	r1, r2
+	str	r3, [r8, #4]
+	bl	FlashReadPages
+	ldr	r3, [r8]
+	adds	r3, r3, #1
+	beq	.L2313
+	ldrh	r2, [r5]
+	ldrh	r3, [r7, #4]
+	cmp	r2, r3
+	bne	.L2313
+	ldrh	r2, [r5, #8]
+	movw	r3, #64245
+	cmp	r2, r3
+	beq	.L2292
+.L2313:
+	ldr	r3, .L2322+24
+	movs	r6, #0
+.L2293:
+	ldrh	r1, [r3]
+	sxth	r2, r6
+	cmp	r2, r1
+	bge	.L2299
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #24]
+	ldr	r0, .L2322+4
+	ldrh	r1, [r3]
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r8, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [r8]
+	ldr	r3, [sp, #28]
+	adds	r2, r2, #1
+	beq	.L2297
+	ldrh	r2, [r5, #8]
+	cmp	fp, r2
+	bls	.L2297
+	ldrh	r0, [r5]
+	ldrh	r1, [r7, #4]
+	cmp	r0, r1
+	ittt	eq
+	ldreq	r1, [r8, #4]
+	ldreq	r0, [sp, #12]
+	streq	r1, [r0, r2, lsl #2]
+.L2297:
+	adds	r6, r6, #1
+	b	.L2293
+.L2292:
+	ldrh	r2, [r6]
+	movs	r1, #0
+	ldr	r6, [r10]
+	subs	r2, r2, #1
+.L2294:
+	sxth	r3, r1
+	cmp	r3, r2
+	blt	.L2296
+.L2299:
+	adds	r4, r4, #1
+	b	.L2283
+.L2296:
+	lsls	r0, r3, #3
+	ldr	r3, [r6, r3, lsl #3]
+	adds	r1, r1, #1
+	uxth	ip, r3
+	cmp	fp, ip
+	itttt	hi
+	addhi	r0, r0, r6
+	ldrhi	r3, [sp, #12]
+	ldrhi	r0, [r0, #4]
+	strhi	r0, [r3, ip, lsl #2]
+	b	.L2294
+.L2311:
+	ldr	r3, [fp]
+	lsls	r5, r4, #2
+	ldr	r2, [r3, r4, lsl #2]
+	subs	r3, r2, #1
+	adds	r3, r3, #3
+	bhi	.L2306
+	ldr	r8, .L2322+44
+	ldr	r3, [r8]
+	ldr	r3, [r3, r4, lsl #2]
+	cmp	r2, r3
+	beq	.L2306
+	ldr	r3, .L2322
+	ldr	r6, .L2322+4
+	ldr	r3, [r3]
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	mov	r0, r6
+	str	r3, [r6, #8]
+	ldr	r3, .L2322+8
+	ldr	r3, [r3]
+	str	r3, [r6, #12]
+	str	r3, [sp, #16]
+	bl	FlashReadPages
+	ldr	r2, [r6]
+	ldr	r3, [sp, #16]
+	adds	r2, r2, #1
+	beq	.L2315
+	ldr	r2, [sp, #12]
+	ldrh	r1, [r3]
+	ldrh	r2, [r2, #4]
+	cmp	r1, r2
+	bne	.L2315
+	ldr	r10, [r3, #4]
+.L2308:
+	ldr	r2, [r8]
+	ldr	r0, .L2322+4
+	str	r3, [sp, #16]
+	ldr	r2, [r2, r5]
+	str	r2, [r6, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3, #4]
+	cmp	r10, r3
+	bls	.L2306
+	ldr	r2, [r8]
+	ldr	r1, [fp]
+	ldr	r0, .L2322+28
+	str	r3, [sp]
+	mov	r3, r10
+	ldr	r2, [r2, r5]
+	ldr	r1, [r1, r5]
+	bl	printf
+	ldr	r3, [fp]
+	ldr	r2, [r8]
+	ldr	r1, [r3, r5]
+	str	r1, [r2, r5]
+	movs	r1, #0
+	ldr	r0, [r3, r5]
+	ldr	r3, .L2322+32
+	ubfx	r0, r0, #10, #16
+	ldrh	r2, [r3]
+.L2309:
+	sxth	r5, r1
+	cmp	r5, r2
+	blt	.L2310
+	ldr	r1, .L2322+36
+	ldr	r1, [r1]
+	cmp	r2, r1
+	bcs	.L2306
+	ldr	r1, [sp, #8]
+	strh	r0, [r1, r2, lsl #1]	@ movhi
+	ldrh	r2, [r3]
+	adds	r2, r2, #1
+	strh	r2, [r3]	@ movhi
+	bl	remove_from_free_sys_Queue
+	b	.L2306
+.L2315:
+	mov	r10, #0
+	b	.L2308
+.L2310:
+	ldr	r6, [sp, #8]
+	adds	r1, r1, #1
+	ldrh	r5, [r6, r5, lsl #1]
+	cmp	r5, r0
+	bne	.L2309
+.L2306:
+	adds	r4, r4, #1
+	b	.L2304
+.L2323:
+	.align	2
+.L2322:
+	.word	.LANCHOR79
+	.word	.LANCHOR199
+	.word	.LANCHOR185
+	.word	.LANCHOR124
+	.word	.LANCHOR68
+	.word	.LANCHOR65
+	.word	.LANCHOR52
+	.word	.LC42
+	.word	.LANCHOR125
+	.word	.LANCHOR63
+	.word	.LANCHOR192
+	.word	.LANCHOR128
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L2325
+	ldr	r0, .L2325+4
+	ldrh	r3, [r3]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L2325+8
+	ldrh	r3, [r3]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L2325+12
+	ldrh	r3, [r3]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L2325+16
+	ldr	r3, [r3]
+	str	r3, [r0, #12]
+	ldr	r3, .L2325+20
+	ldr	r3, [r3]
+	str	r3, [r0, #16]
+	ldr	r3, .L2325+24
+	ldr	r3, [r3]
+	str	r3, [r0, #20]
+	ldr	r3, .L2325+28
+	ldr	r3, [r3]
+	str	r3, [r0, #24]
+	movw	r3, #65535
+	strh	r3, [r0, #40]	@ movhi
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2326:
+	.align	2
+.L2325:
+	.word	.LANCHOR60
+	.word	.LANCHOR215
+	.word	.LANCHOR69
+	.word	.LANCHOR61
+	.word	.LANCHOR70
+	.word	.LANCHOR190
+	.word	.LANCHOR189
+	.word	.LANCHOR191
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L2328
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L2329:
+	.align	2
+.L2328:
+	.word	.LANCHOR124
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r3, [r0]
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	r10, r0
+	sub	sp, sp, #56
+	cmp	r3, r2
+	beq	.L2491
+	ldrh	r3, [r0, #2]
+	str	r3, [sp, #12]
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	str	r3, [sp, #28]
+	ldr	r3, .L2500
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	mov	r3, #0
+	bne	.L2333
+	strh	r3, [r0, #4]	@ movhi
+.L2498:
+	strb	r3, [r10, #6]
+.L2491:
+	movs	r0, #0
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2333:
+	ldrh	r0, [r0, #16]
+.L2334:
+	cmp	r0, r2
+	uxth	r5, r3
+	add	r3, r3, #1
+	beq	.L2335
+	ldrb	r1, [r10, #8]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L2336
+	bl	FtlGetLastWrittenPage
+	adds	r6, r0, #1
+	mov	r4, r0
+	beq	.L2337
+	ldr	r3, .L2500+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2415
+	ldr	r3, .L2500+8
+	ldrh	r6, [r3, r0, lsl #1]
+.L2338:
+	ldr	r3, .L2500+12
+	movw	lr, #65535
+	mov	r8, #36
+	ldrh	fp, [r3]
+	ldr	r3, .L2500+16
+	ldr	r0, [r3]
+	ldr	r3, .L2500+20
+	ldr	r3, [r3]
+	str	r3, [sp, #8]
+	ldr	r3, .L2500+24
+	ldrh	ip, [r3]
+	add	r3, r10, #16
+	str	r3, [sp, #20]
+	str	r3, [sp, #4]
+	movs	r3, #0
+	mov	r7, r3
+.L2339:
+	uxth	r2, r3
+	cmp	fp, r2
+	bhi	.L2343
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L2416
+	ldr	r3, .L2500+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	adds	r3, r3, #0
+	it	ne
+	movne	r3, #1
+.L2492:
+	str	r3, [sp, #36]
+	mov	r1, r7
+	ldr	r2, [sp, #36]
+	movs	r5, #0
+	bl	FlashReadPages
+	ldr	r3, .L2500+28
+	movw	fp, #65535
+	ldr	r8, .L2500+16
+	ldr	r3, [r3]
+	subs	r3, r3, #1
+	str	r3, [sp, #4]
+.L2345:
+	uxth	r3, r5
+	cmp	r7, r3
+	bhi	.L2350
+	bne	.L2348
+	adds	r4, r4, #1
+	uxth	r3, r4
+	str	r3, [sp, #8]
+	ldr	r3, [r8]
+	ldr	r0, [r3, #4]
+.L2493:
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	str	r0, [sp, #16]
+	cmp	r3, #1
+	bne	.L2352
+	ldr	r2, .L2500+4
+	ldrb	r2, [r2]	@ zero_extendqisi2
+	cbnz	r2, .L2352
+	ldr	r1, [sp, #8]
+	ldr	r2, .L2500+8
+	ldrh	r2, [r2, r1, lsl #1]
+	str	r2, [sp, #8]
+.L2352:
+	ldr	r2, .L2500
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r2]
+	cmp	r2, r1
+	bne	.L2353
+	ldrh	r2, [sp, #8]
+	strh	r2, [r10, #2]	@ movhi
+	movs	r2, #0
+	strb	r2, [r10, #6]
+	strh	r2, [r10, #4]	@ movhi
+.L2353:
+	ldr	r2, [sp, #8]
+	ldr	r1, [sp, #12]
+	cmp	r2, r1
+	bne	.L2354
+	ldr	r2, [sp, #16]
+	ldr	r1, [sp, #28]
+	cmp	r2, r1
+	bne	.L2354
+.L2499:
+	ldr	r1, [sp, #8]
+	mov	r0, r10
+	bl	ftl_sb_update_avl_pages
+	b	.L2491
+.L2335:
+	uxth	r1, r3
+	adds	r1, r1, #8
+	ldrh	r0, [r10, r1, lsl #1]
+	b	.L2334
+.L2336:
+	movs	r1, #0
+	bl	FtlGetLastWrittenPage
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L2337
+.L2415:
+	mov	r6, r4
+	b	.L2338
+.L2337:
+	ldr	r3, [sp, #12]
+	cbz	r3, .L2340
+	ldr	r1, .L2500+32
+	movw	r2, #1894
+	ldr	r0, .L2500+36
+	bl	printf
+	ldr	r1, .L2500+40
+	ldr	r0, .L2500+44
+	bl	printf
+.L2340:
+	ldr	r3, [sp, #28]
+	cbz	r3, .L2341
+	cmp	r5, r3
+	beq	.L2341
+	ldr	r1, .L2500+32
+	movw	r2, #1895
+	ldr	r0, .L2500+36
+	bl	printf
+	ldr	r1, .L2500+40
+	ldr	r0, .L2500+44
+	bl	printf
+.L2341:
+	movs	r3, #0
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2498
+.L2343:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #4]
+	beq	.L2342
+	mla	r1, r8, r7, r0
+	orr	r2, r6, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, ip, r7
+	adds	r7, r7, #1
+	uxth	r7, r7
+	bic	r2, r2, #3
+	mov	r5, r2
+	ldr	r2, [sp, #8]
+	add	r5, r5, r2
+	str	r5, [r1, #12]
+.L2342:
+	adds	r3, r3, #1
+	b	.L2339
+.L2416:
+	movs	r3, #0
+	b	.L2492
+.L2350:
+	movs	r3, #36
+	ldr	r1, [r8]
+	muls	r3, r5, r3
+	adds	r2, r1, r3
+	ldr	r3, [r1, r3]
+	cbnz	r3, .L2346
+	ldr	r2, [r2, #12]
+	ldr	r3, [r2, #4]
+	adds	r1, r3, #1
+	beq	.L2347
+	ldr	r1, .L2500+28
+	mov	r0, r3
+	ldr	r1, [r1]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2347
+	ldr	r1, .L2500+28
+	adds	r3, r3, #1
+	str	r3, [r1]
+.L2347:
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	bne	.L2349
+.L2348:
+	uxth	r3, r4
+	uxth	r5, r5
+	str	r3, [sp, #8]
+	movs	r2, #36
+	ldr	r3, [r8]
+	mla	r5, r2, r5, r3
+	ldr	r0, [r5, #4]
+	b	.L2493
+.L2346:
+	ldr	r1, [r2, #4]
+	uxth	fp, r6
+	ldr	r0, .L2500+48
+	bl	printf
+	ldrh	r2, [r10]
+	ldr	r3, .L2500+52
+	strh	r2, [r3]	@ movhi
+.L2349:
+	adds	r5, r5, #1
+	b	.L2345
+.L2354:
+	movw	r2, #65535
+	cmp	fp, r2
+	bne	.L2355
+	cmp	r3, #0
+	bne	.L2356
+.L2355:
+	ldr	r3, .L2500+56
+	uxth	fp, r6
+	uxth	r6, r6
+	mov	r7, #-1
+	ldr	r2, [r3]
+	adds	r2, r2, #1
+	itt	eq
+	ldreq	r2, [sp, #4]
+	streq	r2, [r3]
+	ldr	r3, [r3]
+	str	r3, [sp, #24]
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #7
+	cmp	r6, r3
+	mov	r6, r7
+	itet	gt
+	subgt	r4, fp, #7
+	ldrle	r4, [sp, #12]
+	uxthgt	r4, r4
+.L2359:
+	cmp	r4, fp
+	bhi	.L2374
+	ldr	r3, .L2500+12
+	movw	lr, #65535
+	mov	ip, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2500+16
+	ldr	r0, [r3]
+	ldr	r3, [sp, #20]
+	str	r3, [sp, #32]
+	movs	r3, #0
+	mov	r5, r3
+	b	.L2375
+.L2361:
+	ldr	r1, [sp, #32]
+	ldrh	r2, [r1], #2
+	cmp	r2, lr
+	str	r1, [sp, #32]
+	beq	.L2360
+	mla	r1, ip, r5, r0
+	adds	r5, r5, #1
+	orr	r2, r4, r2, lsl #10
+	uxth	r5, r5
+	str	r2, [r1, #4]
+.L2360:
+	adds	r3, r3, #1
+.L2375:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2361
+	mov	r1, r5
+	ldr	r2, [sp, #36]
+	bl	FlashReadPages
+	ldr	r2, .L2500+4
+	movs	r1, #36
+	ldr	r3, .L2500+56
+	movs	r0, #0
+	movw	ip, #65535
+	ldrb	lr, [r2]	@ zero_extendqisi2
+	ldr	r2, .L2500+16
+	ldr	r3, [r3]
+	ldr	r2, [r2]
+	mla	r5, r1, r5, r2
+.L2362:
+	cmp	r2, r5
+	bne	.L2372
+	cbz	r0, .L2373
+	ldr	r2, .L2500+56
+	str	r3, [r2]
+.L2373:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L2359
+.L2501:
+	.align	2
+.L2500:
+	.word	.LANCHOR51
+	.word	.LANCHOR8
+	.word	.LANCHOR16
+	.word	.LANCHOR36
+	.word	.LANCHOR178
+	.word	.LANCHOR105
+	.word	.LANCHOR57
+	.word	.LANCHOR158
+	.word	.LANCHOR228
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LC43
+	.word	.LANCHOR229
+	.word	.LANCHOR133
+.L2372:
+	ldr	r1, [r2]
+	cbnz	r1, .L2363
+	ldr	r1, [r2, #12]
+	ldrh	r8, [r1]
+	cmp	r8, ip
+	beq	.L2419
+	ldr	r1, [r1, #4]
+	cmp	r1, #-1
+	beq	.L2419
+	adds	r0, r7, #1
+	bne	.L2421
+	ldr	r0, .L2502
+	ldrh	r0, [r0, r4, lsl #1]
+	cmp	r0, ip
+	bne	.L2365
+	cmp	lr, #0
+	beq	.L2421
+.L2365:
+	ldr	r0, [sp, #4]
+	cmp	r0, r3
+	it	ne
+	movne	r7, r3
+.L2421:
+	movs	r0, #1
+	b	.L2364
+.L2363:
+	cbz	r0, .L2366
+	ldr	r2, .L2502+4
+	str	r3, [r2]
+.L2366:
+	ldr	r3, .L2502+8
+	ldrh	r2, [r10]
+	strh	r2, [r3]	@ movhi
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	cbnz	r3, .L2356
+	ldr	r3, .L2502
+	ldrh	r2, [r3, r4, lsl #1]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2368
+	adds	r1, r7, #1
+	ldr	r3, .L2502+4
+	beq	.L2369
+	str	r7, [r3]
+.L2356:
+	ldr	r3, .L2502+12
+	movs	r2, #1
+	ldr	r0, .L2502+16
+	ldr	r6, .L2502+20
+	strh	r2, [r3]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	fp, [sp, #12]
+.L2376:
+	ldr	r3, .L2502+24
+	movw	ip, #65535
+	ldr	r0, [r6]
+	mov	lr, #36
+	ldr	r1, [sp, #20]
+	movs	r2, #0
+	ldrh	r5, [r3]
+	ldr	r3, .L2502+28
+	str	r2, [sp, #24]
+	ldrb	r7, [r3]	@ zero_extendqisi2
+.L2377:
+	uxth	r3, r2
+	cmp	r3, r5
+	bcc	.L2380
+	ldr	r2, [sp, #36]
+	ldr	r1, [sp, #24]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2497:
+	str	r3, [sp, #32]
+	ldr	r2, [sp, #24]
+	ldrh	r3, [sp, #32]
+	cmp	r2, r3
+	bhi	.L2409
+	ldrb	r3, [r10, #8]	@ zero_extendqisi2
+	add	fp, fp, #1
+	uxth	fp, fp
+	cmp	r3, #1
+	bne	.L2410
+	ldr	r3, .L2502+28
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2410
+	ldr	r3, .L2502+32
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2410
+	ldr	r3, [sp, #8]
+	cmp	r3, fp
+	beq	.L2385
+.L2410:
+	ldr	r3, .L2502+36
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2376
+	ldr	r2, .L2502+24
+	movw	r0, #65535
+	movs	r3, #0
+	strh	fp, [r10, #2]	@ movhi
+	strh	r3, [r10, #4]	@ movhi
+	ldrh	r2, [r2]
+.L2411:
+	uxth	r1, r3
+	cmp	r1, r2
+	bcs	.L2491
+	ldr	r1, [sp, #20]
+	ldrh	r4, [r1], #2
+	cmp	r4, r0
+	str	r1, [sp, #20]
+	add	r1, r3, #1
+	bne	.L2498
+	mov	r3, r1
+	b	.L2411
+.L2369:
+	ldr	r2, [sp, #4]
+	ldr	r1, [sp, #24]
+	cmp	r2, r1
+	itet	eq
+	ldreq	r2, [r3]
+	movne	r2, r1
+	addeq	r2, r2, #-1
+.L2494:
+	str	r2, [r3]
+	b	.L2356
+.L2368:
+	ldr	r3, [sp, #4]
+	cmp	r6, r3
+	beq	.L2371
+	adds	r2, r6, #1
+	beq	.L2356
+	ldr	r3, .L2502+4
+	str	r6, [r3]
+	b	.L2356
+.L2371:
+	ldr	r2, .L2502+4
+	ldr	r1, [sp, #4]
+	ldr	r3, [r2]
+	cmp	r1, r3
+	beq	.L2356
+	subs	r3, r3, #1
+	str	r3, [r2]
+	b	.L2356
+.L2419:
+	mov	r1, r3
+	mov	r3, r6
+.L2364:
+	mov	r6, r3
+	adds	r2, r2, #36
+	mov	r3, r1
+	b	.L2362
+.L2374:
+	mov	r2, #-1
+	ldr	r3, .L2502+4
+	b	.L2494
+.L2380:
+	ldrh	r3, [r1], #2
+	cmp	r3, ip
+	beq	.L2378
+	ldr	r4, [sp, #24]
+	orr	r3, fp, r3, lsl #10
+	mla	r4, lr, r4, r0
+	str	r3, [r4, #4]
+	ldrb	r8, [r10, #8]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L2379
+	cbz	r7, .L2379
+	orr	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+.L2379:
+	ldr	r3, [sp, #24]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	str	r3, [sp, #24]
+.L2378:
+	adds	r2, r2, #1
+	b	.L2377
+.L2409:
+	ldr	r3, [sp, #32]
+	movs	r5, #36
+	ldr	r8, [r6]
+	muls	r5, r3, r5
+	add	r7, r8, r5
+	ldr	r4, [r7, #4]
+	ubfx	r0, r4, #10, #16
+	str	r4, [sp, #52]
+	bl	P2V_plane
+	ldr	r3, [sp, #12]
+	cmp	fp, r3
+	bcc	.L2382
+	bne	.L2383
+	ldr	r3, [sp, #28]
+	cmp	r3, r0
+	bhi	.L2382
+.L2383:
+	ldr	r3, [sp, #8]
+	cmp	fp, r3
+	bne	.L2384
+	ldr	r3, [sp, #16]
+	cmp	r3, r0
+	beq	.L2385
+.L2384:
+	ldr	r3, [r8, r5]
+	adds	r3, r3, #1
+	beq	.L2386
+	ldr	r3, [r7, #12]
+	movw	r2, #61589
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2387
+.L2393:
+	ldrh	r0, [r10]
+.L2496:
+	bl	decrement_vpc_count
+.L2382:
+	ldr	r3, [sp, #32]
+	adds	r3, r3, #1
+	b	.L2497
+.L2387:
+	ldr	r2, [r3, #4]
+	str	r2, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2388
+	ldr	r2, .L2502+40
+	ldr	r0, [sp, #4]
+	ldr	r1, [r2]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L2388
+	ldr	r1, [sp, #4]
+	adds	r1, r1, #1
+	str	r1, [r2]
+.L2388:
+	ldr	r4, [r3, #8]
+	add	r1, sp, #48
+	ldr	r3, [r3, #12]
+	movs	r2, #0
+	mov	r0, r4
+	str	r3, [sp, #44]
+	bl	log2phys
+	ldr	r3, .L2502+4
+	ldr	r1, [r3]
+	adds	r3, r1, #1
+	beq	.L2389
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2389
+	ldr	r3, [sp, #44]
+	adds	r7, r3, #1
+	beq	.L2390
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	add	r0, r0, r5
+	str	r3, [r0, #4]
+	ldr	r7, [r0, #12]
+	bl	FlashReadPages
+	ldr	r2, [r6]
+	ldr	r1, [r2, r5]
+	adds	r3, r2, r5
+	adds	r1, r1, #1
+	bne	.L2391
+.L2392:
+	mov	r3, #-1
+	ldrh	r0, [r10]
+	str	r3, [sp, #44]
+	bl	decrement_vpc_count
+.L2400:
+	ldr	r7, [sp, #44]
+	adds	r0, r7, #1
+	beq	.L2382
+.L2414:
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2502+44
+	mov	r4, r0
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bhi	.L2405
+	ldr	r1, .L2502+48
+	movw	r2, #2177
+	ldr	r0, .L2502+52
+	bl	printf
+	ldr	r1, .L2502+56
+	ldr	r0, .L2502+60
+	bl	printf
+.L2405:
+	ldr	r3, .L2502+64
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r4, lsl #1]
+	cmp	r3, #0
+	beq	.L2406
+	mov	r0, r4
+	b	.L2496
+.L2390:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	bne	.L2393
+	movs	r2, #1
+	add	r1, sp, #44
+	mov	r0, r4
+	bl	log2phys
+	b	.L2393
+.L2503:
+	.align	2
+.L2502:
+	.word	.LANCHOR117
+	.word	.LANCHOR133
+	.word	.LANCHOR229
+	.word	.LANCHOR230
+	.word	.LANCHOR124
+	.word	.LANCHOR178
+	.word	.LANCHOR36
+	.word	.LANCHOR8
+	.word	.LANCHOR52
+	.word	.LANCHOR51
+	.word	.LANCHOR158
+	.word	.LANCHOR38
+	.word	.LANCHOR228
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR82
+.L2391:
+	ldr	r1, [r7, #8]
+	cmp	r4, r1
+	bne	.L2392
+	ldr	r8, [r7, #4]
+	ldr	r0, .L2504
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2392
+	ldr	r1, [sp, #48]
+	ldr	r0, [sp, #52]
+	cmp	r1, r0
+	bne	.L2395
+.L2398:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	bl	FtlReUsePrevPpa
+	b	.L2392
+.L2395:
+	ldr	r0, [sp, #44]
+	cmp	r1, r0
+	beq	.L2392
+	adds	r0, r1, #1
+	beq	.L2396
+	str	r1, [r3, #4]
+	movs	r2, #0
+	movs	r1, #1
+	mov	r0, r3
+	ldr	r7, [r3, #12]
+	bl	FlashReadPages
+.L2397:
+	ldr	r3, [r6]
+	ldr	r3, [r3, r5]
+	adds	r3, r3, #1
+	beq	.L2398
+	ldr	r3, [r7, #4]
+	ldr	r2, .L2504
+	mov	r1, r3
+	ldr	r0, [r2]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2398
+	mov	r1, r3
+	mov	r0, r8
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L2392
+	b	.L2398
+.L2396:
+	str	r1, [r2, r5]
+	b	.L2397
+.L2389:
+	ldr	r3, [sp, #52]
+	ldr	r2, [sp, #48]
+	cmp	r2, r3
+	beq	.L2400
+	movs	r2, #1
+	add	r1, sp, #52
+	mov	r0, r4
+	bl	log2phys
+	ldr	r7, [sp, #48]
+	adds	r5, r7, #1
+	beq	.L2400
+	ldr	r3, [sp, #44]
+	cmp	r7, r3
+	beq	.L2414
+	ubfx	r0, r7, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L2504+4
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2404
+	ldr	r3, .L2504+8
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	beq	.L2404
+	ldr	r3, .L2504+12
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2400
+.L2404:
+	ldr	r0, [r6]
+	movs	r2, #0
+	movs	r1, #1
+	str	r7, [r0, #4]
+	ldr	r5, [r0, #12]
+	bl	FlashReadPages
+	ldr	r3, [r6]
+	ldr	r3, [r3]
+	adds	r3, r3, #1
+	beq	.L2400
+	ldr	r1, [r5, #4]
+	ldr	r0, [sp, #4]
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	bne	.L2400
+	movs	r2, #1
+	add	r1, sp, #48
+	mov	r0, r4
+	bl	log2phys
+	b	.L2400
+.L2406:
+	mov	r1, r4
+	ldr	r0, .L2504+16
+	bl	printf
+	b	.L2382
+.L2386:
+	ldrh	r3, [r10]
+	mov	r1, r4
+	ldr	r2, .L2504+20
+	ldr	r0, .L2504+24
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [sp, #4]
+	bl	printf
+	ldr	r2, .L2504+28
+	ldr	r3, [r2]
+	cmp	r3, #31
+	bhi	.L2407
+	ldr	r0, [sp, #52]
+	ldr	r1, .L2504+32
+	str	r0, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+.L2407:
+	ldrh	r0, [r10]
+	bl	decrement_vpc_count
+	ldr	r3, .L2504
+	ldr	r2, [r3]
+	adds	r1, r2, #1
+	bne	.L2408
+	ldr	r2, [sp, #4]
+.L2495:
+	str	r2, [r3]
+	b	.L2382
+.L2408:
+	ldr	r1, [sp, #4]
+	cmp	r1, r2
+	bcs	.L2382
+	mov	r2, r1
+	b	.L2495
+.L2385:
+	ldrb	r3, [sp, #16]	@ zero_extendqisi2
+	ldr	r2, [sp, #16]
+	strb	r3, [r10, #6]
+	ldrh	r3, [sp, #8]
+	strh	r3, [r10, #2]	@ movhi
+	b	.L2499
+.L2505:
+	.align	2
+.L2504:
+	.word	.LANCHOR133
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LC44
+	.word	.LANCHOR229
+	.word	.LC45
+	.word	.LANCHOR231
+	.word	.LANCHOR232
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2533
+	movw	r2, #65535
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	mov	r5, r0
+	ldrh	r4, [r3]
+	str	r3, [sp, #16]
+	cmp	r4, r2
+	beq	.L2524
+	cbnz	r4, .L2507
+.L2508:
+	bl	FtlGcPageVarInit
+	b	.L2509
+.L2524:
+	movs	r4, #0
+.L2507:
+	ldr	r3, .L2533+4
+	ldrh	r3, [r3]
+	cmp	r3, r1
+	beq	.L2508
+.L2509:
+	ldr	fp, .L2533+44
+	mov	r3, #-1
+	str	r3, [sp, #8]
+.L2521:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	movs	r0, #0
+	strb	r0, [r5, #8]
+	cmp	r2, r3
+	beq	.L2510
+.L2523:
+	ldr	r3, .L2533+8
+	movw	ip, #65535
+	ldr	r0, [fp]
+	mov	lr, #36
+	ldrh	r8, [r3]
+	ldr	r3, .L2533+12
+	ldr	r3, [r3]
+	str	r3, [sp, #12]
+	ldr	r3, .L2533+16
+	ldrh	r10, [r3]
+	add	r3, r5, #16
+	str	r3, [sp, #4]
+	movs	r3, #0
+	mov	r6, r3
+.L2511:
+	uxth	r2, r3
+	cmp	r8, r2
+	bhi	.L2513
+	movs	r7, #0
+	mov	r10, #36
+	movs	r2, #0
+	mov	r1, r6
+	bl	FlashReadPages
+.L2514:
+	uxth	r3, r7
+	cmp	r6, r3
+	bhi	.L2522
+	ldr	r3, .L2533+4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ldrh	r3, [r3]
+	cmp	r3, r4
+	bhi	.L2523
+	movs	r0, #0
+	b	.L2510
+.L2513:
+	ldr	r1, [sp, #4]
+	ldrh	r2, [r1], #2
+	cmp	r2, ip
+	str	r1, [sp, #4]
+	beq	.L2512
+	mla	r1, lr, r6, r0
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r1, #4]
+	movs	r2, #0
+	str	r2, [r1, #8]
+	mul	r2, r10, r6
 	adds	r6, r6, #1
-	adds	r5, r5, #8
-	adds	r4, r4, #8
-	cmp	r6, #4
-	bne	.L2201
-	ldr	r3, .L2242+28
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #173
-	beq	.L2202
-	ldr	r3, .L2242+60
-	ldr	r0, [r3, #0]
-	bl	NandcSetDdrMode
-.L2202:
+	uxth	r6, r6
+	bic	r2, r2, #3
+	mov	r7, r2
+	ldr	r2, [sp, #12]
+	add	r7, r7, r2
+	str	r7, [r1, #12]
+.L2512:
+	adds	r3, r3, #1
+	b	.L2511
+.L2522:
+	mul	r8, r10, r7
+	ldr	r2, [fp]
+	str	r2, [sp, #20]
+	add	r3, r2, r8
+	ldr	r1, [r3, #4]
+	str	r3, [sp, #12]
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_plane
+	ldr	r2, [sp, #20]
+	ldr	r1, [sp, #4]
+	ldr	r2, [r2, r8]
+	cbnz	r2, .L2515
+	ldr	r3, [sp, #12]
+	movw	ip, #65535
+	adds	r7, r7, #1
+	ldr	r3, [r3, #12]
+	ldrh	r2, [r3]
+	cmp	r2, ip
+	bne	.L2516
+	ldr	r3, .L2533+20
+	movs	r2, #1
+	str	r2, [r3]
+.L2510:
+	ldr	r2, [sp, #16]
+	movw	r3, #65535
+	strb	r0, [r5, #6]
+	mov	r1, r4
+	strh	r4, [r5, #2]	@ movhi
+	strh	r3, [r2]	@ movhi
+	mov	r2, r0
+	mov	r0, r5
+	bl	ftl_sb_update_avl_pages
+	ldr	r0, [sp, #8]
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2516:
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2514
+.L2515:
+	mov	r2, r1
+	ldr	r0, .L2533+24
+	ldrh	r1, [r5]
+	bl	printf
+	ldr	r3, .L2533+28
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	cbnz	r3, .L2517
+	ldr	r3, .L2533+32
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2518
+.L2517:
+	ldr	r3, .L2533+36
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #119
+	bls	.L2519
+.L2518:
+	ldr	r3, [fp]
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L2520
+.L2519:
+	ldr	r3, [fp]
+	add	r3, r3, r8
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #8]
+.L2520:
+	ldr	r3, .L2533+40
+	movs	r4, #0
+	ldr	r3, [r3]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5]
+	bl	INSERT_FREE_LIST
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L2521
+.L2534:
+	.align	2
+.L2533:
+	.word	.LANCHOR233
+	.word	.LANCHOR51
+	.word	.LANCHOR36
+	.word	.LANCHOR105
+	.word	.LANCHOR57
+	.word	.LANCHOR132
+	.word	.LC46
+	.word	.LANCHOR101
+	.word	.LANCHOR8
+	.word	.LANCHOR77
+	.word	.LANCHOR82
+	.word	.LANCHOR178
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r3, .L2558
+	ldr	r3, [r3]
+	cbz	r3, .L2536
+.L2541:
+	movs	r0, #0
+.L2535:
+	add	sp, sp, #16
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2536:
+	ldr	r0, .L2558+4
+	movw	r3, #65535
+	ldr	r5, .L2558+8
+	ldrh	r6, [r0]
+	mov	r4, r0
+	cmp	r6, r3
+	beq	.L2538
+	ldr	r3, .L2558+12
+	ldrh	r1, [r3]
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #12]
+	adds	r0, r0, #1
+	beq	.L2538
+	ldr	r3, .L2558+16
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r6, lsl #1]
+	cmp	r3, #4
+	bls	.L2539
+	subs	r3, r3, #5
+	movs	r0, #1
+	strh	r3, [r2, r6, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L2539:
+	ldr	r3, [r5]
+	cbnz	r3, .L2540
+	ldr	r2, .L2558+20
+	ldr	r0, [sp, #12]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L2540:
+	movs	r3, #0
+	movs	r0, #1
+	str	r3, [r5]
+	b	.L2535
+.L2538:
+	ldrh	r2, [r4]
+	movs	r3, #0
+	str	r3, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2541
+	ldr	r6, .L2558+12
+	bl	FtlCacheWriteBack
+	ldrb	r0, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6]
+	ldr	r5, .L2558+24
+	muls	r2, r0, r2
+	ldrh	r1, [r5]
+	cmp	r1, r2
+	beq	.L2542
+	ldr	r1, .L2558+28
+	movs	r2, #163
+	ldr	r0, .L2558+32
+	bl	printf
+	ldr	r1, .L2558+36
+	ldr	r0, .L2558+40
+	bl	printf
+.L2542:
+	ldrh	r6, [r6]
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldr	r2, .L2558+44
+	ldrh	r0, [r4]
+	ldr	fp, .L2558+84
+	smulbb	r3, r3, r6
+	ldr	r1, [r2]
+	movs	r6, #0
+	str	r2, [sp, #4]
+	strh	r3, [r1, r0, lsl #1]	@ movhi
+	ldr	r1, .L2558+48
+	ldrh	r3, [r5]
+	ldr	r0, [r1]
+	add	r3, r3, r0
+	str	r3, [r1]
+.L2543:
+	ldrh	r2, [r5]
+	uxth	r3, r6
+	cmp	r2, r3
+	bhi	.L2547
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldr	r3, .L2558+52
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2548
+	ldrh	r1, [r4]
+	ldr	r0, .L2558+56
+	bl	printf
+.L2548:
+	ldr	r3, [sp, #4]
+	ldrh	r0, [r4]
+	ldr	r3, [r3]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	beq	.L2549
+	bl	INSERT_DATA_LIST
+.L2550:
+	ldr	r3, .L2558+60
+	movw	r6, #65535
+	strh	r6, [r4]	@ movhi
+	movs	r4, #0
+	strh	r4, [r5]	@ movhi
+	strh	r4, [r3]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L2558+64
+	ldrh	r2, [r3]
+	ldr	r3, .L2558+68
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	cmp	r2, r3, asr #2
+	ble	.L2541
+	ldr	r3, .L2558+72
+	movs	r2, #20
+	mov	r0, r4
+	strh	r6, [r3]	@ movhi
+	ldr	r3, .L2558+76
+	strh	r2, [r3]	@ movhi
+	b	.L2535
+.L2547:
+	uxth	r3, r6
+	movs	r7, #12
+	ldr	r2, [fp]
+	muls	r7, r3, r7
+	ldr	r3, .L2558+80
+	ldr	r8, [r3]
+	add	r10, r8, r7
+	ldr	r1, [r10, #8]
+	cmp	r1, r2
+	bcc	.L2544
+	ldr	r1, .L2558+28
+	movs	r2, #168
+	ldr	r0, .L2558+32
+	bl	printf
+	ldr	r1, .L2558+36
+	ldr	r0, .L2558+40
+	bl	printf
+.L2544:
+	movs	r2, #0
+	add	r1, sp, #12
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	ldr	r2, [sp, #12]
+	ldr	r0, [r8, r7]
+	cmp	r0, r2
+	bne	.L2545
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	movs	r2, #1
+	mov	r7, r0
+	add	r1, r10, #4
+	ldr	r0, [r10, #8]
+	bl	log2phys
+	mov	r0, r7
+.L2557:
+	bl	decrement_vpc_count
+.L2546:
+	adds	r6, r6, #1
+	b	.L2543
+.L2545:
+	ldr	r3, [r10, #4]
+	cmp	r2, r3
+	beq	.L2546
+	ldrh	r0, [r4]
+	b	.L2557
+.L2549:
+	bl	INSERT_FREE_LIST
+	b	.L2550
+.L2559:
+	.align	2
+.L2558:
+	.word	.LANCHOR75
+	.word	.LANCHOR92
+	.word	.LANCHOR132
+	.word	.LANCHOR51
+	.word	.LANCHOR77
+	.word	.LANCHOR136
+	.word	.LANCHOR110
+	.word	.LANCHOR234
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR82
+	.word	.LANCHOR159
+	.word	.LANCHOR8
+	.word	.LC47
+	.word	.LANCHOR109
+	.word	.LANCHOR87
+	.word	.LANCHOR227
+	.word	.LANCHOR201
+	.word	.LANCHOR174
+	.word	.LANCHOR111
+	.word	.LANCHOR71
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r4, .L2563
+	ldrh	r2, [r4]
+	cmp	r2, r3
+	beq	.L2561
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L2562
+.L2561:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	movs	r5, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L2563
+	strb	r5, [r4, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L2563+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2563+8
+	strh	r5, [r3]	@ movhi
+	bl	l2p_flush
+	mov	r0, r5
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L2562:
+	ldr	r0, .L2563
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L2564:
+	.align	2
+.L2563:
+	.word	.LANCHOR92
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L2582
+	ldr	r5, .L2582+4
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2566
+	ldr	r3, [r5]
+	lsls	r2, r3, #31
+	bpl	.L2566
+	ldr	r3, .L2582+8
+	ldrh	r3, [r3, #4]
+	cbz	r3, .L2566
+.L2571:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2566:
+	ldr	r4, .L2582+12
+	movs	r3, #0
+	movs	r6, #0
+	movs	r7, #36
+	mov	r2, r3
+	ldr	r1, [r5]
+	ldr	r0, [r4]
+	bl	FlashProgPages
+.L2568:
+	ldr	r1, [r5]
+	uxth	r3, r6
+	cmp	r3, r1
+	bcc	.L2570
+	ldr	r0, [r4]
+	bl	FtlGcBufFree
+	movs	r3, #0
+	str	r3, [r5]
+	ldr	r3, .L2582+8
+	ldrh	r3, [r3, #4]
+	cmp	r3, #0
+	bne	.L2571
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+	b	.L2581
+.L2570:
+	muls	r3, r7, r3
+	ldr	r2, [r4]
+	adds	r6, r6, #1
+	adds	r1, r2, r3
+	ldr	r2, [r2, r3]
+	adds	r3, r2, #1
+	bne	.L2569
+	ldr	r3, .L2582+8
+	movs	r5, #0
+	ldr	r0, .L2582+16
+	ldrh	r4, [r3]
+	ldr	r0, [r0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r2, [r3]	@ movhi
+	ldr	r2, .L2582+20
+	ldr	r0, [r1, #4]
+	ldr	r3, [r2, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [r2, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+.L2581:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2569:
+	ldr	r3, [r1, #12]
+	ldr	r1, [r1, #4]
+	ldr	r2, [r3, #8]
+	ldr	r0, [r3, #12]
+	bl	FtlGcUpdatePage
+	b	.L2568
+.L2583:
+	.align	2
+.L2582:
+	.word	.LANCHOR8
+	.word	.LANCHOR102
+	.word	.LANCHOR92
+	.word	.LANCHOR179
+	.word	.LANCHOR82
+	.word	.LANCHOR136
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
+	.align	1
+	.global	FtlGcPageRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L2586
+	ldr	r5, .L2586+4
+	ldrh	r1, [r4]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4]
+	cmp	r2, r3
+	bcc	.L2584
+	ldr	r0, .L2586+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L2586+12
+	movs	r2, #0
+	str	r2, [r3]
+.L2584:
+	pop	{r3, r4, r5, pc}
+.L2587:
+	.align	2
+.L2586:
+	.word	.LANCHOR51
+	.word	.LANCHOR92
+	.word	.LANCHOR124
+	.word	.LANCHOR132
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.align	1
+	.global	FtlPowerLostRecovery
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r5, .L2589
+	ldr	r3, .L2589+4
+	mov	r0, r5
+	str	r4, [r3]
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	ldr	r5, .L2589+8
+	bl	FtlSlcSuperblockCheck
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L2590:
+	.align	2
+.L2589:
+	.word	.LANCHOR90
+	.word	.LANCHOR231
+	.word	.LANCHOR91
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r3, #0
+	ldr	r4, .L2601
+	movw	r5, #65535
+	strh	r3, [r4]	@ movhi
+	ldr	r3, .L2601+4
+	strh	r5, [r3]	@ movhi
+	ldr	r3, .L2601+8
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L2601+12
+	ldrh	r3, [r3]
+	cmp	r3, r5
+	bne	.L2592
+.L2594:
+	mov	r6, #-1
+.L2591:
+	mov	r0, r6
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2592:
+	bl	FtlLoadSysInfo
+	mov	r6, r0
+	cmp	r0, #0
+	bne	.L2594
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L2601+16
+	movs	r0, #12
+	ldrh	r2, [r3]
+	ldr	r3, .L2601+20
+	ldr	r1, [r3]
+	mov	r3, r6
+.L2595:
+	cmp	r3, r2
+	blt	.L2597
+	ldrh	r3, [r4]
+	cmp	r3, #0
+	beq	.L2591
+.L2596:
+	ldr	r5, .L2601+24
+	ldr	r4, .L2601+28
+	mov	r0, r5
+	bl	FtlSuperblockPowerLostFix
+	mov	r0, r4
+	bl	FtlSuperblockPowerLostFix
+	ldr	r3, .L2601+32
+	ldrh	r1, [r5]
+	ldrh	r0, [r5, #4]
+	ldr	r2, [r3]
+	ldrh	r3, [r2, r1, lsl #1]
+	subs	r3, r3, r0
+	ldr	r0, .L2601+36
+	strh	r3, [r2, r1, lsl #1]	@ movhi
+	ldrh	r7, [r4, #4]
+	ldrh	r3, [r0]
+	strh	r3, [r5, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r5, #6]
+	strh	r3, [r5, #4]	@ movhi
+	ldrh	r5, [r4]
+	ldrh	r1, [r2, r5, lsl #1]
+	subs	r1, r1, r7
+	strh	r1, [r2, r5, lsl #1]	@ movhi
+	ldrh	r2, [r0]
+	ldr	r0, .L2601+40
+	strb	r3, [r4, #6]
+	strh	r2, [r4, #2]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	r0, .L2601+44
+	bl	FtlMapBlkWriteDumpData
+	ldr	r2, .L2601+48
+	ldrh	r3, [r2, #30]
+	adds	r3, r3, #1
+	strh	r3, [r2, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	b	.L2591
+.L2597:
+	mla	r5, r0, r3, r1
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	blt	.L2596
+	adds	r3, r3, #1
+	b	.L2595
+.L2602:
+	.align	2
+.L2601:
+	.word	.LANCHOR230
+	.word	.LANCHOR229
+	.word	.LANCHOR37
+	.word	.LANCHOR206
+	.word	.LANCHOR66
+	.word	.LANCHOR95
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR82
+	.word	.LANCHOR51
+	.word	.LANCHOR124
+	.word	.LANCHOR215
+	.word	.LANCHOR135
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.align	1
+	.global	rk_ftl_garbage_collect
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2693
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #32
+	ldr	r2, [r3]
+	cmp	r2, #0
+	bne	.L2655
+	ldr	r3, .L2693+4
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2655
+	ldr	r2, .L2693+8
+	ldrh	r2, [r2]
+	cmp	r2, #47
+	bls	.L2657
+	ldr	r3, .L2693+12
+	movw	r5, #65535
+	ldrh	r4, [r3]
+	cmp	r4, r5
+	beq	.L2605
+	ldr	r1, .L2693+16
+	ldrh	r2, [r1]
+	cmp	r2, r5
+	itt	eq
+	strheq	r4, [r1]	@ movhi
+	strheq	r2, [r3]	@ movhi
+.L2605:
+	cmp	r0, #0
+	bne	.L2658
+	ldr	r3, .L2693+20
+	ldrh	r3, [r3]
+	cmp	r3, #24
+	bhi	.L2659
+	ldr	r2, .L2693+24
+	cmp	r3, #16
+	ldrh	r4, [r2]
+	bls	.L2608
+	lsrs	r4, r4, #5
+.L2607:
+	ldr	r2, .L2693+28
+	ldrh	r1, [r2]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L2611
+	ldr	r3, .L2693+32
+	movw	r0, #65535
+	ldrh	r3, [r3]
+	cmp	r3, r0
+	bne	.L2612
+	ldr	r0, .L2693+16
+	ldrh	r0, [r0]
+	cmp	r0, r3
+	bne	.L2612
+	ldr	r3, .L2693+36
+	ldrh	r0, [r3]
+	cbnz	r0, .L2613
+	ldr	r3, .L2693+40
+	ldr	r4, .L2693+44
+	ldr	r3, [r3]
+	ldr	r4, [r4]
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcs	.L2614
+.L2613:
+	ldr	r3, .L2693+48
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2615:
+	ldr	r3, .L2693+52
+	movs	r2, #0
+	str	r2, [r3]
+.L2603:
+	add	sp, sp, #32
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2608:
+	cmp	r3, #12
+	bls	.L2609
+	lsrs	r4, r4, #4
+	b	.L2607
+.L2609:
+	cmp	r3, #8
+	bls	.L2607
+	lsrs	r4, r4, #2
+	b	.L2607
+.L2659:
+	movs	r4, #1
+	b	.L2607
+.L2614:
+	movs	r3, #18
+	strh	r3, [r2]	@ movhi
+	b	.L2615
+.L2612:
+	ldr	r3, .L2693+48
+	ldrh	r3, [r3]
+	add	r3, r3, r3, lsl #1
+	asrs	r3, r3, #2
+	strh	r3, [r1]	@ movhi
+.L2611:
+	ldr	r3, .L2693+56
+	ldrh	r3, [r3]
+	cbz	r3, .L2606
+	adds	r4, r4, #32
+	uxth	r4, r4
+.L2606:
+	ldr	r5, .L2693+60
+	movw	r3, #65535
+	ldrh	r2, [r5]
+	cmp	r2, r3
+	bne	.L2618
+	ldr	r3, .L2693+16
+	ldrh	r1, [r3]
+	cmp	r1, r2
+	beq	.L2619
+	ldr	r0, .L2693+64
+	ldr	r0, [r0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L2620
+	strh	r2, [r3]	@ movhi
+.L2620:
+	ldrh	r2, [r3]
+	strh	r2, [r5]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3]	@ movhi
+.L2619:
+	ldrh	r0, [r5]
+	movw	r6, #65535
+	movs	r3, #0
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L2618
+	bl	IsBlkInGcList
+	cbz	r0, .L2622
+	strh	r6, [r5]	@ movhi
+.L2622:
+	ldr	r3, .L2693+68
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2623
+	ldrh	r0, [r5]
+	bl	ftl_get_blk_mode
+	strb	r0, [r5, #8]
+.L2623:
+	ldrh	r2, [r5]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L2618
+	ldr	r0, .L2693+60
+	bl	make_superblock
+	ldr	r2, .L2693+72
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r3, [r2]	@ movhi
+	ldr	r3, .L2693+64
+	ldrh	r2, [r5]
+	ldr	r3, [r3]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L2693+76
+	strh	r2, [r3]	@ movhi
+.L2618:
+	ldr	r2, .L2693+80
+	ldrh	r3, [r5]
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2624
+	ldr	r2, .L2693+84
+	ldrh	r2, [r2]
+	cmp	r2, r3
+	beq	.L2624
+	ldr	r6, .L2693+60
+	mov	r5, r6
+.L2625:
+	ldrh	r2, [r6]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L2626
+	ldr	r10, .L2693+92
+	movs	r2, #0
+	ldr	r3, .L2693+52
+	mov	r7, r10
+	str	r2, [r3]
+.L2627:
+	ldrh	r8, [r10]
+	mov	r0, r8
+	bl	List_get_gc_head_node
+	uxth	fp, r0
+	movw	r3, #65535
+	cmp	fp, r3
+	strh	fp, [r5]	@ movhi
+	bne	.L2628
+	movs	r3, #0
+	movs	r0, #8
+	strh	r3, [r10]	@ movhi
+	b	.L2603
+.L2658:
+	movs	r4, #1
+	b	.L2606
+.L2624:
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+.L2691:
+	ldr	r3, .L2693+36
+	ldrh	r0, [r3]
+	b	.L2603
+.L2628:
+	str	r0, [sp]
+	mov	r0, fp
+	bl	IsBlkInGcList
+	add	r3, r8, #1
+	ldr	r2, [sp]
+	cbz	r0, .L2629
+	strh	r3, [r10]	@ movhi
+	b	.L2627
+.L2629:
+	ldr	r1, .L2693+24
+	uxth	r3, r3
+	ldr	lr, .L2693+96
+	uxth	r2, r2
+	ldr	r8, .L2693+64
+	ldrh	r1, [r1]
+	ldrh	lr, [lr]
+	ldr	r0, [r8]
+	strh	r3, [r10]	@ movhi
+	mul	r1, lr, r1
+	ldrh	ip, [r0, r2, lsl #1]
+	cmp	ip, r1, asr #1
+	bgt	.L2631
+	cmp	r3, #48
+	bls	.L2632
+	cmp	ip, #8
+	bls	.L2632
+	ldr	r3, .L2693+88
+	ldrh	r3, [r3]
+	cmp	r3, #35
+	bhi	.L2632
+.L2631:
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+.L2632:
+	ldrh	r3, [r0, r2, lsl #1]
+	cmp	r1, r3
+	bgt	.L2633
+	movw	r3, #65535
+	strh	r3, [r5]	@ movhi
+	movs	r3, #0
+	strh	r3, [r7]	@ movhi
+	b	.L2691
+.L2633:
+	cbnz	r3, .L2634
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2627
+.L2694:
+	.align	2
+.L2693:
+	.word	.LANCHOR75
+	.word	.LANCHOR169
+	.word	.LANCHOR84
+	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR87
+	.word	.LANCHOR51
+	.word	.LANCHOR174
+	.word	.LANCHOR92
+	.word	.LANCHOR235
+	.word	.LANCHOR71
+	.word	.LANCHOR99
+	.word	.LANCHOR227
+	.word	.LANCHOR170
+	.word	.LANCHOR114
+	.word	.LANCHOR201
+	.word	.LANCHOR82
+	.word	.LANCHOR8
+	.word	.LANCHOR236
+	.word	.LANCHOR237
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR109
+	.word	.LANCHOR176
+	.word	.LANCHOR36
+.L2634:
+	movs	r3, #0
+	strb	r3, [r5, #8]
+	ldr	r3, .L2695
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2635
+	mov	r0, fp
+	bl	ftl_get_blk_mode
+	strb	r0, [r5, #8]
+.L2635:
+	ldr	r3, .L2695+4
+	ldrh	r3, [r3]
+	cmp	r3, fp
+	bne	.L2636
+	ldr	r1, .L2695+8
+	movw	r2, #835
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2636:
+	ldr	r3, .L2695+24
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2637
+	ldr	r1, .L2695+8
+	mov	r2, #836
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2637:
+	ldr	r3, .L2695+28
+	ldrh	r2, [r5]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bne	.L2638
+	ldr	r1, .L2695+8
+	movw	r2, #837
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2638:
+	mov	r0, r6
+	bl	make_superblock
+	ldr	r2, .L2695+32
+	movs	r3, #0
+	ldrh	r1, [r5]
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r8]
+	ldrh	r1, [r2, r1, lsl #1]
+	ldr	r2, .L2695+36
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r1, [r2]	@ movhi
+.L2626:
+	ldr	r3, .L2695+40
+	movs	r2, #1
+	str	r2, [r3]
+	ldr	r3, .L2695+44
+	ldrh	r3, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, .L2695
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2639
+	ldrb	r3, [r5, #8]	@ zero_extendqisi2
+	cmp	r3, r2
+	ittt	eq
+	ldreq	r3, .L2695+48
+	ldrheq	r3, [r3]
+	streq	r3, [sp, #4]
+.L2639:
+	ldrh	r3, [r5, #2]
+	ldr	r1, [sp, #4]
+	ldr	fp, .L2695+80
+	adds	r2, r3, r4
+	cmp	r2, r1
+	itt	gt
+	movgt	r2, r1
+	subgt	r4, r2, r3
+	mov	r3, #0
+	it	gt
+	uxthgt	r4, r4
+	str	r3, [sp, #12]
+.L2641:
+	ldrh	r3, [sp, #12]
+	cmp	r4, r3
+	bls	.L2649
+	ldr	r3, .L2695+52
+	movw	r8, #65535
+	ldrh	lr, [r6, #2]
+	mov	r10, #36
+	ldr	r0, [fp]
+	ldrh	r7, [r3]
+	ldr	r3, [sp, #12]
+	add	lr, lr, r3
+	ldr	r3, .L2695+56
+	str	r3, [sp, #8]
+	movs	r3, #0
+	str	r3, [sp]
+	b	.L2650
+.L2643:
+	ldr	r1, [sp, #8]
+	ldrh	r2, [r1, #2]!
+	cmp	r2, r8
+	str	r1, [sp, #8]
+	beq	.L2642
+	ldr	r1, [sp]
+	orr	r2, lr, r2, lsl #10
+	mla	ip, r10, r1, r0
+	str	r2, [ip, #4]
+	mov	r2, r1
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r2, [sp]
+.L2642:
+	adds	r3, r3, #1
+.L2650:
+	uxth	r2, r3
+	cmp	r2, r7
+	bcc	.L2643
+	ldrb	r2, [r6, #8]	@ zero_extendqisi2
+	ldr	r1, [sp]
+	bl	FlashReadPages
+	movs	r3, #0
+.L2690:
+	str	r3, [sp, #8]
+	ldr	r2, [sp]
+	ldrh	r3, [sp, #8]
+	cmp	r2, r3
+	bhi	.L2648
+	ldr	r3, [sp, #12]
+	adds	r3, r3, #1
+	str	r3, [sp, #12]
+	b	.L2641
+.L2648:
+	ldr	r3, [sp, #8]
+	movs	r7, #36
+	muls	r7, r3, r7
+	ldr	r3, [fp]
+	adds	r2, r3, r7
+	ldr	r3, [r3, r7]
+	adds	r3, r3, #1
+	beq	.L2645
+	ldr	r8, [r2, #12]
+	movw	r3, #61589
+	ldrh	r2, [r8]
+	cmp	r2, r3
+	bne	.L2645
+	ldr	r10, [r8, #8]
+	cmp	r10, #-1
+	bne	.L2646
+	ldr	r1, .L2695+8
+	mov	r2, #876
+	ldr	r0, .L2695+12
+	bl	printf
+	ldr	r1, .L2695+16
+	ldr	r0, .L2695+20
+	bl	printf
+.L2646:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r10
+	bl	log2phys
+	ldr	r0, [fp]
+	ldr	r3, [sp, #28]
+	add	r0, r0, r7
+	ldr	r2, [r0, #4]
+	bic	r3, r3, #-2147483648
+	cmp	r3, r2
+	bne	.L2645
+	ldr	r2, .L2695+32
+	ldr	r1, .L2695+60
+	ldr	r10, .L2695+68
+	ldrh	r3, [r2]
+	str	r1, [sp, #20]
+	adds	r3, r3, #1
+	strh	r3, [r2]	@ movhi
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	mla	r3, r1, r3, r2
+	ldr	r2, [r0, #16]
+	str	r2, [r3, #16]
+	str	r3, [sp, #16]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #20]
+	str	r0, [r3, #4]
+	ldr	r2, [r1]
+	movs	r1, #36
+	ldr	r3, [r10]
+	ldr	r0, [fp]
+	mla	r2, r1, r3, r2
+	add	r0, r0, r7
+	ldr	r7, .L2695+28
+	ldr	r1, [r0, #8]
+	adds	r3, r3, #1
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #28]
+	str	r2, [r8, #12]
+	ldrh	r2, [r7]
+	strh	r2, [r8, #2]	@ movhi
+	ldr	r2, .L2695+64
+	str	r3, [r10]
+	ldr	r2, [r2]
+	str	r2, [r8, #4]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L2695
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbnz	r3, .L2647
+	ldrb	r2, [r7, #7]	@ zero_extendqisi2
+	ldr	r3, [r10]
+	cmp	r2, r3
+	beq	.L2647
+	ldrh	r3, [r7, #4]
+	cbnz	r3, .L2645
+.L2647:
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L2645
+.L2692:
+	ldr	r3, .L2695+40
+	movs	r2, #0
+	str	r2, [r3]
+	b	.L2691
+.L2645:
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	b	.L2690
+.L2649:
+	ldrh	r3, [r6, #2]
+	add	r4, r4, r3
+	ldr	r3, [sp, #4]
+	uxth	r4, r4
+	cmp	r3, r4
+	strh	r4, [r6, #2]	@ movhi
+	bhi	.L2651
+	ldr	r3, .L2695+68
+	ldr	r3, [r3]
+	cbz	r3, .L2652
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	bne	.L2692
+.L2652:
+	ldr	r3, .L2695+32
+	ldrh	r1, [r3]
+	cbnz	r1, .L2653
+	ldr	r3, .L2695+72
+	ldrh	r2, [r6]
+	ldr	r3, [r3]
+	ldrh	r0, [r3, r2, lsl #1]
+	cbz	r0, .L2653
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r6]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L2653:
+	movw	r3, #65535
+	strh	r3, [r6]	@ movhi
+.L2651:
+	ldr	r3, .L2695+76
+	ldrh	r0, [r3]
+	cmp	r0, #2
+	bhi	.L2654
+	ldr	r3, .L2695+44
+	ldrh	r4, [r3]
+	b	.L2625
+.L2654:
+	ldr	r3, .L2695+40
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3]
+	b	.L2603
+.L2655:
+	movs	r0, #0
+	b	.L2603
+.L2657:
+	mov	r0, r3
+	b	.L2603
+.L2696:
+	.align	2
+.L2695:
+	.word	.LANCHOR8
+	.word	.LANCHOR90
+	.word	.LANCHOR238
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR236
+	.word	.LANCHOR237
+	.word	.LANCHOR169
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR36
+	.word	.LANCHOR201+14
+	.word	.LANCHOR179
+	.word	.LANCHOR158
+	.word	.LANCHOR102
+	.word	.LANCHOR82
+	.word	.LANCHOR87
+	.word	.LANCHOR106
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.FtlInit,"ax",%progbits
+	.align	1
+	.global	FtlInit
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r3, #-1
+	ldr	r4, .L2706
+	mov	r5, r0
+	ldr	r2, .L2706+4
+	str	r3, [r4]
+	movs	r3, #0
+	ldr	r1, .L2706+8
+	str	r3, [r2]
+	ldr	r2, .L2706+12
+	ldr	r0, .L2706+16
+	str	r3, [r2]
+	bl	printf
+	mov	r0, r5
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L2706+20
+	ldrh	r0, [r3]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2698
+	ldr	r1, .L2706+24
+	ldr	r0, .L2706+28
+.L2705:
+	bl	printf
+.L2699:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L2698:
+	bl	FtlSysBlkInit
+	cbz	r0, .L2700
+	ldr	r1, .L2706+24
+	ldr	r0, .L2706+32
+	b	.L2705
+.L2700:
+	movs	r1, #1
+	str	r1, [r4]
+	bl	rk_ftl_garbage_collect
+	ldr	r3, .L2706+36
+	ldrh	r3, [r3]
+	cmp	r3, #15
+	bhi	.L2699
+	mov	r4, #1024
+.L2702:
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L2702
+	b	.L2699
+.L2707:
+	.align	2
+.L2706:
+	.word	.LANCHOR223
+	.word	.LANCHOR239
+	.word	.LC48
+	.word	.LANCHOR75
+	.word	.LC6
+	.word	.LANCHOR37
+	.word	.LANCHOR240
+	.word	.LC49
+	.word	.LC50
+	.word	.LANCHOR87
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	FlashInit
+	mov	r4, r0
+	cbnz	r0, .L2709
+	ldr	r0, .L2710
+	bl	FtlInit
+.L2709:
+	mov	r1, r4
+	ldr	r0, .L2710+4
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2711:
+	.align	2
+.L2710:
+	.word	.LANCHOR15
+	.word	.LC51
+	.size	rk_ftl_init, .-rk_ftl_init
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+	.align	1
+	.global	ftl_fix_nand_power_lost_error
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2726
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L2712
+	ldr	r7, .L2726+4
+	ldr	r6, .L2726+8
+	ldr	r10, .L2726+32
+	ldrh	r5, [r7]
+	ldr	r3, [r6]
+	ldr	r4, .L2726+12
+	mov	r1, r5
+	ldr	r0, .L2726+16
+	ldrh	r2, [r3, r5, lsl #1]
+	lsl	r8, r5, #1
+	bl	printf
+	ldrh	r0, [r10]
+	bl	FtlGcRefreshBlock
+	ldrh	r0, [r4]
+	bl	FtlGcRefreshBlock
+	mov	r0, r10
+	bl	allocate_new_data_superblock
+	mov	r0, r4
+	movw	r4, #4097
+	bl	allocate_new_data_superblock
+	str	r7, [sp, #4]
+.L2714:
+	subs	r4, r4, #1
+	beq	.L2718
+	movs	r1, #1
+	mov	r0, r1
+	bl	rk_ftl_garbage_collect
+	ldr	r3, [r6]
+	ldrh	r3, [r3, r8]
+	cmp	r3, #0
+	bne	.L2714
+.L2718:
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2726+16
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	ldr	r3, [r6]
+	ldrh	r4, [r3, r5, lsl #1]
+	cbnz	r4, .L2716
+	add	r0, sp, #56
+	ldr	r7, .L2726+20
+	strh	r5, [r0, #-48]!	@ movhi
+	movw	r10, #65535
+	bl	make_superblock
+	ldr	r3, .L2726+24
+	add	r0, sp, #22
+	ldr	r8, [r7]
+	mov	r2, r4
+	mov	fp, #36
+	mov	ip, r4
+	ldrh	lr, [r3]
+.L2719:
+	uxth	r3, r2
+	cmp	lr, r3
+	bhi	.L2721
+	ldr	r3, [r6]
+	mov	r1, r5
+	ldr	r0, .L2726+28
+	ldrh	r2, [r3, r5, lsl #1]
+	bl	printf
+	mov	r2, r4
+	movs	r1, #0
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+	mov	r2, r4
+	movs	r1, #1
+	ldr	r0, [r7]
+	bl	FlashEraseBlocks
+.L2716:
+	ldr	r2, [sp, #4]
+	movw	r3, #65535
+	strh	r3, [r2]	@ movhi
+.L2712:
+	add	sp, sp, #56
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2721:
+	ldrh	r3, [r0, #2]!
+	cmp	r3, r10
+	beq	.L2720
+	mla	r1, fp, r4, r8
+	adds	r4, r4, #1
+	lsls	r3, r3, #10
+	uxth	r4, r4
+	str	r3, [r1, #4]
+	str	ip, [r1, #8]
+	str	ip, [r1, #12]
+.L2720:
+	adds	r2, r2, #1
+	b	.L2719
+.L2727:
+	.align	2
+.L2726:
+	.word	.LANCHOR8
+	.word	.LANCHOR229
+	.word	.LANCHOR82
+	.word	.LANCHOR91
+	.word	.LC52
+	.word	.LANCHOR76
+	.word	.LANCHOR36
+	.word	.LC53
+	.word	.LANCHOR90
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #16
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #64
+	mov	r6, r1
+	mov	r7, r3
+	str	r2, [sp, #28]
+	bne	.L2729
+	mov	r2, r3
+	ldr	r1, [sp, #28]
+	add	r0, r6, #256
+	bl	FtlVendorPartRead
+	str	r0, [sp, #8]
+.L2728:
+	ldr	r0, [sp, #8]
+	add	sp, sp, #64
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2729:
+	ldr	r3, [sp, #28]
+	adds	r3, r1, r3
+	str	r3, [sp, #12]
+	ldr	r3, .L2766
+	ldr	r2, [sp, #12]
+	ldr	r3, [r3]
+	cmp	r2, r3
+	bhi	.L2751
+	ldr	r3, .L2766+4
+	ldr	r3, [r3]
+	adds	r4, r3, #1
+	beq	.L2752
+	bl	FtlCacheWriteBack
+	ldr	r3, .L2766+8
+	mov	r0, r6
+	ldr	r8, .L2766+48
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #12]
+	mov	r1, r4
+	str	r0, [sp, #16]
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, .L2766+12
+	ldr	r4, [sp, #16]
+	rsb	r3, r3, #1
+	str	r0, [sp, #20]
+	add	r3, r3, r0
+	str	r3, [sp, #4]
+	ldr	r1, [sp, #4]
+	ldr	r3, [r2]
+	add	r3, r3, r1
+	str	r3, [r2]
+	movs	r3, #0
+	mov	r5, r3
+	str	r3, [sp]
+	str	r3, [sp, #24]
+	str	r3, [sp, #8]
+.L2731:
+	ldr	r3, [sp, #4]
+	cbnz	r3, .L2750
+	ldr	r3, .L2766+16
+	ldrh	r3, [r3]
+	cmp	r3, #0
+	beq	.L2728
+	movs	r1, #1
+	ldr	r0, [sp, #4]
+	bl	rk_ftl_garbage_collect
+	b	.L2728
+.L2750:
+	movs	r2, #0
+	add	r1, sp, #60
+	mov	r0, r4
+	bl	log2phys
+	ldr	r3, [sp, #60]
+	adds	r0, r3, #1
+	bne	.L2732
+	ldr	fp, .L2766+8
+	mov	r10, #0
+.L2733:
+	ldrh	r0, [fp]
+	cmp	r10, r0
+	bcc	.L2735
+.L2736:
+	ldr	r3, [sp, #4]
+	adds	r4, r4, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #4]
+	beq	.L2740
+	ldr	r3, .L2766+20
+	ldrh	r3, [r3]
+	cmp	r5, r3, lsl #2
+	bne	.L2731
+.L2740:
+	cmp	r5, #0
+	beq	.L2731
+	movs	r2, #0
+	mov	r1, r5
+	ldr	r0, [r8]
+	mov	r10, #0
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	lsls	r3, r3, #9
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #32]
+	lsls	r3, r3, #9
+	str	r3, [sp, #36]
+	ldr	r3, [sp, #24]
+	lsls	r3, r3, #9
+	str	r3, [sp, #40]
+.L2749:
+	mov	fp, #36
+	ldr	r3, [r8]
+	mul	fp, fp, r10
+	ldr	r1, [sp, #16]
+	add	r3, r3, fp
+	ldr	r2, [r3, #16]
+	cmp	r1, r2
+	bne	.L2742
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2766+24
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2743
+	ldr	r3, [sp, #36]
+	mov	r0, r7
+	ldr	r2, [sp, #40]
+	add	r1, r1, r3
+.L2765:
+	bl	ftl_memcpy
+.L2743:
+	ldr	r3, [r8]
+	add	r2, r3, fp
+	ldr	r3, [r3, fp]
+	adds	r1, r3, #1
+	bne	.L2744
+	ldr	r1, .L2766+28
+	str	r3, [sp, #8]
+	ldr	r2, [r1, #72]
+	adds	r2, r2, #1
+	str	r2, [r1, #72]
+.L2745:
+	add	r10, r10, #1
+	cmp	r5, r10
+	bne	.L2749
+	movs	r5, #0
+	b	.L2731
+.L2735:
+	mla	r0, r0, r4, r10
+	cmp	r6, r0
+	bhi	.L2734
+	ldr	r3, [sp, #12]
+	cmp	r3, r0
+	bls	.L2734
+	subs	r0, r0, r6
+	mov	r2, #512
+	movs	r1, #0
+	add	r0, r7, r0, lsl #9
+	bl	ftl_memset
+.L2734:
+	add	r10, r10, #1
+	b	.L2733
+.L2732:
+	ldr	r2, [r8]
+	mov	r10, #36
+	mla	r10, r10, r5, r2
+	str	r3, [r10, #4]
+	ldr	r3, [sp, #16]
+	cmp	r4, r3
+	ldr	r3, .L2766+8
+	bne	.L2737
+	ldr	r2, .L2766+24
+	mov	r0, r6
+	ldrh	fp, [r3]
+	ldr	r2, [r2]
+	mov	r1, fp
+	str	r2, [r10, #8]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #28]
+	sub	r3, fp, r1
+	str	r1, [sp, #32]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	cmp	fp, r3
+	str	r3, [sp, #24]
+	bne	.L2738
+	str	r7, [r10, #8]
+.L2738:
+	ldr	r3, .L2766+32
+	ldr	r2, .L2766+36
+	str	r4, [r10, #16]
+	ldrh	r3, [r3]
+	ldr	r2, [r2]
+	muls	r3, r5, r3
+	adds	r5, r5, #1
+	bic	r3, r3, #3
+	add	r3, r3, r2
+	str	r3, [r10, #12]
+	b	.L2736
+.L2737:
+	ldr	r2, [sp, #20]
+	cmp	r4, r2
+	bne	.L2739
+	ldr	r2, .L2766+40
+	ldr	r1, [sp, #12]
+	ldr	r2, [r2]
+	str	r2, [r10, #8]
+	ldrh	r2, [r3]
+	mul	r3, r2, r4
+	subs	r1, r1, r3
+	cmp	r2, r1
+	str	r1, [sp]
+	bne	.L2738
+.L2764:
+	subs	r3, r3, r6
+	add	r3, r7, r3, lsl #9
+	str	r3, [r10, #8]
+	b	.L2738
+.L2739:
+	ldrh	r3, [r3]
+	muls	r3, r4, r3
+	b	.L2764
+.L2742:
+	ldr	r1, [sp, #20]
+	cmp	r1, r2
+	bne	.L2743
+	ldr	r1, [r3, #8]
+	ldr	r3, .L2766+40
+	ldr	r3, [r3]
+	cmp	r1, r3
+	bne	.L2743
+	ldr	r3, .L2766+8
+	ldr	r2, [sp, #44]
+	ldrh	r0, [r3]
+	ldr	r3, [sp, #20]
+	muls	r0, r3, r0
+	subs	r0, r0, r6
+	add	r0, r7, r0, lsl #9
+	b	.L2765
+.L2744:
+	cmp	r3, #256
+	bne	.L2745
+	ldr	r0, [r2, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	mov	fp, r0
+	bl	FtlGcRefreshBlock
+	ldr	r2, .L2766+44
+	movw	r3, #2049
+.L2747:
+	subs	r3, r3, #1
+	bne	.L2746
+.L2748:
+	bl	FtlSysFlush
+	b	.L2745
+.L2746:
+	movs	r1, #1
+	str	r2, [sp, #52]
+	mov	r0, r1
+	str	r3, [sp, #48]
+	bl	rk_ftl_garbage_collect
+	ldr	r2, [sp, #52]
+	ldr	r3, [sp, #48]
+	ldrh	r1, [r2]
+	cmp	r1, fp
+	beq	.L2747
+	b	.L2748
+.L2751:
+	mov	r3, #-1
+.L2752:
+	str	r3, [sp, #8]
+	b	.L2728
+.L2767:
+	.align	2
+.L2766:
+	.word	.LANCHOR67
+	.word	.LANCHOR223
+	.word	.LANCHOR54
+	.word	.LANCHOR164
+	.word	.LANCHOR114
+	.word	.LANCHOR36
+	.word	.LANCHOR183
+	.word	.LANCHOR136
+	.word	.LANCHOR57
+	.word	.LANCHOR186
+	.word	.LANCHOR184
+	.word	.LANCHOR201
+	.word	.LANCHOR178
+	.size	ftl_read, .-ftl_read
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r0, #16
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #80
+	mov	r7, r1
+	str	r2, [sp, #12]
+	str	r3, [sp, #4]
+	bne	.L2769
+	mov	r2, r3
+	ldr	r1, [sp, #12]
+	add	r0, r7, #256
+	bl	FtlVendorPartWrite
+.L2768:
+	add	sp, sp, #80
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2769:
+	ldr	r3, [sp, #12]
+	adds	r5, r1, r3
+	ldr	r3, .L2823
+	ldr	r3, [r3]
+	cmp	r5, r3
+	bhi	.L2803
+	ldr	r3, .L2823+4
+	ldr	r0, [r3]
+	adds	r4, r0, #1
+	beq	.L2768
+	ldr	r3, .L2823+8
+	mov	r2, #2048
+	mov	r0, r7
+	str	r2, [r3]
+	ldr	r3, .L2823+12
+	ldrh	r4, [r3]
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mov	r10, r0
+	subs	r0, r5, #1
+	bl	__aeabi_uidiv
+	ldr	r2, .L2823+16
+	sub	r5, r0, r10
+	adds	r3, r5, #1
+	adds	r1, r5, #1
+	str	r3, [sp, #8]
+	ldr	r3, [r2]
+	str	r0, [sp, #20]
+	add	r3, r3, r1
+	str	r3, [r2]
+	ldr	r3, .L2823+20
+	ldr	r8, [r3]
+	cmp	r8, #0
+	beq	.L2771
+	ldr	r3, [r8, #16]
+	cmp	r10, r3
+	beq	.L2772
+	bl	FtlCacheWriteBack
+.L2771:
+	ldr	r5, .L2823+24
+	mov	r4, r10
+.L2773:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	beq	.L2802
+	ldr	r6, .L2823+28
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2774
+	ldr	r1, .L2823+32
+	movw	r2, #1630
+	ldr	r0, .L2823+36
+	bl	printf
+	ldr	r1, .L2823+40
+	ldr	r0, .L2823+44
+	bl	printf
+.L2774:
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L2775
+	bl	FtlCacheWriteBack
+	mov	r0, r5
+	bl	allocate_new_data_superblock
+.L2775:
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	ldrh	r2, [r5, #4]
+	lsls	r3, r3, #2
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldr	r2, [sp, #8]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	str	r3, [sp, #36]
+	ldrh	r3, [r6]
+	cmp	r2, r3
+	bcc	.L2776
+	ldr	r1, .L2823+32
+	movw	r2, #1663
+	ldr	r0, .L2823+36
+	bl	printf
+	ldr	r1, .L2823+40
+	ldr	r0, .L2823+44
+	bl	printf
+.L2776:
+	mov	r8, #0
+.L2777:
+	ldr	r3, [sp, #36]
+	cmp	r8, r3
+	bne	.L2798
+.L2778:
+	ldr	r3, .L2823+20
+	ldr	r3, [r3]
+	cmp	r3, #0
+	beq	.L2799
+	ldr	r3, [sp, #8]
+	subs	r8, r8, #1
+	add	r3, r3, #-1
+	str	r3, [sp, #8]
+	bne	.L2799
+.L2802:
+	ldr	r3, [sp, #20]
+	movs	r0, #0
+	sub	r1, r3, r10
+	bl	rk_ftl_garbage_collect
+	movs	r0, #0
+	b	.L2768
+.L2772:
+	ldr	r2, .L2823+48
+	mov	r1, r4
+	mov	r0, r7
+	ldr	r3, [r2]
+	adds	r3, r3, #1
+	str	r3, [r2]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	subs	r4, r4, r1
+	ldr	r0, [r8, #8]
+	mov	r3, r1
+	ldr	r1, [sp, #4]
+	cmp	r4, r2
+	it	cs
+	movcs	r4, r2
+	lsls	r6, r4, #9
+	add	r0, r0, r3, lsl #9
+	mov	r2, r6
+	bl	ftl_memcpy
+	cmp	r5, #0
+	beq	.L2805
+	ldr	r3, [sp, #12]
+	add	r7, r7, r4
+	add	r10, r10, #1
+	subs	r3, r3, r4
+	str	r3, [sp, #12]
+	ldr	r3, [sp, #4]
+	add	r3, r3, r6
+	str	r3, [sp, #4]
+	bl	FtlCacheWriteBack
+	str	r5, [sp, #8]
+	b	.L2771
+.L2798:
+	ldrh	r3, [r5, #4]
+	cmp	r3, #0
+	beq	.L2778
+	movs	r2, #0
+	add	r1, sp, #40
+	mov	r0, r4
+	movs	r6, #36
+	bl	log2phys
+	mov	r0, r5
+	mul	r6, r6, r8
+	bl	get_new_active_ppa
+	ldr	r3, .L2823+52
+	ldr	r2, .L2823+56
+	ldr	r1, [r3]
+	ldrh	r2, [r2]
+	str	r3, [sp, #16]
+	add	r1, r1, r6
+	str	r0, [r1, #4]
+	mul	r0, r2, r8
+	str	r4, [r1, #16]
+	bic	r3, r0, #3
+	ldr	r0, .L2823+60
+	str	r3, [sp, #28]
+	ldr	r3, [r0]
+	ldr	r0, [sp, #28]
+	str	r3, [sp, #32]
+	add	fp, r3, r0
+	str	fp, [r1, #12]
+	mov	r0, fp
 	movs	r1, #0
-	mov	r2, #852
-	ldr	r0, .L2242+64
-	bl	memset
-	ldr	r2, .L2242+68
-	ldr	r3, .L2242+72
-	str	r2, [r3, #0]
-	movs	r2, #0
-	ldr	r3, .L2242+76
-	strb	r2, [r3, #0]
-	ldr	r2, .L2242+28
-	ldrb	r3, [r2, #1]	@ zero_extendqisi2
-	cmp	r3, #161
-	beq	.L2203
-	cmp	r3, #241
-	beq	.L2203
-	cmp	r3, #218
-	beq	.L2203
-	cmp	r3, #220
-	bne	.L2204
-	ldrb	r2, [r2, #3]	@ zero_extendqisi2
-	cmp	r2, #149
-	bne	.L2204
-.L2203:
-	ldr	r2, .L2242+48
-	movs	r1, #1
-	ldr	r0, .L2242+28
-	strb	r1, [r2, #0]
-	movs	r2, #16
-	ldr	r1, .L2242+20
-	ldrb	r4, [r0, #0]	@ zero_extendqisi2
-	strb	r2, [r1, #0]
-	cmp	r4, #152
-	ldr	r1, .L2242+52
-	strb	r2, [r1, #0]
-	ldr	r2, .L2242+80
-	strb	r4, [r2, #1]
-	strb	r3, [r2, #2]
-	bne	.L2205
-	ldrsb	r0, [r0, #4]
-	cmp	r0, #0
-	blt	.L2205
-	movs	r0, #24
-	strb	r0, [r1, #0]
-.L2205:
-	cmp	r3, #218
-	bne	.L2206
-	mov	r1, #2048
-	b	.L2240
-.L2243:
+	bl	ftl_memset
+	cmp	r4, r10
+	ldr	r1, .L2823+12
+	beq	.L2779
+	ldr	r3, [sp, #20]
+	cmp	r4, r3
+	ldr	r3, [sp, #16]
+	bne	.L2818
+	ldr	r3, [sp, #12]
+	adds	r2, r7, r3
+	ldrh	r3, [r1]
+	smulbb	r3, r3, r4
+	subs	r2, r2, r3
+	uxth	r3, r2
+	str	r3, [sp, #16]
+	movs	r3, #0
+	str	r3, [sp, #24]
+	b	.L2782
+.L2779:
+	ldrh	r2, [r1]
+	mov	r0, r7
+	mov	r1, r2
+	str	r2, [sp, #16]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #16]
+	str	r1, [sp, #24]
+	subs	r2, r2, r1
+	ldr	r1, [sp, #12]
+	mov	r3, r2
+	cmp	r2, r1
+	it	cs
+	movcs	r3, r1
+	str	r3, [sp, #16]
+.L2782:
+	ldr	r3, .L2823+12
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	ldr	r3, .L2823+52
+	ldr	r3, [r3]
+	bne	.L2783
+	cmp	r4, r10
+	add	r6, r6, r3
+	bne	.L2784
+	ldr	r3, [sp, #4]
+.L2821:
+	str	r3, [r6, #8]
+	b	.L2785
+.L2784:
+	ldr	r2, [sp, #16]
+	ldr	r3, [sp, #4]
+	muls	r2, r4, r2
+	subs	r2, r2, r7
+	add	r2, r3, r2, lsl #9
+	str	r2, [r6, #8]
+.L2785:
+	ldr	r3, .L2823+28
+	ldrb	r2, [r5, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3]
+	cmp	r2, r3
+	bcc	.L2795
+	ldr	r1, .L2823+32
+	movw	r2, #1737
+	ldr	r0, .L2823+36
+	bl	printf
+	ldr	r1, .L2823+40
+	ldr	r0, .L2823+44
+	bl	printf
+.L2795:
+	ldr	r2, [sp, #32]
+	movw	r3, #61589
+	ldr	r1, [sp, #28]
+	add	r8, r8, #1
+	strh	r3, [r2, r1]	@ movhi
+	ldr	r2, .L2823+64
+	str	r4, [fp, #8]
+	adds	r4, r4, #1
+	ldr	r3, [r2]
+	str	r3, [fp, #4]
+	adds	r3, r3, #1
+	adds	r1, r3, #1
+	it	eq
+	moveq	r3, #0
+	str	r3, [r2]
+	ldr	r3, [sp, #40]
+	str	r3, [fp, #12]
+	ldrh	r3, [r5]
+	strh	r3, [fp, #2]	@ movhi
+	b	.L2777
+.L2824:
 	.align	2
-.L2242:
-	.word	.LANCHOR146
-	.word	.LANCHOR143
+.L2823:
+	.word	.LANCHOR67
+	.word	.LANCHOR223
 	.word	.LANCHOR241
-	.word	.LANCHOR204
-	.word	.LANCHOR205
-	.word	.LANCHOR1
-	.word	.LANCHOR151
-	.word	.LANCHOR22
-	.word	.LANCHOR148
-	.word	.LANCHOR2
-	.word	.LANCHOR35
-	.word	.LANCHOR152
-	.word	.LANCHOR0
-	.word	.LANCHOR147
-	.word	.LC53
-	.word	.LANCHOR192
-	.word	.LANCHOR31
-	.word	.LANCHOR18
-	.word	.LANCHOR23
-	.word	.LANCHOR4
-	.word	.LANCHOR243
-	.word	.LANCHOR5
-.L2206:
-	cmp	r3, #220
-	bne	.L2207
-	mov	r1, #4096
-.L2240:
-	strh	r1, [r2, #14]	@ movhi
-	strb	r3, [r2, #2]
-.L2207:
-	ldr	r1, .L2244
-	movs	r2, #32
-	ldr	r0, .L2244+4
-	bl	memcpy
-	ldr	r0, .L2244+8
-	ldr	r1, .L2244+12
-	movs	r2, #32
-	bl	memcpy
-.L2204:
-	ldr	r3, .L2244+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #0
-	bne	.L2208
-	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L2209
-	ldr	r3, .L2244+20
-	ldr	r4, .L2244+24
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, #16]
-	ubfx	r0, r0, #8, #3
-	strb	r0, [r4, #0]
-	lsls	r2, r0, #31
-	bmi	.L2209
-	ldr	r3, .L2244+28
-	movs	r2, #1
-	strb	r2, [r3, #0]
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-.L2209:
-	ldr	r4, .L2244+20
-	ldr	r3, [r4, #0]
-	ldrb	r2, [r3, #26]	@ zero_extendqisi2
-	ldr	r3, .L2244+32
-	strb	r2, [r3, #0]
-	bl	FlashLoadPhyInfo
-	cmp	r0, #0
-	beq	.L2208
-	ldr	r3, [r4, #0]
-	ldr	r0, .L2244+36
-	ldrh	r1, [r3, #14]
+	.word	.LANCHOR54
+	.word	.LANCHOR160
+	.word	.LANCHOR129
+	.word	.LANCHOR90
+	.word	.LANCHOR36
+	.word	.LANCHOR242
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR162
+	.word	.LANCHOR180
+	.word	.LANCHOR57
+	.word	.LANCHOR186
+	.word	.LANCHOR158
+.L2783:
+	cmp	r4, r10
+	add	r3, r3, r6
+	ite	eq
+	ldreq	r2, .L2825
+	ldrne	r2, .L2825+4
+	ldr	r2, [r2]
+	str	r2, [r3, #8]
+	ldr	r2, [sp, #40]
+	ldr	r3, .L2825+8
+	adds	r0, r2, #1
+	beq	.L2788
+	ldr	r3, [r3]
+	movs	r1, #1
+	str	r2, [sp, #48]
+	add	r0, sp, #44
+	str	r4, [sp, #60]
+	add	r3, r3, r6
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #52]
+	movs	r2, #0
+	str	r3, [sp, #56]
+	bl	FlashReadPages
+	ldr	r3, [sp, #44]
+	adds	r3, r3, #1
+	bne	.L2789
+	ldr	r2, .L2825+12
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+.L2792:
+	ldr	r2, [sp, #16]
+	cmp	r4, r10
+	ldr	r3, .L2825+8
+	lsl	r2, r2, #9
+	bne	.L2793
+	ldr	r1, [r3]
+	str	r3, [sp, #16]
+	ldr	r3, [sp, #24]
+	add	r1, r1, r6
+	ldr	r0, [r1, #8]
+	ldr	r1, [sp, #4]
+	add	r0, r0, r3, lsl #9
+.L2820:
+	bl	ftl_memcpy
+	ldr	r2, [sp, #20]
+	ldr	r3, [sp, #16]
+	cmp	r4, r2
+	bne	.L2785
+	ldrh	r2, [r5, #4]
+	cmp	r2, #0
+	beq	.L2785
+	ldr	r3, [r3]
+	add	r6, r6, r3
+	ldr	r3, .L2825+16
+	str	r6, [r3]
+	ldr	r3, .L2825+20
+	str	r5, [r3]
+	b	.L2785
+.L2789:
+	ldr	r1, [fp, #8]
+	cmp	r4, r1
+	beq	.L2791
+	ldr	r2, .L2825+12
+	ldr	r0, .L2825+24
+	ldr	r3, [r2, #72]
+	adds	r3, r3, #1
+	str	r3, [r2, #72]
+	mov	r2, r4
 	bl	printf
-	bl	FlashLoadPhyInfoInRam
-	adds	r3, r0, #1
-	beq	.L2199
-	bl	FlashDieInfoInit
-	ldr	r3, [r4, #0]
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	bl	FlashGetReadRetryDefault
-	ldr	r1, .L2244+40
-	ldr	r3, [r4, #0]
-	ldrh	r1, [r1, #0]
-	ldrb	r2, [r3, #9]	@ zero_extendqisi2
-	addw	r1, r1, #4095
-	cmp	r2, r1, lsr #12
-	blt	.L2210
-	ldrh	r1, [r3, #14]
-	adds	r1, r1, #255
-	cmp	r2, r1, lsr #8
-	bge	.L2211
-.L2210:
-	ldrh	r2, [r3, #14]
-	bic	r2, r2, #255
-	strh	r2, [r3, #14]	@ movhi
-.L2211:
-	ldr	r3, .L2244+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L2212
-	bl	FlashSavePhyInfo
-	ldr	r3, .L2244+44
+.L2791:
+	ldr	r3, [fp, #8]
+	cmp	r4, r3
+	beq	.L2792
+	movw	r2, #1716
+	ldr	r1, .L2825+28
+	ldr	r0, .L2825+32
+	bl	printf
+	ldr	r1, .L2825+36
+	ldr	r0, .L2825+40
+	bl	printf
+	b	.L2792
+.L2788:
+	ldr	r3, [r3]
+	movs	r1, #0
+	ldr	r2, .L2825+44
+	add	r3, r3, r6
+	ldrh	r2, [r2]
+	ldr	r0, [r3, #8]
+	bl	ftl_memset
+	b	.L2792
+.L2793:
+	ldr	r1, .L2825+48
+	ldr	r0, [r3]
+	str	r3, [sp, #16]
+	ldrh	r1, [r1]
+	ldr	r3, [sp, #4]
+	add	r0, r0, r6
+	ldr	r0, [r0, #8]
+	muls	r1, r4, r1
+	subs	r1, r1, r7
+	add	r1, r3, r1, lsl #9
+	b	.L2820
+.L2818:
+	ldr	r3, [r3]
+	ldr	r2, [sp, #4]
+	add	r6, r6, r3
+	ldrh	r3, [r1]
+	muls	r3, r4, r3
+	subs	r3, r3, r7
+	add	r3, r2, r3, lsl #9
+	b	.L2821
+.L2799:
+	ldr	r0, .L2825+8
+	mov	r3, r5
+	movs	r2, #0
+	mov	r1, r8
+	ldr	r0, [r0]
+	bl	FtlProgPages
+	ldr	r3, [sp, #8]
+	cmp	r3, r8
+	bcs	.L2800
+	ldr	r1, .L2825+28
+	mov	r2, #1752
+	ldr	r0, .L2825+32
+	bl	printf
+	ldr	r1, .L2825+36
+	ldr	r0, .L2825+40
+	bl	printf
+.L2800:
+	ldr	r3, [sp, #8]
+	sub	r3, r3, r8
+	str	r3, [sp, #8]
+	b	.L2773
+.L2803:
+	mov	r0, #-1
+	b	.L2768
+.L2805:
+	mov	r0, r5
+	b	.L2768
+.L2826:
+	.align	2
+.L2825:
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR180
+	.word	.LANCHOR136
+	.word	.LANCHOR129
+	.word	.LANCHOR221
+	.word	.LC54
+	.word	.LANCHOR242
+	.word	.LC4
+	.word	.LC5
+	.word	.LC6
+	.word	.LANCHOR56
+	.word	.LANCHOR54
+	.size	ftl_write, .-ftl_write
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.align	1
+	.global	FlashReadFacBbtData
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	mov	fp, r2
+	ldr	r2, .L2840
+	sub	sp, sp, #48
+	mov	r6, r1
+	mov	r4, r0
+	ldr	r7, .L2840+4
+	ldrh	r3, [r2, #14]
+	ldrh	r2, [r2, #12]
+	smulbb	r3, r3, r2
+	ldr	r2, [r7]
+	uxth	r3, r3
+	str	r2, [sp, #20]
+	ldr	r2, .L2840+8
+	subs	r5, r3, #1
+	mul	r10, r6, r3
+	uxth	r5, r5
+	subs	r3, r3, #15
+	ldr	r1, [r2]
+	mov	r8, r2
+	str	r1, [sp, #24]
+.L2828:
+	cmp	r3, r5
+	ble	.L2835
+	mov	r0, #-1
+	b	.L2827
+.L2835:
+	add	r2, r5, r10
+	add	r0, sp, #12
+	lsls	r2, r2, #10
+	str	r3, [sp, #4]
+	str	r2, [sp, #16]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L2829
+	ldr	r2, [r8]
+	ldrh	r1, [r2]
+	movw	r2, #61664
+	cmp	r1, r2
+	bne	.L2829
+	cbz	r4, .L2836
+	cbz	r6, .L2831
+.L2834:
+	mov	r2, fp
+	ldr	r1, [r7]
+	mov	r0, r4
+	bl	ftl_memcpy
+	movs	r3, #4
+	ldr	r0, .L2840+12
+	mov	r2, r3
+	mov	r1, r4
+	bl	rknand_print_hex
+	movs	r0, #0
+.L2827:
+	add	sp, sp, #48
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2831:
+	ldr	r1, [r7]
+	mov	ip, #1
+	ldr	r5, .L2840+16
+.L2832:
+	ldr	r0, [r5]
+	uxth	r3, r6
+	adds	r6, r6, #1
+	cmp	r3, r0
+	bcs	.L2834
+	lsrs	r0, r3, #5
+	and	r3, r3, #31
+	lsl	r3, ip, r3
+	ldr	r2, [r1, r0, lsl #2]
+	orrs	r3, r3, r2
+	str	r3, [r1, r0, lsl #2]
+	b	.L2832
+.L2829:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2828
+.L2836:
+	mov	r0, r4
+	b	.L2827
+.L2841:
+	.align	2
+.L2840:
+	.word	.LANCHOR15
+	.word	.LANCHOR143
+	.word	.LANCHOR194
+	.word	.LC55
+	.word	.LANCHOR145
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L2852
+	ldr	r6, .L2852+4
+	ldr	r3, [r3]
+	ldr	r0, [r6]
+	ldrb	r4, [r3, #13]	@ zero_extendqisi2
+	ldrh	r3, [r3, #14]
+	smulbb	r4, r4, r3
+	uxth	r4, r4
+	adds	r2, r4, #7
+	asrs	r2, r2, #3
+	bl	FlashReadFacBbtData
+	adds	r0, r0, #1
+	bne	.L2843
+.L2847:
+	movs	r3, #0
+.L2844:
+	movw	r2, #65535
 	movs	r0, #0
-	ldr	r1, [r3, #0]
-	bl	FlashDdrParaScan
-.L2212:
-	bl	FlashSavePhyInfo
-.L2208:
-	ldr	r5, .L2244+20
-	ldr	r2, .L2244+32
-	ldr	r4, .L2244+48
-	ldr	r3, [r5, #0]
-	ldrb	r1, [r3, #26]	@ zero_extendqisi2
-	ldrb	r6, [r3, #18]	@ zero_extendqisi2
-	strb	r1, [r2, #0]
-	ldr	r1, .L2244+52
-	ldrh	r2, [r3, #16]
-	ubfx	r0, r2, #7, #1
-	strb	r0, [r1, #0]
-	ldr	r1, .L2244+56
-	ubfx	r0, r2, #3, #1
-	strb	r0, [r1, #0]
-	ubfx	r0, r2, #4, #1
-	ldr	r1, .L2244+60
-	ubfx	r2, r2, #8, #3
-	strb	r0, [r1, #0]
-	ldr	r1, .L2244+24
-	ldrh	r0, [r3, #10]
-	strb	r2, [r1, #0]
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L2843:
+	ldr	r7, [r6]
 	movs	r2, #0
-	ldrb	r1, [r3, #12]	@ zero_extendqisi2
-	str	r2, [r4, #0]
-	bl	__aeabi_idiv
-	mov	r1, r0
-	mov	r0, r6
-	bl	BuildFlashLsbPageTable
-	bl	FlashDieInfoInit
-	ldr	r3, [r5, #0]
-	ldrh	r2, [r3, #16]
-	lsls	r0, r2, #25
-	bpl	.L2213
-	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r2, .L2244+64
-	ldr	r3, .L2244+68
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	strb	r0, [r3, #0]
-	ldr	r3, .L2244+72
-	strb	r1, [r3, #0]
-	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	ldr	r3, .L2244+76
-	strb	r1, [r3, #0]
-	subs	r1, r0, #1
-	cmp	r1, #6
-	bhi	.L2214
-	ldr	r3, .L2244+80
-	str	r3, [r4, #0]
-	subs	r3, r0, #5
-	cmp	r3, #1
-	bhi	.L2215
-	ldr	r3, .L2244+84
-	movs	r2, #1
-	str	r2, [r3, #0]
-	b	.L2216
-.L2215:
-	cmp	r0, #7
-	beq	.L2237
-.L2216:
-	ldr	r1, .L2244+88
-	b	.L2217
-.L2237:
-	add	r1, r2, #28
-.L2217:
-	movs	r3, #0
-	mov	r2, r3
-.L2219:
-	ldrsb	r4, [r1, r2]
-	cbnz	r4, .L2218
-	adds	r3, r3, #1
-.L2218:
+	lsr	ip, r4, #4
+	mov	r3, r2
+	subs	r4, r4, #1
+	mov	lr, #1
+.L2845:
+	uxth	r1, r2
+	cmp	r1, r4
+	bge	.L2844
+	lsrs	r6, r1, #5
+	and	r0, r1, #31
+	lsl	r0, lr, r0
 	adds	r2, r2, #1
-	cmp	r2, #32
-	bne	.L2219
-	cmp	r3, #27
-	bls	.L2213
-	bl	FlashGetReadRetryDefault
-	bl	FlashSavePhyInfo
-	b	.L2213
-.L2214:
-	sub	r2, r0, #17
-	cmp	r2, #2
-	bhi	.L2220
-	ldr	r2, .L2244+92
-	str	r2, [r4, #0]
-	movs	r2, #7
-	cmp	r0, #19
-	strb	r2, [r3, #0]
-	bne	.L2213
-	movs	r2, #15
-	b	.L2241
-.L2220:
-	cmp	r0, #33
-	beq	.L2221
-	cmp	r0, #65
-	beq	.L2221
-	cmp	r0, #66
-	bne	.L2222
-.L2221:
-	ldr	r2, .L2244+96
-	ldr	r3, .L2244+48
-	str	r2, [r3, #0]
-	movs	r2, #4
-	ldr	r3, .L2244+72
-	strb	r2, [r3, #0]
-	movs	r2, #7
-	ldr	r3, .L2244+76
-	b	.L2241
-.L2222:
-	cmp	r0, #67
-	beq	.L2223
-	cmp	r0, #34
-	beq	.L2223
-	cmp	r0, #35
-	beq	.L2223
-	cmp	r0, #68
-	bne	.L2224
-.L2223:
-	ldr	r2, .L2244+96
-	ldr	r3, .L2244+48
-	str	r2, [r3, #0]
-	movs	r2, #7
-	ldr	r3, .L2244+76
-	cmp	r0, #35
-	strb	r2, [r3, #0]
-	beq	.L2225
-	cmp	r0, #68
-	bne	.L2226
-.L2225:
-	movs	r2, #17
-	strb	r2, [r3, #0]
-.L2226:
-	subs	r0, r0, #67
-	ldr	r3, .L2244+72
-	cmp	r0, #1
-	bhi	.L2227
-	movs	r2, #4
-.L2241:
-	strb	r2, [r3, #0]
-	b	.L2213
-.L2227:
-	movs	r2, #5
-	b	.L2241
-.L2245:
+	ldr	r6, [r7, r6, lsl #2]
+	tst	r0, r6
+	ittt	ne
+	addne	r0, r3, #1
+	strhne	r1, [r5, r3, lsl #1]	@ movhi
+	uxthne	r3, r0
+	cmp	r3, ip
+	bcc	.L2845
+	b	.L2847
+.L2853:
 	.align	2
-.L2244:
-	.word	.LANCHOR27+32
-	.word	.LANCHOR6
+.L2852:
 	.word	.LANCHOR18
-	.word	.LANCHOR243
-	.word	.LANCHOR0
-	.word	.LANCHOR23
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.word	.LANCHOR7
-	.word	.LC54
-	.word	.LANCHOR24
-	.word	.LANCHOR149
-	.word	.LANCHOR153
-	.word	.LANCHOR4
-	.word	.LANCHOR194
-	.word	.LANCHOR33
-	.word	.LANCHOR31
-	.word	.LANCHOR11
-	.word	.LANCHOR14
-	.word	.LANCHOR144
-	.word	HynixReadRetrial
-	.word	.LANCHOR39
-	.word	.LANCHOR31+20
-	.word	MicronReadRetrial
-	.word	ToshibaReadRetrial
-.L2224:
-	cmp	r0, #49
-	bne	.L2213
-	ldr	r2, .L2246
-	ldr	r3, .L2246+4
-	str	r2, [r3, #0]
-.L2213:
-	ldr	r3, .L2246+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L2246+12
-	cmp	r2, r3
-	bne	.L2228
-	ldr	r3, .L2246+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2228
-	ldr	r3, .L2246+20
-	movs	r2, #0
-	ldr	r3, [r3, #0]
-	strb	r2, [r3, #18]
-.L2228:
-	ldr	r3, .L2246+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #44
-	bne	.L2229
-	ldr	r3, .L2246+28
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	cbz	r2, .L2229
-	movs	r2, #0
-	movs	r0, #1
-	strb	r2, [r3, #0]
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-.L2229:
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	ldr	r3, .L2246+32
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	tst	r3, #6
-	beq	.L2230
-	ldr	r2, .L2246+28
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L2231
-	lsls	r1, r3, #31
-	bmi	.L2230
-.L2231:
-	ldr	r3, .L2246+36
-	movs	r0, #0
-	ldr	r1, [r3, #0]
-	bl	FlashDdrParaScan
-.L2230:
-	ldr	r4, .L2246+20
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-	mov	r8, #16
-	ldr	r3, [r4, #0]
-	ldrb	r0, [r3, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-	ldr	r0, .L2246+40
-	bl	FlashReadIdbDataRaw
-	ldr	r5, [r4, #0]
-	ldr	r3, .L2246+44
-	ldr	r4, .L2246+48
-	ldrb	r1, [r5, #12]	@ zero_extendqisi2
-	strb	r8, [r3, #0]
-	ldrh	r6, [r5, #10]
-	strh	r1, [r4, #8]	@ movhi
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	mov	r0, r6
-	ldrh	r7, [r5, #14]
+	.word	.LANCHOR151
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.syntax unified
+	.thumb
+	.thumb_func
+	.fpu softvfp
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2874
+	push	{r0, r1, r4, r5, r6, r7, r8, r10, fp, lr}
+	ldr	r7, [r3]
+	cmp	r7, #0
+	bne	.L2855
+	ldr	r8, .L2874+40
+	ldr	r4, .L2874+4
+	bl	FtlBbtMemInit
+	sub	r10, r8, #18
+	bl	FtlLoadFactoryBbt
+.L2856:
+	ldr	r3, .L2874+8
+	ldrh	r3, [r3]
+	cmp	r7, r3
+	bcc	.L2862
+	ldr	r5, .L2874+12
+	movs	r4, #0
+.L2863:
+	ldrh	r3, [r5]
+	uxth	r0, r4
+	adds	r4, r4, #1
+	cmp	r3, r0
+	bhi	.L2864
+	ldr	r4, .L2874+16
+	movw	r6, #65535
+	ldrh	r5, [r4, #12]
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2865:
+	ldrh	r3, [r4, #12]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	bgt	.L2869
+	mov	r0, r5
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2866
+	mov	r0, r5
+	bl	FlashTestBlk
+	cmp	r0, #0
+	beq	.L2867
+	mov	r0, r5
+	bl	FtlBbmMapBadBlock
+.L2866:
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L2865
+.L2862:
+	ldr	r3, .L2874+20
+	movw	r1, #65535
+	ldrh	r2, [r10, #2]!
+	ldr	r0, [r3]
+	ldr	r3, .L2874+24
+	cmp	r2, r1
+	str	r0, [r4, #8]
+	ldr	fp, [r3]
+	str	r3, [sp, #4]
+	ldr	r3, .L2874+28
+	str	fp, [r4, #12]
+	beq	.L2857
+	ldrh	r6, [r3]
+	mov	r0, r4
+	str	r3, [sp]
+	mla	r6, r7, r6, r2
+	lsls	r2, r6, #10
+	str	r2, [r4, #4]
+	movs	r2, #1
+	mov	r1, r2
+	bl	FlashReadPages
+	ldr	r3, [sp]
+	ldr	r1, [r4, #8]
+	ldr	r0, [r8]
+	ldrh	r2, [r3]
+	adds	r2, r2, #7
+	asrs	r2, r2, #3
+	bl	ftl_memcpy
+.L2858:
+	uxth	r0, r6
+	adds	r7, r7, #1
+	add	r8, r8, #4
+	bl	FtlBbmMapBadBlock
+	b	.L2856
+.L2857:
+	mov	r1, r7
+	str	r3, [sp]
+	bl	FlashGetBadBlockList
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	bl	FtlBbt2Bitmap
+	ldr	r3, [sp]
+	ldrh	r5, [r3]
+.L2860:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L2859:
+	ldr	r3, [sp]
+	ldrh	r0, [r3]
+	smlabb	r0, r0, r7, r5
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L2860
+	ldr	r3, [sp, #4]
+	movs	r2, #16
+	movs	r1, #0
+	strh	r5, [r10]	@ movhi
+	ldr	r0, [r3]
+	bl	ftl_memset
+	ldr	r2, [sp]
+	movw	r3, #61664
+	strh	r3, [fp]	@ movhi
+	movs	r3, #0
+	str	r3, [fp, #4]
+	ldrh	r6, [r2]
+	ldrh	r3, [r10]
+	ldr	r1, [r8]
+	ldr	r0, [r4, #8]
+	strh	r3, [fp, #2]	@ movhi
+	mla	r6, r7, r6, r3
+	lsls	r3, r6, #10
 	str	r3, [r4, #4]
-	ldr	r3, .L2246+24
-	ldr	r3, [r3, #0]
-	str	r3, [r4, #0]
-	ldr	r3, .L2246+52
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r4, #10]	@ movhi
-	ldrb	r3, [r5, #13]	@ zero_extendqisi2
-	strh	r6, [r4, #16]	@ movhi
-	strh	r7, [r4, #14]	@ movhi
-	strh	r3, [r4, #12]	@ movhi
-	bl	__aeabi_idiv
-	mov	r2, #512
-	strh	r0, [r4, #18]	@ movhi
-	ldrb	r3, [r5, #9]	@ zero_extendqisi2
-	muls	r6, r3, r6
-	strh	r2, [r4, #24]	@ movhi
-	uxth	r6, r6
-	ldr	r2, .L2246+56
-	strh	r3, [r4, #20]	@ movhi
-	strh	r6, [r4, #22]	@ movhi
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	strh	r8, [r4, #26]	@ movhi
-	cmp	r2, #1
-	bne	.L2233
-	lsls	r3, r3, #1
-	lsrs	r7, r7, #1
-	strh	r3, [r4, #20]	@ movhi
-	lsls	r6, r6, #1
-	movs	r3, #8
-	strh	r7, [r4, #14]	@ movhi
-	strh	r6, [r4, #22]	@ movhi
-	strh	r3, [r4, #26]	@ movhi
-.L2233:
-	ldrb	r0, [r5, #20]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r0, #0
-	b	.L2199
-.L2235:
-	mvn	r0, #1
-.L2199:
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2247:
-	.align	2
-.L2246:
-	.word	SamsungReadRetrial
-	.word	.LANCHOR153
-	.word	.LANCHOR142
-	.word	1446522928
-	.word	.LANCHOR7
-	.word	.LANCHOR23
-	.word	.LANCHOR22
-	.word	.LANCHOR35
-	.word	.LANCHOR34
-	.word	.LANCHOR149
-	.word	.LANCHOR25
-	.word	.LANCHOR1
-	.word	.LANCHOR28
-	.word	.LANCHOR16
-	.word	.LANCHOR0
-	.size	FlashInit, .-FlashInit
-	.section	.text.rk_ftl_init,"ax",%progbits
+	ldr	r3, .L2874+32
+	ldrh	r2, [r3]
+	lsls	r2, r2, #2
+	bl	ftl_memcpy
+	movs	r2, #1
+	mov	r0, r4
+	mov	r1, r2
+	bl	FlashEraseBlocks
+	movs	r3, #1
+	mov	r0, r4
+	mov	r2, r3
+	mov	r1, r3
+	bl	FlashProgPages
+	ldr	r3, [r4]
+	adds	r3, r3, #1
+	bne	.L2858
+	uxth	r0, r6
+	bl	FtlBbmMapBadBlock
+	b	.L2859
+.L2864:
+	bl	FtlBbmMapBadBlock
+	b	.L2863
+.L2867:
+	ldrh	r3, [r4]
+	cmp	r3, r6
+	bne	.L2868
+	strh	r5, [r4]	@ movhi
+	b	.L2866
+.L2868:
+	strh	r5, [r4, #4]	@ movhi
+.L2869:
+	ldr	r3, .L2874+36
+	movs	r5, #0
+	str	r5, [r4, #8]
+	movs	r2, #2
+	movs	r1, #1
+	strh	r5, [r4, #2]	@ movhi
+	ldr	r0, [r3]
+	ldrh	r3, [r4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	strh	r5, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	ldrh	r3, [r4]
+	strh	r2, [r4]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+.L2855:
+	movs	r0, #0
+	add	sp, sp, #8
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2875:
+	.align	2
+.L2874:
+	.word	.LANCHOR75
+	.word	.LANCHOR199
+	.word	.LANCHOR43
+	.word	.LANCHOR58
+	.word	.LANCHOR73
+	.word	.LANCHOR79
+	.word	.LANCHOR185
+	.word	.LANCHOR49
+	.word	.LANCHOR120
+	.word	.LANCHOR76
+	.word	.LANCHOR73+28
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
-	.global	rk_ftl_init
+	.global	FtlLowFormat
+	.syntax unified
 	.thumb
 	.thumb_func
-	.type	rk_ftl_init, %function
-rk_ftl_init:
-	@ args = 0, pretend = 0, frame = 0
+	.fpu softvfp
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	bl	FlashInit
-	mov	r4, r0
-	cbnz	r0, .L2249
-	ldr	r0, .L2250
-	bl	FtlInit
-.L2249:
+	ldr	r3, .L2907
+	push	{r4, r5, r6, r7, r8, r10, fp, lr}
+	sub	sp, sp, #24
+	ldr	r3, [r3]
+	cmp	r3, #0
+	bne	.L2878
+	ldr	r6, .L2907+4
+	ldr	r2, .L2907+8
+	ldr	r5, .L2907+12
+	ldrh	r0, [r6]
+	str	r3, [r2]
+	str	r3, [r5]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2879
+	bl	FtlMakeBbt
+.L2879:
+	ldr	r3, .L2907+16
+	ldr	r2, .L2907+20
+	ldr	ip, .L2907+112
+	ldrh	r1, [r3]
+	ldr	r4, [r2]
+	ldr	r2, .L2907+24
+	str	r3, [sp, #12]
+	lsls	r1, r1, #7
+	ldr	r7, [r2]
+	movs	r2, #0
+.L2880:
+	uxth	r3, r2
+	adds	r2, r2, #1
+	cmp	r3, r1
+	blt	.L2881
+	ldr	r3, .L2907+28
+	movs	r7, #0
+	ldr	fp, .L2907+116
+	ldrh	r4, [r3]
+	mov	r8, r3
+	mov	r10, fp
+.L2882:
+	ldrh	r3, [fp]
+	cmp	r3, r4
+	bhi	.L2883
+	ldr	r4, .L2907+32
+	subs	r3, r7, #2
+	ldrh	r1, [r4]
+	cmp	r3, r1, lsl #1
+	bgt	.L2884
+.L2888:
+	movs	r7, #0
+	mov	r6, r7
+.L2885:
+	ldrh	r3, [r8]
+	uxth	r0, r7
+	adds	r7, r7, #1
+	cmp	r3, r0
+	bhi	.L2889
+	ldrh	r2, [r10]
+	ldr	r3, .L2907+36
+	ldrh	r4, [r4]
+	ldr	r7, .L2907+40
+	str	r2, [r3]
+	ldr	r3, .L2907+44
 	mov	r1, r4
-	ldr	r0, .L2250+4
-	bl	printf
+	ldr	r3, [r3]
+	mov	r0, r3
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r1, .L2907+48
+	ubfx	r3, r0, #5, #16
+	add	r2, r3, #36
+	mov	fp, r0
+	str	r0, [r7]
+	strh	r2, [r1]	@ movhi
+	movs	r2, #24
+	muls	r2, r4, r2
+	str	r3, [sp, #4]
+	str	r1, [sp, #8]
+	cmp	r6, r2
+	ble	.L2890
+	ldr	r3, [sp, #16]
+	mov	r1, r4
+	subs	r0, r3, r6
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #8]
+	str	r0, [r7]
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r3]	@ movhi
+.L2890:
+	ldr	r3, .L2907+52
+	ldr	r3, [r3]
+	cmp	r3, #1
+	bne	.L2891
+	ldr	r2, .L2907+48
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2891:
+	ldr	r3, .L2907+56
+	ldrb	r3, [r3]	@ zero_extendqisi2
+	cbz	r3, .L2892
+	ldr	r2, .L2907+48
+	mov	r1, r4
+	mov	r0, r6
+	ldrh	r3, [r2]
+	str	r2, [sp, #20]
+	str	r3, [sp, #16]
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	ldr	r2, [sp, #20]
+	uxtah	r0, r3, r0
+	add	r3, r3, r0, asr #2
+	strh	r3, [r2]	@ movhi
+.L2892:
+	ldr	r3, .L2907+60
+	ldrh	r3, [r3]
+	cbz	r3, .L2894
+	ldr	r2, .L2907+48
+	ldrh	r1, [r2]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r2]	@ movhi
+	mul	r1, r4, r3
+	cmp	r6, r1
+	bge	.L2894
+	ldr	r1, [sp, #4]
+	adds	r3, r3, #32
+	str	fp, [r7]
+	add	r1, r1, r3
+	strh	r1, [r2]	@ movhi
+.L2894:
+	ldr	r3, [sp, #8]
+	ldr	r6, .L2907+64
+	ldrh	r2, [r3]
+	ldr	r3, [r7]
+	subs	r3, r3, r2
+	muls	r4, r3, r4
+	ldr	r3, .L2907+68
+	ldrh	r3, [r3]
+	str	r4, [r6]
+	muls	r4, r3, r4
+	ldr	r3, [sp, #12]
+	ldrh	r3, [r3]
+	str	r4, [r7]
+	ldr	r7, .L2907+72
+	muls	r4, r3, r4
+	ldr	r3, .L2907+76
+	str	r4, [r3]
+	movw	r4, #65535
+	bl	FtlBbmTblFlush
+	ldrh	r2, [r10]
+	movs	r1, #0
+	ldr	r10, .L2907+120
+	lsls	r2, r2, #1
+	ldr	r0, [r10]
+	bl	ftl_memset
+	ldr	r2, .L2907+80
+	movs	r3, #0
+	strh	r3, [r7, #2]	@ movhi
+	movs	r1, #255
+	strb	r3, [r7, #6]
+	str	r3, [r2]
+	ldr	r2, .L2907+84
+	strh	r3, [r7]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	strb	r3, [r2, #6]
+	strb	r3, [r2, #8]
+	movs	r3, #1
+	strh	r4, [r2]	@ movhi
+	ldrh	r2, [r8]
+	mov	r8, r10
+	strb	r3, [r7, #8]
+	mov	r10, r7
+	ldr	r3, .L2907+88
+	lsrs	r2, r2, #3
+	ldr	r0, [r3]
+	bl	ftl_memset
+.L2896:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r7, #7]	@ zero_extendqisi2
+	ldrh	r2, [r7]
+	cmp	r3, #0
+	bne	.L2897
+	ldr	r3, [r8]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r7]
+	adds	r3, r3, #1
+	strh	r3, [r7]	@ movhi
+	b	.L2896
+.L2881:
+	mvns	r0, r3
+	orr	r0, r3, r0, lsl #16
+	str	r0, [r4, r3, lsl #2]
+	str	ip, [r7, r3, lsl #2]
+	b	.L2880
+.L2883:
 	mov	r0, r4
-	pop	{r4, pc}
-.L2251:
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r4, r4, #1
+	add	r7, r7, r0
+	uxth	r7, r7
+	uxth	r4, r4
+	b	.L2882
+.L2884:
+	mov	r0, r7
+	bl	__aeabi_uidiv
+	ldr	r3, .L2907+92
+	ldr	r3, [r3]
+	add	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldrh	r0, [r6]
+	bl	FtlFreeSysBlkQueueInit
+	ldrh	r6, [r8]
+.L2886:
+	ldrh	r3, [r10]
+	cmp	r3, r6
+	bls	.L2888
+	mov	r0, r6
+	movs	r1, #1
+	adds	r6, r6, #1
+	bl	FtlLowFormatEraseBlock
+	uxth	r6, r6
+	b	.L2886
+.L2889:
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	add	r6, r6, r0
+	uxth	r6, r6
+	b	.L2885
+.L2897:
+	ldr	r3, [r5]
+	ldrh	r1, [r7, #4]
+	ldr	r4, .L2907+96
+	str	r3, [r7, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	ldr	r3, [r8]
+	mov	r10, r4
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	ldrh	r3, [r7]
+	movw	r7, #65535
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	movs	r3, #1
+	strb	r3, [r4, #8]
+.L2898:
+	mov	r0, r10
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r4]
+	cbnz	r3, .L2899
+	ldr	r3, [r8]
+	strh	r7, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4]
+	adds	r3, r3, #1
+	strh	r3, [r4]	@ movhi
+	b	.L2898
+.L2899:
+	ldr	r3, [r5]
+	ldrh	r1, [r4, #4]
+	str	r3, [r4, #12]
+	adds	r3, r3, #1
+	str	r3, [r5]
+	movw	r4, #65535
+	ldr	r3, [r8]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2907+100
+	strh	r4, [r3]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2907+104
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, [r6]
+	strh	r0, [r3]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r5]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r5]
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2878
+	ldr	r3, .L2907+108
+	movs	r2, #1
+	str	r2, [r3]
+.L2878:
+	movs	r0, #0
+	add	sp, sp, #24
+	@ sp needed
+	pop	{r4, r5, r6, r7, r8, r10, fp, pc}
+.L2908:
 	.align	2
-.L2250:
-	.word	.LANCHOR28
-	.word	.LC55
-	.size	rk_ftl_init, .-rk_ftl_init
+.L2907:
+	.word	.LANCHOR75
+	.word	.LANCHOR37
+	.word	.LANCHOR158
+	.word	.LANCHOR157
+	.word	.LANCHOR54
+	.word	.LANCHOR183
+	.word	.LANCHOR184
+	.word	.LANCHOR38
+	.word	.LANCHOR36
+	.word	.LANCHOR72
+	.word	.LANCHOR71
+	.word	.LANCHOR40
+	.word	.LANCHOR227
+	.word	.LANCHOR101
+	.word	.LANCHOR8
+	.word	.LANCHOR47
+	.word	.LANCHOR226
+	.word	.LANCHOR51
+	.word	.LANCHOR90
+	.word	.LANCHOR67
+	.word	.LANCHOR99
+	.word	.LANCHOR201
+	.word	.LANCHOR0
+	.word	.LANCHOR64
+	.word	.LANCHOR91
+	.word	.LANCHOR92
+	.word	.LANCHOR206
+	.word	.LANCHOR223
+	.word	168778952
+	.word	.LANCHOR39
+	.word	.LANCHOR82
+	.size	FtlLowFormat, .-FtlLowFormat
+	.global	FtlMallocOffset
+	.global	FtlMallocBuffer
 	.global	gc_ink_free_return_value
 	.global	FtlUpdateVaildLpnCount
 	.global	g_ect_tbl_power_up_flush
@@ -20607,2245 +20741,1544 @@ rk_ftl_init:
 	.global	DieCsIndex
 	.global	IDByte
 	.global	read_retry_cur_offset
-	.section	.rodata
-.LANCHOR150 = . + 0
-.LC0:
-	.byte	60
-	.byte	40
-	.byte	24
-	.byte	16
-	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
-	.align	2
-.LANCHOR232 = . + 0
-	.type	g_recovery_ppa_tbl, %object
-	.size	g_recovery_ppa_tbl, 128
-g_recovery_ppa_tbl:
-	.space	128
-	.section	.bss.p_blk_mode_table,"aw",%nobits
-	.align	2
-.LANCHOR107 = . + 0
-	.type	p_blk_mode_table, %object
-	.size	p_blk_mode_table, 4
-p_blk_mode_table:
-	.space	4
-	.section	.rodata.__func__.7798,"a",%progbits
-.LANCHOR221 = . + 0
-	.type	__func__.7798, %object
-	.size	__func__.7798, 9
-__func__.7798:
-	.ascii	"log2phys\000"
-	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-.LANCHOR134 = . + 0
-	.type	p_gc_blk_tbl, %object
-	.size	p_gc_blk_tbl, 4
-p_gc_blk_tbl:
-	.space	4
-	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
-	.align	1
-.LANCHOR218 = . + 0
-	.type	g_ect_tbl_power_up_flush, %object
-	.size	g_ect_tbl_power_up_flush, 2
-g_ect_tbl_power_up_flush:
-	.space	2
-	.section	.bss.gFlashSlcMode,"aw",%nobits
-.LANCHOR7 = . + 0
-	.type	gFlashSlcMode, %object
-	.size	gFlashSlcMode, 1
-gFlashSlcMode:
-	.space	1
-	.section	.data.gNandParaInfo,"aw",%progbits
-	.align	1
-.LANCHOR18 = . + 0
-	.type	gNandParaInfo, %object
-	.size	gNandParaInfo, 32
-gNandParaInfo:
-	.byte	0
-	.byte	0
-	.space	5
-	.byte	0
-	.byte	1
-	.byte	8
-	.short	128
-	.byte	2
-	.byte	1
-	.short	2048
-	.short	0
-	.byte	1
-	.byte	0
-	.byte	24
-	.byte	32
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
+	.set	.LANCHOR59,. + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
 	.space	4
-	.section	.bss.gNandRandomizer,"aw",%nobits
-.LANCHOR4 = . + 0
-	.type	gNandRandomizer, %object
-	.size	gNandRandomizer, 1
-gNandRandomizer:
-	.space	1
-	.section	.bss.gDieOp,"aw",%nobits
+	.section	.bss.DieAddrs,"aw",%nobits
 	.align	2
-.LANCHOR21 = . + 0
-	.type	gDieOp, %object
-	.size	gDieOp, 128
-gDieOp:
-	.space	128
-	.section	.rodata.__func__.8089,"a",%progbits
-.LANCHOR115 = . + 0
-	.type	__func__.8089, %object
-	.size	__func__.8089, 16
-__func__.8089:
-	.ascii	"make_superblock\000"
-	.section	.data.refValueDefault,"aw",%progbits
-.LANCHOR242 = . + 0
-	.type	refValueDefault, %object
-	.size	refValueDefault, 28
-refValueDefault:
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	6
-	.byte	10
-	.byte	6
-	.byte	0
-	.byte	-3
-	.byte	-7
-	.byte	-8
-	.byte	0
-	.byte	-6
-	.byte	-13
-	.byte	-15
-	.byte	0
-	.byte	-11
-	.byte	-20
-	.byte	-23
-	.byte	0
-	.byte	0
-	.byte	-26
-	.byte	-30
-	.byte	0
-	.byte	0
-	.byte	-32
-	.byte	-37
-	.section	.bss.gFlashToggleModeEn,"aw",%nobits
-.LANCHOR35 = . + 0
-	.type	gFlashToggleModeEn, %object
-	.size	gFlashToggleModeEn, 1
-gFlashToggleModeEn:
-	.space	1
-	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.set	.LANCHOR17,. + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.space	32
+	.section	.bss.DieCsIndex,"aw",%nobits
 	.align	2
-.LANCHOR132 = . + 0
-	.type	g_sys_ext_data, %object
-	.size	g_sys_ext_data, 512
-g_sys_ext_data:
-	.space	512
-	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.set	.LANCHOR26,. + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.space	8
+	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.align	2
+	.set	.LANCHOR148,. + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.space	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.space	4
+	.section	.bss.FtlMallocBuffer,"aw",%nobits
+	.align	6
+	.type	FtlMallocBuffer, %object
+	.size	FtlMallocBuffer, 1310720
+FtlMallocBuffer:
+	.space	1310720
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-.LANCHOR58 = . + 0
-	.type	c_ftl_nand_page_pre_super_blk, %object
-	.size	c_ftl_nand_page_pre_super_blk, 2
-c_ftl_nand_page_pre_super_blk:
+	.set	.LANCHOR98,. + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
 	.space	2
-	.section	.bss.g_inkDie_check_enable,"aw",%nobits
+	.section	.bss.IDByte,"aw",%nobits
 	.align	2
-.LANCHOR116 = . + 0
-	.type	g_inkDie_check_enable, %object
-	.size	g_inkDie_check_enable, 4
-g_inkDie_check_enable:
-	.space	4
-	.section	.bss.gNandFlashEccBits,"aw",%nobits
-.LANCHOR29 = . + 0
-	.type	gNandFlashEccBits, %object
-	.size	gNandFlashEccBits, 1
-gNandFlashEccBits:
-	.space	1
+	.set	.LANCHOR22,. + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR120,. + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR39,. + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR49,. + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+	.set	.LANCHOR50,. + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+	.set	.LANCHOR57,. + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+	.set	.LANCHOR56,. + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR38,. + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR201 = . + 0
+	.set	.LANCHOR227,. + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.space	2
-	.section	.rodata.__func__.7377,"a",%progbits
-.LANCHOR223 = . + 0
-	.type	__func__.7377, %object
-	.size	__func__.7377, 13
-__func__.7377:
-	.ascii	"FtlProgPages\000"
-	.section	.bss.g_in_swl_replace,"aw",%nobits
-	.align	2
-.LANCHOR169 = . + 0
-	.type	g_in_swl_replace, %object
-	.size	g_in_swl_replace, 4
-g_in_swl_replace:
-	.space	4
-	.section	.bss.g_maxRetryCount,"aw",%nobits
-.LANCHOR144 = . + 0
-	.type	g_maxRetryCount, %object
-	.size	g_maxRetryCount, 1
-g_maxRetryCount:
-	.space	1
-	.section	.bss.gMultiPageProgEn,"aw",%nobits
-.LANCHOR33 = . + 0
-	.type	gMultiPageProgEn, %object
-	.size	gMultiPageProgEn, 1
-gMultiPageProgEn:
-	.space	1
-	.section	.bss.gMasterInfo,"aw",%nobits
-	.align	2
-.LANCHOR38 = . + 0
-	.type	gMasterInfo, %object
-	.size	gMasterInfo, 32
-gMasterInfo:
-	.space	32
-	.section	.bss.gReadRetryInfo,"aw",%nobits
-.LANCHOR31 = . + 0
-	.type	gReadRetryInfo, %object
-	.size	gReadRetryInfo, 852
-gReadRetryInfo:
-	.space	852
 	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
 	.align	1
-.LANCHOR48 = . + 0
+	.set	.LANCHOR43,. + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.space	2
-	.section	.bss.g_cur_erase_blk,"aw",%nobits
-	.align	2
-.LANCHOR77 = . + 0
-	.type	g_cur_erase_blk, %object
-	.size	g_cur_erase_blk, 4
-g_cur_erase_blk:
-	.space	4
-	.section	.bss.gToggleModeClkDiv,"aw",%nobits
-	.align	2
-	.type	gToggleModeClkDiv, %object
-	.size	gToggleModeClkDiv, 4
-gToggleModeClkDiv:
-	.space	4
-	.section	.bss.p_valid_page_count_table,"aw",%nobits
-	.align	2
-.LANCHOR89 = . + 0
-	.type	p_valid_page_count_table, %object
-	.size	p_valid_page_count_table, 4
-p_valid_page_count_table:
-	.space	4
-	.section	.bss.req_erase,"aw",%nobits
-	.align	2
-.LANCHOR83 = . + 0
-	.type	req_erase, %object
-	.size	req_erase, 4
-req_erase:
-	.space	4
-	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
-	.align	2
-.LANCHOR45 = . + 0
-	.type	c_ftl_nand_max_data_blks, %object
-	.size	c_ftl_nand_max_data_blks, 4
-c_ftl_nand_max_data_blks:
-	.space	4
-	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
-	.type	gNandFlashInfoBlockEcc, %object
-	.size	gNandFlashInfoBlockEcc, 1
-gNandFlashInfoBlockEcc:
-	.space	1
-	.section	.bss.g_nandc_version_data,"aw",%nobits
-	.align	2
-.LANCHOR142 = . + 0
-	.type	g_nandc_version_data, %object
-	.size	g_nandc_version_data, 4
-g_nandc_version_data:
-	.space	4
-	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-.LANCHOR151 = . + 0
-	.type	gNandIDBResBlkNumSaveInFlash, %object
-	.size	gNandIDBResBlkNumSaveInFlash, 1
-gNandIDBResBlkNumSaveInFlash:
-	.space	1
-	.section	.bss.g_MaxLbn,"aw",%nobits
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+	.set	.LANCHOR47,. + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-.LANCHOR200 = . + 0
-	.type	g_MaxLbn, %object
-	.size	g_MaxLbn, 4
-g_MaxLbn:
+	.set	.LANCHOR64,. + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
-	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-.LANCHOR230 = . + 0
-	.type	g_power_lost_recovery_flag, %object
-	.size	g_power_lost_recovery_flag, 2
-g_power_lost_recovery_flag:
+	.set	.LANCHOR66,. + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
-	.section	.bss.g_retryMode,"aw",%nobits
-.LANCHOR11 = . + 0
-	.type	g_retryMode, %object
-	.size	g_retryMode, 1
-g_retryMode:
-	.space	1
-	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR73 = . + 0
-	.type	g_page_map_check_enable, %object
-	.size	g_page_map_check_enable, 2
-g_page_map_check_enable:
+	.set	.LANCHOR62,. + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR65,. + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
 	.space	2
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-.LANCHOR145 = . + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
-	.section	.bss.g_GlobalSysVersion,"aw",%nobits
-	.align	2
-.LANCHOR156 = . + 0
-	.type	g_GlobalSysVersion, %object
-	.size	g_GlobalSysVersion, 4
-g_GlobalSysVersion:
-	.space	4
-	.section	.rodata.__func__.7466,"a",%progbits
-.LANCHOR80 = . + 0
-	.type	__func__.7466, %object
-	.size	__func__.7466, 14
-__func__.7466:
-	.ascii	"FtlBbt2Bitmap\000"
-	.section	.bss.gpReadRetrial,"aw",%nobits
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
 	.align	2
-.LANCHOR153 = . + 0
-	.type	gpReadRetrial, %object
-	.size	gpReadRetrial, 4
-gpReadRetrial:
+	.set	.LANCHOR40,. + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
 	.space	4
-	.section	.rodata.str1.1,"aMS",%progbits,1
-.LC1:
-	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
-.LC2:
-	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
-	.ascii	"\000"
-.LC3:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
-.LC4:
-	.ascii	"%s\012\000"
-.LC5:
-	.ascii	"!!!!! FTL sys Error !!!!!\000"
-.LC6:
-	.ascii	"remove_from_free_sys_Queue %x\012\000"
-.LC7:
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
-.LC8:
-	.ascii	"ECC:%d\012\000"
-.LC9:
-	.ascii	"sdr read ok %x ecc=%d\012\000"
-.LC10:
-	.ascii	"sync para %d\012\000"
-.LC11:
-	.ascii	"TOG mode Read error %x %x\012\000"
-.LC12:
-	.ascii	"read retry status %x %x %x\012\000"
-.LC13:
-	.ascii	"%s 0x%x:\000"
-.LC14:
-	.ascii	"%x \000"
-.LC15:
-	.ascii	"\000"
-.LC16:
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
-.LC17:
-	.ascii	"data:\000"
-.LC18:
-	.ascii	"spare:\000"
-.LC19:
-	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
-.LC20:
-	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
-.LC21:
-	.ascii	"prog error: = %x\012\000"
-.LC22:
-	.ascii	"prog read error: = %x\012\000"
-.LC23:
-	.ascii	"prog read s error: = %x %x %x\012\000"
-.LC24:
-	.ascii	"prog read d error: = %x %x %x\012\000"
-.LC25:
-	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
-.LC26:
-	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
-.LC27:
-	.ascii	"FtlBbmTblFlush error:%x\012\000"
-.LC28:
-	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
-.LC29:
-	.ascii	"decrement_vpc_count %x = %d\012\000"
-.LC30:
-	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
-.LC31:
-	.ascii	"page map lost: %x %x\012\000"
-.LC32:
-	.ascii	"FtlMapWritePage error = %x\012\000"
-.LC33:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
-.LC34:
-	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
-.LC35:
-	.ascii	"slc mode\000"
-.LC36:
-	.ascii	"no ect\000"
-.LC37:
-	.ascii	"page map lost %x %x %x %x\012\000"
-.LC38:
-	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
-.LC39:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
-.LC40:
-	.ascii	"GC des block %x done\012\000"
-.LC41:
-	.ascii	"RSB refresh addr %x\012\000"
-.LC42:
-	.ascii	"spuer block %x vpn is 0\012 \000"
-.LC43:
-	.ascii	"g_recovery_ppa %x ver %x\012 \000"
-.LC44:
-	.ascii	"fix power lost blk = %x vpc=%x\012\000"
-.LC45:
-	.ascii	"erase power lost blk = %x vpc=%x\012\000"
-.LC46:
-	.ascii	"FTL version: 5.0.47 20171221\000"
-.LC47:
-	.ascii	"...%s: no bad block mapping table, format device\012"
-	.ascii	"\000"
-.LC48:
-	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
-.LC49:
-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
-.LC50:
-	.ascii	"BBT:\000"
-.LC51:
-	.ascii	"otp error! %d\000"
-.LC52:
-	.ascii	"rr\000"
-.LC53:
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
-.LC54:
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
-.LC55:
-	.ascii	"FtlInit %x\012\000"
-	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-.LANCHOR148 = . + 0
-	.type	gNandFlashIdbBlockAddr, %object
-	.size	gNandFlashIdbBlockAddr, 4
-gNandFlashIdbBlockAddr:
+	.set	.LANCHOR63,. + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
 	.space	4
-	.section	.bss.req_sys,"aw",%nobits
-	.align	2
-.LANCHOR198 = . + 0
-	.type	req_sys, %object
-	.size	req_sys, 36
-req_sys:
-	.space	36
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
 	.align	2
-.LANCHOR241 = . + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
+	.set	.LANCHOR37,. + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
 	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR60,. + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR51,. + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR52,. + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR53,. + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR36,. + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+	.set	.LANCHOR44,. + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR58,. + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
 	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
 	.align	1
-.LANCHOR59 = . + 0
+	.set	.LANCHOR54,. + 0
 	.type	c_ftl_nand_sec_pre_page, %object
 	.size	c_ftl_nand_sec_pre_page, 2
 c_ftl_nand_sec_pre_page:
 	.space	2
-	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
-	.align	2
-.LANCHOR189 = . + 0
-	.type	p_vendor_block_ver_table, %object
-	.size	p_vendor_block_ver_table, 4
-p_vendor_block_ver_table:
-	.space	4
-	.section	.bss.g_gc_next_blk,"aw",%nobits
-	.align	1
-.LANCHOR137 = . + 0
-	.type	g_gc_next_blk, %object
-	.size	g_gc_next_blk, 2
-g_gc_next_blk:
-	.space	2
-	.section	.rodata.__func__.7692,"a",%progbits
-.LANCHOR220 = . + 0
-	.type	__func__.7692, %object
-	.size	__func__.7692, 16
-__func__.7692:
-	.ascii	"load_l2p_region\000"
-	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
-	.align	2
-.LANCHOR9 = . + 0
-	.type	mlcPageToSlcPageTbl, %object
-	.size	mlcPageToSlcPageTbl, 1024
-mlcPageToSlcPageTbl:
-	.space	1024
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-.LANCHOR60 = . + 0
+	.set	.LANCHOR55,. + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
-	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+	.set	.LANCHOR35,. + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+	.set	.LANCHOR41,. + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+	.set	.LANCHOR42,. + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR61,. + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR48,. + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+	.set	.LANCHOR107,. + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+	.set	.LANCHOR46,. + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-.LANCHOR82 = . + 0
-	.type	g_flash_read_only_en, %object
-	.size	g_flash_read_only_en, 4
-g_flash_read_only_en:
+	.set	.LANCHOR132,. + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
-	.section	.rodata.__func__.8217,"a",%progbits
-.LANCHOR207 = . + 0
-	.type	__func__.8217, %object
-	.size	__func__.8217, 16
-__func__.8217:
-	.ascii	"update_vpc_list\000"
-	.section	.bss.read_retry_cur_offset,"aw",%nobits
-.LANCHOR32 = . + 0
-	.type	read_retry_cur_offset, %object
-	.size	read_retry_cur_offset, 4
-read_retry_cur_offset:
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR73,. + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.align	2
+	.set	.LANCHOR3,. + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.space	4
+	.section	.bss.gBootDdrMode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR153,. + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
 	.space	4
+	.section	.bss.gDieOp,"aw",%nobits
+	.align	2
+	.set	.LANCHOR23,. + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 128
+gDieOp:
+	.space	128
+	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+	.set	.LANCHOR24,. + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.space	1
 	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
 	.type	gFlashOnfiModeEn, %object
 	.size	gFlashOnfiModeEn, 1
 gFlashOnfiModeEn:
 	.space	1
-	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-.LANCHOR188 = . + 0
-	.type	p_vendor_block_valid_page_count, %object
-	.size	p_vendor_block_valid_page_count, 4
-p_vendor_block_valid_page_count:
+	.set	.LANCHOR143,. + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 4
+gFlashPageBuffer0:
 	.space	4
-	.section	.bss.gNandcVer,"aw",%nobits
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
 	.align	2
-.LANCHOR37 = . + 0
-	.type	gNandcVer, %object
-	.size	gNandcVer, 4
-gNandcVer:
+	.set	.LANCHOR151,. + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
 	.space	4
-	.section	.bss.g_num_free_superblocks,"aw",%nobits
-	.align	1
-.LANCHOR94 = . + 0
-	.type	g_num_free_superblocks, %object
-	.size	g_num_free_superblocks, 2
-g_num_free_superblocks:
-	.space	2
-	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
 	.align	2
-.LANCHOR87 = . + 0
-	.type	p_data_block_list_table, %object
-	.size	p_data_block_list_table, 4
-p_data_block_list_table:
+	.set	.LANCHOR195,. + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
 	.space	4
-	.section	.rodata.__func__.7933,"a",%progbits
-.LANCHOR199 = . + 0
-	.type	__func__.7933, %object
-	.size	__func__.7933, 15
-__func__.7933:
-	.ascii	"FtlLoadSysInfo\000"
-	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
 	.align	2
-.LANCHOR172 = . + 0
-	.type	g_gc_skip_write_count, %object
-	.size	g_gc_skip_write_count, 4
-g_gc_skip_write_count:
+	.set	.LANCHOR196,. + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
 	.space	4
-	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
-	.align	1
-.LANCHOR43 = . + 0
-	.type	c_ftl_nand_data_blks_per_plane, %object
-	.size	c_ftl_nand_data_blks_per_plane, 2
-c_ftl_nand_data_blks_per_plane:
-	.space	2
-	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
+	.section	.bss.gFlashSdrModeEn,"aw",%nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.space	1
+	.section	.bss.gFlashSlcMode,"aw",%nobits
+	.set	.LANCHOR8,. + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.space	1
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
 	.align	2
-.LANCHOR191 = . + 0
-	.type	p_map_region_ppn_check_table, %object
-	.size	p_map_region_ppn_check_table, 4
-p_map_region_ppn_check_table:
+	.set	.LANCHOR194,. + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.gFlashToggleModeEn,"aw",%nobits
+	.set	.LANCHOR28,. + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.space	1
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR124,. + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 44
+gL2pMapInfo:
+	.space	44
+	.section	.bss.gMasterInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR33,. + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 32
+gMasterInfo:
+	.space	32
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR154,. + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
 	.space	4
+	.section	.bss.gMultiPageProgEn,"aw",%nobits
+	.set	.LANCHOR27,. + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.space	1
 	.section	.bss.gMultiPageReadEn,"aw",%nobits
-.LANCHOR194 = . + 0
+	.set	.LANCHOR198,. + 0
 	.type	gMultiPageReadEn, %object
 	.size	gMultiPageReadEn, 1
 gMultiPageReadEn:
 	.space	1
-	.section	.bss.DieAddrs,"aw",%nobits
+	.section	.bss.gNandChipMap,"aw",%nobits
 	.align	2
-.LANCHOR20 = . + 0
-	.type	DieAddrs, %object
-	.size	DieAddrs, 32
-DieAddrs:
+	.set	.LANCHOR6,. + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 32
+gNandChipMap:
 	.space	32
-	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
-	.align	2
-.LANCHOR164 = . + 0
-	.type	g_totle_mlc_erase_count, %object
-	.size	g_totle_mlc_erase_count, 4
-g_totle_mlc_erase_count:
-	.space	4
-	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.section	.bss.gNandFlashEccBits,"aw",%nobits
+	.set	.LANCHOR31,. + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.space	1
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+	.set	.LANCHOR150,. + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR205 = . + 0
-	.type	gFlashProgCheckSpareBuffer, %object
-	.size	gFlashProgCheckSpareBuffer, 4
-gFlashProgCheckSpareBuffer:
-	.space	4
-	.section	.data.gSlcNandParaInfo,"aw",%progbits
-	.align	1
-.LANCHOR243 = . + 0
-	.type	gSlcNandParaInfo, %object
-	.size	gSlcNandParaInfo, 32
-gSlcNandParaInfo:
-	.byte	2
-	.byte	-104
-	.byte	-15
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	1
-	.byte	1
-	.byte	4
-	.short	64
-	.byte	1
-	.byte	1
-	.short	1024
-	.short	256
-	.byte	0
-	.byte	0
-	.byte	16
-	.byte	40
-	.byte	1
-	.byte	0
-	.byte	1
-	.byte	0
-	.byte	0
-	.byte	0
+	.set	.LANCHOR145,. + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
 	.space	4
-	.section	.rodata.__func__.7621,"a",%progbits
-.LANCHOR95 = . + 0
-	.type	__func__.7621, %object
-	.size	__func__.7621, 17
-__func__.7621:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR184 = . + 0
-	.type	p_sys_spare_buf, %object
-	.size	p_sys_spare_buf, 4
-p_sys_spare_buf:
+	.set	.LANCHOR144,. + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
 	.space	4
-	.section	.rodata.__func__.7625,"a",%progbits
-.LANCHOR92 = . + 0
-	.type	__func__.7625, %object
-	.size	__func__.7625, 17
-__func__.7625:
-	.ascii	"INSERT_DATA_LIST\000"
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.space	1
 	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
 	.align	2
 	.type	gNandFlashResEndPageAddr, %object
 	.size	gNandFlashResEndPageAddr, 4
 gNandFlashResEndPageAddr:
 	.space	4
-	.section	.rodata.__func__.8290,"a",%progbits
-.LANCHOR226 = . + 0
-	.type	__func__.8290, %object
-	.size	__func__.8290, 19
-__func__.8290:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
+	.set	.LANCHOR2,. + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.space	1
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
+	.set	.LANCHOR146,. + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.space	1
+	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR139,. + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.space	2048
+	.section	.bss.gNandMaxChip,"aw",%nobits
+	.set	.LANCHOR118,. + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.space	1
+	.section	.bss.gNandMaxDie,"aw",%nobits
+	.set	.LANCHOR25,. + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.space	1
+	.section	.bss.gNandOptPara,"aw",%nobits
+	.set	.LANCHOR7,. + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.align	2
+	.set	.LANCHOR15,. + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.space	28
+	.section	.bss.gNandRandomizer,"aw",%nobits
+	.set	.LANCHOR5,. + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.space	1
+	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
 	.align	2
-.LANCHOR122 = . + 0
-	.type	gp_gc_page_buf_info, %object
-	.size	gp_gc_page_buf_info, 4
-gp_gc_page_buf_info:
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+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
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-	.align	1
-.LANCHOR233 = . + 0
-	.type	gc_ink_free_return_value, %object
-	.size	gc_ink_free_return_value, 2
-gc_ink_free_return_value:
-	.space	2
-	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.section	.bss.gNandcEccBits,"aw",%nobits
 	.align	2
-.LANCHOR216 = . + 0
-	.type	g_totle_write_sector, %object
-	.size	g_totle_write_sector, 4
-g_totle_write_sector:
+	.set	.LANCHOR30,. + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
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-	.align	1
-.LANCHOR52 = . + 0
-	.type	c_ftl_nand_ext_blk_pre_plane, %object
-	.size	c_ftl_nand_ext_blk_pre_plane, 2
-c_ftl_nand_ext_blk_pre_plane:
-	.space	2
-	.section	.bss.gpNandc1,"aw",%nobits
+	.section	.bss.gNandcVer,"aw",%nobits
 	.align	2
-	.type	gpNandc1, %object
-	.size	gpNandc1, 4
-gpNandc1:
+	.set	.LANCHOR32,. + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
 	.space	4
-	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.section	.bss.gReadRetryInfo,"aw",%nobits
+	.set	.LANCHOR20,. + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.space	852
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+	.set	.LANCHOR74,. + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
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-	.type	FlashDdrTunningReadCount, %object
-	.size	FlashDdrTunningReadCount, 4
-FlashDdrTunningReadCount:
-	.space	4
-	.section	.bss.gBootDdrMode,"aw",%nobits
+	.set	.LANCHOR206,. + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gToggleModeClkDiv,"aw",%nobits
 	.align	2
-.LANCHOR192 = . + 0
-	.type	gBootDdrMode, %object
-	.size	gBootDdrMode, 4
-gBootDdrMode:
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
 	.space	4
-	.section	.bss.gNandMaxChip,"aw",%nobits
-.LANCHOR17 = . + 0
-	.type	gNandMaxChip, %object
-	.size	gNandMaxChip, 1
-gNandMaxChip:
-	.space	1
-	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.section	.bss.gTotleBlock,"aw",%nobits
 	.align	1
-.LANCHOR51 = . + 0
-	.type	c_mlc_erase_count_value, %object
-	.size	c_mlc_erase_count_value, 2
-c_mlc_erase_count_value:
+	.set	.LANCHOR119,. + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
 	.space	2
-	.section	.bss.p_map_block_table,"aw",%nobits
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-.LANCHOR112 = . + 0
-	.type	p_map_block_table, %object
-	.size	p_map_block_table, 4
-p_map_block_table:
+	.set	.LANCHOR215,. + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 44
+gVendorBlkInfo:
+	.space	44
+	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.align	2
+	.set	.LANCHOR158,. + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
 	.space	4
-	.section	.rodata.__func__.7512,"a",%progbits
-.LANCHOR203 = . + 0
-	.type	__func__.7512, %object
-	.size	__func__.7512, 11
-__func__.7512:
-	.ascii	"FtlLoadBbt\000"
-	.section	.data.SamsungRefValue,"aw",%progbits
-.LANCHOR15 = . + 0
-	.type	SamsungRefValue, %object
-	.size	SamsungRefValue, 64
-SamsungRefValue:
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-	.byte	-92
-	.byte	-91
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-	.byte	-5
-	.byte	-8
-	.byte	7
-	.byte	12
-	.byte	2
-	.byte	0
-	.section	.data.NandOptPara,"aw",%progbits
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-	.type	NandOptPara, %object
-	.size	NandOptPara, 128
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-	.byte	112
-	.byte	112
-	.byte	112
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-	.space	14
-	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
-	.align	1
-.LANCHOR54 = . + 0
-	.type	c_ftl_nand_blks_per_die, %object
-	.size	c_ftl_nand_blks_per_die, 2
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-	.align	1
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-	.type	g_gc_cur_blk_valid_pages, %object
-	.size	g_gc_cur_blk_valid_pages, 2
-g_gc_cur_blk_valid_pages:
-	.space	2
-	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-.LANCHOR217 = . + 0
-	.type	g_totle_read_sector, %object
-	.size	g_totle_read_sector, 4
-g_totle_read_sector:
+	.set	.LANCHOR157,. + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
 	.space	4
-	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
-.LANCHOR42 = . + 0
-	.type	c_ftl_nand_max_sys_blks, %object
-	.size	c_ftl_nand_max_sys_blks, 4
-c_ftl_nand_max_sys_blks:
+	.set	.LANCHOR239,. + 0
+	.type	g_LowFormat, %object
+	.size	g_LowFormat, 4
+g_LowFormat:
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-	.section	.bss.g_slc2KBNand,"aw",%nobits
-.LANCHOR0 = . + 0
-	.type	g_slc2KBNand, %object
-	.size	g_slc2KBNand, 1
-g_slc2KBNand:
-	.space	1
-	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-.LANCHOR147 = . + 0
-	.type	gNandFlashIDBEccBits, %object
-	.size	gNandFlashIDBEccBits, 1
-gNandFlashIDBEccBits:
-	.space	1
-	.section	.data.Toshiba15RefValue,"aw",%progbits
-.LANCHOR12 = . + 0
-	.type	Toshiba15RefValue, %object
-	.size	Toshiba15RefValue, 95
-Toshiba15RefValue:
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-	.byte	5
-	.byte	6
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-	.byte	120
-	.byte	0
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-	.byte	114
-	.byte	0
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-	.align	1
-.LANCHOR138 = . + 0
-	.type	g_gc_next_blk_1, %object
-	.size	g_gc_next_blk_1, 2
-g_gc_next_blk_1:
-	.space	2
-	.section	.rodata.__func__.7749,"a",%progbits
-.LANCHOR213 = . + 0
-	.type	__func__.7749, %object
-	.size	__func__.7749, 31
-__func__.7749:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
-	.section	.rodata.__func__.7403,"a",%progbits
-.LANCHOR240 = . + 0
-	.type	__func__.7403, %object
-	.size	__func__.7403, 10
-__func__.7403:
-	.ascii	"ftl_write\000"
-	.section	.rodata.__func__.8186,"a",%progbits
-.LANCHOR210 = . + 0
-	.type	__func__.8186, %object
-	.size	__func__.8186, 25
-__func__.8186:
-	.ascii	"allocate_data_superblock\000"
-	.section	.bss.g_free_slc_blk_num,"aw",%nobits
-	.align	1
-.LANCHOR117 = . + 0
-	.type	g_free_slc_blk_num, %object
-	.size	g_free_slc_blk_num, 2
-g_free_slc_blk_num:
-	.space	2
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-	.align	1
-.LANCHOR70 = . + 0
-	.type	c_ftl_nand_map_region_num, %object
-	.size	c_ftl_nand_map_region_num, 2
-c_ftl_nand_map_region_num:
-	.space	2
-	.section	.bss.req_gc,"aw",%nobits
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-.LANCHOR123 = . + 0
-	.type	req_gc, %object
-	.size	req_gc, 4
-req_gc:
+	.set	.LANCHOR67,. + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
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 	.space	4
-	.section	.bss.gpNandc,"aw",%nobits
+	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-.LANCHOR30 = . + 0
-	.type	gpNandc, %object
-	.size	gpNandc, 4
-gpNandc:
+	.set	.LANCHOR226,. + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
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-	.section	.rodata.__func__.8035,"a",%progbits
-.LANCHOR228 = . + 0
-	.type	__func__.8035, %object
-	.size	__func__.8035, 22
-__func__.8035:
-	.ascii	"FtlRecoverySuperblock\000"
-	.section	.bss.g_totle_vendor_block,"aw",%nobits
-	.align	1
-.LANCHOR74 = . + 0
-	.type	g_totle_vendor_block, %object
-	.size	g_totle_vendor_block, 2
-g_totle_vendor_block:
-	.space	2
-	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-.LANCHOR102 = . + 0
-	.type	p_l2p_ram_map, %object
-	.size	p_l2p_ram_map, 4
-p_l2p_ram_map:
+	.set	.LANCHOR71,. + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
 	.space	4
-	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
 	.align	2
-	.type	FlashWaitBusyScheduleEn, %object
-	.size	FlashWaitBusyScheduleEn, 4
-FlashWaitBusyScheduleEn:
+	.set	.LANCHOR155,. + 0
+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
+g_SlcPartLbaEndSector:
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-	.type	p_plane_order_table, %object
-	.size	p_plane_order_table, 32
-p_plane_order_table:
-	.space	32
-	.section	.bss.DieCsIndex,"aw",%nobits
+	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-.LANCHOR19 = . + 0
-	.type	DieCsIndex, %object
-	.size	DieCsIndex, 8
-DieCsIndex:
-	.space	8
-	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.set	.LANCHOR99,. + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
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-	.type	g_totle_cache_write_count, %object
-	.size	g_totle_cache_write_count, 4
-g_totle_cache_write_count:
+	.set	.LANCHOR90,. + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.align	2
+	.set	.LANCHOR156,. + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
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-	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+	.set	.LANCHOR91,. + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+	.set	.LANCHOR72,. + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+	.set	.LANCHOR187,. + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+	.set	.LANCHOR218,. + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.align	2
+	.set	.LANCHOR75,. + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.space	4
+	.section	.bss.g_free_slc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR137,. + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR241,. + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-.LANCHOR62 = . + 0
-	.type	c_ftl_nand_byte_pre_oob, %object
-	.size	c_ftl_nand_byte_pre_oob, 2
-c_ftl_nand_byte_pre_oob:
+	.set	.LANCHOR116,. + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR114,. + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR140 = . + 0
+	.set	.LANCHOR115,. + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
 	.space	34
-	.section	.bss.gFlashSdrModeEn,"aw",%nobits
-	.type	gFlashSdrModeEn, %object
-	.size	gFlashSdrModeEn, 1
-gFlashSdrModeEn:
-	.space	1
-	.section	.rodata.__func__.7860,"a",%progbits
-.LANCHOR206 = . + 0
-	.type	__func__.7860, %object
-	.size	__func__.7860, 15
-__func__.7860:
-	.ascii	"FtlVpcTblFlush\000"
-	.section	.bss.p_data_block_list_tail,"aw",%nobits
-	.align	2
-.LANCHOR90 = . + 0
-	.type	p_data_block_list_tail, %object
-	.size	p_data_block_list_tail, 4
-p_data_block_list_tail:
-	.space	4
-	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-.LANCHOR229 = . + 0
-	.type	g_power_lost_ecc_error_blk, %object
-	.size	g_power_lost_ecc_error_blk, 2
-g_power_lost_ecc_error_blk:
+	.set	.LANCHOR176,. + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
 	.space	2
-	.section	.bss.gFlashInterfaceMode,"aw",%nobits
-.LANCHOR34 = . + 0
-	.type	gFlashInterfaceMode, %object
-	.size	gFlashInterfaceMode, 1
-gFlashInterfaceMode:
-	.space	1
-	.section	.bss.p_map_block_ver_table,"aw",%nobits
-	.align	2
-.LANCHOR113 = . + 0
-	.type	p_map_block_ver_table, %object
-	.size	p_map_block_ver_table, 4
-p_map_block_ver_table:
-	.space	4
-	.section	.bss.gNandcEccBits,"aw",%nobits
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+	.set	.LANCHOR109,. + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR237,. + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+	.set	.LANCHOR236,. + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+	.set	.LANCHOR174,. + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-.LANCHOR36 = . + 0
-	.type	gNandcEccBits, %object
-	.size	gNandcEccBits, 4
-gNandcEccBits:
+	.set	.LANCHOR171,. + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
 	.space	4
-	.section	.data.ToshibaA19RefValue,"aw",%progbits
-.LANCHOR10 = . + 0
-	.type	ToshibaA19RefValue, %object
-	.size	ToshibaA19RefValue, 45
-ToshibaA19RefValue:
-	.byte	4
-	.byte	5
-	.byte	6
-	.byte	7
-	.byte	13
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	4
-	.byte	4
-	.byte	124
-	.byte	126
-	.byte	0
-	.byte	0
-	.byte	124
-	.byte	120
-	.byte	120
-	.byte	0
-	.byte	124
-	.byte	118
-	.byte	116
-	.byte	114
-	.byte	0
-	.byte	8
-	.byte	8
-	.byte	0
-	.byte	0
-	.byte	0
-	.byte	11
-	.byte	126
-	.byte	118
-	.byte	116
-	.byte	0
-	.byte	16
-	.byte	118
-	.byte	114
-	.byte	112
-	.byte	0
-	.byte	2
-	.byte	0
-	.byte	126
-	.byte	124
-	.byte	0
-	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-.LANCHOR127 = . + 0
-	.type	g_totle_swl_count, %object
-	.size	g_totle_swl_count, 4
-g_totle_swl_count:
+	.set	.LANCHOR172,. + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
 	.space	4
-	.section	.bss.gBbtInfo,"aw",%nobits
-	.align	2
-.LANCHOR78 = . + 0
-	.type	gBbtInfo, %object
-	.size	gBbtInfo, 60
-gBbtInfo:
-	.space	60
-	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-.LANCHOR61 = . + 0
-	.type	c_ftl_nand_byte_pre_page, %object
-	.size	c_ftl_nand_byte_pre_page, 2
-c_ftl_nand_byte_pre_page:
+	.set	.LANCHOR175,. + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
 	.space	2
-	.section	.bss.req_gc_dst,"aw",%nobits
-	.align	2
-.LANCHOR178 = . + 0
-	.type	req_gc_dst, %object
-	.size	req_gc_dst, 4
-req_gc_dst:
-	.space	4
-	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
-.LANCHOR1 = . + 0
-	.type	gNandIDBResBlkNum, %object
-	.size	gNandIDBResBlkNum, 1
-gNandIDBResBlkNum:
-	.space	1
-	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR112,. + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+	.set	.LANCHOR113,. + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-.LANCHOR39 = . + 0
-	.type	gNandcDumpWriteEn, %object
-	.size	gNandcDumpWriteEn, 4
-gNandcDumpWriteEn:
+	.set	.LANCHOR102,. + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
 	.space	4
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+	.set	.LANCHOR110,. + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
 	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
 	.align	1
-.LANCHOR176 = . + 0
+	.set	.LANCHOR177,. + 0
 	.type	g_gc_refresh_block_temp_num, %object
 	.size	g_gc_refresh_block_temp_num, 2
 g_gc_refresh_block_temp_num:
 	.space	2
-	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR126 = . + 0
-	.type	g_tmp_data_superblock_id, %object
-	.size	g_tmp_data_superblock_id, 2
-g_tmp_data_superblock_id:
-	.space	2
-	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-.LANCHOR46 = . + 0
-	.type	c_ftl_nand_totle_phy_blks, %object
-	.size	c_ftl_nand_totle_phy_blks, 4
-c_ftl_nand_totle_phy_blks:
+	.set	.LANCHOR173,. + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
 	.space	4
-	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
-	.align	1
-.LANCHOR195 = . + 0
-	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
-	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
-ftl_gc_temp_block_bops_scan_page_addr:
-	.short	-1
-	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-.LANCHOR114 = . + 0
-	.type	p_map_region_ppn_table, %object
-	.size	p_map_region_ppn_table, 4
-p_map_region_ppn_table:
-	.space	4
-	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
-	.align	1
-.LANCHOR63 = . + 0
-	.type	c_ftl_nand_reserved_blks, %object
-	.size	c_ftl_nand_reserved_blks, 2
-c_ftl_nand_reserved_blks:
-	.space	2
-	.section	.bss.p_gc_page_info,"aw",%nobits
+	.set	.LANCHOR201,. + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-.LANCHOR136 = . + 0
-	.type	p_gc_page_info, %object
-	.size	p_gc_page_info, 4
-p_gc_page_info:
-	.space	4
-	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
-	.align	1
-.LANCHOR71 = . + 0
-	.type	c_ftl_nand_l2pmap_ram_region_num, %object
-	.size	c_ftl_nand_l2pmap_ram_region_num, 2
-c_ftl_nand_l2pmap_ram_region_num:
-	.space	2
-	.section	.bss.gc_discard_updated,"aw",%nobits
+	.set	.LANCHOR92,. + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-.LANCHOR227 = . + 0
-	.type	gc_discard_updated, %object
-	.size	gc_discard_updated, 4
-gc_discard_updated:
+	.set	.LANCHOR169,. + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
 	.space	4
-	.section	.rodata.__func__.8384,"a",%progbits
-.LANCHOR236 = . + 0
-	.type	__func__.8384, %object
-	.size	__func__.8384, 23
-__func__.8384:
-	.ascii	"rk_ftl_garbage_collect\000"
-	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
-	.align	1
-.LANCHOR186 = . + 0
-	.type	g_ect_tbl_info_size, %object
-	.size	g_ect_tbl_info_size, 2
-g_ect_tbl_info_size:
-	.space	2
-	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-.LANCHOR155 = . + 0
-	.type	g_all_blk_used_slc_mode, %object
-	.size	g_all_blk_used_slc_mode, 4
-g_all_blk_used_slc_mode:
+	.set	.LANCHOR170,. + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
 	.space	4
-	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
-	.align	1
-.LANCHOR66 = . + 0
-	.type	c_ftl_nand_vendor_region_num, %object
-	.size	c_ftl_nand_vendor_region_num, 2
-c_ftl_nand_vendor_region_num:
-	.space	2
-	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-.LANCHOR239 = . + 0
-	.type	g_ftl_nand_free_count, %object
-	.size	g_ftl_nand_free_count, 4
-g_ftl_nand_free_count:
+	.set	.LANCHOR101,. + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
 	.space	4
-	.section	.data.ToshibaRefValue,"aw",%progbits
-.LANCHOR13 = . + 0
-	.type	ToshibaRefValue, %object
-	.size	ToshibaRefValue, 8
-ToshibaRefValue:
-	.byte	0
-	.byte	4
-	.byte	124
-	.byte	120
-	.byte	116
-	.byte	8
-	.byte	12
-	.byte	112
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-.LANCHOR103 = . + 0
+	.set	.LANCHOR96,. + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
-	.section	.bss.g_gc_page_offset,"aw",%nobits
-	.align	1
-.LANCHOR135 = . + 0
-	.type	g_gc_page_offset, %object
-	.size	g_gc_page_offset, 2
-g_gc_page_offset:
-	.space	2
-	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.section	.bss.g_maxRegNum,"aw",%nobits
+	.set	.LANCHOR13,. + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+	.set	.LANCHOR147,. + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR193 = . + 0
-	.type	gMasterTempBuf, %object
-	.size	gMasterTempBuf, 4
-gMasterTempBuf:
+	.set	.LANCHOR167,. + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
 	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR204 = . + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
+	.set	.LANCHOR168,. + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
 	.space	4
-	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-.LANCHOR68 = . + 0
-	.type	c_ftl_nand_max_map_blks, %object
-	.size	c_ftl_nand_max_map_blks, 4
-c_ftl_nand_max_map_blks:
+	.set	.LANCHOR152,. + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
 	.space	4
-	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR84,. + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+	.set	.LANCHOR87,. + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.align	1
+	.set	.LANCHOR68,. + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.space	2
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+	.set	.LANCHOR229,. + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+	.set	.LANCHOR230,. + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-.LANCHOR163 = . + 0
-	.type	g_totle_read_page_count, %object
-	.size	g_totle_read_page_count, 4
-g_totle_read_page_count:
+	.set	.LANCHOR133,. + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
 	.space	4
-	.section	.bss.g_gc_num_req,"aw",%nobits
+	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-.LANCHOR119 = . + 0
-	.type	g_gc_num_req, %object
-	.size	g_gc_num_req, 4
-g_gc_num_req:
+	.set	.LANCHOR231,. + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
 	.space	4
-	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-.LANCHOR130 = . + 0
-	.type	p_swl_mul_table, %object
-	.size	p_swl_mul_table, 4
-p_swl_mul_table:
-	.space	4
-	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.set	.LANCHOR232,. + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.g_req_cache,"aw",%nobits
 	.align	2
-.LANCHOR128 = . + 0
-	.type	ftl_gc_temp_power_lost_recovery_flag, %object
-	.size	ftl_gc_temp_power_lost_recovery_flag, 4
-ftl_gc_temp_power_lost_recovery_flag:
+	.set	.LANCHOR129,. + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
 	.space	4
-	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.section	.bss.g_retryMode,"aw",%nobits
+	.set	.LANCHOR10,. + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.g_slc2KBNand,"aw",%nobits
+	.set	.LANCHOR1,. + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.space	1
+	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-.LANCHOR181 = . + 0
-	.type	p_vendor_data_buf, %object
-	.size	p_vendor_data_buf, 4
-p_vendor_data_buf:
+	.set	.LANCHOR136,. + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+	.set	.LANCHOR135,. + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+	.set	.LANCHOR130,. + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR202,. + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
 	.space	4
-	.section	.rodata.__func__.8002,"a",%progbits
-.LANCHOR222 = . + 0
-	.type	__func__.8002, %object
-	.size	__func__.8002, 16
-__func__.8002:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.7879,"a",%progbits
-.LANCHOR197 = . + 0
-	.type	__func__.7879, %object
-	.size	__func__.7879, 14
-__func__.7879:
-	.ascii	"FtlScanSysBlk\000"
-	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-.LANCHOR190 = . + 0
-	.type	p_vendor_region_ppn_table, %object
-	.size	p_vendor_region_ppn_table, 4
-p_vendor_region_ppn_table:
+	.set	.LANCHOR162,. + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
 	.space	4
-	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-.LANCHOR108 = . + 0
-	.type	p_map_block_valid_page_count, %object
-	.size	p_map_block_valid_page_count, 4
-p_map_block_valid_page_count:
+	.set	.LANCHOR161,. + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
 	.space	4
-	.section	.bss.req_prgm,"aw",%nobits
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-.LANCHOR179 = . + 0
-	.type	req_prgm, %object
-	.size	req_prgm, 4
-req_prgm:
+	.set	.LANCHOR159,. + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-.LANCHOR162 = . + 0
+	.set	.LANCHOR163,. + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
-	.section	.bss.g_num_data_superblocks,"aw",%nobits
-	.align	1
-.LANCHOR91 = . + 0
-	.type	g_num_data_superblocks, %object
-	.size	g_num_data_superblocks, 2
-g_num_data_superblocks:
-	.space	2
-	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-.LANCHOR44 = . + 0
-	.type	c_ftl_nand_blk_pre_plane, %object
-	.size	c_ftl_nand_blk_pre_plane, 2
-c_ftl_nand_blk_pre_plane:
+	.set	.LANCHOR125,. + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
 	.space	2
-	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR170 = . + 0
-	.type	g_gc_head_data_block, %object
-	.size	g_gc_head_data_block, 4
-g_gc_head_data_block:
+	.set	.LANCHOR165,. + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR164,. + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+	.set	.LANCHOR217,. + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR165 = . + 0
+	.set	.LANCHOR166,. + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
-	.section	.rodata.__func__.7685,"a",%progbits
-.LANCHOR100 = . + 0
-	.type	__func__.7685, %object
-	.size	__func__.7685, 22
-__func__.7685:
-	.ascii	"List_update_data_list\000"
-	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR131,. + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR78,. + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-.LANCHOR133 = . + 0
-	.type	g_gc_blk_num, %object
-	.size	g_gc_blk_num, 2
-g_gc_blk_num:
+	.set	.LANCHOR69,. + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
 	.space	2
-	.section	.bss.req_read,"aw",%nobits
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+	.set	.LANCHOR160,. + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-.LANCHOR177 = . + 0
-	.type	req_read, %object
-	.size	req_read, 4
-req_read:
+	.set	.LANCHOR216,. + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
 	.space	4
-	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-.LANCHOR211 = . + 0
-	.type	g_totle_avg_erase_count, %object
-	.size	g_totle_avg_erase_count, 4
-g_totle_avg_erase_count:
+	.set	.LANCHOR222,. + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
 	.space	4
-	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
-	.align	1
-.LANCHOR49 = . + 0
-	.type	c_ftl_nand_planes_per_die, %object
-	.size	c_ftl_nand_planes_per_die, 2
-c_ftl_nand_planes_per_die:
-	.space	2
-	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-.LANCHOR174 = . + 0
-	.type	g_gc_merge_free_blk_threshold, %object
-	.size	g_gc_merge_free_blk_threshold, 2
-g_gc_merge_free_blk_threshold:
+	.set	.LANCHOR235,. + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
 	.space	2
-	.section	.bss.g_MaxLpn,"aw",%nobits
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
 	.align	2
-.LANCHOR76 = . + 0
-	.type	g_MaxLpn, %object
-	.size	g_MaxLpn, 4
-g_MaxLpn:
+	.set	.LANCHOR142,. + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
 	.space	4
 	.section	.bss.gpNandParaInfo,"aw",%nobits
 	.align	2
-.LANCHOR23 = . + 0
+	.set	.LANCHOR18,. + 0
 	.type	gpNandParaInfo, %object
 	.size	gpNandParaInfo, 4
 gpNandParaInfo:
 	.space	4
-	.section	.bss.g_LowFormat,"aw",%nobits
+	.section	.bss.gpNandc,"aw",%nobits
 	.align	2
-.LANCHOR237 = . + 0
-	.type	g_LowFormat, %object
-	.size	g_LowFormat, 4
-g_LowFormat:
+	.set	.LANCHOR19,. + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 4
+gpNandc:
 	.space	4
-	.section	.bss.c_ftl_nand_type,"aw",%nobits
-	.align	1
-.LANCHOR47 = . + 0
-	.type	c_ftl_nand_type, %object
-	.size	c_ftl_nand_type, 2
-c_ftl_nand_type:
-	.space	2
-	.section	.bss.gSysFreeQueue,"aw",%nobits
-	.align	1
-.LANCHOR81 = . + 0
-	.type	gSysFreeQueue, %object
-	.size	gSysFreeQueue, 2056
-gSysFreeQueue:
-	.space	2056
-	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
+	.section	.bss.gpNandc1,"aw",%nobits
 	.align	2
-.LANCHOR8 = . + 0
-	.type	slcPageToMlcPageTbl, %object
-	.size	slcPageToMlcPageTbl, 512
-slcPageToMlcPageTbl:
-	.space	512
-	.section	.rodata.__func__.7317,"a",%progbits
-.LANCHOR238 = . + 0
-	.type	__func__.7317, %object
-	.size	__func__.7317, 8
-__func__.7317:
-	.ascii	"FtlInit\000"
-	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.type	gpNandc1, %object
+	.size	gpNandc1, 4
+gpNandc1:
+	.space	4
+	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-.LANCHOR40 = . + 0
-	.type	c_ftl_nand_sys_blks_per_plane, %object
-	.size	c_ftl_nand_sys_blks_per_plane, 4
-c_ftl_nand_sys_blks_per_plane:
+	.set	.LANCHOR149,. + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 4
+gpReadRetrial:
 	.space	4
-	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-.LANCHOR98 = . + 0
-	.type	g_buffer_superblock, %object
-	.size	g_buffer_superblock, 48
-g_buffer_superblock:
-	.space	48
-	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.set	.LANCHOR188,. + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-.LANCHOR86 = . + 0
-	.type	p_sys_data_buf, %object
-	.size	p_sys_data_buf, 4
-p_sys_data_buf:
+	.set	.LANCHOR103,. + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
 	.space	4
-	.section	.rodata.__func__.7722,"a",%progbits
-.LANCHOR101 = . + 0
-	.type	__func__.7722, %object
-	.size	__func__.7722, 26
-__func__.7722:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
-	.section	.bss.g_maxRegNum,"aw",%nobits
-.LANCHOR14 = . + 0
-	.type	g_maxRegNum, %object
-	.size	g_maxRegNum, 1
-g_maxRegNum:
-	.space	1
-	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-.LANCHOR121 = . + 0
-	.type	p_gc_spare_buf, %object
-	.size	p_gc_spare_buf, 4
-p_gc_spare_buf:
+	.set	.LANCHOR221,. + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
 	.space	4
-	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
 	.align	2
-.LANCHOR149 = . + 0
-	.type	gNandFlashInfoBlockAddr, %object
-	.size	gNandFlashInfoBlockAddr, 4
-gNandFlashInfoBlockAddr:
+	.set	.LANCHOR117,. + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.space	1024
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+	.set	.LANCHOR0,. + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
 	.space	4
-	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-	.type	p_valid_page_count_check_table, %object
-	.size	p_valid_page_count_check_table, 4
-p_valid_page_count_check_table:
+	.set	.LANCHOR81,. + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
 	.space	4
-	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-.LANCHOR185 = . + 0
-	.type	p_io_spare_buf, %object
-	.size	p_io_spare_buf, 4
-p_io_spare_buf:
+	.set	.LANCHOR80,. + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
 	.space	4
-	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
-	.align	1
-.LANCHOR53 = . + 0
-	.type	c_ftl_vendor_part_size, %object
-	.size	c_ftl_vendor_part_size, 2
-c_ftl_vendor_part_size:
-	.space	2
-	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
-	.align	1
-.LANCHOR41 = . + 0
-	.type	c_ftl_nand_planes_num, %object
-	.size	c_ftl_nand_planes_num, 2
-c_ftl_nand_planes_num:
-	.space	2
-	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-.LANCHOR182 = . + 0
-	.type	p_io_data_buf_0, %object
-	.size	p_io_data_buf_0, 4
-p_io_data_buf_0:
+	.set	.LANCHOR83,. + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
 	.space	4
-	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-.LANCHOR183 = . + 0
-	.type	p_io_data_buf_1, %object
-	.size	p_io_data_buf_1, 4
-p_io_data_buf_1:
+	.set	.LANCHOR77,. + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
 	.space	4
-	.section	.data.power_up_flag,"aw",%progbits
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-	.type	power_up_flag, %object
-	.size	power_up_flag, 4
-power_up_flag:
-	.word	1
-	.section	.rodata.__func__.8109,"a",%progbits
-.LANCHOR118 = . + 0
-	.type	__func__.8109, %object
-	.size	__func__.8109, 18
-__func__.8109:
-	.ascii	"SupperBlkListInit\000"
-	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.set	.LANCHOR86,. + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-.LANCHOR159 = . + 0
-	.type	g_totle_write_page_count, %object
-	.size	g_totle_write_page_count, 4
-g_totle_write_page_count:
+	.set	.LANCHOR108,. + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
 	.space	4
-	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR158 = . + 0
-	.type	g_totle_gc_page_count, %object
-	.size	g_totle_gc_page_count, 4
-g_totle_gc_page_count:
+	.set	.LANCHOR104,. + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
 	.space	4
-	.section	.bss.g_min_erase_count,"aw",%nobits
+	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-.LANCHOR167 = . + 0
-	.type	g_min_erase_count, %object
-	.size	g_min_erase_count, 4
-g_min_erase_count:
+	.set	.LANCHOR111,. + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
 	.space	4
-	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
-	.align	1
-.LANCHOR105 = . + 0
-	.type	FtlUpdateVaildLpnCount, %object
-	.size	FtlUpdateVaildLpnCount, 2
-FtlUpdateVaildLpnCount:
-	.space	2
-	.section	.rodata.__func__.7762,"a",%progbits
-.LANCHOR214 = . + 0
-	.type	__func__.7762, %object
-	.size	__func__.7762, 16
-__func__.7762:
-	.ascii	"FtlMapWritePage\000"
-	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR180 = . + 0
-	.type	p_sys_data_buf_1, %object
-	.size	p_sys_data_buf_1, 4
-p_sys_data_buf_1:
+	.set	.LANCHOR105,. + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
 	.space	4
-	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-.LANCHOR168 = . + 0
-	.type	g_in_gc_progress, %object
-	.size	g_in_gc_progress, 4
-g_in_gc_progress:
+	.set	.LANCHOR183,. + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
 	.space	4
-	.section	.bss.gNandChipMap,"aw",%nobits
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR5 = . + 0
-	.type	gNandChipMap, %object
-	.size	gNandChipMap, 32
-gNandChipMap:
-	.space	32
-	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
-	.align	1
-.LANCHOR141 = . + 0
-	.type	g_gc_bad_block_gc_index, %object
-	.size	g_gc_bad_block_gc_index, 2
-g_gc_bad_block_gc_index:
-	.space	2
-	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.set	.LANCHOR184,. + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR186,. + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+	.set	.LANCHOR123,. + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-.LANCHOR69 = . + 0
-	.type	c_ftl_nand_init_sys_blks_per_plane, %object
-	.size	c_ftl_nand_init_sys_blks_per_plane, 4
-c_ftl_nand_init_sys_blks_per_plane:
+	.set	.LANCHOR95,. + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
 	.space	4
-	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-.LANCHOR93 = . + 0
-	.type	p_free_data_block_list_head, %object
-	.size	p_free_data_block_list_head, 4
-p_free_data_block_list_head:
+	.set	.LANCHOR126,. + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
 	.space	4
-	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR25 = . + 0
-	.type	gNandIDataBuf, %object
-	.size	gNandIDataBuf, 2048
-gNandIDataBuf:
-	.space	2048
-	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.set	.LANCHOR122,. + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR28 = . + 0
-	.type	gNandPhyInfo, %object
-	.size	gNandPhyInfo, 28
-gNandPhyInfo:
-	.space	28
-	.section	.bss.gSysInfo,"aw",%nobits
+	.set	.LANCHOR127,. + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
 	.align	2
-.LANCHOR196 = . + 0
-	.type	gSysInfo, %object
-	.size	gSysInfo, 12
-gSysInfo:
-	.space	12
-	.section	.bss.g_gc_blk_index,"aw",%nobits
-	.align	1
-.LANCHOR175 = . + 0
-	.type	g_gc_blk_index, %object
-	.size	g_gc_blk_index, 2
-g_gc_blk_index:
-	.space	2
-	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
-	.align	1
-.LANCHOR173 = . + 0
-	.type	g_gc_free_blk_threshold, %object
-	.size	g_gc_free_blk_threshold, 2
-g_gc_free_blk_threshold:
-	.space	2
-	.section	.bss.g_max_erase_count,"aw",%nobits
+	.set	.LANCHOR192,. + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 4
+p_map_region_ppn_check_table:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR166 = . + 0
-	.type	g_max_erase_count, %object
-	.size	g_max_erase_count, 4
-g_max_erase_count:
+	.set	.LANCHOR128,. + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
 	.space	4
-	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.section	.bss.p_plane_order_table,"aw",%nobits
+	.set	.LANCHOR45,. + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-.LANCHOR215 = . + 0
-	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 44
-gVendorBlkInfo:
-	.space	44
-	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.set	.LANCHOR134,. + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR157 = . + 0
-	.type	g_GlobalDataVersion, %object
-	.size	g_GlobalDataVersion, 4
-g_GlobalDataVersion:
+	.set	.LANCHOR79,. + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
 	.space	4
-	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR224 = . + 0
-	.type	gp_last_act_superblock, %object
-	.size	gp_last_act_superblock, 4
-gp_last_act_superblock:
+	.set	.LANCHOR181,. + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
 	.space	4
-	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
-	.align	1
-.LANCHOR65 = . + 0
-	.type	c_ftl_nand_max_vendor_blks, %object
-	.size	c_ftl_nand_max_vendor_blks, 2
-c_ftl_nand_max_vendor_blks:
-	.space	2
-	.section	.data.random_seed,"aw",%progbits
-	.align	1
-.LANCHOR3 = . + 0
-	.type	random_seed, %object
-	.size	random_seed, 256
-random_seed:
-	.short	22378
-	.short	1512
-	.short	25245
-	.short	17827
-	.short	25756
-	.short	19440
-	.short	9026
-	.short	10030
-	.short	29528
-	.short	20467
-	.short	29676
-	.short	24432
-	.short	31328
-	.short	6872
-	.short	13426
-	.short	13842
-	.short	8783
-	.short	1108
-	.short	782
-	.short	28837
-	.short	30729
-	.short	9505
-	.short	18676
-	.short	23085
-	.short	18730
-	.short	1085
-	.short	32609
-	.short	14697
-	.short	20858
-	.short	15170
-	.short	30365
-	.short	1607
-	.short	32298
-	.short	4995
-	.short	18905
-	.short	1976
-	.short	9592
-	.short	20204
-	.short	17443
-	.short	13615
-	.short	23330
-	.short	29369
-	.short	13947
-	.short	9398
-	.short	32398
-	.short	8984
-	.short	27600
-	.short	21785
-	.short	6019
-	.short	6311
-	.short	31598
-	.short	30210
-	.short	19327
-	.short	13896
-	.short	11347
-	.short	27545
-	.short	3107
-	.short	26575
-	.short	32270
-	.short	19852
-	.short	20601
-	.short	8349
-	.short	9290
-	.short	29819
-	.short	13579
-	.short	3661
-	.short	28676
-	.short	27331
-	.short	32574
-	.short	8693
-	.short	31253
-	.short	9081
-	.short	5399
-	.short	6842
-	.short	20087
-	.short	5537
-	.short	1274
-	.short	11617
-	.short	9530
-	.short	4866
-	.short	8035
-	.short	23219
-	.short	1178
-	.short	23272
-	.short	7383
-	.short	18944
-	.short	12488
-	.short	12871
-	.short	29340
-	.short	20532
-	.short	11022
-	.short	22514
-	.short	228
-	.short	22363
-	.short	24978
-	.short	14584
-	.short	12138
-	.short	3092
-	.short	17916
-	.short	16863
-	.short	14554
-	.short	31457
-	.short	29474
-	.short	25311
-	.short	24121
-	.short	3684
-	.short	28037
-	.short	22865
-	.short	22839
-	.short	25217
-	.short	13217
-	.short	27186
-	.short	14938
-	.short	11180
-	.short	29754
-	.short	24180
-	.short	15150
-	.short	32455
-	.short	20434
-	.short	23848
-	.short	29983
-	.short	16120
-	.short	14769
-	.short	20041
-	.short	29803
-	.short	28406
-	.short	17598
-	.short	28087
-	.section	.rodata.__func__.7655,"a",%progbits
-.LANCHOR96 = . + 0
-	.type	__func__.7655, %object
-	.size	__func__.7655, 17
-__func__.7655:
-	.ascii	"List_remove_node\000"
-	.section	.bss.gNandMaxDie,"aw",%nobits
-.LANCHOR16 = . + 0
-	.type	gNandMaxDie, %object
-	.size	gNandMaxDie, 1
-gNandMaxDie:
-	.space	1
-	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR120 = . + 0
-	.type	p_gc_data_buf, %object
-	.size	p_gc_data_buf, 4
-p_gc_data_buf:
+	.set	.LANCHOR185,. + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
 	.space	4
-	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
 	.align	2
-.LANCHOR72 = . + 0
-	.type	g_MaxLbaSector, %object
-	.size	g_MaxLbaSector, 4
-g_MaxLbaSector:
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
 	.space	4
-	.section	.bss.p_erase_count_table,"aw",%nobits
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-.LANCHOR84 = . + 0
-	.type	p_erase_count_table, %object
-	.size	p_erase_count_table, 4
-p_erase_count_table:
+	.set	.LANCHOR82,. + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-.LANCHOR75 = . + 0
+	.set	.LANCHOR70,. + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
 	.space	4
-	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR88 = . + 0
-	.type	p_data_block_list_head, %object
-	.size	p_data_block_list_head, 4
-p_data_block_list_head:
+	.set	.LANCHOR189,. + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
 	.space	4
-	.section	.bss.gNandOptPara,"aw",%nobits
-.LANCHOR6 = . + 0
-	.type	gNandOptPara, %object
-	.size	gNandOptPara, 32
-gNandOptPara:
-	.space	32
-	.section	.bss.g_sys_save_data,"aw",%nobits
-	.align	2
-.LANCHOR131 = . + 0
-	.type	g_sys_save_data, %object
-	.size	g_sys_save_data, 48
-g_sys_save_data:
-	.space	48
-	.section	.bss.g_VaildLpn,"aw",%nobits
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR106 = . + 0
-	.type	g_VaildLpn, %object
-	.size	g_VaildLpn, 4
-g_VaildLpn:
+	.set	.LANCHOR190,. + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
 	.space	4
-	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR231 = . + 0
-	.type	g_recovery_page_num, %object
-	.size	g_recovery_page_num, 4
-g_recovery_page_num:
+	.set	.LANCHOR182,. + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
 	.space	4
-	.section	.bss.gTotleBlock,"aw",%nobits
-	.align	1
-.LANCHOR24 = . + 0
-	.type	gTotleBlock, %object
-	.size	gTotleBlock, 2
-gTotleBlock:
-	.space	2
-	.section	.rodata.__func__.7782,"a",%progbits
-.LANCHOR104 = . + 0
-	.type	__func__.7782, %object
-	.size	__func__.7782, 22
-__func__.7782:
-	.ascii	"select_l2p_ram_region\000"
-	.section	.rodata.__func__.8222,"a",%progbits
-.LANCHOR208 = . + 0
-	.type	__func__.8222, %object
-	.size	__func__.8222, 20
-__func__.8222:
-	.ascii	"decrement_vpc_count\000"
-	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
-	.align	1
-	.type	g_gc_refresh_block_temp_tbl, %object
-	.size	g_gc_refresh_block_temp_tbl, 34
-g_gc_refresh_block_temp_tbl:
-	.space	34
-	.section	.bss.IDByte,"aw",%nobits
-	.align	2
-.LANCHOR22 = . + 0
-	.type	IDByte, %object
-	.size	IDByte, 32
-IDByte:
-	.space	32
-	.section	.bss.g_gc_temp_superblock,"aw",%nobits
-	.align	2
-.LANCHOR99 = . + 0
-	.type	g_gc_temp_superblock, %object
-	.size	g_gc_temp_superblock, 48
-g_gc_temp_superblock:
-	.space	48
-	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
-	.align	1
-.LANCHOR57 = . + 0
-	.type	c_ftl_nand_page_pre_slc_blk, %object
-	.size	c_ftl_nand_page_pre_slc_blk, 2
-c_ftl_nand_page_pre_slc_blk:
-	.space	2
-	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR2 = . + 0
-	.type	gBlockPageAlignSize, %object
-	.size	gBlockPageAlignSize, 4
-gBlockPageAlignSize:
+	.set	.LANCHOR191,. + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
 	.space	4
-	.section	.rodata.__func__.8200,"a",%progbits
-.LANCHOR219 = . + 0
-	.type	__func__.8200, %object
-	.size	__func__.8200, 29
-__func__.8200:
-	.ascii	"allocate_new_data_superblock\000"
-	.section	.bss.g_gc_superblock,"aw",%nobits
-	.align	2
-.LANCHOR202 = . + 0
-	.type	g_gc_superblock, %object
-	.size	g_gc_superblock, 48
-g_gc_superblock:
-	.space	48
-	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
-	.align	2
-.LANCHOR85 = . + 0
-	.type	g_totle_sys_slc_erase_count, %object
-	.size	g_totle_sys_slc_erase_count, 4
-g_totle_sys_slc_erase_count:
+	.section	.bss.read_retry_cur_offset,"aw",%nobits
+	.set	.LANCHOR21,. + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
+read_retry_cur_offset:
 	.space	4
-	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
-	.align	1
-.LANCHOR55 = . + 0
-	.type	c_ftl_nand_blks_per_die_shift, %object
-	.size	c_ftl_nand_blks_per_die_shift, 2
-c_ftl_nand_blks_per_die_shift:
-	.space	2
-	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
+	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-.LANCHOR154 = . + 0
-	.type	g_SlcPartLbaEndSector, %object
-	.size	g_SlcPartLbaEndSector, 4
-g_SlcPartLbaEndSector:
+	.set	.LANCHOR76,. + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
 	.space	4
-	.section	.rodata.__func__.8206,"a",%progbits
-.LANCHOR209 = . + 0
-	.type	__func__.8206, %object
-	.size	__func__.8206, 19
-__func__.8206:
-	.ascii	"get_new_active_ppa\000"
-	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
-	.align	1
-.LANCHOR235 = . + 0
-	.type	g_gc_cur_blk_max_valid_pages, %object
-	.size	g_gc_cur_blk_max_valid_pages, 2
-g_gc_cur_blk_max_valid_pages:
-	.space	2
-	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-.LANCHOR160 = . + 0
-	.type	g_totle_discard_page_count, %object
-	.size	g_totle_discard_page_count, 4
-g_totle_discard_page_count:
+	.set	.LANCHOR106,. + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
 	.space	4
-	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
-	.align	1
-.LANCHOR79 = . + 0
-	.type	c_ftl_nand_bbm_buf_size, %object
-	.size	c_ftl_nand_bbm_buf_size, 2
-c_ftl_nand_bbm_buf_size:
-	.space	2
-	.section	.bss.gL2pMapInfo,"aw",%nobits
-	.align	2
-.LANCHOR110 = . + 0
-	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 44
-gL2pMapInfo:
-	.space	44
-	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-.LANCHOR171 = . + 0
-	.type	g_gc_head_data_block_count, %object
-	.size	g_gc_head_data_block_count, 4
-g_gc_head_data_block_count:
+	.set	.LANCHOR179,. + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
 	.space	4
-	.section	.bss.gFlashPageBuffer0,"aw",%nobits
+	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-.LANCHOR146 = . + 0
-	.type	gFlashPageBuffer0, %object
-	.size	gFlashPageBuffer0, 4
-gFlashPageBuffer0:
+	.set	.LANCHOR180,. + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
 	.space	4
-	.section	.bss.g_req_cache,"aw",%nobits
+	.section	.bss.req_read,"aw",%nobits
 	.align	2
-.LANCHOR125 = . + 0
-	.type	g_req_cache, %object
-	.size	g_req_cache, 4
-g_req_cache:
+	.set	.LANCHOR178,. + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
 	.space	4
-	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-.LANCHOR143 = . + 0
-	.type	gFlashPageBuffer1, %object
-	.size	gFlashPageBuffer1, 4
-gFlashPageBuffer1:
-	.space	4
-	.section	.data.gFtlInitStatus,"aw",%progbits
+	.set	.LANCHOR199,. + 0
+	.type	req_sys, %object
+	.size	req_sys, 36
+req_sys:
+	.space	36
+	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
 	.align	2
-.LANCHOR225 = . + 0
-	.type	gFtlInitStatus, %object
-	.size	gFtlInitStatus, 4
-gFtlInitStatus:
-	.word	-1
-	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.set	.LANCHOR16,. + 0
+	.type	slcPageToMlcPageTbl, %object
+	.size	slcPageToMlcPageTbl, 512
+slcPageToMlcPageTbl:
+	.space	512
+	.section	.data.FtlMallocOffset,"aw",%progbits
 	.align	2
-.LANCHOR124 = . + 0
-	.type	c_gc_page_buf_num, %object
-	.size	c_gc_page_buf_num, 4
-c_gc_page_buf_num:
+	.type	FtlMallocOffset, %object
+	.size	FtlMallocOffset, 4
+FtlMallocOffset:
+	.word	64
+	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.align	1
+	.set	.LANCHOR140,. + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 2336
+NandFlashParaTbl:
+	.byte	6
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	68
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1064
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	74
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
 	.space	4
-	.section	.data.NandFlashParaTbl,"aw",%progbits
-	.align	1
-.LANCHOR26 = . + 0
-	.type	NandFlashParaTbl, %object
-	.size	NandFlashParaTbl, 2304
-NandFlashParaTbl:
-	.byte	6
+	.byte	5
 	.byte	44
-	.byte	100
-	.byte	68
+	.byte	-120
+	.byte	4
 	.byte	75
 	.byte	-87
 	.byte	0
@@ -22856,10 +22289,10 @@ NandFlashParaTbl:
 	.byte	2
 	.byte	2
 	.short	2048
-	.short	479
-	.byte	3
-	.byte	17
-	.byte	40
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22870,18 +22303,96 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
-	.byte	68
-	.byte	68
-	.byte	75
+	.byte	-88
+	.byte	5
+	.byte	-53
 	.byte	-87
 	.byte	0
 	.byte	4
-	.byte	1
+	.byte	2
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1064
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	70
+	.byte	-119
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	72
+	.byte	4
+	.byte	74
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	60
+	.byte	-91
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
 	.short	479
 	.byte	3
 	.byte	17
@@ -22894,12 +22405,64 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
+	.byte	5
+	.byte	44
+	.byte	-124
+	.byte	100
+	.byte	84
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	32
+	.short	512
+	.byte	2
+	.byte	2
+	.short	1024
+	.short	479
+	.byte	4
+	.byte	18
+	.byte	60
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
 	.byte	6
 	.byte	44
-	.byte	104
+	.byte	-41
+	.byte	-108
+	.byte	62
+	.byte	-124
+	.byte	0
 	.byte	4
-	.byte	74
-	.byte	-87
+	.byte	1
+	.byte	8
+	.short	128
+	.byte	2
+	.byte	2
+	.short	4096
+	.short	279
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	72
+	.byte	4
+	.byte	70
+	.byte	-123
 	.byte	0
 	.byte	4
 	.byte	1
@@ -22907,9 +22470,87 @@ NandFlashParaTbl:
 	.short	256
 	.byte	2
 	.byte	2
+	.short	1024
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	-120
+	.byte	5
+	.byte	-58
+	.byte	-119
+	.byte	0
+	.byte	4
+	.byte	2
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-120
+	.byte	36
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	0
+	.byte	39
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	1
+	.byte	2
 	.short	2048
 	.short	287
-	.byte	1
+	.byte	0
 	.byte	0
 	.byte	24
 	.byte	32
@@ -22922,22 +22563,22 @@ NandFlashParaTbl:
 	.space	4
 	.byte	5
 	.byte	44
-	.byte	-120
-	.byte	4
-	.byte	75
-	.byte	-87
+	.byte	100
+	.byte	100
+	.byte	86
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
-	.byte	16
-	.short	256
+	.byte	24
+	.short	512
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
+	.short	700
+	.short	479
+	.byte	4
+	.byte	18
+	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22948,9 +22589,9 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
-	.byte	-88
-	.byte	5
-	.byte	-53
+	.byte	-124
+	.byte	-59
+	.byte	75
 	.byte	-87
 	.byte	0
 	.byte	4
@@ -22960,10 +22601,10 @@ NandFlashParaTbl:
 	.byte	2
 	.byte	2
 	.short	2048
-	.short	287
-	.byte	1
-	.byte	0
-	.byte	24
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
 	.byte	32
 	.byte	1
 	.byte	0
@@ -22974,20 +22615,20 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
+	.byte	-43
+	.byte	-47
+	.byte	-90
 	.byte	104
-	.byte	4
-	.byte	70
-	.byte	-119
 	.byte	0
 	.byte	4
-	.byte	1
-	.byte	8
-	.short	256
 	.byte	2
+	.byte	8
+	.short	64
+	.byte	1
 	.byte	2
 	.short	2048
-	.short	287
-	.byte	1
+	.short	279
+	.byte	0
 	.byte	0
 	.byte	24
 	.byte	32
@@ -23000,20 +22641,20 @@ NandFlashParaTbl:
 	.space	4
 	.byte	6
 	.byte	44
-	.byte	72
-	.byte	4
-	.byte	74
-	.byte	-91
+	.byte	-36
+	.byte	-112
+	.byte	-90
+	.byte	84
 	.byte	0
 	.byte	4
 	.byte	1
 	.byte	8
-	.short	256
-	.byte	2
+	.short	64
+	.byte	1
 	.byte	2
 	.short	1024
-	.short	287
-	.byte	1
+	.short	279
+	.byte	0
 	.byte	0
 	.byte	24
 	.byte	32
@@ -23024,24 +22665,24 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	6
+	.byte	5
 	.byte	44
-	.byte	-124
 	.byte	100
-	.byte	60
-	.byte	-91
+	.byte	100
+	.byte	84
+	.byte	-92
 	.byte	0
 	.byte	4
 	.byte	1
 	.byte	32
 	.short	512
 	.byte	2
-	.byte	2
+	.byte	1
 	.short	1024
 	.short	479
-	.byte	3
-	.byte	17
-	.byte	40
+	.byte	4
+	.byte	18
+	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
@@ -23052,48 +22693,48 @@ NandFlashParaTbl:
 	.space	4
 	.byte	5
 	.byte	44
-	.byte	-124
 	.byte	100
-	.byte	84
-	.byte	-87
+	.byte	68
+	.byte	50
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
 	.byte	32
 	.short	512
 	.byte	2
-	.byte	2
-	.short	1024
-	.short	479
-	.byte	4
-	.byte	18
+	.byte	1
+	.short	1048
+	.short	1503
+	.byte	5
+	.byte	19
 	.byte	60
 	.byte	32
 	.byte	1
 	.byte	0
 	.byte	1
 	.byte	0
-	.byte	0
+	.byte	1
 	.byte	0
 	.space	4
-	.byte	6
+	.byte	5
 	.byte	44
-	.byte	-41
-	.byte	-108
-	.byte	62
-	.byte	-124
+	.byte	100
+	.byte	100
+	.byte	60
+	.byte	-91
 	.byte	0
 	.byte	4
 	.byte	1
-	.byte	8
-	.short	128
-	.byte	2
+	.byte	32
+	.short	512
 	.byte	2
-	.short	4096
-	.short	279
 	.byte	1
-	.byte	0
-	.byte	24
+	.short	1044
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
 	.byte	32
 	.byte	1
 	.byte	0
@@ -23103,312 +22744,312 @@ NandFlashParaTbl:
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	72
-	.byte	4
-	.byte	70
-	.byte	-123
-	.byte	0
+	.byte	-83
+	.byte	-34
+	.byte	-108
+	.byte	-46
 	.byte	4
+	.byte	67
+	.byte	2
 	.byte	1
-	.byte	8
+	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	1024
-	.short	287
+	.short	2048
+	.short	473
+	.byte	1
 	.byte	1
-	.byte	0
 	.byte	24
 	.byte	32
-	.byte	1
+	.byte	4
 	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-120
-	.byte	5
-	.byte	-58
-	.byte	-119
-	.byte	0
-	.byte	4
+	.byte	-83
+	.byte	-41
+	.byte	-108
+	.byte	-38
+	.byte	116
+	.byte	-61
 	.byte	2
-	.byte	8
+	.byte	1
+	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	287
+	.short	1024
+	.short	473
 	.byte	1
-	.byte	0
-	.byte	24
+	.byte	2
+	.byte	40
 	.byte	32
-	.byte	1
+	.byte	4
 	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	5
-	.byte	44
-	.byte	-120
-	.byte	36
-	.byte	75
-	.byte	-87
-	.byte	0
-	.byte	4
+	.byte	6
+	.byte	-83
+	.byte	-41
+	.byte	-108
+	.byte	-111
+	.byte	96
+	.byte	68
+	.byte	2
 	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	287
+	.short	1046
+	.short	473
 	.byte	1
-	.byte	0
-	.byte	24
+	.byte	3
+	.byte	40
 	.byte	32
+	.byte	4
 	.byte	1
-	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	104
-	.byte	0
-	.byte	39
-	.byte	-87
-	.byte	0
-	.byte	4
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+	.byte	-34
+	.byte	-108
+	.byte	-38
+	.byte	116
+	.byte	-60
+	.byte	2
 	.byte	1
 	.byte	16
-	.short	128
-	.byte	1
+	.short	256
 	.byte	2
-	.short	2048
-	.short	287
-	.byte	0
-	.byte	0
-	.byte	24
-	.byte	32
+	.byte	2
+	.short	2090
+	.short	473
 	.byte	1
-	.byte	0
+	.byte	4
+	.byte	40
+	.byte	32
+	.byte	4
 	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
-	.byte	5
-	.byte	44
-	.byte	100
-	.byte	100
-	.byte	86
-	.byte	-91
-	.byte	0
-	.byte	4
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+	.byte	-83
+	.byte	-34
+	.byte	-108
+	.byte	-21
+	.byte	116
+	.byte	68
+	.byte	2
 	.byte	1
-	.byte	24
-	.short	512
+	.byte	32
+	.short	256
 	.byte	2
 	.byte	2
-	.short	700
-	.short	479
-	.byte	4
-	.byte	18
-	.byte	60
-	.byte	32
+	.short	1066
+	.short	473
 	.byte	1
-	.byte	0
+	.byte	7
+	.byte	40
+	.byte	32
+	.byte	4
 	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-124
-	.byte	-59
-	.byte	75
-	.byte	-87
-	.byte	0
-	.byte	4
+	.byte	-83
+	.byte	-43
+	.byte	-108
+	.byte	-38
+	.byte	116
+	.byte	-60
 	.byte	2
+	.byte	1
 	.byte	16
 	.short	256
 	.byte	2
 	.byte	2
-	.short	2048
-	.short	479
+	.short	530
+	.short	473
+	.byte	1
 	.byte	3
-	.byte	17
 	.byte	40
 	.byte	32
+	.byte	4
 	.byte	1
-	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-43
-	.byte	-47
-	.byte	-90
-	.byte	104
-	.byte	0
-	.byte	4
+	.byte	-83
+	.byte	-41
+	.byte	-108
+	.byte	-102
+	.byte	116
+	.byte	66
 	.byte	2
-	.byte	8
-	.short	64
 	.byte	1
+	.byte	16
+	.short	256
 	.byte	2
-	.short	2048
-	.short	279
-	.byte	0
+	.byte	2
+	.short	1024
+	.short	281
+	.byte	1
 	.byte	0
 	.byte	24
 	.byte	32
-	.byte	1
+	.byte	4
 	.byte	0
-	.byte	1
+	.byte	3
 	.byte	0
 	.byte	0
 	.byte	0
 	.space	4
 	.byte	6
-	.byte	44
-	.byte	-36
-	.byte	-112
-	.byte	-90
-	.byte	84
-	.byte	0
-	.byte	4
-	.byte	1
-	.byte	8
-	.short	64
+	.byte	-83
+	.byte	-34
+	.byte	20
+	.byte	-89
+	.byte	66
+	.byte	74
+	.byte	2
 	.byte	1
+	.byte	32
+	.short	256
 	.byte	2
-	.short	1024
-	.short	279
-	.byte	0
-	.byte	0
-	.byte	24
+	.byte	2
+	.short	1060
+	.short	473
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 	.byte	2
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 	.short	473
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@@ -23416,467 +23057,467 @@ NandFlashParaTbl:
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@@ -23888,7 +23529,7 @@ NandFlashParaTbl:
 	.byte	-124
 	.byte	-109
 	.byte	114
-	.byte	87
+	.byte	80
 	.byte	1
 	.byte	1
 	.byte	32
@@ -23898,10 +23539,10 @@ NandFlashParaTbl:
 	.short	1060
 	.short	1473
 	.byte	2
-	.byte	33
+	.byte	34
 	.byte	40
 	.byte	32
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 	.byte	1
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 	.byte	0
@@ -23911,25 +23552,25 @@ NandFlashParaTbl:
 	.byte	6
 	.byte	-104
 	.byte	-34
-	.byte	-124
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 	.byte	-109
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 	.byte	1
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@@ -23937,49 +23578,75 @@ NandFlashParaTbl:
 	.byte	6
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 	.byte	58
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 	.byte	32
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@@ -23987,22 +23654,22 @@ NandFlashParaTbl:
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@@ -24013,25 +23680,25 @@ NandFlashParaTbl:
 	.byte	0
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 	.byte	32
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@@ -24039,13 +23706,13 @@ NandFlashParaTbl:
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 	.byte	80
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@@ -24054,7 +23721,7 @@ NandFlashParaTbl:
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 	.short	1497
 	.byte	2
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+	.byte	67
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@@ -24065,22 +23732,22 @@ NandFlashParaTbl:
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@@ -24091,25 +23758,25 @@ NandFlashParaTbl:
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@@ -24117,22 +23784,22 @@ NandFlashParaTbl:
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@@ -24143,48 +23810,48 @@ NandFlashParaTbl:
 	.byte	0
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@@ -24195,53 +23862,53 @@ NandFlashParaTbl:
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@@ -24252,7 +23919,7 @@ NandFlashParaTbl:
 	.byte	-108
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 	.byte	118
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@@ -24273,514 +23940,1044 @@ NandFlashParaTbl:
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-	.byte	1
 	.byte	0
 	.byte	0
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	69
-	.byte	-34
-	.byte	-108
-	.byte	-126
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
 	.byte	118
-	.byte	86
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
 	.byte	8
-	.byte	1
-	.byte	16
-	.short	256
-	.byte	2
-	.byte	2
-	.short	2062
-	.short	473
-	.byte	1
 	.byte	0
-	.byte	40
-	.byte	32
-	.byte	3
-	.byte	1
-	.byte	1
 	.byte	0
 	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	69
-	.byte	-34
-	.byte	-108
-	.byte	-109
+	.byte	16
 	.byte	118
-	.byte	-41
-	.byte	8
-	.byte	1
-	.byte	32
-	.short	256
-	.byte	2
-	.byte	2
-	.short	1058
-	.short	1497
+	.byte	114
+	.byte	112
+	.byte	0
 	.byte	2
-	.byte	66
-	.byte	40
-	.byte	32
-	.byte	3
-	.byte	1
-	.byte	1
 	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.data.ToshibaRefValue,"aw",%progbits
+	.set	.LANCHOR12,. + 0
+	.type	ToshibaRefValue, %object
+	.size	ToshibaRefValue, 8
+ToshibaRefValue:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
+	.align	1
+	.set	.LANCHOR233,. + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.short	-1
+	.section	.data.gFtlInitStatus,"aw",%progbits
+	.align	2
+	.set	.LANCHOR223,. + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.data.gNandParaInfo,"aw",%progbits
+	.align	1
+	.set	.LANCHOR29,. + 0
+	.type	gNandParaInfo, %object
+	.size	gNandParaInfo, 32
+gNandParaInfo:
 	.byte	0
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	-20
-	.byte	-41
-	.byte	-108
-	.byte	126
-	.byte	100
-	.byte	68
+	.space	5
 	.byte	0
 	.byte	1
-	.byte	16
+	.byte	8
 	.short	128
 	.byte	2
-	.byte	2
+	.byte	1
 	.short	2048
-	.short	473
-	.byte	2
-	.byte	49
-	.byte	60
-	.byte	36
-	.byte	3
+	.short	0
+	.byte	1
 	.byte	0
-	.byte	3
+	.byte	24
+	.byte	32
+	.byte	1
 	.byte	0
+	.byte	1
 	.byte	0
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	-20
-	.byte	-34
-	.byte	-43
-	.byte	126
-	.byte	104
-	.byte	68
 	.byte	0
+	.space	4
+	.section	.data.gSlcNandParaInfo,"aw",%progbits
+	.align	1
+	.set	.LANCHOR197,. + 0
+	.type	gSlcNandParaInfo, %object
+	.size	gSlcNandParaInfo, 32
+gSlcNandParaInfo:
 	.byte	2
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	2048
-	.short	505
-	.byte	2
-	.byte	49
-	.byte	60
-	.byte	36
-	.byte	3
-	.byte	0
-	.byte	3
+	.byte	-104
+	.byte	-15
 	.byte	0
 	.byte	0
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	-20
-	.byte	-41
-	.byte	-108
-	.byte	122
-	.byte	84
-	.byte	67
 	.byte	0
 	.byte	1
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	2076
-	.short	409
-	.byte	2
+	.byte	1
+	.byte	4
+	.short	64
+	.byte	1
+	.byte	1
+	.short	1024
+	.short	256
+	.byte	0
 	.byte	0
+	.byte	16
 	.byte	40
-	.byte	36
-	.byte	3
 	.byte	1
-	.byte	3
-	.byte	0
 	.byte	0
+	.byte	1
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	-20
-	.byte	-34
-	.byte	-43
-	.byte	122
-	.byte	88
-	.byte	67
 	.byte	0
-	.byte	2
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	2076
-	.short	441
-	.byte	2
 	.byte	0
-	.byte	40
-	.byte	36
-	.byte	3
-	.byte	1
-	.byte	3
+	.space	4
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.data.random_seed,"aw",%progbits
+	.align	1
+	.set	.LANCHOR4,. + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.short	22378
+	.short	1512
+	.short	25245
+	.short	17827
+	.short	25756
+	.short	19440
+	.short	9026
+	.short	10030
+	.short	29528
+	.short	20467
+	.short	29676
+	.short	24432
+	.short	31328
+	.short	6872
+	.short	13426
+	.short	13842
+	.short	8783
+	.short	1108
+	.short	782
+	.short	28837
+	.short	30729
+	.short	9505
+	.short	18676
+	.short	23085
+	.short	18730
+	.short	1085
+	.short	32609
+	.short	14697
+	.short	20858
+	.short	15170
+	.short	30365
+	.short	1607
+	.short	32298
+	.short	4995
+	.short	18905
+	.short	1976
+	.short	9592
+	.short	20204
+	.short	17443
+	.short	13615
+	.short	23330
+	.short	29369
+	.short	13947
+	.short	9398
+	.short	32398
+	.short	8984
+	.short	27600
+	.short	21785
+	.short	6019
+	.short	6311
+	.short	31598
+	.short	30210
+	.short	19327
+	.short	13896
+	.short	11347
+	.short	27545
+	.short	3107
+	.short	26575
+	.short	32270
+	.short	19852
+	.short	20601
+	.short	8349
+	.short	9290
+	.short	29819
+	.short	13579
+	.short	3661
+	.short	28676
+	.short	27331
+	.short	32574
+	.short	8693
+	.short	31253
+	.short	9081
+	.short	5399
+	.short	6842
+	.short	20087
+	.short	5537
+	.short	1274
+	.short	11617
+	.short	9530
+	.short	4866
+	.short	8035
+	.short	23219
+	.short	1178
+	.short	23272
+	.short	7383
+	.short	18944
+	.short	12488
+	.short	12871
+	.short	29340
+	.short	20532
+	.short	11022
+	.short	22514
+	.short	228
+	.short	22363
+	.short	24978
+	.short	14584
+	.short	12138
+	.short	3092
+	.short	17916
+	.short	16863
+	.short	14554
+	.short	31457
+	.short	29474
+	.short	25311
+	.short	24121
+	.short	3684
+	.short	28037
+	.short	22865
+	.short	22839
+	.short	25217
+	.short	13217
+	.short	27186
+	.short	14938
+	.short	11180
+	.short	29754
+	.short	24180
+	.short	15150
+	.short	32455
+	.short	20434
+	.short	23848
+	.short	29983
+	.short	16120
+	.short	14769
+	.short	20041
+	.short	29803
+	.short	28406
+	.short	17598
+	.short	28087
+	.section	.data.refValueDefault,"aw",%progbits
+	.set	.LANCHOR193,. + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
 	.byte	0
 	.byte	0
 	.byte	0
-	.space	4
-	.byte	6
-	.byte	-20
-	.byte	-43
-	.byte	-108
-	.byte	118
-	.byte	84
-	.byte	67
 	.byte	0
-	.byte	1
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	1038
-	.short	281
-	.byte	2
 	.byte	0
-	.byte	24
-	.byte	36
-	.byte	3
-	.byte	1
-	.byte	3
+	.byte	6
+	.byte	10
+	.byte	6
 	.byte	0
+	.byte	-3
+	.byte	-7
+	.byte	-8
 	.byte	0
+	.byte	-6
+	.byte	-13
+	.byte	-15
 	.byte	0
-	.space	4
-	.byte	6
+	.byte	-11
 	.byte	-20
-	.byte	-41
-	.byte	20
-	.byte	118
-	.byte	84
-	.byte	-62
-	.byte	0
-	.byte	1
-	.byte	16
-	.short	128
-	.byte	2
-	.byte	2
-	.short	2076
-	.short	1169
-	.byte	2
+	.byte	-23
 	.byte	0
-	.byte	24
-	.byte	40
-	.byte	3
-	.byte	1
-	.byte	3
 	.byte	0
+	.byte	-26
+	.byte	-30
 	.byte	0
 	.byte	0
-	.space	4
-	.section	.rodata.__func__.7736,"a",%progbits
-.LANCHOR212 = . + 0
-	.type	__func__.7736, %object
-	.size	__func__.7736, 15
-__func__.7736:
+	.byte	-32
+	.byte	-37
+	.section	.rodata.FlashDdrTunningRead.str1.1,"aMS",%progbits,1
+.LC8:
+	.ascii	"sdr read ok %x ecc=%d\012\000"
+.LC9:
+	.ascii	"sync para %d\012\000"
+.LC10:
+	.ascii	"TOG mode Read error %x %x\012\000"
+	.section	.rodata.FlashEraseSLc2KBlocks.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
+	.section	.rodata.FlashInit.str1.1,"aMS",%progbits,1
+.LC18:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC19:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+	.section	.rodata.FlashProgSlc2KPages.str1.1,"aMS",%progbits,1
+.LC24:
+	.ascii	"prog error: = %x\012\000"
+.LC25:
+	.ascii	"prog read error: = %x\012\000"
+.LC26:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC27:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+	.section	.rodata.FlashReadFacBbtData.str1.1,"aMS",%progbits,1
+.LC55:
+	.ascii	"BBT:\000"
+	.section	.rodata.FlashReadIdbDataRaw.str1.1,"aMS",%progbits,1
+.LC12:
+	.ascii	"ECC:%d\012\000"
+	.section	.rodata.FlashReadPage.str1.1,"aMS",%progbits,1
+.LC11:
+	.ascii	"read retry status %x %x %x\012\000"
+	.section	.rodata.FlashReadPages.str1.1,"aMS",%progbits,1
+.LC23:
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+	.section	.rodata.FlashReadSlc2KPages.str1.1,"aMS",%progbits,1
+.LC20:
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+.LC21:
+	.ascii	"data:\000"
+.LC22:
+	.ascii	"spare:\000"
+	.section	.rodata.FtlBbmMapBadBlock.str1.1,"aMS",%progbits,1
+.LC2:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+	.section	.rodata.FtlBbmTblFlush.str1.1,"aMS",%progbits,1
+.LC28:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC29:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC30:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.FtlGcFreeTempBlock.str1.1,"aMS",%progbits,1
+.LC47:
+	.ascii	"GC des block %x done\012\000"
+	.section	.rodata.FtlGcScanTempBlk.str1.1,"aMS",%progbits,1
+.LC46:
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
+	.section	.rodata.FtlInit.str1.1,"aMS",%progbits,1
+.LC48:
+	.ascii	"FTL version: 5.0.47 20171221\000"
+.LC49:
+	.ascii	"...%s: no bad block mapping table, format device\012"
+	.ascii	"\000"
+.LC50:
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+	.section	.rodata.FtlLoadEctTbl.str1.1,"aMS",%progbits,1
+.LC40:
+	.ascii	"no ect\000"
+	.section	.rodata.FtlMapTblRecovery.str1.1,"aMS",%progbits,1
+.LC42:
+	.ascii	"page map lost %x %x %x %x\012\000"
+	.section	.rodata.FtlMapWritePage.str1.1,"aMS",%progbits,1
+.LC35:
+	.ascii	"FtlMapWritePage error = %x\012\000"
+.LC36:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.section	.rodata.FtlProgPages.str1.1,"aMS",%progbits,1
+.LC38:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.FtlRecoverySuperblock.str1.1,"aMS",%progbits,1
+.LC43:
+	.ascii	"RSB refresh addr %x\012\000"
+.LC44:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC45:
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
+	.section	.rodata.FtlVendorPartRead.str1.1,"aMS",%progbits,1
+.LC39:
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.FtlVpcTblFlush.str1.1,"aMS",%progbits,1
+.LC32:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+	.section	.rodata.Ftl_load_ext_data.str1.1,"aMS",%progbits,1
+.LC41:
+	.ascii	"slc mode\000"
+	.section	.rodata.HynixGetReadRetryDefault.str1.1,"aMS",%progbits,1
+.LC16:
+	.ascii	"otp error! %d\000"
+.LC17:
+	.ascii	"rr\000"
+	.section	.rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1
+.LC4:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+.LC5:
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
+.LC6:
+	.ascii	"%s\012\000"
+	.section	.rodata.MicronReadRetrial.str1.1,"aMS",%progbits,1
+.LC7:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.section	.rodata.__func__.10400,"a",%progbits
+	.set	.LANCHOR240,. + 0
+	.type	__func__.10400, %object
+	.size	__func__.10400, 8
+__func__.10400:
+	.ascii	"FtlInit\000"
+	.section	.rodata.__func__.10460,"a",%progbits
+	.set	.LANCHOR220,. + 0
+	.type	__func__.10460, %object
+	.size	__func__.10460, 13
+__func__.10460:
+	.ascii	"FtlProgPages\000"
+	.section	.rodata.__func__.10486,"a",%progbits
+	.set	.LANCHOR242,. + 0
+	.type	__func__.10486, %object
+	.size	__func__.10486, 10
+__func__.10486:
+	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.10549,"a",%progbits
+	.set	.LANCHOR121,. + 0
+	.type	__func__.10549, %object
+	.size	__func__.10549, 14
+__func__.10549:
+	.ascii	"FtlBbt2Bitmap\000"
+	.section	.rodata.__func__.10595,"a",%progbits
+	.set	.LANCHOR208,. + 0
+	.type	__func__.10595, %object
+	.size	__func__.10595, 11
+__func__.10595:
+	.ascii	"FtlLoadBbt\000"
+	.section	.rodata.__func__.10704,"a",%progbits
+	.set	.LANCHOR88,. + 0
+	.type	__func__.10704, %object
+	.size	__func__.10704, 17
+__func__.10704:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.10708,"a",%progbits
+	.set	.LANCHOR85,. + 0
+	.type	__func__.10708, %object
+	.size	__func__.10708, 17
+__func__.10708:
+	.ascii	"INSERT_DATA_LIST\000"
+	.section	.rodata.__func__.10738,"a",%progbits
+	.set	.LANCHOR89,. + 0
+	.type	__func__.10738, %object
+	.size	__func__.10738, 17
+__func__.10738:
+	.ascii	"List_remove_node\000"
+	.section	.rodata.__func__.10768,"a",%progbits
+	.set	.LANCHOR93,. + 0
+	.type	__func__.10768, %object
+	.size	__func__.10768, 22
+__func__.10768:
+	.ascii	"List_update_data_list\000"
+	.section	.rodata.__func__.10775,"a",%progbits
+	.set	.LANCHOR212,. + 0
+	.type	__func__.10775, %object
+	.size	__func__.10775, 16
+__func__.10775:
+	.ascii	"load_l2p_region\000"
+	.section	.rodata.__func__.10805,"a",%progbits
+	.set	.LANCHOR94,. + 0
+	.type	__func__.10805, %object
+	.size	__func__.10805, 26
+__func__.10805:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.rodata.__func__.10819,"a",%progbits
+	.set	.LANCHOR209,. + 0
+	.type	__func__.10819, %object
+	.size	__func__.10819, 15
+__func__.10819:
 	.ascii	"ftl_map_blk_gc\000"
-	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
-	.align	1
-.LANCHOR56 = . + 0
-	.type	c_ftl_nand_page_pre_blk, %object
-	.size	c_ftl_nand_page_pre_blk, 2
-c_ftl_nand_page_pre_blk:
-	.space	2
-	.section	.bss.g_totle_map_block,"aw",%nobits
-	.align	1
-.LANCHOR111 = . + 0
-	.type	g_totle_map_block, %object
-	.size	g_totle_map_block, 2
-g_totle_map_block:
-	.space	2
-	.section	.bss.DeviceCapacity,"aw",%nobits
-	.align	2
-.LANCHOR64 = . + 0
-	.type	DeviceCapacity, %object
-	.size	DeviceCapacity, 4
-DeviceCapacity:
-	.space	4
-	.section	.bss.gp_ect_tbl_info,"aw",%nobits
-	.align	2
-.LANCHOR187 = . + 0
-	.type	gp_ect_tbl_info, %object
-	.size	gp_ect_tbl_info, 4
-gp_ect_tbl_info:
-	.space	4
-	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
-	.align	1
-.LANCHOR67 = . + 0
-	.type	c_ftl_nand_map_blks_per_plane, %object
-	.size	c_ftl_nand_map_blks_per_plane, 2
-c_ftl_nand_map_blks_per_plane:
-	.space	2
-	.section	.bss.p_l2p_map_buf,"aw",%nobits
-	.align	2
-.LANCHOR109 = . + 0
-	.type	p_l2p_map_buf, %object
-	.size	p_l2p_map_buf, 4
-p_l2p_map_buf:
-	.space	4
-	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
-	.align	2
-.LANCHOR129 = . + 0
-	.type	g_recovery_page_min_ver, %object
-	.size	g_recovery_page_min_ver, 4
-g_recovery_page_min_ver:
-	.space	4
-	.section	.bss.g_active_superblock,"aw",%nobits
-	.align	2
-.LANCHOR97 = . + 0
-	.type	g_active_superblock, %object
-	.size	g_active_superblock, 48
-g_active_superblock:
-	.space	48
-	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
-	.align	1
-.LANCHOR139 = . + 0
-	.type	g_gc_bad_block_temp_num, %object
-	.size	g_gc_bad_block_temp_num, 2
-g_gc_bad_block_temp_num:
-	.space	2
+	.section	.rodata.__func__.10832,"a",%progbits
+	.set	.LANCHOR210,. + 0
+	.type	__func__.10832, %object
+	.size	__func__.10832, 31
+__func__.10832:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.10845,"a",%progbits
+	.set	.LANCHOR211,. + 0
+	.type	__func__.10845, %object
+	.size	__func__.10845, 16
+__func__.10845:
+	.ascii	"FtlMapWritePage\000"
+	.section	.rodata.__func__.10865,"a",%progbits
+	.set	.LANCHOR97,. + 0
+	.type	__func__.10865, %object
+	.size	__func__.10865, 22
+__func__.10865:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.rodata.__func__.10881,"a",%progbits
+	.set	.LANCHOR213,. + 0
+	.type	__func__.10881, %object
+	.size	__func__.10881, 9
+__func__.10881:
+	.ascii	"log2phys\000"
+	.section	.rodata.__func__.10943,"a",%progbits
+	.set	.LANCHOR207,. + 0
+	.type	__func__.10943, %object
+	.size	__func__.10943, 15
+__func__.10943:
+	.ascii	"FtlVpcTblFlush\000"
+	.section	.rodata.__func__.10962,"a",%progbits
+	.set	.LANCHOR224,. + 0
+	.type	__func__.10962, %object
+	.size	__func__.10962, 14
+__func__.10962:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.rodata.__func__.11016,"a",%progbits
+	.set	.LANCHOR225,. + 0
+	.type	__func__.11016, %object
+	.size	__func__.11016, 15
+__func__.11016:
+	.ascii	"FtlLoadSysInfo\000"
+	.section	.rodata.__func__.11085,"a",%progbits
+	.set	.LANCHOR214,. + 0
+	.type	__func__.11085, %object
+	.size	__func__.11085, 16
+__func__.11085:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.11118,"a",%progbits
+	.set	.LANCHOR228,. + 0
+	.type	__func__.11118, %object
+	.size	__func__.11118, 22
+__func__.11118:
+	.ascii	"FtlRecoverySuperblock\000"
+	.section	.rodata.__func__.11172,"a",%progbits
+	.set	.LANCHOR100,. + 0
+	.type	__func__.11172, %object
+	.size	__func__.11172, 16
+__func__.11172:
+	.ascii	"make_superblock\000"
+	.section	.rodata.__func__.11192,"a",%progbits
+	.set	.LANCHOR138,. + 0
+	.type	__func__.11192, %object
+	.size	__func__.11192, 18
+__func__.11192:
+	.ascii	"SupperBlkListInit\000"
+	.section	.rodata.__func__.11269,"a",%progbits
+	.set	.LANCHOR200,. + 0
+	.type	__func__.11269, %object
+	.size	__func__.11269, 25
+__func__.11269:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.11283,"a",%progbits
+	.set	.LANCHOR219,. + 0
+	.type	__func__.11283, %object
+	.size	__func__.11283, 29
+__func__.11283:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.rodata.__func__.11289,"a",%progbits
+	.set	.LANCHOR205,. + 0
+	.type	__func__.11289, %object
+	.size	__func__.11289, 19
+__func__.11289:
+	.ascii	"get_new_active_ppa\000"
+	.section	.rodata.__func__.11300,"a",%progbits
+	.set	.LANCHOR203,. + 0
+	.type	__func__.11300, %object
+	.size	__func__.11300, 16
+__func__.11300:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.11305,"a",%progbits
+	.set	.LANCHOR204,. + 0
+	.type	__func__.11305, %object
+	.size	__func__.11305, 20
+__func__.11305:
+	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.11373,"a",%progbits
+	.set	.LANCHOR234,. + 0
+	.type	__func__.11373, %object
+	.size	__func__.11373, 19
+__func__.11373:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.11467,"a",%progbits
+	.set	.LANCHOR238,. + 0
+	.type	__func__.11467, %object
+	.size	__func__.11467, 23
+__func__.11467:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1
+.LC31:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+	.section	.rodata.ftl_fix_nand_power_lost_error.str1.1,"aMS",%progbits,1
+.LC52:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC53:
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+	.section	.rodata.ftl_map_blk_gc.str1.1,"aMS",%progbits,1
+.LC33:
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
+.LC34:
+	.ascii	"page map lost: %x %x\012\000"
+	.section	.rodata.ftl_write.str1.1,"aMS",%progbits,1
+.LC54:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.section	.rodata.load_l2p_region.str1.1,"aMS",%progbits,1
+.LC37:
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
+	.section	.rodata.remove_from_free_sys_Queue.str1.1,"aMS",%progbits,1
+.LC3:
+	.ascii	"remove_from_free_sys_Queue %x\012\000"
+	.section	.rodata.rk_ftl_init.str1.1,"aMS",%progbits,1
+.LC51:
+	.ascii	"FtlInit %x\012\000"
+	.section	.rodata.rknand_print_hex.str1.1,"aMS",%progbits,1
+.LC13:
+	.ascii	"%s 0x%x:\000"
+.LC14:
+	.ascii	"%x \000"
+.LC15:
+	.ascii	"\000"
 	.hidden	free

commit 01051eec89b116c8f37928937600b81d2ec87b23
Author: Wu Liangqing <wlq@rock-chips.com>
Date:   Sat Feb 3 09:45:07 2018 +0800

    add .gitignore to ignore /rockdev *.img
    
    Change-Id: Id9e8cbd62e9122f09548b8aedd5c5ee64405d3bc
    Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

diff --git a/.gitignore b/.gitignore
index 29757aa51e..995a023cca 100644
--- a/.gitignore
+++ b/.gitignore
@@ -20,13 +20,14 @@
 *.bin
 *.patch
 *.cfgtmp
+*.img
 
 # host programs on Cygwin
 *.exe
 
 # Build tree
 /build-*
-
+/rockdev
 #
 # Top-level generic files
 #

commit c4238552ff4f71f29df73baaccfbc3c63f5aba41
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Mon Feb 5 09:45:57 2018 +0800

    driver: rknand: change to use dev_read_addr_ptr
    
    Change-Id: I41358d2f91238ca5100fc50c1c410cdf314cb3fd
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
index 44fa20e1f5..533e25ab13 100644
--- a/drivers/rknand/rknand.c
+++ b/drivers/rknand/rknand.c
@@ -155,7 +155,7 @@ static int rockchip_nand_probe(struct udevice *udev)
 	int ret;
 	struct rknand_dev *ndev = dev_get_priv(udev);
 
-	ndev->ioaddr = (void *)devfdt_get_addr(udev);
+	ndev->ioaddr = dev_read_addr_ptr(udev);
 	ret = rk_ftl_init(ndev->ioaddr);
 	if (!ret) {
 		ndev->density = ftl_get_density(0);

commit 448a4b3860f22b6b5bc62fb95c92c2467abfbdcf
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:14:22 2018 +0800

    rockchip: px30: add evb_px30 board support
    
    PX30 is a rockchip evb for px30, including all harware interface
    from px30.
    
    Change-Id: I5bac5a7ebf23b5c51b3a01f51fe0404db0a1b5fc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index cbab46e388..9e55d01bd0 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -385,6 +385,7 @@ config GICV2
 config GICV3
 	bool "ARM GICv3"
 
+source "arch/arm/mach-rockchip/px30/Kconfig"
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3066/Kconfig"
 source "arch/arm/mach-rockchip/rk3128/Kconfig"
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
new file mode 100644
index 0000000000..72587c7f4a
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/Kconfig
@@ -0,0 +1,18 @@
+if ROCKCHIP_PX30
+
+config TARGET_EVB_PX30
+	bool "EVB_PX30"
+	select BOARD_LATE_INIT
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x400
+
+config SPL_SERIAL_SUPPORT
+	default y
+
+source "board/rockchip/evb_px30/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_px30/Kconfig b/board/rockchip/evb_px30/Kconfig
new file mode 100644
index 0000000000..0042c8e4db
--- /dev/null
+++ b/board/rockchip/evb_px30/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_PX30
+
+config SYS_BOARD
+	default "evb_px30"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_px30"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_px30/MAINTAINERS b/board/rockchip/evb_px30/MAINTAINERS
new file mode 100644
index 0000000000..cf13f2419e
--- /dev/null
+++ b/board/rockchip/evb_px30/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-PX30
+M:      Kever Yang <kever.yang@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_px30
+F:      include/configs/evb_px30.h
+F:      configs/evb-px30_defconfig
diff --git a/board/rockchip/evb_px30/Makefile b/board/rockchip/evb_px30/Makefile
new file mode 100644
index 0000000000..74b0b9f44f
--- /dev/null
+++ b/board/rockchip/evb_px30/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_px30.o
diff --git a/board/rockchip/evb_px30/evb_px30.c b/board/rockchip/evb_px30/evb_px30.c
new file mode 100644
index 0000000000..ffd78b016c
--- /dev/null
+++ b/board/rockchip/evb_px30/evb_px30.c
@@ -0,0 +1,11 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
new file mode 100644
index 0000000000..39799afb56
--- /dev/null
+++ b/configs/evb-px30_defconfig
@@ -0,0 +1,74 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_RKPARM_PARTITION=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_ROCKCHIP_PX30=y
+CONFIG_TARGET_EVB_PX30=y
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_DEFAULT_DEVICE_TREE="px30-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL_PRESENT=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BOOTDELAY=0
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xFF160000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
new file mode 100644
index 0000000000..836f60f546
--- /dev/null
+++ b/include/configs/evb_px30.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __EVB_PX30_H
+#define __EVB_PX30_H
+
+#include <configs/px30_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
+#endif

commit 744ba6c65f7b18b46fd89eea5396d1eda5c7f7ec
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:16:20 2018 +0800

    rockchip: dts: px30: add px30-evb dts
    
    Add the dts and header file from kernel.
    
    Change-Id: Iafd91528deffd14f5b59cc3d7cabe9d0dbb576d5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
new file mode 100644
index 0000000000..d08a19d680
--- /dev/null
+++ b/arch/arm/dts/px30-evb.dts
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+#include "px30.dtsi"
+#include "px30-u-boot.dtsi"
+
+/ {
+	model = "Rockchip PX30 EVB";
+	compatible = "rockchip,px30-evb", "rockchip,px30";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,px30-dmc", "syscon";
+		reg = <0x0 0xff2a0000 0x0 0x1000>;
+	};
+};
+
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	fifo-mode;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	supports-emmc;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
new file mode 100644
index 0000000000..1ece341901
--- /dev/null
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
\ No newline at end of file
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
new file mode 100644
index 0000000000..560d3eebfe
--- /dev/null
+++ b/arch/arm/dts/px30.dtsi
@@ -0,0 +1,2251 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#include <dt-bindings/clock/px30-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/px30-power.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
+
+/ {
+	compatible = "rockchip,px30";
+
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vopb_out>, <&vopl_out>;
+		status = "disabled";
+	};
+
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+	};
+
+	pmu: power-management@ff000000 {
+		compatible = "rockchip,px30-pmu", "syscon", "simple-mfd";
+		reg = <0x0 0xff000000 0x0 0x1000>;
+
+		power: power-controller {
+			compatible = "rockchip,px30-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			/* These power domains are grouped by VD_LOGIC */
+			pd_usb@PX30_PD_USB {
+				reg = <PX30_PD_USB>;
+				clocks = <&cru HCLK_HOST>,
+					 <&cru HCLK_OTG>,
+					 <&cru SCLK_OTG_ADP>;
+			};
+			pd_sdcard@PX30_PD_SDCARD {
+				reg = <PX30_PD_SDCARD>;
+				clocks = <&cru HCLK_SDMMC>,
+					 <&cru SCLK_SDMMC>;
+			};
+			pd_gmac@PX30_PD_GMAC {
+				reg = <PX30_PD_GMAC>;
+				clocks = <&cru ACLK_GMAC>,
+					 <&cru PCLK_GMAC>,
+					 <&cru SCLK_MAC_REF>,
+					 <&cru SCLK_GMAC_RX_TX>;
+			};
+			pd_mmc_nand@PX30_PD_MMC_NAND {
+				reg = <PX30_PD_MMC_NAND>;
+				clocks =  <&cru HCLK_NANDC>,
+					  <&cru HCLK_EMMC>,
+					  <&cru HCLK_SDIO>,
+					  <&cru HCLK_SFC>,
+					  <&cru SCLK_EMMC>,
+					  <&cru SCLK_NANDC>,
+					  <&cru SCLK_SDIO>,
+					  <&cru SCLK_SFC>;
+			};
+			pd_vpu@PX30_PD_VPU {
+				reg = <PX30_PD_VPU>;
+				clocks = <&cru ACLK_VPU>,
+					 <&cru HCLK_VPU>,
+					 <&cru SCLK_CORE_VPU>;
+			};
+			pd_vo@PX30_PD_VO {
+				reg = <PX30_PD_VO>;
+				clocks = <&cru ACLK_RGA>,
+					 <&cru ACLK_VOPB>,
+					 <&cru ACLK_VOPL>,
+					 <&cru DCLK_VOPB>,
+					 <&cru DCLK_VOPL>,
+					 <&cru HCLK_RGA>,
+					 <&cru HCLK_VOPB>,
+					 <&cru HCLK_VOPL>,
+					 <&cru PCLK_MIPI_DSI>,
+					 <&cru SCLK_RGA_CORE>,
+					 <&cru SCLK_VOPB_PWM>;
+			};
+			pd_vi@PX30_PD_VI {
+				reg = <PX30_PD_VI>;
+				clocks = <&cru ACLK_CIF>,
+					 <&cru ACLK_ISP>,
+					 <&cru HCLK_CIF>,
+					 <&cru HCLK_ISP>,
+					 <&cru SCLK_ISP>;
+			};
+			pd_gpu@PX30_PD_GPU {
+				reg = <PX30_PD_GPU>;
+				clocks = <&cru ACLK_GPU>;
+			};
+		};
+	};
+
+	pmugrf: syscon@ff010000 {
+		compatible = "rockchip,px30-pmugrf", "syscon", "simple-mfd";
+		reg = <0x0 0xff010000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		pmu_io_domains: io-domains {
+			compatible = "rockchip,px30-pmu-io-voltage-domain";
+			status = "disabled";
+		};
+
+		reboot-mode {
+			compatible = "syscon-reboot-mode";
+			offset = <0x200>;
+			mode-bootloader = <BOOT_BL_DOWNLOAD>;
+			mode-charge = <BOOT_CHARGING>;
+			mode-fastboot = <BOOT_FASTBOOT>;
+			mode-loader = <BOOT_BL_DOWNLOAD>;
+			mode-normal = <BOOT_NORMAL>;
+			mode-recovery = <BOOT_RECOVERY>;
+			mode-ums = <BOOT_UMS>;
+		};
+
+		pmu_pvtm: pmu-pvtm {
+			compatible = "rockchip,px30-pmu-pvtm";
+			clocks = <&pmucru SCLK_PVTM_PMU>;
+			clock-names = "pmu";
+			status = "disabled";
+		};
+	};
+
+	uart0: serial@ff030000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff030000 0x0 0x100>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART0_PMU>, <&cru PCLK_UART0_PMU>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 0>, <&dmac 1>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		status = "disabled";
+	};
+
+	i2s0_8ch: i2s@ff060000 {
+		compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff060000 0x0 0x1000>;
+		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S0_TX>, <&cru HCLK_I2S0>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 16>, <&dmac 17>;
+		dma-names = "tx", "rx";
+		status = "disabled";
+	};
+
+	i2s1_2ch: i2s@ff070000 {
+		compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff070000 0x0 0x1000>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 18>, <&dmac 19>;
+		dma-names = "tx", "rx";
+		status = "disabled";
+	};
+
+	i2s2_2ch: i2s@ff080000 {
+		compatible = "rockchip,px30-i2s", "rockchip,rk3066-i2s";
+		reg = <0x0 0xff080000 0x0 0x1000>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		dmas = <&dmac 20>, <&dmac 21>;
+		dma-names = "tx", "rx";
+		status = "disabled";
+	};
+
+	pdm: pdm@ff0a0000 {
+		compatible = "rockchip,pdm";
+		reg = <0x0 0xff0a0000 0x0 0x1000>;
+		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac 24>;
+		dma-names = "rx";
+		status = "disabled";
+	};
+
+	gic: interrupt-controller@ff131000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0x0 0xff131000 0 0x1000>,
+		      <0x0 0xff132000 0 0x2000>,
+		      <0x0 0xff134000 0 0x2000>,
+		      <0x0 0xff136000 0 0x2000>;
+		interrupts = <GIC_PPI 9
+		      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	grf: syscon@ff140000 {
+		compatible = "rockchip,px30-grf", "syscon", "simple-mfd";
+		reg = <0x0 0xff140000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		io_domains: io-domains {
+			compatible = "rockchip,px30-io-voltage-domain";
+			status = "disabled";
+		};
+	};
+
+	core_grf: syscon@ff148000 {
+		compatible = "syscon", "simple-mfd";
+		reg = <0x0 0xff148000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		pvtm: pvtm {
+			compatible = "rockchip,px30-pvtm";
+			clocks = <&cru SCLK_PVTM>;
+			clock-names = "core";
+			status = "disabled";
+		};
+	};
+
+	uart1: serial@ff158000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff158000 0x0 0x100>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "sclk_uart", "pclk_uart";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 2>, <&dmac 3>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
+		status = "disabled";
+	};
+
+	uart2: serial@ff160000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff160000 0x0 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 4>, <&dmac 5>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "disabled";
+	};
+
+	uart3: serial@ff168000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff168000 0x0 0x100>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 6>, <&dmac 7>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m1_xfer &uart3m1_cts &uart3m1_rts>;
+		status = "disabled";
+	};
+
+	uart4: serial@ff170000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff170000 0x0 0x100>;
+		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 8>, <&dmac 9>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
+		status = "disabled";
+	};
+
+	uart5: serial@ff178000 {
+		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
+		reg = <0x0 0xff178000 0x0 0x100>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
+		clock-names = "baudclk", "apb_pclk";
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dmas = <&dmac 10>, <&dmac 11>;
+		#dma-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart5_xfer &uart5_cts &uart5_rts>;
+		status = "disabled";
+	};
+
+	i2c0: i2c@ff180000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff180000 0x0 0x1000>;
+		clocks =  <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c1: i2c@ff190000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff190000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c2: i2c@ff1a0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff1a0000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	i2c3: i2c@ff1b0000 {
+		compatible = "rockchip,rk3399-i2c";
+		reg = <0x0 0xff1b0000 0x0 0x1000>;
+		clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
+		clock-names = "i2c", "pclk";
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c3_xfer>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	spi0: spi@ff1d0000 {
+		compatible = "rockchip,px30-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff1d0000 0x0 0x1000>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 12>, <&dmac 13>;
+		#dma-cells = <2>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>;
+		status = "disabled";
+	};
+
+	spi1: spi@ff1d8000 {
+		compatible = "rockchip,px30-spi", "rockchip,rk3066-spi";
+		reg = <0x0 0xff1d8000 0x0 0x1000>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		dmas = <&dmac 14>, <&dmac 15>;
+		#dma-cells = <2>;
+		dma-names = "tx", "rx";
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi1_clk &spi1_csn &spi1_miso &spi1_mosi>;
+		status = "disabled";
+	};
+
+	wdt: watchdog@ff1e0000 {
+		compatible = "snps,dw-wdt";
+		reg = <0x0 0xff1e0000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	pwm0: pwm@ff200000 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff200010 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff200020 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff200030 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff200030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm4: pwm@ff208000 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm4_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm5: pwm@ff208010 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm5_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm6: pwm@ff208020 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208020 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm6_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	pwm7: pwm@ff208030 {
+		compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm";
+		reg = <0x0 0xff208030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm7_pin>;
+		clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
+		clock-names = "pwm", "pclk";
+		status = "disabled";
+	};
+
+	amba {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dmac: dmac@ff240000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff240000 0x0 0x4000>;
+			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru ACLK_DMAC>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			peripherals-req-type-burst;
+		};
+	};
+
+	tsadc: tsadc@ff280000 {
+		compatible = "rockchip,px30-tsadc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		resets = <&cru SRST_TSADC_P>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&tsadc_otp_gpio>;
+		pinctrl-1 = <&tsadc_otp_out>;
+		pinctrl-2 = <&tsadc_otp_gpio>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <100000>;
+		status = "disabled";
+	};
+
+	saradc: saradc@ff288000 {
+		compatible = "rockchip,px30-saradc", "rockchip,rk3399-saradc";
+		reg = <0x0 0xff288000 0x0 0x100>;
+		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC_P>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	cru: clock-controller@ff2b0000 {
+		compatible = "rockchip,px30-cru";
+		reg = <0x0 0xff2b0000 0x0 0x9000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&cru APLL_BOOST_H>, <&cru APLL_BOOST_L>,
+			<&cru PLL_NPLL>, <&cru PLL_CPLL>,
+			<&cru ARMCLK>;
+		assigned-clock-rates =
+			<1608000000>, <1416000000>,
+			<1188000000>, <1188000000>,
+			<816000000>;
+	};
+
+	pmucru: pmu-clock-controller@ff2bc000 {
+		compatible = "rockchip,px30-pmucru";
+		reg = <0x0 0xff2bc000 0x0 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+
+		assigned-clocks =
+			<&pmucru PLL_GPLL>, <&pmucru PCLK_PMU_PRE>,
+			<&pmucru SCLK_WIFI_PMU>, <&cru ACLK_BUS_PRE>,
+			<&cru ACLK_PERI_PRE>, <&cru HCLK_BUS_PRE>,
+			<&cru HCLK_PERI_PRE>, <&cru PCLK_BUS_PRE>;
+		assigned-clock-rates =
+			<1200000000>, <100000000>,
+			<26000000>, <300000000>,
+			<300000000>, <150000000>,
+			<150000000>, <75000000>;
+	};
+
+	usb2phy_grf: syscon@ff2c0000 {
+		compatible = "rockchip,px30-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xff2c0000 0x0 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,px30-usb2phy",
+				     "rockchip,rk3328-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&cru SCLK_USBPHY_REF>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			clock-output-names = "usb480m_phy";
+			status = "disabled";
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+		};
+	};
+
+	mipi_dphy: mipi-dphy@ff2e0000 {
+		compatible = "rockchip,px30-mipi-dphy";
+		reg = <0x0 0xff2e0000 0x0 0x10000>;
+		clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
+		clock-names = "ref", "pclk";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_MIPIDSIPHY_P>;
+		reset-names = "apb";
+		power-domains = <&power PX30_PD_VO>;
+		#phy-cells = <0>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+	};
+
+	lvds: lvds@ff2e0000 {
+		compatible = "rockchip,px30-lvds";
+		reg = <0x0 0xff2e0000 0x0 0x100>, <0x0 0xff2e0100 0x0 0x100>;
+		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
+		clocks = <&cru PCLK_MIPIDSIPHY>, <&cru PCLK_MIPI_DSI>;
+		clock-names = "pclk_lvds", "pclk_lvds_ctl";
+		power-domains = <&power PX30_PD_VO>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				lvds_in_vopl: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopl_out_lvds>;
+				};
+
+				lvds_in_vopb: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopb_out_lvds>;
+				};
+			};
+		};
+	};
+
+	usb20_otg: usb@ff300000 {
+		compatible = "rockchip,px30-usb", "rockchip,rk3066-usb",
+			     "snps,dwc2";
+		reg = <0x0 0xff300000 0x0 0x40000>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG>;
+		clock-names = "otg";
+		dr_mode = "otg";
+		g-np-tx-fifo-size = <16>;
+		g-rx-fifo-size = <275>;
+		g-tx-fifo-size = <256 128 128 64 64 32>;
+		g-use-dma;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
+		status = "disabled";
+	};
+
+	usb_host0_ehci: usb@ff340000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xff340000 0x0 0x10000>;
+		interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@ff350000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xff350000 0x0 0x10000>;
+		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>,
+			 <&u2phy>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy_host>;
+		phy-names = "usb";
+	};
+
+	gmac: ethernet@ff360000 {
+		compatible = "rockchip,px30-gmac";
+		reg = <0x0 0xff360000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_GMAC>, <&cru SCLK_GMAC_RX_TX>,
+			 <&cru SCLK_GMAC_RX_TX>, <&cru SCLK_MAC_REF>,
+			 <&cru SCLK_MAC_REFOUT>, <&cru ACLK_GMAC>,
+			 <&cru PCLK_GMAC>, <&cru SCLK_GMAC_RMII>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "clk_mac_refout", "aclk_mac",
+			      "pclk_mac", "clk_mac_speed";
+		phy-mode = "rmii";
+		pinctrl-names = "default";
+		pinctrl-0 = <&rmii_pins>;
+		resets = <&cru SRST_GMAC_A>;
+		reset-names = "stmmaceth";
+		power-domains = <&power PX30_PD_GMAC>;
+		status = "disabled";
+	};
+
+	sdmmc: dwmmc@ff370000 {
+		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff370000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
+		clock-names = "biu", "ciu";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	sdio: dwmmc@ff380000 {
+		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff380000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
+			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@ff390000 {
+		compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x0 0xff390000 0x0 0x4000>;
+		max-frequency = <150000000>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+		fifo-depth = <0x100>;
+		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	nandc0: nandc@ff3b0000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff3b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
+	gpu: gpu@ff400000 {
+		compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
+		reg = <0x0 0xff400000 0x0 0x4000>;
+
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "GPU", "MMU", "JOB";
+
+		clocks = <&cru ACLK_GPU>;
+		clock-names = "clk_mali";
+
+		status = "disabled";
+	};
+
+	hevc: hevc_service@ff440000 {
+		compatible = "rockchip,hevc_sub";
+		iommu_enabled = <1>;
+		reg = <0x0 0xff440000 0x0 0x400>;
+		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_dec";
+		dev_mode = <1>;
+		iommus = <&hevc_mmu>;
+		name = "hevc_service";
+		allocator = <1>;
+	};
+
+	vpu: vpu_service@ff442000 {
+		compatible = "rockchip,vpu_sub";
+		iommu_enabled = <1>;
+		reg = <0x0 0xff442000 0x0 0x800>;
+		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "irq_enc", "irq_dec";
+		dev_mode = <0>;
+		iommus = <&vpu_mmu>;
+		name = "vpu_service";
+		allocator = <1>;
+	};
+
+	vpu_combo: vpu_combo {
+		compatible = "rockchip,vpu_combo";
+		subcnt = <2>;
+		rockchip,grf = <&grf>;
+		rockchip,sub = <&vpu>, <&hevc>;
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>, <&cru SCLK_CORE_VPU>;
+		clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+		resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>,
+			<&cru SRST_VPU_NIU_A>, <&cru SRST_VPU_NIU_H>,
+			<&cru SRST_VPU_CORE>;
+		reset-names = "video_a", "video_h", "niu_a", "niu_h",
+			"video_core";
+		mode_bit = <15>;
+		mode_ctrl = <0x410>;
+		name = "vpu_combo";
+		status = "disabled";
+	};
+
+	hevc_mmu: iommu@ff440440 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff440440 0x0 0x40>, <0x0 0xff440480 0x0 0x40>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "hevc_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+	};
+
+	vpu_mmu: iommu@ff442800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff442800 0x0 0x100>;
+		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vpu_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+	};
+
+	dsi: dsi@ff450000 {
+		compatible = "rockchip,px30-mipi-dsi";
+		reg = <0x0 0xff450000 0x0 0x10000>;
+		interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MIPI_DSI>, <&mipi_dphy>;
+		clock-names = "pclk", "hs_clk";
+		resets = <&cru SRST_MIPIDSI_HOST_P>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		power-domains = <&power PX30_PD_VO>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				dsi_in_vopl: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopl_out_dsi>;
+				};
+
+				dsi_in_vopb: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopb_out_dsi>;
+				};
+			};
+		};
+	};
+
+	vopb: vop@ff460000 {
+		compatible = "rockchip,px30-vop-big";
+		reg = <0x0 0xff460000 0x0 0x1fc>, <0x0 0xff460a00 0x0 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPB>, <&cru DCLK_VOPB>,
+			 <&cru HCLK_VOPB>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		iommus = <&vopb_mmu>;
+		status = "disabled";
+
+		vopb_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vopb_out_lvds: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&lvds_in_vopb>;
+			};
+
+			vopb_out_dsi: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&dsi_in_vopb>;
+			};
+		};
+	};
+
+	vopb_mmu: iommu@ff460f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff460f00 0x0 0x100>;
+		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopb_mmu";
+		clocks = <&cru ACLK_VOPB>, <&cru HCLK_VOPB>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vopl: vop@ff470000 {
+		compatible = "rockchip,px30-vop-lit";
+		reg = <0x0 0xff470000 0x0 0x1fc>, <0x0 0xff470a00 0x0 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOPL>, <&cru DCLK_VOPL>,
+			 <&cru HCLK_VOPL>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		iommus = <&vopl_mmu>;
+		status = "disabled";
+
+		vopl_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vopl_out_lvds: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&lvds_in_vopl>;
+			};
+
+			vopl_out_dsi: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&dsi_in_vopl>;
+			};
+		};
+	};
+
+	vopl_mmu: iommu@ff470f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff470f00 0x0 0x100>;
+		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vopl_mmu";
+		clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rk_rga: rk_rga@ff480000 {
+		compatible = "rockchip,rga2";
+		//dev_mode = <1>;
+		reg = <0x0 0xff480000 0x0 0x1000>;
+		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>;
+		clock-names = "aclk_rga", "hclk_rga";
+		dma-coherent;
+		status = "disabled";
+	};
+
+	cif: cif@ff490000 {
+		compatible = "rockchip,cif";
+		reg = <0x0 0xff490000 0x0 0x200>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>, <&cru SCLK_CIF_OUT>;
+		clock-names = "aclk_cif0", "hclk_cif0", "pclk_cif", "cif0_out";
+		resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>;
+		reset-names = "rst_cif_a", "rst_cif_h", "rst_cif_pclkin";
+		pinctrl-names = "cif_pin_all";
+		pinctrl-0 = <&dvp_d2d9_m0>;
+		status = "disabled";
+	};
+
+	vip_mmu: iommu@ff490800{
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff490800 0x0 0x100>;
+		interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vip_mmu";
+		clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>;
+		clock-names = "aclk", "hclk";
+		rk_iommu,disable_reset_quirk;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rk_isp: rk_isp@ff4a0000 {
+		compatible = "rockchip,px30-isp", "rockchip,isp";
+		reg = <0x0 0xff4a0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru SCLK_ISP>, <&cru SCLK_ISP>,
+			<&cru PCLK_ISP>, <&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT>, <&cru PCLK_MIPICSIPHY>;
+		clock-names = "aclk_isp", "hclk_isp", "clk_isp", "clk_isp_jpe",
+			"pclkin_isp", "clk_cif_pll", "clk_cif_out", "pclk_dphyrx";
+		resets = <&cru SRST_ISP>, <&cru SRST_MIPICSIPHY_P>;
+		reset-names = "rst_isp", "rst_mipicsiphy";
+		pinctrl-names = "default";
+		pinctrl-0 = <&cif_clkout_m0>;
+		rockchip,isp,mipiphy = <0>;
+		rockchip,isp,csiphy,reg = <0xff2f0000 0x4000>;
+		rockchip,grf = <&grf>;
+		rockchip,cru = <&cru>;
+		rockchip,isp,iommu-enable = <1>;
+		iommus = <&isp_mmu>;
+		status = "disabled";
+	};
+
+	isp_mmu: iommu@ff4a8000 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff4a8000 0x0 0x100>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "isp_mmu";
+		clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
+		clock-names = "aclk", "hclk";
+		rk_iommu,disable_reset_quirk;
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	qos_gmac: qos@ff518000 {
+		compatible = "syscon";
+		reg = <0x0 0xff518000 0x0 0x20>;
+	};
+
+	qos_gpu: qos@ff520000 {
+		compatible = "syscon";
+		reg = <0x0 0xff520000 0x0 0x20>;
+	};
+
+	qos_sdmmc: qos@ff52c000 {
+		compatible = "syscon";
+		reg = <0x0 0xff52c000 0x0 0x20>;
+	};
+
+	qos_emmc: qos@ff538000 {
+		compatible = "syscon";
+		reg = <0x0 0xff538000 0x0 0x20>;
+	};
+
+	qos_nand: qos@ff538080 {
+		compatible = "syscon";
+		reg = <0x0 0xff538080 0x0 0x20>;
+	};
+
+	qos_sdio: qos@ff538100 {
+		compatible = "syscon";
+		reg = <0x0 0xff538100 0x0 0x20>;
+	};
+
+	qos_sfc: qos@ff538180 {
+		compatible = "syscon";
+		reg = <0x0 0xff538180 0x0 0x20>;
+	};
+
+	qos_usb_host: qos@ff540000 {
+		compatible = "syscon";
+		reg = <0x0 0xff540000 0x0 0x20>;
+	};
+
+	qos_usb_otg: qos@ff540080 {
+		compatible = "syscon";
+		reg = <0x0 0xff540080 0x0 0x20>;
+	};
+
+	qos_isp_128: qos@ff548000 {
+		compatible = "syscon";
+		reg = <0x0 0xff548000 0x0 0x20>;
+	};
+
+	qos_isp_rd: qos@ff548080 {
+		compatible = "syscon";
+		reg = <0x0 0xff548080 0x0 0x20>;
+	};
+
+	qos_isp_wr: qos@ff548100 {
+		compatible = "syscon";
+		reg = <0x0 0xff548100 0x0 0x20>;
+	};
+
+	qos_isp_m1: qos@ff548180 {
+		compatible = "syscon";
+		reg = <0x0 0xff548180 0x0 0x20>;
+	};
+
+	qos_vip: qos@ff548200 {
+		compatible = "syscon";
+		reg = <0x0 0xff548200 0x0 0x20>;
+	};
+
+	qos_rga_rd: qos@ff550000 {
+		compatible = "syscon";
+		reg = <0x0 0xff550000 0x0 0x20>;
+	};
+
+	qos_rga_wr: qos@ff550080 {
+		compatible = "syscon";
+		reg = <0x0 0xff550080 0x0 0x20>;
+	};
+
+	qos_vop_m0: qos@ff550100 {
+		compatible = "syscon";
+		reg = <0x0 0xff550100 0x0 0x20>;
+	};
+
+	qos_vop_m1: qos@ff550180 {
+		compatible = "syscon";
+		reg = <0x0 0xff550180 0x0 0x20>;
+	};
+
+	qos_vpu: qos@ff558000 {
+		compatible = "syscon";
+		reg = <0x0 0xff558000 0x0 0x20>;
+	};
+
+	qos_vpu_r128: qos@ff558080 {
+		compatible = "syscon";
+		reg = <0x0 0xff558080 0x0 0x20>;
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,px30-pinctrl";
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmugrf>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gpio0: gpio0@ff040000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff040000 0x0 0x100>;
+			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0_PMU>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@ff250000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff250000 0x0 0x100>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@ff260000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff260000 0x0 0x100>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@ff270000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x0 0xff270000 0x0 0x100>;
+			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+			bias-disable;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+			bias-pull-up;
+			drive-strength = <2>;
+		};
+
+		pcfg_pull_up_4ma: pcfg-pull-up-4ma {
+			bias-pull-up;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_4ma: pcfg-pull-none-4ma {
+			bias-disable;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_down_4ma: pcfg-pull-down-4ma {
+			bias-pull-down;
+			drive-strength = <4>;
+		};
+
+		pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+			bias-disable;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+			bias-pull-up;
+			drive-strength = <8>;
+		};
+
+		pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+			bias-disable;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+			bias-pull-up;
+			drive-strength = <12>;
+		};
+
+		pcfg_pull_none_smt: pcfg-pull-none-smt {
+			bias-disable;
+			input-schmitt-enable;
+		};
+
+		pcfg_output_high: pcfg-output-high {
+			output-high;
+		};
+
+		pcfg_output_low: pcfg-output-low {
+			output-low;
+		};
+
+		pcfg_input_high: pcfg-input-high {
+			bias-pull-up;
+			input-enable;
+		};
+
+		pcfg_input: pcfg-input {
+			input-enable;
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins =
+					<0 RK_PB0 RK_FUNC_1 &pcfg_pull_none_smt>,
+					<0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins =
+					<0 RK_PC2 RK_FUNC_1 &pcfg_pull_none_smt>,
+					<0 RK_PC3 RK_FUNC_1 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins =
+					<2 RK_PB7 RK_FUNC_2 &pcfg_pull_none_smt>,
+					<2 RK_PC0 RK_FUNC_2 &pcfg_pull_none_smt>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_4 &pcfg_pull_none_smt>,
+					<1 RK_PB5 RK_FUNC_4 &pcfg_pull_none_smt>;
+			};
+		};
+
+		tsadc {
+			tsadc_otp_gpio: tsadc-otp-gpio {
+				rockchip,pins =
+					<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			tsadc_otp_out: tsadc-otp-out {
+				rockchip,pins =
+					<0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins =
+					<0 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
+					<0 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins =
+					<0 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins =
+					<0 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts_gpio: uart0-rts-gpio {
+				rockchip,pins =
+					<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins =
+					<1 RK_PC1 RK_FUNC_1 &pcfg_pull_up>,
+					<1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins =
+					<1 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins =
+					<1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart1_rts_gpio: uart1-rts-gpio {
+				rockchip,pins =
+					<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m0 {
+			uart2m0_xfer: uart2m0-xfer {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_2 &pcfg_pull_up>,
+					<1 RK_PD3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		uart2-m1 {
+			uart2m1_xfer: uart2m1-xfer {
+				rockchip,pins =
+					<2 RK_PB4 RK_FUNC_2 &pcfg_pull_up>,
+					<2 RK_PB6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		uart3-m0 {
+			uart3m0_xfer: uart3m0-xfer {
+				rockchip,pins =
+					<0 RK_PC0 RK_FUNC_2 &pcfg_pull_up>,
+					<0 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m0_cts: uart3m0-cts {
+				rockchip,pins =
+					<0 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m0_rts: uart3m0-rts {
+				rockchip,pins =
+					<0 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m0_rts_gpio: uart3m0-rts-gpio {
+				rockchip,pins =
+					<0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart3-m1 {
+			uart3m1_xfer: uart3m1-xfer {
+				rockchip,pins =
+					<1 RK_PB6 RK_FUNC_2 &pcfg_pull_up>,
+					<1 RK_PB7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m1_cts: uart3m1-cts {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m1_rts: uart3m1-rts {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart3m1_rts_gpio: uart3m1-rts-gpio {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+		};
+
+		uart4 {
+
+			uart4_xfer: uart4-xfer {
+				rockchip,pins =
+					<1 RK_PD4 RK_FUNC_2 &pcfg_pull_up>,
+					<1 RK_PD5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			uart4_cts: uart4-cts {
+				rockchip,pins =
+					<1 RK_PD6 RK_FUNC_2 &pcfg_pull_none>;
+
+			};
+
+			uart4_rts: uart4-rts {
+				rockchip,pins =
+					<1 RK_PD7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		uart5 {
+
+			uart5_xfer: uart5-xfer {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_4 &pcfg_pull_up>,
+					<3 RK_PA1 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			uart5_cts: uart5-cts {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_4 &pcfg_pull_none>;
+
+			};
+
+			uart5_rts: uart5-rts {
+				rockchip,pins =
+					<3 RK_PA5 RK_FUNC_4 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins =
+					<1 RK_PB7 RK_FUNC_3 &pcfg_pull_up>;
+			};
+
+			spi0_csn: spi0-csn {
+				rockchip,pins =
+					<1 RK_PB6 RK_FUNC_3 &pcfg_pull_up>;
+			};
+
+			spi0_miso: spi0-miso {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_3 &pcfg_pull_up>;
+			};
+
+			spi0_mosi: spi0-mosi {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_3 &pcfg_pull_up>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins =
+					<3 RK_PB7 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi1_csn: spi1-csn {
+				rockchip,pins =
+					<3 RK_PB1 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi1_miso: spi1-miso {
+				rockchip,pins =
+					<3 RK_PB6 RK_FUNC_4 &pcfg_pull_up>;
+			};
+
+			spi1_mosi: spi1-mosi {
+				rockchip,pins =
+					<3 RK_PB4 RK_FUNC_4 &pcfg_pull_up>;
+			};
+		};
+
+		pdm {
+			pdm_clk0m0: pdm-clk0m0 {
+				rockchip,pins =
+					<3 RK_PC6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_clk0m1: pdm-clk0m1 {
+				rockchip,pins =
+					<2 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			pdm_clk1: pdm-clk1 {
+				rockchip,pins =
+					<3 RK_PC7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi0m0: pdm-sdi0m0 {
+				rockchip,pins =
+					<3 RK_PD3 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			pdm_sdi0m1: pdm-sdi0m1 {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi1: pdm-sdi1 {
+				rockchip,pins =
+					<3 RK_PD0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi2: pdm-sdi2 {
+				rockchip,pins =
+					<3 RK_PD1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			pdm_sdi3: pdm-sdi3 {
+				rockchip,pins =
+					<3 RK_PD2 RK_FUNC_4 &pcfg_pull_none>;
+			};
+
+			pdm_clk0m0_sleep: pdm-clk0m0-sleep {
+				rockchip,pins =
+					<3 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_clk0m_sleep1: pdm-clk0m1-sleep {
+				rockchip,pins =
+					<2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_clk1_sleep: pdm-clk1-sleep {
+				rockchip,pins =
+					<3 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi0m0_sleep: pdm-sdi0m0-sleep {
+				rockchip,pins =
+					<3 RK_PD3 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi0m1_sleep: pdm-sdi0m1-sleep {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi1_sleep: pdm-sdi1-sleep {
+				rockchip,pins =
+					<3 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi2_sleep: pdm-sdi2-sleep {
+				rockchip,pins =
+					<3 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdm_sdi3_sleep: pdm-sdi3-sleep {
+				rockchip,pins =
+					<3 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+		};
+
+		i2s0 {
+			i2s0_8ch_mclk: i2s0-8ch-mclk {
+				rockchip,pins =
+					<3 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sclktx: i2s0-8ch-sclktx {
+				rockchip,pins =
+					<3 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sclkrx: i2s0-8ch-sclkrx {
+				rockchip,pins =
+					<3 RK_PB4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_lrcktx: i2s0-8ch-lrcktx {
+				rockchip,pins =
+					<3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_lrckrx: i2s0-8ch-lrckrx {
+				rockchip,pins =
+					<3 RK_PB5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo: i2s0-8ch-sdo {
+				rockchip,pins =
+					<3 RK_PD2 RK_FUNC_3 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo0: i2s0-8ch-sdo0 {
+				rockchip,pins =
+					<3 RK_PC4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo1: i2s0-8ch-sdo1 {
+				rockchip,pins =
+					<3 RK_PC0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo2: i2s0-8ch-sdo2 {
+				rockchip,pins =
+					<3 RK_PB7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdo3: i2s0-8ch-sdo3 {
+				rockchip,pins =
+					<3 RK_PB6 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi: i2s0-8ch-sdi {
+				rockchip,pins =
+					<3 RK_PD3 RK_FUNC_3 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi0: i2s0-8ch-sdi0 {
+				rockchip,pins =
+					<3 RK_PC5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi1: i2s0-8ch-sdi1 {
+				rockchip,pins =
+					<3 RK_PB3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi2: i2s0-8ch-sdi2 {
+				rockchip,pins =
+					<3 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s0_8ch_sdi3: i2s0-8ch-sdi3 {
+				rockchip,pins =
+					<3 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		i2s1 {
+			i2s1_2ch_mclk: i2s1-2ch-mclk {
+				rockchip,pins =
+					<2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_sclk: i2s1-2ch-sclk {
+				rockchip,pins =
+					<2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_lrck: i2s1-2ch-lrck {
+				rockchip,pins =
+					<2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_sdi: i2s1-2ch-sdi {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			i2s1_2ch_sdo: i2s1-2ch-sdo {
+				rockchip,pins =
+					<2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2s2 {
+			i2s2_2ch_mclk: i2s2-2ch-mclk {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_sclk: i2s2-2ch-sclk {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_lrck: i2s2-2ch-lrck {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_sdi: i2s2-2ch-sdi {
+				rockchip,pins =
+					<3 RK_PA5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			i2s2_2ch_sdo: i2s2-2ch-sdo {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		sdmmc0 {
+			sdmmc0_clk: sdmmc0-clk {
+				rockchip,pins =
+					<1 RK_PD6 RK_FUNC_1 &pcfg_pull_none_4ma>;
+			};
+
+			sdmmc0_cmd: sdmmc0-cmd {
+				rockchip,pins =
+					<1 RK_PD7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_bus1: sdmmc0-bus1 {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_bus4: sdmmc0-bus4 {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PD3 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PD4 RK_FUNC_1 &pcfg_pull_up_4ma>,
+					<1 RK_PD5 RK_FUNC_1 &pcfg_pull_up_4ma>;
+			};
+
+			sdmmc0_gpio: sdmmc0-gpio {
+				rockchip,pins =
+					<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		sdmmc1 {
+			sdmmc1_clk: sdmmc1-clk {
+				rockchip,pins =
+					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none_8ma>;
+			};
+
+			sdmmc1_cmd: sdmmc1-cmd {
+				rockchip,pins =
+					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_bus1: sdmmc1-bus1 {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_bus4: sdmmc1-bus4 {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PC7 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD0 RK_FUNC_1 &pcfg_pull_up_8ma>,
+					<1 RK_PD1 RK_FUNC_1 &pcfg_pull_up_8ma>;
+			};
+
+			sdmmc1_gpio: sdmmc1-gpio {
+				rockchip,pins =
+					<1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+			};
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins =
+					<1 RK_PB1 RK_FUNC_2 &pcfg_pull_none_8ma>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins =
+					<1 RK_PB2 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins =
+					<1 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_rstnout: emmc-rstnout {
+				rockchip,pins =
+					<1 RK_PB3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_bus1: emmc-bus1 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus4: emmc-bus4 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA1 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA2 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA3 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA1 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA2 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA3 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA4 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA5 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA6 RK_FUNC_2 &pcfg_pull_up_8ma>,
+					<1 RK_PA7 RK_FUNC_2 &pcfg_pull_up_8ma>;
+			};
+		};
+
+		flash {
+			flash_cs0: flash-cs0 {
+				rockchip,pins =
+					<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_rdy: flash-rdy {
+				rockchip,pins =
+					<1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_dqs: flash-dqs {
+				rockchip,pins =
+					<1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_ale: flash-ale {
+				rockchip,pins =
+					<1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_cle: flash-cle {
+				rockchip,pins =
+					<1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_wrn: flash-wrn {
+				rockchip,pins =
+					<1 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_csl: flash-csl {
+				rockchip,pins =
+					<1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_rdn: flash-rdn {
+				rockchip,pins =
+					<1 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			flash_bus8: flash-bus8 {
+				rockchip,pins =
+					<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA1 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA2 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA3 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA4 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA5 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA6 RK_FUNC_1 &pcfg_pull_up_12ma>,
+					<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up_12ma>;
+			};
+		};
+
+		lcdc {
+			lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
+				rockchip,pins =
+					<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
+				rockchip,pins =
+					<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb_m0_den_pin: lcdc-rgb-m0-den-pin {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			lcdc_rgb888_m0_data_pins: lcdc-rgb888-m0-data-pins {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
+					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
+					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
+					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
+					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
+					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
+			};
+
+			lcdc_rgb666_m0_data_pins: lcdc-rgb666-m0-data-pins {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
+			};
+
+			lcdc_rgb565_m0_data_pins: lcdc-rgb565-m0-data-pins {
+				rockchip,pins =
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d3 */
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d1 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d5 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d4 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d11 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d10 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d8 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
+			};
+
+			lcdc_rgb888_m1_data_pins: lcdc-rgb888-m1-data-pins {
+				rockchip,pins =
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d19 */
+					<3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d18 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d16 */
+					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d23 */
+					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d22 */
+					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d21 */
+					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d20 */
+			};
+
+			lcdc_rgb666_m1_data_pins: lcdc-rgb666-m1-data-pins {
+				rockchip,pins =
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d12 */
+					<3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d17 */
+					<3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d16 */
+			};
+
+			lcdc_rgb565_m1_data_pins: lcdc-rgb565-m1-data-pins {
+				rockchip,pins =
+					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d2 */
+					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d0 */
+					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d7 */
+					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d6 */
+					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d9 */
+					<3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d15 */
+					<3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d14 */
+					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,	/* lcdc_d13 */
+					<3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;	/* lcdc_d12 */
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins =
+					<0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins =
+					<0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins =
+					<2 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins =
+					<0 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm4 {
+			pwm4_pin: pwm4-pin {
+				rockchip,pins =
+					<3 RK_PC2 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		pwm5 {
+			pwm5_pin: pwm5-pin {
+				rockchip,pins =
+					<3 RK_PC3 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		pwm6 {
+			pwm6_pin: pwm6-pin {
+				rockchip,pins =
+					<3 RK_PC4 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		pwm7 {
+			pwm7_pin: pwm7-pin {
+				rockchip,pins =
+					<3 RK_PC5 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
+		gmac {
+			rmii_pins: rmii-pins {
+				rockchip,pins =
+					/* mac_txen */
+					<2 RK_PA0 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_txd1 */
+					<2 RK_PA1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_txd0 */
+					<2 RK_PA2 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					/* mac_rxd0 */
+					<2 RK_PA3 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_rxd1 */
+					<2 RK_PA4 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_rxer */
+					<2 RK_PA5 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_rxdv */
+					<2 RK_PA6 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_mdio */
+					<2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_mdc */
+					<2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>,
+					/* mac_clk */
+					<2 RK_PB2 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		cif-m0 {
+			cif_clkout_m0: cif-clkout-m0 {
+				rockchip,pins = <2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d2d9_m0: dvp-d2d9-m0 {
+				rockchip,pins =
+					<2 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
+					<2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
+					<2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
+					<2 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
+					<2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
+					<2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
+					<2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
+					<2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
+					<2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_sync */
+					<2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_href */
+					<2 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,/* cif_clkin */
+					<2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d0d1_m0: dvp-d0d1-m0 {
+				rockchip,pins =
+					<2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data0 */
+					<2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;/* cif_data1 */
+			};
+
+			dvp_d10d11_m0:d10-d11-m0 {
+				rockchip,pins =
+					<2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data10 */
+					<2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;/* cif_data11 */
+			};
+		};
+
+		cif-m1 {
+			cif_clkout_m1: cif-clkout-m1 {
+				rockchip,pins = <3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d2d9_m1: dvp-d2d9-m1 {
+				rockchip,pins =
+					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,/* cif_data2 */
+					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,/* cif_data3 */
+					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data4 */
+					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,/* cif_data5 */
+					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,/* cif_data6 */
+					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,/* cif_data7 */
+					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,/* cif_data8 */
+					<3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,/* cif_data9 */
+					<3 RK_PD1 RK_FUNC_3 &pcfg_pull_none>,/* cif_sync */
+					<3 RK_PD2 RK_FUNC_2 &pcfg_pull_none>,/* cif_href */
+					<3 RK_PD3 RK_FUNC_2 &pcfg_pull_none>,/* cif_clkin */
+					<3 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;/* cif_clkout */
+			};
+
+			dvp_d0d1_m1: dvp-d0d1-m1 {
+				rockchip,pins =
+					<3 RK_PA1 RK_FUNC_3 &pcfg_pull_none>,/* cif_data0 */
+					<3 RK_PA2 RK_FUNC_3 &pcfg_pull_none>;/* cif_data1 */
+			};
+
+			dvp_d10d11_m1:d10-d11-m1 {
+				rockchip,pins =
+					<3 RK_PC6 RK_FUNC_3 &pcfg_pull_none>,/* cif_data10 */
+					<3 RK_PC7 RK_FUNC_3 &pcfg_pull_none>;/* cif_data11 */
+			};
+		};
+
+		isp {
+			isp_prelight: isp-prelight {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_4 &pcfg_pull_none>;/* ISP_PRELIGHTTRIG */
+			};
+		};
+	};
+};
diff --git a/include/dt-bindings/clock/px30-cru.h b/include/dt-bindings/clock/px30-cru.h
new file mode 100644
index 0000000000..0873db1498
--- /dev/null
+++ b/include/dt-bindings/clock/px30-cru.h
@@ -0,0 +1,398 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
+ * Author: Elaine <zhangqing@rock-chips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_PX30_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_PX30_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_CPLL		3
+#define PLL_NPLL		4
+#define APLL_BOOST_H		5
+#define APLL_BOOST_L		6
+#define ARMCLK			7
+
+/* sclk gates (special clocks) */
+#define USB480M			14
+#define SCLK_PDM		15
+#define SCLK_I2S0_TX		16
+#define SCLK_I2S0_TX_OUT	17
+#define SCLK_I2S0_RX		18
+#define SCLK_I2S0_RX_OUT	19
+#define SCLK_I2S1		20
+#define SCLK_I2S1_OUT		21
+#define SCLK_I2S2		22
+#define SCLK_I2S2_OUT		23
+#define SCLK_UART1		24
+#define SCLK_UART2		25
+#define SCLK_UART3		26
+#define SCLK_UART4		27
+#define SCLK_UART5		28
+#define SCLK_I2C0		29
+#define SCLK_I2C1		30
+#define SCLK_I2C2		31
+#define SCLK_I2C3		32
+#define SCLK_I2C4		33
+#define SCLK_PWM0		34
+#define SCLK_PWM1		35
+#define SCLK_SPI0		36
+#define SCLK_SPI1		37
+#define SCLK_TIMER0		38
+#define SCLK_TIMER1		39
+#define SCLK_TIMER2		40
+#define SCLK_TIMER3		41
+#define SCLK_TIMER4		42
+#define SCLK_TIMER5		43
+#define SCLK_TSADC		44
+#define SCLK_SARADC		45
+#define SCLK_OTP		46
+#define SCLK_OTP_USR		47
+#define SCLK_CRYPTO		48
+#define SCLK_CRYPTO_APK		49
+#define SCLK_DDRC		50
+#define SCLK_ISP		51
+#define SCLK_CIF_OUT		52
+#define SCLK_RGA_CORE		53
+#define SCLK_VOPB_PWM		54
+#define SCLK_NANDC		55
+#define SCLK_SDIO		56
+#define SCLK_EMMC		57
+#define SCLK_SFC		58
+#define SCLK_SDMMC		59
+#define SCLK_OTG_ADP		60
+#define SCLK_GMAC_SRC		61
+#define SCLK_GMAC		62
+#define SCLK_GMAC_RX_TX		63
+#define SCLK_MAC_REF		64
+#define SCLK_MAC_REFOUT		65
+#define SCLK_MAC_OUT		66
+#define SCLK_SDMMC_DRV		67
+#define SCLK_SDMMC_SAMPLE	68
+#define SCLK_SDIO_DRV		69
+#define SCLK_SDIO_SAMPLE	70
+#define SCLK_EMMC_DRV		71
+#define SCLK_EMMC_SAMPLE	72
+#define SCLK_GPU		73
+#define SCLK_PVTM		74
+#define SCLK_CORE_VPU		75
+#define SCLK_GMAC_RMII		76
+#define SCLK_UART2_SRC		77
+#define SCLK_NANDC_DIV		78
+#define SCLK_NANDC_DIV50	79
+#define SCLK_SDIO_DIV		80
+#define SCLK_SDIO_DIV50		81
+#define SCLK_EMMC_DIV		82
+#define SCLK_EMMC_DIV50		83
+
+/* dclk gates */
+#define DCLK_VOPB		150
+#define DCLK_VOPL		151
+
+/* aclk gates */
+#define ACLK_GPU		170
+#define ACLK_BUS_PRE		171
+#define ACLK_CRYPTO		172
+#define ACLK_VI_PRE		173
+#define ACLK_VO_PRE		174
+#define ACLK_VPU		175
+#define ACLK_PERI_PRE		176
+#define ACLK_GMAC		178
+#define ACLK_CIF		179
+#define ACLK_ISP		180
+#define ACLK_VOPB		181
+#define ACLK_VOPL		182
+#define ACLK_RGA		183
+#define ACLK_GIC		184
+#define ACLK_DCF		186
+#define ACLK_DMAC		187
+
+/* hclk gates */
+#define HCLK_BUS_PRE		240
+#define HCLK_CRYPTO		241
+#define HCLK_VI_PRE		242
+#define HCLK_VO_PRE		243
+#define HCLK_VPU		244
+#define HCLK_PERI_PRE		245
+#define HCLK_MMC_NAND		246
+#define HCLK_SDMMC		247
+#define HCLK_USB		248
+#define HCLK_CIF		249
+#define HCLK_ISP		250
+#define HCLK_VOPB		251
+#define HCLK_VOPL		252
+#define HCLK_RGA		253
+#define HCLK_NANDC		254
+#define HCLK_SDIO		255
+#define HCLK_EMMC		256
+#define HCLK_SFC		257
+#define HCLK_OTG		258
+#define HCLK_HOST		259
+#define HCLK_HOST_ARB		260
+#define HCLK_PDM		261
+#define HCLK_I2S0		262
+#define HCLK_I2S1		263
+#define HCLK_I2S2		264
+
+/* pclk gates */
+#define PCLK_BUS_PRE		320
+#define PCLK_DDR		321
+#define PCLK_VO_PRE		322
+#define PCLK_GMAC		323
+#define PCLK_MIPI_DSI		324
+#define PCLK_MIPIDSIPHY		325
+#define PCLK_MIPICSIPHY		326
+#define PCLK_USB_GRF		327
+#define PCLK_DCF		328
+#define PCLK_UART1		329
+#define PCLK_UART2		330
+#define PCLK_UART3		331
+#define PCLK_UART4		332
+#define PCLK_UART5		333
+#define PCLK_I2C0		334
+#define PCLK_I2C1		335
+#define PCLK_I2C2		336
+#define PCLK_I2C3		337
+#define PCLK_I2C4		338
+#define PCLK_PWM0		339
+#define PCLK_PWM1		340
+#define PCLK_SPI0		341
+#define PCLK_SPI1		342
+#define PCLK_SARADC		343
+#define PCLK_TSADC		344
+#define PCLK_TIMER		345
+#define PCLK_OTP_NS		346
+#define PCLK_WDT_NS		347
+#define PCLK_GPIO1		348
+#define PCLK_GPIO2		349
+#define PCLK_GPIO3		350
+#define PCLK_ISP		351
+#define PCLK_CIF		352
+#define PCLK_OTP_PHY		353
+
+#define CLK_NR_CLKS		(PCLK_OTP_PHY + 1)
+
+/* pmu-clocks indices */
+
+#define PLL_GPLL		1
+
+#define SCLK_RTC32K_PMU		4
+#define SCLK_WIFI_PMU		5
+#define SCLK_UART0_PMU		6
+#define SCLK_PVTM_PMU		7
+#define PCLK_PMU_PRE		8
+#define SCLK_REF24M_PMU		9
+#define SCLK_USBPHY_REF		10
+#define SCLK_MIPIDSIPHY_REF	11
+
+#define XIN24M_DIV		12
+
+#define PCLK_GPIO0_PMU		20
+#define PCLK_UART0_PMU		21
+
+#define CLKPMU_NR_CLKS		(PCLK_UART0_PMU + 1)
+
+/* soft-reset indices */
+#define SRST_CORE0_PO		0
+#define SRST_CORE1_PO		1
+#define SRST_CORE2_PO		2
+#define SRST_CORE3_PO		3
+#define SRST_CORE0		4
+#define SRST_CORE1		5
+#define SRST_CORE2		6
+#define SRST_CORE3		7
+#define SRST_CORE0_DBG		8
+#define SRST_CORE1_DBG		9
+#define SRST_CORE2_DBG		10
+#define SRST_CORE3_DBG		11
+#define SRST_TOPDBG		12
+#define SRST_CORE_NOC		13
+#define SRST_STRC_A		14
+#define SRST_L2C		15
+
+#define SRST_DAP		16
+#define SRST_CORE_PVTM		17
+#define SRST_GPU		18
+#define SRST_GPU_NIU		19
+#define SRST_UPCTL2		20
+#define SRST_UPCTL2_A		21
+#define SRST_UPCTL2_P		22
+#define SRST_MSCH		23
+#define SRST_MSCH_P		24
+#define SRST_DDRMON_P		25
+#define SRST_DDRSTDBY_P		26
+#define SRST_DDRSTDBY		27
+#define SRST_DDRGRF_p		28
+#define SRST_AXI_SPLIT_A	29
+#define SRST_AXI_CMD_A		30
+#define SRST_AXI_CMD_P		31
+
+#define SRST_DDRPHY		32
+#define SRST_DDRPHYDIV		33
+#define SRST_DDRPHY_P		34
+#define SRST_VPU_A		36
+#define SRST_VPU_NIU_A		37
+#define SRST_VPU_H		38
+#define SRST_VPU_NIU_H		39
+#define SRST_VI_NIU_A		40
+#define SRST_VI_NIU_H		41
+#define SRST_ISP_H		42
+#define SRST_ISP		43
+#define SRST_CIF_A		44
+#define SRST_CIF_H		45
+#define SRST_CIF_PCLKIN		46
+#define SRST_MIPICSIPHY_P	47
+
+#define SRST_VO_NIU_A		48
+#define SRST_VO_NIU_H		49
+#define SRST_VO_NIU_P		50
+#define SRST_VOPB_A		51
+#define SRST_VOPB_H		52
+#define SRST_VOPB		53
+#define SRST_PWM_VOPB		54
+#define SRST_VOPL_A		55
+#define SRST_VOPL_H		56
+#define SRST_VOPL		57
+#define SRST_RGA_A		58
+#define SRST_RGA_H		59
+#define SRST_RGA		60
+#define SRST_MIPIDSI_HOST_P	61
+#define SRST_MIPIDSIPHY_P	62
+#define SRST_VPU_CORE		63
+
+#define SRST_PERI_NIU_A		64
+#define SRST_USB_NIU_H		65
+#define SRST_USB2OTG_H		66
+#define SRST_USB2OTG		67
+#define SRST_USB2OTG_ADP	68
+#define SRST_USB2HOST_H		69
+#define SRST_USB2HOST_ARB_H	70
+#define SRST_USB2HOST_AUX_H	71
+#define SRST_USB2HOST_EHCI	72
+#define SRST_USB2HOST		73
+#define SRST_USBPHYPOR		74
+#define SRST_USBPHY_OTG_PORT	75
+#define SRST_USBPHY_HOST_PORT	76
+#define SRST_USBPHY_GRF		77
+#define SRST_CPU_BOOST_P	78
+#define SRST_CPU_BOOST		79
+
+#define SRST_MMC_NAND_NIU_H	80
+#define SRST_SDIO_H		81
+#define SRST_EMMC_H		82
+#define SRST_SFC_H		83
+#define SRST_SFC		84
+#define SRST_SDCARD_NIU_H	85
+#define SRST_SDMMC_H		86
+#define SRST_NANDC_H		89
+#define SRST_NANDC		90
+#define SRST_GMAC_NIU_A		92
+#define SRST_GMAC_NIU_P		93
+#define SRST_GMAC_A		94
+
+#define SRST_PMU_NIU_P		96
+#define SRST_PMU_SGRF_P		97
+#define SRST_PMU_GRF_P		98
+#define SRST_PMU		99
+#define SRST_PMU_MEM_P		100
+#define SRST_PMU_GPIO0_P	101
+#define SRST_PMU_UART0_P	102
+#define SRST_PMU_CRU_P		103
+#define SRST_PMU_PVTM		104
+#define SRST_PMU_UART		105
+#define SRST_PMU_NIU_H		106
+#define SRST_PMU_DDR_FAIL_SAVE	107
+#define SRST_PMU_CORE_PERF_A	108
+#define SRST_PMU_CORE_GRF_P	109
+#define SRST_PMU_GPU_PERF_A	110
+#define SRST_PMU_GPU_GRF_P	111
+
+#define SRST_CRYPTO_NIU_A	112
+#define SRST_CRYPTO_NIU_H	113
+#define SRST_CRYPTO_A		114
+#define SRST_CRYPTO_H		115
+#define SRST_CRYPTO		116
+#define SRST_CRYPTO_APK		117
+#define SRST_BUS_NIU_H		120
+#define SRST_USB_NIU_P		121
+#define SRST_BUS_TOP_NIU_P	122
+#define SRST_INTMEM_A		123
+#define SRST_GIC_A		124
+#define SRST_ROM_H		126
+#define SRST_DCF_A		127
+
+#define SRST_DCF_P		128
+#define SRST_PDM_H		129
+#define SRST_PDM		130
+#define SRST_I2S0_H		131
+#define SRST_I2S0_TX		132
+#define SRST_I2S1_H		133
+#define SRST_I2S1		134
+#define SRST_I2S2_H		135
+#define SRST_I2S2		136
+#define SRST_UART1_P		137
+#define SRST_UART1		138
+#define SRST_UART2_P		139
+#define SRST_UART2		140
+#define SRST_UART3_P		141
+#define SRST_UART3		142
+#define SRST_UART4_P		143
+
+#define SRST_UART4		144
+#define SRST_UART5_P		145
+#define SRST_UART5		146
+#define SRST_I2C0_P		147
+#define SRST_I2C0		148
+#define SRST_I2C1_P		149
+#define SRST_I2C1		150
+#define SRST_I2C2_P		151
+#define SRST_I2C2		152
+#define SRST_I2C3_P		153
+#define SRST_I2C3		154
+#define SRST_PWM0_P		157
+#define SRST_PWM0		158
+#define SRST_PWM1_P		159
+
+#define SRST_PWM1		160
+#define SRST_SPI0_P		161
+#define SRST_SPI0		162
+#define SRST_SPI1_P		163
+#define SRST_SPI1		164
+#define SRST_SARADC_P		165
+#define SRST_SARADC		166
+#define SRST_TSADC_P		167
+#define SRST_TSADC		168
+#define SRST_TIMER_P		169
+#define SRST_TIMER0		170
+#define SRST_TIMER1		171
+#define SRST_TIMER2		172
+#define SRST_TIMER3		173
+#define SRST_TIMER4		174
+#define SRST_TIMER5		175
+
+#define SRST_OTP_NS_P		176
+#define SRST_OTP_NS_SBPI	177
+#define SRST_OTP_NS_USR		178
+#define SRST_OTP_PHY_P		179
+#define SRST_OTP_PHY		180
+#define SRST_WDT_NS_P		181
+#define SRST_GPIO1_P		182
+#define SRST_GPIO2_P		183
+#define SRST_GPIO3_P		184
+#define SRST_SGRF_P		185
+#define SRST_GRF_P		186
+#define SRST_I2S0_RX		191
+
+#endif
diff --git a/include/dt-bindings/power/px30-power.h b/include/dt-bindings/power/px30-power.h
new file mode 100644
index 0000000000..4ed482e809
--- /dev/null
+++ b/include/dt-bindings/power/px30-power.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+#ifndef __DT_BINDINGS_POWER_PX30_POWER_H__
+#define __DT_BINDINGS_POWER_PX30_POWER_H__
+
+/* VD_CORE */
+#define PX30_PD_A35_0		0
+#define PX30_PD_A35_1		1
+#define PX30_PD_A35_2		2
+#define PX30_PD_A35_3		3
+#define PX30_PD_SCU		4
+
+/* VD_LOGIC */
+#define PX30_PD_USB		5
+#define PX30_PD_DDR		6
+#define PX30_PD_SDCARD		7
+#define PX30_PD_CRYPTO		8
+#define PX30_PD_GMAC		9
+#define PX30_PD_MMC_NAND	10
+#define PX30_PD_VPU		11
+#define PX30_PD_VO		12
+#define PX30_PD_VI		13
+#define PX30_PD_GPU		14
+
+/* VD_PMU */
+#define PX30_PD_PMU		15
+
+#endif
diff --git a/include/dt-bindings/soc/rockchip,boot-mode.h b/include/dt-bindings/soc/rockchip,boot-mode.h
new file mode 100644
index 0000000000..1dfc4f4fa7
--- /dev/null
+++ b/include/dt-bindings/soc/rockchip,boot-mode.h
@@ -0,0 +1,19 @@
+#ifndef __ROCKCHIP_BOOT_MODE_H
+#define __ROCKCHIP_BOOT_MODE_H
+
+/* high 24 bits is tag, low 8 bits is type */
+#define REBOOT_FLAG		0x5242C300
+/* normal boot */
+#define BOOT_NORMAL		(REBOOT_FLAG + 0)
+/* enter bootloader rockusb mode */
+#define BOOT_BL_DOWNLOAD	(REBOOT_FLAG + 1)
+/* enter recovery */
+#define BOOT_RECOVERY		(REBOOT_FLAG + 3)
+/* enter fastboot mode */
+#define BOOT_FASTBOOT		(REBOOT_FLAG + 9)
+/* enter charging mode */
+#define BOOT_CHARGING		(REBOOT_FLAG + 11)
+/* enter usb mass storage mode */
+#define BOOT_UMS		(REBOOT_FLAG + 12)
+
+#endif

commit 10e73f7ba0a49f1989531b7f6d6876fd073f7e65
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:11:11 2018 +0800

    rockchip: px30: add new soc support
    
    The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
    including NEON and GPU, Mali-400 graphics, several DDR3 options
    and video codec support. Peripherals include Gigabit Ethernet,
    USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
    
    Change-Id: I0c3c58aa654d42291ae902593285bc974cda19d5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
new file mode 100644
index 0000000000..65d99ccbd6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
@@ -0,0 +1,593 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_px30_H
+#define _ASM_ARCH_GRF_px30_H
+
+#include <common.h>
+
+struct px30_grf {
+	unsigned int gpio1al_iomux;
+	unsigned int gpio1ah_iomux;
+	unsigned int gpio1bl_iomux;
+	unsigned int gpio1bh_iomux;
+	unsigned int gpio1cl_iomux;
+	unsigned int gpio1ch_iomux;
+	unsigned int gpio1dl_iomux;
+	unsigned int gpio1dh_iomux;
+
+	unsigned int gpio2al_iomux;
+	unsigned int gpio2ah_iomux;
+	unsigned int gpio2bl_iomux;
+	unsigned int gpio2bh_iomux;
+	unsigned int gpio2cl_iomux;
+	unsigned int gpio2ch_iomux;
+	unsigned int gpio2dl_iomux;
+	unsigned int gpio2dh_iomux;
+
+	unsigned int gpio3al_iomux;
+	unsigned int gpio3ah_iomux;
+	unsigned int gpio3bl_iomux;
+	unsigned int gpio3bh_iomux;
+	unsigned int gpio3cl_iomux;
+	unsigned int gpio3ch_iomux;
+	unsigned int gpio3dl_iomux;
+	unsigned int gpio3dh_iomux;
+
+	unsigned int gpio1a_p;
+	unsigned int gpio1b_p;
+	unsigned int gpio1c_p;
+	unsigned int gpio1d_p;
+	unsigned int gpio2a_p;
+	unsigned int gpio2b_p;
+	unsigned int gpio2c_p;
+	unsigned int gpio2d_p;
+	unsigned int gpio3a_p;
+	unsigned int gpio3b_p;
+	unsigned int gpio3c_p;
+	unsigned int gpio3d_p;
+	unsigned int gpio1a_sr;
+	unsigned int gpio1b_sr;
+	unsigned int gpio1c_sr;
+	unsigned int gpio1d_sr;
+	unsigned int gpio2a_sr;
+	unsigned int gpio2b_sr;
+	unsigned int gpio2c_sr;
+	unsigned int gpio2d_sr;
+	unsigned int gpio3a_sr;
+	unsigned int gpio3b_sr;
+	unsigned int gpio3c_sr;
+	unsigned int gpio3d_sr;
+	unsigned int gpio1a_smt;
+	unsigned int gpio1b_smt;
+	unsigned int gpio1c_smt;
+	unsigned int gpio1d_smt;
+	unsigned int gpio2a_smt;
+	unsigned int gpio2b_smt;
+	unsigned int gpio2c_smt;
+	unsigned int gpio2d_smt;
+	unsigned int gpio3a_smt;
+	unsigned int gpio3b_smt;
+	unsigned int gpio3c_smt;
+	unsigned int gpio3d_smt;
+	unsigned int gpio1a_e;
+	unsigned int gpio1b_e;
+	unsigned int gpio1c_e;
+	unsigned int gpio1d_e;
+	unsigned int gpio2a_e;
+	unsigned int gpio2b_e;
+	unsigned int gpio2c_e;
+	unsigned int gpio2d_e;
+	unsigned int gpio3a_e;
+	unsigned int gpio3b_e;
+	unsigned int gpio3c_e;
+	unsigned int gpio3d_e;
+
+	unsigned int reserved0[(0x180 - 0x11C) / 4 - 1];
+	unsigned int io_vsel;
+	unsigned int iofunc_con0;
+	unsigned int reserved1[(0x400 - 0x184) / 4 - 1];
+	unsigned int soc_con[6];
+	unsigned int reserved2[(0x480 - 0x414) / 4 - 1];
+	unsigned int soc_status0;
+	unsigned int reserved3[(0x500 - 0x480) / 4 - 1];
+	unsigned int cpu_con[3];
+	unsigned int reserved4[5];
+	unsigned int cpu_status[2];
+	unsigned int reserved5[2];
+	unsigned int soc_noc_con[2];
+	unsigned int reserved6[6];
+	unsigned int ddr_bankhash[4];
+	unsigned int reserved7[(0x700 - 0x55c) / 4 - 1];
+	unsigned int host0_con[2];
+	unsigned int reserved8[(0x880 - 0x704) / 4 - 1];
+	unsigned int otg_con3;
+	unsigned int reserved9[3];
+	unsigned int host0_status4;
+	unsigned int reserved10[(0x904 - 0x890) / 4 - 1];
+	unsigned int mac_con1;
+};
+
+check_member(px30_grf, mac_con1, 0x904);
+
+struct px30_pmugrf {
+	unsigned int gpio0a_e;
+	unsigned int gpio0b_e;
+	unsigned int gpio0c_e;
+	unsigned int gpio0d_e;
+	unsigned int gpio0a_p;
+	unsigned int gpio0b_p;
+	unsigned int gpio0c_p;
+	unsigned int gpio0d_p;
+	unsigned int gpio0al_iomux;
+	unsigned int gpio0bl_iomux;
+	unsigned int gpio0cl_iomux;
+	unsigned int gpio0dl_iomux;
+	unsigned int gpio0l_sr;
+	unsigned int gpio0h_sr;
+	unsigned int gpio0l_smt;
+	unsigned int gpio0h_smt;
+	unsigned int reserved1[(0x100 - 0x3c) / 4 - 1];
+	unsigned int soc_con[4];
+	unsigned int reserved2[(0x180 - 0x10c) / 4 - 1];
+	unsigned int pvtm_con[2];
+	unsigned int reserved3[2];
+	unsigned int pvtm_status[2];
+	unsigned int reserved4[(0x200 - 0x194) / 4 - 1];
+	unsigned int os_reg[12];
+	unsigned int reset_function_status;
+};
+
+check_member(px30_pmugrf, reset_function_status, 0x230);
+
+/* GRF_GPIO0A_IOMUX */
+enum {
+	GPIO0A7_SHIFT		= 14,
+	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
+	GPIO0A7_GPIO		= 0,
+	GPIO0A7_I2C3_SDA,
+	GPIO0A7_HDMI_DDCSDA,
+
+	GPIO0A6_SHIFT		= 12,
+	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
+	GPIO0A6_GPIO		= 0,
+	GPIO0A6_I2C3_SCL,
+	GPIO0A6_HDMI_DDCSCL,
+
+	GPIO0A3_SHIFT		= 6,
+	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
+	GPIO0A3_GPIO		= 0,
+	GPIO0A3_I2C1_SDA,
+	GPIO0A3_SDIO_CMD,
+
+	GPIO0A2_SHIFT		= 4,
+	GPIO0A2_MASK		= 3 << GPIO0A2_SHIFT,
+	GPIO0A2_GPIO		= 0,
+	GPIO0A2_I2C1_SCL,
+
+	GPIO0A1_SHIFT		= 2,
+	GPIO0A1_MASK		= 3 << GPIO0A1_SHIFT,
+	GPIO0A1_GPIO		= 0,
+	GPIO0A1_I2C0_SDA,
+
+	GPIO0A0_SHIFT		= 0,
+	GPIO0A0_MASK		= 3 << GPIO0A0_SHIFT,
+	GPIO0A0_GPIO		= 0,
+	GPIO0A0_I2C0_SCL,
+};
+
+/* GRF_GPIO0B_IOMUX */
+enum {
+	GPIO0B7_SHIFT		= 14,
+	GPIO0B7_MASK		= 3 << GPIO0B7_SHIFT,
+	GPIO0B7_GPIO		= 0,
+	GPIO0B7_HDMI_HDP,
+
+	GPIO0B6_SHIFT		= 12,
+	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
+	GPIO0B6_GPIO		= 0,
+	GPIO0B6_I2S_SDI,
+	GPIO0B6_SPI_CSN0,
+
+	GPIO0B5_SHIFT		= 10,
+	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
+	GPIO0B5_GPIO		= 0,
+	GPIO0B5_I2S_SDO,
+	GPIO0B5_SPI_RXD,
+
+	GPIO0B3_SHIFT		= 6,
+	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
+	GPIO0B3_GPIO		= 0,
+	GPIO0B3_I2S1_LRCKRX,
+	GPIO0B3_SPI_TXD,
+
+	GPIO0B1_SHIFT		= 2,
+	GPIO0B1_MASK		= 3 << GPIO0B1_SHIFT,
+	GPIO0B1_GPIO		= 0,
+	GPIO0B1_I2S_SCLK,
+	GPIO0B1_SPI_CLK,
+
+	GPIO0B0_SHIFT		= 0,
+	GPIO0B0_MASK		= 3,
+	GPIO0B0_GPIO		= 0,
+	GPIO0B0_I2S_MCLK,
+};
+
+/* GRF_GPIO0C_IOMUX */
+enum {
+	GPIO0C4_SHIFT		= 8,
+	GPIO0C4_MASK		= 3 << GPIO0C4_SHIFT,
+	GPIO0C4_GPIO		= 0,
+	GPIO0C4_HDMI_CECSDA,
+
+	GPIO0C1_SHIFT		= 2,
+	GPIO0C1_MASK		= 3 << GPIO0C1_SHIFT,
+	GPIO0C1_GPIO		= 0,
+	GPIO0C1_UART0_RSTN,
+	GPIO0C1_CLK_OUT1,
+};
+
+/* GRF_GPIO0D_IOMUX */
+enum {
+	GPIO0D6_SHIFT		= 12,
+	GPIO0D6_MASK		= 3 << GPIO0D6_SHIFT,
+	GPIO0D6_GPIO		= 0,
+	GPIO0D6_SDIO_PWREN,
+	GPIO0D6_PWM11,
+
+
+	GPIO0D4_SHIFT		= 8,
+	GPIO0D4_MASK		= 3 << GPIO0D4_SHIFT,
+	GPIO0D4_GPIO		= 0,
+	GPIO0D4_PWM2,
+
+	GPIO0D3_SHIFT		= 6,
+	GPIO0D3_MASK		= 3 << GPIO0D3_SHIFT,
+	GPIO0D3_GPIO		= 0,
+	GPIO0D3_PWM1,
+
+	GPIO0D2_SHIFT		= 4,
+	GPIO0D2_MASK		= 3 << GPIO0D2_SHIFT,
+	GPIO0D2_GPIO		= 0,
+	GPIO0D2_PWM0,
+};
+
+/* GRF_GPIO1A_IOMUX */
+enum {
+	GPIO1A7_SHIFT		= 14,
+	GPIO1A7_MASK		= 1,
+	GPIO1A7_GPIO		= 0,
+	GPIO1A7_SDMMC_WRPRT,
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+	GPIO1B7_SHIFT		= 14,
+	GPIO1B7_MASK		= 3 << GPIO1B7_SHIFT,
+	GPIO1B7_GPIO		= 0,
+	GPIO1B7_SDMMC_CMD,
+
+	GPIO1B6_SHIFT		= 12,
+	GPIO1B6_MASK		= 3 << GPIO1B6_SHIFT,
+	GPIO1B6_GPIO		= 0,
+	GPIO1B6_SDMMC_PWREN,
+
+	GPIO1B4_SHIFT		= 8,
+	GPIO1B4_MASK		= 3 << GPIO1B4_SHIFT,
+	GPIO1B4_GPIO		= 0,
+	GPIO1B4_SPI_CSN1,
+	GPIO1B4_PWM12,
+
+	GPIO1B3_SHIFT		= 6,
+	GPIO1B3_MASK		= 3 << GPIO1B3_SHIFT,
+	GPIO1B3_GPIO		= 0,
+	GPIO1B3_UART1_RSTN,
+	GPIO1B3_PWM13,
+
+	GPIO1B2_SHIFT		= 4,
+	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
+	GPIO1B2_GPIO		= 0,
+	GPIO1B2_UART1_SIN,
+	GPIO1B2_UART21_SIN,
+
+	GPIO1B1_SHIFT		= 2,
+	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
+	GPIO1B1_GPIO		= 0,
+	GPIO1B1_UART1_SOUT,
+	GPIO1B1_UART21_SOUT,
+};
+
+/* GRF_GPIO1C_IOMUX */
+enum {
+	GPIO1C7_SHIFT		= 14,
+	GPIO1C7_MASK		= 3 << GPIO1C7_SHIFT,
+	GPIO1C7_GPIO		= 0,
+	GPIO1C7_NAND_CS3,
+	GPIO1C7_EMMC_RSTNOUT,
+
+	GPIO1C6_SHIFT		= 12,
+	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
+	GPIO1C6_GPIO		= 0,
+	GPIO1C6_NAND_CS2,
+	GPIO1C6_EMMC_CMD,
+
+
+	GPIO1C5_SHIFT		= 10,
+	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
+	GPIO1C5_GPIO		= 0,
+	GPIO1C5_SDMMC_D3,
+	GPIO1C5_JTAG_TMS,
+
+	GPIO1C4_SHIFT		= 8,
+	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
+	GPIO1C4_GPIO		= 0,
+	GPIO1C4_SDMMC_D2,
+	GPIO1C4_JTAG_TCK,
+
+	GPIO1C3_SHIFT		= 6,
+	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
+	GPIO1C3_GPIO		= 0,
+	GPIO1C3_SDMMC_D1,
+	GPIO1C3_UART2_SIN,
+
+	GPIO1C2_SHIFT		= 4,
+	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
+	GPIO1C2_GPIO		= 0,
+	GPIO1C2_SDMMC_D0,
+	GPIO1C2_UART2_SOUT,
+
+	GPIO1C1_SHIFT		= 2,
+	GPIO1C1_MASK		= 3 << GPIO1C1_SHIFT,
+	GPIO1C1_GPIO		= 0,
+	GPIO1C1_SDMMC_DETN,
+
+	GPIO1C0_SHIFT		= 0,
+	GPIO1C0_MASK		= 3 << GPIO1C0_SHIFT,
+	GPIO1C0_GPIO		= 0,
+	GPIO1C0_SDMMC_CLKOUT,
+};
+
+/* GRF_GPIO1DL_IOMUX */
+enum {
+
+	GPIO1D3_SHIFT		= 12,
+	GPIO1D3_MASK		= 0xf << GPIO1D3_SHIFT,
+	GPIO1D3_GPIO		= 0,
+	GPIO1D3_SDMMC1_D1,
+	GPIO1D3_UART2_RXM0,
+
+	GPIO1D2_SHIFT		= 8,
+	GPIO1D2_MASK		= 0xf << GPIO1D2_SHIFT,
+	GPIO1D2_GPIO		= 0,
+	GPIO1D2_SDMMC1_D0,
+	GPIO1D2_UART2_TXM0,
+
+	GPIO1D1_SHIFT		= 4,
+	GPIO1D1_MASK		= 0xf << GPIO1D1_SHIFT,
+	GPIO1D1_GPIO		= 0,
+	GPIO1D1_SDMMC1_D3,
+
+	GPIO1D0_SHIFT		= 0,
+	GPIO1D0_MASK		= 0xf << GPIO1D0_SHIFT,
+	GPIO1D0_GPIO		= 0,
+	GPIO1D0_SDMMC1_D2,
+};
+/* GRF_GPIO1DH_IOMUX */
+enum {
+
+	GPIO1D7_SHIFT		= 14,
+	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
+	GPIO1D7_GPIO		= 0,
+	GPIO1D7_NAND_D7,
+	GPIO1D7_EMMC_D7,
+
+	GPIO1D6_SHIFT		= 12,
+	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
+	GPIO1D6_GPIO		= 0,
+	GPIO1D6_NAND_D6,
+	GPIO1D6_EMMC_D6,
+
+	GPIO1D5_SHIFT		= 10,
+	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
+	GPIO1D5_GPIO		= 0,
+	GPIO1D5_NAND_D5,
+	GPIO1D5_EMMC_D5,
+
+	GPIO1D4_SHIFT		= 8,
+	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
+	GPIO1D4_GPIO		= 0,
+	GPIO1D4_NAND_D4,
+	GPIO1D4_EMMC_D4,
+};
+/* GRF_GPIO2A_IOMUX */
+enum {
+	GPIO2A7_SHIFT		= 14,
+	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
+	GPIO2A7_GPIO		= 0,
+	GPIO2A7_NAND_DQS,
+	GPIO2A7_EMMC_CLKOUT,
+
+	GPIO2A5_SHIFT		= 10,
+	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
+	GPIO2A5_GPIO		= 0,
+	GPIO2A5_NAND_WP,
+	GPIO2A5_EMMC_PWREN,
+
+	GPIO2A4_SHIFT		= 8,
+	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
+	GPIO2A4_GPIO		= 0,
+	GPIO2A4_NAND_RDY,
+	GPIO2A4_EMMC_CMD,
+
+	GPIO2A3_SHIFT		= 6,
+	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
+	GPIO2A3_GPIO		= 0,
+	GPIO2A3_NAND_RDN,
+	GPIO2A4_SPI1_CSN1,
+
+	GPIO2A2_SHIFT		= 4,
+	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
+	GPIO2A2_GPIO		= 0,
+	GPIO2A2_NAND_WRN,
+	GPIO2A4_SPI1_CSN0,
+
+	GPIO2A1_SHIFT		= 2,
+	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
+	GPIO2A1_GPIO		= 0,
+	GPIO2A1_NAND_CLE,
+	GPIO2A1_SPI1_TXD,
+
+	GPIO2A0_SHIFT		= 0,
+	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
+	GPIO2A0_GPIO		= 0,
+	GPIO2A0_NAND_ALE,
+	GPIO2A0_SPI1_RXD,
+};
+
+/* GRF_GPIO2B_IOMUX */
+enum {
+	GPIO2B7_SHIFT		= 14,
+	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
+	GPIO2B7_GPIO		= 0,
+	GPIO2B7_GMAC_RXER,
+
+	GPIO2B6_SHIFT		= 12,
+	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
+	GPIO2B6_GPIO		= 0,
+	GPIO2B6_GMAC_CLK,
+	GPIO2B6_MAC_LINK,
+
+	GPIO2B5_SHIFT		= 10,
+	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
+	GPIO2B5_GPIO		= 0,
+	GPIO2B5_GMAC_TXEN,
+
+	GPIO2B4_SHIFT		= 8,
+	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
+	GPIO2B4_GPIO		= 0,
+	GPIO2B4_GMAC_MDIO,
+
+	GPIO2B3_SHIFT		= 6,
+	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
+	GPIO2B3_GPIO		= 0,
+	GPIO2B3_GMAC_RXCLK,
+
+	GPIO2B2_SHIFT		= 4,
+	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
+	GPIO2B2_GPIO		= 0,
+	GPIO2B2_GMAC_CRS,
+
+	GPIO2B1_SHIFT		= 2,
+	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
+	GPIO2B1_GPIO		= 0,
+	GPIO2B1_GMAC_TXCLK,
+
+
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
+	GPIO2B0_GPIO		= 0,
+	GPIO2B0_GMAC_RXDV,
+	GPIO2B0_MAC_SPEED_IOUT,
+};
+
+/* GRF_GPIO2C_IOMUX */
+enum {
+	GPIO2C7_SHIFT		= 14,
+	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
+	GPIO2C7_GPIO		= 0,
+	GPIO2C7_GMAC_TXD3,
+
+	GPIO2C6_SHIFT		= 12,
+	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
+	GPIO2C6_GPIO		= 0,
+	GPIO2C6_GMAC_TXD2,
+
+	GPIO2C5_SHIFT		= 10,
+	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
+	GPIO2C5_GPIO		= 0,
+	GPIO2C5_I2C2_SCL,
+	GPIO2C5_GMAC_RXD2,
+
+	GPIO2C4_SHIFT		= 8,
+	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
+	GPIO2C4_GPIO		= 0,
+	GPIO2C4_I2C2_SDA,
+	GPIO2C4_GMAC_RXD3,
+
+	GPIO2C3_SHIFT		= 6,
+	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
+	GPIO2C3_GPIO		= 0,
+	GPIO2C3_GMAC_TXD0,
+
+	GPIO2C2_SHIFT		= 4,
+	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
+	GPIO2C2_GPIO		= 0,
+	GPIO2C2_GMAC_TXD1,
+
+	GPIO2C1_SHIFT		= 2,
+	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
+	GPIO2C1_GPIO		= 0,
+	GPIO2C1_GMAC_RXD0,
+
+	GPIO2C0_SHIFT		= 0,
+	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
+	GPIO2C0_GPIO		= 0,
+	GPIO2C0_GMAC_RXD1,
+};
+
+/* GRF_GPIO2D_IOMUX */
+enum {
+	GPIO2D1_SHIFT		= 2,
+	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
+	GPIO2D1_GPIO		= 0,
+	GPIO2D1_GMAC_MDC,
+
+	GPIO2D0_SHIFT		= 0,
+	GPIO2D0_MASK		= 3,
+	GPIO2D0_GPIO		= 0,
+	GPIO2D0_GMAC_COL,
+};
+
+/* GRF_GPIO3C_IOMUX */
+enum {
+	GPIO3C6_SHIFT		= 12,
+	GPIO3C6_MASK		= 3 << GPIO3C6_SHIFT,
+	GPIO3C6_GPIO		= 0,
+	GPIO3C6_DRV_VBUS1,
+
+	GPIO3C5_SHIFT		= 10,
+	GPIO3C5_MASK		= 3 << GPIO3C5_SHIFT,
+	GPIO3C5_GPIO		= 0,
+	GPIO3C5_PWM10,
+
+	GPIO3C1_SHIFT		= 2,
+	GPIO3C1_MASK		= 3 << GPIO3C1_SHIFT,
+	GPIO3C1_GPIO		= 0,
+	GPIO3C1_DRV_VBUS,
+};
+
+/* GRF_GPIO3D_IOMUX */
+enum {
+	GPIO3D2_SHIFT	= 4,
+	GPIO3D2_MASK	= 3 << GPIO3D2_SHIFT,
+	GPIO3D2_GPIO	= 0,
+	GPIO3D2_PWM3,
+};
+
+/* GRF_IOFUNC_CON0 */
+enum {
+	CON_IOMUX_UART2SEL_SHIFT	= 10,
+	CON_IOMUX_UART2SEL_MASK	= 3 << CON_IOMUX_UART2SEL_SHIFT,
+	CON_IOMUX_UART2SEL_M0	= 0,
+	CON_IOMUX_UART2SEL_M1,
+	CON_IOMUX_UART2SEL_USBPHY,
+};
+
+/* GRF_MACPHY_CON0 */
+enum {
+	MACPHY_CFG_ENABLE_SHIFT = 0,
+	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,
+};
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 1e2ce65842..cbab46e388 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -1,5 +1,14 @@
 if ARCH_ROCKCHIP
 
+config ROCKCHIP_PX30
+	bool "Support Rockchip PX30"
+	select ARM64
+	help
+	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
+	  including NEON and GPU, Mali-400 graphics, several DDR3 options
+	  and video codec support. Peripherals include Gigabit Ethernet,
+	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
 config ROCKCHIP_RK3036
 	bool "Support Rockchip RK3036"
 	select CPU_V7
@@ -231,6 +240,7 @@ config TPL_ROCKCHIP_BACK_TO_BROM
 
 config ROCKCHIP_BOOT_MODE_REG
 	hex "Rockchip boot mode flag register address"
+	default 0xff010200 if ROCKCHIP_PX30
 	default 0x200081c8 if ROCKCHIP_RK3036
 	default 0x100a0038 if ROCKCHIP_RK3128
 	default 0x20004040 if ROCKCHIP_RK3188
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 51b4575e62..4452117a73 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -32,6 +32,7 @@ endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
+obj-$(CONFIG_ROCKCHIP_PX30) += px30/
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
 obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
diff --git a/arch/arm/mach-rockchip/px30/Makefile b/arch/arm/mach-rockchip/px30/Makefile
new file mode 100644
index 0000000000..73d159c32a
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+
+obj-y += clk_px30.o
+obj-y += syscon_px30.o
+obj-y += px30.o
diff --git a/arch/arm/mach-rockchip/px30/clk_px30.c b/arch/arm/mach-rockchip/px30/clk_px30.c
new file mode 100644
index 0000000000..9cadffb0fd
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/clk_px30.c
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_px30.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_px30_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct px30_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
new file mode 100644
index 0000000000..71cf3ce7f7
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/grf_px30.h>
+#include <asm/arch/hardware.h>
+#include <asm/armv8/mmu.h>
+
+static struct mm_region px30_mem_map[] = {
+	{
+		.virt = 0x0UL,
+		.phys = 0x0UL,
+		.size = 0xff000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.virt = 0xff000000UL,
+		.phys = 0xff000000UL,
+		.size = 0x01000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = px30_mem_map;
+
+#define SGRF_DDR_CON0 0x10150000
+
+int arch_cpu_init(void)
+{
+#ifdef CONFIG_SPL_BUILD
+	/* We do some SoC one time setting here. */
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+#endif
+	return 0;
+}
+#define GRF_BASE	0x11000000
+void board_debug_uart_init(void)
+{
+static struct px30_grf * const grf = (void *)GRF_BASE;
+	/* Enable early UART2 channel m0 on the px30 */
+	rk_clrsetreg(&grf->gpio1dl_iomux,
+		     GPIO1D3_MASK | GPIO1D2_MASK,
+		     GPIO1D3_UART2_RXM0 << GPIO1D3_SHIFT |
+		     GPIO1D2_UART2_TXM0 << GPIO1D2_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->iofunc_con0,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_M0 << CON_IOMUX_UART2SEL_SHIFT);
+}
diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c
new file mode 100644
index 0000000000..47a5b3ded3
--- /dev/null
+++ b/arch/arm/mach-rockchip/px30/syscon_px30.c
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id px30_syscon_ids[] = {
+	{ .compatible = "rockchip,px30-pmu", .data = ROCKCHIP_SYSCON_PMU },
+	{ .compatible = "rockchip,px30-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
+	{ .compatible = "rockchip,px30-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_px30) = {
+	.name = "px30_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = px30_syscon_ids,
+};
diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h
new file mode 100644
index 0000000000..e9f17dd7a9
--- /dev/null
+++ b/include/configs/px30_common.h
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_PX30_COMMON_H
+#define __CONFIG_PX30_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x00200000
+#define CONFIG_SYS_INIT_SP_ADDR		0x00300000
+#define CONFIG_SYS_LOAD_ADDR		0x00800800
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE		0x10000
+#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000
+#define CONFIG_SYS_BOOTM_LEN		(64 << 20)	/* 64M */
+
+#define COUNTER_FREQUENCY		24000000
+
+#define GICD_BASE			0xFF811000
+#define GICC_BASE			0xFF812000
+
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define CONFIG_NR_DRAM_BANKS		1
+#define SDRAM_MAX_SIZE			0xff000000
+#define SDRAM_BANK_SIZE			(2UL << 30)
+
+
+#ifndef CONFIG_SPL_BUILD
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x00500000\0" \
+	"pxefile_addr_r=0x00600000\0" \
+	"fdt_addr_r=0x01f00000\0" \
+	"kernel_addr_r=0x02080000\0" \
+	"ramdisk_addr_r=0x04000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	BOOTENV
+
+#endif
+
+#endif

commit 5eeb396bc2d65e95bffd9db7b21e552b53009bb6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:08:12 2018 +0800

    rockchip: px30: add sdram driver
    
    This driver only add support to ram frame work, do not have really
    dram init driver.
    
    Change-Id: I4c079bcbfea1fc1079df536cf505b8ca87848f44
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 1a1e5578ca..2cae3c6061 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
+obj-$(CONFIG_ROCKCHIP_PX30) = sdram_px30.o
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
new file mode 100644
index 0000000000..a23e220571
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_px30.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+	struct ram_info info;
+	struct px30_pmugrf *pmugrf;
+};
+
+static int px30_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->pmugrf->os_reg[2]);
+
+	return 0;
+}
+
+static int px30_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops px30_dmc_ops = {
+	.get_info = px30_dmc_get_info,
+};
+
+
+static const struct udevice_id px30_dmc_ids[] = {
+	{ .compatible = "rockchip,px30-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_px30) = {
+	.name = "rockchip_px30_dmc",
+	.id = UCLASS_RAM,
+	.of_match = px30_dmc_ids,
+	.ops = &px30_dmc_ops,
+	.probe = px30_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit c876650a87da70b4cfd38ea7728d669d700c176d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 5 10:45:28 2018 +0800

    rockchip: add chip info interface
    
    Change-Id: I916ef9d22370bf464569bf400e0cab61d6107d6a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/chip_info.h b/arch/arm/include/asm/arch-rockchip/chip_info.h
new file mode 100644
index 0000000000..b3e5a8918a
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/chip_info.h
@@ -0,0 +1,6 @@
+#ifndef _ROCKCHIP_CHIP_INFO_H_
+#define _ROCKCHIP_CHIP_INFO_H_
+
+int rockchip_get_chip_info(unsigned int chip_info[]);
+int rockchip_rockusb_get_chip_info(unsigned int chip_info[]);
+#endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index fa640b930f..51b4575e62 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -22,6 +22,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 # meaning "turn it off".
 obj-y += boot_mode.o
 obj-y += board.o
+obj-y += chip_info.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/chip_info.c b/arch/arm/mach-rockchip/chip_info.c
new file mode 100644
index 0000000000..1bfee8ef92
--- /dev/null
+++ b/arch/arm/mach-rockchip/chip_info.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/chip_info.h>
+
+/*
+ * rk3066 chip info:	{0x33303041, 0x32303131, 0x31313131, 0x56313031} - 300A20111111V101
+ * rk3168 chip info:	{0x33303042, 0x32303132, 0x31303031, 0x56313030} - 300B20121011V100
+ * rk3036 chip info:	{0x33303141, 0x32303134, 0x30343231, 0x56313031} - 301A20140421V101
+ * rk3188 chip info:	{0x33313042, 0x32303132, 0x31313330, 0x56313030} - 310B20121130V100
+ * rk3188_plus chip info:{0x33313042, 0x32303133, 0x30313331, 0x56313031} - 310B20130131V101
+ * rk312x chip info:	{0x33313043, 0x32303134, 0x30343239, 0x56313030} - 310C20140429V100
+ * rk312xb chip info:	{0x33313044, 0x32303134, 0x30373330, 0x56313030} - 310D20140730V100
+ * rk3126c chip info:	{0x33313044, 0x32303137, 0x30343137, 0x56323030} - 310D20170417V200
+ * rk3288 chip info:	{0x33323041, 0x32303133, 0x31313136, 0x56313030} - 320A20131116V100
+ * rk322x chip info:	{0x33323042, 0x32303135, 0x31313136, 0x56313030} - 320B20151116V100
+ * rk3368 chip info:	{0x33333041, 0x32303134, 0x30393238, 0x56313030} - 330A20140928V100
+ * rk3366 chip info:	{0x33333042, 0x32303135, 0x30363234, 0x56313030} - 330B20150624V100
+ * rk3399 chip info:	{0x33333043, 0x32303136, 0x30313138, 0x56313030} - 330B20160118V100
+ * rk322xh chip info:	{0x33323043, 0x32303136, 0x31313031, 0x56313030} - 320C20161101V100
+ * rk3326 chip info:	{0x33333044, 0x32303137, 0x31323134, 0x56313030} - 330D20171214V100
+ */
+int rockchip_get_chip_info(unsigned int chip_info[])
+{
+	if (chip_info == NULL)
+		return -EINVAL;
+
+#if defined(CONFIG_ROCKCHIP_RK3036)
+	chip_info[0] = 0x33303041;
+#elif defined(CONFIG_ROCKCHIP_RK3188)
+	chip_info[0] = 0x33313042;
+#elif defined(CONFIG_ROCKCHIP_RK3126)
+	chip_info[0] = 0x33313044;
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+	chip_info[0] = 0x33323042;
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+	chip_info[0] = 0x33323041;
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+	chip_info[0] = 0x33323043;
+	chip_info[3] = 0x56313030;
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+	chip_info[0] = 0x33333041;
+	chip_info[3] = 0x56313030;
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+	chip_info[0] = 0x33333043;
+	chip_info[3] = 0x56313030;
+#elif defined(CONFIG_ROCKCHIP_PX30)
+	chip_info[0] = 0x33333044;
+#endif
+
+	return 0;
+}
+
+
+int rockchip_rockusb_get_chip_info(unsigned int chip_info[])
+{
+	int err;
+
+	err = rockchip_get_chip_info(chip_info);
+	if (!err) {
+	/* Fixup chip info for RockUsb */
+#if defined(CONFIG_ROCKCHIP_RK3036)
+		chip_info[0] = 0x33303341;
+#elif defined(CONFIG_ROCKCHIP_RK3126) || defined(CONFIG_ROCKCHIP_RK3128)
+		chip_info[0] = 0x33313241;
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+		chip_info[0] = 0x33323241;
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+		chip_info[0] = 0x33323248;
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+		chip_info[0] = 0x33333043;
+#endif
+	}
+
+	return err;
+}

commit 27f8f3a3f706c15f7e40073280ebbd02792f7bd3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Feb 5 15:05:27 2018 +0800

    rockchip: dts: rk312x: fix emmc and sdmmc pinctrl definition error
    
    Change-Id: Ibdf85e08d7c74d7e9880a631c8ec6d872cb276a0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 0b42a268b0..e3223b2402 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -703,12 +703,8 @@
 			#interrupt-cells = <2>;
 		};
 
-		pcfg_pull_up: pcfg-pull-up {
-			bias-pull-up;
-		};
-
-		pcfg_pull_down: pcfg-pull-down {
-			bias-pull-down;
+		pcfg_pull_default: pcfg_pull_default {
+			bias-pull-pin-default;
 		};
 
 		pcfg_pull_none: pcfg-pull-none {
@@ -716,35 +712,46 @@
 		};
 
 		emmc {
-			/*
-			 * We run eMMC at max speed; bump up drive strength.
-			 * We also have external pulls, so disable the internal ones.
-			 */
-
 			emmc_clk: emmc-clk {
-				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PA7 2 &pcfg_pull_none>;
 			};
 
 			emmc_cmd: emmc-cmd {
-				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PC6 2 &pcfg_pull_default>;
+			};
+
+			emmc_cmd1: emmc-cmd1 {
+				rockchip,pins = <2 RK_PA4 2 &pcfg_pull_default>;
 			};
 
-			emmc_pwren: emmc-pwren {
-				rockchip,pins = <2 5 RK_FUNC_2 &pcfg_pull_none>;
+			emmc_pwr: emmc-pwr {
+				rockchip,pins = <2 RK_PA5 2 &pcfg_pull_default>;
+			};
+
+			emmc_bus1: emmc-bus1 {
+				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>;
+			};
+
+			emmc_bus4: emmc-bus4 {
+				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>,
+						<1 RK_PD1 2 &pcfg_pull_default>,
+						<1 RK_PD2 2 &pcfg_pull_default>,
+						<1 RK_PD3 2 &pcfg_pull_default>;
 			};
 
 			emmc_bus8: emmc-bus8 {
-				rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
-						<1 25 RK_FUNC_2 &pcfg_pull_none>,
-						<1 26 RK_FUNC_2 &pcfg_pull_none>,
-						<1 27 RK_FUNC_2 &pcfg_pull_none>,
-						<1 28 RK_FUNC_2 &pcfg_pull_none>,
-						<1 29 RK_FUNC_2 &pcfg_pull_none>,
-						<1 30 RK_FUNC_2 &pcfg_pull_none>,
-						<1 31 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>,
+						<1 RK_PD1 2 &pcfg_pull_default>,
+						<1 RK_PD2 2 &pcfg_pull_default>,
+						<1 RK_PD3 2 &pcfg_pull_default>,
+						<1 RK_PD4 2 &pcfg_pull_default>,
+						<1 RK_PD5 2 &pcfg_pull_default>,
+						<1 RK_PD6 2 &pcfg_pull_default>,
+						<1 RK_PD7 2 &pcfg_pull_default>;
 			};
 		};
 
+
 		nandc{
 			nandc_ale:nandc-ale {
 				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
@@ -811,22 +818,22 @@
 			};
 
 			sdmmc_cmd: sdmmc-cmd {
-				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_wp: sdmmc-wp {
-				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_pwren: sdmmc-pwren {
-				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
 			};
 
 			sdmmc_bus4: sdmmc-bus4 {
-				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up>,
-						<1 RK_PC3 1 &pcfg_pull_up>,
-						<1 RK_PC4 1 &pcfg_pull_up>,
-						<1 RK_PC5 1 &pcfg_pull_up>;
+				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_default>,
+						<1 RK_PC3 1 &pcfg_pull_default>,
+						<1 RK_PC4 1 &pcfg_pull_default>,
+						<1 RK_PC5 1 &pcfg_pull_default>;
 			};
 		};
 

commit 3174f32993be4e4af65421706e011ef9b9171b89
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 27 18:36:16 2018 +0800

    ARM: dts: rk322x: Correct the uart2 pin configuration
    
    Change-Id: I742d6ff8ac70c3d7371d58ee0fe7c59643b97896
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 246013d604..2757f93860 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -207,7 +207,7 @@
 		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
 		clock-names = "baudclk", "apb_pclk";
 		pinctrl-names = "default";
-		pinctrl-0 = <&uart2_xfer>;
+		pinctrl-0 = <&uart21_xfer>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		status = "disabled";
@@ -766,7 +766,7 @@
 
 		uart2 {
 			uart2_xfer: uart2-xfer {
-				rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_none>,
+				rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up>,
 						<1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
 			};
 
@@ -778,6 +778,13 @@
 				rockchip,pins = <0 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
+
+		uart2-1 {
+			uart21_xfer: uart21-xfer {
+				rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>,
+						<1 9 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
 	};
 
 	dmc: dmc@11200000 {

commit 0d4b0063b62714bce5a24f40c1096f907d9b2205
Author: David Wu <david.wu@rock-chips.com>
Date:   Sat Jan 27 17:19:39 2018 +0800

    pinctrl: rockchip: Clean the unused rockchip pinctrl drivers
    
    If we used the pinctrl-rockchip driver, these code is not needed,
    so remove them.
    
    Change-Id: Ie419b40664215b4b23a97138398102745f9875e6
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
deleted file mode 100644
index f846229ab2..0000000000
--- a/drivers/pinctrl/rockchip/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
-#
-# Copyright (c) 2017 Rockchip Electronics Co., Ltd
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3066) += pinctrl_rk3066.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3128) += pinctrl_rk3128.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK322X) += pinctrl_rk322x.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3288) += pinctrl_rk3288.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3328) += pinctrl_rk3328.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3368) += pinctrl_rk3368.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3399) += pinctrl_rk3399.o
-obj-$(CONFIG_PINCTRL_ROCKCHIP_RV1108) += pinctrl_rv1108.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3036.c b/drivers/pinctrl/rockchip/pinctrl_rk3036.c
deleted file mode 100644
index 9215d6c96e..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3036.c
+++ /dev/null
@@ -1,265 +0,0 @@
-/*
- * Pinctrl driver for Rockchip 3036 SoCs
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3036.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3036_pinctrl_priv {
-	struct rk3036_grf *grf;
-};
-
-static void pinctrl_rk3036_pwm_config(struct rk3036_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D2_MASK,
-			     GPIO0D2_PWM0 << GPIO0D2_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A0_MASK,
-			     GPIO0A0_PWM1 << GPIO0A0_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A1_MASK,
-			     GPIO0A1_PWM2 << GPIO0A1_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0D3_MASK,
-			     GPIO0D3_PWM3 << GPIO0D3_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3036_i2c_config(struct rk3036_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A1_MASK | GPIO0A0_MASK,
-			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
-			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
-
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A3_MASK | GPIO0A2_MASK,
-			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
-			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C5_MASK | GPIO2C4_MASK,
-			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
-			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
-
-		break;
-	}
-}
-
-static void pinctrl_rk3036_spi_config(struct rk3036_grf *grf, int cs)
-{
-	switch (cs) {
-	case 0:
-		rk_clrsetreg(&grf->gpio1d_iomux, GPIO1D6_MASK,
-			     GPIO1D6_SPI_CSN0 << GPIO1D6_SHIFT);
-		break;
-	case 1:
-		rk_clrsetreg(&grf->gpio1d_iomux, GPIO1D7_MASK,
-			     GPIO1D7_SPI_CSN1 << GPIO1D7_SHIFT);
-		break;
-	}
-	rk_clrsetreg(&grf->gpio1d_iomux,
-		     GPIO1D5_MASK | GPIO1D4_MASK,
-		     GPIO1D5_SPI_TXD << GPIO1D5_SHIFT |
-		     GPIO1D4_SPI_RXD << GPIO1D4_SHIFT);
-
-	rk_clrsetreg(&grf->gpio2a_iomux, GPIO2A0_MASK,
-		     GPIO2A0_SPI_CLK << GPIO2A0_SHIFT);
-}
-
-static void pinctrl_rk3036_uart_config(struct rk3036_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio0c_iomux,
-			     GPIO0C3_MASK | GPIO0C2_MASK |
-			     GPIO0C1_MASK |  GPIO0C0_MASK,
-			     GPIO0C3_UART0_CTSN << GPIO0C3_SHIFT |
-			     GPIO0C2_UART0_RTSN << GPIO0C2_SHIFT |
-			     GPIO0C1_UART0_SIN << GPIO0C1_SHIFT |
-			     GPIO0C0_UART0_SOUT << GPIO0C0_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C7_MASK | GPIO2C6_MASK,
-			     GPIO2C7_UART1_SOUT << GPIO2C7_SHIFT |
-			     GPIO2C6_UART1_SIN << GPIO2C6_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C3_MASK | GPIO1C2_MASK,
-			     GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
-			     GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3036_sdmmc_config(struct rk3036_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
-			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
-			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
-			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
-			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
-			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
-			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
-			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
-			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A4_MASK | GPIO2A1_MASK,
-			     GPIO2A4_EMMC_CMD << GPIO2A4_SHIFT |
-			     GPIO2A1_EMMC_CLKOUT << GPIO2A1_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio1c_iomux, 0xffff,
-			     GPIO1C5_MMC0_D3 << GPIO1C5_SHIFT |
-			     GPIO1C4_MMC0_D2 << GPIO1C4_SHIFT |
-			     GPIO1C3_MMC0_D1 << GPIO1C3_SHIFT |
-			     GPIO1C2_MMC0_D0 << GPIO1C2_SHIFT |
-			     GPIO1C1_MMC0_DETN << GPIO1C1_SHIFT |
-			     GPIO1C0_MMC0_CLKOUT << GPIO1C0_SHIFT);
-		break;
-	}
-}
-
-static int rk3036_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3036_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk3036_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-		pinctrl_rk3036_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-		pinctrl_rk3036_spi_config(priv->grf, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-		pinctrl_rk3036_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3036_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3036_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 14:
-		return PERIPH_ID_SDCARD;
-	case 16:
-		return PERIPH_ID_EMMC;
-	case 20:
-		return PERIPH_ID_UART0;
-	case 21:
-		return PERIPH_ID_UART1;
-	case 22:
-		return PERIPH_ID_UART2;
-	case 23:
-		return PERIPH_ID_SPI0;
-	case 24:
-		return PERIPH_ID_I2C0;
-	case 25:
-		return PERIPH_ID_I2C1;
-	case 26:
-		return PERIPH_ID_I2C2;
-	case 30:
-		return PERIPH_ID_PWM0;
-	}
-	return -ENOENT;
-}
-
-static int rk3036_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3036_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3036_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3036_pinctrl_ops = {
-	.set_state_simple	= rk3036_pinctrl_set_state_simple,
-	.request	= rk3036_pinctrl_request,
-	.get_periph_id	= rk3036_pinctrl_get_periph_id,
-};
-
-static int rk3036_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3036_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk3036_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3036-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3036) = {
-	.name		= "pinctrl_rk3036",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3036_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3036_pinctrl_priv),
-	.ops		= &rk3036_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3036_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3066.c b/drivers/pinctrl/rockchip/pinctrl_rk3066.c
deleted file mode 100644
index 79e0a54d42..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3066.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/*
- * Pinctrl driver for Rockchip 3066 SoCs
- * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <dm/device.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3066.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3066_pinctrl_priv {
-	struct rk3066_grf *grf;
-};
-
-static void pinctrl_rk3066_pwm_config(struct rk3066_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A3_MASK,
-			     GPIO0A3_PWM0 << GPIO0A3_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A4_MASK,
-			     GPIO0A4_PWM1 << GPIO0A4_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_MASK,
-			     GPIO0D6_PWM2 << GPIO0D6_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D7_MASK,
-			     GPIO0D7_PWM3 << GPIO0D7_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_i2c_config(struct rk3066_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D4_MASK | GPIO2D5_MASK,
-			     GPIO2D4_I2C0_SDA << GPIO2D4_SHIFT |
-			     GPIO2D5_I2C0_SCL << GPIO2D5_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C0_SEL_SHIFT,
-					     1 << RKI2C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D6_MASK | GPIO2D7_MASK,
-			     GPIO2D6_I2C1_SDA << GPIO2D6_SHIFT |
-			     GPIO2D7_I2C1_SCL << GPIO2D7_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C1_SEL_SHIFT,
-					     1 << RKI2C1_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A1_MASK | GPIO3A0_MASK,
-			     GPIO3A1_I2C2_SCL << GPIO3A1_SHIFT |
-			     GPIO3A0_I2C2_SDA << GPIO3A0_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C2_SEL_SHIFT,
-					     1 << RKI2C2_SEL_SHIFT);
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A3_MASK | GPIO3A2_MASK,
-			     GPIO3A3_I2C3_SCL << GPIO3A3_SHIFT |
-			     GPIO3A2_I2C3_SDA << GPIO3A2_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C3_SEL_SHIFT,
-					     1 << RKI2C3_SEL_SHIFT);
-	case PERIPH_ID_I2C4:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A5_MASK | GPIO3A4_MASK,
-			     GPIO3A5_I2C4_SCL << GPIO3A5_SHIFT |
-			     GPIO3A4_I2C4_SDA << GPIO3A4_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C4_SEL_SHIFT,
-					     1 << RKI2C4_SEL_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_spi_config(struct rk3066_grf *grf, int spi_id, int cs)
-{
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A7_MASK | GPIO1A6_MASK | GPIO1A5_MASK,
-			     GPIO1A7_SPI0_TXD << GPIO1A7_SHIFT |
-			     GPIO1A6_SPI0_RXD << GPIO1A6_SHIFT |
-			     GPIO1A5_SPI0_CLK << GPIO1A5_SHIFT);
-		if(cs == 0)
-			rk_clrsetreg(&grf->gpio1a_iomux,
-				     GPIO1A4_MASK,
-				     GPIO1A4_SPI0_CSN0 << GPIO1A4_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio4b_iomux,
-				     GPIO4B7_MASK,
-				     GPIO4B7_SPI0_CSN1 << GPIO4B7_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C5_MASK | GPIO2C6_MASK | GPIO2C3_MASK,
-			     GPIO2C5_SPI1_TXD << GPIO2C5_SHIFT |
-			     GPIO2C6_SPI1_RXD << GPIO2C6_SHIFT |
-			     GPIO2C3_SPI1_CLK << GPIO2C3_SHIFT);
-		if(cs == 0)
-			rk_clrsetreg(&grf->gpio2c_iomux,
-				     GPIO2C4_MASK,
-				     GPIO2C4_SPI1_CSN0 << GPIO2C4_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio2c_iomux,
-				     GPIO2C7_MASK,
-				     GPIO2C7_SPI1_CSN1 << GPIO2C7_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_uart_config(struct rk3066_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A2_MASK | GPIO1A3_MASK |
-			     GPIO1A0_MASK | GPIO1A1_MASK,
-			     GPIO1A2_UART0_CTS_N << GPIO1A2_SHIFT |
-			     GPIO1A3_UART0_RTS_N << GPIO1A3_SHIFT |
-			     GPIO1A0_UART0_SIN << GPIO1A0_SHIFT |
-			     GPIO1A1_UART0_SOUT << GPIO1A1_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A7_MASK | GPIO1A6_MASK |
-			     GPIO1A5_MASK | GPIO1A4_MASK,
-			     GPIO1A7_UART1_RTS_N << GPIO1A7_SHIFT |
-			     GPIO1A6_UART1_CTS_N << GPIO1A6_SHIFT |
-			     GPIO1A5_UART1_SOUT << GPIO1A5_SHIFT |
-			     GPIO1A4_UART1_SIN << GPIO1A4_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B1_MASK | GPIO1B0_MASK,
-			     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-			     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-		break;
-	case PERIPH_ID_UART3:
-		rk_clrsetreg(&grf->gpio3d_iomux,
-			     GPIO3D6_MASK | GPIO3D5_MASK |
-			     GPIO3D4_MASK | GPIO3D3_MASK,
-			     GPIO3D6_UART3_RTS_N << GPIO3D6_SHIFT |
-			     GPIO3D5_UART3_CTS_N << GPIO3D5_SHIFT |
-			     GPIO3D4_UART3_SOUT << GPIO3D4_SHIFT |
-			     GPIO3D3_UART3_SIN << GPIO3D3_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_sdmmc_config(struct rk3066_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->soc_con0,
-			     EMMC_FLASH_SEL_MASK,
-			     1 << EMMC_FLASH_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio3d_iomux,
-			     GPIO3D7_MASK,
-			     GPIO3D7_EMMC_CLKOUT << GPIO3D7_SHIFT);
-		rk_clrsetreg(&grf->gpio4b_iomux,
-			     GPIO4B2_MASK | GPIO4B1_MASK,
-			     GPIO4B2_EMMC_RSTN_OUT << GPIO4B2_SHIFT |
-			     GPIO4B1_EMMC_CMD << GPIO4B1_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio3b_iomux, 0xffff,
-			     GPIO3B7_SDMMC0_WRITE_PRT << GPIO3B7_SHIFT |
-			     GPIO3B6_SDMMC0_DETECT_N << GPIO3B6_SHIFT |
-			     GPIO3B5_SDMMC0_DATA3 << GPIO3B5_SHIFT |
-			     GPIO3B4_SDMMC0_DATA2 << GPIO3B4_SHIFT |
-			     GPIO3B3_SDMMC0_DATA1 << GPIO3B3_SHIFT |
-			     GPIO3B2_SDMMC0_DATA0 << GPIO3B2_SHIFT |
-			     GPIO3B1_SDMMC0_CMD << GPIO3B1_SHIFT |
-			     GPIO3B0_SDMMC0_CLKOUT << GPIO3B0_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk3066_nand_config(struct rk3066_grf *grf)
-{
-	rk_clrsetreg(&grf->soc_con0,
-		     EMMC_FLASH_SEL_MASK,
-		     0 << EMMC_FLASH_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio3d_iomux,
-		     GPIO3D7_MASK,
-		     GPIO3D7_FLASH_DQS << GPIO3D7_SHIFT);
-}
-
-static int rk3066_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk3066_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-		pinctrl_rk3066_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-		pinctrl_rk3066_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-		pinctrl_rk3066_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_EMMC:
-	case PERIPH_ID_SDCARD:
-		pinctrl_rk3066_sdmmc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_NAND:
-		pinctrl_rk3066_nand_config(priv->grf);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3066_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 23:
-		return PERIPH_ID_SDCARD;
-	case 25:
-		return PERIPH_ID_EMMC;
-	case 27:
-		return PERIPH_ID_NAND;
-	case 34:
-		return PERIPH_ID_UART0;
-	case 35:
-		return PERIPH_ID_UART1;
-	case 36:
-		return PERIPH_ID_UART2;
-	case 37:
-		return PERIPH_ID_UART3;
-	case 38:
-		return PERIPH_ID_SPI0;
-	case 39:
-		return PERIPH_ID_SPI1;
-	case 40:
-		return PERIPH_ID_I2C0;
-	case 41:
-		return PERIPH_ID_I2C1;
-	case 42:
-		return PERIPH_ID_I2C2;
-	case 43:
-		return PERIPH_ID_I2C3;
-	case 30:
-		return PERIPH_ID_PWM0;
-	}
-#endif
-	return -ENOENT;
-}
-
-static int rk3066_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3066_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3066_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3066_pinctrl_ops = {
-	.set_state_simple	= rk3066_pinctrl_set_state_simple,
-	.request	= rk3066_pinctrl_request,
-	.get_periph_id	= rk3066_pinctrl_get_periph_id,
-};
-
-static int rk3066_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(priv->grf))
-		debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk3066_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3066a-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_rk3066a_pinctrl) = {
-	.name		= "rockchip_rk3066a_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3066_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3066_pinctrl_priv),
-	.ops		= &rk3066_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind           = dm_scan_fdt_dev,
-#endif
-	.probe		= rk3066_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3128.c b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
deleted file mode 100644
index 8b5178971a..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3128.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * Pinctrl driver for Rockchip 3128 SoCs
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3128.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3128_pinctrl_priv {
-	struct rk3128_grf *grf;
-};
-
-static void pinctrl_rk3128_i2c_config(struct rk3128_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A1_MASK | GPIO0A0_MASK,
-			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
-			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
-
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A3_MASK | GPIO0A2_MASK,
-			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
-			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2c_iomux2,
-			     GPIO2C5_MASK | GPIO2C4_MASK,
-			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
-			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A7_MASK | GPIO0A6_MASK,
-			     GPIO0A7_I2C3_SDA << GPIO0A7_SHIFT |
-			     GPIO0A6_I2C3_SCL << GPIO0A6_SHIFT);
-
-		break;
-	}
-}
-
-static void pinctrl_rk3128_sdmmc_config(struct rk3128_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
-			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
-			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
-			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
-			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
-			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
-			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
-			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
-			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_MASK | GPIO2A7_MASK,
-			     GPIO2A5_EMMC_PWREN << GPIO2A5_SHIFT |
-			     GPIO2A7_EMMC_CLKOUT << GPIO2A7_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio1c_iomux, 0x0fff,
-			     GPIO1C5_MMC0_D3 << GPIO1C5_SHIFT |
-			     GPIO1C4_MMC0_D2 << GPIO1C4_SHIFT |
-			     GPIO1C3_MMC0_D1 << GPIO1C3_SHIFT |
-			     GPIO1C2_MMC0_D0 << GPIO1C2_SHIFT |
-			     GPIO1C1_MMC0_DETN << GPIO1C1_SHIFT |
-			     GPIO1C0_MMC0_CLKOUT << GPIO1C0_SHIFT);
-		break;
-	}
-}
-
-static int rk3128_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-		pinctrl_rk3128_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3128_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3128_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 14:
-		return PERIPH_ID_SDCARD;
-	case 16:
-		return PERIPH_ID_EMMC;
-	case 20:
-		return PERIPH_ID_UART0;
-	case 21:
-		return PERIPH_ID_UART1;
-	case 22:
-		return PERIPH_ID_UART2;
-	case 23:
-		return PERIPH_ID_SPI0;
-	case 24:
-		return PERIPH_ID_I2C0;
-	case 25:
-		return PERIPH_ID_I2C1;
-	case 26:
-		return PERIPH_ID_I2C2;
-	case 27:
-		return PERIPH_ID_I2C3;
-	case 30:
-		return PERIPH_ID_PWM0;
-	}
-	return -ENOENT;
-}
-
-static int rk3128_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3128_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3128_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3128_pinctrl_ops = {
-	.set_state_simple	= rk3128_pinctrl_set_state_simple,
-	.request	= rk3128_pinctrl_request,
-	.get_periph_id	= rk3128_pinctrl_get_periph_id,
-};
-
-static int rk3128_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk3128_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3128-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3128) = {
-	.name		= "pinctrl_rk3128",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3128_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3128_pinctrl_priv),
-	.ops		= &rk3128_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3128_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3188.c b/drivers/pinctrl/rockchip/pinctrl_rk3188.c
deleted file mode 100644
index 65c1f665ea..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3188.c
+++ /dev/null
@@ -1,611 +0,0 @@
-/*
- * Pinctrl driver for Rockchip RK3188 SoCs
- * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3188.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3188_pinctrl_priv {
-	struct rk3188_grf *grf;
-	struct rk3188_pmu *pmu;
-	int num_banks;
-};
-
-/**
- * Encode variants of iomux registers into a type variable
- */
-#define IOMUX_GPIO_ONLY		BIT(0)
-
-/**
- * @type: iomux variant using IOMUX_* constants
- * @offset: if initialized to -1 it will be autocalculated, by specifying
- *	    an initial offset value the relevant source offset can be reset
- *	    to a new value for autocalculating the following iomux registers.
- */
-struct rockchip_iomux {
-	u8 type;
-	s16 offset;
-};
-
-/**
- * @reg: register offset of the gpio bank
- * @nr_pins: number of pins in this bank
- * @bank_num: number of the bank, to account for holes
- * @name: name of the bank
- * @iomux: array describing the 4 iomux sources of the bank
- */
-struct rockchip_pin_bank {
-	u16 reg;
-	u8 nr_pins;
-	u8 bank_num;
-	char *name;
-	struct rockchip_iomux iomux[4];
-};
-
-#define PIN_BANK(id, pins, label)			\
-	{						\
-		.bank_num	= id,			\
-		.nr_pins	= pins,			\
-		.name		= label,		\
-		.iomux		= {			\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-		},					\
-	}
-
-#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)	\
-	{								\
-		.bank_num	= id,					\
-		.nr_pins	= pins,					\
-		.name		= label,				\
-		.iomux		= {					\
-			{ .type = iom0, .offset = -1 },			\
-			{ .type = iom1, .offset = -1 },			\
-			{ .type = iom2, .offset = -1 },			\
-			{ .type = iom3, .offset = -1 },			\
-		},							\
-	}
-
-#ifndef CONFIG_SPL_BUILD
-static struct rockchip_pin_bank rk3188_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
-	PIN_BANK(1, 32, "gpio1"),
-	PIN_BANK(2, 32, "gpio2"),
-	PIN_BANK(3, 32, "gpio3"),
-};
-#endif
-
-static void pinctrl_rk3188_pwm_config(struct rk3188_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D3_MASK << GPIO3D3_SHIFT,
-			     GPIO3D3_PWM_0 << GPIO3D3_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D4_MASK << GPIO3D4_SHIFT,
-			     GPIO3D4_PWM_1 << GPIO3D4_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D5_MASK << GPIO3D5_SHIFT,
-			     GPIO3D5_PWM_2 << GPIO3D5_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D6_MASK << GPIO3D6_SHIFT,
-			     GPIO3D6_PWM_3 << GPIO3D6_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3188_i2c_config(struct rk3188_grf *grf,
-				      struct rk3188_pmu *pmu, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D1_MASK << GPIO1D1_SHIFT |
-				GPIO1D0_MASK << GPIO1D0_SHIFT,
-				GPIO1D1_I2C0_SCL << GPIO1D1_SHIFT |
-				GPIO1D0_I2C0_SDA << GPIO1D0_SHIFT);
-		/* enable new i2c controller */
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C0_SEL_SHIFT,
-					     1 << RKI2C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D3_MASK << GPIO1D3_SHIFT |
-				GPIO1D2_MASK << GPIO1D2_SHIFT,
-				GPIO1D3_I2C1_SCL << GPIO1D2_SHIFT |
-				GPIO1D2_I2C1_SDA << GPIO1D2_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C1_SEL_SHIFT,
-					     1 << RKI2C1_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D5_MASK << GPIO1D5_SHIFT |
-				GPIO1D4_MASK << GPIO1D4_SHIFT,
-				GPIO1D5_I2C2_SCL << GPIO1D5_SHIFT |
-				GPIO1D4_I2C2_SDA << GPIO1D4_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C2_SEL_SHIFT,
-					     1 << RKI2C2_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio3b_iomux,
-				GPIO3B7_MASK << GPIO3B7_SHIFT |
-				GPIO3B6_MASK << GPIO3B6_SHIFT,
-				GPIO3B7_I2C3_SCL << GPIO3B7_SHIFT |
-				GPIO3B6_I2C3_SDA << GPIO3B6_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C3_SEL_SHIFT,
-					     1 << RKI2C3_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C4:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-				GPIO1D7_MASK << GPIO1D7_SHIFT |
-				GPIO1D6_MASK << GPIO1D6_SHIFT,
-				GPIO1D7_I2C4_SCL << GPIO1D7_SHIFT |
-				GPIO1D6_I2C4_SDA << GPIO1D6_SHIFT);
-		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C4_SEL_SHIFT,
-					     1 << RKI2C4_SEL_SHIFT);
-		break;
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-static int pinctrl_rk3188_spi_config(struct rk3188_grf *grf,
-				     enum periph_id spi_id, int cs)
-{
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio1a_iomux,
-				     GPIO1A7_MASK << GPIO1A7_SHIFT,
-				     GPIO1A7_SPI0_CSN0 << GPIO1A7_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B7_MASK << GPIO1B7_SHIFT,
-				     GPIO1B7_SPI0_CSN1 << GPIO1B7_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A4_MASK << GPIO1A4_SHIFT |
-			     GPIO1A5_MASK << GPIO1A5_SHIFT |
-			     GPIO1A6_MASK << GPIO1A6_SHIFT,
-			     GPIO1A4_SPI0_RXD << GPIO1A4_SHIFT |
-			     GPIO1A5_SPI0_TXD << GPIO1A5_SHIFT |
-			     GPIO1A6_SPI0_CLK << GPIO1A6_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio0d_iomux,
-				     GPIO0D7_MASK << GPIO0D7_SHIFT,
-				     GPIO0D7_SPI1_CSN0 << GPIO0D7_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B6_MASK << GPIO1B6_SHIFT,
-				     GPIO1B6_SPI1_CSN1 << GPIO1B6_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio0d_iomux,
-			     GPIO0D4_MASK << GPIO0D4_SHIFT |
-			     GPIO0D5_MASK << GPIO0D5_SHIFT |
-			     GPIO0D6_MASK << GPIO0D6_SHIFT,
-			     GPIO0D4_SPI0_RXD << GPIO0D4_SHIFT |
-			     GPIO0D5_SPI1_TXD << GPIO0D5_SHIFT |
-			     GPIO0D6_SPI1_CLK << GPIO0D6_SHIFT);
-		break;
-	default:
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3188_uart_config(struct rk3188_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A3_MASK << GPIO1A3_SHIFT |
-			     GPIO1A2_MASK << GPIO1A2_SHIFT |
-			     GPIO1A1_MASK << GPIO1A1_SHIFT |
-			     GPIO1A0_MASK << GPIO1A0_SHIFT,
-			     GPIO1A3_UART0_RTS_N << GPIO1A3_SHIFT |
-			     GPIO1A2_UART0_CTS_N << GPIO1A2_SHIFT |
-			     GPIO1A1_UART0_SOUT << GPIO1A1_SHIFT |
-			     GPIO1A0_UART0_SIN << GPIO1A0_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A7_MASK << GPIO1A7_SHIFT |
-			     GPIO1A6_MASK << GPIO1A6_SHIFT |
-			     GPIO1A5_MASK << GPIO1A5_SHIFT |
-			     GPIO1A4_MASK << GPIO1A4_SHIFT,
-			     GPIO1A7_UART1_RTS_N << GPIO1A7_SHIFT |
-			     GPIO1A6_UART1_CTS_N << GPIO1A6_SHIFT |
-			     GPIO1A5_UART1_SOUT << GPIO1A5_SHIFT |
-			     GPIO1A4_UART1_SIN << GPIO1A4_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B1_MASK << GPIO1B1_SHIFT |
-			     GPIO1B0_MASK << GPIO1B0_SHIFT,
-			     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-			     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-		break;
-	case PERIPH_ID_UART3:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B5_MASK << GPIO1B5_SHIFT |
-			     GPIO1B4_MASK << GPIO1B4_SHIFT |
-			     GPIO1B3_MASK << GPIO1B3_SHIFT |
-			     GPIO1B2_MASK << GPIO1B2_SHIFT,
-			     GPIO1B5_UART3_RTS_N << GPIO1B5_SHIFT |
-			     GPIO1B4_UART3_CTS_N << GPIO1B4_SHIFT |
-			     GPIO1B3_UART3_SOUT << GPIO1B3_SHIFT |
-			     GPIO1B2_UART3_SIN << GPIO1B2_SHIFT);
-		break;
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3188_sdmmc_config(struct rk3188_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->soc_con0, 1 << EMMC_FLASH_SEL_SHIFT,
-					     1 << EMMC_FLASH_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio0d_iomux,
-			     GPIO0D2_MASK << GPIO0D2_SHIFT |
-			     GPIO0D0_MASK << GPIO0D0_SHIFT,
-			     GPIO0D2_EMMC_CMD << GPIO0D2_SHIFT |
-			     GPIO0D0_EMMC_CLKOUT << GPIO0D0_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio3b_iomux,
-			     GPIO3B0_MASK << GPIO3B0_SHIFT,
-			     GPIO3B0_SDMMC_DETECT_N << GPIO3B0_SHIFT);
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A7_MASK << GPIO3A7_SHIFT |
-			     GPIO3A6_MASK << GPIO3A6_SHIFT |
-			     GPIO3A5_MASK << GPIO3A5_SHIFT |
-			     GPIO3A4_MASK << GPIO3A4_SHIFT |
-			     GPIO3A3_MASK << GPIO3A3_SHIFT |
-			     GPIO3A3_MASK << GPIO3A2_SHIFT,
-			     GPIO3A7_SDMMC0_DATA3 << GPIO3A7_SHIFT |
-			     GPIO3A6_SDMMC0_DATA2 << GPIO3A6_SHIFT |
-			     GPIO3A5_SDMMC0_DATA1 << GPIO3A5_SHIFT |
-			     GPIO3A4_SDMMC0_DATA0 << GPIO3A4_SHIFT |
-			     GPIO3A3_SDMMC0_CMD << GPIO3A3_SHIFT |
-			     GPIO3A2_SDMMC0_CLKOUT << GPIO3A2_SHIFT);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static int rk3188_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-	case PERIPH_ID_PWM4:
-		pinctrl_rk3188_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-		pinctrl_rk3188_i2c_config(priv->grf, priv->pmu, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-		pinctrl_rk3188_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3188_uart_config(priv->grf, func);
-		break;
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3188_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3188_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 44:
-		return PERIPH_ID_SPI0;
-	case 45:
-		return PERIPH_ID_SPI1;
-	case 46:
-		return PERIPH_ID_SPI2;
-	case 60:
-		return PERIPH_ID_I2C0;
-	case 62: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 61:
-		return PERIPH_ID_I2C2;
-	case 63:
-		return PERIPH_ID_I2C3;
-	case 64:
-		return PERIPH_ID_I2C4;
-	case 65:
-		return PERIPH_ID_I2C5;
-	}
-#endif
-
-	return -ENOENT;
-}
-
-static int rk3188_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3188_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3188_pinctrl_request(dev, func, 0);
-}
-
-#ifndef CONFIG_SPL_BUILD
-int rk3188_pinctrl_get_pin_info(struct rk3188_pinctrl_priv *priv,
-				int banknum, int ind, u32 **addrp, uint *shiftp,
-				uint *maskp)
-{
-	struct rockchip_pin_bank *bank = &rk3188_pin_banks[banknum];
-	uint muxnum;
-	u32 *addr;
-
-	for (muxnum = 0; muxnum < 4; muxnum++) {
-		struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-		if (ind >= 8) {
-			ind -= 8;
-			continue;
-		}
-
-		addr = &priv->grf->gpio0c_iomux - 2;
-		addr += mux->offset;
-		*shiftp = ind & 7;
-		*maskp = 3;
-		*shiftp *= 2;
-
-		debug("%s: addr=%p, mask=%x, shift=%x\n", __func__, addr,
-		      *maskp, *shiftp);
-		*addrp = addr;
-		return 0;
-	}
-
-	return -EINVAL;
-}
-
-static int rk3188_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
-				       int index)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift;
-	uint mask;
-	u32 *addr;
-	int ret;
-
-	ret = rk3188_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-	return (readl(addr) & mask) >> shift;
-}
-
-static int rk3188_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
-				   int muxval, int flags)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift, ind = index;
-	uint mask;
-	u32 *addr;
-	int ret;
-
-	debug("%s: %x %x %x %x\n", __func__, banknum, index, muxval, flags);
-	ret = rk3188_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-	rk_clrsetreg(addr, mask << shift, muxval << shift);
-
-	/* Handle pullup/pulldown */
-	if (flags) {
-		uint val = 0;
-
-		if (flags & (1 << PIN_CONFIG_BIAS_PULL_UP))
-			val = 1;
-		else if (flags & (1 << PIN_CONFIG_BIAS_PULL_DOWN))
-			val = 2;
-
-		ind = index >> 3;
-
-		if (banknum == 0 && index < 12) {
-			addr = &priv->pmu->gpio0_p[ind];
-			shift = (index & 7) * 2;
-		} else if (banknum == 0 && index >= 12) {
-			addr = &priv->grf->gpio0_p[ind - 1];
-			/*
-			 * The bits in the grf-registers have an inverse
-			 * ordering with the lowest pin being in bits 15:14
-			 * and the highest pin in bits 1:0 .
-			 */
-			shift = (7 - (index & 7)) * 2;
-		} else {
-			addr = &priv->grf->gpio1_p[banknum - 1][ind];
-			shift = (7 - (index & 7)) * 2;
-		}
-		debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val,
-		      shift);
-		rk_clrsetreg(addr, 3 << shift, val << shift);
-	}
-
-	return 0;
-}
-
-static int rk3188_pinctrl_set_state(struct udevice *dev, struct udevice *config)
-{
-	const void *blob = gd->fdt_blob;
-	int pcfg_node, ret, flags, count, i;
-	u32 cell[60], *ptr;
-
-	debug("%s: %s %s\n", __func__, dev->name, config->name);
-	ret = fdtdec_get_int_array_count(blob, dev_of_offset(config),
-					 "rockchip,pins", cell,
-					 ARRAY_SIZE(cell));
-	if (ret < 0) {
-		debug("%s: bad array %d\n", __func__, ret);
-		return -EINVAL;
-	}
-	count = ret;
-	for (i = 0, ptr = cell; i < count; i += 4, ptr += 4) {
-		pcfg_node = fdt_node_offset_by_phandle(blob, ptr[3]);
-		if (pcfg_node < 0)
-			return -EINVAL;
-		flags = pinctrl_decode_pin_config(blob, pcfg_node);
-		if (flags < 0)
-			return flags;
-
-		ret = rk3188_pinctrl_set_pins(dev, ptr[0], ptr[1], ptr[2],
-					      flags);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-#endif
-
-static struct pinctrl_ops rk3188_pinctrl_ops = {
-#ifndef CONFIG_SPL_BUILD
-	.set_state	= rk3188_pinctrl_set_state,
-	.get_gpio_mux	= rk3188_pinctrl_get_gpio_mux,
-#endif
-	.set_state_simple	= rk3188_pinctrl_set_state_simple,
-	.request	= rk3188_pinctrl_request,
-	.get_periph_id	= rk3188_pinctrl_get_periph_id,
-};
-
-#ifndef CONFIG_SPL_BUILD
-static int rk3188_pinctrl_parse_tables(struct rk3188_pinctrl_priv *priv,
-				       struct rockchip_pin_bank *banks,
-				       int count)
-{
-	struct rockchip_pin_bank *bank;
-	uint reg, muxnum, banknum;
-
-	reg = 0;
-	for (banknum = 0; banknum < count; banknum++) {
-		bank = &banks[banknum];
-		bank->reg = reg;
-		debug("%s: bank %d, reg %x\n", __func__, banknum, reg * 4);
-		for (muxnum = 0; muxnum < 4; muxnum++) {
-			struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-			mux->offset = reg;
-			reg += 1;
-		}
-	}
-
-	return 0;
-}
-#endif
-
-static int rk3188_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3188_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
-	debug("%s: grf=%p, pmu=%p\n", __func__, priv->grf, priv->pmu);
-#ifndef CONFIG_SPL_BUILD
-	ret = rk3188_pinctrl_parse_tables(priv, rk3188_pin_banks,
-					  ARRAY_SIZE(rk3188_pin_banks));
-#endif
-
-	return ret;
-}
-
-static const struct udevice_id rk3188_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3188-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3188) = {
-	.name		= "rockchip_rk3188_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3188_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3188_pinctrl_priv),
-	.ops		= &rk3188_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind		= dm_scan_fdt_dev,
-#endif
-	.probe		= rk3188_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk322x.c b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
deleted file mode 100644
index d300650649..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk322x.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk322x_pinctrl_priv {
-	struct rk322x_grf *grf;
-};
-
-static void pinctrl_rk322x_pwm_config(struct rk322x_grf *grf, int pwm_id)
-{
-	u32 mux_con = readl(&grf->con_iomux);
-
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		if (mux_con & CON_IOMUX_PWM0SEL_MASK)
-			rk_clrsetreg(&grf->gpio3c_iomux, GPIO3C5_MASK,
-				     GPIO3C5_PWM10 << GPIO3C5_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D2_MASK,
-				     GPIO0D2_PWM0 << GPIO0D2_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		if (mux_con & CON_IOMUX_PWM1SEL_MASK)
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_MASK,
-				     GPIO0D6_PWM11 << GPIO0D6_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D3_MASK,
-				     GPIO0D3_PWM1 << GPIO0D3_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		if (mux_con & CON_IOMUX_PWM2SEL_MASK)
-			rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B4_MASK,
-				     GPIO1B4_PWM12 << GPIO1B4_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D4_MASK,
-				     GPIO0D4_PWM2 << GPIO0D4_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		if (mux_con & CON_IOMUX_PWM3SEL_MASK)
-			rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B3_MASK,
-				     GPIO1B3_PWM13 << GPIO1B3_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio3d_iomux, GPIO3D2_MASK,
-				     GPIO3D2_PWM3 << GPIO3D2_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk322x_i2c_config(struct rk322x_grf *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A1_MASK | GPIO0A0_MASK,
-			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
-			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
-
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A3_MASK | GPIO0A2_MASK,
-			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
-			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C5_MASK | GPIO2C4_MASK,
-			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
-			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A7_MASK | GPIO0A6_MASK,
-			     GPIO0A7_I2C3_SDA << GPIO0A7_SHIFT |
-			     GPIO0A6_I2C3_SCL << GPIO0A6_SHIFT);
-
-		break;
-	}
-}
-
-static void pinctrl_rk322x_spi_config(struct rk322x_grf *grf, int cs)
-{
-	switch (cs) {
-	case 0:
-		rk_clrsetreg(&grf->gpio0b_iomux, GPIO0B6_MASK,
-			     GPIO0B6_SPI_CSN0 << GPIO0B6_SHIFT);
-		break;
-	case 1:
-		rk_clrsetreg(&grf->gpio1b_iomux, GPIO1B4_MASK,
-			     GPIO1B4_SPI_CSN1 << GPIO1B4_SHIFT);
-		break;
-	}
-	rk_clrsetreg(&grf->gpio0b_iomux,
-		     GPIO0B1_MASK | GPIO0B3_MASK | GPIO0B5_MASK,
-		     GPIO0B5_SPI_RXD << GPIO0B5_SHIFT |
-		     GPIO0B3_SPI_TXD << GPIO0B3_SHIFT |
-		     GPIO0B1_SPI_CLK << GPIO0B1_SHIFT);
-}
-
-static void pinctrl_rk322x_uart_config(struct rk322x_grf *grf, int uart_id)
-{
-	u32 mux_con = readl(&grf->con_iomux);
-
-	switch (uart_id) {
-	case PERIPH_ID_UART1:
-		if (!(mux_con & CON_IOMUX_UART1SEL_MASK))
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B1_MASK | GPIO1B2_MASK,
-				     GPIO1B1_UART1_SOUT << GPIO1B1_SHIFT |
-				     GPIO1B2_UART1_SIN << GPIO1B2_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		if (mux_con & CON_IOMUX_UART2SEL_MASK)
-			rk_clrsetreg(&grf->gpio1b_iomux,
-				     GPIO1B1_MASK | GPIO1B2_MASK,
-				     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT |
-				     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio1c_iomux,
-				     GPIO1C3_MASK | GPIO1C2_MASK,
-				     GPIO1C3_UART2_SIN << GPIO1C3_SHIFT |
-				     GPIO1C2_UART2_SOUT << GPIO1C2_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rk322x_sdmmc_config(struct rk322x_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
-			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
-			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
-			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
-			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
-			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
-			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
-			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
-			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_MASK | GPIO2A7_MASK,
-			     GPIO2A5_EMMC_PWREN << GPIO2A5_SHIFT |
-			     GPIO2A7_EMMC_CLKOUT << GPIO2A7_SHIFT);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C6_MASK | GPIO1C7_MASK,
-			     GPIO1C6_EMMC_CMD << GPIO1C6_SHIFT |
-			     GPIO1C7_EMMC_RSTNOUT << GPIO1C6_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B6_MASK | GPIO1B7_MASK,
-			     GPIO1B6_SDMMC_PWREN << GPIO1B6_SHIFT |
-			     GPIO1B7_SDMMC_CMD << GPIO1B7_SHIFT);
-		rk_clrsetreg(&grf->gpio1c_iomux, 0xfff,
-			     GPIO1C5_SDMMC_D3 << GPIO1C5_SHIFT |
-			     GPIO1C4_SDMMC_D2 << GPIO1C4_SHIFT |
-			     GPIO1C3_SDMMC_D1 << GPIO1C3_SHIFT |
-			     GPIO1C2_SDMMC_D0 << GPIO1C2_SHIFT |
-			     GPIO1C1_SDMMC_DETN << GPIO1C1_SHIFT |
-			     GPIO1C0_SDMMC_CLKOUT << GPIO1C0_SHIFT);
-		break;
-	}
-}
-
-static int rk322x_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk322x_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk322x_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-		pinctrl_rk322x_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-		pinctrl_rk322x_spi_config(priv->grf, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-		pinctrl_rk322x_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk322x_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk322x_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 12:
-		return PERIPH_ID_SDCARD;
-	case 14:
-		return PERIPH_ID_EMMC;
-	case 36:
-		return PERIPH_ID_I2C0;
-	case 37:
-		return PERIPH_ID_I2C1;
-	case 38:
-		return PERIPH_ID_I2C2;
-	case 49:
-		return PERIPH_ID_SPI0;
-	case 50:
-		return PERIPH_ID_PWM0;
-	case 55:
-		return PERIPH_ID_UART0;
-	case 56:
-		return PERIPH_ID_UART1;
-	case 57:
-		return PERIPH_ID_UART2;
-	}
-	return -ENOENT;
-}
-
-static int rk322x_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk322x_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk322x_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk322x_pinctrl_ops = {
-	.set_state_simple	= rk322x_pinctrl_set_state_simple,
-	.request	= rk322x_pinctrl_request,
-	.get_periph_id	= rk322x_pinctrl_get_periph_id,
-};
-
-static int rk322x_pinctrl_probe(struct udevice *dev)
-{
-	struct rk322x_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-	return 0;
-}
-
-static const struct udevice_id rk322x_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3228-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3228) = {
-	.name		= "pinctrl_rk3228",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk322x_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk322x_pinctrl_priv),
-	.ops		= &rk322x_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk322x_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
deleted file mode 100644
index 721aeab966..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ /dev/null
@@ -1,871 +0,0 @@
-/*
- * Pinctrl driver for Rockchip SoCs
- * Copyright (c) 2015 Google, Inc
- * Written by Simon Glass <sjg@chromium.org>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3288.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3288_pinctrl_priv {
-	struct rk3288_grf *grf;
-	struct rk3288_pmu *pmu;
-	int num_banks;
-};
-
-/**
- * Encode variants of iomux registers into a type variable
- */
-#define IOMUX_GPIO_ONLY		BIT(0)
-#define IOMUX_WIDTH_4BIT	BIT(1)
-#define IOMUX_SOURCE_PMU	BIT(2)
-#define IOMUX_UNROUTED		BIT(3)
-
-/**
- * @type: iomux variant using IOMUX_* constants
- * @offset: if initialized to -1 it will be autocalculated, by specifying
- *	    an initial offset value the relevant source offset can be reset
- *	    to a new value for autocalculating the following iomux registers.
- */
-struct rockchip_iomux {
-	u8 type;
-	s16 offset;
-};
-
-/**
- * @reg: register offset of the gpio bank
- * @nr_pins: number of pins in this bank
- * @bank_num: number of the bank, to account for holes
- * @name: name of the bank
- * @iomux: array describing the 4 iomux sources of the bank
- */
-struct rockchip_pin_bank {
-	u16 reg;
-	u8 nr_pins;
-	u8 bank_num;
-	char *name;
-	struct rockchip_iomux iomux[4];
-};
-
-#define PIN_BANK(id, pins, label)			\
-	{						\
-		.bank_num	= id,			\
-		.nr_pins	= pins,			\
-		.name		= label,		\
-		.iomux		= {			\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-			{ .offset = -1 },		\
-		},					\
-	}
-
-#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)	\
-	{								\
-		.bank_num	= id,					\
-		.nr_pins	= pins,					\
-		.name		= label,				\
-		.iomux		= {					\
-			{ .type = iom0, .offset = -1 },			\
-			{ .type = iom1, .offset = -1 },			\
-			{ .type = iom2, .offset = -1 },			\
-			{ .type = iom3, .offset = -1 },			\
-		},							\
-	}
-
-#ifndef CONFIG_SPL_BUILD
-static struct rockchip_pin_bank rk3288_pin_banks[] = {
-	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_SOURCE_PMU,
-					     IOMUX_UNROUTED
-			    ),
-	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
-					     IOMUX_UNROUTED,
-					     IOMUX_UNROUTED,
-					     0
-			    ),
-	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, IOMUX_UNROUTED),
-	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, IOMUX_WIDTH_4BIT),
-	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_WIDTH_4BIT,
-					     IOMUX_WIDTH_4BIT,
-					     0,
-					     0
-			    ),
-	PIN_BANK_IOMUX_FLAGS(5, 32, "gpio5", IOMUX_UNROUTED,
-					     0,
-					     0,
-					     IOMUX_UNROUTED
-			    ),
-	PIN_BANK_IOMUX_FLAGS(6, 32, "gpio6", 0, 0, 0, IOMUX_UNROUTED),
-	PIN_BANK_IOMUX_FLAGS(7, 32, "gpio7", 0,
-					     0,
-					     IOMUX_WIDTH_4BIT,
-					     IOMUX_UNROUTED
-			    ),
-	PIN_BANK(8, 16, "gpio8"),
-};
-#endif
-
-static void pinctrl_rk3288_pwm_config(struct rk3288_grf *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7A0_MASK << GPIO7A0_SHIFT,
-			     GPIO7A0_PWM_0 << GPIO7A0_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7A1_MASK << GPIO7A1_SHIFT,
-			     GPIO7A1_PWM_1 << GPIO7A1_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7C6_MASK << GPIO7C6_SHIFT,
-			     GPIO7C6_PWM_2 << GPIO7C6_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio7a_iomux, GPIO7C7_MASK << GPIO7C6_SHIFT,
-			     GPIO7C7_PWM_3 << GPIO7C7_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3288_i2c_config(struct rk3288_grf *grf,
-				      struct rk3288_pmu *pmu, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_B],
-				GPIO0_B7_MASK << GPIO0_B7_SHIFT,
-				GPIO0_B7_I2C0PMU_SDA << GPIO0_B7_SHIFT);
-		clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_C],
-				GPIO0_C0_MASK << GPIO0_C0_SHIFT,
-				GPIO0_C0_I2C0PMU_SCL << GPIO0_C0_SHIFT);
-		break;
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio8a_iomux,
-			     GPIO8A4_MASK << GPIO8A4_SHIFT |
-			     GPIO8A5_MASK << GPIO8A5_SHIFT,
-			     GPIO8A4_I2C2SENSOR_SDA << GPIO8A4_SHIFT |
-			     GPIO8A5_I2C2SENSOR_SCL << GPIO8A5_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio6b_iomux,
-			     GPIO6B1_MASK << GPIO6B1_SHIFT |
-			     GPIO6B2_MASK << GPIO6B2_SHIFT,
-			     GPIO6B1_I2C1AUDIO_SDA << GPIO6B1_SHIFT |
-			     GPIO6B2_I2C1AUDIO_SCL << GPIO6B2_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GPIO2C1_MASK << GPIO2C1_SHIFT |
-			     GPIO2C0_MASK << GPIO2C0_SHIFT,
-			     GPIO2C1_I2C3CAM_SDA << GPIO2C1_SHIFT |
-			     GPIO2C0_I2C3CAM_SCL << GPIO2C0_SHIFT);
-		break;
-	case PERIPH_ID_I2C4:
-		rk_clrsetreg(&grf->gpio7cl_iomux,
-			     GPIO7C1_MASK << GPIO7C1_SHIFT |
-			     GPIO7C2_MASK << GPIO7C2_SHIFT,
-			     GPIO7C1_I2C4TP_SDA << GPIO7C1_SHIFT |
-			     GPIO7C2_I2C4TP_SCL << GPIO7C2_SHIFT);
-		break;
-	case PERIPH_ID_I2C5:
-		rk_clrsetreg(&grf->gpio7cl_iomux,
-			     GPIO7C3_MASK << GPIO7C3_SHIFT,
-			     GPIO7C3_I2C5HDMI_SDA << GPIO7C3_SHIFT);
-		rk_clrsetreg(&grf->gpio7ch_iomux,
-			     GPIO7C4_MASK << GPIO7C4_SHIFT,
-			     GPIO7C4_I2C5HDMI_SCL << GPIO7C4_SHIFT);
-		break;
-#endif
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-#ifndef CONFIG_SPL_BUILD
-static void pinctrl_rk3288_lcdc_config(struct rk3288_grf *grf, int lcd_id)
-{
-	switch (lcd_id) {
-	case PERIPH_ID_LCDC0:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D3_MASK << GPIO1D0_SHIFT |
-			     GPIO1D2_MASK << GPIO1D2_SHIFT |
-			     GPIO1D1_MASK << GPIO1D1_SHIFT |
-			     GPIO1D0_MASK << GPIO1D0_SHIFT,
-			     GPIO1D3_LCDC0_DCLK << GPIO1D3_SHIFT |
-			     GPIO1D2_LCDC0_DEN << GPIO1D2_SHIFT |
-			     GPIO1D1_LCDC0_VSYNC << GPIO1D1_SHIFT |
-			     GPIO1D0_LCDC0_HSYNC << GPIO1D0_SHIFT);
-		break;
-	default:
-		debug("lcdc id = %d iomux error!\n", lcd_id);
-		break;
-	}
-}
-#endif
-
-static int pinctrl_rk3288_spi_config(struct rk3288_grf *grf,
-				     enum periph_id spi_id, int cs)
-{
-	switch (spi_id) {
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio5b_iomux,
-				     GPIO5B5_MASK << GPIO5B5_SHIFT,
-				     GPIO5B5_SPI0_CSN0 << GPIO5B5_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio5c_iomux,
-				     GPIO5C0_MASK << GPIO5C0_SHIFT,
-				     GPIO5C0_SPI0_CSN1 << GPIO5C0_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio5b_iomux,
-			     GPIO5B7_MASK << GPIO5B7_SHIFT |
-			     GPIO5B6_MASK << GPIO5B6_SHIFT |
-			     GPIO5B4_MASK << GPIO5B4_SHIFT,
-			     GPIO5B7_SPI0_RXD << GPIO5B7_SHIFT |
-			     GPIO5B6_SPI0_TXD << GPIO5B6_SHIFT |
-			     GPIO5B4_SPI0_CLK << GPIO5B4_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&grf->gpio7b_iomux,
-			     GPIO7B6_MASK << GPIO7B6_SHIFT |
-			     GPIO7B7_MASK << GPIO7B7_SHIFT |
-			     GPIO7B5_MASK << GPIO7B5_SHIFT |
-			     GPIO7B4_MASK << GPIO7B4_SHIFT,
-			     GPIO7B6_SPI1_RXD << GPIO7B6_SHIFT |
-			     GPIO7B7_SPI1_TXD << GPIO7B7_SHIFT |
-			     GPIO7B5_SPI1_CSN0 << GPIO7B5_SHIFT |
-			     GPIO7B4_SPI1_CLK << GPIO7B4_SHIFT);
-		break;
-#endif
-	case PERIPH_ID_SPI2:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio8a_iomux,
-				     GPIO8A7_MASK << GPIO8A7_SHIFT,
-				     GPIO8A7_SPI2_CSN0 << GPIO8A7_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio8a_iomux,
-				     GPIO8A3_MASK << GPIO8A3_SHIFT,
-				     GPIO8A3_SPI2_CSN1 << GPIO8A3_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio8b_iomux,
-			     GPIO8B1_MASK << GPIO8B1_SHIFT |
-			     GPIO8B0_MASK << GPIO8B0_SHIFT,
-			     GPIO8B1_SPI2_TXD << GPIO8B1_SHIFT |
-			     GPIO8B0_SPI2_RXD << GPIO8B0_SHIFT);
-		rk_clrsetreg(&grf->gpio8a_iomux,
-			     GPIO8A6_MASK << GPIO8A6_SHIFT,
-			     GPIO8A6_SPI2_CLK << GPIO8A6_SHIFT);
-		break;
-	default:
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3288_uart_config(struct rk3288_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_UART_BT:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GPIO4C3_MASK << GPIO4C3_SHIFT |
-			     GPIO4C2_MASK << GPIO4C2_SHIFT |
-			     GPIO4C1_MASK << GPIO4C1_SHIFT |
-			     GPIO4C0_MASK << GPIO4C0_SHIFT,
-			     GPIO4C3_UART0BT_RTSN << GPIO4C3_SHIFT |
-			     GPIO4C2_UART0BT_CTSN << GPIO4C2_SHIFT |
-			     GPIO4C1_UART0BT_SOUT << GPIO4C1_SHIFT |
-			     GPIO4C0_UART0BT_SIN << GPIO4C0_SHIFT);
-		break;
-	case PERIPH_ID_UART_BB:
-		rk_clrsetreg(&grf->gpio5b_iomux,
-			     GPIO5B3_MASK << GPIO5B3_SHIFT |
-			     GPIO5B2_MASK << GPIO5B2_SHIFT |
-			     GPIO5B1_MASK << GPIO5B1_SHIFT |
-			     GPIO5B0_MASK << GPIO5B0_SHIFT,
-			     GPIO5B3_UART1BB_RTSN << GPIO5B3_SHIFT |
-			     GPIO5B2_UART1BB_CTSN << GPIO5B2_SHIFT |
-			     GPIO5B1_UART1BB_SOUT << GPIO5B1_SHIFT |
-			     GPIO5B0_UART1BB_SIN << GPIO5B0_SHIFT);
-		break;
-#endif
-	case PERIPH_ID_UART_DBG:
-		rk_clrsetreg(&grf->gpio7ch_iomux,
-			     GPIO7C7_MASK << GPIO7C7_SHIFT |
-			     GPIO7C6_MASK << GPIO7C6_SHIFT,
-			     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-			     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
-		break;
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_UART_GPS:
-		rk_clrsetreg(&grf->gpio7b_iomux,
-			     GPIO7B2_MASK << GPIO7B2_SHIFT |
-			     GPIO7B1_MASK << GPIO7B1_SHIFT |
-			     GPIO7B0_MASK << GPIO7B0_SHIFT,
-			     GPIO7B2_UART3GPS_RTSN << GPIO7B2_SHIFT |
-			     GPIO7B1_UART3GPS_CTSN << GPIO7B1_SHIFT |
-			     GPIO7B0_UART3GPS_SOUT << GPIO7B0_SHIFT);
-		rk_clrsetreg(&grf->gpio7a_iomux,
-			     GPIO7A7_MASK << GPIO7A7_SHIFT,
-			     GPIO7A7_UART3GPS_SIN << GPIO7A7_SHIFT);
-		break;
-	case PERIPH_ID_UART_EXP:
-		rk_clrsetreg(&grf->gpio5b_iomux,
-			     GPIO5B5_MASK << GPIO5B5_SHIFT |
-			     GPIO5B4_MASK << GPIO5B4_SHIFT |
-			     GPIO5B6_MASK << GPIO5B6_SHIFT |
-			     GPIO5B7_MASK << GPIO5B7_SHIFT,
-			     GPIO5B5_UART4EXP_RTSN << GPIO5B5_SHIFT |
-			     GPIO5B4_UART4EXP_CTSN << GPIO5B4_SHIFT |
-			     GPIO5B6_UART4EXP_SOUT << GPIO5B6_SHIFT |
-			     GPIO5B7_UART4EXP_SIN << GPIO5B7_SHIFT);
-		break;
-#endif
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3288_sdmmc_config(struct rk3288_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio3a_iomux, 0xffff,
-			     GPIO3A7_EMMC_DATA7 << GPIO3A7_SHIFT |
-			     GPIO3A6_EMMC_DATA6 << GPIO3A6_SHIFT |
-			     GPIO3A5_EMMC_DATA5 << GPIO3A5_SHIFT |
-			     GPIO3A4_EMMC_DATA4 << GPIO3A4_SHIFT |
-			     GPIO3A3_EMMC_DATA3 << GPIO3A3_SHIFT |
-			     GPIO3A2_EMMC_DATA2 << GPIO3A2_SHIFT |
-			     GPIO3A1_EMMC_DATA1 << GPIO3A1_SHIFT |
-			     GPIO3A0_EMMC_DATA0 << GPIO3A0_SHIFT);
-		rk_clrsetreg(&grf->gpio3b_iomux, GPIO3B1_MASK << GPIO3B1_SHIFT,
-			     GPIO3B1_EMMC_PWREN << GPIO3B1_SHIFT);
-		rk_clrsetreg(&grf->gpio3c_iomux,
-			     GPIO3C0_MASK << GPIO3C0_SHIFT,
-			     GPIO3C0_EMMC_CMD << GPIO3C0_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio6c_iomux, 0xffff,
-			     GPIO6C6_SDMMC0_DECTN << GPIO6C6_SHIFT |
-			     GPIO6C5_SDMMC0_CMD << GPIO6C5_SHIFT |
-			     GPIO6C4_SDMMC0_CLKOUT << GPIO6C4_SHIFT |
-			     GPIO6C3_SDMMC0_DATA3 << GPIO6C3_SHIFT |
-			     GPIO6C2_SDMMC0_DATA2 << GPIO6C2_SHIFT |
-			     GPIO6C1_SDMMC0_DATA1 << GPIO6C1_SHIFT |
-			     GPIO6C0_SDMMC0_DATA0 << GPIO6C0_SHIFT);
-
-		/* use sdmmc0 io, disable JTAG function */
-		rk_clrsetreg(&grf->soc_con0, 1 << GRF_FORCE_JTAG_SHIFT, 0);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3288_gmac_config(struct rk3288_grf *grf, int gmac_id)
-{
-	switch (gmac_id) {
-	case PERIPH_ID_GMAC:
-		rk_clrsetreg(&grf->gpio3dl_iomux,
-			     GPIO3D3_MASK << GPIO3D3_SHIFT |
-			     GPIO3D2_MASK << GPIO3D2_SHIFT |
-			     GPIO3D2_MASK << GPIO3D1_SHIFT |
-			     GPIO3D0_MASK << GPIO3D0_SHIFT,
-			     GPIO3D3_MAC_RXD3 << GPIO3D3_SHIFT |
-			     GPIO3D2_MAC_RXD2 << GPIO3D2_SHIFT |
-			     GPIO3D1_MAC_TXD3 << GPIO3D1_SHIFT |
-			     GPIO3D0_MAC_TXD2 << GPIO3D0_SHIFT);
-
-		rk_clrsetreg(&grf->gpio3dh_iomux,
-			     GPIO3D7_MASK << GPIO3D7_SHIFT |
-			     GPIO3D6_MASK << GPIO3D6_SHIFT |
-			     GPIO3D5_MASK << GPIO3D5_SHIFT |
-			     GPIO3D4_MASK << GPIO3D4_SHIFT,
-			     GPIO3D7_MAC_RXD1 << GPIO3D7_SHIFT |
-			     GPIO3D6_MAC_RXD0 << GPIO3D6_SHIFT |
-			     GPIO3D5_MAC_TXD1 << GPIO3D5_SHIFT |
-			     GPIO3D4_MAC_TXD0 << GPIO3D4_SHIFT);
-
-		/* switch the Tx pins to 12ma drive-strength */
-		rk_clrsetreg(&grf->gpio1_e[2][3],
-			     GPIO_BIAS_MASK |
-			     (GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(1)) |
-			     (GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(4)) |
-			     (GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(5)),
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(0)) |
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(1)) |
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(4)) |
-			     (GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(5)));
-
-		/* Set normal pull for all GPIO3D pins */
-		rk_clrsetreg(&grf->gpio1_p[2][3],
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(7)),
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(6)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(7)));
-
-		rk_clrsetreg(&grf->gpio4al_iomux,
-			     GPIO4A3_MASK << GPIO4A3_SHIFT |
-			     GPIO4A1_MASK << GPIO4A1_SHIFT |
-			     GPIO4A0_MASK << GPIO4A0_SHIFT,
-			     GPIO4A3_MAC_CLK << GPIO4A3_SHIFT |
-			     GPIO4A1_MAC_TXDV << GPIO4A1_SHIFT |
-			     GPIO4A0_MAC_MDC << GPIO4A0_SHIFT);
-
-		rk_clrsetreg(&grf->gpio4ah_iomux,
-			     GPIO4A6_MASK << GPIO4A6_SHIFT |
-			     GPIO4A5_MASK << GPIO4A5_SHIFT |
-			     GPIO4A4_MASK << GPIO4A4_SHIFT,
-			     GPIO4A6_MAC_RXCLK << GPIO4A6_SHIFT |
-			     GPIO4A5_MAC_MDIO << GPIO4A5_SHIFT |
-			     GPIO4A4_MAC_TXEN << GPIO4A4_SHIFT);
-
-		/* switch GPIO4A4 to 12ma drive-strength */
-		rk_clrsetreg(&grf->gpio1_e[3][0],
-			     GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(4),
-			     GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(4));
-
-		/* Set normal pull for all GPIO4A pins */
-		rk_clrsetreg(&grf->gpio1_p[3][0],
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(7)),
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(0)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(1)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(2)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(3)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(4)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(5)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(6)) |
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(7)));
-
-		rk_clrsetreg(&grf->gpio4bl_iomux,
-			    GPIO4B1_MASK << GPIO4B1_SHIFT,
-			    GPIO4B1_MAC_TXCLK << GPIO4B1_SHIFT);
-
-		/* switch GPIO4B1 to 12ma drive-strength */
-		rk_clrsetreg(&grf->gpio1_e[3][1],
-			     GPIO_BIAS_MASK << GPIO_BIAS_SHIFT(1),
-			     GPIO_BIAS_12MA << GPIO_BIAS_SHIFT(1));
-
-		/* Set pull normal for GPIO4B1 */
-		rk_clrsetreg(&grf->gpio1_p[3][1],
-			     (GPIO_PULL_MASK << GPIO_PULL_SHIFT(1)),
-			     (GPIO_PULL_NORMAL << GPIO_PULL_SHIFT(1)));
-
-		break;
-	default:
-		printf("gmac id = %d iomux error!\n", gmac_id);
-		break;
-	}
-}
-
-#ifndef CONFIG_SPL_BUILD
-static void pinctrl_rk3288_hdmi_config(struct rk3288_grf *grf, int hdmi_id)
-{
-	switch (hdmi_id) {
-	case PERIPH_ID_HDMI:
-		rk_clrsetreg(&grf->gpio7cl_iomux, GPIO7C3_MASK << GPIO7C3_SHIFT,
-			     GPIO7C3_EDPHDMII2C_SDA << GPIO7C3_SHIFT);
-		rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C4_MASK << GPIO7C4_SHIFT,
-			     GPIO7C4_EDPHDMII2C_SCL << GPIO7C4_SHIFT);
-		break;
-	default:
-		debug("hdmi id = %d iomux error!\n", hdmi_id);
-		break;
-	}
-}
-#endif
-
-static int rk3288_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-	case PERIPH_ID_PWM4:
-		pinctrl_rk3288_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-		pinctrl_rk3288_i2c_config(priv->grf, priv->pmu, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-		pinctrl_rk3288_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3288_uart_config(priv->grf, func);
-		break;
-#ifndef CONFIG_SPL_BUILD
-	case PERIPH_ID_LCDC0:
-	case PERIPH_ID_LCDC1:
-		pinctrl_rk3288_lcdc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_HDMI:
-		pinctrl_rk3288_hdmi_config(priv->grf, func);
-		break;
-#endif
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3288_sdmmc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_GMAC:
-		pinctrl_rk3288_gmac_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3288_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 27:
-		return PERIPH_ID_GMAC;
-	case 44:
-		return PERIPH_ID_SPI0;
-	case 45:
-		return PERIPH_ID_SPI1;
-	case 46:
-		return PERIPH_ID_SPI2;
-	case 60:
-		return PERIPH_ID_I2C0;
-	case 62: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 61:
-		return PERIPH_ID_I2C2;
-	case 63:
-		return PERIPH_ID_I2C3;
-	case 64:
-		return PERIPH_ID_I2C4;
-	case 65:
-		return PERIPH_ID_I2C5;
-	case 103:
-		return PERIPH_ID_HDMI;
-	}
-#endif
-
-	return -ENOENT;
-}
-
-static int rk3288_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3288_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-	return rk3288_pinctrl_request(dev, func, 0);
-}
-
-#ifndef CONFIG_SPL_BUILD
-int rk3288_pinctrl_get_pin_info(struct rk3288_pinctrl_priv *priv,
-				int banknum, int ind, u32 **addrp, uint *shiftp,
-				uint *maskp)
-{
-	struct rockchip_pin_bank *bank = &rk3288_pin_banks[banknum];
-	uint muxnum;
-	u32 *addr;
-
-	for (muxnum = 0; muxnum < 4; muxnum++) {
-		struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-		if (ind >= 8) {
-			ind -= 8;
-			continue;
-		}
-
-		if (mux->type & IOMUX_SOURCE_PMU)
-			addr = priv->pmu->gpio0_iomux;
-		else
-			addr = (u32 *)priv->grf - 4;
-		addr += mux->offset;
-		*shiftp = ind & 7;
-		if (mux->type & IOMUX_WIDTH_4BIT) {
-			*maskp = 0xf;
-			*shiftp *= 4;
-			if (*shiftp >= 16) {
-				*shiftp -= 16;
-				addr++;
-			}
-		} else {
-			*maskp = 3;
-			*shiftp *= 2;
-		}
-
-		debug("%s: addr=%p, mask=%x, shift=%x\n", __func__, addr,
-		      *maskp, *shiftp);
-		*addrp = addr;
-		return 0;
-	}
-
-	return -EINVAL;
-}
-
-static int rk3288_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
-				       int index)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift;
-	uint mask;
-	u32 *addr;
-	int ret;
-
-	ret = rk3288_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-	return (readl(addr) & mask) >> shift;
-}
-
-static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
-				   int muxval, int flags)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-	uint shift, ind = index;
-	uint mask;
-	uint value;
-	u32 *addr;
-	int ret;
-
-	debug("%s: %x %x %x %x\n", __func__, banknum, index, muxval, flags);
-	ret = rk3288_pinctrl_get_pin_info(priv, banknum, index, &addr, &shift,
-					  &mask);
-	if (ret)
-		return ret;
-
-	/*
-	 * PMU_GPIO0 registers cannot be selectively written so we cannot use
-	 * rk_clrsetreg() here.  However, the upper 16 bits are reserved and
-	 * are ignored when written, so we can use the same code as for the
-	 * other GPIO banks providing that we preserve the value of the other
-	 * bits.
-	 */
-	value = readl(addr);
-	value &= ~(mask << shift);
-	value |= (mask << (shift + 16)) | (muxval << shift);
-	writel(value, addr);
-
-	/* Handle pullup/pulldown/drive-strength */
-	if (flags) {
-		uint val = 0;
-
-		if (flags & (1 << PIN_CONFIG_BIAS_PULL_UP))
-			val = 1;
-		else if (flags & (1 << PIN_CONFIG_BIAS_PULL_DOWN))
-			val = 2;
-		else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
-			val = 3;
-
-		shift = (index & 7) * 2;
-		ind = index >> 3;
-		if (banknum == 0)
-			addr = &priv->pmu->gpio0pull[ind];
-		else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
-			addr = &priv->grf->gpio1_e[banknum - 1][ind];
-		else
-			addr = &priv->grf->gpio1_p[banknum - 1][ind];
-		debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val,
-		      shift);
-
-		/* As above, rk_clrsetreg() cannot be used here. */
-		value = readl(addr);
-		value &= ~(mask << shift);
-		value |= (3 << (shift + 16)) | (val << shift);
-		writel(value, addr);
-	}
-
-	return 0;
-}
-
-static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)
-{
-	const void *blob = gd->fdt_blob;
-	int pcfg_node, ret, flags, count, i;
-	u32 cell[60], *ptr;
-
-	debug("%s: %s %s\n", __func__, dev->name, config->name);
-	ret = fdtdec_get_int_array_count(blob, dev_of_offset(config),
-					 "rockchip,pins", cell,
-					 ARRAY_SIZE(cell));
-	if (ret < 0) {
-		debug("%s: bad array %d\n", __func__, ret);
-		return -EINVAL;
-	}
-	count = ret;
-	for (i = 0, ptr = cell; i < count; i += 4, ptr += 4) {
-		pcfg_node = fdt_node_offset_by_phandle(blob, ptr[3]);
-		if (pcfg_node < 0)
-			return -EINVAL;
-		flags = pinctrl_decode_pin_config(blob, pcfg_node);
-		if (flags < 0)
-			return flags;
-
-		if (fdtdec_get_int(blob, pcfg_node, "drive-strength", 0) == 12)
-			flags |= 1 << PIN_CONFIG_DRIVE_STRENGTH;
-
-		ret = rk3288_pinctrl_set_pins(dev, ptr[0], ptr[1], ptr[2],
-					      flags);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-#endif
-
-static struct pinctrl_ops rk3288_pinctrl_ops = {
-#ifndef CONFIG_SPL_BUILD
-	.set_state	= rk3288_pinctrl_set_state,
-	.get_gpio_mux	= rk3288_pinctrl_get_gpio_mux,
-#endif
-	.set_state_simple	= rk3288_pinctrl_set_state_simple,
-	.request	= rk3288_pinctrl_request,
-	.get_periph_id	= rk3288_pinctrl_get_periph_id,
-};
-
-#ifndef CONFIG_SPL_BUILD
-static int rk3288_pinctrl_parse_tables(struct rk3288_pinctrl_priv *priv,
-				       struct rockchip_pin_bank *banks,
-				       int count)
-{
-	struct rockchip_pin_bank *bank;
-	uint reg, muxnum, banknum;
-
-	reg = 0;
-	for (banknum = 0; banknum < count; banknum++) {
-		bank = &banks[banknum];
-		bank->reg = reg;
-		debug("%s: bank %d, reg %x\n", __func__, banknum, reg * 4);
-		for (muxnum = 0; muxnum < 4; muxnum++) {
-			struct rockchip_iomux *mux = &bank->iomux[muxnum];
-
-			if (!(mux->type & IOMUX_UNROUTED))
-				mux->offset = reg;
-			if (mux->type & IOMUX_WIDTH_4BIT)
-				reg += 2;
-			else
-				reg += 1;
-		}
-	}
-
-	return 0;
-}
-#endif
-
-static int rk3288_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
-	debug("%s: grf=%p, pmu=%p\n", __func__, priv->grf, priv->pmu);
-#ifndef CONFIG_SPL_BUILD
-	ret = rk3288_pinctrl_parse_tables(priv, rk3288_pin_banks,
-					  ARRAY_SIZE(rk3288_pin_banks));
-#endif
-
-	return ret;
-}
-
-static const struct udevice_id rk3288_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3288-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3288) = {
-	.name		= "rockchip_rk3288_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3288_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3288_pinctrl_priv),
-	.ops		= &rk3288_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind		= dm_scan_fdt_dev,
-#endif
-	.probe		= rk3288_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
deleted file mode 100644
index f3e7eec9e4..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/arch/periph.h>
-#include <asm/io.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3328_pinctrl_priv {
-	struct rk3328_grf_regs *grf;
-};
-
-static void pinctrl_rk3328_pwm_config(struct rk3328_grf_regs *grf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A4_SEL_MASK,
-			     GPIO2A4_PWM_0 << GPIO2A4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_SEL_MASK,
-			     GPIO2A5_PWM_1 << GPIO2A5_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A6_SEL_MASK,
-			     GPIO2A6_PWM_2 << GPIO2A6_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A2_SEL_MASK,
-			     GPIO2A2_PWM_IR << GPIO2A2_SEL_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3328_i2c_config(struct rk3328_grf_regs *grf, int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D0_SEL_MASK | GPIO2D1_SEL_MASK,
-			     GPIO2D0_I2C0_SCL << GPIO2D0_SEL_SHIFT |
-			     GPIO2D1_I2C0_SDA << GPIO2D1_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A4_SEL_MASK | GPIO2A5_SEL_MASK,
-			     GPIO2A5_I2C1_SCL << GPIO2A5_SEL_SHIFT |
-			     GPIO2A4_I2C1_SDA << GPIO2A4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C2:
-		rk_clrsetreg(&grf->gpio2bl_iomux,
-			     GPIO2BL5_SEL_MASK | GPIO2BL6_SEL_MASK,
-			     GPIO2BL6_I2C2_SCL << GPIO2BL6_SEL_SHIFT |
-			     GPIO2BL5_I2C2_SDA << GPIO2BL5_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C3:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A5_SEL_MASK | GPIO0A6_SEL_MASK,
-			     GPIO0A5_I2C3_SCL << GPIO0A5_SEL_SHIFT |
-			     GPIO0A6_I2C3_SDA << GPIO0A6_SEL_SHIFT);
-		break;
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3328_lcdc_config(struct rk3328_grf_regs *grf, int lcd_id)
-{
-	switch (lcd_id) {
-	case PERIPH_ID_LCDC0:
-		break;
-	default:
-		debug("lcdc id = %d iomux error!\n", lcd_id);
-		break;
-	}
-}
-
-static int pinctrl_rk3328_spi_config(struct rk3328_grf_regs *grf,
-				     enum periph_id spi_id, int cs)
-{
-	u32 com_iomux = readl(&grf->com_iomux);
-
-	if ((com_iomux & IOMUX_SEL_SPI_MASK) !=
-		IOMUX_SEL_SPI_M0 << IOMUX_SEL_SPI_SHIFT) {
-		debug("driver do not support iomux other than m0\n");
-		goto err;
-	}
-
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio2bl_iomux,
-				     GPIO2BL3_SEL_MASK,
-				     GPIO2BL3_SPI_CSN0_M0
-				     << GPIO2BL3_SEL_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio2bl_iomux,
-				     GPIO2BL4_SEL_MASK,
-				     GPIO2BL4_SPI_CSN1_M0
-				     << GPIO2BL4_SEL_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio2bl_iomux,
-			     GPIO2BL0_SEL_MASK,
-			     GPIO2BL0_SPI_CLK_TX_RX_M0 << GPIO2BL0_SEL_SHIFT);
-		break;
-	default:
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3328_uart_config(struct rk3328_grf_regs *grf, int uart_id)
-{
-	u32 com_iomux = readl(&grf->com_iomux);
-
-	switch (uart_id) {
-	case PERIPH_ID_UART2:
-		break;
-		if (com_iomux & IOMUX_SEL_UART2_MASK)
-			rk_clrsetreg(&grf->gpio2a_iomux,
-				     GPIO2A0_SEL_MASK | GPIO2A1_SEL_MASK,
-				     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT |
-				     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
-
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3328_sdmmc_config(struct rk3328_grf_regs *grf,
-					int mmc_id)
-{
-	u32 com_iomux = readl(&grf->com_iomux);
-
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		rk_clrsetreg(&grf->gpio0a_iomux,
-			     GPIO0A7_SEL_MASK,
-			     GPIO0A7_EMMC_DATA0 << GPIO0A7_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D4_SEL_MASK,
-			     GPIO2D4_EMMC_DATA1234 << GPIO2D4_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio3c_iomux,
-			     GPIO3C0_SEL_MASK,
-			     GPIO3C0_EMMC_DATA567_PWR_CLK_RSTN_CMD
-			     << GPIO3C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SDCARD:
-		/* SDMMC_PWREN use GPIO and init as regulator-fiexed  */
-		if (com_iomux & IOMUX_SEL_SDMMC_MASK)
-			rk_clrsetreg(&grf->gpio0d_iomux,
-				     GPIO0D6_SEL_MASK,
-				     GPIO0D6_GPIO << GPIO0D6_SEL_SHIFT);
-		else
-			rk_clrsetreg(&grf->gpio2a_iomux,
-				     GPIO2A7_SEL_MASK,
-				     GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio1a_iomux,
-			     GPIO1A0_SEL_MASK,
-			     GPIO1A0_CARD_DATA_CLK_CMD_DETN
-			     << GPIO1A0_SEL_SHIFT);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static int rk3328_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3328_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-		pinctrl_rk3328_pwm_config(priv->grf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-		pinctrl_rk3328_i2c_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SPI0:
-		pinctrl_rk3328_spi_config(priv->grf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3328_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_LCDC0:
-	case PERIPH_ID_LCDC1:
-		pinctrl_rk3328_lcdc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3328_sdmmc_config(priv->grf, func);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3328_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 49:
-		return PERIPH_ID_SPI0;
-	case 50:
-		return PERIPH_ID_PWM0;
-	case 36:
-		return PERIPH_ID_I2C0;
-	case 37: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 38:
-		return PERIPH_ID_I2C2;
-	case 39:
-		return PERIPH_ID_I2C3;
-	case 12:
-		return PERIPH_ID_SDCARD;
-	case 14:
-		return PERIPH_ID_EMMC;
-	}
-
-	return -ENOENT;
-}
-
-static int rk3328_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3328_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rk3328_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3328_pinctrl_ops = {
-	.set_state_simple	= rk3328_pinctrl_set_state_simple,
-	.request	= rk3328_pinctrl_request,
-	.get_periph_id	= rk3328_pinctrl_get_periph_id,
-};
-
-static int rk3328_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3328_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	debug("%s: grf=%p\n", __func__, priv->grf);
-
-	return ret;
-}
-
-static const struct udevice_id rk3328_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3328-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3328) = {
-	.name		= "rockchip_rk3328_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3328_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3328_pinctrl_priv),
-	.ops		= &rk3328_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3328_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
deleted file mode 100644
index 25249e377a..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c
+++ /dev/null
@@ -1,742 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* PMUGRF_GPIO0B_IOMUX */
-enum {
-	GPIO0B5_SHIFT           = 10,
-	GPIO0B5_MASK            = GENMASK(GPIO0B5_SHIFT + 1, GPIO0B5_SHIFT),
-	GPIO0B5_GPIO            = 0,
-	GPIO0B5_SPI2_CSN0       = (2 << GPIO0B5_SHIFT),
-
-	GPIO0B4_SHIFT           = 8,
-	GPIO0B4_MASK            = GENMASK(GPIO0B4_SHIFT + 1, GPIO0B4_SHIFT),
-	GPIO0B4_GPIO            = 0,
-	GPIO0B4_SPI2_CLK        = (2 << GPIO0B4_SHIFT),
-
-	GPIO0B3_SHIFT           = 6,
-	GPIO0B3_MASK            = GENMASK(GPIO0B3_SHIFT + 1, GPIO0B3_SHIFT),
-	GPIO0B3_GPIO            = 0,
-	GPIO0B3_SPI2_TXD        = (2 << GPIO0B3_SHIFT),
-
-	GPIO0B2_SHIFT           = 4,
-	GPIO0B2_MASK            = GENMASK(GPIO0B2_SHIFT + 1, GPIO0B2_SHIFT),
-	GPIO0B2_GPIO            = 0,
-	GPIO0B2_SPI2_RXD        = (2 << GPIO0B2_SHIFT),
-};
-
-/*GRF_GPIO0C_IOMUX*/
-enum {
-	GPIO0C7_SHIFT           = 14,
-	GPIO0C7_MASK	        = GENMASK(GPIO0C7_SHIFT + 1, GPIO0C7_SHIFT),
-	GPIO0C7_GPIO	        = 0,
-	GPIO0C7_LCDC_D19        = (1 << GPIO0C7_SHIFT),
-	GPIO0C7_TRACE_D9        = (2 << GPIO0C7_SHIFT),
-	GPIO0C7_UART1_RTSN      = (3 << GPIO0C7_SHIFT),
-
-	GPIO0C6_SHIFT           = 12,
-	GPIO0C6_MASK            = GENMASK(GPIO0C6_SHIFT + 1, GPIO0C6_SHIFT),
-	GPIO0C6_GPIO            = 0,
-	GPIO0C6_LCDC_D18        = (1 << GPIO0C6_SHIFT),
-	GPIO0C6_TRACE_D8        = (2 << GPIO0C6_SHIFT),
-	GPIO0C6_UART1_CTSN      = (3 << GPIO0C6_SHIFT),
-
-	GPIO0C5_SHIFT           = 10,
-	GPIO0C5_MASK            = GENMASK(GPIO0C5_SHIFT + 1, GPIO0C5_SHIFT),
-	GPIO0C5_GPIO            = 0,
-	GPIO0C5_LCDC_D17        = (1 << GPIO0C5_SHIFT),
-	GPIO0C5_TRACE_D7        = (2 << GPIO0C5_SHIFT),
-	GPIO0C5_UART1_SOUT      = (3 << GPIO0C5_SHIFT),
-
-	GPIO0C4_SHIFT           = 8,
-	GPIO0C4_MASK            = GENMASK(GPIO0C4_SHIFT + 1, GPIO0C4_SHIFT),
-	GPIO0C4_GPIO            = 0,
-	GPIO0C4_LCDC_D16        = (1 << GPIO0C4_SHIFT),
-	GPIO0C4_TRACE_D6        = (2 << GPIO0C4_SHIFT),
-	GPIO0C4_UART1_SIN       = (3 << GPIO0C4_SHIFT),
-
-	GPIO0C3_SHIFT           = 6,
-	GPIO0C3_MASK            = GENMASK(GPIO0C3_SHIFT + 1, GPIO0C3_SHIFT),
-	GPIO0C3_GPIO            = 0,
-	GPIO0C3_LCDC_D15        = (1 << GPIO0C3_SHIFT),
-	GPIO0C3_TRACE_D5        = (2 << GPIO0C3_SHIFT),
-	GPIO0C3_MCU_JTAG_TDO    = (3 << GPIO0C3_SHIFT),
-
-	GPIO0C2_SHIFT           = 4,
-	GPIO0C2_MASK            = GENMASK(GPIO0C2_SHIFT + 1, GPIO0C2_SHIFT),
-	GPIO0C2_GPIO            = 0,
-	GPIO0C2_LCDC_D14        = (1 << GPIO0C2_SHIFT),
-	GPIO0C2_TRACE_D4        = (2 << GPIO0C2_SHIFT),
-	GPIO0C2_MCU_JTAG_TDI    = (3 << GPIO0C2_SHIFT),
-
-	GPIO0C1_SHIFT           = 2,
-	GPIO0C1_MASK            = GENMASK(GPIO0C1_SHIFT + 1, GPIO0C1_SHIFT),
-	GPIO0C1_GPIO            = 0,
-	GPIO0C1_LCDC_D13        = (1 << GPIO0C1_SHIFT),
-	GPIO0C1_TRACE_D3        = (2 << GPIO0C1_SHIFT),
-	GPIO0C1_MCU_JTAG_TRTSN  = (3 << GPIO0C1_SHIFT),
-
-	GPIO0C0_SHIFT           = 0,
-	GPIO0C0_MASK            = GENMASK(GPIO0C0_SHIFT + 1, GPIO0C0_SHIFT),
-	GPIO0C0_GPIO            = 0,
-	GPIO0C0_LCDC_D12        = (1 << GPIO0C0_SHIFT),
-	GPIO0C0_TRACE_D2        = (2 << GPIO0C0_SHIFT),
-	GPIO0C0_MCU_JTAG_TDO    = (3 << GPIO0C0_SHIFT),
-};
-
-/*GRF_GPIO0D_IOMUX*/
-enum {
-	GPIO0D7_SHIFT           = 14,
-	GPIO0D7_MASK            = GENMASK(GPIO0D7_SHIFT + 1, GPIO0D7_SHIFT),
-	GPIO0D7_GPIO            = 0,
-	GPIO0D7_LCDC_DCLK       = (1 << GPIO0D7_SHIFT),
-	GPIO0D7_TRACE_CTL       = (2 << GPIO0D7_SHIFT),
-	GPIO0D7_PMU_DEBUG5      = (3 << GPIO0D7_SHIFT),
-
-	GPIO0D6_SHIFT           = 12,
-	GPIO0D6_MASK            = GENMASK(GPIO0D6_SHIFT + 1, GPIO0D6_SHIFT),
-	GPIO0D6_GPIO            = 0,
-	GPIO0D6_LCDC_DEN        = (1 << GPIO0D6_SHIFT),
-	GPIO0D6_TRACE_CLK       = (2 << GPIO0D6_SHIFT),
-	GPIO0D6_PMU_DEBUG4      = (3 << GPIO0D6_SHIFT),
-
-	GPIO0D5_SHIFT           = 10,
-	GPIO0D5_MASK            = GENMASK(GPIO0D5_SHIFT + 1, GPIO0D5_SHIFT),
-	GPIO0D5_GPIO            = 0,
-	GPIO0D5_LCDC_VSYNC      = (1 << GPIO0D5_SHIFT),
-	GPIO0D5_TRACE_D15       = (2 << GPIO0D5_SHIFT),
-	GPIO0D5_PMU_DEBUG3      = (3 << GPIO0D5_SHIFT),
-
-	GPIO0D4_SHIFT           = 8,
-	GPIO0D4_MASK            = GENMASK(GPIO0D4_SHIFT + 1, GPIO0D4_SHIFT),
-	GPIO0D4_GPIO            = 0,
-	GPIO0D4_LCDC_HSYNC      = (1 << GPIO0D4_SHIFT),
-	GPIO0D4_TRACE_D14       = (2 << GPIO0D4_SHIFT),
-	GPIO0D4_PMU_DEBUG2      = (3 << GPIO0D4_SHIFT),
-
-	GPIO0D3_SHIFT           = 6,
-	GPIO0D3_MASK            = GENMASK(GPIO0D3_SHIFT + 1, GPIO0D3_SHIFT),
-	GPIO0D3_GPIO            = 0,
-	GPIO0D3_LCDC_D23        = (1 << GPIO0D3_SHIFT),
-	GPIO0D3_TRACE_D13       = (2 << GPIO0D3_SHIFT),
-	GPIO0D3_UART4_SIN       = (3 << GPIO0D3_SHIFT),
-
-	GPIO0D2_SHIFT           = 4,
-	GPIO0D2_MASK            = GENMASK(GPIO0D2_SHIFT + 1, GPIO0D2_SHIFT),
-	GPIO0D2_GPIO            = 0,
-	GPIO0D2_LCDC_D22        = (1 << GPIO0D2_SHIFT),
-	GPIO0D2_TRACE_D12       = (2 << GPIO0D2_SHIFT),
-	GPIO0D2_UART4_SOUT      = (3 << GPIO0D2_SHIFT),
-
-	GPIO0D1_SHIFT           = 2,
-	GPIO0D1_MASK            = GENMASK(GPIO0D1_SHIFT + 1, GPIO0D1_SHIFT),
-	GPIO0D1_GPIO            = 0,
-	GPIO0D1_LCDC_D21        = (1 << GPIO0D1_SHIFT),
-	GPIO0D1_TRACE_D11       = (2 << GPIO0D1_SHIFT),
-	GPIO0D1_UART4_RTSN      = (3 << GPIO0D1_SHIFT),
-
-	GPIO0D0_SHIFT           = 0,
-	GPIO0D0_MASK            = GENMASK(GPIO0D0_SHIFT + 1, GPIO0D0_SHIFT),
-	GPIO0D0_GPIO            = 0,
-	GPIO0D0_LCDC_D20        = (1 << GPIO0D0_SHIFT),
-	GPIO0D0_TRACE_D10       = (2 << GPIO0D0_SHIFT),
-	GPIO0D0_UART4_CTSN      = (3 << GPIO0D0_SHIFT),
-};
-
-/*GRF_GPIO2A_IOMUX*/
-enum {
-	GPIO2A7_SHIFT           = 14,
-	GPIO2A7_MASK            = GENMASK(GPIO2A7_SHIFT + 1, GPIO2A7_SHIFT),
-	GPIO2A7_GPIO            = 0,
-	GPIO2A7_SDMMC0_D2       = (1 << GPIO2A7_SHIFT),
-	GPIO2A7_JTAG_TCK        = (2 << GPIO2A7_SHIFT),
-
-	GPIO2A6_SHIFT           = 12,
-	GPIO2A6_MASK            = GENMASK(GPIO2A6_SHIFT + 1, GPIO2A6_SHIFT),
-	GPIO2A6_GPIO            = 0,
-	GPIO2A6_SDMMC0_D1       = (1 << GPIO2A6_SHIFT),
-	GPIO2A6_UART2_SIN       = (2 << GPIO2A6_SHIFT),
-
-	GPIO2A5_SHIFT           = 10,
-	GPIO2A5_MASK            = GENMASK(GPIO2A5_SHIFT + 1, GPIO2A5_SHIFT),
-	GPIO2A5_GPIO            = 0,
-	GPIO2A5_SDMMC0_D0       = (1 << GPIO2A5_SHIFT),
-	GPIO2A5_UART2_SOUT      = (2 << GPIO2A5_SHIFT),
-
-	GPIO2A4_SHIFT           = 8,
-	GPIO2A4_MASK            = GENMASK(GPIO2A4_SHIFT + 1, GPIO2A4_SHIFT),
-	GPIO2A4_GPIO            = 0,
-	GPIO2A4_FLASH_DQS       = (1 << GPIO2A4_SHIFT),
-	GPIO2A4_EMMC_CLKOUT     = (2 << GPIO2A4_SHIFT),
-
-	GPIO2A3_SHIFT           = 6,
-	GPIO2A3_MASK            = GENMASK(GPIO2A3_SHIFT + 1, GPIO2A3_SHIFT),
-	GPIO2A3_GPIO            = 0,
-	GPIO2A3_FLASH_CSN3      = (1 << GPIO2A3_SHIFT),
-	GPIO2A3_EMMC_RSTNOUT    = (2 << GPIO2A3_SHIFT),
-
-	GPIO2A2_SHIFT           = 4,
-	GPIO2A2_MASK            = GENMASK(GPIO2A2_SHIFT + 1, GPIO2A2_SHIFT),
-	GPIO2A2_GPIO            = 0,
-	GPIO2A2_FLASH_CSN2      = (1 << GPIO2A2_SHIFT),
-
-	GPIO2A1_SHIFT           = 2,
-	GPIO2A1_MASK            = GENMASK(GPIO2A1_SHIFT + 1, GPIO2A1_SHIFT),
-	GPIO2A1_GPIO            = 0,
-	GPIO2A1_FLASH_CSN1      = (1 << GPIO2A1_SHIFT),
-
-	GPIO2A0_SHIFT           = 0,
-	GPIO2A0_MASK            = GENMASK(GPIO2A0_SHIFT + 1, GPIO2A0_SHIFT),
-	GPIO2A0_GPIO            = 0,
-	GPIO2A0_FLASH_CSN0      = (1 << GPIO2A0_SHIFT),
-};
-
-/*GRF_GPIO2B_IOMUX*/
-enum {
-	GPIO2B3_SHIFT           = 6,
-	GPIO2B3_MASK            = GENMASK(GPIO2B3_SHIFT + 1, GPIO2B3_SHIFT),
-	GPIO2B3_GPIO            = 0,
-	GPIO2B3_SDMMC0_DTECTN   = (1 << GPIO2B3_SHIFT),
-
-	GPIO2B2_SHIFT           = 4,
-	GPIO2B2_MASK            = GENMASK(GPIO2B2_SHIFT + 1, GPIO2B2_SHIFT),
-	GPIO2B2_GPIO            = 0,
-	GPIO2B2_SDMMC0_CMD      = (1 << GPIO2B2_SHIFT),
-
-	GPIO2B1_SHIFT           = 2,
-	GPIO2B1_MASK            = GENMASK(GPIO2B1_SHIFT + 1, GPIO2B1_SHIFT),
-	GPIO2B1_GPIO            = 0,
-	GPIO2B1_SDMMC0_CLKOUT   = (1 << GPIO2B1_SHIFT),
-
-	GPIO2B0_SHIFT           = 0,
-	GPIO2B0_MASK            = GENMASK(GPIO2B0_SHIFT + 1, GPIO2B0_SHIFT),
-	GPIO2B0_GPIO            = 0,
-	GPIO2B0_SDMMC0_D3       = (1 << GPIO2B0_SHIFT),
-};
-
-/*GRF_GPIO2D_IOMUX*/
-enum {
-	GPIO2D7_SHIFT           = 14,
-	GPIO2D7_MASK            = GENMASK(GPIO2D7_SHIFT + 1, GPIO2D7_SHIFT),
-	GPIO2D7_GPIO            = 0,
-	GPIO2D7_SDIO0_D3        = (1 << GPIO2D7_SHIFT),
-
-	GPIO2D6_SHIFT           = 12,
-	GPIO2D6_MASK            = GENMASK(GPIO2D6_SHIFT + 1, GPIO2D6_SHIFT),
-	GPIO2D6_GPIO            = 0,
-	GPIO2D6_SDIO0_D2        = (1 << GPIO2D6_SHIFT),
-
-	GPIO2D5_SHIFT           = 10,
-	GPIO2D5_MASK            = GENMASK(GPIO2D5_SHIFT + 1, GPIO2D5_SHIFT),
-	GPIO2D5_GPIO            = 0,
-	GPIO2D5_SDIO0_D1        = (1 << GPIO2D5_SHIFT),
-
-	GPIO2D4_SHIFT           = 8,
-	GPIO2D4_MASK            = GENMASK(GPIO2D4_SHIFT + 1, GPIO2D4_SHIFT),
-	GPIO2D4_GPIO            = 0,
-	GPIO2D4_SDIO0_D0        = (1 << GPIO2D4_SHIFT),
-
-	GPIO2D3_SHIFT           = 6,
-	GPIO2D3_MASK            = GENMASK(GPIO2D3_SHIFT + 1, GPIO2D3_SHIFT),
-	GPIO2D3_GPIO            = 0,
-	GPIO2D3_UART0_RTS0      = (1 << GPIO2D3_SHIFT),
-
-	GPIO2D2_SHIFT           = 4,
-	GPIO2D2_MASK            = GENMASK(GPIO2D2_SHIFT + 1, GPIO2D2_SHIFT),
-	GPIO2D2_GPIO            = 0,
-	GPIO2D2_UART0_CTS0      = (1 << GPIO2D2_SHIFT),
-
-	GPIO2D1_SHIFT           = 2,
-	GPIO2D1_MASK            = GENMASK(GPIO2D1_SHIFT + 1, GPIO2D1_SHIFT),
-	GPIO2D1_GPIO            = 0,
-	GPIO2D1_UART0_SOUT      = (1 << GPIO2D1_SHIFT),
-
-	GPIO2D0_SHIFT           = 0,
-	GPIO2D0_MASK            = GENMASK(GPIO2D0_SHIFT + 1, GPIO2D0_SHIFT),
-	GPIO2D0_GPIO            = 0,
-	GPIO2D0_UART0_SIN       = (1 << GPIO2D0_SHIFT),
-};
-
-/* GRF_GPIO1B_IOMUX */
-enum {
-	GPIO1B7_SHIFT           = 14,
-	GPIO1B7_MASK            = GENMASK(GPIO1B7_SHIFT + 1, GPIO1B7_SHIFT),
-	GPIO1B7_GPIO            = 0,
-	GPIO1B7_SPI1_CSN0       = (2 << GPIO1B7_SHIFT),
-
-	GPIO1B6_SHIFT           = 12,
-	GPIO1B6_MASK            = GENMASK(GPIO1B6_SHIFT + 1, GPIO1B6_SHIFT),
-	GPIO1B6_GPIO            = 0,
-	GPIO1B6_SPI1_CLK        = (2 << GPIO1B6_SHIFT),
-};
-
-/* GRF_GPIO1C_IOMUX */
-enum {
-	GPIO1C7_SHIFT           = 14,
-	GPIO1C7_MASK            = GENMASK(GPIO1C7_SHIFT + 1, GPIO1C7_SHIFT),
-	GPIO1C7_GPIO            = 0,
-	GPIO1C7_EMMC_DATA5      = (2 << GPIO1C7_SHIFT),
-	GPIO1C7_SPI0_TXD        = (3 << GPIO1C7_SHIFT),
-
-	GPIO1C6_SHIFT           = 12,
-	GPIO1C6_MASK            = GENMASK(GPIO1C6_SHIFT + 1, GPIO1C6_SHIFT),
-	GPIO1C6_GPIO            = 0,
-	GPIO1C6_EMMC_DATA4      = (2 << GPIO1C6_SHIFT),
-	GPIO1C6_SPI0_RXD        = (3 << GPIO1C6_SHIFT),
-
-	GPIO1C5_SHIFT           = 10,
-	GPIO1C5_MASK            = GENMASK(GPIO1C5_SHIFT + 1, GPIO1C5_SHIFT),
-	GPIO1C5_GPIO            = 0,
-	GPIO1C5_EMMC_DATA3      = (2 << GPIO1C5_SHIFT),
-
-	GPIO1C4_SHIFT           = 8,
-	GPIO1C4_MASK            = GENMASK(GPIO1C4_SHIFT + 1, GPIO1C4_SHIFT),
-	GPIO1C4_GPIO            = 0,
-	GPIO1C4_EMMC_DATA2      = (2 << GPIO1C4_SHIFT),
-
-	GPIO1C3_SHIFT           = 6,
-	GPIO1C3_MASK            = GENMASK(GPIO1C3_SHIFT + 1, GPIO1C3_SHIFT),
-	GPIO1C3_GPIO            = 0,
-	GPIO1C3_EMMC_DATA1      = (2 << GPIO1C3_SHIFT),
-
-	GPIO1C2_SHIFT           = 4,
-	GPIO1C2_MASK            = GENMASK(GPIO1C2_SHIFT + 1, GPIO1C2_SHIFT),
-	GPIO1C2_GPIO            = 0,
-	GPIO1C2_EMMC_DATA0      = (2 << GPIO1C2_SHIFT),
-
-	GPIO1C1_SHIFT           = 2,
-	GPIO1C1_MASK            = GENMASK(GPIO1C1_SHIFT + 1, GPIO1C1_SHIFT),
-	GPIO1C1_GPIO            = 0,
-	GPIO1C1_SPI1_RXD        = (2 << GPIO1C1_SHIFT),
-
-	GPIO1C0_SHIFT           = 0,
-	GPIO1C0_MASK            = GENMASK(GPIO1C0_SHIFT + 1, GPIO1C0_SHIFT),
-	GPIO1C0_GPIO            = 0,
-	GPIO1C0_SPI1_TXD        = (2 << GPIO1C0_SHIFT),
-};
-
-/* GRF_GPIO1D_IOMUX*/
-enum {
-	GPIO1D5_SHIFT           = 10,
-	GPIO1D5_MASK            = GENMASK(GPIO1D5_SHIFT + 1, GPIO1D5_SHIFT),
-	GPIO1D5_GPIO            = 0,
-	GPIO1D5_SPI0_CLK        = (2 << GPIO1D5_SHIFT),
-
-	GPIO1D3_SHIFT           = 6,
-	GPIO1D3_MASK            = GENMASK(GPIO1D3_SHIFT + 1, GPIO1D3_SHIFT),
-	GPIO1D3_GPIO            = 0,
-	GPIO1D3_EMMC_PWREN      = (2 << GPIO1D3_SHIFT),
-
-	GPIO1D2_SHIFT           = 4,
-	GPIO1D2_MASK            = GENMASK(GPIO1D2_SHIFT + 1, GPIO1D2_SHIFT),
-	GPIO1D2_GPIO            = 0,
-	GPIO1D2_EMMC_CMD        = (2 << GPIO1D2_SHIFT),
-
-	GPIO1D1_SHIFT           = 2,
-	GPIO1D1_MASK            = GENMASK(GPIO1D1_SHIFT + 1, GPIO1D1_SHIFT),
-	GPIO1D1_GPIO            = 0,
-	GPIO1D1_EMMC_DATA7      = (2 << GPIO1D1_SHIFT),
-	GPIO1D1_SPI0_CSN1       = (3 << GPIO1D1_SHIFT),
-
-	GPIO1D0_SHIFT           = 0,
-	GPIO1D0_MASK            = GENMASK(GPIO1D0_SHIFT + 1, GPIO1D0_SHIFT),
-	GPIO1D0_GPIO            = 0,
-	GPIO1D0_EMMC_DATA6      = (2 << GPIO1D0_SHIFT),
-	GPIO1D0_SPI0_CSN0       = (3 << GPIO1D0_SHIFT),
-};
-
-
-/*GRF_GPIO3B_IOMUX*/
-enum {
-	GPIO3B7_SHIFT           = 14,
-	GPIO3B7_MASK            = GENMASK(GPIO3B7_SHIFT + 1, GPIO3B7_SHIFT),
-	GPIO3B7_GPIO            = 0,
-	GPIO3B7_MAC_RXD0        = (1 << GPIO3B7_SHIFT),
-
-	GPIO3B6_SHIFT           = 12,
-	GPIO3B6_MASK            = GENMASK(GPIO3B6_SHIFT + 1, GPIO3B6_SHIFT),
-	GPIO3B6_GPIO            = 0,
-	GPIO3B6_MAC_TXD3        = (1 << GPIO3B6_SHIFT),
-
-	GPIO3B5_SHIFT           = 10,
-	GPIO3B5_MASK            = GENMASK(GPIO3B5_SHIFT + 1, GPIO3B5_SHIFT),
-	GPIO3B5_GPIO            = 0,
-	GPIO3B5_MAC_TXEN        = (1 << GPIO3B5_SHIFT),
-
-	GPIO3B4_SHIFT           = 8,
-	GPIO3B4_MASK            = GENMASK(GPIO3B4_SHIFT + 1, GPIO3B4_SHIFT),
-	GPIO3B4_GPIO            = 0,
-	GPIO3B4_MAC_COL         = (1 << GPIO3B4_SHIFT),
-
-	GPIO3B3_SHIFT           = 6,
-	GPIO3B3_MASK            = GENMASK(GPIO3B3_SHIFT + 1, GPIO3B3_SHIFT),
-	GPIO3B3_GPIO            = 0,
-	GPIO3B3_MAC_CRS         = (1 << GPIO3B3_SHIFT),
-
-	GPIO3B2_SHIFT           = 4,
-	GPIO3B2_MASK            = GENMASK(GPIO3B2_SHIFT + 1, GPIO3B2_SHIFT),
-	GPIO3B2_GPIO            = 0,
-	GPIO3B2_MAC_TXD2        = (1 << GPIO3B2_SHIFT),
-
-	GPIO3B1_SHIFT           = 2,
-	GPIO3B1_MASK            = GENMASK(GPIO3B1_SHIFT + 1, GPIO3B1_SHIFT),
-	GPIO3B1_GPIO            = 0,
-	GPIO3B1_MAC_TXD1        = (1 << GPIO3B1_SHIFT),
-
-	GPIO3B0_SHIFT           = 0,
-	GPIO3B0_MASK            = GENMASK(GPIO3B0_SHIFT + 1, GPIO3B0_SHIFT),
-	GPIO3B0_GPIO            = 0,
-	GPIO3B0_MAC_TXD0        = (1 << GPIO3B0_SHIFT),
-	GPIO3B0_PWM0            = (2 << GPIO3B0_SHIFT),
-};
-
-/*GRF_GPIO3C_IOMUX*/
-enum {
-	GPIO3C6_SHIFT           = 12,
-	GPIO3C6_MASK            = GENMASK(GPIO3C6_SHIFT + 1, GPIO3C6_SHIFT),
-	GPIO3C6_GPIO            = 0,
-	GPIO3C6_MAC_CLK         = (1 << GPIO3C6_SHIFT),
-
-	GPIO3C5_SHIFT           = 10,
-	GPIO3C5_MASK            = GENMASK(GPIO3C5_SHIFT + 1, GPIO3C5_SHIFT),
-	GPIO3C5_GPIO            = 0,
-	GPIO3C5_MAC_RXEN        = (1 << GPIO3C5_SHIFT),
-
-	GPIO3C4_SHIFT           = 8,
-	GPIO3C4_MASK            = GENMASK(GPIO3C4_SHIFT + 1, GPIO3C4_SHIFT),
-	GPIO3C4_GPIO            = 0,
-	GPIO3C4_MAC_RXDV        = (1 << GPIO3C4_SHIFT),
-
-	GPIO3C3_SHIFT           = 6,
-	GPIO3C3_MASK            = GENMASK(GPIO3C3_SHIFT + 1, GPIO3C3_SHIFT),
-	GPIO3C3_GPIO            = 0,
-	GPIO3C3_MAC_MDC         = (1 << GPIO3C3_SHIFT),
-
-	GPIO3C2_SHIFT           = 4,
-	GPIO3C2_MASK            = GENMASK(GPIO3C2_SHIFT + 1, GPIO3C2_SHIFT),
-	GPIO3C2_GPIO            = 0,
-	GPIO3C2_MAC_RXD3        = (1 << GPIO3C2_SHIFT),
-
-	GPIO3C1_SHIFT           = 2,
-	GPIO3C1_MASK            = GENMASK(GPIO3C1_SHIFT + 1, GPIO3C1_SHIFT),
-	GPIO3C1_GPIO            = 0,
-	GPIO3C1_MAC_RXD2        = (1 << GPIO3C1_SHIFT),
-
-	GPIO3C0_SHIFT           = 0,
-	GPIO3C0_MASK            = GENMASK(GPIO3C0_SHIFT + 1, GPIO3C0_SHIFT),
-	GPIO3C0_GPIO            = 0,
-	GPIO3C0_MAC_RXD1        = (1 << GPIO3C0_SHIFT),
-};
-
-/*GRF_GPIO3D_IOMUX*/
-enum {
-	GPIO3D4_SHIFT           = 8,
-	GPIO3D4_MASK            = GENMASK(GPIO3D4_SHIFT + 1, GPIO3D4_SHIFT),
-	GPIO3D4_GPIO            = 0,
-	GPIO3D4_MAC_TXCLK       = (1 << GPIO3D4_SHIFT),
-	GPIO3D4_SPI1_CNS1       = (2 << GPIO3D4_SHIFT),
-
-	GPIO3D1_SHIFT           = 2,
-	GPIO3D1_MASK            = GENMASK(GPIO3D1_SHIFT + 1, GPIO3D1_SHIFT),
-	GPIO3D1_GPIO            = 0,
-	GPIO3D1_MAC_RXCLK       = (1 << GPIO3D1_SHIFT),
-
-	GPIO3D0_SHIFT           = 0,
-	GPIO3D0_MASK            = GENMASK(GPIO3D0_SHIFT + 1, GPIO3D0_SHIFT),
-	GPIO3D0_GPIO            = 0,
-	GPIO3D0_MAC_MDIO        = (1 << GPIO3D0_SHIFT),
-};
-
-struct rk3368_pinctrl_priv {
-	struct rk3368_grf *grf;
-	struct rk3368_pmu_grf *pmugrf;
-};
-
-static void pinctrl_rk3368_uart_config(struct rk3368_pinctrl_priv *priv,
-				       int uart_id)
-{
-	struct rk3368_grf *grf = priv->grf;
-	struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
-
-	switch (uart_id) {
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A6_MASK | GPIO2A5_MASK,
-			     GPIO2A6_UART2_SIN | GPIO2A5_UART2_SOUT);
-		break;
-	case PERIPH_ID_UART0:
-		break;
-	case PERIPH_ID_UART1:
-		break;
-	case PERIPH_ID_UART3:
-		break;
-	case PERIPH_ID_UART4:
-		rk_clrsetreg(&pmugrf->gpio0d_iomux,
-			     GPIO0D0_MASK | GPIO0D1_MASK |
-			     GPIO0D2_MASK | GPIO0D3_MASK,
-			     GPIO0D0_GPIO | GPIO0D1_GPIO |
-			     GPIO0D2_UART4_SOUT | GPIO0D3_UART4_SIN);
-		break;
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3368_spi_config(struct rk3368_pinctrl_priv *priv,
-				      int spi_id)
-{
-	struct rk3368_grf *grf = priv->grf;
-	struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
-
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		/*
-		 * eMMC can only be connected with 4 bits, when SPI0 is used.
-		 * This is all-or-nothing, so we assume that if someone asks us
-		 * to configure SPI0, that their eMMC interface is unused or
-		 * configured appropriately.
-		 */
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D0_MASK | GPIO1D1_MASK |
-			     GPIO1D5_MASK,
-			     GPIO1D0_SPI0_CSN0 | GPIO1D1_SPI0_CSN1 |
-			     GPIO1D5_SPI0_CLK);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C6_MASK | GPIO1C7_MASK,
-			     GPIO1C6_SPI0_RXD | GPIO1C7_SPI0_TXD);
-		break;
-	case PERIPH_ID_SPI1:
-		/*
-		 * We don't implement support for configuring SPI1_CSN#1, as it
-		 * conflicts with the GMAC (MAC TX clk-out).
-		 */
-		rk_clrsetreg(&grf->gpio1b_iomux,
-			     GPIO1B6_MASK | GPIO1B7_MASK,
-			     GPIO1B6_SPI1_CLK | GPIO1B7_SPI1_CSN0);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C0_MASK | GPIO1C1_MASK,
-			     GPIO1C0_SPI1_TXD | GPIO1C1_SPI1_RXD);
-		break;
-	case PERIPH_ID_SPI2:
-		rk_clrsetreg(&pmugrf->gpio0b_iomux,
-			     GPIO0B2_MASK | GPIO0B3_MASK |
-			     GPIO0B4_MASK | GPIO0B5_MASK,
-			     GPIO0B2_SPI2_RXD | GPIO0B3_SPI2_TXD |
-			     GPIO0B4_SPI2_CLK | GPIO0B5_SPI2_CSN0);
-		break;
-	default:
-		debug("%s: spi id = %d iomux error!\n", __func__, spi_id);
-		break;
-	}
-}
-
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-static void pinctrl_rk3368_gmac_config(struct rk3368_grf *grf, int gmac_id)
-{
-	rk_clrsetreg(&grf->gpio3b_iomux,
-		     GPIO3B0_MASK | GPIO3B1_MASK |
-		     GPIO3B2_MASK | GPIO3B5_MASK |
-		     GPIO3B6_MASK | GPIO3B7_MASK,
-		     GPIO3B0_MAC_TXD0 | GPIO3B1_MAC_TXD1 |
-		     GPIO3B2_MAC_TXD2 | GPIO3B5_MAC_TXEN |
-		     GPIO3B6_MAC_TXD3 | GPIO3B7_MAC_RXD0);
-	rk_clrsetreg(&grf->gpio3c_iomux,
-		     GPIO3C0_MASK | GPIO3C1_MASK |
-		     GPIO3C2_MASK | GPIO3C3_MASK |
-		     GPIO3C4_MASK | GPIO3C5_MASK |
-		     GPIO3C6_MASK,
-		     GPIO3C0_MAC_RXD1 | GPIO3C1_MAC_RXD2 |
-		     GPIO3C2_MAC_RXD3 | GPIO3C3_MAC_MDC |
-		     GPIO3C4_MAC_RXDV | GPIO3C5_MAC_RXEN |
-		     GPIO3C6_MAC_CLK);
-	rk_clrsetreg(&grf->gpio3d_iomux,
-		     GPIO3D0_MASK | GPIO3D1_MASK |
-		     GPIO3D4_MASK,
-		     GPIO3D0_MAC_MDIO | GPIO3D1_MAC_RXCLK |
-		     GPIO3D4_MAC_TXCLK);
-}
-#endif
-
-static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		debug("mmc id = %d setting registers!\n", mmc_id);
-		rk_clrsetreg(&grf->gpio1c_iomux,
-			     GPIO1C2_MASK | GPIO1C3_MASK |
-			     GPIO1C4_MASK | GPIO1C5_MASK |
-			     GPIO1C6_MASK | GPIO1C7_MASK,
-			     GPIO1C2_EMMC_DATA0 |
-			     GPIO1C3_EMMC_DATA1 |
-			     GPIO1C4_EMMC_DATA2 |
-			     GPIO1C5_EMMC_DATA3 |
-			     GPIO1C6_EMMC_DATA4 |
-			     GPIO1C7_EMMC_DATA5);
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D0_MASK | GPIO1D1_MASK |
-			     GPIO1D2_MASK | GPIO1D3_MASK,
-			     GPIO1D0_EMMC_DATA6 |
-			     GPIO1D1_EMMC_DATA7 |
-			     GPIO1D2_EMMC_CMD |
-			     GPIO1D3_EMMC_PWREN);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A3_MASK | GPIO2A4_MASK,
-			     GPIO2A3_EMMC_RSTNOUT |
-			     GPIO2A4_EMMC_CLKOUT);
-		break;
-	case PERIPH_ID_SDCARD:
-		debug("mmc id = %d setting registers!\n", mmc_id);
-		rk_clrsetreg(&grf->gpio2a_iomux,
-			     GPIO2A5_MASK | GPIO2A7_MASK |
-			     GPIO2A7_MASK,
-			     GPIO2A5_SDMMC0_D0 | GPIO2A6_SDMMC0_D1 |
-			     GPIO2A7_SDMMC0_D2);
-		rk_clrsetreg(&grf->gpio2b_iomux,
-			     GPIO2B0_MASK | GPIO2B1_MASK |
-			     GPIO2B2_MASK | GPIO2B3_MASK,
-			     GPIO2B0_SDMMC0_D3 | GPIO2B1_SDMMC0_CLKOUT |
-			     GPIO2B2_SDMMC0_CMD | GPIO2B3_SDMMC0_DTECTN);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-static int rk3368_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%d, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3368_uart_config(priv, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-		pinctrl_rk3368_spi_config(priv, func);
-		break;
-	case PERIPH_ID_EMMC:
-	case PERIPH_ID_SDCARD:
-		pinctrl_rk3368_sdmmc_config(priv->grf, func);
-		break;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case PERIPH_ID_GMAC:
-		pinctrl_rk3368_gmac_config(priv->grf, func);
-		break;
-#endif
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3368_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 59:
-		return PERIPH_ID_UART4;
-	case 58:
-		return PERIPH_ID_UART3;
-	case 57:
-		return PERIPH_ID_UART2;
-	case 56:
-		return PERIPH_ID_UART1;
-	case 55:
-		return PERIPH_ID_UART0;
-	case 44:
-		return PERIPH_ID_SPI0;
-	case 45:
-		return PERIPH_ID_SPI1;
-	case 41:
-		return PERIPH_ID_SPI2;
-	case 35:
-		return PERIPH_ID_EMMC;
-	case 32:
-		return PERIPH_ID_SDCARD;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case 27:
-		return PERIPH_ID_GMAC;
-#endif
-	}
-
-	return -ENOENT;
-}
-
-static int rk3368_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3368_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rk3368_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3368_pinctrl_ops = {
-	.set_state_simple	= rk3368_pinctrl_set_state_simple,
-	.request	= rk3368_pinctrl_request,
-	.get_periph_id	= rk3368_pinctrl_get_periph_id,
-};
-
-static int rk3368_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-	debug("%s: grf=%p pmugrf:%p\n", __func__, priv->grf, priv->pmugrf);
-
-	return ret;
-}
-
-static const struct udevice_id rk3368_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3368-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3368) = {
-	.name		= "rockchip_rk3368_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3368_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3368_pinctrl_priv),
-	.ops		= &rk3368_pinctrl_ops,
-	.bind		= dm_scan_fdt_dev,
-	.probe		= rk3368_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
deleted file mode 100644
index 19b81e744d..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ /dev/null
@@ -1,458 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/grf_rk3399.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/clock.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rk3399_pinctrl_priv {
-	struct rk3399_grf_regs *grf;
-	struct rk3399_pmugrf_regs *pmugrf;
-};
-
-static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf,
-		struct rk3399_pmugrf_regs *pmugrf, int pwm_id)
-{
-	switch (pwm_id) {
-	case PERIPH_ID_PWM0:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C2_SEL_MASK,
-			     GRF_PWM_0 << GRF_GPIO4C2_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM1:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C6_SEL_MASK,
-			     GRF_PWM_1 << GRF_GPIO4C6_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM2:
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C3_SEL_MASK,
-			     PMUGRF_PWM_2 << PMUGRF_GPIO1C3_SEL_SHIFT);
-		break;
-	case PERIPH_ID_PWM3:
-		if (readl(&pmugrf->soc_con0) & (1 << 5))
-			rk_clrsetreg(&pmugrf->gpio1b_iomux,
-				     PMUGRF_GPIO1B6_SEL_MASK,
-				     PMUGRF_PWM_3B << PMUGRF_GPIO1B6_SEL_SHIFT);
-		else
-			rk_clrsetreg(&pmugrf->gpio0a_iomux,
-				     PMUGRF_GPIO0A6_SEL_MASK,
-				     PMUGRF_PWM_3A << PMUGRF_GPIO0A6_SEL_SHIFT);
-		break;
-	default:
-		debug("pwm id = %d iomux error!\n", pwm_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf,
-				      struct rk3399_pmugrf_regs *pmugrf,
-				      int i2c_id)
-{
-	switch (i2c_id) {
-	case PERIPH_ID_I2C0:
-		rk_clrsetreg(&pmugrf->gpio1b_iomux,
-			     PMUGRF_GPIO1B7_SEL_MASK,
-			     PMUGRF_I2C0PMU_SDA << PMUGRF_GPIO1B7_SEL_SHIFT);
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C0_SEL_MASK,
-			     PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C8:
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C4_SEL_MASK,
-			     PMUGRF_I2C8PMU_SDA << PMUGRF_GPIO1C4_SEL_SHIFT);
-		rk_clrsetreg(&pmugrf->gpio1c_iomux,
-			     PMUGRF_GPIO1C5_SEL_MASK,
-			     PMUGRF_I2C8PMU_SCL << PMUGRF_GPIO1C5_SEL_SHIFT);
-		break;
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-	case PERIPH_ID_I2C6:
-	case PERIPH_ID_I2C7:
-	default:
-		debug("i2c id = %d iomux error!\n", i2c_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3399_lcdc_config(struct rk3399_grf_regs *grf, int lcd_id)
-{
-	switch (lcd_id) {
-	case PERIPH_ID_LCDC0:
-		break;
-	default:
-		debug("lcdc id = %d iomux error!\n", lcd_id);
-		break;
-	}
-}
-
-static int pinctrl_rk3399_spi_config(struct rk3399_grf_regs *grf,
-				     struct rk3399_pmugrf_regs *pmugrf,
-				     enum periph_id spi_id, int cs)
-{
-	switch (spi_id) {
-	case PERIPH_ID_SPI0:
-		switch (cs) {
-		case 0:
-			rk_clrsetreg(&grf->gpio3a_iomux,
-				     GRF_GPIO3A7_SEL_MASK,
-				     GRF_SPI0NORCODEC_CSN0
-				     << GRF_GPIO3A7_SEL_SHIFT);
-			break;
-		case 1:
-			rk_clrsetreg(&grf->gpio3b_iomux,
-				     GRF_GPIO3B0_SEL_MASK,
-				     GRF_SPI0NORCODEC_CSN1
-				     << GRF_GPIO3B0_SEL_SHIFT);
-			break;
-		default:
-			goto err;
-		}
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GRF_GPIO3A4_SEL_MASK | GRF_GPIO3A5_SEL_SHIFT
-			     | GRF_GPIO3A6_SEL_SHIFT,
-			     GRF_SPI0NORCODEC_RXD << GRF_GPIO3A4_SEL_SHIFT
-			     | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A5_SEL_SHIFT
-			     | GRF_SPI0NORCODEC_RXD << GRF_GPIO3A6_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SPI1:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&pmugrf->gpio1a_iomux,
-			     PMUGRF_GPIO1A7_SEL_MASK,
-			     PMUGRF_SPI1EC_RXD << PMUGRF_GPIO1A7_SEL_SHIFT);
-		rk_clrsetreg(&pmugrf->gpio1b_iomux,
-			     PMUGRF_GPIO1B0_SEL_MASK | PMUGRF_GPIO1B1_SEL_MASK
-			     | PMUGRF_GPIO1B2_SEL_MASK,
-			     PMUGRF_SPI1EC_TXD << PMUGRF_GPIO1B0_SEL_SHIFT
-			     | PMUGRF_SPI1EC_CLK << PMUGRF_GPIO1B1_SEL_SHIFT
-			     | PMUGRF_SPI1EC_CSN0 << PMUGRF_GPIO1B2_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SPI2:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&grf->gpio2b_iomux,
-			     GRF_GPIO2B1_SEL_MASK | GRF_GPIO2B2_SEL_MASK
-			     | GRF_GPIO2B3_SEL_MASK | GRF_GPIO2B4_SEL_MASK,
-			     GRF_SPI2TPM_RXD << GRF_GPIO2B1_SEL_SHIFT
-			     | GRF_SPI2TPM_TXD << GRF_GPIO2B2_SEL_SHIFT
-			     | GRF_SPI2TPM_CLK << GRF_GPIO2B3_SEL_SHIFT
-			     | GRF_SPI2TPM_CSN0 << GRF_GPIO2B4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_SPI5:
-		if (cs != 0)
-			goto err;
-		rk_clrsetreg(&grf->gpio2c_iomux,
-			     GRF_GPIO2C4_SEL_MASK | GRF_GPIO2C5_SEL_MASK
-			     | GRF_GPIO2C6_SEL_MASK | GRF_GPIO2C7_SEL_MASK,
-			     GRF_SPI5EXPPLUS_RXD << GRF_GPIO2C4_SEL_SHIFT
-			     | GRF_SPI5EXPPLUS_TXD << GRF_GPIO2C5_SEL_SHIFT
-			     | GRF_SPI5EXPPLUS_CLK << GRF_GPIO2C6_SEL_SHIFT
-			     | GRF_SPI5EXPPLUS_CSN0 << GRF_GPIO2C7_SEL_SHIFT);
-		break;
-	default:
-		printf("%s: spi_id %d is not supported.\n", __func__, spi_id);
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("rkspi: periph%d cs=%d not supported", spi_id, cs);
-	return -ENOENT;
-}
-
-static void pinctrl_rk3399_uart_config(struct rk3399_grf_regs *grf,
-				       struct rk3399_pmugrf_regs *pmugrf,
-				       int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART2:
-		/* Using channel-C by default */
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C3_SEL_MASK,
-			     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C4_SEL_MASK,
-			     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-	default:
-		debug("uart id = %d iomux error!\n", uart_id);
-		break;
-	}
-}
-
-static void pinctrl_rk3399_sdmmc_config(struct rk3399_grf_regs *grf, int mmc_id)
-{
-	switch (mmc_id) {
-	case PERIPH_ID_EMMC:
-		break;
-	case PERIPH_ID_SDCARD:
-		rk_clrsetreg(&grf->gpio4b_iomux,
-			     GRF_GPIO4B0_SEL_MASK | GRF_GPIO4B1_SEL_MASK
-			     | GRF_GPIO4B2_SEL_MASK | GRF_GPIO4B3_SEL_MASK
-			     | GRF_GPIO4B4_SEL_MASK | GRF_GPIO4B5_SEL_MASK,
-			     GRF_SDMMC_DATA0 << GRF_GPIO4B0_SEL_SHIFT
-			     | GRF_SDMMC_DATA1 << GRF_GPIO4B1_SEL_SHIFT
-			     | GRF_SDMMC_DATA2 << GRF_GPIO4B2_SEL_SHIFT
-			     | GRF_SDMMC_DATA3 << GRF_GPIO4B3_SEL_SHIFT
-			     | GRF_SDMMC_CLKOUT << GRF_GPIO4B4_SEL_SHIFT
-			     | GRF_SDMMC_CMD << GRF_GPIO4B5_SEL_SHIFT);
-		break;
-	default:
-		debug("mmc id = %d iomux error!\n", mmc_id);
-		break;
-	}
-}
-
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-static void pinctrl_rk3399_gmac_config(struct rk3399_grf_regs *grf, int mmc_id)
-{
-	rk_clrsetreg(&grf->gpio3a_iomux,
-		     GRF_GPIO3A0_SEL_MASK | GRF_GPIO3A1_SEL_MASK |
-		     GRF_GPIO3A2_SEL_MASK | GRF_GPIO3A3_SEL_MASK |
-		     GRF_GPIO3A4_SEL_MASK | GRF_GPIO3A5_SEL_MASK |
-		     GRF_GPIO3A6_SEL_MASK | GRF_GPIO3A7_SEL_MASK,
-		     GRF_MAC_TXD2 << GRF_GPIO3A0_SEL_SHIFT |
-		     GRF_MAC_TXD3 << GRF_GPIO3A1_SEL_SHIFT |
-		     GRF_MAC_RXD2 << GRF_GPIO3A2_SEL_SHIFT |
-		     GRF_MAC_RXD3 << GRF_GPIO3A3_SEL_SHIFT |
-		     GRF_MAC_TXD0 << GRF_GPIO3A4_SEL_SHIFT |
-		     GRF_MAC_TXD1 << GRF_GPIO3A5_SEL_SHIFT |
-		     GRF_MAC_RXD0 << GRF_GPIO3A6_SEL_SHIFT |
-		     GRF_MAC_RXD1 << GRF_GPIO3A7_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio3b_iomux,
-		     GRF_GPIO3B0_SEL_MASK | GRF_GPIO3B1_SEL_MASK |
-					    GRF_GPIO3B3_SEL_MASK |
-		     GRF_GPIO3B4_SEL_MASK | GRF_GPIO3B5_SEL_MASK |
-		     GRF_GPIO3B6_SEL_MASK,
-		     GRF_MAC_MDC << GRF_GPIO3B0_SEL_SHIFT |
-		     GRF_MAC_RXDV << GRF_GPIO3B1_SEL_SHIFT |
-		     GRF_MAC_CLK << GRF_GPIO3B3_SEL_SHIFT |
-		     GRF_MAC_TXEN << GRF_GPIO3B4_SEL_SHIFT |
-		     GRF_MAC_MDIO << GRF_GPIO3B5_SEL_SHIFT |
-		     GRF_MAC_RXCLK << GRF_GPIO3B6_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio3c_iomux,
-		     GRF_GPIO3C1_SEL_MASK,
-		     GRF_MAC_TXCLK << GRF_GPIO3C1_SEL_SHIFT);
-
-	/* Set drive strength for GMAC tx io, value 3 means 13mA */
-	rk_clrsetreg(&grf->gpio3_e[0],
-		     GRF_GPIO3A0_E_MASK | GRF_GPIO3A1_E_MASK |
-		     GRF_GPIO3A4_E_MASK | GRF_GPIO3A5_E0_MASK,
-		     3 << GRF_GPIO3A0_E_SHIFT |
-		     3 << GRF_GPIO3A1_E_SHIFT |
-		     3 << GRF_GPIO3A4_E_SHIFT |
-		     1 << GRF_GPIO3A5_E0_SHIFT);
-	rk_clrsetreg(&grf->gpio3_e[1],
-		     GRF_GPIO3A5_E12_MASK,
-		     1 << GRF_GPIO3A5_E12_SHIFT);
-	rk_clrsetreg(&grf->gpio3_e[2],
-		     GRF_GPIO3B4_E_MASK,
-		     3 << GRF_GPIO3B4_E_SHIFT);
-	rk_clrsetreg(&grf->gpio3_e[4],
-		     GRF_GPIO3C1_E_MASK,
-		     3 << GRF_GPIO3C1_E_SHIFT);
-}
-#endif
-
-#if !defined(CONFIG_SPL_BUILD)
-static void pinctrl_rk3399_hdmi_config(struct rk3399_grf_regs *grf, int hdmi_id)
-{
-	switch (hdmi_id) {
-	case PERIPH_ID_HDMI:
-		rk_clrsetreg(&grf->gpio4c_iomux,
-			     GRF_GPIO4C0_SEL_MASK | GRF_GPIO4C1_SEL_MASK,
-			     (GRF_HDMII2C_SCL << GRF_GPIO4C0_SEL_SHIFT) |
-			     (GRF_HDMII2C_SDA << GRF_GPIO4C1_SEL_SHIFT));
-		break;
-	default:
-		debug("%s: hdmi_id = %d unsupported\n", __func__, hdmi_id);
-		break;
-	}
-}
-#endif
-
-static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rk3399_pinctrl_priv *priv = dev_get_priv(dev);
-
-	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
-	switch (func) {
-	case PERIPH_ID_PWM0:
-	case PERIPH_ID_PWM1:
-	case PERIPH_ID_PWM2:
-	case PERIPH_ID_PWM3:
-	case PERIPH_ID_PWM4:
-		pinctrl_rk3399_pwm_config(priv->grf, priv->pmugrf, func);
-		break;
-	case PERIPH_ID_I2C0:
-	case PERIPH_ID_I2C1:
-	case PERIPH_ID_I2C2:
-	case PERIPH_ID_I2C3:
-	case PERIPH_ID_I2C4:
-	case PERIPH_ID_I2C5:
-	case PERIPH_ID_I2C6:
-	case PERIPH_ID_I2C7:
-	case PERIPH_ID_I2C8:
-		pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func);
-		break;
-	case PERIPH_ID_SPI0:
-	case PERIPH_ID_SPI1:
-	case PERIPH_ID_SPI2:
-	case PERIPH_ID_SPI3:
-	case PERIPH_ID_SPI4:
-	case PERIPH_ID_SPI5:
-		pinctrl_rk3399_spi_config(priv->grf, priv->pmugrf, func, flags);
-		break;
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-	case PERIPH_ID_UART3:
-	case PERIPH_ID_UART4:
-		pinctrl_rk3399_uart_config(priv->grf, priv->pmugrf, func);
-		break;
-	case PERIPH_ID_LCDC0:
-	case PERIPH_ID_LCDC1:
-		pinctrl_rk3399_lcdc_config(priv->grf, func);
-		break;
-	case PERIPH_ID_SDMMC0:
-	case PERIPH_ID_SDMMC1:
-		pinctrl_rk3399_sdmmc_config(priv->grf, func);
-		break;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case PERIPH_ID_GMAC:
-		pinctrl_rk3399_gmac_config(priv->grf, func);
-		break;
-#endif
-#if !defined(CONFIG_SPL_BUILD)
-	case PERIPH_ID_HDMI:
-		pinctrl_rk3399_hdmi_config(priv->grf, func);
-		break;
-#endif
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 68:
-		return PERIPH_ID_SPI0;
-	case 53:
-		return PERIPH_ID_SPI1;
-	case 52:
-		return PERIPH_ID_SPI2;
-	case 132:
-		return PERIPH_ID_SPI5;
-	case 57:
-		return PERIPH_ID_I2C0;
-	case 59: /* Note strange order */
-		return PERIPH_ID_I2C1;
-	case 35:
-		return PERIPH_ID_I2C2;
-	case 34:
-		return PERIPH_ID_I2C3;
-	case 56:
-		return PERIPH_ID_I2C4;
-	case 38:
-		return PERIPH_ID_I2C5;
-	case 37:
-		return PERIPH_ID_I2C6;
-	case 36:
-		return PERIPH_ID_I2C7;
-	case 58:
-		return PERIPH_ID_I2C8;
-	case 65:
-		return PERIPH_ID_SDMMC1;
-#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
-	case 12:
-		return PERIPH_ID_GMAC;
-#endif
-#if !defined(CONFIG_SPL_BUILD)
-	case 23:
-		return PERIPH_ID_HDMI;
-#endif
-	}
-#endif
-	return -ENOENT;
-}
-
-static int rk3399_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rk3399_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rk3399_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rk3399_pinctrl_ops = {
-	.set_state_simple	= rk3399_pinctrl_set_state_simple,
-	.request	= rk3399_pinctrl_request,
-	.get_periph_id	= rk3399_pinctrl_get_periph_id,
-};
-
-static int rk3399_pinctrl_probe(struct udevice *dev)
-{
-	struct rk3399_pinctrl_priv *priv = dev_get_priv(dev);
-	int ret = 0;
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf);
-
-	return ret;
-}
-
-static const struct udevice_id rk3399_pinctrl_ids[] = {
-	{ .compatible = "rockchip,rk3399-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rk3399) = {
-	.name		= "rockchip_rk3399_pinctrl",
-	.id		= UCLASS_PINCTRL,
-	.of_match	= rk3399_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3399_pinctrl_priv),
-	.ops		= &rk3399_pinctrl_ops,
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	.bind		= dm_scan_fdt_dev,
-#endif
-	.probe		= rk3399_pinctrl_probe,
-};
diff --git a/drivers/pinctrl/rockchip/pinctrl_rv1108.c b/drivers/pinctrl/rockchip/pinctrl_rv1108.c
deleted file mode 100644
index bdf3910a88..0000000000
--- a/drivers/pinctrl/rockchip/pinctrl_rv1108.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rv1108.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct rv1108_pinctrl_priv {
-	struct rv1108_grf *grf;
-};
-
-static void pinctrl_rv1108_uart_config(struct rv1108_grf *grf, int uart_id)
-{
-	switch (uart_id) {
-	case PERIPH_ID_UART0:
-		rk_clrsetreg(&grf->gpio3a_iomux,
-			     GPIO3A6_MASK | GPIO3A5_MASK,
-			     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
-			     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
-		break;
-	case PERIPH_ID_UART1:
-		rk_clrsetreg(&grf->gpio1d_iomux,
-			     GPIO1D3_MASK | GPIO1D2_MASK | GPIO1D1_MASK |
-			     GPIO1D0_MASK,
-			     GPIO1D3_UART0_SOUT << GPIO1D3_SHIFT |
-			     GPIO1D2_UART0_SIN << GPIO1D2_SHIFT |
-			     GPIO1D1_UART0_RTSN << GPIO1D1_SHIFT |
-			     GPIO1D0_UART0_CTSN << GPIO1D0_SHIFT);
-		break;
-	case PERIPH_ID_UART2:
-		rk_clrsetreg(&grf->gpio2d_iomux,
-			     GPIO2D2_MASK | GPIO2D1_MASK,
-			     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
-			     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
-		break;
-	}
-}
-
-static void pinctrl_rv1108_gmac_config(struct rv1108_grf *grf, int func)
-{
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B7_MASK | GPIO1B6_MASK | GPIO1B5_MASK |
-		     GPIO1B4_MASK | GPIO1B3_MASK | GPIO1B2_MASK,
-		     GPIO1B7_GMAC_RXDV << GPIO1B7_SHIFT |
-		     GPIO1B6_GMAC_RXD1 << GPIO1B6_SHIFT |
-		     GPIO1B5_GMAC_RXD0 << GPIO1B5_SHIFT |
-		     GPIO1B4_GMAC_TXEN << GPIO1B4_SHIFT |
-		     GPIO1B3_GMAC_TXD1 << GPIO1B3_SHIFT |
-		     GPIO1B2_GMAC_TXD0 << GPIO1B2_SHIFT);
-	rk_clrsetreg(&grf->gpio1c_iomux,
-		     GPIO1C5_MASK | GPIO1C4_MASK |
-		     GPIO1C3_MASK | GPIO1C2_MASK,
-		     GPIO1C5_GMAC_CLK << GPIO1C5_SHIFT |
-		     GPIO1C4_GMAC_MDC << GPIO1C4_SHIFT |
-		     GPIO1C3_GMAC_MDIO << GPIO1C3_SHIFT |
-		     GPIO1C2_GMAC_RXER << GPIO1C2_SHIFT);
-	writel(0xffff57f5, &grf->gpio1b_drv);
-}
-
-static void pinctrl_rv1108_sfc_config(struct rv1108_grf *grf)
-{
-	rk_clrsetreg(&grf->gpio2a_iomux, GPIO2A3_MASK | GPIO2A2_MASK |
-		     GPIO2A1_MASK | GPIO2A0_MASK,
-		     GPIO2A3_SFC_HOLD_IO3 << GPIO2A3_SHIFT |
-		     GPIO2A2_SFC_WP_IO2 << GPIO2A2_SHIFT |
-		     GPIO2A1_SFC_SO_IO1 << GPIO2A1_SHIFT |
-		     GPIO2A0_SFC_SI_IO0 << GPIO2A0_SHIFT);
-	rk_clrsetreg(&grf->gpio2b_iomux, GPIO2B7_MASK | GPIO2B4_MASK,
-		     GPIO2B7_SFC_CLK << GPIO2B7_SHIFT |
-		     GPIO2B4_SFC_CSN0 << GPIO2B4_SHIFT);
-}
-
-static int rv1108_pinctrl_request(struct udevice *dev, int func, int flags)
-{
-	struct rv1108_pinctrl_priv *priv = dev_get_priv(dev);
-
-	switch (func) {
-	case PERIPH_ID_UART0:
-	case PERIPH_ID_UART1:
-	case PERIPH_ID_UART2:
-		pinctrl_rv1108_uart_config(priv->grf, func);
-		break;
-	case PERIPH_ID_GMAC:
-		pinctrl_rv1108_gmac_config(priv->grf, func);
-	case PERIPH_ID_SFC:
-		pinctrl_rv1108_sfc_config(priv->grf);
-	default:
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static int rv1108_pinctrl_get_periph_id(struct udevice *dev,
-					struct udevice *periph)
-{
-	u32 cell[3];
-	int ret;
-
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
-	if (ret < 0)
-		return -EINVAL;
-
-	switch (cell[1]) {
-	case 11:
-		return PERIPH_ID_SDCARD;
-	case 13:
-		return PERIPH_ID_EMMC;
-	case 19:
-		return PERIPH_ID_GMAC;
-	case 30:
-		return PERIPH_ID_I2C0;
-	case 31:
-		return PERIPH_ID_I2C1;
-	case 32:
-		return PERIPH_ID_I2C2;
-	case 39:
-		return PERIPH_ID_PWM0;
-	case 44:
-		return PERIPH_ID_UART0;
-	case 45:
-		return PERIPH_ID_UART1;
-	case 46:
-		return PERIPH_ID_UART2;
-	case 56:
-		return PERIPH_ID_SFC;
-	}
-
-	return -ENOENT;
-}
-
-static int rv1108_pinctrl_set_state_simple(struct udevice *dev,
-					   struct udevice *periph)
-{
-	int func;
-
-	func = rv1108_pinctrl_get_periph_id(dev, periph);
-	if (func < 0)
-		return func;
-
-	return rv1108_pinctrl_request(dev, func, 0);
-}
-
-static struct pinctrl_ops rv1108_pinctrl_ops = {
-	.set_state_simple	= rv1108_pinctrl_set_state_simple,
-	.request		= rv1108_pinctrl_request,
-	.get_periph_id		= rv1108_pinctrl_get_periph_id,
-};
-
-static int rv1108_pinctrl_probe(struct udevice *dev)
-{
-	struct rv1108_pinctrl_priv *priv = dev_get_priv(dev);
-
-	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-	return 0;
-}
-
-static const struct udevice_id rv1108_pinctrl_ids[] = {
-	{.compatible = "rockchip,rv1108-pinctrl" },
-	{ }
-};
-
-U_BOOT_DRIVER(pinctrl_rv1108) = {
-	.name           = "pinctrl_rv1108",
-	.id             = UCLASS_PINCTRL,
-	.of_match       = rv1108_pinctrl_ids,
-	.priv_auto_alloc_size = sizeof(struct rv1108_pinctrl_priv),
-	.ops            = &rv1108_pinctrl_ops,
-	.bind           = dm_scan_fdt_dev,
-	.probe          = rv1108_pinctrl_probe,
-};

commit 342662e935a8e42e7c353c2f1d495299345fbf14
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 11:37:52 2018 +0800

    defconfig: rockchip: Clean the unused pinctrl config
    
    If we used the pinctrl-rockchip driver, these config is not needed,
    so remove them.
    
    Change-Id: I606b706dd7d45a947a9aeb32c0ca61d44cef0651
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 1059dc5f59..a94df64af9 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -41,7 +41,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 8a32aed288..3ec0370dec 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -54,8 +54,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 26c7c75afe..ca11b5cbc1 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -56,8 +56,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 148c6724fe..9663da138d 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -55,8 +55,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index a93dae0928..e9f2c05265 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -17,7 +17,6 @@ CONFIG_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xFF1c0000
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 5f45c87b20..4bf97b7260 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -36,7 +36,6 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
 CONFIG_DM_RESET=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
index b512094db5..6f32c06024 100644
--- a/configs/evb-rk3066_defconfig
+++ b/configs/evb-rk3066_defconfig
@@ -40,7 +40,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_GENERIC=y
-CONFIG_PINCTRL_ROCKCHIP_RK3066=y
 CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_BASE=0x20064000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 8c55012136..c44891c1a4 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -40,7 +40,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 7c2a607e90..ed4b42f94b 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -29,7 +29,6 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 814b0d93de..302c44efa8 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -60,7 +60,6 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
index f81bf138cb..d73134f64e 100644
--- a/configs/evb-rk3288-rk1608_defconfig
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -50,8 +50,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
 CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 04f6a064e3..c68e5a26b5 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -50,8 +50,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
 CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 2e85295af9..bbd04b5209 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -57,7 +57,6 @@ CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3328=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index a7b881cceb..c9d3037cdb 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -55,7 +55,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 72b08c544e..1df6d46d98 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -36,7 +36,6 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RV1108=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index d9c4d30e05..5a4e98bdc2 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -51,8 +51,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 8804121bf4..3caf2c1280 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -54,8 +54,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index f6b8a76aac..95723b823c 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -54,7 +54,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig
index 19255fb209..bc3e179849 100644
--- a/configs/geekbox_defconfig
+++ b/configs/geekbox_defconfig
@@ -11,7 +11,6 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0xFF690000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index 9a27b69ade..ac9dd3c4ed 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -56,7 +56,6 @@ CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index a42f5e0efb..dec941cfd3 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -36,7 +36,6 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
 CONFIG_DM_REGULATOR_FIXED=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_SYSRESET=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index ccfde2f5c6..6c8eee760f 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -74,7 +74,6 @@ CONFIG_RGMII=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index b0437e13a7..f902ecf44b 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -51,8 +51,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
 CONFIG_REGULATOR_ACT8846=y
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index b37532d973..4dfe5dda5c 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -39,7 +39,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_GENERIC=y
-CONFIG_PINCTRL_ROCKCHIP_RK3066=y
 CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_BASE=0x20064000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 93ee353d0d..4cc038b026 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -55,8 +55,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 5e99f9c089..064d83df7f 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -51,8 +51,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 2aa8e1aa6c..cb014631e5 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -67,7 +67,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_SPL_DM_REGULATOR=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index b41644ef5f..63ed99d013 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -50,8 +50,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 1534754cf3..781a53c200 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -38,7 +38,6 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3188=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ac0736aa9a..240f0a4adc 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -129,8 +129,6 @@ CONFIG_PHY=y
 CONFIG_PHY_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_SANDBOX_POWER_DOMAIN=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 77cca3d00d..2093c11f06 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -116,8 +116,6 @@ CONFIG_PHY=y
 CONFIG_PHY_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_SANDBOX_POWER_DOMAIN=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index 53c2fb8442..0040803cb0 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -126,8 +126,6 @@ CONFIG_PHY=y
 CONFIG_PHY_SANDBOX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_PINCTRL_ROCKCHIP_RK3036=y
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_PINCTRL_SANDBOX=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_ACT8846=y
diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index a7991afae2..30f790fa30 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -15,7 +15,6 @@ CONFIG_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0xFF1b0000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 00e2d81954..8db265b252 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -54,8 +54,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 711d10e0f6..d4f8e400b9 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -44,8 +44,6 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINCTRL_FULL is not set
-CONFIG_PINCTRL_ROCKCHIP_RK3288=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y

commit 5f84f5d0d1d011432cb6abeda10f97e2d7e95b79
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 14:33:50 2018 +0800

    configs: chrome: Fix the compiling error for pinctrl driver
    
    If used the new pinctrl-rockchip driver, need to remove CONFIG_SPL_OF_PLATDATA,
    and enable CONFIG_SPL_OF_LIBFDT.
    
    Change-Id: I6a9a8921b4dd8551b83a5cc7f2e3332a630aaa15
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index f40c0b9afa..8a32aed288 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -34,7 +34,6 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -87,4 +86,3 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index cdeabaa12a..26c7c75afe 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -36,7 +36,6 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -89,4 +88,3 @@ CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index c1e36fa860..148c6724fe 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -35,7 +35,6 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_PARTITION_UUIDS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
@@ -89,4 +88,3 @@ CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_SPL_OF_LIBFDT is not set

commit 49c55878fa148494fb74f43e4ecf874210a2c236
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 11:36:00 2018 +0800

    pinctrl: rockchip: Add common rockchip pinctrl driver
    
    Use this drive to fit all Rockchip SOCs and to support
    the desired pinctrl configuration via DTS.
    
    Change-Id: I86b5f25feb13c92a56103aef292a492e8f2accc8
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 4d0e958c41..cf4436ff3a 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -158,104 +158,24 @@ config PINCTRL_QCA953X
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
-config PINCTRL_ROCKCHIP_RK3036
-	bool "Rockchip rk3036 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3036 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3128
-	bool "Rockchip rk3128 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3128 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3066
-        bool "Rockchip rk3066 pin control driver"
-        depends on DM
-        help
-          Support pin multiplexing control on Rockchip rk3066 SoCs. The driver is
-          controlled by a device tree node which contains both the GPIO
-          definitions and pin control functions for each available multiplex
-          function.
-
-config PINCTRL_ROCKCHIP_RK3188
-	bool "Rockchip rk3188 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3188 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK322X
-	bool "Rockchip rk322x pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk322x SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3288
-	bool "Rockchip rk3288 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3288 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3328
-	bool "Rockchip rk3328 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3328 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3368
-	bool "Rockchip RK3368 pin control driver"
-	depends on DM
-	help
-	  Support pin multiplexing control on Rockchip rk3368 SoCs.
-
-	  The driver is controlled by a device tree node which contains both
-	  the GPIO definitions and pin control functions for each available
-	  multiplex function.
-
-config PINCTRL_ROCKCHIP_RK3399
-	bool "Rockchip rk3399 pin control driver"
-	depends on DM
+config PINCTRL_ROCKCHIP
+	bool "Rockchip pin control driver"
+	depends on PINCTRL_FULL && ARCH_ROCKCHIP
+	default y
 	help
-	  Support pin multiplexing control on Rockchip rk3399 SoCs.
+	  Support pin multiplexing control on Rockchip SoCs.
 
 	  The driver is controlled by a device tree node which contains both
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
-config PINCTRL_ROCKCHIP_RV1108
-	bool "Rockchip rv1108 pin control driver"
-	depends on DM
+config SPL_PINCTRL_ROCKCHIP
+	bool "Support Rockchip pin controllers in SPL"
+	depends on SPL_PINCTRL_FULL && ARCH_ROCKCHIP
+	default y
 	help
-	  Support pin multiplexing control on Rockchip rv1108 SoC.
-
-	  The driver is controlled by a device tree node which contains
-	  both the GPIO definitions and pin control functions for each
-	  available multiplex function.
+	  This option is an SPL-variant of the PINCTRL_ROCKCHIP option.
+	  See the help of PINCTRL_ROCKCHIP for details.
 
 config PINCTRL_SANDBOX
 	bool "Sandbox pinctrl driver"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 64da7c608b..35e8001029 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -10,7 +10,7 @@ obj-$(CONFIG_PINCTRL_AT91PIO4)		+= pinctrl-at91-pio4.o
 obj-y					+= nxp/
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_ARCH_ATH79) += ath79/
-obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP) += pinctrl-rockchip.o
 obj-$(CONFIG_PINCTRL_SANDBOX)	+= pinctrl-sandbox.o
 
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
new file mode 100644
index 0000000000..68bf30d8e6
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -0,0 +1,2440 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#define MAX_ROCKCHIP_GPIO_PER_BANK	32
+#define RK_FUNC_GPIO			0
+#define MAX_ROCKCHIP_PINS_ENTRIES	20
+
+enum rockchip_pinctrl_type {
+	PX30,
+	RV1108,
+	RK2928,
+	RK3066B,
+	RK3128,
+	RK3188,
+	RK3288,
+	RK3368,
+	RK3399,
+};
+
+/**
+ * Encode variants of iomux registers into a type variable
+ */
+#define IOMUX_GPIO_ONLY		BIT(0)
+#define IOMUX_WIDTH_4BIT	BIT(1)
+#define IOMUX_SOURCE_PMU	BIT(2)
+#define IOMUX_UNROUTED		BIT(3)
+#define IOMUX_WIDTH_3BIT	BIT(4)
+
+/**
+ * @type: iomux variant using IOMUX_* constants
+ * @offset: if initialized to -1 it will be autocalculated, by specifying
+ *	    an initial offset value the relevant source offset can be reset
+ *	    to a new value for autocalculating the following iomux registers.
+ */
+struct rockchip_iomux {
+	int				type;
+	int				offset;
+};
+
+/**
+ * enum type index corresponding to rockchip_perpin_drv_list arrays index.
+ */
+enum rockchip_pin_drv_type {
+	DRV_TYPE_IO_DEFAULT = 0,
+	DRV_TYPE_IO_1V8_OR_3V0,
+	DRV_TYPE_IO_1V8_ONLY,
+	DRV_TYPE_IO_1V8_3V0_AUTO,
+	DRV_TYPE_IO_3V3_ONLY,
+	DRV_TYPE_MAX
+};
+
+/**
+ * enum type index corresponding to rockchip_pull_list arrays index.
+ */
+enum rockchip_pin_pull_type {
+	PULL_TYPE_IO_DEFAULT = 0,
+	PULL_TYPE_IO_1V8_ONLY,
+	PULL_TYPE_MAX
+};
+
+/**
+ * @drv_type: drive strength variant using rockchip_perpin_drv_type
+ * @offset: if initialized to -1 it will be autocalculated, by specifying
+ *	    an initial offset value the relevant source offset can be reset
+ *	    to a new value for autocalculating the following drive strength
+ *	    registers. if used chips own cal_drv func instead to calculate
+ *	    registers offset, the variant could be ignored.
+ */
+struct rockchip_drv {
+	enum rockchip_pin_drv_type	drv_type;
+	int				offset;
+};
+
+/**
+ * @priv: common pinctrl private basedata
+ * @pin_base: first pin number
+ * @nr_pins: number of pins in this bank
+ * @name: name of the bank
+ * @bank_num: number of the bank, to account for holes
+ * @iomux: array describing the 4 iomux sources of the bank
+ * @drv: array describing the 4 drive strength sources of the bank
+ * @pull_type: array describing the 4 pull type sources of the bank
+ * @recalced_mask: bits describing the mux recalced pins of per bank
+ * @route_mask: bits describing the routing pins of per bank
+ */
+struct rockchip_pin_bank {
+	struct rockchip_pinctrl_priv	*priv;
+	u32				pin_base;
+	u8				nr_pins;
+	char				*name;
+	u8				bank_num;
+	struct rockchip_iomux		iomux[4];
+	struct rockchip_drv		drv[4];
+	enum rockchip_pin_pull_type	pull_type[4];
+	u32				recalced_mask;
+	u32				route_mask;
+};
+
+#define PIN_BANK(id, pins, label)			\
+	{						\
+		.bank_num	= id,			\
+		.nr_pins	= pins,			\
+		.name		= label,		\
+		.iomux		= {			\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+			{ .offset = -1 },		\
+		},					\
+	}
+
+#define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3)	\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+	}
+
+#define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+		},							\
+		.drv		= {					\
+			{ .drv_type = type0, .offset = -1 },		\
+			{ .drv_type = type1, .offset = -1 },		\
+			{ .drv_type = type2, .offset = -1 },		\
+			{ .drv_type = type3, .offset = -1 },		\
+		},							\
+	}
+
+#define PIN_BANK_DRV_FLAGS_PULL_FLAGS(id, pins, label, drv0, drv1,	\
+				      drv2, drv3, pull0, pull1,		\
+				      pull2, pull3)			\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+			{ .offset = -1 },				\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = -1 },		\
+			{ .drv_type = drv1, .offset = -1 },		\
+			{ .drv_type = drv2, .offset = -1 },		\
+			{ .drv_type = drv3, .offset = -1 },		\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
+#define PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(id, pins, label, iom0, iom1,	\
+					iom2, iom3, drv0, drv1, drv2,	\
+					drv3, offset0, offset1,		\
+					offset2, offset3)		\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = offset0 },	\
+			{ .drv_type = drv1, .offset = offset1 },	\
+			{ .drv_type = drv2, .offset = offset2 },	\
+			{ .drv_type = drv3, .offset = offset3 },	\
+		},							\
+	}
+
+#define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins,	\
+					      label, iom0, iom1, iom2,  \
+					      iom3, drv0, drv1, drv2,   \
+					      drv3, offset0, offset1,   \
+					      offset2, offset3, pull0,  \
+					      pull1, pull2, pull3)	\
+	{								\
+		.bank_num	= id,					\
+		.nr_pins	= pins,					\
+		.name		= label,				\
+		.iomux		= {					\
+			{ .type = iom0, .offset = -1 },			\
+			{ .type = iom1, .offset = -1 },			\
+			{ .type = iom2, .offset = -1 },			\
+			{ .type = iom3, .offset = -1 },			\
+		},							\
+		.drv		= {					\
+			{ .drv_type = drv0, .offset = offset0 },	\
+			{ .drv_type = drv1, .offset = offset1 },	\
+			{ .drv_type = drv2, .offset = offset2 },	\
+			{ .drv_type = drv3, .offset = offset3 },	\
+		},							\
+		.pull_type[0] = pull0,					\
+		.pull_type[1] = pull1,					\
+		.pull_type[2] = pull2,					\
+		.pull_type[3] = pull3,					\
+	}
+
+/**
+ * struct rockchip_mux_recalced_data: represent a pin iomux data.
+ * @num: bank number.
+ * @pin: pin number.
+ * @bit: index at register.
+ * @reg: register offset.
+ * @mask: mask bit
+ */
+struct rockchip_mux_recalced_data {
+	u8 num;
+	u8 pin;
+	u32 reg;
+	u8 bit;
+	u8 mask;
+};
+
+/**
+ * struct rockchip_mux_recalced_data: represent a pin iomux data.
+ * @bank_num: bank number.
+ * @pin: index at register or used to calc index.
+ * @func: the min pin.
+ * @route_offset: the max pin.
+ * @route_val: the register offset.
+ */
+struct rockchip_mux_route_data {
+	u8 bank_num;
+	u8 pin;
+	u8 func;
+	u32 route_offset;
+	u32 route_val;
+};
+
+/**
+ */
+struct rockchip_pin_ctrl {
+	struct rockchip_pin_bank	*pin_banks;
+	u32				nr_banks;
+	u32				nr_pins;
+	char				*label;
+	enum rockchip_pinctrl_type	type;
+	int				grf_mux_offset;
+	int				pmu_mux_offset;
+	int				grf_drv_offset;
+	int				pmu_drv_offset;
+	struct rockchip_mux_recalced_data *iomux_recalced;
+	u32				niomux_recalced;
+	struct rockchip_mux_route_data *iomux_routes;
+	u32				niomux_routes;
+
+	void	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
+				 int pin_num, struct regmap **regmap,
+				 int *reg, u8 *bit);
+	void	(*drv_calc_reg)(struct rockchip_pin_bank *bank,
+				int pin_num, struct regmap **regmap,
+				int *reg, u8 *bit);
+	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
+				    int pin_num, struct regmap **regmap,
+				    int *reg, u8 *bit);
+};
+
+/**
+ */
+struct rockchip_pinctrl_priv {
+	struct rockchip_pin_ctrl	*ctrl;
+	struct regmap			*regmap_base;
+	struct regmap			*regmap_pmu;
+
+};
+
+static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	if (bank >= ctrl->nr_banks) {
+		debug("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks);
+		return -EINVAL;
+	}
+
+	if (pin >= MAX_ROCKCHIP_GPIO_PER_BANK) {
+		debug("pin conf pin %d >= %d\n", pin,
+		      MAX_ROCKCHIP_GPIO_PER_BANK);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct rockchip_mux_recalced_data rv1108_mux_recalced_data[] = {
+	{
+		.num = 1,
+		.pin = 0,
+		.reg = 0x418,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 1,
+		.reg = 0x418,
+		.bit = 2,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 2,
+		.reg = 0x418,
+		.bit = 4,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 3,
+		.reg = 0x418,
+		.bit = 6,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 4,
+		.reg = 0x418,
+		.bit = 8,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 5,
+		.reg = 0x418,
+		.bit = 10,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 6,
+		.reg = 0x418,
+		.bit = 12,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 7,
+		.reg = 0x418,
+		.bit = 14,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 8,
+		.reg = 0x41c,
+		.bit = 0,
+		.mask = 0x3
+	}, {
+		.num = 1,
+		.pin = 9,
+		.reg = 0x41c,
+		.bit = 2,
+		.mask = 0x3
+	},
+};
+
+static  struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = {
+	{
+		.num = 2,
+		.pin = 20,
+		.reg = 0xe8,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 21,
+		.reg = 0xe8,
+		.bit = 4,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 22,
+		.reg = 0xe8,
+		.bit = 8,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 23,
+		.reg = 0xe8,
+		.bit = 12,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 24,
+		.reg = 0xd4,
+		.bit = 12,
+		.mask = 0x7
+	},
+};
+
+static struct rockchip_mux_recalced_data rk3328_mux_recalced_data[] = {
+	{
+		.num = 2,
+		.pin = 12,
+		.reg = 0x24,
+		.bit = 8,
+		.mask = 0x3
+	}, {
+		.num = 2,
+		.pin = 15,
+		.reg = 0x28,
+		.bit = 0,
+		.mask = 0x7
+	}, {
+		.num = 2,
+		.pin = 23,
+		.reg = 0x30,
+		.bit = 14,
+		.mask = 0x3
+	},
+};
+
+static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
+				      int *reg, u8 *bit, int *mask)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct rockchip_mux_recalced_data *data;
+	int i;
+
+	for (i = 0; i < ctrl->niomux_recalced; i++) {
+		data = &ctrl->iomux_recalced[i];
+		if (data->num == bank->bank_num &&
+		    data->pin == pin)
+			break;
+	}
+
+	if (i >= ctrl->niomux_recalced)
+		return;
+
+	*reg = data->reg;
+	*mask = data->mask;
+	*bit = data->bit;
+}
+
+static struct rockchip_mux_route_data px30_mux_route_data[] = {
+	{
+		/* cif-d2m0 */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 1,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 7),
+	}, {
+		/* cif-d2m1 */
+		.bank_num = 3,
+		.pin = 3,
+		.func = 3,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 7) | BIT(7),
+	}, {
+		/* pdm-m0 */
+		.bank_num = 3,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 8),
+	}, {
+		/* pdm-m1 */
+		.bank_num = 2,
+		.pin = 22,
+		.func = 1,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 8) | BIT(8),
+	}, {
+		/* uart2-rxm0 */
+		.bank_num = 1,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 9),
+	}, {
+		/* uart2-rxm1 */
+		.bank_num = 2,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 9) | BIT(9),
+	}, {
+		/* uart3-rxm0 */
+		.bank_num = 0,
+		.pin = 17,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 10),
+	}, {
+		/* uart3-rxm1 */
+		.bank_num = 1,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x184,
+		.route_val = BIT(16 + 10) | BIT(10),
+	},
+};
+
+static struct rockchip_mux_route_data rk3128_mux_route_data[] = {
+	{
+		/* spi-0 */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4),
+	}, {
+		/* spi-1 */
+		.bank_num = 1,
+		.pin = 27,
+		.func = 3,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4) | BIT(3),
+	}, {
+		/* spi-2 */
+		.bank_num = 0,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 3) | BIT(16 + 4) | BIT(4),
+	}, {
+		/* i2s-0 */
+		.bank_num = 1,
+		.pin = 5,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 5),
+	}, {
+		/* i2s-1 */
+		.bank_num = 0,
+		.pin = 14,
+		.func = 1,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 5) | BIT(5),
+	}, {
+		/* emmc-0 */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 6),
+	}, {
+		/* emmc-1 */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x144,
+		.route_val = BIT(16 + 6) | BIT(6),
+	},
+};
+
+static struct rockchip_mux_route_data rk3228_mux_route_data[] = {
+	{
+		/* pwm0-0 */
+		.bank_num = 0,
+		.pin = 26,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16),
+	}, {
+		/* pwm0-1 */
+		.bank_num = 3,
+		.pin = 21,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(0),
+	}, {
+		/* pwm1-0 */
+		.bank_num = 0,
+		.pin = 27,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 1),
+	}, {
+		/* pwm1-1 */
+		.bank_num = 0,
+		.pin = 30,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 1) | BIT(1),
+	}, {
+		/* pwm2-0 */
+		.bank_num = 0,
+		.pin = 28,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2),
+	}, {
+		/* pwm2-1 */
+		.bank_num = 1,
+		.pin = 12,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* pwm3-0 */
+		.bank_num = 3,
+		.pin = 26,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* pwm3-1 */
+		.bank_num = 1,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3) | BIT(3),
+	}, {
+		/* sdio-0_d0 */
+		.bank_num = 1,
+		.pin = 1,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 4),
+	}, {
+		/* sdio-1_d0 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 4) | BIT(4),
+	}, {
+		/* spi-0_rx */
+		.bank_num = 0,
+		.pin = 13,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 5),
+	}, {
+		/* spi-1_rx */
+		.bank_num = 2,
+		.pin = 0,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 5) | BIT(5),
+	}, {
+		/* emmc-0_cmd */
+		.bank_num = 1,
+		.pin = 22,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 7),
+	}, {
+		/* emmc-1_cmd */
+		.bank_num = 2,
+		.pin = 4,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 7) | BIT(7),
+	}, {
+		/* uart2-0_rx */
+		.bank_num = 1,
+		.pin = 19,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 8),
+	}, {
+		/* uart2-1_rx */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 8) | BIT(8),
+	}, {
+		/* uart1-0_rx */
+		.bank_num = 1,
+		.pin = 10,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 11),
+	}, {
+		/* uart1-1_rx */
+		.bank_num = 3,
+		.pin = 13,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 11) | BIT(11),
+	},
+};
+
+static struct rockchip_mux_route_data rk3288_mux_route_data[] = {
+	{
+		/* edphdmi_cecinoutt1 */
+		.bank_num = 7,
+		.pin = 16,
+		.func = 2,
+		.route_offset = 0x264,
+		.route_val = BIT(16 + 12) | BIT(12),
+	}, {
+		/* edphdmi_cecinout */
+		.bank_num = 7,
+		.pin = 23,
+		.func = 4,
+		.route_offset = 0x264,
+		.route_val = BIT(16 + 12),
+	},
+};
+
+static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
+	{
+		/* uart2dbg_rxm0 */
+		.bank_num = 1,
+		.pin = 1,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(16 + 1),
+	}, {
+		/* uart2dbg_rxm1 */
+		.bank_num = 2,
+		.pin = 1,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16) | BIT(16 + 1) | BIT(0),
+	}, {
+		/* gmac-m1_rxd0 */
+		.bank_num = 1,
+		.pin = 11,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 2) | BIT(2),
+	}, {
+		/* gmac-m1-optimized_rxd3 */
+		.bank_num = 1,
+		.pin = 14,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 10) | BIT(10),
+	}, {
+		/* pdm_sdi0m0 */
+		.bank_num = 2,
+		.pin = 19,
+		.func = 2,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 3),
+	}, {
+		/* pdm_sdi0m1 */
+		.bank_num = 1,
+		.pin = 23,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 3) | BIT(3),
+	}, {
+		/* spi_rxdm2 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 4,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 4) | BIT(16 + 5) | BIT(5),
+	}, {
+		/* i2s2_sdim0 */
+		.bank_num = 1,
+		.pin = 24,
+		.func = 1,
+		.route_offset = 0x50,
+		.route_val = BIT(16 + 6),
+	}, {
+		/* i2s2_sdim1 */
+		.bank_num = 3,
+		.pin = 2,
+		.func = 6,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 6) | BIT(6),
+	}, {
+		/* card_iom1 */
+		.bank_num = 2,
+		.pin = 22,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 7) | BIT(7),
+	}, {
+		/* tsp_d5m1 */
+		.bank_num = 2,
+		.pin = 16,
+		.func = 3,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 8) | BIT(8),
+	}, {
+		/* cif_data5m1 */
+		.bank_num = 2,
+		.pin = 16,
+		.func = 4,
+		.route_offset = 0x50,
+		.route_val =  BIT(16 + 9) | BIT(9),
+	},
+};
+
+static struct rockchip_mux_route_data rk3399_mux_route_data[] = {
+	{
+		/* uart2dbga_rx */
+		.bank_num = 4,
+		.pin = 8,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11),
+	}, {
+		/* uart2dbgb_rx */
+		.bank_num = 4,
+		.pin = 16,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(10),
+	}, {
+		/* uart2dbgc_rx */
+		.bank_num = 4,
+		.pin = 19,
+		.func = 1,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 10) | BIT(16 + 11) | BIT(11),
+	}, {
+		/* pcie_clkreqn */
+		.bank_num = 2,
+		.pin = 26,
+		.func = 2,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 14),
+	}, {
+		/* pcie_clkreqnb */
+		.bank_num = 4,
+		.pin = 24,
+		.func = 1,
+		.route_offset = 0xe21c,
+		.route_val = BIT(16 + 14) | BIT(14),
+	},
+};
+
+static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
+				   int mux, u32 *reg, u32 *value)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct rockchip_mux_route_data *data;
+	int i;
+
+	for (i = 0; i < ctrl->niomux_routes; i++) {
+		data = &ctrl->iomux_routes[i];
+		if ((data->bank_num == bank->bank_num) &&
+		    (data->pin == pin) && (data->func == mux))
+			break;
+	}
+
+	if (i >= ctrl->niomux_routes)
+		return false;
+
+	*reg = data->route_offset;
+	*value = data->route_val;
+
+	return true;
+}
+
+static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	unsigned int val;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+
+	if (iomux_num > 3)
+		return -EINVAL;
+
+	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
+		debug("pin %d is unrouted\n", pin);
+		return -EINVAL;
+	}
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
+		return RK_FUNC_GPIO;
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			reg += 0x4;
+		bit = (pin % 4) * 4;
+		mask = 0xf;
+	} else if (mux_type & IOMUX_WIDTH_3BIT) {
+		if ((pin % 8) >= 5)
+			reg += 0x4;
+		bit = (pin % 8 % 5) * 3;
+		mask = 0x7;
+	} else {
+		bit = (pin % 8) * 2;
+		mask = 0x3;
+	}
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	ret = regmap_read(regmap, reg, &val);
+	if (ret)
+		return ret;
+
+	return ((val >> bit) & mask);
+}
+
+static int rockchip_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
+					 int index)
+{	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+
+	return rockchip_get_mux(&ctrl->pin_banks[banknum], index);
+}
+
+static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
+			       int pin, int mux)
+{
+	int iomux_num = (pin / 8);
+
+	if (iomux_num > 3)
+		return -EINVAL;
+
+	if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
+		debug("pin %d is unrouted\n", pin);
+		return -EINVAL;
+	}
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
+		if (mux != IOMUX_GPIO_ONLY) {
+			debug("pin %d only supports a gpio mux\n", pin);
+			return -ENOTSUPP;
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Set a new mux function for a pin.
+ *
+ * The register is divided into the upper and lower 16 bit. When changing
+ * a value, the previous register value is not read and changed. Instead
+ * it seems the changed bits are marked in the upper 16 bit, while the
+ * changed value gets set in the same offset in the lower 16 bit.
+ * All pin settings seem to be 2 bit wide in both the upper and lower
+ * parts.
+ * @bank: pin bank to change
+ * @pin: pin to change
+ * @mux: new mux function to set
+ */
+static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int iomux_num = (pin / 8);
+	struct regmap *regmap;
+	int reg, ret, mask, mux_type;
+	u8 bit;
+	u32 data, route_reg, route_val;
+
+	ret = rockchip_verify_mux(bank, pin, mux);
+	if (ret < 0)
+		return ret;
+
+	if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
+		return 0;
+
+	debug("setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
+
+	regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
+				? priv->regmap_pmu : priv->regmap_base;
+
+	/* get basic quadrupel of mux registers and the correct reg inside */
+	mux_type = bank->iomux[iomux_num].type;
+	reg = bank->iomux[iomux_num].offset;
+	if (mux_type & IOMUX_WIDTH_4BIT) {
+		if ((pin % 8) >= 4)
+			reg += 0x4;
+		bit = (pin % 4) * 4;
+		mask = 0xf;
+	} else if (mux_type & IOMUX_WIDTH_3BIT) {
+		if ((pin % 8) >= 5)
+			reg += 0x4;
+		bit = (pin % 8 % 5) * 3;
+		mask = 0x7;
+	} else {
+		bit = (pin % 8) * 2;
+		mask = 0x3;
+	}
+
+	if (bank->recalced_mask & BIT(pin))
+		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
+
+	if (bank->route_mask & BIT(pin)) {
+		if (rockchip_get_mux_route(bank, pin, mux, &route_reg,
+					   &route_val)) {
+			ret = regmap_write(regmap, route_reg, route_val);
+			if (ret)
+				return ret;
+		}
+	}
+
+	data = (mask << (bit + 16));
+	data |= (mux & mask) << bit;
+	ret = regmap_write(regmap, reg, data);
+
+	return ret;
+}
+
+#define PX30_PULL_PMU_OFFSET		0x10
+#define PX30_PULL_GRF_OFFSET		0x60
+#define PX30_PULL_BITS_PER_PIN		2
+#define PX30_PULL_PINS_PER_REG		8
+#define PX30_PULL_BANK_STRIDE		16
+
+static void px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+				       int pin_num, struct regmap **regmap,
+				       int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_PULL_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * PX30_PULL_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / PX30_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % PX30_PULL_PINS_PER_REG);
+	*bit *= PX30_PULL_BITS_PER_PIN;
+}
+
+#define PX30_DRV_PMU_OFFSET		0x20
+#define PX30_DRV_GRF_OFFSET		0xf0
+#define PX30_DRV_BITS_PER_PIN		2
+#define PX30_DRV_PINS_PER_REG		8
+#define PX30_DRV_BANK_STRIDE		16
+
+static void px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+				      int pin_num, struct regmap **regmap,
+				      int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * PX30_DRV_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / PX30_DRV_PINS_PER_REG) * 4);
+	*bit = (pin_num % PX30_DRV_PINS_PER_REG);
+	*bit *= PX30_DRV_BITS_PER_PIN;
+}
+
+#define PX30_SCHMITT_PMU_OFFSET			0x38
+#define PX30_SCHMITT_GRF_OFFSET			0xc0
+#define PX30_SCHMITT_PINS_PER_PMU_REG		16
+#define PX30_SCHMITT_BANK_STRIDE		16
+#define PX30_SCHMITT_PINS_PER_GRF_REG		8
+
+static int px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num,
+					 struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = PX30_SCHMITT_PMU_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = PX30_SCHMITT_GRF_OFFSET;
+		pins_per_reg = PX30_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num - 1) * PX30_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+#define RV1108_PULL_PMU_OFFSET		0x10
+#define RV1108_PULL_OFFSET		0x110
+#define RV1108_PULL_PINS_PER_REG	8
+#define RV1108_PULL_BITS_PER_PIN	2
+#define RV1108_PULL_BANK_STRIDE		16
+
+static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_PULL_PMU_OFFSET;
+	} else {
+		*reg = RV1108_PULL_OFFSET;
+		*regmap = priv->regmap_base;
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RV1108_PULL_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1108_PULL_PINS_PER_REG) * 4);
+	*bit = (pin_num % RV1108_PULL_PINS_PER_REG);
+	*bit *= RV1108_PULL_BITS_PER_PIN;
+}
+
+#define RV1108_DRV_PMU_OFFSET		0x20
+#define RV1108_DRV_GRF_OFFSET		0x210
+#define RV1108_DRV_BITS_PER_PIN		2
+#define RV1108_DRV_PINS_PER_REG		8
+#define RV1108_DRV_BANK_STRIDE		16
+
+static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_DRV_PMU_OFFSET;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1108_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RV1108_DRV_BANK_STRIDE;
+	}
+
+	*reg += ((pin_num / RV1108_DRV_PINS_PER_REG) * 4);
+	*bit = pin_num % RV1108_DRV_PINS_PER_REG;
+	*bit *= RV1108_DRV_BITS_PER_PIN;
+}
+
+#define RV1108_SCHMITT_PMU_OFFSET		0x30
+#define RV1108_SCHMITT_GRF_OFFSET		0x388
+#define RV1108_SCHMITT_BANK_STRIDE		8
+#define RV1108_SCHMITT_PINS_PER_GRF_REG		16
+#define RV1108_SCHMITT_PINS_PER_PMU_REG		8
+
+static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int pins_per_reg;
+
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RV1108_SCHMITT_PMU_OFFSET;
+		pins_per_reg = RV1108_SCHMITT_PINS_PER_PMU_REG;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RV1108_SCHMITT_GRF_OFFSET;
+		pins_per_reg = RV1108_SCHMITT_PINS_PER_GRF_REG;
+		*reg += (bank->bank_num  - 1) * RV1108_SCHMITT_BANK_STRIDE;
+	}
+	*reg += ((pin_num / pins_per_reg) * 4);
+	*bit = pin_num % pins_per_reg;
+
+	return 0;
+}
+
+#define RK2928_PULL_OFFSET		0x118
+#define RK2928_PULL_PINS_PER_REG	16
+#define RK2928_PULL_BANK_STRIDE		8
+
+static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK2928_PULL_OFFSET;
+	*reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
+	*reg += (pin_num / RK2928_PULL_PINS_PER_REG) * 4;
+
+	*bit = pin_num % RK2928_PULL_PINS_PER_REG;
+};
+
+#define RK3128_PULL_OFFSET	0x118
+
+static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3128_PULL_OFFSET;
+	*reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK2928_PULL_PINS_PER_REG) * 4);
+
+	*bit = pin_num % RK2928_PULL_PINS_PER_REG;
+}
+
+#define RK3188_PULL_OFFSET		0x164
+#define RK3188_PULL_BITS_PER_PIN	2
+#define RK3188_PULL_PINS_PER_REG	8
+#define RK3188_PULL_BANK_STRIDE		16
+#define RK3188_PULL_PMU_OFFSET		0x64
+
+static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 12 pins of the first bank are located elsewhere */
+	if (bank->bank_num == 0 && pin_num < 12) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3188_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3188_PULL_OFFSET;
+
+		/* correct the offset, as it is the 2nd pull register */
+		*reg -= 4;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		/*
+		 * The bits in these registers have an inverse ordering
+		 * with the lowest pin being in bits 15:14 and the highest
+		 * pin in bits 1:0
+		 */
+		*bit = 7 - (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3288_PULL_OFFSET		0x140
+static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3188_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3288_PULL_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3288_DRV_PMU_OFFSET		0x70
+#define RK3288_DRV_GRF_OFFSET		0x1c0
+#define RK3288_DRV_BITS_PER_PIN		2
+#define RK3288_DRV_PINS_PER_REG		8
+#define RK3288_DRV_BANK_STRIDE		16
+
+static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 24 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3288_DRV_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3288_DRV_PINS_PER_REG;
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3288_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	}
+}
+
+#define RK3228_PULL_OFFSET		0x100
+
+static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3228_PULL_OFFSET;
+	*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+	*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+	*bit *= RK3188_PULL_BITS_PER_PIN;
+}
+
+#define RK3228_DRV_GRF_OFFSET		0x200
+
+static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3228_DRV_GRF_OFFSET;
+	*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+	*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+	*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+	*bit *= RK3288_DRV_BITS_PER_PIN;
+}
+
+#define RK3368_PULL_GRF_OFFSET		0x100
+#define RK3368_PULL_PMU_OFFSET		0x10
+
+static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3368_PULL_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3368_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+#define RK3368_DRV_PMU_OFFSET		0x20
+#define RK3368_DRV_GRF_OFFSET		0x200
+
+static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The first 32 pins of the first bank are located in PMU */
+	if (bank->bank_num == 0) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3368_DRV_PMU_OFFSET;
+
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3288_DRV_PINS_PER_REG;
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3368_DRV_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 2nd bank */
+		*reg -= 0x10;
+		*reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
+		*reg += ((pin_num / RK3288_DRV_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3288_DRV_PINS_PER_REG);
+		*bit *= RK3288_DRV_BITS_PER_PIN;
+	}
+}
+
+#define RK3399_PULL_GRF_OFFSET		0xe040
+#define RK3399_PULL_PMU_OFFSET		0x40
+#define RK3399_DRV_3BITS_PER_PIN	3
+
+static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+					 int pin_num, struct regmap **regmap,
+					 int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	/* The bank0:16 and bank1:32 pins are located in PMU */
+	if ((bank->bank_num == 0) || (bank->bank_num == 1)) {
+		*regmap = priv->regmap_pmu;
+		*reg = RK3399_PULL_PMU_OFFSET;
+
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+		*bit = pin_num % RK3188_PULL_PINS_PER_REG;
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	} else {
+		*regmap = priv->regmap_base;
+		*reg = RK3399_PULL_GRF_OFFSET;
+
+		/* correct the offset, as we're starting with the 3rd bank */
+		*reg -= 0x20;
+		*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
+		*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
+
+		*bit = (pin_num % RK3188_PULL_PINS_PER_REG);
+		*bit *= RK3188_PULL_BITS_PER_PIN;
+	}
+}
+
+static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
+					int pin_num, struct regmap **regmap,
+					int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	int drv_num = (pin_num / 8);
+
+	/*  The bank0:16 and bank1:32 pins are located in PMU */
+	if ((bank->bank_num == 0) || (bank->bank_num == 1))
+		*regmap = priv->regmap_pmu;
+	else
+		*regmap = priv->regmap_base;
+
+	*reg = bank->drv[drv_num].offset;
+	if ((bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) ||
+	    (bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY))
+		*bit = (pin_num % 8) * 3;
+	else
+		*bit = (pin_num % 8) * 2;
+}
+
+static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = {
+	{ 2, 4, 8, 12, -1, -1, -1, -1 },
+	{ 3, 6, 9, 12, -1, -1, -1, -1 },
+	{ 5, 10, 15, 20, -1, -1, -1, -1 },
+	{ 4, 6, 8, 10, 12, 14, 16, 18 },
+	{ 4, 7, 10, 13, 16, 19, 22, 26 }
+};
+
+static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
+				     int pin_num, int strength)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret, i;
+	u32 data, rmask_bits, temp;
+	u8 bit;
+	int drv_type = bank->drv[pin_num / 8].drv_type;
+
+	debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, strength);
+
+	ctrl->drv_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+
+	ret = -EINVAL;
+	for (i = 0; i < ARRAY_SIZE(rockchip_perpin_drv_list[drv_type]); i++) {
+		if (rockchip_perpin_drv_list[drv_type][i] == strength) {
+			ret = i;
+			break;
+		} else if (rockchip_perpin_drv_list[drv_type][i] < 0) {
+			ret = rockchip_perpin_drv_list[drv_type][i];
+			break;
+		}
+	}
+
+	if (ret < 0) {
+		debug("unsupported driver strength %d\n", strength);
+		return ret;
+	}
+
+	switch (drv_type) {
+	case DRV_TYPE_IO_1V8_3V0_AUTO:
+	case DRV_TYPE_IO_3V3_ONLY:
+		rmask_bits = RK3399_DRV_3BITS_PER_PIN;
+		switch (bit) {
+		case 0 ... 12:
+			/* regular case, nothing to do */
+			break;
+		case 15:
+			/*
+			 * drive-strength offset is special, as it is spread
+			 * over 2 registers, the bit data[15] contains bit 0
+			 * of the value while temp[1:0] contains bits 2 and 1
+			 */
+			data = (ret & 0x1) << 15;
+			temp = (ret >> 0x1) & 0x3;
+
+			data |= BIT(31);
+			ret = regmap_write(regmap, reg, data);
+			if (ret)
+				return ret;
+
+			temp |= (0x3 << 16);
+			reg += 0x4;
+			ret = regmap_write(regmap, reg, temp);
+
+			return ret;
+		case 18 ... 21:
+			/* setting fully enclosed in the second register */
+			reg += 4;
+			bit -= 16;
+			break;
+		default:
+			debug("unsupported bit: %d for pinctrl drive type: %d\n",
+			      bit, drv_type);
+			return -EINVAL;
+		}
+		break;
+	case DRV_TYPE_IO_DEFAULT:
+	case DRV_TYPE_IO_1V8_OR_3V0:
+	case DRV_TYPE_IO_1V8_ONLY:
+		rmask_bits = RK3288_DRV_BITS_PER_PIN;
+		break;
+	default:
+		debug("unsupported pinctrl drive type: %d\n",
+		      drv_type);
+		return -EINVAL;
+	}
+
+	/* enable the write to the equivalent lower bits */
+	data = ((1 << rmask_bits) - 1) << (bit + 16);
+	data |= (ret << bit);
+
+	ret = regmap_write(regmap, reg, data);
+	return ret;
+}
+
+static int rockchip_pull_list[PULL_TYPE_MAX][4] = {
+	{
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_BUS_HOLD
+	},
+	{
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_DOWN,
+		PIN_CONFIG_BIAS_DISABLE,
+		PIN_CONFIG_BIAS_PULL_UP
+	},
+};
+
+static int rockchip_set_pull(struct rockchip_pin_bank *bank,
+			     int pin_num, int pull)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret, i, pull_type;
+	u8 bit;
+	u32 data;
+
+	debug("setting pull of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, pull);
+
+	/* rk3066b does support any pulls */
+	if (ctrl->type == RK3066B)
+		return pull ? -EINVAL : 0;
+
+	ctrl->pull_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+
+	switch (ctrl->type) {
+	case RK2928:
+	case RK3128:
+		data = BIT(bit + 16);
+		if (pull == PIN_CONFIG_BIAS_DISABLE)
+			data |= BIT(bit);
+		ret = regmap_write(regmap, reg, data);
+		break;
+	case PX30:
+	case RV1108:
+	case RK3188:
+	case RK3288:
+	case RK3368:
+	case RK3399:
+		pull_type = bank->pull_type[pin_num / 8];
+		ret = -EINVAL;
+		for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
+			i++) {
+			if (rockchip_pull_list[pull_type][i] == pull) {
+				ret = i;
+				break;
+			}
+		}
+
+		if (ret < 0) {
+			debug("unsupported pull setting %d\n", pull);
+			return ret;
+		}
+
+		/* enable the write to the equivalent lower bits */
+		data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+		data |= (ret << bit);
+
+		ret = regmap_write(regmap, reg, data);
+		break;
+	default:
+		debug("unsupported pinctrl type\n");
+		return -EINVAL;
+	}
+
+	return ret;
+}
+
+#define RK3328_SCHMITT_BITS_PER_PIN		1
+#define RK3328_SCHMITT_PINS_PER_REG		16
+#define RK3328_SCHMITT_BANK_STRIDE		8
+#define RK3328_SCHMITT_GRF_OFFSET		0x380
+
+static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
+					   int pin_num,
+					   struct regmap **regmap,
+					   int *reg, u8 *bit)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+
+	*regmap = priv->regmap_base;
+	*reg = RK3328_SCHMITT_GRF_OFFSET;
+
+	*reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE;
+	*reg += ((pin_num / RK3328_SCHMITT_PINS_PER_REG) * 4);
+	*bit = pin_num % RK3328_SCHMITT_PINS_PER_REG;
+
+	return 0;
+}
+
+static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
+				int pin_num, int enable)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	struct regmap *regmap;
+	int reg, ret;
+	u8 bit;
+	u32 data;
+
+	debug("setting input schmitt of GPIO%d-%d to %d\n", bank->bank_num,
+	      pin_num, enable);
+
+	ret = ctrl->schmitt_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+	if (ret)
+		return ret;
+
+	/* enable the write to the equivalent lower bits */
+	data = BIT(bit + 16) | (enable << bit);
+
+	return regmap_write(regmap, reg, data);
+}
+
+/*
+ * Pinconf_ops handling
+ */
+static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
+					unsigned int pull)
+{
+	switch (ctrl->type) {
+	case RK2928:
+	case RK3128:
+		return (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT ||
+			pull == PIN_CONFIG_BIAS_DISABLE);
+	case RK3066B:
+		return pull ? false : true;
+	case PX30:
+	case RV1108:
+	case RK3188:
+	case RK3288:
+	case RK3368:
+	case RK3399:
+		return (pull != PIN_CONFIG_BIAS_PULL_PIN_DEFAULT);
+	}
+
+	return false;
+}
+
+/* set the pin config settings for a specified pin */
+static int rockchip_pinconf_set(struct rockchip_pin_bank *bank,
+				u32 pin, u32 param, u32 arg)
+{
+	struct rockchip_pinctrl_priv *priv = bank->priv;
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	int rc;
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+		rc =  rockchip_set_pull(bank, pin, param);
+		if (rc)
+			return rc;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+	case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
+	case PIN_CONFIG_BIAS_BUS_HOLD:
+		if (!rockchip_pinconf_pull_valid(ctrl, param))
+			return -ENOTSUPP;
+
+		if (!arg)
+			return -EINVAL;
+
+		rc = rockchip_set_pull(bank, pin, param);
+		if (rc)
+			return rc;
+		break;
+
+	case PIN_CONFIG_DRIVE_STRENGTH:
+		if (!ctrl->drv_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_drive_perpin(bank, pin, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
+	case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
+		if (!ctrl->schmitt_calc_reg)
+			return -ENOTSUPP;
+
+		rc = rockchip_set_schmitt(bank, pin, arg);
+		if (rc < 0)
+			return rc;
+		break;
+
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static const struct pinconf_param rockchip_conf_params[] = {
+	{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
+	{ "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
+	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
+	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
+	{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
+	{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
+	{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
+	{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
+	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
+};
+
+static int rockchip_pinconf_prop_name_to_param(const char *property,
+					       u32 *default_value)
+{
+	const struct pinconf_param *p, *end;
+
+	p = rockchip_conf_params;
+	end = p + sizeof(rockchip_conf_params) / sizeof(struct pinconf_param);
+
+	/* See if this pctldev supports this parameter */
+	for (; p < end; p++) {
+		if (!strcmp(property, p->property)) {
+			*default_value = p->default_value;
+			return p->param;
+		}
+	}
+
+	*default_value = 0;
+	return -EPERM;
+}
+
+static int rockchip_pinctrl_set_state(struct udevice *dev,
+				      struct udevice *config)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl = priv->ctrl;
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(config);
+	u32 cells[MAX_ROCKCHIP_PINS_ENTRIES * 4];
+	u32 bank, pin, mux, conf, arg, default_val;
+	int ret, count, i;
+	const char *prop_name;
+	int pcfg_node, property_offset, prop_len, param;
+	const void *value;
+
+	count = fdtdec_get_int_array_count(blob, node, "rockchip,pins",
+					   cells, ARRAY_SIZE(cells));
+	if (count < 0) {
+		debug("%s: bad array %d\n", __func__, count);
+		return -EINVAL;
+	}
+
+	if (count > MAX_ROCKCHIP_PINS_ENTRIES * 4) {
+		debug("%s: unsupported pins array count %d\n",
+		      __func__, count);
+		return -EINVAL;
+	}
+
+	for (i = 0; i < (count >> 2); i++) {
+		bank = cells[4 * i + 0];
+		pin = cells[4 * i + 1];
+		mux = cells[4 * i + 2];
+		conf = cells[4 * i + 3];
+
+		ret = rockchip_verify_config(dev, bank, pin);
+		if (ret)
+			return ret;
+
+		ret = rockchip_set_mux(&ctrl->pin_banks[bank], pin, mux);
+		if (ret)
+			return ret;
+
+		pcfg_node = fdt_node_offset_by_phandle(blob, conf);
+		if (pcfg_node < 0)
+			return -ENODEV;
+
+		fdt_for_each_property_offset(property_offset, blob, pcfg_node) {
+			value = fdt_getprop_by_offset(blob, property_offset,
+						      &prop_name, &prop_len);
+			if (!value)
+				return -ENOENT;
+
+			param = rockchip_pinconf_prop_name_to_param(prop_name,
+								    &default_val);
+			if (param < 0)
+				break;
+
+			if (prop_len >= sizeof(fdt32_t))
+				arg = fdt32_to_cpu(*(fdt32_t *)value);
+			else
+				arg = default_val;
+
+			ret = rockchip_pinconf_set(&ctrl->pin_banks[bank], pin,
+						   param, arg);
+			if (ret) {
+				debug("%s: rockchip_pinconf_set fail: %d\n",
+				      __func__, ret);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static struct pinctrl_ops rockchip_pinctrl_ops = {
+	.set_state			= rockchip_pinctrl_set_state,
+	.get_gpio_mux			= rockchip_pinctrl_get_gpio_mux,
+};
+
+/* retrieve the soc specific data */
+static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl =
+			(struct rockchip_pin_ctrl *)dev_get_driver_data(dev);
+	struct rockchip_pin_bank *bank;
+	int grf_offs, pmu_offs, drv_grf_offs, drv_pmu_offs, i, j;
+
+	grf_offs = ctrl->grf_mux_offset;
+	pmu_offs = ctrl->pmu_mux_offset;
+	drv_pmu_offs = ctrl->pmu_drv_offset;
+	drv_grf_offs = ctrl->grf_drv_offset;
+	bank = ctrl->pin_banks;
+
+	for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
+		int bank_pins = 0;
+
+		bank->priv = priv;
+		bank->pin_base = ctrl->nr_pins;
+		ctrl->nr_pins += bank->nr_pins;
+
+		/* calculate iomux and drv offsets */
+		for (j = 0; j < 4; j++) {
+			struct rockchip_iomux *iom = &bank->iomux[j];
+			struct rockchip_drv *drv = &bank->drv[j];
+			int inc;
+
+			if (bank_pins >= bank->nr_pins)
+				break;
+
+			/* preset iomux offset value, set new start value */
+			if (iom->offset >= 0) {
+				if (iom->type & IOMUX_SOURCE_PMU)
+					pmu_offs = iom->offset;
+				else
+					grf_offs = iom->offset;
+			} else { /* set current iomux offset */
+				iom->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+							pmu_offs : grf_offs;
+			}
+
+			/* preset drv offset value, set new start value */
+			if (drv->offset >= 0) {
+				if (iom->type & IOMUX_SOURCE_PMU)
+					drv_pmu_offs = drv->offset;
+				else
+					drv_grf_offs = drv->offset;
+			} else { /* set current drv offset */
+				drv->offset = (iom->type & IOMUX_SOURCE_PMU) ?
+						drv_pmu_offs : drv_grf_offs;
+			}
+
+			debug("bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n",
+			      i, j, iom->offset, drv->offset);
+
+			/*
+			 * Increase offset according to iomux width.
+			 * 4bit iomux'es are spread over two registers.
+			 */
+			inc = (iom->type & (IOMUX_WIDTH_4BIT |
+					    IOMUX_WIDTH_3BIT)) ? 8 : 4;
+			if (iom->type & IOMUX_SOURCE_PMU)
+				pmu_offs += inc;
+			else
+				grf_offs += inc;
+
+			/*
+			 * Increase offset according to drv width.
+			 * 3bit drive-strenth'es are spread over two registers.
+			 */
+			if ((drv->drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) ||
+			    (drv->drv_type == DRV_TYPE_IO_3V3_ONLY))
+				inc = 8;
+			else
+				inc = 4;
+
+			if (iom->type & IOMUX_SOURCE_PMU)
+				drv_pmu_offs += inc;
+			else
+				drv_grf_offs += inc;
+
+			bank_pins += 8;
+		}
+
+		/* calculate the per-bank recalced_mask */
+		for (j = 0; j < ctrl->niomux_recalced; j++) {
+			int pin = 0;
+
+			if (ctrl->iomux_recalced[j].num == bank->bank_num) {
+				pin = ctrl->iomux_recalced[j].pin;
+				bank->recalced_mask |= BIT(pin);
+			}
+		}
+
+		/* calculate the per-bank route_mask */
+		for (j = 0; j < ctrl->niomux_routes; j++) {
+			int pin = 0;
+
+			if (ctrl->iomux_routes[j].bank_num == bank->bank_num) {
+				pin = ctrl->iomux_routes[j].pin;
+				bank->route_mask |= BIT(pin);
+			}
+		}
+	}
+
+	return ctrl;
+}
+
+static int rockchip_pinctrl_probe(struct udevice *dev)
+{
+	struct rockchip_pinctrl_priv *priv = dev_get_priv(dev);
+	struct rockchip_pin_ctrl *ctrl;
+	struct udevice *syscon;
+	struct regmap *regmap;
+	int ret = 0;
+
+	/* get rockchip grf syscon phandle */
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,grf",
+					   &syscon);
+	if (ret) {
+		debug("unable to find rockchip,grf syscon device (%d)\n", ret);
+		return ret;
+	}
+
+	/* get grf-reg base address */
+	regmap = syscon_get_regmap(syscon);
+	if (!regmap) {
+		debug("unable to find rockchip grf regmap\n");
+		return -ENODEV;
+	}
+	priv->regmap_base = regmap;
+
+	/* option: get pmu-reg base address */
+	ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pmu",
+					   &syscon);
+	if (!ret) {
+		/* get pmugrf-reg base address */
+		regmap = syscon_get_regmap(syscon);
+		if (!regmap) {
+			debug("unable to find rockchip pmu regmap\n");
+			return -ENODEV;
+		}
+		priv->regmap_pmu = regmap;
+	}
+
+	ctrl = rockchip_pinctrl_get_soc_data(dev);
+	if (!ctrl) {
+		debug("driver data not available\n");
+		return -EINVAL;
+	}
+
+	priv->ctrl = ctrl;
+	return 0;
+}
+
+static struct rockchip_pin_bank px30_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU
+			    ),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT
+			    ),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT
+			    ),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT
+			    ),
+};
+
+static struct rockchip_pin_ctrl px30_pin_ctrl = {
+		.pin_banks		= px30_pin_banks,
+		.nr_banks		= ARRAY_SIZE(px30_pin_banks),
+		.label			= "PX30-GPIO",
+		.type			= PX30,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x0,
+		.iomux_routes		= px30_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(px30_mux_route_data),
+		.pull_calc_reg		= px30_calc_pull_reg_and_bit,
+		.drv_calc_reg		= px30_calc_drv_reg_and_bit,
+		.schmitt_calc_reg	= px30_calc_schmitt_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rv1108_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
+};
+
+static struct rockchip_pin_ctrl rv1108_pin_ctrl = {
+	.pin_banks		= rv1108_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rv1108_pin_banks),
+	.label			= "RV1108-GPIO",
+	.type			= RV1108,
+	.grf_mux_offset		= 0x10,
+	.pmu_mux_offset		= 0x0,
+	.iomux_recalced		= rv1108_mux_recalced_data,
+	.niomux_recalced	= ARRAY_SIZE(rv1108_mux_recalced_data),
+	.pull_calc_reg		= rv1108_calc_pull_reg_and_bit,
+	.drv_calc_reg		= rv1108_calc_drv_reg_and_bit,
+	.schmitt_calc_reg	= rv1108_calc_schmitt_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk2928_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk2928_pin_ctrl = {
+		.pin_banks		= rk2928_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk2928_pin_banks),
+		.label			= "RK2928-GPIO",
+		.type			= RK2928,
+		.grf_mux_offset		= 0xa8,
+		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3036_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+};
+
+static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
+		.pin_banks		= rk3036_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
+		.label			= "RK3036-GPIO",
+		.type			= RK2928,
+		.grf_mux_offset		= 0xa8,
+		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3066a_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+	PIN_BANK(4, 32, "gpio4"),
+	PIN_BANK(6, 16, "gpio6"),
+};
+
+static struct rockchip_pin_ctrl rk3066a_pin_ctrl = {
+		.pin_banks		= rk3066a_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3066a_pin_banks),
+		.label			= "RK3066a-GPIO",
+		.type			= RK2928,
+		.grf_mux_offset		= 0xa8,
+		.pull_calc_reg		= rk2928_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3066b_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3066b_pin_ctrl = {
+		.pin_banks	= rk3066b_pin_banks,
+		.nr_banks	= ARRAY_SIZE(rk3066b_pin_banks),
+		.label		= "RK3066b-GPIO",
+		.type		= RK3066B,
+		.grf_mux_offset	= 0x60,
+};
+
+static struct rockchip_pin_bank rk3128_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3128_pin_ctrl = {
+		.pin_banks		= rk3128_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3128_pin_banks),
+		.label			= "RK3128-GPIO",
+		.type			= RK3128,
+		.grf_mux_offset		= 0xa8,
+		.iomux_recalced		= rk3128_mux_recalced_data,
+		.niomux_recalced	= ARRAY_SIZE(rk3128_mux_recalced_data),
+		.iomux_routes		= rk3128_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3128_mux_route_data),
+		.pull_calc_reg		= rk3128_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3188_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_GPIO_ONLY, 0, 0, 0),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
+		.pin_banks		= rk3188_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3188_pin_banks),
+		.label			= "RK3188-GPIO",
+		.type			= RK3188,
+		.grf_mux_offset		= 0x60,
+		.pull_calc_reg		= rk3188_calc_pull_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3228_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
+		.pin_banks		= rk3228_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3228_pin_banks),
+		.label			= "RK3228-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.iomux_routes		= rk3228_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3228_mux_route_data),
+		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3288_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
+					     IOMUX_UNROUTED,
+					     IOMUX_UNROUTED,
+					     0
+			    ),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, IOMUX_UNROUTED),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, IOMUX_WIDTH_4BIT),
+	PIN_BANK_IOMUX_FLAGS(4, 32, "gpio4", IOMUX_WIDTH_4BIT,
+					     IOMUX_WIDTH_4BIT,
+					     0,
+					     0
+			    ),
+	PIN_BANK_IOMUX_FLAGS(5, 32, "gpio5", IOMUX_UNROUTED,
+					     0,
+					     0,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK_IOMUX_FLAGS(6, 32, "gpio6", 0, 0, 0, IOMUX_UNROUTED),
+	PIN_BANK_IOMUX_FLAGS(7, 32, "gpio7", 0,
+					     0,
+					     IOMUX_WIDTH_4BIT,
+					     IOMUX_UNROUTED
+			    ),
+	PIN_BANK(8, 16, "gpio8"),
+};
+
+static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
+		.pin_banks		= rk3288_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3288_pin_banks),
+		.label			= "RK3288-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x84,
+		.iomux_routes		= rk3288_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3288_mux_route_data),
+		.pull_calc_reg		= rk3288_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3288_calc_drv_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3328_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0,
+			     IOMUX_WIDTH_3BIT,
+			     IOMUX_WIDTH_3BIT,
+			     0),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",
+			     IOMUX_WIDTH_3BIT,
+			     IOMUX_WIDTH_3BIT,
+			     0,
+			     0),
+};
+
+static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
+		.pin_banks		= rk3328_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3328_pin_banks),
+		.label			= "RK3328-GPIO",
+		.type			= RK3288,
+		.grf_mux_offset		= 0x0,
+		.iomux_recalced		= rk3328_mux_recalced_data,
+		.niomux_recalced	= ARRAY_SIZE(rk3328_mux_recalced_data),
+		.iomux_routes		= rk3328_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3328_mux_route_data),
+		.pull_calc_reg		= rk3228_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3228_calc_drv_reg_and_bit,
+		.schmitt_calc_reg	= rk3328_calc_schmitt_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3368_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU
+			    ),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	PIN_BANK(3, 32, "gpio3"),
+};
+
+static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
+		.pin_banks		= rk3368_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3368_pin_banks),
+		.label			= "RK3368-GPIO",
+		.type			= RK3368,
+		.grf_mux_offset		= 0x0,
+		.pmu_mux_offset		= 0x0,
+		.pull_calc_reg		= rk3368_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3368_calc_drv_reg_and_bit,
+};
+
+static struct rockchip_pin_bank rk3399_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(0, 32, "gpio0",
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 IOMUX_SOURCE_PMU,
+							 DRV_TYPE_IO_1V8_ONLY,
+							 DRV_TYPE_IO_1V8_ONLY,
+							 DRV_TYPE_IO_DEFAULT,
+							 DRV_TYPE_IO_DEFAULT,
+							 0x80,
+							 0x88,
+							 -1,
+							 -1,
+							 PULL_TYPE_IO_1V8_ONLY,
+							 PULL_TYPE_IO_1V8_ONLY,
+							 PULL_TYPE_IO_DEFAULT,
+							 PULL_TYPE_IO_DEFAULT
+							),
+	PIN_BANK_IOMUX_DRV_FLAGS_OFFSET(1, 32, "gpio1", IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					IOMUX_SOURCE_PMU,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					DRV_TYPE_IO_1V8_OR_3V0,
+					0xa0,
+					0xa8,
+					0xb0,
+					0xb8
+					),
+	PIN_BANK_DRV_FLAGS_PULL_FLAGS(2, 32, "gpio2", DRV_TYPE_IO_1V8_OR_3V0,
+				      DRV_TYPE_IO_1V8_OR_3V0,
+				      DRV_TYPE_IO_1V8_ONLY,
+				      DRV_TYPE_IO_1V8_ONLY,
+				      PULL_TYPE_IO_DEFAULT,
+				      PULL_TYPE_IO_DEFAULT,
+				      PULL_TYPE_IO_1V8_ONLY,
+				      PULL_TYPE_IO_1V8_ONLY
+				      ),
+	PIN_BANK_DRV_FLAGS(3, 32, "gpio3", DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_3V3_ONLY,
+			   DRV_TYPE_IO_1V8_OR_3V0
+			   ),
+	PIN_BANK_DRV_FLAGS(4, 32, "gpio4", DRV_TYPE_IO_1V8_OR_3V0,
+			   DRV_TYPE_IO_1V8_3V0_AUTO,
+			   DRV_TYPE_IO_1V8_OR_3V0,
+			   DRV_TYPE_IO_1V8_OR_3V0
+			   ),
+};
+
+static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
+		.pin_banks		= rk3399_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3399_pin_banks),
+		.label			= "RK3399-GPIO",
+		.type			= RK3399,
+		.grf_mux_offset		= 0xe000,
+		.pmu_mux_offset		= 0x0,
+		.grf_drv_offset		= 0xe100,
+		.pmu_drv_offset		= 0x80,
+		.iomux_routes		= rk3399_mux_route_data,
+		.niomux_routes		= ARRAY_SIZE(rk3399_mux_route_data),
+		.pull_calc_reg		= rk3399_calc_pull_reg_and_bit,
+		.drv_calc_reg		= rk3399_calc_drv_reg_and_bit,
+};
+
+static const struct udevice_id rockchip_pinctrl_dt_match[] = {
+	{ .compatible = "rockchip,px30-pinctrl",
+		.data = (ulong)&px30_pin_ctrl },
+	{ .compatible = "rockchip,rv1108-pinctrl",
+		.data = (ulong)&rv1108_pin_ctrl },
+	{ .compatible = "rockchip,rk2928-pinctrl",
+		.data = (ulong)&rk2928_pin_ctrl },
+	{ .compatible = "rockchip,rk3036-pinctrl",
+		.data = (ulong)&rk3036_pin_ctrl },
+	{ .compatible = "rockchip,rk3066a-pinctrl",
+		.data = (ulong)&rk3066a_pin_ctrl },
+	{ .compatible = "rockchip,rk3066b-pinctrl",
+		.data = (ulong)&rk3066b_pin_ctrl },
+	{ .compatible = "rockchip,rk3128-pinctrl",
+		.data = (ulong)&rk3128_pin_ctrl },
+	{ .compatible = "rockchip,rk3188-pinctrl",
+		.data = (ulong)&rk3188_pin_ctrl },
+	{ .compatible = "rockchip,rk3228-pinctrl",
+		.data = (ulong)&rk3228_pin_ctrl },
+	{ .compatible = "rockchip,rk3288-pinctrl",
+		.data = (ulong)&rk3288_pin_ctrl },
+	{ .compatible = "rockchip,rk3328-pinctrl",
+		.data = (ulong)&rk3328_pin_ctrl },
+	{ .compatible = "rockchip,rk3368-pinctrl",
+		.data = (ulong)&rk3368_pin_ctrl },
+	{ .compatible = "rockchip,rk3399-pinctrl",
+		.data = (ulong)&rk3399_pin_ctrl },
+	{},
+};
+
+U_BOOT_DRIVER(pinctrl_rockchip) = {
+	.name		= "rockchip_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rockchip_pinctrl_dt_match,
+	.priv_auto_alloc_size = sizeof(struct rockchip_pinctrl_priv),
+	.ops		= &rockchip_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind		= dm_scan_fdt_dev,
+#endif
+	.probe		= rockchip_pinctrl_probe,
+};

commit fe48794d5dff439919a67dfed7829019477992a7
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Jan 31 16:17:21 2018 +0800

    ARM: rockchip: Kconfig: Remove the SPL_PINCTRL config for rk3188
    
    It seems that pinctrl is not used at SPL level for rk3188,
    so remove it, and save more space.
    
    Change-Id: I4ca47328a7905447799a1e2296cce4e5aa924928
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fa1f55f838..1e2ce65842 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -55,7 +55,6 @@ config ROCKCHIP_RK3188
 	select SUPPORT_SPL
 	select SPL
 	select SPL_CLK
-	select SPL_PINCTRL
 	select SPL_REGMAP
 	select SPL_SYSCON
 	select SPL_RAM

commit e7d7797312218d27453532d1fe6e5ce7e4729fc4
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Jan 29 09:21:10 2018 +0800

    configs: rk3328_common: Increase the spl size for new pinctrl build-in
    
    If there is tpl, the spl size is not limited at dram, and can build
    in the pinctrl-rockchip driver.
    
    Change-Id: I75a30048cd6bfea75b4147c25520ceaef52ecb18
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 1ecc4f7b53..fa84acf61b 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -20,7 +20,11 @@
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
+#ifdef CONFIG_TPL
+#define CONFIG_SPL_MAX_SIZE             0x20000
+#else
 #define CONFIG_SPL_MAX_SIZE             0x10000
+#endif
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */

commit 51441a2851597673f16dc4a94645910573921ce3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Feb 3 12:36:22 2018 +0800

    make.sh: fix issues
    
    1. check INI input file exists;
    2. fix up commit 7c2526e;
    
    Change-Id: I7053c975369945a02034a108d8cab096aa35f142
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 26dd5b16c8..ac8689f80b 100755
--- a/make.sh
+++ b/make.sh
@@ -52,9 +52,9 @@ prepare()
 		exit 1
 	fi
 
-	# Clean! We assume that ./u-boot.map indicates U-Boot project is not clean,
+	# Clean! We assume that ./u-boot.map, u-boot.cfg or u-boot.lds indicates U-Boot project is not clean,
 	# maybe git checkout from rkdevelop.
-	if [ -f ./u-boot.map ]; then
+	if [ -f ./u-boot.map -o -f ./u-boot.cfg -o -f ./u-boot.lds ]; then
 		make mrproper
 		echo "auto \"make mrproper\" done..."
 	fi
@@ -98,14 +98,21 @@ pack_uboot_image()
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
 	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	echo "pack uboot okay! Input: ${DSTDIR}/out/u-boot.bin"
 }
 
 pack_loader_image()
 {
+	if [ ! -f ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini ]; then
+		echo "pack loader failed! Can't find: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
+		return
+	fi
+
 	cd ${RKBIN}
 	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
+	echo "pack loader okay! Input: ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini"
 }
 
 pack_trust_image()
@@ -114,12 +121,23 @@ pack_trust_image()
 
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
+			return
+		fi
+
 		cd ${RKBIN}
 		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
+		echo "pack trust okay! Input: ${RKBIN}/RKRUST/${RKCHIP}TRUST.ini"
 	# ARM uses loaderimage
 	else
+		if [ ! -f ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini ]; then
+			echo "pack trust failed! Can't find: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
+			return
+		fi
+
 		# OP-TEE is 132M(0x8400000) offset from DRAM base.
 		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
 		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
@@ -149,6 +167,8 @@ pack_trust_image()
 			echo "Can't find any tee bin"
 			exit 1
 		fi
+
+		echo "pack trust okay! Input: ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini"
 	fi
 }
 

commit d93242f23844453397177d4a6157273fec8dbbeb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 2 21:28:48 2018 +0800

    make.sh: pack uboot.img as first order
    
    Change-Id: I4bb55f8cedf476be5cd3418650c970c10d1d0069
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index e8dde32398..26dd5b16c8 100755
--- a/make.sh
+++ b/make.sh
@@ -158,6 +158,6 @@ make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
 fixup_chip_name
-pack_loader_image
 pack_uboot_image
+pack_loader_image
 pack_trust_image

commit 5b081643b1051e9c0822128fa1aac01326a1bbe0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Feb 1 09:53:07 2018 +0800

    usb: gadget: reset to maskrom support for rockusb
    
    Follow the subcode in reset command and add resetting to maskrom support.
    
    Change-Id: I15bedef6b83b7282f3e1a9ff3663ec56cd3affc8
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 6c07a730d7..250bcd4a79 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -48,6 +48,8 @@ struct rk_flash_info {
 	u8	flash_mask;
 } __packed;
 
+static int rkusb_rst_code; /* The subcode in reset command (0xFF) */
+
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
 	if (IS_RKUSB_UMS_DNL(name)) {
@@ -111,7 +113,13 @@ static int rkusb_check_lun(struct fsg_common *common)
 
 static void __do_reset(struct usb_ep *ep, struct usb_request *req)
 {
-	writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	u32 boot_flag = BOOT_NORMAL;
+
+	if (rkusb_rst_code == 0x03)
+		boot_flag = BOOT_BROM_DOWNLOAD;
+
+	rkusb_rst_code = 0; /* restore to default */
+	writel(boot_flag, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
 
 	do_reset(NULL, 0, 0, NULL);
 }
@@ -124,6 +132,7 @@ static int rkusb_do_reset(struct fsg_common *common,
 	bh->inreq->complete = __do_reset;
 	bh->state = BUF_STATE_EMPTY;
 
+	rkusb_rst_code = !common->cmnd[1] ? 0xff : common->cmnd[1];
 	return 0;
 }
 

commit 7c2526e987b679bf0f4d3f8071db7f068d9041fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Feb 2 14:27:13 2018 +0800

    make.sh: execute "make mrproper" when first compile
    
    fix compile issue while git checkout between rkdevelop and next-dev:
    
      Using /home/cjh/uboot-nextdev/u-boot as source for U-Boot
      /home/cjh/uboot-nextdev/u-boot is not clean, please run 'make mrproper'
      in the '/home/cjh/uboot-nextdev/u-boot' directory.
    make[1]: *** [prepare3] Error 1
    make[1]: *** Waiting for unfinished jobs....
    
    Change-Id: If9e01b407f524360ff402d8d36241f3885c90c48
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 36cfa4e24f..e8dde32398 100755
--- a/make.sh
+++ b/make.sh
@@ -51,6 +51,13 @@ prepare()
 		echo "	3. Download full release SDK Responsity"
 		exit 1
 	fi
+
+	# Clean! We assume that ./u-boot.map indicates U-Boot project is not clean,
+	# maybe git checkout from rkdevelop.
+	if [ -f ./u-boot.map ]; then
+		make mrproper
+		echo "auto \"make mrproper\" done..."
+	fi
 }
 
 select_toolchain()
@@ -146,9 +153,9 @@ pack_trust_image()
 }
 
 prepare
-select_toolchain
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
+select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
 fixup_chip_name
 pack_loader_image

commit 0773d9cf3c84029c4142bdb09ab09bf0d6a978fb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 17:53:14 2018 +0800

    rockchip: dts: rk312x: do not enable display in pre-reloc
    
    Change-Id: Ieb6474e8bde5c204ebe1fb505fb1bccfbab73814
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 297e7137ed..09f4b69a81 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -116,7 +116,6 @@
 	status = "okay";
 
 	panel@0 {
-		u-boot,dm-pre-reloc;
 		compatible = "simple-panel-dsi";
 		reg = <0>;
 		backlight = <&backlight>;
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 2427cf74df..039aeef456 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -23,18 +23,6 @@
 	u-boot,dm-pre-reloc;
 };
 
-&lvds {
-	u-boot,dm-pre-reloc;
-};
-
-&display_subsystem {
-	u-boot,dm-pre-reloc;
-};
-
-&vop {
-	u-boot,dm-pre-reloc;
-};
-
 &cru {
 	u-boot,dm-pre-reloc;
 };

commit 3016d3d41a52996a504f3cfdc50fd2438b97423e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 31 17:25:44 2018 +0800

    rockchip: video: reserve memory for fb without bind video driver
    
    The video DM need to bind video driver before relocate in order to
    get the size need by video driver, which is fixed in rockchip platform,
    we can get it without bind the driver.
    
    With this patch, we don't need to enable the video/display nodes
    in pre-reloc, and we can get all these nodes from kernel dtb.
    
    Change-Id: I02d86b69e8c10bbf47e6b421c41b6dae20667a33
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index c5ef626907..473e139118 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -34,20 +34,6 @@ DECLARE_GLOBAL_DATA_PTR;
 static LIST_HEAD(rockchip_display_list);
 static LIST_HEAD(logo_cache_list);
 
-#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
- #define DRM_ROCKCHIP_FB_WIDTH		1920
- #define DRM_ROCKCHIP_FB_HEIGHT		1080
- #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
-#else
- #define DRM_ROCKCHIP_FB_WIDTH		0
- #define DRM_ROCKCHIP_FB_HEIGHT		0
- #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
-#endif
-
-#define MEMORY_POOL_SIZE	32 * 1024 * 1024
-#define DRM_ROCKCHIP_FB_SIZE \
-	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
-
 static unsigned long memory_start;
 static unsigned long memory_end;
 
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 3036e3a1f2..79e9cc85d7 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -10,6 +10,9 @@
 #include <stdio_dev.h>
 #include <video.h>
 #include <video_console.h>
+#ifdef CONFIG_DRM_ROCKCHIP
+#include <video_rockchip.h>
+#endif
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
@@ -73,6 +76,11 @@ int video_reserve(ulong *addrp)
 	ulong size;
 
 	gd->video_top = *addrp;
+#ifdef CONFIG_DRM_ROCKCHIP
+	size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
+	*addrp = *addrp - size;
+	*addrp &= ~((1 << 20) - 1);
+#else
 	for (uclass_find_first_device(UCLASS_VIDEO, &dev);
 	     dev;
 	     uclass_find_next_device(&dev)) {
@@ -80,6 +88,7 @@ int video_reserve(ulong *addrp)
 		debug("%s: Reserving %lx bytes at %lx for video device '%s'\n",
 		      __func__, size, *addrp, dev->name);
 	}
+#endif
 	gd->video_bottom = *addrp;
 	debug("Video frame buffers from %lx to %lx\n", gd->video_bottom,
 	      gd->video_top);
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
index 4538e54463..ce764c8e46 100644
--- a/include/video_rockchip.h
+++ b/include/video_rockchip.h
@@ -7,6 +7,20 @@
 #ifndef VIDEO_ROCKCHIP_H
 #define VIDEO_ROCKCHIP_H
 
+#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
+ #define DRM_ROCKCHIP_FB_WIDTH		1920
+ #define DRM_ROCKCHIP_FB_HEIGHT		1080
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
+#else
+ #define DRM_ROCKCHIP_FB_WIDTH		0
+ #define DRM_ROCKCHIP_FB_HEIGHT		0
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
+#endif
+
+#define MEMORY_POOL_SIZE	32 * 1024 * 1024
+#define DRM_ROCKCHIP_FB_SIZE \
+	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
+
 void rockchip_show_bmp(const char *bmp);
 void rockchip_show_logo(void);
 

commit d7386f60fcce4c90915357404b538808b1890ca1
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Jan 31 11:43:17 2018 +0800

    usb: gadget: amend flash type for rockusb
    
    Add more flash type support for rockusb command.
    
    Change-Id: I8f2a2f6b5d1c3c5fb8824ce726cc3f0b6443d8ef
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 5744a123de..6c07a730d7 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -142,8 +142,14 @@ static int rkusb_do_read_flash_id(struct fsg_common *common,
 {
 	u8 *buf = (u8 *)bh->buf;
 	u32 len = common->data_size;
+	enum if_type type = ums[common->lun].block_dev.if_type;
 
-	memcpy((void *)&buf[0], "EMMC ", 5);
+	if (type == IF_TYPE_MMC)
+		memcpy((void *)&buf[0], "EMMC ", 5);
+	else if (type == IF_TYPE_RKNAND)
+		memcpy((void *)&buf[0], "NAND ", 5);
+	else
+		memcpy((void *)&buf[0], "UNKN ", 5); /* unknown */
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;

commit 31435dfd5dc22c100ec1196481cc666e5a34240d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:44:22 2018 +0800

    common: fdt_support: clean up bootargs combine
    
    1. use env_update() to combine bootargs which avoid variable repeat;
    2. use env_delete() to delete legacy property: "initrd=0x...,0x,,,".
    
    Change-Id: I5fd444a789df3f2ef9e527b9287e5173749cbb87
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index b9dfba7519..884db34119 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -291,7 +291,21 @@ int fdt_chosen(void *fdt)
 
 	str = env_get("bootargs");
 	if (str) {
-#ifndef CONFIG_ARCH_ROCKCHIP
+#ifdef CONFIG_ARCH_ROCKCHIP
+		const char *bootargs;
+
+		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
+		if (bootargs) {
+			/* Append kernel bootargs */
+			env_update("bootargs", bootargs);
+			/*
+			 * Initrd fixup: remove unused "initrd=0x...,0x...",
+			 * this for compatible with legacy parameter.txt
+			 */
+			env_delete("bootargs", "initrd=");
+			str = env_get("bootargs");
+		}
+#endif
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {
@@ -299,31 +313,6 @@ int fdt_chosen(void *fdt)
 			       fdt_strerror(err));
 			return err;
 		}
-#else
-		const char *bootargs = NULL;
-		char buf[2048];
-
-		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
-		if (bootargs) {
-			memset(buf, 0, sizeof(buf));
-			snprintf(buf, sizeof(buf), "%s %s", bootargs, str);
-			err = fdt_setprop(fdt, nodeoffset, "bootargs", buf,
-					  strlen(buf) + 1);
-			if (err < 0) {
-				printf("WARNING: could not set bootargs %s.\n",
-				       fdt_strerror(err));
-				return err;
-			}
-		} else {
-			err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
-					  strlen(str) + 1);
-			if (err < 0) {
-				printf("WARNING: could not set bootargs %s.\n",
-				       fdt_strerror(err));
-				return err;
-			}
-		}
-#endif
 	}
 
 	return fdt_fixup_stdout(fdt, nodeoffset);

commit b7090c0ffd28e393b553a07db27df17a85e6f180
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:41:57 2018 +0800

    disk: part_rkparm: use env_delete() to delete initrd for cmdline
    
    delete unused "initrd=0x...,0x...", this for compatible
    with legacy parameter.txt.
    
    Change-Id: I9eb79578196ae4537b65e57a2776fdf0225de488
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 686fa6ce29..d8b8389a4b 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -50,6 +50,12 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 
+	/*
+	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
+	 * compatible with legacy parameter.txt
+	 */
+	env_delete("bootargs", "initrd=");
+
 	while (*next) {
 		if (*next == '-') {
 			size = (~0UL);

commit 3c9ee70130264b81f12769d0473f93f09cd066c1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:39:31 2018 +0800

    env: add env_delete()
    
    Change-Id: I3a94942b1670e641c8558c64dabca0155e53e2ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 1809e6fe32..c063abfd2e 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -533,6 +533,37 @@ int env_exist(const char *varname, const char *varvalue)
 	return ret;
 }
 
+int env_delete(const char *varname, const char *varvalue)
+{
+	const char *str;
+	char *value, *start;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	value = env_get(varname);
+	if (value) {
+		start = strstr(value, varvalue);
+		if (start) {
+			/* varvalue is not the last property */
+			str = strstr(start, " ");
+			if (str) {
+				/* Terminate, so cmdline can be dest for strcat() */
+				*start = '\0';
+				/* +1 to skip white space */
+				strcat((char *)value, (str + 1));
+			/* varvalue is the last property */
+			} else {
+				/* skip white space */
+				*(start - 1) = '\0';
+			}
+		}
+	}
+
+	return 0;
+}
+
 /**
  * Set an environment variable to an integer value
  *
diff --git a/include/common.h b/include/common.h
index 60f8555409..8230914d7a 100644
--- a/include/common.h
+++ b/include/common.h
@@ -349,6 +349,15 @@ int env_update(const char *varname, const char *varvalue);
  */
 int env_exist(const char *varname, const char *varvalue);
 
+/**
+ * env_delete() - delete sub value of an environment variable
+ *
+ * @varname: Variable to look up
+ * @value: Item head of value to delete
+ * @return 0 if ok, 1 on error
+ */
+int env_delete(const char *varname, const char *varvalue);
+
 /**
  * env_set_ulong() - set an environment variable to an integer
  *

commit 736ece61ebd9c7da1e9da9120e367677311b76df
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 31 15:26:26 2018 +0800

    Revert "disk: part_rkparm: add initrd fixup for cmdline"
    
    This reverts commit 8fb96674f6cda97c7675b1f1f15938ef4224ab62.
    
    Change-Id: I10c3ec88d8f21677cfdee8f766afd9272064964d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 748012131c..686fa6ce29 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -40,8 +40,6 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	char *pend;
 	int len, offset = 0;
 	unsigned long size, start;
-	char *initrd;
-	const char *str;
 
 	if (!cmdline) {
 		printf("invalid parameter\n");
@@ -49,20 +47,6 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	}
 
 	*cmdline_end = '\0';
-
-	/*
-	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
-	 * compatible with legacy parameter.txt
-	 */
-	initrd = strstr(cmdline, "initrd=");
-	if (initrd) {
-		str = strstr(initrd, " ");
-		/* Terminate, so cmdline can be dest for strcat() */
-		*initrd = '\0';
-		/* +1 to skip current white space */
-		strcat((char *)cmdline, (str + 1));
-	}
-
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 

commit 105f3d76b62a1c2858934923b0f714710bd9ec5f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 16:39:46 2018 +0800

    rockchip: test-key: refactor code
    
    use platform_key_read() interface.
    
    Change-Id: I7d8add0a57e818eb73dc098c6f86b5967ad8b554
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index bd76ba96f5..45bf521515 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -5,367 +5,23 @@
  */
 
 #include <asm/io.h>
-#include <adc.h>
 #include <common.h>
 #include <console.h>
 #include <dm.h>
-#include <errno.h>
-#include <fdtdec.h>
-#include <malloc.h>
-#include <irq-generic.h>
-#include <irq-platform.h>
 #include <key.h>
+#include <linux/input.h>
 #include "test-rockchip.h"
-
-enum {
-	INVAL_KEY = 0,
-	ADC_KEY,
-	GPIO_KEY,
-	PMIC_KEY,
-};
-
-struct adc_key {
-	u8 channel;
-	int value;
-	int microvolt;
-	int margin;
-	int vref;
-};
-
-struct gpio_key {
-	int irq;
-};
-
-struct key_info {
-	const char *name;
-	int type;
-	struct adc_key adc;
-	struct gpio_key gpio;
-};
-
-#define ADC_MARGIN		30
-#define PMIC_PWRKEY_CNT		1
-
-static int g_key_count;
-
-static void gpio_irq_handler(int irq, void *data)
-{
-	struct key_info *key = data;
-
-	printf("gpio_irq_handler: irq=%d, key name=%s\n", irq, key->name);
-}
-
-static struct key_info *parse_dt_adc_key_node(const void *blob,
-					      int adc_key_node,
-					      struct key_info *keys)
-{
-	struct key_info *key = keys;
-	u32 adc_channels[2];
-	int node, vref, err;
-
-	/* Get vref */
-	vref = fdtdec_get_int(blob, adc_key_node,
-			      "keyup-threshold-microvolt", -1);
-	if (vref < 0) {
-		printf("failed read 'keyup-threshold-microvolt', ret=%d\n", vref);
-		return NULL;
-	}
-
-	/* Get io channel */
-	err = fdtdec_get_int_array(blob, adc_key_node, "io-channels",
-				   adc_channels, 2);
-	if (err) {
-		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
-		return NULL;
-	}
-
-	/* Parse every adc key data */
-	for (node = fdt_first_subnode(blob, adc_key_node);
-	     node >= 0;
-	     node = fdt_next_subnode(blob, node), key++) {
-		key->name = fdt_getprop(blob, node, "label", NULL);
-		key->type = ADC_KEY;
-		key->adc.vref = vref;
-		key->adc.margin = ADC_MARGIN;
-		key->adc.channel = adc_channels[1];
-		key->adc.microvolt = fdtdec_get_int(blob, node,
-				      "press-threshold-microvolt", -1);
-		if (key->adc.microvolt < 0) {
-			printf("failed read 'press-threshold-microvolt' of %s key, ret=%d\n",
-			       key->name, key->adc.microvolt);
-			return NULL;
-		}
-		/* Convert microvolt to adc value */
-		key->adc.value = key->adc.microvolt / (key->adc.vref / 1024);
-	}
-
-	return key;
-}
-
-static struct key_info *parse_dt_rockchip_key_node(const void *blob,
-						   int rockchip_key_node,
-						   struct key_info *keys)
-{
-	struct key_info *key = keys;
-	u32 gpios[2], adc_channels[2];
-	int node, err, adcval, irq;
-
-	/* Get io channel */
-	err = fdtdec_get_int_array(blob, rockchip_key_node, "io-channels",
-				   adc_channels, 2);
-	if (err) {
-		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
-		return NULL;
-	}
-
-	/* Parse every adc/gpio key data */
-	for (node = fdt_first_subnode(blob, rockchip_key_node);
-	     node >= 0;
-	     node = fdt_next_subnode(blob, node), key++) {
-		adcval = fdtdec_get_int(blob, node,
-					"rockchip,adc_value", -1);
-		/* This is a adc key */
-		if (adcval >= 0) {
-			key->name = fdt_getprop(blob, node, "label", NULL);
-			key->type = ADC_KEY;
-			key->adc.value = adcval;
-			key->adc.margin = ADC_MARGIN;
-			key->adc.channel = adc_channels[1];
-		/* This is a gpio key */
-		} else {
-			key->name = fdt_getprop(blob, node, "label", NULL);
-			key->type = GPIO_KEY;
-			err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
-			if (err) {
-				printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
-				return NULL;
-			}
-			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-			key->gpio.irq = irq;
-			irq_install_handler(irq, gpio_irq_handler, key);
-			irq_handler_enable(irq);
-			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-		}
-	}
-
-	return key;
-}
-
-static struct key_info *parse_dt_gpio_key_node(const void *blob,
-					       int gpio_key_node,
-					       struct key_info *keys)
-{
-	struct key_info *key = keys;
-	u32 gpios[2];
-	int node, irq, err;
-
-	for (node = fdt_first_subnode(blob, gpio_key_node);
-	     node >= 0;
-	     node = fdt_next_subnode(blob, node), key++) {
-		key->name = fdt_getprop(blob, node, "label", NULL);
-		key->type = GPIO_KEY;
-		err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
-		if (err) {
-			printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
-			return NULL;
-		}
-		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
-		key->gpio.irq = irq;
-		irq_install_handler(irq, gpio_irq_handler, key);
-		irq_handler_enable(irq);
-		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
-	}
-
-	return key;
-}
-
-static struct key_info *keys_init(void)
-{
-	const char *key_name = "pmic-power";
-	const void *blob = gd->fdt_blob;
-	struct key_info *key, *keys;
-	struct udevice *dev;
-	int adc_key_node, rockchip_key_node, gpio_key_node, i;
-	int adc_key_compat = 0, rockchip_key_compat = 0, gpio_key_compat = 0;
-	int count = 0;
-	const char *label[4] = { "INVAL", "ADC", "GPIO", "PMIC", };
-	/*
-	 * "rockchip,key": rockchip inner version;
-	 * "adc-keys": upsteam version;
-	 */
-	adc_key_node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
-	if (adc_key_node >= 0) {
-		if (!fdtdec_get_is_enabled(blob, adc_key_node)) {
-			printf("'adc-keys' node is disabled\n");
-		} else {
-			adc_key_compat = 1;
-			count += fdtdec_get_child_count(blob, adc_key_node);
-			printf("find 'adc-keys', board total %d keys\n", count);
-		}
-	}
-
-	rockchip_key_node = fdt_node_offset_by_compatible(blob, 0, "rockchip,key");
-	if (rockchip_key_node >= 0) {
-		if (!fdtdec_get_is_enabled(blob, rockchip_key_node)) {
-			printf("'rockchip,key' node is disabled\n");
-		} else {
-			rockchip_key_compat = 1;
-			count += fdtdec_get_child_count(blob, rockchip_key_node);
-			printf("find 'rockchip,key', board total %d keys\n", count);
-		}
-	}
-
-	gpio_key_node = fdt_node_offset_by_compatible(blob, 0, "gpio-keys");
-	if (gpio_key_node >= 0) {
-		if (!fdtdec_get_is_enabled(blob, gpio_key_node)) {
-			printf("'gpio-keys' node is disabled\n");
-		} else {
-			gpio_key_compat = 1;
-			count += fdtdec_get_child_count(blob, gpio_key_node);
-			printf("find 'gpio-key', board total %d keys\n", count);
-		}
-	}
-
-	/* reserve more for pmic pwrkey or gpio pwrkey */
-	g_key_count = count + PMIC_PWRKEY_CNT;
-	keys = calloc(g_key_count, sizeof(*key));
-	if (!keys) {
-		printf("calloc for key failed\n");
-		return NULL;
-	}
-
-	key = keys;
-
-	/* Parse adc_key_compat node */
-	if (adc_key_compat) {
-		key = parse_dt_adc_key_node(blob, adc_key_node, key);
-		if (!key) {
-			printf("parse_dt_adc_key_node failed\n");
-			goto out;
-		}
-	}
-	/* Parse rockchip_key_compat node */
-	if (rockchip_key_compat) {
-		key = parse_dt_rockchip_key_node(blob, rockchip_key_node, key);
-		if (!key) {
-			printf("parse_dt_rockchip_key_node failed\n");
-			goto out;
-		}
-	}
-	/* Parse gpio_key_compat node */
-	if (gpio_key_compat) {
-		key = parse_dt_gpio_key_node(blob, gpio_key_node, key);
-		if (!key) {
-			printf("parse_dt_gpio_key_node failed\n");
-			goto out;
-		}
-	}
-
-	/* Parse PMIC pwrkey */
-	if (uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev)) {
-		/* PMIC pwrkey not included */
-		g_key_count -= PMIC_PWRKEY_CNT;
-		printf("PMIC pwrkey not found, and will not be tested\n");
-	} else {
-		key->name = key_name;
-		key->type = PMIC_KEY;
-		printf("find 'pmic-power', board total %d keys\n", g_key_count);
-	}
-
-	printf("Support %d keys are:\n", g_key_count);
-	for (i = 0; i < g_key_count; i++) {
-		printf("\tkey-%d: name=%s, type=%s, "
-		       "[ADC]: channel=%d, vref=%d, "
-		       "microvolt=%d, value=%d, margin=%d "
-		       "[GPIO]: IRQ=%d:\n",
-		       i, keys[i].name, label[keys[i].type],
-		       keys[i].adc.channel, keys[i].adc.vref,
-		       keys[i].adc.microvolt, keys[i].adc.value,
-		       keys[i].adc.margin, keys[i].gpio.irq);
-	}
-
-	return keys;
-
-out:
-	free(keys);
-
-	return NULL;
-}
-
-static int key_test(struct key_info *keys)
+	
+int board_key_test(int argc, char * const argv[])
 {
-	struct udevice *dev = NULL;
-	struct key_info *key;
-	unsigned int adcval;
-	int adc_h, adc_l;
-	int err, i;
-
-	if (g_key_count == 0) {
-		printf("Find total 0 keys, finish test\n");
-		goto out;
-	}
-
-	printf("\nPress or release keys(Exit test by 'ctrl + c').. Start!\n");
 	while (!ctrlc()) {
-		mdelay(100);
-		for (i = 0, key = keys; i < g_key_count; i++, key++) {
-			if (key->type == ADC_KEY) {
-				err = adc_channel_single_shot("saradc",
-						key->adc.channel, &adcval);
-				if (err) {
-					printf("\t%s: read saradc value failed\n", key->name);
-				} else {
-					adc_h = key->adc.value + key->adc.margin;
-					if (key->adc.value > key->adc.margin)
-						adc_l = key->adc.value - key->adc.margin;
-					else
-						adc_l = key->adc.value;
-
-					if ((adcval <= adc_h) && (adcval >= adc_l))
-						printf("\t%s: pressed down\n", key->name);
-				}
-			} else if (key->type == GPIO_KEY) {
-				/* it is a irq, so nothing to do */
-			} else if (key->type == PMIC_KEY) {
-				if (!dev) {
-					err = uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev);
-					if (err) {
-						printf("get %s key failed\n", key->name);
-						goto out;
-					}
-				}
-				if (key_read(dev) == KEY_PRESS_DOWN)
-					printf("\t%s: pressed down\n", key->name);
-			} else {
-				printf("%s: Unknown key type!\n", key->name);
-			}
-		}
-	}
-
-	for (i = 0, key = keys; i < g_key_count; i++, key++) {
-		if (key->type == GPIO_KEY) {
-			printf("release irq of %s key\n", key->name);
-			irq_free_handler(key->gpio.irq);
-		}
+		mdelay(50);
+		platform_key_read(KEY_VOLUMEUP);
+		mdelay(50);
+		platform_key_read(KEY_VOLUMEDOWN);
+		mdelay(50);
+		platform_key_read(KEY_POWER);
 	}
 
 	return 0;
-
-out:
-	free(keys);
-
-	return -EINVAL;
-}
-
-int board_key_test(int argc, char * const argv[])
-{
-	struct key_info *keys;
-
-	keys = keys_init();
-	if (!keys) {
-		printf("%s: keys init failed\n", __func__);
-		return -EINVAL;
-	}
-
-	return key_test(keys);
 }

commit a7b534a020837deb2425e7821feb51cd7c95c4ef
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:59:15 2018 +0800

    input: rk8xx: refactor code
    
    match key uclass framework.
    
    Change-Id: Ib3677514483d7f6f08479100fae2046e4f3bdb4e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index e5d99d358a..68530a6fd0 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -28,7 +28,12 @@
 #define RK805_PWRON_RISE_INT	(1 << 0)
 #define RK805_PWRON_FALL_INT	(1 << 7)
 
-struct key_data {
+struct reg_data {
+	u8 reg;
+	u8 val;
+};
+
+struct rk8xx_key_priv {
 	u8 int_sts_reg;
 	u8 int_msk_reg;
 	u8 pwron_rise_int;
@@ -37,13 +42,6 @@ struct key_data {
 	u32 init_reg_num;
 	struct reg_data *irq_reg;
 	u32 irq_reg_num;
-	uint64_t key_down_t;
-	uint64_t key_up_t;
-};
-
-struct reg_data {
-	u8 reg;
-	u8 val;
 };
 
 static struct reg_data rk816_init_reg[] = {
@@ -76,92 +74,84 @@ static struct reg_data rk805_init_reg[] = {
 	{ RK805_INT_STS_REG, 0xff },
 };
 
-static inline uint64_t arch_counter_get_cntpct(void)
+static int rk8xx_pwrkey_read(struct udevice *dev, int code)
 {
-	uint64_t cval = 0;
-
-	isb();
-#ifdef CONFIG_ARM64
-	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
-#else
-	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
-#endif
-	return cval;
-}
+	struct input_key *key = dev_get_platdata(dev);
+	u32 report = KEY_NOT_EXIST;
 
-static uint64_t get_ms(uint64_t base)
-{
-	return (arch_counter_get_cntpct() / 24000UL) - base;
-}
+	if (key->code != code)
+		goto out;
 
-static int rk8xx_pwrkey_read(struct udevice *dev)
-{
-	struct key_data *key = dev_get_priv(dev);
-	u32 report = KEY_PRESS_NONE;
-
-	if ((key->key_up_t > key->key_down_t) &&
-	    (key->key_up_t - key->key_down_t) >= KEY_LONG_DOWN_MS) {
-		debug("%s: long key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
-		key->key_up_t = 0;
-		key->key_down_t = 0;
+	debug("%s: long key ms: %llu\n",
+	      __func__, key->up_t - key->down_t);
+
+	if ((key->up_t > key->down_t) &&
+	    (key->up_t - key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
 		report = KEY_PRESS_LONG_DOWN;
-	} else if (key->key_down_t && get_ms(key->key_down_t) >= KEY_LONG_DOWN_MS) {
-		debug("%s: long key (hold) ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
-		key->key_up_t = 0;
-		key->key_down_t = 0;
+		printf("'%s' key long pressed down\n", key->name);
+	} else if (key->down_t &&
+		   key_get_timer(key->down_t) >= KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
 		report = KEY_PRESS_LONG_DOWN;
-	} else if ((key->key_up_t > key->key_down_t) &&
-		   (key->key_up_t - key->key_down_t) < KEY_LONG_DOWN_MS) {
-		debug("%s: short key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
-		key->key_up_t = 0;
-		key->key_down_t = 0;
+		printf("'%s' key long pressed down(hold)\n", key->name);
+	} else if ((key->up_t > key->down_t) &&
+		   (key->up_t - key->down_t) < KEY_LONG_DOWN_MS) {
+		key->up_t = 0;
+		key->down_t = 0;
 		report = KEY_PRESS_DOWN;
+		printf("'%s' key pressed down\n", key->name);
 	} else {
-		debug("%s: key up: %llu, down: %llu\n", __func__, key->key_up_t, key->key_down_t);
+		report = KEY_PRESS_NONE;
 	}
 
+out:
 	return report;
 }
 
 static void pwrkey_irq_handler(int irq, void *data)
 {
 	struct udevice *dev = data;
-	struct key_data *key = dev_get_priv(dev);
+	struct rk8xx_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
 	int ret, val, i;
 
 	/* read status */
-	val = pmic_reg_read(dev->parent, key->int_sts_reg);
+	val = pmic_reg_read(dev->parent, priv->int_sts_reg);
 	if (val < 0) {
 		printf("%s: i2c read failed, ret=%d\n", __func__, val);
 		return;
 	}
 
 	/* fall event */
-	if (val & key->pwron_fall_int) {
-		key->key_down_t = get_ms(0);
-		debug("%s: key down: %llu ms\n", __func__, key->key_down_t);
+	if (val & priv->pwron_fall_int) {
+		key->down_t = key_get_timer(0);
+		debug("%s: key down: %llu ms\n", __func__, key->down_t);
 	}
 
 	/* rise event */
-	if (val & key->pwron_rise_int) {
-		key->key_up_t = get_ms(0);
-		debug("%s: key up: %llu ms\n", __func__, key->key_up_t);
+	if (val & priv->pwron_rise_int) {
+		key->up_t = key_get_timer(0);
+		debug("%s: key up: %llu ms\n", __func__, key->up_t);
 	}
 
 	/* clear intertup */
-	for (i = 0; i < key->irq_reg_num; i++) {
+	for (i = 0; i < priv->irq_reg_num; i++) {
 		ret = pmic_reg_write(dev->parent,
-				     key->irq_reg[i].reg,
-				     key->irq_reg[i].val);
+				     priv->irq_reg[i].reg,
+				     priv->irq_reg[i].val);
 		if (ret < 0) {
 			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
-			       __func__, key->irq_reg[i].reg, ret);
+			       __func__, priv->irq_reg[i].reg, ret);
 		}
 	}
 }
 
 static int pwrkey_interrupt_init(struct udevice *dev)
 {
+	struct input_key *key = dev_get_platdata(dev);
 	u32 interrupt[2], phandle;
 	int irq, ret;
 
@@ -177,6 +167,8 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 		return ret;
 	}
 
+	key->name = "pwrkey";
+	key->code = KEY_POWER;
 	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
 	irq_install_handler(irq, pwrkey_irq_handler, dev);
 	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
@@ -186,38 +178,37 @@ static int pwrkey_interrupt_init(struct udevice *dev)
 }
 
 static const struct dm_key_ops key_ops = {
-	.type = KEY_POWER,
-	.name = "pmic-pwrkey",
+	.name = "rk8xx-pwrkey",
 	.read = rk8xx_pwrkey_read,
 };
 
 static int rk8xx_pwrkey_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
-	struct key_data *key = dev_get_priv(dev);
+	struct rk8xx_key_priv *priv = dev_get_priv(dev);
 	int ret, i;
 
 	switch (rk8xx->variant) {
 	case RK805_ID:
-		key->int_sts_reg = RK805_INT_STS_REG;
-		key->int_msk_reg = RK805_INT_MSK_REG;
-		key->pwron_rise_int = RK805_PWRON_RISE_INT;
-		key->pwron_fall_int = RK805_PWRON_FALL_INT;
-		key->init_reg = rk805_init_reg;
-		key->init_reg_num = ARRAY_SIZE(rk805_init_reg);
-		key->irq_reg = rk805_irq_reg;
-		key->irq_reg_num = ARRAY_SIZE(rk805_irq_reg);
+		priv->int_sts_reg = RK805_INT_STS_REG;
+		priv->int_msk_reg = RK805_INT_MSK_REG;
+		priv->pwron_rise_int = RK805_PWRON_RISE_INT;
+		priv->pwron_fall_int = RK805_PWRON_FALL_INT;
+		priv->init_reg = rk805_init_reg;
+		priv->init_reg_num = ARRAY_SIZE(rk805_init_reg);
+		priv->irq_reg = rk805_irq_reg;
+		priv->irq_reg_num = ARRAY_SIZE(rk805_irq_reg);
 		break;
 
 	case RK816_ID:
-		key->int_sts_reg = RK816_INT_STS_REG1;
-		key->int_msk_reg = RK816_INT_MSK_REG1;
-		key->pwron_rise_int = RK816_PWRON_RISE_INT;
-		key->pwron_fall_int = RK816_PWRON_FALL_INT;
-		key->init_reg = rk816_init_reg;
-		key->init_reg_num = ARRAY_SIZE(rk816_init_reg);
-		key->irq_reg = rk816_irq_reg;
-		key->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
+		priv->int_sts_reg = RK816_INT_STS_REG1;
+		priv->int_msk_reg = RK816_INT_MSK_REG1;
+		priv->pwron_rise_int = RK816_PWRON_RISE_INT;
+		priv->pwron_fall_int = RK816_PWRON_FALL_INT;
+		priv->init_reg = rk816_init_reg;
+		priv->init_reg_num = ARRAY_SIZE(rk816_init_reg);
+		priv->irq_reg = rk816_irq_reg;
+		priv->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
 
 	default:
@@ -225,13 +216,13 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 	}
 
 	/* mask and clear intertup */
-	for (i = 0; i < key->init_reg_num; i++) {
+	for (i = 0; i < priv->init_reg_num; i++) {
 		ret = pmic_reg_write(dev->parent,
-				     key->init_reg[i].reg,
-				     key->init_reg[i].val);
+				     priv->init_reg[i].reg,
+				     priv->init_reg[i].val);
 		if (ret < 0) {
 			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
-			       __func__, key->init_reg[i].reg, ret);
+			       __func__, priv->init_reg[i].reg, ret);
 			return ret;
 		}
 	}
@@ -242,7 +233,8 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 U_BOOT_DRIVER(rk8xx_pwrkey) = {
 	.name   = "rk8xx_pwrkey",
 	.id     = UCLASS_KEY,
-	.probe  = rk8xx_pwrkey_probe,
 	.ops	= &key_ops,
-	.priv_auto_alloc_size = sizeof(struct key_data),
+	.probe  = rk8xx_pwrkey_probe,
+	.platdata_auto_alloc_size = sizeof(struct input_key),
+	.priv_auto_alloc_size = sizeof(struct rk8xx_key_priv),
 };

commit debee64a8e8c44ca5b01d539d7d48b532dc98467
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:33:52 2018 +0800

    input: key: add rk key driver
    
    rk key device node can contain adc key and gpio key.
    
    Change-Id: I6e3bd4022bba6324c35d2c317183a6a2cb69ed06
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 968f4f7820..85eb573323 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -65,3 +65,10 @@ config GPIO_KEY
 	default y
 	help
 	  This adds a driver for the gpio keys support.
+
+config RK_KEY
+	bool "Enable rk keys support"
+	depends on DM_KEY
+	default y
+	help
+	  This adds a driver for the rk keys support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index ce36187403..73235e1d88 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -24,3 +24,4 @@ obj-y += input.o
 obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
 obj-$(CONFIG_ADC_KEY) += adc_key.o
 obj-$(CONFIG_GPIO_KEY) += gpio_key.o
+obj-$(CONFIG_RK_KEY) += rk_key.o
diff --git a/drivers/input/rk_key.c b/drivers/input/rk_key.c
new file mode 100644
index 0000000000..1f68872ae1
--- /dev/null
+++ b/drivers/input/rk_key.c
@@ -0,0 +1,221 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <adc.h>
+#include <common.h>
+#include <console.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <key.h>
+#include <linux/input.h>
+#include <errno.h>
+#include <dm/read.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+
+#define ADC_MARGIN		30
+#define MAX_KEY_NR		10
+
+struct rk_key_priv {
+	u32 key_nr;
+};
+
+enum {
+	INVAL_KEY = 0,
+	ADC_KEY,
+	GPIO_KEY,
+};
+
+static void gpio_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct rk_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int i;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].irq != irq)
+			continue;
+
+		/* up event */
+		if (irq_get_gpio_level(irq)) {
+			key[i].up_t = key_get_timer(0);
+			debug("%s: key down: %llu ms\n",
+			      key[i].name, key[i].down_t);
+		/* down event */
+		} else {
+			key[i].down_t = key_get_timer(0);
+			debug("%s: key up: %llu ms\n",
+			      key[i].name, key[i].up_t);
+		}
+		/* Must delay */
+		mdelay(10);
+		irq_revert_irq_type(irq);
+	}
+}
+
+static int rk_keys_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 adc_channels[2], gpios[2], adcval, i = 0;
+	ofnode node;
+	int irq;
+
+	/* Get IO channel */
+	if (dev_read_u32_array(dev, "io-channels", adc_channels, 2)) {
+		printf("%s: failed to read 'io-channels'\n", __func__);
+		return -EINVAL;
+	}
+
+	dev_for_each_subnode(node, dev) {
+		/* This is an ACD key */
+		if (!ofnode_read_u32(node, "rockchip,adc_value", &adcval)) {
+			key[i].name = ofnode_read_string(node, "label");
+			key[i].flag = ADC_KEY;
+			key[i].margin = ADC_MARGIN;
+			key[i].value = adcval;
+			key[i].channel = adc_channels[1];
+			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+				printf("%s: failed to read 'linux,code'\n",
+				       key[i].name);
+				return -EINVAL;
+			}
+		/* This is a GPIO key */
+		} else {
+			key[i].name = ofnode_read_string(node, "label");
+			key[i].flag = GPIO_KEY;
+			if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
+				printf("%s: failed to read 'gpios'\n",
+				       key[i].name);
+				return -EINVAL;
+			}
+			if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+				printf("%s: failed read 'linux,code'\n",
+				       key[i].name);
+				return -EINVAL;
+			}
+
+			/* Request irq */
+			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+			if (irq < 0) {
+				printf("%s: failed to request irq, ret=%d\n",
+				       __func__, irq);
+				return irq;
+			}
+			key[i].irq = irq;
+			irq_install_handler(irq, gpio_irq_handler, dev);
+			irq_handler_enable(irq);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+		}
+
+		debug("%s: name=%s: code=%d, val=%d, channel=%d, flag=%d, margin=%d\n",
+		      __func__, key[i].name, key[i].code, key[i].value,
+		      key[i].channel, key[i].flag, key[i].margin);
+
+		/* Next node */
+		i++;
+		priv->key_nr = i;
+		if (i >= MAX_KEY_NR) {
+			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int rk_keys_read(struct udevice *dev, int code)
+{
+	struct rk_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int report = KEY_NOT_EXIST;
+	int max, min, i = 0;
+	unsigned int adcval;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].code != code)
+			continue;
+
+		if (key[i].flag == ADC_KEY) {
+			if (adc_channel_single_shot("saradc",
+						    key[i].channel, &adcval)) {
+				printf("%s: failed to read saradc\n",
+				       key[i].name);
+			} else {
+				/* Get min, max */
+				max = key[i].value + key[i].margin;
+				if (key[i].value > key[i].margin)
+					min = key[i].value - key[i].margin;
+				else
+					min = key[i].value;
+
+				/* Check */
+				if ((adcval <= max) && (adcval >= min)) {
+					report = KEY_PRESS_DOWN;
+					printf("'%s' key pressed down\n",
+					       key[i].name);
+				} else {
+					report = KEY_PRESS_NONE;
+				}
+			}
+			break;
+		} else {
+			debug("%s: ms: %llu, up=%llu, down=%llu\n",
+			      key[i].name, key[i].up_t - key[i].down_t,
+			      key[i].up_t, key[i].down_t);
+
+			if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
+			    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
+				key[i].up_t = 0;
+				key[i].down_t = 0;
+				report = KEY_PRESS_LONG_DOWN;
+				printf("'%s' key long pressed down\n",
+				       key[i].name);
+			} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
+				   KEY_LONG_DOWN_MS) {
+				key[i].up_t = 0;
+				key[i].down_t = 0;
+				report = KEY_PRESS_LONG_DOWN;
+				printf("'%s' key long pressed down(hold)\n",
+				       key[i].name);
+			} else if ((key[i].up_t > key[i].down_t) &&
+				   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
+				key[i].up_t = 0;
+				key[i].down_t = 0;
+				report = KEY_PRESS_DOWN;
+				printf("'%s' key pressed down\n", key[i].name);
+			} else {
+				report = KEY_PRESS_NONE;
+			}
+		}
+	}
+
+	return report;
+}
+
+static const struct dm_key_ops key_ops = {
+	.name = "rk-keys",
+	.read = rk_keys_read,
+};
+
+static const struct udevice_id rk_keys_ids[] = {
+	{ .compatible = "rockchip,key" },
+	{ },
+};
+
+U_BOOT_DRIVER(rk_keys) = {
+	.name   = "rk-keys",
+	.id     = UCLASS_KEY,
+	.ops	= &key_ops,
+	.of_match = rk_keys_ids,
+	.ofdata_to_platdata = rk_keys_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
+	.priv_auto_alloc_size = sizeof(struct rk_key_priv),
+};

commit c8be85008ac42d56764e8ada454b0b25360934f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:31:02 2018 +0800

    input: key: add gpio key driver
    
    use gpio interrupt to detect key event.
    
    Change-Id: I5eea25ef6da26f6aaefd99458ee08189b696df87
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 0c49b3884a..968f4f7820 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -58,3 +58,10 @@ config ADC_KEY
 	default y
 	help
 	  This adds a driver for the adc keys support.
+
+config GPIO_KEY
+	bool "Enable gpio keys support"
+	depends on DM_KEY
+	default y
+	help
+	  This adds a driver for the gpio keys support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 2b7c05747c..ce36187403 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -23,3 +23,4 @@ endif
 obj-y += input.o
 obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
 obj-$(CONFIG_ADC_KEY) += adc_key.o
+obj-$(CONFIG_GPIO_KEY) += gpio_key.o
diff --git a/drivers/input/gpio_key.c b/drivers/input/gpio_key.c
new file mode 100644
index 0000000000..f14eec9a40
--- /dev/null
+++ b/drivers/input/gpio_key.c
@@ -0,0 +1,163 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <adc.h>
+#include <common.h>
+#include <console.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <key.h>
+#include <linux/input.h>
+#include <errno.h>
+#include <dm/read.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+
+#define MAX_KEY_NR	10
+
+struct gpio_key_priv {
+	u32 key_nr;
+};
+
+static void gpio_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct gpio_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int i;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].irq != irq)
+			continue;
+
+		/* up event */
+		if (irq_get_gpio_level(irq)) {
+			key[i].up_t = key_get_timer(0);
+			debug("%s: key down: %llu ms\n",
+			      key[i].name, key[i].down_t);
+		/* down event */
+		} else {
+			key[i].down_t = key_get_timer(0);
+			debug("%s: key up: %llu ms\n",
+			      key[i].name, key[i].up_t);
+		}
+		/* Must delay */
+		mdelay(10);
+		irq_revert_irq_type(irq);
+	}
+}
+
+static int gpio_key_ofdata_to_platdata(struct udevice *dev)
+{
+	struct gpio_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 gpios[2], i = 0;
+	ofnode node;
+	int irq;
+
+	dev_for_each_subnode(node, dev) {
+		key[i].name = ofnode_read_string(node, "label");
+		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+			printf("failed read 'linux,code' of %s key\n",
+			       key[i].name);
+			return -EINVAL;
+		}
+		if (ofnode_read_u32_array(node, "gpios", gpios, 2)) {
+			printf("failed to read 'gpios' of %s key\n",
+			       key[i].name);
+			return -EINVAL;
+		}
+
+		/* Must register as interrupt, be able to wakeup system */
+		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+		if (irq < 0) {
+			printf("failed to request irq for gpio, ret=%d\n", irq);
+			return irq;
+		}
+		key[i].irq = irq;
+		irq_install_handler(irq, gpio_irq_handler, dev);
+		irq_handler_enable(irq);
+		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+
+		debug("%s: name=%s: code=%d\n",
+		      __func__, key[i].name, key[i].code);
+
+		/* Next node */
+		i++;
+		priv->key_nr = i;
+		if (i >= MAX_KEY_NR) {
+			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int gpio_key_read(struct udevice *dev, int code)
+{
+	struct gpio_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 report = KEY_NOT_EXIST;
+	int i = 0;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].code != code)
+			continue;
+
+		debug("%s: long key ms: %llu, up=%llu, down=%llu\n",
+		      key[i].name, key[i].up_t - key[i].down_t,
+		      key[i].up_t, key[i].down_t);
+
+		if (key[i].down_t && (key[i].up_t > key[i].down_t) &&
+		    (key[i].up_t - key[i].down_t) >= KEY_LONG_DOWN_MS) {
+			key[i].up_t = 0;
+			key[i].down_t = 0;
+			report = KEY_PRESS_LONG_DOWN;
+			printf("'%s' key long pressed down\n", key[i].name);
+		} else if (key[i].down_t && key_get_timer(key[i].down_t) >=
+			   KEY_LONG_DOWN_MS) {
+			key[i].up_t = 0;
+			key[i].down_t = 0;
+			report = KEY_PRESS_LONG_DOWN;
+			printf("'%s' key long pressed down(hold)\n",
+			       key[i].name);
+		} else if ((key[i].up_t > key[i].down_t) &&
+			   (key[i].up_t - key[i].down_t) < KEY_LONG_DOWN_MS) {
+			key[i].up_t = 0;
+			key[i].down_t = 0;
+			report = KEY_PRESS_DOWN;
+			printf("'%s' key pressed down\n", key[i].name);
+		} else {
+			report = KEY_PRESS_NONE;
+		}
+	}
+
+	return report;
+}
+
+static const struct dm_key_ops key_ops = {
+	.name = "gpio-keys",
+	.read = gpio_key_read,
+};
+
+static const struct udevice_id gpio_key_ids[] = {
+	{ .compatible = "gpio-keys" },
+	{ },
+};
+
+U_BOOT_DRIVER(gpio_keys) = {
+	.name   = "gpio-keys",
+	.id     = UCLASS_KEY,
+	.of_match = gpio_key_ids,
+	.ops	= &key_ops,
+	.ofdata_to_platdata = gpio_key_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
+	.priv_auto_alloc_size = sizeof(struct gpio_key_priv),
+};

commit 68ed833817dbfd84dd9abe87c046b4573a71be9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:28:08 2018 +0800

    input: key: add adc key driver
    
    Change-Id: I07c044942aa89309c48c79e26a86c3a61437deec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 69fea3cb0d..0c49b3884a 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -51,3 +51,10 @@ config RK8XX_PWRKEY
 	default y
 	help
 	  This adds a driver for the RK805/816 pwrkey support.
+
+config ADC_KEY
+	bool "Enable adc keys support"
+	depends on DM_KEY
+	default y
+	help
+	  This adds a driver for the adc keys support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 510c4d1cef..2b7c05747c 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
 endif
 obj-y += input.o
 obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
+obj-$(CONFIG_ADC_KEY) += adc_key.o
diff --git a/drivers/input/adc_key.c b/drivers/input/adc_key.c
new file mode 100644
index 0000000000..bf25f10198
--- /dev/null
+++ b/drivers/input/adc_key.c
@@ -0,0 +1,141 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <dm/read.h>
+#include <adc.h>
+#include <common.h>
+#include <console.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <key.h>
+#include <linux/input.h>
+
+#define ADC_MARGIN		30
+#define MAX_KEY_NR		10
+
+struct adc_key_priv {
+	u32 key_nr;
+};
+
+static int adc_keys_ofdata_to_platdata(struct udevice *dev)
+{
+	struct adc_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	u32 adc_channels[2], i = 0, microvolt;
+	int vref, err;
+	ofnode node;
+
+	/* Get vref */
+	vref = dev_read_u32_default(dev, "keyup-threshold-microvolt", -1);
+	if (vref < 0) {
+		printf("failed to read 'keyup-threshold-microvolt', ret=%d\n",
+		       vref);
+		return -EINVAL;
+	}
+
+	/* Get IO channel */
+	err = dev_read_u32_array(dev, "io-channels", adc_channels, 2);
+	if (err) {
+		printf("failed to read 'io-channels' of %s key, ret=%d\n",
+		       key->name, err);
+		return -EINVAL;
+	}
+
+	/* Parse every adc key data */
+	dev_for_each_subnode(node, dev) {
+		key[i].name = ofnode_read_string(node, "label");
+		key[i].vref = vref;
+		key[i].margin = ADC_MARGIN;
+		key[i].channel = adc_channels[1];
+		if (ofnode_read_u32(node, "linux,code", &key[i].code)) {
+			printf("%s: failed to read 'linux,code', ret=%d\n",
+			       key[i].name, key[i].code);
+			return -EINVAL;
+		}
+		if (ofnode_read_u32(node, "press-threshold-microvolt",
+				    &microvolt)) {
+			printf("%s: failed read 'press-threshold-microvolt', ret=%d\n",
+			       key[i].name, microvolt);
+			return -EINVAL;
+		}
+		/* Convert microvolt to adc value */
+		key[i].value = microvolt / (key[i].vref / 1024);
+
+		debug("%s: name=%s: code=%d, vref=%d, margin=%d, channel=%d, val=%d\n",
+		      __func__, key[i].name, key[i].code, key[i].vref,
+		      key[i].margin, key[i].channel, key[i].value);
+
+		/* Next node */
+		i++;
+		priv->key_nr = i;
+		if (i >= MAX_KEY_NR) {
+			printf("Too many keys, Max support: %d\n", MAX_KEY_NR);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static int adc_keys_read(struct udevice *dev, int code)
+{
+	struct adc_key_priv *priv = dev_get_priv(dev);
+	struct input_key *key = dev_get_platdata(dev);
+	int report = KEY_NOT_EXIST;
+	int max, min, i = 0;
+	unsigned int adcval;
+
+	for (i = 0; i < priv->key_nr; i++) {
+		if (key[i].code != code)
+			continue;
+
+		if (adc_channel_single_shot("saradc",
+					    key[i].channel, &adcval)) {
+			printf("%s: failed to read saradc\n", key[i].name);
+		} else {
+			/* Get min, max */
+			max = key[i].value + key[i].margin;
+			if (key[i].value > key[i].margin)
+				min = key[i].value - key[i].margin;
+			else
+				min = key[i].value;
+
+			/* Check */
+			if ((adcval <= max) && (adcval >= min)) {
+				report = KEY_PRESS_DOWN;
+				printf("'%s' key pressed down\n",
+				       key[i].name);
+			} else {
+				report = KEY_PRESS_NONE;
+			}
+		}
+		break;
+	}
+
+	return report;
+}
+
+static const struct dm_key_ops key_ops = {
+	.name = "adc_keys",
+	.read = adc_keys_read,
+};
+
+static const struct udevice_id adc_keys_ids[] = {
+	{ .compatible = "adc-keys" },
+	{ },
+};
+
+U_BOOT_DRIVER(adc_keys) = {
+	.name   = "adc-keys",
+	.id     = UCLASS_KEY,
+	.ops	= &key_ops,
+	.of_match = adc_keys_ids,
+	.ofdata_to_platdata = adc_keys_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct input_key) * MAX_KEY_NR,
+	.priv_auto_alloc_size = sizeof(struct adc_key_priv),
+};

commit d4e1125bbcfb417adfb3dc61cfbb8f1dd72da9c4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:38:33 2018 +0800

    power: charge animation: use platform_read_key()
    
    Change-Id: Idbcec18cfacb74305880c8e207e51b1ff204a948
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 525d44dcac..c5471bc71e 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -35,7 +35,6 @@ struct charge_image {
 struct charge_animation_priv {
 	struct udevice *pmic;
 	struct udevice *fg;
-	struct udevice *pwrkey;
 	const struct charge_image *image;
 	int image_num;
 };
@@ -170,11 +169,11 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int check_key_press(struct udevice *dev)
+static int check_key_press(void)
 {
 	u32 state;
 
-	state = key_read(dev);
+	state = platform_key_read(KEY_POWER);
 	if (state < 0)
 		printf("read power key failed: %d\n", state);
 
@@ -232,7 +231,6 @@ static int charge_animation_show(struct udevice *dev)
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 	struct charge_animation_priv *priv = dev_get_priv(dev);
 	const struct charge_image *image = priv->image;
-	struct udevice *pwrkey = priv->pwrkey;
 	struct udevice *pmic = priv->pmic;
 	struct udevice *fg = priv->fg;
 	const char *preboot = env_get("preboot");
@@ -424,7 +422,7 @@ static int charge_animation_show(struct udevice *dev)
 		 * Short key event: turn on/off screen;
 		 * Long key event: show logo and boot system or still charging.
 		 */
-		key_state = check_key_press(pwrkey);
+		key_state = check_key_press();
 		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
@@ -516,7 +514,7 @@ static const struct dm_charge_display_ops charge_animation_ops = {
 static int charge_animation_probe(struct udevice *dev)
 {
 	struct charge_animation_priv *priv = dev_get_priv(dev);
-	struct udevice *pwrkey, *fg, *pmic;
+	struct udevice *fg, *pmic;
 	int ret;
 
 	/* Get PMIC */
@@ -527,20 +525,6 @@ static int charge_animation_probe(struct udevice *dev)
 	}
 	priv->pmic = pmic;
 
-	/* Get power key */
-	for (uclass_first_device(UCLASS_KEY, &pwrkey);
-	     pwrkey;
-	     uclass_next_device(&pwrkey)) {
-		if (key_type(pwrkey) == KEY_POWER) {
-			priv->pwrkey = pwrkey;
-			break;
-		}
-	}
-	if (!priv->pwrkey) {
-		printf("Can't find any power key\n");
-		return -ENOSYS;
-	}
-
 	/* Get fuel gauge */
 	ret = uclass_get_device(UCLASS_FG, 0, &fg);
 	if (ret) {

commit a2df960601036d3fd0d00ea8f43cdde52b5eddbe
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:34:49 2018 +0800

    dm: key: provide universal key read interface
    
    clean up code.
    
    Change-Id: I532be111dc971ff0fdd9014e7e01a13ea50483fd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 6abd1cf3c0..4a437c920e 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -6,35 +6,62 @@
 
 #include <dm.h>
 #include <key.h>
+#include <common.h>
+#include <dm.h>
 
-int key_read(struct udevice *dev)
+static inline uint64_t arch_counter_get_cntpct(void)
 {
-	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+	uint64_t cval = 0;
 
-	if (!ops || !ops->read)
-		return -ENOSYS;
+	isb();
+#ifdef CONFIG_ARM64
+	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
+#else
+	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+#endif
+	return cval;
+}
+
+uint64_t key_get_timer(uint64_t base)
+{
+	uint64_t cntpct;
+
+	cntpct = arch_counter_get_cntpct() / 24000UL;
+	return (cntpct > base) ? (cntpct - base) : 0;
+}
 
-	return ops->read(dev);
+static int key_state_valid(int state)
+{
+	return (state >= KEY_PRESS_NONE && state < KEY_NOT_EXIST);
 }
 
-int key_type(struct udevice *dev)
+static int key_read(struct udevice *dev, int code)
 {
 	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
 
-	if (!ops || !ops->type)
+	if (!ops || !ops->read)
 		return -ENOSYS;
 
-	return ops->type;
+	return ops->read(dev, code);
 }
 
-const char *key_name(struct udevice *dev)
+int platform_key_read(int code)
 {
-	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+	struct udevice *dev;
+	int report = KEY_NOT_EXIST;
 
-	if (!ops || !ops->name)
-		return NULL;
+	for (uclass_first_device(UCLASS_KEY, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		debug("key dev.name = %s, code = %d\n", dev->name, code);
+		report = key_read(dev, code);
+		if (key_state_valid(report)) {
+			debug("key dev.name = %s, state=%d\n", dev->name, report);
+			break;
+		}
+	}
 
-	return ops->name;
+	return report;
 }
 
 UCLASS_DRIVER(key) = {
diff --git a/include/key.h b/include/key.h
index f5fe4fb5fe..fcbd4274d5 100644
--- a/include/key.h
+++ b/include/key.h
@@ -14,16 +14,31 @@ enum key_state {
 	KEY_PRESS_UP,
 	KEY_PRESS_DOWN,
 	KEY_PRESS_LONG_DOWN,
+	KEY_NOT_EXIST,
 };
 
 struct dm_key_ops {
 	int type;
 	const char *name;
-	int (*read)(struct udevice *dev);
+	int (*read)(struct udevice *dev, int code);
+	int (*exist)(struct udevice *dev, int code);
 };
 
-int key_read(struct udevice *dev);
-int key_type(struct udevice *dev);
-const char *key_label(struct udevice *dev);
+struct input_key {
+	const char *name;
+	u32 code;
+	u32 channel;
+	u32 value;
+	u32 margin;
+	u32 vref;
+	int flag;
+
+	u32 irq;
+	u64 up_t;
+	u64 down_t;
+};
+
+uint64_t key_get_timer(uint64_t base);
+int platform_key_read(int code);
 
 #endif

commit 6e806ac8f70b0de1a04bdb09a6caeaaf0a4197e9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 26 10:14:00 2018 +0800

    android: fix rockchip_get_resource_file compile warning
    
    Change-Id: Ie510718333ef379f733ee50fed40058225281a7e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index 382157af16..0013f33cb2 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -10,6 +10,9 @@
 #include <malloc.h>
 #include <mapmem.h>
 #include <errno.h>
+#ifdef CONFIG_RKIMG_BOOTLOADER
+#include <asm/arch/resource_img.h>
+#endif
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
 #define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
@@ -164,7 +167,8 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
 #ifdef CONFIG_RKIMG_BOOTLOADER
-	*rd_data += (rockchip_get_resource_file(*rd_data, ANDROID_ARG_FDT_FILENAME))
+	*rd_data += (rockchip_get_resource_file((void *)*rd_data,
+		     ANDROID_ARG_FDT_FILENAME))
 			* 512;
 #endif
 	return 0;

commit 058af259c3c8870ae6718057811714b67901b8bd
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Jan 29 15:14:37 2018 +0800

    configs: rockchip: rv1108: enable BOUNCE_BUFFER
    
    Rockchip sfc will use bounce buffer to deal with
    dma transfer.
    
    Change-Id: Ib4bf7aad7e2078e2fa0526df46f2ca3670132326
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 08198f06a3..065ecc8193 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -21,6 +21,8 @@
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x110A
 
+#define CONFIG_BOUNCE_BUFFER
+
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 

commit da4954b709e6dc01ce8fd99d07e846a514baa39c
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Jan 26 17:49:51 2018 +0800

    spi: rockchip_sfc: store command/addr in independent var
    
    Store command/address/read write mode/which passed from
    upper spi flash framework in independt var will make things
    easier when handle it.
    
    Change-Id: I65d645b2e1a53e18a7605c9496a6c43e938c91b4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 0537bec565..48f2457338 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -41,6 +41,10 @@ struct rockchip_sfc {
 	unsigned int speed_hz;
 	u32 cmd;
 	u32 addr;
+	u8 addr_bits;
+	u8 dummy_bits;
+	u8 rw;
+	u32 trb;
 };
 
 static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
@@ -148,7 +152,7 @@ static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
 {
 	int type = IF_TYPE_STD;
 
-	if (sfc->cmd & SFC_WR) {
+	if (sfc->rw == SFC_WR) {
 		if (sfc->mode & SPI_TX_QUAD)
 			type = IF_TYPE_QUAD;
 		else if (sfc->mode & SPI_TX_DUAL)
@@ -167,13 +171,13 @@ static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
 	return type;
 }
 
-static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
+static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 val = 0x02;
 	u8 data_width = IF_TYPE_STD;
 
-	if (sfc->cmd & SFC_ADDR_XBITS)
+	if (sfc->addr_bits & SFC_ADDR_XBITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
@@ -181,12 +185,20 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
 	rockchip_sfc_wait_idle(sfc, 10);
 
 	writel(val, &regs->ctrl);
-	writel(sfc->cmd, &regs->cmd);
-	if (sfc->cmd & SFC_ADDR_XBITS)
+
+	val = sfc->cmd;
+	val |= trb << SFC_TRB_SHIFT;
+	val |= sfc->rw << SFC_RW_SHIFT;
+	val |= sfc->addr_bits << SFC_ADDR_BITS_SHIFT;
+	val |= sfc->dummy_bits << SFC_DUMMY_BITS_SHIFT;
+
+	writel(val, &regs->cmd);
+
+	if (sfc->addr_bits & SFC_ADDR_XBITS)
 		writel(sfc->addr, &regs->addr);
 }
 
-static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
+static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer, u32 trb)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	int timeout = 1000;
@@ -194,7 +206,7 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
 	int risr;
 	unsigned long tbase;
 
-	rockchip_sfc_setup_xfer(sfc);
+	rockchip_sfc_setup_xfer(sfc, trb);
 
 	writel(0xFFFFFFFF, &regs->iclr);
 	writel((u32)buffer, &regs->dmaaddr);
@@ -219,25 +231,22 @@ static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
 static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	u32 trb;
-	u32 *p32_data = buf;
 	int ret = 0;
 
 	while (len) {
 		trb = min(len, (u32)SFC_MAX_TRB);
-		sfc->cmd &= ~SFC_TRB_MASK;
-		sfc->cmd |= (trb << SFC_TRB_SHIFT);
-		ret = rockchip_sfc_do_dma_xfer(sfc, p32_data);
+		ret = rockchip_sfc_do_dma_xfer(sfc, buf, trb);
 		if (ret < 0)
 			break;
 		len -= trb;
 		sfc->addr += trb;
-		p32_data += (trb >> 2);
+		buf += (trb >> 2);
 	}
 
 	return ret;
 }
 
-static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
+static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int rw,
 					u32 timeout)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
@@ -247,7 +256,7 @@ static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
 
 	do {
 		fsr = readl(&regs->fsr);
-		if (wr)
+		if (rw == SFC_WR)
 			level = (fsr & SFC_TXLV_MASK) >> SFC_TXLV_SHIFT;
 		else
 			level = (fsr & SFC_RXLV_MASK) >> SFC_RXLV_SHIFT;
@@ -259,7 +268,7 @@ static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
 	return level;
 }
 
-static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_write_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
@@ -269,7 +278,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	u8 count;
 
 	while (words) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_WR, 1000);
 		if (tx_level <= 0)
 			return tx_level;
 		count = min(words, (u32)tx_level);
@@ -278,9 +287,9 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		words -= count;
 	}
 
-	/* handle the last none word aligned bytes */
+	/* handle the last non 4byte aligned bytes */
 	if (bytes) {
-		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_WR, 1000);
 		if (tx_level <= 0)
 			return tx_level;
 		memcpy(&val, buf, bytes);
@@ -290,7 +299,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	return 0;
 }
 
-static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
@@ -300,7 +309,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	u32 val;
 
 	while (words) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_RD, 1000);
 		if (rx_level <= 0)
 			return rx_level;
 		count = min(words, (u32)rx_level);
@@ -309,9 +318,9 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		words -= count;
 	}
 
-	/* handle the last none word aligned bytes */
+	/* handle the last non 4 bytes aligned bytes */
 	if (bytes) {
-		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, SFC_RD, 1000);
 		if (rx_level <= 0)
 			return rx_level;
 		val = readl(&regs->data);
@@ -324,16 +333,13 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	int ret = 0;
-	int rw = sfc->cmd & SFC_WR;
 
-	sfc->cmd &= ~SFC_TRB_MASK;
-	sfc->cmd |= (len << SFC_TRB_SHIFT);
-	rockchip_sfc_setup_xfer(sfc);
+	rockchip_sfc_setup_xfer(sfc, len);
 	if (len) {
-		if (rw)
-			ret = rockchip_sfc_write(sfc, buf, len);
+		if (sfc->rw == SFC_WR)
+			ret = rockchip_sfc_write_fifo(sfc, buf, len);
 		else
-			ret = rockchip_sfc_read(sfc, buf, len);
+			ret = rockchip_sfc_read_fifo(sfc, buf, len);
 	}
 
 	return ret;
@@ -380,8 +386,13 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 	if (flags & SPI_XFER_BEGIN) {
 		sfc->cmd = pcmd[0];
 		if (len >= 4) {
-			sfc->cmd |= SFC_ADDR_24BITS | (((len - 4) * 8) << 8);
+			sfc->addr_bits = SFC_ADDR_24BITS;
+			sfc->dummy_bits = (len - 4) << 3;
 			sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
+		} else {
+			sfc->addr_bits = 0;
+			sfc->dummy_bits = 0;
+			sfc->addr = 0;
 		}
 	}
 
@@ -389,13 +400,14 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 		len = 0;
 
 	if (flags & SPI_XFER_END) {
-		if (dout)
-			sfc->cmd |= SFC_WR;
 
-		if (din)
+		if (din) {
+			sfc->rw = SFC_RD;
 			ret = rockchip_sfc_do_xfer(sfc, (u32 *)din, len);
-		else if (dout)
+		} else if (dout) {
+			sfc->rw = SFC_WR;
 			ret = rockchip_sfc_do_xfer(sfc, (u32 *)dout, len);
+		}
 	}
 
 	return ret;
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
index b8650564ed..2aefb0fa17 100644
--- a/drivers/spi/rockchip_sfc.h
+++ b/drivers/spi/rockchip_sfc.h
@@ -37,16 +37,21 @@ check_member(rockchip_sfc_reg, data, 0x108);
 #define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
 #define SFC_ADDR_WIDTH_SHIFT	10
 #define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
-#define SFC_CMD_WIDTH_SHIT	8
+#define SFC_CMD_WIDTH_SHIFT	8
 #define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
 #define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
 
 /*SFC_CMD*/
-#define SFC_WR			BIT(12)
-#define SFC_ADDR_0BITS		(0 << 14)
-#define SFC_ADDR_24BITS		(1 << 14)
-#define SFC_ADDR_32BITS		(2 << 14)
-#define SFC_ADDR_XBITS		(3 << 14)
+#define SFC_DUMMY_BITS_SHIFT	8
+#define SFC_RW_SHIFT		12
+#define SFC_WR			1
+#define SFC_RD			0
+#define SFC_ADDR_BITS_SHIFT	14
+#define SFC_ADDR_BITS_MASK	GENMASK(15, 14)
+#define SFC_ADDR_0BITS		0
+#define SFC_ADDR_24BITS		1
+#define SFC_ADDR_32BITS		2
+#define SFC_ADDR_XBITS		3
 #define SFC_TRB_SHIFT		(16)
 #define SFC_TRB_MASK		GENMASK(29, 16)
 

commit 915fcf0c3061cb9b81b291ddaefd01dd73af0735
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Jan 18 09:01:06 2018 +0800

    spi: rockchip_sfc: check the SFC_SR in timeout mode
    
    When the SFC is in busy state, we wait for a while(timeout)
    before reset it.
    
    Change-Id: I3e8734126b6e3b1f9a2391ebe0f402635a18d76f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 580795aec0..0537bec565 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -116,6 +116,34 @@ static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
 	return ret;
 }
 
+/* The SFC_CTRL register is a global control register,
+ * when the controller is in busy state(SFC_SR),
+ * SFC_CTRL cannot be set.
+ */
+static int rockchip_sfc_wait_idle(struct rockchip_sfc *sfc,
+                                  u32 timeout_ms)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	unsigned long tbase = get_timer(0);
+	u32 sr, fsr;
+
+	while (1) {
+		sr = readl(&regs->sr);
+		fsr = readl(&regs->fsr);
+		if ((fsr & SFC_TX_EMPTY) && (fsr & SFC_RX_EMPTY) && !(sr & SFC_BUSY))
+			break;
+		if (get_timer(tbase) > timeout_ms) {
+			printf("waite sfc idle timeout(sr:0x%08x fsr:0x%08x)\n",
+				sr, fsr);
+			rockchip_sfc_reset(sfc);
+			return -ETIMEDOUT;
+		}
+		udelay(100);
+	}
+
+	return 0;
+}
+
 static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
 {
 	int type = IF_TYPE_STD;
@@ -143,18 +171,15 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
 {
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 val = 0x02;
-	u32 fsr = readl(&regs->fsr);
-	u32 sr = readl(&regs->sr);
 	u8 data_width = IF_TYPE_STD;
 
-	if (!(fsr & SFC_TX_EMPTY) || !(fsr & SFC_RX_EMPTY) || (sr & SFC_BUSY))
-		rockchip_sfc_reset(sfc);
-
 	if (sfc->cmd & SFC_ADDR_XBITS)
 		data_width = rockchip_sfc_get_if_type(sfc);
 
 	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
 
+	rockchip_sfc_wait_idle(sfc, 10);
+
 	writel(val, &regs->ctrl);
 	writel(sfc->cmd, &regs->cmd);
 	if (sfc->cmd & SFC_ADDR_XBITS)
@@ -239,7 +264,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
 	u32 words = len >> 2;
-	u32 tx_level = 0;
+	int tx_level = 0;
 	u32 val = 0;
 	u8 count;
 
@@ -247,7 +272,7 @@ static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
 		if (tx_level <= 0)
 			return tx_level;
-		count = min(words, tx_level);
+		count = min(words, (u32)tx_level);
 		writesl(&regs->data, buf, count);
 		buf += count;
 		words -= count;
@@ -270,7 +295,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	struct rockchip_sfc_reg *regs = sfc->regbase;
 	u32 bytes = len & 0x3;
 	u32 words = len >> 2;
-	u32 rx_level = 0;
+	int rx_level = 0;
 	u32 count;
 	u32 val;
 
@@ -278,7 +303,7 @@ static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
 		if (rx_level <= 0)
 			return rx_level;
-		count = min(words, rx_level);
+		count = min(words, (u32)rx_level);
 		readsl(&regs->data, buf, count);
 		buf += count;
 		words -= count;

commit 6bf6464692c7c2969bc3dbeb7e5b39f8162d5f24
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Jan 18 08:42:38 2018 +0800

    spi: rockchip_sfc: transfer the non 4 bytes aligned data bytes in pio mode
    
    4 bytes aligned is required  for dma transfer mode, so
    switch to pio mode when get a non 4 bytes aligned transfer.
    
    Change-Id: I66118b7380d10deed3a0c82a897e407fb96db5fc
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 4388e51920..580795aec0 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -199,6 +199,7 @@ static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 
 	while (len) {
 		trb = min(len, (u32)SFC_MAX_TRB);
+		sfc->cmd &= ~SFC_TRB_MASK;
 		sfc->cmd |= (trb << SFC_TRB_SHIFT);
 		ret = rockchip_sfc_do_dma_xfer(sfc, p32_data);
 		if (ret < 0)
@@ -300,9 +301,9 @@ static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 	int ret = 0;
 	int rw = sfc->cmd & SFC_WR;
 
+	sfc->cmd &= ~SFC_TRB_MASK;
 	sfc->cmd |= (len << SFC_TRB_SHIFT);
 	rockchip_sfc_setup_xfer(sfc);
-
 	if (len) {
 		if (rw)
 			ret = rockchip_sfc_write(sfc, buf, len);
@@ -316,11 +317,28 @@ static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
 {
 	int ret = 0;
+	u32 bytes = len & 0x3;
+	u32 dma_trans;
+
+	if (len >= SFC_MAX_TRB) {
+		dma_trans = len - bytes;
+	} else {
+		dma_trans = 0;
+		bytes = len;
+	}
+
+	if (dma_trans) {
+		ret = rockchip_sfc_dma_xfer(sfc, buf, dma_trans);
+		buf += (dma_trans  >> 2);
+	}
 
-	if (!(len & 0x03) && (len >= 4))
-		ret = rockchip_sfc_dma_xfer(sfc, buf, len);
-	else
-		ret = rockchip_sfc_pio_xfer(sfc, buf, len);
+	/*
+	 * transfer the last non 4 bytes anligned byte by pio mode
+	 * there are also some commands like WREN(0x06) that execute
+	 * whth no data, we also need to handle it here.
+	 */
+	if (bytes || (!bytes && !dma_trans))
+		ret = rockchip_sfc_pio_xfer(sfc, buf, bytes);
 
 	return ret;
 }
@@ -346,7 +364,7 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
 		len = 0;
 
 	if (flags & SPI_XFER_END) {
-		if (dout && len)
+		if (dout)
 			sfc->cmd |= SFC_WR;
 
 		if (din)

commit c234b81e6a9d673d649955012761c62e50d4fab2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 30 15:24:21 2018 +0800

    irq; support irq revert trigger type and get gpio level
    
    Change-Id: Ib897bb37c518429c595903bb8f2cfd9fcea9aa78
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index c7ad094db6..593a122e74 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -162,6 +162,28 @@ int irq_set_irq_type(int irq, unsigned int type)
 		return gpio_irq_chip->irq_set_type(irq, type);
 }
 
+int irq_revert_irq_type(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return 0;
+	else
+		return gpio_irq_chip->irq_revert_type(irq);
+}
+
+int irq_get_gpio_level(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return 0;
+	else
+		return gpio_irq_chip->irq_get_gpio_level(irq);
+}
+
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 {
 	if (irq_bad(irq))
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index d80ae116c4..4b46b4fa73 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -62,6 +62,11 @@ static void gpio_bit_op(void __iomem *regbase, unsigned int offset,
 	writel(val, regbase + offset);
 }
 
+static int gpio_bit_rd(void __iomem *regbase, unsigned int offset, u32 bit)
+{
+	return readl(regbase + offset) & bit ? 1 : 0;
+}
+
 static void gpio_irq_unmask(void __iomem *regbase, unsigned int bit)
 {
 	gpio_bit_op(regbase, GPIO_INTEN, bit, 1);
@@ -137,6 +142,34 @@ static void gpio_set_intr_type(void __iomem *regbase,
 	}
 }
 
+static int gpio_get_intr_type(void __iomem *regbase,
+			      unsigned int bit)
+{
+	u32 polarity, level, magic = 0;
+	int type;
+
+	polarity = gpio_bit_rd(regbase, GPIO_INT_POLARITY, bit);
+	level = gpio_bit_rd(regbase, GPIO_INTTYPE_LEVEL, bit);
+	magic = (polarity << 1) | (level << 0);
+
+	switch (magic) {
+	case 0x00:
+		type = GPIOLevelLow;
+		break;
+	case 0x02:
+		type = GPIOLevelHigh;
+		break;
+	case 0x01:
+		type = GPIOEdgelFalling;
+		break;
+	case 0x03:
+		type = GPIOEdgelRising;
+		break;
+	}
+
+	return type;
+}
+
 static int gpio_irq_set_type(int gpio_irq, unsigned int type)
 {
 	int gpio = irq_to_gpio(gpio_irq);
@@ -175,6 +208,58 @@ static int gpio_irq_set_type(int gpio_irq, unsigned int type)
 	return 0;
 }
 
+static int gpio_irq_revert_type(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+	eGPIOIntType_t int_type = 0;
+	int type;
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	type = gpio_get_intr_type(bank->regbase, offset_to_bit(gpio));
+	switch (type) {
+	case GPIOEdgelFalling:
+		int_type = GPIOEdgelRising;
+		break;
+	case GPIOEdgelRising:
+		int_type = GPIOEdgelFalling;
+		break;
+	case GPIOLevelHigh:
+		int_type = GPIOLevelLow;
+		break;
+	case GPIOLevelLow:
+		int_type = GPIOLevelHigh;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	gpio_set_intr_type(bank->regbase, offset_to_bit(gpio), int_type);
+
+	return 0;
+}
+
+static int gpio_irq_get_gpio_level(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	return gpio_bit_rd(bank->regbase, GPIO_EXT_PORT, offset_to_bit(gpio));
+}
+
 static int gpio_irq_enable(int gpio_irq)
 {
 	int gpio = irq_to_gpio(gpio_irq);
@@ -238,6 +323,8 @@ static struct irq_chip gpio_irq_chip = {
 	.irq_enable	= gpio_irq_enable,
 	.irq_disable	= gpio_irq_disable,
 	.irq_set_type	= gpio_irq_set_type,
+	.irq_revert_type = gpio_irq_revert_type,
+	.irq_get_gpio_level = gpio_irq_get_gpio_level,
 };
 
 struct irq_chip *arch_gpio_irq_init(void)
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 8bb3ee8769..eaa7331686 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -55,14 +55,18 @@ struct irq_chip {
 	void		(*irq_ack)(int irq);
 	void		(*irq_eoi)(int irq);
 	int		(*irq_set_type)(int irq, unsigned int flow_type);
+	int		(*irq_revert_type)(int irq);
+	int		(*irq_get_gpio_level)(int irq);
 };
 
 /* APIs for irqs */
 void irq_install_handler(int irq, interrupt_handler_t *handler, void *data);
 void irq_free_handler(int irq);
 int irq_set_irq_type(int irq, unsigned int type);
+int irq_revert_irq_type(int irq);
 int irq_handler_enable(int irq);
 int irq_handler_disable(int irq);
+int irq_get_gpio_level(int irq);
 int irqs_suspend(void);
 int irqs_resume(void);
 int gpio_to_irq(struct gpio_desc *gpio);

commit bb9827924ec57c14f9e1b076c0d99cf9fad6bfb6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 17:47:25 2018 +0800

    bootm: reserve memory when BOOTM_STATE_RAMDISK enabled
    
    Change-Id: I2ba6dc7484de12aa7de28c9a8d6125b046029947
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 84830f1996..5e1f7c218c 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -639,7 +639,8 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 
 	/* Resever memory before any lmb_alloc, as early as possible */
 #if IMAGE_ENABLE_OF_LIBFDT && defined(CONFIG_LMB)
-	if (!ret && (states & BOOTM_STATE_FDT))
+	if (!ret && ((states & BOOTM_STATE_RAMDISK) ||
+	    (states & BOOTM_STATE_FDT)))
 		boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
 #endif
 	/* Relocate the ramdisk */

commit 4de308f80ecc878db78b697a2770bea6e0a2d0ce
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 13:58:52 2018 +0800

    ARM: dts: rk3126-evb: update charge animation node
    
    Change-Id: I5a1b7042c314481412a1a71454b211a8bd4cd317
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 78bdfec78f..1ad1829464 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -151,10 +151,9 @@
 	};
 
 	charge-animation {
-		compatible = "charge-animation";
-		screen-on-voltage-threshold = <3350>;
-		power-on-voltage-threshold = <3450>;
-		power-on-soc-threshold = <0>;
+		compatible = "rockchip,uboot-charge";
+		rockchip,uboot-charge-on = <0>;
+		rockchip,android-charge-on = <1>;
 		status = "okay";
 	};
 };

commit d6653c12a93daf65b7ac0698698422176497e808
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 13:14:15 2018 +0800

    power: charge animation: compatible legacy device node
    
    compatible with kernel 4.4 device node "uboot-charge".
    
    Change-Id: I754091d02f73b265f852855d203775862f33f05c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 05eaf7869a..525d44dcac 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -41,11 +41,15 @@ struct charge_animation_priv {
 };
 
 struct charge_animation_pdata {
-	int screen_on_voltage_threshold;
-	int power_on_voltage_threshold;
-	int power_on_soc_threshold;
-	bool suspend_to_sram;
-	bool auto_start_kernel;
+	int android_charge;
+	int uboot_charge;
+
+	int screen_on_voltage;
+	int exit_charge_voltage;
+
+	int exit_charge_level;
+	int low_power_level;
+
 };
 
 static int charge_animation_get_power_on_soc(struct udevice *dev)
@@ -55,7 +59,7 @@ static int charge_animation_get_power_on_soc(struct udevice *dev)
 	if (!pdata)
 		return -ENOSYS;
 
-	return pdata->power_on_soc_threshold;
+	return pdata->exit_charge_level;
 }
 
 static int charge_animation_get_power_on_voltage(struct udevice *dev)
@@ -65,7 +69,7 @@ static int charge_animation_get_power_on_voltage(struct udevice *dev)
 	if (!pdata)
 		return -ENOSYS;
 
-	return pdata->power_on_voltage_threshold;
+	return pdata->exit_charge_voltage;
 }
 
 static int charge_animation_get_screen_on_voltage(struct udevice *dev)
@@ -75,7 +79,7 @@ static int charge_animation_get_screen_on_voltage(struct udevice *dev)
 	if (!pdata)
 		return -ENOSYS;
 
-	return pdata->screen_on_voltage_threshold;
+	return pdata->screen_on_voltage;
 }
 
 static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
@@ -85,7 +89,7 @@ static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
 	if (!pdata)
 		return -ENOSYS;
 
-	pdata->power_on_soc_threshold = val;
+	pdata->exit_charge_level = val;
 
 	return 0;
 }
@@ -97,7 +101,7 @@ static int charge_animation_set_power_on_voltage(struct udevice *dev, int val)
 	if (!pdata)
 		return -ENOSYS;
 
-	pdata->power_on_voltage_threshold = val;
+	pdata->exit_charge_voltage = val;
 
 	return 0;
 }
@@ -109,7 +113,7 @@ static int charge_animation_set_screen_on_voltage(struct udevice *dev, int val)
 	if (!pdata)
 		return -ENOSYS;
 
-	pdata->screen_on_voltage_threshold = val;
+	pdata->screen_on_voltage = val;
 
 	return 0;
 }
@@ -134,31 +138,34 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 
-	if (dev_read_bool(dev, "charge,suspend-to-sram"))
-		pdata->suspend_to_sram = true;
-	else
-		pdata->suspend_to_sram = false;
-
-	if (dev_read_bool(dev, "charge,auto-start-kernel"))
-		pdata->auto_start_kernel = true;
-	else
-		pdata->auto_start_kernel = false;
-
-	pdata->power_on_soc_threshold =
-		dev_read_u32_default(dev, "power-on-soc-threshold", 0);
-	pdata->power_on_voltage_threshold =
-		dev_read_u32_default(dev, "power-on-voltage-threshold", 0);
-	pdata->screen_on_voltage_threshold =
-		dev_read_u32_default(dev, "screen-on-voltage-threshold", 0);
-
-	if (pdata->screen_on_voltage_threshold >
-	    pdata->power_on_voltage_threshold)
-		pdata->screen_on_voltage_threshold =
-					pdata->power_on_voltage_threshold;
-
-	debug("threshold soc=%d%%, voltage=%dmv, screen_on=%dmv, suspend=%d\n",
-	      pdata->power_on_soc_threshold, pdata->power_on_voltage_threshold,
-	      pdata->screen_on_voltage_threshold, pdata->suspend_to_sram);
+	/* charge mode */
+	pdata->uboot_charge =
+		dev_read_u32_default(dev, "rockchip,uboot-charge-on", 0);
+	pdata->android_charge =
+		dev_read_u32_default(dev, "rockchip,android-charge-on", 0);
+
+	/* level */
+	pdata->exit_charge_level =
+		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-level", 0);
+	pdata->low_power_level =
+		dev_read_u32_default(dev, "rockchip,uboot-low-power-level", 0);
+
+	/* voltage */
+	pdata->exit_charge_voltage =
+		dev_read_u32_default(dev, "rockchip,uboot-exit-charge-voltage", 0);
+	pdata->screen_on_voltage =
+		dev_read_u32_default(dev, "rockchip,screen-on-voltage", 0);
+
+	if (pdata->screen_on_voltage >
+	    pdata->exit_charge_voltage)
+		pdata->screen_on_voltage =
+					pdata->exit_charge_voltage;
+
+	debug("mode: uboot=%d, android=%d; exit: soc=%d%%, voltage=%dmv;\n"
+	      "lp_soc=%d%%, screen_on=%dmv\n",
+	      pdata->uboot_charge, pdata->android_charge,
+	      pdata->exit_charge_level, pdata->exit_charge_voltage,
+	      pdata->low_power_level, pdata->screen_on_voltage);
 
 	return 0;
 }
@@ -235,7 +242,7 @@ static int charge_animation_show(struct udevice *dev)
 	ulong show_start = 0, charge_start = 0, debug_start = 0;
 	ulong ms = 0, sec = 0;
 	int start_idx = 0, show_idx = -1;
-	int soc, voltage, key_state;
+	int soc, voltage, current, key_state;
 	int i, charging = 1;
 	int boot_mode;
 
@@ -254,6 +261,16 @@ static int charge_animation_show(struct udevice *dev)
 	}
 #endif
 
+	/* Enter android charge */
+	if (pdata->android_charge) {
+		env_update("bootargs", "androidboot.mode=charger");
+		printf("Android charge mode\n");
+		return 0;
+	}
+
+	if (!pdata->uboot_charge)
+		return 0;
+
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)
@@ -266,14 +283,15 @@ static int charge_animation_show(struct udevice *dev)
 	}
 
 	/* If low power, turn off screen */
-	if (voltage <= pdata->screen_on_voltage_threshold + 50) {
+	if (voltage <= pdata->screen_on_voltage + 50) {
 		screen_on = false;
 		ever_lowpower_screen_off = true;
 		rockchip_show_bmp(NULL);
 	}
 
-	charge_start = get_timer(0);
+	printf("Enter U-Boot charging mode\n");
 
+	charge_start = get_timer(0);
 	/* Charging ! */
 	while (1) {
 		debug("step1 (%d)... \n", screen_on);
@@ -309,6 +327,12 @@ static int charge_animation_show(struct udevice *dev)
 			continue;
 		}
 
+		current = fuel_gauge_get_current(fg);
+		if (current == -ENOSYS) {
+			printf("get current failed: %d\n", current);
+			continue;
+		}
+
 		/*
 		 * Just for debug, otherwise there will be nothing output which
 		 * is not good to know what happen.
@@ -317,9 +341,9 @@ static int charge_animation_show(struct udevice *dev)
 			debug_start = get_timer(0);
 		if (get_timer(debug_start) > 20000) {
 			debug_start = get_timer(0);
-			printf("soc=%d, vol=%d, online=%d, screen_on=%d, show_idx=%d, ever_off=%d\n",
-			       soc, voltage, charging, screen_on, show_idx,
-			       ever_lowpower_screen_off);
+			printf("[%8ld]: soc=%d%%, vol=%dmv, c=%dma, online=%d, screen_on=%d\n",
+			       get_timer(0)/1000, soc, voltage,
+			       current, charging, screen_on);
 		}
 
 		/*
@@ -336,7 +360,7 @@ static int charge_animation_show(struct udevice *dev)
 		 * screen off.
 		 */
 		if ((ever_lowpower_screen_off) &&
-		    (voltage > pdata->screen_on_voltage_threshold)) {
+		    (voltage > pdata->screen_on_voltage)) {
 			ever_lowpower_screen_off = false;
 			screen_on = true;
 			show_idx = IMAGE_SHOW_RESET;
@@ -432,17 +456,17 @@ static int charge_animation_show(struct udevice *dev)
 				screen_on = true;
 
 			/* Is able to boot now ? */
-			if (soc < pdata->power_on_soc_threshold) {
+			if (soc < pdata->exit_charge_level) {
 				printf("soc=%d%%, threshold soc=%d%%\n",
-				       soc, pdata->power_on_soc_threshold);
+				       soc, pdata->exit_charge_level);
 				printf("Low power, unable to boot, charging...\n");
 				show_idx = image_num - 1;
 				continue;
 			}
 
-			if (voltage < pdata->power_on_voltage_threshold) {
+			if (voltage < pdata->exit_charge_voltage) {
 				printf("voltage=%dmv, threshold voltage=%dmv\n",
-				       voltage, pdata->power_on_voltage_threshold);
+				       voltage, pdata->exit_charge_voltage);
 				printf("Low power, unable to boot, charging...\n");
 				show_idx = image_num - 1;
 				continue;
@@ -458,21 +482,9 @@ static int charge_animation_show(struct udevice *dev)
 
 		debug("step5 (%d)... \n", screen_on);
 
-		/*
-		 * Step5: Check auto start kernel
-		 */
-		if (pdata->auto_start_kernel) {
-			if ((voltage >= pdata->power_on_voltage_threshold) &&
-			    (soc >= pdata->power_on_soc_threshold)) {
-				printf("Auto start, exit charge animation..\n");
-				rockchip_show_logo();
-				break;
-			}
-		}
-
-		/* Step6: Exit by ctrl+c */
+		/* Step5: Exit by ctrl+c */
 		if (ctrlc()) {
-			if (voltage >= pdata->screen_on_voltage_threshold)
+			if (voltage >= pdata->screen_on_voltage)
 				rockchip_show_logo();
 			printf("Exit charge, due to ctrl+c\n");
 			break;
@@ -547,7 +559,7 @@ static int charge_animation_probe(struct udevice *dev)
 }
 
 static const struct udevice_id charge_animation_ids[] = {
-	{ .compatible = "charge-animation" },
+	{ .compatible = "rockchip,uboot-charge" },
 	{ },
 };
 

commit 513d5509a432564e38a4a491e69f74d40a31c1f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 14:01:40 2018 +0800

    fuel gauge: rk816: report charge current to framework
    
    Change-Id: I47f48f78749783022bbd0b3876de406d73e37e7e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 700deb5597..812c91bf68 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -94,6 +94,7 @@ static int dbg_enable = 0;
 #define FINISH_CALI_CURR	1500
 #define TERM_CALI_CURR		600
 #define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_CUR	1000
 #define	VIRTUAL_POWER_SOC	66
 #define SECONDS(n)		((n) * 1000)
 
@@ -1304,6 +1305,16 @@ static int rk816_bat_update_get_voltage(struct udevice *dev)
 		return VIRTUAL_POWER_VOL;
 }
 
+static int rk816_bat_update_get_current(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk816_bat_get_avg_current(di);
+	else
+		return VIRTUAL_POWER_CUR;
+}
+
 static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 {
 	struct battery_info *di = dev_get_priv(dev);
@@ -1314,6 +1325,7 @@ static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 static struct dm_fuel_gauge_ops fg_ops = {
 	.get_soc = rk816_bat_update_get_soc,
 	.get_voltage = rk816_bat_update_get_voltage,
+	.get_current = rk816_bat_update_get_current,
 	.get_chrg_online = rk816_bat_update_get_chrg_online,
 };
 

commit 23c016409eb330299d07a31ce723266d9ff679f6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 14:02:43 2018 +0800

    dm: fuel gauge: add charge current report interface
    
    Change-Id: Ibef2b06d3b0df71bdf2f205a128578ca6314c37e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index 9b6720eb5b..101f1d7132 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -10,6 +10,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int fuel_gauge_get_current(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_current)
+		return -ENOSYS;
+
+	return ops->get_current(dev);
+}
+
 int fuel_gauge_get_voltage(struct udevice *dev)
 {
 	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
index 14714c343d..9473e6220a 100644
--- a/include/power/fuel_gauge.h
+++ b/include/power/fuel_gauge.h
@@ -10,11 +10,13 @@
 struct dm_fuel_gauge_ops {
 	int (*get_soc)(struct udevice *dev);
 	int (*get_voltage)(struct udevice *dev);
+	int (*get_current)(struct udevice *dev);
 	bool (*get_chrg_online)(struct udevice *dev);
 };
 
 int fuel_gauge_get_soc(struct udevice *dev);
 int fuel_gauge_get_voltage(struct udevice *dev);
+int fuel_gauge_get_current(struct udevice *dev);
 bool fuel_gauge_get_chrg_online(struct udevice *dev);
 
 #endif

commit 39d5abb81d1c164730aa81d83feab0c7fb3f33f3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 13:01:06 2018 +0800

    common: boot_rkimg: clean up boot options
    
    options are: "storagemedia=" and "androidboot.mode=".
    
    Change-Id: I4deba2fce27324bc5020ba79e586383fefe92b83
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 745461a3ce..5ace1893fe 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -147,20 +147,21 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
-	char *boot_media = NULL;
+	char *boot_media = NULL, *boot_mode = NULL;
+	char boot_options[128] = {0};
 	static int appended;
 
 	#ifdef CONFIG_EMMC_BOOT
 		type = IF_TYPE_MMC;
-		boot_media = "storagemedia=emmc";
+		boot_media = "emmc";
 	#endif /* CONFIG_EMMC_BOOT */
 	#ifdef CONFIG_QSPI_BOOT
 		type = IF_TYPE_SPI_NAND;
-		boot_media = "storagemedia=nand";
+		boot_media = "nand";
 	#endif /* CONFIG_QSPI_BOOT */
 	#ifdef CONFIG_NAND_BOOT
 		type = IF_TYPE_RKNAND;
-		boot_media = "storagemedia=nand";
+		boot_media = "nand";
 	#endif /* CONFIG_NAND_BOOT */
 	#ifdef CONFIG_NOR_BOOT
 		type = IF_TYPE_SPI_NOR;
@@ -169,12 +170,24 @@ int get_bootdev_type(void)
 	/* For current use(Only EMMC support!) */
 	if (!type) {
 		type = IF_TYPE_MMC;
-		boot_media = "storagemedia=emmc";
+		boot_media = "emmc";
 	}
 
 	if (!appended && boot_media) {
 		appended = 1;
-		env_update("bootargs", boot_media);
+		/*
+		 * 1. androidboot.mode=charger has higher priority, not override;
+		 * 2. rknand doesn't need "androidboot.mode=";
+		 */
+		if (env_exist("bootargs", "androidboot.mode=charger") ||
+		    (type == IF_TYPE_RKNAND))
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s", boot_media);
+		else
+			snprintf(boot_options, sizeof(boot_options),
+				 "storagemedia=%s androidboot.mode=%s",
+				 boot_media, boot_media);
+		env_update("bootargs", boot_options);
 	}
 
 	return type;

commit 046a931055871570b053c99019398353ad81e1fd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Sat Jan 27 14:42:25 2018 +0800

    env: add env_exist()
    
    Change-Id: I153c700ff45a678832b72031787531efadcdb47b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 307ec60534..1809e6fe32 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -517,6 +517,22 @@ int env_update(const char *varname, const char *varvalue)
 	return 0;
 }
 
+int env_exist(const char *varname, const char *varvalue)
+{
+	char *value;
+	int ret = 0;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	value = env_get(varname);
+	if (value)
+		ret = strstr(value, varvalue) ? 1 : 0;
+
+	return ret;
+}
+
 /**
  * Set an environment variable to an integer value
  *
diff --git a/include/common.h b/include/common.h
index a400cf55aa..60f8555409 100644
--- a/include/common.h
+++ b/include/common.h
@@ -340,6 +340,15 @@ int env_set(const char *varname, const char *value);
  */
 int env_update(const char *varname, const char *varvalue);
 
+/**
+ * env_exist() - check sub value of an environment variable is exist or not
+ *
+ * @varname: Variable to look up
+ * @value: Value to check
+ * @return 1 if exist, 0 on error
+ */
+int env_exist(const char *varname, const char *varvalue);
+
 /**
  * env_set_ulong() - set an environment variable to an integer
  *

commit bc98b3c8fc20450fa75bdece8367925d2053900d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 26 19:27:08 2018 +0800

    make.sh: optimize code
    
    1. use global variables for important definitions, easy to update;
    2. add more error message warning;
    3. fix some issues.
    
    Change-Id: I702f4efe5839c1c7eaf66f412011aadf6627f323
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 3559e9adbe..36cfa4e24f 100755
--- a/make.sh
+++ b/make.sh
@@ -1,20 +1,33 @@
 #!/bin/sh
 set -e
 BOARD=$1
-DIR=${BOARD#*-}
-DSTDIR=rockdev/${DIR}
-RKCHIP=$(echo $DIR | tr '[a-z]' '[A-Z]')
-TOOLCHAIN=arm-linux-gnueabi-
+RKCHIP=${BOARD##*-}
+DSTDIR=rockdev/${RKCHIP}
+RKCHIP=$(echo ${RKCHIP} | tr '[a-z]' '[A-Z]')
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 
+# Declare global rkbin tools and rkbin Responsity path, updated in prepare()
+TOOLCHAIN_RKBIN=./
+RKBIN=./
+# RKTOOL path
+RKBIN_TOOLS=../rkbin/tools
+
+# Declare global toolchain path for CROSS_COMPILE, updated in select_toolchain()
+TOOLCHAIN_GCC=./
+# GCC toolchain
+GCC_ARM32=arm-linux-androideabi-
+GCC_ARM64=aarch64-linux-android-
+TOOLCHAIN_ARM32=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
+TOOLCHAIN_ARM64=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+
 prepare()
 {
-	local dst
+	local absolute_path
 
 	# Check invaid args and help
-	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
+	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' -o "$BOARD" = '' ]; then
 		echo
-		echo "Usage: ./make.sh board"
+		echo "Usage: ./make.sh [board]"
 		echo "Example:"
 		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
 		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
@@ -24,11 +37,11 @@ prepare()
 		exit 1
 	fi
 
-	# Initialize RKBIN and RKTOOLS
-	dst=../rkbin/tools
-	if [ -d ${dst} ]; then
-		RKBIN=$(cd `dirname ${dst}`; pwd)
-		RKTOOLS=${RKBIN}/tools
+	# Initialize RKBIN and TOOLCHAIN_RKBIN
+	if [ -d ${RKBIN_TOOLS} ]; then
+		absolute_path=$(cd `dirname ${RKBIN_TOOLS}`; pwd)
+		RKBIN=${absolute_path}
+		TOOLCHAIN_RKBIN=${absolute_path}/tools
 	else
 		echo
 		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
@@ -42,22 +55,34 @@ prepare()
 
 select_toolchain()
 {
-	local dst path
+	local absolute_path
+
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
-        	TOOLCHAIN=aarch64-linux-gnu-
-		dst=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
-		if [ -d ${dst} ]; then
-			path=$(cd `dirname ${dst}`; pwd)
-			TOOLCHAIN=${path}/bin/aarch64-linux-android-
+		if [ -d ${TOOLCHAIN_ARM64} ]; then
+			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM64}`; pwd)
+			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM64}
+		else
+			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			exit 1
 		fi
 	else
-		dst=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
-		if [ -d ${dst} ]; then
-			path=$(cd `dirname ${dst}`; pwd)
-			TOOLCHAIN=${path}/bin/arm-linux-androideabi-
+		if [ -d ${TOOLCHAIN_ARM32} ]; then
+			absolute_path=$(cd `dirname ${TOOLCHAIN_ARM32}`; pwd)
+			TOOLCHAIN_GCC=${absolute_path}/bin/${GCC_ARM32}
+		else
+			echo "Can't find toolchain: ${TOOLCHAIN_GCC}"
+			exit 1
 		fi
 	fi
-	echo toolchain: ${TOOLCHAIN}
+
+	echo "toolchain: ${TOOLCHAIN_GCC}"
+}
+
+fixup_chip_name()
+{
+	if [ "$RKCHIP" = 'RK3228' -o "$RKCHIP" = 'RK3229' ]; then
+		RKCHIP=RK322X
+	fi
 }
 
 pack_uboot_image()
@@ -65,13 +90,13 @@ pack_uboot_image()
 	local UBOOT_LOAD_ADDR
 
 	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
-	${RKTOOLS}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+	${TOOLCHAIN_RKBIN}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
 }
 
 pack_loader_image()
 {
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	${TOOLCHAIN_RKBIN}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
 }
@@ -83,7 +108,7 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		${TOOLCHAIN_RKBIN}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
 	# ARM uses loaderimage
@@ -104,14 +129,14 @@ pack_trust_image()
 		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
 
 		if [ $TOS_TA -a $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
 			echo "Both trust.img and trust_with_ta.img are ready"
 		elif [ $TOS ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img is ready"
 		elif [ $TOS_TA ]; then
-			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
+			${TOOLCHAIN_RKBIN}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
 			echo "trust.img with ta is ready"
 		else
 			echo "Can't find any tee bin"
@@ -121,11 +146,11 @@ pack_trust_image()
 }
 
 prepare
+select_toolchain
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
-select_toolchain
-make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out
+make CROSS_COMPILE=${TOOLCHAIN_GCC}  all --jobs=${JOB} O=${DSTDIR}/out
+fixup_chip_name
 pack_loader_image
 pack_uboot_image
 pack_trust_image
-

commit 0e90839a144e101e23c516396b71ae169eff2816
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Jan 26 19:11:02 2018 +0800

    make.sh: update package command
    
    boot_merge and trust_merge support command "--replace".
    
    Change-Id: Ie5cf52a1aaefcc717fcb76400e2f0eb8dfc8f467
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 6fe2d6add8..3559e9adbe 100755
--- a/make.sh
+++ b/make.sh
@@ -71,7 +71,7 @@ pack_uboot_image()
 pack_loader_image()
 {
 	cd ${RKBIN}
-	${RKTOOLS}/boot_merger ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	${RKTOOLS}/boot_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
 	cd -
 	mv ${RKBIN}/*_loader_*.bin ./
 }
@@ -83,7 +83,7 @@ pack_trust_image()
 	# ARM64 uses trust_merger
 	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
 		cd ${RKBIN}
-		${RKTOOLS}/trust_merger ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		${RKTOOLS}/trust_merger --replace tools/rk_tools/ ./ ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
 		cd -
 		mv ${RKBIN}/trust.img ./trust.img
 	# ARM uses loaderimage
@@ -95,9 +95,14 @@ pack_trust_image()
 		# Convert Dec to Hex
 		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
+		# Parse orignal path
 		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
 
+		# replace "./tools/rk_tools/" with "./" to compatible legacy ini content of rkdevelop branch
+		TOS=$(echo ${TOS} | sed "s/tools\/rk_tools\//\.\//g")
+		TOS_TA=$(echo ${TOS_TA} | sed "s/tools\/rk_tools\//\.\//g")
+
 		if [ $TOS_TA -a $TOS ]; then
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
 			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}

commit 87ea017b04ee51af055650d38ebe6a099dc8013d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:07:11 2018 +0800

    Makefile: use dt-spl.dtb when using kernel dtb
    
    We only need a simple dtb for pre-relocate and then we convert to
    use kernel dtb.
    
    Change-Id: I06c2b5303a89cf229da44f3edce4f698299aeef8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/Makefile b/Makefile
index c27875d336..a86fd4d544 100644
--- a/Makefile
+++ b/Makefile
@@ -870,11 +870,16 @@ endif
 	$(call cmd,cfgcheck,u-boot.cfg)
 
 PHONY += dtbs
-dtbs: dts/dt.dtb
+dtbs: dts/dt.dtb dts/dt-spl.dtb
 	@:
 dts/dt.dtb: u-boot
 	$(Q)$(MAKE) $(build)=dts dtbs
 
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+dts/dt-spl.dtb: dts/dt.dtb
+	@:
+endif
+
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
@@ -893,7 +898,11 @@ u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob
 u-boot.bin: u-boot-fit-dtb.bin FORCE
 	$(call if_changed,copy)
 else ifeq ($(CONFIG_OF_SEPARATE),y)
+ifeq ($(CONFIG_USING_KERNEL_DTB),y)
+u-boot-dtb.bin: u-boot-nodtb.bin dts/dt-spl.dtb FORCE
+else
 u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE
+endif
 	$(call if_changed,cat)
 
 u-boot.bin: u-boot-dtb.bin FORCE

commit d5b5cd14713142f67d8742cbfdc5990b2fd32732
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:51:02 2018 +0800

    core: add dev_count_phandle_with_args for of_live
    
    This is a fix to:
    642346a dm: core: add ofnode_count_phandle_with_args()
    
    Change-Id: I25befa448e44884440060d43be905744cd4cd319
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/read.c b/drivers/core/read.c
index c3a1e2899b..9f4d8c72c4 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -106,6 +106,14 @@ int dev_read_phandle_with_args(struct udevice *dev, const char *list_name,
 					      out_args);
 }
 
+int dev_count_phandle_with_args(struct udevice *dev,
+		const char *list_name, const char *cells_name)
+{
+	return ofnode_count_phandle_with_args(dev_ofnode(dev), list_name,
+					      cells_name);
+}
+
+
 int dev_read_addr_cells(struct udevice *dev)
 {
 	return ofnode_read_addr_cells(dev_ofnode(dev));

commit af586a3812f626a0f7ff0aded53414ac6c08b15c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:45:14 2018 +0800

    rockchip: add support to load and use kernel dtb
    
    We are going to use a tiny dtb(with 'u-boot,dm-pre-reloc') in pre-relocate,
    and then read kernel dtb and use it after relocate.
    This feature only works with CONFIG_OF_LIVE enabled now.
    
    Change-Id: I429ccd90ef562a96f2f7916255e7e427ce8f451d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c15d564e40..fa1f55f838 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -349,6 +349,15 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
+config USING_KERNEL_DTB
+	bool "Using dtb from Kernel/resource for U-Boot"
+	depends on RKIMG_BOOTLOADER && OF_LIVE
+	default y
+	help
+	  This enable support to read dtb from resource and use it for U-Boot,
+	  the uart and emmc will still using U-Boot dtb, but other devices like
+	  regulator/pmic, display, usb will use dts node from kernel.
+
 config ROCKCHIP_CRC
 	bool "Rockchip CRC verify images"
 	help
diff --git a/common/board_r.c b/common/board_r.c
index 09167c13cc..8055c72581 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -103,6 +103,41 @@ static int initr_reloc(void)
 
 	return 0;
 }
+#ifdef CONFIG_USING_KERNEL_DTB
+#include <asm/arch/resource_img.h>
+#define DTB_FILE                        "rk-kernel.dtb"
+int get_fdt_from_resource(void)
+{
+	int ret = 0;
+	struct mmc *mmc;
+	ulong fdt_addr = 0;
+
+	mmc_initialize(gd->bd);
+	mmc = find_mmc_device(0);
+	if (!mmc) {
+		printf("no mmc device at slot 0\n");
+		return -1;
+	}
+	ret = mmc_init(mmc);
+	if (ret)
+		printf("%s mmc init fail %d\n", __func__, ret);
+
+	fdt_addr = env_get_ulong("fdt_addr_r", 16, 0);
+	if (!fdt_addr) {
+		printf("No Found FDT Load Address.\n");
+		return -1;
+	}
+
+	ret = rockchip_read_resource_file((void *)fdt_addr, DTB_FILE, 0, 0);
+	if (ret < 0) {
+		printf("%s dtb in resource read fail\n", __func__);
+		return 0;
+	}
+	gd->kernel_fdt = (void *)fdt_addr;
+
+	return 0;
+}
+#endif
 
 #ifdef CONFIG_ARM
 /*
@@ -698,6 +733,9 @@ static init_fnc_t init_sequence_r[] = {
 	initr_noncached,
 #endif
 	bootstage_relocate,
+#ifdef CONFIG_USING_KERNEL_DTB
+	get_fdt_from_resource,
+#endif
 #ifdef CONFIG_OF_LIVE
 	initr_of_live,
 #endif
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 976e2c4fdd..5525d74bc3 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -306,8 +306,20 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
 {
 #if CONFIG_IS_ENABLED(OF_LIVE)
 	if (of_live_active())
+#ifndef CONFIG_USING_KERNEL_DTB
 		return dm_scan_fdt_live(gd->dm_root, gd->of_root,
 					pre_reloc_only);
+#else
+	{
+		dm_scan_fdt_live(gd->dm_root, gd->of_root,
+					pre_reloc_only);
+		if (!gd->kernel_of_root)
+			return 0;
+
+		return dm_scan_fdt_live(gd->dm_root, gd->kernel_of_root,
+					pre_reloc_only);
+	}
+#endif
 	else
 #endif
 	return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 5aaa78b06a..591a431cf3 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -81,6 +81,10 @@ typedef struct global_data {
 	unsigned long fdt_size;		/* Space reserved for relocated FDT */
 #ifdef CONFIG_OF_LIVE
 	struct device_node *of_root;
+#ifdef CONFIG_USING_KERNEL_DTB
+	void *kernel_fdt;		/* Kernel FDT */
+	struct device_node *kernel_of_root;
+#endif
 #endif
 	struct jt_funcs *jt;		/* jump table */
 	char env_buf[32];		/* buffer for env_get() before reloc. */
diff --git a/lib/of_live.c b/lib/of_live.c
index f351483387..12c9abcf89 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -332,6 +332,15 @@ int of_live_build(const void *fdt_blob, struct device_node **rootp)
 		debug("Failed to scan live tree aliases: err=%d\n", ret);
 		return ret;
 	}
+#ifdef CONFIG_USING_KERNEL_DTB
+	ret = unflatten_device_tree(gd->kernel_fdt,
+				    (struct device_node **)&gd->kernel_of_root);
+	if (ret) {
+		printf("%s fail to build live dt from kernel dtb.\n", __func__);
+		return 0;
+	}
+	gd->fdt_blob = gd->kernel_fdt;
+#endif
 	debug("%s: stop\n", __func__);
 
 	return ret;

commit d8a49a2f329d71e82ee75197c04389247b8eaa71
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:46:13 2018 +0800

    rockchip: dts: rk312x: add u-boot.dtsi
    
    Change-Id: Ib5062219be955b84d50952a2dc4f40cf23ac673f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index a185e73ee2..297e7137ed 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index ab96432cbc..78bdfec78f 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
 #include <dt-bindings/input/input.h>
 
 / {
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index e8ba419ed5..a3e538cd5e 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include "rk3128-u-boot.dtsi"
 
 / {
 	model = "Rockchip RK3128 Evaluation board";
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
new file mode 100644
index 0000000000..2427cf74df
--- /dev/null
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&lvds {
+	u-boot,dm-pre-reloc;
+};
+
+&display_subsystem {
+	u-boot,dm-pre-reloc;
+};
+
+&vop {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e8ceb34b92..0b42a268b0 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -241,13 +241,11 @@
 	};
 
 	dmc: dmc@20004000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3128-dmc", "syscon";
 		reg = <0x0 0x20004000 0x0 0x1000>;
 	};
 
 	cru: clock-controller@20000000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3128-cru";
 		reg = <0x20000000 0x1000>;
 		rockchip,grf = <&grf>;
@@ -369,7 +367,6 @@
 	};
 
 	vop: vop@1010e000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3126-vop";
 		reg = <0x1010e000 0x100>, <0x1010ec00 0x400>;
 		reg-names = "regs", "gamma_lut";
@@ -419,7 +416,6 @@
 	};
 
 	display_subsystem: display-subsystem {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
 
@@ -562,7 +558,6 @@
 	};
 
 	lvds: lvds@20038000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3126-lvds";
 		reg = <0x20038000 0x4000>, <0x10110000 0x100>;
 		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
@@ -648,7 +643,6 @@
 	};
 
 	grf: syscon@20008000 {
-		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3128-grf", "syscon";
 		reg = <0x20008000 0x1000>;
 	};

commit b8a8a392a864738e8da04f668ea04653d3d816ba
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:19:27 2018 +0800

    rockchip: pinctrl: rk3128: convert to use live dt
    
    Change-Id: I8d12eb6eb5d7a65da14b71a883570df82dfcc0e8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3128.c b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
index b1c32ac592..8b5178971a 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
@@ -113,8 +113,7 @@ static int rk3128_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
+	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit 6ab5195b7385a4a26c1d44f2a04c0734aac9dad4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 22:17:17 2018 +0800

    rockchip: clk: rk3128: convert to live dt
    
    Change-Id: I54752b7037cda13eb0f7efbc515291fc944fad41
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 944ccc066f..c5d829d3bc 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -551,7 +551,7 @@ static int rk3128_clk_probe(struct udevice *dev)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3128_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 	rkclk_init(priv->cru);
 
 	return 0;

commit 30bcf959e9bead00f1ec995f74f87918d20fa7cc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jan 25 14:54:33 2018 +0800

    rockchip: evb-rk3229: enable TPL_SYS_MALLOC_SIMPLE
    
    Change-Id: If5d0846807b0a9e508df36ff170a951569147c63
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 65089619d4..814b0d93de 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -70,6 +70,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y

commit 6222c401243b38707fd88ccf5e4c35678c183f8d
Author: Goldschmidt Simon <sgoldschmidt@de.pepperl-fuchs.com>
Date:   Tue Nov 21 12:29:56 2017 +0000

    spl: make CONFIG_OF_EMBED pass dts through fdtgrep
    
    Building spl with CONFIG_OF_EMBED enabled results in an error message
    on my board: "SPL image too big". This is because the fdtgrep build
    step is only executed for CONFIG_OF_SEPARATE.
    
    Fix this by moving the fdtgrep build step ('cmd_fdtgreo') from
    scripts/Makefile.spl to dts/Makefile so that the reduced dtb is
    available for all kinds of spl builds.
    
    The resulting variable name for the embedded device tree blob changes,
    too, which is why common.h and fdtdec.c have tiny changes.
    
    Change-Id: I2bf2d9780a544ac602752527d17f14aa6b12c5a2
    Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/dts/Makefile b/dts/Makefile
index 3a93dafb51..c9b2a89441 100644
--- a/dts/Makefile
+++ b/dts/Makefile
@@ -22,10 +22,29 @@ DTB := $(ARCH_PATH)/$(DEVICE_TREE).dtb
 dtb_depends += $(DTB:.dtb=.dts)
 endif
 
+# Pass the original device tree file through fdtgrep twice. The first pass
+# removes any unwanted nodes (i.e. those which don't have the
+# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second
+# pass removes various unused properties from the remaining nodes.
+# The output is typically a much smaller device tree file.
+ifeq ($(CONFIG_TPL_BUILD),y)
+fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
+else
+fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl
+endif
+quiet_cmd_fdtgrep = FDTGREP $@
+      cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
+		-n /chosen -n /config -O dtb | \
+	$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
+		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
+
+$(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
+	$(call if_changed,fdtgrep)
+
 $(obj)/dt.dtb: $(DTB) FORCE
 	$(call if_changed,shipped)
 
-targets += dt.dtb
+targets += dt.dtb dt-spl.dtb
 
 $(DTB): $(dtb_depends)
 ifeq ($(EXT_DTB),)
@@ -42,14 +61,22 @@ endif
 arch-dtbs:
 	$(Q)$(MAKE) $(build)=$(ARCH_PATH) dtbs
 
-.SECONDARY: $(obj)/dt.dtb.S
+.SECONDARY: $(obj)/dt.dtb.S $(obj)/dt-spl.dtb.S
 
+
+ifeq ($(CONFIG_SPL_BUILD),y)
+obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o
+# support "out-of-tree" build for dtb-spl
+$(obj)/dt-spl.dtb.o: $(obj)/dt-spl.dtb.S FORCE
+	$(call if_changed_dep,as_o_S)
+else
 obj-$(CONFIG_OF_EMBED) := dt.dtb.o
+endif
 
-dtbs: $(obj)/dt.dtb
+dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb
 	@:
 
-clean-files := dt.dtb.S
+clean-files := dt.dtb.S dt-spl.dtb.S
 
 # Let clean descend into dts directories
 subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts
diff --git a/include/common.h b/include/common.h
index 9b725e8274..a400cf55aa 100644
--- a/include/common.h
+++ b/include/common.h
@@ -166,6 +166,7 @@ int last_stage_init(void);
 extern ulong monitor_flash_len;
 int mac_read_from_eeprom(void);
 extern u8 __dtb_dt_begin[];	/* embedded device tree blob */
+extern u8 __dtb_dt_spl_begin[];	/* embedded device tree blob for SPL/TPL */
 int set_cpu_clk_info(void);
 int mdm_init(void);
 int print_cpuinfo(void);
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index ae721c29bf..5749d3510f 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1279,7 +1279,11 @@ int fdtdec_setup(void)
 # endif
 # ifdef CONFIG_OF_EMBED
 	/* Get a pointer to the FDT */
+#  ifdef CONFIG_SPL_BUILD
+	gd->fdt_blob = __dtb_dt_spl_begin;
+#  else
 	gd->fdt_blob = __dtb_dt_begin;
+#  endif
 # elif defined CONFIG_OF_SEPARATE
 #  ifdef CONFIG_SPL_BUILD
 	/* FDT is at end of BSS unless it is in a different memory region */
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index b5e7019ea3..64390e5785 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -239,24 +239,8 @@ $(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
 	@bss_size_str=$(shell $(NM) $< | awk 'BEGIN {size = 0} /__bss_size/ {size = $$1} END {print "ibase=16; " toupper(size)}' | bc); \
 	dd if=/dev/zero of=$@ bs=1 count=$${bss_size_str} 2>/dev/null;
 
-# Pass the original device tree file through fdtgrep twice. The first pass
-# removes any unwanted nodes (i.e. those which don't have the
-# 'u-boot,dm-pre-reloc' property and thus are not needed by SPL. The second
-# pass removes various unused properties from the remaining nodes.
-# The output is typically a much smaller device tree file.
-ifeq ($(CONFIG_TPL_BUILD),y)
-fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-tpl
-else
-fdtgrep_props := -b u-boot,dm-pre-reloc -b u-boot,dm-spl
-endif
-quiet_cmd_fdtgrep = FDTGREP $@
-      cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
-		-n /chosen -n /config -O dtb | \
-	$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
-		$(addprefix -P ,$(subst $\",,$(CONFIG_OF_SPL_REMOVE_PROPS)))
-
-$(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE
-	$(call if_changed,fdtgrep)
+$(obj)/$(SPL_BIN).dtb: dts/dt-spl.dtb FORCE
+	$(call if_changed,copy)
 
 pythonpath = PYTHONPATH=scripts/dtc/pylibfdt
 

commit e574a93763ec3625a01d2b3faf743fdb23b43090
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:45:14 2018 +0800

    rockchip: fix RKIMG default partitions
    
    we need to end with '\0', or else the partitions will be broken.
    
    Change-Id: I2bc480165ab7873be35614287b27e855bb5c39b9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index c67daa265f..1f9d8411bc 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -80,7 +80,7 @@
 	"name=oem,size=32M,uuid=${uuid_gpt_oem};" \
 	"name=frp,size=512K,uuid=${uuid_gpt_frp};" \
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
-	"name=userdata,size=-,uuid=${uuid_gpt_userdata};"
+	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0"
 
 #define RKIMG_BOOTCOMMAND \
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \

commit 53d8bb451afd057a79f4e13361b582fbb300a6c3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:43:58 2018 +0800

    rockchip: ram: rk322x: convert to use live dt
    
    Change-Id: Iedfeb6eee41c416d7bce84ab39d4a0ce6e2c5e4b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index c4da0004c8..8df2039288 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -716,27 +716,25 @@ static int rk322x_dmc_ofdata_to_platdata(struct udevice *dev)
 {
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk322x_sdram_params *params = dev_get_platdata(dev);
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	int ret;
 
 	params->num_channels = 1;
 
-	ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing",
+	ret = dev_read_u32_array(dev, "rockchip,pctl-timing",
 				   (u32 *)&params->pctl_timing,
 				   sizeof(params->pctl_timing) / sizeof(u32));
 	if (ret) {
 		printf("%s: Cannot read rockchip,pctl-timing\n", __func__);
 		return -EINVAL;
 	}
-	ret = fdtdec_get_int_array(blob, node, "rockchip,phy-timing",
+	ret = dev_read_u32_array(dev, "rockchip,phy-timing",
 				   (u32 *)&params->phy_timing,
 				   sizeof(params->phy_timing) / sizeof(u32));
 	if (ret) {
 		printf("%s: Cannot read rockchip,phy-timing\n", __func__);
 		return -EINVAL;
 	}
-	ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params",
+	ret = dev_read_u32_array(dev, "rockchip,sdram-params",
 				   (u32 *)&params->base,
 				   sizeof(params->base) / sizeof(u32));
 	if (ret) {

commit c9ab1e4db61c74833b3bb1395db2c24134af70f8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:43:27 2018 +0800

    rockchip: pinctrl: rk322x: convert to use live dt
    
    Change-Id: I690be6c4708f5fb90385af42a40108ae073d50a0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk322x.c b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
index 576b03739f..d300650649 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk322x.c
@@ -222,8 +222,7 @@ static int rk322x_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
+	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit cd47f9d7d4f86c3e40b45b7d396a285bf8c6ba1a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:42:11 2018 +0800

    rockchip: clk: rk322x: convert to live dt
    
    Change-Id: Ib0943d8f66d24ef36fd0020e468befce42ed5836
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index bc9055ee63..edcf49f0e8 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -394,7 +394,7 @@ static int rk322x_clk_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk322x_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 
 	return 0;
 }

commit b283d2ae7bf9dec650d82c6b10cb92ddd9d9ce5d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 14:39:33 2018 +0800

    core: read: fix some device may not have of node
    
    Some device like syscon, blk do not have of node, return directly.
    
    Change-Id: Icc4629632522f4a3af6532c6a9f2152b0e45de8b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 5d440cee72..c3a1e2899b 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -73,6 +73,9 @@ fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property,
 
 const char *dev_read_name(struct udevice *dev)
 {
+	if (!dev_of_valid(dev))
+		return NULL;
+
 	return ofnode_get_name(dev_ofnode(dev));
 }
 
@@ -159,6 +162,8 @@ int dev_read_alias_seq(struct udevice *dev, int *devnump)
 int dev_read_u32_array(struct udevice *dev, const char *propname,
 		       u32 *out_values, size_t sz)
 {
+	if (!dev_of_valid(dev))
+		return -EINVAL;
 	return ofnode_read_u32_array(dev_ofnode(dev), propname, out_values, sz);
 }
 
diff --git a/include/dm/read.h b/include/dm/read.h
index 8114037e97..77c9ae6fcd 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -464,6 +464,8 @@ static inline fdt_addr_t dev_read_addr_size(struct udevice *dev,
 
 static inline const char *dev_read_name(struct udevice *dev)
 {
+	if (!dev_of_valid(dev))
+		return NULL;
 	return ofnode_get_name(dev_ofnode(dev));
 }
 
@@ -545,6 +547,8 @@ static inline int dev_read_alias_seq(struct udevice *dev, int *devnump)
 static inline int dev_read_u32_array(struct udevice *dev, const char *propname,
 				     u32 *out_values, size_t sz)
 {
+	if (!dev_of_valid(dev))
+		return -EINVAL;
 	return ofnode_read_u32_array(dev_ofnode(dev), propname, out_values, sz);
 }
 

commit ab174b958c25f4422b7a6432c71e45b3c87882de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 24 16:26:32 2018 +0800

    bootm: fix to lmb mem reserve
    
    This is a bug fix to:
    534066e bootm: resever memory before any lmb_alloc()
    the patch make distro boot hand.
    
    Change-Id: I13634154daad211a2f51ee94043f6dfd57710eb3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 459063ead7..84830f1996 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -638,8 +638,10 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	}
 
 	/* Resever memory before any lmb_alloc, as early as possible */
-	boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
-
+#if IMAGE_ENABLE_OF_LIBFDT && defined(CONFIG_LMB)
+	if (!ret && (states & BOOTM_STATE_FDT))
+		boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
+#endif
 	/* Relocate the ramdisk */
 #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
 	if (!ret && (states & BOOTM_STATE_RAMDISK)) {

commit 1f5bcda2a8b182cb3f6de3afdfc6e600f094c573
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 11:18:00 2018 +0800

    android: replace CONFIG_ROCKCHIP_BOOTLOADER with CONFIG_RKIMG_BOOTLOADER
    
    Change-Id: I24db85313652bd21aada68cd472bdf888b7d022d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 3388f22578..102ed9215e 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -43,7 +43,7 @@ int android_bootloader_message_load(
 		return -1;
 	}
 
-#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	if (blk_dread(dev_desc, part_info->start + BOOTLOADER_MESSAGE_BLK_OFFSET,
 	     message_blocks, message) !=
 #else
diff --git a/common/image-android.c b/common/image-android.c
index cc416e522d..382157af16 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -163,7 +163,7 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	*rd_data += (rockchip_get_resource_file(*rd_data, ANDROID_ARG_FDT_FILENAME))
 			* 512;
 #endif

commit aae0febba51e692dccf786226d6ac421346f1e84
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 21:01:05 2018 +0800

    rockchip: Kconfig: default enable ROCKCHIP_RESOURCE_IMAGE
    
    default y When RKIMG_BOOTLOADER is enabled.
    
    Change-Id: I1627348860a8eae7efe4d26671a4a159ee7a2dec
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7090db00dc..c15d564e40 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -337,6 +337,7 @@ config RKIMG_BOOTLOADER
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
 	depends on RKIMG_BOOTLOADER
+	default y
 	help
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.

commit 866d7966e22de18e34f49ff2347811eda371f2a2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 20:44:12 2018 +0800

    usb: rockusb: set boot normal mode before reset
    
    Change-Id: I7b72a06fbf73a2dbf87fd7d1761dc036f3c40159
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index a4e16034c1..5744a123de 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -5,6 +5,8 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
 #include <rockusb.h>
 
 #define ROCKUSB_INTERFACE_CLASS	0xff
@@ -109,6 +111,8 @@ static int rkusb_check_lun(struct fsg_common *common)
 
 static void __do_reset(struct usb_ep *ep, struct usb_request *req)
 {
+	writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
 	do_reset(NULL, 0, 0, NULL);
 }
 

commit 8fb96674f6cda97c7675b1f1f15938ef4224ab62
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 23 19:43:15 2018 +0800

    disk: part_rkparm: add initrd fixup for cmdline
    
    remove unused "initrd=0x...,0x...", this for compatible
    with legacy parameter.txt.
    
    Change-Id: I7d9c5708a6b183479ac5980a90067cff8f0872de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index 686fa6ce29..748012131c 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -40,6 +40,8 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	char *pend;
 	int len, offset = 0;
 	unsigned long size, start;
+	char *initrd;
+	const char *str;
 
 	if (!cmdline) {
 		printf("invalid parameter\n");
@@ -47,6 +49,20 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head,
 	}
 
 	*cmdline_end = '\0';
+
+	/*
+	 * Initrd fixup: remove unused "initrd=0x...,0x...", this for
+	 * compatible with legacy parameter.txt
+	 */
+	initrd = strstr(cmdline, "initrd=");
+	if (initrd) {
+		str = strstr(initrd, " ");
+		/* Terminate, so cmdline can be dest for strcat() */
+		*initrd = '\0';
+		/* +1 to skip current white space */
+		strcat((char *)cmdline, (str + 1));
+	}
+
 	/* skip "CMDLINE:" */
 	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 

commit bf98386f4f2904e95414101bca1c853ee600ee01
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 23 16:15:17 2018 +0800

    rockchip: sdram: update dram_init_banksize for secure reserve
    
    Reserve memory only when there is reserve mem info at TRUST_PARAMETER_OFFSET,
    both ARM64 and ARM32 need to do this.
    
    Change-Id: I14370b92a4f4446482d5c241b85d1588acea14b5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index e9d2404d98..b1528dfd4e 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -44,38 +44,25 @@ int dram_init_banksize(void)
 {
 	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
 			 gd->ram_top);
+	struct tos_parameter_t *tos_parameter;
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
 
 #ifdef CONFIG_ARM64
 	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
 	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
 #else
-#ifdef CONFIG_SPL_OPTEE
-	struct tos_parameter_t *tos_parameter;
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+#endif
 	if (tos_parameter->tee_mem.flags == 1) {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- CONFIG_SYS_SDRAM_BASE;
+					- gd->bd->bi_dram[0].start;
 		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
 					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-					+ top - gd->bd->bi_dram[1].start;
-	} else {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[0].size = 0x8400000;
-		/* Reserve 32M for OPTEE with TA */
-		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-					+ gd->bd->bi_dram[0].size + 0x2000000;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-					+ top - gd->bd->bi_dram[1].start;
+		gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
 	}
-#else
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
-#endif
-#endif
 
 	return 0;
 }

commit bb1716ec8e16b59f5067f52c136d2d4fb98118f6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 23 08:53:00 2018 +0800

    rockchip: resource_img: remove compile warning
    
    Change-Id: I1cb85231be68b67e6a339a46be00a6f592986a9b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b0fc451210..5eba80243b 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -222,7 +222,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}
 
-	hdr = (void *)andr_hdr;
 	ret = blk_dread(dev_desc, offset, 1, hdr);
 	if (ret != 1)
 		goto out;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index de95d8c321..745461a3ce 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -314,7 +314,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
-	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
 #else

commit 22ae868202fe96958b47c1f92e49ef95c46aaed0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Jan 22 17:01:20 2018 +0800

    rockchip: inno-phy-usb2: fix code logic error
    
    Fix condition logic error in rockchip_usb2phy_parse().
    
    Change-Id: I51d2e97d73f9fc81295d424f97737f00d0e846d7
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 248162e042..f6d00c7edc 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -209,10 +209,11 @@ static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
 			usbgrf_base = NULL;
 	} else {
 		grf_node = ofnode_path("/syscon-usb");
-		if (ofnode_valid(grf_node))
+		if (ofnode_valid(grf_node)) {
 			grf_base = (void __iomem *)
 				ofnode_get_addr_size(grf_node, "reg", &size);
 			u2phy_node = ofnode_find_subnode(grf_node, "usb2-phy");
+		}
 	}
 
 	if (!grf_base && !usbgrf_base) {

commit d015bf411ad4c985302e770b352c73b31878519d
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Jan 19 16:58:27 2018 +0800

    usb: gadget: correct the capacity value for upgrade tools
    
    Correct the current capacity to support the different storage
    devices upgrade.
    
    Change-Id: I2c96183f317f42944887d02af097ff8a8d29cd4e
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index aa4b139945..a4e16034c1 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -232,12 +232,16 @@ static int rkusb_do_read_capacity(struct fsg_common *common,
 {
 	u8 *buf = (u8 *)bh->buf;
 	u32 len = common->data_size;
+	enum if_type type = ums[common->lun].block_dev.if_type;
 
 	/*
 	 * bit[0]: Direct LBA, 0: Disabled;
-	 * bit[1:63}: Reserved.
+	 * bit[1]: Vendor Storage API, 0: default;
+	 * bit[2]: First 4M Access, 0: Disabled;
+	 * bit[3:63}: Reserved.
 	 */
 	memset((void *)&buf[0], 0, len);
+	buf[0] = (type == IF_TYPE_MMC) ? (BIT(2) | BIT(0)) : BIT(0);
 
 	/* Set data xfer size */
 	common->residue = common->data_size_from_cmnd = len;

commit 2ab11bbe3064997a36e0739ad8729256d6171b89
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Jan 22 17:29:29 2018 +0800

    android: support the new android format mode
    
    In the new android images, the ramdisk.img is packed in the
    system.img. So transmit the "skip_initramfs" to cmdline to
    ignore the ramdisk.img (if have) loaded from boot.img.
    
    Change-Id: I1b2051d65078c903411f3ddcc0c7803cbd6892f4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index fdd0c92be7..3388f22578 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -384,7 +384,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		 * "skip_initramfs" to the cmdline to make it ignore the
 		 * recovery initramfs in the boot partition.
 		 */
+#ifdef CONFIG_ANDROID_AB
 		mode_cmdline = "skip_initramfs";
+#endif
 		break;
 	case ANDROID_BOOT_MODE_RECOVERY:
 		/* In recovery mode we still boot the kernel from "boot" but

commit 38771996118a171fff716c70918a088897417901
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:49:12 2018 +0800

    rockchip: add common board file for rockchip platform
    
    We use common board/spl/tpl file for all rockchip SoCs,
    - all the SoC spec setting should move into SoC file like rk3288.c;
    - tpl is option and only purpose to init DRAM, clock, uart(option);
    - spl do secure relate one time init, boot device select, boot into
      U-Boot or trust or OS in falcon mode;
    - board do boot mode detect, enable regulator, usb init and so on.
    
    Change-Id: I7b5fa1e3e6e5f4a30a382003215425530087a586
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ee03940ac0..fa640b930f 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,20 +11,8 @@
 obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 
-obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
-
-obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
-obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
+obj-tpl-y += tpl.o
+obj-spl-y += spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 
@@ -33,25 +21,16 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 # we can have the preprocessor correctly recognise both 0x0 and 0
 # meaning "turn it off".
 obj-y += boot_mode.o
+obj-y += board.o
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
-obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
-obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
-obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
-obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
-obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
-obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o
 
-ifndef CONFIG_ARM64
-obj-y += rk_timer.o
-endif
-
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
 obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
new file mode 100644
index 0000000000..4848c3ea3a
--- /dev/null
+++ b/arch/arm/mach-rockchip/board.c
@@ -0,0 +1,165 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/boot_mode.h>
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+#include <power/charge_display.h>
+#endif
+#ifdef CONFIG_DM_REGULATOR
+#include <power/regulator.h>
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP
+#include <video_rockchip.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	printf("Setting reboot to fastboot flag ...\n");
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
+	return 0;
+}
+
+#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
+static int fastboot_key_pressed(void)
+{
+	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
+	gpio_direction_input(FASTBOOT_KEY_GPIO);
+	return !gpio_get_value(FASTBOOT_KEY_GPIO);
+}
+#endif
+
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+static int charge_display(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	return charge_display_show(dev);
+}
+#endif
+
+__weak int rk_board_init(void)
+{
+	return 0;
+}
+
+__weak int rk_board_late_init(void)
+{
+	return 0;
+}
+
+int board_late_init(void)
+{
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+	if (fastboot_key_pressed()) {
+		printf("fastboot key pressed!\n");
+		fb_set_reboot_flag();
+	}
+#endif
+
+#if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0)
+	setup_boot_mode();
+#endif
+
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+	charge_display();
+#endif
+
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_show_logo();
+#endif
+
+	return rk_board_late_init();
+}
+
+int board_init(void)
+{
+	int ret;
+
+#ifdef CONFIG_DM_REGULATOR
+	ret = regulators_enable_boot_on(false);
+	if (ret)
+		debug("%s: Cannot enable boot on regulator\n", __func__);
+#endif
+
+	return rk_board_init();
+}
+
+#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64)
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data otg_data = {
+	.rx_fifo_sz	= 512,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	int node;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+
+	/* find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"snps,dwc2");
+
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node,
+					"snps,dwc2");
+	}
+	if (!matched) {
+		debug("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+	otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	return dwc2_udc_probe(&otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
new file mode 100644
index 0000000000..cc12a2afe3
--- /dev/null
+++ b/arch/arm/mach-rockchip/spl.c
@@ -0,0 +1,190 @@
+/*
+ * (C) Copyright 2018 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/arch/bootrom.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
+__weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+};
+
+const char *board_spl_was_booted_from(void)
+{
+	u32  bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+	const char *bootdevice_ofpath = NULL;
+
+	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
+		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
+
+	if (bootdevice_ofpath)
+		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
+		      __func__, bootdevice_brom_id, bootdevice_ofpath);
+	else
+		debug("%s: failed to resolve brom_bootdevice_id %x\n",
+		      __func__, bootdevice_brom_id);
+
+	return bootdevice_ofpath;
+}
+
+u32 spl_boot_device(void)
+{
+	u32 boot_device = BOOT_DEVICE_MMC1;
+
+#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
+		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
+		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
+	return BOOT_DEVICE_SPI;
+#endif
+	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
+		return BOOT_DEVICE_BOOTROM;
+
+	return boot_device;
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
+
+__weak void rockchip_stimer_init(void)
+{
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
+__weak int arch_cpu_init(void)
+{
+	return 0;
+}
+
+__weak int rk_board_init_f(void)
+{
+	return 0;
+}
+
+void board_init_f(ulong dummy)
+{
+#ifdef CONFIG_SPL_FRAMEWORK
+	int ret;
+#if !defined(CONFIG_SUPPORT_TPL)
+	struct udevice *dev;
+#endif
+#endif
+
+#define EARLY_UART
+#if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+	printascii("U-Boot SPL board init");
+#endif
+
+	arch_cpu_init();
+	rockchip_stimer_init();
+#ifdef CONFIG_SPL_FRAMEWORK
+	ret = spl_early_init();
+	if (ret) {
+		printf("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+#if !defined(CONFIG_SUPPORT_TPL)
+	debug("\nspl:init dram\n");
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+#endif
+	preloader_console_init();
+#else
+	/* Some SoCs like rk3036 does not use any frame work */
+	sdram_init();
+#endif
+
+	rk_board_init_f();
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+#endif
+
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_SPL_BOARD_INIT
+__weak int rk_spl_board_init(void)
+{
+	return 0;
+}
+
+static int setup_led(void)
+{
+#ifdef CONFIG_SPL_LED
+	struct udevice *dev;
+	char *led_name;
+	int ret;
+
+	led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
+	if (!led_name)
+		return 0;
+	ret = led_get_by_label(led_name, &dev);
+	if (ret) {
+		debug("%s: get=%d\n", __func__, ret);
+		return ret;
+	}
+	ret = led_set_on(dev, 1);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+
+void spl_board_init(void)
+{
+	int ret;
+
+	ret = setup_led();
+
+	if (ret) {
+		debug("LED ret=%d\n", ret);
+		hang();
+	}
+
+	rk_spl_board_init();
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+#endif
+	return;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
new file mode 100644
index 0000000000..e28ce13ce0
--- /dev/null
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -0,0 +1,102 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ns16550.h>
+#include <ram.h>
+#include <spl.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/uart.h>
+
+#ifndef CONFIG_SPL_LIBCOMMON_SUPPORT
+void puts(const char *str)
+{
+	while (*str)
+		putc(*str++);
+}
+
+void putc(char c)
+{
+	if (c == '\n')
+		NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), '\r');
+
+	NS16550_putc((NS16550_t)(CONFIG_SYS_NS16550_COM1), c);
+}
+#endif /* CONFIG_SPL_LIBCOMMON_SUPPORT */
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+__weak void rockchip_stimer_init(void)
+{
+#ifndef CONFIG_ARM64
+	asm volatile("mcr p15, 0, %0, c14, c0, 0"
+		     : : "r"(COUNTER_FREQUENCY));
+#endif
+	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
+	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
+	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+#define EARLY_DEBUG
+#ifdef EARLY_DEBUG
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+	printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+				U_BOOT_TIME ")\n");
+
+#endif
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	rockchip_stimer_init();
+	/* Init ARM arch timer */
+	timer_init();
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+
+#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+#endif
+}
+
+#ifndef CONFIG_SPL_FRAMEWORK
+/* Place Holders */
+void board_init_r(gd_t *id, ulong dest_addr)
+{
+	/*
+	 * Function attribute is no-return
+	 * This Function never executes
+	 */
+	while (1)
+		;
+}
+#endif

commit 7a6ed8e85fb413a7da484e9c30b1e9beab2e594a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:05:24 2018 +0800

    rockchip: declear boot_devices in bootrom.h
    
    boot_devices may defined in soc file, and used in board file,
    we need to delear it in header file.
    
    Change-Id: I621dac73d0e00379da49b78b3a9079e30642881a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 91e75cf732..78f9da6a64 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -53,6 +53,8 @@ enum {
 	BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
 };
 
+extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
+
 /**
  * Locations of the boot-device identifier in SRAM
  */

commit 09a3210f7f7d778e3ae750dbd8e581d5a0c5a2e8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 15:03:08 2018 +0800

    rockchip: spl-boot-order: do not enable with OF_PLATDATA
    
    The "fdt_*" functions may not enable even if the OF_CONTROL is enabled.
    
    Change-Id: I66760056f6f721e4d33f25468b46b1446ebbaf4a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 843998dfdc..c00a68a9fa 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -9,7 +9,7 @@
 #include <mmc.h>
 #include <spl.h>
 
-#if CONFIG_IS_ENABLED(OF_CONTROL)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && ! CONFIG_IS_ENABLED(OF_PLATDATA)
 /**
  * spl_node_to_boot_device() - maps from a DT-node to a SPL boot device
  * @node:	of_offset of the node

commit f10f1ffab44a841f99cf9a61f51e6a0b5f526dc8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:58:18 2018 +0800

    rockchip: dts: rk3399-firefly: enable uart2 in spl
    
    pre-loader console in SPL needs UART.
    
    Change-Id: I2db396f00ec8a96452a53be1806ea0ef7aacd990
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index f134c00688..a007fa1013 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -648,6 +648,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 

commit 04623617acee518e879f2071fcccb0b31239f913
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:57:06 2018 +0800

    rockchip: remove rk_timer
    
    We do not use rk_timer.c now, remove it.
    
    Change-Id: Ifd4863031cc782fd8d85b494046f346230087f9a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk_timer.c b/arch/arm/mach-rockchip/rk_timer.c
deleted file mode 100644
index 853b986646..0000000000
--- a/arch/arm/mach-rockchip/rk_timer.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/timer.h>
-#include <asm/io.h>
-#include <linux/types.h>
-
-struct rk_timer * const timer_ptr = (void *)CONFIG_SYS_TIMER_BASE;
-
-static uint64_t rockchip_get_ticks(void)
-{
-	uint64_t timebase_h, timebase_l;
-
-	timebase_l = readl(&timer_ptr->timer_curr_value0);
-	timebase_h = readl(&timer_ptr->timer_curr_value1);
-
-	return timebase_h << 32 | timebase_l;
-}
-
-static uint64_t usec_to_tick(unsigned int usec)
-{
-	uint64_t tick = usec;
-	tick *= CONFIG_SYS_TIMER_RATE / (1000 * 1000);
-	return tick;
-}
-
-void rockchip_udelay(unsigned int usec)
-{
-	uint64_t tmp;
-
-	/* get timestamp */
-	tmp = rockchip_get_ticks() + usec_to_tick(usec);
-
-	/* loop till event */
-	while (rockchip_get_ticks() < tmp+1)
-		;
-}
-
-void rockchip_timer_init(void)
-{
-	writel(0xffffffff, &timer_ptr->timer_load_count0);
-	writel(0xffffffff, &timer_ptr->timer_load_count1);
-	writel(1, &timer_ptr->timer_ctrl_reg);
-}

commit 9d6b570b8865186d659928cb31052f0944a1f510
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:45:21 2018 +0800

    rockchip: lion-rk3368: remove rockchip timer
    
    We use ARM generic timer.
    
    Change-Id: Iafc3a71c87dd3f005134c3e6235ec5f8294a415d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 330063d1b4..ccfde2f5c6 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -88,10 +88,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
-CONFIG_TIMER=y
-CONFIG_SPL_TIMER=y
-CONFIG_TPL_TIMER=y
-CONFIG_ROCKCHIP_TIMER=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_LZO=y

commit db48fc9697af8c1a6cfd5c5fa92c2f98fa2cefe1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:44:10 2018 +0800

    rockchip: rk3399: use common board file
    
    Use common board file and move SoC spec setting into rk3399.c
    
    Change-Id: Ic674cef566b16c33978a1430eadfa9438b2de1db
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
deleted file mode 100644
index 6212d96de8..0000000000
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3399.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/io.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <dm/pinctrl.h>
-#include <ram.h>
-#include <spl.h>
-#include <syscon.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
-	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
-	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
-	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
-};
-
-const char *board_spl_was_booted_from(void)
-{
-	u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
-	const char *bootdevice_ofpath = NULL;
-
-	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
-		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
-
-	if (bootdevice_ofpath)
-		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
-		      __func__, bootdevice_brom_id, bootdevice_ofpath);
-	else
-		debug("%s: failed to resolve brom_bootdevice_id %x\n",
-		      __func__, bootdevice_brom_id);
-
-	return bootdevice_ofpath;
-}
-
-u32 spl_boot_device(void)
-{
-	u32 boot_device = BOOT_DEVICE_MMC1;
-
-	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
-		return BOOT_DEVICE_BOOTROM;
-
-	return boot_device;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-#define TIMER_CHN10_BASE	0xff8680a0
-#define TIMER_END_COUNT_L	0x00
-#define TIMER_END_COUNT_H	0x04
-#define TIMER_INIT_COUNT_L	0x10
-#define TIMER_INIT_COUNT_H	0x14
-#define TIMER_CONTROL_REG	0x1c
-
-#define TIMER_EN	0x1
-#define	TIMER_FMODE	(0 << 1)
-#define	TIMER_RMODE	(1 << 1)
-
-void secure_timer_init(void)
-{
-	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
-	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
-	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
-	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
-	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
-}
-
-void board_debug_uart_init(void)
-{
-#define GRF_BASE	0xff770000
-	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
-	/* Enable early UART0 on the RK3399 */
-	rk_clrsetreg(&grf->gpio2c_iomux,
-		     GRF_GPIO2C0_SEL_MASK,
-		     GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio2c_iomux,
-		     GRF_GPIO2C1_SEL_MASK,
-		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
-#else
-	/* Enable early UART2 channel C on the RK3399 */
-	rk_clrsetreg(&grf->gpio4c_iomux,
-		     GRF_GPIO4C3_SEL_MASK,
-		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio4c_iomux,
-		     GRF_GPIO4C4_SEL_MASK,
-		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->soc_con7,
-		     GRF_UART_DBG_SEL_MASK,
-		     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
-#endif
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	struct rk3399_pmusgrf_regs *sgrf;
-	struct rk3399_grf_regs *grf;
-	int ret;
-
-#define EARLY_UART
-#ifdef EARLY_UART
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("U-Boot SPL board init");
-#endif
-
-	secure_timer_init();
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/*
-	 * Disable DDR and SRAM security regions.
-	 *
-	 * As we are entered from the BootROM, the region from
-	 * 0x0 through 0xfffff (i.e. the first MB of memory) will
-	 * be protected. This will cause issues with the DW_MMC
-	 * driver, which tries to DMA from/to the stack (likely)
-	 * located in this range.
-	 */
-	sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
-	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
-	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
-
-	/*  eMMC clock generator: disable the clock multipilier */
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index f2f2f75e32..27697a8e44 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -5,13 +5,12 @@
  */
 
 #include <common.h>
-#include <syscon.h>
 #include <asm/armv8/mmu.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/arch/clock.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
+#include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,47 +39,91 @@ static struct mm_region rk3399_mem_map[] = {
 
 struct mm_region *mem_map = rk3399_mem_map;
 
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
+	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+};
 
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
+#ifdef CONFIG_SPL_BUILD
 
-	return 0;
+#define TIMER_CHN10_BASE	0xff8680a0
+#define TIMER_END_COUNT_L	0x00
+#define TIMER_END_COUNT_H	0x04
+#define TIMER_INIT_COUNT_L	0x10
+#define TIMER_INIT_COUNT_H	0x14
+#define TIMER_CONTROL_REG	0x1c
+
+#define TIMER_EN	0x1
+#define	TIMER_FMODE	(0 << 1)
+#define	TIMER_RMODE	(1 << 1)
+
+void rockchip_stimer_init(void)
+{
+	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
+	writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
+	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
+	writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
+	writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
+	printf("%s\n", __func__);
 }
 
+#define GRF_BASE	0xff770000
+#define PMUGRF_BASE	0xff320000
+#define PMUSGRF_BASE	0xff330000
 int arch_cpu_init(void)
 {
-	/* We do some SoC one time setting here. */
+	struct rk3399_pmusgrf_regs *sgrf = (void *)PMUSGRF_BASE;
+	struct rk3399_pmugrf_regs *pmugrf = (void *)PMUGRF_BASE;
+	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
-	/* Emmc clock generator: disable the clock multipilier */
-	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
+	/* We do some SoC one time setting here. */
+	/*
+	 * Disable DDR and SRAM security regions.
+	 *
+	 * As we are entered from the BootROM, the region from
+	 * 0x0 through 0xfffff (i.e. the first MB of memory) will
+	 * be protected. This will cause issues with the DW_MMC
+	 * driver, which tries to DMA from/to the stack (likely)
+	 * located in this range.
+	 */
+	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
+	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
+
+	/*  eMMC clock generator: disable the clock multipilier */
+	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
 
 	/* PWM3 select pwm3a io */
-	rk_clrreg(PMU_GRF_SOC_CON0, 1 << 5);
-
-	return 0;
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
+	rk_clrreg(&pmugrf->soc_con0, 1 << 5);
 
 	return 0;
 }
+#endif
 
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
+void board_debug_uart_init(void)
 {
-	struct rk3399_pmugrf_regs *pmugrf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-	/* Clear boot mode */
-	writel(BOOT_FASTBOOT, &pmugrf->os_reg0);
-
-	return 0;
-}
+#define GRF_BASE	0xff770000
+	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+	/* Enable early UART0 on the RK3399 */
+	rk_clrsetreg(&grf->gpio2c_iomux,
+		     GRF_GPIO2C0_SEL_MASK,
+		     GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio2c_iomux,
+		     GRF_GPIO2C1_SEL_MASK,
+		     GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
+#else
+	/* Enable early UART2 channel C on the RK3399 */
+	rk_clrsetreg(&grf->gpio4c_iomux,
+		     GRF_GPIO4C3_SEL_MASK,
+		     GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio4c_iomux,
+		     GRF_GPIO4C4_SEL_MASK,
+		     GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->soc_con7,
+		     GRF_UART_DBG_SEL_MASK,
+		     GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
 #endif
+}
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index e2e6d49e9a..c2b6d83d5c 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -23,7 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define RK3399_CPUID_OFF  0x7
 #define RK3399_CPUID_LEN  0x10
 
-int board_init(void)
+int rk_board_init(void)
 {
 	struct udevice *pinctrl, *regulator;
 	int ret;
@@ -58,10 +58,6 @@ int board_init(void)
 		goto out;
 	}
 
-	ret = regulators_enable_boot_on(false);
-	if (ret)
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-
 	ret = regulator_get_by_platname("vcc5v0_host", &regulator);
 	if (ret) {
 		debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
@@ -211,30 +207,3 @@ int board_usb_init(int index, enum usb_init_type init)
 	return dwc3_uboot_init(&dwc3_device_data);
 }
 #endif
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-	return;
-err:
-	printf("%s: Error %d\n", __func__, ret);
-
-	/* No way to report error here */
-	hang();
-}
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index c6690fa069..9946311a23 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -25,21 +25,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int board_init(void)
-{
-	int ret;
-
-	/*
-	 * We need to call into regulators_enable_boot_on() again, as the call
-	 * during SPL may have not included all regulators.
-	 */
-	ret = regulators_enable_boot_on(false);
-	if (ret)
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-
-	return 0;
-}
-
 static void rk3399_force_power_on_reset(void)
 {
 	ofnode node;
@@ -62,7 +47,7 @@ static void rk3399_force_power_on_reset(void)
 	dm_gpio_set_value(&sysreset_gpio, 1);
 }
 
-void spl_board_init(void)
+void rk_spl_board_init(void)
 {
 	int  ret;
 	struct rk3399_cru *cru = rockchip_get_cru();

commit 9814e89b6924f49be60fe6d61916116fba89ca04
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:39:30 2018 +0800

    rockchip: rk3368: use common board file
    
    Use common board file and move SoC spec setting into rk3368.c
    
    Change-Id: I1d5a2b0bae03f89092cc0daf1c52622b3884cc43
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
deleted file mode 100644
index 72d2c97d36..0000000000
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <dm/pinctrl.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_debug_uart_init(void)
-{
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	int ret;
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Set up our preloader console */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		pr_err("%s: pinctrl init failed: %d\n", __func__, ret);
-		hang();
-	}
-
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
-	if (ret) {
-		pr_err("%s: failed to set up console UART\n", __func__);
-		hang();
-	}
-
-	preloader_console_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
deleted file mode 100644
index 60d5aeade9..0000000000
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/clock.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
-#include <syscon.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * The SPL (and also the full U-Boot stage on the RK3368) will run in
- * secure mode (i.e. EL3) and an ATF will eventually be booted before
- * starting up the operating system... so we can initialize the SGRF
- * here and rely on the ATF installing the final (secure) policy
- * later.
- */
-static inline uintptr_t sgrf_soc_con_addr(unsigned no)
-{
-	const uintptr_t SGRF_BASE =
-		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
-
-	return SGRF_BASE + sizeof(u32) * no;
-}
-
-static inline uintptr_t sgrf_busdmac_addr(unsigned no)
-{
-	const uintptr_t SGRF_BASE =
-		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
-	const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
-	const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
-
-	return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
-}
-
-static void sgrf_init(void)
-{
-	struct rk3368_cru * const cru =
-		(struct rk3368_cru * const)rockchip_get_cru();
-	const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
-	const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
-	const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
-
-	/* Set all configurable IP to 'non secure'-mode */
-	rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
-	rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
-	rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
-
-	/*
-	 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
-	 * Original comment: "ddr space set no secure mode"
-	 */
-	rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
-	rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
-	rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
-
-	/* Set 'secure dma' to 'non secure'-mode */
-	rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
-	rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
-
-	dsb();  /* barrier */
-
-	rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
-	rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
-
-	dsb();  /* barrier */
-	udelay(10);
-
-	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
-	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
-}
-
-void board_debug_uart_init(void)
-{
-	/*
-	 * N.B.: This is called before the device-model has been
-	 *       initialised. For this reason, we can not access
-	 *       the GRF address range using the syscon API.
-	 */
-	struct rk3368_grf * const grf =
-		(struct rk3368_grf * const)0xff770000;
-
-	enum {
-		GPIO2D1_MASK            = GENMASK(3, 2),
-		GPIO2D1_GPIO            = 0,
-		GPIO2D1_UART0_SOUT      = (1 << 2),
-
-		GPIO2D0_MASK            = GENMASK(1, 0),
-		GPIO2D0_GPIO            = 0,
-		GPIO2D0_UART0_SIN       = (1 << 0),
-	};
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
-	/* Enable early UART0 on the RK3368 */
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
-#endif
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-#define EARLY_UART
-#ifdef EARLY_UART
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("U-Boot TPL board init\n");
-#endif
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Reset security, so we can use DMA in the MMC drivers */
-	sgrf_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index ce9e62669f..b00364305f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <asm/armv8/mmu.h>
+#include <asm/arch/bootrom.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3368.h>
@@ -83,16 +84,10 @@ static struct mm_region rk3368_mem_map[] = {
 
 struct mm_region *mem_map = rk3368_mem_map;
 
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
-
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/dwmmc@ff0f0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@ff0c0000",
+};
 
 #ifdef CONFIG_ARCH_EARLY_INIT_R
 static int mcu_init(void)
@@ -123,6 +118,13 @@ static int mcu_init(void)
 	return 0;
 }
 
+int arch_early_init_r(void)
+{
+	return mcu_init();
+}
+#endif
+
+#ifdef CONFIG_SPL_BUILD
 static void cpu_axi_qos_prority_level_config(void)
 {
 	u32 level;
@@ -153,6 +155,97 @@ static void cpu_axi_qos_prority_level_config(void)
 	writel(level, ISP_W1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
 }
 
+/*
+ * The SPL (and also the full U-Boot stage on the RK3368) will run in
+ * secure mode (i.e. EL3) and an ATF will eventually be booted before
+ * starting up the operating system... so we can initialize the SGRF
+ * here and rely on the ATF installing the final (secure) policy
+ * later.
+ */
+static inline uintptr_t sgrf_soc_con_addr(unsigned no)
+{
+	const uintptr_t SGRF_BASE =
+		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+
+	return SGRF_BASE + sizeof(u32) * no;
+}
+
+static inline uintptr_t sgrf_busdmac_addr(unsigned no)
+{
+	const uintptr_t SGRF_BASE =
+		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+	const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
+	const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
+
+	return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
+}
+
+static void sgrf_init(void)
+{
+	struct rk3368_cru * const cru =
+		(struct rk3368_cru * const)rockchip_get_cru();
+	const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
+	const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
+	const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
+
+	/* Set all configurable IP to 'non secure'-mode */
+	rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
+	rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
+	rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
+
+	/*
+	 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
+	 * Original comment: "ddr space set no secure mode"
+	 */
+	rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
+	rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
+	rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
+
+	/* Set 'secure dma' to 'non secure'-mode */
+	rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
+	rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
+
+	dsb();  /* barrier */
+
+	rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+	rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+
+	dsb();  /* barrier */
+	udelay(10);
+
+	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+}
+
+void board_debug_uart_init(void)
+{
+	/*
+	 * N.B.: This is called before the device-model has been
+	 *       initialised. For this reason, we can not access
+	 *       the GRF address range using the syscon API.
+	 */
+	struct rk3368_grf * const grf =
+		(struct rk3368_grf * const)0xff770000;
+
+	enum {
+		GPIO2D1_MASK            = GENMASK(3, 2),
+		GPIO2D1_GPIO            = 0,
+		GPIO2D1_UART0_SOUT      = (1 << 2),
+
+		GPIO2D0_MASK            = GENMASK(1, 0),
+		GPIO2D0_GPIO            = 0,
+		GPIO2D0_UART0_SIN       = (1 << 0),
+	};
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+	/* Enable early UART0 on the RK3368 */
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#endif
+}
+
 int arch_cpu_init(void)
 {
 	/* DDR read latency config */
@@ -170,11 +263,9 @@ int arch_cpu_init(void)
 	/* Cpu axi qos config */
 	cpu_axi_qos_prority_level_config();
 
-	return 0;
-}
+	/* Reset security, so we can use DMA in the MMC drivers */
+	sgrf_init();
 
-int arch_early_init_r(void)
-{
-	return mcu_init();
+	return 0;
 }
 #endif
diff --git a/board/geekbuying/geekbox/geekbox.c b/board/geekbuying/geekbox/geekbox.c
index 88b67f9d5f..d6823495ef 100644
--- a/board/geekbuying/geekbox/geekbox.c
+++ b/board/geekbuying/geekbox/geekbox.c
@@ -7,8 +7,3 @@
 #include <common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c
index 6a47642b57..ec3d27e859 100644
--- a/board/rockchip/evb_px5/evb-px5.c
+++ b/board/rockchip/evb_px5/evb-px5.c
@@ -4,8 +4,3 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/rockchip/sheep_rk3368/sheep_rk3368.c b/board/rockchip/sheep_rk3368/sheep_rk3368.c
index 17adb02469..ff2d2d23e6 100644
--- a/board/rockchip/sheep_rk3368/sheep_rk3368.c
+++ b/board/rockchip/sheep_rk3368/sheep_rk3368.c
@@ -15,8 +15,3 @@ int mach_cpu_init(void)
 {
 	return 0;
 }
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/theobroma-systems/lion_rk3368/lion_rk3368.c b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
index 73b14883c3..025692b2a4 100644
--- a/board/theobroma-systems/lion_rk3368/lion_rk3368.c
+++ b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
@@ -7,9 +7,6 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/timer.h>
 #include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -18,8 +15,3 @@ int mach_cpu_init(void)
 {
 	return 0;
 }
-
-int board_init(void)
-{
-	return 0;
-}

commit 73d952acc8cc1ddad6652ba71895d9fe928c1e4b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:37:17 2018 +0800

    rockchip: rk3328: use common board file
    
    Use common board file and move SoC spec setting into rk3328.c
    
    Change-Id: Ia7cf43e0096da980d744260caa61456ddc6b24eb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328-board-spl.c b/arch/arm/mach-rockchip/rk3328-board-spl.c
deleted file mode 100644
index 1f7274a8d0..0000000000
--- a/arch/arm/mach-rockchip/rk3328-board-spl.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <dm/pinctrl.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/cru_rk3328.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_debug_uart_init(void)
-{
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	preloader_console_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
deleted file mode 100644
index 942223f505..0000000000
--- a/arch/arm/mach-rockchip/rk3328-board-tpl.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <mmc.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/arch/uart.h>
-
-#define CRU_BASE		0xFF440000
-#define GRF_BASE		0xFF100000
-#define UART2_BASE		0xFF130000
-#define STIMER_BASE_ADDR		0xFF1d0000
-#define CPU_TIMER_BASE			(STIMER_BASE_ADDR + 0x20)
-
-void board_timer_init(void)
-{
-	/* Initialize CNTFRQ */
-	__asm__ volatile ("LDR x0,=24000000");
-	__asm__ volatile ("MSR CNTFRQ_EL0, x0");
-
-	/* Enable STimer1 for core */
-	writel(0x0, CPU_TIMER_BASE + 0x0010);
-	writel(0xffffffff, CPU_TIMER_BASE + 0x0000);
-	writel(0xffffffff, CPU_TIMER_BASE + 0x0004);
-	writel(0x1, CPU_TIMER_BASE + 0x0010);
-}
-
-void board_debug_uart_init(void)
-{
-	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
-	struct rk_uart * const uart = (void *)UART2_BASE;
-
-	/* uart_sel_clk default select 24MHz */
-	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);
-
-	/* init uart baud rate 1500000 */
-	writel(0x83, &uart->lcr);
-	writel(0x1, &uart->rbr);
-	writel(0x3, &uart->lcr);
-
-	/* Enable early UART2 */
-	rk_clrsetreg(&grf->com_iomux,
-		     IOMUX_SEL_UART2_MASK,
-		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);
-	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A0_SEL_MASK,
-		     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT);
-	rk_clrsetreg(&grf->gpio2a_iomux,
-		     GPIO2A1_SEL_MASK,
-		     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
-
-	/* enable FIFO */
-	writel(0x1, &uart->sfe);
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
-
-#define FW_DDR_CON_REG 0xff7c0040
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-#define EARLY_UART
-#ifdef EARLY_UART
-	debug_uart_init();
-	printascii("U-Boot TPL board init\n");
-#endif
-
-	board_timer_init();
-
-	ret = spl_early_init();
-	if (ret) {
-		printf("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		printf("DRAM init failed: %d\n", ret);
-		return;
-	}
-	/* Disable the ddr secure region setting to make it non-secure */
-	rk_setreg(FW_DDR_CON_REG, 0x200);
-
-}
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index df5b190a1e..a8de952377 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -5,14 +5,21 @@
  */
 
 #include <common.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/arch/uart.h>
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_SOC_CON4		0xff100410
+#define CRU_BASE		0xFF440000
+#define GRF_BASE		0xFF100000
+#define UART2_BASE		0xFF130000
+
 #define CRU_MISC_CON		0xff440084
+#define FW_DDR_CON_REG		0xff7c0040
 
 static struct mm_region rk3328_mem_map[] = {
 	{
@@ -36,28 +43,56 @@ static struct mm_region rk3328_mem_map[] = {
 
 struct mm_region *mem_map = rk3328_mem_map;
 
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
-
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
-
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/rksdmmc@ff520000",
+	[BROM_BOOTSOURCE_SD] = "/rksdmmc@ff500000",
+};
 int arch_cpu_init(void)
 {
+#ifdef CONFIG_TPL_BUILD
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_setreg(FW_DDR_CON_REG, 0x200);
+
 	/* Enable force to jtag, jtag_tclk/tms iomuxed with sdmmc0_d2/d3 */
-	rk_setreg(GRF_SOC_CON4, 1 << 12);
+	rk_setreg(&grf->soc_con[4], 1 << 12);
 
 	/* HDMI phy clock source select HDMIPHY clock out */
 	rk_clrreg(CRU_MISC_CON, 1 << 13);
 
 	/* TODO: ECO version */
-
+#endif
 	return 0;
 }
+
+void board_debug_uart_init(void)
+{
+#ifdef CONFIG_TPL_BUILD
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
+	struct rk_uart * const uart = (void *)UART2_BASE;
+
+	/* uart_sel_clk default select 24MHz */
+	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);
+
+	/* init uart baud rate 1500000 */
+	writel(0x83, &uart->lcr);
+	writel(0x1, &uart->rbr);
+	writel(0x3, &uart->lcr);
+
+	/* Enable early UART2 */
+	rk_clrsetreg(&grf->com_iomux,
+		     IOMUX_SEL_UART2_MASK,
+		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A0_SEL_MASK,
+		     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A1_SEL_MASK,
+		     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
+
+	/* enable FIFO */
+	writel(0x1, &uart->sfe);
+#endif
+}
diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index d6fc57cd8e..c8e7a3ad64 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -3,80 +3,3 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3328.h>
-#include <asm/armv8/mmu.h>
-#include <asm/io.h>
-#include <dwc3-uboot.h>
-#include <power/regulator.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
-	int ret;
-#define GRF_BASE	0xff100000
-	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
-
-	/* uart2 select m1, sdcard select m1*/
-	rk_clrsetreg(&grf->com_iomux,
-		     IOMUX_SEL_UART2_MASK | IOMUX_SEL_SDMMC_MASK,
-		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT |
-		     IOMUX_SEL_SDMMC_M1 << IOMUX_SEL_SDMMC_SHIFT);
-
-	ret = regulators_enable_boot_on(false);
-	if (ret)
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-
-	return ret;
-}
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3328_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3328-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3328-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-
-	rk3328_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3328_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif

commit 27dbe1983626d051bdd37f2418d0f94dbf7b170d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:33:53 2018 +0800

    rockchip: rv1108: use common board file
    
    Use common board file.
    
    Change-Id: I5fefdfad9a2acdb837ffe15f93518dc26e08b9e7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c
index 868cdd5a63..3b6b21d4f9 100644
--- a/arch/arm/mach-rockchip/rv1108/rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/rv1108.c
@@ -5,11 +5,3 @@
  */
 
 #include <common.h>
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c
index fe37eac420..3538f72046 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -30,12 +30,6 @@ int mach_cpu_init(void)
 	return 0;
 }
 
-
-int board_init(void)
-{
-	return 0;
-}
-
 int dram_init(void)
 {
 	gd->ram_size = 0x8000000;

commit f4c952bc1fb0ea5832299dc83fd9043ae1ef1879
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:32:34 2018 +0800

    rockchip: rk1108: remove rockchip timer for sys timer
    
    We use ARM arch timer instead.
    
    Change-Id: I834da04f1c7dc6e38ee64b420c66d2ad7d1b65ac
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index df6f952b6e..08198f06a3 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -13,11 +13,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-/* TIMER1,initialized by ddr initialize code */
-#define CONFIG_SYS_TIMER_BASE		0x10350020
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE

commit 26ceaeee5f441ad10e873109a2284d252aa0d489
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:30:06 2018 +0800

    rockchip: dts: rk3288: update spl-boot-order
    
    Use "uboot,spl-boot-orde" instead of "uboot,boot0".
    
    Change-Id: I647500193ab7cd89e7e409b75793a3eff4453d84
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-phycore-rdk.dts b/arch/arm/dts/rk3288-phycore-rdk.dts
index f2bb7b5f11..3bf8efb319 100644
--- a/arch/arm/dts/rk3288-phycore-rdk.dts
+++ b/arch/arm/dts/rk3288-phycore-rdk.dts
@@ -53,11 +53,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-	};
-
-	config {
-		u-boot,dm-pre-reloc;
-		u-boot,boot0 = &emmc;
+		u-boot,spl-boot-order = &emmc;
 	};
 
 	user_buttons: user-buttons {
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index a314058750..77b9bf8c88 100644
--- a/arch/arm/dts/rk3288-veyron.dtsi
+++ b/arch/arm/dts/rk3288-veyron.dtsi
@@ -17,11 +17,7 @@
 
 	chosen {
 		stdout-path = &uart2;
-	};
-
-	config {
-		u-boot,dm-pre-reloc;
-		u-boot,boot0 = &spi_flash;
+		u-boot,spl-boot-order = &spi_flash;
 	};
 
 	firmware {

commit fc9839356c37f899363d91086eea90aebd263ee8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:28:02 2018 +0800

    rockchip: rk3288: use common board file
    
    Use common board file and move SoC spec setting into rk3288.c
    
    Change-Id: Ie17232dd60d2b185b635631ce9373eb59b11c89c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
deleted file mode 100644
index f64a54843f..0000000000
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <i2c.h>
-#include <led.h>
-#include <malloc.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/sdram_common.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-#include <power/rk8xx_pmic.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	const void *blob = gd->fdt_blob;
-	struct udevice *dev;
-	const char *bootdev;
-	int node;
-	int ret;
-
-	bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
-	debug("Boot device %s\n", bootdev);
-	if (!bootdev)
-		goto fallback;
-
-	node = fdt_path_offset(blob, bootdev);
-	if (node < 0) {
-		debug("node=%d\n", node);
-		goto fallback;
-	}
-	ret = device_get_global_by_of_offset(node, &dev);
-	if (ret) {
-		debug("device at node %s/%d not found: %d\n", bootdev, node,
-		      ret);
-		goto fallback;
-	}
-	debug("Found device %s\n", dev->name);
-	switch (device_get_uclass_id(dev)) {
-	case UCLASS_SPI_FLASH:
-		return BOOT_DEVICE_SPI;
-	case UCLASS_MMC:
-		return BOOT_DEVICE_MMC1;
-	default:
-		debug("Booting from device uclass '%s' not supported\n",
-		      dev_get_uclass_name(dev));
-	}
-
-fallback:
-#elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
-		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
-		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
-	return BOOT_DEVICE_SPI;
-#endif
-	return BOOT_DEVICE_MMC1;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-static int configure_emmc(struct udevice *pinctrl)
-{
-#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
-
-	struct gpio_desc desc;
-	int ret;
-
-	pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
-
-	/*
-	 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
-	 * use the EMMC_PWREN setting.
-	 */
-	ret = dm_gpio_lookup_name("D9", &desc);
-	if (ret) {
-		debug("gpio ret=%d\n", ret);
-		return ret;
-	}
-	ret = dm_gpio_request(&desc, "emmc_pwren");
-	if (ret) {
-		debug("gpio_request ret=%d\n", ret);
-		return ret;
-	}
-	ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
-	if (ret) {
-		debug("gpio dir ret=%d\n", ret);
-		return ret;
-	}
-	ret = dm_gpio_set_value(&desc, 1);
-	if (ret) {
-		debug("gpio value ret=%d\n", ret);
-		return ret;
-	}
-#endif
-	return 0;
-}
-#endif
-
-#if !defined(CONFIG_SPL_OF_PLATDATA)
-static int phycore_init(void)
-{
-	struct udevice *pmic;
-	int ret;
-
-	ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
-	if (ret)
-		return ret;
-
-#if defined(CONFIG_SPL_POWER_SUPPORT)
-	/* Increase USB input current to 2A */
-	ret = rk818_spl_configure_usb_input_current(pmic, 2000);
-	if (ret)
-		return ret;
-
-	/* Close charger when USB lower then 3.26V */
-	ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
-	if (ret)
-		return ret;
-#endif
-
-	return 0;
-}
-#endif
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	int ret;
-
-	/* Example code showing how to enable the debug UART on RK3288 */
-#include <asm/arch/grf_rk3288.h>
-	/* Enable early UART on the RK3288 */
-#define GRF_BASE	0xff770000
-	struct rk3288_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
-		     GPIO7C6_MASK << GPIO7C6_SHIFT,
-		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	debug("\nspl:debug uart enabled in %s\n", __func__);
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	rockchip_timer_init();
-	configure_l2ctlr();
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-#if !defined(CONFIG_SPL_OF_PLATDATA)
-	if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
-		ret = phycore_init();
-		if (ret) {
-			debug("Failed to set up phycore power settings: %d\n",
-			      ret);
-			return;
-		}
-	}
-#endif
-
-#if !defined(CONFIG_SUPPORT_TPL)
-	debug("\nspl:init dram\n");
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-#endif
-
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-}
-
-static int setup_led(void)
-{
-#ifdef CONFIG_SPL_LED
-	struct udevice *dev;
-	char *led_name;
-	int ret;
-
-	led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
-	if (!led_name)
-		return 0;
-	ret = led_get_by_label(led_name, &dev);
-	if (ret) {
-		debug("%s: get=%d\n", __func__, ret);
-		return ret;
-	}
-	ret = led_set_on(dev, 1);
-	if (ret)
-		return ret;
-#endif
-
-	return 0;
-}
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = setup_led();
-
-	if (ret) {
-		debug("LED ret=%d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-	ret = configure_emmc(pinctrl);
-	if (ret) {
-		debug("%s: Failed to set up eMMC\n", __func__);
-		goto err;
-	}
-#endif
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-	return;
-err:
-	printf("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
-
-#ifdef CONFIG_SPL_OS_BOOT
-
-#define PMU_BASE		0xff730000
-int dram_init_banksize(void)
-{
-	struct rk3288_pmu *const pmu = (void *)PMU_BASE;
-	size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
-
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = size;
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c
deleted file mode 100644
index 150beea02e..0000000000
--- a/arch/arm/mach-rockchip/rk3288-board-tpl.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2017 Amarula Solutions
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <version.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3288.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define GRF_BASE		0xff770000
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-	/* Example code showing how to enable the debug UART on RK3288 */
-	/* Enable early UART on the RK3288 */
-	struct rk3288_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
-		     GPIO7C6_MASK << GPIO7C6_SHIFT,
-		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
-		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	rockchip_timer_init();
-	configure_l2ctlr();
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
-
-void spl_board_init(void)
-{
-	puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
-				U_BOOT_TIME ")\n");
-}
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
deleted file mode 100644
index 9e69ced931..0000000000
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ /dev/null
@@ -1,341 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/qos_rk3288.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/arch/timer.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-#include <dt-bindings/clock/rk3288-cru.h>
-#include <power/regulator.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int rk3288_qos_init(void)
-{
-	int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT;
-	/* set vop qos to higher priority */
-	writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS);
-	writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
-
-	if (!fdt_node_check_compatible(gd->fdt_blob, 0,
-				       "rockchip,rk3288-tinker"))
-	{
-		/* set isp qos to higher priority */
-		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
-		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS);
-		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS);
-	}
-	return 0;
-}
-
-static void rk3288_detect_reset_reason(void)
-{
-	struct rk3288_cru *cru = rockchip_get_cru();
-	const char *reason;
-
-	if (IS_ERR(cru))
-		return;
-
-	switch (cru->cru_glb_rst_st) {
-	case GLB_POR_RST:
-		reason = "POR";
-		break;
-	case FST_GLB_RST_ST:
-	case SND_GLB_RST_ST:
-		reason = "RST";
-		break;
-	case FST_GLB_TSADC_RST_ST:
-	case SND_GLB_TSADC_RST_ST:
-		reason = "THERMAL";
-		break;
-	case FST_GLB_WDT_RST_ST:
-	case SND_GLB_WDT_RST_ST:
-		reason = "WDOG";
-		break;
-	default:
-		reason = "unknown reset";
-	}
-
-	env_set("reset_reason", reason);
-
-	/*
-	 * Clear cru_glb_rst_st, so we can determine the last reset cause
-	 * for following resets.
-	 */
-	rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK);
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
-	rk3288_qos_init();
-	rk3288_detect_reset_reason();
-
-	return rk_board_late_init();
-}
-
-#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-static int veyron_init(void)
-{
-	struct udevice *dev;
-	struct clk clk;
-	int ret;
-
-	ret = regulator_get_by_platname("vdd_arm", &dev);
-	if (ret) {
-		debug("Cannot set regulator name\n");
-		return ret;
-	}
-
-	/* Slowly raise to max CPU voltage to prevent overshoot */
-	ret = regulator_set_value(dev, 1200000);
-	if (ret)
-		return ret;
-	udelay(175); /* Must wait for voltage to stabilize, 2mV/us */
-	ret = regulator_set_value(dev, 1400000);
-	if (ret)
-		return ret;
-	udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
-
-	ret = rockchip_get_clk(&clk.dev);
-	if (ret)
-		return ret;
-	clk.id = PLL_APLL;
-	ret = clk_set_rate(&clk, 1800000000);
-	if (IS_ERR_VALUE(ret))
-		return ret;
-
-	return 0;
-}
-#endif
-
-int board_init(void)
-{
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	struct udevice *pinctrl;
-	int ret;
-
-	rockchip_timer_init();
-
-	/*
-	 * We need to implement sdcard iomux here for the further
-	 * initlization, otherwise, it'll hit sdcard command sending
-	 * timeout exception.
-	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-
-	return 0;
-err:
-	printf("board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-
-	return -1;
-#else
-	int ret;
-
-	/* We do some SoC one time setting here */
-	if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) {
-		ret = veyron_init();
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-#endif
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3288_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node, phy_node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-	u32 grf_phy_offset;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	node = fdtdec_lookup_phandle(blob, node, "phys");
-	if (node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	phy_node = fdt_parent_offset(blob, node);
-	if (phy_node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	rk3288_otg_data.phy_of_node = phy_node;
-	grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
-
-	/* find the grf node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-grf");
-	if (node <= 0) {
-		debug("Not found grf device\n");
-		return -ENODEV;
-	}
-	rk3288_otg_data.regs_phy = grf_phy_offset +
-				fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3288_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
-
-static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
-{
-	static const struct {
-		char *name;
-		int id;
-	} clks[] = {
-		{ "osc", CLK_OSC },
-		{ "apll", CLK_ARM },
-		{ "dpll", CLK_DDR },
-		{ "cpll", CLK_CODEC },
-		{ "gpll", CLK_GENERAL },
-#ifdef CONFIG_ROCKCHIP_RK3036
-		{ "mpll", CLK_NEW },
-#else
-		{ "npll", CLK_NEW },
-#endif
-	};
-	int ret, i;
-	struct udevice *dev;
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		printf("clk-uclass not found\n");
-		return 0;
-	}
-
-	for (i = 0; i < ARRAY_SIZE(clks); i++) {
-		struct clk clk;
-		ulong rate;
-
-		clk.id = clks[i].id;
-		ret = clk_request(dev, &clk);
-		if (ret < 0)
-			continue;
-
-		rate = clk_get_rate(&clk);
-		printf("%s: %lu\n", clks[i].name, rate);
-
-		clk_free(&clk);
-	}
-
-	return 0;
-}
-
-U_BOOT_CMD(
-	clock, 2, 1, do_clock,
-	"display information about clocks",
-	""
-);
-
-#define GRF_SOC_CON2 0xff77024c
-
-int board_early_init_f(void)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	int ret;
-
-	/*
-	 * This init is done in SPL, but when chain-loading U-Boot SPL will
-	 * have been skipped. Allow the clock driver to check if it needs
-	 * setting up.
-	 */
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return ret;
-	}
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		return ret;
-	}
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		return ret;
-	}
-	rk_setreg(GRF_SOC_CON2, 1 << 0);
-
-	return 0;
-}
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index bf4b799eba..2a8bb49d83 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -3,12 +3,26 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
 #include <asm/armv7.h>
 #include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/cru_rk3288.h>
+#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/pmu_rk3288.h>
+#include <asm/arch/qos_rk3288.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <dm/pinctrl.h>
+#include <dt-bindings/clock/rk3288-cru.h>
+#include <power/regulator.h>
 
-#define GRF_SOC_CON2 0xff77024c
-#define GRF_SOC_CON7 0xff770260
+#define GRF_BASE	0xff770000
 
 #define VIO0_VOP_QOS_BASE	0xffad0408
 #define VIO1_VOP_QOS_BASE	0xffad0008
@@ -21,6 +35,11 @@
 #define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
 	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/dwmmc@ff0f0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@ff0c0000",
+};
+
 #ifdef CONFIG_SPL_BUILD
 static void configure_l2ctlr(void)
 {
@@ -48,11 +67,13 @@ int arch_cpu_init(void)
 #ifdef CONFIG_SPL_BUILD
 	configure_l2ctlr();
 #else
+	struct rk3288_grf * const grf = (void *)GRF_BASE;
+
 	/* Use rkpwm by default */
-	rk_setreg(GRF_SOC_CON2, 1 << 0);
+	rk_setreg(&grf->soc_con2, 1 << 0);
 
 	/* Disable LVDS phy */
-	rk_setreg(GRF_SOC_CON7, 1 << 15);
+	rk_setreg(&grf->soc_con7, 1 << 15);
 
 	/* Select EDP clock source 24M */
 	rk_setreg(CRU_CLKSEL_CON28, 1 << 15);
@@ -68,3 +89,286 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+void board_debug_uart_init(void)
+{
+	struct rk3288_grf * const grf = (void *)GRF_BASE;
+
+	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
+		     GPIO7C6_MASK << GPIO7C6_SHIFT,
+		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+}
+
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+#ifdef CONFIG_SPL_MMC_SUPPORT
+static int configure_emmc(void)
+{
+#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
+
+	struct gpio_desc desc;
+	int ret;
+	struct udevice *pinctrl;
+
+	pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
+
+	/*
+	 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
+	 * use the EMMC_PWREN setting.
+	 */
+	ret = dm_gpio_lookup_name("D9", &desc);
+	if (ret) {
+		debug("gpio ret=%d\n", ret);
+		return ret;
+	}
+	ret = dm_gpio_request(&desc, "emmc_pwren");
+	if (ret) {
+		debug("gpio_request ret=%d\n", ret);
+		return ret;
+	}
+	ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
+	if (ret) {
+		debug("gpio dir ret=%d\n", ret);
+		return ret;
+	}
+	ret = dm_gpio_set_value(&desc, 1);
+	if (ret) {
+		debug("gpio value ret=%d\n", ret);
+		return ret;
+	}
+#endif
+	return 0;
+}
+
+int rk_spl_board_init(void)
+{
+	struct udevice *pinctrl;
+	int ret = 0;
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+	/* TODO: we may need to check boot device first */
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
+	if (ret) {
+		debug("%s: Failed to set up SD card\n", __func__);
+		goto err;
+	}
+#endif
+
+	ret = configure_emmc();
+	if (ret) {
+		debug("%s: Failed to set up eMMC\n", __func__);
+	}
+
+err:
+	return ret;
+}
+#endif
+#endif
+
+int rk3288_qos_init(void)
+{
+	int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT;
+	/* set vop qos to higher priority */
+	writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS);
+	writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
+
+	if (!fdt_node_check_compatible(gd->fdt_blob, 0,
+				       "rockchip,rk3288-tinker"))
+	{
+		/* set isp qos to higher priority */
+		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
+		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS);
+		writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS);
+	}
+	return 0;
+}
+
+static void rk3288_detect_reset_reason(void)
+{
+	struct rk3288_cru *cru = rockchip_get_cru();
+	const char *reason;
+
+	if (IS_ERR(cru))
+		return;
+
+	switch (cru->cru_glb_rst_st) {
+	case GLB_POR_RST:
+		reason = "POR";
+		break;
+	case FST_GLB_RST_ST:
+	case SND_GLB_RST_ST:
+		reason = "RST";
+		break;
+	case FST_GLB_TSADC_RST_ST:
+	case SND_GLB_TSADC_RST_ST:
+		reason = "THERMAL";
+		break;
+	case FST_GLB_WDT_RST_ST:
+	case SND_GLB_WDT_RST_ST:
+		reason = "WDOG";
+		break;
+	default:
+		reason = "unknown reset";
+	}
+
+	env_set("reset_reason", reason);
+
+	/*
+	 * Clear cru_glb_rst_st, so we can determine the last reset cause
+	 * for following resets.
+	 */
+	rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK);
+}
+
+__weak int rk3288_board_late_init(void)
+{
+	return 0;
+}
+
+int rk_board_late_init(void)
+{
+	rk3288_qos_init();
+	rk3288_detect_reset_reason();
+
+	return rk3288_board_late_init();
+}
+
+#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
+static int veyron_init(void)
+{
+	struct udevice *dev;
+	struct clk clk;
+	int ret;
+
+	ret = regulator_get_by_platname("vdd_arm", &dev);
+	if (ret) {
+		debug("Cannot set regulator name\n");
+		return ret;
+	}
+
+	/* Slowly raise to max CPU voltage to prevent overshoot */
+	ret = regulator_set_value(dev, 1200000);
+	if (ret)
+		return ret;
+	udelay(175); /* Must wait for voltage to stabilize, 2mV/us */
+	ret = regulator_set_value(dev, 1400000);
+	if (ret)
+		return ret;
+	udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
+
+	ret = rockchip_get_clk(&clk.dev);
+	if (ret)
+		return ret;
+	clk.id = PLL_APLL;
+	ret = clk_set_rate(&clk, 1800000000);
+	if (IS_ERR_VALUE(ret))
+		return ret;
+
+	return 0;
+}
+
+int rk_board_init(void)
+{
+	int ret;
+
+	/* We do some SoC one time setting here */
+	if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) {
+		ret = veyron_init();
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+#endif
+
+static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
+		       char * const argv[])
+{
+	static const struct {
+		char *name;
+		int id;
+	} clks[] = {
+		{ "osc", CLK_OSC },
+		{ "apll", CLK_ARM },
+		{ "dpll", CLK_DDR },
+		{ "cpll", CLK_CODEC },
+		{ "gpll", CLK_GENERAL },
+#ifdef CONFIG_ROCKCHIP_RK3036
+		{ "mpll", CLK_NEW },
+#else
+		{ "npll", CLK_NEW },
+#endif
+	};
+	int ret, i;
+	struct udevice *dev;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		printf("clk-uclass not found\n");
+		return 0;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(clks); i++) {
+		struct clk clk;
+		ulong rate;
+
+		clk.id = clks[i].id;
+		ret = clk_request(dev, &clk);
+		if (ret < 0)
+			continue;
+
+		rate = clk_get_rate(&clk);
+		printf("%s: %lu\n", clks[i].name, rate);
+
+		clk_free(&clk);
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	clock, 2, 1, do_clock,
+	"display information about clocks",
+	""
+);
+
+#define GRF_SOC_CON2 0xff77024c
+
+int board_early_init_f(void)
+{
+	struct udevice *pinctrl;
+	struct udevice *dev;
+	int ret;
+
+	/*
+	 * This init is done in SPL, but when chain-loading U-Boot SPL will
+	 * have been skipped. Allow the clock driver to check if it needs
+	 * setting up.
+	 */
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		debug("CLK init failed: %d\n", ret);
+		return ret;
+	}
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		return ret;
+	}
+
+	/* Enable debug UART */
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+	if (ret) {
+		debug("%s: Failed to set up console UART\n", __func__);
+		return ret;
+	}
+	rk_setreg(GRF_SOC_CON2, 1 << 0);
+
+	return 0;
+}
diff --git a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
index ed82b2bd78..9945f97a08 100644
--- a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
+++ b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
@@ -8,16 +8,9 @@
 #include <spl.h>
 #include <asm/gpio.h>
 
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
-
 #define GPIO7A3_HUB_RST	227
 
-int rk_board_late_init(void)
+int rk3288_board_late_init(void)
 {
 	int ret;
 
diff --git a/board/mqmaker/miqi_rk3288/miqi-rk3288.c b/board/mqmaker/miqi_rk3288/miqi-rk3288.c
index a82f0ae283..846deddb80 100644
--- a/board/mqmaker/miqi_rk3288/miqi-rk3288.c
+++ b/board/mqmaker/miqi_rk3288/miqi-rk3288.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard. */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index 47b069e2ad..a81954e780 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -27,7 +27,49 @@ static int valid_rk3288_som(struct rk3288_som *som)
 	return hw == som->bs;
 }
 
-int rk_board_late_init(void)
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_PLATDATA)
+static int phycore_init(void)
+{
+	struct udevice *pmic;
+	int ret;
+
+	ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
+	if (ret)
+		return ret;
+
+#if defined(CONFIG_SPL_POWER_SUPPORT)
+	/* Increase USB input current to 2A */
+	ret = rk818_spl_configure_usb_input_current(pmic, 2000);
+	if (ret)
+		return ret;
+
+	/* Close charger when USB lower then 3.26V */
+	ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+
+int rk_board_init_f(void)
+{
+	int ret = 0;
+
+	if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
+		ret = phycore_init();
+		if (ret) {
+			debug("Failed to set up phycore power settings: %d\n",
+			      ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+#endif
+
+int rk3288_board_late_init(void)
 {
 	int ret;
 	struct udevice *dev;
diff --git a/board/rockchip/evb_rk3288/evb-rk3288.c b/board/rockchip/evb_rk3288/evb-rk3288.c
index a82f0ae283..846deddb80 100644
--- a/board/rockchip/evb_rk3288/evb-rk3288.c
+++ b/board/rockchip/evb_rk3288/evb-rk3288.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard. */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
index db332b4872..88b63276fb 100644
--- a/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
+++ b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard. */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/rockchip/fennec_rk3288/fennec-rk3288.c b/board/rockchip/fennec_rk3288/fennec-rk3288.c
index aad74ef109..846deddb80 100644
--- a/board/rockchip/fennec_rk3288/fennec-rk3288.c
+++ b/board/rockchip/fennec_rk3288/fennec-rk3288.c
@@ -6,10 +6,3 @@
 
 #include <common.h>
 #include <spl.h>
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* eMMC prior to sdcard */
-	spl_boot_list[0] = BOOT_DEVICE_MMC2;
-	spl_boot_list[1] = BOOT_DEVICE_MMC1;
-}
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index 790a921515..5681ef1cbb 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -21,7 +21,7 @@ static int get_ethaddr_from_eeprom(u8 *addr)
 	return i2c_eeprom_read(dev, 0, addr, 6);
 }
 
-int rk_board_late_init(void)
+int rk3288_board_late_init(void)
 {
 	u8 ethaddr[6];
 

commit bf9b2c649ae55cac118abe69302b4aad80e1a53c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 14:25:11 2018 +0800

    rockchip: rk3288: remove rockchip timer for sys timer
    
    Use ARM arch timer instead
    
    Change-Id: Id14b484aa49ee98f741463adc510403f244fd187
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 4b90a56e28..5e9b314f16 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -15,10 +15,6 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define	CONFIG_SYS_TIMER_BASE		0xff810020 /* TIMER7 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SPL_FRAMEWORK
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */

commit 17ee18bfa33b124778a3177a0b55069ebb80c1c7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:21:24 2018 +0800

    rockchip: rk3128: use common board file
    
    move SoC spec setting into rk3128.c
    
    Change-Id: Id3bb2680d7087140510a4b1a8d87e4322e109ca5

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
deleted file mode 100644
index 8217fd52c8..0000000000
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/grf_rk3128.h>
-#include <asm/arch/boot_mode.h>
-#include <power/charge_display.h>
-#include <power/regulator.h>
-#include <video_rockchip.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-static int charge_display(void)
-{
-	int ret;
-	struct udevice *dev;
-
-	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
-	if (ret) {
-		if (ret != -ENODEV) {
-			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
-			return ret;
-		}
-		return 0;
-	}
-
-	return charge_display_show(dev);
-}
-#endif
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
-
-#ifdef CONFIG_DM_CHARGE_DISPLAY
-	charge_display();
-#endif
-
-#ifdef CONFIG_DRM_ROCKCHIP
-	rockchip_show_logo();
-#endif
-
-	return rk_board_late_init();
-}
-
-int board_init(void)
-{
-	int ret = 0;
-
-	ret = regulators_enable_boot_on(false);
-	if (ret) {
-		debug("%s: Cannot enable boot on regulator\n", __func__);
-		return ret;
-	}
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 0xe00000(14MB) for OPTEE with TA enabled, otherwise 2MB */
-	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0xe00000;
-	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-				+ gd->ram_size - gd->bd->bi_dram[1].start;
-
-	return 0;
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3128_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3128-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3128_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3128_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
-
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
-{
-	struct rk3128_grf *grf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	/* Set boot mode to fastboot */
-	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 24c1ee8bf9..ef0ed3bcd4 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -5,7 +5,6 @@
  */
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
 
 #define GRF_GPIO1C_IOMUX		0x200080c0
 #define SDMMC_INTMASK			0x10214024
@@ -35,7 +34,6 @@ int arch_cpu_init(void)
 	 */
 	writel(0, SDMMC_INTMASK);
 #endif
-	rockchip_timer_init();
 
 	return 0;
 }

commit 0f04a90396384b3a90fdd97651a8c76601fe4418
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:20:22 2018 +0800

    rockchip: rk3128: remove rockchip timer as systimer
    
    We use ARM arch timer instead.
    
    Change-Id: I4368b30eab5ae61c9dd7a9165859504607fbbfe3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index f4798859c4..0358d95eba 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -15,10 +15,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800

commit 085507de5a04b1795b21e9363757d00bc5f2c881
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:19:30 2018 +0800

    rockchip: rk3188: use common board file
    
    Move SoC spec setting into rk3188.c
    
    Change-Id: I689126cbf6fe2e5699c8776ea42a7acc6ac0f3fc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
deleted file mode 100644
index 8e3b8ae3ba..0000000000
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <clk.h>
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-#include <syscon.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-#if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	const void *blob = gd->fdt_blob;
-	struct udevice *dev;
-	const char *bootdev;
-	int node;
-	int ret;
-
-	bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
-	debug("Boot device %s\n", bootdev);
-	if (!bootdev)
-		goto fallback;
-
-	node = fdt_path_offset(blob, bootdev);
-	if (node < 0) {
-		debug("node=%d\n", node);
-		goto fallback;
-	}
-	ret = device_get_global_by_of_offset(node, &dev);
-	if (ret) {
-		debug("device at node %s/%d not found: %d\n", bootdev, node,
-		      ret);
-		goto fallback;
-	}
-	debug("Found device %s\n", dev->name);
-	switch (device_get_uclass_id(dev)) {
-	case UCLASS_SPI_FLASH:
-		return BOOT_DEVICE_SPI;
-	case UCLASS_MMC:
-		return BOOT_DEVICE_MMC1;
-	default:
-		debug("Booting from device uclass '%s' not supported\n",
-		      dev_get_uclass_name(dev));
-	}
-
-fallback:
-#endif
-	return BOOT_DEVICE_MMC1;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-static int setup_arm_clock(void)
-{
-	struct udevice *dev;
-	struct clk clk;
-	int ret;
-
-	ret = rockchip_get_clk(&dev);
-	if (ret)
-		return ret;
-
-	clk.id = CLK_ARM;
-	ret = clk_request(dev, &clk);
-	if (ret < 0)
-		return ret;
-
-	ret = clk_set_rate(&clk, 600000000);
-
-	clk_free(&clk);
-	return ret;
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl, *dev;
-	int ret;
-
-	/* Example code showing how to enable the debug UART on RK3188 */
-#ifdef EARLY_UART
-#include <asm/arch/grf_rk3188.h>
-	/* Enable early UART on the RK3188 */
-#define GRF_BASE	0x20008000
-	struct rk3188_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK << GPIO1B1_SHIFT |
-		     GPIO1B0_MASK << GPIO1B0_SHIFT,
-		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printch('s');
-	printch('p');
-	printch('l');
-	printch('\n');
-#endif
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	rockchip_timer_init();
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-
-	setup_arm_clock();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-}
-
-static int setup_led(void)
-{
-#ifdef CONFIG_SPL_LED
-	struct udevice *dev;
-	char *led_name;
-	int ret;
-
-	led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
-	if (!led_name)
-		return 0;
-	ret = led_get_by_label(led_name, &dev);
-	if (ret) {
-		debug("%s: get=%d\n", __func__, ret);
-		return ret;
-	}
-	ret = led_set_on(dev, 1);
-	if (ret)
-		return ret;
-#endif
-
-	return 0;
-}
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = setup_led();
-	if (ret) {
-		debug("LED ret=%d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-#endif
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-	return;
-
-err:
-	printf("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
deleted file mode 100644
index 88c03e85d2..0000000000
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3188.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3288.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_late_init(void)
-{
-	struct rk3188_grf *grf;
-
-	setup_boot_mode();
-
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(grf)) {
-		pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
-	} else {
-		/* enable noc remap to mimic legacy loaders */
-		rk_clrsetreg(&grf->soc_con0,
-			NOC_REMAP_MASK << NOC_REMAP_SHIFT,
-			NOC_REMAP_MASK << NOC_REMAP_SHIFT);
-	}
-
-	return 0;
-}
-
-int board_init(void)
-{
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	struct udevice *pinctrl;
-	int ret;
-
-	/*
-	 * We need to implement sdcard iomux here for the further
-	 * initialization, otherwise, it'll hit sdcard command sending
-	 * timeout exception.
-	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-
-	return 0;
-err:
-	printf("board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-
-	return -1;
-#else
-	return 0;
-#endif
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile
index 7fa010405b..b3b23155fc 100644
--- a/arch/arm/mach-rockchip/rk3188/Makefile
+++ b/arch/arm/mach-rockchip/rk3188/Makefile
@@ -5,6 +5,7 @@
 #
 
 ifndef CONFIG_TPL_BUILD
+obj-y += rk3188.o
 obj-y += clk_rk3188.o
 obj-y += syscon_rk3188.o
 endif
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
new file mode 100644
index 0000000000..00ba7dea4f
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/grf_rk3188.h>
+
+#define GRF_BASE	0x20008000
+void board_debug_uart_init(void)
+{
+	struct rk3188_grf * const grf = (void *)GRF_BASE;
+
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK << GPIO1B1_SHIFT |
+		     GPIO1B0_MASK << GPIO1B0_SHIFT,
+		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+
+}
+

commit 6c150631d0b717079a3c55e91a68b52fcd93a9d6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:18:21 2018 +0800

    rockchip: rk3188: remove rockchip timer as sys timer
    
    We use ARM arch timer instead.
    
    Change-Id: I22267fa4de69d3d9aab01c75d5b60355a79ce49b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 91e8e5c259..9c69a893d5 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -17,9 +17,6 @@
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x2000e000 /* TIMER3 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM

commit 8c07fb99d91f6dffe78c6b1c2d00e0cf132b3468
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:16:31 2018 +0800

    rockchip: rk3066: use common board file
    
    Move some SoC spec setting into rk3066.c
    
    Change-Id: Iab2bfa8b35ad4253572c326c6c4a06d768760a9d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3066-board-spl.c b/arch/arm/mach-rockchip/rk3066-board-spl.c
deleted file mode 100644
index 9acdd83dae..0000000000
--- a/arch/arm/mach-rockchip/rk3066-board-spl.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <clk.h>
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <fdtdec.h>
-#include <led.h>
-#include <malloc.h>
-#include <ram.h>
-#include <spl.h>
-#include <syscon.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
-#include <dm/pinctrl.h>
-#include <dm/root.h>
-#include <dm/test.h>
-#include <dm/util.h>
-#include <power/regulator.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_NAND;
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl, *dev;
-	int ret;
-
-	debug_uart_init();
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("Pinctrl init failed: %d\n", ret);
-		return;
-	}
-
-	ret = rockchip_get_clk(&dev);
-	if (ret) {
-		debug("CLK init failed: %d\n", ret);
-		return;
-	}
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-#endif
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-
-	return;
-
-err:
-	debug("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3066_otg_data = {
-	.rx_fifo_sz	= 275,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 256,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	ofnode otg_node;
-	u32 reg;
-
-	otg_node = ofnode_path("/usb@10180000");
-	if (!ofnode_valid(otg_node)) {
-		debug("Not found usb otg device\n");
-		return -ENODEV;
-	}
-
-	ofnode_read_u32(otg_node, "reg", &reg);
-	rk3066_otg_data.regs_otg = reg;
-
-	return dwc2_udc_probe(&rk3066_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
deleted file mode 100644
index 2b96eb2d41..0000000000
--- a/arch/arm/mach-rockchip/rk3066-board.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3066.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/pmu_rk3188.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_late_init(void)
-{
-	struct rk3066_grf *grf;
-
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (IS_ERR(grf)) {
-		debug("grf syscon returned %ld\n", PTR_ERR(grf));
-		return PTR_ERR(grf);
-	}
-	/* enable noc remap to mimic legacy loaders */
-	rk_clrsetreg(&grf->soc_con0, NOC_REMAP_MASK, NOC_REMAP_MASK);
-
-	return 0;
-}
-
-int board_init(void)
-{
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
-	struct udevice *pinctrl;
-	int ret;
-
-	/*
-	 * We need to implement sdcard iomux here for the further
-	 * initialization, otherwise, it'll hit sdcard command sending
-	 * timeout exception.
-	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
-	if (ret) {
-		debug("%s: Failed to set up SD card\n", __func__);
-		goto err;
-	}
-
-	return 0;
-err:
-	debug("board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-
-	return -1;
-#else
-	return 0;
-#endif
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3066_otg_data = {
-	.rx_fifo_sz	= 275,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 256,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	ofnode otg_node;
-	u32 reg;
-
-	otg_node = ofnode_path("/usb@10180000");
-	if (!ofnode_valid(otg_node)) {
-		debug("Not found usb otg device\n");
-		return -ENODEV;
-	}
-
-	ofnode_read_u32(otg_node, "reg", &reg);
-	rk3066_otg_data.regs_otg = reg;
-
-	return dwc2_udc_probe(&rk3066_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
index 7663b6a2f9..bff2fed236 100644
--- a/arch/arm/mach-rockchip/rk3066/Makefile
+++ b/arch/arm/mach-rockchip/rk3066/Makefile
@@ -4,6 +4,7 @@
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
+obj-y += rk3066.o
 obj-y += clk_rk3066.o
 obj-y += sdram_rk3066.o
 obj-y += syscon_rk3066.o
diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c
new file mode 100644
index 0000000000..c5e87f9e37
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/rk3066.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/grf_rk3066.h>
+
+#define GRF_BASE	0x20008000
+
+void board_debug_uart_init(void)
+{
+	struct rk3066_grf * const grf = (void *)GRF_BASE;
+
+	/* Enable early UART on the RK3066 */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B0_MASK,
+		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+}
+

commit 60c204703f3bf16efcc9d4479ca186984ed508bd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:15:07 2018 +0800

    rockchip: rk3066: remove rockchip timer as systimer
    
    We are going to use ARM arch timer.
    
    Change-Id: If2fde02a06f59fe9e0102f5b141858f02b9c3b9e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 8d5f13b35f..aacd0facad 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -21,9 +21,6 @@
 #define SDRAM_BANK_SIZE			(1024UL << 20UL)
 #define SDRAM_MAX_SIZE			CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
 
-#define CONFIG_SYS_TIMER_RATE		24000000
-#define CONFIG_SYS_TIMER_BASE		0x20038000
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 4)
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
 #define CONFIG_SYS_TEXT_BASE		0x60408000

commit 537cfed2867ec7ce6ebdeb00bdb6da93ca294350
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:11:55 2018 +0800

    rockchip: sdram_common: add common dram_init_banksize
    
    dram_init_banksize() can be common used by all SoCs, move it into
    sdram_common.c
    
    Change-Id: Ie8caa63b898202ae588d5a71f130d14c741943a2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index d6c815cf72..e9d2404d98 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -20,6 +20,66 @@ struct ddr_param{
 };
 #define PARAM_DRAM_INFO_OFFSET 0x2000000
 
+#define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
+
+struct tos_parameter_t {
+	u32 version;
+	u32 checksum;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}tee_mem;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}drm_mem;
+	s64 reserve[8];
+};
+
+int dram_init_banksize(void)
+{
+	size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
+			 gd->ram_top);
+
+#ifdef CONFIG_ARM64
+	/* Reserve 0x200000 for ATF bl31 */
+	gd->bd->bi_dram[0].start = 0x200000;
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+#else
+#ifdef CONFIG_SPL_OPTEE
+	struct tos_parameter_t *tos_parameter;
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+	if (tos_parameter->tee_mem.flags == 1) {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
+					- CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
+					tos_parameter->tee_mem.size;
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+					+ top - gd->bd->bi_dram[1].start;
+	} else {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = 0x8400000;
+		/* Reserve 32M for OPTEE with TA */
+		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+					+ gd->bd->bi_dram[0].size + 0x2000000;
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+					+ top - gd->bd->bi_dram[1].start;
+	}
+#else
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
+#endif
+#endif
+
+	return 0;
+}
+
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
 	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
@@ -92,7 +152,8 @@ ulong board_get_usable_ram_top(ulong total_size)
 
 int rockchip_setup_ddr_param(struct ram_info *info)
 {
-	struct ddr_param *dinfo = (struct ddr_param *)PARAM_DRAM_INFO_OFFSET;
+	struct ddr_param *dinfo = (struct ddr_param *)CONFIG_SYS_SDRAM_BASE +
+					PARAM_DRAM_INFO_OFFSET;
 
 	dinfo->count = 1;
 	dinfo->bank_addr = info->base;

commit ba59d97fad524e4ea394dd3a128ea561bea79bac
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:09:23 2018 +0800

    rockchip: rk3036: use commong board file
    
    Move some soc spec setting into rk3036.c
    
    Change-Id: Ib0c1d222e273e8a8bfc8c58d2e060b696f2a7500
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
deleted file mode 100644
index a5d257168f..0000000000
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/grf_rk3036.h>
-#include <asm/arch/boot_mode.h>
-#include <asm/arch/sdram_rk3036.h>
-#include <asm/gpio.h>
-#include <dm/pinctrl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int board_late_init(void)
-{
-	setup_boot_mode();
-
-	return rk_board_late_init();
-}
-
-int board_init(void)
-{
-	return 0;
-}
-
-#if !CONFIG_IS_ENABLED(RAM)
-/*
- * When CONFIG_RAM is enabled, the dram_init() function is implemented
- * in sdram_common.c.
- */
-int dram_init(void)
-{
-	gd->ram_size = sdram_size();
-
-	return 0;
-}
-#endif
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk3036_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk3036_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile
index 20d28f7c21..8a144d1f9e 100644
--- a/arch/arm/mach-rockchip/rk3036/Makefile
+++ b/arch/arm/mach-rockchip/rk3036/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y += clk_rk3036.o
+obj-y += rk3036.o clk_rk3036.o
 
 ifndef CONFIG_SPL_BUILD
 obj-y += syscon_rk3036.o
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036/rk3036.c
similarity index 50%
rename from arch/arm/mach-rockchip/rk3036-board-spl.c
rename to arch/arm/mach-rockchip/rk3036/rk3036.c
index 550e3a1521..39cc43b1c9 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036/rk3036.c
@@ -1,28 +1,22 @@
 /*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
-
-#include <common.h>
-#include <debug_uart.h>
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
-#include <asm/arch/grf_rk3036.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/sdram_rk3036.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/uart.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
+#include <asm/arch/grf_rk3036.h>
 #define GRF_BASE	0x20008000
 
-#define DEBUG_UART_BASE	0x20068000
-
-void board_init_f(ulong dummy)
+#ifdef CONFIG_SPL_BUILD
+int arch_cpu_init(void)
+{
+	return 0;
+}
+#endif
+void board_debug_uart_init(void)
 {
-#ifdef EARLY_DEBUG
 	struct rk3036_grf * const grf = (void *)GRF_BASE;
 	/*
 	 * NOTE: sd card and debug uart use same iomux in rk3036,
@@ -34,22 +28,5 @@ void board_init_f(ulong dummy)
 		     GPIO1C2_MASK << GPIO1C2_SHIFT,
 		     GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
 		     GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
-	debug_uart_init();
-#endif
-	rockchip_timer_init();
-	sdram_init();
-
-	/* return to maskrom */
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
 
-/* Place Holders */
-void board_init_r(gd_t *id, ulong dest_addr)
-{
-	/*
-	 * Function attribute is no-return
-	 * This Function never executes
-	 */
-	while (1)
-		;
 }
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 434a481fb1..ea4e1d9ec5 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -11,6 +11,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk3036.h>
 #include <asm/arch/uart.h>
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * we can not fit the code to access the device tree in SPL
@@ -763,3 +764,16 @@ void sdram_init(void)
 	move_to_access_state(&sdram_priv);
 	dram_cfg_rbc(&sdram_priv);
 }
+
+#if !CONFIG_IS_ENABLED(RAM)
+/*
+ * When CONFIG_RAM is enabled, the dram_init() function is implemented
+ * in sdram_common.c.
+ */
+int dram_init(void)
+{
+	gd->ram_size = sdram_size();
+
+	return 0;
+}
+#endif

commit afb735a686e978f7027c4b7e23f48d090c3e9c30
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:05:30 2018 +0800

    rockchip: rk3036: sdram: use udelay instead of rockchip_udelay
    
    We are going to remove rockchip_udelay after enable arch timer.
    
    Change-Id: I8c7eea8315a42401d0fd7dbf1e4c812b5605bc73
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index ffcf4de65f..434a481fb1 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -10,7 +10,6 @@
 #include <asm/arch/grf_rk3036.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk3036.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 
 /*
@@ -345,7 +344,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 
 	/* waiting for pll lock */
 	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		rockchip_udelay(1);
+		udelay(1);
 
 	/* PLL enter normal-mode */
 	rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK,
@@ -373,25 +372,25 @@ void phy_pctrl_reset(struct rk3036_sdram_priv *priv)
 			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
 			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
 
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&priv->cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
 						  1 << DDRPHY_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&priv->cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
 						  1 << DDRCTRL_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	clrsetbits_le32(&ddr_phy->ddrphy_reg1,
 			SOFT_RESET_MASK << SOFT_RESET_SHIFT,
 			0 << SOFT_RESET_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 	clrsetbits_le32(&ddr_phy->ddrphy_reg1,
 			SOFT_RESET_MASK << SOFT_RESET_SHIFT,
 			3 << SOFT_RESET_SHIFT);
 
-	rockchip_udelay(1);
+	udelay(1);
 }
 
 void phy_dll_bypass_set(struct rk3036_sdram_priv *priv, unsigned int freq)
@@ -444,7 +443,7 @@ static void send_command(struct rk3036_ddr_pctl *pctl,
 			 u32 rank, u32 cmd, u32 arg)
 {
 	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
-	rockchip_udelay(1);
+	udelay(1);
 	while (readl(&pctl->mcmd) & START_CMD)
 		;
 }
@@ -454,7 +453,7 @@ static void memory_init(struct rk3036_sdram_priv *priv)
 	struct rk3036_ddr_pctl *pctl = priv->pctl;
 
 	send_command(pctl, 3, DESELECT_CMD, 0);
-	rockchip_udelay(1);
+	udelay(1);
 	send_command(pctl, 3, PREA_CMD, 0);
 	send_command(pctl, 3, MRS_CMD,
 		     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
@@ -492,7 +491,7 @@ static void data_training(struct rk3036_sdram_priv *priv)
 	clrsetbits_le32(&ddr_phy->ddrphy_reg2, 0x03,
 			DQS_SQU_CAL_NORMAL_MODE | DQS_SQU_CAL_START);
 
-	rockchip_udelay(1);
+	udelay(1);
 	while ((readl(&ddr_phy->ddrphy_reg62) & CAL_DONE_MASK) !=
 		(HIGH_8BIT_CAL_DONE | LOW_8BIT_CAL_DONE)) {
 		;

commit f484cfe28756903af0457a94a71979a3301a2211
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:03:11 2018 +0800

    rockchip: rk3036: remove sys timer
    
    Use ARM arch timer instead.
    
    Change-Id: Idb8dd83d8ee54d8e2a5d7c072f79c17177d89f70
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 85e2ceee7c..b655a42c57 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -14,10 +14,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800

commit c11c067d9619ad1160428bab35e35965c5155021
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:59:52 2018 +0800

    rockchip: rk322x: use common board file
    
    Change-Id: If3ac0d99a96a784443e16112362fd54576a70c00
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
deleted file mode 100644
index 71e641ef33..0000000000
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <spl.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-
-u32 spl_boot_mode(const u32 boot_device)
-{
-	return MMCSD_MODE_RAW;
-}
-
-void board_debug_uart_init(void)
-{
-}
-
-void board_init_f(ulong dummy)
-{
-	int ret;
-
-	ret = spl_early_init();
-	if (ret) {
-		printf("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-	preloader_console_init();
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
deleted file mode 100644
index a10a7a170a..0000000000
--- a/arch/arm/mach-rockchip/rk322x-board-tpl.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/cru_rk322x.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/uart.h>
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-DECLARE_GLOBAL_DATA_PTR;
-
-#define GRF_BASE	0x11000000
-#define SECURE_TIMER_BASE	0x110d0020
-#define SGRF_DDR_CON0 0x10150000
-
-void board_debug_uart_init(void)
-{
-	static struct rk322x_grf * const grf = (void *)GRF_BASE;
-	/* Enable early UART2 channel 1 on the RK322x */
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B2_MASK,
-		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->con_iomux,
-		     CON_IOMUX_UART2SEL_MASK,
-		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
-}
-
-void secure_timer_init(void)
-{
-	writel(0, SECURE_TIMER_BASE + 0x10);
-	writel(0xffffffff, SECURE_TIMER_BASE);
-	writel(0xffffffff, SECURE_TIMER_BASE + 4);
-	writel(1, SECURE_TIMER_BASE + 0x10);
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("TPL Init");
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	secure_timer_init();
-	/* TODO: use arm generic timer instead for armv7 */
-	rockchip_timer_init();
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		printf("DRAM init failed: %d\n", ret);
-		return;
-	}
-
-	/* Disable the ddr secure region setting to make it non-secure */
-	rk_clrreg(SGRF_DDR_CON0, 0x4000);
-#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
-}
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
deleted file mode 100644
index fdfdb5bc4c..0000000000
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ /dev/null
@@ -1,190 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/boot_mode.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
-
-struct tos_parameter_t {
-	u32 version;
-	u32 checksum;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}tee_mem;
-	struct {
-		char name[8];
-		s64 phy_addr;
-		u32 size;
-		u32 flags;
-	}drm_mem;
-	s64 reserve[8];
-};
-
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
-{
-	struct rk322x_grf *grf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	/* Set boot mode to fastboot */
-	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
-
-	return 0;
-}
-
-#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
-static int fastboot_key_pressed(void)
-{
-	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
-	gpio_direction_input(FASTBOOT_KEY_GPIO);
-	return !gpio_get_value(FASTBOOT_KEY_GPIO);
-}
-#endif
-
-__weak int rk_board_late_init(void)
-{
-	return 0;
-}
-
-int board_late_init(void)
-{
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-	if (fastboot_key_pressed()) {
-		printf("fastboot key pressed!\n");
-		fb_set_reboot_flag();
-	}
-#endif
-
-	setup_boot_mode();
-
-	return rk_board_late_init();
-}
-
-int board_init(void)
-{
-#include <asm/arch/grf_rk322x.h>
-	/* Enable early UART2 channel 1 on the RK322x */
-#define GRF_BASE	0x11000000
-	struct rk322x_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B2_MASK,
-		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->con_iomux,
-		     CON_IOMUX_UART2SEL_MASK,
-		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
-
-	/*
-	* The integrated macphy is enabled by default, disable it
-	* for saving power consuming.
-	*/
-	rk_clrsetreg(&grf->macphy_con[0],
-		     MACPHY_CFG_ENABLE_MASK,
-		     0 << MACPHY_CFG_ENABLE_SHIFT);
-
-	rockchip_timer_init();
-
-	return 0;
-}
-
-int dram_init_banksize(void)
-{
-	struct tos_parameter_t *tos_parameter;
-	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
-			TRUST_PARAMETER_OFFSET);
-	if (tos_parameter->tee_mem.flags == 1) {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
-					- CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
-					tos_parameter->tee_mem.size;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-					+ gd->ram_size - gd->bd->bi_dram[1].start;
-	} else {
-		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-		gd->bd->bi_dram[0].size = 0x8400000;
-		/* Reserve 32M for OPTEE with TA */
-		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0x2000000;
-		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
-				+ gd->ram_size - gd->bd->bi_dram[1].start;
-	}
-
-	return 0;
-}
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-	/* Enable D-cache. I-cache is already enabled in start.S */
-	dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data rk322x_otg_data = {
-	.rx_fifo_sz	= 512,
-	.np_tx_fifo_sz	= 16,
-	.tx_fifo_sz	= 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
-	int node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3288-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk322x_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
-	return dwc2_udc_probe(&rk322x_otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-#endif
-
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index dcc9f423c3..48c9884658 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -4,29 +4,61 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <asm/io.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk322x.h>
 
-#define GRF_SOC_CON2	0x11000408
-#define GRF_CON_IOMUX	0x11000050
+#define GRF_BASE	0x11000000
 #define CRU_MISC_CON	0x110e0134
+#define SGRF_DDR_CON0	0x10150000
 
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+};
+#ifdef CONFIG_SPL_BUILD
 int arch_cpu_init(void)
 {
+	static struct rk322x_grf * const grf = (void *)GRF_BASE;
 	/* We do some SoC one time setting here. */
 
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+
 	/* PWMs select rkpwm clock source */
-	rk_setreg(GRF_SOC_CON2, 1 << 0);
+	rk_setreg(&grf->soc_con[2], 1 << 0);
 
 	/* PWM0~3 io select */
-	rk_setreg(GRF_CON_IOMUX, 0xf << 0);
+	rk_setreg(&grf->con_iomux, 0xf << 0);
 
 	/* UART1~2 io select */
-	rk_setreg(GRF_CON_IOMUX, (1 << 11) | (1 << 8));
+	rk_setreg(&grf->con_iomux, (1 << 11) | (1 << 8));
 
 	/* HDMI phy clock source select HDMIPHY clock out */
 	rk_clrreg(CRU_MISC_CON, 1 << 13);
 
+	/*
+	* The integrated macphy is enabled by default, disable it
+	* for saving power consuming.
+	*/
+	rk_clrsetreg(&grf->macphy_con[0], MACPHY_CFG_ENABLE_MASK,
+		     0 << MACPHY_CFG_ENABLE_SHIFT);
 	/* TODO: ECO version */
 
 	return 0;
 }
+#endif
+
+void board_debug_uart_init(void)
+{
+	static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	/* Enable early UART2 channel 1 on the RK322x */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B2_MASK,
+		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
+		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->con_iomux,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
+}

commit 5531a492c004767a4efaec4a46040cc3db2e9ebe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:56:58 2018 +0800

    rockchip: rk322x: sdram: use common udelay instead of rockchip_udelay
    
    Do not need to use rockchip_udelay after we can use systimer.
    
    Change-Id: Ibcd722a71ca383c057128d9706c6679b49c17a3d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index cc3138b21d..c4da0004c8 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -17,7 +17,6 @@
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sdram_rk322x.h>
-#include <asm/arch/timer.h>
 #include <asm/arch/uart.h>
 #include <asm/arch/sdram_common.h>
 #include <asm/types.h>
@@ -97,26 +96,26 @@ void phy_pctrl_reset(struct rk322x_cru *cru,
 			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
 			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
 
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
 						  1 << DDRPHY_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
 						  1 << DDRCTRL_SRST_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 
 	clrbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_RESET_MASK << SOFT_RESET_SHIFT);
-	rockchip_udelay(10);
+	udelay(10);
 	setbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_DERESET_ANALOG);
-	rockchip_udelay(5);
+	udelay(5);
 	setbits_le32(&ddr_phy->ddrphy_reg[0],
 		     SOFT_DERESET_DIGITAL);
 
-	rockchip_udelay(1);
+	udelay(1);
 }
 
 void phy_dll_bypass_set(struct rk322x_ddr_phy *ddr_phy, u32 freq)
@@ -155,7 +154,7 @@ static void send_command(struct rk322x_ddr_pctl *pctl,
 			 u32 rank, u32 cmd, u32 arg)
 {
 	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
-	rockchip_udelay(1);
+	udelay(1);
 	while (readl(&pctl->mcmd) & START_CMD)
 		;
 }
@@ -168,7 +167,7 @@ static void memory_init(struct chan_info *chan,
 
 	if (dramtype == DDR3) {
 		send_command(pctl, 3, DESELECT_CMD, 0);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, PREA_CMD, 0);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
@@ -197,17 +196,17 @@ static void memory_init(struct chan_info *chan,
 			     (0x63 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0 & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(10);
+		udelay(10);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0xff & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, MRS_CMD,
 			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (0xff & LPDDR23_OP_MASK) <<
 			     LPDDR23_OP_SHIFT);
-		rockchip_udelay(1);
+		udelay(1);
 		send_command(pctl, 3, MRS_CMD,
 			     (1 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
 			     (sdram_params->phy_timing.mr[1] &
@@ -244,7 +243,7 @@ static u32 data_training(struct chan_info *chan)
 			DQS_SQU_CAL_SEL_CS0);
 	setbits_le32(&ddr_phy->ddrphy_reg[2], DQS_SQU_CAL_START);
 
-	rockchip_udelay(30);
+	udelay(30);
 	ret = readl(&ddr_phy->ddrphy_reg[0xff]);
 
 	clrbits_le32(&ddr_phy->ddrphy_reg[2],
@@ -368,9 +367,9 @@ static void phy_softreset(struct dram_info *dram)
 
 	writel(GRF_DDRPHY_BUFFEREN_CORE_EN, &grf->soc_con[0]);
 	clrbits_le32(&ddr_phy->ddrphy_reg[0], 0x3 << 2);
-	rockchip_udelay(1);
+	udelay(1);
 	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 2);
-	rockchip_udelay(5);
+	udelay(5);
 	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 3);
 	writel(GRF_DDRPHY_BUFFEREN_CORE_DIS, &grf->soc_con[0]);
 }

commit 422ee936fd1dfbaa6482b268c3bec12033859e73
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:55:45 2018 +0800

    rockchip: rk322x: remove use rockchip timer as sys timer
    
    We can use arch timer instead of rockchip timer.
    
    Change-Id: I9098f42180515202c39c9fd86299687cb4902ec1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index ecfed899cf..e40d4504b9 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -14,9 +14,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
 
-#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
-#define CONFIG_SYS_TIMER_BASE		0x110c00a0 /* TIMER5 */
-#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_TEXT_BASE		0x61000000

commit 8ec39620845b660a9b043b1e3d82e843ca70536c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:54:58 2018 +0800

    rockchip: rk3328: add BOOT_MODE_REG for rk3328
    
    Change-Id: Ib0ee4709b6b57b51142c9df2e14ff0be3798f9a3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index e0f1b663e6..7090db00dc 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -237,6 +237,7 @@ config ROCKCHIP_BOOT_MODE_REG
 	default 0x20004040 if ROCKCHIP_RK3188
 	default 0x110005c8 if ROCKCHIP_RK322X
 	default 0xff730094 if ROCKCHIP_RK3288
+	default 0xff1005c8 if ROCKCHIP_RK3328
 	default 0xff738200 if ROCKCHIP_RK3368
 	default 0xff320300 if ROCKCHIP_RK3399
 	default 0x10300580 if ROCKCHIP_RV1108

commit ffb06671e66b123739d624d7291e535cd95608d6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:51:51 2018 +0800

    rockchip: rk3066: enable early back to bootrom like rk3188
    
    We don't need tpl for rk3066 after we enable this option.
    NOTE: need to update code for clock init in boot0 later
    
    Change-Id: I253e6a0fd3633d982ebabaa045a0d4839570bc6a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2ffef77e8c..e0f1b663e6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -41,6 +41,7 @@ config ROCKCHIP_RK3066
 	select TPL
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
+	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 	help
 	  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c
deleted file mode 100644
index 03efe399e5..0000000000
--- a/arch/arm/mach-rockchip/rk3066-board-tpl.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <clk.h>
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/ddr_rk3188.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/grf_rk3066.h>
-#include <asm/arch/pmu_rk3188.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define RK3066_TIMER_CONTROL	0x8
-#define GRF_BASE	0x20008000
-
-static int setup_arm_clock(void)
-{
-	struct udevice *dev;
-	struct clk clk;
-	int ret;
-
-	ret = rockchip_get_clk(&dev);
-	if (ret)
-		return ret;
-
-	clk.id = CLK_ARM;
-	ret = clk_request(dev, &clk);
-	if (ret < 0)
-		return ret;
-
-	ret = clk_set_rate(&clk, 600000000);
-
-	clk_free(&clk);
-	return ret;
-}
-
-void board_init_f(ulong dummy)
-{
-	struct rk3066_grf * const grf = (void *)GRF_BASE;
-	struct udevice *dev;
-	int ret;
-
-	/* Enable early UART on the RK3066 */
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B0_MASK,
-		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-
-	debug_uart_init();
-
-	printascii("U-Boot TPL board init\n");
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Reset and enable Timer0 */
-	writel(0, CONFIG_SYS_TIMER_BASE);
-	rk_clrsetreg(CONFIG_SYS_TIMER_BASE + RK3066_TIMER_CONTROL, 0x1, 0x1);
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-
-	setup_arm_clock();
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}

commit e8078e906809989f5429bdd1e2d98b73c5402c52
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:50:15 2018 +0800

    rockchip: add IRAM_START_ADDR for all SoCs
    
    We add this for get the location for boot device of bootrom.
    
    Change-Id: Ibf142129cacb09ed9e4e0084d003c6cc0812df54
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b187404737..2ffef77e8c 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -263,6 +263,23 @@ config ROCKCHIP_STIMER_BASE
 	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
 	  works after this timer work.
 
+config ROCKCHIP_IRAM_START_ADDR
+	hex "Rockchip Secure timer base address"
+	default 0xff0e0000 if ROCKCHIP_PX30
+	default 0x10080000 if ROCKCHIP_RK3036
+	default 0x10080000 if ROCKCHIP_RK3128
+	default 0x10080000 if ROCKCHIP_RK3188
+	default 0x10080000 if ROCKCHIP_RK322X
+	default 0xff700000 if ROCKCHIP_RK3288
+	default 0xff091000 if ROCKCHIP_RK3328
+	default 0xff8c0000 if ROCKCHIP_RK3368
+	default 0xff8c0000 if ROCKCHIP_RK3399
+	default 0x10080000 if ROCKCHIP_RV1108
+	default 0
+	help
+	  The IRAM start addr is to locate variant of the boot device from
+	  bootrom.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0

commit d5ed5c22a11b5b0f26f52f2ccac07debcce1db88
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:46:44 2018 +0800

    rockchip: add STIMER_BASE for all SoCs
    
    STIMER is can only access in secure mode if the SoCs supports trust,
    and it locate in alive power domain, as the source of ARM arch/generic
    timer, we add a base addr for all SoCs so that we can init with a common
    function.
    
    Change-Id: Iab7b8706344ecdc635d66196eed1ff855afc9a24
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 64b3a61dca..b187404737 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -244,6 +244,25 @@ config ROCKCHIP_BOOT_MODE_REG
 	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
 	  according to the value from this register.
 
+config ROCKCHIP_STIMER_BASE
+	hex "Rockchip Secure timer base address"
+	default 0xff220020 if ROCKCHIP_PX30
+	default 0x200440a0 if ROCKCHIP_RK3036
+	default 0x2000e000 if ROCKCHIP_RK3066
+	default 0x20018020 if ROCKCHIP_RK3126
+	default 0x200440a0 if ROCKCHIP_RK3128
+	default 0x2000e000 if ROCKCHIP_RK3188
+	default 0x110d0020 if ROCKCHIP_RK322X
+	default 0xff810020 if ROCKCHIP_RK3288
+	default 0xff1d0020 if ROCKCHIP_RK3328
+	default 0xff830020 if ROCKCHIP_RK3368
+	default 0xff8680a0 if ROCKCHIP_RK3399
+	default 0x10350020 if ROCKCHIP_RV1108
+	default 0
+	help
+	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
+	  works after this timer work.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0

commit 60b9259c7eb819b117cc9e80ff0f57b9daad2aa4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:43:05 2018 +0800

    rockchip: enable SYS_NS16550 for all SoCs by default
    
    All rockchip SoCs can use ns16550 driver, enable it for all
    and set SYS_NS16550_MEM32 for all SoCs.
    
    Change-Id: I4be3a801bf5537b94ed0c100cb44f49d78b8b15a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 005a315116..a17879ddb6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1131,6 +1131,7 @@ config ARCH_ROCKCHIP
 	select DM_REGULATOR
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	select ENABLE_ARM_SOC_BOOT0_HOOK
+	select SYS_NS16550
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index a1554af647..64b3a61dca 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -120,7 +120,6 @@ config ROCKCHIP_RK3328
 	imply TPL_SERIAL_SUPPORT
 	imply SPL_SEPARATE_BSS
 	select DEBUG_UART_BOARD_INIT
-	select SYS_NS16550
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -155,7 +154,6 @@ config ROCKCHIP_RK3368
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
 	select DEBUG_UART_BOARD_INIT
-	select SYS_NS16550
 	select GICV2
 	help
 	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index d883efcf9b..85e2ceee7c 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -18,9 +18,6 @@
 #define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 5ed44e2073..8d5f13b35f 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -30,7 +30,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x78000000
 #define CONFIG_SYS_LOAD_ADDR		0x70800800
 
-#define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_SPL_FRAMEWORK
 
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 3696b71960..f4798859c4 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -19,8 +19,6 @@
 #define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x60000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 0fde4cc985..91e8e5c259 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -22,8 +22,6 @@
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x60000000
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 2b3c4c23c3..ecfed899cf 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SYS_TEXT_BASE		0x61000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x61100000
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 32edcc549e..4b90a56e28 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -20,8 +20,6 @@
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
-
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
 #define CONFIG_SYS_TEXT_BASE		0x00000000
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index e8665d6ee9..1ecc4f7b53 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -15,8 +15,6 @@
 
 #define CONFIG_SPL_FRAMEWORK
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index a7f872366e..a8a12a3eae 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -22,13 +22,11 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00280000
 
+#define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE            0x00000000
 #define CONFIG_SPL_MAX_SIZE             0x40000
 #define CONFIG_SPL_BSS_START_ADDR       0x400000
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index be9bdd897a..fe17975d91 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -18,8 +18,6 @@
 #define CONFIG_SPL_SPI_LOAD
 #endif
 
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 69052eb68b..c67daa265f 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -12,6 +12,8 @@
 #define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK	24000000
 
+#define CONFIG_SYS_NS16550_MEM32
+
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 93bda24782..df6f952b6e 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -18,9 +18,6 @@
 #define CONFIG_SYS_TIMER_BASE		0x10350020
 #define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
 
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_MEM32
-
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE

commit 2d2f5f9a1fca2bae6aa7257aa9e95da2ba43c414
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:30:44 2018 +0800

    rockchip: add common MACRO to enable sys arch timer
    
    All rockchip SoCs can use ARM arch timer, let's enable it in
    common header file
    
    Change-Id: Ic74024b34c72cfbeffa2288ef2b2375f5f141c2c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index d33f581abf..a7f872366e 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -22,8 +22,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-#define COUNTER_FREQUENCY               24000000
-
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_NS16550_MEM32
 
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index a9a7905723..be9bdd897a 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -18,8 +18,6 @@
 #define CONFIG_SPL_SPI_LOAD
 #endif
 
-#define COUNTER_FREQUENCY               24000000
-
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 8b892271e9..69052eb68b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -8,6 +8,10 @@
 #define _ROCKCHIP_COMMON_H_
 #include <linux/sizes.h>
 
+#define COUNTER_FREQUENCY               24000000
+#define CONFIG_SYS_ARCH_TIMER
+#define CONFIG_SYS_HZ_CLOCK	24000000
+
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 

commit b95943f162d206d602461cad2f4df2e080f0352e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 21:22:35 2018 +0800

    rockchip: rk3288: move configure_l2ctlr back to rk3288
    
    The configure_l2ctlr() is used only by rk3288, do not need to
    locate in sys_proto.h
    
    Change-Id: I98f8cffdbc990e3fcf19f41ca53ff5fd25155e63
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index e428d59336..3617ac2c60 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,27 +7,5 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
-#ifdef CONFIG_ROCKCHIP_RK3288
-#include <asm/armv7.h>
-
-static void configure_l2ctlr(void)
-{
-	uint32_t l2ctlr;
-
-	l2ctlr = read_l2ctlr();
-	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
-
-	/*
-	* Data RAM write latency: 2 cycles
-	* Data RAM read latency: 2 cycles
-	* Data RAM setup latency: 1 cycle
-	* Tag RAM write latency: 1 cycle
-	* Tag RAM read latency: 1 cycle
-	* Tag RAM setup latency: 1 cycle
-	*/
-	l2ctlr |= (1 << 3 | 1 << 0);
-	write_l2ctlr(l2ctlr);
-}
-#endif /* CONFIG_ROCKCHIP_RK3288 */
 
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index eee90cfd53..bf4b799eba 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -3,6 +3,7 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#include <asm/armv7.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 
@@ -20,10 +21,33 @@
 #define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
 	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
+#ifdef CONFIG_SPL_BUILD
+static void configure_l2ctlr(void)
+{
+	uint32_t l2ctlr;
+
+	l2ctlr = read_l2ctlr();
+	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
+
+	/*
+	* Data RAM write latency: 2 cycles
+	* Data RAM read latency: 2 cycles
+	* Data RAM setup latency: 1 cycle
+	* Tag RAM write latency: 1 cycle
+	* Tag RAM read latency: 1 cycle
+	* Tag RAM setup latency: 1 cycle
+	*/
+	l2ctlr |= (1 << 3 | 1 << 0);
+	write_l2ctlr(l2ctlr);
+}
+#endif
+
 int arch_cpu_init(void)
 {
 	/* We do some SoC one time setting here. */
-
+#ifdef CONFIG_SPL_BUILD
+	configure_l2ctlr();
+#else
 	/* Use rkpwm by default */
 	rk_setreg(GRF_SOC_CON2, 1 << 0);
 
@@ -40,6 +64,7 @@ int arch_cpu_init(void)
 	/* Set vop qos to highest priority */
 	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO0_VOP_QOS_BASE);
 	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO1_VOP_QOS_BASE);
+#endif
 
 	return 0;
 }

commit 89c73a9ccaf2e308233ee1932e30ce737d932a68
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 17:59:08 2018 +0800

    spl: use different BOARD_INIT MACRO for spl and tpl
    
    SPL and TPL may not always need spl_board_init() at the same time.
    
    Change-Id: I5f26956414f1d2ff3fd2fce11a4d7759de7804fe
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 7aae826e16..3e6f526e37 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -754,6 +754,13 @@ config TPL
 
 if TPL
 
+config TPL_BOARD_INIT
+	bool "Call board-specific initialization in TPL"
+	help
+	  If this option is enabled, U-Boot will call the function
+	  spl_board_init() from board_init_r(). This function should be
+	  provided by the board.
+
 config TPL_LDSCRIPT
         string "Linker script for the TPL stage"
 	depends on TPL
diff --git a/common/spl/spl.c b/common/spl/spl.c
index ac2c6ca1a5..ec6ac69819 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -395,7 +395,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	timer_init();
 #endif
 
-#ifdef CONFIG_SPL_BOARD_INIT
+#if CONFIG_IS_ENABLED(BOARD_INIT)
 	spl_board_init();
 #endif
 

commit 8fcd17873cdba141621a1de1340b582c59595a35
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 16:41:14 2018 +0800

    rockchip: make u-boot-tpl.its common
    
    All rockchip can re-use this its file.
    
    Change-Id: I75b5a5b2865d861bc6b746ad42491b5596d269cc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds b/arch/arm/mach-rockchip/u-boot-tpl.lds
similarity index 87%
rename from arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
rename to arch/arm/mach-rockchip/u-boot-tpl.lds
index 841c803e73..caeb40e104 100644
--- a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
+++ b/arch/arm/mach-rockchip/u-boot-tpl.lds
@@ -10,4 +10,4 @@
 #undef CONFIG_SPL_MAX_SIZE
 #define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
 
-#include "../../cpu/u-boot-spl.lds"
+#include "../cpu/u-boot-spl.lds"
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 8c75cc4fdf..65089619d4 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
-CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index f8a58e86df..9a27b69ade 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -4,7 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
-CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
 CONFIG_TPL_TEXT_BASE=0x10081004
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000

commit 48e66864c37e079786b0eeeffe62f1af0f29e1eb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Jan 20 22:01:04 2018 +0800

    power: rk8xx: fix compile warning
    
    If CONFIG_SPL_BUILD is not enable, some functions are defined but
    not used.
    
    Change-Id: I1d67f8f5d69c92d2d26209a17d7a765a56b10e59
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 355c945a3b..9b51c243dc 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -153,49 +153,6 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
 
-static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
-{
-	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
-	int mask = info->vsel_mask;
-	int val;
-
-	if (info->vsel_sleep_reg == -1)
-		return -ENOSYS;
-	val = (uvolt - info->min_uv) / info->step_uv;
-	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
-	      val);
-
-	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
-}
-
-static int _buck_get_enable(struct udevice *pmic, int buck)
-{
-	struct rk8xx_priv *priv = dev_get_priv(pmic);
-	uint mask = 0;
-	int ret = 0;
-
-	switch (priv->variant) {
-	case RK805_ID:
-	case RK816_ID:
-		if (buck >= 4) {
-			mask = 1 << (buck - 4);
-			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2);
-		} else {
-			mask = 1 << buck;
-			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1);
-		}
-		break;
-	case RK808_ID:
-	case RK818_ID:
-		mask = 1 << buck;
-		ret = pmic_reg_read(pmic, REG_DCDC_EN);
-		if (ret < 0)
-			return ret;
-		break;
-	}
-	return ret & mask ? true : false;
-}
-
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask, value, en_reg;
@@ -241,6 +198,50 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
+#ifdef ENABLE_DRIVER
+static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == -1)
+		return -ENOSYS;
+	val = (uvolt - info->min_uv) / info->step_uv;
+	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
+	      val);
+
+	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
+}
+
+static int _buck_get_enable(struct udevice *pmic, int buck)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		if (buck >= 4) {
+			mask = 1 << (buck - 4);
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2);
+		} else {
+			mask = 1 << buck;
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1);
+		}
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		ret = pmic_reg_read(pmic, REG_DCDC_EN);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	return ret & mask ? true : false;
+}
+
 static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask;
@@ -268,7 +269,6 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
-#ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 					     int num)
 {

commit 3e0b6ad9e60089afee33804ed04e33b1b63236ca
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 16:10:06 2018 +0800

    rockchip: resrouce_img: fix compile warning
    
    Change-Id: I495e289b915dedbfe456d15d28fbc3da4c466fa6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 44b625f5e9..b0fc451210 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -153,9 +153,11 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	int offset = 0;
 	int mode = 0;
 	struct blk_desc *dev_desc;
-	struct andr_img_hdr *andr_hdr;
 	disk_partition_t part_info;
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	struct andr_img_hdr *andr_hdr;
 	char *boot_partname = PART_BOOT;
+#endif
 
 	if (hdr) {
 		content = (void *)((char *)hdr

commit 6f3eb47422df438f66a8297978800afdb5688995
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 22 16:55:57 2018 +0800

    fastboot: fix compile warning
    
    cb_flashing() should be in the same MACRO of cb_flash().
    
    Change-Id: Ic5641a1bf1fb0ab53ad98bdececd028f1e75a5e2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 2ac1d6c404..0bf1908a4b 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -899,7 +899,6 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #endif
 	fastboot_tx_write_str(response);
 }
-#endif
 
 static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 {
@@ -943,6 +942,7 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 		fastboot_tx_write_str("FAILunknown flashing command");
 	}
 }
+#endif
 
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {

commit 282f89a3b6b2f2b17f04563cefc96a715d8e0e2d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 19 15:59:25 2018 +0800

    rockchip: param: reverve 4MB for emmc
    
    Need to reserver first 4MB for EMMC while use the addr directly for NAND.
    
    Change-Id: I5c6309e41a9c287388cb6c0ff7ba5b1ef9ff29bf
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index b2c04e527d..686fa6ce29 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -28,7 +28,8 @@ struct rkparm_part {
 
 static LIST_HEAD(parts_head);
 
-static int rkparm_param_parse(char *param, struct list_head *parts_head)
+static int rkparm_param_parse(char *param, struct list_head *parts_head,
+			      struct blk_desc *dev_desc)
 {
 	struct rkparm_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
@@ -37,7 +38,7 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head)
 	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
 	char *next = (char *)blkdev_def;
 	char *pend;
-	int len;
+	int len, offset = 0;
 	unsigned long size, start;
 
 	if (!cmdline) {
@@ -68,7 +69,9 @@ static int rkparm_param_parse(char *param, struct list_head *parts_head)
 			printf("out of memory\n");
 			break;
 		}
-		part->start = start;
+		if (dev_desc->if_type != IF_TYPE_RKNAND)
+			offset = RK_PARAM_OFFSET;
+		part->start = start + offset;
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';
@@ -84,6 +87,7 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 				struct list_head *parts_head)
 {
 	struct rkparm_param *param;
+	int offset = 0;
 	int ret;
 
 	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
@@ -92,14 +96,16 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 		return -ENOMEM;
 	}
 
-	ret = blk_dread(dev_desc, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9,
-			(ulong *)param);
+	if (dev_desc->if_type != IF_TYPE_RKNAND)
+		offset = RK_PARAM_OFFSET;
+
+	ret = blk_dread(dev_desc, offset, MAX_PARAM_SIZE >> 9, (ulong *)param);
 	if (ret != (MAX_PARAM_SIZE >> 9)) {
 		printf("%s param read fail\n", __func__);
 		return -EINVAL;
 	}
 
-	return rkparm_param_parse(param->params, parts_head);
+	return rkparm_param_parse(param->params, parts_head, dev_desc);
 
 }
 

commit 534066e47b715080a2a36f980bc14a9e17aaa939
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 18 10:12:47 2018 +0800

    bootm: resever memory before any lmb_alloc()
    
    It's better to be done anyway and as early as possible.
    
    Change-Id: I681c93b97a8c3da681886b23ef350ecab8156f8e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/bootm.c b/common/bootm.c
index 9493a306cd..459063ead7 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -637,6 +637,9 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 			ret = 0;
 	}
 
+	/* Resever memory before any lmb_alloc, as early as possible */
+	boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
+
 	/* Relocate the ramdisk */
 #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
 	if (!ret && (states & BOOTM_STATE_RAMDISK)) {
@@ -652,7 +655,6 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 #endif
 #if IMAGE_ENABLE_OF_LIBFDT && defined(CONFIG_LMB)
 	if (!ret && (states & BOOTM_STATE_FDT)) {
-		boot_fdt_add_mem_rsv_regions(&images->lmb, images->ft_addr);
 		ret = boot_relocate_fdt(&images->lmb, &images->ft_addr,
 					&images->ft_len);
 	}

commit df3eab812428e0411fd27660123aaef7b379af29
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 18 10:09:39 2018 +0800

    image-fdt: support "reserved-memory" for lmb
    
    Change-Id: Id628c47e2521226777d2391db1fee325592cf3f2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/image-fdt.c b/common/image-fdt.c
index 1e946467e3..d64763eb86 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #include <fdt_support.h>
 #include <errno.h>
 #include <image.h>
@@ -78,10 +79,17 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 {
 	uint64_t addr, size;
 	int i, total;
+	int rsv_offset, offset;
+	fdt_size_t rsv_size;
+	fdt_addr_t rsv_addr;
+	/* we needn't repeat do reserve, do_bootm_linux would call this again */
+	static int rsv_done;
 
-	if (fdt_check_header(fdt_blob) != 0)
+	if (fdt_check_header(fdt_blob) != 0 || rsv_done)
 		return;
 
+	rsv_done = 1;
+
 	total = fdt_num_mem_rsv(fdt_blob);
 	for (i = 0; i < total; i++) {
 		if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0)
@@ -90,6 +98,23 @@ void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob)
 		       (unsigned long long)addr, (unsigned long long)size);
 		lmb_reserve(lmb, addr, size);
 	}
+
+	rsv_offset = fdt_subnode_offset(fdt_blob, 0, "reserved-memory");
+	if (rsv_offset == -FDT_ERR_NOTFOUND)
+		return;
+
+	for (offset = fdt_first_subnode(fdt_blob, rsv_offset);
+	     offset >= 0;
+	     offset = fdt_next_subnode(fdt_blob, offset)) {
+		rsv_addr = fdtdec_get_addr_size_auto_noparent(fdt_blob, offset,
+							      "reg", 0,
+							      &rsv_size, false);
+		if (rsv_addr == FDT_ADDR_T_NONE || !rsv_size)
+			continue;
+		printf("  'reserved-memory' region: addr=%llx size=%llx\n",
+			(unsigned long long)rsv_addr, (unsigned long long)rsv_size);
+		lmb_reserve(lmb, rsv_addr, rsv_size);
+	}
 }
 
 /**

commit 830c86d9927563733c3bc32eb89e2b5274c9df89
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 5 15:56:16 2018 +0800

    image-android: get real fdt addr in android_image_get_fdt
    
    Change-Id: Ie9c632c767962f8580bd9adf7727738f28479e4c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index ac4ea46ab1..cc416e522d 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
+#define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
 
 static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
 
@@ -162,9 +163,9 @@ int android_image_get_fdt(const struct andr_img_hdr *hdr,
 	*rd_data += hdr->page_size;
 	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
 	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
-
 #ifdef CONFIG_ROCKCHIP_BOOTLOADER
-	rockchip_get_resource_file(rd_data, "rk-kernel.dtb");
+	*rd_data += (rockchip_get_resource_file(*rd_data, ANDROID_ARG_FDT_FILENAME))
+			* 512;
 #endif
 	return 0;
 }

commit b7570de26ccf78cb0a1b49f958d5697bf607e236
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 5 09:20:05 2018 +0800

    android: modify the fdt_addr
    
    The env fdt_addr must be set as hex.
    
    Change-Id: I75ffeb832a4b44dcadafdcfecfc6bb282e495b83
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 3f562258f8..fdd0c92be7 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -451,7 +451,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 #else
 	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
 	if (!ret)
-		env_set_ulong("fdt_addr", fdt_addr);
+		env_set_hex("fdt_addr", fdt_addr);
 #endif
 	android_bootloader_boot_kernel(load_address);
 

commit 996b899fff287c115ea9370f89259add19309780
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Jan 5 15:50:29 2018 +0800

    rockchip: resc_img: fix err if initialize resource list
    
    In the function init_resource_list, if hdr is not NULL
    The content addr is the sum of hdr addr and
    (hdr->c_offset) * RK_BLK_SIZE. Then return 0 directly
    without free hdr and content.
    
    If hdr is NULL and gpt table is enabled, the parameter
    offset must be multiplied by RK_BLK_SIZE and be divided
    by RK_BLK_SIZE in function blk_read.
    
    Change-Id: Ib4120745af8aa4924464f85c8bb4b34daee98fa6
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 16eac39052..44b625f5e9 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -158,8 +158,14 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	char *boot_partname = PART_BOOT;
 
 	if (hdr) {
-		content = (void *)(hdr + hdr->c_offset);
-		goto init_list;
+		content = (void *)((char *)hdr
+				   + (hdr->c_offset) * RK_BLK_SIZE);
+		for (e_num = 0; e_num < hdr->e_nums; e_num++) {
+			size = e_num * hdr->e_blks * RK_BLK_SIZE;
+			entry = (struct resource_entry *)(content + size);
+			add_file_to_list(entry, offset);
+		}
+		return 0;
 	}
 
 	dev_desc = rockchip_get_bootdev();
@@ -192,10 +198,11 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		debug("%s Load resource from %s senond pos\n",
 		      __func__, part_info.name);
 		/* Read resource from second offset */
-		offset = part_info.start;
+		offset = part_info.start * RK_BLK_SIZE;
 		offset += andr_hdr->page_size;
 		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
 		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
+		offset = offset / RK_BLK_SIZE;
 	} else {
 		/* Set mode to 0 in for recovery is not valid AOSP img */
 		mode = 0;
@@ -231,7 +238,6 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	if (ret != (hdr->e_blks * hdr->e_nums))
 		goto err;
 
-init_list:
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * RK_BLK_SIZE;
 		entry = (struct resource_entry *)(content + size);

commit 5c9c1f991f5a2ea4241fba76235531b07b216fe1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Jan 15 20:55:42 2018 +0800

    common: boot_rkimg: fix compile warnings
    
    Change-Id: Id7c49a187e789daa8af78c2f38982568f2f48e44
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 146792a367..de95d8c321 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -310,8 +310,8 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 		goto out;
 	}
 
-	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
-	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
+	printf("kernel   @ 0x%08lx (0x%08x)\n", kernel_addr_r, kernel_size);
+	printf("ramdisk  @ 0x%08lx (0x%08x)\n", ramdisk_addr_r, ramdisk_size);
 #if defined(CONFIG_ARM64)
 	char cmdbuf[64];
 	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",

commit 526c692b8eac4d705a15f7fd6c6d342c2424b229
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 16 11:47:08 2018 +0800

    env: add more debug message for env_update() and env_append()
    
    Change-Id: I0d798d91f2bc132accac882ccfeec76d2f6a747e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index cc90b77f9e..307ec60534 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -312,8 +312,11 @@ static int env_append(const char *varname, const char *varvalue)
 	if (oldvalue) {
 		len += strlen(oldvalue);
 		/* Exist ! */
-		if (strstr(oldvalue, varvalue))
+		if (strstr(oldvalue, varvalue)) {
+			debug("%s: '%s' is already exist in '%s'\n",
+			      __func__, varvalue, varname);
 			return 0;
+		}
 	}
 
 	newvalue = malloc(len + 2);
@@ -499,9 +502,11 @@ int env_update(const char *varname, const char *varvalue)
 		}
 
 		/* Not find, just append */
-		if (!match)
+		if (!match) {
+			debug("%s: append '%s' to the '%s' end\n",
+			      __func__, v_item, varname);
 			env_append(varname, v_item);
-
+		}
 		match = false;
 		free(v_item_tok);
 	}

commit b99d793163eedbb072e26f6e16063d77627f82f1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 17 15:43:09 2018 +0800

    rockchip: remove no use script
    
    We have move these script to common folder.
    
    Change-Id: Ieacd1d49fc481435602fec3de0747873df22c2b5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3229/fit_spl_optee.its b/board/rockchip/evb_rk3229/fit_spl_optee.its
deleted file mode 100644
index ed93d443f9..0000000000
--- a/board/rockchip/evb_rk3229/fit_spl_optee.its
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing U-Boot, dtb and optee
- */
-
-/dts-v1/;
-
-/ {
-	description = "Simple image with OP-TEE support";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot";
-			data = /incbin/("../../../u-boot-nodtb.bin");
-			type = "standalone";
-			arch = "arm";
-			compression = "none";
-			load = <0x61000000>;
-		};
-		optee@1 {
-			description = "ARM Trusted Firmware";
-			data = /incbin/("../../../tee.bin");
-			type = "firmware";
-			arch = "arm";
-			compression = "none";
-			load = <0x68400000>;
-			entry = <0x68400000>;
-		};
-		fdt@1 {
-			description = "rk3229 dtb";
-			data = /incbin/("../../../u-boot.dtb");
-			type = "flat_dt";
-			compression = "none";
-		};
-	};
-
-	configurations {
-		default = "conf@1";
-		conf@1 {
-			description = "RK3399 evb";
-			firmware = "uboot@1";
-			loadables = "optee@1";
-			fdt = "fdt@1";
-		};
-	};
-};
diff --git a/board/rockchip/evb_rk3328/mk_fit_atf.sh b/board/rockchip/evb_rk3328/mk_fit_atf.sh
deleted file mode 100755
index 192c303af0..0000000000
--- a/board/rockchip/evb_rk3328/mk_fit_atf.sh
+++ /dev/null
@@ -1,108 +0,0 @@
-#!/bin/sh
-#
-# script to generate FIT image source for rk3399 boards with
-# ARM Trusted Firmware and multiple device trees (given on the command line)
-#
-# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
-
-[ -z "$BL31" ] && BL31="bl31.elf"
-
-if [ ! -f $BL31 ]; then
-	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
-	BL31=/dev/null
-fi
-
-cat << __HEADER_EOF
-/dts-v1/;
-
-/ {
-	description = "Configuration to load ATF before U-Boot";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot (64-bit)";
-			data = /incbin/("u-boot-nodtb.bin");
-			type = "standalone";
-			arch = "arm64";
-			compression = "none";
-			load = <0x00200000>;
-		};
-__HEADER_EOF
-
-atf_cnt=1
-
-for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
-	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
-do
-	offset=${l%%:*}
-	ll=${l#*:}
-	phy_offset=${ll%:*}
-	filesz=${ll##*:}
-
-	#echo "$offset/$phy_offset/$filesz"
-
-	of=bl31_${phy_offset}.bin
-	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
-
-	out_string="${out_string}:${phy_offset}"
-
-	cat << __ATF1_EOF
-		atf@$atf_cnt {
-			description = "ARM Trusted Firmware";
-			data = /incbin/("$of");
-			type = "firmware";
-			arch = "arm64";
-			compression = "none";
-			load = <$phy_offset>;
-__ATF1_EOF
-	if [ "$atf_cnt" -eq 1 ]; then
-		cat << __ATF2_EOF
-			entry = <$phy_offset>;
-__ATF2_EOF
-		fi
-	cat << __ATF3_EOF
-		};
-__ATF3_EOF
-	atf_cnt=$((atf_cnt + 1))
-done
-
-cnt=1
-for dtname in $*
-do
-	cat << __FDT_IMAGE_EOF
-		fdt@$cnt {
-			description = "$(basename $dtname .dtb)";
-			data = /incbin/("$dtname");
-			type = "flat_dt";
-			compression = "none";
-		};
-__FDT_IMAGE_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __CONF_HEADER_EOF
-	};
-	configurations {
-		default = "config@1";
-
-__CONF_HEADER_EOF
-
-cnt=1
-for dtname in $*
-do
-	cat << __CONF_SECTION_EOF
-		config@$cnt {
-			description = "$(basename $dtname .dtb)";
-			firmware = "uboot@1";
-			loadables = "atf@1","atf@2";
-			fdt = "fdt@1";
-		};
-__CONF_SECTION_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __ITS_EOF
-	};
-};
-__ITS_EOF
diff --git a/board/rockchip/evb_rk3399/mk_fit_atf.sh b/board/rockchip/evb_rk3399/mk_fit_atf.sh
deleted file mode 100755
index 146550aab3..0000000000
--- a/board/rockchip/evb_rk3399/mk_fit_atf.sh
+++ /dev/null
@@ -1,110 +0,0 @@
-#!/bin/sh
-#
-# script to generate FIT image source for rk3399 boards with
-# ARM Trusted Firmware and multiple device trees (given on the command line)
-#
-# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
-
-[ -z "$BL31" ] && BL31="bl31.elf"
-
-if [ ! -f $BL31 ]; then
-	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
-	BL31=/dev/null
-fi
-
-#tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img
-
-cat << __HEADER_EOF
-/dts-v1/;
-
-/ {
-	description = "Configuration to load ATF before U-Boot";
-	#address-cells = <1>;
-
-	images {
-		uboot@1 {
-			description = "U-Boot (64-bit)";
-			data = /incbin/("u-boot-nodtb.bin");
-			type = "standalone";
-			arch = "arm64";
-			compression = "none";
-			load = <0x00200000>;
-		};
-__HEADER_EOF
-
-atf_cnt=1
-
-for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
-	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
-do
-	offset=${l%%:*}
-	ll=${l#*:}
-	phy_offset=${ll%:*}
-	filesz=${ll##*:}
-
-	#echo "$offset/$phy_offset/$filesz"
-
-	of=rk3399bl31_${phy_offset}.bin
-	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
-
-	out_string="${out_string}:${phy_offset}"
-
-	cat << __ATF1_EOF
-		atf@$atf_cnt {
-			description = "ARM Trusted Firmware";
-			data = /incbin/("$of");
-			type = "firmware";
-			arch = "arm64";
-			compression = "none";
-			load = <$phy_offset>;
-__ATF1_EOF
-	if [ "$atf_cnt" -eq 1 ]; then
-		cat << __ATF2_EOF
-			entry = <$phy_offset>;
-__ATF2_EOF
-		fi
-	cat << __ATF3_EOF
-		};
-__ATF3_EOF
-	atf_cnt=$((atf_cnt + 1))
-done
-
-cnt=1
-for dtname in $*
-do
-	cat << __FDT_IMAGE_EOF
-		fdt@$cnt {
-			description = "$(basename $dtname .dtb)";
-			data = /incbin/("$dtname");
-			type = "flat_dt";
-			compression = "none";
-		};
-__FDT_IMAGE_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __CONF_HEADER_EOF
-	};
-	configurations {
-		default = "config@1";
-
-__CONF_HEADER_EOF
-
-cnt=1
-for dtname in $*
-do
-	cat << __CONF_SECTION_EOF
-		config@$cnt {
-			description = "$(basename $dtname .dtb)";
-			firmware = "uboot@1";
-			loadables = "atf@1","atf@2","atf@3";
-			fdt = "fdt@1";
-		};
-__CONF_SECTION_EOF
-	cnt=$((cnt+1))
-done
-
-cat << __ITS_EOF
-	};
-};
-__ITS_EOF

commit 5c23cf980b55ed9d4c7eefeb90c5d77baf37c4af
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:54:06 2018 +0800

    rockchip: sheep-rk3368 remove ENV_SIZE
    
    The ENV_SIZE have moved into Kconfig, remove it.
    
    Change-Id: I3f9f0b8adaff7d9d566c5085b2738b0085feded5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/sheep_rk3368.h b/include/configs/sheep_rk3368.h
index eac9755bba..4eb4fb0e2f 100644
--- a/include/configs/sheep_rk3368.h
+++ b/include/configs/sheep_rk3368.h
@@ -13,7 +13,6 @@
 #define KERNEL_LOAD_ADDR		0x280000
 #define DTB_LOAD_ADDR			0x5600000
 #define INITRD_LOAD_ADDR		0x5bf0000
-#define CONFIG_ENV_SIZE			0x2000
 
 #define CONFIG_CONSOLE_SCROLL_LINES	10
 

commit 7f732f5f7a7fda6aae147e62d8607288b71cd42f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:53:17 2018 +0800

    rockchip: remove no use BITS_PER_LONG
    
    Change-Id: I838bdab8fba05d784dce06cde11e492e225b23d7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index adfe8f6952..517ac0b252 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -28,7 +28,6 @@
 #define EDID_EST_TIMINGS 16
 #define EDID_STD_TIMINGS 8
 #define EDID_DETAILED_TIMINGS 4
-#define BITS_PER_LONG 64
 #define BIT_WORD(nr)             ((nr) / BITS_PER_LONG)
 #define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1)))
 #define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1)))

commit 3fcec1ad9c58694209e12f7234b9df1c812afd68
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:52:08 2018 +0800

    rockchip: dts: rk3128: update pwm-cell for pwm0
    
    The backlight pwm-cell is 3.
    
    Change-Id: I6fc913189a996f257fbe70194985e7d691fb3bd3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index fabb596fa3..e8ceb34b92 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -317,7 +317,7 @@
 	pwm0: pwm0@20050000 {
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050000 0x10>;
-		#pwm-cells = <2>;
+		#pwm-cells = <3>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm0_pin>;
 		clocks = <&cru PCLK_PWM>;

commit c85f17a61d8ffaff63ca627179af07b648b9677f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 15:48:47 2018 +0800

    Revert "rockchip: rk322x: speed up the emmc and the cpu."
    
    This reverts commit 4a872f4aa8369cafafa5dca780687b8552a7b5cb.
    rk3229 evb and echo can not work with ddr52 enable.
    
    Change-Id: Ia22b30ffe40de6f6e74e50ec5fd52e3715006de0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index c93609d5ce..a7999ca5af 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -11,11 +11,11 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(816 * MHz)
+#define APLL_HZ		(600 * MHz)
 #define GPLL_HZ		(594 * MHz)
 
-#define CORE_PERI_HZ	204000000
-#define CORE_ACLK_HZ	408000000
+#define CORE_PERI_HZ	150000000
+#define CORE_ACLK_HZ	300000000
 
 #define BUS_ACLK_HZ	148500000
 #define BUS_HCLK_HZ	148500000
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index a530c895a7..7155607e77 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -277,7 +277,6 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	}
 #endif
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
-	plat->cfg.host_caps |= MMC_MODE_DDR_52MHz;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;

commit 4fd3025541215e15d4771577b6650d8e707873dc
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 21 22:35:56 2017 +0100

    rockchip: remove duplicate CONFIG_ENV_SIZE definitions
    
    A few header files still have a definition of CONFIG_ENV_SIZE, causing
    warnings during buildman runs.  This removes the duplicate definitions
    from evb_px5.h, geekbox.h and rv1108_common.h.
    
    Change-Id: Icd605cebc96adaf3efcc59e6545cfb23633d29c0
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_px5.h b/include/configs/evb_px5.h
index d008539eb1..4160187d50 100644
--- a/include/configs/evb_px5.h
+++ b/include/configs/evb_px5.h
@@ -9,8 +9,6 @@
 
 #include <configs/rk3368_common.h>
 
-#define CONFIG_ENV_SIZE			0x2000
-
 #define CONFIG_CONSOLE_SCROLL_LINES	10
 
 #endif
diff --git a/include/configs/geekbox.h b/include/configs/geekbox.h
index 7a707cb2a0..bb2ef9a31b 100644
--- a/include/configs/geekbox.h
+++ b/include/configs/geekbox.h
@@ -9,8 +9,6 @@
 
 #include <configs/rk3368_common.h>
 
-#define CONFIG_ENV_SIZE			0x2000
-
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
 #endif

commit 27569069df68f1e7bfc3280ca85dd3f509906a13
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 10:39:11 2018 +0800

    rockchip: rk3328: sync defconfig after back port
    
    Change-Id: Ia1909ac6d477c1401cf229ebe57ffe343d411eb7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index d4a00718c5..2e85295af9 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -3,31 +3,27 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ROCKCHIP_RK3328=y
-CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3328/mk_fit_atf.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_TPL=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SERIAL_PRESENT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
@@ -69,18 +65,16 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
-CONFIG_DM_RESET=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
-CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

commit 21d68a455c31d040ade3c2ac7f432cf13062c05c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jan 16 09:31:09 2018 +0800

    rockchip: rk3399: update with save defconfig
    
    Change-Id: I070833a72b6b80ab903b8ee4f38093cb1dece3b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 32dd9bf697..a7b881cceb 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -10,12 +10,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
@@ -63,6 +64,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 3d90de90c6..f6b8a76aac 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -12,28 +12,20 @@ CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_SPL_ATF=y
-CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_FASTBOOT=y
-CONFIG_ANDROID_BOOTLOADER=y
-CONFIG_ANDROID_BOOT_IMAGE=y
-CONFIG_CMD_LOAD_ANDROID=y
-CONFIG_CMD_BOOT_ANDROID=y
 # CONFIG_CMD_IMLS is not set
-CONFIG_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
@@ -78,7 +70,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
@@ -87,6 +78,11 @@ CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
@@ -95,20 +91,3 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DUALSPEED=y
-CONFIG_USB_GADGET_VBUS_DRAW=0
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x18d1
-CONFIG_G_DNL_PRODUCT_NUM=0xd00d
-CONFIG_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
-CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
-CONFIG_CMD_USB_MASS_STORAGE=y

commit 74a0d3c69fca96de5a5ca49763fc5384163e15ac
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Jan 2 21:16:44 2018 +0100

    rockchip: firefly-rk3399: enable SPL_ATF_NO_PLATFORM_PARAM
    
    The Rockchip-released ATF for the Firefly apparently (i.e. Kever
    reported this) does not tolerate a FDT being passed as the platform
    parameter and will run into a hard stop.
    
    To work around this limitation in the ATF parameter handling, we
    enable SPL_ATF_NO_PLATFORM_PARAM (which will force passing NULL for
    the platform parameters).
    
    Note that this only affects this platform, as the ATF releases for the
    RK3368 and RK3399 have always either ignored the platform parameter
    (i.e. before the FDT-based parameters were supported) or support
    receiving a pointer to a FDT.
    
    Change-Id: I77c94b7cd073914c07419e0bad1fb199a53a0637
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 2fadc018ff..3d90de90c6 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -23,6 +23,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_FASTBOOT=y
 CONFIG_ANDROID_BOOTLOADER=y

commit 147f2cfcc53f39b81177c95c5b7c5094f08926b6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 15 18:21:17 2018 +0800

    rockchip: rk322x: update defconfig after back port
    
    update text base, update its file
    
    Change-Id: I58c8b2b1b6743dd1a50e6387be8a1238c97a9a42
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 32c52ca461..8c75cc4fdf 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -5,10 +5,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
-CONFIG_TPL_TEXT_BASE=0x10081004
+CONFIG_TPL_TEXT_BASE=0x10081000
 CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
@@ -19,14 +21,14 @@ CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
+CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_SPL_OPTEE=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index d0e7fda38a..2b3c4c23c3 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -25,9 +25,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x61800800
 #define CONFIG_SPL_TEXT_BASE		0x60000000
 
-#define CONFIG_TPL_STACK		0x10088000
-#define CONFIG_TPL_TEXT_BASE		0x10081004
-
 #define GICD_BASE                 	0x32011000
 #define GICC_BASE                  	0x32012000
 

commit 6d8fffad992f63449f225c4fd87e0f507a6bd48a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Jan 15 18:19:04 2018 +0800

    rockchip: rk3229: enable stimer in tpl
    
    Change-Id: Iaa4fd73d0ea43d1ff5149749b9a72876913072f4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
index 278e9d1d64..a10a7a170a 100644
--- a/arch/arm/mach-rockchip/rk322x-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c
@@ -24,13 +24,12 @@ u32 spl_boot_device(void)
 DECLARE_GLOBAL_DATA_PTR;
 
 #define GRF_BASE	0x11000000
-#define SGRF_BASE	0x10140000
-
-#define DEBUG_UART_BASE	0x11030000
+#define SECURE_TIMER_BASE	0x110d0020
+#define SGRF_DDR_CON0 0x10150000
 
 void board_debug_uart_init(void)
 {
-static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	static struct rk322x_grf * const grf = (void *)GRF_BASE;
 	/* Enable early UART2 channel 1 on the RK322x */
 	rk_clrsetreg(&grf->gpio1b_iomux,
 		     GPIO1B1_MASK | GPIO1B2_MASK,
@@ -42,7 +41,14 @@ static struct rk322x_grf * const grf = (void *)GRF_BASE;
 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 }
 
-#define SGRF_DDR_CON0 0x10150000
+void secure_timer_init(void)
+{
+	writel(0, SECURE_TIMER_BASE + 0x10);
+	writel(0xffffffff, SECURE_TIMER_BASE);
+	writel(0xffffffff, SECURE_TIMER_BASE + 4);
+	writel(1, SECURE_TIMER_BASE + 0x10);
+}
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *dev;
@@ -65,8 +71,9 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
+	secure_timer_init();
+	/* TODO: use arm generic timer instead for armv7 */
 	rockchip_timer_init();
-	printf("timer init done\n");
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);

commit 77159a9a962f225af0dd3a93734f9ab1fbb77ed2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jan 17 15:48:39 2018 +0800

    rockchip: inno-phy-usb2: update error to pr_err
    
    Change-Id: I31e321085c9435d11b1f5ba8295300036f1b550b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 1fa59c501a..248162e042 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -216,30 +216,30 @@ static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
 	}
 
 	if (!grf_base && !usbgrf_base) {
-		error("%s: get grf/usbgrf node failed\n", __func__);
+		pr_err("%s: get grf/usbgrf node failed\n", __func__);
 		return -EINVAL;
 	}
 
 	if (!ofnode_valid(u2phy_node)) {
-		error("%s: missing u2phy node\n", __func__);
+		pr_err("%s: missing u2phy node\n", __func__);
 		return -EINVAL;
 	}
 
 	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
-		error("%s: could not read reg from u2phy node\n", __func__);
+		pr_err("%s: could not read reg from u2phy node\n", __func__);
 		return -EINVAL;
 	}
 
 	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &udev);
 	if (ret) {
-		error("%s: get u2phy node failed: %d\n", __func__, ret);
+		pr_err("%s: get u2phy node failed: %d\n", __func__, ret);
 		return -ENODEV;
 	}
 
 	phy_cfgs =
 		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(udev);
 	if (!phy_cfgs) {
-		error("%s: unable to get phy_cfgs\n", __func__);
+		pr_err("%s: unable to get phy_cfgs\n", __func__);
 		return -EINVAL;
 	}
 
@@ -254,7 +254,7 @@ static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
 	}
 
 	if (!rphy->phy_cfg) {
-		error("%s: no phy-config can be matched\n", __func__);
+		pr_err("%s: no phy-config can be matched\n", __func__);
 		return -EINVAL;
 	}
 
@@ -336,7 +336,7 @@ int rockchip_chg_get_type(void)
 
 	ret = rockchip_usb2phy_parse(&rphy);
 	if (ret) {
-		error("%s: parse usb2phy failed %d\n", __func__, ret);
+		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
 		return ret;
 	}
 
@@ -429,7 +429,7 @@ void otg_phy_init(struct dwc2_udc *dev)
 
 	ret = rockchip_usb2phy_parse(&rphy);
 	if (ret) {
-		error("%s: parse usb2phy failed %d\n", __func__, ret);
+		pr_err("%s: parse usb2phy failed %d\n", __func__, ret);
 		return;
 	}
 

commit 099855e2922dab71b302dcd21a213f5b42127a95
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:22:42 2017 +0800

    spl: add support to booting with OP-TEE
    
    OP-TEE is an open source trusted OS, in armv7, its loading and
    running are like this:
    loading:
    - SPL load both OP-TEE and U-Boot
    running:
    - SPL run into OP-TEE in secure mode;
    - OP-TEE run into U-Boot in non-secure mode;
    
    More detail:
    https://github.com/OP-TEE/optee_os
    and search for 'boot arguments' for detail entry parameter in:
    core/arch/arm/kernel/generic_entry_a32.S
    
    Change-Id: I1344a35dd11bd69ca00e9b99909e1eb610648d86
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 32470d8ebee6a9c31a7a6b82704c486ef06cf549)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 5dfffcafb4..7aae826e16 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -738,6 +738,13 @@ config SPL_ATF_NO_PLATFORM_PARAM
 
 	  If your ATF is affected, say Y.
 
+config SPL_OPTEE
+	bool "Support OP-TEE Trusted OS"
+	depends on ARM
+	help
+	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
+	  More detail at: https://github.com/OP-TEE/optee_os
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 63db03b9bd..9918a2e6f1 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
-obj-$(CONFIG_$(SPL_TPL_)OPTEE_SUPPORT) += spl_optee.o
+obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl.c b/common/spl/spl.c
index b2bd7c91f6..ac2c6ca1a5 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -424,6 +424,13 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		spl_invoke_atf(&spl_image);
 		break;
 #endif
+#if CONFIG_IS_ENABLED(OPTEE)
+	case IH_OS_OP_TEE:
+		debug("Jumping to U-Boot via OP-TEE\n");
+		spl_optee_entry(NULL, NULL, (void *)spl_image.fdt_addr,
+				(void *)spl_image.entry_point);
+		break;
+#endif
 #ifdef CONFIG_SPL_OS_BOOT
 	case IH_OS_LINUX:
 		debug("Jumping to Linux\n");
@@ -438,6 +445,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
 	      gd->malloc_ptr / 1024);
 #endif
+
+	debug("loaded - jumping to U-Boot...\n");
 #ifdef CONFIG_BOOTSTAGE_STASH
 	int ret;
 
@@ -448,11 +457,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		debug("Failed to stash bootstage: err=%d\n", ret);
 #endif
 
-	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
-		debug("loaded - jumping to U-Boot via OP-TEE.\n");
-		spl_optee_entry(0, 0, 0, (void *)spl_image.entry_point);
-	}
-
 	debug("loaded - jumping to U-Boot...\n");
 	spl_board_prepare_for_boot();
 	jump_to_image_no_args(&spl_image);
diff --git a/include/spl.h b/include/spl.h
index b0a86f2b72..1475bb0e8c 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -278,10 +278,14 @@ void spl_invoke_atf(struct spl_image_info *spl_image);
 
 /**
  * spl_optee_entry - entry function for optee
- * entry arg0, pagestore
- * entry arg1, (ARMv7 standard bootarg #1)
- * entry arg2, device tree address, (ARMv7 standard bootarg #2)
- * entry arg3, non-secure entry address (ARMv7 bootarg #0)
+ *
+ * args defind in op-tee project
+ * https://github.com/OP-TEE/optee_os/
+ * core/arch/arm/kernel/generic_entry_a32.S
+ * @arg0: pagestore
+ * @arg1: (ARMv7 standard bootarg #1)
+ * @arg2: device tree address, (ARMv7 standard bootarg #2)
+ * @arg3: non-secure entry address (ARMv7 bootarg #0)
  */
 void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
 

commit 820a0a1278aae32fabbc01613cffadf46c8c90a2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 18 20:47:48 2017 +0800

    UPSTREAM: image: add os type for OP-TEE
    
    OP-TEE is an open source trust OS maintained here:
    https://github.com/OP-TEE/optee_os
    
    Series-changes: 2
    - Add new image type like ATF
    
    Change-Id: Idaae12027be1f8a3252d2f9ad2ee689b6dfcb3ad
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8f7658998ba3ba4338344cee1d235bf090a1dd94)

diff --git a/common/image.c b/common/image.c
index af8ba7312a..3667e86857 100644
--- a/common/image.c
+++ b/common/image.c
@@ -91,6 +91,7 @@ static const table_entry_t uimage_arch[] = {
 
 static const table_entry_t uimage_os[] = {
 	{	IH_OS_INVALID,	"invalid",	"Invalid OS",		},
+	{       IH_OS_OP_TEE, "op-tee", "OP-TEE"  },
 	{       IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware"  },
 	{	IH_OS_LINUX,	"linux",	"Linux",		},
 #if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC)
diff --git a/include/image.h b/include/image.h
index b9e43ad45c..29fdf9c13b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -153,6 +153,7 @@ enum {
 	IH_OS_PLAN9,			/* Plan 9	*/
 	IH_OS_OPENRTOS,		/* OpenRTOS	*/
 	IH_OS_ARM_TRUSTED_FIRMWARE,     /* ARM Trusted Firmware */
+	IH_OS_OP_TEE,			/* OP-TEE	*/
 
 	IH_OS_COUNT,
 };

commit 4bba5ee7dc8aa93036e61f882901ca800c004b7c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Jan 2 21:16:43 2018 +0100

    spl: atf: add SPL_ATF_NO_PLATFORM_PARAM option
    
    While we expect to call a pointer to a valid FDT (or NULL) as the
    platform parameter to an ATF, some ATF versions are not U-Boot aware
    and have an insufficiently robust (or an overzealour) parameter
    validation: either way, this may cause a hard-stop with uncooperative
    ATF versions.
    
    This change adds the option to suppress passing a platform parameter
    and will always pass NULL.
    
    Debug output from ATF w/ this option disabled (i.e. default):
          INFO:    plat_param_from_bl2: 0x291450
    Debug output from ATF w/ this option enabled:
          INFO:    plat_param_from_bl2: 0
    
    Change-Id: Ic13bf77aa509407563d10ad3ce790087f2d1dc07
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d21fb63d772d32373600abeb7afcb53033e087a7)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index d007c50341..5dfffcafb4 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -713,8 +713,8 @@ config SPL_ATF
 	bool "Support ARM Trusted Firmware"
 	depends on ARM64
 	help
-	  ATF(ARM Trusted Firmware) is a component for ARM arch64 which
-	  is loaded by SPL(which is considered as BL2 in ATF terminology).
+	  ATF(ARM Trusted Firmware) is a component for ARM AArch64 which
+	  is loaded by SPL (which is considered as BL2 in ATF terminology).
 	  More detail at: https://github.com/ARM-software/arm-trusted-firmware
 
 config SPL_OPTEE_SUPPORT
@@ -724,6 +724,20 @@ config SPL_OPTEE_SUPPORT
 	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
 	  More detail at: https://github.com/OP-TEE/optee_os
 
+config SPL_ATF_NO_PLATFORM_PARAM
+        bool "Pass no platform parameter"
+	depends on SPL_ATF
+	help
+	  While we expect to call a pointer to a valid FDT (or NULL)
+	  as the platform parameter to an ATF, some ATF versions are
+	  not U-Boot aware and have an insufficiently robust parameter
+	  validation to gracefully reject a FDT being passed.
+
+	  If this option is enabled, the spl_atf os-type handler will
+	  always pass NULL for the platform parameter.
+
+	  If your ATF is affected, say Y.
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index eaea95455f..5f9aa95e30 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -145,6 +145,7 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 {
 	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
 	void *blob = spl_image->fdt_addr;
+	uintptr_t platform_param = (uintptr_t)blob;
 	int node;
 
 	/*
@@ -158,9 +159,18 @@ void spl_invoke_atf(struct spl_image_info *spl_image)
 	if (node >= 0)
 		bl33_entry = spl_fit_images_get_entry(blob, node);
 
+	/*
+	 * If ATF_NO_PLATFORM_PARAM is set, we override the platform
+	 * parameter and always pass 0.  This is a workaround for
+	 * older ATF versions that have insufficiently robust (or
+	 * overzealous) argument validation.
+	 */
+	if (CONFIG_IS_ENABLED(ATF_NO_PLATFORM_PARAM))
+		platform_param = 0;
+
 	/*
 	 * We don't provide a BL3-2 entry yet, but this will be possible
 	 * using similar logic.
 	 */
-	bl31_entry(spl_image->entry_point, bl33_entry, (uintptr_t)blob);
+	bl31_entry(spl_image->entry_point, bl33_entry, platform_param);
 }

commit feba3cdb1a3c214a908dc71e115a52d14fdc671f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Jan 2 18:43:37 2018 +0100

    UPSTREAM: rockchip: board: lion-rk3368: reduce env-size default to 8KiB
    
    We want to have the same configuration defaults for the RK3368-uQ7
    as for the RK3399-Q7: this change reduces the default env-size to
    8KiB to ensure that it does not overlap the boot-payload on SD/MMC
    configurations.
    
    References: commit fe529e6597c0 ("rockchip: rk3399-puma: reduce env size to 8kiB")
    Change-Id: Ia3fcfb0fed8422017cca7cb8c9d1e12025598c8c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 224d261a16435389cc349b0e1640d489f117189d)

diff --git a/board/theobroma-systems/lion_rk3368/Kconfig b/board/theobroma-systems/lion_rk3368/Kconfig
index d7aa487abd..fddbf826df 100644
--- a/board/theobroma-systems/lion_rk3368/Kconfig
+++ b/board/theobroma-systems/lion_rk3368/Kconfig
@@ -12,4 +12,10 @@ config SYS_CONFIG_NAME
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 
+config ENV_SIZE
+	default 0x2000
+
+config ENV_OFFSET
+	default 0x3c000 if ENV_IS_IN_SPI_FLASH
+
 endif

commit 843aa190cbd9b42cdd4d30b98232fe033b255ec1
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Dec 24 13:14:12 2017 +0100

    UPSTREAM: dm: core: remove orphaned parameter description in platdata.h
    
    struct driver_info has no field 'flags'.
    
    Change-Id: Icedd7ae9bbb6fb62ce6a0d754d740c95f0eb0070
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5da3b3d10497fdd7a5655d3872286610fe8489ed)

diff --git a/include/dm/platdata.h b/include/dm/platdata.h
index 488b2ab0ae..b73aa33093 100644
--- a/include/dm/platdata.h
+++ b/include/dm/platdata.h
@@ -23,7 +23,6 @@
  * @name:	Driver name
  * @platdata:	Driver-specific platform data
  * @platdata_size: Size of platform data structure
- * @flags:	Platform data flags (DM_FLAG_...)
  */
 struct driver_info {
 	const char *name;

commit 2b00ccbd41e0d8207e205b334b6092c6a67c8502
Author: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Date:   Thu Dec 21 11:03:01 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: reduce env size to 8kiB
    
    This commit changes the size of the enviroment (for the RK3399-Q7) to
    8kiB for all possible locations of the environment (i.e. even when the
    environment is saved to SD card).
    
    With the default of 32kiB, the environment overwrites the SPL
    stage which lives at 16kiB.
    
    Change-Id: Iafe513fc093669b51d108641c435c406a654c62b
    Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    [Reworked commit-message:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fe529e6597c00a98893e5d0ab00251cb50d457a7)

diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig
index 80b3460d4c..8a94cbd9ed 100644
--- a/board/theobroma-systems/puma_rk3399/Kconfig
+++ b/board/theobroma-systems/puma_rk3399/Kconfig
@@ -13,7 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 
 config ENV_SIZE
-	default 0x2000 if ENV_IS_IN_SPI_FLASH
+	default 0x2000
 
 config ENV_OFFSET
 	default 0x3c000 if ENV_IS_IN_SPI_FLASH

commit 92671781a674b7dc8dc7b3a0f1770d6fb974d4fe
Author: Peng Fan <peng.fan@nxp.com>
Date:   Mon Dec 4 12:31:20 2017 +0800

    UPSTREAM: power: pmic.h: include dm/ofnode.h
    
    Include dm/ofnode.h.
    
    Change-Id: I44d76be779c10e354d012e46c591425bf0cb9a60
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Cc: Stefano Babic <sbabic@denx.de>
    Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d56f6ca288c588b6a17edf7a4952e1bc3b56220c)

diff --git a/include/power/pmic.h b/include/power/pmic.h
index 980fd3e67d..8ba9809f03 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -11,6 +11,7 @@
 #ifndef __CORE_PMIC_H_
 #define __CORE_PMIC_H_
 
+#include <dm/ofnode.h>
 #include <i2c.h>
 #include <linux/list.h>
 #include <power/power_chrg.h>

commit 0e13c182e0b4ee5b7e5efee72614cd23f8a5e6fc
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Dec 4 12:37:00 2017 +0900

    Move CONFIG_PANIC_HANG to Kconfig
    
    Freescale (NXP) boards have lots of defconfig files per board.
    I used "imply PANIC_HANG" for them.
    
    Change-Id: I56347810ee33ccd8bb3553b0ee95b858e827ce9b
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7e3caa81e0e9cc5e2beed4a3a1c334e2119f4498)

diff --git a/README b/README
index 9e90867255..fbb76cc307 100644
--- a/README
+++ b/README
@@ -2247,16 +2247,6 @@ The following options need to be configured:
 		currently only supports clearing the memory.
 
 - Error Recovery:
-		CONFIG_PANIC_HANG
-
-		Define this variable to stop the system in case of a
-		fatal error, so that you have to reset it manually.
-		This is probably NOT a good idea for an embedded
-		system where you want the system to reboot
-		automatically as fast as possible, but it may be
-		useful during development since you can try to debug
-		the conditions that lead to the situation.
-
 		CONFIG_NET_RETRY_COUNT
 
 		This variable defines the number of retries for
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index cdeef26fe5..5a63d92f0e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -7,6 +7,7 @@ config ARCH_LS1012A
 	select SYS_FSL_ERRATUM_A010315
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
+	imply PANIC_HANG
 
 config ARCH_LS1043A
 	bool
@@ -82,6 +83,7 @@ config ARCH_LS2080A
 	select SYS_FSL_ERRATUM_A009203
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
+	imply PANIC_HANG
 
 config FSL_LSCH2
 	bool
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 92187d371b..9de4e04598 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -29,6 +29,7 @@ config TARGET_B4420QDS
 	select ARCH_B4420
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_B4860QDS
 	bool "Support B4860QDS"
@@ -36,6 +37,7 @@ config TARGET_B4860QDS
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_BSC9131RDB
 	bool "Support BSC9131RDB"
@@ -57,6 +59,7 @@ config TARGET_C29XPCIE
 	select SUPPORT_SPL
 	select SUPPORT_TPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_P3041DS
 	bool "Support P3041DS"
@@ -64,6 +67,7 @@ config TARGET_P3041DS
 	select ARCH_P3041
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P4080DS
 	bool "Support P4080DS"
@@ -71,6 +75,7 @@ config TARGET_P4080DS
 	select ARCH_P4080
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P5020DS
 	bool "Support P5020DS"
@@ -78,6 +83,7 @@ config TARGET_P5020DS
 	select ARCH_P5020
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P5040DS
 	bool "Support P5040DS"
@@ -85,6 +91,7 @@ config TARGET_P5040DS
 	select ARCH_P5040
 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_MPC8536DS
 	bool "Support MPC8536DS"
@@ -100,6 +107,7 @@ config TARGET_MPC8541CDS
 config TARGET_MPC8544DS
 	bool "Support MPC8544DS"
 	select ARCH_MPC8544
+	imply PANIC_HANG
 
 config TARGET_MPC8548CDS
 	bool "Support MPC8548CDS"
@@ -123,6 +131,7 @@ config TARGET_MPC8572DS
 # Use DDR3 controller with DDR2 DIMMs on this board
 	select SYS_FSL_DDRC_GEN3
 	imply SCSI
+	imply PANIC_HANG
 
 config TARGET_P1010RDB_PA
 	bool "Support P1010RDB_PA"
@@ -132,6 +141,7 @@ config TARGET_P1010RDB_PA
 	select SUPPORT_TPL
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1010RDB_PB
 	bool "Support P1010RDB_PB"
@@ -141,6 +151,7 @@ config TARGET_P1010RDB_PB
 	select SUPPORT_TPL
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1022DS
 	bool "Support P1022DS"
@@ -153,6 +164,7 @@ config TARGET_P1023RDB
 	bool "Support P1023RDB"
 	select ARCH_P1023
 	imply CMD_EEPROM
+	imply PANIC_HANG
 
 config TARGET_P1020MBG
 	bool "Support P1020MBG-PC"
@@ -161,6 +173,7 @@ config TARGET_P1020MBG
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1020RDB_PC
 	bool "Support P1020RDB-PC"
@@ -169,6 +182,7 @@ config TARGET_P1020RDB_PC
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1020RDB_PD
 	bool "Support P1020RDB-PD"
@@ -177,6 +191,7 @@ config TARGET_P1020RDB_PD
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1020UTM
 	bool "Support P1020UTM"
@@ -185,6 +200,7 @@ config TARGET_P1020UTM
 	select ARCH_P1020
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1021RDB
 	bool "Support P1021RDB"
@@ -193,6 +209,7 @@ config TARGET_P1021RDB
 	select ARCH_P1021
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1024RDB
 	bool "Support P1024RDB"
@@ -201,6 +218,7 @@ config TARGET_P1024RDB
 	select ARCH_P1024
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_P1025RDB
 	bool "Support P1025RDB"
@@ -250,6 +268,7 @@ config TARGET_T1023RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_EEPROM
+	imply PANIC_HANG
 
 config TARGET_T1024RDB
 	bool "Support T1024RDB"
@@ -258,6 +277,7 @@ config TARGET_T1024RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_EEPROM
+	imply PANIC_HANG
 
 config TARGET_T1040QDS
 	bool "Support T1040QDS"
@@ -266,6 +286,7 @@ config TARGET_T1040QDS
 	select PHYS_64BIT
 	imply CMD_EEPROM
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1040RDB
 	bool "Support T1040RDB"
@@ -274,6 +295,7 @@ config TARGET_T1040RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1040D4RDB
 	bool "Support T1040D4RDB"
@@ -282,6 +304,7 @@ config TARGET_T1040D4RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1042RDB
 	bool "Support T1042RDB"
@@ -298,6 +321,7 @@ config TARGET_T1042D4RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T1042RDB_PI
 	bool "Support T1042RDB_PI"
@@ -306,6 +330,7 @@ config TARGET_T1042RDB_PI
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T2080QDS
 	bool "Support T2080QDS"
@@ -322,6 +347,7 @@ config TARGET_T2080RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T2081QDS
 	bool "Support T2081QDS"
@@ -336,12 +362,14 @@ config TARGET_T4160QDS
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T4160RDB
 	bool "Support T4160RDB"
 	select ARCH_T4160
 	select SUPPORT_SPL
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_T4240QDS
 	bool "Support T4240QDS"
@@ -350,6 +378,7 @@ config TARGET_T4240QDS
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_T4240RDB
 	bool "Support T4240RDB"
@@ -357,6 +386,7 @@ config TARGET_T4240RDB
 	select SUPPORT_SPL
 	select PHYS_64BIT
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_CONTROLCENTERD
 	bool "Support controlcenterd"
@@ -387,16 +417,19 @@ config TARGET_UCP1020
 	bool "Support uCP1020"
 	select ARCH_P1020
 	imply CMD_SATA
+	imply PANIC_HANG
 
 config TARGET_CYRUS_P5020
 	bool "Support Varisys Cyrus P5020"
 	select ARCH_P5020
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 config TARGET_CYRUS_P5040
 	 bool "Support Varisys Cyrus P5040"
 	select ARCH_P5040
 	select PHYS_64BIT
+	imply PANIC_HANG
 
 endchoice
 
diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index db60380fff..3389f9a63b 100644
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -31,4 +31,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig
index 968186ffda..ac949f7b6a 100644
--- a/configs/UCP1020_SPIFLASH_defconfig
+++ b/configs/UCP1020_SPIFLASH_defconfig
@@ -42,4 +42,5 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_FS_CRAMFS=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 5feae26e66..4b81cb437f 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -42,4 +42,5 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_FS_CRAMFS=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index 9e1e5ecb47..30a1a0ae32 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -27,3 +27,4 @@ CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_TIMER=y
 CONFIG_AE3XX_TIMER=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index e653bd4c9c..9540eb91f9 100644
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -25,4 +25,5 @@ CONFIG_DOS_PARTITION=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig
index 1a0748913a..d7313ee948 100644
--- a/configs/tricorder_defconfig
+++ b/configs/tricorder_defconfig
@@ -37,4 +37,5 @@ CONFIG_LED_STATUS_CMD=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
 CONFIG_BCH=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig
index dba3b1d743..fe1994bb56 100644
--- a/configs/tricorder_flash_defconfig
+++ b/configs/tricorder_flash_defconfig
@@ -36,4 +36,5 @@ CONFIG_LED_STATUS_CMD=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SYS_NS16550=y
 CONFIG_BCH=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 16fbe8adc5..d847a6827a 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -47,3 +47,4 @@ CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig
index c242776d9c..61a834944c 100644
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -46,3 +46,4 @@ CONFIG_SPL_NAND_DENALI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index f4f2ca0629..ca8a50017b 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -45,3 +45,4 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig
index d714c674f7..964ac491c1 100644
--- a/configs/xpedite517x_defconfig
+++ b/configs/xpedite517x_defconfig
@@ -26,4 +26,5 @@ CONFIG_DS4510=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig
index b04063ae32..87d75d663a 100644
--- a/configs/xpedite520x_defconfig
+++ b/configs/xpedite520x_defconfig
@@ -27,4 +27,5 @@ CONFIG_CMD_PCA953X=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index 657fdcc7fd..19a9c7079c 100644
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -29,4 +29,5 @@ CONFIG_DS4510=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig
index 1e132177fc..0b10acd283 100644
--- a/configs/xpedite550x_defconfig
+++ b/configs/xpedite550x_defconfig
@@ -29,4 +29,5 @@ CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
+CONFIG_PANIC_HANG=y
 CONFIG_OF_LIBFDT=y
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 661bc8bf58..b1b672547b 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -173,7 +173,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index d6982d31a9..5f644a0b18 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -118,7 +118,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000
 #define CONFIG_SYS_MEMTEST_END		0x00400000
-#define CONFIG_PANIC_HANG
 
 /* DDR Setup */
 #define CONFIG_DDR_SPD
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 3319a6f958..ad339f1cb4 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -69,7 +69,6 @@
 
 #define CONFIG_SYS_MEMTEST_START 0x00010000	/* skip exception vectors */
 #define CONFIG_SYS_MEMTEST_END   0x1f000000	/* skip u-boot at top of RAM */
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  * Config the L2 Cache as L2 SRAM
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 2aea8928ee..8b8e1f51f6 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -46,7 +46,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index b277cdb1c6..634a9e1f82 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -58,7 +58,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x7fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  * Config the L2 Cache as L2 SRAM
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 13edd0ac9c..45b302e768 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -216,7 +216,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG		/* do not reset board on panic */
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index 1b78a4f5dc..17ae6cfd40 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -52,8 +52,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_MEMTEST_START	0x01000000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x02000000
 
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
-
 /* Implement conversion of addresses in the LBC */
 #define CONFIG_SYS_LBC_LBCR		0x00000000
 #define CONFIG_SYS_LBC_LCRR		LCRR_CLKDIV_8
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 600823798c..7e3a9f1076 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -116,7 +116,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 158ad69c41..87ce2e8524 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -196,7 +196,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index fbb58f9ffa..7296d34803 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -219,7 +219,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index f6547fd5e5..3db7a2a462 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -127,7 +127,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index f472c3c97b..0eeb5f68ee 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -226,7 +226,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 625130aafc..ad192fec8a 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -96,7 +96,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 902abc48ce..a526f83a6d 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -138,7 +138,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
index f47e45b433..f9daf313c5 100644
--- a/include/configs/adp-ae3xx.h
+++ b/include/configs/adp-ae3xx.h
@@ -21,7 +21,6 @@
 #define CONFIG_SKIP_TRUNOFF_WATCHDOG
 
 #define CONFIG_CMDLINE_EDITING
-#define CONFIG_PANIC_HANG
 
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 0dbf149725..a463235b38 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -128,7 +128,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 13e7c71609..4ce6681066 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -89,7 +89,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 096799eb64..2b94cdf258 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -112,7 +112,6 @@
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
-#define CONFIG_PANIC_HANG
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
 #include <asm/arch/soc.h>
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index f8978693a4..ea74f4a2d1 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -221,8 +221,6 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
-
 #define CONFIG_SPL_BSS_START_ADDR	0x80100000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x00100000
 #define CONFIG_SPL_FRAMEWORK
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 3c85f534e8..537a6ba196 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -295,7 +295,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 5a3245c473..6bc9bdc58b 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -71,7 +71,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index eb4cfae928..8b78f084e9 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -31,7 +31,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /* Needed to fill the ccsrbar pointer */
 
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 4938f43985..47b78a248b 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -54,7 +54,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 46bb6f445e..b6574eaa52 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -103,7 +103,6 @@
 
 
 /* hang() the board on panic() */
-#define CONFIG_PANIC_HANG
 
 /* environment placement (for NAND), is different for FLASHCARD but does not
  * harm there */
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 1d3bf987c0..6de8129e0b 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -231,8 +231,6 @@
 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
 #define CONFIG_SYS_MEM_TOP_HIDE		64
 
-#define CONFIG_PANIC_HANG
-
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
 
 /* only for SPL */
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index beedc9eda8..4326984b06 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -487,7 +487,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
 #define CONFIG_CMDLINE_EDITING	1		/* Command-line editing */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index f589d1db9b..5a56162e7c 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -291,7 +291,6 @@
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index d217eb3c7d..b26223794e 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -341,7 +341,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index b433224041..c2ef26749a 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -340,7 +340,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index 3050f17b81..3119f00797 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -130,10 +130,6 @@
 #define CONFIG_MX_CYCLIC
 #define CONFIG_SHOW_BOOT_PROGRESS
 
-#ifdef DEBUG
-#define CONFIG_PANIC_HANG		1	/* Require manual reboot */
-#endif
-
 
 /*=========================================*/
 /* FPGA Registers (board info and control) */
diff --git a/lib/Kconfig b/lib/Kconfig
index a9ce9fc82b..78e44aca0c 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -45,6 +45,16 @@ config USE_TINY_PRINTF
 
 	  The supported format specifiers are %c, %s, %u/%d and %x.
 
+config PANIC_HANG
+	bool "Do not reset the system on fatal error"
+	help
+	  Define this option to stop the system in case of a fatal error,
+	  so that you have to reset it manually. This is probably NOT a good
+	  idea for an embedded system where you want the system to reboot
+	  automatically as fast as possible, but it may be useful during
+	  development since you can try to debug the conditions that lead to
+	  the situation.
+
 config REGEX
 	bool "Enable regular expression support"
 	default y if NET

commit ce176305937686128422a7e8a4f64ee347d10cd5
Author: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Date:   Thu Nov 23 16:51:41 2017 +0530

    UPSTREAM: arm: Add support of updating dts before fix-up
    
    "ethernet" node fix-up for device tree happens before Linux boot.
    
    There can be requirement of updating "ethernet" node even before
    fix-up. So, add support of updating "ethernet" node.
    
    Change-Id: I5fcde8776f7f0f5c7323b1340c69d346c9c01833
    Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6bedf44714a145e09fddb8c5a03ada210b812ec9)

diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index eaa817b9ac..fcc2a0e214 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -25,6 +25,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_FMAN_ENET
+__weak int fdt_update_ethernet_dt(void *blob)
+{
+	return 0;
+}
+#endif
+
 int arch_fixup_fdt(void *blob)
 {
 	int ret = 0;
@@ -64,5 +71,10 @@ int arch_fixup_fdt(void *blob)
 #endif
 #endif
 
+#ifdef CONFIG_FMAN_ENET
+	ret = fdt_update_ethernet_dt(blob);
+	if (ret)
+		return ret;
+#endif
 	return 0;
 }
diff --git a/include/fdt_support.h b/include/fdt_support.h
index e0f908636c..f00fadcddb 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -290,4 +290,7 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto);
 int fdtdec_get_int(const void *blob, int node, const char *prop_name,
 		int default_val);
 #endif
+#ifdef CONFIG_FMAN_ENET
+int fdt_update_ethernet_dt(void *blob);
+#endif
 #endif /* ifndef __FDT_SUPPORT_H */

commit 1ae99f24945cb357ac4793a3177f26cea7655435
Author: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Date:   Thu Nov 23 16:51:32 2017 +0530

    UPSTREAM: common: Fix-up MAC addr in dts by fetching env variable serially
    
    The MAC addresses get fixed in the device tree for "ethernet" nodes
    is by using trailing number behind "ethernet" found in "/aliases".
    It may not be necessary for the "ethernet" nodes to be sequential.
    There can be gaps in between or any node disabled
    
    So provide a support to fetch MAC addr sequentially from env
    and apply them to "ethernet" nodes in the order they appear in
    device tree only if "ethernet" is not "disabled"
    
    Change-Id: I1bd6544a2bfe5cd5d6708e249c1e07d44d6944d2
    Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 24acb83d8f04e9a49f161c07d38da50c70e9f16d)

diff --git a/README b/README
index abf6136746..9e90867255 100644
--- a/README
+++ b/README
@@ -1673,6 +1673,15 @@ The following options need to be configured:
 
 		See doc/README.link-local for more information.
 
+ - MAC address from environment variables
+
+		FDT_SEQ_MACADDR_FROM_ENV
+
+		Fix-up device tree with MAC addresses fetched sequentially from
+		environment variables. This config work on assumption that
+		non-usable ethernet node of device-tree are either not present
+		or their status has been marked as "disabled".
+
  - CDP Options:
 		CONFIG_CDP_DEVICE_ID
 
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 1a8ae95cc7..b9dfba7519 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -534,12 +534,16 @@ int fdt_fixup_memory(void *blob, u64 start, u64 size)
 
 void fdt_fixup_ethernet(void *fdt)
 {
-	int i, j, prop;
+	int i = 0, j, prop;
 	char *tmp, *end;
 	char mac[16];
 	const char *path;
 	unsigned char mac_addr[ARP_HLEN];
 	int offset;
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+	int nodeoff;
+	const struct fdt_property *fdt_prop;
+#endif
 
 	if (fdt_path_offset(fdt, "/aliases") < 0)
 		return;
@@ -552,7 +556,7 @@ void fdt_fixup_ethernet(void *fdt)
 		offset = fdt_first_property_offset(fdt,
 			fdt_path_offset(fdt, "/aliases"));
 		/* Select property number 'prop' */
-		for (i = 0; i < prop; i++)
+		for (j = 0; j < prop; j++)
 			offset = fdt_next_property_offset(fdt, offset);
 
 		if (offset < 0)
@@ -561,11 +565,16 @@ void fdt_fixup_ethernet(void *fdt)
 		path = fdt_getprop_by_offset(fdt, offset, &name, NULL);
 		if (!strncmp(name, "ethernet", 8)) {
 			/* Treat plain "ethernet" same as "ethernet0". */
-			if (!strcmp(name, "ethernet"))
+			if (!strcmp(name, "ethernet")
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+			 || !strcmp(name, "ethernet0")
+#endif
+			)
 				i = 0;
+#ifndef FDT_SEQ_MACADDR_FROM_ENV
 			else
 				i = trailing_strtol(name);
-
+#endif
 			if (i != -1) {
 				if (i == 0)
 					strcpy(mac, "ethaddr");
@@ -574,6 +583,14 @@ void fdt_fixup_ethernet(void *fdt)
 			} else {
 				continue;
 			}
+#ifdef FDT_SEQ_MACADDR_FROM_ENV
+			nodeoff = fdt_path_offset(fdt, path);
+			fdt_prop = fdt_get_property(fdt, nodeoff, "status",
+						    NULL);
+			if (fdt_prop && !strcmp(fdt_prop->data, "disabled"))
+				continue;
+			i++;
+#endif
 			tmp = env_get(mac);
 			if (!tmp)
 				continue;

commit bff05d39adf8c4eb325a79ede9e6bc6e6d7794aa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 15 11:15:04 2017 +0800

    rockchip: firefly-rk3399: update fit source
    
    use pythone script
    
    Change-Id: Ia09eef20b24bf936d02a7bdf0835023d1943009e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index bfdd0cf25e..2fadc018ff 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -10,7 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000

commit b287022126737edfdc32ce1dc58bccd206888cfa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 18 15:13:19 2017 +0800

    UPSTREAM: rockchip: update ROCKCHIP_SPL_RESERVE_IRAM to 0
    
    Only rk3399 atf need ROCKCHIP_SPL_RESERVE_IRAM. This commit updates
    its default setting to 0 so that other SoCs do not need to define it.
    
    Change-Id: I40e453451d5376ce15aede0859a7e5b336220094
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8a8106f06639314f750c9f8dc2b72df3925f7fbf)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index cb80f26ac3..a1554af647 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -248,7 +248,7 @@ config ROCKCHIP_BOOT_MODE_REG
 
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
-	default 0x4000
+	default 0
 	help
 	  SPL may need reserve memory for firmware loaded by SPL, whose load
 	  address is in IRAM and may overlay with SPL text area if not
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 4557c2b032..32dd9bf697 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 979f6e303f..bfdd0cf25e 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y

commit 9d33a67d51255c16e34ff9ac2d4d7fbe78d827d3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 18 15:05:41 2017 +0800

    UPSTREAM: rockchip: update boot0 hook
    
    Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not
    need it.
    
    The very beginning of U-Boot proper is different between armv7 and armv8:
    armv7 start with ARM_VECTORS while armv8 start with 'b reset'.
    
    Here is the map of very beginning for all cases:
    armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
    armv7 U-Boot: ARM_VECTORS
    armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
    armv8 U-Boot: 'b reset'
    
    Change-Id: I433ccd2e09f32fa3f1892953d67650a99dac39bc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 270288544e12c7c98e4bc9a5b121517ba0a959d2)

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index af3a733e98..5d35c35c28 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -39,7 +39,12 @@
 entry_counter:
 	.word   0
 #endif
+
+#if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
+	/* U-Boot proper of armv7 do not need this */
 	b reset
+#endif
+
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
@@ -50,6 +55,6 @@ _start:
 	ARM_VECTORS
 #endif
 
-#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
 	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
 #endif

commit 82c369d0de21ddb7646468b76e3de51a1214aa9b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 5 17:25:05 2018 +0800

    Revert "rockchip: update boot0 hook"
    
    This reverts commit 7a4d1b540601cf674de4f85400b71859f689c9b3.
    
    Change-Id: I6f2f5ac92b83129a816a409f669c4ceb2c36b64b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 65b4213231..af3a733e98 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -26,6 +26,7 @@
 	 */
 	b 1f	 /* if overwritten, entry-address is at the next word */
 1:
+#endif
 #if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
 	adr     r3, entry_counter
 	ldr	r0, [r3]
@@ -39,15 +40,6 @@ entry_counter:
 	.word   0
 #endif
 	b reset
-
-#if defined(CONFIG_ROCKCHIP_RK3399)
-	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
-#endif
-
-#elif defined(CONFIG_ARM64) /* U-Boot for arm64 */
-	b reset
-#endif
-
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
@@ -57,3 +49,7 @@ entry_counter:
 _start:
 	ARM_VECTORS
 #endif
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
+#endif

commit 8820f8d05bbaf1713c4f5904e2a8326e19fd711b
Author: Stephen Warren <swarren@nvidia.com>
Date:   Fri Nov 10 11:59:15 2017 +0100

    UPSTREAM: test/py: Setup variables based on HUSH selection
    
    After adding our small zynq uboot which has hush parser off same
    variable tests start to failed. Use quotes only when hush is enabled.
    
    Change-Id: I9aee385346129dee480aa04aa68f420aa172aaa7
    Reported-by: Michal Simek <michal.simek@xilinx.com>
    Signed-off-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3e229a83bd4190f99731992d3a56983f29313899)

diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py
index b7f960c755..f8694017b4 100644
--- a/test/py/tests/test_env.py
+++ b/test/py/tests/test_env.py
@@ -125,7 +125,16 @@ def set_var(state_test_env, var, value):
         Nothing.
     """
 
-    state_test_env.u_boot_console.run_command('setenv %s "%s"' % (var, value))
+    bc = state_test_env.u_boot_console.config.buildconfig
+    if bc.get('config_hush_parser', None):
+        quote = '"'
+    else:
+        quote = ''
+        if ' ' in value:
+            pytest.skip('Space in variable value on non-Hush shell')
+
+    state_test_env.u_boot_console.run_command(
+        'setenv %s %s%s%s' % (var, quote, value, quote))
     state_test_env.env[var] = value
 
 def validate_empty(state_test_env, var):

commit 49a2ef1590e0031344e530783960938494572f36
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Dec 11 17:56:08 2017 +0100

    UPSTREAM: rockchip: move CONFIG_ENV_SIZE and CONFIG_ENV_OFFSET to Kconfig
    
    This commit adds ENV_SIZE and ENV_OFFSET configuration items for
    ARCH_ROCKCHIP, but keeps these non-visible (i.e. not prompt is given).
    With these new items present, the configuration from the header files
    is moved to Kconfig.
    
    Keeping these non-visible is necessary to have the possibility to
    select new default values if CONFIG_IS_IN_* is changed (interactively
    or with oldconfig). Otherwise it will always be set to a previous
    value if used with a prompt.  As an example if we do a defconfig with
    CONFIG_IS_IN_MMC and change it to CONFIG_IS_IN_SPI_FLASH via
    menuconfig, ENV_SIZE and ENV_OFFSET will not be changed to the correct
    values as defconfig will already have set them to the default values
    of CONFIG_IS_IN_MMC in .config.
    
    Change-Id: I72dcb184406523a3a846322fd58ee7b9669d3390
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 81f53b0dafdfe9458f6d04fc5ec2732c2ea23a71)

diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig
index a645590d78..80b3460d4c 100644
--- a/board/theobroma-systems/puma_rk3399/Kconfig
+++ b/board/theobroma-systems/puma_rk3399/Kconfig
@@ -12,4 +12,10 @@ config SYS_CONFIG_NAME
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 
+config ENV_SIZE
+	default 0x2000 if ENV_IS_IN_SPI_FLASH
+
+config ENV_OFFSET
+	default 0x3c000 if ENV_IS_IN_SPI_FLASH
+
 endif
diff --git a/env/Kconfig b/env/Kconfig
index 25555ec2b8..9de5cae083 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -435,4 +435,22 @@ config ENV_UBI_VOLUME
 
 endif
 
+if ARCH_ROCKCHIP
+
+config ENV_OFFSET
+	hex
+	depends on !ENV_IS_IN_UBI
+	depends on !ENV_IS_NOWHERE
+	default 0x3f8000
+	help
+	  Offset from the start of the device (or partition)
+
+config ENV_SIZE
+	hex
+	default 0x8000
+	help
+	  Size of the environment storage area
+
+endif
+
 endmenu
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index 949f7568ba..0491299dc7 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -9,14 +9,6 @@
 
 #include <configs/rk3399_common.h>
 
-/*
- * SPL @ 32kB for ~130kB
- * ENV @ 240KB for 8kB
- * FIT payload (ATF, U-Boot, FDT) @ 256kB
- */
-#undef CONFIG_ENV_OFFSET
-#define CONFIG_ENV_OFFSET (240 * 1024)
-
 #if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_SYS_MMC_ENV_DEV 1
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 7c341ec9b2..8b892271e9 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -84,12 +84,6 @@
 
 #endif
 
-/*
- * Rockchip SoCs use fixed ENV 32KB@(4MB-32KB)
- */
-#define CONFIG_ENV_OFFSET	(SZ_4M - SZ_32K)
-#define CONFIG_ENV_SIZE		SZ_32K
-
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 
 #endif /* _ROCKCHIP_COMMON_H_ */

commit 83c6e7dea9b717bbfbeafad05a0f4174ed5a4571
Author: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Date:   Fri Dec 15 16:23:14 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: set gpio4cd iodomain to 1.8V
    
    The PCIe reset signal is connected to GPIO4_C6 on the Puma
    module. This pin is supplied by 1.8V, but the default iodomain
    setting is 3.0V and in this situation the pin is unable to go
    high.
    
    Linux assumes that this signal works in early boot
    as PCIe is probed before loading the iodomain driver.
    
    Make PCIe work in Linux by setting the gpio4cd iodomain to 1.8V.
    
    Change-Id: I131ca6147b490a89cc913ce398dc163c99efd9f2
    Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit aa41220f6f7c79284ce5880e2533f81c125237a4)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 27e3823d52..c6690fa069 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -8,13 +8,17 @@
 #include <dm.h>
 #include <misc.h>
 #include <spl.h>
+#include <syscon.h>
 #include <usb.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
+#include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/setup.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3399.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
 #include <u-boot/sha256.h>
@@ -180,10 +184,25 @@ static void setup_serial(void)
 #endif
 }
 
+static void setup_iodomain(void)
+{
+	const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3;
+	struct rk3399_grf_regs *grf =
+	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/*
+	 * Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6).
+	 * Linux assumes that PCIE_RST# works out of the box as it probes
+	 * PCIe before loading the iodomain driver.
+	 */
+	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
+}
+
 int misc_init_r(void)
 {
 	setup_serial();
 	setup_macaddr();
+	setup_iodomain();
 
 	return 0;
 }

commit 6a2ff3f44f263669ae5558d943402efa1714639a
Author: Stefan Roese <sr@denx.de>
Date:   Wed Nov 29 16:46:42 2017 +0100

    UPSTREAM: dm: blk: Use uclass_find_first/next_device() in blk_first/next_device()
    
    This patch changes the calls to uclass_first/next_device() in blk_first/
    next_device() to use uclass_find_first/next_device() instead. These functions
    don't prepare the devices, which is correct in this case.
    
    With this patch applied, the "usb storage" command now works again as
    expected:
    
    => usb storage
      Device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra
      Type: Removable Hard Disk
      Capacity: 58656.0 MB = 57.2 GB (120127488 x 512)
    
    Without this patch, it used to generate this buggy output:
    
    => usb storage
    Card did not respond to voltage select!
    mmc_init: -95, time 26
    No storage devices, perhaps not 'usb start'ed..?
    
    Change-Id: I5a037217a568d9e4eedb089bce5a283eadff1310
    Signed-off-by: Stefan Roese <sr@denx.de>
    Suggested-by: Simon Glass <sjg@chromium.org>
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8a5cbc065dfe1f258e3a7be823ea128184b90b5b)

diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index f8c650357a..58cf81703e 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
+#include <dm/uclass-internal.h>
 
 static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_IDE]		= "ide",
@@ -333,7 +334,7 @@ int blk_first_device(int if_type, struct udevice **devp)
 	struct blk_desc *desc;
 	int ret;
 
-	ret = uclass_first_device(UCLASS_BLK, devp);
+	ret = uclass_find_first_device(UCLASS_BLK, devp);
 	if (ret)
 		return ret;
 	if (!*devp)
@@ -342,7 +343,7 @@ int blk_first_device(int if_type, struct udevice **devp)
 		desc = dev_get_uclass_platdata(*devp);
 		if (desc->if_type == if_type)
 			return 0;
-		ret = uclass_next_device(devp);
+		ret = uclass_find_next_device(devp);
 		if (ret)
 			return ret;
 	} while (*devp);
@@ -358,7 +359,7 @@ int blk_next_device(struct udevice **devp)
 	desc = dev_get_uclass_platdata(*devp);
 	if_type = desc->if_type;
 	do {
-		ret = uclass_next_device(devp);
+		ret = uclass_find_next_device(devp);
 		if (ret)
 			return ret;
 		if (!*devp)

commit 29b6917330864130eedeb8ced0c636515b93c3f1
Author: Felix Brack <fb@ltec.ch>
Date:   Mon Nov 27 09:14:16 2017 +0100

    UPSTREAM: power: extend prefix match to regulator-name property
    
    This patch extends pmic_bind_children prefix matching. In addition to
    the node name the property regulator-name is used while trying to match
    prefixes. This allows assigning different drivers to regulator nodes
    named regulator@1 and regulator@10 for example.
    I have discarded the idea of using other properties then regulator-name
    as I do not see any benefit in using property compatible or even
    regulator-compatible. Of course I am open to change this if there are
    good reasons to do so.
    
    Change-Id: Ifedf2c0a51cb725ddb290ee9dfd54a3fea45df70
    Signed-off-by: Felix Brack <fb@ltec.ch>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bf802f5d544f85c03b4097ab23d078be43c61855)

diff --git a/arch/sandbox/dts/sandbox_pmic.dtsi b/arch/sandbox/dts/sandbox_pmic.dtsi
index ce261b930e..acb4799396 100644
--- a/arch/sandbox/dts/sandbox_pmic.dtsi
+++ b/arch/sandbox/dts/sandbox_pmic.dtsi
@@ -75,4 +75,10 @@
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
+
+	no_match_by_nodename {
+		regulator-name = "buck_SUPPLY_1.5V";
+		regulator-min-microvolt = <1500000>;
+		regulator-max-microvolt = <1500000>;
+	};
 };
diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt
index 918711eb4d..65b69c4278 100644
--- a/doc/device-tree-bindings/regulator/regulator.txt
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -2,7 +2,8 @@ Voltage/Current regulator
 
 Binding:
 The regulator devices don't use the "compatible" property. The binding is done
-by the prefix of regulator node's name. Usually the pmic I/O driver will provide
+by the prefix of regulator node's name, or, if this fails, by the prefix of the
+regulator's "regulator-name" property. Usually the pmic I/O driver will provide
 the array of 'struct pmic_child_info' with the prefixes and compatible drivers.
 The bind is done by calling function: pmic_bind_childs().
 Example drivers:
@@ -15,8 +16,19 @@ For the node name e.g.: "prefix[:alpha:]num { ... }":
 
 Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "ldoreg@1, ...
 
+Binding by means of the node's name is preferred. However if the node names
+would produce ambiguous prefixes (like "regulator@1" and "regualtor@11") and you
+can't or do not want to change them then binding against the "regulator-name"
+property is possible. The syntax for the prefix of the "regulator-name" property
+is the same as the one for the regulator's node name.
+Use case: a regulator named "regulator@1" to be bound to a driver named
+"LDO_DRV" and a regulator named "regualator@11" to be bound to an other driver
+named "BOOST_DRV". Using prefix "regualtor@1" for driver matching would load
+the same driver for both regulators, hence the prefix is ambiguous.
+
 Optional properties:
-- regulator-name: a string, required by the regulator uclass
+- regulator-name: a string, required by the regulator uclass, used for driver
+                  binding if binding by node's name prefix fails
 - regulator-min-microvolt: a minimum allowed Voltage value
 - regulator-max-microvolt: a maximum allowed Voltage value
 - regulator-min-microamp: a minimum allowed Current value
diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 152a5ef6c5..5fb1ef5e60 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -26,6 +26,7 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	struct driver *drv;
 	struct udevice *child;
 	const char *node_name;
+	const char *reg_name;
 	int bind_count = 0;
 	ofnode node;
 	int prefix_len;
@@ -44,8 +45,14 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 			debug("  - compatible prefix: '%s'\n", info->prefix);
 
 			prefix_len = strlen(info->prefix);
-			if (strncmp(info->prefix, node_name, prefix_len))
-				continue;
+			if (strncmp(info->prefix, node_name, prefix_len)) {
+				reg_name = ofnode_read_string(node,
+							      "regulator-name");
+				if (!reg_name)
+					continue;
+				if (strncmp(info->prefix, reg_name, prefix_len))
+					continue;
+			}
 
 			drv = lists_driver_lookup_name(info->driver);
 			if (!drv) {
diff --git a/include/power/sandbox_pmic.h b/include/power/sandbox_pmic.h
index 7fdbfb9fc6..c5e6fda2ea 100644
--- a/include/power/sandbox_pmic.h
+++ b/include/power/sandbox_pmic.h
@@ -13,7 +13,7 @@
 #define SANDBOX_BUCK_DRIVER		"sandbox_buck"
 #define SANDBOX_OF_BUCK_PREFIX		"buck"
 
-#define SANDBOX_BUCK_COUNT	2
+#define SANDBOX_BUCK_COUNT	3
 #define SANDBOX_LDO_COUNT	2
 /*
  * Sandbox PMIC registers:
@@ -109,6 +109,9 @@ enum {
 #define SANDBOX_BUCK1_PLATNAME	"SUPPLY_1.2V"
 #define SANDBOX_BUCK2_DEVNAME	"buck2"
 #define SANDBOX_BUCK2_PLATNAME	"SUPPLY_3.3V"
+/* BUCK3: for testing fallback regulator prefix matching during bind */
+#define SANDBOX_BUCK3_DEVNAME	"no_match_by_nodename"
+#define SANDBOX_BUCK3_PLATNAME	"buck_SUPPLY_1.5V"
 /* LDO names */
 #define SANDBOX_LDO1_DEVNAME	"ldo1"
 #define SANDBOX_LDO1_PLATNAME	"VDD_EMMC_1.8V"
diff --git a/test/dm/regulator.c b/test/dm/regulator.c
index 3d0056f2dc..395381d4bd 100644
--- a/test/dm/regulator.c
+++ b/test/dm/regulator.c
@@ -27,6 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 enum {
 	BUCK1,
 	BUCK2,
+	BUCK3,
 	LDO1,
 	LDO2,
 	OUTPUT_COUNT,
@@ -42,6 +43,7 @@ static const char *regulator_names[OUTPUT_COUNT][OUTPUT_NAME_COUNT] = {
 	/* devname, platname */
 	{ SANDBOX_BUCK1_DEVNAME, SANDBOX_BUCK1_PLATNAME },
 	{ SANDBOX_BUCK2_DEVNAME, SANDBOX_BUCK2_PLATNAME },
+	{ SANDBOX_BUCK3_DEVNAME, SANDBOX_BUCK3_PLATNAME },
 	{ SANDBOX_LDO1_DEVNAME, SANDBOX_LDO1_PLATNAME},
 	{ SANDBOX_LDO2_DEVNAME, SANDBOX_LDO2_PLATNAME},
 };

commit 13e1d84013cfdf0044c2d022d6b75a2845ae731f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 18:37:58 2017 +0100

    UPSTREAM: dm: reset: have the reset-command perform a COLD reset
    
    The DM version of do_reset has been issuing a warm-reset, which (on
    some platforms keeps GPIOs and other parts of the platform active).
    This may cause unintended behaviour, as calling do_reset usually
    indicates a desire to reset the board/platform and not just the CPU.
    
    This changes do_reset to always request a COLD reset.
    Note that programmatic uses can still invoke a WARM reset through
    reset_cpu() or using sysreset_walk().
    
    Change-Id: I65a8ac8e62582866e23e6451315090fdb2781ef4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b53f6992e9cb7f0d892ebc2b1620b55559f461be)

diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 3566d17fb1..0747c52b60 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -70,7 +70,7 @@ void reset_cpu(ulong addr)
 
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	sysreset_walk_halt(SYSRESET_WARM);
+	sysreset_walk_halt(SYSRESET_COLD);
 
 	return 0;
 }

commit 6bb25446252735d379a5fd52ff99c3ae474d234a
Author: Baruch Siach <baruch@tkos.co.il>
Date:   Sun Dec 10 17:34:35 2017 +0200

    UPSTREAM: README: update the kernel coding style reference
    
    The old CodingStyle document has been converted to ReST and moved
    elsewhere. Link to the web version of this document instead.
    
    Change-Id: I92f10f6c014a2658f587350f847634683d3d51c7
    Signed-off-by: Baruch Siach <baruch@tkos.co.il>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 659208da4703de50826a469cbb38bf6afb938978)

diff --git a/README b/README
index 903cd65db7..abf6136746 100644
--- a/README
+++ b/README
@@ -5196,8 +5196,9 @@ Coding Standards:
 -----------------
 
 All contributions to U-Boot should conform to the Linux kernel
-coding style; see the file "Documentation/CodingStyle" and the script
-"scripts/Lindent" in your Linux kernel source directory.
+coding style; see the kernel coding style guide at
+https://www.kernel.org/doc/html/latest/process/coding-style.html, and the
+script "scripts/Lindent" in your Linux kernel source directory.
 
 Source files originating from a different project (for example the
 MTD subsystem) are generally exempt from these guidelines and are not

commit 7cc0da0b68bf9e938a495692d359e4ec58404ecf
Author: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Date:   Thu Dec 7 16:20:44 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: preserve leading zeros in serial#
    
    Linux preserves leading zeros in /proc/cpuinfo, so we
    should as well.
    
    Otherwise we have the situation that
    /sys/firmware/devicetree/base/serial-number
    and /proc/cpuinfo disagree in Linux.
    
    Change-Id: Ie1b53d75468ac9ae6ac3298ed54a4e7b5e6bea9a
    Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b32b1bd10b86d01a26056f50de89f768e5183ed1)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 0ad267cdd0..27e3823d52 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -173,7 +173,7 @@ static void setup_serial(void)
 
 	serialno = crc32_no_comp(0, low, 8);
 	serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
-	snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+	snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
 
 	env_set("cpuid#", cpuid_str);
 	env_set("serial#", serialno_str);

commit 995085a9d51c7a93618eb7ea842bc4d6f460c5fb
Author: York Sun <york.sun@nxp.com>
Date:   Thu Dec 7 13:16:07 2017 -0800

    UPSTREAM: armv8: fix gd after relocation
    
    Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18
    without checking the return value of spl_relocate_stack_gd().
    
    Reviewed-by: Stephen Warren <swarren@nvidia.com>
    Change-Id: I929a996608808934bf4d614acfffe43080594ecb
    Signed-off-by: York Sun <york.sun@nxp.com>
    CC: Kever Yang <kever.yang@rock-chips.com>
    CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e421b646fce125ed92936628dc4b287de5f038a5)

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index ccefce0b20..9cb70552fe 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -120,8 +120,9 @@ relocation_return:
 #endif /* !CONFIG_SPL_BUILD */
 #if defined(CONFIG_SPL_BUILD)
 	bl	spl_relocate_stack_gd           /* may return NULL */
-	/* set up gd here, outside any C code */
-	mov	x18, x0
+	/* set up gd here, outside any C code, if new stack is returned */
+	cmp	x0, #0
+	csel	x18, x0, x18, ne
 	/*
 	 * Perform 'sp = (x0 != NULL) ? x0 : sp' while working
 	 * around the constraint that conditional moves can not

commit 40fb706fa5e98485434e6d46f807f88b5f89a3db
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:31 2017 -0700

    UPSTREAM: log: Add documentation
    
    Add documentation for the log system.
    
    Change-Id: I1ad874d516ea2c140bf37d5ae695479b087620fa
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1d0f30a8e080fd490ec4df50d5ccfc742e771ca0)

diff --git a/doc/README.log b/doc/README.log
new file mode 100644
index 0000000000..f653fe7d79
--- /dev/null
+++ b/doc/README.log
@@ -0,0 +1,214 @@
+Logging in U-Boot
+=================
+
+Introduction
+------------
+
+U-Boot's internal operation involves many different steps and actions. From
+setting up the board to displaying a start-up screen to loading an Operating
+System, there are many component parts each with many actions.
+
+Most of the time this internal detail is not useful. Displaying it on the
+console would delay booting (U-Boot's primary purpose) and confuse users.
+
+But for digging into what is happening in a particular area, or for debugging
+a problem it is often useful to see what U-Boot is doing in more detail than
+is visible from the basic console output.
+
+U-Boot's logging feature aims to satisfy this goal for both users and
+developers.
+
+
+Logging levels
+--------------
+
+There are a number logging levels available, in increasing order of verbosity:
+
+   LOGL_EMERG	- Printed before U-Boot halts
+   LOGL_ALERT	- Indicates action must be taken immediate or U-Boot will crash
+   LOGL_CRIT	- Indicates a critical error that will cause boot failure
+   LOGL_ERR	- Indicates an error that may cause boot failure
+   LOGL_WARNING	- Warning about an unexpected condition
+   LOGL_NOTE	- Important information about progress
+   LOGL_INFO	- Information about normal boot progress
+   LOGL_DEBUG	- Debug information (useful for debugging a driver or subsystem)
+   LOGL_DEBUG_CONTENT	- Debug message showing full message content
+   LOGL_DEBUG_IO	- Debug message showing hardware I/O access
+
+
+Logging category
+----------------
+
+Logging can come from a wide variety of places within U-Boot. Each log message
+has a category which is intended to allow messages to be filtered according to
+their source.
+
+The following main categories are defined:
+
+   LOGC_NONE	- Unknown category (e.g. a debug() statement)
+   UCLASS_...	- Related to a particular uclass (e.g. UCLASS_USB)
+   LOGC_ARCH	- Related to architecture-specific code
+   LOGC_BOARD	- Related to board-specific code
+   LOGC_CORE	- Related to core driver-model support
+   LOGC_DT	- Related to device tree control
+
+
+Enabling logging
+----------------
+
+The following options are used to enable logging at compile time:
+
+   CONFIG_LOG		- Enables the logging system
+   CONFIG_MAX_LOG_LEVEL - Max log level to build (anything higher is compiled
+				out)
+   CONFIG_LOG_CONSOLE	- Enable writing log records to the console
+
+If CONFIG_LOG is not set, then no logging will be available.
+
+The above have SPL versions also, e.g. CONFIG_SPL_MAX_LOG_LEVEL.
+
+
+Using DEBUG
+-----------
+
+U-Boot has traditionally used a #define called DEBUG to enable debugging on a
+file-by-file basis. The debug() macro compiles to a printf() statement if
+DEBUG is enabled, and an empty statement if not.
+
+With logging enabled, debug() statements are interpreted as logging output
+with a level of LOGL_DEBUG and a category of LOGC_NONE.
+
+The logging facilities are intended to replace DEBUG, but if DEBUG is defined
+at the top of a file, then it takes precedence. This means that debug()
+statements will result in output to the console and this output will not be
+logged.
+
+
+Logging destinations
+--------------------
+
+If logging information goes nowhere then it serves no purpose. U-Boot provides
+several possible determinations for logging information, all of which can be
+enabled or disabled independently:
+
+   console - goes to stdout
+
+
+Filters
+-------
+
+Filters are attached to log drivers to control what those drivers emit. Only
+records that pass through the filter make it to the driver.
+
+Filters can be based on several criteria:
+
+   - maximum log level
+   - in a set of categories
+   - in a set of files
+
+If no filters are attached to a driver then a default filter is used, which
+limits output to records with a level less than CONFIG_LOG_MAX_LEVEL.
+
+
+Logging statements
+------------------
+
+The main logging function is:
+
+   log(category, level, format_string, ...)
+
+Also debug() and error() will generate log records  - these use LOG_CATEGORY
+as the category, so you should #define this right at the top of the source
+file to ensure the category is correct.
+
+
+Code size
+---------
+
+Code size impact depends largely on what is enabled. The following numbers are
+for snow, which is a Thumb-2 board:
+
+This series: adds bss +20.0 data +4.0 rodata +4.0 text +44.0
+CONFIG_LOG: bss -52.0 data +92.0 rodata -635.0 text +1048.0
+CONFIG_LOG_MAX_LEVEL=7: bss +188.0 data +4.0 rodata +49183.0 text +98124.0
+
+The last option turns every debug() statement into a logging call, which
+bloats the code hugely. The advantage is that it is then possible to enable
+all logging within U-Boot.
+
+
+To Do
+-----
+
+There are lots of useful additions that could be made. None of the below is
+implemented! If you do one, please add a test in test/py/tests/test_log.py
+
+Convenience functions to support setting the category:
+
+   log_arch(level, format_string, ...) - category LOGC_ARCH
+   log_board(level, format_string, ...) - category LOGC_BOARD
+   log_core(level, format_string, ...) - category LOGC_CORE
+   log_dt(level, format_string, ...) - category LOGC_DT
+
+Convenience functions to support a category defined for a single file, for
+example:
+
+   #define LOG_CATEGORY   UCLASS_USB
+
+all of these can use LOG_CATEGORY as the category, and a log level
+corresponding to the function name:
+
+   logc(level, format_string, ...)
+
+More logging destinations:
+
+   device - goes to a device (e.g. serial)
+   buffer - recorded in a memory buffer
+
+Convert debug() statements in the code to log() statements
+
+Support making printf() emit log statements a L_INFO level
+
+Convert error() statements in the code to log() statements
+
+Figure out what to do with BUG(), BUG_ON() and warn_non_spl()
+
+Figure out what to do with assert()
+
+Add a way to browse log records
+
+Add a way to record log records for browsing using an external tool
+
+Add commands to add and remove filters
+
+Add commands to add and remove log devices
+
+Allow sharing of printf format strings in log records to reduce storage size
+for large numbers of log records
+
+Add a command-line option to sandbox to set the default logging level
+
+Convert core driver model code to use logging
+
+Convert uclasses to use logging with the correct category
+
+Consider making log() calls emit an automatic newline, perhaps with a logn()
+   function to avoid that
+
+Passing log records through to linux (e.g. via device tree /chosen)
+
+Provide a command to access the number of log records generated, and the
+number dropped due to them being generated before the log system was ready.
+
+Add a printf() format string pragma so that log statements are checked properly
+
+Enhance the log console driver to show level / category / file / line
+information
+
+Add a command to add new log records and delete existing records.
+
+Provide additional log() functions - e.g. logc() to specify the category
+
+--
+Simon Glass <sjg@chromium.org>
+15-Sep-17

commit c41d05c3010e6015c0451a5a0eaa3b341dac0e3e
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:30 2017 -0700

    UPSTREAM: log: test: Add a pytest for logging
    
    Add a test which tries out various filters and options to make sure that
    logging works as expected.
    
    Change-Id: Ibbaf607e128356e78769b9db9d6bda235c74ead2
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 20faa27c2bc32b1442970cfe98a3006cf8eac063)

diff --git a/MAINTAINERS b/MAINTAINERS
index 9ba8bed1d0..7b11bc9e8d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -309,6 +309,7 @@ T:	git git://git.denx.de/u-boot.git
 F:	common/log.c
 F:	cmd/log.c
 F:	test/log/log_test.c
+F:	test/py/tests/test_log.py
 
 MICROBLAZE
 M:	Michal Simek <monstr@monstr.eu>
diff --git a/test/py/tests/test_log.py b/test/py/tests/test_log.py
new file mode 100644
index 0000000000..fa9a25e8dc
--- /dev/null
+++ b/test/py/tests/test_log.py
@@ -0,0 +1,101 @@
+# Copyright (c) 2016, Google Inc.
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+# U-Boot Verified Boot Test
+
+"""
+This tests U-Boot logging. It uses the 'log test' command with various options
+and checks that the output is correct.
+"""
+
+import pytest
+
+LOGL_FIRST, LOGL_WARNING, LOGL_INFO = (0, 4, 6)
+
+@pytest.mark.buildconfigspec('log')
+def test_log(u_boot_console):
+    """Test that U-Boot logging works correctly."""
+    def check_log_entries(lines, mask, max_level=LOGL_INFO):
+        """Check that the expected log records appear in the output
+
+        Args:
+            lines: iterator containing lines to check
+            mask: bit mask to select which lines to check for:
+                bit 0: standard log line
+                bit 1: _log line
+            max_level: maximum log level to expect in the output
+        """
+        for i in range(max_level):
+            if mask & 1:
+                assert 'log %d' % i == lines.next()
+            if mask & 3:
+                assert '_log %d' % i == lines.next()
+
+    def run_test(testnum):
+        """Run a particular test number (the 'log test' command)
+
+        Args:
+            testnum: Test number to run
+        Returns:
+            iterator containing the lines output from the command
+        """
+
+        with cons.log.section('basic'):
+           output = u_boot_console.run_command('log test %d' % testnum)
+        split = output.replace('\r', '').splitlines()
+        lines = iter(split)
+        assert 'test %d' % testnum == lines.next()
+        return lines
+
+    def test0():
+        lines = run_test(0)
+        check_log_entries(lines, 3)
+
+    def test1():
+        lines = run_test(1)
+        check_log_entries(lines, 3)
+
+    def test2():
+        lines = run_test(2)
+
+    def test3():
+        lines = run_test(3)
+        check_log_entries(lines, 2)
+
+    def test4():
+        lines = run_test(4)
+        assert next(lines, None) == None
+
+    def test5():
+        lines = run_test(5)
+        check_log_entries(lines, 2)
+
+    def test6():
+        lines = run_test(6)
+        check_log_entries(lines, 3)
+
+    def test7():
+        lines = run_test(7)
+        check_log_entries(lines, 3, LOGL_WARNING)
+
+    def test8():
+        lines = run_test(8)
+        check_log_entries(lines, 3)
+
+    def test9():
+        lines = run_test(9)
+        check_log_entries(lines, 3)
+
+    # TODO(sjg@chromium.org): Consider structuring this as separate tests
+    cons = u_boot_console
+    test0()
+    test1()
+    test2()
+    test3()
+    test4()
+    test5()
+    test6()
+    test7()
+    test8()
+    test9()

commit a239d69a77cfe7d48f939b8f2e072fa07f9fbc6a
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:28 2017 -0700

    UPSTREAM: log: Plumb logging into the init sequence
    
    Set up logging both before and after relocation.
    
    Change-Id: I225a1077880b14a6f3eabc19b2a5b9fe4c6a530d
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit af1bc0cf46c49c5ddb13b8c75bad31a05a137eba)

diff --git a/common/board_f.c b/common/board_f.c
index 1e8bf63ec1..e46eceda7d 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -751,6 +751,7 @@ static const init_fnc_t init_sequence_f[] = {
 	trace_early_init,
 #endif
 	initf_malloc,
+	log_init,
 	initf_bootstage,	/* uses its own timer, so does not need DM */
 	initf_console_record,
 #if defined(CONFIG_HAVE_FSP)
@@ -932,8 +933,10 @@ void board_init_f_r(void)
 	 * The pre-relocation drivers may be using memory that has now gone
 	 * away. Mark serial as unavailable - this will fall back to the debug
 	 * UART if available.
+	 *
+	 * Do the same with log drivers since the memory may not be available.
 	 */
-	gd->flags &= ~GD_FLG_SERIAL_READY;
+	gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
 #ifdef CONFIG_TIMER
 	gd->timer = NULL;
 #endif
diff --git a/common/board_r.c b/common/board_r.c
index 89729d7736..09167c13cc 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -691,6 +691,7 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 	initr_barrier,
 	initr_malloc,
+	log_init,
 	initr_bootstage,	/* Needs malloc() but has its own timer */
 	initr_console_record,
 #ifdef CONFIG_SYS_NONCACHED_MEMORY
@@ -884,6 +885,7 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
 #if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
 	gd = new_gd;
 #endif
+	gd->flags &= ~GD_FLG_LOG_READY;
 
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 	for (i = 0; i < ARRAY_SIZE(init_sequence_r); i++)
diff --git a/common/log.c b/common/log.c
index 8f36c79c26..45e46dd520 100644
--- a/common/log.c
+++ b/common/log.c
@@ -238,6 +238,7 @@ int log_init(void)
 			      (struct list_head *)&gd->log_head);
 		drv++;
 	}
+	gd->flags |= GD_FLG_LOG_READY;
 	gd->default_log_level = LOGL_INFO;
 
 	return 0;
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 8fa4c95f76..5aaa78b06a 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -154,5 +154,6 @@ typedef struct global_data {
 #define GD_FLG_RECORD		0x01000	/* Record console		   */
 #define GD_FLG_ENV_DEFAULT	0x02000 /* Default variable flag	   */
 #define GD_FLG_SPL_EARLY_INIT	0x04000 /* Early SPL init is done	   */
+#define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
 
 #endif /* __ASM_GENERIC_GBL_DATA_H */

commit b974325dd8f8312b40d85983f219dd2dbaae7415
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Sep 5 19:49:45 2017 -0600

    UPSTREAM: board_f: Drop the timer after relocation
    
    Once U-Boot relocates itself the existing driver-model timer (if any) is
    no-longer valid until the device is reinitialised. Any use of the device
    may cause a crash. To handle this, set the timer to NULL after relocation.
    
    Change-Id: I041cc547659b540735dcaf52444d97834ea10059
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5ee94b4f4032502c26cd3c9ede6a910d7e2c9b46)

diff --git a/common/board_f.c b/common/board_f.c
index d0b1a00175..1e8bf63ec1 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -934,6 +934,9 @@ void board_init_f_r(void)
 	 * UART if available.
 	 */
 	gd->flags &= ~GD_FLG_SERIAL_READY;
+#ifdef CONFIG_TIMER
+	gd->timer = NULL;
+#endif
 
 	/*
 	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.

commit 73991b074b84a2b568d20b0cc41f15bfbd0d0046
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:27 2017 -0700

    log: Add a test command
    
    Add a command which exercises the logging system.
    
    Change-Id: I4eb139b69937c752d7f6fc42dde3f757260b832b
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ef11ed8239bf02b347e7fb9fc6d980aec0c7810a)

diff --git a/MAINTAINERS b/MAINTAINERS
index 91a3e11492..9ba8bed1d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -308,6 +308,7 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot.git
 F:	common/log.c
 F:	cmd/log.c
+F:	test/log/log_test.c
 
 MICROBLAZE
 M:	Michal Simek <monstr@monstr.eu>
diff --git a/cmd/Kconfig b/cmd/Kconfig
index b9d2f7fe4e..6afb4fd64f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1555,7 +1555,8 @@ config CMD_LOG
 	help
 	  This provides access to logging features. It allows the output of
 	  log data to be controlled to a limited extent (setting up the default
-	  maximum log level for emitting of records).
+	  maximum log level for emitting of records). It also provides access
+	  to a command used for testing the log system.
 
 config CMD_TRACE
 	bool "trace - Support tracing of function calls and timing"
diff --git a/cmd/log.c b/cmd/log.c
index 44e04ab16a..abc523b497 100644
--- a/cmd/log.c
+++ b/cmd/log.c
@@ -23,6 +23,9 @@ static int do_log_level(cmd_tbl_t *cmdtp, int flag, int argc,
 
 static cmd_tbl_t log_sub[] = {
 	U_BOOT_CMD_MKENT(level, CONFIG_SYS_MAXARGS, 1, do_log_level, "", ""),
+#ifdef CONFIG_LOG_TEST
+	U_BOOT_CMD_MKENT(test, 2, 1, do_log_test, "", ""),
+#endif
 };
 
 static int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -46,6 +49,9 @@ static int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #ifdef CONFIG_SYS_LONGHELP
 static char log_help_text[] =
 	"level - get/set log level\n"
+#ifdef CONFIG_LOG_TEST
+	"log test - run log tests\n"
+#endif
 	;
 #endif
 
diff --git a/common/Kconfig b/common/Kconfig
index 4518dee887..20f97ed8bc 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -479,6 +479,16 @@ config LOG_SPL_CONSOLE
 	  log message is shown - other details like level, category, file and
 	  line number are omitted.
 
+config LOG_TEST
+	bool "Provide a test for logging"
+	depends on LOG
+	default y if SANDBOX
+	help
+	  This enables a 'log test' command to test logging. It is normally
+	  executed from a pytest and simply outputs logging information
+	  in various different ways to test that the logging system works
+	  correctly with varoius settings.
+
 endmenu
 
 config DEFAULT_FDT_FILE
diff --git a/include/log.h b/include/log.h
index 1e9124c3f8..8083b64831 100644
--- a/include/log.h
+++ b/include/log.h
@@ -256,6 +256,9 @@ struct log_filter {
 #define LOG_DRIVER(_name) \
 	ll_entry_declare(struct log_driver, _name, log_driver)
 
+/* Handle the 'log test' command */
+int do_log_test(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+
 /**
  * log_add_filter() - Add a new filter to a log device
  *
diff --git a/test/Makefile b/test/Makefile
index d4e86ff967..382a0fff4d 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_SANDBOX) += compression.o
 obj-$(CONFIG_SANDBOX) += print_ut.o
 obj-$(CONFIG_UT_TIME) += time_ut.o
 obj-$(CONFIG_TEST_ROCKCHIP) += rockchip/
+obj-$(CONFIG_$(SPL_)LOG) += log/
diff --git a/test/log/Makefile b/test/log/Makefile
new file mode 100644
index 0000000000..b0da8dee28
--- /dev/null
+++ b/test/log/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Google, Inc
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-$(CONFIG_LOG_TEST) += log_test.o
diff --git a/test/log/log_test.c b/test/log/log_test.c
new file mode 100644
index 0000000000..2c6227703f
--- /dev/null
+++ b/test/log/log_test.c
@@ -0,0 +1,205 @@
+/*
+ * Logging support test program
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+/* emit some sample log records in different ways, for testing */
+static int log_run(enum uclass_id cat, const char *file)
+{
+	int i;
+
+	debug("debug\n");
+	for (i = LOGL_FIRST; i < LOGL_COUNT; i++) {
+		log(cat, i, "log %d\n", i);
+		_log(log_uc_cat(cat), i, file, 100 + i, "func", "_log %d\n",
+		     i);
+	}
+
+	return 0;
+}
+
+static int log_test(int testnum)
+{
+	int ret;
+
+	printf("test %d\n", testnum);
+	switch (testnum) {
+	case 0: {
+		/* Check a category filter using the first category */
+		enum log_category_t cat_list[] = {
+			log_uc_cat(UCLASS_MMC), log_uc_cat(UCLASS_SPI),
+			LOGC_NONE, LOGC_END
+		};
+
+		ret = log_add_filter("console", cat_list, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_MMC, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 1: {
+		/* Check a category filter using the second category */
+		enum log_category_t cat_list[] = {
+			log_uc_cat(UCLASS_MMC), log_uc_cat(UCLASS_SPI), LOGC_END
+		};
+
+		ret = log_add_filter("console", cat_list, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 2: {
+		/* Check a category filter that should block log entries */
+		enum log_category_t cat_list[] = {
+			log_uc_cat(UCLASS_MMC),  LOGC_NONE, LOGC_END
+		};
+
+		ret = log_add_filter("console", cat_list, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 3: {
+		/* Check a passing file filter */
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 4: {
+		/* Check a failing file filter */
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 5: {
+		/* Check a passing file filter (second in list) */
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file,file2");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 6: {
+		/* Check a passing file filter */
+		ret = log_add_filter("console", NULL, LOGL_MAX,
+				     "file,file2,log/log_test.c");
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 7: {
+		/* Check a log level filter */
+		ret = log_add_filter("console", NULL, LOGL_WARNING, NULL);
+		if (ret < 0)
+			return ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", ret);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 8: {
+		/* Check two filters, one of which passes everything */
+		int filt1, filt2;
+
+		ret = log_add_filter("console", NULL, LOGL_WARNING, NULL);
+		if (ret < 0)
+			return ret;
+		filt1 = ret;
+		ret = log_add_filter("console", NULL, LOGL_MAX, NULL);
+		if (ret < 0)
+			return ret;
+		filt2 = ret;
+		log_run(UCLASS_SPI, "file");
+		ret = log_remove_filter("console", filt1);
+		if (ret < 0)
+			return ret;
+		ret = log_remove_filter("console", filt2);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	case 9: {
+		/* Check three filters, which together pass everything */
+		int filt1, filt2, filt3;
+
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file)");
+		if (ret < 0)
+			return ret;
+		filt1 = ret;
+		ret = log_add_filter("console", NULL, LOGL_MAX, "file2");
+		if (ret < 0)
+			return ret;
+		filt2 = ret;
+		ret = log_add_filter("console", NULL, LOGL_MAX,
+				     "log/log_test.c");
+		if (ret < 0)
+			return ret;
+		filt3 = ret;
+		log_run(UCLASS_SPI, "file2");
+		ret = log_remove_filter("console", filt1);
+		if (ret < 0)
+			return ret;
+		ret = log_remove_filter("console", filt2);
+		if (ret < 0)
+			return ret;
+		ret = log_remove_filter("console", filt3);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_LOG_TEST
+int do_log_test(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	int testnum = 0;
+	int ret;
+
+	if (argc > 1)
+		testnum = simple_strtoul(argv[1], NULL, 10);
+
+	ret = log_test(testnum);
+	if (ret)
+		printf("Test failure (err=%d)\n", ret);
+
+	return ret ? CMD_RET_FAILURE : 0;
+}
+#endif

commit 923fc48db435f0db633d38a9b772fdfcd753166c
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:26 2017 -0700

    log: Add a 'log level' command
    
    Add a command for adjusting the log level.
    
    Change-Id: I51e15c61e860f4f0bdb980f1d7aa88c492f55d49
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d5f61f272d5b7b86bf6321512ba6326c7c075e72)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 772a62a513..b9d2f7fe4e 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1550,6 +1550,13 @@ config CMD_KGDB
 	  single-stepping, inspecting variables, etc. This is supported only
 	  on PowerPC at present.
 
+config CMD_LOG
+	bool "log - Generation, control and access to logging"
+	help
+	  This provides access to logging features. It allows the output of
+	  log data to be controlled to a limited extent (setting up the default
+	  maximum log level for emitting of records).
+
 config CMD_TRACE
 	bool "trace - Support tracing of function calls and timing"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index a60fa41158..82817e2943 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -81,6 +81,7 @@ obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
 obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o android_cmds.o
+obj-$(CONFIG_CMD_LOG) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
diff --git a/cmd/log.c b/cmd/log.c
new file mode 100644
index 0000000000..44e04ab16a
--- /dev/null
+++ b/cmd/log.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <log.h>
+
+static int do_log_level(cmd_tbl_t *cmdtp, int flag, int argc,
+			char * const argv[])
+{
+	if (argc > 1)
+		gd->default_log_level = simple_strtol(argv[1], NULL, 10);
+	else
+		printf("Default log level: %d\n", gd->default_log_level);
+
+	return 0;
+}
+
+static cmd_tbl_t log_sub[] = {
+	U_BOOT_CMD_MKENT(level, CONFIG_SYS_MAXARGS, 1, do_log_level, "", ""),
+};
+
+static int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	cmd_tbl_t *cp;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	/* drop initial "log" arg */
+	argc--;
+	argv++;
+
+	cp = find_cmd_tbl(argv[0], log_sub, ARRAY_SIZE(log_sub));
+	if (cp)
+		return cp->cmd(cmdtp, flag, argc, argv);
+
+	return CMD_RET_USAGE;
+}
+
+#ifdef CONFIG_SYS_LONGHELP
+static char log_help_text[] =
+	"level - get/set log level\n"
+	;
+#endif
+
+U_BOOT_CMD(
+	log, CONFIG_SYS_MAXARGS, 1, do_log,
+	"log system", log_help_text
+);

commit 5cafef2de2edfcb919506177308d8aa9e66641ab
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:25 2017 -0700

    UPSTREAM: log: Add a console driver
    
    It is useful to display log messages on the console. Add a simple driver
    to handle this.
    
    Note that this driver outputs to the console, which may be serial or
    video. It does not specifically select serial output.
    
    Change-Id: I3626673a306557400584e673f9725e74ecbaaf98
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c6d47535dfb6636ae5244958a2a9e043bb7646ae)

diff --git a/common/Kconfig b/common/Kconfig
index 03c66d4737..4518dee887 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -459,6 +459,26 @@ config SPL_LOG_MAX_LEVEL
 	    6 - detail
 	    7 - debug
 
+config LOG_CONSOLE
+	bool "Allow log output to the console"
+	depends on LOG
+	default y
+	help
+	  Enables a log driver which writes log records to the console.
+	  Generally the console is the serial port or LCD display. Only the
+	  log message is shown - other details like level, category, file and
+	  line number are omitted.
+
+config LOG_SPL_CONSOLE
+	bool "Allow log output to the console in SPL"
+	depends on LOG_SPL
+	default y
+	help
+	  Enables a log driver which writes log records to the console.
+	  Generally the console is the serial port or LCD display. Only the
+	  log message is shown - other details like level, category, file and
+	  line number are omitted.
+
 endmenu
 
 config DEFAULT_FDT_FILE
diff --git a/common/Makefile b/common/Makefile
index 08ebcb4bd3..eded2f1d78 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -135,5 +135,6 @@ obj-$(CONFIG_FSL_DDR_INTERACTIVE) += cli_simple.o cli_readline.o
 obj-$(CONFIG_CMD_DFU) += dfu.o
 obj-y += command.o
 obj-$(CONFIG_$(SPL_)LOG) += log.o
+obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
 obj-y += s_record.o
 obj-y += xyzModem.o
diff --git a/common/log_console.c b/common/log_console.c
new file mode 100644
index 0000000000..5af73bd8be
--- /dev/null
+++ b/common/log_console.c
@@ -0,0 +1,23 @@
+/*
+ * Logging support
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <log.h>
+
+static int log_console_emit(struct log_device *ldev, struct log_rec *rec)
+{
+	puts(rec->msg);
+
+	return 0;
+}
+
+LOG_DRIVER(console) = {
+	.name	= "console",
+	.emit	= log_console_emit,
+};

commit 9530301c6611120510a0e6885dac286fe96f02f0
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:24 2017 -0700

    log: Add an implementation of logging
    
    Add the logging header file and implementation with some configuration
    options to control it.
    
    Change-Id: Ic711fa39ba3183b288170ebdd4bfdf0a9e472bad
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e9c8d49d54cbbc7b219a1637d2994de7448b767d)

diff --git a/MAINTAINERS b/MAINTAINERS
index ef5ae23ea3..91a3e11492 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -302,6 +302,13 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot-i2c.git
 F:	drivers/i2c/
 
+LOGGING
+M:	Simon Glass <sjg@chromium.org>
+S:	Maintained
+T:	git git://git.denx.de/u-boot.git
+F:	common/log.c
+F:	cmd/log.c
+
 MICROBLAZE
 M:	Michal Simek <monstr@monstr.eu>
 S:	Maintained
diff --git a/common/Kconfig b/common/Kconfig
index 78e0094b78..03c66d4737 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -405,6 +405,62 @@ config SYS_STDIO_DEREGISTER
 
 endmenu
 
+menu "Logging"
+
+config LOG
+	bool "Enable logging support"
+	help
+	  This enables support for logging of status and debug messages. These
+	  can be displayed on the console, recorded in a memory buffer, or
+	  discarded if not needed. Logging supports various categories and
+	  levels of severity.
+
+config SPL_LOG
+	bool "Enable logging support in SPL"
+	help
+	  This enables support for logging of status and debug messages. These
+	  can be displayed on the console, recorded in a memory buffer, or
+	  discarded if not needed. Logging supports various categories and
+	  levels of severity.
+
+config LOG_MAX_LEVEL
+	int "Maximum log level to record"
+	depends on LOG
+	default 5
+	help
+	  This selects the maximum log level that will be recorded. Any value
+	  higher than this will be ignored. If possible log statements below
+	  this level will be discarded at build time. Levels:
+
+	    0 - panic
+	    1 - critical
+	    2 - error
+	    3 - warning
+	    4 - note
+	    5 - info
+	    6 - detail
+	    7 - debug
+
+config SPL_LOG_MAX_LEVEL
+	int "Maximum log level to record in SPL"
+	depends on SPL_LOG
+	default 3
+	help
+	  This selects the maximum log level that will be recorded. Any value
+	  higher than this will be ignored. If possible log statements below
+	  this level will be discarded at build time. Levels:
+
+	    0 - panic
+	    1 - critical
+	    2 - error
+	    3 - warning
+	    4 - note
+	    5 - info
+	    6 - detail
+	    7 - debug
+
+endmenu
+
 config DEFAULT_FDT_FILE
 	string "Default fdt file"
 	help
diff --git a/common/Makefile b/common/Makefile
index 525433c888..08ebcb4bd3 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -134,5 +134,6 @@ obj-y += cli.o
 obj-$(CONFIG_FSL_DDR_INTERACTIVE) += cli_simple.o cli_readline.o
 obj-$(CONFIG_CMD_DFU) += dfu.o
 obj-y += command.o
+obj-$(CONFIG_$(SPL_)LOG) += log.o
 obj-y += s_record.o
 obj-y += xyzModem.o
diff --git a/common/log.c b/common/log.c
new file mode 100644
index 0000000000..8f36c79c26
--- /dev/null
+++ b/common/log.c
@@ -0,0 +1,244 @@
+/*
+ * Logging support
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <log.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct log_device *log_device_find_by_name(const char *drv_name)
+{
+	struct log_device *ldev;
+
+	list_for_each_entry(ldev, &gd->log_head, sibling_node) {
+		if (!strcmp(drv_name, ldev->drv->name))
+			return ldev;
+	}
+
+	return NULL;
+}
+
+/**
+ * log_has_cat() - check if a log category exists within a list
+ *
+ * @cat_list: List of categories to check, at most LOGF_MAX_CATEGORIES entries
+ *	long, terminated by LC_END if fewer
+ * @cat: Category to search for
+ * @return true if @cat is in @cat_list, else false
+ */
+static bool log_has_cat(enum log_category_t cat_list[], enum log_category_t cat)
+{
+	int i;
+
+	for (i = 0; i < LOGF_MAX_CATEGORIES && cat_list[i] != LOGC_END; i++) {
+		if (cat_list[i] == cat)
+			return true;
+	}
+
+	return false;
+}
+
+/**
+ * log_has_file() - check if a file is with a list
+ *
+ * @file_list: List of files to check, separated by comma
+ * @file: File to check for. This string is matched against the end of each
+ *	file in the list, i.e. ignoring any preceding path. The list is
+ *	intended to consist of relative pathnames, e.g. common/main.c,cmd/log.c
+ * @return true if @file is in @file_list, else false
+ */
+static bool log_has_file(const char *file_list, const char *file)
+{
+	int file_len = strlen(file);
+	const char *s, *p;
+	int substr_len;
+
+	for (s = file_list; *s; s = p + (*p != '\0')) {
+		p = strchrnul(s, ',');
+		substr_len = p - s;
+		if (file_len >= substr_len &&
+		    !strncmp(file + file_len - substr_len, s, substr_len))
+			return true;
+	}
+
+	return false;
+}
+
+/**
+ * log_passes_filters() - check if a log record passes the filters for a device
+ *
+ * @ldev: Log device to check
+ * @rec: Log record to check
+ * @return true if @rec is not blocked by the filters in @ldev, false if it is
+ */
+static bool log_passes_filters(struct log_device *ldev, struct log_rec *rec)
+{
+	struct log_filter *filt;
+
+	/* If there are no filters, filter on the default log level */
+	if (list_empty(&ldev->filter_head)) {
+		if (rec->level > gd->default_log_level)
+			return false;
+		return true;
+	}
+
+	list_for_each_entry(filt, &ldev->filter_head, sibling_node) {
+		if (rec->level > filt->max_level)
+			continue;
+		if ((filt->flags & LOGFF_HAS_CAT) &&
+		    !log_has_cat(filt->cat_list, rec->cat))
+			continue;
+		if (filt->file_list &&
+		    !log_has_file(filt->file_list, rec->file))
+			continue;
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * log_dispatch() - Send a log record to all log devices for processing
+ *
+ * The log record is sent to each log device in turn, skipping those which have
+ * filters which block the record
+ *
+ * @rec: Log record to dispatch
+ * @return 0 (meaning success)
+ */
+static int log_dispatch(struct log_rec *rec)
+{
+	struct log_device *ldev;
+
+	list_for_each_entry(ldev, &gd->log_head, sibling_node) {
+		if (log_passes_filters(ldev, rec))
+			ldev->drv->emit(ldev, rec);
+	}
+
+	return 0;
+}
+
+int _log(enum log_category_t cat, enum log_level_t level, const char *file,
+	 int line, const char *func, const char *fmt, ...)
+{
+	char buf[CONFIG_SYS_CBSIZE];
+	struct log_rec rec;
+	va_list args;
+
+	rec.cat = cat;
+	rec.level = level;
+	rec.file = file;
+	rec.line = line;
+	rec.func = func;
+	va_start(args, fmt);
+	vsnprintf(buf, sizeof(buf), fmt, args);
+	va_end(args);
+	rec.msg = buf;
+	if (!gd || !(gd->flags & GD_FLG_LOG_READY)) {
+		if (gd)
+			gd->log_drop_count++;
+		return -ENOSYS;
+	}
+	log_dispatch(&rec);
+
+	return 0;
+}
+
+int log_add_filter(const char *drv_name, enum log_category_t cat_list[],
+		   enum log_level_t max_level, const char *file_list)
+{
+	struct log_filter *filt;
+	struct log_device *ldev;
+	int i;
+
+	ldev = log_device_find_by_name(drv_name);
+	if (!ldev)
+		return -ENOENT;
+	filt = (struct log_filter *)calloc(1, sizeof(*filt));
+	if (!filt)
+		return -ENOMEM;
+
+	if (cat_list) {
+		filt->flags |= LOGFF_HAS_CAT;
+		for (i = 0; ; i++) {
+			if (i == ARRAY_SIZE(filt->cat_list))
+				return -ENOSPC;
+			filt->cat_list[i] = cat_list[i];
+			if (cat_list[i] == LOGC_END)
+				break;
+		}
+	}
+	filt->max_level = max_level;
+	if (file_list) {
+		filt->file_list = strdup(file_list);
+		if (!filt->file_list)
+			goto nomem;
+	}
+	filt->filter_num = ldev->next_filter_num++;
+	list_add_tail(&filt->sibling_node, &ldev->filter_head);
+
+	return filt->filter_num;
+
+nomem:
+	free(filt);
+	return -ENOMEM;
+}
+
+int log_remove_filter(const char *drv_name, int filter_num)
+{
+	struct log_filter *filt;
+	struct log_device *ldev;
+
+	ldev = log_device_find_by_name(drv_name);
+	if (!ldev)
+		return -ENOENT;
+
+	list_for_each_entry(filt, &ldev->filter_head, sibling_node) {
+		if (filt->filter_num == filter_num) {
+			list_del(&filt->sibling_node);
+			free(filt);
+
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
+int log_init(void)
+{
+	struct log_driver *drv = ll_entry_start(struct log_driver, log_driver);
+	const int count = ll_entry_count(struct log_driver, log_driver);
+	struct log_driver *end = drv + count;
+
+	/*
+	 * We cannot add runtime data to the driver since it is likely stored
+	 * in rodata. Instead, set up a 'device' corresponding to each driver.
+	 * We only support having a single device.
+	 */
+	INIT_LIST_HEAD((struct list_head *)&gd->log_head);
+	while (drv < end) {
+		struct log_device *ldev;
+
+		ldev = calloc(1, sizeof(*ldev));
+		if (!ldev) {
+			debug("%s: Cannot allocate memory\n", __func__);
+			return -ENOMEM;
+		}
+		INIT_LIST_HEAD(&ldev->filter_head);
+		ldev->drv = drv;
+		list_add_tail(&ldev->sibling_node,
+			      (struct list_head *)&gd->log_head);
+		drv++;
+	}
+	gd->default_log_level = LOGL_INFO;
+
+	return 0;
+}
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 30dd8be308..8fa4c95f76 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -122,6 +122,11 @@ typedef struct global_data {
 	struct bootstage_data *new_bootstage;	/* Relocated bootstage info */
 #endif
 	phys_addr_t pm_ctx_phys;
+#ifdef CONFIG_LOG
+	int log_drop_count;		/* Number of dropped log messages */
+	int default_log_level;		/* For devices with no filters */
+	struct list_head log_head;	/* List of struct log_device */
+#endif
 } gd_t;
 #endif
 
diff --git a/include/log.h b/include/log.h
index 08ad44cf49..1e9124c3f8 100644
--- a/include/log.h
+++ b/include/log.h
@@ -10,6 +10,94 @@
 #ifndef __LOG_H
 #define __LOG_H
 
+#include <dm/uclass-id.h>
+#include <linux/list.h>
+
+/** Log levels supported, ranging from most to least important */
+enum log_level_t {
+	LOGL_EMERG = 0,		/*U-Boot is unstable */
+	LOGL_ALERT,		/* Action must be taken immediately */
+	LOGL_CRIT,		/* Critical conditions */
+	LOGL_ERR,		/* Error that prevents something from working */
+	LOGL_WARNING,		/* Warning may prevent optimial operation */
+	LOGL_NOTICE,		/* Normal but significant condition, printf() */
+	LOGL_INFO,		/* General information message */
+	LOGL_DEBUG,		/* Basic debug-level message */
+	LOGL_DEBUG_CONTENT,	/* Debug message showing full message content */
+	LOGL_DEBUG_IO,		/* Debug message showing hardware I/O access */
+
+	LOGL_COUNT,
+	LOGL_FIRST = LOGL_EMERG,
+	LOGL_MAX = LOGL_DEBUG,
+};
+
+/**
+ * Log categories supported. Most of these correspond to uclasses (i.e.
+ * enum uclass_id) but there are also some more generic categories
+ */
+enum log_category_t {
+	LOGC_FIRST = 0,	/* First part mirrors UCLASS_... */
+
+	LOGC_NONE = UCLASS_COUNT,
+	LOGC_ARCH,
+	LOGC_BOARD,
+	LOGC_CORE,
+	LOGC_DT,
+
+	LOGC_COUNT,
+	LOGC_END,
+};
+
+/* Helper to cast a uclass ID to a log category */
+static inline int log_uc_cat(enum uclass_id id)
+{
+	return (enum log_category_t)id;
+}
+
+/**
+ * _log() - Internal function to emit a new log record
+ *
+ * @cat: Category of log record (indicating which subsystem generated it)
+ * @level: Level of log record (indicating its severity)
+ * @file: File name of file where log record was generated
+ * @line: Line number in file where log record was generated
+ * @func: Function where log record was generated
+ * @fmt: printf() format string for log record
+ * @...: Optional parameters, according to the format string @fmt
+ * @return 0 if log record was emitted, -ve on error
+ */
+int _log(enum log_category_t cat, enum log_level_t level, const char *file,
+	 int line, const char *func, const char *fmt, ...);
+
+/* Define this at the top of a file to add a prefix to debug messages */
+#ifndef pr_fmt
+#define pr_fmt(fmt) fmt
+#endif
+
+/* Use a default category if this file does not supply one */
+#ifndef LOG_CATEGORY
+#define LOG_CATEGORY LOGC_NONE
+#endif
+
+/*
+ * This header may be including when CONFIG_LOG is disabled, in which case
+ * CONFIG_LOG_MAX_LEVEL is not defined. Add a check for this.
+ */
+#if CONFIG_IS_ENABLED(LOG)
+#define _LOG_MAX_LEVEL CONFIG_VAL(LOG_MAX_LEVEL)
+#else
+#define _LOG_MAX_LEVEL LOGL_INFO
+#endif
+
+/* Emit a log record if the level is less that the maximum */
+#define log(_cat, _level, _fmt, _args...) ({ \
+	int _l = _level; \
+	if (_l <= _LOG_MAX_LEVEL) \
+		_log((enum log_category_t)(_cat), _l, __FILE__, __LINE__, \
+		      __func__, \
+		      pr_fmt(_fmt), ##_args); \
+	})
+
 #ifdef DEBUG
 #define _DEBUG	1
 #else
@@ -22,6 +110,16 @@
 #define _SPL_BUILD	0
 #endif
 
+#if !_DEBUG && CONFIG_IS_ENABLED(LOG)
+
+#define debug_cond(cond, fmt, args...)			\
+	do {						\
+		if (1)					\
+			log(LOG_CATEGORY, LOGL_DEBUG, fmt, ##args); \
+	} while (0)
+
+#else /* _DEBUG */
+
 /*
  * Output a debug text when condition "cond" is met. The "cond" should be
  * computed by a preprocessor in the best case, allowing for the best
@@ -33,6 +131,8 @@
 			printf(pr_fmt(fmt), ##args);	\
 	} while (0)
 
+#endif /* _DEBUG */
+
 /* Show a message if DEBUG is defined in a file */
 #define debug(fmt, args...)			\
 	debug_cond(_DEBUG, fmt, ##args)
@@ -56,4 +156,146 @@ void __assert_fail(const char *assertion, const char *file, unsigned int line,
 	({ if (!(x) && _DEBUG) \
 		__assert_fail(#x, __FILE__, __LINE__, __func__); })
 
+/**
+ * struct log_rec - a single log record
+ *
+ * Holds information about a single record in the log
+ *
+ * Members marked as 'not allocated' are stored as pointers and the caller is
+ * responsible for making sure that the data pointed to is not overwritten.
+ * Memebers marked as 'allocated' are allocated (e.g. via strdup()) by the log
+ * system.
+ *
+ * @cat: Category, representing a uclass or part of U-Boot
+ * @level: Severity level, less severe is higher
+ * @file: Name of file where the log record was generated (not allocated)
+ * @line: Line number where the log record was generated
+ * @func: Function where the log record was generated (not allocated)
+ * @msg: Log message (allocated)
+ */
+struct log_rec {
+	enum log_category_t cat;
+	enum log_level_t level;
+	const char *file;
+	int line;
+	const char *func;
+	const char *msg;
+};
+
+struct log_device;
+
+/**
+ * struct log_driver - a driver which accepts and processes log records
+ *
+ * @name: Name of driver
+ */
+struct log_driver {
+	const char *name;
+	/**
+	 * emit() - emit a log record
+	 *
+	 * Called by the log system to pass a log record to a particular driver
+	 * for processing. The filter is checked before calling this function.
+	 */
+	int (*emit)(struct log_device *ldev, struct log_rec *rec);
+};
+
+/**
+ * struct log_device - an instance of a log driver
+ *
+ * Since drivers are set up at build-time we need to have a separate device for
+ * the run-time aspects of drivers (currently just a list of filters to apply
+ * to records send to this device).
+ *
+ * @next_filter_num: Seqence number of next filter filter added (0=no filters
+ *	yet). This increments with each new filter on the device, but never
+ *	decrements
+ * @drv: Pointer to driver for this device
+ * @filter_head: List of filters for this device
+ * @sibling_node: Next device in the list of all devices
+ */
+struct log_device {
+	int next_filter_num;
+	struct log_driver *drv;
+	struct list_head filter_head;
+	struct list_head sibling_node;
+};
+
+enum {
+	LOGF_MAX_CATEGORIES = 5,	/* maximum categories per filter */
+};
+
+enum log_filter_flags {
+	LOGFF_HAS_CAT		= 1 << 0,	/* Filter has a category list */
+};
+
+/**
+ * struct log_filter - criterial to filter out log messages
+ *
+ * @filter_num: Sequence number of this filter.  This is returned when adding a
+ *	new filter, and must be provided when removing a previously added
+ *	filter.
+ * @flags: Flags for this filter (LOGFF_...)
+ * @cat_list: List of categories to allow (terminated by LOGC_none). If empty
+ *	then all categories are permitted. Up to LOGF_MAX_CATEGORIES entries
+ *	can be provided
+ * @max_level: Maximum log level to allow
+ * @file_list: List of files to allow, separated by comma. If NULL then all
+ *	files are permitted
+ * @sibling_node: Next filter in the list of filters for this log device
+ */
+struct log_filter {
+	int filter_num;
+	int flags;
+	enum log_category_t cat_list[LOGF_MAX_CATEGORIES];
+	enum log_level_t max_level;
+	const char *file_list;
+	struct list_head sibling_node;
+};
+
+#define LOG_DRIVER(_name) \
+	ll_entry_declare(struct log_driver, _name, log_driver)
+
+/**
+ * log_add_filter() - Add a new filter to a log device
+ *
+ * @drv_name: Driver name to add the filter to (since each driver only has a
+ *	single device)
+ * @cat_list: List of categories to allow (terminated by LOGC_none). If empty
+ *	then all categories are permitted. Up to LOGF_MAX_CATEGORIES entries
+ *	can be provided
+ * @max_level: Maximum log level to allow
+ * @file_list: List of files to allow, separated by comma. If NULL then all
+ *	files are permitted
+ * @return the sequence number of the new filter (>=0) if the filter was added,
+ *	or a -ve value on error
+ */
+int log_add_filter(const char *drv_name, enum log_category_t cat_list[],
+		   enum log_level_t max_level, const char *file_list);
+
+/**
+ * log_remove_filter() - Remove a filter from a log device
+ *
+ * @drv_name: Driver name to remove the filter from (since each driver only has
+ *	a single device)
+ * @filter_num: Filter number to remove (as returned by log_add_filter())
+ * @return 0 if the filter was removed, -ENOENT if either the driver or the
+ *	filter number was not found
+ */
+int log_remove_filter(const char *drv_name, int filter_num);
+
+#if CONFIG_IS_ENABLED(LOG)
+/**
+ * log_init() - Set up the log system ready for use
+ *
+ * @return 0 if OK, -ENOMEM if out of memory
+ */
+int log_init(void);
+#else
+static inline int log_init(void)
+{
+	return 0;
+}
+#endif
+
 #endif

commit 44aaaed168e09186ef8f690fdd02c4920f15ceb6
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:20 2017 -0700

    UPSTREAM: Move debug and logging support to a separate header
    
    Before adding new features, move these definitions to a separate header
    to avoid further cluttering common.h.
    
    Change-Id: Ib4be207f2536b4e9f12f32033c6034cb9fe4ccd7
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0e98b0a65092d6573eb17d07e04455f9cf545b21)

diff --git a/include/common.h b/include/common.h
index 04d6e2d25e..9b725e8274 100644
--- a/include/common.h
+++ b/include/common.h
@@ -45,51 +45,7 @@ typedef volatile unsigned char	vu_char;
 #define CONFIG_SYS_SUPPORT_64BIT_DATA
 #endif
 
-#ifdef DEBUG
-#define _DEBUG	1
-#else
-#define _DEBUG	0
-#endif
-
-#ifdef CONFIG_SPL_BUILD
-#define _SPL_BUILD	1
-#else
-#define _SPL_BUILD	0
-#endif
-
-/*
- * Output a debug text when condition "cond" is met. The "cond" should be
- * computed by a preprocessor in the best case, allowing for the best
- * optimization.
- */
-#define debug_cond(cond, fmt, args...)			\
-	do {						\
-		if (cond)				\
-			printf(pr_fmt(fmt), ##args);	\
-	} while (0)
-
-/* Show a message if DEBUG is defined in a file */
-#define debug(fmt, args...)			\
-	debug_cond(_DEBUG, fmt, ##args)
-
-/* Show a message if not in SPL */
-#define warn_non_spl(fmt, args...)			\
-	debug_cond(!_SPL_BUILD, fmt, ##args)
-
-/*
- * An assertion is run-time check done in debug mode only. If DEBUG is not
- * defined then it is skipped. If DEBUG is defined and the assertion fails,
- * then it calls panic*( which may or may not reset/halt U-Boot (see
- * CONFIG_PANIC_HANG), It is hoped that all failing assertions are found
- * before release, and after release it is hoped that they don't matter. But
- * in any case these failing assertions cannot be fixed with a reset (which
- * may just do the same assertion again).
- */
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-		   const char *function);
-#define assert(x) \
-	({ if (!(x) && _DEBUG) \
-		__assert_fail(#x, __FILE__, __LINE__, __func__); })
+#include <log.h>
 
 #if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
 # undef static_assert
diff --git a/include/log.h b/include/log.h
new file mode 100644
index 0000000000..08ad44cf49
--- /dev/null
+++ b/include/log.h
@@ -0,0 +1,59 @@
+/*
+ * Logging support
+ *
+ * Copyright (c) 2017 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __LOG_H
+#define __LOG_H
+
+#ifdef DEBUG
+#define _DEBUG	1
+#else
+#define _DEBUG	0
+#endif
+
+#ifdef CONFIG_SPL_BUILD
+#define _SPL_BUILD	1
+#else
+#define _SPL_BUILD	0
+#endif
+
+/*
+ * Output a debug text when condition "cond" is met. The "cond" should be
+ * computed by a preprocessor in the best case, allowing for the best
+ * optimization.
+ */
+#define debug_cond(cond, fmt, args...)			\
+	do {						\
+		if (cond)				\
+			printf(pr_fmt(fmt), ##args);	\
+	} while (0)
+
+/* Show a message if DEBUG is defined in a file */
+#define debug(fmt, args...)			\
+	debug_cond(_DEBUG, fmt, ##args)
+
+/* Show a message if not in SPL */
+#define warn_non_spl(fmt, args...)			\
+	debug_cond(!_SPL_BUILD, fmt, ##args)
+
+/*
+ * An assertion is run-time check done in debug mode only. If DEBUG is not
+ * defined then it is skipped. If DEBUG is defined and the assertion fails,
+ * then it calls panic*( which may or may not reset/halt U-Boot (see
+ * CONFIG_PANIC_HANG), It is hoped that all failing assertions are found
+ * before release, and after release it is hoped that they don't matter. But
+ * in any case these failing assertions cannot be fixed with a reset (which
+ * may just do the same assertion again).
+ */
+void __assert_fail(const char *assertion, const char *file, unsigned int line,
+		   const char *function);
+#define assert(x) \
+	({ if (!(x) && _DEBUG) \
+		__assert_fail(#x, __FILE__, __LINE__, __func__); })
+
+#endif

commit 785b4fbf6c5db1eb4c0ddf983292d7ab077c4212
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:23 2017 -0700

    Drop the log buffer
    
    This does not appear to be used by any boards. Before introducing a new
    log system, remove this old one.
    
    Change-Id: I798cd4aff50b7136ae9f84362185f9f73b04f710
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c5404b64fb5a35d41f7eff6d12b8ffdb0c851040)

diff --git a/cmd/Makefile b/cmd/Makefile
index f8396ce585..a60fa41158 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -81,7 +81,6 @@ obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
 obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o android_cmds.o
-obj-$(CONFIG_LOGBUFFER) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
 obj-$(CONFIG_CMD_MEMORY) += mem.o
diff --git a/cmd/log.c b/cmd/log.c
deleted file mode 100644
index 7a3bd5cd69..0000000000
--- a/cmd/log.c
+++ /dev/null
@@ -1,313 +0,0 @@
-/*
- * (C) Copyright 2002-2007
- * Detlev Zundel, DENX Software Engineering, dzu@denx.de.
- *
- * Code used from linux/kernel/printk.c
- * Copyright (C) 1991, 1992  Linus Torvalds
- *
- * SPDX-License-Identifier:	GPL-2.0+
- *
- * Comments:
- *
- * After relocating the code, the environment variable "loglevel" is
- * copied to console_loglevel.  The functionality is similar to the
- * handling in the Linux kernel, i.e. messages logged with a priority
- * less than console_loglevel are also output to stdout.
- *
- * If you want messages with the default level (e.g. POST messages) to
- * appear on stdout also, make sure the environment variable
- * "loglevel" is set at boot time to a number higher than
- * default_message_loglevel below.
- */
-
-/*
- * Logbuffer handling routines
- */
-
-#include <common.h>
-#include <command.h>
-#include <stdio_dev.h>
-#include <post.h>
-#include <logbuff.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* Local prototypes */
-static void logbuff_putc(struct stdio_dev *dev, const char c);
-static void logbuff_puts(struct stdio_dev *dev, const char *s);
-static int logbuff_printk(const char *line);
-
-static char buf[1024];
-
-/* This combination will not print messages with the default loglevel */
-static unsigned console_loglevel = 3;
-static unsigned default_message_loglevel = 4;
-static unsigned log_version = 1;
-#ifdef CONFIG_ALT_LB_ADDR
-static volatile logbuff_t *log;
-#else
-static logbuff_t *log;
-#endif
-static char *lbuf;
-
-unsigned long __logbuffer_base(void)
-{
-	return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
-}
-unsigned long logbuffer_base(void)
-__attribute__((weak, alias("__logbuffer_base")));
-
-void logbuff_init_ptrs(void)
-{
-	unsigned long tag, post_word;
-	char *s;
-
-#ifdef CONFIG_ALT_LB_ADDR
-	log = (logbuff_t *)CONFIG_ALT_LH_ADDR;
-	lbuf = (char *)CONFIG_ALT_LB_ADDR;
-#else
-	log = (logbuff_t *)(logbuffer_base()) - 1;
-	lbuf = (char *)log->buf;
-#endif
-
-	/* Set up log version */
-	s = env_get("logversion");
-	if (s)
-		log_version = (int)simple_strtoul(s, NULL, 10);
-
-	if (log_version == 2)
-		tag = log->v2.tag;
-	else
-		tag = log->v1.tag;
-	post_word = post_word_load();
-#ifdef CONFIG_POST
-	/* The post routines have setup the word so we can simply test it */
-	if (tag != LOGBUFF_MAGIC || (post_word & POST_COLDBOOT))
-		logbuff_reset();
-#else
-	/* No post routines, so we do our own checking                    */
-	if (tag != LOGBUFF_MAGIC || post_word != LOGBUFF_MAGIC) {
-		logbuff_reset ();
-		post_word_store (LOGBUFF_MAGIC);
-	}
-#endif
-	if (log_version == 2 && (long)log->v2.start > (long)log->v2.con)
-		log->v2.start = log->v2.con;
-
-	/* Initialize default loglevel if present */
-	s = env_get("loglevel");
-	if (s)
-		console_loglevel = (int)simple_strtoul(s, NULL, 10);
-
-	gd->flags |= GD_FLG_LOGINIT;
-}
-
-void logbuff_reset(void)
-{
-#ifndef CONFIG_ALT_LB_ADDR
-	memset(log, 0, sizeof(logbuff_t));
-#endif
-	if (log_version == 2) {
-		log->v2.tag = LOGBUFF_MAGIC;
-#ifdef CONFIG_ALT_LB_ADDR
-		log->v2.start = 0;
-		log->v2.con = 0;
-		log->v2.end = 0;
-		log->v2.chars = 0;
-#endif
-	} else {
-		log->v1.tag = LOGBUFF_MAGIC;
-#ifdef CONFIG_ALT_LB_ADDR
-		log->v1.dummy = 0;
-		log->v1.start = 0;
-		log->v1.size = 0;
-		log->v1.chars = 0;
-#endif
-	}
-}
-
-int drv_logbuff_init(void)
-{
-	struct stdio_dev logdev;
-	int rc;
-
-	/* Device initialization */
-	memset (&logdev, 0, sizeof (logdev));
-
-	strcpy (logdev.name, "logbuff");
-	logdev.ext   = 0;			/* No extensions */
-	logdev.flags = DEV_FLAGS_OUTPUT;	/* Output only */
-	logdev.putc  = logbuff_putc;		/* 'putc' function */
-	logdev.puts  = logbuff_puts;		/* 'puts' function */
-
-	rc = stdio_register(&logdev);
-
-	return (rc == 0) ? 1 : rc;
-}
-
-static void logbuff_putc(struct stdio_dev *dev, const char c)
-{
-	char buf[2];
-	buf[0] = c;
-	buf[1] = '\0';
-	logbuff_printk(buf);
-}
-
-static void logbuff_puts(struct stdio_dev *dev, const char *s)
-{
-	logbuff_printk (s);
-}
-
-void logbuff_log(char *msg)
-{
-	if ((gd->flags & GD_FLG_LOGINIT)) {
-		logbuff_printk(msg);
-	} else {
-		/*
-		 * Can happen only for pre-relocated errors as logging
-		 * at that stage should be disabled
-		 */
-		puts (msg);
-	}
-}
-
-/*
- * Subroutine:  do_log
- *
- * Description: Handler for 'log' command..
- *
- * Inputs:	argv[1] contains the subcommand
- *
- * Return:      None
- *
- */
-int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	struct stdio_dev *sdev = NULL;
-	char *s;
-	unsigned long i, start, size;
-
-	if (strcmp(argv[1], "append") == 0) {
-		/* Log concatenation of all arguments separated by spaces */
-		for (i = 2; i < argc; i++) {
-			logbuff_printk(argv[i]);
-			logbuff_putc(sdev, (i < argc - 1) ? ' ' : '\n');
-		}
-		return 0;
-	}
-
-	switch (argc) {
-
-	case 2:
-		if (strcmp(argv[1], "show") == 0) {
-			if (log_version == 2) {
-				start = log->v2.start;
-				size = log->v2.end - log->v2.start;
-			} else {
-				start = log->v1.start;
-				size = log->v1.size;
-			}
-			if (size > LOGBUFF_LEN)
-				size = LOGBUFF_LEN;
-			for (i = 0; i < size; i++) {
-				s = lbuf + ((start + i) & LOGBUFF_MASK);
-				putc(*s);
-			}
-			return 0;
-		} else if (strcmp(argv[1], "reset") == 0) {
-			logbuff_reset();
-			return 0;
-		} else if (strcmp(argv[1], "info") == 0) {
-			printf("Logbuffer   at  %08lx\n", (unsigned long)lbuf);
-			if (log_version == 2) {
-				printf("log_start    =  %08lx\n",
-					log->v2.start);
-				printf("log_end      =  %08lx\n", log->v2.end);
-				printf("log_con      =  %08lx\n", log->v2.con);
-				printf("logged_chars =  %08lx\n",
-					log->v2.chars);
-			}
-			else {
-				printf("log_start    =  %08lx\n",
-					log->v1.start);
-				printf("log_size     =  %08lx\n",
-					log->v1.size);
-				printf("logged_chars =  %08lx\n",
-					log->v1.chars);
-			}
-			return 0;
-		}
-		return CMD_RET_USAGE;
-
-	default:
-		return CMD_RET_USAGE;
-	}
-}
-
-U_BOOT_CMD(
-	log,     255,	1,	do_log,
-	"manipulate logbuffer",
-	"info   - show pointer details\n"
-	"log reset  - clear contents\n"
-	"log show   - show contents\n"
-	"log append <msg> - append <msg> to the logbuffer"
-);
-
-static int logbuff_printk(const char *line)
-{
-	int i;
-	char *msg, *p, *buf_end;
-	int line_feed;
-	static signed char msg_level = -1;
-
-	strcpy(buf + 3, line);
-	i = strlen(line);
-	buf_end = buf + 3 + i;
-	for (p = buf + 3; p < buf_end; p++) {
-		msg = p;
-		if (msg_level < 0) {
-			if (
-				p[0] != '<' ||
-				p[1] < '0' ||
-				p[1] > '7' ||
-				p[2] != '>'
-			) {
-				p -= 3;
-				p[0] = '<';
-				p[1] = default_message_loglevel + '0';
-				p[2] = '>';
-			} else {
-				msg += 3;
-			}
-			msg_level = p[1] - '0';
-		}
-		line_feed = 0;
-		for (; p < buf_end; p++) {
-			if (log_version == 2) {
-				lbuf[log->v2.end & LOGBUFF_MASK] = *p;
-				log->v2.end++;
-				if (log->v2.end - log->v2.start > LOGBUFF_LEN)
-					log->v2.start++;
-				log->v2.chars++;
-			} else {
-				lbuf[(log->v1.start + log->v1.size) &
-					 LOGBUFF_MASK] = *p;
-				if (log->v1.size < LOGBUFF_LEN)
-					log->v1.size++;
-				else
-					log->v1.start++;
-				log->v1.chars++;
-			}
-			if (*p == '\n') {
-				line_feed = 1;
-				break;
-			}
-		}
-		if (msg_level < console_loglevel) {
-			printf("%s", msg);
-		}
-		if (line_feed)
-			msg_level = -1;
-	}
-	return i;
-}
diff --git a/common/board_f.c b/common/board_f.c
index 104d144f41..d0b1a00175 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -19,7 +19,6 @@
 #include <i2c.h>
 #include <initcall.h>
 #include <init_helpers.h>
-#include <logbuff.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <os.h>
@@ -296,20 +295,6 @@ static int setup_dest_addr(void)
 	return 0;
 }
 
-#if defined(CONFIG_LOGBUFFER)
-static int reserve_logbuffer(void)
-{
-#ifndef CONFIG_ALT_LB_ADDR
-	/* reserve kernel log buffer */
-	gd->relocaddr -= LOGBUFF_RESERVE;
-	debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
-		gd->relocaddr);
-#endif
-
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_PRAM
 /* reserve protected RAM */
 static int reserve_pram(void)
@@ -846,9 +831,6 @@ static const init_fnc_t init_sequence_f[] = {
 	 *  - board info struct
 	 */
 	setup_dest_addr,
-#if defined(CONFIG_LOGBUFFER)
-	reserve_logbuffer,
-#endif
 #ifdef CONFIG_PRAM
 	reserve_pram,
 #endif
diff --git a/common/board_r.c b/common/board_r.c
index a3b9bfb8ee..89729d7736 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -30,7 +30,6 @@
 #if defined(CONFIG_CMD_KGDB)
 #include <kgdb.h>
 #endif
-#include <logbuff.h>
 #include <malloc.h>
 #include <mapmem.h>
 #ifdef CONFIG_BITBANGMII
@@ -200,19 +199,6 @@ static int initr_addr_map(void)
 }
 #endif
 
-#ifdef CONFIG_LOGBUFFER
-unsigned long logbuffer_base(void)
-{
-	return gd->ram_top - LOGBUFF_LEN;
-}
-
-static int initr_logbuffer(void)
-{
-	logbuff_init_ptrs();
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_POST
 static int initr_post_backlog(void)
 {
@@ -628,7 +614,7 @@ static int initr_ide(void)
 }
 #endif
 
-#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_PRAM)
 /*
  * Export available size of memory for Linux, taking into account the
  * protected RAM at top of memory
@@ -640,10 +626,6 @@ int initr_mem(void)
 
 # ifdef CONFIG_PRAM
 	pram = env_get_ulong("pram", 10, CONFIG_PRAM);
-# endif
-# if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
-	/* Also take the logbuffer into account (pram is in kB) */
-	pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
 # endif
 	sprintf(memsz, "%ldk", (long int) ((gd->ram_size / 1024) - pram));
 	env_set("mem", memsz);
@@ -753,9 +735,6 @@ static init_fnc_t init_sequence_r[] = {
 	board_early_init_r,
 #endif
 	INIT_FUNC_WATCHDOG_RESET
-#ifdef CONFIG_LOGBUFFER
-	initr_logbuffer,
-#endif
 #ifdef CONFIG_POST
 	initr_post_backlog,
 #endif
@@ -877,7 +856,7 @@ static init_fnc_t init_sequence_r[] = {
 	INIT_FUNC_WATCHDOG_RESET
 	initr_bedbug,
 #endif
-#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_PRAM)
 	initr_mem,
 #endif
 #ifdef CONFIG_PS2KBD
diff --git a/common/image.c b/common/image.c
index 20f453de2d..af8ba7312a 100644
--- a/common/image.c
+++ b/common/image.c
@@ -15,10 +15,6 @@
 #include <status_led.h>
 #endif
 
-#ifdef CONFIG_LOGBUFFER
-#include <logbuff.h>
-#endif
-
 #include <rtc.h>
 
 #include <environment.h>
@@ -1155,11 +1151,6 @@ int boot_ramdisk_high(struct lmb *lmb, ulong rd_data, ulong rd_len,
 	}
 
 
-#ifdef CONFIG_LOGBUFFER
-	/* Prevent initrd from overwriting logbuffer */
-	lmb_reserve(lmb, logbuffer_base() - LOGBUFF_OVERHEAD, LOGBUFF_RESERVE);
-#endif
-
 	debug("## initrd_high = 0x%08lx, copy_to_ram = %d\n",
 			initrd_high, initrd_copy_to_ram);
 
diff --git a/common/stdio.c b/common/stdio.c
index ee4f0bda9e..2e5143a025 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -17,9 +17,6 @@
 #include <malloc.h>
 #include <stdio_dev.h>
 #include <serial.h>
-#ifdef CONFIG_LOGBUFFER
-#include <logbuff.h>
-#endif
 
 #if defined(CONFIG_SYS_I2C)
 #include <i2c.h>
@@ -380,9 +377,6 @@ int stdio_add_devices(void)
 #endif /* CONFIG_DM_VIDEO */
 #if defined(CONFIG_KEYBOARD) && !defined(CONFIG_DM_KEYBOARD)
 	drv_keyboard_init ();
-#endif
-#ifdef CONFIG_LOGBUFFER
-	drv_logbuff_init ();
 #endif
 	drv_system_init ();
 	serial_stdio_init ();
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index dc2d6e8ce4..30dd8be308 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -43,7 +43,7 @@ typedef struct global_data {
 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
 	unsigned long fb_base;		/* Base address of framebuffer mem */
 #endif
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_POST)
 	unsigned long post_log_word;	/* Record POST activities */
 	unsigned long post_log_res;	/* success of POST test */
 	unsigned long post_init_f_time;	/* When post_init_f started */
diff --git a/include/logbuff.h b/include/logbuff.h
deleted file mode 100644
index 625feb9f95..0000000000
--- a/include/logbuff.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * (C) Copyright 2002-2007
- * Detlev Zundel, dzu@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#ifndef _LOGBUFF_H
-#define _LOGBUFF_H
-
-#ifdef CONFIG_LOGBUFFER
-
-#define LOGBUFF_MAGIC	0xc0de4ced	/* Forced by code, eh!	*/
-#define LOGBUFF_LEN	(16384)	/* Must be 16k right now */
-#define LOGBUFF_MASK	(LOGBUFF_LEN-1)
-#define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */
-#define LOGBUFF_RESERVE (LOGBUFF_LEN+LOGBUFF_OVERHEAD)
-
-/* The mapping used here has to be the same as in setup_ext_logbuff ()
-   in linux/kernel/printk */
-
-typedef struct {
-	union {
-		struct {
-			unsigned long	tag;
-			unsigned long	start;
-			unsigned long	con;
-			unsigned long	end;
-			unsigned long	chars;
-		} v2;
-		struct {
-			unsigned long	dummy;
-			unsigned long	tag;
-			unsigned long	start;
-			unsigned long	size;
-			unsigned long	chars;
-		} v1;
-	};
-	unsigned char	buf[0];
-} logbuff_t;
-
-int drv_logbuff_init (void);
-void logbuff_init_ptrs (void);
-void logbuff_log(char *msg);
-void logbuff_reset (void);
-unsigned long logbuffer_base (void);
-
-#endif /* CONFIG_LOGBUFFER */
-
-#endif /* _LOGBUFF_H */
diff --git a/include/post.h b/include/post.h
index d5278111e8..b41a6c8127 100644
--- a/include/post.h
+++ b/include/post.h
@@ -15,7 +15,7 @@
 #include <common.h>
 #include <asm/io.h>
 
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+#if defined(CONFIG_POST)
 
 #ifndef CONFIG_POST_EXTERNAL_WORD_FUNCS
 #ifdef CONFIG_SYS_POST_WORD_ADDR
@@ -58,7 +58,7 @@ extern ulong post_word_load(void);
 extern void post_word_store(ulong value);
 
 #endif /* CONFIG_POST_EXTERNAL_WORD_FUNCS */
-#endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */
+#endif /* defined (CONFIG_POST) */
 #endif /* __ASSEMBLY__ */
 
 #ifdef CONFIG_POST
diff --git a/post/post.c b/post/post.c
index 8fef0c3412..6c7902ad0c 100644
--- a/post/post.c
+++ b/post/post.c
@@ -15,10 +15,6 @@
 #include <asm/gpio.h>
 #endif
 
-#ifdef CONFIG_LOGBUFFER
-#include <logbuff.h>
-#endif
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #define POST_MAX_NUMBER		32
@@ -407,13 +403,8 @@ int post_log(char *format, ...)
 	vsprintf(printbuffer, format, args);
 	va_end(args);
 
-#ifdef CONFIG_LOGBUFFER
-	/* Send to the logbuffer */
-	logbuff_log(printbuffer);
-#else
 	/* Send to the stdout file */
 	puts(printbuffer);
-#endif
 
 	return 0;
 }
diff --git a/post/tests.c b/post/tests.c
index bc8e398051..473c0ea1e1 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -3,10 +3,6 @@
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * SPDX-License-Identifier:	GPL-2.0+
- *
- * Be sure to mark tests to be run before relocation as such with the
- * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the
- * logbuffer support is enabled.
  */
 
 #include <common.h>
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f73f765bbb..f22cf55ae3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1293,7 +1293,6 @@ CONFIG_LMS283GF05
 CONFIG_LOADADDR
 CONFIG_LOADCMD
 CONFIG_LOADS_ECHO
-CONFIG_LOGBUFFER
 CONFIG_LOWPOWER_ADDR
 CONFIG_LOWPOWER_FLAG
 CONFIG_LOW_MCFCLK

commit 143f37beff3943be7ecda8db416a6b1b10d09b86
Author: Simon Glass <sjg@chromium.org>
Date:   Mon Dec 4 13:48:22 2017 -0700

    UPSTREAM: usb: Correct use of debug()
    
    With clang this gives a warning because hubsts appears to be used before
    it is set, even if ultimately it is not used. Simplify the code to avoid
    this problem.
    
    Change-Id: If765f7b0c909de125e163875856e43ddf9b6c5d5
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0ad0458c76107b29325b8c38804e0407bed42a79)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index 024dadb277..b46dfa16cc 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -625,7 +625,7 @@ static int usb_hub_configure(struct usb_device *dev)
 	short hubCharacteristics;
 	struct usb_hub_descriptor *descriptor;
 	struct usb_hub_device *hub;
-	__maybe_unused struct usb_hub_status *hubsts;
+	struct usb_hub_status *hubsts;
 	int ret;
 
 	hub = usb_get_hub_device(dev);
@@ -779,9 +779,7 @@ static int usb_hub_configure(struct usb_device *dev)
 		return ret;
 	}
 
-#ifdef DEBUG
 	hubsts = (struct usb_hub_status *)buffer;
-#endif
 
 	debug("get_hub_status returned status %X, change %X\n",
 	      le16_to_cpu(hubsts->wHubStatus),

commit 00ac81b92dd89dc8c8c8cf4b1942b53d97b6d2f4
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Tue Nov 14 21:07:51 2017 +0100

    UPSTREAM: part: efi: Add default number of partition entries for sunxi
    
    The SPL must be located at 8kB (16 sectors) offset. That's right in the
    middle of the GPT, so we need to define a smaller amount of partitions to
    accomodate for that location.
    
    Reviewed-by: Andre Przywara <andre.przywara@arm.com>
    Change-Id: I7932a388389b15237bed18321606f034a47534a3
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5dc0256d1210cb38ba11b22a8eb2ccc101460963)

diff --git a/disk/Kconfig b/disk/Kconfig
index 1d32eee8dd..c5d30331ce 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -81,6 +81,7 @@ config EFI_PARTITION
 config EFI_PARTITION_ENTRIES_NUMBERS
 	int "Number of the EFI partition entries"
 	depends on EFI_PARTITION
+	default 56 if ARCH_SUNXI
 	default 128
 	help
 	  Specify the number of partition entries in the GPT. This is

commit 025e2e5af20faf08c282614aaa9626d87de3fe62
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Tue Nov 14 20:50:04 2017 +0100

    UPSTREAM: part: efi: Add a Kconfig option for the number of partition entries
    
    On some SoCs, the SPL needs to be located right in the middle of the GPT
    partition entries.
    
    One way to work around that is to create partition entries for a smaller
    number of partitions to accomodate with where the SPL will be. Create a
    Kconfig option to allow to do that.
    
    Reviewed-by: Andre Przywara <andre.przywara@arm.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Change-Id: Ic06f18722c0a835829042540f1f7a4364924624d
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4ce521977f79a883f9c47984ef675c4b2267b7ad)

diff --git a/disk/Kconfig b/disk/Kconfig
index 1489e6569f..1d32eee8dd 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -78,6 +78,19 @@ config EFI_PARTITION
 	  common when EFI is the bootloader.  Note 2TB partition limit;
 	  see disk/part_efi.c
 
+config EFI_PARTITION_ENTRIES_NUMBERS
+	int "Number of the EFI partition entries"
+	depends on EFI_PARTITION
+	default 128
+	help
+	  Specify the number of partition entries in the GPT. This is
+	  meant to allow less than the standard specifies for devices
+	  that might need to place their first-stage bootloader in the
+	  middle of a regular GPT.
+
+	  If unsure, leave at 128 entries, which is the standard
+	  number.
+
 config EFI_PARTITION_ENTRIES_OFF
         int "Offset (in bytes) of the EFI partition entries"
 	depends on EFI_PARTITION
diff --git a/include/part_efi.h b/include/part_efi.h
index 31e6bc6e14..4c8f6cc473 100644
--- a/include/part_efi.h
+++ b/include/part_efi.h
@@ -27,7 +27,7 @@
 #define GPT_HEADER_SIGNATURE 0x5452415020494645ULL
 #define GPT_HEADER_REVISION_V1 0x00010000
 #define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL
-#define GPT_ENTRY_NUMBERS		128
+#define GPT_ENTRY_NUMBERS		CONFIG_EFI_PARTITION_ENTRIES_NUMBERS
 #define GPT_ENTRY_SIZE			128
 
 #define PARTITION_SYSTEM_GUID \

commit 51b432dabb847aa90e068ae96021ab6679b75bc4
Author: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Date:   Fri Dec 1 14:39:40 2017 +0900

    UPSTREAM: cmd: i2c: Fix use sdram sub command with CONFIG_DM_I2C
    
    sdram sub command of i2c command does not support Drivers Model.
    This adds Drivers Model support to sdram sub command.
    
    Change-Id: I405d05b9b697715759a68ba71597cd9ae63d9565
    Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 28df8ed07f2ae936e9af28c146d555ed4d0c122a)

diff --git a/cmd/i2c.c b/cmd/i2c.c
index 3dd7c6ba4d..bfddf8be1b 100644
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -1156,7 +1156,10 @@ static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	uint	chip;
 	u_char	data[128];
 	u_char	cksum;
-	int	j;
+	int	j, ret;
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+#endif
 
 	static const char *decode_CAS_DDR2[] = {
 		" TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
@@ -1210,7 +1213,14 @@ static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	 */
 	chip = simple_strtoul (argv[1], NULL, 16);
 
-	if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
+#ifdef CONFIG_DM_I2C
+	ret = i2c_get_cur_bus_chip(chip, &dev);
+	if (!ret)
+		ret = dm_i2c_read(dev, 0, data, sizeof(data));
+#else
+	ret = i2c_read(chip, 0, 1, data, sizeof(data));
+#endif
+	if (ret) {
 		puts ("No SDRAM Serial Presence Detect found.\n");
 		return 1;
 	}

commit b3e08737315d8639f7aed97bac18c9809cabd3de
Author: Peng Fan <peng.fan@nxp.com>
Date:   Thu Nov 30 10:07:07 2017 +0800

    UPSTREAM: scripts: spl: fix typo
    
    Typo fix: CONIFG->CONFIG
    
    Change-Id: Ib4a1e77aacf0bc3cae32158623c3805cd279fd9f
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Cc: Tom Rini <trini@konsulko.com>
    Cc: Simon Glass <sjg@chromium.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 448df354b0725093f857e15a4ab5e849c4ecf3e0)

diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl
index 15d0836b49..b3994110dc 100644
--- a/scripts/Makefile.uncmd_spl
+++ b/scripts/Makefile.uncmd_spl
@@ -9,7 +9,7 @@ ifdef CONFIG_SPL_BUILD
 ifndef CONFIG_SPL_DM
 CONFIG_DM_SERIAL=
 CONFIG_DM_GPIO=
-CONIFG_DM_I2C=
+CONFIG_DM_I2C=
 CONFIG_DM_SPI=
 CONFIG_DM_SPI_FLASH=
 endif

commit 8a04b1c15a79e1a504521ca9aa415ac196d1e72d
Author: Peng Fan <peng.fan@nxp.com>
Date:   Tue Nov 28 10:31:28 2017 +0800

    UPSTREAM: armv8: mmu: fix page table mapping
    
    To page mapping the lowest 2 bits needs to be 0x3.
    If not fix this, the final lowest 3 bits for page mapping is 0x1
    which is marked as reserved.
    
    Change-Id: I5ac722421b46514736d93452aab68debe8aabfe5
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 90351547ceeb76c1337757c51af0fb5a2c30bd02)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index adc7e1746f..6548f3c912 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -230,7 +230,10 @@ static void add_map(struct mm_region *map)
 				/* Page fits, create block PTE */
 				debug("Setting PTE %p to block virt=%llx\n",
 				      pte, virt);
-				*pte = phys | attrs;
+				if (level == 3)
+					*pte = phys | attrs | PTE_TYPE_PAGE;
+				else
+					*pte = phys | attrs;
 				virt += blocksize;
 				phys += blocksize;
 				size -= blocksize;
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 6121aab547..765914c7e2 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -43,6 +43,7 @@
 #define PTE_TYPE_MASK		(3 << 0)
 #define PTE_TYPE_FAULT		(0 << 0)
 #define PTE_TYPE_TABLE		(3 << 0)
+#define PTE_TYPE_PAGE		(3 << 0)
 #define PTE_TYPE_BLOCK		(1 << 0)
 #define PTE_TYPE_VALID		(1 << 0)
 

commit 5e076729c1804b0d68509e0bf0f38c7dbf3679cd
Author: Peng Fan <peng.fan@nxp.com>
Date:   Tue Nov 28 10:08:08 2017 +0800

    arm64 :show_regs: show the address before relocation
    
    After relocation, when error happends, it is hard to track
    ELR and LR with asm file objdumped from elf file.
    
    So subtract the gd->reloc_off the reflect the compliation address.
    
    Change-Id: I1db18049b1e895c74ec75ed6ce77231cf4f03bce
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 082693f4f02ad7a9de192e73feae34e28856b8e3)

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 65e313e844..061f23c652 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,7 +9,9 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
+
 int interrupt_init(void)
 {
 	return 0;
@@ -30,8 +32,13 @@ void show_regs(struct pt_regs *regs)
 {
 	int i;
 
-	printf("ELR:     %lx\n", regs->elr);
-	printf("LR:      %lx\n", regs->regs[30]);
+	if (gd->flags & GD_FLG_RELOC) {
+		printf("ELR:     %lx\n", regs->elr - gd->reloc_off);
+		printf("LR:      %lx\n", regs->regs[30] - gd->reloc_off);
+	} else {
+		printf("ELR:     %lx\n", regs->elr);
+		printf("LR:      %lx\n", regs->regs[30]);
+	}
 	for (i = 0; i < 29; i += 2)
 		printf("x%-2d: %016lx x%-2d: %016lx\n",
 		       i, regs->regs[i], i+1, regs->regs[i+1]);

commit 70b70db64ac992884833f4236132201c16a77c53
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Nov 27 16:06:07 2017 +0900

    UPSTREAM: libfdt: migrate fdt_wip.c to a wrapper of scripts/dtc/libfdt/fdt_wip.c
    
    Now, lib/libfdt/fdt_wip.c is the same as scripts/dtc/libfdt/fdt_wip.c
    
    Change the former to a wrapper of the latter.
    
    Change-Id: Ifce4c63db38146297c14218ef94d226bf6e3bb27
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 26e961c8cfdff00c5c9389d301d9a2eb10eb844c)

diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index 369bbf9ba3..be42e946b7 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -8,6 +8,7 @@
 # Use upstream code.
 obj-y += \
 	fdt.o \
+	fdt_wip.o \
 	fdt_strerror.o \
 	fdt_sw.o \
 	fdt_empty_tree.o \
@@ -19,8 +20,7 @@ obj-$(CONFIG_OF_LIBFDT_OVERLAY) += fdt_overlay.o
 # TODO: split out the local modifiction.
 obj-y += \
 	fdt_ro.o \
-	fdt_rw.o \
-	fdt_wip.o \
+	fdt_rw.o
 
 # U-Boot own file
 obj-y += fdt_region.o
diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index 7274c81b62..6a771d0660 100644
--- a/lib/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
@@ -1,98 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
-					const char *name, int namelen,
-					uint32_t idx, const void *val,
-					int len)
-{
-	void *propval;
-	int proplen;
-
-	propval = fdt_getprop_namelen_w(fdt, nodeoffset, name, namelen,
-					&proplen);
-	if (!propval)
-		return proplen;
-
-	if (proplen < (len + idx))
-		return -FDT_ERR_NOSPACE;
-
-	memcpy((char *)propval + idx, val, len);
-	return 0;
-}
-
-int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
-			const void *val, int len)
-{
-	const void *propval;
-	int proplen;
-
-	propval = fdt_getprop(fdt, nodeoffset, name, &proplen);
-	if (!propval)
-		return proplen;
-
-	if (proplen != len)
-		return -FDT_ERR_NOSPACE;
-
-	return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
-						   strlen(name), 0,
-						   val, len);
-}
-
-static void _fdt_nop_region(void *start, int len)
-{
-	fdt32_t *p;
-
-	for (p = start; (char *)p < ((char *)start + len); p++)
-		*p = cpu_to_fdt32(FDT_NOP);
-}
-
-int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
-{
-	struct fdt_property *prop;
-	int len;
-
-	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (!prop)
-		return len;
-
-	_fdt_nop_region(prop, len + sizeof(*prop));
-
-	return 0;
-}
-
-int _fdt_node_end_offset(void *fdt, int offset)
-{
-	int depth = 0;
-
-	while ((offset >= 0) && (depth >= 0))
-		offset = fdt_next_node(fdt, offset, &depth);
-
-	return offset;
-}
-
-int fdt_nop_node(void *fdt, int nodeoffset)
-{
-	int endoffset;
-
-	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
-	if (endoffset < 0)
-		return endoffset;
-
-	_fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0),
-			endoffset - nodeoffset);
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_wip.c"
diff --git a/tools/Makefile b/tools/Makefile
index 1cf37bd5e1..89827564e6 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -61,11 +61,11 @@ FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
 
 # The following files are synced with upstream DTC.
 # Use synced versions from scripts/dtc/libfdt/.
-LIBFDT_SRCS_SYNCED := fdt.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
+LIBFDT_SRCS_SYNCED := fdt.c fdt_wip.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
 		      fdt_addresses.c fdt_overlay.c
 # The following files are locally modified for U-Boot (unfotunately).
 # Use U-Boot own versions from lib/libfdt/.
-LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_wip.c fdt_rw.c fdt_region.c
+LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_rw.c fdt_region.c
 
 LIBFDT_OBJS := $(addprefix libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_SYNCED))) \
 	       $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_UNSYNCED)))
diff --git a/tools/libfdt/fdt_wip.c b/tools/libfdt/fdt_wip.c
new file mode 100644
index 0000000000..bad73ed9e7
--- /dev/null
+++ b/tools/libfdt/fdt_wip.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_wip.c"

commit e1c372819040cec511ced88ea990c38b91d0e2a0
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Nov 27 16:06:06 2017 +0900

    UPSTREAM: libfdt: move fdt_find_regions() to fdt_region.c from fdt_wip.c
    
    All the other fdt_*_region() functions are located in fdt_region.c,
    while only fdt_find_regions() was added to fdt_wip.c, strangely.
    
    Move it to the suitable place.
    
    Change-Id: I463419815b4132b6e39b5b02a857126201a854fb
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 87be1e9fb4dcc130e90d497cc5ce49c715efc6c2)

diff --git a/lib/libfdt/fdt_region.c b/lib/libfdt/fdt_region.c
index 63099f1d96..5bfc4da370 100644
--- a/lib/libfdt/fdt_region.c
+++ b/lib/libfdt/fdt_region.c
@@ -16,6 +16,135 @@
 
 #include "libfdt_internal.h"
 
+#define FDT_MAX_DEPTH	32
+
+static int str_in_list(const char *str, char * const list[], int count)
+{
+	int i;
+
+	for (i = 0; i < count; i++)
+		if (!strcmp(list[i], str))
+			return 1;
+
+	return 0;
+}
+
+int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
+		     char * const exc_prop[], int exc_prop_count,
+		     struct fdt_region region[], int max_regions,
+		     char *path, int path_len, int add_string_tab)
+{
+	int stack[FDT_MAX_DEPTH] = { 0 };
+	char *end;
+	int nextoffset = 0;
+	uint32_t tag;
+	int count = 0;
+	int start = -1;
+	int depth = -1;
+	int want = 0;
+	int base = fdt_off_dt_struct(fdt);
+
+	end = path;
+	*end = '\0';
+	do {
+		const struct fdt_property *prop;
+		const char *name;
+		const char *str;
+		int include = 0;
+		int stop_at = 0;
+		int offset;
+		int len;
+
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+		stop_at = nextoffset;
+
+		switch (tag) {
+		case FDT_PROP:
+			include = want >= 2;
+			stop_at = offset;
+			prop = fdt_get_property_by_offset(fdt, offset, NULL);
+			str = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
+			if (str_in_list(str, exc_prop, exc_prop_count))
+				include = 0;
+			break;
+
+		case FDT_NOP:
+			include = want >= 2;
+			stop_at = offset;
+			break;
+
+		case FDT_BEGIN_NODE:
+			depth++;
+			if (depth == FDT_MAX_DEPTH)
+				return -FDT_ERR_BADSTRUCTURE;
+			name = fdt_get_name(fdt, offset, &len);
+			if (end - path + 2 + len >= path_len)
+				return -FDT_ERR_NOSPACE;
+			if (end != path + 1)
+				*end++ = '/';
+			strcpy(end, name);
+			end += len;
+			stack[depth] = want;
+			if (want == 1)
+				stop_at = offset;
+			if (str_in_list(path, inc, inc_count))
+				want = 2;
+			else if (want)
+				want--;
+			else
+				stop_at = offset;
+			include = want;
+			break;
+
+		case FDT_END_NODE:
+			include = want;
+			want = stack[depth--];
+			while (end > path && *--end != '/')
+				;
+			*end = '\0';
+			break;
+
+		case FDT_END:
+			include = 1;
+			break;
+		}
+
+		if (include && start == -1) {
+			/* Should we merge with previous? */
+			if (count && count <= max_regions &&
+			    offset == region[count - 1].offset +
+					region[count - 1].size - base)
+				start = region[--count].offset - base;
+			else
+				start = offset;
+		}
+
+		if (!include && start != -1) {
+			if (count < max_regions) {
+				region[count].offset = base + start;
+				region[count].size = stop_at - start;
+			}
+			count++;
+			start = -1;
+		}
+	} while (tag != FDT_END);
+
+	if (nextoffset != fdt_size_dt_struct(fdt))
+		return -FDT_ERR_BADLAYOUT;
+
+	/* Add a region for the END tag and the string table */
+	if (count < max_regions) {
+		region[count].offset = base + start;
+		region[count].size = nextoffset - start;
+		if (add_string_tab)
+			region[count].size += fdt_size_dt_strings(fdt);
+	}
+	count++;
+
+	return count;
+}
+
 /**
  * fdt_add_region() - Add a new region to our list
  * @info:	State information
diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index 01adad0ee9..7274c81b62 100644
--- a/lib/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
@@ -96,132 +96,3 @@ int fdt_nop_node(void *fdt, int nodeoffset)
 			endoffset - nodeoffset);
 	return 0;
 }
-
-#define FDT_MAX_DEPTH	32
-
-static int str_in_list(const char *str, char * const list[], int count)
-{
-	int i;
-
-	for (i = 0; i < count; i++)
-		if (!strcmp(list[i], str))
-			return 1;
-
-	return 0;
-}
-
-int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
-		     char * const exc_prop[], int exc_prop_count,
-		     struct fdt_region region[], int max_regions,
-		     char *path, int path_len, int add_string_tab)
-{
-	int stack[FDT_MAX_DEPTH] = { 0 };
-	char *end;
-	int nextoffset = 0;
-	uint32_t tag;
-	int count = 0;
-	int start = -1;
-	int depth = -1;
-	int want = 0;
-	int base = fdt_off_dt_struct(fdt);
-
-	end = path;
-	*end = '\0';
-	do {
-		const struct fdt_property *prop;
-		const char *name;
-		const char *str;
-		int include = 0;
-		int stop_at = 0;
-		int offset;
-		int len;
-
-		offset = nextoffset;
-		tag = fdt_next_tag(fdt, offset, &nextoffset);
-		stop_at = nextoffset;
-
-		switch (tag) {
-		case FDT_PROP:
-			include = want >= 2;
-			stop_at = offset;
-			prop = fdt_get_property_by_offset(fdt, offset, NULL);
-			str = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
-			if (str_in_list(str, exc_prop, exc_prop_count))
-				include = 0;
-			break;
-
-		case FDT_NOP:
-			include = want >= 2;
-			stop_at = offset;
-			break;
-
-		case FDT_BEGIN_NODE:
-			depth++;
-			if (depth == FDT_MAX_DEPTH)
-				return -FDT_ERR_BADSTRUCTURE;
-			name = fdt_get_name(fdt, offset, &len);
-			if (end - path + 2 + len >= path_len)
-				return -FDT_ERR_NOSPACE;
-			if (end != path + 1)
-				*end++ = '/';
-			strcpy(end, name);
-			end += len;
-			stack[depth] = want;
-			if (want == 1)
-				stop_at = offset;
-			if (str_in_list(path, inc, inc_count))
-				want = 2;
-			else if (want)
-				want--;
-			else
-				stop_at = offset;
-			include = want;
-			break;
-
-		case FDT_END_NODE:
-			include = want;
-			want = stack[depth--];
-			while (end > path && *--end != '/')
-				;
-			*end = '\0';
-			break;
-
-		case FDT_END:
-			include = 1;
-			break;
-		}
-
-		if (include && start == -1) {
-			/* Should we merge with previous? */
-			if (count && count <= max_regions &&
-			    offset == region[count - 1].offset +
-					region[count - 1].size - base)
-				start = region[--count].offset - base;
-			else
-				start = offset;
-		}
-
-		if (!include && start != -1) {
-			if (count < max_regions) {
-				region[count].offset = base + start;
-				region[count].size = stop_at - start;
-			}
-			count++;
-			start = -1;
-		}
-	} while (tag != FDT_END);
-
-	if (nextoffset != fdt_size_dt_struct(fdt))
-		return -FDT_ERR_BADLAYOUT;
-
-	/* Add a region for the END tag and the string table */
-	if (count < max_regions) {
-		region[count].offset = base + start;
-		region[count].size = nextoffset - start;
-		if (add_string_tab)
-			region[count].size += fdt_size_dt_strings(fdt);
-	}
-	count++;
-
-	return count;
-}

commit 3bf2315f28b80494c8354144dc353b5437e34585
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Mon Nov 27 00:47:09 2017 +0000

    UPSTREAM: armv8: shrink exception table code
    
    In the moment our exception entry code needs 34 instructions, so we
    can't use put it directly into the table entry, which offers "only"
    32 instructions there. Right now we just put an unconditional branch
    there, then use a macro to place the 34 instructions *per entry* after
    that. That effectivly doubles the size of our exception table, which
    is quite a waste, given that we use it mostly for debugging purposes.
    
    Since the register saving part is actually identical, let's just convert
    that macro into a function, and "bl" into it directly from the exception
    slot, of course after having saved at least the original LR.
    This saves us about 950 bytes of code, which is quite a relief for some
    tight SPLs, in particular the 64-bit Allwinner ones.
    
    Change-Id: I3d156413396f2a304773ef3a202f73d47cf65531
    Signed-off-by: Andre Przywara <andre.przywara@arm.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 78ad457b2dbd0fe6cdc7ea42a69774a72ed007b9)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 4f4f526f93..8c7c1d3eb8 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -11,13 +11,66 @@
 #include <asm/macro.h>
 #include <linux/linkage.h>
 
+/*
+ * Exception vectors.
+ */
+	.align	11
+	.globl	vectors
+vectors:
+	.align	7		/* Current EL Synchronous Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_sync
+	b	exception_exit
+
+	.align	7		/* Current EL IRQ Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_irq
+	b	exception_exit
+
+	.align	7		/* Current EL FIQ Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_fiq
+	b	exception_exit
+
+	.align	7		/* Current EL Error Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_error
+	b	exception_exit
+
+	.align	7		 /* Current EL Synchronous Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_sync
+	b	exception_exit
+
+	.align	7		 /* Current EL IRQ Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_irq
+	b	exception_exit
+
+	.align	7		 /* Current EL FIQ Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_fiq
+	b	exception_exit
+
+	.align	7		 /* Current EL Error Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_error
+	b	exception_exit
+
 /*
  * Enter Exception.
  * This will save the processor state that is ELR/X0~X30
  * to the stack frame.
  */
-.macro	exception_entry
-	stp	x29, x30, [sp, #-16]!
+_exception_entry:
 	stp	x27, x28, [sp, #-16]!
 	stp	x25, x26, [sp, #-16]!
 	stp	x23, x24, [sp, #-16]!
@@ -46,78 +99,8 @@
 0:
 	stp	x2, x0, [sp, #-16]!
 	mov	x0, sp
-.endm
+	ret
 
-/*
- * Exception vectors.
- */
-	.align	11
-	.globl	vectors
-vectors:
-	.align	7
-	b	_do_bad_sync	/* Current EL Synchronous Thread */
-
-	.align	7
-	b	_do_bad_irq	/* Current EL IRQ Thread */
-
-	.align	7
-	b	_do_bad_fiq	/* Current EL FIQ Thread */
-
-	.align	7
-	b	_do_bad_error	/* Current EL Error Thread */
-
-	.align	7
-	b	_do_sync	/* Current EL Synchronous Handler */
-
-	.align	7
-	b	_do_irq		/* Current EL IRQ Handler */
-
-	.align	7
-	b	_do_fiq		/* Current EL FIQ Handler */
-
-	.align	7
-	b	_do_error	/* Current EL Error Handler */
-
-
-_do_bad_sync:
-	exception_entry
-	bl	do_bad_sync
-	b	exception_exit
-
-_do_bad_irq:
-	exception_entry
-	bl	do_bad_irq
-	b	exception_exit
-
-_do_bad_fiq:
-	exception_entry
-	bl	do_bad_fiq
-	b	exception_exit
-
-_do_bad_error:
-	exception_entry
-	bl	do_bad_error
-	b	exception_exit
-
-_do_sync:
-	exception_entry
-	bl	do_sync
-	b	exception_exit
-
-_do_irq:
-	exception_entry
-	bl	do_irq
-	b	exception_exit
-
-_do_fiq:
-	exception_entry
-	bl	do_fiq
-	b	exception_exit
-
-_do_error:
-	exception_entry
-	bl	do_error
-	b	exception_exit
 
 exception_exit:
 	ldp	x2, x0, [sp],#16

commit 43ae10fd4b95785cda52ce9aff784e676d3b071b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Sat Dec 2 00:19:14 2017 +0100

    UPSTREAM: rockchip: clk: rk3128: fix DCLK_VOP_DIV_CON_MASK
    
    The DCLK_VOP_DIV_CON_MASK should cover only bits 8 through 15.
    Fix this to remove an "integer-overflow on shifted constant" warning.
    
    Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
    Change-Id: I6132623ce069ec6c6cd59a01580e795142864862
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4fc495e9e2e497afee383294a6ee9212e9a8bd73)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 8970ed2ba3..9bd6409a1e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -188,7 +188,7 @@ enum {
 	DCLK_VOP_SEL_MASK          = 1 << DCLK_VOP_SEL_SHIFT,
 	DCLK_VOP_PLL_SEL_CPLL           = 0,
 	DCLK_VOP_DIV_CON_SHIFT          = 8,
-	DCLK_VOP_DIV_CON_MASK           = 0xfff << DCLK_VOP_DIV_CON_SHIFT,
+	DCLK_VOP_DIV_CON_MASK           = 0xff << DCLK_VOP_DIV_CON_SHIFT,
 
 	/* CRU_CLKSEL31_CON */
 	VIO0_PLL_SHIFT		= 5,

commit b10789f201da9e44f3a31936df7d311c2ce75c83
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Sat Dec 2 00:14:55 2017 +0100

    UPSTREAM: rockchip: clk: rk3128: fix NANDC_PLL_SEL_MASK
    
    The PLL selector field for NANDC is only 2 bits wide.
    This fixes an 'int-overflow on shift' warning.
    
    Fixes: 9246d9e ("rockchip: rk3128: add clock driver")
    Change-Id: I4d6d7c51633eb7cd0fbfb1c6b7c501cf8c0fcf81
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cd401abcd532c59cdaaf6ffeed762386c1813e58)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 9f5d864673..8970ed2ba3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -137,7 +137,7 @@ enum {
 
 	/* CRU_CLK_SEL2_CON */
 	NANDC_PLL_SEL_SHIFT	= 14,
-	NANDC_PLL_SEL_MASK	= 7 << NANDC_PLL_SEL_SHIFT,
+	NANDC_PLL_SEL_MASK	= 3 << NANDC_PLL_SEL_SHIFT,
 	NANDC_PLL_SEL_CPLL	= 0,
 	NANDC_PLL_SEL_GPLL,
 	NANDC_CLK_DIV_SHIFT	= 8,

commit 8ebcf66b4889f476dd11cabb8a77e08866b4db9c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 28 17:56:12 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: add /config/sysreset-gpio property
    
    On the RK3399-Q7, we want to trigger a full platform reset (so the
    various software stacks supported don't have to deal with the same
    complexities over and over again) in case that anything other than a
    power-on reset occurred.
    
    To do so, this defines the /config/sysreset-gpio property and has it
    point to a GPIO that will perform a power-on reset of the entire
    platform.
    
    Change-Id: Ic7e6b6871da4064c8ea4a5e62d5b55dfd80cf3e8
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5f104178bf713615dc404fdfcf0fb53d89c66a07)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 0f5e6ac57e..d2c961e317 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -16,6 +16,7 @@
 		u-boot,mmc-env-offset = <0x4000>;      /* @  16KB */
 		u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
 		u-boot,boot-led = "module_led";
+		sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
 	};
 
 	chosen {
@@ -551,6 +552,10 @@
 	status = "okay";
 };
 
+&gpio1 {
+	u-boot,dm-pre-reloc;
+};
+
 &gpio3 {
 	u-boot,dm-pre-reloc;
 };

commit 23429be340c866dcc2f342f9a677829b4146f67f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 28 17:56:11 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: add code to allow forcing a power-on reset
    
    The reset circuitry in the RK3399 only resets 'almost all logic' when
    a software reset is performed.  To make our software maintenance
    easier in the future, we want to have the option (controlled by a DTS
    property) to force all reset causes other than a power-on reset to
    trigger a power-on reset via a GPIO trigger.
    
    This adds the necessary support to the rk3399-puma (i.e. RK3399-Q7)
    board-support and the documentation for the new property
    (sysreset-gpio) within the /config-node.
    
    Change-Id: If51b78c2ef6ca929c2d108346e21697f7e9b36db
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ae0d33a7291a164a11ae034bcf4f71226b2bef48)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 7f2dd65d44..0ad267cdd0 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -11,7 +11,10 @@
 #include <usb.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
+#include <asm/gpio.h>
 #include <asm/setup.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3399.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
 #include <u-boot/sha256.h>
@@ -33,9 +36,50 @@ int board_init(void)
 	return 0;
 }
 
+static void rk3399_force_power_on_reset(void)
+{
+	ofnode node;
+	struct gpio_desc sysreset_gpio;
+
+	debug("%s: trying to force a power-on reset\n", __func__);
+
+	node = ofnode_path("/config");
+	if (!ofnode_valid(node)) {
+		debug("%s: no /config node?\n", __func__);
+		return;
+	}
+
+	if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0,
+				       &sysreset_gpio, GPIOD_IS_OUT)) {
+		debug("%s: could not find a /config/sysreset-gpio\n", __func__);
+		return;
+	}
+
+	dm_gpio_set_value(&sysreset_gpio, 1);
+}
+
 void spl_board_init(void)
 {
 	int  ret;
+	struct rk3399_cru *cru = rockchip_get_cru();
+
+	/*
+	 * The RK3399 resets only 'almost all logic' (see also in the TRM
+	 * "3.9.4 Global software reset"), when issuing a software reset.
+	 * This may cause issues during boot-up for some configurations of
+	 * the application software stack.
+	 *
+	 * To work around this, we test whether the last reset reason was
+	 * a power-on reset and (if not) issue an overtemp-reset to reset
+	 * the entire module.
+	 *
+	 * While this was previously fixed by modifying the various places
+	 * that could generate a software reset (e.g. U-Boot's sysreset
+	 * driver, the ATF or Linux), we now have it here to ensure that
+	 * we no longer have to track this through the various components.
+	 */
+	if (cru->glb_rst_st != 0)
+		rk3399_force_power_on_reset();
 
 	/*
 	 * Turning the eMMC and SPI back on (if disabled via the Qseven
diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt
index 15e4349c19..6cdc16da5b 100644
--- a/doc/device-tree-bindings/config.txt
+++ b/doc/device-tree-bindings/config.txt
@@ -46,3 +46,9 @@ u-boot,spl-payload-offset
 	If present (and SPL is controlled by the device-tree), this allows
 	to override the CONFIG_SYS_SPI_U_BOOT_OFFS setting using a value
 	from the device-tree.
+
+sysreset-gpio
+	If present (and supported by the specific board), indicates a
+	GPIO that can be set to trigger a system reset.  It is assumed
+	that such a system reset will effect a complete platform reset,
+	being roughly equivalent to a power-on reset.

commit 0c1b79c3645cdc233dc88d65326c70afa42a6924
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 17:15:19 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: add a 'tsd, usb-port-power' stringlist for USB1
    
    USB1 is connected to the on-module USB 3.0 hub and power to the hub
    (actually it's a reset signal, modeled as a fixed regulator, that will
    be released) should be enabled only during the first probing of the
    device to avoid the hub from entering its low-power mode (where it
    tries to attach on a fixed interval, but we always miss the timeslot
    when U-Boot has the controller listening).
    
    This adds a 'tsd,usb-port-power' stringlist to enable the
    infrastructure in the board-specific usb_hub_reset_devices to find and
    control the fixed regulator associated with control of the USB hub.
    
    Change-Id: I6624aa6b0a847eb0d26013b5cda5e26edc3630f5
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 884ad05d34c49ac6c8e21346a63a627c6c9d4c52)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 96bd4fec01..0f5e6ac57e 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -544,6 +544,7 @@
 
 &dwc3_typec1 {
 	status = "okay";
+	tsd,usb-port-power = "usbhub_enable";
 };
 
 &vopb {

commit 0c58140478dcd4ee6cf817f8d011132706ee83d7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 17:15:18 2017 +0100

    UPSTREAM: rockchip: rk3399-puma: implement usb_hub_reset_devices for puma-rk3399
    
    For some versions of the RK3399-Q7 (at least revisions v1.1 and v1.2
    are affected), we need to turn on the power for the port connected to
    the on-module USB hub only when the device is probed for the first
    time to ensure that the hub does not enter a low-power mode (that
    U-Boot's USB stack can't deal with).
    
    Note that this is needed for U-Boot only, as Linux eventually manages
    to attach the hub even when it has entered into its low-power state
    (when the hub wakes up the next time) after a few seconds.
    
    Change-Id: I4eca5fe6953ae77ff12c45248d156de4a890803c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 614539d4f79669413e3336f349c487b605f2bb6b)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 2b4988e2d2..7f2dd65d44 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -7,12 +7,13 @@
 #include <common.h>
 #include <dm.h>
 #include <misc.h>
+#include <spl.h>
+#include <usb.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
 #include <asm/setup.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
-#include <spl.h>
 #include <u-boot/sha256.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -158,3 +159,70 @@ void get_board_serial(struct tag_serialnr *serialnr)
 	serialnr->low = (u32)(serial & 0xffffffff);
 }
 #endif
+
+/**
+ * Switch power at an external regulator (for our root hub).
+ *
+ * @param ctrl pointer to the xHCI controller
+ * @param port port number as in the control message (one-based)
+ * @param enable boolean indicating whether to enable or disable power
+ * @return returns 0 on success, an error-code on failure
+ */
+static int board_usb_port_power_set(struct udevice *dev, int port,
+				    bool enable)
+{
+#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_REGULATOR)
+	/* We start counting ports at 0, while USB counts from 1. */
+	int index = port - 1;
+	const char *regname = NULL;
+	struct udevice *regulator;
+	const char *prop = "tsd,usb-port-power";
+	int ret;
+
+	debug("%s: ctrl '%s' port %d enable %s\n", __func__,
+	      dev_read_name(dev), port, enable ? "true" : "false");
+
+	ret = dev_read_string_index(dev, prop, index, &regname);
+	if (ret < 0) {
+		debug("%s: ctrl '%s' port %d: no entry in '%s'\n",
+		      __func__, dev_read_name(dev), port, prop);
+		return ret;
+	}
+
+	ret = regulator_get_by_platname(regname, &regulator);
+	if (ret) {
+		debug("%s: ctrl '%s' port %d: could not get regulator '%s'\n",
+		      __func__, dev_read_name(dev), port, regname);
+		return ret;
+	}
+
+	regulator_set_enable(regulator, enable);
+	return 0;
+#else
+	return -ENOTSUPP;
+#endif
+}
+
+void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
+{
+	struct udevice *dev = hub->pusb_dev->dev;
+	struct udevice *ctrl;
+
+	/* We are only interested in our root-hubs */
+	if (usb_hub_is_root_hub(dev) == false)
+		return;
+
+	ctrl = usb_get_bus(dev);
+	if (!ctrl) {
+		debug("%s: could not retrieve ctrl for hub\n", __func__);
+		return;
+	}
+
+	/*
+	 * To work around an incompatibility between the single-threaded
+	 * USB stack in U-Boot and (a strange low-power mode of) the USB
+	 * hub we have on-module, we need to delay powering on the hub
+	 * until the first time the port is probed.
+	 */
+	board_usb_port_power_set(ctrl, port, true);
+}

commit 641aab967b7c4ba9d419a3833128311e60ba2a9b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 27 00:18:42 2017 +0100

    UPSTREAM: MAINTAINERS: update maintained files for Rockchip
    
    With some of the recent cleanups (e.g. moving the DRAM controller
    drivers for Rockchip devices to drivers/ram/rockchip), the files
    and paths listed in MAINTAINERS no longer covered what really is
    looked after as part of the Rockchip port.
    
    This commit updates the files/paths listed in MAINTAINERS for the
    Rockchip port.  I am certain, though, that this will have missed some
    additional paths that should have been included...
    
    Change-Id: I6ad5101bff84f5e33086626c28d20aaab8693c8a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8b45193a2243c2e86e0c473e74bad7b08072b522)

diff --git a/MAINTAINERS b/MAINTAINERS
index 175a7f0d1c..ef5ae23ea3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -136,8 +136,20 @@ M:	Simon Glass <sjg@chromium.org>
 M:	Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
 S:	Maintained
 T:	git git://git.denx.de/u-boot-rockchip.git
+F:	arch/arm/include/asm/arch-rockchip/
 F:	arch/arm/mach-rockchip/
 F:	board/rockchip/
+F:	drivers/clk/rockchip/
+F:	drivers/gpio/rk_gpio.c
+F:	drivers/misc/rockchip-efuse.c
+F:	drivers/pinctrl/rockchip/
+F:	drivers/ram/rockchip/
+F:	drivers/sysreset/sysreset_rockchip.c
+F:	tools/rkcommon.c
+F:	tools/rkcommon.h
+F:	tools/rkimage.c
+F:	tools/rksd.c
+F:	tools/rkspi.c
 
 ARM SAMSUNG
 M:	Minkyu Kang <mk7.kang@samsung.com>

commit 4c0727fd0eeea63d2c8ef85c767123e14e223457
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Nov 21 23:29:40 2017 +0100

    UPSTREAM: env: suppress a spurious warning with GCC 7.1
    
    GCC 7.1 seems to be smart enough to track val through the various
    static inline functions, but not smart enough to see that val will
    always be initialised when no error is returned.  This triggers
    the following warning:
      env/mmc.c: In function 'mmc_get_env_addr':
      env/mmc.c:121:12: warning: 'val' may be used uninitialized in this function [-Wmaybe-uninitialized]
    
    To make it easier for compiler to understand what is going on, let's
    initialise val.
    
    Change-Id: I9e78b4a72f8124bde37946aaad0caa82c064ec70
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fd374665c9b724bb3eb0da32db0bb7ecc5cf1337)

diff --git a/env/mmc.c b/env/mmc.c
index 3343f9e9f6..ed7bcf16ae 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -73,7 +73,7 @@ static inline s64 mmc_offset(int copy)
 		.partition = "u-boot,mmc-env-partition",
 		.offset = "u-boot,mmc-env-offset",
 	};
-	s64 val, defvalue;
+	s64 val = 0, defvalue;
 	const char *propname;
 	const char *str;
 	int err;

commit 1759abcc9459a3d0b8ba1b8c6c0e7af67fd322b9
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Nov 19 23:49:21 2017 +0100

    UPSTREAM: fs: avoid possible NULL dereference in fs_devread
    
    It is unwise to first dereference a variable
    and then to check if it was NULL.
    
    Change-Id: I2c28e092380c649874fab06f0b4e453466e2d16c
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Marek Behun <marek.behun@nic.cz>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 24f48416dfe1d827dcf759d6cd0e7a8e5c67e321)

diff --git a/fs/fs_internal.c b/fs/fs_internal.c
index 58b441030c..5cdd272c9d 100644
--- a/fs/fs_internal.c
+++ b/fs/fs_internal.c
@@ -15,12 +15,13 @@ int fs_devread(struct blk_desc *blk, disk_partition_t *partition,
 	       lbaint_t sector, int byte_offset, int byte_len, char *buf)
 {
 	unsigned block_len;
-	int log2blksz = blk->log2blksz;
+	int log2blksz;
 	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (blk ? blk->blksz : 0));
 	if (blk == NULL) {
 		printf("** Invalid Block Device Descriptor (NULL)\n");
 		return 0;
 	}
+	log2blksz = blk->log2blksz;
 
 	/* Check partition boundaries */
 	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))

commit 6ff3d5909f1d5d23d1e83218f7a9ec6bf625e3fc
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Nov 19 23:25:32 2017 +0100

    UPSTREAM: cmd: blk: remove unreachable code
    
    Remove an unreachable return statement.
    
    Change-Id: I523a83571eade593a08b685519757c1df4ffab25
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 254eedee7f383066b70ac4da01bc792a3256a4b3)

diff --git a/cmd/blk_common.c b/cmd/blk_common.c
index 0c0c23eb37..bf2f626dd6 100644
--- a/cmd/blk_common.c
+++ b/cmd/blk_common.c
@@ -95,8 +95,6 @@ int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 		} else {
 			return CMD_RET_USAGE;
 		}
-
-		return 0;
 	}
 }
 #endif

commit acda6ec11c7b3a44c477cef6ace38b671226059c
Author: Marek Vasut <marek.vasut+renesas@gmail.com>
Date:   Mon Nov 27 05:32:42 2017 +0100

    UPSTREAM: fdtdec: Support parsing multiple /memory nodes
    
    It is legal to have multiple /memory nodes in a device tree . Currently,
    fdtdec_setup_memory_size() only supports parsing the first node . This
    patch extends the function such that if a particular /memory node does
    no longer have further "reg" entries and CONFIG_NR_DRAM_BANKS still
    allows for more DRAM banks, the code moves on to the next memory node
    and checks it's "reg"s. This makes it possible to handle both systems
    with single memory node with multiple entries and systems with multiple
    memory nodes with single entry.
    
    Change-Id: Idc8b4bebc916b6a6bc0d2deb3c4008921d268d1e
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Tom Rini <trini@konsulko.com>
    Cc: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 942ee0933e881ff500aae7e42309bf6abbc495d4)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 8edc468902..ae721c29bf 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1175,21 +1175,33 @@ int fdtdec_setup_memory_size(void)
 #if defined(CONFIG_NR_DRAM_BANKS)
 int fdtdec_setup_memory_banksize(void)
 {
-	int bank, ret, mem;
+	int bank, ret, mem, reg = 0;
 	struct fdt_resource res;
 
-	mem = fdt_path_offset(gd->fdt_blob, "/memory");
+	mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type",
+					    "memory", 7);
 	if (mem < 0) {
 		debug("%s: Missing /memory node\n", __func__);
 		return -EINVAL;
 	}
 
 	for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
-		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res);
-		if (ret == -FDT_ERR_NOTFOUND)
-			break;
-		if (ret != 0)
+		ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
+		if (ret == -FDT_ERR_NOTFOUND) {
+			reg = 0;
+			mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
+							    "device_type",
+							    "memory", 7);
+			if (mem == -FDT_ERR_NOTFOUND)
+				break;
+
+			ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
+			if (ret == -FDT_ERR_NOTFOUND)
+				break;
+		}
+		if (ret != 0) {
 			return -EINVAL;
+		}
 
 		gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
 		gd->bd->bi_dram[bank].size =

commit 1b48bbdd201e99148614d171974c59e29dda5755
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Nov 22 02:38:11 2017 +0900

    UPSTREAM: bitops: collect BIT macros to include/linux/bitops.h
    
    Same macros are defined in various places.  Collect them into
    include/linux/bitops.h like Linux.
    
    Change-Id: I81d12e8c8151c6eb29499d2b5cd61ed782500492
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ed3986ca30972c94f0076f88c948406ce030a05c)

diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
index 03fd46b724..66e206dd52 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
@@ -13,6 +13,8 @@
 #ifndef _SUNXI_DRAM_SUN8I_H3_H
 #define _SUNXI_DRAM_SUN8I_H3_H
 
+#include <linux/bitops.h>
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 control register */
 	u32 cr_r1;		/* 0x04 rank 1 control register (R40 only) */
@@ -211,7 +213,6 @@ struct sunxi_mctl_ctl_reg {
  * the 32-bit wide access consists of. Also three control signals can be
  * adjusted individually.
  */
-#define BITS_PER_BYTE		8
 #define NR_OF_BYTE_LANES	(32 / BITS_PER_BYTE)
 /* The eight data lines (DQn) plus DM, DQS and DQSN */
 #define LINES_PER_BYTE_LANE	(BITS_PER_BYTE + 3)
diff --git a/arch/arm/mach-kirkwood/include/mach/gpio.h b/arch/arm/mach-kirkwood/include/mach/gpio.h
index aa8c5da36d..ac2397dd4c 100644
--- a/arch/arm/mach-kirkwood/include/mach/gpio.h
+++ b/arch/arm/mach-kirkwood/include/mach/gpio.h
@@ -15,10 +15,6 @@
 #ifndef __KIRKWOOD_GPIO_H
 #define __KIRKWOOD_GPIO_H
 
-/* got from kernel include/linux/bitops.h */
-#define BITS_PER_BYTE 8
-#define BITS_TO_LONGS(nr)	DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
-
 #define GPIO_MAX		50
 #define GPIO_OFF(pin)		(((pin) >> 5) ? 0x0040 : 0x0000)
 #define GPIO_OUT(pin)		(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
diff --git a/drivers/gpio/kw_gpio.c b/drivers/gpio/kw_gpio.c
index 43b27e3fea..cc26cc1658 100644
--- a/drivers/gpio/kw_gpio.c
+++ b/drivers/gpio/kw_gpio.c
@@ -14,7 +14,7 @@
  */
 
 #include <common.h>
-#include <asm/bitops.h>
+#include <linux/bitops.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/gpio.h>
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index b025001337..c66c33d3c2 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -897,8 +897,6 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	return status;
 }
 
-#define BITS_PER_BYTE 8
-
 /**
  * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
  * @buf: buffer to test
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 576b15dc53..a47f6d17bb 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -5,9 +5,16 @@
 #include <asm-generic/bitsperlong.h>
 #include <linux/compiler.h>
 
+#ifdef	__KERNEL__
 #define BIT(nr)			(1UL << (nr))
+#define BIT_ULL(nr)		(1ULL << (nr))
 #define BIT_MASK(nr)		(1UL << ((nr) % BITS_PER_LONG))
 #define BIT_WORD(nr)		((nr) / BITS_PER_LONG)
+#define BIT_ULL_MASK(nr)	(1ULL << ((nr) % BITS_PER_LONG_LONG))
+#define BIT_ULL_WORD(nr)	((nr) / BITS_PER_LONG_LONG)
+#define BITS_PER_BYTE		8
+#define BITS_TO_LONGS(nr)	DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
+#endif
 
 /*
  * Create a contiguous bitmask starting at bit position @l and ending at
diff --git a/include/usb/lin_gadget_compat.h b/include/usb/lin_gadget_compat.h
index 4a01585f80..d0d71f7c32 100644
--- a/include/usb/lin_gadget_compat.h
+++ b/include/usb/lin_gadget_compat.h
@@ -10,12 +10,10 @@
 #ifndef __LIN_COMPAT_H__
 #define __LIN_COMPAT_H__
 
+#include <linux/bitops.h>
 #include <linux/compat.h>
 
 /* common */
-#define BITS_PER_BYTE				8
-#define BITS_TO_LONGS(nr) \
-	DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
 #define DECLARE_BITMAP(name, bits) \
 	unsigned long name[BITS_TO_LONGS(bits)]
 

commit 008a6da3248a18f416d8858250401b7352fe1275
Author: Michal Simek <michal.simek@xilinx.com>
Date:   Fri Oct 21 12:58:17 2016 +0200

    UPSTREAM: tools: mkimage: Extend mkimage to also include pmufw
    
    The patch is adding external pmufw "Platform Management Unit firmware"
    to boot.bin image. Boot.bin is a Xilinx format which bootrom is capable
    to read and boot the system. pmufw is copied to the header data section
    follows by u-boot-spl.bin. pmufw is consumed by PMU unit (Microblaze)
    and SPL runs on a53-0.
    
    This is generated command line when PMUFW_INIT_FILE is setup.
    
    ./tools/mkimage -T zynqmpimage -R ./"" -n
    ./"board/xilinx/zynqmp/pmufw.bin" -d spl/u-boot-spl.bin spl/boot.bin
    
    Change-Id: I74fc17513dd99b876ab9c08ded6ad41a7b0cd3de
    Signed-off-by: Michal Simek <michal.simek@xilinx.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c85a6b79d10ed8a098997370cbc4fb233ddcb13b)

diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig
index 5ffc9f6c86..22902f6a01 100644
--- a/arch/arm/cpu/armv8/zynqmp/Kconfig
+++ b/arch/arm/cpu/armv8/zynqmp/Kconfig
@@ -50,6 +50,14 @@ config BOOT_INIT_FILE
 	  Add register writes to boot.bin format (max 256 pairs).
 	  Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
 
+config PMUFW_INIT_FILE
+	string "PMU firmware"
+	depends on SPL
+	default ""
+	help
+	  Include external PMUFW (Platform Management Unit FirmWare) to
+	  a Xilinx bootable image (boot.bin).
+
 config ZYNQMP_USB
 	bool "Configure ZynqMP USB"
 
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index ca044767a0..b5e7019ea3 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -167,7 +167,8 @@ ifdef CONFIG_ARCH_ZYNQ
 MKIMAGEFLAGS_boot.bin = -T zynqimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE)
 endif
 ifdef CONFIG_ARCH_ZYNQMP
-MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE)
+MKIMAGEFLAGS_boot.bin = -T zynqmpimage -R $(srctree)/$(CONFIG_BOOT_INIT_FILE) \
+	-n $(srctree)/$(CONFIG_PMUFW_INIT_FILE)
 endif
 
 spl/boot.bin: $(obj)/u-boot-spl.bin FORCE
diff --git a/tools/zynqmpimage.c b/tools/zynqmpimage.c
index 0c9a3daddd..74bd5f5ccc 100644
--- a/tools/zynqmpimage.c
+++ b/tools/zynqmpimage.c
@@ -99,6 +99,8 @@ struct zynqmp_header {
 };
 
 static struct zynqmp_header zynqmpimage_header;
+static void *dynamic_header;
+static FILE *fpmu;
 
 static uint32_t zynqmpimage_checksum(struct zynqmp_header *ptr)
 {
@@ -181,6 +183,13 @@ static void zynqmpimage_print_header(const void *ptr)
 	printf("Image Size   : %lu bytes (%lu bytes packed)\n",
 	       (unsigned long)le32_to_cpu(zynqhdr->image_size),
 	       (unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
+
+	if (zynqhdr->pfw_image_length)
+		printf("PMUFW Size   : %lu bytes (%lu bytes packed)\n",
+		       (unsigned long)le32_to_cpu(zynqhdr->pfw_image_length),
+		       (unsigned long)le32_to_cpu(
+				zynqhdr->total_pfw_image_length));
+
 	printf("Image Load   : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
 	printf("Checksum     : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
 
@@ -203,6 +212,8 @@ static void zynqmpimage_print_header(const void *ptr)
 		       le32_to_cpu(zynqhdr->register_init[i].address),
 		       le32_to_cpu(zynqhdr->register_init[i].data));
 	}
+
+	free(dynamic_header);
 }
 
 static int zynqmpimage_check_params(struct image_tool_params *params)
@@ -234,6 +245,44 @@ static int zynqmpimage_check_image_types(uint8_t type)
 	return EXIT_FAILURE;
 }
 
+static int fsize(FILE *fp)
+{
+	int size;
+	int origin = ftell(fp);
+
+	fseek(fp, 0L, SEEK_END);
+	size = ftell(fp);
+
+	/* going back */
+	fseek(fp, origin, SEEK_SET);
+
+	return size;
+}
+
+static void zynqmpimage_pmufw(struct zynqmp_header *zynqhdr,
+			      const char *filename)
+{
+	uint32_t size;
+
+	/* Setup PMU fw size */
+	zynqhdr->pfw_image_length = fsize(fpmu);
+	zynqhdr->total_pfw_image_length = zynqhdr->pfw_image_length;
+
+	zynqhdr->image_size -= zynqhdr->pfw_image_length;
+	zynqhdr->image_stored_size -= zynqhdr->total_pfw_image_length;
+
+	/* Read the whole PMUFW to the header */
+	size = fread(&zynqhdr->__reserved4[66], 1,
+		     zynqhdr->pfw_image_length, fpmu);
+	if (size != zynqhdr->pfw_image_length) {
+		fprintf(stderr, "Cannot read PMUFW file: %s\n", filename);
+		fclose(fpmu);
+		exit(1);
+	}
+
+	fclose(fpmu);
+}
+
 static void zynqmpimage_parse_initparams(struct zynqmp_header *zynqhdr,
 	const char *filename)
 {
@@ -288,6 +337,10 @@ static void zynqmpimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 	if (params->eflag)
 		zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
 
+	/* PMUFW */
+	if (fpmu)
+		zynqmpimage_pmufw(zynqhdr, params->imagename);
+
 	/* User can pass in text file with init list */
 	if (strlen(params->imagename2))
 		zynqmpimage_parse_initparams(zynqhdr, params->imagename2);
@@ -295,6 +348,50 @@ static void zynqmpimage_set_header(void *ptr, struct stat *sbuf, int ifd,
 	zynqhdr->checksum = zynqmpimage_checksum(zynqhdr);
 }
 
+static int zynqmpimage_vrec_header(struct image_tool_params *params,
+				   struct image_type_params *tparams)
+{
+	struct stat path_stat;
+	char *filename = params->imagename;
+	int err;
+
+	/* Handle static case without PMUFW */
+	tparams->header_size = sizeof(struct zynqmp_header);
+	tparams->hdr = (void *)&zynqmpimage_header;
+
+	/* PMUFW name is passed via params->imagename */
+	if (strlen(filename) == 0)
+		return EXIT_SUCCESS;
+
+	fpmu = fopen(filename, "r");
+	if (!fpmu) {
+		fprintf(stderr, "Cannot open PMUFW file: %s\n", filename);
+		return EXIT_FAILURE;
+	}
+
+	err = fstat(fileno(fpmu), &path_stat);
+	if (err) {
+		fclose(fpmu);
+		fpmu = NULL;
+		return EXIT_FAILURE;
+	}
+
+	if (!S_ISREG(path_stat.st_mode)) {
+		fclose(fpmu);
+		fpmu = NULL;
+		return EXIT_FAILURE;
+	}
+
+	/* Increase header size by PMUFW file size */
+	tparams->header_size += fsize(fpmu);
+
+	/* Allocate buffer with space for PMUFW */
+	dynamic_header = calloc(1, tparams->header_size);
+	tparams->hdr = dynamic_header;
+
+	return EXIT_SUCCESS;
+}
+
 U_BOOT_IMAGE_TYPE(
 	zynqmpimage,
 	"Xilinx ZynqMP Boot Image support",
@@ -307,5 +404,5 @@ U_BOOT_IMAGE_TYPE(
 	NULL,
 	zynqmpimage_check_image_types,
 	NULL,
-	NULL
+	zynqmpimage_vrec_header
 );

commit 0f68ddd14e313f6c1bc57049f6bfa4616ca75024
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 14:44:59 2017 +0100

    UPSTREAM: rockchip: defconfig: puma-rk3399: bypass ADC-based boot_mode check
    
    The boot (and fallback/emergency boot) concept for the RK3399-Q7
    differs from Rockchip's reference platforms.
    
    On the RK3399-Q7, some of this functionality is present in the
    bootloader itself (and configurable); some is backed in hardware by
    the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks
    (i.e. either an external boot bypassing on-module memories or falling
    back to the BROM for USB recovery).
    
    In summary: the ADC-based boot_mode check does not apply for the
    RK3399-Q7 and we therefore disable it (in this commit) by setting
    CONFIG_BOOT_MODE_REG to 0.
    
    Change-Id: Iad0aace3a6f789c7fbed55fe73480572b33df824
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e5ee24dda20af5dc87971b497268f9fb1c83027e)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index c808657dbd..2aa8e1aa6c 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0
+CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
 CONFIG_TARGET_PUMA_RK3399=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y

commit a366cf931ded176e47e068087bddf0134b5a3fac
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 14:44:58 2017 +0100

    UPSTREAM: rockchip: fix turning off boot-mode via Kconfig
    
    The ROCKCHIP_BOOT_MODE_REG option defaults to a hex value, so 0 will
    show as 0x0 if a default is provided and changed via Kconfig.
    However, it still will show as 0, if no default is given.
    
    Consequently, the "is set to something other than 0" test in a
    Makefile is cumbersome.  Instead this check can easily be performed in
    the C-code.
    
    This removes the ifeq-check from mach-rockchip/Makefile, adds a
    matching #if-check to boot_mode.c and fixes resulting link issues (if
    boot_mode.o was not included due to the Makefile check) by defining a
    stub function (in case the functionality is not built in) for
    setup_boot_mode in boot_mode.c.
    
    Fixes: e306779 (rockchip: make boot_mode related codes reused across all platforms)
    Change-Id: I5299469103d139a90b8c073779d872ef131c3b42
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f07d76c00d1fe05baad1599d01d07a9226498923)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 6c4954b9e0..ee03940ac0 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -28,9 +28,11 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 
-ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
+# Always include boot_mode.o, as we bypass it (i.e. turn it off)
+# inside of boot_mode.c when CONFIG_BOOT_MODE_REG is 0.  This way,
+# we can have the preprocessor correctly recognise both 0x0 and 0
+# meaning "turn it off".
 obj-y += boot_mode.o
-endif
 
 obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f105f57f1f..b50b17329c 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -15,6 +15,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#if (CONFIG_ROCKCHIP_BOOT_MODE_REG == 0)
+
+int setup_boot_mode(void)
+{
+	return 0;
+}
+
+#else
+
 void set_back_to_bootrom_dnl_flag(void)
 {
 	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
@@ -119,3 +128,5 @@ int setup_boot_mode(void)
 
 	return 0;
 }
+
+#endif

commit 88af3643afe858ed36924f69b1c5a985d6d2fbdf
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Nov 6 07:39:01 2017 -0800

    UPSTREAM: MAINTAINERS: Update maintainer for USB xHCI
    
    As discussed with Marek, this adds myself as the maintainer to
    offload the USB xHCI part.
    
    Change-Id: Ib53bd69e33e86faeb27291c5f3ebddc8d7433467
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c0c5f910adbe703aa3d353fbf2c63e9ebc779943)

diff --git a/MAINTAINERS b/MAINTAINERS
index 04acf2b89d..175a7f0d1c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -444,6 +444,12 @@ S:	Maintained
 T:	git git://git.denx.de/u-boot-usb.git
 F:	drivers/usb/
 
+USB xHCI
+M:	Bin Meng <bmeng.cn@gmail.com>
+S:	Maintained
+T:	git git://git.denx.de/u-boot-usb.git topic-xhci
+F:	drivers/usb/host/xhci*
+
 VIDEO
 M:	Anatolij Gustschin <agust@denx.de>
 S:	Maintained
diff --git a/doc/git-mailrc b/doc/git-mailrc
index 556db0a818..5a365cddd9 100644
--- a/doc/git-mailrc
+++ b/doc/git-mailrc
@@ -133,6 +133,7 @@ alias spi            uboot, jagan
 alias spmi           uboot, mateusz
 alias ubi            uboot, hs
 alias usb            uboot, marex
+alias xhci           uboot, bmeng
 alias video          uboot, ag
 alias patman         uboot, sjg
 alias buildman       uboot, sjg

commit 14595d815a8a938a948a7b13c17afa2265de9ef5
Author: Marek Vasut <marex@denx.de>
Date:   Thu Oct 19 21:45:53 2017 +0200

    UPSTREAM: usb: gadget: storage: Increase FSG_BUFLEN
    
    Increase the buffer length to be just above maximum permissible value
    of 128 kiB . This increases the performance of the UMS and alike by a
    factor of 2 - 2.5 as the buffers are less fragmented.
    
    Change-Id: I8b285031fd251b2ebf672c2295a19bfcba77d8c6
    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a8c402f45c758235916615757ac537db8e96fc31)

diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index b6df130a14..4d5a9a8c42 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -309,7 +309,7 @@ static struct fsg_lun *fsg_lun_from_dev(struct device *dev)
 #define FSG_NUM_BUFFERS	2
 
 /* Default size of buffer length. */
-#define FSG_BUFLEN	((u32)16384)
+#define FSG_BUFLEN	((u32)131072)
 
 /* Maximal number of LUNs supported in mass storage function */
 #define FSG_MAX_LUNS	8

commit 3f6e9bd9ffd441c85331e40afe0782407528840e
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 17:15:17 2017 +0100

    UPSTREAM: usb: hub: identify the hub-device to usb_hub_reset_devices
    
    When usb_hub_reset_devices is called, it should be passed both an
    indicator which hub it should operate on and what port number (local
    to that hub) should be reset.
    
    Previously, the usb_hub.c code did not include such context and
    always started resets from port number 1, performing multiple
    reset-requests for the same devices:
    
           /*
            * Reset any devices that may be in a bad state when applying
            * the power.  This is a __weak function.  Resetting of the devices
            * should occur in the board file of the device.
            */
           for (i = 0; i < dev->maxchild; i++)
                  usb_hub_reset_devices(i + 1);
    
    This adds an additional 'hub' parameter to usb_hub_reset_devices
    that provides the context to fully qualify the port-number in.
    
    Existing implementations are changed to accept and ignore the new
    parameter.
    
    Change-Id: I2f201cb9c52522f6e553cbf54aae9bbb2e549a21
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 883946e8e7c5dacb5e12f18703e20d49a4886f0e)

diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c
index 31730a4d1c..3e6235a3b7 100644
--- a/board/compulab/cm_t54/cm_t54.c
+++ b/board/compulab/cm_t54/cm_t54.c
@@ -246,7 +246,7 @@ int ehci_hcd_stop(void)
 	return ret;
 }
 
-void usb_hub_reset_devices(int port)
+void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 {
 	/* The LAN9730 needs to be reset after the port power has been set. */
 	if (port == 3) {
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index 4b25cc2d7c..67242f5cc8 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -249,7 +249,7 @@ int ehci_hcd_stop(void)
 	return omap_ehci_hcd_stop();
 }
 
-void usb_hub_reset_devices(int port)
+void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 {
 	/* The LAN9730 needs to be reset after the port power has been set. */
 	if (port == 3) {
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 325d16dfc8..024dadb277 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -57,7 +57,7 @@ struct usb_device_scan {
 
 static LIST_HEAD(usb_scan_list);
 
-__weak void usb_hub_reset_devices(int port)
+__weak void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
 {
 	return;
 }
@@ -853,7 +853,7 @@ static int usb_hub_configure(struct usb_device *dev)
 	 * should occur in the board file of the device.
 	 */
 	for (i = 0; i < dev->maxchild; i++)
-		usb_hub_reset_devices(i + 1);
+		usb_hub_reset_devices(hub, i + 1);
 
 	/*
 	 * Only add the connected USB devices, including potential hubs,

commit 1bee64cb36b365e298e6ae73ef4ea08f68a1e2c2
Author: Dirk Behme <dirk.behme@gmail.com>
Date:   Fri Nov 17 15:28:36 2017 +0100

    UPSTREAM: usb: ehci: do not invalidate a NULL buffer
    
    Its a valid use case to call ehci_submit_async() with a NULL buffer
    with length 0. E.g. from usb_set_configuration().
    
    As invalidate_dcache_range() isn't able to judge if the address
    NULL is valid or not (depending on the SoC hardware configuration it
    might be valid) do the check in ehci_submit_async() as here we know
    that we don't have to invalidate such a buffer.
    
    Change-Id: If8d1ee336c3123356138551ed4cbb556e26bf4ed
    Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b3cbcd902db7019410dfe3729a660abcb1f03ffb)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 80cc87c9ef..2582bf36eb 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -592,8 +592,9 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 	 * dangerous operation, it's responsibility of the calling
 	 * code to make sure enough space is reserved.
 	 */
-	invalidate_dcache_range((unsigned long)buffer,
-		ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
+	if (buffer != NULL && length > 0)
+		invalidate_dcache_range((unsigned long)buffer,
+			ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
 
 	/* Check that the TD processing happened */
 	if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)

commit 85b3e780a7ef93d2c49b867945f60c83a42a8de7
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Mon Nov 20 19:33:39 2017 +0100

    UPSTREAM: dm: usb: ehci: avoid possible NULL dereference
    
    Currently we check in ehci_shutdown() if ctrl is NULL after
    dereferencing it.
    
    Before this we have already dereferenced ctrl, ctrl->hccr,
    and ctrl->hcor in ehci_get_portsc_register(), ehci_submit_root(),
    and hci_common_init().
    
    A better approach is to already check ctrl, ctrl->hccr, and ctrl->hcor
    during the initialization in ehci_register() and usb_lowlevel_init()
    and signal an error here via the return code.
    
    Change-Id: I940999cbb94fbae4642fd25df820997c4d642da1
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 45157d27644c23493ea1b5a6c9dd67572eb75c8c)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index be3e842dcc..80cc87c9ef 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -210,9 +210,6 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl)
 	uint32_t cmd, reg;
 	int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
 
-	if (!ctrl || !ctrl->hcor)
-		return -EINVAL;
-
 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
 	/* If not run, directly return */
 	if (!(cmd & CMD_RUN))
@@ -1112,6 +1109,8 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
 	rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
 	if (rc)
 		return rc;
+	if (!ctrl->hccr || !ctrl->hcor)
+		return -1;
 	if (init == USB_INIT_DEVICE)
 		goto done;
 
@@ -1613,11 +1612,14 @@ int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
 {
 	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
 	struct ehci_ctrl *ctrl = dev_get_priv(dev);
-	int ret;
+	int ret = -1;
 
 	debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
 	      dev->name, ctrl, hccr, hcor, init);
 
+	if (!ctrl || !hccr || !hcor)
+		goto err;
+
 	priv->desc_before_addr = true;
 
 	ehci_setup_ops(ctrl, ops);

commit 02b25dcd4f43845509d129d42a1e4a2b273a0c96
Author: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
Date:   Fri Nov 17 16:26:30 2017 +0300

    UPSTREAM: usb: ehci: Fix accessors for big-endian platforms and descriptors
    
    Commit 9000eddbae0d ("drivers/usb/ehci: Use platform-specific accessors")
    broke USB 2.0 on big-endian platforms because for them writel/readl()
    does automatic conversion of BE data to LE.
    
    Proper implementation requires to use "raw" variant of these accessors
    which read/write data without messing with endianess.
    
    While at it replace cpu_to_be32() to be32_to_cpu() in readl() to
    keep sane semantics.
    
    Change-Id: I35e193f08aa56967c831bce1b2892e2c51527796
    Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
    Cc: Marek Vasut <marex@denx.de>
    Reported-by: Vladimir Boroda <boroda@yahoo.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9829ce2ff25c659ca29cd15ab773312ac4b6cfc6)

diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 7c39becd24..18692b732e 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -101,11 +101,11 @@ struct usb_linux_config_descriptor {
 } __attribute__ ((packed));
 
 #if defined CONFIG_EHCI_DESC_BIG_ENDIAN
-#define ehci_readl(x)		cpu_to_be32(readl(x))
-#define ehci_writel(a, b)	writel(cpu_to_be32(b), a)
+#define ehci_readl(x)		be32_to_cpu(__raw_readl(x))
+#define ehci_writel(a, b)	__raw_writel(cpu_to_be32(b), a)
 #else
-#define ehci_readl(x)		cpu_to_le32(readl(x))
-#define ehci_writel(a, b)	writel(cpu_to_le32(b), a)
+#define ehci_readl(x)		readl(x)
+#define ehci_writel(a, b)	writel(b, a)
 #endif
 
 #if defined CONFIG_EHCI_MMIO_BIG_ENDIAN

commit 1c7b1b4b19c0ae9035c8c79758ee15583d814676
Author: Suneel Garapati <suneelglinux@gmail.com>
Date:   Mon Oct 23 17:28:40 2017 -0700

    UPSTREAM: cmd: usb: ignore blk, emulation devices in usb tree/info display
    
    Usb tree/info commands iterate over all usb uclass devices recursively.
    Blk uclass devices based on struct blk_desc are created for mass storage
    device, treating them as usb uclass devices based on struct usb_device
    and referencing usb config interface descriptors cause crash.
    To fix, ignore blk and usb_emul uclass devices in usb_show_info
    and usb_tree_graph. Also avoid addition of preamble for blk uclass
    child devices, otherwise tree dump gets messed up.
    
    Change-Id: If25ca43b08c0918c44583f71282a07c928e5bf53
    Signed-off-by: Suneel Garapati <suneelglinux@gmail.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit abd7cedb19ab7979467734b3933a39879bd8935a)

diff --git a/cmd/usb.c b/cmd/usb.c
index d95bcf5c8e..907debe30f 100644
--- a/cmd/usb.c
+++ b/cmd/usb.c
@@ -349,6 +349,16 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre)
 	printf(" %s", pre);
 #ifdef CONFIG_DM_USB
 	has_child = device_has_active_children(dev->dev);
+	if (device_get_uclass_id(dev->dev) == UCLASS_MASS_STORAGE) {
+		struct udevice *child;
+
+		for (device_find_first_child(dev->dev, &child);
+		     child;
+		     device_find_next_child(&child)) {
+			if (device_get_uclass_id(child) == UCLASS_BLK)
+				has_child = 0;
+		}
+	}
 #else
 	/* check if the device has connected children */
 	int i;
@@ -414,8 +424,12 @@ static void usb_show_tree_graph(struct usb_device *dev, char *pre)
 
 		udev = dev_get_parent_priv(child);
 
-		/* Ignore emulators, we only want real devices */
-		if (device_get_uclass_id(child) != UCLASS_USB_EMUL) {
+		/*
+		 * Ignore emulators and block child devices, we only want
+		 * real devices
+		 */
+		if ((device_get_uclass_id(child) != UCLASS_USB_EMUL) &&
+		    (device_get_uclass_id(child) != UCLASS_BLK)) {
 			usb_show_tree_graph(udev, pre);
 			pre[index] = 0;
 		}
@@ -605,7 +619,9 @@ static void usb_show_info(struct usb_device *udev)
 	for (device_find_first_child(udev->dev, &child);
 	     child;
 	     device_find_next_child(&child)) {
-		if (device_active(child)) {
+		if (device_active(child) &&
+		    (device_get_uclass_id(child) != UCLASS_USB_EMUL) &&
+		    (device_get_uclass_id(child) != UCLASS_BLK)) {
 			udev = dev_get_parent_priv(child);
 			usb_show_info(udev);
 		}

commit 25527bfaa387fa742f89d06180e5915ec7d3882d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 19:47:37 2017 +0100

    UPSTREAM: rockchip: pinctrl: rk3399: add support for I2C8
    
    The RK3399 has a total of 9 I2C controllers.  To support these, the
    enum in periph.h is extended and the mapping from the IRQ numbers to
    the peripheral-ids is extended to ensure that pinctrl requests are
    passed through to the function configuring the I2C pins.
    
    For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using
    communication with the FAN53555 connected on I2C8.
    
    Change-Id: I7ad9400f05d3ee89263ecd2bcc391483934b6c74
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8c2bb589e29d5cb89e10c3ddd23b28d949fa9693)

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index 8d21eb7bee..b541e2caa1 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -589,7 +589,12 @@ enum {
 	PMUGRF_GPIO1C3_SEL_SHIFT        = 6,
 	PMUGRF_GPIO1C3_SEL_MASK = 3 << PMUGRF_GPIO1C3_SEL_SHIFT,
 	PMUGRF_PWM_2            = 1,
-
+	PMUGRF_GPIO1C4_SEL_SHIFT = 8,
+	PMUGRF_GPIO1C4_SEL_MASK = 3 << PMUGRF_GPIO1C4_SEL_SHIFT,
+	PMUGRF_I2C8PMU_SDA = 1,
+	PMUGRF_GPIO1C5_SEL_SHIFT = 10,
+	PMUGRF_GPIO1C5_SEL_MASK = 3 << PMUGRF_GPIO1C5_SEL_SHIFT,
+	PMUGRF_I2C8PMU_SCL = 1,
 };
 
 /* GRF_SOC_CON5 */
diff --git a/arch/arm/include/asm/arch-rockchip/periph.h b/arch/arm/include/asm/arch-rockchip/periph.h
index 6c8c77dddb..b968ecf2b5 100644
--- a/arch/arm/include/asm/arch-rockchip/periph.h
+++ b/arch/arm/include/asm/arch-rockchip/periph.h
@@ -24,6 +24,9 @@ enum periph_id {
 	PERIPH_ID_I2C3,
 	PERIPH_ID_I2C4,
 	PERIPH_ID_I2C5,
+	PERIPH_ID_I2C6,
+	PERIPH_ID_I2C7,
+	PERIPH_ID_I2C8,
 	PERIPH_ID_SPI0,
 	PERIPH_ID_SPI1,
 	PERIPH_ID_SPI2,
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
index d93b90310b..19b81e744d 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
@@ -70,11 +70,21 @@ static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf,
 			     PMUGRF_GPIO1C0_SEL_MASK,
 			     PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT);
 		break;
+	case PERIPH_ID_I2C8:
+		rk_clrsetreg(&pmugrf->gpio1c_iomux,
+			     PMUGRF_GPIO1C4_SEL_MASK,
+			     PMUGRF_I2C8PMU_SDA << PMUGRF_GPIO1C4_SEL_SHIFT);
+		rk_clrsetreg(&pmugrf->gpio1c_iomux,
+			     PMUGRF_GPIO1C5_SEL_MASK,
+			     PMUGRF_I2C8PMU_SCL << PMUGRF_GPIO1C5_SEL_SHIFT);
+		break;
 	case PERIPH_ID_I2C1:
 	case PERIPH_ID_I2C2:
 	case PERIPH_ID_I2C3:
 	case PERIPH_ID_I2C4:
 	case PERIPH_ID_I2C5:
+	case PERIPH_ID_I2C6:
+	case PERIPH_ID_I2C7:
 	default:
 		debug("i2c id = %d iomux error!\n", i2c_id);
 		break;
@@ -301,6 +311,9 @@ static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags)
 	case PERIPH_ID_I2C3:
 	case PERIPH_ID_I2C4:
 	case PERIPH_ID_I2C5:
+	case PERIPH_ID_I2C6:
+	case PERIPH_ID_I2C7:
+	case PERIPH_ID_I2C8:
 		pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func);
 		break;
 	case PERIPH_ID_SPI0:
@@ -376,6 +389,12 @@ static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
 		return PERIPH_ID_I2C4;
 	case 38:
 		return PERIPH_ID_I2C5;
+	case 37:
+		return PERIPH_ID_I2C6;
+	case 36:
+		return PERIPH_ID_I2C7;
+	case 58:
+		return PERIPH_ID_I2C8;
 	case 65:
 		return PERIPH_ID_SDMMC1;
 #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)

commit feab7f33439d0e017a9ff8176e258f193285f29b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Nov 22 19:45:04 2017 +0100

    UPSTREAM: rockchip: clk: rk3399: change extract_bits to bitfield_extract
    
    The RK3399 clk driver still has a left-over use of extract_bits, which
    can be replaced by using bitfield_extract from include/bitfield.h.
    This rewrites the invocation to use the shared function.
    
    Change-Id: Ia541e82ffce50d0f2a43928530ecece66ae1cd17
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a8ee98df183ed240afb5220c3cdf2991f69fa578)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 25550a7429..08eb8f55b0 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -569,11 +569,6 @@ static const struct spi_clkreg spi_clkregs[] = {
 		.sel_shift = CLK_SPI5_PLL_SEL_SHIFT, },
 };
 
-static inline u32 extract_bits(u32 val, unsigned width, unsigned shift)
-{
-	return (val >> shift) & ((1 << width) - 1);
-}
-
 static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id)
 {
 	const struct spi_clkreg *spiclk = NULL;
@@ -590,7 +585,8 @@ static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id)
 	}
 
 	val = readl(&cru->clksel_con[spiclk->reg]);
-	div = extract_bits(val, CLK_SPI_PLL_DIV_CON_WIDTH, spiclk->div_shift);
+	div = bitfield_extract(val, spiclk->div_shift,
+			       CLK_SPI_PLL_DIV_CON_WIDTH);
 
 	return DIV_TO_RATE(GPLL_HZ, div);
 }

commit 8118cce3e01498774b9c8689a32157e7891c2917
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Nov 24 13:26:03 2017 +0100

    UPSTREAM: spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-size
    
    A minor code-size increase from the changes for tracking the os-type
    of FIT images and from infrastructure for recording the loadables into
    the the loaded FDT, broke the builds for sun50i and some OMAP2+ devices.
    
    This change adds a new config option (enabled by default for
    MACH_SUN50I, MACH_SUN50I_H5 and ARCH_OMAP2PLUS) that does skips these
    processing steps (bringing code size down to below the limit
    again). The os-type is not evaluated, but assumed to be IH_OS_UBOOT
    (i.e. taking the code-paths intended for backward-compatibility).
    
    Note that enabling this config option precludes any useful downstream
    processing, such as utilising a special calling convention for ATF or
    OPTEE, based on the os-type of the loadables.
    
    Change-Id: I32036975208be6e9d9d2ad3b5376444efd693f25
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 337bbb6297775e8e9d664e96e96004f00d1d8c02)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2ae32c0842..d007c50341 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -227,6 +227,22 @@ config SPL_SHA256_SUPPORT
 	  SHA256 variant is supported: SHA512 and others are not currently
 	  supported in U-Boot.
 
+config SPL_FIT_IMAGE_TINY
+	bool "Remove functionality from SPL FIT loading to reduce size"
+	depends on SPL_FIT
+	default y if MACH_SUN50I || MACH_SUN50I_H5
+	default y if ARCH_OMAP2PLUS
+	help
+	  Enable this to reduce the size of the FIT image loading code
+	  in SPL, if space for the SPL binary is very tight.
+
+	  This removes the detection of image types (which forces the
+	  first image to be treated as having a U-Boot style calling
+	  convention) and skips the recording of each loaded payload
+	  (i.e. loadable) into the FDT (modifying the loaded FDT to
+	  ensure this information is available to the next image
+	  invoked).
+
 config SPL_CPU_SUPPORT
 	bool "Support CPU drivers"
 	help
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 128af1bbd6..72ae8f4c50 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -275,8 +275,10 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 
 	/* Make the load-address of the FDT available for the SPL framework */
 	spl_image->fdt_addr = (void *)image_info.load_addr;
+#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
 	/* Try to make space, so we can inject details on the loadables */
 	ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
+#endif
 
 	return ret;
 }
@@ -284,8 +286,10 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 static int spl_fit_record_loadable(const void *fit, int images, int index,
 				   void *blob, struct spl_image_info *image)
 {
+	int ret = 0;
+#if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
 	char *name;
-	int node, ret;
+	int node;
 
 	ret = spl_fit_get_image_name(fit, images, "loadables",
 				     index, &name);
@@ -298,9 +302,19 @@ static int spl_fit_record_loadable(const void *fit, int images, int index,
 				  image->size, image->entry_point,
 				  fdt_getprop(fit, node, "type", NULL),
 				  fdt_getprop(fit, node, "os", NULL));
+#endif
 	return ret;
 }
 
+static int spl_fit_image_get_os(const void *fit, int noffset, uint8_t *os)
+{
+#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
+	return -ENOTSUPP;
+#else
+	return fit_image_get_os(fit, noffset, os);
+#endif
+}
+
 int spl_load_simple_fit(struct spl_image_info *spl_image,
 			struct spl_load_info *info, ulong sector, void *fit)
 {
@@ -392,7 +406,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	 * For backward compatibility, we treat the first node that is
 	 * as a U-Boot image, if no OS-type has been declared.
 	 */
-	if (!fit_image_get_os(fit, node, &spl_image->os))
+	if (!spl_fit_image_get_os(fit, node, &spl_image->os))
 		debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
 #if !defined(CONFIG_SPL_OS_BOOT)
 	else
@@ -420,7 +434,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (ret < 0)
 			continue;
 
-		if (!fit_image_get_os(fit, node, &os_type))
+		if (!spl_fit_image_get_os(fit, node, &os_type))
 			debug("Loadable is %s\n", genimg_get_os_name(os_type));
 
 		if (os_type == IH_OS_U_BOOT) {
diff --git a/include/fdt_support.h b/include/fdt_support.h
index afaf0e787d..e0f908636c 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -133,7 +133,6 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev);
 static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 #endif
 
-#if CONFIG_IS_ENABLED(LOAD_FIT)
 /**
  * Record information about a processed loadable in /fit-images (creating
  * /fit-images if necessary).
@@ -151,7 +150,6 @@ static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 int fdt_record_loadable(void *blob, u32 index, const char *name,
 			uintptr_t load_addr, u32 size, uintptr_t entry_point,
 			const char *type, const char *os);
-#endif
 
 #ifdef CONFIG_PCI
 #include <pci.h>

commit 3327a2717beca7d4da03a49d008496601633eec8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:43 2017 +0200

    rockchip: defconfig: lion-rk3368: sync up with SPL changes for ATF
    
    This tracks the SPL changes for ATF for the RK3368-uQ7:
     * renames ATF_SUPPORT to ATF
     * drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from
       the .itb file)
    
    Change-Id: Ibb5c0769d20edf7e80d2fbf420f5a58bd4b4ef03
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ec4bf3d6bd5ebc01d2664560b1e79e36994f6c1d)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 9181f16dca..330063d1b4 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -32,7 +32,7 @@ CONFIG_SPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
-CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF=y
 CONFIG_TPL=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y

commit 30f7cc2439c9d5f81682ffd64765cc61b069e882
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:42 2017 +0200

    UPSTREAM: rockchip: defconfig: puma-rk3399: sync up with SPL changes for ATF
    
    This defconfig update makes use of the new features:
     * CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no
       overlap between the M0 firmware and the ATF (we load this to DRAM
       and relocate it to its final location within the ATF)
     * tracks the ATF_SUPPORT -> ATF renaming
    
    Change-Id: I91dca4f1b51701a00eef67114793633c334ed84c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cba7b949b4a2ebceabf6adde04eb9f67f71c7ee4)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 6c2eb928f3..c808657dbd 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0
 CONFIG_TARGET_PUMA_RK3399=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
@@ -23,6 +24,7 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_ATF=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y

commit 916b3b5925470723305711791c00be8af633a61a
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:41 2017 +0200

    UPSTREAM: rockchip: board: lion-rk3368: update .its file
    
    For the RK3368-uQ7, we can now update the .its file to mark the
    Trusted Firmware as out 'firmware' bootable and annotate both ATF and
    U-Boot with an OS-type.
    
    Change-Id: I637ee137e1ea361ec198425e0e1b14c26343d913
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b07856fe436a6ccf20c6176cd450a4c4487973a1)

diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
index 60daddcc44..e3bea5ea2f 100644
--- a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
+++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
@@ -17,6 +17,7 @@
 			description = "U-Boot (64-bit)";
 			data = /incbin/("../../../u-boot-nodtb.bin");
 			type = "standalone";
+			os = "U-Boot";
 			arch = "arm64";
 			compression = "none";
 			load = <0x00200000>;
@@ -25,6 +26,7 @@
 			description = "ARM Trusted Firmware";
 			data = /incbin/("../../../bl31-rk3368.bin");
 			type = "firmware";
+			os = "arm-trusted-firmware";
 			arch = "arm64";
 			compression = "none";
 			load = <0x00100000>;
@@ -43,8 +45,8 @@
 		default = "conf";
 		conf {
 			description = "Theobroma Systems RK3368-uQ7 (Puma) SoM";
-			firmware = "uboot";
-			loadables = "atf";
+			firmware = "atf";
+			loadables = "uboot";
 			fdt = "fdt";
 		};
 	};

commit 07c4cb3a1fb2156ffddadf0193a0776c61081122
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:40 2017 +0200

    UPSTREAM: rockchip: board: puma-rk3399: update .its file to use new features
    
    This commit updates the .its file for the RK3399-Q7 to use the new
    features and demonstrates how to use those:
     * it marks the ATF as the 'firmware'
     * it tracks the OS-type for U-Boot and ATF
     * it loads the PMU (M0) firmware to DRAM and records the location
       to /fit-images (where our ATF reads it from)
    
    With the handoff of the next-stage FDT to ATF in place, we can now use
    this to pass information about the load addresses and names of each
    loadables to ATF: now we can load the M0 firmware into DRAM and avoid
    overwriting parts of the SPL stage.  This is achieved by changing our
    .its-file to use an available area of DRAM as the load-address.
    
    Change-Id: Iff9e14ecaa7eb01b40498880a34f8fc87bda0090
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fc76fa3cfa3fa716bf541f30977896fd6656b148)

diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
index 520f846d66..cb7d92fead 100644
--- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
+++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.its
@@ -17,6 +17,7 @@
 			description = "U-Boot (64-bit)";
 			data = /incbin/("../../../u-boot-nodtb.bin");
 			type = "standalone";
+			os = "U-Boot";
 			arch = "arm64";
 			compression = "none";
 			load = <0x00200000>;
@@ -26,16 +27,17 @@
 			data = /incbin/("../../../bl31-rk3399.bin");
 			type = "firmware";
 			arch = "arm64";
+			os = "arm-trusted-firmware";
 			compression = "none";
-			load = <0x00001000>;
-			entry = <0x00001000>;
+			load = <0x1000>;
+			entry = <0x1000>;
 		};
 		pmu {
 		        description = "Cortex-M0 firmware";
 			data = /incbin/("../../../rk3399m0.bin");
 			type = "pmu-firmware";
 			compression = "none";
-			load = <0xff8c0000>;
+			load = <0x180000>;
                 };
 		fdt {
 			description = "RK3399-Q7 (Puma) flat device-tree";
@@ -49,8 +51,8 @@
 		default = "conf";
 		conf {
 			description = "Theobroma Systems RK3399-Q7 (Puma) SoM";
-			firmware = "uboot";
-			loadables = "atf";
+			firmware = "atf";
+			loadables = "uboot", "pmu";
 			fdt = "fdt";
 		};
 	};

commit 7cde5f1b415c49390bc25ecd2f41a1e955a205cb
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:39 2017 +0200

    rockchip: defconfig: firefly-rk3399: sync up with SPL changes for ATF
    
    This tracks the SPL changes for ATF for the Firefly:
     * renames ATF_SUPPORT to ATF
     * drops CONFIG_SPL_ATF_TEXT_BASE
    
    Change-Id: I3e386320f689b010344a0f1c8ca87fe9bcc0d075
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cd5eae5590fcf8529ff0b2268db0968558842218)

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 5d228af96c..979f6e303f 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -13,7 +13,6 @@ CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -22,6 +21,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_SPL_ATF=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_FASTBOOT=y
 CONFIG_ANDROID_BOOTLOADER=y

commit 9f8888bc5c0ed15d6741e2871ad01fba4ecf94d3
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:36 2017 +0200

    spl: rename config item SPL_ATF_SUPPORT to SPL_ATF
    
    Having CONFIG_SPL_ATF seems more natural.
    Rename it, while it it is easy and there's few boards that use it
    (only RK3399 and RK3368 boards).
    
    Change-Id: Ie13ba6eeb687bf6f8c8d326c197f453fb752e9bd
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit aa122f6b3d24bd133392c7dd2a882a8cc2cbd622)

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 2115b58b35..2ae32c0842 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -693,7 +693,7 @@ config SPL_YMODEM_SUPPORT
 	  means of transmitting U-Boot over a serial line for using in SPL,
 	  with a checksum to ensure correctness.
 
-config SPL_ATF_SUPPORT
+config SPL_ATF
 	bool "Support ARM Trusted Firmware"
 	depends on ARM64
 	help
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 8abd15c003..63db03b9bd 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -22,7 +22,7 @@ endif
 obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
-obj-$(CONFIG_$(SPL_TPL_)ATF_SUPPORT) += spl_atf.o
+obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o
 obj-$(CONFIG_$(SPL_TPL_)OPTEE_SUPPORT) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o

commit 2e15a11c919f31a13fad3b872d34c024a66d0829
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:35 2017 +0200

    spl: atf: introduce spl_invoke_atf and make bl31_entry private
    
    This adds a new interface spl_invoke_atf() that takes a spl_image_info
    argument and then derives the necessary parameters for the ATF entry.
    Based on the additional information recorded (into /fit-images) from
    the FIT loadables, we can now easily locate the next boot stage.
    
    We now pass a pointer to a FDT as the platform-specific parameter
    pointer to ATF (so we don't run into the future headache of every
    board/platform defining their own proprietary tag-structure), as
    FDT access is already available in ATF.
    
    With the necessary infrastructure in place, we can now update the
    support for the ARM Trusted Firmware to dispatch into the
    spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is
    loaded.
    
    Change-Id: Ia00abe207a0a0fed044fcda2b6e1054225b42901
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1d3790905d9c089b434c376f2dcc585b6a92bc99)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 0b5b1a9a33..b2bd7c91f6 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -418,6 +418,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	case IH_OS_U_BOOT:
 		debug("Jumping to U-Boot\n");
 		break;
+#if CONFIG_IS_ENABLED(ATF)
+	case IH_OS_ARM_TRUSTED_FIRMWARE:
+		debug("Jumping to U-Boot via ARM Trusted Firmware\n");
+		spl_invoke_atf(&spl_image);
+		break;
+#endif
 #ifdef CONFIG_SPL_OS_BOOT
 	case IH_OS_LINUX:
 		debug("Jumping to Linux\n");
@@ -442,11 +448,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		debug("Failed to stash bootstage: err=%d\n", ret);
 #endif
 
-	if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
-		debug("loaded - jumping to U-Boot via ATF BL31.\n");
-		spl_bl31_entry((void *)spl_image.entry_point);
-	}
-
 	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
 		debug("loaded - jumping to U-Boot via OP-TEE.\n");
 		spl_optee_entry(0, 0, 0, (void *)spl_image.entry_point);
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 06c4a03920..eaea95455f 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -5,6 +5,7 @@
  * reserved.
  * Copyright (C) 2016 Rockchip Electronic Co.,Ltd
  * Written by Kever Yang <kever.yang@rock-chips.com>
+ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:     BSD-3-Clause
  */
@@ -30,7 +31,7 @@ static struct bl31_params *bl2_to_bl31_params;
  *
  * @return bl31 params structure pointer
  */
-struct bl31_params *bl2_plat_get_bl31_params(void)
+static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
 {
 	struct entry_point_info *bl33_ep_info;
 
@@ -67,7 +68,7 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
 
 	/* BL33 expects to receive the primary CPU MPID (through x0) */
 	bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
-	bl33_ep_info->pc = CONFIG_SYS_TEXT_BASE;
+	bl33_ep_info->pc = bl33_entry;
 	bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
 				     DISABLE_ALL_EXECPTIONS);
 
@@ -78,21 +79,88 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
 	return bl2_to_bl31_params;
 }
 
-void raw_write_daif(unsigned int daif)
+static inline void raw_write_daif(unsigned int daif)
 {
 	__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
 }
 
-void spl_bl31_entry(void *entry_addr)
+typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
+
+static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
+		       uintptr_t fdt_addr)
 {
 	struct bl31_params *bl31_params;
-	void (*entry)(struct bl31_params *params, void *plat_params) = NULL;
+	atf_entry_t  atf_entry = (atf_entry_t)bl31_entry;
 
-	bl31_params = bl2_plat_get_bl31_params();
-	entry = entry_addr;
+	bl31_params = bl2_plat_get_bl31_params(bl33_entry);
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
 	dcache_disable();
 
-	entry(bl31_params, NULL);
+	atf_entry((void *)bl31_params, (void *)fdt_addr);
+}
+
+static int spl_fit_images_find_uboot(void *blob)
+{
+	int parent, node, ndepth;
+	const void *data;
+
+	if (!blob)
+		return -FDT_ERR_BADMAGIC;
+
+	parent = fdt_path_offset(blob, "/fit-images");
+	if (parent < 0)
+		return -FDT_ERR_NOTFOUND;
+
+	for (node = fdt_next_node(blob, parent, &ndepth);
+	     (node >= 0) && (ndepth > 0);
+	     node = fdt_next_node(blob, node, &ndepth)) {
+		if (ndepth != 1)
+			continue;
+
+		data = fdt_getprop(blob, node, FIT_OS_PROP, NULL);
+		if (!data)
+			continue;
+
+		if (genimg_get_os_id(data) == IH_OS_U_BOOT)
+			return node;
+	};
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+uintptr_t spl_fit_images_get_entry(void *blob, int node)
+{
+	ulong  val;
+
+	val = fdt_getprop_u32(blob, node, "entry-point");
+	if (val == FDT_ERROR)
+		val = fdt_getprop_u32(blob, node, "load-addr");
+
+	debug("%s: entry point 0x%lx\n", __func__, val);
+	return val;
+}
+
+void spl_invoke_atf(struct spl_image_info *spl_image)
+{
+	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
+	void *blob = spl_image->fdt_addr;
+	int node;
+
+	/*
+	 * Find the U-Boot binary (in /fit-images) load addreess or
+	 * entry point (if different) and pass it as the BL3-3 entry
+	 * point.
+	 * This will need to be extended to support Falcon mode.
+	 */
+
+	node = spl_fit_images_find_uboot(blob);
+	if (node >= 0)
+		bl33_entry = spl_fit_images_get_entry(blob, node);
+
+	/*
+	 * We don't provide a BL3-2 entry yet, but this will be possible
+	 * using similar logic.
+	 */
+	bl31_entry(spl_image->entry_point, bl33_entry, (uintptr_t)blob);
 }

commit 1f1cf67b1dbc54b29e90b088898f163358d81a71
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:34 2017 +0200

    UPSTREAM: spl: fit: implement recording of loadables into /fit-images
    
    If a FDT was loaded (e.g. to append it to U-Boot image), we store it's
    address and record information for all loadables into this FDT.  This
    allows us to easily keep track of images for multiple privilege levels
    (e.g. with ATF) or of firmware images preloaded into temporary
    locations (e.g. PMU firmware that may overlap the SPL stage).
    
    Change-Id: Ifeee692ad0604e2e60e92f76a11f5693c52fe769
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a616c783f22a045e580f101141a9d62775f97365)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index c496f45b72..128af1bbd6 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -2,7 +2,7 @@
  * Copyright (C) 2016 Google, Inc
  * Written by Simon Glass <sjg@chromium.org>
  *
- * SPDX-License-Identifier:     GPL-2.0+
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
@@ -16,22 +16,24 @@
 #endif
 
 /**
- * spl_fit_get_image_node(): By using the matching configuration subnode,
+ * spl_fit_get_image_name(): By using the matching configuration subnode,
  * retrieve the name of an image, specified by a property name and an index
  * into that.
  * @fit:	Pointer to the FDT blob.
  * @images:	Offset of the /images subnode.
  * @type:	Name of the property within the configuration subnode.
  * @index:	Index into the list of strings in this property.
+ * @outname:	Name of the image
  *
- * Return:	the node offset of the respective image node or a negative
- * 		error number.
+ * Return:	0 on success, or a negative error number
  */
-static int spl_fit_get_image_node(const void *fit, int images,
-				  const char *type, int index)
+static int spl_fit_get_image_name(const void *fit, int images,
+				  const char *type, int index,
+				  char **outname)
 {
 	const char *name, *str;
-	int node, conf_node;
+	__maybe_unused int node;
+	int conf_node;
 	int len, i;
 
 	conf_node = fit_find_config_node(fit);
@@ -63,7 +65,35 @@ static int spl_fit_get_image_node(const void *fit, int images,
 		}
 	}
 
+	*outname = (char *)str;
+	return 0;
+}
+
+/**
+ * spl_fit_get_image_node(): By using the matching configuration subnode,
+ * retrieve the name of an image, specified by a property name and an index
+ * into that.
+ * @fit:	Pointer to the FDT blob.
+ * @images:	Offset of the /images subnode.
+ * @type:	Name of the property within the configuration subnode.
+ * @index:	Index into the list of strings in this property.
+ *
+ * Return:	the node offset of the respective image node or a negative
+ *		error number.
+ */
+static int spl_fit_get_image_node(const void *fit, int images,
+				  const char *type, int index)
+{
+	char *str;
+	int err;
+	int node;
+
+	err = spl_fit_get_image_name(fit, images, type, index, &str);
+	if (err)
+		return err;
+
 	debug("%s: '%s'\n", type, str);
+
 	node = fdt_subnode_offset(fit, images, str);
 	if (node < 0) {
 		debug("cannot find image node '%s': %d\n", str, node);
@@ -116,15 +146,15 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size,
  * @info:	points to information about the device to load data from
  * @sector:	the start sector of the FIT image on the device
  * @fit:	points to the flattened device tree blob describing the FIT
- * 		image
+ *		image
  * @base_offset: the beginning of the data area containing the actual
  *		image data, relative to the beginning of the FIT
  * @node:	offset of the DT node describing the image to load (relative
- * 		to @fit)
+ *		to @fit)
  * @image_info:	will be filled with information about the loaded image
- * 		If the FIT node does not contain a "load" (address) property,
- * 		the image gets loaded to the address pointed to by the
- * 		load_addr member in this struct.
+ *		If the FIT node does not contain a "load" (address) property,
+ *		the image gets loaded to the address pointed to by the
+ *		load_addr member in this struct.
  *
  * Return:	0 on success or a negative error number.
  */
@@ -239,6 +269,35 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 	image_info.load_addr = spl_image->load_addr + spl_image->size;
 	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
 				 &image_info);
+
+	if (ret < 0)
+		return ret;
+
+	/* Make the load-address of the FDT available for the SPL framework */
+	spl_image->fdt_addr = (void *)image_info.load_addr;
+	/* Try to make space, so we can inject details on the loadables */
+	ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
+
+	return ret;
+}
+
+static int spl_fit_record_loadable(const void *fit, int images, int index,
+				   void *blob, struct spl_image_info *image)
+{
+	char *name;
+	int node, ret;
+
+	ret = spl_fit_get_image_name(fit, images, "loadables",
+				     index, &name);
+	if (ret < 0)
+		return ret;
+
+	node = spl_fit_get_image_node(fit, images, "loadables", index);
+
+	ret = fdt_record_loadable(blob, index, name, image->load_addr,
+				  image->size, image->entry_point,
+				  fdt_getprop(fit, node, "type", NULL),
+				  fdt_getprop(fit, node, "os", NULL));
 	return ret;
 }
 
@@ -364,9 +423,11 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (!fit_image_get_os(fit, node, &os_type))
 			debug("Loadable is %s\n", genimg_get_os_name(os_type));
 
-		if (spl_image->os == IH_OS_U_BOOT)
-			spl_fit_append_fdt(spl_image, info, sector,
+		if (os_type == IH_OS_U_BOOT) {
+			spl_fit_append_fdt(&image_info, info, sector,
 					   fit, images, base_offset);
+			spl_image->fdt_addr = image_info.fdt_addr;
+		}
 
 		/*
 		 * If the "firmware" image did not provide an entry point,
@@ -375,6 +436,12 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (spl_image->entry_point == FDT_ERROR &&
 		    image_info.entry_point != FDT_ERROR)
 			spl_image->entry_point = image_info.entry_point;
+
+		/* Record our loadables into the FDT */
+		if (spl_image->fdt_addr)
+			spl_fit_record_loadable(fit, images, index,
+						spl_image->fdt_addr,
+						&image_info);
 	}
 
 	/*

commit e265ab898ad5e6615591a6b821b7357582c5093c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:33 2017 +0200

    UPSTREAM: spl: fit: implement fdt_record_loadable
    
    During the loading of more complex FIT images (e.g. when the invoked
    next stage needs to find additional firmware for a power-management
    core... or if there are multiple images for different privilege levels
    started in parallel), it is helpful to create a record of what images
    are loaded where: if a FDT is loaded for one of the next stages, it
    can be used to convey the status and location of loadables.
    
    This adds a fdt_record_loadable() function that can be invoked to
    record the status of each loadable below the /fit-images path.
    
    Change-Id: I9d6dcd3cb7863a558ebde7c68bcfe45eaadcc76f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9f45aeb937275960405de0f2abca8c665dbb03d4)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index d725276d7b..1a8ae95cc7 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -436,6 +436,45 @@ static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size,
 	return p - (char *)buf;
 }
 
+int fdt_record_loadable(void *blob, u32 index, const char *name,
+			uintptr_t load_addr, u32 size, uintptr_t entry_point,
+			const char *type, const char *os)
+{
+	int err, node;
+
+	err = fdt_check_header(blob);
+	if (err < 0) {
+		printf("%s: %s\n", __func__, fdt_strerror(err));
+		return err;
+	}
+
+	/* find or create "/fit-images" node */
+	node = fdt_find_or_add_subnode(blob, 0, "fit-images");
+	if (node < 0)
+			return node;
+
+	/* find or create "/fit-images/<name>" node */
+	node = fdt_find_or_add_subnode(blob, node, name);
+	if (node < 0)
+		return node;
+
+	/*
+	 * We record these as 32bit entities, possibly truncating addresses.
+	 * However, spl_fit.c is not 64bit safe either: i.e. we should not
+	 * have an issue here.
+	 */
+	fdt_setprop_u32(blob, node, "load-addr", load_addr);
+	if (entry_point != -1)
+		fdt_setprop_u32(blob, node, "entry-point", entry_point);
+	fdt_setprop_u32(blob, node, "size", size);
+	if (type)
+		fdt_setprop_string(blob, node, "type", type);
+	if (os)
+		fdt_setprop_string(blob, node, "os", os);
+
+	return node;
+}
+
 #ifdef CONFIG_NR_DRAM_BANKS
 #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
 #else
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 2bca4d7889..afaf0e787d 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -133,6 +133,26 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev);
 static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
 #endif
 
+#if CONFIG_IS_ENABLED(LOAD_FIT)
+/**
+ * Record information about a processed loadable in /fit-images (creating
+ * /fit-images if necessary).
+ *
+ * @param blob		FDT blob to update
+ * @param index	        index of this loadable
+ * @param name          name of the loadable
+ * @param load_addr     address the loadable was loaded to
+ * @param size          number of bytes loaded
+ * @param entry_point   entry point (if specified, otherwise pass -1)
+ * @param type          type (if specified, otherwise pass NULL)
+ * @param os            os-type (if specified, otherwise pass NULL)
+ * @return 0 if ok, or -1 or -FDT_ERR_... on error
+ */
+int fdt_record_loadable(void *blob, u32 index, const char *name,
+			uintptr_t load_addr, u32 size, uintptr_t entry_point,
+			const char *type, const char *os);
+#endif
+
 #ifdef CONFIG_PCI
 #include <pci.h>
 int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose);

commit 9719e14f318a7eab0323cab1bb53f16c2e78216d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:32 2017 +0200

    UPSTREAM: spl: fit: simplify logic for FDT loading for non-OS boots
    
    To better support bootin through an ATF or OPTEE, we need to
    streamline some of the logic for when the FDT is appended to an image:
    depending on the image type, we'd like to append the FDT not at all
    (the case for the OS boot), to the 'firmware' image (if it is a
    U-Boot) or to one of the loadables (if the 'firmware' is an ATF, an
    OPTEE, or some other image-type and U-Boot is listed in the
    loadabled).
    
    To achieve this goal, we drop the os_boot flag and track the type of
    image loaded.  If it is of type IH_OS_U_BOOT, we append the FDT.
    
    Change-Id: Ic7c4b927b4ad7d33e372e63002072fe27a88292f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d879616e9e64cf5a9c43dedc30677aa2fa463d64)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 32d9ee5901..c496f45b72 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -218,6 +218,30 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	return 0;
 }
 
+static int spl_fit_append_fdt(struct spl_image_info *spl_image,
+			      struct spl_load_info *info, ulong sector,
+			      void *fit, int images, ulong base_offset)
+{
+	struct spl_image_info image_info;
+	int node, ret;
+
+	/* Figure out which device tree the board wants to use */
+	node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
+	if (node < 0) {
+		debug("%s: cannot find FDT node\n", __func__);
+		return node;
+	}
+
+	/*
+	 * Read the device tree and place it after the image.
+	 * Align the destination address to ARCH_DMA_MINALIGN.
+	 */
+	image_info.load_addr = spl_image->load_addr + spl_image->size;
+	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+				 &image_info);
+	return ret;
+}
+
 int spl_load_simple_fit(struct spl_image_info *spl_image,
 			struct spl_load_info *info, ulong sector, void *fit)
 {
@@ -225,7 +249,6 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	ulong size;
 	unsigned long count;
 	struct spl_image_info image_info;
-	bool boot_os = false;
 	int node = -1;
 	int images, ret;
 	int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
@@ -273,17 +296,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		return -1;
 	}
 
+	/*
+	 * Find the U-Boot image using the following search order:
+	 *   - start at 'firmware' (e.g. an ARM Trusted Firmware)
+	 *   - fall back 'kernel' (e.g. a Falcon-mode OS boot
+	 *   - fall back to using the first 'loadables' entry
+	 */
+	if (node < 0)
+		node = spl_fit_get_image_node(fit, images, "firmware", 0);
 #ifdef CONFIG_SPL_OS_BOOT
-	/* Find OS image first */
-	node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
 	if (node < 0)
-		debug("No kernel image.\n");
-	else
-		boot_os = true;
+		node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
 #endif
-	/* find the U-Boot image */
-	if (node < 0)
-		node = spl_fit_get_image_node(fit, images, "firmware", 0);
 	if (node < 0) {
 		debug("could not find firmware image, trying loadables...\n");
 		node = spl_fit_get_image_node(fit, images, "loadables", 0);
@@ -305,34 +329,29 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	if (ret)
 		return ret;
 
-#ifdef CONFIG_SPL_OS_BOOT
+	/*
+	 * For backward compatibility, we treat the first node that is
+	 * as a U-Boot image, if no OS-type has been declared.
+	 */
 	if (!fit_image_get_os(fit, node, &spl_image->os))
 		debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
-#else
-	spl_image->os = IH_OS_U_BOOT;
+#if !defined(CONFIG_SPL_OS_BOOT)
+	else
+		spl_image->os = IH_OS_U_BOOT;
 #endif
 
-	if (!boot_os) {
-		/* Figure out which device tree the board wants to use */
-		node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
-		if (node < 0) {
-			debug("%s: cannot find FDT node\n", __func__);
-			return node;
-		}
-
-		/*
-		 * Read the device tree and place it after the image.
-		 * Align the destination address to ARCH_DMA_MINALIGN.
-		 */
-		image_info.load_addr = spl_image->load_addr + spl_image->size;
-		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
-					 &image_info);
-		if (ret < 0)
-			return ret;
-	}
+	/*
+	 * Booting a next-stage U-Boot may require us to append the FDT.
+	 * We allow this to fail, as the U-Boot image might embed its FDT.
+	 */
+	if (spl_image->os == IH_OS_U_BOOT)
+		spl_fit_append_fdt(spl_image, info, sector, fit,
+				   images, base_offset);
 
 	/* Now check if there are more images for us to load */
 	for (; ; index++) {
+		uint8_t os_type = IH_OS_INVALID;
+
 		node = spl_fit_get_image_node(fit, images, "loadables", index);
 		if (node < 0)
 			break;
@@ -342,6 +361,13 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		if (ret < 0)
 			continue;
 
+		if (!fit_image_get_os(fit, node, &os_type))
+			debug("Loadable is %s\n", genimg_get_os_name(os_type));
+
+		if (spl_image->os == IH_OS_U_BOOT)
+			spl_fit_append_fdt(spl_image, info, sector,
+					   fit, images, base_offset);
+
 		/*
 		 * If the "firmware" image did not provide an entry point,
 		 * use the first valid entry point from the loadables.

commit 59acbc1bb196e020b7c04f6d96238061cefa3aa2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:31 2017 +0200

    spl: change load_addr and entry_point to uintptr_t
    
    Mainly a stylistic change: convert the load_addr and entry_point
    fields of struct spl_image_info to uintptr_t (from ulong).
    
    Change-Id: I1e0f0dfa5048fcd2d5c42d6a759a5ec25ef80089
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f2efe6786eeaa2305353a01056ffef55ae520b7d)

diff --git a/include/spl.h b/include/spl.h
index 0efbe991f2..b0a86f2b72 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -23,8 +23,8 @@
 struct spl_image_info {
 	const char *name;
 	u8 os;
-	ulong load_addr;
-	ulong entry_point;
+	uintptr_t load_addr;
+	uintptr_t entry_point;
 #if CONFIG_IS_ENABLED(LOAD_FIT)
 	void *fdt_addr;
 #endif
@@ -272,10 +272,9 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 		       struct spl_boot_device *bootdev);
 
 /**
- * spl_bl31_entry - entry function for ATF bl31
- * @entry_addr - entry address of bl31 text
+ * spl_invoke_atf - boot using an ARM trusted firmware image
  */
-void spl_bl31_entry(void *entry_addr);
+void spl_invoke_atf(struct spl_image_info *spl_image);
 
 /**
  * spl_optee_entry - entry function for optee

commit ae1e9f8ff7e605bd39ea98097110a439cee274a8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:30 2017 +0200

    UPSTREAM: spl: add a fdt_addr field to spl_image_info
    
    When loading a full U-Boot with detached device-tree using the SPL FIT
    backend, we should store the address of the FDT loaded as part of the
    SPL image info: this allows us to fixup the FDT with additional info
    we may want to propagate onward.
    
    Change-Id: Ifea4abd01296460570e01c1b19bd8f702e1e95bf
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 75014470aec60580978962071972f2962695938d)

diff --git a/include/spl.h b/include/spl.h
index dc0b56911b..0efbe991f2 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -25,6 +25,9 @@ struct spl_image_info {
 	u8 os;
 	ulong load_addr;
 	ulong entry_point;
+#if CONFIG_IS_ENABLED(LOAD_FIT)
+	void *fdt_addr;
+#endif
 	u32 size;
 	u32 flags;
 	void *arg;

commit 4233e0b15ed63b4aed19fb35acd38d6be0f1e1eb
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 13 21:29:29 2017 +0200

    UPSTREAM: image: add IH_OS_ARM_TRUSTED_FIRMWARE for ARM Trusted Firmware
    
    To boot on ARMv8 systems with ARM Trusted Firmware, we need to
    assemble an ATF-specific parameter structure and also provide the
    address of the images started by ATF (e.g. BL3-3, which may be the
    full U-Boot).
    
    To allow us to identify an ARM Trusted Firmware contained in a FIT
    image, this adds the necessary definitions.
    
    Change-Id: If9f54a8391bba18c5aa220aea09db53271ff4517
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4914af1286c4a48cd0ae98cf6adea3569111413b)

diff --git a/common/image.c b/common/image.c
index e205b0fbe6..20f453de2d 100644
--- a/common/image.c
+++ b/common/image.c
@@ -95,6 +95,7 @@ static const table_entry_t uimage_arch[] = {
 
 static const table_entry_t uimage_os[] = {
 	{	IH_OS_INVALID,	"invalid",	"Invalid OS",		},
+	{       IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware"  },
 	{	IH_OS_LINUX,	"linux",	"Linux",		},
 #if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC)
 	{	IH_OS_LYNXOS,	"lynxos",	"LynxOS",		},
diff --git a/include/image.h b/include/image.h
index 688f00fb88..b9e43ad45c 100644
--- a/include/image.h
+++ b/include/image.h
@@ -152,6 +152,7 @@ enum {
 	IH_OS_OSE,			/* OSE		*/
 	IH_OS_PLAN9,			/* Plan 9	*/
 	IH_OS_OPENRTOS,		/* OpenRTOS	*/
+	IH_OS_ARM_TRUSTED_FIRMWARE,     /* ARM Trusted Firmware */
 
 	IH_OS_COUNT,
 };

commit e71e2ceacfb0595a150cc12c6f1577f474343f07
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Nov 12 21:52:17 2017 -0700

    UPSTREAM: dtoc: Fix up tests
    
    The tool has changed slightly since it was originally written. Update the
    tests to suit.
    
    Change-Id: I6935a7c4cc16e1a3e5c617133b12d1982e640c74
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit aab660fe18ac24ee859a203f517f939685af5e10)

diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index cc009b2a25..41ed80e6da 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -26,6 +26,27 @@ import tools
 our_path = os.path.dirname(os.path.realpath(__file__))
 
 
+HEADER = '''/*
+ * DO NOT MODIFY
+ *
+ * This file was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <stdbool.h>
+#include <libfdt.h>'''
+
+C_HEADER = '''/*
+ * DO NOT MODIFY
+ *
+ * This file was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+'''
+
+
 def get_dtb_file(dts_fname):
     """Compile a .dts file to a .dtb
 
@@ -104,13 +125,12 @@ class TestDtoc(unittest.TestCase):
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             lines = infile.read().splitlines()
-        self.assertEqual(['#include <stdbool.h>', '#include <libfdt.h>'], lines)
+        self.assertEqual(HEADER.splitlines(), lines)
 
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             lines = infile.read().splitlines()
-        self.assertEqual(['#include <common.h>', '#include <dm.h>',
-                          '#include <dt-structs.h>', ''], lines)
+        self.assertEqual(C_HEADER.splitlines() + [''], lines)
 
     def test_simple(self):
         """Test output from some simple nodes with various types of data"""
@@ -119,8 +139,7 @@ class TestDtoc(unittest.TestCase):
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_sandbox_i2c_test {
 };
 struct dtd_sandbox_pmic_test {
@@ -144,10 +163,7 @@ struct dtd_sandbox_spl_test_2 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_sandbox_spl_test dtv_spl_test = {
 \t.bytearray\t\t= {0x6, 0x0, 0x0},
 \t.byteval\t\t= 0x5,
@@ -225,8 +241,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_source {
 \tstruct phandle_2_arg clocks[4];
 };
@@ -238,10 +253,7 @@ struct dtd_target {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_target dtv_phandle_target = {
 \t.intval\t\t\t= 0x0,
 };
@@ -291,8 +303,7 @@ U_BOOT_DEVICE(phandle_source) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_compat1 {
 \tfdt32_t\t\tintval;
 };
@@ -303,10 +314,7 @@ struct dtd_compat1 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_compat1 dtv_spl_test = {
 \t.intval\t\t\t= 0x1,
 };
@@ -325,8 +333,7 @@ U_BOOT_DEVICE(spl_test) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt64_t\t\treg[2];
 };
@@ -341,10 +348,7 @@ struct dtd_test3 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x1234, 0x5678},
 };
@@ -381,8 +385,7 @@ U_BOOT_DEVICE(test3) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt32_t\t\treg[2];
 };
@@ -394,10 +397,7 @@ struct dtd_test2 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x1234, 0x5678},
 };
@@ -425,8 +425,7 @@ U_BOOT_DEVICE(test2) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt64_t\t\treg[2];
 };
@@ -441,10 +440,7 @@ struct dtd_test3 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x123400000000, 0x5678},
 };
@@ -481,8 +477,7 @@ U_BOOT_DEVICE(test3) = {
         dtb_platdata.run_steps(['struct'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <stdbool.h>
-#include <libfdt.h>
+        self.assertEqual(HEADER + '''
 struct dtd_test1 {
 \tfdt64_t\t\treg[2];
 };
@@ -497,10 +492,7 @@ struct dtd_test3 {
         dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
         with open(output) as infile:
             data = infile.read()
-        self.assertEqual('''#include <common.h>
-#include <dm.h>
-#include <dt-structs.h>
-
+        self.assertEqual(C_HEADER + '''
 static struct dtd_test1 dtv_test1 = {
 \t.reg\t\t\t= {0x1234, 0x567800000000},
 };

commit 3abaad4c1f3bf22c8e997c43b83948de4279a8b5
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Nov 12 21:52:12 2017 -0700

    UPSTREAM: patman: Fix up tests to pass with newest checkpatch
    
    The checkpatch tool was updated but the patman tests were not. Fix this.
    
    Change-Id: Ia5ff7589c32205754eb9818ddd2ecafcc6b2b3c1
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6c328f29752224f15b7f098d8676f9eeed269a85)

diff --git a/tools/patman/test.py b/tools/patman/test.py
index 20dc9c1e0d..51145e8390 100644
--- a/tools/patman/test.py
+++ b/tools/patman/test.py
@@ -88,8 +88,7 @@ Signed-off-by: Simon Glass <sjg@chromium.org>
         os.remove(expname)
 
     def GetData(self, data_type):
-        data='''
-From 4924887af52713cabea78420eff03badea8f0035 Mon Sep 17 00:00:00 2001
+        data='''From 4924887af52713cabea78420eff03badea8f0035 Mon Sep 17 00:00:00 2001
 From: Simon Glass <sjg@chromium.org>
 Date: Thu, 7 Apr 2011 10:14:41 -0700
 Subject: [PATCH 1/4] Add microsecond boot time measurement
@@ -101,6 +100,7 @@ an available microsecond counter.
 %s
 ---
  README              |   11 ++++++++
+ MAINTAINERS         |    3 ++
  common/bootstage.c  |   50 ++++++++++++++++++++++++++++++++++++
  include/bootstage.h |   71 +++++++++++++++++++++++++++++++++++++++++++++++++++
  include/common.h    |    8 ++++++
@@ -130,19 +130,31 @@ index 6f3748d..f9e4e65 100644
  - Standalone program support:
  		CONFIG_STANDALONE_LOAD_ADDR
 
+diff --git a/MAINTAINERS b/MAINTAINERS
+index b167b028ec..beb7dc634f 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -474,3 +474,8 @@ S:	Maintained
+ T:	git git://git.denx.de/u-boot.git
+ F:	*
+ F:	*/
++
++BOOTSTAGE
++M:	Simon Glass <sjg@chromium.org>
++L:	u-boot@lists.denx.de
++F:	common/bootstage.c
 diff --git a/common/bootstage.c b/common/bootstage.c
 new file mode 100644
 index 0000000..2234c87
 --- /dev/null
 +++ b/common/bootstage.c
-@@ -0,0 +1,39 @@
+@@ -0,0 +1,37 @@
 +/*
 + * Copyright (c) 2011, Google Inc. All rights reserved.
 + *
 + * SPDX-License-Identifier:	GPL-2.0+
 + */
 +
-+
 +/*
 + * This module records the progress of boot and arbitrary commands, and
 + * permits accurate timestamping of each. The records can optionally be
@@ -151,26 +163,25 @@ index 0000000..2234c87
 +
 +#include <common.h>
 +
-+
 +struct bootstage_record {
-+	uint32_t time_us;
++	u32 time_us;
 +	const char *name;
 +};
 +
 +static struct bootstage_record record[BOOTSTAGE_COUNT];
 +
-+uint32_t bootstage_mark(enum bootstage_id id, const char *name)
++u32 bootstage_mark(enum bootstage_id id, const char *name)
 +{
 +	struct bootstage_record *rec = &record[id];
 +
 +	/* Only record the first event for each */
 +%sif (!rec->name) {
-+		rec->time_us = (uint32_t)timer_get_us();
++		rec->time_us = (u32)timer_get_us();
 +		rec->name = name;
 +	}
 +	if (!rec->name &&
 +	%ssomething_else) {
-+		rec->time_us = (uint32_t)timer_get_us();
++		rec->time_us = (u32)timer_get_us();
 +		rec->name = name;
 +	}
 +%sreturn rec->time_us;
@@ -210,7 +221,7 @@ index 0000000..2234c87
         self.assertEqual(result.errors, 0)
         self.assertEqual(result.warnings, 0)
         self.assertEqual(result.checks, 0)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
     def testNoSignoff(self):
@@ -221,18 +232,18 @@ index 0000000..2234c87
         self.assertEqual(result.errors, 1)
         self.assertEqual(result.warnings, 0)
         self.assertEqual(result.checks, 0)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
     def testSpaces(self):
         inf = self.SetupData('spaces')
         result = checkpatch.CheckPatch(inf)
         self.assertEqual(result.ok, False)
-        self.assertEqual(len(result.problems), 2)
+        self.assertEqual(len(result.problems), 3)
         self.assertEqual(result.errors, 0)
-        self.assertEqual(result.warnings, 2)
+        self.assertEqual(result.warnings, 3)
         self.assertEqual(result.checks, 0)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
     def testIndent(self):
@@ -243,7 +254,7 @@ index 0000000..2234c87
         self.assertEqual(result.errors, 0)
         self.assertEqual(result.warnings, 0)
         self.assertEqual(result.checks, 1)
-        self.assertEqual(result.lines, 56)
+        self.assertEqual(result.lines, 62)
         os.remove(inf)
 
 

commit 0fac560f1745211eafa181080c120f29ca14c953
Author: S. Lockwood-Childs <sjl@vctlabs.com>
Date:   Tue Nov 14 22:56:42 2017 -0800

    UPSTREAM: README: update mailing list url
    
    Old url currently returns 403; modify to url that actually works
    with current state of the list server
    
    Change-Id: If1d5c756a496c89de98d6685c6b3a37141d17044
    Signed-off-by: S. Lockwood-Childs <sjl@vctlabs.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1dade18e40acc41e2b98b46ce1cb4f198cd40af9)

diff --git a/README b/README
index 92a5f8428e..903cd65db7 100644
--- a/README
+++ b/README
@@ -5229,7 +5229,7 @@ may be rejected, even when they contain important and valuable stuff.
 Please see http://www.denx.de/wiki/U-Boot/Patches for details.
 
 Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>;
-see http://lists.denx.de/mailman/listinfo/u-boot
+see https://lists.denx.de/listinfo/u-boot
 
 When you send a patch, please include the following information with
 it:

commit 25e0b4f36e285181a0ecbe88a1054e41d05d5848
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Fri Nov 10 21:46:34 2017 +0100

    UPSTREAM: malloc: don't compare pointers to 0
    
    0 is not a pointer. So do not compare pointers to 0.
    
    Do not return 0 from functions with a pointer return
    type.
    
    Problem identified with Coccinelle.
    
    Change-Id: Ib8447e3ff21d7fc256a9c4a4ed3c4396ce12e00a
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a874cac3b45cbb6dd8bad05a5b42912acae6b7e4)

diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index c37979b43f..b395eefbf8 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -149,7 +149,7 @@ gAllocatedSize))
 			{
 				new_address = findRegion (new_address, new_size);
 
-				if (new_address == 0)
+				if (!new_address)
 					return (void*)-1;
 
 				gAddressBase = gNextAddress =
@@ -175,7 +175,7 @@ gAllocatedSize))
 								(size + gNextAddress -
 								 AlignPage (gNextAddress)),
 								MEM_COMMIT, PAGE_READWRITE);
-			if (res == 0)
+			if (!res)
 				return (void*)-1;
 		}
 		tmp = (void*)gNextAddress;
@@ -1461,7 +1461,7 @@ Void_t* mALLOc(bytes) size_t bytes;
 #if HAVE_MMAP
     /* If big and would otherwise need to extend, try to use mmap instead */
     if ((unsigned long)nb >= (unsigned long)mmap_threshold &&
-	(victim = mmap_chunk(nb)) != 0)
+	(victim = mmap_chunk(nb)))
       return chunk2mem(victim);
 #endif
 
@@ -1671,7 +1671,10 @@ Void_t* rEALLOc(oldmem, bytes) Void_t* oldmem; size_t bytes;
   mchunkptr fwd;              /* misc temp for linking */
 
 #ifdef REALLOC_ZERO_BYTES_FREES
-  if (bytes == 0) { fREe(oldmem); return 0; }
+  if (!bytes) {
+	fREe(oldmem);
+	return NULL;
+  }
 #endif
 
   if ((long)bytes < 0) return NULL;
@@ -1703,7 +1706,8 @@ Void_t* rEALLOc(oldmem, bytes) Void_t* oldmem; size_t bytes;
     if(oldsize - SIZE_SZ >= nb) return oldmem; /* do nothing */
     /* Must alloc, copy, free. */
     newmem = mALLOc(bytes);
-    if (newmem == 0) return 0; /* propagate failure */
+    if (!newmem)
+	return NULL; /* propagate failure */
     MALLOC_COPY(newmem, oldmem, oldsize - 2*SIZE_SZ);
     munmap_chunk(oldp);
     return newmem;

commit 479637400b0e37d96e3921021dbd572335f56f9b
Author: M. Vefa Bicakci <m.v.b@runbox.com>
Date:   Sat Nov 11 22:48:40 2017 -0500

    UPSTREAM: Makefile: Correct SPL/TPL/DTB build race condition
    
    When building on a multi-core machine for an SPL-enabled board that
    also uses CONFIG_OF_EMBED, the following error can be encountered
    due to a race condition:
    
      make[3]: *** No rule to make target 'spl/dts/dt.dtb.o', needed by
        'spl/dts/built-in.o'.  Stop.
      ../scripts/Makefile.spl:364: recipe for target 'spl/dts' failed
      make[2]: *** [spl/dts] Error 2
      make[2]: *** Waiting for unfinished jobs....
    
    A reliable way to trigger this race condition is to add "sleep 60" to
    the end of the "arch-dtbs" rule's recipe in "dts/Makefile" and to build
    U-Boot against a board which uses the CONFIG_OF_EMBED and CONFIG_SPL
    options using "make -j8" or a similar command.
    
    This commit corrects this race condition via the use of CONFIG_OF_EMBED
    in the same way that commit 3c00a2c8b5e2 ("Makefile: Correct dependency
    race condition with TPL") and commit 054b3a1e80fc ("dm: Makefile: Build
    of-platdata before SPL") use CONFIG_OF_SEPARATE.
    
    Change-Id: I7177cf1b16cbdc1e071f93956e45472188dc2390
    Signed-off-by: M. Vefa Bicakci <m.v.b@runbox.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit dd2081a8e46877df5166fcd5af7f26c74a799317)

diff --git a/Makefile b/Makefile
index 2335d24752..c27875d336 100644
--- a/Makefile
+++ b/Makefile
@@ -1389,8 +1389,8 @@ u-boot.lds: $(LDSCRIPT) prepare FORCE
 spl/u-boot-spl.bin: spl/u-boot-spl
 	@:
 spl/u-boot-spl: tools prepare \
-		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
-		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
+		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \
+		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb)
 	$(Q)$(MAKE) obj=spl -f $(srctree)/scripts/Makefile.spl all
 
 spl/sunxi-spl.bin: spl/u-boot-spl
@@ -1406,7 +1406,7 @@ spl/boot.bin: spl/u-boot-spl
 	@:
 
 tpl/u-boot-tpl.bin: tools prepare \
-		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
+		$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb)
 	$(Q)$(MAKE) obj=tpl -f $(srctree)/scripts/Makefile.spl all
 
 TAG_SUBDIRS := $(patsubst %,$(srctree)/%,$(u-boot-dirs) include)

commit 8427a52440be5241b31136a351712acb811ed8a6
Author: Ian Ray <ian.ray@ge.com>
Date:   Wed Nov 8 15:35:13 2017 +0000

    UPSTREAM: bootcount: add support for bootcounter on EXT filesystem
    
    Add support for bootcounter on an EXT filesystem.
    Sync configuration whitelist.
    
    Change-Id: Iad44e2526afa9b1c117bde7527774e414fa54d8c
    Signed-off-by: Ian Ray <ian.ray@ge.com>
    Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f31dac4e6e71c7c818151cd917d872909119fb99)

diff --git a/README b/README
index f0956d9153..92a5f8428e 100644
--- a/README
+++ b/README
@@ -2432,6 +2432,13 @@ The following options need to be configured:
 			CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
 						    the bootcounter.
 			CONFIG_BOOTCOUNT_ALEN = address len
+		CONFIG_BOOTCOUNT_EXT
+		enable support for the bootcounter in EXT filesystem
+			CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read
+                                                    and write.
+			CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface
+			CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part
+			CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename
 
 - Show boot progress:
 		CONFIG_SHOW_BOOT_PROGRESS
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 26348736fd..11d7fb2ed0 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -10,6 +10,8 @@ source "drivers/ata/Kconfig"
 
 source "drivers/block/Kconfig"
 
+source "drivers/bootcount/Kconfig"
+
 source "drivers/clk/Kconfig"
 
 source "drivers/cpu/Kconfig"
diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig
new file mode 100644
index 0000000000..c9d627cce2
--- /dev/null
+++ b/drivers/bootcount/Kconfig
@@ -0,0 +1,58 @@
+#
+# Boot count configuration
+#
+
+menu "Boot count support"
+
+config BOOTCOUNT
+	bool "Enable Boot count support"
+	help
+	  Enable boot count support, which provides the ability to store the
+	  number of times the board has booted on a number of different
+	  persistent storage mediums.
+
+if BOOTCOUNT
+
+config BOOTCOUNT_EXT
+	bool "Boot counter on EXT filesystem"
+	help
+	  Add support for maintaining boot count in a file on an EXT
+	  filesystem.
+
+if BOOTCOUNT_EXT
+
+config SYS_BOOTCOUNT_EXT_INTERFACE
+	string "Interface on which to find boot counter EXT filesystem"
+	default "mmc"
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the interface to use when locating the filesystem to use for the
+	  boot counter.
+
+config SYS_BOOTCOUNT_EXT_DEVPART
+	string "Partition of the boot counter EXT filesystem"
+	default "0:1"
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the partition to use when locating the filesystem to use for the
+	  boot counter.
+
+config SYS_BOOTCOUNT_EXT_NAME
+	string "Path and filename of the EXT filesystem based boot counter"
+	default "/boot/failures"
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the filename and path of the file used to store the boot counter.
+
+config SYS_BOOTCOUNT_ADDR
+	hex "RAM address used for reading and writing the boot counter"
+	default 0x7000A000
+	depends on BOOTCOUNT_EXT
+	help
+	  Set the address used for reading and writing the boot counter.
+
+endif
+
+endif
+
+endmenu
diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile
index ed9659ad97..45445d24bf 100644
--- a/drivers/bootcount/Makefile
+++ b/drivers/bootcount/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_BOOTCOUNT_AM33XX)	+= bootcount_davinci.o
 obj-$(CONFIG_BOOTCOUNT_RAM)	+= bootcount_ram.o
 obj-$(CONFIG_BOOTCOUNT_ENV)	+= bootcount_env.o
 obj-$(CONFIG_BOOTCOUNT_I2C)	+= bootcount_i2c.o
+obj-$(CONFIG_BOOTCOUNT_EXT)	+= bootcount_ext.o
diff --git a/drivers/bootcount/bootcount_ext.c b/drivers/bootcount/bootcount_ext.c
new file mode 100644
index 0000000000..e0dd21ba6a
--- /dev/null
+++ b/drivers/bootcount/bootcount_ext.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2017 General Electric Company. All rights reserved.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <bootcount.h>
+#include <fs.h>
+#include <mapmem.h>
+
+#define BC_MAGIC	0xbc
+
+void bootcount_store(ulong a)
+{
+	u8 *buf;
+	loff_t len;
+	int ret;
+
+	if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE,
+			   CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) {
+		puts("Error selecting device\n");
+		return;
+	}
+
+	buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2);
+	buf[0] = BC_MAGIC;
+	buf[1] = (a & 0xff);
+	unmap_sysmem(buf);
+
+	ret = fs_write(CONFIG_SYS_BOOTCOUNT_EXT_NAME,
+		       CONFIG_SYS_BOOTCOUNT_ADDR, 0, 2, &len);
+	if (ret != 0)
+		puts("Error storing bootcount\n");
+}
+
+ulong bootcount_load(void)
+{
+	u8 *buf;
+	loff_t len_read;
+	int ret;
+
+	if (fs_set_blk_dev(CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE,
+			   CONFIG_SYS_BOOTCOUNT_EXT_DEVPART, FS_TYPE_EXT)) {
+		puts("Error selecting device\n");
+		return 0;
+	}
+
+	ret = fs_read(CONFIG_SYS_BOOTCOUNT_EXT_NAME, CONFIG_SYS_BOOTCOUNT_ADDR,
+		      0, 2, &len_read);
+	if (ret != 0 || len_read != 2) {
+		puts("Error loading bootcount\n");
+		return 0;
+	}
+
+	buf = map_sysmem(CONFIG_SYS_BOOTCOUNT_ADDR, 2);
+	if (buf[0] == BC_MAGIC)
+		ret = buf[1];
+
+	unmap_sysmem(buf);
+
+	return ret;
+}

commit 18147e8245ce7f14c39507bb9f80a8ef4cb23bc4
Author: Ian Ray <ian.ray@ge.com>
Date:   Wed Nov 8 15:35:10 2017 +0000

    UPSTREAM: ext4: recover from filesystem corruption when reading
    
    Some fixes when reading EXT files and directory entries were identified
    after using e2fuzz to corrupt an EXT3 filesystem:
    
     - Stop reading directory entries if the offset becomes badly aligned.
    
     - Avoid overwriting memory by clamping the length used to zero the buffer
       in ext4fs_read_file.  Also sanity check blocksize.
    
    Change-Id: Ic1dafbde2f375784ef1f30746bd5cfa847356b6a
    Signed-off-by: Ian Ray <ian.ray@ge.com>
    Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
    Reviewed-by: Stefano Babic <sbabic@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ecdfb4195b20eb2dcde3c4083170016c13c69e8b)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 31952f48b9..dac9545365 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -660,6 +660,11 @@ static int search_dir(struct ext2_inode *parent_inode, char *dirname)
 
 		offset = 0;
 		do {
+			if (offset & 3) {
+				printf("Badly aligned ext2_dirent\n");
+				break;
+			}
+
 			dir = (struct ext2_dirent *)(block_buffer + offset);
 			direntname = (char*)(dir) + sizeof(struct ext2_dirent);
 
@@ -880,6 +885,11 @@ static int unlink_filename(char *filename, unsigned int blknr)
 
 	offset = 0;
 	do {
+		if (offset & 3) {
+			printf("Badly aligned ext2_dirent\n");
+			break;
+		}
+
 		previous_dir = dir;
 		dir = (struct ext2_dirent *)(block_buffer + offset);
 		direntname = (char *)(dir) + sizeof(struct ext2_dirent);
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index b0c7303aa4..9ee2caf2fa 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -64,6 +64,9 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
 	char *delayed_buf = NULL;
 	short status;
 
+	if (blocksize <= 0)
+		return -1;
+
 	/* Adjust len so it we can't read past the end of the file. */
 	if (len + pos > filesize)
 		len = (filesize - pos);
@@ -127,6 +130,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
 					(blockend >> log2blksz);
 			}
 		} else {
+			int n;
 			if (previous_block_number != -1) {
 				/* spill */
 				status = ext4fs_devread(delayed_start,
@@ -137,7 +141,11 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
 					return -1;
 				previous_block_number = -1;
 			}
-			memset(buf, 0, blocksize - skipfirst);
+			/* Zero no more than `len' bytes. */
+			n = blocksize - skipfirst;
+			if (n > len)
+				n = len;
+			memset(buf, 0, n);
 		}
 		buf += blocksize - skipfirst;
 	}

commit 6c82a31e5adf1f4358b13168992114ec01e4027a
Author: Baruch Siach <baruch@tkos.co.il>
Date:   Thu Nov 9 13:44:28 2017 +0200

    UPSTREAM: dm: core: fix member name in ofnode_union documentation
    
    Fixes: 4984de2baaa ("dm: core: Add ofnode to represent device tree nodes")
    Cc: Simon Glass <sjg@chromium.org>
    Change-Id: I2bd28eac2ff9568ff1723dc8f20e4f3ff1dee443
    Signed-off-by: Baruch Siach <baruch@tkos.co.il>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit afc1a78a0bd5db69f72db1dfa07b4a37a54343f6)

diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 79374b8f91..8b9932a569 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -45,7 +45,7 @@ struct resource;
  * the DT.
  *
  * @np: Pointer to device node, used for live tree
- * @flat_ptr: Pointer into flat device tree, used for flat tree. Note that this
+ * @of_offset: Pointer into flat device tree, used for flat tree. Note that this
  *	is not a really a pointer to a node: it is an offset value. See above.
  */
 typedef union ofnode_union {

commit e5367ca9ac2a9f2e56048044945b3985c3fc3e68
Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date:   Mon Nov 6 14:16:37 2017 +0100

    UPSTREAM: env: Save environment at the end of an MMC partition
    
    Allow the platform to define a partition by name at the end of which
    the environment data will be located.
    
    Change-Id: Id0c66ee0be4dbd8fe739d05087894632d2b4e23f
    Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c9e87ba66540cf72c164674a71af43853d087ba8)

diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt
index fe0e04af92..15e4349c19 100644
--- a/doc/device-tree-bindings/config.txt
+++ b/doc/device-tree-bindings/config.txt
@@ -21,6 +21,15 @@ u-boot,efi-partition-entries-offset
 
 	This setting will override any values configured via Kconfig.
 
+u-boot,mmc-env-partition
+	if present, the environment shall be placed at the last
+	CONFIG_ENV_SIZE blocks of the partition on the
+	CONFIG_SYS_MMC_ENV_DEV.
+
+	if u-boot,mmc-env-offset* is present, this setting will take
+	precedence. In that case, only if the partition is not found,
+	mmc-env-offset* will be tried.
+
 u-boot,mmc-env-offset
 u-boot,mmc-env-offset-redundant
 	If present, the values of the 'u-boot,mmc-env-offset' and/or
diff --git a/env/mmc.c b/env/mmc.c
index 3f3092d975..3343f9e9f6 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -15,9 +15,13 @@
 #include <malloc.h>
 #include <memalign.h>
 #include <mmc.h>
+#include <part.h>
 #include <search.h>
 #include <errno.h>
 
+#define __STR(X) #X
+#define STR(X) __STR(X)
+
 #if defined(CONFIG_ENV_SIZE_REDUND) &&  \
 	(CONFIG_ENV_SIZE_REDUND != CONFIG_ENV_SIZE)
 #error CONFIG_ENV_SIZE_REDUND should be the same as CONFIG_ENV_SIZE
@@ -30,18 +34,68 @@ DECLARE_GLOBAL_DATA_PTR;
 #endif
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+static inline int mmc_offset_try_partition(const char *str, s64 *val)
+{
+	disk_partition_t info;
+	struct blk_desc *desc;
+	int len, i, ret;
+
+	ret = blk_get_device_by_str("mmc", STR(CONFIG_SYS_MMC_ENV_DEV), &desc);
+	if (ret < 0)
+		return (ret);
+
+	for (i = 1;;i++) {
+		ret = part_get_info(desc, i, &info);
+		if (ret < 0)
+			return ret;
+
+		if (!strncmp((const char *)info.name, str, sizeof(str)))
+			break;
+	}
+
+	/* round up to info.blksz */
+	len = (CONFIG_ENV_SIZE + info.blksz - 1) & ~(info.blksz - 1);
+
+	/* use the top of the partion for the environment */
+	*val = (info.start + info.size - 1) - len / info.blksz;
+
+	return 0;
+}
+
 static inline s64 mmc_offset(int copy)
 {
-	const char *propname = "u-boot,mmc-env-offset";
-	s64 defvalue = CONFIG_ENV_OFFSET;
+	const struct {
+		const char *offset_redund;
+		const char *partition;
+		const char *offset;
+	} dt_prop = {
+		.offset_redund = "u-boot,mmc-env-offset-redundant",
+		.partition = "u-boot,mmc-env-partition",
+		.offset = "u-boot,mmc-env-offset",
+	};
+	s64 val, defvalue;
+	const char *propname;
+	const char *str;
+	int err;
+
+	/* look for the partition in mmc CONFIG_SYS_MMC_ENV_DEV */
+	str = fdtdec_get_config_string(gd->fdt_blob, dt_prop.partition);
+	if (str) {
+		/* try to place the environment at end of the partition */
+		err = mmc_offset_try_partition(str, &val);
+		if (!err)
+			return val;
+	}
+
+	defvalue = CONFIG_ENV_OFFSET;
+	propname = dt_prop.offset;
 
 #if defined(CONFIG_ENV_OFFSET_REDUND)
 	if (copy) {
-		propname = "u-boot,mmc-env-offset-redundant";
 		defvalue = CONFIG_ENV_OFFSET_REDUND;
+		propname = dt_prop.offset_redund;
 	}
 #endif
-
 	return fdtdec_get_config_int(gd->fdt_blob, propname, defvalue);
 }
 #else

commit f00ac1e52b1f63035534303e67360b4cd7849c58
Author: Stephen Warren <swarren@nvidia.com>
Date:   Thu Nov 2 18:11:27 2017 -0600

    UPSTREAM: arm64: support running at addr other than linked to
    
    This is required in the case where U-Boot is typically loaded and run at
    a particular address, but for some reason the RAM at that location is not
    available, e.g. due to memory fragmentation loading other boot binaries or
    firmware, splitting an SMP complex between various different OSs without
    using e.g. the EL2 second-stage page tables to hide the memory asignments,
    or due to known ECC failures.
    
    Change-Id: I2fd535325517921c6036188b74ab4facd37b7118
    Signed-off-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 49e93875a62fb9e96a4a7483b9bd5d8ae27ea76e)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 41df5ac641..005a315116 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -9,6 +9,22 @@ config ARM64
 	select PHYS_64BIT
 	select SYS_CACHE_SHIFT_6
 
+if ARM64
+config POSITION_INDEPENDENT
+	bool "Generate position-independent pre-relocation code"
+	help
+	  U-Boot expects to be linked to a specific hard-coded address, and to
+	  be loaded to and run from that address. This option lifts that
+	  restriction, thus allowing the code to be loaded to and executed
+	  from almost any address. This logic relies on the relocation
+	  information that is embedded into the binary to support U-Boot
+	  relocating itself to the top-of-RAM later during execution.
+endif
+
+config STATIC_RELA
+	bool
+	default y if ARM64 && !POSITION_INDEPENDENT
+
 config DMA_ADDR_T_64BIT
 	bool
 	default y if ARM64
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index b5ada61062..6d47988a13 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -57,6 +57,32 @@ reset:
 .globl	save_boot_params_ret
 save_boot_params_ret:
 
+#if CONFIG_POSITION_INDEPENDENT
+	/*
+	 * Fix .rela.dyn relocations. This allows U-Boot to be loaded to and
+	 * executed at a different address than it was linked at.
+	 */
+pie_fixup:
+	adr	x0, _start		/* x0 <- Runtime value of _start */
+	ldr	x1, _TEXT_BASE		/* x1 <- Linked value of _start */
+	sub	x9, x0, x1		/* x9 <- Run-vs-link offset */
+	adr	x2, __rel_dyn_start	/* x2 <- Runtime &__rel_dyn_start */
+	adr	x3, __rel_dyn_end	/* x3 <- Runtime &__rel_dyn_end */
+pie_fix_loop:
+	ldp	x0, x1, [x2], #16	/* (x0, x1) <- (Link location, fixup) */
+	ldr	x4, [x2], #8		/* x4 <- addend */
+	cmp	w1, #1027		/* relative fixup? */
+	bne	pie_skip_reloc
+	/* relative fix: store addend plus offset at dest location */
+	add	x0, x0, x9
+	add	x4, x4, x9
+	str	x4, [x0]
+pie_skip_reloc:
+	cmp	x2, x3
+	b.lo	pie_fix_loop
+pie_fixup_done:
+#endif
+
 #ifdef CONFIG_SYS_RESET_SCTRL
 	bl reset_sctrl
 #endif
diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h
index 5674d37c04..9f17829381 100644
--- a/arch/arm/include/asm/config.h
+++ b/arch/arm/include/asm/config.h
@@ -10,10 +10,6 @@
 #define CONFIG_LMB
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
-#ifdef CONFIG_ARM64
-#define CONFIG_STATIC_RELA
-#endif
-
 #if defined(CONFIG_ARCH_LS1021A) || \
 	defined(CONFIG_CPU_PXA27X) || \
 	defined(CONFIG_CPU_MONAHANS) || \
diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index d6c50bb439..ccefce0b20 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -98,6 +98,14 @@ ENTRY(_main)
 	ldr	x18, [x18, #GD_NEW_GD]		/* x18 <- gd->new_gd */
 
 	adr	lr, relocation_return
+#if CONFIG_POSITION_INDEPENDENT
+	/* Add in link-vs-runtime offset */
+	adr	x0, _start		/* x0 <- Runtime value of _start */
+	ldr	x9, _TEXT_BASE		/* x9 <- Linked value of _start */
+	sub	x9, x9, x0		/* x9 <- Run-vs-link offset */
+	add	lr, lr, x9
+#endif
+	/* Add in link-vs-relocation offset */
 	ldr	x9, [x18, #GD_RELOC_OFF]	/* x9 <- gd->reloc_off */
 	add	lr, lr, x9	/* new return address after relocation */
 	ldr	x0, [x18, #GD_RELOCADDR]	/* x0 <- gd->relocaddr */
diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
index fdba004363..04804524ed 100644
--- a/arch/arm/lib/relocate_64.S
+++ b/arch/arm/lib/relocate_64.S
@@ -27,11 +27,24 @@ ENTRY(relocate_code)
 	/*
 	 * Copy u-boot from flash to RAM
 	 */
-	ldr	x1, =__image_copy_start	/* x1 <- SRC &__image_copy_start */
-	subs	x9, x0, x1		/* x9 <- relocation offset */
+	adr	x1, __image_copy_start	/* x1 <- Run &__image_copy_start */
+	subs	x9, x0, x1		/* x8 <- Run to copy offset */
 	b.eq	relocate_done		/* skip relocation */
-	ldr	x2, =__image_copy_end	/* x2 <- SRC &__image_copy_end */
+	/*
+	 * Don't ldr x1, __image_copy_start here, since if the code is already
+	 * running at an address other than it was linked to, that instruction
+	 * will load the relocated value of __image_copy_start. To
+	 * correctly apply relocations, we need to know the linked value.
+	 *
+	 * Linked &__image_copy_start, which we know was at
+	 * CONFIG_SYS_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
+	 * relocated value, since it isn't a symbol reference.
+	 */
+	ldr	x1, _TEXT_BASE		/* x1 <- Linked &__image_copy_start */
+	subs	x9, x0, x1		/* x9 <- Link to copy offset */
 
+	adr	x1, __image_copy_start	/* x1 <- Run &__image_copy_start */
+	adr	x2, __image_copy_end	/* x2 <- Run &__image_copy_end */
 copy_loop:
 	ldp	x10, x11, [x1], #16	/* copy from source address [x1] */
 	stp	x10, x11, [x0], #16	/* copy to   target address [x0] */
@@ -42,8 +55,8 @@ copy_loop:
 	/*
 	 * Fix .rela.dyn relocations
 	 */
-	ldr	x2, =__rel_dyn_start	/* x2 <- SRC &__rel_dyn_start */
-	ldr	x3, =__rel_dyn_end	/* x3 <- SRC &__rel_dyn_end */
+	adr	x2, __rel_dyn_start	/* x2 <- Run &__rel_dyn_start */
+	adr	x3, __rel_dyn_end	/* x3 <- Run &__rel_dyn_end */
 fixloop:
 	ldp	x0, x1, [x2], #16	/* (x0,x1) <- (SRC location, fixup) */
 	ldr	x4, [x2], #8		/* x4 <- addend */

commit 1151fbe6486d939516c6980af35f8e8e08d4fb23
Author: Stephen Warren <swarren@nvidia.com>
Date:   Fri Oct 27 11:04:08 2017 -0600

    UPSTREAM: test/py: add timestamps to log
    
    It can be useful to record how long tests take; this can help debug slow
    running test systems or track changes in performance over time. Enhance
    the test system to record timestamps while running test:
    - Whenever a new log file section is started.
    - After U-Boot is started and communication has been established.
    - After each host or U-Boot command is executed.
    
    Change-Id: I1db02bfc1d69c8d6a4c390a778ae433bbd858a9d
    Signed-off-by: Stephen Warren <swarren@nvidia.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9679d339ad2d4c495d734bad3a0fb7be6c4215eb)

diff --git a/test/py/multiplexed_log.css b/test/py/multiplexed_log.css
index f135b10a24..9b7c44fe4d 100644
--- a/test/py/multiplexed_log.css
+++ b/test/py/multiplexed_log.css
@@ -62,6 +62,10 @@ pre {
     color: #8080ff
 }
 
+.timestamp {
+    color: #8080ff
+}
+
 .status-pass {
     color: #00ff00
 }
diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py
index bf926c3e77..6afc41dcaf 100644
--- a/test/py/multiplexed_log.py
+++ b/test/py/multiplexed_log.py
@@ -7,6 +7,7 @@
 # each represented in a well-delineated/-structured fashion.
 
 import cgi
+import datetime
 import os.path
 import shutil
 import subprocess
@@ -164,6 +165,7 @@ class RunAndLog(object):
         self.logfile.write(self, output)
         if self.chained_file:
             self.chained_file.write(output)
+        self.logfile.timestamp()
 
         # Store the output so it can be accessed if we raise an exception.
         self.output = output
@@ -219,6 +221,9 @@ class Logfile(object):
         self.blocks = []
         self.cur_evt = 1
         self.anchor = 0
+        self.timestamp_start = self._get_time()
+        self.timestamp_prev = self.timestamp_start
+        self.timestamp_blocks = []
 
         shutil.copy(mod_dir + '/multiplexed_log.css', os.path.dirname(fn))
         self.f.write('''\
@@ -388,6 +393,7 @@ $(document).ready(function () {
 
         self._terminate_stream()
         self.blocks.append(marker)
+        self.timestamp_blocks.append(self._get_time())
         if not anchor:
             self.anchor += 1
             anchor = str(self.anchor)
@@ -396,6 +402,7 @@ $(document).ready(function () {
         self.f.write('<div class="section-header block-header">Section: ' +
                      blk_path + '</div>\n')
         self.f.write('<div class="section-content block-content">\n')
+        self.timestamp()
 
         return anchor
 
@@ -416,6 +423,11 @@ $(document).ready(function () {
             raise Exception('Block nesting mismatch: "%s" "%s"' %
                             (marker, '/'.join(self.blocks)))
         self._terminate_stream()
+        timestamp_now = self._get_time()
+        timestamp_section_start = self.timestamp_blocks.pop()
+        delta_section = timestamp_now - timestamp_section_start
+        self._note("timestamp",
+            "TIME: SINCE-SECTION: " + str(delta_section))
         blk_path = '/'.join(self.blocks)
         self.f.write('<div class="section-trailer block-trailer">' +
                      'End section: ' + blk_path + '</div>\n')
@@ -492,6 +504,31 @@ $(document).ready(function () {
 
         self._note("action", msg)
 
+    def _get_time(self):
+        return datetime.datetime.now()
+
+    def timestamp(self):
+        """Write a timestamp to the log file.
+
+        Args:
+            None
+
+        Returns:
+            Nothing.
+        """
+
+        timestamp_now = self._get_time()
+        delta_prev = timestamp_now - self.timestamp_prev
+        delta_start = timestamp_now - self.timestamp_start
+        self.timestamp_prev = timestamp_now
+
+        self._note("timestamp",
+            "TIME: NOW: " + timestamp_now.strftime("%Y/%m/%d %H:%M:%S.%f"))
+        self._note("timestamp",
+            "TIME: SINCE-PREV: " + str(delta_prev))
+        self._note("timestamp",
+            "TIME: SINCE-START: " + str(delta_start))
+
     def status_pass(self, msg, anchor=None):
         """Write a note to the log file describing test(s) which passed.
 
diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index eedf73f858..4bccd72050 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -215,6 +215,8 @@ class ConsoleBase(object):
             self.log.error(str(ex))
             self.cleanup_spawn()
             raise
+        finally:
+            self.log.timestamp()
 
     def run_command_list(self, cmds):
         """Run a list of commands.
@@ -370,6 +372,7 @@ class ConsoleBase(object):
             self.cleanup_spawn()
             raise
         finally:
+            self.log.timestamp()
             self.log.end_section('Starting U-Boot')
 
     def cleanup_spawn(self):

commit 5d099091a8d6c4b4424b907f3c2ae4bcab223779
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:20 2017 +0900

    UPSTREAM: lib: libfdt: wrap scripts/dtc/libfdt/* where possible
    
    lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
    followings 6 files:
      fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
      fdt_sw.c
    
    Make them a wrapper of scripts/dtc/libfdt/*.  This is exactly what
    Linux does to sync libfdt.  In order to make is possible, import
    <linux/libfdt.h> and <linux/libfdt_env.h> from Linux 4.14-rc5.
    
    Unfortunately, U-Boot locally modified the following 3 files:
      fdt_ro.c fdt_wip.c fdt_rw.c
    
    The fdt_region.c is U-Boot own file.
    
    I did not touch them in order to avoid unpredictable impact.
    
    Change-Id: I154855ba51291bf56775714c0066247431d66244
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 50a327ded68b7e675389ad284ea3f8c62e683bda)

diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index 6c6845f76c..273b5d30f8 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -23,12 +23,6 @@ typedef __be64 fdt64_t;
 #define fdt64_to_cpu(x)		be64_to_cpu(x)
 #define cpu_to_fdt64(x)		cpu_to_be64(x)
 
-#ifdef __UBOOT__
-#include <vsprintf.h>
-
-#define strtoul(cp, endp, base)	simple_strtoul(cp, endp, base)
-#endif
-
 /* adding a ramdisk needs 0x44 bytes in version 2008.10 */
 #define FDT_RAMDISK_OVERHEAD	0x80
 
diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h
new file mode 100644
index 0000000000..2a663c6bb4
--- /dev/null
+++ b/include/linux/libfdt.h
@@ -0,0 +1,17 @@
+#ifndef _LIBFDT_ENV_H
+#define _LIBFDT_ENV_H
+
+#include <linux/string.h>
+
+#include <asm/byteorder.h>
+
+typedef __be16 fdt16_t;
+typedef __be32 fdt32_t;
+typedef __be64 fdt64_t;
+
+#define fdt32_to_cpu(x) be32_to_cpu(x)
+#define cpu_to_fdt32(x) cpu_to_be32(x)
+#define fdt64_to_cpu(x) be64_to_cpu(x)
+#define cpu_to_fdt64(x) cpu_to_be64(x)
+
+#endif /* _LIBFDT_ENV_H */
diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h
new file mode 100644
index 0000000000..8178f9174b
--- /dev/null
+++ b/include/linux/libfdt_env.h
@@ -0,0 +1,22 @@
+#ifndef _LIBFDT_ENV_H
+#define _LIBFDT_ENV_H
+
+#include <linux/string.h>
+
+#include <asm/byteorder.h>
+
+typedef __be16 fdt16_t;
+typedef __be32 fdt32_t;
+typedef __be64 fdt64_t;
+
+#define fdt32_to_cpu(x) be32_to_cpu(x)
+#define cpu_to_fdt32(x) cpu_to_be32(x)
+#define fdt64_to_cpu(x) be64_to_cpu(x)
+#define cpu_to_fdt64(x) cpu_to_be64(x)
+
+/* U-Boot: for strtoul in fdt_overlay.c */
+#include <vsprintf.h>
+
+#define strtoul(cp, endp, base)	simple_strtoul(cp, endp, base)
+
+#endif /* _LIBFDT_ENV_H */
diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile
index 6ef8290f4e..369bbf9ba3 100644
--- a/lib/libfdt/Makefile
+++ b/lib/libfdt/Makefile
@@ -5,15 +5,22 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+# Use upstream code.
 obj-y += \
 	fdt.o \
-	fdt_ro.o \
-	fdt_rw.o \
 	fdt_strerror.o \
 	fdt_sw.o \
-	fdt_wip.o \
 	fdt_empty_tree.o \
-	fdt_addresses.o \
-	fdt_region.o
+	fdt_addresses.o
 
 obj-$(CONFIG_OF_LIBFDT_OVERLAY) += fdt_overlay.o
+
+# Locally modified for U-Boot.
+# TODO: split out the local modifiction.
+obj-y += \
+	fdt_ro.o \
+	fdt_rw.o \
+	fdt_wip.o \
+
+# U-Boot own file
+obj-y += fdt_region.o
diff --git a/lib/libfdt/fdt.c b/lib/libfdt/fdt.c
index 2055734012..0958e6ba57 100644
--- a/lib/libfdt/fdt.c
+++ b/lib/libfdt/fdt.c
@@ -1,210 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-int fdt_check_header(const void *fdt)
-{
-	if (fdt_magic(fdt) == FDT_MAGIC) {
-		/* Complete tree */
-		if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
-			return -FDT_ERR_BADVERSION;
-		if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
-			return -FDT_ERR_BADVERSION;
-	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
-		/* Unfinished sequential-write blob */
-		if (fdt_size_dt_struct(fdt) == 0)
-			return -FDT_ERR_BADSTATE;
-	} else {
-		return -FDT_ERR_BADMAGIC;
-	}
-
-	return 0;
-}
-
-const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
-{
-	unsigned absoffset = offset + fdt_off_dt_struct(fdt);
-
-	if ((absoffset < offset)
-	    || ((absoffset + len) < absoffset)
-	    || (absoffset + len) > fdt_totalsize(fdt))
-		return NULL;
-
-	if (fdt_version(fdt) >= 0x11)
-		if (((offset + len) < offset)
-		    || ((offset + len) > fdt_size_dt_struct(fdt)))
-			return NULL;
-
-	return _fdt_offset_ptr(fdt, offset);
-}
-
-uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
-{
-	const fdt32_t *tagp, *lenp;
-	uint32_t tag;
-	int offset = startoffset;
-	const char *p;
-
-	*nextoffset = -FDT_ERR_TRUNCATED;
-	tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
-	if (!tagp)
-		return FDT_END; /* premature end */
-	tag = fdt32_to_cpu(*tagp);
-	offset += FDT_TAGSIZE;
-
-	*nextoffset = -FDT_ERR_BADSTRUCTURE;
-	switch (tag) {
-	case FDT_BEGIN_NODE:
-		/* skip name */
-		do {
-			p = fdt_offset_ptr(fdt, offset++, 1);
-		} while (p && (*p != '\0'));
-		if (!p)
-			return FDT_END; /* premature end */
-		break;
-
-	case FDT_PROP:
-		lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
-		if (!lenp)
-			return FDT_END; /* premature end */
-		/* skip-name offset, length and value */
-		offset += sizeof(struct fdt_property) - FDT_TAGSIZE
-			+ fdt32_to_cpu(*lenp);
-		break;
-
-	case FDT_END:
-	case FDT_END_NODE:
-	case FDT_NOP:
-		break;
-
-	default:
-		return FDT_END;
-	}
-
-	if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset))
-		return FDT_END; /* premature end */
-
-	*nextoffset = FDT_TAGALIGN(offset);
-	return tag;
-}
-
-int _fdt_check_node_offset(const void *fdt, int offset)
-{
-	if ((offset < 0) || (offset % FDT_TAGSIZE)
-	    || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
-		return -FDT_ERR_BADOFFSET;
-
-	return offset;
-}
-
-int _fdt_check_prop_offset(const void *fdt, int offset)
-{
-	if ((offset < 0) || (offset % FDT_TAGSIZE)
-	    || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP))
-		return -FDT_ERR_BADOFFSET;
-
-	return offset;
-}
-
-int fdt_next_node(const void *fdt, int offset, int *depth)
-{
-	int nextoffset = 0;
-	uint32_t tag;
-
-	if (offset >= 0)
-		if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0)
-			return nextoffset;
-
-	do {
-		offset = nextoffset;
-		tag = fdt_next_tag(fdt, offset, &nextoffset);
-
-		switch (tag) {
-		case FDT_PROP:
-		case FDT_NOP:
-			break;
-
-		case FDT_BEGIN_NODE:
-			if (depth)
-				(*depth)++;
-			break;
-
-		case FDT_END_NODE:
-			if (depth && ((--(*depth)) < 0))
-				return nextoffset;
-			break;
-
-		case FDT_END:
-			if ((nextoffset >= 0)
-			    || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth))
-				return -FDT_ERR_NOTFOUND;
-			else
-				return nextoffset;
-		}
-	} while (tag != FDT_BEGIN_NODE);
-
-	return offset;
-}
-
-int fdt_first_subnode(const void *fdt, int offset)
-{
-	int depth = 0;
-
-	offset = fdt_next_node(fdt, offset, &depth);
-	if (offset < 0 || depth != 1)
-		return -FDT_ERR_NOTFOUND;
-
-	return offset;
-}
-
-int fdt_next_subnode(const void *fdt, int offset)
-{
-	int depth = 1;
-
-	/*
-	 * With respect to the parent, the depth of the next subnode will be
-	 * the same as the last.
-	 */
-	do {
-		offset = fdt_next_node(fdt, offset, &depth);
-		if (offset < 0 || depth < 1)
-			return -FDT_ERR_NOTFOUND;
-	} while (depth > 1);
-
-	return offset;
-}
-
-const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
-{
-	int len = strlen(s) + 1;
-	const char *last = strtab + tabsize - len;
-	const char *p;
-
-	for (p = strtab; p <= last; p++)
-		if (memcmp(p, s, len) == 0)
-			return p;
-	return NULL;
-}
-
-int fdt_move(const void *fdt, void *buf, int bufsize)
-{
-	FDT_CHECK_HEADER(fdt);
-
-	if (fdt_totalsize(fdt) > bufsize)
-		return -FDT_ERR_NOSPACE;
-
-	memmove(buf, fdt, fdt_totalsize(fdt));
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt.c"
diff --git a/lib/libfdt/fdt_addresses.c b/lib/libfdt/fdt_addresses.c
index b6bc66ea32..b82a02936c 100644
--- a/lib/libfdt/fdt_addresses.c
+++ b/lib/libfdt/fdt_addresses.c
@@ -1,55 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-int fdt_address_cells(const void *fdt, int nodeoffset)
-{
-	const fdt32_t *ac;
-	int val;
-	int len;
-
-	ac = fdt_getprop(fdt, nodeoffset, "#address-cells", &len);
-	if (!ac)
-		return 2;
-
-	if (len != sizeof(*ac))
-		return -FDT_ERR_BADNCELLS;
-
-	val = fdt32_to_cpu(*ac);
-	if ((val <= 0) || (val > FDT_MAX_NCELLS))
-		return -FDT_ERR_BADNCELLS;
-
-	return val;
-}
-
-int fdt_size_cells(const void *fdt, int nodeoffset)
-{
-	const fdt32_t *sc;
-	int val;
-	int len;
-
-	sc = fdt_getprop(fdt, nodeoffset, "#size-cells", &len);
-	if (!sc)
-		return 2;
-
-	if (len != sizeof(*sc))
-		return -FDT_ERR_BADNCELLS;
-
-	val = fdt32_to_cpu(*sc);
-	if ((val < 0) || (val > FDT_MAX_NCELLS))
-		return -FDT_ERR_BADNCELLS;
-
-	return val;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_addresses.c"
diff --git a/lib/libfdt/fdt_empty_tree.c b/lib/libfdt/fdt_empty_tree.c
index 6fde1eb9ed..2b4ae1062b 100644
--- a/lib/libfdt/fdt_empty_tree.c
+++ b/lib/libfdt/fdt_empty_tree.c
@@ -1,37 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2012 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-#include <fdt.h>
-#include <libfdt.h>
-
-#include "libfdt_internal.h"
-
-int fdt_create_empty_tree(void *buf, int bufsize)
-{
-	int err;
-
-	err = fdt_create(buf, bufsize);
-	if (err)
-		return err;
-
-	err = fdt_finish_reservemap(buf);
-	if (err)
-		return err;
-
-	err = fdt_begin_node(buf, "");
-	if (err)
-		return err;
-
-	err =  fdt_end_node(buf);
-	if (err)
-		return err;
-
-	err = fdt_finish(buf);
-	if (err)
-		return err;
-
-	return fdt_open_into(buf, buf, bufsize);
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_empty_tree.c"
diff --git a/lib/libfdt/fdt_overlay.c b/lib/libfdt/fdt_overlay.c
index bd81241e66..575c827673 100644
--- a/lib/libfdt/fdt_overlay.c
+++ b/lib/libfdt/fdt_overlay.c
@@ -1,861 +1,2 @@
-#include "libfdt_env.h"
-
-#include <fdt.h>
-#include <libfdt.h>
-
-#include "libfdt_internal.h"
-
-/**
- * overlay_get_target_phandle - retrieves the target phandle of a fragment
- * @fdto: pointer to the device tree overlay blob
- * @fragment: node offset of the fragment in the overlay
- *
- * overlay_get_target_phandle() retrieves the target phandle of an
- * overlay fragment when that fragment uses a phandle (target
- * property) instead of a path (target-path property).
- *
- * returns:
- *      the phandle pointed by the target property
- *      0, if the phandle was not found
- *	-1, if the phandle was malformed
- */
-static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
-{
-	const fdt32_t *val;
-	int len;
-
-	val = fdt_getprop(fdto, fragment, "target", &len);
-	if (!val)
-		return 0;
-
-	if ((len != sizeof(*val)) || (fdt32_to_cpu(*val) == (uint32_t)-1))
-		return (uint32_t)-1;
-
-	return fdt32_to_cpu(*val);
-}
-
-/**
- * overlay_get_target - retrieves the offset of a fragment's target
- * @fdt: Base device tree blob
- * @fdto: Device tree overlay blob
- * @fragment: node offset of the fragment in the overlay
- * @pathp: pointer which receives the path of the target (or NULL)
- *
- * overlay_get_target() retrieves the target offset in the base
- * device tree of a fragment, no matter how the actual targetting is
- * done (through a phandle or a path)
- *
- * returns:
- *      the targetted node offset in the base device tree
- *      Negative error code on error
- */
-static int overlay_get_target(const void *fdt, const void *fdto,
-			      int fragment, char const **pathp)
-{
-	uint32_t phandle;
-	const char *path = NULL;
-	int path_len = 0, ret;
-
-	/* Try first to do a phandle based lookup */
-	phandle = overlay_get_target_phandle(fdto, fragment);
-	if (phandle == (uint32_t)-1)
-		return -FDT_ERR_BADPHANDLE;
-
-	/* no phandle, try path */
-	if (!phandle) {
-		/* And then a path based lookup */
-		path = fdt_getprop(fdto, fragment, "target-path", &path_len);
-		if (path)
-			ret = fdt_path_offset(fdt, path);
-		else
-			ret = path_len;
-	} else
-		ret = fdt_node_offset_by_phandle(fdt, phandle);
-
-	/*
-	* If we haven't found either a target or a
-	* target-path property in a node that contains a
-	* __overlay__ subnode (we wouldn't be called
-	* otherwise), consider it a improperly written
-	* overlay
-	*/
-	if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
-		ret = -FDT_ERR_BADOVERLAY;
-
-	/* return on error */
-	if (ret < 0)
-		return ret;
-
-	/* return pointer to path (if available) */
-	if (pathp)
-		*pathp = path ? path : NULL;
-
-	return ret;
-}
-
-/**
- * overlay_phandle_add_offset - Increases a phandle by an offset
- * @fdt: Base device tree blob
- * @node: Device tree overlay blob
- * @name: Name of the property to modify (phandle or linux,phandle)
- * @delta: offset to apply
- *
- * overlay_phandle_add_offset() increments a node phandle by a given
- * offset.
- *
- * returns:
- *      0 on success.
- *      Negative error code on error
- */
-static int overlay_phandle_add_offset(void *fdt, int node,
-				      const char *name, uint32_t delta)
-{
-	const fdt32_t *val;
-	uint32_t adj_val;
-	int len;
-
-	val = fdt_getprop(fdt, node, name, &len);
-	if (!val)
-		return len;
-
-	if (len != sizeof(*val))
-		return -FDT_ERR_BADPHANDLE;
-
-	adj_val = fdt32_to_cpu(*val);
-	if ((adj_val + delta) < adj_val)
-		return -FDT_ERR_NOPHANDLES;
-
-	adj_val += delta;
-	if (adj_val == (uint32_t)-1)
-		return -FDT_ERR_NOPHANDLES;
-
-	return fdt_setprop_inplace_u32(fdt, node, name, adj_val);
-}
-
-/**
- * overlay_adjust_node_phandles - Offsets the phandles of a node
- * @fdto: Device tree overlay blob
- * @node: Offset of the node we want to adjust
- * @delta: Offset to shift the phandles of
- *
- * overlay_adjust_node_phandles() adds a constant to all the phandles
- * of a given node. This is mainly use as part of the overlay
- * application process, when we want to update all the overlay
- * phandles to not conflict with the overlays of the base device tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_adjust_node_phandles(void *fdto, int node,
-					uint32_t delta)
-{
-	int child;
-	int ret;
-
-	ret = overlay_phandle_add_offset(fdto, node, "phandle", delta);
-	if (ret && ret != -FDT_ERR_NOTFOUND)
-		return ret;
-
-	ret = overlay_phandle_add_offset(fdto, node, "linux,phandle", delta);
-	if (ret && ret != -FDT_ERR_NOTFOUND)
-		return ret;
-
-	fdt_for_each_subnode(child, fdto, node) {
-		ret = overlay_adjust_node_phandles(fdto, child, delta);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_adjust_local_phandles - Adjust the phandles of a whole overlay
- * @fdto: Device tree overlay blob
- * @delta: Offset to shift the phandles of
- *
- * overlay_adjust_local_phandles() adds a constant to all the
- * phandles of an overlay. This is mainly use as part of the overlay
- * application process, when we want to update all the overlay
- * phandles to not conflict with the overlays of the base device tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_adjust_local_phandles(void *fdto, uint32_t delta)
-{
-	/*
-	 * Start adjusting the phandles from the overlay root
-	 */
-	return overlay_adjust_node_phandles(fdto, 0, delta);
-}
-
-/**
- * overlay_update_local_node_references - Adjust the overlay references
- * @fdto: Device tree overlay blob
- * @tree_node: Node offset of the node to operate on
- * @fixup_node: Node offset of the matching local fixups node
- * @delta: Offset to shift the phandles of
- *
- * overlay_update_local_nodes_references() update the phandles
- * pointing to a node within the device tree overlay by adding a
- * constant delta.
- *
- * This is mainly used as part of a device tree application process,
- * where you want the device tree overlays phandles to not conflict
- * with the ones from the base device tree before merging them.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_update_local_node_references(void *fdto,
-						int tree_node,
-						int fixup_node,
-						uint32_t delta)
-{
-	int fixup_prop;
-	int fixup_child;
-	int ret;
-
-	fdt_for_each_property_offset(fixup_prop, fdto, fixup_node) {
-		const fdt32_t *fixup_val;
-		const char *tree_val;
-		const char *name;
-		int fixup_len;
-		int tree_len;
-		int i;
-
-		fixup_val = fdt_getprop_by_offset(fdto, fixup_prop,
-						  &name, &fixup_len);
-		if (!fixup_val)
-			return fixup_len;
-
-		if (fixup_len % sizeof(uint32_t))
-			return -FDT_ERR_BADOVERLAY;
-
-		tree_val = fdt_getprop(fdto, tree_node, name, &tree_len);
-		if (!tree_val) {
-			if (tree_len == -FDT_ERR_NOTFOUND)
-				return -FDT_ERR_BADOVERLAY;
-
-			return tree_len;
-		}
-
-		for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) {
-			fdt32_t adj_val;
-			uint32_t poffset;
-
-			poffset = fdt32_to_cpu(fixup_val[i]);
-
-			/*
-			 * phandles to fixup can be unaligned.
-			 *
-			 * Use a memcpy for the architectures that do
-			 * not support unaligned accesses.
-			 */
-			memcpy(&adj_val, tree_val + poffset, sizeof(adj_val));
-
-			adj_val = cpu_to_fdt32(fdt32_to_cpu(adj_val) + delta);
-
-			ret = fdt_setprop_inplace_namelen_partial(fdto,
-								  tree_node,
-								  name,
-								  strlen(name),
-								  poffset,
-								  &adj_val,
-								  sizeof(adj_val));
-			if (ret == -FDT_ERR_NOSPACE)
-				return -FDT_ERR_BADOVERLAY;
-
-			if (ret)
-				return ret;
-		}
-	}
-
-	fdt_for_each_subnode(fixup_child, fdto, fixup_node) {
-		const char *fixup_child_name = fdt_get_name(fdto, fixup_child,
-							    NULL);
-		int tree_child;
-
-		tree_child = fdt_subnode_offset(fdto, tree_node,
-						fixup_child_name);
-		if (tree_child == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_BADOVERLAY;
-		if (tree_child < 0)
-			return tree_child;
-
-		ret = overlay_update_local_node_references(fdto,
-							   tree_child,
-							   fixup_child,
-							   delta);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_update_local_references - Adjust the overlay references
- * @fdto: Device tree overlay blob
- * @delta: Offset to shift the phandles of
- *
- * overlay_update_local_references() update all the phandles pointing
- * to a node within the device tree overlay by adding a constant
- * delta to not conflict with the base overlay.
- *
- * This is mainly used as part of a device tree application process,
- * where you want the device tree overlays phandles to not conflict
- * with the ones from the base device tree before merging them.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_update_local_references(void *fdto, uint32_t delta)
-{
-	int fixups;
-
-	fixups = fdt_path_offset(fdto, "/__local_fixups__");
-	if (fixups < 0) {
-		/* There's no local phandles to adjust, bail out */
-		if (fixups == -FDT_ERR_NOTFOUND)
-			return 0;
-
-		return fixups;
-	}
-
-	/*
-	 * Update our local references from the root of the tree
-	 */
-	return overlay_update_local_node_references(fdto, 0, fixups,
-						    delta);
-}
-
-/**
- * overlay_fixup_one_phandle - Set an overlay phandle to the base one
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- * @symbols_off: Node offset of the symbols node in the base device tree
- * @path: Path to a node holding a phandle in the overlay
- * @path_len: number of path characters to consider
- * @name: Name of the property holding the phandle reference in the overlay
- * @name_len: number of name characters to consider
- * @poffset: Offset within the overlay property where the phandle is stored
- * @label: Label of the node referenced by the phandle
- *
- * overlay_fixup_one_phandle() resolves an overlay phandle pointing to
- * a node in the base device tree.
- *
- * This is part of the device tree overlay application process, when
- * you want all the phandles in the overlay to point to the actual
- * base dt nodes.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_fixup_one_phandle(void *fdt, void *fdto,
-				     int symbols_off,
-				     const char *path, uint32_t path_len,
-				     const char *name, uint32_t name_len,
-				     int poffset, const char *label)
-{
-	const char *symbol_path;
-	uint32_t phandle;
-	fdt32_t phandle_prop;
-	int symbol_off, fixup_off;
-	int prop_len;
-
-	if (symbols_off < 0)
-		return symbols_off;
-
-	symbol_path = fdt_getprop(fdt, symbols_off, label,
-				  &prop_len);
-	if (!symbol_path)
-		return prop_len;
-
-	symbol_off = fdt_path_offset(fdt, symbol_path);
-	if (symbol_off < 0)
-		return symbol_off;
-
-	phandle = fdt_get_phandle(fdt, symbol_off);
-	if (!phandle)
-		return -FDT_ERR_NOTFOUND;
-
-	fixup_off = fdt_path_offset_namelen(fdto, path, path_len);
-	if (fixup_off == -FDT_ERR_NOTFOUND)
-		return -FDT_ERR_BADOVERLAY;
-	if (fixup_off < 0)
-		return fixup_off;
-
-	phandle_prop = cpu_to_fdt32(phandle);
-	return fdt_setprop_inplace_namelen_partial(fdto, fixup_off,
-						   name, name_len, poffset,
-						   &phandle_prop,
-						   sizeof(phandle_prop));
-};
-
-/**
- * overlay_fixup_phandle - Set an overlay phandle to the base one
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- * @symbols_off: Node offset of the symbols node in the base device tree
- * @property: Property offset in the overlay holding the list of fixups
- *
- * overlay_fixup_phandle() resolves all the overlay phandles pointed
- * to in a __fixups__ property, and updates them to match the phandles
- * in use in the base device tree.
- *
- * This is part of the device tree overlay application process, when
- * you want all the phandles in the overlay to point to the actual
- * base dt nodes.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off,
-				 int property)
-{
-	const char *value;
-	const char *label;
-	int len;
-
-	value = fdt_getprop_by_offset(fdto, property,
-				      &label, &len);
-	if (!value) {
-		if (len == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_INTERNAL;
-
-		return len;
-	}
-
-	do {
-		const char *path, *name, *fixup_end;
-		const char *fixup_str = value;
-		uint32_t path_len, name_len;
-		uint32_t fixup_len;
-		char *sep, *endptr;
-		int poffset, ret;
-
-		fixup_end = memchr(value, '\0', len);
-		if (!fixup_end)
-			return -FDT_ERR_BADOVERLAY;
-		fixup_len = fixup_end - fixup_str;
-
-		len -= fixup_len + 1;
-		value += fixup_len + 1;
-
-		path = fixup_str;
-		sep = memchr(fixup_str, ':', fixup_len);
-		if (!sep || *sep != ':')
-			return -FDT_ERR_BADOVERLAY;
-
-		path_len = sep - path;
-		if (path_len == (fixup_len - 1))
-			return -FDT_ERR_BADOVERLAY;
-
-		fixup_len -= path_len + 1;
-		name = sep + 1;
-		sep = memchr(name, ':', fixup_len);
-		if (!sep || *sep != ':')
-			return -FDT_ERR_BADOVERLAY;
-
-		name_len = sep - name;
-		if (!name_len)
-			return -FDT_ERR_BADOVERLAY;
-
-		poffset = strtoul(sep + 1, &endptr, 10);
-		if ((*endptr != '\0') || (endptr <= (sep + 1)))
-			return -FDT_ERR_BADOVERLAY;
-
-		ret = overlay_fixup_one_phandle(fdt, fdto, symbols_off,
-						path, path_len, name, name_len,
-						poffset, label);
-		if (ret)
-			return ret;
-	} while (len > 0);
-
-	return 0;
-}
-
-/**
- * overlay_fixup_phandles - Resolve the overlay phandles to the base
- *                          device tree
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- *
- * overlay_fixup_phandles() resolves all the overlay phandles pointing
- * to nodes in the base device tree.
- *
- * This is one of the steps of the device tree overlay application
- * process, when you want all the phandles in the overlay to point to
- * the actual base dt nodes.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_fixup_phandles(void *fdt, void *fdto)
-{
-	int fixups_off, symbols_off;
-	int property;
-
-	/* We can have overlays without any fixups */
-	fixups_off = fdt_path_offset(fdto, "/__fixups__");
-	if (fixups_off == -FDT_ERR_NOTFOUND)
-		return 0; /* nothing to do */
-	if (fixups_off < 0)
-		return fixups_off;
-
-	/* And base DTs without symbols */
-	symbols_off = fdt_path_offset(fdt, "/__symbols__");
-	if ((symbols_off < 0 && (symbols_off != -FDT_ERR_NOTFOUND)))
-		return symbols_off;
-
-	fdt_for_each_property_offset(property, fdto, fixups_off) {
-		int ret;
-
-		ret = overlay_fixup_phandle(fdt, fdto, symbols_off, property);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_apply_node - Merges a node into the base device tree
- * @fdt: Base Device Tree blob
- * @target: Node offset in the base device tree to apply the fragment to
- * @fdto: Device tree overlay blob
- * @node: Node offset in the overlay holding the changes to merge
- *
- * overlay_apply_node() merges a node into a target base device tree
- * node pointed.
- *
- * This is part of the final step in the device tree overlay
- * application process, when all the phandles have been adjusted and
- * resolved and you just have to merge overlay into the base device
- * tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_apply_node(void *fdt, int target,
-			      void *fdto, int node)
-{
-	int property;
-	int subnode;
-
-	fdt_for_each_property_offset(property, fdto, node) {
-		const char *name;
-		const void *prop;
-		int prop_len;
-		int ret;
-
-		prop = fdt_getprop_by_offset(fdto, property, &name,
-					     &prop_len);
-		if (prop_len == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_INTERNAL;
-		if (prop_len < 0)
-			return prop_len;
-
-		ret = fdt_setprop(fdt, target, name, prop, prop_len);
-		if (ret)
-			return ret;
-	}
-
-	fdt_for_each_subnode(subnode, fdto, node) {
-		const char *name = fdt_get_name(fdto, subnode, NULL);
-		int nnode;
-		int ret;
-
-		nnode = fdt_add_subnode(fdt, target, name);
-		if (nnode == -FDT_ERR_EXISTS) {
-			nnode = fdt_subnode_offset(fdt, target, name);
-			if (nnode == -FDT_ERR_NOTFOUND)
-				return -FDT_ERR_INTERNAL;
-		}
-
-		if (nnode < 0)
-			return nnode;
-
-		ret = overlay_apply_node(fdt, nnode, fdto, subnode);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-/**
- * overlay_merge - Merge an overlay into its base device tree
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- *
- * overlay_merge() merges an overlay into its base device tree.
- *
- * This is the next to last step in the device tree overlay application
- * process, when all the phandles have been adjusted and resolved and
- * you just have to merge overlay into the base device tree.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_merge(void *fdt, void *fdto)
-{
-	int fragment;
-
-	fdt_for_each_subnode(fragment, fdto, 0) {
-		int overlay;
-		int target;
-		int ret;
-
-		/*
-		 * Each fragments will have an __overlay__ node. If
-		 * they don't, it's not supposed to be merged
-		 */
-		overlay = fdt_subnode_offset(fdto, fragment, "__overlay__");
-		if (overlay == -FDT_ERR_NOTFOUND)
-			continue;
-
-		if (overlay < 0)
-			return overlay;
-
-		target = overlay_get_target(fdt, fdto, fragment, NULL);
-		if (target < 0)
-			return target;
-
-		ret = overlay_apply_node(fdt, target, fdto, overlay);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-static int get_path_len(const void *fdt, int nodeoffset)
-{
-	int len = 0, namelen;
-	const char *name;
-
-	FDT_CHECK_HEADER(fdt);
-
-	for (;;) {
-		name = fdt_get_name(fdt, nodeoffset, &namelen);
-		if (!name)
-			return namelen;
-
-		/* root? we're done */
-		if (namelen == 0)
-			break;
-
-		nodeoffset = fdt_parent_offset(fdt, nodeoffset);
-		if (nodeoffset < 0)
-			return nodeoffset;
-		len += namelen + 1;
-	}
-
-	/* in case of root pretend it's "/" */
-	if (len == 0)
-		len++;
-	return len;
-}
-
-/**
- * overlay_symbol_update - Update the symbols of base tree after a merge
- * @fdt: Base Device Tree blob
- * @fdto: Device tree overlay blob
- *
- * overlay_symbol_update() updates the symbols of the base tree with the
- * symbols of the applied overlay
- *
- * This is the last step in the device tree overlay application
- * process, allowing the reference of overlay symbols by subsequent
- * overlay operations.
- *
- * returns:
- *      0 on success
- *      Negative error code on failure
- */
-static int overlay_symbol_update(void *fdt, void *fdto)
-{
-	int root_sym, ov_sym, prop, path_len, fragment, target;
-	int len, frag_name_len, ret, rel_path_len;
-	const char *s, *e;
-	const char *path;
-	const char *name;
-	const char *frag_name;
-	const char *rel_path;
-	const char *target_path;
-	char *buf;
-	void *p;
-
-	ov_sym = fdt_subnode_offset(fdto, 0, "__symbols__");
-
-	/* if no overlay symbols exist no problem */
-	if (ov_sym < 0)
-		return 0;
-
-	root_sym = fdt_subnode_offset(fdt, 0, "__symbols__");
-
-	/* it no root symbols exist we should create them */
-	if (root_sym == -FDT_ERR_NOTFOUND)
-		root_sym = fdt_add_subnode(fdt, 0, "__symbols__");
-
-	/* any error is fatal now */
-	if (root_sym < 0)
-		return root_sym;
-
-	/* iterate over each overlay symbol */
-	fdt_for_each_property_offset(prop, fdto, ov_sym) {
-		path = fdt_getprop_by_offset(fdto, prop, &name, &path_len);
-		if (!path)
-			return path_len;
-
-		/* verify it's a string property (terminated by a single \0) */
-		if (path_len < 1 || memchr(path, '\0', path_len) != &path[path_len - 1])
-			return -FDT_ERR_BADVALUE;
-
-		/* keep end marker to avoid strlen() */
-		e = path + path_len;
-
-		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
-
-		if (*path != '/')
-			return -FDT_ERR_BADVALUE;
-
-		/* get fragment name first */
-		s = strchr(path + 1, '/');
-		if (!s)
-			return -FDT_ERR_BADOVERLAY;
-
-		frag_name = path + 1;
-		frag_name_len = s - path - 1;
-
-		/* verify format; safe since "s" lies in \0 terminated prop */
-		len = sizeof("/__overlay__/") - 1;
-		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
-			return -FDT_ERR_BADOVERLAY;
-
-		rel_path = s + len;
-		rel_path_len = e - rel_path;
-
-		/* find the fragment index in which the symbol lies */
-		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
-					       frag_name_len);
-		/* not found? */
-		if (ret < 0)
-			return -FDT_ERR_BADOVERLAY;
-		fragment = ret;
-
-		/* an __overlay__ subnode must exist */
-		ret = fdt_subnode_offset(fdto, fragment, "__overlay__");
-		if (ret < 0)
-			return -FDT_ERR_BADOVERLAY;
-
-		/* get the target of the fragment */
-		ret = overlay_get_target(fdt, fdto, fragment, &target_path);
-		if (ret < 0)
-			return ret;
-		target = ret;
-
-		/* if we have a target path use */
-		if (!target_path) {
-			ret = get_path_len(fdt, target);
-			if (ret < 0)
-				return ret;
-			len = ret;
-		} else {
-			len = strlen(target_path);
-		}
-
-		ret = fdt_setprop_placeholder(fdt, root_sym, name,
-				len + (len > 1) + rel_path_len + 1, &p);
-		if (ret < 0)
-			return ret;
-
-		if (!target_path) {
-			/* again in case setprop_placeholder changed it */
-			ret = overlay_get_target(fdt, fdto, fragment, &target_path);
-			if (ret < 0)
-				return ret;
-			target = ret;
-		}
-
-		buf = p;
-		if (len > 1) { /* target is not root */
-			if (!target_path) {
-				ret = fdt_get_path(fdt, target, buf, len + 1);
-				if (ret < 0)
-					return ret;
-			} else
-				memcpy(buf, target_path, len + 1);
-
-		} else
-			len--;
-
-		buf[len] = '/';
-		memcpy(buf + len + 1, rel_path, rel_path_len);
-		buf[len + 1 + rel_path_len] = '\0';
-	}
-
-	return 0;
-}
-
-int fdt_overlay_apply(void *fdt, void *fdto)
-{
-	uint32_t delta = fdt_get_max_phandle(fdt);
-	int ret;
-
-	FDT_CHECK_HEADER(fdt);
-	FDT_CHECK_HEADER(fdto);
-
-	ret = overlay_adjust_local_phandles(fdto, delta);
-	if (ret)
-		goto err;
-
-	ret = overlay_update_local_references(fdto, delta);
-	if (ret)
-		goto err;
-
-	ret = overlay_fixup_phandles(fdt, fdto);
-	if (ret)
-		goto err;
-
-	ret = overlay_merge(fdt, fdto);
-	if (ret)
-		goto err;
-
-	ret = overlay_symbol_update(fdt, fdto);
-	if (ret)
-		goto err;
-
-	/*
-	 * The overlay has been damaged, erase its magic.
-	 */
-	fdt_set_magic(fdto, ~0);
-
-	return 0;
-
-err:
-	/*
-	 * The overlay might have been damaged, erase its magic.
-	 */
-	fdt_set_magic(fdto, ~0);
-
-	/*
-	 * The base device tree might have been damaged, erase its
-	 * magic.
-	 */
-	fdt_set_magic(fdt, ~0);
-
-	return ret;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_overlay.c"
diff --git a/lib/libfdt/fdt_strerror.c b/lib/libfdt/fdt_strerror.c
index f89004c609..408a88328f 100644
--- a/lib/libfdt/fdt_strerror.c
+++ b/lib/libfdt/fdt_strerror.c
@@ -1,61 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-
-#ifndef USE_HOSTCC
-#include <fdt.h>
-#include <libfdt.h>
-#else
-#include "fdt_host.h"
-#endif
-
-#include "libfdt_internal.h"
-
-struct fdt_errtabent {
-	const char *str;
-};
-
-#define FDT_ERRTABENT(val) \
-	[(val)] = { .str = #val, }
-
-static struct fdt_errtabent fdt_errtable[] = {
-	FDT_ERRTABENT(FDT_ERR_NOTFOUND),
-	FDT_ERRTABENT(FDT_ERR_EXISTS),
-	FDT_ERRTABENT(FDT_ERR_NOSPACE),
-
-	FDT_ERRTABENT(FDT_ERR_BADOFFSET),
-	FDT_ERRTABENT(FDT_ERR_BADPATH),
-	FDT_ERRTABENT(FDT_ERR_BADPHANDLE),
-	FDT_ERRTABENT(FDT_ERR_BADSTATE),
-
-	FDT_ERRTABENT(FDT_ERR_TRUNCATED),
-	FDT_ERRTABENT(FDT_ERR_BADMAGIC),
-	FDT_ERRTABENT(FDT_ERR_BADVERSION),
-	FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE),
-	FDT_ERRTABENT(FDT_ERR_BADLAYOUT),
-	FDT_ERRTABENT(FDT_ERR_INTERNAL),
-	FDT_ERRTABENT(FDT_ERR_BADNCELLS),
-	FDT_ERRTABENT(FDT_ERR_BADVALUE),
-	FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
-	FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
-};
-#define FDT_ERRTABSIZE	(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
-
-const char *fdt_strerror(int errval)
-{
-	if (errval > 0)
-		return "<valid offset/length>";
-	else if (errval == 0)
-		return "<no error>";
-	else if (errval > -FDT_ERRTABSIZE) {
-		const char *s = fdt_errtable[-errval].str;
-
-		if (s)
-			return s;
-	}
-
-	return "<unknown error>";
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_strerror.c"
diff --git a/lib/libfdt/fdt_sw.c b/lib/libfdt/fdt_sw.c
index 70fd026550..0da3ed92f3 100644
--- a/lib/libfdt/fdt_sw.c
+++ b/lib/libfdt/fdt_sw.c
@@ -1,254 +1,2 @@
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <libfdt_env.h>
-#include <fdt.h>
-#include <libfdt.h>
-
-#include "libfdt_internal.h"
-
-static int _fdt_sw_check_header(void *fdt)
-{
-	if (fdt_magic(fdt) != FDT_SW_MAGIC)
-		return -FDT_ERR_BADMAGIC;
-	/* FIXME: should check more details about the header state */
-	return 0;
-}
-
-#define FDT_SW_CHECK_HEADER(fdt) \
-	{ \
-		int err; \
-		if ((err = _fdt_sw_check_header(fdt)) != 0) \
-			return err; \
-	}
-
-static void *_fdt_grab_space(void *fdt, size_t len)
-{
-	int offset = fdt_size_dt_struct(fdt);
-	int spaceleft;
-
-	spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt)
-		- fdt_size_dt_strings(fdt);
-
-	if ((offset + len < offset) || (offset + len > spaceleft))
-		return NULL;
-
-	fdt_set_size_dt_struct(fdt, offset + len);
-	return _fdt_offset_ptr_w(fdt, offset);
-}
-
-int fdt_create(void *buf, int bufsize)
-{
-	void *fdt = buf;
-
-	if (bufsize < sizeof(struct fdt_header))
-		return -FDT_ERR_NOSPACE;
-
-	memset(buf, 0, bufsize);
-
-	fdt_set_magic(fdt, FDT_SW_MAGIC);
-	fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
-	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
-	fdt_set_totalsize(fdt,  bufsize);
-
-	fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header),
-					      sizeof(struct fdt_reserve_entry)));
-	fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt));
-	fdt_set_off_dt_strings(fdt, bufsize);
-
-	return 0;
-}
-
-int fdt_resize(void *fdt, void *buf, int bufsize)
-{
-	size_t headsize, tailsize;
-	char *oldtail, *newtail;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	headsize = fdt_off_dt_struct(fdt);
-	tailsize = fdt_size_dt_strings(fdt);
-
-	if ((headsize + tailsize) > bufsize)
-		return -FDT_ERR_NOSPACE;
-
-	oldtail = (char *)fdt + fdt_totalsize(fdt) - tailsize;
-	newtail = (char *)buf + bufsize - tailsize;
-
-	/* Two cases to avoid clobbering data if the old and new
-	 * buffers partially overlap */
-	if (buf <= fdt) {
-		memmove(buf, fdt, headsize);
-		memmove(newtail, oldtail, tailsize);
-	} else {
-		memmove(newtail, oldtail, tailsize);
-		memmove(buf, fdt, headsize);
-	}
-
-	fdt_set_off_dt_strings(buf, bufsize);
-	fdt_set_totalsize(buf, bufsize);
-
-	return 0;
-}
-
-int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
-{
-	struct fdt_reserve_entry *re;
-	int offset;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	if (fdt_size_dt_struct(fdt))
-		return -FDT_ERR_BADSTATE;
-
-	offset = fdt_off_dt_struct(fdt);
-	if ((offset + sizeof(*re)) > fdt_totalsize(fdt))
-		return -FDT_ERR_NOSPACE;
-
-	re = (struct fdt_reserve_entry *)((char *)fdt + offset);
-	re->address = cpu_to_fdt64(addr);
-	re->size = cpu_to_fdt64(size);
-
-	fdt_set_off_dt_struct(fdt, offset + sizeof(*re));
-
-	return 0;
-}
-
-int fdt_finish_reservemap(void *fdt)
-{
-	return fdt_add_reservemap_entry(fdt, 0, 0);
-}
-
-int fdt_begin_node(void *fdt, const char *name)
-{
-	struct fdt_node_header *nh;
-	int namelen = strlen(name) + 1;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	nh = _fdt_grab_space(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen));
-	if (! nh)
-		return -FDT_ERR_NOSPACE;
-
-	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
-	memcpy(nh->name, name, namelen);
-	return 0;
-}
-
-int fdt_end_node(void *fdt)
-{
-	fdt32_t *en;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	en = _fdt_grab_space(fdt, FDT_TAGSIZE);
-	if (! en)
-		return -FDT_ERR_NOSPACE;
-
-	*en = cpu_to_fdt32(FDT_END_NODE);
-	return 0;
-}
-
-static int _fdt_find_add_string(void *fdt, const char *s)
-{
-	char *strtab = (char *)fdt + fdt_totalsize(fdt);
-	const char *p;
-	int strtabsize = fdt_size_dt_strings(fdt);
-	int len = strlen(s) + 1;
-	int struct_top, offset;
-
-	p = _fdt_find_string(strtab - strtabsize, strtabsize, s);
-	if (p)
-		return p - strtab;
-
-	/* Add it */
-	offset = -strtabsize - len;
-	struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
-	if (fdt_totalsize(fdt) + offset < struct_top)
-		return 0; /* no more room :( */
-
-	memcpy(strtab + offset, s, len);
-	fdt_set_size_dt_strings(fdt, strtabsize + len);
-	return offset;
-}
-
-int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
-{
-	struct fdt_property *prop;
-	int nameoff;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	nameoff = _fdt_find_add_string(fdt, name);
-	if (nameoff == 0)
-		return -FDT_ERR_NOSPACE;
-
-	prop = _fdt_grab_space(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
-	if (! prop)
-		return -FDT_ERR_NOSPACE;
-
-	prop->tag = cpu_to_fdt32(FDT_PROP);
-	prop->nameoff = cpu_to_fdt32(nameoff);
-	prop->len = cpu_to_fdt32(len);
-	*valp = prop->data;
-	return 0;
-}
-
-int fdt_property(void *fdt, const char *name, const void *val, int len)
-{
-	void *ptr;
-	int ret;
-
-	ret = fdt_property_placeholder(fdt, name, len, &ptr);
-	if (ret)
-		return ret;
-	memcpy(ptr, val, len);
-	return 0;
-}
-
-int fdt_finish(void *fdt)
-{
-	char *p = (char *)fdt;
-	fdt32_t *end;
-	int oldstroffset, newstroffset;
-	uint32_t tag;
-	int offset, nextoffset;
-
-	FDT_SW_CHECK_HEADER(fdt);
-
-	/* Add terminator */
-	end = _fdt_grab_space(fdt, sizeof(*end));
-	if (! end)
-		return -FDT_ERR_NOSPACE;
-	*end = cpu_to_fdt32(FDT_END);
-
-	/* Relocate the string table */
-	oldstroffset = fdt_totalsize(fdt) - fdt_size_dt_strings(fdt);
-	newstroffset = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
-	memmove(p + newstroffset, p + oldstroffset, fdt_size_dt_strings(fdt));
-	fdt_set_off_dt_strings(fdt, newstroffset);
-
-	/* Walk the structure, correcting string offsets */
-	offset = 0;
-	while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) {
-		if (tag == FDT_PROP) {
-			struct fdt_property *prop =
-				_fdt_offset_ptr_w(fdt, offset);
-			int nameoff;
-
-			nameoff = fdt32_to_cpu(prop->nameoff);
-			nameoff += fdt_size_dt_strings(fdt);
-			prop->nameoff = cpu_to_fdt32(nameoff);
-		}
-		offset = nextoffset;
-	}
-	if (nextoffset < 0)
-		return nextoffset;
-
-	/* Finally, adjust the header */
-	fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
-	fdt_set_magic(fdt, FDT_MAGIC);
-	return 0;
-}
+#include <linux/libfdt_env.h>
+#include "../../scripts/dtc/libfdt/fdt_sw.c"

commit d8b625e660642053cd8624c3d4b2ef0aa0f839b9
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:19 2017 +0900

    UPSTREAM: linux/types.h: add typedef of uintptr_t
    
    Add this typedef in the same place as in Linux.  This is necessary
    to refactor libfdt inclusion.
    
    U-Boot also defines it in include/compiler.h.  Of course it should
    not do that, but I do not want to open a can of worms.
    
    Change-Id: I9dfb66591cf520ed4e68168521b114af086fd860
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1c4b453ad2a62d0243ae5fd6657f2d6b7eb7332d)

diff --git a/include/linux/types.h b/include/linux/types.h
index 416fa66284..7c33e7adbc 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -24,6 +24,8 @@ typedef __kernel_gid32_t	gid_t;
 typedef __kernel_uid16_t        uid16_t;
 typedef __kernel_gid16_t        gid16_t;
 
+typedef unsigned long		uintptr_t;
+
 #ifdef CONFIG_UID16
 /* This is defined by include/asm-{arch}/posix_types.h */
 typedef __kernel_old_uid_t	old_uid_t;

commit 141b078475e1ef81f7e80df6563619ee80cb3c7a
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:18 2017 +0900

    UPSTREAM: tools: use files from scripts/dtc/libfdt where possible
    
    Prior to this commit, tools/Makefile pulls all libfdt files from
    lib/libfdt.
    
    lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
    followings 6 files:
      fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
      fdt_sw.c
    
    This commit changes them to #include ones from scripts/dtc/libfdt.
    
    Unfortunately, U-Boot locally modified the following 3 files:
      fdt_ro.c fdt_wip.c fdt_rw.c
    
    I did not touch them in order to avoid unpredictable impact.
    
    The fdt_region.c is U-Boot own file.  This is also borrowed from
    lib/libfdt/.
    
    Change-Id: I3e8fcd9f84cda502a0eca504896ab29d7f840d16
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b38ad663a4b4ccd91a43b12e2d65179dbd2b40cb)

diff --git a/tools/Makefile b/tools/Makefile
index 2e3274259d..1cf37bd5e1 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -58,12 +58,17 @@ hostprogs-y += dumpimage mkimage
 hostprogs-$(CONFIG_FIT_SIGNATURE) += fit_info fit_check_sign
 
 FIT_SIG_OBJS-$(CONFIG_FIT_SIGNATURE) := common/image-sig.o
-# Flattened device tree objects
-LIBFDT_CSRCS := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c  \
-			fdt_empty_tree.c fdt_addresses.c fdt_overlay.c \
-			fdt_region.c
 
-LIBFDT_OBJS := $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_CSRCS)))
+# The following files are synced with upstream DTC.
+# Use synced versions from scripts/dtc/libfdt/.
+LIBFDT_SRCS_SYNCED := fdt.c fdt_sw.c fdt_strerror.c fdt_empty_tree.c \
+		      fdt_addresses.c fdt_overlay.c
+# The following files are locally modified for U-Boot (unfotunately).
+# Use U-Boot own versions from lib/libfdt/.
+LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_wip.c fdt_rw.c fdt_region.c
+
+LIBFDT_OBJS := $(addprefix libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_SYNCED))) \
+	       $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_UNSYNCED)))
 
 RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
 					rsa-sign.o rsa-verify.o rsa-checksum.o \
diff --git a/tools/libfdt/fdt.c b/tools/libfdt/fdt.c
new file mode 100644
index 0000000000..8ba8091921
--- /dev/null
+++ b/tools/libfdt/fdt.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt.c"
diff --git a/tools/libfdt/fdt_addresses.c b/tools/libfdt/fdt_addresses.c
new file mode 100644
index 0000000000..242a2c083b
--- /dev/null
+++ b/tools/libfdt/fdt_addresses.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_addresses.c"
diff --git a/tools/libfdt/fdt_empty_tree.c b/tools/libfdt/fdt_empty_tree.c
new file mode 100644
index 0000000000..9ccbb1f94e
--- /dev/null
+++ b/tools/libfdt/fdt_empty_tree.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_empty_tree.c"
diff --git a/tools/libfdt/fdt_overlay.c b/tools/libfdt/fdt_overlay.c
new file mode 100644
index 0000000000..801ec374b1
--- /dev/null
+++ b/tools/libfdt/fdt_overlay.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_overlay.c"
diff --git a/tools/libfdt/fdt_strerror.c b/tools/libfdt/fdt_strerror.c
new file mode 100644
index 0000000000..d7ed70bea4
--- /dev/null
+++ b/tools/libfdt/fdt_strerror.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_strerror.c"
diff --git a/tools/libfdt/fdt_sw.c b/tools/libfdt/fdt_sw.c
new file mode 100644
index 0000000000..ed6b327573
--- /dev/null
+++ b/tools/libfdt/fdt_sw.c
@@ -0,0 +1,2 @@
+#include "fdt_host.h"
+#include "../scripts/dtc/libfdt/fdt_sw.c"

commit b63953bc21c4582a96a65a4d7ce4893849d50731
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:17 2017 +0900

    UPSTREAM: libfdt: change libfdt_internal.h to a wrapper of scripts/dtc/libfdt/*
    
    Fortunately, U-Boot did not modify libfdt_internal.h locally.
    
    Change it to a wrapper of scripts/dtc/libfdt/fdt.h, which will be
    periodically synced with the upstream DTC (or kernel).
    
    Change-Id: Ia9e6f3ca1f19a3cfe9f85b02ae792e85cf81798e
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 35a33baea59210924bceedabcfba794f0fed59dd)

diff --git a/lib/libfdt/libfdt_internal.h b/lib/libfdt/libfdt_internal.h
index 9a79fe85dd..5197c5d698 100644
--- a/lib/libfdt/libfdt_internal.h
+++ b/lib/libfdt/libfdt_internal.h
@@ -1,50 +1 @@
-#ifndef _LIBFDT_INTERNAL_H
-#define _LIBFDT_INTERNAL_H
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * SPDX-License-Identifier:	GPL-2.0+ BSD-2-Clause
- */
-#include <fdt.h>
-
-#define FDT_ALIGN(x, a)		(((x) + (a) - 1) & ~((a) - 1))
-#define FDT_TAGALIGN(x)		(FDT_ALIGN((x), FDT_TAGSIZE))
-
-#define FDT_CHECK_HEADER(fdt) \
-	{ \
-		int __err; \
-		if ((__err = fdt_check_header(fdt)) != 0) \
-			return __err; \
-	}
-
-int _fdt_check_node_offset(const void *fdt, int offset);
-int _fdt_check_prop_offset(const void *fdt, int offset);
-const char *_fdt_find_string(const char *strtab, int tabsize, const char *s);
-int _fdt_node_end_offset(void *fdt, int nodeoffset);
-
-static inline const void *_fdt_offset_ptr(const void *fdt, int offset)
-{
-	return (const char *)fdt + fdt_off_dt_struct(fdt) + offset;
-}
-
-static inline void *_fdt_offset_ptr_w(void *fdt, int offset)
-{
-	return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset);
-}
-
-static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)
-{
-	const struct fdt_reserve_entry *rsv_table =
-		(const struct fdt_reserve_entry *)
-		((const char *)fdt + fdt_off_mem_rsvmap(fdt));
-
-	return rsv_table + n;
-}
-static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)
-{
-	return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n);
-}
-
-#define FDT_SW_MAGIC		(~FDT_MAGIC)
-
-#endif /* _LIBFDT_INTERNAL_H */
+#include "../../scripts/dtc/libfdt/libfdt_internal.h"

commit 81a2b0debed060533ca0a71475dc7bed6bf8c281
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 22:30:16 2017 +0900

    UPSTREAM: libfdt: change fdt.h to a wrapper of scripts/dtc/libfdt/*
    
    Fortunately, U-Boot did not modify fdt.h locally.
    
    Change it to a wrapper of scripts/dtc/libfdt/fdt.h, which will be
    periodically synced with the upstream DTC (or kernel).
    
    Change-Id: I3a40cb81ecacf189af3f04fe0b599628f70f81f9
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9e65b01ac57f7be2bbc17c9f4c0ee43fab22221e)

diff --git a/include/fdt.h b/include/fdt.h
index f40b56c755..b97b3f2bcc 100644
--- a/include/fdt.h
+++ b/include/fdt.h
@@ -1 +1 @@
-#include "../lib/libfdt/fdt.h"
+#include "../scripts/dtc/libfdt/fdt.h"
diff --git a/lib/libfdt/fdt.h b/lib/libfdt/fdt.h
deleted file mode 100644
index 3134d78332..0000000000
--- a/lib/libfdt/fdt.h
+++ /dev/null
@@ -1,67 +0,0 @@
-#ifndef _FDT_H
-#define _FDT_H
-/*
- * libfdt - Flat Device Tree manipulation
- * Copyright (C) 2006 David Gibson, IBM Corporation.
- * Copyright 2012 Kim Phillips, Freescale Semiconductor.
- *
- * SPDX-License-Identifier:     GPL-2.0+ BSD-2-Clause
- */
-
-#ifndef __ASSEMBLY__
-
-struct fdt_header {
-	fdt32_t magic;			 /* magic word FDT_MAGIC */
-	fdt32_t totalsize;		 /* total size of DT block */
-	fdt32_t off_dt_struct;		 /* offset to structure */
-	fdt32_t off_dt_strings;		 /* offset to strings */
-	fdt32_t off_mem_rsvmap;		 /* offset to memory reserve map */
-	fdt32_t version;		 /* format version */
-	fdt32_t last_comp_version;	 /* last compatible version */
-
-	/* version 2 fields below */
-	fdt32_t boot_cpuid_phys;	 /* Which physical CPU id we're
-					    booting on */
-	/* version 3 fields below */
-	fdt32_t size_dt_strings;	 /* size of the strings block */
-
-	/* version 17 fields below */
-	fdt32_t size_dt_struct;		 /* size of the structure block */
-};
-
-struct fdt_reserve_entry {
-	fdt64_t address;
-	fdt64_t size;
-};
-
-struct fdt_node_header {
-	fdt32_t tag;
-	char name[0];
-};
-
-struct fdt_property {
-	fdt32_t tag;
-	fdt32_t len;
-	fdt32_t nameoff;
-	char data[0];
-};
-
-#endif /* !__ASSEMBLY */
-
-#define FDT_MAGIC	0xd00dfeed	/* 4: version, 4: total size */
-#define FDT_TAGSIZE	sizeof(fdt32_t)
-
-#define FDT_BEGIN_NODE	0x1		/* Start node: full name */
-#define FDT_END_NODE	0x2		/* End node */
-#define FDT_PROP	0x3		/* Property: name off,
-					   size, content */
-#define FDT_NOP		0x4		/* nop */
-#define FDT_END		0x9
-
-#define FDT_V1_SIZE	(7*sizeof(fdt32_t))
-#define FDT_V2_SIZE	(FDT_V1_SIZE + sizeof(fdt32_t))
-#define FDT_V3_SIZE	(FDT_V2_SIZE + sizeof(fdt32_t))
-#define FDT_V16_SIZE	FDT_V3_SIZE
-#define FDT_V17_SIZE	(FDT_V16_SIZE + sizeof(fdt32_t))
-
-#endif /* _FDT_H */

commit ec821af4a71361805387f2991a220375e4abe6b8
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 13:42:44 2017 +0900

    UPSTREAM: pylibfdt: compile pylibfdt only when dtoc/binman is necessary
    
    Currently, pylibfdt is always compiled if swig is installed on your
    machine.  It is really annoying because most of targets (excepts
    x86, sunxi, rockchip) do not use dtoc or binman.
    
    "checkbinman" and "checkdtoc" are wrong.  It is odd that the final
    build stage checks if we have built necessary tools.  If your platform
    depends on dtoc/binman, you must be able to build pylibfdt.  If swig
    is not installed, it should fail immediately.
    
    I added PYLIBFDT, DTOC, BINMAN entries to Kconfig.  They should be
    property select:ed by platforms that need them.  Kbuild will descend
    into scripts/dtc/pylibfdt/ only when CONFIG_PYLIBFDT is enabled.
    
    Change-Id: I56c5daf252e28d23fcaea0bc2d327a34de60cdcf
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d6a0c78a4efb1353f4ec6f6c59c0771298510f58)

diff --git a/Makefile b/Makefile
index 0ef879fca3..2335d24752 100644
--- a/Makefile
+++ b/Makefile
@@ -1135,7 +1135,7 @@ cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \
 
 u-boot.rom: u-boot-x86-16bit.bin u-boot.bin \
 		$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
-		$(if $(CONFIG_HAVE_REFCODE),refcode.bin) checkbinman FORCE
+		$(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE
 	$(call if_changed,binman)
 
 OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec
@@ -1144,8 +1144,7 @@ u-boot-x86-16bit.bin: u-boot FORCE
 endif
 
 ifneq ($(CONFIG_ARCH_SUNXI),)
-u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb \
-		checkbinman FORCE
+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
 	$(call if_changed,binman)
 endif
 
@@ -1379,18 +1378,6 @@ $(version_h): include/config/uboot.release FORCE
 $(timestamp_h): $(srctree)/Makefile FORCE
 	$(call filechk,timestamp.h)
 
-checkbinman: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
-		echo >&2; \
-		echo >&2 '*** binman needs the Python libfdt library.'; \
-		echo >&2 '*** Either install it on your system, or try:'; \
-		echo >&2 '***'; \
-		echo >&2 '*** sudo apt-get install swig libpython-dev'; \
-		echo >&2 '***'; \
-		echo >&2 '*** to have U-Boot build its own version.'; \
-		false; \
-	fi
-
 # ---------------------------------------------------------------------------
 quiet_cmd_cpp_lds = LDS     $@
 cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 84462f3b6a..41df5ac641 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -702,6 +702,7 @@ config ARCH_SOCFPGA
 
 config ARCH_SUNXI
 	bool "Support sunxi (Allwinner) SoCs"
+	select BINMAN
 	select CMD_GPIO
 	select CMD_MMC if MMC
 	select CMD_USB if DISTRO_DEFAULTS
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 277c3babf3..f698c7072d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -151,6 +151,7 @@ config SMM_TSEG_SIZE
 config X86_RESET_VECTOR
 	bool
 	default n
+	select BINMAN
 
 # The following options control where the 16-bit and 32-bit init lies
 # If SPL is enabled then it normally holds this init code, and U-Boot proper
diff --git a/dts/Kconfig b/dts/Kconfig
index daa757dd56..0cef225ba9 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -8,6 +8,17 @@ config SUPPORT_OF_CONTROL
 config DTC
 	bool
 
+config PYLIBFDT
+	bool
+
+config DTOC
+	bool
+	select PYLIBFDT
+
+config BINMAN
+	bool
+	select DTOC
+
 menu "Device Tree Control"
 	depends on SUPPORT_OF_CONTROL
 
@@ -231,6 +242,7 @@ config OF_SPL_REMOVE_PROPS
 config SPL_OF_PLATDATA
 	bool "Generate platform data for use in SPL"
 	depends on SPL_OF_CONTROL
+	select DTOC
 	help
 	  For very constrained SPL environments the overhead of decoding
 	  device tree nodes and converting their contents into platform data
@@ -252,6 +264,7 @@ config SPL_OF_PLATDATA
 config TPL_OF_PLATDATA
 	bool "Generate platform data for use in TPL"
 	depends on TPL_OF_CONTROL
+	select DTOC
 	help
 	  For very constrained SPL environments the overhead of decoding
 	  device tree nodes and converting their contents into platform data
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 065bb259d5..ca044767a0 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -276,10 +276,10 @@ PHONY += dts_dir
 dts_dir:
 	$(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts)
 
-include/generated/dt-structs-gen.h: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
+include/generated/dt-structs-gen.h: $(obj)/$(SPL_BIN).dtb dts_dir FORCE
 	$(call if_changed,dtoch)
 
-$(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
+$(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir FORCE
 	$(call if_changed,dtocc)
 
 ifdef CONFIG_SAMSUNG
@@ -380,17 +380,6 @@ ifneq ($(cmd_files),)
   include $(cmd_files)
 endif
 
-checkdtoc: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
-		echo '*** dtoc needs the Python libfdt library. Either '; \
-		echo '*** install it on your system, or try:'; \
-		echo '***'; \
-		echo '*** sudo apt-get install swig libpython-dev'; \
-		echo '***'; \
-		echo '*** to have U-Boot build its own version.'; \
-		false; \
-	fi
-
 PHONY += FORCE
 FORCE:
 
diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
index f4a16ed2a5..90ef2db85c 100644
--- a/scripts/dtc/Makefile
+++ b/scripts/dtc/Makefile
@@ -31,4 +31,4 @@ $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
 clean-files	:= dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h
 
 # Added for U-Boot
-subdir-y += pylibfdt
+subdir-$(CONFIG_PYLIBFDT) += pylibfdt

commit 815366520a3bc6d29a5aa94d316f2c3a396fd2df
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 13:42:43 2017 +0900

    UPSTREAM: pylibfdt: move pylibfdt to scripts/dtc/pylibfdt and refactor makefile
    
    The pylibfdt is used by dtoc (and, indirectly by binman), but there
    is no reason why it must be generated in the tools/ directory.
    
    Recently, U-Boot switched over to the bundled DTC, and the directory
    structure under scripts/dtc/ now mirrors the upstream DTC project.
    So, scripts/dtc/pylibfdt is the best location.
    
    I also rewrote the Makefile in a cleaner Kbuild style.
    
    The scripts from the upstream have been moved as follows:
    
      lib/libfdt/pylibfdt/setup.py -> scripts/dtc/pylibfdt/setup.py
      lib/libfdt/pylibfdt/libfdt.i -> scripts/dtc/pylibfdt/libfdt.i_shipped
    
    The .i_shipped is coped to .i during building because the .i must be
    located in the objtree when we build it out of tree.
    
    Change-Id: I48233cbae93794809397b7160234469f66fa11dc
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 15b97f5c5e6d88e0560c6928f3acd01c999a494d)

diff --git a/Makefile b/Makefile
index 6a92e3b60d..0ef879fca3 100644
--- a/Makefile
+++ b/Makefile
@@ -1380,7 +1380,7 @@ $(timestamp_h): $(srctree)/Makefile FORCE
 	$(call filechk,timestamp.h)
 
 checkbinman: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \
+	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
 		echo >&2; \
 		echo >&2 '*** binman needs the Python libfdt library.'; \
 		echo >&2 '*** Either install it on your system, or try:'; \
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 49b27ac926..065bb259d5 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -257,7 +257,7 @@ quiet_cmd_fdtgrep = FDTGREP $@
 $(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE
 	$(call if_changed,fdtgrep)
 
-pythonpath = PYTHONPATH=tools
+pythonpath = PYTHONPATH=scripts/dtc/pylibfdt
 
 quiet_cmd_dtocc = DTOC C  $@
 cmd_dtocc = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o $@ platdata
@@ -381,7 +381,7 @@ ifneq ($(cmd_files),)
 endif
 
 checkdtoc: tools
-	@if ! ( echo 'import libfdt' | ( PYTHONPATH=tools $(PYTHON) )); then \
+	@if ! ( echo 'import libfdt' | ( PYTHONPATH=scripts/dtc/pylibfdt $(PYTHON) )); then \
 		echo '*** dtoc needs the Python libfdt library. Either '; \
 		echo '*** install it on your system, or try:'; \
 		echo '***'; \
diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
index 2a48022c41..f4a16ed2a5 100644
--- a/scripts/dtc/Makefile
+++ b/scripts/dtc/Makefile
@@ -29,3 +29,6 @@ $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
 
 # generated files need to be cleaned explicitly
 clean-files	:= dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h
+
+# Added for U-Boot
+subdir-y += pylibfdt
diff --git a/scripts/dtc/pylibfdt/.gitignore b/scripts/dtc/pylibfdt/.gitignore
new file mode 100644
index 0000000000..033f23dfdd
--- /dev/null
+++ b/scripts/dtc/pylibfdt/.gitignore
@@ -0,0 +1,4 @@
+/_libfdt.so
+/libfdt.py
+/libfdt.pyc
+/libfdt_wrap.c
diff --git a/scripts/dtc/pylibfdt/Makefile b/scripts/dtc/pylibfdt/Makefile
new file mode 100644
index 0000000000..01d5e0ffe3
--- /dev/null
+++ b/scripts/dtc/pylibfdt/Makefile
@@ -0,0 +1,30 @@
+# Unfortunately setup.py below cannot handle srctree being ".." which it often
+# is. It fails with an error like:
+# Fatal error: can't create build/temp.linux-x86_64-2.7/../lib/libfdt/fdt.o:
+#    No such file or directory
+# To fix this, use an absolute path.
+LIBFDT_srcdir = $(abspath $(srctree)/$(src)/../libfdt)
+
+include $(LIBFDT_srcdir)/Makefile.libfdt
+
+# Unfortunately setup.py (or actually the Python distutil implementation) puts
+# files into the same directory as the .i file. We cannot touch the source
+# directory, so we "ship" .i file into the objtree.
+PYLIBFDT_srcs = $(addprefix $(LIBFDT_srcdir)/,$(LIBFDT_SRCS)) \
+		$(obj)/libfdt.i
+
+quiet_cmd_pymod = PYMOD   $@
+      cmd_pymod = unset CC; unset CROSS_COMPILE; unset CFLAGS;\
+		LDFLAGS="$(HOSTLDFLAGS)" \
+		VERSION="u-boot-$(UBOOTVERSION)" \
+		CPPFLAGS="$(HOSTCFLAGS) -I$(LIBFDT_srcdir)" OBJDIR=$(obj) \
+		SOURCES="$(PYLIBFDT_srcs)" \
+		SWIG_OPTS="-I$(LIBFDT_srcdir) -I$(LIBFDT_srcdir)/.." \
+		$(PYTHON) $< --quiet build_ext --inplace
+
+$(obj)/_libfdt.so: $(src)/setup.py $(PYLIBFDT_srcs) FORCE
+	$(call if_changed,pymod)
+
+always += _libfdt.so
+
+clean-files += libfdt.i _libfdt.so libfdt.py libfdt_wrap.c
diff --git a/lib/libfdt/pylibfdt/libfdt.i b/scripts/dtc/pylibfdt/libfdt.i_shipped
similarity index 100%
rename from lib/libfdt/pylibfdt/libfdt.i
rename to scripts/dtc/pylibfdt/libfdt.i_shipped
diff --git a/lib/libfdt/pylibfdt/setup.py b/scripts/dtc/pylibfdt/setup.py
similarity index 100%
rename from lib/libfdt/pylibfdt/setup.py
rename to scripts/dtc/pylibfdt/setup.py
diff --git a/tools/.gitignore b/tools/.gitignore
index 5293d44697..6a487d2202 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -1,4 +1,3 @@
-/_libfdt.so
 /atmel_pmecc_params
 /bin2header
 /bmp_logo
@@ -17,9 +16,6 @@
 /img2srec
 /kwboot
 /lib/
-/libfdt.py
-/libfdt.pyc
-/libfdt_wrap.c
 /mips-relocs
 /mkenvimage
 /mkexynosspl
diff --git a/tools/Makefile b/tools/Makefile
index 1bc4148163..2e3274259d 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -63,15 +63,6 @@ LIBFDT_CSRCS := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c  \
 			fdt_empty_tree.c fdt_addresses.c fdt_overlay.c \
 			fdt_region.c
 
-# Unfortunately setup.py below cannot handle srctree being ".." which it often
-# is. It fails with an error like:
-# Fatal error: can't create build/temp.linux-x86_64-2.7/../lib/libfdt/fdt.o:
-#    No such file or directory
-# To fix this, use an absolute path.
-libfdt_tree := $(shell readlink -f $(srctree)/lib/libfdt)
-
-LIBFDT_SRCS := $(addprefix $(libfdt_tree)/, $(LIBFDT_CSRCS))
-LIBFDT_SWIG := $(addprefix $(libfdt_tree)/, pylibfdt/libfdt.i)
 LIBFDT_OBJS := $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_CSRCS)))
 
 RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
@@ -123,23 +114,6 @@ mkimage-objs   := $(dumpimage-mkimage-objs) mkimage.o
 fit_info-objs   := $(dumpimage-mkimage-objs) fit_info.o
 fit_check_sign-objs   := $(dumpimage-mkimage-objs) fit_check_sign.o
 
-# Unfortunately setup.py (or actually the Python distutil implementation)
-# puts files into the same directory as the .i file. We cannot touch the source
-# directory, so we copy the .i file into the tools/ build subdirectory before
-# calling setup. This directory is safe to write to. This ensures that we get
-# all three files in $(obj)/tools: _libfdt.so, libfdt.py and libfdt_wrap.c
-# The latter is a temporary file which we could actually remove.
-tools/_libfdt.so: $(LIBFDT_SRCS) $(LIBFDT_SWIG)
-	$(Q)cp $(LIBFDT_SWIG) tools/.
-	$(Q)unset CC; \
-	unset CROSS_COMPILE; \
-	LDFLAGS="$(HOSTLDFLAGS)" CFLAGS= VERSION="u-boot-$(UBOOTVERSION)" \
-		CPPFLAGS="$(_hostc_flags)" OBJDIR=tools \
-		SOURCES="$(LIBFDT_SRCS) tools/libfdt.i" \
-		SWIG_OPTS="-I$(srctree)/lib/libfdt -I$(srctree)/lib" \
-		$(PYTHON) $(libfdt_tree)/pylibfdt/setup.py --quiet build_ext \
-			--build-lib tools
-
 ifneq ($(CONFIG_MX23)$(CONFIG_MX28),)
 # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register
 # the mxsimage support within tools/mxsimage.c .
@@ -231,10 +205,6 @@ clean-dirs := lib common
 
 always := $(hostprogs-y)
 
-# Build a libfdt Python module if swig is available
-# Use 'sudo apt-get install swig libpython-dev' to enable this
-always += $(if $(shell which swig 2> /dev/null),_libfdt.so)
-
 # Generated LCD/video logo
 LOGO_H = $(objtree)/include/bmp_logo.h
 LOGO_DATA_H = $(objtree)/include/bmp_logo_data.h
diff --git a/tools/binman/binman.py b/tools/binman/binman.py
index 09dc36a3f7..e75a59d951 100755
--- a/tools/binman/binman.py
+++ b/tools/binman/binman.py
@@ -21,7 +21,7 @@ for dirname in ['../patman', '../dtoc', '..']:
     sys.path.insert(0, os.path.join(our_path, dirname))
 
 # Bring in the libfdt module
-sys.path.insert(0, 'tools')
+sys.path.insert(0, 'scripts/dtc/pylibfdt')
 
 # Also allow entry-type modules to be brought in from the etype directory.
 sys.path.insert(0, os.path.join(our_path, 'etype'))

commit 14df9b242f1aeec4707933666e9581796e2e1597
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 13:42:42 2017 +0900

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.5-3-gb1a60033c110
    
    This adds the following commits from upstream:
    
    b1a6003 tests: Add a test for overlays syntactic sugar
    737b2df overlay: Add syntactic sugar version of overlays
    497432f checks: Use proper format modifier for size_t
    22a65c5 dtc: Bump version to v1.4.5
    c575d80 Add fdtoverlay to .gitignore
    b6a6f94 fdtoverlay: Sanity check blob size
    8c1eb15 pylibfdt: Use Python2 explicitly
    ee3d26f checks: add interrupts property check
    c1e7738 checks: add gpio binding properties check
    b3bbac0 checks: add phandle with arg property checks
    
    [ sync with Linux commit: 4201d057ea91c3d6efd2db65219bc91fae413bc2 ]
    
    Change-Id: I58c014073977530e43a5a67acf0c2e681ae27b0c
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 999a78d5cf00dfb8cd8342454933ea492e955377)

diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index afabf64337..08a3a29eda 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -956,6 +956,265 @@ static void check_obsolete_chosen_interrupt_controller(struct check *c,
 WARNING(obsolete_chosen_interrupt_controller,
 	check_obsolete_chosen_interrupt_controller, NULL);
 
+struct provider {
+	const char *prop_name;
+	const char *cell_name;
+	bool optional;
+};
+
+static void check_property_phandle_args(struct check *c,
+					  struct dt_info *dti,
+				          struct node *node,
+				          struct property *prop,
+				          const struct provider *provider)
+{
+	struct node *root = dti->dt;
+	int cell, cellsize = 0;
+
+	if (prop->val.len % sizeof(cell_t)) {
+		FAIL(c, dti, "property '%s' size (%d) is invalid, expected multiple of %zu in node %s",
+		     prop->name, prop->val.len, sizeof(cell_t), node->fullpath);
+		return;
+	}
+
+	for (cell = 0; cell < prop->val.len / sizeof(cell_t); cell += cellsize + 1) {
+		struct node *provider_node;
+		struct property *cellprop;
+		int phandle;
+
+		phandle = propval_cell_n(prop, cell);
+		/*
+		 * Some bindings use a cell value 0 or -1 to skip over optional
+		 * entries when each index position has a specific definition.
+		 */
+		if (phandle == 0 || phandle == -1) {
+			cellsize = 0;
+			continue;
+		}
+
+		/* If we have markers, verify the current cell is a phandle */
+		if (prop->val.markers) {
+			struct marker *m = prop->val.markers;
+			for_each_marker_of_type(m, REF_PHANDLE) {
+				if (m->offset == (cell * sizeof(cell_t)))
+					break;
+			}
+			if (!m)
+				FAIL(c, dti, "Property '%s', cell %d is not a phandle reference in %s",
+				     prop->name, cell, node->fullpath);
+		}
+
+		provider_node = get_node_by_phandle(root, phandle);
+		if (!provider_node) {
+			FAIL(c, dti, "Could not get phandle node for %s:%s(cell %d)",
+			     node->fullpath, prop->name, cell);
+			break;
+		}
+
+		cellprop = get_property(provider_node, provider->cell_name);
+		if (cellprop) {
+			cellsize = propval_cell(cellprop);
+		} else if (provider->optional) {
+			cellsize = 0;
+		} else {
+			FAIL(c, dti, "Missing property '%s' in node %s or bad phandle (referred from %s:%s[%d])",
+			     provider->cell_name,
+			     provider_node->fullpath,
+			     node->fullpath, prop->name, cell);
+			break;
+		}
+
+		if (prop->val.len < ((cell + cellsize + 1) * sizeof(cell_t))) {
+			FAIL(c, dti, "%s property size (%d) too small for cell size %d in %s",
+			     prop->name, prop->val.len, cellsize, node->fullpath);
+		}
+	}
+}
+
+static void check_provider_cells_property(struct check *c,
+					  struct dt_info *dti,
+				          struct node *node)
+{
+	struct provider *provider = c->data;
+	struct property *prop;
+
+	prop = get_property(node, provider->prop_name);
+	if (!prop)
+		return;
+
+	check_property_phandle_args(c, dti, node, prop, provider);
+}
+#define WARNING_PROPERTY_PHANDLE_CELLS(nm, propname, cells_name, ...) \
+	static struct provider nm##_provider = { (propname), (cells_name), __VA_ARGS__ }; \
+	WARNING(nm##_property, check_provider_cells_property, &nm##_provider, &phandle_references);
+
+WARNING_PROPERTY_PHANDLE_CELLS(clocks, "clocks", "#clock-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(cooling_device, "cooling-device", "#cooling-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(dmas, "dmas", "#dma-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(hwlocks, "hwlocks", "#hwlock-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(interrupts_extended, "interrupts-extended", "#interrupt-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(io_channels, "io-channels", "#io-channel-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(iommus, "iommus", "#iommu-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(mboxes, "mboxes", "#mbox-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(msi_parent, "msi-parent", "#msi-cells", true);
+WARNING_PROPERTY_PHANDLE_CELLS(mux_controls, "mux-controls", "#mux-control-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(phys, "phys", "#phy-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(power_domains, "power-domains", "#power-domain-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(pwms, "pwms", "#pwm-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(resets, "resets", "#reset-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(sound_dais, "sound-dais", "#sound-dai-cells");
+WARNING_PROPERTY_PHANDLE_CELLS(thermal_sensors, "thermal-sensors", "#thermal-sensor-cells");
+
+static bool prop_is_gpio(struct property *prop)
+{
+	char *str;
+
+	/*
+	 * *-gpios and *-gpio can appear in property names,
+	 * so skip over any false matches (only one known ATM)
+	 */
+	if (strstr(prop->name, "nr-gpio"))
+		return false;
+
+	str = strrchr(prop->name, '-');
+	if (str)
+		str++;
+	else
+		str = prop->name;
+	if (!(streq(str, "gpios") || streq(str, "gpio")))
+		return false;
+
+	return true;
+}
+
+static void check_gpios_property(struct check *c,
+					  struct dt_info *dti,
+				          struct node *node)
+{
+	struct property *prop;
+
+	/* Skip GPIO hog nodes which have 'gpios' property */
+	if (get_property(node, "gpio-hog"))
+		return;
+
+	for_each_property(node, prop) {
+		struct provider provider;
+
+		if (!prop_is_gpio(prop))
+			continue;
+
+		provider.prop_name = prop->name;
+		provider.cell_name = "#gpio-cells";
+		provider.optional = false;
+		check_property_phandle_args(c, dti, node, prop, &provider);
+	}
+
+}
+WARNING(gpios_property, check_gpios_property, NULL, &phandle_references);
+
+static void check_deprecated_gpio_property(struct check *c,
+					   struct dt_info *dti,
+				           struct node *node)
+{
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		char *str;
+
+		if (!prop_is_gpio(prop))
+			continue;
+
+		str = strstr(prop->name, "gpio");
+		if (!streq(str, "gpio"))
+			continue;
+
+		FAIL(c, dti, "'[*-]gpio' is deprecated, use '[*-]gpios' instead for %s:%s",
+		     node->fullpath, prop->name);
+	}
+
+}
+CHECK(deprecated_gpio_property, check_deprecated_gpio_property, NULL);
+
+static bool node_is_interrupt_provider(struct node *node)
+{
+	struct property *prop;
+
+	prop = get_property(node, "interrupt-controller");
+	if (prop)
+		return true;
+
+	prop = get_property(node, "interrupt-map");
+	if (prop)
+		return true;
+
+	return false;
+}
+static void check_interrupts_property(struct check *c,
+				      struct dt_info *dti,
+				      struct node *node)
+{
+	struct node *root = dti->dt;
+	struct node *irq_node = NULL, *parent = node;
+	struct property *irq_prop, *prop = NULL;
+	int irq_cells, phandle;
+
+	irq_prop = get_property(node, "interrupts");
+	if (!irq_prop)
+		return;
+
+	if (irq_prop->val.len % sizeof(cell_t))
+		FAIL(c, dti, "property '%s' size (%d) is invalid, expected multiple of %zu in node %s",
+		     irq_prop->name, irq_prop->val.len, sizeof(cell_t),
+		     node->fullpath);
+
+	while (parent && !prop) {
+		if (parent != node && node_is_interrupt_provider(parent)) {
+			irq_node = parent;
+			break;
+		}
+
+		prop = get_property(parent, "interrupt-parent");
+		if (prop) {
+			phandle = propval_cell(prop);
+			irq_node = get_node_by_phandle(root, phandle);
+			if (!irq_node) {
+				FAIL(c, dti, "Bad interrupt-parent phandle for %s",
+				     node->fullpath);
+				return;
+			}
+			if (!node_is_interrupt_provider(irq_node))
+				FAIL(c, dti,
+				     "Missing interrupt-controller or interrupt-map property in %s",
+				     irq_node->fullpath);
+
+			break;
+		}
+
+		parent = parent->parent;
+	}
+
+	if (!irq_node) {
+		FAIL(c, dti, "Missing interrupt-parent for %s", node->fullpath);
+		return;
+	}
+
+	prop = get_property(irq_node, "#interrupt-cells");
+	if (!prop) {
+		FAIL(c, dti, "Missing #interrupt-cells in interrupt-parent %s",
+		     irq_node->fullpath);
+		return;
+	}
+
+	irq_cells = propval_cell(prop);
+	if (irq_prop->val.len % (irq_cells * sizeof(cell_t))) {
+		FAIL(c, dti,
+		     "interrupts size is (%d), expected multiple of %d in %s",
+		     irq_prop->val.len, (int)(irq_cells * sizeof(cell_t)),
+		     node->fullpath);
+	}
+}
+WARNING(interrupts_property, check_interrupts_property, &phandle_references);
+
 static struct check *check_table[] = {
 	&duplicate_node_names, &duplicate_property_names,
 	&node_name_chars, &node_name_format, &property_name_chars,
@@ -987,6 +1246,27 @@ static struct check *check_table[] = {
 	&avoid_default_addr_size,
 	&obsolete_chosen_interrupt_controller,
 
+	&clocks_property,
+	&cooling_device_property,
+	&dmas_property,
+	&hwlocks_property,
+	&interrupts_extended_property,
+	&io_channels_property,
+	&iommus_property,
+	&mboxes_property,
+	&msi_parent_property,
+	&mux_controls_property,
+	&phys_property,
+	&power_domains_property,
+	&pwms_property,
+	&resets_property,
+	&sound_dais_property,
+	&thermal_sensors_property,
+
+	&deprecated_gpio_property,
+	&gpios_property,
+	&interrupts_property,
+
 	&always_fail,
 };
 
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
index 3934d8624d..011bb9632f 100644
--- a/scripts/dtc/dtc-lexer.lex.c_shipped
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -8,8 +8,8 @@
 
 #define FLEX_SCANNER
 #define YY_FLEX_MAJOR_VERSION 2
-#define YY_FLEX_MINOR_VERSION 5
-#define YY_FLEX_SUBMINOR_VERSION 35
+#define YY_FLEX_MINOR_VERSION 6
+#define YY_FLEX_SUBMINOR_VERSION 1
 #if YY_FLEX_SUBMINOR_VERSION > 0
 #define FLEX_BETA
 #endif
@@ -88,25 +88,13 @@ typedef unsigned int flex_uint32_t;
 
 #endif /* ! FLEXINT_H */
 
-#ifdef __cplusplus
-
-/* The "const" storage-class-modifier is valid. */
-#define YY_USE_CONST
-
-#else	/* ! __cplusplus */
-
-/* C99 requires __STDC__ to be defined as 1. */
-#if defined (__STDC__)
-
-#define YY_USE_CONST
-
-#endif	/* defined (__STDC__) */
-#endif	/* ! __cplusplus */
-
-#ifdef YY_USE_CONST
+/* TODO: this is always defined, so inline it */
 #define yyconst const
+
+#if defined(__GNUC__) && __GNUC__ >= 3
+#define yynoreturn __attribute__((__noreturn__))
 #else
-#define yyconst
+#define yynoreturn
 #endif
 
 /* Returned upon end-of-file. */
@@ -162,6 +150,11 @@ typedef unsigned int flex_uint32_t;
 typedef struct yy_buffer_state *YY_BUFFER_STATE;
 #endif
 
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef size_t yy_size_t;
+#endif
+
 extern int yyleng;
 
 extern FILE *yyin, *yyout;
@@ -171,6 +164,7 @@ extern FILE *yyin, *yyout;
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
+    #define YY_LINENO_REWIND_TO(ptr)
     
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
@@ -188,11 +182,6 @@ extern FILE *yyin, *yyout;
 
 #define unput(c) yyunput( c, (yytext_ptr)  )
 
-#ifndef YY_TYPEDEF_YY_SIZE_T
-#define YY_TYPEDEF_YY_SIZE_T
-typedef size_t yy_size_t;
-#endif
-
 #ifndef YY_STRUCT_YY_BUFFER_STATE
 #define YY_STRUCT_YY_BUFFER_STATE
 struct yy_buffer_state
@@ -205,7 +194,7 @@ struct yy_buffer_state
 	/* Size of input buffer in bytes, not including room for EOB
 	 * characters.
 	 */
-	yy_size_t yy_buf_size;
+	int yy_buf_size;
 
 	/* Number of characters read into yy_ch_buf, not including EOB
 	 * characters.
@@ -233,7 +222,7 @@ struct yy_buffer_state
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
-    
+
 	/* Whether to try to fill the input buffer when we reach the
 	 * end of it.
 	 */
@@ -261,7 +250,7 @@ struct yy_buffer_state
 /* Stack of input buffers. */
 static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
 static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
-static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
+static YY_BUFFER_STATE * yy_buffer_stack = NULL; /**< Stack as an array. */
 
 /* We provide macros for accessing buffer states in case in the
  * future we want to put the buffer states in a more general
@@ -284,7 +273,7 @@ static int yy_n_chars;		/* number of characters read into yy_ch_buf */
 int yyleng;
 
 /* Points to current character in buffer. */
-static char *yy_c_buf_p = (char *) 0;
+static char *yy_c_buf_p = NULL;
 static int yy_init = 0;		/* whether we need to initialize */
 static int yy_start = 0;	/* start state number */
 
@@ -341,12 +330,12 @@ void yyfree (void *  );
 
 /* Begin user sect3 */
 
-#define yywrap(n) 1
+#define yywrap() (/*CONSTCOND*/1)
 #define YY_SKIP_YYWRAP
 
 typedef unsigned char YY_CHAR;
 
-FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
+FILE *yyin = NULL, *yyout = NULL;
 
 typedef int yy_state_type;
 
@@ -355,19 +344,22 @@ extern int yylineno;
 int yylineno = 1;
 
 extern char *yytext;
+#ifdef yytext_ptr
+#undef yytext_ptr
+#endif
 #define yytext_ptr yytext
 
 static yy_state_type yy_get_previous_state (void );
 static yy_state_type yy_try_NUL_trans (yy_state_type current_state  );
 static int yy_get_next_buffer (void );
-static void yy_fatal_error (yyconst char msg[]  );
+static void yynoreturn yy_fatal_error (yyconst char* msg  );
 
 /* Done after the current pattern has been matched and before the
  * corresponding action - sets up yytext.
  */
 #define YY_DO_BEFORE_ACTION \
 	(yytext_ptr) = yy_bp; \
-	yyleng = (size_t) (yy_cp - yy_bp); \
+	yyleng = (int) (yy_cp - yy_bp); \
 	(yy_hold_char) = *yy_cp; \
 	*yy_cp = '\0'; \
 	(yy_c_buf_p) = yy_cp;
@@ -403,7 +395,7 @@ static yyconst flex_int16_t yy_accept[166] =
         0,    0,    0,    8,    0
     } ;
 
-static yyconst flex_int32_t yy_ec[256] =
+static yyconst YY_CHAR yy_ec[256] =
     {   0,
         1,    1,    1,    1,    1,    1,    1,    1,    2,    3,
         4,    4,    4,    1,    1,    1,    1,    1,    1,    1,
@@ -435,7 +427,7 @@ static yyconst flex_int32_t yy_ec[256] =
         1,    1,    1,    1,    1
     } ;
 
-static yyconst flex_int32_t yy_meta[48] =
+static yyconst YY_CHAR yy_meta[48] =
     {   0,
         1,    1,    1,    1,    1,    1,    2,    3,    1,    2,
         2,    2,    4,    5,    5,    5,    6,    1,    1,    1,
@@ -444,7 +436,7 @@ static yyconst flex_int32_t yy_meta[48] =
         8,    8,    8,    8,    3,    1,    4
     } ;
 
-static yyconst flex_int16_t yy_base[180] =
+static yyconst flex_uint16_t yy_base[180] =
     {   0,
         0,  393,   35,  392,   66,  391,   38,  107,  397,  401,
        55,  113,  377,  112,  111,  111,  114,   42,  376,  106,
@@ -490,7 +482,7 @@ static yyconst flex_int16_t yy_def[180] =
       165,  165,  165,  165,  165,  165,  165,  165,  165
     } ;
 
-static yyconst flex_int16_t yy_nxt[449] =
+static yyconst flex_uint16_t yy_nxt[449] =
     {   0,
        10,   11,   12,   11,   13,   14,   10,   15,   16,   10,
        10,   10,   17,   10,   10,   10,   10,   18,   19,   20,
@@ -665,7 +657,7 @@ static void push_input_file(const char *filename);
 static bool pop_input_file(void);
 static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
 
-#line 669 "dtc-lexer.lex.c"
+#line 661 "dtc-lexer.lex.c"
 
 #define INITIAL 0
 #define BYTESTRING 1
@@ -701,19 +693,19 @@ void yyset_extra (YY_EXTRA_TYPE user_defined  );
 
 FILE *yyget_in (void );
 
-void yyset_in  (FILE * in_str  );
+void yyset_in  (FILE * _in_str  );
 
 FILE *yyget_out (void );
 
-void yyset_out  (FILE * out_str  );
+void yyset_out  (FILE * _out_str  );
 
-int yyget_leng (void );
+			int yyget_leng (void );
 
 char *yyget_text (void );
 
 int yyget_lineno (void );
 
-void yyset_lineno (int line_number  );
+void yyset_lineno (int _line_number  );
 
 /* Macros after this point can all be overridden by user definitions in
  * section 1.
@@ -727,6 +719,10 @@ extern int yywrap (void );
 #endif
 #endif
 
+#ifndef YY_NO_UNPUT
+    
+#endif
+
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
@@ -760,7 +756,7 @@ static int input (void );
 /* This used to be an fputs(), but since the string might contain NUL's,
  * we now use fwrite().
  */
-#define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0)
+#define ECHO do { if (fwrite( yytext, (size_t) yyleng, 1, yyout )) {} } while (0)
 #endif
 
 /* Gets input and stuffs it into "buf".  number of characters read, or YY_NULL,
@@ -784,7 +780,7 @@ static int input (void );
 	else \
 		{ \
 		errno=0; \
-		while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
+		while ( (result = (int) fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
 			{ \
 			if( errno != EINTR) \
 				{ \
@@ -839,7 +835,7 @@ extern int yylex (void);
 
 /* Code executed at the end of each rule. */
 #ifndef YY_BREAK
-#define YY_BREAK break;
+#define YY_BREAK /*LINTED*/break;
 #endif
 
 #define YY_RULE_SETUP \
@@ -852,14 +848,10 @@ extern int yylex (void);
  */
 YY_DECL
 {
-	register yy_state_type yy_current_state;
-	register char *yy_cp, *yy_bp;
-	register int yy_act;
+	yy_state_type yy_current_state;
+	char *yy_cp, *yy_bp;
+	int yy_act;
     
-#line 69 "dtc-lexer.l"
-
-#line 862 "dtc-lexer.lex.c"
-
 	if ( !(yy_init) )
 		{
 		(yy_init) = 1;
@@ -886,7 +878,12 @@ YY_DECL
 		yy_load_buffer_state( );
 		}
 
-	while ( 1 )		/* loops until end-of-file is reached */
+	{
+#line 69 "dtc-lexer.l"
+
+#line 885 "dtc-lexer.lex.c"
+
+	while ( /*CONSTCOND*/1 )		/* loops until end-of-file is reached */
 		{
 		yy_cp = (yy_c_buf_p);
 
@@ -903,7 +900,7 @@ YY_DECL
 yy_match:
 		do
 			{
-			register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
+			YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)] ;
 			if ( yy_accept[yy_current_state] )
 				{
 				(yy_last_accepting_state) = yy_current_state;
@@ -915,7 +912,7 @@ yy_match:
 				if ( yy_current_state >= 166 )
 					yy_c = yy_meta[(unsigned int) yy_c];
 				}
-			yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+			yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c];
 			++yy_cp;
 			}
 		while ( yy_current_state != 165 );
@@ -1256,7 +1253,7 @@ YY_RULE_SETUP
 #line 272 "dtc-lexer.l"
 ECHO;
 	YY_BREAK
-#line 1260 "dtc-lexer.lex.c"
+#line 1257 "dtc-lexer.lex.c"
 
 	case YY_END_OF_BUFFER:
 		{
@@ -1386,6 +1383,7 @@ ECHO;
 			"fatal flex scanner internal error--no action found" );
 	} /* end of action switch */
 		} /* end of scanning one token */
+	} /* end of user's declarations */
 } /* end of yylex */
 
 /* yy_get_next_buffer - try to read in a new buffer
@@ -1397,9 +1395,9 @@ ECHO;
  */
 static int yy_get_next_buffer (void)
 {
-    	register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
-	register char *source = (yytext_ptr);
-	register int number_to_move, i;
+    	char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
+	char *source = (yytext_ptr);
+	int number_to_move, i;
 	int ret_val;
 
 	if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
@@ -1428,7 +1426,7 @@ static int yy_get_next_buffer (void)
 	/* Try to read more data. */
 
 	/* First move last chars to start of buffer. */
-	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
+	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr) - 1);
 
 	for ( i = 0; i < number_to_move; ++i )
 		*(dest++) = *(source++);
@@ -1448,7 +1446,7 @@ static int yy_get_next_buffer (void)
 			{ /* Not enough room in the buffer - grow it. */
 
 			/* just a shorter name for the current buffer */
-			YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
+			YY_BUFFER_STATE b = YY_CURRENT_BUFFER_LVALUE;
 
 			int yy_c_buf_p_offset =
 				(int) ((yy_c_buf_p) - b->yy_ch_buf);
@@ -1468,7 +1466,7 @@ static int yy_get_next_buffer (void)
 				}
 			else
 				/* Can't grow it, we don't own it. */
-				b->yy_ch_buf = 0;
+				b->yy_ch_buf = NULL;
 
 			if ( ! b->yy_ch_buf )
 				YY_FATAL_ERROR(
@@ -1486,7 +1484,7 @@ static int yy_get_next_buffer (void)
 
 		/* Read in more data. */
 		YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
-			(yy_n_chars), (size_t) num_to_read );
+			(yy_n_chars), num_to_read );
 
 		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
 		}
@@ -1510,9 +1508,9 @@ static int yy_get_next_buffer (void)
 	else
 		ret_val = EOB_ACT_CONTINUE_SCAN;
 
-	if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
+	if (((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
 		/* Extend the array by 50%, plus the number we really need. */
-		yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
+		int new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
 		YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size  );
 		if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
 			YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
@@ -1531,15 +1529,15 @@ static int yy_get_next_buffer (void)
 
     static yy_state_type yy_get_previous_state (void)
 {
-	register yy_state_type yy_current_state;
-	register char *yy_cp;
+	yy_state_type yy_current_state;
+	char *yy_cp;
     
 	yy_current_state = (yy_start);
 	yy_current_state += YY_AT_BOL();
 
 	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
 		{
-		register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
+		YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
 		if ( yy_accept[yy_current_state] )
 			{
 			(yy_last_accepting_state) = yy_current_state;
@@ -1551,7 +1549,7 @@ static int yy_get_next_buffer (void)
 			if ( yy_current_state >= 166 )
 				yy_c = yy_meta[(unsigned int) yy_c];
 			}
-		yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+		yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c];
 		}
 
 	return yy_current_state;
@@ -1564,10 +1562,10 @@ static int yy_get_next_buffer (void)
  */
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
-	register int yy_is_jam;
-    	register char *yy_cp = (yy_c_buf_p);
+	int yy_is_jam;
+    	char *yy_cp = (yy_c_buf_p);
 
-	register YY_CHAR yy_c = 1;
+	YY_CHAR yy_c = 1;
 	if ( yy_accept[yy_current_state] )
 		{
 		(yy_last_accepting_state) = yy_current_state;
@@ -1579,12 +1577,16 @@ static int yy_get_next_buffer (void)
 		if ( yy_current_state >= 166 )
 			yy_c = yy_meta[(unsigned int) yy_c];
 		}
-	yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+	yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c];
 	yy_is_jam = (yy_current_state == 165);
 
-	return yy_is_jam ? 0 : yy_current_state;
+		return yy_is_jam ? 0 : yy_current_state;
 }
 
+#ifndef YY_NO_UNPUT
+
+#endif
+
 #ifndef YY_NO_INPUT
 #ifdef __cplusplus
     static int yyinput (void)
@@ -1633,7 +1635,7 @@ static int yy_get_next_buffer (void)
 				case EOB_ACT_END_OF_FILE:
 					{
 					if ( yywrap( ) )
-						return EOF;
+						return 0;
 
 					if ( ! (yy_did_buffer_switch_on_eof) )
 						YY_NEW_FILE;
@@ -1736,7 +1738,7 @@ static void yy_load_buffer_state  (void)
 	if ( ! b )
 		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
 
-	b->yy_buf_size = size;
+	b->yy_buf_size = (yy_size_t)size;
 
 	/* yy_ch_buf has to be 2 characters longer than the size given because
 	 * we need to put in 2 end-of-buffer characters.
@@ -1891,15 +1893,15 @@ static void yyensure_buffer_stack (void)
 		 * scanner will even need a stack. We use 2 instead of 1 to avoid an
 		 * immediate realloc on the next call.
          */
-		num_to_alloc = 1;
+      num_to_alloc = 1; /* After all that talk, this was set to 1 anyways... */
 		(yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
 								(num_to_alloc * sizeof(struct yy_buffer_state*)
 								);
 		if ( ! (yy_buffer_stack) )
 			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
-								  
+
 		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
-				
+
 		(yy_buffer_stack_max) = num_to_alloc;
 		(yy_buffer_stack_top) = 0;
 		return;
@@ -1908,7 +1910,7 @@ static void yyensure_buffer_stack (void)
 	if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
 
 		/* Increase the buffer to prepare for a possible push. */
-		int grow_size = 8 /* arbitrary grow size */;
+		yy_size_t grow_size = 8 /* arbitrary grow size */;
 
 		num_to_alloc = (yy_buffer_stack_max) + grow_size;
 		(yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
@@ -1928,7 +1930,7 @@ static void yyensure_buffer_stack (void)
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
  * 
- * @return the newly allocated buffer state object. 
+ * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 {
@@ -1938,7 +1940,7 @@ YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
 	     base[size-1] != YY_END_OF_BUFFER_CHAR )
 		/* They forgot to leave room for the EOB's. */
-		return 0;
+		return NULL;
 
 	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
 	if ( ! b )
@@ -1947,7 +1949,7 @@ YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 	b->yy_buf_size = size - 2;	/* "- 2" to take care of EOB's */
 	b->yy_buf_pos = b->yy_ch_buf = base;
 	b->yy_is_our_buffer = 0;
-	b->yy_input_file = 0;
+	b->yy_input_file = NULL;
 	b->yy_n_chars = b->yy_buf_size;
 	b->yy_is_interactive = 0;
 	b->yy_at_bol = 1;
@@ -1970,7 +1972,7 @@ YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
 YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
 {
     
-	return yy_scan_bytes(yystr,strlen(yystr) );
+	return yy_scan_bytes(yystr,(int) strlen(yystr) );
 }
 
 /** Setup the input buffer state to scan the given bytes. The next call to yylex() will
@@ -1988,7 +1990,7 @@ YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
 	int i;
     
 	/* Get memory for full buffer, including space for trailing EOB's. */
-	n = _yybytes_len + 2;
+	n = (yy_size_t) (_yybytes_len + 2);
 	buf = (char *) yyalloc(n  );
 	if ( ! buf )
 		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
@@ -2014,9 +2016,9 @@ YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
 #define YY_EXIT_FAILURE 2
 #endif
 
-static void yy_fatal_error (yyconst char* msg )
+static void yynoreturn yy_fatal_error (yyconst char* msg )
 {
-    	(void) fprintf( stderr, "%s\n", msg );
+			(void) fprintf( stderr, "%s\n", msg );
 	exit( YY_EXIT_FAILURE );
 }
 
@@ -2044,7 +2046,7 @@ static void yy_fatal_error (yyconst char* msg )
  */
 int yyget_lineno  (void)
 {
-        
+    
     return yylineno;
 }
 
@@ -2082,29 +2084,29 @@ char *yyget_text  (void)
 }
 
 /** Set the current line number.
- * @param line_number
+ * @param _line_number line number
  * 
  */
-void yyset_lineno (int  line_number )
+void yyset_lineno (int  _line_number )
 {
     
-    yylineno = line_number;
+    yylineno = _line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
- * @param in_str A readable stream.
+ * @param _in_str A readable stream.
  * 
  * @see yy_switch_to_buffer
  */
-void yyset_in (FILE *  in_str )
+void yyset_in (FILE *  _in_str )
 {
-        yyin = in_str ;
+        yyin = _in_str ;
 }
 
-void yyset_out (FILE *  out_str )
+void yyset_out (FILE *  _out_str )
 {
-        yyout = out_str ;
+        yyout = _out_str ;
 }
 
 int yyget_debug  (void)
@@ -2112,9 +2114,9 @@ int yyget_debug  (void)
         return yy_flex_debug;
 }
 
-void yyset_debug (int  bdebug )
+void yyset_debug (int  _bdebug )
 {
-        yy_flex_debug = bdebug ;
+        yy_flex_debug = _bdebug ;
 }
 
 static int yy_init_globals (void)
@@ -2123,10 +2125,10 @@ static int yy_init_globals (void)
      * This function is called from yylex_destroy(), so don't allocate here.
      */
 
-    (yy_buffer_stack) = 0;
+    (yy_buffer_stack) = NULL;
     (yy_buffer_stack_top) = 0;
     (yy_buffer_stack_max) = 0;
-    (yy_c_buf_p) = (char *) 0;
+    (yy_c_buf_p) = NULL;
     (yy_init) = 0;
     (yy_start) = 0;
 
@@ -2135,8 +2137,8 @@ static int yy_init_globals (void)
     yyin = stdin;
     yyout = stdout;
 #else
-    yyin = (FILE *) 0;
-    yyout = (FILE *) 0;
+    yyin = NULL;
+    yyout = NULL;
 #endif
 
     /* For future reference: Set errno on error, since we are called by
@@ -2174,7 +2176,8 @@ int yylex_destroy  (void)
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
 {
-	register int i;
+		
+	int i;
 	for ( i = 0; i < n; ++i )
 		s1[i] = s2[i];
 }
@@ -2183,7 +2186,7 @@ static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
 #ifdef YY_NEED_STRLEN
 static int yy_flex_strlen (yyconst char * s )
 {
-	register int n;
+	int n;
 	for ( n = 0; s[n]; ++n )
 		;
 
@@ -2193,11 +2196,12 @@ static int yy_flex_strlen (yyconst char * s )
 
 void *yyalloc (yy_size_t  size )
 {
-	return (void *) malloc( size );
+			return malloc(size);
 }
 
 void *yyrealloc  (void * ptr, yy_size_t  size )
 {
+		
 	/* The cast to (char *) in the following accommodates both
 	 * implementations that use char* generic pointers, and those
 	 * that use void* generic pointers.  It works with the latter
@@ -2205,12 +2209,12 @@ void *yyrealloc  (void * ptr, yy_size_t  size )
 	 * any pointer type to void*, and deal with argument conversions
 	 * as though doing an assignment.
 	 */
-	return (void *) realloc( (char *) ptr, size );
+	return realloc(ptr, size);
 }
 
 void yyfree (void * ptr )
 {
-	free( (char *) ptr );	/* see yyrealloc() for (char *) cast */
+			free( (char *) ptr );	/* see yyrealloc() for (char *) cast */
 }
 
 #define YYTABLES_NAME "yytables"
diff --git a/scripts/dtc/dtc-parser.tab.c_shipped b/scripts/dtc/dtc-parser.tab.c_shipped
index 4d10814b3f..aea514fa69 100644
--- a/scripts/dtc/dtc-parser.tab.c_shipped
+++ b/scripts/dtc/dtc-parser.tab.c_shipped
@@ -1,8 +1,8 @@
-/* A Bison parser, made by GNU Bison 3.0.2.  */
+/* A Bison parser, made by GNU Bison 3.0.4.  */
 
 /* Bison implementation for Yacc-like parsers in C
 
-   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+   Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc.
 
    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -44,7 +44,7 @@
 #define YYBISON 1
 
 /* Bison version.  */
-#define YYBISON_VERSION "3.0.2"
+#define YYBISON_VERSION "3.0.4"
 
 /* Skeleton name.  */
 #define YYSKELETON_NAME "yacc.c"
@@ -143,7 +143,7 @@ extern int yydebug;
 
 /* Value type.  */
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
-typedef union YYSTYPE YYSTYPE;
+
 union YYSTYPE
 {
 #line 39 "dtc-parser.y" /* yacc.c:355  */
@@ -168,6 +168,8 @@ union YYSTYPE
 
 #line 170 "dtc-parser.tab.c" /* yacc.c:355  */
 };
+
+typedef union YYSTYPE YYSTYPE;
 # define YYSTYPE_IS_TRIVIAL 1
 # define YYSTYPE_IS_DECLARED 1
 #endif
@@ -195,7 +197,7 @@ int yyparse (void);
 
 /* Copy the second part of user declarations.  */
 
-#line 199 "dtc-parser.tab.c" /* yacc.c:358  */
+#line 201 "dtc-parser.tab.c" /* yacc.c:358  */
 
 #ifdef short
 # undef short
@@ -446,7 +448,7 @@ union yyalloc
 /* YYNNTS -- Number of nonterminals.  */
 #define YYNNTS  30
 /* YYNRULES -- Number of rules.  */
-#define YYNRULES  84
+#define YYNRULES  85
 /* YYNSTATES -- Number of states.  */
 #define YYNSTATES  149
 
@@ -497,14 +499,14 @@ static const yytype_uint8 yytranslate[] =
 static const yytype_uint16 yyrline[] =
 {
        0,   109,   109,   117,   121,   128,   129,   139,   142,   149,
-     153,   161,   165,   170,   181,   191,   206,   214,   217,   224,
-     228,   232,   236,   244,   248,   252,   256,   260,   276,   286,
-     294,   297,   301,   308,   324,   329,   348,   362,   369,   370,
-     371,   378,   382,   383,   387,   388,   392,   393,   397,   398,
-     402,   403,   407,   408,   412,   413,   414,   418,   419,   420,
-     421,   422,   426,   427,   428,   432,   433,   434,   438,   439,
-     448,   457,   461,   462,   463,   464,   469,   472,   476,   484,
-     487,   491,   499,   503,   507
+     153,   161,   165,   170,   181,   200,   213,   220,   228,   231,
+     238,   242,   246,   250,   258,   262,   266,   270,   274,   290,
+     300,   308,   311,   315,   322,   338,   343,   362,   376,   383,
+     384,   385,   392,   396,   397,   401,   402,   406,   407,   411,
+     412,   416,   417,   421,   422,   426,   427,   428,   432,   433,
+     434,   435,   436,   440,   441,   442,   446,   447,   448,   452,
+     453,   462,   471,   475,   476,   477,   478,   483,   486,   490,
+     498,   501,   505,   513,   517,   521
 };
 #endif
 
@@ -580,20 +582,20 @@ static const yytype_int8 yypact[] =
 static const yytype_uint8 yydefact[] =
 {
        0,     0,     0,     5,     7,     3,     1,     6,     0,     0,
-       0,     7,     0,    38,    39,     0,     0,    10,     0,     2,
-       8,     4,     0,     0,     0,    72,     0,    41,    42,    44,
-      46,    48,    50,    52,    54,    57,    64,    67,    71,     0,
-      17,    11,     0,     0,     0,     0,    73,    74,    75,    40,
+      16,     7,     0,    39,    40,     0,     0,    10,     0,     2,
+       8,     4,     0,     0,     0,    73,     0,    42,    43,    45,
+      47,    49,    51,    53,    55,    58,    65,    68,    72,     0,
+      18,    11,     0,     0,     0,     0,    74,    75,    76,    41,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
        0,     0,     0,     0,     0,     0,     0,     0,     0,     9,
-      79,     0,     0,    14,    12,    45,     0,    47,    49,    51,
-      53,    55,    56,    60,    61,    59,    58,    62,    63,    65,
-      66,    69,    68,    70,     0,     0,     0,     0,    18,     0,
-      79,    15,    13,     0,     0,     0,    20,    30,    82,    22,
-      84,     0,    81,    80,    43,    21,    83,     0,     0,    16,
-      29,    19,    31,     0,    23,    32,    26,     0,    76,    34,
-       0,     0,     0,     0,    37,    36,    24,    35,    33,     0,
-      77,    78,    25,     0,    28,     0,     0,     0,    27
+      80,     0,     0,    14,    12,    46,     0,    48,    50,    52,
+      54,    56,    57,    61,    62,    60,    59,    63,    64,    66,
+      67,    70,    69,    71,     0,     0,     0,     0,    19,     0,
+      80,    15,    13,     0,     0,     0,    21,    31,    83,    23,
+      85,     0,    82,    81,    44,    22,    84,     0,     0,    17,
+      30,    20,    32,     0,    24,    33,    27,     0,    77,    35,
+       0,     0,     0,     0,    38,    37,    25,    36,    34,     0,
+      78,    79,    26,     0,    29,     0,     0,     0,    28
 };
 
   /* YYPGOTO[NTERM-NUM].  */
@@ -676,28 +678,28 @@ static const yytype_uint8 yystos[] =
 static const yytype_uint8 yyr1[] =
 {
        0,    48,    49,    50,    50,    51,    51,    52,    52,    53,
-      53,    54,    54,    54,    54,    54,    55,    56,    56,    57,
-      57,    57,    57,    58,    58,    58,    58,    58,    58,    58,
-      59,    59,    59,    60,    60,    60,    60,    60,    61,    61,
-      61,    62,    63,    63,    64,    64,    65,    65,    66,    66,
-      67,    67,    68,    68,    69,    69,    69,    70,    70,    70,
-      70,    70,    71,    71,    71,    72,    72,    72,    73,    73,
-      73,    73,    74,    74,    74,    74,    75,    75,    75,    76,
-      76,    76,    77,    77,    77
+      53,    54,    54,    54,    54,    54,    54,    55,    56,    56,
+      57,    57,    57,    57,    58,    58,    58,    58,    58,    58,
+      58,    59,    59,    59,    60,    60,    60,    60,    60,    61,
+      61,    61,    62,    63,    63,    64,    64,    65,    65,    66,
+      66,    67,    67,    68,    68,    69,    69,    69,    70,    70,
+      70,    70,    70,    71,    71,    71,    72,    72,    72,    73,
+      73,    73,    73,    74,    74,    74,    74,    75,    75,    75,
+      76,    76,    76,    77,    77,    77
 };
 
   /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN.  */
 static const yytype_uint8 yyr2[] =
 {
        0,     2,     3,     2,     4,     1,     2,     0,     2,     4,
-       2,     2,     3,     4,     3,     4,     5,     0,     2,     4,
-       2,     3,     2,     2,     3,     4,     2,     9,     5,     2,
-       0,     2,     2,     3,     1,     2,     2,     2,     1,     1,
-       3,     1,     1,     5,     1,     3,     1,     3,     1,     3,
-       1,     3,     1,     3,     1,     3,     3,     1,     3,     3,
-       3,     3,     3,     3,     1,     3,     3,     1,     3,     3,
-       3,     1,     1,     2,     2,     2,     0,     2,     2,     0,
-       2,     2,     2,     3,     2
+       2,     2,     3,     4,     3,     4,     0,     5,     0,     2,
+       4,     2,     3,     2,     2,     3,     4,     2,     9,     5,
+       2,     0,     2,     2,     3,     1,     2,     2,     2,     1,
+       1,     3,     1,     1,     5,     1,     3,     1,     3,     1,
+       3,     1,     3,     1,     3,     1,     3,     3,     1,     3,
+       3,     3,     3,     3,     3,     1,     3,     3,     1,     3,
+       3,     3,     1,     1,     2,     2,     2,     0,     2,     2,
+       0,     2,     2,     2,     3,     2
 };
 
 
@@ -1472,7 +1474,7 @@ yyreduce:
 			parser_output = build_dt_info((yyvsp[-2].flags), (yyvsp[-1].re), (yyvsp[0].node),
 			                              guess_boot_cpuid((yyvsp[0].node)));
 		}
-#line 1476 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1478 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 3:
@@ -1480,7 +1482,7 @@ yyreduce:
     {
 			(yyval.flags) = DTSF_V1;
 		}
-#line 1484 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1486 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 4:
@@ -1488,7 +1490,7 @@ yyreduce:
     {
 			(yyval.flags) = DTSF_V1 | DTSF_PLUGIN;
 		}
-#line 1492 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1494 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 6:
@@ -1498,7 +1500,7 @@ yyreduce:
 				ERROR(&(yylsp[0]), "Header flags don't match earlier ones");
 			(yyval.flags) = (yyvsp[-1].flags);
 		}
-#line 1502 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1504 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 7:
@@ -1506,7 +1508,7 @@ yyreduce:
     {
 			(yyval.re) = NULL;
 		}
-#line 1510 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1512 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 8:
@@ -1514,7 +1516,7 @@ yyreduce:
     {
 			(yyval.re) = chain_reserve_entry((yyvsp[-1].re), (yyvsp[0].re));
 		}
-#line 1518 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1520 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 9:
@@ -1522,7 +1524,7 @@ yyreduce:
     {
 			(yyval.re) = build_reserve_entry((yyvsp[-2].integer), (yyvsp[-1].integer));
 		}
-#line 1526 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1528 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 10:
@@ -1531,7 +1533,7 @@ yyreduce:
 			add_label(&(yyvsp[0].re)->labels, (yyvsp[-1].labelref));
 			(yyval.re) = (yyvsp[0].re);
 		}
-#line 1535 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1537 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 11:
@@ -1539,7 +1541,7 @@ yyreduce:
     {
 			(yyval.node) = name_node((yyvsp[0].node), "");
 		}
-#line 1543 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1545 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 12:
@@ -1547,7 +1549,7 @@ yyreduce:
     {
 			(yyval.node) = merge_nodes((yyvsp[-2].node), (yyvsp[0].node));
 		}
-#line 1551 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1553 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 13:
@@ -1562,7 +1564,7 @@ yyreduce:
 				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
 			(yyval.node) = (yyvsp[-3].node);
 		}
-#line 1566 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1568 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 14:
@@ -1570,17 +1572,26 @@ yyreduce:
     {
 			struct node *target = get_node_by_ref((yyvsp[-2].node), (yyvsp[-1].labelref));
 
-			if (target)
+			if (target) {
 				merge_nodes(target, (yyvsp[0].node));
-			else
-				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			} else {
+				/*
+				 * We rely on the rule being always:
+				 *   versioninfo plugindecl memreserves devicetree
+				 * so $-1 is what we want (plugindecl)
+				 */
+				if ((yyvsp[(-1) - (3)].flags) & DTSF_PLUGIN)
+					add_orphan_node((yyvsp[-2].node), (yyvsp[0].node), (yyvsp[-1].labelref));
+				else
+					ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			}
 			(yyval.node) = (yyvsp[-2].node);
 		}
-#line 1580 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1591 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 15:
-#line 192 "dtc-parser.y" /* yacc.c:1646  */
+#line 201 "dtc-parser.y" /* yacc.c:1646  */
     {
 			struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref));
 
@@ -1592,100 +1603,109 @@ yyreduce:
 
 			(yyval.node) = (yyvsp[-3].node);
 		}
-#line 1596 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1607 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 16:
-#line 207 "dtc-parser.y" /* yacc.c:1646  */
+#line 213 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist));
+			/* build empty node */
+			(yyval.node) = name_node(build_node(NULL, NULL), "");
 		}
-#line 1604 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1616 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 17:
-#line 214 "dtc-parser.y" /* yacc.c:1646  */
+#line 221 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.proplist) = NULL;
+			(yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist));
 		}
-#line 1612 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1624 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 18:
-#line 218 "dtc-parser.y" /* yacc.c:1646  */
+#line 228 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist));
+			(yyval.proplist) = NULL;
 		}
-#line 1620 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1632 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 19:
-#line 225 "dtc-parser.y" /* yacc.c:1646  */
+#line 232 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data));
+			(yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist));
 		}
-#line 1628 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1640 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 20:
-#line 229 "dtc-parser.y" /* yacc.c:1646  */
+#line 239 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data);
+			(yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data));
 		}
-#line 1636 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1648 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 21:
-#line 233 "dtc-parser.y" /* yacc.c:1646  */
+#line 243 "dtc-parser.y" /* yacc.c:1646  */
     {
-			(yyval.prop) = build_property_delete((yyvsp[-1].propnodename));
+			(yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data);
 		}
-#line 1644 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1656 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
   case 22:
-#line 237 "dtc-parser.y" /* yacc.c:1646  */
+#line 247 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property_delete((yyvsp[-1].propnodename));
+		}
+#line 1664 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 23:
+#line 251 "dtc-parser.y" /* yacc.c:1646  */
     {
 			add_label(&(yyvsp[0].prop)->labels, (yyvsp[-1].labelref));
 			(yyval.prop) = (yyvsp[0].prop);
 		}
-#line 1653 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1673 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 23:
-#line 245 "dtc-parser.y" /* yacc.c:1646  */
+  case 24:
+#line 259 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_merge((yyvsp[-1].data), (yyvsp[0].data));
 		}
-#line 1661 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1681 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 24:
-#line 249 "dtc-parser.y" /* yacc.c:1646  */
+  case 25:
+#line 263 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_merge((yyvsp[-2].data), (yyvsp[-1].array).data);
 		}
-#line 1669 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1689 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 25:
-#line 253 "dtc-parser.y" /* yacc.c:1646  */
+  case 26:
+#line 267 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_merge((yyvsp[-3].data), (yyvsp[-1].data));
 		}
-#line 1677 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1697 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 26:
-#line 257 "dtc-parser.y" /* yacc.c:1646  */
+  case 27:
+#line 271 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), REF_PATH, (yyvsp[0].labelref));
 		}
-#line 1685 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1705 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 27:
-#line 261 "dtc-parser.y" /* yacc.c:1646  */
+  case 28:
+#line 275 "dtc-parser.y" /* yacc.c:1646  */
     {
 			FILE *f = srcfile_relative_open((yyvsp[-5].data).val, NULL);
 			struct data d;
@@ -1701,11 +1721,11 @@ yyreduce:
 			(yyval.data) = data_merge((yyvsp[-8].data), d);
 			fclose(f);
 		}
-#line 1705 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1725 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 28:
-#line 277 "dtc-parser.y" /* yacc.c:1646  */
+  case 29:
+#line 291 "dtc-parser.y" /* yacc.c:1646  */
     {
 			FILE *f = srcfile_relative_open((yyvsp[-1].data).val, NULL);
 			struct data d = empty_data;
@@ -1715,43 +1735,43 @@ yyreduce:
 			(yyval.data) = data_merge((yyvsp[-4].data), d);
 			fclose(f);
 		}
-#line 1719 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1739 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 29:
-#line 287 "dtc-parser.y" /* yacc.c:1646  */
+  case 30:
+#line 301 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
 		}
-#line 1727 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1747 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 30:
-#line 294 "dtc-parser.y" /* yacc.c:1646  */
+  case 31:
+#line 308 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = empty_data;
 		}
-#line 1735 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1755 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 31:
-#line 298 "dtc-parser.y" /* yacc.c:1646  */
+  case 32:
+#line 312 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = (yyvsp[-1].data);
 		}
-#line 1743 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1763 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 32:
-#line 302 "dtc-parser.y" /* yacc.c:1646  */
+  case 33:
+#line 316 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
 		}
-#line 1751 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1771 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 33:
-#line 309 "dtc-parser.y" /* yacc.c:1646  */
+  case 34:
+#line 323 "dtc-parser.y" /* yacc.c:1646  */
     {
 			unsigned long long bits;
 
@@ -1767,20 +1787,20 @@ yyreduce:
 			(yyval.array).data = empty_data;
 			(yyval.array).bits = bits;
 		}
-#line 1771 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1791 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 34:
-#line 325 "dtc-parser.y" /* yacc.c:1646  */
+  case 35:
+#line 339 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.array).data = empty_data;
 			(yyval.array).bits = 32;
 		}
-#line 1780 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1800 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 35:
-#line 330 "dtc-parser.y" /* yacc.c:1646  */
+  case 36:
+#line 344 "dtc-parser.y" /* yacc.c:1646  */
     {
 			if ((yyvsp[-1].array).bits < 64) {
 				uint64_t mask = (1ULL << (yyvsp[-1].array).bits) - 1;
@@ -1799,11 +1819,11 @@ yyreduce:
 
 			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, (yyvsp[0].integer), (yyvsp[-1].array).bits);
 		}
-#line 1803 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1823 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 36:
-#line 349 "dtc-parser.y" /* yacc.c:1646  */
+  case 37:
+#line 363 "dtc-parser.y" /* yacc.c:1646  */
     {
 			uint64_t val = ~0ULL >> (64 - (yyvsp[-1].array).bits);
 
@@ -1817,129 +1837,129 @@ yyreduce:
 
 			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, val, (yyvsp[-1].array).bits);
 		}
-#line 1821 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1841 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 37:
-#line 363 "dtc-parser.y" /* yacc.c:1646  */
+  case 38:
+#line 377 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.array).data = data_add_marker((yyvsp[-1].array).data, LABEL, (yyvsp[0].labelref));
 		}
-#line 1829 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1849 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 40:
-#line 372 "dtc-parser.y" /* yacc.c:1646  */
+  case 41:
+#line 386 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.integer) = (yyvsp[-1].integer);
 		}
-#line 1837 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1857 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 43:
-#line 383 "dtc-parser.y" /* yacc.c:1646  */
+  case 44:
+#line 397 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-4].integer) ? (yyvsp[-2].integer) : (yyvsp[0].integer); }
-#line 1843 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1863 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 45:
-#line 388 "dtc-parser.y" /* yacc.c:1646  */
+  case 46:
+#line 402 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) || (yyvsp[0].integer); }
-#line 1849 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1869 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 47:
-#line 393 "dtc-parser.y" /* yacc.c:1646  */
+  case 48:
+#line 407 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) && (yyvsp[0].integer); }
-#line 1855 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1875 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 49:
-#line 398 "dtc-parser.y" /* yacc.c:1646  */
+  case 50:
+#line 412 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) | (yyvsp[0].integer); }
-#line 1861 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1881 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 51:
-#line 403 "dtc-parser.y" /* yacc.c:1646  */
+  case 52:
+#line 417 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) ^ (yyvsp[0].integer); }
-#line 1867 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1887 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 53:
-#line 408 "dtc-parser.y" /* yacc.c:1646  */
+  case 54:
+#line 422 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) & (yyvsp[0].integer); }
-#line 1873 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1893 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 55:
-#line 413 "dtc-parser.y" /* yacc.c:1646  */
+  case 56:
+#line 427 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) == (yyvsp[0].integer); }
-#line 1879 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1899 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 56:
-#line 414 "dtc-parser.y" /* yacc.c:1646  */
+  case 57:
+#line 428 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) != (yyvsp[0].integer); }
-#line 1885 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1905 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 58:
-#line 419 "dtc-parser.y" /* yacc.c:1646  */
+  case 59:
+#line 433 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) < (yyvsp[0].integer); }
-#line 1891 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1911 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 59:
-#line 420 "dtc-parser.y" /* yacc.c:1646  */
+  case 60:
+#line 434 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) > (yyvsp[0].integer); }
-#line 1897 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1917 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 60:
-#line 421 "dtc-parser.y" /* yacc.c:1646  */
+  case 61:
+#line 435 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) <= (yyvsp[0].integer); }
-#line 1903 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1923 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 61:
-#line 422 "dtc-parser.y" /* yacc.c:1646  */
+  case 62:
+#line 436 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) >= (yyvsp[0].integer); }
-#line 1909 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1929 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 62:
-#line 426 "dtc-parser.y" /* yacc.c:1646  */
+  case 63:
+#line 440 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) << (yyvsp[0].integer); }
-#line 1915 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1935 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 63:
-#line 427 "dtc-parser.y" /* yacc.c:1646  */
+  case 64:
+#line 441 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) >> (yyvsp[0].integer); }
-#line 1921 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1941 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 65:
-#line 432 "dtc-parser.y" /* yacc.c:1646  */
+  case 66:
+#line 446 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) + (yyvsp[0].integer); }
-#line 1927 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1947 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 66:
-#line 433 "dtc-parser.y" /* yacc.c:1646  */
+  case 67:
+#line 447 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) - (yyvsp[0].integer); }
-#line 1933 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1953 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 68:
-#line 438 "dtc-parser.y" /* yacc.c:1646  */
+  case 69:
+#line 452 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = (yyvsp[-2].integer) * (yyvsp[0].integer); }
-#line 1939 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1959 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 69:
-#line 440 "dtc-parser.y" /* yacc.c:1646  */
+  case 70:
+#line 454 "dtc-parser.y" /* yacc.c:1646  */
     {
 			if ((yyvsp[0].integer) != 0) {
 				(yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer);
@@ -1948,11 +1968,11 @@ yyreduce:
 				(yyval.integer) = 0;
 			}
 		}
-#line 1952 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1972 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 70:
-#line 449 "dtc-parser.y" /* yacc.c:1646  */
+  case 71:
+#line 463 "dtc-parser.y" /* yacc.c:1646  */
     {
 			if ((yyvsp[0].integer) != 0) {
 				(yyval.integer) = (yyvsp[-2].integer) % (yyvsp[0].integer);
@@ -1961,103 +1981,103 @@ yyreduce:
 				(yyval.integer) = 0;
 			}
 		}
-#line 1965 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1985 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 73:
-#line 462 "dtc-parser.y" /* yacc.c:1646  */
+  case 74:
+#line 476 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = -(yyvsp[0].integer); }
-#line 1971 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1991 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 74:
-#line 463 "dtc-parser.y" /* yacc.c:1646  */
+  case 75:
+#line 477 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = ~(yyvsp[0].integer); }
-#line 1977 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 1997 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 75:
-#line 464 "dtc-parser.y" /* yacc.c:1646  */
+  case 76:
+#line 478 "dtc-parser.y" /* yacc.c:1646  */
     { (yyval.integer) = !(yyvsp[0].integer); }
-#line 1983 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2003 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 76:
-#line 469 "dtc-parser.y" /* yacc.c:1646  */
+  case 77:
+#line 483 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = empty_data;
 		}
-#line 1991 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2011 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 77:
-#line 473 "dtc-parser.y" /* yacc.c:1646  */
+  case 78:
+#line 487 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_append_byte((yyvsp[-1].data), (yyvsp[0].byte));
 		}
-#line 1999 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2019 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 78:
-#line 477 "dtc-parser.y" /* yacc.c:1646  */
+  case 79:
+#line 491 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
 		}
-#line 2007 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2027 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 79:
-#line 484 "dtc-parser.y" /* yacc.c:1646  */
+  case 80:
+#line 498 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.nodelist) = NULL;
 		}
-#line 2015 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2035 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 80:
-#line 488 "dtc-parser.y" /* yacc.c:1646  */
+  case 81:
+#line 502 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.nodelist) = chain_node((yyvsp[-1].node), (yyvsp[0].nodelist));
 		}
-#line 2023 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2043 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 81:
-#line 492 "dtc-parser.y" /* yacc.c:1646  */
+  case 82:
+#line 506 "dtc-parser.y" /* yacc.c:1646  */
     {
 			ERROR(&(yylsp[0]), "Properties must precede subnodes");
 			YYERROR;
 		}
-#line 2032 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2052 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 82:
-#line 500 "dtc-parser.y" /* yacc.c:1646  */
+  case 83:
+#line 514 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.node) = name_node((yyvsp[0].node), (yyvsp[-1].propnodename));
 		}
-#line 2040 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2060 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 83:
-#line 504 "dtc-parser.y" /* yacc.c:1646  */
+  case 84:
+#line 518 "dtc-parser.y" /* yacc.c:1646  */
     {
 			(yyval.node) = name_node(build_node_delete(), (yyvsp[-1].propnodename));
 		}
-#line 2048 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2068 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
-  case 84:
-#line 508 "dtc-parser.y" /* yacc.c:1646  */
+  case 85:
+#line 522 "dtc-parser.y" /* yacc.c:1646  */
     {
 			add_label(&(yyvsp[0].node)->labels, (yyvsp[-1].labelref));
 			(yyval.node) = (yyvsp[0].node);
 		}
-#line 2057 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2077 "dtc-parser.tab.c" /* yacc.c:1646  */
     break;
 
 
-#line 2061 "dtc-parser.tab.c" /* yacc.c:1646  */
+#line 2081 "dtc-parser.tab.c" /* yacc.c:1646  */
       default: break;
     }
   /* User semantic actions sometimes alter yychar, and that requires
@@ -2292,7 +2312,7 @@ yyreturn:
 #endif
   return yyresult;
 }
-#line 514 "dtc-parser.y" /* yacc.c:1906  */
+#line 528 "dtc-parser.y" /* yacc.c:1906  */
 
 
 void yyerror(char const *s)
diff --git a/scripts/dtc/dtc-parser.tab.h_shipped b/scripts/dtc/dtc-parser.tab.h_shipped
index e7b04dd016..6aa512c1b3 100644
--- a/scripts/dtc/dtc-parser.tab.h_shipped
+++ b/scripts/dtc/dtc-parser.tab.h_shipped
@@ -1,8 +1,8 @@
-/* A Bison parser, made by GNU Bison 3.0.2.  */
+/* A Bison parser, made by GNU Bison 3.0.4.  */
 
 /* Bison interface for Yacc-like parsers in C
 
-   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+   Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc.
 
    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -72,7 +72,7 @@ extern int yydebug;
 
 /* Value type.  */
 #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
-typedef union YYSTYPE YYSTYPE;
+
 union YYSTYPE
 {
 #line 39 "dtc-parser.y" /* yacc.c:1909  */
@@ -97,6 +97,8 @@ union YYSTYPE
 
 #line 99 "dtc-parser.tab.h" /* yacc.c:1909  */
 };
+
+typedef union YYSTYPE YYSTYPE;
 # define YYSTYPE_IS_TRIVIAL 1
 # define YYSTYPE_IS_DECLARED 1
 #endif
diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y
index ca3f500342..affc81a8f9 100644
--- a/scripts/dtc/dtc-parser.y
+++ b/scripts/dtc/dtc-parser.y
@@ -182,10 +182,19 @@ devicetree:
 		{
 			struct node *target = get_node_by_ref($1, $2);
 
-			if (target)
+			if (target) {
 				merge_nodes(target, $3);
-			else
-				ERROR(&@2, "Label or path %s not found", $2);
+			} else {
+				/*
+				 * We rely on the rule being always:
+				 *   versioninfo plugindecl memreserves devicetree
+				 * so $-1 is what we want (plugindecl)
+				 */
+				if ($<flags>-1 & DTSF_PLUGIN)
+					add_orphan_node($1, $3, $2);
+				else
+					ERROR(&@2, "Label or path %s not found", $2);
+			}
 			$$ = $1;
 		}
 	| devicetree DT_DEL_NODE DT_REF ';'
@@ -200,6 +209,11 @@ devicetree:
 
 			$$ = $1;
 		}
+	| /* empty */
+		{
+			/* build empty node */
+			$$ = name_node(build_node(NULL, NULL), "");
+		}
 	;
 
 nodedef:
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
index 409db76c94..35cf926cc1 100644
--- a/scripts/dtc/dtc.h
+++ b/scripts/dtc/dtc.h
@@ -203,6 +203,7 @@ struct node *build_node_delete(void);
 struct node *name_node(struct node *node, char *name);
 struct node *chain_node(struct node *first, struct node *list);
 struct node *merge_nodes(struct node *old_node, struct node *new_node);
+void add_orphan_node(struct node *old_node, struct node *new_node, char *ref);
 
 void add_property(struct node *node, struct property *prop);
 void delete_property_by_name(struct node *node, char *name);
@@ -216,6 +217,7 @@ void append_to_property(struct node *node,
 const char *get_unitname(struct node *node);
 struct property *get_property(struct node *node, const char *propname);
 cell_t propval_cell(struct property *prop);
+cell_t propval_cell_n(struct property *prop, int n);
 struct property *get_property_by_label(struct node *tree, const char *label,
 				       struct node **node);
 struct marker *get_marker_label(struct node *tree, const char *label,
diff --git a/scripts/dtc/libfdt/fdt_addresses.c b/scripts/dtc/libfdt/fdt_addresses.c
new file mode 100644
index 0000000000..eff4dbcc72
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_addresses.c
@@ -0,0 +1,96 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2014 David Gibson <david@gibson.dropbear.id.au>
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_address_cells(const void *fdt, int nodeoffset)
+{
+	const fdt32_t *ac;
+	int val;
+	int len;
+
+	ac = fdt_getprop(fdt, nodeoffset, "#address-cells", &len);
+	if (!ac)
+		return 2;
+
+	if (len != sizeof(*ac))
+		return -FDT_ERR_BADNCELLS;
+
+	val = fdt32_to_cpu(*ac);
+	if ((val <= 0) || (val > FDT_MAX_NCELLS))
+		return -FDT_ERR_BADNCELLS;
+
+	return val;
+}
+
+int fdt_size_cells(const void *fdt, int nodeoffset)
+{
+	const fdt32_t *sc;
+	int val;
+	int len;
+
+	sc = fdt_getprop(fdt, nodeoffset, "#size-cells", &len);
+	if (!sc)
+		return 2;
+
+	if (len != sizeof(*sc))
+		return -FDT_ERR_BADNCELLS;
+
+	val = fdt32_to_cpu(*sc);
+	if ((val < 0) || (val > FDT_MAX_NCELLS))
+		return -FDT_ERR_BADNCELLS;
+
+	return val;
+}
diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c
new file mode 100644
index 0000000000..bd81241e66
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_overlay.c
@@ -0,0 +1,861 @@
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+/**
+ * overlay_get_target_phandle - retrieves the target phandle of a fragment
+ * @fdto: pointer to the device tree overlay blob
+ * @fragment: node offset of the fragment in the overlay
+ *
+ * overlay_get_target_phandle() retrieves the target phandle of an
+ * overlay fragment when that fragment uses a phandle (target
+ * property) instead of a path (target-path property).
+ *
+ * returns:
+ *      the phandle pointed by the target property
+ *      0, if the phandle was not found
+ *	-1, if the phandle was malformed
+ */
+static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
+{
+	const fdt32_t *val;
+	int len;
+
+	val = fdt_getprop(fdto, fragment, "target", &len);
+	if (!val)
+		return 0;
+
+	if ((len != sizeof(*val)) || (fdt32_to_cpu(*val) == (uint32_t)-1))
+		return (uint32_t)-1;
+
+	return fdt32_to_cpu(*val);
+}
+
+/**
+ * overlay_get_target - retrieves the offset of a fragment's target
+ * @fdt: Base device tree blob
+ * @fdto: Device tree overlay blob
+ * @fragment: node offset of the fragment in the overlay
+ * @pathp: pointer which receives the path of the target (or NULL)
+ *
+ * overlay_get_target() retrieves the target offset in the base
+ * device tree of a fragment, no matter how the actual targetting is
+ * done (through a phandle or a path)
+ *
+ * returns:
+ *      the targetted node offset in the base device tree
+ *      Negative error code on error
+ */
+static int overlay_get_target(const void *fdt, const void *fdto,
+			      int fragment, char const **pathp)
+{
+	uint32_t phandle;
+	const char *path = NULL;
+	int path_len = 0, ret;
+
+	/* Try first to do a phandle based lookup */
+	phandle = overlay_get_target_phandle(fdto, fragment);
+	if (phandle == (uint32_t)-1)
+		return -FDT_ERR_BADPHANDLE;
+
+	/* no phandle, try path */
+	if (!phandle) {
+		/* And then a path based lookup */
+		path = fdt_getprop(fdto, fragment, "target-path", &path_len);
+		if (path)
+			ret = fdt_path_offset(fdt, path);
+		else
+			ret = path_len;
+	} else
+		ret = fdt_node_offset_by_phandle(fdt, phandle);
+
+	/*
+	* If we haven't found either a target or a
+	* target-path property in a node that contains a
+	* __overlay__ subnode (we wouldn't be called
+	* otherwise), consider it a improperly written
+	* overlay
+	*/
+	if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
+		ret = -FDT_ERR_BADOVERLAY;
+
+	/* return on error */
+	if (ret < 0)
+		return ret;
+
+	/* return pointer to path (if available) */
+	if (pathp)
+		*pathp = path ? path : NULL;
+
+	return ret;
+}
+
+/**
+ * overlay_phandle_add_offset - Increases a phandle by an offset
+ * @fdt: Base device tree blob
+ * @node: Device tree overlay blob
+ * @name: Name of the property to modify (phandle or linux,phandle)
+ * @delta: offset to apply
+ *
+ * overlay_phandle_add_offset() increments a node phandle by a given
+ * offset.
+ *
+ * returns:
+ *      0 on success.
+ *      Negative error code on error
+ */
+static int overlay_phandle_add_offset(void *fdt, int node,
+				      const char *name, uint32_t delta)
+{
+	const fdt32_t *val;
+	uint32_t adj_val;
+	int len;
+
+	val = fdt_getprop(fdt, node, name, &len);
+	if (!val)
+		return len;
+
+	if (len != sizeof(*val))
+		return -FDT_ERR_BADPHANDLE;
+
+	adj_val = fdt32_to_cpu(*val);
+	if ((adj_val + delta) < adj_val)
+		return -FDT_ERR_NOPHANDLES;
+
+	adj_val += delta;
+	if (adj_val == (uint32_t)-1)
+		return -FDT_ERR_NOPHANDLES;
+
+	return fdt_setprop_inplace_u32(fdt, node, name, adj_val);
+}
+
+/**
+ * overlay_adjust_node_phandles - Offsets the phandles of a node
+ * @fdto: Device tree overlay blob
+ * @node: Offset of the node we want to adjust
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_adjust_node_phandles() adds a constant to all the phandles
+ * of a given node. This is mainly use as part of the overlay
+ * application process, when we want to update all the overlay
+ * phandles to not conflict with the overlays of the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_adjust_node_phandles(void *fdto, int node,
+					uint32_t delta)
+{
+	int child;
+	int ret;
+
+	ret = overlay_phandle_add_offset(fdto, node, "phandle", delta);
+	if (ret && ret != -FDT_ERR_NOTFOUND)
+		return ret;
+
+	ret = overlay_phandle_add_offset(fdto, node, "linux,phandle", delta);
+	if (ret && ret != -FDT_ERR_NOTFOUND)
+		return ret;
+
+	fdt_for_each_subnode(child, fdto, node) {
+		ret = overlay_adjust_node_phandles(fdto, child, delta);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_adjust_local_phandles - Adjust the phandles of a whole overlay
+ * @fdto: Device tree overlay blob
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_adjust_local_phandles() adds a constant to all the
+ * phandles of an overlay. This is mainly use as part of the overlay
+ * application process, when we want to update all the overlay
+ * phandles to not conflict with the overlays of the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_adjust_local_phandles(void *fdto, uint32_t delta)
+{
+	/*
+	 * Start adjusting the phandles from the overlay root
+	 */
+	return overlay_adjust_node_phandles(fdto, 0, delta);
+}
+
+/**
+ * overlay_update_local_node_references - Adjust the overlay references
+ * @fdto: Device tree overlay blob
+ * @tree_node: Node offset of the node to operate on
+ * @fixup_node: Node offset of the matching local fixups node
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_update_local_nodes_references() update the phandles
+ * pointing to a node within the device tree overlay by adding a
+ * constant delta.
+ *
+ * This is mainly used as part of a device tree application process,
+ * where you want the device tree overlays phandles to not conflict
+ * with the ones from the base device tree before merging them.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_update_local_node_references(void *fdto,
+						int tree_node,
+						int fixup_node,
+						uint32_t delta)
+{
+	int fixup_prop;
+	int fixup_child;
+	int ret;
+
+	fdt_for_each_property_offset(fixup_prop, fdto, fixup_node) {
+		const fdt32_t *fixup_val;
+		const char *tree_val;
+		const char *name;
+		int fixup_len;
+		int tree_len;
+		int i;
+
+		fixup_val = fdt_getprop_by_offset(fdto, fixup_prop,
+						  &name, &fixup_len);
+		if (!fixup_val)
+			return fixup_len;
+
+		if (fixup_len % sizeof(uint32_t))
+			return -FDT_ERR_BADOVERLAY;
+
+		tree_val = fdt_getprop(fdto, tree_node, name, &tree_len);
+		if (!tree_val) {
+			if (tree_len == -FDT_ERR_NOTFOUND)
+				return -FDT_ERR_BADOVERLAY;
+
+			return tree_len;
+		}
+
+		for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) {
+			fdt32_t adj_val;
+			uint32_t poffset;
+
+			poffset = fdt32_to_cpu(fixup_val[i]);
+
+			/*
+			 * phandles to fixup can be unaligned.
+			 *
+			 * Use a memcpy for the architectures that do
+			 * not support unaligned accesses.
+			 */
+			memcpy(&adj_val, tree_val + poffset, sizeof(adj_val));
+
+			adj_val = cpu_to_fdt32(fdt32_to_cpu(adj_val) + delta);
+
+			ret = fdt_setprop_inplace_namelen_partial(fdto,
+								  tree_node,
+								  name,
+								  strlen(name),
+								  poffset,
+								  &adj_val,
+								  sizeof(adj_val));
+			if (ret == -FDT_ERR_NOSPACE)
+				return -FDT_ERR_BADOVERLAY;
+
+			if (ret)
+				return ret;
+		}
+	}
+
+	fdt_for_each_subnode(fixup_child, fdto, fixup_node) {
+		const char *fixup_child_name = fdt_get_name(fdto, fixup_child,
+							    NULL);
+		int tree_child;
+
+		tree_child = fdt_subnode_offset(fdto, tree_node,
+						fixup_child_name);
+		if (tree_child == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_BADOVERLAY;
+		if (tree_child < 0)
+			return tree_child;
+
+		ret = overlay_update_local_node_references(fdto,
+							   tree_child,
+							   fixup_child,
+							   delta);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_update_local_references - Adjust the overlay references
+ * @fdto: Device tree overlay blob
+ * @delta: Offset to shift the phandles of
+ *
+ * overlay_update_local_references() update all the phandles pointing
+ * to a node within the device tree overlay by adding a constant
+ * delta to not conflict with the base overlay.
+ *
+ * This is mainly used as part of a device tree application process,
+ * where you want the device tree overlays phandles to not conflict
+ * with the ones from the base device tree before merging them.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_update_local_references(void *fdto, uint32_t delta)
+{
+	int fixups;
+
+	fixups = fdt_path_offset(fdto, "/__local_fixups__");
+	if (fixups < 0) {
+		/* There's no local phandles to adjust, bail out */
+		if (fixups == -FDT_ERR_NOTFOUND)
+			return 0;
+
+		return fixups;
+	}
+
+	/*
+	 * Update our local references from the root of the tree
+	 */
+	return overlay_update_local_node_references(fdto, 0, fixups,
+						    delta);
+}
+
+/**
+ * overlay_fixup_one_phandle - Set an overlay phandle to the base one
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ * @symbols_off: Node offset of the symbols node in the base device tree
+ * @path: Path to a node holding a phandle in the overlay
+ * @path_len: number of path characters to consider
+ * @name: Name of the property holding the phandle reference in the overlay
+ * @name_len: number of name characters to consider
+ * @poffset: Offset within the overlay property where the phandle is stored
+ * @label: Label of the node referenced by the phandle
+ *
+ * overlay_fixup_one_phandle() resolves an overlay phandle pointing to
+ * a node in the base device tree.
+ *
+ * This is part of the device tree overlay application process, when
+ * you want all the phandles in the overlay to point to the actual
+ * base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_one_phandle(void *fdt, void *fdto,
+				     int symbols_off,
+				     const char *path, uint32_t path_len,
+				     const char *name, uint32_t name_len,
+				     int poffset, const char *label)
+{
+	const char *symbol_path;
+	uint32_t phandle;
+	fdt32_t phandle_prop;
+	int symbol_off, fixup_off;
+	int prop_len;
+
+	if (symbols_off < 0)
+		return symbols_off;
+
+	symbol_path = fdt_getprop(fdt, symbols_off, label,
+				  &prop_len);
+	if (!symbol_path)
+		return prop_len;
+
+	symbol_off = fdt_path_offset(fdt, symbol_path);
+	if (symbol_off < 0)
+		return symbol_off;
+
+	phandle = fdt_get_phandle(fdt, symbol_off);
+	if (!phandle)
+		return -FDT_ERR_NOTFOUND;
+
+	fixup_off = fdt_path_offset_namelen(fdto, path, path_len);
+	if (fixup_off == -FDT_ERR_NOTFOUND)
+		return -FDT_ERR_BADOVERLAY;
+	if (fixup_off < 0)
+		return fixup_off;
+
+	phandle_prop = cpu_to_fdt32(phandle);
+	return fdt_setprop_inplace_namelen_partial(fdto, fixup_off,
+						   name, name_len, poffset,
+						   &phandle_prop,
+						   sizeof(phandle_prop));
+};
+
+/**
+ * overlay_fixup_phandle - Set an overlay phandle to the base one
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ * @symbols_off: Node offset of the symbols node in the base device tree
+ * @property: Property offset in the overlay holding the list of fixups
+ *
+ * overlay_fixup_phandle() resolves all the overlay phandles pointed
+ * to in a __fixups__ property, and updates them to match the phandles
+ * in use in the base device tree.
+ *
+ * This is part of the device tree overlay application process, when
+ * you want all the phandles in the overlay to point to the actual
+ * base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_phandle(void *fdt, void *fdto, int symbols_off,
+				 int property)
+{
+	const char *value;
+	const char *label;
+	int len;
+
+	value = fdt_getprop_by_offset(fdto, property,
+				      &label, &len);
+	if (!value) {
+		if (len == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_INTERNAL;
+
+		return len;
+	}
+
+	do {
+		const char *path, *name, *fixup_end;
+		const char *fixup_str = value;
+		uint32_t path_len, name_len;
+		uint32_t fixup_len;
+		char *sep, *endptr;
+		int poffset, ret;
+
+		fixup_end = memchr(value, '\0', len);
+		if (!fixup_end)
+			return -FDT_ERR_BADOVERLAY;
+		fixup_len = fixup_end - fixup_str;
+
+		len -= fixup_len + 1;
+		value += fixup_len + 1;
+
+		path = fixup_str;
+		sep = memchr(fixup_str, ':', fixup_len);
+		if (!sep || *sep != ':')
+			return -FDT_ERR_BADOVERLAY;
+
+		path_len = sep - path;
+		if (path_len == (fixup_len - 1))
+			return -FDT_ERR_BADOVERLAY;
+
+		fixup_len -= path_len + 1;
+		name = sep + 1;
+		sep = memchr(name, ':', fixup_len);
+		if (!sep || *sep != ':')
+			return -FDT_ERR_BADOVERLAY;
+
+		name_len = sep - name;
+		if (!name_len)
+			return -FDT_ERR_BADOVERLAY;
+
+		poffset = strtoul(sep + 1, &endptr, 10);
+		if ((*endptr != '\0') || (endptr <= (sep + 1)))
+			return -FDT_ERR_BADOVERLAY;
+
+		ret = overlay_fixup_one_phandle(fdt, fdto, symbols_off,
+						path, path_len, name, name_len,
+						poffset, label);
+		if (ret)
+			return ret;
+	} while (len > 0);
+
+	return 0;
+}
+
+/**
+ * overlay_fixup_phandles - Resolve the overlay phandles to the base
+ *                          device tree
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_fixup_phandles() resolves all the overlay phandles pointing
+ * to nodes in the base device tree.
+ *
+ * This is one of the steps of the device tree overlay application
+ * process, when you want all the phandles in the overlay to point to
+ * the actual base dt nodes.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_fixup_phandles(void *fdt, void *fdto)
+{
+	int fixups_off, symbols_off;
+	int property;
+
+	/* We can have overlays without any fixups */
+	fixups_off = fdt_path_offset(fdto, "/__fixups__");
+	if (fixups_off == -FDT_ERR_NOTFOUND)
+		return 0; /* nothing to do */
+	if (fixups_off < 0)
+		return fixups_off;
+
+	/* And base DTs without symbols */
+	symbols_off = fdt_path_offset(fdt, "/__symbols__");
+	if ((symbols_off < 0 && (symbols_off != -FDT_ERR_NOTFOUND)))
+		return symbols_off;
+
+	fdt_for_each_property_offset(property, fdto, fixups_off) {
+		int ret;
+
+		ret = overlay_fixup_phandle(fdt, fdto, symbols_off, property);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_apply_node - Merges a node into the base device tree
+ * @fdt: Base Device Tree blob
+ * @target: Node offset in the base device tree to apply the fragment to
+ * @fdto: Device tree overlay blob
+ * @node: Node offset in the overlay holding the changes to merge
+ *
+ * overlay_apply_node() merges a node into a target base device tree
+ * node pointed.
+ *
+ * This is part of the final step in the device tree overlay
+ * application process, when all the phandles have been adjusted and
+ * resolved and you just have to merge overlay into the base device
+ * tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_apply_node(void *fdt, int target,
+			      void *fdto, int node)
+{
+	int property;
+	int subnode;
+
+	fdt_for_each_property_offset(property, fdto, node) {
+		const char *name;
+		const void *prop;
+		int prop_len;
+		int ret;
+
+		prop = fdt_getprop_by_offset(fdto, property, &name,
+					     &prop_len);
+		if (prop_len == -FDT_ERR_NOTFOUND)
+			return -FDT_ERR_INTERNAL;
+		if (prop_len < 0)
+			return prop_len;
+
+		ret = fdt_setprop(fdt, target, name, prop, prop_len);
+		if (ret)
+			return ret;
+	}
+
+	fdt_for_each_subnode(subnode, fdto, node) {
+		const char *name = fdt_get_name(fdto, subnode, NULL);
+		int nnode;
+		int ret;
+
+		nnode = fdt_add_subnode(fdt, target, name);
+		if (nnode == -FDT_ERR_EXISTS) {
+			nnode = fdt_subnode_offset(fdt, target, name);
+			if (nnode == -FDT_ERR_NOTFOUND)
+				return -FDT_ERR_INTERNAL;
+		}
+
+		if (nnode < 0)
+			return nnode;
+
+		ret = overlay_apply_node(fdt, nnode, fdto, subnode);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+/**
+ * overlay_merge - Merge an overlay into its base device tree
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_merge() merges an overlay into its base device tree.
+ *
+ * This is the next to last step in the device tree overlay application
+ * process, when all the phandles have been adjusted and resolved and
+ * you just have to merge overlay into the base device tree.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_merge(void *fdt, void *fdto)
+{
+	int fragment;
+
+	fdt_for_each_subnode(fragment, fdto, 0) {
+		int overlay;
+		int target;
+		int ret;
+
+		/*
+		 * Each fragments will have an __overlay__ node. If
+		 * they don't, it's not supposed to be merged
+		 */
+		overlay = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (overlay == -FDT_ERR_NOTFOUND)
+			continue;
+
+		if (overlay < 0)
+			return overlay;
+
+		target = overlay_get_target(fdt, fdto, fragment, NULL);
+		if (target < 0)
+			return target;
+
+		ret = overlay_apply_node(fdt, target, fdto, overlay);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int get_path_len(const void *fdt, int nodeoffset)
+{
+	int len = 0, namelen;
+	const char *name;
+
+	FDT_CHECK_HEADER(fdt);
+
+	for (;;) {
+		name = fdt_get_name(fdt, nodeoffset, &namelen);
+		if (!name)
+			return namelen;
+
+		/* root? we're done */
+		if (namelen == 0)
+			break;
+
+		nodeoffset = fdt_parent_offset(fdt, nodeoffset);
+		if (nodeoffset < 0)
+			return nodeoffset;
+		len += namelen + 1;
+	}
+
+	/* in case of root pretend it's "/" */
+	if (len == 0)
+		len++;
+	return len;
+}
+
+/**
+ * overlay_symbol_update - Update the symbols of base tree after a merge
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_symbol_update() updates the symbols of the base tree with the
+ * symbols of the applied overlay
+ *
+ * This is the last step in the device tree overlay application
+ * process, allowing the reference of overlay symbols by subsequent
+ * overlay operations.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_symbol_update(void *fdt, void *fdto)
+{
+	int root_sym, ov_sym, prop, path_len, fragment, target;
+	int len, frag_name_len, ret, rel_path_len;
+	const char *s, *e;
+	const char *path;
+	const char *name;
+	const char *frag_name;
+	const char *rel_path;
+	const char *target_path;
+	char *buf;
+	void *p;
+
+	ov_sym = fdt_subnode_offset(fdto, 0, "__symbols__");
+
+	/* if no overlay symbols exist no problem */
+	if (ov_sym < 0)
+		return 0;
+
+	root_sym = fdt_subnode_offset(fdt, 0, "__symbols__");
+
+	/* it no root symbols exist we should create them */
+	if (root_sym == -FDT_ERR_NOTFOUND)
+		root_sym = fdt_add_subnode(fdt, 0, "__symbols__");
+
+	/* any error is fatal now */
+	if (root_sym < 0)
+		return root_sym;
+
+	/* iterate over each overlay symbol */
+	fdt_for_each_property_offset(prop, fdto, ov_sym) {
+		path = fdt_getprop_by_offset(fdto, prop, &name, &path_len);
+		if (!path)
+			return path_len;
+
+		/* verify it's a string property (terminated by a single \0) */
+		if (path_len < 1 || memchr(path, '\0', path_len) != &path[path_len - 1])
+			return -FDT_ERR_BADVALUE;
+
+		/* keep end marker to avoid strlen() */
+		e = path + path_len;
+
+		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
+
+		if (*path != '/')
+			return -FDT_ERR_BADVALUE;
+
+		/* get fragment name first */
+		s = strchr(path + 1, '/');
+		if (!s)
+			return -FDT_ERR_BADOVERLAY;
+
+		frag_name = path + 1;
+		frag_name_len = s - path - 1;
+
+		/* verify format; safe since "s" lies in \0 terminated prop */
+		len = sizeof("/__overlay__/") - 1;
+		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
+			return -FDT_ERR_BADOVERLAY;
+
+		rel_path = s + len;
+		rel_path_len = e - rel_path;
+
+		/* find the fragment index in which the symbol lies */
+		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
+					       frag_name_len);
+		/* not found? */
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+		fragment = ret;
+
+		/* an __overlay__ subnode must exist */
+		ret = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+
+		/* get the target of the fragment */
+		ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+		if (ret < 0)
+			return ret;
+		target = ret;
+
+		/* if we have a target path use */
+		if (!target_path) {
+			ret = get_path_len(fdt, target);
+			if (ret < 0)
+				return ret;
+			len = ret;
+		} else {
+			len = strlen(target_path);
+		}
+
+		ret = fdt_setprop_placeholder(fdt, root_sym, name,
+				len + (len > 1) + rel_path_len + 1, &p);
+		if (ret < 0)
+			return ret;
+
+		if (!target_path) {
+			/* again in case setprop_placeholder changed it */
+			ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+			if (ret < 0)
+				return ret;
+			target = ret;
+		}
+
+		buf = p;
+		if (len > 1) { /* target is not root */
+			if (!target_path) {
+				ret = fdt_get_path(fdt, target, buf, len + 1);
+				if (ret < 0)
+					return ret;
+			} else
+				memcpy(buf, target_path, len + 1);
+
+		} else
+			len--;
+
+		buf[len] = '/';
+		memcpy(buf + len + 1, rel_path, rel_path_len);
+		buf[len + 1 + rel_path_len] = '\0';
+	}
+
+	return 0;
+}
+
+int fdt_overlay_apply(void *fdt, void *fdto)
+{
+	uint32_t delta = fdt_get_max_phandle(fdt);
+	int ret;
+
+	FDT_CHECK_HEADER(fdt);
+	FDT_CHECK_HEADER(fdto);
+
+	ret = overlay_adjust_local_phandles(fdto, delta);
+	if (ret)
+		goto err;
+
+	ret = overlay_update_local_references(fdto, delta);
+	if (ret)
+		goto err;
+
+	ret = overlay_fixup_phandles(fdt, fdto);
+	if (ret)
+		goto err;
+
+	ret = overlay_merge(fdt, fdto);
+	if (ret)
+		goto err;
+
+	ret = overlay_symbol_update(fdt, fdto);
+	if (ret)
+		goto err;
+
+	/*
+	 * The overlay has been damaged, erase its magic.
+	 */
+	fdt_set_magic(fdto, ~0);
+
+	return 0;
+
+err:
+	/*
+	 * The overlay might have been damaged, erase its magic.
+	 */
+	fdt_set_magic(fdto, ~0);
+
+	/*
+	 * The base device tree might have been damaged, erase its
+	 * magic.
+	 */
+	fdt_set_magic(fdt, ~0);
+
+	return ret;
+}
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index aecd27875f..6846ad2fd6 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -216,6 +216,28 @@ struct node *merge_nodes(struct node *old_node, struct node *new_node)
 	return old_node;
 }
 
+void add_orphan_node(struct node *dt, struct node *new_node, char *ref)
+{
+	static unsigned int next_orphan_fragment = 0;
+	struct node *node;
+	struct property *p;
+	struct data d = empty_data;
+	char *name;
+
+	d = data_add_marker(d, REF_PHANDLE, ref);
+	d = data_append_integer(d, 0xffffffff, 32);
+
+	p = build_property("target", d);
+
+	xasprintf(&name, "fragment@%u",
+			next_orphan_fragment++);
+	name_node(new_node, "__overlay__");
+	node = build_node(p, new_node);
+	name_node(node, name);
+
+	add_child(dt, node);
+}
+
 struct node *chain_node(struct node *first, struct node *list)
 {
 	assert(first->next_sibling == NULL);
@@ -396,6 +418,12 @@ cell_t propval_cell(struct property *prop)
 	return fdt32_to_cpu(*((fdt32_t *)prop->val.val));
 }
 
+cell_t propval_cell_n(struct property *prop, int n)
+{
+	assert(prop->val.len / sizeof(cell_t) >= n);
+	return fdt32_to_cpu(*((fdt32_t *)prop->val.val + n));
+}
+
 struct property *get_property_by_label(struct node *tree, const char *label,
 				       struct node **node)
 {
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
index b5ed715ecc..d88393cab1 100644
--- a/scripts/dtc/version_gen.h
+++ b/scripts/dtc/version_gen.h
@@ -1 +1 @@
-#define DTC_VERSION "DTC 1.4.4-gfe50bd1e"
+#define DTC_VERSION "DTC 1.4.5-gb1a60033"

commit b7638540ee9cddd54bd6d038d26a4d80e08a85e0
Author: Rob Herring <robh@kernel.org>
Date:   Tue Oct 17 13:42:41 2017 +0900

    UPSTREAM: scripts/dtc: add fdt_overlay.c and fdt_addresses.c to sync script
    
    libfdt has gained some new files. We need to include them in the
    kernel's copy.
    
    Change-Id: Ie2524f28391c57f5b3ac86d72e93b94e89ea7347
    Reported-by: Kyle Yan <kyan@codeaurora.org>
    Signed-off-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    [ Linux commit: 4322323058f010274564006d61945187a15b6361 ]
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0d8216182388a5e485aa84b3175ea87d8f9b57c5)

diff --git a/scripts/dtc/update-dtc-source.sh b/scripts/dtc/update-dtc-source.sh
index b8ebcc6722..f3e5c59605 100755
--- a/scripts/dtc/update-dtc-source.sh
+++ b/scripts/dtc/update-dtc-source.sh
@@ -34,7 +34,9 @@ DTC_SOURCE="checks.c data.c dtc.c dtc.h flattree.c fstree.c livetree.c srcpos.c
 		srcpos.h treesource.c util.c util.h version_gen.h Makefile.dtc \
 		dtc-lexer.l dtc-parser.y"
 DTC_GENERATED="dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h"
-LIBFDT_SOURCE="Makefile.libfdt fdt.c fdt.h fdt_empty_tree.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h"
+LIBFDT_SOURCE="Makefile.libfdt fdt.c fdt.h fdt_addresses.c fdt_empty_tree.c \
+		fdt_overlay.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c \
+		fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h"
 
 get_last_dtc_version() {
 	git log --oneline scripts/dtc/ | grep 'upstream' | head -1 | sed -e 's/^.* \(.*\)/\1/'

commit 726c9bee546e77897a0e4fb23a6622d2bf55c23f
Author: André Draszik <adraszik@tycoint.com>
Date:   Tue Oct 3 16:55:51 2017 +0100

    UPSTREAM: tpm: fix reading of permanent flags
    
    The offset of the permanent flags structure is in a different
    place in the response compared to what the code is doing,
    which gives us a completely useless result.
    
    Fix by replacing hand-crafted code with generic parser
    infrastructure.
    
    Change-Id: I29e8e1ec7c8ae04d2bf9815290064a54a68c2b88
    Signed-off-by: André Draszik <adraszik@tycoint.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e8155dfe33eb2b3e538e8717d6578c1d08651454)

diff --git a/lib/tpm.c b/lib/tpm.c
index d1cf5a8a16..5659fa5e18 100644
--- a/lib/tpm.c
+++ b/lib/tpm.c
@@ -607,14 +607,24 @@ uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags)
 		0x0, 0x0, 0x0, 0x4,	/* subcap size */
 		0x0, 0x0, 0x1, 0x8,	/* subcap value */
 	};
+	const size_t data_size_offset = TPM_HEADER_SIZE;
+	const size_t data_offset = TPM_HEADER_SIZE + sizeof (uint32_t);
 	uint8_t response[COMMAND_BUFFER_SIZE];
 	size_t response_length = sizeof(response);
 	uint32_t err;
+	uint32_t data_size;
 
 	err = tpm_sendrecv_command(command, response, &response_length);
 	if (err)
 		return err;
-	memcpy(pflags, response + TPM_HEADER_SIZE, sizeof(*pflags));
+	if (unpack_byte_string(response, response_length, "d",
+			       data_size_offset, &data_size))
+		return TPM_LIB_ERROR;
+	if (data_size < sizeof(*pflags))
+		return TPM_LIB_ERROR;
+	if (unpack_byte_string(response, response_length, "s",
+			       data_offset, pflags, sizeof(*pflags)))
+		return TPM_LIB_ERROR;
 
 	return 0;
 }

commit 75ee777bcdfcf1cd0e96036a6f50f0811675a36e
Author: André Draszik <adraszik@tycoint.com>
Date:   Tue Oct 3 16:55:50 2017 +0100

    UPSTREAM: SPL: fix printing of image name
    
    The maximum length of the name of the image is
    obviously not sizeof(), which is just the
    length of a pointer, but IH_NMLEN.
    
    fixes: 62cf11c0921a90c6bd62344f4bc069668e6c698c
    ("SPL: Limit image name print length")
    
    Change-Id: I948dee1b9a4e1ddfbb122475e2d209cc26dec9d0
    Signed-off-by: André Draszik <adraszik@tycoint.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3fe3839acc4a5d9b1af9b2ab3884b0d3f2e23370)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 057d3aa140..0b5b1a9a33 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -154,7 +154,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 		spl_image->os = image_get_os(header);
 		spl_image->name = image_get_name(header);
 		debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n",
-			(int)sizeof(spl_image->name), spl_image->name,
+			IH_NMLEN, spl_image->name,
 			spl_image->load_addr, spl_image->size);
 #else
 		/* LEGACY image not supported */

commit 1abc22cc20b3ae35876bf013c8b84304a5fc249a
Author: Simon Glass <sjg@chromium.org>
Date:   Thu Sep 28 06:35:15 2017 -0600

    UPSTREAM: dm: core: Correct address cast in dev_read_addr_ptr()
    
    This currently causes a warning in sandbox and will not do the right
    thing:
    
    drivers/core/read.c: In function ‘dev_read_addr_ptr’:
    drivers/core/read.c:64:44: warning: cast to pointer from integer of
            different size [-Wint-to-pointer-cast]
      return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
    
    Use map_sysmem() which is the correct way to convert an address to a
    pointer.
    
    Fixes: c131c8bca8 (dm: core: add dev_read_addr_ptr())
    Change-Id: Ic8ef1cb185d98d84dc6cf35a7001dcdcb4caa849
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8ccc2db6e84244e5cb57885dc9dfd7e752071b98)

diff --git a/drivers/core/read.c b/drivers/core/read.c
index eacf1716fd..5d440cee72 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <mapmem.h>
 #include <dm/of_access.h>
 
 int dev_read_u32_default(struct udevice *dev, const char *propname, int def)
@@ -61,7 +62,7 @@ void *dev_read_addr_ptr(struct udevice *dev)
 {
 	fdt_addr_t addr = dev_read_addr(dev);
 
-	return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
+	return (addr == FDT_ADDR_T_NONE) ? NULL : map_sysmem(addr, 0);
 }
 
 fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property,

commit 853f31c42c04b6cd006a1204bad61e5d6aff3501
Author: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Date:   Thu Sep 28 11:29:52 2017 +0200

    UPSTREAM: cmd/fdt.c align data buffer to avoid unaligned word access
    
    Since the compiler is free to place a char array to any address in
    memory (in this case the stack), also to a non word aligned address the
    function "fdt_prop_parse" runs into troubles upon it wants to write some
    (fdt32_t *) to such a variable (if it has been placed to a none word
    aligned address).
    
    To avoid this we tell the compiler to always align this scratchpad to a
    word aligned address.
    
    Change-Id: I6ea64827a9c245db4ba2a2ff522aaddea647c2f2
    Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
    Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
    Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6dfd65f81fd060a85c961a84f85a286e8e96332c)

diff --git a/cmd/fdt.c b/cmd/fdt.c
index 955a0088c6..b783b0df42 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -256,7 +256,7 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		char *pathp;		/* path */
 		char *prop;		/* property */
 		int  nodeoffset;	/* node offset from libfdt */
-		static char data[SCRATCHPAD];	/* storage for the property */
+		static char data[SCRATCHPAD] __aligned(4);/* property storage */
 		const void *ptmp;
 		int  len;		/* new length of the property */
 		int  ret;		/* return value */

commit 446fcf5177656062d9f14d04d91fcd73d0a00c55
Author: Jagan Teki <jagannadh.teki@gmail.com>
Date:   Fri Nov 10 17:18:44 2017 +0530

    UPSTREAM: rockchip: configs: vyasa: Update falcon offsets
    
    Update the falcon offsets for args to 16MB and kernel to 17MB
    Since the below commit updated U-Boot proper location along
    with rockchip boot image offsets
    "spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip"
    (sha1: 8f4d62b403db45dfa8b1cadb9da9096c79b7df47)
    
    Change-Id: I545ebd5a6f74a03c54039db9123d357f61b2b82b
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 36b6e0cc3ca9deea0ea02c10e44bda8979c94637)

diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h
index 8774e42430..c8c7fc7f3e 100644
--- a/include/configs/vyasa-rk3288.h
+++ b/include/configs/vyasa-rk3288.h
@@ -31,10 +31,10 @@
 #define CONFIG_SYS_SPL_ARGS_ADDR	0x0ffe5000
 #define CONFIG_CMD_SPL_WRITE_SIZE      (128 * SZ_1K)
 
-/* Falcon Mode - MMC support: args@1MB kernel@2MB */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
-#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
+/* Falcon Mode - MMC support: args@16MB kernel@17MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR		0x8000	/* 16MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS		(CONFIG_CMD_SPL_WRITE_SIZE / 512)
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR		0x8800	/* 17MB */
 #endif
 
 #endif

commit ee7d8e94419d2f274aefd4d3c53bbfe81b04431c
Author: Jagan Teki <jagannadh.teki@gmail.com>
Date:   Fri Nov 10 17:18:43 2017 +0530

    UPSTREAM: rockchip: doc: Fix U-Boot proper location for falcon
    
    This patch fixed U-Boot proper location has been
    missed to update in bewlo commit
    "rockchip: doc: update U-Boot location info"
    (sha1: 73e6dbe855f357a8330cfd53ff3033303611c1ad)
    
    Change-Id: I87377968a30e84f23eaf3b4f333fc4fd766709c8
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d80599e8946f52c10b1069054ff30ade97c79091)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 4f665ef310..597f068aca 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -166,7 +166,7 @@ To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
    ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&
     cat ./spl/u-boot-spl-dtb.bin >> out &&
     sudo dd if=out of=/dev/mmcblk0 seek=64 &&
-    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256
+    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
 
 Booting from an SD card on RK3188
 =================================

commit 9d7e51fd332a12930bf573a624604b44bdb0c54f
Author: Goldschmidt Simon <sgoldschmidt@de.pepperl-fuchs.com>
Date:   Fri Nov 10 11:38:32 2017 +0000

    UPSTREAM: rockchip: doc: update U-Boot location info
    
    The U-Boot location has been moved to block 16384.
    This is 8MB, not 4MB.
    
    Change-Id: I899466db29ba9a2e0526131cfdb6c49d5004ce98
    Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 341e44ed667a1ac959fac0830e5f6e2e2b409f9a)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 4a84f3b22e..4f665ef310 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -102,7 +102,7 @@ To write an image that boots from an SD card (assumed to be /dev/sdc):
    sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
 
 This puts the Rockchip header and SPL image first and then places the U-Boot
-image at block 16384 (i.e. 4MB from the start of the SD card). This
+image at block 16384 (i.e. 8MB from the start of the SD card). This
 corresponds with this setting in U-Boot:
 
    #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x4000

commit bf88a4e1578101449e98726935a38b4b48136111
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Nov 6 23:02:56 2017 +0100

    rockchip: board: puma_rk3399: make env location selectable via Kconfig
    
    The environment storage location is selectable via Kconfig. We support
    eMMC, SD and SPI-NOR as location for U-Boot. This adds support to store
    the environment in the SPI-NOR additional to the default eMMC location.
    
    Change-Id: Iffbda80bf04469fc2beb4d1912e710c357035e48
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b5557ffc0f751214d26e55da16396d9bfe29f485)

diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index cfc31f4e77..949f7568ba 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -9,7 +9,23 @@
 
 #include <configs/rk3399_common.h>
 
+/*
+ * SPL @ 32kB for ~130kB
+ * ENV @ 240KB for 8kB
+ * FIT payload (ATF, U-Boot, FDT) @ 256kB
+ */
+#undef CONFIG_ENV_OFFSET
+#define CONFIG_ENV_OFFSET (240 * 1024)
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_SYS_MMC_ENV_DEV 1
+#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
+#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
+#endif
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit 352ddda1bd51608941ba781075a412e95b42a162
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Nov 6 23:02:55 2017 +0100

    UPSTREAM: rockchip: dts: rk3399: change sd-card io voltage to 3.0V
    
    The VCC_SD and VCC_SDIO rail should only be powered up to 3.0V on RK3399
    platforms.
    
    Change-Id: I4b9adc8001b4d01f0ebd0d5a7a1bc2a050e82647
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4f70039b360ae4645bc35c1d1a6cc41837ea161e)

diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index 31e3ba8a47..f134c00688 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -332,10 +332,10 @@
 				regulator-always-on;
 				regulator-boot-on;
 				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
+				regulator-max-microvolt = <3000000>;
 				regulator-state-mem {
 					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
+					regulator-suspend-microvolt = <3000000>;
 				};
 			};
 
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 6d4dd84bf3..96bd4fec01 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -347,11 +347,11 @@
 				regulator-always-on;
 				regulator-boot-on;
 				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
+				regulator-max-microvolt = <3000000>;
 				regulator-name = "vcc_sd";
 				regulator-state-mem {
 					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3300000>;
+					regulator-suspend-microvolt = <3000000>;
 				};
 			};
 

commit f01e4843480015a159122f8ac50f34f1bfde64dd
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Nov 6 23:02:54 2017 +0100

    UPSTREAM: rockchip: dts: Use defines for pin names in rk3399-puma.dtsi and rk3368-lion.dts
    
    pinctrl/rockchip.h provides defines that map pin numbers to pin names.
    Use them to make the dts more human readable.
    
    Change-Id: If1e7f9e9bb108f1fceeb32c9220a20eee7acc01d
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 366812fa2641da395fbf8e7de532c3c463e7b7d2)

diff --git a/arch/arm/dts/rk3368-lion.dts b/arch/arm/dts/rk3368-lion.dts
index 850db500e4..f018b8b146 100644
--- a/arch/arm/dts/rk3368-lion.dts
+++ b/arch/arm/dts/rk3368-lion.dts
@@ -68,7 +68,7 @@
 	phy-supply = <&vcc33_io>;
 	phy-mode = "rgmii";
 	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
+	snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <2 10000 50000>;
 	assigned-clocks = <&cru SCLK_MAC>;
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 8065b3cc88..6d4dd84bf3 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -36,13 +36,13 @@
 
 		module_led {
 			label = "module_led";
-			gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "heartbeat";
 		};
 
 		sd_card_led {
 			label = "sd_card_led";
-			gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+			gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "mmc0";
 		};
 	};
@@ -94,7 +94,7 @@
 		compatible = "regulator-fixed";
 		regulator-name = "usbhub_enable";
 		enable-active-low;
-		gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
+		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
 		regulator-boot-on;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
@@ -111,7 +111,7 @@
 		u-boot,dm-pre-reloc;
 		regulator-name = "bios_enable";
 		enable-active-high;
-		gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
+		gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
 		regulator-always-on;
 		regulator-boot-on;
 		regulator-min-microvolt = <1800000>;
@@ -139,7 +139,7 @@
 	vcc5v0_otg: vcc5v0-otg-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
-		gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&otg_vbus_drv>;
 		regulator-name = "vcc5v0_otg";
@@ -149,7 +149,7 @@
 	vcc5v0_host: vcc5v0-host-regulator {
 		compatible = "regulator-fixed";
 		enable-active-low;
-		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&host_vbus_drv>;
 		regulator-name = "vcc5v0_host";
@@ -195,7 +195,7 @@
 	phy-supply = <&vcc_phy>;
 	phy-mode = "rgmii";
 	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
+	snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <2 10000 50000>;
 	assigned-clocks = <&cru SCLK_RMII_SRC>;
@@ -223,7 +223,7 @@
 	vdd_gpu: fan535555@60 {
 		compatible = "fcs,fan53555";
 		reg = <0x60>;
-		vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
 		vin-supply = <&vcc5v0_sys>;
 		regulator-compatible = "fan53555-reg";
 		regulator-name = "vdd_gpu";
@@ -425,7 +425,7 @@
 	vdd_cpu_b: fan53555@60 {
 		compatible = "fcs,fan53555";
 		reg = <0x60>;
-		vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+		vsel-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
 		vin-supply = <&vcc5v0_sys>;
 		regulator-compatible = "fan53555-reg";
 		regulator-name = "vdd_cpu_b";
@@ -468,7 +468,7 @@
 	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 	assigned-clock-rates = <100000000>;
-	ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+	ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
 	num-lanes = <4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_clkreqn>;
@@ -563,42 +563,43 @@
 		puma_pin_hog: puma_pin_hog {
 			rockchip,pins =
 				/* We need pull-ups on Q7 buttons */
-				<0  4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
-				<0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
-				<0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
-				<0  9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
+				<RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
+				<RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
+				<RK_GPIO0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
+				<RK_GPIO0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
 		};
 	};
 
 	pmic {
 		pmic_int_l: pmic-int-l {
 			rockchip,pins =
-				<1 22 RK_FUNC_GPIO &pcfg_pull_up>;
+				<RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
 	leds_pins_puma: led_pins@0 {
 			rockchip,pins =
-				<2 25 RK_FUNC_GPIO &pcfg_pull_none>,
-				<1 2 RK_FUNC_GPIO &pcfg_pull_none>;
+				<RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
+				<RK_GPIO1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
 	};
 
 	usb2 {
 		otg_vbus_drv: otg-vbus-drv {
 			rockchip,pins =
-				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+				<RK_GPIO0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
 		host_vbus_drv: host-vbus-drv {
 			rockchip,pins =
-				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+				<RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
 	i2c8 {
 		i2c8_xfer_a: i2c8-xfer {
-			rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
-					<1 20 RK_FUNC_1 &pcfg_pull_up>;
+			rockchip,pins =
+				<RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
+				<RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
 		};
 	};
 };
@@ -623,8 +624,8 @@
 &i2c6_xfer {
 	/* Enable pull-ups, the pins would float otherwise. */
 	rockchip,pins =
-		<2 10 RK_FUNC_2 &pcfg_pull_up>,
-		<2 9 RK_FUNC_2 &pcfg_pull_up>;
+		<RK_GPIO2 RK_PB2 RK_FUNC_2 &pcfg_pull_up>,
+		<RK_GPIO2 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
 };
 
 &i2c7 {

commit 9d054084f15519536e4b274ab405c3a4f4d544cf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 6 23:02:53 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: update USB configuration
    
    This change updates the USB configuration for the RK3399-Q7 in the DTS:
     * fixes the OTG board configuration by enabling it ('okay')
     * improves the speed of 'usb start' by disabling the unused EHCI/OHCI
       controllers
    
    Change-Id: I2ea0f58c8e56ceac065617c8c26007871716273d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b1e1ce2cd429c227ef0b2a72b1c13d91ef5555a3)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index c517fd3627..8065b3cc88 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -523,23 +523,23 @@
 };
 
 &usb_host0_ehci {
-	status = "okay";
+	status = "disabled";
 };
 
 &usb_host0_ohci {
-	status = "okay";
+	status = "disabled";
 };
 
 &dwc3_typec0 {
-	status = "disabled";
+	status = "okay";
 };
 
 &usb_host1_ehci {
-	status = "okay";
+	status = "disabled";
 };
 
 &usb_host1_ohci {
-	status = "okay";
+	status = "disabled";
 };
 
 &dwc3_typec1 {

commit 6d2fed26e392be552094b39545dd2a771aeb005d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 6 23:02:52 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: update usbhub_enable regulator
    
    To correctly model the usbhub_enable regulator for U-Boot, we need
    to change the settings to:
     * the GPIO polarity is GPIO_ACTIVE_LOW
     * should be set to inactive (enable-active-low) when boot-on settings
       are applied
     * it can be changed at runtime (i.e. remove the always-on)
    
    Change-Id: Ibb1762be5b791870b376d251c53ac6b41b5dbbe4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f2a95131685e48bdc05c0abded74ae09701c29d7)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index c4da26956a..c517fd3627 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -94,8 +94,7 @@
 		compatible = "regulator-fixed";
 		regulator-name = "usbhub_enable";
 		enable-active-low;
-		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
-		regulator-always-on;
+		gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
 		regulator-boot-on;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;

commit f2d89a0e585d3ca1dc61fb1f4690748f959bf160
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Nov 6 23:02:51 2017 +0100

    UPSTREAM: rockchip: dts: rk3399-puma: fix the modelling of BIOS_DISABLE
    
    The fixed regulator for overriding BIOS_DISABLE had been modelling
    backwards (i.e. the GPIO polarity and the enable-active-low/high
    property had both been inverted), causing the 'regulator' command
    to always print/expect 'disabled'/'enabled' backwards.
    
    This fixes the mix-up and models it correctly:
     * the GPIO is low-active
     * the regulator should be enabled (enable-active-high) during
       boot-on initialisation
    
    Change-Id: I868f3d9ebaed3d1a17b66244dd84ed9332bf24a1
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit df1e6212f957627731daf9844efe960ca8a549df)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 65ab380139..c4da26956a 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -111,8 +111,8 @@
 		compatible = "regulator-fixed";
 		u-boot,dm-pre-reloc;
 		regulator-name = "bios_enable";
-		enable-active-low;
-		gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
 		regulator-always-on;
 		regulator-boot-on;
 		regulator-min-microvolt = <1800000>;

commit d8bee3a4c98ee90d3892518939d1904b31026ad9
Author: Jan Kundrát <jan.kundrat@cesnet.cz>
Date:   Fri Nov 3 03:06:35 2017 +0100

    UPSTREAM: Do not attempt to use the systemwide libfdt
    
    U-Boot bundles a patched copy of libfdt, so it's wrong to attempt to
    include it <like/this>. This breaks the build for me when I have dtc
    fully installed in my host -- as happened earlier tonight with
    Buildroot, for example.
    
    There are several other occurrences throughout the code where '<libfdt'
    matches. I'm not modifying these because I have no clue why the
    <systemwide> include style is being used -- IMHO wrongly.
    
    Change-Id: Ie733b1454f8d76439abee770af54eca3699323f7
    Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b95a5190ba9284a06f9d0c56589bcb4080b4710a)

diff --git a/include/fdt.h b/include/fdt.h
index 7ead62e777..f40b56c755 100644
--- a/include/fdt.h
+++ b/include/fdt.h
@@ -1 +1 @@
-#include <../lib/libfdt/fdt.h>
+#include "../lib/libfdt/fdt.h"
diff --git a/include/libfdt.h b/include/libfdt.h
index 10296a21ad..7ba13e634b 100755
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -1 +1 @@
-#include <../lib/libfdt/libfdt.h>
+#include "../lib/libfdt/libfdt.h"
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index f51f5f15f5..5897b6d5f7 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -16,8 +16,8 @@
 #include <string.h>
 #include <unistd.h>
 
-#include <../include/libfdt.h>
-#include <libfdt_internal.h>
+#include "../include/libfdt.h"
+#include "libfdt_internal.h"
 
 /* Define DEBUG to get some debugging output on stderr */
 #ifdef DEBUG

commit 32fba033892e544af1fdd7865d74239ecf56eff4
Author: Lukasz Majewski <lukma@denx.de>
Date:   Fri Oct 27 12:28:10 2017 +0200

    UPSTREAM: gpt: Use cache aligned buffers for gpt_h and gpt_e
    
    Before this patch one could receive following errors when executing
    "gpt write" command on machine with cache enabled:
    
    display5 factory > gpt write mmc ${mmcdev} ${partitions}
    Writing GPT:
    CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
    CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
    CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
    CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
    success!
    
    To alleviate this problem - the calloc()s have been replaced with
    malloc_cache_aligned() and memset().
    
    After those changes the buffers are properly aligned (with both start
    address and size) to SoC cache line.
    
    Change-Id: I13782d942b327d3941de6446b2cbc49a3d7901dc
    Signed-off-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bb021013ba1ea4f7ade55ed932ab9d807e8a09ea)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 514c25d8ba..7582b6feb5 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -622,25 +622,27 @@ int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h,
 int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,
 		disk_partition_t *partitions, int parts_count)
 {
-	int ret;
-
-	gpt_header *gpt_h = calloc(1, PAD_TO_BLOCKSIZE(sizeof(gpt_header),
-						       dev_desc));
+	gpt_header *gpt_h;
 	gpt_entry *gpt_e;
+	int ret, size;
 
+	size = PAD_TO_BLOCKSIZE(sizeof(gpt_header), dev_desc);
+	gpt_h = malloc_cache_aligned(size);
 	if (gpt_h == NULL) {
 		printf("%s: calloc failed!\n", __func__);
 		return -1;
 	}
+	memset(gpt_h, 0, size);
 
-	gpt_e = calloc(1, PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS
-					       * sizeof(gpt_entry),
-					       dev_desc));
+	size = PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS * sizeof(gpt_entry),
+				dev_desc);
+	gpt_e = malloc_cache_aligned(size);
 	if (gpt_e == NULL) {
 		printf("%s: calloc failed!\n", __func__);
 		free(gpt_h);
 		return -1;
 	}
+	memset(gpt_e, 0, size);
 
 	/* Generate Primary GPT header (LBA1) */
 	ret = gpt_fill_header(dev_desc, gpt_h, str_disk_guid, parts_count);

commit adf9b6dead0cd865878095eccc53dfa2a8cd33ad
Author: Stefan Agner <stefan.agner@toradex.com>
Date:   Thu Oct 26 14:57:53 2017 +0200

    UPSTREAM: tools: env: allow to print U-Boot version
    
    The fw_env utility family has a default environment compiled in
    which ties it quite strongly to the U-Boot source/config it has
    been built with. Allow to display the U-Boot version it has been
    built with using the -v/--version argument.
    
    Change-Id: Iba67d9f520d9315874758ddafe9d277610719c9d
    Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
    Reviewed-by: Lukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 84d46e7e8948780d7ca20c24dfc7b653b900f728)

diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c
index 6e278ca80b..0b9063742c 100644
--- a/tools/env/fw_env_main.c
+++ b/tools/env/fw_env_main.c
@@ -34,6 +34,7 @@
 #include <stdlib.h>
 #include <sys/file.h>
 #include <unistd.h>
+#include <version.h>
 #include "fw_env_private.h"
 #include "fw_env.h"
 
@@ -48,6 +49,7 @@ static struct option long_options[] = {
 	{"script", required_argument, NULL, 's'},
 	{"noheader", required_argument, NULL, 'n'},
 	{"lock", required_argument, NULL, 'l'},
+	{"version", no_argument, NULL, 'v'},
 	{NULL, 0, NULL, 0}
 };
 
@@ -67,6 +69,7 @@ void usage_printenv(void)
 		"Print variables from U-Boot environment\n"
 		"\n"
 		" -h, --help           print this help.\n"
+		" -v, --version        display version\n"
 #ifdef CONFIG_ENV_AES
 		" -a, --aes            aes key to access environment\n"
 #endif
@@ -85,6 +88,7 @@ void usage_env_set(void)
 		"Modify variables in U-Boot environment\n"
 		"\n"
 		" -h, --help           print this help.\n"
+		" -v, --version        display version\n"
 #ifdef CONFIG_ENV_AES
 		" -a, --aes            aes key to access environment\n"
 #endif
@@ -123,7 +127,7 @@ static void parse_common_args(int argc, char *argv[])
 	env_opts.config_file = CONFIG_FILE;
 #endif
 
-	while ((c = getopt_long(argc, argv, ":a:c:l:h", long_options, NULL)) !=
+	while ((c = getopt_long(argc, argv, ":a:c:l:h:v", long_options, NULL)) !=
 	       EOF) {
 		switch (c) {
 		case 'a':
@@ -145,6 +149,10 @@ static void parse_common_args(int argc, char *argv[])
 			do_printenv ? usage_printenv() : usage_env_set();
 			exit(EXIT_SUCCESS);
 			break;
+		case 'v':
+			fprintf(stderr, "Compiled with " U_BOOT_VERSION "\n");
+			exit(EXIT_SUCCESS);
+			break;
 		default:
 			/* ignore unknown options */
 			break;
@@ -162,7 +170,7 @@ int parse_printenv_args(int argc, char *argv[])
 
 	parse_common_args(argc, argv);
 
-	while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+	while ((c = getopt_long(argc, argv, "a:c:ns:l:h:v", long_options, NULL))
 		!= EOF) {
 		switch (c) {
 		case 'n':
@@ -189,7 +197,7 @@ int parse_setenv_args(int argc, char *argv[])
 
 	parse_common_args(argc, argv);
 
-	while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+	while ((c = getopt_long(argc, argv, "a:c:ns:l:h:v", long_options, NULL))
 		!= EOF) {
 		switch (c) {
 		case 's':

commit 58ddd5e1b291a6344ec4b4f35cf46cc1a22f62f1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Mon Oct 23 10:03:40 2017 +0900

    UPSTREAM: image-sig: use designated initializers for algorithm
    
    Designated initializers are more readable because we do not
    have to check the order in the struct definitions.
    
    Change-Id: Ib4af13de7b0d87b2d395847b0d1b5c198206a96b
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8ec87df3762f27bbd77fb28474d1e46ad23c9e28)

diff --git a/common/image-sig.c b/common/image-sig.c
index 455f2b9629..bf824fef3c 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -32,42 +32,42 @@ void *image_get_host_blob(void)
 
 struct checksum_algo checksum_algos[] = {
 	{
-		"sha1",
-		SHA1_SUM_LEN,
-		SHA1_DER_LEN,
-		sha1_der_prefix,
+		.name = "sha1",
+		.checksum_len = SHA1_SUM_LEN,
+		.der_len = SHA1_DER_LEN,
+		.der_prefix = sha1_der_prefix,
 #if IMAGE_ENABLE_SIGN
-		EVP_sha1,
+		.calculate_sign = EVP_sha1,
 #endif
-		hash_calculate,
+		.calculate = hash_calculate,
 	},
 	{
-		"sha256",
-		SHA256_SUM_LEN,
-		SHA256_DER_LEN,
-		sha256_der_prefix,
+		.name = "sha256",
+		.checksum_len = SHA256_SUM_LEN,
+		.der_len = SHA256_DER_LEN,
+		.der_prefix = sha256_der_prefix,
 #if IMAGE_ENABLE_SIGN
-		EVP_sha256,
+		.calculate_sign = EVP_sha256,
 #endif
-		hash_calculate,
+		.calculate = hash_calculate,
 	}
 
 };
 
 struct crypto_algo crypto_algos[] = {
 	{
-		"rsa2048",
-		RSA2048_BYTES,
-		rsa_sign,
-		rsa_add_verify_data,
-		rsa_verify,
+		.name = "rsa2048",
+		.key_len = RSA2048_BYTES,
+		.sign = rsa_sign,
+		.add_verify_data = rsa_add_verify_data,
+		.verify = rsa_verify,
 	},
 	{
-		"rsa4096",
-		RSA4096_BYTES,
-		rsa_sign,
-		rsa_add_verify_data,
-		rsa_verify,
+		.name = "rsa4096",
+		.key_len = RSA4096_BYTES,
+		.sign = rsa_sign,
+		.add_verify_data = rsa_add_verify_data,
+		.verify = rsa_verify,
 	}
 
 };

commit aee63dc84c1f5be59ea35ceb209a4ea937bdeb41
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Oct 21 12:54:02 2017 -0400

    MAINTAINERS: Add missing boards and config entries
    
    As part of my usual round of build testing, output about missing
    MAINTAINERS information was not logged, and thus often overlooked.
    Correct that mistake by ensuring that I log the output of
    genboardscfg.py every time.  As part of that, address a number of
    missing MAINTAINERS entires.  In the case of a missing file, I have put
    the original submitter down.  In the rest of the cases I have added the
    config (and sometimes relevant header file) to the existing set of file
    globs.
    
    Change-Id: Ic4524445489daba323d638470c369ad914d5bfef
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 79df00fdb40b4584919c8bcef42d323a8d38d0f1)

diff --git a/board/CZ.NIC/turris_omnia/MAINTAINERS b/board/CZ.NIC/turris_omnia/MAINTAINERS
new file mode 100644
index 0000000000..ed15e11d3e
--- /dev/null
+++ b/board/CZ.NIC/turris_omnia/MAINTAINERS
@@ -0,0 +1,6 @@
+TURRIS OMNIA BOARD
+M:	Marek Behún <marek.behun@nic.cz>
+S:	Maintained
+F:	board/CZ.NIC/turris_omnia/
+F:	include/configs/turris_omnia.h
+F:	configs/turris_omnia_defconfig
diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
index 52a3869b29..9b0afeef10 100644
--- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS
+++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
@@ -4,3 +4,8 @@ S:	Maintained
 F:	board/Marvell/mvebu_armada-37xx/
 F:	include/configs/mvebu_armada-37xx.h
 F:	configs/mvebu_db-88f3720_defconfig
+
+ESPRESSOBin BOARD
+M:	Konstantin Porotchkin <kostap@marvell.com>
+S:	Maintained
+F:	configs/mvebu_espressobin-88f3720_defconfig
diff --git a/board/Marvell/mvebu_armada-8k/MAINTAINERS b/board/Marvell/mvebu_armada-8k/MAINTAINERS
index e0b965dfd6..2551ed02c5 100644
--- a/board/Marvell/mvebu_armada-8k/MAINTAINERS
+++ b/board/Marvell/mvebu_armada-8k/MAINTAINERS
@@ -3,5 +3,10 @@ M:	Stefan Roese <sr@denx.de>
 S:	Maintained
 F:	board/Marvell/mvebu_armada-8k/
 F:	include/configs/mvebu_armada-8k.h
-F:	configs/mvebu_db-88f7040_defconfig
-F:	configs/mvebu_db-88f8040_defconfig
+F:	configs/mvebu_db_armada8k_defconfig
+
+
+MACCHIATOBin BOARD
+M:	Konstantin Porotchkin <kostap@marvell.com>
+S:	Maintained
+F:	configs/mvebu_mcbin-88f8040_defconfig
diff --git a/board/Synology/ds414/MAINTAINERS b/board/Synology/ds414/MAINTAINERS
new file mode 100644
index 0000000000..502cbd7758
--- /dev/null
+++ b/board/Synology/ds414/MAINTAINERS
@@ -0,0 +1,6 @@
+DS414 BOARD
+M:	Phil Sutter <phil@nwl.cc>
+S:	Maintained
+F:	board/Synology/ds414/
+F:	include/configs/ds414.h
+F:	configs/ds414_defconfig
diff --git a/board/altera/arria10-socdk/MAINTAINERS b/board/altera/arria10-socdk/MAINTAINERS
new file mode 100644
index 0000000000..5a76efb54b
--- /dev/null
+++ b/board/altera/arria10-socdk/MAINTAINERS
@@ -0,0 +1,7 @@
+SOCFPGA BOARD
+M:	Dinh Nguyen <dinguyen@kernel.org>
+M:	Chin-Liang See <clsee@altera.com>
+S:	Maintained
+F:	board/altera/arria10-socdk/
+F:	include/configs/socfpga_arria10_socdk.h
+F:	configs/socfpga_arria10_defconfig
diff --git a/board/aspeed/evb_ast2500/MAINTAINERS b/board/aspeed/evb_ast2500/MAINTAINERS
new file mode 100644
index 0000000000..7c3c2b5e09
--- /dev/null
+++ b/board/aspeed/evb_ast2500/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB AST2500 BOARD
+M:	Maxim Sloyko <maxims@google.com>
+S:	Maintained
+F:	board/aspeed/evb_ast2500/
+F:	include/configs/evb_ast2500.h
+F:	configs/evb-ast2500_defconfig
diff --git a/board/atmel/sama5d3xek/MAINTAINERS b/board/atmel/sama5d3xek/MAINTAINERS
index 560303caad..ad5150897b 100644
--- a/board/atmel/sama5d3xek/MAINTAINERS
+++ b/board/atmel/sama5d3xek/MAINTAINERS
@@ -6,3 +6,6 @@ F:	include/configs/sama5d3xek.h
 F:	configs/sama5d3xek_mmc_defconfig
 F:	configs/sama5d3xek_nandflash_defconfig
 F:	configs/sama5d3xek_spiflash_defconfig
+F:	configs/sama5d36ek_cmp_mmc_defconfig
+F:	configs/sama5d36ek_cmp_nandflash_defconfig
+F:	configs/sama5d36ek_cmp_spiflash_defconfig
diff --git a/board/freescale/ls1046aqds/MAINTAINERS b/board/freescale/ls1046aqds/MAINTAINERS
index 6737d558ce..76190c6383 100644
--- a/board/freescale/ls1046aqds/MAINTAINERS
+++ b/board/freescale/ls1046aqds/MAINTAINERS
@@ -8,6 +8,7 @@ F:	configs/ls1046aqds_nand_defconfig
 F:	configs/ls1046aqds_sdcard_ifc_defconfig
 F:	configs/ls1046aqds_sdcard_qspi_defconfig
 F:	configs/ls1046aqds_qspi_defconfig
+F:	configs/ls1046aqds_lpuart_defconfig
 
 M:	Sumit Garg <sumit.garg@nxp.com>
 S:	Maintained
diff --git a/board/gdsys/mpc8308/MAINTAINERS b/board/gdsys/mpc8308/MAINTAINERS
index 3895b01732..21470bf6b0 100644
--- a/board/gdsys/mpc8308/MAINTAINERS
+++ b/board/gdsys/mpc8308/MAINTAINERS
@@ -7,4 +7,6 @@ F:	configs/hrcon_defconfig
 F:	configs/hrcon_dh_defconfig
 F:	include/configs/strider.h
 F:	configs/strider_cpu_defconfig
+F:	configs/strider_cpu_dp_defconfig
 F:	configs/strider_con_defconfig
+F:	configs/strider_con_dp_defconfig
diff --git a/board/isee/igep003x/MAINTAINERS b/board/isee/igep003x/MAINTAINERS
index 748b189c4e..a74938a7d2 100644
--- a/board/isee/igep003x/MAINTAINERS
+++ b/board/isee/igep003x/MAINTAINERS
@@ -3,4 +3,4 @@ M:	Enric Balletbo i Serra <eballetbo@gmail.com>
 S:	Maintained
 F:	board/isee/igep003x/
 F:	include/configs/am335x_igep003x.h
-F:	configs/am335x_igep0033_defconfig
+F:	configs/am335x_igep003x_defconfig
diff --git a/board/nvidia/p2771-0000/MAINTAINERS b/board/nvidia/p2771-0000/MAINTAINERS
index 4fc4ebd5e0..cf4913a9a1 100644
--- a/board/nvidia/p2771-0000/MAINTAINERS
+++ b/board/nvidia/p2771-0000/MAINTAINERS
@@ -3,4 +3,5 @@ M:	Stephen Warren <swarren@nvidia.com>
 S:	Maintained
 F:	board/nvidia/p2771-0000/
 F:	include/configs/p2771-0000.h
-F:	configs/p2771-0000_defconfig
+F:	configs/p2771-0000-000_defconfig
+F:	configs/p2771-0000-500_defconfig
diff --git a/board/phytec/pcm052/MAINTAINERS b/board/phytec/pcm052/MAINTAINERS
index a877436bd3..66fe06e49c 100644
--- a/board/phytec/pcm052/MAINTAINERS
+++ b/board/phytec/pcm052/MAINTAINERS
@@ -2,5 +2,7 @@ PCM052 BOARD
 M:	Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
 S:	Maintained
 F:	board/phytec/pcm052/
+F:	include/configs/bk4r1.h
 F:	include/configs/pcm052.h
+F:	configs/bk4r1_defconfig
 F:	configs/pcm052_defconfig
diff --git a/board/renesas/blanche/MAINTAINERS b/board/renesas/blanche/MAINTAINERS
new file mode 100644
index 0000000000..4b3114aceb
--- /dev/null
+++ b/board/renesas/blanche/MAINTAINERS
@@ -0,0 +1,7 @@
+BLANCHE BOARD
+M:	Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
+S:	Maintained
+F:	board/renesas/blanche/
+F:	include/configs/blanche.h
+F:	configs/blanche_defconfig
+
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
index c825d5e219..caad30641e 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -4,3 +4,4 @@ S:      Maintained
 F:      board/rockchip/evb_rk3399
 F:      include/configs/evb_rk3399.h
 F:      configs/evb-rk3399_defconfig
+F:      configs/firefly-rk3399_defconfig
diff --git a/board/samsung/espresso7420/MAINTAINERS b/board/samsung/espresso7420/MAINTAINERS
index aaebc4c22d..e3b2394cce 100644
--- a/board/samsung/espresso7420/MAINTAINERS
+++ b/board/samsung/espresso7420/MAINTAINERS
@@ -3,3 +3,4 @@ M:	Thomas Abraham <thomas.ab@samsung.com>
 S:	Maintained
 F:	board/samsung/espresso7420/
 F:	include/configs/espresso7420.h
+F:	configs/espresso7420_defconfig
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index ff6eea24a5..8efc0d3f21 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -26,6 +26,7 @@ F:	configs/A13-OLinuXinoM_defconfig
 F:	configs/Auxtek-T003_defconfig
 F:	configs/Auxtek-T004_defconfig
 F:	configs/CHIP_defconfig
+F:	configs/CHIP_pro_defconfig
 F:	configs/difrnce_dit4350_defconfig
 F:	configs/Empire_electronix_d709_defconfig
 F:	configs/Empire_electronix_m712_defconfig
@@ -44,6 +45,7 @@ F:	configs/Mele_M9_defconfig
 F:	configs/Sinovoip_BPI_M2_defconfig
 F:	include/configs/sun7i.h
 F:	configs/A20-OLinuXino_MICRO_defconfig
+F:	configs/A20-OLinuXino_MICRO-eMMC_defconfig
 F:	configs/Bananapi_defconfig
 F:	configs/Bananapro_defconfig
 F:	configs/i12-tvbox_defconfig
@@ -54,6 +56,7 @@ F:	configs/Orangepi_mini_defconfig
 F:	configs/qt840a_defconfig
 F:	configs/Wits_Pro_A20_DKT_defconfig
 F:	include/configs/sun8i.h
+F:	configs/sun8i_a23_evb_defconfig
 F:	configs/ga10h_v1_1_defconfig
 F:	configs/gt90h_v4_defconfig
 F:	configs/inet86dz_defconfig
@@ -124,6 +127,12 @@ S:	Maintained
 F:	configs/Bananapi_M2_Ultra_defconfig
 F:	arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
 
+BANANAPI M2 MAGIC BOARD
+M:	Maxime Ripard <maxime.ripard@free-electrons.com>
+S:	Maintained
+F:	configs/Bananapi_m2m_defconfig
+F:	arch/arm/dts/sun8i-r16-bananapi-m2m.dts
+
 BANANAPI M64
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained

commit 17e3c82628f14b45811f550c74e393eaebdd1cd0
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Oct 30 14:44:54 2017 +0100

    UPSTREAM: rockchip: lion-rk3368: defconfig: select PHY_MICREL_KSZ90X1
    
    The RK3368-uQ7 uses a KSZ9031 PHY on-module.  Enable PHY_MICREL_KSZ90X1
    in the associated defconfig.
    
    References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig")
    Change-Id: I5759ebc2d155d53711e294d739515959048a35d4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ed6be4fcdfd4db56081e366c40dee7c3fb19ef59)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 66a3cd5fac..9181f16dca 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -67,6 +67,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y

commit c6de4e8bb31e6221c4a2b21e4d3b6c6bf0e129e2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Oct 30 14:44:55 2017 +0100

    UPSTREAM: rockchip: puma-rk3399: defconfig: select PHY_MICREL_KSZ90X1
    
    The RK3368-uQ7 uses a KSZ9031 PHY on-module.  Enable PHY_MICREL_KSZ90X1
    in the associated defconfig (this somehow got lost with da3b9e7f).
    
    References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig")
    Change-Id: I0c324927c02138759c162708cfd3c30069051e25
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 18a158979c67cd5316c84ecbc3cb4c91ee8c9e37)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 62a8d7c859..6c2eb928f3 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -58,6 +58,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y

commit d2ba98843d566f51643b3c014c715427ec2866da
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Fri Oct 6 19:24:08 2017 +0200

    UPSTREAM: rockchip: configs: only add available BOOT_TARGET_DEVICES
    
    BOOT_TARGET_DEVICES should only be added if the corresponding u-boot
    command is enabled.
    
    Change-Id: I5d692bf95d04b3efb876ccd1e97be807f2443efd
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6e278a8c1c28efc12668d2761cb2fb0264668da4)

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 5eac4446f5..7c341ec9b2 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -11,22 +11,39 @@
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_defaults.h>
 
-/* First try to boot from SD (index 0), then eMMC (index 1 */
-#ifdef CONFIG_CMD_USB
-#define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0) \
-	func(MMC, mmc, 1) \
-	func(USB, usb, 0) \
-	func(PXE, pxe, na) \
-	func(DHCP, dchp, na)
+/* First try to boot from SD (index 0), then eMMC (index 1) */
+#if CONFIG_IS_ENABLED(CMD_MMC)
+	#define BOOT_TARGET_MMC(func) \
+		func(MMC, mmc, 0) \
+		func(MMC, mmc, 1)
 #else
-#define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0) \
-	func(MMC, mmc, 1) \
-	func(PXE, pxe, na) \
-	func(DHCP, dchp, na)
+	#define BOOT_TARGET_MMC(func)
 #endif
 
+#if CONFIG_IS_ENABLED(CMD_USB)
+	#define BOOT_TARGET_USB(func) func(USB, usb, 0)
+#else
+	#define BOOT_TARGET_USB(func)
+#endif
+
+#if CONFIG_IS_ENABLED(CMD_PXE)
+	#define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
+#else
+	#define BOOT_TARGET_PXE(func)
+#endif
+
+#if CONFIG_IS_ENABLED(CMD_DHCP)
+	#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
+#else
+	#define BOOT_TARGET_DHCP(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+	BOOT_TARGET_MMC(func) \
+	BOOT_TARGET_USB(func) \
+	BOOT_TARGET_PXE(func) \
+	BOOT_TARGET_DHCP(func)
+
 #ifdef CONFIG_ARM64
 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
 #else

commit 20a63bb13d1c4232066c7e7072ecec4ae2253553
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Fri Oct 6 19:24:09 2017 +0200

    UPSTREAM: rockchip: configs: use rockchip-common.h for rk3368
    
    rockchip-common.h already defines values that are missing from
    rk3368_common.h
    
    For example BOOT_TARGET_DEVICES was defined empty and therefore
    distroboot had no boot targets.
    
    Change-Id: I1be10032963557894adedef23611ccbaa8b35467
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e3e842f17cfe0f3f4972c462a4d3ed13ba5eb1ab)

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 20abb01cf8..d33f581abf 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_RK3368_COMMON_H
 #define __CONFIG_RK3368_COMMON_H
 
+#include "rockchip-common.h"
+
 #define CONFIG_SYS_CACHELINE_SIZE	64
 
 #include <asm/arch/hardware.h>
@@ -53,10 +55,6 @@
 	"kernel_addr_r=0x280000\0" \
 	"ramdisk_addr_r=0x5bf0000\0"
 
-#include <config_distro_defaults.h>
-
-#define BOOT_TARGET_DEVICES(func)
-
 #include <config_distro_bootcmd.h>
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

commit ae530ff2ca02ede3c0ba41d994157ffca0470b3a
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sat Oct 28 07:34:15 2017 +0200

    UPSTREAM: scripts/get_maintainer.pl: enable find_maintainer_files
    
    Many MAINTAINERS files are in subdirectories.
    We should enable searching these.
    
    Change-Id: Ia0cd7a8c9255486e30b9d59027ae822bbdf00030
    Reported-by: Walt Feasel <waltfeasel@gmail.com>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b79372ae94fbc9e30d014ad8ce830d2062539eb9)

diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
index 8b6037b73f..07800e62d1 100755
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -59,7 +59,7 @@ my $from_filename = 0;
 my $pattern_depth = 0;
 my $version = 0;
 my $help = 0;
-my $find_maintainer_files = 0;
+my $find_maintainer_files = 1;
 
 my $vcs_used = 0;
 

commit 722c07dd6e0c95e835dfd63314ee58236926fbe8
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Sun Oct 29 08:28:52 2017 +0100

    UPSTREAM: checkpatch: Support wide strings
    
    Allow prefixing typical strings with L for wide strings
    
    Patch originally by Joe Perches
    https://lkml.org/lkml/2017/10/17/1117
    
    Change-Id: Ie92cf1fec9c7d5eaf78de0a02315eb2067b8fad2
    Signed-off-by: Joe Perches <joe@perches.com>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9ef2684c033d325b08133e96e8744b4da9b69a58)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 4142f5c837..e450826c36 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -392,7 +392,7 @@ our $Binary	= qr{(?i)0b[01]+$Int_type?};
 our $Hex	= qr{(?i)0x[0-9a-f]+$Int_type?};
 our $Int	= qr{[0-9]+$Int_type?};
 our $Octal	= qr{0[0-7]+$Int_type?};
-our $String	= qr{"[X\t]*"};
+our $String	= qr{(?:\bL)?"[X\t]*"};
 our $Float_hex	= qr{(?i)0x[0-9a-f]+p-?[0-9]+[fl]?};
 our $Float_dec	= qr{(?i)(?:[0-9]+\.[0-9]*|[0-9]*\.[0-9]+)(?:e-?[0-9]+)?[fl]?};
 our $Float_int	= qr{(?i)[0-9]+e-?[0-9]+[fl]?};
@@ -5254,13 +5254,14 @@ sub process {
 		}
 
 # concatenated string without spaces between elements
-		if ($line =~ /$String[A-Z_]/ || $line =~ /[A-Za-z0-9_]$String/) {
+		if ($line =~ /$String[A-Z_]/ ||
+		    ($line =~ /([A-Za-z0-9_]+)$String/ && $1 !~ /^L$/)) {
 			CHK("CONCATENATED_STRING",
 			    "Concatenated strings should use spaces between elements\n" . $herecurr);
 		}
 
 # uncoalesced string fragments
-		if ($line =~ /$String\s*"/) {
+		if ($line =~ /$String\s*L?"/) {
 			WARN("STRING_FRAGMENTS",
 			     "Consecutive strings are generally better as a single string\n" . $herecurr);
 		}

commit f0573858c4ff089dbbee19641d7ce48410f5188e
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Oct 19 23:49:19 2017 +0200

    UPSTREAM: Kconfig: add CONFIG_BROKEN
    
    Provide a Kconfig option that we can use as dependency for
    features that are broken. This allows to easily disable them
    without removing the code.
    
    As no short text is supplied the option will not appear in
    menuconfig.
    
    Change-Id: I03bf2f8f543cda490b63e081c2dbe1f1deee3d17
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4c7a211046a3956058b512edd8533f7df031cc4a)

diff --git a/Kconfig b/Kconfig
index 73f820a6de..03153dd933 100644
--- a/Kconfig
+++ b/Kconfig
@@ -14,6 +14,12 @@ source "arch/Kconfig"
 
 menu "General setup"
 
+config BROKEN
+	bool
+	help
+	  This option cannot be enabled. It is used as dependency
+	  for broken and incomplete features.
+
 config LOCALVERSION
 	string "Local version - append to U-Boot release"
 	help

commit 32619fbebcbd9090064c224f314aaa51b37e650d
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Oct 19 19:37:59 2017 +0900

    UPSTREAM: doc: verified-boot: fix crypto algorithm examples
    
    As you see in crypto_algos in common/image-sig.c, the algorithm
    should be either "rsa2048" or "rsa4096".  "rs2048" is a typo.
    
    Change-Id: I35cc5c126fc0129eb35de1a6652d64c0e645cbe9
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6af5520fe13d81ccd4ec4f7234a8d7a2426c2bd6)

diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index a57cdab339..2ece4c47de 100644
--- a/doc/uImage.FIT/signature.txt
+++ b/doc/uImage.FIT/signature.txt
@@ -85,7 +85,7 @@ allow the signer to operate. These should be added to the .its file.
 Signature nodes sit at the same level as hash nodes and are called
 signature@1, signature@2, etc.
 
-- algo: Algorithm name (e.g. "sha1,rs2048")
+- algo: Algorithm name (e.g. "sha1,rsa2048")
 
 - key-name-hint: Name of key to use for signing. The keys will normally be in
 a single directory (parameter -k to mkimage). For a given key <name>, its
@@ -139,7 +139,7 @@ public key in U-Boot's control FDT (using CONFIG_OF_CONTROL).
 Public keys should be stored as sub-nodes in a /signature node. Required
 properties are:
 
-- algo: Algorithm name (e.g. "sha1,rs2048")
+- algo: Algorithm name (e.g. "sha1,rsa2048")
 
 Optional properties are:
 

commit 710f83a7186e08f34bb70cb8d2343e68d51677f3
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Thu Oct 19 19:16:21 2017 +0900

    UPSTREAM: tools: image: fix node name of signature node in FIT
    
    Both "conf_name" and "sig_name" point to the name of config node.
    The latter should be the name of the signature node.
    
    Change-Id: I2be3ce4c9644a9dd6814d63cbc49f6e9348490d5
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 16067e6b87293eeb1fc4bac3edc0fd675b94d1a8)

diff --git a/tools/image-host.c b/tools/image-host.c
index 5e4d690714..c60d4adb3d 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -513,7 +513,7 @@ static int fit_config_get_data(void *fit, int conf_noffset, int noffset,
 	int ret, len;
 
 	conf_name = fit_get_name(fit, conf_noffset, NULL);
-	sig_name = fit_get_name(fit, conf_noffset, NULL);
+	sig_name = fit_get_name(fit, noffset, NULL);
 	debug("%s: conf='%s', sig='%s'\n", __func__, conf_name, sig_name);
 
 	/* Get a list of nodes we want to hash */

commit c326c43cc53c8ba898223207b709d9b1bd314c77
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Wed Oct 18 15:11:05 2017 +0200

    UPSTREAM: disk: efi: correct the overlap check on GPT header and PTE
    
    the partition starting at 0x4400 is refused with overlap error:
      $> gpt write mmc 0 "name=test,start=0x4400,size=0"
      Writing GPT: Partition overlap
      error!
    
    even if the 0x4400 is the first available offset for LBA35 with default
    value:
    - MBR=LBA1
    - GPT header=LBA2
    - PTE= 32 LBAs (128 entry), 3 to 34
    
    And the command to have one partition for all the disk failed also :
      $> gpt write mmc 0 "name=test,size=0"
    
    After the patch :
    
      $> gpt write mmc 0 "name=test,size=0"
      Writing GPT: success!
      $> part list mmc 0
    
      Partition Map for MMC device 0  --   Partition Type: EFI
    
      Part  Start LBA       End LBA         Name
            Attributes
            Type GUID
            Partition GUID
      1     0x00000022      0x01ce9fde      "test"
            attrs:  0x0000000000000000
            type:   ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
            type:   data
            guid:   b4b84b8a-04e3-4000-0036-aff5c9c495b1
    
    And 0x22 = 34 LBA => offset = 0x4400 is accepted as expected
    
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Tested-by: Stephen Warren <swarren@nvidia.com>
    Change-Id: I464741a434f02d960083c4e5a3e443cbe8b6f45b
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ae0e0228e664f31ac3c6093758ddc85b664e2d08)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 29761e77f2..514c25d8ba 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -469,8 +469,8 @@ int gpt_fill_pte(struct blk_desc *dev_desc,
 		 * If our partition overlaps with either the GPT
 		 * header, or the partition entry, reject it.
 		 */
-		if (((start <= hdr_end && hdr_start <= (start + size)) ||
-		     (start <= pte_end && pte_start <= (start + size)))) {
+		if (((start < hdr_end && hdr_start < (start + size)) ||
+		     (start < pte_end && pte_start < (start + size)))) {
 			printf("Partition overlap\n");
 			return -1;
 		}

commit aea2f111e0b068307b38fd1d09ceb3aeed6c28c2
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Oct 17 17:37:14 2017 +0900

    UPSTREAM: simple-bus: remove DECLARE_GLOBAL_DATA_PTR
    
    No global pointer is used in this file.
    
    Change-Id: I0c2dcde65300f815348d6f44922577225dd0ddf4
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3d569a807e17b146731c37db0cf21125134dee23)

diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c
index 14803e32b1..5acfa5f0e4 100644
--- a/drivers/core/simple-bus.c
+++ b/drivers/core/simple-bus.c
@@ -7,8 +7,6 @@
 #include <common.h>
 #include <dm.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 struct simple_bus_plat {
 	u32 base;
 	u32 size;

commit 4fd65389ae04f27f412664fb303d5ade15c0d435
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Fri Oct 13 19:31:20 2017 +0200

    UPSTREAM: scripts/get_maintainer.pl: update to current version
    
    Update the script to version 0.26 (as of Linux v4.14-rc1)
    Keep our "penguin_chief".
    Keep our top_of_kernel_tree.
    
    The negative forms of the command line parameters are described
    when using --help.
    
    New options are
    
     --git-blame-signatures => when used with --git-blame,
                               also include all commit signers
     --r => include reviewer(s) if any
     --letters => print all matching 'letter' types
                  from all matching sections
    
    File .get_maintainer.ignore can be used to specify
    email addressees that shall be ignored.
    
    Change-Id: I6db9f769496c1fe4421aa93362032c702a3808c0
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 59ab72d7bc5672eaf74820cde156be313217c087)

diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
index 83a4e5bad2..8b6037b73f 100755
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -1,4 +1,4 @@
-#!/usr/bin/perl -w
+#!/usr/bin/env perl
 # (c) 2007, Joe Perches <joe@perches.com>
 #           created from checkpatch.pl
 #
@@ -10,18 +10,22 @@
 #
 # Licensed under the terms of the GNU GPL License version 2
 
+use warnings;
 use strict;
 
 my $P = $0;
 my $V = '0.26';
 
 use Getopt::Long qw(:config no_auto_abbrev);
+use Cwd;
 use File::Find;
 
+my $cur_path = fastgetcwd() . '/';
 my $lk_path = "./";
 my $email = 1;
 my $email_usename = 1;
 my $email_maintainer = 1;
+my $email_reviewer = 1;
 my $email_list = 1;
 my $email_subscriber_list = 0;
 my $email_git_penguin_chiefs = 0;
@@ -42,10 +46,12 @@ my $output_multiline = 1;
 my $output_separator = ", ";
 my $output_roles = 0;
 my $output_rolestats = 1;
+my $output_section_maxlen = 50;
 my $scm = 0;
 my $web = 0;
 my $subsystem = 0;
 my $status = 0;
+my $letters = "";
 my $keywords = 1;
 my $sections = 0;
 my $file_emails = 0;
@@ -53,6 +59,7 @@ my $from_filename = 0;
 my $pattern_depth = 0;
 my $version = 0;
 my $help = 0;
+my $find_maintainer_files = 0;
 
 my $vcs_used = 0;
 
@@ -128,6 +135,7 @@ my %VCS_cmds_git = (
     "author_pattern" => "^GitAuthor: (.*)",
     "subject_pattern" => "^GitSubject: (.*)",
     "stat_pattern" => "^(\\d+)\\t(\\d+)\\t\$file\$",
+    "file_exists_cmd" => "git ls-files \$file",
 );
 
 my %VCS_cmds_hg = (
@@ -156,6 +164,7 @@ my %VCS_cmds_hg = (
     "author_pattern" => "^HgAuthor: (.*)",
     "subject_pattern" => "^HgSubject: (.*)",
     "stat_pattern" => "^(\\d+)\t(\\d+)\t\$file\$",
+    "file_exists_cmd" => "hg files \$file",
 );
 
 my $conf = which_conf(".get_maintainer.conf");
@@ -184,6 +193,27 @@ if (-f $conf) {
     unshift(@ARGV, @conf_args) if @conf_args;
 }
 
+my @ignore_emails = ();
+my $ignore_file = which_conf(".get_maintainer.ignore");
+if (-f $ignore_file) {
+    open(my $ignore, '<', "$ignore_file")
+	or warn "$P: Can't find a readable .get_maintainer.ignore file $!\n";
+    while (<$ignore>) {
+	my $line = $_;
+
+	$line =~ s/\s*\n?$//;
+	$line =~ s/^\s*//;
+	$line =~ s/\s+$//;
+	$line =~ s/#.*$//;
+
+	next if ($line =~ m/^\s*$/);
+	if (rfc822_valid($line)) {
+	    push(@ignore_emails, $line);
+	}
+    }
+    close($ignore);
+}
+
 if (!GetOptions(
 		'email!' => \$email,
 		'git!' => \$email_git,
@@ -201,6 +231,7 @@ if (!GetOptions(
 		'remove-duplicates!' => \$email_remove_duplicates,
 		'mailmap!' => \$email_use_mailmap,
 		'm!' => \$email_maintainer,
+		'r!' => \$email_reviewer,
 		'n!' => \$email_usename,
 		'l!' => \$email_list,
 		's!' => \$email_subscriber_list,
@@ -212,11 +243,13 @@ if (!GetOptions(
 		'status!' => \$status,
 		'scm!' => \$scm,
 		'web!' => \$web,
+		'letters=s' => \$letters,
 		'pattern-depth=i' => \$pattern_depth,
 		'k|keywords!' => \$keywords,
 		'sections!' => \$sections,
 		'fe|file-emails!' => \$file_emails,
 		'f|file' => \$from_filename,
+		'find-maintainer-files' => \$find_maintainer_files,
 		'v|version' => \$version,
 		'h|help|usage' => \$help,
 		)) {
@@ -242,7 +275,8 @@ $output_multiline = 0 if ($output_separator ne ", ");
 $output_rolestats = 1 if ($interactive);
 $output_roles = 1 if ($output_rolestats);
 
-if ($sections) {
+if ($sections || $letters ne "") {
+    $sections = 1;
     $email = 0;
     $email_list = 0;
     $scm = 0;
@@ -259,42 +293,28 @@ if ($sections) {
 }
 
 if ($email &&
-    ($email_maintainer + $email_list + $email_subscriber_list +
+    ($email_maintainer + $email_reviewer +
+     $email_list + $email_subscriber_list +
      $email_git + $email_git_penguin_chiefs + $email_git_blame) == 0) {
     die "$P: Please select at least 1 email option\n";
 }
 
 if (!top_of_kernel_tree($lk_path)) {
     die "$P: The current directory does not appear to be "
-	. "a linux kernel source tree.\n";
+	. "a U-Boot source tree.\n";
 }
 
 ## Read MAINTAINERS for type/value pairs
 
 my @typevalue = ();
 my %keyword_hash;
+my @mfiles = ();
 
-my @maint_files = ();
-push(@maint_files, "${lk_path}MAINTAINERS");
-
-sub maint_wanted {
-    return unless $_ =~ /^MAINTAINERS/;
-    push(@maint_files, "$File::Find::name");
-}
-
-File::Find::find(\&maint_wanted, "${lk_path}board");
-
-foreach my $maint_file (@maint_files) {
-    my $maint;
-    open ($maint, '<', "$maint_file")
-	or die "$P: Can't open $maint_file: $!\n";
-    read_maintainers($maint);
-    close($maint);
-}
-
-sub read_maintainers {
-    my ($maint) = @_;
+sub read_maintainer_file {
+    my ($file) = @_;
 
+    open (my $maint, '<', "$file")
+	or die "$P: Can't open MAINTAINERS file '$file': $!\n";
     while (<$maint>) {
 	my $line = $_;
 
@@ -315,13 +335,47 @@ sub read_maintainers {
 		$keyword_hash{@typevalue} = $value;
 	    }
 	    push(@typevalue, "$type:$value");
-	} elsif (!/^(\s)*$/) {
+	} elsif (!(/^\s*$/ || /^\s*\#/)) {
 	    $line =~ s/\n$//g;
 	    push(@typevalue, $line);
 	}
     }
+    close($maint);
+}
+
+sub find_is_maintainer_file {
+    my ($file) = $_;
+    return if ($file !~ m@/MAINTAINERS$@);
+    $file = $File::Find::name;
+    return if (! -f $file);
+    push(@mfiles, $file);
+}
+
+sub find_ignore_git {
+    return grep { $_ !~ /^\.git$/; } @_;
+}
+
+if (-d "${lk_path}MAINTAINERS") {
+    opendir(DIR, "${lk_path}MAINTAINERS") or die $!;
+    my @files = readdir(DIR);
+    closedir(DIR);
+    foreach my $file (@files) {
+	push(@mfiles, "${lk_path}MAINTAINERS/$file") if ($file !~ /^\./);
+    }
 }
 
+if ($find_maintainer_files) {
+    find( { wanted => \&find_is_maintainer_file,
+	    preprocess => \&find_ignore_git,
+	    no_chdir => 1,
+	}, "${lk_path}");
+} else {
+    push(@mfiles, "${lk_path}MAINTAINERS") if -f "${lk_path}MAINTAINERS";
+}
+
+foreach my $file (@mfiles) {
+    read_maintainer_file("$file");
+}
 
 #
 # Read mail address map
@@ -421,7 +475,9 @@ foreach my $file (@ARGV) {
 	    die "$P: file '${file}' not found\n";
 	}
     }
-    if ($from_filename) {
+    if ($from_filename || ($file ne "&STDIN" && vcs_file_exists($file))) {
+	$file =~ s/^\Q${cur_path}\E//;	#strip any absolute path
+	$file =~ s/^\Q${lk_path}\E//;	#or the path to the lk tree
 	push(@files, $file);
 	if ($file ne "MAINTAINERS" && -f $file && ($keywords || $file_emails)) {
 	    open(my $f, '<', $file)
@@ -528,6 +584,16 @@ if ($web) {
 
 exit($exit);
 
+sub ignore_email_address {
+    my ($address) = @_;
+
+    foreach my $ignore (@ignore_emails) {
+	return 1 if ($ignore eq $address);
+    }
+
+    return 0;
+}
+
 sub range_is_maintained {
     my ($start, $end) = @_;
 
@@ -659,8 +725,10 @@ sub get_maintainers {
 			$line =~ s/\\\./\./g;       	##Convert \. to .
 			$line =~ s/\.\*/\*/g;       	##Convert .* to *
 		    }
-		    $line =~ s/^([A-Z]):/$1:\t/g;
-		    print("$line\n");
+		    my $count = $line =~ s/^([A-Z]):/$1:\t/g;
+		    if ($letters eq "" || (!$count || $letters =~ /$1/i)) {
+			print("$line\n");
+		    }
 		}
 		print("\n");
 	    }
@@ -764,10 +832,12 @@ MAINTAINER field selection options:
     --git-max-maintainers => maximum maintainers to add (default: $email_git_max_maintainers)
     --git-min-percent => minimum percentage of commits required (default: $email_git_min_percent)
     --git-blame => use git blame to find modified commits for patch or file
+    --git-blame-signatures => when used with --git-blame, also include all commit signers
     --git-since => git history to use (default: $email_git_since)
     --hg-since => hg history to use (default: $email_hg_since)
     --interactive => display a menu (mostly useful if used with the --git option)
     --m => include maintainer(s) if any
+    --r => include reviewer(s) if any
     --n => include name 'Full Name <addr\@domain.tld>'
     --l => include list(s) if any
     --s => include subscriber only list(s) if any
@@ -789,12 +859,13 @@ Other options:
   --pattern-depth => Number of pattern directory traversals (default: 0 (all))
   --keywords => scan patch for keywords (default: $keywords)
   --sections => print all of the subsystem sections with pattern matches
+  --letters => print all matching 'letter' types from all matching sections
   --mailmap => use .mailmap file (default: $email_use_mailmap)
   --version => show version
   --help => show this help information
 
 Default options:
-  [--email --nogit --git-fallback --m --n --l --multiline -pattern-depth=0
+  [--email --nogit --git-fallback --m --r --n --l --multiline --pattern-depth=0
    --remove-duplicates --rolestats]
 
 Notes:
@@ -826,6 +897,9 @@ Notes:
       Entries in this file can be any command line argument.
       This file is prepended to any additional command line arguments.
       Multiple lines and # comments are allowed.
+  Most options have both positive and negative forms.
+      The negative forms for --<foo> are --no<foo> and --no-<foo>.
+
 EOT
 }
 
@@ -836,7 +910,7 @@ sub top_of_kernel_tree {
 	$lk_path .= "/";
     }
     if (   (-f "${lk_path}Kbuild")
-	&& (-f "${lk_path}MAINTAINERS")
+	&& (-e "${lk_path}MAINTAINERS")
 	&& (-f "${lk_path}Makefile")
 	&& (-f "${lk_path}README")
 	&& (-d "${lk_path}arch")
@@ -954,20 +1028,29 @@ sub find_ending_index {
     return $index;
 }
 
-sub get_maintainer_role {
+sub get_subsystem_name {
     my ($index) = @_;
 
-    my $i;
     my $start = find_starting_index($index);
-    my $end = find_ending_index($index);
 
-    my $role = "unknown";
     my $subsystem = $typevalue[$start];
-    if (length($subsystem) > 20) {
-	$subsystem = substr($subsystem, 0, 17);
+    if ($output_section_maxlen && length($subsystem) > $output_section_maxlen) {
+	$subsystem = substr($subsystem, 0, $output_section_maxlen - 3);
 	$subsystem =~ s/\s*$//;
 	$subsystem = $subsystem . "...";
     }
+    return $subsystem;
+}
+
+sub get_maintainer_role {
+    my ($index) = @_;
+
+    my $i;
+    my $start = find_starting_index($index);
+    my $end = find_ending_index($index);
+
+    my $role = "unknown";
+    my $subsystem = get_subsystem_name($index);
 
     for ($i = $start + 1; $i < $end; $i++) {
 	my $tv = $typevalue[$i];
@@ -1001,16 +1084,7 @@ sub get_maintainer_role {
 sub get_list_role {
     my ($index) = @_;
 
-    my $i;
-    my $start = find_starting_index($index);
-    my $end = find_ending_index($index);
-
-    my $subsystem = $typevalue[$start];
-    if (length($subsystem) > 20) {
-	$subsystem = substr($subsystem, 0, 17);
-	$subsystem =~ s/\s*$//;
-	$subsystem = $subsystem . "...";
-    }
+    my $subsystem = get_subsystem_name($index);
 
     if ($subsystem eq "THE REST") {
 	$subsystem = "";
@@ -1084,6 +1158,23 @@ sub add_categories {
 		    my $role = get_maintainer_role($i);
 		    push_email_addresses($pvalue, $role);
 		}
+	    } elsif ($ptype eq "R") {
+		my ($name, $address) = parse_email($pvalue);
+		if ($name eq "") {
+		    if ($i > 0) {
+			my $tv = $typevalue[$i - 1];
+			if ($tv =~ m/^([A-Z]):\s*(.*)/) {
+			    if ($1 eq "P") {
+				$name = $2;
+				$pvalue = format_email($name, $address, $email_usename);
+			    }
+			}
+		    }
+		}
+		if ($email_reviewer) {
+		    my $subsystem = get_subsystem_name($i);
+		    push_email_addresses($pvalue, "reviewer:$subsystem");
+		}
 	    } elsif ($ptype eq "T") {
 		push(@scm, $pvalue);
 	    } elsif ($ptype eq "W") {
@@ -1868,6 +1959,7 @@ sub vcs_assign {
 	my $percent = $sign_offs * 100 / $divisor;
 
 	$percent = 100 if ($percent > 100);
+	next if (ignore_email_address($line));
 	$count++;
 	last if ($sign_offs < $email_git_min_signatures ||
 		 $count > $email_git_max_maintainers ||
@@ -2082,6 +2174,24 @@ sub vcs_file_blame {
     }
 }
 
+sub vcs_file_exists {
+    my ($file) = @_;
+
+    my $exists;
+
+    my $vcs_used = vcs_exists();
+    return 0 if (!$vcs_used);
+
+    my $cmd = $VCS_cmds{"file_exists_cmd"};
+    $cmd =~ s/(\$\w+)/$1/eeg;		# interpolate $cmd
+    $cmd .= " 2>&1";
+    $exists = &{$VCS_cmds{"execute_cmd"}}($cmd);
+
+    return 0 if ($? != 0);
+
+    return $exists;
+}
+
 sub uniq {
     my (@parms) = @_;
 

commit 02234e49dea4c9ca3f58eb0cc13ab9ad9e3d1363
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Oct 12 23:37:37 2017 +0200

    UPSTREAM: usbtty: fix typos
    
    Fix typos in USB tty driver.
    
    Change-Id: Ida39f7d6e86f386173bf4a905ee66d1cfa98aade
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c409336dacff3f48da70727da2dc8a1c47f5bf5e)

diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index 353109c070..182385e499 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -525,7 +525,7 @@ int drv_usbtty_init (void)
 	char * tt;
 	int snlen;
 
-	/* Ger seiral number */
+	/* Get serial number */
 	sn = env_get("serial#");
 	if (!sn)
 		sn = "000000000000";

commit 18a87e935ef39e77bb039a756d11afa3b3fdcd3d
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed Oct 11 20:15:04 2017 -0700

    UPSTREAM: tools: env: Add embedded.c to .gitignore
    
    Change-Id: I81b0fec8fef268598f054103e859250315218ef9
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3b306c37cdf7488254d078ce63f508eaedb2be41)

diff --git a/tools/env/.gitignore b/tools/env/.gitignore
index 804abacc6e..8d28b2b70b 100644
--- a/tools/env/.gitignore
+++ b/tools/env/.gitignore
@@ -1,2 +1,3 @@
+embedded.c
 fw_printenv
 fw_printenv_unstripped

commit c9bf1d5a23dde69f477e1c9c2fa6c32582d2395c
Author: Tom Rini <trini@konsulko.com>
Date:   Wed Oct 11 15:34:33 2017 -0400

    UPSTREAM: cmd/pxe.c: Rework bootargs construction to clarify string checks
    
    As the code currently stands, we first check that the length of the
    given command line, along with ip_str/mac_str along with an additional 1
    for the NULL termination will fit within the buffer we have, and if not,
    we return an error.  The way this code was originally written however
    left Coverity "unhappy" due to using strcat rather than strncat.
    Switching this to strncat however causes clang to be unhappy that we
    aren't enforcing the "1" portion within strncat.  Rather than further
    re-work the code to include a "- 1" in this case as well, make the
    strcat code only be done within the else side of the length test.  This
    keeps both clang and Coverity happy.
    
    Fixes: 48ee0a87bc46 ("cmd/pxe.c: Rework initrd and bootargs handling slightly")
    Change-Id: I6a3d3ea54d6b7e1f3c2aed200b2f706f42d570d4
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 59ee8f83b6e77550d5697fced4899e9b5173981f)

diff --git a/cmd/pxe.c b/cmd/pxe.c
index a62cbe192a..7043ad11fd 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -686,16 +686,17 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 			       strlen(ip_str), strlen(mac_str),
 			       sizeof(bootargs));
 			return 1;
+		} else {
+			if (label->append)
+				strncpy(bootargs, label->append,
+					sizeof(bootargs));
+			strcat(bootargs, ip_str);
+			strcat(bootargs, mac_str);
+
+			cli_simple_process_macros(bootargs, finalbootargs);
+			env_set("bootargs", finalbootargs);
+			printf("append: %s\n", finalbootargs);
 		}
-
-		if (label->append)
-			strncpy(bootargs, label->append, sizeof(bootargs));
-		strncat(bootargs, ip_str, sizeof(bootargs) - strlen(bootargs));
-		strncat(bootargs, mac_str, sizeof(bootargs) - strlen(bootargs));
-
-		cli_simple_process_macros(bootargs, finalbootargs);
-		env_set("bootargs", finalbootargs);
-		printf("append: %s\n", finalbootargs);
 	}
 
 	bootm_argv[1] = env_get("kernel_addr_r");

commit 96f111c8b8148a57efa83a1e739983491b37eaa9
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Oct 11 23:56:10 2017 +0900

    UPSTREAM: kbuild: fix dependency of DT build
    
    I saw a DT build issue report some time before [1].  I was able to
    reproduce the bug, and figure out the root cause.
    
    Since commit 6d427c6b1fa0 ("binman: Automatically include a U-Boot
    .dtsi file"), invalid .*.cmd files are generated.
    
    Since that commit, DTS files are put into sed and piped to CPP.
    Because CPP reads the stream from stdin, -Wp,-MD,$(depfile).pre.tmp
    option generates a depfile with the target name "-".  This is not
    the format expected by fixdep.
    
    Use one more temporary file instead of using pipe.  With this, deps_
    in the .*.cmd will be fixed.  Having a temp file name in source_ is
    odd, but it is unsed in the build system.  Not a big deal.
    
    [1] https://lists.denx.de/pipermail/u-boot/2017-June/294451.html
    
    Fiexes: 6d427c6b1fa0 ("binman: Automatically include a U-Boot .dtsi file")
    Change-Id: I85b50c565c3d1d6b4c01136d020bc45b87d8087f
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ecc9709fc12cc8e1a07b062d07cb8a5b296888d7)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 2a7ed70cf2..12d1123a07 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -175,7 +175,7 @@ u_boot_dtsi_options = $(wildcard $(dir $<)$(basename $(notdir $<))-u-boot.dtsi)
 # $(warning u_boot_dtsi_options: $(u_boot_dtsi_options))
 
 # We use the first match
-u_boot_dtsi = $(firstword $(u_boot_dtsi_options))
+u_boot_dtsi = $(notdir $(firstword $(u_boot_dtsi_options)))
 
 # Modified for U-Boot
 dtc_cpp_flags  = -Wp,-MD,$(depfile).pre.tmp -nostdinc                    \
@@ -308,9 +308,8 @@ quiet_cmd_dtc = DTC     $@
 # Modified for U-Boot
 # Bring in any U-Boot-specific include at the end of the file
 cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
-	cat $< $(if $(u_boot_dtsi),\
-		| sed "$$ a\#include \"$(u_boot_dtsi)\"") | \
-		$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \
+	(cat $<; $(if $(u_boot_dtsi),echo '\#include "$(u_boot_dtsi)"')) > $(pre-tmp); \
+	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \
 	$(DTC) -O dtb -o $@ -b 0 \
 		-i $(dir $<) $(DTC_FLAGS) \
 		-d $(depfile).dtc.tmp $(dtc-tmp) ; \
@@ -319,6 +318,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
 $(obj)/%.dtb: $(src)/%.dts FORCE
 	$(call if_changed_dep,dtc)
 
+pre-tmp = $(subst $(comma),_,$(dot-target).pre.tmp)
 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
 
 # DTCO

commit f1817ab2ce4b15cd497511c1964a652360748e36
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:43 2017 +0300

    UPSTREAM: common: Remove genimg_get_image()
    
    Removal of the legacy DataFlash code turned genimg_get_image() into a
    no-op. Drop all calls to it and the function itself.
    
    Change-Id: I79fc0cd75fb4ea7bdfd0be8486d8be4b72cd773f
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 137aefba0319eaa69de0707dce01d62339158d4d)

diff --git a/common/bootm.c b/common/bootm.c
index 32b3ea8e2d..9493a306cd 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -810,9 +810,6 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC);
 
-	/* copy from dataflash if needed */
-	img_addr = genimg_get_image(img_addr);
-
 	/* check image type, for FIT images get FIT kernel node */
 	*os_data = *os_len = 0;
 	buf = map_sysmem(img_addr, 0);
diff --git a/common/image-fdt.c b/common/image-fdt.c
index a2ef409836..1e946467e3 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -294,9 +294,6 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 		debug("## Checking for 'FDT'/'FDT Image' at %08lx\n",
 		      fdt_addr);
 
-		/* copy from dataflash if needed */
-		fdt_addr = genimg_get_image(fdt_addr);
-
 		/*
 		 * Check if there is an FDT image at the
 		 * address provided in the second bootm argument
diff --git a/common/image.c b/common/image.c
index ff0486b626..e205b0fbe6 100644
--- a/common/image.c
+++ b/common/image.c
@@ -386,9 +386,6 @@ void image_print_contents(const void *ptr)
  * flag. Verification done covers data and header integrity and os/type/arch
  * fields checking.
  *
- * If dataflash support is enabled routine checks for dataflash addresses
- * and handles required dataflash reads.
- *
  * returns:
  *     pointer to a ramdisk image header, if image was found and valid
  *     otherwise, return NULL
@@ -886,23 +883,6 @@ int genimg_get_format(const void *img_addr)
 	return IMAGE_FORMAT_INVALID;
 }
 
-/**
- * genimg_get_image - get image from special storage (if necessary)
- * @img_addr: image start address
- *
- * genimg_get_image() checks if provided image start address is located
- * in a dataflash storage. If so, image is moved to a system RAM memory.
- *
- * returns:
- *     image start address after possible relocation from special storage
- */
-ulong genimg_get_image(ulong img_addr)
-{
-	ulong ram_addr = img_addr;
-
-	return ram_addr;
-}
-
 /**
  * fit_has_config - check if there is a valid FIT configuration
  * @images: pointer to the bootm command headers structure
@@ -1035,9 +1015,6 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
 		}
 #endif
 
-		/* copy from dataflash if needed */
-		rd_addr = genimg_get_image(rd_addr);
-
 		/*
 		 * Check if there is an initrd image at the
 		 * address provided in the second bootm argument
@@ -1269,10 +1246,8 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
 
 	/*
 	 * Obtain the os FIT header from the images struct
-	 * copy from dataflash if needed
 	 */
 	tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
-	tmp_img_addr = genimg_get_image(tmp_img_addr);
 	buf = map_sysmem(tmp_img_addr, 0);
 	/*
 	 * Check image type. For FIT images get FIT node
@@ -1381,10 +1356,8 @@ int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
 
 	/*
 	 * Obtain the os FIT header from the images struct
-	 * copy from dataflash if needed
 	 */
 	tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
-	tmp_img_addr = genimg_get_image(tmp_img_addr);
 	buf = map_sysmem(tmp_img_addr, 0);
 	/*
 	 * Check image type. For FIT images get FIT node
diff --git a/include/image.h b/include/image.h
index 3e2da587ba..688f00fb88 100644
--- a/include/image.h
+++ b/include/image.h
@@ -559,7 +559,6 @@ ulong genimg_get_kernel_addr_fit(char * const img_addr,
 ulong genimg_get_kernel_addr(char * const img_addr);
 int genimg_get_format(const void *img_addr);
 int genimg_has_config(bootm_headers_t *images);
-ulong genimg_get_image(ulong img_addr);
 
 int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
 		uint8_t arch, const ulong *ld_start, ulong * const ld_len);

commit b0ec94428e54da320f890e293bacdedd40ef45e0
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:42 2017 +0300

    UPSTREAM: Drop CONFIG_HAS_DATAFLASH
    
    Last user of this option went away in commit:
    
    fdc7718999 ("board: usb_a9263: Update to support DT and DM")
    
    Change-Id: Id05869deccb88c1102700dd5af58a8c249e3e9e2
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c68c03f52badc90951dbf8a054c0e500e04bf365)

diff --git a/README b/README
index 788564070e..f0956d9153 100644
--- a/README
+++ b/README
@@ -2367,13 +2367,6 @@ The following options need to be configured:
 		this is instead controlled by the value of
 		/config/load-environment.
 
-- DataFlash Support:
-		CONFIG_HAS_DATAFLASH
-
-		Defining this option enables DataFlash features and
-		allows to read/write in Dataflash via the standard
-		commands cp, md...
-
 - Serial Flash support
 		Usage requires an initial 'sf probe' to define the serial
 		flash parameters, followed by read/write/erase/update
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
index 912a966bae..bb3e36552a 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
@@ -58,7 +58,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
index 4bd4e75e0b..58050a2a24 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
@@ -55,7 +55,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
index f3f480010a..674eb66e8e 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
@@ -59,7 +59,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_b_periph(AT91_PIO_PORTA, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
index eddfdb0853..b9efa273a0 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
@@ -56,7 +56,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTB, 0, PUP);	/* SPI0_MISO */
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
index dbf9386faa..cd38c6597a 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
@@ -55,7 +55,7 @@ void at91_seriald_hw_init(void)
 	at91_periph_clk_enable(ATMEL_ID_SYS);
 }
 
-#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
+#ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
 	at91_set_a_periph(AT91_PIO_PORTA, 25, PUP);	/* SPI0_MISO */
diff --git a/board/atmel/at91sam9260ek/Makefile b/board/atmel/at91sam9260ek/Makefile
index 07c6184352..ad95928701 100644
--- a/board/atmel/at91sam9260ek/Makefile
+++ b/board/atmel/at91sam9260ek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y	+= at91sam9260ek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9260ek/partition.c b/board/atmel/at91sam9260ek/partition.c
deleted file mode 100644
index e41eefe461..0000000000
--- a/board/atmel/at91sam9260ek/partition.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1}
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/atmel/at91sam9261ek/Makefile b/board/atmel/at91sam9261ek/Makefile
index d7ba1533d8..1e807ecc14 100644
--- a/board/atmel/at91sam9261ek/Makefile
+++ b/board/atmel/at91sam9261ek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y += at91sam9261ek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9261ek/partition.c b/board/atmel/at91sam9261ek/partition.c
deleted file mode 100644
index ed97609297..0000000000
--- a/board/atmel/at91sam9261ek/partition.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3}
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/atmel/at91sam9263ek/Makefile b/board/atmel/at91sam9263ek/Makefile
index f3cd9d556e..b7a30ee6ef 100644
--- a/board/atmel/at91sam9263ek/Makefile
+++ b/board/atmel/at91sam9263ek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y += at91sam9263ek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9263ek/partition.c b/board/atmel/at91sam9263ek/partition.c
deleted file mode 100644
index 8617f4899c..0000000000
--- a/board/atmel/at91sam9263ek/partition.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/atmel/at91sam9rlek/Makefile b/board/atmel/at91sam9rlek/Makefile
index 7acfee5350..89f6c0833c 100644
--- a/board/atmel/at91sam9rlek/Makefile
+++ b/board/atmel/at91sam9rlek/Makefile
@@ -11,4 +11,3 @@
 
 obj-y += at91sam9rlek.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/atmel/at91sam9rlek/partition.c b/board/atmel/at91sam9rlek/partition.c
deleted file mode 100644
index 8617f4899c..0000000000
--- a/board/atmel/at91sam9rlek/partition.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00083FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00084000, 0x00293FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00294000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
diff --git a/board/esd/meesc/Makefile b/board/esd/meesc/Makefile
index 5d1673820d..f3bf05d47b 100644
--- a/board/esd/meesc/Makefile
+++ b/board/esd/meesc/Makefile
@@ -10,4 +10,3 @@
 #
 
 obj-y	+= meesc.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/esd/meesc/partition.c b/board/esd/meesc/partition.c
deleted file mode 100644
index b6afafc239..0000000000
--- a/board/esd/meesc/partition.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/* define the area offsets */
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-};
diff --git a/board/mini-box/picosam9g45/picosam9g45.c b/board/mini-box/picosam9g45/picosam9g45.c
index 09ec247663..f3263eba6e 100644
--- a/board/mini-box/picosam9g45/picosam9g45.c
+++ b/board/mini-box/picosam9g45/picosam9g45.c
@@ -261,9 +261,6 @@ int board_init(void)
 #ifdef CONFIG_CMD_USB
 	picosam9g45_usb_hw_init();
 #endif
-#ifdef CONFIG_HAS_DATAFLASH
-	at91_spi0_hw_init(1 << 0);
-#endif
 #ifdef CONFIG_ATMEL_SPI
 	at91_spi0_hw_init(1 << 4);
 #endif
diff --git a/board/ronetix/pm9261/Makefile b/board/ronetix/pm9261/Makefile
index 90835d372f..a133b07d0b 100644
--- a/board/ronetix/pm9261/Makefile
+++ b/board/ronetix/pm9261/Makefile
@@ -12,4 +12,3 @@
 
 obj-y += pm9261.o
 obj-$(CONFIG_RED_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/ronetix/pm9261/partition.c b/board/ronetix/pm9261/partition.c
deleted file mode 100644
index 23ab8cf8a0..0000000000
--- a/board/ronetix/pm9261/partition.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- * Ilko Iliev <www.ronetix.at>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-#ifdef CONFIG_SYS_USE_DATAFLASH
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
-#else
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, ""},
-};
-
-#endif
diff --git a/board/ronetix/pm9263/Makefile b/board/ronetix/pm9263/Makefile
index 53e621dc80..72aa107b6e 100644
--- a/board/ronetix/pm9263/Makefile
+++ b/board/ronetix/pm9263/Makefile
@@ -12,4 +12,3 @@
 
 obj-y += pm9263.o
 obj-$(CONFIG_AT91_LED) += led.o
-obj-$(CONFIG_HAS_DATAFLASH) += partition.o
diff --git a/board/ronetix/pm9263/partition.c b/board/ronetix/pm9263/partition.c
deleted file mode 100644
index 9cc4214ca6..0000000000
--- a/board/ronetix/pm9263/partition.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2008
- * Ulf Samuelsson <ulf@atmel.com>
- * Ilko Iliev <www.ronetix.at>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-
-struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-};
-
-/*define the area offsets*/
-#ifdef CONFIG_SYS_USE_DATAFLASH
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
-	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
-	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
-	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
-	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
-};
-#else
-dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
-	{0x00000000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR,   0, ""},
-};
-
-#endif
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index d4416e6468..7240c9762e 100644
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -250,9 +250,6 @@ int board_init(void)
 #ifdef CONFIG_ATMEL_SPI
 	at91_spi0_hw_init(1 << 4);
 #endif
-#ifdef CONFIG_HAS_DATAFLASH
-	at91_spi0_hw_init(1 << 0);
-#endif
 #ifdef CONFIG_MACB
 	corvus_macb_hw_init();
 #endif
diff --git a/cmd/flash.c b/cmd/flash.c
index b150940bf3..a2803e8ee4 100644
--- a/cmd/flash.c
+++ b/cmd/flash.c
@@ -11,10 +11,6 @@
 #include <common.h>
 #include <command.h>
 
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
-
 #if defined(CONFIG_CMD_MTDPARTS)
 #include <jffs2/jffs2.h>
 
@@ -279,10 +275,6 @@ static int do_flinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	ulong bank;
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-	dataflash_print_info();
-#endif
-
 #ifdef CONFIG_MTD_NOR_FLASH
 	if (argc == 1) {	/* print info for all FLASH banks */
 		for (bank=0; bank <CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
@@ -451,10 +443,7 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	u8 dev_type, dev_num, pnum;
 #endif
 #endif /* CONFIG_MTD_NOR_FLASH */
-#ifdef CONFIG_HAS_DATAFLASH
-	int status;
-#endif
-#if defined(CONFIG_MTD_NOR_FLASH) || defined(CONFIG_HAS_DATAFLASH)
+#if defined(CONFIG_MTD_NOR_FLASH)
 	int p;
 	ulong addr_first, addr_last;
 #endif
@@ -462,7 +451,7 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (argc < 3)
 		return CMD_RET_USAGE;
 
-#if defined(CONFIG_MTD_NOR_FLASH) || defined(CONFIG_HAS_DATAFLASH)
+#if defined(CONFIG_MTD_NOR_FLASH)
 	if (strcmp(argv[1], "off") == 0)
 		p = 0;
 	else if (strcmp(argv[1], "on") == 0)
@@ -471,24 +460,6 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		return CMD_RET_USAGE;
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-	if ((strcmp(argv[2], "all") != 0) && (strcmp(argv[2], "bank") != 0)) {
-		addr_first = simple_strtoul(argv[2], NULL, 16);
-		addr_last  = simple_strtoul(argv[3], NULL, 16);
-
-		if (addr_dataflash(addr_first) && addr_dataflash(addr_last)) {
-			status = dataflash_real_protect(p,addr_first,addr_last);
-			if (status < 0){
-				puts ("Bad DataFlash sector specification\n");
-				return 1;
-			}
-			printf("%sProtect %d DataFlash Sectors\n",
-				p ? "" : "Un-", status);
-			return 0;
-		}
-	}
-#endif
-
 #ifdef CONFIG_MTD_NOR_FLASH
 	if (strcmp(argv[2], "all") == 0) {
 		for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
diff --git a/cmd/mem.c b/cmd/mem.c
index 27075e54a9..6775ab7733 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -17,9 +17,6 @@
 #include <cli.h>
 #include <command.h>
 #include <console.h>
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
 #include <hash.h>
 #include <inttypes.h>
 #include <mapmem.h>
@@ -52,10 +49,8 @@ static	ulong	base_address = 0;
 #define DISP_LINE_LEN	16
 static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	ulong	addr, length;
-#if defined(CONFIG_HAS_DATAFLASH)
-	ulong	nbytes, linebytes;
-#endif
+	ulong	addr, length, bytes;
+	const void *buf;
 	int	size;
 	int rc = 0;
 
@@ -88,40 +83,13 @@ static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			length = simple_strtoul(argv[2], NULL, 16);
 	}
 
-#if defined(CONFIG_HAS_DATAFLASH)
-	/* Print the lines.
-	 *
-	 * We buffer all read data, so we can make sure data is read only
-	 * once, and all accesses are with the specified bus width.
-	 */
-	nbytes = length * size;
-	do {
-		char	linebuf[DISP_LINE_LEN];
-		void* p;
-		linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
-
-		rc = read_dataflash(addr, (linebytes/size)*size, linebuf);
-		p = (rc == DATAFLASH_OK) ? linebuf : (void*)addr;
-		print_buffer(addr, p, size, linebytes/size, DISP_LINE_LEN/size);
-
-		nbytes -= linebytes;
-		addr += linebytes;
-		if (ctrlc()) {
-			rc = 1;
-			break;
-		}
-	} while (nbytes > 0);
-#else
-	{
-		ulong bytes = size * length;
-		const void *buf = map_sysmem(addr, bytes);
+	bytes = size * length;
+	buf = map_sysmem(addr, bytes);
 
-		/* Print the lines. */
-		print_buffer(addr, buf, size, length, DISP_LINE_LEN / size);
-		addr += bytes;
-		unmap_sysmem(buf);
-	}
-#endif
+	/* Print the lines. */
+	print_buffer(addr, buf, size, length, DISP_LINE_LEN / size);
+	addr += bytes;
+	unmap_sysmem(buf);
 
 	dp_last_addr = addr;
 	dp_last_length = length;
@@ -286,13 +254,6 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	count = simple_strtoul(argv[3], NULL, 16);
 
-#ifdef CONFIG_HAS_DATAFLASH
-	if (addr_dataflash(addr1) | addr_dataflash(addr2)){
-		puts ("Comparison with DataFlash space not supported.\n\r");
-		return 0;
-	}
-#endif
-
 	bytes = size * count;
 	base = buf1 = map_sysmem(addr1, bytes);
 	buf2 = map_sysmem(addr2, bytes);
@@ -370,11 +331,7 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 #ifdef CONFIG_MTD_NOR_FLASH
 	/* check if we are copying to Flash */
-	if ( (addr2info(dest) != NULL)
-#ifdef CONFIG_HAS_DATAFLASH
-	   && (!addr_dataflash(dest))
-#endif
-	   ) {
+	if (addr2info(dest) != NULL) {
 		int rc;
 
 		puts ("Copy to Flash... ");
@@ -389,44 +346,6 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	}
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-	/* Check if we are copying from RAM or Flash to DataFlash */
-	if (addr_dataflash(dest) && !addr_dataflash(addr)){
-		int rc;
-
-		puts ("Copy to DataFlash... ");
-
-		rc = write_dataflash (dest, addr, count*size);
-
-		if (rc != 1) {
-			dataflash_perror (rc);
-			return (1);
-		}
-		puts ("done\n");
-		return 0;
-	}
-
-	/* Check if we are copying from DataFlash to RAM */
-	if (addr_dataflash(addr) && !addr_dataflash(dest)
-#ifdef CONFIG_MTD_NOR_FLASH
-				 && (addr2info(dest) == NULL)
-#endif
-	   ){
-		int rc;
-		rc = read_dataflash(addr, count * size, (char *) dest);
-		if (rc != 1) {
-			dataflash_perror (rc);
-			return (1);
-		}
-		return 0;
-	}
-
-	if (addr_dataflash(addr) && addr_dataflash(dest)){
-		puts ("Unsupported combination of source/destination.\n\r");
-		return 1;
-	}
-#endif
-
 	memcpy((void *)dest, (void *)addr, count * size);
 
 	return 0;
@@ -1072,13 +991,6 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
 		addr += base_address;
 	}
 
-#ifdef CONFIG_HAS_DATAFLASH
-	if (addr_dataflash(addr)){
-		puts ("Can't modify DataFlash in place. Use cp instead.\n\r");
-		return 0;
-	}
-#endif
-
 	/* Print the address, followed by value.  Then accept input for
 	 * the next value.  A non-converted value exits.
 	 */
diff --git a/common/board_r.c b/common/board_r.c
index 94697e7bc1..a3b9bfb8ee 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -18,9 +18,6 @@
 #endif
 #include <command.h>
 #include <console.h>
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
 #include <dm.h>
 #include <environment.h>
 #include <fdtdec.h>
@@ -447,15 +444,6 @@ static int initr_mmc(void)
 }
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-static int initr_dataflash(void)
-{
-	AT91F_DataflashInit();
-	dataflash_print_info();
-	return 0;
-}
-#endif
-
 /*
  * Tell if it's OK to load the environment early in boot.
  *
@@ -802,9 +790,6 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 #ifdef CONFIG_MMC
 	initr_mmc,
-#endif
-#ifdef CONFIG_HAS_DATAFLASH
-	initr_dataflash,
 #endif
 	initr_env,
 #ifdef CONFIG_SYS_BOOTPARAMS_LEN
diff --git a/common/image.c b/common/image.c
index c6168af3c0..ff0486b626 100644
--- a/common/image.c
+++ b/common/image.c
@@ -15,10 +15,6 @@
 #include <status_led.h>
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-#endif
-
 #ifdef CONFIG_LOGBUFFER
 #include <logbuff.h>
 #endif
@@ -904,64 +900,6 @@ ulong genimg_get_image(ulong img_addr)
 {
 	ulong ram_addr = img_addr;
 
-#ifdef CONFIG_HAS_DATAFLASH
-	ulong h_size, d_size;
-
-	if (addr_dataflash(img_addr)) {
-		void *buf;
-
-		/* ger RAM address */
-		ram_addr = CONFIG_SYS_LOAD_ADDR;
-
-		/* get header size */
-		h_size = image_get_header_size();
-#if IMAGE_ENABLE_FIT
-		if (sizeof(struct fdt_header) > h_size)
-			h_size = sizeof(struct fdt_header);
-#endif
-
-		/* read in header */
-		debug("   Reading image header from dataflash address "
-			"%08lx to RAM address %08lx\n", img_addr, ram_addr);
-
-		buf = map_sysmem(ram_addr, 0);
-		read_dataflash(img_addr, h_size, buf);
-
-		/* get data size */
-		switch (genimg_get_format(buf)) {
-#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
-		case IMAGE_FORMAT_LEGACY:
-			d_size = image_get_data_size(buf);
-			debug("   Legacy format image found at 0x%08lx, "
-					"size 0x%08lx\n",
-					ram_addr, d_size);
-			break;
-#endif
-#if IMAGE_ENABLE_FIT
-		case IMAGE_FORMAT_FIT:
-			d_size = fit_get_size(buf) - h_size;
-			debug("   FIT/FDT format image found at 0x%08lx, "
-					"size 0x%08lx\n",
-					ram_addr, d_size);
-			break;
-#endif
-		default:
-			printf("   No valid image found at 0x%08lx\n",
-				img_addr);
-			return ram_addr;
-		}
-
-		/* read in image data */
-		debug("   Reading image remaining data from dataflash address "
-			"%08lx to RAM address %08lx\n", img_addr + h_size,
-			ram_addr + h_size);
-
-		read_dataflash(img_addr + h_size, d_size,
-				(char *)(buf + h_size));
-
-	}
-#endif /* CONFIG_HAS_DATAFLASH */
-
 	return ram_addr;
 }
 
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index bd680a784f..20c0d0af44 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -12,10 +12,8 @@ obj-$(CONFIG_MTD) += mtd-uclass.o
 obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
 obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
 obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
-obj-$(CONFIG_HAS_DATAFLASH) += at45.o
 obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
 obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
-obj-$(CONFIG_HAS_DATAFLASH) += dataflash.o
 obj-$(CONFIG_FTSMC020) += ftsmc020.o
 obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
 obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o
diff --git a/drivers/mtd/at45.c b/drivers/mtd/at45.c
deleted file mode 100644
index 2f49be38b8..0000000000
--- a/drivers/mtd/at45.c
+++ /dev/null
@@ -1,545 +0,0 @@
-/* Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <dataflash.h>
-
-/*
- * spi.c API
- */
-extern unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc);
-extern void AT91F_SpiEnable(int cs);
-
-#define AT91C_TIMEOUT_WRDY			200000
-
-/*----------------------------------------------------------------------*/
-/* \fn    AT91F_DataFlashSendCommand					*/
-/* \brief Generic function to send a command to the dataflash		*/
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash,
-						 unsigned char OpCode,
-						 unsigned int CmdSize,
-						 unsigned int DataflashAddress)
-{
-	unsigned int adr;
-
-	if ((pDataFlash->pDataFlashDesc->state) != IDLE)
-		return DATAFLASH_BUSY;
-
-	/* process the address to obtain page address and byte address */
-	adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) <<
-		pDataFlash->pDevice->page_offset) +
-			(DataflashAddress % (pDataFlash->pDevice->pages_size));
-
-	/* fill the command buffer */
-	pDataFlash->pDataFlashDesc->command[0] = OpCode;
-	if (pDataFlash->pDevice->pages_number >= 16384) {
-		pDataFlash->pDataFlashDesc->command[1] =
-			(unsigned char)((adr & 0x0F000000) >> 24);
-		pDataFlash->pDataFlashDesc->command[2] =
-			(unsigned char)((adr & 0x00FF0000) >> 16);
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)((adr & 0x0000FF00) >> 8);
-		pDataFlash->pDataFlashDesc->command[4] =
-			(unsigned char)(adr & 0x000000FF);
-	} else {
-		pDataFlash->pDataFlashDesc->command[1] =
-			(unsigned char)((adr & 0x00FF0000) >> 16);
-		pDataFlash->pDataFlashDesc->command[2] =
-			(unsigned char)((adr & 0x0000FF00) >> 8);
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)(adr & 0x000000FF);
-		pDataFlash->pDataFlashDesc->command[4] = 0;
-	}
-	pDataFlash->pDataFlashDesc->command[5] = 0;
-	pDataFlash->pDataFlashDesc->command[6] = 0;
-	pDataFlash->pDataFlashDesc->command[7] = 0;
-
-	/* Initialize the SpiData structure for the spi write fuction */
-	pDataFlash->pDataFlashDesc->tx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize;
-	pDataFlash->pDataFlashDesc->rx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize;
-
-	/* send the command and read the data */
-	return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*----------------------------------------------------------------------*/
-/* \fn    AT91F_DataFlashGetStatus					*/
-/* \brief Read the status register of the dataflash			*/
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-{
-	AT91S_DataFlashStatus status;
-
-	/* if a transfert is in progress ==> return 0 */
-	if ((pDesc->state) != IDLE)
-		return DATAFLASH_BUSY;
-
-	/* first send the read status command (D7H) */
-	pDesc->command[0] = DB_STATUS;
-	pDesc->command[1] = 0;
-
-	pDesc->DataFlash_state = GET_STATUS;
-	pDesc->tx_data_size = 0;	/* Transmit the command */
-	/* and receive response */
-	pDesc->tx_cmd_pt = pDesc->command;
-	pDesc->rx_cmd_pt = pDesc->command;
-	pDesc->rx_cmd_size = 2;
-	pDesc->tx_cmd_size = 2;
-	status = AT91F_SpiWrite(pDesc);
-
-	pDesc->DataFlash_state = *((unsigned char *)(pDesc->rx_cmd_pt) + 1);
-
-	return status;
-}
-
-/*----------------------------------------------------------------------*/
-/* \fn    AT91F_DataFlashWaitReady					*/
-/* \brief wait for dataflash ready (bit7 of the status register == 1)	*/
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc
-						pDataFlashDesc,
-						unsigned int timeout)
-{
-	pDataFlashDesc->DataFlash_state = IDLE;
-
-	do {
-		AT91F_DataFlashGetStatus(pDataFlashDesc);
-		timeout--;
-	} while (((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) &&
-		 (timeout > 0));
-
-	if ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
-		return DATAFLASH_ERROR;
-
-	return DATAFLASH_OK;
-}
-
-/*--------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashContinuousRead			    */
-/* Object              : Continuous stream Read			    */
-/* Input Parameters    : DataFlash Service				    */
-/*						: <src> = dataflash address */
-/*                     : <*dataBuffer> = data buffer pointer		    */
-/*                     : <sizeToRead> = data buffer size		    */
-/* Return value		: State of the dataflash			    */
-/*--------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(
-				AT91PS_DataFlash pDataFlash,
-				int src,
-				unsigned char *dataBuffer,
-				int sizeToRead)
-{
-	AT91S_DataFlashStatus status;
-	/* Test the size to read in the device */
-	if ((src + sizeToRead) >
-			(pDataFlash->pDevice->pages_size *
-				(pDataFlash->pDevice->pages_number)))
-		return DATAFLASH_MEMORY_OVERFLOW;
-
-	pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
-	pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-
-	status = AT91F_DataFlashSendCommand(
-			pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
-	/* Send the command to the dataflash */
-	return (status);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashPagePgmBuf			     */
-/* Object              : Main memory page program thru buffer 1 or buffer 2  */
-/* Input Parameters    : DataFlash Service				     */
-/*						: <*src> = Source buffer     */
-/*                     : <dest> = dataflash destination address		     */
-/*                     : <SizeToWrite> = data buffer size		     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash,
-						unsigned char *src,
-						unsigned int dest,
-						unsigned int SizeToWrite)
-{
-	int cmdsize;
-	pDataFlash->pDataFlashDesc->tx_data_pt = src;
-	pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite;
-	pDataFlash->pDataFlashDesc->rx_data_pt = src;
-	pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-
-	cmdsize = 4;
-	/* Send the command to the dataflash */
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(
-			pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_MainMemoryToBufferTransfert		     */
-/* Object              : Read a page in the SRAM Buffer 1 or 2		     */
-/* Input Parameters    : DataFlash Service				     */
-/*                     : Page concerned					     */
-/*                     :						     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
-					AT91PS_DataFlash
-					pDataFlash,
-					unsigned char
-					BufferCommand,
-					unsigned int page)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	if ((BufferCommand != DB_PAGE_2_BUF1_TRF) &&
-			(BufferCommand != DB_PAGE_2_BUF2_TRF)) {
-		return DATAFLASH_BAD_COMMAND;
-	}
-
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(
-			pDataFlash, BufferCommand, cmdsize,
-			page * pDataFlash->pDevice->pages_size));
-}
-
-/*-------------------------------------------------------------------------- */
-/* Function Name       : AT91F_DataFlashWriteBuffer			     */
-/* Object              : Write data to the internal sram buffer 1 or 2	     */
-/* Input Parameters    : DataFlash Service				     */
-/*			: <BufferCommand> = command to write buffer1 or 2    */
-/*                     : <*dataBuffer> = data buffer to write		     */
-/*                     : <bufferAddress> = address in the internal buffer    */
-/*                     : <SizeToWrite> = data buffer size		     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(
-					AT91PS_DataFlash pDataFlash,
-					unsigned char BufferCommand,
-					unsigned char *dataBuffer,
-					unsigned int bufferAddress,
-					int SizeToWrite)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	if ((BufferCommand != DB_BUF1_WRITE) &&
-			(BufferCommand != DB_BUF2_WRITE)) {
-		return DATAFLASH_BAD_COMMAND;
-	}
-
-	/* buffer address must be lower than page size */
-	if (bufferAddress > pDataFlash->pDevice->pages_size)
-		return DATAFLASH_BAD_ADDRESS;
-
-	if ((pDataFlash->pDataFlashDesc->state) != IDLE)
-		return DATAFLASH_BUSY;
-
-	/* Send first Write Command */
-	pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
-	pDataFlash->pDataFlashDesc->command[1] = 0;
-	if (pDataFlash->pDevice->pages_number >= 16384) {
-		pDataFlash->pDataFlashDesc->command[2] = 0;
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)(((unsigned int)(bufferAddress &
-							pDataFlash->pDevice->
-							byte_mask)) >> 8);
-		pDataFlash->pDataFlashDesc->command[4] =
-			(unsigned char)((unsigned int)bufferAddress & 0x00FF);
-		cmdsize = 5;
-	} else {
-		pDataFlash->pDataFlashDesc->command[2] =
-			(unsigned char)(((unsigned int)(bufferAddress &
-							pDataFlash->pDevice->
-							byte_mask)) >> 8);
-		pDataFlash->pDataFlashDesc->command[3] =
-			(unsigned char)((unsigned int)bufferAddress & 0x00FF);
-		pDataFlash->pDataFlashDesc->command[4] = 0;
-		cmdsize = 4;
-	}
-
-	pDataFlash->pDataFlashDesc->tx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize;
-	pDataFlash->pDataFlashDesc->rx_cmd_pt =
-		pDataFlash->pDataFlashDesc->command;
-	pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize;
-
-	pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
-	pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-	pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite;
-
-	return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_PageErase                                     */
-/* Object              : Erase a page					     */
-/* Input Parameters    : DataFlash Service				     */
-/*                     : Page concerned					     */
-/*                     :						     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PageErase(
-					AT91PS_DataFlash pDataFlash,
-					unsigned int page)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(pDataFlash,
-				DB_PAGE_ERASE, cmdsize,
-				page * pDataFlash->pDevice->pages_size));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_BlockErase                                    */
-/* Object              : Erase a Block					     */
-/* Input Parameters    : DataFlash Service				     */
-/*                     : Page concerned					     */
-/*                     :						     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_BlockErase(
-				AT91PS_DataFlash pDataFlash,
-				unsigned int block)
-{
-	int cmdsize;
-	/* Test if the buffer command is legal */
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	return (AT91F_DataFlashSendCommand(pDataFlash, DB_BLOCK_ERASE, cmdsize,
-					block * 8 *
-					pDataFlash->pDevice->pages_size));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_WriteBufferToMain			     */
-/* Object              : Write buffer to the main memory		     */
-/* Input Parameters    : DataFlash Service				     */
-/*		: <BufferCommand> = command to send to buffer1 or buffer2    */
-/*                     : <dest> = main memory address			     */
-/* Return value		: State of the dataflash			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash,
-					unsigned char BufferCommand,
-					unsigned int dest)
-{
-	int cmdsize;
-	/* Test if the buffer command is correct */
-	if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
-			(BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
-			(BufferCommand != DB_BUF2_PAGE_PGM) &&
-			(BufferCommand != DB_BUF2_PAGE_ERASE_PGM))
-		return DATAFLASH_BAD_COMMAND;
-
-	/* no data to transmit or receive */
-	pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
-	cmdsize = 4;
-	if (pDataFlash->pDevice->pages_number >= 16384)
-		cmdsize = 5;
-	/* Send the command to the dataflash */
-	return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand,
-						cmdsize, dest));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_PartialPageWrite				     */
-/* Object              : Erase partielly a page				     */
-/* Input Parameters    : <page> = page number				     */
-/*			: <AdrInpage> = adr to begin the fading		     */
-/*                     : <length> = Number of bytes to erase		     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash,
-					unsigned char *src,
-					unsigned int dest,
-					unsigned int size)
-{
-	unsigned int page;
-	unsigned int AdrInPage;
-
-	page = dest / (pDataFlash->pDevice->pages_size);
-	AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-
-	/* Read the contents of the page in the Sram Buffer */
-	AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
-	AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-				 AT91C_TIMEOUT_WRDY);
-	/*Update the SRAM buffer */
-	AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src,
-					AdrInPage, size);
-
-	AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					AT91C_TIMEOUT_WRDY);
-
-	/* Erase page if a 128 Mbits device */
-	if (pDataFlash->pDevice->pages_number >= 16384) {
-		AT91F_PageErase(pDataFlash, page);
-		/* Rewrite the modified Sram Buffer in the main memory */
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-	}
-
-	/* Rewrite the modified Sram Buffer in the main memory */
-	return (AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM,
-					(page *
-					 pDataFlash->pDevice->pages_size)));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashWrite				     */
-/* Object              :						     */
-/* Input Parameters    : <*src> = Source buffer				     */
-/*                     : <dest> = dataflash adress			     */
-/*                     : <size> = data buffer size			     */
-/*---------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash,
-						unsigned char *src,
-						int dest, int size)
-{
-	unsigned int length;
-	unsigned int page;
-	unsigned int status;
-
-	AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
-	if ((dest + size) > (pDataFlash->pDevice->pages_size *
-			(pDataFlash->pDevice->pages_number)))
-		return DATAFLASH_MEMORY_OVERFLOW;
-
-	/* If destination does not fit a page start address */
-	if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) {
-		length =
-			pDataFlash->pDevice->pages_size -
-			(dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-
-		if (size < length)
-			length = size;
-
-		if (!AT91F_PartialPageWrite(pDataFlash, src, dest, length))
-			return DATAFLASH_ERROR;
-
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-
-		/* Update size, source and destination pointers */
-		size -= length;
-		dest += length;
-		src += length;
-	}
-
-	while ((size - pDataFlash->pDevice->pages_size) >= 0) {
-		/* program dataflash page */
-		page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-
-		status = AT91F_DataFlashWriteBuffer(pDataFlash,
-					DB_BUF1_WRITE, src, 0,
-					pDataFlash->pDevice->
-					pages_size);
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-
-		status = AT91F_PageErase(pDataFlash, page);
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-		if (!status)
-			return DATAFLASH_ERROR;
-
-		status = AT91F_WriteBufferToMain(pDataFlash,
-					 DB_BUF1_PAGE_PGM, dest);
-		if (!status)
-			return DATAFLASH_ERROR;
-
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-
-		/* Update size, source and destination pointers */
-		size -= pDataFlash->pDevice->pages_size;
-		dest += pDataFlash->pDevice->pages_size;
-		src += pDataFlash->pDevice->pages_size;
-	}
-
-	/* If still some bytes to read */
-	if (size > 0) {
-		/* program dataflash page */
-		if (!AT91F_PartialPageWrite(pDataFlash, src, dest, size))
-			return DATAFLASH_ERROR;
-
-		AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					 AT91C_TIMEOUT_WRDY);
-	}
-	return DATAFLASH_OK;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataFlashRead				     */
-/* Object              : Read a block in dataflash			     */
-/* Input Parameters    :						     */
-/* Return value		:						     */
-/*---------------------------------------------------------------------------*/
-int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash,
-			unsigned long addr, unsigned long size, char *buffer)
-{
-	unsigned long SizeToRead;
-
-	AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
-	if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
-		return -1;
-
-	while (size) {
-		SizeToRead = (size < 0x8000) ? size : 0x8000;
-
-		if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
-					AT91C_TIMEOUT_WRDY) !=
-						DATAFLASH_OK)
-			return -1;
-
-		if (AT91F_DataFlashContinuousRead(pDataFlash, addr,
-						(uchar *) buffer,
-						SizeToRead) != DATAFLASH_OK)
-			return -1;
-
-		size -= SizeToRead;
-		addr += SizeToRead;
-		buffer += SizeToRead;
-	}
-
-	return DATAFLASH_OK;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataflashProbe				     */
-/* Object              :						     */
-/* Input Parameters    :						     */
-/* Return value	       : Dataflash status register			     */
-/*---------------------------------------------------------------------------*/
-int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-{
-	AT91F_SpiEnable(cs);
-	AT91F_DataFlashGetStatus(pDesc);
-	return ((pDesc->command[1] == 0xFF) ? 0 : pDesc->command[1] & 0x3C);
-}
diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c
deleted file mode 100644
index e961f518b0..0000000000
--- a/drivers/mtd/dataflash.c
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * LowLevel function for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <config.h>
-#include <asm/hardware.h>
-#include <dataflash.h>
-
-static AT91S_DataFlash DataFlashInst;
-
-extern void AT91F_SpiInit (void);
-extern int AT91F_DataflashProbe (int i, AT91PS_DataflashDesc pDesc);
-extern int AT91F_DataFlashRead (AT91PS_DataFlash pDataFlash,
-				unsigned long addr,
-				unsigned long size, char *buffer);
-extern int AT91F_DataFlashWrite( AT91PS_DataFlash pDataFlash,
-				unsigned char *src,
-				int dest,
-				int size );
-
-int AT91F_DataflashInit (void)
-{
-	int i, j;
-	int dfcode;
-	int part;
-	int found[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-	unsigned char protected;
-
-	AT91F_SpiInit ();
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		found[i] = 0;
-		dataflash_info[i].Desc.state = IDLE;
-		dataflash_info[i].id = 0;
-		dataflash_info[i].Device.pages_number = 0;
-		dfcode = AT91F_DataflashProbe (cs[i].cs,
-				&dataflash_info[i].Desc);
-
-		switch (dfcode) {
-		case AT45DB021:
-			dataflash_info[i].Device.pages_number = 1024;
-			dataflash_info[i].Device.pages_size = 264;
-			dataflash_info[i].Device.page_offset = 9;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB081:
-			dataflash_info[i].Device.pages_number = 4096;
-			dataflash_info[i].Device.pages_size = 264;
-			dataflash_info[i].Device.page_offset = 9;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB161:
-			dataflash_info[i].Device.pages_number = 4096;
-			dataflash_info[i].Device.pages_size = 528;
-			dataflash_info[i].Device.page_offset = 10;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB321:
-			dataflash_info[i].Device.pages_number = 8192;
-			dataflash_info[i].Device.pages_size = 528;
-			dataflash_info[i].Device.page_offset = 10;
-			dataflash_info[i].Device.byte_mask = 0x300;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB642:
-			dataflash_info[i].Device.pages_number = 8192;
-			dataflash_info[i].Device.pages_size = 1056;
-			dataflash_info[i].Device.page_offset = 11;
-			dataflash_info[i].Device.byte_mask = 0x700;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		case AT45DB128:
-			dataflash_info[i].Device.pages_number = 16384;
-			dataflash_info[i].Device.pages_size = 1056;
-			dataflash_info[i].Device.page_offset = 11;
-			dataflash_info[i].Device.byte_mask = 0x700;
-			dataflash_info[i].Device.cs = cs[i].cs;
-			dataflash_info[i].Desc.DataFlash_state = IDLE;
-			dataflash_info[i].logical_address = cs[i].addr;
-			dataflash_info[i].id = dfcode;
-			found[i] += dfcode;
-			break;
-
-		default:
-			dfcode = 0;
-			break;
-		}
-		/* set the last area end to the dataflash size*/
-		dataflash_info[i].end_address =
-				(dataflash_info[i].Device.pages_number *
-				dataflash_info[i].Device.pages_size) - 1;
-
-		part = 0;
-		/* set the area addresses */
-		for(j = 0; j < NB_DATAFLASH_AREA; j++) {
-			if(found[i]!=0) {
-				dataflash_info[i].Device.area_list[j].start =
-					area_list[part].start +
-					dataflash_info[i].logical_address;
-				if(area_list[part].end == 0xffffffff) {
-					dataflash_info[i].Device.area_list[j].end =
-						dataflash_info[i].end_address +
-						dataflash_info[i].logical_address;
-				} else {
-					dataflash_info[i].Device.area_list[j].end =
-						area_list[part].end +
-						dataflash_info[i].logical_address;
-				}
-				protected = area_list[part].protected;
-				/* Set the environment according to the label...*/
-				if(protected == FLAG_PROTECT_INVALID) {
-					dataflash_info[i].Device.area_list[j].protected =
-						FLAG_PROTECT_INVALID;
-				} else {
-					dataflash_info[i].Device.area_list[j].protected =
-						protected;
-				}
-				strcpy((char*)(dataflash_info[i].Device.area_list[j].label),
-						(const char *)area_list[part].label);
-			}
-			part++;
-		}
-	}
-	return found[0];
-}
-
-void AT91F_Dataflashenv_set(void)
-{
-	int i, j;
-	int part;
-	unsigned char env;
-	unsigned char s[32];	/* Will fit a long int in hex */
-	unsigned long start;
-
-	for (i = 0, part= 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		for(j = 0; j < NB_DATAFLASH_AREA; j++) {
-			env = area_list[part].setenv;
-			/* Set the environment according to the label...*/
-			if((env & FLAG_SETENV) == FLAG_SETENV) {
-				start = dataflash_info[i].Device.area_list[j].start;
-				sprintf((char *)s, "%lX", start);
-				env_set((char *)area_list[part].label,
-					(char *)s);
-			}
-			part++;
-		}
-	}
-}
-
-void dataflash_print_info (void)
-{
-	int i, j;
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		if (dataflash_info[i].id != 0) {
-			printf("DataFlash:");
-			switch (dataflash_info[i].id) {
-			case AT45DB021:
-				printf("AT45DB021\n");
-				break;
-			case AT45DB161:
-				printf("AT45DB161\n");
-				break;
-
-			case AT45DB321:
-				printf("AT45DB321\n");
-				break;
-
-			case AT45DB642:
-				printf("AT45DB642\n");
-				break;
-			case AT45DB128:
-				printf("AT45DB128\n");
-				break;
-			}
-
-			printf("Nb pages: %6d\n"
-				"Page Size: %6d\n"
-				"Size=%8d bytes\n"
-				"Logical address: 0x%08X\n",
-				(unsigned int) dataflash_info[i].Device.pages_number,
-				(unsigned int) dataflash_info[i].Device.pages_size,
-				(unsigned int) dataflash_info[i].Device.pages_number *
-				dataflash_info[i].Device.pages_size,
-				(unsigned int) dataflash_info[i].logical_address);
-			for (j = 0; j < NB_DATAFLASH_AREA; j++) {
-				switch(dataflash_info[i].Device.area_list[j].protected) {
-				case	FLAG_PROTECT_SET:
-				case	FLAG_PROTECT_CLEAR:
-					printf("Area %i:\t%08lX to %08lX %s", j,
-						dataflash_info[i].Device.area_list[j].start,
-						dataflash_info[i].Device.area_list[j].end,
-						(dataflash_info[i].Device.area_list[j].protected==FLAG_PROTECT_SET) ? "(RO)" : "    ");
-						printf(" %s\n",	dataflash_info[i].Device.area_list[j].label);
-					break;
-				case	FLAG_PROTECT_INVALID:
-					break;
-				}
-			}
-		}
-	}
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : AT91F_DataflashSelect				     */
-/* Object              : Select the correct device			     */
-/*---------------------------------------------------------------------------*/
-AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash,
-				unsigned long *addr)
-{
-	char addr_valid = 0;
-	int i;
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++)
-		if ( dataflash_info[i].id
-			&& ((((int) *addr) & 0xFF000000) ==
-			dataflash_info[i].logical_address)) {
-			addr_valid = 1;
-			break;
-		}
-	if (!addr_valid) {
-		pFlash = (AT91PS_DataFlash) 0;
-		return pFlash;
-	}
-	pFlash->pDataFlashDesc = &(dataflash_info[i].Desc);
-	pFlash->pDevice = &(dataflash_info[i].Device);
-	*addr -= dataflash_info[i].logical_address;
-	return (pFlash);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : addr_dataflash					     */
-/* Object              : Test if address is valid			     */
-/*---------------------------------------------------------------------------*/
-int addr_dataflash (unsigned long addr)
-{
-	int addr_valid = 0;
-	int i;
-
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		if ((((int) addr) & 0xFF000000) ==
-			dataflash_info[i].logical_address) {
-			addr_valid = 1;
-			break;
-		}
-	}
-
-	return addr_valid;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : size_dataflash					     */
-/* Object              : Test if address is valid regarding the size	     */
-/*---------------------------------------------------------------------------*/
-int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr,
-			unsigned long size)
-{
-	/* is outside the dataflash */
-	if (((int)addr & 0x0FFFFFFF) > (pdataFlash->pDevice->pages_size *
-		pdataFlash->pDevice->pages_number)) return 0;
-	/* is too large for the dataflash */
-	if (size > ((pdataFlash->pDevice->pages_size *
-		pdataFlash->pDevice->pages_number) -
-		((int)addr & 0x0FFFFFFF))) return 0;
-
-	return 1;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : prot_dataflash					     */
-/* Object              : Test if destination area is protected		     */
-/*---------------------------------------------------------------------------*/
-int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr)
-{
-	int area;
-
-	/* find area */
-	for (area = 0; area < NB_DATAFLASH_AREA; area++) {
-		if ((addr >= pdataFlash->pDevice->area_list[area].start) &&
-			(addr < pdataFlash->pDevice->area_list[area].end))
-			break;
-	}
-	if (area == NB_DATAFLASH_AREA)
-		return -1;
-
-	/*test protection value*/
-	if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET)
-		return 0;
-	if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_INVALID)
-		return 0;
-
-	return 1;
-}
-
-/*--------------------------------------------------------------------------*/
-/* Function Name       : dataflash_real_protect				    */
-/* Object              : protect/unprotect area				    */
-/*--------------------------------------------------------------------------*/
-int dataflash_real_protect (int flag, unsigned long start_addr,
-				unsigned long end_addr)
-{
-	int i,j, area1, area2, addr_valid = 0;
-
-	/* find dataflash */
-	for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) {
-		if ((((int) start_addr) & 0xF0000000) ==
-			dataflash_info[i].logical_address) {
-				addr_valid = 1;
-				break;
-		}
-	}
-	if (!addr_valid) {
-		return -1;
-	}
-	/* find start area */
-	for (area1 = 0; area1 < NB_DATAFLASH_AREA; area1++) {
-		if (start_addr == dataflash_info[i].Device.area_list[area1].start)
-			break;
-	}
-	if (area1 == NB_DATAFLASH_AREA) return -1;
-	/* find end area */
-	for (area2 = 0; area2 < NB_DATAFLASH_AREA; area2++) {
-		if (end_addr == dataflash_info[i].Device.area_list[area2].end)
-			break;
-	}
-	if (area2 == NB_DATAFLASH_AREA)
-		return -1;
-
-	/*set protection value*/
-	for(j = area1; j < area2 + 1 ; j++)
-		if(dataflash_info[i].Device.area_list[j].protected
-				!= FLAG_PROTECT_INVALID) {
-			if (flag == 0) {
-				dataflash_info[i].Device.area_list[j].protected
-					= FLAG_PROTECT_CLEAR;
-			} else {
-				dataflash_info[i].Device.area_list[j].protected
-					= FLAG_PROTECT_SET;
-			}
-		}
-
-	return (area2 - area1 + 1);
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : read_dataflash					     */
-/* Object              : dataflash memory read				     */
-/*---------------------------------------------------------------------------*/
-int read_dataflash (unsigned long addr, unsigned long size, char *result)
-{
-	unsigned long AddrToRead = addr;
-	AT91PS_DataFlash pFlash = &DataFlashInst;
-
-	pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
-
-	if (pFlash == 0)
-		return ERR_UNKNOWN_FLASH_TYPE;
-
-	if (size_dataflash(pFlash,addr,size) == 0)
-		return ERR_INVAL;
-
-	return (AT91F_DataFlashRead (pFlash, AddrToRead, size, result));
-}
-
-/*---------------------------------------------------------------------------*/
-/* Function Name       : write_dataflash				     */
-/* Object              : write a block in dataflash			     */
-/*---------------------------------------------------------------------------*/
-int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
-			unsigned long size)
-{
-	unsigned long AddrToWrite = addr_dest;
-	AT91PS_DataFlash pFlash = &DataFlashInst;
-
-	pFlash = AT91F_DataflashSelect (pFlash, &AddrToWrite);
-
-	if (pFlash == 0)
-		return ERR_UNKNOWN_FLASH_TYPE;
-
-	if (size_dataflash(pFlash,addr_dest,size) == 0)
-		return ERR_INVAL;
-
-	if (prot_dataflash(pFlash,addr_dest) == 0)
-		return ERR_PROTECTED;
-
-	if (AddrToWrite == -1)
-		return -1;
-
-	return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src,
-						AddrToWrite, size);
-}
-
-void dataflash_perror (int err)
-{
-	switch (err) {
-	case ERR_OK:
-		break;
-	case ERR_TIMOUT:
-		printf("Timeout writing to DataFlash\n");
-		break;
-	case ERR_PROTECTED:
-		printf("Can't write to protected/invalid DataFlash sectors\n");
-		break;
-	case ERR_INVAL:
-		printf("Outside available DataFlash\n");
-		break;
-	case ERR_UNKNOWN_FLASH_TYPE:
-		printf("Unknown Type of DataFlash\n");
-		break;
-	case ERR_PROG_ERROR:
-		printf("General DataFlash Programming Error\n");
-		break;
-	default:
-		printf("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err);
-		break;
-	}
-}
diff --git a/include/dataflash.h b/include/dataflash.h
deleted file mode 100644
index c9f22200cf..0000000000
--- a/include/dataflash.h
+++ /dev/null
@@ -1,205 +0,0 @@
-/*
- * (C) Copyright 2003
- * Data Flash Atmel Description File
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/* File Name		: dataflash.h					*/
-/* Object		: Data Flash Atmel Description File		*/
-/* Translator		:						*/
-/*									*/
-/* 1.0 03/04/01 HI	: Creation					*/
-/* 1.2 20/10/02 FB	: Adapatation Service and Lib v3		*/
-/*----------------------------------------------------------------------*/
-
-#ifndef _DataFlash_h
-#define _DataFlash_h
-
-
-#include "config.h"
-
-/*number of protected area*/
-#define NB_DATAFLASH_AREA		5
-
-#ifndef CONFIG_MTD_NOR_FLASH
-
-/*-----------------------------------------------------------------------
- * return codes from flash_write():
- */
-# define ERR_OK				0
-# define ERR_TIMOUT			1
-# define ERR_NOT_ERASED			2
-# define ERR_PROTECTED			4
-# define ERR_INVAL			8
-# define ERR_ALIGN			16
-# define ERR_UNKNOWN_FLASH_VENDOR	32
-# define ERR_UNKNOWN_FLASH_TYPE		64
-# define ERR_PROG_ERROR			128
-
-/*-----------------------------------------------------------------------
- * Protection Flags for flash_protect():
- */
-# define FLAG_PROTECT_SET		0x01
-# define FLAG_PROTECT_CLEAR		0x02
-# define FLAG_PROTECT_INVALID		0x03
-
-/*-----------------------------------------------------------------------
- * Set Environment according to label:
- */
-# define	FLAG_SETENV		0x80
-#endif /* CONFIG_MTD_NOR_FLASH */
-
-/*define the area structure*/
-typedef struct {
-	unsigned long start;
-	unsigned long end;
-	unsigned char protected;
-	unsigned char setenv;
-	unsigned char label[20];
-} dataflash_protect_t;
-
-typedef unsigned int AT91S_DataFlashStatus;
-
-/*----------------------------------------------------------------------*/
-/* DataFlash Structures							*/
-/*----------------------------------------------------------------------*/
-
-/*---------------------------------------------*/
-/* DataFlash Descriptor Structure Definition   */
-/*---------------------------------------------*/
-typedef struct _AT91S_DataflashDesc {
-	unsigned char *tx_cmd_pt;
-	unsigned int tx_cmd_size;
-	unsigned char *rx_cmd_pt;
-	unsigned int rx_cmd_size;
-	unsigned char *tx_data_pt;
-	unsigned int tx_data_size;
-	unsigned char *rx_data_pt;
-	unsigned int rx_data_size;
-	volatile unsigned char state;
-	volatile unsigned char DataFlash_state;
-	unsigned char command[8];
-} AT91S_DataflashDesc, *AT91PS_DataflashDesc;
-
-/*---------------------------------------------*/
-/* DataFlash device definition structure       */
-/*---------------------------------------------*/
-typedef struct _AT91S_Dataflash {
-	int pages_number;			/* dataflash page number */
-	int pages_size;				/* dataflash page size */
-	int page_offset;			/* page offset in command */
-	int byte_mask;				/* byte mask in command */
-	int cs;
-	dataflash_protect_t area_list[NB_DATAFLASH_AREA]; /* area protection status */
-} AT91S_DataflashFeatures, *AT91PS_DataflashFeatures;
-
-/*---------------------------------------------*/
-/* DataFlash Structure Definition	       */
-/*---------------------------------------------*/
-typedef struct _AT91S_DataFlash {
-	AT91PS_DataflashDesc pDataFlashDesc;	/* dataflash descriptor */
-	AT91PS_DataflashFeatures pDevice;	/* Pointer on a dataflash features array */
-} AT91S_DataFlash, *AT91PS_DataFlash;
-
-
-typedef struct _AT91S_DATAFLASH_INFO {
-
-	AT91S_DataflashDesc Desc;
-	AT91S_DataflashFeatures Device; /* Pointer on a dataflash features array */
-	unsigned long logical_address;
-	unsigned long end_address;
-	unsigned int id;			/* device id */
-} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;
-
-struct dataflash_addr {
-	unsigned long addr;
-	int cs;
-};
-/*-------------------------------------------------------------------------------------------------*/
-#define AT45DB161	0x2c
-#define AT45DB021	0x14
-#define AT45DB081	0x24
-#define AT45DB321	0x34
-#define AT45DB642	0x3c
-#define AT45DB128	0x10
-#define	PAGES_PER_BLOCK	8
-
-#define AT91C_DATAFLASH_TIMEOUT		10000	/* For AT91F_DataFlashWaitReady */
-
-/* DataFlash return value */
-#define DATAFLASH_BUSY			0x00
-#define DATAFLASH_OK			0x01
-#define DATAFLASH_ERROR			0x02
-#define DATAFLASH_MEMORY_OVERFLOW	0x03
-#define DATAFLASH_BAD_COMMAND		0x04
-#define DATAFLASH_BAD_ADDRESS		0x05
-
-
-/* Driver State */
-#define IDLE		0x0
-#define BUSY		0x1
-#define ERROR		0x2
-
-/* DataFlash Driver State */
-#define GET_STATUS	0x0F
-
-/*-------------------------------------------------------------------------------------------------*/
-/* Command Definition										   */
-/*-------------------------------------------------------------------------------------------------*/
-
-/* READ COMMANDS */
-#define DB_CONTINUOUS_ARRAY_READ	0xE8	/* Continuous array read */
-#define DB_BURST_ARRAY_READ		0xE8	/* Burst array read */
-#define DB_PAGE_READ			0xD2	/* Main memory page read */
-#define DB_BUF1_READ			0xD4	/* Buffer 1 read */
-#define DB_BUF2_READ			0xD6	/* Buffer 2 read */
-#define DB_STATUS			0xD7	/* Status Register */
-
-/* PROGRAM and ERASE COMMANDS */
-#define DB_BUF1_WRITE			0x84	/* Buffer 1 write */
-#define DB_BUF2_WRITE			0x87	/* Buffer 2 write */
-#define DB_BUF1_PAGE_ERASE_PGM		0x83	/* Buffer 1 to main memory page program with built-In erase */
-#define DB_BUF1_PAGE_ERASE_FASTPGM	0x93	/* Buffer 1 to main memory page program with built-In erase, Fast program */
-#define DB_BUF2_PAGE_ERASE_PGM		0x86	/* Buffer 2 to main memory page program with built-In erase */
-#define DB_BUF2_PAGE_ERASE_FASTPGM	0x96	/* Buffer 1 to main memory page program with built-In erase, Fast program */
-#define DB_BUF1_PAGE_PGM		0x88	/* Buffer 1 to main memory page program without built-In erase */
-#define DB_BUF1_PAGE_FASTPGM		0x98	/* Buffer 1 to main memory page program without built-In erase, Fast program */
-#define DB_BUF2_PAGE_PGM		0x89	/* Buffer 2 to main memory page program without built-In erase */
-#define DB_BUF2_PAGE_FASTPGM		0x99	/* Buffer 1 to main memory page program without built-In erase, Fast program */
-#define DB_PAGE_ERASE			0x81	/* Page Erase */
-#define DB_BLOCK_ERASE			0x50	/* Block Erase */
-#define DB_PAGE_PGM_BUF1		0x82	/* Main memory page through buffer 1 */
-#define DB_PAGE_FASTPGM_BUF1		0x92	/* Main memory page through buffer 1, Fast program */
-#define DB_PAGE_PGM_BUF2		0x85	/* Main memory page through buffer 2 */
-#define DB_PAGE_FastPGM_BUF2		0x95	/* Main memory page through buffer 2, Fast program */
-
-/* ADDITIONAL COMMANDS */
-#define DB_PAGE_2_BUF1_TRF		0x53	/* Main memory page to buffer 1 transfert */
-#define DB_PAGE_2_BUF2_TRF		0x55	/* Main memory page to buffer 2 transfert */
-#define DB_PAGE_2_BUF1_CMP		0x60	/* Main memory page to buffer 1 compare */
-#define DB_PAGE_2_BUF2_CMP		0x61	/* Main memory page to buffer 2 compare */
-#define DB_AUTO_PAGE_PGM_BUF1		0x58	/* Auto page rewrite throught buffer 1 */
-#define DB_AUTO_PAGE_PGM_BUF2		0x59	/* Auto page rewrite throught buffer 2 */
-
-/*-------------------------------------------------------------------------------------------------*/
-
-extern int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size);
-extern int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr);
-extern int addr2ram(ulong addr);
-extern int dataflash_real_protect (int flag, unsigned long start_addr, unsigned long end_addr);
-extern int addr_dataflash (unsigned long addr);
-extern int read_dataflash (unsigned long addr, unsigned long size, char *result);
-extern int write_dataflash(unsigned long addr_dest, unsigned long addr_src,
-			unsigned long size);
-extern int AT91F_DataflashInit(void);
-
-extern void dataflash_print_info (void);
-extern void dataflash_perror (int err);
-extern void AT91F_Dataflashenv_set(void);
-
-extern struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS];
-extern dataflash_protect_t area_list[NB_DATAFLASH_AREA];
-extern AT91S_DATAFLASH_INFO dataflash_info[];
-#endif
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index c5c7c598c5..f73f765bbb 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -877,7 +877,6 @@ CONFIG_G_DNL_UMS_VENDOR_NUM
 CONFIG_H264_FREQ
 CONFIG_H8300
 CONFIG_HARD_SPI
-CONFIG_HAS_DATAFLASH
 CONFIG_HAS_ETH0
 CONFIG_HAS_ETH1
 CONFIG_HAS_ETH2
@@ -2619,9 +2618,6 @@ CONFIG_SYS_DA850_PLL1_PLLDIV3
 CONFIG_SYS_DA850_PLL1_PLLM
 CONFIG_SYS_DA850_PLL1_POSTDIV
 CONFIG_SYS_DA850_SYSCFG_SUSPSRC
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
 CONFIG_SYS_DAVINCI_I2C_SLAVE
 CONFIG_SYS_DAVINCI_I2C_SLAVE1
@@ -3731,7 +3727,6 @@ CONFIG_SYS_MATRIX_EBI0CSA_VAL
 CONFIG_SYS_MATRIX_EBICSA_VAL
 CONFIG_SYS_MATRIX_MCFG_REMAP
 CONFIG_SYS_MAXARGS
-CONFIG_SYS_MAX_DATAFLASH_BANKS
 CONFIG_SYS_MAX_DDR_BAT_SIZE
 CONFIG_SYS_MAX_FLASH_BANKS
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT

commit 879344fbf1c6d4e157e71a35532e1a952a156a94
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:41 2017 +0300

    UPSTREAM: spi: Drop CONFIG_ATMEL_DATAFLASH_SPI
    
    Last user of this option went away in commit:
    
    fdc7718999 ("board: usb_a9263: Update to support DT and DM")
    
    Change-Id: I37d591ec0dc956e4ec26d17a5e8e2588cf5a1afb
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 95688de311e238ccfba21c50b1b67ceffbdc7fc5)

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 052c6082b0..a942efa8aa 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -17,7 +17,6 @@ endif
 
 obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
 obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
-obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
 obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c
deleted file mode 100644
index a2e9c00ea6..0000000000
--- a/drivers/spi/atmel_dataflash_spi.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * This driver desperately needs rework:
- *
- * - use structure SoC access
- * - get rid of including asm/arch/at91_spi.h
- * - remove asm/arch/at91_spi.h
- * - get rid of all CONFIG_ATMEL_LEGACY defines and uses
- *
- * 02-Aug-2010 Reinhard Meyer <uboot@emk-elektronik.de>
- */
-
-#include <common.h>
-#ifndef CONFIG_ATMEL_LEGACY
-# define CONFIG_ATMEL_LEGACY
-#endif
-#include <spi.h>
-#include <malloc.h>
-
-#include <asm/io.h>
-
-#include <asm/arch/clk.h>
-#include <asm/arch/hardware.h>
-
-#include "atmel_spi.h"
-
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_spi.h>
-
-#include <dataflash.h>
-
-#define AT91_SPI_PCS0_DATAFLASH_CARD	0xE	/* Chip Select 0: NPCS0%1110 */
-#define AT91_SPI_PCS1_DATAFLASH_CARD	0xD	/* Chip Select 1: NPCS1%1101 */
-#define AT91_SPI_PCS2_DATAFLASH_CARD	0xB	/* Chip Select 2: NPCS2%1011 */
-#define AT91_SPI_PCS3_DATAFLASH_CARD	0x7	/* Chip Select 3: NPCS3%0111 */
-
-void AT91F_SpiInit(void)
-{
-	/* Reset the SPI */
-	writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-	/* Configure SPI in Master Mode with No CS selected !!! */
-	writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
-	       ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-	/* Configure CS0 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
-
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
-	/* Configure CS1 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
-	/* Configure CS2 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
-	/* Configure CS3 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
-#endif
-
-	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS))
-		;
-
-	/*
-	 * Add tempo to get SPI in a safe state.
-	 * Should not be needed for new silicon (Rev B)
-	 */
-	udelay(500000);
-	readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
-	readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
-
-}
-
-void AT91F_SpiEnable(int cs)
-{
-	unsigned long mode;
-
-	mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-	mode &= ~AT91_SPI_PCS;
-
-	switch (cs) {
-	case 0:
-		mode |= AT91_SPI_PCS0_DATAFLASH_CARD << 16;
-		break;
-	case 1:
-		mode |= AT91_SPI_PCS1_DATAFLASH_CARD << 16;
-		break;
-	case 2:
-		mode |= AT91_SPI_PCS2_DATAFLASH_CARD << 16;
-		break;
-	case 3:
-		mode |= AT91_SPI_PCS3_DATAFLASH_CARD << 16;
-		break;
-	}
-
-	writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-}
-
-unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
-
-unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
-{
-	unsigned int timeout;
-	unsigned int timebase;
-
-	pDesc->state = BUSY;
-
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-
-	/* Initialize the Transmit and Receive Pointer */
-	writel((unsigned int)pDesc->rx_cmd_pt,
-		ATMEL_BASE_SPI0 + AT91_SPI_RPR);
-	writel((unsigned int)pDesc->tx_cmd_pt,
-		ATMEL_BASE_SPI0 + AT91_SPI_TPR);
-
-	/* Intialize the Transmit and Receive Counters */
-	writel(pDesc->rx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_RCR);
-	writel(pDesc->tx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_TCR);
-
-	if (pDesc->tx_data_size != 0) {
-		/* Initialize the Next Transmit and Next Receive Pointer */
-		writel((unsigned int)pDesc->rx_data_pt,
-			ATMEL_BASE_SPI0 + AT91_SPI_RNPR);
-		writel((unsigned int)pDesc->tx_data_pt,
-			ATMEL_BASE_SPI0 + AT91_SPI_TNPR);
-
-		/* Intialize the Next Transmit and Next Receive Counters */
-		writel(pDesc->rx_data_size,
-			ATMEL_BASE_SPI0 + AT91_SPI_RNCR);
-		writel(pDesc->tx_data_size,
-			ATMEL_BASE_SPI0 + AT91_SPI_TNCR);
-	}
-
-	/* arm simple, non interrupt dependent timer */
-	timebase = get_timer(0);
-	timeout = 0;
-
-	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
-		((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT))
-		;
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-	pDesc->state = IDLE;
-
-	if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
-		printf("Error Timeout\n\r");
-		return DATAFLASH_ERROR;
-	}
-
-	return DATAFLASH_OK;
-}

commit 9a544e36a87f302a078522c65fa062b2299847a1
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Oct 10 21:59:40 2017 +0300

    UPSTREAM: env: Drop CONFIG_ENV_IS_IN_DATAFLASH
    
    Last user of this option went away in commit:
    
    fdc7718999 ("board: usb_a9263: Update to support DT and DM")
    
    Change-Id: Ie6cec28e4daf26b669f3f35db026427bdb47a5b6
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7b7341d7f3ee915c89a7f8ab7054e39872057d90)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index b35e9b324a..cc90b77f9e 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -42,7 +42,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #if	!defined(CONFIG_ENV_IS_IN_EEPROM)	&& \
 	!defined(CONFIG_ENV_IS_IN_FLASH)	&& \
-	!defined(CONFIG_ENV_IS_IN_DATAFLASH)	&& \
 	!defined(CONFIG_ENV_IS_IN_MMC)		&& \
 	!defined(CONFIG_ENV_IS_IN_FAT)		&& \
 	!defined(CONFIG_ENV_IS_IN_EXT4)		&& \
@@ -54,7 +53,7 @@ DECLARE_GLOBAL_DATA_PTR;
 	!defined(CONFIG_ENV_IS_IN_REMOTE)	&& \
 	!defined(CONFIG_ENV_IS_IN_UBI)		&& \
 	!defined(CONFIG_ENV_IS_NOWHERE)
-# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|MMC|FAT|EXT4|\
+# error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|MMC|FAT|EXT4|\
 NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
 #endif
 
diff --git a/env/Kconfig b/env/Kconfig
index 024d4d79bd..25555ec2b8 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -40,21 +40,6 @@ config ENV_IS_NOWHERE
 	  stored. U-Boot will therefore always start up with a default
 	  environment.
 
-config ENV_IS_IN_DATAFLASH
-	bool "Environment in dataflash"
-	depends on !CHAIN_OF_TRUST
-	help
-	  Define this if you have a DataFlash memory device which you
-	  want to use for the environment.
-
-	  - CONFIG_ENV_OFFSET:
-	  - CONFIG_ENV_ADDR:
-	  - CONFIG_ENV_SIZE:
-
-	  These three #defines specify the offset and size of the
-	  environment area within the total memory of your DataFlash placed
-	  at the specified address.
-
 config ENV_IS_IN_EEPROM
 	bool "Environment in EEPROM"
 	depends on !CHAIN_OF_TRUST
diff --git a/env/Makefile b/env/Makefile
index 8df5b9d4c9..7ce8231d9a 100644
--- a/env/Makefile
+++ b/env/Makefile
@@ -11,7 +11,6 @@ ifndef CONFIG_SPL_BUILD
 obj-y += attr.o
 obj-y += callback.o
 obj-y += flags.o
-obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += dataflash.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o
 extra-$(CONFIG_ENV_IS_EMBEDDED) += embedded.o
 obj-$(CONFIG_ENV_IS_IN_EEPROM) += embedded.o
diff --git a/env/dataflash.c b/env/dataflash.c
deleted file mode 100644
index 77bc595e0d..0000000000
--- a/env/dataflash.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * LowLevel function for DataFlash environment support
- * Author : Gilles Gastaldi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-#include <common.h>
-#include <command.h>
-#include <environment.h>
-#include <linux/stddef.h>
-#include <dataflash.h>
-#include <search.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static int env_dataflash_get_char(int index)
-{
-	uchar c;
-
-	read_dataflash(CONFIG_ENV_ADDR + index + offsetof(env_t, data),
-			1, (char *)&c);
-	return c;
-}
-
-static int env_dataflash_load(void)
-{
-	ulong crc, new = 0;
-	unsigned off;
-	char buf[CONFIG_ENV_SIZE];
-
-	/* Read old CRC */
-	read_dataflash(CONFIG_ENV_ADDR + offsetof(env_t, crc),
-		       sizeof(ulong), (char *)&crc);
-
-	/* Read whole environment */
-	read_dataflash(CONFIG_ENV_ADDR, CONFIG_ENV_SIZE, buf);
-
-	/* Calculate the CRC */
-	off = offsetof(env_t, data);
-	new = crc32(new, (unsigned char *)(buf + off), ENV_SIZE);
-
-	if (crc == new)
-		env_import(buf, 1);
-	else
-		set_default_env("!bad CRC");
-
-	return 0;
-}
-
-#ifdef CONFIG_ENV_OFFSET_REDUND
-#error No support for redundant environment on dataflash yet!
-#endif
-
-static int env_dataflash_save(void)
-{
-	env_t env_new;
-	int ret;
-
-	ret = env_export(&env_new);
-	if (ret)
-		return ret;
-
-	return write_dataflash(CONFIG_ENV_ADDR,
-				(unsigned long)&env_new,
-				CONFIG_ENV_SIZE);
-}
-
-U_BOOT_ENV_LOCATION(dataflash) = {
-	.location	= ENVL_DATAFLASH,
-	ENV_NAME("dataflash")
-	.get_char	= env_dataflash_get_char,
-	.load		= env_dataflash_load,
-	.save		= env_save_ptr(env_dataflash_save),
-};
diff --git a/env/env.c b/env/env.c
index 43290d0832..76a5608628 100644
--- a/env/env.c
+++ b/env/env.c
@@ -28,9 +28,7 @@ static struct env_driver *env_driver_lookup(enum env_location loc)
 
 static enum env_location env_get_default_location(void)
 {
-	if IS_ENABLED(CONFIG_ENV_IS_IN_DATAFLASH)
-		return ENVL_DATAFLASH;
-	else if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM)
+	if IS_ENABLED(CONFIG_ENV_IS_IN_EEPROM)
 		return ENVL_EEPROM;
 	else if IS_ENABLED(CONFIG_ENV_IS_IN_FAT)
 		return ENVL_FAT;
diff --git a/include/environment.h b/include/environment.h
index 03b41e0c51..7b98216389 100644
--- a/include/environment.h
+++ b/include/environment.h
@@ -198,7 +198,6 @@ enum env_valid {
 };
 
 enum env_location {
-	ENVL_DATAFLASH,
 	ENVL_EEPROM,
 	ENVL_EXT4,
 	ENVL_FAT,
diff --git a/tools/Makefile b/tools/Makefile
index ff7edb02e6..1bc4148163 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -21,7 +21,6 @@ subdir-$(HOST_TOOLS_ALL) += gdb
 
 # Merge all the different vars for envcrc into one
 ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y
-ENVCRC-$(CONFIG_ENV_IS_IN_DATAFLASH) = y
 ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM) = y
 ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y
 ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y

commit 4794b31f852a4cecfbbe2d5bad206515400412ba
Author: Marek Behún <marek.behun@nic.cz>
Date:   Fri Oct 6 15:04:56 2017 +0200

    UPSTREAM: linux/time.h: Remove dead code
    
    Since
      rem = ((long) *tim_p) % SECSPERDAY;
    the second while cycle
      while (rem >= SECSPERDAY)
    is dead.
    
    Change-Id: I7cb339650cc87f5ab892702adec7f4c147aff77d
    Reported-by: Coverity (CID: 167334)
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 502af618ec3d60f3c8b9914e3484f112fb295b6e)

diff --git a/include/linux/time.h b/include/linux/time.h
index bf12b99d37..b8d298eb4d 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -93,11 +93,6 @@ _DEFUN (localtime_r, (tim_p, res),
 	rem += SECSPERDAY;
 	--days;
     }
-    while (rem >= SECSPERDAY)
-    {
-	rem -= SECSPERDAY;
-	++days;
-    }
 
     /* compute hour, min, and sec */
     res->tm_hour = (int) (rem / SECSPERHOUR);

commit 1b659546cc05fcb2bf5e8b37aa70c07d88530d97
Author: Alexander Graf <agraf@suse.de>
Date:   Fri Oct 6 13:35:07 2017 +0200

    UPSTREAM: iso: Reduce verbosity on test and info calls
    
    The test and info callbacks into the partition callback struct are
    used by the "part list" command on the command line. That command
    is used by the distro script.
    
    With verb=1 set, "part list" thus throws a lot of warnings about
    partitions it can't find when an upper layer searches for partitions.
    
    So let's reduce verbosity to bring it to the same level of noise
    as the other partition targets.
    
    Change-Id: I289d3fe2f1d11b18183b834189463578ba5cab90
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b16339e254371b2823f48186889775b90b044f7e)

diff --git a/disk/part_iso.c b/disk/part_iso.c
index 8aef251f4e..4036b00b25 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -202,7 +202,7 @@ found:
 static int part_get_info_iso(struct blk_desc *dev_desc, int part_num,
 				  disk_partition_t *info)
 {
-	return part_get_info_iso_verb(dev_desc, part_num, info, 1);
+	return part_get_info_iso_verb(dev_desc, part_num, info, 0);
 }
 
 static void part_print_iso(struct blk_desc *dev_desc)
@@ -228,7 +228,7 @@ static int part_test_iso(struct blk_desc *dev_desc)
 {
 	disk_partition_t info;
 
-	return part_get_info_iso_verb(dev_desc, 1, &info, 1);
+	return part_get_info_iso_verb(dev_desc, 1, &info, 0);
 }
 
 U_BOOT_PART_TYPE(iso) = {

commit aa0e69ce7235e548db10791cadb75448005d6736
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Oct 6 10:24:43 2017 +0900

    UPSTREAM: fixdep: fix dependency on options surrounded by CONFIG_VAL()
    
    CONFIG options surrounded by
    
      CONFIG_IS_ENABLED(...)
      CONFIG_IS_BUILTIN(...)
      CONFIG_IS_MODULE(...)
      CONFIG_VAL(...)
    
    need special care for proper dependency tracking.
    
    I do not remember why, but I missed to add CONFIG_VAL(...) handling.
    
    Change-Id: I6b972c1b6ba564f345250a8e980cb95e3e52c146
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7d8e9e8e24b247944bbff6ab68e03cac81fde218)

diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c
index 9bd0de2490..da7fb2cd4d 100644
--- a/scripts/basic/fixdep.c
+++ b/scripts/basic/fixdep.c
@@ -249,10 +249,17 @@ static void parse_config_file(const char *map, size_t len)
 		if (q - p < 0)
 			continue;
 
-		/* U-Boot also handles CONFIG_IS_{ENABLED/BUILTIN/MODULE} */
+		/*
+		 * U-Boot also handles
+		 *   CONFIG_IS_ENABLED(...)
+		 *   CONFIG_IS_BUILTIN(...)
+		 *   CONFIG_IS_MODULE(...)
+		 *   CONFIG_VAL(...)
+		 */
 		if ((q - p == 10 && !memcmp(p, "IS_ENABLED(", 11)) ||
 		    (q - p == 10 && !memcmp(p, "IS_BUILTIN(", 11)) ||
-		    (q - p == 9 && !memcmp(p, "IS_MODULE(", 10))) {
+		    (q - p == 9 && !memcmp(p, "IS_MODULE(", 10)) ||
+		    (q - p == 3 && !memcmp(p, "VAL(", 4))) {
 			p = q + 1;
 			for (q = p; q < map + len; q++)
 				if (*q == ')')

commit e33953082a49abf674e0e326117adadd6f2a4dda
Author: Diego Dorta <diego.dorta@nxp.com>
Date:   Thu Oct 5 09:13:38 2017 -0300

    UPSTREAM: common: Add a prototype for s_init()
    
    When compiling with W=1 the following warning is observed:
    
    arch/arm/mach-imx/mx6/soc.c:590:6: warning: no previous prototype for ‘s_init’ [-Wmissing-prototypes] void s_init(void)
    
    Remove this warning by adding the function prototype into include/common.h file.
    
    Change-Id: Id85724ae2fee5e38816467b8a8e25ca9f238eda7
    Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 026d7958ba6dc5ed4cd2c5ff507f55f3897cf41a)

diff --git a/include/common.h b/include/common.h
index d890be50fc..04d6e2d25e 100644
--- a/include/common.h
+++ b/include/common.h
@@ -534,6 +534,8 @@ int	is_core_valid (unsigned int);
  */
 int arch_cpu_init(void);
 
+void s_init(void);
+
 int	checkcpu      (void);
 int	checkicache   (void);
 int	checkdcache   (void);

commit 8cc080c0241a8c9b5b51d28778e781ecbb901320
Author: Mirza, Taimoor <Taimoor_Mirza@mentor.com>
Date:   Wed Oct 4 20:28:03 2017 +0500

    UPSTREAM: tools/mkimage: Fix DTC run command to handle file names with space
    
    fit_handle_file function does not quote input and output files while preparing
    command to run DTC to convert .its to .itb. This results in a failure if input
    or output files contain spaces in their names. Quote input and output files in
    DTC command to avoid this failure.
    
    Change-Id: I866d740ef8e2c9f28059c55757bbcbdb017cd74a
    Signed-off-by: Mirza, Taimoor <Taimoor_Mirza@mentor.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a6e9810495bc929b6beafb88f557cdaadf87fc83)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 30257b178e..6dcc88bae0 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -651,11 +651,11 @@ static int fit_handle_file(struct image_tool_params *params)
 		*cmd = '\0';
 	} else if (params->datafile) {
 		/* dtc -I dts -O dtb -p 500 datafile > tmpfile */
-		snprintf(cmd, sizeof(cmd), "%s %s %s > %s",
+		snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"",
 			 MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
 		debug("Trying to execute \"%s\"\n", cmd);
 	} else {
-		snprintf(cmd, sizeof(cmd), "cp %s %s",
+		snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"",
 			 params->imagefile, tmpfile);
 	}
 	if (*cmd && system(cmd) == -1) {

commit 2ed173003ddd4ffe619e31a06ae31c58ea3db111
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Oct 3 09:38:44 2017 -0400

    UPSTREAM: part_efi: In is_gpt_valid() check argument validity before allocation
    
    While this goes somewhat against normal coding style we should ensure
    that dev_desc is not NULL before we dereference it in allocation of
    legacy_mbr.
    
    Change-Id: Ife52a9f595a429aa265c1fed92099295f80458dc
    Reported-by: Coverity (CID: 167292)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b351ccf11ae5616bba183aedb2c433b97123be4f)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 75d9d4fc50..29761e77f2 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -931,13 +931,14 @@ static int is_pmbr_valid(legacy_mbr * mbr)
 static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 			gpt_header *pgpt_head, gpt_entry **pgpt_pte)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
-
+	/* Confirm valid arguments prior to allocation. */
 	if (!dev_desc || !pgpt_head) {
 		printf("%s: Invalid Argument(s)\n", __func__);
 		return 0;
 	}
 
+	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
+
 	/* Read MBR Header from device */
 	if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1) {
 		printf("*** ERROR: Can't read MBR header ***\n");

commit 36ac5eead7a21cf8df9049c8f973322c170349aa
Author: ext-vasily.gurevich@vaisala.com <ext-vasily.gurevich@vaisala.com>
Date:   Mon Oct 2 13:42:55 2017 +0000

    UPSTREAM: SPL: FIT: Kconfig: Change SPL_FIT_IMAGE_POST_PROCESS entry
    
    Remove depends on TI_SECURE_DEVICE for other platforms.
    
    Change-Id: I3067b9e1816661567353f48cd85853150592b0bd
    Signed-off-by: Vasily Gurevich <ext-vasily.gurevich@vaisala.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c12d8b7d70c695f1c4fe6fb4f1b3913bdbed8c96)

diff --git a/Kconfig b/Kconfig
index d951e9f804..73f820a6de 100644
--- a/Kconfig
+++ b/Kconfig
@@ -273,7 +273,7 @@ config SPL_LOAD_FIT
 
 config SPL_FIT_IMAGE_POST_PROCESS
 	bool "Enable post-processing of FIT artifacts after loading by the SPL"
-	depends on SPL_LOAD_FIT && TI_SECURE_DEVICE
+	depends on SPL_LOAD_FIT
 	help
 	  Allows doing any sort of manipulation to blobs after they got extracted
 	  from the U-Boot FIT image like stripping off headers or modifying the

commit f9b2adb5dc2ad002cb41f766117338b2846ef0c8
Author: York Sun <york.sun@nxp.com>
Date:   Thu Sep 28 08:42:11 2017 -0700

    UPSTREAM: cmd: spl: fix compiling error when CONFIG_CMD_SPL_WRITE_SIZE not defined
    
    CONFIG_CMD_SPL_WRITE_SIZE is used for writing parameters to non-volatile
    storage. So far it is only used for NAND. Fix compiling error when this
    macro is not used for SD.
    
    Change-Id: I879971e42fb333e1e0ff4e21ce6b34caf8498aa5
    Signed-off-by: York Sun <york.sun@nxp.com>
    CC: Anatolij Gustschin <agust@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b65ac633f52da596cfa573bb4a597e2edd2318c8)

diff --git a/cmd/spl.c b/cmd/spl.c
index 4d84492346..3b8992a163 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -121,9 +121,11 @@ static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 				(void *)images.ft_addr);
 			env_set_addr("fdtargsaddr", images.ft_addr);
 			env_set_hex("fdtargslen", fdt_totalsize(images.ft_addr));
+#ifdef CONFIG_CMD_SPL_WRITE_SIZE
 			if (fdt_totalsize(images.ft_addr) >
 			    CONFIG_CMD_SPL_WRITE_SIZE)
 				puts("WARN: FDT size > CMD_SPL_WRITE_SIZE\n");
+#endif
 			break;
 #endif
 		case SPL_EXPORT_ATAGS:

commit 4f443bd290ecc8a5429e568263b7f68b7db23918
Author: York Sun <york.sun@nxp.com>
Date:   Thu Sep 28 08:42:10 2017 -0700

    UPSTREAM: spl: fix assignment of board info to global data
    
    Commit 15eb1d43bf47 ("spl: reorder the assignment of board info to
    global data") intended to move assignment of board info earlier,
    into board_init_r(). However, function preload_console_init() is
    called either from spl_board_init() or from board_init_f(). For the
    latter case, the board info assignment is much earlier than proposed
    board_init_r(). Create a new function to fill gd->bd and call this
    function when needed.
    
    Change-Id: I3e8da19121f5b82f116b9d051b75acdd777c2475
    Signed-off-by: York Sun <york.sun@nxp.com>
    CC: Lokesh Vutla <lokeshvutla@ti.com>
    CC: Ravi Babu <ravibabu@ti.com>
    CC: Lukasz Majewski <lukma@denx.de>
    CC: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d1fc0a31b5f307c92b7a047d4f90d5ad2e54cdcc)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 2776240be3..2534b4be5f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -80,6 +80,7 @@ void board_init_f(ulong dummy)
 	get_clocks();
 
 	preloader_console_init();
+	spl_set_bd();
 
 #ifdef CONFIG_SPL_I2C_SUPPORT
 	i2c_init_all();
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 6ca42c64ee..057d3aa140 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -258,6 +258,12 @@ static int spl_common_init(bool setup_malloc)
 	return 0;
 }
 
+void spl_set_bd(void)
+{
+	if (!gd->bd)
+		gd->bd = &bdata;
+}
+
 int spl_early_init(void)
 {
 	int ret;
@@ -365,7 +371,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	struct spl_image_info spl_image;
 
 	debug(">>spl:board_init_r()\n");
-	gd->bd = &bdata;
+
+	spl_set_bd();
+
 #ifdef CONFIG_SPL_OS_BOOT
 	dram_init_banksize();
 #endif
diff --git a/include/spl.h b/include/spl.h
index d21a3d21cb..dc0b56911b 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -68,6 +68,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 void preloader_console_init(void);
 u32 spl_boot_device(void);
 u32 spl_boot_mode(const u32 boot_device);
+void spl_set_bd(void);
 
 /**
  * spl_set_header_raw_uboot() - Set up a standard SPL image structure

commit 1b189a920d58ba769b21ea19d6f94ec611e24729
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Wed Sep 20 13:50:41 2017 +0200

    UPSTREAM: dm: ofnode: query correct property in livetree ofnode_get_addr_size
    
    The livetree codepath of ofnode_get_addr_size always used the "reg"
    property for of_get_property. Use the property parameter of the function
    call instead and check the return value if the property exists.
    Otherwise return FDT_ADDR_T_NONE.
    
    This was discoverd while using SPI NOR with livetree.
    spi_flash_decode_fdt checks for memory-map and will not fail with
    livetree even if the property does not exist.
    
    Change-Id: Icc63d2edbccea6a9f17cdcb5818993d317736ede
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 68a345294ac74505f17d65b003a7de836b3d9cba)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index c6ca13fabf..0030ab962e 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -468,8 +468,10 @@ fdt_addr_t ofnode_get_addr_size(ofnode node, const char *property,
 		int na, ns;
 		int psize;
 		const struct device_node *np = ofnode_to_np(node);
-		const __be32 *prop = of_get_property(np, "reg", &psize);
+		const __be32 *prop = of_get_property(np, property, &psize);
 
+		if (!prop)
+			return FDT_ADDR_T_NONE;
 		na = of_n_addr_cells(np);
 		ns = of_n_addr_cells(np);
 		*sizep = of_read_number(prop + na, ns);

commit 9ab2e5eb63ddc4561058755c4e53f454b03275e3
Author: Faiz Abbas <faiz_abbas@ti.com>
Date:   Tue Sep 19 16:53:50 2017 +0530

    UPSTREAM: dm: core: Round up size when allocating so that it is cache line aligned
    
    The size variable may not be always be a mulitple of
    ARCH_DMA_MINALIGN and using it to flush cache leads to cache
    misaligned warnings.
    
    Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN
    when allocating private data.
    
    Change-Id: I29c4fb89f4be628518c2f5350d3efbccd28acd36
    Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5924da1dfe56d32a45b8adf29bdc8caf788bd4c8)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index de63e5335a..9a46a7bbe5 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -254,6 +254,7 @@ static void *alloc_priv(int size, uint flags)
 	void *priv;
 
 	if (flags & DM_FLAG_ALLOC_PRIV_DMA) {
+		size = ROUND(size, ARCH_DMA_MINALIGN);
 		priv = memalign(ARCH_DMA_MINALIGN, size);
 		if (priv) {
 			memset(priv, '\0', size);

commit 90d0ce442b2814a193ffd3009d11f4f5aca4d325
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Sep 17 16:54:53 2017 -0600

    UPSTREAM: dm: gpio: Correct use of -ENODEV in drivers
    
    In U-Boot -ENODEV means that there is no device. When there is a problem
    with the device, drivers should return an error like -ENXIO or -EREMOTEIO.
    When the device tree properties cannot be read correct , they should
    return -EINVAL.
    
    Update various GPIO drivers to follow this rule, to help with consistency
    for future driver writers.
    
    Change-Id: I6b8f826f6d90dffca55f4d0d5da744b74a39f29a
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reported-by: Adam Ford <aford173@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7c84319af9c76084f50f3f2b97545bfa05f3971d)

diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c
index 4db08a344a..1012f2d8eb 100644
--- a/drivers/gpio/adi_gpio2.c
+++ b/drivers/gpio/adi_gpio2.c
@@ -138,7 +138,7 @@ int peripheral_request(unsigned short per, const char *label)
 		return 0;
 
 	if (!(per & P_DEFINED))
-		return -ENODEV;
+		return -EINVAL;
 
 	BUG_ON(ident >= MAX_RESOURCES);
 
diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index f3689467f0..30bc4296e3 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -50,11 +50,11 @@ static int atmel_pio4_config_io_func(u32 port, u32 pin,
 	u32 reg, mask;
 
 	if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-		return -ENODEV;
+		return -EINVAL;
 
 	port_base = atmel_pio4_port_base(port);
 	if (!port_base)
-		return -ENODEV;
+		return -EINVAL;
 
 	mask = 1 << pin;
 	reg = func;
@@ -128,11 +128,11 @@ int atmel_pio4_set_pio_output(u32 port, u32 pin, u32 value)
 	u32 reg, mask;
 
 	if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-		return -ENODEV;
+		return -EINVAL;
 
 	port_base = atmel_pio4_port_base(port);
 	if (!port_base)
-		return -ENODEV;
+		return -EINVAL;
 
 	mask = 0x01 << pin;
 	reg = ATMEL_PIO_CFGR_FUNC_GPIO | ATMEL_PIO_DIR_MASK;
@@ -154,11 +154,11 @@ int atmel_pio4_get_pio_input(u32 port, u32 pin)
 	u32 reg, mask;
 
 	if (pin >= ATMEL_PIO_NPINS_PER_BANK)
-		return -ENODEV;
+		return -EINVAL;
 
 	port_base = atmel_pio4_port_base(port);
 	if (!port_base)
-		return -ENODEV;
+		return -EINVAL;
 
 	mask = 0x01 << pin;
 	reg = ATMEL_PIO_CFGR_FUNC_GPIO;
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 5abc88ba54..5a5f646813 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -168,7 +168,7 @@ static int imx_rgpio2p_bind(struct udevice *dev)
 
 	addr = devfdt_get_addr_index(dev, 1);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	/*
 	 * TODO:
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 0eb6c600f1..698d9feedf 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -304,7 +304,7 @@ static int mxc_gpio_bind(struct udevice *dev)
 
 	addr = devfdt_get_addr(dev);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	/*
 	 * TODO:
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index b423e34ca4..1f67482340 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -307,7 +307,7 @@ static int omap_gpio_bind(struct udevice *dev)
 
 	base_addr = devfdt_get_addr(dev);
 	if (base_addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	/*
 	* TODO:
diff --git a/drivers/gpio/tegra186_gpio.c b/drivers/gpio/tegra186_gpio.c
index c5a7e13cce..deb59e8b32 100644
--- a/drivers/gpio/tegra186_gpio.c
+++ b/drivers/gpio/tegra186_gpio.c
@@ -181,7 +181,7 @@ static int tegra186_gpio_bind(struct udevice *parent)
 
 	regs = (uint32_t *)devfdt_get_addr_name(parent, "gpio");
 	if (regs == (uint32_t *)FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	for (port = 0; port < ctlr_data->port_count; port++) {
 		struct tegra186_gpio_platdata *plat;
diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c
index aa97196e23..e7ec17fe9e 100644
--- a/drivers/i2c/imx_lpi2c.c
+++ b/drivers/i2c/imx_lpi2c.c
@@ -412,7 +412,7 @@ static int imx_lpi2c_probe(struct udevice *bus)
 
 	addr = devfdt_get_addr(bus);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	i2c_bus->base = addr;
 	i2c_bus->index = bus->seq;
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index b7bb76c0ed..abf1da2ae3 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -176,7 +176,7 @@ static int bus_i2c_set_bus_speed(struct mxc_i2c_bus *i2c_bus, int speed)
 	int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT;
 
 	if (!base)
-		return -ENODEV;
+		return -EINVAL;
 
 	/* Store divider value */
 	writeb(idx, base + (IFDR << reg_shift));
@@ -239,7 +239,7 @@ static int tx_byte(struct mxc_i2c_bus *i2c_bus, u8 byte)
 	if (ret < 0)
 		return ret;
 	if (ret & I2SR_RX_NO_AK)
-		return -ENODEV;
+		return -EREMOTEIO;
 	return 0;
 }
 
@@ -418,14 +418,14 @@ static int i2c_init_transfer(struct mxc_i2c_bus *i2c_bus, u8 chip,
 			VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT;
 
 	if (!i2c_bus->base)
-		return -ENODEV;
+		return -EINVAL;
 
 	for (retry = 0; retry < 3; retry++) {
 		ret = i2c_init_transfer_(i2c_bus, chip, addr, alen);
 		if (ret >= 0)
 			return 0;
 		i2c_imx_stop(i2c_bus);
-		if (ret == -ENODEV)
+		if (ret == -EREMOTEIO)
 			return ret;
 
 		printf("%s: failed for chip 0x%x retry=%d\n", __func__, chip,
@@ -754,7 +754,7 @@ static int mxc_i2c_probe(struct udevice *bus)
 
 	addr = devfdt_get_addr(bus);
 	if (addr == FDT_ADDR_T_NONE)
-		return -ENODEV;
+		return -EINVAL;
 
 	i2c_bus->base = addr;
 	i2c_bus->index = bus->seq;
@@ -783,7 +783,7 @@ static int mxc_i2c_probe(struct udevice *bus)
 		    !dm_gpio_is_valid(&i2c_bus->scl_gpio) |
 		    ret | ret2) {
 			dev_err(dev, "i2c bus %d at %lu, fail to request scl/sda gpio\n", bus->seq, i2c_bus->base);
-			return -ENODEV;
+			return -EINVAL;
 		}
 	}
 
diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c
index 931c6de508..b46a09a4e0 100644
--- a/drivers/i2c/tegra186_bpmp_i2c.c
+++ b/drivers/i2c/tegra186_bpmp_i2c.c
@@ -94,7 +94,7 @@ static int tegra186_bpmp_i2c_probe(struct udevice *dev)
 					    "nvidia,bpmp-bus-id", U32_MAX);
 	if (priv->bpmp_bus_id == U32_MAX) {
 		debug("%s: could not parse nvidia,bpmp-bus-id\n", __func__);
-		return -ENODEV;
+		return -EINVAL;
 	}
 
 	return 0;

commit 635356e554fed8d51aef5fcdabdf332cb7f681de
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Sun Oct 1 02:25:22 2017 +0300

    UPSTREAM: fs/fat: Check malloc return values and fix memory leaks
    
    Check malloc() return values and properly unwind on errors so
    memory allocated for fat_itr structures get freed properly.
    
    Also fixes a leak of fsdata.fatbuf in fat_size().
    
    Fixes: 2460098cffacd1 ("fs/fat: Reduce stack usage")
    Change-Id: If2abd822a136b40375f6b0052c88c0d9deb3a632
    Reported-by: Coverity (CID: 167225, 167233, 167234)
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit af609e3764ea3ed7c0ccad8e57f9d9671c81c3e8)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index fca4a8cf27..3b5650adb6 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1038,12 +1038,15 @@ int fat_exists(const char *filename)
 	int ret;
 
 	itr = malloc_cache_aligned(sizeof(fat_itr));
+	if (!itr)
+		return 0;
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
-		return 0;
+		goto out;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
 	free(fsdata.fatbuf);
+out:
 	free(itr);
 	return ret == 0;
 }
@@ -1055,9 +1058,11 @@ int fat_size(const char *filename, loff_t *size)
 	int ret;
 
 	itr = malloc_cache_aligned(sizeof(fat_itr));
+	if (!itr)
+		return -ENOMEM;
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
-		return ret;
+		goto out_free_itr;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
 	if (ret) {
@@ -1071,12 +1076,13 @@ int fat_size(const char *filename, loff_t *size)
 			*size = 0;
 			ret = 0;
 		}
-		goto out;
+		goto out_free_both;
 	}
 
 	*size = FAT2CPU32(itr->dent->size);
+out_free_both:
 	free(fsdata.fatbuf);
-out:
+out_free_itr:
 	free(itr);
 	return ret;
 }
@@ -1089,19 +1095,22 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 	int ret;
 
 	itr = malloc_cache_aligned(sizeof(fat_itr));
+	if (!itr)
+		return -ENOMEM;
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
-		return ret;
+		goto out_free_itr;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
 	if (ret)
-		goto out;
+		goto out_free_both;
 
 	printf("reading %s\n", filename);
 	ret = get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
 
-out:
+out_free_both:
 	free(fsdata.fatbuf);
+out_free_itr:
 	free(itr);
 	return ret;
 }
@@ -1147,17 +1156,18 @@ int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
 
 	ret = fat_itr_root(&dir->itr, &dir->fsdata);
 	if (ret)
-		goto fail;
+		goto fail_free_dir;
 
 	ret = fat_itr_resolve(&dir->itr, filename, TYPE_DIR);
 	if (ret)
-		goto fail;
+		goto fail_free_both;
 
 	*dirsp = (struct fs_dir_stream *)dir;
 	return 0;
 
-fail:
+fail_free_both:
 	free(dir->fsdata.fatbuf);
+fail_free_dir:
 	free(dir);
 	return ret;
 }

commit 86597fe0526efb9153a6b7d0def26dbe21545981
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Sun Oct 1 02:25:21 2017 +0300

    UPSTREAM: fs/fat: Fix 'CACHE: Misaligned operation at range' warnings
    
    The 'block' field of fat_itr needs to be properly aligned for DMA and
    while it does have '__aligned(ARCH_DMA_MINALIGN)', the fat_itr structure
    itself needs to be properly aligned as well.
    
    While at it use malloc_cache_aligned() for the other aligned allocations
    in the file as well.
    
    Fixes: 2460098cffacd1 ("fs/fat: Reduce stack usage")
    Change-Id: I0b7bfe73d00435d8ec3dcd7f52a10deca07a704e
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 09fa964bba80c45432660f0e64362181900a5aef)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 36a309c73c..fca4a8cf27 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -495,7 +495,7 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize)
 		return -1;
 	}
 
-	block = memalign(ARCH_DMA_MINALIGN, cur_dev->blksz);
+	block = malloc_cache_aligned(cur_dev->blksz);
 	if (block == NULL) {
 		debug("Error: allocating block\n");
 		return -1;
@@ -599,7 +599,7 @@ static int get_fs_info(fsdata *mydata)
 
 	mydata->fatbufnum = -1;
 	mydata->fat_dirty = 0;
-	mydata->fatbuf = memalign(ARCH_DMA_MINALIGN, FATBUFSIZE);
+	mydata->fatbuf = malloc_cache_aligned(FATBUFSIZE);
 	if (mydata->fatbuf == NULL) {
 		debug("Error: allocating memory\n");
 		return -1;
@@ -1037,7 +1037,7 @@ int fat_exists(const char *filename)
 	fat_itr *itr;
 	int ret;
 
-	itr = malloc(sizeof(fat_itr));
+	itr = malloc_cache_aligned(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return 0;
@@ -1054,7 +1054,7 @@ int fat_size(const char *filename, loff_t *size)
 	fat_itr *itr;
 	int ret;
 
-	itr = malloc(sizeof(fat_itr));
+	itr = malloc_cache_aligned(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;
@@ -1088,7 +1088,7 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 	fat_itr *itr;
 	int ret;
 
-	itr = malloc(sizeof(fat_itr));
+	itr = malloc_cache_aligned(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;

commit fafa35c559b5dfd9c35fd2daf5c6e06d10caa14e
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Sep 29 14:32:44 2017 -0400

    UPSTREAM: cmd: Make CMD_LZMA / CMD_UNZIP default y if CMD_BOOTI
    
    In the Linux Kernel on ARM64, the Image.COMPRESSION file is not
    self-extracting in the way that x86 and ARM images are.  So when
    CMD_BOOTI is enabled we should also default to enabling CMD_UNZIP and
    CONFIG_LZMA in order for the user to be able to decompress many of the
    common compressions that will be done to an Image file.
    
    Change-Id: Ic7958458ddc16c8b78ea40ff56d380d02883d76a
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 99e46dfc6a9176f6f0680c9dfdf33c97d56336ce)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 10803353a2..772a62a513 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -529,6 +529,7 @@ menu "Compression commands"
 
 config CMD_LZMADEC
 	bool "lzmadec"
+	default y if CMD_BOOTI
 	select LZMA
 	help
 	  Support decompressing an LZMA (Lempel-Ziv-Markov chain algorithm)
@@ -536,6 +537,7 @@ config CMD_LZMADEC
 
 config CMD_UNZIP
 	bool "unzip"
+	default y if CMD_BOOTI
 	help
 	  Uncompress a zip-compressed memory region.
 

commit 70c6966892e43e0cb05de18a97687d402cd54a92
Author: Sam Protsenko <semen.protsenko@linaro.org>
Date:   Thu Sep 28 12:33:45 2017 -0700

    UPSTREAM: scripts: Move Kconfig contents to cmd/Kconfig
    
    On case-insensitive file systems we have collision between
    scripts/kconfig/ directory and scripts/Kconfig file. This patch moves
    scripts/Kcofnig contents to cmd/Kconfig to fix that.
    
    Change-Id: Ia60682a7eb9c3379e6e257b07e799b06e304c95f
    Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
    Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 610eec7f0593574c034054ba54fc1c934755e208)

diff --git a/Kconfig b/Kconfig
index 238fa3e1ed..d951e9f804 100644
--- a/Kconfig
+++ b/Kconfig
@@ -398,5 +398,3 @@ source "fs/Kconfig"
 source "lib/Kconfig"
 
 source "test/Kconfig"
-
-source "scripts/Kconfig"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index ef9bc920ac..10803353a2 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -116,6 +116,9 @@ endmenu
 
 source "cmd/fastboot/Kconfig"
 
+config BUILD_BIN2C
+	bool
+
 comment "Commands"
 
 menu "Info commands"
diff --git a/scripts/Kconfig b/scripts/Kconfig
deleted file mode 100644
index 2a2c18e96e..0000000000
--- a/scripts/Kconfig
+++ /dev/null
@@ -1,2 +0,0 @@
-config BUILD_BIN2C
-	bool

commit ee3413194e19107451802385bc9e395144c01fb9
Author: zijun_hu <zijun_hu@htc.com>
Date:   Mon Sep 25 15:28:50 2017 +0800

    UPSTREAM: ARMv8: make master CPU checking logic more clear
    
    macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0))
    it is simple but a little obscure.
    
    fix by checking Affx fields within MPIDR_EL1 directly.
    
    Change-Id: I4ab4eca6620ae4b152d637a9c8cca40e4ad6ea7d
    Signed-off-by: zijun_hu <zijun_hu@htc.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 34f9a9258397b5430adfedd2bf2c6517eb468d29)

diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h
index e1916f7705..0c8652a675 100644
--- a/arch/arm/include/asm/macro.h
+++ b/arch/arm/include/asm/macro.h
@@ -131,6 +131,7 @@ lr	.req	x30
 	/* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
 	mrs	\xreg1, mpidr_el1
 	lsr	\xreg2, \xreg1, #32
+	lsl	\xreg2, \xreg2, #32
 	lsl	\xreg1, \xreg1, #40
 	lsr	\xreg1, \xreg1, #40
 	orr	\xreg1, \xreg1, \xreg2

commit d997bf6ff357acc546e54ef3e9f3c919a4d107a4
Author: zijun_hu <zijun_hu@htc.com>
Date:   Sat Sep 23 13:30:58 2017 +0800

    UPSTREAM: ARMv8: fix error in freeing stack frame
    
    relocate_code() allocates 32 bytes stack frame but only 16 bytes are
    freed before return. it will cause errors to possible previous frames
    and doesn't make relocate_code() look like a function.
    
    fix by freeing 32 bytes stack space
    
    Change-Id: Ic37075a62f9bb8c82aaec6867c448b5946f303a0
    Signed-off-by: zijun_hu <zijun_hu@htc.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7baf952fdb93527bee6a4a95f2bfb7c15484a09f)

diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S
index c760053706..fdba004363 100644
--- a/arch/arm/lib/relocate_64.S
+++ b/arch/arm/lib/relocate_64.S
@@ -73,6 +73,6 @@ relocate_done:
 	isb	sy
 4:	ldp	x0, x1, [sp, #16]
 	bl	__asm_flush_dcache_range
-5:	ldp	x29, x30, [sp],#16
+5:	ldp	x29, x30, [sp],#32
 	ret
 ENDPROC(relocate_code)

commit 51380c3b1c37c0a18b92a82f188620b6bc3fff7f
Author: zijun_hu <zijun_hu@htc.com>
Date:   Fri Sep 22 14:39:13 2017 +0800

    ARMv8: get new GD address from gd->new_gd directly
    
    the new GD address is calculated via board data BD currently
    it require the new GD area locates below BD tightly, so a strict
    constraint is imposed on memory layout which maybe make special
    platform unpleasant.
    
    fix it by getting new GD address from gd->new_gd directly.
    
    Change-Id: I9fdfbbb13a7b0a572d7aa8394f754148c6285669
    Signed-off-by: zijun_hu <zijun_hu@htc.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 01a835998935b78c31e80227358ac11212d60878)

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 2008b76bed..d6c50bb439 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -95,8 +95,7 @@ ENTRY(_main)
  */
 	ldr	x0, [x18, #GD_START_ADDR_SP]	/* x0 <- gd->start_addr_sp */
 	bic	sp, x0, #0xf	/* 16-byte alignment for ABI compliance */
-	ldr	x18, [x18, #GD_BD]		/* x18 <- gd->bd */
-	sub	x18, x18, #GD_SIZE		/* new GD is below bd */
+	ldr	x18, [x18, #GD_NEW_GD]		/* x18 <- gd->new_gd */
 
 	adr	lr, relocation_return
 	ldr	x9, [x18, #GD_RELOC_OFF]	/* x9 <- gd->reloc_off */
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index 07b15497df..b33d3680a8 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -41,5 +41,7 @@ int main(void)
 	DEFINE(PM_CTX_SIZE, sizeof(struct pm_ctx));
 	DEFINE(PM_CTX_PHYS, offsetof(struct global_data, pm_ctx_phys));
 
+	DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd));
+
 	return 0;
 }

commit e6d8fad507497e3bc909c8183873a026736aa136
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Oct 7 15:54:18 2017 -0400

    UPSTREAM: Travis-CI: Fix microblaze and xilinx jobs
    
    Given how we handle the ARM toolchain we can't easily combine these two
    jobs, so don't.  Give xilinx/ARM a separate build.
    
    Change-Id: I438104c5eb54fe89dd72d55df6240bb0d4de8c0f
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0d3aaa35b87573c229d65bc79050ab13f39d8ec2)

diff --git a/.travis.yml b/.travis.yml
index a1564ed907..0b7a0622bf 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -194,8 +194,7 @@ matrix:
         - BUILDMAN="m68k"
           TOOLCHAIN="m68k"
     - env:
-        - JOB="Xilinx (ARM and MicroBlaze)"
-          BUILDMAN="xilinx"
+        - BUILDMAN="microblaze"
           TOOLCHAIN="microblaze"
     - env:
         - BUILDMAN="mips"
@@ -242,6 +241,9 @@ matrix:
     - env:
         - BUILDMAN="sh4"
           TOOLCHAIN="sh4"
+    - env:
+        - JOB="Xilinx (ARM)"
+          BUILDMAN="xilinx -x microblaze"
     - env:
         - BUILDMAN="xtensa"
           TOOLCHAIN="xtensa"

commit 017aad0449af131386dddfd10b80912061e76926
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Oct 7 11:27:59 2017 -0400

    UPSTREAM: cmd/gpt.c, cmd/nvedit.c, tools/fit_image.c: Rework recent fixes for Coverity
    
    The recent changes to these files did not completely fix the previous
    issues, or introduced different (minor) issues.  In cmd/gpt.c we need to
    dereference str_disk_guid to be sure that malloc worked.  In
    cmd/nvedit.c we need to be careful that we can also fit in that leading
    space when adding to the string.  And in tools/fit_image.c we need to
    re-work the error handling slightly in fit_import_data() so that we only
    call munmap() once.  We have two error paths here, one where we have an
    fd to close and one where we do not.  Adjust labels to match this.
    
    Change-Id: I66fafd0ed8d1c290a7773bba5ece8d11bfc15b50
    Reported-by: Coverity (CID: 167366, 167367, 167370)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bf52fcdef4aac242b5e6b6b9827acf6d69ce1951)

diff --git a/cmd/gpt.c b/cmd/gpt.c
index 9e04affc06..27dd98755a 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -402,7 +402,7 @@ static int set_gpt_info(struct blk_desc *dev_desc,
 	if (!val) {
 #ifdef CONFIG_RANDOM_UUID
 		*str_disk_guid = malloc(UUID_STR_LEN + 1);
-		if (str_disk_guid == NULL)
+		if (*str_disk_guid == NULL)
 			return -ENOMEM;
 		gen_rand_uuid_str(*str_disk_guid, UUID_STR_FORMAT_STD);
 #else
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 134e54427e..b35e9b324a 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -609,7 +609,7 @@ int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		sprintf(message, "Please enter '%s': ", argv[1]);
 	} else {
 		/* env_ask envname message1 ... messagen [size] */
-		for (i = 2, pos = 0; i < argc && pos < sizeof(message); i++) {
+		for (i = 2, pos = 0; i < argc && pos+1 < sizeof(message); i++) {
 			if (pos)
 				message[pos++] = ' ';
 
diff --git a/tools/fit_image.c b/tools/fit_image.c
index c6026567f3..30257b178e 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -537,21 +537,21 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 		fprintf(stderr, "%s: Failed to allocate memory (%d bytes)\n",
 			__func__, size);
 		ret = -ENOMEM;
-		goto err;
+		goto err_has_fd;
 	}
 	ret = fdt_open_into(old_fdt, fdt, size);
 	if (ret) {
 		debug("%s: Failed to expand FIT: %s\n", __func__,
 		      fdt_strerror(errno));
 		ret = -EINVAL;
-		goto err;
+		goto err_has_fd;
 	}
 
 	images = fdt_path_offset(fdt, FIT_IMAGES_PATH);
 	if (images < 0) {
 		debug("%s: Cannot find /images node: %d\n", __func__, images);
 		ret = -EINVAL;
-		goto err;
+		goto err_has_fd;
 	}
 
 	for (node = fdt_first_subnode(fdt, images);
@@ -572,11 +572,11 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 			debug("%s: Failed to write property: %s\n", __func__,
 			      fdt_strerror(ret));
 			ret = -EINVAL;
-			goto err;
+			goto err_has_fd;
 		}
 	}
 
-	munmap(old_fdt, sbuf.st_size);
+	/* Close the old fd so we can re-use it. */
 	close(fd);
 
 	/* Pack the FDT and place the data after it */
@@ -589,22 +589,23 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 	if (fd < 0) {
 		fprintf(stderr, "%s: Can't open %s: %s\n",
 			params->cmdname, fname, strerror(errno));
-		free(fdt);
-		return -EIO;
+		ret = -EIO;
+		goto err_no_fd;
 	}
 	if (write(fd, fdt, new_size) != new_size) {
 		debug("%s: Failed to write external data to file %s\n",
 		      __func__, strerror(errno));
 		ret = -EIO;
-		goto err;
+		goto err_has_fd;
 	}
 
 	ret = 0;
 
-err:
+err_has_fd:
+	close(fd);
+err_no_fd:
 	munmap(old_fdt, sbuf.st_size);
 	free(fdt);
-	close(fd);
 	return ret;
 }
 

commit 38f2a6111e8a9f5d31f05aa4d19e32ef9d466597
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Oct 6 16:37:06 2017 -0400

    UPSTREAM: Travis-CI: Split out more vendors from the catch-all ARM job
    
    - Move SoCFPGA and K2 boards to their own job
    - Expand the microblaze job to cover ARM boards from Xilinx as well.
    
    Change-Id: I05a8fd8e4c7246f8e49b095fdc08facbfa205d8a
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit afbdfd829f457d5dcad5fb70d87941de9c37ceb7)

diff --git a/.travis.yml b/.travis.yml
index f028e580f2..a1564ed907 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -155,8 +155,12 @@ matrix:
     - env:
         - JOB="i.MX (non-Freescale, non-i.MX6)"
           BUILDMAN="mx -x freescale,mx6,toradex"
+    - env:
+        - BUILDMAN="k2"
     - env:
         - BUILDMAN="samsung"
+    - env:
+        - BUILDMAN="socfpga"
     - env:
         - BUILDMAN="sun4i"
     - env:
@@ -173,7 +177,7 @@ matrix:
         - BUILDMAN="sun50i"
     - env:
         - JOB="Catch-all ARM"
-          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex"
+          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex,socfpga,k2,xilinx"
     - env:
         - BUILDMAN="sandbox x86"
           TOOLCHAIN="x86_64"
@@ -190,7 +194,8 @@ matrix:
         - BUILDMAN="m68k"
           TOOLCHAIN="m68k"
     - env:
-        - BUILDMAN="microblaze"
+        - JOB="Xilinx (ARM and MicroBlaze)"
+          BUILDMAN="xilinx"
           TOOLCHAIN="microblaze"
     - env:
         - BUILDMAN="mips"

commit bbbc7af3b99b81d134c6db688dab176e463f6d86
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Oct 6 16:27:42 2017 -0400

    UPSTREAM: Travis-CI: Move Boundary and Engicam devices to their own jobs
    
    The i.MX6 job can still be close to the time limit, move a few more
    devices out.
    
    Change-Id: I2061d9e692ec733ad5ea0f56ff709397ffecb6a0
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 575e1607d3724bf4a35a69f982f7e7e0655473d6)

diff --git a/.travis.yml b/.travis.yml
index b1a7c497a7..f028e580f2 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -137,6 +137,12 @@ matrix:
         - BUILDMAN="atmel"
     - env:
         - BUILDMAN="aries"
+    - env:
+        - JOB="Boundary Devices"
+          BUILDMAN="boundary"
+    - env:
+        - JOB="engicam"
+          BUILDMAN="engicam"
     - env:
         - JOB="Freescale ARM32"
           BUILDMAN="freescale -x powerpc,m68k,aarch64"
@@ -145,7 +151,7 @@ matrix:
           BUILDMAN="freescale&aarch64"
     - env:
         - JOB="i.MX6 (non-Freescale)"
-          BUILDMAN="mx6 -x freescale,toradex"
+          BUILDMAN="mx6 -x freescale,toradex,boundary,engicam"
     - env:
         - JOB="i.MX (non-Freescale, non-i.MX6)"
           BUILDMAN="mx -x freescale,mx6,toradex"

commit 87279f54e5db674662c4fdedcd553f6c10fb617f
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Oct 6 11:19:12 2017 -0400

    UPSTREAM: Travis-CI: Move Toradex into its own job
    
    A few of the big jobs are getting close to the time limit again, split a
    few more things out.
    
    Change-Id: Ibdfaf4207a57e6400a1047665916e3556bf7ce50
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bc3eed965f45305254bd065a1714715daa9c3113)

diff --git a/.travis.yml b/.travis.yml
index 7012fd1d28..b1a7c497a7 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -145,10 +145,10 @@ matrix:
           BUILDMAN="freescale&aarch64"
     - env:
         - JOB="i.MX6 (non-Freescale)"
-          BUILDMAN="mx6 -x freescale"
+          BUILDMAN="mx6 -x freescale,toradex"
     - env:
         - JOB="i.MX (non-Freescale, non-i.MX6)"
-          BUILDMAN="mx -x freescale,mx6"
+          BUILDMAN="mx -x freescale,mx6,toradex"
     - env:
         - BUILDMAN="samsung"
     - env:
@@ -167,16 +167,19 @@ matrix:
         - BUILDMAN="sun50i"
     - env:
         - JOB="Catch-all ARM"
-          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip"
+          BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex"
     - env:
         - BUILDMAN="sandbox x86"
           TOOLCHAIN="x86_64"
+    - env:
+        - BUILDMAN="toradex"
     - env:
         - BUILDMAN="kirkwood"
     - env:
         - BUILDMAN="mvebu"
     - env:
-        - BUILDMAN="pxa"
+        - JOB="PXA"
+        - BUILDMAN="pxa -x toradex"
     - env:
         - BUILDMAN="m68k"
           TOOLCHAIN="m68k"
@@ -207,7 +210,8 @@ matrix:
     - env:
         - BUILDMAN="siemens"
     - env:
-        - BUILDMAN="tegra"
+        - JOB="tegra"
+          BUILDMAN="tegra -x toradex"
     - env:
         - JOB="am33xx"
           BUILDMAN="am33xx -x siemens"
@@ -220,7 +224,8 @@ matrix:
     - env:
         - BUILDMAN="uniphier"
     - env:
-        - BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip"
+        - JOB="aarch64"
+          BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip"
     - env:
         - BUILDMAN="rockchip"
     - env:

commit b3e1edf26c19a347b5a5152a6357479d729c0e34
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 22:43:45 2017 -0400

    UPSTREAM: fs/ext4/ext4fs.c: Free dirnode in error path of ext4fs_ls
    
    As reported by Coverity, we did not free dirnode in the case of failure.
    Do so now.
    
    Change-Id: I6af93d24c33302d8911ff0021d1c1b067d2a2715
    Reported-by: Coverity (CID: 131221)
    Cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fa9ca8a5d271e0533f61222df2bd6fd512687dbd)

diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 081509dbb4..b0c7303aa4 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -167,6 +167,7 @@ int ext4fs_ls(const char *dirname)
 				  FILETYPE_DIRECTORY);
 	if (status != 1) {
 		printf("** Can not find directory. **\n");
+		ext4fs_free_node(dirnode, &ext4fs_root->diropen);
 		return 1;
 	}
 

commit 0757e90beec4d4cd91d49b039e84bfe901762aae
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 22:14:44 2017 -0400

    UPSTREAM: tools/fit_image.c: Update some return code paths
    
    Coverity has found some problems with the return paths in parts of this
    code.  We have a case where we were going to the wrong part of the
    unwind (open() failed so we cannot close the fd), a case where we were
    only free()ing our buf on the error path and finally a case where we did
    not munmap in the failure path.
    
    Change-Id: I31ee7b7099b7f2a4ec0c11c247029df5eb9d8552
    Reported-by: Coverity (CID: 138492, 138495, 143064)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3c2dff5490831f85f06aa78aad5ef537b661cecf)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 4dc8bd8862..c6026567f3 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -372,7 +372,7 @@ static int fit_build(struct image_tool_params *params, const char *fname)
 	if (fd < 0) {
 		fprintf(stderr, "%s: Can't open %s: %s\n",
 			params->cmdname, fname, strerror(errno));
-		goto err;
+		goto err_buf;
 	}
 	ret = write(fd, buf, size);
 	if (ret != size) {
@@ -501,6 +501,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
 		ret = -EIO;
 		goto err;
 	}
+	free(buf);
 	close(fd);
 	return 0;
 
@@ -601,6 +602,7 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
 	ret = 0;
 
 err:
+	munmap(old_fdt, sbuf.st_size);
 	free(fdt);
 	close(fd);
 	return ret;

commit 8ab67e0d6c97504d48d28e4e12541020ba0bfacb
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 21:12:05 2017 -0400

    UPSTREAM: cmd/time.c: Initialize 'repeatable' variable
    
    We cannot leave this uninitialized, set it to 0.
    
    Change-Id: Ic8f3dd4d7395921bf4269a618aaf92a717dbfe46
    Reported-by: Coverity (CID: 144426)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 146dda391126d4f199c7692f2342efcc34b45ebd)

diff --git a/cmd/time.c b/cmd/time.c
index de57e3b9dd..2cd8b1a577 100644
--- a/cmd/time.c
+++ b/cmd/time.c
@@ -28,7 +28,7 @@ static int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	ulong cycles = 0;
 	int retval = 0;
-	int repeatable;
+	int repeatable = 0;
 
 	if (argc == 1)
 		return CMD_RET_USAGE;

commit 7f2f3661603b7c3672b3a63c3c7b5a1bbf32dd7c
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 20:44:32 2017 -0400

    UPSTREAM: cmd/pxe.c: Rework initrd and bootargs handling slightly
    
    For the initrd portion of handling our bootm arguments we do not have a
    sufficiently long enough buffer for some improbable 64bit cases.  Expand
    this buffer to allow for a 64bit address and almost 256MB initrd to be
    used.  Make use of strncpy/strncat when constructing the values here
    since we know what the worst case valid values are, length wise.
    
    Similarly for bootargs themselves, we need to make use of strlen/sizeof
    and strncpy/strncat to ensure that we don't overflow bootargs itself.
    
    Cc: Simon Glass <sjg@chromium.org>
    Cc: Alexander Graf <agraf@suse.de>
    Change-Id: I86151e4bde53972d9b6105f3a85db93b114e22d8
    Reported-by: Coverity (CID: 131256)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 48ee0a87bc46a6f863ffd9e0396b7a068dd68c50)

diff --git a/cmd/pxe.c b/cmd/pxe.c
index c5a770a269..a62cbe192a 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -616,7 +616,7 @@ static int label_localboot(struct pxe_label *label)
 static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 {
 	char *bootm_argv[] = { "bootm", NULL, NULL, NULL, NULL };
-	char initrd_str[22];
+	char initrd_str[28];
 	char mac_str[29] = "";
 	char ip_str[68] = "";
 	int bootm_argc = 2;
@@ -648,9 +648,9 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 		}
 
 		bootm_argv[2] = initrd_str;
-		strcpy(bootm_argv[2], env_get("ramdisk_addr_r"));
+		strncpy(bootm_argv[2], env_get("ramdisk_addr_r"), 18);
 		strcat(bootm_argv[2], ":");
-		strcat(bootm_argv[2], env_get("filesize"));
+		strncat(bootm_argv[2], env_get("filesize"), 9);
 	}
 
 	if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
@@ -689,9 +689,9 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
 		}
 
 		if (label->append)
-			strcpy(bootargs, label->append);
-		strcat(bootargs, ip_str);
-		strcat(bootargs, mac_str);
+			strncpy(bootargs, label->append, sizeof(bootargs));
+		strncat(bootargs, ip_str, sizeof(bootargs) - strlen(bootargs));
+		strncat(bootargs, mac_str, sizeof(bootargs) - strlen(bootargs));
 
 		cli_simple_process_macros(bootargs, finalbootargs);
 		env_set("bootargs", finalbootargs);

commit bc846a8c0826575efc6c6649a762d61d6bedbf84
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 26 19:37:11 2017 -0400

    UPSTREAM: cmd/nvedit.c: Update input handling to cover overflow cases
    
    When we have multiple messages provided, we need to be sure that we do
    not exceed the length of our 'message' buffer.  In the for loop, make
    sure that pos is not larger than message.  Only copy in at most however
    much of the message buffer remains.  Finally, if we have not reached the
    end of the message buffer, put in a space and NULL, and if we have,
    ensure the buffer is now NULL termined.
    
    Change-Id: I0c4f88803f8525eb6ef0207a6b7fdbec2b43e9ff
    Reported-by: Coverity (CID: 165116)
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c667723ffb50b00585b729ee0da7b0e8c93ffa13)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index b9628b2078..134e54427e 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -609,15 +609,18 @@ int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		sprintf(message, "Please enter '%s': ", argv[1]);
 	} else {
 		/* env_ask envname message1 ... messagen [size] */
-		for (i = 2, pos = 0; i < argc; i++) {
+		for (i = 2, pos = 0; i < argc && pos < sizeof(message); i++) {
 			if (pos)
 				message[pos++] = ' ';
 
-			strcpy(message + pos, argv[i]);
+			strncpy(message + pos, argv[i], sizeof(message) - pos);
 			pos += strlen(argv[i]);
 		}
-		message[pos++] = ' ';
-		message[pos] = '\0';
+		if (pos < sizeof(message) - 1) {
+			message[pos++] = ' ';
+			message[pos] = '\0';
+		} else
+			message[CONFIG_SYS_CBSIZE - 1] = '\0';
 	}
 
 	if (size >= CONFIG_SYS_CBSIZE)

commit cb40c099ea4cc545eb899722815d295cf26d2962
Author: Alison Chaiken <alison@she-devel.com>
Date:   Tue Sep 26 07:42:28 2017 -0700

    UPSTREAM: GPT: fix memory leaks identified by Coverity
    
    Create a common exit for most of the error handling code in
    do_rename_gpt_parts.   Delete the list elements in disk_partitions
    before calling INIT_LIST_HEAD from get_gpt_info() a second time.
    
    The SIZEOF_MISMATCH error is not addressed, since that problem was
    already fixed by "GPT: incomplete initialization in
    allocate_disk_part".
    
    Change-Id: I4ec9881a86c8a50960844e07f69c04a239bc218f
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reported-by: Coverity (CID: 167222, 167235, 167237)
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 18030d04d25d7c08d3deff85881772a520d84d49)

diff --git a/cmd/gpt.c b/cmd/gpt.c
index d4406e3120..9e04affc06 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -633,6 +633,21 @@ static int do_disk_guid(struct blk_desc *dev_desc, char * const namestr)
 }
 
 #ifdef CONFIG_CMD_GPT_RENAME
+/*
+ * There are 3 malloc() calls in set_gpt_info() and there is no info about which
+ * failed.
+ */
+static void set_gpt_cleanup(char **str_disk_guid,
+			    disk_partition_t **partitions)
+{
+#ifdef CONFIG_RANDOM_UUID
+	if (str_disk_guid)
+		free(str_disk_guid);
+#endif
+	if (partitions)
+		free(partitions);
+}
+
 static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 			       char *name1, char *name2)
 {
@@ -651,19 +666,27 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 	ret = get_disk_guid(dev_desc, disk_guid);
 	if (ret < 0)
 		return ret;
+	/*
+	 * Allocates disk_partitions, requiring matching call to del_gpt_info()
+	 * if successful.
+	 */
 	numparts = get_gpt_info(dev_desc);
 	if (numparts <=  0)
 		return numparts ? numparts : -ENODEV;
 
 	partlistlen = calc_parts_list_len(numparts);
 	partitions_list = malloc(partlistlen);
-	if (partitions_list == NULL)
+	if (!partitions_list) {
+		del_gpt_info();
 		return -ENOMEM;
+	}
 	memset(partitions_list, '\0', partlistlen);
 
 	ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list);
-	if (ret < 0)
+	if (ret < 0) {
+		free(partitions_list);
 		return ret;
+	}
 	/*
 	 * Uncomment the following line to print a string that 'gpt write'
 	 * or 'gpt verify' will accept as input.
@@ -671,15 +694,23 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 	debug("OLD partitions_list is %s with %u chars\n", partitions_list,
 	      (unsigned)strlen(partitions_list));
 
+	/* set_gpt_info allocates new_partitions and str_disk_guid */
 	ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid,
 			   &new_partitions, &part_count);
-	if (ret < 0)
-		return ret;
+	if (ret < 0) {
+		del_gpt_info();
+		free(partitions_list);
+		if (ret == -ENOMEM)
+			set_gpt_cleanup(&str_disk_guid, &new_partitions);
+		else
+			goto out;
+	}
 
 	if (!strcmp(subcomm, "swap")) {
 		if ((strlen(name1) > PART_NAME_LEN) || (strlen(name2) > PART_NAME_LEN)) {
 			printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 		list_for_each(pos, &disk_partitions) {
 			curr = list_entry(pos, struct disk_part, list);
@@ -693,21 +724,24 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 		}
 		if ((ctr1 + ctr2 < 2) || (ctr1 != ctr2)) {
 			printf("Cannot swap partition names except in pairs.\n");
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 	} else { /* rename */
 		if (strlen(name2) > PART_NAME_LEN) {
 			printf("Names longer than %d characters are truncated.\n", PART_NAME_LEN);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 		partnum = (int)simple_strtol(name1, NULL, 10);
 		if ((partnum < 0) || (partnum > numparts)) {
 			printf("Illegal partition number %s\n", name1);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto out;
 		}
 		ret = part_get_info(dev_desc, partnum, new_partitions);
 		if (ret < 0)
-			return ret;
+			goto out;
 
 		/* U-Boot partition numbering starts at 1 */
 		list_for_each(pos, &disk_partitions) {
@@ -722,33 +756,50 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 
 	ret = create_gpt_partitions_list(numparts, disk_guid, partitions_list);
 	if (ret < 0)
-		return ret;
+		goto out;
 	debug("NEW partitions_list is %s with %u chars\n", partitions_list,
 	      (unsigned)strlen(partitions_list));
 
 	ret = set_gpt_info(dev_desc, partitions_list, &str_disk_guid,
 			   &new_partitions, &part_count);
-	if (ret < 0)
-		return ret;
+	/*
+	 * Even though valid pointers are here passed into set_gpt_info(),
+	 * it mallocs again, and there's no way to tell which failed.
+	 */
+	if (ret < 0) {
+		del_gpt_info();
+		free(partitions_list);
+		if (ret == -ENOMEM)
+			set_gpt_cleanup(&str_disk_guid, &new_partitions);
+		else
+			goto out;
+	}
 
 	debug("Writing new partition table\n");
 	ret = gpt_restore(dev_desc, disk_guid, new_partitions, numparts);
 	if (ret < 0) {
 		printf("Writing new partition table failed\n");
-		return ret;
+		goto out;
 	}
 
 	debug("Reading back new partition table\n");
+	/*
+	 * Empty the existing disk_partitions list, as otherwise the memory in
+	 * the original list is unreachable.
+	 */
+	del_gpt_info();
 	numparts = get_gpt_info(dev_desc);
-	if (numparts <=  0)
-		return numparts ? numparts : -ENODEV;
+	if (numparts <=  0) {
+		ret = numparts ? numparts : -ENODEV;
+		goto out;
+	}
 	printf("new partition table with %d partitions is:\n", numparts);
 	print_gpt_info();
-
 	del_gpt_info();
-	free(partitions_list);
-	free(str_disk_guid);
+ out:
 	free(new_partitions);
+	free(str_disk_guid);
+	free(partitions_list);
 	return ret;
 }
 #endif

commit e47a88c41f05f5dc1c941163fdd36a9eefaa7ed3
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Mon Sep 25 22:06:31 2017 +0300

    UPSTREAM: fs/ext4: Fix group descriptor checksum calculation
    
    The current code doesn't compute the group descriptor checksum correctly
    for the filesystems that e2fsprogs 1.43.4 creates (they have
    'Group descriptor size: 64' as reported by tune2fs). Extend the checksum
    calculation to be done as ext4_group_desc_csum() does in Linux.
    
    This fixes these errors in dmesg from running fs-test.sh and makes it
    succeed again:
    
    [1671902.620699] EXT4-fs (loop1): ext4_check_descriptors: Checksum for group 0 failed (35782!=10965)
    [1671902.620706] EXT4-fs (loop1): group descriptors corrupted!
    
    Change-Id: I362747a60cc16886c1a215867471b0a83fcf5e47
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 385b73185596cfc9e2acb74ab66abe91c06177f3)

diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 621c61e5c7..31952f48b9 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -432,6 +432,10 @@ uint16_t ext4fs_checksum_update(uint32_t i)
 		crc = ext2fs_crc16(crc, desc, offset);
 		offset += sizeof(desc->bg_checksum);	/* skip checksum */
 		assert(offset == sizeof(*desc));
+		if (offset < fs->gdsize) {
+			crc = ext2fs_crc16(crc, (__u8 *)desc + offset,
+					   fs->gdsize - offset);
+		}
 	}
 
 	return crc;

commit 8f3d02601c436079608d6f10bf6546ee20999867
Author: Felix Brack <fb@ltec.ch>
Date:   Fri Sep 22 14:27:28 2017 +0200

    UPSTREAM: doc: Fix statements on case sensitivity for regulator prefix
    
    The regulator bindings state that regulator prefixes are allowd to be
    in upper or lower case. However pmic_bind_children from pmic_uclass uses
    strncmp to compare DT node name against prefix. This comparison is case
    sensitive hence the regulator driver prefix case matters.
    
    Change-Id: I991a56a1cae736c22012318612e7a4d1f8f25f31
    Signed-off-by: Felix Brack <fb@ltec.ch>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bd2259e3c40c097c47e1dfc58a03b1df66b44840)

diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt
index 2cf4b9de8b..918711eb4d 100644
--- a/doc/device-tree-bindings/regulator/regulator.txt
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -10,10 +10,10 @@ pmic: drivers/power/pmic/max77686.c
 regulator: drivers/power/regulator/max77686.c
 
 For the node name e.g.: "prefix[:alpha:]num { ... }":
-- the driver prefix should be: "prefix" or "PREFIX" - case insensitive
+- the driver prefix should be: "prefix" - case sensitive
 - the node name's "num" is set as "dev->driver_data" on bind
 
-Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "LDO1", "LDOREG@1"...
+Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "ldoreg@1, ...
 
 Optional properties:
 - regulator-name: a string, required by the regulator uclass

commit c41b1f6ed3f3c6590b532733d4a0f7c9c7d5c781
Author: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Date:   Tue Sep 19 23:18:08 2017 +0300

    UPSTREAM: travis.yml: Add job for running test.py in qemu_arm
    
    Note that this commit requires
    https://github.com/swarren/uboot-test-hooks/pull/14 to go in first.
    
    Change-Id: Ibe232788714cbe11384976c905ce7b012b375441
    Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7b09dffc3b07ae08b0b1006ab799c2d1a0364504)

diff --git a/.travis.yml b/.travis.yml
index 00b2a73a5e..7012fd1d28 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -285,6 +285,11 @@ matrix:
           TEST_PY_ID="--id qemu"
           QEMU_TARGET="arm-softmmu"
           BUILDMAN="^integratorcp_cm926ejs$"
+    - env:
+        - TEST_PY_BD="qemu_arm"
+          TEST_PY_TEST_SPEC="not sleep"
+          QEMU_TARGET="arm-softmmu"
+          BUILDMAN="^qemu_arm$"
     - env:
         - TEST_PY_BD="qemu_mips"
           TEST_PY_TEST_SPEC="not sleep"

commit 476f6045b8addf031657657a19f55ebc4b313250
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:32 2017 +0200

    UPSTREAM: spl: dm: Make it possible for the SPL to pick its own DTB from a FIT
    
    u-boot can be embedded within a FIT image with multiple DTBs. It then
    selects at run-time  which one is best suited for the platform.
    Use the same principle here for the SPL: put the DTBs in a FIT image,
    compress it (LZO, GZIP, or no compression) and append it at the end of the
    SPL.
    
    Change-Id: Ifebdd14bdf1abc923d228f9f3947e719c8645356
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    [trini: Move default y of SPL_MULTI_DTB_FIT_DYN_ALLOC to it being the
    default choice if SYS_MALLOC_F, drop spl.h include from lib/fdtdec.c
    it's unused.]
    Signed-off-by Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2f57c95100f231de0f4e0301237cbe477e09084b)

diff --git a/doc/README.multi-dtb-fit b/doc/README.multi-dtb-fit
index 0d4f068bbf..6cc4965bea 100644
--- a/doc/README.multi-dtb-fit
+++ b/doc/README.multi-dtb-fit
@@ -1,8 +1,11 @@
-MULTI DTB FIT
+MULTI DTB FIT and SPL_MULTI_DTB_FIT
 
-The purpose of this feature is to enable u-boot to select its DTB from a FIT
-appended at the end of the binary.
+The purpose of this feature is to enable U-Boot or the SPL to select its DTB
+from a FIT appended at the end of the binary.
+It comes in two flavors: U-Boot (CONFIG_MULTI_DTB_FIT) and SPL
+(CONFIG_SPL_MULTI_DTB_FIT).
 
+U-Boot flavor:
 Usually the DTB is selected by the SPL and passed down to U-Boot. But some
 platforms don't use the SPL. In this case MULTI_DTB_FIT can used to provide
 U-Boot with a choice of DTBs.
@@ -13,3 +16,50 @@ the FIT.
 The selection is done using board_fit_config_name_match() (same as what the SPL
 uses to select the DTB for U-Boot). The selection happens during fdtdec_setup()
 which is called during before relocation by board_init_f().
+
+SPL flavor:
+the SPL uses only a small subset of the DTB and it usually depends more
+on the SOC than on the board. So it's usually fine to include a DTB in the
+SPL that doesn't exactly match the board. There are howerver some cases
+where it's not possible. In the later case, in order to support multiple
+boards (or board revisions) with the same SPL binary, SPL_MULTI_DTB_FIT
+can be used.
+The relevant DTBs are packed into a FIT. This FIT is automatically generated
+at the end of the compilation, compressed and appended to u-boot-spl.bin, so
+that SPL can locate it and select the correct DTB from inside the FIT.
+CONFIG_SPL__OF_LIST is used to list the relevant DTBs.
+The compression stage is optional but reduces the impact on the size of the
+SPL. LZO and GZIP compressions are supported. By default, the area where the
+FIT is uncompressed is dynamicaly allocated but this behaviour can be changed
+for platforms that don't provide a HEAP big enough to contain the uncompressed
+FIT.
+The SPL uses board_fit_config_name_match() to find the correct DTB within the
+FIT (same as what the SPL uses to select the DTB for U-Boot).
+Uncompression and selection stages happen in fdtdec_setup() which is called
+during the early initialization stage of the SPL (spl_early_init() or
+spl_init())
+
+Impacts and performances (SPL flavor):
+The impact of this option is relatively small. Here are some numbers measured
+for a TI DRA72 platform:
+
+                            +----------+------------+-----------+------------+
+                            |  size    | size delta | SPL boot  | boot time  |
+                            |  (bytes) | (bytes)    | time (s)  | delta (s)  |
++---------------------------+----------+------------+-----------+------------+
+| 1 DTB                     |          |            |           |            |
++---------------------------+----------+------------+-----------+------------+
+| reference                 |   125305 |          0 |     1.389 |          0 |
+| LZO (dynamic allocation)  |   125391 |         86 |     1.381 |     -0.008 |
++---------------------------+----------+------------+-----------+------------+
+| 4 DTBs (DRA7, DRA71,      |          |            |           |            |
+| DRA72, DRA72 revC)        |          |            |           |            |
++---------------------------+----------+------------+-----------+------------+
+| LZO (dynamic allocation)  |   125991 |        686 |      1.39 |      0.001 |
+| LZO (user defined area)   |   125927 |        622 |     1.403 |      0.014 |
+| GZIP (user defined area)  |   133880 |       8575 |     1.421 |      0.032 |
+| No compression (in place) |   137472 |      12167 |     1.412 |      0.023 |
++---------------------------+----------+------------+-----------+------------+
+
+Note: SPL boot time is the time elapsed between the 'reset' command is entered
+and the time when the first U-Boot (not SPL) version string is displayed.
diff --git a/dts/Kconfig b/dts/Kconfig
index 454acaaa3c..daa757dd56 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -130,6 +130,89 @@ config MULTI_DTB_FIT
 	  the correct DTB to be used. Use this if you need to support
 	  multiple DTBs but don't use the SPL.
 
+
+config SPL_MULTI_DTB_FIT
+	depends on SPL_LOAD_FIT && SPL_OF_CONTROL && !SPL_OF_PLATDATA
+	bool "Support embedding several DTBs in a FIT image for the SPL"
+	help
+	  This option provides the SPL with the ability to select its own
+	  DTB at runtime from an appended FIT image containing several DTBs.
+	  This allows using the same SPL binary on multiple platforms.
+	  The primary purpose is to handle different versions of
+	  the same platform without tweaking the platform code if the
+	  differences can be expressed in the DTBs (common examples are: bus
+	  capabilities, pad configurations).
+
+config SPL_OF_LIST
+	string "List of device tree files to include for DT control in SPL"
+	depends on SPL_MULTI_DTB_FIT
+	default OF_LIST
+	help
+	  This option specifies a list of device tree files to use for DT
+	  control in the SPL. These will be packaged into a FIT. At run-time,
+	  the SPL will select the correct DT to use by examining the
+	  hardware (e.g. reading a board ID value). This is a list of
+	  device tree files (without the directory or .dtb suffix)
+	  separated by <space>.
+
+choice
+	prompt "SPL OF LIST compression"
+	depends on SPL_MULTI_DTB_FIT
+	default SPL_MULTI_DTB_FIT_LZO
+
+config SPL_MULTI_DTB_FIT_LZO
+	bool "LZO"
+	depends on SYS_MALLOC_F
+	select SPL_LZO
+	help
+	  Compress the FIT image containing the DTBs available for the SPL
+	  using LZO compression. (requires lzop on host).
+
+config SPL_MULTI_DTB_FIT_GZIP
+	bool "GZIP"
+	depends on SYS_MALLOC_F
+	select SPL_GZIP
+	help
+	  Compress the FIT image containing the DTBs available for the SPL
+	  using GZIP compression. (requires gzip on host)
+
+config SPL_MULTI_DTB_FIT_NO_COMPRESSION
+	bool "No compression"
+	help
+	  Do not compress the FIT image containing the DTBs available for the SPL.
+	  Use this options only if LZO is not available and the DTBs are very small.
+endchoice
+
+choice
+	prompt "Location of uncompressed DTBs "
+	depends on (SPL_MULTI_DTB_FIT_GZIP || SPL_MULTI_DTB_FIT_LZO)
+	default SPL_MULTI_DTB_FIT_DYN_ALLOC if SYS_MALLOC_F
+
+config SPL_MULTI_DTB_FIT_DYN_ALLOC
+	bool "Dynamically allocate the memory"
+	depends on SYS_MALLOC_F
+
+config SPL_MULTI_DTB_FIT_USER_DEFINED_AREA
+	bool "User-defined location"
+endchoice
+
+config SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ
+	hex "Size of memory reserved to uncompress the DTBs"
+	depends on (SPL_MULTI_DTB_FIT_GZIP || SPL_MULTI_DTB_FIT_LZO)
+	default 0x8000
+	help
+	   This is the size of this area where the DTBs are uncompressed.
+	   If this area is dynamically allocated, make sure that
+	   SPL_SYS_MALLOC_F_LEN is big enough to contain it.
+
+config SPL_MULTI_DTB_FIT_USER_DEF_ADDR
+	hex "Address of memory where dtbs are uncompressed"
+	depends on SPL_MULTI_DTB_FIT_USER_DEFINED_AREA
+	help
+	   the FIT image containing the DTBs is uncompressed in an area defined
+	   at compilation time. This is the address of this area. It must be
+	   aligned on 2-byte boundary.
+
 config OF_SPL_REMOVE_PROPS
 	string "List of device tree properties to drop for SPL"
 	depends on SPL_OF_CONTROL
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 587565a015..8edc468902 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -15,6 +15,7 @@
 #include <serial.h>
 #include <asm/sections.h>
 #include <linux/ctype.h>
+#include <linux/lzo.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -1204,9 +1205,66 @@ int fdtdec_setup_memory_banksize(void)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
+# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
+	CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
+static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
+{
+	size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
+	ulong sz_in = sz_src;
+	void *dst;
+	int rc;
+
+	if (CONFIG_IS_ENABLED(GZIP))
+		if (gzip_parse_header(src, sz_in) < 0)
+			return -1;
+	if (CONFIG_IS_ENABLED(LZO))
+		if (!lzop_is_valid_header(src))
+			return -EBADMSG;
+
+	if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
+		dst = malloc(sz_out);
+		if (!dst) {
+			puts("uncompress_blob: Unable to allocate memory\n");
+			return -ENOMEM;
+		}
+	} else  {
+#  if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
+		dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
+#  else
+		return -ENOTSUPP;
+#  endif
+	}
+
+	if (CONFIG_IS_ENABLED(GZIP))
+		rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
+	else if (CONFIG_IS_ENABLED(LZO))
+		rc = lzop_decompress(src, sz_in, dst, &sz_out);
+
+	if (rc < 0) {
+		/* not a valid compressed blob */
+		puts("uncompress_blob: Unable to uncompress\n");
+		if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
+			free(dst);
+		return -EBADMSG;
+	}
+	*dstp = dst;
+	return 0;
+}
+# else
+static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
+{
+	return -ENOTSUPP;
+}
+# endif
+#endif
+
 int fdtdec_setup(void)
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+# if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
+	void *fdt_blob;
+# endif
 # ifdef CONFIG_OF_EMBED
 	/* Get a pointer to the FDT */
 	gd->fdt_blob = __dtb_dt_begin;
@@ -1217,15 +1275,6 @@ int fdtdec_setup(void)
 		gd->fdt_blob = (ulong *)&_image_binary_end;
 	else
 		gd->fdt_blob = (ulong *)&__bss_end;
-
-#  elif defined CONFIG_MULTI_DTB_FIT
-	gd->fdt_blob = locate_dtb_in_fit(&_end);
-
-	if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) {
-		puts("Failed to find proper dtb in embedded FIT Image\n");
-		return -1;
-	}
-
 #  else
 	/* FDT is at end of image */
 	gd->fdt_blob = (ulong *)&_end;
@@ -1244,7 +1293,27 @@ int fdtdec_setup(void)
 	gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
 						(uintptr_t)gd->fdt_blob);
 # endif
+
+# if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
+	/*
+	 * Try and uncompress the blob.
+	 * Unfortunately there is no way to know how big the input blob really
+	 * is. So let us set the maximum input size arbitrarily high. 16MB
+	 * ought to be more than enough for packed DTBs.
+	 */
+	if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
+		gd->fdt_blob = fdt_blob;
+
+	/*
+	 * Check if blob is a FIT images containings DTBs.
+	 * If so, pick the most relevant
+	 */
+	fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
+	if (fdt_blob)
+		gd->fdt_blob = fdt_blob;
+# endif
 #endif
+
 	return fdtdec_prepare_fdt();
 }
 
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index b86ea76bab..49b27ac926 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -209,10 +209,21 @@ cmd_cat = cat $(filter-out $(PHONY), $^) > $@
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
+ifneq ($(CONFIG_SPL_MULTI_DTB_FIT),y)
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).dtb
+else ifeq ($(CONFIG_SPL_MULTI_DTB_FIT_LZO),y)
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit.lzo
+else ifeq ($(CONFIG_SPL_MULTI_DTB_FIT_GZIP),y)
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit.gz
+else
+FINAL_DTB_CONTAINER = $(obj)/$(SPL_BIN).multidtb.fit
+endif
+
+
 ifeq ($(CONFIG_$(SPL_TPL_)OF_CONTROL)$(CONFIG_OF_SEPARATE)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)
 $(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
 		$(if $(CONFIG_SPL_SEPARATE_BSS),,$(obj)/$(SPL_BIN)-pad.bin) \
-		$(obj)/$(SPL_BIN).dtb FORCE
+		$(FINAL_DTB_CONTAINER)  FORCE
 	$(call if_changed,cat)
 
 $(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-dtb.bin FORCE
@@ -383,6 +394,28 @@ checkdtoc: tools
 PHONY += FORCE
 FORCE:
 
+PHONY += dtbs
+dtbs:
+	$(Q)$(MAKE) $(build)=dts dtbs
+
 # Declare the contents of the .PHONY variable as phony.  We keep that
 # information in a variable so we can use it in if_changed and friends.
 .PHONY: $(PHONY)
+
+SHRUNK_ARCH_DTB = $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST)))
+.SECONDEXPANSION:
+$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, arch/$(ARCH)/dts/%, $$@)
+	$(call if_changed,fdtgrep)
+
+MKIMAGEFLAGS_$(SPL_BIN).multidtb.fit = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
+	-n "Multi DTB fit image for $(SPL_BIN)" -E \
+	$(patsubst %,-b %,$(SHRUNK_ARCH_DTB))
+
+$(obj)/$(SPL_BIN).multidtb.fit: /dev/null $(SHRUNK_ARCH_DTB) FORCE
+	$(call if_changed,mkimage)
+
+$(obj)/$(SPL_BIN).multidtb.fit.gz: $(obj)/$(SPL_BIN).multidtb.fit
+	@gzip -kf9 $< > $@
+
+$(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit
+	@lzop -f9 $< > $@

commit 6f869ebd9001de0466ef4cf0ac7f1b1d7cf4d0d7
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:31 2017 +0200

    UPSTREAM: fdtdec: sort include files
    
    Sort include files in accordance to U-Boot coding style.
    
    Change-Id: I3c7992edd31468f4105a95b86a6f05108e751e92
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 035d64025c3e32a2f372981f86fc69255feeb2b2)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index e950618d5a..587565a015 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -4,16 +4,16 @@
  */
 
 #ifndef USE_HOSTCC
-#include <boot_fit.h>
 #include <common.h>
+#include <boot_fit.h>
 #include <dm.h>
+#include <dm/of_extra.h>
 #include <errno.h>
-#include <serial.h>
-#include <libfdt.h>
-#include <fdt_support.h>
 #include <fdtdec.h>
+#include <fdt_support.h>
+#include <libfdt.h>
+#include <serial.h>
 #include <asm/sections.h>
-#include <dm/of_extra.h>
 #include <linux/ctype.h>
 
 DECLARE_GLOBAL_DATA_PTR;

commit 205ac79efb3a9aca5ebabc7ddcf2d5da4aaa6ab1
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:30 2017 +0200

    UPSTREAM: lib: allow building lzo for the SPL
    
    Change-Id: If6ccf36b13632f5450f700b8931975a4742a698e
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f52bdf4b678defea2341aa4b68736e6978180222)

diff --git a/lib/Kconfig b/lib/Kconfig
index a5aa2e6244..a9ce9fc82b 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -183,6 +183,11 @@ config LZO
 	help
 	  This enables support for LZO compression algorithm.r
 
+config SPL_LZO
+	bool "Enable LZO decompression support in SPL"
+	help
+	  This enables support for LZO compression algorithm in the SPL.
+
 config SPL_GZIP
 	bool "Enable gzip decompression support for SPL build"
 	select SPL_ZLIB
diff --git a/lib/Makefile b/lib/Makefile
index ab604be04f..6000cd15d0 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -10,7 +10,6 @@ ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_EFI) += efi/
 obj-$(CONFIG_EFI_LOADER) += efi_loader/
 obj-$(CONFIG_LZMA) += lzma/
-obj-$(CONFIG_LZO) += lzo/
 obj-$(CONFIG_BZIP2) += bzip2/
 obj-$(CONFIG_TIZEN) += tizen/
 obj-$(CONFIG_FIT) += libfdt/
@@ -56,6 +55,8 @@ obj-$(CONFIG_SHA256) += sha256.o
 
 obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
 obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o
+obj-$(CONFIG_$(SPL_)LZO) += lzo/
+
 
 obj-$(CONFIG_$(SPL_TPL_)SAVEENV) += qsort.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/

commit 194712615eb6bfeaee85469e2d97c6876741e4a1
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:29 2017 +0200

    UPSTREAM: gzip: add a function to parse the header
    
    Change-Id: I9829ad25a955eb4764ae2e66f1c32751703d9ae6
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 376ddf9d4a21d0af4c70e97c52e5f0854fb2d696)

diff --git a/include/common.h b/include/common.h
index c010aff87d..d890be50fc 100644
--- a/include/common.h
+++ b/include/common.h
@@ -629,6 +629,7 @@ ulong	usec2ticks    (unsigned long usec);
 ulong	ticks2usec    (unsigned long ticks);
 
 /* lib/gunzip.c */
+int gzip_parse_header(const unsigned char *src, unsigned long len);
 int gunzip(void *, int, unsigned char *, unsigned long *);
 int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp,
 						int stoponerr, int offset);
diff --git a/lib/gunzip.c b/lib/gunzip.c
index 832b3064e7..adb86c7550 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -42,7 +42,7 @@ void gzfree(void *x, void *addr, unsigned nb)
 	free (addr);
 }
 
-int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
+int gzip_parse_header(const unsigned char *src, unsigned long len)
 {
 	int i, flags;
 
@@ -63,12 +63,21 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
 			;
 	if ((flags & HEAD_CRC) != 0)
 		i += 2;
-	if (i >= *lenp) {
+	if (i >= len) {
 		puts ("Error: gunzip out of data in header\n");
 		return (-1);
 	}
+	return i;
+}
+
+int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp)
+{
+	int offset = gzip_parse_header(src, *lenp);
+
+	if (offset < 0)
+		return offset;
 
-	return zunzip(dst, dstlen, src, lenp, 1, i);
+	return zunzip(dst, dstlen, src, lenp, 1, offset);
 }
 
 #ifdef CONFIG_CMD_UNZIP

commit df70772d8a598e96a8b178a8c097c7d682054786
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:28 2017 +0200

    UPSTREAM: lzo: add a function to check the validity of the header
    
    Change-Id: I8835606db327dc958e90ce717ae4fe85439b46e3
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d753f942ec12e6b5b2db73698aa6c55588053d3a)

diff --git a/include/linux/lzo.h b/include/linux/lzo.h
index 88687faba1..8981d04f96 100644
--- a/include/linux/lzo.h
+++ b/include/linux/lzo.h
@@ -31,6 +31,9 @@ int lzo1x_decompress_safe(const unsigned char *src, size_t src_len,
 int lzop_decompress(const unsigned char *src, size_t src_len,
 		    unsigned char *dst, size_t *dst_len);
 
+/* check if the header is valid (based on magic numbers) */
+bool lzop_is_valid_header(const unsigned char *src);
+
 /*
  * Return values (< 0 = Error)
  */
diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c
index ccc90b8ee5..65fef0b0eb 100644
--- a/lib/lzo/lzo1x_decompress.c
+++ b/lib/lzo/lzo1x_decompress.c
@@ -30,16 +30,29 @@ static const unsigned char lzop_magic[] = {
 
 #define HEADER_HAS_FILTER	0x00000800L
 
-static inline const unsigned char *parse_header(const unsigned char *src)
+
+bool lzop_is_valid_header(const unsigned char *src)
 {
-	u16 version;
 	int i;
-
 	/* read magic: 9 first bytes */
 	for (i = 0; i < ARRAY_SIZE(lzop_magic); i++) {
 		if (*src++ != lzop_magic[i])
-			return NULL;
+			return false;
 	}
+	return true;
+}
+
+static inline const unsigned char *parse_header(const unsigned char *src)
+{
+	u16 version;
+	int i;
+
+	if (!lzop_is_valid_header(src))
+		return NULL;
+
+	/* skip header */
+	src += 9;
+
 	/* get version (2bytes), skip library version (2),
 	 * 'need to be extracted' version (2) and
 	 * method (1) */

commit 0079efa1b4d2ddcf0ef6fd653fbebd94cec729e3
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:27 2017 +0200

    UPSTREAM: fit: If no matching config is found in fit_find_config_node(), use the default one
    
    If board_fit_config_name_match() doesn't match any configuration node,
    then use the default one (if provided).
    
    Change-Id: Ieb93f146a54cb6d75d8f6b395078c315a4fac134
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 02035d0086b3f9114463a9b9df38a5618ffe8a04)

diff --git a/common/common_fit.c b/common/common_fit.c
index 5f5f3f9a44..85b33d8c3b 100644
--- a/common/common_fit.c
+++ b/common/common_fit.c
@@ -32,6 +32,9 @@ int fit_find_config_node(const void *fdt)
 {
 	const char *name;
 	int conf, node, len;
+	const char *dflt_conf_name;
+	const char *dflt_conf_desc = NULL;
+	int dflt_conf_node = -ENOENT;
 
 	conf = fdt_path_offset(fdt, FIT_CONFS_PATH);
 	if (conf < 0) {
@@ -39,6 +42,9 @@ int fit_find_config_node(const void *fdt)
 		      conf);
 		return -EINVAL;
 	}
+
+	dflt_conf_name = fdt_getprop(fdt, conf, "default", &len);
+
 	for (node = fdt_first_subnode(fdt, conf);
 	     node >= 0;
 	     node = fdt_next_subnode(fdt, node)) {
@@ -50,6 +56,15 @@ int fit_find_config_node(const void *fdt)
 #endif
 			return -EINVAL;
 		}
+
+		if (dflt_conf_name) {
+			const char *node_name = fdt_get_name(fdt, node, NULL);
+			if (strcmp(dflt_conf_name, node_name) == 0) {
+				dflt_conf_node = node;
+				dflt_conf_desc = name;
+			}
+		}
+
 		if (board_fit_config_name_match(name))
 			continue;
 
@@ -58,5 +73,10 @@ int fit_find_config_node(const void *fdt)
 		return node;
 	}
 
+	if (dflt_conf_node != -ENOENT) {
+		debug("Selecting default config '%s'", dflt_conf_desc);
+		return dflt_conf_node;
+	}
+
 	return -ENOENT;
 }
diff --git a/include/image.h b/include/image.h
index b16a34cd6a..3e2da587ba 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1321,6 +1321,19 @@ void board_fit_image_post_process(void **p_image, size_t *p_size);
 #define FDT_ERROR	((ulong)(-1))
 
 ulong fdt_getprop_u32(const void *fdt, int node, const char *prop);
+
+/**
+ * fit_find_config_node() - Find the node for the best DTB in a FIT image
+ *
+ * A FIT image contains one or more DTBs. This function parses the
+ * configurations described in the FIT images and returns the node of
+ * the first matching DTB. To check if a DTB matches a board, this function
+ * calls board_fit_config_name_match(). If no matching DTB is found, it returns
+ * the node described by the default configuration if it exists.
+ *
+ * @fdt: pointer to flat device tree
+ * @return the node if found, -ve otherwise
+ */
 int fit_find_config_node(const void *fdt);
 
 /**

commit 1481d9f17676356207187adbfe2ec296fcf06aa2
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:26 2017 +0200

    UPSTREAM: fit: fixed bug in locate_dtb_in_fit()
    
    If the dtb is the first data of the FIT, the its offset is 0x0. Change the
    test to '<' instead of '<='
    
    Change-Id: Ie6dd1734049f642511db0fc1b19f2af0bec8de04
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d56b86eec32a700cdc16170ad8365ee7c6522f0e)

diff --git a/common/boot_fit.c b/common/boot_fit.c
index ce4293184a..add65c4bae 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -73,7 +73,7 @@ void *locate_dtb_in_fit(const void *fit)
 
 	ret = fdt_offset(fit);
 
-	if (ret <= 0)
+	if (ret < 0)
 		return NULL;
 	else
 		return (void *)fit+size+ret;

commit ea5b64c6e7f477be5edd65333a10aca042d2eb10
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:25 2017 +0200

    UPSTREAM: fit: use 'const' for the input of fdt_offset() and locate_dtb_in_fit()
    
    Those 2 functions don't modify their input, we can mark it const.
    This prevents compilation warnings when they are provided const input.
    
    Change-Id: I9583751451cfc26a99ee94f87447dd6337d0cc67
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 906a9dbbcba85e8b02414c960c75103cc4755102)

diff --git a/common/boot_fit.c b/common/boot_fit.c
index 0a723150b5..ce4293184a 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -13,7 +13,7 @@
 #include <image.h>
 #include <libfdt.h>
 
-int fdt_offset(void *fit)
+static int fdt_offset(const void *fit)
 {
 	int images, node, fdt_len, fdt_node, fdt_offset;
 	const char *fdt_name;
@@ -55,7 +55,7 @@ int fdt_offset(void *fit)
 	return fdt_offset;
 }
 
-void *locate_dtb_in_fit(void *fit)
+void *locate_dtb_in_fit(const void *fit)
 {
 	struct image_header *header;
 	int size;
diff --git a/include/boot_fit.h b/include/boot_fit.h
index b7d2462dd9..e16ae5bafa 100644
--- a/include/boot_fit.h
+++ b/include/boot_fit.h
@@ -5,5 +5,10 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-int fdt_offset(void *fit);
-void *locate_dtb_in_fit(void *fit);
+/**
+ * locate_dtb_in_fit - Find a DTB matching the board in a FIT image
+ * @fit:	pointer to the FIT image
+ *
+ * @return a pointer to a matching DTB blob if found, NULL otherwise
+ */
+void *locate_dtb_in_fit(const void *fit);

commit 2bbcffb1d32577bf249357776460c34feea487b5
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Fri Sep 15 12:57:24 2017 +0200

    UPSTREAM: dts: renamed FIT_EMBED to MULTI_DTB_FIT and moved it to the dts Kconfig
    
    CONFIG_FIT_EMBED might be confused with CONFIG_OF_EMBED, rename it
    MULTI_DTB_FIT as it is able to get a DTB from a FIT image containing
    multiple DTBs. Also move the option to the Kconfig dedicated to the DTS
    options and create a README for this feature.
    
    Change-Id: Ide55c474339db3ccd5e20499c54c8bb41fe3a2c9
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 11955590a284ecb75892aad5f1174ca1b94a709b)

diff --git a/Makefile b/Makefile
index b7d5cbb3f9..6a92e3b60d 100644
--- a/Makefile
+++ b/Makefile
@@ -878,7 +878,7 @@ dts/dt.dtb: u-boot
 quiet_cmd_copy = COPY    $@
       cmd_copy = cp $< $@
 
-ifeq ($(CONFIG_FIT_EMBED),y)
+ifeq ($(CONFIG_MULTI_DTB_FIT),y)
 
 fit-dtb.blob: dts/dt.dtb FORCE
 	$(call if_changed,mkimage)
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index 266a66b678..6c77d915e5 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -166,7 +166,7 @@ int get_num_eth_ports(void)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	if (!strcmp(name, "keystone-k2e-evm"))
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 15f0f54af6..5120b2cece 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -216,7 +216,7 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	bool eeprom_read = board_ti_was_eeprom_read();
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index c7330996d1..e99e6355b4 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -150,7 +150,7 @@ int board_early_init_f(void)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	if (!strcmp(name, "keystone-k2hk-evm"))
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index 166367bfb9..c65f33131d 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -138,7 +138,7 @@ int board_early_init_f(void)
 }
 #endif
 
-#if defined(CONFIG_FIT_EMBED)
+#if defined(CONFIG_MULTI_DTB_FIT)
 int board_fit_config_name_match(const char *name)
 {
 	if (!strcmp(name, "keystone-k2l-evm"))
diff --git a/common/Kconfig b/common/Kconfig
index ef5b4d8c88..78e0094b78 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -405,22 +405,6 @@ config SYS_STDIO_DEREGISTER
 
 endmenu
 
-config DTB_RESELECT
-	bool "Support swapping dtbs at a later point in boot"
-	depends on FIT_EMBED
-	help
-	  It is possible during initial boot you may need to use a generic
-	  dtb until you can fully determine the board your running on. This
-	  config allows boards to implement a function at a later point
-	  during boot to switch to the "correct" dtb.
-
-config FIT_EMBED
-	bool "Support a FIT image embedded in the U-boot image"
-	help
-	  This option provides hooks to allow U-boot to parse an
-	  appended FIT image and enable board specific code to then select
-	  the correct DTB to be used.
-
 config DEFAULT_FDT_FILE
 	string "Default fdt file"
 	help
diff --git a/common/Makefile b/common/Makefile
index f79e8fe13a..525433c888 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -105,7 +105,7 @@ obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOT_IMAGE) += image-android.o
 obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
-obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
+obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-y += memsize.o
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index fed6addab6..b6a5282ff4 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 2b29bf4491..9c8b66d1e1 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 80546ecfc9..bfb95abe32 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 732c9d2f7f..7ab0d47e03 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DTB_RESELECT=y
-CONFIG_FIT_EMBED=y
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/doc/README.multi-dtb-fit b/doc/README.multi-dtb-fit
new file mode 100644
index 0000000000..0d4f068bbf
--- /dev/null
+++ b/doc/README.multi-dtb-fit
@@ -0,0 +1,15 @@
+MULTI DTB FIT
+
+The purpose of this feature is to enable u-boot to select its DTB from a FIT
+appended at the end of the binary.
+
+Usually the DTB is selected by the SPL and passed down to U-Boot. But some
+platforms don't use the SPL. In this case MULTI_DTB_FIT can used to provide
+U-Boot with a choice of DTBs.
+The relevant DTBs are packed into a FIT (list provided by CONFIG__OF_LIST). The
+FIT is automatically generated at the end of the compilation and appended to
+u-boot.bin so that U-Boot can locate it and select the correct DTB from inside
+the FIT.
+The selection is done using board_fit_config_name_match() (same as what the SPL
+uses to select the DTB for U-Boot). The selection happens during fdtdec_setup()
+which is called during before relocation by board_init_f().
diff --git a/dts/Kconfig b/dts/Kconfig
index 4ee0510943..454acaaa3c 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -102,7 +102,7 @@ config DEFAULT_DEVICE_TREE
 
 config OF_LIST
 	string "List of device tree files to include for DT control"
-	depends on SPL_LOAD_FIT || FIT_EMBED
+	depends on SPL_LOAD_FIT || MULTI_DTB_FIT
 	default DEFAULT_DEVICE_TREE
 	help
 	  This option specifies a list of device tree files to use for DT
@@ -112,6 +112,24 @@ config OF_LIST
 	  device tree files (without the directory or .dtb suffix)
 	  separated by <space>.
 
+
+config DTB_RESELECT
+	bool "Support swapping dtbs at a later point in boot"
+	depends on MULTI_DTB_FIT
+	help
+	  It is possible during initial boot you may need to use a generic
+	  dtb until you can fully determine the board your running on. This
+	  config allows boards to implement a function at a later point
+	  during boot to switch to the "correct" dtb.
+
+config MULTI_DTB_FIT
+	bool "Support embedding several DTBs in a FIT image for u-boot"
+	help
+	  This option provides hooks to allow U-boot to parse an
+	  appended FIT image and enable board specific code to then select
+	  the correct DTB to be used. Use this if you need to support
+	  multiple DTBs but don't use the SPL.
+
 config OF_SPL_REMOVE_PROPS
 	string "List of device tree properties to drop for SPL"
 	depends on SPL_OF_CONTROL
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 4a8a8d74e0..e950618d5a 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1218,7 +1218,7 @@ int fdtdec_setup(void)
 	else
 		gd->fdt_blob = (ulong *)&__bss_end;
 
-#  elif defined CONFIG_FIT_EMBED
+#  elif defined CONFIG_MULTI_DTB_FIT
 	gd->fdt_blob = locate_dtb_in_fit(&_end);
 
 	if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) {

commit 263b1d7d681014c1c1bea2503aef31af5e42d06e
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Wed Sep 13 19:16:44 2017 +0900

    UPSTREAM: linux/kernel.h: import DIV_ROUND_{DOWN, UP}_ULL from Linux
    
    These macros are useful to avoid link error on 32-bit systems.
    
    Change-Id: Id451c874a2a89e3ebff352e4c90d2d4d0613b9bc
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 84570a0c111ac50372d51271eadc13ff5cbb1a54)

diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 0b616713cc..87d2d9554d 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -57,6 +57,11 @@
 #define FIELD_SIZEOF(t, f) (sizeof(((t*)0)->f))
 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
 
+#define DIV_ROUND_DOWN_ULL(ll, d) \
+	({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
+
+#define DIV_ROUND_UP_ULL(ll, d)		DIV_ROUND_DOWN_ULL((ll) + (d) - 1, (d))
+
 #if BITS_PER_LONG == 32
 # define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d)
 #else

commit bcf5156aaaa4a9d132c0e6c3cf9487a0141f3a0e
Author: Tom Rini <trini@konsulko.com>
Date:   Wed Oct 4 16:44:30 2017 -0400

    UPSTREAM: common: Drop LOGLEVEL to 4
    
    While this came in with a default value of 6 I am lowering this to 4.
    The MTD/UBI code has a large number of error messages that we include
    now.  In addition, "normally" warning messages are not included so this
    feels like a more natural level to have.
    
    Change-Id: I20bc4b32caf1876d5f6052851580383f00a67dc9
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6a3e65dea3e525b5337ca8014aa4be9f5fafeb92)

diff --git a/common/Kconfig b/common/Kconfig
index ed8db73cff..ef5b4d8c88 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -245,7 +245,7 @@ config IDENT_STRING
 
 config LOGLEVEL
 	int "loglevel"
-	default 6
+	default 4
 	range 0 8
 	help
 	  All Messages with a loglevel smaller than the console loglevel will
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index cd89c2a235..81654b2304 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -41,4 +41,3 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_USE_TINY_PRINTF=y
-CONFIG_LOGLEVEL=4
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 059cb5992e..705e001457 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -14,7 +14,6 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
-CONFIG_LOGLEVEL=4
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 3e9eb4fa84..c95134bcf9 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -8,7 +8,6 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_BOOTDELAY=3
-CONFIG_LOGLEVEL=4
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 5b7fc8ae14..71a382a3e1 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -16,7 +16,6 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
 CONFIG_BOOTDELAY=3
-CONFIG_LOGLEVEL=4
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
 # CONFIG_DISPLAY_BOARDINFO is not set

commit d42197e44e9091ec4553b74a54a8502a2415a09f
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Sep 29 12:31:20 2017 +0900

    UPSTREAM: dm: replace dm_dbg() with pr_debug()
    
    As we discussed before in ML, dm_dbg() causes undefined reference
    error if #define DEBUG is added to users, but not drivers/core/util.c
    
    We do not need this macro because we can use pr_debug() instead, and
    it is pretty easy to enable it for the DM core by using ccflags-y.
    
    Change-Id: I0732d1fec827d434b1163093920a3c5bd682803e
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ceb9190969e458dcd1427566f762dbb9cfdfdc94)

diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 7afef1f9a3..e8ba20ca82 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -45,6 +45,12 @@ config DM_WARN
 	  This will cause dm_warn() to be compiled out - it will do nothing
 	  when called.
 
+config DM_DEBUG
+	bool "Enable debug messages in driver model core"
+	depends on DM
+	help
+	  Say Y here if you want to compile in debug messages in DM core.
+
 config DM_DEVICE_REMOVE
 	bool "Support device removal"
 	depends on DM
diff --git a/drivers/core/Makefile b/drivers/core/Makefile
index 3d68c70b57..a5039c5bd3 100644
--- a/drivers/core/Makefile
+++ b/drivers/core/Makefile
@@ -16,3 +16,5 @@ ifndef CONFIG_DM_DEV_READ_INLINE
 obj-$(CONFIG_OF_CONTROL) += read.o
 endif
 obj-$(CONFIG_OF_CONTROL) += of_extra.o ofnode.o read_extra.o
+
+ccflags-$(CONFIG_DM_DEBUG) += -DDEBUG
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 5463d1ffa5..de63e5335a 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -161,7 +161,7 @@ static int device_bind_common(struct udevice *parent, const struct driver *drv,
 	}
 
 	if (parent)
-		dm_dbg("Bound device %s to %s\n", dev->name, parent->name);
+		pr_debug("Bound device %s to %s\n", dev->name, parent->name);
 	if (devp)
 		*devp = dev;
 
diff --git a/drivers/core/lists.c b/drivers/core/lists.c
index 6067914e81..6fa5d1090a 100644
--- a/drivers/core/lists.c
+++ b/drivers/core/lists.c
@@ -139,12 +139,13 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 	if (devp)
 		*devp = NULL;
 	name = ofnode_get_name(node);
-	dm_dbg("bind node %s\n", name);
+	pr_debug("bind node %s\n", name);
 
 	compat_list = ofnode_get_property(node, "compatible", &compat_length);
 	if (!compat_list) {
 		if (compat_length == -FDT_ERR_NOTFOUND) {
-			dm_dbg("Device '%s' has no compatible string\n", name);
+			pr_debug("Device '%s' has no compatible string\n",
+				 name);
 			return 0;
 		}
 
@@ -159,8 +160,8 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 	 */
 	for (i = 0; i < compat_length; i += strlen(compat) + 1) {
 		compat = compat_list + i;
-		dm_dbg("   - attempt to match compatible string '%s'\n",
-		       compat);
+		pr_debug("   - attempt to match compatible string '%s'\n",
+			 compat);
 
 		for (entry = driver; entry != driver + n_ents; entry++) {
 			ret = driver_check_compatible(entry->of_match, &id,
@@ -171,11 +172,11 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 		if (entry == driver + n_ents)
 			continue;
 
-		dm_dbg("   - found match at '%s'\n", entry->name);
+		pr_debug("   - found match at '%s'\n", entry->name);
 		ret = device_bind_with_driver_data(parent, entry, name,
 						   id->data, node, &dev);
 		if (ret == -ENODEV) {
-			dm_dbg("Driver '%s' refuses to bind\n", entry->name);
+			pr_debug("Driver '%s' refuses to bind\n", entry->name);
 			continue;
 		}
 		if (ret) {
@@ -191,7 +192,7 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp)
 	}
 
 	if (!found && !result && ret != -ENODEV)
-		dm_dbg("No match for node '%s'\n", name);
+		pr_debug("No match for node '%s'\n", name);
 
 	return result;
 }
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 757d109e57..976e2c4fdd 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -227,7 +227,7 @@ static int dm_scan_fdt_live(struct udevice *parent,
 		    !of_find_property(np, "u-boot,dm-pre-reloc", NULL))
 			continue;
 		if (!of_device_is_available(np)) {
-			dm_dbg("   - ignoring disabled device\n");
+			pr_debug("   - ignoring disabled device\n");
 			continue;
 		}
 		err = lists_bind_fdt(parent, np_to_ofnode(np), NULL);
@@ -270,7 +270,7 @@ static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
 		    !dm_fdt_pre_reloc(blob, offset))
 			continue;
 		if (!fdtdec_get_is_enabled(blob, offset)) {
-			dm_dbg("   - ignoring disabled device\n");
+			pr_debug("   - ignoring disabled device\n");
 			continue;
 		}
 		err = lists_bind_fdt(parent, offset_to_ofnode(offset), NULL);
diff --git a/drivers/core/util.c b/drivers/core/util.c
index 2e232d57a1..aaaed4ec02 100644
--- a/drivers/core/util.c
+++ b/drivers/core/util.c
@@ -20,17 +20,6 @@ void dm_warn(const char *fmt, ...)
 }
 #endif
 
-#ifdef DEBUG
-void dm_dbg(const char *fmt, ...)
-{
-	va_list args;
-
-	va_start(args, fmt);
-	vprintf(fmt, args);
-	va_end(args);
-}
-#endif
-
 int list_count_items(struct list_head *head)
 {
 	struct list_head *node;
diff --git a/include/dm/util.h b/include/dm/util.h
index 45529ce0e6..0d4ce8f4e6 100644
--- a/include/dm/util.h
+++ b/include/dm/util.h
@@ -15,14 +15,6 @@ static inline void dm_warn(const char *fmt, ...)
 }
 #endif
 
-#ifdef DEBUG
-void dm_dbg(const char *fmt, ...);
-#else
-static inline void dm_dbg(const char *fmt, ...)
-{
-}
-#endif
-
 struct list_head;
 
 /**

commit d4496ef3da203f7bd32cf5d6b845f9d734bbebbc
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Fri Sep 29 10:35:17 2017 +0900

    UPSTREAM: linux/bitfield.h: import <linux/bitfield.h> from Linux 4.13
    
    Copied from Linux 4.13.
    
    Commit log of 3e9b3112ec74 of Linux explains well why this header
    is useful.
    
    Change-Id: I6d565317c573e01eb5df2af5a24982db049e8e08
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6990e91f0971b877cd636e646f93587b1afbb284)

diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h
new file mode 100644
index 0000000000..8b9d6fff00
--- /dev/null
+++ b/include/linux/bitfield.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2014 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _LINUX_BITFIELD_H
+#define _LINUX_BITFIELD_H
+
+#include <linux/bug.h>
+
+/*
+ * Bitfield access macros
+ *
+ * FIELD_{GET,PREP} macros take as first parameter shifted mask
+ * from which they extract the base mask and shift amount.
+ * Mask must be a compilation time constant.
+ *
+ * Example:
+ *
+ *  #define REG_FIELD_A  GENMASK(6, 0)
+ *  #define REG_FIELD_B  BIT(7)
+ *  #define REG_FIELD_C  GENMASK(15, 8)
+ *  #define REG_FIELD_D  GENMASK(31, 16)
+ *
+ * Get:
+ *  a = FIELD_GET(REG_FIELD_A, reg);
+ *  b = FIELD_GET(REG_FIELD_B, reg);
+ *
+ * Set:
+ *  reg = FIELD_PREP(REG_FIELD_A, 1) |
+ *	  FIELD_PREP(REG_FIELD_B, 0) |
+ *	  FIELD_PREP(REG_FIELD_C, c) |
+ *	  FIELD_PREP(REG_FIELD_D, 0x40);
+ *
+ * Modify:
+ *  reg &= ~REG_FIELD_C;
+ *  reg |= FIELD_PREP(REG_FIELD_C, c);
+ */
+
+#define __bf_shf(x) (__builtin_ffsll(x) - 1)
+
+#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx)			\
+	({								\
+		BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask),		\
+				 _pfx "mask is not constant");		\
+		BUILD_BUG_ON_MSG(!(_mask), _pfx "mask is zero");	\
+		BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ?		\
+				 ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
+				 _pfx "value too large for the field"); \
+		BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull,		\
+				 _pfx "type of reg too small for mask"); \
+		__BUILD_BUG_ON_NOT_POWER_OF_2((_mask) +			\
+					      (1ULL << __bf_shf(_mask))); \
+	})
+
+/**
+ * FIELD_FIT() - check if value fits in the field
+ * @_mask: shifted mask defining the field's length and position
+ * @_val:  value to test against the field
+ *
+ * Return: true if @_val can fit inside @_mask, false if @_val is too big.
+ */
+#define FIELD_FIT(_mask, _val)						\
+	({								\
+		__BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: ");	\
+		!((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \
+	})
+
+/**
+ * FIELD_PREP() - prepare a bitfield element
+ * @_mask: shifted mask defining the field's length and position
+ * @_val:  value to put in the field
+ *
+ * FIELD_PREP() masks and shifts up the value.  The result should
+ * be combined with other fields of the bitfield using logical OR.
+ */
+#define FIELD_PREP(_mask, _val)						\
+	({								\
+		__BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: ");	\
+		((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask);	\
+	})
+
+/**
+ * FIELD_GET() - extract a bitfield element
+ * @_mask: shifted mask defining the field's length and position
+ * @_reg:  32bit value of entire bitfield
+ *
+ * FIELD_GET() extracts the field specified by @_mask from the
+ * bitfield passed in as @_reg by masking and shifting it down.
+ */
+#define FIELD_GET(_mask, _reg)						\
+	({								\
+		__BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: ");	\
+		(typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask));	\
+	})
+
+#endif

commit 8f1ef3f5361c9bdaf16939e3a5617d3a8865d995
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Tue Sep 26 11:58:29 2017 +0900

    UPSTREAM: dm: define dev_*() log functions in DM header
    
    Many drivers had started to use dev_err, dev_info, etc. for log
    functions.  Currently, we are relying on <linux/compat.h>, but I
    guess the best home is <dm/device.h>, taking into account that
    Linux defines them in <linux/device.h>.
    
    For now, I am leaving the ones in <linux/compat.h> because lots of
    Linux-originated code uses dev_*(), but the first argument is not
    struct udevice, so we need to ignore the bogus argument.  More
    efforts are needed to iron out the issues.
    
    Change-Id: I18f67bd63ac22d8b69bdf8e0558600c58e8703d2
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c898cba41e94fa87c57d71911fb812cd34c7a91e)

diff --git a/include/dm/device.h b/include/dm/device.h
index 4866f7c002..813e49f330 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -18,6 +18,7 @@
 #include <linux/compat.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
+#include <linux/printk.h>
 
 struct driver_info;
 
@@ -879,4 +880,75 @@ static inline void devm_kfree(struct udevice *dev, void *ptr)
 
 #endif /* ! CONFIG_DEVRES */
 
+/*
+ * REVISIT:
+ * remove the following after resolving conflicts with <linux/compat.h>
+ */
+#ifdef dev_dbg
+#undef dev_dbg
+#endif
+#ifdef dev_vdbg
+#undef dev_vdbg
+#endif
+#ifdef dev_info
+#undef dev_info
+#endif
+#ifdef dev_err
+#undef dev_err
+#endif
+#ifdef dev_warn
+#undef dev_warn
+#endif
+
+/*
+ * REVISIT:
+ * print device name like Linux
+ */
+#define dev_printk(dev, fmt, ...)				\
+({								\
+	printk(fmt, ##__VA_ARGS__);				\
+})
+
+#define __dev_printk(level, dev, fmt, ...)			\
+({								\
+	if (level < CONFIG_VAL(LOGLEVEL))			\
+		dev_printk(dev, fmt, ##__VA_ARGS__);		\
+})
+
+#define dev_emerg(dev, fmt, ...) \
+	__dev_printk(0, dev, fmt, ##__VA_ARGS__)
+#define dev_alert(dev, fmt, ...) \
+	__dev_printk(1, dev, fmt, ##__VA_ARGS__)
+#define dev_crit(dev, fmt, ...) \
+	__dev_printk(2, dev, fmt, ##__VA_ARGS__)
+#define dev_err(dev, fmt, ...) \
+	__dev_printk(3, dev, fmt, ##__VA_ARGS__)
+#define dev_warn(dev, fmt, ...) \
+	__dev_printk(4, dev, fmt, ##__VA_ARGS__)
+#define dev_notice(dev, fmt, ...) \
+	__dev_printk(5, dev, fmt, ##__VA_ARGS__)
+#define dev_info(dev, fmt, ...) \
+	__dev_printk(6, dev, fmt, ##__VA_ARGS__)
+
+#ifdef DEBUG
+#define dev_dbg(dev, fmt, ...) \
+	__dev_printk(7, dev, fmt, ##__VA_ARGS__)
+#else
+#define dev_dbg(dev, fmt, ...)					\
+({								\
+	if (0)							\
+		__dev_printk(7, dev, fmt, ##__VA_ARGS__);	\
+})
+#endif
+
+#ifdef VERBOSE_DEBUG
+#define dev_vdbg	dev_dbg
+#else
+#define dev_vdbg(dev, fmt, ...)					\
+({								\
+	if (0)							\
+		__dev_printk(7, dev, fmt, ##__VA_ARGS__);	\
+})
+#endif
+
 #endif
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 1b3f089687..8711fe2b48 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -15,6 +15,23 @@ struct p_current{
 
 extern struct p_current *current;
 
+/* avoid conflict with <dm/device.h> */
+#ifdef dev_dbg
+#undef dev_dbg
+#endif
+#ifdef dev_vdbg
+#undef dev_vdbg
+#endif
+#ifdef dev_info
+#undef dev_info
+#endif
+#ifdef dev_err
+#undef dev_err
+#endif
+#ifdef dev_warn
+#undef dev_warn
+#endif
+
 #define dev_dbg(dev, fmt, args...)		\
 	debug(fmt, ##args)
 #define dev_vdbg(dev, fmt, args...)		\

commit 046a6e2a9a61bff4b9f6a37211dd4965faebf6c9
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:45 2017 +0900

    bug.h: move runtime BUG/WARN macros into <linux/bug.h>
    
    Collect runtime BUG/WARN into a self-contained header <linux/bug.h>
    to make these macros easier to use.
    
    Change-Id: If924684bdab99d2c8fe0b4b3755d0ee5291d11be
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0a70fb4c1c180d6ad6cd4c1dcd3fae8c5d4dd62e)

diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h
index 64db4ecc3c..5cbe377e3c 100644
--- a/drivers/usb/dwc3/linux-compat.h
+++ b/drivers/usb/dwc3/linux-compat.h
@@ -14,7 +14,6 @@
 
 #define WARN(val, format, arg...)	debug(format, ##arg)
 #define dev_WARN(dev, format, arg...)	debug(format, ##arg)
-#define WARN_ON_ONCE(val)		debug("Error %d\n", val)
 
 static inline size_t strlcat(char *dest, const char *src, size_t n)
 {
diff --git a/include/common.h b/include/common.h
index 4349c645bd..c010aff87d 100644
--- a/include/common.h
+++ b/include/common.h
@@ -23,6 +23,7 @@ typedef volatile unsigned char	vu_char;
 #include <time.h>
 #include <asm-offsets.h>
 #include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/printk.h>
@@ -95,14 +96,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 # define static_assert _Static_assert
 #endif
 
-#ifndef BUG
-#define BUG() do { \
-	printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \
-	panic("BUG!"); \
-} while (0)
-#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
-#endif /* BUG */
-
 #ifndef CONFIG_IRQ
 typedef void (interrupt_handler_t)(void *);
 #else
diff --git a/include/linux/bug.h b/include/linux/bug.h
index 133544ca46..f07bb716fc 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -1,6 +1,34 @@
 #ifndef _LINUX_BUG_H
 #define _LINUX_BUG_H
 
+#include <vsprintf.h> /* for panic() */
 #include <linux/build_bug.h>
+#include <linux/compiler.h>
+#include <linux/printk.h>
+
+#define BUG() do { \
+	printk("BUG at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
+	panic("BUG!"); \
+} while (0)
+
+#define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while (0)
+
+#define WARN_ON(condition) ({						\
+	int __ret_warn_on = !!(condition);				\
+	if (unlikely(__ret_warn_on))					\
+		printk("WARNING at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
+	unlikely(__ret_warn_on);					\
+})
+
+#define WARN_ON_ONCE(condition)	({				\
+	static bool __warned;					\
+	int __ret_warn_once = !!(condition);			\
+								\
+	if (unlikely(__ret_warn_once && !__warned)) {		\
+		__warned = true;				\
+		WARN_ON(1);					\
+	}							\
+	unlikely(__ret_warn_once);				\
+})
 
 #endif	/* _LINUX_BUG_H */
diff --git a/include/linux/compat.h b/include/linux/compat.h
index bc027adcb9..1b3f089687 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -87,21 +87,6 @@ static inline void kmem_cache_destroy(struct kmem_cache *cachep)
 
 #define KERNEL_VERSION(a,b,c)	(((a) << 16) + ((b) << 8) + (c))
 
-#ifndef BUG
-#define BUG() do { \
-	printf("U-Boot BUG at %s:%d!\n", __FILE__, __LINE__); \
-} while (0)
-
-#define BUG_ON(condition) do { if (condition) BUG(); } while(0)
-#endif /* BUG */
-
-#define WARN_ON(condition) ({						\
-	int __ret_warn_on = !!(condition);				\
-	if (unlikely(__ret_warn_on))					\
-		printf("WARNING in %s line %d\n", __FILE__, __LINE__);	\
-	unlikely(__ret_warn_on);					\
-})
-
 #define PAGE_SIZE	4096
 
 /* drivers/char/random.c */

commit d9b1ff81445a766d905aa17bdbd6258c5c5ab146
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:44 2017 +0900

    UPSTREAM: bug.h: sync BUILD_BUG stuff with Linux 4.13
    
    As commit 84b8bf6d5d2a ("bug.h: move BUILD_BUG_* defines to
    include/linux/bug.h") noted, include/linux/bug.h was locally
    modified for U-Boot because the name conflict of error() caused
    build errors at that time.
    
    Now error() is gone, so we can fully sync BUILD_BUG* with Linux.
    These macros are just compile-time utilities.  Nothing depends on
    platform code, so it should make sense to simply copy Linux's ones.
    
    Please note Linux split BUILD_BUG stuff out into <linux/build_bug.h>
    by commit bc6245e5efd7.  Let's follow it.
    
    Change-Id: Iea5d4f8a69203f9b7c6cd12bdda5eb5b3f691830
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 059a48096c883e98bc1a4a561abc0069f44cbfea)

diff --git a/include/linux/bug.h b/include/linux/bug.h
index 920e3796c3..133544ca46 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -1,55 +1,6 @@
 #ifndef _LINUX_BUG_H
 #define _LINUX_BUG_H
 
-#include <linux/compiler.h>
-
-#ifdef __CHECKER__
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
-#define BUILD_BUG_ON_ZERO(e) (0)
-#define BUILD_BUG_ON_NULL(e) ((void*)0)
-#define BUILD_BUG_ON_INVALID(e) (0)
-#define BUILD_BUG_ON(condition) (0)
-#define BUILD_BUG() (0)
-#else /* __CHECKER__ */
-
-/* Force a compilation error if a constant expression is not a power of 2 */
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n)			\
-	BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
-
-/* Force a compilation error if condition is true, but also produce a
-   result (of value 0 and type size_t), so the expression can be used
-   e.g. in a structure initializer (or where-ever else comma expressions
-   aren't permitted). */
-#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); }))
-#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); }))
-
-/*
- * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the
- * expression but avoids the generation of any code, even if that expression
- * has side-effects.
- */
-#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))
-
-/**
- * BUILD_BUG_ON - break compile if a condition is true.
- * @condition: the condition which the compiler should know is false.
- *
- * If you have some code which relies on certain constants being equal, or
- * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to
- * detect if someone changes it.
- *
- * The implementation uses gcc's reluctance to create a negative array, but gcc
- * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to
- * inline functions).  Luckily, in 4.3 they added the "error" function
- * attribute just for this type of case.  Thus, we use a negative sized array
- * (should always create an error on gcc versions older than 4.4) and then call
- * an undefined function with the error attribute (should always create an
- * error on gcc 4.3 and later).  If for some reason, neither creates a
- * compile-time error, we'll still have a link-time error, which is harder to
- * track down.
- */
-#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
-
-#endif	/* __CHECKER__ */
+#include <linux/build_bug.h>
 
 #endif	/* _LINUX_BUG_H */
diff --git a/include/linux/build_bug.h b/include/linux/build_bug.h
new file mode 100644
index 0000000000..b7d22d6000
--- /dev/null
+++ b/include/linux/build_bug.h
@@ -0,0 +1,84 @@
+#ifndef _LINUX_BUILD_BUG_H
+#define _LINUX_BUILD_BUG_H
+
+#include <linux/compiler.h>
+
+#ifdef __CHECKER__
+#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
+#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
+#define BUILD_BUG_ON_ZERO(e) (0)
+#define BUILD_BUG_ON_NULL(e) ((void *)0)
+#define BUILD_BUG_ON_INVALID(e) (0)
+#define BUILD_BUG_ON_MSG(cond, msg) (0)
+#define BUILD_BUG_ON(condition) (0)
+#define BUILD_BUG() (0)
+#else /* __CHECKER__ */
+
+/* Force a compilation error if a constant expression is not a power of 2 */
+#define __BUILD_BUG_ON_NOT_POWER_OF_2(n)	\
+	BUILD_BUG_ON(((n) & ((n) - 1)) != 0)
+#define BUILD_BUG_ON_NOT_POWER_OF_2(n)			\
+	BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
+
+/*
+ * Force a compilation error if condition is true, but also produce a
+ * result (of value 0 and type size_t), so the expression can be used
+ * e.g. in a structure initializer (or where-ever else comma expressions
+ * aren't permitted).
+ */
+#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); }))
+#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:(-!!(e)); }))
+
+/*
+ * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the
+ * expression but avoids the generation of any code, even if that expression
+ * has side-effects.
+ */
+#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))
+
+/**
+ * BUILD_BUG_ON_MSG - break compile if a condition is true & emit supplied
+ *		      error message.
+ * @condition: the condition which the compiler should know is false.
+ *
+ * See BUILD_BUG_ON for description.
+ */
+#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
+
+/**
+ * BUILD_BUG_ON - break compile if a condition is true.
+ * @condition: the condition which the compiler should know is false.
+ *
+ * If you have some code which relies on certain constants being equal, or
+ * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to
+ * detect if someone changes it.
+ *
+ * The implementation uses gcc's reluctance to create a negative array, but gcc
+ * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to
+ * inline functions).  Luckily, in 4.3 they added the "error" function
+ * attribute just for this type of case.  Thus, we use a negative sized array
+ * (should always create an error on gcc versions older than 4.4) and then call
+ * an undefined function with the error attribute (should always create an
+ * error on gcc 4.3 and later).  If for some reason, neither creates a
+ * compile-time error, we'll still have a link-time error, which is harder to
+ * track down.
+ */
+#ifndef __OPTIMIZE__
+#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
+#else
+#define BUILD_BUG_ON(condition) \
+	BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
+#endif
+
+/**
+ * BUILD_BUG - break compile if used.
+ *
+ * If you have some code that you expect the compiler to eliminate at
+ * build time, you should use BUILD_BUG to detect if it is
+ * unexpectedly used.
+ */
+#define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed")
+
+#endif	/* __CHECKER__ */
+
+#endif	/* _LINUX_BUILD_BUG_H */
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index 020ad16a04..0ea6c8fcca 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -476,7 +476,8 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s
 # define __compiletime_error_fallback(condition) do { } while (0)
 #endif
 
-#define __compiletime_assert(condition, msg, prefix, suffix)		\
+#ifdef __OPTIMIZE__
+# define __compiletime_assert(condition, msg, prefix, suffix)		\
 	do {								\
 		bool __cond = !(condition);				\
 		extern void prefix ## suffix(void) __compiletime_error(msg); \
@@ -484,6 +485,9 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s
 			prefix ## suffix();				\
 		__compiletime_error_fallback(__cond);			\
 	} while (0)
+#else
+# define __compiletime_assert(condition, msg, prefix, suffix) do { } while (0)
+#endif
 
 #define _compiletime_assert(condition, msg, prefix, suffix) \
 	__compiletime_assert(condition, msg, prefix, suffix)

commit 3edc36741c7468688fa4f13e2f8c22ace27a8e21
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:43 2017 +0900

    UPSTREAM: vsprintf.h: include <linux/types.h>
    
    This header uses ulong, size_t, loff_t.
    Include <linux/types.h> to make this header self-contained.
    
    Change-Id: I810a1ca02d6220826d7c457c7ae6e2d0ecece232
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f7d6b896d641767e04409fc3abf05338b19d9109)

diff --git a/include/vsprintf.h b/include/vsprintf.h
index 490c96ca6d..33d05aa0c6 100644
--- a/include/vsprintf.h
+++ b/include/vsprintf.h
@@ -9,6 +9,7 @@
 #define __VSPRINTF_H
 
 #include <stdarg.h>
+#include <linux/types.h>
 
 ulong simple_strtoul(const char *cp, char **endp, unsigned int base);
 

commit 5b496fa1afac89cef06be4d8e01a972947c8af1c
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:42 2017 +0900

    common.h: remove error()
    
    This macro prevents us from using compiletime_error/assert defined
    in <linux/compiler.h>.
    
    Now we can remove it, then we will be able to import more BUILD_BUG
    macros from Linux.
    
    Change-Id: Ib744c3a718ac71a7d49d14d84cd075695c2c43d8
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5a719f921871d852a83870b12158e00e8715647e)

diff --git a/include/common.h b/include/common.h
index 9719b55c68..4349c645bd 100644
--- a/include/common.h
+++ b/include/common.h
@@ -90,11 +90,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 	({ if (!(x) && _DEBUG) \
 		__assert_fail(#x, __FILE__, __LINE__, __func__); })
 
-#define error(fmt, args...) do {					\
-		printf("ERROR: " pr_fmt(fmt) "\nat %s:%d/%s()\n",	\
-			##args, __FILE__, __LINE__, __func__);		\
-} while (0)
-
 #if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
 # undef static_assert
 # define static_assert _Static_assert

commit 90aa625c9a9e1fb7a2f001fd8e50099bacaf92b8
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:41 2017 +0900

    treewide: replace with error() with pr_err()
    
    U-Boot widely uses error() as a bit noisier variant of printf().
    
    This macro causes name conflict with the following line in
    include/linux/compiler-gcc.h:
    
      # define __compiletime_error(message) __attribute__((error(message)))
    
    This prevents us from using __compiletime_error(), and makes it
    difficult to fully sync BUILD_BUG macros with Linux.  (Notice
    Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
    
    Let's convert error() into now treewide-available pr_err().
    
    Done with the help of Coccinelle, excluing tools/ directory.
    
    The semantic patch I used is as follows:
    
    // <smpl>
    @@@@
    -error
    +pr_err
     (...)
    // </smpl>
    
    Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    [trini: Re-run Coccinelle]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)

diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index 913a44ad64..ae86b69b9c 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -241,7 +241,7 @@ int arch_misc_init(void)
 #if defined(CONFIG_DM_ETH) && defined(CONFIG_USB_ETHER)
 	ret = usb_ether_init();
 	if (ret) {
-		error("USB ether init failed\n");
+		pr_err("USB ether init failed\n");
 		return ret;
 	}
 #endif
diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c
index 0b0bf1837c..f2fafae2a1 100644
--- a/arch/arm/mach-omap2/utils.c
+++ b/arch/arm/mach-omap2/utils.c
@@ -87,13 +87,13 @@ static u32 omap_mmc_get_part_size(const char *part)
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
-		error("invalid mmc device\n");
+		pr_err("invalid mmc device\n");
 		return 0;
 	}
 
 	res = part_get_info_by_name(dev_desc, part, &info);
 	if (res < 0) {
-		error("cannot find partition: '%s'\n", part);
+		pr_err("cannot find partition: '%s'\n", part);
 		return 0;
 	}
 
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index 3d4aadebfe..88c03e85d2 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -28,7 +28,7 @@ int board_late_init(void)
 
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(grf)) {
-		error("grf syscon returned %ld\n", PTR_ERR(grf));
+		pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
 	} else {
 		/* enable noc remap to mimic legacy loaders */
 		rk_clrsetreg(&grf->soc_con0,
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
index cabf344486..72d2c97d36 100644
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-spl.c
@@ -38,13 +38,13 @@ void board_init_f(ulong dummy)
 	/* Set up our preloader console */
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
-		error("%s: pinctrl init failed: %d\n", __func__, ret);
+		pr_err("%s: pinctrl init failed: %d\n", __func__, ret);
 		hang();
 	}
 
 	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
 	if (ret) {
-		error("%s: failed to set up console UART\n", __func__);
+		pr_err("%s: failed to set up console UART\n", __func__);
 		hang();
 	}
 
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 66f1ec21f1..ae16897494 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -174,7 +174,7 @@ void socfpga_emac_manage_reset(ulong emacbase, u32 state)
 		emacmask = ALT_RSTMGR_PER0MODRST_EMAC2_SET_MSK;
 		break;
 	default:
-		error("emac base address unexpected! %lx", emacbase);
+		pr_err("emac base address unexpected! %lx", emacbase);
 		hang();
 		break;
 	}
diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c
index cf6626fb12..dec7d90c5d 100644
--- a/arch/arm/mach-tegra/ivc.c
+++ b/arch/arm/mach-tegra/ivc.c
@@ -493,7 +493,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	       (TEGRA_IVC_ALIGN - 1));
 
 	if ((uint64_t)nframes * (uint64_t)frame_size >= 0x100000000) {
-		error("tegra_ivc: nframes * frame_size overflows\n");
+		pr_err("tegra_ivc: nframes * frame_size overflows\n");
 		return -EINVAL;
 	}
 
@@ -503,12 +503,12 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	 */
 	if ((qbase1 & (TEGRA_IVC_ALIGN - 1)) ||
 	    (qbase2 & (TEGRA_IVC_ALIGN - 1))) {
-		error("tegra_ivc: channel start not aligned\n");
+		pr_err("tegra_ivc: channel start not aligned\n");
 		return -EINVAL;
 	}
 
 	if (frame_size & (TEGRA_IVC_ALIGN - 1)) {
-		error("tegra_ivc: frame size not adequately aligned\n");
+		pr_err("tegra_ivc: frame size not adequately aligned\n");
 		return -EINVAL;
 	}
 
@@ -521,7 +521,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
 	}
 
 	if (ret) {
-		error("tegra_ivc: queue regions overlap\n");
+		pr_err("tegra_ivc: queue regions overlap\n");
 		return ret;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
index d326a6ae57..bfc0ab8f10 100644
--- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
@@ -137,7 +137,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)
 	u32 value;
 
 	if (padctl->enable == 0) {
-		error("unbalanced enable/disable");
+		pr_err("unbalanced enable/disable");
 		return 0;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
index 966cf9f1c4..5224ef641c 100644
--- a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
+++ b/arch/arm/mach-tegra/tegra186/nvtboot_mem.c
@@ -45,12 +45,12 @@ int dram_init(void)
 
 	node = fdt_path_offset(nvtboot_blob, "/memory");
 	if (node < 0) {
-		error("Can't find /memory node in nvtboot DTB");
+		pr_err("Can't find /memory node in nvtboot DTB");
 		hang();
 	}
 	prop = fdt_getprop(nvtboot_blob, node, "reg", &len);
 	if (!prop) {
-		error("Can't find /memory/reg property in nvtboot DTB");
+		pr_err("Can't find /memory/reg property in nvtboot DTB");
 		hang();
 	}
 
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index ec04cf5261..81fb1d840f 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -667,7 +667,7 @@ static int tegra_plle_train(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to become ready");
+		pr_err("timeout waiting for PLLE to become ready");
 		return -ETIMEDOUT;
 	}
 
@@ -697,7 +697,7 @@ int tegra_plle_enable(void)
 	if ((value & PLLE_MISC_PLL_READY) == 0) {
 		err = tegra_plle_train();
 		if (err < 0) {
-			error("failed to train PLLE: %d", err);
+			pr_err("failed to train PLLE: %d", err);
 			return err;
 		}
 	}
@@ -726,7 +726,7 @@ int tegra_plle_enable(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to lock");
+		pr_err("timeout waiting for PLLE to lock");
 		return -ETIMEDOUT;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index bf85e075de..a3e3e378e1 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -125,7 +125,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)
 	u32 value;
 
 	if (padctl->enable == 0) {
-		error("unbalanced enable/disable");
+		pr_err("unbalanced enable/disable");
 		return 0;
 	}
 
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index 4fd8b8a3b1..282f34fb89 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -696,7 +696,7 @@ static int tegra_plle_train(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to become ready");
+		pr_err("timeout waiting for PLLE to become ready");
 		return -ETIMEDOUT;
 	}
 
@@ -726,7 +726,7 @@ int tegra_plle_enable(void)
 	if ((value & PLLE_MISC_PLL_READY) == 0) {
 		err = tegra_plle_train();
 		if (err < 0) {
-			error("failed to train PLLE: %d", err);
+			pr_err("failed to train PLLE: %d", err);
 			return err;
 		}
 	}
@@ -772,7 +772,7 @@ int tegra_plle_enable(void)
 	} while (--timeout);
 
 	if (timeout == 0) {
-		error("timeout waiting for PLLE to lock");
+		pr_err("timeout waiting for PLLE to lock");
 		return -ETIMEDOUT;
 	}
 
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c
index abc18c03a5..c8a468a034 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.c
+++ b/arch/arm/mach-tegra/xusb-padctl-common.c
@@ -84,7 +84,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
 
 	len = ofnode_read_string_count(node, "nvidia,lanes");
 	if (len < 0) {
-		error("failed to parse \"nvidia,lanes\" property");
+		pr_err("failed to parse \"nvidia,lanes\" property");
 		return -EINVAL;
 	}
 
@@ -94,7 +94,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
 		ret = ofnode_read_string_index(node, "nvidia,lanes", i,
 					       &group->pins[i]);
 		if (ret) {
-			error("failed to read string from \"nvidia,lanes\" property");
+			pr_err("failed to read string from \"nvidia,lanes\" property");
 			return -EINVAL;
 		}
 	}
@@ -104,7 +104,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
 	ret = ofnode_read_string_index(node, "nvidia,function", 0,
 				       &group->func);
 	if (ret) {
-		error("failed to parse \"nvidia,func\" property");
+		pr_err("failed to parse \"nvidia,func\" property");
 		return -EINVAL;
 	}
 
@@ -157,14 +157,14 @@ tegra_xusb_padctl_group_apply(struct tegra_xusb_padctl *padctl,
 
 		lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]);
 		if (!lane) {
-			error("no lane for pin %s", group->pins[i]);
+			pr_err("no lane for pin %s", group->pins[i]);
 			continue;
 		}
 
 		func = tegra_xusb_padctl_lane_find_function(padctl, lane,
 							    group->func);
 		if (func < 0) {
-			error("function %s invalid for lane %s: %d",
+			pr_err("function %s invalid for lane %s: %d",
 			      group->func, lane->name, func);
 			continue;
 		}
@@ -206,7 +206,7 @@ tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl,
 
 		err = tegra_xusb_padctl_group_apply(padctl, group);
 		if (err < 0) {
-			error("failed to apply group %s: %d",
+			pr_err("failed to apply group %s: %d",
 			      group->name, err);
 			continue;
 		}
@@ -232,7 +232,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
 
 		err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode);
 		if (err < 0) {
-			error("failed to parse group %s", group->name);
+			pr_err("failed to parse group %s", group->name);
 			return err;
 		}
 
@@ -250,7 +250,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
 
 	err = ofnode_read_resource(node, 0, &padctl->regs);
 	if (err < 0) {
-		error("registers not found");
+		pr_err("registers not found");
 		return err;
 	}
 
@@ -261,7 +261,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
 		err = tegra_xusb_padctl_config_parse_dt(padctl, config,
 							subnode);
 		if (err < 0) {
-			error("failed to parse entry %s: %d",
+			pr_err("failed to parse entry %s: %d",
 			      config->name, err);
 			continue;
 		}
@@ -289,7 +289,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
 
 		err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]);
 		if (err < 0) {
-			error("failed to parse DT: %d", err);
+			pr_err("failed to parse DT: %d", err);
 			continue;
 		}
 
@@ -298,7 +298,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
 
 		err = tegra_xusb_padctl_config_apply(&padctl, &padctl.config);
 		if (err < 0) {
-			error("failed to apply pinmux: %d", err);
+			pr_err("failed to apply pinmux: %d", err);
 			continue;
 		}
 
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
index 5743077431..eae8d785df 100644
--- a/arch/x86/cpu/tangier/sdram.c
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -39,7 +39,7 @@ static int sfi_table_check(struct sfi_table_header *sbh)
 		chksum += *pos++;
 
 	if (chksum)
-		error("sfi: Invalid checksum\n");
+		pr_err("sfi: Invalid checksum\n");
 
 	/* Checksum is OK if zero */
 	return chksum ? -EILSEQ : 0;
@@ -76,7 +76,7 @@ static struct sfi_table_simple *sfi_search_mmap(void)
 	/* Find SYST table */
 	sb = sfi_get_table_by_sig(SFI_BASE_ADDR, SFI_SIG_SYST);
 	if (!sb) {
-		error("sfi: failed to locate SYST table\n");
+		pr_err("sfi: failed to locate SYST table\n");
 		return NULL;
 	}
 
@@ -90,7 +90,7 @@ static struct sfi_table_simple *sfi_search_mmap(void)
 			return (struct sfi_table_simple *)sbh;
 	}
 
-	error("sfi: failed to locate SFI MMAP table\n");
+	pr_err("sfi: failed to locate SFI MMAP table\n");
 	return NULL;
 }
 
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
index bd08a2eed4..c20da29a98 100644
--- a/board/nvidia/jetson-tk1/jetson-tk1.c
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -49,7 +49,7 @@ static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
 
 	err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
 	if (err) {
-		error("failed to update SD control register: %d", err);
+		pr_err("failed to update SD control register: %d", err);
 		return err;
 	}
 
@@ -70,13 +70,13 @@ int tegra_pcie_board_init(void)
 
 	ret = as3722_sd_enable(dev, 4);
 	if (ret < 0) {
-		error("failed to enable SD4: %d\n", ret);
+		pr_err("failed to enable SD4: %d\n", ret);
 		return ret;
 	}
 
 	ret = as3722_sd_set_voltage(dev, 4, 0x24);
 	if (ret < 0) {
-		error("failed to set SD4 voltage: %d\n", ret);
+		pr_err("failed to set SD4 voltage: %d\n", ret);
 		return ret;
 	}
 
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
index ae2a6e6bfa..0d17f30712 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -161,7 +161,7 @@ int board_usb_init(int index, enum usb_init_type init)
 		samsung_get_base_usb3_phy();
 
 	if (!phy) {
-		error("usb3 phy not supported");
+		pr_err("usb3 phy not supported");
 		return -ENODEV;
 	}
 
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 4157349d02..eba25b7b98 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -457,7 +457,7 @@ void draw_logo(void)
 
 	addr = panel_info.logo_addr;
 	if (!addr) {
-		error("There is no logo data.");
+		pr_err("There is no logo data.");
 		return;
 	}
 
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index d0247ac257..debc4c57ff 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -102,7 +102,7 @@ int board_mmc_init(bd_t *bis)
 
 	ret = s5p_mmc_init(0, 4);
 	if (ret)
-		error("MMC: Failed to init MMC:0.\n");
+		pr_err("MMC: Failed to init MMC:0.\n");
 
 	/*
 	 * SD card (T_FLASH) detect and init
@@ -127,7 +127,7 @@ int board_mmc_init(bd_t *bis)
 
 		ret_sd = s5p_mmc_init(2, 4);
 		if (ret_sd)
-			error("MMC: Failed to init SD card (MMC:2).\n");
+			pr_err("MMC: Failed to init SD card (MMC:2).\n");
 	}
 
 	return ret & ret_sd;
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index e40a2f6e3a..0df96c1a3d 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -429,7 +429,7 @@ int exynos_power_init(void)
 	};
 
 	if (regulator_list_autoset(mmc_regulators, NULL, true))
-		error("Unable to init all mmc regulators");
+		pr_err("Unable to init all mmc regulators");
 
 	return 0;
 }
@@ -442,7 +442,7 @@ static int s5pc210_phy_control(int on)
 
 	ret = regulator_get_by_platname("VDD_UOTG_3.0V", &dev);
 	if (ret) {
-		error("Regulator get error: %d", ret);
+		pr_err("Regulator get error: %d", ret);
 		return ret;
 	}
 
@@ -487,25 +487,25 @@ int board_usb_init(int index, enum usb_init_type init)
 
 	ret = regulator_get_by_platname("VCC_P3V3_2.85V", &dev);
 	if (ret) {
-		error("Regulator get error: %d", ret);
+		pr_err("Regulator get error: %d", ret);
 		return ret;
 	}
 
 	ret = regulator_set_enable(dev, true);
 	if (ret) {
-		error("Regulator %s enable setting error: %d", dev->name, ret);
+		pr_err("Regulator %s enable setting error: %d", dev->name, ret);
 		return ret;
 	}
 
 	ret = regulator_set_value(dev, 750000);
 	if (ret) {
-		error("Regulator %s value setting error: %d", dev->name, ret);
+		pr_err("Regulator %s value setting error: %d", dev->name, ret);
 		return ret;
 	}
 
 	ret = regulator_set_value(dev, 3300000);
 	if (ret) {
-		error("Regulator %s value setting error: %d", dev->name, ret);
+		pr_err("Regulator %s value setting error: %d", dev->name, ret);
 		return ret;
 	}
 #endif
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 3e24fa0bd2..ce5ac1e55b 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -27,7 +27,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	if (!strcmp(argv[1], "udp")) {
 #ifndef CONFIG_UDP_FUNCTION_FASTBOOT
-		error("Fastboot UDP not enabled\n");
+		pr_err("Fastboot UDP not enabled\n");
 		return -1;
 #else
 		return do_fastboot_udp(cmdtp, flag, argc, argv);
@@ -38,7 +38,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 		return CMD_RET_USAGE;
 
 #ifndef CONFIG_USB_FUNCTION_FASTBOOT
-	error("Fastboot USB not enabled\n");
+	pr_err("Fastboot USB not enabled\n");
 	return -1;
 #else
 	usb_controller = argv[2];
@@ -46,7 +46,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 
 	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
 	if (ret) {
-		error("USB init failed: %d", ret);
+		pr_err("USB init failed: %d", ret);
 		return CMD_RET_FAILURE;
 	}
 
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index f6213bd30f..b9628b2078 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -1143,7 +1143,7 @@ NXTARG:		;
 				H_MATCH_KEY | H_MATCH_IDENT,
 				&ptr, size, argc, argv);
 		if (len < 0) {
-			error("Cannot export environment: errno = %d\n", errno);
+			pr_err("Cannot export environment: errno = %d\n", errno);
 			return 1;
 		}
 		sprintf(buf, "%zX", (size_t)len);
@@ -1163,7 +1163,7 @@ NXTARG:		;
 			H_MATCH_KEY | H_MATCH_IDENT,
 			&res, ENV_SIZE, argc, argv);
 	if (len < 0) {
-		error("Cannot export environment: errno = %d\n", errno);
+		pr_err("Cannot export environment: errno = %d\n", errno);
 		return 1;
 	}
 
@@ -1298,7 +1298,7 @@ static int do_env_import(cmd_tbl_t *cmdtp, int flag,
 
 	if (himport_r(&env_htab, ptr, size, sep, del ? 0 : H_NOCLEAR,
 			crlf_is_lf, 0, NULL) == 0) {
-		error("Environment import failed: errno = %d\n", errno);
+		pr_err("Environment import failed: errno = %d\n", errno);
 		return 1;
 	}
 	gd->flags |= GD_FLG_ENV_READY;
diff --git a/cmd/regulator.c b/cmd/regulator.c
index 2ef5bc9a82..b605255180 100644
--- a/cmd/regulator.c
+++ b/cmd/regulator.c
@@ -71,7 +71,7 @@ static int curr_dev_and_platdata(struct udevice **devp,
 
 	*uc_pdata = dev_get_uclass_platdata(*devp);
 	if (!*uc_pdata) {
-		error("Regulator: %s - missing platform data!", currdev->name);
+		pr_err("Regulator: %s - missing platform data!", currdev->name);
 		return CMD_RET_FAILURE;
 	}
 
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 1ffbb8fbae..e80194dfef 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -156,21 +156,21 @@ static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	controller_index = (unsigned int)(simple_strtoul(
 				usb_controller,	NULL, 0));
 	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
-		error("Couldn't init USB controller.");
+		pr_err("Couldn't init USB controller.");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_rkusb;
 	}
 
 	rc = fsg_init(g_rkusb->ums, g_rkusb->ums_cnt);
 	if (rc) {
-		error("fsg_init failed");
+		pr_err("fsg_init failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
 
 	rc = g_dnl_register("rkusb_ums_dnl");
 	if (rc) {
-		error("g_dnl_register failed");
+		pr_err("g_dnl_register failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
diff --git a/cmd/thordown.c b/cmd/thordown.c
index 436b7f5631..1bb5fc2ec2 100644
--- a/cmd/thordown.c
+++ b/cmd/thordown.c
@@ -33,7 +33,7 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	int controller_index = simple_strtoul(usb_controller, NULL, 0);
 	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
 	if (ret) {
-		error("USB init failed: %d", ret);
+		pr_err("USB init failed: %d", ret);
 		ret = CMD_RET_FAILURE;
 		goto exit;
 	}
@@ -42,14 +42,14 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	ret = thor_init();
 	if (ret) {
-		error("THOR DOWNLOAD failed: %d", ret);
+		pr_err("THOR DOWNLOAD failed: %d", ret);
 		ret = CMD_RET_FAILURE;
 		goto exit;
 	}
 
 	ret = thor_handle();
 	if (ret) {
-		error("THOR failed: %d", ret);
+		pr_err("THOR failed: %d", ret);
 		ret = CMD_RET_FAILURE;
 		goto exit;
 	}
diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c
index 3306405948..37ad2ff33d 100644
--- a/cmd/tpm_test.c
+++ b/cmd/tpm_test.c
@@ -303,12 +303,12 @@ static int test_readonly(void)
 	index_0 += 1;
 	if (tpm_nv_write_value(INDEX0, (uint8_t *)&index_0, sizeof(index_0) !=
 		TPM_SUCCESS)) {
-		error("\tcould not write index 0\n");
+		pr_err("\tcould not write index 0\n");
 	}
 	tpm_nv_write_value_lock(INDEX0);
 	if (tpm_nv_write_value(INDEX0, (uint8_t *)&index_0, sizeof(index_0)) ==
 			TPM_SUCCESS)
-		error("\tindex 0 is not locked\n");
+		pr_err("\tindex 0 is not locked\n");
 
 	printf("\tdone\n");
 	return 0;
@@ -471,7 +471,7 @@ static int test_write_limit(void)
 		case TPM_MAXNVWRITES:
 			assert(i >= TPM_MAX_NV_WRITES_NOOWNER);
 		default:
-			error("\tunexpected error code %d (0x%x)\n",
+			pr_err("\tunexpected error code %d (0x%x)\n",
 			      result, result);
 		}
 	}
diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c
index b1d8b2858e..ae4d73c125 100644
--- a/cmd/usb_gadget_sdp.c
+++ b/cmd/usb_gadget_sdp.c
@@ -28,13 +28,13 @@ static int do_sdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	ret = sdp_init(controller_index);
 	if (ret) {
-		error("SDP init failed: %d", ret);
+		pr_err("SDP init failed: %d", ret);
 		goto exit;
 	}
 
 	/* This command typically does not return but jumps to an image */
 	sdp_handle(controller_index);
-	error("SDP ended");
+	pr_err("SDP ended");
 
 exit:
 	g_dnl_unregister();
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index 3353f95c74..cfeecb7068 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -162,21 +162,21 @@ static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
 	controller_index = (unsigned int)(simple_strtoul(
 				usb_controller,	NULL, 0));
 	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
-		error("Couldn't init USB controller.");
+		pr_err("Couldn't init USB controller.");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_ums_init;
 	}
 
 	rc = fsg_init(ums, ums_count);
 	if (rc) {
-		error("fsg_init failed");
+		pr_err("fsg_init failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
 
 	rc = g_dnl_register("usb_dnl_ums");
 	if (rc) {
-		error("g_dnl_register failed");
+		pr_err("g_dnl_register failed");
 		rc = CMD_RET_FAILURE;
 		goto cleanup_board;
 	}
diff --git a/common/dfu.c b/common/dfu.c
index 546a1ab9b4..07dff317a6 100644
--- a/common/dfu.c
+++ b/common/dfu.c
@@ -26,13 +26,13 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 
 	ret = board_usb_init(usbctrl_index, USB_INIT_DEVICE);
 	if (ret) {
-		error("board usb init failed\n");
+		pr_err("board usb init failed\n");
 		return CMD_RET_FAILURE;
 	}
 	g_dnl_clear_detach();
 	ret = g_dnl_register(usb_dnl_gadget);
 	if (ret) {
-		error("g_dnl_register failed");
+		pr_err("g_dnl_register failed");
 		return CMD_RET_FAILURE;
 	}
 
@@ -75,7 +75,7 @@ int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
 			ret = dfu_flush(dfu_get_defer_flush(), NULL, 0, 0);
 			dfu_set_defer_flush(NULL);
 			if (ret) {
-				error("Deferred dfu_flush() failed!");
+				pr_err("Deferred dfu_flush() failed!");
 				goto exit;
 			}
 		}
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 0c655ac9fa..0a3c780ae3 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -110,7 +110,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 	blkcnt = lldiv(blkcnt, info->blksz);
 
 	if (blkcnt > info->size) {
-		error("too large for partition: '%s'\n", part_name);
+		pr_err("too large for partition: '%s'\n", part_name);
 		fastboot_fail("too large for partition", response);
 		return;
 	}
@@ -119,7 +119,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 
 	blks = fb_mmc_blk_write(dev_desc, info->start, blkcnt, buffer);
 	if (blks != blkcnt) {
-		error("failed writing to device %d\n", dev_desc->devnum);
+		pr_err("failed writing to device %d\n", dev_desc->devnum);
 		fastboot_fail("failed writing to device", response);
 		return;
 	}
@@ -152,7 +152,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	sector_size = info->blksz;
 	hdr_sectors = DIV_ROUND_UP(sizeof(struct andr_img_hdr), sector_size);
 	if (hdr_sectors == 0) {
-		error("invalid number of boot sectors: 0");
+		pr_err("invalid number of boot sectors: 0");
 		fastboot_fail("invalid number of boot sectors: 0", response);
 		return 0;
 	}
@@ -160,7 +160,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	/* Read the boot image header */
 	res = blk_dread(dev_desc, info->start, hdr_sectors, (void *)hdr);
 	if (res != hdr_sectors) {
-		error("cannot read header from boot partition");
+		pr_err("cannot read header from boot partition");
 		fastboot_fail("cannot read header from boot partition", response);
 		return 0;
 	}
@@ -168,7 +168,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	/* Check boot header magic string */
 	res = android_image_check_header(hdr);
 	if (res != 0) {
-		error("bad boot image magic");
+		pr_err("bad boot image magic");
 		fastboot_fail("boot partition not initialized", response);
 		return 0;
 	}
@@ -207,7 +207,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	/* Get boot partition info */
 	res = part_get_info_by_name(dev_desc, BOOT_PARTITION_NAME, &info);
 	if (res < 0) {
-		error("cannot find boot partition");
+		pr_err("cannot find boot partition");
 		fastboot_fail("cannot find boot partition", response);
 		return -1;
 	}
@@ -219,14 +219,14 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	/* Read boot image header */
 	hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr, response);
 	if (hdr_sectors == 0) {
-		error("unable to read boot image header");
+		pr_err("unable to read boot image header");
 		fastboot_fail("unable to read boot image header", response);
 		return -1;
 	}
 
 	/* Check if boot image has second stage in it (we don't support it) */
 	if (hdr->second_size > 0) {
-		error("moving second stage is not supported yet");
+		pr_err("moving second stage is not supported yet");
 		fastboot_fail("moving second stage is not supported yet", response);
 		return -1;
 	}
@@ -244,7 +244,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dread(dev_desc, ramdisk_sector_start, ramdisk_sectors,
 			ramdisk_buffer);
 	if (res != ramdisk_sectors) {
-		error("cannot read ramdisk from boot partition");
+		pr_err("cannot read ramdisk from boot partition");
 		fastboot_fail("cannot read ramdisk from boot partition", response);
 		return -1;
 	}
@@ -253,7 +253,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	hdr->kernel_size = download_bytes;
 	res = blk_dwrite(dev_desc, info.start, hdr_sectors, (void *)hdr);
 	if (res == 0) {
-		error("cannot writeback boot image header");
+		pr_err("cannot writeback boot image header");
 		fastboot_fail("cannot write back boot image header", response);
 		return -1;
 	}
@@ -265,7 +265,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dwrite(dev_desc, kernel_sector_start, kernel_sectors,
 			 download_buffer);
 	if (res == 0) {
-		error("cannot write new kernel");
+		pr_err("cannot write new kernel");
 		fastboot_fail("cannot write new kernel", response);
 		return -1;
 	}
@@ -277,7 +277,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dwrite(dev_desc, ramdisk_sector_start, ramdisk_sectors,
 			 ramdisk_buffer);
 	if (res == 0) {
-		error("cannot write back original ramdisk");
+		pr_err("cannot write back original ramdisk");
 		fastboot_fail("cannot write back original ramdisk", response);
 		return -1;
 	}
@@ -300,7 +300,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
-		error("invalid mmc device\n");
+		pr_err("invalid mmc device\n");
 		fastboot_fail("invalid mmc device", response);
 		return;
 	}
@@ -362,7 +362,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 #endif
 
 	if (part_get_info_by_name_or_alias(dev_desc, cmd, &info) < 0) {
-		error("cannot find partition: '%s'\n", cmd);
+		pr_err("cannot find partition: '%s'\n", cmd);
 		fastboot_fail("cannot find partition", response);
 		return;
 	}
@@ -400,21 +400,21 @@ void fb_mmc_erase(const char *cmd, char *response)
 	struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV);
 
 	if (mmc == NULL) {
-		error("invalid mmc device");
+		pr_err("invalid mmc device");
 		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
-		error("invalid mmc device");
+		pr_err("invalid mmc device");
 		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	ret = part_get_info_by_name_or_alias(dev_desc, cmd, &info);
 	if (ret < 0) {
-		error("cannot find partition: '%s'", cmd);
+		pr_err("cannot find partition: '%s'", cmd);
 		fastboot_fail("cannot find partition", response);
 		return;
 	}
@@ -433,7 +433,7 @@ void fb_mmc_erase(const char *cmd, char *response)
 
 	blks = fb_mmc_blk_write(dev_desc, blks_start, blks_size, NULL);
 	if (blks != blks_size) {
-		error("failed erasing from device %d", dev_desc->devnum);
+		pr_err("failed erasing from device %d", dev_desc->devnum);
 		fastboot_fail("failed erasing from device", response);
 		return;
 	}
diff --git a/common/fb_nand.c b/common/fb_nand.c
index 49c6023e74..c530623393 100644
--- a/common/fb_nand.c
+++ b/common/fb_nand.c
@@ -41,20 +41,20 @@ static int fb_nand_lookup(const char *partname,
 
 	ret = mtdparts_init();
 	if (ret) {
-		error("Cannot initialize MTD partitions\n");
+		pr_err("Cannot initialize MTD partitions\n");
 		fastboot_fail("cannot init mtdparts", response);
 		return ret;
 	}
 
 	ret = find_dev_and_part(partname, &dev, &pnum, part);
 	if (ret) {
-		error("cannot find partition: '%s'", partname);
+		pr_err("cannot find partition: '%s'", partname);
 		fastboot_fail("cannot find partition", response);
 		return ret;
 	}
 
 	if (dev->id->type != MTD_DEV_TYPE_NAND) {
-		error("partition '%s' is not stored on a NAND device",
+		pr_err("partition '%s' is not stored on a NAND device",
 		      partname);
 		fastboot_fail("not a NAND device", response);
 		return -EINVAL;
@@ -155,7 +155,7 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 
 	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
-		error("invalid NAND device");
+		pr_err("invalid NAND device");
 		fastboot_fail("invalid NAND device", response);
 		return;
 	}
@@ -195,7 +195,7 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 	}
 
 	if (ret) {
-		fastboot_fail("error writing the image", response);
+		fastboot_fail("pr_err writing the image", response);
 		return;
 	}
 
@@ -210,7 +210,7 @@ void fb_nand_erase(const char *cmd, char *response)
 
 	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
-		error("invalid NAND device");
+		pr_err("invalid NAND device");
 		fastboot_fail("invalid NAND device", response);
 		return;
 	}
@@ -221,7 +221,7 @@ void fb_nand_erase(const char *cmd, char *response)
 
 	ret = _fb_nand_erase(mtd, part);
 	if (ret) {
-		error("failed erasing from device %s", mtd->name);
+		pr_err("failed erasing from device %s", mtd->name);
 		fastboot_fail("failed erasing from device", response);
 		return;
 	}
diff --git a/common/spl/spl_dfu.c b/common/spl/spl_dfu.c
index 2c974735b1..05bb21035d 100644
--- a/common/spl/spl_dfu.c
+++ b/common/spl/spl_dfu.c
@@ -42,13 +42,13 @@ int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr)
 	set_default_env(0);
 	str_env = env_get(dfu_alt_info);
 	if (!str_env) {
-		error("\"dfu_alt_info\" env variable not defined!\n");
+		pr_err("\"dfu_alt_info\" env variable not defined!\n");
 		return -EINVAL;
 	}
 
 	ret = env_set("dfu_alt_info", str_env);
 	if (ret) {
-		error("unable to set env variable \"dfu_alt_info\"!\n");
+		pr_err("unable to set env variable \"dfu_alt_info\"!\n");
 		return -EINVAL;
 	}
 
diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c
index 350bcdb056..333d518f4d 100644
--- a/common/spl/spl_sdp.c
+++ b/common/spl/spl_sdp.c
@@ -24,13 +24,13 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image,
 
 	ret = sdp_init(controller_index);
 	if (ret) {
-		error("SDP init failed: %d", ret);
+		pr_err("SDP init failed: %d", ret);
 		return -ENODEV;
 	}
 
 	/* This command typically does not return but jumps to an image */
 	sdp_handle(controller_index);
-	error("SDP ended");
+	pr_err("SDP ended");
 
 	return -EINVAL;
 }
diff --git a/common/update.c b/common/update.c
index 974f4655e7..33bffaa89e 100644
--- a/common/update.c
+++ b/common/update.c
@@ -242,7 +242,7 @@ int update_tftp(ulong addr, char *interface, char *devstring)
 	} else if (interface && devstring) {
 		update_tftp_dfu = true;
 	} else {
-		error("Interface: %s and devstring: %s not supported!\n",
+		pr_err("Interface: %s and devstring: %s not supported!\n",
 		      interface, devstring);
 		return -EINVAL;
 	}
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 58bb3d5627..75d9d4fc50 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -360,7 +360,7 @@ static int set_protective_mbr(struct blk_desc *dev_desc)
 
 	/* Read MBR to backup boot code if it exists */
 	if (blk_dread(dev_desc, 0, 1, p_mbr) != 1) {
-		error("** Can't read from device %d **\n", dev_desc->devnum);
+		pr_err("** Can't read from device %d **\n", dev_desc->devnum);
 		return -1;
 	}
 
@@ -716,7 +716,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 
 	for (i = 0; i < parts; i++) {
 		if (i == gpt_head->num_partition_entries) {
-			error("More partitions than allowed!\n");
+			pr_err("More partitions than allowed!\n");
 			return -1;
 		}
 
@@ -729,7 +729,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 
 		if (strncmp(efi_str, (char *)partitions[i].name,
 			    sizeof(partitions->name))) {
-			error("Partition name: %s does not match %s!\n",
+			pr_err("Partition name: %s does not match %s!\n",
 			      efi_str, (char *)partitions[i].name);
 			return -1;
 		}
@@ -746,7 +746,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 			if ((i == parts - 1) && (partitions[i].size == 0))
 				continue;
 
-			error("Partition %s size: %llu does not match %llu!\n",
+			pr_err("Partition %s size: %llu does not match %llu!\n",
 			      efi_str, (unsigned long long)gpt_part_size,
 			      (unsigned long long)partitions[i].size);
 			return -1;
@@ -767,7 +767,7 @@ int gpt_verify_partitions(struct blk_desc *dev_desc,
 		      (unsigned long long)partitions[i].start);
 
 		if (le64_to_cpu(gpt_e[i].starting_lba) != partitions[i].start) {
-			error("Partition %s start: %llu does not match %llu!\n",
+			pr_err("Partition %s start: %llu does not match %llu!\n",
 			      efi_str, le64_to_cpu(gpt_e[i].starting_lba),
 			      (unsigned long long)partitions[i].start);
 			return -1;
diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
index a5ef722d21..a4c20f4d35 100644
--- a/drivers/adc/adc-uclass.c
+++ b/drivers/adc/adc-uclass.c
@@ -64,7 +64,7 @@ static int adc_supply_enable(struct udevice *dev)
 	}
 
 	if (ret)
-		error("%s: can't enable %s-supply!", dev->name, supply_type);
+		pr_err("%s: can't enable %s-supply!", dev->name, supply_type);
 
 	return ret;
 }
@@ -389,12 +389,12 @@ static int adc_pre_probe(struct udevice *dev)
 	/* Set ADC VDD platdata: polarity, uV, regulator (phandle). */
 	ret = adc_vdd_platdata_set(dev);
 	if (ret)
-		error("%s: Can't update Vdd. Error: %d", dev->name, ret);
+		pr_err("%s: Can't update Vdd. Error: %d", dev->name, ret);
 
 	/* Set ADC VSS platdata: polarity, uV, regulator (phandle). */
 	ret = adc_vss_platdata_set(dev);
 	if (ret)
-		error("%s: Can't update Vss. Error: %d", dev->name, ret);
+		pr_err("%s: Can't update Vss. Error: %d", dev->name, ret);
 
 	return 0;
 }
diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c
index 324d72f3a9..3bb065d215 100644
--- a/drivers/adc/exynos-adc.c
+++ b/drivers/adc/exynos-adc.c
@@ -22,7 +22,7 @@ int exynos_adc_channel_data(struct udevice *dev, int channel,
 	struct exynos_adc_v2 *regs = priv->regs;
 
 	if (channel != priv->active_channel) {
-		error("Requested channel is not active!");
+		pr_err("Requested channel is not active!");
 		return -EINVAL;
 	}
 
@@ -80,7 +80,7 @@ int exynos_adc_probe(struct udevice *dev)
 
 	/* Check HW version */
 	if (readl(&regs->version) != ADC_V2_VERSION) {
-		error("This driver supports only ADC v2!");
+		pr_err("This driver supports only ADC v2!");
 		return -ENXIO;
 	}
 
@@ -109,7 +109,7 @@ int exynos_adc_ofdata_to_platdata(struct udevice *dev)
 
 	priv->regs = (struct exynos_adc_v2 *)devfdt_get_addr(dev);
 	if (priv->regs == (struct exynos_adc_v2 *)FDT_ADDR_T_NONE) {
-		error("Dev: %s - can't get address!", dev->name);
+		pr_err("Dev: %s - can't get address!", dev->name);
 		return -ENODATA;
 	}
 
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
index 0e6271d097..a2856db497 100644
--- a/drivers/adc/rockchip-saradc.c
+++ b/drivers/adc/rockchip-saradc.c
@@ -46,7 +46,7 @@ int rockchip_saradc_channel_data(struct udevice *dev, int channel,
 	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
 
 	if (channel != priv->active_channel) {
-		error("Requested channel is not active!");
+		pr_err("Requested channel is not active!");
 		return -EINVAL;
 	}
 
@@ -69,7 +69,7 @@ int rockchip_saradc_start_channel(struct udevice *dev, int channel)
 	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
 
 	if (channel < 0 || channel >= priv->data->num_channels) {
-		error("Requested channel is invalid!");
+		pr_err("Requested channel is invalid!");
 		return -EINVAL;
 	}
 
@@ -125,7 +125,7 @@ int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
 	data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
 	priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
 	if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
-		error("Dev: %s - can't get address!", dev->name);
+		pr_err("Dev: %s - can't get address!", dev->name);
 		return -ENODATA;
 	}
 
diff --git a/drivers/adc/sandbox.c b/drivers/adc/sandbox.c
index 371892237a..80e8e3701a 100644
--- a/drivers/adc/sandbox.c
+++ b/drivers/adc/sandbox.c
@@ -61,7 +61,7 @@ int sandbox_adc_channel_data(struct udevice *dev, int channel,
 	/* For single-channel conversion mode, check if channel was selected */
 	if ((priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) &&
 	    !(priv->active_channel_mask & (1 << channel))) {
-		error("Request for an inactive channel!");
+		pr_err("Request for an inactive channel!");
 		return -EINVAL;
 	}
 
@@ -82,12 +82,12 @@ int sandbox_adc_channels_data(struct udevice *dev, unsigned int channel_mask,
 
 	/* Return error for single-channel conversion mode */
 	if (priv->conversion_mode == SANDBOX_ADC_MODE_SINGLE_CHANNEL) {
-		error("ADC in single-channel mode!");
+		pr_err("ADC in single-channel mode!");
 		return -EPERM;
 	}
 	/* Check channel selection */
 	if (!(priv->active_channel_mask & channel_mask)) {
-		error("Request for an inactive channel!");
+		pr_err("Request for an inactive channel!");
 		return -EINVAL;
 	}
 	/* The conversion must be started before reading the data */
diff --git a/drivers/ata/dwc_ahci.c b/drivers/ata/dwc_ahci.c
index f6147989b1..b16304baed 100644
--- a/drivers/ata/dwc_ahci.c
+++ b/drivers/ata/dwc_ahci.c
@@ -58,19 +58,19 @@ static int dwc_ahci_probe(struct udevice *dev)
 
 	ret = generic_phy_get_by_name(dev, "sata-phy", &phy);
 	if (ret) {
-		error("can't get the phy from DT\n");
+		pr_err("can't get the phy from DT\n");
 		return ret;
 	}
 
 	ret = generic_phy_init(&phy);
 	if (ret) {
-		error("unable to initialize the sata phy\n");
+		pr_err("unable to initialize the sata phy\n");
 		return ret;
 	}
 
 	ret = generic_phy_power_on(&phy);
 	if (ret) {
-		error("unable to power on the sata phy\n");
+		pr_err("unable to power on the sata phy\n");
 		return ret;
 	}
 
diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
index 78f1b759d8..5c05e3d78d 100644
--- a/drivers/clk/clk_boston.c
+++ b/drivers/clk/clk_boston.c
@@ -67,13 +67,13 @@ static int clk_boston_ofdata_to_platdata(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   "regmap", &syscon);
 	if (err) {
-		error("unable to find syscon device\n");
+		pr_err("unable to find syscon device\n");
 		return err;
 	}
 
 	state->regmap = syscon_get_regmap(syscon);
 	if (!state->regmap) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/clk/clk_stm32f7.c b/drivers/clk/clk_stm32f7.c
index 255a583c95..ad3cafc49f 100644
--- a/drivers/clk/clk_stm32f7.c
+++ b/drivers/clk/clk_stm32f7.c
@@ -224,7 +224,7 @@ static unsigned long stm32_clk_get_rate(struct clk *clk)
 		return sysclk >>= shift;
 		break;
 	default:
-		error("clock index %ld out of range\n", clk->id);
+		pr_err("clock index %ld out of range\n", clk->id);
 		return -EINVAL;
 		break;
 	}
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index b221013a82..1af10891fb 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -302,7 +302,7 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
 		dpll_cfg = &dpll_1600;
 		break;
 	default:
-		error("Unsupported SDRAM frequency!,%ld\n", set_rate);
+		pr_err("Unsupported SDRAM frequency!,%ld\n", set_rate);
 	}
 	rkclk_set_pll(cru, DPLL, dpll_cfg);
 
@@ -360,7 +360,7 @@ static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
@@ -385,7 +385,7 @@ static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index dc25c24520..25550a7429 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -585,7 +585,7 @@ static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
@@ -609,7 +609,7 @@ static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)
 		break;
 
 	default:
-		error("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
+		pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id);
 		return -EINVAL;
 	}
 
@@ -778,7 +778,7 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 		{.refdiv = 1, .fbdiv = 116, .postdiv1 = 3, .postdiv2 = 1};
 		break;
 	default:
-		error("Unsupported SDRAM frequency!,%ld\n", set_rate);
+		pr_err("Unsupported SDRAM frequency!,%ld\n", set_rate);
 	}
 	rkclk_set_pll(&cru->dpll_con[0], &dpll_cfg);
 
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index ff732ac309..2c22b625b8 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -64,14 +64,14 @@ int dfu_init_env_entities(char *interface, char *devstr)
 #endif
 	str_env = env_get("dfu_alt_info");
 	if (!str_env) {
-		error("\"dfu_alt_info\" env variable not defined!\n");
+		pr_err("\"dfu_alt_info\" env variable not defined!\n");
 		return -EINVAL;
 	}
 
 	env_bkp = strdup(str_env);
 	ret = dfu_config_entities(env_bkp, interface, devstr);
 	if (ret) {
-		error("DFU entities configuration failed!\n");
+		pr_err("DFU entities configuration failed!\n");
 		return ret;
 	}
 
@@ -132,7 +132,7 @@ static char *dfu_get_hash_algo(void)
 		return s;
 	}
 
-	error("DFU hash method: %s not supported!\n", s);
+	pr_err("DFU hash method: %s not supported!\n", s);
 	return NULL;
 }
 
@@ -273,7 +273,7 @@ int dfu_write(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)
 
 	/* we should be in buffer now (if not then size too large) */
 	if ((dfu->i_buf + size) > dfu->i_buf_end) {
-		error("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf,
+		pr_err("Buffer overflow! (0x%p + 0x%x > 0x%p)\n", dfu->i_buf,
 		      size, dfu->i_buf_end);
 		dfu_transaction_cleanup(dfu);
 		return -1;
@@ -451,7 +451,7 @@ int dfu_config_entities(char *env, char *interface, char *devstr)
 	if (s) {
 		ret = hash_lookup_algo(s, &dfu_hash_algo);
 		if (ret)
-			error("Hash algorithm %s not supported\n", s);
+			pr_err("Hash algorithm %s not supported\n", s);
 	}
 
 	dfu = calloc(sizeof(*dfu), dfu_alt_num);
@@ -576,7 +576,7 @@ int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size)
 		      dp, left, write);
 		ret = dfu_write(dfu, dp, write, i);
 		if (ret) {
-			error("DFU write failed\n");
+			pr_err("DFU write failed\n");
 			return ret;
 		}
 
@@ -586,7 +586,7 @@ int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size)
 
 	ret = dfu_flush(dfu, NULL, 0, i);
 	if (ret)
-		error("DFU flush failed!");
+		pr_err("DFU flush failed!");
 
 	return ret;
 }
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 39e10b1a5a..47948d369d 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -29,7 +29,7 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
 
 	mmc = find_mmc_device(dfu->data.mmc.dev_num);
 	if (!mmc) {
-		error("Device MMC %d - not found!", dfu->data.mmc.dev_num);
+		pr_err("Device MMC %d - not found!", dfu->data.mmc.dev_num);
 		return -ENODEV;
 	}
 
@@ -69,11 +69,11 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu,
 			       buf);
 		break;
 	default:
-		error("Operation not supported\n");
+		pr_err("Operation not supported\n");
 	}
 
 	if (n != blk_count) {
-		error("MMC operation failed");
+		pr_err("MMC operation failed");
 		if (dfu->data.mmc.hw_partition >= 0)
 			blk_select_hwpart_devnum(IF_TYPE_MMC,
 						 dfu->data.mmc.dev_num,
@@ -312,7 +312,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 	for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) {
 		*parg = strsep(&s, " ");
 		if (*parg == NULL) {
-			error("Invalid number of arguments.\n");
+			pr_err("Invalid number of arguments.\n");
 			return -ENODEV;
 		}
 	}
@@ -327,13 +327,13 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 
 	mmc = find_mmc_device(dfu->data.mmc.dev_num);
 	if (mmc == NULL) {
-		error("Couldn't find MMC device no. %d.\n",
+		pr_err("Couldn't find MMC device no. %d.\n",
 		      dfu->data.mmc.dev_num);
 		return -ENODEV;
 	}
 
 	if (mmc_init(mmc)) {
-		error("Couldn't init MMC device.\n");
+		pr_err("Couldn't init MMC device.\n");
 		return -ENODEV;
 	}
 
@@ -360,7 +360,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 		int mmcpart = third_arg;
 
 		if (part_get_info(blk_dev, mmcpart, &partinfo) != 0) {
-			error("Couldn't find part #%d on mmc device #%d\n",
+			pr_err("Couldn't find part #%d on mmc device #%d\n",
 			      mmcpart, mmcdev);
 			return -ENODEV;
 		}
@@ -374,7 +374,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 	} else if (!strcmp(entity_type, "ext4")) {
 		dfu->layout = DFU_FS_EXT4;
 	} else {
-		error("Memory layout (%s) not supported!\n", entity_type);
+		pr_err("Memory layout (%s) not supported!\n", entity_type);
 		return -ENODEV;
 	}
 
@@ -397,7 +397,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 		dfu_file_buf = memalign(CONFIG_SYS_CACHELINE_SIZE,
 					CONFIG_SYS_DFU_MAX_FILE_SIZE);
 		if (!dfu_file_buf) {
-			error("Could not memalign 0x%x bytes",
+			pr_err("Could not memalign 0x%x bytes",
 			      CONFIG_SYS_DFU_MAX_FILE_SIZE);
 			return -ENOMEM;
 		}
diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c
index 6e3f5316f5..2b5e05a913 100644
--- a/drivers/dfu/dfu_ram.c
+++ b/drivers/dfu/dfu_ram.c
@@ -18,12 +18,12 @@ static int dfu_transfer_medium_ram(enum dfu_op op, struct dfu_entity *dfu,
 				   u64 offset, void *buf, long *len)
 {
 	if (dfu->layout != DFU_RAM_ADDR) {
-		error("unsupported layout: %s\n", dfu_get_layout(dfu->layout));
+		pr_err("unsupported layout: %s\n", dfu_get_layout(dfu->layout));
 		return  -EINVAL;
 	}
 
 	if (offset > dfu->data.ram.size) {
-		error("request exceeds allowed area\n");
+		pr_err("request exceeds allowed area\n");
 		return -EINVAL;
 	}
 
@@ -62,14 +62,14 @@ int dfu_fill_entity_ram(struct dfu_entity *dfu, char *devstr, char *s)
 	for (; parg < argv + sizeof(argv) / sizeof(*argv); ++parg) {
 		*parg = strsep(&s, " ");
 		if (*parg == NULL) {
-			error("Invalid number of arguments.\n");
+			pr_err("Invalid number of arguments.\n");
 			return -ENODEV;
 		}
 	}
 
 	dfu->dev_type = DFU_DEV_RAM;
 	if (strcmp(argv[0], "ram")) {
-		error("unsupported device: %s\n", argv[0]);
+		pr_err("unsupported device: %s\n", argv[0]);
 		return -ENODEV;
 	}
 
diff --git a/drivers/dfu/dfu_tftp.c b/drivers/dfu/dfu_tftp.c
index cd71708231..62bf797dac 100644
--- a/drivers/dfu/dfu_tftp.c
+++ b/drivers/dfu/dfu_tftp.c
@@ -43,7 +43,7 @@ int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len,
 	alt_setting_num = dfu_get_alt(sb);
 	free(sb);
 	if (alt_setting_num < 0) {
-		error("Alt setting [%d] to write not found!",
+		pr_err("Alt setting [%d] to write not found!",
 		      alt_setting_num);
 		ret = -ENODEV;
 		goto done;
@@ -51,7 +51,7 @@ int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len,
 
 	dfu = dfu_get_entity(alt_setting_num);
 	if (!dfu) {
-		error("DFU entity for alt: %d not found!", alt_setting_num);
+		pr_err("DFU entity for alt: %d not found!", alt_setting_num);
 		ret = -ENODEV;
 		goto done;
 	}
diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index ea21fd9c6f..3d0ce22fbc 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -33,7 +33,7 @@ int dma_get_device(u32 transfer_type, struct udevice **devp)
 	}
 
 	if (!dev) {
-		error("No DMA device found that supports %x type\n",
+		pr_err("No DMA device found that supports %x type\n",
 		      transfer_type);
 		return -EPROTONOSUPPORT;
 	}
diff --git a/drivers/dma/lpc32xx_dma.c b/drivers/dma/lpc32xx_dma.c
index 955adfeccd..63a8a2f340 100644
--- a/drivers/dma/lpc32xx_dma.c
+++ b/drivers/dma/lpc32xx_dma.c
@@ -96,7 +96,7 @@ int lpc32xx_dma_start_xfer(unsigned int channel,
 {
 	if (unlikely(((BIT_MASK(channel) & alloc_ch) == 0) ||
 		     (channel >= DMA_NO_OF_CHANNELS))) {
-		error("Request for xfer on unallocated channel %d", channel);
+		pr_err("Request for xfer on unallocated channel %d", channel);
 		return -1;
 	}
 	writel(BIT_MASK(channel), &dma->int_tc_clear);
@@ -117,7 +117,7 @@ int lpc32xx_dma_wait_status(unsigned int channel)
 
 	/* Check if given channel is valid */
 	if (unlikely(channel >= DMA_NO_OF_CHANNELS)) {
-		error("Request for status on unallocated channel %d", channel);
+		pr_err("Request for status on unallocated channel %d", channel);
 		return -1;
 	}
 
@@ -129,7 +129,7 @@ int lpc32xx_dma_wait_status(unsigned int channel)
 			break;
 
 		if (get_timer(start) > CONFIG_SYS_HZ) {
-			error("DMA status timeout channel %d\n", channel);
+			pr_err("DMA status timeout channel %d\n", channel);
 			return -ETIMEDOUT;
 		}
 		udelay(1);
@@ -138,7 +138,7 @@ int lpc32xx_dma_wait_status(unsigned int channel)
 	if (unlikely(readl(&dma->raw_err_stat) & BIT_MASK(channel))) {
 		setbits_le32(&dma->int_err_clear, BIT_MASK(channel));
 		setbits_le32(&dma->raw_err_stat, BIT_MASK(channel));
-		error("DMA error on channel %d\n", channel);
+		pr_err("DMA error on channel %d\n", channel);
 		return -1;
 	}
 	setbits_le32(&dma->int_tc_clear, BIT_MASK(channel));
diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c
index 39e9793013..635eb7876d 100644
--- a/drivers/dma/ti-edma3.c
+++ b/drivers/dma/ti-edma3.c
@@ -491,7 +491,7 @@ static int ti_edma3_transfer(struct udevice *dev, int direction, void *dst,
 		__edma3_transfer(priv->base, 1, dst, src, len);
 		break;
 	default:
-		error("Transfer type not implemented in DMA driver\n");
+		pr_err("Transfer type not implemented in DMA driver\n");
 		break;
 	}
 
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index aeeb304a87..4e8fa21473 100644
--- a/drivers/i2c/i2c-gpio.c
+++ b/drivers/i2c/i2c-gpio.c
@@ -322,7 +322,7 @@ static int i2c_gpio_ofdata_to_platdata(struct udevice *dev)
 
 	return 0;
 error:
-	error("Can't get %s gpios! Error: %d", dev->name, ret);
+	pr_err("Can't get %s gpios! Error: %d", dev->name, ret);
 	return ret;
 }
 
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index c98c6276dd..5d33815146 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -755,7 +755,7 @@ static uint omap24_i2c_setspeed(struct i2c_adapter *adap, uint speed)
 
 	ret = __omap24_i2c_setspeed(i2c_base, speed, &adap->waitdelay);
 	if (ret) {
-		error("%s: set i2c speed failed\n", __func__);
+		pr_err("%s: set i2c speed failed\n", __func__);
 		return ret;
 	}
 
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index bf5fefab7b..196f2365ea 100644
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -549,7 +549,7 @@ static int stm32_i2c_compute_solutions(struct stm32_i2c_setup *setup,
 	}
 
 	if (list_empty(solutions)) {
-		error("%s: no Prescaler solution\n", __func__);
+		pr_err("%s: no Prescaler solution\n", __func__);
 		ret = -EPERM;
 	}
 
@@ -627,7 +627,7 @@ static int stm32_i2c_choose_solution(struct stm32_i2c_setup *setup,
 	}
 
 	if (!s) {
-		error("%s: no solution at all\n", __func__);
+		pr_err("%s: no solution at all\n", __func__);
 		ret = -EPERM;
 	}
 
@@ -643,14 +643,14 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv *i2c_priv,
 	int ret;
 
 	if (setup->speed >= STM32_I2C_SPEED_END) {
-		error("%s: speed out of bound {%d/%d}\n", __func__,
+		pr_err("%s: speed out of bound {%d/%d}\n", __func__,
 		      setup->speed, STM32_I2C_SPEED_END - 1);
 		return -EINVAL;
 	}
 
 	if ((setup->rise_time > i2c_specs[setup->speed].rise_max) ||
 	    (setup->fall_time > i2c_specs[setup->speed].fall_max)) {
-		error("%s :timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
+		pr_err("%s :timings out of bound Rise{%d>%d}/Fall{%d>%d}\n",
 		      __func__,
 		      setup->rise_time, i2c_specs[setup->speed].rise_max,
 		      setup->fall_time, i2c_specs[setup->speed].fall_max);
@@ -658,13 +658,13 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv *i2c_priv,
 	}
 
 	if (setup->dnf > STM32_I2C_DNF_MAX) {
-		error("%s: DNF out of bound %d/%d\n", __func__,
+		pr_err("%s: DNF out of bound %d/%d\n", __func__,
 		      setup->dnf, STM32_I2C_DNF_MAX);
 		return -EINVAL;
 	}
 
 	if (setup->speed_freq > i2c_specs[setup->speed].rate) {
-		error("%s: Freq {%d/%d}\n", __func__,
+		pr_err("%s: Freq {%d/%d}\n", __func__,
 		      setup->speed_freq, i2c_specs[setup->speed].rate);
 		return -EINVAL;
 	}
@@ -711,7 +711,7 @@ static int stm32_i2c_setup_timing(struct stm32_i2c_priv *i2c_priv,
 	setup->clock_src = clk_get_rate(&i2c_priv->clk);
 
 	if (!setup->clock_src) {
-		error("%s: clock rate is 0\n", __func__);
+		pr_err("%s: clock rate is 0\n", __func__);
 		return -EINVAL;
 	}
 
@@ -734,7 +734,7 @@ static int stm32_i2c_setup_timing(struct stm32_i2c_priv *i2c_priv,
 	} while (ret);
 
 	if (ret) {
-		error("%s: impossible to compute I2C timings.\n", __func__);
+		pr_err("%s: impossible to compute I2C timings.\n", __func__);
 		return ret;
 	}
 
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 3255e8ed37..7d23e51b69 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -372,12 +372,12 @@ static int tegra_i2c_probe(struct udevice *dev)
 
 	ret = reset_get_by_name(dev, "i2c", &i2c_bus->reset_ctl);
 	if (ret) {
-		error("reset_get_by_name() failed: %d\n", ret);
+		pr_err("reset_get_by_name() failed: %d\n", ret);
 		return ret;
 	}
 	ret = clk_get_by_name(dev, "div-clk", &i2c_bus->clk);
 	if (ret) {
-		error("clk_get_by_name() failed: %d\n", ret);
+		pr_err("clk_get_by_name() failed: %d\n", ret);
 		return ret;
 	}
 
diff --git a/drivers/misc/tegra186_bpmp.c b/drivers/misc/tegra186_bpmp.c
index d61bacfc44..1fdf8efff3 100644
--- a/drivers/misc/tegra186_bpmp.c
+++ b/drivers/misc/tegra186_bpmp.c
@@ -44,7 +44,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 	ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame);
 	if (ret) {
-		error("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
+		pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
 		return ret;
 	}
 
@@ -55,7 +55,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 	ret = tegra_ivc_write_advance(&priv->ivc);
 	if (ret) {
-		error("tegra_ivc_write_advance() failed: %d\n", ret);
+		pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
 		return ret;
 	}
 
@@ -63,7 +63,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 	for (;;) {
 		ret = tegra_ivc_channel_notified(&priv->ivc);
 		if (ret) {
-			error("tegra_ivc_channel_notified() failed: %d\n", ret);
+			pr_err("tegra_ivc_channel_notified() failed: %d\n", ret);
 			return ret;
 		}
 
@@ -73,7 +73,7 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 		/* Timeout 20ms; roughly 10x current max observed duration */
 		if ((timer_get_us() - start_time) > 20 * 1000) {
-			error("tegra_ivc_read_get_next_frame() timed out (%d)\n",
+			pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n",
 			      ret);
 			return -ETIMEDOUT;
 		}
@@ -86,12 +86,12 @@ static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
 
 	ret = tegra_ivc_read_advance(&priv->ivc);
 	if (ret) {
-		error("tegra_ivc_write_advance() failed: %d\n", ret);
+		pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
 		return ret;
 	}
 
 	if (err) {
-		error("BPMP responded with error %d\n", err);
+		pr_err("BPMP responded with error %d\n", err);
 		/* err isn't a U-Boot error code, so don't that */
 		return -EIO;
 	}
@@ -144,14 +144,14 @@ static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)
 	ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
 					      "shmem", NULL, 0, index, &args);
 	if (ret < 0) {
-		error("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
+		pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
 		return ret;
 	}
 
 	reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node,
 						 "reg", 0, NULL, true);
 	if (reg == FDT_ADDR_T_NONE) {
-		error("fdtdec_get_addr_size_auto_noparent() failed\n");
+		pr_err("fdtdec_get_addr_size_auto_noparent() failed\n");
 		return -ENODEV;
 	}
 
@@ -166,7 +166,7 @@ static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)
 
 	ret = mbox_send(&priv->mbox, NULL);
 	if (ret)
-		error("mbox_send() failed: %d\n", ret);
+		pr_err("mbox_send() failed: %d\n", ret);
 }
 
 static int tegra186_bpmp_probe(struct udevice *dev)
@@ -179,18 +179,18 @@ static int tegra186_bpmp_probe(struct udevice *dev)
 
 	ret = mbox_get_by_index(dev, 0, &priv->mbox);
 	if (ret) {
-		error("mbox_get_by_index() failed: %d\n", ret);
+		pr_err("mbox_get_by_index() failed: %d\n", ret);
 		return ret;
 	}
 
 	tx_base = tegra186_bpmp_get_shmem(dev, 0);
 	if (IS_ERR_VALUE(tx_base)) {
-		error("tegra186_bpmp_get_shmem failed for tx_base\n");
+		pr_err("tegra186_bpmp_get_shmem failed for tx_base\n");
 		return tx_base;
 	}
 	rx_base = tegra186_bpmp_get_shmem(dev, 1);
 	if (IS_ERR_VALUE(rx_base)) {
-		error("tegra186_bpmp_get_shmem failed for rx_base\n");
+		pr_err("tegra186_bpmp_get_shmem failed for rx_base\n");
 		return rx_base;
 	}
 	debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base);
@@ -198,7 +198,7 @@ static int tegra186_bpmp_probe(struct udevice *dev)
 	ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT,
 			     BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify);
 	if (ret) {
-		error("tegra_ivc_init() failed: %d\n", ret);
+		pr_err("tegra_ivc_init() failed: %d\n", ret);
 		return ret;
 	}
 
@@ -211,7 +211,7 @@ static int tegra186_bpmp_probe(struct udevice *dev)
 
 		/* Timeout 100ms */
 		if ((timer_get_us() - start_time) > 100 * 1000) {
-			error("Initial IVC reset timed out (%d)\n", ret);
+			pr_err("Initial IVC reset timed out (%d)\n", ret);
 			ret = -ETIMEDOUT;
 			goto err_free_mbox;
 		}
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 40f7892ac8..5edd383c68 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -155,7 +155,7 @@ static int exynos_dwmci_get_config(const void *blob, int node,
 
 	priv = malloc(sizeof(struct dwmci_exynos_priv_data));
 	if (!priv) {
-		error("dwmci_exynos_priv_data malloc fail!\n");
+		pr_err("dwmci_exynos_priv_data malloc fail!\n");
 		return -ENOMEM;
 	}
 
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index d795198534..44a8ef825f 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -44,7 +44,7 @@ int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width)
 
 	host = calloc(1, sizeof(struct dwmci_host));
 	if (!host) {
-		error("dwmci_host calloc failed!\n");
+		pr_err("dwmci_host calloc failed!\n");
 		return -ENOMEM;
 	}
 
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index b9a3338666..5d8ee35a19 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -147,7 +147,7 @@ static int xenon_mmc_phy_init(struct sdhci_host *host)
 	}
 
 	if (time <= 0) {
-		error("Failed to enable MMC internal clock in time\n");
+		pr_err("Failed to enable MMC internal clock in time\n");
 		return -ETIMEDOUT;
 	}
 
@@ -175,7 +175,7 @@ static int xenon_mmc_phy_init(struct sdhci_host *host)
 	}
 
 	if (time <= 0) {
-		error("Failed to init MMC PHY in time\n");
+		pr_err("Failed to init MMC PHY in time\n");
 		return -ETIMEDOUT;
 	}
 
diff --git a/drivers/mtd/nand/lpc32xx_nand_mlc.c b/drivers/mtd/nand/lpc32xx_nand_mlc.c
index 3af7e6dfac..e1b36706ca 100644
--- a/drivers/mtd/nand/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/lpc32xx_nand_mlc.c
@@ -583,21 +583,21 @@ void board_nand_init(void)
 	/* identify chip */
 	ret = nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_CHIPS, NULL);
 	if (ret) {
-		error("nand_scan_ident returned %i", ret);
+		pr_err("nand_scan_ident returned %i", ret);
 		return;
 	}
 
 	/* finish scanning the chip */
 	ret = nand_scan_tail(mtd);
 	if (ret) {
-		error("nand_scan_tail returned %i", ret);
+		pr_err("nand_scan_tail returned %i", ret);
 		return;
 	}
 
 	/* chip is good, register it */
 	ret = nand_register(0, mtd);
 	if (ret)
-		error("nand_register returned %i", ret);
+		pr_err("nand_register returned %i", ret);
 }
 
 #else /* defined(CONFIG_SPL_BUILD) */
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 0042a7ba11..6ab3c8a25a 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1559,7 +1559,7 @@ static int pxa3xx_nand_probe_dt(struct pxa3xx_nand_info *info)
 
 		pdata->num_cs = fdtdec_get_int(blob, node, "num-cs", 1);
 		if (pdata->num_cs != 1) {
-			error("pxa3xx driver supports single CS only\n");
+			pr_err("pxa3xx driver supports single CS only\n");
 			break;
 		}
 
diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c
index 9ff72fa1ed..a2b594ed73 100644
--- a/drivers/net/bcm-sf2-eth-gmac.c
+++ b/drivers/net/bcm-sf2-eth-gmac.c
@@ -610,7 +610,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg)
 
 	/* Busy wait timeout is 1ms */
 	if (gmac_mii_busywait(1000)) {
-		error("%s: Prepare MII read: MII/MDIO busy\n", __func__);
+		pr_err("%s: Prepare MII read: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -622,7 +622,7 @@ int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg)
 	writel(tmp, GMAC_MII_DATA_ADDR);
 
 	if (gmac_mii_busywait(1000)) {
-		error("%s: MII read failure: MII/MDIO busy\n", __func__);
+		pr_err("%s: MII read failure: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -638,7 +638,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg,
 
 	/* Busy wait timeout is 1ms */
 	if (gmac_mii_busywait(1000)) {
-		error("%s: Prepare MII write: MII/MDIO busy\n", __func__);
+		pr_err("%s: Prepare MII write: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -651,7 +651,7 @@ int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg,
 	writel(tmp, GMAC_MII_DATA_ADDR);
 
 	if (gmac_mii_busywait(1000)) {
-		error("%s: MII write failure: MII/MDIO busy\n", __func__);
+		pr_err("%s: MII write failure: MII/MDIO busy\n", __func__);
 		return -1;
 	}
 
@@ -742,7 +742,7 @@ int gmac_set_speed(int speed, int duplex)
 	} else if (speed == 10) {
 		speed_cfg = 0;
 	} else {
-		error("%s: Invalid GMAC speed(%d)!\n", __func__, speed);
+		pr_err("%s: Invalid GMAC speed(%d)!\n", __func__, speed);
 		return -1;
 	}
 
@@ -820,7 +820,7 @@ int gmac_mac_init(struct eth_device *dev)
 	writel(0, GMAC0_INT_STATUS_ADDR);
 
 	if (dma_init(dma) < 0) {
-		error("%s: GMAC dma_init failed\n", __func__);
+		pr_err("%s: GMAC dma_init failed\n", __func__);
 		goto err_exit;
 	}
 
@@ -855,7 +855,7 @@ int gmac_mac_init(struct eth_device *dev)
 	writel(tmp, GMAC_MII_CTRL_ADDR);
 
 	if (gmac_mii_busywait(1000)) {
-		error("%s: Configure MDIO: MII/MDIO busy\n", __func__);
+		pr_err("%s: Configure MDIO: MII/MDIO busy\n", __func__);
 		goto err_exit;
 	}
 
diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c
index e2747365a2..9056f71b9a 100644
--- a/drivers/net/bcm-sf2-eth.c
+++ b/drivers/net/bcm-sf2-eth.c
@@ -40,7 +40,7 @@ static int bcm_sf2_eth_init(struct eth_device *dev)
 
 	rc = eth->mac_init(dev);
 	if (rc) {
-		error("%s: Couldn't cofigure MAC!\n", __func__);
+		pr_err("%s: Couldn't cofigure MAC!\n", __func__);
 		return rc;
 	}
 
@@ -90,7 +90,7 @@ static int bcm_sf2_eth_send(struct eth_device *dev, void *packet, int length)
 		debug(".");
 		i++;
 		if (i > 20) {
-			error("%s: Tx timeout: retried 20 times\n", __func__);
+			pr_err("%s: Tx timeout: retried 20 times\n", __func__);
 			rc = -1;
 			break;
 		}
@@ -117,7 +117,7 @@ static int bcm_sf2_eth_receive(struct eth_device *dev)
 			debug("\nNO More Rx\n");
 			break;
 		} else if ((rcvlen == 0) || (rcvlen > RX_BUF_SIZE)) {
-			error("%s: Wrong Ethernet packet size (%d B), skip!\n",
+			pr_err("%s: Wrong Ethernet packet size (%d B), skip!\n",
 			      __func__, rcvlen);
 			break;
 		} else {
@@ -166,9 +166,9 @@ static int bcm_sf2_eth_open(struct eth_device *dev, bd_t *bt)
 	 */
 	for (i = 0; i < eth->port_num; i++) {
 		if (phy_startup(eth->port[i])) {
-			error("%s: PHY %d startup failed!\n", __func__, i);
+			pr_err("%s: PHY %d startup failed!\n", __func__, i);
 			if (i == CONFIG_BCM_SF2_ETH_DEFAULT_PORT) {
-				error("%s: No default port %d!\n", __func__, i);
+				pr_err("%s: No default port %d!\n", __func__, i);
 				return -1;
 			}
 		}
@@ -205,13 +205,13 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)
 
 	dev = (struct eth_device *)malloc(sizeof(struct eth_device));
 	if (dev == NULL) {
-		error("%s: Not enough memory!\n", __func__);
+		pr_err("%s: Not enough memory!\n", __func__);
 		return -1;
 	}
 
 	eth = (struct eth_info *)malloc(sizeof(struct eth_info));
 	if (eth == NULL) {
-		error("%s: Not enough memory!\n", __func__);
+		pr_err("%s: Not enough memory!\n", __func__);
 		return -1;
 	}
 
@@ -234,7 +234,7 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)
 	if (gmac_add(dev)) {
 		free(eth);
 		free(dev);
-		error("%s: Adding GMAC failed!\n", __func__);
+		pr_err("%s: Adding GMAC failed!\n", __func__);
 		return -1;
 	}
 #else
@@ -263,7 +263,7 @@ int bcm_sf2_eth_register(bd_t *bis, u8 dev_num)
 
 	rc = bcm_sf2_eth_init(dev);
 	if (rc != 0) {
-		error("%s: configuration failed!\n", __func__);
+		pr_err("%s: configuration failed!\n", __func__);
 		return -1;
 	}
 
diff --git a/drivers/net/cpsw-common.c b/drivers/net/cpsw-common.c
index 8970ee00af..0dc83ab820 100644
--- a/drivers/net/cpsw-common.c
+++ b/drivers/net/cpsw-common.c
@@ -29,14 +29,14 @@ static int davinci_emac_3517_get_macid(struct udevice *dev, u16 offset,
 
 	syscon = fdtdec_lookup_phandle(fdt, node, "syscon");
 	if (syscon < 0) {
-		error("Syscon offset not found\n");
+		pr_err("Syscon offset not found\n");
 		return -ENOENT;
 	}
 
 	addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii),
 				sizeof(u32), MAP_NOCACHE);
 	if (addr == FDT_ADDR_T_NONE) {
-		error("Not able to get syscon address to get mac efuse address\n");
+		pr_err("Not able to get syscon address to get mac efuse address\n");
 		return -ENOENT;
 	}
 
@@ -69,14 +69,14 @@ static int cpsw_am33xx_cm_get_macid(struct udevice *dev, u16 offset, int slave,
 
 	syscon = fdtdec_lookup_phandle(fdt, node, "syscon");
 	if (syscon < 0) {
-		error("Syscon offset not found\n");
+		pr_err("Syscon offset not found\n");
 		return -ENOENT;
 	}
 
 	addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii),
 				sizeof(u32), MAP_NOCACHE);
 	if (addr == FDT_ADDR_T_NONE) {
-		error("Not able to get syscon address to get mac efuse address\n");
+		pr_err("Not able to get syscon address to get mac efuse address\n");
 		return -ENOENT;
 	}
 
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index d7db0fc432..b72258f83b 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -1368,7 +1368,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 
 			mdio_base = cpsw_get_addr_by_node(fdt, subnode);
 			if (mdio_base == FDT_ADDR_T_NONE) {
-				error("Not able to get MDIO address space\n");
+				pr_err("Not able to get MDIO address space\n");
 				return -ENOENT;
 			}
 			priv->data.mdio_base = mdio_base;
@@ -1407,7 +1407,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 								    subnode);
 
 			if (priv->data.gmii_sel == FDT_ADDR_T_NONE) {
-				error("Not able to get gmii_sel reg address\n");
+				pr_err("Not able to get gmii_sel reg address\n");
 				return -ENOENT;
 			}
 
@@ -1418,7 +1418,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 			phy_sel_compat = fdt_getprop(fdt, subnode, "compatible",
 						     NULL);
 			if (!phy_sel_compat) {
-				error("Not able to get gmii_sel compatible\n");
+				pr_err("Not able to get gmii_sel compatible\n");
 				return -ENOENT;
 			}
 		}
@@ -1434,7 +1434,7 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev)
 
 	ret = ti_cm_get_macid(dev, active_slave, pdata->enetaddr);
 	if (ret < 0) {
-		error("cpsw read efuse mac failed\n");
+		pr_err("cpsw read efuse mac failed\n");
 		return ret;
 	}
 
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 5c4315ffea..00076cffbe 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -377,7 +377,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO not idle at entry");
+		pr_err("MDIO not idle at entry");
 		return ret;
 	}
 
@@ -397,7 +397,7 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO read didn't complete");
+		pr_err("MDIO read didn't complete");
 		return ret;
 	}
 
@@ -421,7 +421,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO not idle at entry");
+		pr_err("MDIO not idle at entry");
 		return ret;
 	}
 
@@ -443,7 +443,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 	ret = eqos_mdio_wait_idle(eqos);
 	if (ret) {
-		error("MDIO read didn't complete");
+		pr_err("MDIO read didn't complete");
 		return ret;
 	}
 
@@ -459,37 +459,37 @@ static int eqos_start_clks_tegra186(struct udevice *dev)
 
 	ret = clk_enable(&eqos->clk_slave_bus);
 	if (ret < 0) {
-		error("clk_enable(clk_slave_bus) failed: %d", ret);
+		pr_err("clk_enable(clk_slave_bus) failed: %d", ret);
 		goto err;
 	}
 
 	ret = clk_enable(&eqos->clk_master_bus);
 	if (ret < 0) {
-		error("clk_enable(clk_master_bus) failed: %d", ret);
+		pr_err("clk_enable(clk_master_bus) failed: %d", ret);
 		goto err_disable_clk_slave_bus;
 	}
 
 	ret = clk_enable(&eqos->clk_rx);
 	if (ret < 0) {
-		error("clk_enable(clk_rx) failed: %d", ret);
+		pr_err("clk_enable(clk_rx) failed: %d", ret);
 		goto err_disable_clk_master_bus;
 	}
 
 	ret = clk_enable(&eqos->clk_ptp_ref);
 	if (ret < 0) {
-		error("clk_enable(clk_ptp_ref) failed: %d", ret);
+		pr_err("clk_enable(clk_ptp_ref) failed: %d", ret);
 		goto err_disable_clk_rx;
 	}
 
 	ret = clk_set_rate(&eqos->clk_ptp_ref, 125 * 1000 * 1000);
 	if (ret < 0) {
-		error("clk_set_rate(clk_ptp_ref) failed: %d", ret);
+		pr_err("clk_set_rate(clk_ptp_ref) failed: %d", ret);
 		goto err_disable_clk_ptp_ref;
 	}
 
 	ret = clk_enable(&eqos->clk_tx);
 	if (ret < 0) {
-		error("clk_enable(clk_tx) failed: %d", ret);
+		pr_err("clk_enable(clk_tx) failed: %d", ret);
 		goto err_disable_clk_ptp_ref;
 	}
 
@@ -533,7 +533,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 
 	ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1);
 	if (ret < 0) {
-		error("dm_gpio_set_value(phy_reset, assert) failed: %d", ret);
+		pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d", ret);
 		return ret;
 	}
 
@@ -541,13 +541,13 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 
 	ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0);
 	if (ret < 0) {
-		error("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret);
+		pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret);
 		return ret;
 	}
 
 	ret = reset_assert(&eqos->reset_ctl);
 	if (ret < 0) {
-		error("reset_assert() failed: %d", ret);
+		pr_err("reset_assert() failed: %d", ret);
 		return ret;
 	}
 
@@ -555,7 +555,7 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
 
 	ret = reset_deassert(&eqos->reset_ctl);
 	if (ret < 0) {
-		error("reset_deassert() failed: %d", ret);
+		pr_err("reset_deassert() failed: %d", ret);
 		return ret;
 	}
 
@@ -591,14 +591,14 @@ static int eqos_calibrate_pads_tegra186(struct udevice *dev)
 	ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status,
 			   EQOS_AUTO_CAL_STATUS_ACTIVE, true, 10, false);
 	if (ret) {
-		error("calibrate didn't start");
+		pr_err("calibrate didn't start");
 		goto failed;
 	}
 
 	ret = wait_for_bit(__func__, &eqos->tegra186_regs->auto_cal_status,
 			   EQOS_AUTO_CAL_STATUS_ACTIVE, false, 10, false);
 	if (ret) {
-		error("calibrate didn't finish");
+		pr_err("calibrate didn't finish");
 		goto failed;
 	}
 
@@ -713,13 +713,13 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 		rate = 2.5 * 1000 * 1000;
 		break;
 	default:
-		error("invalid speed %d", eqos->phy->speed);
+		pr_err("invalid speed %d", eqos->phy->speed);
 		return -EINVAL;
 	}
 
 	ret = clk_set_rate(&eqos->clk_tx, rate);
 	if (ret < 0) {
-		error("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret);
+		pr_err("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret);
 		return ret;
 	}
 
@@ -739,7 +739,7 @@ static int eqos_adjust_link(struct udevice *dev)
 	else
 		ret = eqos_set_half_duplex(dev);
 	if (ret < 0) {
-		error("eqos_set_*_duplex() failed: %d", ret);
+		pr_err("eqos_set_*_duplex() failed: %d", ret);
 		return ret;
 	}
 
@@ -757,24 +757,24 @@ static int eqos_adjust_link(struct udevice *dev)
 		ret = eqos_set_mii_speed_10(dev);
 		break;
 	default:
-		error("invalid speed %d", eqos->phy->speed);
+		pr_err("invalid speed %d", eqos->phy->speed);
 		return -EINVAL;
 	}
 	if (ret < 0) {
-		error("eqos_set_*mii_speed*() failed: %d", ret);
+		pr_err("eqos_set_*mii_speed*() failed: %d", ret);
 		return ret;
 	}
 
 	if (en_calibration) {
 		ret = eqos_calibrate_pads_tegra186(dev);
 		if (ret < 0) {
-			error("eqos_calibrate_pads_tegra186() failed: %d", ret);
+			pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret);
 			return ret;
 		}
 	} else {
 		ret = eqos_disable_calibration_tegra186(dev);
 		if (ret < 0) {
-			error("eqos_disable_calibration_tegra186() failed: %d",
+			pr_err("eqos_disable_calibration_tegra186() failed: %d",
 			      ret);
 			return ret;
 		}
@@ -782,7 +782,7 @@ static int eqos_adjust_link(struct udevice *dev)
 
 	ret = eqos_set_tx_clk_speed_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_set_tx_clk_speed_tegra186() failed: %d", ret);
+		pr_err("eqos_set_tx_clk_speed_tegra186() failed: %d", ret);
 		return ret;
 	}
 
@@ -848,13 +848,13 @@ static int eqos_start(struct udevice *dev)
 
 	ret = eqos_start_clks_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_start_clks_tegra186() failed: %d", ret);
+		pr_err("eqos_start_clks_tegra186() failed: %d", ret);
 		goto err;
 	}
 
 	ret = eqos_start_resets_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_start_resets_tegra186() failed: %d", ret);
+		pr_err("eqos_start_resets_tegra186() failed: %d", ret);
 		goto err_stop_clks;
 	}
 
@@ -865,13 +865,13 @@ static int eqos_start(struct udevice *dev)
 	ret = wait_for_bit(__func__, &eqos->dma_regs->mode,
 			   EQOS_DMA_MODE_SWR, false, 10, false);
 	if (ret) {
-		error("EQOS_DMA_MODE_SWR stuck");
+		pr_err("EQOS_DMA_MODE_SWR stuck");
 		goto err_stop_resets;
 	}
 
 	ret = eqos_calibrate_pads_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_calibrate_pads_tegra186() failed: %d", ret);
+		pr_err("eqos_calibrate_pads_tegra186() failed: %d", ret);
 		goto err_stop_resets;
 	}
 
@@ -881,28 +881,28 @@ static int eqos_start(struct udevice *dev)
 
 	eqos->phy = phy_connect(eqos->mii, 0, dev, 0);
 	if (!eqos->phy) {
-		error("phy_connect() failed");
+		pr_err("phy_connect() failed");
 		goto err_stop_resets;
 	}
 	ret = phy_config(eqos->phy);
 	if (ret < 0) {
-		error("phy_config() failed: %d", ret);
+		pr_err("phy_config() failed: %d", ret);
 		goto err_shutdown_phy;
 	}
 	ret = phy_startup(eqos->phy);
 	if (ret < 0) {
-		error("phy_startup() failed: %d", ret);
+		pr_err("phy_startup() failed: %d", ret);
 		goto err_shutdown_phy;
 	}
 
 	if (!eqos->phy->link) {
-		error("No link");
+		pr_err("No link");
 		goto err_shutdown_phy;
 	}
 
 	ret = eqos_adjust_link(dev);
 	if (ret < 0) {
-		error("eqos_adjust_link() failed: %d", ret);
+		pr_err("eqos_adjust_link() failed: %d", ret);
 		goto err_shutdown_phy;
 	}
 
@@ -1119,7 +1119,7 @@ err_stop_resets:
 err_stop_clks:
 	eqos_stop_clks_tegra186(dev);
 err:
-	error("FAILED: %d", ret);
+	pr_err("FAILED: %d", ret);
 	return ret;
 }
 
@@ -1361,7 +1361,7 @@ static int eqos_probe_resources_tegra186(struct udevice *dev)
 
 	ret = reset_get_by_name(dev, "eqos", &eqos->reset_ctl);
 	if (ret) {
-		error("reset_get_by_name(rst) failed: %d", ret);
+		pr_err("reset_get_by_name(rst) failed: %d", ret);
 		return ret;
 	}
 
@@ -1369,38 +1369,38 @@ static int eqos_probe_resources_tegra186(struct udevice *dev)
 				   &eqos->phy_reset_gpio,
 				   GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
 	if (ret) {
-		error("gpio_request_by_name(phy reset) failed: %d", ret);
+		pr_err("gpio_request_by_name(phy reset) failed: %d", ret);
 		goto err_free_reset_eqos;
 	}
 
 	ret = clk_get_by_name(dev, "slave_bus", &eqos->clk_slave_bus);
 	if (ret) {
-		error("clk_get_by_name(slave_bus) failed: %d", ret);
+		pr_err("clk_get_by_name(slave_bus) failed: %d", ret);
 		goto err_free_gpio_phy_reset;
 	}
 
 	ret = clk_get_by_name(dev, "master_bus", &eqos->clk_master_bus);
 	if (ret) {
-		error("clk_get_by_name(master_bus) failed: %d", ret);
+		pr_err("clk_get_by_name(master_bus) failed: %d", ret);
 		goto err_free_clk_slave_bus;
 	}
 
 	ret = clk_get_by_name(dev, "rx", &eqos->clk_rx);
 	if (ret) {
-		error("clk_get_by_name(rx) failed: %d", ret);
+		pr_err("clk_get_by_name(rx) failed: %d", ret);
 		goto err_free_clk_master_bus;
 	}
 
 	ret = clk_get_by_name(dev, "ptp_ref", &eqos->clk_ptp_ref);
 	if (ret) {
-		error("clk_get_by_name(ptp_ref) failed: %d", ret);
+		pr_err("clk_get_by_name(ptp_ref) failed: %d", ret);
 		goto err_free_clk_rx;
 		return ret;
 	}
 
 	ret = clk_get_by_name(dev, "tx", &eqos->clk_tx);
 	if (ret) {
-		error("clk_get_by_name(tx) failed: %d", ret);
+		pr_err("clk_get_by_name(tx) failed: %d", ret);
 		goto err_free_clk_ptp_ref;
 	}
 
@@ -1454,7 +1454,7 @@ static int eqos_probe(struct udevice *dev)
 
 	eqos->regs = devfdt_get_addr(dev);
 	if (eqos->regs == FDT_ADDR_T_NONE) {
-		error("devfdt_get_addr() failed");
+		pr_err("devfdt_get_addr() failed");
 		return -ENODEV;
 	}
 	eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE);
@@ -1464,19 +1464,19 @@ static int eqos_probe(struct udevice *dev)
 
 	ret = eqos_probe_resources_core(dev);
 	if (ret < 0) {
-		error("eqos_probe_resources_core() failed: %d", ret);
+		pr_err("eqos_probe_resources_core() failed: %d", ret);
 		return ret;
 	}
 
 	ret = eqos_probe_resources_tegra186(dev);
 	if (ret < 0) {
-		error("eqos_probe_resources_tegra186() failed: %d", ret);
+		pr_err("eqos_probe_resources_tegra186() failed: %d", ret);
 		goto err_remove_resources_core;
 	}
 
 	eqos->mii = mdio_alloc();
 	if (!eqos->mii) {
-		error("mdio_alloc() failed");
+		pr_err("mdio_alloc() failed");
 		goto err_remove_resources_tegra;
 	}
 	eqos->mii->read = eqos_mdio_read;
@@ -1486,7 +1486,7 @@ static int eqos_probe(struct udevice *dev)
 
 	ret = mdio_register(eqos->mii);
 	if (ret < 0) {
-		error("mdio_register() failed: %d", ret);
+		pr_err("mdio_register() failed: %d", ret);
 		goto err_free_mdio;
 	}
 
diff --git a/drivers/net/ep93xx_eth.c b/drivers/net/ep93xx_eth.c
index a94191b9e6..bc45706243 100644
--- a/drivers/net/ep93xx_eth.c
+++ b/drivers/net/ep93xx_eth.c
@@ -324,7 +324,7 @@ static int ep93xx_eth_rcv_packet(struct eth_device *dev)
 			debug("reporting %d bytes...\n", len);
 		} else {
 			/* Do we have an erroneous packet? */
-			error("packet rx error, status %08X %08X",
+			pr_err("packet rx error, status %08X %08X",
 				priv->rx_sq.current->word1,
 				priv->rx_sq.current->word2);
 			dump_rx_descriptor_queue(dev);
@@ -401,7 +401,7 @@ static int ep93xx_eth_send_packet(struct eth_device *dev,
 		; /* noop */
 
 	if (!TX_STATUS_TXWE(priv->tx_sq.current)) {
-		error("packet tx error, status %08X",
+		pr_err("packet tx error, status %08X",
 			priv->tx_sq.current->word1);
 		dump_tx_descriptor_queue(dev);
 		dump_tx_status_queue(dev);
@@ -452,7 +452,7 @@ int ep93xx_eth_initialize(u8 dev_num, int base_addr)
 
 	priv = malloc(sizeof(*priv));
 	if (!priv) {
-		error("malloc() failed");
+		pr_err("malloc() failed");
 		goto eth_init_failed_0;
 	}
 	memset(priv, 0, sizeof(*priv));
@@ -462,34 +462,34 @@ int ep93xx_eth_initialize(u8 dev_num, int base_addr)
 	priv->tx_dq.base = calloc(NUMTXDESC,
 				sizeof(struct tx_descriptor));
 	if (priv->tx_dq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_1;
 	}
 
 	priv->tx_sq.base = calloc(NUMTXDESC,
 				sizeof(struct tx_status));
 	if (priv->tx_sq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_2;
 	}
 
 	priv->rx_dq.base = calloc(NUMRXDESC,
 				sizeof(struct rx_descriptor));
 	if (priv->rx_dq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_3;
 	}
 
 	priv->rx_sq.base = calloc(NUMRXDESC,
 				sizeof(struct rx_status));
 	if (priv->rx_sq.base == NULL) {
-		error("calloc() failed");
+		pr_err("calloc() failed");
 		goto eth_init_failed_4;
 	}
 
 	dev = malloc(sizeof *dev);
 	if (dev == NULL) {
-		error("malloc() failed");
+		pr_err("malloc() failed");
 		goto eth_init_failed_5;
 	}
 	memset(dev, 0, sizeof *dev);
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 72ef42cca8..21ccab47ae 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -757,7 +757,7 @@ static int ks2_eth_start(struct udevice *dev)
 	qm_init();
 
 	if (ksnav_init(priv->netcp_pktdma, &priv->net_rx_buffs)) {
-		error("ksnav_init failed\n");
+		pr_err("ksnav_init failed\n");
 		goto err_knav_init;
 	}
 
@@ -773,7 +773,7 @@ static int ks2_eth_start(struct udevice *dev)
 
 		phy_startup(priv->phydev);
 		if (priv->phydev->link == 0) {
-			error("phy startup failed\n");
+			pr_err("phy startup failed\n");
 			goto err_phy_start;
 		}
 	}
@@ -923,7 +923,7 @@ static int ks2_eth_probe(struct udevice *dev)
 		 */
 		mdio_bus = mdio_alloc();
 		if (!mdio_bus) {
-			error("MDIO alloc failed\n");
+			pr_err("MDIO alloc failed\n");
 			return -ENOMEM;
 		}
 		priv->mdio_bus = mdio_bus;
@@ -935,7 +935,7 @@ static int ks2_eth_probe(struct udevice *dev)
 
 		ret = mdio_register(mdio_bus);
 		if (ret) {
-			error("MDIO bus register failed\n");
+			pr_err("MDIO bus register failed\n");
 			return ret;
 		}
 	} else {
@@ -1011,7 +1011,7 @@ static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0)
 					slave_name, offset_to_ofnode(slave),
 					&sl_dev);
 			if (ret) {
-				error("ks2_net - not able to bind slave interfaces\n");
+				pr_err("ks2_net - not able to bind slave interfaces\n");
 				return ret;
 			}
 		}
@@ -1031,7 +1031,7 @@ static int ks2_eth_bind_slaves(struct udevice *dev, int gbe, int *gbe_0)
 		ret = device_bind_driver_to_node(dev, "eth_ks2_sl", slave_name,
 					offset_to_ofnode(slave), &sl_dev);
 		if (ret) {
-			error("ks2_net - not able to bind slave interfaces\n");
+			pr_err("ks2_net - not able to bind slave interfaces\n");
 			return ret;
 		}
 	}
@@ -1074,7 +1074,7 @@ static int ks2_eth_parse_slave_interface(int netcp, int slave,
 
 		mdio = fdt_parent_offset(fdt, phy);
 		if (mdio < 0) {
-			error("mdio dt not found\n");
+			pr_err("mdio dt not found\n");
 			return -ENODEV;
 		}
 		priv->mdio_base = (void *)fdtdec_get_addr(fdt, mdio, "reg");
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index cb5cf8b043..c15d84b4c2 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -371,7 +371,7 @@ static int tegra_pcie_port_parse_dt(ofnode node, struct tegra_pcie_port *port)
 
 	addr = ofnode_get_property(node, "assigned-addresses", &len);
 	if (!addr) {
-		error("property \"assigned-addresses\" not found");
+		pr_err("property \"assigned-addresses\" not found");
 		return -FDT_ERR_NOTFOUND;
 	}
 
@@ -462,7 +462,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes)
 
 	err = ofnode_read_u32_default(node, "nvidia,num-lanes", -1);
 	if (err < 0) {
-		error("failed to parse \"nvidia,num-lanes\" property");
+		pr_err("failed to parse \"nvidia,num-lanes\" property");
 		return err;
 	}
 
@@ -470,7 +470,7 @@ static int tegra_pcie_parse_port_info(ofnode node, uint *index, uint *lanes)
 
 	err = ofnode_read_pci_addr(node, 0, "reg", &addr);
 	if (err < 0) {
-		error("failed to parse \"reg\" property");
+		pr_err("failed to parse \"reg\" property");
 		return err;
 	}
 
@@ -493,25 +493,25 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 
 	err = dev_read_resource(dev, 0, &pcie->pads);
 	if (err < 0) {
-		error("resource \"pads\" not found");
+		pr_err("resource \"pads\" not found");
 		return err;
 	}
 
 	err = dev_read_resource(dev, 1, &pcie->afi);
 	if (err < 0) {
-		error("resource \"afi\" not found");
+		pr_err("resource \"afi\" not found");
 		return err;
 	}
 
 	err = dev_read_resource(dev, 2, &pcie->cs);
 	if (err < 0) {
-		error("resource \"cs\" not found");
+		pr_err("resource \"cs\" not found");
 		return err;
 	}
 
 	err = tegra_pcie_board_init();
 	if (err < 0) {
-		error("tegra_pcie_board_init() failed: err=%d", err);
+		pr_err("tegra_pcie_board_init() failed: err=%d", err);
 		return err;
 	}
 
@@ -520,7 +520,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 	if (pcie->phy) {
 		err = tegra_xusb_phy_prepare(pcie->phy);
 		if (err < 0) {
-			error("failed to prepare PHY: %d", err);
+			pr_err("failed to prepare PHY: %d", err);
 			return err;
 		}
 	}
@@ -532,7 +532,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 
 		err = tegra_pcie_parse_port_info(subnode, &index, &num_lanes);
 		if (err < 0) {
-			error("failed to obtain root port info");
+			pr_err("failed to obtain root port info");
 			continue;
 		}
 
@@ -562,7 +562,7 @@ static int tegra_pcie_parse_dt(struct udevice *dev, enum tegra_pci_id id,
 	err = tegra_pcie_get_xbar_config(dev_ofnode(dev), lanes, id,
 					 &pcie->xbar);
 	if (err < 0) {
-		error("invalid lane configuration");
+		pr_err("invalid lane configuration");
 		return err;
 	}
 
@@ -576,31 +576,31 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
 
 	ret = power_domain_on(&pcie->pwrdom);
 	if (ret) {
-		error("power_domain_on() failed: %d\n", ret);
+		pr_err("power_domain_on() failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = clk_enable(&pcie->clk_afi);
 	if (ret) {
-		error("clk_enable(afi) failed: %d\n", ret);
+		pr_err("clk_enable(afi) failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = clk_enable(&pcie->clk_pex);
 	if (ret) {
-		error("clk_enable(pex) failed: %d\n", ret);
+		pr_err("clk_enable(pex) failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = reset_deassert(&pcie->reset_afi);
 	if (ret) {
-		error("reset_deassert(afi) failed: %d\n", ret);
+		pr_err("reset_deassert(afi) failed: %d\n", ret);
 		return ret;
 	}
 
 	ret = reset_deassert(&pcie->reset_pex);
 	if (ret) {
-		error("reset_deassert(pex) failed: %d\n", ret);
+		pr_err("reset_deassert(pex) failed: %d\n", ret);
 		return ret;
 	}
 
@@ -620,14 +620,14 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
 
 	err = tegra_powergate_power_off(TEGRA_POWERGATE_PCIE);
 	if (err < 0) {
-		error("failed to power off PCIe partition: %d", err);
+		pr_err("failed to power off PCIe partition: %d", err);
 		return err;
 	}
 
 	err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE,
 						PERIPH_ID_PCIE);
 	if (err < 0) {
-		error("failed to power up PCIe partition: %d", err);
+		pr_err("failed to power up PCIe partition: %d", err);
 		return err;
 	}
 
@@ -647,7 +647,7 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
 
 	err = tegra_plle_enable();
 	if (err < 0) {
-		error("failed to enable PLLE: %d\n", err);
+		pr_err("failed to enable PLLE: %d\n", err);
 		return err;
 	}
 
@@ -707,7 +707,7 @@ static int tegra_pcie_phy_enable(struct tegra_pcie *pcie)
 	/* wait for the PLL to lock */
 	err = tegra_pcie_pll_wait(pcie, 500);
 	if (err < 0) {
-		error("PLL failed to lock: %d", err);
+		pr_err("PLL failed to lock: %d", err);
 		return err;
 	}
 
@@ -771,7 +771,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
 		err = tegra_pcie_phy_enable(pcie);
 
 	if (err < 0) {
-		error("failed to power on PHY: %d\n", err);
+		pr_err("failed to power on PHY: %d\n", err);
 		return err;
 	}
 #endif
@@ -780,7 +780,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
 #ifdef CONFIG_TEGRA186
 	err = reset_deassert(&pcie->reset_pcie_x);
 	if (err) {
-		error("reset_deassert(pcie_x) failed: %d\n", err);
+		pr_err("reset_deassert(pcie_x) failed: %d\n", err);
 		return err;
 	}
 #else
@@ -1145,25 +1145,25 @@ static int pci_tegra_probe(struct udevice *dev)
 
 	err = tegra_pcie_power_on(pcie);
 	if (err < 0) {
-		error("failed to power on");
+		pr_err("failed to power on");
 		return err;
 	}
 
 	err = tegra_pcie_enable_controller(pcie);
 	if (err < 0) {
-		error("failed to enable controller");
+		pr_err("failed to enable controller");
 		return err;
 	}
 
 	err = tegra_pcie_setup_translations(dev);
 	if (err < 0) {
-		error("failed to decode ranges");
+		pr_err("failed to decode ranges");
 		return err;
 	}
 
 	err = tegra_pcie_enable(pcie);
 	if (err < 0) {
-		error("failed to enable PCIe");
+		pr_err("failed to enable PCIe");
 		return err;
 	}
 
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 08e2e93445..6b8b96a734 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -189,7 +189,7 @@ static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev)
 	err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
 			       0, &reg_res);
 	if (err < 0) {
-		error("\"reg\" resource not found\n");
+		pr_err("\"reg\" resource not found\n");
 		return err;
 	}
 
diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index 3ac405a9be..37187885fa 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -509,7 +509,7 @@ static int comphy_pcie_power_up(u32 lane, u32 pcie_width, bool clk_src,
 				debug("Read from reg = %p - value = 0x%x\n",
 				      hpipe_addr + HPIPE_LANE_STATUS1_REG,
 				      data);
-				error("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
+				pr_err("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
 				ret = 0;
 			}
 		}
@@ -633,7 +633,7 @@ static int comphy_usb3_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      hpipe_addr + HPIPE_LANE_STATUS1_REG, data);
-		error("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
+		pr_err("HPIPE_LANE_STATUS1_PCLK_EN_MASK is 0\n");
 		ret = 0;
 	}
 
@@ -666,14 +666,14 @@ static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base,
 			gd->fdt_blob, sata_node, "marvell,armada-8k-ahci");
 
 	if (sata_node == 0) {
-		error("SATA node not found in FDT\n");
+		pr_err("SATA node not found in FDT\n");
 		return 0;
 	}
 
 	sata_base = (void __iomem *)fdtdec_get_addr_size_auto_noparent(
 		gd->fdt_blob, sata_node, "reg", 0, NULL, true);
 	if (sata_base == NULL) {
-		error("SATA address not found in FDT\n");
+		pr_err("SATA address not found in FDT\n");
 		return 0;
 	}
 
@@ -976,7 +976,7 @@ static int comphy_sata_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      hpipe_addr + HPIPE_LANE_STATUS1_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_TX is %d, SD_EXTERNAL_STATUS0_PLL_RX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_TX is %d, SD_EXTERNAL_STATUS0_PLL_RX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK));
 		ret = 0;
@@ -1099,7 +1099,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 sgmii_speed,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK));
 		ret = 0;
@@ -1117,7 +1117,7 @@ static int comphy_sgmii_power_up(u32 lane, u32 sgmii_speed,
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
+		pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
 		ret = 0;
 	}
 
@@ -1398,7 +1398,7 @@ static int comphy_sfi_power_up(u32 lane, void __iomem *hpipe_base,
 	data = polling_with_timeout(addr, data, mask, 15000);
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n", sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK));
 		ret = 0;
@@ -1418,7 +1418,7 @@ static int comphy_sfi_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
+		pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
 		ret = 0;
 	}
 
@@ -1577,7 +1577,7 @@ static int comphy_rxauii_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
+		pr_err("SD_EXTERNAL_STATUS0_PLL_RX is %d, SD_EXTERNAL_STATUS0_PLL_TX is %d\n",
 		      (data & SD_EXTERNAL_STATUS0_PLL_RX_MASK),
 		      (data & SD_EXTERNAL_STATUS0_PLL_TX_MASK));
 		ret = 0;
@@ -1596,7 +1596,7 @@ static int comphy_rxauii_power_up(u32 lane, void __iomem *hpipe_base,
 	if (data != 0) {
 		debug("Read from reg = %p - value = 0x%x\n",
 		      sd_ip_addr + SD_EXTERNAL_STATUS0_REG, data);
-		error("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
+		pr_err("SD_EXTERNAL_STATUS0_RX_INIT is 0\n");
 		ret = 0;
 	}
 
@@ -1742,7 +1742,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr,
 	mask = data;
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
-		error("Impedance calibration is not done\n");
+		pr_err("Impedance calibration is not done\n");
 		debug("Read from reg = %p - value = 0x%x\n", addr, data);
 		ret = 0;
 	}
@@ -1751,7 +1751,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr,
 	mask = data;
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
-		error("PLL calibration is not done\n");
+		pr_err("PLL calibration is not done\n");
 		debug("Read from reg = %p - value = 0x%x\n", addr, data);
 		ret = 0;
 	}
@@ -1761,7 +1761,7 @@ static int comphy_utmi_power_up(u32 utmi_index, void __iomem *utmi_base_addr,
 	mask = data;
 	data = polling_with_timeout(addr, data, mask, 100);
 	if (data != 0) {
-		error("PLL is not ready\n");
+		pr_err("PLL is not ready\n");
 		debug("Read from reg = %p - value = 0x%x\n", addr, data);
 		ret = 0;
 	}
@@ -1818,7 +1818,7 @@ static void comphy_utmi_phy_init(u32 utmi_phy_count,
 					  cp110_utmi_data[i].usb_cfg_addr,
 					  cp110_utmi_data[i].utmi_cfg_addr,
 					  cp110_utmi_data[i].utmi_phy_port)) {
-			error("Failed to initialize UTMI PHY %d\n", i);
+			pr_err("Failed to initialize UTMI PHY %d\n", i);
 			continue;
 		}
 		printf("UTMI PHY %d initialized to ", i);
@@ -1864,7 +1864,7 @@ void comphy_dedicated_phys_init(void)
 			(void __iomem *)fdtdec_get_addr_size_auto_noparent(
 				gd->fdt_blob, node, "reg", 0, NULL, true);
 		if (cp110_utmi_data[i].utmi_base_addr == NULL) {
-			error("UTMI PHY base address is invalid\n");
+			pr_err("UTMI PHY base address is invalid\n");
 			i++;
 			continue;
 		}
@@ -1874,7 +1874,7 @@ void comphy_dedicated_phys_init(void)
 			(void __iomem *)fdtdec_get_addr_size_auto_noparent(
 				gd->fdt_blob, node, "reg", 1, NULL, true);
 		if (cp110_utmi_data[i].usb_cfg_addr == NULL) {
-			error("UTMI PHY base address is invalid\n");
+			pr_err("UTMI PHY base address is invalid\n");
 			i++;
 			continue;
 		}
@@ -1884,7 +1884,7 @@ void comphy_dedicated_phys_init(void)
 			(void __iomem *)fdtdec_get_addr_size_auto_noparent(
 				gd->fdt_blob, node, "reg", 2, NULL, true);
 		if (cp110_utmi_data[i].utmi_cfg_addr == NULL) {
-			error("UTMI PHY base address is invalid\n");
+			pr_err("UTMI PHY base address is invalid\n");
 			i++;
 			continue;
 		}
@@ -1896,7 +1896,7 @@ void comphy_dedicated_phys_init(void)
 		cp110_utmi_data[i].utmi_phy_port = fdtdec_get_int(
 			gd->fdt_blob, node, "utmi-port", UTMI_PHY_INVALID);
 		if (cp110_utmi_data[i].utmi_phy_port == UTMI_PHY_INVALID) {
-			error("UTMI PHY port type is invalid\n");
+			pr_err("UTMI PHY port type is invalid\n");
 			i++;
 			continue;
 		}
@@ -2049,7 +2049,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
 			 * PHY_TYPE_UNCONNECTED state.
 			 */
 			ptr_comphy_map->type = PHY_TYPE_UNCONNECTED;
-			error("PLL is not locked - Failed to initialize lane %d\n",
+			pr_err("PLL is not locked - Failed to initialize lane %d\n",
 			      lane);
 		}
 	}
diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c
index 680e32f3ea..babf2ffe39 100644
--- a/drivers/phy/ti-pipe3-phy.c
+++ b/drivers/phy/ti-pipe3-phy.c
@@ -261,7 +261,7 @@ static int pipe3_exit(struct phy *phy)
 	} while (--timeout);
 
 	if (!(val & PLL_TICOPWDN) || !(val & PLL_LDOPWDN)) {
-		error("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n",
+		pr_err("%s: Failed to power down DPLL: PLL_STATUS 0x%x\n",
 		      __func__, val);
 		return -EBUSY;
 	}
@@ -284,14 +284,14 @@ static void *get_reg(struct udevice *dev, const char *name)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   name, &syscon);
 	if (err) {
-		error("unable to find syscon device for %s (%d)\n",
+		pr_err("unable to find syscon device for %s (%d)\n",
 		      name, err);
 		return NULL;
 	}
 
 	regmap = syscon_get_regmap(syscon);
 	if (IS_ERR(regmap)) {
-		error("unable to find regmap for %s (%ld)\n",
+		pr_err("unable to find regmap for %s (%ld)\n",
 		      name, PTR_ERR(regmap));
 		return NULL;
 	}
@@ -299,7 +299,7 @@ static void *get_reg(struct udevice *dev, const char *name)
 	cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), name,
 			   &len);
 	if (len < 2*sizeof(fdt32_t)) {
-		error("offset not available for %s\n", name);
+		pr_err("offset not available for %s\n", name);
 		return NULL;
 	}
 
@@ -318,13 +318,13 @@ static int pipe3_phy_probe(struct udevice *dev)
 
 	addr = devfdt_get_addr_size_index(dev, 2, &sz);
 	if (addr == FDT_ADDR_T_NONE) {
-		error("missing pll ctrl address\n");
+		pr_err("missing pll ctrl address\n");
 		return -EINVAL;
 	}
 
 	pipe3->pll_ctrl_base = map_physmem(addr, sz, MAP_NOCACHE);
 	if (!pipe3->pll_ctrl_base) {
-		error("unable to remap pll ctrl\n");
+		pr_err("unable to remap pll ctrl\n");
 		return -EINVAL;
 	}
 
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 27165b0007..2bf853eba1 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -578,7 +578,7 @@ int armada_37xx_pinctrl_probe(struct udevice *dev)
 
 	info->base = (void __iomem *)devfdt_get_addr(dev);
 	if (!info->base) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
index 40341b4eeb..735e412f60 100644
--- a/drivers/pinctrl/pinctrl-sti.c
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -142,7 +142,7 @@ void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
 		break;
 
 	default:
-		error("%s invalid direction value: 0x%x\n",
+		pr_err("%s invalid direction value: 0x%x\n",
 		      __func__, pin_desc->dir);
 		BUG();
 		break;
@@ -237,14 +237,14 @@ static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 						     prop_name, "#gpio-cells",
 						     0, 0, &args);
 		if (ret < 0) {
-			error("Can't get the gpio bank phandle: %d\n", ret);
+			pr_err("Can't get the gpio bank phandle: %d\n", ret);
 			return ret;
 		}
 
 		bank_name = fdt_getprop(blob, args.node, "st,bank-name",
 					&count);
 		if (count < 0) {
-			error("Can't find bank-name property %d\n", count);
+			pr_err("Can't find bank-name property %d\n", count);
 			return -EINVAL;
 		}
 
@@ -254,12 +254,12 @@ static int sti_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 						   prop_name, cells,
 						   ARRAY_SIZE(cells));
 		if (count < 0) {
-			error("Bad pin configuration array %d\n", count);
+			pr_err("Bad pin configuration array %d\n", count);
 			return -EINVAL;
 		}
 
 		if (count > MAX_STI_PINCONF_ENTRIES) {
-			error("Unsupported pinconf array count %d\n", count);
+			pr_err("Unsupported pinconf array count %d\n", count);
 			return -EINVAL;
 		}
 
@@ -284,13 +284,13 @@ static int sti_pinctrl_probe(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   "st,syscfg", &syscon);
 	if (err) {
-		error("unable to find syscon device\n");
+		pr_err("unable to find syscon device\n");
 		return err;
 	}
 
 	plat->regmap = syscon_get_regmap(syscon);
 	if (!plat->regmap) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index fb2593c690..62ba089083 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -160,7 +160,7 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev,
 
 		config_node = fdt_node_offset_by_phandle(fdt, phandle);
 		if (config_node < 0) {
-			error("prop pinctrl-0 index %d invalid phandle\n", i);
+			pr_err("prop pinctrl-0 index %d invalid phandle\n", i);
 			return -EINVAL;
 		}
 
diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c
index 4efe8ee183..3b0427e0b9 100644
--- a/drivers/power/pmic/as3722.c
+++ b/drivers/power/pmic/as3722.c
@@ -46,14 +46,14 @@ static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp)
 
 	ret = pmic_reg_read(dev, AS3722_ASIC_ID1);
 	if (ret < 0) {
-		error("failed to read ID1 register: %d", ret);
+		pr_err("failed to read ID1 register: %d", ret);
 		return ret;
 	}
 	*idp = ret;
 
 	ret = pmic_reg_read(dev, AS3722_ASIC_ID2);
 	if (ret < 0) {
-		error("failed to read ID2 register: %d", ret);
+		pr_err("failed to read ID2 register: %d", ret);
 		return ret;
 	}
 	*revisionp = ret;
@@ -71,7 +71,7 @@ int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value)
 
 	ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value);
 	if (ret < 0) {
-		error("failed to write SD%u voltage register: %d", sd, ret);
+		pr_err("failed to write SD%u voltage register: %d", sd, ret);
 		return ret;
 	}
 
@@ -87,7 +87,7 @@ int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value)
 
 	ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value);
 	if (ret < 0) {
-		error("failed to write LDO%u voltage register: %d", ldo,
+		pr_err("failed to write LDO%u voltage register: %d", ldo,
 		      ret);
 		return ret;
 	}
@@ -102,12 +102,12 @@ static int as3722_probe(struct udevice *dev)
 
 	ret = as3722_read_id(dev, &id, &revision);
 	if (ret < 0) {
-		error("failed to read ID: %d", ret);
+		pr_err("failed to read ID: %d", ret);
 		return ret;
 	}
 
 	if (id != AS3722_DEVICE_ID) {
-		error("unknown device");
+		pr_err("unknown device");
 		return -ENOENT;
 	}
 
diff --git a/drivers/power/pmic/as3722_gpio.c b/drivers/power/pmic/as3722_gpio.c
index d0b681ca4a..5cf4cb6b51 100644
--- a/drivers/power/pmic/as3722_gpio.c
+++ b/drivers/power/pmic/as3722_gpio.c
@@ -26,7 +26,7 @@ int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
 
 	err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
 	if (err) {
-		error("failed to configure GPIO#%u: %d", gpio, err);
+		pr_err("failed to configure GPIO#%u: %d", gpio, err);
 		return err;
 	}
 
@@ -46,7 +46,7 @@ static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio,
 
 	err = pmic_reg_read(pmic, AS3722_GPIO_SIGNAL_OUT);
 	if (err < 0) {
-		error("failed to read GPIO signal out register: %d", err);
+		pr_err("failed to read GPIO signal out register: %d", err);
 		return err;
 	}
 	value = err;
@@ -61,7 +61,7 @@ static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio,
 
 	err = pmic_reg_write(pmic, AS3722_GPIO_SIGNAL_OUT, value);
 	if (err) {
-		error("failed to set GPIO#%u %s: %d", gpio, l, err);
+		pr_err("failed to set GPIO#%u %s: %d", gpio, l, err);
 		return err;
 	}
 
@@ -84,13 +84,13 @@ int as3722_gpio_direction_output(struct udevice *dev, unsigned int gpio,
 
 	err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
 	if (err) {
-		error("failed to configure GPIO#%u as output: %d", gpio, err);
+		pr_err("failed to configure GPIO#%u as output: %d", gpio, err);
 		return err;
 	}
 
 	err = as3722_gpio_set_value(pmic, gpio, value);
 	if (err < 0) {
-		error("failed to set GPIO#%u high: %d", gpio, err);
+		pr_err("failed to set GPIO#%u high: %d", gpio, err);
 		return err;
 	}
 
diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c
index 2d35d09d45..38a2a04f17 100644
--- a/drivers/power/pmic/i2c_pmic_emul.c
+++ b/drivers/power/pmic/i2c_pmic_emul.c
@@ -31,7 +31,7 @@ static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip,
 	struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul);
 
 	if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) {
-		error("Request exceeds PMIC register range! Max register: %#x",
+		pr_err("Request exceeds PMIC register range! Max register: %#x",
 		      SANDBOX_PMIC_REG_COUNT);
 		return -EFAULT;
 	}
@@ -68,7 +68,7 @@ static int sandbox_i2c_pmic_write_data(struct udevice *emul, uchar chip,
 	len--;
 
 	if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) {
-		error("Request exceeds PMIC register range! Max register: %#x",
+		pr_err("Request exceeds PMIC register range! Max register: %#x",
 		      SANDBOX_PMIC_REG_COUNT);
 	}
 
@@ -111,7 +111,7 @@ static int sandbox_i2c_pmic_ofdata_to_platdata(struct udevice *emul)
 					     SANDBOX_PMIC_REG_COUNT);
 
 	if (!reg_defaults) {
-		error("Property \"reg-defaults\" not found for device: %s!",
+		pr_err("Property \"reg-defaults\" not found for device: %s!",
 		      emul->name);
 		return -EINVAL;
 	}
diff --git a/drivers/power/pmic/lp873x.c b/drivers/power/pmic/lp873x.c
index f505468313..95c2b7e8c7 100644
--- a/drivers/power/pmic/lp873x.c
+++ b/drivers/power/pmic/lp873x.c
@@ -27,7 +27,7 @@ static int lp873x_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -37,7 +37,7 @@ static int lp873x_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int lp873x_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/lp87565.c b/drivers/power/pmic/lp87565.c
index 782a46c4cc..506769e362 100644
--- a/drivers/power/pmic/lp87565.c
+++ b/drivers/power/pmic/lp87565.c
@@ -29,7 +29,7 @@ static int lp87565_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -40,7 +40,7 @@ static int lp87565_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/max77686.c b/drivers/power/pmic/max77686.c
index ceca9f96a7..b3ed84992f 100644
--- a/drivers/power/pmic/max77686.c
+++ b/drivers/power/pmic/max77686.c
@@ -31,7 +31,7 @@ static int max77686_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -41,7 +41,7 @@ static int max77686_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int max77686_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/max8997.c b/drivers/power/pmic/max8997.c
index f749d7debf..5ebeb8a316 100644
--- a/drivers/power/pmic/max8997.c
+++ b/drivers/power/pmic/max8997.c
@@ -26,7 +26,7 @@ static int max8997_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -37,7 +37,7 @@ static int max8997_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/max8998.c b/drivers/power/pmic/max8998.c
index 7c4773c7b3..a7e04699e8 100644
--- a/drivers/power/pmic/max8998.c
+++ b/drivers/power/pmic/max8998.c
@@ -26,7 +26,7 @@ static int max8998_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -37,7 +37,7 @@ static int max8998_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c
index 804c0d13a0..1e1ecb382e 100644
--- a/drivers/power/pmic/palmas.c
+++ b/drivers/power/pmic/palmas.c
@@ -27,7 +27,7 @@ static int palmas_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -37,7 +37,7 @@ static int palmas_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int palmas_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c
index 5f361c7696..a06cbc07d4 100644
--- a/drivers/power/pmic/pfuze100.c
+++ b/drivers/power/pmic/pfuze100.c
@@ -33,7 +33,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -43,7 +43,7 @@ static int pfuze100_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int pfuze100_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c
index 9d83059c40..522105e5ff 100644
--- a/drivers/power/pmic/s2mps11.c
+++ b/drivers/power/pmic/s2mps11.c
@@ -27,7 +27,7 @@ static int s2mps11_write(struct udevice *dev, uint reg, const uint8_t *buff,
 
 	ret = dm_i2c_write(dev, reg, buff, len);
 	if (ret)
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
@@ -38,7 +38,7 @@ static int s2mps11_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret)
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 
 	return ret;
 }
diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c
index f8ae5ea2db..3812e240ab 100644
--- a/drivers/power/pmic/s5m8767.c
+++ b/drivers/power/pmic/s5m8767.c
@@ -30,7 +30,7 @@ static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -40,7 +40,7 @@ static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff,
 static int s5m8767_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
diff --git a/drivers/power/pmic/sandbox.c b/drivers/power/pmic/sandbox.c
index 6763303c66..e8d6faca16 100644
--- a/drivers/power/pmic/sandbox.c
+++ b/drivers/power/pmic/sandbox.c
@@ -31,7 +31,7 @@ static int sandbox_pmic_write(struct udevice *dev, uint reg,
 			      const uint8_t *buff, int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -42,7 +42,7 @@ static int sandbox_pmic_read(struct udevice *dev, uint reg,
 			     uint8_t *buff, int len)
 {
 	if (dm_i2c_read(dev, reg, buff, len)) {
-		error("read error from device: %p register: %#x!", dev, reg);
+		pr_err("read error from device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -52,7 +52,7 @@ static int sandbox_pmic_read(struct udevice *dev, uint reg,
 static int sandbox_pmic_bind(struct udevice *dev)
 {
 	if (!pmic_bind_children(dev, dev_ofnode(dev), pmic_children_info))
-		error("%s:%d PMIC: %s - no child found!", __func__, __LINE__,
+		pr_err("%s:%d PMIC: %s - no child found!", __func__, __LINE__,
 							  dev->name);
 
 	/* Always return success for this device - allows for PMIC I/O */
diff --git a/drivers/power/pmic/tps65090.c b/drivers/power/pmic/tps65090.c
index 4565e3b54c..ee5358bced 100644
--- a/drivers/power/pmic/tps65090.c
+++ b/drivers/power/pmic/tps65090.c
@@ -29,7 +29,7 @@ static int tps65090_write(struct udevice *dev, uint reg, const uint8_t *buff,
 			  int len)
 {
 	if (dm_i2c_write(dev, reg, buff, len)) {
-		error("write error to device: %p register: %#x!", dev, reg);
+		pr_err("write error to device: %p register: %#x!", dev, reg);
 		return -EIO;
 	}
 
@@ -42,7 +42,7 @@ static int tps65090_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 
 	ret = dm_i2c_read(dev, reg, buff, len);
 	if (ret) {
-		error("read error %d from device: %p register: %#x!", ret, dev,
+		pr_err("read error %d from device: %p register: %#x!", ret, dev,
 		      reg);
 		return -EIO;
 	}
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index 35c292222b..97b4a98bf0 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -117,7 +117,7 @@ static int fixed_regulator_set_enable(struct udevice *dev, bool enable)
 
 	ret = dm_gpio_set_value(&dev_pdata->gpio, enable);
 	if (ret) {
-		error("Can't set regulator : %s gpio to: %d\n", dev->name,
+		pr_err("Can't set regulator : %s gpio to: %d\n", dev->name,
 		      enable);
 		return ret;
 	}
diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index 42391c69b4..1031a0362b 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -109,7 +109,7 @@ static int gpio_regulator_set_value(struct udevice *dev, int uV)
 
 	ret = dm_gpio_set_value(&dev_pdata->gpio, enable);
 	if (ret) {
-		error("Can't set regulator : %s gpio to: %d\n", dev->name,
+		pr_err("Can't set regulator : %s gpio to: %d\n", dev->name,
 		      enable);
 		return ret;
 	}
diff --git a/drivers/power/regulator/max77686.c b/drivers/power/regulator/max77686.c
index 8780806cff..2212d36ed6 100644
--- a/drivers/power/regulator/max77686.c
+++ b/drivers/power/regulator/max77686.c
@@ -98,7 +98,7 @@ static int max77686_buck_volt2hex(int buck, int uV)
 	if (hex >= 0 && hex <= hex_max)
 		return hex;
 
-	error("Value: %d uV is wrong for BUCK%d", uV, buck);
+	pr_err("Value: %d uV is wrong for BUCK%d", uV, buck);
 	return -EINVAL;
 }
 
@@ -134,7 +134,7 @@ static int max77686_buck_hex2volt(int buck, int hex)
 	return uV;
 
 bad_hex:
-	error("Value: %#x is wrong for BUCK%d", hex, buck);
+	pr_err("Value: %#x is wrong for BUCK%d", hex, buck);
 	return -EINVAL;
 }
 
@@ -160,7 +160,7 @@ static int max77686_ldo_volt2hex(int ldo, int uV)
 	if (hex >= 0 && hex <= MAX77686_LDO_VOLT_MAX_HEX)
 		return hex;
 
-	error("Value: %d uV is wrong for LDO%d", uV, ldo);
+	pr_err("Value: %d uV is wrong for LDO%d", uV, ldo);
 	return -EINVAL;
 }
 
@@ -189,7 +189,7 @@ static int max77686_ldo_hex2volt(int ldo, int hex)
 	return uV;
 
 bad_hex:
-	error("Value: %#x is wrong for ldo%d", hex, ldo);
+	pr_err("Value: %#x is wrong for ldo%d", hex, ldo);
 	return -EINVAL;
 }
 
@@ -328,7 +328,7 @@ static int max77686_ldo_val(struct udevice *dev, int op, int *uV)
 
 	ldo = dev->driver_data;
 	if (ldo < 1 || ldo > MAX77686_LDO_NUM) {
-		error("Wrong ldo number: %d", ldo);
+		pr_err("Wrong ldo number: %d", ldo);
 		return -EINVAL;
 	}
 
@@ -366,7 +366,7 @@ static int max77686_buck_val(struct udevice *dev, int op, int *uV)
 
 	buck = dev->driver_data;
 	if (buck < 1 || buck > MAX77686_BUCK_NUM) {
-		error("Wrong buck number: %d", buck);
+		pr_err("Wrong buck number: %d", buck);
 		return -EINVAL;
 	}
 
@@ -423,7 +423,7 @@ static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode)
 
 	ldo = dev->driver_data;
 	if (ldo < 1 || ldo > MAX77686_LDO_NUM) {
-		error("Wrong ldo number: %d", ldo);
+		pr_err("Wrong ldo number: %d", ldo);
 		return -EINVAL;
 	}
 
@@ -493,7 +493,7 @@ static int max77686_ldo_mode(struct udevice *dev, int op, int *opmode)
 	}
 
 	if (mode == 0xff) {
-		error("Wrong mode: %d for ldo%d", *opmode, ldo);
+		pr_err("Wrong mode: %d for ldo%d", *opmode, ldo);
 		return -EINVAL;
 	}
 
@@ -545,7 +545,7 @@ static int max77686_buck_mode(struct udevice *dev, int op, int *opmode)
 
 	buck = dev->driver_data;
 	if (buck < 1 || buck > MAX77686_BUCK_NUM) {
-		error("Wrong buck number: %d", buck);
+		pr_err("Wrong buck number: %d", buck);
 		return -EINVAL;
 	}
 
@@ -614,7 +614,7 @@ static int max77686_buck_mode(struct udevice *dev, int op, int *opmode)
 	}
 
 	if (mode == 0xff) {
-		error("Wrong mode: %d for buck: %d\n", *opmode, buck);
+		pr_err("Wrong mode: %d for buck: %d\n", *opmode, buck);
 		return -EINVAL;
 	}
 
diff --git a/drivers/power/regulator/sandbox.c b/drivers/power/regulator/sandbox.c
index 06c09fd051..f980a17389 100644
--- a/drivers/power/regulator/sandbox.c
+++ b/drivers/power/regulator/sandbox.c
@@ -87,7 +87,7 @@ int out_get_value(struct udevice *dev, int output_count, int reg_type,
 	int ret;
 
 	if (dev->driver_data > output_count) {
-		error("Unknown regulator number: %lu for PMIC %s!",
+		pr_err("Unknown regulator number: %lu for PMIC %s!",
 		      dev->driver_data, dev->name);
 		return -EINVAL;
 	}
@@ -95,7 +95,7 @@ int out_get_value(struct udevice *dev, int output_count, int reg_type,
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type;
 	ret = pmic_read(dev->parent, reg, &reg_val, 1);
 	if (ret) {
-		error("PMIC read failed: %d\n",  ret);
+		pr_err("PMIC read failed: %d\n",  ret);
 		return ret;
 	}
 
@@ -115,14 +115,14 @@ static int out_set_value(struct udevice *dev, int output_count, int reg_type,
 	int max_value;
 
 	if (dev->driver_data > output_count) {
-		error("Unknown regulator number: %lu for PMIC %s!",
+		pr_err("Unknown regulator number: %lu for PMIC %s!",
 		      dev->driver_data, dev->name);
 		return -EINVAL;
 	}
 
 	max_value = range[dev->driver_data - 1].max;
 	if (value > max_value) {
-		error("Wrong value for %s: %lu. Max is: %d.",
+		pr_err("Wrong value for %s: %lu. Max is: %d.",
 		      dev->name, dev->driver_data, max_value);
 		return -EINVAL;
 	}
@@ -134,7 +134,7 @@ static int out_set_value(struct udevice *dev, int output_count, int reg_type,
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + reg_type;
 	ret = pmic_write(dev->parent, reg, &reg_val, 1);
 	if (ret) {
-		error("PMIC write failed: %d\n",  ret);
+		pr_err("PMIC write failed: %d\n",  ret);
 		return ret;
 	}
 
@@ -154,7 +154,7 @@ static int out_get_mode(struct udevice *dev)
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM;
 	ret = pmic_read(dev->parent, reg, &reg_val, 1);
 	if (ret) {
-		error("PMIC read failed: %d\n",  ret);
+		pr_err("PMIC read failed: %d\n",  ret);
 		return ret;
 	}
 
@@ -163,7 +163,7 @@ static int out_get_mode(struct udevice *dev)
 			return uc_pdata->mode[i].id;
 	}
 
-	error("Unknown operation mode for %s!", dev->name);
+	pr_err("Unknown operation mode for %s!", dev->name);
 	return -EINVAL;
 }
 
@@ -188,14 +188,14 @@ static int out_set_mode(struct udevice *dev, int mode)
 	}
 
 	if (reg_val == -1) {
-		error("Unknown operation mode for %s!", dev->name);
+		pr_err("Unknown operation mode for %s!", dev->name);
 		return -EINVAL;
 	}
 
 	reg = (dev->driver_data - 1) * OUT_REG_COUNT + OUT_REG_OM;
 	ret = pmic_write(dev->parent, reg, (uint8_t *)&reg_val, 1);
 	if (ret) {
-		error("PMIC write failed: %d\n",  ret);
+		pr_err("PMIC write failed: %d\n",  ret);
 		return ret;
 	}
 
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index 7577ff0363..bfcb1ddefe 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -230,7 +230,7 @@ static int memory_init(struct rk3368_ddr_pctl *pctl,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: POWER_UP_START did not complete in %ld ms\n",
+			pr_err("%s: POWER_UP_START did not complete in %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -422,7 +422,7 @@ static int dfi_cfg(struct rk3368_ddr_pctl *pctl)
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: DFI init did not complete within %ld ms\n",
+			pr_err("%s: DFI init did not complete within %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -457,7 +457,7 @@ static int pctl_calc_timings(struct rk3368_sdram_params *params,
 	u32 tfaw_as_ps;
 
 	if (params->ddr_speed_bin != DDR3_1600K) {
-		error("%s: unimplemented DDR3 speed bin %d\n",
+		pr_err("%s: unimplemented DDR3 speed bin %d\n",
 		      __func__, params->ddr_speed_bin);
 		return -1;
 	}
@@ -585,7 +585,7 @@ static int ddrphy_data_training(struct rk3368_ddr_pctl *pctl,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("%s: did not complete within %ld ms\n",
+			pr_err("%s: did not complete within %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
@@ -625,7 +625,7 @@ static int sdram_col_row_detect(struct udevice *dev)
 	}
 
 	if (col == 8) {
-		error("%s: col detect error\n", __func__);
+		pr_err("%s: col detect error\n", __func__);
 		return -EINVAL;
 	}
 
@@ -644,7 +644,7 @@ static int sdram_col_row_detect(struct udevice *dev)
 	}
 
 	if (row == 11) {
-		error("%s: row detect error\n", __func__);
+		pr_err("%s: row detect error\n", __func__);
 		return -EINVAL;
 	}
 
@@ -764,7 +764,7 @@ static int msch_niu_config(struct rk3368_msch *msch,
 		}
 	}
 
-	error("%s: ddrconf (NIU config) not found\n", __func__);
+	pr_err("%s: ddrconf (NIU config) not found\n", __func__);
 	return -EINVAL;
 }
 
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 5ed4b03837..76c1fe80a7 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -551,7 +551,7 @@ static int pctl_cfg(const struct chan_info *chan, u32 channel,
 	tmp = get_timer(0);
 	do {
 		if (get_timer(tmp) > timeout_ms) {
-			error("DRAM (%s): phy failed to lock within  %ld ms\n",
+			pr_err("DRAM (%s): phy failed to lock within  %ld ms\n",
 			      __func__, timeout_ms);
 			return -ETIME;
 		}
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index b1b0289a1b..fdf088e783 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -262,7 +262,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 		bank_name = (char *)ofnode_get_name(bank_node);
 		strsep(&bank_name, "@");
 		if (!bank_name) {
-			error("missing sdram bank index");
+			pr_err("missing sdram bank index");
 			return -EINVAL;
 		}
 
@@ -271,7 +271,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 			       (long unsigned int *)&bank_params->target_bank);
 
 		if (bank_params->target_bank >= MAX_SDRAM_BANK) {
-			error("Found bank %d , but only bank 0 and 1 are supported",
+			pr_err("Found bank %d , but only bank 0 and 1 are supported",
 			      bank_params->target_bank);
 			return -EINVAL;
 		}
@@ -285,7 +285,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 						  sizeof(struct stm32_sdram_control));
 
 		if (!params->bank_params[bank].sdram_control) {
-			error("st,sdram-control not found for %s",
+			pr_err("st,sdram-control not found for %s",
 			      ofnode_get_name(bank_node));
 			return -EINVAL;
 		}
@@ -298,7 +298,7 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev)
 						  sizeof(struct stm32_sdram_timing));
 
 		if (!params->bank_params[bank].sdram_timing) {
-			error("st,sdram-timing not found for %s",
+			pr_err("st,sdram-timing not found for %s",
 			      ofnode_get_name(bank_node));
 			return -EINVAL;
 		}
diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c
index a79708cde2..024b996f0c 100644
--- a/drivers/reset/sti-reset.c
+++ b/drivers/reset/sti-reset.c
@@ -201,20 +201,20 @@ phys_addr_t sti_reset_get_regmap(const char *compatible)
 	node = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
 					     compatible);
 	if (node < 0) {
-		error("unable to find %s node\n", compatible);
+		pr_err("unable to find %s node\n", compatible);
 		return node;
 	}
 
 	ret = uclass_get_device_by_of_offset(UCLASS_SYSCON, node, &syscon);
 	if (ret) {
-		error("%s: uclass_get_device_by_of_offset failed: %d\n",
+		pr_err("%s: uclass_get_device_by_of_offset failed: %d\n",
 		      __func__, ret);
 		return ret;
 	}
 
 	regmap = syscon_get_regmap(syscon);
 	if (!regmap) {
-		error("unable to get regmap for %s\n", syscon->name);
+		pr_err("unable to get regmap for %s\n", syscon->name);
 		return -ENODEV;
 	}
 
@@ -251,7 +251,7 @@ static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert)
 			if (ch->deassert_cnt > 0)
 				return 0;
 		} else
-			error("Reset balancing error: reset_ctl=%p dev=%p id=%lu\n",
+			pr_err("Reset balancing error: reset_ctl=%p dev=%p id=%lu\n",
 			      reset_ctl, reset_ctl->dev, reset_ctl->id);
 	}
 
@@ -268,7 +268,7 @@ static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert)
 	reg = (void __iomem *)base + ch->ack_offset;
 	if (wait_for_bit(__func__, reg, BIT(ch->ack_bit), ctrl_val,
 			 1000, false)) {
-		error("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n",
+		pr_err("Stuck on waiting ack reset_ctl=%p dev=%p id=%lu\n",
 		      reset_ctl, reset_ctl->dev, reset_ctl->id);
 
 		return -ETIMEDOUT;
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index e2f8342e88..228e714e09 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -474,7 +474,7 @@ static int atmel_spi_probe(struct udevice *bus)
 	ret = gpio_request_list_by_name(bus, "cs-gpios", priv->cs_gpios,
 					ARRAY_SIZE(priv->cs_gpios), 0);
 	if (ret < 0) {
-		error("Can't get %s gpios! Error: %d", bus->name, ret);
+		pr_err("Can't get %s gpios! Error: %d", bus->name, ret);
 		return ret;
 	}
 
diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c
index c5b766c0dd..e2a593b934 100644
--- a/drivers/spi/lpc32xx_ssp.c
+++ b/drivers/spi/lpc32xx_ssp.c
@@ -66,17 +66,17 @@ struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
 	/* we only set up SSP0 for now, so ignore bus */
 
 	if (mode & SPI_3WIRE) {
-		error("3-wire mode not supported");
+		pr_err("3-wire mode not supported");
 		return NULL;
 	}
 
 	if (mode & SPI_SLAVE) {
-		error("slave mode not supported\n");
+		pr_err("slave mode not supported\n");
 		return NULL;
 	}
 
 	if (mode & SPI_PREAMBLE) {
-		error("preamble byte skipping not supported\n");
+		pr_err("preamble byte skipping not supported\n");
 		return NULL;
 	}
 
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
index 9b58aa8e97..bf698a737b 100644
--- a/drivers/sysreset/sysreset_sti.c
+++ b/drivers/sysreset/sysreset_sti.c
@@ -39,7 +39,7 @@ static int sti_sysreset_probe(struct udevice *dev)
 					     "st,syscfg", NULL, 0, 0,
 					     &syscfg_phandle);
 	if (ret < 0) {
-		error("Can't get syscfg phandle: %d\n", ret);
+		pr_err("Can't get syscfg phandle: %d\n", ret);
 		return ret;
 	}
 
@@ -47,14 +47,14 @@ static int sti_sysreset_probe(struct udevice *dev)
 					     syscfg_phandle.node,
 					     &syscon);
 	if (ret) {
-		error("%s: uclass_get_device_by_of_offset failed: %d\n",
+		pr_err("%s: uclass_get_device_by_of_offset failed: %d\n",
 		      __func__, ret);
 		return ret;
 	}
 
 	regmap = syscon_get_regmap(syscon);
 	if (!regmap) {
-		error("unable to get regmap for %s\n", syscon->name);
+		pr_err("unable to get regmap for %s\n", syscon->name);
 		return -ENODEV;
 	}
 
diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c
index 3818faeb46..3abce7f678 100644
--- a/drivers/sysreset/sysreset_syscon.c
+++ b/drivers/sysreset/sysreset_syscon.c
@@ -45,13 +45,13 @@ int syscon_reboot_probe(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
 					   "regmap", &syscon);
 	if (err) {
-		error("unable to find syscon device\n");
+		pr_err("unable to find syscon device\n");
 		return err;
 	}
 
 	priv->regmap = syscon_get_regmap(syscon);
 	if (!priv->regmap) {
-		error("unable to find regmap\n");
+		pr_err("unable to find regmap\n");
 		return -ENODEV;
 	}
 
diff --git a/drivers/sysreset/sysreset_watchdog.c b/drivers/sysreset/sysreset_watchdog.c
index 304ed052a2..ab250aea29 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -38,7 +38,7 @@ int wdt_reboot_probe(struct udevice *dev)
 	err = uclass_get_device_by_phandle(UCLASS_WDT, dev,
 					   "wdt", &priv->wdt);
 	if (err) {
-		error("unable to find wdt device\n");
+		pr_err("unable to find wdt device\n");
 		return err;
 	}
 
diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c
index ef3ff0dbf6..e3e20d8996 100644
--- a/drivers/tpm/tpm_tis_infineon.c
+++ b/drivers/tpm/tpm_tis_infineon.c
@@ -539,7 +539,7 @@ static int tpm_tis_i2c_init(struct udevice *dev)
 	}
 
 	if (chip->chip_type != UNKNOWN && vendor != expected_did_vid) {
-		error("Vendor id did not match! ID was %08x\n", vendor);
+		pr_err("Vendor id did not match! ID was %08x\n", vendor);
 		return -ENODEV;
 	}
 
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 35c2dc18d9..e8432bb016 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -28,7 +28,7 @@ enum usb_dr_mode usb_get_dr_mode(int node)
 
 	dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL);
 	if (!dr_mode) {
-		error("usb dr_mode not found\n");
+		pr_err("usb dr_mode not found\n");
 		return USB_DR_MODE_UNKNOWN;
 	}
 
diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
index 4abef5d5c8..941d612a68 100644
--- a/drivers/usb/eth/mcs7830.c
+++ b/drivers/usb/eth/mcs7830.c
@@ -418,25 +418,25 @@ static int mcs7830_basic_reset(struct usb_device *udev,
 
 	rc = mcs7830_set_autoneg(udev);
 	if (rc < 0) {
-		error("setting autoneg failed\n");
+		pr_err("setting autoneg failed\n");
 		return rc;
 	}
 
 	rc = mcs7830_write_mchash(udev, priv);
 	if (rc < 0) {
-		error("failed to set multicast hash\n");
+		pr_err("failed to set multicast hash\n");
 		return rc;
 	}
 
 	rc = mcs7830_write_config(udev, priv);
 	if (rc < 0) {
-		error("failed to set configuration\n");
+		pr_err("failed to set configuration\n");
 		return rc;
 	}
 
 	rc = mcs7830_apply_fixup(udev);
 	if (rc < 0) {
-		error("fixup application failed\n");
+		pr_err("fixup application failed\n");
 		return rc;
 	}
 
@@ -541,11 +541,11 @@ static int mcs7830_recv_common(struct ueth_data *ueth, uint8_t *buf)
 	debug("%s() RX want len %d, got len %d, rc %d\n",
 	      __func__, wantlen, gotlen, rc);
 	if (rc != 0) {
-		error("RX: failed to receive\n");
+		pr_err("RX: failed to receive\n");
 		return rc;
 	}
 	if (gotlen > wantlen) {
-		error("RX: got too many bytes (%d)\n", gotlen);
+		pr_err("RX: got too many bytes (%d)\n", gotlen);
 		return -EIO;
 	}
 
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 9df6d32c65..ad2f606b78 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1456,7 +1456,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 
 	ret = driver->bind(&udc->gadget);
 	if (ret) {
-		error("driver->bind() returned %d\n", ret);
+		pr_err("driver->bind() returned %d\n", ret);
 		udc->driver = NULL;
 	}
 
@@ -1468,7 +1468,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 	struct at91_udc *udc = controller;
 
 	if (!driver || !driver->unbind || !driver->disconnect) {
-		error("bad paramter\n");
+		pr_err("bad paramter\n");
 		return -EINVAL;
 	}
 
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index ad31703c73..c0a95a97c9 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -1228,7 +1228,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 
 	ret = driver->bind(&udc->gadget);
 	if (ret) {
-		error("driver->bind() returned %d\n", ret);
+		pr_err("driver->bind() returned %d\n", ret);
 		udc->driver = NULL;
 	}
 
@@ -1240,7 +1240,7 @@ int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 	struct usba_udc *udc = &controller;
 
 	if (!driver || !driver->unbind || !driver->disconnect) {
-		error("bad paramter\n");
+		pr_err("bad paramter\n");
 		return -EINVAL;
 	}
 
@@ -1261,7 +1261,7 @@ static struct usba_ep *usba_udc_pdata(struct usba_platform_data *pdata,
 
 	eps = malloc(sizeof(struct usba_ep) * pdata->num_ep);
 	if (!eps) {
-		error("failed to alloc eps\n");
+		pr_err("failed to alloc eps\n");
 		return NULL;
 	}
 
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 8c0967fea5..608764bae7 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -836,7 +836,7 @@ int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
 			    ROUND(sizeof(struct usb_ctrlrequest),
 				  CONFIG_SYS_CACHELINE_SIZE));
 	if (!usb_ctrl) {
-		error("No memory available for UDC!\n");
+		pr_err("No memory available for UDC!\n");
 		return -ENOMEM;
 	}
 
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 2cf5c8d31e..2e0ff452d8 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -1059,7 +1059,7 @@ static int eth_set_config(struct eth_dev *dev, unsigned number,
 			&& dev->config
 			&& dev->tx_qlen != 0) {
 		/* tx fifo is full, but we can't clear it...*/
-		error("can't change configurations");
+		pr_err("can't change configurations");
 		return -ESPIPE;
 	}
 	eth_reset_config(dev);
@@ -1233,7 +1233,7 @@ static void rndis_command_complete(struct usb_ep *ep, struct usb_request *req)
 	/* received RNDIS command from USB_CDC_SEND_ENCAPSULATED_COMMAND */
 	status = rndis_msg_parser(dev->rndis_config, (u8 *) req->buf);
 	if (status < 0)
-		error("%s: rndis parse error %d", __func__, status);
+		pr_err("%s: rndis parse error %d", __func__, status);
 }
 
 #endif	/* RNDIS */
@@ -1554,7 +1554,7 @@ static int rx_submit(struct eth_dev *dev, struct usb_request *req,
 	retval = usb_ep_queue(dev->out_ep, req, gfp_flags);
 
 	if (retval)
-		error("rx submit --> %d", retval);
+		pr_err("rx submit --> %d", retval);
 
 	return retval;
 }
@@ -1624,7 +1624,7 @@ static int alloc_requests(struct eth_dev *dev, unsigned n, gfp_t gfp_flags)
 fail2:
 	usb_ep_free_request(dev->in_ep, dev->tx_req);
 fail1:
-	error("can't alloc requests");
+	pr_err("can't alloc requests");
 	return -1;
 }
 
@@ -2060,7 +2060,7 @@ static int eth_bind(struct usb_gadget *gadget)
 		 * anything less functional on CDC-capable hardware,
 		 * so we fail in this case.
 		 */
-		error("controller '%s' not recognized",
+		pr_err("controller '%s' not recognized",
 			gadget->name);
 		return -ENODEV;
 	}
@@ -2121,7 +2121,7 @@ static int eth_bind(struct usb_gadget *gadget)
 	in_ep = usb_ep_autoconfig(gadget, &fs_source_desc);
 	if (!in_ep) {
 autoconf_fail:
-		error("can't autoconfigure on %s\n",
+		pr_err("can't autoconfigure on %s\n",
 			gadget->name);
 		return -ENODEV;
 	}
@@ -2142,7 +2142,7 @@ autoconf_fail:
 		if (status_ep) {
 			status_ep->driver_data = status_ep;	/* claim */
 		} else if (rndis) {
-			error("can't run RNDIS on %s", gadget->name);
+			pr_err("can't run RNDIS on %s", gadget->name);
 			return -ENODEV;
 #ifdef CONFIG_USB_ETH_CDC
 		} else if (cdc) {
@@ -2244,7 +2244,7 @@ autoconf_fail:
 	if (rndis) {
 		status = rndis_init();
 		if (status < 0) {
-			error("can't init RNDIS, %d", status);
+			pr_err("can't init RNDIS, %d", status);
 			goto fail;
 		}
 	}
@@ -2335,7 +2335,7 @@ fail0:
 	return 0;
 
 fail:
-	error("%s failed, status = %d", __func__, status);
+	pr_err("%s failed, status = %d", __func__, status);
 	eth_unbind(gadget);
 	return status;
 }
@@ -2350,7 +2350,7 @@ int dm_usb_init(struct eth_dev *e_dev)
 
 	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &dev);
 	if (!dev || ret) {
-		error("No USB device found\n");
+		pr_err("No USB device found\n");
 		return -ENODEV;
 	}
 
@@ -2369,7 +2369,7 @@ static int _usb_eth_init(struct ether_priv *priv)
 
 #ifdef CONFIG_DM_USB
 	if (dm_usb_init(dev)) {
-		error("USB ether not found\n");
+		pr_err("USB ether not found\n");
 		return -ENODEV;
 	}
 #else
@@ -2393,11 +2393,11 @@ static int _usb_eth_init(struct ether_priv *priv)
 			sizeof(host_addr));
 
 	if (!is_eth_addr_valid(dev_addr)) {
-		error("Need valid 'usbnet_devaddr' to be set");
+		pr_err("Need valid 'usbnet_devaddr' to be set");
 		goto fail;
 	}
 	if (!is_eth_addr_valid(host_addr)) {
-		error("Need valid 'usbnet_hostaddr' to be set");
+		pr_err("Need valid 'usbnet_hostaddr' to be set");
 		goto fail;
 	}
 
@@ -2427,7 +2427,7 @@ static int _usb_eth_init(struct ether_priv *priv)
 	while (!dev->network_started) {
 		/* Handle control-c and timeouts */
 		if (ctrlc() || (get_timer(ts) > timeout)) {
-			error("The remote end did not respond in time.");
+			pr_err("The remote end did not respond in time.");
 			goto fail;
 		}
 		usb_gadget_handle_interrupts(0);
@@ -2456,7 +2456,7 @@ static int _usb_eth_send(struct ether_priv *priv, void *packet, int length)
 		rndis_pkt = malloc(length +
 					sizeof(struct rndis_packet_msg_type));
 		if (!rndis_pkt) {
-			error("No memory to alloc RNDIS packet");
+			pr_err("No memory to alloc RNDIS packet");
 			goto drop;
 		}
 		rndis_add_hdr(rndis_pkt, length);
@@ -2574,7 +2574,7 @@ static int usb_eth_recv(struct eth_device *netdev)
 
 	ret = _usb_eth_recv(priv);
 	if (ret) {
-		error("error packet receive\n");
+		pr_err("error packet receive\n");
 		return ret;
 	}
 
@@ -2585,7 +2585,7 @@ static int usb_eth_recv(struct eth_device *netdev)
 		net_process_received_packet(net_rx_packets[0],
 					    dev->rx_req->length);
 	} else {
-		error("dev->rx_req invalid");
+		pr_err("dev->rx_req invalid");
 	}
 	packet_received = 0;
 	rx_submit(dev, dev->rx_req, 0);
@@ -2641,7 +2641,7 @@ static int usb_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 
 	ret = _usb_eth_recv(priv);
 	if (ret) {
-		error("error packet receive\n");
+		pr_err("error packet receive\n");
 		return ret;
 	}
 
@@ -2650,7 +2650,7 @@ static int usb_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 			*packetp = (uchar *)net_rx_packets[0];
 			return ethdev->rx_req->length;
 		} else {
-			error("dev->rx_req invalid");
+			pr_err("dev->rx_req invalid");
 			return -EFAULT;
 		}
 	}
@@ -2706,13 +2706,13 @@ int usb_ether_init(void)
 
 	ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &usb_dev);
 	if (!usb_dev || ret) {
-		error("No USB device found\n");
+		pr_err("No USB device found\n");
 		return ret;
 	}
 
 	ret = device_bind_driver(usb_dev, "usb_ether", "usb_ether", &dev);
 	if (!dev || ret) {
-		error("usb - not able to bind usb_ether device\n");
+		pr_err("usb - not able to bind usb_ether device\n");
 		return ret;
 	}
 
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 3e867f34c7..2ac1d6c404 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -402,7 +402,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing variable");
+		pr_err("missing variable");
 		fastboot_tx_write_str("FAILmissing var");
 		return;
 	}
@@ -837,7 +837,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing slot name");
+		pr_err("missing slot name");
 		fastboot_tx_write_str("FAIL: missing slot name");
 		return;
 	}
@@ -883,7 +883,7 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #endif
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing partition name");
+		pr_err("missing partition name");
 		fastboot_tx_write_str("FAILmissing partition name");
 		return;
 	}
@@ -1100,7 +1100,7 @@ static void cb_erase(struct usb_ep *ep, struct usb_request *req)
 
 	strsep(&cmd, ":");
 	if (!cmd) {
-		error("missing partition name");
+		pr_err("missing partition name");
 		fastboot_tx_write_str("FAILmissing partition name");
 		return;
 	}
@@ -1180,7 +1180,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
 	}
 
 	if (!func_cb) {
-		error("unknown command: %.*s", req->actual, cmdbuf);
+		pr_err("unknown command: %.*s", req->actual, cmdbuf);
 		fastboot_tx_write_str("FAILunknown command");
 	} else {
 		if (req->actual < req->length) {
@@ -1188,7 +1188,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
 			buf[req->actual] = 0;
 			func_cb(ep, req);
 		} else {
-			error("buffer overflow");
+			pr_err("buffer overflow");
 			fastboot_tx_write_str("FAILbuffer overflow");
 		}
 	}
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index 0fae66beab..fd3da922a6 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -237,12 +237,12 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 	u8 report = data[0];
 
 	if (status != 0) {
-		error("Status: %d", status);
+		pr_err("Status: %d", status);
 		return;
 	}
 
 	if (report != 1) {
-		error("Unexpected report %d", report);
+		pr_err("Unexpected report %d", report);
 		return;
 	}
 
@@ -309,7 +309,7 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->next_state = SDP_STATE_IDLE;
 		break;
 	default:
-		error("Unknown command: %04x\n", be16_to_cpu(cmd->cmd));
+		pr_err("Unknown command: %04x\n", be16_to_cpu(cmd->cmd));
 	}
 }
 
@@ -322,12 +322,12 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 	int datalen = req->length - 1;
 
 	if (status != 0) {
-		error("Status: %d", status);
+		pr_err("Status: %d", status);
 		return;
 	}
 
 	if (report != 2) {
-		error("Unexpected report %d", report);
+		pr_err("Unexpected report %d", report);
 		return;
 	}
 
@@ -360,7 +360,7 @@ static void sdp_rx_data_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->state = SDP_STATE_TX_SEC_CONF;
 		break;
 	default:
-		error("Invalid state: %d", sdp->state);
+		pr_err("Invalid state: %d", sdp->state);
 	}
 }
 
@@ -370,7 +370,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req)
 	int status = req->status;
 
 	if (status != 0) {
-		error("Status: %d", status);
+		pr_err("Status: %d", status);
 		return;
 	}
 
@@ -393,7 +393,7 @@ static void sdp_tx_complete(struct usb_ep *ep, struct usb_request *req)
 			sdp->state = SDP_STATE_IDLE;
 		break;
 	default:
-		error("Wrong State: %d", sdp->state);
+		pr_err("Wrong State: %d", sdp->state);
 		sdp->state = SDP_STATE_IDLE;
 		break;
 	}
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index cd4d9e659a..18f233ab58 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -174,7 +174,7 @@ static long long int download_head(unsigned long long total,
 					transfer_buffer, THOR_STORE_UNIT_SIZE,
 					(*cnt)++);
 			if (ret) {
-				error("DFU write failed [%d] cnt: %d",
+				pr_err("DFU write failed [%d] cnt: %d",
 				      ret, *cnt);
 				return ret;
 			}
@@ -218,20 +218,20 @@ static int download_tail(long long int left, int cnt)
 
 	dfu_entity = dfu_get_entity(alt_setting_num);
 	if (!dfu_entity) {
-		error("Alt setting: %d entity not found!\n", alt_setting_num);
+		pr_err("Alt setting: %d entity not found!\n", alt_setting_num);
 		return -ENOENT;
 	}
 
 	transfer_buffer = dfu_get_buf(dfu_entity);
 	if (!transfer_buffer) {
-		error("Transfer buffer not allocated!");
+		pr_err("Transfer buffer not allocated!");
 		return -ENXIO;
 	}
 
 	if (left) {
 		ret = dfu_write(dfu_entity, transfer_buffer, left, cnt++);
 		if (ret) {
-			error("DFU write failed [%d]: left: %llu", ret, left);
+			pr_err("DFU write failed [%d]: left: %llu", ret, left);
 			return ret;
 		}
 	}
@@ -245,7 +245,7 @@ static int download_tail(long long int left, int cnt)
 	 */
 	ret = dfu_flush(dfu_entity, transfer_buffer, 0, cnt);
 	if (ret)
-		error("DFU flush failed!");
+		pr_err("DFU flush failed!");
 
 	return ret;
 }
@@ -285,7 +285,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt)
 
 		alt_setting_num = dfu_get_alt(f_name);
 		if (alt_setting_num < 0) {
-			error("Alt setting [%d] to write not found!",
+			pr_err("Alt setting [%d] to write not found!",
 			      alt_setting_num);
 			rsp->ack = -ENODEV;
 			ret = rsp->ack;
@@ -311,7 +311,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt)
 		debug("DL EXIT\n");
 		break;
 	default:
-		error("Operation not supported: %d", rqt->rqt_data);
+		pr_err("Operation not supported: %d", rqt->rqt_data);
 		ret = -ENOTSUPP;
 	}
 
@@ -342,7 +342,7 @@ static int process_data(void)
 		puts("RQT: UPLOAD not supported!\n");
 		break;
 	default:
-		error("unknown request (%d)", rqt->rqt);
+		pr_err("unknown request (%d)", rqt->rqt);
 	}
 
 	return ret;
@@ -541,7 +541,7 @@ static int thor_rx_data(void)
 
 		status = usb_ep_queue(dev->out_ep, dev->out_req, 0);
 		if (status) {
-			error("kill %s:  resubmit %d bytes --> %d",
+			pr_err("kill %s:  resubmit %d bytes --> %d",
 			      dev->out_ep->name, dev->out_req->length, status);
 			usb_ep_set_halt(dev->out_ep);
 			return -EAGAIN;
@@ -575,7 +575,7 @@ static void thor_tx_data(unsigned char *data, int len)
 
 	status = usb_ep_queue(dev->in_ep, dev->in_req, 0);
 	if (status) {
-		error("kill %s:  resubmit %d bytes --> %d",
+		pr_err("kill %s:  resubmit %d bytes --> %d",
 		      dev->in_ep->name, dev->in_req->length, status);
 		usb_ep_set_halt(dev->in_ep);
 	}
@@ -608,7 +608,7 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req)
 	case -ESHUTDOWN:		/* disconnect from host */
 	case -EREMOTEIO:                /* short read */
 	case -EOVERFLOW:
-		error("ERROR:%d", status);
+		pr_err("ERROR:%d", status);
 		break;
 	}
 
@@ -664,7 +664,7 @@ thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
 		break;
 
 	default:
-		error("thor_setup: unknown request: %d", ctrl->bRequest);
+		pr_err("thor_setup: unknown request: %d", ctrl->bRequest);
 	}
 
 	if (value >= 0) {
@@ -973,7 +973,7 @@ static int thor_func_set_alt(struct usb_function *f,
 		debug("Communication Data interface\n");
 		result = thor_eps_setup(f);
 		if (result)
-			error("%s: EPs setup failed!", __func__);
+			pr_err("%s: EPs setup failed!", __func__);
 		dev->configuration_done = 1;
 		break;
 	}
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 0ed72d5ae7..1293e18f75 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -179,7 +179,7 @@ static int dwc_vbus_supply_init(struct udevice *dev)
 
 	ret = regulator_set_enable(vbus_supply, true);
 	if (ret) {
-		error("Error enabling vbus supply\n");
+		pr_err("Error enabling vbus supply\n");
 		return ret;
 	}
 
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 18e1e0ee88..1cb92c0338 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -51,7 +51,7 @@ static int ehci_usb_probe(struct udevice *dev)
 				break;
 			err = clk_enable(&priv->clocks[i]);
 			if (err) {
-				error("failed to enable clock %d\n", i);
+				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
 			}
@@ -59,7 +59,7 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	} else {
 		if (clock_nb != -ENOENT) {
-			error("failed to get clock phandle(%d)\n", clock_nb);
+			pr_err("failed to get clock phandle(%d)\n", clock_nb);
 			return clock_nb;
 		}
 	}
@@ -80,7 +80,7 @@ static int ehci_usb_probe(struct udevice *dev)
 				break;
 
 			if (reset_deassert(&priv->resets[i])) {
-				error("failed to deassert reset %d\n", i);
+				pr_err("failed to deassert reset %d\n", i);
 				reset_free(&priv->resets[i]);
 				goto reset_err;
 			}
@@ -88,7 +88,7 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	} else {
 		if (reset_nb != -ENOENT) {
-			error("failed to get reset phandle(%d)\n", reset_nb);
+			pr_err("failed to get reset phandle(%d)\n", reset_nb);
 			goto clk_err;
 		}
 	}
@@ -96,14 +96,14 @@ static int ehci_usb_probe(struct udevice *dev)
 	err = generic_phy_get_by_index(dev, 0, &priv->phy);
 	if (err) {
 		if (err != -ENOENT) {
-			error("failed to get usb phy\n");
+			pr_err("failed to get usb phy\n");
 			goto reset_err;
 		}
 	} else {
 
 		err = generic_phy_init(&priv->phy);
 		if (err) {
-			error("failed to init usb phy\n");
+			pr_err("failed to init usb phy\n");
 			goto reset_err;
 		}
 	}
@@ -122,17 +122,17 @@ phy_err:
 	if (generic_phy_valid(&priv->phy)) {
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
-			error("failed to release phy\n");
+			pr_err("failed to release phy\n");
 	}
 
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
-		error("failed to assert all resets\n");
+		pr_err("failed to assert all resets\n");
 clk_err:
 	ret = clk_release_all(priv->clocks, priv->clock_count);
 	if (ret)
-		error("failed to disable all clocks\n");
+		pr_err("failed to disable all clocks\n");
 
 	return err;
 }
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index e22ee97939..bf55a71d66 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -47,14 +47,14 @@ static int ohci_usb_probe(struct udevice *dev)
 
 			err = clk_enable(&priv->clocks[i]);
 			if (err) {
-				error("failed to enable clock %d\n", i);
+				pr_err("failed to enable clock %d\n", i);
 				clk_free(&priv->clocks[i]);
 				goto clk_err;
 			}
 			priv->clock_count++;
 		}
 	} else if (clock_nb != -ENOENT) {
-		error("failed to get clock phandle(%d)\n", clock_nb);
+		pr_err("failed to get clock phandle(%d)\n", clock_nb);
 		return clock_nb;
 	}
 
@@ -74,28 +74,28 @@ static int ohci_usb_probe(struct udevice *dev)
 
 			err = reset_deassert(&priv->resets[i]);
 			if (err) {
-				error("failed to deassert reset %d\n", i);
+				pr_err("failed to deassert reset %d\n", i);
 				reset_free(&priv->resets[i]);
 				goto reset_err;
 			}
 			priv->reset_count++;
 		}
 	} else if (reset_nb != -ENOENT) {
-		error("failed to get reset phandle(%d)\n", reset_nb);
+		pr_err("failed to get reset phandle(%d)\n", reset_nb);
 		goto clk_err;
 	}
 
 	err = generic_phy_get_by_index(dev, 0, &priv->phy);
 	if (err) {
 		if (err != -ENOENT) {
-			error("failed to get usb phy\n");
+			pr_err("failed to get usb phy\n");
 			goto reset_err;
 		}
 	} else {
 
 		err = generic_phy_init(&priv->phy);
 		if (err) {
-			error("failed to init usb phy\n");
+			pr_err("failed to init usb phy\n");
 			goto reset_err;
 		}
 	}
@@ -110,17 +110,17 @@ phy_err:
 	if (generic_phy_valid(&priv->phy)) {
 		ret = generic_phy_exit(&priv->phy);
 		if (ret)
-			error("failed to release phy\n");
+			pr_err("failed to release phy\n");
 	}
 
 reset_err:
 	ret = reset_release_all(priv->resets, priv->reset_count);
 	if (ret)
-		error("failed to assert all resets\n");
+		pr_err("failed to assert all resets\n");
 clk_err:
 	ret = clk_release_all(priv->clocks, priv->clock_count);
 	if (ret)
-		error("failed to disable all clocks\n");
+		pr_err("failed to disable all clocks\n");
 
 	return err;
 }
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 4191a89421..258d1cd00a 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -128,13 +128,13 @@ static int xhci_dwc3_probe(struct udevice *dev)
 	ret = generic_phy_get_by_index(dev, 0, &plat->usb_phy);
 	if (ret) {
 		if (ret != -ENOENT) {
-			error("Failed to get USB PHY for %s\n", dev->name);
+			pr_err("Failed to get USB PHY for %s\n", dev->name);
 			return ret;
 		}
 	} else {
 		ret = generic_phy_init(&plat->usb_phy);
 		if (ret) {
-			error("Can't init USB PHY for %s\n", dev->name);
+			pr_err("Can't init USB PHY for %s\n", dev->name);
 			return ret;
 		}
 	}
@@ -161,7 +161,7 @@ static int xhci_dwc3_remove(struct udevice *dev)
 	if (generic_phy_valid(&plat->usb_phy)) {
 		ret = generic_phy_exit(&plat->usb_phy);
 		if (ret) {
-			error("Can't deinit USB PHY for %s\n", dev->name);
+			pr_err("Can't deinit USB PHY for %s\n", dev->name);
 			return ret;
 		}
 	}
diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
index ca3abffba0..b1f9884273 100644
--- a/drivers/usb/host/xhci-rockchip.c
+++ b/drivers/usb/host/xhci-rockchip.c
@@ -46,7 +46,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 	 */
 	plat->hcd_base = dev_read_addr(dev);
 	if (plat->hcd_base == FDT_ADDR_T_NONE) {
-		error("Can't get the XHCI register base address\n");
+		pr_err("Can't get the XHCI register base address\n");
 		return -ENXIO;
 	}
 
@@ -60,7 +60,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	if (plat->phy_base == FDT_ADDR_T_NONE) {
-		error("Can't get the usbphy register address\n");
+		pr_err("Can't get the usbphy register address\n");
 		return -ENXIO;
 	}
 
@@ -117,7 +117,7 @@ static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci,
 
 	ret = dwc3_core_init(rkxhci->dwc3_reg);
 	if (ret) {
-		error("failed to initialize core\n");
+		pr_err("failed to initialize core\n");
 		return ret;
 	}
 
@@ -149,14 +149,14 @@ static int xhci_usb_probe(struct udevice *dev)
 	if (plat->vbus_supply) {
 		ret = regulator_set_enable(plat->vbus_supply, true);
 		if (ret) {
-			error("XHCI: failed to set VBus supply\n");
+			pr_err("XHCI: failed to set VBus supply\n");
 			return ret;
 		}
 	}
 
 	ret = rockchip_xhci_core_init(ctx, dev);
 	if (ret) {
-		error("XHCI: failed to initialize controller\n");
+		pr_err("XHCI: failed to initialize controller\n");
 		return ret;
 	}
 
@@ -179,7 +179,7 @@ static int xhci_usb_remove(struct udevice *dev)
 	if (plat->vbus_supply) {
 		ret = regulator_set_enable(plat->vbus_supply, false);
 		if (ret)
-			error("XHCI: failed to set VBus supply\n");
+			pr_err("XHCI: failed to set VBus supply\n");
 	}
 
 	return ret;
diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index de101319cd..233857ad7a 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -106,7 +106,7 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev)
 							  "mentor,multipoint",
 							  -1);
 	if (platdata->musb_config.multipoint < 0) {
-		error("MUSB multipoint DT entry missing\n");
+		pr_err("MUSB multipoint DT entry missing\n");
 		return -ENOENT;
 	}
 
@@ -115,14 +115,14 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev)
 	platdata->musb_config.num_eps = fdtdec_get_int(fdt, node,
 						       "mentor,num-eps", -1);
 	if (platdata->musb_config.num_eps < 0) {
-		error("MUSB num-eps DT entry missing\n");
+		pr_err("MUSB num-eps DT entry missing\n");
 		return -ENOENT;
 	}
 
 	platdata->musb_config.ram_bits = fdtdec_get_int(fdt, node,
 							"mentor,ram-bits", -1);
 	if (platdata->musb_config.ram_bits < 0) {
-		error("MUSB ram-bits DT entry missing\n");
+		pr_err("MUSB ram-bits DT entry missing\n");
 		return -ENOENT;
 	}
 
@@ -132,7 +132,7 @@ static int ti_musb_ofdata_to_platdata(struct udevice *dev)
 
 	platdata->plat.power = fdtdec_get_int(fdt, node, "mentor,power", -1);
 	if (platdata->plat.power < 0) {
-		error("MUSB mentor,power DT entry missing\n");
+		pr_err("MUSB mentor,power DT entry missing\n");
 		return -ENOENT;
 	}
 
@@ -183,7 +183,7 @@ static int ti_musb_host_ofdata_to_platdata(struct udevice *dev)
 
 	ret = ti_musb_ofdata_to_platdata(dev);
 	if (ret) {
-		error("platdata dt parse error\n");
+		pr_err("platdata dt parse error\n");
 		return ret;
 	}
 
@@ -229,7 +229,7 @@ static int ti_musb_wrapper_bind(struct udevice *parent)
 			ret = device_bind_driver_to_node(parent, "ti-musb-host",
 					name, offset_to_ofnode(node), &dev);
 			if (ret) {
-				error("musb - not able to bind usb host node\n");
+				pr_err("musb - not able to bind usb host node\n");
 				return ret;
 			}
 			break;
diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index bb5cc9788a..a8b3e747a0 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -128,7 +128,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel)
 		raster_ctrl |= LCD_TFT_24BPP_MODE;
 		break;
 	default:
-		error("am335x-fb: invalid bpp value: %d\n", panel->bpp);
+		pr_err("am335x-fb: invalid bpp value: %d\n", panel->bpp);
 		return -1;
 	}
 
diff --git a/env/common.c b/env/common.c
index b403bd5f6c..70715bb6e7 100644
--- a/env/common.c
+++ b/env/common.c
@@ -84,7 +84,7 @@ void set_default_env(const char *s)
 	if (himport_r(&env_htab, (char *)default_environment,
 			sizeof(default_environment), '\0', flags, 0,
 			0, NULL) == 0)
-		error("Environment import failed: errno = %d\n", errno);
+		pr_err("Environment import failed: errno = %d\n", errno);
 
 	gd->flags |= GD_FLG_ENV_READY;
 	gd->flags |= GD_FLG_ENV_DEFAULT;
@@ -172,7 +172,7 @@ int env_import(const char *buf, int check)
 	/* Decrypt the env if desired. */
 	ret = env_aes_cbc_crypt(ep, 0);
 	if (ret) {
-		error("Failed to decrypt env!\n");
+		pr_err("Failed to decrypt env!\n");
 		set_default_env("!import failed");
 		return ret;
 	}
@@ -183,7 +183,7 @@ int env_import(const char *buf, int check)
 		return 1;
 	}
 
-	error("Cannot import environment: errno = %d\n", errno);
+	pr_err("Cannot import environment: errno = %d\n", errno);
 
 	set_default_env("!import failed");
 
@@ -247,7 +247,7 @@ int env_export(env_t *env_out)
 	res = (char *)env_out->data;
 	len = hexport_r(&env_htab, '\0', 0, &res, ENV_SIZE, 0, NULL);
 	if (len < 0) {
-		error("Cannot export environment: errno = %d\n", errno);
+		pr_err("Cannot export environment: errno = %d\n", errno);
 		return 1;
 	}
 
diff --git a/env/sf.c b/env/sf.c
index 6f74371c09..e51b1ae189 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -236,7 +236,7 @@ static int env_sf_load(void)
 
 	ret = env_import((char *)ep, 0);
 	if (!ret) {
-		error("Cannot import environment: errno = %d\n", errno);
+		pr_err("Cannot import environment: errno = %d\n", errno);
 		set_default_env("!env_import failed");
 	}
 
diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c
index 1d63fc9434..b16005e604 100644
--- a/fs/jffs2/jffs2_nand_1pass.c
+++ b/fs/jffs2/jffs2_nand_1pass.c
@@ -798,7 +798,7 @@ jffs2_1pass_build_lists(struct part_info * part)
 	struct mtdids *id = part->dev->id;
 	mtd = get_nand_dev_by_index(id->num);
 	if (!mtd) {
-		error("\nno NAND devices available\n");
+		pr_err("\nno NAND devices available\n");
 		return 0;
 	}
 
diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c
index bd66d31697..2a70e4a543 100644
--- a/fs/yaffs2/yaffs_uboot_glue.c
+++ b/fs/yaffs2/yaffs_uboot_glue.c
@@ -168,7 +168,7 @@ void cmd_yaffs_devconfig(char *_mp, int flash_dev,
 
 	mtd = get_nand_dev_by_index(flash_dev);
 	if (!mtd) {
-		error("\nno NAND devices available\n");
+		pr_err("\nno NAND devices available\n");
 		return;
 	}
 

commit a9a4552a1c74e57a15d331bc9da00f046de9985f
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:40 2017 +0900

    UPSTREAM: printk: collect printk stuff into <linux/printk.h> with loglevel support
    
    When we import code from Linux, with regular re-sync planned, we want
    to use printk() and pr_*().  U-Boot does not support them in a clean
    way.  So, people end up with local macros, or compat headers here and
    there, then we occasionally see build errors of definition conflicts.
    
    We have include/linux/compat.h, but putting all sorts of unrelated
    things into a single header is just a temporal workaround.  Hence this
    patch, to find the best home for all printk variants.  If you want to
    use printk() and friends, please include <linux/printk.h>.  This header
    is self-contained, and pulls in only a few headers.
    
    When I was testing this clean-up, I noticed the image size exceeded
    its platform limit on some boards.  This is because all pr_*() that
    were previously defined as no-op in include/linux/mtd/mtd.h (unless
    CONFIG_MTD_DEBUG is set), are now enabled.
    
    To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
    The concept is similar to the kernel parameter "loglevel".  (Actually,
    the Kconfig help message was taken from kernel-paremeter.txt of Linux)
    Messages with a loglevel smaller than console loglevel will be printed.
    
    The difference is the loglevel is build-time determined.  To save the
    image size, lower priority pr_*() are compiled out.  I set the default
    of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
    are compiled in.
    
    I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.
    
    Change-Id: I997d8bbeedd48777be87472df8ed126181fc4b8e
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    [trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b44b30260ffa3dc82f4bb98b022483bb09e95353)

diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index 32d359321a..22136855fa 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -15,9 +15,6 @@
 #include "sg-regs.h"
 #include "soc-info.h"
 
-#define pr_warn(fmt, args...)	printf(fmt, ##args)
-#define pr_err(fmt, args...)	printf(fmt, ##args)
-
 DECLARE_GLOBAL_DATA_PTR;
 
 struct uniphier_memif_data {
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index 29f638d947..da209354ed 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -104,9 +104,4 @@ int uniphier_have_internal_stm(void);
 int uniphier_boot_from_backend(void);
 int uniphier_pin_init(const char *pinconfig_name);
 
-#undef pr_warn
-#define pr_warn(fmt, args...)	printf(fmt, ##args)
-#undef pr_err
-#define pr_err(fmt, args...)	printf(fmt, ##args)
-
 #endif /* __MACH_INIT_H */
diff --git a/common/Kconfig b/common/Kconfig
index fec9afff24..ed8db73cff 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -243,6 +243,27 @@ config IDENT_STRING
 	help
 	  This options adds the board specific name to u-boot version.
 
+config LOGLEVEL
+	int "loglevel"
+	default 6
+	range 0 8
+	help
+	  All Messages with a loglevel smaller than the console loglevel will
+	  be compiled in. The loglevels are defined as follows:
+
+	  0 (KERN_EMERG)          system is unusable
+	  1 (KERN_ALERT)          action must be taken immediately
+	  2 (KERN_CRIT)           critical conditions
+	  3 (KERN_ERR)            error conditions
+	  4 (KERN_WARNING)        warning conditions
+	  5 (KERN_NOTICE)         normal but significant condition
+	  6 (KERN_INFO)           informational
+	  7 (KERN_DEBUG)          debug-level messages
+
+config SPL_LOGLEVEL
+	int
+	default LOGLEVEL
+
 config SILENT_CONSOLE
 	bool "Support a silent console"
 	help
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index 81654b2304..cd89c2a235 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -41,3 +41,4 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_LOGLEVEL=4
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 1ffe861809..49315d0638 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -6,6 +6,7 @@ CONFIG_TARGET_COLIBRI_VF=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,IMX_NAND"
 CONFIG_BOOTDELAY=1
+CONFIG_LOGLEVEL=3
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_ARCH_MISC_INIT=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 705e001457..059cb5992e 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
+CONFIG_LOGLEVEL=4
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index c95134bcf9..3e9eb4fa84 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=4
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index b2a0e04d36..f31af1c3fe 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_OPENRD=y
 CONFIG_IDENT_STRING="\nOpenRD-Base"
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index 8b1d35edd1..bee818b82c 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_OPENRD=y
 CONFIG_IDENT_STRING="\nOpenRD-Client"
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index 4cc0205629..e9462e59b2 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_OPENRD=y
 CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 71a382a3e1..5b7fc8ae14 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=4
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 948ea73edb..3c277be682 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_VF610=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index 10cdf0646c..1cd22b1b8b 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_VF610=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg"
 CONFIG_BOOTDELAY=3
+CONFIG_LOGLEVEL=3
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/drivers/bios_emulator/include/x86emu/x86emui.h b/drivers/bios_emulator/include/x86emu/x86emui.h
index a74957d992..3537255539 100644
--- a/drivers/bios_emulator/include/x86emu/x86emui.h
+++ b/drivers/bios_emulator/include/x86emu/x86emui.h
@@ -72,9 +72,6 @@
 #include <string.h>
 #endif
 
-#define printk printf
-
-
 /*--------------------------- Inline Functions ----------------------------*/
 
 #ifdef  __cplusplus
diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h
index 9e944a31be..64db4ecc3c 100644
--- a/drivers/usb/dwc3/linux-compat.h
+++ b/drivers/usb/dwc3/linux-compat.h
@@ -12,7 +12,6 @@
 #ifndef __DWC3_LINUX_COMPAT__
 #define __DWC3_LINUX_COMPAT__
 
-#define pr_debug(format)                debug(format)
 #define WARN(val, format, arg...)	debug(format, ##arg)
 #define dev_WARN(dev, format, arg...)	debug(format, ##arg)
 #define WARN_ON_ONCE(val)		debug("Error %d\n", val)
diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h
index 4dae83ed68..7bb53d2b19 100644
--- a/drivers/usb/musb-new/linux-compat.h
+++ b/drivers/usb/musb-new/linux-compat.h
@@ -5,8 +5,6 @@
 #include <linux/list.h>
 #include <linux/compat.h>
 
-#define pr_debug(fmt, args...) debug(fmt, ##args)
-
 #define WARN(condition, fmt, args...) ({	\
 	int ret_warn = !!condition;		\
 	if (ret_warn)				\
diff --git a/include/common.h b/include/common.h
index af31a28469..9719b55c68 100644
--- a/include/common.h
+++ b/include/common.h
@@ -25,6 +25,7 @@ typedef volatile unsigned char	vu_char;
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/types.h>
+#include <linux/printk.h>
 #include <linux/string.h>
 #include <linux/stringify.h>
 #include <asm/ptrace.h>
@@ -55,11 +56,6 @@ typedef volatile unsigned char	vu_char;
 #define _SPL_BUILD	0
 #endif
 
-/* Define this at the top of a file to add a prefix to debug messages */
-#ifndef pr_fmt
-#define pr_fmt(fmt) fmt
-#endif
-
 /*
  * Output a debug text when condition "cond" is met. The "cond" should be
  * computed by a preprocessor in the best case, allowing for the best
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 2336b56cf5..bc027adcb9 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -25,17 +25,6 @@ extern struct p_current *current;
 	printf(fmt, ##args)
 #define dev_warn(dev, fmt, args...)		\
 	printf(fmt, ##args)
-#define printk	printf
-#define printk_once	printf
-
-#define KERN_EMERG
-#define KERN_ALERT
-#define KERN_CRIT
-#define KERN_ERR
-#define KERN_WARNING
-#define KERN_NOTICE
-#define KERN_INFO
-#define KERN_DEBUG
 
 #define GFP_ATOMIC ((gfp_t) 0)
 #define GFP_KERNEL ((gfp_t) 0)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 1fd17c303a..3e1694b3a5 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -452,28 +452,20 @@ static inline void mtd_erase_callback(struct erase_info *instr)
 #define MTD_DEBUG_LEVEL3	(3)	/* Noisy   */
 
 #ifdef CONFIG_MTD_DEBUG
-#define pr_debug(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
 #define MTDDEBUG(n, args...)				\
 	do {						\
 		if (n <= CONFIG_MTD_DEBUG_VERBOSE)	\
 			printk(KERN_INFO args);		\
 	} while(0)
 #else /* CONFIG_MTD_DEBUG */
-#define pr_debug(args...)
 #define MTDDEBUG(n, args...)				\
 	do {						\
 		if (0)					\
 			printk(KERN_INFO args);		\
 	} while(0)
 #endif /* CONFIG_MTD_DEBUG */
-#define pr_info(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_warn(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_err(args...)		MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_crit(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_cont(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
-#define pr_notice(args...)	MTDDEBUG(MTD_DEBUG_LEVEL0, args)
 #endif
- 
+
 static inline int mtd_is_bitflip(int err) {
 	return err == -EUCLEAN;
 }
diff --git a/include/linux/printk.h b/include/linux/printk.h
new file mode 100644
index 0000000000..088513ad29
--- /dev/null
+++ b/include/linux/printk.h
@@ -0,0 +1,79 @@
+#ifndef __KERNEL_PRINTK__
+#define __KERNEL_PRINTK__
+
+#include <stdio.h>
+#include <linux/compiler.h>
+
+#define KERN_EMERG
+#define KERN_ALERT
+#define KERN_CRIT
+#define KERN_ERR
+#define KERN_WARNING
+#define KERN_NOTICE
+#define KERN_INFO
+#define KERN_DEBUG
+#define KERN_CONT
+
+#define printk(fmt, ...) \
+	printf(fmt, ##__VA_ARGS__)
+
+/*
+ * Dummy printk for disabled debugging statements to use whilst maintaining
+ * gcc's format checking.
+ */
+#define no_printk(fmt, ...)				\
+({							\
+	if (0)						\
+		printk(fmt, ##__VA_ARGS__);		\
+	0;						\
+})
+
+#define __printk(level, fmt, ...)					\
+({									\
+	level < CONFIG_LOGLEVEL ? printk(fmt, ##__VA_ARGS__) : 0;	\
+})
+
+#ifndef pr_fmt
+#define pr_fmt(fmt) fmt
+#endif
+
+#define pr_emerg(fmt, ...) \
+	__printk(0, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_alert(fmt, ...) \
+	__printk(1, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_crit(fmt, ...) \
+	__printk(2, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_err(fmt, ...) \
+	__printk(3, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_warning(fmt, ...) \
+	__printk(4, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_warn pr_warning
+#define pr_notice(fmt, ...) \
+	__printk(5, pr_fmt(fmt), ##__VA_ARGS__)
+#define pr_info(fmt, ...) \
+	__printk(6, pr_fmt(fmt), ##__VA_ARGS__)
+
+#define pr_cont(fmt, ...) \
+	printk(fmt, ##__VA_ARGS__)
+
+/* pr_devel() should produce zero code unless DEBUG is defined */
+#ifdef DEBUG
+#define pr_devel(fmt, ...) \
+	__printk(7, pr_fmt(fmt), ##__VA_ARGS__)
+#else
+#define pr_devel(fmt, ...) \
+	no_printk(pr_fmt(fmt), ##__VA_ARGS__)
+#endif
+
+#ifdef DEBUG
+#define pr_debug(fmt, ...) \
+	__printk(7, pr_fmt(fmt), ##__VA_ARGS__)
+#else
+#define pr_debug(fmt, ...) \
+	no_printk(pr_fmt(fmt), ##__VA_ARGS__)
+#endif
+
+#define printk_once(fmt, ...) \
+	printk(fmt, ##__VA_ARGS__)
+
+#endif

commit 50f8c1b1d6befc71c1530e0967d9cd1e9a268552
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Sep 16 14:10:39 2017 +0900

    UPSTREAM: stdio.h: move printf() stuff from <common.h> to <stdio.h>
    
    <common.h> pulls in a lot of headers.  Including it from every .c
    file is a bad idea.  We need to remove contents until it contains
    nothing.
    
    Move printf() and friends to <stdio.h>.
    
    Change-Id: I7f64296fe6e08bf695e9e274ab0f21e72e36ec48
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7fea7b1a37ad2b1c1e92bd87f7c6a1877d70e579)

diff --git a/include/common.h b/include/common.h
index 017268929f..af31a28469 100644
--- a/include/common.h
+++ b/include/common.h
@@ -29,6 +29,7 @@ typedef volatile unsigned char	vu_char;
 #include <linux/stringify.h>
 #include <asm/ptrace.h>
 #include <stdarg.h>
+#include <stdio.h>
 #include <linux/kernel.h>
 
 #include <part.h>
@@ -719,46 +720,6 @@ unsigned int rand_r(unsigned int *seedp);
 /* serial stuff */
 int	serial_printf (const char *fmt, ...)
 		__attribute__ ((format (__printf__, 1, 2)));
-/* stdin */
-int	getc(void);
-int	tstc(void);
-
-/* stdout */
-#if !defined(CONFIG_SPL_BUILD) || \
-	(defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \
-	(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \
-		defined(CONFIG_SPL_SERIAL_SUPPORT))
-void	putc(const char c);
-void	puts(const char *s);
-int	printf(const char *fmt, ...)
-		__attribute__ ((format (__printf__, 1, 2)));
-int	vprintf(const char *fmt, va_list args);
-#else
-#define	putc(...) do { } while (0)
-#define puts(...) do { } while (0)
-#define printf(...) do { } while (0)
-#define vprintf(...) do { } while (0)
-#endif
-
-/* stderr */
-#define eputc(c)		fputc(stderr, c)
-#define eputs(s)		fputs(stderr, s)
-#define eprintf(fmt,args...)	fprintf(stderr,fmt ,##args)
-
-/*
- * FILE based functions (can only be used AFTER relocation!)
- */
-#define stdin		0
-#define stdout		1
-#define stderr		2
-#define MAX_FILES	3
-
-int	fprintf(int file, const char *fmt, ...)
-		__attribute__ ((format (__printf__, 2, 3)));
-void	fputs(int file, const char *s);
-void	fputc(int file, const char c);
-int	ftstc(int file);
-int	fgetc(int file);
 
 /* lib/gzip.c */
 int gzip(void *dst, unsigned long *lenp,
diff --git a/include/stdio.h b/include/stdio.h
new file mode 100644
index 0000000000..aedf374452
--- /dev/null
+++ b/include/stdio.h
@@ -0,0 +1,59 @@
+#ifndef __STDIO_H
+#define __STDIO_H
+
+#include <stdarg.h>
+#include <linux/compiler.h>
+
+/* stdin */
+int getc(void);
+int tstc(void);
+
+/* stdout */
+#if !defined(CONFIG_SPL_BUILD) || \
+	(defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_SERIAL_SUPPORT)) || \
+	(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) && \
+		defined(CONFIG_SPL_SERIAL_SUPPORT))
+void putc(const char c);
+void puts(const char *s);
+int __printf(1, 2) printf(const char *fmt, ...);
+int vprintf(const char *fmt, va_list args);
+#else
+static inline void putc(const char c)
+{
+}
+
+static inline void puts(const char *s)
+{
+}
+
+static inline int __printf(1, 2) printf(const char *fmt, ...)
+{
+	return 0;
+}
+
+static inline int vprintf(const char *fmt, va_list args)
+{
+	return 0;
+}
+#endif
+
+/*
+ * FILE based functions (can only be used AFTER relocation!)
+ */
+#define stdin		0
+#define stdout		1
+#define stderr		2
+#define MAX_FILES	3
+
+/* stderr */
+#define eputc(c)		fputc(stderr, c)
+#define eputs(s)		fputs(stderr, s)
+#define eprintf(fmt, args...)	fprintf(stderr, fmt, ##args)
+
+int __printf(2, 3) fprintf(int file, const char *fmt, ...);
+void fputs(int file, const char *s);
+void fputc(int file, const char c);
+int ftstc(int file);
+int fgetc(int file);
+
+#endif /* __STDIO_H */

commit 14464b32f69185c9e884f0fbe96a03a7504bd70d
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Thu Aug 24 11:52:32 2017 +0200

    UPSTREAM: cmd: Move CONFIG_RANDOM_UUID to Kconfig
    
    CONFIG_RANDOM_UUID is used by the GPT command to generate random UUID when
    none are provided.
    
    Move that option to Kconfig.
    
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Change-Id: Ie4c840fb583d1e5c95170e452ccbb04034926119
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 47738acceda5bae52b7c33ce912da6b52244c033)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index b8df092e79..ef9bc920ac 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -663,10 +663,17 @@ config CMD_GPT
 	bool "GPT (GUID Partition Table) command"
 	select PARTITION_UUIDS
 	select EFI_PARTITION
+	imply RANDOM_UUID
 	help
 	  Enable the 'gpt' command to ready and write GPT style partition
 	  tables.
 
+config RANDOM_UUID
+	bool "GPT Random UUID generation"
+	help
+	  Enable the generation of partitions with random UUIDs if none
+	  are provided.
+
 config CMD_GPT_RENAME
 	bool "GPT partition renaming commands"
 	depends on CMD_GPT
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index c7ef594071..72b08c544e 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -13,6 +13,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
+CONFIG_RANDOM_UUID=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index cd7b36b5a7..1534754cf3 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -15,6 +15,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_CMD_IMLS is not set
+CONFIG_RANDOM_UUID=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index 0c70c53050..62b28209c6 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -72,7 +72,6 @@
 #include <configs/ti_omap5_common.h>
 
 /* Enhance our eMMC support / experience. */
-#define CONFIG_RANDOM_UUID
 #define CONFIG_HSMMC2_8BIT
 
 /* CPSW Ethernet */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 6c0fc35d3a..f618fa7260 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -91,7 +91,6 @@
 #include <configs/ti_omap5_common.h>
 
 /* Enhance our eMMC support / experience. */
-#define CONFIG_RANDOM_UUID
 #define CONFIG_HSMMC2_8BIT
 
 /* CPSW Ethernet */
diff --git a/include/configs/edison.h b/include/configs/edison.h
index d25b50c076..e26a4c7a39 100644
--- a/include/configs/edison.h
+++ b/include/configs/edison.h
@@ -13,7 +13,6 @@
 #define CONFIG_BOOTCOMMAND "run bootcmd"
 
 /* DISK Partition support */
-#define CONFIG_RANDOM_UUID
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 2afb19f84a..22e9c82497 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -174,7 +174,6 @@
 	"fdtaddr=40800000\0"
 
 /* GPT */
-#define CONFIG_RANDOM_UUID
 
 /* Security subsystem - enable hw_rand() */
 #define CONFIG_EXYNOS_ACE_SHA
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 62d04f0d09..5eac4446f5 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -27,8 +27,6 @@
 	func(DHCP, dchp, na)
 #endif
 
-#define CONFIG_RANDOM_UUID
-
 #ifdef CONFIG_ARM64
 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
 #else
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5d0a3240a6..5b33a3b18e 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -168,7 +168,6 @@
 #define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
 
 /* GPT */
-#define CONFIG_RANDOM_UUID
 
 /* Security subsystem - enable hw_rand() */
 #define CONFIG_EXYNOS_ACE_SHA
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 7f6a61a1db..95c011f9a9 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -150,7 +150,6 @@
 	"fdtaddr=40800000\0" \
 
 /* GPT */
-#define CONFIG_RANDOM_UUID
 
 /* Security subsystem - enable hw_rand() */
 #define CONFIG_EXYNOS_ACE_SHA
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 490dc446d6..189ceca821 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -59,7 +59,6 @@
 #define CONFIG_SYS_MMC_CLK_OD		500000
 
 /* For generating MMC partitions */
-#define CONFIG_RANDOM_UUID
 
 #endif
 
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 6025706964..1399dfd436 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -103,7 +103,6 @@
 		DFU_ALT_INFO_RAM
 
 #ifndef CONFIG_SPL_BUILD
-# define CONFIG_RANDOM_UUID
 # define PARTS_DEFAULT \
 	"partitions=uuid_disk=${uuid_gpt_disk};" \
 	"name=""boot"",size=16M,uuid=${uuid_gpt_boot};" \
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 46cd9299dd..c5c7c598c5 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1852,7 +1852,6 @@ CONFIG_RAMDISK_ADDR
 CONFIG_RAMDISK_BOOT
 CONFIG_RAM_BOOT
 CONFIG_RAM_BOOT_PHYS
-CONFIG_RANDOM_UUID
 CONFIG_RCAR_BOARD_STRING
 CONFIG_RD_LVL
 CONFIG_REALMODE_DEBUG

commit a55428f790bf091332084aaa5c7a0d195063002d
Author: Maxime Ripard <maxime.ripard@free-electrons.com>
Date:   Mon Oct 2 15:25:56 2017 +0200

    UPSTREAM: sandbox: Expand list of IO accessors
    
    The setbits/clrbits/clrsetbits macros are used widely across the tree,
    let's provide implementation for them in the sandbox.
    
    Change-Id: Idb421bde7a225c38760da09f179b68a11116802b
    Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a4dd8722fab257ff23cd63483b2926a4e197be96)

diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index a6856356df..3ece70d09d 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -56,6 +56,53 @@ void outl(unsigned int value, unsigned int addr);
 void outw(unsigned int value, unsigned int addr);
 void outb(unsigned int value, unsigned int addr);
 
+#define out_arch(type,endian,a,v)	write##type(cpu_to_##endian(v),a)
+#define in_arch(type,endian,a)		endian##_to_cpu(read##type(a))
+
+#define out_le32(a,v)	out_arch(l,le32,a,v)
+#define out_le16(a,v)	out_arch(w,le16,a,v)
+
+#define in_le32(a)	in_arch(l,le32,a)
+#define in_le16(a)	in_arch(w,le16,a)
+
+#define out_be32(a,v)	out_arch(l,be32,a,v)
+#define out_be16(a,v)	out_arch(w,be16,a,v)
+
+#define in_be32(a)	in_arch(l,be32,a)
+#define in_be16(a)	in_arch(w,be16,a)
+
+#define out_8(a,v)	writeb(v,a)
+#define in_8(a)		readb(a)
+
+#define clrbits(type, addr, clear) \
+	out_##type((addr), in_##type(addr) & ~(clear))
+
+#define setbits(type, addr, set) \
+	out_##type((addr), in_##type(addr) | (set))
+
+#define clrsetbits(type, addr, clear, set) \
+	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_be32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
+#define setbits_le32(addr, set) setbits(le32, addr, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_be16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
+#define setbits_le16(addr, set) setbits(le16, addr, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+
+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
+#define setbits_8(addr, set) setbits(8, addr, set)
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
 static inline void _insw(volatile u16 *port, void *buf, int ns)
 {
 }

commit 7350191d828385ff2b937ac67d5c830f7f8011fc
Author: Paul Burton <paul.burton@imgtec.com>
Date:   Thu Sep 14 15:05:03 2017 -0700

    UPSTREAM: arm: Use asm-generic/io.h
    
    Convert the arm architecture to make use of the new asm-generic/io.h to
    provide address mapping functions. As the generic implementations are
    suitable for arm this is primarily a matter of removing code.
    
    This has only been build-tested, feedback from architecture maintainers
    is welcome.
    
    Change-Id: I26ff51026961b89fc1dbd282c9b3d8c3cf9b4119
    Signed-off-by: Paul Burton <paul.burton@imgtec.com>
    Cc: Albert Aribaud <albert.u.boot@aribaud.net>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8f8e6304df54b36d5971a69ff3de0f6f9ad4bf4e)

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 5834f5b3dc..5df74728de 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -34,35 +34,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE	(0)
-#define MAP_WRCOMBINE	(0)
-#define MAP_WRBACK	(0)
-#define MAP_WRTHROUGH	(0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-	return (void *)((unsigned long)paddr);
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-	return (phys_addr_t)((unsigned long)vaddr);
-}
-
 /*
  * Generic virtual read/write.  Note that we don't support half-word
  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
@@ -426,6 +397,7 @@ out:
 #endif	/* __mem_isa */
 #endif	/* __KERNEL__ */
 
+#include <asm-generic/io.h>
 #include <iotrace.h>
 
 #endif	/* __ASM_ARM_IO_H */

commit f35264bc648ac8bfbbaa780a977ae5dc11f53296
Author: Paul Burton <paul.burton@imgtec.com>
Date:   Thu Sep 14 15:05:01 2017 -0700

    UPSTREAM: Provide a generic io.h & address mapping functions
    
    Most architectures currently supported by U-Boot use trivial
    implementations of map_to_physmem & virt_to_phys which simply cast a
    physical address to a pointer for use a virtual address & vice-versa.
    This results in a lot of duplicate implementations of these mapping
    functions.
    
    The set of functions provided by different architectures also differs,
    with some having implementations of phys_to_virt & others not. A later
    patch will make use of phys_to_virt in architecture-neutral code, and so
    requires that it be provided for all architectures.
    
    This patch introduces an asm-generic/io.h which provides generic
    implementations of address mapping functions, allowing the duplication
    of them between architectures to be removed. Once architectures are
    converted to make use of this generic header it will also ensure that
    all of phys_to_virt, virt_to_phys, map_physmem & unmap_physmem are
    provided. The 2 families of functions differ in that map_physmem may
    create dynamic mappings whilst phys_to_virt may not & therefore is more
    limited in scope but doesn't require information such as a length &
    flags.
    
    This patch doesn't convert any architectures to make use of this generic
    header - later patches in the series will do so.
    
    Change-Id: I29d206b92b9ebcdd10e6599539bfd195d247c5f8
    Signed-off-by: Paul Burton <paul.burton@imgtec.com>
    Cc: Albert Aribaud <albert.u.boot@aribaud.net>
    Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
    Cc: Angelo Dureghello <angelo@sysam.it>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Cc: Macpaul Lin <macpaul@andestech.com>
    Cc: Michal Simek <monstr@monstr.eu>
    Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
    Cc: Thomas Chou <thomas@wytron.com.tw>
    Cc: Wolfgang Denk <wd@denx.de>
    Acked-by: Angelo Dureghello <angelo@sysam.it>
    Tested-by: Angelo Dureghello <angelo@sysam.it>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d4150ca6dea5f81f527fb2a01fcffc3d8dd09fc4)

diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
new file mode 100644
index 0000000000..0f5160c6f1
--- /dev/null
+++ b/include/asm-generic/io.h
@@ -0,0 +1,110 @@
+/*
+ * Generic I/O functions.
+ *
+ * Copyright (c) 2016 Imagination Technologies Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ASM_GENERIC_IO_H__
+#define __ASM_GENERIC_IO_H__
+
+/*
+ * This file should be included at the end of each architecture-specific
+ * asm/io.h such that we may provide generic implementations without
+ * conflicting with architecture-specific code.
+ */
+
+#ifndef __ASSEMBLY__
+
+/**
+ * phys_to_virt() - Return a virtual address mapped to a given physical address
+ * @paddr: the physical address
+ *
+ * Returns a virtual address which the CPU can access that maps to the physical
+ * address @paddr. This should only be used where it is known that no dynamic
+ * mapping is required. In general, map_physmem should be used instead.
+ *
+ * Returns: a virtual address which maps to @paddr
+ */
+#ifndef phys_to_virt
+static inline void *phys_to_virt(phys_addr_t paddr)
+{
+	return (void *)(unsigned long)paddr;
+}
+#endif
+
+/**
+ * virt_to_phys() - Return the physical address that a virtual address maps to
+ * @vaddr: the virtual address
+ *
+ * Returns the physical address which the CPU-accessible virtual address @vaddr
+ * maps to.
+ *
+ * Returns: the physical address which @vaddr maps to
+ */
+#ifndef virt_to_phys
+static inline phys_addr_t virt_to_phys(void *vaddr)
+{
+	return (phys_addr_t)((unsigned long)vaddr);
+}
+#endif
+
+/*
+ * Flags for use with map_physmem() & unmap_physmem(). Architectures need not
+ * support all of these, in which case they will be defined as zero here &
+ * ignored. Callers that may run on multiple architectures should therefore
+ * treat them as hints rather than requirements.
+ */
+#ifndef MAP_NOCACHE
+# define MAP_NOCACHE	0	/* Produce an uncached mapping */
+#endif
+#ifndef MAP_WRCOMBINE
+# define MAP_WRCOMBINE	0	/* Allow write-combining on the mapping */
+#endif
+#ifndef MAP_WRBACK
+# define MAP_WRBACK	0	/* Map using write-back caching */
+#endif
+#ifndef MAP_WRTHROUGH
+# define MAP_WRTHROUGH	0	/* Map using write-through caching */
+#endif
+
+/**
+ * map_physmem() - Return a virtual address mapped to a given physical address
+ * @paddr: the physical address
+ * @len: the length of the required mapping
+ * @flags: flags affecting the type of mapping
+ *
+ * Return a virtual address through which the CPU may access the memory at
+ * physical address @paddr. The mapping will be valid for at least @len bytes,
+ * and may be affected by flags passed to the @flags argument. This function
+ * may create new mappings, so should generally be paired with a matching call
+ * to unmap_physmem once the caller is finished with the memory in question.
+ *
+ * Returns: a virtual address suitably mapped to @paddr
+ */
+#ifndef map_physmem
+static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
+				unsigned long flags)
+{
+	return phys_to_virt(paddr);
+}
+#endif
+
+/**
+ * unmap_physmem() - Remove mappings created by a prior call to map_physmem()
+ * @vaddr: the virtual address which map_physmem() previously returned
+ * @flags: flags matching those originally passed to map_physmem()
+ *
+ * Unmap memory which was previously mapped by a call to map_physmem(). If
+ * map_physmem() dynamically created a mapping for the memory in question then
+ * unmap_physmem() will remove that mapping.
+ */
+#ifndef unmap_physmem
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+}
+#endif
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __ASM_GENERIC_IO_H__ */

commit be129a1092fea3b8abbefad492939a4200d50ec2
Author: Marek Behún <marek.behun@nic.cz>
Date:   Sun Sep 3 17:00:25 2017 +0200

    UPSTREAM: include: Add a variadic macro to call a callback for all arguments
    
    Add a header variadic-macro.h which defines the CALL_MACRO_FOR_EACH marco.
    
    This macro can be used as follows:
      #define TEST(x)
      CALL_MACRO_FOR_EACH(TEST, a, b, c, d)
    
    This will expand to
      TEST(a) TEST(b) TEST(c) TEST(d)
    
    The nice thing is that CALL_MACRO_FOR_EACH is a variadic macro, thus the
    number of arguments can vary (although it has an upper limit - in this
    implementation 32 arguments).
    
    Change-Id: Ic186ed444a78a86a4cfa10f9ca1198c0bfa9af10
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 59981e6a3d6074bf5413c1875a95325a4b8c01ca)

diff --git a/include/u-boot/variadic-macro.h b/include/u-boot/variadic-macro.h
new file mode 100644
index 0000000000..922beafcea
--- /dev/null
+++ b/include/u-boot/variadic-macro.h
@@ -0,0 +1,59 @@
+/*
+ * Helper for work with variadic macros
+ *
+ * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __VARIADIC_MACRO_H__
+#define __VARIADIC_MACRO_H__
+
+#define _VM_GET_NTH_ARG(_1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, \
+	_14, _15, _16, _17, _18, _19, _20, _21, _22, _23, _24, _25, _26, _27, \
+	_28, _29, _30, _31, _32, N, ...) N
+
+#define _VM_HELP_0(_call, ...)
+#define _VM_HELP_1(_call, x, ...) _call(x)
+#define _VM_HELP_2(_call, x, ...) _call(x) _VM_HELP_1(_call, __VA_ARGS__)
+#define _VM_HELP_3(_call, x, ...) _call(x) _VM_HELP_2(_call, __VA_ARGS__)
+#define _VM_HELP_4(_call, x, ...) _call(x) _VM_HELP_3(_call, __VA_ARGS__)
+#define _VM_HELP_5(_call, x, ...) _call(x) _VM_HELP_4(_call, __VA_ARGS__)
+#define _VM_HELP_6(_call, x, ...) _call(x) _VM_HELP_5(_call, __VA_ARGS__)
+#define _VM_HELP_7(_call, x, ...) _call(x) _VM_HELP_6(_call, __VA_ARGS__)
+#define _VM_HELP_8(_call, x, ...) _call(x) _VM_HELP_7(_call, __VA_ARGS__)
+#define _VM_HELP_9(_call, x, ...) _call(x) _VM_HELP_8(_call, __VA_ARGS__)
+#define _VM_HELP_10(_call, x, ...) _call(x) _VM_HELP_9(_call, __VA_ARGS__)
+#define _VM_HELP_11(_call, x, ...) _call(x) _VM_HELP_10(_call, __VA_ARGS__)
+#define _VM_HELP_12(_call, x, ...) _call(x) _VM_HELP_11(_call, __VA_ARGS__)
+#define _VM_HELP_13(_call, x, ...) _call(x) _VM_HELP_12(_call, __VA_ARGS__)
+#define _VM_HELP_14(_call, x, ...) _call(x) _VM_HELP_13(_call, __VA_ARGS__)
+#define _VM_HELP_15(_call, x, ...) _call(x) _VM_HELP_14(_call, __VA_ARGS__)
+#define _VM_HELP_16(_call, x, ...) _call(x) _VM_HELP_15(_call, __VA_ARGS__)
+#define _VM_HELP_17(_call, x, ...) _call(x) _VM_HELP_16(_call, __VA_ARGS__)
+#define _VM_HELP_18(_call, x, ...) _call(x) _VM_HELP_17(_call, __VA_ARGS__)
+#define _VM_HELP_19(_call, x, ...) _call(x) _VM_HELP_18(_call, __VA_ARGS__)
+#define _VM_HELP_20(_call, x, ...) _call(x) _VM_HELP_19(_call, __VA_ARGS__)
+#define _VM_HELP_21(_call, x, ...) _call(x) _VM_HELP_20(_call, __VA_ARGS__)
+#define _VM_HELP_22(_call, x, ...) _call(x) _VM_HELP_21(_call, __VA_ARGS__)
+#define _VM_HELP_23(_call, x, ...) _call(x) _VM_HELP_22(_call, __VA_ARGS__)
+#define _VM_HELP_24(_call, x, ...) _call(x) _VM_HELP_23(_call, __VA_ARGS__)
+#define _VM_HELP_25(_call, x, ...) _call(x) _VM_HELP_24(_call, __VA_ARGS__)
+#define _VM_HELP_26(_call, x, ...) _call(x) _VM_HELP_25(_call, __VA_ARGS__)
+#define _VM_HELP_27(_call, x, ...) _call(x) _VM_HELP_26(_call, __VA_ARGS__)
+#define _VM_HELP_28(_call, x, ...) _call(x) _VM_HELP_27(_call, __VA_ARGS__)
+#define _VM_HELP_29(_call, x, ...) _call(x) _VM_HELP_28(_call, __VA_ARGS__)
+#define _VM_HELP_30(_call, x, ...) _call(x) _VM_HELP_29(_call, __VA_ARGS__)
+#define _VM_HELP_31(_call, x, ...) _call(x) _VM_HELP_30(_call, __VA_ARGS__)
+
+#define CALL_MACRO_FOR_EACH(x, ...)					 \
+	_VM_GET_NTH_ARG("", ##__VA_ARGS__, _VM_HELP_31, _VM_HELP_30,	 \
+	_VM_HELP_29, _VM_HELP_28, _VM_HELP_27, _VM_HELP_26, _VM_HELP_25, \
+	_VM_HELP_24, _VM_HELP_23, _VM_HELP_22, _VM_HELP_21, _VM_HELP_20, \
+	_VM_HELP_19, _VM_HELP_18, _VM_HELP_17, _VM_HELP_16, _VM_HELP_15, \
+	_VM_HELP_14, _VM_HELP_13, _VM_HELP_12, _VM_HELP_11, _VM_HELP_10, \
+	_VM_HELP_9, _VM_HELP_8, _VM_HELP_7, _VM_HELP_6, _VM_HELP_5,	 \
+	_VM_HELP_4, _VM_HELP_3, _VM_HELP_2, _VM_HELP_1,			 \
+	_VM_HELP_0)(x, __VA_ARGS__)
+
+#endif /* __VARIADIC_MACRO_H__ */

commit 9f816917d25e3273a1075258e0cb610d1ccc399e
Author: Marek Behún <marek.behun@nic.cz>
Date:   Sun Sep 3 17:00:24 2017 +0200

    UPSTREAM: fs: Create a common fs_devread for ext4/reiserfs/zfs
    
    The ext4, reiserfs and zfs filesystems all have their own implementation
    of the same function, *_devread. Generalize this function into fs_devread
    and put the code into fs/fs_internal.c.
    
    Change-Id: Ib558f0f40ba1520f4974ca5cbd31265573b156c9
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    [trini: Move fs/fs_internal.o hunk to the end of fs/Makefile as all
    cases need it]
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5994e8b6432d1c6df1cad44771f02054dba893ff)

diff --git a/fs/Makefile b/fs/Makefile
index 5770f41c0b..b53c9d7cca 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_CMD_UBIFS) += ubifs/
 obj-$(CONFIG_YAFFS2) += yaffs2/
 obj-$(CONFIG_CMD_ZFS) += zfs/
 endif
+obj-y += fs_internal.o
diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c
index ae2ba6a901..f04fa08f64 100644
--- a/fs/ext4/dev.c
+++ b/fs/ext4/dev.c
@@ -26,7 +26,7 @@
 #include <common.h>
 #include <blk.h>
 #include <config.h>
-#include <memalign.h>
+#include <fs_internal.h>
 #include <ext4fs.h>
 #include <ext_common.h>
 #include "ext4_common.h"
@@ -47,85 +47,11 @@ void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
 		get_fs()->dev_desc->log2blksz;
 }
 
-int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf)
+int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len,
+		   char *buffer)
 {
-	unsigned block_len;
-	int log2blksz = ext4fs_blk_desc->log2blksz;
-	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (ext4fs_blk_desc ?
-						 ext4fs_blk_desc->blksz :
-						 0));
-	if (ext4fs_blk_desc == NULL) {
-		printf("** Invalid Block Device Descriptor (NULL)\n");
-		return 0;
-	}
-
-	/* Check partition boundaries */
-	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
-	    >= part_info->size) {
-		printf("%s read outside partition " LBAFU "\n", __func__,
-		       sector);
-		return 0;
-	}
-
-	/* Get the read to the beginning of a partition */
-	sector += byte_offset >> log2blksz;
-	byte_offset &= ext4fs_blk_desc->blksz - 1;
-
-	debug(" <" LBAFU ", %d, %d>\n", sector, byte_offset, byte_len);
-
-	if (byte_offset != 0) {
-		int readlen;
-		/* read first part which isn't aligned with start of sector */
-		if (blk_dread(ext4fs_blk_desc, part_info->start + sector, 1,
-			      (void *)sec_buf) != 1) {
-			printf(" ** ext2fs_devread() read error **\n");
-			return 0;
-		}
-		readlen = min((int)ext4fs_blk_desc->blksz - byte_offset,
-			      byte_len);
-		memcpy(buf, sec_buf + byte_offset, readlen);
-		buf += readlen;
-		byte_len -= readlen;
-		sector++;
-	}
-
-	if (byte_len == 0)
-		return 1;
-
-	/* read sector aligned part */
-	block_len = byte_len & ~(ext4fs_blk_desc->blksz - 1);
-
-	if (block_len == 0) {
-		ALLOC_CACHE_ALIGN_BUFFER(u8, p, ext4fs_blk_desc->blksz);
-
-		block_len = ext4fs_blk_desc->blksz;
-		blk_dread(ext4fs_blk_desc, part_info->start + sector, 1,
-			  (void *)p);
-		memcpy(buf, p, byte_len);
-		return 1;
-	}
-
-	if (blk_dread(ext4fs_blk_desc, part_info->start + sector,
-		      block_len >> log2blksz, (void *)buf) !=
-			block_len >> log2blksz) {
-		printf(" ** %s read error - block\n", __func__);
-		return 0;
-	}
-	block_len = byte_len & ~(ext4fs_blk_desc->blksz - 1);
-	buf += block_len;
-	byte_len -= block_len;
-	sector += block_len / ext4fs_blk_desc->blksz;
-
-	if (byte_len != 0) {
-		/* read rest of data which are not in whole sector */
-		if (blk_dread(ext4fs_blk_desc, part_info->start + sector, 1,
-			      (void *)sec_buf) != 1) {
-			printf("* %s read error - last part\n", __func__);
-			return 0;
-		}
-		memcpy(buf, sec_buf, byte_len);
-	}
-	return 1;
+	return fs_devread(get_fs()->dev_desc, part_info, sector, byte_offset,
+			  byte_len, buffer);
 }
 
 int ext4_read_superblock(char *buffer)
diff --git a/fs/fs_internal.c b/fs/fs_internal.c
new file mode 100644
index 0000000000..58b441030c
--- /dev/null
+++ b/fs/fs_internal.c
@@ -0,0 +1,92 @@
+/*
+ * 2017 by Marek Behun <marek.behun@nic.cz>
+ *
+ * Derived from code in ext4/dev.c, which was based on reiserfs/dev.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <compiler.h>
+#include <part.h>
+#include <memalign.h>
+
+int fs_devread(struct blk_desc *blk, disk_partition_t *partition,
+	       lbaint_t sector, int byte_offset, int byte_len, char *buf)
+{
+	unsigned block_len;
+	int log2blksz = blk->log2blksz;
+	ALLOC_CACHE_ALIGN_BUFFER(char, sec_buf, (blk ? blk->blksz : 0));
+	if (blk == NULL) {
+		printf("** Invalid Block Device Descriptor (NULL)\n");
+		return 0;
+	}
+
+	/* Check partition boundaries */
+	if ((sector + ((byte_offset + byte_len - 1) >> log2blksz))
+	    >= partition->size) {
+		printf("%s read outside partition " LBAFU "\n", __func__,
+		       sector);
+		return 0;
+	}
+
+	/* Get the read to the beginning of a partition */
+	sector += byte_offset >> log2blksz;
+	byte_offset &= blk->blksz - 1;
+
+	debug(" <" LBAFU ", %d, %d>\n", sector, byte_offset, byte_len);
+
+	if (byte_offset != 0) {
+		int readlen;
+		/* read first part which isn't aligned with start of sector */
+		if (blk_dread(blk, partition->start + sector, 1,
+			      (void *)sec_buf) != 1) {
+			printf(" ** %s read error **\n", __func__);
+			return 0;
+		}
+		readlen = min((int)blk->blksz - byte_offset,
+			      byte_len);
+		memcpy(buf, sec_buf + byte_offset, readlen);
+		buf += readlen;
+		byte_len -= readlen;
+		sector++;
+	}
+
+	if (byte_len == 0)
+		return 1;
+
+	/* read sector aligned part */
+	block_len = byte_len & ~(blk->blksz - 1);
+
+	if (block_len == 0) {
+		ALLOC_CACHE_ALIGN_BUFFER(u8, p, blk->blksz);
+
+		block_len = blk->blksz;
+		blk_dread(blk, partition->start + sector, 1,
+			  (void *)p);
+		memcpy(buf, p, byte_len);
+		return 1;
+	}
+
+	if (blk_dread(blk, partition->start + sector,
+		      block_len >> log2blksz, (void *)buf) !=
+			block_len >> log2blksz) {
+		printf(" ** %s read error - block\n", __func__);
+		return 0;
+	}
+	block_len = byte_len & ~(blk->blksz - 1);
+	buf += block_len;
+	byte_len -= block_len;
+	sector += block_len / blk->blksz;
+
+	if (byte_len != 0) {
+		/* read rest of data which are not in whole sector */
+		if (blk_dread(blk, partition->start + sector, 1,
+			      (void *)sec_buf) != 1) {
+			printf("* %s read error - last part\n", __func__);
+			return 0;
+		}
+		memcpy(buf, sec_buf, byte_len);
+	}
+	return 1;
+}
diff --git a/fs/reiserfs/dev.c b/fs/reiserfs/dev.c
index 5a1ab0a364..7b786e4ed3 100644
--- a/fs/reiserfs/dev.c
+++ b/fs/reiserfs/dev.c
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <config.h>
 #include <reiserfs.h>
-
+#include <fs_internal.h>
 #include "reiserfs_private.h"
 
 static struct blk_desc *reiserfs_blk_desc;
@@ -22,78 +22,8 @@ void reiserfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
 	part_info = info;
 }
 
-
-int reiserfs_devread (int sector, int byte_offset, int byte_len, char *buf)
+int reiserfs_devread(int sector, int byte_offset, int byte_len, char *buf)
 {
-	char sec_buf[SECTOR_SIZE];
-	unsigned block_len;
-/*
-	unsigned len = byte_len;
-	u8 *start = buf;
-*/
-	/*
-	*  Check partition boundaries
-	*/
-	if (sector < 0
-	    || ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS))
-	    >= part_info->size)) {
-/*		errnum = ERR_OUTSIDE_PART; */
-		printf (" ** reiserfs_devread() read outside partition\n");
-		return 0;
-	}
-
-	/*
-	 *  Get the read to the beginning of a partition.
-	 */
-	sector += byte_offset >> SECTOR_BITS;
-	byte_offset &= SECTOR_SIZE - 1;
-
-#if defined(DEBUG)
-	printf (" <%d, %d, %d> ", sector, byte_offset, byte_len);
-#endif
-
-
-	if (reiserfs_blk_desc == NULL)
-		return 0;
-
-
-	if (byte_offset != 0) {
-		/* read first part which isn't aligned with start of sector */
-		if (reiserfs_blk_desc->block_read(reiserfs_blk_desc,
-						  part_info->start + sector,
-						  1, (void *)sec_buf) != 1) {
-			printf (" ** reiserfs_devread() read error\n");
-			return 0;
-		}
-		memcpy(buf, sec_buf+byte_offset, min(SECTOR_SIZE-byte_offset, byte_len));
-		buf+=min(SECTOR_SIZE-byte_offset, byte_len);
-		byte_len-=min(SECTOR_SIZE-byte_offset, byte_len);
-		sector++;
-	}
-
-	/* read sector aligned part */
-	block_len = byte_len & ~(SECTOR_SIZE-1);
-	if (reiserfs_blk_desc->block_read(reiserfs_blk_desc,
-					  part_info->start + sector,
-					  block_len / SECTOR_SIZE, (void *)buf)
-			!= block_len/SECTOR_SIZE) {
-		printf (" ** reiserfs_devread() read error - block\n");
-		return 0;
-	}
-	buf+=block_len;
-	byte_len-=block_len;
-	sector+= block_len/SECTOR_SIZE;
-
-	if ( byte_len != 0 ) {
-		/* read rest of data which are not in whole sector */
-		if (reiserfs_blk_desc->block_read(reiserfs_blk_desc,
-						  part_info->start + sector,
-						  1, (void *)sec_buf) != 1) {
-			printf (" ** reiserfs_devread() read error - last part\n");
-			return 0;
-		}
-		memcpy(buf, sec_buf, byte_len);
-	}
-
-	return 1;
+	return fs_devread(reiserfs_blk_desc, part_info, sector, byte_offset,
+			  byte_len, buf);
 }
diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c
index 2f409e66cd..7dda42b48b 100644
--- a/fs/zfs/dev.c
+++ b/fs/zfs/dev.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <config.h>
+#include <fs_internal.h>
 #include <zfs_common.h>
 
 static struct blk_desc *zfs_blk_desc;
@@ -25,87 +26,6 @@ void zfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
 /* err */
 int zfs_devread(int sector, int byte_offset, int byte_len, char *buf)
 {
-	short sec_buffer[SECTOR_SIZE/sizeof(short)];
-	char *sec_buf = (char *)sec_buffer;
-	unsigned block_len;
-
-	/*
-	 *	Check partition boundaries
-	 */
-	if ((sector < 0) ||
-		((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS)) >=
-		 part_info->size)) {
-		/*		errnum = ERR_OUTSIDE_PART; */
-		printf(" ** zfs_devread() read outside partition sector %d\n", sector);
-		return 1;
-	}
-
-	/*
-	 *	Get the read to the beginning of a partition.
-	 */
-	sector += byte_offset >> SECTOR_BITS;
-	byte_offset &= SECTOR_SIZE - 1;
-
-	debug(" <%d, %d, %d>\n", sector, byte_offset, byte_len);
-
-	if (zfs_blk_desc == NULL) {
-		printf("** Invalid Block Device Descriptor (NULL)\n");
-		return 1;
-	}
-
-	if (byte_offset != 0) {
-		/* read first part which isn't aligned with start of sector */
-		if (zfs_blk_desc->block_read(zfs_blk_desc,
-					     part_info->start + sector, 1,
-					     (void *)sec_buf) != 1) {
-			printf(" ** zfs_devread() read error **\n");
-			return 1;
-		}
-		memcpy(buf, sec_buf + byte_offset,
-			   min(SECTOR_SIZE - byte_offset, byte_len));
-		buf += min(SECTOR_SIZE - byte_offset, byte_len);
-		byte_len -= min(SECTOR_SIZE - byte_offset, byte_len);
-		sector++;
-	}
-
-	if (byte_len == 0)
-		return 0;
-
-	/*	read sector aligned part */
-	block_len = byte_len & ~(SECTOR_SIZE - 1);
-
-	if (block_len == 0) {
-		u8 p[SECTOR_SIZE];
-
-		block_len = SECTOR_SIZE;
-		zfs_blk_desc->block_read(zfs_blk_desc,
-					 part_info->start + sector,
-					 1, (void *)p);
-		memcpy(buf, p, byte_len);
-		return 0;
-	}
-
-	if (zfs_blk_desc->block_read(zfs_blk_desc, part_info->start + sector,
-				     block_len / SECTOR_SIZE,
-				     (void *)buf) != block_len / SECTOR_SIZE) {
-		printf(" ** zfs_devread() read error - block\n");
-		return 1;
-	}
-
-	block_len = byte_len & ~(SECTOR_SIZE - 1);
-	buf += block_len;
-	byte_len -= block_len;
-	sector += block_len / SECTOR_SIZE;
-
-	if (byte_len != 0) {
-		/* read rest of data which are not in whole sector */
-		if (zfs_blk_desc->block_read(zfs_blk_desc,
-					     part_info->start + sector,
-					     1, (void *)sec_buf) != 1) {
-			printf(" ** zfs_devread() read error - last part\n");
-			return 1;
-		}
-		memcpy(buf, sec_buf, byte_len);
-	}
-	return 0;
+	return fs_devread(zfs_blk_desc, part_info, sector, byte_offset,
+			  byte_len, buf);
 }
diff --git a/include/fs_internal.h b/include/fs_internal.h
new file mode 100644
index 0000000000..9d6dddd841
--- /dev/null
+++ b/include/fs_internal.h
@@ -0,0 +1,17 @@
+/*
+ * 2017 by Marek Behun <marek.behun@nic.cz>
+ *
+ * Derived from code in ext4/dev.c, which was based on reiserfs/dev.c
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __U_BOOT_FS_INTERNAL_H__
+#define __U_BOOT_FS_INTERNAL_H__
+
+#include <part.h>
+
+int fs_devread(struct blk_desc *, disk_partition_t *, lbaint_t, int, int,
+	       char *);
+
+#endif /* __U_BOOT_FS_INTERNAL_H__ */

commit 92193ef7346ae7bb0de4c531eaa9a2703dcc2573
Author: Marek Behún <marek.behun@nic.cz>
Date:   Sun Sep 3 17:00:23 2017 +0200

    UPSTREAM: lib: Add CRC32-C
    
    This is needed for BTRFS.
    
    Change-Id: I7415e99a6f06aef89f3520ebe9a9ba92a9189059
    Signed-off-by: Marek Behun <marek.behun@nic.cz>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 85d8bf57131a21424b50e50884372e813345f09a)

diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h
index 6764d58bab..6d08f5df98 100644
--- a/include/u-boot/crc.h
+++ b/include/u-boot/crc.h
@@ -28,4 +28,8 @@ uint32_t crc32_no_comp (uint32_t, const unsigned char *, uint);
 void crc32_wd_buf(const unsigned char *input, uint ilen,
 		    unsigned char *output, uint chunk_sz);
 
+/* lib/crc32c.c */
+void crc32c_init(uint32_t *, uint32_t);
+uint32_t crc32c_cal(uint32_t, const char *, int, uint32_t *);
+
 #endif /* _UBOOT_CRC_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index bf3be1643a..a5aa2e6244 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -149,6 +149,9 @@ config SHA_PROG_HW_ACCEL
 config MD5
 	bool
 
+config CRC32C
+	bool
+
 endmenu
 
 menu "Compression Support"
diff --git a/lib/Makefile b/lib/Makefile
index 17331d55b3..ab604be04f 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -75,6 +75,7 @@ obj-y += display_options.o
 CFLAGS_display_options.o := $(if $(BUILD_TAG),-DBUILD_TAG='"$(BUILD_TAG)"')
 obj-$(CONFIG_BCH) += bch.o
 obj-y += crc32.o
+obj-$(CONFIG_CRC32C) += crc32c.o
 obj-y += ctype.o
 obj-y += div64.o
 obj-y += hang.o
diff --git a/lib/crc32c.c b/lib/crc32c.c
new file mode 100644
index 0000000000..322c08ff5d
--- /dev/null
+++ b/lib/crc32c.c
@@ -0,0 +1,38 @@
+/*
+ * Copied from Linux kernel crypto/crc32c.c
+ * Copyright (c) 2004 Cisco Systems, Inc.
+ * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <compiler.h>
+
+uint32_t crc32c_cal(uint32_t crc, const char *data, int length,
+		    uint32_t *crc32c_table)
+{
+	while (length--)
+		crc = crc32c_table[(u8)(crc ^ *data++)] ^ (crc >> 8);
+
+	return crc;
+}
+
+void crc32c_init(uint32_t *crc32c_table, uint32_t pol)
+{
+	int i, j;
+	uint32_t v;
+	const uint32_t poly = pol; /* Bit-reflected CRC32C polynomial */
+
+	for (i = 0; i < 256; i++) {
+		v = i;
+		for (j = 0; j < 8; j++)
+			v = (v >> 1) ^ ((v & 1) ? poly : 0);
+
+		crc32c_table[i] = v;
+	}
+}

commit 114cd93113d4cb71f58555e08b5cb1f60b97ed6d
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sat Sep 30 22:56:22 2017 -0700

    UPSTREAM: scripts: dtc: Add .gitignore
    
    Ignore these generated files during the build of dtc.
    
    Change-Id: If9e9bf0ba501c18ee04436865a48bee41d9ed7cb
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit de163ecedb8a54dc72d5c6cadbfd1a85befce6ce)

diff --git a/scripts/dtc/.gitignore b/scripts/dtc/.gitignore
new file mode 100644
index 0000000000..d807c081a2
--- /dev/null
+++ b/scripts/dtc/.gitignore
@@ -0,0 +1,4 @@
+/dtc
+/dtc-lexer.lex.c
+/dtc-parser.tab.c
+/dtc-parser.tab.h

commit d4ecf6514bfe20d5bd2b3b48e6ea58057cf8c256
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed Sep 27 21:50:07 2017 -0700

    UPSTREAM: usb: storage: Fix overwritten in usb_stor_set_max_xfer_blk()
    
    The stored 'blk' value is overwritten to 'size / 512' before it can
    be used in usb_stor_set_max_xfer_blk(). This is not what we want.
    In fact, when 'size' exceeds the upper limit (USHRT_MAX * 512), we
    should simply assign 'size' to the upper limit.
    
    Change-Id: I078963e74b22450d0d876e846e44d93118cff96a
    Reported-by: Coverity (CID: 167250)
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 72ac8f3fc29016a31ee309b4d025b487e78906ab)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index a57570b73f..a91b1c0d2f 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -964,7 +964,7 @@ static void usb_stor_set_max_xfer_blk(struct usb_device *udev,
 		blk = 20;
 	} else {
 		if (size > USHRT_MAX * 512)
-			blk = USHRT_MAX;
+			size = USHRT_MAX * 512;
 		blk = size / 512;
 	}
 #endif

commit f018b53dacfdd7ef6f1d3324fc47f9d32fdfe419
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:50 2017 -0700

    UPSTREAM: usb: xhci: Set 'Average TRB Length' to 8 for control endpoints
    
    Update the codes to conform with xHCI spec chapter 6.2.3.
    
    Change-Id: I9227754f7f7faf27f90046178526fad4d45e699e
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fae35857e1c38776854442f59d6b56c17e93fc39)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 84982a92d6..0582a9be40 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -850,6 +850,12 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 	trb_64 = (uintptr_t)virt_dev->eps[0].ring->first_seg->trbs;
 	ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state);
 
+	/*
+	 * xHCI spec 6.2.3:
+	 * software shall set 'Average TRB Length' to 8 for control endpoints.
+	 */
+	ep0_ctx->tx_info = cpu_to_le32(EP_AVG_TRB_LENGTH(8));
+
 	/* Steps 7 and 8 were done in xhci_alloc_virt_device() */
 
 	xhci_flush_cache((uintptr_t)ep0_ctx, sizeof(struct xhci_ep_ctx));
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 93737b083c..4673738d1e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -601,6 +601,12 @@ static int xhci_set_configuration(struct usb_device *udev)
 		ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
 				virt_dev->eps[ep_index].ring->cycle_state);
 
+		/*
+		 * xHCI spec 6.2.3:
+		 * 'Average TRB Length' should be 8 for control endpoints.
+		 */
+		if (usb_endpoint_xfer_control(endpt_desc))
+			avg_trb_len = 8;
 		ep_ctx[ep_index]->tx_info =
 			cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
 			EP_AVG_TRB_LENGTH(avg_trb_len));

commit dd5c0fa31552e0f38d8579c1ec224c80ddd7be1b
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:49 2017 -0700

    UPSTREAM: usb: xhci: Set 'Error Count' to 0 for isoch endpoints
    
    Per xHCI spec, 'Error Count' should be set to 0 for isoch endpoints.
    
    Change-Id: Ibf1924935d705faa8a34e0bc94a44e3a0d1c28e2
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ab2b727dc03113fe35d6a9c937911055be3d3990)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index dfb188d5e4..93737b083c 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -511,6 +511,7 @@ static int xhci_set_configuration(struct usb_device *udev)
 	unsigned int mult;
 	unsigned int max_burst;
 	unsigned int avg_trb_len;
+	unsigned int err_count = 0;
 
 	out_ctx = virt_dev->out_ctx;
 	in_ctx = virt_dev->in_ctx;
@@ -588,9 +589,12 @@ static int xhci_set_configuration(struct usb_device *udev)
 			cpu_to_le32(MAX_PACKET
 			(get_unaligned(&endpt_desc->wMaxPacketSize)));
 
+		/* Allow 3 retries for everything but isoc, set CErr = 3 */
+		if (!usb_endpoint_xfer_isoc(endpt_desc))
+			err_count = 3;
 		ep_ctx[ep_index]->ep_info2 |=
 			cpu_to_le32(MAX_BURST(max_burst) |
-			((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
+			ERROR_COUNT(err_count));
 
 		trb_64 = (uintptr_t)
 				virt_dev->eps[ep_index].ring->enqueue;

commit 2874e912bc0172f87cc97fe87d8da9cfa7395451
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:48 2017 -0700

    UPSTREAM: usb: xhci: Program max burst size for endpoint
    
    The 'Max Burst Size' indicates to the xHC the maximum number of
    consecutive USB transactions that should be executed per scheduling
    opportunity. This is a “zero-based” value, where 0 to 15 represents
    burst sizes of 1 to 16, but at present this is always set to zero.
    Let's program the required value according to real needs.
    
    Change-Id: Id8dbdbfb248acd016b1e133b86334b9815b8ff2d
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fa483b2c750f6ebdb5946f46b217aa3f9a449531)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 8aed4283ed..dfb188d5e4 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -395,6 +395,22 @@ static u32 xhci_get_endpoint_mult(struct usb_device *udev,
 	return ss_ep_comp_desc->bmAttributes;
 }
 
+static u32 xhci_get_endpoint_max_burst(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc,
+	struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
+{
+	/* Super speed and Plus have max burst in ep companion desc */
+	if (udev->speed >= USB_SPEED_SUPER)
+		return ss_ep_comp_desc->bMaxBurst;
+
+	if (udev->speed == USB_SPEED_HIGH &&
+	    (usb_endpoint_xfer_isoc(endpt_desc) ||
+	     usb_endpoint_xfer_int(endpt_desc)))
+		return usb_endpoint_maxp_mult(endpt_desc) - 1;
+
+	return 0;
+}
+
 /*
  * Return the maximum endpoint service interval time (ESIT) payload.
  * Basically, this is the maxpacket size, multiplied by the burst size
@@ -493,6 +509,7 @@ static int xhci_set_configuration(struct usb_device *udev)
 	u32 max_esit_payload;
 	unsigned int interval;
 	unsigned int mult;
+	unsigned int max_burst;
 	unsigned int avg_trb_len;
 
 	out_ctx = virt_dev->out_ctx;
@@ -545,6 +562,8 @@ static int xhci_set_configuration(struct usb_device *udev)
 		interval = xhci_get_endpoint_interval(udev, endpt_desc);
 		mult = xhci_get_endpoint_mult(udev, endpt_desc,
 					      ss_ep_comp_desc);
+		max_burst = xhci_get_endpoint_max_burst(udev, endpt_desc,
+							ss_ep_comp_desc);
 		avg_trb_len = max_esit_payload;
 
 		ep_index = xhci_get_ep_index(endpt_desc);
@@ -570,7 +589,7 @@ static int xhci_set_configuration(struct usb_device *udev)
 			(get_unaligned(&endpt_desc->wMaxPacketSize)));
 
 		ep_ctx[ep_index]->ep_info2 |=
-			cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT) |
+			cpu_to_le32(MAX_BURST(max_burst) |
 			((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
 
 		trb_64 = (uintptr_t)

commit 1fa1b46003859465500b920473957295bb3684bd
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:47 2017 -0700

    UPSTREAM: usb: xhci: Honor endpoint's interval
    
    USB endpoint reports the period between consecutive requests to send
    or receive data as bInverval in its endpoint descriptor. So far this
    is ignored by xHCI driver and the 'Interval' field in xHC's endpoint
    context is always programmed to zero which means 1ms for low speed
    or full speed , or 125us for high speed or super speed. We should
    honor the interval by getting it from endpoint descriptor.
    
    Change-Id: Ib9180ea7b15d29fdc5a90315dcb0ffea672877a3
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f51966bf7afe44151756e9a2432705bb56bc2007)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index ec82fa664e..8aed4283ed 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -257,6 +257,172 @@ static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc)
 	return index;
 }
 
+/*
+ * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
+ * microframes, rounded down to nearest power of 2.
+ */
+static unsigned int xhci_microframes_to_exponent(unsigned int desc_interval,
+						 unsigned int min_exponent,
+						 unsigned int max_exponent)
+{
+	unsigned int interval;
+
+	interval = fls(desc_interval) - 1;
+	interval = clamp_val(interval, min_exponent, max_exponent);
+	if ((1 << interval) != desc_interval)
+		debug("rounding interval to %d microframes, "\
+		      "ep desc says %d microframes\n",
+		      1 << interval, desc_interval);
+
+	return interval;
+}
+
+static unsigned int xhci_parse_microframe_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	if (endpt_desc->bInterval == 0)
+		return 0;
+
+	return xhci_microframes_to_exponent(endpt_desc->bInterval, 0, 15);
+}
+
+static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	return xhci_microframes_to_exponent(endpt_desc->bInterval * 8, 3, 10);
+}
+
+/*
+ * Convert interval expressed as 2^(bInterval - 1) == interval into
+ * straight exponent value 2^n == interval.
+ */
+static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	unsigned int interval;
+
+	interval = clamp_val(endpt_desc->bInterval, 1, 16) - 1;
+	if (interval != endpt_desc->bInterval - 1)
+		debug("ep %#x - rounding interval to %d %sframes\n",
+		      endpt_desc->bEndpointAddress, 1 << interval,
+		      udev->speed == USB_SPEED_FULL ? "" : "micro");
+
+	if (udev->speed == USB_SPEED_FULL) {
+		/*
+		 * Full speed isoc endpoints specify interval in frames,
+		 * not microframes. We are using microframes everywhere,
+		 * so adjust accordingly.
+		 */
+		interval += 3;	/* 1 frame = 2^3 uframes */
+	}
+
+	return interval;
+}
+
+/*
+ * Return the polling or NAK interval.
+ *
+ * The polling interval is expressed in "microframes". If xHCI's Interval field
+ * is set to N, it will service the endpoint every 2^(Interval)*125us.
+ *
+ * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
+ * is set to 0.
+ */
+static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc)
+{
+	unsigned int interval = 0;
+
+	switch (udev->speed) {
+	case USB_SPEED_HIGH:
+		/* Max NAK rate */
+		if (usb_endpoint_xfer_control(endpt_desc) ||
+		    usb_endpoint_xfer_bulk(endpt_desc)) {
+			interval = xhci_parse_microframe_interval(udev,
+								  endpt_desc);
+			break;
+		}
+		/* Fall through - SS and HS isoc/int have same decoding */
+
+	case USB_SPEED_SUPER:
+		if (usb_endpoint_xfer_int(endpt_desc) ||
+		    usb_endpoint_xfer_isoc(endpt_desc)) {
+			interval = xhci_parse_exponent_interval(udev,
+								endpt_desc);
+		}
+		break;
+
+	case USB_SPEED_FULL:
+		if (usb_endpoint_xfer_isoc(endpt_desc)) {
+			interval = xhci_parse_exponent_interval(udev,
+								endpt_desc);
+			break;
+		}
+		/*
+		 * Fall through for interrupt endpoint interval decoding
+		 * since it uses the same rules as low speed interrupt
+		 * endpoints.
+		 */
+
+	case USB_SPEED_LOW:
+		if (usb_endpoint_xfer_int(endpt_desc) ||
+		    usb_endpoint_xfer_isoc(endpt_desc)) {
+			interval = xhci_parse_frame_interval(udev, endpt_desc);
+		}
+		break;
+
+	default:
+		BUG();
+	}
+
+	return interval;
+}
+
+/*
+ * The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
+ * High speed endpoint descriptors can define "the number of additional
+ * transaction opportunities per microframe", but that goes in the Max Burst
+ * endpoint context field.
+ */
+static u32 xhci_get_endpoint_mult(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc,
+	struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
+{
+	if (udev->speed < USB_SPEED_SUPER ||
+	    !usb_endpoint_xfer_isoc(endpt_desc))
+		return 0;
+
+	return ss_ep_comp_desc->bmAttributes;
+}
+
+/*
+ * Return the maximum endpoint service interval time (ESIT) payload.
+ * Basically, this is the maxpacket size, multiplied by the burst size
+ * and mult size.
+ */
+static u32 xhci_get_max_esit_payload(struct usb_device *udev,
+	struct usb_endpoint_descriptor *endpt_desc,
+	struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc)
+{
+	int max_burst;
+	int max_packet;
+
+	/* Only applies for interrupt or isochronous endpoints */
+	if (usb_endpoint_xfer_control(endpt_desc) ||
+	    usb_endpoint_xfer_bulk(endpt_desc))
+		return 0;
+
+	/* SuperSpeed Isoc ep with less than 48k per esit */
+	if (udev->speed >= USB_SPEED_SUPER)
+		return le16_to_cpu(ss_ep_comp_desc->wBytesPerInterval);
+
+	max_packet = usb_endpoint_maxp(endpt_desc);
+	max_burst = usb_endpoint_maxp_mult(endpt_desc);
+
+	/* A 0 in max burst means 1 transfer per ESIT */
+	return max_packet * max_burst;
+}
+
 /**
  * Issue a configure endpoint command or evaluate context command
  * and wait for it to finish.
@@ -324,6 +490,10 @@ static int xhci_set_configuration(struct usb_device *udev)
 	int slot_id = udev->slot_id;
 	struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
 	struct usb_interface *ifdesc;
+	u32 max_esit_payload;
+	unsigned int interval;
+	unsigned int mult;
+	unsigned int avg_trb_len;
 
 	out_ctx = virt_dev->out_ctx;
 	in_ctx = virt_dev->in_ctx;
@@ -357,10 +527,26 @@ static int xhci_set_configuration(struct usb_device *udev)
 	/* filling up ep contexts */
 	for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
 		struct usb_endpoint_descriptor *endpt_desc = NULL;
+		struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc = NULL;
 
 		endpt_desc = &ifdesc->ep_desc[cur_ep];
+		ss_ep_comp_desc = &ifdesc->ss_ep_comp_desc[cur_ep];
 		trb_64 = 0;
 
+		/*
+		 * Get values to fill the endpoint context, mostly from ep
+		 * descriptor. The average TRB buffer lengt for bulk endpoints
+		 * is unclear as we have no clue on scatter gather list entry
+		 * size. For Isoc and Int, set it to max available.
+		 * See xHCI 1.1 spec 4.14.1.1 for details.
+		 */
+		max_esit_payload = xhci_get_max_esit_payload(udev, endpt_desc,
+							     ss_ep_comp_desc);
+		interval = xhci_get_endpoint_interval(udev, endpt_desc);
+		mult = xhci_get_endpoint_mult(udev, endpt_desc,
+					      ss_ep_comp_desc);
+		avg_trb_len = max_esit_payload;
+
 		ep_index = xhci_get_ep_index(endpt_desc);
 		ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
 
@@ -372,6 +558,11 @@ static int xhci_set_configuration(struct usb_device *udev)
 		/*NOTE: ep_desc[0] actually represents EP1 and so on */
 		dir = (((endpt_desc->bEndpointAddress) & (0x80)) >> 7);
 		ep_type = (((endpt_desc->bmAttributes) & (0x3)) | (dir << 2));
+
+		ep_ctx[ep_index]->ep_info =
+			cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) |
+			EP_INTERVAL(interval) | EP_MULT(mult));
+
 		ep_ctx[ep_index]->ep_info2 =
 			cpu_to_le32(ep_type << EP_TYPE_SHIFT);
 		ep_ctx[ep_index]->ep_info2 |=
@@ -386,6 +577,10 @@ static int xhci_set_configuration(struct usb_device *udev)
 				virt_dev->eps[ep_index].ring->enqueue;
 		ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
 				virt_dev->eps[ep_index].ring->cycle_state);
+
+		ep_ctx[ep_index]->tx_info =
+			cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
+			EP_AVG_TRB_LENGTH(avg_trb_len));
 	}
 
 	return xhci_configure_endpoints(udev, false);
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 3377450fca..ba5f650144 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -663,8 +663,9 @@ struct xhci_ep_ctx {
 #define GET_MAX_PACKET(p)	((p) & 0x7ff)
 
 /* tx_info bitmasks */
-#define AVG_TRB_LENGTH_FOR_EP(p)	((p) & 0xffff)
-#define MAX_ESIT_PAYLOAD_FOR_EP(p)	(((p) & 0xffff) << 16)
+#define EP_AVG_TRB_LENGTH(p)		((p) & 0xffff)
+#define EP_MAX_ESIT_PAYLOAD_LO(p)	(((p) & 0xffff) << 16)
+#define EP_MAX_ESIT_PAYLOAD_HI(p)	((((p) >> 16) & 0xff) << 24)
 #define CTX_TO_MAX_ESIT_PAYLOAD(p)	(((p) >> 16) & 0xffff)
 
 /* deq bitmasks */
diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h
index 0ad4782a36..264c9712a3 100644
--- a/include/linux/usb/ch9.h
+++ b/include/linux/usb/ch9.h
@@ -418,6 +418,12 @@ struct __packed usb_class_report_descriptor {
 #define USB_ENDPOINT_XFER_INT		3
 #define USB_ENDPOINT_MAX_ADJUSTABLE	0x80
 
+#define USB_ENDPOINT_MAXP_MASK		0x07ff
+#define USB_EP_MAXP_MULT_SHIFT		11
+#define USB_EP_MAXP_MULT_MASK		(3 << USB_EP_MAXP_MULT_SHIFT)
+#define USB_EP_MAXP_MULT(m)		\
+	(((m) & USB_EP_MAXP_MULT_MASK) >> USB_EP_MAXP_MULT_SHIFT)
+
 /* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */
 #define USB_ENDPOINT_INTRTYPE		0x30
 #define USB_ENDPOINT_INTR_PERIODIC	(0 << 4)
@@ -625,6 +631,20 @@ static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd)
 	return __le16_to_cpu(get_unaligned(&epd->wMaxPacketSize));
 }
 
+/**
+ * usb_endpoint_maxp_mult - get endpoint's transactional opportunities
+ * @epd: endpoint to be checked
+ *
+ * Return @epd's wMaxPacketSize[12:11] + 1
+ */
+static inline int
+usb_endpoint_maxp_mult(const struct usb_endpoint_descriptor *epd)
+{
+	int maxp = __le16_to_cpu(epd->wMaxPacketSize);
+
+	return USB_EP_MAXP_MULT(maxp) + 1;
+}
+
 static inline int usb_endpoint_interrupt_type(
 		const struct usb_endpoint_descriptor *epd)
 {

commit 2a13791069e306f5cf0fca866e3b8a0f07fb9c90
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:46 2017 -0700

    UPSTREAM: usb: hub: Clear BH reset status change for a 3.0 hub
    
    USB 3.0 hubs report bit[5] in the port status change response as BH
    reset. The hub shall set the C_BH_PORT_RESET field for this port.
    
    Change-Id: I54d72aba3b1901c505aec754f2183e4d8d2e82dd
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 061895fbe57d29f50bb3c6c8609d56a668d1387d)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index a9d21bca5e..325d16dfc8 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -494,6 +494,12 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 		usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET);
 	}
 
+	if ((portchange & USB_SS_PORT_STAT_C_BH_RESET) &&
+	    usb_hub_is_superspeed(dev)) {
+		debug("port %d BH reset change\n", i + 1);
+		usb_clear_port_feature(dev, i + 1, USB_SS_PORT_FEAT_C_BH_RESET);
+	}
+
 	/* A new USB device is ready at this point */
 	debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
 

commit b717f6f66cef407d9e0e045324334333f5f125dd
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:45 2017 -0700

    UPSTREAM: usb: hub: Clear port reset before usb_hub_port_connect_change()
    
    During usb_hub_port_connect_change(), a port reset set feature
    request is issued to the port, and later a port reset clear feature
    is done to the same port before the function returns. However at
    the end of usb_scan_port(), we attempt to clear port reset again
    on a cached port status change variable, which should not be done.
    
    Adjust the call to clear port reset to right before the call to
    usb_hub_port_connect_change().
    
    Change-Id: Ib3df40451289134cc7e60a37293a33fc9fd35547
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b90203526f2c5bcc05b4a65241ea226b7b9f52d0)

diff --git a/common/usb_hub.c b/common/usb_hub.c
index 86a3477664..a9d21bca5e 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -489,6 +489,11 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 		return 0;
 	}
 
+	if (portchange & USB_PORT_STAT_C_RESET) {
+		debug("port %d reset change\n", i + 1);
+		usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET);
+	}
+
 	/* A new USB device is ready at this point */
 	debug("devnum=%d port=%d: USB dev found\n", dev->devnum, i + 1);
 
@@ -543,11 +548,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan)
 		       hub->overcurrent_count[i]);
 	}
 
-	if (portchange & USB_PORT_STAT_C_RESET) {
-		debug("port %d reset change\n", i + 1);
-		usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET);
-	}
-
 	/*
 	 * We're done with this device, so let's remove this device from
 	 * scanning list

commit 24acdf7a3d0209ed4d996bfa2dd2d0e701d80bd6
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:44 2017 -0700

    UPSTREAM: usb: xhci: Fix max packet size for full speed device endpoint 0
    
    In xhci_check_maxpacket(), the control endpoint 0 max packet size
    is wrongly taken from the interface's endpoint descriptor. However
    the default endpoint 0 does not come with an endpoint descriptor
    hence is not included in the interface structure. Change to use
    epmaxpacketin[0] instead.
    
    The other bug in this routine is that when setting max packet size
    to the xHC endpoint 0 context, it does not clear its previous value
    at all before programming a new one.
    
    Change-Id: I32199e4f4a0f2950fa71b139f667ece35e55483c
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b5aa857b95194c15126245e99a384ec2fd9536e8)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 4b3d58d56e..ec82fa664e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -546,16 +546,13 @@ int xhci_check_maxpacket(struct usb_device *udev)
 	int max_packet_size;
 	int hw_max_packet_size;
 	int ret = 0;
-	struct usb_interface *ifdesc;
-
-	ifdesc = &udev->config.if_desc[0];
 
 	out_ctx = ctrl->devs[slot_id]->out_ctx;
 	xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
 
 	ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index);
 	hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
-	max_packet_size = usb_endpoint_maxp(&ifdesc->ep_desc[0]);
+	max_packet_size = udev->epmaxpacketin[0];
 	if (hw_max_packet_size != max_packet_size) {
 		debug("Max Packet Size for ep 0 changed.\n");
 		debug("Max packet size in usb_device = %d\n", max_packet_size);
@@ -567,7 +564,8 @@ int xhci_check_maxpacket(struct usb_device *udev)
 				ctrl->devs[slot_id]->out_ctx, ep_index);
 		in_ctx = ctrl->devs[slot_id]->in_ctx;
 		ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
-		ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
+		ep_ctx->ep_info2 &= cpu_to_le32(~((0xffff & MAX_PACKET_MASK)
+						<< MAX_PACKET_SHIFT));
 		ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
 
 		/*

commit 32cec33c6f6646f866adb86b0889354221241c69
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:43 2017 -0700

    UPSTREAM: usb: Read device descriptor after device is addressed for xHCI
    
    For xHCI it is not possible to read a device descriptor before it
    has been assigned an address. That's why usb_setup_descriptor()
    was called with 'do_read' being false. But we really need try to
    read the device descriptor before starting any real communication
    with the default control endpoint.
    
    Change-Id: I14a3f6698ba805f5ef35242ab9b374a91158552c
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 932bb668bb2464115f2d08abbed44e58cfce9536)

diff --git a/common/usb.c b/common/usb.c
index 376fdb1f6d..a6d88fdcb9 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -1051,6 +1051,17 @@ static int usb_prepare_device(struct usb_device *dev, int addr, bool do_read,
 
 	mdelay(10);	/* Let the SET_ADDRESS settle */
 
+	/*
+	 * If we haven't read device descriptor before, read it here
+	 * after device is assigned an address. This is only applicable
+	 * to xHCI so far.
+	 */
+	if (!do_read) {
+		err = usb_setup_descriptor(dev, true);
+		if (err)
+			return err;
+	}
+
 	return 0;
 }
 

commit a9cf3839831feff4465b736bcd5413355bd322ad
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:42 2017 -0700

    UPSTREAM: usb: Only get 64 bytes device descriptor for full speed devices
    
    Full speed device endpoint 0 can have 8/16/32/64 bMaxPacketSize0.
    Other speed devices report fixed value per USB spec. So it only
    makes sense if we send a get device descriptor with 64 bytes to
    full speed devices.
    
    While we are here, update the comment block to be within 80 cols.
    
    Change-Id: I035b83fb71ce4aa37f23fccba430d65814600a55
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c008faa77358bb5b313696dd1d5bb8afa03a6ca2)

diff --git a/common/usb.c b/common/usb.c
index 0904259757..376fdb1f6d 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -969,23 +969,24 @@ static int usb_setup_descriptor(struct usb_device *dev, bool do_read)
 	dev->epmaxpacketin[0] = dev->descriptor.bMaxPacketSize0;
 	dev->epmaxpacketout[0] = dev->descriptor.bMaxPacketSize0;
 
-	if (do_read) {
+	if (do_read && dev->speed == USB_SPEED_FULL) {
 		int err;
 
 		/*
-		 * Validate we've received only at least 8 bytes, not that we've
-		 * received the entire descriptor. The reasoning is:
-		 * - The code only uses fields in the first 8 bytes, so that's all we
-		 *   need to have fetched at this stage.
-		 * - The smallest maxpacket size is 8 bytes. Before we know the actual
-		 *   maxpacket the device uses, the USB controller may only accept a
-		 *   single packet. Consequently we are only guaranteed to receive 1
-		 *   packet (at least 8 bytes) even in a non-error case.
+		 * Validate we've received only at least 8 bytes, not that
+		 * we've received the entire descriptor. The reasoning is:
+		 * - The code only uses fields in the first 8 bytes, so
+		 *   that's all we need to have fetched at this stage.
+		 * - The smallest maxpacket size is 8 bytes. Before we know
+		 *   the actual maxpacket the device uses, the USB controller
+		 *   may only accept a single packet. Consequently we are only
+		 *   guaranteed to receive 1 packet (at least 8 bytes) even in
+		 *   a non-error case.
 		 *
-		 * At least the DWC2 controller needs to be programmed with the number
-		 * of packets in addition to the number of bytes. A request for 64
-		 * bytes of data with the maxpacket guessed as 64 (above) yields a
-		 * request for 1 packet.
+		 * At least the DWC2 controller needs to be programmed with
+		 * the number of packets in addition to the number of bytes.
+		 * A request for 64 bytes of data with the maxpacket guessed
+		 * as 64 (above) yields a request for 1 packet.
 		 */
 		err = get_descriptor_len(dev, 64, 8);
 		if (err)
@@ -1008,7 +1009,7 @@ static int usb_setup_descriptor(struct usb_device *dev, bool do_read)
 		dev->maxpacketsize = PACKET_SIZE_64;
 		break;
 	default:
-		printf("usb_new_device: invalid max packet size\n");
+		printf("%s: invalid max packet size\n", __func__);
 		return -EIO;
 	}
 

commit 83e13f0fe70963a21fde56c9cef6d30f331ac982
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:41 2017 -0700

    UPSTREAM: usb: xhci: Add interrupt transfer support
    
    xHCI uses normal TRBs for both bulk and interrupt. This adds the
    missing interrupt transfer support to xHCI so that devices like
    USB keyboard that uses interrupt transfer can work.
    
    Change-Id: I857a769b96c3283d99deff1f1092ddd64a9693e2
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1897d60130976ece389d5875187b78ba0d41428f)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 04eb1eb14d..4b3d58d56e 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -890,11 +890,18 @@ unknown:
 static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe,
 				void *buffer, int length, int interval)
 {
+	if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
+		printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
+		return -EINVAL;
+	}
+
 	/*
-	 * TODO: Not addressing any interrupt type transfer requests
-	 * Add support for it later.
+	 * xHCI uses normal TRBs for both bulk and interrupt. When the
+	 * interrupt endpoint is to be serviced, the xHC will consume
+	 * (at most) one TD. A TD (comprised of sg list entries) can
+	 * take several service intervals to transmit.
 	 */
-	return -EINVAL;
+	return xhci_bulk_tx(udev, pipe, length, buffer);
 }
 
 /**

commit d17dd8c547b906f9b20d3ce86f9e5a4b7ca8029a
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Mon Sep 18 06:40:39 2017 -0700

    UPSTREAM: usb: xhci: Don't assume LS/FS devices are always behind a HS hub
    
    At present xHCI driver assumes LS/FS devices are attached directly
    to a HS hub. If they are connected to a LS/FS hub, the driver will
    fail to perform the USB enumeration process on such devices.
    
    This is fixed by looking from the device itself all the way up to
    the HS hub where the TT that serves the device is located.
    
    Change-Id: I3465e64fdb09cf2fd15e181a5606938cf5819681
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8a0e6d83070a977442aaba2c5a74cbe34e157012)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index d5eab3a615..84982a92d6 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -786,12 +786,22 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,
 #ifdef CONFIG_DM_USB
 	/* Set up TT fields to support FS/LS devices */
 	if (speed == USB_SPEED_LOW || speed == USB_SPEED_FULL) {
-		dev = dev_get_parent_priv(udev->dev);
-		if (dev->speed == USB_SPEED_HIGH) {
-			hub = dev_get_uclass_priv(udev->dev);
+		struct udevice *parent = udev->dev;
+
+		dev = udev;
+		do {
+			port_num = dev->portnr;
+			dev = dev_get_parent_priv(parent);
+			if (usb_hub_is_root_hub(dev->dev))
+				break;
+			parent = dev->dev->parent;
+		} while (dev->speed != USB_SPEED_HIGH);
+
+		if (!usb_hub_is_root_hub(dev->dev)) {
+			hub = dev_get_uclass_priv(dev->dev);
 			if (hub->tt.multi)
 				slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
-			slot_ctx->tt_info |= cpu_to_le32(TT_PORT(udev->portnr));
+			slot_ctx->tt_info |= cpu_to_le32(TT_PORT(port_num));
 			slot_ctx->tt_info |= cpu_to_le32(TT_SLOT(dev->slot_id));
 		}
 	}

commit 570588387293cdfd7883fafcdee01769652f0e8f
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:43 2017 -0700

    UPSTREAM: dm: usb: Remove no longer needed blk_unbind_all()
    
    With the root hub unbinding in usb_stop(), there is no need to do
    a blk uclass specific unbind operation.
    
    Change-Id: I1f8fef976ba14efc836041e79b23c0cd916a39ee
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ad0a9378bf5cc9280e117b7db94b6bfa1b6e8e76)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 8a9f810bf8..bfc0556d7d 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -193,11 +193,7 @@ int usb_stop(void)
 				err = ret;
 		}
 	}
-#ifdef CONFIG_BLK
-	ret = blk_unbind_all(IF_TYPE_USB);
-	if (ret && !err)
-		err = ret;
-#endif
+
 #ifdef CONFIG_SANDBOX
 	struct udevice *dev;
 

commit 4f46a20e4b713fa26f95da83998732492d13c711
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Sun Oct 1 06:19:42 2017 -0700

    UPSTREAM: dm: usb: Fix broken usb_stop()
    
    At present we only do device_remove() during usb stop. The DM API
    device_remove() only marks the device state as inactivated, but
    still keeps its USB topology (eg: parent, children, etc) in the DM
    device structure. There is no issue if we only start USB subsystem
    once and never stop it. But a big issue occurs when we do 'usb stop'
    and 'usb start' multiple times.
    
    Strange things may be observed with current implementation, like:
    - the enumeration may report only 1 mass storage device is detected,
      but the total number of USB devices is correct.
    - USB keyboard does not work anymore after a bunch of 'usb reset'
      even if 'usb tree' shows it is correctly identified.
    - read/write flash drive via 'fatload usb' may complain "Bad device"
    
    In fact, every time when USB host controller starts the enumeration
    process, it takes random time for each USB port to show up online,
    hence each USB device may appear in a different order from previous
    enumeration, and gets assigned to a totally different USB address.
    As a result, we end up using a stale USB topology in the DM device
    structure which still reflects the previous enumeration result, and
    it may create an exact same DM device name like generic_bus_0_dev_7
    that is already in the DM device structure. And since the DM device
    structure is there, there is no device_bind() call to bind driver to
    the device during current enumeration process, eventually creating
    an inconsistent software representation of the hardware topology, a
    non-working USB subsystem.
    
    The fix is to clear the unused USB topology in the usb_stop(), by
    calling device_unbind() on each controller's root hub device, and
    the unbinding will unbind all of its children automatically.
    
    For Sandbox, we need scan the device tree each time when we start
    the USB stack, in order to re-create the emulated USB devices and
    bind drivers for them before we actually do the driver probe.
    
    Change-Id: I690fd9e4bd18421ea5f11772aab39806a2208b4e
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d4efefe32ea8a45b7b30f4769b3928c28e181c73)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index bc44fc3394..8a9f810bf8 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -164,6 +164,7 @@ int usb_get_max_xfer_size(struct usb_device *udev, size_t *size)
 int usb_stop(void)
 {
 	struct udevice *bus;
+	struct udevice *rh;
 	struct uclass *uc;
 	struct usb_uclass_priv *uc_priv;
 	int err = 0, ret;
@@ -179,6 +180,18 @@ int usb_stop(void)
 		ret = device_remove(bus, DM_REMOVE_NORMAL);
 		if (ret && !err)
 			err = ret;
+
+		/* Locate root hub device */
+		device_find_first_child(bus, &rh);
+		if (rh) {
+			/*
+			 * All USB devices are children of root hub.
+			 * Unbinding root hub will unbind all of its children.
+			 */
+			ret = device_unbind(rh);
+			if (ret && !err)
+				err = ret;
+		}
 	}
 #ifdef CONFIG_BLK
 	ret = blk_unbind_all(IF_TYPE_USB);
@@ -262,6 +275,21 @@ int usb_init(void)
 		/* init low_level USB */
 		printf("USB%d:   ", count);
 		count++;
+
+#ifdef CONFIG_SANDBOX
+		/*
+		 * For Sandbox, we need scan the device tree each time when we
+		 * start the USB stack, in order to re-create the emulated USB
+		 * devices and bind drivers for them before we actually do the
+		 * driver probe.
+		 */
+		ret = dm_scan_fdt_dev(bus);
+		if (ret) {
+			printf("Sandbox USB device scan failed (%d)\n", ret);
+			continue;
+		}
+#endif
+
 		ret = device_probe(bus);
 		if (ret == -ENODEV) {	/* No such device. */
 			puts("Port not available.\n");

commit fca6064c0e7c1e360d4aacc8ba78336b9e4ebafd
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:14 2017 +0530

    UPSTREAM: rk3288: spl: Add dram_init_banksize
    
    Falcon mode, is updating DDR dt node configuration through
    spl_fixup_fdt() so add appropriate DDR base and size through
    dram_init_banksize.
    
    Change-Id: I404d3f5f53d9507061abab68599918a8a2317f0b
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2ee3021ae1808828c74b7eb6ae68d8d511bc4c30)

diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index cc4299f5eb..f64a54843f 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -19,7 +19,9 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3288.h>
 #include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/timer.h>
 #include <dm/pinctrl.h>
@@ -290,3 +292,18 @@ err:
 	/* No way to report error here */
 	hang();
 }
+
+#ifdef CONFIG_SPL_OS_BOOT
+
+#define PMU_BASE		0xff730000
+int dram_init_banksize(void)
+{
+	struct rk3288_pmu *const pmu = (void *)PMU_BASE;
+	size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
+
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = size;
+
+	return 0;
+}
+#endif

commit b5136c76a91260bc1573a08347cb3375b706a529
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:03 2017 +0200

    UPSTREAM: rockchip: defconfig: puma-rk3399: update for DM_REGULATOR support in SPL
    
    The RK3399-Q7 requires DM regulator support in SPL, so we can use the
    regulator framework to reenable the eMMC and SPI, if these had been
    turned of by the BIOS_DISABLE signal.
    
    Change-Id: Ic6d7471fe85f69b5820fd8a865904db923c25ac0
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7c158634cade29f6d1f898997c82b100d303527c)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 2ab2516c01..62a8d7c859 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
@@ -20,6 +21,8 @@ CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
@@ -63,8 +66,10 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3399=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y

commit ea32c351d277af2983c69af8b892849aa430cdc2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:02 2017 +0200

    UPSTREAM: power: spl: add SPL_DM_REGULATOR_FIXED in Kconfig
    
    The Makefile already tests for SPL_DM_REGULATOR_FIXED, but Kconfig
    does not provide it.  This adds SPL_DM_REGULATOR_FIXED to Kconfig.
    
    Change-Id: I51fad4fbd9bff634174a7177a3cb6e69516e2f7e
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9086eab8fea5f6b41de1f6ab1313f3acf3f3db76)

diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index c82a936e8a..a11408ff2e 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -77,6 +77,13 @@ config DM_REGULATOR_FIXED
 	features for fixed value regulators. The driver implements get/set api
 	for enable and get only for voltage value.
 
+config SPL_DM_REGULATOR_FIXED
+	bool "Enable Driver Model for REGULATOR Fixed value in SPL"
+	depends on DM_REGULATOR_FIXED
+	---help---
+	This config enables implementation of driver-model regulator uclass
+	features for fixed value regulators in SPL.
+
 config DM_REGULATOR_GPIO
 	bool "Enable Driver Model for GPIO REGULATOR"
 	depends on DM_REGULATOR

commit be29fed8f989befde16eb011c343db161284594b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:01 2017 +0200

    UPSTREAM: rockchip: rk3399-puma: add boot-on regulator to override BIOS_DISABLE
    
    The (Qseven) BIOS_DISABLE signal on the RK3399-Q7 (Puma) keeps the
    eMMC and SPI in reset initially and we need to write a GPIO to turn
    them on before continuing the boot-up.
    
    This adds the DTS entries for the additional regulator and makes
    pinctrl and gpio3 available during SPL.  It also adds a hook to the
    spl_board_init() to ensure that the regulator gets probed and enabled.
    
    Change-Id: I5d229af39d5b410a5abc38f9d151bc766384c275
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 482cf22333dbfb7c706d6a7ec1ffbfa5409cc6a3)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index f95c68e9f6..65ab380139 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -101,6 +101,24 @@
 		regulator-max-microvolt = <3300000>;
 	};
 
+	/*
+	 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
+	 * eMMC and SPI flash powered-down initially (in fact it keeps the
+	 * reset signal asserted).  Even though it is an enable signal, we
+	 * model this as a regulator.
+	 */
+	bios_enable: bios_enable {
+		compatible = "regulator-fixed";
+		u-boot,dm-pre-reloc;
+		regulator-name = "bios_enable";
+		enable-active-low;
+		gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+
 	vccadc_ref: vccadc-ref {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc1v8_sys";
@@ -459,7 +477,7 @@
 };
 
 &pcie_phy {
-	        status = "okay";
+		status = "okay";
 };
 
 &pmu_io_domains {
@@ -486,7 +504,7 @@
 };
 
 &sdmmc {
-        u-boot,dm-pre-reloc;
+	u-boot,dm-pre-reloc;
 	clock-frequency = <150000000>;
 	clock-freq-min-max = <100000 150000000>;
 	supports-sd;
@@ -533,10 +551,15 @@
 	status = "okay";
 };
 
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl {
 	/* Pins that are not explicitely used by any devices */
 	pinctrl-names = "default";
 	pinctrl-0 = <&puma_pin_hog>;
+
 	hog {
 		puma_pin_hog: puma_pin_hog {
 			rockchip,pins =
@@ -576,7 +599,7 @@
 	i2c8 {
 		i2c8_xfer_a: i2c8-xfer {
 			rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
-			                <1 20 RK_FUNC_1 &pcfg_pull_up>;
+					<1 20 RK_FUNC_1 &pcfg_pull_up>;
 		};
 	};
 };
@@ -652,4 +675,3 @@
 &spi5 {
 	status = "okay";
 };
-
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 3cab7b1d48..2b4988e2d2 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -34,6 +34,16 @@ int board_init(void)
 
 void spl_board_init(void)
 {
+	int  ret;
+
+	/*
+	 * Turning the eMMC and SPI back on (if disabled via the Qseven
+	 * BIOS_ENABLE) signal is done through a always-on regulator).
+	 */
+	ret = regulators_enable_boot_on(false);
+	if (ret)
+		debug("%s: Cannot enable boot on regulator\n", __func__);
+
 	preloader_console_init();
 }
 

commit b4d43cb80724c73c6d70d8e51536b66d4bfea2a7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:28:00 2017 +0200

    UPSTREAM: rockchip: puma-rk3399: update board_init()
    
    The original initialisation code for board_init() was largely lifted
    from the code on the EVB.  However, the RK3399-Q7 can do with a much
    more concise init sequence.
    
    This cleans up the board_init() by updating it to the essentials for
    the RK3399-Q7 and getting rid of the accumulated cruft.
    
    Change-Id: I7855f00a4256b246f6a082b0edf12fc776798e26
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0b5e7aab0ef62fea852d03df76e577c217d0b8bf)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index e55a5c6657..3cab7b1d48 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -19,44 +19,16 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-	struct udevice *pinctrl, *regulator;
 	int ret;
 
 	/*
-	 * The PWM does not have decicated interrupt number in dts and can
-	 * not get periph_id by pinctrl framework, so let's init them here.
-	 * The PWM2 and PWM3 are for pwm regulators.
+	 * We need to call into regulators_enable_boot_on() again, as the call
+	 * during SPL may have not included all regulators.
 	 */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto out;
-	}
-
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
-	if (ret) {
-		debug("%s PWM2 pinctrl init fail!\n", __func__);
-		goto out;
-	}
-
-	/* rk3399 need to init vdd_center to get the correct output voltage */
-	ret = regulator_get_by_platname("vdd_center", &regulator);
+	ret = regulators_enable_boot_on(false);
 	if (ret)
-		debug("%s: Cannot get vdd_center regulator\n", __func__);
-
-	ret = regulator_get_by_platname("vcc5v0_host", &regulator);
-	if (ret) {
-		debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
-		goto out;
-	}
-
-	ret = regulator_set_enable(regulator, true);
-	if (ret) {
-		debug("%s vcc5v0-host-en set fail!\n", __func__);
-		goto out;
-	}
+		debug("%s: Cannot enable boot on regulator\n", __func__);
 
-out:
 	return 0;
 }
 

commit fa25729f762acb763cffa4d110903b6e494fdce8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:59 2017 +0200

    UPSTREAM: rockchip: dts: rk3399-puma: add 'same-as-spl' to the front of the boot-order
    
    In the general case, we want to continue booting the full U-Boot
    (contained in a discoverable FIT image) from the same device the SPL
    stage was loaded from.  This prepends the 'same-as-spl' specifier to
    our configurable boot-order to make this the default behaviour.
    
    Change-Id: Iaca77be835e5a4a1a9cdffb82c3ffe666e8871ac
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 775bd78a1126497f57bdab8be2419a063cf12111)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index a04878e223..f95c68e9f6 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -20,7 +20,8 @@
 
 	chosen {
 		stdout-path = "serial0:115200n8";
-		u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc;
+		u-boot,spl-boot-order = \
+			"same-as-spl", &spiflash, &sdhci, &sdmmc;
 	};
 
 	aliases {

commit 337a0f1fafe8dad50f275e3601d09e62bb6de40c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:58 2017 +0200

    UPSTREAM: rockchip: spl: rk3399: implement chip-specific board_spl_was_booted_from()
    
    To support the new "same-as-spl" specifier in the boot-order on the
    RK3399, this implements the chip-specific mapping from the information
    obtainable from the BROM to a OF path name.
    
    Change-Id: I3f7fd061a511a818538bc64146033e722d8dec27
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c55addd36008e82cd0081c591a68a1f1667346e7)

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index 077cb80994..6212d96de8 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -26,6 +26,30 @@ void board_return_to_bootrom(void)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
+static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
+	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+};
+
+const char *board_spl_was_booted_from(void)
+{
+	u32  bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
+	const char *bootdevice_ofpath = NULL;
+
+	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
+		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
+
+	if (bootdevice_ofpath)
+		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
+		      __func__, bootdevice_brom_id, bootdevice_ofpath);
+	else
+		debug("%s: failed to resolve brom_bootdevice_id %x\n",
+		      __func__, bootdevice_brom_id);
+
+	return bootdevice_ofpath;
+}
+
 u32 spl_boot_device(void)
 {
 	u32 boot_device = BOOT_DEVICE_MMC1;

commit 2d5ea11e7d3636e0a4255a8754d685a8ce92ed50
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:57 2017 +0200

    UPSTREAM: rockchip: spl: support a 'same-as-spl'-specifier in the spl-boot-order
    
    It is often desirable to configure the spl-boot-order (i.e. the order
    that SPL probes devices to find the FIT image containing a full U-Boot)
    such that it contains 'the same device the SPL stage was booted from'
    early on.  To support this, we introduce the 'same-as-spl' specifier
    for the spl-boot-order property.
    
    This commit adds:
     - documentation for the new board_spl_was_booted_from() function that
       individual SoCs/boards should provide, if they can determine where
       the SPL was booted from
     - implements the new board_spl_was_booted_from() stub function
     - adds support for handling the 'same-as-spl' specifier and calling
       into the per-SoC/per-board support code.
    
    This also updates the documentation for the 'u-boot,spl-boot-order'
    property.
    
    Change-Id: Id312751f954eecebb4a9842163249df21e311704
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 80e9f88e67398ae65c89af3bace59e7e14debd33)

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 0bb9a73a8a..843998dfdc 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -76,6 +76,24 @@ static int spl_node_to_boot_device(int node)
 	return -1;
 }
 
+/**
+ * board_spl_was_booted_from() - retrieves the of-path the SPL was loaded from
+ *
+ * To support a 'same-as-spl' specification in the search-order for the next
+ * stage, we need a SoC- or board-specific way to handshake with what 'came
+ * before us' (either a BROM or TPL stage) and map the info retrieved onto
+ * a OF path.
+ *
+ * Returns
+ *   NULL, on failure or if the device could not be identified
+ *   a of_path (a string), on success
+ */
+__weak const char *board_spl_was_booted_from(void)
+{
+	debug("%s: no support for 'same-as-spl' for this board\n", __func__);
+	return NULL;
+}
+
 void board_boot_order(u32 *spl_boot_list)
 {
 	const void *blob = gd->fdt_blob;
@@ -97,8 +115,17 @@ void board_boot_order(u32 *spl_boot_list)
 	     (conf = fdt_stringlist_get(blob, chosen_node,
 					"u-boot,spl-boot-order", elem, NULL));
 	     elem++) {
+		const char *alias;
+
+		/* Handle the case of 'same device the SPL was loaded from' */
+		if (strncmp(conf, "same-as-spl", 11) == 0) {
+			conf = board_spl_was_booted_from();
+			if (!conf)
+				continue;
+		}
+
 		/* First check if the list element is an alias */
-		const char *alias = fdt_get_alias(blob, conf);
+		alias = fdt_get_alias(blob, conf);
 		if (alias)
 			conf = alias;
 
diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt
index 5625d210e8..c96b8f7109 100644
--- a/doc/device-tree-bindings/chosen.txt
+++ b/doc/device-tree-bindings/chosen.txt
@@ -56,10 +56,20 @@ Each list element of the property should specify a device to be probed
 in the order they are listed: references (i.e. implicit paths), a full
 path or an alias is expected for each entry.
 
+A special specifier "same-as-spl" can be used at any position in the
+boot-order to direct U-Boot to insert the device the SPL was booted
+from there.  Whether this is indeed inserted or silently ignored (if
+it is not supported on any given SoC/board or if the boot-device is
+not available to continue booting from) is implementation-defined.
+Note that if "same-as-spl" expands to an actual node for a given
+board, the corresponding node may appear multiple times in the
+boot-order (as there currently exists no mechanism to suppress
+duplicates from the list).
+
 Example
 -------
 / {
 	chosen {
-		u-boot,spl-boot-order = &sdmmc, "/sdhci@fe330000";
+		u-boot,spl-boot-order = "same-as-spl", &sdmmc, "/sdhci@fe330000";
 	};
 };

commit 309353d55859b86d29b5c37a5458f42576006d9c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:56 2017 +0200

    UPSTREAM: rockchip: spl: add documentation for spl_node_to_boot_device()
    
    In the expectation that the spl-boot-order code will eventually
    gain use outside of mach-rockchip: let's add documentation on the
    spl_node_to_boot_device() function, which is likely to become a
    publicly exported function.
    
    Change-Id: Ieed07d7fac72515274f8bf3485a11bff1dd143ac
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit dbad01cab576c12852931c6bf22361b5234c506a)

diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 4f78c72720..0bb9a73a8a 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -10,6 +10,25 @@
 #include <spl.h>
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
+/**
+ * spl_node_to_boot_device() - maps from a DT-node to a SPL boot device
+ * @node:	of_offset of the node
+ *
+ * The SPL framework uses BOOT_DEVICE_... constants to identify its boot
+ * sources.  These may take on a device-specific meaning, depending on
+ * what nodes are enabled in a DTS (e.g. BOOT_DEVICE_MMC1 may refer to
+ * different controllers/block-devices, depending on which SD/MMC controllers
+ * are enabled in any given DTS).  This function maps from a DT-node back
+ * onto a BOOT_DEVICE_... constant, considering the currently active devices.
+ *
+ * Returns
+ *   -ENOENT, if no device matching the node could be found
+ *   -ENOSYS, if the device matching the node can not be mapped onto a
+ *            SPL boot device (e.g. the third MMC device)
+ *   -1, for unspecified failures
+ *   a positive integer (from the BOOT_DEVICE_... family) on succes.
+ */
+
 static int spl_node_to_boot_device(int node)
 {
 	struct udevice *parent;

commit 5cf14c032d4296e96a5c04adda07a1c63c8ed027
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:55 2017 +0200

    rockchip: bootrom: add definitions to retrieve BROM boot-source
    
    The Rockchip BROM allows reading where it booted from from SRAM.
    This adds the necessary definitions (as received from Kever) for
    the location of this information in the RK3399's SRAM and naming
    for the constants used.
    
    Change-Id: Iac090fa74837959ffc4bb42c75328016ee671be1
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3b4f87735d093463e3b227a07a62996fc0b47b53)

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 21994a65ee..91e75cf732 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -39,4 +39,23 @@ enum rockchip_bootrom_cmd {
 };
 
 void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
+
+/**
+ * Boot-device identifiers as used by the BROM
+ */
+enum {
+	BROM_BOOTSOURCE_NAND = 1,
+	BROM_BOOTSOURCE_EMMC = 2,
+	BROM_BOOTSOURCE_SPINOR = 3,
+	BROM_BOOTSOURCE_SPINAND = 4,
+	BROM_BOOTSOURCE_SD = 5,
+	BROM_BOOTSOURCE_USB = 10,
+	BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
+};
+
+/**
+ * Locations of the boot-device identifier in SRAM
+ */
+#define RK3399_BROM_BOOTSOURCE_ID_ADDR   0xff8c0010
+
 #endif

commit c8c978c955ff61c1152fbabaae7e0a65480a798d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 29 19:27:54 2017 +0200

    rockchip: rk3399: make spl_board_init board-specific
    
    The later-stage spl_board_init (as opposed to board_init_f) should set
    up board-specific details: these differ between the EVB-RK3399 and the
    RK3399-Q7 (Puma).
    
    This moves spl_board_init back into the individual boards and removes
    the unneeded functionality from Puma.
    
    Change-Id: I36b72844fbd0fd45665608f11e1a9a46168490ab
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit fb7406469c012092d652741f103b0993103cf8e3)
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index d3841359c9..077cb80994 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -148,34 +148,6 @@ void board_init_f(ulong dummy)
 	}
 }
 
-void spl_board_init(void)
-{
-	struct udevice *pinctrl;
-	int ret;
-
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		debug("%s: Cannot find pinctrl device\n", __func__);
-		goto err;
-	}
-
-	/* Enable debug UART */
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
-	if (ret) {
-		debug("%s: Failed to set up console UART\n", __func__);
-		goto err;
-	}
-
-	preloader_console_init();
-
-	return;
-err:
-	printf("spl_board_init: Error %d\n", ret);
-
-	/* No way to report error here */
-	hang();
-}
-
 #ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index 02c11e5946..e2e6d49e9a 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -3,6 +3,7 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+
 #include <common.h>
 #include <dm.h>
 #include <misc.h>
@@ -15,6 +16,7 @@
 #include <u-boot/sha256.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
+#include <spl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -209,3 +211,30 @@ int board_usb_init(int index, enum usb_init_type init)
 	return dwc3_uboot_init(&dwc3_device_data);
 }
 #endif
+
+void spl_board_init(void)
+{
+	struct udevice *pinctrl;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+
+	/* Enable debug UART */
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+	if (ret) {
+		debug("%s: Failed to set up console UART\n", __func__);
+		goto err;
+	}
+
+	preloader_console_init();
+	return;
+err:
+	printf("%s: Error %d\n", __func__, ret);
+
+	/* No way to report error here */
+	hang();
+}
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 45d56cd99e..e55a5c6657 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -3,15 +3,16 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+
 #include <common.h>
 #include <dm.h>
 #include <misc.h>
-#include <ram.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
 #include <asm/setup.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
+#include <spl.h>
 #include <u-boot/sha256.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -59,6 +60,11 @@ out:
 	return 0;
 }
 
+void spl_board_init(void)
+{
+	preloader_console_init();
+}
+
 static void setup_macaddr(void)
 {
 #if CONFIG_IS_ENABLED(CMD_NET)
@@ -91,8 +97,6 @@ static void setup_macaddr(void)
 	mac_addr[0] |= 0x02;  /* set local assignment bit (IEEE802) */
 	eth_env_set_enetaddr("ethaddr", mac_addr);
 #endif
-
-	return;
 }
 
 static void setup_serial(void)
@@ -147,8 +151,6 @@ static void setup_serial(void)
 	env_set("cpuid#", cpuid_str);
 	env_set("serial#", serialno_str);
 #endif
-
-	return;
 }
 
 int misc_init_r(void)

commit 0114ea319993520c4ac7b52239912b4a8b23f9d4
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 19 15:49:14 2017 +0200

    UPSTREAM: rockchip: pinctrl: rk3368: add pinctrl for SDMMC0
    
    Apparently, our earlier assumption that the BROM will always set up
    the iomux for SDcard communication does not always hold true: when
    booting U-Boot from the on-module (on the RK3368-uQ7) eMMC, the SDcard
    pins are not set up and need to be configured by the pinctrl driver to
    allow SD card access.
    
    This change implements support for setting up the SDMMC pins in
    pinctrl for the RK3368.
    
    Change-Id: I41d4ccc546e5256713edc162bb7e3ec622843c16
    Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fd0a1ba52ec65e82caf163d0074e768c3abc57ae)

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
index b1f5704164..25249e377a 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
@@ -208,6 +208,29 @@ enum {
 	GPIO2A0_FLASH_CSN0      = (1 << GPIO2A0_SHIFT),
 };
 
+/*GRF_GPIO2B_IOMUX*/
+enum {
+	GPIO2B3_SHIFT           = 6,
+	GPIO2B3_MASK            = GENMASK(GPIO2B3_SHIFT + 1, GPIO2B3_SHIFT),
+	GPIO2B3_GPIO            = 0,
+	GPIO2B3_SDMMC0_DTECTN   = (1 << GPIO2B3_SHIFT),
+
+	GPIO2B2_SHIFT           = 4,
+	GPIO2B2_MASK            = GENMASK(GPIO2B2_SHIFT + 1, GPIO2B2_SHIFT),
+	GPIO2B2_GPIO            = 0,
+	GPIO2B2_SDMMC0_CMD      = (1 << GPIO2B2_SHIFT),
+
+	GPIO2B1_SHIFT           = 2,
+	GPIO2B1_MASK            = GENMASK(GPIO2B1_SHIFT + 1, GPIO2B1_SHIFT),
+	GPIO2B1_GPIO            = 0,
+	GPIO2B1_SDMMC0_CLKOUT   = (1 << GPIO2B1_SHIFT),
+
+	GPIO2B0_SHIFT           = 0,
+	GPIO2B0_MASK            = GENMASK(GPIO2B0_SHIFT + 1, GPIO2B0_SHIFT),
+	GPIO2B0_GPIO            = 0,
+	GPIO2B0_SDMMC0_D3       = (1 << GPIO2B0_SHIFT),
+};
+
 /*GRF_GPIO2D_IOMUX*/
 enum {
 	GPIO2D7_SHIFT           = 14,
@@ -580,11 +603,17 @@ static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf, int mmc_id)
 			     GPIO2A4_EMMC_CLKOUT);
 		break;
 	case PERIPH_ID_SDCARD:
-		/*
-		 * We assume that the BROM has already set this up
-		 * correctly for us and that there's nothing to do
-		 * here.
-		 */
+		debug("mmc id = %d setting registers!\n", mmc_id);
+		rk_clrsetreg(&grf->gpio2a_iomux,
+			     GPIO2A5_MASK | GPIO2A7_MASK |
+			     GPIO2A7_MASK,
+			     GPIO2A5_SDMMC0_D0 | GPIO2A6_SDMMC0_D1 |
+			     GPIO2A7_SDMMC0_D2);
+		rk_clrsetreg(&grf->gpio2b_iomux,
+			     GPIO2B0_MASK | GPIO2B1_MASK |
+			     GPIO2B2_MASK | GPIO2B3_MASK,
+			     GPIO2B0_SDMMC0_D3 | GPIO2B1_SDMMC0_CLKOUT |
+			     GPIO2B2_SDMMC0_CMD | GPIO2B3_SDMMC0_DTECTN);
 		break;
 	default:
 		debug("mmc id = %d iomux error!\n", mmc_id);

commit c47ae866ef76581daf5ea0b368027b6e7d72664a
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Fri Sep 15 15:57:15 2017 +0200

    UPSTREAM: rockchip: board: lion-rk3368: avoid ATF overwriting active SPL stage
    
    The RK3368-uQ7 ATF has been moved back to 0x100000 (1MB from the start
    of DRAM) to avoid it overwriting the active SPL stage during FIT image
    loading.  This change adapts the .its to match up (again) with our ATF
    repository for the RK3368-uQ7.
    
    Change-Id: I53e7babad41367d1178a65934a0e2fb3af457a28
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6696fe5a2fac33fa9c1ed65d7f1b1af095129da9)

diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
index 405750f351..60daddcc44 100644
--- a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
+++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its
@@ -27,8 +27,8 @@
 			type = "firmware";
 			arch = "arm64";
 			compression = "none";
-			load = <0x00010000>;
-			entry = <0x00010000>;
+			load = <0x00100000>;
+			entry = <0x00100000>;
 		};
 
 		fdt {

commit 5282fce2642a316bc35716405a05ff9cb0cca761
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:13 2017 +0530

    UPSTREAM: rk3288: vyasa: Add falcon mode support
    
    Add Falcon mode support in vyasa rk3288 board.
    
    Change-Id: I720f05f76ce553464bd9ac723edffecbfdf23402
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5d94ebedcd192bcceabcd1ca90f417f1130e46dc)

diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
index ceee42c16e..7985671fbd 100644
--- a/board/amarula/vyasa-rk3288/vyasa-rk3288.c
+++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
@@ -5,3 +5,16 @@
  */
 
 #include <common.h>
+
+#ifndef CONFIG_TPL_BUILD
+#include <spl.h>
+
+int spl_start_uboot(void)
+{
+        /* break into full u-boot on 'c' */
+        if (serial_tstc() && serial_getc() == 'c')
+                return 1;
+
+        return 0;
+}
+#endif
diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h
index 9d6c80f549..8774e42430 100644
--- a/include/configs/vyasa-rk3288.h
+++ b/include/configs/vyasa-rk3288.h
@@ -20,4 +20,21 @@
 #define CONFIG_SYS_MMC_ENV_DEV 1
 #undef CONFIG_CMD_USB_MASS_STORAGE
 
+#ifndef CONFIG_TPL_BUILD
+
+#define CONFIG_SPL_OS_BOOT
+
+/* Falcon Mode */
+#define CONFIG_SPL_FS_LOAD_ARGS_NAME	"args"
+#define CONFIG_SPL_FS_LOAD_KERNEL_NAME	"uImage"
+#define CONFIG_CMD_SPL
+#define CONFIG_SYS_SPL_ARGS_ADDR	0x0ffe5000
+#define CONFIG_CMD_SPL_WRITE_SIZE      (128 * SZ_1K)
+
+/* Falcon Mode - MMC support: args@1MB kernel@2MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
+#endif
+
 #endif

commit e64e037f9b672db2be4b2ff0ea24a85d7ef48ab4
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:12 2017 +0530

    rk3288: vyasa: Add TPL support
    
    Since the size of SPL can't be exceeded 0x8000 bytes in RK3288,
    it is not possible add new SPL features like Falcon mode or etc.
    
    So add TPL stage so-that adding new features to SPL is possible.
    - TPL: DRAM init, clocks
    - SPL: MMC, falcon, etc
    
    Change-Id: I8e570e6a552b37dbe7e3c9cc879f70ff64f2354e
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (update tpl text base, add memcpy/memset back)
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 532cb7f5ada0cc3779c33606d760ec99f6aa847a)

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 4ea4ff43ff..6c4954b9e0 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -12,6 +12,7 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 75e82b1827..cc4299f5eb 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -204,12 +204,15 @@ void board_init_f(ulong dummy)
 	}
 #endif
 
+#if !defined(CONFIG_SUPPORT_TPL)
 	debug("\nspl:init dram\n");
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		debug("DRAM init failed: %d\n", ret);
 		return;
 	}
+#endif
+
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c b/arch/arm/mach-rockchip/rk3288-board-tpl.c
new file mode 100644
index 0000000000..150beea02e
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2017 Amarula Solutions
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3288.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3288.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE		0xff770000
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	/* Example code showing how to enable the debug UART on RK3288 */
+	/* Enable early UART on the RK3288 */
+	struct rk3288_grf * const grf = (void *)GRF_BASE;
+
+	rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
+		     GPIO7C6_MASK << GPIO7C6_SHIFT,
+		     GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+		     GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	rockchip_timer_init();
+	configure_l2ctlr();
+
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		debug("CLK init failed: %d\n", ret);
+		return;
+	}
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+}
+
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+void spl_board_init(void)
+{
+	puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+				U_BOOT_TIME ")\n");
+}
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 8a51aca86f..bbab13f304 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -98,6 +98,22 @@ config TARGET_POPMETAL_RK3288
 config TARGET_VYASA_RK3288
 	bool "Vyasa-RK3288"
 	select BOARD_LATE_INIT
+	select TPL
+	select SUPPORT_TPL
+	select TPL_DM
+	select TPL_REGMAP
+	select TPL_SYSCON
+	select TPL_CLK
+	select TPL_RAM
+	select TPL_OF_PLATDATA
+	select TPL_OF_CONTROL
+	select TPL_BOOTROM_SUPPORT
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
+	select ROCKCHIP_BROM_HELPER
+	select TPL_DRIVERS_MISC_SUPPORT
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
+	select TPL_SERIAL_SUPPORT
 	help
 	  Vyasa is a RK3288-based development board with 2 USB ports,
 	  HDMI, VGA, micro-SD card, audio, WiFi  and Gigabit Ethernet, It
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 7db7b0b6f9..711d10e0f6 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -1,8 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3288=y
 CONFIG_TARGET_VYASA_RK3288=y
+CONFIG_TPL_TEXT_BASE=0xff704000
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"
 CONFIG_DEBUG_UART=y
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 2fc6ed0200..4a84f3b22e 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -150,6 +150,24 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, th
       debug uart must be disabled
 
 
+Booting from an SD card on RK3288 with TPL
+==========================================
+
+Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
+new SPL features like Falcon mode or etc.
+
+So introduce TPL so-that adding new features to SPL is possible because now TPL should
+run minimal with code like DDR, clock etc and rest of new features in SPL.
+
+As of now TPL is added on Vyasa-RK3288 board.
+
+To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
+
+   ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&
+    cat ./spl/u-boot-spl-dtb.bin >> out &&
+    sudo dd if=out of=/dev/mmcblk0 seek=64 &&
+    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256
+
 Booting from an SD card on RK3188
 =================================
 
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 2d1a41a040..32edcc549e 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -31,13 +31,18 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x00100000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
-#define CONFIG_SPL_TEXT_BASE		0xff704000
 
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000
 
 #define CONFIG_ROCKUSB_G_DNL_PID	0x320A
 
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
+# define CONFIG_SPL_TEXT_BASE		0x0
+#else
+# define CONFIG_SPL_TEXT_BASE		0xff704000
+#endif
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 636c3e18b7d1968b68b44baed41874f3b040a9d3
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:11 2017 +0530

    UPSTREAM: armv7: rk3288: Move configure_l2ctlr to common
    
    configure_l2ctlr will be shared between SPL and TPL so
    move them into asm/arch/sys_proto.h
    
    Change-Id: I0702c88b1569abb1b65c29923cedbbccaa28a33a
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a982d5156db0587f5118a118c7e9f18d4c70891d)

diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h
index 35423e1ba0..e428d59336 100644
--- a/arch/arm/include/asm/arch-rockchip/sys_proto.h
+++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h
@@ -7,4 +7,27 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
+#ifdef CONFIG_ROCKCHIP_RK3288
+#include <asm/armv7.h>
+
+static void configure_l2ctlr(void)
+{
+	uint32_t l2ctlr;
+
+	l2ctlr = read_l2ctlr();
+	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
+
+	/*
+	* Data RAM write latency: 2 cycles
+	* Data RAM read latency: 2 cycles
+	* Data RAM setup latency: 1 cycle
+	* Tag RAM write latency: 1 cycle
+	* Tag RAM read latency: 1 cycle
+	* Tag RAM setup latency: 1 cycle
+	*/
+	l2ctlr |= (1 << 3 | 1 << 0);
+	write_l2ctlr(l2ctlr);
+}
+#endif /* CONFIG_ROCKCHIP_RK3288 */
+
 #endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6396d80a49..75e82b1827 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -13,7 +13,6 @@
 #include <malloc.h>
 #include <ram.h>
 #include <spl.h>
-#include <asm/armv7.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
@@ -21,6 +20,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/sdram.h>
+#include <asm/arch/sys_proto.h>
 #include <asm/arch/timer.h>
 #include <dm/pinctrl.h>
 #include <dm/root.h>
@@ -81,25 +81,6 @@ u32 spl_boot_mode(const u32 boot_device)
 	return MMCSD_MODE_RAW;
 }
 
-static void configure_l2ctlr(void)
-{
-	uint32_t l2ctlr;
-
-	l2ctlr = read_l2ctlr();
-	l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
-
-	/*
-	* Data RAM write latency: 2 cycles
-	* Data RAM read latency: 2 cycles
-	* Data RAM setup latency: 1 cycle
-	* Tag RAM write latency: 1 cycle
-	* Tag RAM read latency: 1 cycle
-	* Tag RAM setup latency: 1 cycle
-	*/
-	l2ctlr |= (1 << 3 | 1 << 0);
-	write_l2ctlr(l2ctlr);
-}
-
 #ifdef CONFIG_SPL_MMC_SUPPORT
 static int configure_emmc(struct udevice *pinctrl)
 {

commit 2bae3f50deb8e53e4d934c1ce62fc1ee9798b0b8
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Wed Sep 27 23:03:10 2017 +0530

    UPSTREAM: armv7: Move L2CTLR read/write to common
    
    L2CTLR read/write functions are common to armv7 so, move
    them in to include/asm/armv7.h and use them where ever it need.
    
    Cc: Tom Warren <twarren@nvidia.com>
    Change-Id: I1321528829cb523dbb2500f64e4b18d70f7ec5bc
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    [Backed out the change to arch/arm/mach-tegra/cache.c:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d9a7dcf5b8da5460a08305cdc9452f4e62dd34e5)

diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index a20702e612..efc515eb33 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -61,6 +61,27 @@
 #include <asm/io.h>
 #include <asm/barriers.h>
 
+/* read L2 control register (L2CTLR) */
+static inline uint32_t read_l2ctlr(void)
+{
+	uint32_t val = 0;
+
+	asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
+
+	return val;
+}
+
+/* write L2 control register (L2CTLR) */
+static inline void write_l2ctlr(uint32_t val)
+{
+	/*
+	 * Note: L2CTLR can only be written when the L2 memory system
+	 * is idle, ie before the MMU is enabled.
+	 */
+	asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
+	isb();
+}
+
 /*
  * Workaround for ARM errata # 798870
  * Set L2ACTLR[7] to reissue any memory transaction in the L2 that has been
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6fa4909872..6396d80a49 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -13,6 +13,7 @@
 #include <malloc.h>
 #include <ram.h>
 #include <spl.h>
+#include <asm/armv7.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/bootrom.h>
@@ -80,27 +81,6 @@ u32 spl_boot_mode(const u32 boot_device)
 	return MMCSD_MODE_RAW;
 }
 
-/* read L2 control register (L2CTLR) */
-static inline uint32_t read_l2ctlr(void)
-{
-	uint32_t val = 0;
-
-	asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
-
-	return val;
-}
-
-/* write L2 control register (L2CTLR) */
-static inline void write_l2ctlr(uint32_t val)
-{
-	/*
-	 * Note: L2CTLR can only be written when the L2 memory system
-	 * is idle, ie before the MMU is enabled.
-	 */
-	asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
-	isb();
-}
-
 static void configure_l2ctlr(void)
 {
 	uint32_t l2ctlr;

commit aa6addee1a21f7ae911178dc5b4d1f3faa8008c7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 12:48:12 2017 +0200

    rockchip: rk3399: spl: convert to using BOOT_DEVICE_BOOTROM
    
    Instead of directly calling into the back-to-bootrom code, the RK3399
    common SPL implementation now uses BOOT_DEVICE_BOOTROM to trigger a
    transfer back into the bootrom.
    
    With this factored out, the spl_board_init function can not be
    customised for each RK3399 board.
    
    Change-Id: I80166207e01646445bbafe4f27cf47008f010cf4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cbe18f10e6943db628e779da03dad97a93c627f3)

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index 0b22526cf8..d3841359c9 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -1,10 +1,12 @@
 /*
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/arch/bootrom.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
@@ -19,9 +21,19 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
 u32 spl_boot_device(void)
 {
-	return BOOT_DEVICE_MMC1;
+	u32 boot_device = BOOT_DEVICE_MMC1;
+
+	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
+		return BOOT_DEVICE_BOOTROM;
+
+	return boot_device;
 }
 
 u32 spl_boot_mode(const u32 boot_device)
@@ -155,9 +167,6 @@ void spl_board_init(void)
 	}
 
 	preloader_console_init();
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-#endif
 
 	return;
 err:

commit 28ac74a2f9e4d46db4037f5a018e1b168697da01
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 27 13:27:38 2017 +0200

    UPSTREAM: rockchip: lion-rk3368: defconfig: remove duplicate CONFIG_ENV_IS_IN_MMC
    
    Remove a duplicate CONFIG_ENV_IS_IN_MMC assignment for the lion-rk3368
    defconfig.
    
    Change-Id: I3c2e615c0290fdd10a6202571edffdd1ae04752c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8d35f3694f89244c546ea0909e85cc2ec8a1e87e)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index ea8a2d7824..66a3cd5fac 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -23,7 +23,6 @@ CONFIG_BOOTSTAGE=y
 CONFIG_SPL_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_BOOTSTAGE_FDT=y
-CONFIG_ENV_IS_IN_MMC=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_SPL=y

commit bb0d14804ee5617ec2c4ee93442cd5a2b00333d4
Author: Rob Clark <robdclark@gmail.com>
Date:   Wed Sep 13 18:12:20 2017 -0400

    UPSTREAM: dm: video: Fix cache flushes
    
    Content can come to screen via putc() and we cannot always rely on
    updates ending with a puts().  This is the case with efi_console output
    to vidconsole.  Fixes corruption with Shell.efi.
    
    Change-Id: I081692793c0a7179a91446460a382259b3db9069
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 889808da9b78d193e5a117a6bf6bc9366d6a3f30)

diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
index 53f4eddd42..6f040660c3 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -163,6 +163,7 @@ static void vidconsole_putc(struct stdio_dev *sdev, const char ch)
 	struct udevice *dev = sdev->priv;
 
 	vidconsole_put_char(dev, ch);
+	video_sync(dev->parent);
 }
 
 static void vidconsole_puts(struct stdio_dev *sdev, const char *s)
@@ -261,6 +262,8 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc,
 		vidconsole_put_char(dev, *s);
 	video_sync(dev->parent);
 
+	video_sync(dev->parent);
+
 	return 0;
 }
 

commit f8cd15a1599ce6088e45db8aaa0ad0ad464502d0
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Tue Sep 19 13:29:45 2017 +0900

    UPSTREAM: spl: spl_mmc: add __maybe_unused to mmc_load_image_raw_sector()
    
    If there are no CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION,
    CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR and CONFIG_SPL_OS_BOOT,
    there is unused-function build warning. Add __maybe_unused macro
    to remove the warning.
    
    Change-Id: Ibd880ebc42fdb4610106a8f53645bfd61825dc9e
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b016b585425b66ea53eef6b8600aff78a4205b9e)

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index b2cccc6c6e..b57e0b04e4 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -52,8 +52,9 @@ static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
 	return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf);
 }
 
-static int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
-				     struct mmc *mmc, unsigned long sector)
+static __maybe_unused
+int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
+			      struct mmc *mmc, unsigned long sector)
 {
 	unsigned long count;
 	struct image_header *header;

commit 80553dd1d86b1f3fdc4f7669fc3d4cf32107ab99
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Mon Jul 31 18:08:10 2017 +0900

    UPSTREAM: usb: dwc2: Align size of invalidating dcache before starting DMA
    
    During using dwc2 usb gadget, if usb message size is too small,
    following cache misaligned warning is shown:
    
       CACHE: Misaligned operation at range [bfdbcb00, bfdbcb04]
    
    Align size of invalidating dcache before starting DMA to remove the
    warning.
    
    Change-Id: Ibd9040be45da03174d63313e302b994720c7edd3
    Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a939af0c748e2ea1eeb8cf47fa9771a95786de70)

diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 554936a493..f995c350d2 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -111,7 +111,8 @@ static int setdma_rx(struct dwc2_ep *ep, struct dwc2_request *req)
 	ctrl =  readl(&reg->out_endp[ep_num].doepctl);
 
 	invalidate_dcache_range((unsigned long) ep->dma_buf,
-				(unsigned long) ep->dma_buf + ep->len);
+				(unsigned long) ep->dma_buf +
+				ROUND(ep->len, CONFIG_SYS_CACHELINE_SIZE));
 
 	writel((unsigned int) ep->dma_buf, &reg->out_endp[ep_num].doepdma);
 	writel(DOEPT_SIZ_PKT_CNT(pktcnt) | DOEPT_SIZ_XFER_SIZE(length),

commit 115142eae565aeebfeb2f07bf2e21418df3d5f3e
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Wed Sep 13 01:19:43 2017 -0700

    UPSTREAM: usb: kbd: Set a default polling mechanism for USB keyboard
    
    The choice of "USB keyboard polling" cannot be optional as without
    one mechanism being set, it just doesn't work. Set the default one
    to CONFIG_SYS_USB_EVENT_POLL.
    
    Fixes: ecad7051 ("configs: Migrate all of the existing USB symbols, except fastboot")
    Change-Id: I9c54076edba03ca9fc10801f9f4bebb54ffd0ef9
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2e5026a2f022f1c5ab5e879684a895ccdca7690c)

diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig
index 82da854386..37f78a4811 100644
--- a/configs/Cyrus_P5020_defconfig
+++ b/configs/Cyrus_P5020_defconfig
@@ -34,5 +34,4 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig
index 0fc9a07548..d33b514ee0 100644
--- a/configs/Cyrus_P5040_defconfig
+++ b/configs/Cyrus_P5040_defconfig
@@ -34,5 +34,4 @@ CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig
index fde837c011..c71d5b18e1 100644
--- a/configs/MPC8610HPCD_defconfig
+++ b/configs/MPC8610HPCD_defconfig
@@ -22,5 +22,4 @@ CONFIG_SCSI=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig
index 7318e723a8..9949e8b699 100644
--- a/configs/MPC8641HPCN_36BIT_defconfig
+++ b/configs/MPC8641HPCN_36BIT_defconfig
@@ -21,5 +21,4 @@ CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig
index def36e4171..c8440d2584 100644
--- a/configs/MPC8641HPCN_defconfig
+++ b/configs/MPC8641HPCN_defconfig
@@ -21,5 +21,4 @@ CONFIG_PHYLIB=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index b2284acc34..13f2a3b849 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -54,7 +54,6 @@ CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig
index 239605dadf..7165749cfb 100644
--- a/configs/apalis_imx6_nospl_com_defconfig
+++ b/configs/apalis_imx6_nospl_com_defconfig
@@ -43,7 +43,6 @@ CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig
index 1bc05d7266..0ad7674ee5 100644
--- a/configs/apalis_imx6_nospl_it_defconfig
+++ b/configs/apalis_imx6_nospl_it_defconfig
@@ -43,7 +43,6 @@ CONFIG_NETDEVICES=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 7d1e709d4c..7e100869a4 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -52,7 +52,6 @@ CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig
index 6877993088..ba4b2dd9d4 100644
--- a/configs/colibri_imx6_nospl_defconfig
+++ b/configs/colibri_imx6_nospl_defconfig
@@ -41,7 +41,6 @@ CONFIG_PHY_MICREL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 40d7393859..8804121bf4 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -74,7 +74,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 5490e3546b..27171fbddf 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -34,6 +34,5 @@ CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_OF_LIBFDT=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index 2345697701..03705975bf 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -26,7 +26,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index bb56a9e4e1..31d67ccdc9 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -28,7 +28,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 6edacd69a2..1ac3a96e25 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -28,7 +28,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 2e81966c14..87e88223ee 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -26,7 +26,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 72600afea8..ac0736aa9a 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -176,7 +176,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 325f4ff57f..77cca3d00d 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -161,7 +161,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/sandbox_noblk_defconfig b/configs/sandbox_noblk_defconfig
index e152917fe4..53c2fb8442 100644
--- a/configs/sandbox_noblk_defconfig
+++ b/configs/sandbox_noblk_defconfig
@@ -169,7 +169,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index be4a85da33..0f1da0b229 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -179,7 +179,6 @@ CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_DM_VIDEO=y
 CONFIG_CONSOLE_ROTATION=y
 CONFIG_CONSOLE_TRUETYPE=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index ea4546bce4..810cfaa498 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -36,7 +36,6 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_DM_VIDEO=y
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index 42353f034e..b11dab1196 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -34,7 +34,6 @@ CONFIG_USB_ULPI_VIEWPORT=y
 CONFIG_USB_ULPI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_DM_VIDEO=y
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 62126aad2f..e7658b4d95 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -75,7 +75,7 @@ if USB_KEYBOARD
 
 choice
 	prompt "USB keyboard polling"
-	optional
+	default SYS_USB_EVENT_POLL
 	---help---
 	  Enable a polling mechanism for USB keyboard.
 

commit 97ff91fa1d5b4715544aae10250822ea38b2561e
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:28 2017 +0200

    UPSTREAM: usb: host: ehci-generic: convert to livetree
    
    Update the generic EHCI driver to support a live tree.
    
    Change-Id: I07159bf921cda3d42247d2134a4f5a6bd7d65bb5
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6e652e3a7d15b896fd82b717c6eca74b70a33b7a)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 03f8d321af..18e1e0ee88 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -108,7 +108,7 @@ static int ehci_usb_probe(struct udevice *dev)
 		}
 	}
 
-	hccr = map_physmem(devfdt_get_addr(dev), 0x100, MAP_NOCACHE);
+	hccr = map_physmem(dev_read_addr(dev), 0x100, MAP_NOCACHE);
 	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
 				    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 

commit c32504a86a26e7c1ee54f16665c04adf5660e455
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:27 2017 +0200

    UPSTREAM: usb: dwc2: convert to livetree
    
    Update the DWC2 USB driver to support a live tree.
    
    Change-Id: I1b2ccc05a637856cf1af0583985f0f336530121a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a9d3037a8e4f045434184623eadbe86fa3844b28)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 64c42ac471..0ed72d5ae7 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1245,7 +1245,7 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
 	struct dwc2_priv *priv = dev_get_priv(dev);
 	fdt_addr_t addr;
 
-	addr = devfdt_get_addr(dev);
+	addr = dev_read_addr(dev);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 	priv->regs = (struct dwc2_core_regs *)addr;

commit d5c8d3f596cb6351585305b636c6f5c612969b6d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:25 2017 +0200

    UPSTREAM: rockchip: xhci: Convert to livetree
    
    Update the Rockchip xhci wrapper driver to support a live device tree.
    
    Change-Id: Ie5dad13ae0327b7893c1530d7383994a1375d12e
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 32c8eee37fcb88d372410952d3ab88bcf5fdf7e7)

diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
index ec55f4e59f..ca3abffba0 100644
--- a/drivers/usb/host/xhci-rockchip.c
+++ b/drivers/usb/host/xhci-rockchip.c
@@ -6,8 +6,6 @@
  */
 #include <common.h>
 #include <dm.h>
-#include <fdtdec.h>
-#include <libfdt.h>
 #include <malloc.h>
 #include <usb.h>
 #include <watchdog.h>
@@ -46,7 +44,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
 	/*
 	 * Get the base address for XHCI controller from the device node
 	 */
-	plat->hcd_base = devfdt_get_addr(dev);
+	plat->hcd_base = dev_read_addr(dev);
 	if (plat->hcd_base == FDT_ADDR_T_NONE) {
 		error("Can't get the XHCI register base address\n");
 		return -ENXIO;

commit 344f8eb9b9b52892e9b24bd4104b65695df064c9
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:21 2017 -0700

    UPSTREAM: dm: usb: storage: Fix broken read/write when both EHCD and xHCD are enabled
    
    When EHCD and xHCD are enabled at the same time, USB storage device
    driver will fail to read/write from/to the storage device attached
    to the xHCI interface, due to its transfer blocks exceeds the xHCD
    driver limitation.
    
    With driver model, we have an API to get the controller's maximum
    transfer size and we can use that to determine the storage driver's
    capability of read/write.
    
    Note: the non-DM version driver is still broken with xHCD and the
    intent here is not to fix the non-DM one, since the xHCD itself is
    already broken in places like 3.0 hub support, etc.
    
    Change-Id: Id95b187ad7c34d80b236f425cd1cf3da7b954589
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ea7fad91019654fb21e6cd04f963e0482869dba5)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index 957ccdb297..a57570b73f 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -939,10 +939,14 @@ do_retry:
 	return USB_STOR_TRANSPORT_FAILED;
 }
 
-static void usb_stor_set_max_xfer_blk(struct us_data *us)
+static void usb_stor_set_max_xfer_blk(struct usb_device *udev,
+				      struct us_data *us)
 {
 	unsigned short blk;
+	size_t __maybe_unused size;
+	int __maybe_unused ret;
 
+#ifndef CONFIG_DM_USB
 #ifdef CONFIG_USB_EHCI_HCD
 	/*
 	 * The U-Boot EHCI driver can handle any transfer length as long as
@@ -953,6 +957,17 @@ static void usb_stor_set_max_xfer_blk(struct us_data *us)
 #else
 	blk = 20;
 #endif
+#else
+	ret = usb_get_max_xfer_size(udev, (size_t *)&size);
+	if (ret < 0) {
+		/* unimplemented, let's use default 20 */
+		blk = 20;
+	} else {
+		if (size > USHRT_MAX * 512)
+			blk = USHRT_MAX;
+		blk = size / 512;
+	}
+#endif
 
 	us->max_xfer_blk = blk;
 }
@@ -1393,7 +1408,7 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 	}
 
 	/* Set the maximum transfer size per host controller setting */
-	usb_stor_set_max_xfer_blk(ss);
+	usb_stor_set_max_xfer_blk(dev, ss);
 
 	dev->privptr = (void *)ss;
 	return 1;

commit 86b376c416d14915d663218bded3d17b4d5964f1
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:20 2017 -0700

    UPSTREAM: usb: storage: Refactor to use max_xfer_blk from struct us_data
    
    This adds a new memeber max_xfer_blk in struct us_data to record
    the maximum number of transfer blocks for the storage device.
    
    It is set per HCD setting, and so far is to 65535 for EHCD and 20
    for everything else.
    
    Change-Id: I53b942501431471c981b3f82ae1028ecd7b45069
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6158d0b42411165d34635a2ddfea17e12dce3329)

diff --git a/common/usb_storage.c b/common/usb_storage.c
index df0b057308..957ccdb297 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -98,19 +98,9 @@ struct us_data {
 	struct scsi_cmd	*srb;			/* current srb */
 	trans_reset	transport_reset;	/* reset routine */
 	trans_cmnd	transport;		/* transport routine */
+	unsigned short	max_xfer_blk;		/* maximum transfer blocks */
 };
 
-#ifdef CONFIG_USB_EHCI_HCD
-/*
- * The U-Boot EHCI driver can handle any transfer length as long as there is
- * enough free heap space left, but the SCSI READ(10) and WRITE(10) commands are
- * limited to 65535 blocks.
- */
-#define USB_MAX_XFER_BLK	65535
-#else
-#define USB_MAX_XFER_BLK	20
-#endif
-
 #ifndef CONFIG_BLK
 static struct us_data usb_stor[USB_MAX_STOR_DEV];
 #endif
@@ -949,6 +939,23 @@ do_retry:
 	return USB_STOR_TRANSPORT_FAILED;
 }
 
+static void usb_stor_set_max_xfer_blk(struct us_data *us)
+{
+	unsigned short blk;
+
+#ifdef CONFIG_USB_EHCI_HCD
+	/*
+	 * The U-Boot EHCI driver can handle any transfer length as long as
+	 * there is enough free heap space left, but the SCSI READ(10) and
+	 * WRITE(10) commands are limited to 65535 blocks.
+	 */
+	blk = USHRT_MAX;
+#else
+	blk = 20;
+#endif
+
+	us->max_xfer_blk = blk;
+}
 
 static int usb_inquiry(struct scsi_cmd *srb, struct us_data *ss)
 {
@@ -1150,12 +1157,12 @@ static unsigned long usb_stor_read(struct blk_desc *block_dev, lbaint_t blknr,
 		/* XXX need some comment here */
 		retry = 2;
 		srb->pdata = (unsigned char *)buf_addr;
-		if (blks > USB_MAX_XFER_BLK)
-			smallblks = USB_MAX_XFER_BLK;
+		if (blks > ss->max_xfer_blk)
+			smallblks = ss->max_xfer_blk;
 		else
 			smallblks = (unsigned short) blks;
 retry_it:
-		if (smallblks == USB_MAX_XFER_BLK)
+		if (smallblks == ss->max_xfer_blk)
 			usb_show_progress();
 		srb->datalen = block_dev->blksz * smallblks;
 		srb->pdata = (unsigned char *)buf_addr;
@@ -1178,7 +1185,7 @@ retry_it:
 	      start, smallblks, buf_addr);
 
 	usb_disable_asynch(0); /* asynch transfer allowed */
-	if (blkcnt >= USB_MAX_XFER_BLK)
+	if (blkcnt >= ss->max_xfer_blk)
 		debug("\n");
 	return blkcnt;
 }
@@ -1236,12 +1243,12 @@ static unsigned long usb_stor_write(struct blk_desc *block_dev, lbaint_t blknr,
 		 */
 		retry = 2;
 		srb->pdata = (unsigned char *)buf_addr;
-		if (blks > USB_MAX_XFER_BLK)
-			smallblks = USB_MAX_XFER_BLK;
+		if (blks > ss->max_xfer_blk)
+			smallblks = ss->max_xfer_blk;
 		else
 			smallblks = (unsigned short) blks;
 retry_it:
-		if (smallblks == USB_MAX_XFER_BLK)
+		if (smallblks == ss->max_xfer_blk)
 			usb_show_progress();
 		srb->datalen = block_dev->blksz * smallblks;
 		srb->pdata = (unsigned char *)buf_addr;
@@ -1263,7 +1270,7 @@ retry_it:
 	      PRIxPTR "\n", start, smallblks, buf_addr);
 
 	usb_disable_asynch(0); /* asynch transfer allowed */
-	if (blkcnt >= USB_MAX_XFER_BLK)
+	if (blkcnt >= ss->max_xfer_blk)
 		debug("\n");
 	return blkcnt;
 
@@ -1384,6 +1391,10 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
 		ss->irqmaxp = usb_maxpacket(dev, ss->irqpipe);
 		dev->irq_handle = usb_stor_irq;
 	}
+
+	/* Set the maximum transfer size per host controller setting */
+	usb_stor_set_max_xfer_blk(ss);
+
 	dev->privptr = (void *)ss;
 	return 1;
 }

commit 50293ea8b3ec1a31b556200be372e33894e2ed54
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:19 2017 -0700

    UPSTREAM: dm: usb: ehci: Implement get_max_xfer_size() operation
    
    EHCD can handle any transfer length as long as there is enough free
    heap space left, hence set the theoretical max number SIZE_MAX.
    
    Change-Id: I58711c5a6348b525caf950748d7c3338997e146a
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a23aa66baa3725e8707da46b18c645ad1a7243a0)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 3243c1d1cf..be3e842dcc 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1596,6 +1596,17 @@ static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
 	return _ehci_destroy_int_queue(udev, queue);
 }
 
+static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
+{
+	/*
+	 * EHCD can handle any transfer length as long as there is enough
+	 * free heap space left, hence set the theoretical max number here.
+	 */
+	*size = SIZE_MAX;
+
+	return 0;
+}
+
 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
 		  struct ehci_hcor *hcor, const struct ehci_ops *ops,
 		  uint tweaks, enum usb_init_type init)
@@ -1658,6 +1669,7 @@ struct dm_usb_ops ehci_usb_ops = {
 	.create_int_queue = ehci_create_int_queue,
 	.poll_int_queue = ehci_poll_int_queue,
 	.destroy_int_queue = ehci_destroy_int_queue,
+	.get_max_xfer_size  = ehci_get_max_xfer_size,
 };
 
 #endif

commit dbdd01408220a5006ca6890c3ab778fd52493a42
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:18 2017 -0700

    UPSTREAM: dm: usb: xhci: Implement get_max_xfer_size() operation
    
    xHCD allocates one segment which includes 64 TRBs for each endpoint
    and the last TRB in this segment is configured as a link TRB to form
    a TRB ring. Each TRB can transfer up to 64K bytes, however data
    buffers referenced by transfer TRBs shall not span 64KB boundaries.
    Hence the maximum number of TRBs we can use in one transfer is 62.
    
    Change-Id: I7ea20b7805fe4da11343d38001a414b95751c7d5
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 022ceacaf8a6a67f86f0a5ed8f6ce6b2f6ab73a4)

diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 9b82ee5c60..04eb1eb14d 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -1228,6 +1228,20 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
 	return xhci_configure_endpoints(udev, false);
 }
 
+static int xhci_get_max_xfer_size(struct udevice *dev, size_t *size)
+{
+	/*
+	 * xHCD allocates one segment which includes 64 TRBs for each endpoint
+	 * and the last TRB in this segment is configured as a link TRB to form
+	 * a TRB ring. Each TRB can transfer up to 64K bytes, however data
+	 * buffers referenced by transfer TRBs shall not span 64KB boundaries.
+	 * Hence the maximum number of TRBs we can use in one transfer is 62.
+	 */
+	*size = (TRBS_PER_SEGMENT - 2) * TRB_MAX_BUFF_SIZE;
+
+	return 0;
+}
+
 int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
 		  struct xhci_hcor *hcor)
 {
@@ -1281,6 +1295,7 @@ struct dm_usb_ops xhci_usb_ops = {
 	.interrupt = xhci_submit_int_msg,
 	.alloc_device = xhci_alloc_device,
 	.update_hub_device = xhci_update_hub_device,
+	.get_max_xfer_size  = xhci_get_max_xfer_size,
 };
 
 #endif

commit 51da7f21678203a5c13c5383e1a9619bb52f191d
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Thu Sep 7 06:13:17 2017 -0700

    UPSTREAM: dm: usb: Add a new USB controller operation 'get_max_xfer_size'
    
    The HCD may have limitation on the maximum bytes to be transferred
    in a USB transfer. USB class driver needs to be aware of this.
    
    Change-Id: I6084946910810d5dbbe66a9191e6da768b084fe6
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3e59f59015e39ceb870fa8a7a12e0464e775512b)

diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 0b8a501ce8..bc44fc3394 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -150,6 +150,17 @@ int usb_update_hub_device(struct usb_device *udev)
 	return ops->update_hub_device(bus, udev);
 }
 
+int usb_get_max_xfer_size(struct usb_device *udev, size_t *size)
+{
+	struct udevice *bus = udev->controller_dev;
+	struct dm_usb_ops *ops = usb_get_ops(bus);
+
+	if (!ops->get_max_xfer_size)
+		return -ENOSYS;
+
+	return ops->get_max_xfer_size(bus, size);
+}
+
 int usb_stop(void)
 {
 	struct udevice *bus;
diff --git a/include/usb.h b/include/usb.h
index fad04016a3..0ddc0822b4 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -766,6 +766,14 @@ struct dm_usb_ops {
 	 * representation of this hub can be updated (xHCI)
 	 */
 	int (*update_hub_device)(struct udevice *bus, struct usb_device *udev);
+
+	/**
+	 * get_max_xfer_size() - Get HCD's maximum transfer bytes
+	 *
+	 * The HCD may have limitation on the maximum bytes to be transferred
+	 * in a USB transfer. USB class driver needs to be aware of this.
+	 */
+	int (*get_max_xfer_size)(struct udevice *bus, size_t *size);
 };
 
 #define usb_get_ops(dev)	((struct dm_usb_ops *)(dev)->driver->ops)
@@ -939,7 +947,7 @@ int usb_new_device(struct usb_device *dev);
 int usb_alloc_device(struct usb_device *dev);
 
 /**
- * update_hub_device() - Update HCD's internal representation of hub
+ * usb_update_hub_device() - Update HCD's internal representation of hub
  *
  * After a hub descriptor is fetched, notify HCD so that its internal
  * representation of this hub can be updated.
@@ -949,6 +957,18 @@ int usb_alloc_device(struct usb_device *dev);
  */
 int usb_update_hub_device(struct usb_device *dev);
 
+/**
+ * usb_get_max_xfer_size() - Get HCD's maximum transfer bytes
+ *
+ * The HCD may have limitation on the maximum bytes to be transferred
+ * in a USB transfer. USB class driver needs to be aware of this.
+ *
+ * @dev:		USB device
+ * @size:		maximum transfer bytes
+ * @return 0 if OK, -ve on error
+ */
+int usb_get_max_xfer_size(struct usb_device *dev, size_t *size);
+
 /**
  * usb_emul_setup_device() - Set up a new USB device emulation
  *

commit 1d5ed4d069cd6640c974cbefcef851098ff2eb3d
Author: Marek Vasut <marek.vasut@gmail.com>
Date:   Tue Sep 12 23:02:08 2017 +0200

    UPSTREAM: usb: xhci: Set number of event segments and entries to 1
    
    The Linux kernel driver sets the number of event segments and entries
    to 1 , while the initial import of the xhci code set that values to 3
    for reasons unknown. While most controllers are fine with more event
    segments with more entries, there are standard-conformant controllers
    (ie. Renesas RCar xHCI) which only support 1 event segment.
    
    Set the number of event segments and event entries back to 1 to allow
    such controllers to work with U-Boot xHCI stack. Note that the Renesas
    controller correctly indicates ERST Max = 1 in HCSPARAMS2[7:4] .
    
    Change-Id: I378b544259833998b54b1e78e8dc0daa3e0d0f3f
    Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
    Cc: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7489d22a3c73b527c21c147f3547e8cc02484e47)

diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index a497d9d830..3377450fca 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1045,9 +1045,9 @@ struct xhci_scratchpad {
  * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
  * meaning 64 ring segments.
  * Initial allocated size of the ERST, in number of entries */
-#define	ERST_NUM_SEGS	3
+#define	ERST_NUM_SEGS	1
 /* Initial number of event segment rings allocated */
-#define	ERST_ENTRIES	3
+#define	ERST_ENTRIES	1
 /* Initial allocated size of the ERST, in number of entries */
 #define	ERST_SIZE	64
 /* Poll every 60 seconds */

commit 31526294759f264599288515e4268cb85034895d
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Sep 21 19:03:06 2017 +0200

    UPSTREAM: GPT: incomplete initialization in allocate_disk_part
    
    memset(newpart, '\0', sizeof(newpart));
    only initializes the firest 4 or 8 bytes of *newpart and not the whole
    structure disk_part.
    
    We should use sizeof(struct disk_part).
    
    Instead of malloc and memset we can use calloc.
    
    Identified by cppcheck.
    
    Fixes: 09a49930e41 GPT: read partition table from device into a data structure
    Change-Id: Ifc937b64f6ac6abc56c0c6bb3d094c2316b9268e
    Reported-by: Coverity (CID: 167228)
    Cc: Stefan Roese <sr@denx.de>
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f66bc0e0beeff7fa27c29f740d2f314d63b3346d)

diff --git a/cmd/gpt.c b/cmd/gpt.c
index 638aa19826..d4406e3120 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -190,10 +190,9 @@ static void del_gpt_info(void)
 static struct disk_part *allocate_disk_part(disk_partition_t *info, int partnum)
 {
 	struct disk_part *newpart;
-	newpart = malloc(sizeof(*newpart));
+	newpart = calloc(1, sizeof(struct disk_part));
 	if (!newpart)
 		return ERR_PTR(-ENOMEM);
-	memset(newpart, '\0', sizeof(newpart));
 
 	newpart->gpt_part_info.start = info->start;
 	newpart->gpt_part_info.size = info->size;

commit f8470aee13947684417f5422a2df50493bb471a1
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 23:14:33 2017 -0400

    UPSTREAM: tools/mkimage: Make the path to the dtc binary that mkimage calls configurable
    
    In some cases, such as FreeBSD, the path to an alternative dtc needs to
    be used.  Rather than override the one given in the Makefile on the
    command line, make this part of the build configuration.
    
    Change-Id: Ib4e2b2603f22098edb11bf3f03be32a86b2d2f1a
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1f6049e2501b5c35c61435dbc05ba96743202674)

diff --git a/dts/Kconfig b/dts/Kconfig
index 44fc9fe36d..4ee0510943 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -170,3 +170,12 @@ config TPL_OF_PLATDATA
 	  information.
 
 endmenu
+
+config MKIMAGE_DTC_PATH
+	string "Path to dtc binary for use within mkimage"
+	default "dtc"
+	help
+	  The mkimage host tool will, in order to generate FIT images make
+	  calls to the dtc application in order to create the output.  In
+	  some cases the system dtc may not support all required features
+	  and the path to a different version should be given here.
diff --git a/tools/Makefile b/tools/Makefile
index 8e1009bf6c..ff7edb02e6 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -175,7 +175,7 @@ HOSTCFLAGS_rsa-sign.o += -Wno-deprecated-declarations
 endif
 endif
 
-HOSTCFLAGS_fit_image.o += -DMKIMAGE_DTC=\"$(DTC)\"
+HOSTCFLAGS_fit_image.o += -DMKIMAGE_DTC=\"$(CONFIG_MKIMAGE_DTC_PATH)\"
 
 HOSTLOADLIBES_dumpimage := $(HOSTLOADLIBES_mkimage)
 HOSTLOADLIBES_fit_info := $(HOSTLOADLIBES_mkimage)

commit 21a28542181c4aaa118c9192cacb03d8d0f8741d
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Sep 15 13:15:25 2017 -0400

    UPSTREAM: Makefile: Update minimum dtc version to 1.4.3
    
    With support for overlays and calling the -@ flag to dtc we need to have
    at least 1.4.3 available now.
    
    Cc: Simon Glass <sjg@chromium.org>
    Change-Id: I4dbad21727ce23d87faeec55073231081b151a92
    Reported-by: Stephen Warren <swarren@wwwdotorg.org>
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2fa73e784da105419b7d9d07d8f9d4a79afe531a)

diff --git a/scripts/dtc-version.sh b/scripts/dtc-version.sh
index e8c94d390b..0744c39eb0 100755
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -2,8 +2,8 @@
 #
 # dtc-version dtc-command
 #
-# Prints the dtc version of `dtc-command' in a canonical 4-digit form
-# such as `0222' for binutils 2.22
+# Prints the dtc version of `dtc-command' in a canonical 6-digit form
+# such as `010404'  for dtc 1.4.4
 #
 
 dtc="$*"
@@ -16,5 +16,6 @@ fi
 
 MAJOR=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 1)
 MINOR=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 2)
+PATCH=$($dtc -v | head -1 | awk '{print $NF}' | cut -d . -f 3 | cut -d - -f 1)
 
-printf "%02d%02d\\n" $MAJOR $MINOR
+printf "%02d%02d%02d\\n" $MAJOR $MINOR $PATCH

commit 5821df21ae36d9ef252d346a5abb76be773c5d69
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 13:00:57 2017 -0400

    UPSTREAM: dtc: Switch to building and using our own dtc unless provided
    
    This makes us act like the Linux Kernel does and allow for dtc to be
    provided externally but otherwise we use the version of dtc that is
    included in the sources.  This in turn means that we can drop the
    checkdtc logic.  We select DTC in the cases where we will need the dtc
    tool provided.
    
    Change-Id: I2b396c725c0a89a81f0cf8397367a7d41b70b641
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 36dd5f1b8abcd0aa5f8490b3ef1e4e7ecce2eb8c)

diff --git a/.travis.yml b/.travis.yml
index 9dfd016da0..00b2a73a5e 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -26,11 +26,9 @@ addons:
     - grub-efi-ia32-bin
     - rpm2cpio
     - wget
+    - device-tree-compiler
 
 install:
- # install latest device tree compiler
- - git clone --depth=1 -b v1.4.3 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
- - make -j4 -C /tmp/dtc
  # Clone uboot-test-hooks
  - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
  - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
@@ -51,7 +49,7 @@ install:
 
 env:
   global:
-    - PATH=/tmp/dtc:/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin
+    - PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin
     - PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
     - BUILD_DIR=build
     - HOSTCC="cc"
diff --git a/Makefile b/Makefile
index 8250b3409a..b7d5cbb3f9 100644
--- a/Makefile
+++ b/Makefile
@@ -349,7 +349,7 @@ OBJDUMP		= $(CROSS_COMPILE)objdump
 AWK		= awk
 PERL		= perl
 PYTHON		?= python
-DTC		?= dtc
+DTC		?= $(objtree)/scripts/dtc/dtc
 CHECK		= sparse
 
 CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
@@ -872,7 +872,7 @@ endif
 PHONY += dtbs
 dtbs: dts/dt.dtb
 	@:
-dts/dt.dtb: checkdtc u-boot
+dts/dt.dtb: u-boot
 	$(Q)$(MAKE) $(build)=dts dtbs
 
 quiet_cmd_copy = COPY    $@
@@ -1447,12 +1447,6 @@ SYSTEM_MAP = \
 System.map:	u-boot
 		@$(call SYSTEM_MAP,$<) > $@
 
-checkdtc:
-	@if test $(call dtc-version) -lt 0104; then \
-		echo '*** Your dtc is too old, please upgrade to dtc 1.4 or newer'; \
-		false; \
-	fi
-
 #########################################################################
 
 # ARM relocations should all be R_ARM_RELATIVE (32-bit) or
diff --git a/dts/Kconfig b/dts/Kconfig
index b4b7ddc144..44fc9fe36d 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -5,11 +5,15 @@
 config SUPPORT_OF_CONTROL
 	bool
 
+config DTC
+	bool
+
 menu "Device Tree Control"
 	depends on SUPPORT_OF_CONTROL
 
 config OF_CONTROL
 	bool "Run-time configuration via Device Tree"
+	select DTC
 	help
 	  This feature provides for run-time configuration of U-Boot
 	  via a flattened device tree.
diff --git a/scripts/Makefile b/scripts/Makefile
index 3e10c16d59..9d55241463 100644
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -21,3 +21,4 @@ build_docproc: $(obj)/docproc
 
 # Let clean descend into subdirs
 subdir-	+= basic kconfig
+subdir-$(CONFIG_DTC)	+= dtc

commit d7857e40f2de4c570bb962d517058aeb5fc87ad4
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 17:31:59 2017 -0400

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.4-50-gfe50bd1ecc1d
    
    This adds the following commits from upstream:
    
    fe50bd1ecc1d fdtget: Split out cell list display into a new function
    62d812308d11 README: Add a note about test_tree1.dts
    5bed86aee9e8 pylibfdt: Add support for fdt_subnode_offset()
    46f31b65b3b3 pylibfdt: Add support for fdt_node_offset_by_phandle()
    a3ae43723687 pylibfdt: Add support for fdt_parent_offset()
    a198af80344c pylibfdt: Add support for fdt_get_phandle()
    b9eba92ea50f tests: Return a failure code when any tests fail
    155faf6cc209 pylibfdt: Use local pylibfdt module
    50e5cd07f325 pylibfdt: Add a test for use of uint32_t
    ab78860f09f5 pylibfdt: Add stdint include to fix uint32_t
    36f511fb1113 tests: Add stacked overlay tests on fdtoverlay
    1bb00655d3e5 fdt: Allow stacked overlays phandle references
    a33c2247ac8d Introduce fdt_setprop_placeholder() method
    0016f8c2aa32 dtc: change default phandles to ePAPR style instead of both
    e3b9a9588a35 tests: fdtoverlay unit test
    42409146f2db fdtoverlay: A tool that applies overlays
    aae22722fc8d manual: Document missing options
    13ce6e1c2fc4 dtc: fix sprintf() format string error, again
    d990b8013889 Makefile: Fix build on MSYS2 and Cygwin
    51f56dedf8ea Clean up shared library compile/link options
    21a2bc896e3d Suppress expected error message in fdtdump test
    2a42b14d0d03 dtc: check.c fix compile error
    a10cb3c818d3 Fix get_node_by_path string equality check
    548aea2c436a fdtdump: Discourage use of fdtdump
    c2258841a785 fdtdump: Fix over-zealous version check
    9067ee4be0e6 Fix a few whitespace and style nits
    e56f2b07be38 pylibfdt: Use setup.py to build the swig file
    896f1c133265 pylibfdt: Use Makefile constructs to implement NO_PYTHON
    90db6d9989ca pylibfdt: Allow setup.py to operate stand-alone
    e20d9658cd8f Add Coverity Scan support
    b04a2cf08862 pylibfdt: Fix code style in setup.py
    1c5170d3a466 pylibfdt: Rename libfdt.swig to libfdt.i
    580a9f6c2880 Add a libfdt function to write a property placeholder
    ab15256d8d02 pylibfdt: Use the call function to simplify the Makefile
    9f2e3a3a1f19 pylibfdt: Use the correct libfdt version in the module
    e91c652af215 pylibfdt: Enable installation of Python module
    8a892fd85d94 pylibfdt: Allow building to be disabled
    741cdff85d3e .travis.yml: Add builds with and without Python library prerequisites
    14c4171f4f9a pylibfdt: Use package_dir to set the package directory
    89a5062ab231 pylibfdt: Use environment to pass C flags and files
    4e0e0d049757 pylibfdt: Allow pkg-config to be supplied in the environment
    6afd7d9688f5 Correct typo: s/pylibgfdt/pylibfdt/
    756ffc4f52f6 Build pylibfdt as part of the normal build process
    8cb3896358e9 Adjust libfdt.h to work with swig
    b40aa8359aff Mention pylibfdt in the documentation
    12cfb740cc76 Add tests for pylibfdt
    50f250701631 Add an initial Python library for libfdt
    cdbb2b6c7a3a checks: Warn on node name unit-addresses with '0x' or leading 0s
    4c15d5da17cc checks: Add bus checks for simple-bus buses
    33c3985226d3 checks: Add bus checks for PCI buses
    
    Change-Id: I3e6463f0d52e649da508fad9a628d55a715d4ab9
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2d4c2259930b91fe5e7a2f92db32c03fe640ed60)

diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index 38f548e582..afabf64337 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -681,6 +681,229 @@ static void check_ranges_format(struct check *c, struct dt_info *dti,
 }
 WARNING(ranges_format, check_ranges_format, NULL, &addr_size_cells);
 
+static const struct bus_type pci_bus = {
+	.name = "PCI",
+};
+
+static void check_pci_bridge(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	cell_t *cells;
+
+	prop = get_property(node, "device_type");
+	if (!prop || !streq(prop->val.val, "pci"))
+		return;
+
+	node->bus = &pci_bus;
+
+	if (!strneq(node->name, "pci", node->basenamelen) &&
+	    !strneq(node->name, "pcie", node->basenamelen))
+		FAIL(c, dti, "Node %s node name is not \"pci\" or \"pcie\"",
+			     node->fullpath);
+
+	prop = get_property(node, "ranges");
+	if (!prop)
+		FAIL(c, dti, "Node %s missing ranges for PCI bridge (or not a bridge)",
+			     node->fullpath);
+
+	if (node_addr_cells(node) != 3)
+		FAIL(c, dti, "Node %s incorrect #address-cells for PCI bridge",
+			     node->fullpath);
+	if (node_size_cells(node) != 2)
+		FAIL(c, dti, "Node %s incorrect #size-cells for PCI bridge",
+			     node->fullpath);
+
+	prop = get_property(node, "bus-range");
+	if (!prop) {
+		FAIL(c, dti, "Node %s missing bus-range for PCI bridge",
+			     node->fullpath);
+		return;
+	}
+	if (prop->val.len != (sizeof(cell_t) * 2)) {
+		FAIL(c, dti, "Node %s bus-range must be 2 cells",
+			     node->fullpath);
+		return;
+	}
+	cells = (cell_t *)prop->val.val;
+	if (fdt32_to_cpu(cells[0]) > fdt32_to_cpu(cells[1]))
+		FAIL(c, dti, "Node %s bus-range 1st cell must be less than or equal to 2nd cell",
+			     node->fullpath);
+	if (fdt32_to_cpu(cells[1]) > 0xff)
+		FAIL(c, dti, "Node %s bus-range maximum bus number must be less than 256",
+			     node->fullpath);
+}
+WARNING(pci_bridge, check_pci_bridge, NULL,
+	&device_type_is_string, &addr_size_cells);
+
+static void check_pci_device_bus_num(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	unsigned int bus_num, min_bus, max_bus;
+	cell_t *cells;
+
+	if (!node->parent || (node->parent->bus != &pci_bus))
+		return;
+
+	prop = get_property(node, "reg");
+	if (!prop)
+		return;
+
+	cells = (cell_t *)prop->val.val;
+	bus_num = (fdt32_to_cpu(cells[0]) & 0x00ff0000) >> 16;
+
+	prop = get_property(node->parent, "bus-range");
+	if (!prop) {
+		min_bus = max_bus = 0;
+	} else {
+		cells = (cell_t *)prop->val.val;
+		min_bus = fdt32_to_cpu(cells[0]);
+		max_bus = fdt32_to_cpu(cells[0]);
+	}
+	if ((bus_num < min_bus) || (bus_num > max_bus))
+		FAIL(c, dti, "Node %s PCI bus number %d out of range, expected (%d - %d)",
+		     node->fullpath, bus_num, min_bus, max_bus);
+}
+WARNING(pci_device_bus_num, check_pci_device_bus_num, NULL, &reg_format, &pci_bridge);
+
+static void check_pci_device_reg(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	const char *unitname = get_unitname(node);
+	char unit_addr[5];
+	unsigned int dev, func, reg;
+	cell_t *cells;
+
+	if (!node->parent || (node->parent->bus != &pci_bus))
+		return;
+
+	prop = get_property(node, "reg");
+	if (!prop) {
+		FAIL(c, dti, "Node %s missing PCI reg property", node->fullpath);
+		return;
+	}
+
+	cells = (cell_t *)prop->val.val;
+	if (cells[1] || cells[2])
+		FAIL(c, dti, "Node %s PCI reg config space address cells 2 and 3 must be 0",
+			     node->fullpath);
+
+	reg = fdt32_to_cpu(cells[0]);
+	dev = (reg & 0xf800) >> 11;
+	func = (reg & 0x700) >> 8;
+
+	if (reg & 0xff000000)
+		FAIL(c, dti, "Node %s PCI reg address is not configuration space",
+			     node->fullpath);
+	if (reg & 0x000000ff)
+		FAIL(c, dti, "Node %s PCI reg config space address register number must be 0",
+			     node->fullpath);
+
+	if (func == 0) {
+		snprintf(unit_addr, sizeof(unit_addr), "%x", dev);
+		if (streq(unitname, unit_addr))
+			return;
+	}
+
+	snprintf(unit_addr, sizeof(unit_addr), "%x,%x", dev, func);
+	if (streq(unitname, unit_addr))
+		return;
+
+	FAIL(c, dti, "Node %s PCI unit address format error, expected \"%s\"",
+	     node->fullpath, unit_addr);
+}
+WARNING(pci_device_reg, check_pci_device_reg, NULL, &reg_format, &pci_bridge);
+
+static const struct bus_type simple_bus = {
+	.name = "simple-bus",
+};
+
+static bool node_is_compatible(struct node *node, const char *compat)
+{
+	struct property *prop;
+	const char *str, *end;
+
+	prop = get_property(node, "compatible");
+	if (!prop)
+		return false;
+
+	for (str = prop->val.val, end = str + prop->val.len; str < end;
+	     str += strnlen(str, end - str) + 1) {
+		if (strneq(str, compat, end - str))
+			return true;
+	}
+	return false;
+}
+
+static void check_simple_bus_bridge(struct check *c, struct dt_info *dti, struct node *node)
+{
+	if (node_is_compatible(node, "simple-bus"))
+		node->bus = &simple_bus;
+}
+WARNING(simple_bus_bridge, check_simple_bus_bridge, NULL, &addr_size_cells);
+
+static void check_simple_bus_reg(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct property *prop;
+	const char *unitname = get_unitname(node);
+	char unit_addr[17];
+	unsigned int size;
+	uint64_t reg = 0;
+	cell_t *cells = NULL;
+
+	if (!node->parent || (node->parent->bus != &simple_bus))
+		return;
+
+	prop = get_property(node, "reg");
+	if (prop)
+		cells = (cell_t *)prop->val.val;
+	else {
+		prop = get_property(node, "ranges");
+		if (prop && prop->val.len)
+			/* skip of child address */
+			cells = ((cell_t *)prop->val.val) + node_addr_cells(node);
+	}
+
+	if (!cells) {
+		if (node->parent->parent && !(node->bus == &simple_bus))
+			FAIL(c, dti, "Node %s missing or empty reg/ranges property", node->fullpath);
+		return;
+	}
+
+	size = node_addr_cells(node->parent);
+	while (size--)
+		reg = (reg << 32) | fdt32_to_cpu(*(cells++));
+
+	snprintf(unit_addr, sizeof(unit_addr), "%"PRIx64, reg);
+	if (!streq(unitname, unit_addr))
+		FAIL(c, dti, "Node %s simple-bus unit address format error, expected \"%s\"",
+		     node->fullpath, unit_addr);
+}
+WARNING(simple_bus_reg, check_simple_bus_reg, NULL, &reg_format, &simple_bus_bridge);
+
+static void check_unit_address_format(struct check *c, struct dt_info *dti,
+				      struct node *node)
+{
+	const char *unitname = get_unitname(node);
+
+	if (node->parent && node->parent->bus)
+		return;
+
+	if (!unitname[0])
+		return;
+
+	if (!strncmp(unitname, "0x", 2)) {
+		FAIL(c, dti, "Node %s unit name should not have leading \"0x\"",
+		    node->fullpath);
+		/* skip over 0x for next test */
+		unitname += 2;
+	}
+	if (unitname[0] == '0' && isxdigit(unitname[1]))
+		FAIL(c, dti, "Node %s unit name should not have leading 0s",
+		    node->fullpath);
+}
+WARNING(unit_address_format, check_unit_address_format, NULL,
+	&node_name_format, &pci_bridge, &simple_bus_bridge);
+
 /*
  * Style checks
  */
@@ -752,6 +975,14 @@ static struct check *check_table[] = {
 	&addr_size_cells, &reg_format, &ranges_format,
 
 	&unit_address_vs_reg,
+	&unit_address_format,
+
+	&pci_bridge,
+	&pci_device_reg,
+	&pci_device_bus_num,
+
+	&simple_bus_bridge,
+	&simple_bus_reg,
 
 	&avoid_default_addr_size,
 	&obsolete_chosen_interrupt_controller,
diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c
index f5eed9d72c..5ed873c72a 100644
--- a/scripts/dtc/dtc.c
+++ b/scripts/dtc/dtc.c
@@ -31,7 +31,7 @@ int reservenum;		/* Number of memory reservation slots */
 int minsize;		/* Minimum blob size */
 int padsize;		/* Additional padding to blob */
 int alignsize;		/* Additional padding to blob accroding to the alignsize */
-int phandle_format = PHANDLE_BOTH;	/* Use linux,phandle or phandle properties */
+int phandle_format = PHANDLE_EPAPR;	/* Use linux,phandle or phandle properties */
 int generate_symbols;	/* enable symbols & fixup support */
 int generate_fixups;		/* suppress generation of fixups on symbol support */
 int auto_label_aliases;		/* auto generate labels -> aliases */
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
index 403b79deab..409db76c94 100644
--- a/scripts/dtc/dtc.h
+++ b/scripts/dtc/dtc.h
@@ -31,6 +31,7 @@
 #include <ctype.h>
 #include <errno.h>
 #include <unistd.h>
+#include <inttypes.h>
 
 #include <libfdt_env.h>
 #include <fdt.h>
@@ -135,6 +136,10 @@ struct label {
 	struct label *next;
 };
 
+struct bus_type {
+	const char *name;
+};
+
 struct property {
 	bool deleted;
 	char *name;
@@ -161,6 +166,7 @@ struct node {
 	int addr_cells, size_cells;
 
 	struct label *labels;
+	const struct bus_type *bus;
 };
 
 #define for_each_label_withdel(l0, l) \
diff --git a/scripts/dtc/libfdt/fdt_empty_tree.c b/scripts/dtc/libfdt/fdt_empty_tree.c
index f72d13b1d1..f2ae9b77c2 100644
--- a/scripts/dtc/libfdt/fdt_empty_tree.c
+++ b/scripts/dtc/libfdt/fdt_empty_tree.c
@@ -81,4 +81,3 @@ int fdt_create_empty_tree(void *buf, int bufsize)
 
 	return fdt_open_into(buf, buf, bufsize);
 }
-
diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c
index 3d00d2eee0..08de2cce67 100644
--- a/scripts/dtc/libfdt/fdt_ro.c
+++ b/scripts/dtc/libfdt/fdt_ro.c
@@ -60,7 +60,7 @@ static int _fdt_nodename_eq(const void *fdt, int offset,
 {
 	const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1);
 
-	if (! p)
+	if (!p)
 		/* short match */
 		return 0;
 
@@ -327,7 +327,7 @@ const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
 	const struct fdt_property *prop;
 
 	prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp);
-	if (! prop)
+	if (!prop)
 		return NULL;
 
 	return prop->data;
diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c
index 3fd5847377..5c3a2bb0bc 100644
--- a/scripts/dtc/libfdt/fdt_rw.c
+++ b/scripts/dtc/libfdt/fdt_rw.c
@@ -207,7 +207,7 @@ static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
 	int err;
 
 	*prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
-	if (! (*prop))
+	if (!*prop)
 		return oldlen;
 
 	if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
@@ -269,8 +269,8 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name)
 	return 0;
 }
 
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len)
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data)
 {
 	struct fdt_property *prop;
 	int err;
@@ -283,8 +283,22 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 	if (err)
 		return err;
 
+	*prop_data = prop->data;
+	return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len)
+{
+	void *prop_data;
+	int err;
+
+	err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data);
+	if (err)
+		return err;
+
 	if (len)
-		memcpy(prop->data, val, len);
+		memcpy(prop_data, val, len);
 	return 0;
 }
 
@@ -323,7 +337,7 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name)
 	FDT_RW_CHECK_HEADER(fdt);
 
 	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (! prop)
+	if (!prop)
 		return len;
 
 	proplen = sizeof(*prop) + FDT_TAGALIGN(len);
diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c
index 6a804859fd..2bd15e7aef 100644
--- a/scripts/dtc/libfdt/fdt_sw.c
+++ b/scripts/dtc/libfdt/fdt_sw.c
@@ -220,7 +220,7 @@ static int _fdt_find_add_string(void *fdt, const char *s)
 	return offset;
 }
 
-int fdt_property(void *fdt, const char *name, const void *val, int len)
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp)
 {
 	struct fdt_property *prop;
 	int nameoff;
@@ -238,7 +238,19 @@ int fdt_property(void *fdt, const char *name, const void *val, int len)
 	prop->tag = cpu_to_fdt32(FDT_PROP);
 	prop->nameoff = cpu_to_fdt32(nameoff);
 	prop->len = cpu_to_fdt32(len);
-	memcpy(prop->data, val, len);
+	*valp = prop->data;
+	return 0;
+}
+
+int fdt_property(void *fdt, const char *name, const void *val, int len)
+{
+	void *ptr;
+	int ret;
+
+	ret = fdt_property_placeholder(fdt, name, len, &ptr);
+	if (ret)
+		return ret;
+	memcpy(ptr, val, len);
 	return 0;
 }
 
diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c
index 6aaab39992..5e85919862 100644
--- a/scripts/dtc/libfdt/fdt_wip.c
+++ b/scripts/dtc/libfdt/fdt_wip.c
@@ -82,7 +82,7 @@ int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
 	int proplen;
 
 	propval = fdt_getprop(fdt, nodeoffset, name, &proplen);
-	if (! propval)
+	if (!propval)
 		return proplen;
 
 	if (proplen != len)
@@ -107,7 +107,7 @@ int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
 	int len;
 
 	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
-	if (! prop)
+	if (!prop)
 		return len;
 
 	_fdt_nop_region(prop, len + sizeof(*prop));
diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h
index 9e71bb9e03..7f83023ee1 100644
--- a/scripts/dtc/libfdt/libfdt.h
+++ b/scripts/dtc/libfdt/libfdt.h
@@ -143,7 +143,9 @@
 /* Low-level functions (you probably don't need these)                */
 /**********************************************************************/
 
+#ifndef SWIG /* This function is not useful in Python */
 const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
+#endif
 static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
 {
 	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
@@ -210,7 +212,6 @@ int fdt_next_subnode(const void *fdt, int offset);
 /**********************************************************************/
 /* General functions                                                  */
 /**********************************************************************/
-
 #define fdt_get_header(fdt, field) \
 	(fdt32_to_cpu(((const struct fdt_header *)(fdt))->field))
 #define fdt_magic(fdt)			(fdt_get_header(fdt, magic))
@@ -354,8 +355,10 @@ int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
  * useful for finding subnodes based on a portion of a larger string,
  * such as a full path.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
 			       const char *name, int namelen);
+#endif
 /**
  * fdt_subnode_offset - find a subnode of a given node
  * @fdt: pointer to the device tree blob
@@ -391,7 +394,9 @@ int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
  * Identical to fdt_path_offset(), but only consider the first namelen
  * characters of path as the path name.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
+#endif
 
 /**
  * fdt_path_offset - find a tree node by its full path
@@ -550,10 +555,12 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
  * Identical to fdt_get_property(), but only examine the first namelen
  * characters of name for matching the property name.
  */
+#ifndef SWIG /* Not available in Python */
 const struct fdt_property *fdt_get_property_namelen(const void *fdt,
 						    int nodeoffset,
 						    const char *name,
 						    int namelen, int *lenp);
+#endif
 
 /**
  * fdt_get_property - find a given property in a given node
@@ -624,8 +631,10 @@ static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
  *		-FDT_ERR_BADSTRUCTURE,
  *		-FDT_ERR_TRUNCATED, standard meanings
  */
+#ifndef SWIG /* This function is not useful in Python */
 const void *fdt_getprop_by_offset(const void *fdt, int offset,
 				  const char **namep, int *lenp);
+#endif
 
 /**
  * fdt_getprop_namelen - get property value based on substring
@@ -638,6 +647,7 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset,
  * Identical to fdt_getprop(), but only examine the first namelen
  * characters of name for matching the property name.
  */
+#ifndef SWIG /* Not available in Python */
 const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
 				const char *name, int namelen, int *lenp);
 static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
@@ -647,6 +657,7 @@ static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
 	return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name,
 						      namelen, lenp);
 }
+#endif
 
 /**
  * fdt_getprop - retrieve the value of a given property
@@ -707,8 +718,10 @@ uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
  * Identical to fdt_get_alias(), but only examine the first namelen
  * characters of name for matching the alias name.
  */
+#ifndef SWIG /* Not available in Python */
 const char *fdt_get_alias_namelen(const void *fdt,
 				  const char *name, int namelen);
+#endif
 
 /**
  * fdt_get_alias - retrieve the path referenced by a given alias
@@ -1106,10 +1119,12 @@ int fdt_size_cells(const void *fdt, int nodeoffset);
  * of the name. It is useful when you want to manipulate only one value of
  * an array and you have a string that doesn't end with \0.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
 					const char *name, int namelen,
 					uint32_t idx, const void *val,
 					int len);
+#endif
 
 /**
  * fdt_setprop_inplace - change a property's value, but not its size
@@ -1139,8 +1154,10 @@ int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
  *	-FDT_ERR_BADSTRUCTURE,
  *	-FDT_ERR_TRUNCATED, standard meanings
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
 			const void *val, int len);
+#endif
 
 /**
  * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
@@ -1297,6 +1314,22 @@ static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
 {
 	return fdt_property_u32(fdt, name, val);
 }
+
+/**
+ * fdt_property_placeholder - add a new property and return a ptr to its value
+ *
+ * @fdt: pointer to the device tree blob
+ * @name: name of property to add
+ * @len: length of property value in bytes
+ * @valp: returns a pointer to where where the value should be placed
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_NOSPACE, standard meanings
+ */
+int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp);
+
 #define fdt_property_string(fdt, name, str) \
 	fdt_property(fdt, name, str, strlen(str)+1)
 int fdt_end_node(void *fdt);
@@ -1415,6 +1448,37 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name);
 int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 		const void *val, int len);
 
+/**
+ * fdt_setprop _placeholder - allocate space for a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @len: length of the property value
+ * @prop_data: return pointer to property data
+ *
+ * fdt_setprop_placeholer() allocates the named property in the given node.
+ * If the property exists it is resized. In either case a pointer to the
+ * property data is returned.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data);
+
 /**
  * fdt_setprop_u32 - set a property to a 32-bit integer
  * @fdt: pointer to the device tree blob
@@ -1734,8 +1798,10 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name);
  * creating subnodes based on a portion of a larger string, such as a
  * full path.
  */
+#ifndef SWIG /* Not available in Python */
 int fdt_add_subnode_namelen(void *fdt, int parentoffset,
 			    const char *name, int namelen);
+#endif
 
 /**
  * fdt_add_subnode - creates a new node
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index 3673de07e4..aecd27875f 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -478,7 +478,8 @@ struct node *get_node_by_path(struct node *tree, const char *path)
 	p = strchr(path, '/');
 
 	for_each_child(tree, child) {
-		if (p && strneq(path, child->name, p-path))
+		if (p && (strlen(child->name) == p-path) &&
+				strneq(path, child->name, p-path))
 			return get_node_by_path(child, p+1);
 		else if (!p && streq(path, child->name))
 			return child;
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
index 859564e8b4..b5ed715ecc 100644
--- a/scripts/dtc/version_gen.h
+++ b/scripts/dtc/version_gen.h
@@ -1 +1 @@
-#define DTC_VERSION "DTC 1.4.4"
+#define DTC_VERSION "DTC 1.4.4-gfe50bd1e"

commit e23ffda262942d719738f47025958a7fcb5a9fb6
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 17:30:53 2017 -0400

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.4
    
    This adds the following commits from upstream:
    
    558cd81bdd43 dtc: Bump version to v1.4.4
    c17a811c62eb fdtput: Remove star from value_len documentation
    194d5caaefcb fdtget: Use @return to document the return value
    d922ecdd017b tests: Make realloc_fdt() really allocate *fdt
    921cc17fec29 libfdt: overlay: Check the value of the right variable
    9ffdf60bf463 dtc: Simplify asm_emit_string() implementation
    881012e44386 libfdt: Change names of sparse helper macros
    bad5b28049e5 Fix assorted sparse warnings
    672ac09ea04d Clean up gcc attributes
    49300f2ade6a dtc: Don't abuse struct fdt_reserve_entry
    
    Change-Id: Ice2278730d9717ed47e48d656ff4028ffa23a396
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d6fc90ced42e9fb77185cedfe45d0a2c7ac78508)

diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
index 0e8b978c36..38f548e582 100644
--- a/scripts/dtc/checks.c
+++ b/scripts/dtc/checks.c
@@ -72,12 +72,8 @@ struct check {
 #define CHECK(_nm, _fn, _d, ...) \
 	CHECK_ENTRY(_nm, _fn, _d, false, false, __VA_ARGS__)
 
-#ifdef __GNUC__
-static inline void check_msg(struct check *c, struct dt_info *dti,
-			     const char *fmt, ...) __attribute__((format (printf, 3, 4)));
-#endif
-static inline void check_msg(struct check *c, struct dt_info *dti,
-			     const char *fmt, ...)
+static inline void  PRINTF(3, 4) check_msg(struct check *c, struct dt_info *dti,
+					   const char *fmt, ...)
 {
 	va_list ap;
 	va_start(ap, fmt);
@@ -538,13 +534,13 @@ static void fixup_phandle_references(struct check *c, struct dt_info *dti,
 					FAIL(c, dti, "Reference to non-existent node or "
 							"label \"%s\"\n", m->ref);
 				else /* mark the entry as unresolved */
-					*((cell_t *)(prop->val.val + m->offset)) =
+					*((fdt32_t *)(prop->val.val + m->offset)) =
 						cpu_to_fdt32(0xffffffff);
 				continue;
 			}
 
 			phandle = get_node_phandle(dt, refnode);
-			*((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
+			*((fdt32_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
 		}
 	}
 }
diff --git a/scripts/dtc/data.c b/scripts/dtc/data.c
index 8cae237468..aa37a16c88 100644
--- a/scripts/dtc/data.c
+++ b/scripts/dtc/data.c
@@ -171,9 +171,9 @@ struct data data_merge(struct data d1, struct data d2)
 struct data data_append_integer(struct data d, uint64_t value, int bits)
 {
 	uint8_t value_8;
-	uint16_t value_16;
-	uint32_t value_32;
-	uint64_t value_64;
+	fdt16_t value_16;
+	fdt32_t value_32;
+	fdt64_t value_64;
 
 	switch (bits) {
 	case 8:
@@ -197,14 +197,14 @@ struct data data_append_integer(struct data d, uint64_t value, int bits)
 	}
 }
 
-struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
+struct data data_append_re(struct data d, uint64_t address, uint64_t size)
 {
-	struct fdt_reserve_entry bere;
+	struct fdt_reserve_entry re;
 
-	bere.address = cpu_to_fdt64(re->address);
-	bere.size = cpu_to_fdt64(re->size);
+	re.address = cpu_to_fdt64(address);
+	re.size = cpu_to_fdt64(size);
 
-	return data_append_data(d, &bere, sizeof(bere));
+	return data_append_data(d, &re, sizeof(re));
 }
 
 struct data data_append_cell(struct data d, cell_t word)
diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
index 52bed7b749..fd825ebba6 100644
--- a/scripts/dtc/dtc-lexer.l
+++ b/scripts/dtc/dtc-lexer.l
@@ -62,12 +62,7 @@ static int dts_version = 1;
 
 static void push_input_file(const char *filename);
 static bool pop_input_file(void);
-#ifdef __GNUC__
-static void lexical_error(const char *fmt, ...)
-	__attribute__((format (printf, 1, 2)));
-#else
-static void lexical_error(const char *fmt, ...);
-#endif
+static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
 
 %}
 
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
index d77fdfe590..3934d8624d 100644
--- a/scripts/dtc/dtc-lexer.lex.c_shipped
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -663,14 +663,9 @@ static int dts_version = 1;
 
 static void push_input_file(const char *filename);
 static bool pop_input_file(void);
-#ifdef __GNUC__
-static void lexical_error(const char *fmt, ...)
-	__attribute__((format (printf, 1, 2)));
-#else
-static void lexical_error(const char *fmt, ...);
-#endif
+static void PRINTF(1, 2) lexical_error(const char *fmt, ...);
 
-#line 674 "dtc-lexer.lex.c"
+#line 669 "dtc-lexer.lex.c"
 
 #define INITIAL 0
 #define BYTESTRING 1
@@ -861,9 +856,9 @@ YY_DECL
 	register char *yy_cp, *yy_bp;
 	register int yy_act;
     
-#line 74 "dtc-lexer.l"
+#line 69 "dtc-lexer.l"
 
-#line 867 "dtc-lexer.lex.c"
+#line 862 "dtc-lexer.lex.c"
 
 	if ( !(yy_init) )
 		{
@@ -946,7 +941,7 @@ do_action:	/* This label is used only to access EOF actions. */
 case 1:
 /* rule 1 can match eol */
 YY_RULE_SETUP
-#line 75 "dtc-lexer.l"
+#line 70 "dtc-lexer.l"
 {
 			char *name = strchr(yytext, '\"') + 1;
 			yytext[yyleng-1] = '\0';
@@ -956,7 +951,7 @@ YY_RULE_SETUP
 case 2:
 /* rule 2 can match eol */
 YY_RULE_SETUP
-#line 81 "dtc-lexer.l"
+#line 76 "dtc-lexer.l"
 {
 			char *line, *fnstart, *fnend;
 			struct data fn;
@@ -990,7 +985,7 @@ case YY_STATE_EOF(INITIAL):
 case YY_STATE_EOF(BYTESTRING):
 case YY_STATE_EOF(PROPNODENAME):
 case YY_STATE_EOF(V1):
-#line 110 "dtc-lexer.l"
+#line 105 "dtc-lexer.l"
 {
 			if (!pop_input_file()) {
 				yyterminate();
@@ -1000,7 +995,7 @@ case YY_STATE_EOF(V1):
 case 3:
 /* rule 3 can match eol */
 YY_RULE_SETUP
-#line 116 "dtc-lexer.l"
+#line 111 "dtc-lexer.l"
 {
 			DPRINT("String: %s\n", yytext);
 			yylval.data = data_copy_escape_string(yytext+1,
@@ -1010,7 +1005,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 4:
 YY_RULE_SETUP
-#line 123 "dtc-lexer.l"
+#line 118 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /dts-v1/\n");
 			dts_version = 1;
@@ -1020,7 +1015,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 5:
 YY_RULE_SETUP
-#line 130 "dtc-lexer.l"
+#line 125 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /plugin/\n");
 			return DT_PLUGIN;
@@ -1028,7 +1023,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 6:
 YY_RULE_SETUP
-#line 135 "dtc-lexer.l"
+#line 130 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /memreserve/\n");
 			BEGIN_DEFAULT();
@@ -1037,7 +1032,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 7:
 YY_RULE_SETUP
-#line 141 "dtc-lexer.l"
+#line 136 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /bits/\n");
 			BEGIN_DEFAULT();
@@ -1046,7 +1041,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 8:
 YY_RULE_SETUP
-#line 147 "dtc-lexer.l"
+#line 142 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /delete-property/\n");
 			DPRINT("<PROPNODENAME>\n");
@@ -1056,7 +1051,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 9:
 YY_RULE_SETUP
-#line 154 "dtc-lexer.l"
+#line 149 "dtc-lexer.l"
 {
 			DPRINT("Keyword: /delete-node/\n");
 			DPRINT("<PROPNODENAME>\n");
@@ -1066,7 +1061,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 10:
 YY_RULE_SETUP
-#line 161 "dtc-lexer.l"
+#line 156 "dtc-lexer.l"
 {
 			DPRINT("Label: %s\n", yytext);
 			yylval.labelref = xstrdup(yytext);
@@ -1076,7 +1071,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 11:
 YY_RULE_SETUP
-#line 168 "dtc-lexer.l"
+#line 163 "dtc-lexer.l"
 {
 			char *e;
 			DPRINT("Integer Literal: '%s'\n", yytext);
@@ -1102,7 +1097,7 @@ YY_RULE_SETUP
 case 12:
 /* rule 12 can match eol */
 YY_RULE_SETUP
-#line 190 "dtc-lexer.l"
+#line 185 "dtc-lexer.l"
 {
 			struct data d;
 			DPRINT("Character literal: %s\n", yytext);
@@ -1126,7 +1121,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 13:
 YY_RULE_SETUP
-#line 211 "dtc-lexer.l"
+#line 206 "dtc-lexer.l"
 {	/* label reference */
 			DPRINT("Ref: %s\n", yytext+1);
 			yylval.labelref = xstrdup(yytext+1);
@@ -1135,7 +1130,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 14:
 YY_RULE_SETUP
-#line 217 "dtc-lexer.l"
+#line 212 "dtc-lexer.l"
 {	/* new-style path reference */
 			yytext[yyleng-1] = '\0';
 			DPRINT("Ref: %s\n", yytext+2);
@@ -1145,7 +1140,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 15:
 YY_RULE_SETUP
-#line 224 "dtc-lexer.l"
+#line 219 "dtc-lexer.l"
 {
 			yylval.byte = strtol(yytext, NULL, 16);
 			DPRINT("Byte: %02x\n", (int)yylval.byte);
@@ -1154,7 +1149,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 16:
 YY_RULE_SETUP
-#line 230 "dtc-lexer.l"
+#line 225 "dtc-lexer.l"
 {
 			DPRINT("/BYTESTRING\n");
 			BEGIN_DEFAULT();
@@ -1163,7 +1158,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 17:
 YY_RULE_SETUP
-#line 236 "dtc-lexer.l"
+#line 231 "dtc-lexer.l"
 {
 			DPRINT("PropNodeName: %s\n", yytext);
 			yylval.propnodename = xstrdup((yytext[0] == '\\') ?
@@ -1174,7 +1169,7 @@ YY_RULE_SETUP
 	YY_BREAK
 case 18:
 YY_RULE_SETUP
-#line 244 "dtc-lexer.l"
+#line 239 "dtc-lexer.l"
 {
 			DPRINT("Binary Include\n");
 			return DT_INCBIN;
@@ -1183,64 +1178,64 @@ YY_RULE_SETUP
 case 19:
 /* rule 19 can match eol */
 YY_RULE_SETUP
-#line 249 "dtc-lexer.l"
+#line 244 "dtc-lexer.l"
 /* eat whitespace */
 	YY_BREAK
 case 20:
 /* rule 20 can match eol */
 YY_RULE_SETUP
-#line 250 "dtc-lexer.l"
+#line 245 "dtc-lexer.l"
 /* eat C-style comments */
 	YY_BREAK
 case 21:
 /* rule 21 can match eol */
 YY_RULE_SETUP
-#line 251 "dtc-lexer.l"
+#line 246 "dtc-lexer.l"
 /* eat C++-style comments */
 	YY_BREAK
 case 22:
 YY_RULE_SETUP
-#line 253 "dtc-lexer.l"
+#line 248 "dtc-lexer.l"
 { return DT_LSHIFT; };
 	YY_BREAK
 case 23:
 YY_RULE_SETUP
-#line 254 "dtc-lexer.l"
+#line 249 "dtc-lexer.l"
 { return DT_RSHIFT; };
 	YY_BREAK
 case 24:
 YY_RULE_SETUP
-#line 255 "dtc-lexer.l"
+#line 250 "dtc-lexer.l"
 { return DT_LE; };
 	YY_BREAK
 case 25:
 YY_RULE_SETUP
-#line 256 "dtc-lexer.l"
+#line 251 "dtc-lexer.l"
 { return DT_GE; };
 	YY_BREAK
 case 26:
 YY_RULE_SETUP
-#line 257 "dtc-lexer.l"
+#line 252 "dtc-lexer.l"
 { return DT_EQ; };
 	YY_BREAK
 case 27:
 YY_RULE_SETUP
-#line 258 "dtc-lexer.l"
+#line 253 "dtc-lexer.l"
 { return DT_NE; };
 	YY_BREAK
 case 28:
 YY_RULE_SETUP
-#line 259 "dtc-lexer.l"
+#line 254 "dtc-lexer.l"
 { return DT_AND; };
 	YY_BREAK
 case 29:
 YY_RULE_SETUP
-#line 260 "dtc-lexer.l"
+#line 255 "dtc-lexer.l"
 { return DT_OR; };
 	YY_BREAK
 case 30:
 YY_RULE_SETUP
-#line 262 "dtc-lexer.l"
+#line 257 "dtc-lexer.l"
 {
 			DPRINT("Char: %c (\\x%02x)\n", yytext[0],
 				(unsigned)yytext[0]);
@@ -1258,10 +1253,10 @@ YY_RULE_SETUP
 	YY_BREAK
 case 31:
 YY_RULE_SETUP
-#line 277 "dtc-lexer.l"
+#line 272 "dtc-lexer.l"
 ECHO;
 	YY_BREAK
-#line 1265 "dtc-lexer.lex.c"
+#line 1260 "dtc-lexer.lex.c"
 
 	case YY_END_OF_BUFFER:
 		{
@@ -2220,7 +2215,7 @@ void yyfree (void * ptr )
 
 #define YYTABLES_NAME "yytables"
 
-#line 277 "dtc-lexer.l"
+#line 272 "dtc-lexer.l"
 
 
 
diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c
index bb1e52b318..f5eed9d72c 100644
--- a/scripts/dtc/dtc.c
+++ b/scripts/dtc/dtc.c
@@ -138,7 +138,7 @@ static const char *guess_type_by_name(const char *fname, const char *fallback)
 static const char *guess_input_format(const char *fname, const char *fallback)
 {
 	struct stat statbuf;
-	uint32_t magic;
+	fdt32_t magic;
 	FILE *f;
 
 	if (stat(fname, &statbuf) != 0)
@@ -159,8 +159,7 @@ static const char *guess_input_format(const char *fname, const char *fallback)
 	}
 	fclose(f);
 
-	magic = fdt32_to_cpu(magic);
-	if (magic == FDT_MAGIC)
+	if (fdt32_to_cpu(magic) == FDT_MAGIC)
 		return "dtb";
 
 	return guess_type_by_name(fname, fallback);
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
index 1ac2a1e3a4..403b79deab 100644
--- a/scripts/dtc/dtc.h
+++ b/scripts/dtc/dtc.h
@@ -43,7 +43,6 @@
 #define debug(...)
 #endif
 
-
 #define DEFAULT_FDT_VERSION	17
 
 /*
@@ -114,7 +113,7 @@ struct data data_insert_at_marker(struct data d, struct marker *m,
 struct data data_merge(struct data d1, struct data d2);
 struct data data_append_cell(struct data d, cell_t word);
 struct data data_append_integer(struct data d, uint64_t word, int bits);
-struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
+struct data data_append_re(struct data d, uint64_t address, uint64_t size);
 struct data data_append_addr(struct data d, uint64_t addr);
 struct data data_append_byte(struct data d, uint8_t byte);
 struct data data_append_zeroes(struct data d, int len);
@@ -227,7 +226,7 @@ uint32_t guess_boot_cpuid(struct node *tree);
 /* Boot info (tree plus memreserve information */
 
 struct reserve_info {
-	struct fdt_reserve_entry re;
+	uint64_t address, size;
 
 	struct reserve_info *next;
 
diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c
index ebac548b3f..fcf71541d8 100644
--- a/scripts/dtc/flattree.c
+++ b/scripts/dtc/flattree.c
@@ -49,7 +49,7 @@ static struct version_info {
 
 struct emitter {
 	void (*cell)(void *, cell_t);
-	void (*string)(void *, char *, int);
+	void (*string)(void *, const char *, int);
 	void (*align)(void *, int);
 	void (*data)(void *, struct data);
 	void (*beginnode)(void *, struct label *labels);
@@ -64,7 +64,7 @@ static void bin_emit_cell(void *e, cell_t val)
 	*dtbuf = data_append_cell(*dtbuf, val);
 }
 
-static void bin_emit_string(void *e, char *str, int len)
+static void bin_emit_string(void *e, const char *str, int len)
 {
 	struct data *dtbuf = e;
 
@@ -144,22 +144,14 @@ static void asm_emit_cell(void *e, cell_t val)
 		(val >> 8) & 0xff, val & 0xff);
 }
 
-static void asm_emit_string(void *e, char *str, int len)
+static void asm_emit_string(void *e, const char *str, int len)
 {
 	FILE *f = e;
-	char c = 0;
 
-	if (len != 0) {
-		/* XXX: ewww */
-		c = str[len];
-		str[len] = '\0';
-	}
-
-	fprintf(f, "\t.string\t\"%s\"\n", str);
-
-	if (len != 0) {
-		str[len] = c;
-	}
+	if (len != 0)
+		fprintf(f, "\t.string\t\"%.*s\"\n", len, str);
+	else
+		fprintf(f, "\t.string\t\"%s\"\n", str);
 }
 
 static void asm_emit_align(void *e, int a)
@@ -179,7 +171,7 @@ static void asm_emit_data(void *e, struct data d)
 		emit_offset_label(f, m->ref, m->offset);
 
 	while ((d.len - off) >= sizeof(uint32_t)) {
-		asm_emit_cell(e, fdt32_to_cpu(*((uint32_t *)(d.val+off))));
+		asm_emit_cell(e, fdt32_to_cpu(*((fdt32_t *)(d.val+off))));
 		off += sizeof(uint32_t);
 	}
 
@@ -318,17 +310,16 @@ static struct data flatten_reserve_list(struct reserve_info *reservelist,
 {
 	struct reserve_info *re;
 	struct data d = empty_data;
-	static struct fdt_reserve_entry null_re = {0,0};
 	int    j;
 
 	for (re = reservelist; re; re = re->next) {
-		d = data_append_re(d, &re->re);
+		d = data_append_re(d, re->address, re->size);
 	}
 	/*
 	 * Add additional reserved slots if the user asked for them.
 	 */
 	for (j = 0; j < reservenum; j++) {
-		d = data_append_re(d, &null_re);
+		d = data_append_re(d, 0, 0);
 	}
 
 	return d;
@@ -544,11 +535,11 @@ void dt_to_asm(FILE *f, struct dt_info *dti, int version)
 			fprintf(f, "\t.globl\t%s\n", l->label);
 			fprintf(f, "%s:\n", l->label);
 		}
-		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.address >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->address >> 32));
 		ASM_EMIT_BELONG(f, "0x%08x",
-				(unsigned int)(re->re.address & 0xffffffff));
-		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size >> 32));
-		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size & 0xffffffff));
+				(unsigned int)(re->address & 0xffffffff));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->size >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->size & 0xffffffff));
 	}
 	for (i = 0; i < reservenum; i++) {
 		fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
@@ -609,7 +600,7 @@ static void flat_read_chunk(struct inbuf *inb, void *p, int len)
 
 static uint32_t flat_read_word(struct inbuf *inb)
 {
-	uint32_t val;
+	fdt32_t val;
 
 	assert(((inb->ptr - inb->base) % sizeof(val)) == 0);
 
@@ -718,13 +709,15 @@ static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb)
 	 * First pass, count entries.
 	 */
 	while (1) {
+		uint64_t address, size;
+
 		flat_read_chunk(inb, &re, sizeof(re));
-		re.address  = fdt64_to_cpu(re.address);
-		re.size = fdt64_to_cpu(re.size);
-		if (re.size == 0)
+		address  = fdt64_to_cpu(re.address);
+		size = fdt64_to_cpu(re.size);
+		if (size == 0)
 			break;
 
-		new = build_reserve_entry(re.address, re.size);
+		new = build_reserve_entry(address, size);
 		reservelist = add_reserve_entry(reservelist, new);
 	}
 
@@ -817,6 +810,7 @@ static struct node *unflatten_tree(struct inbuf *dtbuf,
 struct dt_info *dt_from_blob(const char *fname)
 {
 	FILE *f;
+	fdt32_t magic_buf, totalsize_buf;
 	uint32_t magic, totalsize, version, size_dt, boot_cpuid_phys;
 	uint32_t off_dt, off_str, off_mem_rsvmap;
 	int rc;
@@ -833,7 +827,7 @@ struct dt_info *dt_from_blob(const char *fname)
 
 	f = srcfile_relative_open(fname, NULL);
 
-	rc = fread(&magic, sizeof(magic), 1, f);
+	rc = fread(&magic_buf, sizeof(magic_buf), 1, f);
 	if (ferror(f))
 		die("Error reading DT blob magic number: %s\n",
 		    strerror(errno));
@@ -844,11 +838,11 @@ struct dt_info *dt_from_blob(const char *fname)
 			die("Mysterious short read reading magic number\n");
 	}
 
-	magic = fdt32_to_cpu(magic);
+	magic = fdt32_to_cpu(magic_buf);
 	if (magic != FDT_MAGIC)
 		die("Blob has incorrect magic number\n");
 
-	rc = fread(&totalsize, sizeof(totalsize), 1, f);
+	rc = fread(&totalsize_buf, sizeof(totalsize_buf), 1, f);
 	if (ferror(f))
 		die("Error reading DT blob size: %s\n", strerror(errno));
 	if (rc < 1) {
@@ -858,7 +852,7 @@ struct dt_info *dt_from_blob(const char *fname)
 			die("Mysterious short read reading blob size\n");
 	}
 
-	totalsize = fdt32_to_cpu(totalsize);
+	totalsize = fdt32_to_cpu(totalsize_buf);
 	if (totalsize < FDT_V1_SIZE)
 		die("DT blob size (%d) is too small\n", totalsize);
 
diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h
index 99f936dacc..952056cddf 100644
--- a/scripts/dtc/libfdt/libfdt_env.h
+++ b/scripts/dtc/libfdt/libfdt_env.h
@@ -58,16 +58,16 @@
 #include <string.h>
 
 #ifdef __CHECKER__
-#define __force __attribute__((force))
-#define __bitwise __attribute__((bitwise))
+#define FDT_FORCE __attribute__((force))
+#define FDT_BITWISE __attribute__((bitwise))
 #else
-#define __force
-#define __bitwise
+#define FDT_FORCE
+#define FDT_BITWISE
 #endif
 
-typedef uint16_t __bitwise fdt16_t;
-typedef uint32_t __bitwise fdt32_t;
-typedef uint64_t __bitwise fdt64_t;
+typedef uint16_t FDT_BITWISE fdt16_t;
+typedef uint32_t FDT_BITWISE fdt32_t;
+typedef uint64_t FDT_BITWISE fdt64_t;
 
 #define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
 #define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
@@ -80,29 +80,29 @@ typedef uint64_t __bitwise fdt64_t;
 
 static inline uint16_t fdt16_to_cpu(fdt16_t x)
 {
-	return (__force uint16_t)CPU_TO_FDT16(x);
+	return (FDT_FORCE uint16_t)CPU_TO_FDT16(x);
 }
 static inline fdt16_t cpu_to_fdt16(uint16_t x)
 {
-	return (__force fdt16_t)CPU_TO_FDT16(x);
+	return (FDT_FORCE fdt16_t)CPU_TO_FDT16(x);
 }
 
 static inline uint32_t fdt32_to_cpu(fdt32_t x)
 {
-	return (__force uint32_t)CPU_TO_FDT32(x);
+	return (FDT_FORCE uint32_t)CPU_TO_FDT32(x);
 }
 static inline fdt32_t cpu_to_fdt32(uint32_t x)
 {
-	return (__force fdt32_t)CPU_TO_FDT32(x);
+	return (FDT_FORCE fdt32_t)CPU_TO_FDT32(x);
 }
 
 static inline uint64_t fdt64_to_cpu(fdt64_t x)
 {
-	return (__force uint64_t)CPU_TO_FDT64(x);
+	return (FDT_FORCE uint64_t)CPU_TO_FDT64(x);
 }
 static inline fdt64_t cpu_to_fdt64(uint64_t x)
 {
-	return (__force fdt64_t)CPU_TO_FDT64(x);
+	return (FDT_FORCE fdt64_t)CPU_TO_FDT64(x);
 }
 #undef CPU_TO_FDT64
 #undef CPU_TO_FDT32
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
index 36be9afefd..3673de07e4 100644
--- a/scripts/dtc/livetree.c
+++ b/scripts/dtc/livetree.c
@@ -319,8 +319,8 @@ struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size)
 
 	memset(new, 0, sizeof(*new));
 
-	new->re.address = address;
-	new->re.size = size;
+	new->address = address;
+	new->size = size;
 
 	return new;
 }
@@ -393,7 +393,7 @@ struct property *get_property(struct node *node, const char *propname)
 cell_t propval_cell(struct property *prop)
 {
 	assert(prop->val.len == sizeof(cell_t));
-	return fdt32_to_cpu(*((cell_t *)prop->val.val));
+	return fdt32_to_cpu(*((fdt32_t *)prop->val.val));
 }
 
 struct property *get_property_by_label(struct node *tree, const char *label,
@@ -599,13 +599,13 @@ static int cmp_reserve_info(const void *ax, const void *bx)
 	a = *((const struct reserve_info * const *)ax);
 	b = *((const struct reserve_info * const *)bx);
 
-	if (a->re.address < b->re.address)
+	if (a->address < b->address)
 		return -1;
-	else if (a->re.address > b->re.address)
+	else if (a->address > b->address)
 		return 1;
-	else if (a->re.size < b->re.size)
+	else if (a->size < b->size)
 		return -1;
-	else if (a->re.size > b->re.size)
+	else if (a->size > b->size)
 		return 1;
 	else
 		return 0;
@@ -902,7 +902,7 @@ static void add_local_fixup_entry(struct dt_info *dti,
 		struct node *refnode)
 {
 	struct node *wn, *nwn;	/* local fixup node, walk node, new */
-	uint32_t value_32;
+	fdt32_t value_32;
 	char **compp;
 	int i, depth;
 
diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h
index 2cdfcd82e9..7caca8257c 100644
--- a/scripts/dtc/srcpos.h
+++ b/scripts/dtc/srcpos.h
@@ -22,6 +22,7 @@
 
 #include <stdio.h>
 #include <stdbool.h>
+#include "util.h"
 
 struct srcfile_state {
 	FILE *f;
@@ -106,12 +107,10 @@ extern void srcpos_update(struct srcpos *pos, const char *text, int len);
 extern struct srcpos *srcpos_copy(struct srcpos *pos);
 extern char *srcpos_string(struct srcpos *pos);
 
-extern void srcpos_verror(struct srcpos *pos, const char *prefix,
-			  const char *fmt, va_list va)
-	__attribute__((format(printf, 3, 0)));
-extern void srcpos_error(struct srcpos *pos, const char *prefix,
-			 const char *fmt, ...)
-	__attribute__((format(printf, 3, 4)));
+extern void PRINTF(3, 0) srcpos_verror(struct srcpos *pos, const char *prefix,
+					const char *fmt, va_list va);
+extern void PRINTF(3, 4) srcpos_error(struct srcpos *pos, const char *prefix,
+				      const char *fmt, ...);
 
 extern void srcpos_set_line(char *f, int l);
 
diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c
index c9d8967969..2461a3d068 100644
--- a/scripts/dtc/treesource.c
+++ b/scripts/dtc/treesource.c
@@ -137,7 +137,7 @@ static void write_propval_string(FILE *f, struct data val)
 static void write_propval_cells(FILE *f, struct data val)
 {
 	void *propend = val.val + val.len;
-	cell_t *cp = (cell_t *)val.val;
+	fdt32_t *cp = (fdt32_t *)val.val;
 	struct marker *m = val.markers;
 
 	fprintf(f, "<");
@@ -275,8 +275,8 @@ void dt_to_source(FILE *f, struct dt_info *dti)
 		for_each_label(re->labels, l)
 			fprintf(f, "%s: ", l->label);
 		fprintf(f, "/memreserve/\t0x%016llx 0x%016llx;\n",
-			(unsigned long long)re->re.address,
-			(unsigned long long)re->re.size);
+			(unsigned long long)re->address,
+			(unsigned long long)re->size);
 	}
 
 	write_tree_source_node(f, dti->dt, 0);
diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c
index 3550f86bd6..9953c32a02 100644
--- a/scripts/dtc/util.c
+++ b/scripts/dtc/util.c
@@ -396,7 +396,7 @@ void utilfdt_print_data(const char *data, int len)
 		} while (s < data + len);
 
 	} else if ((len % 4) == 0) {
-		const uint32_t *cell = (const uint32_t *)data;
+		const fdt32_t *cell = (const fdt32_t *)data;
 
 		printf(" = <");
 		for (i = 0, len /= 4; i < len; i++)
@@ -412,15 +412,16 @@ void utilfdt_print_data(const char *data, int len)
 	}
 }
 
-void util_version(void)
+void NORETURN util_version(void)
 {
 	printf("Version: %s\n", DTC_VERSION);
 	exit(0);
 }
 
-void util_usage(const char *errmsg, const char *synopsis,
-		const char *short_opts, struct option const long_opts[],
-		const char * const opts_help[])
+void NORETURN util_usage(const char *errmsg, const char *synopsis,
+			 const char *short_opts,
+			 struct option const long_opts[],
+			 const char * const opts_help[])
 {
 	FILE *fp = errmsg ? stderr : stdout;
 	const char a_arg[] = "<arg>";
diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h
index bc3d223fa6..ad5f41199e 100644
--- a/scripts/dtc/util.h
+++ b/scripts/dtc/util.h
@@ -25,15 +25,17 @@
  *                                                                   USA
  */
 
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-
 #ifdef __GNUC__
-static inline void
-__attribute__((noreturn)) __attribute__((format (printf, 1, 2)))
-die(const char *str, ...)
+#define PRINTF(i, j)	__attribute__((format (printf, i, j)))
+#define NORETURN	__attribute__((noreturn))
 #else
-static inline void die(const char *str, ...)
+#define PRINTF(i, j)
+#define NORETURN
 #endif
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+static inline void NORETURN PRINTF(1, 2) die(const char *str, ...)
 {
 	va_list ap;
 
@@ -66,12 +68,7 @@ static inline void *xrealloc(void *p, size_t len)
 
 extern char *xstrdup(const char *s);
 
-#ifdef __GNUC__
-extern int __attribute__((format (printf, 2, 3)))
-xasprintf(char **strp, const char *fmt, ...);
-#else
-extern int xasprintf(char **strp, const char *fmt, ...);
-#endif
+extern int PRINTF(2, 3) xasprintf(char **strp, const char *fmt, ...);
 extern char *join_path(const char *path, const char *name);
 
 /**
@@ -200,7 +197,7 @@ void utilfdt_print_data(const char *data, int len);
 /**
  * Show source version and exit
  */
-void util_version(void) __attribute__((noreturn));
+void NORETURN util_version(void);
 
 /**
  * Show usage and exit
@@ -214,9 +211,10 @@ void util_version(void) __attribute__((noreturn));
  * @param long_opts	The structure of long options
  * @param opts_help	An array of help strings (should align with long_opts)
  */
-void util_usage(const char *errmsg, const char *synopsis,
-		const char *short_opts, struct option const long_opts[],
-		const char * const opts_help[]) __attribute__((noreturn));
+void NORETURN util_usage(const char *errmsg, const char *synopsis,
+			 const char *short_opts,
+			 struct option const long_opts[],
+			 const char * const opts_help[]);
 
 /**
  * Show usage and exit
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
index bbbd96b1dc..859564e8b4 100644
--- a/scripts/dtc/version_gen.h
+++ b/scripts/dtc/version_gen.h
@@ -1 +1 @@
-#define DTC_VERSION "DTC 1.4.3"
+#define DTC_VERSION "DTC 1.4.4"

commit d18719a48ffdf6be4a0724f88d8968904df3a0d9
Author: Tom Rini <trini@konsulko.com>
Date:   Sat Sep 23 12:52:44 2017 -0400

    UPSTREAM: scripts/dtc: Update to upstream version v1.4.3
    
    Using the update-dtc-source.sh script from Linux v4.14-rc1 import the
    portions of dtc that we require.  We bring in update-dtc-source.sh and
    scripts/dtc/Makefile from Linux v4.14-rc1.  Rework DTC_FLAGS handling to
    not require a test.
    
    Change-Id: Id69453c629574df1be4cd3bb0f0f0e86516eeb47
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c0e032e0090d6541549b19cc47e06ccd1f302893)

diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index a3a5c59d0d..2c7918ad37 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -172,11 +172,6 @@ ld-version = $(shell $(LD) --version | $(srctree)/scripts/ld-version.sh)
 # Usage:  $(call ld-ifversion, -ge, 22252, y)
 ld-ifversion = $(shell [ $(ld-version) $(1) $(2) ] && echo $(3) || echo $(4))
 
-# dtc-option
-# Usage:  DTC_FLAGS += $(call dtc-option,-Wno-unit_address_vs_reg)
-dtc-option = $(call try-run,\
-	echo '/dts-v1/; / {};' | $(DTC) $(1),$(1),$(2))
-
 ######
 
 ###
diff --git a/scripts/Makefile.extrawarn b/scripts/Makefile.extrawarn
index 90dc149df3..1d3a570594 100644
--- a/scripts/Makefile.extrawarn
+++ b/scripts/Makefile.extrawarn
@@ -58,8 +58,8 @@ endif
 
 KBUILD_CFLAGS += $(warning)
 
-dtc-warning-2 += $(call dtc-option,-Wnode_name_chars_strict)
-dtc-warning-2 += $(call dtc-option,-Wproperty_name_chars_strict)
+dtc-warning-2 += -Wnode_name_chars_strict
+dtc-warning-2 += -Wproperty_name_chars_strict
 
 dtc-warning := $(dtc-warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
 dtc-warning += $(dtc-warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
@@ -70,11 +70,11 @@ DTC_FLAGS += $(dtc-warning)
 else
 
 # Disable noisy checks by default
-DTC_FLAGS += $(call dtc-option,-Wno-unit_address_vs_reg)
-DTC_FLAGS += $(call dtc-option,-Wno-simple_bus_reg)
-DTC_FLAGS += $(call dtc-option,-Wno-unit_address_format)
-DTC_FLAGS += $(call dtc-option,-Wno-pci_bridge)
-DTC_FLAGS += $(call dtc-option,-Wno-pci_device_bus_num)
-DTC_FLAGS += $(call dtc-option,-Wno-pci_device_reg)
+DTC_FLAGS += -Wno-unit_address_vs_reg
+DTC_FLAGS += -Wno-simple_bus_reg
+DTC_FLAGS += -Wno-unit_address_format
+DTC_FLAGS += -Wno-pci_bridge
+DTC_FLAGS += -Wno-pci_device_bus_num
+DTC_FLAGS += -Wno-pci_device_reg
 
 endif
diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile
new file mode 100644
index 0000000000..2a48022c41
--- /dev/null
+++ b/scripts/dtc/Makefile
@@ -0,0 +1,31 @@
+# scripts/dtc makefile
+
+hostprogs-y	:= dtc
+always		:= $(hostprogs-y)
+
+dtc-objs	:= dtc.o flattree.o fstree.o data.o livetree.o treesource.o \
+		   srcpos.o checks.o util.o
+dtc-objs	+= dtc-lexer.lex.o dtc-parser.tab.o
+
+# Source files need to get at the userspace version of libfdt_env.h to compile
+
+HOSTCFLAGS_DTC := -I$(src) -I$(src)/libfdt
+
+HOSTCFLAGS_checks.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_data.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_dtc.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_flattree.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_fstree.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_livetree.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_srcpos.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_treesource.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_util.o := $(HOSTCFLAGS_DTC)
+
+HOSTCFLAGS_dtc-lexer.lex.o := $(HOSTCFLAGS_DTC)
+HOSTCFLAGS_dtc-parser.tab.o := $(HOSTCFLAGS_DTC)
+
+# dependencies on generated files need to be listed explicitly
+$(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h
+
+# generated files need to be cleaned explicitly
+clean-files	:= dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h
diff --git a/scripts/dtc/Makefile.dtc b/scripts/dtc/Makefile.dtc
new file mode 100644
index 0000000000..bece49b355
--- /dev/null
+++ b/scripts/dtc/Makefile.dtc
@@ -0,0 +1,18 @@
+# Makefile.dtc
+#
+# This is not a complete Makefile of itself.  Instead, it is designed to
+# be easily embeddable into other systems of Makefiles.
+#
+DTC_SRCS = \
+	checks.c \
+	data.c \
+	dtc.c \
+	flattree.c \
+	fstree.c \
+	livetree.c \
+	srcpos.c \
+	treesource.c \
+	util.c
+
+DTC_GEN_SRCS = dtc-lexer.lex.c dtc-parser.tab.c
+DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o)
diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c
new file mode 100644
index 0000000000..0e8b978c36
--- /dev/null
+++ b/scripts/dtc/checks.c
@@ -0,0 +1,849 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2007.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+#ifdef TRACE_CHECKS
+#define TRACE(c, ...) \
+	do { \
+		fprintf(stderr, "=== %s: ", (c)->name); \
+		fprintf(stderr, __VA_ARGS__); \
+		fprintf(stderr, "\n"); \
+	} while (0)
+#else
+#define TRACE(c, fmt, ...)	do { } while (0)
+#endif
+
+enum checkstatus {
+	UNCHECKED = 0,
+	PREREQ,
+	PASSED,
+	FAILED,
+};
+
+struct check;
+
+typedef void (*check_fn)(struct check *c, struct dt_info *dti, struct node *node);
+
+struct check {
+	const char *name;
+	check_fn fn;
+	void *data;
+	bool warn, error;
+	enum checkstatus status;
+	bool inprogress;
+	int num_prereqs;
+	struct check **prereq;
+};
+
+#define CHECK_ENTRY(_nm, _fn, _d, _w, _e, ...)	       \
+	static struct check *_nm##_prereqs[] = { __VA_ARGS__ }; \
+	static struct check _nm = { \
+		.name = #_nm, \
+		.fn = (_fn), \
+		.data = (_d), \
+		.warn = (_w), \
+		.error = (_e), \
+		.status = UNCHECKED, \
+		.num_prereqs = ARRAY_SIZE(_nm##_prereqs), \
+		.prereq = _nm##_prereqs, \
+	};
+#define WARNING(_nm, _fn, _d, ...) \
+	CHECK_ENTRY(_nm, _fn, _d, true, false, __VA_ARGS__)
+#define ERROR(_nm, _fn, _d, ...) \
+	CHECK_ENTRY(_nm, _fn, _d, false, true, __VA_ARGS__)
+#define CHECK(_nm, _fn, _d, ...) \
+	CHECK_ENTRY(_nm, _fn, _d, false, false, __VA_ARGS__)
+
+#ifdef __GNUC__
+static inline void check_msg(struct check *c, struct dt_info *dti,
+			     const char *fmt, ...) __attribute__((format (printf, 3, 4)));
+#endif
+static inline void check_msg(struct check *c, struct dt_info *dti,
+			     const char *fmt, ...)
+{
+	va_list ap;
+	va_start(ap, fmt);
+
+	if ((c->warn && (quiet < 1))
+	    || (c->error && (quiet < 2))) {
+		fprintf(stderr, "%s: %s (%s): ",
+			strcmp(dti->outname, "-") ? dti->outname : "<stdout>",
+			(c->error) ? "ERROR" : "Warning", c->name);
+		vfprintf(stderr, fmt, ap);
+		fprintf(stderr, "\n");
+	}
+	va_end(ap);
+}
+
+#define FAIL(c, dti, ...)						\
+	do {								\
+		TRACE((c), "\t\tFAILED at %s:%d", __FILE__, __LINE__);	\
+		(c)->status = FAILED;					\
+		check_msg((c), dti, __VA_ARGS__);			\
+	} while (0)
+
+static void check_nodes_props(struct check *c, struct dt_info *dti, struct node *node)
+{
+	struct node *child;
+
+	TRACE(c, "%s", node->fullpath);
+	if (c->fn)
+		c->fn(c, dti, node);
+
+	for_each_child(node, child)
+		check_nodes_props(c, dti, child);
+}
+
+static bool run_check(struct check *c, struct dt_info *dti)
+{
+	struct node *dt = dti->dt;
+	bool error = false;
+	int i;
+
+	assert(!c->inprogress);
+
+	if (c->status != UNCHECKED)
+		goto out;
+
+	c->inprogress = true;
+
+	for (i = 0; i < c->num_prereqs; i++) {
+		struct check *prq = c->prereq[i];
+		error = error || run_check(prq, dti);
+		if (prq->status != PASSED) {
+			c->status = PREREQ;
+			check_msg(c, dti, "Failed prerequisite '%s'",
+				  c->prereq[i]->name);
+		}
+	}
+
+	if (c->status != UNCHECKED)
+		goto out;
+
+	check_nodes_props(c, dti, dt);
+
+	if (c->status == UNCHECKED)
+		c->status = PASSED;
+
+	TRACE(c, "\tCompleted, status %d", c->status);
+
+out:
+	c->inprogress = false;
+	if ((c->status != PASSED) && (c->error))
+		error = true;
+	return error;
+}
+
+/*
+ * Utility check functions
+ */
+
+/* A check which always fails, for testing purposes only */
+static inline void check_always_fail(struct check *c, struct dt_info *dti,
+				     struct node *node)
+{
+	FAIL(c, dti, "always_fail check");
+}
+CHECK(always_fail, check_always_fail, NULL);
+
+static void check_is_string(struct check *c, struct dt_info *dti,
+			    struct node *node)
+{
+	struct property *prop;
+	char *propname = c->data;
+
+	prop = get_property(node, propname);
+	if (!prop)
+		return; /* Not present, assumed ok */
+
+	if (!data_is_one_string(prop->val))
+		FAIL(c, dti, "\"%s\" property in %s is not a string",
+		     propname, node->fullpath);
+}
+#define WARNING_IF_NOT_STRING(nm, propname) \
+	WARNING(nm, check_is_string, (propname))
+#define ERROR_IF_NOT_STRING(nm, propname) \
+	ERROR(nm, check_is_string, (propname))
+
+static void check_is_cell(struct check *c, struct dt_info *dti,
+			  struct node *node)
+{
+	struct property *prop;
+	char *propname = c->data;
+
+	prop = get_property(node, propname);
+	if (!prop)
+		return; /* Not present, assumed ok */
+
+	if (prop->val.len != sizeof(cell_t))
+		FAIL(c, dti, "\"%s\" property in %s is not a single cell",
+		     propname, node->fullpath);
+}
+#define WARNING_IF_NOT_CELL(nm, propname) \
+	WARNING(nm, check_is_cell, (propname))
+#define ERROR_IF_NOT_CELL(nm, propname) \
+	ERROR(nm, check_is_cell, (propname))
+
+/*
+ * Structural check functions
+ */
+
+static void check_duplicate_node_names(struct check *c, struct dt_info *dti,
+				       struct node *node)
+{
+	struct node *child, *child2;
+
+	for_each_child(node, child)
+		for (child2 = child->next_sibling;
+		     child2;
+		     child2 = child2->next_sibling)
+			if (streq(child->name, child2->name))
+				FAIL(c, dti, "Duplicate node name %s",
+				     child->fullpath);
+}
+ERROR(duplicate_node_names, check_duplicate_node_names, NULL);
+
+static void check_duplicate_property_names(struct check *c, struct dt_info *dti,
+					   struct node *node)
+{
+	struct property *prop, *prop2;
+
+	for_each_property(node, prop) {
+		for (prop2 = prop->next; prop2; prop2 = prop2->next) {
+			if (prop2->deleted)
+				continue;
+			if (streq(prop->name, prop2->name))
+				FAIL(c, dti, "Duplicate property name %s in %s",
+				     prop->name, node->fullpath);
+		}
+	}
+}
+ERROR(duplicate_property_names, check_duplicate_property_names, NULL);
+
+#define LOWERCASE	"abcdefghijklmnopqrstuvwxyz"
+#define UPPERCASE	"ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+#define DIGITS		"0123456789"
+#define PROPNODECHARS	LOWERCASE UPPERCASE DIGITS ",._+*#?-"
+#define PROPNODECHARSSTRICT	LOWERCASE UPPERCASE DIGITS ",-"
+
+static void check_node_name_chars(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	int n = strspn(node->name, c->data);
+
+	if (n < strlen(node->name))
+		FAIL(c, dti, "Bad character '%c' in node %s",
+		     node->name[n], node->fullpath);
+}
+ERROR(node_name_chars, check_node_name_chars, PROPNODECHARS "@");
+
+static void check_node_name_chars_strict(struct check *c, struct dt_info *dti,
+					 struct node *node)
+{
+	int n = strspn(node->name, c->data);
+
+	if (n < node->basenamelen)
+		FAIL(c, dti, "Character '%c' not recommended in node %s",
+		     node->name[n], node->fullpath);
+}
+CHECK(node_name_chars_strict, check_node_name_chars_strict, PROPNODECHARSSTRICT);
+
+static void check_node_name_format(struct check *c, struct dt_info *dti,
+				   struct node *node)
+{
+	if (strchr(get_unitname(node), '@'))
+		FAIL(c, dti, "Node %s has multiple '@' characters in name",
+		     node->fullpath);
+}
+ERROR(node_name_format, check_node_name_format, NULL, &node_name_chars);
+
+static void check_unit_address_vs_reg(struct check *c, struct dt_info *dti,
+				      struct node *node)
+{
+	const char *unitname = get_unitname(node);
+	struct property *prop = get_property(node, "reg");
+
+	if (!prop) {
+		prop = get_property(node, "ranges");
+		if (prop && !prop->val.len)
+			prop = NULL;
+	}
+
+	if (prop) {
+		if (!unitname[0])
+			FAIL(c, dti, "Node %s has a reg or ranges property, but no unit name",
+			    node->fullpath);
+	} else {
+		if (unitname[0])
+			FAIL(c, dti, "Node %s has a unit name, but no reg property",
+			    node->fullpath);
+	}
+}
+WARNING(unit_address_vs_reg, check_unit_address_vs_reg, NULL);
+
+static void check_property_name_chars(struct check *c, struct dt_info *dti,
+				      struct node *node)
+{
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		int n = strspn(prop->name, c->data);
+
+		if (n < strlen(prop->name))
+			FAIL(c, dti, "Bad character '%c' in property name \"%s\", node %s",
+			     prop->name[n], prop->name, node->fullpath);
+	}
+}
+ERROR(property_name_chars, check_property_name_chars, PROPNODECHARS);
+
+static void check_property_name_chars_strict(struct check *c,
+					     struct dt_info *dti,
+					     struct node *node)
+{
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		const char *name = prop->name;
+		int n = strspn(name, c->data);
+
+		if (n == strlen(prop->name))
+			continue;
+
+		/* Certain names are whitelisted */
+		if (streq(name, "device_type"))
+			continue;
+
+		/*
+		 * # is only allowed at the beginning of property names not counting
+		 * the vendor prefix.
+		 */
+		if (name[n] == '#' && ((n == 0) || (name[n-1] == ','))) {
+			name += n + 1;
+			n = strspn(name, c->data);
+		}
+		if (n < strlen(name))
+			FAIL(c, dti, "Character '%c' not recommended in property name \"%s\", node %s",
+			     name[n], prop->name, node->fullpath);
+	}
+}
+CHECK(property_name_chars_strict, check_property_name_chars_strict, PROPNODECHARSSTRICT);
+
+#define DESCLABEL_FMT	"%s%s%s%s%s"
+#define DESCLABEL_ARGS(node,prop,mark)		\
+	((mark) ? "value of " : ""),		\
+	((prop) ? "'" : ""), \
+	((prop) ? (prop)->name : ""), \
+	((prop) ? "' in " : ""), (node)->fullpath
+
+static void check_duplicate_label(struct check *c, struct dt_info *dti,
+				  const char *label, struct node *node,
+				  struct property *prop, struct marker *mark)
+{
+	struct node *dt = dti->dt;
+	struct node *othernode = NULL;
+	struct property *otherprop = NULL;
+	struct marker *othermark = NULL;
+
+	othernode = get_node_by_label(dt, label);
+
+	if (!othernode)
+		otherprop = get_property_by_label(dt, label, &othernode);
+	if (!othernode)
+		othermark = get_marker_label(dt, label, &othernode,
+					       &otherprop);
+
+	if (!othernode)
+		return;
+
+	if ((othernode != node) || (otherprop != prop) || (othermark != mark))
+		FAIL(c, dti, "Duplicate label '%s' on " DESCLABEL_FMT
+		     " and " DESCLABEL_FMT,
+		     label, DESCLABEL_ARGS(node, prop, mark),
+		     DESCLABEL_ARGS(othernode, otherprop, othermark));
+}
+
+static void check_duplicate_label_node(struct check *c, struct dt_info *dti,
+				       struct node *node)
+{
+	struct label *l;
+	struct property *prop;
+
+	for_each_label(node->labels, l)
+		check_duplicate_label(c, dti, l->label, node, NULL, NULL);
+
+	for_each_property(node, prop) {
+		struct marker *m = prop->val.markers;
+
+		for_each_label(prop->labels, l)
+			check_duplicate_label(c, dti, l->label, node, prop, NULL);
+
+		for_each_marker_of_type(m, LABEL)
+			check_duplicate_label(c, dti, m->ref, node, prop, m);
+	}
+}
+ERROR(duplicate_label, check_duplicate_label_node, NULL);
+
+static cell_t check_phandle_prop(struct check *c, struct dt_info *dti,
+				 struct node *node, const char *propname)
+{
+	struct node *root = dti->dt;
+	struct property *prop;
+	struct marker *m;
+	cell_t phandle;
+
+	prop = get_property(node, propname);
+	if (!prop)
+		return 0;
+
+	if (prop->val.len != sizeof(cell_t)) {
+		FAIL(c, dti, "%s has bad length (%d) %s property",
+		     node->fullpath, prop->val.len, prop->name);
+		return 0;
+	}
+
+	m = prop->val.markers;
+	for_each_marker_of_type(m, REF_PHANDLE) {
+		assert(m->offset == 0);
+		if (node != get_node_by_ref(root, m->ref))
+			/* "Set this node's phandle equal to some
+			 * other node's phandle".  That's nonsensical
+			 * by construction. */ {
+			FAIL(c, dti, "%s in %s is a reference to another node",
+			     prop->name, node->fullpath);
+		}
+		/* But setting this node's phandle equal to its own
+		 * phandle is allowed - that means allocate a unique
+		 * phandle for this node, even if it's not otherwise
+		 * referenced.  The value will be filled in later, so
+		 * we treat it as having no phandle data for now. */
+		return 0;
+	}
+
+	phandle = propval_cell(prop);
+
+	if ((phandle == 0) || (phandle == -1)) {
+		FAIL(c, dti, "%s has bad value (0x%x) in %s property",
+		     node->fullpath, phandle, prop->name);
+		return 0;
+	}
+
+	return phandle;
+}
+
+static void check_explicit_phandles(struct check *c, struct dt_info *dti,
+				    struct node *node)
+{
+	struct node *root = dti->dt;
+	struct node *other;
+	cell_t phandle, linux_phandle;
+
+	/* Nothing should have assigned phandles yet */
+	assert(!node->phandle);
+
+	phandle = check_phandle_prop(c, dti, node, "phandle");
+
+	linux_phandle = check_phandle_prop(c, dti, node, "linux,phandle");
+
+	if (!phandle && !linux_phandle)
+		/* No valid phandles; nothing further to check */
+		return;
+
+	if (linux_phandle && phandle && (phandle != linux_phandle))
+		FAIL(c, dti, "%s has mismatching 'phandle' and 'linux,phandle'"
+		     " properties", node->fullpath);
+
+	if (linux_phandle && !phandle)
+		phandle = linux_phandle;
+
+	other = get_node_by_phandle(root, phandle);
+	if (other && (other != node)) {
+		FAIL(c, dti, "%s has duplicated phandle 0x%x (seen before at %s)",
+		     node->fullpath, phandle, other->fullpath);
+		return;
+	}
+
+	node->phandle = phandle;
+}
+ERROR(explicit_phandles, check_explicit_phandles, NULL);
+
+static void check_name_properties(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	struct property **pp, *prop = NULL;
+
+	for (pp = &node->proplist; *pp; pp = &((*pp)->next))
+		if (streq((*pp)->name, "name")) {
+			prop = *pp;
+			break;
+		}
+
+	if (!prop)
+		return; /* No name property, that's fine */
+
+	if ((prop->val.len != node->basenamelen+1)
+	    || (memcmp(prop->val.val, node->name, node->basenamelen) != 0)) {
+		FAIL(c, dti, "\"name\" property in %s is incorrect (\"%s\" instead"
+		     " of base node name)", node->fullpath, prop->val.val);
+	} else {
+		/* The name property is correct, and therefore redundant.
+		 * Delete it */
+		*pp = prop->next;
+		free(prop->name);
+		data_free(prop->val);
+		free(prop);
+	}
+}
+ERROR_IF_NOT_STRING(name_is_string, "name");
+ERROR(name_properties, check_name_properties, NULL, &name_is_string);
+
+/*
+ * Reference fixup functions
+ */
+
+static void fixup_phandle_references(struct check *c, struct dt_info *dti,
+				     struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		struct marker *m = prop->val.markers;
+		struct node *refnode;
+		cell_t phandle;
+
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			assert(m->offset + sizeof(cell_t) <= prop->val.len);
+
+			refnode = get_node_by_ref(dt, m->ref);
+			if (! refnode) {
+				if (!(dti->dtsflags & DTSF_PLUGIN))
+					FAIL(c, dti, "Reference to non-existent node or "
+							"label \"%s\"\n", m->ref);
+				else /* mark the entry as unresolved */
+					*((cell_t *)(prop->val.val + m->offset)) =
+						cpu_to_fdt32(0xffffffff);
+				continue;
+			}
+
+			phandle = get_node_phandle(dt, refnode);
+			*((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle);
+		}
+	}
+}
+ERROR(phandle_references, fixup_phandle_references, NULL,
+      &duplicate_node_names, &explicit_phandles);
+
+static void fixup_path_references(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct property *prop;
+
+	for_each_property(node, prop) {
+		struct marker *m = prop->val.markers;
+		struct node *refnode;
+		char *path;
+
+		for_each_marker_of_type(m, REF_PATH) {
+			assert(m->offset <= prop->val.len);
+
+			refnode = get_node_by_ref(dt, m->ref);
+			if (!refnode) {
+				FAIL(c, dti, "Reference to non-existent node or label \"%s\"\n",
+				     m->ref);
+				continue;
+			}
+
+			path = refnode->fullpath;
+			prop->val = data_insert_at_marker(prop->val, m, path,
+							  strlen(path) + 1);
+		}
+	}
+}
+ERROR(path_references, fixup_path_references, NULL, &duplicate_node_names);
+
+/*
+ * Semantic checks
+ */
+WARNING_IF_NOT_CELL(address_cells_is_cell, "#address-cells");
+WARNING_IF_NOT_CELL(size_cells_is_cell, "#size-cells");
+WARNING_IF_NOT_CELL(interrupt_cells_is_cell, "#interrupt-cells");
+
+WARNING_IF_NOT_STRING(device_type_is_string, "device_type");
+WARNING_IF_NOT_STRING(model_is_string, "model");
+WARNING_IF_NOT_STRING(status_is_string, "status");
+
+static void fixup_addr_size_cells(struct check *c, struct dt_info *dti,
+				  struct node *node)
+{
+	struct property *prop;
+
+	node->addr_cells = -1;
+	node->size_cells = -1;
+
+	prop = get_property(node, "#address-cells");
+	if (prop)
+		node->addr_cells = propval_cell(prop);
+
+	prop = get_property(node, "#size-cells");
+	if (prop)
+		node->size_cells = propval_cell(prop);
+}
+WARNING(addr_size_cells, fixup_addr_size_cells, NULL,
+	&address_cells_is_cell, &size_cells_is_cell);
+
+#define node_addr_cells(n) \
+	(((n)->addr_cells == -1) ? 2 : (n)->addr_cells)
+#define node_size_cells(n) \
+	(((n)->size_cells == -1) ? 1 : (n)->size_cells)
+
+static void check_reg_format(struct check *c, struct dt_info *dti,
+			     struct node *node)
+{
+	struct property *prop;
+	int addr_cells, size_cells, entrylen;
+
+	prop = get_property(node, "reg");
+	if (!prop)
+		return; /* No "reg", that's fine */
+
+	if (!node->parent) {
+		FAIL(c, dti, "Root node has a \"reg\" property");
+		return;
+	}
+
+	if (prop->val.len == 0)
+		FAIL(c, dti, "\"reg\" property in %s is empty", node->fullpath);
+
+	addr_cells = node_addr_cells(node->parent);
+	size_cells = node_size_cells(node->parent);
+	entrylen = (addr_cells + size_cells) * sizeof(cell_t);
+
+	if (!entrylen || (prop->val.len % entrylen) != 0)
+		FAIL(c, dti, "\"reg\" property in %s has invalid length (%d bytes) "
+		     "(#address-cells == %d, #size-cells == %d)",
+		     node->fullpath, prop->val.len, addr_cells, size_cells);
+}
+WARNING(reg_format, check_reg_format, NULL, &addr_size_cells);
+
+static void check_ranges_format(struct check *c, struct dt_info *dti,
+				struct node *node)
+{
+	struct property *prop;
+	int c_addr_cells, p_addr_cells, c_size_cells, p_size_cells, entrylen;
+
+	prop = get_property(node, "ranges");
+	if (!prop)
+		return;
+
+	if (!node->parent) {
+		FAIL(c, dti, "Root node has a \"ranges\" property");
+		return;
+	}
+
+	p_addr_cells = node_addr_cells(node->parent);
+	p_size_cells = node_size_cells(node->parent);
+	c_addr_cells = node_addr_cells(node);
+	c_size_cells = node_size_cells(node);
+	entrylen = (p_addr_cells + c_addr_cells + c_size_cells) * sizeof(cell_t);
+
+	if (prop->val.len == 0) {
+		if (p_addr_cells != c_addr_cells)
+			FAIL(c, dti, "%s has empty \"ranges\" property but its "
+			     "#address-cells (%d) differs from %s (%d)",
+			     node->fullpath, c_addr_cells, node->parent->fullpath,
+			     p_addr_cells);
+		if (p_size_cells != c_size_cells)
+			FAIL(c, dti, "%s has empty \"ranges\" property but its "
+			     "#size-cells (%d) differs from %s (%d)",
+			     node->fullpath, c_size_cells, node->parent->fullpath,
+			     p_size_cells);
+	} else if ((prop->val.len % entrylen) != 0) {
+		FAIL(c, dti, "\"ranges\" property in %s has invalid length (%d bytes) "
+		     "(parent #address-cells == %d, child #address-cells == %d, "
+		     "#size-cells == %d)", node->fullpath, prop->val.len,
+		     p_addr_cells, c_addr_cells, c_size_cells);
+	}
+}
+WARNING(ranges_format, check_ranges_format, NULL, &addr_size_cells);
+
+/*
+ * Style checks
+ */
+static void check_avoid_default_addr_size(struct check *c, struct dt_info *dti,
+					  struct node *node)
+{
+	struct property *reg, *ranges;
+
+	if (!node->parent)
+		return; /* Ignore root node */
+
+	reg = get_property(node, "reg");
+	ranges = get_property(node, "ranges");
+
+	if (!reg && !ranges)
+		return;
+
+	if (node->parent->addr_cells == -1)
+		FAIL(c, dti, "Relying on default #address-cells value for %s",
+		     node->fullpath);
+
+	if (node->parent->size_cells == -1)
+		FAIL(c, dti, "Relying on default #size-cells value for %s",
+		     node->fullpath);
+}
+WARNING(avoid_default_addr_size, check_avoid_default_addr_size, NULL,
+	&addr_size_cells);
+
+static void check_obsolete_chosen_interrupt_controller(struct check *c,
+						       struct dt_info *dti,
+						       struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct node *chosen;
+	struct property *prop;
+
+	if (node != dt)
+		return;
+
+
+	chosen = get_node_by_path(dt, "/chosen");
+	if (!chosen)
+		return;
+
+	prop = get_property(chosen, "interrupt-controller");
+	if (prop)
+		FAIL(c, dti, "/chosen has obsolete \"interrupt-controller\" "
+		     "property");
+}
+WARNING(obsolete_chosen_interrupt_controller,
+	check_obsolete_chosen_interrupt_controller, NULL);
+
+static struct check *check_table[] = {
+	&duplicate_node_names, &duplicate_property_names,
+	&node_name_chars, &node_name_format, &property_name_chars,
+	&name_is_string, &name_properties,
+
+	&duplicate_label,
+
+	&explicit_phandles,
+	&phandle_references, &path_references,
+
+	&address_cells_is_cell, &size_cells_is_cell, &interrupt_cells_is_cell,
+	&device_type_is_string, &model_is_string, &status_is_string,
+
+	&property_name_chars_strict,
+	&node_name_chars_strict,
+
+	&addr_size_cells, &reg_format, &ranges_format,
+
+	&unit_address_vs_reg,
+
+	&avoid_default_addr_size,
+	&obsolete_chosen_interrupt_controller,
+
+	&always_fail,
+};
+
+static void enable_warning_error(struct check *c, bool warn, bool error)
+{
+	int i;
+
+	/* Raising level, also raise it for prereqs */
+	if ((warn && !c->warn) || (error && !c->error))
+		for (i = 0; i < c->num_prereqs; i++)
+			enable_warning_error(c->prereq[i], warn, error);
+
+	c->warn = c->warn || warn;
+	c->error = c->error || error;
+}
+
+static void disable_warning_error(struct check *c, bool warn, bool error)
+{
+	int i;
+
+	/* Lowering level, also lower it for things this is the prereq
+	 * for */
+	if ((warn && c->warn) || (error && c->error)) {
+		for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+			struct check *cc = check_table[i];
+			int j;
+
+			for (j = 0; j < cc->num_prereqs; j++)
+				if (cc->prereq[j] == c)
+					disable_warning_error(cc, warn, error);
+		}
+	}
+
+	c->warn = c->warn && !warn;
+	c->error = c->error && !error;
+}
+
+void parse_checks_option(bool warn, bool error, const char *arg)
+{
+	int i;
+	const char *name = arg;
+	bool enable = true;
+
+	if ((strncmp(arg, "no-", 3) == 0)
+	    || (strncmp(arg, "no_", 3) == 0)) {
+		name = arg + 3;
+		enable = false;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+		struct check *c = check_table[i];
+
+		if (streq(c->name, name)) {
+			if (enable)
+				enable_warning_error(c, warn, error);
+			else
+				disable_warning_error(c, warn, error);
+			return;
+		}
+	}
+
+	die("Unrecognized check name \"%s\"\n", name);
+}
+
+void process_checks(bool force, struct dt_info *dti)
+{
+	int i;
+	int error = 0;
+
+	for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+		struct check *c = check_table[i];
+
+		if (c->warn || c->error)
+			error = error || run_check(c, dti);
+	}
+
+	if (error) {
+		if (!force) {
+			fprintf(stderr, "ERROR: Input tree has errors, aborting "
+				"(use -f to force output)\n");
+			exit(2);
+		} else if (quiet < 3) {
+			fprintf(stderr, "Warning: Input tree has errors, "
+				"output forced\n");
+		}
+	}
+}
diff --git a/scripts/dtc/data.c b/scripts/dtc/data.c
new file mode 100644
index 0000000000..8cae237468
--- /dev/null
+++ b/scripts/dtc/data.c
@@ -0,0 +1,269 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+void data_free(struct data d)
+{
+	struct marker *m, *nm;
+
+	m = d.markers;
+	while (m) {
+		nm = m->next;
+		free(m->ref);
+		free(m);
+		m = nm;
+	}
+
+	if (d.val)
+		free(d.val);
+}
+
+struct data data_grow_for(struct data d, int xlen)
+{
+	struct data nd;
+	int newsize;
+
+	if (xlen == 0)
+		return d;
+
+	nd = d;
+
+	newsize = xlen;
+
+	while ((d.len + xlen) > newsize)
+		newsize *= 2;
+
+	nd.val = xrealloc(d.val, newsize);
+
+	return nd;
+}
+
+struct data data_copy_mem(const char *mem, int len)
+{
+	struct data d;
+
+	d = data_grow_for(empty_data, len);
+
+	d.len = len;
+	memcpy(d.val, mem, len);
+
+	return d;
+}
+
+struct data data_copy_escape_string(const char *s, int len)
+{
+	int i = 0;
+	struct data d;
+	char *q;
+
+	d = data_grow_for(empty_data, len + 1);
+
+	q = d.val;
+	while (i < len) {
+		char c = s[i++];
+
+		if (c == '\\')
+			c = get_escape_char(s, &i);
+
+		q[d.len++] = c;
+	}
+
+	q[d.len++] = '\0';
+	return d;
+}
+
+struct data data_copy_file(FILE *f, size_t maxlen)
+{
+	struct data d = empty_data;
+
+	while (!feof(f) && (d.len < maxlen)) {
+		size_t chunksize, ret;
+
+		if (maxlen == -1)
+			chunksize = 4096;
+		else
+			chunksize = maxlen - d.len;
+
+		d = data_grow_for(d, chunksize);
+		ret = fread(d.val + d.len, 1, chunksize, f);
+
+		if (ferror(f))
+			die("Error reading file into data: %s", strerror(errno));
+
+		if (d.len + ret < d.len)
+			die("Overflow reading file into data\n");
+
+		d.len += ret;
+	}
+
+	return d;
+}
+
+struct data data_append_data(struct data d, const void *p, int len)
+{
+	d = data_grow_for(d, len);
+	memcpy(d.val + d.len, p, len);
+	d.len += len;
+	return d;
+}
+
+struct data data_insert_at_marker(struct data d, struct marker *m,
+				  const void *p, int len)
+{
+	d = data_grow_for(d, len);
+	memmove(d.val + m->offset + len, d.val + m->offset, d.len - m->offset);
+	memcpy(d.val + m->offset, p, len);
+	d.len += len;
+
+	/* Adjust all markers after the one we're inserting at */
+	m = m->next;
+	for_each_marker(m)
+		m->offset += len;
+	return d;
+}
+
+static struct data data_append_markers(struct data d, struct marker *m)
+{
+	struct marker **mp = &d.markers;
+
+	/* Find the end of the markerlist */
+	while (*mp)
+		mp = &((*mp)->next);
+	*mp = m;
+	return d;
+}
+
+struct data data_merge(struct data d1, struct data d2)
+{
+	struct data d;
+	struct marker *m2 = d2.markers;
+
+	d = data_append_markers(data_append_data(d1, d2.val, d2.len), m2);
+
+	/* Adjust for the length of d1 */
+	for_each_marker(m2)
+		m2->offset += d1.len;
+
+	d2.markers = NULL; /* So data_free() doesn't clobber them */
+	data_free(d2);
+
+	return d;
+}
+
+struct data data_append_integer(struct data d, uint64_t value, int bits)
+{
+	uint8_t value_8;
+	uint16_t value_16;
+	uint32_t value_32;
+	uint64_t value_64;
+
+	switch (bits) {
+	case 8:
+		value_8 = value;
+		return data_append_data(d, &value_8, 1);
+
+	case 16:
+		value_16 = cpu_to_fdt16(value);
+		return data_append_data(d, &value_16, 2);
+
+	case 32:
+		value_32 = cpu_to_fdt32(value);
+		return data_append_data(d, &value_32, 4);
+
+	case 64:
+		value_64 = cpu_to_fdt64(value);
+		return data_append_data(d, &value_64, 8);
+
+	default:
+		die("Invalid literal size (%d)\n", bits);
+	}
+}
+
+struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
+{
+	struct fdt_reserve_entry bere;
+
+	bere.address = cpu_to_fdt64(re->address);
+	bere.size = cpu_to_fdt64(re->size);
+
+	return data_append_data(d, &bere, sizeof(bere));
+}
+
+struct data data_append_cell(struct data d, cell_t word)
+{
+	return data_append_integer(d, word, sizeof(word) * 8);
+}
+
+struct data data_append_addr(struct data d, uint64_t addr)
+{
+	return data_append_integer(d, addr, sizeof(addr) * 8);
+}
+
+struct data data_append_byte(struct data d, uint8_t byte)
+{
+	return data_append_data(d, &byte, 1);
+}
+
+struct data data_append_zeroes(struct data d, int len)
+{
+	d = data_grow_for(d, len);
+
+	memset(d.val + d.len, 0, len);
+	d.len += len;
+	return d;
+}
+
+struct data data_append_align(struct data d, int align)
+{
+	int newlen = ALIGN(d.len, align);
+	return data_append_zeroes(d, newlen - d.len);
+}
+
+struct data data_add_marker(struct data d, enum markertype type, char *ref)
+{
+	struct marker *m;
+
+	m = xmalloc(sizeof(*m));
+	m->offset = d.len;
+	m->type = type;
+	m->ref = ref;
+	m->next = NULL;
+
+	return data_append_markers(d, m);
+}
+
+bool data_is_one_string(struct data d)
+{
+	int i;
+	int len = d.len;
+
+	if (len == 0)
+		return false;
+
+	for (i = 0; i < len-1; i++)
+		if (d.val[i] == '\0')
+			return false;
+
+	if (d.val[len-1] != '\0')
+		return false;
+
+	return true;
+}
diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
new file mode 100644
index 0000000000..52bed7b749
--- /dev/null
+++ b/scripts/dtc/dtc-lexer.l
@@ -0,0 +1,311 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+%option noyywrap nounput noinput never-interactive
+
+%x BYTESTRING
+%x PROPNODENAME
+%s V1
+
+PROPNODECHAR	[a-zA-Z0-9,._+*#?@-]
+PATHCHAR	({PROPNODECHAR}|[/])
+LABEL		[a-zA-Z_][a-zA-Z0-9_]*
+STRING		\"([^\\"]|\\.)*\"
+CHAR_LITERAL	'([^']|\\')*'
+WS		[[:space:]]
+COMMENT		"/*"([^*]|\*+[^*/])*\*+"/"
+LINECOMMENT	"//".*\n
+
+%{
+#include "dtc.h"
+#include "srcpos.h"
+#include "dtc-parser.tab.h"
+
+YYLTYPE yylloc;
+extern bool treesource_error;
+
+/* CAUTION: this will stop working if we ever use yyless() or yyunput() */
+#define	YY_USER_ACTION \
+	{ \
+		srcpos_update(&yylloc, yytext, yyleng); \
+	}
+
+/*#define LEXDEBUG	1*/
+
+#ifdef LEXDEBUG
+#define DPRINT(fmt, ...)	fprintf(stderr, fmt, ##__VA_ARGS__)
+#else
+#define DPRINT(fmt, ...)	do { } while (0)
+#endif
+
+static int dts_version = 1;
+
+#define BEGIN_DEFAULT()		DPRINT("<V1>\n"); \
+				BEGIN(V1); \
+
+static void push_input_file(const char *filename);
+static bool pop_input_file(void);
+#ifdef __GNUC__
+static void lexical_error(const char *fmt, ...)
+	__attribute__((format (printf, 1, 2)));
+#else
+static void lexical_error(const char *fmt, ...);
+#endif
+
+%}
+
+%%
+<*>"/include/"{WS}*{STRING} {
+			char *name = strchr(yytext, '\"') + 1;
+			yytext[yyleng-1] = '\0';
+			push_input_file(name);
+		}
+
+<*>^"#"(line)?[ \t]+[0-9]+[ \t]+{STRING}([ \t]+[0-9]+)? {
+			char *line, *fnstart, *fnend;
+			struct data fn;
+			/* skip text before line # */
+			line = yytext;
+			while (!isdigit((unsigned char)*line))
+				line++;
+
+			/* regexp ensures that first and list "
+			 * in the whole yytext are those at
+			 * beginning and end of the filename string */
+			fnstart = memchr(yytext, '"', yyleng);
+			for (fnend = yytext + yyleng - 1;
+			     *fnend != '"'; fnend--)
+				;
+			assert(fnstart && fnend && (fnend > fnstart));
+
+			fn = data_copy_escape_string(fnstart + 1,
+						     fnend - fnstart - 1);
+
+			/* Don't allow nuls in filenames */
+			if (memchr(fn.val, '\0', fn.len - 1))
+				lexical_error("nul in line number directive");
+
+			/* -1 since #line is the number of the next line */
+			srcpos_set_line(xstrdup(fn.val), atoi(line) - 1);
+			data_free(fn);
+		}
+
+<*><<EOF>>		{
+			if (!pop_input_file()) {
+				yyterminate();
+			}
+		}
+
+<*>{STRING}	{
+			DPRINT("String: %s\n", yytext);
+			yylval.data = data_copy_escape_string(yytext+1,
+					yyleng-2);
+			return DT_STRING;
+		}
+
+<*>"/dts-v1/"	{
+			DPRINT("Keyword: /dts-v1/\n");
+			dts_version = 1;
+			BEGIN_DEFAULT();
+			return DT_V1;
+		}
+
+<*>"/plugin/"	{
+			DPRINT("Keyword: /plugin/\n");
+			return DT_PLUGIN;
+		}
+
+<*>"/memreserve/"	{
+			DPRINT("Keyword: /memreserve/\n");
+			BEGIN_DEFAULT();
+			return DT_MEMRESERVE;
+		}
+
+<*>"/bits/"	{
+			DPRINT("Keyword: /bits/\n");
+			BEGIN_DEFAULT();
+			return DT_BITS;
+		}
+
+<*>"/delete-property/"	{
+			DPRINT("Keyword: /delete-property/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_PROP;
+		}
+
+<*>"/delete-node/"	{
+			DPRINT("Keyword: /delete-node/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_NODE;
+		}
+
+<*>{LABEL}:	{
+			DPRINT("Label: %s\n", yytext);
+			yylval.labelref = xstrdup(yytext);
+			yylval.labelref[yyleng-1] = '\0';
+			return DT_LABEL;
+		}
+
+<V1>([0-9]+|0[xX][0-9a-fA-F]+)(U|L|UL|LL|ULL)? {
+			char *e;
+			DPRINT("Integer Literal: '%s'\n", yytext);
+
+			errno = 0;
+			yylval.integer = strtoull(yytext, &e, 0);
+
+			if (*e && e[strspn(e, "UL")]) {
+				lexical_error("Bad integer literal '%s'",
+					      yytext);
+			}
+
+			if (errno == ERANGE)
+				lexical_error("Integer literal '%s' out of range",
+					      yytext);
+			else
+				/* ERANGE is the only strtoull error triggerable
+				 *  by strings matching the pattern */
+				assert(errno == 0);
+			return DT_LITERAL;
+		}
+
+<*>{CHAR_LITERAL}	{
+			struct data d;
+			DPRINT("Character literal: %s\n", yytext);
+
+			d = data_copy_escape_string(yytext+1, yyleng-2);
+			if (d.len == 1) {
+				lexical_error("Empty character literal");
+				yylval.integer = 0;
+			} else {
+				yylval.integer = (unsigned char)d.val[0];
+
+				if (d.len > 2)
+					lexical_error("Character literal has %d"
+						      " characters instead of 1",
+						      d.len - 1);
+			}
+
+			data_free(d);
+			return DT_CHAR_LITERAL;
+		}
+
+<*>\&{LABEL}	{	/* label reference */
+			DPRINT("Ref: %s\n", yytext+1);
+			yylval.labelref = xstrdup(yytext+1);
+			return DT_REF;
+		}
+
+<*>"&{/"{PATHCHAR}*\}	{	/* new-style path reference */
+			yytext[yyleng-1] = '\0';
+			DPRINT("Ref: %s\n", yytext+2);
+			yylval.labelref = xstrdup(yytext+2);
+			return DT_REF;
+		}
+
+<BYTESTRING>[0-9a-fA-F]{2} {
+			yylval.byte = strtol(yytext, NULL, 16);
+			DPRINT("Byte: %02x\n", (int)yylval.byte);
+			return DT_BYTE;
+		}
+
+<BYTESTRING>"]"	{
+			DPRINT("/BYTESTRING\n");
+			BEGIN_DEFAULT();
+			return ']';
+		}
+
+<PROPNODENAME>\\?{PROPNODECHAR}+ {
+			DPRINT("PropNodeName: %s\n", yytext);
+			yylval.propnodename = xstrdup((yytext[0] == '\\') ?
+							yytext + 1 : yytext);
+			BEGIN_DEFAULT();
+			return DT_PROPNODENAME;
+		}
+
+"/incbin/"	{
+			DPRINT("Binary Include\n");
+			return DT_INCBIN;
+		}
+
+<*>{WS}+	/* eat whitespace */
+<*>{COMMENT}+	/* eat C-style comments */
+<*>{LINECOMMENT}+ /* eat C++-style comments */
+
+<*>"<<"		{ return DT_LSHIFT; };
+<*>">>"		{ return DT_RSHIFT; };
+<*>"<="		{ return DT_LE; };
+<*>">="		{ return DT_GE; };
+<*>"=="		{ return DT_EQ; };
+<*>"!="		{ return DT_NE; };
+<*>"&&"		{ return DT_AND; };
+<*>"||"		{ return DT_OR; };
+
+<*>.		{
+			DPRINT("Char: %c (\\x%02x)\n", yytext[0],
+				(unsigned)yytext[0]);
+			if (yytext[0] == '[') {
+				DPRINT("<BYTESTRING>\n");
+				BEGIN(BYTESTRING);
+			}
+			if ((yytext[0] == '{')
+			    || (yytext[0] == ';')) {
+				DPRINT("<PROPNODENAME>\n");
+				BEGIN(PROPNODENAME);
+			}
+			return yytext[0];
+		}
+
+%%
+
+static void push_input_file(const char *filename)
+{
+	assert(filename);
+
+	srcfile_push(filename);
+
+	yyin = current_srcfile->f;
+
+	yypush_buffer_state(yy_create_buffer(yyin, YY_BUF_SIZE));
+}
+
+
+static bool pop_input_file(void)
+{
+	if (srcfile_pop() == 0)
+		return false;
+
+	yypop_buffer_state();
+	yyin = current_srcfile->f;
+
+	return true;
+}
+
+static void lexical_error(const char *fmt, ...)
+{
+	va_list ap;
+
+	va_start(ap, fmt);
+	srcpos_verror(&yylloc, "Lexical error", fmt, ap);
+	va_end(ap);
+
+	treesource_error = true;
+}
diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped
new file mode 100644
index 0000000000..d77fdfe590
--- /dev/null
+++ b/scripts/dtc/dtc-lexer.lex.c_shipped
@@ -0,0 +1,2260 @@
+#line 2 "dtc-lexer.lex.c"
+
+#line 4 "dtc-lexer.lex.c"
+
+#define  YY_INT_ALIGNED short int
+
+/* A lexical scanner generated by flex */
+
+#define FLEX_SCANNER
+#define YY_FLEX_MAJOR_VERSION 2
+#define YY_FLEX_MINOR_VERSION 5
+#define YY_FLEX_SUBMINOR_VERSION 35
+#if YY_FLEX_SUBMINOR_VERSION > 0
+#define FLEX_BETA
+#endif
+
+/* First, we deal with  platform-specific or compiler-specific issues. */
+
+/* begin standard C headers. */
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <stdlib.h>
+
+/* end standard C headers. */
+
+/* flex integer type definitions */
+
+#ifndef FLEXINT_H
+#define FLEXINT_H
+
+/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+
+/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
+ * if you want the limit (max/min) macros for int types. 
+ */
+#ifndef __STDC_LIMIT_MACROS
+#define __STDC_LIMIT_MACROS 1
+#endif
+
+#include <inttypes.h>
+typedef int8_t flex_int8_t;
+typedef uint8_t flex_uint8_t;
+typedef int16_t flex_int16_t;
+typedef uint16_t flex_uint16_t;
+typedef int32_t flex_int32_t;
+typedef uint32_t flex_uint32_t;
+#else
+typedef signed char flex_int8_t;
+typedef short int flex_int16_t;
+typedef int flex_int32_t;
+typedef unsigned char flex_uint8_t; 
+typedef unsigned short int flex_uint16_t;
+typedef unsigned int flex_uint32_t;
+
+/* Limits of integral types. */
+#ifndef INT8_MIN
+#define INT8_MIN               (-128)
+#endif
+#ifndef INT16_MIN
+#define INT16_MIN              (-32767-1)
+#endif
+#ifndef INT32_MIN
+#define INT32_MIN              (-2147483647-1)
+#endif
+#ifndef INT8_MAX
+#define INT8_MAX               (127)
+#endif
+#ifndef INT16_MAX
+#define INT16_MAX              (32767)
+#endif
+#ifndef INT32_MAX
+#define INT32_MAX              (2147483647)
+#endif
+#ifndef UINT8_MAX
+#define UINT8_MAX              (255U)
+#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX             (65535U)
+#endif
+#ifndef UINT32_MAX
+#define UINT32_MAX             (4294967295U)
+#endif
+
+#endif /* ! C99 */
+
+#endif /* ! FLEXINT_H */
+
+#ifdef __cplusplus
+
+/* The "const" storage-class-modifier is valid. */
+#define YY_USE_CONST
+
+#else	/* ! __cplusplus */
+
+/* C99 requires __STDC__ to be defined as 1. */
+#if defined (__STDC__)
+
+#define YY_USE_CONST
+
+#endif	/* defined (__STDC__) */
+#endif	/* ! __cplusplus */
+
+#ifdef YY_USE_CONST
+#define yyconst const
+#else
+#define yyconst
+#endif
+
+/* Returned upon end-of-file. */
+#define YY_NULL 0
+
+/* Promotes a possibly negative, possibly signed char to an unsigned
+ * integer for use as an array index.  If the signed char is negative,
+ * we want to instead treat it as an 8-bit unsigned char, hence the
+ * double cast.
+ */
+#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
+
+/* Enter a start condition.  This macro really ought to take a parameter,
+ * but we do it the disgusting crufty way forced on us by the ()-less
+ * definition of BEGIN.
+ */
+#define BEGIN (yy_start) = 1 + 2 *
+
+/* Translate the current start state into a value that can be later handed
+ * to BEGIN to return to the state.  The YYSTATE alias is for lex
+ * compatibility.
+ */
+#define YY_START (((yy_start) - 1) / 2)
+#define YYSTATE YY_START
+
+/* Action number for EOF rule of a given start state. */
+#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
+
+/* Special action meaning "start processing a new file". */
+#define YY_NEW_FILE yyrestart(yyin  )
+
+#define YY_END_OF_BUFFER_CHAR 0
+
+/* Size of default input buffer. */
+#ifndef YY_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k.
+ * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case.
+ * Ditto for the __ia64__ case accordingly.
+ */
+#define YY_BUF_SIZE 32768
+#else
+#define YY_BUF_SIZE 16384
+#endif /* __ia64__ */
+#endif
+
+/* The state buf must be large enough to hold one state per character in the main buffer.
+ */
+#define YY_STATE_BUF_SIZE   ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
+
+#ifndef YY_TYPEDEF_YY_BUFFER_STATE
+#define YY_TYPEDEF_YY_BUFFER_STATE
+typedef struct yy_buffer_state *YY_BUFFER_STATE;
+#endif
+
+extern int yyleng;
+
+extern FILE *yyin, *yyout;
+
+#define EOB_ACT_CONTINUE_SCAN 0
+#define EOB_ACT_END_OF_FILE 1
+#define EOB_ACT_LAST_MATCH 2
+
+    #define YY_LESS_LINENO(n)
+    
+/* Return all but the first "n" matched characters back to the input stream. */
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up yytext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		*yy_cp = (yy_hold_char); \
+		YY_RESTORE_YY_MORE_OFFSET \
+		(yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
+		YY_DO_BEFORE_ACTION; /* set up yytext again */ \
+		} \
+	while ( 0 )
+
+#define unput(c) yyunput( c, (yytext_ptr)  )
+
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef size_t yy_size_t;
+#endif
+
+#ifndef YY_STRUCT_YY_BUFFER_STATE
+#define YY_STRUCT_YY_BUFFER_STATE
+struct yy_buffer_state
+	{
+	FILE *yy_input_file;
+
+	char *yy_ch_buf;		/* input buffer */
+	char *yy_buf_pos;		/* current position in input buffer */
+
+	/* Size of input buffer in bytes, not including room for EOB
+	 * characters.
+	 */
+	yy_size_t yy_buf_size;
+
+	/* Number of characters read into yy_ch_buf, not including EOB
+	 * characters.
+	 */
+	int yy_n_chars;
+
+	/* Whether we "own" the buffer - i.e., we know we created it,
+	 * and can realloc() it to grow it, and should free() it to
+	 * delete it.
+	 */
+	int yy_is_our_buffer;
+
+	/* Whether this is an "interactive" input source; if so, and
+	 * if we're using stdio for input, then we want to use getc()
+	 * instead of fread(), to make sure we stop fetching input after
+	 * each newline.
+	 */
+	int yy_is_interactive;
+
+	/* Whether we're considered to be at the beginning of a line.
+	 * If so, '^' rules will be active on the next match, otherwise
+	 * not.
+	 */
+	int yy_at_bol;
+
+    int yy_bs_lineno; /**< The line count. */
+    int yy_bs_column; /**< The column count. */
+    
+	/* Whether to try to fill the input buffer when we reach the
+	 * end of it.
+	 */
+	int yy_fill_buffer;
+
+	int yy_buffer_status;
+
+#define YY_BUFFER_NEW 0
+#define YY_BUFFER_NORMAL 1
+	/* When an EOF's been seen but there's still some text to process
+	 * then we mark the buffer as YY_EOF_PENDING, to indicate that we
+	 * shouldn't try reading from the input source any more.  We might
+	 * still have a bunch of tokens to match, though, because of
+	 * possible backing-up.
+	 *
+	 * When we actually see the EOF, we change the status to "new"
+	 * (via yyrestart()), so that the user can continue scanning by
+	 * just pointing yyin at a new input file.
+	 */
+#define YY_BUFFER_EOF_PENDING 2
+
+	};
+#endif /* !YY_STRUCT_YY_BUFFER_STATE */
+
+/* Stack of input buffers. */
+static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
+static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
+static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
+
+/* We provide macros for accessing buffer states in case in the
+ * future we want to put the buffer states in a more general
+ * "scanner state".
+ *
+ * Returns the top of the stack, or NULL.
+ */
+#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
+                          ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
+                          : NULL)
+
+/* Same as previous macro, but useful when we know that the buffer stack is not
+ * NULL or when we need an lvalue. For internal use only.
+ */
+#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
+
+/* yy_hold_char holds the character lost when yytext is formed. */
+static char yy_hold_char;
+static int yy_n_chars;		/* number of characters read into yy_ch_buf */
+int yyleng;
+
+/* Points to current character in buffer. */
+static char *yy_c_buf_p = (char *) 0;
+static int yy_init = 0;		/* whether we need to initialize */
+static int yy_start = 0;	/* start state number */
+
+/* Flag which is used to allow yywrap()'s to do buffer switches
+ * instead of setting up a fresh yyin.  A bit of a hack ...
+ */
+static int yy_did_buffer_switch_on_eof;
+
+void yyrestart (FILE *input_file  );
+void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer  );
+YY_BUFFER_STATE yy_create_buffer (FILE *file,int size  );
+void yy_delete_buffer (YY_BUFFER_STATE b  );
+void yy_flush_buffer (YY_BUFFER_STATE b  );
+void yypush_buffer_state (YY_BUFFER_STATE new_buffer  );
+void yypop_buffer_state (void );
+
+static void yyensure_buffer_stack (void );
+static void yy_load_buffer_state (void );
+static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file  );
+
+#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
+
+YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size  );
+YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str  );
+YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len  );
+
+void *yyalloc (yy_size_t  );
+void *yyrealloc (void *,yy_size_t  );
+void yyfree (void *  );
+
+#define yy_new_buffer yy_create_buffer
+
+#define yy_set_interactive(is_interactive) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){ \
+        yyensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            yy_create_buffer(yyin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
+	}
+
+#define yy_set_bol(at_bol) \
+	{ \
+	if ( ! YY_CURRENT_BUFFER ){\
+        yyensure_buffer_stack (); \
+		YY_CURRENT_BUFFER_LVALUE =    \
+            yy_create_buffer(yyin,YY_BUF_SIZE ); \
+	} \
+	YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
+	}
+
+#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
+
+/* Begin user sect3 */
+
+#define yywrap(n) 1
+#define YY_SKIP_YYWRAP
+
+typedef unsigned char YY_CHAR;
+
+FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
+
+typedef int yy_state_type;
+
+extern int yylineno;
+
+int yylineno = 1;
+
+extern char *yytext;
+#define yytext_ptr yytext
+
+static yy_state_type yy_get_previous_state (void );
+static yy_state_type yy_try_NUL_trans (yy_state_type current_state  );
+static int yy_get_next_buffer (void );
+static void yy_fatal_error (yyconst char msg[]  );
+
+/* Done after the current pattern has been matched and before the
+ * corresponding action - sets up yytext.
+ */
+#define YY_DO_BEFORE_ACTION \
+	(yytext_ptr) = yy_bp; \
+	yyleng = (size_t) (yy_cp - yy_bp); \
+	(yy_hold_char) = *yy_cp; \
+	*yy_cp = '\0'; \
+	(yy_c_buf_p) = yy_cp;
+
+#define YY_NUM_RULES 31
+#define YY_END_OF_BUFFER 32
+/* This struct is not used in this scanner,
+   but its presence is necessary. */
+struct yy_trans_info
+	{
+	flex_int32_t yy_verify;
+	flex_int32_t yy_nxt;
+	};
+static yyconst flex_int16_t yy_accept[166] =
+    {   0,
+        0,    0,    0,    0,    0,    0,    0,    0,   32,   30,
+       19,   19,   30,   30,   30,   30,   30,   30,   30,   30,
+       30,   30,   30,   30,   30,   30,   16,   17,   17,   30,
+       17,   11,   11,   19,   27,    0,    3,    0,   28,   13,
+        0,    0,   12,    0,    0,    0,    0,    0,    0,    0,
+        0,   22,   24,   26,   25,   23,    0,   10,   29,    0,
+        0,    0,   15,   15,   17,   17,   17,   11,   11,   11,
+        0,   13,    0,   12,    0,    0,    0,   21,    0,    0,
+        0,    0,    0,    0,    0,    0,    0,   17,   11,   11,
+       11,    0,   14,   20,    0,    0,    0,    0,    0,    0,
+
+        0,    0,    0,    0,   17,    0,    0,    0,    0,    0,
+        0,    0,    0,    0,    0,   17,    7,    0,    0,    0,
+        0,    0,    0,    0,    2,    0,    0,    0,    0,    0,
+        0,    0,    0,    0,    4,   18,    0,    0,    5,    2,
+        0,    0,    0,    0,    0,    0,    0,    0,    0,    0,
+        0,    0,    1,    0,    0,    0,    0,    6,    9,    0,
+        0,    0,    0,    8,    0
+    } ;
+
+static yyconst flex_int32_t yy_ec[256] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    1,    1,    2,    3,
+        4,    4,    4,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    2,    5,    6,    7,    1,    1,    8,    9,    1,
+        1,   10,   11,   11,   12,   11,   13,   14,   15,   16,
+       16,   16,   16,   16,   16,   16,   16,   17,    1,   18,
+       19,   20,   11,   11,   21,   21,   21,   21,   21,   21,
+       22,   22,   22,   22,   22,   23,   22,   22,   22,   22,
+       22,   22,   22,   22,   24,   22,   22,   25,   22,   22,
+        1,   26,   27,    1,   22,    1,   21,   28,   29,   30,
+
+       31,   21,   32,   22,   33,   22,   22,   34,   35,   36,
+       37,   38,   22,   39,   40,   41,   42,   43,   22,   25,
+       44,   22,   45,   46,   47,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1
+    } ;
+
+static yyconst flex_int32_t yy_meta[48] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    2,    3,    1,    2,
+        2,    2,    4,    5,    5,    5,    6,    1,    1,    1,
+        7,    8,    8,    8,    8,    1,    1,    7,    7,    7,
+        7,    8,    8,    8,    8,    8,    8,    8,    8,    8,
+        8,    8,    8,    8,    3,    1,    4
+    } ;
+
+static yyconst flex_int16_t yy_base[180] =
+    {   0,
+        0,  393,   35,  392,   66,  391,   38,  107,  397,  401,
+       55,  113,  377,  112,  111,  111,  114,   42,  376,  106,
+      377,  347,  126,  120,    0,  147,  401,    0,  124,    0,
+      137,  158,  170,  163,  401,  153,  401,  389,  401,    0,
+      378,  120,  401,  131,  380,  386,  355,  139,  351,  355,
+      351,  401,  401,  401,  401,  401,  367,  401,  401,  185,
+      350,  346,  401,  364,    0,  185,  347,  189,  356,  355,
+        0,    0,  330,  180,  366,  141,  372,  361,  332,  338,
+      331,  341,  334,  326,  205,  331,  337,  329,  401,  341,
+      167,  316,  401,  349,  348,  320,  328,  346,  180,  318,
+
+      324,  209,  324,  320,  322,  342,  338,  309,  306,  315,
+      305,  315,  312,  192,  342,  341,  401,  293,  306,  282,
+      268,  252,  255,  203,  285,  282,  272,  268,  252,  233,
+      232,  239,  208,  107,  401,  401,  238,  211,  401,  211,
+      212,  208,  228,  203,  215,  207,  233,  222,  212,  211,
+      203,  227,  401,  237,  225,  204,  185,  401,  401,  149,
+      128,   88,   42,  401,  401,  253,  259,  267,  271,  275,
+      281,  288,  292,  300,  308,  312,  318,  326,  334
+    } ;
+
+static yyconst flex_int16_t yy_def[180] =
+    {   0,
+      165,    1,    1,    3,  165,    5,    1,    1,  165,  165,
+      165,  165,  165,  166,  167,  168,  165,  165,  165,  165,
+      169,  165,  165,  165,  170,  169,  165,  171,  172,  171,
+      171,  165,  165,  165,  165,  166,  165,  166,  165,  173,
+      165,  168,  165,  168,  174,  175,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  169,  165,  165,  165,
+      165,  165,  165,  169,  171,  172,  171,  165,  165,  165,
+      176,  173,  177,  168,  174,  174,  175,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  171,  165,  165,
+      176,  177,  165,  165,  165,  165,  165,  165,  165,  165,
+
+      165,  165,  165,  165,  171,  165,  165,  165,  165,  165,
+      165,  165,  165,  178,  165,  171,  165,  165,  165,  165,
+      165,  165,  165,  178,  165,  178,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  179,  165,  165,
+      165,  179,  165,  179,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,    0,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165
+    } ;
+
+static yyconst flex_int16_t yy_nxt[449] =
+    {   0,
+       10,   11,   12,   11,   13,   14,   10,   15,   16,   10,
+       10,   10,   17,   10,   10,   10,   10,   18,   19,   20,
+       21,   21,   21,   21,   21,   10,   10,   21,   21,   21,
+       21,   21,   21,   21,   21,   21,   21,   21,   21,   21,
+       21,   21,   21,   21,   10,   22,   10,   24,   25,   25,
+       25,   32,   33,   33,  164,   26,   34,   34,   34,   52,
+       53,   27,   26,   26,   26,   26,   10,   11,   12,   11,
+       13,   14,   28,   15,   16,   28,   28,   28,   24,   28,
+       28,   28,   10,   18,   19,   20,   29,   29,   29,   29,
+       29,   30,   10,   29,   29,   29,   29,   29,   29,   29,
+
+       29,   29,   29,   29,   29,   29,   29,   29,   29,   29,
+       10,   22,   10,   23,   34,   34,   34,   37,   39,   43,
+       32,   33,   33,   45,   55,   56,   46,   60,   43,   45,
+       65,  163,   46,   65,   65,   65,   44,   38,   60,   74,
+       58,   47,  141,   48,  142,   44,   49,   47,   50,   48,
+       76,   51,   62,   94,   50,   41,   44,   51,   37,   61,
+       64,   64,   64,   58,   34,   34,   34,   64,  162,   80,
+       67,   68,   68,   68,   64,   64,   64,   64,   38,   81,
+       69,   70,   71,   68,   68,   68,   60,  161,   43,   69,
+       70,   65,   69,   70,   65,   65,   65,  125,   85,   85,
+
+       85,   58,   68,   68,   68,   44,  102,  110,  125,  133,
+      102,   69,   70,  111,  114,  160,  159,  126,   85,   85,
+       85,  140,  140,  140,  140,  140,  140,  153,  126,  147,
+      147,  147,  153,  148,  147,  147,  147,  158,  148,  165,
+      157,  156,  155,  151,  150,  149,  146,  154,  145,  144,
+      143,  139,  154,   36,   36,   36,   36,   36,   36,   36,
+       36,   40,  138,  137,  136,   40,   40,   42,   42,   42,
+       42,   42,   42,   42,   42,   57,   57,   57,   57,   63,
+      135,   63,   65,  134,  165,   65,  133,   65,   65,   66,
+      132,  131,   66,   66,   66,   66,   72,  130,   72,   72,
+
+       75,   75,   75,   75,   75,   75,   75,   75,   77,   77,
+       77,   77,   77,   77,   77,   77,   91,  129,   91,   92,
+      128,   92,   92,  127,   92,   92,  124,  124,  124,  124,
+      124,  124,  124,  124,  152,  152,  152,  152,  152,  152,
+      152,  152,   60,   60,  123,  122,  121,  120,  119,  118,
+      117,   45,  116,  111,  115,  113,  112,  109,  108,  107,
+       46,  106,   93,   89,  105,  104,  103,  101,  100,   99,
+       98,   97,   96,   95,   78,   76,   93,   90,   89,   88,
+       58,   87,   86,   58,   84,   83,   82,   79,   78,   76,
+       73,  165,   59,   58,   54,   35,  165,   31,   23,   23,
+
+        9,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165
+    } ;
+
+static yyconst flex_int16_t yy_chk[449] =
+    {   0,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
+        1,    1,    1,    1,    1,    1,    1,    3,    3,    3,
+        3,    7,    7,    7,  163,    3,   11,   11,   11,   18,
+       18,    3,    3,    3,    3,    3,    5,    5,    5,    5,
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+
+        5,    5,    5,    5,    5,    5,    5,    5,    5,    5,
+        5,    5,    5,    8,   12,   12,   12,   14,   15,   16,
+        8,    8,    8,   17,   20,   20,   17,   23,   42,   24,
+       29,  162,   24,   29,   29,   29,   16,   14,   31,   44,
+       29,   17,  134,   17,  134,   42,   17,   24,   17,   24,
+       76,   17,   24,   76,   24,   15,   44,   24,   36,   23,
+       26,   26,   26,   26,   34,   34,   34,   26,  161,   48,
+       31,   32,   32,   32,   26,   26,   26,   26,   36,   48,
+       32,   32,   32,   33,   33,   33,   60,  160,   74,   91,
+       91,   66,   33,   33,   66,   66,   66,  114,   60,   60,
+
+       60,   66,   68,   68,   68,   74,   85,   99,  124,  133,
+      102,   68,   68,   99,  102,  157,  156,  114,   85,   85,
+       85,  133,  133,  133,  140,  140,  140,  148,  124,  143,
+      143,  143,  152,  143,  147,  147,  147,  155,  147,  154,
+      151,  150,  149,  146,  145,  144,  142,  148,  141,  138,
+      137,  132,  152,  166,  166,  166,  166,  166,  166,  166,
+      166,  167,  131,  130,  129,  167,  167,  168,  168,  168,
+      168,  168,  168,  168,  168,  169,  169,  169,  169,  170,
+      128,  170,  171,  127,  126,  171,  125,  171,  171,  172,
+      123,  122,  172,  172,  172,  172,  173,  121,  173,  173,
+
+      174,  174,  174,  174,  174,  174,  174,  174,  175,  175,
+      175,  175,  175,  175,  175,  175,  176,  120,  176,  177,
+      119,  177,  177,  118,  177,  177,  178,  178,  178,  178,
+      178,  178,  178,  178,  179,  179,  179,  179,  179,  179,
+      179,  179,  116,  115,  113,  112,  111,  110,  109,  108,
+      107,  106,  105,  104,  103,  101,  100,   98,   97,   96,
+       95,   94,   92,   90,   88,   87,   86,   84,   83,   82,
+       81,   80,   79,   78,   77,   75,   73,   70,   69,   67,
+       64,   62,   61,   57,   51,   50,   49,   47,   46,   45,
+       41,   38,   22,   21,   19,   13,    9,    6,    4,    2,
+
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165,  165,  165,
+      165,  165,  165,  165,  165,  165,  165,  165
+    } ;
+
+static yy_state_type yy_last_accepting_state;
+static char *yy_last_accepting_cpos;
+
+extern int yy_flex_debug;
+int yy_flex_debug = 0;
+
+/* The intent behind this definition is that it'll catch
+ * any uses of REJECT which flex missed.
+ */
+#define REJECT reject_used_but_not_detected
+#define yymore() yymore_used_but_not_detected
+#define YY_MORE_ADJ 0
+#define YY_RESTORE_YY_MORE_OFFSET
+char *yytext;
+#line 1 "dtc-lexer.l"
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+#define YY_NO_INPUT 1
+
+
+
+#line 37 "dtc-lexer.l"
+#include "dtc.h"
+#include "srcpos.h"
+#include "dtc-parser.tab.h"
+
+YYLTYPE yylloc;
+extern bool treesource_error;
+
+/* CAUTION: this will stop working if we ever use yyless() or yyunput() */
+#define	YY_USER_ACTION \
+	{ \
+		srcpos_update(&yylloc, yytext, yyleng); \
+	}
+
+/*#define LEXDEBUG	1*/
+
+#ifdef LEXDEBUG
+#define DPRINT(fmt, ...)	fprintf(stderr, fmt, ##__VA_ARGS__)
+#else
+#define DPRINT(fmt, ...)	do { } while (0)
+#endif
+
+static int dts_version = 1;
+
+#define BEGIN_DEFAULT()		DPRINT("<V1>\n"); \
+				BEGIN(V1); \
+
+static void push_input_file(const char *filename);
+static bool pop_input_file(void);
+#ifdef __GNUC__
+static void lexical_error(const char *fmt, ...)
+	__attribute__((format (printf, 1, 2)));
+#else
+static void lexical_error(const char *fmt, ...);
+#endif
+
+#line 674 "dtc-lexer.lex.c"
+
+#define INITIAL 0
+#define BYTESTRING 1
+#define PROPNODENAME 2
+#define V1 3
+
+#ifndef YY_NO_UNISTD_H
+/* Special case for "unistd.h", since it is non-ANSI. We include it way
+ * down here because we want the user's section 1 to have been scanned first.
+ * The user has a chance to override it with an option.
+ */
+#include <unistd.h>
+#endif
+
+#ifndef YY_EXTRA_TYPE
+#define YY_EXTRA_TYPE void *
+#endif
+
+static int yy_init_globals (void );
+
+/* Accessor methods to globals.
+   These are made visible to non-reentrant scanners for convenience. */
+
+int yylex_destroy (void );
+
+int yyget_debug (void );
+
+void yyset_debug (int debug_flag  );
+
+YY_EXTRA_TYPE yyget_extra (void );
+
+void yyset_extra (YY_EXTRA_TYPE user_defined  );
+
+FILE *yyget_in (void );
+
+void yyset_in  (FILE * in_str  );
+
+FILE *yyget_out (void );
+
+void yyset_out  (FILE * out_str  );
+
+int yyget_leng (void );
+
+char *yyget_text (void );
+
+int yyget_lineno (void );
+
+void yyset_lineno (int line_number  );
+
+/* Macros after this point can all be overridden by user definitions in
+ * section 1.
+ */
+
+#ifndef YY_SKIP_YYWRAP
+#ifdef __cplusplus
+extern "C" int yywrap (void );
+#else
+extern int yywrap (void );
+#endif
+#endif
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char *,yyconst char *,int );
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * );
+#endif
+
+#ifndef YY_NO_INPUT
+
+#ifdef __cplusplus
+static int yyinput (void );
+#else
+static int input (void );
+#endif
+
+#endif
+
+/* Amount of stuff to slurp up with each read. */
+#ifndef YY_READ_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k */
+#define YY_READ_BUF_SIZE 16384
+#else
+#define YY_READ_BUF_SIZE 8192
+#endif /* __ia64__ */
+#endif
+
+/* Copy whatever the last rule matched to the standard output. */
+#ifndef ECHO
+/* This used to be an fputs(), but since the string might contain NUL's,
+ * we now use fwrite().
+ */
+#define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0)
+#endif
+
+/* Gets input and stuffs it into "buf".  number of characters read, or YY_NULL,
+ * is returned in "result".
+ */
+#ifndef YY_INPUT
+#define YY_INPUT(buf,result,max_size) \
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
+		{ \
+		int c = '*'; \
+		size_t n; \
+		for ( n = 0; n < max_size && \
+			     (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
+			buf[n] = (char) c; \
+		if ( c == '\n' ) \
+			buf[n++] = (char) c; \
+		if ( c == EOF && ferror( yyin ) ) \
+			YY_FATAL_ERROR( "input in flex scanner failed" ); \
+		result = n; \
+		} \
+	else \
+		{ \
+		errno=0; \
+		while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
+			{ \
+			if( errno != EINTR) \
+				{ \
+				YY_FATAL_ERROR( "input in flex scanner failed" ); \
+				break; \
+				} \
+			errno=0; \
+			clearerr(yyin); \
+			} \
+		}\
+\
+
+#endif
+
+/* No semi-colon after return; correct usage is to write "yyterminate();" -
+ * we don't want an extra ';' after the "return" because that will cause
+ * some compilers to complain about unreachable statements.
+ */
+#ifndef yyterminate
+#define yyterminate() return YY_NULL
+#endif
+
+/* Number of entries by which start-condition stack grows. */
+#ifndef YY_START_STACK_INCR
+#define YY_START_STACK_INCR 25
+#endif
+
+/* Report a fatal error. */
+#ifndef YY_FATAL_ERROR
+#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
+#endif
+
+/* end tables serialization structures and prototypes */
+
+/* Default declaration of generated scanner - a define so the user can
+ * easily add parameters.
+ */
+#ifndef YY_DECL
+#define YY_DECL_IS_OURS 1
+
+extern int yylex (void);
+
+#define YY_DECL int yylex (void)
+#endif /* !YY_DECL */
+
+/* Code executed at the beginning of each rule, after yytext and yyleng
+ * have been set up.
+ */
+#ifndef YY_USER_ACTION
+#define YY_USER_ACTION
+#endif
+
+/* Code executed at the end of each rule. */
+#ifndef YY_BREAK
+#define YY_BREAK break;
+#endif
+
+#define YY_RULE_SETUP \
+	if ( yyleng > 0 ) \
+		YY_CURRENT_BUFFER_LVALUE->yy_at_bol = \
+				(yytext[yyleng - 1] == '\n'); \
+	YY_USER_ACTION
+
+/** The main scanner function which does all the work.
+ */
+YY_DECL
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp, *yy_bp;
+	register int yy_act;
+    
+#line 74 "dtc-lexer.l"
+
+#line 867 "dtc-lexer.lex.c"
+
+	if ( !(yy_init) )
+		{
+		(yy_init) = 1;
+
+#ifdef YY_USER_INIT
+		YY_USER_INIT;
+#endif
+
+		if ( ! (yy_start) )
+			(yy_start) = 1;	/* first start state */
+
+		if ( ! yyin )
+			yyin = stdin;
+
+		if ( ! yyout )
+			yyout = stdout;
+
+		if ( ! YY_CURRENT_BUFFER ) {
+			yyensure_buffer_stack ();
+			YY_CURRENT_BUFFER_LVALUE =
+				yy_create_buffer(yyin,YY_BUF_SIZE );
+		}
+
+		yy_load_buffer_state( );
+		}
+
+	while ( 1 )		/* loops until end-of-file is reached */
+		{
+		yy_cp = (yy_c_buf_p);
+
+		/* Support of yytext. */
+		*yy_cp = (yy_hold_char);
+
+		/* yy_bp points to the position in yy_ch_buf of the start of
+		 * the current run.
+		 */
+		yy_bp = yy_cp;
+
+		yy_current_state = (yy_start);
+		yy_current_state += YY_AT_BOL();
+yy_match:
+		do
+			{
+			register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
+			if ( yy_accept[yy_current_state] )
+				{
+				(yy_last_accepting_state) = yy_current_state;
+				(yy_last_accepting_cpos) = yy_cp;
+				}
+			while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+				{
+				yy_current_state = (int) yy_def[yy_current_state];
+				if ( yy_current_state >= 166 )
+					yy_c = yy_meta[(unsigned int) yy_c];
+				}
+			yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+			++yy_cp;
+			}
+		while ( yy_current_state != 165 );
+		yy_cp = (yy_last_accepting_cpos);
+		yy_current_state = (yy_last_accepting_state);
+
+yy_find_action:
+		yy_act = yy_accept[yy_current_state];
+
+		YY_DO_BEFORE_ACTION;
+
+do_action:	/* This label is used only to access EOF actions. */
+
+		switch ( yy_act )
+	{ /* beginning of action switch */
+			case 0: /* must back up */
+			/* undo the effects of YY_DO_BEFORE_ACTION */
+			*yy_cp = (yy_hold_char);
+			yy_cp = (yy_last_accepting_cpos);
+			yy_current_state = (yy_last_accepting_state);
+			goto yy_find_action;
+
+case 1:
+/* rule 1 can match eol */
+YY_RULE_SETUP
+#line 75 "dtc-lexer.l"
+{
+			char *name = strchr(yytext, '\"') + 1;
+			yytext[yyleng-1] = '\0';
+			push_input_file(name);
+		}
+	YY_BREAK
+case 2:
+/* rule 2 can match eol */
+YY_RULE_SETUP
+#line 81 "dtc-lexer.l"
+{
+			char *line, *fnstart, *fnend;
+			struct data fn;
+			/* skip text before line # */
+			line = yytext;
+			while (!isdigit((unsigned char)*line))
+				line++;
+
+			/* regexp ensures that first and list "
+			 * in the whole yytext are those at
+			 * beginning and end of the filename string */
+			fnstart = memchr(yytext, '"', yyleng);
+			for (fnend = yytext + yyleng - 1;
+			     *fnend != '"'; fnend--)
+				;
+			assert(fnstart && fnend && (fnend > fnstart));
+
+			fn = data_copy_escape_string(fnstart + 1,
+						     fnend - fnstart - 1);
+
+			/* Don't allow nuls in filenames */
+			if (memchr(fn.val, '\0', fn.len - 1))
+				lexical_error("nul in line number directive");
+
+			/* -1 since #line is the number of the next line */
+			srcpos_set_line(xstrdup(fn.val), atoi(line) - 1);
+			data_free(fn);
+		}
+	YY_BREAK
+case YY_STATE_EOF(INITIAL):
+case YY_STATE_EOF(BYTESTRING):
+case YY_STATE_EOF(PROPNODENAME):
+case YY_STATE_EOF(V1):
+#line 110 "dtc-lexer.l"
+{
+			if (!pop_input_file()) {
+				yyterminate();
+			}
+		}
+	YY_BREAK
+case 3:
+/* rule 3 can match eol */
+YY_RULE_SETUP
+#line 116 "dtc-lexer.l"
+{
+			DPRINT("String: %s\n", yytext);
+			yylval.data = data_copy_escape_string(yytext+1,
+					yyleng-2);
+			return DT_STRING;
+		}
+	YY_BREAK
+case 4:
+YY_RULE_SETUP
+#line 123 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /dts-v1/\n");
+			dts_version = 1;
+			BEGIN_DEFAULT();
+			return DT_V1;
+		}
+	YY_BREAK
+case 5:
+YY_RULE_SETUP
+#line 130 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /plugin/\n");
+			return DT_PLUGIN;
+		}
+	YY_BREAK
+case 6:
+YY_RULE_SETUP
+#line 135 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /memreserve/\n");
+			BEGIN_DEFAULT();
+			return DT_MEMRESERVE;
+		}
+	YY_BREAK
+case 7:
+YY_RULE_SETUP
+#line 141 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /bits/\n");
+			BEGIN_DEFAULT();
+			return DT_BITS;
+		}
+	YY_BREAK
+case 8:
+YY_RULE_SETUP
+#line 147 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /delete-property/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_PROP;
+		}
+	YY_BREAK
+case 9:
+YY_RULE_SETUP
+#line 154 "dtc-lexer.l"
+{
+			DPRINT("Keyword: /delete-node/\n");
+			DPRINT("<PROPNODENAME>\n");
+			BEGIN(PROPNODENAME);
+			return DT_DEL_NODE;
+		}
+	YY_BREAK
+case 10:
+YY_RULE_SETUP
+#line 161 "dtc-lexer.l"
+{
+			DPRINT("Label: %s\n", yytext);
+			yylval.labelref = xstrdup(yytext);
+			yylval.labelref[yyleng-1] = '\0';
+			return DT_LABEL;
+		}
+	YY_BREAK
+case 11:
+YY_RULE_SETUP
+#line 168 "dtc-lexer.l"
+{
+			char *e;
+			DPRINT("Integer Literal: '%s'\n", yytext);
+
+			errno = 0;
+			yylval.integer = strtoull(yytext, &e, 0);
+
+			if (*e && e[strspn(e, "UL")]) {
+				lexical_error("Bad integer literal '%s'",
+					      yytext);
+			}
+
+			if (errno == ERANGE)
+				lexical_error("Integer literal '%s' out of range",
+					      yytext);
+			else
+				/* ERANGE is the only strtoull error triggerable
+				 *  by strings matching the pattern */
+				assert(errno == 0);
+			return DT_LITERAL;
+		}
+	YY_BREAK
+case 12:
+/* rule 12 can match eol */
+YY_RULE_SETUP
+#line 190 "dtc-lexer.l"
+{
+			struct data d;
+			DPRINT("Character literal: %s\n", yytext);
+
+			d = data_copy_escape_string(yytext+1, yyleng-2);
+			if (d.len == 1) {
+				lexical_error("Empty character literal");
+				yylval.integer = 0;
+			} else {
+				yylval.integer = (unsigned char)d.val[0];
+
+				if (d.len > 2)
+					lexical_error("Character literal has %d"
+						      " characters instead of 1",
+						      d.len - 1);
+			}
+
+			data_free(d);
+			return DT_CHAR_LITERAL;
+		}
+	YY_BREAK
+case 13:
+YY_RULE_SETUP
+#line 211 "dtc-lexer.l"
+{	/* label reference */
+			DPRINT("Ref: %s\n", yytext+1);
+			yylval.labelref = xstrdup(yytext+1);
+			return DT_REF;
+		}
+	YY_BREAK
+case 14:
+YY_RULE_SETUP
+#line 217 "dtc-lexer.l"
+{	/* new-style path reference */
+			yytext[yyleng-1] = '\0';
+			DPRINT("Ref: %s\n", yytext+2);
+			yylval.labelref = xstrdup(yytext+2);
+			return DT_REF;
+		}
+	YY_BREAK
+case 15:
+YY_RULE_SETUP
+#line 224 "dtc-lexer.l"
+{
+			yylval.byte = strtol(yytext, NULL, 16);
+			DPRINT("Byte: %02x\n", (int)yylval.byte);
+			return DT_BYTE;
+		}
+	YY_BREAK
+case 16:
+YY_RULE_SETUP
+#line 230 "dtc-lexer.l"
+{
+			DPRINT("/BYTESTRING\n");
+			BEGIN_DEFAULT();
+			return ']';
+		}
+	YY_BREAK
+case 17:
+YY_RULE_SETUP
+#line 236 "dtc-lexer.l"
+{
+			DPRINT("PropNodeName: %s\n", yytext);
+			yylval.propnodename = xstrdup((yytext[0] == '\\') ?
+							yytext + 1 : yytext);
+			BEGIN_DEFAULT();
+			return DT_PROPNODENAME;
+		}
+	YY_BREAK
+case 18:
+YY_RULE_SETUP
+#line 244 "dtc-lexer.l"
+{
+			DPRINT("Binary Include\n");
+			return DT_INCBIN;
+		}
+	YY_BREAK
+case 19:
+/* rule 19 can match eol */
+YY_RULE_SETUP
+#line 249 "dtc-lexer.l"
+/* eat whitespace */
+	YY_BREAK
+case 20:
+/* rule 20 can match eol */
+YY_RULE_SETUP
+#line 250 "dtc-lexer.l"
+/* eat C-style comments */
+	YY_BREAK
+case 21:
+/* rule 21 can match eol */
+YY_RULE_SETUP
+#line 251 "dtc-lexer.l"
+/* eat C++-style comments */
+	YY_BREAK
+case 22:
+YY_RULE_SETUP
+#line 253 "dtc-lexer.l"
+{ return DT_LSHIFT; };
+	YY_BREAK
+case 23:
+YY_RULE_SETUP
+#line 254 "dtc-lexer.l"
+{ return DT_RSHIFT; };
+	YY_BREAK
+case 24:
+YY_RULE_SETUP
+#line 255 "dtc-lexer.l"
+{ return DT_LE; };
+	YY_BREAK
+case 25:
+YY_RULE_SETUP
+#line 256 "dtc-lexer.l"
+{ return DT_GE; };
+	YY_BREAK
+case 26:
+YY_RULE_SETUP
+#line 257 "dtc-lexer.l"
+{ return DT_EQ; };
+	YY_BREAK
+case 27:
+YY_RULE_SETUP
+#line 258 "dtc-lexer.l"
+{ return DT_NE; };
+	YY_BREAK
+case 28:
+YY_RULE_SETUP
+#line 259 "dtc-lexer.l"
+{ return DT_AND; };
+	YY_BREAK
+case 29:
+YY_RULE_SETUP
+#line 260 "dtc-lexer.l"
+{ return DT_OR; };
+	YY_BREAK
+case 30:
+YY_RULE_SETUP
+#line 262 "dtc-lexer.l"
+{
+			DPRINT("Char: %c (\\x%02x)\n", yytext[0],
+				(unsigned)yytext[0]);
+			if (yytext[0] == '[') {
+				DPRINT("<BYTESTRING>\n");
+				BEGIN(BYTESTRING);
+			}
+			if ((yytext[0] == '{')
+			    || (yytext[0] == ';')) {
+				DPRINT("<PROPNODENAME>\n");
+				BEGIN(PROPNODENAME);
+			}
+			return yytext[0];
+		}
+	YY_BREAK
+case 31:
+YY_RULE_SETUP
+#line 277 "dtc-lexer.l"
+ECHO;
+	YY_BREAK
+#line 1265 "dtc-lexer.lex.c"
+
+	case YY_END_OF_BUFFER:
+		{
+		/* Amount of text matched not including the EOB char. */
+		int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
+
+		/* Undo the effects of YY_DO_BEFORE_ACTION. */
+		*yy_cp = (yy_hold_char);
+		YY_RESTORE_YY_MORE_OFFSET
+
+		if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
+			{
+			/* We're scanning a new file or input source.  It's
+			 * possible that this happened because the user
+			 * just pointed yyin at a new source and called
+			 * yylex().  If so, then we have to assure
+			 * consistency between YY_CURRENT_BUFFER and our
+			 * globals.  Here is the right place to do so, because
+			 * this is the first action (other than possibly a
+			 * back-up) that will match for the new input source.
+			 */
+			(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+			YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
+			}
+
+		/* Note that here we test for yy_c_buf_p "<=" to the position
+		 * of the first EOB in the buffer, since yy_c_buf_p will
+		 * already have been incremented past the NUL character
+		 * (since all states make transitions on EOB to the
+		 * end-of-buffer state).  Contrast this with the test
+		 * in input().
+		 */
+		if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			{ /* This was really a NUL. */
+			yy_state_type yy_next_state;
+
+			(yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
+
+			yy_current_state = yy_get_previous_state(  );
+
+			/* Okay, we're now positioned to make the NUL
+			 * transition.  We couldn't have
+			 * yy_get_previous_state() go ahead and do it
+			 * for us because it doesn't know how to deal
+			 * with the possibility of jamming (and we don't
+			 * want to build jamming into it because then it
+			 * will run more slowly).
+			 */
+
+			yy_next_state = yy_try_NUL_trans( yy_current_state );
+
+			yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+
+			if ( yy_next_state )
+				{
+				/* Consume the NUL. */
+				yy_cp = ++(yy_c_buf_p);
+				yy_current_state = yy_next_state;
+				goto yy_match;
+				}
+
+			else
+				{
+				yy_cp = (yy_last_accepting_cpos);
+				yy_current_state = (yy_last_accepting_state);
+				goto yy_find_action;
+				}
+			}
+
+		else switch ( yy_get_next_buffer(  ) )
+			{
+			case EOB_ACT_END_OF_FILE:
+				{
+				(yy_did_buffer_switch_on_eof) = 0;
+
+				if ( yywrap( ) )
+					{
+					/* Note: because we've taken care in
+					 * yy_get_next_buffer() to have set up
+					 * yytext, we can now set up
+					 * yy_c_buf_p so that if some total
+					 * hoser (like flex itself) wants to
+					 * call the scanner after we return the
+					 * YY_NULL, it'll still work - another
+					 * YY_NULL will get returned.
+					 */
+					(yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
+
+					yy_act = YY_STATE_EOF(YY_START);
+					goto do_action;
+					}
+
+				else
+					{
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+					}
+				break;
+				}
+
+			case EOB_ACT_CONTINUE_SCAN:
+				(yy_c_buf_p) =
+					(yytext_ptr) + yy_amount_of_matched_text;
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_match;
+
+			case EOB_ACT_LAST_MATCH:
+				(yy_c_buf_p) =
+				&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
+
+				yy_current_state = yy_get_previous_state(  );
+
+				yy_cp = (yy_c_buf_p);
+				yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+				goto yy_find_action;
+			}
+		break;
+		}
+
+	default:
+		YY_FATAL_ERROR(
+			"fatal flex scanner internal error--no action found" );
+	} /* end of action switch */
+		} /* end of scanning one token */
+} /* end of yylex */
+
+/* yy_get_next_buffer - try to read in a new buffer
+ *
+ * Returns a code representing an action:
+ *	EOB_ACT_LAST_MATCH -
+ *	EOB_ACT_CONTINUE_SCAN - continue scanning from current position
+ *	EOB_ACT_END_OF_FILE - end of file
+ */
+static int yy_get_next_buffer (void)
+{
+    	register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
+	register char *source = (yytext_ptr);
+	register int number_to_move, i;
+	int ret_val;
+
+	if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
+		YY_FATAL_ERROR(
+		"fatal flex scanner internal error--end of buffer missed" );
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
+		{ /* Don't try to fill the buffer, so this is an EOF. */
+		if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
+			{
+			/* We matched a single character, the EOB, so
+			 * treat this as a final EOF.
+			 */
+			return EOB_ACT_END_OF_FILE;
+			}
+
+		else
+			{
+			/* We matched some text prior to the EOB, first
+			 * process it.
+			 */
+			return EOB_ACT_LAST_MATCH;
+			}
+		}
+
+	/* Try to read more data. */
+
+	/* First move last chars to start of buffer. */
+	number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
+
+	for ( i = 0; i < number_to_move; ++i )
+		*(dest++) = *(source++);
+
+	if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
+		/* don't do the read, it's not guaranteed to return an EOF,
+		 * just force an EOF
+		 */
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
+
+	else
+		{
+			int num_to_read =
+			YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
+
+		while ( num_to_read <= 0 )
+			{ /* Not enough room in the buffer - grow it. */
+
+			/* just a shorter name for the current buffer */
+			YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
+
+			int yy_c_buf_p_offset =
+				(int) ((yy_c_buf_p) - b->yy_ch_buf);
+
+			if ( b->yy_is_our_buffer )
+				{
+				int new_size = b->yy_buf_size * 2;
+
+				if ( new_size <= 0 )
+					b->yy_buf_size += b->yy_buf_size / 8;
+				else
+					b->yy_buf_size *= 2;
+
+				b->yy_ch_buf = (char *)
+					/* Include room in for 2 EOB chars. */
+					yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2  );
+				}
+			else
+				/* Can't grow it, we don't own it. */
+				b->yy_ch_buf = 0;
+
+			if ( ! b->yy_ch_buf )
+				YY_FATAL_ERROR(
+				"fatal error - scanner input buffer overflow" );
+
+			(yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
+
+			num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
+						number_to_move - 1;
+
+			}
+
+		if ( num_to_read > YY_READ_BUF_SIZE )
+			num_to_read = YY_READ_BUF_SIZE;
+
+		/* Read in more data. */
+		YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
+			(yy_n_chars), (size_t) num_to_read );
+
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	if ( (yy_n_chars) == 0 )
+		{
+		if ( number_to_move == YY_MORE_ADJ )
+			{
+			ret_val = EOB_ACT_END_OF_FILE;
+			yyrestart(yyin  );
+			}
+
+		else
+			{
+			ret_val = EOB_ACT_LAST_MATCH;
+			YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
+				YY_BUFFER_EOF_PENDING;
+			}
+		}
+
+	else
+		ret_val = EOB_ACT_CONTINUE_SCAN;
+
+	if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) {
+		/* Extend the array by 50%, plus the number we really need. */
+		yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1);
+		YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size  );
+		if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
+			YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" );
+	}
+
+	(yy_n_chars) += number_to_move;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
+	YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
+
+	(yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
+
+	return ret_val;
+}
+
+/* yy_get_previous_state - get the state just before the EOB char was reached */
+
+    static yy_state_type yy_get_previous_state (void)
+{
+	register yy_state_type yy_current_state;
+	register char *yy_cp;
+    
+	yy_current_state = (yy_start);
+	yy_current_state += YY_AT_BOL();
+
+	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
+		{
+		register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
+		if ( yy_accept[yy_current_state] )
+			{
+			(yy_last_accepting_state) = yy_current_state;
+			(yy_last_accepting_cpos) = yy_cp;
+			}
+		while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+			{
+			yy_current_state = (int) yy_def[yy_current_state];
+			if ( yy_current_state >= 166 )
+				yy_c = yy_meta[(unsigned int) yy_c];
+			}
+		yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+		}
+
+	return yy_current_state;
+}
+
+/* yy_try_NUL_trans - try to make a transition on the NUL character
+ *
+ * synopsis
+ *	next_state = yy_try_NUL_trans( current_state );
+ */
+    static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
+{
+	register int yy_is_jam;
+    	register char *yy_cp = (yy_c_buf_p);
+
+	register YY_CHAR yy_c = 1;
+	if ( yy_accept[yy_current_state] )
+		{
+		(yy_last_accepting_state) = yy_current_state;
+		(yy_last_accepting_cpos) = yy_cp;
+		}
+	while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+		{
+		yy_current_state = (int) yy_def[yy_current_state];
+		if ( yy_current_state >= 166 )
+			yy_c = yy_meta[(unsigned int) yy_c];
+		}
+	yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+	yy_is_jam = (yy_current_state == 165);
+
+	return yy_is_jam ? 0 : yy_current_state;
+}
+
+#ifndef YY_NO_INPUT
+#ifdef __cplusplus
+    static int yyinput (void)
+#else
+    static int input  (void)
+#endif
+
+{
+	int c;
+    
+	*(yy_c_buf_p) = (yy_hold_char);
+
+	if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
+		{
+		/* yy_c_buf_p now points to the character we want to return.
+		 * If this occurs *before* the EOB characters, then it's a
+		 * valid NUL; if not, then we've hit the end of the buffer.
+		 */
+		if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+			/* This was really a NUL. */
+			*(yy_c_buf_p) = '\0';
+
+		else
+			{ /* need more input */
+			int offset = (yy_c_buf_p) - (yytext_ptr);
+			++(yy_c_buf_p);
+
+			switch ( yy_get_next_buffer(  ) )
+				{
+				case EOB_ACT_LAST_MATCH:
+					/* This happens because yy_g_n_b()
+					 * sees that we've accumulated a
+					 * token and flags that we need to
+					 * try matching the token before
+					 * proceeding.  But for input(),
+					 * there's no matching to consider.
+					 * So convert the EOB_ACT_LAST_MATCH
+					 * to EOB_ACT_END_OF_FILE.
+					 */
+
+					/* Reset buffer status. */
+					yyrestart(yyin );
+
+					/*FALLTHROUGH*/
+
+				case EOB_ACT_END_OF_FILE:
+					{
+					if ( yywrap( ) )
+						return EOF;
+
+					if ( ! (yy_did_buffer_switch_on_eof) )
+						YY_NEW_FILE;
+#ifdef __cplusplus
+					return yyinput();
+#else
+					return input();
+#endif
+					}
+
+				case EOB_ACT_CONTINUE_SCAN:
+					(yy_c_buf_p) = (yytext_ptr) + offset;
+					break;
+				}
+			}
+		}
+
+	c = *(unsigned char *) (yy_c_buf_p);	/* cast for 8-bit char's */
+	*(yy_c_buf_p) = '\0';	/* preserve yytext */
+	(yy_hold_char) = *++(yy_c_buf_p);
+
+	YY_CURRENT_BUFFER_LVALUE->yy_at_bol = (c == '\n');
+
+	return c;
+}
+#endif	/* ifndef YY_NO_INPUT */
+
+/** Immediately switch to a different input stream.
+ * @param input_file A readable stream.
+ * 
+ * @note This function does not reset the start condition to @c INITIAL .
+ */
+    void yyrestart  (FILE * input_file )
+{
+    
+	if ( ! YY_CURRENT_BUFFER ){
+        yyensure_buffer_stack ();
+		YY_CURRENT_BUFFER_LVALUE =
+            yy_create_buffer(yyin,YY_BUF_SIZE );
+	}
+
+	yy_init_buffer(YY_CURRENT_BUFFER,input_file );
+	yy_load_buffer_state( );
+}
+
+/** Switch to a different input buffer.
+ * @param new_buffer The new input buffer.
+ * 
+ */
+    void yy_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
+{
+    
+	/* TODO. We should be able to replace this entire function body
+	 * with
+	 *		yypop_buffer_state();
+	 *		yypush_buffer_state(new_buffer);
+     */
+	yyensure_buffer_stack ();
+	if ( YY_CURRENT_BUFFER == new_buffer )
+		return;
+
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+	yy_load_buffer_state( );
+
+	/* We don't actually know whether we did this switch during
+	 * EOF (yywrap()) processing, but the only time this flag
+	 * is looked at is after yywrap() is called, so it's safe
+	 * to go ahead and always set it.
+	 */
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+
+static void yy_load_buffer_state  (void)
+{
+    	(yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+	(yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
+	yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
+	(yy_hold_char) = *(yy_c_buf_p);
+}
+
+/** Allocate and initialize an input buffer state.
+ * @param file A readable stream.
+ * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
+ * 
+ * @return the allocated buffer state.
+ */
+    YY_BUFFER_STATE yy_create_buffer  (FILE * file, int  size )
+{
+	YY_BUFFER_STATE b;
+    
+	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
+
+	b->yy_buf_size = size;
+
+	/* yy_ch_buf has to be 2 characters longer than the size given because
+	 * we need to put in 2 end-of-buffer characters.
+	 */
+	b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2  );
+	if ( ! b->yy_ch_buf )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
+
+	b->yy_is_our_buffer = 1;
+
+	yy_init_buffer(b,file );
+
+	return b;
+}
+
+/** Destroy the buffer.
+ * @param b a buffer created with yy_create_buffer()
+ * 
+ */
+    void yy_delete_buffer (YY_BUFFER_STATE  b )
+{
+    
+	if ( ! b )
+		return;
+
+	if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
+		YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
+
+	if ( b->yy_is_our_buffer )
+		yyfree((void *) b->yy_ch_buf  );
+
+	yyfree((void *) b  );
+}
+
+/* Initializes or reinitializes a buffer.
+ * This function is sometimes called more than once on the same buffer,
+ * such as during a yyrestart() or at EOF.
+ */
+    static void yy_init_buffer  (YY_BUFFER_STATE  b, FILE * file )
+
+{
+	int oerrno = errno;
+    
+	yy_flush_buffer(b );
+
+	b->yy_input_file = file;
+	b->yy_fill_buffer = 1;
+
+    /* If b is the current buffer, then yy_init_buffer was _probably_
+     * called from yyrestart() or through yy_get_next_buffer.
+     * In that case, we don't want to reset the lineno or column.
+     */
+    if (b != YY_CURRENT_BUFFER){
+        b->yy_bs_lineno = 1;
+        b->yy_bs_column = 0;
+    }
+
+        b->yy_is_interactive = 0;
+    
+	errno = oerrno;
+}
+
+/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
+ * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
+ * 
+ */
+    void yy_flush_buffer (YY_BUFFER_STATE  b )
+{
+    	if ( ! b )
+		return;
+
+	b->yy_n_chars = 0;
+
+	/* We always need two end-of-buffer characters.  The first causes
+	 * a transition to the end-of-buffer state.  The second causes
+	 * a jam in that state.
+	 */
+	b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
+	b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
+
+	b->yy_buf_pos = &b->yy_ch_buf[0];
+
+	b->yy_at_bol = 1;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	if ( b == YY_CURRENT_BUFFER )
+		yy_load_buffer_state( );
+}
+
+/** Pushes the new state onto the stack. The new state becomes
+ *  the current state. This function will allocate the stack
+ *  if necessary.
+ *  @param new_buffer The new state.
+ *  
+ */
+void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
+{
+    	if (new_buffer == NULL)
+		return;
+
+	yyensure_buffer_stack();
+
+	/* This block is copied from yy_switch_to_buffer. */
+	if ( YY_CURRENT_BUFFER )
+		{
+		/* Flush out information for old buffer. */
+		*(yy_c_buf_p) = (yy_hold_char);
+		YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+		YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+		}
+
+	/* Only push if top exists. Otherwise, replace top. */
+	if (YY_CURRENT_BUFFER)
+		(yy_buffer_stack_top)++;
+	YY_CURRENT_BUFFER_LVALUE = new_buffer;
+
+	/* copied from yy_switch_to_buffer. */
+	yy_load_buffer_state( );
+	(yy_did_buffer_switch_on_eof) = 1;
+}
+
+/** Removes and deletes the top of the stack, if present.
+ *  The next element becomes the new top.
+ *  
+ */
+void yypop_buffer_state (void)
+{
+    	if (!YY_CURRENT_BUFFER)
+		return;
+
+	yy_delete_buffer(YY_CURRENT_BUFFER );
+	YY_CURRENT_BUFFER_LVALUE = NULL;
+	if ((yy_buffer_stack_top) > 0)
+		--(yy_buffer_stack_top);
+
+	if (YY_CURRENT_BUFFER) {
+		yy_load_buffer_state( );
+		(yy_did_buffer_switch_on_eof) = 1;
+	}
+}
+
+/* Allocates the stack if it does not exist.
+ *  Guarantees space for at least one push.
+ */
+static void yyensure_buffer_stack (void)
+{
+	int num_to_alloc;
+    
+	if (!(yy_buffer_stack)) {
+
+		/* First allocation is just for 2 elements, since we don't know if this
+		 * scanner will even need a stack. We use 2 instead of 1 to avoid an
+		 * immediate realloc on the next call.
+         */
+		num_to_alloc = 1;
+		(yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
+								(num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
+								  
+		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
+				
+		(yy_buffer_stack_max) = num_to_alloc;
+		(yy_buffer_stack_top) = 0;
+		return;
+	}
+
+	if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
+
+		/* Increase the buffer to prepare for a possible push. */
+		int grow_size = 8 /* arbitrary grow size */;
+
+		num_to_alloc = (yy_buffer_stack_max) + grow_size;
+		(yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
+								((yy_buffer_stack),
+								num_to_alloc * sizeof(struct yy_buffer_state*)
+								);
+		if ( ! (yy_buffer_stack) )
+			YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" );
+
+		/* zero only the new slots.*/
+		memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
+		(yy_buffer_stack_max) = num_to_alloc;
+	}
+}
+
+/** Setup the input buffer state to scan directly from a user-specified character buffer.
+ * @param base the character buffer
+ * @param size the size in bytes of the character buffer
+ * 
+ * @return the newly allocated buffer state object. 
+ */
+YY_BUFFER_STATE yy_scan_buffer  (char * base, yy_size_t  size )
+{
+	YY_BUFFER_STATE b;
+    
+	if ( size < 2 ||
+	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
+	     base[size-1] != YY_END_OF_BUFFER_CHAR )
+		/* They forgot to leave room for the EOB's. */
+		return 0;
+
+	b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state )  );
+	if ( ! b )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
+
+	b->yy_buf_size = size - 2;	/* "- 2" to take care of EOB's */
+	b->yy_buf_pos = b->yy_ch_buf = base;
+	b->yy_is_our_buffer = 0;
+	b->yy_input_file = 0;
+	b->yy_n_chars = b->yy_buf_size;
+	b->yy_is_interactive = 0;
+	b->yy_at_bol = 1;
+	b->yy_fill_buffer = 0;
+	b->yy_buffer_status = YY_BUFFER_NEW;
+
+	yy_switch_to_buffer(b  );
+
+	return b;
+}
+
+/** Setup the input buffer state to scan a string. The next call to yylex() will
+ * scan from a @e copy of @a str.
+ * @param yystr a NUL-terminated string to scan
+ * 
+ * @return the newly allocated buffer state object.
+ * @note If you want to scan bytes that may contain NUL values, then use
+ *       yy_scan_bytes() instead.
+ */
+YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
+{
+    
+	return yy_scan_bytes(yystr,strlen(yystr) );
+}
+
+/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
+ * scan from a @e copy of @a bytes.
+ * @param yybytes the byte buffer to scan
+ * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes.
+ * 
+ * @return the newly allocated buffer state object.
+ */
+YY_BUFFER_STATE yy_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
+{
+	YY_BUFFER_STATE b;
+	char *buf;
+	yy_size_t n;
+	int i;
+    
+	/* Get memory for full buffer, including space for trailing EOB's. */
+	n = _yybytes_len + 2;
+	buf = (char *) yyalloc(n  );
+	if ( ! buf )
+		YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
+
+	for ( i = 0; i < _yybytes_len; ++i )
+		buf[i] = yybytes[i];
+
+	buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
+
+	b = yy_scan_buffer(buf,n );
+	if ( ! b )
+		YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
+
+	/* It's okay to grow etc. this buffer, and we should throw it
+	 * away when we're done.
+	 */
+	b->yy_is_our_buffer = 1;
+
+	return b;
+}
+
+#ifndef YY_EXIT_FAILURE
+#define YY_EXIT_FAILURE 2
+#endif
+
+static void yy_fatal_error (yyconst char* msg )
+{
+    	(void) fprintf( stderr, "%s\n", msg );
+	exit( YY_EXIT_FAILURE );
+}
+
+/* Redefine yyless() so it works in section 3 code. */
+
+#undef yyless
+#define yyless(n) \
+	do \
+		{ \
+		/* Undo effects of setting up yytext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+		yytext[yyleng] = (yy_hold_char); \
+		(yy_c_buf_p) = yytext + yyless_macro_arg; \
+		(yy_hold_char) = *(yy_c_buf_p); \
+		*(yy_c_buf_p) = '\0'; \
+		yyleng = yyless_macro_arg; \
+		} \
+	while ( 0 )
+
+/* Accessor  methods (get/set functions) to struct members. */
+
+/** Get the current line number.
+ * 
+ */
+int yyget_lineno  (void)
+{
+        
+    return yylineno;
+}
+
+/** Get the input stream.
+ * 
+ */
+FILE *yyget_in  (void)
+{
+        return yyin;
+}
+
+/** Get the output stream.
+ * 
+ */
+FILE *yyget_out  (void)
+{
+        return yyout;
+}
+
+/** Get the length of the current token.
+ * 
+ */
+int yyget_leng  (void)
+{
+        return yyleng;
+}
+
+/** Get the current token.
+ * 
+ */
+
+char *yyget_text  (void)
+{
+        return yytext;
+}
+
+/** Set the current line number.
+ * @param line_number
+ * 
+ */
+void yyset_lineno (int  line_number )
+{
+    
+    yylineno = line_number;
+}
+
+/** Set the input stream. This does not discard the current
+ * input buffer.
+ * @param in_str A readable stream.
+ * 
+ * @see yy_switch_to_buffer
+ */
+void yyset_in (FILE *  in_str )
+{
+        yyin = in_str ;
+}
+
+void yyset_out (FILE *  out_str )
+{
+        yyout = out_str ;
+}
+
+int yyget_debug  (void)
+{
+        return yy_flex_debug;
+}
+
+void yyset_debug (int  bdebug )
+{
+        yy_flex_debug = bdebug ;
+}
+
+static int yy_init_globals (void)
+{
+        /* Initialization is the same as for the non-reentrant scanner.
+     * This function is called from yylex_destroy(), so don't allocate here.
+     */
+
+    (yy_buffer_stack) = 0;
+    (yy_buffer_stack_top) = 0;
+    (yy_buffer_stack_max) = 0;
+    (yy_c_buf_p) = (char *) 0;
+    (yy_init) = 0;
+    (yy_start) = 0;
+
+/* Defined in main.c */
+#ifdef YY_STDINIT
+    yyin = stdin;
+    yyout = stdout;
+#else
+    yyin = (FILE *) 0;
+    yyout = (FILE *) 0;
+#endif
+
+    /* For future reference: Set errno on error, since we are called by
+     * yylex_init()
+     */
+    return 0;
+}
+
+/* yylex_destroy is for both reentrant and non-reentrant scanners. */
+int yylex_destroy  (void)
+{
+    
+    /* Pop the buffer stack, destroying each element. */
+	while(YY_CURRENT_BUFFER){
+		yy_delete_buffer(YY_CURRENT_BUFFER  );
+		YY_CURRENT_BUFFER_LVALUE = NULL;
+		yypop_buffer_state();
+	}
+
+	/* Destroy the stack itself. */
+	yyfree((yy_buffer_stack) );
+	(yy_buffer_stack) = NULL;
+
+    /* Reset the globals. This is important in a non-reentrant scanner so the next time
+     * yylex() is called, initialization will occur. */
+    yy_init_globals( );
+
+    return 0;
+}
+
+/*
+ * Internal utility routines.
+ */
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
+{
+	register int i;
+	for ( i = 0; i < n; ++i )
+		s1[i] = s2[i];
+}
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * s )
+{
+	register int n;
+	for ( n = 0; s[n]; ++n )
+		;
+
+	return n;
+}
+#endif
+
+void *yyalloc (yy_size_t  size )
+{
+	return (void *) malloc( size );
+}
+
+void *yyrealloc  (void * ptr, yy_size_t  size )
+{
+	/* The cast to (char *) in the following accommodates both
+	 * implementations that use char* generic pointers, and those
+	 * that use void* generic pointers.  It works with the latter
+	 * because both ANSI C and C++ allow castless assignment from
+	 * any pointer type to void*, and deal with argument conversions
+	 * as though doing an assignment.
+	 */
+	return (void *) realloc( (char *) ptr, size );
+}
+
+void yyfree (void * ptr )
+{
+	free( (char *) ptr );	/* see yyrealloc() for (char *) cast */
+}
+
+#define YYTABLES_NAME "yytables"
+
+#line 277 "dtc-lexer.l"
+
+
+
+static void push_input_file(const char *filename)
+{
+	assert(filename);
+
+	srcfile_push(filename);
+
+	yyin = current_srcfile->f;
+
+	yypush_buffer_state(yy_create_buffer(yyin,YY_BUF_SIZE));
+}
+
+
+static bool pop_input_file(void)
+{
+	if (srcfile_pop() == 0)
+		return false;
+
+	yypop_buffer_state();
+	yyin = current_srcfile->f;
+
+	return true;
+}
+
+static void lexical_error(const char *fmt, ...)
+{
+	va_list ap;
+
+	va_start(ap, fmt);
+	srcpos_verror(&yylloc, "Lexical error", fmt, ap);
+	va_end(ap);
+
+	treesource_error = true;
+}
+
diff --git a/scripts/dtc/dtc-parser.tab.c_shipped b/scripts/dtc/dtc-parser.tab.c_shipped
new file mode 100644
index 0000000000..4d10814b3f
--- /dev/null
+++ b/scripts/dtc/dtc-parser.tab.c_shipped
@@ -0,0 +1,2301 @@
+/* A Bison parser, made by GNU Bison 3.0.2.  */
+
+/* Bison implementation for Yacc-like parsers in C
+
+   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+
+   This program is free software: you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation, either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, you may create a larger work that contains
+   part or all of the Bison parser skeleton and distribute that work
+   under terms of your choice, so long as that work isn't itself a
+   parser generator using the skeleton or a modified version thereof
+   as a parser skeleton.  Alternatively, if you modify or redistribute
+   the parser skeleton itself, you may (at your option) remove this
+   special exception, which will cause the skeleton and the resulting
+   Bison output files to be licensed under the GNU General Public
+   License without this special exception.
+
+   This special exception was added by the Free Software Foundation in
+   version 2.2 of Bison.  */
+
+/* C LALR(1) parser skeleton written by Richard Stallman, by
+   simplifying the original so-called "semantic" parser.  */
+
+/* All symbols defined below should begin with yy or YY, to avoid
+   infringing on user name space.  This should be done even for local
+   variables, as they might otherwise be expanded by user macros.
+   There are some unavoidable exceptions within include files to
+   define necessary library symbols; they are noted "INFRINGES ON
+   USER NAME SPACE" below.  */
+
+/* Identify Bison output.  */
+#define YYBISON 1
+
+/* Bison version.  */
+#define YYBISON_VERSION "3.0.2"
+
+/* Skeleton name.  */
+#define YYSKELETON_NAME "yacc.c"
+
+/* Pure parsers.  */
+#define YYPURE 0
+
+/* Push parsers.  */
+#define YYPUSH 0
+
+/* Pull parsers.  */
+#define YYPULL 1
+
+
+
+
+/* Copy the first part of user declarations.  */
+#line 20 "dtc-parser.y" /* yacc.c:339  */
+
+#include <stdio.h>
+#include <inttypes.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+extern int yylex(void);
+extern void yyerror(char const *s);
+#define ERROR(loc, ...) \
+	do { \
+		srcpos_error((loc), "Error", __VA_ARGS__); \
+		treesource_error = true; \
+	} while (0)
+
+extern struct dt_info *parser_output;
+extern bool treesource_error;
+
+#line 85 "dtc-parser.tab.c" /* yacc.c:339  */
+
+# ifndef YY_NULLPTR
+#  if defined __cplusplus && 201103L <= __cplusplus
+#   define YY_NULLPTR nullptr
+#  else
+#   define YY_NULLPTR 0
+#  endif
+# endif
+
+/* Enabling verbose error messages.  */
+#ifdef YYERROR_VERBOSE
+# undef YYERROR_VERBOSE
+# define YYERROR_VERBOSE 1
+#else
+# define YYERROR_VERBOSE 0
+#endif
+
+/* In a future release of Bison, this section will be replaced
+   by #include "dtc-parser.tab.h".  */
+#ifndef YY_YY_DTC_PARSER_TAB_H_INCLUDED
+# define YY_YY_DTC_PARSER_TAB_H_INCLUDED
+/* Debug traces.  */
+#ifndef YYDEBUG
+# define YYDEBUG 0
+#endif
+#if YYDEBUG
+extern int yydebug;
+#endif
+
+/* Token type.  */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+  enum yytokentype
+  {
+    DT_V1 = 258,
+    DT_PLUGIN = 259,
+    DT_MEMRESERVE = 260,
+    DT_LSHIFT = 261,
+    DT_RSHIFT = 262,
+    DT_LE = 263,
+    DT_GE = 264,
+    DT_EQ = 265,
+    DT_NE = 266,
+    DT_AND = 267,
+    DT_OR = 268,
+    DT_BITS = 269,
+    DT_DEL_PROP = 270,
+    DT_DEL_NODE = 271,
+    DT_PROPNODENAME = 272,
+    DT_LITERAL = 273,
+    DT_CHAR_LITERAL = 274,
+    DT_BYTE = 275,
+    DT_STRING = 276,
+    DT_LABEL = 277,
+    DT_REF = 278,
+    DT_INCBIN = 279
+  };
+#endif
+
+/* Value type.  */
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef union YYSTYPE YYSTYPE;
+union YYSTYPE
+{
+#line 39 "dtc-parser.y" /* yacc.c:355  */
+
+	char *propnodename;
+	char *labelref;
+	uint8_t byte;
+	struct data data;
+
+	struct {
+		struct data	data;
+		int		bits;
+	} array;
+
+	struct property *prop;
+	struct property *proplist;
+	struct node *node;
+	struct node *nodelist;
+	struct reserve_info *re;
+	uint64_t integer;
+	unsigned int flags;
+
+#line 170 "dtc-parser.tab.c" /* yacc.c:355  */
+};
+# define YYSTYPE_IS_TRIVIAL 1
+# define YYSTYPE_IS_DECLARED 1
+#endif
+
+/* Location type.  */
+#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
+typedef struct YYLTYPE YYLTYPE;
+struct YYLTYPE
+{
+  int first_line;
+  int first_column;
+  int last_line;
+  int last_column;
+};
+# define YYLTYPE_IS_DECLARED 1
+# define YYLTYPE_IS_TRIVIAL 1
+#endif
+
+
+extern YYSTYPE yylval;
+extern YYLTYPE yylloc;
+int yyparse (void);
+
+#endif /* !YY_YY_DTC_PARSER_TAB_H_INCLUDED  */
+
+/* Copy the second part of user declarations.  */
+
+#line 199 "dtc-parser.tab.c" /* yacc.c:358  */
+
+#ifdef short
+# undef short
+#endif
+
+#ifdef YYTYPE_UINT8
+typedef YYTYPE_UINT8 yytype_uint8;
+#else
+typedef unsigned char yytype_uint8;
+#endif
+
+#ifdef YYTYPE_INT8
+typedef YYTYPE_INT8 yytype_int8;
+#else
+typedef signed char yytype_int8;
+#endif
+
+#ifdef YYTYPE_UINT16
+typedef YYTYPE_UINT16 yytype_uint16;
+#else
+typedef unsigned short int yytype_uint16;
+#endif
+
+#ifdef YYTYPE_INT16
+typedef YYTYPE_INT16 yytype_int16;
+#else
+typedef short int yytype_int16;
+#endif
+
+#ifndef YYSIZE_T
+# ifdef __SIZE_TYPE__
+#  define YYSIZE_T __SIZE_TYPE__
+# elif defined size_t
+#  define YYSIZE_T size_t
+# elif ! defined YYSIZE_T
+#  include <stddef.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYSIZE_T size_t
+# else
+#  define YYSIZE_T unsigned int
+# endif
+#endif
+
+#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
+
+#ifndef YY_
+# if defined YYENABLE_NLS && YYENABLE_NLS
+#  if ENABLE_NLS
+#   include <libintl.h> /* INFRINGES ON USER NAME SPACE */
+#   define YY_(Msgid) dgettext ("bison-runtime", Msgid)
+#  endif
+# endif
+# ifndef YY_
+#  define YY_(Msgid) Msgid
+# endif
+#endif
+
+#ifndef YY_ATTRIBUTE
+# if (defined __GNUC__                                               \
+      && (2 < __GNUC__ || (__GNUC__ == 2 && 96 <= __GNUC_MINOR__)))  \
+     || defined __SUNPRO_C && 0x5110 <= __SUNPRO_C
+#  define YY_ATTRIBUTE(Spec) __attribute__(Spec)
+# else
+#  define YY_ATTRIBUTE(Spec) /* empty */
+# endif
+#endif
+
+#ifndef YY_ATTRIBUTE_PURE
+# define YY_ATTRIBUTE_PURE   YY_ATTRIBUTE ((__pure__))
+#endif
+
+#ifndef YY_ATTRIBUTE_UNUSED
+# define YY_ATTRIBUTE_UNUSED YY_ATTRIBUTE ((__unused__))
+#endif
+
+#if !defined _Noreturn \
+     && (!defined __STDC_VERSION__ || __STDC_VERSION__ < 201112)
+# if defined _MSC_VER && 1200 <= _MSC_VER
+#  define _Noreturn __declspec (noreturn)
+# else
+#  define _Noreturn YY_ATTRIBUTE ((__noreturn__))
+# endif
+#endif
+
+/* Suppress unused-variable warnings by "using" E.  */
+#if ! defined lint || defined __GNUC__
+# define YYUSE(E) ((void) (E))
+#else
+# define YYUSE(E) /* empty */
+#endif
+
+#if defined __GNUC__ && 407 <= __GNUC__ * 100 + __GNUC_MINOR__
+/* Suppress an incorrect diagnostic about yylval being uninitialized.  */
+# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN \
+    _Pragma ("GCC diagnostic push") \
+    _Pragma ("GCC diagnostic ignored \"-Wuninitialized\"")\
+    _Pragma ("GCC diagnostic ignored \"-Wmaybe-uninitialized\"")
+# define YY_IGNORE_MAYBE_UNINITIALIZED_END \
+    _Pragma ("GCC diagnostic pop")
+#else
+# define YY_INITIAL_VALUE(Value) Value
+#endif
+#ifndef YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+# define YY_IGNORE_MAYBE_UNINITIALIZED_END
+#endif
+#ifndef YY_INITIAL_VALUE
+# define YY_INITIAL_VALUE(Value) /* Nothing. */
+#endif
+
+
+#if ! defined yyoverflow || YYERROR_VERBOSE
+
+/* The parser invokes alloca or malloc; define the necessary symbols.  */
+
+# ifdef YYSTACK_USE_ALLOCA
+#  if YYSTACK_USE_ALLOCA
+#   ifdef __GNUC__
+#    define YYSTACK_ALLOC __builtin_alloca
+#   elif defined __BUILTIN_VA_ARG_INCR
+#    include <alloca.h> /* INFRINGES ON USER NAME SPACE */
+#   elif defined _AIX
+#    define YYSTACK_ALLOC __alloca
+#   elif defined _MSC_VER
+#    include <malloc.h> /* INFRINGES ON USER NAME SPACE */
+#    define alloca _alloca
+#   else
+#    define YYSTACK_ALLOC alloca
+#    if ! defined _ALLOCA_H && ! defined EXIT_SUCCESS
+#     include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+      /* Use EXIT_SUCCESS as a witness for stdlib.h.  */
+#     ifndef EXIT_SUCCESS
+#      define EXIT_SUCCESS 0
+#     endif
+#    endif
+#   endif
+#  endif
+# endif
+
+# ifdef YYSTACK_ALLOC
+   /* Pacify GCC's 'empty if-body' warning.  */
+#  define YYSTACK_FREE(Ptr) do { /* empty */; } while (0)
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+    /* The OS might guarantee only one guard page at the bottom of the stack,
+       and a page size can be as small as 4096 bytes.  So we cannot safely
+       invoke alloca (N) if N exceeds 4096.  Use a slightly smaller number
+       to allow for a few compiler-allocated temporary stack slots.  */
+#   define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
+#  endif
+# else
+#  define YYSTACK_ALLOC YYMALLOC
+#  define YYSTACK_FREE YYFREE
+#  ifndef YYSTACK_ALLOC_MAXIMUM
+#   define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
+#  endif
+#  if (defined __cplusplus && ! defined EXIT_SUCCESS \
+       && ! ((defined YYMALLOC || defined malloc) \
+             && (defined YYFREE || defined free)))
+#   include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+#   ifndef EXIT_SUCCESS
+#    define EXIT_SUCCESS 0
+#   endif
+#  endif
+#  ifndef YYMALLOC
+#   define YYMALLOC malloc
+#   if ! defined malloc && ! defined EXIT_SUCCESS
+void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+#  ifndef YYFREE
+#   define YYFREE free
+#   if ! defined free && ! defined EXIT_SUCCESS
+void free (void *); /* INFRINGES ON USER NAME SPACE */
+#   endif
+#  endif
+# endif
+#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
+
+
+#if (! defined yyoverflow \
+     && (! defined __cplusplus \
+         || (defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL \
+             && defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
+
+/* A type that is properly aligned for any stack member.  */
+union yyalloc
+{
+  yytype_int16 yyss_alloc;
+  YYSTYPE yyvs_alloc;
+  YYLTYPE yyls_alloc;
+};
+
+/* The size of the maximum gap between one aligned stack and the next.  */
+# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
+
+/* The size of an array large to enough to hold all stacks, each with
+   N elements.  */
+# define YYSTACK_BYTES(N) \
+     ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE) + sizeof (YYLTYPE)) \
+      + 2 * YYSTACK_GAP_MAXIMUM)
+
+# define YYCOPY_NEEDED 1
+
+/* Relocate STACK from its old location to the new one.  The
+   local variables YYSIZE and YYSTACKSIZE give the old and new number of
+   elements in the stack, and YYPTR gives the new location of the
+   stack.  Advance YYPTR to a properly aligned location for the next
+   stack.  */
+# define YYSTACK_RELOCATE(Stack_alloc, Stack)                           \
+    do                                                                  \
+      {                                                                 \
+        YYSIZE_T yynewbytes;                                            \
+        YYCOPY (&yyptr->Stack_alloc, Stack, yysize);                    \
+        Stack = &yyptr->Stack_alloc;                                    \
+        yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
+        yyptr += yynewbytes / sizeof (*yyptr);                          \
+      }                                                                 \
+    while (0)
+
+#endif
+
+#if defined YYCOPY_NEEDED && YYCOPY_NEEDED
+/* Copy COUNT objects from SRC to DST.  The source and destination do
+   not overlap.  */
+# ifndef YYCOPY
+#  if defined __GNUC__ && 1 < __GNUC__
+#   define YYCOPY(Dst, Src, Count) \
+      __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src)))
+#  else
+#   define YYCOPY(Dst, Src, Count)              \
+      do                                        \
+        {                                       \
+          YYSIZE_T yyi;                         \
+          for (yyi = 0; yyi < (Count); yyi++)   \
+            (Dst)[yyi] = (Src)[yyi];            \
+        }                                       \
+      while (0)
+#  endif
+# endif
+#endif /* !YYCOPY_NEEDED */
+
+/* YYFINAL -- State number of the termination state.  */
+#define YYFINAL  6
+/* YYLAST -- Last index in YYTABLE.  */
+#define YYLAST   138
+
+/* YYNTOKENS -- Number of terminals.  */
+#define YYNTOKENS  48
+/* YYNNTS -- Number of nonterminals.  */
+#define YYNNTS  30
+/* YYNRULES -- Number of rules.  */
+#define YYNRULES  84
+/* YYNSTATES -- Number of states.  */
+#define YYNSTATES  149
+
+/* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned
+   by yylex, with out-of-bounds checking.  */
+#define YYUNDEFTOK  2
+#define YYMAXUTOK   279
+
+#define YYTRANSLATE(YYX)                                                \
+  ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
+
+/* YYTRANSLATE[TOKEN-NUM] -- Symbol number corresponding to TOKEN-NUM
+   as returned by yylex, without out-of-bounds checking.  */
+static const yytype_uint8 yytranslate[] =
+{
+       0,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,    47,     2,     2,     2,    45,    41,     2,
+      33,    35,    44,    42,    34,    43,     2,    26,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,    38,    25,
+      36,    29,    30,    37,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,    31,     2,    32,    40,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,    27,    39,    28,    46,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     2,     2,     2,     2,
+       2,     2,     2,     2,     2,     2,     1,     2,     3,     4,
+       5,     6,     7,     8,     9,    10,    11,    12,    13,    14,
+      15,    16,    17,    18,    19,    20,    21,    22,    23,    24
+};
+
+#if YYDEBUG
+  /* YYRLINE[YYN] -- Source line where rule number YYN was defined.  */
+static const yytype_uint16 yyrline[] =
+{
+       0,   109,   109,   117,   121,   128,   129,   139,   142,   149,
+     153,   161,   165,   170,   181,   191,   206,   214,   217,   224,
+     228,   232,   236,   244,   248,   252,   256,   260,   276,   286,
+     294,   297,   301,   308,   324,   329,   348,   362,   369,   370,
+     371,   378,   382,   383,   387,   388,   392,   393,   397,   398,
+     402,   403,   407,   408,   412,   413,   414,   418,   419,   420,
+     421,   422,   426,   427,   428,   432,   433,   434,   438,   439,
+     448,   457,   461,   462,   463,   464,   469,   472,   476,   484,
+     487,   491,   499,   503,   507
+};
+#endif
+
+#if YYDEBUG || YYERROR_VERBOSE || 0
+/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
+   First, the terminals, then, starting at YYNTOKENS, nonterminals.  */
+static const char *const yytname[] =
+{
+  "$end", "error", "$undefined", "DT_V1", "DT_PLUGIN", "DT_MEMRESERVE",
+  "DT_LSHIFT", "DT_RSHIFT", "DT_LE", "DT_GE", "DT_EQ", "DT_NE", "DT_AND",
+  "DT_OR", "DT_BITS", "DT_DEL_PROP", "DT_DEL_NODE", "DT_PROPNODENAME",
+  "DT_LITERAL", "DT_CHAR_LITERAL", "DT_BYTE", "DT_STRING", "DT_LABEL",
+  "DT_REF", "DT_INCBIN", "';'", "'/'", "'{'", "'}'", "'='", "'>'", "'['",
+  "']'", "'('", "','", "')'", "'<'", "'?'", "':'", "'|'", "'^'", "'&'",
+  "'+'", "'-'", "'*'", "'%'", "'~'", "'!'", "$accept", "sourcefile",
+  "header", "headers", "memreserves", "memreserve", "devicetree",
+  "nodedef", "proplist", "propdef", "propdata", "propdataprefix",
+  "arrayprefix", "integer_prim", "integer_expr", "integer_trinary",
+  "integer_or", "integer_and", "integer_bitor", "integer_bitxor",
+  "integer_bitand", "integer_eq", "integer_rela", "integer_shift",
+  "integer_add", "integer_mul", "integer_unary", "bytestring", "subnodes",
+  "subnode", YY_NULLPTR
+};
+#endif
+
+# ifdef YYPRINT
+/* YYTOKNUM[NUM] -- (External) token number corresponding to the
+   (internal) symbol number NUM (which must be that of a token).  */
+static const yytype_uint16 yytoknum[] =
+{
+       0,   256,   257,   258,   259,   260,   261,   262,   263,   264,
+     265,   266,   267,   268,   269,   270,   271,   272,   273,   274,
+     275,   276,   277,   278,   279,    59,    47,   123,   125,    61,
+      62,    91,    93,    40,    44,    41,    60,    63,    58,   124,
+      94,    38,    43,    45,    42,    37,   126,    33
+};
+# endif
+
+#define YYPACT_NINF -44
+
+#define yypact_value_is_default(Yystate) \
+  (!!((Yystate) == (-44)))
+
+#define YYTABLE_NINF -1
+
+#define yytable_value_is_error(Yytable_value) \
+  0
+
+  /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
+     STATE-NUM.  */
+static const yytype_int8 yypact[] =
+{
+      14,    27,    61,    14,     8,    18,   -44,   -44,    37,     8,
+      40,     8,    64,   -44,   -44,   -12,    37,   -44,    50,    52,
+     -44,   -44,   -12,   -12,   -12,   -44,    51,   -44,    -4,    78,
+      53,    54,    55,    17,     2,    30,    38,    -3,   -44,    66,
+     -44,   -44,    70,    72,    50,    50,   -44,   -44,   -44,   -44,
+     -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,
+     -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -12,   -44,
+       3,    73,    50,   -44,   -44,    78,    59,    53,    54,    55,
+      17,     2,     2,    30,    30,    30,    30,    38,    38,    -3,
+      -3,   -44,   -44,   -44,    82,    83,    44,     3,   -44,    74,
+       3,   -44,   -44,   -12,    76,    79,   -44,   -44,   -44,   -44,
+     -44,    80,   -44,   -44,   -44,   -44,   -44,   -10,    36,   -44,
+     -44,   -44,   -44,    85,   -44,   -44,   -44,    75,   -44,   -44,
+      21,    71,    88,    -6,   -44,   -44,   -44,   -44,   -44,    11,
+     -44,   -44,   -44,    37,   -44,    77,    37,    81,   -44
+};
+
+  /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM.
+     Performed when YYTABLE does not specify something else to do.  Zero
+     means the default is an error.  */
+static const yytype_uint8 yydefact[] =
+{
+       0,     0,     0,     5,     7,     3,     1,     6,     0,     0,
+       0,     7,     0,    38,    39,     0,     0,    10,     0,     2,
+       8,     4,     0,     0,     0,    72,     0,    41,    42,    44,
+      46,    48,    50,    52,    54,    57,    64,    67,    71,     0,
+      17,    11,     0,     0,     0,     0,    73,    74,    75,    40,
+       0,     0,     0,     0,     0,     0,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,     0,     0,     0,     0,     9,
+      79,     0,     0,    14,    12,    45,     0,    47,    49,    51,
+      53,    55,    56,    60,    61,    59,    58,    62,    63,    65,
+      66,    69,    68,    70,     0,     0,     0,     0,    18,     0,
+      79,    15,    13,     0,     0,     0,    20,    30,    82,    22,
+      84,     0,    81,    80,    43,    21,    83,     0,     0,    16,
+      29,    19,    31,     0,    23,    32,    26,     0,    76,    34,
+       0,     0,     0,     0,    37,    36,    24,    35,    33,     0,
+      77,    78,    25,     0,    28,     0,     0,     0,    27
+};
+
+  /* YYPGOTO[NTERM-NUM].  */
+static const yytype_int8 yypgoto[] =
+{
+     -44,   -44,   -44,   103,    99,   104,   -44,   -43,   -44,   -21,
+     -44,   -44,   -44,    -8,    63,     9,   -44,    65,    67,    68,
+      69,    62,    26,     4,    22,    23,   -19,   -44,    20,    28
+};
+
+  /* YYDEFGOTO[NTERM-NUM].  */
+static const yytype_int16 yydefgoto[] =
+{
+      -1,     2,     3,     4,    10,    11,    19,    41,    70,    98,
+     117,   118,   130,    25,    26,    27,    28,    29,    30,    31,
+      32,    33,    34,    35,    36,    37,    38,   133,    99,   100
+};
+
+  /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM.  If
+     positive, shift that token.  If negative, reduce the rule whose
+     number is the opposite.  If YYTABLE_NINF, syntax error.  */
+static const yytype_uint8 yytable[] =
+{
+      16,    73,    74,    46,    47,    48,    13,    14,    39,    50,
+      58,    59,   120,     8,   140,   121,   141,     1,    94,    95,
+      96,    15,    12,    66,   122,    97,   142,    56,    57,   102,
+       9,    22,    60,    51,    23,    24,    62,    63,    61,    13,
+      14,    67,    68,   134,   135,   143,   144,    91,    92,    93,
+     123,   136,     5,   108,    15,    13,    14,   124,   125,   126,
+     127,     6,    83,    84,    85,    86,    18,   128,    42,   106,
+      15,    40,   129,   107,    43,    44,   109,    40,    45,   112,
+      64,    65,    81,    82,    87,    88,    49,    89,    90,    21,
+      52,    69,    53,    71,    54,    72,    55,   103,   101,   104,
+     105,   115,   111,   131,   116,   119,     7,   138,   132,   139,
+      20,   146,   114,    17,    76,    75,   148,    80,     0,    77,
+     113,    78,   137,    79,     0,   110,     0,     0,     0,     0,
+       0,     0,     0,     0,     0,   145,     0,     0,   147
+};
+
+static const yytype_int16 yycheck[] =
+{
+       8,    44,    45,    22,    23,    24,    18,    19,    16,    13,
+       8,     9,    22,     5,    20,    25,    22,     3,    15,    16,
+      17,    33,     4,    26,    34,    22,    32,    10,    11,    72,
+      22,    43,    30,    37,    46,    47,     6,     7,    36,    18,
+      19,    44,    45,    22,    23,    34,    35,    66,    67,    68,
+      14,    30,    25,    96,    33,    18,    19,    21,    22,    23,
+      24,     0,    58,    59,    60,    61,    26,    31,    16,    25,
+      33,    27,    36,    29,    22,    23,    97,    27,    26,   100,
+      42,    43,    56,    57,    62,    63,    35,    64,    65,    25,
+      12,    25,    39,    23,    40,    23,    41,    38,    25,    17,
+      17,    25,    28,    18,    25,    25,     3,    36,    33,    21,
+      11,    34,   103,     9,    51,    50,    35,    55,    -1,    52,
+     100,    53,   130,    54,    -1,    97,    -1,    -1,    -1,    -1,
+      -1,    -1,    -1,    -1,    -1,   143,    -1,    -1,   146
+};
+
+  /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
+     symbol of state STATE-NUM.  */
+static const yytype_uint8 yystos[] =
+{
+       0,     3,    49,    50,    51,    25,     0,    51,     5,    22,
+      52,    53,     4,    18,    19,    33,    61,    53,    26,    54,
+      52,    25,    43,    46,    47,    61,    62,    63,    64,    65,
+      66,    67,    68,    69,    70,    71,    72,    73,    74,    61,
+      27,    55,    16,    22,    23,    26,    74,    74,    74,    35,
+      13,    37,    12,    39,    40,    41,    10,    11,     8,     9,
+      30,    36,     6,     7,    42,    43,    26,    44,    45,    25,
+      56,    23,    23,    55,    55,    65,    62,    66,    67,    68,
+      69,    70,    70,    71,    71,    71,    71,    72,    72,    73,
+      73,    74,    74,    74,    15,    16,    17,    22,    57,    76,
+      77,    25,    55,    38,    17,    17,    25,    29,    55,    57,
+      77,    28,    57,    76,    63,    25,    25,    58,    59,    25,
+      22,    25,    34,    14,    21,    22,    23,    24,    31,    36,
+      60,    18,    33,    75,    22,    23,    30,    61,    36,    21,
+      20,    22,    32,    34,    35,    61,    34,    61,    35
+};
+
+  /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives.  */
+static const yytype_uint8 yyr1[] =
+{
+       0,    48,    49,    50,    50,    51,    51,    52,    52,    53,
+      53,    54,    54,    54,    54,    54,    55,    56,    56,    57,
+      57,    57,    57,    58,    58,    58,    58,    58,    58,    58,
+      59,    59,    59,    60,    60,    60,    60,    60,    61,    61,
+      61,    62,    63,    63,    64,    64,    65,    65,    66,    66,
+      67,    67,    68,    68,    69,    69,    69,    70,    70,    70,
+      70,    70,    71,    71,    71,    72,    72,    72,    73,    73,
+      73,    73,    74,    74,    74,    74,    75,    75,    75,    76,
+      76,    76,    77,    77,    77
+};
+
+  /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN.  */
+static const yytype_uint8 yyr2[] =
+{
+       0,     2,     3,     2,     4,     1,     2,     0,     2,     4,
+       2,     2,     3,     4,     3,     4,     5,     0,     2,     4,
+       2,     3,     2,     2,     3,     4,     2,     9,     5,     2,
+       0,     2,     2,     3,     1,     2,     2,     2,     1,     1,
+       3,     1,     1,     5,     1,     3,     1,     3,     1,     3,
+       1,     3,     1,     3,     1,     3,     3,     1,     3,     3,
+       3,     3,     3,     3,     1,     3,     3,     1,     3,     3,
+       3,     1,     1,     2,     2,     2,     0,     2,     2,     0,
+       2,     2,     2,     3,     2
+};
+
+
+#define yyerrok         (yyerrstatus = 0)
+#define yyclearin       (yychar = YYEMPTY)
+#define YYEMPTY         (-2)
+#define YYEOF           0
+
+#define YYACCEPT        goto yyacceptlab
+#define YYABORT         goto yyabortlab
+#define YYERROR         goto yyerrorlab
+
+
+#define YYRECOVERING()  (!!yyerrstatus)
+
+#define YYBACKUP(Token, Value)                                  \
+do                                                              \
+  if (yychar == YYEMPTY)                                        \
+    {                                                           \
+      yychar = (Token);                                         \
+      yylval = (Value);                                         \
+      YYPOPSTACK (yylen);                                       \
+      yystate = *yyssp;                                         \
+      goto yybackup;                                            \
+    }                                                           \
+  else                                                          \
+    {                                                           \
+      yyerror (YY_("syntax error: cannot back up")); \
+      YYERROR;                                                  \
+    }                                                           \
+while (0)
+
+/* Error token number */
+#define YYTERROR        1
+#define YYERRCODE       256
+
+
+/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
+   If N is 0, then set CURRENT to the empty location which ends
+   the previous symbol: RHS[0] (always defined).  */
+
+#ifndef YYLLOC_DEFAULT
+# define YYLLOC_DEFAULT(Current, Rhs, N)                                \
+    do                                                                  \
+      if (N)                                                            \
+        {                                                               \
+          (Current).first_line   = YYRHSLOC (Rhs, 1).first_line;        \
+          (Current).first_column = YYRHSLOC (Rhs, 1).first_column;      \
+          (Current).last_line    = YYRHSLOC (Rhs, N).last_line;         \
+          (Current).last_column  = YYRHSLOC (Rhs, N).last_column;       \
+        }                                                               \
+      else                                                              \
+        {                                                               \
+          (Current).first_line   = (Current).last_line   =              \
+            YYRHSLOC (Rhs, 0).last_line;                                \
+          (Current).first_column = (Current).last_column =              \
+            YYRHSLOC (Rhs, 0).last_column;                              \
+        }                                                               \
+    while (0)
+#endif
+
+#define YYRHSLOC(Rhs, K) ((Rhs)[K])
+
+
+/* Enable debugging if requested.  */
+#if YYDEBUG
+
+# ifndef YYFPRINTF
+#  include <stdio.h> /* INFRINGES ON USER NAME SPACE */
+#  define YYFPRINTF fprintf
+# endif
+
+# define YYDPRINTF(Args)                        \
+do {                                            \
+  if (yydebug)                                  \
+    YYFPRINTF Args;                             \
+} while (0)
+
+
+/* YY_LOCATION_PRINT -- Print the location on the stream.
+   This macro was not mandated originally: define only if we know
+   we won't break user code: when these are the locations we know.  */
+
+#ifndef YY_LOCATION_PRINT
+# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
+
+/* Print *YYLOCP on YYO.  Private, do not rely on its existence. */
+
+YY_ATTRIBUTE_UNUSED
+static unsigned
+yy_location_print_ (FILE *yyo, YYLTYPE const * const yylocp)
+{
+  unsigned res = 0;
+  int end_col = 0 != yylocp->last_column ? yylocp->last_column - 1 : 0;
+  if (0 <= yylocp->first_line)
+    {
+      res += YYFPRINTF (yyo, "%d", yylocp->first_line);
+      if (0 <= yylocp->first_column)
+        res += YYFPRINTF (yyo, ".%d", yylocp->first_column);
+    }
+  if (0 <= yylocp->last_line)
+    {
+      if (yylocp->first_line < yylocp->last_line)
+        {
+          res += YYFPRINTF (yyo, "-%d", yylocp->last_line);
+          if (0 <= end_col)
+            res += YYFPRINTF (yyo, ".%d", end_col);
+        }
+      else if (0 <= end_col && yylocp->first_column < end_col)
+        res += YYFPRINTF (yyo, "-%d", end_col);
+    }
+  return res;
+ }
+
+#  define YY_LOCATION_PRINT(File, Loc)          \
+  yy_location_print_ (File, &(Loc))
+
+# else
+#  define YY_LOCATION_PRINT(File, Loc) ((void) 0)
+# endif
+#endif
+
+
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)                    \
+do {                                                                      \
+  if (yydebug)                                                            \
+    {                                                                     \
+      YYFPRINTF (stderr, "%s ", Title);                                   \
+      yy_symbol_print (stderr,                                            \
+                  Type, Value, Location); \
+      YYFPRINTF (stderr, "\n");                                           \
+    }                                                                     \
+} while (0)
+
+
+/*----------------------------------------.
+| Print this symbol's value on YYOUTPUT.  |
+`----------------------------------------*/
+
+static void
+yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp)
+{
+  FILE *yyo = yyoutput;
+  YYUSE (yyo);
+  YYUSE (yylocationp);
+  if (!yyvaluep)
+    return;
+# ifdef YYPRINT
+  if (yytype < YYNTOKENS)
+    YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
+# endif
+  YYUSE (yytype);
+}
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT.  |
+`--------------------------------*/
+
+static void
+yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp)
+{
+  YYFPRINTF (yyoutput, "%s %s (",
+             yytype < YYNTOKENS ? "token" : "nterm", yytname[yytype]);
+
+  YY_LOCATION_PRINT (yyoutput, *yylocationp);
+  YYFPRINTF (yyoutput, ": ");
+  yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp);
+  YYFPRINTF (yyoutput, ")");
+}
+
+/*------------------------------------------------------------------.
+| yy_stack_print -- Print the state stack from its BOTTOM up to its |
+| TOP (included).                                                   |
+`------------------------------------------------------------------*/
+
+static void
+yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop)
+{
+  YYFPRINTF (stderr, "Stack now");
+  for (; yybottom <= yytop; yybottom++)
+    {
+      int yybot = *yybottom;
+      YYFPRINTF (stderr, " %d", yybot);
+    }
+  YYFPRINTF (stderr, "\n");
+}
+
+# define YY_STACK_PRINT(Bottom, Top)                            \
+do {                                                            \
+  if (yydebug)                                                  \
+    yy_stack_print ((Bottom), (Top));                           \
+} while (0)
+
+
+/*------------------------------------------------.
+| Report that the YYRULE is going to be reduced.  |
+`------------------------------------------------*/
+
+static void
+yy_reduce_print (yytype_int16 *yyssp, YYSTYPE *yyvsp, YYLTYPE *yylsp, int yyrule)
+{
+  unsigned long int yylno = yyrline[yyrule];
+  int yynrhs = yyr2[yyrule];
+  int yyi;
+  YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
+             yyrule - 1, yylno);
+  /* The symbols being reduced.  */
+  for (yyi = 0; yyi < yynrhs; yyi++)
+    {
+      YYFPRINTF (stderr, "   $%d = ", yyi + 1);
+      yy_symbol_print (stderr,
+                       yystos[yyssp[yyi + 1 - yynrhs]],
+                       &(yyvsp[(yyi + 1) - (yynrhs)])
+                       , &(yylsp[(yyi + 1) - (yynrhs)])                       );
+      YYFPRINTF (stderr, "\n");
+    }
+}
+
+# define YY_REDUCE_PRINT(Rule)          \
+do {                                    \
+  if (yydebug)                          \
+    yy_reduce_print (yyssp, yyvsp, yylsp, Rule); \
+} while (0)
+
+/* Nonzero means print parse trace.  It is left uninitialized so that
+   multiple parsers can coexist.  */
+int yydebug;
+#else /* !YYDEBUG */
+# define YYDPRINTF(Args)
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
+# define YY_STACK_PRINT(Bottom, Top)
+# define YY_REDUCE_PRINT(Rule)
+#endif /* !YYDEBUG */
+
+
+/* YYINITDEPTH -- initial size of the parser's stacks.  */
+#ifndef YYINITDEPTH
+# define YYINITDEPTH 200
+#endif
+
+/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
+   if the built-in stack extension method is used).
+
+   Do not make this value too large; the results are undefined if
+   YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
+   evaluated with infinite-precision integer arithmetic.  */
+
+#ifndef YYMAXDEPTH
+# define YYMAXDEPTH 10000
+#endif
+
+
+#if YYERROR_VERBOSE
+
+# ifndef yystrlen
+#  if defined __GLIBC__ && defined _STRING_H
+#   define yystrlen strlen
+#  else
+/* Return the length of YYSTR.  */
+static YYSIZE_T
+yystrlen (const char *yystr)
+{
+  YYSIZE_T yylen;
+  for (yylen = 0; yystr[yylen]; yylen++)
+    continue;
+  return yylen;
+}
+#  endif
+# endif
+
+# ifndef yystpcpy
+#  if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
+#   define yystpcpy stpcpy
+#  else
+/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
+   YYDEST.  */
+static char *
+yystpcpy (char *yydest, const char *yysrc)
+{
+  char *yyd = yydest;
+  const char *yys = yysrc;
+
+  while ((*yyd++ = *yys++) != '\0')
+    continue;
+
+  return yyd - 1;
+}
+#  endif
+# endif
+
+# ifndef yytnamerr
+/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
+   quotes and backslashes, so that it's suitable for yyerror.  The
+   heuristic is that double-quoting is unnecessary unless the string
+   contains an apostrophe, a comma, or backslash (other than
+   backslash-backslash).  YYSTR is taken from yytname.  If YYRES is
+   null, do not copy; instead, return the length of what the result
+   would have been.  */
+static YYSIZE_T
+yytnamerr (char *yyres, const char *yystr)
+{
+  if (*yystr == '"')
+    {
+      YYSIZE_T yyn = 0;
+      char const *yyp = yystr;
+
+      for (;;)
+        switch (*++yyp)
+          {
+          case '\'':
+          case ',':
+            goto do_not_strip_quotes;
+
+          case '\\':
+            if (*++yyp != '\\')
+              goto do_not_strip_quotes;
+            /* Fall through.  */
+          default:
+            if (yyres)
+              yyres[yyn] = *yyp;
+            yyn++;
+            break;
+
+          case '"':
+            if (yyres)
+              yyres[yyn] = '\0';
+            return yyn;
+          }
+    do_not_strip_quotes: ;
+    }
+
+  if (! yyres)
+    return yystrlen (yystr);
+
+  return yystpcpy (yyres, yystr) - yyres;
+}
+# endif
+
+/* Copy into *YYMSG, which is of size *YYMSG_ALLOC, an error message
+   about the unexpected token YYTOKEN for the state stack whose top is
+   YYSSP.
+
+   Return 0 if *YYMSG was successfully written.  Return 1 if *YYMSG is
+   not large enough to hold the message.  In that case, also set
+   *YYMSG_ALLOC to the required number of bytes.  Return 2 if the
+   required number of bytes is too large to store.  */
+static int
+yysyntax_error (YYSIZE_T *yymsg_alloc, char **yymsg,
+                yytype_int16 *yyssp, int yytoken)
+{
+  YYSIZE_T yysize0 = yytnamerr (YY_NULLPTR, yytname[yytoken]);
+  YYSIZE_T yysize = yysize0;
+  enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
+  /* Internationalized format string. */
+  const char *yyformat = YY_NULLPTR;
+  /* Arguments of yyformat. */
+  char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
+  /* Number of reported tokens (one for the "unexpected", one per
+     "expected"). */
+  int yycount = 0;
+
+  /* There are many possibilities here to consider:
+     - If this state is a consistent state with a default action, then
+       the only way this function was invoked is if the default action
+       is an error action.  In that case, don't check for expected
+       tokens because there are none.
+     - The only way there can be no lookahead present (in yychar) is if
+       this state is a consistent state with a default action.  Thus,
+       detecting the absence of a lookahead is sufficient to determine
+       that there is no unexpected or expected token to report.  In that
+       case, just report a simple "syntax error".
+     - Don't assume there isn't a lookahead just because this state is a
+       consistent state with a default action.  There might have been a
+       previous inconsistent state, consistent state with a non-default
+       action, or user semantic action that manipulated yychar.
+     - Of course, the expected token list depends on states to have
+       correct lookahead information, and it depends on the parser not
+       to perform extra reductions after fetching a lookahead from the
+       scanner and before detecting a syntax error.  Thus, state merging
+       (from LALR or IELR) and default reductions corrupt the expected
+       token list.  However, the list is correct for canonical LR with
+       one exception: it will still contain any token that will not be
+       accepted due to an error action in a later state.
+  */
+  if (yytoken != YYEMPTY)
+    {
+      int yyn = yypact[*yyssp];
+      yyarg[yycount++] = yytname[yytoken];
+      if (!yypact_value_is_default (yyn))
+        {
+          /* Start YYX at -YYN if negative to avoid negative indexes in
+             YYCHECK.  In other words, skip the first -YYN actions for
+             this state because they are default actions.  */
+          int yyxbegin = yyn < 0 ? -yyn : 0;
+          /* Stay within bounds of both yycheck and yytname.  */
+          int yychecklim = YYLAST - yyn + 1;
+          int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
+          int yyx;
+
+          for (yyx = yyxbegin; yyx < yyxend; ++yyx)
+            if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR
+                && !yytable_value_is_error (yytable[yyx + yyn]))
+              {
+                if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
+                  {
+                    yycount = 1;
+                    yysize = yysize0;
+                    break;
+                  }
+                yyarg[yycount++] = yytname[yyx];
+                {
+                  YYSIZE_T yysize1 = yysize + yytnamerr (YY_NULLPTR, yytname[yyx]);
+                  if (! (yysize <= yysize1
+                         && yysize1 <= YYSTACK_ALLOC_MAXIMUM))
+                    return 2;
+                  yysize = yysize1;
+                }
+              }
+        }
+    }
+
+  switch (yycount)
+    {
+# define YYCASE_(N, S)                      \
+      case N:                               \
+        yyformat = S;                       \
+      break
+      YYCASE_(0, YY_("syntax error"));
+      YYCASE_(1, YY_("syntax error, unexpected %s"));
+      YYCASE_(2, YY_("syntax error, unexpected %s, expecting %s"));
+      YYCASE_(3, YY_("syntax error, unexpected %s, expecting %s or %s"));
+      YYCASE_(4, YY_("syntax error, unexpected %s, expecting %s or %s or %s"));
+      YYCASE_(5, YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"));
+# undef YYCASE_
+    }
+
+  {
+    YYSIZE_T yysize1 = yysize + yystrlen (yyformat);
+    if (! (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM))
+      return 2;
+    yysize = yysize1;
+  }
+
+  if (*yymsg_alloc < yysize)
+    {
+      *yymsg_alloc = 2 * yysize;
+      if (! (yysize <= *yymsg_alloc
+             && *yymsg_alloc <= YYSTACK_ALLOC_MAXIMUM))
+        *yymsg_alloc = YYSTACK_ALLOC_MAXIMUM;
+      return 1;
+    }
+
+  /* Avoid sprintf, as that infringes on the user's name space.
+     Don't have undefined behavior even if the translation
+     produced a string with the wrong number of "%s"s.  */
+  {
+    char *yyp = *yymsg;
+    int yyi = 0;
+    while ((*yyp = *yyformat) != '\0')
+      if (*yyp == '%' && yyformat[1] == 's' && yyi < yycount)
+        {
+          yyp += yytnamerr (yyp, yyarg[yyi++]);
+          yyformat += 2;
+        }
+      else
+        {
+          yyp++;
+          yyformat++;
+        }
+  }
+  return 0;
+}
+#endif /* YYERROR_VERBOSE */
+
+/*-----------------------------------------------.
+| Release the memory associated to this symbol.  |
+`-----------------------------------------------*/
+
+static void
+yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep, YYLTYPE *yylocationp)
+{
+  YYUSE (yyvaluep);
+  YYUSE (yylocationp);
+  if (!yymsg)
+    yymsg = "Deleting";
+  YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
+
+  YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+  YYUSE (yytype);
+  YY_IGNORE_MAYBE_UNINITIALIZED_END
+}
+
+
+
+
+/* The lookahead symbol.  */
+int yychar;
+
+/* The semantic value of the lookahead symbol.  */
+YYSTYPE yylval;
+/* Location data for the lookahead symbol.  */
+YYLTYPE yylloc
+# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL
+  = { 1, 1, 1, 1 }
+# endif
+;
+/* Number of syntax errors so far.  */
+int yynerrs;
+
+
+/*----------.
+| yyparse.  |
+`----------*/
+
+int
+yyparse (void)
+{
+    int yystate;
+    /* Number of tokens to shift before error messages enabled.  */
+    int yyerrstatus;
+
+    /* The stacks and their tools:
+       'yyss': related to states.
+       'yyvs': related to semantic values.
+       'yyls': related to locations.
+
+       Refer to the stacks through separate pointers, to allow yyoverflow
+       to reallocate them elsewhere.  */
+
+    /* The state stack.  */
+    yytype_int16 yyssa[YYINITDEPTH];
+    yytype_int16 *yyss;
+    yytype_int16 *yyssp;
+
+    /* The semantic value stack.  */
+    YYSTYPE yyvsa[YYINITDEPTH];
+    YYSTYPE *yyvs;
+    YYSTYPE *yyvsp;
+
+    /* The location stack.  */
+    YYLTYPE yylsa[YYINITDEPTH];
+    YYLTYPE *yyls;
+    YYLTYPE *yylsp;
+
+    /* The locations where the error started and ended.  */
+    YYLTYPE yyerror_range[3];
+
+    YYSIZE_T yystacksize;
+
+  int yyn;
+  int yyresult;
+  /* Lookahead token as an internal (translated) token number.  */
+  int yytoken = 0;
+  /* The variables used to return semantic value and location from the
+     action routines.  */
+  YYSTYPE yyval;
+  YYLTYPE yyloc;
+
+#if YYERROR_VERBOSE
+  /* Buffer for error messages, and its allocated size.  */
+  char yymsgbuf[128];
+  char *yymsg = yymsgbuf;
+  YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
+#endif
+
+#define YYPOPSTACK(N)   (yyvsp -= (N), yyssp -= (N), yylsp -= (N))
+
+  /* The number of symbols on the RHS of the reduced rule.
+     Keep to zero when no symbol should be popped.  */
+  int yylen = 0;
+
+  yyssp = yyss = yyssa;
+  yyvsp = yyvs = yyvsa;
+  yylsp = yyls = yylsa;
+  yystacksize = YYINITDEPTH;
+
+  YYDPRINTF ((stderr, "Starting parse\n"));
+
+  yystate = 0;
+  yyerrstatus = 0;
+  yynerrs = 0;
+  yychar = YYEMPTY; /* Cause a token to be read.  */
+  yylsp[0] = yylloc;
+  goto yysetstate;
+
+/*------------------------------------------------------------.
+| yynewstate -- Push a new state, which is found in yystate.  |
+`------------------------------------------------------------*/
+ yynewstate:
+  /* In all cases, when you get here, the value and location stacks
+     have just been pushed.  So pushing a state here evens the stacks.  */
+  yyssp++;
+
+ yysetstate:
+  *yyssp = yystate;
+
+  if (yyss + yystacksize - 1 <= yyssp)
+    {
+      /* Get the current used size of the three stacks, in elements.  */
+      YYSIZE_T yysize = yyssp - yyss + 1;
+
+#ifdef yyoverflow
+      {
+        /* Give user a chance to reallocate the stack.  Use copies of
+           these so that the &'s don't force the real ones into
+           memory.  */
+        YYSTYPE *yyvs1 = yyvs;
+        yytype_int16 *yyss1 = yyss;
+        YYLTYPE *yyls1 = yyls;
+
+        /* Each stack pointer address is followed by the size of the
+           data in use in that stack, in bytes.  This used to be a
+           conditional around just the two extra args, but that might
+           be undefined if yyoverflow is a macro.  */
+        yyoverflow (YY_("memory exhausted"),
+                    &yyss1, yysize * sizeof (*yyssp),
+                    &yyvs1, yysize * sizeof (*yyvsp),
+                    &yyls1, yysize * sizeof (*yylsp),
+                    &yystacksize);
+
+        yyls = yyls1;
+        yyss = yyss1;
+        yyvs = yyvs1;
+      }
+#else /* no yyoverflow */
+# ifndef YYSTACK_RELOCATE
+      goto yyexhaustedlab;
+# else
+      /* Extend the stack our own way.  */
+      if (YYMAXDEPTH <= yystacksize)
+        goto yyexhaustedlab;
+      yystacksize *= 2;
+      if (YYMAXDEPTH < yystacksize)
+        yystacksize = YYMAXDEPTH;
+
+      {
+        yytype_int16 *yyss1 = yyss;
+        union yyalloc *yyptr =
+          (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
+        if (! yyptr)
+          goto yyexhaustedlab;
+        YYSTACK_RELOCATE (yyss_alloc, yyss);
+        YYSTACK_RELOCATE (yyvs_alloc, yyvs);
+        YYSTACK_RELOCATE (yyls_alloc, yyls);
+#  undef YYSTACK_RELOCATE
+        if (yyss1 != yyssa)
+          YYSTACK_FREE (yyss1);
+      }
+# endif
+#endif /* no yyoverflow */
+
+      yyssp = yyss + yysize - 1;
+      yyvsp = yyvs + yysize - 1;
+      yylsp = yyls + yysize - 1;
+
+      YYDPRINTF ((stderr, "Stack size increased to %lu\n",
+                  (unsigned long int) yystacksize));
+
+      if (yyss + yystacksize - 1 <= yyssp)
+        YYABORT;
+    }
+
+  YYDPRINTF ((stderr, "Entering state %d\n", yystate));
+
+  if (yystate == YYFINAL)
+    YYACCEPT;
+
+  goto yybackup;
+
+/*-----------.
+| yybackup.  |
+`-----------*/
+yybackup:
+
+  /* Do appropriate processing given the current state.  Read a
+     lookahead token if we need one and don't already have one.  */
+
+  /* First try to decide what to do without reference to lookahead token.  */
+  yyn = yypact[yystate];
+  if (yypact_value_is_default (yyn))
+    goto yydefault;
+
+  /* Not known => get a lookahead token if don't already have one.  */
+
+  /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol.  */
+  if (yychar == YYEMPTY)
+    {
+      YYDPRINTF ((stderr, "Reading a token: "));
+      yychar = yylex ();
+    }
+
+  if (yychar <= YYEOF)
+    {
+      yychar = yytoken = YYEOF;
+      YYDPRINTF ((stderr, "Now at end of input.\n"));
+    }
+  else
+    {
+      yytoken = YYTRANSLATE (yychar);
+      YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
+    }
+
+  /* If the proper action on seeing token YYTOKEN is to reduce or to
+     detect an error, take that action.  */
+  yyn += yytoken;
+  if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
+    goto yydefault;
+  yyn = yytable[yyn];
+  if (yyn <= 0)
+    {
+      if (yytable_value_is_error (yyn))
+        goto yyerrlab;
+      yyn = -yyn;
+      goto yyreduce;
+    }
+
+  /* Count tokens shifted since error; after three, turn off error
+     status.  */
+  if (yyerrstatus)
+    yyerrstatus--;
+
+  /* Shift the lookahead token.  */
+  YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
+
+  /* Discard the shifted token.  */
+  yychar = YYEMPTY;
+
+  yystate = yyn;
+  YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+  *++yyvsp = yylval;
+  YY_IGNORE_MAYBE_UNINITIALIZED_END
+  *++yylsp = yylloc;
+  goto yynewstate;
+
+
+/*-----------------------------------------------------------.
+| yydefault -- do the default action for the current state.  |
+`-----------------------------------------------------------*/
+yydefault:
+  yyn = yydefact[yystate];
+  if (yyn == 0)
+    goto yyerrlab;
+  goto yyreduce;
+
+
+/*-----------------------------.
+| yyreduce -- Do a reduction.  |
+`-----------------------------*/
+yyreduce:
+  /* yyn is the number of a rule to reduce with.  */
+  yylen = yyr2[yyn];
+
+  /* If YYLEN is nonzero, implement the default value of the action:
+     '$$ = $1'.
+
+     Otherwise, the following line sets YYVAL to garbage.
+     This behavior is undocumented and Bison
+     users should not rely upon it.  Assigning to YYVAL
+     unconditionally makes the parser a bit smaller, and it avoids a
+     GCC warning that YYVAL may be used uninitialized.  */
+  yyval = yyvsp[1-yylen];
+
+  /* Default location.  */
+  YYLLOC_DEFAULT (yyloc, (yylsp - yylen), yylen);
+  YY_REDUCE_PRINT (yyn);
+  switch (yyn)
+    {
+        case 2:
+#line 110 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			parser_output = build_dt_info((yyvsp[-2].flags), (yyvsp[-1].re), (yyvsp[0].node),
+			                              guess_boot_cpuid((yyvsp[0].node)));
+		}
+#line 1476 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 3:
+#line 118 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.flags) = DTSF_V1;
+		}
+#line 1484 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 4:
+#line 122 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.flags) = DTSF_V1 | DTSF_PLUGIN;
+		}
+#line 1492 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 6:
+#line 130 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[0].flags) != (yyvsp[-1].flags))
+				ERROR(&(yylsp[0]), "Header flags don't match earlier ones");
+			(yyval.flags) = (yyvsp[-1].flags);
+		}
+#line 1502 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 7:
+#line 139 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.re) = NULL;
+		}
+#line 1510 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 8:
+#line 143 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.re) = chain_reserve_entry((yyvsp[-1].re), (yyvsp[0].re));
+		}
+#line 1518 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 9:
+#line 150 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.re) = build_reserve_entry((yyvsp[-2].integer), (yyvsp[-1].integer));
+		}
+#line 1526 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 10:
+#line 154 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			add_label(&(yyvsp[0].re)->labels, (yyvsp[-1].labelref));
+			(yyval.re) = (yyvsp[0].re);
+		}
+#line 1535 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 11:
+#line 162 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = name_node((yyvsp[0].node), "");
+		}
+#line 1543 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 12:
+#line 166 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = merge_nodes((yyvsp[-2].node), (yyvsp[0].node));
+		}
+#line 1551 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 13:
+#line 171 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref));
+
+			if (target) {
+				add_label(&target->labels, (yyvsp[-2].labelref));
+				merge_nodes(target, (yyvsp[0].node));
+			} else
+				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			(yyval.node) = (yyvsp[-3].node);
+		}
+#line 1566 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 14:
+#line 182 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			struct node *target = get_node_by_ref((yyvsp[-2].node), (yyvsp[-1].labelref));
+
+			if (target)
+				merge_nodes(target, (yyvsp[0].node));
+			else
+				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+			(yyval.node) = (yyvsp[-2].node);
+		}
+#line 1580 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 15:
+#line 192 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref));
+
+			if (target)
+				delete_node(target);
+			else
+				ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref));
+
+
+			(yyval.node) = (yyvsp[-3].node);
+		}
+#line 1596 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 16:
+#line 207 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist));
+		}
+#line 1604 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 17:
+#line 214 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.proplist) = NULL;
+		}
+#line 1612 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 18:
+#line 218 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist));
+		}
+#line 1620 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 19:
+#line 225 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data));
+		}
+#line 1628 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 20:
+#line 229 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data);
+		}
+#line 1636 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 21:
+#line 233 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.prop) = build_property_delete((yyvsp[-1].propnodename));
+		}
+#line 1644 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 22:
+#line 237 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			add_label(&(yyvsp[0].prop)->labels, (yyvsp[-1].labelref));
+			(yyval.prop) = (yyvsp[0].prop);
+		}
+#line 1653 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 23:
+#line 245 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_merge((yyvsp[-1].data), (yyvsp[0].data));
+		}
+#line 1661 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 24:
+#line 249 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_merge((yyvsp[-2].data), (yyvsp[-1].array).data);
+		}
+#line 1669 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 25:
+#line 253 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_merge((yyvsp[-3].data), (yyvsp[-1].data));
+		}
+#line 1677 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 26:
+#line 257 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), REF_PATH, (yyvsp[0].labelref));
+		}
+#line 1685 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 27:
+#line 261 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			FILE *f = srcfile_relative_open((yyvsp[-5].data).val, NULL);
+			struct data d;
+
+			if ((yyvsp[-3].integer) != 0)
+				if (fseek(f, (yyvsp[-3].integer), SEEK_SET) != 0)
+					die("Couldn't seek to offset %llu in \"%s\": %s",
+					    (unsigned long long)(yyvsp[-3].integer), (yyvsp[-5].data).val,
+					    strerror(errno));
+
+			d = data_copy_file(f, (yyvsp[-1].integer));
+
+			(yyval.data) = data_merge((yyvsp[-8].data), d);
+			fclose(f);
+		}
+#line 1705 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 28:
+#line 277 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			FILE *f = srcfile_relative_open((yyvsp[-1].data).val, NULL);
+			struct data d = empty_data;
+
+			d = data_copy_file(f, -1);
+
+			(yyval.data) = data_merge((yyvsp[-4].data), d);
+			fclose(f);
+		}
+#line 1719 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 29:
+#line 287 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
+		}
+#line 1727 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 30:
+#line 294 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = empty_data;
+		}
+#line 1735 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 31:
+#line 298 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = (yyvsp[-1].data);
+		}
+#line 1743 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 32:
+#line 302 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
+		}
+#line 1751 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 33:
+#line 309 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			unsigned long long bits;
+
+			bits = (yyvsp[-1].integer);
+
+			if ((bits !=  8) && (bits != 16) &&
+			    (bits != 32) && (bits != 64)) {
+				ERROR(&(yylsp[-1]), "Array elements must be"
+				      " 8, 16, 32 or 64-bits");
+				bits = 32;
+			}
+
+			(yyval.array).data = empty_data;
+			(yyval.array).bits = bits;
+		}
+#line 1771 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 34:
+#line 325 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.array).data = empty_data;
+			(yyval.array).bits = 32;
+		}
+#line 1780 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 35:
+#line 330 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[-1].array).bits < 64) {
+				uint64_t mask = (1ULL << (yyvsp[-1].array).bits) - 1;
+				/*
+				 * Bits above mask must either be all zero
+				 * (positive within range of mask) or all one
+				 * (negative and sign-extended). The second
+				 * condition is true if when we set all bits
+				 * within the mask to one (i.e. | in the
+				 * mask), all bits are one.
+				 */
+				if (((yyvsp[0].integer) > mask) && (((yyvsp[0].integer) | mask) != -1ULL))
+					ERROR(&(yylsp[0]), "Value out of range for"
+					      " %d-bit array element", (yyvsp[-1].array).bits);
+			}
+
+			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, (yyvsp[0].integer), (yyvsp[-1].array).bits);
+		}
+#line 1803 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 36:
+#line 349 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			uint64_t val = ~0ULL >> (64 - (yyvsp[-1].array).bits);
+
+			if ((yyvsp[-1].array).bits == 32)
+				(yyvsp[-1].array).data = data_add_marker((yyvsp[-1].array).data,
+							  REF_PHANDLE,
+							  (yyvsp[0].labelref));
+			else
+				ERROR(&(yylsp[0]), "References are only allowed in "
+					    "arrays with 32-bit elements.");
+
+			(yyval.array).data = data_append_integer((yyvsp[-1].array).data, val, (yyvsp[-1].array).bits);
+		}
+#line 1821 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 37:
+#line 363 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.array).data = data_add_marker((yyvsp[-1].array).data, LABEL, (yyvsp[0].labelref));
+		}
+#line 1829 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 40:
+#line 372 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.integer) = (yyvsp[-1].integer);
+		}
+#line 1837 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 43:
+#line 383 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-4].integer) ? (yyvsp[-2].integer) : (yyvsp[0].integer); }
+#line 1843 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 45:
+#line 388 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) || (yyvsp[0].integer); }
+#line 1849 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 47:
+#line 393 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) && (yyvsp[0].integer); }
+#line 1855 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 49:
+#line 398 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) | (yyvsp[0].integer); }
+#line 1861 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 51:
+#line 403 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) ^ (yyvsp[0].integer); }
+#line 1867 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 53:
+#line 408 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) & (yyvsp[0].integer); }
+#line 1873 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 55:
+#line 413 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) == (yyvsp[0].integer); }
+#line 1879 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 56:
+#line 414 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) != (yyvsp[0].integer); }
+#line 1885 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 58:
+#line 419 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) < (yyvsp[0].integer); }
+#line 1891 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 59:
+#line 420 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) > (yyvsp[0].integer); }
+#line 1897 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 60:
+#line 421 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) <= (yyvsp[0].integer); }
+#line 1903 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 61:
+#line 422 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) >= (yyvsp[0].integer); }
+#line 1909 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 62:
+#line 426 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) << (yyvsp[0].integer); }
+#line 1915 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 63:
+#line 427 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) >> (yyvsp[0].integer); }
+#line 1921 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 65:
+#line 432 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) + (yyvsp[0].integer); }
+#line 1927 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 66:
+#line 433 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) - (yyvsp[0].integer); }
+#line 1933 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 68:
+#line 438 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = (yyvsp[-2].integer) * (yyvsp[0].integer); }
+#line 1939 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 69:
+#line 440 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[0].integer) != 0) {
+				(yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer);
+			} else {
+				ERROR(&(yyloc), "Division by zero");
+				(yyval.integer) = 0;
+			}
+		}
+#line 1952 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 70:
+#line 449 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			if ((yyvsp[0].integer) != 0) {
+				(yyval.integer) = (yyvsp[-2].integer) % (yyvsp[0].integer);
+			} else {
+				ERROR(&(yyloc), "Division by zero");
+				(yyval.integer) = 0;
+			}
+		}
+#line 1965 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 73:
+#line 462 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = -(yyvsp[0].integer); }
+#line 1971 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 74:
+#line 463 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = ~(yyvsp[0].integer); }
+#line 1977 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 75:
+#line 464 "dtc-parser.y" /* yacc.c:1646  */
+    { (yyval.integer) = !(yyvsp[0].integer); }
+#line 1983 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 76:
+#line 469 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = empty_data;
+		}
+#line 1991 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 77:
+#line 473 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_append_byte((yyvsp[-1].data), (yyvsp[0].byte));
+		}
+#line 1999 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 78:
+#line 477 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref));
+		}
+#line 2007 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 79:
+#line 484 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.nodelist) = NULL;
+		}
+#line 2015 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 80:
+#line 488 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.nodelist) = chain_node((yyvsp[-1].node), (yyvsp[0].nodelist));
+		}
+#line 2023 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 81:
+#line 492 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			ERROR(&(yylsp[0]), "Properties must precede subnodes");
+			YYERROR;
+		}
+#line 2032 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 82:
+#line 500 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = name_node((yyvsp[0].node), (yyvsp[-1].propnodename));
+		}
+#line 2040 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 83:
+#line 504 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			(yyval.node) = name_node(build_node_delete(), (yyvsp[-1].propnodename));
+		}
+#line 2048 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+  case 84:
+#line 508 "dtc-parser.y" /* yacc.c:1646  */
+    {
+			add_label(&(yyvsp[0].node)->labels, (yyvsp[-1].labelref));
+			(yyval.node) = (yyvsp[0].node);
+		}
+#line 2057 "dtc-parser.tab.c" /* yacc.c:1646  */
+    break;
+
+
+#line 2061 "dtc-parser.tab.c" /* yacc.c:1646  */
+      default: break;
+    }
+  /* User semantic actions sometimes alter yychar, and that requires
+     that yytoken be updated with the new translation.  We take the
+     approach of translating immediately before every use of yytoken.
+     One alternative is translating here after every semantic action,
+     but that translation would be missed if the semantic action invokes
+     YYABORT, YYACCEPT, or YYERROR immediately after altering yychar or
+     if it invokes YYBACKUP.  In the case of YYABORT or YYACCEPT, an
+     incorrect destructor might then be invoked immediately.  In the
+     case of YYERROR or YYBACKUP, subsequent parser actions might lead
+     to an incorrect destructor call or verbose syntax error message
+     before the lookahead is translated.  */
+  YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
+
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+
+  *++yyvsp = yyval;
+  *++yylsp = yyloc;
+
+  /* Now 'shift' the result of the reduction.  Determine what state
+     that goes to, based on the state we popped back to and the rule
+     number reduced by.  */
+
+  yyn = yyr1[yyn];
+
+  yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
+  if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
+    yystate = yytable[yystate];
+  else
+    yystate = yydefgoto[yyn - YYNTOKENS];
+
+  goto yynewstate;
+
+
+/*--------------------------------------.
+| yyerrlab -- here on detecting error.  |
+`--------------------------------------*/
+yyerrlab:
+  /* Make sure we have latest lookahead translation.  See comments at
+     user semantic actions for why this is necessary.  */
+  yytoken = yychar == YYEMPTY ? YYEMPTY : YYTRANSLATE (yychar);
+
+  /* If not already recovering from an error, report this error.  */
+  if (!yyerrstatus)
+    {
+      ++yynerrs;
+#if ! YYERROR_VERBOSE
+      yyerror (YY_("syntax error"));
+#else
+# define YYSYNTAX_ERROR yysyntax_error (&yymsg_alloc, &yymsg, \
+                                        yyssp, yytoken)
+      {
+        char const *yymsgp = YY_("syntax error");
+        int yysyntax_error_status;
+        yysyntax_error_status = YYSYNTAX_ERROR;
+        if (yysyntax_error_status == 0)
+          yymsgp = yymsg;
+        else if (yysyntax_error_status == 1)
+          {
+            if (yymsg != yymsgbuf)
+              YYSTACK_FREE (yymsg);
+            yymsg = (char *) YYSTACK_ALLOC (yymsg_alloc);
+            if (!yymsg)
+              {
+                yymsg = yymsgbuf;
+                yymsg_alloc = sizeof yymsgbuf;
+                yysyntax_error_status = 2;
+              }
+            else
+              {
+                yysyntax_error_status = YYSYNTAX_ERROR;
+                yymsgp = yymsg;
+              }
+          }
+        yyerror (yymsgp);
+        if (yysyntax_error_status == 2)
+          goto yyexhaustedlab;
+      }
+# undef YYSYNTAX_ERROR
+#endif
+    }
+
+  yyerror_range[1] = yylloc;
+
+  if (yyerrstatus == 3)
+    {
+      /* If just tried and failed to reuse lookahead token after an
+         error, discard it.  */
+
+      if (yychar <= YYEOF)
+        {
+          /* Return failure if at end of input.  */
+          if (yychar == YYEOF)
+            YYABORT;
+        }
+      else
+        {
+          yydestruct ("Error: discarding",
+                      yytoken, &yylval, &yylloc);
+          yychar = YYEMPTY;
+        }
+    }
+
+  /* Else will try to reuse lookahead token after shifting the error
+     token.  */
+  goto yyerrlab1;
+
+
+/*---------------------------------------------------.
+| yyerrorlab -- error raised explicitly by YYERROR.  |
+`---------------------------------------------------*/
+yyerrorlab:
+
+  /* Pacify compilers like GCC when the user code never invokes
+     YYERROR and the label yyerrorlab therefore never appears in user
+     code.  */
+  if (/*CONSTCOND*/ 0)
+     goto yyerrorlab;
+
+  yyerror_range[1] = yylsp[1-yylen];
+  /* Do not reclaim the symbols of the rule whose action triggered
+     this YYERROR.  */
+  YYPOPSTACK (yylen);
+  yylen = 0;
+  YY_STACK_PRINT (yyss, yyssp);
+  yystate = *yyssp;
+  goto yyerrlab1;
+
+
+/*-------------------------------------------------------------.
+| yyerrlab1 -- common code for both syntax error and YYERROR.  |
+`-------------------------------------------------------------*/
+yyerrlab1:
+  yyerrstatus = 3;      /* Each real token shifted decrements this.  */
+
+  for (;;)
+    {
+      yyn = yypact[yystate];
+      if (!yypact_value_is_default (yyn))
+        {
+          yyn += YYTERROR;
+          if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
+            {
+              yyn = yytable[yyn];
+              if (0 < yyn)
+                break;
+            }
+        }
+
+      /* Pop the current state because it cannot handle the error token.  */
+      if (yyssp == yyss)
+        YYABORT;
+
+      yyerror_range[1] = *yylsp;
+      yydestruct ("Error: popping",
+                  yystos[yystate], yyvsp, yylsp);
+      YYPOPSTACK (1);
+      yystate = *yyssp;
+      YY_STACK_PRINT (yyss, yyssp);
+    }
+
+  YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN
+  *++yyvsp = yylval;
+  YY_IGNORE_MAYBE_UNINITIALIZED_END
+
+  yyerror_range[2] = yylloc;
+  /* Using YYLLOC is tempting, but would change the location of
+     the lookahead.  YYLOC is available though.  */
+  YYLLOC_DEFAULT (yyloc, yyerror_range, 2);
+  *++yylsp = yyloc;
+
+  /* Shift the error token.  */
+  YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
+
+  yystate = yyn;
+  goto yynewstate;
+
+
+/*-------------------------------------.
+| yyacceptlab -- YYACCEPT comes here.  |
+`-------------------------------------*/
+yyacceptlab:
+  yyresult = 0;
+  goto yyreturn;
+
+/*-----------------------------------.
+| yyabortlab -- YYABORT comes here.  |
+`-----------------------------------*/
+yyabortlab:
+  yyresult = 1;
+  goto yyreturn;
+
+#if !defined yyoverflow || YYERROR_VERBOSE
+/*-------------------------------------------------.
+| yyexhaustedlab -- memory exhaustion comes here.  |
+`-------------------------------------------------*/
+yyexhaustedlab:
+  yyerror (YY_("memory exhausted"));
+  yyresult = 2;
+  /* Fall through.  */
+#endif
+
+yyreturn:
+  if (yychar != YYEMPTY)
+    {
+      /* Make sure we have latest lookahead translation.  See comments at
+         user semantic actions for why this is necessary.  */
+      yytoken = YYTRANSLATE (yychar);
+      yydestruct ("Cleanup: discarding lookahead",
+                  yytoken, &yylval, &yylloc);
+    }
+  /* Do not reclaim the symbols of the rule whose action triggered
+     this YYABORT or YYACCEPT.  */
+  YYPOPSTACK (yylen);
+  YY_STACK_PRINT (yyss, yyssp);
+  while (yyssp != yyss)
+    {
+      yydestruct ("Cleanup: popping",
+                  yystos[*yyssp], yyvsp, yylsp);
+      YYPOPSTACK (1);
+    }
+#ifndef yyoverflow
+  if (yyss != yyssa)
+    YYSTACK_FREE (yyss);
+#endif
+#if YYERROR_VERBOSE
+  if (yymsg != yymsgbuf)
+    YYSTACK_FREE (yymsg);
+#endif
+  return yyresult;
+}
+#line 514 "dtc-parser.y" /* yacc.c:1906  */
+
+
+void yyerror(char const *s)
+{
+	ERROR(&yylloc, "%s", s);
+}
diff --git a/scripts/dtc/dtc-parser.tab.h_shipped b/scripts/dtc/dtc-parser.tab.h_shipped
new file mode 100644
index 0000000000..e7b04dd016
--- /dev/null
+++ b/scripts/dtc/dtc-parser.tab.h_shipped
@@ -0,0 +1,123 @@
+/* A Bison parser, made by GNU Bison 3.0.2.  */
+
+/* Bison interface for Yacc-like parsers in C
+
+   Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
+
+   This program is free software: you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation, either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* As a special exception, you may create a larger work that contains
+   part or all of the Bison parser skeleton and distribute that work
+   under terms of your choice, so long as that work isn't itself a
+   parser generator using the skeleton or a modified version thereof
+   as a parser skeleton.  Alternatively, if you modify or redistribute
+   the parser skeleton itself, you may (at your option) remove this
+   special exception, which will cause the skeleton and the resulting
+   Bison output files to be licensed under the GNU General Public
+   License without this special exception.
+
+   This special exception was added by the Free Software Foundation in
+   version 2.2 of Bison.  */
+
+#ifndef YY_YY_DTC_PARSER_TAB_H_INCLUDED
+# define YY_YY_DTC_PARSER_TAB_H_INCLUDED
+/* Debug traces.  */
+#ifndef YYDEBUG
+# define YYDEBUG 0
+#endif
+#if YYDEBUG
+extern int yydebug;
+#endif
+
+/* Token type.  */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+  enum yytokentype
+  {
+    DT_V1 = 258,
+    DT_PLUGIN = 259,
+    DT_MEMRESERVE = 260,
+    DT_LSHIFT = 261,
+    DT_RSHIFT = 262,
+    DT_LE = 263,
+    DT_GE = 264,
+    DT_EQ = 265,
+    DT_NE = 266,
+    DT_AND = 267,
+    DT_OR = 268,
+    DT_BITS = 269,
+    DT_DEL_PROP = 270,
+    DT_DEL_NODE = 271,
+    DT_PROPNODENAME = 272,
+    DT_LITERAL = 273,
+    DT_CHAR_LITERAL = 274,
+    DT_BYTE = 275,
+    DT_STRING = 276,
+    DT_LABEL = 277,
+    DT_REF = 278,
+    DT_INCBIN = 279
+  };
+#endif
+
+/* Value type.  */
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef union YYSTYPE YYSTYPE;
+union YYSTYPE
+{
+#line 39 "dtc-parser.y" /* yacc.c:1909  */
+
+	char *propnodename;
+	char *labelref;
+	uint8_t byte;
+	struct data data;
+
+	struct {
+		struct data	data;
+		int		bits;
+	} array;
+
+	struct property *prop;
+	struct property *proplist;
+	struct node *node;
+	struct node *nodelist;
+	struct reserve_info *re;
+	uint64_t integer;
+	unsigned int flags;
+
+#line 99 "dtc-parser.tab.h" /* yacc.c:1909  */
+};
+# define YYSTYPE_IS_TRIVIAL 1
+# define YYSTYPE_IS_DECLARED 1
+#endif
+
+/* Location type.  */
+#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
+typedef struct YYLTYPE YYLTYPE;
+struct YYLTYPE
+{
+  int first_line;
+  int first_column;
+  int last_line;
+  int last_column;
+};
+# define YYLTYPE_IS_DECLARED 1
+# define YYLTYPE_IS_TRIVIAL 1
+#endif
+
+
+extern YYSTYPE yylval;
+extern YYLTYPE yylloc;
+int yyparse (void);
+
+#endif /* !YY_YY_DTC_PARSER_TAB_H_INCLUDED  */
diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y
new file mode 100644
index 0000000000..ca3f500342
--- /dev/null
+++ b/scripts/dtc/dtc-parser.y
@@ -0,0 +1,519 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+%{
+#include <stdio.h>
+#include <inttypes.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+extern int yylex(void);
+extern void yyerror(char const *s);
+#define ERROR(loc, ...) \
+	do { \
+		srcpos_error((loc), "Error", __VA_ARGS__); \
+		treesource_error = true; \
+	} while (0)
+
+extern struct dt_info *parser_output;
+extern bool treesource_error;
+%}
+
+%union {
+	char *propnodename;
+	char *labelref;
+	uint8_t byte;
+	struct data data;
+
+	struct {
+		struct data	data;
+		int		bits;
+	} array;
+
+	struct property *prop;
+	struct property *proplist;
+	struct node *node;
+	struct node *nodelist;
+	struct reserve_info *re;
+	uint64_t integer;
+	unsigned int flags;
+}
+
+%token DT_V1
+%token DT_PLUGIN
+%token DT_MEMRESERVE
+%token DT_LSHIFT DT_RSHIFT DT_LE DT_GE DT_EQ DT_NE DT_AND DT_OR
+%token DT_BITS
+%token DT_DEL_PROP
+%token DT_DEL_NODE
+%token <propnodename> DT_PROPNODENAME
+%token <integer> DT_LITERAL
+%token <integer> DT_CHAR_LITERAL
+%token <byte> DT_BYTE
+%token <data> DT_STRING
+%token <labelref> DT_LABEL
+%token <labelref> DT_REF
+%token DT_INCBIN
+
+%type <data> propdata
+%type <data> propdataprefix
+%type <flags> header
+%type <flags> headers
+%type <re> memreserve
+%type <re> memreserves
+%type <array> arrayprefix
+%type <data> bytestring
+%type <prop> propdef
+%type <proplist> proplist
+
+%type <node> devicetree
+%type <node> nodedef
+%type <node> subnode
+%type <nodelist> subnodes
+
+%type <integer> integer_prim
+%type <integer> integer_unary
+%type <integer> integer_mul
+%type <integer> integer_add
+%type <integer> integer_shift
+%type <integer> integer_rela
+%type <integer> integer_eq
+%type <integer> integer_bitand
+%type <integer> integer_bitxor
+%type <integer> integer_bitor
+%type <integer> integer_and
+%type <integer> integer_or
+%type <integer> integer_trinary
+%type <integer> integer_expr
+
+%%
+
+sourcefile:
+	  headers memreserves devicetree
+		{
+			parser_output = build_dt_info($1, $2, $3,
+			                              guess_boot_cpuid($3));
+		}
+	;
+
+header:
+	  DT_V1 ';'
+		{
+			$$ = DTSF_V1;
+		}
+	| DT_V1 ';' DT_PLUGIN ';'
+		{
+			$$ = DTSF_V1 | DTSF_PLUGIN;
+		}
+	;
+
+headers:
+	  header
+	| header headers
+		{
+			if ($2 != $1)
+				ERROR(&@2, "Header flags don't match earlier ones");
+			$$ = $1;
+		}
+	;
+
+memreserves:
+	  /* empty */
+		{
+			$$ = NULL;
+		}
+	| memreserve memreserves
+		{
+			$$ = chain_reserve_entry($1, $2);
+		}
+	;
+
+memreserve:
+	  DT_MEMRESERVE integer_prim integer_prim ';'
+		{
+			$$ = build_reserve_entry($2, $3);
+		}
+	| DT_LABEL memreserve
+		{
+			add_label(&$2->labels, $1);
+			$$ = $2;
+		}
+	;
+
+devicetree:
+	  '/' nodedef
+		{
+			$$ = name_node($2, "");
+		}
+	| devicetree '/' nodedef
+		{
+			$$ = merge_nodes($1, $3);
+		}
+
+	| devicetree DT_LABEL DT_REF nodedef
+		{
+			struct node *target = get_node_by_ref($1, $3);
+
+			if (target) {
+				add_label(&target->labels, $2);
+				merge_nodes(target, $4);
+			} else
+				ERROR(&@3, "Label or path %s not found", $3);
+			$$ = $1;
+		}
+	| devicetree DT_REF nodedef
+		{
+			struct node *target = get_node_by_ref($1, $2);
+
+			if (target)
+				merge_nodes(target, $3);
+			else
+				ERROR(&@2, "Label or path %s not found", $2);
+			$$ = $1;
+		}
+	| devicetree DT_DEL_NODE DT_REF ';'
+		{
+			struct node *target = get_node_by_ref($1, $3);
+
+			if (target)
+				delete_node(target);
+			else
+				ERROR(&@3, "Label or path %s not found", $3);
+
+
+			$$ = $1;
+		}
+	;
+
+nodedef:
+	  '{' proplist subnodes '}' ';'
+		{
+			$$ = build_node($2, $3);
+		}
+	;
+
+proplist:
+	  /* empty */
+		{
+			$$ = NULL;
+		}
+	| proplist propdef
+		{
+			$$ = chain_property($2, $1);
+		}
+	;
+
+propdef:
+	  DT_PROPNODENAME '=' propdata ';'
+		{
+			$$ = build_property($1, $3);
+		}
+	| DT_PROPNODENAME ';'
+		{
+			$$ = build_property($1, empty_data);
+		}
+	| DT_DEL_PROP DT_PROPNODENAME ';'
+		{
+			$$ = build_property_delete($2);
+		}
+	| DT_LABEL propdef
+		{
+			add_label(&$2->labels, $1);
+			$$ = $2;
+		}
+	;
+
+propdata:
+	  propdataprefix DT_STRING
+		{
+			$$ = data_merge($1, $2);
+		}
+	| propdataprefix arrayprefix '>'
+		{
+			$$ = data_merge($1, $2.data);
+		}
+	| propdataprefix '[' bytestring ']'
+		{
+			$$ = data_merge($1, $3);
+		}
+	| propdataprefix DT_REF
+		{
+			$$ = data_add_marker($1, REF_PATH, $2);
+		}
+	| propdataprefix DT_INCBIN '(' DT_STRING ',' integer_prim ',' integer_prim ')'
+		{
+			FILE *f = srcfile_relative_open($4.val, NULL);
+			struct data d;
+
+			if ($6 != 0)
+				if (fseek(f, $6, SEEK_SET) != 0)
+					die("Couldn't seek to offset %llu in \"%s\": %s",
+					    (unsigned long long)$6, $4.val,
+					    strerror(errno));
+
+			d = data_copy_file(f, $8);
+
+			$$ = data_merge($1, d);
+			fclose(f);
+		}
+	| propdataprefix DT_INCBIN '(' DT_STRING ')'
+		{
+			FILE *f = srcfile_relative_open($4.val, NULL);
+			struct data d = empty_data;
+
+			d = data_copy_file(f, -1);
+
+			$$ = data_merge($1, d);
+			fclose(f);
+		}
+	| propdata DT_LABEL
+		{
+			$$ = data_add_marker($1, LABEL, $2);
+		}
+	;
+
+propdataprefix:
+	  /* empty */
+		{
+			$$ = empty_data;
+		}
+	| propdata ','
+		{
+			$$ = $1;
+		}
+	| propdataprefix DT_LABEL
+		{
+			$$ = data_add_marker($1, LABEL, $2);
+		}
+	;
+
+arrayprefix:
+	DT_BITS DT_LITERAL '<'
+		{
+			unsigned long long bits;
+
+			bits = $2;
+
+			if ((bits !=  8) && (bits != 16) &&
+			    (bits != 32) && (bits != 64)) {
+				ERROR(&@2, "Array elements must be"
+				      " 8, 16, 32 or 64-bits");
+				bits = 32;
+			}
+
+			$$.data = empty_data;
+			$$.bits = bits;
+		}
+	| '<'
+		{
+			$$.data = empty_data;
+			$$.bits = 32;
+		}
+	| arrayprefix integer_prim
+		{
+			if ($1.bits < 64) {
+				uint64_t mask = (1ULL << $1.bits) - 1;
+				/*
+				 * Bits above mask must either be all zero
+				 * (positive within range of mask) or all one
+				 * (negative and sign-extended). The second
+				 * condition is true if when we set all bits
+				 * within the mask to one (i.e. | in the
+				 * mask), all bits are one.
+				 */
+				if (($2 > mask) && (($2 | mask) != -1ULL))
+					ERROR(&@2, "Value out of range for"
+					      " %d-bit array element", $1.bits);
+			}
+
+			$$.data = data_append_integer($1.data, $2, $1.bits);
+		}
+	| arrayprefix DT_REF
+		{
+			uint64_t val = ~0ULL >> (64 - $1.bits);
+
+			if ($1.bits == 32)
+				$1.data = data_add_marker($1.data,
+							  REF_PHANDLE,
+							  $2);
+			else
+				ERROR(&@2, "References are only allowed in "
+					    "arrays with 32-bit elements.");
+
+			$$.data = data_append_integer($1.data, val, $1.bits);
+		}
+	| arrayprefix DT_LABEL
+		{
+			$$.data = data_add_marker($1.data, LABEL, $2);
+		}
+	;
+
+integer_prim:
+	  DT_LITERAL
+	| DT_CHAR_LITERAL
+	| '(' integer_expr ')'
+		{
+			$$ = $2;
+		}
+	;
+
+integer_expr:
+	integer_trinary
+	;
+
+integer_trinary:
+	  integer_or
+	| integer_or '?' integer_expr ':' integer_trinary { $$ = $1 ? $3 : $5; }
+	;
+
+integer_or:
+	  integer_and
+	| integer_or DT_OR integer_and { $$ = $1 || $3; }
+	;
+
+integer_and:
+	  integer_bitor
+	| integer_and DT_AND integer_bitor { $$ = $1 && $3; }
+	;
+
+integer_bitor:
+	  integer_bitxor
+	| integer_bitor '|' integer_bitxor { $$ = $1 | $3; }
+	;
+
+integer_bitxor:
+	  integer_bitand
+	| integer_bitxor '^' integer_bitand { $$ = $1 ^ $3; }
+	;
+
+integer_bitand:
+	  integer_eq
+	| integer_bitand '&' integer_eq { $$ = $1 & $3; }
+	;
+
+integer_eq:
+	  integer_rela
+	| integer_eq DT_EQ integer_rela { $$ = $1 == $3; }
+	| integer_eq DT_NE integer_rela { $$ = $1 != $3; }
+	;
+
+integer_rela:
+	  integer_shift
+	| integer_rela '<' integer_shift { $$ = $1 < $3; }
+	| integer_rela '>' integer_shift { $$ = $1 > $3; }
+	| integer_rela DT_LE integer_shift { $$ = $1 <= $3; }
+	| integer_rela DT_GE integer_shift { $$ = $1 >= $3; }
+	;
+
+integer_shift:
+	  integer_shift DT_LSHIFT integer_add { $$ = $1 << $3; }
+	| integer_shift DT_RSHIFT integer_add { $$ = $1 >> $3; }
+	| integer_add
+	;
+
+integer_add:
+	  integer_add '+' integer_mul { $$ = $1 + $3; }
+	| integer_add '-' integer_mul { $$ = $1 - $3; }
+	| integer_mul
+	;
+
+integer_mul:
+	  integer_mul '*' integer_unary { $$ = $1 * $3; }
+	| integer_mul '/' integer_unary
+		{
+			if ($3 != 0) {
+				$$ = $1 / $3;
+			} else {
+				ERROR(&@$, "Division by zero");
+				$$ = 0;
+			}
+		}
+	| integer_mul '%' integer_unary
+		{
+			if ($3 != 0) {
+				$$ = $1 % $3;
+			} else {
+				ERROR(&@$, "Division by zero");
+				$$ = 0;
+			}
+		}
+	| integer_unary
+	;
+
+integer_unary:
+	  integer_prim
+	| '-' integer_unary { $$ = -$2; }
+	| '~' integer_unary { $$ = ~$2; }
+	| '!' integer_unary { $$ = !$2; }
+	;
+
+bytestring:
+	  /* empty */
+		{
+			$$ = empty_data;
+		}
+	| bytestring DT_BYTE
+		{
+			$$ = data_append_byte($1, $2);
+		}
+	| bytestring DT_LABEL
+		{
+			$$ = data_add_marker($1, LABEL, $2);
+		}
+	;
+
+subnodes:
+	  /* empty */
+		{
+			$$ = NULL;
+		}
+	| subnode subnodes
+		{
+			$$ = chain_node($1, $2);
+		}
+	| subnode propdef
+		{
+			ERROR(&@2, "Properties must precede subnodes");
+			YYERROR;
+		}
+	;
+
+subnode:
+	  DT_PROPNODENAME nodedef
+		{
+			$$ = name_node($2, $1);
+		}
+	| DT_DEL_NODE DT_PROPNODENAME ';'
+		{
+			$$ = name_node(build_node_delete(), $2);
+		}
+	| DT_LABEL subnode
+		{
+			add_label(&$2->labels, $1);
+			$$ = $2;
+		}
+	;
+
+%%
+
+void yyerror(char const *s)
+{
+	ERROR(&yylloc, "%s", s);
+}
diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c
new file mode 100644
index 0000000000..bb1e52b318
--- /dev/null
+++ b/scripts/dtc/dtc.c
@@ -0,0 +1,366 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include <sys/stat.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+/*
+ * Command line options
+ */
+int quiet;		/* Level of quietness */
+int reservenum;		/* Number of memory reservation slots */
+int minsize;		/* Minimum blob size */
+int padsize;		/* Additional padding to blob */
+int alignsize;		/* Additional padding to blob accroding to the alignsize */
+int phandle_format = PHANDLE_BOTH;	/* Use linux,phandle or phandle properties */
+int generate_symbols;	/* enable symbols & fixup support */
+int generate_fixups;		/* suppress generation of fixups on symbol support */
+int auto_label_aliases;		/* auto generate labels -> aliases */
+
+static int is_power_of_2(int x)
+{
+	return (x > 0) && ((x & (x - 1)) == 0);
+}
+
+static void fill_fullpaths(struct node *tree, const char *prefix)
+{
+	struct node *child;
+	const char *unit;
+
+	tree->fullpath = join_path(prefix, tree->name);
+
+	unit = strchr(tree->name, '@');
+	if (unit)
+		tree->basenamelen = unit - tree->name;
+	else
+		tree->basenamelen = strlen(tree->name);
+
+	for_each_child(tree, child)
+		fill_fullpaths(child, tree->fullpath);
+}
+
+/* Usage related data. */
+#define FDT_VERSION(version)	_FDT_VERSION(version)
+#define _FDT_VERSION(version)	#version
+static const char usage_synopsis[] = "dtc [options] <input file>";
+static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:a:fb:i:H:sW:E:@Ahv";
+static struct option const usage_long_opts[] = {
+	{"quiet",            no_argument, NULL, 'q'},
+	{"in-format",         a_argument, NULL, 'I'},
+	{"out",               a_argument, NULL, 'o'},
+	{"out-format",        a_argument, NULL, 'O'},
+	{"out-version",       a_argument, NULL, 'V'},
+	{"out-dependency",    a_argument, NULL, 'd'},
+	{"reserve",           a_argument, NULL, 'R'},
+	{"space",             a_argument, NULL, 'S'},
+	{"pad",               a_argument, NULL, 'p'},
+	{"align",             a_argument, NULL, 'a'},
+	{"boot-cpu",          a_argument, NULL, 'b'},
+	{"force",            no_argument, NULL, 'f'},
+	{"include",           a_argument, NULL, 'i'},
+	{"sort",             no_argument, NULL, 's'},
+	{"phandle",           a_argument, NULL, 'H'},
+	{"warning",           a_argument, NULL, 'W'},
+	{"error",             a_argument, NULL, 'E'},
+	{"symbols",	     no_argument, NULL, '@'},
+	{"auto-alias",       no_argument, NULL, 'A'},
+	{"help",             no_argument, NULL, 'h'},
+	{"version",          no_argument, NULL, 'v'},
+	{NULL,               no_argument, NULL, 0x0},
+};
+static const char * const usage_opts_help[] = {
+	"\n\tQuiet: -q suppress warnings, -qq errors, -qqq all",
+	"\n\tInput formats are:\n"
+	 "\t\tdts - device tree source text\n"
+	 "\t\tdtb - device tree blob\n"
+	 "\t\tfs  - /proc/device-tree style directory",
+	"\n\tOutput file",
+	"\n\tOutput formats are:\n"
+	 "\t\tdts - device tree source text\n"
+	 "\t\tdtb - device tree blob\n"
+	 "\t\tasm - assembler source",
+	"\n\tBlob version to produce, defaults to "FDT_VERSION(DEFAULT_FDT_VERSION)" (for dtb and asm output)",
+	"\n\tOutput dependency file",
+	"\n\tMake space for <number> reserve map entries (for dtb and asm output)",
+	"\n\tMake the blob at least <bytes> long (extra space)",
+	"\n\tAdd padding to the blob of <bytes> long (extra space)",
+	"\n\tMake the blob align to the <bytes> (extra space)",
+	"\n\tSet the physical boot cpu",
+	"\n\tTry to produce output even if the input tree has errors",
+	"\n\tAdd a path to search for include files",
+	"\n\tSort nodes and properties before outputting (useful for comparing trees)",
+	"\n\tValid phandle formats are:\n"
+	 "\t\tlegacy - \"linux,phandle\" properties only\n"
+	 "\t\tepapr  - \"phandle\" properties only\n"
+	 "\t\tboth   - Both \"linux,phandle\" and \"phandle\" properties",
+	"\n\tEnable/disable warnings (prefix with \"no-\")",
+	"\n\tEnable/disable errors (prefix with \"no-\")",
+	"\n\tEnable generation of symbols",
+	"\n\tEnable auto-alias of labels",
+	"\n\tPrint this help and exit",
+	"\n\tPrint version and exit",
+	NULL,
+};
+
+static const char *guess_type_by_name(const char *fname, const char *fallback)
+{
+	const char *s;
+
+	s = strrchr(fname, '.');
+	if (s == NULL)
+		return fallback;
+	if (!strcasecmp(s, ".dts"))
+		return "dts";
+	if (!strcasecmp(s, ".dtb"))
+		return "dtb";
+	return fallback;
+}
+
+static const char *guess_input_format(const char *fname, const char *fallback)
+{
+	struct stat statbuf;
+	uint32_t magic;
+	FILE *f;
+
+	if (stat(fname, &statbuf) != 0)
+		return fallback;
+
+	if (S_ISDIR(statbuf.st_mode))
+		return "fs";
+
+	if (!S_ISREG(statbuf.st_mode))
+		return fallback;
+
+	f = fopen(fname, "r");
+	if (f == NULL)
+		return fallback;
+	if (fread(&magic, 4, 1, f) != 1) {
+		fclose(f);
+		return fallback;
+	}
+	fclose(f);
+
+	magic = fdt32_to_cpu(magic);
+	if (magic == FDT_MAGIC)
+		return "dtb";
+
+	return guess_type_by_name(fname, fallback);
+}
+
+int main(int argc, char *argv[])
+{
+	struct dt_info *dti;
+	const char *inform = NULL;
+	const char *outform = NULL;
+	const char *outname = "-";
+	const char *depname = NULL;
+	bool force = false, sort = false;
+	const char *arg;
+	int opt;
+	FILE *outf = NULL;
+	int outversion = DEFAULT_FDT_VERSION;
+	long long cmdline_boot_cpuid = -1;
+
+	quiet      = 0;
+	reservenum = 0;
+	minsize    = 0;
+	padsize    = 0;
+	alignsize  = 0;
+
+	while ((opt = util_getopt_long()) != EOF) {
+		switch (opt) {
+		case 'I':
+			inform = optarg;
+			break;
+		case 'O':
+			outform = optarg;
+			break;
+		case 'o':
+			outname = optarg;
+			break;
+		case 'V':
+			outversion = strtol(optarg, NULL, 0);
+			break;
+		case 'd':
+			depname = optarg;
+			break;
+		case 'R':
+			reservenum = strtol(optarg, NULL, 0);
+			break;
+		case 'S':
+			minsize = strtol(optarg, NULL, 0);
+			break;
+		case 'p':
+			padsize = strtol(optarg, NULL, 0);
+			break;
+		case 'a':
+			alignsize = strtol(optarg, NULL, 0);
+			if (!is_power_of_2(alignsize))
+				die("Invalid argument \"%d\" to -a option\n",
+				    alignsize);
+			break;
+		case 'f':
+			force = true;
+			break;
+		case 'q':
+			quiet++;
+			break;
+		case 'b':
+			cmdline_boot_cpuid = strtoll(optarg, NULL, 0);
+			break;
+		case 'i':
+			srcfile_add_search_path(optarg);
+			break;
+		case 'v':
+			util_version();
+		case 'H':
+			if (streq(optarg, "legacy"))
+				phandle_format = PHANDLE_LEGACY;
+			else if (streq(optarg, "epapr"))
+				phandle_format = PHANDLE_EPAPR;
+			else if (streq(optarg, "both"))
+				phandle_format = PHANDLE_BOTH;
+			else
+				die("Invalid argument \"%s\" to -H option\n",
+				    optarg);
+			break;
+
+		case 's':
+			sort = true;
+			break;
+
+		case 'W':
+			parse_checks_option(true, false, optarg);
+			break;
+
+		case 'E':
+			parse_checks_option(false, true, optarg);
+			break;
+
+		case '@':
+			generate_symbols = 1;
+			break;
+		case 'A':
+			auto_label_aliases = 1;
+			break;
+
+		case 'h':
+			usage(NULL);
+		default:
+			usage("unknown option");
+		}
+	}
+
+	if (argc > (optind+1))
+		usage("missing files");
+	else if (argc < (optind+1))
+		arg = "-";
+	else
+		arg = argv[optind];
+
+	/* minsize and padsize are mutually exclusive */
+	if (minsize && padsize)
+		die("Can't set both -p and -S\n");
+
+	if (depname) {
+		depfile = fopen(depname, "w");
+		if (!depfile)
+			die("Couldn't open dependency file %s: %s\n", depname,
+			    strerror(errno));
+		fprintf(depfile, "%s:", outname);
+	}
+
+	if (inform == NULL)
+		inform = guess_input_format(arg, "dts");
+	if (outform == NULL) {
+		outform = guess_type_by_name(outname, NULL);
+		if (outform == NULL) {
+			if (streq(inform, "dts"))
+				outform = "dtb";
+			else
+				outform = "dts";
+		}
+	}
+	if (streq(inform, "dts"))
+		dti = dt_from_source(arg);
+	else if (streq(inform, "fs"))
+		dti = dt_from_fs(arg);
+	else if(streq(inform, "dtb"))
+		dti = dt_from_blob(arg);
+	else
+		die("Unknown input format \"%s\"\n", inform);
+
+	dti->outname = outname;
+
+	if (depfile) {
+		fputc('\n', depfile);
+		fclose(depfile);
+	}
+
+	if (cmdline_boot_cpuid != -1)
+		dti->boot_cpuid_phys = cmdline_boot_cpuid;
+
+	fill_fullpaths(dti->dt, "");
+	process_checks(force, dti);
+
+	/* on a plugin, generate by default */
+	if (dti->dtsflags & DTSF_PLUGIN) {
+		generate_fixups = 1;
+	}
+
+	if (auto_label_aliases)
+		generate_label_tree(dti, "aliases", false);
+
+	if (generate_symbols)
+		generate_label_tree(dti, "__symbols__", true);
+
+	if (generate_fixups) {
+		generate_fixups_tree(dti, "__fixups__");
+		generate_local_fixups_tree(dti, "__local_fixups__");
+	}
+
+	if (sort)
+		sort_tree(dti);
+
+	if (streq(outname, "-")) {
+		outf = stdout;
+	} else {
+		outf = fopen(outname, "wb");
+		if (! outf)
+			die("Couldn't open output file %s: %s\n",
+			    outname, strerror(errno));
+	}
+
+	if (streq(outform, "dts")) {
+		dt_to_source(outf, dti);
+	} else if (streq(outform, "dtb")) {
+		dt_to_blob(outf, dti, outversion);
+	} else if (streq(outform, "asm")) {
+		dt_to_asm(outf, dti, outversion);
+	} else if (streq(outform, "null")) {
+		/* do nothing */
+	} else {
+		die("Unknown output format \"%s\"\n", outform);
+	}
+
+	exit(0);
+}
diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h
new file mode 100644
index 0000000000..1ac2a1e3a4
--- /dev/null
+++ b/scripts/dtc/dtc.h
@@ -0,0 +1,285 @@
+#ifndef _DTC_H
+#define _DTC_H
+
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdarg.h>
+#include <assert.h>
+#include <ctype.h>
+#include <errno.h>
+#include <unistd.h>
+
+#include <libfdt_env.h>
+#include <fdt.h>
+
+#include "util.h"
+
+#ifdef DEBUG
+#define debug(...)	printf(__VA_ARGS__)
+#else
+#define debug(...)
+#endif
+
+
+#define DEFAULT_FDT_VERSION	17
+
+/*
+ * Command line options
+ */
+extern int quiet;		/* Level of quietness */
+extern int reservenum;		/* Number of memory reservation slots */
+extern int minsize;		/* Minimum blob size */
+extern int padsize;		/* Additional padding to blob */
+extern int alignsize;		/* Additional padding to blob accroding to the alignsize */
+extern int phandle_format;	/* Use linux,phandle or phandle properties */
+extern int generate_symbols;	/* generate symbols for nodes with labels */
+extern int generate_fixups;	/* generate fixups */
+extern int auto_label_aliases;	/* auto generate labels -> aliases */
+
+#define PHANDLE_LEGACY	0x1
+#define PHANDLE_EPAPR	0x2
+#define PHANDLE_BOTH	0x3
+
+typedef uint32_t cell_t;
+
+
+#define streq(a, b)	(strcmp((a), (b)) == 0)
+#define strneq(a, b, n)	(strncmp((a), (b), (n)) == 0)
+
+#define ALIGN(x, a)	(((x) + (a) - 1) & ~((a) - 1))
+
+/* Data blobs */
+enum markertype {
+	REF_PHANDLE,
+	REF_PATH,
+	LABEL,
+};
+
+struct  marker {
+	enum markertype type;
+	int offset;
+	char *ref;
+	struct marker *next;
+};
+
+struct data {
+	int len;
+	char *val;
+	struct marker *markers;
+};
+
+
+#define empty_data ((struct data){ 0 /* all .members = 0 or NULL */ })
+
+#define for_each_marker(m) \
+	for (; (m); (m) = (m)->next)
+#define for_each_marker_of_type(m, t) \
+	for_each_marker(m) \
+		if ((m)->type == (t))
+
+void data_free(struct data d);
+
+struct data data_grow_for(struct data d, int xlen);
+
+struct data data_copy_mem(const char *mem, int len);
+struct data data_copy_escape_string(const char *s, int len);
+struct data data_copy_file(FILE *f, size_t len);
+
+struct data data_append_data(struct data d, const void *p, int len);
+struct data data_insert_at_marker(struct data d, struct marker *m,
+				  const void *p, int len);
+struct data data_merge(struct data d1, struct data d2);
+struct data data_append_cell(struct data d, cell_t word);
+struct data data_append_integer(struct data d, uint64_t word, int bits);
+struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
+struct data data_append_addr(struct data d, uint64_t addr);
+struct data data_append_byte(struct data d, uint8_t byte);
+struct data data_append_zeroes(struct data d, int len);
+struct data data_append_align(struct data d, int align);
+
+struct data data_add_marker(struct data d, enum markertype type, char *ref);
+
+bool data_is_one_string(struct data d);
+
+/* DT constraints */
+
+#define MAX_PROPNAME_LEN	31
+#define MAX_NODENAME_LEN	31
+
+/* Live trees */
+struct label {
+	bool deleted;
+	char *label;
+	struct label *next;
+};
+
+struct property {
+	bool deleted;
+	char *name;
+	struct data val;
+
+	struct property *next;
+
+	struct label *labels;
+};
+
+struct node {
+	bool deleted;
+	char *name;
+	struct property *proplist;
+	struct node *children;
+
+	struct node *parent;
+	struct node *next_sibling;
+
+	char *fullpath;
+	int basenamelen;
+
+	cell_t phandle;
+	int addr_cells, size_cells;
+
+	struct label *labels;
+};
+
+#define for_each_label_withdel(l0, l) \
+	for ((l) = (l0); (l); (l) = (l)->next)
+
+#define for_each_label(l0, l) \
+	for_each_label_withdel(l0, l) \
+		if (!(l)->deleted)
+
+#define for_each_property_withdel(n, p) \
+	for ((p) = (n)->proplist; (p); (p) = (p)->next)
+
+#define for_each_property(n, p) \
+	for_each_property_withdel(n, p) \
+		if (!(p)->deleted)
+
+#define for_each_child_withdel(n, c) \
+	for ((c) = (n)->children; (c); (c) = (c)->next_sibling)
+
+#define for_each_child(n, c) \
+	for_each_child_withdel(n, c) \
+		if (!(c)->deleted)
+
+void add_label(struct label **labels, char *label);
+void delete_labels(struct label **labels);
+
+struct property *build_property(char *name, struct data val);
+struct property *build_property_delete(char *name);
+struct property *chain_property(struct property *first, struct property *list);
+struct property *reverse_properties(struct property *first);
+
+struct node *build_node(struct property *proplist, struct node *children);
+struct node *build_node_delete(void);
+struct node *name_node(struct node *node, char *name);
+struct node *chain_node(struct node *first, struct node *list);
+struct node *merge_nodes(struct node *old_node, struct node *new_node);
+
+void add_property(struct node *node, struct property *prop);
+void delete_property_by_name(struct node *node, char *name);
+void delete_property(struct property *prop);
+void add_child(struct node *parent, struct node *child);
+void delete_node_by_name(struct node *parent, char *name);
+void delete_node(struct node *node);
+void append_to_property(struct node *node,
+			char *name, const void *data, int len);
+
+const char *get_unitname(struct node *node);
+struct property *get_property(struct node *node, const char *propname);
+cell_t propval_cell(struct property *prop);
+struct property *get_property_by_label(struct node *tree, const char *label,
+				       struct node **node);
+struct marker *get_marker_label(struct node *tree, const char *label,
+				struct node **node, struct property **prop);
+struct node *get_subnode(struct node *node, const char *nodename);
+struct node *get_node_by_path(struct node *tree, const char *path);
+struct node *get_node_by_label(struct node *tree, const char *label);
+struct node *get_node_by_phandle(struct node *tree, cell_t phandle);
+struct node *get_node_by_ref(struct node *tree, const char *ref);
+cell_t get_node_phandle(struct node *root, struct node *node);
+
+uint32_t guess_boot_cpuid(struct node *tree);
+
+/* Boot info (tree plus memreserve information */
+
+struct reserve_info {
+	struct fdt_reserve_entry re;
+
+	struct reserve_info *next;
+
+	struct label *labels;
+};
+
+struct reserve_info *build_reserve_entry(uint64_t start, uint64_t len);
+struct reserve_info *chain_reserve_entry(struct reserve_info *first,
+					 struct reserve_info *list);
+struct reserve_info *add_reserve_entry(struct reserve_info *list,
+				       struct reserve_info *new);
+
+
+struct dt_info {
+	unsigned int dtsflags;
+	struct reserve_info *reservelist;
+	uint32_t boot_cpuid_phys;
+	struct node *dt;		/* the device tree */
+	const char *outname;		/* filename being written to, "-" for stdout */
+};
+
+/* DTS version flags definitions */
+#define DTSF_V1		0x0001	/* /dts-v1/ */
+#define DTSF_PLUGIN	0x0002	/* /plugin/ */
+
+struct dt_info *build_dt_info(unsigned int dtsflags,
+			      struct reserve_info *reservelist,
+			      struct node *tree, uint32_t boot_cpuid_phys);
+void sort_tree(struct dt_info *dti);
+void generate_label_tree(struct dt_info *dti, char *name, bool allocph);
+void generate_fixups_tree(struct dt_info *dti, char *name);
+void generate_local_fixups_tree(struct dt_info *dti, char *name);
+
+/* Checks */
+
+void parse_checks_option(bool warn, bool error, const char *arg);
+void process_checks(bool force, struct dt_info *dti);
+
+/* Flattened trees */
+
+void dt_to_blob(FILE *f, struct dt_info *dti, int version);
+void dt_to_asm(FILE *f, struct dt_info *dti, int version);
+
+struct dt_info *dt_from_blob(const char *fname);
+
+/* Tree source */
+
+void dt_to_source(FILE *f, struct dt_info *dti);
+struct dt_info *dt_from_source(const char *f);
+
+/* FS trees */
+
+struct dt_info *dt_from_fs(const char *dirname);
+
+#endif /* _DTC_H */
diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c
new file mode 100644
index 0000000000..ebac548b3f
--- /dev/null
+++ b/scripts/dtc/flattree.c
@@ -0,0 +1,946 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+#include "srcpos.h"
+
+#define FTF_FULLPATH	0x1
+#define FTF_VARALIGN	0x2
+#define FTF_NAMEPROPS	0x4
+#define FTF_BOOTCPUID	0x8
+#define FTF_STRTABSIZE	0x10
+#define FTF_STRUCTSIZE	0x20
+#define FTF_NOPS	0x40
+
+static struct version_info {
+	int version;
+	int last_comp_version;
+	int hdr_size;
+	int flags;
+} version_table[] = {
+	{1, 1, FDT_V1_SIZE,
+	 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS},
+	{2, 1, FDT_V2_SIZE,
+	 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID},
+	{3, 1, FDT_V3_SIZE,
+	 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID|FTF_STRTABSIZE},
+	{16, 16, FDT_V3_SIZE,
+	 FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_NOPS},
+	{17, 16, FDT_V17_SIZE,
+	 FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_STRUCTSIZE|FTF_NOPS},
+};
+
+struct emitter {
+	void (*cell)(void *, cell_t);
+	void (*string)(void *, char *, int);
+	void (*align)(void *, int);
+	void (*data)(void *, struct data);
+	void (*beginnode)(void *, struct label *labels);
+	void (*endnode)(void *, struct label *labels);
+	void (*property)(void *, struct label *labels);
+};
+
+static void bin_emit_cell(void *e, cell_t val)
+{
+	struct data *dtbuf = e;
+
+	*dtbuf = data_append_cell(*dtbuf, val);
+}
+
+static void bin_emit_string(void *e, char *str, int len)
+{
+	struct data *dtbuf = e;
+
+	if (len == 0)
+		len = strlen(str);
+
+	*dtbuf = data_append_data(*dtbuf, str, len);
+	*dtbuf = data_append_byte(*dtbuf, '\0');
+}
+
+static void bin_emit_align(void *e, int a)
+{
+	struct data *dtbuf = e;
+
+	*dtbuf = data_append_align(*dtbuf, a);
+}
+
+static void bin_emit_data(void *e, struct data d)
+{
+	struct data *dtbuf = e;
+
+	*dtbuf = data_append_data(*dtbuf, d.val, d.len);
+}
+
+static void bin_emit_beginnode(void *e, struct label *labels)
+{
+	bin_emit_cell(e, FDT_BEGIN_NODE);
+}
+
+static void bin_emit_endnode(void *e, struct label *labels)
+{
+	bin_emit_cell(e, FDT_END_NODE);
+}
+
+static void bin_emit_property(void *e, struct label *labels)
+{
+	bin_emit_cell(e, FDT_PROP);
+}
+
+static struct emitter bin_emitter = {
+	.cell = bin_emit_cell,
+	.string = bin_emit_string,
+	.align = bin_emit_align,
+	.data = bin_emit_data,
+	.beginnode = bin_emit_beginnode,
+	.endnode = bin_emit_endnode,
+	.property = bin_emit_property,
+};
+
+static void emit_label(FILE *f, const char *prefix, const char *label)
+{
+	fprintf(f, "\t.globl\t%s_%s\n", prefix, label);
+	fprintf(f, "%s_%s:\n", prefix, label);
+	fprintf(f, "_%s_%s:\n", prefix, label);
+}
+
+static void emit_offset_label(FILE *f, const char *label, int offset)
+{
+	fprintf(f, "\t.globl\t%s\n", label);
+	fprintf(f, "%s\t= . + %d\n", label, offset);
+}
+
+#define ASM_EMIT_BELONG(f, fmt, ...) \
+	{ \
+		fprintf((f), "\t.byte\t((" fmt ") >> 24) & 0xff\n", __VA_ARGS__); \
+		fprintf((f), "\t.byte\t((" fmt ") >> 16) & 0xff\n", __VA_ARGS__); \
+		fprintf((f), "\t.byte\t((" fmt ") >> 8) & 0xff\n", __VA_ARGS__); \
+		fprintf((f), "\t.byte\t(" fmt ") & 0xff\n", __VA_ARGS__); \
+	}
+
+static void asm_emit_cell(void *e, cell_t val)
+{
+	FILE *f = e;
+
+	fprintf(f, "\t.byte 0x%02x; .byte 0x%02x; .byte 0x%02x; .byte 0x%02x\n",
+		(val >> 24) & 0xff, (val >> 16) & 0xff,
+		(val >> 8) & 0xff, val & 0xff);
+}
+
+static void asm_emit_string(void *e, char *str, int len)
+{
+	FILE *f = e;
+	char c = 0;
+
+	if (len != 0) {
+		/* XXX: ewww */
+		c = str[len];
+		str[len] = '\0';
+	}
+
+	fprintf(f, "\t.string\t\"%s\"\n", str);
+
+	if (len != 0) {
+		str[len] = c;
+	}
+}
+
+static void asm_emit_align(void *e, int a)
+{
+	FILE *f = e;
+
+	fprintf(f, "\t.balign\t%d, 0\n", a);
+}
+
+static void asm_emit_data(void *e, struct data d)
+{
+	FILE *f = e;
+	int off = 0;
+	struct marker *m = d.markers;
+
+	for_each_marker_of_type(m, LABEL)
+		emit_offset_label(f, m->ref, m->offset);
+
+	while ((d.len - off) >= sizeof(uint32_t)) {
+		asm_emit_cell(e, fdt32_to_cpu(*((uint32_t *)(d.val+off))));
+		off += sizeof(uint32_t);
+	}
+
+	while ((d.len - off) >= 1) {
+		fprintf(f, "\t.byte\t0x%hhx\n", d.val[off]);
+		off += 1;
+	}
+
+	assert(off == d.len);
+}
+
+static void asm_emit_beginnode(void *e, struct label *labels)
+{
+	FILE *f = e;
+	struct label *l;
+
+	for_each_label(labels, l) {
+		fprintf(f, "\t.globl\t%s\n", l->label);
+		fprintf(f, "%s:\n", l->label);
+	}
+	fprintf(f, "\t/* FDT_BEGIN_NODE */\n");
+	asm_emit_cell(e, FDT_BEGIN_NODE);
+}
+
+static void asm_emit_endnode(void *e, struct label *labels)
+{
+	FILE *f = e;
+	struct label *l;
+
+	fprintf(f, "\t/* FDT_END_NODE */\n");
+	asm_emit_cell(e, FDT_END_NODE);
+	for_each_label(labels, l) {
+		fprintf(f, "\t.globl\t%s_end\n", l->label);
+		fprintf(f, "%s_end:\n", l->label);
+	}
+}
+
+static void asm_emit_property(void *e, struct label *labels)
+{
+	FILE *f = e;
+	struct label *l;
+
+	for_each_label(labels, l) {
+		fprintf(f, "\t.globl\t%s\n", l->label);
+		fprintf(f, "%s:\n", l->label);
+	}
+	fprintf(f, "\t/* FDT_PROP */\n");
+	asm_emit_cell(e, FDT_PROP);
+}
+
+static struct emitter asm_emitter = {
+	.cell = asm_emit_cell,
+	.string = asm_emit_string,
+	.align = asm_emit_align,
+	.data = asm_emit_data,
+	.beginnode = asm_emit_beginnode,
+	.endnode = asm_emit_endnode,
+	.property = asm_emit_property,
+};
+
+static int stringtable_insert(struct data *d, const char *str)
+{
+	int i;
+
+	/* FIXME: do this more efficiently? */
+
+	for (i = 0; i < d->len; i++) {
+		if (streq(str, d->val + i))
+			return i;
+	}
+
+	*d = data_append_data(*d, str, strlen(str)+1);
+	return i;
+}
+
+static void flatten_tree(struct node *tree, struct emitter *emit,
+			 void *etarget, struct data *strbuf,
+			 struct version_info *vi)
+{
+	struct property *prop;
+	struct node *child;
+	bool seen_name_prop = false;
+
+	if (tree->deleted)
+		return;
+
+	emit->beginnode(etarget, tree->labels);
+
+	if (vi->flags & FTF_FULLPATH)
+		emit->string(etarget, tree->fullpath, 0);
+	else
+		emit->string(etarget, tree->name, 0);
+
+	emit->align(etarget, sizeof(cell_t));
+
+	for_each_property(tree, prop) {
+		int nameoff;
+
+		if (streq(prop->name, "name"))
+			seen_name_prop = true;
+
+		nameoff = stringtable_insert(strbuf, prop->name);
+
+		emit->property(etarget, prop->labels);
+		emit->cell(etarget, prop->val.len);
+		emit->cell(etarget, nameoff);
+
+		if ((vi->flags & FTF_VARALIGN) && (prop->val.len >= 8))
+			emit->align(etarget, 8);
+
+		emit->data(etarget, prop->val);
+		emit->align(etarget, sizeof(cell_t));
+	}
+
+	if ((vi->flags & FTF_NAMEPROPS) && !seen_name_prop) {
+		emit->property(etarget, NULL);
+		emit->cell(etarget, tree->basenamelen+1);
+		emit->cell(etarget, stringtable_insert(strbuf, "name"));
+
+		if ((vi->flags & FTF_VARALIGN) && ((tree->basenamelen+1) >= 8))
+			emit->align(etarget, 8);
+
+		emit->string(etarget, tree->name, tree->basenamelen);
+		emit->align(etarget, sizeof(cell_t));
+	}
+
+	for_each_child(tree, child) {
+		flatten_tree(child, emit, etarget, strbuf, vi);
+	}
+
+	emit->endnode(etarget, tree->labels);
+}
+
+static struct data flatten_reserve_list(struct reserve_info *reservelist,
+				 struct version_info *vi)
+{
+	struct reserve_info *re;
+	struct data d = empty_data;
+	static struct fdt_reserve_entry null_re = {0,0};
+	int    j;
+
+	for (re = reservelist; re; re = re->next) {
+		d = data_append_re(d, &re->re);
+	}
+	/*
+	 * Add additional reserved slots if the user asked for them.
+	 */
+	for (j = 0; j < reservenum; j++) {
+		d = data_append_re(d, &null_re);
+	}
+
+	return d;
+}
+
+static void make_fdt_header(struct fdt_header *fdt,
+			    struct version_info *vi,
+			    int reservesize, int dtsize, int strsize,
+			    int boot_cpuid_phys)
+{
+	int reserve_off;
+
+	reservesize += sizeof(struct fdt_reserve_entry);
+
+	memset(fdt, 0xff, sizeof(*fdt));
+
+	fdt->magic = cpu_to_fdt32(FDT_MAGIC);
+	fdt->version = cpu_to_fdt32(vi->version);
+	fdt->last_comp_version = cpu_to_fdt32(vi->last_comp_version);
+
+	/* Reserve map should be doubleword aligned */
+	reserve_off = ALIGN(vi->hdr_size, 8);
+
+	fdt->off_mem_rsvmap = cpu_to_fdt32(reserve_off);
+	fdt->off_dt_struct = cpu_to_fdt32(reserve_off + reservesize);
+	fdt->off_dt_strings = cpu_to_fdt32(reserve_off + reservesize
+					  + dtsize);
+	fdt->totalsize = cpu_to_fdt32(reserve_off + reservesize + dtsize + strsize);
+
+	if (vi->flags & FTF_BOOTCPUID)
+		fdt->boot_cpuid_phys = cpu_to_fdt32(boot_cpuid_phys);
+	if (vi->flags & FTF_STRTABSIZE)
+		fdt->size_dt_strings = cpu_to_fdt32(strsize);
+	if (vi->flags & FTF_STRUCTSIZE)
+		fdt->size_dt_struct = cpu_to_fdt32(dtsize);
+}
+
+void dt_to_blob(FILE *f, struct dt_info *dti, int version)
+{
+	struct version_info *vi = NULL;
+	int i;
+	struct data blob       = empty_data;
+	struct data reservebuf = empty_data;
+	struct data dtbuf      = empty_data;
+	struct data strbuf     = empty_data;
+	struct fdt_header fdt;
+	int padlen = 0;
+
+	for (i = 0; i < ARRAY_SIZE(version_table); i++) {
+		if (version_table[i].version == version)
+			vi = &version_table[i];
+	}
+	if (!vi)
+		die("Unknown device tree blob version %d\n", version);
+
+	flatten_tree(dti->dt, &bin_emitter, &dtbuf, &strbuf, vi);
+	bin_emit_cell(&dtbuf, FDT_END);
+
+	reservebuf = flatten_reserve_list(dti->reservelist, vi);
+
+	/* Make header */
+	make_fdt_header(&fdt, vi, reservebuf.len, dtbuf.len, strbuf.len,
+			dti->boot_cpuid_phys);
+
+	/*
+	 * If the user asked for more space than is used, adjust the totalsize.
+	 */
+	if (minsize > 0) {
+		padlen = minsize - fdt32_to_cpu(fdt.totalsize);
+		if (padlen < 0) {
+			padlen = 0;
+			if (quiet < 1)
+				fprintf(stderr,
+					"Warning: blob size %d >= minimum size %d\n",
+					fdt32_to_cpu(fdt.totalsize), minsize);
+		}
+	}
+
+	if (padsize > 0)
+		padlen = padsize;
+
+	if (alignsize > 0)
+		padlen = ALIGN(fdt32_to_cpu(fdt.totalsize) + padlen, alignsize)
+			- fdt32_to_cpu(fdt.totalsize);
+
+	if (padlen > 0) {
+		int tsize = fdt32_to_cpu(fdt.totalsize);
+		tsize += padlen;
+		fdt.totalsize = cpu_to_fdt32(tsize);
+	}
+
+	/*
+	 * Assemble the blob: start with the header, add with alignment
+	 * the reserve buffer, add the reserve map terminating zeroes,
+	 * the device tree itself, and finally the strings.
+	 */
+	blob = data_append_data(blob, &fdt, vi->hdr_size);
+	blob = data_append_align(blob, 8);
+	blob = data_merge(blob, reservebuf);
+	blob = data_append_zeroes(blob, sizeof(struct fdt_reserve_entry));
+	blob = data_merge(blob, dtbuf);
+	blob = data_merge(blob, strbuf);
+
+	/*
+	 * If the user asked for more space than is used, pad out the blob.
+	 */
+	if (padlen > 0)
+		blob = data_append_zeroes(blob, padlen);
+
+	if (fwrite(blob.val, blob.len, 1, f) != 1) {
+		if (ferror(f))
+			die("Error writing device tree blob: %s\n",
+			    strerror(errno));
+		else
+			die("Short write on device tree blob\n");
+	}
+
+	/*
+	 * data_merge() frees the right-hand element so only the blob
+	 * remains to be freed.
+	 */
+	data_free(blob);
+}
+
+static void dump_stringtable_asm(FILE *f, struct data strbuf)
+{
+	const char *p;
+	int len;
+
+	p = strbuf.val;
+
+	while (p < (strbuf.val + strbuf.len)) {
+		len = strlen(p);
+		fprintf(f, "\t.string \"%s\"\n", p);
+		p += len+1;
+	}
+}
+
+void dt_to_asm(FILE *f, struct dt_info *dti, int version)
+{
+	struct version_info *vi = NULL;
+	int i;
+	struct data strbuf = empty_data;
+	struct reserve_info *re;
+	const char *symprefix = "dt";
+
+	for (i = 0; i < ARRAY_SIZE(version_table); i++) {
+		if (version_table[i].version == version)
+			vi = &version_table[i];
+	}
+	if (!vi)
+		die("Unknown device tree blob version %d\n", version);
+
+	fprintf(f, "/* autogenerated by dtc, do not edit */\n\n");
+
+	emit_label(f, symprefix, "blob_start");
+	emit_label(f, symprefix, "header");
+	fprintf(f, "\t/* magic */\n");
+	asm_emit_cell(f, FDT_MAGIC);
+	fprintf(f, "\t/* totalsize */\n");
+	ASM_EMIT_BELONG(f, "_%s_blob_abs_end - _%s_blob_start",
+			symprefix, symprefix);
+	fprintf(f, "\t/* off_dt_struct */\n");
+	ASM_EMIT_BELONG(f, "_%s_struct_start - _%s_blob_start",
+		symprefix, symprefix);
+	fprintf(f, "\t/* off_dt_strings */\n");
+	ASM_EMIT_BELONG(f, "_%s_strings_start - _%s_blob_start",
+		symprefix, symprefix);
+	fprintf(f, "\t/* off_mem_rsvmap */\n");
+	ASM_EMIT_BELONG(f, "_%s_reserve_map - _%s_blob_start",
+		symprefix, symprefix);
+	fprintf(f, "\t/* version */\n");
+	asm_emit_cell(f, vi->version);
+	fprintf(f, "\t/* last_comp_version */\n");
+	asm_emit_cell(f, vi->last_comp_version);
+
+	if (vi->flags & FTF_BOOTCPUID) {
+		fprintf(f, "\t/* boot_cpuid_phys */\n");
+		asm_emit_cell(f, dti->boot_cpuid_phys);
+	}
+
+	if (vi->flags & FTF_STRTABSIZE) {
+		fprintf(f, "\t/* size_dt_strings */\n");
+		ASM_EMIT_BELONG(f, "_%s_strings_end - _%s_strings_start",
+				symprefix, symprefix);
+	}
+
+	if (vi->flags & FTF_STRUCTSIZE) {
+		fprintf(f, "\t/* size_dt_struct */\n");
+		ASM_EMIT_BELONG(f, "_%s_struct_end - _%s_struct_start",
+			symprefix, symprefix);
+	}
+
+	/*
+	 * Reserve map entries.
+	 * Align the reserve map to a doubleword boundary.
+	 * Each entry is an (address, size) pair of u64 values.
+	 * Always supply a zero-sized temination entry.
+	 */
+	asm_emit_align(f, 8);
+	emit_label(f, symprefix, "reserve_map");
+
+	fprintf(f, "/* Memory reserve map from source file */\n");
+
+	/*
+	 * Use .long on high and low halfs of u64s to avoid .quad
+	 * as it appears .quad isn't available in some assemblers.
+	 */
+	for (re = dti->reservelist; re; re = re->next) {
+		struct label *l;
+
+		for_each_label(re->labels, l) {
+			fprintf(f, "\t.globl\t%s\n", l->label);
+			fprintf(f, "%s:\n", l->label);
+		}
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.address >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x",
+				(unsigned int)(re->re.address & 0xffffffff));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size >> 32));
+		ASM_EMIT_BELONG(f, "0x%08x", (unsigned int)(re->re.size & 0xffffffff));
+	}
+	for (i = 0; i < reservenum; i++) {
+		fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
+	}
+
+	fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
+
+	emit_label(f, symprefix, "struct_start");
+	flatten_tree(dti->dt, &asm_emitter, f, &strbuf, vi);
+
+	fprintf(f, "\t/* FDT_END */\n");
+	asm_emit_cell(f, FDT_END);
+	emit_label(f, symprefix, "struct_end");
+
+	emit_label(f, symprefix, "strings_start");
+	dump_stringtable_asm(f, strbuf);
+	emit_label(f, symprefix, "strings_end");
+
+	emit_label(f, symprefix, "blob_end");
+
+	/*
+	 * If the user asked for more space than is used, pad it out.
+	 */
+	if (minsize > 0) {
+		fprintf(f, "\t.space\t%d - (_%s_blob_end - _%s_blob_start), 0\n",
+			minsize, symprefix, symprefix);
+	}
+	if (padsize > 0) {
+		fprintf(f, "\t.space\t%d, 0\n", padsize);
+	}
+	if (alignsize > 0)
+		asm_emit_align(f, alignsize);
+	emit_label(f, symprefix, "blob_abs_end");
+
+	data_free(strbuf);
+}
+
+struct inbuf {
+	char *base, *limit, *ptr;
+};
+
+static void inbuf_init(struct inbuf *inb, void *base, void *limit)
+{
+	inb->base = base;
+	inb->limit = limit;
+	inb->ptr = inb->base;
+}
+
+static void flat_read_chunk(struct inbuf *inb, void *p, int len)
+{
+	if ((inb->ptr + len) > inb->limit)
+		die("Premature end of data parsing flat device tree\n");
+
+	memcpy(p, inb->ptr, len);
+
+	inb->ptr += len;
+}
+
+static uint32_t flat_read_word(struct inbuf *inb)
+{
+	uint32_t val;
+
+	assert(((inb->ptr - inb->base) % sizeof(val)) == 0);
+
+	flat_read_chunk(inb, &val, sizeof(val));
+
+	return fdt32_to_cpu(val);
+}
+
+static void flat_realign(struct inbuf *inb, int align)
+{
+	int off = inb->ptr - inb->base;
+
+	inb->ptr = inb->base + ALIGN(off, align);
+	if (inb->ptr > inb->limit)
+		die("Premature end of data parsing flat device tree\n");
+}
+
+static char *flat_read_string(struct inbuf *inb)
+{
+	int len = 0;
+	const char *p = inb->ptr;
+	char *str;
+
+	do {
+		if (p >= inb->limit)
+			die("Premature end of data parsing flat device tree\n");
+		len++;
+	} while ((*p++) != '\0');
+
+	str = xstrdup(inb->ptr);
+
+	inb->ptr += len;
+
+	flat_realign(inb, sizeof(uint32_t));
+
+	return str;
+}
+
+static struct data flat_read_data(struct inbuf *inb, int len)
+{
+	struct data d = empty_data;
+
+	if (len == 0)
+		return empty_data;
+
+	d = data_grow_for(d, len);
+	d.len = len;
+
+	flat_read_chunk(inb, d.val, len);
+
+	flat_realign(inb, sizeof(uint32_t));
+
+	return d;
+}
+
+static char *flat_read_stringtable(struct inbuf *inb, int offset)
+{
+	const char *p;
+
+	p = inb->base + offset;
+	while (1) {
+		if (p >= inb->limit || p < inb->base)
+			die("String offset %d overruns string table\n",
+			    offset);
+
+		if (*p == '\0')
+			break;
+
+		p++;
+	}
+
+	return xstrdup(inb->base + offset);
+}
+
+static struct property *flat_read_property(struct inbuf *dtbuf,
+					   struct inbuf *strbuf, int flags)
+{
+	uint32_t proplen, stroff;
+	char *name;
+	struct data val;
+
+	proplen = flat_read_word(dtbuf);
+	stroff = flat_read_word(dtbuf);
+
+	name = flat_read_stringtable(strbuf, stroff);
+
+	if ((flags & FTF_VARALIGN) && (proplen >= 8))
+		flat_realign(dtbuf, 8);
+
+	val = flat_read_data(dtbuf, proplen);
+
+	return build_property(name, val);
+}
+
+
+static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb)
+{
+	struct reserve_info *reservelist = NULL;
+	struct reserve_info *new;
+	struct fdt_reserve_entry re;
+
+	/*
+	 * Each entry is a pair of u64 (addr, size) values for 4 cell_t's.
+	 * List terminates at an entry with size equal to zero.
+	 *
+	 * First pass, count entries.
+	 */
+	while (1) {
+		flat_read_chunk(inb, &re, sizeof(re));
+		re.address  = fdt64_to_cpu(re.address);
+		re.size = fdt64_to_cpu(re.size);
+		if (re.size == 0)
+			break;
+
+		new = build_reserve_entry(re.address, re.size);
+		reservelist = add_reserve_entry(reservelist, new);
+	}
+
+	return reservelist;
+}
+
+
+static char *nodename_from_path(const char *ppath, const char *cpath)
+{
+	int plen;
+
+	plen = strlen(ppath);
+
+	if (!strneq(ppath, cpath, plen))
+		die("Path \"%s\" is not valid as a child of \"%s\"\n",
+		    cpath, ppath);
+
+	/* root node is a special case */
+	if (!streq(ppath, "/"))
+		plen++;
+
+	return xstrdup(cpath + plen);
+}
+
+static struct node *unflatten_tree(struct inbuf *dtbuf,
+				   struct inbuf *strbuf,
+				   const char *parent_flatname, int flags)
+{
+	struct node *node;
+	char *flatname;
+	uint32_t val;
+
+	node = build_node(NULL, NULL);
+
+	flatname = flat_read_string(dtbuf);
+
+	if (flags & FTF_FULLPATH)
+		node->name = nodename_from_path(parent_flatname, flatname);
+	else
+		node->name = flatname;
+
+	do {
+		struct property *prop;
+		struct node *child;
+
+		val = flat_read_word(dtbuf);
+		switch (val) {
+		case FDT_PROP:
+			if (node->children)
+				fprintf(stderr, "Warning: Flat tree input has "
+					"subnodes preceding a property.\n");
+			prop = flat_read_property(dtbuf, strbuf, flags);
+			add_property(node, prop);
+			break;
+
+		case FDT_BEGIN_NODE:
+			child = unflatten_tree(dtbuf,strbuf, flatname, flags);
+			add_child(node, child);
+			break;
+
+		case FDT_END_NODE:
+			break;
+
+		case FDT_END:
+			die("Premature FDT_END in device tree blob\n");
+			break;
+
+		case FDT_NOP:
+			if (!(flags & FTF_NOPS))
+				fprintf(stderr, "Warning: NOP tag found in flat tree"
+					" version <16\n");
+
+			/* Ignore */
+			break;
+
+		default:
+			die("Invalid opcode word %08x in device tree blob\n",
+			    val);
+		}
+	} while (val != FDT_END_NODE);
+
+	if (node->name != flatname) {
+		free(flatname);
+	}
+
+	return node;
+}
+
+
+struct dt_info *dt_from_blob(const char *fname)
+{
+	FILE *f;
+	uint32_t magic, totalsize, version, size_dt, boot_cpuid_phys;
+	uint32_t off_dt, off_str, off_mem_rsvmap;
+	int rc;
+	char *blob;
+	struct fdt_header *fdt;
+	char *p;
+	struct inbuf dtbuf, strbuf;
+	struct inbuf memresvbuf;
+	int sizeleft;
+	struct reserve_info *reservelist;
+	struct node *tree;
+	uint32_t val;
+	int flags = 0;
+
+	f = srcfile_relative_open(fname, NULL);
+
+	rc = fread(&magic, sizeof(magic), 1, f);
+	if (ferror(f))
+		die("Error reading DT blob magic number: %s\n",
+		    strerror(errno));
+	if (rc < 1) {
+		if (feof(f))
+			die("EOF reading DT blob magic number\n");
+		else
+			die("Mysterious short read reading magic number\n");
+	}
+
+	magic = fdt32_to_cpu(magic);
+	if (magic != FDT_MAGIC)
+		die("Blob has incorrect magic number\n");
+
+	rc = fread(&totalsize, sizeof(totalsize), 1, f);
+	if (ferror(f))
+		die("Error reading DT blob size: %s\n", strerror(errno));
+	if (rc < 1) {
+		if (feof(f))
+			die("EOF reading DT blob size\n");
+		else
+			die("Mysterious short read reading blob size\n");
+	}
+
+	totalsize = fdt32_to_cpu(totalsize);
+	if (totalsize < FDT_V1_SIZE)
+		die("DT blob size (%d) is too small\n", totalsize);
+
+	blob = xmalloc(totalsize);
+
+	fdt = (struct fdt_header *)blob;
+	fdt->magic = cpu_to_fdt32(magic);
+	fdt->totalsize = cpu_to_fdt32(totalsize);
+
+	sizeleft = totalsize - sizeof(magic) - sizeof(totalsize);
+	p = blob + sizeof(magic)  + sizeof(totalsize);
+
+	while (sizeleft) {
+		if (feof(f))
+			die("EOF before reading %d bytes of DT blob\n",
+			    totalsize);
+
+		rc = fread(p, 1, sizeleft, f);
+		if (ferror(f))
+			die("Error reading DT blob: %s\n",
+			    strerror(errno));
+
+		sizeleft -= rc;
+		p += rc;
+	}
+
+	off_dt = fdt32_to_cpu(fdt->off_dt_struct);
+	off_str = fdt32_to_cpu(fdt->off_dt_strings);
+	off_mem_rsvmap = fdt32_to_cpu(fdt->off_mem_rsvmap);
+	version = fdt32_to_cpu(fdt->version);
+	boot_cpuid_phys = fdt32_to_cpu(fdt->boot_cpuid_phys);
+
+	if (off_mem_rsvmap >= totalsize)
+		die("Mem Reserve structure offset exceeds total size\n");
+
+	if (off_dt >= totalsize)
+		die("DT structure offset exceeds total size\n");
+
+	if (off_str > totalsize)
+		die("String table offset exceeds total size\n");
+
+	if (version >= 3) {
+		uint32_t size_str = fdt32_to_cpu(fdt->size_dt_strings);
+		if ((off_str+size_str < off_str) || (off_str+size_str > totalsize))
+			die("String table extends past total size\n");
+		inbuf_init(&strbuf, blob + off_str, blob + off_str + size_str);
+	} else {
+		inbuf_init(&strbuf, blob + off_str, blob + totalsize);
+	}
+
+	if (version >= 17) {
+		size_dt = fdt32_to_cpu(fdt->size_dt_struct);
+		if ((off_dt+size_dt < off_dt) || (off_dt+size_dt > totalsize))
+			die("Structure block extends past total size\n");
+	}
+
+	if (version < 16) {
+		flags |= FTF_FULLPATH | FTF_NAMEPROPS | FTF_VARALIGN;
+	} else {
+		flags |= FTF_NOPS;
+	}
+
+	inbuf_init(&memresvbuf,
+		   blob + off_mem_rsvmap, blob + totalsize);
+	inbuf_init(&dtbuf, blob + off_dt, blob + totalsize);
+
+	reservelist = flat_read_mem_reserve(&memresvbuf);
+
+	val = flat_read_word(&dtbuf);
+
+	if (val != FDT_BEGIN_NODE)
+		die("Device tree blob doesn't begin with FDT_BEGIN_NODE (begins with 0x%08x)\n", val);
+
+	tree = unflatten_tree(&dtbuf, &strbuf, "", flags);
+
+	val = flat_read_word(&dtbuf);
+	if (val != FDT_END)
+		die("Device tree blob doesn't end with FDT_END\n");
+
+	free(blob);
+
+	fclose(f);
+
+	return build_dt_info(DTSF_V1, reservelist, tree, boot_cpuid_phys);
+}
diff --git a/scripts/dtc/fstree.c b/scripts/dtc/fstree.c
new file mode 100644
index 0000000000..ae7d06c3c4
--- /dev/null
+++ b/scripts/dtc/fstree.c
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+#include <dirent.h>
+#include <sys/stat.h>
+
+static struct node *read_fstree(const char *dirname)
+{
+	DIR *d;
+	struct dirent *de;
+	struct stat st;
+	struct node *tree;
+
+	d = opendir(dirname);
+	if (!d)
+		die("Couldn't opendir() \"%s\": %s\n", dirname, strerror(errno));
+
+	tree = build_node(NULL, NULL);
+
+	while ((de = readdir(d)) != NULL) {
+		char *tmpname;
+
+		if (streq(de->d_name, ".")
+		    || streq(de->d_name, ".."))
+			continue;
+
+		tmpname = join_path(dirname, de->d_name);
+
+		if (lstat(tmpname, &st) < 0)
+			die("stat(%s): %s\n", tmpname, strerror(errno));
+
+		if (S_ISREG(st.st_mode)) {
+			struct property *prop;
+			FILE *pfile;
+
+			pfile = fopen(tmpname, "rb");
+			if (! pfile) {
+				fprintf(stderr,
+					"WARNING: Cannot open %s: %s\n",
+					tmpname, strerror(errno));
+			} else {
+				prop = build_property(xstrdup(de->d_name),
+						      data_copy_file(pfile,
+								     st.st_size));
+				add_property(tree, prop);
+				fclose(pfile);
+			}
+		} else if (S_ISDIR(st.st_mode)) {
+			struct node *newchild;
+
+			newchild = read_fstree(tmpname);
+			newchild = name_node(newchild, xstrdup(de->d_name));
+			add_child(tree, newchild);
+		}
+
+		free(tmpname);
+	}
+
+	closedir(d);
+	return tree;
+}
+
+struct dt_info *dt_from_fs(const char *dirname)
+{
+	struct node *tree;
+
+	tree = read_fstree(dirname);
+	tree = name_node(tree, "");
+
+	return build_dt_info(DTSF_V1, NULL, tree, guess_boot_cpuid(tree));
+}
diff --git a/scripts/dtc/libfdt/Makefile.libfdt b/scripts/dtc/libfdt/Makefile.libfdt
new file mode 100644
index 0000000000..098b3f36e6
--- /dev/null
+++ b/scripts/dtc/libfdt/Makefile.libfdt
@@ -0,0 +1,11 @@
+# Makefile.libfdt
+#
+# This is not a complete Makefile of itself.  Instead, it is designed to
+# be easily embeddable into other systems of Makefiles.
+#
+LIBFDT_soname = libfdt.$(SHAREDLIB_EXT).1
+LIBFDT_INCLUDES = fdt.h libfdt.h libfdt_env.h
+LIBFDT_VERSION = version.lds
+LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c fdt_empty_tree.c \
+	fdt_addresses.c fdt_overlay.c
+LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c
new file mode 100644
index 0000000000..22286a1aae
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt.c
@@ -0,0 +1,251 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_check_header(const void *fdt)
+{
+	if (fdt_magic(fdt) == FDT_MAGIC) {
+		/* Complete tree */
+		if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
+			return -FDT_ERR_BADVERSION;
+		if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
+			return -FDT_ERR_BADVERSION;
+	} else if (fdt_magic(fdt) == FDT_SW_MAGIC) {
+		/* Unfinished sequential-write blob */
+		if (fdt_size_dt_struct(fdt) == 0)
+			return -FDT_ERR_BADSTATE;
+	} else {
+		return -FDT_ERR_BADMAGIC;
+	}
+
+	return 0;
+}
+
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len)
+{
+	unsigned absoffset = offset + fdt_off_dt_struct(fdt);
+
+	if ((absoffset < offset)
+	    || ((absoffset + len) < absoffset)
+	    || (absoffset + len) > fdt_totalsize(fdt))
+		return NULL;
+
+	if (fdt_version(fdt) >= 0x11)
+		if (((offset + len) < offset)
+		    || ((offset + len) > fdt_size_dt_struct(fdt)))
+			return NULL;
+
+	return _fdt_offset_ptr(fdt, offset);
+}
+
+uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset)
+{
+	const fdt32_t *tagp, *lenp;
+	uint32_t tag;
+	int offset = startoffset;
+	const char *p;
+
+	*nextoffset = -FDT_ERR_TRUNCATED;
+	tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
+	if (!tagp)
+		return FDT_END; /* premature end */
+	tag = fdt32_to_cpu(*tagp);
+	offset += FDT_TAGSIZE;
+
+	*nextoffset = -FDT_ERR_BADSTRUCTURE;
+	switch (tag) {
+	case FDT_BEGIN_NODE:
+		/* skip name */
+		do {
+			p = fdt_offset_ptr(fdt, offset++, 1);
+		} while (p && (*p != '\0'));
+		if (!p)
+			return FDT_END; /* premature end */
+		break;
+
+	case FDT_PROP:
+		lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
+		if (!lenp)
+			return FDT_END; /* premature end */
+		/* skip-name offset, length and value */
+		offset += sizeof(struct fdt_property) - FDT_TAGSIZE
+			+ fdt32_to_cpu(*lenp);
+		break;
+
+	case FDT_END:
+	case FDT_END_NODE:
+	case FDT_NOP:
+		break;
+
+	default:
+		return FDT_END;
+	}
+
+	if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset))
+		return FDT_END; /* premature end */
+
+	*nextoffset = FDT_TAGALIGN(offset);
+	return tag;
+}
+
+int _fdt_check_node_offset(const void *fdt, int offset)
+{
+	if ((offset < 0) || (offset % FDT_TAGSIZE)
+	    || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE))
+		return -FDT_ERR_BADOFFSET;
+
+	return offset;
+}
+
+int _fdt_check_prop_offset(const void *fdt, int offset)
+{
+	if ((offset < 0) || (offset % FDT_TAGSIZE)
+	    || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP))
+		return -FDT_ERR_BADOFFSET;
+
+	return offset;
+}
+
+int fdt_next_node(const void *fdt, int offset, int *depth)
+{
+	int nextoffset = 0;
+	uint32_t tag;
+
+	if (offset >= 0)
+		if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0)
+			return nextoffset;
+
+	do {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		switch (tag) {
+		case FDT_PROP:
+		case FDT_NOP:
+			break;
+
+		case FDT_BEGIN_NODE:
+			if (depth)
+				(*depth)++;
+			break;
+
+		case FDT_END_NODE:
+			if (depth && ((--(*depth)) < 0))
+				return nextoffset;
+			break;
+
+		case FDT_END:
+			if ((nextoffset >= 0)
+			    || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth))
+				return -FDT_ERR_NOTFOUND;
+			else
+				return nextoffset;
+		}
+	} while (tag != FDT_BEGIN_NODE);
+
+	return offset;
+}
+
+int fdt_first_subnode(const void *fdt, int offset)
+{
+	int depth = 0;
+
+	offset = fdt_next_node(fdt, offset, &depth);
+	if (offset < 0 || depth != 1)
+		return -FDT_ERR_NOTFOUND;
+
+	return offset;
+}
+
+int fdt_next_subnode(const void *fdt, int offset)
+{
+	int depth = 1;
+
+	/*
+	 * With respect to the parent, the depth of the next subnode will be
+	 * the same as the last.
+	 */
+	do {
+		offset = fdt_next_node(fdt, offset, &depth);
+		if (offset < 0 || depth < 1)
+			return -FDT_ERR_NOTFOUND;
+	} while (depth > 1);
+
+	return offset;
+}
+
+const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
+{
+	int len = strlen(s) + 1;
+	const char *last = strtab + tabsize - len;
+	const char *p;
+
+	for (p = strtab; p <= last; p++)
+		if (memcmp(p, s, len) == 0)
+			return p;
+	return NULL;
+}
+
+int fdt_move(const void *fdt, void *buf, int bufsize)
+{
+	FDT_CHECK_HEADER(fdt);
+
+	if (fdt_totalsize(fdt) > bufsize)
+		return -FDT_ERR_NOSPACE;
+
+	memmove(buf, fdt, fdt_totalsize(fdt));
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/fdt.h b/scripts/dtc/libfdt/fdt.h
new file mode 100644
index 0000000000..526aedb515
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt.h
@@ -0,0 +1,111 @@
+#ifndef _FDT_H
+#define _FDT_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ * Copyright 2012 Kim Phillips, Freescale Semiconductor.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ASSEMBLY__
+
+struct fdt_header {
+	fdt32_t magic;			 /* magic word FDT_MAGIC */
+	fdt32_t totalsize;		 /* total size of DT block */
+	fdt32_t off_dt_struct;		 /* offset to structure */
+	fdt32_t off_dt_strings;		 /* offset to strings */
+	fdt32_t off_mem_rsvmap;		 /* offset to memory reserve map */
+	fdt32_t version;		 /* format version */
+	fdt32_t last_comp_version;	 /* last compatible version */
+
+	/* version 2 fields below */
+	fdt32_t boot_cpuid_phys;	 /* Which physical CPU id we're
+					    booting on */
+	/* version 3 fields below */
+	fdt32_t size_dt_strings;	 /* size of the strings block */
+
+	/* version 17 fields below */
+	fdt32_t size_dt_struct;		 /* size of the structure block */
+};
+
+struct fdt_reserve_entry {
+	fdt64_t address;
+	fdt64_t size;
+};
+
+struct fdt_node_header {
+	fdt32_t tag;
+	char name[0];
+};
+
+struct fdt_property {
+	fdt32_t tag;
+	fdt32_t len;
+	fdt32_t nameoff;
+	char data[0];
+};
+
+#endif /* !__ASSEMBLY */
+
+#define FDT_MAGIC	0xd00dfeed	/* 4: version, 4: total size */
+#define FDT_TAGSIZE	sizeof(fdt32_t)
+
+#define FDT_BEGIN_NODE	0x1		/* Start node: full name */
+#define FDT_END_NODE	0x2		/* End node */
+#define FDT_PROP	0x3		/* Property: name off,
+					   size, content */
+#define FDT_NOP		0x4		/* nop */
+#define FDT_END		0x9
+
+#define FDT_V1_SIZE	(7*sizeof(fdt32_t))
+#define FDT_V2_SIZE	(FDT_V1_SIZE + sizeof(fdt32_t))
+#define FDT_V3_SIZE	(FDT_V2_SIZE + sizeof(fdt32_t))
+#define FDT_V16_SIZE	FDT_V3_SIZE
+#define FDT_V17_SIZE	(FDT_V16_SIZE + sizeof(fdt32_t))
+
+#endif /* _FDT_H */
diff --git a/scripts/dtc/libfdt/fdt_empty_tree.c b/scripts/dtc/libfdt/fdt_empty_tree.c
new file mode 100644
index 0000000000..f72d13b1d1
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_empty_tree.c
@@ -0,0 +1,84 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2012 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_create_empty_tree(void *buf, int bufsize)
+{
+	int err;
+
+	err = fdt_create(buf, bufsize);
+	if (err)
+		return err;
+
+	err = fdt_finish_reservemap(buf);
+	if (err)
+		return err;
+
+	err = fdt_begin_node(buf, "");
+	if (err)
+		return err;
+
+	err =  fdt_end_node(buf);
+	if (err)
+		return err;
+
+	err = fdt_finish(buf);
+	if (err)
+		return err;
+
+	return fdt_open_into(buf, buf, bufsize);
+}
+
diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c
new file mode 100644
index 0000000000..3d00d2eee0
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_ro.c
@@ -0,0 +1,703 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int _fdt_nodename_eq(const void *fdt, int offset,
+			    const char *s, int len)
+{
+	const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1);
+
+	if (! p)
+		/* short match */
+		return 0;
+
+	if (memcmp(p, s, len) != 0)
+		return 0;
+
+	if (p[len] == '\0')
+		return 1;
+	else if (!memchr(s, '@', len) && (p[len] == '@'))
+		return 1;
+	else
+		return 0;
+}
+
+const char *fdt_string(const void *fdt, int stroffset)
+{
+	return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
+}
+
+static int _fdt_string_eq(const void *fdt, int stroffset,
+			  const char *s, int len)
+{
+	const char *p = fdt_string(fdt, stroffset);
+
+	return (strlen(p) == len) && (memcmp(p, s, len) == 0);
+}
+
+uint32_t fdt_get_max_phandle(const void *fdt)
+{
+	uint32_t max_phandle = 0;
+	int offset;
+
+	for (offset = fdt_next_node(fdt, -1, NULL);;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		uint32_t phandle;
+
+		if (offset == -FDT_ERR_NOTFOUND)
+			return max_phandle;
+
+		if (offset < 0)
+			return (uint32_t)-1;
+
+		phandle = fdt_get_phandle(fdt, offset);
+		if (phandle == (uint32_t)-1)
+			continue;
+
+		if (phandle > max_phandle)
+			max_phandle = phandle;
+	}
+
+	return 0;
+}
+
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
+{
+	FDT_CHECK_HEADER(fdt);
+	*address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address);
+	*size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size);
+	return 0;
+}
+
+int fdt_num_mem_rsv(const void *fdt)
+{
+	int i = 0;
+
+	while (fdt64_to_cpu(_fdt_mem_rsv(fdt, i)->size) != 0)
+		i++;
+	return i;
+}
+
+static int _nextprop(const void *fdt, int offset)
+{
+	uint32_t tag;
+	int nextoffset;
+
+	do {
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+
+		switch (tag) {
+		case FDT_END:
+			if (nextoffset >= 0)
+				return -FDT_ERR_BADSTRUCTURE;
+			else
+				return nextoffset;
+
+		case FDT_PROP:
+			return offset;
+		}
+		offset = nextoffset;
+	} while (tag == FDT_NOP);
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+int fdt_subnode_offset_namelen(const void *fdt, int offset,
+			       const char *name, int namelen)
+{
+	int depth;
+
+	FDT_CHECK_HEADER(fdt);
+
+	for (depth = 0;
+	     (offset >= 0) && (depth >= 0);
+	     offset = fdt_next_node(fdt, offset, &depth))
+		if ((depth == 1)
+		    && _fdt_nodename_eq(fdt, offset, name, namelen))
+			return offset;
+
+	if (depth < 0)
+		return -FDT_ERR_NOTFOUND;
+	return offset; /* error */
+}
+
+int fdt_subnode_offset(const void *fdt, int parentoffset,
+		       const char *name)
+{
+	return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name));
+}
+
+int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen)
+{
+	const char *end = path + namelen;
+	const char *p = path;
+	int offset = 0;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* see if we have an alias */
+	if (*path != '/') {
+		const char *q = memchr(path, '/', end - p);
+
+		if (!q)
+			q = end;
+
+		p = fdt_get_alias_namelen(fdt, p, q - p);
+		if (!p)
+			return -FDT_ERR_BADPATH;
+		offset = fdt_path_offset(fdt, p);
+
+		p = q;
+	}
+
+	while (p < end) {
+		const char *q;
+
+		while (*p == '/') {
+			p++;
+			if (p == end)
+				return offset;
+		}
+		q = memchr(p, '/', end - p);
+		if (! q)
+			q = end;
+
+		offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p);
+		if (offset < 0)
+			return offset;
+
+		p = q;
+	}
+
+	return offset;
+}
+
+int fdt_path_offset(const void *fdt, const char *path)
+{
+	return fdt_path_offset_namelen(fdt, path, strlen(path));
+}
+
+const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)
+{
+	const struct fdt_node_header *nh = _fdt_offset_ptr(fdt, nodeoffset);
+	int err;
+
+	if (((err = fdt_check_header(fdt)) != 0)
+	    || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0))
+			goto fail;
+
+	if (len)
+		*len = strlen(nh->name);
+
+	return nh->name;
+
+ fail:
+	if (len)
+		*len = err;
+	return NULL;
+}
+
+int fdt_first_property_offset(const void *fdt, int nodeoffset)
+{
+	int offset;
+
+	if ((offset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
+		return offset;
+
+	return _nextprop(fdt, offset);
+}
+
+int fdt_next_property_offset(const void *fdt, int offset)
+{
+	if ((offset = _fdt_check_prop_offset(fdt, offset)) < 0)
+		return offset;
+
+	return _nextprop(fdt, offset);
+}
+
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+						      int offset,
+						      int *lenp)
+{
+	int err;
+	const struct fdt_property *prop;
+
+	if ((err = _fdt_check_prop_offset(fdt, offset)) < 0) {
+		if (lenp)
+			*lenp = err;
+		return NULL;
+	}
+
+	prop = _fdt_offset_ptr(fdt, offset);
+
+	if (lenp)
+		*lenp = fdt32_to_cpu(prop->len);
+
+	return prop;
+}
+
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+						    int offset,
+						    const char *name,
+						    int namelen, int *lenp)
+{
+	for (offset = fdt_first_property_offset(fdt, offset);
+	     (offset >= 0);
+	     (offset = fdt_next_property_offset(fdt, offset))) {
+		const struct fdt_property *prop;
+
+		if (!(prop = fdt_get_property_by_offset(fdt, offset, lenp))) {
+			offset = -FDT_ERR_INTERNAL;
+			break;
+		}
+		if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff),
+				   name, namelen))
+			return prop;
+	}
+
+	if (lenp)
+		*lenp = offset;
+	return NULL;
+}
+
+const struct fdt_property *fdt_get_property(const void *fdt,
+					    int nodeoffset,
+					    const char *name, int *lenp)
+{
+	return fdt_get_property_namelen(fdt, nodeoffset, name,
+					strlen(name), lenp);
+}
+
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+				const char *name, int namelen, int *lenp)
+{
+	const struct fdt_property *prop;
+
+	prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp);
+	if (! prop)
+		return NULL;
+
+	return prop->data;
+}
+
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+				  const char **namep, int *lenp)
+{
+	const struct fdt_property *prop;
+
+	prop = fdt_get_property_by_offset(fdt, offset, lenp);
+	if (!prop)
+		return NULL;
+	if (namep)
+		*namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
+	return prop->data;
+}
+
+const void *fdt_getprop(const void *fdt, int nodeoffset,
+			const char *name, int *lenp)
+{
+	return fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), lenp);
+}
+
+uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
+{
+	const fdt32_t *php;
+	int len;
+
+	/* FIXME: This is a bit sub-optimal, since we potentially scan
+	 * over all the properties twice. */
+	php = fdt_getprop(fdt, nodeoffset, "phandle", &len);
+	if (!php || (len != sizeof(*php))) {
+		php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len);
+		if (!php || (len != sizeof(*php)))
+			return 0;
+	}
+
+	return fdt32_to_cpu(*php);
+}
+
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen)
+{
+	int aliasoffset;
+
+	aliasoffset = fdt_path_offset(fdt, "/aliases");
+	if (aliasoffset < 0)
+		return NULL;
+
+	return fdt_getprop_namelen(fdt, aliasoffset, name, namelen, NULL);
+}
+
+const char *fdt_get_alias(const void *fdt, const char *name)
+{
+	return fdt_get_alias_namelen(fdt, name, strlen(name));
+}
+
+int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
+{
+	int pdepth = 0, p = 0;
+	int offset, depth, namelen;
+	const char *name;
+
+	FDT_CHECK_HEADER(fdt);
+
+	if (buflen < 2)
+		return -FDT_ERR_NOSPACE;
+
+	for (offset = 0, depth = 0;
+	     (offset >= 0) && (offset <= nodeoffset);
+	     offset = fdt_next_node(fdt, offset, &depth)) {
+		while (pdepth > depth) {
+			do {
+				p--;
+			} while (buf[p-1] != '/');
+			pdepth--;
+		}
+
+		if (pdepth >= depth) {
+			name = fdt_get_name(fdt, offset, &namelen);
+			if (!name)
+				return namelen;
+			if ((p + namelen + 1) <= buflen) {
+				memcpy(buf + p, name, namelen);
+				p += namelen;
+				buf[p++] = '/';
+				pdepth++;
+			}
+		}
+
+		if (offset == nodeoffset) {
+			if (pdepth < (depth + 1))
+				return -FDT_ERR_NOSPACE;
+
+			if (p > 1) /* special case so that root path is "/", not "" */
+				p--;
+			buf[p] = '\0';
+			return 0;
+		}
+	}
+
+	if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
+		return -FDT_ERR_BADOFFSET;
+	else if (offset == -FDT_ERR_BADOFFSET)
+		return -FDT_ERR_BADSTRUCTURE;
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
+				 int supernodedepth, int *nodedepth)
+{
+	int offset, depth;
+	int supernodeoffset = -FDT_ERR_INTERNAL;
+
+	FDT_CHECK_HEADER(fdt);
+
+	if (supernodedepth < 0)
+		return -FDT_ERR_NOTFOUND;
+
+	for (offset = 0, depth = 0;
+	     (offset >= 0) && (offset <= nodeoffset);
+	     offset = fdt_next_node(fdt, offset, &depth)) {
+		if (depth == supernodedepth)
+			supernodeoffset = offset;
+
+		if (offset == nodeoffset) {
+			if (nodedepth)
+				*nodedepth = depth;
+
+			if (supernodedepth > depth)
+				return -FDT_ERR_NOTFOUND;
+			else
+				return supernodeoffset;
+		}
+	}
+
+	if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0))
+		return -FDT_ERR_BADOFFSET;
+	else if (offset == -FDT_ERR_BADOFFSET)
+		return -FDT_ERR_BADSTRUCTURE;
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_node_depth(const void *fdt, int nodeoffset)
+{
+	int nodedepth;
+	int err;
+
+	err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth);
+	if (err)
+		return (err < 0) ? err : -FDT_ERR_INTERNAL;
+	return nodedepth;
+}
+
+int fdt_parent_offset(const void *fdt, int nodeoffset)
+{
+	int nodedepth = fdt_node_depth(fdt, nodeoffset);
+
+	if (nodedepth < 0)
+		return nodedepth;
+	return fdt_supernode_atdepth_offset(fdt, nodeoffset,
+					    nodedepth - 1, NULL);
+}
+
+int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
+				  const char *propname,
+				  const void *propval, int proplen)
+{
+	int offset;
+	const void *val;
+	int len;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we scan each
+	 * property of a node in fdt_getprop(), then if that didn't
+	 * find what we want, we scan over them again making our way
+	 * to the next node.  Still it's the easiest to implement
+	 * approach; performance can come later. */
+	for (offset = fdt_next_node(fdt, startoffset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		val = fdt_getprop(fdt, offset, propname, &len);
+		if (val && (len == proplen)
+		    && (memcmp(val, propval, len) == 0))
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
+{
+	int offset;
+
+	if ((phandle == 0) || (phandle == -1))
+		return -FDT_ERR_BADPHANDLE;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we
+	 * potentially scan each property of a node in
+	 * fdt_get_phandle(), then if that didn't find what
+	 * we want, we scan over them again making our way to the next
+	 * node.  Still it's the easiest to implement approach;
+	 * performance can come later. */
+	for (offset = fdt_next_node(fdt, -1, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		if (fdt_get_phandle(fdt, offset) == phandle)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)
+{
+	int len = strlen(str);
+	const char *p;
+
+	while (listlen >= len) {
+		if (memcmp(str, strlist, len+1) == 0)
+			return 1;
+		p = memchr(strlist, '\0', listlen);
+		if (!p)
+			return 0; /* malformed strlist.. */
+		listlen -= (p-strlist) + 1;
+		strlist = p + 1;
+	}
+	return 0;
+}
+
+int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property)
+{
+	const char *list, *end;
+	int length, count = 0;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list)
+		return length;
+
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end)
+			return -FDT_ERR_BADVALUE;
+
+		list += length;
+		count++;
+	}
+
+	return count;
+}
+
+int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
+			  const char *string)
+{
+	int length, len, idx = 0;
+	const char *list, *end;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list)
+		return length;
+
+	len = strlen(string) + 1;
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end)
+			return -FDT_ERR_BADVALUE;
+
+		if (length == len && memcmp(list, string, length) == 0)
+			return idx;
+
+		list += length;
+		idx++;
+	}
+
+	return -FDT_ERR_NOTFOUND;
+}
+
+const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
+			       const char *property, int idx,
+			       int *lenp)
+{
+	const char *list, *end;
+	int length;
+
+	list = fdt_getprop(fdt, nodeoffset, property, &length);
+	if (!list) {
+		if (lenp)
+			*lenp = length;
+
+		return NULL;
+	}
+
+	end = list + length;
+
+	while (list < end) {
+		length = strnlen(list, end - list) + 1;
+
+		/* Abort if the last string isn't properly NUL-terminated. */
+		if (list + length > end) {
+			if (lenp)
+				*lenp = -FDT_ERR_BADVALUE;
+
+			return NULL;
+		}
+
+		if (idx == 0) {
+			if (lenp)
+				*lenp = length - 1;
+
+			return list;
+		}
+
+		list += length;
+		idx--;
+	}
+
+	if (lenp)
+		*lenp = -FDT_ERR_NOTFOUND;
+
+	return NULL;
+}
+
+int fdt_node_check_compatible(const void *fdt, int nodeoffset,
+			      const char *compatible)
+{
+	const void *prop;
+	int len;
+
+	prop = fdt_getprop(fdt, nodeoffset, "compatible", &len);
+	if (!prop)
+		return len;
+
+	return !fdt_stringlist_contains(prop, len, compatible);
+}
+
+int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
+				  const char *compatible)
+{
+	int offset, err;
+
+	FDT_CHECK_HEADER(fdt);
+
+	/* FIXME: The algorithm here is pretty horrible: we scan each
+	 * property of a node in fdt_node_check_compatible(), then if
+	 * that didn't find what we want, we scan over them again
+	 * making our way to the next node.  Still it's the easiest to
+	 * implement approach; performance can come later. */
+	for (offset = fdt_next_node(fdt, startoffset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		err = fdt_node_check_compatible(fdt, offset, compatible);
+		if ((err < 0) && (err != -FDT_ERR_NOTFOUND))
+			return err;
+		else if (err == 0)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c
new file mode 100644
index 0000000000..3fd5847377
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_rw.c
@@ -0,0 +1,491 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int _fdt_blocks_misordered(const void *fdt,
+			      int mem_rsv_size, int struct_size)
+{
+	return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8))
+		|| (fdt_off_dt_struct(fdt) <
+		    (fdt_off_mem_rsvmap(fdt) + mem_rsv_size))
+		|| (fdt_off_dt_strings(fdt) <
+		    (fdt_off_dt_struct(fdt) + struct_size))
+		|| (fdt_totalsize(fdt) <
+		    (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
+}
+
+static int _fdt_rw_check_header(void *fdt)
+{
+	FDT_CHECK_HEADER(fdt);
+
+	if (fdt_version(fdt) < 17)
+		return -FDT_ERR_BADVERSION;
+	if (_fdt_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry),
+				   fdt_size_dt_struct(fdt)))
+		return -FDT_ERR_BADLAYOUT;
+	if (fdt_version(fdt) > 17)
+		fdt_set_version(fdt, 17);
+
+	return 0;
+}
+
+#define FDT_RW_CHECK_HEADER(fdt) \
+	{ \
+		int __err; \
+		if ((__err = _fdt_rw_check_header(fdt)) != 0) \
+			return __err; \
+	}
+
+static inline int _fdt_data_size(void *fdt)
+{
+	return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
+}
+
+static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen)
+{
+	char *p = splicepoint;
+	char *end = (char *)fdt + _fdt_data_size(fdt);
+
+	if (((p + oldlen) < p) || ((p + oldlen) > end))
+		return -FDT_ERR_BADOFFSET;
+	if ((p < (char *)fdt) || ((end - oldlen + newlen) < (char *)fdt))
+		return -FDT_ERR_BADOFFSET;
+	if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt)))
+		return -FDT_ERR_NOSPACE;
+	memmove(p + newlen, p + oldlen, end - p - oldlen);
+	return 0;
+}
+
+static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
+			       int oldn, int newn)
+{
+	int delta = (newn - oldn) * sizeof(*p);
+	int err;
+	err = _fdt_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
+	if (err)
+		return err;
+	fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta);
+	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
+	return 0;
+}
+
+static int _fdt_splice_struct(void *fdt, void *p,
+			      int oldlen, int newlen)
+{
+	int delta = newlen - oldlen;
+	int err;
+
+	if ((err = _fdt_splice(fdt, p, oldlen, newlen)))
+		return err;
+
+	fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta);
+	fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
+	return 0;
+}
+
+static int _fdt_splice_string(void *fdt, int newlen)
+{
+	void *p = (char *)fdt
+		+ fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
+	int err;
+
+	if ((err = _fdt_splice(fdt, p, 0, newlen)))
+		return err;
+
+	fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen);
+	return 0;
+}
+
+static int _fdt_find_add_string(void *fdt, const char *s)
+{
+	char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
+	const char *p;
+	char *new;
+	int len = strlen(s) + 1;
+	int err;
+
+	p = _fdt_find_string(strtab, fdt_size_dt_strings(fdt), s);
+	if (p)
+		/* found it */
+		return (p - strtab);
+
+	new = strtab + fdt_size_dt_strings(fdt);
+	err = _fdt_splice_string(fdt, len);
+	if (err)
+		return err;
+
+	memcpy(new, s, len);
+	return (new - strtab);
+}
+
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
+{
+	struct fdt_reserve_entry *re;
+	int err;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt));
+	err = _fdt_splice_mem_rsv(fdt, re, 0, 1);
+	if (err)
+		return err;
+
+	re->address = cpu_to_fdt64(address);
+	re->size = cpu_to_fdt64(size);
+	return 0;
+}
+
+int fdt_del_mem_rsv(void *fdt, int n)
+{
+	struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	if (n >= fdt_num_mem_rsv(fdt))
+		return -FDT_ERR_NOTFOUND;
+
+	return _fdt_splice_mem_rsv(fdt, re, 1, 0);
+}
+
+static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name,
+				int len, struct fdt_property **prop)
+{
+	int oldlen;
+	int err;
+
+	*prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
+	if (! (*prop))
+		return oldlen;
+
+	if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen),
+				      FDT_TAGALIGN(len))))
+		return err;
+
+	(*prop)->len = cpu_to_fdt32(len);
+	return 0;
+}
+
+static int _fdt_add_property(void *fdt, int nodeoffset, const char *name,
+			     int len, struct fdt_property **prop)
+{
+	int proplen;
+	int nextoffset;
+	int namestroff;
+	int err;
+
+	if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0)
+		return nextoffset;
+
+	namestroff = _fdt_find_add_string(fdt, name);
+	if (namestroff < 0)
+		return namestroff;
+
+	*prop = _fdt_offset_ptr_w(fdt, nextoffset);
+	proplen = sizeof(**prop) + FDT_TAGALIGN(len);
+
+	err = _fdt_splice_struct(fdt, *prop, 0, proplen);
+	if (err)
+		return err;
+
+	(*prop)->tag = cpu_to_fdt32(FDT_PROP);
+	(*prop)->nameoff = cpu_to_fdt32(namestroff);
+	(*prop)->len = cpu_to_fdt32(len);
+	return 0;
+}
+
+int fdt_set_name(void *fdt, int nodeoffset, const char *name)
+{
+	char *namep;
+	int oldlen, newlen;
+	int err;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen);
+	if (!namep)
+		return oldlen;
+
+	newlen = strlen(name);
+
+	err = _fdt_splice_struct(fdt, namep, FDT_TAGALIGN(oldlen+1),
+				 FDT_TAGALIGN(newlen+1));
+	if (err)
+		return err;
+
+	memcpy(namep, name, newlen+1);
+	return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len)
+{
+	struct fdt_property *prop;
+	int err;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	err = _fdt_resize_property(fdt, nodeoffset, name, len, &prop);
+	if (err == -FDT_ERR_NOTFOUND)
+		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
+	if (err)
+		return err;
+
+	if (len)
+		memcpy(prop->data, val, len);
+	return 0;
+}
+
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+		   const void *val, int len)
+{
+	struct fdt_property *prop;
+	int err, oldlen, newlen;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
+	if (prop) {
+		newlen = len + oldlen;
+		err = _fdt_splice_struct(fdt, prop->data,
+					 FDT_TAGALIGN(oldlen),
+					 FDT_TAGALIGN(newlen));
+		if (err)
+			return err;
+		prop->len = cpu_to_fdt32(newlen);
+		memcpy(prop->data + oldlen, val, len);
+	} else {
+		err = _fdt_add_property(fdt, nodeoffset, name, len, &prop);
+		if (err)
+			return err;
+		memcpy(prop->data, val, len);
+	}
+	return 0;
+}
+
+int fdt_delprop(void *fdt, int nodeoffset, const char *name)
+{
+	struct fdt_property *prop;
+	int len, proplen;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
+	if (! prop)
+		return len;
+
+	proplen = sizeof(*prop) + FDT_TAGALIGN(len);
+	return _fdt_splice_struct(fdt, prop, proplen, 0);
+}
+
+int fdt_add_subnode_namelen(void *fdt, int parentoffset,
+			    const char *name, int namelen)
+{
+	struct fdt_node_header *nh;
+	int offset, nextoffset;
+	int nodelen;
+	int err;
+	uint32_t tag;
+	fdt32_t *endtag;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen);
+	if (offset >= 0)
+		return -FDT_ERR_EXISTS;
+	else if (offset != -FDT_ERR_NOTFOUND)
+		return offset;
+
+	/* Try to place the new node after the parent's properties */
+	fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */
+	do {
+		offset = nextoffset;
+		tag = fdt_next_tag(fdt, offset, &nextoffset);
+	} while ((tag == FDT_PROP) || (tag == FDT_NOP));
+
+	nh = _fdt_offset_ptr_w(fdt, offset);
+	nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE;
+
+	err = _fdt_splice_struct(fdt, nh, 0, nodelen);
+	if (err)
+		return err;
+
+	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
+	memset(nh->name, 0, FDT_TAGALIGN(namelen+1));
+	memcpy(nh->name, name, namelen);
+	endtag = (fdt32_t *)((char *)nh + nodelen - FDT_TAGSIZE);
+	*endtag = cpu_to_fdt32(FDT_END_NODE);
+
+	return offset;
+}
+
+int fdt_add_subnode(void *fdt, int parentoffset, const char *name)
+{
+	return fdt_add_subnode_namelen(fdt, parentoffset, name, strlen(name));
+}
+
+int fdt_del_node(void *fdt, int nodeoffset)
+{
+	int endoffset;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
+	if (endoffset < 0)
+		return endoffset;
+
+	return _fdt_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset),
+				  endoffset - nodeoffset, 0);
+}
+
+static void _fdt_packblocks(const char *old, char *new,
+			    int mem_rsv_size, int struct_size)
+{
+	int mem_rsv_off, struct_off, strings_off;
+
+	mem_rsv_off = FDT_ALIGN(sizeof(struct fdt_header), 8);
+	struct_off = mem_rsv_off + mem_rsv_size;
+	strings_off = struct_off + struct_size;
+
+	memmove(new + mem_rsv_off, old + fdt_off_mem_rsvmap(old), mem_rsv_size);
+	fdt_set_off_mem_rsvmap(new, mem_rsv_off);
+
+	memmove(new + struct_off, old + fdt_off_dt_struct(old), struct_size);
+	fdt_set_off_dt_struct(new, struct_off);
+	fdt_set_size_dt_struct(new, struct_size);
+
+	memmove(new + strings_off, old + fdt_off_dt_strings(old),
+		fdt_size_dt_strings(old));
+	fdt_set_off_dt_strings(new, strings_off);
+	fdt_set_size_dt_strings(new, fdt_size_dt_strings(old));
+}
+
+int fdt_open_into(const void *fdt, void *buf, int bufsize)
+{
+	int err;
+	int mem_rsv_size, struct_size;
+	int newsize;
+	const char *fdtstart = fdt;
+	const char *fdtend = fdtstart + fdt_totalsize(fdt);
+	char *tmp;
+
+	FDT_CHECK_HEADER(fdt);
+
+	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
+		* sizeof(struct fdt_reserve_entry);
+
+	if (fdt_version(fdt) >= 17) {
+		struct_size = fdt_size_dt_struct(fdt);
+	} else {
+		struct_size = 0;
+		while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
+			;
+		if (struct_size < 0)
+			return struct_size;
+	}
+
+	if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) {
+		/* no further work necessary */
+		err = fdt_move(fdt, buf, bufsize);
+		if (err)
+			return err;
+		fdt_set_version(buf, 17);
+		fdt_set_size_dt_struct(buf, struct_size);
+		fdt_set_totalsize(buf, bufsize);
+		return 0;
+	}
+
+	/* Need to reorder */
+	newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
+		+ struct_size + fdt_size_dt_strings(fdt);
+
+	if (bufsize < newsize)
+		return -FDT_ERR_NOSPACE;
+
+	/* First attempt to build converted tree at beginning of buffer */
+	tmp = buf;
+	/* But if that overlaps with the old tree... */
+	if (((tmp + newsize) > fdtstart) && (tmp < fdtend)) {
+		/* Try right after the old tree instead */
+		tmp = (char *)(uintptr_t)fdtend;
+		if ((tmp + newsize) > ((char *)buf + bufsize))
+			return -FDT_ERR_NOSPACE;
+	}
+
+	_fdt_packblocks(fdt, tmp, mem_rsv_size, struct_size);
+	memmove(buf, tmp, newsize);
+
+	fdt_set_magic(buf, FDT_MAGIC);
+	fdt_set_totalsize(buf, bufsize);
+	fdt_set_version(buf, 17);
+	fdt_set_last_comp_version(buf, 16);
+	fdt_set_boot_cpuid_phys(buf, fdt_boot_cpuid_phys(fdt));
+
+	return 0;
+}
+
+int fdt_pack(void *fdt)
+{
+	int mem_rsv_size;
+
+	FDT_RW_CHECK_HEADER(fdt);
+
+	mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
+		* sizeof(struct fdt_reserve_entry);
+	_fdt_packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
+	fdt_set_totalsize(fdt, _fdt_data_size(fdt));
+
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/fdt_strerror.c b/scripts/dtc/libfdt/fdt_strerror.c
new file mode 100644
index 0000000000..9677a1887e
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_strerror.c
@@ -0,0 +1,102 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+struct fdt_errtabent {
+	const char *str;
+};
+
+#define FDT_ERRTABENT(val) \
+	[(val)] = { .str = #val, }
+
+static struct fdt_errtabent fdt_errtable[] = {
+	FDT_ERRTABENT(FDT_ERR_NOTFOUND),
+	FDT_ERRTABENT(FDT_ERR_EXISTS),
+	FDT_ERRTABENT(FDT_ERR_NOSPACE),
+
+	FDT_ERRTABENT(FDT_ERR_BADOFFSET),
+	FDT_ERRTABENT(FDT_ERR_BADPATH),
+	FDT_ERRTABENT(FDT_ERR_BADPHANDLE),
+	FDT_ERRTABENT(FDT_ERR_BADSTATE),
+
+	FDT_ERRTABENT(FDT_ERR_TRUNCATED),
+	FDT_ERRTABENT(FDT_ERR_BADMAGIC),
+	FDT_ERRTABENT(FDT_ERR_BADVERSION),
+	FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE),
+	FDT_ERRTABENT(FDT_ERR_BADLAYOUT),
+	FDT_ERRTABENT(FDT_ERR_INTERNAL),
+	FDT_ERRTABENT(FDT_ERR_BADNCELLS),
+	FDT_ERRTABENT(FDT_ERR_BADVALUE),
+	FDT_ERRTABENT(FDT_ERR_BADOVERLAY),
+	FDT_ERRTABENT(FDT_ERR_NOPHANDLES),
+};
+#define FDT_ERRTABSIZE	(sizeof(fdt_errtable) / sizeof(fdt_errtable[0]))
+
+const char *fdt_strerror(int errval)
+{
+	if (errval > 0)
+		return "<valid offset/length>";
+	else if (errval == 0)
+		return "<no error>";
+	else if (errval > -FDT_ERRTABSIZE) {
+		const char *s = fdt_errtable[-errval].str;
+
+		if (s)
+			return s;
+	}
+
+	return "<unknown error>";
+}
diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c
new file mode 100644
index 0000000000..6a804859fd
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_sw.c
@@ -0,0 +1,288 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+static int _fdt_sw_check_header(void *fdt)
+{
+	if (fdt_magic(fdt) != FDT_SW_MAGIC)
+		return -FDT_ERR_BADMAGIC;
+	/* FIXME: should check more details about the header state */
+	return 0;
+}
+
+#define FDT_SW_CHECK_HEADER(fdt) \
+	{ \
+		int err; \
+		if ((err = _fdt_sw_check_header(fdt)) != 0) \
+			return err; \
+	}
+
+static void *_fdt_grab_space(void *fdt, size_t len)
+{
+	int offset = fdt_size_dt_struct(fdt);
+	int spaceleft;
+
+	spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt)
+		- fdt_size_dt_strings(fdt);
+
+	if ((offset + len < offset) || (offset + len > spaceleft))
+		return NULL;
+
+	fdt_set_size_dt_struct(fdt, offset + len);
+	return _fdt_offset_ptr_w(fdt, offset);
+}
+
+int fdt_create(void *buf, int bufsize)
+{
+	void *fdt = buf;
+
+	if (bufsize < sizeof(struct fdt_header))
+		return -FDT_ERR_NOSPACE;
+
+	memset(buf, 0, bufsize);
+
+	fdt_set_magic(fdt, FDT_SW_MAGIC);
+	fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
+	fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
+	fdt_set_totalsize(fdt,  bufsize);
+
+	fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header),
+					      sizeof(struct fdt_reserve_entry)));
+	fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt));
+	fdt_set_off_dt_strings(fdt, bufsize);
+
+	return 0;
+}
+
+int fdt_resize(void *fdt, void *buf, int bufsize)
+{
+	size_t headsize, tailsize;
+	char *oldtail, *newtail;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	headsize = fdt_off_dt_struct(fdt);
+	tailsize = fdt_size_dt_strings(fdt);
+
+	if ((headsize + tailsize) > bufsize)
+		return -FDT_ERR_NOSPACE;
+
+	oldtail = (char *)fdt + fdt_totalsize(fdt) - tailsize;
+	newtail = (char *)buf + bufsize - tailsize;
+
+	/* Two cases to avoid clobbering data if the old and new
+	 * buffers partially overlap */
+	if (buf <= fdt) {
+		memmove(buf, fdt, headsize);
+		memmove(newtail, oldtail, tailsize);
+	} else {
+		memmove(newtail, oldtail, tailsize);
+		memmove(buf, fdt, headsize);
+	}
+
+	fdt_set_off_dt_strings(buf, bufsize);
+	fdt_set_totalsize(buf, bufsize);
+
+	return 0;
+}
+
+int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
+{
+	struct fdt_reserve_entry *re;
+	int offset;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	if (fdt_size_dt_struct(fdt))
+		return -FDT_ERR_BADSTATE;
+
+	offset = fdt_off_dt_struct(fdt);
+	if ((offset + sizeof(*re)) > fdt_totalsize(fdt))
+		return -FDT_ERR_NOSPACE;
+
+	re = (struct fdt_reserve_entry *)((char *)fdt + offset);
+	re->address = cpu_to_fdt64(addr);
+	re->size = cpu_to_fdt64(size);
+
+	fdt_set_off_dt_struct(fdt, offset + sizeof(*re));
+
+	return 0;
+}
+
+int fdt_finish_reservemap(void *fdt)
+{
+	return fdt_add_reservemap_entry(fdt, 0, 0);
+}
+
+int fdt_begin_node(void *fdt, const char *name)
+{
+	struct fdt_node_header *nh;
+	int namelen = strlen(name) + 1;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	nh = _fdt_grab_space(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen));
+	if (! nh)
+		return -FDT_ERR_NOSPACE;
+
+	nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
+	memcpy(nh->name, name, namelen);
+	return 0;
+}
+
+int fdt_end_node(void *fdt)
+{
+	fdt32_t *en;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	en = _fdt_grab_space(fdt, FDT_TAGSIZE);
+	if (! en)
+		return -FDT_ERR_NOSPACE;
+
+	*en = cpu_to_fdt32(FDT_END_NODE);
+	return 0;
+}
+
+static int _fdt_find_add_string(void *fdt, const char *s)
+{
+	char *strtab = (char *)fdt + fdt_totalsize(fdt);
+	const char *p;
+	int strtabsize = fdt_size_dt_strings(fdt);
+	int len = strlen(s) + 1;
+	int struct_top, offset;
+
+	p = _fdt_find_string(strtab - strtabsize, strtabsize, s);
+	if (p)
+		return p - strtab;
+
+	/* Add it */
+	offset = -strtabsize - len;
+	struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
+	if (fdt_totalsize(fdt) + offset < struct_top)
+		return 0; /* no more room :( */
+
+	memcpy(strtab + offset, s, len);
+	fdt_set_size_dt_strings(fdt, strtabsize + len);
+	return offset;
+}
+
+int fdt_property(void *fdt, const char *name, const void *val, int len)
+{
+	struct fdt_property *prop;
+	int nameoff;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	nameoff = _fdt_find_add_string(fdt, name);
+	if (nameoff == 0)
+		return -FDT_ERR_NOSPACE;
+
+	prop = _fdt_grab_space(fdt, sizeof(*prop) + FDT_TAGALIGN(len));
+	if (! prop)
+		return -FDT_ERR_NOSPACE;
+
+	prop->tag = cpu_to_fdt32(FDT_PROP);
+	prop->nameoff = cpu_to_fdt32(nameoff);
+	prop->len = cpu_to_fdt32(len);
+	memcpy(prop->data, val, len);
+	return 0;
+}
+
+int fdt_finish(void *fdt)
+{
+	char *p = (char *)fdt;
+	fdt32_t *end;
+	int oldstroffset, newstroffset;
+	uint32_t tag;
+	int offset, nextoffset;
+
+	FDT_SW_CHECK_HEADER(fdt);
+
+	/* Add terminator */
+	end = _fdt_grab_space(fdt, sizeof(*end));
+	if (! end)
+		return -FDT_ERR_NOSPACE;
+	*end = cpu_to_fdt32(FDT_END);
+
+	/* Relocate the string table */
+	oldstroffset = fdt_totalsize(fdt) - fdt_size_dt_strings(fdt);
+	newstroffset = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
+	memmove(p + newstroffset, p + oldstroffset, fdt_size_dt_strings(fdt));
+	fdt_set_off_dt_strings(fdt, newstroffset);
+
+	/* Walk the structure, correcting string offsets */
+	offset = 0;
+	while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) {
+		if (tag == FDT_PROP) {
+			struct fdt_property *prop =
+				_fdt_offset_ptr_w(fdt, offset);
+			int nameoff;
+
+			nameoff = fdt32_to_cpu(prop->nameoff);
+			nameoff += fdt_size_dt_strings(fdt);
+			prop->nameoff = cpu_to_fdt32(nameoff);
+		}
+		offset = nextoffset;
+	}
+	if (nextoffset < 0)
+		return nextoffset;
+
+	/* Finally, adjust the header */
+	fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
+	fdt_set_magic(fdt, FDT_MAGIC);
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c
new file mode 100644
index 0000000000..6aaab39992
--- /dev/null
+++ b/scripts/dtc/libfdt/fdt_wip.c
@@ -0,0 +1,139 @@
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "libfdt_env.h"
+
+#include <fdt.h>
+#include <libfdt.h>
+
+#include "libfdt_internal.h"
+
+int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
+					const char *name, int namelen,
+					uint32_t idx, const void *val,
+					int len)
+{
+	void *propval;
+	int proplen;
+
+	propval = fdt_getprop_namelen_w(fdt, nodeoffset, name, namelen,
+					&proplen);
+	if (!propval)
+		return proplen;
+
+	if (proplen < (len + idx))
+		return -FDT_ERR_NOSPACE;
+
+	memcpy((char *)propval + idx, val, len);
+	return 0;
+}
+
+int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
+			const void *val, int len)
+{
+	const void *propval;
+	int proplen;
+
+	propval = fdt_getprop(fdt, nodeoffset, name, &proplen);
+	if (! propval)
+		return proplen;
+
+	if (proplen != len)
+		return -FDT_ERR_NOSPACE;
+
+	return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
+						   strlen(name), 0,
+						   val, len);
+}
+
+static void _fdt_nop_region(void *start, int len)
+{
+	fdt32_t *p;
+
+	for (p = start; (char *)p < ((char *)start + len); p++)
+		*p = cpu_to_fdt32(FDT_NOP);
+}
+
+int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
+{
+	struct fdt_property *prop;
+	int len;
+
+	prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
+	if (! prop)
+		return len;
+
+	_fdt_nop_region(prop, len + sizeof(*prop));
+
+	return 0;
+}
+
+int _fdt_node_end_offset(void *fdt, int offset)
+{
+	int depth = 0;
+
+	while ((offset >= 0) && (depth >= 0))
+		offset = fdt_next_node(fdt, offset, &depth);
+
+	return offset;
+}
+
+int fdt_nop_node(void *fdt, int nodeoffset)
+{
+	int endoffset;
+
+	endoffset = _fdt_node_end_offset(fdt, nodeoffset);
+	if (endoffset < 0)
+		return endoffset;
+
+	_fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0),
+			endoffset - nodeoffset);
+	return 0;
+}
diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h
new file mode 100644
index 0000000000..9e71bb9e03
--- /dev/null
+++ b/scripts/dtc/libfdt/libfdt.h
@@ -0,0 +1,1833 @@
+#ifndef _LIBFDT_H
+#define _LIBFDT_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "libfdt_env.h"
+#include "fdt.h"
+
+#define FDT_FIRST_SUPPORTED_VERSION	0x10
+#define FDT_LAST_SUPPORTED_VERSION	0x11
+
+/* Error codes: informative error codes */
+#define FDT_ERR_NOTFOUND	1
+	/* FDT_ERR_NOTFOUND: The requested node or property does not exist */
+#define FDT_ERR_EXISTS		2
+	/* FDT_ERR_EXISTS: Attempted to create a node or property which
+	 * already exists */
+#define FDT_ERR_NOSPACE		3
+	/* FDT_ERR_NOSPACE: Operation needed to expand the device
+	 * tree, but its buffer did not have sufficient space to
+	 * contain the expanded tree. Use fdt_open_into() to move the
+	 * device tree to a buffer with more space. */
+
+/* Error codes: codes for bad parameters */
+#define FDT_ERR_BADOFFSET	4
+	/* FDT_ERR_BADOFFSET: Function was passed a structure block
+	 * offset which is out-of-bounds, or which points to an
+	 * unsuitable part of the structure for the operation. */
+#define FDT_ERR_BADPATH		5
+	/* FDT_ERR_BADPATH: Function was passed a badly formatted path
+	 * (e.g. missing a leading / for a function which requires an
+	 * absolute path) */
+#define FDT_ERR_BADPHANDLE	6
+	/* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle.
+	 * This can be caused either by an invalid phandle property
+	 * length, or the phandle value was either 0 or -1, which are
+	 * not permitted. */
+#define FDT_ERR_BADSTATE	7
+	/* FDT_ERR_BADSTATE: Function was passed an incomplete device
+	 * tree created by the sequential-write functions, which is
+	 * not sufficiently complete for the requested operation. */
+
+/* Error codes: codes for bad device tree blobs */
+#define FDT_ERR_TRUNCATED	8
+	/* FDT_ERR_TRUNCATED: Structure block of the given device tree
+	 * ends without an FDT_END tag. */
+#define FDT_ERR_BADMAGIC	9
+	/* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a
+	 * device tree at all - it is missing the flattened device
+	 * tree magic number. */
+#define FDT_ERR_BADVERSION	10
+	/* FDT_ERR_BADVERSION: Given device tree has a version which
+	 * can't be handled by the requested operation.  For
+	 * read-write functions, this may mean that fdt_open_into() is
+	 * required to convert the tree to the expected version. */
+#define FDT_ERR_BADSTRUCTURE	11
+	/* FDT_ERR_BADSTRUCTURE: Given device tree has a corrupt
+	 * structure block or other serious error (e.g. misnested
+	 * nodes, or subnodes preceding properties). */
+#define FDT_ERR_BADLAYOUT	12
+	/* FDT_ERR_BADLAYOUT: For read-write functions, the given
+	 * device tree has it's sub-blocks in an order that the
+	 * function can't handle (memory reserve map, then structure,
+	 * then strings).  Use fdt_open_into() to reorganize the tree
+	 * into a form suitable for the read-write operations. */
+
+/* "Can't happen" error indicating a bug in libfdt */
+#define FDT_ERR_INTERNAL	13
+	/* FDT_ERR_INTERNAL: libfdt has failed an internal assertion.
+	 * Should never be returned, if it is, it indicates a bug in
+	 * libfdt itself. */
+
+/* Errors in device tree content */
+#define FDT_ERR_BADNCELLS	14
+	/* FDT_ERR_BADNCELLS: Device tree has a #address-cells, #size-cells
+	 * or similar property with a bad format or value */
+
+#define FDT_ERR_BADVALUE	15
+	/* FDT_ERR_BADVALUE: Device tree has a property with an unexpected
+	 * value. For example: a property expected to contain a string list
+	 * is not NUL-terminated within the length of its value. */
+
+#define FDT_ERR_BADOVERLAY	16
+	/* FDT_ERR_BADOVERLAY: The device tree overlay, while
+	 * correctly structured, cannot be applied due to some
+	 * unexpected or missing value, property or node. */
+
+#define FDT_ERR_NOPHANDLES	17
+	/* FDT_ERR_NOPHANDLES: The device tree doesn't have any
+	 * phandle available anymore without causing an overflow */
+
+#define FDT_ERR_MAX		17
+
+/**********************************************************************/
+/* Low-level functions (you probably don't need these)                */
+/**********************************************************************/
+
+const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen);
+static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
+{
+	return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen);
+}
+
+uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
+
+/**********************************************************************/
+/* Traversal functions                                                */
+/**********************************************************************/
+
+int fdt_next_node(const void *fdt, int offset, int *depth);
+
+/**
+ * fdt_first_subnode() - get offset of first direct subnode
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of node to check
+ * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none
+ */
+int fdt_first_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_next_subnode() - get offset of next direct subnode
+ *
+ * After first calling fdt_first_subnode(), call this function repeatedly to
+ * get direct subnodes of a parent node.
+ *
+ * @fdt:	FDT blob
+ * @offset:	Offset of previous subnode
+ * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more
+ * subnodes
+ */
+int fdt_next_subnode(const void *fdt, int offset);
+
+/**
+ * fdt_for_each_subnode - iterate over all subnodes of a parent
+ *
+ * @node:	child node (int, lvalue)
+ * @fdt:	FDT blob (const void *)
+ * @parent:	parent node (int)
+ *
+ * This is actually a wrapper around a for loop and would be used like so:
+ *
+ *	fdt_for_each_subnode(node, fdt, parent) {
+ *		Use node
+ *		...
+ *	}
+ *
+ *	if ((node < 0) && (node != -FDT_ERR_NOT_FOUND)) {
+ *		Error handling
+ *	}
+ *
+ * Note that this is implemented as a macro and @node is used as
+ * iterator in the loop. The parent variable be constant or even a
+ * literal.
+ *
+ */
+#define fdt_for_each_subnode(node, fdt, parent)		\
+	for (node = fdt_first_subnode(fdt, parent);	\
+	     node >= 0;					\
+	     node = fdt_next_subnode(fdt, node))
+
+/**********************************************************************/
+/* General functions                                                  */
+/**********************************************************************/
+
+#define fdt_get_header(fdt, field) \
+	(fdt32_to_cpu(((const struct fdt_header *)(fdt))->field))
+#define fdt_magic(fdt)			(fdt_get_header(fdt, magic))
+#define fdt_totalsize(fdt)		(fdt_get_header(fdt, totalsize))
+#define fdt_off_dt_struct(fdt)		(fdt_get_header(fdt, off_dt_struct))
+#define fdt_off_dt_strings(fdt)		(fdt_get_header(fdt, off_dt_strings))
+#define fdt_off_mem_rsvmap(fdt)		(fdt_get_header(fdt, off_mem_rsvmap))
+#define fdt_version(fdt)		(fdt_get_header(fdt, version))
+#define fdt_last_comp_version(fdt)	(fdt_get_header(fdt, last_comp_version))
+#define fdt_boot_cpuid_phys(fdt)	(fdt_get_header(fdt, boot_cpuid_phys))
+#define fdt_size_dt_strings(fdt)	(fdt_get_header(fdt, size_dt_strings))
+#define fdt_size_dt_struct(fdt)		(fdt_get_header(fdt, size_dt_struct))
+
+#define __fdt_set_hdr(name) \
+	static inline void fdt_set_##name(void *fdt, uint32_t val) \
+	{ \
+		struct fdt_header *fdth = (struct fdt_header *)fdt; \
+		fdth->name = cpu_to_fdt32(val); \
+	}
+__fdt_set_hdr(magic);
+__fdt_set_hdr(totalsize);
+__fdt_set_hdr(off_dt_struct);
+__fdt_set_hdr(off_dt_strings);
+__fdt_set_hdr(off_mem_rsvmap);
+__fdt_set_hdr(version);
+__fdt_set_hdr(last_comp_version);
+__fdt_set_hdr(boot_cpuid_phys);
+__fdt_set_hdr(size_dt_strings);
+__fdt_set_hdr(size_dt_struct);
+#undef __fdt_set_hdr
+
+/**
+ * fdt_check_header - sanity check a device tree or possible device tree
+ * @fdt: pointer to data which might be a flattened device tree
+ *
+ * fdt_check_header() checks that the given buffer contains what
+ * appears to be a flattened device tree with sane information in its
+ * header.
+ *
+ * returns:
+ *     0, if the buffer appears to contain a valid device tree
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings, as above
+ */
+int fdt_check_header(const void *fdt);
+
+/**
+ * fdt_move - move a device tree around in memory
+ * @fdt: pointer to the device tree to move
+ * @buf: pointer to memory where the device is to be moved
+ * @bufsize: size of the memory space at buf
+ *
+ * fdt_move() relocates, if possible, the device tree blob located at
+ * fdt to the buffer at buf of size bufsize.  The buffer may overlap
+ * with the existing device tree blob at fdt.  Therefore,
+ *     fdt_move(fdt, fdt, fdt_totalsize(fdt))
+ * should always succeed.
+ *
+ * returns:
+ *     0, on success
+ *     -FDT_ERR_NOSPACE, bufsize is insufficient to contain the device tree
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_move(const void *fdt, void *buf, int bufsize);
+
+/**********************************************************************/
+/* Read-only functions                                                */
+/**********************************************************************/
+
+/**
+ * fdt_string - retrieve a string from the strings block of a device tree
+ * @fdt: pointer to the device tree blob
+ * @stroffset: offset of the string within the strings block (native endian)
+ *
+ * fdt_string() retrieves a pointer to a single string from the
+ * strings block of the device tree blob at fdt.
+ *
+ * returns:
+ *     a pointer to the string, on success
+ *     NULL, if stroffset is out of bounds
+ */
+const char *fdt_string(const void *fdt, int stroffset);
+
+/**
+ * fdt_get_max_phandle - retrieves the highest phandle in a tree
+ * @fdt: pointer to the device tree blob
+ *
+ * fdt_get_max_phandle retrieves the highest phandle in the given
+ * device tree. This will ignore badly formatted phandles, or phandles
+ * with a value of 0 or -1.
+ *
+ * returns:
+ *      the highest phandle on success
+ *      0, if no phandle was found in the device tree
+ *      -1, if an error occurred
+ */
+uint32_t fdt_get_max_phandle(const void *fdt);
+
+/**
+ * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
+ * @fdt: pointer to the device tree blob
+ *
+ * Returns the number of entries in the device tree blob's memory
+ * reservation map.  This does not include the terminating 0,0 entry
+ * or any other (0,0) entries reserved for expansion.
+ *
+ * returns:
+ *     the number of entries
+ */
+int fdt_num_mem_rsv(const void *fdt);
+
+/**
+ * fdt_get_mem_rsv - retrieve one memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @address, @size: pointers to 64-bit variables
+ *
+ * On success, *address and *size will contain the address and size of
+ * the n-th reserve map entry from the device tree blob, in
+ * native-endian format.
+ *
+ * returns:
+ *     0, on success
+ *     -FDT_ERR_BADMAGIC,
+ *     -FDT_ERR_BADVERSION,
+ *     -FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
+
+/**
+ * fdt_subnode_offset_namelen - find a subnode based on substring
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_subnode_offset(), but only examine the first
+ * namelen characters of name for matching the subnode name.  This is
+ * useful for finding subnodes based on a portion of a larger string,
+ * such as a full path.
+ */
+int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
+			       const char *name, int namelen);
+/**
+ * fdt_subnode_offset - find a subnode of a given node
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ *
+ * fdt_subnode_offset() finds a subnode of the node at structure block
+ * offset parentoffset with the given name.  name may include a unit
+ * address, in which case fdt_subnode_offset() will find the subnode
+ * with that unit address, or the unit address may be omitted, in
+ * which case fdt_subnode_offset() will find an arbitrary subnode
+ * whose name excluding unit address matches the given name.
+ *
+ * returns:
+ *	structure block offset of the requested subnode (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
+ *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
+ *		tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
+
+/**
+ * fdt_path_offset_namelen - find a tree node by its full path
+ * @fdt: pointer to the device tree blob
+ * @path: full path of the node to locate
+ * @namelen: number of characters of path to consider
+ *
+ * Identical to fdt_path_offset(), but only consider the first namelen
+ * characters of path as the path name.
+ */
+int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen);
+
+/**
+ * fdt_path_offset - find a tree node by its full path
+ * @fdt: pointer to the device tree blob
+ * @path: full path of the node to locate
+ *
+ * fdt_path_offset() finds a node of a given path in the device tree.
+ * Each path component may omit the unit address portion, but the
+ * results of this are undefined if any such path component is
+ * ambiguous (that is if there are multiple nodes at the relevant
+ * level matching the given component, differentiated only by unit
+ * address).
+ *
+ * returns:
+ *	structure block offset of the node with the requested path (>=0), on
+ *		success
+ *	-FDT_ERR_BADPATH, given path does not begin with '/' or is invalid
+ *	-FDT_ERR_NOTFOUND, if the requested node does not exist
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_path_offset(const void *fdt, const char *path);
+
+/**
+ * fdt_get_name - retrieve the name of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of the starting node
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_name() retrieves the name (including unit address) of the
+ * device tree node at structure block offset nodeoffset.  If lenp is
+ * non-NULL, the length of this name is also returned, in the integer
+ * pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the node's name, on success
+ *		If lenp is non-NULL, *lenp contains the length of that name
+ *			(>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE, standard meanings
+ */
+const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
+
+/**
+ * fdt_first_property_offset - find the offset of a node's first property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of a node
+ *
+ * fdt_first_property_offset() finds the first property of the node at
+ * the given structure block offset.
+ *
+ * returns:
+ *	structure block offset of the property (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the requested node has no properties
+ *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_BEGIN_NODE tag
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_first_property_offset(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_next_property_offset - step through a node's properties
+ * @fdt: pointer to the device tree blob
+ * @offset: structure block offset of a property
+ *
+ * fdt_next_property_offset() finds the property immediately after the
+ * one at the given structure block offset.  This will be a property
+ * of the same node as the given property.
+ *
+ * returns:
+ *	structure block offset of the next property (>=0), on success
+ *	-FDT_ERR_NOTFOUND, if the given property is the last in its node
+ *	-FDT_ERR_BADOFFSET, if nodeoffset did not point to an FDT_PROP tag
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_next_property_offset(const void *fdt, int offset);
+
+/**
+ * fdt_for_each_property_offset - iterate over all properties of a node
+ *
+ * @property_offset:	property offset (int, lvalue)
+ * @fdt:		FDT blob (const void *)
+ * @node:		node offset (int)
+ *
+ * This is actually a wrapper around a for loop and would be used like so:
+ *
+ *	fdt_for_each_property_offset(property, fdt, node) {
+ *		Use property
+ *		...
+ *	}
+ *
+ *	if ((property < 0) && (property != -FDT_ERR_NOT_FOUND)) {
+ *		Error handling
+ *	}
+ *
+ * Note that this is implemented as a macro and property is used as
+ * iterator in the loop. The node variable can be constant or even a
+ * literal.
+ */
+#define fdt_for_each_property_offset(property, fdt, node)	\
+	for (property = fdt_first_property_offset(fdt, node);	\
+	     property >= 0;					\
+	     property = fdt_next_property_offset(fdt, property))
+
+/**
+ * fdt_get_property_by_offset - retrieve the property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @offset: offset of the property to retrieve
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_property_by_offset() retrieves a pointer to the
+ * fdt_property structure within the device tree blob at the given
+ * offset.  If lenp is non-NULL, the length of the property value is
+ * also returned, in the integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the structure representing the property
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const struct fdt_property *fdt_get_property_by_offset(const void *fdt,
+						      int offset,
+						      int *lenp);
+
+/**
+ * fdt_get_property_namelen - find a property based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_get_property(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+const struct fdt_property *fdt_get_property_namelen(const void *fdt,
+						    int nodeoffset,
+						    const char *name,
+						    int namelen, int *lenp);
+
+/**
+ * fdt_get_property - find a given property in a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_get_property() retrieves a pointer to the fdt_property
+ * structure within the device tree blob corresponding to the property
+ * named 'name' of the node at offset nodeoffset.  If lenp is
+ * non-NULL, the length of the property value is also returned, in the
+ * integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the structure representing the property
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_NOTFOUND, node does not have named property
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset,
+					    const char *name, int *lenp);
+static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
+						      const char *name,
+						      int *lenp)
+{
+	return (struct fdt_property *)(uintptr_t)
+		fdt_get_property(fdt, nodeoffset, name, lenp);
+}
+
+/**
+ * fdt_getprop_by_offset - retrieve the value of a property at a given offset
+ * @fdt: pointer to the device tree blob
+ * @ffset: offset of the property to read
+ * @namep: pointer to a string variable (will be overwritten) or NULL
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_getprop_by_offset() retrieves a pointer to the value of the
+ * property at structure block offset 'offset' (this will be a pointer
+ * to within the device blob itself, not a copy of the value).  If
+ * lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by lenp.  If namep is non-NULL,
+ * the property's namne will also be returned in the char * pointed to
+ * by namep (this will be a pointer to within the device tree's string
+ * block, not a new copy of the name).
+ *
+ * returns:
+ *	pointer to the property's value
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *		if namep is non-NULL *namep contiains a pointer to the property
+ *		name.
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_PROP tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const void *fdt_getprop_by_offset(const void *fdt, int offset,
+				  const char **namep, int *lenp);
+
+/**
+ * fdt_getprop_namelen - get property value based on substring
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @namelen: number of characters of name to consider
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * Identical to fdt_getprop(), but only examine the first namelen
+ * characters of name for matching the property name.
+ */
+const void *fdt_getprop_namelen(const void *fdt, int nodeoffset,
+				const char *name, int namelen, int *lenp);
+static inline void *fdt_getprop_namelen_w(void *fdt, int nodeoffset,
+					  const char *name, int namelen,
+					  int *lenp)
+{
+	return (void *)(uintptr_t)fdt_getprop_namelen(fdt, nodeoffset, name,
+						      namelen, lenp);
+}
+
+/**
+ * fdt_getprop - retrieve the value of a given property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to find
+ * @name: name of the property to find
+ * @lenp: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_getprop() retrieves a pointer to the value of the property
+ * named 'name' of the node at offset nodeoffset (this will be a
+ * pointer to within the device blob itself, not a copy of the value).
+ * If lenp is non-NULL, the length of the property value is also
+ * returned, in the integer pointed to by lenp.
+ *
+ * returns:
+ *	pointer to the property's value
+ *		if lenp is non-NULL, *lenp contains the length of the property
+ *		value (>=0)
+ *	NULL, on error
+ *		if lenp is non-NULL, *lenp contains an error code (<0):
+ *		-FDT_ERR_NOTFOUND, node does not have named property
+ *		-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE
+ *			tag
+ *		-FDT_ERR_BADMAGIC,
+ *		-FDT_ERR_BADVERSION,
+ *		-FDT_ERR_BADSTATE,
+ *		-FDT_ERR_BADSTRUCTURE,
+ *		-FDT_ERR_TRUNCATED, standard meanings
+ */
+const void *fdt_getprop(const void *fdt, int nodeoffset,
+			const char *name, int *lenp);
+static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
+				  const char *name, int *lenp)
+{
+	return (void *)(uintptr_t)fdt_getprop(fdt, nodeoffset, name, lenp);
+}
+
+/**
+ * fdt_get_phandle - retrieve the phandle of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of the node
+ *
+ * fdt_get_phandle() retrieves the phandle of the device tree node at
+ * structure block offset nodeoffset.
+ *
+ * returns:
+ *	the phandle of the node at nodeoffset, on success (!= 0, != -1)
+ *	0, if the node has no phandle, or another error occurs
+ */
+uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_get_alias_namelen - get alias based on substring
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_get_alias(), but only examine the first namelen
+ * characters of name for matching the alias name.
+ */
+const char *fdt_get_alias_namelen(const void *fdt,
+				  const char *name, int namelen);
+
+/**
+ * fdt_get_alias - retrieve the path referenced by a given alias
+ * @fdt: pointer to the device tree blob
+ * @name: name of the alias th look up
+ *
+ * fdt_get_alias() retrieves the value of a given alias.  That is, the
+ * value of the property named 'name' in the node /aliases.
+ *
+ * returns:
+ *	a pointer to the expansion of the alias named 'name', if it exists
+ *	NULL, if the given alias or the /aliases node does not exist
+ */
+const char *fdt_get_alias(const void *fdt, const char *name);
+
+/**
+ * fdt_get_path - determine the full path of a node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose path to find
+ * @buf: character buffer to contain the returned path (will be overwritten)
+ * @buflen: size of the character buffer at buf
+ *
+ * fdt_get_path() computes the full path of the node at offset
+ * nodeoffset, and records that path in the buffer at buf.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	0, on success
+ *		buf contains the absolute path of the node at
+ *		nodeoffset, as a NUL-terminated string.
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_NOSPACE, the path of the given node is longer than (bufsize-1)
+ *		characters and will not fit in the given buffer.
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen);
+
+/**
+ * fdt_supernode_atdepth_offset - find a specific ancestor of a node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ * @supernodedepth: depth of the ancestor to find
+ * @nodedepth: pointer to an integer variable (will be overwritten) or NULL
+ *
+ * fdt_supernode_atdepth_offset() finds an ancestor of the given node
+ * at a specific depth from the root (where the root itself has depth
+ * 0, its immediate subnodes depth 1 and so forth).  So
+ *	fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, NULL);
+ * will always return 0, the offset of the root node.  If the node at
+ * nodeoffset has depth D, then:
+ *	fdt_supernode_atdepth_offset(fdt, nodeoffset, D, NULL);
+ * will return nodeoffset itself.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	structure block offset of the node at node offset's ancestor
+ *		of depth supernodedepth (>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_NOTFOUND, supernodedepth was greater than the depth of
+ *		nodeoffset
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
+				 int supernodedepth, int *nodedepth);
+
+/**
+ * fdt_node_depth - find the depth of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ *
+ * fdt_node_depth() finds the depth of a given node.  The root node
+ * has depth 0, its immediate subnodes depth 1 and so forth.
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset.
+ *
+ * returns:
+ *	depth of the node at nodeoffset (>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_depth(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_parent_offset - find the parent of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose parent to find
+ *
+ * fdt_parent_offset() locates the parent node of a given node (that
+ * is, it finds the offset of the node which contains the node at
+ * nodeoffset as a subnode).
+ *
+ * NOTE: This function is expensive, as it must scan the device tree
+ * structure from the start to nodeoffset, *twice*.
+ *
+ * returns:
+ *	structure block offset of the parent of the node at nodeoffset
+ *		(>=0), on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_parent_offset(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_node_offset_by_prop_value - find nodes with a given property value
+ * @fdt: pointer to the device tree blob
+ * @startoffset: only find nodes after this offset
+ * @propname: property name to check
+ * @propval: property value to search for
+ * @proplen: length of the value in propval
+ *
+ * fdt_node_offset_by_prop_value() returns the offset of the first
+ * node after startoffset, which has a property named propname whose
+ * value is of length proplen and has value equal to propval; or if
+ * startoffset is -1, the very first such node in the tree.
+ *
+ * To iterate through all nodes matching the criterion, the following
+ * idiom can be used:
+ *	offset = fdt_node_offset_by_prop_value(fdt, -1, propname,
+ *					       propval, proplen);
+ *	while (offset != -FDT_ERR_NOTFOUND) {
+ *		// other code here
+ *		offset = fdt_node_offset_by_prop_value(fdt, offset, propname,
+ *						       propval, proplen);
+ *	}
+ *
+ * Note the -1 in the first call to the function, if 0 is used here
+ * instead, the function will never locate the root node, even if it
+ * matches the criterion.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0, >startoffset),
+ *		 on success
+ *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
+ *		tree after startoffset
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
+				  const char *propname,
+				  const void *propval, int proplen);
+
+/**
+ * fdt_node_offset_by_phandle - find the node with a given phandle
+ * @fdt: pointer to the device tree blob
+ * @phandle: phandle value
+ *
+ * fdt_node_offset_by_phandle() returns the offset of the node
+ * which has the given phandle value.  If there is more than one node
+ * in the tree with the given phandle (an invalid tree), results are
+ * undefined.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0), on success
+ *	-FDT_ERR_NOTFOUND, no node with that phandle exists
+ *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle);
+
+/**
+ * fdt_node_check_compatible: check a node's compatible property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @compatible: string to match against
+ *
+ *
+ * fdt_node_check_compatible() returns 0 if the given node contains a
+ * 'compatible' property with the given string as one of its elements,
+ * it returns non-zero otherwise, or on error.
+ *
+ * returns:
+ *	0, if the node has a 'compatible' property listing the given string
+ *	1, if the node has a 'compatible' property, but it does not list
+ *		the given string
+ *	-FDT_ERR_NOTFOUND, if the given node has no 'compatible' property
+ *	-FDT_ERR_BADOFFSET, if nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_check_compatible(const void *fdt, int nodeoffset,
+			      const char *compatible);
+
+/**
+ * fdt_node_offset_by_compatible - find nodes with a given 'compatible' value
+ * @fdt: pointer to the device tree blob
+ * @startoffset: only find nodes after this offset
+ * @compatible: 'compatible' string to match against
+ *
+ * fdt_node_offset_by_compatible() returns the offset of the first
+ * node after startoffset, which has a 'compatible' property which
+ * lists the given compatible string; or if startoffset is -1, the
+ * very first such node in the tree.
+ *
+ * To iterate through all nodes matching the criterion, the following
+ * idiom can be used:
+ *	offset = fdt_node_offset_by_compatible(fdt, -1, compatible);
+ *	while (offset != -FDT_ERR_NOTFOUND) {
+ *		// other code here
+ *		offset = fdt_node_offset_by_compatible(fdt, offset, compatible);
+ *	}
+ *
+ * Note the -1 in the first call to the function, if 0 is used here
+ * instead, the function will never locate the root node, even if it
+ * matches the criterion.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0, >startoffset),
+ *		 on success
+ *	-FDT_ERR_NOTFOUND, no node matching the criterion exists in the
+ *		tree after startoffset
+ *	-FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
+				  const char *compatible);
+
+/**
+ * fdt_stringlist_contains - check a string list property for a string
+ * @strlist: Property containing a list of strings to check
+ * @listlen: Length of property
+ * @str: String to search for
+ *
+ * This is a utility function provided for convenience. The list contains
+ * one or more strings, each terminated by \0, as is found in a device tree
+ * "compatible" property.
+ *
+ * @return: 1 if the string is found in the list, 0 not found, or invalid list
+ */
+int fdt_stringlist_contains(const char *strlist, int listlen, const char *str);
+
+/**
+ * fdt_stringlist_count - count the number of strings in a string list
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @return:
+ *   the number of strings in the given property
+ *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *   -FDT_ERR_NOTFOUND if the property does not exist
+ */
+int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property);
+
+/**
+ * fdt_stringlist_search - find a string in a string list and return its index
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @string: string to look up in the string list
+ *
+ * Note that it is possible for this function to succeed on property values
+ * that are not NUL-terminated. That's because the function will stop after
+ * finding the first occurrence of @string. This can for example happen with
+ * small-valued cell properties, such as #address-cells, when searching for
+ * the empty string.
+ *
+ * @return:
+ *   the index of the string in the list of strings
+ *   -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *   -FDT_ERR_NOTFOUND if the property does not exist or does not contain
+ *                     the given string
+ */
+int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property,
+			  const char *string);
+
+/**
+ * fdt_stringlist_get() - obtain the string at a given index in a string list
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of a tree node
+ * @property: name of the property containing the string list
+ * @index: index of the string to return
+ * @lenp: return location for the string length or an error code on failure
+ *
+ * Note that this will successfully extract strings from properties with
+ * non-NUL-terminated values. For example on small-valued cell properties
+ * this function will return the empty string.
+ *
+ * If non-NULL, the length of the string (on success) or a negative error-code
+ * (on failure) will be stored in the integer pointer to by lenp.
+ *
+ * @return:
+ *   A pointer to the string at the given index in the string list or NULL on
+ *   failure. On success the length of the string will be stored in the memory
+ *   location pointed to by the lenp parameter, if non-NULL. On failure one of
+ *   the following negative error codes will be returned in the lenp parameter
+ *   (if non-NULL):
+ *     -FDT_ERR_BADVALUE if the property value is not NUL-terminated
+ *     -FDT_ERR_NOTFOUND if the property does not exist
+ */
+const char *fdt_stringlist_get(const void *fdt, int nodeoffset,
+			       const char *property, int index,
+			       int *lenp);
+
+/**********************************************************************/
+/* Read-only functions (addressing related)                           */
+/**********************************************************************/
+
+/**
+ * FDT_MAX_NCELLS - maximum value for #address-cells and #size-cells
+ *
+ * This is the maximum value for #address-cells, #size-cells and
+ * similar properties that will be processed by libfdt.  IEE1275
+ * requires that OF implementations handle values up to 4.
+ * Implementations may support larger values, but in practice higher
+ * values aren't used.
+ */
+#define FDT_MAX_NCELLS		4
+
+/**
+ * fdt_address_cells - retrieve address size for a bus represented in the tree
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to find the address size for
+ *
+ * When the node has a valid #address-cells property, returns its value.
+ *
+ * returns:
+ *	0 <= n < FDT_MAX_NCELLS, on success
+ *      2, if the node has no #address-cells property
+ *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
+ *		#address-cells property
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_address_cells(const void *fdt, int nodeoffset);
+
+/**
+ * fdt_size_cells - retrieve address range size for a bus represented in the
+ *                  tree
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to find the address range size for
+ *
+ * When the node has a valid #size-cells property, returns its value.
+ *
+ * returns:
+ *	0 <= n < FDT_MAX_NCELLS, on success
+ *      2, if the node has no #address-cells property
+ *      -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid
+ *		#size-cells property
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_size_cells(const void *fdt, int nodeoffset);
+
+
+/**********************************************************************/
+/* Write-in-place functions                                           */
+/**********************************************************************/
+
+/**
+ * fdt_setprop_inplace_namelen_partial - change a property's value,
+ *                                       but not its size
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @namelen: number of characters of name to consider
+ * @idx: index of the property to change in the array
+ * @val: pointer to data to replace the property value with
+ * @len: length of the property value
+ *
+ * Identical to fdt_setprop_inplace(), but modifies the given property
+ * starting from the given index, and using only the first characters
+ * of the name. It is useful when you want to manipulate only one value of
+ * an array and you have a string that doesn't end with \0.
+ */
+int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset,
+					const char *name, int namelen,
+					uint32_t idx, const void *val,
+					int len);
+
+/**
+ * fdt_setprop_inplace - change a property's value, but not its size
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: pointer to data to replace the property value with
+ * @len: length of the property value
+ *
+ * fdt_setprop_inplace() replaces the value of a given property with
+ * the data in val, of length len.  This function cannot change the
+ * size of a property, and so will only work if len is equal to the
+ * current length of the property.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if len is not equal to the property's current length
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
+			const void *val, int len);
+
+/**
+ * fdt_setprop_inplace_u32 - change the value of a 32-bit integer property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to replace the property with
+ *
+ * fdt_setprop_inplace_u32() replaces the value of a given property
+ * with the 32-bit integer value in val, converting val to big-endian
+ * if necessary.  This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 4.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if the property's length is not equal to 4
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_inplace_u32(void *fdt, int nodeoffset,
+					  const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_inplace_u64 - change the value of a 64-bit integer property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to replace the property with
+ *
+ * fdt_setprop_inplace_u64() replaces the value of a given property
+ * with the 64-bit integer value in val, converting val to big-endian
+ * if necessary.  This function cannot change the size of a property,
+ * and so will only work if the property already exists and has length
+ * 8.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the given property value, and will not alter or move any other part
+ * of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, if the property's length is not equal to 8
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_inplace_u64(void *fdt, int nodeoffset,
+					  const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_setprop_inplace(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_inplace_cell - change the value of a single-cell property
+ *
+ * This is an alternative name for fdt_setprop_inplace_u32()
+ */
+static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
+					   const char *name, uint32_t val)
+{
+	return fdt_setprop_inplace_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_nop_property - replace a property with nop tags
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to nop
+ * @name: name of the property to nop
+ *
+ * fdt_nop_property() will replace a given property's representation
+ * in the blob with FDT_NOP tags, effectively removing it from the
+ * tree.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the property, and will not alter or move any other part of the
+ * tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_nop_property(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_nop_node - replace a node (subtree) with nop tags
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to nop
+ *
+ * fdt_nop_node() will replace a given node's representation in the
+ * blob, including all its subnodes, if any, with FDT_NOP tags,
+ * effectively removing it from the tree.
+ *
+ * This function will alter only the bytes in the blob which contain
+ * the node and its properties and subnodes, and will not alter or
+ * move any other part of the tree.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_nop_node(void *fdt, int nodeoffset);
+
+/**********************************************************************/
+/* Sequential write functions                                         */
+/**********************************************************************/
+
+int fdt_create(void *buf, int bufsize);
+int fdt_resize(void *fdt, void *buf, int bufsize);
+int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
+int fdt_finish_reservemap(void *fdt);
+int fdt_begin_node(void *fdt, const char *name);
+int fdt_property(void *fdt, const char *name, const void *val, int len);
+static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_property(fdt, name, &tmp, sizeof(tmp));
+}
+static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_property(fdt, name, &tmp, sizeof(tmp));
+}
+static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
+{
+	return fdt_property_u32(fdt, name, val);
+}
+#define fdt_property_string(fdt, name, str) \
+	fdt_property(fdt, name, str, strlen(str)+1)
+int fdt_end_node(void *fdt);
+int fdt_finish(void *fdt);
+
+/**********************************************************************/
+/* Read-write functions                                               */
+/**********************************************************************/
+
+int fdt_create_empty_tree(void *buf, int bufsize);
+int fdt_open_into(const void *fdt, void *buf, int bufsize);
+int fdt_pack(void *fdt);
+
+/**
+ * fdt_add_mem_rsv - add one memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @address, @size: 64-bit values (native endian)
+ *
+ * Adds a reserve map entry to the given blob reserving a region at
+ * address address of length size.
+ *
+ * This function will insert data into the reserve map and will
+ * therefore change the indexes of some entries in the table.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new reservation entry
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
+
+/**
+ * fdt_del_mem_rsv - remove a memory reserve map entry
+ * @fdt: pointer to the device tree blob
+ * @n: entry to remove
+ *
+ * fdt_del_mem_rsv() removes the n-th memory reserve map entry from
+ * the blob.
+ *
+ * This function will delete data from the reservation table and will
+ * therefore change the indexes of some entries in the table.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, there is no entry of the given index (i.e. there
+ *		are less than n+1 reserve map entries)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_del_mem_rsv(void *fdt, int n);
+
+/**
+ * fdt_set_name - change the name of a given node
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: structure block offset of a node
+ * @name: name to give the node
+ *
+ * fdt_set_name() replaces the name (including unit address, if any)
+ * of the given node with the given string.  NOTE: this function can't
+ * efficiently check if the new name is unique amongst the given
+ * node's siblings; results are undefined if this function is invoked
+ * with a name equal to one of the given node's siblings.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob
+ *		to contain the new name
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE, standard meanings
+ */
+int fdt_set_name(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_setprop - create or change a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: pointer to data to set the property value to
+ * @len: length of the property value
+ *
+ * fdt_setprop() sets the value of the named property in the given
+ * node to the given value and length, creating the property if it
+ * does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len);
+
+/**
+ * fdt_setprop_u32 - set a property to a 32-bit integer
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value for the property (native endian)
+ *
+ * fdt_setprop_u32() sets the value of the named property in the given
+ * node to the given 32-bit integer value (converting to big-endian if
+ * necessary), or creates a new property with that value if it does
+ * not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_u32(void *fdt, int nodeoffset, const char *name,
+				  uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_u64 - set a property to a 64-bit integer
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value for the property (native endian)
+ *
+ * fdt_setprop_u64() sets the value of the named property in the given
+ * node to the given 64-bit integer value (converting to big-endian if
+ * necessary), or creates a new property with that value if it does
+ * not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_setprop_u64(void *fdt, int nodeoffset, const char *name,
+				  uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_setprop_cell - set a property to a single cell value
+ *
+ * This is an alternative name for fdt_setprop_u32()
+ */
+static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
+				   uint32_t val)
+{
+	return fdt_setprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_setprop_string - set a property to a string value
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @str: string value for the property
+ *
+ * fdt_setprop_string() sets the value of the named property in the
+ * given node to the given string value (using the length of the
+ * string to determine the new length of the property), or creates a
+ * new property with that value if it does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_setprop_string(fdt, nodeoffset, name, str) \
+	fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+
+
+/**
+ * fdt_setprop_empty - set a property to an empty value
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ *
+ * fdt_setprop_empty() sets the value of the named property in the
+ * given node to an empty (zero length) value, or creates a new empty
+ * property if it does not already exist.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_setprop_empty(fdt, nodeoffset, name) \
+	fdt_setprop((fdt), (nodeoffset), (name), NULL, 0)
+
+/**
+ * fdt_appendprop - append to or create a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to append to
+ * @val: pointer to data to append to the property value
+ * @len: length of the data to append to the property value
+ *
+ * fdt_appendprop() appends the value to the named property in the
+ * given node, creating the property if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_appendprop(void *fdt, int nodeoffset, const char *name,
+		   const void *val, int len);
+
+/**
+ * fdt_appendprop_u32 - append a 32-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 32-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u32() appends the given 32-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u32(void *fdt, int nodeoffset,
+				     const char *name, uint32_t val)
+{
+	fdt32_t tmp = cpu_to_fdt32(val);
+	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_appendprop_u64 - append a 64-bit integer value to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @val: 64-bit integer value to append to the property (native endian)
+ *
+ * fdt_appendprop_u64() appends the given 64-bit integer value
+ * (converting to big-endian if necessary) to the value of the named
+ * property in the given node, or creates a new property with that
+ * value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+static inline int fdt_appendprop_u64(void *fdt, int nodeoffset,
+				     const char *name, uint64_t val)
+{
+	fdt64_t tmp = cpu_to_fdt64(val);
+	return fdt_appendprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+/**
+ * fdt_appendprop_cell - append a single cell value to a property
+ *
+ * This is an alternative name for fdt_appendprop_u32()
+ */
+static inline int fdt_appendprop_cell(void *fdt, int nodeoffset,
+				      const char *name, uint32_t val)
+{
+	return fdt_appendprop_u32(fdt, nodeoffset, name, val);
+}
+
+/**
+ * fdt_appendprop_string - append a string to a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @str: string value to append to the property
+ *
+ * fdt_appendprop_string() appends the given string to the value of
+ * the named property in the given node, or creates a new property
+ * with that value if it does not already exist.
+ *
+ * This function may insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+#define fdt_appendprop_string(fdt, nodeoffset, name, str) \
+	fdt_appendprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+
+/**
+ * fdt_delprop - delete a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to nop
+ * @name: name of the property to nop
+ *
+ * fdt_del_property() will delete the given property.
+ *
+ * This function will delete data from the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOTFOUND, node does not have the named property
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_delprop(void *fdt, int nodeoffset, const char *name);
+
+/**
+ * fdt_add_subnode_namelen - creates a new node based on substring
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ * @namelen: number of characters of name to consider
+ *
+ * Identical to fdt_add_subnode(), but use only the first namelen
+ * characters of name as the name of the new node.  This is useful for
+ * creating subnodes based on a portion of a larger string, such as a
+ * full path.
+ */
+int fdt_add_subnode_namelen(void *fdt, int parentoffset,
+			    const char *name, int namelen);
+
+/**
+ * fdt_add_subnode - creates a new node
+ * @fdt: pointer to the device tree blob
+ * @parentoffset: structure block offset of a node
+ * @name: name of the subnode to locate
+ *
+ * fdt_add_subnode() creates a new node as a subnode of the node at
+ * structure block offset parentoffset, with the given name (which
+ * should include the unit address, if any).
+ *
+ * This function will insert data into the blob, and will therefore
+ * change the offsets of some existing nodes.
+
+ * returns:
+ *	structure block offset of the created nodeequested subnode (>=0), on
+ *		success
+ *	-FDT_ERR_NOTFOUND, if the requested subnode does not exist
+ *	-FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE
+ *		tag
+ *	-FDT_ERR_EXISTS, if the node at parentoffset already has a subnode of
+ *		the given name
+ *	-FDT_ERR_NOSPACE, if there is insufficient free space in the
+ *		blob to contain the new node
+ *	-FDT_ERR_NOSPACE
+ *	-FDT_ERR_BADLAYOUT
+ *      -FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings.
+ */
+int fdt_add_subnode(void *fdt, int parentoffset, const char *name);
+
+/**
+ * fdt_del_node - delete a node (subtree)
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node to nop
+ *
+ * fdt_del_node() will remove the given node, including all its
+ * subnodes if any, from the blob.
+ *
+ * This function will delete data from the blob, and will therefore
+ * change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_del_node(void *fdt, int nodeoffset);
+
+/**
+ * fdt_overlay_apply - Applies a DT overlay on a base DT
+ * @fdt: pointer to the base device tree blob
+ * @fdto: pointer to the device tree overlay blob
+ *
+ * fdt_overlay_apply() will apply the given device tree overlay on the
+ * given base device tree.
+ *
+ * Expect the base device tree to be modified, even if the function
+ * returns an error.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there's not enough space in the base device tree
+ *	-FDT_ERR_NOTFOUND, the overlay points to some inexistant nodes or
+ *		properties in the base DT
+ *	-FDT_ERR_BADPHANDLE,
+ *	-FDT_ERR_BADOVERLAY,
+ *	-FDT_ERR_NOPHANDLES,
+ *	-FDT_ERR_INTERNAL,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADOFFSET,
+ *	-FDT_ERR_BADPATH,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_overlay_apply(void *fdt, void *fdto);
+
+/**********************************************************************/
+/* Debugging / informational functions                                */
+/**********************************************************************/
+
+const char *fdt_strerror(int errval);
+
+#endif /* _LIBFDT_H */
diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h
new file mode 100644
index 0000000000..99f936dacc
--- /dev/null
+++ b/scripts/dtc/libfdt/libfdt_env.h
@@ -0,0 +1,112 @@
+#ifndef _LIBFDT_ENV_H
+#define _LIBFDT_ENV_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ * Copyright 2012 Kim Phillips, Freescale Semiconductor.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#ifdef __CHECKER__
+#define __force __attribute__((force))
+#define __bitwise __attribute__((bitwise))
+#else
+#define __force
+#define __bitwise
+#endif
+
+typedef uint16_t __bitwise fdt16_t;
+typedef uint32_t __bitwise fdt32_t;
+typedef uint64_t __bitwise fdt64_t;
+
+#define EXTRACT_BYTE(x, n)	((unsigned long long)((uint8_t *)&x)[n])
+#define CPU_TO_FDT16(x) ((EXTRACT_BYTE(x, 0) << 8) | EXTRACT_BYTE(x, 1))
+#define CPU_TO_FDT32(x) ((EXTRACT_BYTE(x, 0) << 24) | (EXTRACT_BYTE(x, 1) << 16) | \
+			 (EXTRACT_BYTE(x, 2) << 8) | EXTRACT_BYTE(x, 3))
+#define CPU_TO_FDT64(x) ((EXTRACT_BYTE(x, 0) << 56) | (EXTRACT_BYTE(x, 1) << 48) | \
+			 (EXTRACT_BYTE(x, 2) << 40) | (EXTRACT_BYTE(x, 3) << 32) | \
+			 (EXTRACT_BYTE(x, 4) << 24) | (EXTRACT_BYTE(x, 5) << 16) | \
+			 (EXTRACT_BYTE(x, 6) << 8) | EXTRACT_BYTE(x, 7))
+
+static inline uint16_t fdt16_to_cpu(fdt16_t x)
+{
+	return (__force uint16_t)CPU_TO_FDT16(x);
+}
+static inline fdt16_t cpu_to_fdt16(uint16_t x)
+{
+	return (__force fdt16_t)CPU_TO_FDT16(x);
+}
+
+static inline uint32_t fdt32_to_cpu(fdt32_t x)
+{
+	return (__force uint32_t)CPU_TO_FDT32(x);
+}
+static inline fdt32_t cpu_to_fdt32(uint32_t x)
+{
+	return (__force fdt32_t)CPU_TO_FDT32(x);
+}
+
+static inline uint64_t fdt64_to_cpu(fdt64_t x)
+{
+	return (__force uint64_t)CPU_TO_FDT64(x);
+}
+static inline fdt64_t cpu_to_fdt64(uint64_t x)
+{
+	return (__force fdt64_t)CPU_TO_FDT64(x);
+}
+#undef CPU_TO_FDT64
+#undef CPU_TO_FDT32
+#undef CPU_TO_FDT16
+#undef EXTRACT_BYTE
+
+#endif /* _LIBFDT_ENV_H */
diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h
new file mode 100644
index 0000000000..02cfa6fb61
--- /dev/null
+++ b/scripts/dtc/libfdt/libfdt_internal.h
@@ -0,0 +1,95 @@
+#ifndef _LIBFDT_INTERNAL_H
+#define _LIBFDT_INTERNAL_H
+/*
+ * libfdt - Flat Device Tree manipulation
+ * Copyright (C) 2006 David Gibson, IBM Corporation.
+ *
+ * libfdt is dual licensed: you can use it either under the terms of
+ * the GPL, or the BSD license, at your option.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Alternatively,
+ *
+ *  b) Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *     1. Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *     2. Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ *     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ *     CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ *     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ *     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ *     CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *     SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ *     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ *     HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ *     OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ *     EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <fdt.h>
+
+#define FDT_ALIGN(x, a)		(((x) + (a) - 1) & ~((a) - 1))
+#define FDT_TAGALIGN(x)		(FDT_ALIGN((x), FDT_TAGSIZE))
+
+#define FDT_CHECK_HEADER(fdt) \
+	{ \
+		int __err; \
+		if ((__err = fdt_check_header(fdt)) != 0) \
+			return __err; \
+	}
+
+int _fdt_check_node_offset(const void *fdt, int offset);
+int _fdt_check_prop_offset(const void *fdt, int offset);
+const char *_fdt_find_string(const char *strtab, int tabsize, const char *s);
+int _fdt_node_end_offset(void *fdt, int nodeoffset);
+
+static inline const void *_fdt_offset_ptr(const void *fdt, int offset)
+{
+	return (const char *)fdt + fdt_off_dt_struct(fdt) + offset;
+}
+
+static inline void *_fdt_offset_ptr_w(void *fdt, int offset)
+{
+	return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset);
+}
+
+static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)
+{
+	const struct fdt_reserve_entry *rsv_table =
+		(const struct fdt_reserve_entry *)
+		((const char *)fdt + fdt_off_mem_rsvmap(fdt));
+
+	return rsv_table + n;
+}
+static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)
+{
+	return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n);
+}
+
+#define FDT_SW_MAGIC		(~FDT_MAGIC)
+
+#endif /* _LIBFDT_INTERNAL_H */
diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c
new file mode 100644
index 0000000000..36be9afefd
--- /dev/null
+++ b/scripts/dtc/livetree.c
@@ -0,0 +1,980 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+/*
+ * Tree building functions
+ */
+
+void add_label(struct label **labels, char *label)
+{
+	struct label *new;
+
+	/* Make sure the label isn't already there */
+	for_each_label_withdel(*labels, new)
+		if (streq(new->label, label)) {
+			new->deleted = 0;
+			return;
+		}
+
+	new = xmalloc(sizeof(*new));
+	memset(new, 0, sizeof(*new));
+	new->label = label;
+	new->next = *labels;
+	*labels = new;
+}
+
+void delete_labels(struct label **labels)
+{
+	struct label *label;
+
+	for_each_label(*labels, label)
+		label->deleted = 1;
+}
+
+struct property *build_property(char *name, struct data val)
+{
+	struct property *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->name = name;
+	new->val = val;
+
+	return new;
+}
+
+struct property *build_property_delete(char *name)
+{
+	struct property *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->name = name;
+	new->deleted = 1;
+
+	return new;
+}
+
+struct property *chain_property(struct property *first, struct property *list)
+{
+	assert(first->next == NULL);
+
+	first->next = list;
+	return first;
+}
+
+struct property *reverse_properties(struct property *first)
+{
+	struct property *p = first;
+	struct property *head = NULL;
+	struct property *next;
+
+	while (p) {
+		next = p->next;
+		p->next = head;
+		head = p;
+		p = next;
+	}
+	return head;
+}
+
+struct node *build_node(struct property *proplist, struct node *children)
+{
+	struct node *new = xmalloc(sizeof(*new));
+	struct node *child;
+
+	memset(new, 0, sizeof(*new));
+
+	new->proplist = reverse_properties(proplist);
+	new->children = children;
+
+	for_each_child(new, child) {
+		child->parent = new;
+	}
+
+	return new;
+}
+
+struct node *build_node_delete(void)
+{
+	struct node *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->deleted = 1;
+
+	return new;
+}
+
+struct node *name_node(struct node *node, char *name)
+{
+	assert(node->name == NULL);
+
+	node->name = name;
+
+	return node;
+}
+
+struct node *merge_nodes(struct node *old_node, struct node *new_node)
+{
+	struct property *new_prop, *old_prop;
+	struct node *new_child, *old_child;
+	struct label *l;
+
+	old_node->deleted = 0;
+
+	/* Add new node labels to old node */
+	for_each_label_withdel(new_node->labels, l)
+		add_label(&old_node->labels, l->label);
+
+	/* Move properties from the new node to the old node.  If there
+	 * is a collision, replace the old value with the new */
+	while (new_node->proplist) {
+		/* Pop the property off the list */
+		new_prop = new_node->proplist;
+		new_node->proplist = new_prop->next;
+		new_prop->next = NULL;
+
+		if (new_prop->deleted) {
+			delete_property_by_name(old_node, new_prop->name);
+			free(new_prop);
+			continue;
+		}
+
+		/* Look for a collision, set new value if there is */
+		for_each_property_withdel(old_node, old_prop) {
+			if (streq(old_prop->name, new_prop->name)) {
+				/* Add new labels to old property */
+				for_each_label_withdel(new_prop->labels, l)
+					add_label(&old_prop->labels, l->label);
+
+				old_prop->val = new_prop->val;
+				old_prop->deleted = 0;
+				free(new_prop);
+				new_prop = NULL;
+				break;
+			}
+		}
+
+		/* if no collision occurred, add property to the old node. */
+		if (new_prop)
+			add_property(old_node, new_prop);
+	}
+
+	/* Move the override child nodes into the primary node.  If
+	 * there is a collision, then merge the nodes. */
+	while (new_node->children) {
+		/* Pop the child node off the list */
+		new_child = new_node->children;
+		new_node->children = new_child->next_sibling;
+		new_child->parent = NULL;
+		new_child->next_sibling = NULL;
+
+		if (new_child->deleted) {
+			delete_node_by_name(old_node, new_child->name);
+			free(new_child);
+			continue;
+		}
+
+		/* Search for a collision.  Merge if there is */
+		for_each_child_withdel(old_node, old_child) {
+			if (streq(old_child->name, new_child->name)) {
+				merge_nodes(old_child, new_child);
+				new_child = NULL;
+				break;
+			}
+		}
+
+		/* if no collision occurred, add child to the old node. */
+		if (new_child)
+			add_child(old_node, new_child);
+	}
+
+	/* The new node contents are now merged into the old node.  Free
+	 * the new node. */
+	free(new_node);
+
+	return old_node;
+}
+
+struct node *chain_node(struct node *first, struct node *list)
+{
+	assert(first->next_sibling == NULL);
+
+	first->next_sibling = list;
+	return first;
+}
+
+void add_property(struct node *node, struct property *prop)
+{
+	struct property **p;
+
+	prop->next = NULL;
+
+	p = &node->proplist;
+	while (*p)
+		p = &((*p)->next);
+
+	*p = prop;
+}
+
+void delete_property_by_name(struct node *node, char *name)
+{
+	struct property *prop = node->proplist;
+
+	while (prop) {
+		if (streq(prop->name, name)) {
+			delete_property(prop);
+			return;
+		}
+		prop = prop->next;
+	}
+}
+
+void delete_property(struct property *prop)
+{
+	prop->deleted = 1;
+	delete_labels(&prop->labels);
+}
+
+void add_child(struct node *parent, struct node *child)
+{
+	struct node **p;
+
+	child->next_sibling = NULL;
+	child->parent = parent;
+
+	p = &parent->children;
+	while (*p)
+		p = &((*p)->next_sibling);
+
+	*p = child;
+}
+
+void delete_node_by_name(struct node *parent, char *name)
+{
+	struct node *node = parent->children;
+
+	while (node) {
+		if (streq(node->name, name)) {
+			delete_node(node);
+			return;
+		}
+		node = node->next_sibling;
+	}
+}
+
+void delete_node(struct node *node)
+{
+	struct property *prop;
+	struct node *child;
+
+	node->deleted = 1;
+	for_each_child(node, child)
+		delete_node(child);
+	for_each_property(node, prop)
+		delete_property(prop);
+	delete_labels(&node->labels);
+}
+
+void append_to_property(struct node *node,
+				    char *name, const void *data, int len)
+{
+	struct data d;
+	struct property *p;
+
+	p = get_property(node, name);
+	if (p) {
+		d = data_append_data(p->val, data, len);
+		p->val = d;
+	} else {
+		d = data_append_data(empty_data, data, len);
+		p = build_property(name, d);
+		add_property(node, p);
+	}
+}
+
+struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size)
+{
+	struct reserve_info *new = xmalloc(sizeof(*new));
+
+	memset(new, 0, sizeof(*new));
+
+	new->re.address = address;
+	new->re.size = size;
+
+	return new;
+}
+
+struct reserve_info *chain_reserve_entry(struct reserve_info *first,
+					struct reserve_info *list)
+{
+	assert(first->next == NULL);
+
+	first->next = list;
+	return first;
+}
+
+struct reserve_info *add_reserve_entry(struct reserve_info *list,
+				      struct reserve_info *new)
+{
+	struct reserve_info *last;
+
+	new->next = NULL;
+
+	if (! list)
+		return new;
+
+	for (last = list; last->next; last = last->next)
+		;
+
+	last->next = new;
+
+	return list;
+}
+
+struct dt_info *build_dt_info(unsigned int dtsflags,
+			      struct reserve_info *reservelist,
+			      struct node *tree, uint32_t boot_cpuid_phys)
+{
+	struct dt_info *dti;
+
+	dti = xmalloc(sizeof(*dti));
+	dti->dtsflags = dtsflags;
+	dti->reservelist = reservelist;
+	dti->dt = tree;
+	dti->boot_cpuid_phys = boot_cpuid_phys;
+
+	return dti;
+}
+
+/*
+ * Tree accessor functions
+ */
+
+const char *get_unitname(struct node *node)
+{
+	if (node->name[node->basenamelen] == '\0')
+		return "";
+	else
+		return node->name + node->basenamelen + 1;
+}
+
+struct property *get_property(struct node *node, const char *propname)
+{
+	struct property *prop;
+
+	for_each_property(node, prop)
+		if (streq(prop->name, propname))
+			return prop;
+
+	return NULL;
+}
+
+cell_t propval_cell(struct property *prop)
+{
+	assert(prop->val.len == sizeof(cell_t));
+	return fdt32_to_cpu(*((cell_t *)prop->val.val));
+}
+
+struct property *get_property_by_label(struct node *tree, const char *label,
+				       struct node **node)
+{
+	struct property *prop;
+	struct node *c;
+
+	*node = tree;
+
+	for_each_property(tree, prop) {
+		struct label *l;
+
+		for_each_label(prop->labels, l)
+			if (streq(l->label, label))
+				return prop;
+	}
+
+	for_each_child(tree, c) {
+		prop = get_property_by_label(c, label, node);
+		if (prop)
+			return prop;
+	}
+
+	*node = NULL;
+	return NULL;
+}
+
+struct marker *get_marker_label(struct node *tree, const char *label,
+				struct node **node, struct property **prop)
+{
+	struct marker *m;
+	struct property *p;
+	struct node *c;
+
+	*node = tree;
+
+	for_each_property(tree, p) {
+		*prop = p;
+		m = p->val.markers;
+		for_each_marker_of_type(m, LABEL)
+			if (streq(m->ref, label))
+				return m;
+	}
+
+	for_each_child(tree, c) {
+		m = get_marker_label(c, label, node, prop);
+		if (m)
+			return m;
+	}
+
+	*prop = NULL;
+	*node = NULL;
+	return NULL;
+}
+
+struct node *get_subnode(struct node *node, const char *nodename)
+{
+	struct node *child;
+
+	for_each_child(node, child)
+		if (streq(child->name, nodename))
+			return child;
+
+	return NULL;
+}
+
+struct node *get_node_by_path(struct node *tree, const char *path)
+{
+	const char *p;
+	struct node *child;
+
+	if (!path || ! (*path)) {
+		if (tree->deleted)
+			return NULL;
+		return tree;
+	}
+
+	while (path[0] == '/')
+		path++;
+
+	p = strchr(path, '/');
+
+	for_each_child(tree, child) {
+		if (p && strneq(path, child->name, p-path))
+			return get_node_by_path(child, p+1);
+		else if (!p && streq(path, child->name))
+			return child;
+	}
+
+	return NULL;
+}
+
+struct node *get_node_by_label(struct node *tree, const char *label)
+{
+	struct node *child, *node;
+	struct label *l;
+
+	assert(label && (strlen(label) > 0));
+
+	for_each_label(tree->labels, l)
+		if (streq(l->label, label))
+			return tree;
+
+	for_each_child(tree, child) {
+		node = get_node_by_label(child, label);
+		if (node)
+			return node;
+	}
+
+	return NULL;
+}
+
+struct node *get_node_by_phandle(struct node *tree, cell_t phandle)
+{
+	struct node *child, *node;
+
+	assert((phandle != 0) && (phandle != -1));
+
+	if (tree->phandle == phandle) {
+		if (tree->deleted)
+			return NULL;
+		return tree;
+	}
+
+	for_each_child(tree, child) {
+		node = get_node_by_phandle(child, phandle);
+		if (node)
+			return node;
+	}
+
+	return NULL;
+}
+
+struct node *get_node_by_ref(struct node *tree, const char *ref)
+{
+	if (streq(ref, "/"))
+		return tree;
+	else if (ref[0] == '/')
+		return get_node_by_path(tree, ref);
+	else
+		return get_node_by_label(tree, ref);
+}
+
+cell_t get_node_phandle(struct node *root, struct node *node)
+{
+	static cell_t phandle = 1; /* FIXME: ick, static local */
+
+	if ((node->phandle != 0) && (node->phandle != -1))
+		return node->phandle;
+
+	while (get_node_by_phandle(root, phandle))
+		phandle++;
+
+	node->phandle = phandle;
+
+	if (!get_property(node, "linux,phandle")
+	    && (phandle_format & PHANDLE_LEGACY))
+		add_property(node,
+			     build_property("linux,phandle",
+					    data_append_cell(empty_data, phandle)));
+
+	if (!get_property(node, "phandle")
+	    && (phandle_format & PHANDLE_EPAPR))
+		add_property(node,
+			     build_property("phandle",
+					    data_append_cell(empty_data, phandle)));
+
+	/* If the node *does* have a phandle property, we must
+	 * be dealing with a self-referencing phandle, which will be
+	 * fixed up momentarily in the caller */
+
+	return node->phandle;
+}
+
+uint32_t guess_boot_cpuid(struct node *tree)
+{
+	struct node *cpus, *bootcpu;
+	struct property *reg;
+
+	cpus = get_node_by_path(tree, "/cpus");
+	if (!cpus)
+		return 0;
+
+
+	bootcpu = cpus->children;
+	if (!bootcpu)
+		return 0;
+
+	reg = get_property(bootcpu, "reg");
+	if (!reg || (reg->val.len != sizeof(uint32_t)))
+		return 0;
+
+	/* FIXME: Sanity check node? */
+
+	return propval_cell(reg);
+}
+
+static int cmp_reserve_info(const void *ax, const void *bx)
+{
+	const struct reserve_info *a, *b;
+
+	a = *((const struct reserve_info * const *)ax);
+	b = *((const struct reserve_info * const *)bx);
+
+	if (a->re.address < b->re.address)
+		return -1;
+	else if (a->re.address > b->re.address)
+		return 1;
+	else if (a->re.size < b->re.size)
+		return -1;
+	else if (a->re.size > b->re.size)
+		return 1;
+	else
+		return 0;
+}
+
+static void sort_reserve_entries(struct dt_info *dti)
+{
+	struct reserve_info *ri, **tbl;
+	int n = 0, i = 0;
+
+	for (ri = dti->reservelist;
+	     ri;
+	     ri = ri->next)
+		n++;
+
+	if (n == 0)
+		return;
+
+	tbl = xmalloc(n * sizeof(*tbl));
+
+	for (ri = dti->reservelist;
+	     ri;
+	     ri = ri->next)
+		tbl[i++] = ri;
+
+	qsort(tbl, n, sizeof(*tbl), cmp_reserve_info);
+
+	dti->reservelist = tbl[0];
+	for (i = 0; i < (n-1); i++)
+		tbl[i]->next = tbl[i+1];
+	tbl[n-1]->next = NULL;
+
+	free(tbl);
+}
+
+static int cmp_prop(const void *ax, const void *bx)
+{
+	const struct property *a, *b;
+
+	a = *((const struct property * const *)ax);
+	b = *((const struct property * const *)bx);
+
+	return strcmp(a->name, b->name);
+}
+
+static void sort_properties(struct node *node)
+{
+	int n = 0, i = 0;
+	struct property *prop, **tbl;
+
+	for_each_property_withdel(node, prop)
+		n++;
+
+	if (n == 0)
+		return;
+
+	tbl = xmalloc(n * sizeof(*tbl));
+
+	for_each_property_withdel(node, prop)
+		tbl[i++] = prop;
+
+	qsort(tbl, n, sizeof(*tbl), cmp_prop);
+
+	node->proplist = tbl[0];
+	for (i = 0; i < (n-1); i++)
+		tbl[i]->next = tbl[i+1];
+	tbl[n-1]->next = NULL;
+
+	free(tbl);
+}
+
+static int cmp_subnode(const void *ax, const void *bx)
+{
+	const struct node *a, *b;
+
+	a = *((const struct node * const *)ax);
+	b = *((const struct node * const *)bx);
+
+	return strcmp(a->name, b->name);
+}
+
+static void sort_subnodes(struct node *node)
+{
+	int n = 0, i = 0;
+	struct node *subnode, **tbl;
+
+	for_each_child_withdel(node, subnode)
+		n++;
+
+	if (n == 0)
+		return;
+
+	tbl = xmalloc(n * sizeof(*tbl));
+
+	for_each_child_withdel(node, subnode)
+		tbl[i++] = subnode;
+
+	qsort(tbl, n, sizeof(*tbl), cmp_subnode);
+
+	node->children = tbl[0];
+	for (i = 0; i < (n-1); i++)
+		tbl[i]->next_sibling = tbl[i+1];
+	tbl[n-1]->next_sibling = NULL;
+
+	free(tbl);
+}
+
+static void sort_node(struct node *node)
+{
+	struct node *c;
+
+	sort_properties(node);
+	sort_subnodes(node);
+	for_each_child_withdel(node, c)
+		sort_node(c);
+}
+
+void sort_tree(struct dt_info *dti)
+{
+	sort_reserve_entries(dti);
+	sort_node(dti->dt);
+}
+
+/* utility helper to avoid code duplication */
+static struct node *build_and_name_child_node(struct node *parent, char *name)
+{
+	struct node *node;
+
+	node = build_node(NULL, NULL);
+	name_node(node, xstrdup(name));
+	add_child(parent, node);
+
+	return node;
+}
+
+static struct node *build_root_node(struct node *dt, char *name)
+{
+	struct node *an;
+
+	an = get_subnode(dt, name);
+	if (!an)
+		an = build_and_name_child_node(dt, name);
+
+	if (!an)
+		die("Could not build root node /%s\n", name);
+
+	return an;
+}
+
+static bool any_label_tree(struct dt_info *dti, struct node *node)
+{
+	struct node *c;
+
+	if (node->labels)
+		return true;
+
+	for_each_child(node, c)
+		if (any_label_tree(dti, c))
+			return true;
+
+	return false;
+}
+
+static void generate_label_tree_internal(struct dt_info *dti,
+					 struct node *an, struct node *node,
+					 bool allocph)
+{
+	struct node *dt = dti->dt;
+	struct node *c;
+	struct property *p;
+	struct label *l;
+
+	/* if there are labels */
+	if (node->labels) {
+
+		/* now add the label in the node */
+		for_each_label(node->labels, l) {
+
+			/* check whether the label already exists */
+			p = get_property(an, l->label);
+			if (p) {
+				fprintf(stderr, "WARNING: label %s already"
+					" exists in /%s", l->label,
+					an->name);
+				continue;
+			}
+
+			/* insert it */
+			p = build_property(l->label,
+				data_copy_mem(node->fullpath,
+						strlen(node->fullpath) + 1));
+			add_property(an, p);
+		}
+
+		/* force allocation of a phandle for this node */
+		if (allocph)
+			(void)get_node_phandle(dt, node);
+	}
+
+	for_each_child(node, c)
+		generate_label_tree_internal(dti, an, c, allocph);
+}
+
+static bool any_fixup_tree(struct dt_info *dti, struct node *node)
+{
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			if (!get_node_by_ref(dti->dt, m->ref))
+				return true;
+		}
+	}
+
+	for_each_child(node, c) {
+		if (any_fixup_tree(dti, c))
+			return true;
+	}
+
+	return false;
+}
+
+static void add_fixup_entry(struct dt_info *dti, struct node *fn,
+			    struct node *node, struct property *prop,
+			    struct marker *m)
+{
+	char *entry;
+
+	/* m->ref can only be a REF_PHANDLE, but check anyway */
+	assert(m->type == REF_PHANDLE);
+
+	/* there shouldn't be any ':' in the arguments */
+	if (strchr(node->fullpath, ':') || strchr(prop->name, ':'))
+		die("arguments should not contain ':'\n");
+
+	xasprintf(&entry, "%s:%s:%u",
+			node->fullpath, prop->name, m->offset);
+	append_to_property(fn, m->ref, entry, strlen(entry) + 1);
+
+	free(entry);
+}
+
+static void generate_fixups_tree_internal(struct dt_info *dti,
+					  struct node *fn,
+					  struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+	struct node *refnode;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			refnode = get_node_by_ref(dt, m->ref);
+			if (!refnode)
+				add_fixup_entry(dti, fn, node, prop, m);
+		}
+	}
+
+	for_each_child(node, c)
+		generate_fixups_tree_internal(dti, fn, c);
+}
+
+static bool any_local_fixup_tree(struct dt_info *dti, struct node *node)
+{
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			if (get_node_by_ref(dti->dt, m->ref))
+				return true;
+		}
+	}
+
+	for_each_child(node, c) {
+		if (any_local_fixup_tree(dti, c))
+			return true;
+	}
+
+	return false;
+}
+
+static void add_local_fixup_entry(struct dt_info *dti,
+		struct node *lfn, struct node *node,
+		struct property *prop, struct marker *m,
+		struct node *refnode)
+{
+	struct node *wn, *nwn;	/* local fixup node, walk node, new */
+	uint32_t value_32;
+	char **compp;
+	int i, depth;
+
+	/* walk back retreiving depth */
+	depth = 0;
+	for (wn = node; wn; wn = wn->parent)
+		depth++;
+
+	/* allocate name array */
+	compp = xmalloc(sizeof(*compp) * depth);
+
+	/* store names in the array */
+	for (wn = node, i = depth - 1; wn; wn = wn->parent, i--)
+		compp[i] = wn->name;
+
+	/* walk the path components creating nodes if they don't exist */
+	for (wn = lfn, i = 1; i < depth; i++, wn = nwn) {
+		/* if no node exists, create it */
+		nwn = get_subnode(wn, compp[i]);
+		if (!nwn)
+			nwn = build_and_name_child_node(wn, compp[i]);
+	}
+
+	free(compp);
+
+	value_32 = cpu_to_fdt32(m->offset);
+	append_to_property(wn, prop->name, &value_32, sizeof(value_32));
+}
+
+static void generate_local_fixups_tree_internal(struct dt_info *dti,
+						struct node *lfn,
+						struct node *node)
+{
+	struct node *dt = dti->dt;
+	struct node *c;
+	struct property *prop;
+	struct marker *m;
+	struct node *refnode;
+
+	for_each_property(node, prop) {
+		m = prop->val.markers;
+		for_each_marker_of_type(m, REF_PHANDLE) {
+			refnode = get_node_by_ref(dt, m->ref);
+			if (refnode)
+				add_local_fixup_entry(dti, lfn, node, prop, m, refnode);
+		}
+	}
+
+	for_each_child(node, c)
+		generate_local_fixups_tree_internal(dti, lfn, c);
+}
+
+void generate_label_tree(struct dt_info *dti, char *name, bool allocph)
+{
+	if (!any_label_tree(dti, dti->dt))
+		return;
+	generate_label_tree_internal(dti, build_root_node(dti->dt, name),
+				     dti->dt, allocph);
+}
+
+void generate_fixups_tree(struct dt_info *dti, char *name)
+{
+	if (!any_fixup_tree(dti, dti->dt))
+		return;
+	generate_fixups_tree_internal(dti, build_root_node(dti->dt, name),
+				      dti->dt);
+}
+
+void generate_local_fixups_tree(struct dt_info *dti, char *name)
+{
+	if (!any_local_fixup_tree(dti, dti->dt))
+		return;
+	generate_local_fixups_tree_internal(dti, build_root_node(dti->dt, name),
+					    dti->dt);
+}
diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c
new file mode 100644
index 0000000000..9d38459902
--- /dev/null
+++ b/scripts/dtc/srcpos.c
@@ -0,0 +1,302 @@
+/*
+ * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#define _GNU_SOURCE
+
+#include <stdio.h>
+
+#include "dtc.h"
+#include "srcpos.h"
+
+/* A node in our list of directories to search for source/include files */
+struct search_path {
+	struct search_path *next;	/* next node in list, NULL for end */
+	const char *dirname;		/* name of directory to search */
+};
+
+/* This is the list of directories that we search for source files */
+static struct search_path *search_path_head, **search_path_tail;
+
+
+static char *get_dirname(const char *path)
+{
+	const char *slash = strrchr(path, '/');
+
+	if (slash) {
+		int len = slash - path;
+		char *dir = xmalloc(len + 1);
+
+		memcpy(dir, path, len);
+		dir[len] = '\0';
+		return dir;
+	}
+	return NULL;
+}
+
+FILE *depfile; /* = NULL */
+struct srcfile_state *current_srcfile; /* = NULL */
+
+/* Detect infinite include recursion. */
+#define MAX_SRCFILE_DEPTH     (100)
+static int srcfile_depth; /* = 0 */
+
+
+/**
+ * Try to open a file in a given directory.
+ *
+ * If the filename is an absolute path, then dirname is ignored. If it is a
+ * relative path, then we look in that directory for the file.
+ *
+ * @param dirname	Directory to look in, or NULL for none
+ * @param fname		Filename to look for
+ * @param fp		Set to NULL if file did not open
+ * @return allocated filename on success (caller must free), NULL on failure
+ */
+static char *try_open(const char *dirname, const char *fname, FILE **fp)
+{
+	char *fullname;
+
+	if (!dirname || fname[0] == '/')
+		fullname = xstrdup(fname);
+	else
+		fullname = join_path(dirname, fname);
+
+	*fp = fopen(fullname, "rb");
+	if (!*fp) {
+		free(fullname);
+		fullname = NULL;
+	}
+
+	return fullname;
+}
+
+/**
+ * Open a file for read access
+ *
+ * If it is a relative filename, we search the full search path for it.
+ *
+ * @param fname	Filename to open
+ * @param fp	Returns pointer to opened FILE, or NULL on failure
+ * @return pointer to allocated filename, which caller must free
+ */
+static char *fopen_any_on_path(const char *fname, FILE **fp)
+{
+	const char *cur_dir = NULL;
+	struct search_path *node;
+	char *fullname;
+
+	/* Try current directory first */
+	assert(fp);
+	if (current_srcfile)
+		cur_dir = current_srcfile->dir;
+	fullname = try_open(cur_dir, fname, fp);
+
+	/* Failing that, try each search path in turn */
+	for (node = search_path_head; !*fp && node; node = node->next)
+		fullname = try_open(node->dirname, fname, fp);
+
+	return fullname;
+}
+
+FILE *srcfile_relative_open(const char *fname, char **fullnamep)
+{
+	FILE *f;
+	char *fullname;
+
+	if (streq(fname, "-")) {
+		f = stdin;
+		fullname = xstrdup("<stdin>");
+	} else {
+		fullname = fopen_any_on_path(fname, &f);
+		if (!f)
+			die("Couldn't open \"%s\": %s\n", fname,
+			    strerror(errno));
+	}
+
+	if (depfile)
+		fprintf(depfile, " %s", fullname);
+
+	if (fullnamep)
+		*fullnamep = fullname;
+	else
+		free(fullname);
+
+	return f;
+}
+
+void srcfile_push(const char *fname)
+{
+	struct srcfile_state *srcfile;
+
+	if (srcfile_depth++ >= MAX_SRCFILE_DEPTH)
+		die("Includes nested too deeply");
+
+	srcfile = xmalloc(sizeof(*srcfile));
+
+	srcfile->f = srcfile_relative_open(fname, &srcfile->name);
+	srcfile->dir = get_dirname(srcfile->name);
+	srcfile->prev = current_srcfile;
+
+	srcfile->lineno = 1;
+	srcfile->colno = 1;
+
+	current_srcfile = srcfile;
+}
+
+bool srcfile_pop(void)
+{
+	struct srcfile_state *srcfile = current_srcfile;
+
+	assert(srcfile);
+
+	current_srcfile = srcfile->prev;
+
+	if (fclose(srcfile->f))
+		die("Error closing \"%s\": %s\n", srcfile->name,
+		    strerror(errno));
+
+	/* FIXME: We allow the srcfile_state structure to leak,
+	 * because it could still be referenced from a location
+	 * variable being carried through the parser somewhere.  To
+	 * fix this we could either allocate all the files from a
+	 * table, or use a pool allocator. */
+
+	return current_srcfile ? true : false;
+}
+
+void srcfile_add_search_path(const char *dirname)
+{
+	struct search_path *node;
+
+	/* Create the node */
+	node = xmalloc(sizeof(*node));
+	node->next = NULL;
+	node->dirname = xstrdup(dirname);
+
+	/* Add to the end of our list */
+	if (search_path_tail)
+		*search_path_tail = node;
+	else
+		search_path_head = node;
+	search_path_tail = &node->next;
+}
+
+/*
+ * The empty source position.
+ */
+
+struct srcpos srcpos_empty = {
+	.first_line = 0,
+	.first_column = 0,
+	.last_line = 0,
+	.last_column = 0,
+	.file = NULL,
+};
+
+#define TAB_SIZE      8
+
+void srcpos_update(struct srcpos *pos, const char *text, int len)
+{
+	int i;
+
+	pos->file = current_srcfile;
+
+	pos->first_line = current_srcfile->lineno;
+	pos->first_column = current_srcfile->colno;
+
+	for (i = 0; i < len; i++)
+		if (text[i] == '\n') {
+			current_srcfile->lineno++;
+			current_srcfile->colno = 1;
+		} else if (text[i] == '\t') {
+			current_srcfile->colno =
+				ALIGN(current_srcfile->colno, TAB_SIZE);
+		} else {
+			current_srcfile->colno++;
+		}
+
+	pos->last_line = current_srcfile->lineno;
+	pos->last_column = current_srcfile->colno;
+}
+
+struct srcpos *
+srcpos_copy(struct srcpos *pos)
+{
+	struct srcpos *pos_new;
+
+	pos_new = xmalloc(sizeof(struct srcpos));
+	memcpy(pos_new, pos, sizeof(struct srcpos));
+
+	return pos_new;
+}
+
+char *
+srcpos_string(struct srcpos *pos)
+{
+	const char *fname = "<no-file>";
+	char *pos_str;
+
+	if (pos->file && pos->file->name)
+		fname = pos->file->name;
+
+
+	if (pos->first_line != pos->last_line)
+		xasprintf(&pos_str, "%s:%d.%d-%d.%d", fname,
+			  pos->first_line, pos->first_column,
+			  pos->last_line, pos->last_column);
+	else if (pos->first_column != pos->last_column)
+		xasprintf(&pos_str, "%s:%d.%d-%d", fname,
+			  pos->first_line, pos->first_column,
+			  pos->last_column);
+	else
+		xasprintf(&pos_str, "%s:%d.%d", fname,
+			  pos->first_line, pos->first_column);
+
+	return pos_str;
+}
+
+void srcpos_verror(struct srcpos *pos, const char *prefix,
+		   const char *fmt, va_list va)
+{
+	char *srcstr;
+
+	srcstr = srcpos_string(pos);
+
+	fprintf(stderr, "%s: %s ", prefix, srcstr);
+	vfprintf(stderr, fmt, va);
+	fprintf(stderr, "\n");
+
+	free(srcstr);
+}
+
+void srcpos_error(struct srcpos *pos, const char *prefix,
+		  const char *fmt, ...)
+{
+	va_list va;
+
+	va_start(va, fmt);
+	srcpos_verror(pos, prefix, fmt, va);
+	va_end(va);
+}
+
+void srcpos_set_line(char *f, int l)
+{
+	current_srcfile->name = f;
+	current_srcfile->lineno = l;
+}
diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h
new file mode 100644
index 0000000000..2cdfcd82e9
--- /dev/null
+++ b/scripts/dtc/srcpos.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#ifndef _SRCPOS_H_
+#define _SRCPOS_H_
+
+#include <stdio.h>
+#include <stdbool.h>
+
+struct srcfile_state {
+	FILE *f;
+	char *name;
+	char *dir;
+	int lineno, colno;
+	struct srcfile_state *prev;
+};
+
+extern FILE *depfile; /* = NULL */
+extern struct srcfile_state *current_srcfile; /* = NULL */
+
+/**
+ * Open a source file.
+ *
+ * If the source file is a relative pathname, then it is searched for in the
+ * current directory (the directory of the last source file read) and after
+ * that in the search path.
+ *
+ * We work through the search path in order from the first path specified to
+ * the last.
+ *
+ * If the file is not found, then this function does not return, but calls
+ * die().
+ *
+ * @param fname		Filename to search
+ * @param fullnamep	If non-NULL, it is set to the allocated filename of the
+ *			file that was opened. The caller is then responsible
+ *			for freeing the pointer.
+ * @return pointer to opened FILE
+ */
+FILE *srcfile_relative_open(const char *fname, char **fullnamep);
+
+void srcfile_push(const char *fname);
+bool srcfile_pop(void);
+
+/**
+ * Add a new directory to the search path for input files
+ *
+ * The new path is added at the end of the list.
+ *
+ * @param dirname	Directory to add
+ */
+void srcfile_add_search_path(const char *dirname);
+
+struct srcpos {
+    int first_line;
+    int first_column;
+    int last_line;
+    int last_column;
+    struct srcfile_state *file;
+};
+
+#define YYLTYPE struct srcpos
+
+#define YYLLOC_DEFAULT(Current, Rhs, N)						\
+	do {									\
+		if (N) {							\
+			(Current).first_line = YYRHSLOC(Rhs, 1).first_line;	\
+			(Current).first_column = YYRHSLOC(Rhs, 1).first_column;	\
+			(Current).last_line = YYRHSLOC(Rhs, N).last_line;	\
+			(Current).last_column  = YYRHSLOC (Rhs, N).last_column;	\
+			(Current).file = YYRHSLOC(Rhs, N).file;			\
+		} else {							\
+			(Current).first_line = (Current).last_line =		\
+				YYRHSLOC(Rhs, 0).last_line;			\
+			(Current).first_column = (Current).last_column =	\
+				YYRHSLOC(Rhs, 0).last_column;			\
+			(Current).file = YYRHSLOC (Rhs, 0).file;		\
+		}								\
+	} while (0)
+
+
+/*
+ * Fictional source position used for IR nodes that are
+ * created without otherwise knowing a true source position.
+ * For example,constant definitions from the command line.
+ */
+extern struct srcpos srcpos_empty;
+
+extern void srcpos_update(struct srcpos *pos, const char *text, int len);
+extern struct srcpos *srcpos_copy(struct srcpos *pos);
+extern char *srcpos_string(struct srcpos *pos);
+
+extern void srcpos_verror(struct srcpos *pos, const char *prefix,
+			  const char *fmt, va_list va)
+	__attribute__((format(printf, 3, 0)));
+extern void srcpos_error(struct srcpos *pos, const char *prefix,
+			 const char *fmt, ...)
+	__attribute__((format(printf, 3, 4)));
+
+extern void srcpos_set_line(char *f, int l);
+
+#endif /* _SRCPOS_H_ */
diff --git a/scripts/dtc/treesource.c b/scripts/dtc/treesource.c
new file mode 100644
index 0000000000..c9d8967969
--- /dev/null
+++ b/scripts/dtc/treesource.c
@@ -0,0 +1,284 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+#include "srcpos.h"
+
+extern FILE *yyin;
+extern int yyparse(void);
+extern YYLTYPE yylloc;
+
+struct dt_info *parser_output;
+bool treesource_error;
+
+struct dt_info *dt_from_source(const char *fname)
+{
+	parser_output = NULL;
+	treesource_error = false;
+
+	srcfile_push(fname);
+	yyin = current_srcfile->f;
+	yylloc.file = current_srcfile;
+
+	if (yyparse() != 0)
+		die("Unable to parse input tree\n");
+
+	if (treesource_error)
+		die("Syntax error parsing input tree\n");
+
+	return parser_output;
+}
+
+static void write_prefix(FILE *f, int level)
+{
+	int i;
+
+	for (i = 0; i < level; i++)
+		fputc('\t', f);
+}
+
+static bool isstring(char c)
+{
+	return (isprint((unsigned char)c)
+		|| (c == '\0')
+		|| strchr("\a\b\t\n\v\f\r", c));
+}
+
+static void write_propval_string(FILE *f, struct data val)
+{
+	const char *str = val.val;
+	int i;
+	struct marker *m = val.markers;
+
+	assert(str[val.len-1] == '\0');
+
+	while (m && (m->offset == 0)) {
+		if (m->type == LABEL)
+			fprintf(f, "%s: ", m->ref);
+		m = m->next;
+	}
+	fprintf(f, "\"");
+
+	for (i = 0; i < (val.len-1); i++) {
+		char c = str[i];
+
+		switch (c) {
+		case '\a':
+			fprintf(f, "\\a");
+			break;
+		case '\b':
+			fprintf(f, "\\b");
+			break;
+		case '\t':
+			fprintf(f, "\\t");
+			break;
+		case '\n':
+			fprintf(f, "\\n");
+			break;
+		case '\v':
+			fprintf(f, "\\v");
+			break;
+		case '\f':
+			fprintf(f, "\\f");
+			break;
+		case '\r':
+			fprintf(f, "\\r");
+			break;
+		case '\\':
+			fprintf(f, "\\\\");
+			break;
+		case '\"':
+			fprintf(f, "\\\"");
+			break;
+		case '\0':
+			fprintf(f, "\", ");
+			while (m && (m->offset <= (i + 1))) {
+				if (m->type == LABEL) {
+					assert(m->offset == (i+1));
+					fprintf(f, "%s: ", m->ref);
+				}
+				m = m->next;
+			}
+			fprintf(f, "\"");
+			break;
+		default:
+			if (isprint((unsigned char)c))
+				fprintf(f, "%c", c);
+			else
+				fprintf(f, "\\x%02hhx", c);
+		}
+	}
+	fprintf(f, "\"");
+
+	/* Wrap up any labels at the end of the value */
+	for_each_marker_of_type(m, LABEL) {
+		assert (m->offset == val.len);
+		fprintf(f, " %s:", m->ref);
+	}
+}
+
+static void write_propval_cells(FILE *f, struct data val)
+{
+	void *propend = val.val + val.len;
+	cell_t *cp = (cell_t *)val.val;
+	struct marker *m = val.markers;
+
+	fprintf(f, "<");
+	for (;;) {
+		while (m && (m->offset <= ((char *)cp - val.val))) {
+			if (m->type == LABEL) {
+				assert(m->offset == ((char *)cp - val.val));
+				fprintf(f, "%s: ", m->ref);
+			}
+			m = m->next;
+		}
+
+		fprintf(f, "0x%x", fdt32_to_cpu(*cp++));
+		if ((void *)cp >= propend)
+			break;
+		fprintf(f, " ");
+	}
+
+	/* Wrap up any labels at the end of the value */
+	for_each_marker_of_type(m, LABEL) {
+		assert (m->offset == val.len);
+		fprintf(f, " %s:", m->ref);
+	}
+	fprintf(f, ">");
+}
+
+static void write_propval_bytes(FILE *f, struct data val)
+{
+	void *propend = val.val + val.len;
+	const char *bp = val.val;
+	struct marker *m = val.markers;
+
+	fprintf(f, "[");
+	for (;;) {
+		while (m && (m->offset == (bp-val.val))) {
+			if (m->type == LABEL)
+				fprintf(f, "%s: ", m->ref);
+			m = m->next;
+		}
+
+		fprintf(f, "%02hhx", (unsigned char)(*bp++));
+		if ((const void *)bp >= propend)
+			break;
+		fprintf(f, " ");
+	}
+
+	/* Wrap up any labels at the end of the value */
+	for_each_marker_of_type(m, LABEL) {
+		assert (m->offset == val.len);
+		fprintf(f, " %s:", m->ref);
+	}
+	fprintf(f, "]");
+}
+
+static void write_propval(FILE *f, struct property *prop)
+{
+	int len = prop->val.len;
+	const char *p = prop->val.val;
+	struct marker *m = prop->val.markers;
+	int nnotstring = 0, nnul = 0;
+	int nnotstringlbl = 0, nnotcelllbl = 0;
+	int i;
+
+	if (len == 0) {
+		fprintf(f, ";\n");
+		return;
+	}
+
+	for (i = 0; i < len; i++) {
+		if (! isstring(p[i]))
+			nnotstring++;
+		if (p[i] == '\0')
+			nnul++;
+	}
+
+	for_each_marker_of_type(m, LABEL) {
+		if ((m->offset > 0) && (prop->val.val[m->offset - 1] != '\0'))
+			nnotstringlbl++;
+		if ((m->offset % sizeof(cell_t)) != 0)
+			nnotcelllbl++;
+	}
+
+	fprintf(f, " = ");
+	if ((p[len-1] == '\0') && (nnotstring == 0) && (nnul < (len-nnul))
+	    && (nnotstringlbl == 0)) {
+		write_propval_string(f, prop->val);
+	} else if (((len % sizeof(cell_t)) == 0) && (nnotcelllbl == 0)) {
+		write_propval_cells(f, prop->val);
+	} else {
+		write_propval_bytes(f, prop->val);
+	}
+
+	fprintf(f, ";\n");
+}
+
+static void write_tree_source_node(FILE *f, struct node *tree, int level)
+{
+	struct property *prop;
+	struct node *child;
+	struct label *l;
+
+	write_prefix(f, level);
+	for_each_label(tree->labels, l)
+		fprintf(f, "%s: ", l->label);
+	if (tree->name && (*tree->name))
+		fprintf(f, "%s {\n", tree->name);
+	else
+		fprintf(f, "/ {\n");
+
+	for_each_property(tree, prop) {
+		write_prefix(f, level+1);
+		for_each_label(prop->labels, l)
+			fprintf(f, "%s: ", l->label);
+		fprintf(f, "%s", prop->name);
+		write_propval(f, prop);
+	}
+	for_each_child(tree, child) {
+		fprintf(f, "\n");
+		write_tree_source_node(f, child, level+1);
+	}
+	write_prefix(f, level);
+	fprintf(f, "};\n");
+}
+
+
+void dt_to_source(FILE *f, struct dt_info *dti)
+{
+	struct reserve_info *re;
+
+	fprintf(f, "/dts-v1/;\n\n");
+
+	for (re = dti->reservelist; re; re = re->next) {
+		struct label *l;
+
+		for_each_label(re->labels, l)
+			fprintf(f, "%s: ", l->label);
+		fprintf(f, "/memreserve/\t0x%016llx 0x%016llx;\n",
+			(unsigned long long)re->re.address,
+			(unsigned long long)re->re.size);
+	}
+
+	write_tree_source_node(f, dti->dt, 0);
+}
+
diff --git a/scripts/dtc/update-dtc-source.sh b/scripts/dtc/update-dtc-source.sh
new file mode 100755
index 0000000000..b8ebcc6722
--- /dev/null
+++ b/scripts/dtc/update-dtc-source.sh
@@ -0,0 +1,81 @@
+#!/bin/sh
+# Simple script to update the version of DTC carried by the Linux kernel
+#
+# This script assumes that the dtc and the linux git trees are in the
+# same directory. After building dtc in the dtc directory, it copies the
+# source files and generated source files into the scripts/dtc directory
+# in the kernel and creates a git commit updating them to the new
+# version.
+#
+# Usage: from the top level Linux source tree, run:
+# $ ./scripts/dtc/update-dtc-source.sh
+#
+# The script will change into the dtc tree, build and test dtc, copy the
+# relevant files into the kernel tree and create a git commit. The commit
+# message will need to be modified to reflect the version of DTC being
+# imported
+#
+# TODO:
+# This script is pretty basic, but it is seldom used so a few manual tasks
+# aren't a big deal. If anyone is interested in making it more robust, the
+# the following would be nice:
+# * Actually fail to complete if any testcase fails.
+#   - The dtc "make check" target needs to return a failure
+# * Extract the version number from the dtc repo for the commit message
+# * Build dtc in the kernel tree
+# * run 'make check" on dtc built from the kernel tree
+
+set -ev
+
+DTC_UPSTREAM_PATH=`pwd`/../dtc
+DTC_LINUX_PATH=`pwd`/scripts/dtc
+
+DTC_SOURCE="checks.c data.c dtc.c dtc.h flattree.c fstree.c livetree.c srcpos.c \
+		srcpos.h treesource.c util.c util.h version_gen.h Makefile.dtc \
+		dtc-lexer.l dtc-parser.y"
+DTC_GENERATED="dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h"
+LIBFDT_SOURCE="Makefile.libfdt fdt.c fdt.h fdt_empty_tree.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h"
+
+get_last_dtc_version() {
+	git log --oneline scripts/dtc/ | grep 'upstream' | head -1 | sed -e 's/^.* \(.*\)/\1/'
+}
+
+last_dtc_ver=$(get_last_dtc_version)
+
+# Build DTC
+cd $DTC_UPSTREAM_PATH
+make clean
+make check
+dtc_version=$(git describe HEAD)
+dtc_log=$(git log --oneline ${last_dtc_ver}..)
+
+
+# Copy the files into the Linux tree
+cd $DTC_LINUX_PATH
+for f in $DTC_SOURCE; do
+	cp ${DTC_UPSTREAM_PATH}/${f} ${f}
+	git add ${f}
+done
+for f in $DTC_GENERATED; do
+	cp ${DTC_UPSTREAM_PATH}/$f ${f}_shipped
+	git add ${f}_shipped
+done
+for f in $LIBFDT_SOURCE; do
+       cp ${DTC_UPSTREAM_PATH}/libfdt/${f} libfdt/${f}
+       git add libfdt/${f}
+done
+
+sed -i -- 's/#include <libfdt_env.h>/#include "libfdt_env.h"/g' ./libfdt/libfdt.h
+sed -i -- 's/#include <fdt.h>/#include "fdt.h"/g' ./libfdt/libfdt.h
+git add ./libfdt/libfdt.h
+
+commit_msg=$(cat << EOF
+scripts/dtc: Update to upstream version ${dtc_version}
+
+This adds the following commits from upstream:
+
+${dtc_log}
+EOF
+)
+
+git commit -e -v -s -m "${commit_msg}"
diff --git a/scripts/dtc/util.c b/scripts/dtc/util.c
new file mode 100644
index 0000000000..3550f86bd6
--- /dev/null
+++ b/scripts/dtc/util.c
@@ -0,0 +1,473 @@
+/*
+ * Copyright 2011 The Chromium Authors, All Rights Reserved.
+ * Copyright 2008 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * util_is_printable_string contributed by
+ *	Pantelis Antoniou <pantelis.antoniou AT gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include <ctype.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <assert.h>
+
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include "libfdt.h"
+#include "util.h"
+#include "version_gen.h"
+
+char *xstrdup(const char *s)
+{
+	int len = strlen(s) + 1;
+	char *d = xmalloc(len);
+
+	memcpy(d, s, len);
+
+	return d;
+}
+
+/* based in part from (3) vsnprintf */
+int xasprintf(char **strp, const char *fmt, ...)
+{
+	int n, size = 128;	/* start with 128 bytes */
+	char *p;
+	va_list ap;
+
+	/* initial pointer is NULL making the fist realloc to be malloc */
+	p = NULL;
+	while (1) {
+		p = xrealloc(p, size);
+
+		/* Try to print in the allocated space. */
+		va_start(ap, fmt);
+		n = vsnprintf(p, size, fmt, ap);
+		va_end(ap);
+
+		/* If that worked, return the string. */
+		if (n > -1 && n < size)
+			break;
+		/* Else try again with more space. */
+		if (n > -1)	/* glibc 2.1 */
+			size = n + 1; /* precisely what is needed */
+		else		/* glibc 2.0 */
+			size *= 2; /* twice the old size */
+	}
+	*strp = p;
+	return strlen(p);
+}
+
+char *join_path(const char *path, const char *name)
+{
+	int lenp = strlen(path);
+	int lenn = strlen(name);
+	int len;
+	int needslash = 1;
+	char *str;
+
+	len = lenp + lenn + 2;
+	if ((lenp > 0) && (path[lenp-1] == '/')) {
+		needslash = 0;
+		len--;
+	}
+
+	str = xmalloc(len);
+	memcpy(str, path, lenp);
+	if (needslash) {
+		str[lenp] = '/';
+		lenp++;
+	}
+	memcpy(str+lenp, name, lenn+1);
+	return str;
+}
+
+bool util_is_printable_string(const void *data, int len)
+{
+	const char *s = data;
+	const char *ss, *se;
+
+	/* zero length is not */
+	if (len == 0)
+		return 0;
+
+	/* must terminate with zero */
+	if (s[len - 1] != '\0')
+		return 0;
+
+	se = s + len;
+
+	while (s < se) {
+		ss = s;
+		while (s < se && *s && isprint((unsigned char)*s))
+			s++;
+
+		/* not zero, or not done yet */
+		if (*s != '\0' || s == ss)
+			return 0;
+
+		s++;
+	}
+
+	return 1;
+}
+
+/*
+ * Parse a octal encoded character starting at index i in string s.  The
+ * resulting character will be returned and the index i will be updated to
+ * point at the character directly after the end of the encoding, this may be
+ * the '\0' terminator of the string.
+ */
+static char get_oct_char(const char *s, int *i)
+{
+	char x[4];
+	char *endx;
+	long val;
+
+	x[3] = '\0';
+	strncpy(x, s + *i, 3);
+
+	val = strtol(x, &endx, 8);
+
+	assert(endx > x);
+
+	(*i) += endx - x;
+	return val;
+}
+
+/*
+ * Parse a hexadecimal encoded character starting at index i in string s.  The
+ * resulting character will be returned and the index i will be updated to
+ * point at the character directly after the end of the encoding, this may be
+ * the '\0' terminator of the string.
+ */
+static char get_hex_char(const char *s, int *i)
+{
+	char x[3];
+	char *endx;
+	long val;
+
+	x[2] = '\0';
+	strncpy(x, s + *i, 2);
+
+	val = strtol(x, &endx, 16);
+	if (!(endx  > x))
+		die("\\x used with no following hex digits\n");
+
+	(*i) += endx - x;
+	return val;
+}
+
+char get_escape_char(const char *s, int *i)
+{
+	char	c = s[*i];
+	int	j = *i + 1;
+	char	val;
+
+	switch (c) {
+	case 'a':
+		val = '\a';
+		break;
+	case 'b':
+		val = '\b';
+		break;
+	case 't':
+		val = '\t';
+		break;
+	case 'n':
+		val = '\n';
+		break;
+	case 'v':
+		val = '\v';
+		break;
+	case 'f':
+		val = '\f';
+		break;
+	case 'r':
+		val = '\r';
+		break;
+	case '0':
+	case '1':
+	case '2':
+	case '3':
+	case '4':
+	case '5':
+	case '6':
+	case '7':
+		j--; /* need to re-read the first digit as
+		      * part of the octal value */
+		val = get_oct_char(s, &j);
+		break;
+	case 'x':
+		val = get_hex_char(s, &j);
+		break;
+	default:
+		val = c;
+	}
+
+	(*i) = j;
+	return val;
+}
+
+int utilfdt_read_err_len(const char *filename, char **buffp, off_t *len)
+{
+	int fd = 0;	/* assume stdin */
+	char *buf = NULL;
+	off_t bufsize = 1024, offset = 0;
+	int ret = 0;
+
+	*buffp = NULL;
+	if (strcmp(filename, "-") != 0) {
+		fd = open(filename, O_RDONLY);
+		if (fd < 0)
+			return errno;
+	}
+
+	/* Loop until we have read everything */
+	buf = xmalloc(bufsize);
+	do {
+		/* Expand the buffer to hold the next chunk */
+		if (offset == bufsize) {
+			bufsize *= 2;
+			buf = xrealloc(buf, bufsize);
+		}
+
+		ret = read(fd, &buf[offset], bufsize - offset);
+		if (ret < 0) {
+			ret = errno;
+			break;
+		}
+		offset += ret;
+	} while (ret != 0);
+
+	/* Clean up, including closing stdin; return errno on error */
+	close(fd);
+	if (ret)
+		free(buf);
+	else
+		*buffp = buf;
+	*len = bufsize;
+	return ret;
+}
+
+int utilfdt_read_err(const char *filename, char **buffp)
+{
+	off_t len;
+	return utilfdt_read_err_len(filename, buffp, &len);
+}
+
+char *utilfdt_read_len(const char *filename, off_t *len)
+{
+	char *buff;
+	int ret = utilfdt_read_err_len(filename, &buff, len);
+
+	if (ret) {
+		fprintf(stderr, "Couldn't open blob from '%s': %s\n", filename,
+			strerror(ret));
+		return NULL;
+	}
+	/* Successful read */
+	return buff;
+}
+
+char *utilfdt_read(const char *filename)
+{
+	off_t len;
+	return utilfdt_read_len(filename, &len);
+}
+
+int utilfdt_write_err(const char *filename, const void *blob)
+{
+	int fd = 1;	/* assume stdout */
+	int totalsize;
+	int offset;
+	int ret = 0;
+	const char *ptr = blob;
+
+	if (strcmp(filename, "-") != 0) {
+		fd = open(filename, O_WRONLY | O_CREAT | O_TRUNC, 0666);
+		if (fd < 0)
+			return errno;
+	}
+
+	totalsize = fdt_totalsize(blob);
+	offset = 0;
+
+	while (offset < totalsize) {
+		ret = write(fd, ptr + offset, totalsize - offset);
+		if (ret < 0) {
+			ret = -errno;
+			break;
+		}
+		offset += ret;
+	}
+	/* Close the file/stdin; return errno on error */
+	if (fd != 1)
+		close(fd);
+	return ret < 0 ? -ret : 0;
+}
+
+
+int utilfdt_write(const char *filename, const void *blob)
+{
+	int ret = utilfdt_write_err(filename, blob);
+
+	if (ret) {
+		fprintf(stderr, "Couldn't write blob to '%s': %s\n", filename,
+			strerror(ret));
+	}
+	return ret ? -1 : 0;
+}
+
+int utilfdt_decode_type(const char *fmt, int *type, int *size)
+{
+	int qualifier = 0;
+
+	if (!*fmt)
+		return -1;
+
+	/* get the conversion qualifier */
+	*size = -1;
+	if (strchr("hlLb", *fmt)) {
+		qualifier = *fmt++;
+		if (qualifier == *fmt) {
+			switch (*fmt++) {
+/* TODO:		case 'l': qualifier = 'L'; break;*/
+			case 'h':
+				qualifier = 'b';
+				break;
+			}
+		}
+	}
+
+	/* we should now have a type */
+	if ((*fmt == '\0') || !strchr("iuxs", *fmt))
+		return -1;
+
+	/* convert qualifier (bhL) to byte size */
+	if (*fmt != 's')
+		*size = qualifier == 'b' ? 1 :
+				qualifier == 'h' ? 2 :
+				qualifier == 'l' ? 4 : -1;
+	*type = *fmt++;
+
+	/* that should be it! */
+	if (*fmt)
+		return -1;
+	return 0;
+}
+
+void utilfdt_print_data(const char *data, int len)
+{
+	int i;
+	const char *s;
+
+	/* no data, don't print */
+	if (len == 0)
+		return;
+
+	if (util_is_printable_string(data, len)) {
+		printf(" = ");
+
+		s = data;
+		do {
+			printf("\"%s\"", s);
+			s += strlen(s) + 1;
+			if (s < data + len)
+				printf(", ");
+		} while (s < data + len);
+
+	} else if ((len % 4) == 0) {
+		const uint32_t *cell = (const uint32_t *)data;
+
+		printf(" = <");
+		for (i = 0, len /= 4; i < len; i++)
+			printf("0x%08x%s", fdt32_to_cpu(cell[i]),
+			       i < (len - 1) ? " " : "");
+		printf(">");
+	} else {
+		const unsigned char *p = (const unsigned char *)data;
+		printf(" = [");
+		for (i = 0; i < len; i++)
+			printf("%02x%s", *p++, i < len - 1 ? " " : "");
+		printf("]");
+	}
+}
+
+void util_version(void)
+{
+	printf("Version: %s\n", DTC_VERSION);
+	exit(0);
+}
+
+void util_usage(const char *errmsg, const char *synopsis,
+		const char *short_opts, struct option const long_opts[],
+		const char * const opts_help[])
+{
+	FILE *fp = errmsg ? stderr : stdout;
+	const char a_arg[] = "<arg>";
+	size_t a_arg_len = strlen(a_arg) + 1;
+	size_t i;
+	int optlen;
+
+	fprintf(fp,
+		"Usage: %s\n"
+		"\n"
+		"Options: -[%s]\n", synopsis, short_opts);
+
+	/* prescan the --long opt length to auto-align */
+	optlen = 0;
+	for (i = 0; long_opts[i].name; ++i) {
+		/* +1 is for space between --opt and help text */
+		int l = strlen(long_opts[i].name) + 1;
+		if (long_opts[i].has_arg == a_argument)
+			l += a_arg_len;
+		if (optlen < l)
+			optlen = l;
+	}
+
+	for (i = 0; long_opts[i].name; ++i) {
+		/* helps when adding new applets or options */
+		assert(opts_help[i] != NULL);
+
+		/* first output the short flag if it has one */
+		if (long_opts[i].val > '~')
+			fprintf(fp, "      ");
+		else
+			fprintf(fp, "  -%c, ", long_opts[i].val);
+
+		/* then the long flag */
+		if (long_opts[i].has_arg == no_argument)
+			fprintf(fp, "--%-*s", optlen, long_opts[i].name);
+		else
+			fprintf(fp, "--%s %s%*s", long_opts[i].name, a_arg,
+				(int)(optlen - strlen(long_opts[i].name) - a_arg_len), "");
+
+		/* finally the help text */
+		fprintf(fp, "%s\n", opts_help[i]);
+	}
+
+	if (errmsg) {
+		fprintf(fp, "\nError: %s\n", errmsg);
+		exit(EXIT_FAILURE);
+	} else
+		exit(EXIT_SUCCESS);
+}
diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h
new file mode 100644
index 0000000000..bc3d223fa6
--- /dev/null
+++ b/scripts/dtc/util.h
@@ -0,0 +1,265 @@
+#ifndef _UTIL_H
+#define _UTIL_H
+
+#include <stdarg.h>
+#include <stdbool.h>
+#include <getopt.h>
+
+/*
+ * Copyright 2011 The Chromium Authors, All Rights Reserved.
+ * Copyright 2008 Jon Loeliger, Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+#ifdef __GNUC__
+static inline void
+__attribute__((noreturn)) __attribute__((format (printf, 1, 2)))
+die(const char *str, ...)
+#else
+static inline void die(const char *str, ...)
+#endif
+{
+	va_list ap;
+
+	va_start(ap, str);
+	fprintf(stderr, "FATAL ERROR: ");
+	vfprintf(stderr, str, ap);
+	va_end(ap);
+	exit(1);
+}
+
+static inline void *xmalloc(size_t len)
+{
+	void *new = malloc(len);
+
+	if (!new)
+		die("malloc() failed\n");
+
+	return new;
+}
+
+static inline void *xrealloc(void *p, size_t len)
+{
+	void *new = realloc(p, len);
+
+	if (!new)
+		die("realloc() failed (len=%zd)\n", len);
+
+	return new;
+}
+
+extern char *xstrdup(const char *s);
+
+#ifdef __GNUC__
+extern int __attribute__((format (printf, 2, 3)))
+xasprintf(char **strp, const char *fmt, ...);
+#else
+extern int xasprintf(char **strp, const char *fmt, ...);
+#endif
+extern char *join_path(const char *path, const char *name);
+
+/**
+ * Check a property of a given length to see if it is all printable and
+ * has a valid terminator. The property can contain either a single string,
+ * or multiple strings each of non-zero length.
+ *
+ * @param data	The string to check
+ * @param len	The string length including terminator
+ * @return 1 if a valid printable string, 0 if not
+ */
+bool util_is_printable_string(const void *data, int len);
+
+/*
+ * Parse an escaped character starting at index i in string s.  The resulting
+ * character will be returned and the index i will be updated to point at the
+ * character directly after the end of the encoding, this may be the '\0'
+ * terminator of the string.
+ */
+char get_escape_char(const char *s, int *i);
+
+/**
+ * Read a device tree file into a buffer. This will report any errors on
+ * stderr.
+ *
+ * @param filename	The filename to read, or - for stdin
+ * @return Pointer to allocated buffer containing fdt, or NULL on error
+ */
+char *utilfdt_read(const char *filename);
+
+/**
+ * Like utilfdt_read(), but also passes back the size of the file read.
+ *
+ * @param len		If non-NULL, the amount of data we managed to read
+ */
+char *utilfdt_read_len(const char *filename, off_t *len);
+
+/**
+ * Read a device tree file into a buffer. Does not report errors, but only
+ * returns them. The value returned can be passed to strerror() to obtain
+ * an error message for the user.
+ *
+ * @param filename	The filename to read, or - for stdin
+ * @param buffp		Returns pointer to buffer containing fdt
+ * @return 0 if ok, else an errno value representing the error
+ */
+int utilfdt_read_err(const char *filename, char **buffp);
+
+/**
+ * Like utilfdt_read_err(), but also passes back the size of the file read.
+ *
+ * @param len		If non-NULL, the amount of data we managed to read
+ */
+int utilfdt_read_err_len(const char *filename, char **buffp, off_t *len);
+
+/**
+ * Write a device tree buffer to a file. This will report any errors on
+ * stderr.
+ *
+ * @param filename	The filename to write, or - for stdout
+ * @param blob		Poiner to buffer containing fdt
+ * @return 0 if ok, -1 on error
+ */
+int utilfdt_write(const char *filename, const void *blob);
+
+/**
+ * Write a device tree buffer to a file. Does not report errors, but only
+ * returns them. The value returned can be passed to strerror() to obtain
+ * an error message for the user.
+ *
+ * @param filename	The filename to write, or - for stdout
+ * @param blob		Poiner to buffer containing fdt
+ * @return 0 if ok, else an errno value representing the error
+ */
+int utilfdt_write_err(const char *filename, const void *blob);
+
+/**
+ * Decode a data type string. The purpose of this string
+ *
+ * The string consists of an optional character followed by the type:
+ *	Modifier characters:
+ *		hh or b	1 byte
+ *		h	2 byte
+ *		l	4 byte, default
+ *
+ *	Type character:
+ *		s	string
+ *		i	signed integer
+ *		u	unsigned integer
+ *		x	hex
+ *
+ * TODO: Implement ll modifier (8 bytes)
+ * TODO: Implement o type (octal)
+ *
+ * @param fmt		Format string to process
+ * @param type		Returns type found(s/d/u/x), or 0 if none
+ * @param size		Returns size found(1,2,4,8) or 4 if none
+ * @return 0 if ok, -1 on error (no type given, or other invalid format)
+ */
+int utilfdt_decode_type(const char *fmt, int *type, int *size);
+
+/*
+ * This is a usage message fragment for the -t option. It is the format
+ * supported by utilfdt_decode_type.
+ */
+
+#define USAGE_TYPE_MSG \
+	"<type>\ts=string, i=int, u=unsigned, x=hex\n" \
+	"\tOptional modifier prefix:\n" \
+	"\t\thh or b=byte, h=2 byte, l=4 byte (default)";
+
+/**
+ * Print property data in a readable format to stdout
+ *
+ * Properties that look like strings will be printed as strings. Otherwise
+ * the data will be displayed either as cells (if len is a multiple of 4
+ * bytes) or bytes.
+ *
+ * If len is 0 then this function does nothing.
+ *
+ * @param data	Pointers to property data
+ * @param len	Length of property data
+ */
+void utilfdt_print_data(const char *data, int len);
+
+/**
+ * Show source version and exit
+ */
+void util_version(void) __attribute__((noreturn));
+
+/**
+ * Show usage and exit
+ *
+ * This helps standardize the output of various utils.  You most likely want
+ * to use the usage() helper below rather than call this.
+ *
+ * @param errmsg	If non-NULL, an error message to display
+ * @param synopsis	The initial example usage text (and possible examples)
+ * @param short_opts	The string of short options
+ * @param long_opts	The structure of long options
+ * @param opts_help	An array of help strings (should align with long_opts)
+ */
+void util_usage(const char *errmsg, const char *synopsis,
+		const char *short_opts, struct option const long_opts[],
+		const char * const opts_help[]) __attribute__((noreturn));
+
+/**
+ * Show usage and exit
+ *
+ * If you name all your usage variables with usage_xxx, then you can call this
+ * help macro rather than expanding all arguments yourself.
+ *
+ * @param errmsg	If non-NULL, an error message to display
+ */
+#define usage(errmsg) \
+	util_usage(errmsg, usage_synopsis, usage_short_opts, \
+		   usage_long_opts, usage_opts_help)
+
+/**
+ * Call getopt_long() with standard options
+ *
+ * Since all util code runs getopt in the same way, provide a helper.
+ */
+#define util_getopt_long() getopt_long(argc, argv, usage_short_opts, \
+				       usage_long_opts, NULL)
+
+/* Helper for aligning long_opts array */
+#define a_argument required_argument
+
+/* Helper for usage_short_opts string constant */
+#define USAGE_COMMON_SHORT_OPTS "hV"
+
+/* Helper for usage_long_opts option array */
+#define USAGE_COMMON_LONG_OPTS \
+	{"help",      no_argument, NULL, 'h'}, \
+	{"version",   no_argument, NULL, 'V'}, \
+	{NULL,        no_argument, NULL, 0x0}
+
+/* Helper for usage_opts_help array */
+#define USAGE_COMMON_OPTS_HELP \
+	"Print this help and exit", \
+	"Print version and exit", \
+	NULL
+
+/* Helper for getopt case statements */
+#define case_USAGE_COMMON_FLAGS \
+	case 'h': usage(NULL); \
+	case 'V': util_version(); \
+	case '?': usage("unknown option");
+
+#endif /* _UTIL_H */
diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h
new file mode 100644
index 0000000000..bbbd96b1dc
--- /dev/null
+++ b/scripts/dtc/version_gen.h
@@ -0,0 +1 @@
+#define DTC_VERSION "DTC 1.4.3"

commit 57a9c70605aac036ed60a8b4801c895ad335f163
Author: Jean-Jacques Hiblot <jjhiblot@ti.com>
Date:   Thu Sep 21 17:03:09 2017 +0200

    UPSTREAM: dm: core: Add functions to get strings and the string count from a stringlist
    
    dev_read_string_count() is used to get the number of strings in a
    stringlist.
    dev_read_string_index() is used to get a string in the stringlist based on
    its position in the list.
    
    Change-Id: I0e144e7c2048030a9b43ca6153225f6267d58c89
    Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b5a144a5014be5e3b065e2061a7d17e653d739ae)

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 065589a6ab..eacf1716fd 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -81,6 +81,17 @@ int dev_read_stringlist_search(struct udevice *dev, const char *property,
 	return ofnode_stringlist_search(dev_ofnode(dev), property, string);
 }
 
+int dev_read_string_index(struct udevice *dev, const char *propname, int index,
+			  const char **outp)
+{
+	return ofnode_read_string_index(dev_ofnode(dev), propname, index, outp);
+}
+
+int dev_read_string_count(struct udevice *dev, const char *propname)
+{
+	return ofnode_read_string_count(dev_ofnode(dev), propname);
+}
+
 int dev_read_phandle_with_args(struct udevice *dev, const char *list_name,
 				const char *cells_name, int cell_count,
 				int index,
diff --git a/include/dm/read.h b/include/dm/read.h
index e7f71256a8..8114037e97 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -165,6 +165,29 @@ const char *dev_read_name(struct udevice *dev);
 int dev_read_stringlist_search(struct udevice *dev, const char *property,
 			  const char *string);
 
+/**
+ * dev_read_string_index() - obtain an indexed string from a string list
+ *
+ * @dev: device to examine
+ * @propname: name of the property containing the string list
+ * @index: index of the string to return
+ * @out: return location for the string
+ *
+ * @return:
+ *   length of string, if found or -ve error value if not found
+ */
+int dev_read_string_index(struct udevice *dev, const char *propname, int index,
+			  const char **outp);
+
+/**
+ * dev_read_string_count() - find the number of strings in a string list
+ *
+ * @dev: device to examine
+ * @propname: name of the property containing the string list
+ * @return:
+ *   number of strings in the list, or -ve error value if not found
+ */
+int dev_read_string_count(struct udevice *dev, const char *propname);
 /**
  * dev_read_phandle_with_args() - Find a node pointed by phandle in a list
  *
@@ -451,6 +474,19 @@ static inline int dev_read_stringlist_search(struct udevice *dev,
 	return ofnode_stringlist_search(dev_ofnode(dev), propname, string);
 }
 
+static inline int dev_read_string_index(struct udevice *dev,
+					const char *propname, int index,
+					const char **outp)
+{
+	return ofnode_read_string_index(dev_ofnode(dev), propname, index, outp);
+}
+
+static inline int dev_read_string_count(struct udevice *dev,
+					const char *propname)
+{
+	return ofnode_read_string_count(dev_ofnode(dev), propname);
+}
+
 static inline int dev_read_phandle_with_args(struct udevice *dev,
 		const char *list_name, const char *cells_name, int cell_count,
 		int index, struct ofnode_phandle_args *out_args)

commit d464d465d14207ab5a8a7769283dc97d734edd86
Author: Tom Rini <trini@konsulko.com>
Date:   Sun Sep 17 09:42:25 2017 -0400

    UPSTREAM: Travis-CI: Checkout only v1.4.3 of dtc
    
    Our minimum DTC version is 1.4.3, so check that out.
    
    Change-Id: I50fd989f2aea757159aa1ad2b1e9ececb6b06886
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 91ebf300934461e450f5ef8f386ea9e55d2636c5)

diff --git a/.travis.yml b/.travis.yml
index b81d733695..9dfd016da0 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -29,7 +29,7 @@ addons:
 
 install:
  # install latest device tree compiler
- - git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
+ - git clone --depth=1 -b v1.4.3 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
  - make -j4 -C /tmp/dtc
  # Clone uboot-test-hooks
  - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks

commit 65dc5c3a2eebd297d6779add4a6eea3b9cda9d37
Author: Tom Rini <trini@konsulko.com>
Date:   Thu Sep 14 11:29:33 2017 -0400

    UPSTREAM: Travis-CI: Switch back to using the top of tree dtc
    
    In a0f3e3df4adc we switched to using the Ubuntu-provided dtc as travis
    was having a problem with the number of warnings that were generated by
    the newer dtc.  This is no longer a concern as we now have the same
    logic as Linux to enable/disable additional more stringent warnings.  Go
    back to building dtc from source.
    
    Change-Id: I5d7db0a0c2c797430818dcac3d0933cc5451f378
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Tested on travis-ci:
    Tested-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ae1c0a38c8b163d685121e3109161da7ac1caacd)

diff --git a/.travis.yml b/.travis.yml
index 4b7f8dd8e4..b81d733695 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -26,12 +26,11 @@ addons:
     - grub-efi-ia32-bin
     - rpm2cpio
     - wget
-    - device-tree-compiler
 
 install:
  # install latest device tree compiler
- #- git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
- #- make -j4 -C /tmp/dtc
+ - git clone --depth=1 git://git.kernel.org/pub/scm/utils/dtc/dtc.git /tmp/dtc
+ - make -j4 -C /tmp/dtc
  # Clone uboot-test-hooks
  - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
  - ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`

commit 4e8c225a1d386380171f4be14f3bd22ca85bc0bb
Author: Jörg Krause <joerg.krause@embedded.rocks>
Date:   Fri Sep 15 22:16:48 2017 +0200

    UPSTREAM: net/tftp: fix build if CMD_BOOTEFI is not set
    
    Fixes:
    net/tftp.c:811: undefined reference to `efi_set_bootdev'
    
    Change-Id: Ic4457c16228d03d8202cdab618f3178f5556610b
    Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 64b8d7a677ce625c7dd30c040b32b606aea61745)

diff --git a/net/tftp.c b/net/tftp.c
index a5ed8c5d0a..6671b1f7ca 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -805,7 +805,9 @@ void tftp_start(enum proto_t protocol)
 		printf("Load address: 0x%lx\n", load_addr);
 		puts("Loading: *\b");
 		tftp_state = STATE_SEND_RRQ;
+#ifdef CONFIG_CMD_BOOTEFI
 		efi_set_bootdev("Net", "", tftp_filename);
+#endif
 	}
 
 	time_start = get_timer(0);

commit d18ad2e6e5bfa694206c7498f27ec230a6b8f915
Author: York Sun <york.sun@nxp.com>
Date:   Fri Sep 15 08:21:13 2017 -0700

    UPSTREAM: spl: Fix compiling warning on gunzip argument
    
    common/spl/spl_fit.c:201:12: warning: passing argument 4 of ‘gunzip’
    from incompatible pointer type [-Wincompatible-pointer-types]
           src, &length))
    
    Change-Id: I58ddaf516e012064afaea3710abb4e4d9710487b
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    CC: Jean-Jacques Hiblot <jjhiblot@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 933f67aa56ea742f014b21bfe50a16a00e97b9bd)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 49ccf1c17b..32d9ee5901 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -135,6 +135,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	int offset;
 	size_t length;
 	int len;
+	ulong size;
 	ulong load_addr, load_ptr;
 	void *src;
 	ulong overhead;
@@ -197,11 +198,13 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	    IS_ENABLED(CONFIG_SPL_GZIP)		&&
 	    image_comp == IH_COMP_GZIP		&&
 	    type == IH_TYPE_KERNEL) {
+		size = length;
 		if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
-			   src, &length)) {
+			   src, &size)) {
 			puts("Uncompressing error\n");
 			return -EIO;
 		}
+		length = size;
 	} else {
 		memcpy((void *)load_addr, src, length);
 	}

commit 29de6c9147719221388fa309224bb0e62e2649f4
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Sep 22 07:37:43 2017 -0400

    UPSTREAM: fs/fat: Reduce stack usage
    
    We have limited stack in SPL builds.  Drop itrblock and move to
    malloc/free of itr to move this off of the stack.  As part of this fix a
    double-free issue in fat_size().
    
    Change-Id: I2d8baa3a0b6ffa0f9591366a095d5e315c41fde8
    Signed-off-by: Tom Rini <trini@konsulko.com>
    ---
    Rework to use malloc/free as moving this to a global overflows some SH
    targets.
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2460098cffacd18729262e3ed36656e6943783ed)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index f0284398b4..36a309c73c 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1034,24 +1034,27 @@ int file_fat_detectfs(void)
 int fat_exists(const char *filename)
 {
 	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
+	fat_itr *itr;
 	int ret;
 
+	itr = malloc(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return 0;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
 	free(fsdata.fatbuf);
+	free(itr);
 	return ret == 0;
 }
 
 int fat_size(const char *filename, loff_t *size)
 {
 	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
+	fat_itr *itr;
 	int ret;
 
+	itr = malloc(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;
@@ -1072,8 +1075,9 @@ int fat_size(const char *filename, loff_t *size)
 	}
 
 	*size = FAT2CPU32(itr->dent->size);
-out:
 	free(fsdata.fatbuf);
+out:
+	free(itr);
 	return ret;
 }
 
@@ -1081,9 +1085,10 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		     loff_t maxsize, loff_t *actread)
 {
 	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
+	fat_itr *itr;
 	int ret;
 
+	itr = malloc(sizeof(fat_itr));
 	ret = fat_itr_root(itr, &fsdata);
 	if (ret)
 		return ret;
@@ -1097,6 +1102,7 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 
 out:
 	free(fsdata.fatbuf);
+	free(itr);
 	return ret;
 }
 

commit 85681a03edc60ab1d349e55de128beb718ea052f
Author: Rob Clark <robdclark@gmail.com>
Date:   Tue Sep 12 16:40:01 2017 -0400

    UPSTREAM: fs/fat: fix fatbuf leak
    
    A new fatbuf was allocated by get_fs_info() (called by fat_itr_root()),
    but not freed, resulting in eventually running out of memory.  Spotted
    by running 'ls -r' in a large FAT filesystem from Shell.efi.
    
    fatbuf is mainly used to cache FAT entry lookups (get_fatent())..
    possibly once fat_write.c it can move into the iterator to simplify
    this.
    
    Change-Id: I194a2de30a177e9b377dc50c61a2af6106dd8820
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 725ffdb5cbcc4b8a9726a68cc6ae0713266ba5a9)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index f5f74c12ff..f0284398b4 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1042,6 +1042,7 @@ int fat_exists(const char *filename)
 		return 0;
 
 	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
+	free(fsdata.fatbuf);
 	return ret == 0;
 }
 
@@ -1061,17 +1062,19 @@ int fat_size(const char *filename, loff_t *size)
 		 * Directories don't have size, but fs_size() is not
 		 * expected to fail if passed a directory path:
 		 */
+		free(fsdata.fatbuf);
 		fat_itr_root(itr, &fsdata);
 		if (!fat_itr_resolve(itr, filename, TYPE_DIR)) {
 			*size = 0;
-			return 0;
+			ret = 0;
 		}
-		return ret;
+		goto out;
 	}
 
 	*size = FAT2CPU32(itr->dent->size);
-
-	return 0;
+out:
+	free(fsdata.fatbuf);
+	return ret;
 }
 
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
@@ -1087,10 +1090,14 @@ int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 
 	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
 	if (ret)
-		return ret;
+		goto out;
 
 	printf("reading %s\n", filename);
-	return get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
+	ret = get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
+
+out:
+	free(fsdata.fatbuf);
+	return ret;
 }
 
 int file_fat_read(const char *filename, void *buffer, int maxsize)
@@ -1126,7 +1133,7 @@ typedef struct {
 
 int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
 {
-	fat_dir *dir = malloc(sizeof(*dir));
+	fat_dir *dir = calloc(1, sizeof(*dir));
 	int ret;
 
 	if (!dir)
@@ -1144,6 +1151,7 @@ int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
 	return 0;
 
 fail:
+	free(dir->fsdata.fatbuf);
 	free(dir);
 	return ret;
 }
@@ -1174,6 +1182,7 @@ int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp)
 void fat_closedir(struct fs_dir_stream *dirs)
 {
 	fat_dir *dir = (fat_dir *)dirs;
+	free(dir->fsdata.fatbuf);
 	free(dir);
 }
 

commit 1d8c5dbb6ed50e42d1ea0a7f9c0e6d589648e890
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:16:00 2017 -0400

    UPSTREAM: fs/fat: Clean up open-coded sector <-> cluster conversions
    
    Use the clust_to_sect() helper that was introduced earlier, and add an
    inverse sect_to_clust(), plus update the various spots that open-coded
    this conversion previously.
    
    Change-Id: Ifb6a59cefda1491639dcd6e8ea32fd2490af13b5
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 265edc03d5a19550d92cbd6e10631d5a15bdd1d5)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 65873a2c2a..f5f74c12ff 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -257,8 +257,7 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size)
 	int ret;
 
 	if (clustnum > 0) {
-		startsect = mydata->data_begin +
-				clustnum * mydata->clust_size;
+		startsect = clust_to_sect(mydata, clustnum);
 	} else {
 		startsect = mydata->rootdir_sect;
 	}
@@ -594,9 +593,8 @@ static int get_fs_info(fsdata *mydata)
 		mydata->data_begin = mydata->rootdir_sect +
 					mydata->rootdir_size -
 					(mydata->clust_size * 2);
-		mydata->root_cluster = (mydata->rootdir_sect -
-					mydata->data_begin) /
-					mydata->clust_size;
+		mydata->root_cluster =
+			sect_to_clust(mydata, mydata->rootdir_sect);
 	}
 
 	mydata->fatbufnum = -1;
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index d0468baf8f..9d2e0ed74c 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -502,8 +502,7 @@ set_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer,
 	int ret;
 
 	if (clustnum > 0)
-		startsect = mydata->data_begin +
-				clustnum * mydata->clust_size;
+		startsect = clust_to_sect(mydata, clustnum);
 	else
 		startsect = mydata->rootdir_sect;
 
@@ -751,8 +750,7 @@ static int check_overflow(fsdata *mydata, __u32 clustnum, loff_t size)
 	__u32 startsect, sect_num, offset;
 
 	if (clustnum > 0) {
-		startsect = mydata->data_begin +
-				clustnum * mydata->clust_size;
+		startsect = clust_to_sect(mydata, clustnum);
 	} else {
 		startsect = mydata->rootdir_sect;
 	}
@@ -791,7 +789,7 @@ static dir_entry *empty_dentptr;
 static dir_entry *find_directory_entry(fsdata *mydata, int startsect,
 	char *filename, dir_entry *retdent, __u32 start)
 {
-	__u32 curclust = (startsect - mydata->data_begin) / mydata->clust_size;
+	__u32 curclust = sect_to_clust(mydata, startsect);
 
 	debug("get_dentfromdir: %s\n", filename);
 
diff --git a/include/fat.h b/include/fat.h
index 0f58939124..bdeda95e6d 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -177,12 +177,16 @@ typedef struct {
 	__u32	root_cluster;	/* First cluster of root dir for FAT32 */
 } fsdata;
 
-/* TODO clean up places that are open-coding this: */
 static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
 {
 	return fsdata->data_begin + clust * fsdata->clust_size;
 }
 
+static inline u32 sect_to_clust(fsdata *fsdata, u32 sect)
+{
+	return (sect - fsdata->data_begin) / fsdata->clust_size;
+}
+
 int file_fat_detectfs(void);
 int fat_exists(const char *filename);
 int fat_size(const char *filename, loff_t *size);

commit 271eb2081258cb3b334c79d0c5e9a96d789a6ebc
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:59 2017 -0400

    UPSTREAM: fs/fat: fix case for FAT shortnames
    
    Noticed when comparing our output to linux.  There are some lcase bits
    which control whether filename and/or extension should be downcase'd.
    
    Change-Id: I55dc1f9ef025dc3174158d06ed78d1f8b54e1335
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 21a24c3bf35bac83d66ce4a48eb0c7dd8a7227cb)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index c951d84f57..65873a2c2a 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -29,11 +29,13 @@ static const int vfat_enabled = 0;
 #endif
 
 /*
- * Convert a string to lowercase.
+ * Convert a string to lowercase.  Converts at most 'len' characters,
+ * 'len' may be larger than the length of 'str' if 'str' is NULL
+ * terminated.
  */
-static void downcase(char *str)
+static void downcase(char *str, size_t len)
 {
-	while (*str != '\0') {
+	while (*str != '\0' && len--) {
 		*str = tolower(*str);
 		str++;
 	}
@@ -131,10 +133,13 @@ static void get_name(dir_entry *dirent, char *s_name)
 	ptr = s_name;
 	while (*ptr && *ptr != ' ')
 		ptr++;
+	if (dirent->lcase & CASE_LOWER_BASE)
+		downcase(s_name, (unsigned)(ptr - s_name));
 	if (dirent->ext[0] && dirent->ext[0] != ' ') {
-		*ptr = '.';
-		ptr++;
+		*ptr++ = '.';
 		memcpy(ptr, dirent->ext, 3);
+		if (dirent->lcase & CASE_LOWER_EXT)
+			downcase(ptr, 3);
 		ptr[3] = '\0';
 		while (*ptr && *ptr != ' ')
 			ptr++;
@@ -144,7 +149,6 @@ static void get_name(dir_entry *dirent, char *s_name)
 		*s_name = '\0';
 	else if (*s_name == aRING)
 		*s_name = DELETED_FLAG;
-	downcase(s_name);
 }
 
 static int flush_dirty_fat_buffer(fsdata *mydata);
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 4ca024c208..d0468baf8f 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -345,7 +345,7 @@ get_long_file_name(fsdata *mydata, int curclust, __u8 *cluster,
 		*l_name = '\0';
 	else if (*l_name == aRING)
 		*l_name = DELETED_FLAG;
-	downcase(l_name);
+	downcase(l_name, INT_MAX);
 
 	/* Return the real directory entry */
 	*retdent = realdent;
@@ -981,7 +981,7 @@ static int do_fat_write(const char *filename, void *buffer, loff_t size,
 
 	memcpy(l_filename, filename, name_len);
 	l_filename[name_len] = 0; /* terminate the string */
-	downcase(l_filename);
+	downcase(l_filename, INT_MAX);
 
 	startsect = mydata->rootdir_sect;
 	retdent = find_directory_entry(mydata, startsect,
diff --git a/include/fat.h b/include/fat.h
index 83cd90017e..0f58939124 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -128,10 +128,14 @@ typedef struct volume_info
 	/* Boot sign comes last, 2 bytes */
 } volume_info;
 
+/* see dir_entry::lcase: */
+#define CASE_LOWER_BASE	8	/* base (name) is lower case */
+#define CASE_LOWER_EXT	16	/* extension is lower case */
+
 typedef struct dir_entry {
 	char	name[8],ext[3];	/* Name and extension */
 	__u8	attr;		/* Attribute bits */
-	__u8	lcase;		/* Case for base and extension */
+	__u8	lcase;		/* Case for name and ext (CASE_LOWER_x) */
 	__u8	ctime_ms;	/* Creation time, milliseconds */
 	__u16	ctime;		/* Creation time */
 	__u16	cdate;		/* Creation date */

commit d5fb8aea9ff3ac16320f6fd75ffe625a2be0f119
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:58 2017 -0400

    UPSTREAM: fat/fs: move ls to generic implementation
    
    Add a generic implementation of 'ls' using opendir/readdir/closedir, and
    replace fat's custom implementation.  Other filesystems should move to
    the generic implementation after they add opendir/readdir/closedir
    support.
    
    Change-Id: I287d3cd6e97c0c1901518c5ae1bb0653c7299f9b
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 89191d626793490b579e1d36e7d7a4464a20f9f6)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 82ddb7eab1..c951d84f57 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1029,38 +1029,6 @@ int file_fat_detectfs(void)
 	return 0;
 }
 
-int file_fat_ls(const char *dir)
-{
-	fsdata fsdata;
-	fat_itr itrblock, *itr = &itrblock;
-	int files = 0, dirs = 0;
-	int ret;
-
-	ret = fat_itr_root(itr, &fsdata);
-	if (ret)
-		return ret;
-
-	ret = fat_itr_resolve(itr, dir, TYPE_DIR);
-	if (ret)
-		return ret;
-
-	while (fat_itr_next(itr)) {
-		if (fat_itr_isdir(itr)) {
-			printf("            %s/\n", itr->name);
-			dirs++;
-		} else {
-			printf(" %8u   %s\n",
-			       FAT2CPU32(itr->dent->size),
-			       itr->name);
-			files++;
-		}
-	}
-
-	printf("\n%d file(s), %d dir(s)\n\n", files, dirs);
-
-	return 0;
-}
-
 int fat_exists(const char *filename)
 {
 	fsdata fsdata;
diff --git a/fs/fs.c b/fs/fs.c
index fc0c953fcb..3481229aa6 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -37,6 +37,35 @@ static inline int fs_ls_unsupported(const char *dirname)
 	return -1;
 }
 
+/* generic implementation of ls in terms of opendir/readdir/closedir */
+__maybe_unused
+static int fs_ls_generic(const char *dirname)
+{
+	struct fs_dir_stream *dirs;
+	struct fs_dirent *dent;
+	int nfiles = 0, ndirs = 0;
+
+	dirs = fs_opendir(dirname);
+	if (!dirs)
+		return -errno;
+
+	while ((dent = fs_readdir(dirs))) {
+		if (dent->type == FS_DT_DIR) {
+			printf("            %s/\n", dent->name);
+			ndirs++;
+		} else {
+			printf(" %8lld   %s\n", dent->size, dent->name);
+			nfiles++;
+		}
+	}
+
+	fs_closedir(dirs);
+
+	printf("\n%d file(s), %d dir(s)\n\n", nfiles, ndirs);
+
+	return 0;
+}
+
 static inline int fs_exists_unsupported(const char *filename)
 {
 	return 0;
@@ -123,7 +152,7 @@ static struct fstype_info fstypes[] = {
 		.null_dev_desc_ok = false,
 		.probe = fat_set_blk_dev,
 		.close = fat_close,
-		.ls = file_fat_ls,
+		.ls = fs_ls_generic,
 		.exists = fat_exists,
 		.size = fat_size,
 		.read = fat_read_file,
@@ -133,7 +162,9 @@ static struct fstype_info fstypes[] = {
 		.write = fs_write_unsupported,
 #endif
 		.uuid = fs_uuid_unsupported,
-		.opendir = fs_opendir_unsupported,
+		.opendir = fat_opendir,
+		.readdir = fat_readdir,
+		.closedir = fat_closedir,
 	},
 #endif
 #ifdef CONFIG_FS_EXT4
diff --git a/include/fat.h b/include/fat.h
index b255ce5337..83cd90017e 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -11,6 +11,7 @@
 #define _FAT_H_
 
 #include <asm/byteorder.h>
+#include <fs.h>
 
 #define CONFIG_SUPPORT_VFAT
 /* Maximum Long File Name length supported here is 128 UTF-16 code units */
@@ -179,7 +180,6 @@ static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
 }
 
 int file_fat_detectfs(void);
-int file_fat_ls(const char *dir);
 int fat_exists(const char *filename);
 int fat_size(const char *filename, loff_t *size);
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
@@ -192,5 +192,8 @@ int file_fat_write(const char *filename, void *buf, loff_t offset, loff_t len,
 		   loff_t *actwrite);
 int fat_read_file(const char *filename, void *buf, loff_t offset, loff_t len,
 		  loff_t *actread);
+int fat_opendir(const char *filename, struct fs_dir_stream **dirsp);
+int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp);
+void fat_closedir(struct fs_dir_stream *dirs);
 void fat_close(void);
 #endif /* _FAT_H_ */

commit 53ee50a1caac69e413a945f1ee2a85674402602b
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:57 2017 -0400

    UPSTREAM: fat/fs: remove a bunch of dead code
    
    Spotted by chance, when trying to remove file_fat_ls(), I noticed there
    were some dead users of the API.
    
    Change-Id: Iab669e5f9fd3840dbf1d7ebf026c6827775186ab
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Acked-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 41fa83d1a6cdd8ddfb3fbe332252193ff8fb8b71)

diff --git a/fs/fat/Makefile b/fs/fat/Makefile
index b60e8486c4..3e2a6b01a8 100644
--- a/fs/fat/Makefile
+++ b/fs/fat/Makefile
@@ -5,7 +5,3 @@
 
 obj-$(CONFIG_FS_FAT)	:= fat.o
 obj-$(CONFIG_FAT_WRITE):= fat_write.o
-
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_FS_FAT)	+= file.o
-endif
diff --git a/fs/fat/file.c b/fs/fat/file.c
deleted file mode 100644
index 89706117b9..0000000000
--- a/fs/fat/file.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * file.c
- *
- * Mini "VFS" by Marcus Sundberg
- *
- * 2002-07-28 - rjones@nexus-tech.net - ported to ppcboot v1.1.6
- * 2003-03-10 - kharris@nexus-tech.net - ported to uboot
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <config.h>
-#include <malloc.h>
-#include <fat.h>
-#include <linux/stat.h>
-#include <linux/time.h>
-
-/* Supported filesystems */
-static const struct filesystem filesystems[] = {
-	{ file_fat_detectfs,  file_fat_ls,  file_fat_read,  "FAT" },
-};
-#define NUM_FILESYS	(sizeof(filesystems)/sizeof(struct filesystem))
-
-/* The filesystem which was last detected */
-static int current_filesystem = FSTYPE_NONE;
-
-/* The current working directory */
-#define CWD_LEN		511
-char file_cwd[CWD_LEN+1] = "/";
-
-const char *
-file_getfsname(int idx)
-{
-	if (idx < 0 || idx >= NUM_FILESYS)
-		return NULL;
-
-	return filesystems[idx].name;
-}
-
-static void
-pathcpy(char *dest, const char *src)
-{
-	char *origdest = dest;
-
-	do {
-		if (dest-file_cwd >= CWD_LEN) {
-			*dest = '\0';
-			return;
-		}
-		*(dest) = *(src);
-		if (*src == '\0') {
-			if (dest-- != origdest && ISDIRDELIM(*dest)) {
-				*dest = '\0';
-			}
-			return;
-		}
-		++dest;
-
-		if (ISDIRDELIM(*src))
-			while (ISDIRDELIM(*src)) src++;
-		else
-			src++;
-	} while (1);
-}
-
-int
-file_cd(const char *path)
-{
-	if (ISDIRDELIM(*path)) {
-		while (ISDIRDELIM(*path)) path++;
-		strncpy(file_cwd+1, path, CWD_LEN-1);
-	} else {
-		const char *origpath = path;
-		char *tmpstr = file_cwd;
-		int back = 0;
-
-		while (*tmpstr != '\0') tmpstr++;
-		do {
-			tmpstr--;
-		} while (ISDIRDELIM(*tmpstr));
-
-		while (*path == '.') {
-			path++;
-			while (*path == '.') {
-				path++;
-				back++;
-			}
-			if (*path != '\0' && !ISDIRDELIM(*path)) {
-				path = origpath;
-				back = 0;
-				break;
-			}
-			while (ISDIRDELIM(*path)) path++;
-			origpath = path;
-		}
-
-		while (back--) {
-			/* Strip off path component */
-			while (!ISDIRDELIM(*tmpstr)) {
-				tmpstr--;
-			}
-			if (tmpstr == file_cwd) {
-				/* Incremented again right after the loop. */
-				tmpstr--;
-				break;
-			}
-			/* Skip delimiters */
-			while (ISDIRDELIM(*tmpstr)) tmpstr--;
-		}
-		tmpstr++;
-		if (*path == '\0') {
-			if (tmpstr == file_cwd) {
-				*tmpstr = '/';
-				tmpstr++;
-			}
-			*tmpstr = '\0';
-			return 0;
-		}
-		*tmpstr = '/';
-		pathcpy(tmpstr+1, path);
-	}
-
-	return 0;
-}
-
-int
-file_detectfs(void)
-{
-	int i;
-
-	current_filesystem = FSTYPE_NONE;
-
-	for (i = 0; i < NUM_FILESYS; i++) {
-		if (filesystems[i].detect() == 0) {
-			strcpy(file_cwd, "/");
-			current_filesystem = i;
-			break;
-		}
-	}
-
-	return current_filesystem;
-}
-
-int
-file_ls(const char *dir)
-{
-	char fullpath[1024];
-	const char *arg;
-
-	if (current_filesystem == FSTYPE_NONE) {
-		printf("Can't list files without a filesystem!\n");
-		return -1;
-	}
-
-	if (ISDIRDELIM(*dir)) {
-		arg = dir;
-	} else {
-		sprintf(fullpath, "%s/%s", file_cwd, dir);
-		arg = fullpath;
-	}
-	return filesystems[current_filesystem].ls(arg);
-}
-
-int file_read(const char *filename, void *buffer, int maxsize)
-{
-	char fullpath[1024];
-	const char *arg;
-
-	if (current_filesystem == FSTYPE_NONE) {
-		printf("Can't load file without a filesystem!\n");
-		return -1;
-	}
-
-	if (ISDIRDELIM(*filename)) {
-		arg = filename;
-	} else {
-		sprintf(fullpath, "%s/%s", file_cwd, filename);
-		arg = fullpath;
-	}
-
-	return filesystems[current_filesystem].read(arg, buffer, maxsize);
-}
diff --git a/include/fat.h b/include/fat.h
index 18d8981c48..b255ce5337 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -178,25 +178,6 @@ static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
 	return fsdata->data_begin + clust * fsdata->clust_size;
 }
 
-typedef int	(file_detectfs_func)(void);
-typedef int	(file_ls_func)(const char *dir);
-typedef int	(file_read_func)(const char *filename, void *buffer,
-				 int maxsize);
-
-struct filesystem {
-	file_detectfs_func	*detect;
-	file_ls_func		*ls;
-	file_read_func		*read;
-	const char		name[12];
-};
-
-/* FAT tables */
-file_detectfs_func	file_fat_detectfs;
-file_ls_func		file_fat_ls;
-file_read_func		file_fat_read;
-
-/* Currently this doesn't check if the dir exists or is valid... */
-int file_cd(const char *path);
 int file_fat_detectfs(void);
 int file_fat_ls(const char *dir);
 int fat_exists(const char *filename);
@@ -204,7 +185,6 @@ int fat_size(const char *filename, loff_t *size);
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		     loff_t maxsize, loff_t *actread);
 int file_fat_read(const char *filename, void *buffer, int maxsize);
-const char *file_getfsname(int idx);
 int fat_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
 int fat_register_device(struct blk_desc *dev_desc, int part_no);
 

commit 60352d2210dee103e9ca03b2f51994ea028afc82
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:56 2017 -0400

    UPSTREAM: fs/fat: implement opendir/readdir/closedir
    
    Implement the readdir interface using the directory iterators.
    
    Change-Id: I88123b039fa0644033847670027aca9d99bd4d2e
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1f40366b319eac7eb02f8894fff5c94fbdb47d30)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index bbba7947ee..82ddb7eab1 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -14,6 +14,7 @@
 #include <config.h>
 #include <exports.h>
 #include <fat.h>
+#include <fs.h>
 #include <asm/byteorder.h>
 #include <part.h>
 #include <malloc.h>
@@ -1146,6 +1147,66 @@ int fat_read_file(const char *filename, void *buf, loff_t offset, loff_t len,
 	return ret;
 }
 
+typedef struct {
+	struct fs_dir_stream parent;
+	struct fs_dirent dirent;
+	fsdata fsdata;
+	fat_itr itr;
+} fat_dir;
+
+int fat_opendir(const char *filename, struct fs_dir_stream **dirsp)
+{
+	fat_dir *dir = malloc(sizeof(*dir));
+	int ret;
+
+	if (!dir)
+		return -ENOMEM;
+
+	ret = fat_itr_root(&dir->itr, &dir->fsdata);
+	if (ret)
+		goto fail;
+
+	ret = fat_itr_resolve(&dir->itr, filename, TYPE_DIR);
+	if (ret)
+		goto fail;
+
+	*dirsp = (struct fs_dir_stream *)dir;
+	return 0;
+
+fail:
+	free(dir);
+	return ret;
+}
+
+int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp)
+{
+	fat_dir *dir = (fat_dir *)dirs;
+	struct fs_dirent *dent = &dir->dirent;
+
+	if (!fat_itr_next(&dir->itr))
+		return -ENOENT;
+
+	memset(dent, 0, sizeof(*dent));
+	strcpy(dent->name, dir->itr.name);
+
+	if (fat_itr_isdir(&dir->itr)) {
+		dent->type = FS_DT_DIR;
+	} else {
+		dent->type = FS_DT_REG;
+		dent->size = FAT2CPU32(dir->itr.dent->size);
+	}
+
+	*dentp = dent;
+
+	return 0;
+}
+
+void fat_closedir(struct fs_dir_stream *dirs)
+{
+	fat_dir *dir = (fat_dir *)dirs;
+	free(dir);
+}
+
 void fat_close(void)
 {
 }

commit b3800056b1e398ab3bede7e927285eeddca7e088
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:55 2017 -0400

    UPSTREAM: fs: add fs_readdir()
    
    Needed to support efi file protocol.  The fallback.efi loader wants
    to be able to read the contents of the /EFI directory to find an OS
    to boot.
    
    Modelled after POSIX opendir()/readdir()/closedir().  Unlike the other
    fs APIs, this is stateful (ie. state is held in the FS_DIR "directory
    stream"), to avoid re-traversing of the directory structure at each
    step.  The directory stream must be released with closedir() when it
    is no longer needed.
    
    Change-Id: I5a977a73024ff4646fc3c4f7c49993de0b5b6256
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4bbcc965f995564870ca02606137e60e873e0a1f)

diff --git a/disk/part.c b/disk/part.c
index 96c2858ac9..1903a31abc 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -347,6 +347,24 @@ int part_get_info(struct blk_desc *dev_desc, int part,
 	return -1;
 }
 
+int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info)
+{
+	info->start = 0;
+	info->size = dev_desc->lba;
+	info->blksz = dev_desc->blksz;
+	info->bootable = 0;
+	strcpy((char *)info->type, BOOT_PART_TYPE);
+	strcpy((char *)info->name, "Whole Disk");
+#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
+	info->uuid[0] = 0;
+#endif
+#ifdef CONFIG_PARTITION_TYPE_GUID
+	info->type_guid[0] = 0;
+#endif
+
+	return 0;
+}
+
 int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,
 			  struct blk_desc **dev_desc)
 {
@@ -539,18 +557,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 
 		(*dev_desc)->log2blksz = LOG2((*dev_desc)->blksz);
 
-		info->start = 0;
-		info->size = (*dev_desc)->lba;
-		info->blksz = (*dev_desc)->blksz;
-		info->bootable = 0;
-		strcpy((char *)info->type, BOOT_PART_TYPE);
-		strcpy((char *)info->name, "Whole Disk");
-#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
-		info->uuid[0] = 0;
-#endif
-#ifdef CONFIG_PARTITION_TYPE_GUID
-		info->type_guid[0] = 0;
-#endif
+		part_get_info_whole_disk(*dev_desc, info);
 
 		ret = 0;
 		goto cleanup;
diff --git a/fs/fs.c b/fs/fs.c
index 13cd3626c6..fc0c953fcb 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -21,6 +21,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 static struct blk_desc *fs_dev_desc;
+static int fs_dev_part;
 static disk_partition_t fs_partition;
 static int fs_type = FS_TYPE_ANY;
 
@@ -69,6 +70,12 @@ static inline int fs_uuid_unsupported(char *uuid_str)
 	return -1;
 }
 
+static inline int fs_opendir_unsupported(const char *filename,
+					 struct fs_dir_stream **dirs)
+{
+	return -EACCES;
+}
+
 struct fstype_info {
 	int fstype;
 	char *name;
@@ -92,6 +99,20 @@ struct fstype_info {
 		     loff_t len, loff_t *actwrite);
 	void (*close)(void);
 	int (*uuid)(char *uuid_str);
+	/*
+	 * Open a directory stream.  On success return 0 and directory
+	 * stream pointer via 'dirsp'.  On error, return -errno.  See
+	 * fs_opendir().
+	 */
+	int (*opendir)(const char *filename, struct fs_dir_stream **dirsp);
+	/*
+	 * Read next entry from directory stream.  On success return 0
+	 * and directory entry pointer via 'dentp'.  On error return
+	 * -errno.  See fs_readdir().
+	 */
+	int (*readdir)(struct fs_dir_stream *dirs, struct fs_dirent **dentp);
+	/* see fs_closedir() */
+	void (*closedir)(struct fs_dir_stream *dirs);
 };
 
 static struct fstype_info fstypes[] = {
@@ -112,6 +133,7 @@ static struct fstype_info fstypes[] = {
 		.write = fs_write_unsupported,
 #endif
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 #ifdef CONFIG_FS_EXT4
@@ -131,6 +153,7 @@ static struct fstype_info fstypes[] = {
 		.write = fs_write_unsupported,
 #endif
 		.uuid = ext4fs_uuid,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 #ifdef CONFIG_SANDBOX
@@ -146,6 +169,7 @@ static struct fstype_info fstypes[] = {
 		.read = fs_read_sandbox,
 		.write = fs_write_sandbox,
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 #ifdef CONFIG_CMD_UBIFS
@@ -161,6 +185,7 @@ static struct fstype_info fstypes[] = {
 		.read = ubifs_read,
 		.write = fs_write_unsupported,
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 #endif
 	{
@@ -175,6 +200,7 @@ static struct fstype_info fstypes[] = {
 		.read = fs_read_unsupported,
 		.write = fs_write_unsupported,
 		.uuid = fs_uuid_unsupported,
+		.opendir = fs_opendir_unsupported,
 	},
 };
 
@@ -226,6 +252,31 @@ int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype)
 		if (!fs_dev_desc && !info->null_dev_desc_ok)
 			continue;
 
+		if (!info->probe(fs_dev_desc, &fs_partition)) {
+			fs_type = info->fstype;
+			fs_dev_part = part;
+			return 0;
+		}
+	}
+
+	return -1;
+}
+
+/* set current blk device w/ blk_desc + partition # */
+int fs_set_blk_dev_with_part(struct blk_desc *desc, int part)
+{
+	struct fstype_info *info;
+	int ret, i;
+
+	if (part >= 1)
+		ret = part_get_info(desc, part, &fs_partition);
+	else
+		ret = part_get_info_whole_disk(desc, &fs_partition);
+	if (ret)
+		return ret;
+	fs_dev_desc = desc;
+
+	for (i = 0, info = fstypes; i < ARRAY_SIZE(fstypes); i++, info++) {
 		if (!info->probe(fs_dev_desc, &fs_partition)) {
 			fs_type = info->fstype;
 			return 0;
@@ -334,6 +385,59 @@ int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len,
 	return ret;
 }
 
+struct fs_dir_stream *fs_opendir(const char *filename)
+{
+	struct fstype_info *info = fs_get_info(fs_type);
+	struct fs_dir_stream *dirs = NULL;
+	int ret;
+
+	ret = info->opendir(filename, &dirs);
+	fs_close();
+	if (ret) {
+		errno = -ret;
+		return NULL;
+	}
+
+	dirs->desc = fs_dev_desc;
+	dirs->part = fs_dev_part;
+
+	return dirs;
+}
+
+struct fs_dirent *fs_readdir(struct fs_dir_stream *dirs)
+{
+	struct fstype_info *info;
+	struct fs_dirent *dirent;
+	int ret;
+
+	fs_set_blk_dev_with_part(dirs->desc, dirs->part);
+	info = fs_get_info(fs_type);
+
+	ret = info->readdir(dirs, &dirent);
+	fs_close();
+	if (ret) {
+		errno = -ret;
+		return NULL;
+	}
+
+	return dirent;
+}
+
+void fs_closedir(struct fs_dir_stream *dirs)
+{
+	struct fstype_info *info;
+
+	if (!dirs)
+		return;
+
+	fs_set_blk_dev_with_part(dirs->desc, dirs->part);
+	info = fs_get_info(fs_type);
+
+	info->closedir(dirs);
+	fs_close();
+}
+
+
 int do_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 		int fstype)
 {
diff --git a/include/fs.h b/include/fs.h
index 2f2aca8378..0869ad6e80 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -26,6 +26,17 @@
  */
 int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype);
 
+/*
+ * fs_set_blk_dev_with_part - Set current block device + partition
+ *
+ * Similar to fs_set_blk_dev(), but useful for cases where you already
+ * know the blk_desc and part number.
+ *
+ * Returns 0 on success.
+ * Returns non-zero if invalid partition or error accessing the disk.
+ */
+int fs_set_blk_dev_with_part(struct blk_desc *desc, int part);
+
 /*
  * Print the list of files on the partition previously set by fs_set_blk_dev(),
  * in directory "dirname".
@@ -78,6 +89,62 @@ int fs_read(const char *filename, ulong addr, loff_t offset, loff_t len,
 int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len,
 	     loff_t *actwrite);
 
+/*
+ * Directory entry types, matches the subset of DT_x in posix readdir()
+ * which apply to u-boot.
+ */
+#define FS_DT_DIR  4         /* directory */
+#define FS_DT_REG  8         /* regular file */
+#define FS_DT_LNK  10        /* symbolic link */
+
+/*
+ * A directory entry, returned by fs_readdir().  Returns information
+ * about the file/directory at the current directory entry position.
+ */
+struct fs_dirent {
+	unsigned type;       /* one of FS_DT_x (not a mask) */
+	loff_t size;         /* size in bytes */
+	char name[256];
+};
+
+/* Note: fs_dir_stream should be treated as opaque to the user of fs layer */
+struct fs_dir_stream {
+	/* private to fs. layer: */
+	struct blk_desc *desc;
+	int part;
+};
+
+/*
+ * fs_opendir - Open a directory
+ *
+ * @filename: the path to directory to open
+ * @return a pointer to the directory stream or NULL on error and errno
+ *    set appropriately
+ */
+struct fs_dir_stream *fs_opendir(const char *filename);
+
+/*
+ * fs_readdir - Read the next directory entry in the directory stream.
+ *
+ * Works in an analogous way to posix readdir().  The previously returned
+ * directory entry is no longer valid after calling fs_readdir() again.
+ * After fs_closedir() is called, the returned directory entry is no
+ * longer valid.
+ *
+ * @dirs: the directory stream
+ * @return the next directory entry (only valid until next fs_readdir() or
+ *    fs_closedir() call, do not attempt to free()) or NULL if the end of
+ *    the directory is reached.
+ */
+struct fs_dirent *fs_readdir(struct fs_dir_stream *dirs);
+
+/*
+ * fs_closedir - close a directory stream
+ *
+ * @dirs: the directory stream
+ */
+void fs_closedir(struct fs_dir_stream *dirs);
+
 /*
  * Common implementation for various filesystem commands, optionally limited
  * to a specific filesystem type via the fstype parameter.
diff --git a/include/part.h b/include/part.h
index 7bf89f911d..f8b04b08b0 100644
--- a/include/part.h
+++ b/include/part.h
@@ -99,6 +99,12 @@ int host_get_dev_err(int dev, struct blk_desc **blk_devp);
 
 /* disk/part.c */
 int part_get_info(struct blk_desc *dev_desc, int part, disk_partition_t *info);
+/**
+ * part_get_info_whole_disk() - get partition info for the special case of
+ * a partition occupying the entire disk.
+ */
+int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info);
+
 void part_print(struct blk_desc *dev_desc);
 void part_init(struct blk_desc *dev_desc);
 void dev_print(struct blk_desc *dev_desc);
@@ -204,6 +210,9 @@ static inline struct blk_desc *mg_disk_get_dev(int dev) { return NULL; }
 
 static inline int part_get_info(struct blk_desc *dev_desc, int part,
 				disk_partition_t *info) { return -1; }
+static inline int part_get_info_whole_disk(struct blk_desc *dev_desc,
+					   disk_partition_t *info)
+{ return -1; }
 static inline void part_print(struct blk_desc *dev_desc) {}
 static inline void part_init(struct blk_desc *dev_desc) {}
 static inline void dev_print(struct blk_desc *dev_desc) {}

commit 759bf728b00aed3ef743d04390586c741ddb6b3b
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:54 2017 -0400

    UPSTREAM: fat/fs: convert to directory iterators
    
    And drop a whole lot of ugly code!
    
    Change-Id: Ie4e132aae98f00738ba7cebae70209bf38cd5802
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8eafae209c35932d9a6560809c55ee4641534236)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index ee2bbe38f1..bbba7947ee 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -118,22 +118,6 @@ int fat_register_device(struct blk_desc *dev_desc, int part_no)
 	return fat_set_blk_dev(dev_desc, &info);
 }
 
-/*
- * Get the first occurence of a directory delimiter ('/' or '\') in a string.
- * Return index into string if found, -1 otherwise.
- */
-static int dirdelim(char *str)
-{
-	char *start = str;
-
-	while (*str != '\0') {
-		if (ISDIRDELIM(*str))
-			return str - start;
-		str++;
-	}
-	return -1;
-}
-
 /*
  * Extract zero terminated short name from a directory entry.
  */
@@ -468,95 +452,6 @@ static int slot2str(dir_slot *slotptr, char *l_name, int *idx)
 	return 0;
 }
 
-/*
- * Extract the full long filename starting at 'retdent' (which is really
- * a slot) into 'l_name'. If successful also copy the real directory entry
- * into 'retdent'
- * Return 0 on success, -1 otherwise.
- */
-static int
-get_vfatname(fsdata *mydata, int curclust, __u8 *cluster,
-	     dir_entry *retdent, char *l_name)
-{
-	dir_entry *realdent;
-	dir_slot *slotptr = (dir_slot *)retdent;
-	__u8 *buflimit = cluster + mydata->sect_size * ((curclust == 0) ?
-							PREFETCH_BLOCKS :
-							mydata->clust_size);
-	__u8 counter = (slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff;
-	int idx = 0;
-
-	if (counter > VFAT_MAXSEQ) {
-		debug("Error: VFAT name is too long\n");
-		return -1;
-	}
-
-	while ((__u8 *)slotptr < buflimit) {
-		if (counter == 0)
-			break;
-		if (((slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff) != counter)
-			return -1;
-		slotptr++;
-		counter--;
-	}
-
-	if ((__u8 *)slotptr >= buflimit) {
-		dir_slot *slotptr2;
-
-		if (curclust == 0)
-			return -1;
-		curclust = get_fatent(mydata, curclust);
-		if (CHECK_CLUST(curclust, mydata->fatsize)) {
-			debug("curclust: 0x%x\n", curclust);
-			printf("Invalid FAT entry\n");
-			return -1;
-		}
-
-		if (get_cluster(mydata, curclust, get_contents_vfatname_block,
-				mydata->clust_size * mydata->sect_size) != 0) {
-			debug("Error: reading directory block\n");
-			return -1;
-		}
-
-		slotptr2 = (dir_slot *)get_contents_vfatname_block;
-		while (counter > 0) {
-			if (((slotptr2->id & ~LAST_LONG_ENTRY_MASK)
-			    & 0xff) != counter)
-				return -1;
-			slotptr2++;
-			counter--;
-		}
-
-		/* Save the real directory entry */
-		realdent = (dir_entry *)slotptr2;
-		while ((__u8 *)slotptr2 > get_contents_vfatname_block) {
-			slotptr2--;
-			slot2str(slotptr2, l_name, &idx);
-		}
-	} else {
-		/* Save the real directory entry */
-		realdent = (dir_entry *)slotptr;
-	}
-
-	do {
-		slotptr--;
-		if (slot2str(slotptr, l_name, &idx))
-			break;
-	} while (!(slotptr->id & LAST_LONG_ENTRY_MASK));
-
-	l_name[idx] = '\0';
-	if (*l_name == DELETED_FLAG)
-		*l_name = '\0';
-	else if (*l_name == aRING)
-		*l_name = DELETED_FLAG;
-	downcase(l_name);
-
-	/* Return the real directory entry */
-	memcpy(retdent, realdent, sizeof(dir_entry));
-
-	return 0;
-}
-
 /* Calculate short name checksum */
 static __u8 mkcksum(const char name[8], const char ext[3])
 {
@@ -573,169 +468,13 @@ static __u8 mkcksum(const char name[8], const char ext[3])
 }
 
 /*
- * Get the directory entry associated with 'filename' from the directory
- * starting at 'startsect'
+ * TODO these should go away once fat_write is reworked to use the
+ * directory iterator
  */
 __u8 get_dentfromdir_block[MAX_CLUSTSIZE]
 	__aligned(ARCH_DMA_MINALIGN);
-
-static dir_entry *get_dentfromdir(fsdata *mydata, int startsect,
-				  char *filename, dir_entry *retdent,
-				  int dols)
-{
-	__u16 prevcksum = 0xffff;
-	__u32 curclust = START(retdent);
-	int files = 0, dirs = 0;
-
-	debug("get_dentfromdir: %s\n", filename);
-
-	while (1) {
-		dir_entry *dentptr;
-
-		int i;
-
-		if (get_cluster(mydata, curclust, get_dentfromdir_block,
-				mydata->clust_size * mydata->sect_size) != 0) {
-			debug("Error: reading directory block\n");
-			return NULL;
-		}
-
-		dentptr = (dir_entry *)get_dentfromdir_block;
-
-		for (i = 0; i < DIRENTSPERCLUST; i++) {
-			char s_name[14], l_name[VFAT_MAXLEN_BYTES];
-
-			l_name[0] = '\0';
-			if (dentptr->name[0] == DELETED_FLAG) {
-				dentptr++;
-				continue;
-			}
-			if ((dentptr->attr & ATTR_VOLUME)) {
-				if (vfat_enabled &&
-				    (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
-				    (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
-					prevcksum = ((dir_slot *)dentptr)->alias_checksum;
-					get_vfatname(mydata, curclust,
-						     get_dentfromdir_block,
-						     dentptr, l_name);
-					if (dols) {
-						int isdir;
-						char dirc;
-						int doit = 0;
-
-						isdir = (dentptr->attr & ATTR_DIR);
-
-						if (isdir) {
-							dirs++;
-							dirc = '/';
-							doit = 1;
-						} else {
-							dirc = ' ';
-							if (l_name[0] != 0) {
-								files++;
-								doit = 1;
-							}
-						}
-						if (doit) {
-							if (dirc == ' ') {
-								printf(" %8u   %s%c\n",
-								       FAT2CPU32(dentptr->size),
-									l_name,
-									dirc);
-							} else {
-								printf("            %s%c\n",
-									l_name,
-									dirc);
-							}
-						}
-						dentptr++;
-						continue;
-					}
-					debug("vfatname: |%s|\n", l_name);
-				} else {
-					/* Volume label or VFAT entry */
-					dentptr++;
-					continue;
-				}
-			}
-			if (dentptr->name[0] == 0) {
-				if (dols) {
-					printf("\n%d file(s), %d dir(s)\n\n",
-						files, dirs);
-				}
-				debug("Dentname == NULL - %d\n", i);
-				return NULL;
-			}
-			if (vfat_enabled) {
-				__u8 csum = mkcksum(dentptr->name, dentptr->ext);
-				if (dols && csum == prevcksum) {
-					prevcksum = 0xffff;
-					dentptr++;
-					continue;
-				}
-			}
-
-			get_name(dentptr, s_name);
-			if (dols) {
-				int isdir = (dentptr->attr & ATTR_DIR);
-				char dirc;
-				int doit = 0;
-
-				if (isdir) {
-					dirs++;
-					dirc = '/';
-					doit = 1;
-				} else {
-					dirc = ' ';
-					if (s_name[0] != 0) {
-						files++;
-						doit = 1;
-					}
-				}
-
-				if (doit) {
-					if (dirc == ' ') {
-						printf(" %8u   %s%c\n",
-						       FAT2CPU32(dentptr->size),
-							s_name, dirc);
-					} else {
-						printf("            %s%c\n",
-							s_name, dirc);
-					}
-				}
-
-				dentptr++;
-				continue;
-			}
-
-			if (strcmp(filename, s_name)
-			    && strcmp(filename, l_name)) {
-				debug("Mismatch: |%s|%s|\n", s_name, l_name);
-				dentptr++;
-				continue;
-			}
-
-			memcpy(retdent, dentptr, sizeof(dir_entry));
-
-			debug("DentName: %s", s_name);
-			debug(", start: 0x%x", START(dentptr));
-			debug(", size:  0x%x %s\n",
-			      FAT2CPU32(dentptr->size),
-			      (dentptr->attr & ATTR_DIR) ? "(DIR)" : "");
-
-			return retdent;
-		}
-
-		curclust = get_fatent(mydata, curclust);
-		if (CHECK_CLUST(curclust, mydata->fatsize)) {
-			debug("curclust: 0x%x\n", curclust);
-			printf("Invalid FAT entry\n");
-			return NULL;
-		}
-	}
-
-	return NULL;
-}
+__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
+	__aligned(ARCH_DMA_MINALIGN);
 
 /*
  * Read boot sector and volume info from a FAT filesystem
@@ -879,374 +618,6 @@ static int get_fs_info(fsdata *mydata)
 	return 0;
 }
 
-__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
-	__aligned(ARCH_DMA_MINALIGN);
-
-int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
-		   loff_t maxsize, int dols, int dogetsize, loff_t *size)
-{
-	char fnamecopy[2048];
-	fsdata datablock;
-	fsdata *mydata = &datablock;
-	dir_entry *dentptr = NULL;
-	__u16 prevcksum = 0xffff;
-	char *subname = "";
-	__u32 cursect;
-	int idx, isdir = 0;
-	int files = 0, dirs = 0;
-	int ret = -1;
-	int firsttime;
-	__u32 root_cluster = 0;
-	__u32 read_blk;
-	int rootdir_size = 0;
-	int buffer_blk_cnt;
-	int do_read;
-	__u8 *dir_ptr;
-
-	if (get_fs_info(mydata))
-		return -1;
-
-	cursect = mydata->rootdir_sect;
-
-	/* "cwd" is always the root... */
-	while (ISDIRDELIM(*filename))
-		filename++;
-
-	/* Make a copy of the filename and convert it to lowercase */
-	strcpy(fnamecopy, filename);
-	downcase(fnamecopy);
-
-root_reparse:
-	if (*fnamecopy == '\0') {
-		if (!dols)
-			goto exit;
-
-		dols = LS_ROOT;
-	} else if ((idx = dirdelim(fnamecopy)) >= 0) {
-		isdir = 1;
-		fnamecopy[idx] = '\0';
-		subname = fnamecopy + idx + 1;
-
-		/* Handle multiple delimiters */
-		while (ISDIRDELIM(*subname))
-			subname++;
-	} else if (dols) {
-		isdir = 1;
-	}
-
-	buffer_blk_cnt = 0;
-	firsttime = 1;
-	while (1) {
-		int i;
-
-		if (mydata->fatsize == 32 || firsttime) {
-			dir_ptr = do_fat_read_at_block;
-			firsttime = 0;
-		} else {
-			/**
-			 * FAT16 sector buffer modification:
-			 * Each loop, the second buffered block is moved to
-			 * the buffer begin, and two next sectors are read
-			 * next to the previously moved one. So the sector
-			 * buffer keeps always 3 sectors for fat16.
-			 * And the current sector is the buffer second sector
-			 * beside the "firsttime" read, when it is the first one.
-			 *
-			 * PREFETCH_BLOCKS is 2 for FAT16 == loop[0:1]
-			 * n = computed root dir sector
-			 * loop |  cursect-1  | cursect    | cursect+1  |
-			 *   0  |  sector n+0 | sector n+1 | none       |
-			 *   1  |  none       | sector n+0 | sector n+1 |
-			 *   0  |  sector n+1 | sector n+2 | sector n+3 |
-			 *   1  |  sector n+3 | ...
-			*/
-			dir_ptr = (do_fat_read_at_block + mydata->sect_size);
-			memcpy(do_fat_read_at_block, dir_ptr, mydata->sect_size);
-		}
-
-		do_read = 1;
-
-		if (mydata->fatsize == 32 && buffer_blk_cnt)
-			do_read = 0;
-
-		if (do_read) {
-			read_blk = (mydata->fatsize == 32) ?
-				    mydata->clust_size : PREFETCH_BLOCKS;
-
-			debug("FAT read(sect=%d, cnt:%d), clust_size=%d, DIRENTSPERBLOCK=%zd\n",
-				cursect, read_blk, mydata->clust_size, DIRENTSPERBLOCK);
-
-			if (disk_read(cursect, read_blk, dir_ptr) < 0) {
-				debug("Error: reading rootdir block\n");
-				goto exit;
-			}
-
-			dentptr = (dir_entry *)dir_ptr;
-		}
-
-		for (i = 0; i < DIRENTSPERBLOCK; i++) {
-			char s_name[14], l_name[VFAT_MAXLEN_BYTES];
-			__u8 csum;
-
-			l_name[0] = '\0';
-			if (dentptr->name[0] == DELETED_FLAG) {
-				dentptr++;
-				continue;
-			}
-
-			if (vfat_enabled)
-				csum = mkcksum(dentptr->name, dentptr->ext);
-
-			if (dentptr->attr & ATTR_VOLUME) {
-				if (vfat_enabled &&
-				    (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
-				    (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
-					prevcksum =
-						((dir_slot *)dentptr)->alias_checksum;
-
-					get_vfatname(mydata,
-						     root_cluster,
-						     dir_ptr,
-						     dentptr, l_name);
-
-					if (dols == LS_ROOT) {
-						char dirc;
-						int doit = 0;
-						int isdir =
-							(dentptr->attr & ATTR_DIR);
-
-						if (isdir) {
-							dirs++;
-							dirc = '/';
-							doit = 1;
-						} else {
-							dirc = ' ';
-							if (l_name[0] != 0) {
-								files++;
-								doit = 1;
-							}
-						}
-						if (doit) {
-							if (dirc == ' ') {
-								printf(" %8u   %s%c\n",
-								       FAT2CPU32(dentptr->size),
-									l_name,
-									dirc);
-							} else {
-								printf("            %s%c\n",
-									l_name,
-									dirc);
-							}
-						}
-						dentptr++;
-						continue;
-					}
-					debug("Rootvfatname: |%s|\n",
-					       l_name);
-				} else {
-					/* Volume label or VFAT entry */
-					dentptr++;
-					continue;
-				}
-			} else if (dentptr->name[0] == 0) {
-				debug("RootDentname == NULL - %d\n", i);
-				if (dols == LS_ROOT) {
-					printf("\n%d file(s), %d dir(s)\n\n",
-						files, dirs);
-					ret = 0;
-				}
-				goto exit;
-			}
-			else if (vfat_enabled &&
-				 dols == LS_ROOT && csum == prevcksum) {
-				prevcksum = 0xffff;
-				dentptr++;
-				continue;
-			}
-
-			get_name(dentptr, s_name);
-
-			if (dols == LS_ROOT) {
-				int isdir = (dentptr->attr & ATTR_DIR);
-				char dirc;
-				int doit = 0;
-
-				if (isdir) {
-					dirc = '/';
-					if (s_name[0] != 0) {
-						dirs++;
-						doit = 1;
-					}
-				} else {
-					dirc = ' ';
-					if (s_name[0] != 0) {
-						files++;
-						doit = 1;
-					}
-				}
-				if (doit) {
-					if (dirc == ' ') {
-						printf(" %8u   %s%c\n",
-						       FAT2CPU32(dentptr->size),
-							s_name, dirc);
-					} else {
-						printf("            %s%c\n",
-							s_name, dirc);
-					}
-				}
-				dentptr++;
-				continue;
-			}
-
-			if (strcmp(fnamecopy, s_name)
-			    && strcmp(fnamecopy, l_name)) {
-				debug("RootMismatch: |%s|%s|\n", s_name,
-				       l_name);
-				dentptr++;
-				continue;
-			}
-
-			if (isdir && !(dentptr->attr & ATTR_DIR))
-				goto exit;
-
-			debug("RootName: %s", s_name);
-			debug(", start: 0x%x", START(dentptr));
-			debug(", size:  0x%x %s\n",
-			       FAT2CPU32(dentptr->size),
-			       isdir ? "(DIR)" : "");
-
-			goto rootdir_done;	/* We got a match */
-		}
-		debug("END LOOP: buffer_blk_cnt=%d   clust_size=%d\n", buffer_blk_cnt,
-		       mydata->clust_size);
-
-		/*
-		 * On FAT32 we must fetch the FAT entries for the next
-		 * root directory clusters when a cluster has been
-		 * completely processed.
-		 */
-		++buffer_blk_cnt;
-		int rootdir_end = 0;
-		if (mydata->fatsize == 32) {
-			if (buffer_blk_cnt == mydata->clust_size) {
-				int nxtsect = 0;
-				int nxt_clust = 0;
-
-				nxt_clust = get_fatent(mydata, root_cluster);
-				rootdir_end = CHECK_CLUST(nxt_clust, 32);
-
-				nxtsect = mydata->data_begin +
-					(nxt_clust * mydata->clust_size);
-
-				root_cluster = nxt_clust;
-
-				cursect = nxtsect;
-				buffer_blk_cnt = 0;
-			}
-		} else {
-			if (buffer_blk_cnt == PREFETCH_BLOCKS)
-				buffer_blk_cnt = 0;
-
-			rootdir_end = (++cursect - mydata->rootdir_sect >=
-				       rootdir_size);
-		}
-
-		/* If end of rootdir reached */
-		if (rootdir_end) {
-			if (dols == LS_ROOT) {
-				printf("\n%d file(s), %d dir(s)\n\n",
-				       files, dirs);
-				*size = 0;
-			}
-			goto exit;
-		}
-	}
-rootdir_done:
-
-	firsttime = 1;
-
-	while (isdir) {
-		int startsect = mydata->data_begin
-			+ START(dentptr) * mydata->clust_size;
-		dir_entry dent;
-		char *nextname = NULL;
-
-		dent = *dentptr;
-		dentptr = &dent;
-
-		idx = dirdelim(subname);
-
-		if (idx >= 0) {
-			subname[idx] = '\0';
-			nextname = subname + idx + 1;
-			/* Handle multiple delimiters */
-			while (ISDIRDELIM(*nextname))
-				nextname++;
-			if (dols && *nextname == '\0')
-				firsttime = 0;
-		} else {
-			if (dols && firsttime) {
-				firsttime = 0;
-			} else {
-				isdir = 0;
-			}
-		}
-
-		if (get_dentfromdir(mydata, startsect, subname, dentptr,
-				     isdir ? 0 : dols) == NULL) {
-			if (dols && !isdir)
-				*size = 0;
-			goto exit;
-		}
-
-		if (isdir && !(dentptr->attr & ATTR_DIR))
-			goto exit;
-
-		/*
-		 * If we are looking for a directory, and found a directory
-		 * type entry, and the entry is for the root directory (as
-		 * denoted by a cluster number of 0), jump back to the start
-		 * of the function, since at least on FAT12/16, the root dir
-		 * lives in a hard-coded location and needs special handling
-		 * to parse, rather than simply following the cluster linked
-		 * list in the FAT, like other directories.
-		 */
-		if (isdir && (dentptr->attr & ATTR_DIR) && !START(dentptr)) {
-			/*
-			 * Modify the filename to remove the prefix that gets
-			 * back to the root directory, so the initial root dir
-			 * parsing code can continue from where we are without
-			 * confusion.
-			 */
-			strcpy(fnamecopy, nextname ?: "");
-			/*
-			 * Set up state the same way as the function does when
-			 * first started. This is required for the root dir
-			 * parsing code operates in its expected environment.
-			 */
-			subname = "";
-			cursect = mydata->rootdir_sect;
-			isdir = 0;
-			goto root_reparse;
-		}
-
-		if (idx >= 0)
-			subname = nextname;
-	}
-
-	if (dogetsize) {
-		*size = FAT2CPU32(dentptr->size);
-		ret = 0;
-	} else {
-		ret = get_contents(mydata, dentptr, pos, buffer, maxsize, size);
-	}
-	debug("Size: %u, got: %llu\n", FAT2CPU32(dentptr->size), *size);
-
-exit:
-	free(mydata->fatbuf);
-	return ret;
-}
-
 
 /*
  * Directory iterator, to simplify filesystem traversal
@@ -1595,12 +966,6 @@ static int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
 	return -ENOENT;
 }
 
-int do_fat_read(const char *filename, void *buffer, loff_t maxsize, int dols,
-		loff_t *actread)
-{
-	return do_fat_read_at(filename, 0, buffer, maxsize, dols, 0, actread);
-}
-
 int file_fat_detectfs(void)
 {
 	boot_sector bs;
@@ -1665,31 +1030,96 @@ int file_fat_detectfs(void)
 
 int file_fat_ls(const char *dir)
 {
-	loff_t size;
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
+	int files = 0, dirs = 0;
+	int ret;
+
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return ret;
+
+	ret = fat_itr_resolve(itr, dir, TYPE_DIR);
+	if (ret)
+		return ret;
+
+	while (fat_itr_next(itr)) {
+		if (fat_itr_isdir(itr)) {
+			printf("            %s/\n", itr->name);
+			dirs++;
+		} else {
+			printf(" %8u   %s\n",
+			       FAT2CPU32(itr->dent->size),
+			       itr->name);
+			files++;
+		}
+	}
 
-	return do_fat_read(dir, NULL, 0, LS_YES, &size);
+	printf("\n%d file(s), %d dir(s)\n\n", files, dirs);
+
+	return 0;
 }
 
 int fat_exists(const char *filename)
 {
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
 	int ret;
-	loff_t size;
 
-	ret = do_fat_read_at(filename, 0, NULL, 0, LS_NO, 1, &size);
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return 0;
+
+	ret = fat_itr_resolve(itr, filename, TYPE_ANY);
 	return ret == 0;
 }
 
 int fat_size(const char *filename, loff_t *size)
 {
-	return do_fat_read_at(filename, 0, NULL, 0, LS_NO, 1, size);
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
+	int ret;
+
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return ret;
+
+	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
+	if (ret) {
+		/*
+		 * Directories don't have size, but fs_size() is not
+		 * expected to fail if passed a directory path:
+		 */
+		fat_itr_root(itr, &fsdata);
+		if (!fat_itr_resolve(itr, filename, TYPE_DIR)) {
+			*size = 0;
+			return 0;
+		}
+		return ret;
+	}
+
+	*size = FAT2CPU32(itr->dent->size);
+
+	return 0;
 }
 
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		     loff_t maxsize, loff_t *actread)
 {
+	fsdata fsdata;
+	fat_itr itrblock, *itr = &itrblock;
+	int ret;
+
+	ret = fat_itr_root(itr, &fsdata);
+	if (ret)
+		return ret;
+
+	ret = fat_itr_resolve(itr, filename, TYPE_FILE);
+	if (ret)
+		return ret;
+
 	printf("reading %s\n", filename);
-	return do_fat_read_at(filename, pos, buffer, maxsize, LS_NO, 0,
-			      actread);
+	return get_contents(&fsdata, itr->dent, pos, buffer, maxsize, actread);
 }
 
 int file_fat_read(const char *filename, void *buffer, int maxsize)
diff --git a/include/fat.h b/include/fat.h
index 21bb6666cf..18d8981c48 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -58,12 +58,6 @@
  */
 #define LAST_LONG_ENTRY_MASK	0x40
 
-/* Flags telling whether we should read a file or list a directory */
-#define LS_NO		0
-#define LS_YES		1
-#define LS_DIR		1
-#define LS_ROOT		2
-
 #define ISDIRDELIM(c)	((c) == '/' || (c) == '\\')
 
 #define FSTYPE_NONE	(-1)

commit e9aba365698e2b7aa9ae9c3bf7a6b271ef83feb1
Author: Peter Jones <pjones@redhat.com>
Date:   Wed Sep 13 18:05:25 2017 -0400

    UPSTREAM: part: extract MBR signature from partitions
    
    EFI client programs need the signature information from the partition
    table to determine the disk a partition is on, so we need to fill that
    in here.
    
    Change-Id: I27b62e383a2003e82e5424859bc9574d3b2190a2
    Signed-off-by: Peter Jones <pjones@redhat.com>
    [separated from efi_loader part, and fixed build-errors for non-
     CONFIG_EFI_PARTITION case]
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ff98cb90514d9b787ddc097c203ac8db2941efe1)

diff --git a/disk/part_dos.c b/disk/part_dos.c
index 7ede15ec26..850a538e83 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -89,14 +89,20 @@ static int test_block_type(unsigned char *buffer)
 
 static int part_test_dos(struct blk_desc *dev_desc)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
+	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
 
-	if (blk_dread(dev_desc, 0, 1, (ulong *)buffer) != 1)
+	if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1)
 		return -1;
 
-	if (test_block_type(buffer) != DOS_MBR)
+	if (test_block_type((unsigned char *)mbr) != DOS_MBR)
 		return -1;
 
+	if (dev_desc->sig_type == SIG_TYPE_NONE &&
+	    mbr->unique_mbr_signature != 0) {
+		dev_desc->sig_type = SIG_TYPE_MBR;
+		dev_desc->mbr_sig = mbr->unique_mbr_signature;
+	}
+
 	return 0;
 }
 
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b43b8b3d19..58bb3d5627 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -931,11 +931,19 @@ static int is_pmbr_valid(legacy_mbr * mbr)
 static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 			gpt_header *pgpt_head, gpt_entry **pgpt_pte)
 {
+	ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, mbr, dev_desc->blksz);
+
 	if (!dev_desc || !pgpt_head) {
 		printf("%s: Invalid Argument(s)\n", __func__);
 		return 0;
 	}
 
+	/* Read MBR Header from device */
+	if (blk_dread(dev_desc, 0, 1, (ulong *)mbr) != 1) {
+		printf("*** ERROR: Can't read MBR header ***\n");
+		return 0;
+	}
+
 	/* Read GPT Header from device */
 	if (blk_dread(dev_desc, (lbaint_t)lba, 1, pgpt_head) != 1) {
 		printf("*** ERROR: Can't read GPT header ***\n");
@@ -945,6 +953,18 @@ static int is_gpt_valid(struct blk_desc *dev_desc, u64 lba,
 	if (validate_gpt_header(pgpt_head, (lbaint_t)lba, dev_desc->lba))
 		return 0;
 
+	if (dev_desc->sig_type == SIG_TYPE_NONE) {
+		efi_guid_t empty = {};
+		if (memcmp(&pgpt_head->disk_guid, &empty, sizeof(empty))) {
+			dev_desc->sig_type = SIG_TYPE_GUID;
+			memcpy(&dev_desc->guid_sig, &pgpt_head->disk_guid,
+			      sizeof(empty));
+		} else if (mbr->unique_mbr_signature != 0) {
+			dev_desc->sig_type = SIG_TYPE_MBR;
+			dev_desc->mbr_sig = mbr->unique_mbr_signature;
+		}
+	}
+
 	/* Read and allocate Partition Table Entries */
 	*pgpt_pte = alloc_read_gpt_entries(dev_desc, pgpt_head);
 	if (*pgpt_pte == NULL) {
diff --git a/include/blk.h b/include/blk.h
index 9cf5466662..d8e3825454 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -8,6 +8,8 @@
 #ifndef BLK_H
 #define BLK_H
 
+#include <efi.h>
+
 #ifdef CONFIG_SYS_64BIT_LBA
 typedef uint64_t lbaint_t;
 #define LBAFlength "ll"
@@ -43,6 +45,17 @@ enum if_type {
 #define BLK_PRD_SIZE		20
 #define BLK_REV_SIZE		8
 
+/*
+ * Identifies the partition table type (ie. MBR vs GPT GUID) signature
+ */
+enum sig_type {
+	SIG_TYPE_NONE,
+	SIG_TYPE_MBR,
+	SIG_TYPE_GUID,
+
+	SIG_TYPE_COUNT			/* Number of signature types */
+};
+
 /*
  * With driver model (CONFIG_BLK) this is uclass platform data, accessible
  * with dev_get_uclass_platdata(dev)
@@ -70,6 +83,11 @@ struct blk_desc {
 	char		vendor[BLK_VEN_SIZE + 1]; /* device vendor string */
 	char		product[BLK_PRD_SIZE + 1]; /* device product number */
 	char		revision[BLK_REV_SIZE + 1]; /* firmware revision */
+	enum sig_type	sig_type;	/* Partition table signature type */
+	union {
+		uint32_t mbr_sig;	/* MBR integer signature */
+		efi_guid_t guid_sig;	/* GPT GUID Signature */
+	};
 #if CONFIG_IS_ENABLED(BLK)
 	/*
 	 * For now we have a few functions which take struct blk_desc as a

commit e561b4d443b1e283902f22916d3790fb988a0517
Author: Rob Clark <robdclark@gmail.com>
Date:   Wed Sep 13 18:05:24 2017 -0400

    UPSTREAM: part: move efi_guid_t
    
    Prep work for next patch.
    
    Change-Id: Ic5e74b6843749af6cbd2de6141606019c34f716b
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0d6ab32e3712fe7bc2e3aaf3d93e0d5910264df3)

diff --git a/include/efi.h b/include/efi.h
index 02b78b31b1..87b0b43f20 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -28,6 +28,10 @@
 
 struct efi_device_path;
 
+typedef struct {
+	u8 b[16];
+} efi_guid_t;
+
 #define EFI_BITS_PER_LONG	BITS_PER_LONG
 
 /*
diff --git a/include/part.h b/include/part.h
index 5739a2d37b..7bf89f911d 100644
--- a/include/part.h
+++ b/include/part.h
@@ -272,8 +272,9 @@ struct part_driver {
 #define U_BOOT_PART_TYPE(__name)					\
 	ll_entry_declare(struct part_driver, __name, part_driver)
 
-#if CONFIG_IS_ENABLED(EFI_PARTITION)
 #include <part_efi.h>
+
+#if CONFIG_IS_ENABLED(EFI_PARTITION)
 /* disk/part_efi.c */
 /**
  * write_gpt_table() - Write the GUID Partition Table to disk
diff --git a/include/part_efi.h b/include/part_efi.h
index 317c044795..31e6bc6e14 100644
--- a/include/part_efi.h
+++ b/include/part_efi.h
@@ -58,10 +58,6 @@
 /* linux/include/efi.h */
 typedef u16 efi_char16_t;
 
-typedef struct {
-	u8 b[16];
-} efi_guid_t;
-
 /* based on linux/include/genhd.h */
 struct partition {
 	u8 boot_ind;		/* 0x80 - active */

commit 10eca96895ada8ca2d38437746a3875270eb66a0
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Mon Aug 28 18:54:30 2017 +0200

    UPSTREAM: efi_loader: bootefi hello should use loadaddr
    
    Command 'bootefi hello' currently uses CONFIG_SYS_LOAD_ADDR
    as loading address.
    
    qemu machines have by default 128 MiB RAM.
    CONFIG_SYS_LOAD_ADDR for x86 is 0x20000000 (512 MiB).
    This causes 'bootefi hello' to fail.
    
    We should use the environment variable loadaddr if available.
    It defaults to 0x1000000 (16 MiB) on qemu_x86.
    
    Change-Id: Iff6bfbd6c93f115f7f616c42b6e1c2dc4d61e156
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Alexander Graf <agraf@suse.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 51c533fdce75fbdec7de28a05a675a553d209bcb)

diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 3196d86040..c65c619d63 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -299,7 +299,11 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (!strcmp(argv[1], "hello")) {
 		ulong size = __efi_hello_world_end - __efi_hello_world_begin;
 
-		addr = CONFIG_SYS_LOAD_ADDR;
+		saddr = env_get("loadaddr");
+		if (saddr)
+			addr = simple_strtoul(saddr, NULL, 16);
+		else
+			addr = CONFIG_SYS_LOAD_ADDR;
 		memcpy((char *)addr, __efi_hello_world_begin, size);
 	} else
 #endif

commit 67f537f2b376763e717f6a2d4cb38c0b59a5f624
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Fri Sep 15 14:46:04 2017 +0200

    UPSTREAM: rockchip: puma_rk3399: increase serialno_str size
    
    Increase serialno_str to 17 bytes so it can hold the 16 bytes long serial
    nummer and the terminating null byte added by snprintf.
    
    Change-Id: Ie419f2d41ec8af598601d8726416cbaec1767266
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 60d7c50945d65185a5c86c4f52d4671fb59292e3)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index c6f8eed0c9..45d56cd99e 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -107,7 +107,7 @@ static void setup_serial(void)
 	u8 low[cpuid_length/2], high[cpuid_length/2];
 	char cpuid_str[cpuid_length * 2 + 1];
 	u64 serialno;
-	char serialno_str[16];
+	char serialno_str[17];
 
 	/* retrieve the device */
 	ret = uclass_get_device_by_driver(UCLASS_MISC,

commit 9ec27623299bbe7b06c2fc0b1b4ae79116982a90
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Aug 14 19:05:33 2017 +0200

    UPSTREAM: rockchip: dts: rk3368: reduce the number of nodes seen in TPL
    
    The RK3368 TPL stage always returns to the BootROM, so it has no need
    for the eMMC, SD and SPI nodes.  This marks those nodes (that should
    be included in SPL, but not TPL) as 'u-boot,dm-spl'.
    
    Change-Id: I0c3d65554f01de403dd48e446991d2a545cd74fb
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 75ff0578515665a1b712275deb73be29e5ad8773)

diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi
index 1ec7d254af..a9b7f81c62 100644
--- a/arch/arm/dts/rk3368-lion-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi
@@ -71,18 +71,18 @@
 };
 
 &emmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &sdmmc {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 };
 
 &spi1 {
-	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
 
 	spiflash: w25q32dw@0 {
-		u-boot,dm-pre-reloc;
+		u-boot,dm-spl;
 	};
 };
 

commit 532a7914a44e56507d84fe20dcb0675a3f20c17e
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Aug 14 19:05:32 2017 +0200

    UPSTREAM: rockchip: rk3368: adjust DMC driver for 32/64bit-aware OF_PLATDATA
    
    With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
    OF_PLATDATA structure layout changes.  This adjusts the DMC driver for
    the RK3368 to track these changes.
    
    For the time being (i.e. until regmap_init_mem_platdata works for the
    64bit case), we won't use regmap_init_mem_platdata here and simply
    access of_plat.reg[] directly.
    
    Change-Id: I9e4e5b7cb650220902914f6ad724a8a312be93ba
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1d70f0ac88dcd0ed9c17ec4c5e97db69de961319)

diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index ca7b1ff0c8..7577ff0363 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -893,18 +893,11 @@ static int conv_of_platdata(struct udevice *dev)
 {
 	struct rk3368_sdram_params *plat = dev_get_platdata(dev);
 	struct dtd_rockchip_rk3368_dmc *of_plat = &plat->of_plat;
-	int ret;
 
 	plat->ddr_freq = of_plat->rockchip_ddr_frequency;
 	plat->ddr_speed_bin = of_plat->rockchip_ddr_speed_bin;
 	plat->memory_schedule = of_plat->rockchip_memory_schedule;
 
-	ret = regmap_init_mem_platdata(dev, of_plat->reg,
-				       ARRAY_SIZE(of_plat->reg) / 2,
-				       &plat->map);
-	if (ret)
-		return ret;
-
 	return 0;
 }
 #endif
@@ -933,8 +926,8 @@ static int rk3368_dmc_probe(struct udevice *dev)
 	debug("%s: pmugrf=%p\n", __func__, priv->pmugrf);
 
 #ifdef CONFIG_TPL_BUILD
-	pctl = regmap_get_range(plat->map, 0);
-	ddrphy = regmap_get_range(plat->map, 1);
+	pctl = (struct rk3368_ddr_pctl *)plat->of_plat.reg[0];
+	ddrphy = (struct rk3368_ddrphy *)plat->of_plat.reg[2];
 	msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 

commit 6c71f0465f53a879cd2389c4099a69129555e5fe
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Aug 14 19:05:31 2017 +0200

    UPSTREAM: rockchip: timer: update for 32/64bit-aware OF_PLATDATA
    
    With dtoc emitting fdt64_t for addresses (and region sizes), the array
    indices for accessing the reg[] array needs to be adjusted.  This
    adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
    given this new structure layout.
    
    Change-Id: If5a5fec05c00a0d4c71e1b7550c399880d50908d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8158a848fa4d506d46a5193daf13367f3839022a)

diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index 460eb82f6c..07d14482d6 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -140,7 +140,7 @@ static int rockchip_timer_probe(struct udevice *dev)
 	struct rockchip_timer_priv *priv = dev_get_priv(dev);
 	struct rockchip_timer_plat *plat = dev_get_platdata(dev);
 
-	priv->timer = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->timer = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 	uc_priv->clock_rate = plat->dtd.clock_frequency;
 #endif
 

commit 6094f89565252ace829ea7f0cd5ac486a9da5fbd
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:29 2017 +0200

    UPSTREAM: rockchip: defconfig: puma-rk3399: enable OF_LIVE (live tree)
    
    With the critical drivers ready for switching to a live tree, we can
    now enable it in the defconfig for the RK3399-Q7.
    
    Change-Id: I6bc9f0cc8de2f8b40f7dfdb8b69271412914333d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7b87e3bfaf1ef1109da0f749040426c9e665c361)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 1badf80beb..2ab2516c01 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_REGMAP=y

commit 63a453e638962c6147bbb5925ba3f1e474b4ad65
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:26 2017 +0200

    UPSTREAM: rockchip: efuse: change to use dev_read_addr_ptr
    
    With the dev_read_addr_ptr function available, we can change the
    efuse driver to use it (and eliminate the explicit type-cast).
    
    Change-Id: I8183492892b77c8c6260070cee3104060e273c31
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f6230a00579d5ca5ba01ca158f5c369cf64e87eb)

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index b4ad19cfe8..f2fb736275 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -202,7 +202,7 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
 
-	plat->base = (void *)dev_read_addr(dev);
+	plat->base = dev_read_addr_ptr(dev);
 	return 0;
 }
 

commit db4c0dc88d3c15ca24b1fb48e2b59c32e01a536d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:32:24 2017 +0200

    UPSTREAM: rockchip: clk: rk3399: Convert to livetree
    
    Update the clock driver for the RK3399  to support a live device tree.
    
    Change-Id: I2cc96fe00c9a1b2937f53da9b11fa56bd9e058bf
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 75c7859803a334a41c8bdf0a31cd1cd61f579076)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 954bd2ce8c..dc25c24520 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1025,7 +1025,7 @@ static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3399_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 	return 0;
 }
@@ -1233,7 +1233,7 @@ static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_pmuclk_priv *priv = dev_get_priv(dev);
 
-	priv->pmucru = (struct rk3399_pmucru *)devfdt_get_addr(dev);
+	priv->pmucru = dev_read_addr_ptr(dev);
 #endif
 	return 0;
 }

commit 8edf7c5aaf037ce6f80fbf363c82fecd0b542760
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:30:57 2017 +0200

    UPSTREAM: rockchip: dts: rk3399-puma: replace 'rockchip, vbus-gpio' with fixed regulator
    
    On the RK3399-Q7, we need to turn on the on-module USB hub before using the
    USB host interfaces (only the OTG interface is directly connected to the edge
    connector).  This drops the deprecated 'rockchip,vbus-gpio' property and uses
    a fixed regulator to turn on the USB hub.
    
    References: 26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control vbus"
    Change-Id: Idd2f6b48976e5ac25f06e40d6cc0cccc0e10c94b
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 46c89c8efa3e56ad8919b3a36663bb12582ed4d0)

diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index dd1baea704..a04878e223 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -89,6 +89,17 @@
 		};
 	};
 
+	usbhub_enable: usbhub_enable {
+		compatible = "regulator-fixed";
+		regulator-name = "usbhub_enable";
+		enable-active-low;
+		gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
 	vccadc_ref: vccadc-ref {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc1v8_sys";
@@ -514,7 +525,6 @@
 };
 
 &dwc3_typec1 {
-	rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
 	status = "okay";
 };
 

commit cce8d7cd220b222744174be28b99868181a2bb8d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Sep 12 17:30:56 2017 +0200

    UPSTREAM: rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1
    
    The generic ehci-driver (ehci-generic.c) will try to enable the clocks
    listed in the DTSI. If this fails (e.g. due to clk_enable not being
    implemented in a driver and -ENOSYS being returned by the clk-uclass),
    the driver will bail our and print an error message.
    
    This implements a minimal clk_enable for the RK3399 and supports the
    clocks mandatory for the EHCI controllers; as these are enabled by
    default we simply return success.
    
    Change-Id: Ic38cdb4e599c1fd8534b5e998b970b4610ab7383
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2f01a2b2149c4c38467eeeddde09ac48d379aed3)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 95976ac4ae..954bd2ce8c 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -906,9 +906,24 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	return ret;
 }
 
+static int rk3399_clk_enable(struct clk *clk)
+{
+	switch (clk->id) {
+	case HCLK_HOST0:
+	case HCLK_HOST0_ARB:
+	case HCLK_HOST1:
+	case HCLK_HOST1_ARB:
+		return 0;
+	}
+
+	debug("%s: unsupported clk %ld\n", __func__, clk->id);
+	return -ENOENT;
+}
+
 static struct clk_ops rk3399_clk_ops = {
 	.get_rate = rk3399_clk_get_rate,
 	.set_rate = rk3399_clk_set_rate,
+	.enable = rk3399_clk_enable,
 };
 
 #ifdef CONFIG_SPL_BUILD

commit 1dc5824468703ab2d4ea8d3b4b251039b8c838ee
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 4 20:32:58 2017 +0800

    UPSTREAM: rockchip: rk3368: add the missing target and pinctrl config for sheep board
    
    Add the missing target and pinctrl config for rk3368 sheep board
    
    Change-Id: Icf677ec8bd0ecc29797b2662ca0ad4369891a0fa
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8ac884974a46ae2f206b4053ea32814303912b08)

diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
index b862a14751..a7991afae2 100644
--- a/configs/sheep-rk3368_defconfig
+++ b/configs/sheep-rk3368_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
 CONFIG_ROCKCHIP_RK3368=y
+CONFIG_TARGET_SHEEP=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
 CONFIG_DEBUG_UART=y
 CONFIG_ANDROID_BOOT_IMAGE=y
@@ -14,6 +15,7 @@ CONFIG_CLK=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0xFF1b0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit f6f2870aa8be25e1f665e534c90c724a3d35d0dc
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 4 20:32:23 2017 +0800

    UPSTREAM: rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings
    
    Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS
    
    Change-Id: I4ccc38abe53379d429b2060e5b60d62fe4fef9e4
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ffaefb885ee113d12c3ff78109beb43ba1884945)

diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 734dd63636..20abb01cf8 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -60,6 +60,7 @@
 #include <config_distro_bootcmd.h>
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS	\
 	BOOTENV
 
 #endif

commit c19af67fed9f86a4776f6ff35b44b170bd872e77
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Tue Sep 12 17:15:47 2017 +0530

    UPSTREAM: rk3288: Add Vyasa initial board support
    
    This patch adds support for Vyasa RK3288 initial board
    from Amarula Solutions.
    
    Change-Id: I50cc01993c16caa97a6b0f9019a5433bd30adc80
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d55af074e5a8dc85fc78f468d1f8bc96ae8b6855)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0032a21377..9ea73115db 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-jerry.dtb \
 	rk3288-veyron-mickey.dtb \
 	rk3288-veyron-minnie.dtb \
+	rk3288-vyasa.dtb \
 	rk3328-evb.dtb \
 	rk3368-lion.dtb \
 	rk3368-sheep.dtb \
diff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts
new file mode 100644
index 0000000000..93a9c5ee09
--- /dev/null
+++ b/arch/arm/dts/rk3288-vyasa.dts
@@ -0,0 +1,327 @@
+/*
+ * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3288.dtsi"
+
+/ {
+	model = "Amarula Vyasa-RK3288";
+	compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x80000000>;
+	};
+
+	vcc_sd: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_pwr>;
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_sys: vsys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+};
+
+&dmc {
+	rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+		0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+		0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+		0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+		0x5 0x0>;
+	rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+		0xa60 0x40 0x10 0x0>;
+	/* Add a dummy value to cause of-platdata think this is bytes */
+	rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+};
+
+&cpu0 {
+	cpu0-supply = <&vdd_cpu>;
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int &global_pwroff>;
+		wakeup-source;
+		rockchip,system-power-controller;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc6-supply = <&vcc_sys>;
+		vcc7-supply = <&vcc_sys>;
+		vcc8-supply = <&vcc_io>;
+		vcc9-supply = <&vcc_sys>;
+		vcc10-supply = <&vcc_sys>;
+		vcc11-supply = <&vcc_sys>;
+		vcc12-supply = <&vcc_io>;
+
+		regulators {
+			vdd_cpu: vdd_log: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-name = "vdd_log";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_gpu: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <1250000>;
+				regulator-name = "vdd_gpu";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc_ddr";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_io";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcca_tp: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_tp";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_codec: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_codec";
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_10: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vdd_10";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_gps: LDO_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_gps";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vccio_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc10_lcd: LDO_REG6 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vcc10_lcd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_18: LDO_REG7 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_18";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc18_lcd: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc18_lcd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc33_sd: SWITCH_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc33_sd";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_lan: SWITCH_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_lan";
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+		};
+	};
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+	vmmc-supply = <&vcc_sd>;
+	vqmmc-supply = <&vccio_sd>;
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+	pmic {
+		pmic_int: pmic-int {
+			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 1fecdd4add..8a51aca86f 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -95,6 +95,15 @@ config TARGET_POPMETAL_RK3288
 	  2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
 	  GPIOs and display interface.
 
+config TARGET_VYASA_RK3288
+	bool "Vyasa-RK3288"
+	select BOARD_LATE_INIT
+	help
+	  Vyasa is a RK3288-based development board with 2 USB ports,
+	  HDMI, VGA, micro-SD card, audio, WiFi  and Gigabit Ethernet, It
+	  also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
+	  provide access to display pins, I2C, SPI, UART and GPIOs.
+
 config TARGET_ROCK2
 	bool "Radxa Rock 2"
 	select BOARD_LATE_INIT
@@ -148,6 +157,8 @@ config ROCKCHIP_SPL
 	  open source u-boot-spl binary, which can autodetect DDR deivce type and
 	  initialize.
 
+source "board/amarula/vyasa-rk3288/Kconfig"
+
 source "board/chipspark/popmetal_rk3288/Kconfig"
 
 source "board/firefly/firefly-rk3288/Kconfig"
diff --git a/board/amarula/vyasa-rk3288/Kconfig b/board/amarula/vyasa-rk3288/Kconfig
new file mode 100644
index 0000000000..8b8c30835e
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_VYASA_RK3288
+
+config SYS_BOARD
+	default "vyasa-rk3288"
+
+config SYS_VENDOR
+	default "amarula"
+
+config SYS_CONFIG_NAME
+	default "vyasa-rk3288"
+
+endif
diff --git a/board/amarula/vyasa-rk3288/MAINTAINERS b/board/amarula/vyasa-rk3288/MAINTAINERS
new file mode 100644
index 0000000000..10397fcb4b
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/MAINTAINERS
@@ -0,0 +1,6 @@
+VYASA RK3288
+M:	Jagan Teki <jagan@amarulasolutions.com>
+S:	Maintained
+F:	board/amarula/vyasa-rk3288
+F:	include/configs/vyasa-rk3288.h
+F:	configs/vyasa-rk3288_defconfig
diff --git a/board/amarula/vyasa-rk3288/Makefile b/board/amarula/vyasa-rk3288/Makefile
new file mode 100644
index 0000000000..7c0d5c0316
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2017 Amarula Solutions
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= vyasa-rk3288.o
diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
new file mode 100644
index 0000000000..ceee42c16e
--- /dev/null
+++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Amarula Solutions
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
new file mode 100644
index 0000000000..7db7b0b6f9
--- /dev/null
+++ b/configs/vyasa-rk3288_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_VYASA_RK3288=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"
+CONFIG_DEBUG_UART=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SILENT_CONSOLE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_CONSOLE_SCROLL_LINES=10
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h
new file mode 100644
index 0000000000..9d6c80f549
--- /dev/null
+++ b/include/configs/vyasa-rk3288.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2017 Amarula Solutions
+ *
+ * Configuration settings for Amarula Vyasa RK3288.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define ROCKCHIP_DEVICE_SETTINGS
+#include <configs/rk3288_common.h>
+
+#undef BOOT_TARGET_DEVICES
+
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 1) \
+
+#define CONFIG_SYS_MMC_ENV_DEV 1
+#undef CONFIG_CMD_USB_MASS_STORAGE
+
+#endif

commit cd1142b38c3c352fb09315e7eb2b6be1eca51458
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Aug 29 18:24:05 2017 +0200

    UPSTREAM: rockchip: rk3399: spl: remove hard-coded addresses for GRF and SGRF
    
    On the RK3399, we will have either OF_PLATDATA or full OF_CONTROL
    enabled: this allows the use of syscon to retrieve the addresses of
    GRF and SGRF (except for the early debug UART setup, which runs so
    early that the device-model is not initialised).
    
    This removes the hard-coded addresses and goes through syscon to
    retrieve the base-addresses of GRF and SGRF. After that, we use
    the structure definitions to locate the respective registers.
    
    In addition to this, the inclusion of header files is also cleaned up:
    - all headers are included at the beginning (there was a spurious
      inclusion of the grf header from within a function)
    - all #include statements for unused headers are removed
    - the remaining #include statements are sorted (while keeping common.h
      included in front)
    
    Change-Id: I0ba923da4a178c9109a292e7196f6c4c35e1c24a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ba1657338b05337cea516dcfea6614c06f771613)

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index cae09da0c6..0b22526cf8 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -5,19 +5,17 @@
  */
 
 #include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/periph.h>
-#include <asm/arch/sdram.h>
-#include <asm/arch/timer.h>
+#include <asm/io.h>
+#include <debug_uart.h>
+#include <dm.h>
 #include <dm/pinctrl.h>
-#include <power/regulator.h>
+#include <ram.h>
+#include <spl.h>
+#include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -53,7 +51,6 @@ void secure_timer_init(void)
 
 void board_debug_uart_init(void)
 {
-#include <asm/arch/grf_rk3399.h>
 #define GRF_BASE	0xff770000
 	struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
 
@@ -80,13 +77,12 @@ void board_debug_uart_init(void)
 #endif
 }
 
-#define GRF_EMMCCORE_CON11 0xff77f02c
-#define SGRF_DDR_RGN_CON16 0xff330040
-#define SGRF_SLV_SECURE_CON4 0xff33e3d0
 void board_init_f(ulong dummy)
 {
 	struct udevice *pinctrl;
 	struct udevice *dev;
+	struct rk3399_pmusgrf_regs *sgrf;
+	struct rk3399_grf_regs *grf;
 	int ret;
 
 #define EARLY_UART
@@ -103,13 +99,7 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
-	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0x200);
-	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
-	/*  Emmc clock generator: disable the clock multipilier */
-	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
-
 	secure_timer_init();
-
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
@@ -125,8 +115,13 @@ void board_init_f(ulong dummy)
 	 * driver, which tries to DMA from/to the stack (likely)
 	 * located in this range.
 	 */
-	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
-	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
+	sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
+	rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
+	rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
+
+	/*  eMMC clock generator: disable the clock multipilier */
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	rk_clrreg(&grf->emmccore_con[11], 0x0ff);
 
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {

commit 4b4cac54f470d3c42b4c7752562b5bc6b796446a
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:27 2017 +0200

    UPSTREAM: rockchip: lion-rk3368: defconfig: resync w/ OF_LIVE and BOOTSTAGE enabled
    
    This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and
    regenerates the defconfig (picking up a few changes/reorderings) from
    upstream Kconfig changes.
    
    Change-Id: I80644ed20576f6c82edb84b5376807d4c2d4efb4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c254b29fef79a92948136855db41436392e2d28b)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index ca8eee57f1..ea8a2d7824 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -19,6 +19,11 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
+CONFIG_BOOTSTAGE=y
+CONFIG_SPL_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTSTAGE_FDT=y
+CONFIG_ENV_IS_IN_MMC=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_SPL=y
@@ -36,10 +41,12 @@ CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
+CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y

commit aac09c6b8c92debe067f7c4a037d7d20e41cb420
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:26 2017 +0200

    UPSTREAM: rockchip: dts: rk3368-lion: add /chosen/tick-timer
    
    To support bootstage recording, we want to mark our DM timer as the
    tick-timer; this triggers the support for 'trying harder' to read the
    timer in the Rockchip DM timer driver, even if the device model isn't
    ready yet.
    
    Change-Id: If09ee9ad6834bd8be99bc827471363383bce7c43
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f041176c4672f2885ff0843f5f7a27c892fcc42c)

diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi
index 6052e8a8d3..1ec7d254af 100644
--- a/arch/arm/dts/rk3368-lion-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi
@@ -13,6 +13,7 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 		u-boot,spl-boot-order = &emmc, &sdmmc;
+		tick-timer = "/timer@ff810000";
 	};
 
 };
@@ -88,6 +89,7 @@
 &timer0 {
 	u-boot,dm-pre-reloc;
 	clock-frequency = <24000000>;
+	status = "okay";
 };
 
 

commit a0c87cee8c03ecf4121ec7c9e0538f4bbe242f1b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:25 2017 +0200

    UPSTREAM: rockchip: gpio: remove outdated/misleading comment
    
    Remove a comment claiming that this driver only supports the RK3288,
    as we also use it on the RK3368, RK3399 and (most likely) on other
    variants.
    
    Change-Id: I265882dcdd0f702be6699c5f9293355dbd1cb81d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c23ce9ab85604c4b6b627e522c1dbf2a618063e6)

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index a6b83b26a8..11fc3e26bd 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -103,7 +103,6 @@ static int rockchip_gpio_probe(struct udevice *dev)
 	char *end;
 	int ret;
 
-	/* This only supports RK3288 at present */
 	priv->regs = dev_read_addr_ptr(dev);
 	ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl);
 	if (ret)

commit 55efd69c9eb6ecd5128d0be6741f77c334ca26f0
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:24 2017 +0200

    UPSTREAM: rockchip: gpio: convert to livetree
    
    Update the Rockchip GPIO-bank driver to support a live tree.
    
    Change-Id: Ic6aae620739fade81d512a070562f7978b648d6d
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a1d3480bc63103f6215925b9447512e933cc4f1a)

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 6f7366acba..a6b83b26a8 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -104,7 +104,7 @@ static int rockchip_gpio_probe(struct udevice *dev)
 	int ret;
 
 	/* This only supports RK3288 at present */
-	priv->regs = (struct rockchip_gpio_regs *)devfdt_get_addr(dev);
+	priv->regs = dev_read_addr_ptr(dev);
 	ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl);
 	if (ret)
 		return ret;

commit e2186db8e754a45d0b274daf59906b1729265fc8
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:23 2017 +0200

    UPSTREAM: rockchip: i2c: Convert to livetree
    
    Update the Rockchip I2C driver to support livetree.
    
    Change-Id: Iea1e1e9570bbe49da63f3c9b74ec40c3dfbbac48
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Heiko Schocher <hs@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cc91bdf8d4da6e66703a1bc99577f49ec3c7bf4a)

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 4c0d95adf6..482c3da644 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -382,7 +382,7 @@ static int rockchip_i2c_probe(struct udevice *bus)
 {
 	struct rk_i2c *priv = dev_get_priv(bus);
 
-	priv->regs = (void *)devfdt_get_addr(bus);
+	priv->regs = dev_read_addr_ptr(bus);
 
 	return 0;
 }

commit cd7449a3c434892b6c0b273522b379f30d1513dc
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:22 2017 +0200

    UPSTREAM: rockchip: rk8xx: remove unused header includes
    
    Remove header file includes that have been left over after the
    conversion to livetree-support.
    
    Change-Id: Iac1e65de175fa5dd747e161e426fc10309748e42
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a904a16bc172ee1d7bcbcae1afcec21efe305e47)

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 0f7771f7b3..4aa6e64978 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -8,8 +8,6 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <fdtdec.h>
-#include <libfdt.h>
 #include <power/rk8xx_pmic.h>
 #include <power/pmic.h>
 

commit 4ae650e51d95988a26a330569e7929f8362d3160
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:21 2017 +0200

    UPSTREAM: rockchip: sdhci: Convert to livetree
    
    Update the Rockchip SDHCI wrapper to support a live device tree.
    
    Change-Id: I6b093c4dcb7f9286b156fe8d2cef54d030969840
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 327b2b35c527d2ec6c8de4fdebb71322c0f085fb)

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index a05a422728..22fe200863 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -10,7 +10,6 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
-#include <fdtdec.h>
 #include <libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
@@ -243,7 +242,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 	struct sdhci_host *host = dev_get_priv(dev);
 
 	host->name = dev->name;
-	host->ioaddr = devfdt_get_addr_ptr(dev);
+	host->ioaddr = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit a9db6e69fc543b049b2d63358344225599b2e857
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:20 2017 +0200

    UPSTREAM: rockchip: spi: Convert to livetree
    
    Update the Rockchip SPI driver to support a live device tree.
    
    Change-Id: Ib54a4e52ed7177f342aafdca1c6bc1ddc0b76eaa
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Jagan Teki <jagan@openedev.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d27c273908c3ca534093e93d7730fc55973a02bc)

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index c70d636277..b18db74e7e 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -184,7 +184,7 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus)
 	struct rockchip_spi_priv *priv = dev_get_priv(bus);
 	int ret;
 
-	plat->base = devfdt_get_addr(bus);
+	plat->base = dev_read_addr(bus);
 
 	ret = clk_get_by_index(bus, 0, &priv->clk);
 	if (ret < 0) {

commit c6c4278784de647f8a3d6ee196618888fb3b8fbf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:19 2017 +0200

    UPSTREAM: rockchip: pinctrl: rk3368: Convert to livetree
    
    Update the pinctrl driver for the RK3368 to support a live device tree.
    
    Change-Id: Iba0c742549755a1a9d9edb7697faeb10b4edb247
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d2edb968c4dbd116aaddf994ec540eb4ef4d9cee)

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
index 81ce2e31a7..b1f5704164 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
@@ -632,8 +632,7 @@ static int rk3368_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
-				   "interrupts", cell, ARRAY_SIZE(cell));
+	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit 060bd5117ac9664d68af1b93937b9a1d29a9b28b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:18 2017 +0200

    UPSTREAM: rockchip: clk: rk3368: Convert to livetree
    
    Update the clock driver for the RK3368 to support a live device tree.
    
    Change-Id: Ic74f6208fd0705c11d9a09a37c0136824fe64842
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 9a342f48a6c4debb1a43132c4b8ddc61c9f5d01d)

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index f185215702..b221013a82 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -517,7 +517,7 @@ static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3368_clk_priv *priv = dev_get_priv(dev);
 
-	priv->cru = (struct rk3368_cru *)devfdt_get_addr(dev);
+	priv->cru = dev_read_addr_ptr(dev);
 #endif
 
 	return 0;

commit 428eb1cf97cf545f5780ef81d23dd74f7ee5115c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:17 2017 +0200

    UPSTREAM: rockchip: timer: Convert to livetree
    
    Update the Rockchip timer driver to support a live device tree.
    
    Change-Id: Ia7d704245e17907954428bd2bc1c5d895114797f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6675c952f20b7b3cfedd57c9c49305289a89403c)

diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index 3c0750697d..460eb82f6c 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -101,7 +101,9 @@ static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rockchip_timer_priv *priv = dev_get_priv(dev);
 
-	priv->timer = (struct rk_timer *)devfdt_get_addr(dev);
+	priv->timer = dev_read_addr_ptr(dev);
+	if (!priv->timer)
+		return -ENOENT;
 #endif
 
 	return 0;

commit fdb357172f10fe474659af44d8a86904dd207ea5
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:16 2017 +0200

    UPSTREAM: rockchip: timer: implement timer_get_boot_us
    
    To make the Rockchip DM timer driver useful for the timing of
    bootstages, we need a few enhancements:
     - This implements timer_get_boot_us.
     - This avoids reinitialising the timer, if it has already been
       set up (e.g. by our TPL and SPL stages). Now, we have a single
       timebase ticking from TPL through the full U-Boot.
     - This adds support for reading the timer even before the
       device-model is ready: we find the timer via /chosen/tick-timer,
       then read its address and clock-frequency, and finally read the
       timeval directly).
    
    Change-Id: I5f7d06f77c143482b28db7471600fdc5f39b824c
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cc7ce94e02799c5caa6d9c89350152f00ba3eb90)

diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index eb44965a19..3c0750697d 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/ofnode.h>
 #include <mapmem.h>
 #include <asm/arch/timer.h>
 #include <dt-structs.h>
@@ -25,17 +26,72 @@ struct rockchip_timer_priv {
 	struct rk_timer *timer;
 };
 
-static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
+static inline int64_t rockchip_timer_get_curr_value(struct rk_timer *timer)
 {
-	struct rockchip_timer_priv *priv = dev_get_priv(dev);
 	uint64_t timebase_h, timebase_l;
 	uint64_t cntr;
 
-	timebase_l = readl(&priv->timer->timer_curr_value0);
-	timebase_h = readl(&priv->timer->timer_curr_value1);
+	timebase_l = readl(&timer->timer_curr_value0);
+	timebase_h = readl(&timer->timer_curr_value1);
 
-	/* timers are down-counting */
 	cntr = timebase_h << 32 | timebase_l;
+	return cntr;
+}
+
+#if CONFIG_IS_ENABLED(BOOTSTAGE)
+ulong timer_get_boot_us(void)
+{
+	uint64_t  ticks = 0;
+	uint32_t  rate;
+	uint64_t  us;
+	int ret;
+
+	ret = dm_timer_init();
+
+	if (!ret) {
+		/* The timer is available */
+		rate = timer_get_rate(gd->timer);
+		timer_get_count(gd->timer, &ticks);
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	} else if (ret == -EAGAIN) {
+		/* We have been called so early that the DM is not ready,... */
+		ofnode node = offset_to_ofnode(-1);
+		struct rk_timer *timer = NULL;
+
+		/*
+		 * ... so we try to access the raw timer, if it is specified
+		 * via the tick-timer property in /chosen.
+		 */
+		node = ofnode_get_chosen_node("tick-timer");
+		if (!ofnode_valid(node)) {
+			debug("%s: no /chosen/tick-timer\n", __func__);
+			return 0;
+		}
+
+		timer = (struct rk_timer *)ofnode_get_addr(node);
+
+		/* This timer is down-counting */
+		ticks = ~0uLL - rockchip_timer_get_curr_value(timer);
+		if (ofnode_read_u32(node, "clock-frequency", &rate)) {
+			debug("%s: could not read clock-frequency\n", __func__);
+			return 0;
+		}
+#endif
+	} else {
+		return 0;
+	}
+
+	us = (ticks * 1000) / rate;
+	return us;
+}
+#endif
+
+static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
+{
+	struct rockchip_timer_priv *priv = dev_get_priv(dev);
+	uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
+
+	/* timers are down-counting */
 	*count = ~0ull - cntr;
 	return 0;
 }
@@ -58,6 +114,12 @@ static int rockchip_timer_start(struct udevice *dev)
 	const uint32_t reload_val_l = reload_val & 0xffffffff;
 	const uint32_t reload_val_h = reload_val >> 32;
 
+	/* don't reinit, if the timer is already running and set up */
+	if ((readl(&priv->timer->timer_ctrl_reg) & 1) == 1 &&
+	    (readl(&priv->timer->timer_load_count0) == reload_val_l) &&
+	    (readl(&priv->timer->timer_load_count1) == reload_val_h))
+		return 0;
+
 	/* disable timer and reset all control */
 	writel(0, &priv->timer->timer_ctrl_reg);
 	/* write reload value */

commit 1c23e4e1ebaf6a41d434e59bba65a7421d1af57c
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:15 2017 +0200

    UPSTREAM: rockchip: mmc: convert to livetree
    
    Update the Rockchip-specific wrapper for the Designware driver to
    support a live device tree.
    
    Change-Id: I114c6c49907f0c40de0e3d4a6249684a2986329a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit be5f04e850e89639ffe7ec4d2dccd327eb354cde)

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 20c083db63..a530c895a7 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -66,7 +66,7 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	struct dwmci_host *host = &priv->host;
 
 	host->name = dev->name;
-	host->ioaddr = (void *)devfdt_get_addr(dev);
+	host->ioaddr = dev_read_addr_ptr(dev);
 	host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
 	host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
 	host->priv = dev;

commit 8fb9fe4d88f93fe157862c046601fb7a08467a65
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:14 2017 +0200

    UPSTREAM: net: phy: micrel: Convert to livetree
    
    Update the Micrel KSZ90x1 driver for a live tree.
    
    Change-Id: Ibcb54f6305bea779bf3ab975b2b692cd9eb05c42
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b343837e90bf7eb1b7b7b5117cd6e101b72bda10)

diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c
index 0bb99e6bc6..b350a61aa6 100644
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@@ -9,11 +9,11 @@
  * (C) Copyright 2017 Adaptrum, Inc.
  * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc.
  */
+
 #include <config.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-#include <fdtdec.h>
 #include <micrel.h>
 #include <phy.h>
 
@@ -120,8 +120,7 @@ static int ksz90x1_of_config_group(struct phy_device *phydev,
 		return -EOPNOTSUPP;
 
 	for (i = 0; i < ofcfg->grpsz; i++) {
-		val[i] = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
-					 ofcfg->grp[i].name, -1);
+		val[i] = dev_read_u32_default(dev, ofcfg->grp[i].name, ~0);
 		offset = ofcfg->grp[i].off;
 		if (val[i] == -1) {
 			/* Default register value for KSZ9021 */

commit acb29c0a17878355eda158316f4769bfbfbde8db
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:13 2017 +0200

    UPSTREAM: net: designware: Convert to livetree
    
    Update the Designware Ethernet MAC driver to support a live device
    tree.
    
    Change-Id: I7c342900eb8a0386f9b1ccf963d02e76abee6a5f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 15050f1cb023052a5ab03d39e55119e9c6ce3eaf)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 521e4dde41..036d231071 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -737,16 +737,14 @@ int designware_eth_ofdata_to_platdata(struct udevice *dev)
 #endif
 	struct eth_pdata *pdata = &dw_pdata->eth_pdata;
 	const char *phy_mode;
-	const fdt32_t *cell;
 #ifdef CONFIG_DM_GPIO
 	int reset_flags = GPIOD_IS_OUT;
 #endif
 	int ret = 0;
 
-	pdata->iobase = devfdt_get_addr(dev);
+	pdata->iobase = dev_read_addr(dev);
 	pdata->phy_interface = -1;
-	phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
-			       NULL);
+	phy_mode = dev_read_string(dev, "phy-mode");
 	if (phy_mode)
 		pdata->phy_interface = phy_get_interface_by_name(phy_mode);
 	if (pdata->phy_interface == -1) {
@@ -754,10 +752,7 @@ int designware_eth_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 	}
 
-	pdata->max_speed = 0;
-	cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "max-speed", NULL);
-	if (cell)
-		pdata->max_speed = fdt32_to_cpu(*cell);
+	pdata->max_speed = dev_read_u32_default(dev, "max-speed", 0);
 
 #ifdef CONFIG_DM_GPIO
 	if (dev_read_bool(dev, "snps,reset-active-low"))

commit 18a0c4a65bddc8c9a9000fa06442a88bbb1d0ae3
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:12 2017 +0200

    UPSTREAM: dm: core: add dev_read_addr_ptr()
    
    The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(),
    retrieving the first address of the node's reg-property and returning
    it as a pointer (or NULL on failure).
    
    Change-Id: Iaac920b89296fd53504b071e7617f24ac6dd2fc8
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c131c8bca86b428daef7a25c26a96af42658be21)

diff --git a/drivers/core/read.c b/drivers/core/read.c
index 6acb33388f..065589a6ab 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -57,6 +57,13 @@ fdt_addr_t dev_read_addr(struct udevice *dev)
 	return dev_read_addr_index(dev, 0);
 }
 
+void *dev_read_addr_ptr(struct udevice *dev)
+{
+	fdt_addr_t addr = dev_read_addr(dev);
+
+	return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
+}
+
 fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property,
 				fdt_size_t *sizep)
 {
diff --git a/include/dm/read.h b/include/dm/read.h
index 49d69c990f..e7f71256a8 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -112,6 +112,16 @@ fdt_addr_t dev_read_addr_index(struct udevice *dev, int index);
  */
 fdt_addr_t dev_read_addr(struct udevice *dev);
 
+/**
+ * dev_read_addr_ptr() - Get the reg property of a device
+ *                       as a pointer
+ *
+ * @dev: Device to read from
+ *
+ * @return pointer or NULL if not found
+ */
+void *dev_read_addr_ptr(struct udevice *dev);
+
 /**
  * dev_read_addr_size() - get address and size from a device property
  *
@@ -417,6 +427,11 @@ static inline fdt_addr_t dev_read_addr(struct udevice *dev)
 	return devfdt_get_addr(dev);
 }
 
+static inline void *dev_read_addr_ptr(struct udevice *dev)
+{
+	return devfdt_get_addr_ptr(dev);
+}
+
 static inline fdt_addr_t dev_read_addr_size(struct udevice *dev,
 					    const char *propname,
 					    fdt_size_t *sizep)

commit 5867875cb7098007b82c3f5b5dd7af9c7cf9e63d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:11 2017 +0200

    UPSTREAM: dm: timer: handle being called before dm_root is ready
    
    When used with bootstage recording, dm_timer_init may be called
    surprisingly early: i.e. before dm_root is ready. To deal with
    this case, we explicitly check for this condition and return
    -EAGAIN to the caller (refer to drivers/timer/rockchip_timer.c
    for a case where this is needed/used).
    
    Change-Id: Ia35fea65924a73b6cc4b182ba28823b207be8e6f
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit af823151641b1a9a8eae8c3b111f5fa27e6873ac)

diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index 62d6f0b29a..45397b230f 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -92,6 +92,13 @@ int notrace dm_timer_init(void)
 	if (gd->timer)
 		return 0;
 
+	/*
+	 * Directly access gd->dm_root to suppress error messages, if the
+	 * virtual root driver does not yet exist.
+	 */
+	if (gd->dm_root == NULL)
+		return -EAGAIN;
+
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	/* Check for a chosen timer to be used for tick */
 	node = ofnode_get_chosen_node("tick-timer");

commit e842c8b7383b36f344d3d9790ee92c3e19987abf
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:10 2017 +0200

    UPSTREAM: dm: timer: Convert to livetree
    
    This updates dm_timer_init to support a live tree and deals with
    some fallout (i.e. the need to restructure the code such, that we
    don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks).
    
    Change-Id: Ic6e4f8cb98e1af64d1a1bb28d8f8e9a59db22c7a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b61e8b0c9e76dacf0b670c3948c3cd738b2379a3)

diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index a84755f4c5..62d6f0b29a 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/device-internal.h>
+#include <dm/root.h>
 #include <clk.h>
 #include <errno.h>
 #include <timer.h>
@@ -54,9 +55,10 @@ static int timer_pre_probe(struct udevice *dev)
 		if (IS_ERR_VALUE(ret))
 			return ret;
 		uc_priv->clock_rate = ret;
-	} else
-		uc_priv->clock_rate = fdtdec_get_int(gd->fdt_blob,
-				dev_of_offset(dev),	"clock-frequency", 0);
+	} else {
+		uc_priv->clock_rate =
+			dev_read_u32_default(dev, "clock-frequency", 0);
+	}
 #endif
 
 	return 0;
@@ -83,9 +85,8 @@ u64 timer_conv_64(u32 count)
 
 int notrace dm_timer_init(void)
 {
-	__maybe_unused const void *blob = gd->fdt_blob;
 	struct udevice *dev = NULL;
-	int node = -ENOENT;
+	__maybe_unused ofnode node;
 	int ret;
 
 	if (gd->timer)
@@ -93,27 +94,27 @@ int notrace dm_timer_init(void)
 
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	/* Check for a chosen timer to be used for tick */
-	node = fdtdec_get_chosen_node(blob, "tick-timer");
+	node = ofnode_get_chosen_node("tick-timer");
+
+	if (ofnode_valid(node) &&
+	    uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
+		/*
+		 * If the timer is not marked to be bound before
+		 * relocation, bind it anyway.
+		 */
+		if (!lists_bind_fdt(dm_root(), node, &dev)) {
+			ret = device_probe(dev);
+			if (ret)
+				return ret;
+		}
+	}
 #endif
-	if (node < 0) {
-		/* No chosen timer, trying first available timer */
+
+	if (!dev) {
+		/* Fall back to the first available timer */
 		ret = uclass_first_device_err(UCLASS_TIMER, &dev);
 		if (ret)
 			return ret;
-	} else {
-		if (uclass_get_device_by_of_offset(UCLASS_TIMER, node, &dev)) {
-			/*
-			 * If the timer is not marked to be bound before
-			 * relocation, bind it anyway.
-			 */
-			if (node > 0 &&
-			    !lists_bind_fdt(gd->dm_root, offset_to_ofnode(node),
-					    &dev)) {
-				ret = device_probe(dev);
-				if (ret)
-					return ret;
-			}
-		}
 	}
 
 	if (dev) {

commit 286803a6b4534417b770f8542d338dd85235572b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Mon Sep 11 22:04:09 2017 +0200

    UPSTREAM: bootstage: adjust Makefile to allow including bootstage in SPL, but not in TPL
    
    For timing our bootstages on the RK3368, which has a minimal TPL
    (and where we consequently don't want to time the bootstages) and a
    full-featured SPL (where we can bootstage recording), we need to
    adjust the Makefile.
    
    Use the $(SPL_TPL_) macro in the Makefile for bootstage.o
    
    Change-Id: Ib3cd45000bfbfb37377c96c9f41a467a760650aa
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 148a139d65b7fdb93326d7870b40c618d4601a8a)

diff --git a/common/Makefile b/common/Makefile
index 1757f39dd8..f79e8fe13a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -63,7 +63,7 @@ obj-$(CONFIG_CMDLINE) += cli_readline.o cli_simple.o
 
 endif # !CONFIG_SPL_BUILD
 
-obj-$(CONFIG_$(SPL_)BOOTSTAGE) += bootstage.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTSTAGE) += bootstage.o
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o

commit 5d3f9f0b8585a9ca9dc64ecff2241277f554fff5
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Sep 11 21:05:00 2017 +0200

    UPSTREAM: rockchip: board: puma_rk3399: update README flash instructions
    
    Puma supports other boot sources then SD-Card. Update README to include
    the required steps.
    
     * how to package a SPI-NOR SPL
     * how to flash eMMC with rkdeveloptool
    
    Change-Id: I52274ca551217209007d3ac9074351b7467404c8
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c91403409079e4747f60b79be5816773f6a4c8b3)

diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README
index 214281a329..f67dfb451f 100644
--- a/board/theobroma-systems/puma_rk3399/README
+++ b/board/theobroma-systems/puma_rk3399/README
@@ -55,18 +55,53 @@ Compile the U-Boot
 Package the image
 =================
 
-	> tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl.img
-	> make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb
+Creating a SPL image for SD-Card/eMMC
+  > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl_mmc.img
+Creating a SPL image for SPI-NOR
+  > tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin spl_nor.img
+Create the FIT image containing U-Boot proper, ATF, M0 Firmware, devicetree
+  > make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb
 
 Flash the image
 ===============
 
-Copy the SPL to offset 32k and the FIT image containing the payloads
-(U-Boot proper, ATF, M0 Firmware, devicetree) to offset 256k on a SD
-card.
+Copy the SPL to offset 32k for SD/eMMC, offset 0 for NOR-Flash and the FIT
+image to offset 256k card.
 
-  > dd if=spl.img of=/dev/sdb seek=64
+SD-Card
+-------
+
+  > dd if=spl_mmc.img of=/dev/sdb seek=64
   > dd if=u-boot.itb of=/dev/sdb seek=512
 
-After powering up the board (with the inserted SD card), you should see
-a U-Boot console on UART0 (115200n8).
+eMMC
+----
+
+rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
+help of the Rockchip loader binary.
+
+  > git clone https://github.com/rockchip-linux/rkdeveloptool
+  > cd rkdeveloptool
+  > autoreconf -i && ./configure && make
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > ./rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > ./rkdeveloptool wl 64 ../spl_mmc.img
+  > ./rkdeveloptool wl 512 ../u-boot.itb
+
+NOR-Flash
+---------
+
+Writing the SPI NOR Flash requires a running U-Boot. For the sake of simplicity
+we assume you have a SD-Card with a partition containing the required files
+ready.
+
+  > load mmc 1:1 ${kernel_addr_r} spl_nor.img
+  > sf probe
+  > sf erase 0 +$filesize
+  > sf write $kernel_addr_r 0 ${filesize}
+  > load mmc 1:1 ${kernel_addr_r} u-boot.itb
+  > sf erase 0x40000 +$filesize
+  > sf write $kernel_addr_r 0x40000 ${filesize}
+
+
+Reboot the system and you should see a U-Boot console on UART0 (115200n8).

commit d0b0568be9a6107d573f67179091501494b8cd2f
Author: Klaus Goger <klaus.goger@theobroma-systems.com>
Date:   Mon Sep 11 21:04:59 2017 +0200

    UPSTREAM: rockchip: board: lion_rk3368: update README flash instructions
    
    Add a section to the README on how to flash the on-board eMMC
    with the rkdeveloptool.
    
    Change-Id: Ic069b5bbaf64c6834f048167b21ac79071c399ee
    Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cc8fb2f79304963597248ad7cdab6cf2f9b336ef)

diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README
index 47304fcba6..83e4332984 100644
--- a/board/theobroma-systems/lion_rk3368/README
+++ b/board/theobroma-systems/lion_rk3368/README
@@ -26,12 +26,32 @@ Build the full U-Boot and a FIT image including the ATF
 
   > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb
 
-Write to a SD-card
-==================
+Flash the image
+===============
+
+Copy the SPL to offset 32k and the FIT image containing the payloads
+(U-Boot proper, ATF, devicetree) to offset 256k card.
+
+SD-Card
+-------
 
   > dd if=spl-3368.img of=/dev/sdb seek=64
   > dd if=u-boot.itb of=/dev/sdb seek=512
 
+eMMC
+----
+
+rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with
+help of the Rockchip loader binary.
+
+  > git clone https://github.com/rockchip-linux/rkdeveloptool
+  > cd rkdeveloptool
+  > autoreconf -i && && ./configure && make
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > ./rkdeveloptool db rkbin/rk33/rk3368_loader_v2.00.256.bin
+  > ./rkdeveloptool wl 64 ../spl.img
+  > ./rkdeveloptool wl 512 ../u-boot.itb
+
 
 If everything went according to plan, you should see the following
 output on UART0:

commit fed831fc6cddd996f30c9329061e7edfad861f3c
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:53 2017 -0400

    UPSTREAM: fs/fat: introduce new director iterators
    
    Untangle directory traversal into a simple iterator, to replace the
    existing multi-purpose do_fat_read_at() + get_dentfromdir().
    
    Change-Id: Iacf404e2ac7796adfa489d6e098c4d310635975a
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c6e3baa565bc3b5828cf0d67ca6429dbe5f8687c)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index e1c0a15dc7..ee2bbe38f1 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -812,7 +812,6 @@ static int get_fs_info(fsdata *mydata)
 {
 	boot_sector bs;
 	volume_info volinfo;
-	__u32 root_cluster = 0;
 	int ret;
 
 	ret = read_bootsectandvi(&bs, &volinfo, &mydata->fatsize);
@@ -822,7 +821,6 @@ static int get_fs_info(fsdata *mydata)
 	}
 
 	if (mydata->fatsize == 32) {
-		root_cluster = bs.root_cluster;
 		mydata->fatlength = bs.fat32_length;
 	} else {
 		mydata->fatlength = bs.fat_length;
@@ -843,6 +841,7 @@ static int get_fs_info(fsdata *mydata)
 	if (mydata->fatsize == 32) {
 		mydata->data_begin = mydata->rootdir_sect -
 					(mydata->clust_size * 2);
+		mydata->root_cluster = bs.root_cluster;
 	} else {
 		mydata->rootdir_size = ((bs.dir_entries[1]  * (int)256 +
 					 bs.dir_entries[0]) *
@@ -851,6 +850,9 @@ static int get_fs_info(fsdata *mydata)
 		mydata->data_begin = mydata->rootdir_sect +
 					mydata->rootdir_size -
 					(mydata->clust_size * 2);
+		mydata->root_cluster = (mydata->rootdir_sect -
+					mydata->data_begin) /
+					mydata->clust_size;
 	}
 
 	mydata->fatbufnum = -1;
@@ -868,7 +870,7 @@ static int get_fs_info(fsdata *mydata)
 	       mydata->fatsize, mydata->fat_sect, mydata->fatlength);
 	debug("Rootdir begins at cluster: %d, sector: %d, offset: %x\n"
 	       "Data begins at: %d\n",
-	       root_cluster,
+	       mydata->root_cluster,
 	       mydata->rootdir_sect,
 	       mydata->rootdir_sect * mydata->sect_size, mydata->data_begin);
 	debug("Sector size: %d, cluster size: %d\n", mydata->sect_size,
@@ -1245,6 +1247,354 @@ exit:
 	return ret;
 }
 
+
+/*
+ * Directory iterator, to simplify filesystem traversal
+ *
+ * Implements an iterator pattern to traverse directory tables,
+ * transparently handling directory tables split across multiple
+ * clusters, and the difference between FAT12/FAT16 root directory
+ * (contiguous) and subdirectories + FAT32 root (chained).
+ *
+ * Rough usage:
+ *
+ *   for (fat_itr_root(&itr, fsdata); fat_itr_next(&itr); ) {
+ *      // to traverse down to a subdirectory pointed to by
+ *      // current iterator position:
+ *      fat_itr_child(&itr, &itr);
+ *   }
+ *
+ * For more complete example, see fat_itr_resolve()
+ */
+
+typedef struct {
+	fsdata    *fsdata;        /* filesystem parameters */
+	unsigned   clust;         /* current cluster */
+	int        last_cluster;  /* set once we've read last cluster */
+	int        is_root;       /* is iterator at root directory */
+	int        remaining;     /* remaining dent's in current cluster */
+
+	/* current iterator position values: */
+	dir_entry *dent;          /* current directory entry */
+	char       l_name[VFAT_MAXLEN_BYTES];    /* long (vfat) name */
+	char       s_name[14];    /* short 8.3 name */
+	char      *name;          /* l_name if there is one, else s_name */
+
+	/* storage for current cluster in memory: */
+	u8         block[MAX_CLUSTSIZE] __aligned(ARCH_DMA_MINALIGN);
+} fat_itr;
+
+static int fat_itr_isdir(fat_itr *itr);
+
+/**
+ * fat_itr_root() - initialize an iterator to start at the root
+ * directory
+ *
+ * @itr: iterator to initialize
+ * @fsdata: filesystem data for the partition
+ * @return 0 on success, else -errno
+ */
+static int fat_itr_root(fat_itr *itr, fsdata *fsdata)
+{
+	if (get_fs_info(fsdata))
+		return -ENXIO;
+
+	itr->fsdata = fsdata;
+	itr->clust = fsdata->root_cluster;
+	itr->dent = NULL;
+	itr->remaining = 0;
+	itr->last_cluster = 0;
+	itr->is_root = 1;
+
+	return 0;
+}
+
+/**
+ * fat_itr_child() - initialize an iterator to descend into a sub-
+ * directory
+ *
+ * Initializes 'itr' to iterate the contents of the directory at
+ * the current cursor position of 'parent'.  It is an error to
+ * call this if the current cursor of 'parent' is pointing at a
+ * regular file.
+ *
+ * Note that 'itr' and 'parent' can be the same pointer if you do
+ * not need to preserve 'parent' after this call, which is useful
+ * for traversing directory structure to resolve a file/directory.
+ *
+ * @itr: iterator to initialize
+ * @parent: the iterator pointing at a directory entry in the
+ *    parent directory of the directory to iterate
+ */
+static void fat_itr_child(fat_itr *itr, fat_itr *parent)
+{
+	fsdata *mydata = parent->fsdata;  /* for silly macros */
+	unsigned clustnum = START(parent->dent);
+
+	assert(fat_itr_isdir(parent));
+
+	itr->fsdata = parent->fsdata;
+	if (clustnum > 0) {
+		itr->clust = clustnum;
+	} else {
+		itr->clust = parent->fsdata->root_cluster;
+	}
+	itr->dent = NULL;
+	itr->remaining = 0;
+	itr->last_cluster = 0;
+	itr->is_root = 0;
+}
+
+static void *next_cluster(fat_itr *itr)
+{
+	fsdata *mydata = itr->fsdata;  /* for silly macros */
+	int ret;
+	u32 sect;
+
+	/* have we reached the end? */
+	if (itr->last_cluster)
+		return NULL;
+
+	sect = clust_to_sect(itr->fsdata, itr->clust);
+
+	debug("FAT read(sect=%d), clust_size=%d, DIRENTSPERBLOCK=%zd\n",
+	      sect, itr->fsdata->clust_size, DIRENTSPERBLOCK);
+
+	/*
+	 * NOTE: do_fat_read_at() had complicated logic to deal w/
+	 * vfat names that span multiple clusters in the fat16 case,
+	 * which get_dentfromdir() probably also needed (and was
+	 * missing).  And not entirely sure what fat32 didn't have
+	 * the same issue..  We solve that by only caring about one
+	 * dent at a time and iteratively constructing the vfat long
+	 * name.
+	 */
+	ret = disk_read(sect, itr->fsdata->clust_size,
+			itr->block);
+	if (ret < 0) {
+		debug("Error: reading block\n");
+		return NULL;
+	}
+
+	if (itr->is_root && itr->fsdata->fatsize != 32) {
+		itr->clust++;
+		sect = clust_to_sect(itr->fsdata, itr->clust);
+		if (sect - itr->fsdata->rootdir_sect >=
+		    itr->fsdata->rootdir_size) {
+			debug("cursect: 0x%x\n", itr->clust);
+			itr->last_cluster = 1;
+		}
+	} else {
+		itr->clust = get_fatent(itr->fsdata, itr->clust);
+		if (CHECK_CLUST(itr->clust, itr->fsdata->fatsize)) {
+			debug("cursect: 0x%x\n", itr->clust);
+			itr->last_cluster = 1;
+		}
+	}
+
+	return itr->block;
+}
+
+static dir_entry *next_dent(fat_itr *itr)
+{
+	if (itr->remaining == 0) {
+		struct dir_entry *dent = next_cluster(itr);
+		unsigned nbytes = itr->fsdata->sect_size *
+			itr->fsdata->clust_size;
+
+		/* have we reached the last cluster? */
+		if (!dent)
+			return NULL;
+
+		itr->remaining = nbytes / sizeof(dir_entry) - 1;
+		itr->dent = dent;
+	} else {
+		itr->remaining--;
+		itr->dent++;
+	}
+
+	/* have we reached the last valid entry? */
+	if (itr->dent->name[0] == 0)
+		return NULL;
+
+	return itr->dent;
+}
+
+static dir_entry *extract_vfat_name(fat_itr *itr)
+{
+	struct dir_entry *dent = itr->dent;
+	int seqn = itr->dent->name[0] & ~LAST_LONG_ENTRY_MASK;
+	u8 chksum, alias_checksum = ((dir_slot *)dent)->alias_checksum;
+	int n = 0;
+
+	while (seqn--) {
+		char buf[13];
+		int idx = 0;
+
+		slot2str((dir_slot *)dent, buf, &idx);
+
+		/* shift accumulated long-name up and copy new part in: */
+		memmove(itr->l_name + idx, itr->l_name, n);
+		memcpy(itr->l_name, buf, idx);
+		n += idx;
+
+		dent = next_dent(itr);
+		if (!dent)
+			return NULL;
+	}
+
+	itr->l_name[n] = '\0';
+
+	chksum = mkcksum(dent->name, dent->ext);
+
+	/* checksum mismatch could mean deleted file, etc.. skip it: */
+	if (chksum != alias_checksum) {
+		debug("** chksum=%x, alias_checksum=%x, l_name=%s, s_name=%8s.%3s\n",
+		      chksum, alias_checksum, itr->l_name, dent->name, dent->ext);
+		return NULL;
+	}
+
+	return dent;
+}
+
+/**
+ * fat_itr_next() - step to the next entry in a directory
+ *
+ * Must be called once on a new iterator before the cursor is valid.
+ *
+ * @itr: the iterator to iterate
+ * @return boolean, 1 if success or 0 if no more entries in the
+ *    current directory
+ */
+static int fat_itr_next(fat_itr *itr)
+{
+	dir_entry *dent;
+
+	itr->name = NULL;
+
+	while (1) {
+		dent = next_dent(itr);
+		if (!dent)
+			return 0;
+
+		if (dent->name[0] == DELETED_FLAG ||
+		    dent->name[0] == aRING)
+			continue;
+
+		if (dent->attr & ATTR_VOLUME) {
+			if (vfat_enabled &&
+			    (dent->attr & ATTR_VFAT) == ATTR_VFAT &&
+			    (dent->name[0] & LAST_LONG_ENTRY_MASK)) {
+				dent = extract_vfat_name(itr);
+				if (!dent)
+					continue;
+				itr->name = itr->l_name;
+				break;
+			} else {
+				/* Volume label or VFAT entry, skip */
+				continue;
+			}
+		}
+
+		break;
+	}
+
+	get_name(dent, itr->s_name);
+	if (!itr->name)
+		itr->name = itr->s_name;
+
+	return 1;
+}
+
+/**
+ * fat_itr_isdir() - is current cursor position pointing to a directory
+ *
+ * @itr: the iterator
+ * @return true if cursor is at a directory
+ */
+static int fat_itr_isdir(fat_itr *itr)
+{
+	return !!(itr->dent->attr & ATTR_DIR);
+}
+
+/*
+ * Helpers:
+ */
+
+#define TYPE_FILE 0x1
+#define TYPE_DIR  0x2
+#define TYPE_ANY  (TYPE_FILE | TYPE_DIR)
+
+/**
+ * fat_itr_resolve() - traverse directory structure to resolve the
+ * requested path.
+ *
+ * Traverse directory structure to the requested path.  If the specified
+ * path is to a directory, this will descend into the directory and
+ * leave it iterator at the start of the directory.  If the path is to a
+ * file, it will leave the iterator in the parent directory with current
+ * cursor at file's entry in the directory.
+ *
+ * @itr: iterator initialized to root
+ * @path: the requested path
+ * @type: bitmask of allowable file types
+ * @return 0 on success or -errno
+ */
+static int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
+{
+	const char *next;
+
+	/* chomp any extra leading slashes: */
+	while (path[0] && ISDIRDELIM(path[0]))
+		path++;
+
+	/* are we at the end? */
+	if (strlen(path) == 0) {
+		if (!(type & TYPE_DIR))
+			return -ENOENT;
+		return 0;
+	}
+
+	/* find length of next path entry: */
+	next = path;
+	while (next[0] && !ISDIRDELIM(next[0]))
+		next++;
+
+	while (fat_itr_next(itr)) {
+		int match = 0;
+		unsigned n = max(strlen(itr->name), (size_t)(next - path));
+
+		/* check both long and short name: */
+		if (!strncasecmp(path, itr->name, n))
+			match = 1;
+		else if (itr->name != itr->s_name &&
+			 !strncasecmp(path, itr->s_name, n))
+			match = 1;
+
+		if (!match)
+			continue;
+
+		if (fat_itr_isdir(itr)) {
+			/* recurse into directory: */
+			fat_itr_child(itr, itr);
+			return fat_itr_resolve(itr, next, type);
+		} else if (next[0]) {
+			/*
+			 * If next is not empty then we have a case
+			 * like: /path/to/realfile/nonsense
+			 */
+			debug("bad trailing path: %s\n", next);
+			return -ENOENT;
+		} else if (!(type & TYPE_FILE)) {
+			return -ENOTDIR;
+		} else {
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
 int do_fat_read(const char *filename, void *buffer, loff_t maxsize, int dols,
 		loff_t *actread)
 {
diff --git a/include/fat.h b/include/fat.h
index b671ee8f81..21bb6666cf 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -175,8 +175,15 @@ typedef struct {
 	int	data_begin;	/* The sector of the first cluster, can be negative */
 	int	fatbufnum;	/* Used by get_fatent, init to -1 */
 	int	rootdir_size;	/* Size of root dir for non-FAT32 */
+	__u32	root_cluster;	/* First cluster of root dir for FAT32 */
 } fsdata;
 
+/* TODO clean up places that are open-coding this: */
+static inline u32 clust_to_sect(fsdata *fsdata, u32 clust)
+{
+	return fsdata->data_begin + clust * fsdata->clust_size;
+}
+
 typedef int	(file_detectfs_func)(void);
 typedef int	(file_ls_func)(const char *dir);
 typedef int	(file_read_func)(const char *filename, void *buffer,

commit f3068e758f148b63011030c69ae29dc1edd062f3
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 13:15:52 2017 -0400

    UPSTREAM: fs/fat: split out helper to init fsdata
    
    Want to re-use this in fat dirent iterator in next patch.
    
    Change-Id: I61d7586e50d13106c516235d46c47410b22496bb
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Łukasz Majewski <lukma@denx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 45449980f80169214633f2649a27c791d0104e9d)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 465a6875ed..e1c0a15dc7 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -808,35 +808,17 @@ exit:
 	return ret;
 }
 
-__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
-	__aligned(ARCH_DMA_MINALIGN);
-
-int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
-		   loff_t maxsize, int dols, int dogetsize, loff_t *size)
+static int get_fs_info(fsdata *mydata)
 {
-	char fnamecopy[2048];
 	boot_sector bs;
 	volume_info volinfo;
-	fsdata datablock;
-	fsdata *mydata = &datablock;
-	dir_entry *dentptr = NULL;
-	__u16 prevcksum = 0xffff;
-	char *subname = "";
-	__u32 cursect;
-	int idx, isdir = 0;
-	int files = 0, dirs = 0;
-	int ret = -1;
-	int firsttime;
 	__u32 root_cluster = 0;
-	__u32 read_blk;
-	int rootdir_size = 0;
-	int buffer_blk_cnt;
-	int do_read;
-	__u8 *dir_ptr;
+	int ret;
 
-	if (read_bootsectandvi(&bs, &volinfo, &mydata->fatsize)) {
+	ret = read_bootsectandvi(&bs, &volinfo, &mydata->fatsize);
+	if (ret) {
 		debug("Error: reading boot sector\n");
-		return -1;
+		return ret;
 	}
 
 	if (mydata->fatsize == 32) {
@@ -848,8 +830,7 @@ int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
 
 	mydata->fat_sect = bs.reserved;
 
-	cursect = mydata->rootdir_sect
-		= mydata->fat_sect + mydata->fatlength * bs.fats;
+	mydata->rootdir_sect = mydata->fat_sect + mydata->fatlength * bs.fats;
 
 	mydata->sect_size = (bs.sector_size[1] << 8) + bs.sector_size[0];
 	mydata->clust_size = bs.cluster_size;
@@ -863,12 +844,12 @@ int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		mydata->data_begin = mydata->rootdir_sect -
 					(mydata->clust_size * 2);
 	} else {
-		rootdir_size = ((bs.dir_entries[1]  * (int)256 +
-				 bs.dir_entries[0]) *
-				 sizeof(dir_entry)) /
-				 mydata->sect_size;
+		mydata->rootdir_size = ((bs.dir_entries[1]  * (int)256 +
+					 bs.dir_entries[0]) *
+					 sizeof(dir_entry)) /
+					 mydata->sect_size;
 		mydata->data_begin = mydata->rootdir_sect +
-					rootdir_size -
+					mydata->rootdir_size -
 					(mydata->clust_size * 2);
 	}
 
@@ -893,6 +874,38 @@ int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
 	debug("Sector size: %d, cluster size: %d\n", mydata->sect_size,
 	      mydata->clust_size);
 
+	return 0;
+}
+
+__u8 do_fat_read_at_block[MAX_CLUSTSIZE]
+	__aligned(ARCH_DMA_MINALIGN);
+
+int do_fat_read_at(const char *filename, loff_t pos, void *buffer,
+		   loff_t maxsize, int dols, int dogetsize, loff_t *size)
+{
+	char fnamecopy[2048];
+	fsdata datablock;
+	fsdata *mydata = &datablock;
+	dir_entry *dentptr = NULL;
+	__u16 prevcksum = 0xffff;
+	char *subname = "";
+	__u32 cursect;
+	int idx, isdir = 0;
+	int files = 0, dirs = 0;
+	int ret = -1;
+	int firsttime;
+	__u32 root_cluster = 0;
+	__u32 read_blk;
+	int rootdir_size = 0;
+	int buffer_blk_cnt;
+	int do_read;
+	__u8 *dir_ptr;
+
+	if (get_fs_info(mydata))
+		return -1;
+
+	cursect = mydata->rootdir_sect;
+
 	/* "cwd" is always the root... */
 	while (ISDIRDELIM(*filename))
 		filename++;
diff --git a/include/fat.h b/include/fat.h
index 71879f01ca..b671ee8f81 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -174,6 +174,7 @@ typedef struct {
 	__u16	clust_size;	/* Size of clusters in sectors */
 	int	data_begin;	/* The sector of the first cluster, can be negative */
 	int	fatbufnum;	/* Used by get_fatent, init to -1 */
+	int	rootdir_size;	/* Size of root dir for non-FAT32 */
 } fsdata;
 
 typedef int	(file_detectfs_func)(void);

commit 70478c701f69db087606e3071554b13410a6a931
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Thu Sep 14 12:27:07 2017 +0200

    UPSTREAM: test/py: u_boot_console_base.py: fix typo
    
    run_command does not have a parameter wait_for_each.
    
    Change-Id: I5b6bb3ed1b732c3ebc307f0618282caea9190b83
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit cd3e8a72a6fb1fe758c5f73b394527609afe26cc)

diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index b1f474236e..eedf73f858 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -160,7 +160,7 @@ class ConsoleBase(object):
 
         Args:
             cmd: The command to send.
-            wait_for_each: Boolean indicating whether to wait for U-Boot to
+            wait_for_echo: Boolean indicating whether to wait for U-Boot to
                 echo the command text back to its output.
             send_nl: Boolean indicating whether to send a newline character
                 after the command string.

commit dd10e6c7ae9cc8cc9a762c2a56875411bce3cfcb
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Wed Sep 13 04:59:05 2017 +0200

    UPSTREAM: checkpatch.pl: Add warning for new __packed additions
    
    While there are valid reasons to use __packed, often the answer is that
    you should be doing something else here instead.
    
    This reintroduces the changes of
    f503cc49a570 (Add warning for new __packed additions)
    
    Change-Id: I83bacea893370139a6e980a946d93db25a73baf5
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5c761ce58666b3a1695697498598f8bf3484a0c7)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 2287a0bca8..4142f5c837 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -5616,6 +5616,13 @@ sub process {
 			     "__packed is preferred over __attribute__((packed))\n" . $herecurr);
 		}
 
+# Check for new packed members, warn to use care
+		if ($realfile !~ m@\binclude/uapi/@ &&
+		    $line =~ /\b(__attribute__\s*\(\s*\(.*\bpacked|__packed)\b/) {
+			WARN("NEW_PACKED",
+			     "Adding new packed members is to be done with care\n" . $herecurr);
+		}
+
 # Check for __attribute__ aligned, prefer __aligned
 		if ($realfile !~ m@\binclude/uapi/@ &&
 		    $line =~ /\b__attribute__\s*\(\s*\(.*aligned/) {

commit ec5e502c14081f0dec0c8b6862994ea01969af9b
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Sep 12 19:00:36 2017 -0700

    UPSTREAM: cmd: blk: Use LBAFU in the common block command
    
    There is already a macro LBAFU to aid formatted print with lbaint_t
    variables. Let's use it in the common block command codes.
    
    Change-Id: I93256536d5af97877ecf9c4edc36d268b498dd1b
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e2888a7fa7f8d23396c4b25ea763fe1f38851b3d)

diff --git a/cmd/blk_common.c b/cmd/blk_common.c
index 86c75e78d8..0c0c23eb37 100644
--- a/cmd/blk_common.c
+++ b/cmd/blk_common.c
@@ -68,9 +68,8 @@ int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 			ulong cnt = simple_strtoul(argv[4], NULL, 16);
 			ulong n;
 
-			printf("\n%s read: device %d block # %lld, count %ld ... ",
-			       if_name, *cur_devnump, (unsigned long long)blk,
-			       cnt);
+			printf("\n%s read: device %d block # "LBAFU", count %lu ... ",
+			       if_name, *cur_devnump, blk, cnt);
 
 			n = blk_read_devnum(if_type, *cur_devnump, blk, cnt,
 					    (ulong *)addr);
@@ -84,9 +83,8 @@ int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
 			ulong cnt = simple_strtoul(argv[4], NULL, 16);
 			ulong n;
 
-			printf("\n%s write: device %d block # %lld, count %ld ... ",
-			       if_name, *cur_devnump, (unsigned long long)blk,
-			       cnt);
+			printf("\n%s write: device %d block # "LBAFU", count %lu ... ",
+			       if_name, *cur_devnump, blk, cnt);
 
 			n = blk_write_devnum(if_type, *cur_devnump, blk, cnt,
 					     (ulong *)addr);

commit 010034028fef0bf601f7e7474b516888e066cac3
Author: Bin Meng <bmeng.cn@gmail.com>
Date:   Tue Sep 12 19:00:23 2017 -0700

    UPSTREAM: blk: Remove various places that do flush cache after read
    
    All these places seem to inherit the codes from the MMC driver where
    a FIXME was put in the comment. However the correct operation after
    read should be cache invalidate, not flush.
    
    The underlying drivers should be responsible for the cache operation.
    Remove these codes completely.
    
    Change-Id: I8f04c721432753b34e85b19616a0b42d83a633eb
    Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
    Reviewed-by: Stefan Roese <sr@denx.de>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Tested-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 723b43daec7ee2ddb600cfcb9b0253d4a71c3915)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index 24ddb5d991..bbf8bba112 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -107,9 +107,6 @@ int ppa_init(void)
 		return -EIO;
 	}
 
-	/* flush cache after read */
-	flush_cache((ulong)fitp, cnt * 512);
-
 	ret = fdt_check_header(fitp);
 	if (ret) {
 		free(fitp);
@@ -134,9 +131,6 @@ int ppa_init(void)
 	}
 	debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_hdr_ddr, cnt * 512);
-
 	ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
 #endif
 
@@ -164,9 +158,6 @@ int ppa_init(void)
 		return -EIO;
 	}
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_fit_addr, cnt * 512);
-
 #elif defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
 	struct fdt_header fit;
 
@@ -208,9 +199,6 @@ int ppa_init(void)
 	}
 	debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
 
-	/* flush cache after read */
-	flush_cache((ulong)ppa_hdr_ddr, fw_length);
-
 	ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
 #endif
 
@@ -232,9 +220,6 @@ int ppa_init(void)
 		       CONFIG_SYS_LS_PPA_FW_ADDR);
 		return -EIO;
 	}
-
-	/* flush cache after read */
-	flush_cache((ulong)ppa_fit_addr, fw_length);
 #else
 #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined"
 #endif
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 328c4c0200..f850a3c98e 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -129,8 +129,6 @@ static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
 			ret = -EIO;
 			goto out;
 		}
-		/* Flush cache after read */
-		flush_cache((ulong)(unsigned char *)config_block, 512);
 	} else {
 		/* Just writing one 512 byte block */
 		if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1,
diff --git a/cmd/mmc.c b/cmd/mmc.c
index ae42200bfa..af71e108f8 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -463,8 +463,6 @@ static int do_mmc_read(cmd_tbl_t *cmdtp, int flag,
 	       curr_device, blk, cnt);
 
 	n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr);
-	/* flush cache after read */
-	flush_cache((ulong)addr, cnt * 512); /* FIXME */
 	printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
 
 	return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 4485f8026c..f8c650357a 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -296,9 +296,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
 	if (IS_ERR_VALUE(n))
 		return n;
 
-	/* flush cache after read */
-	flush_cache((ulong)buffer, blkcnt * desc->blksz);
-
 	return n;
 }
 
diff --git a/drivers/block/blk_legacy.c b/drivers/block/blk_legacy.c
index 981872ecb3..16d3bfe7f2 100644
--- a/drivers/block/blk_legacy.c
+++ b/drivers/block/blk_legacy.c
@@ -232,9 +232,6 @@ ulong blk_read_devnum(enum if_type if_type, int devnum, lbaint_t start,
 	if (IS_ERR_VALUE(n))
 		return n;
 
-	/* flush cache after read */
-	flush_cache((ulong)buffer, blkcnt * desc->blksz);
-
 	return n;
 }
 
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 451dfded77..261f1b911b 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -405,8 +405,6 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #elif defined(CONFIG_SYS_QE_FMAN_FW_IN_REMOTE)
 	void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;
diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c
index e0e9ed9767..637d89a1e1 100644
--- a/drivers/net/phy/cortina.c
+++ b/drivers/net/phy/cortina.c
@@ -177,8 +177,6 @@ void cs4340_upload_firmware(struct phy_device *phydev)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #endif
 
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 24e764dc7c..931c9d903f 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -221,8 +221,6 @@ void u_qe_init(void)
 		mmc_init(mmc);
 		(void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt,
 						addr);
-		/* flush cache after read */
-		flush_cache((ulong)addr, cnt * 512);
 	}
 #endif
 	u_qe_upload_firmware(addr);

commit 6d7abe741904bd96d2e9269f8713caa5ef780970
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:23 2017 +0300

    UPSTREAM: test: overlay: Add unit test for stacked overlay
    
    Verify that stacked overlays work.
    
    Change-Id: Id5c578db630bb34e952ca5176bb5ca9815bb0c0f
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ea28e488f743520f7f83b341f28818c32dae1ee3)

diff --git a/test/overlay/Makefile b/test/overlay/Makefile
index 907f085446..416645c884 100644
--- a/test/overlay/Makefile
+++ b/test/overlay/Makefile
@@ -13,3 +13,4 @@ DTC_FLAGS += -@
 # DT overlays
 obj-y += test-fdt-base.dtb.o
 obj-y += test-fdt-overlay.dtb.o
+obj-y += test-fdt-overlay-stacked.dtb.o
diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index 7106f42a62..24891ee829 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -20,6 +20,7 @@
 
 extern u32 __dtb_test_fdt_base_begin;
 extern u32 __dtb_test_fdt_overlay_begin;
+extern u32 __dtb_test_fdt_overlay_stacked_begin;
 
 static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path,
 				    const char *name, int index,
@@ -201,6 +202,19 @@ static int fdt_overlay_local_phandles(struct unit_test_state *uts)
 }
 OVERLAY_TEST(fdt_overlay_local_phandles, 0);
 
+static int fdt_overlay_stacked(struct unit_test_state *uts)
+{
+	void *fdt = uts->priv;
+	u32 val = 0;
+
+	ut_assertok(ut_fdt_getprop_u32(fdt, "/new-local-node",
+				       "stacked-test-int-property", &val));
+	ut_asserteq(43, val);
+
+	return CMD_RET_SUCCESS;
+}
+OVERLAY_TEST(fdt_overlay_stacked, 0);
+
 int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test,
@@ -210,7 +224,8 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	struct unit_test *test;
 	void *fdt_base = &__dtb_test_fdt_base_begin;
 	void *fdt_overlay = &__dtb_test_fdt_overlay_begin;
-	void *fdt_base_copy, *fdt_overlay_copy;
+	void *fdt_overlay_stacked = &__dtb_test_fdt_overlay_stacked_begin;
+	void *fdt_base_copy, *fdt_overlay_copy, *fdt_overlay_stacked_copy;
 
 	uts = calloc(1, sizeof(*uts));
 	if (!uts)
@@ -228,6 +243,10 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (!fdt_overlay_copy)
 		return -ENOMEM;
 
+	fdt_overlay_stacked_copy = malloc(FDT_COPY_SIZE);
+	if (!fdt_overlay_stacked_copy)
+		return -ENOMEM;
+
 	/*
 	 * Resize the FDT to 4k so that we have room to operate on
 	 *
@@ -245,9 +264,21 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	ut_assertok(fdt_open_into(fdt_overlay, fdt_overlay_copy,
 				  FDT_COPY_SIZE));
 
+	/*
+	 * Resize the stacked overlay to 4k so that we have room to operate on
+	 *
+	 * (and relocate it since the memory might be mapped
+	 * read-only)
+	 */
+	ut_assertok(fdt_open_into(fdt_overlay_stacked, fdt_overlay_stacked_copy,
+				  FDT_COPY_SIZE));
+
 	/* Apply the overlay */
 	ut_assertok(fdt_overlay_apply(fdt_base_copy, fdt_overlay_copy));
 
+	/* Apply the stacked overlay */
+	ut_assertok(fdt_overlay_apply(fdt_base_copy, fdt_overlay_stacked_copy));
+
 	if (argc == 1)
 		printf("Running %d environment tests\n", n_ents);
 
@@ -263,6 +294,7 @@ int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	printf("Failures: %d\n", uts->fail_count);
 
+	free(fdt_overlay_stacked_copy);
 	free(fdt_overlay_copy);
 	free(fdt_base_copy);
 	free(uts);
diff --git a/test/overlay/test-fdt-overlay-stacked.dts b/test/overlay/test-fdt-overlay-stacked.dts
new file mode 100644
index 0000000000..9fb7c7b017
--- /dev/null
+++ b/test/overlay/test-fdt-overlay-stacked.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright (c) 2016 NextThing Co
+ * Copyright (c) 2016 Free Electrons
+ * Copyright (c) 2018 Konsulko Group
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	/* Test that we can reference an overlay symbol */
+	fragment@0 {
+		target = <&local>;
+
+		__overlay__ {
+			stacked-test-int-property = <43>;
+		};
+	};
+};

commit ea99241c37dc21e8188c89a68cd74c3d311e85bb
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:22 2017 +0300

    UPSTREAM: ut: fix fdt_getprop_u32() change
    
    fdt_getprop_u32 is not exported and it's different than what the
    unit test uses. Rename u32 prop access methods to something that's
    unit test specific.
    
    Change-Id: I0256118c7ae7b6709c4ef0791c53093e3117f23e
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 706708d3b2e7ade443836e7a14802a5a63b59713)

diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index cbef720b4c..7106f42a62 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -21,7 +21,7 @@
 extern u32 __dtb_test_fdt_base_begin;
 extern u32 __dtb_test_fdt_overlay_begin;
 
-static int fdt_getprop_u32_by_index(void *fdt, const char *path,
+static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path,
 				    const char *name, int index,
 				    u32 *out)
 {
@@ -42,10 +42,10 @@ static int fdt_getprop_u32_by_index(void *fdt, const char *path,
 	return 0;
 }
 
-static int fdt_getprop_u32(void *fdt, const char *path, const char *name,
+static int ut_fdt_getprop_u32(void *fdt, const char *path, const char *name,
 			   u32 *out)
 {
-	return fdt_getprop_u32_by_index(fdt, path, name, 0, out);
+	return ut_fdt_getprop_u32_by_index(fdt, path, name, 0, out);
 }
 
 static int fdt_getprop_str(void *fdt, const char *path, const char *name,
@@ -68,7 +68,7 @@ static int fdt_overlay_change_int_property(struct unit_test_state *uts)
 	void *fdt = uts->priv;
 	u32 val = 0;
 
-	ut_assertok(fdt_getprop_u32(fdt, "/test-node", "test-int-property",
+	ut_assertok(ut_fdt_getprop_u32(fdt, "/test-node", "test-int-property",
 				    &val));
 	ut_asserteq(43, val);
 
@@ -158,11 +158,11 @@ static int fdt_overlay_local_phandle(struct unit_test_state *uts)
 	local_phandle = fdt_get_phandle(fdt, off);
 	ut_assert(local_phandle);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
 					     0, &val));
 	ut_asserteq(local_phandle, val);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle",
 					     1, &val));
 	ut_asserteq(local_phandle, val);
 
@@ -189,11 +189,11 @@ static int fdt_overlay_local_phandles(struct unit_test_state *uts)
 	test_phandle = fdt_get_phandle(fdt, off);
 	ut_assert(test_phandle);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0,
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0,
 					     &val));
 	ut_asserteq(test_phandle, val);
 
-	ut_assertok(fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1,
+	ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1,
 					     &val));
 	ut_asserteq(local_phandle, val);
 

commit 0608812d5b0a7a6d298018a52df60fa474e9267b
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:21 2017 +0300

    UPSTREAM: config: sandbox: Add unit tests
    
    Add unit tests for sandbox default config.
    
    Change-Id: Icf7b645fd561eca1f702a42f2b0b72dd1bb38722
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 1e9c4393fd0bc70b53d8159591043732acfb2bf3)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index e7a61bd61a..72600afea8 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -190,7 +190,9 @@ CONFIG_CMD_DHRYSTONE=y
 CONFIG_TPM=y
 CONFIG_LZ4=y
 CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_UNIT_TEST=y
 CONFIG_UT_TIME=y
 CONFIG_UT_DM=y
 CONFIG_UT_ENV=y
+CONFIG_UT_OVERLAY=y

commit 6a53d8fa9f52c61d08f4f19448d8a0287aaced91
Author: Franklin S Cooper Jr <fcooper@ti.com>
Date:   Mon Sep 4 23:12:19 2017 +0300

    UPSTREAM: doc: overlays: Tweak documentation regarding overlays
    
    Pull some information regarding overlays from commit messages and
    put them directly within the documentation. Also add some information
    regarding required dtc version to properly use overlays.
    
    Change-Id: Idccfd1db39dd27a19415f05738e65ca43413cb25
    Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 56fc7032e1771882a086e8283586fc7c733ba6bd)

diff --git a/doc/README.fdt-overlays b/doc/README.fdt-overlays
index ee868eca36..39139cb850 100644
--- a/doc/README.fdt-overlays
+++ b/doc/README.fdt-overlays
@@ -1,9 +1,76 @@
-U-Boot FDT Overlay usage (without FIT images)
+U-Boot FDT Overlay usage
 =============================================
 
-FDT overlays are now available for use even without FIT images.
-It is not as automagic as with FIT images though and require a few
-manual steps.
+Overlays Syntax
+---------------
+
+Overlays require slightly different syntax compared to traditional overlays.
+Please refer to dt-object-internal.txt in the dtc sources for information
+regarding the internal format of overlays:
+https://git.kernel.org/pub/scm/utils/dtc/dtc.git/tree/Documentation/dt-object-internal.txt
+
+Building Overlays
+-----------------
+
+In a nutshell overlays provides a means to manipulate a symbol a previous dtb
+or overlay has defined. It requires both the base and all the overlays
+to be compiled with the -@ command line switch so that symbol information is
+included.
+
+Note support for -@ option can only be found in dtc version 1.4.4 or newer.
+Only version 4.14 or higher of the Linux kernel includes a built in version
+of dtc that meets this requirement.
+
+Building an overlay follows the same process as building a traditional dtb.
+
+For example:
+
+base.dts
+--------
+
+	/dts-v1/;
+	/ {
+		foo: foonode {
+			foo-property;
+		};
+	};
+
+	$ dtc -@ -I dts -O dtb -o base.dtb base.dts
+
+bar.dts
+-------
+
+	/dts-v1/;
+	/plugin/;
+	/ {
+		fragment@1 {
+			target = <&foo>;
+			__overlay__ {
+				overlay-1-property;
+				bar: barnode {
+					bar-property;
+				};
+			};
+		};
+	};
+
+	$ dtc -@ -I dts -O dtb -o bar.dtb bar.dts
+
+Ways to Utilize Overlays in U-boot
+----------------------------------
+
+There are two ways to apply overlays in U-boot.
+1. Include and define overlays within a FIT image and have overlays
+   automatically applied.
+
+2. Manually load and apply overlays
+
+The remainder of this document will discuss using overlays via the manual
+approach. For information on using overlays as part of a FIT image please see:
+doc/uImage.FIT/overlay-fdt-boot.txt
+
+Manually Loading and Applying Overlays
+--------------------------------------
 
 1. Figure out where to place both the base device tree blob and the
 overlay. Make sure you have enough space to grow the base tree without
@@ -29,6 +96,16 @@ overlapping anything.
 
 => fdt apply $fdtovaddr
 
+6. Boot system like you would do with a traditional dtb.
+
+For bootm:
+
+=> bootm ${kerneladdr} - ${fdtaddr}
+
+For bootz:
+
+=> bootz ${kerneladdr} - ${fdtaddr}
+
 Please note that in case of an error, both the base and overlays are going
 to be invalidated, so keep copies to avoid reloading.
 
diff --git a/doc/uImage.FIT/overlay-fdt-boot.txt b/doc/uImage.FIT/overlay-fdt-boot.txt
index dbdf2a1ce9..63e47da2a9 100644
--- a/doc/uImage.FIT/overlay-fdt-boot.txt
+++ b/doc/uImage.FIT/overlay-fdt-boot.txt
@@ -1,5 +1,5 @@
-U-Boot FDT Overlay usage
-========================
+U-Boot FDT Overlay FIT usage
+============================
 
 Introduction
 ------------
@@ -8,6 +8,10 @@ of similar boards and their expansion options. The same kernel on DT enabled
 platforms can support this easily enough by providing a DT blob upon boot
 that matches the desired configuration.
 
+This document focuses on specifically using overlays as part of a FIT image.
+General information regarding overlays including its syntax and building it
+can be found in doc/README.fdt-overlays
+
 Configuration without overlays
 ------------------------------
 

commit b8631b11ec8643dabd94eae4997742f2db322488
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:20 2017 +0300

    UPSTREAM: dtbo: make dtbos special
    
    Special rule for dtbo generation
    
    Change-Id: Iac5a5054f43bd732b4278c14ed2fbf3044bf2c28
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit da0b3a946f1a5135297b92e5a18ff97ab10145d6)

diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 9ce47b4d22..2a7ed70cf2 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -321,6 +321,23 @@ $(obj)/%.dtb: $(src)/%.dts FORCE
 
 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
 
+# DTCO
+# ---------------------------------------------------------------------------
+
+quiet_cmd_dtco = DTCO    $@
+# Rule for objects only; does not put specific u-boot include at the end
+# No generation of assembly file either
+# Modified for U-Boot
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
+	$(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \
+	$(DTC) -@ -O dtb -o $@ -b 0 \
+		-i $(dir $<) $(DTC_FLAGS) \
+		-d $(depfile).dtc.tmp $(dtc-tmp) ; \
+	cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
+
+$(obj)/%.dtbo: $(src)/%.dts FORCE
+	$(call if_changed_dep,dtco)
+
 # Fonts
 # ---------------------------------------------------------------------------
 

commit 994d9d06da2f0237dbf9b03801e11a1250fdebe6
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:18 2017 +0300

    UPSTREAM: doc: Document how to apply fdt overlays
    
    We have the capability to apply overlays on the command line but
    we didn't have a document explaining how.
    
    Change-Id: Idec1c3eac1ef3b52f4329d2ce9bffdd8b9aac32b
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Reviewed-by: Łukasz Majewski
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d80162cfc559491dee3009b120e7268e9388302f)

diff --git a/doc/README.fdt-overlays b/doc/README.fdt-overlays
new file mode 100644
index 0000000000..ee868eca36
--- /dev/null
+++ b/doc/README.fdt-overlays
@@ -0,0 +1,37 @@
+U-Boot FDT Overlay usage (without FIT images)
+=============================================
+
+FDT overlays are now available for use even without FIT images.
+It is not as automagic as with FIT images though and require a few
+manual steps.
+
+1. Figure out where to place both the base device tree blob and the
+overlay. Make sure you have enough space to grow the base tree without
+overlapping anything.
+
+=> setenv fdtaddr 0x87f00000
+=> setenv fdtovaddr 0x87fc0000
+
+2. Load the base blob and overlay blobs
+
+=> load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/base.dtb
+=> load ${devtype} ${bootpart} ${fdtovaddr} ${bootdir}/overlay.dtb
+
+3. Set it as the working fdt tree.
+
+=> fdtaddr $fdtaddr
+
+4. Grow it enough so it can 'fit' all the applied overlays
+
+=> fdt resize 8192
+
+5. You are now ready to apply the overlay.
+
+=> fdt apply $fdtovaddr
+
+Please note that in case of an error, both the base and overlays are going
+to be invalidated, so keep copies to avoid reloading.
+
+Pantelis Antoniou
+pantelis.antoniou@konsulko.com
+11/7/2017

commit a116ed492986001ce939044ee9fb84ae5af2d768
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:17 2017 +0300

    UPSTREAM: fit: fdt overlays doc
    
    Change-Id: I69e26ac5683578d8a3333e33e94b65556af479bb
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Reviewed-by: Łukasz Majewski
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6b54e50b5a5889efe179cb06aa6aa25583ef25d5)

diff --git a/doc/uImage.FIT/command_syntax_extensions.txt b/doc/uImage.FIT/command_syntax_extensions.txt
index 6c99b1c159..676f992f90 100644
--- a/doc/uImage.FIT/command_syntax_extensions.txt
+++ b/doc/uImage.FIT/command_syntax_extensions.txt
@@ -36,7 +36,7 @@ Old uImage:
 New uImage:
 8.  bootm <addr1>
 9.  bootm [<addr1>]:<subimg1>
-10. bootm [<addr1>]#<conf>
+10. bootm [<addr1>]#<conf>[#<extra-conf[#...]]
 11. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2>
 12. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> [<addr3>]:<subimg3>
 13. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> <addr3>
@@ -129,6 +129,12 @@ following syntax:
 - new uImage configuration specification
 <addr>#<configuration unit_name>
 
+- new uImage configuration specification with extra configuration components
+<addr>#<configuration unit_name>[#<extra configuration unit_name>[#..]]
+
+The extra configuration currently is supported only for additional device tree
+overlays to apply on the base device tree supplied by the first configuration
+unit.
 
 Examples:
 
@@ -138,6 +144,10 @@ bootm 200000:kernel@1
 - boot configuration "cfg@1" from a new uImage located at 200000:
 bootm 200000#cfg@1
 
+- boot configuration "cfg@1" with extra "cfg@2" from a new uImage located
+  at 200000:
+bootm 200000#cfg@1#cfg@2
+
 - boot "kernel@1" from a new uImage at 200000 with initrd "ramdisk@2" found in
   some other new uImage stored at address 800000:
 bootm 200000:kernel@1 800000:ramdisk@2
diff --git a/doc/uImage.FIT/overlay-fdt-boot.txt b/doc/uImage.FIT/overlay-fdt-boot.txt
new file mode 100644
index 0000000000..dbdf2a1ce9
--- /dev/null
+++ b/doc/uImage.FIT/overlay-fdt-boot.txt
@@ -0,0 +1,221 @@
+U-Boot FDT Overlay usage
+========================
+
+Introduction
+------------
+In many cases it is desirable to have a single FIT image support a multitude
+of similar boards and their expansion options. The same kernel on DT enabled
+platforms can support this easily enough by providing a DT blob upon boot
+that matches the desired configuration.
+
+Configuration without overlays
+------------------------------
+
+Take a hypothetical board named 'foo' where there are different supported
+revisions, reva and revb. Assume that both board revisions can use add a bar
+add-on board, while only the revb board can use a baz add-on board.
+
+Without using overlays the configuration would be as follows for every case.
+
+	/dts-v1/;
+	/ {
+		images {
+			kernel@1 {
+				data = /incbin/("./zImage");
+				type = "kernel";
+				arch = "arm";
+				os = "linux";
+				load = <0x82000000>;
+				entry = <0x82000000>;
+			};
+			fdt@1 {
+				data = /incbin/("./foo-reva.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@2 {
+				data = /incbin/("./foo-revb.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@3 {
+				data = /incbin/("./foo-reva-bar.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@4 {
+				data = /incbin/("./foo-revb-bar.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@5 {
+				data = /incbin/("./foo-revb-baz.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+			fdt@6 {
+				data = /incbin/("./foo-revb-bar-baz.dtb");
+				type = "flat_dt";
+				arch = "arm";
+			};
+		};
+
+		configurations {
+			default = "foo-reva.dtb;
+			foo-reva.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1";
+			};
+			foo-revb.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@2";
+			};
+			foo-reva-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@3";
+			};
+			foo-revb-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@4";
+			};
+			foo-revb-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@5";
+			};
+			foo-revb-bar-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@6";
+			};
+		};
+	};
+
+Note the blob needs to be compiled for each case and the combinatorial explosion of
+configurations. A typical device tree blob is in the low hunderds of kbytes so a
+multitude of configuration grows the image quite a bit.
+
+Booting this image is done by using
+
+	# bootm <addr>#<config>
+
+Where config is one of:
+	foo-reva.dtb, foo-revb.dtb, foo-reva-bar.dtb, foo-revb-bar.dtb,
+	foo-revb-baz.dtb, foo-revb-bar-baz.dtb
+
+This selects the DTB to use when booting.
+
+Configuration using overlays
+----------------------------
+
+Device tree overlays can be applied to a base DT and result in the same blob
+being passed to the booting kernel. This saves on space and avoid the combinatorial
+explosion problem.
+
+	/dts-v1/;
+	/ {
+		images {
+			kernel@1 {
+				data = /incbin/("./zImage");
+				type = "kernel";
+				arch = "arm";
+				os = "linux";
+				load = <0x82000000>;
+				entry = <0x82000000>;
+			};
+			fdt@1 {
+				data = /incbin/("./foo.dtb");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87f00000>;
+			};
+			fdt@2 {
+				data = /incbin/("./reva.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+			fdt@3 {
+				data = /incbin/("./revb.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+			fdt@4 {
+				data = /incbin/("./bar.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+			fdt@5 {
+				data = /incbin/("./baz.dtbo");
+				type = "flat_dt";
+				arch = "arm";
+				load = <0x87fc0000>;
+			};
+		};
+
+		configurations {
+			default = "foo-reva.dtb;
+			foo-reva.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@2";
+			};
+			foo-revb.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3";
+			};
+			foo-reva-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@2", "fdt@4";
+			};
+			foo-revb-bar.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3", "fdt@4";
+			};
+			foo-revb-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3", "fdt@5";
+			};
+			foo-revb-bar-baz.dtb {
+				kernel = "kernel@1";
+				fdt = "fdt@1", "fdt@3", "fdt@4", "fdt@5";
+			};
+			bar {
+				fdt = "fdt@4";
+			};
+			baz {
+				fdt = "fdt@5";
+			};
+		};
+	};
+
+Booting this image is exactly the same as the non-overlay example.
+u-boot will retrieve the base blob and apply the overlays in sequence as
+they are declared in the configuration.
+
+Note the minimum amount of different DT blobs, as well as the requirement for
+the DT blobs to have a load address; the overlay application requires the blobs
+to be writeable.
+
+Configuration using overlays and feature selection
+--------------------------------------------------
+
+Although the configuration in the previous section works is a bit inflexible
+since it requires all possible configuration options to be laid out before
+hand in the FIT image. For the add-on boards the extra config selection method
+might make sense.
+
+Note the two bar & baz configuration nodes. To boot a reva board with
+the bar add-on board enabled simply use:
+
+	# bootm <addr>#foo-reva.dtb#bar
+
+While booting a revb with bar and baz is as follows:
+
+	# bootm <addr>#foo-revb.dtb#bar#baz
+
+The limitation for a feature selection configuration node is that a single
+fdt option is currently supported.
+
+Pantelis Antoniou
+pantelis.antoniou@konsulko.com
+12/6/2017
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt
index 32825eda8d..6f727a1e8a 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -235,7 +235,7 @@ o config@1
   |- description = "configuration description"
   |- kernel = "kernel sub-node unit name"
   |- ramdisk = "ramdisk sub-node unit name"
-  |- fdt = "fdt sub-node unit-name"
+  |- fdt = "fdt sub-node unit-name" [, "fdt overlay sub-node unit-name", ...]
   |- fpga = "fpga sub-node unit-name"
   |- loadables = "loadables sub-node unit-name"
 
@@ -249,7 +249,9 @@ o config@1
   - ramdisk : Unit name of the corresponding ramdisk image (component image
     node of a "ramdisk" type).
   - fdt : Unit name of the corresponding fdt blob (component image node of a
-    "fdt type").
+    "fdt type"). Additional fdt overlay nodes can be supplied which signify
+    that the resulting device tree blob is generated by the first base fdt
+    blob with all subsequent overlays applied.
   - setup : Unit name of the corresponding setup binary (used for booting
     an x86 kernel). This contains the setup.bin file built by the kernel.
   - fpga : Unit name of the corresponding fpga bitstream blob

commit 988a4042e64cd509bacc443ec0df332993a351eb
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:16 2017 +0300

    UPSTREAM: fit: Introduce methods for applying overlays on fit-load
    
    Introduce an overlay based method for constructing a base DT blob
    to pass to the kernel.
    
    It is based on a specific method now to get the FDT from a FIT image
    named boot_get_fdt_fit().
    
    Change-Id: I98e0526edd594e63b1c29bdd916e4c66774f4337
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 169043d826e6b0db3c67a60acbedfc72c43aae5d)

diff --git a/common/image-fdt.c b/common/image-fdt.c
index da4d007081..a2ef409836 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -356,17 +356,16 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
 			if (fit_check_format(buf)) {
 				ulong load, len;
 
-				fdt_noffset = fit_image_load(images,
+				fdt_noffset = boot_get_fdt_fit(images,
 					fdt_addr, &fit_uname_fdt,
 					&fit_uname_config,
-					arch, IH_TYPE_FLATDT,
-					BOOTSTAGE_ID_FIT_FDT_START,
-					FIT_LOAD_OPTIONAL, &load, &len);
+					arch, &load, &len);
 
 				images->fit_hdr_fdt = map_sysmem(fdt_addr, 0);
 				images->fit_uname_fdt = fit_uname_fdt;
 				images->fit_noffset_fdt = fdt_noffset;
 				fdt_addr = load;
+
 				break;
 			} else
 #endif
diff --git a/common/image-fit.c b/common/image-fit.c
index e75cb649a4..7f17fd1410 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -19,6 +19,7 @@
 #include <errno.h>
 #include <mapmem.h>
 #include <asm/io.h>
+#include <malloc.h>
 DECLARE_GLOBAL_DATA_PTR;
 #endif /* !USE_HOSTCC*/
 
@@ -434,6 +435,10 @@ void fit_image_print(const void *fit, int image_noffset, const char *p)
 			printf("0x%08lx\n", load);
 	}
 
+	/* optional load address for FDT */
+	if (type == IH_TYPE_FLATDT && !fit_image_get_load(fit, image_noffset, &load))
+		printf("%s  Load Address: 0x%08lx\n", p, load);
+
 	if ((type == IH_TYPE_KERNEL) || (type == IH_TYPE_STANDALONE) ||
 	    (type == IH_TYPE_RAMDISK)) {
 		ret = fit_image_get_entry(fit, image_noffset, &entry);
@@ -1454,6 +1459,8 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
 {
 	int noffset, confs_noffset;
 	int len;
+	const char *s;
+	char *conf_uname_copy = NULL;
 
 	confs_noffset = fdt_path_offset(fit, FIT_CONFS_PATH);
 	if (confs_noffset < 0) {
@@ -1475,12 +1482,29 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
 		debug("Found default configuration: '%s'\n", conf_uname);
 	}
 
+	s = strchr(conf_uname, '#');
+	if (s) {
+		len = s - conf_uname;
+		conf_uname_copy = malloc(len + 1);
+		if (!conf_uname_copy) {
+			debug("Can't allocate uname copy: '%s'\n",
+					conf_uname);
+			return -ENOMEM;
+		}
+		memcpy(conf_uname_copy, conf_uname, len);
+		conf_uname_copy[len] = '\0';
+		conf_uname = conf_uname_copy;
+	}
+
 	noffset = fdt_subnode_offset(fit, confs_noffset, conf_uname);
 	if (noffset < 0) {
 		debug("Can't get node offset for configuration unit name: '%s' (%s)\n",
 		      conf_uname, fdt_strerror(noffset));
 	}
 
+	if (conf_uname_copy)
+		free(conf_uname_copy);
+
 	return noffset;
 }
 
@@ -1527,7 +1551,7 @@ void fit_conf_print(const void *fit, int noffset, const char *p)
 	char *desc;
 	const char *uname;
 	int ret;
-	int loadables_index;
+	int fdt_index, loadables_index;
 
 	/* Mandatory properties */
 	ret = fit_get_desc(fit, noffset, &desc);
@@ -1549,9 +1573,17 @@ void fit_conf_print(const void *fit, int noffset, const char *p)
 	if (uname)
 		printf("%s  Init Ramdisk: %s\n", p, uname);
 
-	uname = fdt_getprop(fit, noffset, FIT_FDT_PROP, NULL);
-	if (uname)
-		printf("%s  FDT:          %s\n", p, uname);
+	for (fdt_index = 0;
+	     uname = fdt_stringlist_get(fit, noffset, FIT_FDT_PROP,
+					fdt_index, NULL), uname;
+	     fdt_index++) {
+
+		if (fdt_index == 0)
+			printf("%s  FDT:          ", p);
+		else
+			printf("%s                ", p);
+		printf("%s\n", uname);
+	}
 
 	uname = fdt_getprop(fit, noffset, FIT_FPGA_PROP, NULL);
 	if (uname)
@@ -1888,3 +1920,144 @@ int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,
 
 	return ret;
 }
+
+#ifndef USE_HOSTCC
+int boot_get_fdt_fit(bootm_headers_t *images, ulong addr,
+		   const char **fit_unamep, const char **fit_uname_configp,
+		   int arch, ulong *datap, ulong *lenp)
+{
+	int fdt_noffset, cfg_noffset, count;
+	const void *fit;
+	const char *fit_uname = NULL;
+	const char *fit_uname_config = NULL;
+	char *fit_uname_config_copy = NULL;
+	char *next_config = NULL;
+	ulong load, len;
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+	ulong image_start, image_end;
+	ulong ovload, ovlen;
+	const char *uconfig;
+	const char *uname;
+	void *base, *ov;
+	int i, err, noffset, ov_noffset;
+#endif
+
+	fit_uname = fit_unamep ? *fit_unamep : NULL;
+
+	if (fit_uname_configp && *fit_uname_configp) {
+		fit_uname_config_copy = strdup(*fit_uname_configp);
+		if (!fit_uname_config_copy)
+			return -ENOMEM;
+
+		next_config = strchr(fit_uname_config_copy, '#');
+		if (next_config)
+			*next_config++ = '\0';
+		if (next_config - 1 > fit_uname_config_copy)
+			fit_uname_config = fit_uname_config_copy;
+	}
+
+	fdt_noffset = fit_image_load(images,
+		addr, &fit_uname, &fit_uname_config,
+		arch, IH_TYPE_FLATDT,
+		BOOTSTAGE_ID_FIT_FDT_START,
+		FIT_LOAD_OPTIONAL, &load, &len);
+
+	if (fdt_noffset < 0)
+		goto out;
+
+	debug("fit_uname=%s, fit_uname_config=%s\n",
+			fit_uname ? fit_uname : "<NULL>",
+			fit_uname_config ? fit_uname_config : "<NULL>");
+
+	fit = map_sysmem(addr, 0);
+
+	cfg_noffset = fit_conf_get_node(fit, fit_uname_config);
+
+	/* single blob, or error just return as well */
+	count = fit_conf_get_prop_node_count(fit, cfg_noffset, FIT_FDT_PROP);
+	if (count <= 1 && !next_config)
+		goto out;
+
+	/* we need to apply overlays */
+
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+	image_start = addr;
+	image_end = addr + fit_get_size(fit);
+	/* verify that relocation took place by load address not being in fit */
+	if (load >= image_start && load < image_end) {
+		/* check is simplified; fit load checks for overlaps */
+		printf("Overlayed FDT requires relocation\n");
+		fdt_noffset = -EBADF;
+		goto out;
+	}
+
+	base = map_sysmem(load, len);
+
+	/* apply extra configs in FIT first, followed by args */
+	for (i = 1; ; i++) {
+		if (i < count) {
+			noffset = fit_conf_get_prop_node_index(fit, cfg_noffset,
+							       FIT_FDT_PROP, i);
+			uname = fit_get_name(fit, noffset, NULL);
+			uconfig = NULL;
+		} else {
+			if (!next_config)
+				break;
+			uconfig = next_config;
+			next_config = strchr(next_config, '#');
+			if (next_config)
+				*next_config++ = '\0';
+			uname = NULL;
+		}
+
+		debug("%d: using uname=%s uconfig=%s\n", i, uname, uconfig);
+
+		ov_noffset = fit_image_load(images,
+			addr, &uname, &uconfig,
+			arch, IH_TYPE_FLATDT,
+			BOOTSTAGE_ID_FIT_FDT_START,
+			FIT_LOAD_REQUIRED, &ovload, &ovlen);
+		if (ov_noffset < 0) {
+			printf("load of %s failed\n", uname);
+			continue;
+		}
+		debug("%s loaded at 0x%08lx len=0x%08lx\n",
+				uname, ovload, ovlen);
+		ov = map_sysmem(ovload, ovlen);
+
+		base = map_sysmem(load, len + ovlen);
+		err = fdt_open_into(base, base, len + ovlen);
+		if (err < 0) {
+			printf("failed on fdt_open_into\n");
+			fdt_noffset = err;
+			goto out;
+		}
+		/* the verbose method prints out messages on error */
+		err = fdt_overlay_apply_verbose(base, ov);
+		if (err < 0) {
+			fdt_noffset = err;
+			goto out;
+		}
+		fdt_pack(base);
+		len = fdt_totalsize(base);
+	}
+#else
+	printf("config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set\n");
+	fdt_noffset = -EBADF;
+#endif
+
+out:
+	if (datap)
+		*datap = load;
+	if (lenp)
+		*lenp = len;
+	if (fit_unamep)
+		*fit_unamep = fit_uname;
+	if (fit_uname_configp)
+		*fit_uname_configp = fit_uname_config;
+
+	if (fit_uname_config_copy)
+		free(fit_uname_config_copy);
+	return fdt_noffset;
+}
+#endif
diff --git a/include/image.h b/include/image.h
index e74bd8286b..b16a34cd6a 100644
--- a/include/image.h
+++ b/include/image.h
@@ -594,6 +594,31 @@ int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
 int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,
 		       ulong *setup_start, ulong *setup_len);
 
+/**
+ * boot_get_fdt_fit() - load a DTB from a FIT file (applying overlays)
+ *
+ * This deals with all aspects of loading an DTB from a FIT.
+ * The correct base image based on configuration will be selected, and
+ * then any overlays specified will be applied (as present in fit_uname_configp).
+ *
+ * @param images	Boot images structure
+ * @param addr		Address of FIT in memory
+ * @param fit_unamep	On entry this is the requested image name
+ *			(e.g. "kernel@1") or NULL to use the default. On exit
+ *			points to the selected image name
+ * @param fit_uname_configp	On entry this is the requested configuration
+ *			name (e.g. "conf@1") or NULL to use the default. On
+ *			exit points to the selected configuration name.
+ * @param arch		Expected architecture (IH_ARCH_...)
+ * @param datap		Returns address of loaded image
+ * @param lenp		Returns length of loaded image
+ *
+ * @return node offset of base image, or -ve error code on error
+ */
+int boot_get_fdt_fit(bootm_headers_t *images, ulong addr,
+		   const char **fit_unamep, const char **fit_uname_configp,
+		   int arch, ulong *datap, ulong *lenp);
+
 /**
  * fit_image_load() - load an image from a FIT
  *

commit 06686a7b4c59a330482f9234485c7b126caf539d
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:15 2017 +0300

    UPSTREAM: fit: Do not throw away extra configuration on fit_image_load()
    
    fit_image_load() threw away the extra configuration parts when
    loading. We need them around for applying extra overlays for
    building the boot fdt.
    
    Change-Id: Icad7d35f5efb4ebb16a2dba969a9228674d7fb39
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7c3dc776b91a683b2f7dd40ed91361124a3a91c0)

diff --git a/common/image-fit.c b/common/image-fit.c
index 74e555754c..e75cb649a4 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1653,6 +1653,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	int cfg_noffset, noffset;
 	const char *fit_uname;
 	const char *fit_uname_config;
+	const char *fit_base_uname_config;
 	const void *fit;
 	const void *buf;
 	size_t size;
@@ -1668,6 +1669,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	fit = map_sysmem(addr, 0);
 	fit_uname = fit_unamep ? *fit_unamep : NULL;
 	fit_uname_config = fit_uname_configp ? *fit_uname_configp : NULL;
+	fit_base_uname_config = NULL;
 	prop_name = fit_get_image_type_property(image_type);
 	printf("## Loading %s from FIT Image at %08lx ...\n", prop_name, addr);
 
@@ -1701,11 +1703,11 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 					BOOTSTAGE_SUB_NO_UNIT_NAME);
 			return -ENOENT;
 		}
-		fit_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
-		printf("   Using '%s' configuration\n", fit_uname_config);
+		fit_base_uname_config = fdt_get_name(fit, cfg_noffset, NULL);
+		printf("   Using '%s' configuration\n", fit_base_uname_config);
 		if (image_type == IH_TYPE_KERNEL) {
 			/* Remember (and possibly verify) this config */
-			images->fit_uname_cfg = fit_uname_config;
+			images->fit_uname_cfg = fit_base_uname_config;
 			if (IMAGE_ENABLE_VERIFY && images->verify) {
 				puts("   Verifying Hash Integrity ... ");
 				if (fit_config_verify(fit, cfg_noffset)) {
@@ -1861,7 +1863,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
 	if (fit_unamep)
 		*fit_unamep = (char *)fit_uname;
 	if (fit_uname_configp)
-		*fit_uname_configp = (char *)fit_uname_config;
+		*fit_uname_configp = (char *)(fit_uname_config ? :
+					      fit_base_uname_config);
 
 	return noffset;
 }

commit 75488a387b887ab514e3b76957579ef4d1d36f3d
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:14 2017 +0300

    UPSTREAM: fit: Allow multiple images per property
    
    As part of the fdt overlay support which need it, allow
    a list of configurations per property.
    
    Change-Id: I3068dcdd2bd823fd2ee5cfa0d337c4589e2a9588
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ad026adbcf0d719e736eb58a9059cbbebb2d2423)

diff --git a/common/image-fit.c b/common/image-fit.c
index 109ecfaacc..74e555754c 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1484,20 +1484,32 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
 	return noffset;
 }
 
-int fit_conf_get_prop_node(const void *fit, int noffset,
+int fit_conf_get_prop_node_count(const void *fit, int noffset,
 		const char *prop_name)
 {
-	char *uname;
+	return fdt_stringlist_count(fit, noffset, prop_name);
+}
+
+int fit_conf_get_prop_node_index(const void *fit, int noffset,
+		const char *prop_name, int index)
+{
+	const char *uname;
 	int len;
 
 	/* get kernel image unit name from configuration kernel property */
-	uname = (char *)fdt_getprop(fit, noffset, prop_name, &len);
+	uname = fdt_stringlist_get(fit, noffset, prop_name, index, &len);
 	if (uname == NULL)
 		return len;
 
 	return fit_image_get_node(fit, uname);
 }
 
+int fit_conf_get_prop_node(const void *fit, int noffset,
+		const char *prop_name)
+{
+	return fit_conf_get_prop_node_index(fit, noffset, prop_name, 0);
+}
+
 /**
  * fit_conf_print - prints out the FIT configuration details
  * @fit: pointer to the FIT format image header

commit d80212386f8fa0edf9cf0aebe22210430f4d34f8
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:13 2017 +0300

    UPSTREAM: fdt: Allow stacked overlays phandle references
    
    This patch enables an overlay to refer to a previous overlay's
    labels by performing a merge of symbol information at application
    time.
    
    In a nutshell it allows an overlay to refer to a symbol that a previous
    overlay has defined. It requires both the base and all the overlays
    to be compiled with the -@ command line switch so that symbol
    information is included.
    
    base.dts
    --------
    
            /dts-v1/;
            / {
                    foo: foonode {
                            foo-property;
                    };
            };
    
            $ dtc -@ -I dts -O dtb -o base.dtb base.dts
    
    bar.dts
    -------
    
            /dts-v1/;
            /plugin/;
            / {
                    fragment@1 {
                            target = <&foo>;
                            __overlay__ {
                                    overlay-1-property;
                                    bar: barnode {
                                            bar-property;
                                    };
                            };
                    };
            };
    
            $ dtc -@ -I dts -O dtb -o bar.dtb bar.dts
    
    baz.dts
    -------
    
            /dts-v1/;
            /plugin/;
            / {
                    fragment@1 {
                            target = <&bar>;
                            __overlay__ {
                                    overlay-2-property;
                                    baz: baznode {
                                            baz-property;
                                    };
                            };
                    };
            };
    
            $ dtc -@ -I dts -O dtb -o baz.dtb baz.dts
    
    Applying the overlays:
    
            $ fdtoverlay -i base.dtb -o target.dtb bar.dtb baz.dtb
    
    Dumping:
    
            $ fdtdump target.dtb
            / {
                foonode {
                    overlay-1-property;
                    foo-property;
                    linux,phandle = <0x00000001>;
                    phandle = <0x00000001>;
                    barnode {
                        overlay-2-property;
                        phandle = <0x00000002>;
                        linux,phandle = <0x00000002>;
                        bar-property;
                        baznode {
                            phandle = <0x00000003>;
                            linux,phandle = <0x00000003>;
                            baz-property;
                        };
                    };
                };
                __symbols__ {
                    baz = "/foonode/barnode/baznode";
                    bar = "/foonode/barnode";
                    foo = "/foonode";
                };
            };
    
    Change-Id: If72870ec3e9260ccd4fbcbaff27ba035d001bd00
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit f00c36a01e774dea1ed2a1171da9e372610ee8eb)

diff --git a/lib/libfdt/fdt_overlay.c b/lib/libfdt/fdt_overlay.c
index ceb968786e..bd81241e66 100644
--- a/lib/libfdt/fdt_overlay.c
+++ b/lib/libfdt/fdt_overlay.c
@@ -39,6 +39,7 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
  * @fdt: Base device tree blob
  * @fdto: Device tree overlay blob
  * @fragment: node offset of the fragment in the overlay
+ * @pathp: pointer which receives the path of the target (or NULL)
  *
  * overlay_get_target() retrieves the target offset in the base
  * device tree of a fragment, no matter how the actual targetting is
@@ -49,37 +50,47 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment)
  *      Negative error code on error
  */
 static int overlay_get_target(const void *fdt, const void *fdto,
-			      int fragment)
+			      int fragment, char const **pathp)
 {
 	uint32_t phandle;
-	const char *path;
-	int path_len;
+	const char *path = NULL;
+	int path_len = 0, ret;
 
 	/* Try first to do a phandle based lookup */
 	phandle = overlay_get_target_phandle(fdto, fragment);
 	if (phandle == (uint32_t)-1)
 		return -FDT_ERR_BADPHANDLE;
 
-	if (phandle)
-		return fdt_node_offset_by_phandle(fdt, phandle);
+	/* no phandle, try path */
+	if (!phandle) {
+		/* And then a path based lookup */
+		path = fdt_getprop(fdto, fragment, "target-path", &path_len);
+		if (path)
+			ret = fdt_path_offset(fdt, path);
+		else
+			ret = path_len;
+	} else
+		ret = fdt_node_offset_by_phandle(fdt, phandle);
 
-	/* And then a path based lookup */
-	path = fdt_getprop(fdto, fragment, "target-path", &path_len);
-	if (!path) {
-		/*
-		 * If we haven't found either a target or a
-		 * target-path property in a node that contains a
-		 * __overlay__ subnode (we wouldn't be called
-		 * otherwise), consider it a improperly written
-		 * overlay
-		 */
-		if (path_len == -FDT_ERR_NOTFOUND)
-			return -FDT_ERR_BADOVERLAY;
+	/*
+	* If we haven't found either a target or a
+	* target-path property in a node that contains a
+	* __overlay__ subnode (we wouldn't be called
+	* otherwise), consider it a improperly written
+	* overlay
+	*/
+	if (ret < 0 && path_len == -FDT_ERR_NOTFOUND)
+		ret = -FDT_ERR_BADOVERLAY;
+
+	/* return on error */
+	if (ret < 0)
+		return ret;
 
-		return path_len;
-	}
+	/* return pointer to path (if available) */
+	if (pathp)
+		*pathp = path ? path : NULL;
 
-	return fdt_path_offset(fdt, path);
+	return ret;
 }
 
 /**
@@ -590,7 +601,7 @@ static int overlay_apply_node(void *fdt, int target,
  *
  * overlay_merge() merges an overlay into its base device tree.
  *
- * This is the final step in the device tree overlay application
+ * This is the next to last step in the device tree overlay application
  * process, when all the phandles have been adjusted and resolved and
  * you just have to merge overlay into the base device tree.
  *
@@ -618,7 +629,7 @@ static int overlay_merge(void *fdt, void *fdto)
 		if (overlay < 0)
 			return overlay;
 
-		target = overlay_get_target(fdt, fdto, fragment);
+		target = overlay_get_target(fdt, fdto, fragment, NULL);
 		if (target < 0)
 			return target;
 
@@ -630,6 +641,175 @@ static int overlay_merge(void *fdt, void *fdto)
 	return 0;
 }
 
+static int get_path_len(const void *fdt, int nodeoffset)
+{
+	int len = 0, namelen;
+	const char *name;
+
+	FDT_CHECK_HEADER(fdt);
+
+	for (;;) {
+		name = fdt_get_name(fdt, nodeoffset, &namelen);
+		if (!name)
+			return namelen;
+
+		/* root? we're done */
+		if (namelen == 0)
+			break;
+
+		nodeoffset = fdt_parent_offset(fdt, nodeoffset);
+		if (nodeoffset < 0)
+			return nodeoffset;
+		len += namelen + 1;
+	}
+
+	/* in case of root pretend it's "/" */
+	if (len == 0)
+		len++;
+	return len;
+}
+
+/**
+ * overlay_symbol_update - Update the symbols of base tree after a merge
+ * @fdt: Base Device Tree blob
+ * @fdto: Device tree overlay blob
+ *
+ * overlay_symbol_update() updates the symbols of the base tree with the
+ * symbols of the applied overlay
+ *
+ * This is the last step in the device tree overlay application
+ * process, allowing the reference of overlay symbols by subsequent
+ * overlay operations.
+ *
+ * returns:
+ *      0 on success
+ *      Negative error code on failure
+ */
+static int overlay_symbol_update(void *fdt, void *fdto)
+{
+	int root_sym, ov_sym, prop, path_len, fragment, target;
+	int len, frag_name_len, ret, rel_path_len;
+	const char *s, *e;
+	const char *path;
+	const char *name;
+	const char *frag_name;
+	const char *rel_path;
+	const char *target_path;
+	char *buf;
+	void *p;
+
+	ov_sym = fdt_subnode_offset(fdto, 0, "__symbols__");
+
+	/* if no overlay symbols exist no problem */
+	if (ov_sym < 0)
+		return 0;
+
+	root_sym = fdt_subnode_offset(fdt, 0, "__symbols__");
+
+	/* it no root symbols exist we should create them */
+	if (root_sym == -FDT_ERR_NOTFOUND)
+		root_sym = fdt_add_subnode(fdt, 0, "__symbols__");
+
+	/* any error is fatal now */
+	if (root_sym < 0)
+		return root_sym;
+
+	/* iterate over each overlay symbol */
+	fdt_for_each_property_offset(prop, fdto, ov_sym) {
+		path = fdt_getprop_by_offset(fdto, prop, &name, &path_len);
+		if (!path)
+			return path_len;
+
+		/* verify it's a string property (terminated by a single \0) */
+		if (path_len < 1 || memchr(path, '\0', path_len) != &path[path_len - 1])
+			return -FDT_ERR_BADVALUE;
+
+		/* keep end marker to avoid strlen() */
+		e = path + path_len;
+
+		/* format: /<fragment-name>/__overlay__/<relative-subnode-path> */
+
+		if (*path != '/')
+			return -FDT_ERR_BADVALUE;
+
+		/* get fragment name first */
+		s = strchr(path + 1, '/');
+		if (!s)
+			return -FDT_ERR_BADOVERLAY;
+
+		frag_name = path + 1;
+		frag_name_len = s - path - 1;
+
+		/* verify format; safe since "s" lies in \0 terminated prop */
+		len = sizeof("/__overlay__/") - 1;
+		if ((e - s) < len || memcmp(s, "/__overlay__/", len))
+			return -FDT_ERR_BADOVERLAY;
+
+		rel_path = s + len;
+		rel_path_len = e - rel_path;
+
+		/* find the fragment index in which the symbol lies */
+		ret = fdt_subnode_offset_namelen(fdto, 0, frag_name,
+					       frag_name_len);
+		/* not found? */
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+		fragment = ret;
+
+		/* an __overlay__ subnode must exist */
+		ret = fdt_subnode_offset(fdto, fragment, "__overlay__");
+		if (ret < 0)
+			return -FDT_ERR_BADOVERLAY;
+
+		/* get the target of the fragment */
+		ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+		if (ret < 0)
+			return ret;
+		target = ret;
+
+		/* if we have a target path use */
+		if (!target_path) {
+			ret = get_path_len(fdt, target);
+			if (ret < 0)
+				return ret;
+			len = ret;
+		} else {
+			len = strlen(target_path);
+		}
+
+		ret = fdt_setprop_placeholder(fdt, root_sym, name,
+				len + (len > 1) + rel_path_len + 1, &p);
+		if (ret < 0)
+			return ret;
+
+		if (!target_path) {
+			/* again in case setprop_placeholder changed it */
+			ret = overlay_get_target(fdt, fdto, fragment, &target_path);
+			if (ret < 0)
+				return ret;
+			target = ret;
+		}
+
+		buf = p;
+		if (len > 1) { /* target is not root */
+			if (!target_path) {
+				ret = fdt_get_path(fdt, target, buf, len + 1);
+				if (ret < 0)
+					return ret;
+			} else
+				memcpy(buf, target_path, len + 1);
+
+		} else
+			len--;
+
+		buf[len] = '/';
+		memcpy(buf + len + 1, rel_path, rel_path_len);
+		buf[len + 1 + rel_path_len] = '\0';
+	}
+
+	return 0;
+}
+
 int fdt_overlay_apply(void *fdt, void *fdto)
 {
 	uint32_t delta = fdt_get_max_phandle(fdt);
@@ -654,6 +834,10 @@ int fdt_overlay_apply(void *fdt, void *fdto)
 	if (ret)
 		goto err;
 
+	ret = overlay_symbol_update(fdt, fdto);
+	if (ret)
+		goto err;
+
 	/*
 	 * The overlay has been damaged, erase its magic.
 	 */

commit 7c95a4956fe81f1897fa418a957b697ed375fb73
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:12 2017 +0300

    UPSTREAM: fdt: Switch to using the verbose overlay application method
    
    The verbose overlay application method prints out more helpful
    messages, so switch to it.
    
    Change-Id: Ie8bd31e939e3c12fe547028d0fa3ddc8b254d33d
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 81ecc5d92badfcf1415a6052b5896a62271a94dc)

diff --git a/cmd/fdt.c b/cmd/fdt.c
index d7654b2c4f..955a0088c6 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -667,11 +667,10 @@ static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		if (!fdt_valid(&blob))
 			return CMD_RET_FAILURE;
 
-		ret = fdt_overlay_apply(working_fdt, blob);
-		if (ret) {
-			printf("fdt_overlay_apply(): %s\n", fdt_strerror(ret));
+		/* apply method prints messages on error */
+		ret = fdt_overlay_apply_verbose(working_fdt, blob);
+		if (ret)
 			return CMD_RET_FAILURE;
-		}
 	}
 #endif
 	/* resize the fdt */

commit 0939009dd9925908e7a4bde4547f06f8c863fa02
Author: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date:   Mon Sep 4 23:12:11 2017 +0300

    UPSTREAM: fdt: Introduce helper method fdt_overlay_apply_verbose()
    
    Introduce fdt_overlay_apply_verbose, a method that applies an
    overlay but in the case of an error produces a helpful message.
    
    In addition if a base tree is found to be missing the __symbols__
    node the message will point out that the probable reason is that
    the base tree was miscompiled without the -@ option.
    
    Change-Id: I22cc210c6a7bb0aaa9655197c859f54677532099
    Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fc7c31891c40dd1aac2e71e9d1546727ca2b3556)

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 7e6a6696b6..d725276d7b 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -1681,3 +1681,34 @@ int fdt_fixup_display(void *blob, const char *path, const char *display)
 	}
 	return toff;
 }
+
+#ifdef CONFIG_OF_LIBFDT_OVERLAY
+/**
+ * fdt_overlay_apply_verbose - Apply an overlay with verbose error reporting
+ *
+ * @fdt: ptr to device tree
+ * @fdto: ptr to device tree overlay
+ *
+ * Convenience function to apply an overlay and display helpful messages
+ * in the case of an error
+ */
+int fdt_overlay_apply_verbose(void *fdt, void *fdto)
+{
+	int err;
+	bool has_symbols;
+
+	err = fdt_path_offset(fdt, "/__symbols__");
+	has_symbols = err >= 0;
+
+	err = fdt_overlay_apply(fdt, fdto);
+	if (err < 0) {
+		printf("failed on fdt_overlay_apply(): %s\n",
+				fdt_strerror(err));
+		if (!has_symbols) {
+			printf("base fdt does did not have a /__symbols__ node\n");
+			printf("make sure you've compiled with -@\n");
+		}
+	}
+	return err;
+}
+#endif
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 5ef78cce6e..2bca4d7889 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -264,6 +264,8 @@ int arch_fixup_memory_node(void *blob);
 int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
 			    u32 height, u32 stride, const char *format);
 
+int fdt_overlay_apply_verbose(void *fdt, void *fdto);
+
 #endif /* ifdef CONFIG_OF_LIBFDT */
 
 #ifdef USE_HOSTCC

commit 174235d4a20bb6f971c9f1045478d7ed5d13ab5d
Author: Tien Fong Chee <tien.fong.chee@intel.com>
Date:   Wed Aug 30 13:15:42 2017 +0800

    UPSTREAM: libfdt: Initialize the stack variable
    
    Report Coverity log:
    The code uses a variable that has not
    been initialized, leading to unpredictable
    or unintended results.
    
    Change-Id: I488a9d183590a2dc1ef049351d0c71a4eded2299
    Reported-by: Coverity (CID: 60519)
    Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 18c991ca2bd72c30b7fb578cee8b5c7c835d383d)

diff --git a/lib/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index 45fb964120..01adad0ee9 100644
--- a/lib/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
@@ -115,7 +115,7 @@ int fdt_find_regions(const void *fdt, char * const inc[], int inc_count,
 		     struct fdt_region region[], int max_regions,
 		     char *path, int path_len, int add_string_tab)
 {
-	int stack[FDT_MAX_DEPTH];
+	int stack[FDT_MAX_DEPTH] = { 0 };
 	char *end;
 	int nextoffset = 0;
 	uint32_t tag;

commit 7551eb4f057d4900e93e7d35893b86677e8bd60e
Author: Heinrich Schuchardt <xypron.glpk@gmx.de>
Date:   Tue Sep 12 09:57:45 2017 +0200

    UPSTREAM: checkpatch: update from Linux v4.13-rc6
    
    Checkpatch produces the following warning:
    
    Unescaped left brace in regex is deprecated here
    (and will be fatal in Perl 5.30), passed through in regex;
    marked by <-- HERE in m/^(\+.*(?:do|\))){ <-- HERE /
    at scripts/checkpatch.pl line 3348.
    
    The curent checkpatch of the Linux kernel corrects this
    bug and many others.
    
    It provides improved colored output.
    
    So replace checkpatch by the current Linux version.
    
    Add an empty file scripts/const_structs.checkpatch.
    We can later fill it according to our needs.
    
    Change-Id: I307d182d41de6288798e002b9d8990e23d027e63
    Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6305db960447ff2d32c335de8bbd9b44cb7d6554)

diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 3afc870f0f..2287a0bca8 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -1,4 +1,4 @@
-#!/usr/bin/perl -w
+#!/usr/bin/env perl
 # (c) 2001, Dave Jones. (the file handling bit)
 # (c) 2005, Joel Schopp <jschopp@austin.ibm.com> (the ugly bit)
 # (c) 2007,2008, Andy Whitcroft <apw@uk.ibm.com> (new conditions, test suite)
@@ -6,12 +6,13 @@
 # Licensed under the terms of the GNU GPL License version 2
 
 use strict;
+use warnings;
 use POSIX;
 use File::Basename;
 use Cwd 'abs_path';
+use Term::ANSIColor qw(:constants);
 
 my $P = $0;
-$P =~ s@.*/@@g;
 my $D = dirname(abs_path($P));
 
 my $V = '0.32';
@@ -25,12 +26,17 @@ my $chk_patch = 1;
 my $tst_only;
 my $emacs = 0;
 my $terse = 0;
+my $showfile = 0;
 my $file = 0;
+my $git = 0;
+my %git_commits = ();
 my $check = 0;
+my $check_orig = 0;
 my $summary = 1;
 my $mailback = 0;
 my $summary_file = 0;
 my $show_types = 0;
+my $list_types = 0;
 my $fix = 0;
 my $fix_inplace = 0;
 my $root;
@@ -45,9 +51,14 @@ my $configuration_file = ".checkpatch.conf";
 my $max_line_length = 80;
 my $ignore_perl_version = 0;
 my $minimum_perl_version = 5.10.0;
+my $min_conf_desc_length = 4;
 my $spelling_file = "$D/spelling.txt";
 my $codespell = 0;
 my $codespellfile = "/usr/share/codespell/dictionary.txt";
+my $conststructsfile = "$D/const_structs.checkpatch";
+my $typedefsfile = "";
+my $color = "auto";
+my $allow_c99_comments = 1;
 
 sub help {
 	my ($exitcode) = @_;
@@ -63,12 +74,25 @@ Options:
   --patch                    treat FILE as patchfile (default)
   --emacs                    emacs compile window format
   --terse                    one line per report
+  --showfile                 emit diffed file position, not input file position
+  -g, --git                  treat FILE as a single commit or git revision range
+                             single git commit with:
+                               <rev>
+                               <rev>^
+                               <rev>~n
+                             multiple git commits with:
+                               <rev1>..<rev2>
+                               <rev1>...<rev2>
+                               <rev>-<count>
+                             git merges are ignored
   -f, --file                 treat FILE as regular source file
   --subjective, --strict     enable more subjective tests
+  --list-types               list the possible message types
   --types TYPE(,TYPE2...)    show only these comma separated message types
   --ignore TYPE(,TYPE2...)   ignore various comma separated message types
+  --show-types               show the specific message type in the output
   --max-line-length=n        set the maximum line length, if exceeded, warn
-  --show-types               show the message "types" in the output
+  --min-conf-desc-length=n   set the min description length, if shorter, warn
   --root=PATH                PATH to the kernel tree root
   --no-summary               suppress the per-file summary
   --mailback                 only produce a report in case of warnings/errors
@@ -89,8 +113,11 @@ Options:
   --ignore-perl-version      override checking of perl version.  expect
                              runtime errors.
   --codespell                Use the codespell dictionary for spelling/typos
-                             (default:/usr/local/share/codespell/dictionary.txt)
+                             (default:/usr/share/codespell/dictionary.txt)
   --codespellfile            Use this codespell dictionary
+  --typedefsfile             Read additional types from this file
+  --color[=WHEN]             Use colors 'always', 'never', or only when output
+                             is a terminal ('auto'). Default is 'auto'.
   -h, --help, --version      display this help and exit
 
 When FILE is - read standard input.
@@ -99,6 +126,37 @@ EOM
 	exit($exitcode);
 }
 
+sub uniq {
+	my %seen;
+	return grep { !$seen{$_}++ } @_;
+}
+
+sub list_types {
+	my ($exitcode) = @_;
+
+	my $count = 0;
+
+	local $/ = undef;
+
+	open(my $script, '<', abs_path($P)) or
+	    die "$P: Can't read '$P' $!\n";
+
+	my $text = <$script>;
+	close($script);
+
+	my @types = ();
+	for ($text =~ /\b(?:(?:CHK|WARN|ERROR)\s*\(\s*"([^"]+)")/g) {
+		push (@types, $_);
+	}
+	@types = sort(uniq(@types));
+	print("#\tMessage type\n\n");
+	foreach my $type (@types) {
+		print(++$count . "\t" . $type . "\n");
+	}
+
+	exit($exitcode);
+}
+
 my $conf = which_conf($configuration_file);
 if (-f $conf) {
 	my @conf_args;
@@ -125,6 +183,14 @@ if (-f $conf) {
 	unshift(@ARGV, @conf_args) if @conf_args;
 }
 
+# Perl's Getopt::Long allows options to take optional arguments after a space.
+# Prevent --color by itself from consuming other arguments
+foreach (@ARGV) {
+	if ($_ eq "--color" || $_ eq "-color") {
+		$_ = "--color=$color";
+	}
+}
+
 GetOptions(
 	'q|quiet+'	=> \$quiet,
 	'tree!'		=> \$tree,
@@ -132,13 +198,17 @@ GetOptions(
 	'patch!'	=> \$chk_patch,
 	'emacs!'	=> \$emacs,
 	'terse!'	=> \$terse,
+	'showfile!'	=> \$showfile,
 	'f|file!'	=> \$file,
+	'g|git!'	=> \$git,
 	'subjective!'	=> \$check,
 	'strict!'	=> \$check,
 	'ignore=s'	=> \@ignore,
 	'types=s'	=> \@use,
 	'show-types!'	=> \$show_types,
+	'list-types!'	=> \$list_types,
 	'max-line-length=i' => \$max_line_length,
+	'min-conf-desc-length=i' => \$min_conf_desc_length,
 	'root=s'	=> \$root,
 	'summary!'	=> \$summary,
 	'mailback!'	=> \$mailback,
@@ -148,15 +218,22 @@ GetOptions(
 	'ignore-perl-version!' => \$ignore_perl_version,
 	'debug=s'	=> \%debug,
 	'test-only=s'	=> \$tst_only,
-	'codespell!'    => \$codespell,
-	'codespellfile=s' => \$codespellfile,
+	'codespell!'	=> \$codespell,
+	'codespellfile=s'	=> \$codespellfile,
+	'typedefsfile=s'	=> \$typedefsfile,
+	'color=s'	=> \$color,
+	'no-color'	=> \$color,	#keep old behaviors of -nocolor
+	'nocolor'	=> \$color,	#keep old behaviors of -nocolor
 	'h|help'	=> \$help,
 	'version'	=> \$help
 ) or help(1);
 
 help(0) if ($help);
 
+list_types(0) if ($list_types);
+
 $fix = 1 if ($fix_inplace);
+$check_orig = $check;
 
 my $exit = 0;
 
@@ -167,9 +244,21 @@ if ($^V && $^V lt $minimum_perl_version) {
 	}
 }
 
+#if no filenames are given, push '-' to read patch from stdin
 if ($#ARGV < 0) {
-	print "$P: no input files\n";
-	exit(1);
+	push(@ARGV, '-');
+}
+
+if ($color =~ /^[01]$/) {
+	$color = !$color;
+} elsif ($color =~ /^always$/i) {
+	$color = 1;
+} elsif ($color =~ /^never$/i) {
+	$color = 0;
+} elsif ($color =~ /^auto$/i) {
+	$color = (-t STDOUT);
+} else {
+	die "Invalid color mode: $color\n";
 }
 
 sub hash_save_array_words {
@@ -192,12 +281,12 @@ sub hash_save_array_words {
 sub hash_show_words {
 	my ($hashRef, $prefix) = @_;
 
-	if ($quiet == 0 && keys %$hashRef) {
-		print "NOTE: $prefix message types:";
+	if (keys %$hashRef) {
+		print "\nNOTE: $prefix message types:";
 		foreach my $word (sort keys %$hashRef) {
 			print " $word";
 		}
-		print "\n\n";
+		print "\n";
 	}
 }
 
@@ -257,7 +346,8 @@ our $Sparse	= qr{
 			__init_refok|
 			__kprobes|
 			__ref|
-			__rcu
+			__rcu|
+			__private
 		}x;
 our $InitAttributePrefix = qr{__(?:mem|cpu|dev|net_|)};
 our $InitAttributeData = qr{$InitAttributePrefix(?:initdata\b)};
@@ -272,7 +362,7 @@ our $Attribute	= qr{
 			__percpu|
 			__nocast|
 			__safe|
-			__bitwise__|
+			__bitwise|
 			__packed__|
 			__packed2__|
 			__naked|
@@ -281,6 +371,7 @@ our $Attribute	= qr{
 			__noreturn|
 			__used|
 			__cold|
+			__pure|
 			__noclone|
 			__deprecated|
 			__read_mostly|
@@ -292,7 +383,7 @@ our $Attribute	= qr{
 			__weak
 		  }x;
 our $Modifier;
-our $Inline	= qr{inline|__always_inline|noinline};
+our $Inline	= qr{inline|__always_inline|noinline|__inline|__inline__};
 our $Member	= qr{->$Ident|\.$Ident|\[[^]]*\]};
 our $Lval	= qr{$Ident(?:$Member)*};
 
@@ -300,13 +391,15 @@ our $Int_type	= qr{(?i)llu|ull|ll|lu|ul|l|u};
 our $Binary	= qr{(?i)0b[01]+$Int_type?};
 our $Hex	= qr{(?i)0x[0-9a-f]+$Int_type?};
 our $Int	= qr{[0-9]+$Int_type?};
+our $Octal	= qr{0[0-7]+$Int_type?};
+our $String	= qr{"[X\t]*"};
 our $Float_hex	= qr{(?i)0x[0-9a-f]+p-?[0-9]+[fl]?};
 our $Float_dec	= qr{(?i)(?:[0-9]+\.[0-9]*|[0-9]*\.[0-9]+)(?:e-?[0-9]+)?[fl]?};
 our $Float_int	= qr{(?i)[0-9]+e-?[0-9]+[fl]?};
 our $Float	= qr{$Float_hex|$Float_dec|$Float_int};
-our $Constant	= qr{$Float|$Binary|$Hex|$Int};
+our $Constant	= qr{$Float|$Binary|$Octal|$Hex|$Int};
 our $Assignment	= qr{\*\=|/=|%=|\+=|-=|<<=|>>=|&=|\^=|\|=|=};
-our $Compare    = qr{<=|>=|==|!=|<|>};
+our $Compare    = qr{<=|>=|==|!=|<|(?<!-)>};
 our $Arithmetic = qr{\+|-|\*|\/|%};
 our $Operators	= qr{
 			<=|>=|==|!=|
@@ -314,10 +407,16 @@ our $Operators	= qr{
 			&&|\|\||,|\^|\+\+|--|&|\||$Arithmetic
 		  }x;
 
+our $c90_Keywords = qr{do|for|while|if|else|return|goto|continue|switch|default|case|break}x;
+
+our $BasicType;
 our $NonptrType;
+our $NonptrTypeMisordered;
 our $NonptrTypeWithAttr;
 our $Type;
+our $TypeMisordered;
 our $Declare;
+our $DeclareMisordered;
 
 our $NON_ASCII_UTF8	= qr{
 	[\xC2-\xDF][\x80-\xBF]               # non-overlong 2-byte
@@ -334,19 +433,28 @@ our $UTF8	= qr{
 	| $NON_ASCII_UTF8
 }x;
 
-our $typeTypedefs = qr{(?x:
+our $typeC99Typedefs = qr{(?:__)?(?:[us]_?)?int_?(?:8|16|32|64)_t};
+our $typeOtherOSTypedefs = qr{(?x:
+	u_(?:char|short|int|long) |          # bsd
+	u(?:nchar|short|int|long)            # sysv
+)};
+our $typeKernelTypedefs = qr{(?x:
 	(?:__)?(?:u|s|be|le)(?:8|16|32|64)|
 	atomic_t
 )};
+our $typeTypedefs = qr{(?x:
+	$typeC99Typedefs\b|
+	$typeOtherOSTypedefs\b|
+	$typeKernelTypedefs\b
+)};
+
+our $zero_initializer = qr{(?:(?:0[xX])?0+$Int_type?|NULL|false)\b};
 
 our $logFunctions = qr{(?x:
-	printk(?:_ratelimited|_once|)|
+	printk(?:_ratelimited|_once|_deferred_once|_deferred|)|
 	(?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)|
 	WARN(?:_RATELIMIT|_ONCE|)|
 	panic|
-	debug|
-	printf|
-	puts|
 	MODULE_[A-Z_]+|
 	seq_vprintf|seq_printf|seq_puts
 )};
@@ -362,16 +470,36 @@ our $signature_tags = qr{(?xi:
 	Cc:
 )};
 
+our @typeListMisordered = (
+	qr{char\s+(?:un)?signed},
+	qr{int\s+(?:(?:un)?signed\s+)?short\s},
+	qr{int\s+short(?:\s+(?:un)?signed)},
+	qr{short\s+int(?:\s+(?:un)?signed)},
+	qr{(?:un)?signed\s+int\s+short},
+	qr{short\s+(?:un)?signed},
+	qr{long\s+int\s+(?:un)?signed},
+	qr{int\s+long\s+(?:un)?signed},
+	qr{long\s+(?:un)?signed\s+int},
+	qr{int\s+(?:un)?signed\s+long},
+	qr{int\s+(?:un)?signed},
+	qr{int\s+long\s+long\s+(?:un)?signed},
+	qr{long\s+long\s+int\s+(?:un)?signed},
+	qr{long\s+long\s+(?:un)?signed\s+int},
+	qr{long\s+long\s+(?:un)?signed},
+	qr{long\s+(?:un)?signed},
+);
+
 our @typeList = (
 	qr{void},
-	qr{(?:unsigned\s+)?char},
-	qr{(?:unsigned\s+)?short},
-	qr{(?:unsigned\s+)?int},
-	qr{(?:unsigned\s+)?long},
-	qr{(?:unsigned\s+)?long\s+int},
-	qr{(?:unsigned\s+)?long\s+long},
-	qr{(?:unsigned\s+)?long\s+long\s+int},
-	qr{unsigned},
+	qr{(?:(?:un)?signed\s+)?char},
+	qr{(?:(?:un)?signed\s+)?short\s+int},
+	qr{(?:(?:un)?signed\s+)?short},
+	qr{(?:(?:un)?signed\s+)?int},
+	qr{(?:(?:un)?signed\s+)?long\s+int},
+	qr{(?:(?:un)?signed\s+)?long\s+long\s+int},
+	qr{(?:(?:un)?signed\s+)?long\s+long},
+	qr{(?:(?:un)?signed\s+)?long},
+	qr{(?:un)?signed},
 	qr{float},
 	qr{double},
 	qr{bool},
@@ -381,7 +509,31 @@ our @typeList = (
 	qr{${Ident}_t},
 	qr{${Ident}_handler},
 	qr{${Ident}_handler_fn},
+	@typeListMisordered,
 );
+
+our $C90_int_types = qr{(?x:
+	long\s+long\s+int\s+(?:un)?signed|
+	long\s+long\s+(?:un)?signed\s+int|
+	long\s+long\s+(?:un)?signed|
+	(?:(?:un)?signed\s+)?long\s+long\s+int|
+	(?:(?:un)?signed\s+)?long\s+long|
+	int\s+long\s+long\s+(?:un)?signed|
+	int\s+(?:(?:un)?signed\s+)?long\s+long|
+
+	long\s+int\s+(?:un)?signed|
+	long\s+(?:un)?signed\s+int|
+	long\s+(?:un)?signed|
+	(?:(?:un)?signed\s+)?long\s+int|
+	(?:(?:un)?signed\s+)?long|
+	int\s+long\s+(?:un)?signed|
+	int\s+(?:(?:un)?signed\s+)?long|
+
+	int\s+(?:un)?signed|
+	(?:(?:un)?signed\s+)?int
+)};
+
+our @typeListFile = ();
 our @typeListWithAttr = (
 	@typeList,
 	qr{struct\s+$InitAttribute\s+$Ident},
@@ -391,10 +543,67 @@ our @typeListWithAttr = (
 our @modifierList = (
 	qr{fastcall},
 );
+our @modifierListFile = ();
+
+our @mode_permission_funcs = (
+	["module_param", 3],
+	["module_param_(?:array|named|string)", 4],
+	["module_param_array_named", 5],
+	["debugfs_create_(?:file|u8|u16|u32|u64|x8|x16|x32|x64|size_t|atomic_t|bool|blob|regset32|u32_array)", 2],
+	["proc_create(?:_data|)", 2],
+	["(?:CLASS|DEVICE|SENSOR|SENSOR_DEVICE|IIO_DEVICE)_ATTR", 2],
+	["IIO_DEV_ATTR_[A-Z_]+", 1],
+	["SENSOR_(?:DEVICE_|)ATTR_2", 2],
+	["SENSOR_TEMPLATE(?:_2|)", 3],
+	["__ATTR", 2],
+);
+
+#Create a search pattern for all these functions to speed up a loop below
+our $mode_perms_search = "";
+foreach my $entry (@mode_permission_funcs) {
+	$mode_perms_search .= '|' if ($mode_perms_search ne "");
+	$mode_perms_search .= $entry->[0];
+}
+
+our $mode_perms_world_writable = qr{
+	S_IWUGO		|
+	S_IWOTH		|
+	S_IRWXUGO	|
+	S_IALLUGO	|
+	0[0-7][0-7][2367]
+}x;
+
+our %mode_permission_string_types = (
+	"S_IRWXU" => 0700,
+	"S_IRUSR" => 0400,
+	"S_IWUSR" => 0200,
+	"S_IXUSR" => 0100,
+	"S_IRWXG" => 0070,
+	"S_IRGRP" => 0040,
+	"S_IWGRP" => 0020,
+	"S_IXGRP" => 0010,
+	"S_IRWXO" => 0007,
+	"S_IROTH" => 0004,
+	"S_IWOTH" => 0002,
+	"S_IXOTH" => 0001,
+	"S_IRWXUGO" => 0777,
+	"S_IRUGO" => 0444,
+	"S_IWUGO" => 0222,
+	"S_IXUGO" => 0111,
+);
+
+#Create a search pattern for all these strings to speed up a loop below
+our $mode_perms_string_search = "";
+foreach my $entry (keys %mode_permission_string_types) {
+	$mode_perms_string_search .= '|' if ($mode_perms_string_search ne "");
+	$mode_perms_string_search .= $entry;
+}
 
 our $allowed_asm_includes = qr{(?x:
 	irq|
-	memory
+	memory|
+	time|
+	reboot
 )};
 # memory.h: ARM has a custom one
 
@@ -447,12 +656,54 @@ if ($codespell) {
 
 $misspellings = join("|", sort keys %spelling_fix) if keys %spelling_fix;
 
+sub read_words {
+	my ($wordsRef, $file) = @_;
+
+	if (open(my $words, '<', $file)) {
+		while (<$words>) {
+			my $line = $_;
+
+			$line =~ s/\s*\n?$//g;
+			$line =~ s/^\s*//g;
+
+			next if ($line =~ m/^\s*#/);
+			next if ($line =~ m/^\s*$/);
+			if ($line =~ /\s/) {
+				print("$file: '$line' invalid - ignored\n");
+				next;
+			}
+
+			$$wordsRef .= '|' if ($$wordsRef ne "");
+			$$wordsRef .= $line;
+		}
+		close($file);
+		return 1;
+	}
+
+	return 0;
+}
+
+my $const_structs = "";
+read_words(\$const_structs, $conststructsfile)
+    or warn "No structs that should be const will be found - file '$conststructsfile': $!\n";
+
+my $typeOtherTypedefs = "";
+if (length($typedefsfile)) {
+	read_words(\$typeOtherTypedefs, $typedefsfile)
+	    or warn "No additional types will be considered - file '$typedefsfile': $!\n";
+}
+$typeTypedefs .= '|' . $typeOtherTypedefs if ($typeOtherTypedefs ne "");
 
 sub build_types {
-	my $mods = "(?x:  \n" . join("|\n  ", @modifierList) . "\n)";
-	my $all = "(?x:  \n" . join("|\n  ", @typeList) . "\n)";
+	my $mods = "(?x:  \n" . join("|\n  ", (@modifierList, @modifierListFile)) . "\n)";
+	my $all = "(?x:  \n" . join("|\n  ", (@typeList, @typeListFile)) . "\n)";
+	my $Misordered = "(?x:  \n" . join("|\n  ", @typeListMisordered) . "\n)";
 	my $allWithAttr = "(?x:  \n" . join("|\n  ", @typeListWithAttr) . "\n)";
 	$Modifier	= qr{(?:$Attribute|$Sparse|$mods)};
+	$BasicType	= qr{
+				(?:$typeTypedefs\b)|
+				(?:${all}\b)
+		}x;
 	$NonptrType	= qr{
 			(?:$Modifier\s+|const\s+)*
 			(?:
@@ -462,6 +713,13 @@ sub build_types {
 			)
 			(?:\s+$Modifier|\s+const)*
 		  }x;
+	$NonptrTypeMisordered	= qr{
+			(?:$Modifier\s+|const\s+)*
+			(?:
+				(?:${Misordered}\b)
+			)
+			(?:\s+$Modifier|\s+const)*
+		  }x;
 	$NonptrTypeWithAttr	= qr{
 			(?:$Modifier\s+|const\s+)*
 			(?:
@@ -473,10 +731,16 @@ sub build_types {
 		  }x;
 	$Type	= qr{
 			$NonptrType
-			(?:(?:\s|\*|\[\])+\s*const|(?:\s|\*|\[\])+|(?:\s*\[\s*\])+)?
+			(?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+)?
+			(?:\s+$Inline|\s+$Modifier)*
+		  }x;
+	$TypeMisordered	= qr{
+			$NonptrTypeMisordered
+			(?:(?:\s|\*|\[\])+\s*const|(?:\s|\*\s*(?:const\s*)?|\[\])+|(?:\s*\[\s*\])+)?
 			(?:\s+$Inline|\s+$Modifier)*
 		  }x;
-	$Declare	= qr{(?:$Storage\s+)?$Type};
+	$Declare	= qr{(?:$Storage\s+(?:$Inline\s+)?)?$Type};
+	$DeclareMisordered	= qr{(?:$Storage\s+(?:$Inline\s+)?)?$TypeMisordered};
 }
 build_types();
 
@@ -487,15 +751,26 @@ our $Typecast	= qr{\s*(\(\s*$NonptrType\s*\)){0,1}\s*};
 # Any use must be runtime checked with $^V
 
 our $balanced_parens = qr/(\((?:[^\(\)]++|(?-1))*\))/;
-our $LvalOrFunc	= qr{($Lval)\s*($balanced_parens{0,1})\s*};
-our $FuncArg = qr{$Typecast{0,1}($LvalOrFunc|$Constant)};
+our $LvalOrFunc	= qr{((?:[\&\*]\s*)?$Lval)\s*($balanced_parens{0,1})\s*};
+our $FuncArg = qr{$Typecast{0,1}($LvalOrFunc|$Constant|$String)};
+
+our $declaration_macros = qr{(?x:
+	(?:$Storage\s+)?(?:[A-Z_][A-Z0-9]*_){0,2}(?:DEFINE|DECLARE)(?:_[A-Z0-9]+){1,6}\s*\(|
+	(?:$Storage\s+)?[HLP]?LIST_HEAD\s*\(|
+	(?:$Storage\s+)?${Type}\s+uninitialized_var\s*\(
+)};
 
 sub deparenthesize {
 	my ($string) = @_;
 	return "" if (!defined($string));
-	$string =~ s@^\s*\(\s*@@g;
-	$string =~ s@\s*\)\s*$@@g;
+
+	while ($string =~ /^\s*\(.*\)\s*$/) {
+		$string =~ s@^\s*\(\s*@@;
+		$string =~ s@\s*\)\s*$@@;
+	}
+
 	$string =~ s@\s+@ @g;
+
 	return $string;
 }
 
@@ -525,6 +800,16 @@ sub seed_camelcase_file {
 	}
 }
 
+sub is_maintained_obsolete {
+	my ($filename) = @_;
+
+	return 0 if (!$tree || !(-e "$root/scripts/get_maintainer.pl"));
+
+	my $status = `perl $root/scripts/get_maintainer.pl --status --nom --nol --nogit --nogit-fallback -f $filename 2>&1`;
+
+	return $status =~ /obsolete/i;
+}
+
 my $camelcase_seeded = 0;
 sub seed_camelcase_includes {
 	return if ($camelcase_seeded);
@@ -583,17 +868,82 @@ sub seed_camelcase_includes {
 	}
 }
 
+sub git_commit_info {
+	my ($commit, $id, $desc) = @_;
+
+	return ($id, $desc) if ((which("git") eq "") || !(-e ".git"));
+
+	my $output = `git log --no-color --format='%H %s' -1 $commit 2>&1`;
+	$output =~ s/^\s*//gm;
+	my @lines = split("\n", $output);
+
+	return ($id, $desc) if ($#lines < 0);
+
+	if ($lines[0] =~ /^error: short SHA1 $commit is ambiguous\./) {
+# Maybe one day convert this block of bash into something that returns
+# all matching commit ids, but it's very slow...
+#
+#		echo "checking commits $1..."
+#		git rev-list --remotes | grep -i "^$1" |
+#		while read line ; do
+#		    git log --format='%H %s' -1 $line |
+#		    echo "commit $(cut -c 1-12,41-)"
+#		done
+	} elsif ($lines[0] =~ /^fatal: ambiguous argument '$commit': unknown revision or path not in the working tree\./) {
+		$id = undef;
+	} else {
+		$id = substr($lines[0], 0, 12);
+		$desc = substr($lines[0], 41);
+	}
+
+	return ($id, $desc);
+}
+
 $chk_signoff = 0 if ($file);
 
 my @rawlines = ();
 my @lines = ();
 my @fixed = ();
-my $vname;
+my @fixed_inserted = ();
+my @fixed_deleted = ();
 my $fixlinenr = -1;
 
+# If input is git commits, extract all commits from the commit expressions.
+# For example, HEAD-3 means we need check 'HEAD, HEAD~1, HEAD~2'.
+die "$P: No git repository found\n" if ($git && !-e ".git");
+
+if ($git) {
+	my @commits = ();
+	foreach my $commit_expr (@ARGV) {
+		my $git_range;
+		if ($commit_expr =~ m/^(.*)-(\d+)$/) {
+			$git_range = "-$2 $1";
+		} elsif ($commit_expr =~ m/\.\./) {
+			$git_range = "$commit_expr";
+		} else {
+			$git_range = "-1 $commit_expr";
+		}
+		my $lines = `git log --no-color --no-merges --pretty=format:'%H %s' $git_range`;
+		foreach my $line (split(/\n/, $lines)) {
+			$line =~ /^([0-9a-fA-F]{40,40}) (.*)$/;
+			next if (!defined($1) || !defined($2));
+			my $sha1 = $1;
+			my $subject = $2;
+			unshift(@commits, $sha1);
+			$git_commits{$sha1} = $subject;
+		}
+	}
+	die "$P: no git commits after extraction!\n" if (@commits == 0);
+	@ARGV = @commits;
+}
+
+my $vname;
 for my $filename (@ARGV) {
 	my $FILE;
-	if ($file) {
+	if ($git) {
+		open($FILE, '-|', "git format-patch -M --stdout -1 $filename") ||
+			die "$P: $filename: git format-patch failed - $!\n";
+	} elsif ($file) {
 		open($FILE, '-|', "diff -u /dev/null $filename") ||
 			die "$P: $filename: diff failed - $!\n";
 	} elsif ($filename eq '-') {
@@ -604,6 +954,8 @@ for my $filename (@ARGV) {
 	}
 	if ($filename eq '-') {
 		$vname = 'Your patch';
+	} elsif ($git) {
+		$vname = "Commit " . substr($filename, 0, 12) . ' ("' . $git_commits{$filename} . '")';
 	} else {
 		$vname = $filename;
 	}
@@ -612,12 +964,45 @@ for my $filename (@ARGV) {
 		push(@rawlines, $_);
 	}
 	close($FILE);
+
+	if ($#ARGV > 0 && $quiet == 0) {
+		print '-' x length($vname) . "\n";
+		print "$vname\n";
+		print '-' x length($vname) . "\n";
+	}
+
 	if (!process($filename)) {
 		$exit = 1;
 	}
 	@rawlines = ();
 	@lines = ();
 	@fixed = ();
+	@fixed_inserted = ();
+	@fixed_deleted = ();
+	$fixlinenr = -1;
+	@modifierListFile = ();
+	@typeListFile = ();
+	build_types();
+}
+
+if (!$quiet) {
+	hash_show_words(\%use_type, "Used");
+	hash_show_words(\%ignore_type, "Ignored");
+
+	if ($^V lt 5.10.0) {
+		print << "EOM"
+
+NOTE: perl $^V is not modern enough to detect all possible issues.
+      An upgrade to at least perl v5.10.0 is suggested.
+EOM
+	}
+	if ($exit) {
+		print << "EOM"
+
+NOTE: If any of the errors are false positives, please report
+      them to the maintainer, see CHECKPATCH in MAINTAINERS.
+EOM
+	}
 }
 
 exit($exit);
@@ -709,6 +1094,18 @@ sub format_email {
 	return $formatted_email;
 }
 
+sub which {
+	my ($bin) = @_;
+
+	foreach my $path (split(/:/, $ENV{PATH})) {
+		if (-e "$path/$bin") {
+			return "$path/$bin";
+		}
+	}
+
+	return "";
+}
+
 sub which_conf {
 	my ($conf) = @_;
 
@@ -855,13 +1252,18 @@ sub sanitise_line {
 		$res =~ s@(\#\s*(?:error|warning)\s+).*@$1$clean@;
 	}
 
+	if ($allow_c99_comments && $res =~ m@(//.*$)@) {
+		my $match = $1;
+		$res =~ s/\Q$match\E/"$;" x length($match)/e;
+	}
+
 	return $res;
 }
 
 sub get_quoted_string {
 	my ($line, $rawline) = @_;
 
-	return "" if ($line !~ m/(\"[X]+\")/g);
+	return "" if ($line !~ m/($String)/g);
 	return substr($rawline, $-[0], $+[0] - $-[0]);
 }
 
@@ -1470,13 +1872,13 @@ sub possible {
 			for my $modifier (split(' ', $possible)) {
 				if ($modifier !~ $notPermitted) {
 					warn "MODIFIER: $modifier ($possible) ($line)\n" if ($dbg_possible);
-					push(@modifierList, $modifier);
+					push(@modifierListFile, $modifier);
 				}
 			}
 
 		} else {
 			warn "POSSIBLE: $possible ($line)\n" if ($dbg_possible);
-			push(@typeList, $possible);
+			push(@typeListFile, $possible);
 		}
 		build_types();
 	} else {
@@ -1487,34 +1889,144 @@ sub possible {
 my $prefix = '';
 
 sub show_type {
-	return defined $use_type{$_[0]} if (scalar keys %use_type > 0);
+	my ($type) = @_;
+
+	$type =~ tr/[a-z]/[A-Z]/;
 
-	return !defined $ignore_type{$_[0]};
+	return defined $use_type{$type} if (scalar keys %use_type > 0);
+
+	return !defined $ignore_type{$type};
 }
 
 sub report {
-	if (!show_type($_[1]) ||
-	    (defined $tst_only && $_[2] !~ /\Q$tst_only\E/)) {
+	my ($level, $type, $msg) = @_;
+
+	if (!show_type($type) ||
+	    (defined $tst_only && $msg !~ /\Q$tst_only\E/)) {
 		return 0;
 	}
-	my $line;
+	my $output = '';
+	if ($color) {
+		if ($level eq 'ERROR') {
+			$output .= RED;
+		} elsif ($level eq 'WARNING') {
+			$output .= YELLOW;
+		} else {
+			$output .= GREEN;
+		}
+	}
+	$output .= $prefix . $level . ':';
 	if ($show_types) {
-		$line = "$prefix$_[0]:$_[1]: $_[2]\n";
-	} else {
-		$line = "$prefix$_[0]: $_[2]\n";
+		$output .= BLUE if ($color);
+		$output .= "$type:";
+	}
+	$output .= RESET if ($color);
+	$output .= ' ' . $msg . "\n";
+
+	if ($showfile) {
+		my @lines = split("\n", $output, -1);
+		splice(@lines, 1, 1);
+		$output = join("\n", @lines);
 	}
-	$line = (split('\n', $line))[0] . "\n" if ($terse);
+	$output = (split('\n', $output))[0] . "\n" if ($terse);
 
-	push(our @report, $line);
+	push(our @report, $output);
 
 	return 1;
 }
+
 sub report_dump {
 	our @report;
 }
 
+sub fixup_current_range {
+	my ($lineRef, $offset, $length) = @_;
+
+	if ($$lineRef =~ /^\@\@ -\d+,\d+ \+(\d+),(\d+) \@\@/) {
+		my $o = $1;
+		my $l = $2;
+		my $no = $o + $offset;
+		my $nl = $l + $length;
+		$$lineRef =~ s/\+$o,$l \@\@/\+$no,$nl \@\@/;
+	}
+}
+
+sub fix_inserted_deleted_lines {
+	my ($linesRef, $insertedRef, $deletedRef) = @_;
+
+	my $range_last_linenr = 0;
+	my $delta_offset = 0;
+
+	my $old_linenr = 0;
+	my $new_linenr = 0;
+
+	my $next_insert = 0;
+	my $next_delete = 0;
+
+	my @lines = ();
+
+	my $inserted = @{$insertedRef}[$next_insert++];
+	my $deleted = @{$deletedRef}[$next_delete++];
+
+	foreach my $old_line (@{$linesRef}) {
+		my $save_line = 1;
+		my $line = $old_line;	#don't modify the array
+		if ($line =~ /^(?:\+\+\+|\-\-\-)\s+\S+/) {	#new filename
+			$delta_offset = 0;
+		} elsif ($line =~ /^\@\@ -\d+,\d+ \+\d+,\d+ \@\@/) {	#new hunk
+			$range_last_linenr = $new_linenr;
+			fixup_current_range(\$line, $delta_offset, 0);
+		}
+
+		while (defined($deleted) && ${$deleted}{'LINENR'} == $old_linenr) {
+			$deleted = @{$deletedRef}[$next_delete++];
+			$save_line = 0;
+			fixup_current_range(\$lines[$range_last_linenr], $delta_offset--, -1);
+		}
+
+		while (defined($inserted) && ${$inserted}{'LINENR'} == $old_linenr) {
+			push(@lines, ${$inserted}{'LINE'});
+			$inserted = @{$insertedRef}[$next_insert++];
+			$new_linenr++;
+			fixup_current_range(\$lines[$range_last_linenr], $delta_offset++, 1);
+		}
+
+		if ($save_line) {
+			push(@lines, $line);
+			$new_linenr++;
+		}
+
+		$old_linenr++;
+	}
+
+	return @lines;
+}
+
+sub fix_insert_line {
+	my ($linenr, $line) = @_;
+
+	my $inserted = {
+		LINENR => $linenr,
+		LINE => $line,
+	};
+	push(@fixed_inserted, $inserted);
+}
+
+sub fix_delete_line {
+	my ($linenr, $line) = @_;
+
+	my $deleted = {
+		LINENR => $linenr,
+		LINE => $line,
+	};
+
+	push(@fixed_deleted, $deleted);
+}
+
 sub ERROR {
-	if (report("ERROR", $_[0], $_[1])) {
+	my ($type, $msg) = @_;
+
+	if (report("ERROR", $type, $msg)) {
 		our $clean = 0;
 		our $cnt_error++;
 		return 1;
@@ -1522,7 +2034,9 @@ sub ERROR {
 	return 0;
 }
 sub WARN {
-	if (report("WARNING", $_[0], $_[1])) {
+	my ($type, $msg) = @_;
+
+	if (report("WARNING", $type, $msg)) {
 		our $clean = 0;
 		our $cnt_warn++;
 		return 1;
@@ -1530,7 +2044,9 @@ sub WARN {
 	return 0;
 }
 sub CHK {
-	if ($check && report("CHECK", $_[0], $_[1])) {
+	my ($type, $msg) = @_;
+
+	if ($check && report("CHECK", $type, $msg)) {
 		our $clean = 0;
 		our $cnt_chk++;
 		return 1;
@@ -1640,7 +2156,7 @@ sub pos_last_openparen {
 		}
 	}
 
-	return $last_openparen + 1;
+	return length(expand_tabs(substr($line, 0, $last_openparen))) + 1;
 }
 
 sub process {
@@ -1660,12 +2176,18 @@ sub process {
 	our $clean = 1;
 	my $signoff = 0;
 	my $is_patch = 0;
-
-	my $in_header_lines = 1;
+	my $in_header_lines = $file ? 0 : 1;
 	my $in_commit_log = 0;		#Scanning lines before patch
-
+	my $has_commit_log = 0;		#Encountered lines before patch
+	my $commit_log_possible_stack_dump = 0;
+	my $commit_log_long_line = 0;
+	my $commit_log_has_diff = 0;
+	my $reported_maintainer_file = 0;
 	my $non_utf8_charset = 0;
 
+	my $last_blank_line = 0;
+	my $last_coalesced_string_linenr = -1;
+
 	our @report = ();
 	our $cnt_lines = 0;
 	our $cnt_error = 0;
@@ -1677,6 +2199,7 @@ sub process {
 	my $realline = 0;
 	my $realcnt = 0;
 	my $here = '';
+	my $context_function;		#undef'd unless there's a known function
 	my $in_comment = 0;
 	my $comment_edge = 0;
 	my $first_line = 0;
@@ -1710,12 +2233,12 @@ sub process {
 
 		if ($rawline=~/^\+\+\+\s+(\S+)/) {
 			$setup_docs = 0;
-			if ($1 =~ m@Documentation/kernel-parameters.txt$@) {
+			if ($1 =~ m@Documentation/admin-guide/kernel-parameters.rst$@) {
 				$setup_docs = 1;
 			}
 			#next;
 		}
-		if ($rawline=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
+		if ($rawline =~ /^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
 			$realline=$1-1;
 			if (defined $2) {
 				$realcnt=$3+1;
@@ -1783,15 +2306,19 @@ sub process {
 
 	$realcnt = 0;
 	$linenr = 0;
+	$fixlinenr = -1;
 	foreach my $line (@lines) {
 		$linenr++;
+		$fixlinenr++;
 		my $sline = $line;	#copy of $line
 		$sline =~ s/$;/ /g;	#with comments as spaces
 
 		my $rawline = $rawlines[$linenr - 1];
 
 #extract the line range in the file after the patch is applied
-		if ($line=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) {
+		if (!$in_commit_log &&
+		    $line =~ /^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@(.*)/) {
+			my $context = $4;
 			$is_patch = 1;
 			$first_line = $linenr + 1;
 			$realline=$1-1;
@@ -1807,6 +2334,11 @@ sub process {
 			%suppress_whiletrailers = ();
 			%suppress_export = ();
 			$suppress_statement = 0;
+			if ($context =~ /\b(\w+)\s*\(/) {
+				$context_function = $1;
+			} else {
+				undef $context_function;
+			}
 			next;
 
 # track the line number as we move through the hunk, note that
@@ -1832,18 +2364,16 @@ sub process {
 
 		my $hunk_line = ($realcnt != 0);
 
-#make up the handle for any error we report on this line
-		$prefix = "$filename:$realline: " if ($emacs && $file);
-		$prefix = "$filename:$linenr: " if ($emacs && !$file);
-
 		$here = "#$linenr: " if (!$file);
 		$here = "#$realline: " if ($file);
 
+		my $found_file = 0;
 		# extract the filename as it passes
 		if ($line =~ /^diff --git.*?(\S+)$/) {
 			$realfile = $1;
 			$realfile =~ s@^([^/]*)/@@ if (!$file);
 			$in_commit_log = 0;
+			$found_file = 1;
 		} elsif ($line =~ /^\+\+\+\s+(\S+)/) {
 			$realfile = $1;
 			$realfile =~ s@^([^/]*)/@@ if (!$file);
@@ -1860,6 +2390,30 @@ sub process {
 				ERROR("MODIFIED_INCLUDE_ASM",
 				      "do not modify files in include/asm, change architecture specific files in include/asm-<architecture>\n" . "$here$rawline\n");
 			}
+			$found_file = 1;
+		}
+
+#make up the handle for any error we report on this line
+		if ($showfile) {
+			$prefix = "$realfile:$realline: "
+		} elsif ($emacs) {
+			if ($file) {
+				$prefix = "$filename:$realline: ";
+			} else {
+				$prefix = "$filename:$linenr: ";
+			}
+		}
+
+		if ($found_file) {
+			if (is_maintained_obsolete($realfile)) {
+				WARN("OBSOLETE",
+				     "$realfile is marked as 'obsolete' in the MAINTAINERS hierarchy.  No unnecessary modifications please.\n");
+			}
+			if ($realfile =~ m@^(?:drivers/net/|net/|drivers/staging/)@) {
+				$check = 1;
+			} else {
+				$check = $check_orig;
+			}
 			next;
 		}
 
@@ -1871,6 +2425,17 @@ sub process {
 
 		$cnt_lines++ if ($realcnt != 0);
 
+# Check if the commit log has what seems like a diff which can confuse patch
+		if ($in_commit_log && !$commit_log_has_diff &&
+		    (($line =~ m@^\s+diff\b.*a/[\w/]+@ &&
+		      $line =~ m@^\s+diff\b.*a/([\w/]+)\s+b/$1\b@) ||
+		     $line =~ m@^\s*(?:\-\-\-\s+a/|\+\+\+\s+b/)@ ||
+		     $line =~ m/^\s*\@\@ \-\d+,\d+ \+\d+,\d+ \@\@/)) {
+			ERROR("DIFF_IN_COMMIT_MSG",
+			      "Avoid using diff content in the commit message - patch(1) might not work\n" . $herecurr);
+			$commit_log_has_diff = 1;
+		}
+
 # Check for incorrect file permissions
 		if ($line =~ /^new (file )?mode.*[7531]\d{0,2}$/) {
 			my $permhere = $here . "FILE: $realfile\n";
@@ -1887,6 +2452,12 @@ sub process {
 			$in_commit_log = 0;
 		}
 
+# Check if MAINTAINERS is being updated.  If so, there's probably no need to
+# emit the "does MAINTAINERS need updating?" message on file add/move/delete
+		if ($line =~ /^\s*MAINTAINERS\s*\|/) {
+			$reported_maintainer_file = 1;
+		}
+
 # Check signature styles
 		if (!$in_header_lines &&
 		    $line =~ /^(\s*)([a-z0-9_-]+by:|$signature_tags)(\s*)(.*)/i) {
@@ -1904,7 +2475,7 @@ sub process {
 				if (WARN("BAD_SIGN_OFF",
 					 "Do not use whitespace before $ucfirst_sign_off\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =
+					$fixed[$fixlinenr] =
 					    "$ucfirst_sign_off $email";
 				}
 			}
@@ -1912,7 +2483,7 @@ sub process {
 				if (WARN("BAD_SIGN_OFF",
 					 "'$ucfirst_sign_off' is the preferred signature form\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =
+					$fixed[$fixlinenr] =
 					    "$ucfirst_sign_off $email";
 				}
 
@@ -1921,7 +2492,7 @@ sub process {
 				if (WARN("BAD_SIGN_OFF",
 					 "Use a single space after $ucfirst_sign_off\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =
+					$fixed[$fixlinenr] =
 					    "$ucfirst_sign_off $email";
 				}
 			}
@@ -1957,6 +2528,127 @@ sub process {
 			}
 		}
 
+# Check email subject for common tools that don't need to be mentioned
+		if ($in_header_lines &&
+		    $line =~ /^Subject:.*\b(?:checkpatch|sparse|smatch)\b[^:]/i) {
+			WARN("EMAIL_SUBJECT",
+			     "A patch subject line should describe the change not the tool that found it\n" . $herecurr);
+		}
+
+# Check for old stable address
+		if ($line =~ /^\s*cc:\s*.*<?\bstable\@kernel\.org\b>?.*$/i) {
+			ERROR("STABLE_ADDRESS",
+			      "The 'stable' address should be 'stable\@vger.kernel.org'\n" . $herecurr);
+		}
+
+# Check for unwanted Gerrit info
+		if ($in_commit_log && $line =~ /^\s*change-id:/i) {
+			ERROR("GERRIT_CHANGE_ID",
+			      "Remove Gerrit Change-Id's before submitting upstream.\n" . $herecurr);
+		}
+
+# Check if the commit log is in a possible stack dump
+		if ($in_commit_log && !$commit_log_possible_stack_dump &&
+		    ($line =~ /^\s*(?:WARNING:|BUG:)/ ||
+		     $line =~ /^\s*\[\s*\d+\.\d{6,6}\s*\]/ ||
+					# timestamp
+		     $line =~ /^\s*\[\<[0-9a-fA-F]{8,}\>\]/)) {
+					# stack dump address
+			$commit_log_possible_stack_dump = 1;
+		}
+
+# Check for line lengths > 75 in commit log, warn once
+		if ($in_commit_log && !$commit_log_long_line &&
+		    length($line) > 75 &&
+		    !($line =~ /^\s*[a-zA-Z0-9_\/\.]+\s+\|\s+\d+/ ||
+					# file delta changes
+		      $line =~ /^\s*(?:[\w\.\-]+\/)++[\w\.\-]+:/ ||
+					# filename then :
+		      $line =~ /^\s*(?:Fixes:|Link:)/i ||
+					# A Fixes: or Link: line
+		      $commit_log_possible_stack_dump)) {
+			WARN("COMMIT_LOG_LONG_LINE",
+			     "Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr);
+			$commit_log_long_line = 1;
+		}
+
+# Reset possible stack dump if a blank line is found
+		if ($in_commit_log && $commit_log_possible_stack_dump &&
+		    $line =~ /^\s*$/) {
+			$commit_log_possible_stack_dump = 0;
+		}
+
+# Check for git id commit length and improperly formed commit descriptions
+		if ($in_commit_log && !$commit_log_possible_stack_dump &&
+		    $line !~ /^\s*(?:Link|Patchwork|http|https|BugLink):/i &&
+		    $line !~ /^This reverts commit [0-9a-f]{7,40}/ &&
+		    ($line =~ /\bcommit\s+[0-9a-f]{5,}\b/i ||
+		     ($line =~ /(?:\s|^)[0-9a-f]{12,40}(?:[\s"'\(\[]|$)/i &&
+		      $line !~ /[\<\[][0-9a-f]{12,40}[\>\]]/i &&
+		      $line !~ /\bfixes:\s*[0-9a-f]{12,40}/i))) {
+			my $init_char = "c";
+			my $orig_commit = "";
+			my $short = 1;
+			my $long = 0;
+			my $case = 1;
+			my $space = 1;
+			my $hasdesc = 0;
+			my $hasparens = 0;
+			my $id = '0123456789ab';
+			my $orig_desc = "commit description";
+			my $description = "";
+
+			if ($line =~ /\b(c)ommit\s+([0-9a-f]{5,})\b/i) {
+				$init_char = $1;
+				$orig_commit = lc($2);
+			} elsif ($line =~ /\b([0-9a-f]{12,40})\b/i) {
+				$orig_commit = lc($1);
+			}
+
+			$short = 0 if ($line =~ /\bcommit\s+[0-9a-f]{12,40}/i);
+			$long = 1 if ($line =~ /\bcommit\s+[0-9a-f]{41,}/i);
+			$space = 0 if ($line =~ /\bcommit [0-9a-f]/i);
+			$case = 0 if ($line =~ /\b[Cc]ommit\s+[0-9a-f]{5,40}[^A-F]/);
+			if ($line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("([^"]+)"\)/i) {
+				$orig_desc = $1;
+				$hasparens = 1;
+			} elsif ($line =~ /\bcommit\s+[0-9a-f]{5,}\s*$/i &&
+				 defined $rawlines[$linenr] &&
+				 $rawlines[$linenr] =~ /^\s*\("([^"]+)"\)/) {
+				$orig_desc = $1;
+				$hasparens = 1;
+			} elsif ($line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("[^"]+$/i &&
+				 defined $rawlines[$linenr] &&
+				 $rawlines[$linenr] =~ /^\s*[^"]+"\)/) {
+				$line =~ /\bcommit\s+[0-9a-f]{5,}\s+\("([^"]+)$/i;
+				$orig_desc = $1;
+				$rawlines[$linenr] =~ /^\s*([^"]+)"\)/;
+				$orig_desc .= " " . $1;
+				$hasparens = 1;
+			}
+
+			($id, $description) = git_commit_info($orig_commit,
+							      $id, $orig_desc);
+
+			if (defined($id) &&
+			   ($short || $long || $space || $case || ($orig_desc ne $description) || !$hasparens)) {
+				ERROR("GIT_COMMIT_ID",
+				      "Please use git commit description style 'commit <12+ chars of sha1> (\"<title line>\")' - ie: '${init_char}ommit $id (\"$description\")'\n" . $herecurr);
+			}
+		}
+
+# Check for added, moved or deleted files
+		if (!$reported_maintainer_file && !$in_commit_log &&
+		    ($line =~ /^(?:new|deleted) file mode\s*\d+\s*$/ ||
+		     $line =~ /^rename (?:from|to) [\w\/\.\-]+\s*$/ ||
+		     ($line =~ /\{\s*([\w\/\.\-]*)\s*\=\>\s*([\w\/\.\-]*)\s*\}/ &&
+		      (defined($1) || defined($2))))) {
+			$is_patch = 1;
+			$reported_maintainer_file = 1;
+			WARN("FILE_PATH_CHANGES",
+			     "added, moved or deleted file(s), does MAINTAINERS need updating?\n" . $herecurr);
+		}
+
 # Check for wrappage within a valid hunk of the file
 		if ($realcnt != 0 && $line !~ m{^(?:\+|-| |\\ No newline|$)}) {
 			ERROR("CORRUPTED_PATCH",
@@ -1964,20 +2656,6 @@ sub process {
 				$herecurr) if (!$emitted_corrupt++);
 		}
 
-# Check for absolute kernel paths.
-		if ($tree) {
-			while ($line =~ m{(?:^|\s)(/\S*)}g) {
-				my $file = $1;
-
-				if ($file =~ m{^(.*?)(?::\d+)+:?$} &&
-				    check_absolute_file($1, $herecurr)) {
-					#
-				} else {
-					check_absolute_file($file, $herecurr);
-				}
-			}
-		}
-
 # UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php
 		if (($realfile =~ /^$/ || $line =~ /^\+/) &&
 		    $rawline !~ m/^$UTF8*$/) {
@@ -1994,9 +2672,11 @@ sub process {
 # Check if it's the start of a commit log
 # (not a header line and we haven't seen the patch filename)
 		if ($in_header_lines && $realfile =~ /^$/ &&
-		    $rawline !~ /^(commit\b|from\b|[\w-]+:).+$/i) {
+		    !($rawline =~ /^\s+(?:\S|$)/ ||
+		      $rawline =~ /^(?:commit\b|from\b|[\w-]+:)/i)) {
 			$in_header_lines = 0;
 			$in_commit_log = 1;
+			$has_commit_log = 1;
 		}
 
 # Check if there is UTF-8 in a commit log when a mail header has explicitly
@@ -2013,6 +2693,20 @@ sub process {
 			    "8-bit UTF-8 used in possible commit log\n" . $herecurr);
 		}
 
+# Check for absolute kernel paths in commit message
+		if ($tree && $in_commit_log) {
+			while ($line =~ m{(?:^|\s)(/\S*)}g) {
+				my $file = $1;
+
+				if ($file =~ m{^(.*?)(?::\d+)+:?$} &&
+				    check_absolute_file($1, $herecurr)) {
+					#
+				} else {
+					check_absolute_file($file, $herecurr);
+				}
+			}
+		}
+
 # Check for various typo / spelling mistakes
 		if (defined($misspellings) &&
 		    ($in_commit_log || $line =~ /^(?:\+|Subject:)/i)) {
@@ -2040,14 +2734,14 @@ sub process {
 			if (ERROR("DOS_LINE_ENDINGS",
 				  "DOS line endings\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/[\s\015]+$//;
+				$fixed[$fixlinenr] =~ s/[\s\015]+$//;
 			}
 		} elsif ($rawline =~ /^\+.*\S\s+$/ || $rawline =~ /^\+\s+$/) {
 			my $herevet = "$here\n" . cat_vet($rawline) . "\n";
 			if (ERROR("TRAILING_WHITESPACE",
 				  "trailing whitespace\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\s+$//;
+				$fixed[$fixlinenr] =~ s/\s+$//;
 			}
 
 			$rpt_cleaners = 1;
@@ -2055,6 +2749,7 @@ sub process {
 
 # Check for FSF mailing addresses.
 		if ($rawline =~ /\bwrite to the Free/i ||
+		    $rawline =~ /\b675\s+Mass\s+Ave/i ||
 		    $rawline =~ /\b59\s+Temple\s+Pl/i ||
 		    $rawline =~ /\b51\s+Franklin\s+St/i) {
 			my $herevet = "$here\n" . cat_vet($rawline) . "\n";
@@ -2068,7 +2763,7 @@ sub process {
 # Only applies when adding the entry originally, after that we do not have
 # sufficient context to determine whether it is indeed long enough.
 		if ($realfile =~ /Kconfig/ &&
-		    $line =~ /.\s*config\s+/) {
+		    $line =~ /^\+\s*config\s+/) {
 			my $length = 0;
 			my $cnt = $realcnt;
 			my $ln = $linenr + 1;
@@ -2081,10 +2776,11 @@ sub process {
 				$is_end = $lines[$ln - 1] =~ /^\+/;
 
 				next if ($f =~ /^-/);
+				last if (!$file && $f =~ /^\@\@/);
 
-				if ($lines[$ln - 1] =~ /.\s*(?:bool|tristate)\s*\"/) {
+				if ($lines[$ln - 1] =~ /^\+\s*(?:bool|tristate)\s*\"/) {
 					$is_start = 1;
-				} elsif ($lines[$ln - 1] =~ /.\s*(?:---)?help(?:---)?$/) {
+				} elsif ($lines[$ln - 1] =~ /^\+\s*(?:---)?help(?:---)?$/) {
 					$length = -1;
 				}
 
@@ -2098,16 +2794,29 @@ sub process {
 				}
 				$length++;
 			}
-			WARN("CONFIG_DESCRIPTION",
-			     "please write a paragraph that describes the config symbol fully\n" . $herecurr) if ($is_start && $is_end && $length < 4);
+			if ($is_start && $is_end && $length < $min_conf_desc_length) {
+				WARN("CONFIG_DESCRIPTION",
+				     "please write a paragraph that describes the config symbol fully\n" . $herecurr);
+			}
 			#print "is_start<$is_start> is_end<$is_end> length<$length>\n";
 		}
 
-# discourage the addition of CONFIG_EXPERIMENTAL in Kconfig.
+# check for MAINTAINERS entries that don't have the right form
+		if ($realfile =~ /^MAINTAINERS$/ &&
+		    $rawline =~ /^\+[A-Z]:/ &&
+		    $rawline !~ /^\+[A-Z]:\t\S/) {
+			if (WARN("MAINTAINERS_STYLE",
+				 "MAINTAINERS entries use one tab after TYPE:\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/^(\+[A-Z]):\s*/$1:\t/;
+			}
+		}
+
+# discourage the use of boolean for type definition attributes of Kconfig options
 		if ($realfile =~ /Kconfig/ &&
-		    $line =~ /.\s*depends on\s+.*\bEXPERIMENTAL\b/) {
-			WARN("CONFIG_EXPERIMENTAL",
-			     "Use of CONFIG_EXPERIMENTAL is deprecated. For alternatives, see https://lkml.org/lkml/2012/10/23/580\n");
+		    $line =~ /^\+\s*\bboolean\b/) {
+			WARN("CONFIG_TYPE_BOOLEAN",
+			     "Use of boolean is deprecated, please use bool instead.\n" . $herecurr);
 		}
 
 		if (($realfile =~ /Makefile.*/ || $realfile =~ /Kbuild.*/) &&
@@ -2125,65 +2834,93 @@ sub process {
 		}
 
 # check for DT compatible documentation
-		if (defined $root && $realfile =~ /\.dts/ &&
-		    $rawline =~ /^\+\s*compatible\s*=/) {
+		if (defined $root &&
+			(($realfile =~ /\.dtsi?$/ && $line =~ /^\+\s*compatible\s*=\s*\"/) ||
+			 ($realfile =~ /\.[ch]$/ && $line =~ /^\+.*\.compatible\s*=\s*\"/))) {
+
 			my @compats = $rawline =~ /\"([a-zA-Z0-9\-\,\.\+_]+)\"/g;
 
+			my $dt_path = $root . "/Documentation/devicetree/bindings/";
+			my $vp_file = $dt_path . "vendor-prefixes.txt";
+
 			foreach my $compat (@compats) {
 				my $compat2 = $compat;
-				my $dt_path =  $root . "/Documentation/devicetree/bindings/";
-				$compat2 =~ s/\,[a-z]*\-/\,<\.\*>\-/;
-				`grep -Erq "$compat|$compat2" $dt_path`;
+				$compat2 =~ s/\,[a-zA-Z0-9]*\-/\,<\.\*>\-/;
+				my $compat3 = $compat;
+				$compat3 =~ s/\,([a-z]*)[0-9]*\-/\,$1<\.\*>\-/;
+				`grep -Erq "$compat|$compat2|$compat3" $dt_path`;
 				if ( $? >> 8 ) {
 					WARN("UNDOCUMENTED_DT_STRING",
 					     "DT compatible string \"$compat\" appears un-documented -- check $dt_path\n" . $herecurr);
 				}
 
-				my $vendor = $compat;
-				my $vendor_path = $dt_path . "vendor-prefixes.txt";
-				next if (! -f $vendor_path);
-				$vendor =~ s/^([a-zA-Z0-9]+)\,.*/$1/;
-				`grep -Eq "$vendor" $vendor_path`;
+				next if $compat !~ /^([a-zA-Z0-9\-]+)\,/;
+				my $vendor = $1;
+				`grep -Eq "^$vendor\\b" $vp_file`;
 				if ( $? >> 8 ) {
 					WARN("UNDOCUMENTED_DT_STRING",
-					     "DT compatible string vendor \"$vendor\" appears un-documented -- check $vendor_path\n" . $herecurr);
+					     "DT compatible string vendor \"$vendor\" appears un-documented -- check $vp_file\n" . $herecurr);
 				}
 			}
 		}
 
 # check we are in a valid source file if not then ignore this hunk
-		next if ($realfile !~ /\.(h|c|s|S|pl|sh)$/);
-
-#line length limit
-		if ($line =~ /^\+/ && $prevrawline !~ /\/\*\*/ &&
-		    $rawline !~ /^.\s*\*\s*\@$Ident\s/ &&
-		    !($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(KERN_\S+\s*|[^"]*))?"[X\t]*"\s*(?:|,|\)\s*;)\s*$/ ||
-		    $line =~ /^\+\s*"[^"]*"\s*(?:\s*|,|\)\s*;)\s*$/) &&
-		    $length > $max_line_length)
-		{
-			WARN("LONG_LINE",
-			     "line over $max_line_length characters\n" . $herecurr);
-		}
+		next if ($realfile !~ /\.(h|c|s|S|sh|dtsi|dts)$/);
 
-# Check for user-visible strings broken across lines, which breaks the ability
-# to grep for the string.  Make exceptions when the previous string ends in a
-# newline (multiple lines in one string constant) or '\t', '\r', ';', or '{'
-# (common in inline assembly) or is a octal \123 or hexadecimal \xaf value
-		if ($line =~ /^\+\s*"/ &&
-		    $prevline =~ /"\s*$/ &&
-		    $prevrawline !~ /(?:\\(?:[ntr]|[0-7]{1,3}|x[0-9a-fA-F]{1,2})|;\s*|\{\s*)"\s*$/) {
-			WARN("SPLIT_STRING",
-			     "quoted string split across lines\n" . $hereprev);
-		}
+# line length limit (with some exclusions)
+#
+# There are a few types of lines that may extend beyond $max_line_length:
+#	logging functions like pr_info that end in a string
+#	lines with a single string
+#	#defines that are a single string
+#
+# There are 3 different line length message types:
+# LONG_LINE_COMMENT	a comment starts before but extends beyond $max_linelength
+# LONG_LINE_STRING	a string starts before but extends beyond $max_line_length
+# LONG_LINE		all other lines longer than $max_line_length
+#
+# if LONG_LINE is ignored, the other 2 types are also ignored
+#
 
-# check for spaces before a quoted newline
-		if ($rawline =~ /^.*\".*\s\\n/) {
-			if (WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE",
-				 "unnecessary whitespace before a quoted newline\n" . $herecurr) &&
-			    $fix) {
-				$fixed[$linenr - 1] =~ s/^(\+.*\".*)\s+\\n/$1\\n/;
+		if ($line =~ /^\+/ && $length > $max_line_length) {
+			my $msg_type = "LONG_LINE";
+
+			# Check the allowed long line types first
+
+			# logging functions that end in a string that starts
+			# before $max_line_length
+			if ($line =~ /^\+\s*$logFunctions\s*\(\s*(?:(?:KERN_\S+\s*|[^"]*))?($String\s*(?:|,|\)\s*;)\s*)$/ &&
+			    length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+				$msg_type = "";
+
+			# lines with only strings (w/ possible termination)
+			# #defines with only strings
+			} elsif ($line =~ /^\+\s*$String\s*(?:\s*|,|\)\s*;)\s*$/ ||
+				 $line =~ /^\+\s*#\s*define\s+\w+\s+$String$/) {
+				$msg_type = "";
+
+			# EFI_GUID is another special case
+			} elsif ($line =~ /^\+.*\bEFI_GUID\s*\(/) {
+				$msg_type = "";
+
+			# Otherwise set the alternate message types
+
+			# a comment starts before $max_line_length
+			} elsif ($line =~ /($;[\s$;]*)$/ &&
+				 length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+				$msg_type = "LONG_LINE_COMMENT"
+
+			# a quoted string starts before $max_line_length
+			} elsif ($sline =~ /\s*($String(?:\s*(?:\\|,\s*|\)\s*;\s*))?)$/ &&
+				 length(expand_tabs(substr($line, 1, length($line) - length($1) - 1))) <= $max_line_length) {
+				$msg_type = "LONG_LINE_STRING"
 			}
 
+			if ($msg_type ne "" &&
+			    (show_type("LONG_LINE") || show_type($msg_type))) {
+				WARN($msg_type,
+				     "line over $max_line_length characters\n" . $herecurr);
+			}
 		}
 
 # check for adding lines without a newline.
@@ -2207,7 +2944,7 @@ sub process {
 		}
 
 # check we are in a valid source file C or perl if not then ignore this hunk
-		next if ($realfile !~ /\.(h|c|pl)$/);
+		next if ($realfile !~ /\.(h|c|pl|dtsi|dts)$/);
 
 # at the beginning of a line any tabs must come first and anything
 # more than 8 must use tabs.
@@ -2218,7 +2955,7 @@ sub process {
 			if (ERROR("CODE_INDENT",
 				  "code indent should use tabs where possible\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
+				$fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
 			}
 		}
 
@@ -2228,9 +2965,9 @@ sub process {
 			if (WARN("SPACE_BEFORE_TAB",
 				"please, no space before tabs\n" . $herevet) &&
 			    $fix) {
-				while ($fixed[$linenr - 1] =~
+				while ($fixed[$fixlinenr] =~
 					   s/(^\+.*) {8,8}\t/$1\t\t/) {}
-				while ($fixed[$linenr - 1] =~
+				while ($fixed[$fixlinenr] =~
 					   s/(^\+.*) +\t/$1\t/) {}
 			}
 		}
@@ -2241,9 +2978,22 @@ sub process {
 			    "Logical continuations should be on the previous line\n" . $hereprev);
 		}
 
+# check indentation starts on a tab stop
+		if ($^V && $^V ge 5.10.0 &&
+		    $sline =~ /^\+\t+( +)(?:$c90_Keywords\b|\{\s*$|\}\s*(?:else\b|while\b|\s*$))/) {
+			my $indent = length($1);
+			if ($indent % 8) {
+				if (WARN("TABSTOP",
+					 "Statements should start on a tabstop\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s@(^\+\t+) +@$1 . "\t" x ($indent/8)@e;
+				}
+			}
+		}
+
 # check multi-line statement indentation matches previous line
 		if ($^V && $^V ge 5.10.0 &&
-		    $prevline =~ /^\+(\t*)(if \(|$Ident\().*(\&\&|\|\||,)\s*$/) {
+		    $prevline =~ /^\+([ \t]*)((?:$c90_Keywords(?:\s+if)\s*)|(?:$Declare\s*)?(?:$Ident|\(\s*\*\s*$Ident\s*\))\s*|(?:\*\s*)*$Lval\s*=\s*$Ident\s*)\(.*(\&\&|\|\||,)\s*$/) {
 			$prevline =~ /^\+(\t*)(.*)$/;
 			my $oldindent = $1;
 			my $rest = $2;
@@ -2264,45 +3014,154 @@ sub process {
 					if (CHK("PARENTHESIS_ALIGNMENT",
 						"Alignment should match open parenthesis\n" . $hereprev) &&
 					    $fix && $line =~ /^\+/) {
-						$fixed[$linenr - 1] =~
+						$fixed[$fixlinenr] =~
 						    s/^\+[ \t]*/\+$goodtabindent/;
 					}
 				}
 			}
 		}
 
-		if ($line =~ /^\+.*\*[ \t]*\)[ \t]+(?!$Assignment|$Arithmetic)/) {
+# check for space after cast like "(int) foo" or "(struct foo) bar"
+# avoid checking a few false positives:
+#   "sizeof(<type>)" or "__alignof__(<type>)"
+#   function pointer declarations like "(*foo)(int) = bar;"
+#   structure definitions like "(struct foo) { 0 };"
+#   multiline macros that define functions
+#   known attributes or the __attribute__ keyword
+		if ($line =~ /^\+(.*)\(\s*$Type\s*\)([ \t]++)((?![={]|\\$|$Attribute|__attribute__))/ &&
+		    (!defined($1) || $1 !~ /\b(?:sizeof|__alignof__)\s*$/)) {
 			if (CHK("SPACING",
-				"No space is necessary after a cast\n" . $hereprev) &&
+				"No space is necessary after a cast\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
-				    s/^(\+.*\*[ \t]*\))[ \t]+/$1/;
+				$fixed[$fixlinenr] =~
+				    s/(\(\s*$Type\s*\))[ \t]+/$1/;
 			}
 		}
 
+# Block comment styles
+# Networking with an initial /*
 		if ($realfile =~ m@^(drivers/net/|net/)@ &&
 		    $prevrawline =~ /^\+[ \t]*\/\*[ \t]*$/ &&
-		    $rawline =~ /^\+[ \t]*\*/) {
+		    $rawline =~ /^\+[ \t]*\*/ &&
+		    $realline > 2) {
 			WARN("NETWORKING_BLOCK_COMMENT_STYLE",
 			     "networking block comments don't use an empty /* line, use /* Comment...\n" . $hereprev);
 		}
 
-		if ($realfile =~ m@^(drivers/net/|net/)@ &&
-		    $prevrawline =~ /^\+[ \t]*\/\*/ &&		#starting /*
+# Block comments use * on subsequent lines
+		if ($prevline =~ /$;[ \t]*$/ &&			#ends in comment
+		    $prevrawline =~ /^\+.*?\/\*/ &&		#starting /*
 		    $prevrawline !~ /\*\/[ \t]*$/ &&		#no trailing */
 		    $rawline =~ /^\+/ &&			#line is new
 		    $rawline !~ /^\+[ \t]*\*/) {		#no leading *
-			WARN("NETWORKING_BLOCK_COMMENT_STYLE",
-			     "networking block comments start with * on subsequent lines\n" . $hereprev);
+			WARN("BLOCK_COMMENT_STYLE",
+			     "Block comments use * on subsequent lines\n" . $hereprev);
 		}
 
-		if ($realfile =~ m@^(drivers/net/|net/)@ &&
-		    $rawline !~ m@^\+[ \t]*\*/[ \t]*$@ &&	#trailing */
+# Block comments use */ on trailing lines
+		if ($rawline !~ m@^\+[ \t]*\*/[ \t]*$@ &&	#trailing */
 		    $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ &&	#inline /*...*/
 		    $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ &&	#trailing **/
 		    $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) {	#non blank */
-			WARN("NETWORKING_BLOCK_COMMENT_STYLE",
-			     "networking block comments put the trailing */ on a separate line\n" . $herecurr);
+			WARN("BLOCK_COMMENT_STYLE",
+			     "Block comments use a trailing */ on a separate line\n" . $herecurr);
+		}
+
+# Block comment * alignment
+		if ($prevline =~ /$;[ \t]*$/ &&			#ends in comment
+		    $line =~ /^\+[ \t]*$;/ &&			#leading comment
+		    $rawline =~ /^\+[ \t]*\*/ &&		#leading *
+		    (($prevrawline =~ /^\+.*?\/\*/ &&		#leading /*
+		      $prevrawline !~ /\*\/[ \t]*$/) ||		#no trailing */
+		     $prevrawline =~ /^\+[ \t]*\*/)) {		#leading *
+			my $oldindent;
+			$prevrawline =~ m@^\+([ \t]*/?)\*@;
+			if (defined($1)) {
+				$oldindent = expand_tabs($1);
+			} else {
+				$prevrawline =~ m@^\+(.*/?)\*@;
+				$oldindent = expand_tabs($1);
+			}
+			$rawline =~ m@^\+([ \t]*)\*@;
+			my $newindent = $1;
+			$newindent = expand_tabs($newindent);
+			if (length($oldindent) ne length($newindent)) {
+				WARN("BLOCK_COMMENT_STYLE",
+				     "Block comments should align the * on each line\n" . $hereprev);
+			}
+		}
+
+# check for missing blank lines after struct/union declarations
+# with exceptions for various attributes and macros
+		if ($prevline =~ /^[\+ ]};?\s*$/ &&
+		    $line =~ /^\+/ &&
+		    !($line =~ /^\+\s*$/ ||
+		      $line =~ /^\+\s*EXPORT_SYMBOL/ ||
+		      $line =~ /^\+\s*MODULE_/i ||
+		      $line =~ /^\+\s*\#\s*(?:end|elif|else)/ ||
+		      $line =~ /^\+[a-z_]*init/ ||
+		      $line =~ /^\+\s*(?:static\s+)?[A-Z_]*ATTR/ ||
+		      $line =~ /^\+\s*DECLARE/ ||
+		      $line =~ /^\+\s*__setup/)) {
+			if (CHK("LINE_SPACING",
+				"Please use a blank line after function/struct/union/enum declarations\n" . $hereprev) &&
+			    $fix) {
+				fix_insert_line($fixlinenr, "\+");
+			}
+		}
+
+# check for multiple consecutive blank lines
+		if ($prevline =~ /^[\+ ]\s*$/ &&
+		    $line =~ /^\+\s*$/ &&
+		    $last_blank_line != ($linenr - 1)) {
+			if (CHK("LINE_SPACING",
+				"Please don't use multiple blank lines\n" . $hereprev) &&
+			    $fix) {
+				fix_delete_line($fixlinenr, $rawline);
+			}
+
+			$last_blank_line = $linenr;
+		}
+
+# check for missing blank lines after declarations
+		if ($sline =~ /^\+\s+\S/ &&			#Not at char 1
+			# actual declarations
+		    ($prevline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+			# function pointer declarations
+		     $prevline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+			# foo bar; where foo is some local typedef or #define
+		     $prevline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+			# known declaration macros
+		     $prevline =~ /^\+\s+$declaration_macros/) &&
+			# for "else if" which can look like "$Ident $Ident"
+		    !($prevline =~ /^\+\s+$c90_Keywords\b/ ||
+			# other possible extensions of declaration lines
+		      $prevline =~ /(?:$Compare|$Assignment|$Operators)\s*$/ ||
+			# not starting a section or a macro "\" extended line
+		      $prevline =~ /(?:\{\s*|\\)$/) &&
+			# looks like a declaration
+		    !($sline =~ /^\+\s+$Declare\s*$Ident\s*[=,;:\[]/ ||
+			# function pointer declarations
+		      $sline =~ /^\+\s+$Declare\s*\(\s*\*\s*$Ident\s*\)\s*[=,;:\[\(]/ ||
+			# foo bar; where foo is some local typedef or #define
+		      $sline =~ /^\+\s+$Ident(?:\s+|\s*\*\s*)$Ident\s*[=,;\[]/ ||
+			# known declaration macros
+		      $sline =~ /^\+\s+$declaration_macros/ ||
+			# start of struct or union or enum
+		      $sline =~ /^\+\s+(?:union|struct|enum|typedef)\b/ ||
+			# start or end of block or continuation of declaration
+		      $sline =~ /^\+\s+(?:$|[\{\}\.\#\"\?\:\(\[])/ ||
+			# bitfield continuation
+		      $sline =~ /^\+\s+$Ident\s*:\s*\d+\s*[,;]/ ||
+			# other possible extensions of declaration lines
+		      $sline =~ /^\+\s+\(?\s*(?:$Compare|$Assignment|$Operators)/) &&
+			# indentation of previous and current line are the same
+		    (($prevline =~ /\+(\s+)\S/) && $sline =~ /^\+$1\S/)) {
+			if (WARN("LINE_SPACING",
+				 "Missing a blank line after declarations\n" . $hereprev) &&
+			    $fix) {
+				fix_insert_line($fixlinenr, "\+");
+			}
 		}
 
 # check for spaces at the beginning of a line.
@@ -2315,17 +3174,46 @@ sub process {
 			if (WARN("LEADING_SPACE",
 				 "please, no spaces at the start of a line\n" . $herevet) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
+				$fixed[$fixlinenr] =~ s/^\+([ \t]+)/"\+" . tabify($1)/e;
 			}
 		}
 
 # check we are in a valid C source file if not then ignore this hunk
 		next if ($realfile !~ /\.(h|c)$/);
 
-# discourage the addition of CONFIG_EXPERIMENTAL in #if(def).
-		if ($line =~ /^\+\s*\#\s*if.*\bCONFIG_EXPERIMENTAL\b/) {
-			WARN("CONFIG_EXPERIMENTAL",
-			     "Use of CONFIG_EXPERIMENTAL is deprecated. For alternatives, see https://lkml.org/lkml/2012/10/23/580\n");
+# check if this appears to be the start function declaration, save the name
+		if ($sline =~ /^\+\{\s*$/ &&
+		    $prevline =~ /^\+(?:(?:(?:$Storage|$Inline)\s*)*\s*$Type\s*)?($Ident)\(/) {
+			$context_function = $1;
+		}
+
+# check if this appears to be the end of function declaration
+		if ($sline =~ /^\+\}\s*$/) {
+			undef $context_function;
+		}
+
+# check indentation of any line with a bare else
+# (but not if it is a multiple line "if (foo) return bar; else return baz;")
+# if the previous line is a break or return and is indented 1 tab more...
+		if ($sline =~ /^\+([\t]+)(?:}[ \t]*)?else(?:[ \t]*{)?\s*$/) {
+			my $tabs = length($1) + 1;
+			if ($prevline =~ /^\+\t{$tabs,$tabs}break\b/ ||
+			    ($prevline =~ /^\+\t{$tabs,$tabs}return\b/ &&
+			     defined $lines[$linenr] &&
+			     $lines[$linenr] !~ /^[ \+]\t{$tabs,$tabs}return/)) {
+				WARN("UNNECESSARY_ELSE",
+				     "else is not generally useful after a break or return\n" . $hereprev);
+			}
+		}
+
+# check indentation of a line with a break;
+# if the previous line is a goto or return and is indented the same # of tabs
+		if ($sline =~ /^\+([\t]+)break\s*;\s*$/) {
+			my $tabs = $1;
+			if ($prevline =~ /^\+$tabs(?:goto|return)\b/) {
+				WARN("UNNECESSARY_BREAK",
+				     "break is not useful after a goto or return\n" . $hereprev);
+			}
 		}
 
 # check for RCS/CVS revision markers
@@ -2356,7 +3244,7 @@ sub process {
 		my ($stat, $cond, $line_nr_next, $remain_next, $off_next,
 		    $realline_next);
 #print "LINE<$line>\n";
-		if ($linenr >= $suppress_statement &&
+		if ($linenr > $suppress_statement &&
 		    $realcnt && $sline =~ /.\s*\S/) {
 			($stat, $cond, $line_nr_next, $remain_next, $off_next) =
 				ctx_statement_block($linenr, $realcnt, 0);
@@ -2457,7 +3345,7 @@ sub process {
 
 # if/while/etc brace do not go on next line, unless defining a do while loop,
 # or if that brace on the next line is for something else
-		if ($line =~ /(.*)\b((?:if|while|for|switch)\s*\(|do\b|else\b)/ && $line !~ /^.\s*\#/) {
+		if ($line =~ /(.*)\b((?:if|while|for|switch|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|do\b|else\b)/ && $line !~ /^.\s*\#/) {
 			my $pre_ctx = "$1$2";
 
 			my ($level, @ctx) = ctx_statement_level($linenr, $realcnt, 0);
@@ -2484,7 +3372,7 @@ sub process {
 			#print "realcnt<$realcnt> ctx_cnt<$ctx_cnt>\n";
 			#print "pre<$pre_ctx>\nline<$line>\nctx<$ctx>\nnext<$lines[$ctx_ln - 1]>\n";
 
-			if ($ctx !~ /{\s*/ && defined($lines[$ctx_ln -1]) && $lines[$ctx_ln - 1] =~ /^\+\s*{/) {
+			if ($ctx !~ /{\s*/ && defined($lines[$ctx_ln - 1]) && $lines[$ctx_ln - 1] =~ /^\+\s*{/) {
 				ERROR("OPEN_BRACE",
 				      "that open brace { should be on the previous line\n" .
 					"$here\n$ctx\n$rawlines[$ctx_ln - 1]\n");
@@ -2503,7 +3391,7 @@ sub process {
 		}
 
 # Check relative indent for conditionals and blocks.
-		if ($line =~ /\b(?:(?:if|while|for)\s*\(|do\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) {
+		if ($line =~ /\b(?:(?:if|while|for|(?:[a-z_]+|)for_each[a-z_]+)\s*\(|(?:do|else)\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) {
 			($stat, $cond, $line_nr_next, $remain_next, $off_next) =
 				ctx_statement_block($linenr, $realcnt, 0)
 					if (!defined $stat);
@@ -2511,15 +3399,22 @@ sub process {
 
 			substr($s, 0, length($c), '');
 
-			# Make sure we remove the line prefixes as we have
-			# none on the first line, and are going to readd them
-			# where necessary.
-			$s =~ s/\n./\n/gs;
+			# remove inline comments
+			$s =~ s/$;/ /g;
+			$c =~ s/$;/ /g;
 
 			# Find out how long the conditional actually is.
 			my @newlines = ($c =~ /\n/gs);
 			my $cond_lines = 1 + $#newlines;
 
+			# Make sure we remove the line prefixes as we have
+			# none on the first line, and are going to readd them
+			# where necessary.
+			$s =~ s/\n./\n/gs;
+			while ($s =~ /\n\s+\\\n/) {
+				$cond_lines += $s =~ s/\n\s+\\\n/\n/g;
+			}
+
 			# We want to check the first line inside the block
 			# starting at the end of the conditional, so remove:
 			#  1) any blank line termination
@@ -2585,8 +3480,12 @@ sub process {
 
 			#print "line<$line> prevline<$prevline> indent<$indent> sindent<$sindent> check<$check> continuation<$continuation> s<$s> cond_lines<$cond_lines> stat_real<$stat_real> stat<$stat>\n";
 
-			if ($check && (($sindent % 8) != 0 ||
-			    ($sindent <= $indent && $s ne ''))) {
+			if ($check && $s ne '' &&
+			    (($sindent % 8) != 0 ||
+			     ($sindent < $indent) ||
+			     ($sindent == $indent &&
+			      ($s !~ /^\s*(?:\}|\{|else\b)/)) ||
+			     ($sindent > $indent + 8))) {
 				WARN("SUSPECT_CODE_INDENT",
 				     "suspect code indent for conditional statements ($indent, $sindent)\n" . $herecurr . "$stat_real\n");
 			}
@@ -2608,6 +3507,42 @@ sub process {
 #ignore lines not being added
 		next if ($line =~ /^[^\+]/);
 
+# check for dereferences that span multiple lines
+		if ($prevline =~ /^\+.*$Lval\s*(?:\.|->)\s*$/ &&
+		    $line =~ /^\+\s*(?!\#\s*(?!define\s+|if))\s*$Lval/) {
+			$prevline =~ /($Lval\s*(?:\.|->))\s*$/;
+			my $ref = $1;
+			$line =~ /^.\s*($Lval)/;
+			$ref .= $1;
+			$ref =~ s/\s//g;
+			WARN("MULTILINE_DEREFERENCE",
+			     "Avoid multiple line dereference - prefer '$ref'\n" . $hereprev);
+		}
+
+# check for declarations of signed or unsigned without int
+		while ($line =~ m{\b($Declare)\s*(?!char\b|short\b|int\b|long\b)\s*($Ident)?\s*[=,;\[\)\(]}g) {
+			my $type = $1;
+			my $var = $2;
+			$var = "" if (!defined $var);
+			if ($type =~ /^(?:(?:$Storage|$Inline|$Attribute)\s+)*((?:un)?signed)((?:\s*\*)*)\s*$/) {
+				my $sign = $1;
+				my $pointer = $2;
+
+				$pointer = "" if (!defined $pointer);
+
+				if (WARN("UNSPECIFIED_INT",
+					 "Prefer '" . trim($sign) . " int" . rtrim($pointer) . "' to bare use of '$sign" . rtrim($pointer) . "'\n" . $herecurr) &&
+				    $fix) {
+					my $decl = trim($sign) . " int ";
+					my $comp_pointer = $pointer;
+					$comp_pointer =~ s/\s//g;
+					$decl .= $comp_pointer;
+					$decl = rtrim($decl) if ($var eq "");
+					$fixed[$fixlinenr] =~ s@\b$sign\s*\Q$pointer\E\s*$var\b@$decl$var@;
+				}
+			}
+		}
+
 # TEST: allow direct testing of the type matcher.
 		if ($dbg_type) {
 			if ($line =~ /^.\s*$Declare\s*$/) {
@@ -2634,8 +3569,18 @@ sub process {
 # check for initialisation to aggregates open brace on the next line
 		if ($line =~ /^.\s*{/ &&
 		    $prevline =~ /(?:^|[^=])=\s*$/) {
-			ERROR("OPEN_BRACE",
-			      "that open brace { should be on the previous line\n" . $hereprev);
+			if (ERROR("OPEN_BRACE",
+				  "that open brace { should be on the previous line\n" . $hereprev) &&
+			    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = $prevrawline;
+				$fixedline =~ s/\s*=\s*$/ = {/;
+				fix_insert_line($fixlinenr, $fixedline);
+				$fixedline = $line;
+				$fixedline =~ s/^(.\s*)\{\s*/$1/;
+				fix_insert_line($fixlinenr, $fixedline);
+			}
 		}
 
 #
@@ -2660,10 +3605,10 @@ sub process {
 			if (ERROR("C99_COMMENTS",
 				  "do not use C99 // comments\n" . $herecurr) &&
 			    $fix) {
-				my $line = $fixed[$linenr - 1];
+				my $line = $fixed[$fixlinenr];
 				if ($line =~ /\/\/(.*)$/) {
 					my $comment = trim($1);
-					$fixed[$linenr - 1] =~ s@\/\/(.*)$@/\* $comment \*/@;
+					$fixed[$fixlinenr] =~ s@\/\/(.*)$@/\* $comment \*/@;
 				}
 			}
 		}
@@ -2717,24 +3662,30 @@ sub process {
 		}
 
 # check for global initialisers.
-		if ($line =~ /^\+(\s*$Type\s*$Ident\s*(?:\s+$Modifier))*\s*=\s*(0|NULL|false)\s*;/) {
+		if ($line =~ /^\+$Type\s*$Ident(?:\s+$Modifier)*\s*=\s*($zero_initializer)\s*;/) {
 			if (ERROR("GLOBAL_INITIALISERS",
-				  "do not initialise globals to 0 or NULL\n" .
-				      $herecurr) &&
+				  "do not initialise globals to $1\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/($Type\s*$Ident\s*(?:\s+$Modifier))*\s*=\s*(0|NULL|false)\s*;/$1;/;
+				$fixed[$fixlinenr] =~ s/(^.$Type\s*$Ident(?:\s+$Modifier)*)\s*=\s*$zero_initializer\s*;/$1;/;
 			}
 		}
 # check for static initialisers.
-		if ($line =~ /^\+.*\bstatic\s.*=\s*(0|NULL|false)\s*;/) {
+		if ($line =~ /^\+.*\bstatic\s.*=\s*($zero_initializer)\s*;/) {
 			if (ERROR("INITIALISED_STATIC",
-				  "do not initialise statics to 0 or NULL\n" .
+				  "do not initialise statics to $1\n" .
 				      $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(\bstatic\s.*?)\s*=\s*(0|NULL|false)\s*;/$1;/;
+				$fixed[$fixlinenr] =~ s/(\bstatic\s.*?)\s*=\s*$zero_initializer\s*;/$1;/;
 			}
 		}
 
+# check for misordered declarations of char/short/int/long with signed/unsigned
+		while ($sline =~ m{(\b$TypeMisordered\b)}g) {
+			my $tmp = trim($1);
+			WARN("MISORDERED_TYPE",
+			     "type '$tmp' should be specified in [[un]signed] [short|int|long|long long] order\n" . $herecurr);
+		}
+
 # check for static const char * arrays.
 		if ($line =~ /\bstatic\s+const\s+char\s*\*\s*(\w+)\s*\[\s*\]\s*=\s*/) {
 			WARN("STATIC_CONST_CHAR_ARRAY",
@@ -2749,21 +3700,44 @@ sub process {
 				$herecurr);
                }
 
+# check for const <foo> const where <foo> is not a pointer or array type
+		if ($sline =~ /\bconst\s+($BasicType)\s+const\b/) {
+			my $found = $1;
+			if ($sline =~ /\bconst\s+\Q$found\E\s+const\b\s*\*/) {
+				WARN("CONST_CONST",
+				     "'const $found const *' should probably be 'const $found * const'\n" . $herecurr);
+			} elsif ($sline !~ /\bconst\s+\Q$found\E\s+const\s+\w+\s*\[/) {
+				WARN("CONST_CONST",
+				     "'const $found const' should probably be 'const $found'\n" . $herecurr);
+			}
+		}
+
+# check for non-global char *foo[] = {"bar", ...} declarations.
+		if ($line =~ /^.\s+(?:static\s+|const\s+)?char\s+\*\s*\w+\s*\[\s*\]\s*=\s*\{/) {
+			WARN("STATIC_CONST_CHAR_ARRAY",
+			     "char * array declaration might be better as static const\n" .
+				$herecurr);
+               }
+
+# check for sizeof(foo)/sizeof(foo[0]) that could be ARRAY_SIZE(foo)
+		if ($line =~ m@\bsizeof\s*\(\s*($Lval)\s*\)@) {
+			my $array = $1;
+			if ($line =~ m@\b(sizeof\s*\(\s*\Q$array\E\s*\)\s*/\s*sizeof\s*\(\s*\Q$array\E\s*\[\s*0\s*\]\s*\))@) {
+				my $array_div = $1;
+				if (WARN("ARRAY_SIZE",
+					 "Prefer ARRAY_SIZE($array)\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\Q$array_div\E/ARRAY_SIZE($array)/;
+				}
+			}
+		}
+
 # check for function declarations without arguments like "int foo()"
 		if ($line =~ /(\b$Type\s+$Ident)\s*\(\s*\)/) {
 			if (ERROR("FUNCTION_WITHOUT_ARGS",
 				  "Bad function definition - $1() should probably be $1(void)\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(\b($Type)\s+($Ident))\s*\(\s*\)/$2 $3(void)/;
-			}
-		}
-
-# check for uses of DEFINE_PCI_DEVICE_TABLE
-		if ($line =~ /\bDEFINE_PCI_DEVICE_TABLE\s*\(\s*(\w+)\s*\)\s*=/) {
-			if (WARN("DEFINE_PCI_DEVICE_TABLE",
-				 "Prefer struct pci_device_id over deprecated DEFINE_PCI_DEVICE_TABLE\n" . $herecurr) &&
-			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b(?:static\s+|)DEFINE_PCI_DEVICE_TABLE\s*\(\s*(\w+)\s*\)\s*=\s*/static const struct pci_device_id $1\[\] = /;
+				$fixed[$fixlinenr] =~ s/(\b($Type)\s+($Ident))\s*\(\s*\)/$2 $3(void)/;
 			}
 		}
 
@@ -2773,7 +3747,7 @@ sub process {
 		    $line !~ /\btypedef\s+$Type\s*\(\s*\*?$Ident\s*\)\s*\(/ &&
 		    $line !~ /\btypedef\s+$Type\s+$Ident\s*\(/ &&
 		    $line !~ /\b$typeTypedefs\b/ &&
-		    $line !~ /\b__bitwise(?:__|)\b/) {
+		    $line !~ /\b__bitwise\b/) {
 			WARN("NEW_TYPEDEFS",
 			     "do not add new typedefs\n" . $herecurr);
 		}
@@ -2800,7 +3774,7 @@ sub process {
 					my $sub_from = $ident;
 					my $sub_to = $ident;
 					$sub_to =~ s/\Q$from\E/$to/;
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s@\Q$sub_from\E@$sub_to@;
 				}
 			}
@@ -2828,19 +3802,21 @@ sub process {
 					my $sub_from = $match;
 					my $sub_to = $match;
 					$sub_to =~ s/\Q$from\E/$to/;
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s@\Q$sub_from\E@$sub_to@;
 				}
 			}
 		}
 
-# # no BUG() or BUG_ON()
-# 		if ($line =~ /\b(BUG|BUG_ON)\b/) {
-# 			print "Try to use WARN_ON & Recovery code rather than BUG() or BUG_ON()\n";
-# 			print "$herecurr";
-# 			$clean = 0;
-# 		}
+# avoid BUG() or BUG_ON()
+		if ($line =~ /\b(?:BUG|BUG_ON)\b/) {
+			my $msg_type = \&WARN;
+			$msg_type = \&CHK if ($file);
+			&{$msg_type}("AVOID_BUG",
+				     "Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()\n" . $herecurr);
+		}
 
+# avoid LINUX_VERSION_CODE
 		if ($line =~ /\bLINUX_VERSION_CODE\b/) {
 			WARN("LINUX_VERSION_CODE",
 			     "LINUX_VERSION_CODE should be avoided, code should be for the version to which it is merged\n" . $herecurr);
@@ -2849,7 +3825,7 @@ sub process {
 # check for uses of printk_ratelimit
 		if ($line =~ /\bprintk_ratelimit\s*\(/) {
 			WARN("PRINTK_RATELIMITED",
-"Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit\n" . $herecurr);
+			     "Prefer printk_ratelimited or pr_<level>_ratelimited to printk_ratelimit\n" . $herecurr);
 		}
 
 # printk should use KERN_* levels.  Note that follow on printk's on the
@@ -2883,14 +3859,14 @@ sub process {
 			my $level2 = $level;
 			$level2 = "dbg" if ($level eq "debug");
 			WARN("PREFER_PR_LEVEL",
-			     "Prefer netdev_$level2(netdev, ... then dev_$level2(dev, ... then pr_$level(...  to printk(KERN_$orig ...\n" . $herecurr);
+			     "Prefer [subsystem eg: netdev]_$level2([subsystem]dev, ... then dev_$level2(dev, ... then pr_$level(...  to printk(KERN_$orig ...\n" . $herecurr);
 		}
 
 		if ($line =~ /\bpr_warning\s*\(/) {
 			if (WARN("PREFER_PR_LEVEL",
 				 "Prefer pr_warn(... to pr_warning(...\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\bpr_warning\b/pr_warn/;
 			}
 		}
@@ -2904,19 +3880,50 @@ sub process {
 			     "Prefer dev_$level(... to dev_printk(KERN_$orig, ...\n" . $herecurr);
 		}
 
+# ENOSYS means "bad syscall nr" and nothing else.  This will have a small
+# number of false positives, but assembly files are not checked, so at
+# least the arch entry code will not trigger this warning.
+		if ($line =~ /\bENOSYS\b/) {
+			WARN("ENOSYS",
+			     "ENOSYS means 'invalid syscall nr' and nothing else\n" . $herecurr);
+		}
+
 # function brace can't be on same line, except for #defines of do while,
 # or if closed on same line
-		if (($line=~/$Type\s*$Ident\(.*\).*\s\{/) and
+		if (($line=~/$Type\s*$Ident\(.*\).*\s*{/) and
 		    !($line=~/\#\s*define.*do\s\{/) and !($line=~/}/)) {
-			ERROR("OPEN_BRACE",
-			      "open brace '{' following function declarations go on the next line\n" . $herecurr);
+			if (ERROR("OPEN_BRACE",
+				  "open brace '{' following function declarations go on the next line\n" . $herecurr) &&
+			    $fix) {
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixed_line = $rawline;
+				$fixed_line =~ /(^..*$Type\s*$Ident\(.*\)\s*){(.*)$/;
+				my $line1 = $1;
+				my $line2 = $2;
+				fix_insert_line($fixlinenr, ltrim($line1));
+				fix_insert_line($fixlinenr, "\+{");
+				if ($line2 !~ /^\s*$/) {
+					fix_insert_line($fixlinenr, "\+\t" . trim($line2));
+				}
+			}
 		}
 
 # open braces for enum, union and struct go on the same line.
 		if ($line =~ /^.\s*{/ &&
 		    $prevline =~ /^.\s*(?:typedef\s+)?(enum|union|struct)(?:\s+$Ident)?\s*$/) {
-			ERROR("OPEN_BRACE",
-			      "open brace '{' following $1 go on the same line\n" . $hereprev);
+			if (ERROR("OPEN_BRACE",
+				  "open brace '{' following $1 go on the same line\n" . $hereprev) &&
+			    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = rtrim($prevrawline) . " {";
+				fix_insert_line($fixlinenr, $fixedline);
+				$fixedline = $rawline;
+				$fixedline =~ s/^(.\s*)\{\s*/$1\t/;
+				if ($fixedline !~ /^\+\s*$/) {
+					fix_insert_line($fixlinenr, $fixedline);
+				}
+			}
 		}
 
 # missing space after union, struct or enum definition
@@ -2924,7 +3931,7 @@ sub process {
 			if (WARN("SPACING",
 				 "missing space after $1 definition\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/^(.\s*(?:typedef\s+)?(?:enum|union|struct)(?:\s+$Ident){1,2})([=\{])/$1 $2/;
 			}
 		}
@@ -2932,10 +3939,7 @@ sub process {
 # Function pointer declarations
 # check spacing between type, funcptr, and args
 # canonical declaration is "type (*funcptr)(args...)"
-#
-# the $Declare variable will capture all spaces after the type
-# so check it for trailing missing spaces or multiple spaces
-		if ($line =~ /^.\s*($Declare)\((\s*)\*(\s*)$Ident(\s*)\)(\s*)\(/) {
+		if ($line =~ /^.\s*($Declare)\((\s*)\*(\s*)($Ident)(\s*)\)(\s*)\(/) {
 			my $declare = $1;
 			my $pre_pointer_space = $2;
 			my $post_pointer_space = $3;
@@ -2943,16 +3947,30 @@ sub process {
 			my $post_funcname_space = $5;
 			my $pre_args_space = $6;
 
-			if ($declare !~ /\s$/) {
+# the $Declare variable will capture all spaces after the type
+# so check it for a missing trailing missing space but pointer return types
+# don't need a space so don't warn for those.
+			my $post_declare_space = "";
+			if ($declare =~ /(\s+)$/) {
+				$post_declare_space = $1;
+				$declare = rtrim($declare);
+			}
+			if ($declare !~ /\*$/ && $post_declare_space =~ /^$/) {
 				WARN("SPACING",
 				     "missing space after return type\n" . $herecurr);
+				$post_declare_space = " ";
 			}
 
 # unnecessary space "type  (*funcptr)(args...)"
-			elsif ($declare =~ /\s{2,}$/) {
-				WARN("SPACING",
-				     "Multiple spaces after return type\n" . $herecurr);
-			}
+# This test is not currently implemented because these declarations are
+# equivalent to
+#	int  foo(int bar, ...)
+# and this is form shouldn't/doesn't generate a checkpatch warning.
+#
+#			elsif ($declare =~ /\s{2,}$/) {
+#				WARN("SPACING",
+#				     "Multiple spaces after return type\n" . $herecurr);
+#			}
 
 # unnecessary space "type ( *funcptr)(args...)"
 			if (defined $pre_pointer_space &&
@@ -2983,8 +4001,8 @@ sub process {
 			}
 
 			if (show_type("SPACING") && $fix) {
-				$fixed[$linenr - 1] =~
-				    s/^(.\s*$Declare)\(\s*\*\s*($Ident)\s*\)\s*\(/rtrim($1) . " " . "\(\*$2\)\("/ex;
+				$fixed[$fixlinenr] =~
+				    s/^(.\s*)$Declare\s*\(\s*\*\s*$Ident\s*\)\s*\(/$1 . $declare . $post_declare_space . '(*' . $funcname . ')('/ex;
 			}
 		}
 
@@ -3000,7 +4018,7 @@ sub process {
 				if (ERROR("BRACKET_SPACE",
 					  "space prohibited before open square bracket '['\n" . $herecurr) &&
 				    $fix) {
-				    $fixed[$linenr - 1] =~
+				    $fixed[$fixlinenr] =~
 					s/^(\+.*?)\s+\[/$1\[/;
 				}
 			}
@@ -3035,7 +4053,7 @@ sub process {
 				if (WARN("SPACING",
 					 "space prohibited between function name and open parenthesis '('\n" . $herecurr) &&
 					     $fix) {
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s/\b$name\s+\(/$name\(/;
 				}
 			}
@@ -3126,7 +4144,7 @@ sub process {
 
 				# Ignore operators passed as parameters.
 				if ($op_type ne 'V' &&
-				    $ca =~ /\s$/ && $cc =~ /^\s*,/) {
+				    $ca =~ /\s$/ && $cc =~ /^\s*[,\)]/) {
 
 #				# Ignore comments
 #				} elsif ($op =~ /^$;+$/) {
@@ -3145,10 +4163,13 @@ sub process {
 				# // is a comment
 				} elsif ($op eq '//') {
 
+				#   :   when part of a bitfield
+				} elsif ($opv eq ':B') {
+					# skip the bitfield test for now
+
 				# No spaces for:
 				#   ->
-				#   :   when part of a bitfield
-				} elsif ($op eq '->' || $opv eq ':B') {
+				} elsif ($op eq '->') {
 					if ($ctx =~ /Wx.|.xW/) {
 						if (ERROR("SPACING",
 							  "spaces prohibited around that '$op' $at\n" . $hereptr)) {
@@ -3160,14 +4181,33 @@ sub process {
 						}
 					}
 
-				# , must have a space on the right.
+				# , must not have a space before and must have a space on the right.
 				} elsif ($op eq ',') {
+					my $rtrim_before = 0;
+					my $space_after = 0;
+					if ($ctx =~ /Wx./) {
+						if (ERROR("SPACING",
+							  "space prohibited before that '$op' $at\n" . $hereptr)) {
+							$line_fixed = 1;
+							$rtrim_before = 1;
+						}
+					}
 					if ($ctx !~ /.x[WEC]/ && $cc !~ /^}/) {
 						if (ERROR("SPACING",
 							  "space required after that '$op' $at\n" . $hereptr)) {
-							$good = $fix_elements[$n] . trim($fix_elements[$n + 1]) . " ";
 							$line_fixed = 1;
 							$last_after = $n;
+							$space_after = 1;
+						}
+					}
+					if ($rtrim_before || $space_after) {
+						if ($rtrim_before) {
+							$good = rtrim($fix_elements[$n]) . trim($fix_elements[$n + 1]);
+						} else {
+							$good = $fix_elements[$n] . trim($fix_elements[$n + 1]);
+						}
+						if ($space_after) {
+							$good .= " ";
 						}
 					}
 
@@ -3239,7 +4279,22 @@ sub process {
 					 $op eq '*' or $op eq '/' or
 					 $op eq '%')
 				{
-					if ($ctx =~ /Wx[^WCE]|[^WCE]xW/) {
+					if ($check) {
+						if (defined $fix_elements[$n + 2] && $ctx !~ /[EW]x[EW]/) {
+							if (CHK("SPACING",
+								"spaces preferred around that '$op' $at\n" . $hereptr)) {
+								$good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " ";
+								$fix_elements[$n + 2] =~ s/^\s+//;
+								$line_fixed = 1;
+							}
+						} elsif (!defined $fix_elements[$n + 2] && $ctx !~ /Wx[OE]/) {
+							if (CHK("SPACING",
+								"space preferred before that '$op' $at\n" . $hereptr)) {
+								$good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]);
+								$line_fixed = 1;
+							}
+						}
+					} elsif ($ctx =~ /Wx[^WCE]|[^WCE]xW/) {
 						if (ERROR("SPACING",
 							  "need consistent spacing around '$op' $at\n" . $hereptr)) {
 							$good = rtrim($fix_elements[$n]) . " " . trim($fix_elements[$n + 1]) . " ";
@@ -3274,6 +4329,14 @@ sub process {
 					    	$ok = 1;
 					}
 
+					# for asm volatile statements
+					# ignore a colon with another
+					# colon immediately before or after
+					if (($op eq ':') &&
+					    ($ca =~ /:$/ || $cc =~ /^:/)) {
+						$ok = 1;
+					}
+
 					# messages are ERROR, but ?: are CHK
 					if ($ok == 0) {
 						my $msg_type = \&ERROR;
@@ -3300,8 +4363,8 @@ sub process {
 				$fixed_line = $fixed_line . $fix_elements[$#elements];
 			}
 
-			if ($fix && $line_fixed && $fixed_line ne $fixed[$linenr - 1]) {
-				$fixed[$linenr - 1] = $fixed_line;
+			if ($fix && $line_fixed && $fixed_line ne $fixed[$fixlinenr]) {
+				$fixed[$fixlinenr] = $fixed_line;
 			}
 
 
@@ -3312,7 +4375,7 @@ sub process {
 			if (WARN("SPACING",
 				 "space prohibited before semicolon\n" . $herecurr) &&
 			    $fix) {
-				1 while $fixed[$linenr - 1] =~
+				1 while $fixed[$fixlinenr] =~
 				    s/^(\+.*\S)\s+;/$1;/;
 			}
 		}
@@ -3340,12 +4403,12 @@ sub process {
 ## 		}
 
 #need space before brace following if, while, etc
-		if (($line =~ /\(.*\)\{/ && $line !~ /\($Type\){/) ||
+		if (($line =~ /\(.*\)\{/ && $line !~ /\($Type\)\{/) ||
 		    $line =~ /do\{/) {
 			if (ERROR("SPACING",
 				  "space required before the open brace '{'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/^(\+.*(?:do|\))){/$1 {/;
+				$fixed[$fixlinenr] =~ s/^(\+.*(?:do|\)))\{/$1 {/;
 			}
 		}
 
@@ -3363,7 +4426,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space required after that close brace '}'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/}((?!(?:,|;|\)))\S)/} $1/;
 			}
 		}
@@ -3373,7 +4436,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited after that open square bracket '['\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\[\s+/\[/;
 			}
 		}
@@ -3381,7 +4444,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited before that close square bracket ']'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\s+\]/\]/;
 			}
 		}
@@ -3392,7 +4455,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited after that open parenthesis '('\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\(\s+/\(/;
 			}
 		}
@@ -3402,36 +4465,77 @@ sub process {
 			if (ERROR("SPACING",
 				  "space prohibited before that close parenthesis ')'\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\s+\)/\)/;
 			}
 		}
 
+# check unnecessary parentheses around addressof/dereference single $Lvals
+# ie: &(foo->bar) should be &foo->bar and *(foo->bar) should be *foo->bar
+
+		while ($line =~ /(?:[^&]&\s*|\*)\(\s*($Ident\s*(?:$Member\s*)+)\s*\)/g) {
+			my $var = $1;
+			if (CHK("UNNECESSARY_PARENTHESES",
+				"Unnecessary parentheses around $var\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\(\s*\Q$var\E\s*\)/$var/;
+			}
+		}
+
+# check for unnecessary parentheses around function pointer uses
+# ie: (foo->bar)(); should be foo->bar();
+# but not "if (foo->bar) (" to avoid some false positives
+		if ($line =~ /(\bif\s*|)(\(\s*$Ident\s*(?:$Member\s*)+\))[ \t]*\(/ && $1 !~ /^if/) {
+			my $var = $2;
+			if (CHK("UNNECESSARY_PARENTHESES",
+				"Unnecessary parentheses around function pointer $var\n" . $herecurr) &&
+			    $fix) {
+				my $var2 = deparenthesize($var);
+				$var2 =~ s/\s//g;
+				$fixed[$fixlinenr] =~ s/\Q$var\E/$var2/;
+			}
+		}
+
 #goto labels aren't indented, allow a single space however
 		if ($line=~/^.\s+[A-Za-z\d_]+:(?![0-9]+)/ and
 		   !($line=~/^. [A-Za-z\d_]+:/) and !($line=~/^.\s+default:/)) {
 			if (WARN("INDENTED_LABEL",
 				 "labels should not be indented\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/^(.)\s+/$1/;
 			}
 		}
 
-# Return is not a function.
+# return is not a function
 		if (defined($stat) && $stat =~ /^.\s*return(\s*)\(/s) {
 			my $spacing = $1;
 			if ($^V && $^V ge 5.10.0 &&
-			    $stat =~ /^.\s*return\s*$balanced_parens\s*;\s*$/) {
-				ERROR("RETURN_PARENTHESES",
-				      "return is not a function, parentheses are not required\n" . $herecurr);
-
+			    $stat =~ /^.\s*return\s*($balanced_parens)\s*;\s*$/) {
+				my $value = $1;
+				$value = deparenthesize($value);
+				if ($value =~ m/^\s*$FuncArg\s*(?:\?|$)/) {
+					ERROR("RETURN_PARENTHESES",
+					      "return is not a function, parentheses are not required\n" . $herecurr);
+				}
 			} elsif ($spacing !~ /\s+/) {
 				ERROR("SPACING",
 				      "space required before the open parenthesis '('\n" . $herecurr);
 			}
 		}
 
+# unnecessary return in a void function
+# at end-of-function, with the previous line a single leading tab, then return;
+# and the line before that not a goto label target like "out:"
+		if ($sline =~ /^[ \+]}\s*$/ &&
+		    $prevline =~ /^\+\treturn\s*;\s*$/ &&
+		    $linenr >= 3 &&
+		    $lines[$linenr - 3] =~ /^[ +]/ &&
+		    $lines[$linenr - 3] !~ /^[ +]\s*$Ident\s*:/) {
+			WARN("RETURN_VOID",
+			     "void function return statements are not generally useful\n" . $hereprev);
+               }
+
 # if statements using unnecessary parentheses - ie: if ((foo == bar))
 		if ($^V && $^V ge 5.10.0 &&
 		    $line =~ /\bif\s*((?:\(\s*){2,})/) {
@@ -3446,12 +4550,41 @@ sub process {
 			}
 		}
 
-# Return of what appears to be an errno should normally be -'ve
-		if ($line =~ /^.\s*return\s*(E[A-Z]*)\s*;/) {
+# comparisons with a constant or upper case identifier on the left
+#	avoid cases like "foo + BAR < baz"
+#	only fix matches surrounded by parentheses to avoid incorrect
+#	conversions like "FOO < baz() + 5" being "misfixed" to "baz() > FOO + 5"
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /^\+(.*)\b($Constant|[A-Z_][A-Z0-9_]*)\s*($Compare)\s*($LvalOrFunc)/) {
+			my $lead = $1;
+			my $const = $2;
+			my $comp = $3;
+			my $to = $4;
+			my $newcomp = $comp;
+			if ($lead !~ /(?:$Operators|\.)\s*$/ &&
+			    $to !~ /^(?:Constant|[A-Z_][A-Z0-9_]*)$/ &&
+			    WARN("CONSTANT_COMPARISON",
+				 "Comparisons should place the constant on the right side of the test\n" . $herecurr) &&
+			    $fix) {
+				if ($comp eq "<") {
+					$newcomp = ">";
+				} elsif ($comp eq "<=") {
+					$newcomp = ">=";
+				} elsif ($comp eq ">") {
+					$newcomp = "<";
+				} elsif ($comp eq ">=") {
+					$newcomp = "<=";
+				}
+				$fixed[$fixlinenr] =~ s/\(\s*\Q$const\E\s*$Compare\s*\Q$to\E\s*\)/($to $newcomp $const)/;
+			}
+		}
+
+# Return of what appears to be an errno should normally be negative
+		if ($sline =~ /\breturn(?:\s*\(+\s*|\s+)(E[A-Z]+)(?:\s*\)+\s*|\s*)[;:,]/) {
 			my $name = $1;
 			if ($name ne 'EOF' && $name ne 'ERROR') {
 				WARN("USE_NEGATIVE_ERRNO",
-				     "return of an errno should typically be -ve (return -$1)\n" . $herecurr);
+				     "return of an errno should typically be negative (ie: return -$1)\n" . $herecurr);
 			}
 		}
 
@@ -3460,7 +4593,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "space required before the open parenthesis '('\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/\b(if|while|for|switch)\(/$1 \(/;
 			}
 		}
@@ -3550,7 +4683,7 @@ sub process {
 # if should not continue a brace
 		if ($line =~ /}\s*if\b/) {
 			ERROR("TRAILING_STATEMENTS",
-			      "trailing statements should be on next line\n" .
+			      "trailing statements should be on next line (or did you mean 'else if'?)\n" .
 				$herecurr);
 		}
 # case and default should not have general statements after them
@@ -3566,14 +4699,26 @@ sub process {
 
 		# Check for }<nl>else {, these must be at the same
 		# indent level to be relevant to each other.
-		if ($prevline=~/}\s*$/ and $line=~/^.\s*else\s*/ and
-						$previndent == $indent) {
-			ERROR("ELSE_AFTER_BRACE",
-			      "else should follow close brace '}'\n" . $hereprev);
+		if ($prevline=~/}\s*$/ and $line=~/^.\s*else\s*/ &&
+		    $previndent == $indent) {
+			if (ERROR("ELSE_AFTER_BRACE",
+				  "else should follow close brace '}'\n" . $hereprev) &&
+			    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = $prevrawline;
+				$fixedline =~ s/}\s*$//;
+				if ($fixedline !~ /^\+\s*$/) {
+					fix_insert_line($fixlinenr, $fixedline);
+				}
+				$fixedline = $rawline;
+				$fixedline =~ s/^(.\s*)else/$1} else/;
+				fix_insert_line($fixlinenr, $fixedline);
+			}
 		}
 
-		if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ and
-						$previndent == $indent) {
+		if ($prevline=~/}\s*$/ and $line=~/^.\s*while\s*/ &&
+		    $previndent == $indent) {
 			my ($s, $c) = ctx_statement_block($linenr, $realcnt, 0);
 
 			# Find out what is on the end of the line after the
@@ -3582,8 +4727,18 @@ sub process {
 			$s =~ s/\n.*//g;
 
 			if ($s =~ /^\s*;/) {
-				ERROR("WHILE_AFTER_BRACE",
-				      "while should follow close brace '}'\n" . $hereprev);
+				if (ERROR("WHILE_AFTER_BRACE",
+					  "while should follow close brace '}'\n" . $hereprev) &&
+				    $fix && $prevline =~ /^\+/ && $line =~ /^\+/) {
+					fix_delete_line($fixlinenr - 1, $prevrawline);
+					fix_delete_line($fixlinenr, $rawline);
+					my $fixedline = $prevrawline;
+					my $trailing = $rawline;
+					$trailing =~ s/^\+//;
+					$trailing = trim($trailing);
+					$fixedline =~ s/}\s*$/} $trailing/;
+					fix_insert_line($fixlinenr, $fixedline);
+				}
 			}
 		}
 
@@ -3597,7 +4752,7 @@ sub process {
 					 "Avoid gcc v4.3+ binary constant extension: <$var>\n" . $herecurr) &&
 				    $fix) {
 					my $hexval = sprintf("0x%x", oct($var));
-					$fixed[$linenr - 1] =~
+					$fixed[$fixlinenr] =~
 					    s/\b$var\b/$hexval/;
 				}
 			}
@@ -3608,7 +4763,9 @@ sub process {
 #Ignore Page<foo> variants
 			    $var !~ /^(?:Clear|Set|TestClear|TestSet|)Page[A-Z]/ &&
 #Ignore SI style variants like nS, mV and dB (ie: max_uV, regulator_min_uA_show)
-			    $var !~ /^(?:[a-z_]*?)_?[a-z][A-Z](?:_[a-z_]+)?$/) {
+			    $var !~ /^(?:[a-z_]*?)_?[a-z][A-Z](?:_[a-z_]+)?$/ &&
+#Ignore some three character SI units explicitly, like MiB and KHz
+			    $var !~ /^(?:[a-z_]*?)_?(?:[KMGT]iB|[KMGT]?Hz)(?:_[a-z_]+)?$/) {
 				while ($var =~ m{($Ident)}g) {
 					my $word = $1;
 					next if ($word !~ /[A-Z][a-z]|[a-z][A-Z]/);
@@ -3633,11 +4790,12 @@ sub process {
 			if (WARN("WHITESPACE_AFTER_LINE_CONTINUATION",
 				 "Whitespace after \\ makes next lines useless\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\s+$//;
+				$fixed[$fixlinenr] =~ s/\s+$//;
 			}
 		}
 
-#warn if <asm/foo.h> is #included and <linux/foo.h> is available (uses RAW line)
+# warn if <asm/foo.h> is #included and <linux/foo.h> is available and includes
+# itself <asm/foo.h> (uses RAW line)
 		if ($tree && $rawline =~ m{^.\s*\#\s*include\s*\<asm\/(.*)\.h\>}) {
 			my $file = "$1.h";
 			my $checkfile = "include/linux/$file";
@@ -3645,12 +4803,15 @@ sub process {
 			    $realfile ne $checkfile &&
 			    $1 !~ /$allowed_asm_includes/)
 			{
-				if ($realfile =~ m{^arch/}) {
-					CHK("ARCH_INCLUDE_LINUX",
-					    "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
-				} else {
-					WARN("INCLUDE_LINUX",
-					     "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+				my $asminclude = `grep -Ec "#include\\s+<asm/$file>" $root/$checkfile`;
+				if ($asminclude > 0) {
+					if ($realfile =~ m{^arch/}) {
+						CHK("ARCH_INCLUDE_LINUX",
+						    "Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+					} else {
+						WARN("INCLUDE_LINUX",
+						     "Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr);
+					}
 				}
 			}
 		}
@@ -3664,13 +4825,28 @@ sub process {
 			my $cnt = $realcnt;
 			my ($off, $dstat, $dcond, $rest);
 			my $ctx = '';
+			my $has_flow_statement = 0;
+			my $has_arg_concat = 0;
 			($dstat, $dcond, $ln, $cnt, $off) =
 				ctx_statement_block($linenr, $realcnt, 0);
 			$ctx = $dstat;
 			#print "dstat<$dstat> dcond<$dcond> cnt<$cnt> off<$off>\n";
 			#print "LINE<$lines[$ln-1]> len<" . length($lines[$ln-1]) . "\n";
 
-			$dstat =~ s/^.\s*\#\s*define\s+$Ident(?:\([^\)]*\))?\s*//;
+			$has_flow_statement = 1 if ($ctx =~ /\b(goto|return)\b/);
+			$has_arg_concat = 1 if ($ctx =~ /\#\#/ && $ctx !~ /\#\#\s*(?:__VA_ARGS__|args)\b/);
+
+			$dstat =~ s/^.\s*\#\s*define\s+$Ident(\([^\)]*\))?\s*//;
+			my $define_args = $1;
+			my $define_stmt = $dstat;
+			my @def_args = ();
+
+			if (defined $define_args && $define_args ne "") {
+				$define_args = substr($define_args, 1, length($define_args) - 2);
+				$define_args =~ s/\s*//g;
+				@def_args = split(",", $define_args);
+			}
+
 			$dstat =~ s/$;//g;
 			$dstat =~ s/\\\n.//g;
 			$dstat =~ s/^\s*//s;
@@ -3679,16 +4855,19 @@ sub process {
 			# Flatten any parentheses and braces
 			while ($dstat =~ s/\([^\(\)]*\)/1/ ||
 			       $dstat =~ s/\{[^\{\}]*\}/1/ ||
-			       $dstat =~ s/\[[^\[\]]*\]/1/)
+			       $dstat =~ s/.\[[^\[\]]*\]/1/)
 			{
 			}
 
 			# Flatten any obvious string concatentation.
-			while ($dstat =~ s/("X*")\s*$Ident/$1/ ||
-			       $dstat =~ s/$Ident\s*("X*")/$1/)
+			while ($dstat =~ s/($String)\s*$Ident/$1/ ||
+			       $dstat =~ s/$Ident\s*($String)/$1/)
 			{
 			}
 
+			# Make asm volatile uses seem like a generic function
+			$dstat =~ s/\b_*asm_*\s+_*volatile_*\b/asm_volatile/g;
+
 			my $exceptions = qr{
 				$Declare|
 				module_param_named|
@@ -3699,14 +4878,24 @@ sub process {
 				union|
 				struct|
 				\.$Ident\s*=\s*|
-				^\"|\"$
+				^\"|\"$|
+				^\[
 			}x;
 			#print "REST<$rest> dstat<$dstat> ctx<$ctx>\n";
+
+			$ctx =~ s/\n*$//;
+			my $herectx = $here . "\n";
+			my $stmt_cnt = statement_rawlines($ctx);
+
+			for (my $n = 0; $n < $stmt_cnt; $n++) {
+				$herectx .= raw_line($linenr, $n) . "\n";
+			}
+
 			if ($dstat ne '' &&
 			    $dstat !~ /^(?:$Ident|-?$Constant),$/ &&			# 10, // foo(),
 			    $dstat !~ /^(?:$Ident|-?$Constant);$/ &&			# foo();
 			    $dstat !~ /^[!~-]?(?:$Lval|$Constant)$/ &&		# 10 // foo() // !foo // ~foo // -foo // foo->bar // foo.bar->baz
-			    $dstat !~ /^'X'$/ &&					# character constants
+			    $dstat !~ /^'X'$/ && $dstat !~ /^'XX'$/ &&			# character constants
 			    $dstat !~ /$exceptions/ &&
 			    $dstat !~ /^\.$Ident\s*=/ &&				# .foo =
 			    $dstat !~ /^(?:\#\s*$Ident|\#\s*$Constant)\s*$/ &&		# stringification #foo
@@ -3717,21 +4906,69 @@ sub process {
 			    $dstat !~ /^\(\{/ &&						# ({...
 			    $ctx !~ /^.\s*#\s*define\s+TRACE_(?:SYSTEM|INCLUDE_FILE|INCLUDE_PATH)\b/)
 			{
-				$ctx =~ s/\n*$//;
+				if ($dstat =~ /^\s*if\b/) {
+					ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
+					      "Macros starting with if should be enclosed by a do - while loop to avoid possible if/else logic defects\n" . "$herectx");
+				} elsif ($dstat =~ /;/) {
+					ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
+					      "Macros with multiple statements should be enclosed in a do - while loop\n" . "$herectx");
+				} else {
+					ERROR("COMPLEX_MACRO",
+					      "Macros with complex values should be enclosed in parentheses\n" . "$herectx");
+				}
+
+			}
+
+			# Make $define_stmt single line, comment-free, etc
+			my @stmt_array = split('\n', $define_stmt);
+			my $first = 1;
+			$define_stmt = "";
+			foreach my $l (@stmt_array) {
+				$l =~ s/\\$//;
+				if ($first) {
+					$define_stmt = $l;
+					$first = 0;
+				} elsif ($l =~ /^[\+ ]/) {
+					$define_stmt .= substr($l, 1);
+				}
+			}
+			$define_stmt =~ s/$;//g;
+			$define_stmt =~ s/\s+/ /g;
+			$define_stmt = trim($define_stmt);
+
+# check if any macro arguments are reused (ignore '...' and 'type')
+			foreach my $arg (@def_args) {
+			        next if ($arg =~ /\.\.\./);
+			        next if ($arg =~ /^type$/i);
+				my $tmp_stmt = $define_stmt;
+				$tmp_stmt =~ s/\b(typeof|__typeof__|__builtin\w+|typecheck\s*\(\s*$Type\s*,|\#+)\s*\(*\s*$arg\s*\)*\b//g;
+				$tmp_stmt =~ s/\#+\s*$arg\b//g;
+				$tmp_stmt =~ s/\b$arg\s*\#\#//g;
+				my $use_cnt = $tmp_stmt =~ s/\b$arg\b//g;
+				if ($use_cnt > 1) {
+					CHK("MACRO_ARG_REUSE",
+					    "Macro argument reuse '$arg' - possible side-effects?\n" . "$herectx");
+				    }
+# check if any macro arguments may have other precedence issues
+				if ($tmp_stmt =~ m/($Operators)?\s*\b$arg\b\s*($Operators)?/m &&
+				    ((defined($1) && $1 ne ',') ||
+				     (defined($2) && $2 ne ','))) {
+					CHK("MACRO_ARG_PRECEDENCE",
+					    "Macro argument '$arg' may be better as '($arg)' to avoid precedence issues\n" . "$herectx");
+				}
+			}
+
+# check for macros with flow control, but without ## concatenation
+# ## concatenation is commonly a macro that defines a function so ignore those
+			if ($has_flow_statement && !$has_arg_concat) {
 				my $herectx = $here . "\n";
 				my $cnt = statement_rawlines($ctx);
 
 				for (my $n = 0; $n < $cnt; $n++) {
 					$herectx .= raw_line($linenr, $n) . "\n";
 				}
-
-				if ($dstat =~ /;/) {
-					ERROR("MULTISTATEMENT_MACRO_USE_DO_WHILE",
-					      "Macros with multiple statements should be enclosed in a do - while loop\n" . "$herectx");
-				} else {
-					ERROR("COMPLEX_MACRO",
-					      "Macros with complex values should be enclosed in parenthesis\n" . "$herectx");
-				}
+				WARN("MACRO_WITH_FLOW_CONTROL",
+				     "Macros with flow control statements should be avoided\n" . "$herectx");
 			}
 
 # check for line continuations outside of #defines, preprocessor #, and asm
@@ -3761,6 +4998,7 @@ sub process {
 			$ctx = $dstat;
 
 			$dstat =~ s/\\\n.//g;
+			$dstat =~ s/$;/ /g;
 
 			if ($dstat =~ /^\+\s*#\s*define\s+$Ident\s*${balanced_parens}\s*do\s*{(.*)\s*}\s*while\s*\(\s*0\s*\)\s*([;\s]*)\s*$/) {
 				my $stmts = $2;
@@ -3783,6 +5021,17 @@ sub process {
 					WARN("DO_WHILE_MACRO_WITH_TRAILING_SEMICOLON",
 					     "do {} while (0) macros should not be semicolon terminated\n" . "$herectx");
 				}
+			} elsif ($dstat =~ /^\+\s*#\s*define\s+$Ident.*;\s*$/) {
+				$ctx =~ s/\n*$//;
+				my $cnt = statement_rawlines($ctx);
+				my $herectx = $here . "\n";
+
+				for (my $n = 0; $n < $cnt; $n++) {
+					$herectx .= raw_line($linenr, $n) . "\n";
+				}
+
+				WARN("TRAILING_SEMICOLON",
+				     "macros should not use a trailing semicolon\n" . "$herectx");
 			}
 		}
 
@@ -3914,21 +5163,137 @@ sub process {
 			}
 		}
 
+# check for single line unbalanced braces
+		if ($sline =~ /^.\s*\}\s*else\s*$/ ||
+		    $sline =~ /^.\s*else\s*\{\s*$/) {
+			CHK("BRACES", "Unbalanced braces around else statement\n" . $herecurr);
+		}
+
 # check for unnecessary blank lines around braces
 		if (($line =~ /^.\s*}\s*$/ && $prevrawline =~ /^.\s*$/)) {
-			CHK("BRACES",
-			    "Blank lines aren't necessary before a close brace '}'\n" . $hereprev);
+			if (CHK("BRACES",
+				"Blank lines aren't necessary before a close brace '}'\n" . $hereprev) &&
+			    $fix && $prevrawline =~ /^\+/) {
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+			}
 		}
 		if (($rawline =~ /^.\s*$/ && $prevline =~ /^..*{\s*$/)) {
-			CHK("BRACES",
-			    "Blank lines aren't necessary after an open brace '{'\n" . $hereprev);
+			if (CHK("BRACES",
+				"Blank lines aren't necessary after an open brace '{'\n" . $hereprev) &&
+			    $fix) {
+				fix_delete_line($fixlinenr, $rawline);
+			}
 		}
 
 # no volatiles please
 		my $asm_volatile = qr{\b(__asm__|asm)\s+(__volatile__|volatile)\b};
 		if ($line =~ /\bvolatile\b/ && $line !~ /$asm_volatile/) {
 			WARN("VOLATILE",
-			     "Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt\n" . $herecurr);
+			     "Use of volatile is usually wrong: see Documentation/process/volatile-considered-harmful.rst\n" . $herecurr);
+		}
+
+# Check for user-visible strings broken across lines, which breaks the ability
+# to grep for the string.  Make exceptions when the previous string ends in a
+# newline (multiple lines in one string constant) or '\t', '\r', ';', or '{'
+# (common in inline assembly) or is a octal \123 or hexadecimal \xaf value
+		if ($line =~ /^\+\s*$String/ &&
+		    $prevline =~ /"\s*$/ &&
+		    $prevrawline !~ /(?:\\(?:[ntr]|[0-7]{1,3}|x[0-9a-fA-F]{1,2})|;\s*|\{\s*)"\s*$/) {
+			if (WARN("SPLIT_STRING",
+				 "quoted string split across lines\n" . $hereprev) &&
+				     $fix &&
+				     $prevrawline =~ /^\+.*"\s*$/ &&
+				     $last_coalesced_string_linenr != $linenr - 1) {
+				my $extracted_string = get_quoted_string($line, $rawline);
+				my $comma_close = "";
+				if ($rawline =~ /\Q$extracted_string\E(\s*\)\s*;\s*$|\s*,\s*)/) {
+					$comma_close = $1;
+				}
+
+				fix_delete_line($fixlinenr - 1, $prevrawline);
+				fix_delete_line($fixlinenr, $rawline);
+				my $fixedline = $prevrawline;
+				$fixedline =~ s/"\s*$//;
+				$fixedline .= substr($extracted_string, 1) . trim($comma_close);
+				fix_insert_line($fixlinenr - 1, $fixedline);
+				$fixedline = $rawline;
+				$fixedline =~ s/\Q$extracted_string\E\Q$comma_close\E//;
+				if ($fixedline !~ /\+\s*$/) {
+					fix_insert_line($fixlinenr, $fixedline);
+				}
+				$last_coalesced_string_linenr = $linenr;
+			}
+		}
+
+# check for missing a space in a string concatenation
+		if ($prevrawline =~ /[^\\]\w"$/ && $rawline =~ /^\+[\t ]+"\w/) {
+			WARN('MISSING_SPACE',
+			     "break quoted strings at a space character\n" . $hereprev);
+		}
+
+# check for an embedded function name in a string when the function is known
+# This does not work very well for -f --file checking as it depends on patch
+# context providing the function name or a single line form for in-file
+# function declarations
+		if ($line =~ /^\+.*$String/ &&
+		    defined($context_function) &&
+		    get_quoted_string($line, $rawline) =~ /\b$context_function\b/ &&
+		    length(get_quoted_string($line, $rawline)) != (length($context_function) + 2)) {
+			WARN("EMBEDDED_FUNCTION_NAME",
+			     "Prefer using '\"%s...\", __func__' to using '$context_function', this function's name, in a string\n" . $herecurr);
+		}
+
+# check for spaces before a quoted newline
+		if ($rawline =~ /^.*\".*\s\\n/) {
+			if (WARN("QUOTED_WHITESPACE_BEFORE_NEWLINE",
+				 "unnecessary whitespace before a quoted newline\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/^(\+.*\".*)\s+\\n/$1\\n/;
+			}
+
+		}
+
+# concatenated string without spaces between elements
+		if ($line =~ /$String[A-Z_]/ || $line =~ /[A-Za-z0-9_]$String/) {
+			CHK("CONCATENATED_STRING",
+			    "Concatenated strings should use spaces between elements\n" . $herecurr);
+		}
+
+# uncoalesced string fragments
+		if ($line =~ /$String\s*"/) {
+			WARN("STRING_FRAGMENTS",
+			     "Consecutive strings are generally better as a single string\n" . $herecurr);
+		}
+
+# check for non-standard and hex prefixed decimal printf formats
+		my $show_L = 1;	#don't show the same defect twice
+		my $show_Z = 1;
+		while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) {
+			my $string = substr($rawline, $-[1], $+[1] - $-[1]);
+			$string =~ s/%%/__/g;
+			# check for %L
+			if ($show_L && $string =~ /%[\*\d\.\$]*L([diouxX])/) {
+				WARN("PRINTF_L",
+				     "\%L$1 is non-standard C, use %ll$1\n" . $herecurr);
+				$show_L = 0;
+			}
+			# check for %Z
+			if ($show_Z && $string =~ /%[\*\d\.\$]*Z([diouxX])/) {
+				WARN("PRINTF_Z",
+				     "%Z$1 is non-standard C, use %z$1\n" . $herecurr);
+				$show_Z = 0;
+			}
+			# check for 0x<decimal>
+			if ($string =~ /0x%[\*\d\.\$\Llzth]*[diou]/) {
+				ERROR("PRINTF_0XDECIMAL",
+				      "Prefixing 0x with decimal output is defective\n" . $herecurr);
+			}
+		}
+
+# check for line continuations in quoted strings with odd counts of "
+		if ($rawline =~ /\\$/ && $rawline =~ tr/"/"/ % 2) {
+			WARN("LINE_CONTINUATIONS",
+			     "Avoid line continuations in quoted strings\n" . $herecurr);
 		}
 
 # warn about #if 0
@@ -3940,10 +5305,90 @@ sub process {
 
 # check for needless "if (<foo>) fn(<foo>)" uses
 		if ($prevline =~ /\bif\s*\(\s*($Lval)\s*\)/) {
-			my $expr = '\s*\(\s*' . quotemeta($1) . '\s*\)\s*;';
-			if ($line =~ /\b(kfree|usb_free_urb|debugfs_remove(?:_recursive)?)$expr/) {
-				WARN('NEEDLESS_IF',
-				     "$1(NULL) is safe this check is probably not required\n" . $hereprev);
+			my $tested = quotemeta($1);
+			my $expr = '\s*\(\s*' . $tested . '\s*\)\s*;';
+			if ($line =~ /\b(kfree|usb_free_urb|debugfs_remove(?:_recursive)?|(?:kmem_cache|mempool|dma_pool)_destroy)$expr/) {
+				my $func = $1;
+				if (WARN('NEEDLESS_IF',
+					 "$func(NULL) is safe and this check is probably not required\n" . $hereprev) &&
+				    $fix) {
+					my $do_fix = 1;
+					my $leading_tabs = "";
+					my $new_leading_tabs = "";
+					if ($lines[$linenr - 2] =~ /^\+(\t*)if\s*\(\s*$tested\s*\)\s*$/) {
+						$leading_tabs = $1;
+					} else {
+						$do_fix = 0;
+					}
+					if ($lines[$linenr - 1] =~ /^\+(\t+)$func\s*\(\s*$tested\s*\)\s*;\s*$/) {
+						$new_leading_tabs = $1;
+						if (length($leading_tabs) + 1 ne length($new_leading_tabs)) {
+							$do_fix = 0;
+						}
+					} else {
+						$do_fix = 0;
+					}
+					if ($do_fix) {
+						fix_delete_line($fixlinenr - 1, $prevrawline);
+						$fixed[$fixlinenr] =~ s/^\+$new_leading_tabs/\+$leading_tabs/;
+					}
+				}
+			}
+		}
+
+# check for unnecessary "Out of Memory" messages
+		if ($line =~ /^\+.*\b$logFunctions\s*\(/ &&
+		    $prevline =~ /^[ \+]\s*if\s*\(\s*(\!\s*|NULL\s*==\s*)?($Lval)(\s*==\s*NULL\s*)?\s*\)/ &&
+		    (defined $1 || defined $3) &&
+		    $linenr > 3) {
+			my $testval = $2;
+			my $testline = $lines[$linenr - 3];
+
+			my ($s, $c) = ctx_statement_block($linenr - 3, $realcnt, 0);
+#			print("line: <$line>\nprevline: <$prevline>\ns: <$s>\nc: <$c>\n\n\n");
+
+			if ($s =~ /(?:^|\n)[ \+]\s*(?:$Type\s*)?\Q$testval\E\s*=\s*(?:\([^\)]*\)\s*)?\s*(?:devm_)?(?:[kv][czm]alloc(?:_node|_array)?\b|kstrdup|kmemdup|(?:dev_)?alloc_skb)/) {
+				WARN("OOM_MESSAGE",
+				     "Possible unnecessary 'out of memory' message\n" . $hereprev);
+			}
+		}
+
+# check for logging functions with KERN_<LEVEL>
+		if ($line !~ /printk(?:_ratelimited|_once)?\s*\(/ &&
+		    $line =~ /\b$logFunctions\s*\(.*\b(KERN_[A-Z]+)\b/) {
+			my $level = $1;
+			if (WARN("UNNECESSARY_KERN_LEVEL",
+				 "Possible unnecessary $level\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\s*$level\s*//;
+			}
+		}
+
+# check for logging continuations
+		if ($line =~ /\bprintk\s*\(\s*KERN_CONT\b|\bpr_cont\s*\(/) {
+			WARN("LOGGING_CONTINUATION",
+			     "Avoid logging continuation uses where feasible\n" . $herecurr);
+		}
+
+# check for mask then right shift without a parentheses
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /$LvalOrFunc\s*\&\s*($LvalOrFunc)\s*>>/ &&
+		    $4 !~ /^\&/) { # $LvalOrFunc may be &foo, ignore if so
+			WARN("MASK_THEN_SHIFT",
+			     "Possible precedence defect with mask then right shift - may need parentheses\n" . $herecurr);
+		}
+
+# check for pointer comparisons to NULL
+		if ($^V && $^V ge 5.10.0) {
+			while ($line =~ /\b$LvalOrFunc\s*(==|\!=)\s*NULL\b/g) {
+				my $val = $1;
+				my $equal = "!";
+				$equal = "" if ($4 eq "!=");
+				if (CHK("COMPARISON_TO_NULL",
+					"Comparison to NULL could be written \"${equal}${val}\"\n" . $herecurr) &&
+					    $fix) {
+					$fixed[$fixlinenr] =~ s/\b\Q$val\E\s*(?:==|\!=)\s*NULL\b/$equal$val/;
+				}
 			}
 		}
 
@@ -3960,7 +5405,7 @@ sub process {
 				      WARN("MISPLACED_INIT",
 					   "$attr should be placed after $var\n" . $herecurr))) &&
 				    $fix) {
-					$fixed[$linenr - 1] =~ s/(\bstatic\s+(?:const\s+)?)(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*([=;])\s*/"$1" . trim(string_find_replace($2, "\\s*$attr\\s*", " ")) . " " . trim(string_find_replace($3, "\\s*$attr\\s*", "")) . " $attr" . ("$4" eq ";" ? ";" : " = ")/e;
+					$fixed[$fixlinenr] =~ s/(\bstatic\s+(?:const\s+)?)(?:$attr\s+)?($NonptrTypeWithAttr)\s+(?:$attr\s+)?($Ident(?:\[[^]]*\])?)\s*([=;])\s*/"$1" . trim(string_find_replace($2, "\\s*$attr\\s*", " ")) . " " . trim(string_find_replace($3, "\\s*$attr\\s*", "")) . " $attr" . ("$4" eq ";" ? ";" : " = ")/e;
 				}
 			}
 		}
@@ -3974,7 +5419,7 @@ sub process {
 			if (ERROR("INIT_ATTRIBUTE",
 				  "Use of const init definition must use ${attr_prefix}initconst\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/$InitAttributeData/${attr_prefix}initconst/;
 			}
 		}
@@ -3985,21 +5430,49 @@ sub process {
 			if (ERROR("INIT_ATTRIBUTE",
 				  "Use of $attr requires a separate use of const\n" . $herecurr) &&
 			    $fix) {
-				my $lead = $fixed[$linenr - 1] =~
+				my $lead = $fixed[$fixlinenr] =~
 				    /(^\+\s*(?:static\s+))/;
 				$lead = rtrim($1);
 				$lead = "$lead " if ($lead !~ /^\+$/);
 				$lead = "${lead}const ";
-				$fixed[$linenr - 1] =~ s/(^\+\s*(?:static\s+))/$lead/;
+				$fixed[$fixlinenr] =~ s/(^\+\s*(?:static\s+))/$lead/;
+			}
+		}
+
+# check for __read_mostly with const non-pointer (should just be const)
+		if ($line =~ /\b__read_mostly\b/ &&
+		    $line =~ /($Type)\s*$Ident/ && $1 !~ /\*\s*$/ && $1 =~ /\bconst\b/) {
+			if (ERROR("CONST_READ_MOSTLY",
+				  "Invalid use of __read_mostly with const type\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\s+__read_mostly\b//;
+			}
+		}
+
+# don't use __constant_<foo> functions outside of include/uapi/
+		if ($realfile !~ m@^include/uapi/@ &&
+		    $line =~ /(__constant_(?:htons|ntohs|[bl]e(?:16|32|64)_to_cpu|cpu_to_[bl]e(?:16|32|64)))\s*\(/) {
+			my $constant_func = $1;
+			my $func = $constant_func;
+			$func =~ s/^__constant_//;
+			if (WARN("CONSTANT_CONVERSION",
+				 "$constant_func should be $func\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\b$constant_func\b/$func/g;
 			}
 		}
 
 # prefer usleep_range over udelay
 		if ($line =~ /\budelay\s*\(\s*(\d+)\s*\)/) {
+			my $delay = $1;
 			# ignore udelay's < 10, however
-			if (! ($1 < 10) ) {
+			if (! ($delay < 10) ) {
 				CHK("USLEEP_RANGE",
-				    "usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt\n" . $line);
+				    "usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt\n" . $herecurr);
+			}
+			if ($delay > 2000) {
+				WARN("LONG_UDELAY",
+				     "long udelay - prefer mdelay; see arch/arm/include/asm/delay.h\n" . $herecurr);
 			}
 		}
 
@@ -4007,7 +5480,7 @@ sub process {
 		if ($line =~ /\bmsleep\s*\((\d+)\);/) {
 			if ($1 < 20) {
 				WARN("MSLEEP",
-				     "msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt\n" . $line);
+				     "msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt\n" . $herecurr);
 			}
 		}
 
@@ -4035,7 +5508,7 @@ sub process {
 			if (ERROR("SPACING",
 				  "exactly one space required after that #$1\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~
+				$fixed[$fixlinenr] =~
 				    s/^(.\s*\#\s*(ifdef|ifndef|elif))\s{2,}/$1 /;
 			}
 
@@ -4051,22 +5524,70 @@ sub process {
 			}
 		}
 # check for memory barriers without a comment.
-		if ($line =~ /\b(mb|rmb|wmb|read_barrier_depends|smp_mb|smp_rmb|smp_wmb|smp_read_barrier_depends)\(/) {
+
+		my $barriers = qr{
+			mb|
+			rmb|
+			wmb|
+			read_barrier_depends
+		}x;
+		my $barrier_stems = qr{
+			mb__before_atomic|
+			mb__after_atomic|
+			store_release|
+			load_acquire|
+			store_mb|
+			(?:$barriers)
+		}x;
+		my $all_barriers = qr{
+			(?:$barriers)|
+			smp_(?:$barrier_stems)|
+			virt_(?:$barrier_stems)
+		}x;
+
+		if ($line =~ /\b(?:$all_barriers)\s*\(/) {
 			if (!ctx_has_comment($first_line, $linenr)) {
 				WARN("MEMORY_BARRIER",
 				     "memory barrier without comment\n" . $herecurr);
 			}
 		}
+
+		my $underscore_smp_barriers = qr{__smp_(?:$barrier_stems)}x;
+
+		if ($realfile !~ m@^include/asm-generic/@ &&
+		    $realfile !~ m@/barrier\.h$@ &&
+		    $line =~ m/\b(?:$underscore_smp_barriers)\s*\(/ &&
+		    $line !~ m/^.\s*\#\s*define\s+(?:$underscore_smp_barriers)\s*\(/) {
+			WARN("MEMORY_BARRIER",
+			     "__smp memory barriers shouldn't be used outside barrier.h and asm-generic\n" . $herecurr);
+		}
+
+# check for waitqueue_active without a comment.
+		if ($line =~ /\bwaitqueue_active\s*\(/) {
+			if (!ctx_has_comment($first_line, $linenr)) {
+				WARN("WAITQUEUE_ACTIVE",
+				     "waitqueue_active without comment\n" . $herecurr);
+			}
+		}
+
 # check of hardware specific defines
 		if ($line =~ m@^.\s*\#\s*if.*\b(__i386__|__powerpc64__|__sun__|__s390x__)\b@ && $realfile !~ m@include/asm-@) {
 			CHK("ARCH_DEFINES",
 			    "architecture specific defines should be avoided\n" .  $herecurr);
 		}
 
+# check that the storage class is not after a type
+		if ($line =~ /\b($Type)\s+($Storage)\b/) {
+			WARN("STORAGE_CLASS",
+			     "storage class '$2' should be located before type '$1'\n" . $herecurr);
+		}
 # Check that the storage class is at the beginning of a declaration
-		if ($line =~ /\b$Storage\b/ && $line !~ /^.\s*$Storage\b/) {
+		if ($line =~ /\b$Storage\b/ &&
+		    $line !~ /^.\s*$Storage/ &&
+		    $line =~ /^.\s*(.+?)\$Storage\s/ &&
+		    $1 !~ /[\,\)]\s*$/) {
 			WARN("STORAGE_CLASS",
-			     "storage class should be at the beginning of the declaration\n" . $herecurr)
+			     "storage class should be at the beginning of the declaration\n" . $herecurr);
 		}
 
 # check the location of the inline attribute, that it is between
@@ -4083,7 +5604,7 @@ sub process {
 			if (WARN("INLINE",
 				 "plain inline is preferred over $1\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b(__inline__|__inline)\b/inline/;
+				$fixed[$fixlinenr] =~ s/\b(__inline__|__inline)\b/inline/;
 
 			}
 		}
@@ -4094,11 +5615,6 @@ sub process {
 			WARN("PREFER_PACKED",
 			     "__packed is preferred over __attribute__((packed))\n" . $herecurr);
 		}
-# Check for new packed members, warn to use care
-		if ($line =~ /\b(__attribute__\s*\(\s*\(.*\bpacked|__packed)\b/) {
-			WARN("NEW_PACKED",
-			     "Adding new packed members is to be done with care\n" . $herecurr);
-		}
 
 # Check for __attribute__ aligned, prefer __aligned
 		if ($realfile !~ m@\binclude/uapi/@ &&
@@ -4113,7 +5629,7 @@ sub process {
 			if (WARN("PREFER_PRINTF",
 				 "__printf(string-index, first-to-check) is preferred over __attribute__((format(printf, string-index, first-to-check)))\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf\s*,\s*(.*)\)\s*\)\s*\)/"__printf(" . trim($1) . ")"/ex;
+				$fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*printf\s*,\s*(.*)\)\s*\)\s*\)/"__printf(" . trim($1) . ")"/ex;
 
 			}
 		}
@@ -4124,7 +5640,55 @@ sub process {
 			if (WARN("PREFER_SCANF",
 				 "__scanf(string-index, first-to-check) is preferred over __attribute__((format(scanf, string-index, first-to-check)))\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\s*,\s*(.*)\)\s*\)\s*\)/"__scanf(" . trim($1) . ")"/ex;
+				$fixed[$fixlinenr] =~ s/\b__attribute__\s*\(\s*\(\s*format\s*\(\s*scanf\s*,\s*(.*)\)\s*\)\s*\)/"__scanf(" . trim($1) . ")"/ex;
+			}
+		}
+
+# Check for __attribute__ weak, or __weak declarations (may have link issues)
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /(?:$Declare|$DeclareMisordered)\s*$Ident\s*$balanced_parens\s*(?:$Attribute)?\s*;/ &&
+		    ($line =~ /\b__attribute__\s*\(\s*\(.*\bweak\b/ ||
+		     $line =~ /\b__weak\b/)) {
+			ERROR("WEAK_DECLARATION",
+			      "Using weak declarations can have unintended link defects\n" . $herecurr);
+		}
+
+# check for c99 types like uint8_t used outside of uapi/ and tools/
+		if ($realfile !~ m@\binclude/uapi/@ &&
+		    $realfile !~ m@\btools/@ &&
+		    $line =~ /\b($Declare)\s*$Ident\s*[=;,\[]/) {
+			my $type = $1;
+			if ($type =~ /\b($typeC99Typedefs)\b/) {
+				$type = $1;
+				my $kernel_type = 'u';
+				$kernel_type = 's' if ($type =~ /^_*[si]/);
+				$type =~ /(\d+)/;
+				$kernel_type .= $1;
+				if (CHK("PREFER_KERNEL_TYPES",
+					"Prefer kernel type '$kernel_type' over '$type'\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\b$type\b/$kernel_type/;
+				}
+			}
+		}
+
+# check for cast of C90 native int or longer types constants
+		if ($line =~ /(\(\s*$C90_int_types\s*\)\s*)($Constant)\b/) {
+			my $cast = $1;
+			my $const = $2;
+			if (WARN("TYPECAST_INT_CONSTANT",
+				 "Unnecessary typecast of c90 int constant\n" . $herecurr) &&
+			    $fix) {
+				my $suffix = "";
+				my $newconst = $const;
+				$newconst =~ s/${Int_type}$//;
+				$suffix .= 'U' if ($cast =~ /\bunsigned\b/);
+				if ($cast =~ /\blong\s+long\b/) {
+					$suffix .= 'LL';
+				} elsif ($cast =~ /\blong\b/) {
+					$suffix .= 'L';
+				}
+				$fixed[$fixlinenr] =~ s/\Q$cast\E$const\b/$newconst$suffix/;
 			}
 		}
 
@@ -4139,16 +5703,10 @@ sub process {
 			if (WARN("SIZEOF_PARENTHESIS",
 				 "sizeof $1 should be sizeof($1)\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/"sizeof(" . trim($1) . ")"/ex;
+				$fixed[$fixlinenr] =~ s/\bsizeof\s+((?:\*\s*|)$Lval|$Type(?:\s+$Lval|))/"sizeof(" . trim($1) . ")"/ex;
 			}
 		}
 
-# check for line continuations in quoted strings with odd counts of "
-		if ($rawline =~ /\\$/ && $rawline =~ tr/"/"/ % 2) {
-			WARN("LINE_CONTINUATIONS",
-			     "Avoid line continuations in quoted strings\n" . $herecurr);
-		}
-
 # check for struct spinlock declarations
 		if ($line =~ /^.\s*\bstruct\s+spinlock\s+\w+\s*;/) {
 			WARN("USE_SPINLOCK_T",
@@ -4158,19 +5716,46 @@ sub process {
 # check for seq_printf uses that could be seq_puts
 		if ($sline =~ /\bseq_printf\s*\(.*"\s*\)\s*;\s*$/) {
 			my $fmt = get_quoted_string($line, $rawline);
-			if ($fmt ne "" && $fmt !~ /[^\\]\%/) {
+			$fmt =~ s/%%//g;
+			if ($fmt !~ /%/) {
 				if (WARN("PREFER_SEQ_PUTS",
 					 "Prefer seq_puts to seq_printf\n" . $herecurr) &&
 				    $fix) {
-					$fixed[$linenr - 1] =~ s/\bseq_printf\b/seq_puts/;
+					$fixed[$fixlinenr] =~ s/\bseq_printf\b/seq_puts/;
+				}
+			}
+		}
+
+		# check for vsprintf extension %p<foo> misuses
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $stat =~ /^\+(?![^\{]*\{\s*).*\b(\w+)\s*\(.*$String\s*,/s &&
+		    $1 !~ /^_*volatile_*$/) {
+			my $bad_extension = "";
+			my $lc = $stat =~ tr@\n@@;
+			$lc = $lc + $linenr;
+		        for (my $count = $linenr; $count <= $lc; $count++) {
+				my $fmt = get_quoted_string($lines[$count - 1], raw_line($count, 0));
+				$fmt =~ s/%%//g;
+				if ($fmt =~ /(\%[\*\d\.]*p(?![\WFfSsBKRraEhMmIiUDdgVCbGNO]).)/) {
+					$bad_extension = $1;
+					last;
 				}
 			}
+			if ($bad_extension ne "") {
+				my $stat_real = raw_line($linenr, 0);
+				for (my $count = $linenr + 1; $count <= $lc; $count++) {
+					$stat_real = $stat_real . "\n" . raw_line($count, 0);
+				}
+				WARN("VSPRINTF_POINTER_EXTENSION",
+				     "Invalid vsprintf pointer extension '$bad_extension'\n" . "$here\n$stat_real\n");
+			}
 		}
 
 # Check for misused memsets
 		if ($^V && $^V ge 5.10.0 &&
 		    defined $stat &&
-		    $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*$FuncArg\s*\)/s) {
+		    $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*$FuncArg\s*\)/) {
 
 			my $ms_addr = $2;
 			my $ms_val = $7;
@@ -4186,14 +5771,46 @@ sub process {
 		}
 
 # Check for memcpy(foo, bar, ETH_ALEN) that could be ether_addr_copy(foo, bar)
-		if ($^V && $^V ge 5.10.0 &&
-		    $line =~ /^\+(?:.*?)\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/s) {
-			if (WARN("PREFER_ETHER_ADDR_COPY",
-				 "Prefer ether_addr_copy() over memcpy() if the Ethernet addresses are __aligned(2)\n" . $herecurr) &&
-			    $fix) {
-				$fixed[$linenr - 1] =~ s/\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/ether_addr_copy($2, $7)/;
-			}
-		}
+#		if ($^V && $^V ge 5.10.0 &&
+#		    defined $stat &&
+#		    $stat =~ /^\+(?:.*?)\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+#			if (WARN("PREFER_ETHER_ADDR_COPY",
+#				 "Prefer ether_addr_copy() over memcpy() if the Ethernet addresses are __aligned(2)\n" . "$here\n$stat\n") &&
+#			    $fix) {
+#				$fixed[$fixlinenr] =~ s/\bmemcpy\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/ether_addr_copy($2, $7)/;
+#			}
+#		}
+
+# Check for memcmp(foo, bar, ETH_ALEN) that could be ether_addr_equal*(foo, bar)
+#		if ($^V && $^V ge 5.10.0 &&
+#		    defined $stat &&
+#		    $stat =~ /^\+(?:.*?)\bmemcmp\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+#			WARN("PREFER_ETHER_ADDR_EQUAL",
+#			     "Prefer ether_addr_equal() or ether_addr_equal_unaligned() over memcmp()\n" . "$here\n$stat\n")
+#		}
+
+# check for memset(foo, 0x0, ETH_ALEN) that could be eth_zero_addr
+# check for memset(foo, 0xFF, ETH_ALEN) that could be eth_broadcast_addr
+#		if ($^V && $^V ge 5.10.0 &&
+#		    defined $stat &&
+#		    $stat =~ /^\+(?:.*?)\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*\,\s*ETH_ALEN\s*\)/) {
+#
+#			my $ms_val = $7;
+#
+#			if ($ms_val =~ /^(?:0x|)0+$/i) {
+#				if (WARN("PREFER_ETH_ZERO_ADDR",
+#					 "Prefer eth_zero_addr over memset()\n" . "$here\n$stat\n") &&
+#				    $fix) {
+#					$fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_zero_addr($2)/;
+#				}
+#			} elsif ($ms_val =~ /^(?:0xff|255)$/i) {
+#				if (WARN("PREFER_ETH_BROADCAST_ADDR",
+#					 "Prefer eth_broadcast_addr() over memset()\n" . "$here\n$stat\n") &&
+#				    $fix) {
+#					$fixed[$fixlinenr] =~ s/\bmemset\s*\(\s*$FuncArg\s*,\s*$FuncArg\s*,\s*ETH_ALEN\s*\)/eth_broadcast_addr($2)/;
+#				}
+#			}
+#		}
 
 # typecasts on min/max could be min_t/max_t
 		if ($^V && $^V ge 5.10.0 &&
@@ -4238,7 +5855,7 @@ sub process {
 # check for naked sscanf
 		if ($^V && $^V ge 5.10.0 &&
 		    defined $stat &&
-		    $stat =~ /\bsscanf\b/ &&
+		    $line =~ /\bsscanf\b/ &&
 		    ($stat !~ /$Ident\s*=\s*sscanf\s*$balanced_parens/ &&
 		     $stat !~ /\bsscanf\s*$balanced_parens\s*(?:$Compare)/ &&
 		     $stat !~ /(?:$Compare)\s*\bsscanf\s*$balanced_parens/)) {
@@ -4252,13 +5869,34 @@ sub process {
 			     "unchecked sscanf return value\n" . "$here\n$stat_real\n");
 		}
 
+# check for simple sscanf that should be kstrto<foo>
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $line =~ /\bsscanf\b/) {
+			my $lc = $stat =~ tr@\n@@;
+			$lc = $lc + $linenr;
+			my $stat_real = raw_line($linenr, 0);
+		        for (my $count = $linenr + 1; $count <= $lc; $count++) {
+				$stat_real = $stat_real . "\n" . raw_line($count, 0);
+			}
+			if ($stat_real =~ /\bsscanf\b\s*\(\s*$FuncArg\s*,\s*("[^"]+")/) {
+				my $format = $6;
+				my $count = $format =~ tr@%@%@;
+				if ($count == 1 &&
+				    $format =~ /^"\%(?i:ll[udxi]|[udxi]ll|ll|[hl]h?[udxi]|[udxi][hl]h?|[hl]h?|[udxi])"$/) {
+					WARN("SSCANF_TO_KSTRTO",
+					     "Prefer kstrto<type> to single variable sscanf\n" . "$here\n$stat_real\n");
+				}
+			}
+		}
+
 # check for new externs in .h files.
 		if ($realfile =~ /\.h$/ &&
 		    $line =~ /^\+\s*(extern\s+)$Type\s*$Ident\s*\(/s) {
 			if (CHK("AVOID_EXTERNS",
 				"extern prototypes should be avoided in .h files\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(.*)\bextern\b\s*(.*)/$1$2/;
+				$fixed[$fixlinenr] =~ s/(.*)\bextern\b\s*(.*)/$1$2/;
 			}
 		}
 
@@ -4292,13 +5930,50 @@ sub process {
 			     "externs should be avoided in .c files\n" .  $herecurr);
 		}
 
+# check for function declarations that have arguments without identifier names
+		if (defined $stat &&
+		    $stat =~ /^.\s*(?:extern\s+)?$Type\s*$Ident\s*\(\s*([^{]+)\s*\)\s*;/s &&
+		    $1 ne "void") {
+			my $args = trim($1);
+			while ($args =~ m/\s*($Type\s*(?:$Ident|\(\s*\*\s*$Ident?\s*\)\s*$balanced_parens)?)/g) {
+				my $arg = trim($1);
+				if ($arg =~ /^$Type$/ && $arg !~ /enum\s+$Ident$/) {
+					WARN("FUNCTION_ARGUMENTS",
+					     "function definition argument '$arg' should also have an identifier name\n" . $herecurr);
+				}
+			}
+		}
+
+# check for function definitions
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $stat =~ /^.\s*(?:$Storage\s+)?$Type\s*($Ident)\s*$balanced_parens\s*{/s) {
+			$context_function = $1;
+
+# check for multiline function definition with misplaced open brace
+			my $ok = 0;
+			my $cnt = statement_rawlines($stat);
+			my $herectx = $here . "\n";
+			for (my $n = 0; $n < $cnt; $n++) {
+				my $rl = raw_line($linenr, $n);
+				$herectx .=  $rl . "\n";
+				$ok = 1 if ($rl =~ /^[ \+]\{/);
+				$ok = 1 if ($rl =~ /\{/ && $n == 0);
+				last if $rl =~ /^[ \+].*\{/;
+			}
+			if (!$ok) {
+				ERROR("OPEN_BRACE",
+				      "open brace '{' following function definitions go on the next line\n" . $herectx);
+			}
+		}
+
 # checks for new __setup's
 		if ($rawline =~ /\b__setup\("([^"]*)"/) {
 			my $name = $1;
 
 			if (!grep(/$name/, @setup_docs)) {
 				CHK("UNDOCUMENTED_SETUP",
-				    "__setup appears un-documented -- check Documentation/kernel-parameters.txt\n" . $herecurr);
+				    "__setup appears un-documented -- check Documentation/admin-guide/kernel-parameters.rst\n" . $herecurr);
 			}
 		}
 
@@ -4316,6 +5991,38 @@ sub process {
 			    "Prefer $3(sizeof(*$1)...) over $3($4...)\n" . $herecurr);
 		}
 
+# check for k[mz]alloc with multiplies that could be kmalloc_array/kcalloc
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $stat =~ /^\+\s*($Lval)\s*\=\s*(?:$balanced_parens)?\s*(k[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)\s*,/) {
+			my $oldfunc = $3;
+			my $a1 = $4;
+			my $a2 = $10;
+			my $newfunc = "kmalloc_array";
+			$newfunc = "kcalloc" if ($oldfunc eq "kzalloc");
+			my $r1 = $a1;
+			my $r2 = $a2;
+			if ($a1 =~ /^sizeof\s*\S/) {
+				$r1 = $a2;
+				$r2 = $a1;
+			}
+			if ($r1 !~ /^sizeof\b/ && $r2 =~ /^sizeof\s*\S/ &&
+			    !($r1 =~ /^$Constant$/ || $r1 =~ /^[A-Z_][A-Z0-9_]*$/)) {
+				my $ctx = '';
+				my $herectx = $here . "\n";
+				my $cnt = statement_rawlines($stat);
+				for (my $n = 0; $n < $cnt; $n++) {
+					$herectx .= raw_line($linenr, $n) . "\n";
+				}
+				if (WARN("ALLOC_WITH_MULTIPLY",
+					 "Prefer $newfunc over $oldfunc with multiply\n" . $herectx) &&
+				    $cnt == 1 &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*(k[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)/$1 . ' = ' . "$newfunc(" . trim($r1) . ', ' . trim($r2)/e;
+				}
+			}
+		}
+
 # check for krealloc arg reuse
 		if ($^V && $^V ge 5.10.0 &&
 		    $line =~ /\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*krealloc\s*\(\s*\1\s*,/) {
@@ -4329,18 +6036,34 @@ sub process {
 			     "$1 uses number as first arg, sizeof is generally wrong\n" . $herecurr);
 		}
 
-# check for GFP_NOWAIT use
-		if ($line =~ /\b__GFP_NOFAIL\b/) {
-			WARN("__GFP_NOFAIL",
-			     "Use of __GFP_NOFAIL is deprecated, no new users should be added\n" . $herecurr);
-		}
-
 # check for multiple semicolons
 		if ($line =~ /;\s*;\s*$/) {
 			if (WARN("ONE_SEMICOLON",
 				 "Statements terminations use 1 semicolon\n" . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/(\s*;\s*){2,}$/;/g;
+				$fixed[$fixlinenr] =~ s/(\s*;\s*){2,}$/;/g;
+			}
+		}
+
+# check for #defines like: 1 << <digit> that could be BIT(digit), it is not exported to uapi
+		if ($realfile !~ m@^include/uapi/@ &&
+		    $line =~ /#\s*define\s+\w+\s+\(?\s*1\s*([ulUL]*)\s*\<\<\s*(?:\d+|$Ident)\s*\)?/) {
+			my $ull = "";
+			$ull = "_ULL" if (defined($1) && $1 =~ /ll/i);
+			if (CHK("BIT_MACRO",
+				"Prefer using the BIT$ull macro\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/\(?\s*1\s*[ulUL]*\s*<<\s*(\d+|$Ident)\s*\)?/BIT${ull}($1)/;
+			}
+		}
+
+# check for #if defined CONFIG_<FOO> || defined CONFIG_<FOO>_MODULE
+		if ($line =~ /^\+\s*#\s*if\s+defined(?:\s*\(?\s*|\s+)(CONFIG_[A-Z_]+)\s*\)?\s*\|\|\s*defined(?:\s*\(?\s*|\s+)\1_MODULE\s*\)?\s*$/) {
+			my $config = $1;
+			if (WARN("PREFER_IS_ENABLED",
+				 "Prefer IS_ENABLED(<FOO>) to CONFIG_<FOO> || CONFIG_<FOO>_MODULE\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] = "\+#if IS_ENABLED($config)";
 			}
 		}
 
@@ -4350,7 +6073,7 @@ sub process {
 			my $has_statement = 0;
 			my $count = 0;
 			my $prevline = $linenr;
-			while ($prevline > 1 && $count < 3 && !$has_break) {
+			while ($prevline > 1 && ($file || $count < 3) && !$has_break) {
 				$prevline--;
 				my $rline = $rawlines[$prevline - 1];
 				my $fline = $lines[$prevline - 1];
@@ -4388,10 +6111,16 @@ sub process {
 			if (WARN("USE_FUNC",
 				 "__func__ should be used instead of gcc specific __FUNCTION__\n"  . $herecurr) &&
 			    $fix) {
-				$fixed[$linenr - 1] =~ s/\b__FUNCTION__\b/__func__/g;
+				$fixed[$fixlinenr] =~ s/\b__FUNCTION__\b/__func__/g;
 			}
 		}
 
+# check for uses of __DATE__, __TIME__, __TIMESTAMP__
+		while ($line =~ /\b(__(?:DATE|TIME|TIMESTAMP)__)\b/g) {
+			ERROR("DATE_TIME",
+			      "Use of the '$1' macro makes the build non-deterministic\n" . $herecurr);
+		}
+
 # check for use of yield()
 		if ($line =~ /\byield\s*\(\s*\)/) {
 			WARN("YIELD",
@@ -4437,55 +6166,18 @@ sub process {
 			     "$1 is obsolete, use k$3 instead\n" . $herecurr);
 		}
 
-# check for __initcall(), use device_initcall() explicitly please
+# check for __initcall(), use device_initcall() explicitly or more appropriate function please
 		if ($line =~ /^.\s*__initcall\s*\(/) {
 			WARN("USE_DEVICE_INITCALL",
-			     "please use device_initcall() instead of __initcall()\n" . $herecurr);
-		}
-
-# check for various ops structs, ensure they are const.
-		my $struct_ops = qr{acpi_dock_ops|
-				address_space_operations|
-				backlight_ops|
-				block_device_operations|
-				dentry_operations|
-				dev_pm_ops|
-				dma_map_ops|
-				extent_io_ops|
-				file_lock_operations|
-				file_operations|
-				hv_ops|
-				ide_dma_ops|
-				intel_dvo_dev_ops|
-				item_operations|
-				iwl_ops|
-				kgdb_arch|
-				kgdb_io|
-				kset_uevent_ops|
-				lock_manager_operations|
-				microcode_ops|
-				mtrr_ops|
-				neigh_ops|
-				nlmsvc_binding|
-				pci_raw_ops|
-				pipe_buf_operations|
-				platform_hibernation_ops|
-				platform_suspend_ops|
-				proto_ops|
-				rpc_pipe_ops|
-				seq_operations|
-				snd_ac97_build_ops|
-				soc_pcmcia_socket_ops|
-				stacktrace_ops|
-				sysfs_ops|
-				tty_operations|
-				usb_mon_operations|
-				wd_ops}x;
+			     "please use device_initcall() or more appropriate function instead of __initcall() (see include/linux/init.h)\n" . $herecurr);
+		}
+
+# check for various structs that are normally const (ops, kgdb, device_tree)
+# and avoid what seem like struct definitions 'struct foo {'
 		if ($line !~ /\bconst\b/ &&
-		    $line =~ /\bstruct\s+($struct_ops)\b/) {
+		    $line =~ /\bstruct\s+($const_structs)\b(?!\s*\{)/) {
 			WARN("CONST_STRUCT",
-			     "struct $1 should normally be const\n" .
-				$herecurr);
+			     "struct $1 should normally be const\n" . $herecurr);
 		}
 
 # use of NR_CPUS is usually wrong
@@ -4507,16 +6199,11 @@ sub process {
 			      "#define of '$1' is wrong - use Kconfig variables or standard guards instead\n" . $herecurr);
 		}
 
-# check for %L{u,d,i} in strings
-		my $string;
-		while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) {
-			$string = substr($rawline, $-[1], $+[1] - $-[1]);
-			$string =~ s/%%/__/g;
-			if ($string =~ /(?<!%)%L[udi]/) {
-				WARN("PRINTF_L",
-				     "\%Ld/%Lu are not-standard C, use %lld/%llu\n" . $herecurr);
-				last;
-			}
+# likely/unlikely comparisons similar to "(likely(foo) > 0)"
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /\b((?:un)?likely)\s*\(\s*$FuncArg\s*\)\s*$Compare/) {
+			WARN("LIKELY_MISUSE",
+			     "Using $1 should generally have parentheses around the comparison\n" . $herecurr);
 		}
 
 # whine mightly about in_atomic
@@ -4530,6 +6217,34 @@ sub process {
 			}
 		}
 
+# whine about ACCESS_ONCE
+		if ($^V && $^V ge 5.10.0 &&
+		    $line =~ /\bACCESS_ONCE\s*$balanced_parens\s*(=(?!=))?\s*($FuncArg)?/) {
+			my $par = $1;
+			my $eq = $2;
+			my $fun = $3;
+			$par =~ s/^\(\s*(.*)\s*\)$/$1/;
+			if (defined($eq)) {
+				if (WARN("PREFER_WRITE_ONCE",
+					 "Prefer WRITE_ONCE(<FOO>, <BAR>) over ACCESS_ONCE(<FOO>) = <BAR>\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\bACCESS_ONCE\s*\(\s*\Q$par\E\s*\)\s*$eq\s*\Q$fun\E/WRITE_ONCE($par, $fun)/;
+				}
+			} else {
+				if (WARN("PREFER_READ_ONCE",
+					 "Prefer READ_ONCE(<FOO>) over ACCESS_ONCE(<FOO>)\n" . $herecurr) &&
+				    $fix) {
+					$fixed[$fixlinenr] =~ s/\bACCESS_ONCE\s*\(\s*\Q$par\E\s*\)/READ_ONCE($par)/;
+				}
+			}
+		}
+
+# check for mutex_trylock_recursive usage
+		if ($line =~ /mutex_trylock_recursive/) {
+			ERROR("LOCKING",
+			      "recursive locking is bad, do not use this ever.\n" . $herecurr);
+		}
+
 # check for lockdep_set_novalidate_class
 		if ($line =~ /^.\s*lockdep_set_novalidate_class\s*\(/ ||
 		    $line =~ /__lockdep_no_validate__\s*\)/ ) {
@@ -4541,11 +6256,95 @@ sub process {
 			}
 		}
 
-		if ($line =~ /debugfs_create_file.*S_IWUGO/ ||
-		    $line =~ /DEVICE_ATTR.*S_IWUGO/ ) {
+		if ($line =~ /debugfs_create_\w+.*\b$mode_perms_world_writable\b/ ||
+		    $line =~ /DEVICE_ATTR.*\b$mode_perms_world_writable\b/) {
 			WARN("EXPORTED_WORLD_WRITABLE",
 			     "Exporting world writable files is usually an error. Consider more restrictive permissions.\n" . $herecurr);
 		}
+
+# Mode permission misuses where it seems decimal should be octal
+# This uses a shortcut match to avoid unnecessary uses of a slow foreach loop
+		if ($^V && $^V ge 5.10.0 &&
+		    defined $stat &&
+		    $line =~ /$mode_perms_search/) {
+			foreach my $entry (@mode_permission_funcs) {
+				my $func = $entry->[0];
+				my $arg_pos = $entry->[1];
+
+				my $lc = $stat =~ tr@\n@@;
+				$lc = $lc + $linenr;
+				my $stat_real = raw_line($linenr, 0);
+				for (my $count = $linenr + 1; $count <= $lc; $count++) {
+					$stat_real = $stat_real . "\n" . raw_line($count, 0);
+				}
+
+				my $skip_args = "";
+				if ($arg_pos > 1) {
+					$arg_pos--;
+					$skip_args = "(?:\\s*$FuncArg\\s*,\\s*){$arg_pos,$arg_pos}";
+				}
+				my $test = "\\b$func\\s*\\(${skip_args}($FuncArg(?:\\|\\s*$FuncArg)*)\\s*[,\\)]";
+				if ($stat =~ /$test/) {
+					my $val = $1;
+					$val = $6 if ($skip_args ne "");
+					if (($val =~ /^$Int$/ && $val !~ /^$Octal$/) ||
+					    ($val =~ /^$Octal$/ && length($val) ne 4)) {
+						ERROR("NON_OCTAL_PERMISSIONS",
+						      "Use 4 digit octal (0777) not decimal permissions\n" . "$here\n" . $stat_real);
+					}
+					if ($val =~ /^$Octal$/ && (oct($val) & 02)) {
+						ERROR("EXPORTED_WORLD_WRITABLE",
+						      "Exporting writable files is usually an error. Consider more restrictive permissions.\n" . "$here\n" . $stat_real);
+					}
+				}
+			}
+		}
+
+# check for uses of S_<PERMS> that could be octal for readability
+		if ($line =~ /\b$mode_perms_string_search\b/) {
+			my $val = "";
+			my $oval = "";
+			my $to = 0;
+			my $curpos = 0;
+			my $lastpos = 0;
+			while ($line =~ /\b(($mode_perms_string_search)\b(?:\s*\|\s*)?\s*)/g) {
+				$curpos = pos($line);
+				my $match = $2;
+				my $omatch = $1;
+				last if ($lastpos > 0 && ($curpos - length($omatch) != $lastpos));
+				$lastpos = $curpos;
+				$to |= $mode_permission_string_types{$match};
+				$val .= '\s*\|\s*' if ($val ne "");
+				$val .= $match;
+				$oval .= $omatch;
+			}
+			$oval =~ s/^\s*\|\s*//;
+			$oval =~ s/\s*\|\s*$//;
+			my $octal = sprintf("%04o", $to);
+			if (WARN("SYMBOLIC_PERMS",
+				 "Symbolic permissions '$oval' are not preferred. Consider using octal permissions '$octal'.\n" . $herecurr) &&
+			    $fix) {
+				$fixed[$fixlinenr] =~ s/$val/$octal/;
+			}
+		}
+
+# validate content of MODULE_LICENSE against list from include/linux/module.h
+		if ($line =~ /\bMODULE_LICENSE\s*\(\s*($String)\s*\)/) {
+			my $extracted_string = get_quoted_string($line, $rawline);
+			my $valid_licenses = qr{
+						GPL|
+						GPL\ v2|
+						GPL\ and\ additional\ rights|
+						Dual\ BSD/GPL|
+						Dual\ MIT/GPL|
+						Dual\ MPL/GPL|
+						Proprietary
+					}x;
+			if ($extracted_string !~ /^"(?:$valid_licenses)"$/x) {
+				WARN("MODULE_LICENSE",
+				     "unknown module license " . $extracted_string . "\n" . $herecurr);
+			}
+		}
 	}
 
 	# If we have no input at all, then there is nothing to report on
@@ -4566,11 +6365,11 @@ sub process {
 		exit(0);
 	}
 
-	if (!$is_patch) {
+	if (!$is_patch && $file !~ /cover-letter\.patch$/) {
 		ERROR("NOT_UNIFIED_DIFF",
 		      "Does not appear to be a unified-diff format patch\n");
 	}
-	if ($is_patch && $chk_signoff && $signoff == 0) {
+	if ($is_patch && $has_commit_log && $chk_signoff && $signoff == 0) {
 		ERROR("MISSING_SIGN_OFF",
 		      "Missing Signed-off-by: line(s)\n");
 	}
@@ -4581,34 +6380,39 @@ sub process {
 		print "total: $cnt_error errors, $cnt_warn warnings, " .
 			(($check)? "$cnt_chk checks, " : "") .
 			"$cnt_lines lines checked\n";
-		print "\n" if ($quiet == 0);
 	}
 
 	if ($quiet == 0) {
+		# If there were any defects found and not already fixing them
+		if (!$clean and !$fix) {
+			print << "EOM"
 
-		if ($^V lt 5.10.0) {
-			print("NOTE: perl $^V is not modern enough to detect all possible issues.\n");
-			print("An upgrade to at least perl v5.10.0 is suggested.\n\n");
+NOTE: For some of the reported defects, checkpatch may be able to
+      mechanically convert to the typical style using --fix or --fix-inplace.
+EOM
 		}
-
 		# If there were whitespace errors which cleanpatch can fix
 		# then suggest that.
 		if ($rpt_cleaners) {
-			print "NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or\n";
-			print "      scripts/cleanfile\n\n";
 			$rpt_cleaners = 0;
+			print << "EOM"
+
+NOTE: Whitespace errors detected.
+      You may wish to use scripts/cleanpatch or scripts/cleanfile
+EOM
 		}
 	}
 
-	hash_show_words(\%use_type, "Used");
-	hash_show_words(\%ignore_type, "Ignored");
-
-	if ($clean == 0 && $fix && "@rawlines" ne "@fixed") {
+	if ($clean == 0 && $fix &&
+	    ("@rawlines" ne "@fixed" ||
+	     $#fixed_inserted >= 0 || $#fixed_deleted >= 0)) {
 		my $newfile = $filename;
 		$newfile .= ".EXPERIMENTAL-checkpatch-fixes" if (!$fix_inplace);
 		my $linecount = 0;
 		my $f;
 
+		@fixed = fix_inserted_deleted_lines(\@fixed, \@fixed_inserted, \@fixed_deleted);
+
 		open($f, '>', $newfile)
 		    or die "$P: Can't open $newfile for write\n";
 		foreach my $fixed_line (@fixed) {
@@ -4616,7 +6420,7 @@ sub process {
 			if ($file) {
 				if ($linecount > 3) {
 					$fixed_line =~ s/^\+//;
-					print $f $fixed_line. "\n";
+					print $f $fixed_line . "\n";
 				}
 			} else {
 				print $f $fixed_line . "\n";
@@ -4626,6 +6430,7 @@ sub process {
 
 		if (!$quiet) {
 			print << "EOM";
+
 Wrote EXPERIMENTAL --fix correction(s) to '$newfile'
 
 Do _NOT_ trust the results written to this file.
@@ -4633,22 +6438,17 @@ Do _NOT_ submit these changes without inspecting them for correctness.
 
 This EXPERIMENTAL file is simply a convenience to help rewrite patches.
 No warranties, expressed or implied...
-
 EOM
 		}
 	}
 
-	if ($clean == 1 && $quiet == 0) {
-		print "$vname has no obvious style problems and is ready for submission.\n"
-	}
-	if ($clean == 0 && $quiet == 0) {
-		print << "EOM";
-$vname has style problems, please review.
-
-If any of these errors are false positives, please report
-them to the maintainer, see CHECKPATCH in MAINTAINERS.
-EOM
+	if ($quiet == 0) {
+		print "\n";
+		if ($clean == 1) {
+			print "$vname has no obvious style problems and is ready for submission.\n";
+		} else {
+			print "$vname has style problems, please review.\n";
+		}
 	}
-
 	return $clean;
 }
diff --git a/scripts/const_structs.checkpatch b/scripts/const_structs.checkpatch
new file mode 100644
index 0000000000..da775bca0c
--- /dev/null
+++ b/scripts/const_structs.checkpatch
@@ -0,0 +1,2 @@
+# Put structs here that should be constant
+__dummy__

commit 48d1b0a57c71d0dfff7fd16865dcf7ef93a4d2de
Author: Rob Clark <robdclark@gmail.com>
Date:   Mon Sep 11 16:53:08 2017 -0400

    UPSTREAM: lib: strto: fix incorrect handling of specified base
    
    The strto functions should honor the specified base (if non-zero) rather
    than permitting a hex or octal string when the user wanted (for example)
    base 10.
    
    This has been fixed somewhere along the way in the upstream linux kernel
    src tree, at some point after these was copied in to u-boot.  And also
    in a way that duplicates less code.  So port _parse_integer_fixup_radix()
    to u-boot.
    
    Change-Id: I4e2383c6d8ac4666e7e4e40b15f7577522bc9700
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2e794614838292499910060509d3c4a7aaed986a)

diff --git a/lib/strto.c b/lib/strto.c
index e93a4f5491..7f6076909a 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -13,25 +13,30 @@
 #include <errno.h>
 #include <linux/ctype.h>
 
+/* from lib/kstrtox.c */
+static const char *_parse_integer_fixup_radix(const char *s, unsigned int *base)
+{
+	if (*base == 0) {
+		if (s[0] == '0') {
+			if (tolower(s[1]) == 'x' && isxdigit(s[2]))
+				*base = 16;
+			else
+				*base = 8;
+		} else
+			*base = 10;
+	}
+	if (*base == 16 && s[0] == '0' && tolower(s[1]) == 'x')
+		s += 2;
+	return s;
+}
+
 unsigned long simple_strtoul(const char *cp, char **endp,
 				unsigned int base)
 {
 	unsigned long result = 0;
 	unsigned long value;
 
-	if (*cp == '0') {
-		cp++;
-		if ((*cp == 'x') && isxdigit(cp[1])) {
-			base = 16;
-			cp++;
-		}
-
-		if (!base)
-			base = 8;
-	}
-
-	if (!base)
-		base = 10;
+	cp = _parse_integer_fixup_radix(cp, &base);
 
 	while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
 	    ? toupper(*cp) : *cp)-'A'+10) < base) {
@@ -128,19 +133,7 @@ unsigned long long simple_strtoull(const char *cp, char **endp,
 {
 	unsigned long long result = 0, value;
 
-	if (*cp == '0') {
-		cp++;
-		if ((*cp == 'x') && isxdigit(cp[1])) {
-			base = 16;
-			cp++;
-		}
-
-		if (!base)
-			base = 8;
-	}
-
-	if (!base)
-		base = 10;
+	cp = _parse_integer_fixup_radix(cp, &base);
 
 	while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp - '0'
 		: (islower(*cp) ? toupper(*cp) : *cp) - 'A' + 10) < base) {

commit 135b53be98703ef12b8d891407bd0f72ee7dc30c
Author: Alison Chaiken <alison@peloton-tech.com>
Date:   Sat Sep 9 23:54:51 2017 -0700

    UPSTREAM: add pytests for 'gpt rename' and 'gpt swap'
    
    Add unit tests for the 'gpt rename' and 'gpt swap' commands that
    rely on the block device created by test/py/make_test_disk.py.
    Add CONFIG_CMD_GPT_RENAME to the sandbox_defconfig.  Remove the
    testdisk.raw test device at the end of the tests.
    
    Change-Id: I1c5b963a1f84168d4979ad1591f68a5f2a259935
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c5772188ede914b0e67c2a58ae179039a582afe0)

diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 4c4e4809be..e7a61bd61a 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_MX_CYCLIC=y
 CONFIG_CMD_DEMO=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
 CONFIG_CMD_IDE=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PCI=y
diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py
index 73f5c50f6c..06f24b66ce 100644
--- a/test/py/tests/test_gpt.py
+++ b/test/py/tests/test_gpt.py
@@ -35,4 +35,35 @@ def test_gpt_save_guid(u_boot_console):
     output = u_boot_console.run_command('gpt guid host 0 newguid')
     output = u_boot_console.run_command('printenv newguid')
     assert '375a56f7-d6c9-4e81-b5f0-09d41ca89efe' in output
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_rename_partition(u_boot_console):
+    """Test the gpt rename command to write partition names."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt_rename', 'n') != 'y':
+        pytest.skip('gpt rename command not supported')
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    u_boot_console.run_command('gpt rename host 0 1 first')
+    output = u_boot_console.run_command('gpt read host 0')
+    assert 'name first' in output
+    u_boot_console.run_command('gpt rename host 0 2 second')
+    output = u_boot_console.run_command('gpt read host 0')
+    assert 'name second' in output
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_swap_partitions(u_boot_console):
+    """Test the gpt swap command to exchange two partition names."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt_rename', 'n') != 'y':
+        pytest.skip('gpt rename command not supported')
+    if u_boot_console.config.buildconfig.get('config_cmd_part', 'n') != 'y':
+        pytest.skip('gpt swap test needs CMD_PART')
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    output = u_boot_console.run_command('part list host 0')
+    assert '0x000007ff	"first"' in output
+    assert '0x000017ff	"second"' in output
+    u_boot_console.run_command('gpt swap host 0 first second')
+    output = u_boot_console.run_command('part list host 0')
+    assert '0x000007ff	"second"' in output
+    assert '0x000017ff	"first"' in output
     os.remove('testdisk.raw')

commit e2c5d1e4e7230a53c9703120cc8bbe11e74f7f0b
Author: Alison Chaiken <alison@peloton-tech.com>
Date:   Sat Sep 9 23:47:13 2017 -0700

    UPSTREAM: add pytests for 'gpt guid' command in sandbox
    
    Run unit tests for the 'gpt guid' command, making use of the block
    device created by test/py/make_test_disk.py.  Remove this device at
    the end of the tests.
    
    Change-Id: I315989b993388fdce6f0b263376463a3532d154b
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a2f422555fc80144aea418c0d8e95341acfe6868)

diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py
new file mode 100644
index 0000000000..73f5c50f6c
--- /dev/null
+++ b/test/py/tests/test_gpt.py
@@ -0,0 +1,38 @@
+# Copyright (c) 2017 Alison Chaiken
+#
+# SPDX-License-Identifier: GPL-2.0
+
+# Test GPT manipulation commands.
+
+import os
+import pytest
+import u_boot_utils
+import make_test_disk
+
+"""
+These tests rely on a 4 MB block device called testdisk.raw
+which is automatically removed at the end of the tests.
+"""
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_guid(u_boot_console):
+    """Test the gpt guid command."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt', 'n') != 'y':
+        pytest.skip('gpt command not supported')
+    make_test_disk.makeDisk()
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    output = u_boot_console.run_command('gpt guid host 0')
+    assert '375a56f7-d6c9-4e81-b5f0-09d41ca89efe' in output
+
+@pytest.mark.buildconfigspec('cmd_gpt')
+def test_gpt_save_guid(u_boot_console):
+    """Test the gpt guid command to save GUID into a string."""
+
+    if u_boot_console.config.buildconfig.get('config_cmd_gpt', 'n') != 'y':
+        pytest.skip('gpt command not supported')
+    u_boot_console.run_command('host bind 0 testdisk.raw')
+    output = u_boot_console.run_command('gpt guid host 0 newguid')
+    output = u_boot_console.run_command('printenv newguid')
+    assert '375a56f7-d6c9-4e81-b5f0-09d41ca89efe' in output
+    os.remove('testdisk.raw')

commit 4d11a857633de084f5f308bbf6c9d5095d9f07f7
Author: Alison Chaiken <alison@peloton-tech.com>
Date:   Sat Sep 9 23:47:12 2017 -0700

    UPSTREAM: GPT: create block device for sandbox testing
    
    Provide a Python function that creates a small block device for the
    purpose of testing the cmd/gpt.c or cmd/part.c functions in the u-boot
    sandbox.
    
    Change-Id: I620c2f97c7b6533d8cb607e365e719246cdb7acd
    Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit bf6d76b84ae13b463c0dca556118047e2d046f33)

diff --git a/board/sandbox/README.sandbox b/board/sandbox/README.sandbox
index 9dc2eb09d1..947241e3eb 100644
--- a/board/sandbox/README.sandbox
+++ b/board/sandbox/README.sandbox
@@ -338,6 +338,11 @@ $> lodev=`sudo losetup -P -f --show ./disk.raw`
 $> sudo mkfs.vfat -n EFI -v ${lodev}p1
 $> sudo mkfs.ext4 -L ROOT -v ${lodev}p2
 
+or utilize the device described in test/py/make_test_disk.py:
+
+   #!/usr/bin/python
+   import make_test_disk
+   make_test_disk.makeDisk()
 
 Writing Sandbox Drivers
 -----------------------
diff --git a/test/py/make_test_disk.py b/test/py/make_test_disk.py
new file mode 100755
index 0000000000..5288295588
--- /dev/null
+++ b/test/py/make_test_disk.py
@@ -0,0 +1,19 @@
+# Copyright (c) 2017 Alison Chaiken
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+# Create a block device for testing of 'gpt' and 'part' commands.
+
+import os
+
+def makeDisk():
+    if (os.path.exists("testdisk.raw")):
+        os.remove("testdisk.raw")
+    fd = os.open("testdisk.raw", os.O_RDWR|os.O_CREAT )
+    os.ftruncate(fd, 4194304)
+    os.close(fd)
+    os.spawnl(os.P_WAIT, "/sbin/sgdisk", "sgdisk", "-U",
+          "375a56f7-d6c9-4e81-b5f0-09d41ca89efe", "testdisk.raw")
+    os.spawnl(os.P_WAIT, "/sbin/sgdisk", "sgdisk", "--new=1:2048:2560", "testdisk.raw")
+    os.spawnl(os.P_WAIT, "/sbin/sgdisk", "sgdisk", "--new=2:4096:4608", "testdisk.raw")
+    os.spawnl(os.P_WAIT, "/sbin/gdisk", "sgdisk", "-l", "testdisk.raw")

commit 451f4164161c106e1ab10dd32bc809187fdb7625
Author: Wenyou Yang <wenyou.yang@microchip.com>
Date:   Mon Jul 31 15:21:57 2017 +0800

    UPSTREAM: clk: Kconfig: Add dependences of SPL_CLK
    
    The SPL_CLK config should depend on SPL && SPL_DM.
    
    Change-Id: I86d4b934bebde3d4661143902b71e198608ff688
    Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 0712b672d2a1f9a156c489b4dd7ce8354c2b3e1f)

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 7765148876..baa60a52e6 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -12,7 +12,7 @@ config CLK
 
 config SPL_CLK
 	bool "Enable clock support in SPL"
-	depends on CLK && SPL_DM
+	depends on CLK && SPL && SPL_DM
 	help
 	  The clock subsystem adds a small amount of overhead to the image.
 	  If this is acceptable and you have a need to use clock drivers in

commit d3aac30ed7694554019b19f76c2ae4740dbd594c
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Sep 12 20:30:28 2017 -0600

    UPSTREAM: patman: Fix error when the email blacklist is missing
    
    This section of the settings file may be missing. Handle that gracefully
    rather than emitting an error.
    
    Also update patman to write this section when a new settings file is
    created.
    
    Fixes: e11aa602 (patman: add support for omitting bouncing addresses)
    
    Change-Id: I52174b84a9a28e3431fd039185f6e4d521bc037b
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Chris Packham <judge.pckham@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ad8931400b193f701a415e7f69f1ad454d1b0380)

diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index d735ff9ba3..92379b72e7 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -212,7 +212,12 @@ def CreatePatmanConfigFile(config_fname):
         print("Couldn't create patman config file\n")
         raise
 
-    print("[alias]\nme: %s <%s>" % (name, email), file=f)
+    print('''[alias]
+me: %s <%s>
+
+[bounces]
+nxp = Zhikang Zhang <zhikang.zhang@nxp.com>
+''' % (name, email), file=f)
     f.close();
 
 def _UpdateDefaults(parser, config):
@@ -282,6 +287,23 @@ def _ReadBouncesFile(fname):
                     continue
                 bounces.add(line.strip())
 
+def GetItems(config, section):
+    """Get the items from a section of the config.
+
+    Args:
+        config: _ProjectConfigParser object containing settings
+        section: name of section to retrieve
+
+    Returns:
+        List of (name, value) tuples for the section
+    """
+    try:
+        return config.items(section)
+    except ConfigParser.NoSectionError as e:
+        return []
+    except:
+        raise
+
 def Setup(parser, project_name, config_fname=''):
     """Set up the settings module by reading config files.
 
@@ -303,11 +325,11 @@ def Setup(parser, project_name, config_fname=''):
 
     config.read(config_fname)
 
-    for name, value in config.items('alias'):
+    for name, value in GetItems(config, 'alias'):
         alias[name] = value.split(',')
 
     _ReadBouncesFile('doc/bounces')
-    for name, value in config.items('bounces'):
+    for name, value in GetItems(config, 'bounces'):
         bounces.add(value)
 
     _UpdateDefaults(parser, config)

commit 7a001d4f72c161d830b3271f202122448139d2f3
Author: Anatolij Gustschin <agust@denx.de>
Date:   Tue Aug 1 16:17:12 2017 +0200

    UPSTREAM: spl: add newline in debug output
    
    With debug enabled, SPL output following these debug prints is on the
    same line and it is hard to read. Fix it.
    
    Change-Id: I6b0983a285f1deb38cac7e0292c9c286ca6e901b
    Signed-off-by: Anatolij Gustschin <agust@denx.de>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 2d2531be861cb7ec25aa7980b1099ca4f5f46d86)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index d156e74533..6ca42c64ee 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -158,7 +158,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 			spl_image->load_addr, spl_image->size);
 #else
 		/* LEGACY image not supported */
-		debug("Legacy boot image support not enabled, proceeding to other boot methods");
+		debug("Legacy boot image support not enabled, proceeding to other boot methods\n");
 		return -EINVAL;
 #endif
 	} else {
@@ -196,7 +196,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
 		spl_set_header_raw_uboot(spl_image);
 #else
 		/* RAW image not supported, proceed to other boot methods. */
-		debug("Raw boot image support not enabled, proceeding to other boot methods");
+		debug("Raw boot image support not enabled, proceeding to other boot methods\n");
 		return -EINVAL;
 #endif
 	}

commit 59814c3b3d804bc086bc45357ac0308a3682d1f1
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Aug 26 01:02:39 2017 +0900

    UPSTREAM: linux/io.h: import generic ioread* / iowrite* accessors from Linux
    
    Some drivers in Linux (ex. drivers/mtd/nand/denali.c) use
    ioread*/iowrite* accessors.  Import them to make drivers more
    synced.  I copied code from include/asm-generic/io.h of Linux.
    
    Change-Id: Ifb36301885bb1df36f653f0b9a639b4fc1af6406
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6c06f8dc4ab02890ef93b50dac129c2b43cc9ea3)

diff --git a/include/linux/io.h b/include/linux/io.h
index a104b7e69f..bf1ddbbaa6 100644
--- a/include/linux/io.h
+++ b/include/linux/io.h
@@ -9,6 +9,50 @@
 #include <linux/types.h>
 #include <asm/io.h>
 
+static inline u8 ioread8(const volatile void __iomem *addr)
+{
+	return readb(addr);
+}
+
+static inline u16 ioread16(const volatile void __iomem *addr)
+{
+	return readw(addr);
+}
+
+static inline u32 ioread32(const volatile void __iomem *addr)
+{
+	return readl(addr);
+}
+
+#ifdef CONFIG_64BIT
+static inline u64 ioread64(const volatile void __iomem *addr)
+{
+	return readq(addr);
+}
+#endif /* CONFIG_64BIT */
+
+static inline void iowrite8(u8 value, volatile void __iomem *addr)
+{
+	writeb(value, addr);
+}
+
+static inline void iowrite16(u16 value, volatile void __iomem *addr)
+{
+	writew(value, addr);
+}
+
+static inline void iowrite32(u32 value, volatile void __iomem *addr)
+{
+	writel(value, addr);
+}
+
+#ifdef CONFIG_64BIT
+static inline void iowrite64(u64 value, volatile void __iomem *addr)
+{
+	writeq(value, addr);
+}
+#endif /* CONFIG_64BIT */
+
 #ifndef CONFIG_HAVE_ARCH_IOREMAP
 static inline void __iomem *ioremap(resource_size_t offset,
 				    resource_size_t size)

commit ee0f94feab20e0ff9018edfaab8b0896cdbc281b
Author: Andrew F. Davis <afd@ti.com>
Date:   Mon Jul 31 10:58:20 2017 -0500

    image: Add TI PMMC image type
    
    Add a new image type representing TI Power Management
    Micro-Controller (PMMC) Firmware image type.
    
    Change-Id: I28a8132dfd5549ffde3d81e6da7399c3768ac1e7
    Signed-off-by: Andrew F. Davis <afd@ti.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 6442c9643e82966ae8fff391bab3fcc763662564)

diff --git a/common/image.c b/common/image.c
index f5f6cd235b..c6168af3c0 100644
--- a/common/image.c
+++ b/common/image.c
@@ -167,6 +167,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_FPGA,       "fpga",       "FPGA Image" },
 	{       IH_TYPE_TEE,        "tee",        "Trusted Execution Environment Image",},
 	{	IH_TYPE_FIRMWARE_IVT, "firmware_ivt", "Firmware with HABv4 IVT" },
+	{       IH_TYPE_PMMC,        "pmmc",        "TI Power Management Micro-Controller Firmware",},
 	{	IH_TYPE_RKNAND,     "rknand",     "Rockchip NAND Boot Image" },
 	{	-1,		    "",		  "",			},
 };
diff --git a/include/image.h b/include/image.h
index fe0febabaa..e74bd8286b 100644
--- a/include/image.h
+++ b/include/image.h
@@ -269,6 +269,7 @@ enum {
 	IH_TYPE_VYBRIDIMAGE,	/* VYBRID .vyb Image */
 	IH_TYPE_TEE,            /* Trusted Execution Environment OS Image */
 	IH_TYPE_FIRMWARE_IVT,		/* Firmware Image with HABv4 IVT */
+	IH_TYPE_PMMC,            /* TI Power Management Micro-Controller Firmware */
 	IH_TYPE_RKNAND,			/* Rockchip NAND Boot Image	*/
 
 	IH_TYPE_COUNT,			/* Number of image types */

commit 22720541119839d8240de5a29ffe65b68b26b2fd
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:43 2017 -0400

    UPSTREAM: examples: add fallback memcpy
    
    Solves build issue:
    
      Building current source for 134 boards (12 threads, 1 job per thread)
             arm:  +   lsxhl
      +examples/api/vsprintf.o: In function `string16':
      +lib/vsprintf.c:278: undefined reference to `memcpy'
      +examples/api/uuid.o: In function `uuid_bin_to_str':
      +lib/uuid.c:197: undefined reference to `memcpy'
      +lib/uuid.c:199: undefined reference to `memcpy'
      +make[3]: *** [examples/api/demo] Error 1
      +make[2]: *** [examples/api] Error 2
      +make[1]: *** [examples] Error 2
      +make: *** [sub-make] Error 2
        133    0    1 /134    sheevaplug
    
    Change-Id: I467ecc2957a5b74eaf3e368394441817f228a469
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7e3e20560784b048ff19e90cd36b6680626b1ab3)

diff --git a/examples/api/glue.c b/examples/api/glue.c
index 8aabf32c89..575c1e55f3 100644
--- a/examples/api/glue.c
+++ b/examples/api/glue.c
@@ -416,3 +416,15 @@ void ub_display_clear(void)
 {
 	syscall(API_DISPLAY_CLEAR, NULL);
 }
+
+__weak void *memcpy(void *dest, const void *src, size_t size)
+{
+	unsigned char *dptr = dest;
+	const unsigned char *ptr = src;
+	const unsigned char *end = src + size;
+
+	while (ptr < end)
+		*dptr++ = *ptr++;
+
+	return dest;
+}

commit aa5728ff9b9e9ce61516bcf0670050193e8860db
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:42 2017 -0400

    UPSTREAM: vsprintf.c: add GUID printing
    
    This works (roughly) the same way as linux's, but we currently always
    print lower-case (ie. we just keep %pUB and %pUL for compat with linux),
    mostly just because that is what uuid_bin_to_str() supports.
    
      %pUb:   01020304-0506-0708-090a-0b0c0d0e0f10
      %pUl:   04030201-0605-0807-090a-0b0c0d0e0f10
    
    It will be used by a later efi_loader paths for efi variables and for
    device-path-to-text protocol, and also quite useful for debug prints
    of protocol GUIDs.
    
    Change-Id: I6b0920ae6fe99ac0638c9c3c8eed6ea3f964d2b5
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 22ada0c8e6d50281af72176eecdfc356c794639c)

diff --git a/examples/api/Makefile b/examples/api/Makefile
index 87c15d0f68..899527267d 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -35,6 +35,7 @@ EXT_COBJ-y += lib/string.o
 EXT_COBJ-y += lib/time.o
 EXT_COBJ-y += lib/vsprintf.o
 EXT_COBJ-y += lib/charset.o
+EXT_COBJ-$(CONFIG_LIB_UUID) += lib/uuid.o
 EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
 ifeq ($(ARCH),arm)
 EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/arm/lib/memset.o
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 46b7a2a6f2..2c4d43d672 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -58,6 +58,7 @@
 
 #if (CONFIG_IS_ENABLED(PARTITION_UUIDS) || \
 	CONFIG_IS_ENABLED(EFI_PARTITION) || \
+	CONFIG_IS_ENABLED(EFI_LOADER) || \
 	defined(CONFIG_RANDOM_UUID) || \
 	defined(CONFIG_CMD_UUID) || \
 	defined(CONFIG_BOOTP_PXE)) && \
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 97bed9d36d..dd572d2868 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -18,6 +18,7 @@
 
 #include <common.h>
 #include <charset.h>
+#include <uuid.h>
 
 #include <div64.h>
 #define noinline __attribute__((noinline))
@@ -366,6 +367,40 @@ static char *ip4_addr_string(char *buf, char *end, u8 *addr, int field_width,
 }
 #endif
 
+#ifdef CONFIG_LIB_UUID
+/*
+ * This works (roughly) the same way as linux's, but we currently always
+ * print lower-case (ie. we just keep %pUB and %pUL for compat with linux),
+ * mostly just because that is what uuid_bin_to_str() supports.
+ *
+ *   %pUb:   01020304-0506-0708-090a-0b0c0d0e0f10
+ *   %pUl:   04030201-0605-0807-090a-0b0c0d0e0f10
+ */
+static char *uuid_string(char *buf, char *end, u8 *addr, int field_width,
+			 int precision, int flags, const char *fmt)
+{
+	char uuid[UUID_STR_LEN + 1];
+	int str_format = UUID_STR_FORMAT_STD;
+
+	switch (*(++fmt)) {
+	case 'L':
+	case 'l':
+		str_format = UUID_STR_FORMAT_GUID;
+		break;
+	case 'B':
+	case 'b':
+		/* this is the default */
+		break;
+	default:
+		break;
+	}
+
+	uuid_bin_to_str(addr, uuid, str_format);
+
+	return string(buf, end, uuid, field_width, precision, flags);
+}
+#endif
+
 /*
  * Show a '%p' thing.  A kernel extension is that the '%p' is followed
  * by an extra set of alphanumeric characters that are extended format
@@ -399,8 +434,8 @@ static char *pointer(const char *fmt, char *buf, char *end, void *ptr,
 			      flags);
 #endif
 
-#ifdef CONFIG_CMD_NET
 	switch (*fmt) {
+#ifdef CONFIG_CMD_NET
 	case 'a':
 		flags |= SPECIAL | ZEROPAD;
 
@@ -430,8 +465,15 @@ static char *pointer(const char *fmt, char *buf, char *end, void *ptr,
 					       precision, flags);
 		flags &= ~SPECIAL;
 		break;
-	}
 #endif
+#ifdef CONFIG_LIB_UUID
+	case 'U':
+		return uuid_string(buf, end, ptr, field_width, precision,
+				   flags, fmt);
+#endif
+	default:
+		break;
+	}
 	flags |= SMALL;
 	if (field_width == -1) {
 		field_width = 2*sizeof(void *);

commit 5ec685037a799ecdc53ecb1a12a9ed5a9cecb4f4
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:41 2017 -0400

    UPSTREAM: vsprintf.c: add UTF-16 string (%ls) support
    
    This is convenient for efi_loader which deals a lot with UTF-16.  Only
    enabled with CC_SHORT_WCHAR, leaving room to add a UTF-32 version when
    CC_SHORT_WCHAR is not enabled.
    
    Change-Id: I3c6cd45db5f29157760f99bc5956b482ff96fc6c
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 274325c50951dd16ad2a6f45e79dc062ad47011b)

diff --git a/examples/api/Makefile b/examples/api/Makefile
index dab6398bab..87c15d0f68 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -34,6 +34,7 @@ EXT_COBJ-y += lib/div64.o
 EXT_COBJ-y += lib/string.o
 EXT_COBJ-y += lib/time.o
 EXT_COBJ-y += lib/vsprintf.o
+EXT_COBJ-y += lib/charset.o
 EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
 ifeq ($(ARCH),arm)
 EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/arm/lib/memset.o
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 874a2951f7..97bed9d36d 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -17,6 +17,7 @@
 #include <linux/ctype.h>
 
 #include <common.h>
+#include <charset.h>
 
 #include <div64.h>
 #define noinline __attribute__((noinline))
@@ -270,6 +271,26 @@ static char *string(char *buf, char *end, char *s, int field_width,
 	return buf;
 }
 
+static char *string16(char *buf, char *end, u16 *s, int field_width,
+		int precision, int flags)
+{
+	u16 *str = s ? s : L"<NULL>";
+	int utf16_len = utf16_strnlen(str, precision);
+	u8 utf8[utf16_len * MAX_UTF8_PER_UTF16];
+	int utf8_len, i;
+
+	utf8_len = utf16_to_utf8(utf8, str, utf16_len) - utf8;
+
+	if (!(flags & LEFT))
+		while (utf8_len < field_width--)
+			ADDCH(buf, ' ');
+	for (i = 0; i < utf8_len; ++i)
+		ADDCH(buf, utf8[i]);
+	while (utf8_len < field_width--)
+		ADDCH(buf, ' ');
+	return buf;
+}
+
 #ifdef CONFIG_CMD_NET
 static const char hex_asc[] = "0123456789abcdef";
 #define hex_asc_lo(x)	hex_asc[((x) & 0x0f)]
@@ -528,8 +549,13 @@ repeat:
 			continue;
 
 		case 's':
-			str = string(str, end, va_arg(args, char *),
-				     field_width, precision, flags);
+			if (qualifier == 'l' && !IS_ENABLED(CONFIG_SPL_BUILD)) {
+				str = string16(str, end, va_arg(args, u16 *),
+					       field_width, precision, flags);
+			} else {
+				str = string(str, end, va_arg(args, char *),
+					     field_width, precision, flags);
+			}
 			continue;
 
 		case 'p':

commit 407d40f45fa9ead49c6b5f6750e82f727edfe0f0
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:40 2017 -0400

    UPSTREAM: lib: add some utf16 handling helpers
    
    We'll eventually want these in a few places in efi_loader, and also
    vsprintf.
    
    Change-Id: I6c04463ad364e46730fcc84b86d38400f433e8de
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 78178bb0c9dfe2a91a636a411291d8bab50e8a7d)

diff --git a/include/charset.h b/include/charset.h
new file mode 100644
index 0000000000..39279f746a
--- /dev/null
+++ b/include/charset.h
@@ -0,0 +1,65 @@
+/*
+ *  charset conversion utils
+ *
+ *  Copyright (c) 2017 Rob Clark
+ *
+ *  SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CHARSET_H_
+#define __CHARSET_H_
+
+#define MAX_UTF8_PER_UTF16 4
+
+/**
+ * utf16_strlen() - Get the length of an utf16 string
+ *
+ * Returns the number of 16 bit characters in an utf16 string, not
+ * including the terminating NULL character.
+ *
+ * @in     the string to measure
+ * @return the string length
+ */
+size_t utf16_strlen(const uint16_t *in);
+
+/**
+ * utf16_strnlen() - Get the length of a fixed-size utf16 string.
+ *
+ * Returns the number of 16 bit characters in an utf16 string,
+ * not including the terminating NULL character, but at most
+ * 'count' number of characters.  In doing this, utf16_strnlen()
+ * looks at only the first 'count' characters.
+ *
+ * @in     the string to measure
+ * @count  the maximum number of characters to count
+ * @return the string length, up to a maximum of 'count'
+ */
+size_t utf16_strnlen(const uint16_t *in, size_t count);
+
+/**
+ * utf16_strcpy() - UTF16 equivalent of strcpy()
+ */
+uint16_t *utf16_strcpy(uint16_t *dest, const uint16_t *src);
+
+/**
+ * utf16_strdup() - UTF16 equivalent of strdup()
+ */
+uint16_t *utf16_strdup(const uint16_t *s);
+
+/**
+ * utf16_to_utf8() - Convert an utf16 string to utf8
+ *
+ * Converts 'size' characters of the utf16 string 'src' to utf8
+ * written to the 'dest' buffer.
+ *
+ * NOTE that a single utf16 character can generate up to 4 utf8
+ * characters.  See MAX_UTF8_PER_UTF16.
+ *
+ * @dest   the destination buffer to write the utf8 characters
+ * @src    the source utf16 string
+ * @size   the number of utf16 characters to convert
+ * @return the pointer to the first unwritten byte in 'dest'
+ */
+uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size);
+
+#endif /* __CHARSET_H_ */
diff --git a/lib/Makefile b/lib/Makefile
index 10b19d35fe..17331d55b3 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_OF_LIVE) += of_live.o
 obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 
 obj-$(CONFIG_AES) += aes.o
+obj-y += charset.o
 obj-$(CONFIG_USB_TTY) += circbuf.o
 obj-y += crc7.o
 obj-y += crc8.o
diff --git a/lib/charset.c b/lib/charset.c
new file mode 100644
index 0000000000..ff76e88c77
--- /dev/null
+++ b/lib/charset.c
@@ -0,0 +1,101 @@
+/*
+ *  charset conversion utils
+ *
+ *  Copyright (c) 2017 Rob Clark
+ *
+ *  SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <charset.h>
+#include <malloc.h>
+
+/*
+ * utf8/utf16 conversion mostly lifted from grub
+ */
+
+size_t utf16_strlen(const uint16_t *in)
+{
+	size_t i;
+	for (i = 0; in[i]; i++);
+	return i;
+}
+
+size_t utf16_strnlen(const uint16_t *in, size_t count)
+{
+	size_t i;
+	for (i = 0; count-- && in[i]; i++);
+	return i;
+}
+
+uint16_t *utf16_strcpy(uint16_t *dest, const uint16_t *src)
+{
+	uint16_t *tmp = dest;
+
+	while ((*dest++ = *src++) != '\0')
+		/* nothing */;
+	return tmp;
+
+}
+
+uint16_t *utf16_strdup(const uint16_t *s)
+{
+	uint16_t *new;
+	if (!s || !(new = malloc((utf16_strlen(s) + 1) * 2)))
+		return NULL;
+	utf16_strcpy(new, s);
+	return new;
+}
+
+/* Convert UTF-16 to UTF-8.  */
+uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size)
+{
+	uint32_t code_high = 0;
+
+	while (size--) {
+		uint32_t code = *src++;
+
+		if (code_high) {
+			if (code >= 0xDC00 && code <= 0xDFFF) {
+				/* Surrogate pair.  */
+				code = ((code_high - 0xD800) << 10) + (code - 0xDC00) + 0x10000;
+
+				*dest++ = (code >> 18) | 0xF0;
+				*dest++ = ((code >> 12) & 0x3F) | 0x80;
+				*dest++ = ((code >> 6) & 0x3F) | 0x80;
+				*dest++ = (code & 0x3F) | 0x80;
+			} else {
+				/* Error...  */
+				*dest++ = '?';
+				/* *src may be valid. Don't eat it.  */
+				src--;
+			}
+
+			code_high = 0;
+		} else {
+			if (code <= 0x007F) {
+				*dest++ = code;
+			} else if (code <= 0x07FF) {
+				*dest++ = (code >> 6) | 0xC0;
+				*dest++ = (code & 0x3F) | 0x80;
+			} else if (code >= 0xD800 && code <= 0xDBFF) {
+				code_high = code;
+				continue;
+			} else if (code >= 0xDC00 && code <= 0xDFFF) {
+				/* Error... */
+				*dest++ = '?';
+			} else if (code < 0x10000) {
+				*dest++ = (code >> 12) | 0xE0;
+				*dest++ = ((code >> 6) & 0x3F) | 0x80;
+				*dest++ = (code & 0x3F) | 0x80;
+			} else {
+				*dest++ = (code >> 18) | 0xF0;
+				*dest++ = ((code >> 12) & 0x3F) | 0x80;
+				*dest++ = ((code >> 6) & 0x3F) | 0x80;
+				*dest++ = (code & 0x3F) | 0x80;
+			}
+		}
+	}
+
+	return dest;
+}
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index 5ebce4b544..3fc82b8726 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <charset.h>
 #include <efi_loader.h>
 
 static bool console_size_queried;
@@ -138,20 +139,8 @@ static efi_status_t EFIAPI efi_cout_reset(
 
 static void print_unicode_in_utf8(u16 c)
 {
-	char utf8[4] = { 0 };
-	char *b = utf8;
-
-	if (c < 0x80) {
-		*(b++) = c;
-	} else if (c < 0x800) {
-		*(b++) = 192 + c / 64;
-		*(b++) = 128 + c % 64;
-	} else {
-		*(b++) = 224 + c / 4096;
-		*(b++) = 128 + c / 64 % 64;
-		*(b++) = 128 + c % 64;
-	}
-
+	char utf8[MAX_UTF8_PER_UTF16] = { 0 };
+	utf16_to_utf8((u8 *)utf8, &c, 1);
 	puts(utf8);
 }
 

commit bb890a575d70922475f11b0857e38c49b76a2975
Author: Rob Clark <robdclark@gmail.com>
Date:   Sat Sep 9 06:47:39 2017 -0400

    UPSTREAM: kbuild: Enable -fshort-wchar
    
    EFI_LOADER really wants UTF-16 strings (ie. %ls and L"string" are 16bit
    chars instead of 32bit chars).  But rather than enabling -fshort-wchar
    conditionally if EFI_LOADER is enabled, it was deemed preferrable to
    globally switch.
    
    Change-Id: I6cf927d1bce3a9120cd93ee72a9a578b87d8cfe0
    Signed-off-by: Rob Clark <robdclark@gmail.com>
    Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4a85663ec7eddd955d22f1b0f34a9708eac82314)

diff --git a/Makefile b/Makefile
index 8086f3c93e..8250b3409a 100644
--- a/Makefile
+++ b/Makefile
@@ -360,6 +360,7 @@ KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
 KBUILD_CFLAGS   := -Wall -Wstrict-prototypes \
 		   -Wno-format-security \
 		   -fno-builtin -ffreestanding
+KBUILD_CFLAGS	+= -fshort-wchar
 KBUILD_AFLAGS   := -D__ASSEMBLY__
 
 # Read UBOOTRELEASE from include/config/uboot.release (if it exists)

commit 308d4396d10c9f2818fa84ebd8077204c0b5f44f
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Sep 12 11:00:53 2017 -0400

    UPSTREAM: Travis-CI: Update PATH
    
    We now can no longer re-use the provided path and need to give the
    full PATH we want used now.
    
    Change-Id: I2a6929d7d2b49788650048cd7f48340f99fd95c1
    Signed-off-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit fa6365b7c7cf06f3de0aaf55d1c8cd1e5bb30151)

diff --git a/.travis.yml b/.travis.yml
index ea560b9360..4b7f8dd8e4 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -52,7 +52,7 @@ install:
 
 env:
   global:
-    - PATH=/tmp/dtc:/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:$PATH
+    - PATH=/tmp/dtc:/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin
     - PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
     - BUILD_DIR=build
     - HOSTCC="cc"

commit e5f40fb7af642b1065d584d00eea7b2307d9db5b
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Thu Aug 3 12:36:07 2017 +0200

    UPSTREAM: dm: backlight: Add a driver for GPIO backlight
    
    Add a driver for GPIO backlights.
    It understands the standard device tree binding.
    It can be used with simple-panel when PWM is not necessary.
    
    Change-Id: Ia4160d1dfbe53b3f6211f3d321c33b8b5d0be6d0
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5b6a6a91c870949e21b7fd3865582ea6a32ea922)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index ac50309b4b..800cdd168c 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -25,6 +25,16 @@ config BACKLIGHT_PWM
 	  it understands the standard device tree
 	  (leds/backlight/pwm-backlight.txt)
 
+config BACKLIGHT_GPIO
+	bool "Generic GPIO based Backlight Driver"
+	depends on DM_VIDEO
+	help
+	  If you have a LCD backlight adjustable by GPIO, say Y to enable
+	  this driver.
+	  This driver can be used with "simple-panel" and
+	  it understands the standard device tree
+	  (leds/backlight/gpio-backlight.txt)
+
 config VIDEO_BPP8
 	bool "Support 8-bit-per-pixel displays"
 	depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 0c80dd6e80..5fff236a41 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
 obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o
 obj-$(CONFIG_DM_VIDEO) += video_bmp.o
 obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o
+obj-$(CONFIG_BACKLIGHT_GPIO) += backlight_gpio.o
 obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o
 obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o
 obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/
diff --git a/drivers/video/backlight_gpio.c b/drivers/video/backlight_gpio.c
new file mode 100644
index 0000000000..772df5d302
--- /dev/null
+++ b/drivers/video/backlight_gpio.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author: Patrick Delaunay <patrick.delaunay@st.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <backlight.h>
+#include <asm/gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct gpio_backlight_priv {
+	struct gpio_desc gpio;
+	bool def_value;
+};
+
+static int gpio_backlight_enable(struct udevice *dev)
+{
+	struct gpio_backlight_priv *priv = dev_get_priv(dev);
+
+	dm_gpio_set_value(&priv->gpio, 1);
+
+	return 0;
+}
+
+static int gpio_backlight_ofdata_to_platdata(struct udevice *dev)
+{
+	struct gpio_backlight_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio,
+				   GPIOD_IS_OUT);
+	if (ret) {
+		debug("%s: Warning: cannot get GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	priv->def_value = dev_read_bool(dev, "default-on");
+
+	return 0;
+}
+
+static int gpio_backlight_probe(struct udevice *dev)
+{
+	struct gpio_backlight_priv *priv = dev_get_priv(dev);
+
+	if (priv->def_value)
+		gpio_backlight_enable(dev);
+
+	return 0;
+}
+
+static const struct backlight_ops gpio_backlight_ops = {
+	.enable	= gpio_backlight_enable,
+};
+
+static const struct udevice_id gpio_backlight_ids[] = {
+	{ .compatible = "gpio-backlight" },
+	{ }
+};
+
+U_BOOT_DRIVER(gpio_backlight) = {
+	.name	= "gpio_backlight",
+	.id	= UCLASS_PANEL_BACKLIGHT,
+	.of_match = gpio_backlight_ids,
+	.ops	= &gpio_backlight_ops,
+	.ofdata_to_platdata	= gpio_backlight_ofdata_to_platdata,
+	.probe		= gpio_backlight_probe,
+	.priv_auto_alloc_size	= sizeof(struct gpio_backlight_priv),
+};

commit 55451cfe2991f1be6560d6e49f6a177138dfa730
Author: Patrick Delaunay <patrick.delaunay@st.com>
Date:   Thu Aug 3 12:36:06 2017 +0200

    UPSTREAM: dm: backlight: Add CONFIG_BACKLIGHT_PWM
    
    Add a config to select individually the driver for PWM backlights.
    Manage "depends on" to be backyard compatible.
    
    Change-Id: I2028a59567fdd1918adb53d7a2d1394f02fc7f75
    Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 08a43cfbc29224dadf1d725e26697c227bf9723a)

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 48b77eb8d7..ac50309b4b 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -14,6 +14,17 @@ config DM_VIDEO
 	  option compiles in the video uclass and routes all LCD/video access
 	  through this.
 
+config BACKLIGHT_PWM
+	bool "Generic PWM based Backlight Driver"
+	depends on DM_VIDEO && DM_PWM
+	default y
+	help
+	  If you have a LCD backlight adjustable by PWM, say Y to enable
+	  this driver.
+	  This driver can be use with "simple-panel" and
+	  it understands the standard device tree
+	  (leds/backlight/pwm-backlight.txt)
+
 config VIDEO_BPP8
 	bool "Support 8-bit-per-pixel displays"
 	depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 52a7aa0e62..0c80dd6e80 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -11,9 +11,7 @@ obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o
 obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o
 obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o
 obj-$(CONFIG_DM_VIDEO) += video_bmp.o
-ifdef CONFIG_DM_VIDEO
-obj-$(CONFIG_DM_PWM) += pwm_backlight.o
-endif
+obj-$(CONFIG_BACKLIGHT_PWM) += pwm_backlight.o
 obj-$(CONFIG_CONSOLE_NORMAL) += console_normal.o
 obj-$(CONFIG_CONSOLE_ROTATION) += console_rotate.o
 obj-$(CONFIG_CONSOLE_TRUETYPE) += console_truetype.o fonts/

commit b048a4dbd0aff2e42f13b9ae711038aef15d9444
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Mon Sep 4 14:55:57 2017 +0200

    UPSTREAM: dm: test: replace dm_scan_dt() by of dm_extended_scan_fdt() in dm_do_test
    
    This allows to scan the DT including all "clocks" node's sub-nodes
    in which fixed-clock are defined.
    All fixed-clock should be defined inside a clocks node which collect all
    external oscillators. Until now, all clocks sub-nodes can't be binded except
    if the "simple-bus" compatible string is added which is a hack.
    
    Update test.dts by moving clk_fixed node inside clocks.
    
    Change-Id: I9c346d812b0ee270f9b6fc6b6f60af7c28ebb46e
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ee87a097b0f66158ce2985940a5f28ba15a3552d)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 65b2f8ecda..e67d428eb2 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -127,10 +127,12 @@
 		compatible = "denx,u-boot-fdt-test";
 	};
 
-	clk_fixed: clk-fixed {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <1234>;
+	clocks {
+		clk_fixed: clk-fixed {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1234>;
+		};
 	};
 
 	clk_sandbox: clk-sbox {
diff --git a/test/dm/test-main.c b/test/dm/test-main.c
index 9d88d31467..4478e6b8fc 100644
--- a/test/dm/test-main.c
+++ b/test/dm/test-main.c
@@ -92,7 +92,7 @@ static int dm_do_test(struct unit_test_state *uts, struct unit_test *test,
 	if (test->flags & DM_TESTF_PROBE_TEST)
 		ut_assertok(do_autoprobe(uts));
 	if (test->flags & DM_TESTF_SCAN_FDT)
-		ut_assertok(dm_scan_fdt(gd->fdt_blob, false));
+		ut_assertok(dm_extended_scan_fdt(gd->fdt_blob, false));
 
 	/*
 	 * Silence the console and rely on console reocrding to get

commit 46fb92f0e825f26713d1527f3d701fd6ffab95b8
Author: Patrice Chotard <patrice.chotard@st.com>
Date:   Mon Sep 4 14:55:56 2017 +0200

    UPSTREAM: dm: core: add clocks node scan
    
    Currently, all fixed-clock declared in "clocks" node in device tree
    can be binded by clk_fixed_rate.c driver only if each of them have
    the "simple-bus" compatible string.
    This constraint has been invoked here [1].
    
    This patch offers a solution to avoid adding "simple-bus" compatible
    string to nodes that are not busses.
    
    [1] https://patchwork.ozlabs.org/patch/558837/
    
    Change-Id: Ia267df49d4f1b84115d5e600c0f0cd5e74105f53
    Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e81c98649b7a67d43c5baae407430a242d3b26b9)

diff --git a/drivers/core/root.c b/drivers/core/root.c
index d691d6ff94..757d109e57 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -312,8 +312,38 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
 #endif
 	return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
 }
+#else
+static int dm_scan_fdt_node(struct udevice *parent, const void *blob,
+			    int offset, bool pre_reloc_only)
+{
+	return 0;
+}
 #endif
 
+int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only)
+{
+	int node, ret;
+
+	ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
+	if (ret) {
+		debug("dm_scan_fdt() failed: %d\n", ret);
+		return ret;
+	}
+
+	/* bind fixed-clock */
+	node = ofnode_to_offset(ofnode_path("/clocks"));
+	/* if no DT "clocks" node, no need to go further */
+	if (node < 0)
+		return ret;
+
+	ret = dm_scan_fdt_node(gd->dm_root, gd->fdt_blob, node,
+			       pre_reloc_only);
+	if (ret)
+		debug("dm_scan_fdt_node() failed: %d\n", ret);
+
+	return ret;
+}
+
 __weak int dm_scan_other(bool pre_reloc_only)
 {
 	return 0;
@@ -335,9 +365,9 @@ int dm_init_and_scan(bool pre_reloc_only)
 	}
 
 	if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
-		ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
+		ret = dm_extended_scan_fdt(gd->fdt_blob, pre_reloc_only);
 		if (ret) {
-			debug("dm_scan_fdt() failed: %d\n", ret);
+			debug("dm_extended_scan_dt() failed: %d\n", ret);
 			return ret;
 		}
 	}
diff --git a/include/dm/root.h b/include/dm/root.h
index 50a6011644..b075eef2c1 100644
--- a/include/dm/root.h
+++ b/include/dm/root.h
@@ -55,6 +55,20 @@ int dm_scan_platdata(bool pre_reloc_only);
  */
 int dm_scan_fdt(const void *blob, bool pre_reloc_only);
 
+/**
+ * dm_extended_scan_fdt() - Scan the device tree and bind drivers
+ *
+ * This calls dm_scna_dft() which scans the device tree and creates a driver
+ * for each node. the top-level subnodes are examined and also all sub-nodes
+ * of "clocks" node.
+ *
+ * @blob: Pointer to device tree blob
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
+ * @return 0 if OK, -ve on error
+ */
+int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only);
+
 /**
  * dm_scan_other() - Scan for other devices
  *

commit ad6e7aa6ce528362247ba7596accdde9f5ce13bf
Author: Chris Packham <judge.packham@gmail.com>
Date:   Fri Sep 1 20:57:53 2017 +1200

    UPSTREAM: patman: add support for omitting bouncing addresses
    
    Add support for reading a list of bouncing addresses from a in-tree file
    (doc/bounces) and from the ~/.patman config file. These addresses are
    stripped from the Cc list.
    
    Change-Id: I0b4b4107a579b344034c750d63b838ef7960f96e
    Signed-off-by: Chris Packham <judge.packham@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com <mailto:philipp.tomsich@theobroma-systems.com>>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit e11aa602abd3e8007dfd3ed23ebb829101abcfec)

diff --git a/doc/bounces b/doc/bounces
new file mode 100644
index 0000000000..d1c5f0d246
--- /dev/null
+++ b/doc/bounces
@@ -0,0 +1,3 @@
+# List of addresses picked up by patman/get_maintainer.pl that are known to
+# bounce. Addresses are listed one per line and need to match the author
+# information recorded in git.
diff --git a/tools/patman/README b/tools/patman/README
index e36857dede..8582ed6ba1 100644
--- a/tools/patman/README
+++ b/tools/patman/README
@@ -84,6 +84,18 @@ Aliases are recursive.
 The checkpatch.pl in the U-Boot tools/ subdirectory will be located and
 used. Failing that you can put it into your path or ~/bin/checkpatch.pl
 
+If you want to avoid sending patches to email addresses that are picked up
+by patman but are known to bounce you can add a [bounces] section to your
+.patman file. Unlike the [alias] section these are simple key: value pairs
+that are not recursive.
+
+>>>
+
+[bounces]
+gonefishing: Fred Bloggs <f.bloggs@napier.net>
+
+<<<
+
 
 If you want to change the defaults for patman's command-line arguments,
 you can add a [settings] section to your .patman file.  This can be used
diff --git a/tools/patman/series.py b/tools/patman/series.py
index d3947a7c2a..73ee394486 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -10,6 +10,7 @@ import os
 
 import get_maintainer
 import gitutil
+import settings
 import terminal
 
 # Series-xxx tags that we understand
@@ -218,6 +219,7 @@ class Series(dict):
         Return:
             Filename of temp file created
         """
+        col = terminal.Color()
         # Look for commit tags (of the form 'xxx:' at the start of the subject)
         fname = '/tmp/patman.%d' % os.getpid()
         fd = open(fname, 'w')
@@ -233,6 +235,9 @@ class Series(dict):
                 cc += add_maintainers
             elif add_maintainers:
                 cc += get_maintainer.GetMaintainer(commit.patch)
+            for x in set(cc) & set(settings.bounces):
+                print(col.Color(col.YELLOW, 'Skipping "%s"' % x))
+            cc = set(cc) - set(settings.bounces)
             cc = [m.encode('utf-8') if type(m) != str else m for m in cc]
             all_ccs += cc
             print(commit.patch, ', '.join(set(cc)), file=fd)
diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index 5f207f5ef1..d735ff9ba3 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -269,6 +269,19 @@ def _ReadAliasFile(fname):
         if bad_line:
             print(bad_line)
 
+def _ReadBouncesFile(fname):
+    """Read in the bounces file if it exists
+
+    Args:
+        fname: Filename to read.
+    """
+    if os.path.exists(fname):
+        with open(fname) as fd:
+            for line in fd:
+                if line.startswith('#'):
+                    continue
+                bounces.add(line.strip())
+
 def Setup(parser, project_name, config_fname=''):
     """Set up the settings module by reading config files.
 
@@ -293,10 +306,15 @@ def Setup(parser, project_name, config_fname=''):
     for name, value in config.items('alias'):
         alias[name] = value.split(',')
 
+    _ReadBouncesFile('doc/bounces')
+    for name, value in config.items('bounces'):
+        bounces.add(value)
+
     _UpdateDefaults(parser, config)
 
 # These are the aliases we understand, indexed by alias. Each member is a list.
 alias = {}
+bounces = set()
 
 if __name__ == "__main__":
     import doctest

commit 48545cfb0797939abe0e0b0d6ed136e720d55616
Author: Simon Glass <sjg@chromium.org>
Date:   Sun Aug 13 16:02:54 2017 -0600

    UPSTREAM: moveconfig: Use fd.write() instead of print >>
    
    Adjust this code so that it can work with Python 2 and 3.
    
    Fixes: d73fcb1 (moveconfig: Support building a simple config database)
    Change-Id: Ifad4813594adfaf6504cc85f2ee99afb9d1c0fd2
    Reported-by: Chris Packham <judge.packham@gmail.com>
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c79d18c4b40d10c0a95b56e51f4517aca4515364)

diff --git a/lib/libfdt/pylibfdt/libfdt.i b/lib/libfdt/pylibfdt/libfdt.i
index 6c44996c31..5b1a8cf4d4 100644
--- a/lib/libfdt/pylibfdt/libfdt.i
+++ b/lib/libfdt/pylibfdt/libfdt.i
@@ -8,6 +8,8 @@
 
 %module libfdt
 
+%include <stdint.i>
+
 %{
 #define SWIG_FILE_WITH_INIT
 #include "libfdt.h"
diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index 8a03850192..6f549a51c1 100755
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -1877,10 +1877,10 @@ def main():
     if options.build_db:
         with open(CONFIG_DATABASE, 'w') as fd:
             for defconfig, configs in config_db.iteritems():
-                print >>fd, '%s' % defconfig
+                fd.write('%s\n' % defconfig)
                 for config in sorted(configs.keys()):
-                    print >>fd, '   %s=%s' % (config, configs[config])
-                print >>fd
+                    fd.write('   %s=%s\n' % (config, configs[config]))
+                fd.write('\n')
 
 if __name__ == '__main__':
     main()

commit 17c82fdc12e24b32e49a3b53f59b8b2f6b136f8b
Author: Simon Glass <sjg@chromium.org>
Date:   Sat Aug 5 15:45:54 2017 -0600

    UPSTREAM: dm: core: Add ofnode_for_each_subnode()
    
    Add a convenience macro to iterate over subnodes of a node. Make use of
    this where appropriate in the code.
    
    Change-Id: Iae0fb554472d0b5819d26becbbcf8909ff891514
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 3991f42ed2e38aff28ba3c24369bfbd90620bea7)

diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c
index 37b5b8fb5b..abc18c03a5 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.c
+++ b/arch/arm/mach-tegra/xusb-padctl-common.c
@@ -224,9 +224,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
 
 	config->name = ofnode_get_name(node);
 
-	for (subnode = ofnode_first_subnode(node);
-	     ofnode_valid(subnode);
-	     subnode = ofnode_next_subnode(subnode)) {
+	ofnode_for_each_subnode(subnode, node) {
 		struct tegra_xusb_padctl_group *group;
 		int err;
 
@@ -256,9 +254,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
 		return err;
 	}
 
-	for (subnode = ofnode_first_subnode(node);
-	     ofnode_valid(subnode);
-	     subnode = ofnode_next_subnode(subnode)) {
+	ofnode_for_each_subnode(subnode, node) {
 		struct tegra_xusb_padctl_config *config = &padctl->config;
 
 		debug("%s: subnode=%s\n", __func__, ofnode_get_name(subnode));
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 0685b689d8..c6ca13fabf 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -390,10 +390,11 @@ int ofnode_decode_display_timing(ofnode parent, int index,
 	if (!ofnode_valid(timings))
 		return -EINVAL;
 
-	for (i = 0, node = ofnode_first_subnode(timings);
-	     ofnode_valid(node) && i != index;
-	     node = ofnode_first_subnode(node))
-		i++;
+	i = 0;
+	ofnode_for_each_subnode(node, timings) {
+		if (i++ == index)
+			break;
+	}
 
 	if (!ofnode_valid(node))
 		return -EINVAL;
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index feaa5d8567..eefaaa53ad 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -1038,8 +1038,7 @@ int cros_ec_decode_ec_flash(struct udevice *dev, struct fdt_cros_ec *config)
 
 	config->flash_erase_value = ofnode_read_s32_default(flash_node,
 							    "erase-value", -1);
-	for (node = ofnode_first_subnode(flash_node); ofnode_valid(node);
-	     node = ofnode_next_subnode(node)) {
+	ofnode_for_each_subnode(node, flash_node) {
 		const char *name = ofnode_get_name(node);
 		enum ec_flash_region region;
 
diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 9b8d8571e2..152a5ef6c5 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -34,9 +34,7 @@ int pmic_bind_children(struct udevice *pmic, ofnode parent,
 	debug("%s for '%s' at node offset: %d\n", __func__, pmic->name,
 	      dev_of_offset(pmic));
 
-	for (node = ofnode_first_subnode(parent);
-	     ofnode_valid(node);
-	     node = ofnode_next_subnode(node)) {
+	ofnode_for_each_subnode(node, parent) {
 		node_name = ofnode_get_name(node);
 
 		debug("* Found child node: '%s'\n", node_name);
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index de2769ed53..79374b8f91 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -628,4 +628,28 @@ int ofnode_read_resource(ofnode node, uint index, struct resource *res);
 int ofnode_read_resource_byname(ofnode node, const char *name,
 				struct resource *res);
 
+/**
+ * ofnode_for_each_subnode() - iterate over all subnodes of a parent
+ *
+ * @node:       child node (ofnode, lvalue)
+ * @parent:     parent node (ofnode)
+ *
+ * This is a wrapper around a for loop and is used like so:
+ *
+ *	ofnode node;
+ *
+ *	ofnode_for_each_subnode(node, parent) {
+ *		Use node
+ *		...
+ *	}
+ *
+ * Note that this is implemented as a macro and @node is used as
+ * iterator in the loop. The parent variable can be a constant or even a
+ * literal.
+ */
+#define ofnode_for_each_subnode(node, parent) \
+	for (node = ofnode_first_subnode(parent); \
+	     ofnode_valid(node); \
+	     node = ofnode_next_subnode(node))
+
 #endif

commit 0c69cd527fe67bb2fe6a2afc655fbc932be57de3
Author: Simon Glass <sjg@chromium.org>
Date:   Fri Aug 4 03:30:30 2017 -0600

    UPSTREAM: genconfig.py: Print defconfig next to warnings
    
    At present we sometimes see warnings of the form:
    
    /tmp/tmpMA89kB:36: warning: overriding the value of CMD_SPL.
            Old value: "y", new value: "y".
    
    This is not very useful as it does not show whch defconfig file it relates
    to. Update the tool to show this.
    
    Change-Id: Ib4e5c75fa4e7948744d293a8b4d8f07e4474a0ff
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 8639f69a61b47971dba47ab5ed72e47436729bb1)

diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py
index d28bbf0b49..352ad438ee 100644
--- a/tools/buildman/kconfiglib.py
+++ b/tools/buildman/kconfiglib.py
@@ -204,6 +204,7 @@ class Config(object):
 
         self.print_warnings = print_warnings
         self.print_undef_assign = print_undef_assign
+        self._warnings = []
 
         # For parsing routines that stop when finding a line belonging to a
         # different construct, these holds that line and the tokenized version
@@ -398,8 +399,12 @@ class Config(object):
           need to refer to the top-level kernel directory with "$srctree".
 
         replace (default: True): True if the configuration should replace the
-           old configuration; False if it should add to it."""
+           old configuration; False if it should add to it.
 
+        Returns a list or warnings (hopefully empty)
+        """
+
+        self._warnings = []
         # Put this first so that a missing file doesn't screw up our state
         filename = os.path.expandvars(filename)
         line_feeder = _FileFeed(filename)
@@ -449,7 +454,7 @@ class Config(object):
         while 1:
             line = line_feeder.get_next()
             if line is None:
-                return
+                return self._warnings
 
             line = line.rstrip()
 
@@ -1763,8 +1768,10 @@ class Config(object):
 
     def _warn(self, msg, filename=None, linenr=None):
         """For printing warnings to stderr."""
+        msg = _build_msg("warning: " + msg, filename, linenr)
         if self.print_warnings:
-            _stderr_msg("warning: " + msg, filename, linenr)
+            sys.stderr.write(msg + "\n")
+        self._warnings.append(msg)
 
 class Item(object):
 
@@ -3369,10 +3376,13 @@ def _clean_up_path(path):
         path = path[2:]
     return path.rstrip("/")
 
-def _stderr_msg(msg, filename, linenr):
+def _build_msg(msg, filename, linenr):
     if filename is not None:
-        sys.stderr.write("{0}:{1}: ".format(_clean_up_path(filename), linenr))
-    sys.stderr.write(msg + "\n")
+        msg = "{0}:{1}: ".format(_clean_up_path(filename), linenr) + msg
+    return msg
+
+def _stderr_msg(msg, filename, linenr):
+    sys.stderr.write(_build_msg(msg, filename, linenr) + "\n")
 
 def _tokenization_error(s, filename, linenr):
     loc = "" if filename is None else "{0}:{1}: ".format(filename, linenr)
diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py
index 2e871feaf4..2345a19798 100755
--- a/tools/genboardscfg.py
+++ b/tools/genboardscfg.py
@@ -124,7 +124,7 @@ class KconfigScanner:
         os.environ['srctree'] = os.getcwd()
         os.environ['UBOOTVERSION'] = 'dummy'
         os.environ['KCONFIG_OBJDIR'] = ''
-        self._conf = kconfiglib.Config()
+        self._conf = kconfiglib.Config(print_warnings=False)
 
     def __del__(self):
         """Delete a leftover temporary file before exit.
@@ -166,7 +166,10 @@ class KconfigScanner:
                 else:
                     f.write(line[colon + 1:])
 
-        self._conf.load_config(self._tmpfile)
+        warnings = self._conf.load_config(self._tmpfile)
+        if warnings:
+            for warning in warnings:
+                print '%s: %s' % (defconfig, warning)
 
         try_remove(self._tmpfile)
         self._tmpfile = None

commit ae9ecb978128e63bfe851dc9a651f68102478cd2
Author: Simon Glass <sjg@chromium.org>
Date:   Wed Aug 2 12:12:02 2017 -0600

    UPSTREAM: dm: core: Show driver name with 'dm tree'
    
    It is often useful to see which driver was actually selected for each
    device. Add a new 'Driver' column to provide this information. Sample
    output:
    
     Class       Probed   Driver     Name
    ----------------------------------------
     root        [ + ]    root_drive root_driver
     keyboard    [ + ]    i8042_kbd  |-- keyboard
     serial      [ + ]    ns16550_se |-- serial
     rtc         [   ]    rtc_mc1468 |-- rtc
     timer       [ + ]    tsc_timer  |-- tsc-timer
     syscon      [ + ]    ich6_pinct |-- pch_pinctrl
     pci         [ + ]    pci_x86    |-- pci
     northbridge [ + ]    bd82x6x_no |   |-- northbridge@0,0
     video       [ + ]    bd82x6x_vi |   |-- gma@2,0
     vidconsole0 [ + ]    vidconsole |   |   `-- gma@2,0.vidconsole0
    ...
    
    Change-Id: Ib6ed67d9de2d94f9aae4d4a180a71191a0836786
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit ee3e520dad0b368df4541cd0af0d4011cf481e5b)

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 1bb64098f4..6c6b944453 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -16,8 +16,8 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 	struct udevice *child;
 
 	/* print the first 11 characters to not break the tree-format. */
-	printf(" %-10.10s [ %c ]    ", dev->uclass->uc_drv->name,
-	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ');
+	printf(" %-10.10s [ %c ]   %-10.10s  ", dev->uclass->uc_drv->name,
+	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ', dev->driver->name);
 
 	for (i = depth; i >= 0; i--) {
 		is_last = (last_flag >> i) & 1;
@@ -48,7 +48,7 @@ void dm_dump_all(void)
 
 	root = dm_root();
 	if (root) {
-		printf(" Class      Probed   Name\n");
+		printf(" Class      Probed  Driver      Name\n");
 		printf("----------------------------------------\n");
 		show_devices(root, -1, 0);
 	}

commit 58b0f0021c478d47a95fa2b52df8b50a7fb2f082
Author: Simon Glass <sjg@chromium.org>
Date:   Wed Aug 2 12:12:01 2017 -0600

    UPSTREAM: dm: core: Drop use of strlcpy()
    
    We can use printf() to limit the string width. Adjust the code to do this
    instead of using strlcpy() which is a bit clumbsy.
    
    Change-Id: I69e67116ac1e955498ff886c7daa7461e1fa17ab
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
    Tested-by: Bin Meng <bmeng.cn@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit a0f9acb08bd6f3b4a6f3adcb02c8170e522c074a)

diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index c3e109e7ed..1bb64098f4 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -14,11 +14,9 @@ static void show_devices(struct udevice *dev, int depth, int last_flag)
 {
 	int i, is_last;
 	struct udevice *child;
-	char class_name[12];
 
 	/* print the first 11 characters to not break the tree-format. */
-	strlcpy(class_name, dev->uclass->uc_drv->name, sizeof(class_name));
-	printf(" %-11s [ %c ]    ", class_name,
+	printf(" %-10.10s [ %c ]    ", dev->uclass->uc_drv->name,
 	       dev->flags & DM_FLAG_ACTIVATED ? '+' : ' ');
 
 	for (i = depth; i >= 0; i--) {
@@ -50,7 +48,7 @@ void dm_dump_all(void)
 
 	root = dm_root();
 	if (root) {
-		printf(" Class       Probed   Name\n");
+		printf(" Class      Probed   Name\n");
 		printf("----------------------------------------\n");
 		show_devices(root, -1, 0);
 	}

commit 9ff3d0147e970e15128c2e0436f2f4069b687ad4
Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Date:   Sat Aug 26 00:50:17 2017 +0900

    UPSTREAM: dma: import linux/dma-direction.h to consolidate enum dma_data_direction
    
    Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete
    duplicated definitions of enum dma_data_direction.
    
    Change-Id: I9c6569e4ab91ac82fb1c99a38003a1ac48061813
    Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
    Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit b27af39935855c88ef2203dcfc1ff54e013237c4)

diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index a5821f54e5..287466800e 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -8,13 +8,9 @@
 #ifndef __ASM_ARM_DMA_MAPPING_H
 #define __ASM_ARM_DMA_MAPPING_H
 
-#define	dma_mapping_error(x, y)	0
+#include <linux/dma-direction.h>
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL	= 0,
-	DMA_TO_DEVICE		= 1,
-	DMA_FROM_DEVICE		= 2,
-};
+#define	dma_mapping_error(x, y)	0
 
 static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
diff --git a/arch/nds32/include/asm/dma-mapping.h b/arch/nds32/include/asm/dma-mapping.h
index 25e5a1b6ec..a627306ed8 100644
--- a/arch/nds32/include/asm/dma-mapping.h
+++ b/arch/nds32/include/asm/dma-mapping.h
@@ -7,11 +7,7 @@
 #ifndef __ASM_NDS_DMA_MAPPING_H
 #define __ASM_NDS_DMA_MAPPING_H
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL	= 0,
-	DMA_TO_DEVICE		= 1,
-	DMA_FROM_DEVICE		= 2,
-};
+#include <linux/dma-direction.h>
 
 static void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 7de4c08e36..43073ad252 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -8,13 +8,9 @@
 #ifndef __ASM_X86_DMA_MAPPING_H
 #define __ASM_X86_DMA_MAPPING_H
 
-#define	dma_mapping_error(x, y)	0
+#include <linux/dma-direction.h>
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL	= 0,
-	DMA_TO_DEVICE		= 1,
-	DMA_FROM_DEVICE		= 2,
-};
+#define	dma_mapping_error(x, y)	0
 
 static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
 {
diff --git a/drivers/ata/sata_dwc.c b/drivers/ata/sata_dwc.c
index a226ca2dec..2f3b2ddb41 100644
--- a/drivers/ata/sata_dwc.c
+++ b/drivers/ata/sata_dwc.c
@@ -26,6 +26,7 @@
 #include <command.h>
 #include <pci.h>
 #include <asm/processor.h>
+#include <linux/dma-direction.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <malloc.h>
diff --git a/drivers/ata/sata_dwc.h b/drivers/ata/sata_dwc.h
index e2d9e0c1fc..17fb20cf43 100644
--- a/drivers/ata/sata_dwc.h
+++ b/drivers/ata/sata_dwc.h
@@ -401,13 +401,6 @@ struct ata_device {
 #endif
 };
 
-enum dma_data_direction {
-	DMA_BIDIRECTIONAL = 0,
-	DMA_TO_DEVICE = 1,
-	DMA_FROM_DEVICE = 2,
-	DMA_NONE = 3,
-};
-
 struct ata_link {
 	struct ata_port		*ap;
 	int			pmp;
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index 398bd5648a..7d582c2bf9 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -11,10 +11,10 @@
 #include <mmc.h>
 #include <dm.h>
 #include <linux/compat.h>
+#include <linux/dma-direction.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <asm/unaligned.h>
-#include <asm/dma-mapping.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/include/linux/dma-direction.h b/include/linux/dma-direction.h
new file mode 100644
index 0000000000..95b6a82f59
--- /dev/null
+++ b/include/linux/dma-direction.h
@@ -0,0 +1,13 @@
+#ifndef _LINUX_DMA_DIRECTION_H
+#define _LINUX_DMA_DIRECTION_H
+/*
+ * These definitions mirror those in pci.h, so they can be used
+ * interchangeably with their PCI_ counterparts.
+ */
+enum dma_data_direction {
+	DMA_BIDIRECTIONAL = 0,
+	DMA_TO_DEVICE = 1,
+	DMA_FROM_DEVICE = 2,
+	DMA_NONE = 3,
+};
+#endif

commit 91603e0221f3dc234ebae7d9531538b8beb69342
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Aug 17 15:55:50 2017 +0800

    UPSTREAM: armv8: mmu: add space around operator
    
    Add space around operator "+", make it
    match the coding style.
    
    Change-Id: I5cb1e3cea056db89d7ac0c16c233228d39bf6675
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 347e30e1720ea6c0231f81d278b076a39280a314)

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 7752741028..6121aab547 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -16,7 +16,7 @@
 #undef  PAGE_SIZE
 #define PAGE_SHIFT		12
 #define PAGE_SIZE		(1 << PAGE_SHIFT)
-#define PAGE_MASK		(~(PAGE_SIZE-1))
+#define PAGE_MASK		(~(PAGE_SIZE - 1))
 
 /***************************************************************/
 

commit 3d53e4e6800955f28728c3c2359e648078cd635b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Aug 17 15:55:01 2017 +0800

    UPSTREAM: armv8: mmu: remove unused macro definition
    
    Macro VA_BITS and PTE_BLOCK_BITS are not used
    in the code, so remove them.
    
    Change-Id: I5a6b900c8d1d145f28d1604c9b614226c20159d5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: York Sun <york.sun@nxp.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 4f84cb980fdc25d7735fe114021b4a84ea601b9f)

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index a34990368e..7752741028 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -8,15 +8,6 @@
 #ifndef _ASM_ARMV8_MMU_H_
 #define _ASM_ARMV8_MMU_H_
 
-/***************************************************************/
-/*
- * The following definitions are related each other, shoud be
- * calculated specifically.
- */
-
-#define VA_BITS			CONFIG_SYS_VA_BITS
-#define PTE_BLOCK_BITS		CONFIG_SYS_PTL2_BITS
-
 /*
  * block/section address mask and size definitions.
  */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index aeb490718e..46cd9299dd 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -4422,7 +4422,6 @@ CONFIG_SYS_PSDPAR
 CONFIG_SYS_PSSR_VAL
 CONFIG_SYS_PTCPAR
 CONFIG_SYS_PTDPAR
-CONFIG_SYS_PTL2_BITS
 CONFIG_SYS_PTV
 CONFIG_SYS_PUAPAR
 CONFIG_SYS_QE_FMAN_FW_IN_MMC
@@ -4797,7 +4796,6 @@ CONFIG_SYS_USE_SERIALFLASH
 CONFIG_SYS_USE_SPIFLASH
 CONFIG_SYS_USR_EXCEP
 CONFIG_SYS_U_BOOT_OFFS
-CONFIG_SYS_VA_BITS
 CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR
 CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN
 CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT

commit ebec805a62161a19e71ec21dcae62d145a4f23fb
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:45 2017 -0700

    UPSTREAM: spl: fit: Add booting OS first
    
    If CONFIG_SPL_OS_BOOT is enabled, boot OS if kernel image is found
    in FIT structure.
    
    Change-Id: I6fcb0a0ac05e4d548b2bce93f9def04c12294998
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit c8bc3c0c9ff7ce649b2af1416919b50ecf504874)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 9449a225ff..49ccf1c17b 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -222,13 +222,16 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	ulong size;
 	unsigned long count;
 	struct spl_image_info image_info;
-	int node, images, ret;
+	bool boot_os = false;
+	int node = -1;
+	int images, ret;
 	int base_offset, align_len = ARCH_DMA_MINALIGN - 1;
 	int index = 0;
 
 	/*
-	 * Figure out where the external images start. This is the base for the
-	 * data-offset properties in each image.
+	 * For FIT with external data, figure out where the external images
+	 * start. This is the base for the data-offset properties in each
+	 * image.
 	 */
 	size = fdt_totalsize(fit);
 	size = (size + 3) & ~3;
@@ -247,6 +250,9 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	 *
 	 * In fact the FIT has its own load address, but we assume it cannot
 	 * be before CONFIG_SYS_TEXT_BASE.
+	 *
+	 * For FIT with data embedded, data is loaded as part of FIT image.
+	 * For FIT with external data, data is not loaded in this step.
 	 */
 	fit = (void *)((CONFIG_SYS_TEXT_BASE - size - info->bl_len -
 			align_len) & ~align_len);
@@ -264,8 +270,17 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 		return -1;
 	}
 
+#ifdef CONFIG_SPL_OS_BOOT
+	/* Find OS image first */
+	node = spl_fit_get_image_node(fit, images, FIT_KERNEL_PROP, 0);
+	if (node < 0)
+		debug("No kernel image.\n");
+	else
+		boot_os = true;
+#endif
 	/* find the U-Boot image */
-	node = spl_fit_get_image_node(fit, images, "firmware", 0);
+	if (node < 0)
+		node = spl_fit_get_image_node(fit, images, "firmware", 0);
 	if (node < 0) {
 		debug("could not find firmware image, trying loadables...\n");
 		node = spl_fit_get_image_node(fit, images, "loadables", 0);
@@ -287,24 +302,31 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 	if (ret)
 		return ret;
 
+#ifdef CONFIG_SPL_OS_BOOT
+	if (!fit_image_get_os(fit, node, &spl_image->os))
+		debug("Image OS is %s\n", genimg_get_os_name(spl_image->os));
+#else
 	spl_image->os = IH_OS_U_BOOT;
+#endif
 
-	/* Figure out which device tree the board wants to use */
-	node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
-	if (node < 0) {
-		debug("%s: cannot find FDT node\n", __func__);
-		return node;
-	}
+	if (!boot_os) {
+		/* Figure out which device tree the board wants to use */
+		node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0);
+		if (node < 0) {
+			debug("%s: cannot find FDT node\n", __func__);
+			return node;
+		}
 
-	/*
-	 * Read the device tree and place it after the image.
-	 * Align the destination address to ARCH_DMA_MINALIGN.
-	 */
-	image_info.load_addr = spl_image->load_addr + spl_image->size;
-	ret = spl_load_fit_image(info, sector, fit, base_offset, node,
-				 &image_info);
-	if (ret < 0)
-		return ret;
+		/*
+		 * Read the device tree and place it after the image.
+		 * Align the destination address to ARCH_DMA_MINALIGN.
+		 */
+		image_info.load_addr = spl_image->load_addr + spl_image->size;
+		ret = spl_load_fit_image(info, sector, fit, base_offset, node,
+					 &image_info);
+		if (ret < 0)
+			return ret;
+	}
 
 	/* Now check if there are more images for us to load */
 	for (; ; index++) {
diff --git a/doc/uImage.FIT/multi_spl.its b/doc/uImage.FIT/multi_spl.its
index e5551d42b7..d43563d87a 100644
--- a/doc/uImage.FIT/multi_spl.its
+++ b/doc/uImage.FIT/multi_spl.its
@@ -4,6 +4,13 @@
  * (Bogus) example FIT image description file demonstrating the usage
  * of multiple images loaded by the SPL.
  * Several binaries will be loaded at their respective load addresses.
+ *
+ * For booting U-Boot, "firmware" is searched first. If not found, "loadables"
+ * is used to identify images to be loaded into memory. If falcon boot is
+ * enabled, "kernel" is searched first. If not found, it falls back to the
+ * same flow as booting U-Boot. Changing image type will result skipping
+ * specific image.
+ *
  * Finally the one image specifying an entry point will be entered by the SPL.
  */
 

commit 0ea10b9f858f75b909254e8d48cacf8e79a60896
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:44 2017 -0700

    UPSTREAM: spl: fit: Support both external and embedded data
    
    SPL supports U-Boot image in FIT format which has data outside of
    FIT structure. This adds support for embedded data for normal FIT
    images.
    
    Change-Id: Iad87ee9d443259a6af53f0473dc1b97db083df8d
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 5fd13d973613d308663f97b51059ecd9179baf09)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index fe41ce02d2..9449a225ff 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -132,14 +132,16 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			      void *fit, ulong base_offset, int node,
 			      struct spl_image_info *image_info)
 {
-	ulong offset;
+	int offset;
 	size_t length;
+	int len;
 	ulong load_addr, load_ptr;
 	void *src;
 	ulong overhead;
 	int nr_sectors;
 	int align_len = ARCH_DMA_MINALIGN - 1;
 	uint8_t image_comp = -1, type = -1;
+	const void *data;
 
 	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) {
 		if (fit_image_get_comp(fit, node, &image_comp))
@@ -153,28 +155,40 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 			debug("%s ", genimg_get_type_name(type));
 	}
 
-	offset = fdt_getprop_u32(fit, node, "data-offset");
-	if (offset == FDT_ERROR)
-		return -ENOENT;
-	offset += base_offset;
-	length = fdt_getprop_u32(fit, node, "data-size");
-	if (length == FDT_ERROR)
-		return -ENOENT;
-	load_addr = fdt_getprop_u32(fit, node, "load");
-	if (load_addr == FDT_ERROR && image_info)
+	if (fit_image_get_load(fit, node, &load_addr))
 		load_addr = image_info->load_addr;
-	load_ptr = (load_addr + align_len) & ~align_len;
 
-	overhead = get_aligned_image_overhead(info, offset);
-	nr_sectors = get_aligned_image_size(info, length, offset);
+	if (!fit_image_get_data_offset(fit, node, &offset)) {
+		/* External data */
+		offset += base_offset;
+		if (fit_image_get_data_size(fit, node, &len))
+			return -ENOENT;
 
-	if (info->read(info, sector + get_aligned_image_offset(info, offset),
-		       nr_sectors, (void*)load_ptr) != nr_sectors)
-		return -EIO;
-	debug("image dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
-	      (unsigned long)length);
+		load_ptr = (load_addr + align_len) & ~align_len;
+		length = len;
+
+		overhead = get_aligned_image_overhead(info, offset);
+		nr_sectors = get_aligned_image_size(info, length, offset);
+
+		if (info->read(info,
+			       sector + get_aligned_image_offset(info, offset),
+			       nr_sectors, (void *)load_ptr) != nr_sectors)
+			return -EIO;
+
+		debug("External data: dst=%lx, offset=%x, size=%lx\n",
+		      load_ptr, offset, (unsigned long)length);
+		src = (void *)load_ptr + overhead;
+	} else {
+		/* Embedded data */
+		if (fit_image_get_data(fit, node, &data, &length)) {
+			puts("Cannot get image data/size\n");
+			return -ENOENT;
+		}
+		debug("Embedded data: dst=%lx, size=%lx\n", load_addr,
+		      (unsigned long)length);
+		src = (void *)data;
+	}
 
-	src = (void *)load_ptr + overhead;
 #ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
 	board_fit_image_post_process(&src, &length);
 #endif
diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt
index 136d3d7078..32825eda8d 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -288,6 +288,10 @@ The 'data-offset' property can be substituted with 'data-position', which
 defines an absolute position or address as the offset. This is helpful when
 booting U-Boot proper before performing relocation.
 
+Normal kernel FIT image has data embedded within FIT structure. U-Boot image
+for SPL boot has external data. Existence of 'data-offset' can be used to
+identify which format is used.
+
 9) Examples
 -----------
 

commit 40484c6d8ce3fca223208d25925a1948b50dc72e
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:42 2017 -0700

    UPSTREAM: cmd: spl: Fix compiling warning
    
    Fix warning "cast from pointer to integer of different size".
    
    Change-Id: Ib6306c30cdbfc180c5cd452def44eb661cc4fc28
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit d1f2ee7021dc4a89f43e25f289747a27da0e930f)

diff --git a/cmd/spl.c b/cmd/spl.c
index ad033652d4..4d84492346 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -109,12 +109,12 @@ static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	c = find_cmd_tbl(argv[1], &cmd_spl_export_sub[0],
 		ARRAY_SIZE(cmd_spl_export_sub));
-	if ((c) && ((int)c->cmd <= SPL_EXPORT_LAST)) {
+	if ((c) && ((long)c->cmd <= SPL_EXPORT_LAST)) {
 		argc -= 2;
 		argv += 2;
-		if (call_bootm(argc, argv, subcmd_list[(int)c->cmd]))
+		if (call_bootm(argc, argv, subcmd_list[(long)c->cmd]))
 			return -1;
-		switch ((int)c->cmd) {
+		switch ((long)c->cmd) {
 #ifdef CONFIG_OF_LIBFDT
 		case SPL_EXPORT_FDT:
 			printf("Argument image is now in RAM: 0x%p\n",
@@ -153,7 +153,7 @@ static int do_spl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	c = find_cmd_tbl(argv[1], &cmd_spl_sub[0], ARRAY_SIZE(cmd_spl_sub));
 	if (c) {
-		cmd = (int)c->cmd;
+		cmd = (long)c->cmd;
 		switch (cmd) {
 		case SPL_EXPORT:
 			argc--;

commit b81c4739f4f34317a5e3ae5c06b14446b9e3c18e
Author: York Sun <york.sun@nxp.com>
Date:   Tue Aug 15 11:14:43 2017 -0700

    UPSTREAM: spl: fit: Eanble GZIP support for image decompression
    
    Add Kconfig option SPL_GZIP and SPL_ZLIB to enable gunzip support for
    SPL boot, eg. falcon boot compressed kernel image.
    
    Change-Id: I68f64aca8ecad26478f2ce25676253cee7e57d30
    Signed-off-by: York Sun <york.sun@nxp.com>
    Reviewed-by: Tom Rini <trini@konsulko.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    (cherry picked from commit 7264f2928b46c5f5685e39ed607652c8991e47b6)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index d2a352ecbe..fe41ce02d2 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -11,6 +11,10 @@
 #include <libfdt.h>
 #include <spl.h>
 
+#ifndef CONFIG_SYS_BOOTM_LEN
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)
+#endif
+
 /**
  * spl_fit_get_image_node(): By using the matching configuration subnode,
  * retrieve the name of an image, specified by a property name and an index
@@ -135,6 +139,19 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	ulong overhead;
 	int nr_sectors;
 	int align_len = ARCH_DMA_MINALIGN - 1;
+	uint8_t image_comp = -1, type = -1;
+
+	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) && IS_ENABLED(CONFIG_SPL_GZIP)) {
+		if (fit_image_get_comp(fit, node, &image_comp))
+			puts("Cannot get image compression format.\n");
+		else
+			debug("%s ", genimg_get_comp_name(image_comp));
+
+		if (fit_image_get_type(fit, node, &type))
+			puts("Cannot get image type.\n");
+		else
+			debug("%s ", genimg_get_type_name(type));
+	}
 
 	offset = fdt_getprop_u32(fit, node, "data-offset");
 	if (offset == FDT_ERROR)
@@ -154,7 +171,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	if (info->read(info, sector + get_aligned_image_offset(info, offset),
 		       nr_sectors, (void*)load_ptr) != nr_sectors)
 		return -EIO;
-	debug("image: dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
+	debug("image dst=%lx, offset=%lx, size=%lx\n", load_ptr, offset,
 	      (unsigned long)length);
 
 	src = (void *)load_ptr + overhead;
@@ -162,7 +179,18 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
 	board_fit_image_post_process(&src, &length);
 #endif
 
-	memcpy((void*)load_addr, src, length);
+	if (IS_ENABLED(CONFIG_SPL_OS_BOOT)	&&
+	    IS_ENABLED(CONFIG_SPL_GZIP)		&&
+	    image_comp == IH_COMP_GZIP		&&
+	    type == IH_TYPE_KERNEL) {
+		if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
+			   src, &length)) {
+			puts("Uncompressing error\n");
+			return -EIO;
+		}
+	} else {
+		memcpy((void *)load_addr, src, length);
+	}
 
 	if (image_info) {
 		image_info->load_addr = load_addr;
diff --git a/lib/Kconfig b/lib/Kconfig
index 065f9c21f5..bf3be1643a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -179,6 +179,18 @@ config LZO
 	bool "Enable LZO decompression support"
 	help
 	  This enables support for LZO compression algorithm.r
+
+config SPL_GZIP
+	bool "Enable gzip decompression support for SPL build"
+	select SPL_ZLIB
+	help
+	  This enables support for GZIP compression altorithm for SPL boot.
+
+config SPL_ZLIB
+	bool
+	help
+	  This enables compression lib for SPL boot.
+
 endmenu
 
 config ERRNO_STR
diff --git a/lib/Makefile b/lib/Makefile
index d242b7fe94..10b19d35fe 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_EFI) += efi/
 obj-$(CONFIG_EFI_LOADER) += efi_loader/
 obj-$(CONFIG_LZMA) += lzma/
 obj-$(CONFIG_LZO) += lzo/
-obj-$(CONFIG_ZLIB) += zlib/
 obj-$(CONFIG_BZIP2) += bzip2/
 obj-$(CONFIG_TIZEN) += tizen/
 obj-$(CONFIG_FIT) += libfdt/
@@ -26,7 +25,6 @@ obj-y += crc16.o
 obj-$(CONFIG_ERRNO_STR) += errno_str.o
 obj-$(CONFIG_FIT) += fdtdec_common.o
 obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
-obj-$(CONFIG_GZIP) += gunzip.o
 obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-y += initcall.o
@@ -55,6 +53,9 @@ obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
 
+obj-$(CONFIG_$(SPL_)ZLIB) += zlib/
+obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o
+
 obj-$(CONFIG_$(SPL_TPL_)SAVEENV) += qsort.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/
 ifneq ($(CONFIG_$(SPL_TPL_)BUILD)$(CONFIG_$(SPL_TPL_)OF_PLATDATA),yy)

commit eb7c724022b8c4f3968e8502ea644d77945fbf43
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Jan 10 16:31:35 2018 +0800

    phy: rockchip-inno-usb2: add otg_phy_init api
    
    The USB-PHY may have been in suspend mode before done "reboot loader"
    action which will cause the USB device failed to be enumerated by PC
    in u-boot context.
    
    So reset USB-PHY and power on its PLL in otg_phy_init(), and invoked
    by udc_enable() when the USB Gadget start to fix it.
    
    Change-Id: Ie91fdabece937a6f277cfe80cd707ddcace6470d
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 0e4b93f900..1fa59c501a 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -11,6 +11,8 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 
+#include "../usb/gadget/dwc2_udc_otg_priv.h"
+
 #define U2PHY_BIT_WRITEABLE_SHIFT	16
 #define CHG_DCD_MAX_RETRIES		6
 #define CHG_PRI_MAX_RETRIES		2
@@ -181,6 +183,87 @@ static inline bool property_enabled(void __iomem *base,
 	return tmp == reg->enable;
 }
 
+static int rockchip_usb2phy_parse(struct rockchip_usb2phy *rphy)
+{
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	ofnode u2phy_node = ofnode_null();
+	ofnode grf_node = ofnode_null();
+	void __iomem *usbgrf_base = NULL;
+	void __iomem *grf_base = NULL;
+	struct udevice *udev;
+	fdt_size_t size;
+	u32 reg, index;
+	int ret;
+
+	memset((void *)rphy, 0, sizeof(struct rockchip_usb2phy));
+
+	u2phy_node = ofnode_path("/usb2-phy");
+	if (ofnode_valid(u2phy_node)) {
+		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
+			grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+		if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf"))
+			usbgrf_base =
+				syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
+		else
+			usbgrf_base = NULL;
+	} else {
+		grf_node = ofnode_path("/syscon-usb");
+		if (ofnode_valid(grf_node))
+			grf_base = (void __iomem *)
+				ofnode_get_addr_size(grf_node, "reg", &size);
+			u2phy_node = ofnode_find_subnode(grf_node, "usb2-phy");
+	}
+
+	if (!grf_base && !usbgrf_base) {
+		error("%s: get grf/usbgrf node failed\n", __func__);
+		return -EINVAL;
+	}
+
+	if (!ofnode_valid(u2phy_node)) {
+		error("%s: missing u2phy node\n", __func__);
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
+		error("%s: could not read reg from u2phy node\n", __func__);
+		return -EINVAL;
+	}
+
+	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &udev);
+	if (ret) {
+		error("%s: get u2phy node failed: %d\n", __func__, ret);
+		return -ENODEV;
+	}
+
+	phy_cfgs =
+		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(udev);
+	if (!phy_cfgs) {
+		error("%s: unable to get phy_cfgs\n", __func__);
+		return -EINVAL;
+	}
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			rphy->phy_cfg = &phy_cfgs[index];
+			break;
+		}
+		++index;
+	}
+
+	if (!rphy->phy_cfg) {
+		error("%s: no phy-config can be matched\n", __func__);
+		return -EINVAL;
+	}
+
+	rphy->grf_base = grf_base;
+	rphy->usbgrf_base = usbgrf_base;
+
+	return 0;
+}
+
 static const char *chg_to_string(enum power_supply_type chg_type)
 {
 	switch (chg_type) {
@@ -245,94 +328,18 @@ static bool rockchip_chg_primary_det_retry(struct rockchip_usb2phy *rphy)
 int rockchip_chg_get_type(void)
 {
 	const struct rockchip_usb2phy_port_cfg *port_cfg;
-	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	enum power_supply_type chg_type;
 	struct rockchip_usb2phy rphy;
-	struct udevice *dev;
-	ofnode u2phy_node, grf_node;
 	void __iomem *base;
-	fdt_size_t size;
-	u32 reg, index;
 	bool is_dcd, vout;
 	int ret;
 
-	u2phy_node = ofnode_null();
-	grf_node = ofnode_null();
-
-	u2phy_node = ofnode_path("/usb2-phy");
-
-	if (!ofnode_valid(u2phy_node)) {
-		grf_node = ofnode_path("/syscon-usb");
-		if (ofnode_valid(grf_node))
-			u2phy_node = ofnode_find_subnode(grf_node,
-							 "usb2-phy");
-	}
-
-	if (!ofnode_valid(u2phy_node)) {
-		printf("%s: missing u2phy node\n", __func__);
-		return -EINVAL;
-	}
-
-	if (ofnode_valid(grf_node)) {
-		rphy.grf_base =
-			(void __iomem *)ofnode_get_addr_size(grf_node,
-							     "reg", &size);
-	} else {
-		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
-			rphy.grf_base =
-				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	}
-
-	if (rphy.grf_base <= 0) {
-		dev_err(dev, "get syscon grf failed\n");
-		return -EINVAL;
-	}
-
-	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
-		printf("%s: could not read reg\n", __func__);
-		return -EINVAL;
-	}
-
-	if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf")) {
-		rphy.usbgrf_base =
-			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
-		if (rphy.usbgrf_base <= 0) {
-			dev_err(dev, "get syscon usbgrf failed\n");
-			return -EINVAL;
-		}
-	} else {
-		rphy.usbgrf_base = NULL;
-	}
-
-	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &dev);
+	ret = rockchip_usb2phy_parse(&rphy);
 	if (ret) {
-		printf("%s: uclass_get_device_by_ofnode failed: %d\n",
-		       __func__, ret);
+		error("%s: parse usb2phy failed %d\n", __func__, ret);
 		return ret;
 	}
 
-	phy_cfgs =
-		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
-	if (!phy_cfgs) {
-		printf("%s: unable to get phy_cfgs\n", __func__);
-		return -EINVAL;
-	}
-
-	/* find out a proper config which can be matched with dt. */
-	index = 0;
-	while (phy_cfgs[index].reg) {
-		if (phy_cfgs[index].reg == reg) {
-			rphy.phy_cfg = &phy_cfgs[index];
-			break;
-		}
-		++index;
-	}
-
-	if (!rphy.phy_cfg) {
-		printf("%s: no phy-config can be matched\n", __func__);
-		return -EINVAL;
-	}
-
 	base = get_reg_base(&rphy);
 	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
 
@@ -413,6 +420,32 @@ out:
 	return chg_type;
 }
 
+void otg_phy_init(struct dwc2_udc *dev)
+{
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	struct rockchip_usb2phy rphy;
+	void __iomem *base;
+	int ret;
+
+	ret = rockchip_usb2phy_parse(&rphy);
+	if (ret) {
+		error("%s: parse usb2phy failed %d\n", __func__, ret);
+		return;
+	}
+
+	base = get_reg_base(&rphy);
+	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+
+	/* Set the USB-PHY COMMONONN to 1'b0 to ensure USB's clocks */
+	property_enable(base, &rphy.phy_cfg->clkout_ctl, false);
+
+	/* Reset USB-PHY */
+	property_enable(base, &port_cfg->phy_sus, true);
+	udelay(20);
+	property_enable(base, &port_cfg->phy_sus, false);
+	mdelay(2);
+}
+
 static int rockchip_usb2phy_init(struct phy *phy)
 {
 	struct rockchip_usb2phy *rphy;

commit a607e103bc63df96fb43e45c0d51f4154eaa346e
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Jan 9 15:12:09 2018 +0800

    phy: rockchip-inno-usb2: amend charge detect process
    
    Suspend USB-PHY while doing charge detect and resume it after
    finishing to ensure the USB-PHY in normal state.
    
    In addition, disable idm_sink_en and vdp_src_en after primary
    detection retry to fix the USB device failed to be enumerated
    after do charge detect.
    
    Change-Id: Id1effb049cc6491bcd876aa1cc0449469b11df06
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 7a6fcb1b12..0e4b93f900 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -238,16 +238,19 @@ static bool rockchip_chg_primary_det_retry(struct rockchip_usb2phy *rphy)
 			break;
 	}
 
+	rockchip_chg_enable_primary_det(rphy, false);
 	return vout;
 }
 
 int rockchip_chg_get_type(void)
 {
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
 	enum power_supply_type chg_type;
 	struct rockchip_usb2phy rphy;
 	struct udevice *dev;
 	ofnode u2phy_node, grf_node;
+	void __iomem *base;
 	fdt_size_t size;
 	u32 reg, index;
 	bool is_dcd, vout;
@@ -330,6 +333,13 @@ int rockchip_chg_get_type(void)
 		return -EINVAL;
 	}
 
+	base = get_reg_base(&rphy);
+	port_cfg = &rphy.phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+
+	/* Suspend USB-PHY and put the controller in non-driving mode */
+	property_enable(base, &port_cfg->phy_sus, true);
+	property_enable(base, &rphy.phy_cfg->chg_det.opmode, false);
+
 	rphy.dcd_retries = CHG_DCD_MAX_RETRIES;
 	rphy.primary_retries = CHG_PRI_MAX_RETRIES;
 
@@ -394,6 +404,10 @@ int rockchip_chg_get_type(void)
 		chg_type = POWER_SUPPLY_TYPE_USB_CDP;
 
 out:
+	/* Resume USB-PHY and put the controller in normal mode */
+	property_enable(base, &rphy.phy_cfg->chg_det.opmode, true);
+	property_enable(base, &port_cfg->phy_sus, false);
+
 	debug("charger is %s\n", chg_to_string(chg_type));
 
 	return chg_type;

commit 15e088ea51c32fb18f1f66039290f52a70dfac37
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Jan 4 16:20:09 2018 +0800

    rockchip: boot_mode: setup devtype and devnum env
    
    It helps when enter rockusb mode in setup_boot_mode()
    and rockchip_dnl_mode_check().
    
    Change-Id: Iae0a88ab5e971c8d85a59ba2bef077c7c3a9e5ed
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 4c97b343c7..f105f57f1f 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -55,17 +55,22 @@ __weak int rockchip_dnl_key_pressed(void)
 		return false;
 }
 
-void rockchip_dnl_mode_check(void)
+static void devtype_num_envset(void)
 {
-	const char *rockusb_cmd =
+	const char *devtype_num_set =
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
 	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
-	"fi; rockusb 0 ${devtype} ${devnum};";
+	"fi;";
+
+	run_command_list(devtype_num_set, -1, 0);
+}
 
+void rockchip_dnl_mode_check(void)
+{
 	if (rockchip_dnl_key_pressed()) {
 		printf("download key pressed, entering download mode...\n");
 		/* If failed, we fall back to bootrom download mode */
-		run_command_list(rockusb_cmd, -1, 0);
+		run_command_list("rockusb 0 ${devtype} ${devnum}", -1, 0);
 		set_back_to_bootrom_dnl_flag();
 		do_reset(NULL, 0, 0, NULL);
 	}
@@ -76,6 +81,7 @@ int setup_boot_mode(void)
 	int boot_mode = BOOT_MODE_NORMAL;
 	char env_preboot[256] = {0};
 
+	devtype_num_envset();
 	rockchip_dnl_mode_check();
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
@@ -99,7 +105,7 @@ int setup_boot_mode(void)
 		break;
 	case BOOT_MODE_LOADER:
 		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		env_set("preboot", "setenv preboot; rockusb 0 ${devtype} ${devnum}");
 		break;
 	case BOOT_MODE_CHARGING:
 		printf("enter charging!\n");

commit 7ad0afacd5a58fc59a0a9b814fe65c8f4d8513b1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 12 15:38:35 2018 +0800

    rockchip: bootrkp: add log when boot from recovery
    
    Add a log to show boot from recovery.
    
    Change-Id: I8302820558d53e6b239533806305b2dec7c38c0c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index c7a4ec28fa..c64a3c5978 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -19,8 +19,10 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 
 	dev_desc = rockchip_get_bootdev();
 	mode = rockchip_get_boot_mode();
-	if (mode == BOOT_MODE_RECOVERY)
+	if (mode == BOOT_MODE_RECOVERY) {
 		boot_partname = PART_RECOVERY;
+		printf("%s boot from Recovery partition!\n", __func__);
+	}
 	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
 
 	if(boot_rockchip_image(dev_desc, &part_info))

commit 570fb7e31a1342d7528fc5ef6e452e6740e93cd0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jan 12 15:21:58 2018 +0800

    rockchip: rkimg: update some error handling
    
    Use 'int' instead of 'ulong' as type of image size,
    and return err if can not find MISC partition.
    
    Change-Id: I661a221a8a4049f2a7d9ee45b8a4d987ae515188
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 88814638c9..146792a367 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -208,8 +208,10 @@ int rockchip_get_boot_mode(void)
 	dev_desc = rockchip_get_bootdev();
 	ret = part_get_info_by_name(dev_desc, PART_MISC,
 			&part_info);
-	if (ret < 0)
+	if (ret < 0) {
 		printf("get part %s fail %d\n", PART_MISC, ret);
+		return -EIO;
+	}
 
 	bmsg = memalign(ARCH_DMA_MINALIGN, size);
 	ret = blk_dread(dev_desc,
@@ -268,9 +270,9 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
 	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
 	disk_partition_t kernel_part;
-	ulong ramdisk_size;
-	ulong kernel_size;
-	ulong fdt_size;
+	int ramdisk_size;
+	int kernel_size;
+	int fdt_size;
 	int ret = 0;
 	int part_num;
 
@@ -295,7 +297,8 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	ramdisk_size = read_rockchip_image(dev_desc, boot_part,
 					   (void *)ramdisk_addr_r);
 	if (ramdisk_size < 0) {
-		printf("%s ramdisk part read error\n", __func__);
+		printf("%s ramdisk part %s read error\n", __func__,
+		       boot_part->name);
 		ret = -EINVAL;
 		goto out;
 	}

commit ec82a6c959406d9819a30da628e70ab969927deb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Jan 3 17:34:09 2018 +0800

    common: boot_rkimg: append boot media type to bootargs
    
    Android need this property for bring up.
    
    Change-Id: I0fb5367221079e3bfcf36db4e5b58fc994848dcd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 819162f2ba..88814638c9 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -147,23 +147,35 @@ err:
 int get_bootdev_type(void)
 {
 	int type = 0;
+	char *boot_media = NULL;
+	static int appended;
 
 	#ifdef CONFIG_EMMC_BOOT
 		type = IF_TYPE_MMC;
+		boot_media = "storagemedia=emmc";
 	#endif /* CONFIG_EMMC_BOOT */
 	#ifdef CONFIG_QSPI_BOOT
 		type = IF_TYPE_SPI_NAND;
+		boot_media = "storagemedia=nand";
 	#endif /* CONFIG_QSPI_BOOT */
 	#ifdef CONFIG_NAND_BOOT
 		type = IF_TYPE_RKNAND;
+		boot_media = "storagemedia=nand";
 	#endif /* CONFIG_NAND_BOOT */
 	#ifdef CONFIG_NOR_BOOT
 		type = IF_TYPE_SPI_NOR;
 	#endif /* CONFIG_NOR_BOOT */
 
 	/* For current use(Only EMMC support!) */
-	if (!type)
+	if (!type) {
 		type = IF_TYPE_MMC;
+		boot_media = "storagemedia=emmc";
+	}
+
+	if (!appended && boot_media) {
+		appended = 1;
+		env_update("bootargs", boot_media);
+	}
 
 	return type;
 }

commit 817007c14301d926fa6ec83a37271b6848cca145
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Jan 2 19:05:07 2018 +0800

    armv7: start.S: enable ACTLR.SMP bit
    
    For cortex-A7 core, when ACTLR.SMP is 0 during the processor
    power-up and power-down procedures, the caches are disabled
    regardless of the SCTLR.C bit setting. It's similar for other
    cortex A series core.
    
    Change-Id: I69512787015d651fe5bb5d6961f5ed01c2505058
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 95a0b5224b..289ebc03f6 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -62,6 +62,11 @@ switch_to_hypervisor_ret:
 	orr	r0, r0, #0xc0		@ disable FIQ and IRQ
 	msr	cpsr,r0
 
+	/* Enable ACTLR.SMP bit */
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #(1 << 6)	@ Enable ACTLR.SMP bit
+	mcr	p15, 0, r0, c1, c0, 1
+
 /*
  * Setup vector:
  * (OMAP4 spl TEXT_BASE is not 32 byte aligned.

commit b1fd4f58f396ec3a8bfde61d0eaae29e0c50295c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 28 09:52:00 2017 +0800

    rockchip: boot_mode: recognise devtype and devnum dynamicly for rockusb
    
    devtype can be "emmc" or "rknand", devnum is usually 0.
    
    Change-Id: Ie90169ab2c164e9d91f3365c3d9c99278bf9c8c4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 42b01c7d48..4c97b343c7 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -57,10 +57,15 @@ __weak int rockchip_dnl_key_pressed(void)
 
 void rockchip_dnl_mode_check(void)
 {
+	const char *rockusb_cmd =
+	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;"
+	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;"
+	"fi; rockusb 0 ${devtype} ${devnum};";
+
 	if (rockchip_dnl_key_pressed()) {
 		printf("download key pressed, entering download mode...\n");
 		/* If failed, we fall back to bootrom download mode */
-		cli_simple_run_command("rockusb 0 mmc 0", 0);
+		run_command_list(rockusb_cmd, -1, 0);
 		set_back_to_bootrom_dnl_flag();
 		do_reset(NULL, 0, 0, NULL);
 	}

commit 221b52206016dec619b74d688c0a792b90a570eb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 11 14:24:17 2017 +0800

    power: charge animation: skip charge while special boot mode
    
    only BOOT_MODE_CHARGING and BOOT_MODE_UNDEFINE enter charging.
    
    Change-Id: I21a7b93ff50aab47f3a32094fc36083b42b7b9b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 0662357b29..05eaf7869a 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -247,11 +247,13 @@ static int charge_animation_show(struct udevice *dev)
 
 #ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
-	if (boot_mode != BOOT_MODE_NORMAL) {
+	if ((boot_mode != BOOT_MODE_CHARGING) &&
+	    (boot_mode != BOOT_MODE_UNDEFINE)) {
 		debug("exit charge, due to boot mode: %d\n", boot_mode);
 		return 0;
 	}
 #endif
+
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)

commit b7195498ca52d0d4c7b1fe4b852d7d57da502c06
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 8 16:18:00 2017 +0800

    rockchip: unify boot mode in rockchip_get_boot_mode()
    
    There are two ways to get boot mode: misc partition and
    CONFIG_ROCKCHIP_BOOT_MODE_REG, we unify them in the
    rockchip_get_boot_mode() function.
    
    Change-Id: Ia2dd452e8df8a8d736300048f131ed43ec2ec3a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index d0dbff3bb8..42b01c7d48 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -11,6 +11,7 @@
 #include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <boot_rkimg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -67,23 +68,15 @@ void rockchip_dnl_mode_check(void)
 
 int setup_boot_mode(void)
 {
-	void *reg;
-	int boot_mode;
+	int boot_mode = BOOT_MODE_NORMAL;
 	char env_preboot[256] = {0};
 
 	rockchip_dnl_mode_check();
-
-	reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
-
-	boot_mode = readl(reg);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, reg);
-
+#ifdef CONFIG_RKIMG_BOOTLOADER
+	boot_mode = rockchip_get_boot_mode();
+#endif
 	switch (boot_mode) {
-	case BOOT_FASTBOOT:
+	case BOOT_MODE_BOOTLOADER:
 		printf("enter fastboot!\n");
 #if defined(CONFIG_FASTBOOT_FLASH_MMC_DEV)
 		snprintf(env_preboot, 256,
@@ -95,19 +88,19 @@ int setup_boot_mode(void)
 #endif
 		env_set("preboot", env_preboot);
 		break;
-	case BOOT_UMS:
+	case BOOT_MODE_UMS:
 		printf("enter UMS!\n");
 		env_set("preboot", "setenv preboot; ums mmc 0");
 		break;
-	case BOOT_LOADER:
+	case BOOT_MODE_LOADER:
 		printf("enter Rockusb!\n");
 		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
 		break;
-	case BOOT_CHARGING:
+	case BOOT_MODE_CHARGING:
 		printf("enter charging!\n");
 		env_set("preboot", "setenv preboot; charge");
 		break;
-	case BOOT_RECOVERY:
+	case BOOT_MODE_RECOVERY:
 		printf("enter Recovery mode!\n");
 		env_set("reboot_mode", "recovery");
 		break;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 54d3f6fb79..819162f2ba 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -12,6 +12,8 @@
 #include <asm/arch/resource_img.h>
 #include <asm/arch/rockchip_crc.h>
 #include <boot_rkimg.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/io.h>
 
 #define TAG_KERNEL			0x4C4E524B
 
@@ -186,6 +188,7 @@ int rockchip_get_boot_mode(void)
 	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
 		   * RK_BLK_SIZE;
 	int ret;
+	uint32_t reg_boot_mode;
 
 	if (boot_mode != -1)
 		return boot_mode;
@@ -201,22 +204,50 @@ int rockchip_get_boot_mode(void)
 			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
 			size >> 9, bmsg);
 	if (ret != (size >> 9)) {
-		ret = -EIO;
-		goto err;
+		free(bmsg);
+		return -EIO;
 	}
 
+	/* Mode from misc partition */
 	if (!strcmp(bmsg->command, "boot-recovery")) {
-		printf("boot mode: recovery\n");
-		ret = BOOT_MODE_RECOVERY;
+		boot_mode = BOOT_MODE_RECOVERY;
 	} else {
-		printf("boot mode: normal\n");
-		ret = BOOT_MODE_NORMAL;
+		/* Mode from boot mode register */
+		reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		writel(BOOT_NORMAL, (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG);
+
+		switch (reg_boot_mode) {
+		case BOOT_NORMAL:
+			printf("boot mode: normal\n");
+			boot_mode = BOOT_MODE_NORMAL;
+			break;
+		case BOOT_FASTBOOT:
+			printf("boot mode: bootloader\n");
+			boot_mode = BOOT_MODE_BOOTLOADER;
+			break;
+		case BOOT_LOADER:
+			printf("boot mode: loader\n");
+			boot_mode = BOOT_MODE_LOADER;
+			break;
+		case BOOT_RECOVERY:
+			/* printf("boot mode: recovery\n"); */
+			boot_mode = BOOT_MODE_RECOVERY;
+			break;
+		case BOOT_UMS:
+			printf("boot mode: ums\n");
+			boot_mode = BOOT_MODE_UMS;
+			break;
+		case BOOT_CHARGING:
+			printf("boot mode: charging\n");
+			boot_mode = BOOT_MODE_CHARGING;
+			break;
+		default:
+			printf("boot mode: None\n");
+			boot_mode = BOOT_MODE_UNDEFINE;
+		}
 	}
-	boot_mode = ret;
-err:
-	free(bmsg);
 
-	return ret;
+	return boot_mode;
 }
 
 int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
index f59bf2e41b..d5078e846b 100644
--- a/include/boot_rkimg.h
+++ b/include/boot_rkimg.h
@@ -11,10 +11,14 @@
 enum _boot_mode {
 	BOOT_MODE_NORMAL = 0,
 	BOOT_MODE_RECOVERY,
-	BOOT_MODE_BOOTLOADER,
+	BOOT_MODE_BOOTLOADER,	/* Android: Fastboot mode */
+	BOOT_MODE_LOADER,	/* Rockchip: Rockusb download mode */
+	BOOT_MODE_CHARGING,
+	BOOT_MODE_UMS,
+	BOOT_MODE_BROM_DOWNLOAD,
+	BOOT_MODE_UNDEFINE,
 };
 
-
 #define PART_MISC			"misc"
 #define PART_KERNEL			"kernel"
 #define PART_BOOT			"boot"

commit d2975239b8d12d5ddbad5a05eab3ff0fd3606231
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 13 20:01:19 2017 +0800

    rockchip: support pack resources into resource.img
    
    This script supports pack charge pictures into resource.img
    
    Usage:
     ./pack_resource.sh <input resource.img>
    
    Change-Id: If0577a62d58a0c93826ac6c0db5df7872dced964
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/pack_resource.sh b/pack_resource.sh
new file mode 100755
index 0000000000..03b8d30f7d
--- /dev/null
+++ b/pack_resource.sh
@@ -0,0 +1,65 @@
+#!/bin/sh
+OLD_IMAGE=$1
+IMAGE=resource.img
+TOOL=../rkbin/tools/resource_tool
+RESOURCES=./tools/images/
+
+usage()
+{
+	echo "Usage:"
+	echo "  ./pack_resource <input resource.img>"
+}
+
+prepare()
+{
+	echo
+	if [ "$OLD_IMAGE" = '--help' -o "$OLD_IMAGE" = '-h' -o "$OLD_IMAGE" = '--h' ]; then
+		usage
+		exit 0
+	elif [ ! -f "$TOOL" ];then
+		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
+		echo "How to obtain? 3 ways:"
+		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
+		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK Responsity"
+		exit 1
+	elif [ ! -d "$RESOURCES" ];then
+		echo "Can't find resources: $RESOURCES"
+		exit 1
+	elif [ -z "$OLD_IMAGE" ];then
+		echo "Missing: <input image>"
+		usage
+		exit 1
+	elif [ ! -f "$OLD_IMAGE" ];then
+		echo "Can't find file: $OLD_IMAGE"
+		usage
+		exit 1
+	fi
+}
+
+append_resource()
+{
+	local TMP_DIR=.resource_tmp
+	rm -r $TMP_DIR 2>/dev/null
+	mkdir $TMP_DIR
+
+	echo "Pack $RESOURCES & $OLD_IMAGE to $IMAGE ..."
+	if [ -f "$OLD_IMAGE" ];then
+		echo "Unpacking old image($OLD_IMAGE):"
+		$TOOL --unpack --verbose --image=$OLD_IMAGE $TMP_DIR 2>&1|grep entry|sed "s/^.*://"|xargs echo
+	fi
+	if [ -d "$RESOURCES" ];then
+		cp -r $RESOURCES/* $TMP_DIR
+	else
+		cp -r $RESOURCES $TMP_DIR
+	fi
+	$TOOL --pack --root=$TMP_DIR --image=$IMAGE `find $TMP_DIR -type f|sort`
+	echo "Packed resources:"
+	$TOOL --unpack --verbose --image=$IMAGE $TMP_DIR 2>&1|grep entry|sed "s/^.*://"|xargs echo
+	rm -r $TMP_DIR 2>/dev/null
+	echo
+	echo "resource.img is packed ready"
+}
+
+prepare
+append_resource
\ No newline at end of file
diff --git a/tools/images/battery_0.bmp b/tools/images/battery_0.bmp
new file mode 100644
index 0000000000..e05e4f6424
Binary files /dev/null and b/tools/images/battery_0.bmp differ
diff --git a/tools/images/battery_1.bmp b/tools/images/battery_1.bmp
new file mode 100644
index 0000000000..2afa093274
Binary files /dev/null and b/tools/images/battery_1.bmp differ
diff --git a/tools/images/battery_2.bmp b/tools/images/battery_2.bmp
new file mode 100644
index 0000000000..04937645d7
Binary files /dev/null and b/tools/images/battery_2.bmp differ
diff --git a/tools/images/battery_3.bmp b/tools/images/battery_3.bmp
new file mode 100644
index 0000000000..335e12ee03
Binary files /dev/null and b/tools/images/battery_3.bmp differ
diff --git a/tools/images/battery_4.bmp b/tools/images/battery_4.bmp
new file mode 100644
index 0000000000..372c0beb60
Binary files /dev/null and b/tools/images/battery_4.bmp differ
diff --git a/tools/images/battery_5.bmp b/tools/images/battery_5.bmp
new file mode 100644
index 0000000000..02245b63aa
Binary files /dev/null and b/tools/images/battery_5.bmp differ
diff --git a/tools/images/battery_fail.bmp b/tools/images/battery_fail.bmp
new file mode 100644
index 0000000000..81d90642f9
Binary files /dev/null and b/tools/images/battery_fail.bmp differ

commit cd7ae718e1aa8ed8b06a3c2ca50ee965abfa1ce7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 11 19:16:26 2017 +0800

    rockchip: make.sh: support trust and loader image pack
    
    Change-Id: I9b2cf170138c6aba7578e14126f3010e8bffee3a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 57f292daf1..6fe2d6add8 100755
--- a/make.sh
+++ b/make.sh
@@ -1,10 +1,45 @@
 #!/bin/sh
+set -e
 BOARD=$1
 DIR=${BOARD#*-}
 DSTDIR=rockdev/${DIR}
+RKCHIP=$(echo $DIR | tr '[a-z]' '[A-Z]')
 TOOLCHAIN=arm-linux-gnueabi-
 JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
 
+prepare()
+{
+	local dst
+
+	# Check invaid args and help
+	if [ "$BOARD" = '--help' -o "$BOARD" = '-h' -o "$BOARD" = '--h' ]; then
+		echo
+		echo "Usage: ./make.sh board"
+		echo "Example:"
+		echo "./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig"
+		echo "./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig"
+		exit 1
+	elif [ ! -f configs/${BOARD}_defconfig ]; then
+		echo "Can't find: configs/${BOARD}_defconfig"
+		exit 1
+	fi
+
+	# Initialize RKBIN and RKTOOLS
+	dst=../rkbin/tools
+	if [ -d ${dst} ]; then
+		RKBIN=$(cd `dirname ${dst}`; pwd)
+		RKTOOLS=${RKBIN}/tools
+	else
+		echo
+		echo "Can't find '../rkbin/' Responsity, please download it before pack image!"
+		echo "How to obtain? 3 ways:"
+		echo "	1. Login your Rockchip gerrit account: \"Projects\" -> \"List\" -> search \"rk/rkbin\" Responsity"
+		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK Responsity"
+		exit 1
+	fi
+}
+
 select_toolchain()
 {
 	local dst path
@@ -25,29 +60,67 @@ select_toolchain()
 	echo toolchain: ${TOOLCHAIN}
 }
 
-pack_images()
+pack_uboot_image()
 {
-	local sys_text_base dst
+	local UBOOT_LOAD_ADDR
 
-	dst=../rkbin/tools
-	if [ -d ${dst} ]; then
-		path=$(cd `dirname ${dst}`; pwd)
+	UBOOT_LOAD_ADDR=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+	${RKTOOLS}/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${UBOOT_LOAD_ADDR}
+}
+
+pack_loader_image()
+{
+	cd ${RKBIN}
+	${RKTOOLS}/boot_merger ${RKBIN}/RKBOOT/${RKCHIP}MINIALL.ini
+	cd -
+	mv ${RKBIN}/*_loader_*.bin ./
+}
+
+pack_trust_image()
+{
+	local TOS TOS_TA DARM_BASE TEE_LOAD_ADDR TEE_OFFSET=0x8400000
+
+	# ARM64 uses trust_merger
+	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+		cd ${RKBIN}
+		${RKTOOLS}/trust_merger ${RKBIN}/RKTRUST/${RKCHIP}TRUST.ini
+		cd -
+		mv ${RKBIN}/trust.img ./trust.img
+	# ARM uses loaderimage
 	else
-		echo "\nCan't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
-		echo "How to obtain, 3 ways:"
-		echo "	1. Login your gerrit account: \"Projects\" -> \"List\" -> search rkbin Responsity"
-		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
-		echo "	3. Download full release SDK Responsity\n"
-		exit 1
-	fi
+		# OP-TEE is 132M(0x8400000) offset from DRAM base.
+		DARM_BASE=`sed -n "/CONFIG_SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+		TEE_LOAD_ADDR=$((DARM_BASE+TEE_OFFSET))
+
+		# Convert Dec to Hex
+		TEE_LOAD_ADDR=$(echo "obase=16;${TEE_LOAD_ADDR}"|bc)
 
-	sys_text_base=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
-	echo U-Boot entry point address: ${sys_text_base}
-	${path}/tools/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${sys_text_base}
+		TOS=`sed -n "/TOS=/s/TOS=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+		TOS_TA=`sed -n "/TOSTA=/s/TOSTA=//p" ${RKBIN}/RKTRUST/${RKCHIP}TOS.ini|tr -d '\r'`
+
+		if [ $TOS_TA -a $TOS ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust_with_ta.img ${TEE_LOAD_ADDR}
+			echo "Both trust.img and trust_with_ta.img are ready"
+		elif [ $TOS ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS} ./trust.img ${TEE_LOAD_ADDR}
+			echo "trust.img is ready"
+		elif [ $TOS_TA ]; then
+			${RKTOOLS}/loaderimage --pack --trustos ${RKBIN}/${TOS_TA} ./trust.img ${TEE_LOAD_ADDR}
+			echo "trust.img with ta is ready"
+		else
+			echo "Can't find any tee bin"
+			exit 1
+		fi
+	fi
 }
 
+prepare
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out
-pack_images
+pack_loader_image
+pack_uboot_image
+pack_trust_image
+

commit a1b32c24129130a32421260e8d2ab687f9f4fe41
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Dec 11 14:17:11 2017 +0800

    irq: clean up code
    
    remove unused code and fix compile warning.
    
    Change-Id: I912eff25bf60da925791b889f08e91d4fcb61893
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 8907cc5a73..95491e1b56 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -10,172 +10,165 @@
 #include <irq-generic.h>
 #include "irq-gic.h"
 
-#define gicd_readl(offset)	readl(GICD_BASE + (offset))
-#define gicc_readl(offset)	readl(GICC_BASE + (offset))
-#define gicd_writel(v, offset)	writel(v, GICD_BASE + (offset))
-#define gicc_writel(v, offset)	writel(v, GICC_BASE + (offset))
+#define gicd_readl(offset)	readl((void *)GICD_BASE + (offset))
+#define gicc_readl(offset)	readl((void *)GICC_BASE + (offset))
+#define gicd_writel(v, offset)	writel(v, (void *)GICD_BASE + (offset))
+#define gicc_writel(v, offset)	writel(v, (void *)GICC_BASE + (offset))
+
+#define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
+#define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
+#define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
+#define IRQ_REG_X4_OFFSET(irq)	((irq) % 4)
+#define IRQ_REG_X16_OFFSET(irq)	((irq) % 16)
+#define IRQ_REG_X32_OFFSET(irq)	((irq) % 32)
 
 typedef enum INT_TRIG {
 	INT_LEVEL_TRIGGER,
 	INT_EDGE_TRIGGER
 } eINT_TRIG;
 
-typedef enum INT_SECURE {
-	INT_SECURE,
-	INT_NOSECURE
-} eINT_SECURE;
+struct gic_dist_data {
+	uint32_t ctlr;
+	uint32_t icfgr[DIV_ROUND_UP(1020, 16)];
+	uint32_t itargetsr[DIV_ROUND_UP(1020, 4)];
+	uint32_t ipriorityr[DIV_ROUND_UP(1020, 4)];
+	uint32_t igroupr[DIV_ROUND_UP(1020, 32)];
+	uint32_t ispendr[DIV_ROUND_UP(1020, 32)];
+	uint32_t isenabler[DIV_ROUND_UP(1020, 32)];
+};
 
-typedef enum INT_SIGTYPE {
-	INT_SIGTYPE_IRQ,
-	INT_SIGTYPE_FIQ
-} eINT_SIGTYPE;
+struct gic_cpu_data {
+	uint32_t ctlr;
+	uint32_t pmr;
+};
 
-#define g_gicd		((pGICD_REG)GICD_BASE)
-#define g_gicc		((pGICC_REG)GICC_BASE)
+static struct gic_dist_data gicd_save;
+static struct gic_cpu_data gicc_save;
 
 __maybe_unused static u8 g_gic_cpumask = 0x01;
 
-static inline void int_set_prio_filter(u32 nprio)
+__maybe_unused static u32 gic_get_cpumask(void)
 {
-	g_gicc->iccpmr = (nprio & 0xff);
-}
+	u32 mask = 0, i;
 
-static inline void int_enable_distributor(void)
-{
-	g_gicd->icddcr = 0x01;
-}
+	for (i = mask = 0; i < 32; i += 4) {
+		mask = gicd_readl(GICD_ITARGETSRn + 4 * i);
+		mask |= mask >> 16;
+		mask |= mask >> 8;
+		if (mask)
+			break;
+	}
 
-static inline void int_disable_distributor(void)
-{
-	g_gicd->icddcr = 0x00;
-}
+	if (!mask)
+		printf("GIC CPU mask not found.\n");
 
-static inline void int_enable_secure_signal(void)
-{
-	g_gicc->iccicr |= 0x01;
+	debug("GIC CPU mask = 0x%08x\n", mask);
+	return mask;
 }
 
-static inline void int_disable_secure_signal(void)
+static inline void int_set_prio_filter(u32 priority)
 {
-	g_gicc->iccicr &= (~0x01);
+	gicc_writel(priority & 0xff, GICC_PMR);
 }
 
-static inline void int_enable_nosecure_signal(void)
+static inline void int_enable_distributor(void)
 {
-	g_gicc->iccicr |= 0x02;
-}
+	u32 val;
 
-static inline void int_disable_nosecure_signal(void)
-{
-	g_gicc->iccicr &= (~0x02);
+	val = gicd_readl(GICD_CTLR);
+	val |= 0x01;
+	gicd_writel(val, GICD_CTLR);
 }
 
-static int gic_irq_set_trigger(int irq, eINT_TRIG ntrig)
+static inline void int_disable_distributor(void)
 {
-	u32 group, offset;
+	u32 val;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
-
-	group = irq / 16;
-	offset = irq % 16;
-
-	if (ntrig == INT_LEVEL_TRIGGER)
-		g_gicd->icdicfr[group] &= (~(1 << (2 * offset + 1)));
-	else
-		g_gicd->icdicfr[group] |= (1 << (2 * offset + 1));
-
-	return 0;
+	val = gicd_readl(GICD_CTLR);
+	val &= ~0x01;
+	gicd_writel(val, GICD_CTLR);
 }
 
-__maybe_unused static int gic_irq_set_pending(int irq)
+static inline void int_enable_secure_signal(void)
 {
-	u32 group, offset;
+	u32 val;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
-
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdispr[group] = (0x1 << offset);
-
-	return 0;
+	val = gicc_readl(GICC_CTLR);
+	val |= 0x01;
+	gicc_writel(val, GICC_CTLR);
 }
 
-__maybe_unused static int gic_irq_clear_pending(int irq)
+static inline void int_disable_secure_signal(void)
 {
-	u32 group, offset;
-
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
+	u32 val;
 
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdicpr[group] = (0x1 << offset);
-
-	return 0;
+	val = gicc_readl(GICC_CTLR);
+	val &= ~0x01;
+	gicc_writel(val, GICC_CTLR);
 }
 
-__maybe_unused static int gic_irq_set_secure(int irq, eINT_SECURE nsecure)
+static inline void int_enable_nosecure_signal(void)
 {
-	u32 group, offset;
+	u32 val;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
+	val = gicc_readl(GICC_CTLR);
+	val |= 0x02;
+	gicc_writel(val, GICC_CTLR);
+}
 
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdiser[group] |= nsecure << offset;
+static inline void int_disable_nosecure_signal(void)
+{
+	u32 val;
 
-	return 0;
+	val = gicc_readl(GICC_CTLR);
+	val &= ~0x02;
+	gicc_writel(val, GICC_CTLR);
 }
 
-__maybe_unused static u32 gic_get_cpumask(void)
+static int gic_irq_set_trigger(int irq, eINT_TRIG trig)
 {
-	u32 mask = 0, i;
-
-	for (i = mask = 0; i < 32; i += 4) {
-		mask = g_gicd->itargetsr[i];
-		mask |= mask >> 16;
-		mask |= mask >> 8;
-		if (mask)
-			break;
+	u32 val;
+
+	if (trig == INT_LEVEL_TRIGGER) {
+		val = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+		val &= ~(1 << (2 * IRQ_REG_X16_OFFSET(irq) + 1));
+		gicd_writel(val, GICD_ICFGR + IRQ_REG_X16(irq));
+	} else {
+		val = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+		val |= (1 << (2 * IRQ_REG_X16_OFFSET(irq) + 1));
+		gicd_writel(val, GICD_ICFGR + IRQ_REG_X16(irq));
 	}
 
-	if (!mask)
-		printf("GIC CPU mask not found.\n");
-
-	debug("GIC CPU mask = 0x%08x\n", mask);
-
-	return mask;
+	return 0;
 }
 
 static int gic_irq_enable(int irq)
 {
 #ifdef CONFIG_GICV2
+	u32 val;
 	u32 shift = (irq % 4) * 8;
-	u32 offset = (irq / 4);
-	u32 M, N;
 
 	if (irq >= PLATFORM_GIC_IRQS_NR)
 		return -EINVAL;
 
-	M = irq / 32;
-	N = irq % 32;
+	/* set enable */
+	val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+	val |= 1 << IRQ_REG_X32_OFFSET(irq);
+	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
 
-	g_gicc->iccicr &= (~0x08);
-	g_gicd->icdiser[M] = (0x1 << N);
-	g_gicd->itargetsr[offset] &= ~(0xFF << shift);
-	g_gicd->itargetsr[offset] |= (g_gic_cpumask << shift);
-#else
-	u32 M, N;
 
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
+	/* set target */
+	val = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
+	val &= ~(0xFF << shift);
+	val |= (g_gic_cpumask << shift);
+	gicd_writel(val, GICD_ITARGETSRn + IRQ_REG_X4(irq));
 
-	M = irq / 32;
-	N = irq % 32;
-	g_gicd->icdiser[M] = (0x1 << N);
+#else
+	u32 val;
+
+	val = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+	val |= 1 << IRQ_REG_X32_OFFSET(irq);
+	gicd_writel(val, GICD_ISENABLERn + IRQ_REG_X32(irq));
 #endif
 
 	return 0;
@@ -183,14 +176,8 @@ static int gic_irq_enable(int irq)
 
 static int gic_irq_disable(int irq)
 {
-	u32 group, offset;
-
-	if (irq >= PLATFORM_GIC_IRQS_NR)
-		return -EINVAL;
-
-	group = irq / 32;
-	offset = irq % 32;
-	g_gicd->icdicer[group] = (0x1 << offset);
+	gicd_writel(1 << IRQ_REG_X32_OFFSET(irq),
+		    GICD_ICENABLERn + IRQ_REG_X32(irq));
 
 	return 0;
 }
@@ -208,11 +195,11 @@ static int gic_irq_set_type(int irq, unsigned int type)
 	switch (type) {
 	case IRQ_TYPE_EDGE_RISING:
 	case IRQ_TYPE_EDGE_FALLING:
-		int_type = INT_EDGE_TRIGGER;
+		int_type = 0x1;
 		break;
 	case IRQ_TYPE_LEVEL_HIGH:
 	case IRQ_TYPE_LEVEL_LOW:
-		int_type = INT_LEVEL_TRIGGER;
+		int_type = 0x0;
 		break;
 	default:
 		return -EINVAL;
@@ -226,7 +213,7 @@ static int gic_irq_set_type(int irq, unsigned int type)
 static void gic_irq_eoi(int irq)
 {
 #ifdef CONFIG_GICV2
-	g_gicc->icceoir = irq;
+	gicc_writel(irq, GICC_EOIR);
 #else
 	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0"
 			: : "r" ((u64)irq));
@@ -239,7 +226,7 @@ static void gic_irq_eoi(int irq)
 static int gic_irq_get(void)
 {
 #ifdef CONFIG_GICV2
-	return g_gicc->icciar & 0x3ff; /* bit9 - bit0 */
+	return gicc_readl(GICC_IAR) & 0x3fff; /* bit9 - bit0 */
 #else
 	u64 irqstat;
 
@@ -248,28 +235,6 @@ static int gic_irq_get(void)
 #endif
 }
 
-struct gic_dist_data {
-	uint32_t ctlr;
-	uint32_t icfgr[DIV_ROUND_UP(1020, 16)];
-	uint32_t itargetsr[DIV_ROUND_UP(1020, 4)];
-	uint32_t ipriorityr[DIV_ROUND_UP(1020, 4)];
-	uint32_t igroupr[DIV_ROUND_UP(1020, 32)];
-	uint32_t ispendr[DIV_ROUND_UP(1020, 32)];
-	uint32_t isenabler[DIV_ROUND_UP(1020, 32)];
-};
-
-struct gic_cpu_data {
-	uint32_t ctlr;
-	uint32_t pmr;
-};
-
-static struct gic_dist_data gicd_save;
-static struct gic_cpu_data gicc_save;
-
-#define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
-#define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
-#define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
-
 static int gic_irq_suspend(void)
 {
 	int irq_nr, i, irq;
@@ -287,22 +252,28 @@ static int gic_irq_suspend(void)
 	gicd_save.ctlr = gicd_readl(GICD_CTLR);
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
-		gicd_save.icfgr[i++] = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+		gicd_save.icfgr[i++] =
+			gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_save.itargetsr[i++] = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
+		gicd_save.itargetsr[i++] =
+			gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_save.ipriorityr[i++] = gicd_readl(GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+		gicd_save.ipriorityr[i++] =
+			gicd_readl(GICD_IPRIORITYRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_save.igroupr[i++] = gicd_readl(GICD_IGROUPRn + IRQ_REG_X32(irq));
+		gicd_save.igroupr[i++] =
+			gicd_readl(GICD_IGROUPRn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_save.ispendr[i++] = gicd_readl(GICD_ISPENDRn + IRQ_REG_X32(irq));
+		gicd_save.ispendr[i++] =
+			gicd_readl(GICD_ISPENDRn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_save.isenabler[i++] = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+		gicd_save.isenabler[i++] =
+			gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
 
 	dsb();
 
@@ -324,27 +295,34 @@ static int gic_irq_resume(void)
 
 	/* Clear all interrupt */
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(0xffffffff, GICD_ICENABLERn + IRQ_REG_X32(irq));
+		gicd_writel(0xffffffff,
+			    GICD_ICENABLERn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
-		gicd_writel(gicd_save.icfgr[i++], GICD_ICFGR + IRQ_REG_X16(irq));
+		gicd_writel(gicd_save.icfgr[i++],
+			    GICD_ICFGR + IRQ_REG_X16(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_writel(gicd_save.itargetsr[i++], GICD_ITARGETSRn + IRQ_REG_X4(irq));
+		gicd_writel(gicd_save.itargetsr[i++],
+			    GICD_ITARGETSRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
-		gicd_writel(gicd_save.ipriorityr[i++], GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+		gicd_writel(gicd_save.ipriorityr[i++],
+			    GICD_IPRIORITYRn + IRQ_REG_X4(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(gicd_save.igroupr[i++], GICD_IGROUPRn + IRQ_REG_X32(irq));
+		gicd_writel(gicd_save.igroupr[i++],
+			    GICD_IGROUPRn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(gicd_save.isenabler[i++], GICD_ISENABLERn + IRQ_REG_X32(irq));
+		gicd_writel(gicd_save.isenabler[i++],
+			    GICD_ISENABLERn + IRQ_REG_X32(irq));
 
 	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
-		gicd_writel(gicd_save.ispendr[i++], GICD_ISPENDRn + IRQ_REG_X32(irq));
-	dsb();
+		gicd_writel(gicd_save.ispendr[i++],
+			    GICD_ISPENDRn + IRQ_REG_X32(irq));
 
+	dsb();
 	gicc_writel(gicc_save.pmr, GICC_PMR);
 	gicc_writel(gicc_save.ctlr, GICC_CTLR);
 	gicd_writel(gicd_save.ctlr, GICD_CTLR);
@@ -358,19 +336,24 @@ static int gic_irq_init(void)
 {
 	/* GICV3 done in: arch/arm/cpu/armv8/start.S */
 #ifdef CONFIG_GICV2
+	u32 val;
+
 	/* end of interrupt */
-	g_gicc->icceoir = PLATFORM_GIC_IRQS_NR;
+	gicc_writel(PLATFORM_GIC_IRQS_NR, GICC_EOIR);
 
 	/* disable gicc and gicd */
-	g_gicc->iccicr = 0x00;
-	g_gicd->icddcr = 0x00;
-
-	/* enable interrupt */
-	g_gicd->icdicer[0] = 0xFFFFFFFF;
-	g_gicd->icdicer[1] = 0xFFFFFFFF;
-	g_gicd->icdicer[2] = 0xFFFFFFFF;
-	g_gicd->icdicer[3] = 0xFFFFFFFF;
-	g_gicd->icdicfr[3] &= ~(1 << 1);
+	gicc_writel(0, GICC_CTLR);
+	gicd_writel(0, GICD_CTLR);
+
+	/* disable interrupt */
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 0);
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 4);
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 8);
+	gicd_writel(0xffffffff, GICD_ICENABLERn + 12);
+
+	val = gicd_readl(GICD_ICFGR + 12);
+	val &= ~(1 << 1);
+	gicd_writel(val, GICD_ICFGR + 12);
 
 	/* set interrupt priority threhold min: 256 */
 	int_set_prio_filter(0xff);
diff --git a/drivers/irq/irq-gic.h b/drivers/irq/irq-gic.h
index 4bd53c2092..1f84de54fc 100644
--- a/drivers/irq/irq-gic.h
+++ b/drivers/irq/irq-gic.h
@@ -9,48 +9,6 @@
 
 #include <irq-platform.h>
 
-/* INTC Registers */
-typedef volatile struct tagGICD_REG {
-	u32 icddcr;		/* 0x000 */
-	u32 icdictr;		/* 0x004 */
-	u32 icdiidr;		/* 0x008 */
-	u32 reserved0[29];
-	u32 icdisr[4];		/* 0x080 */
-	u32 reserved1[28];
-	u32 icdiser[4];		/* 0x100 */
-	u32 reserved2[28];
-	u32 icdicer[4];		/* 0x180: GICD_ISENABLERn */
-	u32 reserved3[28];
-	u32 icdispr[4];		/* 0x200 */
-	u32 reserved4[28];
-	u32 icdicpr[4];		/* 0x280 */
-	u32 reserved5[28];
-	u32 icdiabr[4];		/* 0x300 */
-	u32 reserved6[60];
-	u32 icdipr_sgi[4];	/* 0x400 */
-	u32 icdipr_ppi[4];	/* 0x410 */
-	u32 icdipr_spi[18];	/* 0x420 */
-	u32 reserved7[230];
-	u32 itargetsr[255];	/* 0x800 */
-	u32 reserved9[1];
-	u32 icdicfr[7];		/* 0xc00: GICD_ICFGRn: trigger level/edge */
-	u32 reserved8[185];
-	u32 icdsgir;		/* 0xf00 */
-} GICD_REG, *pGICD_REG;
-
-typedef volatile struct tagGICC_REG {
-	u32 iccicr;		/* 0x00 */
-	u32 iccpmr;		/* 0x04: GICC_PMR */
-	u32 iccbpr;		/* 0x08 */
-	u32 icciar;		/* 0x0c */
-	u32 icceoir;		/* 0x10 */
-	u32 iccrpr;		/* 0x14 */
-	u32 icchpir;		/* 0x18 */
-	u32 iccabpr;		/* 0x1c */
-	u32 reserved0[55];
-	u32 icciidr;		/* 0xfc */
-} GICC_REG, *pGICC_REG;
-
 #define PLATFORM_GIC_IRQS_NR		GIC_IRQS_NR
 #define PLATFORM_GPIO_IRQS_NR		GPIO_IRQS_NR
 #define PLATFORM_MAX_IRQS_NR		(GIC_IRQS_NR + GPIO_IRQS_NR)
diff --git a/include/irq-platform.h b/include/irq-platform.h
index 6694b5f7eb..d4269c9761 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -22,7 +22,7 @@
 #define IRQ_TIMER1			61
 #define IRQ_GPIO0			68
 #define IRQ_GPIO1			69
-#define IRQ_GPIO2			79
+#define IRQ_GPIO2			70
 #define IRQ_GPIO3			71
 
 #elif defined(CONFIG_ROCKCHIP_RK322X)

commit 618d619d029017f6d4f73982f7da1caf965f2b26
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Dec 8 16:49:38 2017 +0800

    input: rk8xx pwrkey: replace printf with debug
    
    I forgot to do this.
    
    Change-Id: I4db233255a633cd403f4a279970d069b39124fe6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 497eac4314..e5d99d358a 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -139,13 +139,13 @@ static void pwrkey_irq_handler(int irq, void *data)
 	/* fall event */
 	if (val & key->pwron_fall_int) {
 		key->key_down_t = get_ms(0);
-		printf("%s: key down: %llu ms\n", __func__, key->key_down_t);
+		debug("%s: key down: %llu ms\n", __func__, key->key_down_t);
 	}
 
 	/* rise event */
 	if (val & key->pwron_rise_int) {
 		key->key_up_t = get_ms(0);
-		printf("%s: key up: %llu ms\n", __func__, key->key_up_t);
+		debug("%s: key up: %llu ms\n", __func__, key->key_up_t);
 	}
 
 	/* clear intertup */

commit 1225f03eaae14cb42fe62e1cf8c8a5c050447cd2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 27 16:57:57 2017 +0800

    rockchip: fix blk_dread return value check error
    
    blk_dread returns negtive error code or blocks number
    that read successfully.
    
    Change-Id: I0f2afe98cfb64fe8e83a065fa64b91481856f5be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 2f026dc624..16eac39052 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -215,7 +215,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 
 	hdr = (void *)andr_hdr;
 	ret = blk_dread(dev_desc, offset, 1, hdr);
-	if (ret < 0)
+	if (ret != 1)
 		goto out;
 	ret = resource_image_check_header(hdr);
 	if (ret < 0)
@@ -228,7 +228,7 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	}
 	ret = blk_dread(dev_desc, offset + hdr->c_offset,
 			hdr->e_blks * hdr->e_nums, content);
-	if (ret < 0)
+	if (ret != (hdr->e_blks * hdr->e_nums))
 		goto err;
 
 init_list:
@@ -300,7 +300,9 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	dev_desc = rockchip_get_bootdev();
 	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
 			blks, buf);
-	if (!ret)
+	if (ret != blks)
+		ret = -EIO;
+	else
 		ret = len;
 
 	return ret;
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 5bd8a80c5c..54d3f6fb79 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -97,8 +97,11 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 
 	/* read first block with header imformation */
 	ret = blk_dread(dev_desc, part_info->start, 1, img);
-	if (ret < 0)
+	if (ret != 1) {
+		ret = -EIO;
 		goto err;
+	}
+
 	if (img->tag != TAG_KERNEL) {
 		printf("%s: invalid image tag(0x%x)\n", part_info->name, img->tag);
 		ret = -EINVAL;
@@ -113,8 +116,13 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
 	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
 			dst + RK_BLK_SIZE - header_len);
-	if (!ret)
+	if (ret != (cnt - 1)) {
+		printf("%s try to read %d blocks failed, only read %d blocks\n",
+		       part_info->name, cnt - 1, ret);
+		ret = -EIO;
+	} else {
 		ret = img->size;
+	}
 
 #ifdef CONFIG_ROCKCHIP_CRC
 	printf("%s image CRC32 verify... ", part_info->name);
@@ -192,8 +200,10 @@ int rockchip_get_boot_mode(void)
 	ret = blk_dread(dev_desc,
 			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
 			size >> 9, bmsg);
-	if (ret < 0)
+	if (ret != (size >> 9)) {
+		ret = -EIO;
 		goto err;
+	}
 
 	if (!strcmp(bmsg->command, "boot-recovery")) {
 		printf("boot mode: recovery\n");
diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
index a9af237a1e..b2c04e527d 100644
--- a/disk/part_rkparm.c
+++ b/disk/part_rkparm.c
@@ -94,7 +94,7 @@ static int rkparm_init_param(struct blk_desc *dev_desc,
 
 	ret = blk_dread(dev_desc, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9,
 			(ulong *)param);
-	if (ret < 0) {
+	if (ret != (MAX_PARAM_SIZE >> 9)) {
 		printf("%s param read fail\n", __func__);
 		return -EINVAL;
 	}

commit 65f7800c7de8cff8084d11ed5a31f9c70bce3f40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Dec 27 16:28:52 2017 +0800

    common: boot_rkimg: fix 'krenel' typo
    
    Change-Id: I4f4d4bce863208b7297ed57aa51afecada4c8f37
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 746897355a..5bd8a80c5c 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -226,7 +226,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 					 &kernel_part);
 
 	if (part_num < 0 || !boot_part) {
-		printf("%s krenel or boot part info error\n", __func__);
+		printf("%s kernel or boot part info error\n", __func__);
 		ret = -EINVAL;
 		goto out;
 	}
@@ -234,7 +234,7 @@ int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
 	kernel_size = read_rockchip_image(dev_desc, &kernel_part,
 					  (void *)kernel_addr_r);
 	if (kernel_size < 0) {
-		printf("%s krenel part read error\n", __func__);
+		printf("%s kernel part read error\n", __func__);
 		ret = -EINVAL;
 		goto out;
 	}

commit f562460ada02bb61e6a1d22dbc36f160e732d0ca
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 15 11:15:03 2017 +0800

    rockchip: add a common script for generate fit its
    
    Rockchip release bl31.elf file for armv8 SoCs like rk3399, rk3328,
    the elf have more than one section, we need to decode it first and
    packed them into u-boot.itb with its file. This script is to generate
    the its script.
    Need default bl31.elf in root directory of U-Boot source and dtb
    as parameter.
    
    Change-Id: Id70181b5d80beaf71458f78d274375efaf871364
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py
new file mode 100755
index 0000000000..7c6dd57678
--- /dev/null
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -0,0 +1,221 @@
+#!/usr/bin/env python2
+"""
+A script to generate FIT image source for rockchip boards
+with ARM Trusted Firmware
+and multiple device trees (given on the command line)
+
+usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+"""
+
+import os
+import sys
+import getopt
+
+# pip install pyelftools
+from elftools.elf.elffile import ELFFile
+from elftools.elf.sections import SymbolTableSection
+from elftools.elf.segments import Segment, InterpSegment, NoteSegment
+
+ELF_SEG_P_TYPE='p_type'
+ELF_SEG_P_PADDR='p_paddr'
+ELF_SEG_P_VADDR='p_vaddr'
+ELF_SEG_P_OFFSET='p_offset'
+ELF_SEG_P_FILESZ='p_filesz'
+ELF_SEG_P_MEMSZ='p_memsz'
+
+DT_HEADER="""/*
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Minimal dts for a SPL FIT image payload.
+ *
+ * SPDX-License-Identifier: GPL-2.0+  X11
+ */
+/dts-v1/;
+
+/ {
+	description = "Configuration to load ATF before U-Boot";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot (64-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm64";
+			compression = "none";
+			load = <0x%08x>;
+		};
+"""
+
+DT_IMAGES_NODE_END="""
+    };
+"""
+
+DT_END="""
+};
+"""
+
+def append_atf_node(file, atf_index, phy_addr):
+    """
+    Append ATF DT node to input FIT dts file.
+    """
+    data = 'bl31_0x%08x.bin' % phy_addr
+    print >> file, '\t\tatf@%d {' % atf_index
+    print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";'
+    print >> file, '\t\t\tdata = /incbin/("%s");' % data
+    print >> file, '\t\t\ttype = "firmware";'
+    print >> file, '\t\t\tarch = "arm64";'
+    print >> file, '\t\t\tos = "arm-trusted-firmware";'
+    print >> file, '\t\t\tcompression = "none";'
+    print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
+    if atf_index == 1:
+        print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
+    print >> file, '\t\t};'
+    print >> file, ''
+
+def append_fdt_node(file, dtbs):
+    """
+    Append FDT nodes.
+    """
+    cnt = 1
+    for dtb in dtbs:
+        dtname = os.path.basename(dtb)
+        print >> file, '\t\tfdt@%d {' % cnt
+        print >> file, '\t\t\tdescription = "%s";' % dtname
+        print >> file, '\t\t\tdata = /incbin/("%s");' % dtb
+        print >> file, '\t\t\ttype = "flat_dt";'
+        print >> file, '\t\t\tcompression = "none";'
+        print >> file, '\t\t};'
+        print >> file, ''
+        cnt = cnt + 1
+
+def append_conf_section(file, cnt, dtname, atf_cnt):
+    print >> file, '\t\tconfig@%d {' % cnt
+    print >> file, '\t\t\tdescription = "%s";' % dtname
+    print >> file, '\t\t\tfirmware = "atf@1";'
+    print >> file, '\t\t\tloadables = "uboot@1",',
+    for i in range(1, atf_cnt):
+        print >> file, '"atf@%d"' % (i+1),
+        if i != (atf_cnt - 1):
+            print >> file, ',',
+        else:
+            print >> file, ';'
+    print >> file, '\t\t\tfdt = "fdt@1";'
+    print >> file, '\t\t};'
+    print >> file, ''
+
+def append_conf_node(file, dtbs, atf_cnt):
+    """
+    Append configeration nodes.
+    """
+    cnt = 1
+    print >> file, '\tconfigurations {'
+    print >> file, '\t\tdefault = "config@1";'
+    for dtb in dtbs:
+        dtname = os.path.basename(dtb)
+        append_conf_section(file, cnt, dtname, atf_cnt)
+        cnt = cnt + 1
+    print >> file, '\t};'
+    print >> file, ''
+
+def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_file_name):
+    """
+    Generate FIT script for ATF image.
+    """
+    if fit_file_name != sys.stdout:
+        fit_file = open(fit_file_name, "wb")
+    else:
+        fit_file = sys.stdout
+
+    num_load_seg = 0
+    p_paddr = 0xFFFFFFFF
+    with open(uboot_file_name) as uboot_file:
+        uboot = ELFFile(uboot_file)
+        for i in range(uboot.num_segments()):
+            seg = uboot.get_segment(i)
+            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
+                p_paddr = seg.__getitem__(ELF_SEG_P_PADDR)
+                num_load_seg = num_load_seg + 1
+
+    assert (p_paddr != 0xFFFFFFFF and num_load_seg == 1)
+
+    print >> fit_file, DT_HEADER % p_paddr
+
+    with open(bl31_file_name) as bl31_file:
+        bl31 = ELFFile(bl31_file)
+        for i in range(bl31.num_segments()):
+            seg = bl31.get_segment(i)
+            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
+                paddr = seg.__getitem__(ELF_SEG_P_PADDR)
+                p= seg.__getitem__(ELF_SEG_P_PADDR)
+                append_atf_node(fit_file, i+1, paddr)
+    atf_cnt = i+1
+    append_fdt_node(fit_file, dtbs_file_name)
+    print >> fit_file, '%s' % DT_IMAGES_NODE_END
+    append_conf_node(fit_file, dtbs_file_name, atf_cnt)
+    print >> fit_file, '%s' % DT_END
+
+    if fit_file_name != sys.stdout:
+        fit_file.close()
+
+def generate_atf_binary(bl31_file_name):
+    with open(bl31_file_name) as bl31_file:
+        bl31 = ELFFile(bl31_file)
+
+        num = bl31.num_segments()
+        for i in range(num):
+            seg = bl31.get_segment(i)
+            if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
+                paddr = seg.__getitem__(ELF_SEG_P_PADDR)
+                file_name = 'bl31_0x%08x.bin' % paddr
+                with open(file_name, "wb") as atf:
+                    atf.write(seg.data());
+
+def get_bl31_segments_info(bl31_file_name):
+    """
+    Get load offset, physical offset, file size
+    from bl31 elf file program headers.
+    """
+    with open(bl31_file_name) as bl31_file:
+        bl31 = ELFFile(bl31_file)
+
+        num = bl31.num_segments()
+        print 'Number of Segments : %d' % bl31.num_segments()
+        for i in range(num):
+            print 'Segment %d' % i
+            seg = bl31.get_segment(i)
+            ptype = seg[ELF_SEG_P_TYPE]
+            poffset = seg[ELF_SEG_P_OFFSET]
+            pmemsz = seg[ELF_SEG_P_MEMSZ]
+            pfilesz = seg[ELF_SEG_P_FILESZ]
+            print 'type: %s\nfilesz: %08x\nmemsz: %08x\noffset: %08x' % (ptype, pfilesz, pmemsz, poffset)
+            paddr = seg[ELF_SEG_P_PADDR]
+            print 'paddr: %08x' % paddr
+
+def main():
+    uboot_elf="./u-boot"
+    bl31_elf="./bl31.elf"
+    FIT_ITS=sys.stdout
+
+    opts, args = getopt.getopt(sys.argv[1:], "o:u:b:h")
+    for opt, val in opts:
+        if opt == "-o":
+            FIT_ITS=val
+        elif opt == "-u":
+            uboot_elf=val
+        elif opt == "-b":
+            bl31_elf=val
+        elif opt == "-h":
+            print __doc__
+            sys.exit(2)
+
+    dtbs = args
+    #get_bl31_segments_info("u-boot")
+    #get_bl31_segments_info("bl31.elf")
+
+    generate_atf_fit_dts(FIT_ITS, bl31_elf, uboot_elf, dtbs)
+    generate_atf_binary(bl31_elf);
+
+if __name__ == "__main__":
+    main()

commit 15974eb4a15f60b20d5b5b5adaf54c965f853f7e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:39:57 2017 +0800

    rockchip: add fit source file for pack itb with op-tee
    
    We package U-Boot and OP-TEE into one itb file for SPL,
    so that we can support OP-TEE in SPL.
    
    Change-Id: I2c20333d6f3bb11ac1ec4bbb32c901028fb15d64
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its
new file mode 100644
index 0000000000..3aeecb8ec5
--- /dev/null
+++ b/arch/arm/mach-rockchip/fit_spl_optee.its
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Simple image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot";
+			data = /incbin/("../../../u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+			load = <0x61000000>;
+		};
+		optee@1 {
+			description = "OP-TEE";
+			data = /incbin/("../../../tee.bin");
+			type = "firmware";
+			arch = "arm";
+			os = "op-tee";
+			compression = "none";
+			load = <0x68400000>;
+			entry = <0x68400000>;
+		};
+		fdt@1 {
+			description = "dtb";
+			data = /incbin/("../../../u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "Rockchip armv7 with OP-TEE";
+			firmware = "optee@1";
+			loadables = "uboot@1";
+			fdt = "fdt@1";
+		};
+	};
+};

commit 0aec9aff9e9627f01c6f2caf6cfc274be08b9366
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 27 16:53:38 2017 +0800

    rockchip: boot_rkimg: fix wrong variable
    
    part -> part_info.
    
    Change-Id: Icbcd4191a02115b87d4d552355680691f63ad2e1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index 6188d91a8e..746897355a 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -117,7 +117,7 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 		ret = img->size;
 
 #ifdef CONFIG_ROCKCHIP_CRC
-	printf("%s image CRC32 verify... ", part->name);
+	printf("%s image CRC32 verify... ", part_info->name);
 	crc32 = rockchip_crc_verify((unsigned char *)(unsigned long)dst,
 				  img->size + 4);
 	if (!crc32) {

commit 6639be8fa96f6bec2845b9f8e6962f94d6d32ffd
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 14 15:32:34 2017 +0800

    rockchip: boot_rkimg: add CRC verify for images
    
    Change-Id: I8b5cc6e6ae455eafb46ea022ea1f3a93d04972eb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index f146a3e630..6188d91a8e 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -10,6 +10,7 @@
 #include <libfdt.h>
 #include <malloc.h>
 #include <asm/arch/resource_img.h>
+#include <asm/arch/rockchip_crc.h>
 #include <boot_rkimg.h>
 
 #define TAG_KERNEL			0x4C4E524B
@@ -84,6 +85,9 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 	int header_len = 8;
 	int cnt;
 	int ret;
+#ifdef CONFIG_ROCKCHIP_CRC
+	u32 crc32;
+#endif
 
 	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!img) {
@@ -111,6 +115,19 @@ static int read_rockchip_image(struct blk_desc *dev_desc,
 			dst + RK_BLK_SIZE - header_len);
 	if (!ret)
 		ret = img->size;
+
+#ifdef CONFIG_ROCKCHIP_CRC
+	printf("%s image CRC32 verify... ", part->name);
+	crc32 = rockchip_crc_verify((unsigned char *)(unsigned long)dst,
+				  img->size + 4);
+	if (!crc32) {
+		printf("fail!\n");
+		ret = -EINVAL;
+	} else {
+		printf("okay.\n");
+	}
+#endif
+
 err:
 	free(img);
 	return ret;

commit 26f074b872298ef96c0e428f41e1f0c5e86eaafc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 16:37:50 2017 +0800

    rockchip: update rkimg bootcmd
    
    Change-Id: Id7e051156e74acc1b0fd5dc50ae4646be2f9067a

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 5b3fdb5ddb..62d04f0d09 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -63,7 +63,7 @@
 
 #define RKIMG_BOOTCOMMAND \
 	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \
-	"else if rknand dev 0; then setenv devtype mmc; setenv devnum 0; fi;" \
+	"else if rknand dev 0; then setenv devtype rknand; setenv devnum 0; fi;" \
 	"fi; boot_android ${devtype} ${devnum};" \
 	"bootrkp;"
 

commit 32af749a74b1bd39ca28f9d728979bd5e90cdb62
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 16:36:31 2017 +0800

    rockchip: bootrkp: update cmd name
    
    Change-Id: If67d534c73b6ea0ba432dceb85f10e6ee4322e16
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
index 6c5943f32c..c7a4ec28fa 100644
--- a/cmd/bootrkp.c
+++ b/cmd/bootrkp.c
@@ -30,7 +30,9 @@ static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 U_BOOT_CMD(
-	boot_rockchip,  CONFIG_SYS_MAXARGS,     1,      do_boot_rockchip,
-	"boot Linux Image image from rockchip partition storage",
-	""
+	bootrkp,  CONFIG_SYS_MAXARGS,     1,      do_boot_rockchip,
+	"Boot Linux Image from rockchip image type",
+	"kernel.img: zImage/Image\n"
+	"boot.img: ramdisk\n"
+	"resource.img: dtb, u-boot logo, kernel logo"
 );

commit bfe741ab9eb4f97371a4e6c24185419d57a3a75f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 15:35:58 2017 +0800

    rockchip: rk3328: set ddr as non-secure in tpl
    
    Set ddr as non-secure so that mmc dma can access.
    
    Change-Id: Ia0f51908a8d428b864a9d71b2a3dd8baeb79b952
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
index 0b8a0e16e4..942223f505 100644
--- a/arch/arm/mach-rockchip/rk3328-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c
@@ -86,6 +86,7 @@ u32 spl_boot_device(void)
 	return BOOT_DEVICE_BOOTROM;
 }
 
+#define FW_DDR_CON_REG 0xff7c0040
 
 void board_init_f(ulong dummy)
 {
@@ -111,4 +112,7 @@ void board_init_f(ulong dummy)
 		printf("DRAM init failed: %d\n", ret);
 		return;
 	}
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_setreg(FW_DDR_CON_REG, 0x200);
+
 }

commit 93a905c1e0cbf19583c64880db90e6828b3c48f6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 20 17:51:08 2017 +0800

    spl: atf: pass NULL for bl32_ep pc
    
    Change-Id: Ibfd0054936fffed3603103226e304e4878598c84
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 2f6fff971a..06c4a03920 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -49,13 +49,14 @@ struct bl31_params *bl2_plat_get_bl31_params(void)
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
 
 	/* Fill BL32 related information if it exists */
-#ifdef BL32_BASE
 	bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, ATF_PARAM_EP,
 		       ATF_VERSION_1, 0);
 	bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info,
 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
+#ifndef BL32_BASE
+	bl2_to_bl31_params->bl32_ep_info->pc = 0;
 #endif /* BL32_BASE */
 
 	/* Fill BL33 related information */

commit 4b7908ad8b0aea62e051932acb8beb546125c50a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 20 17:48:30 2017 +0800

    rockchip: rk3328: ram: pass ddr params to trustos
    
    0x2000000 is a fixed address for share the ddr info.
    
    Change-Id: I37e77f73028b0504776ea662ec7b308ab7d21204
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 863b1202b7..24825971f7 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -992,6 +992,9 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[2]);
+#ifdef CONFIG_SPL_BUILD
+	rockchip_setup_ddr_param(&priv->info);
+#endif
 #endif
 	return 0;
 }
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index b7971782b5..e8665d6ee9 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -23,7 +23,7 @@
 #define CONFIG_SPL_STACK		0x00400000
 #define CONFIG_SPL_TEXT_BASE		0x00000000
 #define CONFIG_SPL_MAX_SIZE             0x10000
-#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 

commit 3a2e317c252fc44dac3b30cf7767877de4440869
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 21 10:53:23 2017 +0800

    rockchip: sdram-common: add api to pass dram info to trust os
    
    Trust OS decode this info like this:
    https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/rockchip/common/drivers/parameter/ddr_parameter.c#L19
    We have to set a available value, or else we get error info from
    Trust OS like this:
    "ERROR:   over or zero region, nr=3145987, max=10"
    
    Change-Id: I8adbf0332e8b981cda089177e4c62a9f7d326581
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h
index fec85865ff..55c6b81b2f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_common.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h
@@ -55,4 +55,8 @@ size_t rockchip_sdram_size(phys_addr_t reg);
 
 /* Called by U-Boot board_init_r for Rockchip SoCs */
 int dram_init(void);
+
+/* Write ddr param to a known place for trustos */
+int rockchip_setup_ddr_param(struct ram_info *info);
+
 #endif
diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c
index 76dbdc8715..d6c815cf72 100644
--- a/arch/arm/mach-rockchip/sdram_common.c
+++ b/arch/arm/mach-rockchip/sdram_common.c
@@ -12,6 +12,14 @@
 #include <dm/uclass-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+struct ddr_param{
+	u32 count;
+	u32 reserved;
+	u64 bank_addr;
+	u64 bank_size;
+};
+#define PARAM_DRAM_INFO_OFFSET 0x2000000
+
 size_t rockchip_sdram_size(phys_addr_t reg)
 {
 	u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4;
@@ -81,3 +89,14 @@ ulong board_get_usable_ram_top(ulong total_size)
 
 	return (gd->ram_top > top) ? top : gd->ram_top;
 }
+
+int rockchip_setup_ddr_param(struct ram_info *info)
+{
+	struct ddr_param *dinfo = (struct ddr_param *)PARAM_DRAM_INFO_OFFSET;
+
+	dinfo->count = 1;
+	dinfo->bank_addr = info->base;
+	dinfo->bank_size = info->size;
+
+	return 0;
+}

commit d738f2ccb45671898f51f285d41a265192d57a01
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Thu Dec 21 14:24:40 2017 +0800

    drivers: rknand: fix read error data
    
    ftl_read api with un-aligned data buffer will return error data.
    
    Change-Id: I380667d6d671dd96578830939d137fe74015d8ac
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index 0c82460803..e47273ae39 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -1,3 +1,12 @@
+/*
+ * Copyright (c) 2016-2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * date: 2017-12-21
+ */
 	.syntax unified
 	.arch armv7-a
 	.fpu softvfp
@@ -2777,1953 +2786,228 @@ NandcXferComp:
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	NandcXferComp, .-NandcXferComp
-	.section	.text.NandcCopy1KB,"ax",%progbits
+	.section	.text.Ftl_log2,"ax",%progbits
 	.align	1
-	.global	NandcCopy1KB
+	.global	Ftl_log2
 	.thumb
 	.thumb_func
-	.type	NandcCopy1KB, %function
-NandcCopy1KB:
-	@ args = 4, pretend = 0, frame = 0
+	.type	Ftl_log2, %function
+Ftl_log2:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, lr}
-	cmp	r1, #1
-	mov	r4, r2
-	add	r2, r0, #4096
-	ldr	r5, [sp, #16]
-	add	r6, r0, #512
-	add	r2, r2, r4, lsl #9
-	bne	.L376
-	cbz	r3, .L377
-	mov	r0, r2
-	mov	r1, r3
-	mov	r2, #1024
-	bl	memcpy
+	@ link register save eliminated.
+	movs	r2, #1
+	movs	r3, #0
+	b	.L376
 .L377:
-	cbz	r5, .L375
-	lsrs	r4, r4, #1
-	ldrb	r2, [r5, #1]	@ zero_extendqisi2
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldrb	r3, [r5, #2]	@ zero_extendqisi2
-	lsls	r3, r3, #16
-	orr	r3, r3, r2, lsl #8
-	ldrb	r2, [r5, #0]	@ zero_extendqisi2
-	orrs	r3, r3, r2
-	ldrb	r2, [r5, #3]	@ zero_extendqisi2
-	orr	r3, r3, r2, lsl #24
-	str	r3, [r6, r4]
-	pop	{r4, r5, r6, pc}
+	adds	r3, r3, #1
+	lsls	r2, r2, #1
+	uxth	r3, r3
 .L376:
-	cbz	r3, .L379
-	mov	r1, r2
-	mov	r0, r3
-	mov	r2, #1024
-	bl	memcpy
-.L379:
-	cbz	r5, .L375
-	lsrs	r4, r4, #1
-	lsls	r3, r4, #4
-	lsls	r4, r4, #6
-	subs	r4, r4, r3
-	ldr	r3, [r6, r4]
-	lsrs	r2, r3, #8
-	strb	r3, [r5, #0]
-	strb	r2, [r5, #1]
-	lsrs	r2, r3, #16
-	lsrs	r3, r3, #24
-	strb	r2, [r5, #2]
-	strb	r3, [r5, #3]
-.L375:
-	pop	{r4, r5, r6, pc}
-	.size	NandcCopy1KB, .-NandcCopy1KB
-	.section	.text.NandcXferData,"ax",%progbits
+	cmp	r2, r0
+	bls	.L377
+	subs	r3, r3, #1
+	uxth	r0, r3
+	bx	lr
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",%progbits
 	.align	1
-	.global	NandcXferData
+	.global	FtlPrintInfo
 	.thumb
 	.thumb_func
-	.type	NandcXferData, %function
-NandcXferData:
-	@ args = 4, pretend = 0, frame = 80
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #88
-	mov	r4, r3
-	mov	fp, r3
-	ldr	r3, .L418
-	mov	r6, r0
-	str	r1, [sp, #12]
-	lsls	r1, r4, #26
-	mov	sl, r2
-	ldr	r5, [sp, #120]
-	ldr	r8, [r3, r0, lsl #3]
-	bne	.L381
-	cbnz	r5, .L382
-	add	r0, sp, #20
-	movs	r1, #255
-	movs	r2, #64
-	add	r5, sp, #20
-	bl	memset
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkNumInit
+	.thumb
+	.thumb_func
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L382
+	cmp	r0, #23
+	it	ls
+	movls	r0, #24
+	ldr	r2, .L382+4
+	str	r0, [r3, #0]
+	ldr	r3, .L382+8
+	ldrh	r3, [r3, #0]
+	muls	r3, r0, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L382+12
+	ldrh	r2, [r2, #0]
+	subs	r0, r2, r0
+	ldr	r2, .L382+16
+	strh	r0, [r2, #0]	@ movhi
+	movs	r0, #0
+	ldr	r2, .L382+20
+	ldr	r2, [r2, #0]
+	subs	r3, r2, r3
+	ldr	r2, .L382+24
+	str	r3, [r2, #0]
+	bx	lr
+.L383:
+	.align	2
 .L382:
+	.word	.LANCHOR40
+	.word	.LANCHOR42
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.word	.LANCHOR43
+	.word	.LANCHOR46
+	.word	.LANCHOR45
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.global	__aeabi_idiv
+	.section	.text.FtlConstantsInit,"ax",%progbits
+	.align	1
+	.global	FtlConstantsInit
+	.thumb
+	.thumb_func
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrh	r7, [r0, #8]
+	sub	sp, sp, #32
+	ldr	r3, .L400
+	ldrh	r1, [r0, #10]
+	ldrh	r0, [r0, #12]
+	strh	r7, [r3, #0]	@ movhi
+	ldr	r3, .L400+4
+	ldrh	ip, [r4, #14]
+	ldr	r2, .L400+8
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L400+12
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L400+16
+	strh	ip, [r3, #0]	@ movhi
 	movs	r3, #0
-	mov	r0, r6
-	ldr	r1, [sp, #12]
-	mov	r2, sl
-	stmia	sp, {r4, r5}
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [sp, #12]
-	cmp	r3, #0
-	bne	.L405
-	ldr	r3, .L418+4
-	lsr	r0, sl, #1
-	ldr	r1, .L418+8
-	ldr	r4, [r3, #0]
-	ldr	r3, [sp, #12]
-	cmp	r4, #24
-	ite	hi
-	movhi	r4, #128
-	movls	r4, #64
-	mov	r2, r3
-	b	.L385
-.L386:
-	ldr	r7, [r1, #4]
-	lsrs	r3, r3, #2
-	adds	r2, r2, #1
-	ldr	r3, [r7, r3, lsl #2]
-	lsrs	r7, r3, #8
-	strb	r3, [r5, #0]
-	strb	r7, [r5, #1]
-	lsrs	r7, r3, #16
-	lsrs	r3, r3, #24
-	strb	r7, [r5, #2]
-	strb	r3, [r5, #3]
-	adds	r5, r5, #4
-	mov	r3, r6
 .L385:
-	cmp	r2, r0
-	add	r6, r3, r4
-	bcc	.L386
-	ldr	r3, .L418+4
-	lsr	sl, sl, #2
-	ldr	r0, [r3, #0]
-	ldr	r3, .L418+12
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	mov	r4, r3
+	strb	r3, [r3, r2]
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L385
+	ldrh	r2, [r4, #14]
+	ldrh	r3, [r4, #20]
+	cmp	r3, r2, lsr #8
+	bcs	.L386
+	ldr	r3, .L400+8
+	uxtb	sl, r0
+	movs	r2, #0
+	subs	r6, r3, r0
+	str	r6, [sp, #24]
+	subs	r6, r1, #1
+	lsl	r8, sl, #1
+	mla	r6, r0, r6, r3
+	uxtb	r8, r8
+	rsb	r5, r8, #0
+	uxtb	r5, r5
+	str	r6, [sp, #28]
 	b	.L387
-.L393:
-	add	r2, r3, #8
-	ldr	r2, [r8, r2, lsl #2]
-	str	r2, [sp, #84]
-	ldr	r2, [sp, #84]
-	lsls	r2, r2, #29
-	bmi	.L408
-	ldr	r2, [sp, #84]
-	ands	r2, r2, #32768
-	bne	.L408
-	cmp	r1, #5
-	bls	.L389
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #27, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #29, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L390
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #27, #1
-	b	.L417
-.L390:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #29, #1
-	b	.L417
+.L388:
+	ldr	r2, [sp, #12]
+	add	fp, r6, r5
+	add	lr, lr, #1
+	strb	fp, [r2, r3]
+	ldr	r2, [sp, #20]
+	add	fp, r6, r2
+	ldr	r2, [sp, #16]
+	strb	fp, [r2, r3]
+	b	.L389
+.L398:
+	ldr	fp, [sp, #24]
+	movs	r3, #0
+	mov	r6, r3
+	mov	lr, r3
+	add	fp, fp, r2
+	str	fp, [sp, #12]
+	ldr	fp, [sp, #28]
+	str	r2, [sp, #4]
+	add	fp, fp, r2
+	str	fp, [sp, #16]
+	add	fp, r5, sl
+	str	fp, [sp, #20]
 .L389:
-	cmp	r1, #3
-	bls	.L391
-	ldr	r7, [sp, #84]
-	ldr	r5, [sp, #84]
-	ldr	r6, [sp, #84]
-	ubfx	r7, r7, #3, #5
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #28, #1
-	ubfx	r6, r6, #16, #5
-	ubfx	r2, r2, #30, #1
-	orr	r5, r7, r5, lsl #5
-	orr	r2, r6, r2, lsl #5
-	cmp	r5, r2
-	ldr	r5, [sp, #84]
-	bls	.L392
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #3, #5
-	ubfx	r2, r2, #28, #1
-	b	.L417
-.L392:
-	ldr	r2, [sp, #84]
-	ubfx	r5, r5, #16, #5
-	ubfx	r2, r2, #30, #1
-.L417:
-	orr	r2, r5, r2, lsl #5
-.L391:
-	cmp	r4, r2
-	it	cc
-	movcc	r4, r2
-	b	.L388
-.L408:
-	mov	r4, #-1
-.L388:
-	adds	r3, r3, #1
-.L387:
-	cmp	r3, sl
-	bcs	.L383
-	cmp	r0, #0
-	bne	.L393
-	b	.L383
-.L405:
-	movs	r4, #0
-.L383:
-	movs	r3, #0
-	str	r3, [r8, #16]
-	b	.L394
-.L381:
-	ldr	r3, [sp, #12]
-	mov	r7, #0
-	cmp	r3, #1
-	bne	.L415
-	b	.L395
-.L398:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	and	r4, r7, #3
-	mov	r0, r8
-	movs	r1, #1
-	mla	r3, r7, r3, r5
-	mov	r2, r4
-	adds	r7, r7, #2
-	str	r3, [sp, #0]
-	mov	r3, fp
-	bl	NandcCopy1KB
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	str	r3, [sp, #4]
-	movs	r1, #1
-	movs	r2, #2
-	mov	r3, r4
-	bl	NandcXferStart
-	mov	r0, r6
-	bl	NandcXferComp
-	add	fp, fp, #1024
-.L395:
-	cmp	r7, sl
-	bcc	.L398
-	movs	r4, #0
-	b	.L394
-.L415:
-	mov	r1, r7
-	movs	r2, #2
-	mov	r3, r7
-	str	r7, [sp, #0]
-	str	r7, [sp, #4]
-	mov	r4, r7
-	bl	NandcXferStart
-	b	.L399
-.L403:
-	mov	r0, r6
-	bl	NandcXferComp
-	ldr	r3, [r8, #32]
-	add	ip, r7, #2
-	cmp	ip, sl
-	str	r3, [sp, #84]
-	bcs	.L400
-	movs	r3, #0
-	mov	r0, r6
-	str	r3, [sp, #0]
-	mov	r1, r3
-	str	r3, [sp, #4]
-	movs	r2, #2
-	and	r3, ip, #3
-	str	ip, [sp, #8]
-	bl	NandcXferStart
-	ldr	ip, [sp, #8]
-.L400:
-	ldr	r3, [sp, #84]
-	lsls	r1, r3, #29
-	bmi	.L412
-	ldr	r2, [sp, #84]
-	ldr	r3, [sp, #84]
-	ubfx	r2, r2, #3, #5
-	ubfx	r3, r3, #27, #1
-	orr	r3, r2, r3, lsl #5
-	cmp	r4, r3
-	it	cc
-	movcc	r4, r3
-	b	.L401
-.L412:
-	mov	r4, #-1
-.L401:
-	cmp	r5, #0
-	ite	ne
-	movne	r3, #2
-	moveq	r3, #0
-	sub	r2, ip, #2
-	mov	r0, r8
-	movs	r1, #0
-	mla	r7, r7, r3, r5
-	and	r2, r2, #3
-	mov	r3, fp
-	str	ip, [sp, #8]
-	add	fp, fp, #1024
-	str	r7, [sp, #0]
-	bl	NandcCopy1KB
-	ldr	ip, [sp, #8]
-	mov	r7, ip
-.L399:
-	cmp	r7, sl
-	bcc	.L403
-.L394:
-	ldr	r3, .L418+12
-	ldr	r3, [r3, #0]
-	cmp	r3, #5
-	bls	.L404
-	ldr	r3, [sp, #12]
-	cbnz	r3, .L404
-	ldr	r3, [r8, #0]
-	and	r2, r3, #139264
-	cmp	r2, #139264
-	bne	.L404
-	mov	r4, #-1
-	orr	r3, r3, #131072
-	str	r3, [r8, #0]
-.L404:
-	mov	r0, r4
-	add	sp, sp, #88
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L419:
-	.align	2
-.L418:
-	.word	.LANCHOR5
-	.word	.LANCHOR36
-	.word	.LANCHOR38
-	.word	.LANCHOR37
-	.size	NandcXferData, .-NandcXferData
-	.section	.text.FlashProgPage,"ax",%progbits
-	.align	1
-	.global	FlashProgPage
-	.thumb
-	.thumb_func
-	.type	FlashProgPage, %function
-FlashProgPage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L423
-	mov	r5, r1
-	mov	r6, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L421
-	ldr	r3, .L423+4
-	ldr	r2, .L423+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	bcs	.L421
-	ldr	r3, .L423+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L422
-	subs	r7, r7, #2
-	b	.L421
-.L422:
-	movs	r7, #4
-.L421:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r0, r4
-	mov	r1, r5
-	bl	FlashProgFirstCmd
-	uxtb	r2, r7
-	mov	r3, r6
-	movs	r1, #1
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashProgSecondCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r1, r5
-	mov	r0, r4
-	bl	FlashReadStatus
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	and	r0, r5, #1
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L424:
-	.align	2
-.L423:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.word	.LANCHOR0
-	.size	FlashProgPage, .-FlashProgPage
-	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
-	.align	1
-	.global	FlashPageProgMsbFFData
-	.thumb
-	.thumb_func
-	.type	FlashPageProgMsbFFData, %function
-FlashPageProgMsbFFData:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L433
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r2
-	ldr	r2, .L433+4
-	mov	r8, r0
-	ldr	r3, [r3, #0]
-	mov	r7, r1
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r2, .L426
-	ldr	r2, .L433+8
-	ldr	r1, [r2, #0]
-	ldr	r2, .L433+12
-	cmp	r1, r2
-	beq	.L425
-.L426:
-	subs	r2, r3, #5
-	cmp	r2, #2
-	bls	.L430
-	cmp	r3, #68
-	beq	.L430
-	cmp	r3, #35
-	beq	.L430
-	cmp	r3, #19
-	bne	.L425
-	b	.L430
-.L431:
-	ldrh	r3, [sl, r4, lsl #1]
-	cmp	r3, fp
-	bne	.L425
-	movs	r1, #255
-	mov	r2, #32768
-	ldr	r0, [r5, #0]
-	bl	memset
-	adds	r1, r4, r7
-	adds	r4, r4, #1
-	mov	r0, r8
-	ldr	r2, [r5, #0]
-	movs	r3, #0
-	bl	FlashProgPage
-	uxth	r4, r4
-	b	.L432
-.L430:
-	ldr	r6, .L433
-	movw	fp, #65535
-	ldr	sl, .L433+20
-	ldr	r5, .L433+16
-.L432:
-	ldr	r3, [r6, #0]
-	ldrh	r3, [r3, #10]
-	cmp	r3, r4
-	bhi	.L431
-.L425:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L434:
-	.align	2
-.L433:
-	.word	.LANCHOR23
-	.word	.LANCHOR7
-	.word	.LANCHOR40
-	.word	1446522928
-	.word	.LANCHOR41
-	.word	.LANCHOR9
-	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
-	.section	.text.FlashReadRawPage,"ax",%progbits
-	.align	1
-	.global	FlashReadRawPage
-	.thumb
-	.thumb_func
-	.type	FlashReadRawPage, %function
-FlashReadRawPage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r8, r3
-	ldr	r3, .L438
-	mov	r6, r1
-	mov	r5, r2
-	mov	r4, r0
-	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L436
-	ldr	r3, .L438+4
-	ldr	r2, .L438+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	muls	r3, r2, r3
-	cmp	r1, r3
-	it	cc
-	movcc	r7, #4
-.L436:
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r0, r4
-	bl	NandcFlashCs
-	mov	r1, r6
-	mov	r0, r4
-	bl	FlashReadCmd
-	mov	r0, r4
-	bl	NandcWaitFlashReady
-	mov	r3, r5
-	movs	r1, #0
-	mov	r2, r7
-	mov	r0, r4
-	str	r8, [sp, #0]
-	bl	NandcXferData
-	mov	r5, r0
-	mov	r0, r4
-	bl	NandcFlashDeCs
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L439:
-	.align	2
-.L438:
-	.word	.LANCHOR18
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadRawPage, .-FlashReadRawPage
-	.section	.text.HynixReadRetrial,"ax",%progbits
-	.align	1
-	.global	HynixReadRetrial
-	.thumb
-	.thumb_func
-	.type	HynixReadRetrial, %function
-HynixReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r2
-	ldr	r2, .L455
-	mov	r7, r3
-	mov	r6, r0
-	str	r1, [sp, #4]
-	adds	r3, r2, r0
-	mov	r8, #0
-	ldrb	fp, [r2, #2]	@ zero_extendqisi2
-	mov	r5, #-1
-	ldr	r2, .L455+4
-	ldrb	r4, [r3, #12]	@ zero_extendqisi2
-	ldr	r2, [r2, #0]
-	ldrb	r2, [r2, #19]	@ zero_extendqisi2
-	cmp	r2, #7
-	it	eq
-	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
-	bl	NandcWaitFlashReady
-	b	.L442
-.L447:
-	adds	r4, r4, #1
-	ldr	r2, .L455
-	mov	r0, r6
-	uxtb	r4, r4
-	cmp	r4, fp
-	it	cs
-	movcs	r4, #0
-	ldrb	r1, [r2, #1]	@ zero_extendqisi2
-	mov	r3, r4
-	adds	r2, r2, #4
-	bl	HynixSetRRPara
-	mov	r3, r7
-	mov	r0, r6
-	ldr	r1, [sp, #4]
-	mov	r2, sl
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	beq	.L444
-	ldr	r2, .L455+8
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L453
-	movs	r7, #0
-	mov	sl, r7
-.L444:
-	add	r8, r8, #1
-.L442:
-	cmp	r8, fp
-	bcc	.L447
-	b	.L446
-.L453:
-	mov	r5, r0
-.L446:
-	ldr	r3, .L455+4
-	ldr	r3, [r3, #0]
-	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cmp	r3, #7
-	ldr	r3, .L455
-	add	r6, r3, r6
-	ldr	r3, .L455+8
-	it	eq
-	strbeq	r4, [r6, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	it	ne
-	strbne	r4, [r6, #12]
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L450
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L450:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L456:
-	.align	2
-.L455:
-	.word	.LANCHOR31
-	.word	.LANCHOR23
-	.word	.LANCHOR29
-	.size	HynixReadRetrial, .-HynixReadRetrial
-	.global	__aeabi_idiv
-	.section	.text.MicronReadRetrial,"ax",%progbits
-	.align	1
-	.global	MicronReadRetrial
-	.thumb
-	.thumb_func
-	.type	MicronReadRetrial, %function
-MicronReadRetrial:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	fp, r3
-	ldr	r3, .L471
-	mov	sl, r0
-	sub	sp, sp, #24
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L471+4
-	str	r1, [sp, #16]
-	str	r2, [sp, #20]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L458
-	add	r0, r0, r0, lsl #1
-	ubfx	r0, r0, #2, #8
-	b	.L470
-.L458:
-	movs	r1, #3
-	bl	__aeabi_idiv
-	uxtb	r0, r0
-.L470:
-	str	r0, [sp, #12]
-	mov	r0, sl
-	bl	NandcWaitFlashReady
-	ldr	r3, .L471+8
-	mov	r8, #0
-	mov	r4, #-1
-	ldr	r6, [r3, sl, lsl #3]
-	add	r3, r3, sl, lsl #3
-	ldrb	r7, [r3, #4]	@ zero_extendqisi2
-	adds	r7, r7, #8
-	lsls	r7, r7, #8
-	adds	r5, r6, r7
-	b	.L460
-.L464:
-	movs	r2, #239
-	movs	r3, #137
-	str	r2, [r5, #8]
-	movs	r0, #200
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r2, #0
-	add	ip, r8, #1
-	mov	r0, sl
-	str	ip, [r5, #0]
-	mov	r3, fp
-	str	r2, [r5, #0]
-	ldr	r1, [sp, #16]
-	str	r2, [r5, #0]
-	str	r2, [r5, #0]
-	ldr	r2, [sp, #20]
-	str	ip, [sp, #8]
-	bl	FlashReadRawPage
-	ldr	ip, [sp, #8]
-	adds	r2, r0, #1
-	beq	.L461
-	ldr	r3, [sp, #12]
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	cmp	r0, r3
-	bcc	.L468
-	mov	fp, #0
-	str	fp, [sp, #20]
-.L461:
-	mov	r8, ip
-.L460:
-	ldr	r2, .L471+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r8, r3
-	bcc	.L464
-	b	.L463
-.L468:
-	mov	r4, r0
-.L463:
-	movs	r3, #239
-	movs	r0, #200
-	str	r3, [r5, #8]
-	movs	r3, #137
-	str	r3, [r5, #4]
-	bl	udelay
-	movs	r3, #0
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	str	r3, [r6, r7]
-	ldr	r3, [sp, #12]
-	cmp	r4, r3
-	bcc	.L465
-	ldr	r0, .L471+16
-	mov	r1, r8
-	ldr	r2, [sp, #16]
-	mov	r3, r8
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-	str	r4, [sp, #0]
-	bl	printf
-.L465:
-	mov	r0, r4
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L472:
-	.align	2
-.L471:
-	.word	.LANCHOR29
-	.word	.LANCHOR7
-	.word	.LANCHOR5
-	.word	.LANCHOR42
-	.word	.LC2
-	.size	MicronReadRetrial, .-MicronReadRetrial
-	.section	.text.SamsungReadRetrial,"ax",%progbits
-	.align	1
-	.global	SamsungReadRetrial
-	.thumb
-	.thumb_func
-	.type	SamsungReadRetrial, %function
-SamsungReadRetrial:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	r8, r2
-	mov	r6, r3
-	mov	fp, r1
-	bl	NandcWaitFlashReady
-	ldr	r3, .L483
-	movs	r5, #1
-	mov	r4, #-1
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	sl, [r3, #4]	@ zero_extendqisi2
-	add	sl, sl, #8
-	add	sl, r2, sl, lsl #8
-	b	.L474
-.L478:
-	mov	r0, sl
-	uxtb	r1, r5
-	bl	SamsungSetRRPara
-	mov	r1, fp
-	mov	r0, r7
-	mov	r2, r8
-	mov	r3, r6
-	bl	FlashReadRawPage
-	adds	r1, r0, #1
-	beq	.L475
-	ldr	r2, .L483+4
-	cmp	r4, #-1
-	it	eq
-	moveq	r4, r0
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r0, r3, lsr #2
-	bcc	.L481
-	movs	r6, #0
-	mov	r8, r6
-.L475:
-	adds	r5, r5, #1
-.L474:
-	ldr	r2, .L483+8
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r5, r3
-	bcc	.L478
-	b	.L477
-.L481:
-	mov	r4, r0
-.L477:
-	movs	r1, #0
-	mov	r0, sl
-	bl	SamsungSetRRPara
-	ldr	r3, .L483+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r4, r3, lsr #2
-	bcc	.L479
-	cmp	r4, #-1
-	ite	eq
-	moveq	r4, #-1
-	movne	r4, #256
-.L479:
-	mov	r0, r4
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L484:
-	.align	2
-.L483:
-	.word	.LANCHOR5
-	.word	.LANCHOR29
-	.word	.LANCHOR42
-	.size	SamsungReadRetrial, .-SamsungReadRetrial
-	.section	.text.ToshibaReadRetrial,"ax",%progbits
-	.align	1
-	.global	ToshibaReadRetrial
-	.thumb
-	.thumb_func
-	.type	ToshibaReadRetrial, %function
-ToshibaReadRetrial:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r7, r0
-	mov	fp, r2
-	mov	r8, r3
-	str	r1, [sp, #4]
-	bl	NandcWaitFlashReady
-	ldr	r3, .L507
-	ldr	r2, [r3, r7, lsl #3]
-	add	r3, r3, r7, lsl #3
-	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L507+4
-	adds	r4, r4, #8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r4, r2, r4, lsl #8
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bls	.L502
-	ldr	r3, .L507+8
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L503
-	movs	r0, #0
-	mov	sl, #1
-	bl	NandcSetDdrMode
-	b	.L487
-.L503:
-	mov	sl, r3
-.L487:
-	movs	r3, #92
-	str	r3, [r4, #8]
-	movs	r3, #197
-	str	r3, [r4, #8]
-	b	.L486
-.L502:
-	mov	sl, #0
-.L486:
-	movs	r6, #1
-	mov	r5, #-1
-	b	.L488
-.L497:
-	ldr	r1, .L507+4
-	mov	r0, r4
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	uxtb	r1, r6
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L489
-	bl	SandiskSetRRPara
-	b	.L490
-.L489:
-	bl	ToshibaSetRRPara
-.L490:
-	ldr	r2, .L507+4
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	cmp	r3, #34
-	bne	.L491
-	ldr	r1, .L507+12
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	subs	r3, r3, #3
-	cmp	r6, r3
-	bne	.L491
-	movs	r2, #179
-	str	r2, [r4, #8]
-.L491:
-	movs	r3, #38
-	str	r3, [r4, #8]
-	movs	r3, #93
-	str	r3, [r4, #8]
-	cmp	sl, #0
-	beq	.L492
-	movs	r0, #4
-	bl	NandcSetDdrMode
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	mov	r3, r8
-	mov	r0, r7
-	bl	FlashReadRawPage
-	mov	r3, r0
-	movs	r0, #0
-	str	r3, [sp, #0]
-	bl	NandcSetDdrMode
-	ldr	r3, [sp, #0]
-	b	.L493
-.L492:
-	mov	r3, r8
-	mov	r0, r7
-	ldr	r1, [sp, #4]
-	mov	r2, fp
-	bl	FlashReadRawPage
-	mov	r3, r0
-.L493:
-	adds	r0, r3, #1
-	beq	.L494
-	ldr	r1, .L507+16
-	cmp	r5, #-1
-	it	eq
-	moveq	r5, r3
-	ldrb	r2, [r1, #0]	@ zero_extendqisi2
-	add	r2, r2, r2, lsl #1
-	cmp	r3, r2, lsr #2
-	bcc	.L505
-	mov	r8, #0
-	mov	fp, r8
-.L494:
-	adds	r6, r6, #1
-.L488:
-	ldr	r2, .L507+12
-	ldrb	r3, [r2, #0]	@ zero_extendqisi2
-	adds	r3, r3, #1
-	cmp	r6, r3
-	bcc	.L497
-	b	.L496
-.L505:
-	mov	r5, r3
-.L496:
-	ldr	r3, .L507+4
-	movs	r1, #0
-	mov	r0, r4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	subs	r3, r3, #67
-	cmp	r3, #1
-	bhi	.L498
-	bl	SandiskSetRRPara
-	b	.L499
-.L498:
-	bl	ToshibaSetRRPara
-.L499:
-	movs	r3, #255
-	str	r3, [r4, #8]
-	ldr	r3, .L507+16
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	add	r3, r3, r3, lsl #1
-	cmp	r5, r3, lsr #2
-	bcc	.L500
-	cmp	r5, #-1
-	ite	eq
-	moveq	r5, #-1
-	movne	r5, #256
-.L500:
-	mov	r0, r7
-	bl	NandcWaitFlashReady
-	cmp	sl, #0
-	beq	.L501
-	movs	r0, #4
-	bl	NandcSetDdrMode
-.L501:
-	mov	r0, r5
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L508:
-	.align	2
-.L507:
-	.word	.LANCHOR5
-	.word	.LANCHOR11
-	.word	.LANCHOR35
-	.word	.LANCHOR42
-	.word	.LANCHOR29
-	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
-	.section	.text.FlashSavePhyInfo,"ax",%progbits
-	.align	1
-	.global	FlashSavePhyInfo
-	.thumb
-	.thumb_func
-	.type	FlashSavePhyInfo, %function
-FlashSavePhyInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L516
-	ldr	r8, .L516+60
-	ldr	sl, .L516+64
-	ldr	r3, [r7, #0]
-	ldr	fp, .L516+48
-	ldr	r6, .L516+4
-	str	r3, [r8, #0]
-	ldr	r3, .L516+8
-	ldrb	r0, [r3, #0]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r1, #0
-	mov	r2, #2048
-	ldr	r0, [r7, #0]
-	bl	memset
-	ldr	r0, [r8, #0]
-	ldr	r3, .L516+12
-	movs	r2, #32
-	ldr	r1, .L516+16
-	str	sl, [r0, #0]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #12]	@ movhi
-	ldr	r3, .L516+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	strh	r3, [r0, #14]	@ movhi
-	ldr	r3, .L516+24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [r0, #1076]
-	adds	r0, r0, #16
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+28
-	movs	r2, #8
-	adds	r0, r0, #80
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+32
-	movs	r2, #32
-	adds	r0, r0, #96
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+36
-	movs	r2, #32
-	adds	r0, r0, #160
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	ldr	r1, .L516+40
-	movs	r2, #32
-	adds	r0, r0, #192
-	bl	memcpy
-	ldr	r0, [r8, #0]
-	mov	r2, #852
-	ldr	r1, .L516+44
-	adds	r0, r0, #224
-	bl	memcpy
-	ldr	r4, [r8, #0]
-	movw	r1, #2036
-	add	r0, r4, #12
-	bl	JSHash
-	mov	r3, #1592
-	str	r3, [r4, #4]
-	ldr	r3, [fp, #0]
-	str	r3, [r8, #0]
-	str	r0, [r4, #8]
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-	mov	r4, r5
-.L512:
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r2, r0
-	muls	r1, r4, r1
-	bl	FlashEraseBlock
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	bl	FlashProgPage
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	mov	r3, r0
-	muls	r1, r4, r1
-	ldr	r2, [r7, #0]
-	adds	r1, r1, #1
-	bl	FlashProgPage
-	ldr	r3, .L516+48
-	movs	r0, #0
-	ldr	r1, [r6, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L510
-	ldr	fp, [r8, #0]
-	ldr	r3, [fp, #0]
-	cmp	r3, sl
-	bne	.L510
-	add	r0, fp, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [fp, #8]
-	cmp	r3, r0
-	bne	.L510
-	ldr	r3, .L516+52
-	adds	r2, r4, #1
-	adds	r5, r5, #1
-	str	r2, [r3, #0]
-	ldr	r3, .L516+56
-	ldr	r2, [r6, #0]
-	muls	r2, r4, r2
-	cmp	r5, #1
-	str	r2, [r3, #0]
-	bhi	.L511
-.L510:
-	adds	r4, r4, #1
-	cmp	r4, #4
-	bne	.L512
-.L511:
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-	cmp	r5, #0
-	ite	eq
-	moveq	r0, #-1
-	movne	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L517:
-	.align	2
-.L516:
-	.word	.LANCHOR44
-	.word	.LANCHOR2
-	.word	.LANCHOR45
-	.word	.LANCHOR16
-	.word	.LANCHOR22
-	.word	.LANCHOR1
-	.word	.LANCHOR35
-	.word	.LANCHOR19
-	.word	.LANCHOR20
-	.word	.LANCHOR18
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR41
-	.word	.LANCHOR46
-	.word	.LANCHOR47
-	.word	.LANCHOR43
-	.word	1312902724
-	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
-	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
-	.align	1
-	.global	FlashReadIdbDataRaw
-	.thumb
-	.thumb_func
-	.type	FlashReadIdbDataRaw, %function
-FlashReadIdbDataRaw:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	mov	r8, r0
-	ldr	r1, .L529
-	add	r0, sp, #12
-	bl	memcpy
-	ldr	r3, .L529+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	str	r3, [sp, #4]
-	ldr	r3, .L529+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L529+12
-	cmp	r2, r3
-	bne	.L519
-	movs	r0, #0
-	bl	flash_enter_slc_mode
-.L519:
-	mov	r0, r8
-	movs	r1, #0
-	mov	r2, #2048
-	mov	r7, #-1
-	bl	memset
-	movs	r4, #2
-	ldr	sl, .L529+32
-	ldr	fp, .L529+36
-	ldr	r6, .L529+16
-	b	.L520
-.L527:
-	movs	r5, #0
-.L522:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r5]	@ zero_extendqisi2
-	bl	FlashBchSel
-	ldr	r3, .L529+16
-	movs	r0, #0
-	ldr	r1, [fp, #0]
-	muls	r1, r4, r1
-	ldr	r2, [r3, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L521
-	adds	r5, r5, #1
-	cmp	r5, #4
-	bne	.L522
-	b	.L523
-.L521:
-	ldr	r3, [r6, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L529+20
-	cmp	r2, r3
-	bne	.L523
-	add	r3, sp, #16
-	ldr	r0, .L529+24
-	adds	r5, r3, r5
-	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
-	bl	printf
-	mov	r2, #2048
-	mov	r0, r8
-	ldr	r1, [r6, #0]
-	bl	memcpy
-	ldr	r3, [r6, #0]
-	ldr	r3, [r3, #512]
-	strb	r3, [sl, #0]
-	ldr	r3, .L529+28
-	ldr	r2, [r3, #0]
-	cmp	r2, r4
-	bls	.L526
-	str	r4, [r3, #0]
-	movs	r7, #0
-	bl	FlashSavePhyInfo
-.L523:
-	adds	r4, r4, #1
-.L520:
-	ldrb	r3, [sl, #0]	@ zero_extendqisi2
-	cmp	r4, r3
-	bcc	.L527
-	b	.L524
-.L526:
-	movs	r7, #0
-.L524:
-	ldr	r0, [sp, #4]
-	bl	FlashBchSel
-	ldr	r3, .L529+8
-	ldr	r2, [r3, #0]
-	ldr	r3, .L529+12
-	cmp	r2, r3
-	bne	.L525
-	movs	r0, #0
-	bl	flash_exit_slc_mode
-.L525:
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L530:
-	.align	2
-.L529:
-	.word	.LANCHOR48
-	.word	.LANCHOR29
-	.word	.LANCHOR40
-	.word	1446522928
-	.word	.LANCHOR44
-	.word	-52655045
-	.word	.LC3
-	.word	.LANCHOR46
-	.word	.LANCHOR1
-	.word	.LANCHOR2
-	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
-	.section	.text.FlashLoadPhyInfo,"ax",%progbits
-	.align	1
-	.global	FlashLoadPhyInfo
-	.thumb
-	.thumb_func
-	.type	FlashLoadPhyInfo, %function
-FlashLoadPhyInfo:
-	@ args = 0, pretend = 0, frame = 16
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r2, #4
-	ldr	sl, .L543+40
-	add	r0, sp, #12
-	ldr	r1, .L543
-	movs	r4, #0
-	bl	memcpy
-	ldr	r5, .L543+4
-	ldr	r3, [sl, #0]
-	mov	r0, r4
-	ldr	r6, .L543+8
-	mov	r8, #4
-	mov	r7, #-1
-	str	r3, [r5, #0]
-	ldr	r3, .L543+12
-	ldrh	r2, [r6, #10]
-	str	r4, [r3, #0]
-	str	r2, [sp, #4]
-	bl	flash_enter_slc_mode
-	b	.L532
-.L534:
-	add	r3, sp, #12
-	ldrb	r0, [r3, r6]	@ zero_extendqisi2
-	bl	FlashBchSel
-	movs	r0, #0
-	mov	r1, r4
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L533
-	movs	r0, #0
-	mov	r1, fp
-	ldr	r2, [sl, #0]
-	mov	r3, r0
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	bne	.L533
-	adds	r6, r6, #1
-	cmp	r6, #4
-	beq	.L535
-	b	.L534
-.L533:
-	ldr	r6, [r5, #0]
-	ldr	r2, .L543+16
-	ldr	r3, [r6, #0]
-	cmp	r3, r2
-	bne	.L535
-	cbnz	r7, .L536
-	ldr	r3, .L543+8
-	mov	r0, r4
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L543+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	mov	r0, r7
-	b	.L542
-.L536:
-	add	r0, r6, #12
-	movw	r1, #2036
-	bl	JSHash
-	ldr	r3, [r6, #8]
-	cmp	r3, r0
-	bne	.L535
-	add	r1, r6, #160
-	movs	r2, #32
-	ldr	r0, .L543+8
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	movs	r2, #32
-	ldr	r0, .L543+24
-	adds	r1, r1, #192
-	bl	memcpy
-	ldr	r1, [r5, #0]
-	mov	r2, #852
-	ldr	r0, .L543+28
-	adds	r1, r1, #224
-	bl	memcpy
-	ldr	r6, [r5, #0]
-	ldr	r3, .L543+32
-	mov	r0, r4
-	ldr	r2, [r6, #1076]
-	strb	r2, [r3, #0]
-	ldr	r3, .L543+12
-	str	r4, [r3, #0]
-	ldr	r3, .L543+8
-	ldrh	r1, [r3, #10]
-	bl	__aeabi_uidiv
-	ldr	r3, .L543+20
-	adds	r0, r0, #1
-	str	r0, [r3, #0]
-	cmp	r0, #1
-	bne	.L538
-	movs	r2, #2
-	str	r2, [r3, #0]
-.L538:
-	ldrh	r2, [r6, #14]
-	movs	r7, #0
-	ldr	r3, .L543+36
-	strb	r2, [r3, #0]
-.L535:
-	ldr	r2, [sp, #4]
-	subs	r8, r8, #1
-	add	r4, r4, r2
-	beq	.L539
-.L532:
-	add	fp, r4, #1
-	movs	r6, #0
-	b	.L534
-.L539:
-	mov	r0, r8
-.L542:
-	bl	flash_exit_slc_mode
-	mov	r0, r7
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L544:
-	.align	2
-.L543:
-	.word	.LANCHOR48
-	.word	.LANCHOR43
-	.word	.LANCHOR18
-	.word	.LANCHOR47
-	.word	1312902724
-	.word	.LANCHOR46
-	.word	.LANCHOR6
-	.word	.LANCHOR31
-	.word	.LANCHOR35
-	.word	.LANCHOR49
-	.word	.LANCHOR44
-	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
-	.section	.text.FlashDdrTunningRead,"ax",%progbits
-	.align	1
-	.global	FlashDdrTunningRead
-	.thumb
-	.thumb_func
-	.type	FlashDdrTunningRead, %function
-FlashDdrTunningRead:
-	@ args = 4, pretend = 0, frame = 24
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	ldr	r3, .L565
-	sub	sp, sp, #24
-	mov	fp, r2
-	str	r0, [sp, #8]
-	ldr	r3, [r3, #0]
-	str	r1, [sp, #12]
-	ldr	r3, [r3, #304]
-	str	r3, [sp, #20]
-	ldr	r3, .L565+4
-	ldr	r7, [r3, #0]
-	ldr	r3, [sp, #56]
-	cmp	r7, #7
-	ite	hi
-	movhi	r7, #12
-	movls	r7, #6
-	cbz	r3, .L557
-	movs	r0, #1
-	ldr	r4, .L565+8
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	ldr	r0, [sp, #8]
-	bl	FlashReset
-	ldr	r1, [sp, #12]
-	mov	r2, fp
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	bl	FlashReadRawPage
-	mov	r8, r0
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r4, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	cmp	r8, #-1
-	beq	.L548
-	mov	r2, r8
-	ldr	r0, .L565+12
-	ldr	r1, [sp, #12]
-	bl	printf
-	ldr	r3, .L565+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	cmp	r2, #2048
-	bcc	.L548
-	movs	r2, #0
-	str	r2, [r3, #0]
-	mov	sl, r2
-	mov	fp, r2
-	b	.L547
-.L557:
-	mov	r8, #1024
-.L547:
-	movs	r4, #0
-	mov	r6, #-1
-	mov	ip, r4
-	mov	r5, r4
-	str	r4, [sp, #16]
-.L553:
-	uxtb	r0, r7
-	str	ip, [sp, #4]
-	bl	NandcSetDdrPara
-	mov	r3, sl
-	ldr	r0, [sp, #8]
-	mov	r2, fp
-	ldr	r1, [sp, #12]
-	bl	FlashReadRawPage
-	add	r3, r8, #1
-	ldr	ip, [sp, #4]
-	cmp	r0, r3
-	bhi	.L549
-	cmp	r0, #2
-	bhi	.L559
-	adds	r5, r5, #1
-	cmp	r5, #9
-	bls	.L559
-	subs	r4, r7, r5
-	mov	r8, r0
-	movs	r6, #0
-	b	.L551
-.L549:
-	cmp	ip, r5
-	bcs	.L560
-	cmp	r5, #7
-	rsb	r3, r5, r4
-	str	r3, [sp, #16]
-	bhi	.L552
-	mov	ip, r5
-	b	.L560
-.L559:
-	movs	r6, #0
-	mov	r4, r7
-	mov	r8, r0
-	mov	sl, r6
-	mov	fp, r6
-	b	.L550
-.L560:
-	movs	r5, #0
-.L550:
-	adds	r7, r7, #2
-	cmp	r7, #69
-	bls	.L553
-.L551:
-	cmp	ip, r5
-	bcc	.L554
-.L552:
-	ldr	r4, [sp, #16]
-.L554:
-	cbz	r4, .L555
-	ldr	r0, .L565+20
-	mov	r1, r4
-	bl	printf
-	uxtb	r0, r4
-	bl	NandcSetDdrPara
-.L555:
-	cbz	r6, .L548
-	ldr	r0, .L565+24
-	ldr	r1, [sp, #8]
-	ldr	r2, [sp, #12]
-	bl	printf
-	ldr	r3, [sp, #56]
-	cbz	r3, .L562
-	ldr	r3, [sp, #20]
-	ubfx	r0, r3, #8, #8
-	bl	NandcSetDdrPara
-	b	.L548
-.L562:
-	mov	r8, r6
-.L548:
-	mov	r0, r8
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L566:
-	.align	2
-.L565:
-	.word	.LANCHOR30
-	.word	.LANCHOR37
-	.word	.LANCHOR34
-	.word	.LC4
-	.word	.LANCHOR50
-	.word	.LC5
-	.word	.LC6
-	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
-	.section	.text.FlashDdrParaScan,"ax",%progbits
-	.align	1
-	.global	FlashDdrParaScan
-	.thumb
-	.thumb_func
-	.type	FlashDdrParaScan, %function
-FlashDdrParaScan:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
-	ldr	r5, .L572
-	movs	r4, #0
-	mov	r7, r1
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	FlashSetInterfaceMode
-	ldrb	r0, [r5, #0]	@ zero_extendqisi2
-	bl	NandcSetMode
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r0, r6
-	str	r4, [sp, #0]
-	bl	FlashDdrTunningRead
-	mov	r1, r7
-	mov	r2, r4
-	mov	r3, r4
-	mov	r8, r0
-	mov	r0, r6
-	bl	FlashReadRawPage
-	adds	r0, r0, #1
-	beq	.L568
-	cmp	r8, #-1
-	bne	.L569
-.L568:
-	ldrb	r3, [r5, #0]	@ zero_extendqisi2
-	lsls	r3, r3, #31
-	bpl	.L569
-	movs	r0, #1
-	bl	FlashSetInterfaceMode
-	movs	r0, #1
-	bl	NandcSetMode
-	movs	r2, #0
-	b	.L571
-.L569:
-	movs	r2, #1
-.L571:
-	ldr	r3, .L572+4
-	movs	r0, #0
-	strb	r2, [r3, #0]
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L573:
-	.align	2
-.L572:
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.size	FlashDdrParaScan, .-FlashDdrParaScan
-	.section	.text.FlashReadPage,"ax",%progbits
-	.align	1
-	.global	FlashReadPage
-	.thumb
-	.thumb_func
-	.type	FlashReadPage, %function
-FlashReadPage:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	sl, r3
-	mov	r5, r0
-	mov	r7, r1
-	mov	r8, r2
-	bl	FlashReadRawPage
-	adds	r3, r0, #1
-	mov	r4, r0
-	bne	.L575
-	ldr	r6, .L580
-	ldrb	fp, [r6, #0]	@ zero_extendqisi2
-	cmp	fp, #0
-	beq	.L576
-	movs	r3, #0
-	mov	r0, r5
-	strb	r3, [r6, #0]
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	bl	FlashReadRawPage
-	strb	fp, [r6, #0]
-	adds	r6, r0, #1
-	bne	.L579
-.L576:
-	ldr	r3, .L580+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L575
-	ldr	r3, .L580+8
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, #304]
-	movs	r3, #1
-	str	r3, [sp, #0]
-	mov	r3, sl
-	bl	FlashDdrTunningRead
-	mov	r4, r0
-	adds	r0, r0, #1
-	beq	.L577
-	ldr	r3, .L580+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r4, r3, lsr #1
-	bls	.L575
-.L577:
-	ubfx	r0, r6, #8, #8
-	bl	NandcSetDdrPara
-	b	.L575
-.L579:
-	mov	r4, r0
-.L575:
-	ldr	fp, .L580+24
-	ldr	r6, [fp, #0]
-	cbz	r6, .L578
-	adds	r1, r4, #1
-	bne	.L578
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	mov	r0, r5
-	blx	r6
-	mov	r2, r5
-	mov	r3, r7
-	mov	r4, r0
-	ldr	r0, .L580+16
-	mov	r1, r4
-	bl	printf
-	adds	r2, r4, #1
-	bne	.L578
-	ldr	r3, .L580+20
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L578
-	mov	r0, r5
-	bl	flash_enter_slc_mode
-	ldr	r4, [fp, #0]
-	mov	r0, r5
-	mov	r1, r7
-	mov	r2, r8
-	mov	r3, sl
-	blx	r4
-	mov	r4, r0
-	mov	r0, r5
-	bl	flash_exit_slc_mode
-.L578:
-	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L581:
-	.align	2
-.L580:
-	.word	.LANCHOR4
-	.word	.LANCHOR35
-	.word	.LANCHOR30
-	.word	.LANCHOR29
-	.word	.LC7
-	.word	.LANCHOR7
-	.word	.LANCHOR51
-	.size	FlashReadPage, .-FlashReadPage
-	.section	.text.Ftl_log2,"ax",%progbits
-	.align	1
-	.global	Ftl_log2
-	.thumb
-	.thumb_func
-	.type	Ftl_log2, %function
-Ftl_log2:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r2, #1
-	movs	r3, #0
-	b	.L583
-.L584:
-	adds	r3, r3, #1
-	lsls	r2, r2, #1
-	uxth	r3, r3
-.L583:
-	cmp	r2, r0
-	bls	.L584
-	subs	r3, r3, #1
-	uxth	r0, r3
-	bx	lr
-	.size	Ftl_log2, .-Ftl_log2
-	.section	.text.FtlPrintInfo,"ax",%progbits
-	.align	1
-	.global	FtlPrintInfo
-	.thumb
-	.thumb_func
-	.type	FtlPrintInfo, %function
-FtlPrintInfo:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FtlPrintInfo, .-FtlPrintInfo
-	.section	.text.FtlSysBlkNumInit,"ax",%progbits
-	.align	1
-	.global	FtlSysBlkNumInit
-	.thumb
-	.thumb_func
-	.type	FtlSysBlkNumInit, %function
-FtlSysBlkNumInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L589
-	cmp	r0, #23
-	it	ls
-	movls	r0, #24
-	ldr	r2, .L589+4
-	str	r0, [r3, #0]
-	ldr	r3, .L589+8
-	ldrh	r3, [r3, #0]
-	muls	r3, r0, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L589+12
-	ldrh	r2, [r2, #0]
-	subs	r0, r2, r0
-	ldr	r2, .L589+16
-	strh	r0, [r2, #0]	@ movhi
-	movs	r0, #0
-	ldr	r2, .L589+20
-	ldr	r2, [r2, #0]
-	subs	r3, r2, r3
-	ldr	r2, .L589+24
-	str	r3, [r2, #0]
-	bx	lr
-.L590:
-	.align	2
-.L589:
-	.word	.LANCHOR52
-	.word	.LANCHOR54
-	.word	.LANCHOR53
-	.word	.LANCHOR56
-	.word	.LANCHOR55
-	.word	.LANCHOR58
-	.word	.LANCHOR57
-	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
-	.section	.text.FtlConstantsInit,"ax",%progbits
-	.align	1
-	.global	FtlConstantsInit
-	.thumb
-	.thumb_func
-	.type	FtlConstantsInit, %function
-FtlConstantsInit:
-	@ args = 0, pretend = 0, frame = 32
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrh	r7, [r0, #8]
-	sub	sp, sp, #32
-	ldr	r3, .L607
-	ldrh	r1, [r0, #10]
-	ldrh	r0, [r0, #12]
-	strh	r7, [r3, #0]	@ movhi
-	ldr	r3, .L607+4
-	ldrh	ip, [r4, #14]
-	ldr	r2, .L607+8
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+12
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L607+16
-	strh	ip, [r3, #0]	@ movhi
-	movs	r3, #0
-.L592:
-	strb	r3, [r3, r2]
-	adds	r3, r3, #1
-	cmp	r3, #32
-	bne	.L592
-	ldrh	r2, [r4, #14]
-	ldrh	r3, [r4, #20]
-	cmp	r3, r2, lsr #8
-	bcs	.L593
-	ldr	r3, .L607+8
-	uxtb	sl, r0
-	movs	r2, #0
-	subs	r6, r3, r0
-	str	r6, [sp, #24]
-	subs	r6, r1, #1
-	lsl	r8, sl, #1
-	mla	r6, r0, r6, r3
-	uxtb	r8, r8
-	rsb	r5, r8, #0
-	uxtb	r5, r5
-	str	r6, [sp, #28]
-	b	.L594
-.L595:
-	ldr	r2, [sp, #12]
-	add	fp, r6, r5
-	add	lr, lr, #1
-	strb	fp, [r2, r3]
-	ldr	r2, [sp, #20]
-	add	fp, r6, r2
-	ldr	r2, [sp, #16]
-	strb	fp, [r2, r3]
-	b	.L596
-.L605:
-	ldr	fp, [sp, #24]
-	movs	r3, #0
-	mov	r6, r3
-	mov	lr, r3
-	add	fp, fp, r2
-	str	fp, [sp, #12]
-	ldr	fp, [sp, #28]
-	str	r2, [sp, #4]
-	add	fp, fp, r2
-	str	fp, [sp, #16]
-	add	fp, r5, sl
-	str	fp, [sp, #20]
-.L596:
 	add	r6, r6, r8
 	cmp	lr, r1
 	add	r3, r3, r0
 	uxtb	r6, r6
-	bcc	.L595
+	bcc	.L388
 	ldr	r2, [sp, #4]
 	adds	r5, r5, #1
 	adds	r2, r2, #1
 	uxtb	r5, r5
-.L594:
+.L387:
 	cmp	r2, r0
-	bcc	.L605
-	ldr	r3, .L607+4
+	bcc	.L398
+	ldr	r3, .L400+4
 	lsls	r1, r1, #1
 	lsr	ip, ip, #1
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+16
+	ldr	r3, .L400+16
 	strh	ip, [r3, #0]	@ movhi
-.L593:
-	ldr	r3, .L607+20
+.L386:
+	ldr	r3, .L400+20
 	movs	r2, #5
 	movs	r1, #0
 	cmp	r7, #1
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L607+24
+	ldr	r2, .L400+24
 	it	eq
 	strheq	r7, [r3, #0]	@ movhi
-	ldr	r3, .L607+28
+	ldr	r3, .L400+28
 	strh	r1, [r2, #0]	@ movhi
 	mov	r2, #4352
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L607+32
+	ldr	r2, .L400+32
 	ldrb	r8, [r2, #0]	@ zero_extendqisi2
 	cmp	r8, #0
-	beq	.L598
+	beq	.L391
 	mov	r2, #384
 	strh	r2, [r3, #0]	@ movhi
-.L598:
-	ldr	r3, .L607+4
+.L391:
+	ldr	r3, .L400+4
 	ldrh	r5, [r3, #0]
 	muls	r5, r0, r5
-	ldr	r3, .L607+36
+	ldr	r3, .L400+36
 	uxth	r5, r5
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L607+16
+	ldr	r3, .L400+16
 	ldrh	r6, [r3, #0]
 	muls	r0, r6, r0
-	ldr	r3, .L607+40
+	ldr	r3, .L400+40
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	bl	Ftl_log2
-	ldr	r3, .L607+44
+	ldr	r3, .L400+44
 	ldrh	fp, [r4, #16]
 	ldrh	r1, [r4, #18]
 	ldrh	sl, [r4, #20]
 	mul	r2, fp, r5
 	strh	r0, [r3, #0]	@ movhi
 	mov	r0, sl
-	ldr	r3, .L607+48
+	ldr	r3, .L400+48
 	strh	fp, [r3, #0]	@ movhi
-	ldr	r3, .L607+52
+	ldr	r3, .L400+52
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+56
+	ldr	r3, .L400+56
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L607+60
+	ldr	r3, .L400+60
 	strh	sl, [r3, #0]	@ movhi
 	str	r1, [sp, #8]
 	bl	Ftl_log2
-	ldr	r3, .L607+64
-	ldr	r2, .L607+68
+	ldr	r3, .L400+64
+	ldr	r2, .L400+68
 	ldr	r1, [sp, #8]
 	mul	r1, r1, sl
 	strh	r0, [r3, #0]	@ movhi
@@ -4731,26 +3015,26 @@ FtlConstantsInit:
 	mov	r7, r0
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L607+72
+	ldr	r2, .L400+72
 	lsrs	r3, r3, #8
 	cmp	r6, #1024
 	strh	r3, [r2, #0]	@ movhi
 	ldrh	r2, [r4, #26]
-	ldr	r3, .L607+76
-	ldr	r4, .L607+28
+	ldr	r3, .L400+76
+	ldr	r4, .L400+28
 	strh	r2, [r3, #0]	@ movhi
 	mul	r2, r6, r5
-	ldr	r3, .L607+80
+	ldr	r3, .L400+80
 	ldrh	r0, [r4, #0]
 	str	r2, [r3, #0]
 	it	hi
 	uxtbhi	r2, r6
-	ldr	r3, .L607+24
+	ldr	r3, .L400+24
 	it	hi
 	strhhi	r2, [r3, #0]	@ movhi
 	lsls	r0, r0, #3
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L607+84
+	ldr	r3, .L400+84
 	subs	r2, r6, r2
 	muls	r2, r5, r2
 	mul	r2, sl, r2
@@ -4758,3055 +3042,4815 @@ FtlConstantsInit:
 	asr	r2, fp, #11
 	str	r2, [r3, #0]
 	bl	__aeabi_idiv
-	ldr	r3, .L607+88
+	ldr	r3, .L400+88
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	cmp	r0, #4
-	bhi	.L600
+	bhi	.L393
 	movs	r2, #4
 	strh	r2, [r3, #0]	@ movhi
-.L600:
+.L393:
 	cmp	r8, #0
-	beq	.L601
+	beq	.L394
 	mov	r3, #640
 	strh	r3, [r4, #0]	@ movhi
-.L601:
+.L394:
 	ldrh	r2, [r4, #0]
 	lsls	r6, r6, #6
-	ldr	r3, .L607+92
+	ldr	r3, .L400+92
 	mov	r1, r5
-	ldr	r4, .L607+96
+	ldr	r4, .L400+96
 	asr	r2, r2, r7
 	adds	r7, r7, #9
 	asr	r6, r6, r7
 	adds	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
 	uxth	r6, r6
-	ldr	r3, .L607+100
+	ldr	r3, .L400+100
 	mul	r2, r5, r6
 	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L607+104
+	ldr	r3, .L400+104
 	adds	r6, r6, #8
 	str	r2, [r3, #0]
-	ldr	r3, .L607+88
+	ldr	r3, .L400+88
 	ldrh	r0, [r3, #0]
 	bl	__aeabi_uidiv
 	cmp	r5, #1
 	uxtah	r6, r6, r0
 	str	r6, [r4, #0]
-	bne	.L602
+	bne	.L395
 	adds	r6, r6, #4
 	str	r6, [r4, #0]
-.L602:
+.L395:
 	ldrh	r0, [r4, #0]
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4, #0]
-	ldr	r3, .L607+108
+	ldr	r3, .L400+108
 	str	r2, [r3, #0]
 	movs	r2, #24
-	ldr	r3, .L607+112
+	ldr	r3, .L400+112
 	ldr	r1, [r3, #0]
-	ldr	r3, .L607+48
+	ldr	r3, .L400+48
 	lsls	r1, r1, #2
 	ldrh	r3, [r3, #0]
 	muls	r1, r3, r1
-	ldr	r3, .L607+64
+	ldr	r3, .L400+64
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #9
 	lsr	r1, r1, r3
-	ldr	r3, .L607+116
+	ldr	r3, .L400+116
 	adds	r1, r1, #2
 	uxth	r1, r1
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L607+120
+	ldr	r3, .L400+120
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #0
-	ldr	r3, .L607+124
+	ldr	r3, .L400+124
 	str	r2, [r3, #0]
-	ldr	r2, .L607+88
+	ldr	r2, .L400+88
 	ldrh	r4, [r2, #0]
 	adds	r3, r4, #3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L607+104
+	ldr	r3, .L400+104
 	ldr	r0, [r3, #0]
 	adds	r5, r0, #3
 	str	r5, [r3, #0]
-	ldr	r5, .L607+128
+	ldr	r5, .L400+128
 	ldrb	r5, [r5, #0]	@ zero_extendqisi2
-	cbz	r5, .L603
+	cbz	r5, .L396
 	adds	r4, r4, #4
 	adds	r0, r0, #5
 	strh	r4, [r2, #0]	@ movhi
 	str	r0, [r3, #0]
-.L603:
-	ldr	r3, .L607+132
+.L396:
+	ldr	r3, .L400+132
 	movs	r2, #0
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L607+136
+	ldr	r2, .L400+136
 	ldrh	r2, [r2, #0]
 	lsrs	r0, r2, #3
 	add	r2, r0, r2, lsl #1
 	adds	r2, r2, #52
 	add	r1, r2, r1, lsl #2
-	ldr	r2, .L607+60
+	ldr	r2, .L400+60
 	ldrh	r2, [r2, #0]
 	cmp	r1, r2, lsl #9
-	bcs	.L604
+	bcs	.L397
 	movs	r2, #1
 	strh	r2, [r3, #0]	@ movhi
-.L604:
+.L397:
 	movs	r0, #0
 	add	sp, sp, #32
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L608:
+.L401:
+	.align	2
+.L400:
+	.word	.LANCHOR47
+	.word	.LANCHOR48
+	.word	.LANCHOR50
+	.word	.LANCHOR49
+	.word	.LANCHOR44
+	.word	.LANCHOR51
+	.word	.LANCHOR52
+	.word	.LANCHOR53
+	.word	.LANCHOR0
+	.word	.LANCHOR41
+	.word	.LANCHOR54
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.word	.LANCHOR57
+	.word	.LANCHOR58
+	.word	.LANCHOR59
+	.word	.LANCHOR60
+	.word	.LANCHOR61
+	.word	.LANCHOR62
+	.word	.LANCHOR63
+	.word	.LANCHOR46
+	.word	.LANCHOR64
+	.word	.LANCHOR65
+	.word	.LANCHOR66
+	.word	.LANCHOR40
+	.word	.LANCHOR67
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR45
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR7
+	.word	.LANCHOR73
+	.word	.LANCHOR43
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.align	1
+	.global	IsBlkInVendorPart
+	.thumb
+	.thumb_func
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L409
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L407
+	ldr	r3, .L409+4
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L409+8
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L404
+.L406:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L408
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L404:
+	cmp	r3, r1
+	bne	.L406
+	movs	r0, #0
+	pop	{r4, pc}
+.L408:
+	movs	r0, #1
+	pop	{r4, pc}
+.L407:
+	mov	r0, r3
+	pop	{r4, pc}
+.L410:
+	.align	2
+.L409:
+	.word	.LANCHOR74
+	.word	.LANCHOR65
+	.word	.LANCHOR75
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlGetCap,"ax",%progbits
+	.align	1
+	.global	FtlGetCap
+	.thumb
+	.thumb_func
+	.type	FtlGetCap, %function
+FtlGetCap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L412
+	ldr	r0, [r3, #0]
+	bx	lr
+.L413:
+	.align	2
+.L412:
+	.word	.LANCHOR72
+	.size	FtlGetCap, .-FtlGetCap
+	.section	.text.FtlGetCapacity,"ax",%progbits
+	.align	1
+	.global	FtlGetCapacity
+	.thumb
+	.thumb_func
+	.type	FtlGetCapacity, %function
+FtlGetCapacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L415
+	ldr	r0, [r3, #0]
+	bx	lr
+.L416:
+	.align	2
+.L415:
+	.word	.LANCHOR72
+	.size	FtlGetCapacity, .-FtlGetCapacity
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.thumb
+	.thumb_func
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L418
+	ldr	r0, [r3, #0]
+	bx	lr
+.L419:
+	.align	2
+.L418:
+	.word	.LANCHOR72
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.FtlGetLpn,"ax",%progbits
+	.align	1
+	.global	FtlGetLpn
+	.thumb
+	.thumb_func
+	.type	FtlGetLpn, %function
+FtlGetLpn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L421
+	ldr	r0, [r3, #0]
+	bx	lr
+.L422:
+	.align	2
+.L421:
+	.word	.LANCHOR76
+	.size	FtlGetLpn, .-FtlGetLpn
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlGetCurEraseBlock
+	.thumb
+	.thumb_func
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L424
+	ldr	r3, .L424+4
+	ldr	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L425:
+	.align	2
+.L424:
+	.word	.LANCHOR77
+	.word	.LANCHOR41
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.align	1
+	.global	FtlGetAllBlockNum
+	.thumb
+	.thumb_func
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L427
+	ldr	r3, .L427+4
+	ldrh	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L428:
+	.align	2
+.L427:
+	.word	.LANCHOR41
+	.word	.LANCHOR44
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmMapBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L430
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldrh	r4, [r3, #0]
+	movs	r7, #1
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	uxth	r2, r0
+	mls	r3, r4, r2, r5
+	ldr	r4, .L430+4
+	add	r1, r4, r2, lsl #2
+	ldr	r0, [r1, #28]
+	uxth	r3, r3
+	and	r1, r3, #31
+	lsrs	r6, r3, #5
+	lsl	r1, r7, r1
+	ldr	r7, [r0, r6, lsl #2]
+	orrs	r1, r1, r7
+	str	r1, [r0, r6, lsl #2]
+	str	r1, [sp, #0]
+	mov	r1, r5
+	ldr	r0, .L430+8
+	bl	printf
+	ldrh	r3, [r4, #6]
+	movs	r0, #0
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L431:
+	.align	2
+.L430:
+	.word	.LANCHOR54
+	.word	.LANCHOR78
+	.word	.LC2
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.global	__aeabi_uidivmod
+	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmIsBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L433
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r5, [r3, #0]
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+	mov	r0, r6
+	uxth	r4, r1
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L433+4
+	lsrs	r2, r4, #5
+	and	r4, r4, #31
+	uxth	r0, r0
+	add	r0, r3, r0, lsl #2
+	ldr	r3, [r0, #28]
+	ldr	r0, [r3, r2, lsl #2]
+	lsr	r0, r0, r4
+	and	r0, r0, #1
+	pop	{r4, r5, r6, pc}
+.L434:
 	.align	2
-.L607:
-	.word	.LANCHOR59
-	.word	.LANCHOR60
-	.word	.LANCHOR62
-	.word	.LANCHOR61
-	.word	.LANCHOR56
-	.word	.LANCHOR63
-	.word	.LANCHOR64
-	.word	.LANCHOR65
-	.word	.LANCHOR0
-	.word	.LANCHOR53
-	.word	.LANCHOR66
-	.word	.LANCHOR67
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR70
-	.word	.LANCHOR71
-	.word	.LANCHOR72
-	.word	.LANCHOR73
-	.word	.LANCHOR74
-	.word	.LANCHOR75
-	.word	.LANCHOR58
-	.word	.LANCHOR76
-	.word	.LANCHOR77
+.L433:
+	.word	.LANCHOR54
 	.word	.LANCHOR78
-	.word	.LANCHOR52
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+	.align	1
+	.global	FtlBbtInfoPrint
+	.thumb
+	.thumb_func
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.thumb
+	.thumb_func
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L441
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldrh	r2, [r3, #0]
+	mov	r0, r1
+	mov	r5, r1
+	movs	r1, #0
+	ldr	r7, .L441+4
+	movs	r4, #0
+	lsls	r2, r2, #2
+	movw	r8, #65535
+	bl	memset
+.L439:
+	ldrh	r3, [r6, r4]
+	cmp	r3, r8
+	beq	.L436
+	ldrh	r2, [r7, #0]
+	cmp	r2, r3
+	bhi	.L438
+	ldr	r1, .L441+8
+	movs	r2, #79
+	ldr	r0, .L441+12
+	bl	printf
+	ldr	r0, .L441+16
+	ldr	r1, .L441+20
+	bl	printf
+.L438:
+	ldrh	r2, [r6, r4]
+	movs	r1, #1
+	adds	r4, r4, #2
+	lsrs	r3, r2, #5
+	and	r2, r2, #31
+	lsl	r2, r1, r2
+	cmp	r4, #1024
+	ldr	r1, [r5, r3, lsl #2]
+	orr	r2, r1, r2
+	str	r2, [r5, r3, lsl #2]
+	bne	.L439
+.L436:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L442:
+	.align	2
+.L441:
 	.word	.LANCHOR79
+	.word	.LANCHOR54
 	.word	.LANCHOR80
-	.word	.LANCHOR81
-	.word	.LANCHOR57
-	.word	.LANCHOR82
-	.word	.LANCHOR83
-	.word	.LANCHOR84
-	.word	.LANCHOR7
-	.word	.LANCHOR85
-	.word	.LANCHOR55
-	.size	FtlConstantsInit, .-FtlConstantsInit
-	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
 	.align	1
-	.global	IsBlkInVendorPart
+	.global	FtlBbtMemInit
 	.thumb
 	.thumb_func
-	.type	IsBlkInVendorPart, %function
-IsBlkInVendorPart:
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L616
-	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L614
-	ldr	r3, .L616+4
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L616+8
-	ldr	r2, [r3, #0]
+	@ link register save eliminated.
+	ldr	r0, .L444
+	movw	r3, #65535
+	movs	r1, #255
+	movs	r2, #16
+	strh	r3, [r0, #0]	@ movhi
 	movs	r3, #0
-	b	.L611
-.L613:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L615
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L611:
-	cmp	r3, r1
-	bne	.L613
-	movs	r0, #0
-	pop	{r4, pc}
-.L615:
-	movs	r0, #1
-	pop	{r4, pc}
-.L614:
-	mov	r0, r3
-	pop	{r4, pc}
-.L617:
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	memset
+.L445:
 	.align	2
-.L616:
-	.word	.LANCHOR86
-	.word	.LANCHOR77
-	.word	.LANCHOR87
-	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
-	.section	.text.FtlGetCap,"ax",%progbits
+.L444:
+	.word	.LANCHOR78
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.V2P_block,"ax",%progbits
 	.align	1
-	.global	FtlGetCap
+	.global	V2P_block
 	.thumb
 	.thumb_func
-	.type	FtlGetCap, %function
-FtlGetCap:
+	.type	V2P_block, %function
+V2P_block:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L619
-	ldr	r0, [r3, #0]
-	bx	lr
-.L620:
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r1
+	ldr	r3, .L447
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	muls	r7, r4, r7
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L447+4
+	mov	r1, r4
+	ldrh	r5, [r3, #0]
+	mla	r5, r0, r5, r7
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L448:
 	.align	2
-.L619:
-	.word	.LANCHOR84
-	.size	FtlGetCap, .-FtlGetCap
-	.section	.text.FtlGetCapacity,"ax",%progbits
+.L447:
+	.word	.LANCHOR49
+	.word	.LANCHOR54
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",%progbits
 	.align	1
-	.global	FtlGetCapacity
+	.global	P2V_plane
 	.thumb
 	.thumb_func
-	.type	FtlGetCapacity, %function
-FtlGetCapacity:
+	.type	P2V_plane, %function
+P2V_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L450
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	ldr	r3, .L450+4
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mul	r5, r0, r4
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r4, r5, r6, pc}
+.L451:
+	.align	2
+.L450:
+	.word	.LANCHOR49
+	.word	.LANCHOR54
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",%progbits
+	.align	1
+	.global	P2V_block_in_plane
+	.thumb
+	.thumb_func
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L453
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidivmod
+	ldr	r3, .L453+4
+	uxth	r0, r1
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	pop	{r3, pc}
+.L454:
+	.align	2
+.L453:
+	.word	.LANCHOR54
+	.word	.LANCHOR49
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+	.align	1
+	.global	ftl_cmp_data_ver
+	.thumb
+	.thumb_func
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L622
-	ldr	r0, [r3, #0]
+	cmp	r0, r1
+	bls	.L456
+	subs	r0, r0, r1
+	cmp	r0, #-2147483648
+	ite	hi
+	movhi	r0, #0
+	movls	r0, #1
 	bx	lr
-.L623:
-	.align	2
-.L622:
-	.word	.LANCHOR84
-	.size	FtlGetCapacity, .-FtlGetCapacity
-	.section	.text.ftl_get_density,"ax",%progbits
+.L456:
+	subs	r0, r1, r0
+	cmp	r0, #-2147483648
+	ite	ls
+	movls	r0, #0
+	movhi	r0, #1
+	bx	lr
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
 	.align	1
-	.global	ftl_get_density
+	.global	FtlFreeSysBlkQueueInit
 	.thumb
 	.thumb_func
-	.type	ftl_get_density, %function
-ftl_get_density:
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L625
-	ldr	r0, [r3, #0]
-	bx	lr
-.L626:
+	ldr	r3, .L459
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	memset
+	mov	r0, r4
+	pop	{r4, pc}
+.L460:
 	.align	2
-.L625:
-	.word	.LANCHOR84
-	.size	ftl_get_density, .-ftl_get_density
-	.section	.text.FtlGetLpn,"ax",%progbits
+.L459:
+	.word	.LANCHOR81
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
-	.global	FtlGetLpn
+	.global	FtlFreeSysBlkQueueEmpty
 	.thumb
 	.thumb_func
-	.type	FtlGetLpn, %function
-FtlGetLpn:
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L628
-	ldr	r0, [r3, #0]
+	ldr	r3, .L462
+	ldrh	r0, [r3, #6]
+	rsbs	r0, r0, #1
+	it	cc
+	movcc	r0, #0
 	bx	lr
-.L629:
+.L463:
 	.align	2
-.L628:
-	.word	.LANCHOR88
-	.size	FtlGetLpn, .-FtlGetLpn
-	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+.L462:
+	.word	.LANCHOR81
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
-	.global	FtlGetCurEraseBlock
+	.global	FtlFreeSysBlkQueueFull
 	.thumb
 	.thumb_func
-	.type	FtlGetCurEraseBlock, %function
-FtlGetCurEraseBlock:
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L631
-	ldr	r3, .L631+4
-	ldr	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
-	muls	r0, r3, r0
+	ldr	r3, .L465
+	ldrh	r0, [r3, #6]
+	sub	r1, r0, #1024
+	rsbs	r0, r1, #0
+	adc	r0, r0, r1
 	bx	lr
-.L632:
+.L466:
 	.align	2
-.L631:
-	.word	.LANCHOR89
-	.word	.LANCHOR53
-	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
-	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+.L465:
+	.word	.LANCHOR81
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
-	.global	FtlGetAllBlockNum
+	.global	FtlFreeSysBlkQueueIn
 	.thumb
 	.thumb_func
-	.type	FtlGetAllBlockNum, %function
-FtlGetAllBlockNum:
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r2, .L634
-	ldr	r3, .L634+4
-	ldrh	r0, [r2, #0]
-	ldrh	r3, [r3, #0]
-	muls	r0, r3, r0
-	bx	lr
-.L635:
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L470
+	ldrh	r3, [r3, #6]
+	cmp	r3, #1024
+	beq	.L467
+	cbz	r1, .L469
+	ldr	r3, .L470+4
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L469
+	bl	P2V_block_in_plane
+	ldr	r3, .L470+8
+	movs	r1, #1
+	mov	r2, r1
+	mov	r5, r0
+	ldr	r0, [r3, #0]
+	lsls	r3, r4, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L470+12
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L470+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+.L469:
+	ldr	r3, .L470
+	ldrh	r2, [r3, #6]
+	adds	r2, r2, #1
+	strh	r2, [r3, #6]	@ movhi
+	ldrh	r2, [r3, #4]
+	adds	r1, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #4]	@ movhi
+	strh	r4, [r3, r1, lsl #1]	@ movhi
+.L467:
+	pop	{r3, r4, r5, pc}
+.L471:
 	.align	2
-.L634:
-	.word	.LANCHOR53
-	.word	.LANCHOR56
-	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
-	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+.L470:
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
-	.global	FtlBbmMapBadBlock
+	.global	FtlFreeSysBLkSort
 	.thumb
 	.thumb_func
-	.type	FtlBbmMapBadBlock, %function
-FtlBbmMapBadBlock:
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L637
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r5, r0
-	ldrh	r4, [r3, #0]
-	movs	r7, #1
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	uxth	r2, r0
-	mls	r3, r4, r2, r5
-	ldr	r4, .L637+4
-	add	r1, r4, r2, lsl #2
-	ldr	r0, [r1, #28]
-	uxth	r3, r3
-	and	r1, r3, #31
-	lsrs	r6, r3, #5
-	lsl	r1, r7, r1
-	ldr	r7, [r0, r6, lsl #2]
-	orrs	r1, r1, r7
-	str	r1, [r0, r6, lsl #2]
-	str	r1, [sp, #0]
-	mov	r1, r5
-	ldr	r0, .L637+8
-	bl	printf
-	ldrh	r3, [r4, #6]
-	movs	r0, #0
-	adds	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L638:
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	ldr	r5, .L482
+	ldr	r7, .L482+4
+	ldr	r6, .L482+8
+	b	.L473
+.L474:
+	add	r8, r4, r8
+	add	r8, r8, #4
+	ldrh	r0, [r5, r8, lsl #1]
+	bl	P2V_block_in_plane
+	ldr	r2, [r6, #0]
+	ldr	r3, [r7, #0]
+	ldrh	r2, [r2, r0, lsl #1]
+	str	r2, [r3, r4, lsl #2]
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L473:
+	ldrh	ip, [r5, #6]
+	ldrh	r8, [r5, #2]
+	cmp	r4, ip
+	bcc	.L474
+	ldr	r3, .L482+4
+	add	r6, ip, #-1
+	ldr	r4, .L482
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	b	.L475
+.L480:
+	adds	r5, r3, #1
+	mov	r2, r3
+	uxth	r5, r5
+	mov	r0, r5
+	b	.L476
+.L478:
+	ldr	r7, [r1, r0, lsl #2]
+	ldr	sl, [r1, r2, lsl #2]
+	cmp	sl, r7
+	it	hi
+	movhi	r2, r0
+	adds	r0, r0, #1
+	uxth	r0, r0
+.L476:
+	cmp	r0, ip
+	bcc	.L478
+	cmp	r3, r2
+	beq	.L479
+	ldr	r0, [r1, r2, lsl #2]
+	ldr	r7, [r1, r3, lsl #2]
+	str	r7, [r1, r2, lsl #2]
+	add	r2, r8, r2
+	str	r0, [r1, r3, lsl #2]
+	add	r3, r8, r3
+	adds	r2, r2, #4
+	adds	r3, r3, #4
+	ldrh	r0, [r4, r2, lsl #1]
+	ldrh	r7, [r4, r3, lsl #1]
+	strh	r7, [r4, r2, lsl #1]	@ movhi
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+.L479:
+	mov	r3, r5
+.L475:
+	cmp	r3, r6
+	blt	.L480
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L483:
 	.align	2
-.L637:
-	.word	.LANCHOR66
-	.word	.LANCHOR90
-	.word	.LC8
-	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
-	.global	__aeabi_uidivmod
-	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+.L482:
+	.word	.LANCHOR81
+	.word	.LANCHOR86
+	.word	.LANCHOR84
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
-	.global	FtlBbmIsBadBlock
+	.global	remove_from_free_sys_Queue
 	.thumb
 	.thumb_func
-	.type	FtlBbmIsBadBlock, %function
-FtlBbmIsBadBlock:
+	.type	remove_from_free_sys_Queue, %function
+remove_from_free_sys_Queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L640
+	ldr	r3, .L490
+	mov	r1, r0
 	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	ldrh	r5, [r3, #0]
-	mov	r1, r5
-	bl	__aeabi_uidivmod
-	mov	r0, r6
-	uxth	r4, r1
-	mov	r1, r5
-	bl	__aeabi_uidiv
-	ldr	r3, .L640+4
-	lsrs	r2, r4, #5
-	and	r4, r4, #31
-	uxth	r0, r0
-	add	r0, r3, r0, lsl #2
-	ldr	r3, [r0, #28]
-	ldr	r0, [r3, r2, lsl #2]
-	lsr	r0, r0, r4
-	and	r0, r0, #1
+	ldrh	r0, [r3, #6]
+	cbz	r0, .L485
+	ldrh	r2, [r3, #2]
+	movs	r5, #0
+	b	.L486
+.L488:
+	adds	r6, r5, r2
+	ldr	r4, .L490
+	lsls	r6, r6, #22
+	add	r6, r3, r6, lsr #21
+	ldrh	r6, [r6, #8]
+	cmp	r6, r1
+	bne	.L487
+	ldr	r0, .L490+4
+	bl	printf
+	ldrh	r3, [r4, #2]
+	movs	r0, #1
+	adds	r5, r5, r3
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	lsls	r5, r5, #22
+	ldrh	r2, [r4, r2, lsl #1]
+	bic	r3, r3, #64512
+	strh	r3, [r4, #2]	@ movhi
+	add	r5, r4, r5, lsr #21
+	ldrh	r3, [r4, #6]
+	strh	r2, [r5, #8]	@ movhi
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
 	pop	{r4, r5, r6, pc}
-.L641:
+.L487:
+	adds	r5, r5, #1
+.L486:
+	cmp	r5, r0
+	bcc	.L488
+	movs	r0, #0
+.L485:
+	pop	{r4, r5, r6, pc}
+.L491:
 	.align	2
-.L640:
-	.word	.LANCHOR66
-	.word	.LANCHOR90
-	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
-	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+.L490:
+	.word	.LANCHOR81
+	.word	.LC6
+	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
-	.global	FtlBbtInfoPrint
+	.global	FtlFreeSysBlkQueueOut
 	.thumb
 	.thumb_func
-	.type	FtlBbtInfoPrint, %function
-FtlBbtInfoPrint:
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	bx	lr
-	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
-	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L496
+	ldrh	r1, [r3, #6]
+	cmp	r1, #0
+	beq	.L495
+	ldrh	r2, [r3, #2]
+	subs	r1, r1, #1
+	strh	r1, [r3, #6]	@ movhi
+	adds	r0, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #2]	@ movhi
+	ldrh	r4, [r3, r0, lsl #1]
+	ldr	r3, .L496+4
+	ldr	r7, [r3, #0]
+	cbnz	r7, .L493
+	mov	r0, r4
+	ldr	r6, .L496+8
+	bl	P2V_block_in_plane
+	lsls	r3, r4, #10
+	mov	r5, r0
+	ldr	r0, [r6, #0]
+	str	r3, [r0, #4]
+	ldr	r3, .L496+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L494
+	mov	r1, r7
+	movs	r2, #1
+	bl	FlashEraseBlocks
+.L494:
+	movs	r1, #1
+	ldr	r0, [r6, #0]
+	mov	r2, r1
+	bl	FlashEraseBlocks
+	ldr	r3, .L496+16
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L496+20
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	b	.L493
+.L495:
+	movw	r4, #65535
+.L493:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L497:
+	.align	2
+.L496:
+	.word	.LANCHOR81
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR7
+	.word	.LANCHOR84
+	.word	.LANCHOR85
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
-	.global	FtlBbt2Bitmap
+	.global	insert_data_list
 	.thumb
 	.thumb_func
-	.type	FtlBbt2Bitmap, %function
-FtlBbt2Bitmap:
-	@ args = 0, pretend = 0, frame = 0
+	.type	insert_data_list, %function
+insert_data_list:
+	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L648
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r6, r0
+	ldr	r3, .L514
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrh	fp, [r3, #0]
+	cmp	r0, fp
+	bcs	.L499
+	ldr	r3, .L514+4
+	movs	r6, #6
+	muls	r6, r0, r6
+	ldr	r1, [r3, #0]
+	movw	r3, #65535
+	adds	r2, r1, r6
+	strh	r3, [r1, r6]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L514+8
+	ldr	r5, [r3, #0]
+	cmp	r5, #0
+	beq	.L513
+.L500:
+	ldr	r3, .L514+12
+	ldrh	r4, [r2, #4]
+	ldr	ip, [r3, #0]
+	lsls	r3, r0, #1
+	ldrh	r7, [ip, r0, lsl #1]
+	cbz	r4, .L509
+	muls	r4, r7, r4
+	b	.L512
+.L509:
+	mov	r4, #-1
+.L512:
+	str	r4, [sp, #8]
+	subs	r4, r5, r1
+	ldr	r7, .L514+16
+	mov	sl, r2
+	asrs	r4, r4, #1
+	muls	r4, r7, r4
+	ldr	r7, .L514+20
+	uxth	r4, r4
+	str	ip, [sp, #4]
+	ldr	r7, [r7, #0]
+	adds	r3, r7, r3
+	str	r3, [sp, #20]
+	str	r7, [sp, #12]
+	mov	r3, r5
+	movs	r7, #0
+.L507:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, fp
+	bhi	.L499
+	cmp	r0, r4
+	beq	.L499
+	ldr	r2, [sp, #4]
+	lsl	r8, r4, #1
+	str	r8, [sp, #16]
+	ldrh	r8, [r2, r4, lsl #1]
+	ldrh	r2, [r3, #4]
+	cbz	r2, .L510
+	mul	r2, r2, r8
+	b	.L502
+.L510:
+	mov	r2, #-1
+.L502:
+	ldr	r8, [sp, #8]
+	cmp	r2, r8
+	bne	.L503
+	ldr	r2, [sp, #12]
+	ldr	ip, [sp, #16]
+	ldrh	r8, [r2, ip]
+	ldr	r2, [sp, #20]
+	ldrh	ip, [r2, #0]
+	cmp	r8, ip
+	bcc	.L505
+	b	.L511
+.L503:
+	bhi	.L511
+.L505:
 	ldrh	r2, [r3, #0]
-	mov	r0, r1
-	mov	r5, r1
-	movs	r1, #0
-	ldr	r7, .L648+4
-	movs	r4, #0
-	lsls	r2, r2, #2
 	movw	r8, #65535
-	bl	memset
-.L646:
-	ldrh	r3, [r6, r4]
-	cmp	r3, r8
-	beq	.L643
-	ldrh	r2, [r7, #0]
-	cmp	r2, r3
-	bhi	.L645
-	ldr	r1, .L648+8
-	movs	r2, #79
-	ldr	r0, .L648+12
-	bl	printf
-	ldr	r0, .L648+16
-	ldr	r1, .L648+20
-	bl	printf
-.L645:
-	ldrh	r2, [r6, r4]
-	movs	r1, #1
-	adds	r4, r4, #2
-	lsrs	r3, r2, #5
-	and	r2, r2, #31
-	lsl	r2, r1, r2
-	cmp	r4, #1024
-	ldr	r1, [r5, r3, lsl #2]
-	orr	r2, r1, r2
-	str	r2, [r5, r3, lsl #2]
-	bne	.L646
-.L643:
-	pop	{r4, r5, r6, r7, r8, pc}
-.L649:
+	cmp	r2, r8
+	bne	.L506
+	mov	r2, sl
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L514+24
+	strh	r4, [r2, #2]	@ movhi
+	b	.L513
+.L506:
+	mov	ip, #6
+	mov	r4, r2
+	mla	r3, ip, r2, r1
+	b	.L507
+.L511:
+	strh	r4, [r1, r6]	@ movhi
+	mov	r2, sl
+	ldrh	r4, [r3, #2]
+	cmp	r3, r5
+	strh	r4, [r2, #2]	@ movhi
+	bne	.L508
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L514+8
+.L513:
+	str	r2, [r3, #0]
+	b	.L499
+.L508:
+	ldrh	r2, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r2, r4, r2
+	strh	r0, [r1, r2]	@ movhi
+.L499:
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L515:
 	.align	2
-.L648:
-	.word	.LANCHOR91
-	.word	.LANCHOR66
-	.word	.LANCHOR92
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
-	.section	.text.FtlBbtMemInit,"ax",%progbits
+.L514:
+	.word	.LANCHOR43
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	-1431655765
+	.word	.LANCHOR84
+	.word	.LANCHOR90
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
-	.global	FtlBbtMemInit
+	.global	INSERT_DATA_LIST
 	.thumb
 	.thumb_func
-	.type	FtlBbtMemInit, %function
-FtlBbtMemInit:
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r0, .L651
-	movw	r3, #65535
-	movs	r1, #255
-	movs	r2, #16
-	strh	r3, [r0, #0]	@ movhi
-	movs	r3, #0
-	strh	r3, [r0, #6]	@ movhi
-	adds	r0, r0, #12
-	b	memset
-.L652:
+	push	{r3, lr}
+	bl	insert_data_list
+	ldr	r2, .L518
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L518+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L516
+	ldr	r1, .L518+8
+	movs	r2, #205
+	ldr	r0, .L518+12
+	bl	printf
+	ldr	r0, .L518+16
+	ldr	r1, .L518+20
+	pop	{r3, lr}
+	b	printf
+.L516:
+	pop	{r3, pc}
+.L519:
 	.align	2
-.L651:
-	.word	.LANCHOR90
-	.size	FtlBbtMemInit, .-FtlBbtMemInit
-	.section	.text.V2P_block,"ax",%progbits
+.L518:
+	.word	.LANCHOR91
+	.word	.LANCHOR43
+	.word	.LANCHOR92
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",%progbits
 	.align	1
-	.global	V2P_block
+	.global	insert_free_list
 	.thumb
 	.thumb_func
-	.type	V2P_block, %function
-V2P_block:
+	.type	insert_free_list, %function
+insert_free_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r7, r1
-	ldr	r3, .L654
-	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	muls	r7, r4, r7
-	mov	r1, r4
-	bl	__aeabi_uidiv
-	ldr	r3, .L654+4
-	mov	r1, r4
-	ldrh	r5, [r3, #0]
-	mla	r5, r0, r5, r7
-	mov	r0, r6
-	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
-	uxth	r0, r1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L655:
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movw	r8, #65535
+	cmp	r0, r8
+	beq	.L521
+	ldr	r3, .L528
+	mov	fp, #6
+	mul	r6, fp, r0
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+4
+	adds	r1, r2, r6
+	ldr	r4, [r3, #0]
+	strh	r8, [r1, #2]	@ movhi
+	strh	r8, [r2, r6]	@ movhi
+	cbz	r4, .L527
+.L522:
+	ldr	r3, .L528+8
+	subs	r5, r4, r2
+	asrs	r5, r5, #1
+	ldr	ip, [r3, #0]
+	ldr	r3, .L528+12
+	muls	r5, r3, r5
+	mov	r3, r4
+	uxth	r5, r5
+	ldrh	sl, [ip, r0, lsl #1]
+.L525:
+	ldrh	r7, [ip, r5, lsl #1]
+	cmp	r7, sl
+	bcs	.L523
+	ldrh	r7, [r3, #0]
+	cmp	r7, r8
+	bne	.L524
+	strh	r5, [r1, #2]	@ movhi
+	strh	r0, [r3, #0]	@ movhi
+	b	.L521
+.L524:
+	mla	r3, fp, r7, r2
+	mov	r5, r7
+	b	.L525
+.L523:
+	ldrh	r7, [r3, #2]
+	cmp	r3, r4
+	strh	r5, [r2, r6]	@ movhi
+	strh	r7, [r1, #2]	@ movhi
+	bne	.L526
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L528+4
+.L527:
+	str	r1, [r3, #0]
+	b	.L521
+.L526:
+	ldrh	r1, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r1, r4, r1
+	strh	r0, [r2, r1]	@ movhi
+.L521:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L529:
 	.align	2
-.L654:
-	.word	.LANCHOR61
-	.word	.LANCHOR66
-	.size	V2P_block, .-V2P_block
-	.section	.text.P2V_plane,"ax",%progbits
+.L528:
+	.word	.LANCHOR87
+	.word	.LANCHOR93
+	.word	.LANCHOR84
+	.word	-1431655765
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",%progbits
 	.align	1
-	.global	P2V_plane
+	.global	INSERT_FREE_LIST
 	.thumb
 	.thumb_func
-	.type	P2V_plane, %function
-P2V_plane:
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L657
-	push	{r4, r5, r6, lr}
-	mov	r6, r0
-	ldrh	r4, [r3, #0]
-	ldr	r3, .L657+4
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	mov	r1, r4
-	mul	r5, r0, r4
-	mov	r0, r6
-	bl	__aeabi_uidivmod
-	adds	r1, r5, r1
-	uxth	r0, r1
-	pop	{r4, r5, r6, pc}
-.L658:
+	push	{r3, lr}
+	bl	insert_free_list
+	ldr	r2, .L532
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L532+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L530
+	ldr	r1, .L532+8
+	movs	r2, #198
+	ldr	r0, .L532+12
+	bl	printf
+	ldr	r0, .L532+16
+	ldr	r1, .L532+20
+	pop	{r3, lr}
+	b	printf
+.L530:
+	pop	{r3, pc}
+.L533:
 	.align	2
-.L657:
-	.word	.LANCHOR61
-	.word	.LANCHOR66
-	.size	P2V_plane, .-P2V_plane
-	.section	.text.P2V_block_in_plane,"ax",%progbits
+.L532:
+	.word	.LANCHOR94
+	.word	.LANCHOR43
+	.word	.LANCHOR95
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",%progbits
 	.align	1
-	.global	P2V_block_in_plane
+	.global	List_remove_node
 	.thumb
 	.thumb_func
-	.type	P2V_block_in_plane, %function
-P2V_block_in_plane:
+	.type	List_remove_node, %function
+List_remove_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L660
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidivmod
-	ldr	r3, .L660+4
-	uxth	r0, r1
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	uxth	r0, r0
-	pop	{r3, pc}
-.L661:
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #6
+	muls	r6, r1, r6
+	ldr	r3, .L540
+	mov	r5, r0
+	ldr	r7, [r3, #0]
+	movw	r3, #65535
+	adds	r4, r7, r6
+	ldrh	r2, [r4, #2]
+	cmp	r2, r3
+	bne	.L535
+	ldr	r3, [r0, #0]
+	cmp	r4, r3
+	beq	.L535
+	ldr	r1, .L540+4
+	movw	r2, #363
+	ldr	r0, .L540+8
+	bl	printf
+	ldr	r0, .L540+12
+	ldr	r1, .L540+16
+	bl	printf
+.L535:
+	ldr	r3, [r5, #0]
+	movw	r2, #65535
+	cmp	r4, r3
+	ldrh	r3, [r7, r6]
+	bne	.L536
+	cmp	r3, r2
+	bne	.L537
+	movs	r3, #0
+	str	r3, [r5, #0]
+	b	.L538
+.L537:
+	ldr	r1, .L540
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r3, r0, r3, r1
+	str	r3, [r5, #0]
+	strh	r2, [r3, #2]	@ movhi
+	b	.L538
+.L536:
+	cmp	r3, r2
+	ldrh	r2, [r4, #2]
+	bne	.L539
+	cmp	r2, r3
+	beq	.L538
+	ldr	r1, .L540
+	movs	r0, #6
+	muls	r2, r0, r2
+	ldr	r1, [r1, #0]
+	strh	r3, [r1, r2]	@ movhi
+	b	.L538
+.L539:
+	ldr	r1, .L540
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r5, r0, r3, r1
+	strh	r2, [r5, #2]	@ movhi
+	ldrh	r2, [r4, #2]
+	muls	r0, r2, r0
+	strh	r3, [r1, r0]	@ movhi
+.L538:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L541:
 	.align	2
-.L660:
-	.word	.LANCHOR66
-	.word	.LANCHOR61
-	.size	P2V_block_in_plane, .-P2V_block_in_plane
-	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+.L540:
+	.word	.LANCHOR87
+	.word	.LANCHOR96
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",%progbits
 	.align	1
-	.global	ftl_cmp_data_ver
+	.global	List_pop_index_node
 	.thumb
 	.thumb_func
-	.type	ftl_cmp_data_ver, %function
-ftl_cmp_data_ver:
+	.type	List_pop_index_node, %function
+List_pop_index_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	cmp	r0, r1
-	bls	.L663
-	subs	r0, r0, r1
-	cmp	r0, #-2147483648
-	ite	hi
-	movhi	r0, #0
-	movls	r0, #1
-	bx	lr
-.L663:
-	subs	r0, r1, r0
-	cmp	r0, #-2147483648
-	ite	ls
-	movls	r0, #0
-	movhi	r0, #1
-	bx	lr
-	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
-	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	ldr	r3, [r0, #0]
+	push	{r4, r5, r6, lr}
+	cbz	r3, .L547
+	ldr	r2, .L548
+	movw	r6, #65535
+	movs	r5, #6
+	ldr	r4, [r2, #0]
+	b	.L544
+.L546:
+	mla	r3, r5, r2, r4
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L544:
+	cbz	r1, .L545
+	ldrh	r2, [r3, #0]
+	cmp	r2, r6
+	bne	.L546
+.L545:
+	subs	r4, r3, r4
+	ldr	r3, .L548+4
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+	mov	r1, r4
+	bl	List_remove_node
+	mov	r0, r4
+	pop	{r4, r5, r6, pc}
+.L547:
+	movw	r0, #65535
+	pop	{r4, r5, r6, pc}
+.L549:
+	.align	2
+.L548:
+	.word	.LANCHOR87
+	.word	-1431655765
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueInit
+	.global	List_get_gc_head_node
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueInit, %function
-FtlFreeSysBlkQueueInit:
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L666
-	mov	r2, #2048
+	ldr	r3, .L556
 	push	{r4, lr}
-	movs	r4, #0
-	mov	r1, r4
-	strh	r4, [r3, #2]	@ movhi
-	strh	r4, [r3, #4]	@ movhi
-	strh	r4, [r3, #6]	@ movhi
-	strh	r0, [r3], #8	@ movhi
-	mov	r0, r3
-	bl	memset
-	mov	r0, r4
+	ldr	r3, [r3, #0]
+	cbz	r3, .L555
+	ldr	r2, .L556+4
+	movw	r1, #65535
+	movs	r4, #6
+	ldr	r2, [r2, #0]
+	b	.L552
+.L554:
+	mla	r3, r4, r3, r2
+	subs	r0, r0, #1
+	uxth	r0, r0
+.L552:
+	cbz	r0, .L553
+	ldrh	r3, [r3, #0]
+	cmp	r3, r1
+	bne	.L554
+	mov	r0, r1
 	pop	{r4, pc}
-.L667:
+.L553:
+	subs	r3, r3, r2
+	ldr	r0, .L556+8
+	asrs	r3, r3, #1
+	muls	r0, r3, r0
+	uxth	r0, r0
+	pop	{r4, pc}
+.L555:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L557:
 	.align	2
-.L666:
-	.word	.LANCHOR93
-	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
-	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
+.L556:
+	.word	.LANCHOR88
+	.word	.LANCHOR87
+	.word	-1431655765
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueEmpty
+	.global	List_update_data_list
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueEmpty, %function
-FtlFreeSysBlkQueueEmpty:
+	.type	List_update_data_list, %function
+List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L669
-	ldrh	r0, [r3, #6]
-	rsbs	r0, r0, #1
-	it	cc
-	movcc	r0, #0
-	bx	lr
-.L670:
+	ldr	r3, .L567
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L559
+	ldr	r3, .L567+4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L559
+	ldr	r3, .L567+8
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L559
+	ldr	r3, .L567+12
+	movs	r7, #6
+	muls	r7, r0, r7
+	ldr	r8, [r3, #0]
+	ldr	r3, .L567+16
+	add	r5, r8, r7
+	ldr	r3, [r3, #0]
+	cmp	r5, r3
+	beq	.L559
+	ldr	r3, .L567+20
+	movw	r2, #65535
+	ldrh	r6, [r5, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	muls	r6, r3, r6
+	ldrh	r3, [r5, #2]
+	it	eq
+	moveq	r6, #-1
+	cmp	r3, r2
+	bne	.L561
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	bne	.L561
+	ldr	r1, .L567+24
+	movw	r2, #481
+	ldr	r0, .L567+28
+	bl	printf
+	ldr	r0, .L567+32
+	ldr	r1, .L567+36
+	bl	printf
+.L561:
+	ldrh	r3, [r5, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L562
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	beq	.L559
+.L562:
+	ldr	r2, .L567+12
+	movs	r1, #6
+	ldr	r2, [r2, #0]
+	mla	r3, r1, r3, r2
+	ldr	r1, .L567+40
+	subs	r2, r3, r2
+	asrs	r2, r2, #1
+	muls	r2, r1, r2
+	ldr	r1, .L567+20
+	uxth	r2, r2
+	ldrh	r3, [r3, #4]
+	ldr	r1, [r1, #0]
+	ldrh	r2, [r1, r2, lsl #1]
+	muls	r3, r2, r3
+	it	eq
+	moveq	r3, #-1
+	cmp	r6, r3
+	bcs	.L559
+	ldr	r5, .L567+44
+	mov	r1, r4
+	ldr	r0, .L567+16
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L564
+	ldr	r1, .L567+24
+	mov	r2, #492
+	ldr	r0, .L567+28
+	bl	printf
+	ldr	r0, .L567+32
+	ldr	r1, .L567+36
+	bl	printf
+.L564:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+.L559:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L568:
 	.align	2
-.L669:
-	.word	.LANCHOR93
-	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
-	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
+.L567:
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR87
+	.word	.LANCHOR88
+	.word	.LANCHOR89
+	.word	.LANCHOR100
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	-1431655765
+	.word	.LANCHOR91
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueFull
+	.global	ftl_free_no_use_map_blk
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueFull, %function
-FtlFreeSysBlkQueueFull:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L672
-	ldrh	r0, [r3, #6]
-	sub	r2, r0, #1024
-	rsbs	r0, r2, #0
-	adc	r0, r0, r2
-	bx	lr
-.L673:
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #12]
+	movs	r1, #0
+	ldr	r7, [r0, #24]
+	mov	r0, r5
+	bl	memset
+	movs	r2, #0
+	b	.L570
+.L574:
+	ldr	r1, [r7, r2, lsl #2]
+	movs	r3, #0
+	ubfx	r1, r1, #10, #16
+	b	.L571
+.L573:
+	ldrh	r0, [r6, r3, lsl #1]
+	cmp	r0, r1
+	bne	.L572
+	ldrh	r0, [r5, r3, lsl #1]
+	adds	r0, r0, #1
+	strh	r0, [r5, r3, lsl #1]	@ movhi
+.L572:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L571:
+	ldrh	r0, [r4, #10]
+	cmp	r0, r3
+	bhi	.L573
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L570:
+	ldrh	r3, [r4, #6]
+	cmp	r3, r2
+	bhi	.L574
+	mov	sl, #0
+	ldrh	r3, [r5, #0]
+	mov	r7, sl
+	ldr	r2, .L580
+	b	.L575
+.L579:
+	ldrh	r1, [r4, #0]
+	cmp	r1, r7
+	bne	.L576
+	ldrh	r1, [r2, #0]
+	ldrh	r0, [r4, #2]
+	cmp	r0, r1
+	it	cc
+	strhcc	r1, [r5, r7, lsl #1]	@ movhi
+.L576:
+	ldrh	r8, [r5, r7, lsl #1]
+	lsl	fp, r7, #1
+	cmp	r3, r8
+	itt	hi
+	movhi	sl, r7
+	movhi	r3, r8
+	cmp	r8, #0
+	bne	.L578
+	ldrh	r0, [r6, fp]
+	cbz	r0, .L578
+	movs	r1, #1
+	stmia	sp, {r2, r3}
+	bl	FtlFreeSysBlkQueueIn
+	ldmia	sp, {r2, r3}
+	strh	r8, [r6, fp]	@ movhi
+	ldrh	r1, [r4, #8]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.L578:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L575:
+	ldrh	r1, [r4, #10]
+	cmp	r1, r7
+	bhi	.L579
+	mov	r0, sl
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L581:
 	.align	2
-.L672:
-	.word	.LANCHOR93
-	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
-	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
+.L580:
+	.word	.LANCHOR57
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueIn
+	.global	ftl_map_blk_alloc_new_blk
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueIn, %function
-FtlFreeSysBlkQueueIn:
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
+	push	{r3, r4, r5, r6, r7, lr}
 	mov	r4, r0
-	ldr	r3, .L677
-	ldrh	r3, [r3, #6]
-	cmp	r3, #1024
-	beq	.L674
-	cbz	r1, .L676
-	ldr	r3, .L677+4
-	ldr	r3, [r3, #0]
-	cbnz	r3, .L676
-	bl	P2V_block_in_plane
-	ldr	r3, .L677+8
-	movs	r1, #1
-	mov	r2, r1
-	mov	r5, r0
-	ldr	r0, [r3, #0]
-	lsls	r3, r4, #10
-	str	r3, [r0, #4]
-	bl	FlashEraseBlocks
-	ldr	r3, .L677+12
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L677+16
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-.L676:
-	ldr	r3, .L677
-	ldrh	r2, [r3, #6]
-	adds	r2, r2, #1
-	strh	r2, [r3, #6]	@ movhi
-	ldrh	r2, [r3, #4]
-	adds	r1, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #4]	@ movhi
-	strh	r4, [r3, r1, lsl #1]	@ movhi
-.L674:
-	pop	{r3, r4, r5, pc}
-.L678:
+	ldrh	r2, [r0, #10]
+	movs	r5, #0
+	ldr	r3, [r0, #12]
+	b	.L583
+.L586:
+	mov	r7, r3
+	adds	r3, r3, #2
+	ldrh	r6, [r7, #0]
+	cbnz	r6, .L584
+	bl	FtlFreeSysBlkQueueOut
+	strh	r0, [r7, #0]	@ movhi
+	cbz	r0, .L585
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	strh	r5, [r4, #0]	@ movhi
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L585
+.L584:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L583:
+	cmp	r5, r2
+	bne	.L586
+.L585:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L587
+	ldr	r1, .L588
+	movw	r2, #594
+	ldr	r0, .L588+4
+	bl	printf
+	ldr	r0, .L588+8
+	ldr	r1, .L588+12
+	bl	printf
+.L587:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L589:
 	.align	2
-.L677:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR95
-	.word	.LANCHOR96
-	.word	.LANCHOR97
-	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
-	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
+.L588:
+	.word	.LANCHOR101
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBLkSort
+	.global	select_l2p_ram_region
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBLkSort, %function
-FtlFreeSysBLkSort:
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	ldr	r5, .L689
-	ldr	r7, .L689+4
-	ldr	r6, .L689+8
-	b	.L680
-.L681:
-	add	r8, r4, r8
-	add	r8, r8, #4
-	ldrh	r0, [r5, r8, lsl #1]
-	bl	P2V_block_in_plane
-	ldr	r2, [r6, #0]
-	ldr	r3, [r7, #0]
-	ldrh	r2, [r2, r0, lsl #1]
-	str	r2, [r3, r4, lsl #2]
+	ldr	r2, .L602
+	movw	r1, #65535
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L602+4
+	ldr	r0, [r2, #0]
+	movs	r2, #0
+	mov	r4, r2
+	ldrh	r3, [r3, #0]
+	b	.L591
+.L593:
+	adds	r2, r2, #12
+	adds	r5, r0, r2
+	ldrh	r5, [r5, #-12]
+	cmp	r5, r1
+	beq	.L592
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L680:
-	ldrh	ip, [r5, #6]
-	ldrh	r8, [r5, #2]
-	cmp	r4, ip
-	bcc	.L681
-	ldr	r3, .L689+4
-	add	r6, ip, #-1
-	ldr	r4, .L689
-	ldr	r1, [r3, #0]
-	movs	r3, #0
-	b	.L682
-.L687:
-	adds	r5, r3, #1
-	mov	r2, r3
-	uxth	r5, r5
-	mov	r0, r5
-	b	.L683
-.L685:
-	ldr	r7, [r1, r0, lsl #2]
-	ldr	sl, [r1, r2, lsl #2]
-	cmp	sl, r7
-	it	hi
-	movhi	r2, r0
-	adds	r0, r0, #1
-	uxth	r0, r0
-.L683:
-	cmp	r0, ip
-	bcc	.L685
-	cmp	r3, r2
-	beq	.L686
-	ldr	r0, [r1, r2, lsl #2]
-	ldr	r7, [r1, r3, lsl #2]
-	str	r7, [r1, r2, lsl #2]
-	add	r2, r8, r2
-	str	r0, [r1, r3, lsl #2]
-	add	r3, r8, r3
-	adds	r2, r2, #4
-	adds	r3, r3, #4
-	ldrh	r0, [r4, r2, lsl #1]
-	ldrh	r7, [r4, r3, lsl #1]
-	strh	r7, [r4, r2, lsl #1]	@ movhi
-	strh	r0, [r4, r3, lsl #1]	@ movhi
-.L686:
-	mov	r3, r5
-.L682:
-	cmp	r3, r6
-	blt	.L687
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L690:
+.L591:
+	cmp	r4, r3
+	bne	.L593
+	movs	r1, #0
+	mov	r4, r3
+	mov	r6, #-2147483648
+	mov	r2, r1
+	b	.L594
+.L596:
+	adds	r5, r0, r1
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	blt	.L595
+	cmp	r5, r6
+	itt	cc
+	movcc	r6, r5
+	movcc	r4, r2
+.L595:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L594:
+	cmp	r2, r3
+	bne	.L596
+	cmp	r4, r3
+	bcc	.L592
+	ldr	r2, .L602+8
+	movs	r1, #0
+	mov	r4, r3
+	mov	r5, #-1
+	ldrh	r7, [r2, #0]
+	mov	r2, r1
+	b	.L597
+.L599:
+	adds	r6, r0, r1
+	ldr	r6, [r6, #4]
+	cmp	r6, r5
+	bcs	.L598
+	ldrh	ip, [r0, r1]
+	cmp	ip, r7
+	it	ne
+	movne	r5, r6
+	it	ne
+	movne	r4, r2
+.L598:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L597:
+	cmp	r2, r3
+	bne	.L599
+	cmp	r4, r2
+	bcc	.L592
+	ldr	r1, .L602+12
+	movw	r2, #826
+	ldr	r0, .L602+16
+	bl	printf
+	ldr	r0, .L602+20
+	ldr	r1, .L602+24
+	bl	printf
+.L592:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L603:
 	.align	2
-.L689:
-	.word	.LANCHOR93
-	.word	.LANCHOR98
-	.word	.LANCHOR96
-	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
+.L602:
+	.word	.LANCHOR102
+	.word	.LANCHOR71
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
 	.align	1
-	.global	remove_from_free_sys_Queue
+	.global	FtlUpdateVaildLpn
 	.thumb
 	.thumb_func
-	.type	remove_from_free_sys_Queue, %function
-remove_from_free_sys_Queue:
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L697
-	mov	r1, r0
-	push	{r4, r5, r6, lr}
-	ldrh	r0, [r3, #6]
-	cbz	r0, .L692
-	ldrh	r2, [r3, #2]
-	movs	r5, #0
-	b	.L693
-.L695:
-	adds	r6, r5, r2
-	ldr	r4, .L697
-	lsls	r6, r6, #22
-	add	r6, r3, r6, lsr #21
-	ldrh	r6, [r6, #8]
-	cmp	r6, r1
-	bne	.L694
-	ldr	r0, .L697+4
-	bl	printf
-	ldrh	r3, [r4, #2]
-	movs	r0, #1
-	adds	r5, r5, r3
-	adds	r2, r3, #4
-	adds	r3, r3, #1
-	lsls	r5, r5, #22
-	ldrh	r2, [r4, r2, lsl #1]
-	bic	r3, r3, #64512
-	strh	r3, [r4, #2]	@ movhi
-	add	r5, r4, r5, lsr #21
-	ldrh	r3, [r4, #6]
-	strh	r2, [r5, #8]	@ movhi
-	subs	r3, r3, #1
-	strh	r3, [r4, #6]	@ movhi
-	pop	{r4, r5, r6, pc}
-.L694:
-	adds	r5, r5, #1
-.L693:
-	cmp	r5, r0
-	bcc	.L695
-	movs	r0, #0
-.L692:
-	pop	{r4, r5, r6, pc}
-.L698:
+	ldr	r3, .L610
+	push	{r4, r5, lr}
+	ldrh	r2, [r3, #0]
+	adds	r1, r2, #1
+	cmp	r2, #4
+	strh	r1, [r3, #0]	@ movhi
+	mov	r2, r3
+	bhi	.L605
+	cbz	r0, .L604
+.L605:
+	movs	r3, #0
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L610+4
+	movw	r4, #65535
+	ldrh	r5, [r2, #0]
+	ldr	r2, .L610+8
+	ldr	r1, [r2, #0]
+	mov	r2, r3
+	b	.L607
+.L609:
+	ldrh	r0, [r1], #2
+	cmp	r0, r4
+	it	ne
+	addne	r3, r3, r0
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L607:
+	cmp	r2, r5
+	bne	.L609
+	ldr	r2, .L610+12
+	str	r3, [r2, #0]
+.L604:
+	pop	{r4, r5, pc}
+.L611:
 	.align	2
-.L697:
-	.word	.LANCHOR93
-	.word	.LC12
-	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
-	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
+.L610:
+	.word	.LANCHOR105
+	.word	.LANCHOR43
+	.word	.LANCHOR89
+	.word	.LANCHOR106
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
-	.global	FtlFreeSysBlkQueueOut
+	.global	ftl_set_blk_mode
 	.thumb
 	.thumb_func
-	.type	FtlFreeSysBlkQueueOut, %function
-FtlFreeSysBlkQueueOut:
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L703
-	ldrh	r1, [r3, #6]
-	cmp	r1, #0
-	beq	.L702
-	ldrh	r2, [r3, #2]
-	subs	r1, r1, #1
-	strh	r1, [r3, #6]	@ movhi
-	adds	r0, r2, #4
-	adds	r2, r2, #1
-	bic	r2, r2, #64512
-	strh	r2, [r3, #2]	@ movhi
-	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L703+4
-	ldr	r7, [r3, #0]
-	cbnz	r7, .L700
-	mov	r0, r4
-	ldr	r6, .L703+8
-	bl	P2V_block_in_plane
-	lsls	r3, r4, #10
-	mov	r5, r0
-	ldr	r0, [r6, #0]
-	str	r3, [r0, #4]
-	ldr	r3, .L703+12
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L701
-	mov	r1, r7
-	movs	r2, #1
-	bl	FlashEraseBlocks
-.L701:
+	@ link register save eliminated.
+	ldr	r3, .L616
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+	uxth	r2, r2
+	ldr	r3, [r3, #0]
+	cbz	r1, .L613
 	movs	r1, #1
-	ldr	r0, [r6, #0]
-	mov	r2, r1
-	bl	FlashEraseBlocks
-	ldr	r3, .L703+16
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	orrs	r0, r0, r1
+	b	.L615
+.L613:
+	movs	r1, #1
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	bic	r0, r1, r0
+.L615:
+	str	r0, [r3, r2, lsl #2]
+	bx	lr
+.L617:
+	.align	2
+.L616:
+	.word	.LANCHOR107
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_mode
+	.thumb
+	.thumb_func
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L619
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
 	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	adds	r2, r2, #1
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L703+20
-	ldr	r2, [r3, #0]
-	adds	r2, r2, #1
-	str	r2, [r3, #0]
-	b	.L700
-.L702:
-	movw	r4, #65535
-.L700:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L704:
+	ldr	r3, [r3, r2, lsl #2]
+	lsr	r0, r3, r0
+	and	r0, r0, #1
+	bx	lr
+.L620:
 	.align	2
-.L703:
-	.word	.LANCHOR93
-	.word	.LANCHOR94
-	.word	.LANCHOR95
-	.word	.LANCHOR7
-	.word	.LANCHOR96
-	.word	.LANCHOR97
-	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
-	.section	.text.insert_data_list,"ax",%progbits
+.L619:
+	.word	.LANCHOR107
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
-	.global	insert_data_list
+	.global	FtlL2PDataInit
 	.thumb
 	.thumb_func
-	.type	insert_data_list, %function
-insert_data_list:
-	@ args = 0, pretend = 0, frame = 24
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L721
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
-	ldrh	fp, [r3, #0]
-	cmp	r0, fp
-	bcs	.L706
-	ldr	r3, .L721+4
-	movs	r6, #6
-	muls	r6, r0, r6
-	ldr	r1, [r3, #0]
-	movw	r3, #65535
-	adds	r2, r1, r6
-	strh	r3, [r1, r6]	@ movhi
-	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L721+8
-	ldr	r5, [r3, #0]
-	cmp	r5, #0
-	beq	.L720
-.L707:
-	ldr	r3, .L721+12
-	ldrh	r4, [r2, #4]
-	ldr	ip, [r3, #0]
-	lsls	r3, r0, #1
-	ldrh	r7, [ip, r0, lsl #1]
-	cbz	r4, .L716
-	muls	r4, r7, r4
-	b	.L719
-.L716:
-	mov	r4, #-1
-.L719:
-	str	r4, [sp, #8]
-	subs	r4, r5, r1
-	ldr	r7, .L721+16
-	mov	sl, r2
-	asrs	r4, r4, #1
-	muls	r4, r7, r4
-	ldr	r7, .L721+20
-	uxth	r4, r4
-	str	ip, [sp, #4]
-	ldr	r7, [r7, #0]
-	adds	r3, r7, r3
-	str	r3, [sp, #20]
-	str	r7, [sp, #12]
-	mov	r3, r5
-	movs	r7, #0
-.L714:
-	adds	r7, r7, #1
-	uxth	r7, r7
-	cmp	r7, fp
-	bhi	.L706
-	cmp	r0, r4
-	beq	.L706
-	ldr	r2, [sp, #4]
-	lsl	r8, r4, #1
-	str	r8, [sp, #16]
-	ldrh	r8, [r2, r4, lsl #1]
-	ldrh	r2, [r3, #4]
-	cbz	r2, .L717
-	mul	r2, r2, r8
-	b	.L709
-.L717:
-	mov	r2, #-1
-.L709:
-	ldr	r8, [sp, #8]
-	cmp	r2, r8
-	bne	.L710
-	ldr	r2, [sp, #12]
-	ldr	ip, [sp, #16]
-	ldrh	r8, [r2, ip]
-	ldr	r2, [sp, #20]
-	ldrh	ip, [r2, #0]
-	cmp	r8, ip
-	bcc	.L712
-	b	.L718
-.L710:
-	bhi	.L718
-.L712:
-	ldrh	r2, [r3, #0]
-	movw	r8, #65535
-	cmp	r2, r8
-	bne	.L713
-	mov	r2, sl
-	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L721+24
-	strh	r4, [r2, #2]	@ movhi
-	b	.L720
-.L713:
-	mov	ip, #6
-	mov	r4, r2
-	mla	r3, ip, r2, r1
-	b	.L714
-.L718:
-	strh	r4, [r1, r6]	@ movhi
-	mov	r2, sl
-	ldrh	r4, [r3, #2]
-	cmp	r3, r5
-	strh	r4, [r2, #2]	@ movhi
-	bne	.L715
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L721+8
-.L720:
-	str	r2, [r3, #0]
-	b	.L706
-.L715:
-	ldrh	r2, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r2, r4, r2
-	strh	r0, [r1, r2]	@ movhi
-.L706:
-	movs	r0, #0
-	add	sp, sp, #24
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L722:
+	ldr	r3, .L624
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r2, [r3, #0]
+	ldr	r3, .L624+4
+	ldr	r5, .L624+8
+	ldr	r4, .L624+12
+	lsls	r2, r2, #1
+	ldr	r6, .L624+16
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r3, [r4, #0]
+	ldrh	r2, [r6, #0]
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r0, [r5, #0]
+	bl	memset
+	ldr	r3, .L624+20
+	ldrh	r7, [r6, #0]
+	ldr	ip, [r5, #0]
+	movw	r5, #65535
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	ldrh	r6, [r4, #0]
+	mov	r0, r3
+	mov	r4, r3
+	b	.L622
+.L623:
+	adds	r0, r0, #1
+	bic	r3, r3, #3
+	add	r3, ip, r3
+	str	r3, [r2, #-4]
+	uxth	r0, r0
+	mov	r3, r8
+	str	r4, [r2, #-8]
+	strh	r5, [r2, #-12]	@ movhi
+.L622:
+	adds	r2, r2, #12
+	cmp	r0, r7
+	add	r8, r3, r6
+	movw	r1, #65535
+	bne	.L623
+	ldr	r2, .L624
+	ldr	r3, .L624+24
+	ldr	r2, [r2, #0]
+	strh	r1, [r3, #2]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L624+28
+	strh	r1, [r3, #40]	@ movhi
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L624+32
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L624+36
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #12]
+	ldr	r2, .L624+40
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #16]
+	ldr	r2, .L624+4
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #20]
+	ldr	r2, .L624+44
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L625:
 	.align	2
-.L721:
-	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	-1431655765
-	.word	.LANCHOR96
+.L624:
+	.word	.LANCHOR68
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR61
+	.word	.LANCHOR71
 	.word	.LANCHOR102
-	.size	insert_data_list, .-insert_data_list
-	.section	.text.INSERT_DATA_LIST,"ax",%progbits
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR70
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
-	.global	INSERT_DATA_LIST
+	.global	ftl_sb_update_avl_pages
 	.thumb
 	.thumb_func
-	.type	INSERT_DATA_LIST, %function
-INSERT_DATA_LIST:
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	insert_data_list
-	ldr	r2, .L725
-	ldrh	r3, [r2, #0]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L725+4
-	ldrh	r2, [r2, #0]
+	movs	r3, #0
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L633
+	push	{r4, r5, r6, r7, lr}
+	movw	r4, #65535
+	ldrh	r3, [r3, #0]
+	b	.L627
+.L629:
+	add	r5, r2, #8
+	ldrh	r5, [r0, r5, lsl #1]
+	cmp	r5, r4
+	beq	.L628
+	ldrh	r5, [r0, #4]
+	adds	r5, r5, #1
+	strh	r5, [r0, #4]	@ movhi
+.L628:
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L627:
 	cmp	r2, r3
-	bcs	.L723
-	ldr	r1, .L725+8
-	movs	r2, #205
-	ldr	r0, .L725+12
-	bl	printf
-	ldr	r0, .L725+16
-	ldr	r1, .L725+20
-	pop	{r3, lr}
-	b	printf
-.L723:
-	pop	{r3, pc}
-.L726:
+	bcc	.L629
+	ldr	r2, .L633+4
+	mov	r4, r0
+	movw	r5, #65535
+	mvns	r1, r1
+	ldrh	r6, [r2, #0]
+	movs	r2, #0
+	b	.L630
+.L632:
+	ldrh	r7, [r4, #16]
+	cmp	r7, r5
+	beq	.L631
+	ldrh	r7, [r0, #4]
+	adds	r7, r6, r7
+	adds	r7, r7, r1
+	strh	r7, [r0, #4]	@ movhi
+.L631:
+	adds	r2, r2, #1
+	adds	r4, r4, #2
+	uxth	r2, r2
+.L630:
+	cmp	r2, r3
+	bne	.L632
+	pop	{r4, r5, r6, r7, pc}
+.L634:
 	.align	2
-.L725:
-	.word	.LANCHOR103
-	.word	.LANCHOR55
-	.word	.LANCHOR104
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
-	.section	.text.insert_free_list,"ax",%progbits
+.L633:
+	.word	.LANCHOR41
+	.word	.LANCHOR56
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",%progbits
 	.align	1
-	.global	insert_free_list
+	.global	make_superblock
 	.thumb
 	.thumb_func
-	.type	insert_free_list, %function
-insert_free_list:
+	.type	make_superblock, %function
+make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L642
+	ldrh	r2, [r0, #0]
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movw	r8, #65535
-	cmp	r0, r8
-	beq	.L728
-	ldr	r3, .L735
-	mov	fp, #6
-	mul	r6, fp, r0
-	ldr	r2, [r3, #0]
-	ldr	r3, .L735+4
-	adds	r1, r2, r6
-	ldr	r4, [r3, #0]
-	strh	r8, [r1, #2]	@ movhi
-	strh	r8, [r2, r6]	@ movhi
-	cbz	r4, .L734
-.L729:
-	ldr	r3, .L735+8
-	subs	r5, r4, r2
-	asrs	r5, r5, #1
-	ldr	ip, [r3, #0]
-	ldr	r3, .L735+12
-	muls	r5, r3, r5
-	mov	r3, r4
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L636
+	ldr	r1, .L642+4
+	movw	r2, #2296
+	ldr	r0, .L642+8
+	bl	printf
+	ldr	r0, .L642+12
+	ldr	r1, .L642+16
+	bl	printf
+.L636:
+	movs	r5, #0
+	ldr	r8, .L642+40
+	strh	r5, [r4, #4]	@ movhi
+	movw	r6, #65535
+	strb	r5, [r4, #7]
+	ldr	r7, .L642+20
+	b	.L637
+.L639:
+	ldrb	r0, [r7, r5]	@ zero_extendqisi2
+	add	sl, r5, #8
+	ldrh	r1, [r4, #0]
+	bl	V2P_block
+	strh	r6, [r4, sl, lsl #1]	@ movhi
+	mov	fp, r0
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L638
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	strh	fp, [r4, sl, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L638:
+	adds	r5, r5, #1
 	uxth	r5, r5
-	ldrh	sl, [ip, r0, lsl #1]
-.L732:
-	ldrh	r7, [ip, r5, lsl #1]
-	cmp	r7, sl
-	bcs	.L730
-	ldrh	r7, [r3, #0]
-	cmp	r7, r8
-	bne	.L731
-	strh	r5, [r1, #2]	@ movhi
-	strh	r0, [r3, #0]	@ movhi
-	b	.L728
-.L731:
-	mla	r3, fp, r7, r2
-	mov	r5, r7
-	b	.L732
-.L730:
-	ldrh	r7, [r3, #2]
-	cmp	r3, r4
-	strh	r5, [r2, r6]	@ movhi
-	strh	r7, [r1, #2]	@ movhi
-	bne	.L733
-	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L735+4
-.L734:
-	str	r1, [r3, #0]
-	b	.L728
-.L733:
-	ldrh	r1, [r3, #2]
-	movs	r4, #6
-	strh	r0, [r3, #2]	@ movhi
-	muls	r1, r4, r1
-	strh	r0, [r2, r1]	@ movhi
-.L728:
+.L637:
+	ldrh	r3, [r8, #0]
+	cmp	r3, r5
+	bhi	.L639
+	ldr	r2, .L642+24
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #9]
+	ldr	r3, .L642+28
+	ldr	r3, [r3, #0]
+	cbz	r3, .L640
+	ldr	r3, .L642+32
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #59
+	bhi	.L640
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L640:
+	ldr	r3, .L642+36
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L641
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L641:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L736:
-	.align	2
-.L735:
-	.word	.LANCHOR99
-	.word	.LANCHOR105
-	.word	.LANCHOR96
-	.word	-1431655765
-	.size	insert_free_list, .-insert_free_list
-	.section	.text.INSERT_FREE_LIST,"ax",%progbits
-	.align	1
-	.global	INSERT_FREE_LIST
-	.thumb
-	.thumb_func
-	.type	INSERT_FREE_LIST, %function
-INSERT_FREE_LIST:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	insert_free_list
-	ldr	r2, .L739
-	ldrh	r3, [r2, #0]
-	adds	r3, r3, #1
-	uxth	r3, r3
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L739+4
-	ldrh	r2, [r2, #0]
-	cmp	r2, r3
-	bcs	.L737
-	ldr	r1, .L739+8
-	movs	r2, #198
-	ldr	r0, .L739+12
-	bl	printf
-	ldr	r0, .L739+16
-	ldr	r1, .L739+20
-	pop	{r3, lr}
-	b	printf
-.L737:
-	pop	{r3, pc}
-.L740:
+.L643:
 	.align	2
-.L739:
-	.word	.LANCHOR106
-	.word	.LANCHOR55
-	.word	.LANCHOR107
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
-	.section	.text.List_remove_node,"ax",%progbits
+.L642:
+	.word	.LANCHOR43
+	.word	.LANCHOR115
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR50
+	.word	.LANCHOR56
+	.word	.LANCHOR116
+	.word	.LANCHOR84
+	.word	.LANCHOR0
+	.word	.LANCHOR41
+	.size	make_superblock, .-make_superblock
+	.section	.text.SupperBlkListInit,"ax",%progbits
 	.align	1
-	.global	List_remove_node
+	.global	SupperBlkListInit
 	.thumb
 	.thumb_func
-	.type	List_remove_node, %function
-List_remove_node:
-	@ args = 0, pretend = 0, frame = 0
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movs	r6, #6
-	muls	r6, r1, r6
-	ldr	r3, .L747
-	mov	r5, r0
-	ldr	r7, [r3, #0]
-	movw	r3, #65535
-	adds	r4, r7, r6
-	ldrh	r2, [r4, #2]
-	cmp	r2, r3
-	bne	.L742
-	ldr	r3, [r0, #0]
+	ldr	r2, .L655
+	ldr	r3, .L655+4
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r1, #0
+	ldrh	r3, [r3, #0]
+	movs	r5, #0
+	ldr	r0, [r2, #0]
+	movs	r2, #6
+	muls	r2, r3, r2
+	mov	r4, r5
+	bl	memset
+	ldr	r3, .L655+8
+	mov	r8, r5
+	mov	sl, r5
+	str	r5, [r3, #0]
+	ldr	r3, .L655+12
+	str	r5, [r3, #0]
+	ldr	r3, .L655+16
+	str	r5, [r3, #0]
+	ldr	r3, .L655+20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L655+24
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L655+28
+	strh	r5, [r3, #0]	@ movhi
+	b	.L645
+.L647:
+	ldr	r2, .L655+32
+	mov	r1, r4
+	ldrb	r0, [r2, r7]	@ zero_extendqisi2
+	str	ip, [sp, #4]
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	ldr	ip, [sp, #4]
+	cbnz	r0, .L646
+	ldrh	r2, [fp, #0]
+	adds	r6, r6, r2
+	uxth	r6, r6
+.L646:
+	adds	r7, r7, #1
+	b	.L652
+.L654:
+	movs	r7, #0
+	uxth	r3, r4
+	ldr	fp, .L655+76
+	mov	ip, r4
+	mov	r6, r7
+	mov	r4, r3
+.L652:
+	ldr	r3, .L655+36
+	ldrh	r2, [r3, #0]
+	cmp	r7, r2
+	blt	.L647
+	mov	r4, ip
+	cbz	r6, .L648
+	sxth	r1, r6
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r6, r0
+	b	.L649
+.L648:
+	ldr	r3, .L655+40
+	movw	r2, #65535
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, ip, lsl #1]	@ movhi
+.L649:
+	ldr	r3, .L655
+	ldr	r3, [r3, #0]
+	adds	r3, r3, r5
+	strh	r6, [r3, #4]	@ movhi
+	ldr	r3, .L655+44
+	ldrh	r3, [r3, #0]
 	cmp	r4, r3
-	beq	.L742
-	ldr	r1, .L747+4
-	movw	r2, #363
-	ldr	r0, .L747+8
+	beq	.L650
+	ldr	r3, .L655+48
+	ldrh	r3, [r3, #0]
+	cmp	r4, r3
+	beq	.L650
+	ldr	r3, .L655+52
+	ldrh	r3, [r3, #0]
+	cmp	r4, r3
+	beq	.L650
+	ldr	r3, .L655+40
+	uxth	r0, r4
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L651
+	add	r8, r8, #1
+	uxth	r8, r8
+	bl	INSERT_FREE_LIST
+	b	.L650
+.L651:
+	add	sl, sl, #1
+	uxth	sl, sl
+	bl	INSERT_DATA_LIST
+.L650:
+	adds	r4, r4, #1
+	adds	r5, r5, #6
+.L645:
+	ldr	r2, .L655+56
+	ldrh	r3, [r2, #0]
+	cmp	r4, r3
+	blt	.L654
+	ldr	r2, .L655+20
+	strh	sl, [r2, #0]	@ movhi
+	ldr	r2, .L655+24
+	strh	r8, [r2, #0]	@ movhi
+	add	r8, sl, r8
+	cmp	r8, r3
+	ble	.L653
+	ldr	r1, .L655+60
+	movw	r2, #2366
+	ldr	r0, .L655+64
 	bl	printf
-	ldr	r0, .L747+12
-	ldr	r1, .L747+16
+	ldr	r0, .L655+68
+	ldr	r1, .L655+72
 	bl	printf
-.L742:
-	ldr	r3, [r5, #0]
-	movw	r2, #65535
-	cmp	r4, r3
-	ldrh	r3, [r7, r6]
-	bne	.L743
-	cmp	r3, r2
-	bne	.L744
-	movs	r3, #0
-	str	r3, [r5, #0]
-	b	.L745
-.L744:
-	ldr	r1, .L747
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r3, r0, r3, r1
-	str	r3, [r5, #0]
-	strh	r2, [r3, #2]	@ movhi
-	b	.L745
-.L743:
-	cmp	r3, r2
-	ldrh	r2, [r4, #2]
-	bne	.L746
-	cmp	r2, r3
-	beq	.L745
-	ldr	r1, .L747
-	movs	r0, #6
-	muls	r2, r0, r2
-	ldr	r1, [r1, #0]
-	strh	r3, [r1, r2]	@ movhi
-	b	.L745
-.L746:
-	ldr	r1, .L747
-	movs	r0, #6
-	ldr	r1, [r1, #0]
-	mla	r5, r0, r3, r1
-	strh	r2, [r5, #2]	@ movhi
-	ldrh	r2, [r4, #2]
-	muls	r0, r2, r0
-	strh	r3, [r1, r0]	@ movhi
-.L745:
-	movw	r3, #65535
+.L653:
 	movs	r0, #0
-	strh	r3, [r7, r6]	@ movhi
-	strh	r3, [r4, #2]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L748:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L656:
 	.align	2
-.L747:
+.L655:
+	.word	.LANCHOR87
+	.word	.LANCHOR44
+	.word	.LANCHOR93
+	.word	.LANCHOR88
+	.word	.LANCHOR90
+	.word	.LANCHOR91
+	.word	.LANCHOR94
+	.word	.LANCHOR117
+	.word	.LANCHOR50
+	.word	.LANCHOR41
+	.word	.LANCHOR89
+	.word	.LANCHOR97
+	.word	.LANCHOR98
 	.word	.LANCHOR99
-	.word	.LANCHOR108
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	List_remove_node, .-List_remove_node
-	.section	.text.List_pop_index_node,"ax",%progbits
+	.word	.LANCHOR43
+	.word	.LANCHOR118
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR56
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.update_multiplier_value,"ax",%progbits
 	.align	1
-	.global	List_pop_index_node
+	.global	update_multiplier_value
 	.thumb
 	.thumb_func
-	.type	List_pop_index_node, %function
-List_pop_index_node:
+	.type	update_multiplier_value, %function
+update_multiplier_value:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, [r0, #0]
-	push	{r4, r5, r6, lr}
-	cbz	r3, .L754
-	ldr	r2, .L755
-	movw	r6, #65535
-	movs	r5, #6
-	ldr	r4, [r2, #0]
-	b	.L751
-.L753:
-	mla	r3, r5, r2, r4
-	subs	r1, r1, #1
-	uxth	r1, r1
-.L751:
-	cbz	r1, .L752
-	ldrh	r2, [r3, #0]
-	cmp	r2, r6
-	bne	.L753
-.L752:
-	subs	r4, r3, r4
-	ldr	r3, .L755+4
-	asrs	r4, r4, #1
-	muls	r4, r3, r4
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	mov	r6, r0
+	mov	r5, r4
+	ldr	sl, .L662+8
+	ldr	r8, .L662+12
+	ldr	r7, .L662
+	b	.L658
+.L660:
+	mov	r1, r6
+	ldrb	r0, [r8, r5]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L659
+	ldrh	r3, [r7, #0]
+	adds	r4, r4, r3
 	uxth	r4, r4
+.L659:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L658:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L660
+	cbz	r4, .L661
 	mov	r1, r4
-	bl	List_remove_node
-	mov	r0, r4
-	pop	{r4, r5, r6, pc}
-.L754:
-	movw	r0, #65535
-	pop	{r4, r5, r6, pc}
-.L756:
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r4, r0
+.L661:
+	ldr	r3, .L662+4
+	movs	r2, #6
+	movs	r0, #0
+	ldr	r3, [r3, #0]
+	mla	r6, r2, r6, r3
+	strh	r4, [r6, #4]	@ movhi
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L663:
 	.align	2
-.L755:
-	.word	.LANCHOR99
+.L662:
+	.word	.LANCHOR56
+	.word	.LANCHOR87
+	.word	.LANCHOR41
+	.word	.LANCHOR50
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMinEraseCount
+	.thumb
+	.thumb_func
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L667
+	ldr	r0, [r3, #0]
+	cbz	r0, .L665
+	ldr	r3, .L667+4
+	ldr	r3, [r3, #0]
+	subs	r0, r0, r3
+	ldr	r3, .L667+8
+	asrs	r0, r0, #1
+	muls	r0, r3, r0
+	ldr	r3, .L667+12
+	uxth	r0, r0
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r0, lsl #1]
+.L665:
+	bx	lr
+.L668:
+	.align	2
+.L667:
+	.word	.LANCHOR93
+	.word	.LANCHOR87
 	.word	-1431655765
-	.size	List_pop_index_node, .-List_pop_index_node
-	.section	.text.List_get_gc_head_node,"ax",%progbits
+	.word	.LANCHOR84
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
-	.global	List_get_gc_head_node
+	.global	GetFreeBlockMaxEraseCount
 	.thumb
 	.thumb_func
-	.type	List_get_gc_head_node, %function
-List_get_gc_head_node:
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L763
-	push	{r4, lr}
+	ldr	r3, .L676
+	push	{r4, r5, r6, lr}
 	ldr	r3, [r3, #0]
-	cbz	r3, .L762
-	ldr	r2, .L763+4
-	movw	r1, #65535
-	movs	r4, #6
-	ldr	r2, [r2, #0]
-	b	.L759
-.L761:
-	mla	r3, r4, r3, r2
-	subs	r0, r0, #1
-	uxth	r0, r0
-.L759:
-	cbz	r0, .L760
-	ldrh	r3, [r3, #0]
-	cmp	r3, r1
-	bne	.L761
-	mov	r0, r1
-	pop	{r4, pc}
-.L760:
-	subs	r3, r3, r2
-	ldr	r0, .L763+8
+	cbz	r3, .L675
+	ldr	r2, .L676+4
+	movs	r1, #7
+	movw	r5, #65535
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	asrs	r2, r2, #3
+	cmp	r0, r2
+	it	gt
+	uxthgt	r0, r2
+	ldr	r2, .L676+8
+	movs	r6, #6
+	ldr	r1, [r2, #0]
+	ldr	r2, .L676+12
+	subs	r3, r3, r1
 	asrs	r3, r3, #1
-	muls	r0, r3, r0
-	uxth	r0, r0
-	pop	{r4, pc}
-.L762:
-	movw	r0, #65535
-	pop	{r4, pc}
-.L764:
+	muls	r3, r2, r3
+	movs	r2, #0
+	uxth	r3, r3
+	b	.L672
+.L674:
+	mul	r4, r6, r3
+	ldrh	r4, [r1, r4]
+	cmp	r4, r5
+	beq	.L673
+	adds	r2, r2, #1
+	mov	r3, r4
+	uxth	r2, r2
+.L672:
+	cmp	r2, r0
+	bne	.L674
+.L673:
+	ldr	r2, .L676+16
+	ldr	r2, [r2, #0]
+	ldrh	r0, [r2, r3, lsl #1]
+	pop	{r4, r5, r6, pc}
+.L675:
+	mov	r0, r3
+	pop	{r4, r5, r6, pc}
+.L677:
 	.align	2
-.L763:
-	.word	.LANCHOR100
-	.word	.LANCHOR99
+.L676:
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR87
 	.word	-1431655765
-	.size	List_get_gc_head_node, .-List_get_gc_head_node
-	.section	.text.List_update_data_list,"ax",%progbits
+	.word	.LANCHOR84
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
-	.global	List_update_data_list
+	.global	free_data_superblock
 	.thumb
 	.thumb_func
-	.type	List_update_data_list, %function
-List_update_data_list:
+	.type	free_data_superblock, %function
+free_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L774
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L766
-	ldr	r3, .L774+4
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L766
-	ldr	r3, .L774+8
-	ldrh	r3, [r3, #0]
-	cmp	r3, r0
-	beq	.L766
-	ldr	r3, .L774+12
-	movs	r7, #6
-	muls	r7, r0, r7
-	ldr	r8, [r3, #0]
-	ldr	r3, .L774+16
-	add	r5, r8, r7
-	ldr	r3, [r3, #0]
-	cmp	r5, r3
-	beq	.L766
-	ldr	r3, .L774+20
-	movw	r2, #65535
-	ldrh	r6, [r5, #4]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	muls	r6, r3, r6
-	ldrh	r3, [r5, #2]
-	it	eq
-	moveq	r6, #-1
-	cmp	r3, r2
-	bne	.L768
-	ldrh	r2, [r8, r7]
-	cmp	r2, r3
-	bne	.L768
-	ldr	r1, .L774+24
-	movw	r2, #481
-	ldr	r0, .L774+28
-	bl	printf
-	ldr	r0, .L774+32
-	ldr	r1, .L774+36
-	bl	printf
-.L768:
-	ldrh	r3, [r5, #2]
 	movw	r2, #65535
-	cmp	r3, r2
-	bne	.L769
-	ldrh	r2, [r8, r7]
-	cmp	r2, r3
-	beq	.L766
-.L769:
-	ldr	r2, .L774+12
-	movs	r1, #6
+	cmp	r0, r2
+	push	{r3, lr}
+	beq	.L679
+	ldr	r2, .L680
+	movs	r1, #0
 	ldr	r2, [r2, #0]
-	mla	r3, r1, r3, r2
-	ldr	r1, .L774+40
-	subs	r2, r3, r2
-	asrs	r2, r2, #1
-	muls	r2, r1, r2
-	ldr	r1, .L774+20
-	uxth	r2, r2
-	ldrh	r3, [r3, #4]
-	ldr	r1, [r1, #0]
-	ldrh	r2, [r1, r2, lsl #1]
-	muls	r3, r2, r3
-	it	eq
-	moveq	r3, #-1
-	cmp	r6, r3
-	bcs	.L766
-	ldr	r5, .L774+44
-	mov	r1, r4
-	ldr	r0, .L774+16
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L771
-	ldr	r1, .L774+24
-	mov	r2, #492
-	ldr	r0, .L774+28
-	bl	printf
-	ldr	r0, .L774+32
-	ldr	r1, .L774+36
-	bl	printf
-.L771:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	INSERT_DATA_LIST
-.L766:
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	bl	INSERT_FREE_LIST
+.L679:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L775:
+	pop	{r3, pc}
+.L681:
 	.align	2
-.L774:
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR99
-	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	.LANCHOR112
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	-1431655765
-	.word	.LANCHOR103
-	.size	List_update_data_list, .-List_update_data_list
-	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+.L680:
+	.word	.LANCHOR89
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
-	.global	ftl_free_no_use_map_blk
+	.global	FtlGcBufInit
 	.thumb
 	.thumb_func
-	.type	ftl_free_no_use_map_blk, %function
-ftl_free_no_use_map_blk:
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldrh	r2, [r0, #10]
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r5, [r0, #20]
-	lsls	r2, r2, #1
-	ldr	r6, [r0, #12]
-	movs	r1, #0
-	ldr	r7, [r0, #24]
-	mov	r0, r5
-	bl	memset
+	ldr	r3, .L687
 	movs	r2, #0
-	b	.L777
-.L781:
-	ldr	r1, [r7, r2, lsl #2]
-	movs	r3, #0
-	ubfx	r1, r1, #10, #16
-	b	.L778
-.L780:
-	ldrh	r0, [r6, r3, lsl #1]
-	cmp	r0, r1
-	bne	.L779
-	ldrh	r0, [r5, r3, lsl #1]
-	adds	r0, r0, #1
-	strh	r0, [r5, r3, lsl #1]	@ movhi
-.L779:
-	adds	r3, r3, #1
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r2
+	str	r2, [r3, #0]
+	ldr	r3, .L687+4
+	ldrh	ip, [r3, #0]
+	ldr	r3, .L687+8
+	ldr	r7, [r3, #0]
+	ldr	r3, .L687+12
+	ldr	r6, [r3, #0]
+	ldr	r3, .L687+16
+	ldr	r1, [r3, #0]
+	ldr	r3, .L687+20
+	ldrh	r5, [r3, #0]
+	ldr	r3, .L687+24
+	str	r5, [sp, #4]
+	ldrh	fp, [r3, #0]
+	ldr	r3, .L687+28
+	ldr	r0, [r3, #0]
+	mov	r3, r2
+	b	.L683
+.L684:
+	movs	r5, #1
+	bic	r4, r4, #3
+	adds	r3, r3, r5
+	bic	r2, r2, #3
+	adds	r4, r7, r4
+	adds	r2, r6, r2
+	str	r4, [r1, #-12]
 	uxth	r3, r3
-.L778:
-	ldrh	r0, [r4, #10]
-	cmp	r0, r3
-	bhi	.L780
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L777:
-	ldrh	r3, [r4, #6]
-	cmp	r3, r2
-	bhi	.L781
-	mov	sl, #0
-	ldrh	r3, [r5, #0]
-	mov	r7, sl
-	ldr	r2, .L787
-	b	.L782
-.L786:
-	ldrh	r1, [r4, #0]
-	cmp	r1, r7
-	bne	.L783
-	ldrh	r1, [r2, #0]
-	ldrh	r0, [r4, #2]
-	cmp	r0, r1
-	it	cc
-	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L783:
-	ldrh	r8, [r5, r7, lsl #1]
-	lsl	fp, r7, #1
+	str	r2, [r1, #-8]
+	str	r5, [r1, #-4]
+	str	r4, [r0, #-28]
+	mov	r4, r8
+	str	r2, [r0, #-24]
+	mov	r2, sl
+.L683:
+	adds	r1, r1, #12
+	ldr	r5, [sp, #4]
+	adds	r0, r0, #36
+	cmp	r3, ip
+	add	r8, r4, r5
+	add	sl, r2, fp
+	bne	.L684
+	ldr	r1, .L687+8
+	movs	r4, #12
+	ldr	r2, .L687+32
+	mov	fp, #0
+	ldr	ip, [r1, #0]
+	ldr	r1, .L687+20
+	ldr	r8, [r2, #0]
+	ldr	r2, .L687+16
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L687+12
+	ldr	r2, [r2, #0]
+	ldr	r6, [r1, #0]
+	ldr	r1, .L687+24
+	ldrh	r5, [r1, #0]
+	b	.L685
+.L686:
+	mul	r1, r4, r3
+	mul	r0, r7, r3
+	add	sl, r2, r1
+	bic	r0, r0, #3
+	str	fp, [sl, #8]
+	add	r0, ip, r0
+	str	r0, [r2, r1]
+	mul	r1, r5, r3
+	adds	r3, r3, #1
+	uxth	r3, r3
+	bic	r1, r1, #3
+	adds	r1, r6, r1
+	str	r1, [sl, #4]
+.L685:
 	cmp	r3, r8
-	itt	hi
-	movhi	sl, r7
-	movhi	r3, r8
-	cmp	r8, #0
-	bne	.L785
-	ldrh	r0, [r6, fp]
-	cbz	r0, .L785
-	movs	r1, #1
-	stmia	sp, {r2, r3}
-	bl	FtlFreeSysBlkQueueIn
-	ldmia	sp, {r2, r3}
-	strh	r8, [r6, fp]	@ movhi
-	ldrh	r1, [r4, #8]
-	subs	r1, r1, #1
-	strh	r1, [r4, #8]	@ movhi
-.L785:
-	adds	r7, r7, #1
-	uxth	r7, r7
-.L782:
-	ldrh	r1, [r4, #10]
-	cmp	r1, r7
-	bhi	.L786
-	mov	r0, sl
+	bcc	.L686
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L788:
+.L688:
 	.align	2
-.L787:
-	.word	.LANCHOR69
-	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
-	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+.L687:
+	.word	.LANCHOR119
+	.word	.LANCHOR41
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR122
+	.word	.LANCHOR61
+	.word	.LANCHOR62
+	.word	.LANCHOR123
+	.word	.LANCHOR124
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
-	.global	ftl_map_blk_alloc_new_blk
+	.global	FtlVariablesInit
 	.thumb
 	.thumb_func
-	.type	ftl_map_blk_alloc_new_blk, %function
-ftl_map_blk_alloc_new_blk:
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	ldrh	r2, [r0, #10]
-	movs	r5, #0
-	ldr	r3, [r0, #12]
-	b	.L790
-.L793:
-	mov	r7, r3
-	adds	r3, r3, #2
-	ldrh	r6, [r7, #0]
-	cbnz	r6, .L791
-	bl	FtlFreeSysBlkQueueOut
-	strh	r0, [r7, #0]	@ movhi
-	cbz	r0, .L792
-	ldr	r3, [r4, #28]
-	strh	r6, [r4, #2]	@ movhi
-	adds	r3, r3, #1
-	str	r3, [r4, #28]
-	ldrh	r3, [r4, #8]
-	strh	r5, [r4, #0]	@ movhi
-	adds	r3, r3, #1
-	strh	r3, [r4, #8]	@ movhi
-	b	.L792
-.L791:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L790:
-	cmp	r5, r2
-	bne	.L793
-.L792:
-	ldrh	r3, [r4, #10]
-	cmp	r3, r5
-	bhi	.L794
-	ldr	r1, .L795
-	movw	r2, #594
-	ldr	r0, .L795+4
-	bl	printf
-	ldr	r0, .L795+8
-	ldr	r1, .L795+12
-	bl	printf
-.L794:
-	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L796:
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L690
+	movw	r2, #65535
+	ldr	r5, .L690+4
+	mov	r1, r4
+	str	r4, [r3, #0]
+	ldr	r3, .L690+8
+	strh	r2, [r3, #0]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L690+12
+	str	r4, [r3, #0]
+	ldr	r3, .L690+16
+	str	r4, [r3, #0]
+	ldr	r3, .L690+20
+	str	r2, [r3, #0]
+	ldr	r3, .L690+24
+	str	r4, [r3, #0]
+	ldr	r3, .L690+28
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L690+32
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L690+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r2, [r5, #0]
+	ldr	r3, .L690+40
+	mov	r1, r4
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L690+44
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L690+48
+	bl	memset
+	mov	r1, r4
+	mov	r2, #512
+	ldr	r0, .L690+52
+	bl	memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L691:
 	.align	2
-.L795:
-	.word	.LANCHOR113
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
-	.section	.text.select_l2p_ram_region,"ax",%progbits
+.L690:
+	.word	.LANCHOR125
+	.word	.LANCHOR44
+	.word	.LANCHOR126
+	.word	.LANCHOR127
+	.word	.LANCHOR128
+	.word	.LANCHOR129
+	.word	.LANCHOR116
+	.word	.LANCHOR74
+	.word	.LANCHOR65
+	.word	.LANCHOR75
+	.word	.LANCHOR84
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR132
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
-	.global	select_l2p_ram_region
+	.global	FtlGcBufFree
 	.thumb
 	.thumb_func
-	.type	select_l2p_ram_region, %function
-select_l2p_ram_region:
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L809
-	movw	r1, #65535
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L809+4
-	ldr	r0, [r2, #0]
-	movs	r2, #0
-	mov	r4, r2
-	ldrh	r3, [r3, #0]
-	b	.L798
-.L800:
-	adds	r2, r2, #12
-	adds	r5, r0, r2
-	ldrh	r5, [r5, #-12]
-	cmp	r5, r1
-	beq	.L799
-	adds	r4, r4, #1
-	uxth	r4, r4
-.L798:
-	cmp	r4, r3
-	bne	.L800
-	movs	r1, #0
-	mov	r4, r3
-	mov	r6, #-2147483648
-	mov	r2, r1
-	b	.L801
-.L803:
-	adds	r5, r0, r1
-	ldr	r5, [r5, #4]
-	cmp	r5, #0
-	blt	.L802
-	cmp	r5, r6
-	itt	cc
-	movcc	r6, r5
-	movcc	r4, r2
-.L802:
-	adds	r2, r2, #1
-	adds	r1, r1, #12
-	uxth	r2, r2
-.L801:
-	cmp	r2, r3
-	bne	.L803
-	cmp	r4, r3
-	bcc	.L799
-	ldr	r2, .L809+8
-	movs	r1, #0
-	mov	r4, r3
-	mov	r5, #-1
-	ldrh	r7, [r2, #0]
-	mov	r2, r1
-	b	.L804
-.L806:
-	adds	r6, r0, r1
-	ldr	r6, [r6, #4]
-	cmp	r6, r5
-	bcs	.L805
-	ldrh	ip, [r0, r1]
-	cmp	ip, r7
-	it	ne
-	movne	r5, r6
-	it	ne
-	movne	r4, r2
-.L805:
+	ldr	r3, .L699
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #36
+	ldr	r6, [r3, #0]
+	ldr	r3, .L699+4
+	ldr	r4, [r3, #0]
+	movs	r3, #0
+	mov	fp, r3
+	b	.L693
+.L696:
+	mov	ip, #12
+	mul	r3, ip, r2
+	add	sl, r4, r3
+	ldr	ip, [r4, r3]
+	ldr	r3, [r7, #8]
+	cmp	ip, r3
+	bne	.L694
+	mov	r3, r8
+	str	fp, [sl, #8]
+	b	.L695
+.L694:
 	adds	r2, r2, #1
-	adds	r1, r1, #12
 	uxth	r2, r2
-.L804:
-	cmp	r2, r3
-	bne	.L806
-	cmp	r4, r2
-	bcc	.L799
-	ldr	r1, .L809+12
-	movw	r2, #826
-	ldr	r0, .L809+16
-	bl	printf
-	ldr	r0, .L809+20
-	ldr	r1, .L809+24
-	bl	printf
-.L799:
-	mov	r0, r4
-	pop	{r3, r4, r5, r6, r7, pc}
-.L810:
+.L698:
+	cmp	r2, r6
+	bcc	.L696
+	mov	r3, r8
+.L695:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L693:
+	cmp	r3, r1
+	bcs	.L692
+	mla	r7, r5, r3, r0
+	movs	r2, #0
+	mov	r8, r3
+	b	.L698
+.L692:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L700:
 	.align	2
-.L809:
-	.word	.LANCHOR114
-	.word	.LANCHOR83
-	.word	.LANCHOR115
-	.word	.LANCHOR116
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	select_l2p_ram_region, .-select_l2p_ram_region
-	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
+.L699:
+	.word	.LANCHOR124
+	.word	.LANCHOR122
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
-	.global	FtlUpdateVaildLpn
+	.global	FtlGcBufAlloc
 	.thumb
 	.thumb_func
-	.type	FtlUpdateVaildLpn, %function
-FtlUpdateVaildLpn:
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L817
-	push	{r4, r5, lr}
-	ldrh	r2, [r3, #0]
-	adds	r1, r2, #1
-	cmp	r2, #4
-	strh	r1, [r3, #0]	@ movhi
-	mov	r2, r3
-	bhi	.L812
-	cbz	r0, .L811
-.L812:
+	ldr	r3, .L708
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	movs	r7, #12
+	ldr	r8, [r3, #0]
+	movs	r6, #1
+	ldr	r3, .L708+4
+	movs	r5, #36
+	ldr	ip, [r3, #0]
 	movs	r3, #0
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L817+4
-	movw	r4, #65535
-	ldrh	r5, [r2, #0]
-	ldr	r2, .L817+8
-	ldr	r1, [r2, #0]
-	mov	r2, r3
-	b	.L814
-.L816:
-	ldrh	r0, [r1], #2
-	cmp	r0, r4
-	it	ne
-	addne	r3, r3, r0
+	b	.L702
+.L705:
+	mla	r4, r7, r2, ip
+	ldr	sl, [r4, #8]
+	cmp	sl, #0
+	bne	.L703
+	mla	r2, r5, r3, r0
+	str	r6, [r4, #8]
+	ldr	sl, [r4, #0]
+	ldr	r4, [r4, #4]
+	str	sl, [r2, #8]
+	str	r4, [r2, #12]
+	b	.L704
+.L703:
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L814:
-	cmp	r2, r5
-	bne	.L816
-	ldr	r2, .L817+12
-	str	r3, [r2, #0]
-.L811:
-	pop	{r4, r5, pc}
-.L818:
+	b	.L706
+.L707:
+	movs	r2, #0
+.L706:
+	cmp	r2, r8
+	bcc	.L705
+.L704:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L702:
+	cmp	r3, r1
+	bcc	.L707
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L709:
 	.align	2
-.L817:
-	.word	.LANCHOR117
-	.word	.LANCHOR55
-	.word	.LANCHOR101
-	.word	.LANCHOR118
-	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
-	.section	.text.ftl_set_blk_mode,"ax",%progbits
+.L708:
+	.word	.LANCHOR124
+	.word	.LANCHOR122
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
-	.global	ftl_set_blk_mode
+	.global	IsBlkInGcList
 	.thumb
 	.thumb_func
-	.type	ftl_set_blk_mode, %function
-ftl_set_blk_mode:
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L823
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-	uxth	r2, r2
-	ldr	r3, [r3, #0]
-	cbz	r1, .L820
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	orrs	r0, r0, r1
-	b	.L822
-.L820:
-	movs	r1, #1
-	lsl	r0, r1, r0
-	ldr	r1, [r3, r2, lsl #2]
-	bic	r0, r1, r0
-.L822:
-	str	r0, [r3, r2, lsl #2]
-	bx	lr
-.L824:
+	ldr	r3, .L715
+	push	{r4, lr}
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L715+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L711
+.L713:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L714
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L711:
+	cmp	r3, r1
+	bne	.L713
+	movs	r0, #0
+	pop	{r4, pc}
+.L714:
+	movs	r0, #1
+	pop	{r4, pc}
+.L716:
 	.align	2
-.L823:
-	.word	.LANCHOR119
-	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
-	.section	.text.ftl_get_blk_mode,"ax",%progbits
+.L715:
+	.word	.LANCHOR133
+	.word	.LANCHOR134
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
-	.global	ftl_get_blk_mode
+	.global	FtlGcUpdatePage
 	.thumb
 	.thumb_func
-	.type	ftl_get_blk_mode, %function
-ftl_get_blk_mode:
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	ldr	r3, .L826
-	lsrs	r2, r0, #5
-	and	r0, r0, #31
-	ldr	r3, [r3, #0]
-	ldr	r3, [r3, r2, lsl #2]
-	lsr	r0, r3, r0
-	and	r0, r0, #1
-	bx	lr
-.L827:
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ubfx	r0, r0, #10, #16
+	mov	r5, r1
+	mov	r6, r2
+	bl	P2V_block_in_plane
+	ldr	r3, .L721
+	ldrh	r7, [r3, #0]
+	ldr	r3, .L721+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r1, r2
+	b	.L718
+.L720:
+	ldrh	ip, [r1], #2
+	cmp	ip, r0
+	beq	.L719
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L718:
+	cmp	r3, r7
+	bne	.L720
+	strh	r0, [r2, r3, lsl #1]	@ movhi
+	ldr	r3, .L721
+	ldrh	r2, [r3, #0]
+	adds	r2, r2, #1
+	strh	r2, [r3, #0]	@ movhi
+.L719:
+	ldr	r0, .L721+8
+	movs	r1, #12
+	ldr	r3, .L721+12
+	ldr	r0, [r0, #0]
+	ldrh	r2, [r3, #0]
+	muls	r1, r2, r1
+	adds	r7, r0, r1
+	str	r4, [r0, r1]
+	adds	r2, r2, #1
+	str	r5, [r7, #4]
+	str	r6, [r7, #8]
+	strh	r2, [r3, #0]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L722:
 	.align	2
-.L826:
-	.word	.LANCHOR119
-	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
-	.section	.text.FtlL2PDataInit,"ax",%progbits
+.L721:
+	.word	.LANCHOR133
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.word	.LANCHOR135
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
-	.global	FtlL2PDataInit
+	.global	FtlGcPageVarInit
 	.thumb
 	.thumb_func
-	.type	FtlL2PDataInit, %function
-FtlL2PDataInit:
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L831
-	movs	r1, #0
-	push	{r4, r5, r6, r7, r8, lr}
-	ldr	r2, [r3, #0]
-	ldr	r3, .L831+4
-	ldr	r5, .L831+8
-	ldr	r4, .L831+12
+	ldr	r2, .L724
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r4, .L724+4
+	ldr	r2, .L724+8
+	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #0]
+	ldr	r3, .L724+12
 	lsls	r2, r2, #1
-	ldr	r6, .L831+16
 	ldr	r0, [r3, #0]
 	bl	memset
+	ldr	r2, .L724+16
 	ldrh	r3, [r4, #0]
-	ldrh	r2, [r6, #0]
 	movs	r1, #255
+	ldr	r0, [r2, #0]
+	movs	r2, #12
 	muls	r2, r3, r2
-	ldr	r0, [r5, #0]
 	bl	memset
-	ldr	r3, .L831+20
-	ldrh	r7, [r6, #0]
-	ldr	ip, [r5, #0]
-	movw	r5, #65535
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	ldrh	r6, [r4, #0]
-	mov	r0, r3
-	mov	r4, r3
-	b	.L829
-.L830:
-	adds	r0, r0, #1
-	bic	r3, r3, #3
-	add	r3, ip, r3
-	str	r3, [r2, #-4]
-	uxth	r0, r0
-	mov	r3, r8
-	str	r4, [r2, #-8]
-	strh	r5, [r2, #-12]	@ movhi
-.L829:
-	adds	r2, r2, #12
-	cmp	r0, r7
-	add	r8, r3, r6
-	movw	r1, #65535
-	bne	.L830
-	ldr	r2, .L831
-	ldr	r3, .L831+24
-	ldr	r2, [r2, #0]
-	strh	r1, [r3, #2]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	strh	r2, [r3, #10]	@ movhi
-	movw	r2, #61634
-	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L831+28
-	strh	r1, [r3, #40]	@ movhi
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L831+32
-	ldrh	r2, [r2, #0]
-	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L831+36
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #12]
-	ldr	r2, .L831+40
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #16]
-	ldr	r2, .L831+4
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #20]
-	ldr	r2, .L831+44
-	ldr	r2, [r2, #0]
-	str	r2, [r3, #24]
-	pop	{r4, r5, r6, r7, r8, pc}
-.L832:
-	.align	2
-.L831:
-	.word	.LANCHOR80
-	.word	.LANCHOR120
-	.word	.LANCHOR121
-	.word	.LANCHOR73
-	.word	.LANCHOR83
-	.word	.LANCHOR114
-	.word	.LANCHOR122
-	.word	.LANCHOR123
-	.word	.LANCHOR82
-	.word	.LANCHOR124
-	.word	.LANCHOR125
-	.word	.LANCHOR126
-	.size	FtlL2PDataInit, .-FtlL2PDataInit
-	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L725:
+	.align	2
+.L724:
+	.word	.LANCHOR133
+	.word	.LANCHOR58
+	.word	.LANCHOR135
+	.word	.LANCHOR134
+	.word	.LANCHOR136
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
 	.align	1
-	.global	ftl_sb_update_avl_pages
+	.global	FtlGcRefreshOpenBlock
 	.thumb
 	.thumb_func
-	.type	ftl_sb_update_avl_pages, %function
-ftl_sb_update_avl_pages:
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movs	r3, #0
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L840
-	push	{r4, r5, r6, r7, lr}
-	movw	r4, #65535
-	ldrh	r3, [r3, #0]
-	b	.L834
-.L836:
-	add	r5, r2, #8
-	ldrh	r5, [r0, r5, lsl #1]
-	cmp	r5, r4
-	beq	.L835
-	ldrh	r5, [r0, #4]
-	adds	r5, r5, #1
-	strh	r5, [r0, #4]	@ movhi
-.L835:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L834:
-	cmp	r2, r3
-	bcc	.L836
-	ldr	r2, .L840+4
-	mov	r4, r0
-	movw	r5, #65535
-	mvns	r1, r1
-	ldrh	r6, [r2, #0]
-	movs	r2, #0
-	b	.L837
-.L839:
-	ldrh	r7, [r4, #16]
-	cmp	r7, r5
-	beq	.L838
-	ldrh	r7, [r0, #4]
-	adds	r7, r6, r7
-	adds	r7, r7, r1
-	strh	r7, [r0, #4]	@ movhi
-.L838:
-	adds	r2, r2, #1
-	adds	r4, r4, #2
-	uxth	r2, r2
-.L837:
-	cmp	r2, r3
-	bne	.L839
-	pop	{r4, r5, r6, r7, pc}
-.L841:
+	push	{r4, r5, lr}
+	ldr	r4, .L729
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L727
+	ldr	r3, .L729+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L727
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L728
+	strh	r0, [r4, #0]	@ movhi
+	b	.L727
+.L728:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L727:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L730:
 	.align	2
-.L840:
-	.word	.LANCHOR53
-	.word	.LANCHOR68
-	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
-	.section	.text.make_superblock,"ax",%progbits
+.L729:
+	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
-	.global	make_superblock
+	.global	FtlGcRefreshBlock
 	.thumb
 	.thumb_func
-	.type	make_superblock, %function
-make_superblock:
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L849
-	ldrh	r2, [r0, #0]
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bcc	.L843
-	ldr	r1, .L849+4
-	movw	r2, #2296
-	ldr	r0, .L849+8
-	bl	printf
-	ldr	r0, .L849+12
-	ldr	r1, .L849+16
-	bl	printf
-.L843:
-	movs	r5, #0
-	ldr	r8, .L849+40
-	strh	r5, [r4, #4]	@ movhi
-	movw	r6, #65535
-	strb	r5, [r4, #7]
-	ldr	r7, .L849+20
-	b	.L844
-.L846:
-	ldrb	r0, [r7, r5]	@ zero_extendqisi2
-	add	sl, r5, #8
-	ldrh	r1, [r4, #0]
-	bl	V2P_block
-	strh	r6, [r4, sl, lsl #1]	@ movhi
-	mov	fp, r0
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L845
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	strh	fp, [r4, sl, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	strb	r3, [r4, #7]
-.L845:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L844:
-	ldrh	r3, [r8, #0]
-	cmp	r3, r5
-	bhi	.L846
-	ldr	r2, .L849+24
-	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	strh	r3, [r4, #4]	@ movhi
-	movs	r3, #0
-	strb	r3, [r4, #9]
-	ldr	r3, .L849+28
-	ldr	r3, [r3, #0]
-	cbz	r3, .L847
-	ldr	r3, .L849+32
-	ldrh	r2, [r4, #0]
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r2, lsl #1]
-	cmp	r3, #59
-	bhi	.L847
-	movs	r3, #1
-	strb	r3, [r4, #9]
-.L847:
-	ldr	r3, .L849+36
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L848
-	movs	r3, #1
-	strb	r3, [r4, #9]
-.L848:
+	push	{r4, r5, lr}
+	ldr	r4, .L734
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L732
+	ldr	r3, .L734+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L732
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L733
+	strh	r0, [r4, #0]	@ movhi
+	b	.L732
+.L733:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L732:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L850:
+	pop	{r4, r5, pc}
+.L735:
 	.align	2
-.L849:
-	.word	.LANCHOR55
-	.word	.LANCHOR127
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR62
-	.word	.LANCHOR68
-	.word	.LANCHOR128
-	.word	.LANCHOR96
-	.word	.LANCHOR0
-	.word	.LANCHOR53
-	.size	make_superblock, .-make_superblock
-	.section	.text.SupperBlkListInit,"ax",%progbits
+.L734:
+	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
-	.global	SupperBlkListInit
+	.global	FtlGcMarkBadPhyBlk
 	.thumb
 	.thumb_func
-	.type	SupperBlkListInit, %function
-SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L862
-	ldr	r3, .L862+4
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r1, #0
-	ldrh	r3, [r3, #0]
-	movs	r5, #0
-	ldr	r0, [r2, #0]
-	movs	r2, #6
-	muls	r2, r3, r2
-	mov	r4, r5
-	bl	memset
-	ldr	r3, .L862+8
-	mov	r8, r5
-	mov	sl, r5
-	str	r5, [r3, #0]
-	ldr	r3, .L862+12
-	str	r5, [r3, #0]
-	ldr	r3, .L862+16
-	str	r5, [r3, #0]
-	ldr	r3, .L862+20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L862+24
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L862+28
-	strh	r5, [r3, #0]	@ movhi
-	b	.L852
-.L854:
-	ldr	r2, .L862+32
-	mov	r1, r4
-	ldrb	r0, [r2, r7]	@ zero_extendqisi2
-	str	ip, [sp, #4]
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	ldr	ip, [sp, #4]
-	cbnz	r0, .L853
-	ldrh	r2, [fp, #0]
-	adds	r6, r6, r2
-	uxth	r6, r6
-.L853:
-	adds	r7, r7, #1
-	b	.L859
-.L861:
-	movs	r7, #0
-	uxth	r3, r4
-	ldr	fp, .L862+76
-	mov	ip, r4
-	mov	r6, r7
-	mov	r4, r3
-.L859:
-	ldr	r3, .L862+36
-	ldrh	r2, [r3, #0]
-	cmp	r7, r2
-	blt	.L854
-	mov	r4, ip
-	cbz	r6, .L855
-	sxth	r1, r6
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	uxth	r6, r0
-	b	.L856
-.L855:
-	ldr	r3, .L862+40
-	movw	r2, #65535
-	ldr	r3, [r3, #0]
-	strh	r2, [r3, ip, lsl #1]	@ movhi
-.L856:
-	ldr	r3, .L862
-	ldr	r3, [r3, #0]
-	adds	r3, r3, r5
-	strh	r6, [r3, #4]	@ movhi
-	ldr	r3, .L862+44
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L857
-	ldr	r3, .L862+48
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L857
-	ldr	r3, .L862+52
-	ldrh	r3, [r3, #0]
-	cmp	r4, r3
-	beq	.L857
-	ldr	r3, .L862+40
-	uxth	r0, r4
-	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L858
-	add	r8, r8, #1
-	uxth	r8, r8
-	bl	INSERT_FREE_LIST
-	b	.L857
-.L858:
-	add	sl, sl, #1
-	uxth	sl, sl
-	bl	INSERT_DATA_LIST
-.L857:
-	adds	r4, r4, #1
-	adds	r5, r5, #6
-.L852:
-	ldr	r2, .L862+56
-	ldrh	r3, [r2, #0]
-	cmp	r4, r3
-	blt	.L861
-	ldr	r2, .L862+20
-	strh	sl, [r2, #0]	@ movhi
-	ldr	r2, .L862+24
-	strh	r8, [r2, #0]	@ movhi
-	add	r8, sl, r8
-	cmp	r8, r3
-	ble	.L860
-	ldr	r1, .L862+60
-	movw	r2, #2366
-	ldr	r0, .L862+64
-	bl	printf
-	ldr	r0, .L862+68
-	ldr	r1, .L862+72
-	bl	printf
-.L860:
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	bl	P2V_block_in_plane
+	mov	r5, r0
+	bl	FtlGcRefreshBlock
+	ldr	r3, .L741
+	ldr	r3, [r3, #0]
+	cbz	r3, .L737
+	ldr	r3, .L741+4
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	cmp	r2, #29
+	bls	.L737
+	subs	r2, r2, #30
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+.L737:
+	ldr	r3, .L741+8
+	ldr	r2, .L741+12
+	ldrh	r1, [r3, #0]
+	movs	r3, #0
+	b	.L738
+.L740:
+	ldrh	r0, [r2, #2]!
+	cmp	r0, r4
+	beq	.L739
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L738:
+	cmp	r3, r1
+	bne	.L740
+	cmp	r3, #15
+	bhi	.L739
+	ldr	r2, .L741+16
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	ldr	r2, .L741+8
+	strh	r3, [r2, #0]	@ movhi
+.L739:
 	movs	r0, #0
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L863:
+	pop	{r3, r4, r5, pc}
+.L742:
 	.align	2
-.L862:
-	.word	.LANCHOR99
-	.word	.LANCHOR56
-	.word	.LANCHOR105
-	.word	.LANCHOR100
-	.word	.LANCHOR102
-	.word	.LANCHOR103
-	.word	.LANCHOR106
-	.word	.LANCHOR129
-	.word	.LANCHOR62
-	.word	.LANCHOR53
-	.word	.LANCHOR101
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR55
-	.word	.LANCHOR130
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR68
-	.size	SupperBlkListInit, .-SupperBlkListInit
-	.section	.text.update_multiplier_value,"ax",%progbits
+.L741:
+	.word	.LANCHOR116
+	.word	.LANCHOR84
+	.word	.LANCHOR139
+	.word	.LANCHOR140-2
+	.word	.LANCHOR140
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
-	.global	update_multiplier_value
+	.global	FtlGcReFreshBadBlk
 	.thumb
 	.thumb_func
-	.type	update_multiplier_value, %function
-update_multiplier_value:
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, r8, sl, lr}
-	movs	r4, #0
-	mov	r6, r0
-	mov	r5, r4
-	ldr	sl, .L869+8
-	ldr	r8, .L869+12
-	ldr	r7, .L869
-	b	.L865
-.L867:
-	mov	r1, r6
-	ldrb	r0, [r8, r5]	@ zero_extendqisi2
-	bl	V2P_block
-	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L866
-	ldrh	r3, [r7, #0]
-	adds	r4, r4, r3
-	uxth	r4, r4
-.L866:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L865:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L867
-	cbz	r4, .L868
-	mov	r1, r4
-	mov	r0, #32768
-	bl	__aeabi_idiv
-	uxth	r4, r0
-.L868:
-	ldr	r3, .L869+4
-	movs	r2, #6
+	ldr	r3, .L746
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L744
+	ldr	r2, .L746+4
+	ldrh	r1, [r2, #0]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L744
+	ldr	r4, .L746+8
+	ldrh	r2, [r4, #0]
+	cmp	r2, r3
+	bcc	.L745
+	movs	r3, #0
+	strh	r3, [r4, #0]	@ movhi
+.L745:
+	ldr	r3, .L746+12
+	ldrh	r2, [r4, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+.L744:
 	movs	r0, #0
-	ldr	r3, [r3, #0]
-	mla	r6, r2, r6, r3
-	strh	r4, [r6, #4]	@ movhi
-	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L870:
+	pop	{r4, pc}
+.L747:
 	.align	2
-.L869:
-	.word	.LANCHOR68
-	.word	.LANCHOR99
-	.word	.LANCHOR53
-	.word	.LANCHOR62
-	.size	update_multiplier_value, .-update_multiplier_value
-	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+.L746:
+	.word	.LANCHOR139
+	.word	.LANCHOR137
+	.word	.LANCHOR141
+	.word	.LANCHOR140
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
-	.global	GetFreeBlockMinEraseCount
+	.global	ftl_memset
 	.thumb
 	.thumb_func
-	.type	GetFreeBlockMinEraseCount, %function
-GetFreeBlockMinEraseCount:
+	.type	ftl_memset, %function
+ftl_memset:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L874
-	ldr	r0, [r3, #0]
-	cbz	r0, .L872
-	ldr	r3, .L874+4
-	ldr	r3, [r3, #0]
-	subs	r0, r0, r3
-	ldr	r3, .L874+8
-	asrs	r0, r0, #1
-	muls	r0, r3, r0
-	ldr	r3, .L874+12
-	uxth	r0, r0
-	ldr	r3, [r3, #0]
-	ldrh	r0, [r3, r0, lsl #1]
-.L872:
-	bx	lr
-.L875:
-	.align	2
-.L874:
-	.word	.LANCHOR105
-	.word	.LANCHOR99
-	.word	-1431655765
-	.word	.LANCHOR96
-	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
-	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.ftl_memcpy,"ax",%progbits
 	.align	1
-	.global	GetFreeBlockMaxEraseCount
+	.global	ftl_memcpy
 	.thumb
 	.thumb_func
-	.type	GetFreeBlockMaxEraseCount, %function
-GetFreeBlockMaxEraseCount:
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.ftl_memcpy32,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy32
+	.thumb
+	.thumb_func
+	.type	ftl_memcpy32, %function
+ftl_memcpy32:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L883
+	movs	r3, #0
+	push	{r4, r5, lr}
+	mov	r4, r3
+	b	.L751
+.L752:
+	ldr	r5, [r1, r3]
+	adds	r4, r4, #1
+	str	r5, [r0, r3]
+	adds	r3, r3, #4
+.L751:
+	cmp	r4, r2
+	bne	.L752
+	pop	{r4, r5, pc}
+	.size	ftl_memcpy32, .-ftl_memcpy32
+	.section	.text.NandcCopy1KB,"ax",%progbits
+	.align	1
+	.global	NandcCopy1KB
+	.thumb
+	.thumb_func
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, lr}
-	ldr	r3, [r3, #0]
-	cbz	r3, .L882
-	ldr	r2, .L883+4
-	movs	r1, #7
-	movw	r5, #65535
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
-	asrs	r2, r2, #3
-	cmp	r0, r2
-	it	gt
-	uxthgt	r0, r2
-	ldr	r2, .L883+8
-	movs	r6, #6
-	ldr	r1, [r2, #0]
-	ldr	r2, .L883+12
-	subs	r3, r3, r1
-	asrs	r3, r3, #1
-	muls	r3, r2, r3
-	movs	r2, #0
-	uxth	r3, r3
-	b	.L879
-.L881:
-	mul	r4, r6, r3
-	ldrh	r4, [r1, r4]
-	cmp	r4, r5
-	beq	.L880
-	adds	r2, r2, #1
-	mov	r3, r4
-	uxth	r2, r2
-.L879:
-	cmp	r2, r0
-	bne	.L881
-.L880:
-	ldr	r2, .L883+16
-	ldr	r2, [r2, #0]
-	ldrh	r0, [r2, r3, lsl #1]
+	cmp	r1, #1
+	mov	r4, r2
+	add	r2, r0, #4096
+	ldr	r5, [sp, #16]
+	add	r6, r0, #512
+	add	r2, r2, r4, lsl #9
+	bne	.L754
+	cbz	r3, .L755
+	mov	r0, r2
+	lsls	r2, r3, #30
+	mov	r1, r3
+	bne	.L756
+	mov	r2, #256
+	bl	ftl_memcpy32
+	b	.L755
+.L756:
+	mov	r2, #1024
+	bl	memcpy
+.L755:
+	cbz	r5, .L753
+	lsrs	r4, r4, #1
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	lsls	r3, r3, #16
+	orr	r3, r3, r2, lsl #8
+	ldrb	r2, [r5, #0]	@ zero_extendqisi2
+	orrs	r3, r3, r2
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L882:
+.L754:
+	cbz	r3, .L758
 	mov	r0, r3
+	lsls	r3, r3, #30
+	mov	r1, r2
+	bne	.L759
+	mov	r2, #256
+	bl	ftl_memcpy32
+	b	.L758
+.L759:
+	mov	r2, #1024
+	bl	memcpy
+.L758:
+	cbz	r5, .L753
+	lsrs	r4, r4, #1
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldr	r3, [r6, r4]
+	lsrs	r2, r3, #8
+	strb	r3, [r5, #0]
+	strb	r2, [r5, #1]
+	lsrs	r2, r3, #16
+	lsrs	r3, r3, #24
+	strb	r2, [r5, #2]
+	strb	r3, [r5, #3]
+.L753:
 	pop	{r4, r5, r6, pc}
-.L884:
-	.align	2
-.L883:
-	.word	.LANCHOR105
-	.word	.LANCHOR106
-	.word	.LANCHOR99
-	.word	-1431655765
-	.word	.LANCHOR96
-	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
-	.section	.text.free_data_superblock,"ax",%progbits
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",%progbits
 	.align	1
-	.global	free_data_superblock
+	.global	NandcXferData
 	.thumb
 	.thumb_func
-	.type	free_data_superblock, %function
-free_data_superblock:
-	@ args = 0, pretend = 0, frame = 0
+	.type	NandcXferData, %function
+NandcXferData:
+	@ args = 4, pretend = 0, frame = 80
 	@ frame_needed = 0, uses_anonymous_args = 0
-	movw	r2, #65535
-	cmp	r0, r2
-	push	{r3, lr}
-	beq	.L886
-	ldr	r2, .L887
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #88
+	mov	r4, r3
+	mov	fp, r3
+	ldr	r3, .L798
+	mov	r6, r0
+	str	r1, [sp, #12]
+	lsls	r1, r4, #26
+	mov	sl, r2
+	ldr	r5, [sp, #120]
+	ldr	r8, [r3, r0, lsl #3]
+	bne	.L761
+	cbnz	r5, .L762
+	add	r0, sp, #20
+	movs	r1, #255
+	movs	r2, #64
+	add	r5, sp, #20
+	bl	memset
+.L762:
+	movs	r3, #0
+	mov	r0, r6
+	ldr	r1, [sp, #12]
+	mov	r2, sl
+	stmia	sp, {r4, r5}
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L785
+	ldr	r3, .L798+4
+	lsr	r0, sl, #1
+	ldr	r1, .L798+8
+	ldr	r4, [r3, #0]
+	ldr	r3, [sp, #12]
+	cmp	r4, #24
+	ite	hi
+	movhi	r4, #128
+	movls	r4, #64
+	mov	r2, r3
+	b	.L765
+.L766:
+	ldr	r7, [r1, #4]
+	lsrs	r3, r3, #2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r3, lsl #2]
+	lsrs	r7, r3, #8
+	strb	r3, [r5, #0]
+	strb	r7, [r5, #1]
+	lsrs	r7, r3, #16
+	lsrs	r3, r3, #24
+	strb	r7, [r5, #2]
+	strb	r3, [r5, #3]
+	adds	r5, r5, #4
+	mov	r3, r6
+.L765:
+	cmp	r2, r0
+	add	r6, r3, r4
+	bcc	.L766
+	ldr	r3, .L798+4
+	lsr	sl, sl, #2
+	ldr	r0, [r3, #0]
+	ldr	r3, .L798+12
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	mov	r4, r3
+	b	.L767
+.L773:
+	add	r2, r3, #8
+	ldr	r2, [r8, r2, lsl #2]
+	str	r2, [sp, #84]
+	ldr	r2, [sp, #84]
+	lsls	r2, r2, #29
+	bmi	.L788
+	ldr	r2, [sp, #84]
+	ands	r2, r2, #32768
+	bne	.L788
+	cmp	r1, #5
+	bls	.L769
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #27, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #29, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L770
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #27, #1
+	b	.L797
+.L770:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #29, #1
+	b	.L797
+.L769:
+	cmp	r1, #3
+	bls	.L771
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #28, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #30, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L772
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #28, #1
+	b	.L797
+.L772:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #30, #1
+.L797:
+	orr	r2, r5, r2, lsl #5
+.L771:
+	cmp	r4, r2
+	it	cc
+	movcc	r4, r2
+	b	.L768
+.L788:
+	mov	r4, #-1
+.L768:
+	adds	r3, r3, #1
+.L767:
+	cmp	r3, sl
+	bcs	.L763
+	cmp	r0, #0
+	bne	.L773
+	b	.L763
+.L785:
+	movs	r4, #0
+.L763:
+	movs	r3, #0
+	str	r3, [r8, #16]
+	b	.L774
+.L761:
+	ldr	r3, [sp, #12]
+	mov	r7, #0
+	cmp	r3, #1
+	bne	.L795
+	b	.L775
+.L778:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	and	r4, r7, #3
+	mov	r0, r8
+	movs	r1, #1
+	mla	r3, r7, r3, r5
+	mov	r2, r4
+	adds	r7, r7, #2
+	str	r3, [sp, #0]
+	mov	r3, fp
+	bl	NandcCopy1KB
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	str	r3, [sp, #4]
+	movs	r1, #1
+	movs	r2, #2
+	mov	r3, r4
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	add	fp, fp, #1024
+.L775:
+	cmp	r7, sl
+	bcc	.L778
+	movs	r4, #0
+	b	.L774
+.L795:
+	mov	r1, r7
+	movs	r2, #2
+	mov	r3, r7
+	str	r7, [sp, #0]
+	str	r7, [sp, #4]
+	mov	r4, r7
+	bl	NandcXferStart
+	b	.L779
+.L783:
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [r8, #32]
+	add	ip, r7, #2
+	cmp	ip, sl
+	str	r3, [sp, #84]
+	bcs	.L780
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	mov	r1, r3
+	str	r3, [sp, #4]
+	movs	r2, #2
+	and	r3, ip, #3
+	str	ip, [sp, #8]
+	bl	NandcXferStart
+	ldr	ip, [sp, #8]
+.L780:
+	ldr	r3, [sp, #84]
+	lsls	r1, r3, #29
+	bmi	.L792
+	ldr	r2, [sp, #84]
+	ldr	r3, [sp, #84]
+	ubfx	r2, r2, #3, #5
+	ubfx	r3, r3, #27, #1
+	orr	r3, r2, r3, lsl #5
+	cmp	r4, r3
+	it	cc
+	movcc	r4, r3
+	b	.L781
+.L792:
+	mov	r4, #-1
+.L781:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	sub	r2, ip, #2
+	mov	r0, r8
 	movs	r1, #0
+	mla	r7, r7, r3, r5
+	and	r2, r2, #3
+	mov	r3, fp
+	str	ip, [sp, #8]
+	add	fp, fp, #1024
+	str	r7, [sp, #0]
+	bl	NandcCopy1KB
+	ldr	ip, [sp, #8]
+	mov	r7, ip
+.L779:
+	cmp	r7, sl
+	bcc	.L783
+.L774:
+	ldr	r3, .L798+12
+	ldr	r3, [r3, #0]
+	cmp	r3, #5
+	bls	.L784
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L784
+	ldr	r3, [r8, #0]
+	and	r2, r3, #139264
+	cmp	r2, #139264
+	bne	.L784
+	mov	r4, #-1
+	orr	r3, r3, #131072
+	str	r3, [r8, #0]
+.L784:
+	mov	r0, r4
+	add	sp, sp, #88
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L799:
+	.align	2
+.L798:
+	.word	.LANCHOR5
+	.word	.LANCHOR36
+	.word	.LANCHOR38
+	.word	.LANCHOR37
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashProgPage,"ax",%progbits
+	.align	1
+	.global	FlashProgPage
+	.thumb
+	.thumb_func
+	.type	FlashProgPage, %function
+FlashProgPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L803
+	mov	r5, r1
+	mov	r6, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L801
+	ldr	r3, .L803+4
+	ldr	r2, .L803+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
-	strh	r1, [r2, r0, lsl #1]	@ movhi
-	bl	INSERT_FREE_LIST
-.L886:
-	movs	r0, #0
-	pop	{r3, pc}
-.L888:
+	muls	r3, r2, r3
+	cmp	r1, r3
+	bcs	.L801
+	ldr	r3, .L803+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L802
+	subs	r7, r7, #2
+	b	.L801
+.L802:
+	movs	r7, #4
+.L801:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r0, r4
+	mov	r1, r5
+	bl	FlashProgFirstCmd
+	uxtb	r2, r7
+	mov	r3, r6
+	movs	r1, #1
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r5, #1
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L804:
 	.align	2
-.L887:
-	.word	.LANCHOR101
-	.size	free_data_superblock, .-free_data_superblock
-	.section	.text.FtlGcBufInit,"ax",%progbits
+.L803:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
 	.align	1
-	.global	FtlGcBufInit
+	.global	FlashPageProgMsbFFData
 	.thumb
 	.thumb_func
-	.type	FtlGcBufInit, %function
-FtlGcBufInit:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L894
-	movs	r2, #0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, .L813
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r2
-	str	r2, [r3, #0]
-	ldr	r3, .L894+4
-	ldrh	ip, [r3, #0]
-	ldr	r3, .L894+8
-	ldr	r7, [r3, #0]
-	ldr	r3, .L894+12
-	ldr	r6, [r3, #0]
-	ldr	r3, .L894+16
-	ldr	r1, [r3, #0]
-	ldr	r3, .L894+20
-	ldrh	r5, [r3, #0]
-	ldr	r3, .L894+24
-	str	r5, [sp, #4]
-	ldrh	fp, [r3, #0]
-	ldr	r3, .L894+28
-	ldr	r0, [r3, #0]
-	mov	r3, r2
-	b	.L890
-.L891:
-	movs	r5, #1
-	bic	r4, r4, #3
-	adds	r3, r3, r5
-	bic	r2, r2, #3
-	adds	r4, r7, r4
-	adds	r2, r6, r2
-	str	r4, [r1, #-12]
-	uxth	r3, r3
-	str	r2, [r1, #-8]
-	str	r5, [r1, #-4]
-	str	r4, [r0, #-28]
-	mov	r4, r8
-	str	r2, [r0, #-24]
-	mov	r2, sl
-.L890:
-	adds	r1, r1, #12
-	ldr	r5, [sp, #4]
-	adds	r0, r0, #36
-	cmp	r3, ip
-	add	r8, r4, r5
-	add	sl, r2, fp
-	bne	.L891
-	ldr	r1, .L894+8
-	movs	r4, #12
-	ldr	r2, .L894+32
-	mov	fp, #0
-	ldr	ip, [r1, #0]
-	ldr	r1, .L894+20
-	ldr	r8, [r2, #0]
-	ldr	r2, .L894+16
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L894+12
-	ldr	r2, [r2, #0]
-	ldr	r6, [r1, #0]
-	ldr	r1, .L894+24
-	ldrh	r5, [r1, #0]
-	b	.L892
-.L893:
-	mul	r1, r4, r3
-	mul	r0, r7, r3
-	add	sl, r2, r1
-	bic	r0, r0, #3
-	str	fp, [sl, #8]
-	add	r0, ip, r0
-	str	r0, [r2, r1]
-	mul	r1, r5, r3
-	adds	r3, r3, #1
-	uxth	r3, r3
-	bic	r1, r1, #3
-	adds	r1, r6, r1
-	str	r1, [sl, #4]
-.L892:
-	cmp	r3, r8
-	bcc	.L893
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L895:
+	ldr	r2, .L813+4
+	mov	r8, r0
+	ldr	r3, [r3, #0]
+	mov	r7, r1
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cbz	r2, .L806
+	ldr	r2, .L813+8
+	ldr	r1, [r2, #0]
+	ldr	r2, .L813+12
+	cmp	r1, r2
+	beq	.L805
+.L806:
+	subs	r2, r3, #5
+	cmp	r2, #2
+	bls	.L810
+	cmp	r3, #68
+	beq	.L810
+	cmp	r3, #35
+	beq	.L810
+	cmp	r3, #19
+	bne	.L805
+	b	.L810
+.L811:
+	ldrh	r3, [sl, r4, lsl #1]
+	cmp	r3, fp
+	bne	.L805
+	movs	r1, #255
+	mov	r2, #32768
+	ldr	r0, [r5, #0]
+	bl	memset
+	adds	r1, r4, r7
+	adds	r4, r4, #1
+	mov	r0, r8
+	ldr	r2, [r5, #0]
+	movs	r3, #0
+	bl	FlashProgPage
+	uxth	r4, r4
+	b	.L812
+.L810:
+	ldr	r6, .L813
+	movw	fp, #65535
+	ldr	sl, .L813+20
+	ldr	r5, .L813+16
+.L812:
+	ldr	r3, [r6, #0]
+	ldrh	r3, [r3, #10]
+	cmp	r3, r4
+	bhi	.L811
+.L805:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L814:
 	.align	2
-.L894:
-	.word	.LANCHOR131
-	.word	.LANCHOR53
-	.word	.LANCHOR132
-	.word	.LANCHOR133
-	.word	.LANCHOR134
-	.word	.LANCHOR73
-	.word	.LANCHOR74
-	.word	.LANCHOR135
-	.word	.LANCHOR136
-	.size	FtlGcBufInit, .-FtlGcBufInit
-	.section	.text.FtlVariablesInit,"ax",%progbits
+.L813:
+	.word	.LANCHOR23
+	.word	.LANCHOR7
+	.word	.LANCHOR142
+	.word	1446522928
+	.word	.LANCHOR143
+	.word	.LANCHOR9
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.FlashReadRawPage,"ax",%progbits
 	.align	1
-	.global	FtlVariablesInit
+	.global	FlashReadRawPage
 	.thumb
 	.thumb_func
-	.type	FtlVariablesInit, %function
-FtlVariablesInit:
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r4, #0
-	ldr	r3, .L897
-	movw	r2, #65535
-	ldr	r5, .L897+4
-	mov	r1, r4
-	str	r4, [r3, #0]
-	ldr	r3, .L897+8
-	strh	r2, [r3, #0]	@ movhi
-	mov	r2, #-1
-	ldr	r3, .L897+12
-	str	r4, [r3, #0]
-	ldr	r3, .L897+16
-	str	r4, [r3, #0]
-	ldr	r3, .L897+20
-	str	r2, [r3, #0]
-	ldr	r3, .L897+24
-	str	r4, [r3, #0]
-	ldr	r3, .L897+28
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L897+32
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L897+36
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r2, [r5, #0]
-	ldr	r3, .L897+40
-	mov	r1, r4
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r3, .L897+44
-	ldrh	r2, [r5, #0]
-	mov	r1, r4
-	ldr	r0, [r3, #0]
-	lsls	r2, r2, #1
-	bl	memset
-	mov	r1, r4
-	movs	r2, #48
-	ldr	r0, .L897+48
-	bl	memset
-	mov	r1, r4
-	mov	r2, #512
-	ldr	r0, .L897+52
-	bl	memset
-	bl	FtlGcBufInit
-	bl	FtlL2PDataInit
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L818
+	mov	r6, r1
+	mov	r5, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L816
+	ldr	r3, .L818+4
+	ldr	r2, .L818+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	it	cc
+	movcc	r7, #4
+.L816:
 	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L898:
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r1, r6
+	mov	r0, r4
+	bl	FlashReadCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r3, r5
+	movs	r1, #0
+	mov	r2, r7
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L819:
 	.align	2
-.L897:
-	.word	.LANCHOR137
-	.word	.LANCHOR56
-	.word	.LANCHOR138
-	.word	.LANCHOR139
-	.word	.LANCHOR140
-	.word	.LANCHOR141
-	.word	.LANCHOR128
-	.word	.LANCHOR86
-	.word	.LANCHOR77
-	.word	.LANCHOR87
-	.word	.LANCHOR96
-	.word	.LANCHOR142
-	.word	.LANCHOR143
-	.word	.LANCHOR144
-	.size	FtlVariablesInit, .-FtlVariablesInit
-	.section	.text.FtlGcBufFree,"ax",%progbits
+.L818:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.HynixReadRetrial,"ax",%progbits
 	.align	1
-	.global	FtlGcBufFree
+	.global	HynixReadRetrial
 	.thumb
 	.thumb_func
-	.type	FtlGcBufFree, %function
-FtlGcBufFree:
-	@ args = 0, pretend = 0, frame = 0
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L906
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #36
-	ldr	r6, [r3, #0]
-	ldr	r3, .L906+4
-	ldr	r4, [r3, #0]
-	movs	r3, #0
-	mov	fp, r3
-	b	.L900
-.L903:
-	mov	ip, #12
-	mul	r3, ip, r2
-	add	sl, r4, r3
-	ldr	ip, [r4, r3]
-	ldr	r3, [r7, #8]
-	cmp	ip, r3
-	bne	.L901
-	mov	r3, r8
-	str	fp, [sl, #8]
-	b	.L902
-.L901:
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L905:
-	cmp	r2, r6
-	bcc	.L903
-	mov	r3, r8
-.L902:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L900:
-	cmp	r3, r1
-	bcs	.L899
-	mla	r7, r5, r3, r0
-	movs	r2, #0
-	mov	r8, r3
-	b	.L905
-.L899:
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L907:
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r2
+	ldr	r2, .L835
+	mov	r7, r3
+	mov	r6, r0
+	str	r1, [sp, #4]
+	adds	r3, r2, r0
+	mov	r8, #0
+	ldrb	fp, [r2, #2]	@ zero_extendqisi2
+	mov	r5, #-1
+	ldr	r2, .L835+4
+	ldrb	r4, [r3, #12]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
+	it	eq
+	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
+	bl	NandcWaitFlashReady
+	b	.L822
+.L827:
+	adds	r4, r4, #1
+	ldr	r2, .L835
+	mov	r0, r6
+	uxtb	r4, r4
+	cmp	r4, fp
+	it	cs
+	movcs	r4, #0
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	mov	r3, r4
+	adds	r2, r2, #4
+	bl	HynixSetRRPara
+	mov	r3, r7
+	mov	r0, r6
+	ldr	r1, [sp, #4]
+	mov	r2, sl
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	beq	.L824
+	ldr	r2, .L835+8
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L833
+	movs	r7, #0
+	mov	sl, r7
+.L824:
+	add	r8, r8, #1
+.L822:
+	cmp	r8, fp
+	bcc	.L827
+	b	.L826
+.L833:
+	mov	r5, r0
+.L826:
+	ldr	r3, .L835+4
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L835
+	add	r6, r3, r6
+	ldr	r3, .L835+8
+	it	eq
+	strbeq	r4, [r6, #20]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	it	ne
+	strbne	r4, [r6, #12]
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L830
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L830:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L836:
 	.align	2
-.L906:
-	.word	.LANCHOR136
-	.word	.LANCHOR134
-	.size	FtlGcBufFree, .-FtlGcBufFree
-	.section	.text.FtlGcBufAlloc,"ax",%progbits
+.L835:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR29
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
-	.global	FtlGcBufAlloc
+	.global	MicronReadRetrial
 	.thumb
 	.thumb_func
-	.type	FtlGcBufAlloc, %function
-FtlGcBufAlloc:
-	@ args = 0, pretend = 0, frame = 0
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L915
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	movs	r7, #12
-	ldr	r8, [r3, #0]
-	movs	r6, #1
-	ldr	r3, .L915+4
-	movs	r5, #36
-	ldr	ip, [r3, #0]
-	movs	r3, #0
-	b	.L909
-.L912:
-	mla	r4, r7, r2, ip
-	ldr	sl, [r4, #8]
-	cmp	sl, #0
-	bne	.L910
-	mla	r2, r5, r3, r0
-	str	r6, [r4, #8]
-	ldr	sl, [r4, #0]
-	ldr	r4, [r4, #4]
-	str	sl, [r2, #8]
-	str	r4, [r2, #12]
-	b	.L911
-.L910:
-	adds	r2, r2, #1
-	uxth	r2, r2
-	b	.L913
-.L914:
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L851
+	mov	sl, r0
+	sub	sp, sp, #24
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L851+4
+	str	r1, [sp, #16]
+	str	r2, [sp, #20]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L838
+	add	r0, r0, r0, lsl #1
+	ubfx	r0, r0, #2, #8
+	b	.L850
+.L838:
+	movs	r1, #3
+	bl	__aeabi_idiv
+	uxtb	r0, r0
+.L850:
+	str	r0, [sp, #12]
+	mov	r0, sl
+	bl	NandcWaitFlashReady
+	ldr	r3, .L851+8
+	mov	r8, #0
+	mov	r4, #-1
+	ldr	r6, [r3, sl, lsl #3]
+	add	r3, r3, sl, lsl #3
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	adds	r7, r7, #8
+	lsls	r7, r7, #8
+	adds	r5, r6, r7
+	b	.L840
+.L844:
+	movs	r2, #239
+	movs	r3, #137
+	str	r2, [r5, #8]
+	movs	r0, #200
+	str	r3, [r5, #4]
+	bl	udelay
 	movs	r2, #0
-.L913:
-	cmp	r2, r8
-	bcc	.L912
-.L911:
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L909:
-	cmp	r3, r1
-	bcc	.L914
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L916:
+	add	ip, r8, #1
+	mov	r0, sl
+	str	ip, [r5, #0]
+	mov	r3, fp
+	str	r2, [r5, #0]
+	ldr	r1, [sp, #16]
+	str	r2, [r5, #0]
+	str	r2, [r5, #0]
+	ldr	r2, [sp, #20]
+	str	ip, [sp, #8]
+	bl	FlashReadRawPage
+	ldr	ip, [sp, #8]
+	adds	r2, r0, #1
+	beq	.L841
+	ldr	r3, [sp, #12]
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	cmp	r0, r3
+	bcc	.L848
+	mov	fp, #0
+	str	fp, [sp, #20]
+.L841:
+	mov	r8, ip
+.L840:
+	ldr	r2, .L851+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r8, r3
+	bcc	.L844
+	b	.L843
+.L848:
+	mov	r4, r0
+.L843:
+	movs	r3, #239
+	movs	r0, #200
+	str	r3, [r5, #8]
+	movs	r3, #137
+	str	r3, [r5, #4]
+	bl	udelay
+	movs	r3, #0
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	bcc	.L845
+	ldr	r0, .L851+16
+	mov	r1, r8
+	ldr	r2, [sp, #16]
+	mov	r3, r8
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+	str	r4, [sp, #0]
+	bl	printf
+.L845:
+	mov	r0, r4
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L852:
 	.align	2
-.L915:
-	.word	.LANCHOR136
-	.word	.LANCHOR134
-	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
-	.section	.text.IsBlkInGcList,"ax",%progbits
+.L851:
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.word	.LANCHOR144
+	.word	.LC7
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
 	.align	1
-	.global	IsBlkInGcList
+	.global	SamsungReadRetrial
 	.thumb
 	.thumb_func
-	.type	IsBlkInGcList, %function
-IsBlkInGcList:
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L922
-	push	{r4, lr}
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L922+4
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	b	.L918
-.L920:
-	ldrh	r4, [r2], #2
-	cmp	r4, r0
-	beq	.L921
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	r8, r2
+	mov	r6, r3
+	mov	fp, r1
+	bl	NandcWaitFlashReady
+	ldr	r3, .L863
+	movs	r5, #1
+	mov	r4, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	sl, [r3, #4]	@ zero_extendqisi2
+	add	sl, sl, #8
+	add	sl, r2, sl, lsl #8
+	b	.L854
+.L858:
+	mov	r0, sl
+	uxtb	r1, r5
+	bl	SamsungSetRRPara
+	mov	r1, fp
+	mov	r0, r7
+	mov	r2, r8
+	mov	r3, r6
+	bl	FlashReadRawPage
+	adds	r1, r0, #1
+	beq	.L855
+	ldr	r2, .L863+4
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L861
+	movs	r6, #0
+	mov	r8, r6
+.L855:
+	adds	r5, r5, #1
+.L854:
+	ldr	r2, .L863+8
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	uxth	r3, r3
-.L918:
-	cmp	r3, r1
-	bne	.L920
-	movs	r0, #0
-	pop	{r4, pc}
-.L921:
-	movs	r0, #1
-	pop	{r4, pc}
-.L923:
+	cmp	r5, r3
+	bcc	.L858
+	b	.L857
+.L861:
+	mov	r4, r0
+.L857:
+	movs	r1, #0
+	mov	r0, sl
+	bl	SamsungSetRRPara
+	ldr	r3, .L863+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcc	.L859
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+.L859:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L864:
 	.align	2
-.L922:
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.size	IsBlkInGcList, .-IsBlkInGcList
-	.section	.text.FtlGcUpdatePage,"ax",%progbits
+.L863:
+	.word	.LANCHOR5
+	.word	.LANCHOR29
+	.word	.LANCHOR144
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
 	.align	1
-	.global	FtlGcUpdatePage
+	.global	ToshibaReadRetrial
 	.thumb
 	.thumb_func
-	.type	FtlGcUpdatePage, %function
-FtlGcUpdatePage:
-	@ args = 0, pretend = 0, frame = 0
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	mov	r4, r0
-	ubfx	r0, r0, #10, #16
-	mov	r5, r1
-	mov	r6, r2
-	bl	P2V_block_in_plane
-	ldr	r3, .L928
-	ldrh	r7, [r3, #0]
-	ldr	r3, .L928+4
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	mov	r1, r2
-	b	.L925
-.L927:
-	ldrh	ip, [r1], #2
-	cmp	ip, r0
-	beq	.L926
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	fp, r2
+	mov	r8, r3
+	str	r1, [sp, #4]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L887
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L887+4
+	adds	r4, r4, #8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r4, r2, r4, lsl #8
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bls	.L882
+	ldr	r3, .L887+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L883
+	movs	r0, #0
+	mov	sl, #1
+	bl	NandcSetDdrMode
+	b	.L867
+.L883:
+	mov	sl, r3
+.L867:
+	movs	r3, #92
+	str	r3, [r4, #8]
+	movs	r3, #197
+	str	r3, [r4, #8]
+	b	.L866
+.L882:
+	mov	sl, #0
+.L866:
+	movs	r6, #1
+	mov	r5, #-1
+	b	.L868
+.L877:
+	ldr	r1, .L887+4
+	mov	r0, r4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	uxtb	r1, r6
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L869
+	bl	SandiskSetRRPara
+	b	.L870
+.L869:
+	bl	ToshibaSetRRPara
+.L870:
+	ldr	r2, .L887+4
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L871
+	ldr	r1, .L887+12
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r6, r3
+	bne	.L871
+	movs	r2, #179
+	str	r2, [r4, #8]
+.L871:
+	movs	r3, #38
+	str	r3, [r4, #8]
+	movs	r3, #93
+	str	r3, [r4, #8]
+	cmp	sl, #0
+	beq	.L872
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	mov	r3, r8
+	mov	r0, r7
+	bl	FlashReadRawPage
+	mov	r3, r0
+	movs	r0, #0
+	str	r3, [sp, #0]
+	bl	NandcSetDdrMode
+	ldr	r3, [sp, #0]
+	b	.L873
+.L872:
+	mov	r3, r8
+	mov	r0, r7
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	bl	FlashReadRawPage
+	mov	r3, r0
+.L873:
+	adds	r0, r3, #1
+	beq	.L874
+	ldr	r1, .L887+16
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r3
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r3, r2, lsr #2
+	bcc	.L885
+	mov	r8, #0
+	mov	fp, r8
+.L874:
+	adds	r6, r6, #1
+.L868:
+	ldr	r2, .L887+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
-	uxth	r3, r3
-.L925:
-	cmp	r3, r7
-	bne	.L927
-	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L928
-	ldrh	r2, [r3, #0]
-	adds	r2, r2, #1
-	strh	r2, [r3, #0]	@ movhi
-.L926:
-	ldr	r0, .L928+8
-	movs	r1, #12
-	ldr	r3, .L928+12
-	ldr	r0, [r0, #0]
-	ldrh	r2, [r3, #0]
-	muls	r1, r2, r1
-	adds	r7, r0, r1
-	str	r4, [r0, r1]
-	adds	r2, r2, #1
-	str	r5, [r7, #4]
-	str	r6, [r7, #8]
-	strh	r2, [r3, #0]	@ movhi
-	pop	{r3, r4, r5, r6, r7, pc}
-.L929:
+	cmp	r6, r3
+	bcc	.L877
+	b	.L876
+.L885:
+	mov	r5, r3
+.L876:
+	ldr	r3, .L887+4
+	movs	r1, #0
+	mov	r0, r4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L878
+	bl	SandiskSetRRPara
+	b	.L879
+.L878:
+	bl	ToshibaSetRRPara
+.L879:
+	movs	r3, #255
+	str	r3, [r4, #8]
+	ldr	r3, .L887+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L880
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L880:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	cmp	sl, #0
+	beq	.L881
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L881:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L888:
 	.align	2
-.L928:
-	.word	.LANCHOR145
-	.word	.LANCHOR146
-	.word	.LANCHOR148
-	.word	.LANCHOR147
-	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
-	.section	.text.FtlGcPageVarInit,"ax",%progbits
+.L887:
+	.word	.LANCHOR5
+	.word	.LANCHOR11
+	.word	.LANCHOR35
+	.word	.LANCHOR144
+	.word	.LANCHOR29
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.FlashSavePhyInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcPageVarInit
+	.global	FlashSavePhyInfo
 	.thumb
 	.thumb_func
-	.type	FtlGcPageVarInit, %function
-FtlGcPageVarInit:
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L931
-	movs	r3, #0
-	push	{r4, lr}
-	movs	r1, #255
-	strh	r3, [r2, #0]	@ movhi
-	ldr	r4, .L931+4
-	ldr	r2, .L931+8
-	strh	r3, [r2, #0]	@ movhi
-	ldrh	r2, [r4, #0]
-	ldr	r3, .L931+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldr	r2, .L931+16
-	ldrh	r3, [r4, #0]
-	movs	r1, #255
-	ldr	r0, [r2, #0]
-	movs	r2, #12
-	muls	r2, r3, r2
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L896
+	ldr	r8, .L896+60
+	ldr	sl, .L896+64
+	ldr	r3, [r7, #0]
+	ldr	fp, .L896+48
+	ldr	r6, .L896+4
+	str	r3, [r8, #0]
+	ldr	r3, .L896+8
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r1, #0
+	mov	r2, #2048
+	ldr	r0, [r7, #0]
 	bl	memset
-	pop	{r4, lr}
-	b	FtlGcBufInit
-.L932:
+	ldr	r0, [r8, #0]
+	ldr	r3, .L896+12
+	movs	r2, #32
+	ldr	r1, .L896+16
+	str	sl, [r0, #0]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #12]	@ movhi
+	ldr	r3, .L896+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #14]	@ movhi
+	ldr	r3, .L896+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [r0, #1076]
+	adds	r0, r0, #16
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+28
+	movs	r2, #8
+	adds	r0, r0, #80
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+32
+	movs	r2, #32
+	adds	r0, r0, #96
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+36
+	movs	r2, #32
+	adds	r0, r0, #160
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L896+40
+	movs	r2, #32
+	adds	r0, r0, #192
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	mov	r2, #852
+	ldr	r1, .L896+44
+	adds	r0, r0, #224
+	bl	memcpy
+	ldr	r4, [r8, #0]
+	movw	r1, #2036
+	add	r0, r4, #12
+	bl	JSHash
+	mov	r3, #1592
+	str	r3, [r4, #4]
+	ldr	r3, [fp, #0]
+	str	r3, [r8, #0]
+	str	r0, [r4, #8]
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	mov	r4, r5
+.L892:
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r2, r0
+	muls	r1, r4, r1
+	bl	FlashEraseBlock
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	bl	FlashProgPage
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	adds	r1, r1, #1
+	bl	FlashProgPage
+	ldr	r3, .L896+48
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L890
+	ldr	fp, [r8, #0]
+	ldr	r3, [fp, #0]
+	cmp	r3, sl
+	bne	.L890
+	add	r0, fp, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [fp, #8]
+	cmp	r3, r0
+	bne	.L890
+	ldr	r3, .L896+52
+	adds	r2, r4, #1
+	adds	r5, r5, #1
+	str	r2, [r3, #0]
+	ldr	r3, .L896+56
+	ldr	r2, [r6, #0]
+	muls	r2, r4, r2
+	cmp	r5, #1
+	str	r2, [r3, #0]
+	bhi	.L891
+.L890:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L892
+.L891:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	cmp	r5, #0
+	ite	eq
+	moveq	r0, #-1
+	movne	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L897:
 	.align	2
-.L931:
-	.word	.LANCHOR145
-	.word	.LANCHOR70
-	.word	.LANCHOR147
+.L896:
 	.word	.LANCHOR146
+	.word	.LANCHOR2
+	.word	.LANCHOR147
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR1
+	.word	.LANCHOR35
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR143
 	.word	.LANCHOR148
-	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
-	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
+	.word	.LANCHOR149
+	.word	.LANCHOR145
+	.word	1312902724
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshOpenBlock
+	.global	FlashReadIdbDataRaw
 	.thumb
 	.thumb_func
-	.type	FtlGcRefreshOpenBlock, %function
-FtlGcRefreshOpenBlock:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L936
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L934
-	ldr	r3, .L936+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L934
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L935
-	strh	r0, [r4, #0]	@ movhi
-	b	.L934
-.L935:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L934:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	mov	r8, r0
+	ldr	r1, .L909
+	add	r0, sp, #12
+	bl	memcpy
+	ldr	r3, .L909+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	ldr	r3, .L909+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L909+12
+	cmp	r2, r3
+	bne	.L899
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L899:
+	mov	r0, r8
+	movs	r1, #0
+	mov	r2, #2048
+	mov	r7, #-1
+	bl	memset
+	movs	r4, #2
+	ldr	sl, .L909+32
+	ldr	fp, .L909+36
+	ldr	r6, .L909+16
+	b	.L900
+.L907:
+	movs	r5, #0
+.L902:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r5]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r3, .L909+16
+	movs	r0, #0
+	ldr	r1, [fp, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L901
+	adds	r5, r5, #1
+	cmp	r5, #4
+	bne	.L902
+	b	.L903
+.L901:
+	ldr	r3, [r6, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L909+20
+	cmp	r2, r3
+	bne	.L903
+	add	r3, sp, #16
+	ldr	r0, .L909+24
+	adds	r5, r3, r5
+	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
+	bl	printf
+	mov	r2, #2048
+	mov	r0, r8
+	ldr	r1, [r6, #0]
+	bl	memcpy
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #512]
+	strb	r3, [sl, #0]
+	ldr	r3, .L909+28
+	ldr	r2, [r3, #0]
+	cmp	r2, r4
+	bls	.L906
+	str	r4, [r3, #0]
+	movs	r7, #0
+	bl	FlashSavePhyInfo
+.L903:
+	adds	r4, r4, #1
+.L900:
+	ldrb	r3, [sl, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L907
+	b	.L904
+.L906:
+	movs	r7, #0
+.L904:
+	ldr	r0, [sp, #4]
+	bl	FlashBchSel
+	ldr	r3, .L909+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L909+12
+	cmp	r2, r3
+	bne	.L905
 	movs	r0, #0
-	pop	{r4, r5, pc}
-.L937:
+	bl	flash_exit_slc_mode
+.L905:
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L910:
 	.align	2
-.L936:
-	.word	.LANCHOR149
+.L909:
 	.word	.LANCHOR150
-	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
-	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.word	.LANCHOR29
+	.word	.LANCHOR142
+	.word	1446522928
+	.word	.LANCHOR146
+	.word	-52655045
+	.word	.LC8
+	.word	.LANCHOR148
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcRefreshBlock
+	.global	FlashLoadPhyInfo
 	.thumb
 	.thumb_func
-	.type	FtlGcRefreshBlock, %function
-FtlGcRefreshBlock:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, r5, lr}
-	ldr	r4, .L941
-	ldrh	r5, [r4, #0]
-	cmp	r5, r0
-	beq	.L939
-	ldr	r3, .L941+4
-	ldrh	r1, [r3, #0]
-	cmp	r1, r0
-	beq	.L939
-	movw	r2, #65535
-	cmp	r5, r2
-	bne	.L940
-	strh	r0, [r4, #0]	@ movhi
-	b	.L939
-.L940:
-	cmp	r1, r2
-	it	eq
-	strheq	r0, [r3, #0]	@ movhi
-.L939:
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	ldr	sl, .L923+40
+	add	r0, sp, #12
+	ldr	r1, .L923
+	movs	r4, #0
+	bl	memcpy
+	ldr	r5, .L923+4
+	ldr	r3, [sl, #0]
+	mov	r0, r4
+	ldr	r6, .L923+8
+	mov	r8, #4
+	mov	r7, #-1
+	str	r3, [r5, #0]
+	ldr	r3, .L923+12
+	ldrh	r2, [r6, #10]
+	str	r4, [r3, #0]
+	str	r2, [sp, #4]
+	bl	flash_enter_slc_mode
+	b	.L912
+.L914:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r6]	@ zero_extendqisi2
+	bl	FlashBchSel
 	movs	r0, #0
-	pop	{r4, r5, pc}
-.L942:
+	mov	r1, r4
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L913
+	movs	r0, #0
+	mov	r1, fp
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L913
+	adds	r6, r6, #1
+	cmp	r6, #4
+	beq	.L915
+	b	.L914
+.L913:
+	ldr	r6, [r5, #0]
+	ldr	r2, .L923+16
+	ldr	r3, [r6, #0]
+	cmp	r3, r2
+	bne	.L915
+	cbnz	r7, .L916
+	ldr	r3, .L923+8
+	mov	r0, r4
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L923+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	mov	r0, r7
+	b	.L922
+.L916:
+	add	r0, r6, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [r6, #8]
+	cmp	r3, r0
+	bne	.L915
+	add	r1, r6, #160
+	movs	r2, #32
+	ldr	r0, .L923+8
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	movs	r2, #32
+	ldr	r0, .L923+24
+	adds	r1, r1, #192
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	mov	r2, #852
+	ldr	r0, .L923+28
+	adds	r1, r1, #224
+	bl	memcpy
+	ldr	r6, [r5, #0]
+	ldr	r3, .L923+32
+	mov	r0, r4
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3, #0]
+	ldr	r3, .L923+12
+	str	r4, [r3, #0]
+	ldr	r3, .L923+8
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L923+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	cmp	r0, #1
+	bne	.L918
+	movs	r2, #2
+	str	r2, [r3, #0]
+.L918:
+	ldrh	r2, [r6, #14]
+	movs	r7, #0
+	ldr	r3, .L923+36
+	strb	r2, [r3, #0]
+.L915:
+	ldr	r2, [sp, #4]
+	subs	r8, r8, #1
+	add	r4, r4, r2
+	beq	.L919
+.L912:
+	add	fp, r4, #1
+	movs	r6, #0
+	b	.L914
+.L919:
+	mov	r0, r8
+.L922:
+	bl	flash_exit_slc_mode
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L924:
 	.align	2
-.L941:
-	.word	.LANCHOR149
+.L923:
 	.word	.LANCHOR150
-	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
-	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.word	.LANCHOR145
+	.word	.LANCHOR18
+	.word	.LANCHOR149
+	.word	1312902724
+	.word	.LANCHOR148
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR35
+	.word	.LANCHOR151
+	.word	.LANCHOR146
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
 	.align	1
-	.global	FtlGcMarkBadPhyBlk
+	.global	FlashDdrTunningRead
 	.thumb
 	.thumb_func
-	.type	FtlGcMarkBadPhyBlk, %function
-FtlGcMarkBadPhyBlk:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	mov	r4, r0
-	bl	P2V_block_in_plane
-	mov	r5, r0
-	bl	FtlGcRefreshBlock
-	ldr	r3, .L948
-	ldr	r3, [r3, #0]
-	cbz	r3, .L944
-	ldr	r3, .L948+4
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	ldr	r3, .L945
+	sub	sp, sp, #24
+	mov	fp, r2
+	str	r0, [sp, #8]
 	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r5, lsl #1]
-	cmp	r2, #29
-	bls	.L944
-	subs	r2, r2, #30
-	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L944:
-	ldr	r3, .L948+8
-	ldr	r2, .L948+12
-	ldrh	r1, [r3, #0]
-	movs	r3, #0
-	b	.L945
-.L947:
-	ldrh	r0, [r2, #2]!
-	cmp	r0, r4
-	beq	.L946
-	adds	r3, r3, #1
-	uxth	r3, r3
-.L945:
-	cmp	r3, r1
-	bne	.L947
-	cmp	r3, #15
-	bhi	.L946
-	ldr	r2, .L948+16
-	strh	r4, [r2, r3, lsl #1]	@ movhi
-	adds	r3, r3, #1
-	ldr	r2, .L948+8
-	strh	r3, [r2, #0]	@ movhi
+	str	r1, [sp, #12]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L945+4
+	ldr	r7, [r3, #0]
+	ldr	r3, [sp, #56]
+	cmp	r7, #7
+	ite	hi
+	movhi	r7, #12
+	movls	r7, #6
+	cbz	r3, .L937
+	movs	r0, #1
+	ldr	r4, .L945+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	ldr	r1, [sp, #12]
+	mov	r2, fp
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	mov	r8, r0
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	cmp	r8, #-1
+	beq	.L928
+	mov	r2, r8
+	ldr	r0, .L945+12
+	ldr	r1, [sp, #12]
+	bl	printf
+	ldr	r3, .L945+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	cmp	r2, #2048
+	bcc	.L928
+	movs	r2, #0
+	str	r2, [r3, #0]
+	mov	sl, r2
+	mov	fp, r2
+	b	.L927
+.L937:
+	mov	r8, #1024
+.L927:
+	movs	r4, #0
+	mov	r6, #-1
+	mov	ip, r4
+	mov	r5, r4
+	str	r4, [sp, #16]
+.L933:
+	uxtb	r0, r7
+	str	ip, [sp, #4]
+	bl	NandcSetDdrPara
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	mov	r2, fp
+	ldr	r1, [sp, #12]
+	bl	FlashReadRawPage
+	add	r3, r8, #1
+	ldr	ip, [sp, #4]
+	cmp	r0, r3
+	bhi	.L929
+	cmp	r0, #2
+	bhi	.L939
+	adds	r5, r5, #1
+	cmp	r5, #9
+	bls	.L939
+	subs	r4, r7, r5
+	mov	r8, r0
+	movs	r6, #0
+	b	.L931
+.L929:
+	cmp	ip, r5
+	bcs	.L940
+	cmp	r5, #7
+	rsb	r3, r5, r4
+	str	r3, [sp, #16]
+	bhi	.L932
+	mov	ip, r5
+	b	.L940
+.L939:
+	movs	r6, #0
+	mov	r4, r7
+	mov	r8, r0
+	mov	sl, r6
+	mov	fp, r6
+	b	.L930
+.L940:
+	movs	r5, #0
+.L930:
+	adds	r7, r7, #2
+	cmp	r7, #69
+	bls	.L933
+.L931:
+	cmp	ip, r5
+	bcc	.L934
+.L932:
+	ldr	r4, [sp, #16]
+.L934:
+	cbz	r4, .L935
+	ldr	r0, .L945+20
+	mov	r1, r4
+	bl	printf
+	uxtb	r0, r4
+	bl	NandcSetDdrPara
+.L935:
+	cbz	r6, .L928
+	ldr	r0, .L945+24
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #12]
+	bl	printf
+	ldr	r3, [sp, #56]
+	cbz	r3, .L942
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L928
+.L942:
+	mov	r8, r6
+.L928:
+	mov	r0, r8
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 .L946:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L949:
 	.align	2
-.L948:
-	.word	.LANCHOR128
-	.word	.LANCHOR96
-	.word	.LANCHOR151
-	.word	.LANCHOR152-2
+.L945:
+	.word	.LANCHOR30
+	.word	.LANCHOR37
+	.word	.LANCHOR34
+	.word	.LC9
 	.word	.LANCHOR152
-	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
-	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.word	.LC10
+	.word	.LC11
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashDdrParaScan,"ax",%progbits
 	.align	1
-	.global	FtlGcReFreshBadBlk
+	.global	FlashDdrParaScan
 	.thumb
 	.thumb_func
-	.type	FtlGcReFreshBadBlk, %function
-FtlGcReFreshBadBlk:
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L953
-	push	{r4, lr}
-	ldrh	r3, [r3, #0]
-	cbz	r3, .L951
-	ldr	r2, .L953+4
-	ldrh	r1, [r2, #0]
-	movw	r2, #65535
-	cmp	r1, r2
-	bne	.L951
-	ldr	r4, .L953+8
-	ldrh	r2, [r4, #0]
-	cmp	r2, r3
-	bcc	.L952
-	movs	r3, #0
-	strh	r3, [r4, #0]	@ movhi
-.L952:
-	ldr	r3, .L953+12
-	ldrh	r2, [r4, #0]
-	ldrh	r0, [r3, r2, lsl #1]
-	bl	P2V_block_in_plane
-	bl	FtlGcRefreshBlock
-	ldrh	r3, [r4, #0]
-	adds	r3, r3, #1
-	strh	r3, [r4, #0]	@ movhi
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L952
+	movs	r4, #0
+	mov	r7, r1
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r0, r6
+	str	r4, [sp, #0]
+	bl	FlashDdrTunningRead
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r8, r0
+	mov	r0, r6
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L948
+	cmp	r8, #-1
+	bne	.L949
+.L948:
+	ldrb	r3, [r5, #0]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L949
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r2, #0
+	b	.L951
+.L949:
+	movs	r2, #1
 .L951:
+	ldr	r3, .L952+4
 	movs	r0, #0
-	pop	{r4, pc}
-.L954:
-	.align	2
+	strb	r2, [r3, #0]
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
 .L953:
-	.word	.LANCHOR151
-	.word	.LANCHOR149
-	.word	.LANCHOR153
-	.word	.LANCHOR152
-	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
-	.section	.text.ftl_memset,"ax",%progbits
-	.align	1
-	.global	ftl_memset
-	.thumb
-	.thumb_func
-	.type	ftl_memset, %function
-ftl_memset:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memset
-	.size	ftl_memset, .-ftl_memset
-	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	2
+.L952:
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashReadPage,"ax",%progbits
 	.align	1
-	.global	ftl_memcpy
+	.global	FlashReadPage
 	.thumb
 	.thumb_func
-	.type	ftl_memcpy, %function
-ftl_memcpy:
+	.type	FlashReadPage, %function
+FlashReadPage:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	b	memcpy
-	.size	ftl_memcpy, .-ftl_memcpy
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	mov	r5, r0
+	mov	r7, r1
+	mov	r8, r2
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	mov	r4, r0
+	bne	.L955
+	ldr	r6, .L960
+	ldrb	fp, [r6, #0]	@ zero_extendqisi2
+	cmp	fp, #0
+	beq	.L956
+	movs	r3, #0
+	mov	r0, r5
+	strb	r3, [r6, #0]
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	bl	FlashReadRawPage
+	strb	fp, [r6, #0]
+	adds	r6, r0, #1
+	bne	.L959
+.L956:
+	ldr	r3, .L960+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L955
+	ldr	r3, .L960+8
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp, #0]
+	mov	r3, sl
+	bl	FlashDdrTunningRead
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L957
+	ldr	r3, .L960+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r4, r3, lsr #1
+	bls	.L955
+.L957:
+	ubfx	r0, r6, #8, #8
+	bl	NandcSetDdrPara
+	b	.L955
+.L959:
+	mov	r4, r0
+.L955:
+	ldr	fp, .L960+24
+	ldr	r6, [fp, #0]
+	cbz	r6, .L958
+	adds	r1, r4, #1
+	bne	.L958
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	mov	r0, r5
+	blx	r6
+	mov	r2, r5
+	mov	r3, r7
+	mov	r4, r0
+	ldr	r0, .L960+16
+	mov	r1, r4
+	bl	printf
+	adds	r2, r4, #1
+	bne	.L958
+	ldr	r3, .L960+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L958
+	mov	r0, r5
+	bl	flash_enter_slc_mode
+	ldr	r4, [fp, #0]
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	blx	r4
+	mov	r4, r0
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L958:
+	mov	r0, r4
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L961:
+	.align	2
+.L960:
+	.word	.LANCHOR4
+	.word	.LANCHOR35
+	.word	.LANCHOR30
+	.word	.LANCHOR29
+	.word	.LC12
+	.word	.LANCHOR7
+	.word	.LANCHOR153
+	.size	FlashReadPage, .-FlashReadPage
 	.section	.text.ftl_memcmp,"ax",%progbits
 	.align	1
 	.global	ftl_memcmp
@@ -7829,11 +7873,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L959
+	ldr	r0, .L964
 	bx	lr
-.L960:
+.L965:
 	.align	2
-.L959:
+.L964:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -7858,85 +7902,85 @@ ftl_malloc:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L967
+	ldr	r3, .L972
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
 	strh	r1, [r3, #0]	@ movhi
 	movs	r5, #12
-	ldr	r3, .L967+4
-	ldr	r2, .L967+8
-	ldr	r4, .L967+12
+	ldr	r3, .L972+4
+	ldr	r2, .L972+8
+	ldr	r4, .L972+12
 	str	r1, [r3, #0]
-	ldr	r3, .L967+16
+	ldr	r3, .L972+16
 	ldrh	r0, [r4, #0]
-	ldr	r8, .L967+304
+	ldr	r8, .L972+304
 	str	r1, [r3, #0]
-	ldr	r3, .L967+20
+	ldr	r3, .L972+20
 	lsls	r0, r0, #1
-	ldr	r7, .L967+24
+	ldr	r7, .L972+24
 	str	r1, [r3, #0]
-	ldr	r3, .L967+28
+	ldr	r3, .L972+28
 	str	r1, [r3, #0]
-	ldr	r3, .L967+32
+	ldr	r3, .L972+32
 	str	r1, [r3, #0]
-	ldr	r3, .L967+36
+	ldr	r3, .L972+36
 	str	r1, [r3, #0]
-	ldr	r3, .L967+40
+	ldr	r3, .L972+40
 	str	r1, [r3, #0]
-	ldr	r3, .L967+44
+	ldr	r3, .L972+44
 	str	r1, [r3, #0]
-	ldr	r3, .L967+48
+	ldr	r3, .L972+48
 	str	r1, [r3, #0]
-	ldr	r3, .L967+52
+	ldr	r3, .L972+52
 	str	r1, [r3, #0]
-	ldr	r3, .L967+56
+	ldr	r3, .L972+56
 	str	r1, [r3, #0]
-	ldr	r3, .L967+60
+	ldr	r3, .L972+60
 	str	r1, [r3, #0]
-	ldr	r3, .L967+64
+	ldr	r3, .L972+64
 	str	r1, [r3, #0]
-	ldr	r3, .L967+68
+	ldr	r3, .L972+68
 	str	r1, [r3, #0]
-	ldr	r3, .L967+72
+	ldr	r3, .L972+72
 	str	r1, [r3, #0]
-	ldr	r3, .L967+76
+	ldr	r3, .L972+76
 	str	r1, [r3, #0]
-	ldr	r3, .L967+80
+	ldr	r3, .L972+80
 	str	r1, [r3, #0]
 	movw	r3, #65535
 	str	r3, [r2, #0]
-	ldr	r2, .L967+84
+	ldr	r2, .L972+84
 	str	r1, [r2, #0]
-	ldr	r2, .L967+88
+	ldr	r2, .L972+88
 	str	r1, [r2, #0]
-	ldr	r2, .L967+92
+	ldr	r2, .L972+92
 	str	r1, [r2, #0]
-	ldr	r2, .L967+96
+	ldr	r2, .L972+96
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L967+100
+	ldr	r2, .L972+100
 	strh	r3, [r2, #0]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L967+104
+	ldr	r3, .L972+104
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L967+108
+	ldr	r3, .L972+108
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L967+112
+	ldr	r3, .L972+112
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L967+116
+	ldr	r3, .L972+116
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L967+120
+	ldr	r3, .L972+120
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L967+124
+	ldr	r3, .L972+124
 	strh	r1, [r3, #0]	@ movhi
 	str	r1, [sp, #4]
 	bl	ftl_malloc
-	ldr	r3, .L967+128
+	ldr	r3, .L972+128
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+132
+	ldr	r3, .L972+132
 	movs	r4, #36
 	str	r0, [r3, #0]
 	ldrh	r3, [r8, #0]
@@ -7944,24 +7988,24 @@ FtlMemInit:
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L967+136
+	ldr	r3, .L972+136
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+140
+	ldr	r3, .L972+140
 	str	r0, [r3, #0]
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L967+144
-	ldr	r6, .L967+148
+	ldr	r3, .L972+144
+	ldr	r6, .L972+148
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+152
+	ldr	r3, .L972+152
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+156
+	ldr	r3, .L972+156
 	ldrh	r4, [r6, #0]
 	str	r0, [r3, #0]
 	mov	r0, r4
@@ -7970,158 +8014,158 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r7, #0]
 	bl	ftl_malloc
-	ldr	r3, .L967+160
+	ldr	r3, .L972+160
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+164
+	ldr	r3, .L972+164
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+168
+	ldr	r3, .L972+168
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+172
+	ldr	r3, .L972+172
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+176
+	ldr	r3, .L972+176
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L967+180
-	ldr	r4, .L967+184
+	ldr	r3, .L972+180
+	ldr	r4, .L972+184
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+188
+	ldr	r3, .L972+188
 	ldrh	r8, [r8, #0]
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	mul	r8, r8, r3
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+192
+	ldr	r3, .L972+192
 	str	r0, [r3, #0]
 	lsl	r0, r8, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+196
+	ldr	r3, .L972+196
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r4, .L967+200
-	ldr	r3, .L967+204
-	ldr	r7, .L967+208
+	ldr	r4, .L972+200
+	ldr	r3, .L972+204
+	ldr	r7, .L972+208
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r7, #0]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L967+212
+	ldr	r3, .L972+212
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	addw	r0, r0, #547
 	lsrs	r0, r0, #9
 	strh	r0, [r7, #0]	@ movhi
-	ldr	r7, .L967+216
+	ldr	r7, .L972+216
 	lsls	r0, r0, #9
 	bl	ftl_malloc
-	ldr	r3, .L967+220
+	ldr	r3, .L972+220
 	str	r0, [r3, #0]
 	adds	r0, r0, #32
-	ldr	r3, .L967+224
+	ldr	r3, .L972+224
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L967+228
+	ldr	r3, .L972+228
 	str	r0, [r3, #0]
 	ldr	r3, [r7, #0]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+232
+	ldr	r3, .L972+232
 	str	r0, [r3, #0]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+236
-	ldr	r8, .L967+308
+	ldr	r3, .L972+236
+	ldr	r8, .L972+308
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L967+240
+	ldr	r3, .L972+240
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L967+244
+	ldr	r3, .L972+244
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L967+248
+	ldr	r3, .L972+248
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
-	ldr	r8, .L967+312
+	ldr	r8, .L972+312
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+252
+	ldr	r3, .L972+252
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+256
+	ldr	r3, .L972+256
 	ldrh	r2, [r8, #0]
 	ldr	r1, [sp, #4]
 	lsls	r2, r2, #2
 	str	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L967+260
+	ldr	r3, .L972+260
 	ldrh	r8, [r3, #0]
 	lsl	r8, r8, #2
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+264
+	ldr	r3, .L972+264
 	str	r0, [r3, #0]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L967+268
+	ldr	r3, .L972+268
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
-	ldr	r7, .L967+272
+	ldr	r7, .L972+272
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L967+276
+	ldr	r3, .L972+276
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+280
-	ldr	r5, .L967+284
+	ldr	r3, .L972+280
+	ldr	r5, .L972+284
 	str	r0, [r3, #0]
 	ldrh	r3, [r7, #0]
 	ldrh	r0, [r6, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+288
+	ldr	r3, .L972+288
 	str	r0, [r3, #0]
 	movs	r0, #6
 	ldrh	r3, [r4, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L967+292
-	ldr	r4, .L967+296
+	ldr	r3, .L972+292
+	ldr	r4, .L972+296
 	ldrh	r2, [r5, #0]
 	str	r0, [r3, #0]
-	ldr	r3, .L967+300
+	ldr	r3, .L972+300
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #31
 	lsrs	r3, r3, #5
@@ -8129,17 +8173,17 @@ FtlMemInit:
 	muls	r3, r2, r3
 	lsls	r0, r3, #2
 	bl	ftl_malloc
-	b	.L968
-.L969:
+	b	.L973
+.L974:
 	.align	2
-.L967:
-	.word	.LANCHOR129
+.L972:
+	.word	.LANCHOR117
 	.word	.LANCHOR154
 	.word	.LANCHOR170
-	.word	.LANCHOR70
+	.word	.LANCHOR58
 	.word	.LANCHOR155
 	.word	.LANCHOR156
-	.word	.LANCHOR136
+	.word	.LANCHOR124
 	.word	.LANCHOR157
 	.word	.LANCHOR158
 	.word	.LANCHOR159
@@ -8149,71 +8193,71 @@ FtlMemInit:
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR165
-	.word	.LANCHOR97
+	.word	.LANCHOR85
 	.word	.LANCHOR166
 	.word	.LANCHOR167
 	.word	.LANCHOR168
 	.word	.LANCHOR169
 	.word	.LANCHOR171
 	.word	.LANCHOR172
-	.word	.LANCHOR89
-	.word	.LANCHOR149
-	.word	.LANCHOR150
+	.word	.LANCHOR77
+	.word	.LANCHOR137
+	.word	.LANCHOR138
 	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR151
+	.word	.LANCHOR139
 	.word	.LANCHOR176
-	.word	.LANCHOR153
-	.word	.LANCHOR146
-	.word	.LANCHOR148
+	.word	.LANCHOR141
+	.word	.LANCHOR134
+	.word	.LANCHOR136
 	.word	.LANCHOR177
 	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR73
-	.word	.LANCHOR95
-	.word	.LANCHOR135
-	.word	.LANCHOR98
+	.word	.LANCHOR61
+	.word	.LANCHOR83
+	.word	.LANCHOR123
+	.word	.LANCHOR86
 	.word	.LANCHOR180
 	.word	.LANCHOR181
-	.word	.LANCHOR132
+	.word	.LANCHOR120
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR74
-	.word	.LANCHOR134
+	.word	.LANCHOR62
+	.word	.LANCHOR122
 	.word	.LANCHOR184
 	.word	.LANCHOR185
-	.word	.LANCHOR56
-	.word	.LANCHOR133
+	.word	.LANCHOR44
+	.word	.LANCHOR121
 	.word	.LANCHOR186
-	.word	.LANCHOR142
-	.word	.LANCHOR80
+	.word	.LANCHOR130
+	.word	.LANCHOR68
 	.word	.LANCHOR187
-	.word	.LANCHOR96
-	.word	.LANCHOR101
-	.word	.LANCHOR124
-	.word	.LANCHOR120
-	.word	.LANCHOR119
-	.word	.LANCHOR87
+	.word	.LANCHOR84
+	.word	.LANCHOR89
+	.word	.LANCHOR112
+	.word	.LANCHOR108
+	.word	.LANCHOR107
+	.word	.LANCHOR75
 	.word	.LANCHOR188
 	.word	.LANCHOR189
 	.word	.LANCHOR190
-	.word	.LANCHOR82
-	.word	.LANCHOR126
-	.word	.LANCHOR191
-	.word	.LANCHOR83
-	.word	.LANCHOR125
+	.word	.LANCHOR70
 	.word	.LANCHOR114
-	.word	.LANCHOR60
-	.word	.LANCHOR121
-	.word	.LANCHOR99
-	.word	.LANCHOR91
+	.word	.LANCHOR191
+	.word	.LANCHOR71
+	.word	.LANCHOR113
+	.word	.LANCHOR102
+	.word	.LANCHOR48
+	.word	.LANCHOR109
+	.word	.LANCHOR87
+	.word	.LANCHOR79
+	.word	.LANCHOR54
+	.word	.LANCHOR41
+	.word	.LANCHOR65
 	.word	.LANCHOR66
-	.word	.LANCHOR53
-	.word	.LANCHOR77
-	.word	.LANCHOR78
-.L968:
-	ldr	r2, .L970
+.L973:
+	ldr	r2, .L975
 	ldrh	r4, [r4, #0]
 	movs	r1, #1
 	mov	r3, r2
@@ -8221,35 +8265,35 @@ FtlMemInit:
 	lsls	r4, r4, #2
 	str	r0, [r3, #28]!
 	mov	r0, r4
-	b	.L963
-.L964:
+	b	.L968
+.L969:
 	ldr	r6, [r2, #28]
 	adds	r1, r1, #1
 	adds	r6, r6, r0
 	adds	r0, r0, r4
 	str	r6, [r3, #4]!
-.L963:
+.L968:
 	cmp	r1, r5
-	bcc	.L964
-	ldr	r0, .L970
+	bcc	.L969
+	ldr	r0, .L975
 	movs	r3, #0
 	mov	r2, r3
 	add	r0, r0, r1, lsl #2
-	b	.L965
-.L966:
+	b	.L970
+.L971:
 	adds	r4, r0, r3
 	adds	r1, r1, #1
 	adds	r3, r3, #4
 	str	r2, [r4, #28]
-.L965:
+.L970:
 	cmp	r1, #7
-	bls	.L966
+	bls	.L971
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L971:
+.L976:
 	.align	2
-.L970:
-	.word	.LANCHOR90
+.L975:
+	.word	.LANCHOR78
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.NandcInit,"ax",%progbits
 	.align	1
@@ -8262,9 +8306,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L973
+	ldr	r3, .L978
 	movs	r4, #0
-	ldr	r5, .L973+4
+	ldr	r5, .L978+4
 	stmia	r3, {r0, r4}
 	str	r2, [r3, #12]
 	movs	r2, #2
@@ -8275,19 +8319,19 @@ NandcInit:
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
 	str	r0, [r5, #0]
-	ldr	r2, .L973+8
+	ldr	r2, .L978+8
 	ldr	r3, [r0, #0]
 	and	r3, r3, #253952
 	ubfx	r1, r3, #13, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L973+12
+	ldr	r2, .L978+12
 	and	r3, r3, #245760
 	ldr	r1, [r0, #352]
 	orr	r3, r3, #256
 	ubfx	r1, r1, #16, #4
 	str	r1, [r2, #0]
 	ldr	r1, [r0, #352]
-	ldr	r2, .L973+16
+	ldr	r2, .L978+16
 	str	r1, [r2, #0]
 	str	r3, [r0, #0]
 	str	r4, [r0, #336]
@@ -8297,27 +8341,27 @@ NandcInit:
 	movw	r2, #8322
 	mov	r0, #36864
 	str	r2, [r3, #344]
-	ldr	r2, .L973+20
+	ldr	r2, .L978+20
 	str	r2, [r3, #304]
 	bl	ftl_malloc
-	ldr	r3, .L973+24
+	ldr	r3, .L978+24
 	str	r0, [r3, #0]
-	ldr	r3, .L973+28
+	ldr	r3, .L978+28
 	str	r0, [r3, #0]
 	add	r0, r0, #32768
 	str	r4, [r3, #24]
 	str	r0, [r3, #4]
-	ldr	r3, .L973+32
+	ldr	r3, .L978+32
 	str	r4, [r3, #0]
 	pop	{r3, r4, r5, pc}
-.L974:
+.L979:
 	.align	2
-.L973:
+.L978:
 	.word	.LANCHOR5
 	.word	.LANCHOR30
 	.word	.LANCHOR192
 	.word	.LANCHOR37
-	.word	.LANCHOR40
+	.word	.LANCHOR142
 	.word	1710593
 	.word	.LANCHOR193
 	.word	.LANCHOR38
@@ -8408,13 +8452,13 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L981
+	ldr	r3, .L986
 	ldr	r0, [r3, #0]
 	bx	lr
-.L982:
+.L987:
 	.align	2
-.L981:
-	.word	.LANCHOR84
+.L986:
+	.word	.LANCHOR72
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
 	.align	1
@@ -8432,48 +8476,48 @@ rknand_print_hex:
 	mov	r5, r2
 	mov	r8, r3
 	mov	r6, r7
-	b	.L984
-.L990:
-	cbnz	r7, .L985
-	ldr	r0, .L992
+	b	.L989
+.L995:
+	cbnz	r7, .L990
+	ldr	r0, .L997
 	mov	r1, sl
 	mov	r2, r6
 	bl	printf
-.L985:
+.L990:
 	cmp	r5, #4
-	ldr	r0, .L992+4
-	bne	.L986
+	ldr	r0, .L997+4
+	bne	.L991
 	ldr	r1, [r4, r6, lsl #2]
-	b	.L991
-.L986:
+	b	.L996
+.L991:
 	cmp	r5, #2
 	ite	eq
 	ldrsheq	r1, [r4, r6, lsl #1]
 	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
-.L991:
+.L996:
 	adds	r7, r7, #1
 	bl	printf
 	cmp	r7, #15
-	bls	.L989
-	ldr	r0, .L992+8
+	bls	.L994
+	ldr	r0, .L997+8
 	movs	r7, #0
-	ldr	r1, .L992+12
+	ldr	r1, .L997+12
 	bl	printf
-.L989:
+.L994:
 	adds	r6, r6, #1
-.L984:
+.L989:
 	cmp	r6, r8
-	bne	.L990
-	ldr	r0, .L992+8
-	ldr	r1, .L992+12
+	bne	.L995
+	ldr	r0, .L997+8
+	ldr	r1, .L997+12
 	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
 	b	printf
-.L993:
+.L998:
 	.align	2
-.L992:
+.L997:
 	.word	.LC13
 	.word	.LC14
-	.word	.LC10
+	.word	.LC4
 	.word	.LC15
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
@@ -8485,7 +8529,7 @@ rknand_print_hex:
 FlashReadSlc2KPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1008
+	ldr	r3, .L1013
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	mov	r7, r1
@@ -8493,9 +8537,9 @@ FlashReadSlc2KPages:
 	str	r2, [sp, #12]
 	mov	r4, r0
 	movs	r6, #0
-	ldr	sl, .L1008+28
-	b	.L995
-.L1004:
+	ldr	sl, .L1013+28
+	b	.L1000
+.L1009:
 	subs	r3, r7, r6
 	ldr	r1, [sp, #12]
 	add	r2, sp, #20
@@ -8504,16 +8548,16 @@ FlashReadSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1008+4
+	ldr	r1, .L1013+4
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L996
+	bcc	.L1001
 	mov	r3, #-1
 	str	r3, [r4, #0]
-	b	.L997
-.L996:
-	ldr	r2, .L1008+8
+	b	.L1002
+.L1001:
+	ldr	r2, .L1013+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -8538,13 +8582,13 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L998
+	cbz	r3, .L1003
 	add	r3, r3, #2048
-.L998:
+.L1003:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L999
+	cbz	r2, .L1004
 	adds	r2, r2, #8
-.L999:
+.L1004:
 	movs	r1, #0
 	str	r2, [sp, #0]
 	mov	r0, r5
@@ -8554,7 +8598,7 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	str	r3, [sp, #8]
 	bl	NandcFlashDeCs
-	ldr	r2, .L1008+12
+	ldr	r2, .L1013+12
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, fp
@@ -8562,63 +8606,63 @@ FlashReadSlc2KPages:
 	movcc	r3, fp
 	add	r2, r2, r2, lsl #1
 	cmp	r3, r2, lsr #2
-	bls	.L1000
+	bls	.L1005
 	cmp	r3, #-1
 	ite	eq
 	moveq	r3, #-1
 	movne	r3, #256
-.L1000:
-	adds	r2, r3, #1
+.L1005:
+	adds	r0, r3, #1
 	str	r3, [r4, #0]
-	beq	.L1001
+	beq	.L1006
 	cmp	r3, #256
-	beq	.L1001
+	beq	.L1006
 	movs	r3, #0
 	str	r3, [r4, #0]
-.L1001:
+.L1006:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L1002
+	cbz	r3, .L1007
 	ldr	r2, [r3, #8]
-	adds	r0, r2, #1
-	bne	.L1002
+	adds	r1, r2, #1
+	bne	.L1007
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
 	it	ne
 	strne	r2, [r4, #0]
-.L1002:
+.L1007:
 	ldr	r3, [r4, #0]
-	adds	r1, r3, #1
-	bne	.L997
-	ldr	r2, .L1008+12
+	adds	r2, r3, #1
+	bne	.L1002
+	ldr	r2, .L1013+12
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1008+16
+	ldr	r0, .L1013+16
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L1003
-	ldr	r0, .L1008+20
+	cbz	r1, .L1008
+	ldr	r0, .L1013+20
 	movs	r2, #4
 	movs	r3, #8
 	bl	rknand_print_hex
-.L1003:
+.L1008:
 	ldr	r1, [r4, #12]
-	cbz	r1, .L997
+	cbz	r1, .L1002
 	movs	r2, #4
-	ldr	r0, .L1008+24
+	ldr	r0, .L1013+24
 	mov	r3, r2
 	bl	rknand_print_hex
-.L997:
+.L1002:
 	adds	r6, r6, #1
 	adds	r4, r4, #36
-.L995:
+.L1000:
 	cmp	r6, r7
-	bne	.L1004
+	bne	.L1009
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1009:
+.L1014:
 	.align	2
-.L1008:
+.L1013:
 	.word	.LANCHOR18
 	.word	.LANCHOR16
 	.word	.LANCHOR19
@@ -8637,24 +8681,24 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1058
+	ldr	r3, .L1063
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #48
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r0, [sp, #12]
 	str	r1, [sp, #32]
 	str	r3, [sp, #28]
-	ldr	r3, .L1058+4
+	ldr	r3, .L1063+4
 	str	r2, [sp, #20]
 	ldrb	r4, [r3, #0]	@ zero_extendqisi2
 	str	r4, [sp, #36]
-	ldr	r4, .L1058+8
+	ldr	r4, .L1063+8
 	ldrb	r4, [r4, #0]	@ zero_extendqisi2
 	cmp	r4, #0
-	beq	.L1044
+	beq	.L1049
 	bl	FlashReadSlc2KPages
-	b	.L1012
-.L1043:
+	b	.L1017
+.L1048:
 	movs	r3, #36
 	ldr	r4, [sp, #12]
 	add	r2, sp, #44
@@ -8670,99 +8714,99 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #40
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1058+12
+	ldr	r2, .L1063+12
 	ldr	r3, [sp, #40]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, r2
 	mov	r8, r0
-	bcc	.L1013
+	bcc	.L1018
 	ldr	r1, [sp, #12]
 	mov	r3, #-1
 	ldr	r4, [sp, #16]
 	str	r3, [r1, r4]
-	b	.L1014
-.L1013:
-	ldr	r2, .L1058+16
+	b	.L1019
+.L1018:
+	ldr	r2, .L1063+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1058+20
+	ldr	r3, .L1063+20
 	mov	r0, r4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1058+24
+	ldr	r3, .L1063+24
 	ldr	r3, [r3, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r0, #1
 	cmp	r3, #6
-	bhi	.L1016
-	ldr	r2, .L1058+28
+	bhi	.L1021
+	ldr	r2, .L1063+28
 	cmp	r0, #7
 	add	r1, r2, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	it	eq
 	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
-	ldr	r1, .L1058+32
+	ldr	r1, .L1063+32
 	ldrb	r1, [r1, r4]	@ zero_extendqisi2
 	cmp	r1, r3
-	beq	.L1016
+	beq	.L1021
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	mov	r0, r4
-	ldr	r2, .L1058+36
+	ldr	r2, .L1063+36
 	bl	HynixSetRRPara
-.L1016:
+.L1021:
 	mov	r0, r4
 	and	r5, r5, #-2147483648
 	str	r5, [sp, #24]
 	bl	NandcFlashCs
 	ldr	r2, [sp, #20]
 	cmp	r2, #1
-	beq	.L1018
+	beq	.L1023
 	ldr	r5, [sp, #24]
-	cbz	r5, .L1019
-.L1018:
-	ldr	r3, .L1058+40
+	cbz	r5, .L1024
+.L1023:
+	ldr	r3, .L1063+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1019
+	cbz	r3, .L1024
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-	b	.L1020
-.L1019:
+	b	.L1025
+.L1024:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1020:
+.L1025:
 	mov	r5, r7
 	movs	r6, #0
 	mov	r7, r8
-.L1057:
+.L1062:
 	ldr	r1, [sp, #44]
 	adds	r2, r1, #1
-	bne	.L1022
+	bne	.L1027
 	cmp	r4, #255
-	beq	.L1046
-.L1022:
-	cbz	r7, .L1024
-	ldr	r3, .L1058+44
+	beq	.L1051
+.L1027:
+	cbz	r7, .L1029
+	ldr	r3, .L1063+44
 	mov	r0, r4
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	bl	FlashReadDpCmd
-	b	.L1025
-.L1024:
+	b	.L1030
+.L1029:
 	mov	r0, r4
 	bl	FlashReadCmd
-.L1025:
+.L1030:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r7, .L1023
+	cbz	r7, .L1028
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	bl	FlashReadDpDataOutCmd
-	b	.L1023
-.L1046:
+	b	.L1028
+.L1051:
 	movs	r7, #0
-.L1023:
+.L1028:
 	ldr	r3, [r5, #12]
 	movs	r1, #0
 	mov	r0, r4
@@ -8770,22 +8814,22 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r5, #8]
 	bl	NandcXferData
-	ldr	r1, .L1058+4
+	ldr	r1, .L1063+4
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1048
+	cbz	r3, .L1053
 	adds	r3, r0, #1
-	bne	.L1048
+	bne	.L1053
 	strb	r6, [r1, #0]
 	movs	r7, #0
-	b	.L1057
-.L1048:
+	b	.L1062
+.L1053:
 	mov	r8, r7
 	mov	r7, r5
 	mov	r6, r8
 	mov	r5, r0
 	cmp	r8, #0
-	beq	.L1027
-	ldr	r2, .L1058+44
+	beq	.L1032
+	ldr	r2, .L1063+44
 	mov	r0, r4
 	ldr	r3, [sp, #44]
 	ldr	r1, [r2, #0]
@@ -8807,18 +8851,18 @@ FlashReadPages:
 	ite	ne
 	movne	r6, r8
 	moveq	r6, #0
-.L1027:
+.L1032:
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	ldr	r3, [sp, #36]
-	ldr	r2, .L1058+4
+	ldr	r2, .L1063+4
 	adds	r0, r5, #1
 	strb	r3, [r2, #0]
-	bne	.L1031
-	ldr	r3, .L1058+48
+	bne	.L1036
+	ldr	r3, .L1063+48
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1029
-	ldr	r3, .L1058+52
+	cbz	r3, .L1034
+	ldr	r3, .L1063+52
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r3, [r3, #0]
@@ -8830,73 +8874,73 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r5, r0
-	beq	.L1030
-	ldr	r3, .L1058+56
+	beq	.L1035
+	ldr	r3, .L1063+56
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1051
-.L1030:
+	bls	.L1056
+.L1035:
 	ubfx	r0, r6, #8, #8
 	bl	NandcSetDdrPara
 	adds	r2, r5, #1
-	bne	.L1051
-.L1029:
-	ldr	r3, .L1058+60
+	bne	.L1056
+.L1034:
+	ldr	r3, .L1063+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
 	ldr	r6, [r3, #0]
 	ldr	r3, [r7, #12]
 	cmp	r6, #0
-	beq	.L1032
+	beq	.L1037
 	blx	r6
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1053
-	ldr	r3, .L1058+24
+	bne	.L1058
+	ldr	r3, .L1063+24
 	ldr	r3, [r3, #0]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1034
-	ldr	r2, .L1058+28
+	bhi	.L1039
+	ldr	r2, .L1063+28
 	mov	r0, r4
 	movs	r3, #0
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	adds	r2, r2, #4
 	bl	HynixSetRRPara
-.L1034:
+.L1039:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r3, [r7, #12]
 	bl	FlashReadRawPage
-	ldr	r3, .L1058+56
+	ldr	r3, .L1063+56
 	ldr	r1, [r7, #4]
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
 	mov	r5, r0
-	ldr	r0, .L1058+64
+	ldr	r0, .L1063+64
 	mov	r3, r5
 	bl	printf
 	adds	r6, r5, #1
-	bne	.L1053
-	ldr	r3, .L1058+40
+	bne	.L1058
+	ldr	r3, .L1063+40
 	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	cmp	r6, #0
-	beq	.L1033
+	beq	.L1038
 	ldr	r1, [sp, #20]
 	mov	r0, r4
 	cmp	r1, #1
-	beq	.L1035
+	beq	.L1040
 	ldr	r2, [sp, #24]
-	cbz	r2, .L1036
-.L1035:
+	cbz	r2, .L1041
+.L1040:
 	bl	flash_enter_slc_mode
-	b	.L1037
-.L1036:
+	b	.L1042
+.L1041:
 	bl	flash_exit_slc_mode
-.L1037:
-	ldr	r3, .L1058+60
+.L1042:
+	ldr	r3, .L1063+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
@@ -8904,14 +8948,14 @@ FlashReadPages:
 	ldr	r3, [r7, #12]
 	blx	r5
 	mov	r5, r0
-	b	.L1053
-.L1032:
+	b	.L1058
+.L1037:
 	bl	FlashReadRawPage
 	mov	r5, r0
-	b	.L1033
-.L1059:
+	b	.L1038
+.L1064:
 	.align	2
-.L1058:
+.L1063:
 	.word	.LANCHOR18
 	.word	.LANCHOR4
 	.word	.LANCHOR0
@@ -8927,108 +8971,108 @@ FlashReadPages:
 	.word	.LANCHOR35
 	.word	.LANCHOR30
 	.word	.LANCHOR29
-	.word	.LANCHOR51
+	.word	.LANCHOR153
 	.word	.LC19
-.L1051:
+.L1056:
 	movs	r6, #0
-.L1031:
-	ldr	r3, .L1060
+.L1036:
+	ldr	r3, .L1065
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bls	.L1033
-	ldr	r3, .L1060+4
+	bls	.L1038
+	ldr	r3, .L1065+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #256
-	b	.L1033
-.L1053:
+	b	.L1038
+.L1058:
 	movs	r6, #0
-.L1033:
+.L1038:
 	ldr	r1, [sp, #12]
 	adds	r0, r5, #1
 	ldr	r3, [sp, #16]
 	str	r5, [r1, r3]
-	beq	.L1038
+	beq	.L1043
 	cmp	r5, #256
-	beq	.L1038
+	beq	.L1043
 	ldr	r2, [sp, #16]
 	movs	r3, #0
 	str	r3, [r1, r2]
-.L1038:
-	ldr	r1, [sp, #16]
+.L1043:
 	ldr	r2, [sp, #12]
+	ldr	r1, [sp, #16]
 	ldr	r3, [r2, r1]
-	adds	r1, r3, #1
-	bne	.L1039
-	ldr	r2, .L1060
+	adds	r2, r3, #1
+	bne	.L1044
+	ldr	r2, .L1065
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1060+8
+	ldr	r0, .L1065+8
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1039
+	cbz	r1, .L1044
 	movs	r2, #4
-	ldr	r0, .L1060+12
+	ldr	r0, .L1065+12
 	mov	r3, r2
 	bl	rknand_print_hex
-.L1039:
-	cbz	r6, .L1040
-	ldr	r3, .L1060
+.L1044:
+	cbz	r6, .L1045
+	ldr	r3, .L1065
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	sl, r3, lsr #2
-	bls	.L1041
-	ldr	r3, .L1060+4
+	bls	.L1046
+	ldr	r3, .L1065+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	sl, #256
-.L1041:
+.L1046:
 	ldr	r1, [sp, #12]
 	movs	r2, #36
 	add	r3, fp, #1
 	muls	r3, r2, r3
 	cmp	sl, #-1
 	str	sl, [r1, r3]
-	beq	.L1040
+	beq	.L1045
 	cmp	sl, #256
-	beq	.L1040
+	beq	.L1045
 	movs	r2, #0
 	str	r2, [r1, r3]
-.L1040:
+.L1045:
 	ldr	r2, [sp, #20]
 	add	fp, fp, r6
 	cmp	r2, #1
-	beq	.L1042
+	beq	.L1047
 	ldr	r3, [sp, #24]
-	cbz	r3, .L1014
-.L1042:
-	ldr	r3, .L1060+16
+	cbz	r3, .L1019
+.L1047:
+	ldr	r3, .L1065+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1014
+	cbz	r3, .L1019
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1014:
+.L1019:
 	add	fp, fp, #1
-	b	.L1011
-.L1044:
+	b	.L1016
+.L1049:
 	mov	sl, r4
 	mov	fp, r4
-.L1011:
+.L1016:
 	ldr	r4, [sp, #32]
 	cmp	fp, r4
-	bcc	.L1043
+	bcc	.L1048
 	movs	r0, #0
-.L1012:
+.L1017:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1061:
+.L1066:
 	.align	2
-.L1060:
+.L1065:
 	.word	.LANCHOR29
-	.word	.LANCHOR51
+	.word	.LANCHOR153
 	.word	.LC16
 	.word	.LC18
 	.word	.LANCHOR7
@@ -9042,55 +9086,55 @@ FlashReadPages:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1085
+	ldr	r3, .L1090
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldrh	r5, [r3, #0]
 	movw	r3, #65535
 	sub	sp, sp, #24
 	cmp	r5, r3
-	beq	.L1081
-	cbnz	r5, .L1063
-	b	.L1064
-.L1081:
+	beq	.L1086
+	cbnz	r5, .L1068
+	b	.L1069
+.L1086:
 	movs	r5, #0
-.L1063:
-	ldr	r3, .L1085+4
+.L1068:
+	ldr	r3, .L1090+4
 	ldrh	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1065
-.L1064:
+	bne	.L1070
+.L1069:
 	bl	FtlGcPageVarInit
-.L1065:
-	ldr	r8, .L1085+44
+.L1070:
+	ldr	r8, .L1090+44
 	movw	sl, #65535
 	mov	r3, #-1
 	str	r3, [sp, #20]
-.L1078:
+.L1083:
 	ldrh	r3, [r4, #0]
 	movs	r2, #0
 	strb	r2, [r4, #8]
 	cmp	r3, sl
-	beq	.L1066
-.L1067:
+	beq	.L1071
+.L1072:
 	mov	r7, r4
-.L1083:
-	ldr	r3, .L1085+8
+.L1088:
+	ldr	r3, .L1090+8
 	mov	r2, r7
-	ldr	r6, .L1085+12
+	ldr	r6, .L1090+12
 	ldr	ip, [r8, #0]
 	ldr	lr, [r3, #0]
-	ldr	r3, .L1085+16
+	ldr	r3, .L1090+16
 	ldrh	fp, [r6, #0]
 	ldrh	r6, [r3, #0]
 	movs	r3, #0
 	mov	r4, r3
 	stmia	sp, {r6, ip}
-	b	.L1068
-.L1070:
+	b	.L1073
+.L1075:
 	ldrh	r0, [r2, #16]
 	cmp	r0, sl
-	beq	.L1069
+	beq	.L1074
 	ldr	r6, [sp, #4]
 	mov	ip, #36
 	orr	r0, r5, r0, lsl #10
@@ -9105,21 +9149,21 @@ FtlGcScanTempBlk:
 	bic	r0, r0, #3
 	add	r0, lr, r0
 	str	r0, [r1, #12]
-.L1069:
+.L1074:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1068:
+.L1073:
 	cmp	r3, fp
-	bne	.L1070
+	bne	.L1075
 	ldr	r0, [r8, #0]
 	mov	r1, r4
 	movs	r2, #0
 	movs	r6, #0
 	bl	FlashReadPages
 	mov	fp, r6
-	b	.L1071
-.L1079:
+	b	.L1076
+.L1084:
 	ldr	r3, [r8, #0]
 	adds	r2, r3, r6
 	ldr	r1, [r2, #4]
@@ -9132,57 +9176,57 @@ FtlGcScanTempBlk:
 	ldr	r1, [sp, #8]
 	ldr	r2, [sp, #16]
 	ldr	r3, [r3, r6]
-	cbnz	r3, .L1072
+	cbnz	r3, .L1077
 	ldr	r3, [r2, #12]
 	adds	r6, r6, #36
 	ldrh	r2, [r3, #0]
 	cmp	r2, sl
-	bne	.L1073
-	ldr	r3, .L1085+20
+	bne	.L1078
+	ldr	r3, .L1090+20
 	movs	r1, #1
 	mov	r2, r0
 	mov	r4, r7
 	str	r1, [r3, #0]
-	b	.L1066
-.L1073:
+	b	.L1071
+.L1078:
 	add	fp, fp, #1
 	ldr	r0, [r3, #12]
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
 	uxth	fp, fp
-	b	.L1071
-.L1072:
+	b	.L1076
+.L1077:
 	mov	fp, r1
-	ldr	r0, .L1085+24
+	ldr	r0, .L1090+24
 	ldrh	r1, [r7, #0]
 	mov	r2, fp
 	bl	printf
-	ldr	r3, .L1085+28
+	ldr	r3, .L1090+28
 	mov	r4, r7
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1074
-	ldr	r3, .L1085+32
+	cbnz	r3, .L1079
+	ldr	r3, .L1090+32
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1075
-.L1074:
-	ldr	r3, .L1085+36
+	cbz	r3, .L1080
+.L1079:
+	ldr	r3, .L1090+36
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #119
-	bls	.L1076
-.L1075:
+	bls	.L1081
+.L1080:
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	bne	.L1077
-.L1076:
+	bne	.L1082
+.L1081:
 	ldr	r3, [r8, #0]
 	adds	r6, r3, r6
 	ldr	r6, [r6, #4]
 	str	r6, [sp, #20]
-.L1077:
-	ldr	r3, .L1085+40
+.L1082:
+	ldr	r3, .L1090+40
 	movs	r5, #0
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
@@ -9191,20 +9235,20 @@ FtlGcScanTempBlk:
 	bl	INSERT_FREE_LIST
 	strh	sl, [r4, #0]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1078
-.L1071:
+	b	.L1083
+.L1076:
 	cmp	fp, r4
-	bne	.L1079
-	ldr	r3, .L1085+4
+	bne	.L1084
+	ldr	r3, .L1090+4
 	adds	r5, r5, #1
 	uxth	r5, r5
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bhi	.L1083
+	bhi	.L1088
 	mov	r4, r7
 	movs	r2, #0
-.L1066:
-	ldr	r3, .L1085
+.L1071:
+	ldr	r3, .L1090
 	mov	r0, r4
 	movw	r1, #65535
 	strh	r5, [r4, #2]	@ movhi
@@ -9215,20 +9259,20 @@ FtlGcScanTempBlk:
 	ldr	r0, [sp, #20]
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1086:
+.L1091:
 	.align	2
-.L1085:
+.L1090:
 	.word	.LANCHOR195
-	.word	.LANCHOR68
-	.word	.LANCHOR133
-	.word	.LANCHOR53
-	.word	.LANCHOR74
-	.word	.LANCHOR140
-	.word	.LC20
+	.word	.LANCHOR56
+	.word	.LANCHOR121
+	.word	.LANCHOR41
+	.word	.LANCHOR62
 	.word	.LANCHOR128
+	.word	.LC20
+	.word	.LANCHOR116
 	.word	.LANCHOR7
-	.word	.LANCHOR96
-	.word	.LANCHOR101
+	.word	.LANCHOR84
+	.word	.LANCHOR89
 	.word	.LANCHOR177
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlScanSysBlk,"ax",%progbits
@@ -9240,49 +9284,49 @@ FtlGcScanTempBlk:
 FtlScanSysBlk:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1148
+	ldr	r3, .L1152
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L1148+4
+	ldr	r5, .L1152+4
 	sub	sp, sp, #40
 	strh	r4, [r3, #0]	@ movhi
 	mov	r1, r4
-	ldr	r3, .L1148+8
+	ldr	r3, .L1152+8
 	ldr	r2, [r5, #0]
-	ldr	r7, .L1148+12
+	ldr	r7, .L1152+12
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1148+16
+	ldr	r3, .L1152+16
 	lsls	r2, r2, #2
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldr	r2, [r5, #0]
-	ldr	r3, .L1148+20
+	ldr	r3, .L1152+20
 	mov	r1, r4
-	ldr	r5, .L1148+24
+	ldr	r5, .L1152+24
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L1148+28
+	ldr	r3, .L1152+28
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memset
-	ldr	r3, .L1148+32
+	ldr	r3, .L1152+32
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r0, .L1148+36
+	ldr	r0, .L1152+36
 	movs	r1, #255
 	movs	r2, #12
 	bl	memset
-	ldr	r3, .L1148+40
+	ldr	r3, .L1152+40
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #24]
-	b	.L1088
-.L1090:
+	b	.L1093
+.L1095:
 	ldrb	r0, [fp, r4]	@ zero_extendqisi2
 	ldr	r1, [sp, #24]
 	str	r3, [sp, #4]
@@ -9291,7 +9335,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L1089
+	cbnz	r0, .L1094
 	ldr	r1, [r7, #0]
 	lsls	r2, r2, #10
 	ldr	r0, [r6, #0]
@@ -9306,34 +9350,34 @@ FtlScanSysBlk:
 	adds	r2, r0, r2
 	str	r2, [r1, #12]
 	uxth	r3, r3
-.L1089:
+.L1094:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1125
-.L1137:
+	b	.L1130
+.L1142:
 	movs	r3, #0
-	ldr	fp, .L1148+76
-	ldr	r8, .L1148+80
+	ldr	fp, .L1152+76
+	ldr	r8, .L1152+80
 	mov	r4, r3
-	ldr	r6, .L1148+44
+	ldr	r6, .L1152+44
 	mov	sl, #36
-	ldr	r5, .L1148+48
+	ldr	r5, .L1152+48
 	str	r3, [sp, #20]
-.L1125:
-	ldr	r1, .L1148+52
+.L1130:
+	ldr	r1, .L1152+52
 	ldrh	r2, [r1, #0]
 	cmp	r2, r4
-	bhi	.L1090
+	bhi	.L1095
 	str	r3, [sp, #20]
 	cmp	r3, #0
-	beq	.L1091
+	beq	.L1096
 	ldr	r0, [r7, #0]
 	mov	r1, r3
 	movs	r2, #1
 	movs	r6, #0
 	bl	FlashReadPages
 	str	r6, [sp, #32]
-.L1124:
+.L1129:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
@@ -9341,9 +9385,9 @@ FtlScanSysBlk:
 	adds	r3, r3, #1
 	ldr	r4, [r2, #12]
 	ubfx	r5, r5, #10, #16
-	bne	.L1092
+	bne	.L1097
 	mov	r8, #16
-.L1094:
+.L1099:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -9355,79 +9399,79 @@ FtlScanSysBlk:
 	ldrh	r3, [r4, #0]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1093
-	ldr	r1, .L1148+12
+	bne	.L1098
+	ldr	r1, .L1152+12
 	mov	r2, #-1
 	ldr	r3, [r1, #0]
 	str	r2, [r3, r6]
-	b	.L1092
-.L1093:
+	b	.L1097
+.L1098:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	bne	.L1092
+	bne	.L1097
 	add	r8, r8, #-1
 	uxth	r8, r8
 	cmp	r8, #0
-	bne	.L1094
-.L1092:
+	bne	.L1099
+.L1097:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	beq	.L1095
-	ldr	r2, .L1148+56
+	beq	.L1100
+	ldr	r2, .L1152+56
 	ldr	r3, [r4, #4]
 	ldr	r1, [r2, #0]
 	adds	r0, r1, #1
-	beq	.L1096
+	beq	.L1101
 	cmp	r1, r3
-	bhi	.L1097
-.L1096:
+	bhi	.L1102
+.L1101:
 	adds	r1, r3, #1
-	beq	.L1097
+	beq	.L1102
 	adds	r3, r3, #1
 	str	r3, [r2, #0]
-.L1097:
+.L1102:
 	ldrh	r3, [r4, #0]
 	movw	r2, #61604
 	cmp	r3, r2
-	beq	.L1100
-	bhi	.L1103
+	beq	.L1105
+	bhi	.L1108
 	movw	r2, #61574
 	cmp	r3, r2
-	bne	.L1098
-	b	.L1146
-.L1103:
+	bne	.L1103
+	b	.L1150
+.L1108:
 	movw	r2, #61634
 	cmp	r3, r2
-	beq	.L1101
+	beq	.L1106
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1098
-	b	.L1147
-.L1101:
-	ldr	r3, .L1148
-	ldr	r8, .L1148+4
+	bne	.L1103
+	b	.L1151
+.L1106:
+	ldr	r3, .L1152
+	ldr	r8, .L1152+4
 	ldrh	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1104
-	ldr	r1, .L1148+60
+	bls	.L1109
+	ldr	r1, .L1152+60
 	movw	r2, #1269
-	ldr	r0, .L1148+64
+	ldr	r0, .L1152+64
 	bl	printf
-	ldr	r0, .L1148+68
-	ldr	r1, .L1148+72
+	ldr	r0, .L1152+68
+	ldr	r1, .L1152+72
 	bl	printf
-.L1104:
+.L1109:
 	ldr	r3, [r8, #0]
 	mov	ip, #0
-	ldr	r1, .L1148
+	ldr	r1, .L1152
 	uxth	r2, r3
 	str	r3, [sp, #12]
 	subs	r3, r2, #1
 	ldrh	r0, [r1, #0]
-	ldr	r1, .L1148+16
+	ldr	r1, .L1152+16
 	uxth	r3, r3
 	subs	r2, r2, r0
 	subs	r2, r2, #1
@@ -9438,8 +9482,8 @@ FtlScanSysBlk:
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #16]
 	mov	sl, r5
-	b	.L1105
-.L1111:
+	b	.L1110
+.L1116:
 	rsb	r2, ip, fp
 	str	r2, [sp, #28]
 	ldr	r2, [sp, #16]
@@ -9449,20 +9493,20 @@ FtlScanSysBlk:
 	str	r5, [sp, #16]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1106
+	bls	.L1111
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	str	r2, [sp, #16]
 	cmp	ip, #0
-	bne	.L1107
+	bne	.L1112
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	beq	.L1107
+	beq	.L1112
 	add	ip, r0, #1
-	ldr	r0, .L1148
+	ldr	r0, .L1152
 	strh	ip, [r0, #0]	@ movhi
-.L1107:
-	ldr	r0, .L1148+20
+.L1112:
+	ldr	r0, .L1152+20
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #12]
@@ -9470,98 +9514,98 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1108
-.L1109:
+	b	.L1113
+.L1114:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [ip, #2]!
 	strh	sl, [r8], #2	@ movhi
-.L1108:
+.L1113:
 	ldr	r2, [sp, #12]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1109
+	bne	.L1114
 	ldr	r1, [r4, #4]
 	mov	r3, fp
 	ldr	r2, [sp, #16]
 	ldr	sl, [sp, #28]
 	str	r1, [r2, #0]
-	ldr	r2, .L1148+20
+	ldr	r2, .L1152+20
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1110
-.L1106:
+	b	.L1115
+.L1111:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1105:
+.L1110:
 	ldr	r5, [sp, #36]
 	sxth	r2, r3
 	cmp	r2, r5
-	bgt	.L1111
+	bgt	.L1116
 	mov	r5, sl
-.L1110:
+.L1115:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1098
-	ldr	r2, .L1148
-	ldr	r0, .L1148+4
+	blt	.L1103
+	ldr	r2, .L1152
+	ldr	r0, .L1152+4
 	ldrh	r1, [r2, #0]
 	ldr	r0, [r0, #0]
 	subs	r0, r0, r1
 	subs	r0, r0, #1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1098
+	bgt	.L1103
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1148+16
+	ldr	r2, .L1152+16
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1148+20
-	b	.L1144
-.L1149:
+	ldr	r2, .L1152+20
+	b	.L1148
+.L1153:
 	.align	2
-.L1148:
-	.word	.LANCHOR123
-	.word	.LANCHOR80
-	.word	.LANCHOR86
+.L1152:
+	.word	.LANCHOR111
+	.word	.LANCHOR68
+	.word	.LANCHOR74
 	.word	.LANCHOR177
-	.word	.LANCHOR125
-	.word	.LANCHOR124
-	.word	.LANCHOR77
+	.word	.LANCHOR113
+	.word	.LANCHOR112
+	.word	.LANCHOR65
 	.word	.LANCHOR189
-	.word	.LANCHOR87
+	.word	.LANCHOR75
 	.word	.LANCHOR196
-	.word	.LANCHOR55
-	.word	.LANCHOR133
-	.word	.LANCHOR74
-	.word	.LANCHOR53
+	.word	.LANCHOR43
+	.word	.LANCHOR121
+	.word	.LANCHOR62
+	.word	.LANCHOR41
 	.word	.LANCHOR156
 	.word	.LANCHOR197
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR62
-	.word	.LANCHOR132
-.L1146:
-	ldr	r3, .L1150
-	ldr	r8, .L1150+28
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR50
+	.word	.LANCHOR120
+.L1150:
+	ldr	r3, .L1154
+	ldr	r8, .L1154+28
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1112
-	ldr	r1, .L1150+4
+	bls	.L1117
+	ldr	r1, .L1154+4
 	movw	r2, #1316
-	ldr	r0, .L1150+8
+	ldr	r0, .L1154+8
 	bl	printf
-	ldr	r0, .L1150+12
-	ldr	r1, .L1150+16
+	ldr	r0, .L1154+12
+	ldr	r1, .L1154+16
 	bl	printf
-.L1112:
-	ldr	r1, .L1150
+.L1117:
+	ldr	r1, .L1154
 	mov	ip, #0
 	ldrh	r8, [r8, #0]
 	ldrh	r0, [r1, #0]
@@ -9570,14 +9614,14 @@ FtlScanSysBlk:
 	uxth	r3, r2
 	subs	r2, r2, r0
 	str	r2, [sp, #36]
-	ldr	r2, .L1150+20
+	ldr	r2, .L1154+20
 	sxth	fp, r3
 	ldr	r1, [r2, #0]
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #28]
 	mov	sl, r5
-	b	.L1113
-.L1119:
+	b	.L1118
+.L1124:
 	ldr	r2, [sp, #28]
 	add	ip, ip, #1
 	ldr	r8, [r4, #4]
@@ -9585,19 +9629,19 @@ FtlScanSysBlk:
 	str	r5, [sp, #28]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1114
+	bls	.L1119
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	cmp	ip, #0
-	bne	.L1115
+	bne	.L1120
 	ldr	sl, [sp, #16]
 	cmp	r0, sl
-	beq	.L1115
+	beq	.L1120
 	add	ip, r0, #1
-	ldr	r0, .L1150
+	ldr	r0, .L1154
 	strh	ip, [r0, #0]	@ movhi
-.L1115:
-	ldr	r0, .L1150+24
+.L1120:
+	ldr	r0, .L1154+24
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #16]
@@ -9606,109 +9650,106 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1116
-.L1117:
+	b	.L1121
+.L1122:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [r8, #2]!
 	strh	sl, [ip], #2	@ movhi
-.L1116:
+.L1121:
 	ldr	r2, [sp, #16]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1117
+	bne	.L1122
 	ldr	r2, [sp, #28]
 	mov	r3, fp
 	ldr	r1, [r4, #4]
 	ldr	sl, [sp, #12]
 	str	r1, [r2, #0]
-	ldr	r2, .L1150+24
+	ldr	r2, .L1154+24
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1118
-.L1114:
+	b	.L1123
+.L1119:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1113:
+.L1118:
 	ldr	r5, [sp, #36]
 	rsb	r2, ip, fp
 	str	r2, [sp, #12]
 	cmp	r2, r5
-	bgt	.L1119
+	bgt	.L1124
 	mov	r5, sl
-.L1118:
+.L1123:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1098
-	ldr	r0, .L1150+28
-	ldr	r2, .L1150
+	blt	.L1103
+	ldr	r0, .L1154+28
+	ldr	r2, .L1154
 	ldrh	r0, [r0, #0]
 	ldrh	r1, [r2, #0]
 	subs	r0, r0, #1
 	subs	r0, r0, r1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1098
+	bgt	.L1103
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1150+20
+	ldr	r2, .L1154+20
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1150+24
-.L1144:
+	ldr	r2, .L1154+24
+.L1148:
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L1098
-.L1100:
-	ldr	r8, .L1150+32
+	b	.L1103
+.L1105:
+	ldr	r8, .L1154+32
 	movw	sl, #65535
 	ldrh	r3, [r8, #0]
 	cmp	r3, sl
-	bne	.L1120
+	bne	.L1125
 	ldr	r3, [r4, #4]
 	strh	r5, [r8, #0]	@ movhi
 	str	r3, [r8, #8]
-	b	.L1098
-.L1120:
+	b	.L1103
+.L1125:
 	ldrh	r0, [r8, #4]
 	movw	ip, #65535
 	cmp	r0, ip
-	beq	.L1121
+	beq	.L1126
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1121:
+.L1126:
 	ldr	r2, [r4, #4]
 	ldr	r1, [r8, #8]
-	ldr	r3, .L1150+32
+	ldr	r3, .L1154+32
 	cmp	r1, r2
-	bcs	.L1122
+	bcs	.L1127
 	ldrh	r1, [r3, #0]
 	str	r2, [r3, #8]
 	strh	r5, [r3, #0]	@ movhi
 	strh	r1, [r3, #4]	@ movhi
-	b	.L1098
-.L1122:
+	b	.L1103
+.L1127:
 	strh	r5, [r3, #4]	@ movhi
-	b	.L1098
-.L1147:
+	b	.L1103
+.L1151:
 	mov	r0, r5
-	b	.L1145
-.L1095:
-	ldr	r1, .L1150+36
+	b	.L1149
+.L1100:
+	ldr	r2, .L1154+36
 	mov	r0, r5
-	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1123
-.L1145:
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	cbz	r1, .L1128
+.L1149:
 	movs	r1, #0
-	b	.L1143
-.L1123:
-	movs	r1, #1
-.L1143:
+.L1128:
 	bl	FtlFreeSysBlkQueueIn
-.L1098:
+.L1103:
 	ldr	r5, [sp, #32]
 	adds	r6, r6, #36
 	adds	r3, r5, #1
@@ -9716,36 +9757,36 @@ FtlScanSysBlk:
 	uxth	r3, r3
 	str	r3, [sp, #32]
 	cmp	r3, r5
-	bne	.L1124
-.L1091:
+	bne	.L1129
+.L1096:
 	ldr	sl, [sp, #24]
 	add	r3, sl, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L1088:
-	ldr	r3, .L1150+40
+.L1093:
+	ldr	r3, .L1154+40
 	ldr	ip, [sp, #24]
 	ldrh	r3, [r3, #0]
 	cmp	r3, ip
-	bhi	.L1137
-	ldr	r3, .L1150+44
+	bhi	.L1142
+	ldr	r3, .L1154+44
 	ldr	r1, [r3, #0]
 	ldrh	r3, [r1, #0]
-	cbnz	r3, .L1126
-	ldr	r2, .L1150+48
+	cbnz	r3, .L1131
+	ldr	r2, .L1154+48
 	ldrh	r2, [r2, #0]
-	cbz	r2, .L1126
-	ldr	r2, .L1150+52
+	cbz	r2, .L1131
+	ldr	r2, .L1154+52
 	ldr	r4, [r2, #0]
 	mov	r2, r1
-	b	.L1127
-.L1130:
+	b	.L1132
+.L1135:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
-	cbz	r5, .L1127
-	ldr	r3, .L1150+56
+	cbz	r5, .L1132
+	ldr	r3, .L1154+56
 	sxth	r0, r0
-	ldr	ip, .L1150+52
+	ldr	ip, .L1154+52
 	mov	sl, r1
 	add	r6, r1, r0, lsl #1
 	ldr	r5, [r3, #0]
@@ -9754,8 +9795,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r7, r5, r0, lsl #2
 	mov	fp, r3
-	b	.L1128
-.L1129:
+	b	.L1133
+.L1134:
 	ldrh	r1, [r6, r2]
 	strh	r1, [sl, r2]	@ movhi
 	ldr	r1, [r7, r3]
@@ -9763,37 +9804,37 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	fp, [r6, r2]	@ movhi
 	adds	r2, r2, #2
-.L1128:
+.L1133:
 	ldr	r1, [ip, #0]
 	add	r8, r4, r0
 	adds	r4, r4, #1
 	cmp	r8, r1
-	bcc	.L1129
-	b	.L1126
-.L1127:
+	bcc	.L1134
+	b	.L1131
+.L1132:
 	cmp	r3, r4
 	uxth	r0, r3
-	bne	.L1130
-.L1126:
-	ldr	r3, .L1150+24
+	bne	.L1135
+.L1131:
+	ldr	r3, .L1154+24
 	ldr	r0, [r3, #0]
 	ldrh	r3, [r0, #0]
 	cmp	r3, #0
-	bne	.L1131
-	ldr	r2, .L1150
+	bne	.L1136
+	ldr	r2, .L1154
 	ldrh	r2, [r2, #0]
 	cmp	r2, #0
-	beq	.L1131
-	ldr	r2, .L1150+28
+	beq	.L1136
+	ldr	r2, .L1154+28
 	ldrh	r4, [r2, #0]
 	mov	r2, r0
-	b	.L1132
-.L1135:
+	b	.L1137
+.L1140:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L1132
-	ldr	r3, .L1150+20
+	beq	.L1137
+	ldr	r3, .L1154+20
 	sxth	r1, r1
 	subs	r6, r1, r6
 	add	r7, r0, r1, lsl #1
@@ -9803,8 +9844,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r0, r0, r6, lsl #1
 	add	ip, r5, r1, lsl #2
-	b	.L1133
-.L1134:
+	b	.L1138
+.L1139:
 	ldrh	r8, [r7, r2]
 	ldr	sl, [ip, r3]
 	strh	r8, [r0, r2]	@ movhi
@@ -9814,64 +9855,64 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	r8, [r7, r2]	@ movhi
 	adds	r2, r2, #2
-.L1133:
-	ldr	r8, .L1150+28
+.L1138:
+	ldr	r8, .L1154+28
 	add	sl, r4, r1
 	adds	r4, r4, #1
 	ldrh	r8, [r8, #0]
 	cmp	sl, r8
-	blt	.L1134
-	b	.L1131
-.L1151:
+	blt	.L1139
+	b	.L1136
+.L1155:
 	.align	2
-.L1150:
-	.word	.LANCHOR86
+.L1154:
+	.word	.LANCHOR74
 	.word	.LANCHOR197
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR189
-	.word	.LANCHOR87
-	.word	.LANCHOR77
+	.word	.LANCHOR75
+	.word	.LANCHOR65
 	.word	.LANCHOR196
 	.word	.LANCHOR7
-	.word	.LANCHOR56
-	.word	.LANCHOR124
-	.word	.LANCHOR123
-	.word	.LANCHOR80
-	.word	.LANCHOR125
-.L1132:
+	.word	.LANCHOR44
+	.word	.LANCHOR112
+	.word	.LANCHOR111
+	.word	.LANCHOR68
+	.word	.LANCHOR113
+.L1137:
 	cmp	r3, r4
 	uxth	r1, r3
 	mov	r6, r3
-	blt	.L1135
-.L1131:
-	ldr	r3, .L1152
+	blt	.L1140
+.L1136:
+	ldr	r3, .L1156
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1152+4
+	ldr	r3, .L1156+4
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	bls	.L1136
-	ldr	r1, .L1152+8
+	bls	.L1141
+	ldr	r1, .L1156+8
 	movw	r2, #1450
-	ldr	r0, .L1152+12
+	ldr	r0, .L1156+12
 	bl	printf
-	ldr	r0, .L1152+16
-	ldr	r1, .L1152+20
+	ldr	r0, .L1156+16
+	ldr	r1, .L1156+20
 	bl	printf
-.L1136:
+.L1141:
 	movs	r0, #0
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1153:
+.L1157:
 	.align	2
-.L1152:
-	.word	.LANCHOR123
-	.word	.LANCHOR80
+.L1156:
+	.word	.LANCHOR111
+	.word	.LANCHOR68
 	.word	.LANCHOR197
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
 	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
@@ -9886,10 +9927,10 @@ FtlGetLastWrittenPage:
 	push	{r4, r5, r6, r7, r8, sl, lr}
 	sub	sp, sp, #108
 	it	eq
-	ldreq	r3, .L1165
+	ldreq	r3, .L1169
 	mov	r5, r1
 	it	ne
-	ldrne	r3, .L1165+4
+	ldrne	r3, .L1169+4
 	add	sl, sp, #68
 	lsl	r8, r0, #10
 	movs	r1, #1
@@ -9908,9 +9949,9 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L1158
-	b	.L1163
-.L1161:
+	bne	.L1162
+	b	.L1167
+.L1165:
 	adds	r6, r6, r3
 	movs	r1, #1
 	mov	r0, sl
@@ -9923,33 +9964,33 @@ FtlGetLastWrittenPage:
 	bl	FlashReadPages
 	ldr	r3, [sp, #4]
 	adds	r3, r3, #1
-	bne	.L1159
+	bne	.L1163
 	ldr	r3, [sp, #8]
 	adds	r3, r3, #1
-	bne	.L1159
+	bne	.L1163
 	ldr	r3, [sp, #68]
 	adds	r3, r3, #1
-	beq	.L1159
+	beq	.L1163
 	subs	r4, r6, #1
 	uxth	r4, r4
-	b	.L1163
-.L1159:
+	b	.L1167
+.L1163:
 	adds	r6, r6, #1
 	uxth	r7, r6
-.L1163:
+.L1167:
 	sxth	r6, r7
 	sxth	r3, r4
 	cmp	r6, r3
-	ble	.L1161
-.L1158:
+	ble	.L1165
+.L1162:
 	sxth	r0, r4
 	add	sp, sp, #108
 	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L1166:
+.L1170:
 	.align	2
-.L1165:
-	.word	.LANCHOR69
-	.word	.LANCHOR68
+.L1169:
+	.word	.LANCHOR57
+	.word	.LANCHOR56
 	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
 	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
@@ -9962,23 +10003,23 @@ FtlLoadSysInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r4, #0
-	ldr	r6, .L1188
+	ldr	r6, .L1192
 	mov	r1, r4
-	ldr	r5, .L1188+4
-	ldr	r8, .L1188+60
+	ldr	r5, .L1192+4
+	ldr	r8, .L1192+60
 	ldr	r3, [r6, #0]
 	str	r4, [r5, #8]
 	str	r3, [r5, #12]
-	ldr	r3, .L1188+8
+	ldr	r3, .L1192+8
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1188+12
+	ldr	r3, .L1192+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldrh	r0, [r8, #0]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1184
+	beq	.L1188
 	movs	r1, #1
 	mov	fp, r8
 	bl	FtlGetLastWrittenPage
@@ -9986,14 +10027,14 @@ FtlLoadSysInfo:
 	mov	r7, r0
 	add	r3, sl, #1
 	strh	r3, [r8, #2]	@ movhi
-	ldr	r8, .L1188+160
-	ldr	r3, .L1188+16
-	b	.L1169
-.L1172:
+	ldr	r8, .L1192+160
+	ldr	r3, .L1192+16
+	b	.L1173
+.L1176:
 	ldrh	r1, [fp, #0]
 	sxth	r2, sl
 	subs	r2, r2, r4
-	ldr	r0, .L1188+4
+	ldr	r0, .L1192+4
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r5, #4]
 	ldr	r2, [r8, #0]
@@ -10005,46 +10046,46 @@ FtlLoadSysInfo:
 	ldr	r2, [r5, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1170
+	beq	.L1174
 	ldr	r2, [r8, #0]
 	ldr	r2, [r2, #0]
 	cmp	r2, r3
-	bne	.L1170
+	bne	.L1174
 	ldr	r2, [r6, #0]
 	ldrh	r1, [r2, #0]
 	movw	r2, #61604
 	cmp	r1, r2
-	beq	.L1171
-.L1170:
+	beq	.L1175
+.L1174:
 	adds	r4, r4, #1
-.L1169:
+.L1173:
 	subs	r2, r7, r4
 	lsls	r2, r2, #16
-	bpl	.L1172
-	b	.L1187
-.L1171:
-	ldr	r3, .L1188+8
+	bpl	.L1176
+	b	.L1191
+.L1175:
+	ldr	r3, .L1192+8
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1188+20
+	ldr	r3, .L1192+20
 	adds	r2, r2, #24
 	ldrh	r3, [r3, #0]
 	cmp	r3, r2, lsl #1
-	bcs	.L1174
-	ldr	r1, .L1188+24
+	bcs	.L1178
+	ldr	r1, .L1192+24
 	mov	r2, #1512
-	ldr	r0, .L1188+28
+	ldr	r0, .L1192+28
 	bl	printf
-	ldr	r0, .L1188+32
-	ldr	r1, .L1188+36
+	ldr	r0, .L1192+32
+	ldr	r1, .L1192+36
 	bl	printf
-.L1174:
-	ldr	r4, .L1188+4
+.L1178:
+	ldr	r4, .L1192+4
 	movs	r2, #48
-	ldr	r5, .L1188+8
-	ldr	r0, .L1188+40
+	ldr	r5, .L1192+8
+	ldr	r0, .L1192+40
 	ldr	r1, [r4, #8]
 	bl	memcpy
-	ldr	r3, .L1188+12
+	ldr	r3, .L1192+12
 	ldrh	r2, [r5, #0]
 	ldr	r1, [r4, #8]
 	ldr	r0, [r3, #0]
@@ -10052,7 +10093,7 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #1
 	bl	memcpy
 	ldrh	r2, [r5, #0]
-	ldr	r0, .L1188+44
+	ldr	r0, .L1192+44
 	add	r1, r2, #24
 	ldr	r3, [r4, #8]
 	lsrs	r2, r2, #3
@@ -10061,12 +10102,12 @@ FtlLoadSysInfo:
 	adds	r2, r2, #4
 	add	r1, r3, r1, lsl #2
 	bl	memcpy
-	ldr	r3, .L1188+48
+	ldr	r3, .L1192+48
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1175
+	cbz	r3, .L1179
 	ldrh	r3, [r5, #0]
-	ldr	r2, .L1188+52
-	ldr	r0, .L1188+56
+	ldr	r2, .L1192+52
+	ldr	r0, .L1192+56
 	lsrs	r1, r3, #3
 	add	r1, r1, r3, lsl #1
 	ldrh	r2, [r2, #0]
@@ -10077,55 +10118,55 @@ FtlLoadSysInfo:
 	lsls	r2, r2, #2
 	add	r1, r3, r1, lsl #2
 	bl	memcpy
-.L1175:
-	ldr	r3, .L1188+40
-	ldr	r2, .L1188+16
+.L1179:
+	ldr	r3, .L1192+40
+	ldr	r2, .L1192+16
 	ldr	r1, [r3, #0]
 	cmp	r1, r2
-	bne	.L1184
+	bne	.L1188
 	ldrh	r4, [r3, #8]
-	ldr	r2, .L1188+60
+	ldr	r2, .L1192+60
 	strh	r4, [r2, #6]	@ movhi
 	ldrb	r2, [r3, #10]	@ zero_extendqisi2
-	ldr	r3, .L1188+64
+	ldr	r3, .L1192+64
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1184
-	ldr	r3, .L1188+68
-	ldr	r2, .L1188+72
+	bne	.L1188
+	ldr	r3, .L1192+68
+	ldr	r2, .L1192+72
 	str	r4, [r3, #0]
-	ldr	r3, .L1188+76
+	ldr	r3, .L1192+76
 	ldrh	r3, [r3, #0]
 	muls	r3, r4, r3
 	str	r3, [r2, #0]
-	ldr	r2, .L1188+80
+	ldr	r2, .L1192+80
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
-	ldr	r2, .L1188+84
+	ldr	r2, .L1192+84
 	str	r3, [r2, #0]
-	ldr	r3, .L1188+88
+	ldr	r3, .L1192+88
 	ldr	r5, [r3, #0]
-	ldr	r3, .L1188+92
+	ldr	r3, .L1192+92
 	ldrh	r0, [r3, #6]
-	ldr	r3, .L1188+96
+	ldr	r3, .L1192+96
 	subs	r0, r5, r0
 	subs	r0, r0, r4
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1188+100
+	ldr	r3, .L1192+100
 	cmp	r4, r5
 	strh	r0, [r3, #0]	@ movhi
-	bls	.L1176
-	ldr	r1, .L1188+24
+	bls	.L1180
+	ldr	r1, .L1192+24
 	movw	r2, #1539
-	ldr	r0, .L1188+28
+	ldr	r0, .L1192+28
 	bl	printf
-	ldr	r0, .L1188+32
-	ldr	r1, .L1188+36
+	ldr	r0, .L1192+32
+	ldr	r1, .L1192+36
 	bl	printf
-.L1176:
-	ldr	r3, .L1188+40
-	ldr	r2, .L1188+104
+.L1180:
+	ldr	r3, .L1192+40
+	ldr	r2, .L1192+104
 	ldrh	r1, [r3, #16]
 	ldrh	r0, [r3, #14]
 	ldrh	r5, [r3, #18]
@@ -10138,12 +10179,12 @@ FtlLoadSysInfo:
 	strh	r0, [r2, #0]	@ movhi
 	strb	r1, [r2, #8]
 	movs	r2, #0
-	ldr	r1, .L1188+108
+	ldr	r1, .L1192+108
 	strh	r2, [r1, #2]	@ movhi
 	strh	r4, [r1, #0]	@ movhi
 	strb	r2, [r1, #6]
 	strb	r2, [r1, #8]
-	ldr	r1, .L1188+112
+	ldr	r1, .L1192+112
 	strh	r5, [r1, #0]	@ movhi
 	ldrh	r5, [r3, #20]
 	lsrs	r6, r5, #6
@@ -10152,7 +10193,7 @@ FtlLoadSysInfo:
 	ldrb	r5, [r3, #12]	@ zero_extendqisi2
 	strh	r6, [r1, #2]	@ movhi
 	strb	r5, [r1, #8]
-	ldr	r1, .L1188+116
+	ldr	r1, .L1192+116
 	ldrh	r5, [r3, #22]
 	strh	r5, [r1, #0]	@ movhi
 	ldrh	r5, [r3, #24]
@@ -10162,109 +10203,109 @@ FtlLoadSysInfo:
 	ldrb	r5, [r3, #13]	@ zero_extendqisi2
 	strh	r6, [r1, #2]	@ movhi
 	strb	r5, [r1, #8]
-	ldr	r1, .L1188+120
+	ldr	r1, .L1192+120
 	ldr	r5, [r3, #32]
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+124
+	ldr	r1, .L1192+124
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+128
+	ldr	r1, .L1192+128
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+132
+	ldr	r1, .L1192+132
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+136
+	ldr	r1, .L1192+136
 	str	r5, [r1, #0]
-	ldr	r1, .L1188+140
+	ldr	r1, .L1192+140
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+144
+	ldr	r1, .L1192+144
 	str	r2, [r1, #0]
-	ldr	r1, .L1188+148
+	ldr	r1, .L1192+148
 	str	r2, [r1, #0]
-	ldr	r2, .L1188+152
+	ldr	r2, .L1192+152
 	ldr	r1, [r3, #40]
 	ldr	r5, [r2, #0]
 	cmp	r1, r5
 	it	hi
 	strhi	r1, [r2, #0]
 	ldr	r2, [r3, #36]
-	ldr	r3, .L1188+156
+	ldr	r3, .L1192+156
 	ldr	r1, [r3, #0]
 	cmp	r2, r1
 	it	hi
 	strhi	r2, [r3, #0]
 	cmp	r0, r4
-	beq	.L1179
-	ldr	r0, .L1188+104
+	beq	.L1183
+	ldr	r0, .L1192+104
 	bl	make_superblock
-.L1179:
-	ldr	r0, .L1188+112
+.L1183:
+	ldr	r0, .L1192+112
 	movw	r4, #65535
 	ldrh	r3, [r0, #0]
 	cmp	r3, r4
-	beq	.L1180
+	beq	.L1184
 	bl	make_superblock
-.L1180:
-	ldr	r0, .L1188+116
+.L1184:
+	ldr	r0, .L1192+116
 	ldrh	r3, [r0, #0]
 	cmp	r3, r4
-	beq	.L1181
+	beq	.L1185
 	bl	make_superblock
-.L1181:
-	ldr	r0, .L1188+108
+.L1185:
+	ldr	r0, .L1192+108
 	movw	r3, #65535
 	ldrh	r2, [r0, #0]
 	cmp	r2, r3
-	beq	.L1185
+	beq	.L1189
 	bl	make_superblock
-	b	.L1185
-.L1184:
+	b	.L1189
+.L1188:
 	mov	r0, #-1
-	b	.L1168
-.L1185:
+	b	.L1172
+.L1189:
 	movs	r0, #0
-.L1168:
+.L1172:
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1187:
-	ldr	r1, .L1188+24
+.L1191:
+	ldr	r1, .L1192+24
 	movw	r2, #1510
-	ldr	r0, .L1188+28
+	ldr	r0, .L1192+28
 	bl	printf
-	ldr	r1, .L1188+36
-	ldr	r0, .L1188+32
+	ldr	r1, .L1192+36
+	ldr	r0, .L1192+32
 	bl	printf
-	b	.L1171
-.L1189:
+	b	.L1175
+.L1193:
 	.align	2
-.L1188:
+.L1192:
 	.word	.LANCHOR184
 	.word	.LANCHOR198
-	.word	.LANCHOR55
-	.word	.LANCHOR101
+	.word	.LANCHOR43
+	.word	.LANCHOR89
 	.word	1179929683
-	.word	.LANCHOR73
+	.word	.LANCHOR61
 	.word	.LANCHOR199
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR143
-	.word	.LANCHOR119
-	.word	.LANCHOR85
-	.word	.LANCHOR82
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR131
+	.word	.LANCHOR107
+	.word	.LANCHOR73
+	.word	.LANCHOR70
 	.word	.LANCHOR191
 	.word	.LANCHOR196
-	.word	.LANCHOR60
+	.word	.LANCHOR48
 	.word	.LANCHOR200
-	.word	.LANCHOR88
-	.word	.LANCHOR68
-	.word	.LANCHOR71
-	.word	.LANCHOR84
-	.word	.LANCHOR57
-	.word	.LANCHOR90
-	.word	.LANCHOR53
+	.word	.LANCHOR76
+	.word	.LANCHOR56
+	.word	.LANCHOR59
+	.word	.LANCHOR72
+	.word	.LANCHOR45
+	.word	.LANCHOR78
+	.word	.LANCHOR41
 	.word	.LANCHOR201
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.word	.LANCHOR202
-	.word	.LANCHOR110
-	.word	.LANCHOR111
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR158
 	.word	.LANCHOR159
 	.word	.LANCHOR163
@@ -10275,7 +10316,7 @@ FtlLoadSysInfo:
 	.word	.LANCHOR161
 	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR98
+	.word	.LANCHOR86
 	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
 	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
@@ -10288,30 +10329,30 @@ FtlLoadBbt:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r3, #0
-	ldr	r6, .L1209
+	ldr	r6, .L1213
 	movw	sl, #61649
 	str	r3, [r6, #8]
-	ldr	r3, .L1209+4
+	ldr	r3, .L1213+4
 	ldr	r4, [r3, #0]
 	str	r4, [r6, #12]
 	bl	FtlBbtMemInit
-	ldr	r3, .L1209+8
+	ldr	r3, .L1213+8
 	mov	r8, r3
 	ldrh	r5, [r3, #0]
 	subs	r5, r5, #1
 	uxth	r5, r5
-	b	.L1191
-.L1195:
+	b	.L1195
+.L1199:
 	movs	r1, #1
-	ldr	r0, .L1209
+	ldr	r0, .L1213
 	mov	r2, r1
 	lsls	r3, r5, #10
 	str	r3, [r6, #4]
 	bl	FlashReadPages
 	ldr	r3, [r6, #0]
-	ldr	r7, .L1209
+	ldr	r7, .L1213
 	adds	r3, r3, #1
-	bne	.L1192
+	bne	.L1196
 	ldr	r3, [r6, #4]
 	movs	r1, #1
 	mov	r0, r7
@@ -10319,38 +10360,38 @@ FtlLoadBbt:
 	adds	r3, r3, #1
 	str	r3, [r6, #4]
 	bl	FlashReadPages
-.L1192:
+.L1196:
 	ldr	r3, [r7, #0]
 	adds	r3, r3, #1
-	beq	.L1193
+	beq	.L1197
 	ldrh	r3, [r4, #0]
 	cmp	r3, sl
-	bne	.L1193
-	ldr	r3, .L1209+12
+	bne	.L1197
+	ldr	r3, .L1213+12
 	ldr	r2, [r4, #4]
 	strh	r5, [r3, #0]	@ movhi
 	str	r2, [r3, #8]
 	ldrh	r2, [r4, #8]
 	strh	r2, [r3, #4]	@ movhi
-	b	.L1194
-.L1193:
+	b	.L1198
+.L1197:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1191:
+.L1195:
 	ldrh	r3, [r8, #0]
 	subs	r3, r3, #47
 	cmp	r3, r5
-	ble	.L1195
-.L1194:
-	ldr	r5, .L1209+12
+	ble	.L1199
+.L1198:
+	ldr	r5, .L1213+12
 	movw	r3, #65535
 	ldrh	r2, [r5, #0]
 	cmp	r2, r3
-	beq	.L1206
+	beq	.L1210
 	ldrh	r2, [r5, #4]
 	cmp	r2, r3
-	beq	.L1197
-	ldr	r6, .L1209
+	beq	.L1201
+	ldr	r6, .L1213
 	movs	r1, #1
 	lsls	r2, r2, #10
 	mov	r0, r6
@@ -10359,26 +10400,26 @@ FtlLoadBbt:
 	bl	FlashReadPages
 	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	beq	.L1197
+	beq	.L1201
 	ldrh	r2, [r4, #0]
 	movw	r3, #61649
 	cmp	r2, r3
-	bne	.L1197
+	bne	.L1201
 	ldr	r3, [r4, #4]
 	ldr	r2, [r5, #8]
 	cmp	r3, r2
-	bls	.L1197
+	bls	.L1201
 	ldrh	r2, [r5, #4]
 	str	r3, [r5, #8]
 	ldrh	r3, [r4, #8]
 	strh	r2, [r5, #0]	@ movhi
 	strh	r3, [r5, #4]	@ movhi
-.L1197:
-	ldr	fp, .L1209+12
+.L1201:
+	ldr	fp, .L1213+12
 	movs	r1, #1
 	movs	r5, #0
-	ldr	r6, .L1209
-	ldr	r8, .L1209+48
+	ldr	r6, .L1213
+	ldr	r8, .L1213+48
 	ldrh	r0, [fp, #0]
 	bl	FtlGetLastWrittenPage
 	uxth	sl, r0
@@ -10387,11 +10428,11 @@ FtlLoadBbt:
 	strh	r3, [fp, #2]	@ movhi
 	sxth	sl, sl
 	movw	r3, #61649
-	b	.L1198
-.L1201:
+	b	.L1202
+.L1205:
 	ldrh	r1, [fp, #0]
 	rsb	r2, r5, sl
-	ldr	r0, .L1209
+	ldr	r0, .L1213
 	orr	r2, r2, r1, lsl #10
 	str	r2, [r6, #4]
 	ldr	r2, [r8, #0]
@@ -10403,45 +10444,45 @@ FtlLoadBbt:
 	ldr	r2, [r6, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1199
+	beq	.L1203
 	ldrh	r2, [r4, #0]
 	cmp	r2, r3
-	beq	.L1200
-.L1199:
+	beq	.L1204
+.L1203:
 	adds	r5, r5, #1
-.L1198:
+.L1202:
 	subs	r2, r7, r5
 	lsls	r1, r2, #16
-	bpl	.L1201
-	b	.L1208
-.L1200:
-	ldr	r3, .L1209+12
+	bpl	.L1205
+	b	.L1212
+.L1204:
+	ldr	r3, .L1213+12
 	ldrh	r2, [r4, #10]
 	ldrh	r0, [r4, #12]
 	strh	r2, [r3, #6]	@ movhi
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1203
-	ldr	r3, .L1209+16
+	beq	.L1207
+	ldr	r3, .L1213+16
 	ldr	r2, [r3, #0]
 	cmp	r0, r2
-	beq	.L1203
-	ldr	r3, .L1209+20
+	beq	.L1207
+	ldr	r3, .L1213+20
 	ldrh	r3, [r3, #0]
 	lsrs	r3, r3, #2
 	cmp	r2, r3
-	bcs	.L1203
+	bcs	.L1207
 	cmp	r0, r3
-	bcs	.L1203
+	bcs	.L1207
 	bl	FtlSysBlkNumInit
-.L1203:
-	ldr	r5, .L1209+24
+.L1207:
+	ldr	r5, .L1213+24
 	movs	r4, #0
-	ldr	r8, .L1209+52
-	ldr	r7, .L1209+28
-	ldr	r6, .L1209
-	b	.L1204
-.L1205:
+	ldr	r8, .L1213+52
+	ldr	r7, .L1213+28
+	ldr	r6, .L1213
+	b	.L1208
+.L1209:
 	ldrh	r2, [r7, #0]
 	ldr	r1, [r6, #8]
 	ldr	r0, [r5, #4]!
@@ -10449,42 +10490,42 @@ FtlLoadBbt:
 	mla	r1, r4, r2, r1
 	bl	memcpy
 	adds	r4, r4, #1
-.L1204:
+.L1208:
 	ldrh	r3, [r8, #0]
 	cmp	r4, r3
-	bcc	.L1205
+	bcc	.L1209
 	movs	r0, #0
-	b	.L1196
-.L1206:
+	b	.L1200
+.L1210:
 	mov	r0, #-1
-.L1196:
+.L1200:
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1208:
-	ldr	r1, .L1209+32
+.L1212:
+	ldr	r1, .L1213+32
 	mov	r2, #336
-	ldr	r0, .L1209+36
+	ldr	r0, .L1213+36
 	bl	printf
-	ldr	r1, .L1209+40
-	ldr	r0, .L1209+44
+	ldr	r1, .L1213+40
+	ldr	r0, .L1213+44
 	bl	printf
-	b	.L1200
-.L1210:
+	b	.L1204
+.L1214:
 	.align	2
-.L1209:
+.L1213:
 	.word	.LANCHOR198
 	.word	.LANCHOR184
-	.word	.LANCHOR66
-	.word	.LANCHOR90
-	.word	.LANCHOR52
-	.word	.LANCHOR56
-	.word	.LANCHOR90+24
-	.word	.LANCHOR91
+	.word	.LANCHOR54
+	.word	.LANCHOR78
+	.word	.LANCHOR40
+	.word	.LANCHOR44
+	.word	.LANCHOR78+24
+	.word	.LANCHOR79
 	.word	.LANCHOR203
-	.word	.LC9
-	.word	.LC11
-	.word	.LC10
-	.word	.LANCHOR98
-	.word	.LANCHOR60
+	.word	.LC3
+	.word	.LC5
+	.word	.LC4
+	.word	.LANCHOR86
+	.word	.LANCHOR48
 	.size	FtlLoadBbt, .-FtlLoadBbt
 	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
@@ -10495,31 +10536,31 @@ FtlLoadBbt:
 FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1218
+	ldr	r3, .L1222
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L1218+4
+	ldr	r7, .L1222+4
 	ldr	r3, [r3, #0]
-	ldr	r6, .L1218+8
-	ldr	r8, .L1218+20
+	ldr	r6, .L1222+8
+	ldr	r8, .L1222+20
 	str	r3, [r7, #8]
-	ldr	r3, .L1218+12
+	ldr	r3, .L1222+12
 	ldr	sl, [r3, #0]
-	ldr	r3, .L1218+16
+	ldr	r3, .L1222+16
 	str	sl, [r7, #12]
-	b	.L1212
-.L1217:
+	b	.L1216
+.L1221:
 	ldrh	r4, [r8, #0]
 	movw	r2, #65535
 	movw	fp, #61664
 	strh	r2, [r6], #2	@ movhi
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1213
-.L1216:
+	b	.L1217
+.L1220:
 	mla	r2, r2, r5, r4
 	movs	r1, #1
-	ldr	r0, .L1218+4
+	ldr	r0, .L1222+4
 	lsls	r2, r2, #10
 	str	r2, [r7, #4]
 	mov	r2, r1
@@ -10528,37 +10569,37 @@ FtlLoadFactoryBbt:
 	ldr	r2, [r7, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1214
+	beq	.L1218
 	ldrh	r2, [sl, #0]
 	cmp	r2, fp
-	bne	.L1214
+	bne	.L1218
 	strh	r4, [r6, #-2]	@ movhi
-	b	.L1215
-.L1214:
+	b	.L1219
+.L1218:
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1213:
+.L1217:
 	ldrh	r2, [r8, #0]
 	sub	r1, r2, #15
 	cmp	r1, r4
-	ble	.L1216
-.L1215:
+	ble	.L1220
+.L1219:
 	adds	r5, r5, #1
-.L1212:
+.L1216:
 	ldrh	r2, [r3, #0]
 	cmp	r5, r2
-	bcc	.L1217
+	bcc	.L1221
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1219:
+.L1223:
 	.align	2
-.L1218:
-	.word	.LANCHOR98
+.L1222:
+	.word	.LANCHOR86
 	.word	.LANCHOR198
-	.word	.LANCHOR90+12
+	.word	.LANCHOR78+12
 	.word	.LANCHOR184
-	.word	.LANCHOR60
-	.word	.LANCHOR66
+	.word	.LANCHOR48
+	.word	.LANCHOR54
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
 	.section	.text.FlashProgSlc2KPages,"ax",%progbits
 	.align	1
@@ -10575,13 +10616,13 @@ FlashProgSlc2KPages:
 	mov	fp, r1
 	str	r3, [sp, #12]
 	mov	r5, r0
-	ldr	r3, .L1238
+	ldr	r3, .L1242
 	movs	r6, #0
 	str	r2, [sp, #8]
-	ldr	r7, .L1238+4
+	ldr	r7, .L1242+4
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	b	.L1221
-.L1228:
+	b	.L1225
+.L1232:
 	rsb	r3, r6, fp
 	ldr	r1, [sp, #8]
 	add	r2, sp, #56
@@ -10590,16 +10631,16 @@ FlashProgSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #60
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1238+8
+	ldr	r1, .L1242+8
 	ldr	r3, [sp, #60]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L1222
+	bcc	.L1226
 	mov	r3, #-1
 	str	r3, [r5, #0]
-	b	.L1223
-.L1222:
-	ldr	r2, .L1238+12
+	b	.L1227
+.L1226:
+	ldr	r2, .L1242+12
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	NandcWaitFlashReady
@@ -10633,13 +10674,13 @@ FlashProgSlc2KPages:
 	mov	r0, r4
 	bl	FlashProgFirstCmd
 	ldr	r3, [r5, #8]
-	cbz	r3, .L1225
+	cbz	r3, .L1229
 	add	r3, r3, #2048
-.L1225:
+.L1229:
 	ldr	r2, [r5, #12]
-	cbz	r2, .L1226
+	cbz	r2, .L1230
 	adds	r2, r2, #8
-.L1226:
+.L1230:
 	movs	r1, #1
 	str	r2, [sp, #0]
 	mov	r0, r4
@@ -10661,31 +10702,31 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r5, #0]
 	bl	NandcFlashDeCs
-.L1223:
+.L1227:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-.L1221:
+.L1225:
 	cmp	r6, fp
-	bne	.L1228
+	bne	.L1232
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1229
+	beq	.L1233
 	movs	r5, #0
 	add	r4, sl, #8
-	ldr	r6, .L1238+16
+	ldr	r6, .L1242+16
 	mov	sl, r5
-	ldr	r8, .L1238+36
-	b	.L1230
-.L1235:
+	ldr	r8, .L1242+36
+	b	.L1234
+.L1239:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1231
+	bne	.L1235
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1238+20
+	ldr	r0, .L1242+20
 	bl	printf
-	b	.L1232
-.L1231:
+	b	.L1236
+.L1235:
 	rsb	r3, sl, fp
 	mov	r0, r7
 	ldr	r1, [sp, #8]
@@ -10714,50 +10755,50 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #20]
 	adds	r0, r5, #1
-	bne	.L1233
-	ldr	r0, .L1238+24
+	bne	.L1237
+	ldr	r0, .L1242+24
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1233:
+.L1237:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1234
+	cbz	r3, .L1238
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1234
-	ldr	r0, .L1238+28
+	beq	.L1238
+	ldr	r0, .L1242+28
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1234:
+.L1238:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1232
+	cbz	r3, .L1236
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1232
-	ldr	r0, .L1238+32
+	beq	.L1236
+	ldr	r0, .L1242+32
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1232:
+.L1236:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1230:
+.L1234:
 	cmp	sl, fp
-	bne	.L1235
-.L1229:
+	bne	.L1239
+.L1233:
 	movs	r0, #0
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1239:
+.L1243:
 	.align	2
-.L1238:
+.L1242:
 	.word	.LANCHOR18
 	.word	.LANCHOR2
 	.word	.LANCHOR16
@@ -10780,7 +10821,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #72
-	ldr	r4, .L1267
+	ldr	r4, .L1271
 	mov	r8, r0
 	str	r1, [sp, #8]
 	mov	fp, r2
@@ -10788,16 +10829,16 @@ FlashProgPages:
 	ldr	r4, [r4, #0]
 	ldrb	r4, [r4, #19]	@ zero_extendqisi2
 	str	r4, [sp, #20]
-	ldr	r4, .L1267+4
+	ldr	r4, .L1271+4
 	ldrb	r4, [r4, #9]	@ zero_extendqisi2
 	str	r4, [sp, #12]
-	ldr	r4, .L1267+8
+	ldr	r4, .L1271+8
 	ldrb	r5, [r4, #0]	@ zero_extendqisi2
 	cmp	r5, #0
-	beq	.L1264
+	beq	.L1268
 	bl	FlashProgSlc2KPages
-	b	.L1242
-.L1254:
+	b	.L1246
+.L1258:
 	ldr	r1, [sp, #8]
 	movs	r4, #36
 	muls	r4, r5, r4
@@ -10810,56 +10851,56 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #68
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1267+12
+	ldr	r3, .L1271+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	mov	r7, r0
 	ldr	r0, [sp, #68]
 	cmp	r0, r3
-	bcc	.L1243
+	bcc	.L1247
 	mov	r3, #-1
 	str	r3, [r8, r4]
-	b	.L1244
-.L1243:
-	ldr	r3, .L1267+16
+	b	.L1248
+.L1247:
+	ldr	r3, .L1271+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r7, #0
 	add	r3, sl, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1246
+	cbz	r3, .L1250
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1246:
+.L1250:
 	ldr	r2, [sp, #68]
-	ldr	r1, .L1267+20
+	ldr	r1, .L1271+20
 	add	r3, r1, r2, lsl #4
 	movs	r1, #0
 	str	r1, [r3, #12]
 	ldr	r1, [sp, #64]
 	str	r6, [r3, #8]
 	str	r1, [r3, #4]
-	cbz	r7, .L1247
+	cbz	r7, .L1251
 	adds	r1, r5, #1
 	movs	r0, #36
 	mla	r1, r0, r1, r8
 	str	r1, [r3, #12]
-.L1247:
-	ldr	r3, .L1267+24
+.L1251:
+	ldr	r3, .L1271+24
 	ldrb	r4, [r3, r2]	@ zero_extendqisi2
 	lsls	r2, r2, #4
-	ldr	r3, .L1267+12
+	ldr	r3, .L1271+12
 	mov	r0, r4
 	strb	r4, [sl, r2]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1248
+	bne	.L1252
 	bl	NandcWaitFlashReady
-	b	.L1249
-.L1248:
+	b	.L1253
+.L1252:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #68]
-	ldr	r3, .L1267+28
+	ldr	r3, .L1271+28
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	ldr	r2, [r3, r2, lsl #2]
@@ -10869,34 +10910,34 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r4
 	bl	NandcFlashDeCs
-.L1249:
+.L1253:
 	ldr	r2, [sp, #20]
 	subs	r3, r2, #1
 	cmp	r3, #6
-	bhi	.L1250
-	ldr	r3, .L1267+32
+	bhi	.L1254
+	ldr	r3, .L1271+32
 	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	cbz	r3, .L1250
-	ldr	r3, .L1267+36
+	cbz	r3, .L1254
+	ldr	r3, .L1271+36
 	mov	r0, r4
 	adds	r2, r3, #4
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
 	movs	r3, #0
 	bl	HynixSetRRPara
-.L1250:
+.L1254:
 	mov	r0, r4
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r4
-	bne	.L1251
-	ldr	r3, .L1267+40
+	bne	.L1255
+	ldr	r3, .L1271+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1251
+	cbz	r3, .L1255
 	bl	flash_enter_slc_mode
-	b	.L1252
-.L1251:
+	b	.L1256
+.L1255:
 	bl	flash_exit_slc_mode
-.L1252:
+.L1256:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgFirstCmd
@@ -10907,11 +10948,11 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-	cbz	r7, .L1253
+	cbz	r7, .L1257
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1267+28
+	ldr	r3, .L1271+28
 	ldr	r2, [sp, #68]
 	mov	r0, r4
 	ldr	r1, [sp, #64]
@@ -10920,7 +10961,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1267+44
+	ldr	r3, .L1271+44
 	mov	r0, r4
 	ldr	r1, [r3, #0]
 	ldr	r3, [sp, #64]
@@ -10936,62 +10977,62 @@ FlashProgPages:
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3, #8]
 	bl	NandcXferData
-.L1253:
+.L1257:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgSecondCmd
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	adds	r5, r5, r7
-.L1244:
+.L1248:
 	adds	r5, r5, #1
-	b	.L1241
-.L1264:
-	ldr	sl, .L1267+20
-.L1241:
+	b	.L1245
+.L1268:
+	ldr	sl, .L1271+20
+.L1245:
 	ldr	r1, [sp, #8]
 	cmp	r5, r1
-	bcc	.L1254
+	bcc	.L1258
 	movs	r4, #0
-	ldr	r7, .L1267+12
-	ldr	r6, .L1267+40
-	ldr	r5, .L1267+20
-	b	.L1255
-.L1257:
+	ldr	r7, .L1271+12
+	ldr	r6, .L1271+40
+	ldr	r5, .L1271+20
+	b	.L1259
+.L1261:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L1256
+	bne	.L1260
 	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L1256
+	cbz	r3, .L1260
 	lsls	r3, r4, #4
 	ldrb	r0, [r5, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1256:
+.L1260:
 	adds	r4, r4, #1
-.L1255:
+.L1259:
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1257
+	bcc	.L1261
 	ldr	r2, [sp, #16]
 	cmp	r2, #0
-	beq	.L1266
+	beq	.L1270
 	movs	r5, #0
 	add	r4, r8, #8
-	ldr	r6, .L1267+48
+	ldr	r6, .L1271+48
 	mov	sl, r5
-	ldr	r8, .L1267+68
-	b	.L1258
-.L1263:
+	ldr	r8, .L1271+68
+	b	.L1262
+.L1267:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1259
+	bne	.L1263
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1267+52
+	ldr	r0, .L1271+52
 	bl	printf
-	b	.L1260
-.L1259:
+	b	.L1264
+.L1263:
 	ldr	r1, [sp, #8]
 	mov	r0, r7
 	add	r2, sp, #64
@@ -11021,49 +11062,49 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r2, r5, #1
-	bne	.L1261
-	ldr	r0, .L1267+56
+	bne	.L1265
+	ldr	r0, .L1271+56
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1261:
+.L1265:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1262
+	cbz	r3, .L1266
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1262
-	ldr	r0, .L1267+60
+	beq	.L1266
+	ldr	r0, .L1271+60
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1262:
+.L1266:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1260
+	cbz	r3, .L1264
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1260
-	ldr	r0, .L1267+64
+	beq	.L1264
+	ldr	r0, .L1271+64
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1260:
+.L1264:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1258:
+.L1262:
 	ldr	r2, [sp, #8]
 	cmp	sl, r2
-	bne	.L1263
+	bne	.L1267
 	movs	r0, #0
-	b	.L1242
-.L1268:
+	b	.L1246
+.L1272:
 	.align	2
-.L1267:
+.L1271:
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR0
@@ -11082,9 +11123,9 @@ FlashProgPages:
 	.word	.LC23
 	.word	.LC24
 	.word	.LANCHOR205
-.L1266:
+.L1270:
 	ldr	r0, [sp, #16]
-.L1242:
+.L1246:
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 	.size	FlashProgPages, .-FlashProgPages
@@ -11097,20 +11138,20 @@ FlashProgPages:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1281
+	ldr	r3, .L1285
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1270
-	ldr	r2, .L1281+4
-	ldr	r6, .L1281+8
-	ldr	r4, .L1281+12
+	bne	.L1274
+	ldr	r2, .L1285+4
+	ldr	r6, .L1285+8
+	ldr	r4, .L1285+12
 	ldr	r0, [r2, #0]
-	ldr	r2, .L1281+16
-	ldr	r7, .L1281+20
+	ldr	r2, .L1285+16
+	ldr	r7, .L1285+20
 	str	r0, [r6, #8]
 	ldr	r5, [r2, #0]
-	ldr	r2, .L1281+24
+	ldr	r2, .L1285+24
 	str	r5, [r6, #12]
 	ldrh	r1, [r2, #0]
 	str	r3, [r5, #12]
@@ -11119,15 +11160,15 @@ FtlVpcTblFlush:
 	strh	r1, [r5, #0]	@ movhi
 	ldr	r1, [r2, #8]
 	str	r3, [r5, #8]
-	ldr	r3, .L1281+28
+	ldr	r3, .L1285+28
 	str	r1, [r5, #4]
 	stmia	r4, {r3, r7}
 	ldrh	r3, [r2, #6]
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1281+32
+	ldr	r3, .L1285+32
 	ldrh	r3, [r3, #0]
 	strb	r3, [r4, #10]
-	ldr	r3, .L1281+36
+	ldr	r3, .L1285+36
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r4, #14]	@ movhi
@@ -11136,7 +11177,7 @@ FtlVpcTblFlush:
 	orr	r2, r2, r1, lsl #6
 	strh	r2, [r4, #16]	@ movhi
 	strb	r3, [r4, #11]
-	ldr	r3, .L1281+40
+	ldr	r3, .L1285+40
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r4, #18]	@ movhi
@@ -11145,7 +11186,7 @@ FtlVpcTblFlush:
 	orr	r2, r2, r1, lsl #6
 	strh	r2, [r4, #20]	@ movhi
 	strb	r3, [r4, #12]
-	ldr	r3, .L1281+44
+	ldr	r3, .L1285+44
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
 	strh	r2, [r4, #22]	@ movhi
@@ -11155,24 +11196,24 @@ FtlVpcTblFlush:
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	movs	r1, #255
 	strb	r3, [r4, #13]
-	ldr	r3, .L1281+48
+	ldr	r3, .L1285+48
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #32]
-	ldr	r3, .L1281+52
+	ldr	r3, .L1285+52
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #40]
-	ldr	r3, .L1281+56
+	ldr	r3, .L1285+56
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #36]
-	ldr	r3, .L1281+60
+	ldr	r3, .L1285+60
 	ldrh	r2, [r3, #0]
 	bl	memset
 	mov	r1, r4
-	ldr	r4, .L1281+64
+	ldr	r4, .L1285+64
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	memcpy
-	ldr	r3, .L1281+68
+	ldr	r3, .L1285+68
 	ldrh	r2, [r4, #0]
 	ldr	r0, [r6, #8]
 	ldr	r1, [r3, #0]
@@ -11186,39 +11227,39 @@ FtlVpcTblFlush:
 	lsrs	r0, r0, #1
 	adds	r2, r2, #4
 	add	r0, r3, r0, lsl #2
-	ldr	r3, .L1281+72
+	ldr	r3, .L1285+72
 	ldr	r1, [r3, #0]
 	bl	memcpy
-	ldr	r3, .L1281+76
+	ldr	r3, .L1285+76
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1271
+	cbz	r3, .L1275
 	ldrh	r3, [r4, #0]
 	ldr	r1, [r6, #8]
 	lsrs	r0, r3, #3
 	add	r0, r0, r3, lsl #1
-	ldr	r3, .L1281+80
+	ldr	r3, .L1285+80
 	adds	r0, r0, #52
 	ubfx	r0, r0, #2, #14
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1281+84
+	ldr	r3, .L1285+84
 	add	r0, r1, r0, lsl #2
 	lsls	r2, r2, #2
 	ldr	r1, [r3, #0]
 	bl	memcpy
-.L1271:
+.L1275:
 	movs	r0, #0
-	ldr	r6, .L1281+8
+	ldr	r6, .L1285+8
 	bl	FtlUpdateVaildLpn
-	ldr	sl, .L1281+4
-	ldr	fp, .L1281+16
+	ldr	sl, .L1285+4
+	ldr	fp, .L1285+16
 	movs	r7, #0
-	ldr	r4, .L1281+24
+	ldr	r4, .L1285+24
 	movw	r8, #65535
-.L1280:
+.L1284:
 	ldr	r3, [sl, #0]
 	movs	r1, #1
 	ldrh	r2, [r4, #0]
-	ldr	r0, .L1281+8
+	ldr	r0, .L1285+8
 	str	r3, [r6, #8]
 	ldr	r3, [fp, #0]
 	str	r3, [r6, #12]
@@ -11228,19 +11269,19 @@ FtlVpcTblFlush:
 	str	r3, [r6, #4]
 	mov	r3, r1
 	bl	FlashProgPages
-	ldr	r3, .L1281+88
+	ldr	r3, .L1285+88
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1273
+	blt	.L1277
 	ldrh	r3, [r4, #0]
 	ldrh	r8, [r4, #4]
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1281+52
+	ldr	r2, .L1285+52
 	ldr	r3, [r2, #0]
 	adds	r1, r3, #1
 	str	r1, [r2, #0]
@@ -11253,92 +11294,92 @@ FtlVpcTblFlush:
 	str	r3, [r5, #4]
 	mov	r3, r1
 	strh	r0, [r5, #2]	@ movhi
-	ldr	r0, .L1281+8
+	ldr	r0, .L1285+8
 	bl	FlashProgPages
-.L1273:
+.L1277:
 	ldrh	r3, [r4, #2]
 	ldr	r2, [r6, #0]
 	adds	r3, r3, #1
 	adds	r1, r2, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1274
+	bne	.L1278
 	cmp	r3, #1
-	bne	.L1275
-	ldr	r1, .L1281+92
+	bne	.L1279
+	ldr	r1, .L1285+92
 	movw	r2, #1180
-	ldr	r0, .L1281+96
+	ldr	r0, .L1285+96
 	bl	printf
-	ldr	r0, .L1281+100
-	ldr	r1, .L1281+104
+	ldr	r0, .L1285+100
+	ldr	r1, .L1285+104
 	bl	printf
-.L1275:
-	ldr	r2, .L1281+24
+.L1279:
+	ldr	r2, .L1285+24
 	ldrh	r3, [r2, #2]
 	cmp	r3, #1
-	bne	.L1276
-	ldr	r3, .L1281+88
+	bne	.L1280
+	ldr	r3, .L1285+88
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1276:
+.L1280:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r7, #3
-	bls	.L1280
-	ldr	r3, .L1281+8
+	bls	.L1284
+	ldr	r3, .L1285+8
 	mov	r2, r7
-	ldr	r0, .L1281+108
+	ldr	r0, .L1285+108
 	ldr	r1, [r3, #4]
 	bl	printf
-	ldr	r3, .L1281
+	ldr	r3, .L1285
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L1270
-.L1274:
+	b	.L1274
+.L1278:
 	cmp	r3, #1
-	beq	.L1280
+	beq	.L1284
 	cmp	r2, #256
-	beq	.L1280
+	beq	.L1284
 	movw	r3, #65535
 	cmp	r8, r3
-	beq	.L1270
+	beq	.L1274
 	mov	r0, r8
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1270:
+.L1274:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1282:
+.L1286:
 	.align	2
-.L1281:
-	.word	.LANCHOR94
-	.word	.LANCHOR98
+.L1285:
+	.word	.LANCHOR82
+	.word	.LANCHOR86
 	.word	.LANCHOR198
-	.word	.LANCHOR143
+	.word	.LANCHOR131
 	.word	.LANCHOR184
 	.word	1342177351
 	.word	.LANCHOR196
 	.word	1179929683
-	.word	.LANCHOR60
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
+	.word	.LANCHOR48
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR164
 	.word	.LANCHOR156
 	.word	.LANCHOR157
+	.word	.LANCHOR61
+	.word	.LANCHOR43
+	.word	.LANCHOR89
+	.word	.LANCHOR107
 	.word	.LANCHOR73
-	.word	.LANCHOR55
-	.word	.LANCHOR101
-	.word	.LANCHOR119
-	.word	.LANCHOR85
-	.word	.LANCHOR82
-	.word	.LANCHOR126
-	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR114
+	.word	.LANCHOR57
 	.word	.LANCHOR206
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC25
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
@@ -11350,27 +11391,27 @@ FtlVpcTblFlush:
 FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1295
+	ldr	r3, .L1299
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r4, [r3, #0]
 	cmp	r4, #0
-	bne	.L1284
-	ldr	r3, .L1295+4
+	bne	.L1288
+	ldr	r3, .L1299+4
 	mov	r1, r4
-	ldr	r7, .L1295+8
-	ldr	r5, .L1295+12
+	ldr	r7, .L1299+8
+	ldr	r5, .L1299+12
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1295+16
-	ldr	r8, .L1295+52
+	ldr	r3, .L1299+16
+	ldr	r8, .L1299+52
 	str	r0, [r7, #8]
 	ldr	r3, [r3, #0]
-	ldr	sl, .L1295+56
+	ldr	sl, .L1299+56
 	str	r3, [r7, #12]
-	ldr	r3, .L1295+20
+	ldr	r3, .L1299+20
 	ldrh	r2, [r3, #0]
 	bl	memset
-	b	.L1285
-.L1286:
+	b	.L1289
+.L1290:
 	ldrh	r2, [sl, #0]
 	ldr	r3, [r7, #8]
 	ldr	r1, [r5, #4]!
@@ -11379,11 +11420,11 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	memcpy
-.L1285:
+.L1289:
 	ldrh	r3, [r8, #0]
-	ldr	r6, .L1295+8
+	ldr	r6, .L1299+8
 	cmp	r4, r3
-	blt	.L1286
+	blt	.L1290
 	ldr	r5, [r6, #12]
 	movs	r2, #16
 	movs	r1, #255
@@ -11393,9 +11434,9 @@ FtlBbmTblFlush:
 	bl	memset
 	movw	r3, #61649
 	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, .L1295+24
-	ldr	sl, .L1295+4
-	ldr	fp, .L1295+16
+	ldr	r3, .L1299+24
+	ldr	sl, .L1299+4
+	ldr	fp, .L1299+16
 	ldr	r2, [r3, #8]
 	str	r2, [r5, #4]
 	ldrh	r2, [r3, #0]
@@ -11404,16 +11445,16 @@ FtlBbmTblFlush:
 	ldrh	r3, [r3, #6]
 	strh	r2, [r5, #8]	@ movhi
 	strh	r3, [r5, #10]	@ movhi
-	ldr	r3, .L1295+28
+	ldr	r3, .L1299+28
 	ldr	r3, [r3, #0]
 	strh	r3, [r5, #12]	@ movhi
-	b	.L1294
-.L1291:
+	b	.L1298
+.L1295:
 	mov	r8, #1
-.L1294:
+.L1298:
 	ldr	r3, [sl, #0]
 	movs	r1, #0
-	ldr	r4, .L1295+24
+	ldr	r4, .L1299+24
 	ldrh	r0, [r5, #10]
 	str	r3, [r6, #8]
 	str	r1, [r6, #0]
@@ -11425,19 +11466,19 @@ FtlBbmTblFlush:
 	str	r3, [r6, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp, #0]
-	ldr	r0, .L1295+32
+	ldr	r0, .L1299+32
 	bl	printf
 	movs	r1, #1
 	mov	r2, r1
 	mov	r3, r1
-	ldr	r0, .L1295+8
+	ldr	r0, .L1299+8
 	bl	FlashProgPages
-	ldr	r3, .L1295+36
+	ldr	r3, .L1299+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1288
+	blt	.L1292
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #8]
@@ -11449,7 +11490,7 @@ FtlBbmTblFlush:
 	strh	r2, [r5, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1295+40
+	ldr	r2, .L1299+40
 	strh	r3, [r4, #0]	@ movhi
 	lsls	r3, r3, #10
 	str	r3, [r6, #4]
@@ -11458,58 +11499,58 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
 	movs	r1, #1
-	ldr	r0, .L1295+8
+	ldr	r0, .L1299+8
 	mov	r2, r1
 	mov	r3, r1
 	bl	FlashProgPages
-.L1288:
-	ldr	r3, .L1295+24
+.L1292:
+	ldr	r3, .L1299+24
 	ldrh	r2, [r3, #2]
 	adds	r2, r2, #1
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	bne	.L1289
+	bne	.L1293
 	adds	r7, r7, #1
-	ldr	r0, .L1295+44
+	ldr	r0, .L1299+44
 	ldr	r1, [r6, #4]
 	uxth	r7, r7
 	bl	printf
 	cmp	r7, #3
-	bls	.L1294
-	ldr	r3, .L1295+8
+	bls	.L1298
+	ldr	r3, .L1299+8
 	mov	r2, r7
-	ldr	r0, .L1295+48
+	ldr	r0, .L1299+48
 	ldr	r1, [r3, #4]
 	bl	printf
-	ldr	r3, .L1295
+	ldr	r3, .L1299
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L1284
-.L1289:
+	b	.L1288
+.L1293:
 	cmp	r8, #0
-	beq	.L1291
-.L1284:
+	beq	.L1295
+.L1288:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1296:
+.L1300:
 	.align	2
-.L1295:
-	.word	.LANCHOR94
-	.word	.LANCHOR98
+.L1299:
+	.word	.LANCHOR82
+	.word	.LANCHOR86
 	.word	.LANCHOR198
-	.word	.LANCHOR90+24
+	.word	.LANCHOR78+24
 	.word	.LANCHOR184
-	.word	.LANCHOR73
-	.word	.LANCHOR90
-	.word	.LANCHOR52
+	.word	.LANCHOR61
+	.word	.LANCHOR78
+	.word	.LANCHOR40
 	.word	.LC26
-	.word	.LANCHOR69
-	.word	.LANCHOR95
+	.word	.LANCHOR57
+	.word	.LANCHOR83
 	.word	.LC27
 	.word	.LC28
-	.word	.LANCHOR60
-	.word	.LANCHOR91
+	.word	.LANCHOR48
+	.word	.LANCHOR79
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -11522,22 +11563,22 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r0
-	ldr	r5, .L1307
+	ldr	r5, .L1311
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1306
-	b	.L1299
-.L1305:
-	ldr	r3, .L1307+4
+	cbnz	r3, .L1310
+	b	.L1303
+.L1309:
+	ldr	r3, .L1311+4
 	mov	r1, sl
 	mov	fp, #0
 	ldrb	r0, [r3, r4]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r3, r0
-	b	.L1300
-.L1304:
+	b	.L1304
+.L1308:
 	ldrh	r2, [r7, fp, lsl #1]
 	cmp	r2, r3
-	bne	.L1301
+	bne	.L1305
 	mov	r0, r3
 	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -11545,47 +11586,47 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r1, [r5, #0]
 	mov	r2, fp
 	ldr	r3, [sp, #4]
-	b	.L1302
-.L1303:
+	b	.L1306
+.L1307:
 	adds	r0, r2, #1
 	ldrh	lr, [r6, r0, lsl #1]
 	strh	lr, [r6, r2, lsl #1]	@ movhi
 	uxth	r2, r0
-.L1302:
+.L1306:
 	cmp	r2, r1
-	bcc	.L1303
+	bcc	.L1307
 	subs	r1, r1, #1
 	strh	r1, [r5, #0]	@ movhi
-.L1301:
+.L1305:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1300:
+.L1304:
 	ldrh	r2, [r5, #0]
 	cmp	r2, fp
-	bhi	.L1304
+	bhi	.L1308
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1298
-.L1306:
-	ldr	r7, .L1307+8
+	b	.L1302
+.L1310:
+	ldr	r7, .L1311+8
 	movs	r4, #0
-	ldr	r8, .L1307+12
+	ldr	r8, .L1311+12
 	mov	r6, r7
-.L1298:
+.L1302:
 	ldrh	r3, [r8, #0]
 	cmp	r3, r4
-	bhi	.L1305
+	bhi	.L1309
 	bl	FtlGcReFreshBadBlk
-.L1299:
+.L1303:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1308:
+.L1312:
 	.align	2
-.L1307:
-	.word	.LANCHOR151
-	.word	.LANCHOR62
-	.word	.LANCHOR152
-	.word	.LANCHOR53
+.L1311:
+	.word	.LANCHOR139
+	.word	.LANCHOR50
+	.word	.LANCHOR140
+	.word	.LANCHOR41
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
 	.align	1
@@ -11598,46 +11639,46 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1319
+	ldr	r3, .L1323
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1310
-	ldr	r2, .L1319+4
+	bne	.L1314
+	ldr	r2, .L1323+4
 	ldrh	r1, [r2, #0]
 	cmp	r1, r0
-	bne	.L1311
+	bne	.L1315
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1312
-.L1311:
-	ldr	r2, .L1319+8
+	b	.L1316
+.L1315:
+	ldr	r2, .L1323+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1313
-	ldr	r2, .L1319+12
+	beq	.L1317
+	ldr	r2, .L1323+12
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1313
-	ldr	r2, .L1319+16
+	beq	.L1317
+	ldr	r2, .L1323+16
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1313
-.L1312:
-	ldr	r5, .L1319+20
+	beq	.L1317
+.L1316:
+	ldr	r5, .L1323+20
 	mov	r1, r4
-	ldr	r0, .L1319+24
+	ldr	r0, .L1323+24
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1314
-	ldr	r1, .L1319+28
-	movw	r2, #3039
-	ldr	r0, .L1319+32
+	cbnz	r3, .L1318
+	ldr	r1, .L1323+28
+	movw	r2, #3042
+	ldr	r0, .L1323+32
 	bl	printf
-	ldr	r0, .L1319+36
-	ldr	r1, .L1319+40
+	ldr	r0, .L1323+36
+	ldr	r1, .L1323+40
 	bl	printf
-.L1314:
+.L1318:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -11645,47 +11686,47 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1319+44
+	ldr	r3, .L1323+44
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r5, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1319+48
+	ldr	r3, .L1323+48
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1318
-	ldr	r1, .L1319+28
-	movw	r2, #3042
-	ldr	r0, .L1319+32
+	ble	.L1322
+	ldr	r1, .L1323+28
+	movw	r2, #3045
+	ldr	r0, .L1323+32
 	bl	printf
-	ldr	r1, .L1319+40
-	ldr	r0, .L1319+36
+	ldr	r1, .L1323+40
+	ldr	r0, .L1323+36
 	bl	printf
-	b	.L1318
-.L1310:
+	b	.L1322
+.L1314:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1313
-.L1318:
+	b	.L1317
+.L1322:
 	movs	r3, #1
-.L1313:
+.L1317:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1320:
+.L1324:
 	.align	2
-.L1319:
-	.word	.LANCHOR101
+.L1323:
+	.word	.LANCHOR89
 	.word	.LANCHOR202
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR103
-	.word	.LANCHOR100
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR91
+	.word	.LANCHOR88
 	.word	.LANCHOR207
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR106
-	.word	.LANCHOR55
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR94
+	.word	.LANCHOR43
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
 	.align	1
@@ -11700,87 +11741,87 @@ decrement_vpc_count:
 	cmp	r0, r3
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	beq	.L1322
-	ldr	r6, .L1328
+	beq	.L1326
+	ldr	r6, .L1332
 	ldr	r3, [r6, #0]
 	ldrh	r5, [r3, r0, lsl #1]
-	cbnz	r5, .L1323
+	cbnz	r5, .L1327
 	mov	r1, r4
-	ldr	r0, .L1328+4
+	ldr	r0, .L1332+4
 	mov	r2, r5
 	bl	printf
 	ldr	r3, [r6, #0]
 	ldrh	r4, [r3, r4, lsl #1]
 	cmp	r4, #0
-	bne	.L1324
-	ldr	r1, .L1328+8
-	movw	r2, #3057
-	ldr	r0, .L1328+12
+	bne	.L1328
+	ldr	r1, .L1332+8
+	movw	r2, #3060
+	ldr	r0, .L1332+12
 	mov	r5, r4
 	bl	printf
-	ldr	r0, .L1328+16
-	ldr	r1, .L1328+20
+	ldr	r0, .L1332+16
+	ldr	r1, .L1332+20
 	bl	printf
-	b	.L1324
-.L1323:
+	b	.L1328
+.L1327:
 	subs	r5, r5, #1
 	strh	r5, [r3, r0, lsl #1]	@ movhi
-.L1322:
-	ldr	r6, .L1328+24
+.L1326:
+	ldr	r6, .L1332+24
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	bne	.L1325
+	bne	.L1329
 	strh	r4, [r6, #0]	@ movhi
-	b	.L1327
-.L1325:
+	b	.L1331
+.L1329:
 	cmp	r0, r4
-	beq	.L1327
+	beq	.L1331
 	bl	update_vpc_list
-	ldr	r3, .L1328+28
+	ldr	r3, .L1332+28
 	strh	r4, [r6, #0]	@ movhi
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1328+32
+	ldr	r3, .L1332+32
 	ldr	r3, [r3, #0]
 	subs	r3, r2, r3
-	ldr	r2, .L1328+36
+	ldr	r2, .L1332+36
 	adds	r5, r0, #0
 	it	ne
 	movne	r5, #1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	ldr	r2, .L1328
+	ldr	r2, .L1332
 	uxth	r3, r3
 	ldr	r2, [r2, #0]
 	ldrh	r2, [r2, r3, lsl #1]
-	cbnz	r2, .L1324
+	cbnz	r2, .L1328
 	cmp	r4, r3
-	beq	.L1324
-	ldr	r1, .L1328+8
-	movw	r2, #3079
-	ldr	r0, .L1328+12
+	beq	.L1328
+	ldr	r1, .L1332+8
+	movw	r2, #3082
+	ldr	r0, .L1332+12
 	bl	printf
-	ldr	r1, .L1328+20
-	ldr	r0, .L1328+16
+	ldr	r1, .L1332+20
+	ldr	r0, .L1332+16
 	bl	printf
-	b	.L1324
-.L1327:
+	b	.L1328
+.L1331:
 	movs	r5, #0
-.L1324:
+.L1328:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1329:
+.L1333:
 	.align	2
-.L1328:
-	.word	.LANCHOR101
+.L1332:
+	.word	.LANCHOR89
 	.word	.LC29
 	.word	.LANCHOR208
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR138
-	.word	.LANCHOR100
-	.word	.LANCHOR99
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR126
+	.word	.LANCHOR88
+	.word	.LANCHOR87
 	.word	-1431655765
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -11797,133 +11838,133 @@ get_new_active_ppa:
 	movw	r3, #65535
 	cmp	r2, r3
 	mov	r4, r0
-	bne	.L1331
-	ldr	r1, .L1346
-	movw	r2, #2979
-	ldr	r0, .L1346+4
+	bne	.L1335
+	ldr	r1, .L1350
+	movw	r2, #2982
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1331:
-	ldr	r3, .L1346+16
+.L1335:
+	ldr	r3, .L1350+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1332
-	ldr	r1, .L1346
-	movw	r2, #2980
-	ldr	r0, .L1346+4
+	bne	.L1336
+	ldr	r1, .L1350
+	movw	r2, #2983
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1332:
+.L1336:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1333
-	ldr	r1, .L1346
-	movw	r2, #2981
-	ldr	r0, .L1346+4
+	cbnz	r3, .L1337
+	ldr	r1, .L1350
+	movw	r2, #2984
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1333:
+.L1337:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movs	r7, #0
 	movw	r6, #65535
 	strb	r7, [r4, #10]
 	adds	r3, r3, #8
-	ldr	sl, .L1346+24
-	ldr	r8, .L1346+28
+	ldr	sl, .L1350+24
+	ldr	r8, .L1350+28
 	ldrh	r3, [r4, r3, lsl #1]
-	ldr	r5, .L1346+20
-	b	.L1334
-.L1335:
+	ldr	r5, .L1350+20
+	b	.L1338
+.L1339:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r5, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1336
+	bne	.L1340
 	ldrh	r3, [r4, #2]
 	strb	r7, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1336:
+.L1340:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1334:
+.L1338:
 	cmp	r3, r6
-	beq	.L1335
+	beq	.L1339
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1337
+	bne	.L1341
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1337
+	cbnz	r2, .L1341
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r6
-	bne	.L1337
+	bne	.L1341
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1335
-.L1337:
+	b	.L1339
+.L1341:
 	ldrh	r5, [r4, #2]
 	movw	r6, #65535
-	ldr	sl, .L1346+20
+	ldr	sl, .L1350+20
 	mov	r8, r6
-	ldr	r7, .L1346+24
+	ldr	r7, .L1350+24
 	orr	r5, r5, r3, lsl #10
 	ldrh	r3, [r4, #4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1342:
+.L1346:
 	ldrh	r2, [sl, #0]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-.L1339:
+.L1343:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r2
-	bne	.L1338
+	bne	.L1342
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
-.L1338:
+.L1342:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r6
-	beq	.L1339
+	beq	.L1343
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1340
+	bne	.L1344
 	ldrb	r2, [r7, #0]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r2, .L1344
-	ldr	r2, .L1346+28
+	cbnz	r2, .L1348
+	ldr	r2, .L1350+28
 	ldrh	r3, [r2, r3, lsl #1]
 	cmp	r3, r8
-	bne	.L1340
+	bne	.L1344
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1340
+	cbz	r3, .L1344
 	subs	r3, r3, #1
 	ldrh	r0, [r4, #0]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1342
-.L1344:
-	ldr	r2, .L1346+32
+	b	.L1346
+.L1348:
+	ldr	r2, .L1350+32
 	ldrh	r2, [r2, #0]
 	cmp	r3, r2
-	bcc	.L1340
-	ldr	r3, .L1346+36
+	bcc	.L1344
+	ldr	r3, .L1350+36
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -11933,41 +11974,41 @@ get_new_active_ppa:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1346+16
+	ldr	r3, .L1350+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1340:
-	ldr	r3, .L1346+16
+.L1344:
+	ldr	r3, .L1350+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1343
+	bne	.L1347
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1343
-	ldr	r1, .L1346
-	movw	r2, #3025
-	ldr	r0, .L1346+4
+	cbz	r3, .L1347
+	ldr	r1, .L1350
+	movw	r2, #3028
+	ldr	r0, .L1350+4
 	bl	printf
-	ldr	r0, .L1346+8
-	ldr	r1, .L1346+12
+	ldr	r0, .L1350+8
+	ldr	r1, .L1350+12
 	bl	printf
-.L1343:
+.L1347:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1347:
+.L1351:
 	.align	2
-.L1346:
+.L1350:
 	.word	.LANCHOR209
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR68
-	.word	.LANCHOR53
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR56
+	.word	.LANCHOR41
 	.word	.LANCHOR7
 	.word	.LANCHOR9
-	.word	.LANCHOR69
-	.word	.LANCHOR101
+	.word	.LANCHOR57
+	.word	.LANCHOR89
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -11982,47 +12023,47 @@ FtlSlcSuperblockCheck:
 	mov	r4, r0
 	ldrh	r3, [r0, #4]
 	cmp	r3, #0
-	beq	.L1348
+	beq	.L1352
 	ldrh	r3, [r0, #0]
 	movw	r5, #65535
 	cmp	r3, r5
-	beq	.L1348
+	beq	.L1352
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	movs	r6, #0
-	ldr	sl, .L1354+4
+	ldr	sl, .L1358+4
 	adds	r3, r3, #8
-	ldr	r8, .L1354+20
-	ldr	r7, .L1354
+	ldr	r8, .L1358+20
+	ldr	r7, .L1358
 	ldrh	r3, [r0, r3, lsl #1]
-	b	.L1350
-.L1351:
+	b	.L1354
+.L1355:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1352
+	bne	.L1356
 	ldrh	r3, [r4, #2]
 	strb	r6, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1352:
+.L1356:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1350:
+.L1354:
 	cmp	r3, r5
-	beq	.L1351
+	beq	.L1355
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1353
+	bne	.L1357
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1353
+	cbnz	r2, .L1357
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r5
-	bne	.L1353
+	bne	.L1357
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
@@ -12030,24 +12071,24 @@ FtlSlcSuperblockCheck:
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1351
+	bne	.L1355
 	ldrh	r2, [r4, #2]
 	strb	r3, [r4, #6]
 	adds	r2, r2, #1
 	strh	r2, [r4, #2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1353:
-	ldr	r2, .L1354+4
+.L1357:
+	ldr	r2, .L1358+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1348
+	cbz	r2, .L1352
 	cmp	r3, #1
-	bne	.L1348
-	ldr	r3, .L1354+8
+	bne	.L1352
+	ldr	r3, .L1358+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1348
-	ldr	r3, .L1354+12
+	bcc	.L1352
+	ldr	r3, .L1358+12
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -12057,20 +12098,20 @@ FtlSlcSuperblockCheck:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1354+16
+	ldr	r3, .L1358+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1348:
+.L1352:
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1355:
+.L1359:
 	.align	2
-.L1354:
-	.word	.LANCHOR53
+.L1358:
+	.word	.LANCHOR41
 	.word	.LANCHOR7
-	.word	.LANCHOR69
-	.word	.LANCHOR101
-	.word	.LANCHOR68
+	.word	.LANCHOR57
+	.word	.LANCHOR89
+	.word	.LANCHOR56
 	.word	.LANCHOR9
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
 	.section	.text.allocate_data_superblock,"ax",%progbits
@@ -12082,108 +12123,108 @@ FtlSlcSuperblockCheck:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1401
+	ldr	r3, .L1405
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldr	r3, [r3, #0]
 	sub	sp, sp, #24
 	cmp	r3, #0
-	bne	.L1357
-	ldr	r7, .L1401+4
-	ldr	r8, .L1401+104
-.L1397:
-	ldr	r1, .L1401+8
+	bne	.L1361
+	ldr	r7, .L1405+4
+	ldr	r8, .L1405+104
+.L1401:
+	ldr	r1, .L1405+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1359
-	ldr	r1, .L1401+16
-	movw	r2, #2815
-	ldr	r0, .L1401+20
+	ble	.L1363
+	ldr	r1, .L1405+16
+	movw	r2, #2818
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1359:
-	ldr	r3, .L1401+32
+.L1363:
+	ldr	r3, .L1405+32
 	cmp	r4, r3
-	bne	.L1360
-	ldr	r3, .L1401+36
+	bne	.L1364
+	ldr	r3, .L1405+36
 	ldrh	r2, [r7, #0]
 	ldr	r3, [r3, #0]
 	lsrs	r1, r2, #1
 	adds	r0, r1, #1
 	mul	r5, r3, r2
 	add	r0, r0, r5, lsr #2
-	ldr	r5, .L1401+40
+	ldr	r5, .L1405+40
 	uxth	r0, r0
 	ldr	r5, [r5, #0]
-	cbz	r5, .L1389
-	ldr	r5, .L1401+44
+	cbz	r5, .L1393
+	ldr	r5, .L1405+44
 	ldr	r5, [r5, #0]
 	cmp	r5, #29
-	bhi	.L1389
+	bhi	.L1393
 	cmp	r5, #2
-	bls	.L1394
+	bls	.L1398
 	lsls	r0, r2, #31
-	bpl	.L1361
-	cbz	r3, .L1391
-	b	.L1361
-.L1360:
+	bpl	.L1365
+	cbz	r3, .L1395
+	b	.L1365
+.L1364:
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1394
-	ldr	r3, .L1401+48
+	bne	.L1398
+	ldr	r3, .L1405+48
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1394
-	ldr	r3, .L1401+52
+	beq	.L1398
+	ldr	r3, .L1405+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1394
-	ldr	r2, .L1401+40
+	cbnz	r3, .L1398
+	ldr	r2, .L1405+40
 	ldrh	r3, [r7, #0]
 	ldr	r2, [r2, #0]
 	lsrs	r1, r3, #3
-	cbz	r2, .L1361
-	ldr	r2, .L1401+44
+	cbz	r2, .L1365
+	ldr	r2, .L1405+44
 	ldr	r2, [r2, #0]
 	cmp	r2, #1
-	bhi	.L1361
+	bhi	.L1365
 	movs	r1, #7
 	muls	r1, r3, r1
 	lsrs	r1, r1, #3
-	b	.L1361
-.L1389:
+	b	.L1365
+.L1393:
 	mov	r1, r0
-.L1361:
-	cbz	r1, .L1362
+.L1365:
+	cbz	r1, .L1366
 	subs	r1, r1, #1
 	uxth	r1, r1
-	b	.L1362
-.L1391:
+	b	.L1366
+.L1395:
 	mov	r1, r3
-	b	.L1362
-.L1394:
+	b	.L1366
+.L1398:
 	movs	r1, #0
-.L1362:
-	ldr	r0, .L1401+56
+.L1366:
+	ldr	r0, .L1405+56
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	bl	List_pop_index_node
 	ldrh	r3, [r7, #0]
 	uxth	r5, r0
-	cbnz	r3, .L1363
-	ldr	r1, .L1401+16
-	movw	r2, #2835
-	ldr	r0, .L1401+20
+	cbnz	r3, .L1367
+	ldr	r1, .L1405+16
+	movw	r2, #2838
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1363:
-	ldr	r2, .L1401+4
+.L1367:
+	ldr	r2, .L1405+4
 	mov	r0, r4
 	ldrh	r3, [r2, #0]
 	subs	r3, r3, #1
@@ -12191,45 +12232,45 @@ allocate_data_superblock:
 	strh	r5, [r4, #0]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1364
-	ldr	r3, .L1401+60
+	cbnz	r3, .L1368
+	ldr	r3, .L1405+60
 	movw	r2, #65535
-	ldr	r1, .L1401+8
+	ldr	r1, .L1405+8
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	ldrh	r3, [r1, #0]
 	ldrh	r2, [r7, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1397
-	ldr	r1, .L1401+16
-	movw	r2, #2847
-	ldr	r0, .L1401+20
+	ble	.L1401
+	ldr	r1, .L1405+16
+	movw	r2, #2850
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r1, .L1401+28
-	ldr	r0, .L1401+24
+	ldr	r1, .L1405+28
+	ldr	r0, .L1405+24
 	bl	printf
-	b	.L1397
-.L1364:
-	ldr	r1, .L1401+8
+	b	.L1401
+.L1368:
+	ldr	r1, .L1405+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1366
-	ldr	r1, .L1401+16
-	movw	r2, #2850
-	ldr	r0, .L1401+20
+	ble	.L1370
+	ldr	r1, .L1405+16
+	movw	r2, #2853
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1366:
-	ldr	r3, .L1401+64
+.L1370:
+	ldr	r3, .L1405+64
 	movs	r6, #0
 	ldr	lr, [r8, #0]
 	mov	sl, r4
@@ -12240,14 +12281,14 @@ allocate_data_superblock:
 	stmia	sp, {r4, lr}
 	str	r3, [sp, #20]
 	mov	r3, lr
-	b	.L1367
-.L1369:
+	b	.L1371
+.L1373:
 	str	r0, [r3, #8]
 	movw	r4, #65535
 	str	r0, [r3, #12]
 	ldrh	ip, [r1, #16]
 	cmp	ip, r4
-	beq	.L1368
+	beq	.L1372
 	ldr	r4, [sp, #4]
 	mov	lr, #36
 	lsl	ip, ip, #10
@@ -12255,170 +12296,170 @@ allocate_data_superblock:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	str	ip, [fp, #4]
-.L1368:
+.L1372:
 	adds	r2, r2, #1
 	adds	r3, r3, #36
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1367:
+.L1371:
 	ldr	r4, [sp, #20]
 	cmp	r2, r4
-	bne	.L1369
+	bne	.L1373
 	ldr	r4, [sp, #0]
-	cbnz	r6, .L1370
-	ldr	r1, .L1401+16
-	movw	r2, #2862
-	ldr	r0, .L1401+20
+	cbnz	r6, .L1374
+	ldr	r1, .L1405+16
+	movw	r2, #2865
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1370:
-	ldr	r3, .L1401+40
+.L1374:
+	ldr	r3, .L1405+40
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1371
-	ldr	r3, .L1401+68
+	cbz	r3, .L1375
+	ldr	r3, .L1405+68
 	cmp	r4, r3
-	bne	.L1371
-	ldr	r3, .L1401+72
+	bne	.L1375
+	ldr	r3, .L1405+72
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #30
-	bls	.L1371
+	bls	.L1375
 	movs	r3, #0
 	strb	r3, [r4, #8]
-.L1371:
-	ldr	r3, .L1401+76
+.L1375:
+	ldr	r3, .L1405+76
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bne	.L1372
-	ldr	r1, .L1401+16
-	movw	r2, #2869
-	ldr	r0, .L1401+20
+	bne	.L1376
+	ldr	r1, .L1405+16
+	movw	r2, #2872
+	ldr	r0, .L1405+20
 	bl	printf
-	ldr	r0, .L1401+24
-	ldr	r1, .L1401+28
+	ldr	r0, .L1405+24
+	ldr	r1, .L1405+28
 	bl	printf
-.L1372:
-	ldr	r3, .L1401+72
+.L1376:
+	ldr	r3, .L1405+72
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r3, [r3, #0]
-	cbnz	r2, .L1373
+	cbnz	r2, .L1377
 	ldrh	r2, [r3, r5, lsl #1]
-	cbz	r2, .L1374
-	ldr	r1, .L1401+80
+	cbz	r2, .L1378
+	ldr	r1, .L1405+80
 	ldrh	r1, [r1, #0]
 	adds	r2, r2, r1
-	b	.L1398
-.L1374:
+	b	.L1402
+.L1378:
 	movs	r2, #2
-.L1398:
+.L1402:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	mov	r0, r5
-	ldr	r3, .L1401+84
+	ldr	r3, .L1405+84
 	movs	r1, #0
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-	b	.L1399
-.L1373:
+	b	.L1403
+.L1377:
 	ldrh	r2, [r3, r5, lsl #1]
 	mov	r0, r5
 	movs	r1, #1
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1401+88
+	ldr	r3, .L1405+88
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-.L1399:
+.L1403:
 	bl	ftl_set_blk_mode
-	ldr	r3, .L1401+72
+	ldr	r3, .L1405+72
 	lsl	fp, r5, #1
 	str	fp, [sp, #20]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1401+92
+	ldr	r3, .L1405+92
 	ldr	r1, [r3, #0]
 	cmp	r2, r1
 	it	hi
 	strhi	r2, [r3, #0]
-	ldr	r3, .L1401+80
+	ldr	r3, .L1405+80
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1401+84
+	ldr	r3, .L1405+84
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1401+88
+	ldr	r3, .L1405+88
 	ldr	r3, [r3, #0]
 	mla	r0, r0, r2, r3
-	ldr	r3, .L1401+12
+	ldr	r3, .L1405+12
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1401+96
+	ldr	r3, .L1405+96
 	str	r0, [r3, #0]
-	ldr	r3, .L1401+100
+	ldr	r3, .L1405+100
 	ldr	r3, [r3, #0]
 	ldr	r2, [r3, #16]
 	adds	r2, r2, #1
 	str	r2, [r3, #16]
 	ldr	r3, [r8, #0]
 	movs	r2, #0
-	b	.L1378
-.L1402:
+	b	.L1382
+.L1406:
 	.align	2
-.L1401:
+.L1405:
+	.word	.LANCHOR82
 	.word	.LANCHOR94
-	.word	.LANCHOR106
-	.word	.LANCHOR103
-	.word	.LANCHOR55
+	.word	.LANCHOR91
+	.word	.LANCHOR43
 	.word	.LANCHOR210
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR111
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR99
 	.word	.LANCHOR169
-	.word	.LANCHOR128
+	.word	.LANCHOR116
 	.word	.LANCHOR167
-	.word	.LANCHOR59
+	.word	.LANCHOR47
 	.word	.LANCHOR7
-	.word	.LANCHOR105
-	.word	.LANCHOR101
-	.word	.LANCHOR53
-	.word	.LANCHOR109
-	.word	.LANCHOR96
+	.word	.LANCHOR93
+	.word	.LANCHOR89
+	.word	.LANCHOR41
+	.word	.LANCHOR97
+	.word	.LANCHOR84
 	.word	.LANCHOR202
-	.word	.LANCHOR63
+	.word	.LANCHOR51
 	.word	.LANCHOR164
 	.word	.LANCHOR165
 	.word	.LANCHOR166
 	.word	.LANCHOR211
 	.word	.LANCHOR187
-	.word	.LANCHOR95
-.L1379:
+	.word	.LANCHOR83
+.L1383:
 	adds	r2, r2, #1
 	ldr	r1, [r3, #-32]
 	uxth	r2, r2
 	bic	r1, r1, #1020
 	bic	r1, r1, #3
 	str	r1, [r3, #-32]
-.L1378:
+.L1382:
 	adds	r3, r3, #36
 	cmp	r2, r6
-	bne	.L1379
-	ldr	r3, .L1403
+	bne	.L1383
+	ldr	r3, .L1407
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1380
+	cbz	r3, .L1384
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	ldr	r0, [r8, #0]
 	cmp	r3, #1
-	bne	.L1381
+	bne	.L1385
 	movs	r1, #0
-	b	.L1400
-.L1381:
+	b	.L1404
+.L1385:
 	movs	r1, #1
-.L1400:
+.L1404:
 	mov	r2, r6
 	bl	FlashEraseBlocks
-.L1380:
+.L1384:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	mov	fp, #0
@@ -12429,13 +12470,13 @@ allocate_data_superblock:
 	mov	r5, fp
 	mov	r6, r4
 	mov	r4, fp
-	b	.L1382
-.L1384:
+	b	.L1386
+.L1388:
 	ldr	r1, [r8, #0]
 	add	r0, r1, fp
 	ldr	r1, [r1, fp]
 	adds	r2, r1, #1
-	bne	.L1383
+	bne	.L1387
 	ldr	r0, [r0, #4]
 	adds	r5, r5, #1
 	str	r1, [sp, #16]
@@ -12450,31 +12491,31 @@ allocate_data_superblock:
 	strb	r1, [r6, #7]
 	ldr	ip, [sp, #12]
 	ldr	r3, [sp, #8]
-.L1383:
+.L1387:
 	adds	r4, r4, #1
 	add	fp, fp, #36
 	add	sl, sl, #2
 	uxth	r4, r4
-.L1382:
+.L1386:
 	cmp	r4, r3
-	bne	.L1384
+	bne	.L1388
 	mov	r3, r5
 	mov	r4, r6
 	mov	r5, ip
-	cbz	r3, .L1385
+	cbz	r3, .L1389
 	mov	r0, ip
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1385:
+.L1389:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1386
-	ldr	r3, .L1403+4
+	cbnz	r3, .L1390
+	ldr	r3, .L1407+4
 	movw	r2, #65535
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1397
-.L1386:
-	ldr	r2, .L1403+8
+	b	.L1401
+.L1390:
+	ldr	r2, .L1407+8
 	ldr	fp, [sp, #20]
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
@@ -12482,43 +12523,43 @@ allocate_data_superblock:
 	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	uxth	r3, r3
-	ldr	r2, .L1403+12
+	ldr	r2, .L1407+12
 	strh	r5, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldr	r1, [r2, #0]
 	str	r1, [r4, #12]
 	adds	r1, r1, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L1403+4
+	ldr	r2, .L1407+4
 	ldr	r2, [r2, #0]
 	strh	r3, [r2, fp]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1387
+	cbz	r3, .L1391
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1357
-.L1387:
-	ldr	r1, .L1403+16
-	mov	r2, #2928
-	ldr	r0, .L1403+20
+	cbnz	r3, .L1361
+.L1391:
+	ldr	r1, .L1407+16
+	movw	r2, #2931
+	ldr	r0, .L1407+20
 	bl	printf
-	ldr	r0, .L1403+24
-	ldr	r1, .L1403+28
+	ldr	r0, .L1407+24
+	ldr	r1, .L1407+28
 	bl	printf
-.L1357:
+.L1361:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1404:
+.L1408:
 	.align	2
-.L1403:
+.L1407:
 	.word	.LANCHOR7
-	.word	.LANCHOR101
-	.word	.LANCHOR68
+	.word	.LANCHOR89
+	.word	.LANCHOR56
 	.word	.LANCHOR156
 	.word	.LANCHOR210
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.size	allocate_data_superblock, .-allocate_data_superblock
 	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
 	.align	1
@@ -12529,35 +12570,35 @@ allocate_data_superblock:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1414
+	ldr	r3, .L1418
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	sub	sp, sp, #40
-	cbz	r6, .L1413
+	cbz	r6, .L1417
 	ldrb	r6, [r0, #8]	@ zero_extendqisi2
 	cmp	r6, #1
-	bne	.L1412
+	bne	.L1416
 	ldrh	r5, [r0, #4]
-	b	.L1406
-.L1412:
+	b	.L1410
+.L1416:
 	movs	r6, #0
-.L1413:
+.L1417:
 	movs	r5, #12
-.L1406:
-	mov	r7, #-1
-	ldr	sl, .L1414+12
-	ldr	fp, .L1414+16
-	ldr	r8, .L1414+20
-	b	.L1407
 .L1410:
+	mov	r7, #-1
+	ldr	sl, .L1418+12
+	ldr	fp, .L1418+16
+	ldr	r8, .L1418+20
+	b	.L1411
+.L1414:
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1408
+	cbz	r3, .L1412
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1408
+	beq	.L1412
 	ldr	r3, [sl, #0]
 	add	r0, sp, #4
 	ldr	r2, [fp, #0]
@@ -12583,18 +12624,18 @@ FtlSuperblockPowerLostFix:
 	bl	FlashProgPages
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-.L1407:
+.L1411:
 	cmp	r5, #0
-	bne	.L1410
-.L1408:
-	ldr	r3, .L1414+4
+	bne	.L1414
+.L1412:
+	ldr	r3, .L1418+4
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1414+8
+	ldr	r3, .L1418+8
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -12602,13 +12643,13 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1415:
+.L1419:
 	.align	2
-.L1414:
+.L1418:
 	.word	.LANCHOR7
-	.word	.LANCHOR101
-	.word	.LANCHOR68
-	.word	.LANCHOR98
+	.word	.LANCHOR89
+	.word	.LANCHOR56
+	.word	.LANCHOR86
 	.word	.LANCHOR184
 	.word	.LANCHOR157
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
@@ -12621,27 +12662,27 @@ FtlSuperblockPowerLostFix:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1447
+	ldr	r3, .L1451
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	ldr	r6, [r3, #0]
 	mov	r8, r1
 	str	r0, [sp, #12]
 	cmp	r6, #0
-	bne	.L1440
-	ldr	r3, .L1447+4
+	bne	.L1444
+	ldr	r3, .L1451+4
 	mov	r5, r6
 	mov	r4, r6
-	ldr	sl, .L1447+28
+	ldr	sl, .L1451+28
 	movs	r7, #36
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	str	r3, [sp, #8]
-	ldr	r3, .L1447+8
+	ldr	r3, .L1451+8
 	str	r0, [r3, #0]
-	b	.L1418
-.L1422:
+	b	.L1422
+.L1426:
 	mul	r3, r7, r6
-	ldr	r1, .L1447+12
+	ldr	r1, .L1451+12
 	ldr	fp, [sl, #0]
 	movs	r0, #0
 	str	r0, [fp, r3]
@@ -12650,13 +12691,13 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #4]
 	cmp	r8, #0
-	beq	.L1419
+	beq	.L1423
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1420
-.L1419:
+	cbnz	r0, .L1424
+.L1423:
 	ldr	r0, [sp, #4]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1421
+	cbnz	r0, .L1425
 	mul	r3, r7, r5
 	ldr	r2, [sl, #0]
 	ldr	ip, [sp, #4]
@@ -12664,34 +12705,34 @@ FtlLowFormatEraseBlock:
 	add	r3, fp, r3
 	lsl	r1, ip, #10
 	str	r0, [r3, #8]
-	ldr	r0, .L1447+16
+	ldr	r0, .L1451+16
 	str	r1, [r2, #4]
 	ldrh	r2, [r0, #0]
 	muls	r2, r5, r2
-	ldr	r0, .L1447+20
+	ldr	r0, .L1451+20
 	adds	r5, r5, #1
 	bic	r2, r2, #3
 	uxth	r5, r5
 	ldr	r1, [r0, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-	b	.L1420
-.L1421:
+	b	.L1424
+.L1425:
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L1420:
+.L1424:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1418:
-	ldr	r1, .L1447+24
+.L1422:
+	ldr	r1, .L1451+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, r6
-	bhi	.L1422
+	bhi	.L1426
 	cmp	r5, #0
-	beq	.L1417
+	beq	.L1421
 	ldr	r2, [sp, #8]
 	mov	sl, #0
-	ldr	r7, .L1447+28
+	ldr	r7, .L1451+28
 	mov	fp, sl
 	adds	r6, r2, #0
 	mov	r2, r5
@@ -12700,56 +12741,56 @@ FtlLowFormatEraseBlock:
 	ldr	r0, [r7, #0]
 	mov	r1, r6
 	bl	FlashEraseBlocks
-.L1426:
+.L1430:
 	ldr	r3, [r7, #0]
 	add	r2, r3, sl
 	ldr	r3, [r3, sl]
 	adds	r3, r3, #1
-	bne	.L1425
+	bne	.L1429
 	ldr	r0, [r2, #4]
 	adds	r4, r4, #1
 	ubfx	r0, r0, #10, #16
 	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
-.L1425:
+.L1429:
 	add	fp, fp, #1
 	add	sl, sl, #36
 	uxth	fp, fp
 	cmp	fp, r5
-	bne	.L1426
+	bne	.L1430
 	cmp	r8, #0
-	beq	.L1441
-	ldr	r3, .L1447+32
+	beq	.L1445
+	ldr	r3, .L1451+32
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #4]
-	ldr	r3, .L1447+4
+	ldr	r3, .L1451+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1442
+	cbnz	r3, .L1446
 	ldr	ip, [sp, #4]
 	movs	r6, #1
 	lsr	ip, ip, #2
 	str	ip, [sp, #8]
-	b	.L1427
-.L1441:
+	b	.L1431
+.L1445:
 	mov	ip, #6
 	str	ip, [sp, #8]
 	mov	ip, #1
 	str	ip, [sp, #4]
-	b	.L1427
-.L1442:
+	b	.L1431
+.L1446:
 	movs	r6, #1
 	str	r6, [sp, #8]
-.L1427:
-	ldr	sl, .L1447+28
+.L1431:
+	ldr	sl, .L1451+28
 	movs	r7, #0
-.L1435:
+.L1439:
 	mov	fp, #0
 	mov	r5, fp
-	b	.L1428
-.L1431:
+	b	.L1432
+.L1435:
 	mov	ip, #36
 	ldr	r2, [sl, #0]
-	ldr	r1, .L1447+12
+	ldr	r1, .L1451+12
 	movs	r0, #0
 	mul	r3, ip, fp
 	str	r2, [sp, #16]
@@ -12759,23 +12800,23 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #20]
 	cmp	r8, #0
-	beq	.L1429
+	beq	.L1433
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1430
-.L1429:
+	cbnz	r0, .L1434
+.L1433:
 	ldr	r0, [sp, #20]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1430
+	cbnz	r0, .L1434
 	ldr	r2, [sp, #16]
 	mov	ip, #36
 	ldr	r1, [sp, #20]
-	ldr	r0, .L1447+36
+	ldr	r0, .L1451+36
 	mla	r3, ip, r5, r2
 	add	r2, r7, r1, lsl #10
-	ldr	r1, .L1447+16
+	ldr	r1, .L1451+16
 	str	r2, [r3, #4]
 	ldr	r2, [r0, #0]
-	ldr	r0, .L1447+40
+	ldr	r0, .L1451+40
 	str	r2, [r3, #8]
 	ldrh	r2, [r1, #0]
 	muls	r2, r5, r2
@@ -12785,16 +12826,16 @@ FtlLowFormatEraseBlock:
 	uxth	r5, r5
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-.L1430:
+.L1434:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1428:
-	ldr	r1, .L1447+24
+.L1432:
+	ldr	r1, .L1451+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, fp
-	bhi	.L1431
+	bhi	.L1435
 	cmp	r5, #0
-	beq	.L1417
+	beq	.L1421
 	mov	r1, r5
 	mov	r2, r6
 	ldr	r0, [sl, #0]
@@ -12806,11 +12847,11 @@ FtlLowFormatEraseBlock:
 	mov	r7, r6
 	mov	r6, r5
 	mov	r5, fp
-.L1434:
+.L1438:
 	ldr	r2, [sl, #0]
 	add	r1, r2, fp
 	ldr	r2, [r2, fp]
-	cbz	r2, .L1433
+	cbz	r2, .L1437
 	ldr	r0, [r1, #4]
 	adds	r4, r4, #1
 	str	ip, [sp, #0]
@@ -12818,12 +12859,12 @@ FtlLowFormatEraseBlock:
 	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
 	ldr	ip, [sp, #0]
-.L1433:
+.L1437:
 	adds	r5, r5, #1
 	add	fp, fp, #36
 	uxth	r5, r5
 	cmp	r5, r6
-	bne	.L1434
+	bne	.L1438
 	mov	r5, r6
 	mov	r6, r7
 	mov	r7, r8
@@ -12833,57 +12874,57 @@ FtlLowFormatEraseBlock:
 	ldr	ip, [sp, #4]
 	uxth	r7, r7
 	cmp	r7, ip
-	bcc	.L1435
+	bcc	.L1439
 	movs	r7, #0
-	ldr	fp, .L1447+28
+	ldr	fp, .L1451+28
 	mov	sl, r7
-.L1437:
+.L1441:
 	cmp	r8, #0
-	beq	.L1436
+	beq	.L1440
 	ldr	r3, [fp, #0]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
-	cbnz	r3, .L1436
+	cbnz	r3, .L1440
 	ldr	r0, [r2, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1436:
+.L1440:
 	add	sl, sl, #1
 	adds	r7, r7, #36
 	uxth	sl, sl
 	cmp	sl, r5
-	bne	.L1437
+	bne	.L1441
 	ldr	r0, [sp, #12]
 	cmp	r0, #63
-	bls	.L1438
+	bls	.L1442
 	cmp	r8, #0
-	beq	.L1417
-.L1438:
-	ldr	r3, .L1447+28
+	beq	.L1421
+.L1442:
+	ldr	r3, .L1451+28
 	mov	r1, r6
 	mov	r2, r5
 	ldr	r0, [r3, #0]
 	bl	FlashEraseBlocks
-	b	.L1417
-.L1440:
+	b	.L1421
+.L1444:
 	movs	r4, #0
-.L1417:
+.L1421:
 	mov	r0, r4
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1448:
+.L1452:
 	.align	2
-.L1447:
-	.word	.LANCHOR94
+.L1451:
+	.word	.LANCHOR82
 	.word	.LANCHOR7
-	.word	.LANCHOR89
+	.word	.LANCHOR77
+	.word	.LANCHOR50
 	.word	.LANCHOR62
-	.word	.LANCHOR74
 	.word	.LANCHOR185
-	.word	.LANCHOR53
-	.word	.LANCHOR95
-	.word	.LANCHOR69
+	.word	.LANCHOR41
+	.word	.LANCHOR83
+	.word	.LANCHOR57
 	.word	.LANCHOR182
 	.word	.LANCHOR183
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
@@ -12896,15 +12937,15 @@ FtlLowFormatEraseBlock:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1454
+	ldr	r3, .L1458
 	push	{r4, r5, lr}
 	mov	r4, r0
 	ldr	r3, [r3, #0]
 	sub	sp, sp, #108
 	cmp	r0, r3
-	bcc	.L1452
-.L1451:
-	ldr	r5, .L1454+4
+	bcc	.L1456
+.L1455:
+	ldr	r5, .L1458+4
 	add	r0, sp, #4
 	movs	r1, #165
 	movs	r2, #32
@@ -12936,18 +12977,18 @@ FlashTestBlk:
 	movne	r4, #-1
 	moveq	r4, #0
 	bl	FlashEraseBlocks
-	b	.L1450
-.L1452:
+	b	.L1454
+.L1456:
 	movs	r4, #0
-.L1450:
+.L1454:
 	mov	r0, r4
 	add	sp, sp, #108
 	pop	{r4, r5, pc}
-.L1455:
+.L1459:
 	.align	2
-.L1454:
-	.word	.LANCHOR46
-	.word	.LANCHOR41
+.L1458:
+	.word	.LANCHOR148
+	.word	.LANCHOR143
 	.size	FlashTestBlk, .-FlashTestBlk
 	.section	.text.ftl_map_blk_gc,"ax",%progbits
 	.align	1
@@ -12967,56 +13008,56 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #8]
 	subs	r3, r7, #4
 	cmp	r2, r3
-	bge	.L1457
+	bge	.L1461
 	ldrh	r2, [r4, #40]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1458
-	ldr	r3, .L1471
+	beq	.L1462
+	ldr	r3, .L1475
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1458
-.L1457:
+	bcc	.L1462
+.L1461:
 	ldrh	r1, [r4, #40]
 	movw	r3, #65535
 	uxth	r6, r0
 	cmp	r1, r3
-	beq	.L1459
-	ldr	r2, .L1471
+	beq	.L1463
+	ldr	r2, .L1475
 	ldrh	r3, [r4, #2]
 	ldrh	r2, [r2, #0]
 	cmp	r2, r3
-	bhi	.L1459
+	bhi	.L1463
 	mov	r0, r5
 	movs	r2, #0
-	b	.L1460
-.L1462:
+	b	.L1464
+.L1466:
 	ldrh	lr, [r0], #2
 	cmp	lr, r1
-	beq	.L1470
+	beq	.L1474
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L1460:
+.L1464:
 	cmp	r2, r7
-	bne	.L1462
-	b	.L1461
-.L1470:
+	bne	.L1466
+	b	.L1465
+.L1474:
 	mov	r6, r2
-.L1461:
-	ldr	r0, .L1471+4
+.L1465:
+	ldr	r0, .L1475+4
 	ldrh	r2, [r5, r2, lsl #1]
 	bl	printf
 	movw	r3, #65535
 	strh	r3, [r4, #40]	@ movhi
-.L1459:
+.L1463:
 	ldrh	r7, [r5, r6, lsl #1]
 	lsls	r2, r6, #1
 	cmp	r7, #0
-	beq	.L1458
+	beq	.L1462
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L1458
+	bne	.L1462
 	movs	r1, #1
 	str	r1, [r4, #32]
 	strh	r3, [r5, r2]	@ movhi
@@ -13024,100 +13065,100 @@ ftl_map_blk_gc:
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1471
+	ldr	r3, .L1475
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1463
+	bcc	.L1467
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1463:
+.L1467:
 	movs	r5, #0
-	ldr	r6, .L1471+8
-	ldr	sl, .L1471+40
-	b	.L1464
-.L1468:
+	ldr	r6, .L1475+8
+	ldr	sl, .L1475+40
+	b	.L1468
+.L1472:
 	lsls	r3, r5, #2
 	str	r3, [sp, #4]
 	ldr	r3, [fp, r5, lsl #2]
 	cmp	r7, r3, lsr #10
-	bne	.L1465
+	bne	.L1469
 	ldr	r2, [sl, #0]
 	movs	r1, #1
 	str	r3, [r6, #4]
-	ldr	r0, .L1471+8
+	ldr	r0, .L1475+8
 	str	r2, [r6, #8]
-	ldr	r2, .L1471+12
+	ldr	r2, .L1475+12
 	ldr	r8, [r2, #0]
 	mov	r2, r1
 	str	r8, [r6, #12]
 	bl	FlashReadPages
 	ldrh	r3, [r8, #8]
 	cmp	r3, r5
-	beq	.L1466
-	ldr	r1, .L1471+16
+	beq	.L1470
+	ldr	r1, .L1475+16
 	movw	r2, #638
-	ldr	r0, .L1471+20
+	ldr	r0, .L1475+20
 	bl	printf
-	ldr	r0, .L1471+24
-	ldr	r1, .L1471+28
+	ldr	r0, .L1475+24
+	ldr	r1, .L1475+28
 	bl	printf
-.L1466:
-	ldr	r3, .L1471+8
+.L1470:
+	ldr	r3, .L1475+8
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	bne	.L1467
+	bne	.L1471
 	ldr	r2, [sp, #4]
 	movs	r3, #0
-	ldr	r0, .L1471+32
+	ldr	r0, .L1475+32
 	str	r3, [fp, r2]
 	ldrh	r2, [r8, #8]
 	ldr	r1, [r6, #4]
 	bl	printf
-	ldr	r2, .L1471+36
+	ldr	r2, .L1475+36
 	movs	r3, #1
 	str	r3, [r2, #0]
-	b	.L1465
-.L1467:
+	b	.L1469
+.L1471:
 	mov	r0, r4
 	mov	r1, r5
 	ldr	r2, [r6, #8]
 	bl	FtlMapWritePage
-.L1465:
+.L1469:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L1464:
+.L1468:
 	ldrh	r3, [r4, #6]
 	cmp	r3, r5
-	bhi	.L1468
+	bhi	.L1472
 	mov	r0, r7
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L1458:
-	ldr	r3, .L1471
+.L1462:
+	ldr	r3, .L1475
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1469
+	bcc	.L1473
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1469:
+.L1473:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1472:
+.L1476:
 	.align	2
-.L1471:
-	.word	.LANCHOR69
+.L1475:
+	.word	.LANCHOR57
 	.word	.LC30
 	.word	.LANCHOR198
 	.word	.LANCHOR184
 	.word	.LANCHOR212
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC31
-	.word	.LANCHOR94
+	.word	.LANCHOR82
 	.word	.LANCHOR180
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
@@ -13129,28 +13170,28 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1480
+	ldr	r3, .L1484
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	ldr	r6, [r3, #0]
 	ldr	r5, [r0, #12]
 	ldr	r8, [r0, #24]
 	cmp	r6, #0
-	bne	.L1474
+	bne	.L1478
 	ldrh	r3, [r0, #0]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1475
+	bne	.L1479
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L1476
-	ldr	r1, .L1480+4
+	cbz	r3, .L1480
+	ldr	r1, .L1484+4
 	movw	r2, #670
-	ldr	r0, .L1480+8
+	ldr	r0, .L1484+8
 	bl	printf
-	ldr	r0, .L1480+12
-	ldr	r1, .L1480+16
+	ldr	r0, .L1484+12
+	ldr	r1, .L1484+16
 	bl	printf
-.L1476:
+.L1480:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -13162,16 +13203,16 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	b	.L1474
-.L1475:
+	b	.L1478
+.L1479:
 	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
-	ldr	r2, .L1480+20
+	ldr	r2, .L1484+20
 	ldrh	r3, [r0, #2]
-	ldr	r7, .L1480+24
+	ldr	r7, .L1484+24
 	orr	r3, r3, r5, lsl #10
 	str	r3, [r2, #4]
-	ldr	r3, .L1480+28
+	ldr	r3, .L1484+28
 	ldr	r0, [r7, #0]
 	ldr	r3, [r3, #0]
 	str	r0, [r2, #8]
@@ -13183,7 +13224,7 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r5, [r3, #2]	@ movhi
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1480+32
+	ldr	r3, .L1484+32
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #3
 	bl	memset
@@ -13191,26 +13232,26 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r1, [r7, #0]
 	mov	r2, r8
 	mov	r3, r6
-	b	.L1477
-.L1479:
+	b	.L1481
+.L1483:
 	ldr	r7, [r2], #4
 	cmp	r5, r7, lsr #10
-	bne	.L1478
+	bne	.L1482
 	adds	r3, r3, #1
 	uxth	r3, r3
 	str	r6, [r1, r3, lsl #3]
 	add	r7, r1, r3, lsl #3
 	ldr	lr, [r2, #-4]
 	str	lr, [r7, #4]
-.L1478:
+.L1482:
 	adds	r6, r6, #1
-.L1477:
+.L1481:
 	uxth	r7, r6
 	cmp	r7, r0
-	bcc	.L1479
+	bcc	.L1483
 	movs	r1, #1
 	movs	r3, #0
-	ldr	r0, .L1480+20
+	ldr	r0, .L1484+20
 	mov	r2, r1
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
@@ -13218,21 +13259,21 @@ Ftl_write_map_blk_to_last_page:
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-.L1474:
+.L1478:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1481:
+.L1485:
 	.align	2
-.L1480:
-	.word	.LANCHOR94
+.L1484:
+	.word	.LANCHOR82
 	.word	.LANCHOR213
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR198
-	.word	.LANCHOR98
+	.word	.LANCHOR86
 	.word	.LANCHOR184
-	.word	.LANCHOR69
+	.word	.LANCHOR57
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
 	.align	1
@@ -13243,18 +13284,18 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1496
+	ldr	r3, .L1500
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldr	r6, [r3, #0]
 	stmia	sp, {r1, r2}
 	cmp	r6, #0
-	bne	.L1483
-	ldr	r8, .L1496+32
-	ldr	sl, .L1496+36
-	ldr	r5, .L1496+4
-	ldr	fp, .L1496+40
-.L1495:
+	bne	.L1487
+	ldr	r8, .L1500+32
+	ldr	sl, .L1500+36
+	ldr	r5, .L1500+4
+	ldr	fp, .L1500+40
+.L1499:
 	ldr	r3, [r8, #0]
 	ldrh	r2, [r4, #2]
 	adds	r3, r3, #1
@@ -13262,39 +13303,39 @@ FtlMapWritePage:
 	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L1485
+	bge	.L1489
 	ldrh	r3, [r4, #0]
 	movw	r1, #65535
 	cmp	r3, r1
-	bne	.L1486
-.L1485:
+	bne	.L1490
+.L1489:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L1486:
+.L1490:
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1487
-	ldr	r1, .L1496+8
+	cbnz	r3, .L1491
+	ldr	r1, .L1500+8
 	movw	r2, #731
-	ldr	r0, .L1496+12
+	ldr	r0, .L1500+12
 	bl	printf
-	ldr	r0, .L1496+16
-	ldr	r1, .L1496+20
+	ldr	r0, .L1500+16
+	ldr	r1, .L1500+20
 	bl	printf
-.L1487:
+.L1491:
 	ldrh	r2, [r4, #0]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L1488
-	ldr	r1, .L1496+8
+	bcc	.L1492
+	ldr	r1, .L1500+8
 	mov	r2, #732
-	ldr	r0, .L1496+12
+	ldr	r0, .L1500+12
 	bl	printf
-	ldr	r0, .L1496+16
-	ldr	r1, .L1496+20
+	ldr	r0, .L1500+16
+	ldr	r1, .L1500+20
 	bl	printf
-.L1488:
+.L1492:
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
@@ -13311,7 +13352,7 @@ FtlMapWritePage:
 	ldr	r3, [r5, #12]
 	ldr	r2, [r4, #28]
 	ldr	r1, [sp, #0]
-	ldr	r0, .L1496+4
+	ldr	r0, .L1500+4
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
 	strh	r1, [r3, #8]	@ movhi
@@ -13327,59 +13368,59 @@ FtlMapWritePage:
 	adds	r1, r3, #1
 	uxth	r2, r2
 	strh	r2, [r4, #2]	@ movhi
-	bne	.L1489
-	ldr	r0, .L1496+24
+	bne	.L1493
+	ldr	r0, .L1500+24
 	adds	r6, r6, #1
 	ldr	r1, [r5, #4]
 	bl	printf
 	ldrh	r3, [r4, #2]
 	uxth	r6, r6
 	cmp	r3, #2
-	bhi	.L1490
+	bhi	.L1494
 	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1490:
+.L1494:
 	cmp	r6, #3
-	bls	.L1495
-	ldr	r3, .L1496+4
+	bls	.L1499
+	ldr	r3, .L1500+4
 	mov	r2, r6
-	ldr	r0, .L1496+28
+	ldr	r0, .L1500+28
 	ldr	r1, [r3, #4]
 	bl	printf
-	ldr	r3, .L1496
+	ldr	r3, .L1500
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L1483
-.L1489:
-	cbz	r3, .L1492
+	b	.L1487
+.L1493:
+	cbz	r3, .L1496
 	strh	r7, [r4, #40]	@ movhi
-.L1492:
+.L1496:
 	cmp	r2, #1
-	beq	.L1495
+	beq	.L1499
 	cmp	r3, #256
-	beq	.L1495
-	ldr	r3, .L1496+4
+	beq	.L1499
+	ldr	r3, .L1500+4
 	ldr	r1, [sp, #0]
 	ldr	r2, [r3, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r1, lsl #2]
-.L1483:
+.L1487:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1497:
+.L1501:
 	.align	2
-.L1496:
-	.word	.LANCHOR94
+.L1500:
+	.word	.LANCHOR82
 	.word	.LANCHOR198
 	.word	.LANCHOR214
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC32
 	.word	.LC33
 	.word	.LANCHOR162
-	.word	.LANCHOR69
+	.word	.LANCHOR57
 	.word	.LANCHOR184
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
@@ -13397,31 +13438,31 @@ FtlMapBlkWriteDumpData:
 	ldrh	r6, [r0, #6]
 	ldr	r8, [r0, #24]
 	cmp	r3, #0
-	beq	.L1498
+	beq	.L1502
 	movs	r3, #0
 	str	r3, [r0, #36]
-	ldr	r3, .L1504
+	ldr	r3, .L1508
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1498
-	ldr	r3, .L1504+4
-	ldr	r5, .L1504+8
+	bne	.L1502
+	ldr	r3, .L1508+4
+	ldr	r5, .L1508+8
 	ldr	r3, [r3, #0]
 	str	r3, [r5, #8]
-	ldr	r3, .L1504+12
+	ldr	r3, .L1508+12
 	ldr	r7, [r3, #0]
 	ldrh	r3, [r0, #2]
 	str	r7, [r5, #12]
-	cbz	r3, .L1500
-	ldr	r2, .L1504+16
+	cbz	r3, .L1504
+	ldr	r2, .L1508+16
 	ldrh	r2, [r2, #0]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1500
+	bge	.L1504
 	ldrh	r2, [r0, #0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1500
+	beq	.L1504
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -13433,51 +13474,51 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1500
+	beq	.L1504
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r7, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1500
+	bne	.L1504
 	mov	r0, r4
-	b	.L1503
-.L1500:
+	b	.L1507
+.L1504:
 	subs	r6, r6, #1
-	ldr	r5, .L1504+8
+	ldr	r5, .L1508+8
 	uxth	r6, r6
 	ldr	r3, [r8, r6, lsl #2]
 	str	r3, [r5, #4]
-	cbz	r3, .L1501
+	cbz	r3, .L1505
 	movs	r1, #1
 	mov	r0, r5
 	mov	r2, r1
 	bl	FlashReadPages
-	b	.L1502
-.L1501:
-	ldr	r3, .L1504+20
+	b	.L1506
+.L1505:
+	ldr	r3, .L1508+20
 	movs	r1, #255
 	ldr	r0, [r5, #8]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1502:
+.L1506:
 	mov	r0, r4
 	mov	r1, r6
-.L1503:
+.L1507:
 	ldr	r2, [r5, #8]
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	FtlMapWritePage
-.L1498:
+.L1502:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1505:
+.L1509:
 	.align	2
-.L1504:
-	.word	.LANCHOR94
+.L1508:
+	.word	.LANCHOR82
 	.word	.LANCHOR180
 	.word	.LANCHOR198
 	.word	.LANCHOR184
-	.word	.LANCHOR69
-	.word	.LANCHOR73
+	.word	.LANCHOR57
+	.word	.LANCHOR61
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
 	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
@@ -13488,32 +13529,32 @@ FtlMapBlkWriteDumpData:
 FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1517
+	ldr	r3, .L1521
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	fp, r2
 	ldrh	r6, [r3, #0]
 	adds	r2, r1, r0
-	ldr	r3, .L1517+4
+	ldr	r3, .L1521+4
 	sub	sp, sp, #56
 	mov	r7, r0
 	mov	r5, r1
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bhi	.L1515
+	bhi	.L1519
 	lsr	r6, r0, r6
-	ldr	r8, .L1517+28
+	ldr	r8, .L1521+28
 	lsls	r3, r6, #2
 	str	r3, [sp, #8]
 	movs	r3, #0
 	str	r3, [sp, #4]
-	b	.L1508
-.L1514:
-	ldr	r2, .L1517+8
+	b	.L1512
+.L1518:
+	ldr	r2, .L1521+8
 	mov	r0, r7
 	ldr	r3, [r2, #0]
 	ldr	r2, [sp, #8]
 	ldr	sl, [r3, r2]
-	ldr	r3, .L1517+12
+	ldr	r3, .L1521+12
 	ldrh	r4, [r3, #0]
 	mov	r1, r4
 	bl	__aeabi_uidivmod
@@ -13525,7 +13566,7 @@ FtlVendorPartRead:
 	it	hi
 	uxthhi	r4, r5
 	cmp	sl, #0
-	beq	.L1510
+	beq	.L1514
 	ldr	r3, [r8, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -13541,32 +13582,32 @@ FtlVendorPartRead:
 	it	eq
 	moveq	r2, #-1
 	str	r2, [sp, #4]
-	ldr	r2, .L1517+16
+	ldr	r2, .L1521+16
 	ldr	r3, [r2, #0]
 	cmp	r3, #256
-	bne	.L1512
+	bne	.L1516
 	mov	r1, r6
 	mov	r2, sl
-	ldr	r0, .L1517+20
+	ldr	r0, .L1521+20
 	bl	printf
-	ldr	r0, .L1517+24
+	ldr	r0, .L1521+24
 	mov	r1, r6
 	ldr	r2, [r8, #0]
 	bl	FtlMapWritePage
-.L1512:
+.L1516:
 	ldr	r3, [sp, #12]
 	mov	r0, fp
 	ldr	r1, [r8, #0]
 	lsls	r2, r4, #9
 	add	r1, r1, r3, lsl #9
 	bl	memcpy
-	b	.L1513
-.L1510:
+	b	.L1517
+.L1514:
 	mov	r0, fp
 	mov	r1, sl
 	lsls	r2, r4, #9
 	bl	memset
-.L1513:
+.L1517:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r5, r5, r4
@@ -13574,24 +13615,24 @@ FtlVendorPartRead:
 	add	fp, fp, r4, lsl #9
 	adds	r3, r3, #4
 	str	r3, [sp, #8]
-.L1508:
+.L1512:
 	cmp	r5, #0
-	bne	.L1514
-	b	.L1507
-.L1515:
+	bne	.L1518
+	b	.L1511
+.L1519:
 	mov	r3, #-1
 	str	r3, [sp, #4]
-.L1507:
+.L1511:
 	ldr	r0, [sp, #4]
 	add	sp, sp, #56
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1518:
+.L1522:
 	.align	2
-.L1517:
-	.word	.LANCHOR72
-	.word	.LANCHOR65
+.L1521:
+	.word	.LANCHOR60
+	.word	.LANCHOR53
 	.word	.LANCHOR190
-	.word	.LANCHOR71
+	.word	.LANCHOR59
 	.word	.LANCHOR198
 	.word	.LC34
 	.word	.LANCHOR215
@@ -13608,96 +13649,96 @@ Ftl_load_ext_data:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r0, #0
-	ldr	r4, .L1523
+	ldr	r4, .L1527
 	movs	r1, #1
-	ldr	r5, .L1523+4
+	ldr	r5, .L1527+4
 	mov	r2, r4
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #0]
 	cmp	r3, r5
-	beq	.L1520
+	beq	.L1524
 	mov	r0, r4
 	movs	r1, #0
 	mov	r2, #512
 	bl	memset
 	str	r5, [r4, #0]
-.L1520:
+.L1524:
 	ldr	r2, [r4, #0]
-	ldr	r3, .L1523
+	ldr	r3, .L1527
 	cmp	r2, r5
-	bne	.L1521
+	bne	.L1525
 	ldr	r1, [r3, #88]
-	ldr	r2, .L1523+8
+	ldr	r2, .L1527+8
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #92]
-	ldr	r2, .L1523+12
+	ldr	r2, .L1527+12
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #8]
-	ldr	r2, .L1523+16
+	ldr	r2, .L1527+16
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #12]
-	ldr	r2, .L1523+20
+	ldr	r2, .L1527+20
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #16]
-	ldr	r2, .L1523+24
+	ldr	r2, .L1527+24
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #20]
-	ldr	r2, .L1523+28
+	ldr	r2, .L1527+28
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #28]
-	ldr	r2, .L1523+32
+	ldr	r2, .L1527+32
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #32]
-	ldr	r2, .L1523+36
+	ldr	r2, .L1527+36
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #36]
-	ldr	r2, .L1523+40
+	ldr	r2, .L1527+40
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #40]
-	ldr	r2, .L1523+44
+	ldr	r2, .L1527+44
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #44]
-	ldr	r2, .L1523+48
+	ldr	r2, .L1527+48
 	str	r1, [r2, #0]
 	ldr	r1, [r3, #48]
-	ldr	r2, .L1523+52
+	ldr	r2, .L1527+52
 	str	r1, [r2, #0]
 	ldr	r2, [r3, #60]
-	ldr	r3, .L1523+56
+	ldr	r3, .L1527+56
 	str	r2, [r3, #0]
-.L1521:
-	ldr	r3, .L1523+60
+.L1525:
+	ldr	r3, .L1527+60
 	movs	r2, #0
 	str	r2, [r3, #0]
-	ldr	r3, .L1523
+	ldr	r3, .L1527
 	ldr	r2, [r3, #68]
-	ldr	r3, .L1523+64
+	ldr	r3, .L1527+64
 	cmp	r2, r3
-	bne	.L1522
-	ldr	r3, .L1523+68
+	bne	.L1526
+	ldr	r3, .L1527+68
 	movs	r2, #1
-	ldr	r0, .L1523+72
-	ldr	r1, .L1523+76
+	ldr	r0, .L1527+72
+	ldr	r1, .L1527+76
 	str	r2, [r3, #0]
 	bl	printf
-.L1522:
-	ldr	r3, .L1523+80
+.L1526:
+	ldr	r3, .L1527+80
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1523+84
+	ldr	r3, .L1527+84
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1523+32
+	ldr	r3, .L1527+32
 	ldr	r3, [r3, #0]
 	mla	r0, r0, r2, r3
-	ldr	r3, .L1523+88
+	ldr	r3, .L1527+88
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1523+92
+	ldr	r3, .L1527+92
 	str	r0, [r3, #0]
 	pop	{r3, r4, r5, pc}
-.L1524:
+.L1528:
 	.align	2
-.L1523:
-	.word	.LANCHOR144
+.L1527:
+	.word	.LANCHOR132
 	.word	1179929683
 	.word	.LANCHOR216
 	.word	.LANCHOR217
@@ -13706,7 +13747,7 @@ Ftl_load_ext_data:
 	.word	.LANCHOR163
 	.word	.LANCHOR162
 	.word	.LANCHOR165
-	.word	.LANCHOR97
+	.word	.LANCHOR85
 	.word	.LANCHOR160
 	.word	.LANCHOR161
 	.word	.LANCHOR166
@@ -13714,12 +13755,12 @@ Ftl_load_ext_data:
 	.word	.LANCHOR155
 	.word	.LANCHOR154
 	.word	305432421
-	.word	.LANCHOR128
-	.word	.LC10
+	.word	.LANCHOR116
+	.word	.LC4
 	.word	.LC35
-	.word	.LANCHOR63
+	.word	.LANCHOR51
 	.word	.LANCHOR164
-	.word	.LANCHOR55
+	.word	.LANCHOR43
 	.word	.LANCHOR211
 	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
 	.section	.text.FtlLoadEctTbl,"ax",%progbits
@@ -13732,36 +13773,36 @@ FtlLoadEctTbl:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	movs	r0, #64
-	ldr	r4, .L1527
-	ldr	r5, .L1527+4
+	movs	r0, #64
+	ldr	r4, .L1531
+	ldr	r5, .L1531+4
 	ldr	r2, [r4, #0]
 	ldrh	r1, [r5, #0]
 	bl	FtlVendorPartRead
 	ldr	r3, [r4, #0]
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1527+8
+	ldr	r3, .L1531+8
 	cmp	r2, r3
-	beq	.L1526
-	ldr	r1, .L1527+12
-	ldr	r0, .L1527+16
+	beq	.L1530
+	ldr	r1, .L1531+12
+	ldr	r0, .L1531+16
 	bl	printf
 	ldrh	r2, [r5, #0]
 	ldr	r0, [r4, #0]
 	movs	r1, #0
 	lsls	r2, r2, #9
 	bl	memset
-.L1526:
+.L1530:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1528:
+.L1532:
 	.align	2
-.L1527:
+.L1531:
 	.word	.LANCHOR187
 	.word	.LANCHOR186
 	.word	1112818501
 	.word	.LC36
-	.word	.LC10
+	.word	.LC4
 	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
 	.section	.text.FtlVendorPartWrite,"ax",%progbits
 	.align	1
@@ -13772,31 +13813,31 @@ FtlLoadEctTbl:
 FtlVendorPartWrite:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1539
+	ldr	r3, .L1543
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #56
 	ldrh	sl, [r3, #0]
 	mov	r6, r0
-	ldr	r3, .L1539+4
+	ldr	r3, .L1543+4
 	mov	r4, r1
 	str	r2, [sp, #8]
 	adds	r2, r1, r0
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bhi	.L1537
+	bhi	.L1541
 	lsr	sl, r0, sl
 	mov	fp, #0
-	ldr	r7, .L1539+8
+	ldr	r7, .L1543+8
 	lsl	r3, sl, #2
 	str	r3, [sp, #4]
-	b	.L1531
-.L1536:
-	ldr	r2, .L1539+12
+	b	.L1535
+.L1540:
+	ldr	r2, .L1543+12
 	mov	r0, r6
 	ldr	r3, [r2, #0]
 	ldr	r2, [sp, #4]
 	ldr	r3, [r3, r2]
-	ldr	r2, .L1539+16
+	ldr	r2, .L1543+16
 	ldrh	r8, [r2, #0]
 	str	r3, [sp, #0]
 	mov	r1, r8
@@ -13809,9 +13850,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	hi
 	uxthhi	r5, r4
-	cbz	r3, .L1533
+	cbz	r3, .L1537
 	cmp	r5, r8
-	beq	.L1533
+	beq	.L1537
 	str	r3, [sp, #24]
 	movs	r1, #1
 	ldr	r3, [r7, #0]
@@ -13821,14 +13862,14 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-	b	.L1534
-.L1533:
-	ldr	r3, .L1539+20
+	b	.L1538
+.L1537:
+	ldr	r3, .L1543+20
 	movs	r1, #0
 	ldr	r0, [r7, #0]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1534:
+.L1538:
 	ldr	r3, [sp, #12]
 	lsl	r8, r5, #9
 	ldr	r0, [r7, #0]
@@ -13839,7 +13880,7 @@ FtlVendorPartWrite:
 	adds	r6, r6, r5
 	bl	memcpy
 	mov	r1, sl
-	ldr	r0, .L1539+24
+	ldr	r0, .L1543+24
 	add	sl, sl, #1
 	ldr	r2, [r7, #0]
 	bl	FtlMapWritePage
@@ -13852,25 +13893,25 @@ FtlVendorPartWrite:
 	cmp	r0, #-1
 	it	eq
 	moveq	fp, #-1
-.L1531:
+.L1535:
 	cmp	r4, #0
-	bne	.L1536
-	b	.L1530
-.L1537:
+	bne	.L1540
+	b	.L1534
+.L1541:
 	mov	fp, #-1
-.L1530:
+.L1534:
 	mov	r0, fp
 	add	sp, sp, #56
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1540:
+.L1544:
 	.align	2
-.L1539:
-	.word	.LANCHOR72
-	.word	.LANCHOR65
+.L1543:
+	.word	.LANCHOR60
+	.word	.LANCHOR53
 	.word	.LANCHOR181
 	.word	.LANCHOR190
-	.word	.LANCHOR71
-	.word	.LANCHOR73
+	.word	.LANCHOR59
+	.word	.LANCHOR61
 	.word	.LANCHOR215
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
@@ -13883,64 +13924,64 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1543
-	ldr	r3, .L1543+4
+	ldr	r2, .L1547
+	ldr	r3, .L1547+4
 	ldr	r1, [r2, #0]
 	cmp	r1, r3
-	bne	.L1541
-	ldr	r3, .L1543+8
+	bne	.L1545
+	ldr	r3, .L1547+8
 	movs	r0, #0
 	movs	r1, #1
 	str	r3, [r2, #4]
-	ldr	r3, .L1543+12
+	ldr	r3, .L1547+12
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #88]
-	ldr	r3, .L1543+16
+	ldr	r3, .L1547+16
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #92]
-	ldr	r3, .L1543+20
+	ldr	r3, .L1547+20
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #8]
-	ldr	r3, .L1543+24
+	ldr	r3, .L1547+24
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #12]
-	ldr	r3, .L1543+28
+	ldr	r3, .L1547+28
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #16]
-	ldr	r3, .L1543+32
+	ldr	r3, .L1547+32
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #20]
-	ldr	r3, .L1543+36
+	ldr	r3, .L1547+36
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #28]
-	ldr	r3, .L1543+40
+	ldr	r3, .L1547+40
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #32]
-	ldr	r3, .L1543+44
+	ldr	r3, .L1547+44
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #36]
-	ldr	r3, .L1543+48
+	ldr	r3, .L1547+48
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #40]
-	ldr	r3, .L1543+52
+	ldr	r3, .L1547+52
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #44]
-	ldr	r3, .L1543+56
+	ldr	r3, .L1547+56
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #48]
-	ldr	r3, .L1543+60
+	ldr	r3, .L1547+60
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #60]
-	ldr	r3, .L1543+64
+	ldr	r3, .L1547+64
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L1541:
+.L1545:
 	bx	lr
-.L1544:
+.L1548:
 	.align	2
-.L1543:
-	.word	.LANCHOR144
+.L1547:
+	.word	.LANCHOR132
 	.word	1179929683
 	.word	1342177351
 	.word	.LANCHOR216
@@ -13950,7 +13991,7 @@ Ftl_save_ext_data:
 	.word	.LANCHOR163
 	.word	.LANCHOR162
 	.word	.LANCHOR165
-	.word	.LANCHOR97
+	.word	.LANCHOR85
 	.word	.LANCHOR160
 	.word	.LANCHOR161
 	.word	.LANCHOR166
@@ -13968,43 +14009,43 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1552
+	ldr	r3, .L1556
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1550
-	ldr	r3, .L1552+4
+	cbz	r3, .L1554
+	ldr	r3, .L1556+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
 	ite	ls
 	movls	r3, #4
 	movhi	r3, #32
-	b	.L1546
-.L1550:
+	b	.L1550
+.L1554:
 	movs	r3, #32
-.L1546:
-	ldr	r2, .L1552+8
+.L1550:
+	ldr	r2, .L1556+8
 	ldrh	r1, [r2, #0]
 	cmp	r1, #31
-	bhi	.L1547
+	bhi	.L1551
 	movs	r3, #1
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-.L1547:
-	ldr	r2, .L1552+12
-	cbnz	r0, .L1548
+.L1551:
+	ldr	r2, .L1556+12
+	cbnz	r0, .L1552
 	ldr	r1, [r2, #0]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	adds	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1549
-.L1548:
+	bcc	.L1553
+.L1552:
 	ldr	r2, [r2, #0]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1552+16
+	ldr	r3, .L1556+16
 	str	r3, [r2, #0]
-	ldr	r3, .L1552+20
+	ldr	r3, .L1556+20
 	ldrh	r1, [r3, #0]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -14015,13 +14056,13 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1549:
+.L1553:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1553:
+.L1557:
 	.align	2
-.L1552:
-	.word	.LANCHOR128
+.L1556:
+	.word	.LANCHOR116
 	.word	.LANCHOR167
 	.word	.LANCHOR218
 	.word	.LANCHOR187
@@ -14040,8 +14081,8 @@ flush_l2p_region:
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
 	muls	r4, r0, r4
-	ldr	r5, .L1555
-	ldr	r0, .L1555+4
+	ldr	r5, .L1559
+	ldr	r0, .L1559+4
 	ldr	r2, [r5, #0]
 	adds	r3, r2, r4
 	ldrh	r1, [r2, r4]
@@ -14054,11 +14095,11 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1556:
+.L1560:
 	.align	2
-.L1555:
-	.word	.LANCHOR114
-	.word	.LANCHOR122
+.L1559:
+	.word	.LANCHOR102
+	.word	.LANCHOR110
 	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
@@ -14071,32 +14112,32 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r4, #0
-	ldr	r7, .L1561
+	ldr	r7, .L1565
 	movs	r5, #12
-	ldr	r6, .L1561+4
-	b	.L1558
-.L1560:
+	ldr	r6, .L1565+4
+	b	.L1562
+.L1564:
 	ldr	r3, [r6, #0]
 	mla	r3, r5, r4, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1559
+	bge	.L1563
 	mov	r0, r4
 	bl	flush_l2p_region
-.L1559:
+.L1563:
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L1558:
+.L1562:
 	ldrh	r3, [r7, #0]
 	cmp	r3, r4
-	bhi	.L1560
+	bhi	.L1564
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1562:
+.L1566:
 	.align	2
-.L1561:
-	.word	.LANCHOR83
-	.word	.LANCHOR114
+.L1565:
+	.word	.LANCHOR71
+	.word	.LANCHOR102
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -14107,123 +14148,123 @@ l2p_flush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1576
+	ldr	r3, .L1580
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bcs	.L1564
-	ldr	r1, .L1576+4
-	movw	r2, #2936
-	ldr	r0, .L1576+8
+	bcs	.L1568
+	ldr	r1, .L1580+4
+	movw	r2, #2939
+	ldr	r0, .L1580+8
 	bl	printf
-	ldr	r0, .L1576+12
-	ldr	r1, .L1576+16
+	ldr	r0, .L1580+12
+	ldr	r1, .L1580+16
 	bl	printf
-.L1564:
-	ldr	r3, .L1576+20
+.L1568:
+	ldr	r3, .L1580+20
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1565
+	bne	.L1569
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1566
-	ldr	r3, .L1576+24
+	beq	.L1570
+	ldr	r3, .L1580+24
 	mov	r0, r5
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1567
+	cbz	r3, .L1571
 	bl	INSERT_DATA_LIST
-	b	.L1566
-.L1567:
+	b	.L1570
+.L1571:
 	bl	INSERT_FREE_LIST
-.L1566:
+.L1570:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L1576+28
+	ldr	r3, .L1580+28
 	cmp	r4, r3
-	beq	.L1568
-	ldr	r3, .L1576+32
+	beq	.L1572
+	ldr	r3, .L1580+32
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1568
-	ldr	r2, .L1576+36
+	beq	.L1572
+	ldr	r2, .L1580+36
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1569
-.L1568:
+	cbz	r2, .L1573
+.L1572:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	b	.L1570
-.L1569:
-	ldr	r2, .L1576+40
+	b	.L1574
+.L1573:
+	ldr	r2, .L1580+40
 	cmp	r4, r2
-	bne	.L1570
+	bne	.L1574
 	cmp	r3, #3
-	beq	.L1571
-	ldr	r3, .L1576+44
+	beq	.L1575
+	ldr	r3, .L1580+44
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L1572
-.L1571:
+	bne	.L1576
+.L1575:
 	movs	r3, #1
 	strb	r3, [r2, #8]
-.L1572:
-	ldr	r3, .L1576+48
+.L1576:
+	ldr	r3, .L1580+48
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1570
-	ldr	r3, .L1576+52
+	cbz	r3, .L1574
+	ldr	r3, .L1580+52
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
-	bhi	.L1570
-	ldr	r3, .L1576+40
+	bhi	.L1574
+	ldr	r3, .L1580+40
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L1570:
-	ldr	r6, .L1576+56
+.L1574:
+	ldr	r6, .L1580+56
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	beq	.L1573
+	beq	.L1577
 	cmp	r5, r0
-	bne	.L1574
-	ldr	r3, .L1576+24
+	bne	.L1578
+	ldr	r3, .L1580+24
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1575
-.L1574:
+	cbz	r3, .L1579
+.L1578:
 	bl	update_vpc_list
-.L1575:
+.L1579:
 	movw	r3, #65535
 	strh	r3, [r6, #0]	@ movhi
-.L1573:
+.L1577:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1565:
+.L1569:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1577:
+.L1581:
 	.align	2
-.L1576:
-	.word	.LANCHOR55
+.L1580:
+	.word	.LANCHOR43
 	.word	.LANCHOR219
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR94
-	.word	.LANCHOR101
-	.word	.LANCHOR110
-	.word	.LANCHOR59
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR82
+	.word	.LANCHOR89
+	.word	.LANCHOR98
+	.word	.LANCHOR47
 	.word	.LANCHOR7
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.word	.LANCHOR155
-	.word	.LANCHOR128
+	.word	.LANCHOR116
 	.word	.LANCHOR167
-	.word	.LANCHOR138
+	.word	.LANCHOR126
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
 	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
@@ -14247,17 +14288,17 @@ FtlMapTblRecovery:
 	lsl	r2, sl, #2
 	str	r0, [sp, #12]
 	mov	r0, fp
-	ldr	r6, .L1615
+	ldr	r6, .L1619
 	str	r3, [sp, #16]
 	bl	memset
-	ldr	r1, .L1615+4
+	ldr	r1, .L1619+4
 	movs	r2, #0
 	mov	r8, r2
 	str	r2, [r4, #32]
 	str	r2, [r4, #28]
 	ldr	r3, [r1, #0]
 	str	r3, [r6, #8]
-	ldr	r3, .L1615+8
+	ldr	r3, .L1619+8
 	ldr	r5, [r3, #0]
 	movw	r3, #65535
 	str	r5, [r6, #12]
@@ -14270,12 +14311,12 @@ FtlMapTblRecovery:
 	mov	r3, fp
 	mov	fp, sl
 	mov	sl, r4
-	b	.L1579
-.L1593:
+	b	.L1583
+.L1597:
 	ldr	r0, [sp, #16]
 	subs	r2, r0, #1
 	cmp	r8, r2
-	bne	.L1580
+	bne	.L1584
 	sxth	r6, r1
 	mov	r7, r1
 	ldr	r1, [sp, #12]
@@ -14287,7 +14328,7 @@ FtlMapTblRecovery:
 	movs	r1, #1
 	bl	FtlGetLastWrittenPage
 	strh	r7, [r4, #0]	@ movhi
-	ldr	r7, .L1615
+	ldr	r7, .L1619
 	uxth	r3, r0
 	ldr	r0, [sp, #20]
 	adds	r2, r3, #1
@@ -14296,11 +14337,11 @@ FtlMapTblRecovery:
 	ldr	r2, [r0, r6, lsl #2]
 	movs	r6, #0
 	str	r2, [r4, #28]
-	b	.L1581
-.L1584:
+	b	.L1585
+.L1588:
 	ldrh	r2, [r8, #0]
 	movs	r1, #1
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	orr	r2, r6, r2, lsl #10
 	str	r2, [r7, #4]
 	mov	r2, r1
@@ -14309,35 +14350,35 @@ FtlMapTblRecovery:
 	ldr	r2, [r7, #0]
 	ldr	r3, [sp, #8]
 	adds	r2, r2, #1
-	beq	.L1582
+	beq	.L1586
 	ldrh	r2, [r5, #8]
 	cmp	r2, sl
-	bcs	.L1583
+	bcs	.L1587
 	ldrh	r0, [r5, #0]
 	ldrh	r1, [r4, #4]
 	cmp	r0, r1
-	bne	.L1583
+	bne	.L1587
 	ldr	r1, [r7, #4]
 	str	r1, [fp, r2, lsl #2]
-	b	.L1583
-.L1582:
+	b	.L1587
+.L1586:
 	ldrh	r2, [r8, #0]
 	strh	r2, [r4, #40]	@ movhi
-.L1583:
+.L1587:
 	adds	r6, r6, #1
-.L1581:
+.L1585:
 	sxth	r2, r6
 	cmp	r3, r2
-	bge	.L1584
-	b	.L1585
-.L1580:
-	ldr	r1, .L1615+4
-	ldr	r0, .L1615+12
+	bge	.L1588
+	b	.L1589
+.L1584:
+	ldr	r1, .L1619+4
+	ldr	r0, .L1619+12
 	ldr	r2, [r1, #0]
 	ldrh	r1, [r7], #2
 	str	r2, [r6, #8]
 	ldrh	r2, [r0, #0]
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	subs	r2, r2, #1
 	orr	r2, r2, r1, lsl #10
 	movs	r1, #1
@@ -14348,24 +14389,24 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #0]
 	ldr	r3, [sp, #8]
 	adds	r2, r2, #1
-	beq	.L1606
+	beq	.L1610
 	ldrh	r1, [r5, #0]
 	ldrh	r2, [sl, #4]
 	cmp	r1, r2
-	bne	.L1606
+	bne	.L1610
 	ldrh	r2, [r5, #8]
 	movw	r1, #64245
 	cmp	r2, r1
-	bne	.L1606
-	ldr	r2, .L1615+12
+	bne	.L1610
+	ldr	r2, .L1619+12
 	movs	r1, #0
-	ldr	r0, .L1615+4
+	ldr	r0, .L1619+4
 	mov	lr, r3
 	ldrh	r4, [r2, #0]
 	ldr	r2, [r0, #0]
 	subs	r4, r4, #1
-	b	.L1587
-.L1589:
+	b	.L1591
+.L1593:
 	ldrh	r0, [r2, #0]
 	cmp	r0, fp
 	itt	cc
@@ -14373,15 +14414,15 @@ FtlMapTblRecovery:
 	strcc	r3, [lr, r0, lsl #2]
 	adds	r1, r1, #1
 	adds	r2, r2, #8
-.L1587:
+.L1591:
 	cmp	r1, r4
-	blt	.L1589
+	blt	.L1593
 	mov	r3, lr
-	b	.L1590
-.L1592:
+	b	.L1594
+.L1596:
 	ldrh	r2, [r7, #-2]
 	movs	r1, #1
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	orr	r2, r4, r2, lsl #10
 	str	r2, [r6, #4]
 	mov	r2, r1
@@ -14390,95 +14431,95 @@ FtlMapTblRecovery:
 	ldr	r2, [r6, #0]
 	ldr	ip, [sp, #8]
 	adds	r2, r2, #1
-	beq	.L1591
+	beq	.L1595
 	ldrh	r2, [r5, #8]
 	cmp	r2, fp
-	bcs	.L1591
+	bcs	.L1595
 	ldrh	r1, [sl, #4]
 	ldrh	r0, [r5, #0]
 	cmp	r0, r1
 	itt	eq
 	ldreq	r1, [r6, #4]
 	streq	r1, [r8, r2, lsl #2]
-.L1591:
+.L1595:
 	adds	r4, r4, #1
-	b	.L1610
-.L1606:
+	b	.L1614
+.L1610:
 	mov	ip, r8
 	movs	r4, #0
 	mov	r8, r3
-.L1610:
-	ldr	r1, .L1615+12
+.L1614:
+	ldr	r1, .L1619+12
 	ldrh	r2, [r1, #0]
 	cmp	r4, r2
-	blt	.L1592
+	blt	.L1596
 	mov	r3, r8
 	mov	r8, ip
-.L1590:
+.L1594:
 	add	r8, r8, #1
-.L1579:
+.L1583:
 	ldr	r2, [sp, #16]
 	uxth	r1, r8
 	cmp	r8, r2
-	blt	.L1593
+	blt	.L1597
 	mov	r4, sl
-.L1585:
-	ldr	r3, .L1615+16
+.L1589:
+	ldr	r3, .L1619+16
 	cmp	r4, r3
-	bne	.L1594
-	ldr	r3, .L1615+20
+	bne	.L1598
+	ldr	r3, .L1619+20
 	ldrh	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1607
-	b	.L1594
-.L1601:
+	bne	.L1611
+	b	.L1598
+.L1605:
 	ldr	r3, [r8, #0]
 	lsls	r4, r7, #2
 	ldr	r3, [r3, r7, lsl #2]
 	subs	r2, r3, #1
 	adds	r2, r2, #3
-	bhi	.L1596
+	bhi	.L1600
 	ldr	r2, [r6, #0]
 	ldr	r2, [r2, r7, lsl #2]
 	cmp	r3, r2
-	beq	.L1596
-	ldr	r0, .L1615+4
+	beq	.L1600
+	ldr	r0, .L1619+4
 	movs	r1, #1
 	str	r3, [sl, #4]
 	ldr	r2, [r0, #0]
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	str	r2, [sl, #8]
-	ldr	r2, .L1615+8
+	ldr	r2, .L1619+8
 	ldr	r5, [r2, #0]
 	mov	r2, r1
 	str	r5, [sl, #12]
 	bl	FlashReadPages
 	ldr	r3, [sl, #0]
 	adds	r3, r3, #1
-	beq	.L1609
-	ldr	r3, .L1615+16
+	beq	.L1613
+	ldr	r3, .L1619+16
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #4]
 	cmp	r2, r3
-	bne	.L1609
+	bne	.L1613
 	ldr	fp, [r5, #4]
-	b	.L1597
-.L1609:
+	b	.L1601
+.L1613:
 	mov	fp, #0
-.L1597:
+.L1601:
 	ldr	r3, [r6, #0]
 	movs	r1, #1
 	mov	r2, r1
-	ldr	r0, .L1615
+	ldr	r0, .L1619
 	ldr	r3, [r3, r4]
 	str	r3, [sl, #4]
 	bl	FlashReadPages
 	ldr	r1, [r5, #4]
 	cmp	fp, r1
-	bls	.L1596
+	bls	.L1600
 	ldr	r2, [r8, #0]
 	ldr	r3, [r6, #0]
-	ldr	r0, .L1615+24
+	ldr	r0, .L1619+24
 	str	r1, [sp, #0]
 	ldr	r1, [r2, r4]
 	ldr	r2, [r3, r4]
@@ -14490,65 +14531,65 @@ FtlMapTblRecovery:
 	str	r1, [r2, r4]
 	movs	r2, #0
 	ldr	r0, [r3, r4]
-	ldr	r3, .L1615+28
+	ldr	r3, .L1619+28
 	ubfx	r0, r0, #10, #16
 	ldr	r1, [sp, #12]
 	ldrh	r3, [r3, #0]
-	b	.L1598
-.L1599:
+	b	.L1602
+.L1603:
 	ldrh	r4, [r1], #2
 	adds	r2, r2, #1
 	cmp	r4, r0
-	beq	.L1596
-.L1598:
+	beq	.L1600
+.L1602:
 	cmp	r2, r3
-	blt	.L1599
-	b	.L1613
-.L1614:
+	blt	.L1603
+	b	.L1617
+.L1618:
 	ldr	r1, [sp, #12]
 	strh	r0, [r1, r3, lsl #1]	@ movhi
-	ldr	r3, .L1615+28
+	ldr	r3, .L1619+28
 	ldrh	r2, [r3, #0]
 	adds	r2, r2, #1
 	strh	r2, [r3, #0]	@ movhi
 	bl	remove_from_free_sys_Queue
-.L1596:
+.L1600:
 	adds	r7, r7, #1
-	b	.L1595
-.L1616:
+	b	.L1599
+.L1620:
 	.align	2
-.L1615:
+.L1619:
 	.word	.LANCHOR198
-	.word	.LANCHOR98
+	.word	.LANCHOR86
 	.word	.LANCHOR184
-	.word	.LANCHOR69
-	.word	.LANCHOR122
-	.word	.LANCHOR85
+	.word	.LANCHOR57
+	.word	.LANCHOR110
+	.word	.LANCHOR73
 	.word	.LC37
-	.word	.LANCHOR123
-.L1607:
-	ldr	r8, .L1617+16
+	.word	.LANCHOR111
+.L1611:
+	ldr	r8, .L1621+16
 	movs	r7, #0
-	ldr	r6, .L1617
-	ldr	sl, .L1617+20
+	ldr	r6, .L1621
+	ldr	sl, .L1621+20
 	str	r4, [sp, #16]
-.L1595:
-	ldr	r2, .L1617+4
+.L1599:
+	ldr	r2, .L1621+4
 	ldrh	r3, [r2, #0]
 	cmp	r7, r3
-	bcc	.L1601
+	bcc	.L1605
 	ldr	r4, [sp, #16]
-.L1594:
+.L1598:
 	mov	r0, r4
 	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1617+8
+	ldr	r3, .L1621+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1602
+	bne	.L1606
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1602:
+.L1606:
 	mov	r0, r4
 	bl	ftl_map_blk_gc
 	mov	r0, r4
@@ -14556,19 +14597,19 @@ FtlMapTblRecovery:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1613:
-	ldr	r2, .L1617+12
+.L1617:
+	ldr	r2, .L1621+12
 	ldr	r2, [r2, #0]
 	cmp	r3, r2
-	bcs	.L1596
-	b	.L1614
-.L1618:
+	bcs	.L1600
+	b	.L1618
+.L1622:
 	.align	2
-.L1617:
-	.word	.LANCHOR126
-	.word	.LANCHOR82
-	.word	.LANCHOR69
-	.word	.LANCHOR80
+.L1621:
+	.word	.LANCHOR114
+	.word	.LANCHOR70
+	.word	.LANCHOR57
+	.word	.LANCHOR68
 	.word	.LANCHOR191
 	.word	.LANCHOR198
 	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
@@ -14583,14 +14624,14 @@ FtlLoadMapInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	FtlL2PDataInit
-	ldr	r0, .L1620
+	ldr	r0, .L1624
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1621:
+.L1625:
 	.align	2
-.L1620:
-	.word	.LANCHOR122
+.L1624:
+	.word	.LANCHOR110
 	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
 	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
@@ -14602,28 +14643,28 @@ FtlLoadVonderInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1623
-	ldr	r0, .L1623+4
+	ldr	r3, .L1627
+	ldr	r0, .L1627+4
 	ldrh	r3, [r3, #0]
 	strh	r3, [r0, #10]	@ movhi
 	movw	r3, #61574
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1623+8
+	ldr	r3, .L1627+8
 	ldrh	r3, [r3, #0]
 	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1623+12
+	ldr	r3, .L1627+12
 	ldrh	r3, [r3, #0]
 	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1623+16
+	ldr	r3, .L1627+16
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #12]
-	ldr	r3, .L1623+20
+	ldr	r3, .L1627+20
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #16]
-	ldr	r3, .L1623+24
+	ldr	r3, .L1627+24
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #20]
-	ldr	r3, .L1623+28
+	ldr	r3, .L1627+28
 	ldr	r3, [r3, #0]
 	str	r3, [r0, #24]
 	movw	r3, #65535
@@ -14631,14 +14672,14 @@ FtlLoadVonderInfo:
 	bl	FtlMapTblRecovery
 	movs	r0, #0
 	pop	{r3, pc}
-.L1624:
+.L1628:
 	.align	2
-.L1623:
-	.word	.LANCHOR77
+.L1627:
+	.word	.LANCHOR65
 	.word	.LANCHOR215
-	.word	.LANCHOR86
-	.word	.LANCHOR78
-	.word	.LANCHOR87
+	.word	.LANCHOR74
+	.word	.LANCHOR66
+	.word	.LANCHOR75
 	.word	.LANCHOR189
 	.word	.LANCHOR188
 	.word	.LANCHOR190
@@ -14654,42 +14695,42 @@ load_l2p_region:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, sl, lr}
 	mov	r4, r0
-	ldr	r3, .L1631
+	ldr	r3, .L1635
 	mov	r7, r1
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bcs	.L1626
-	ldr	r1, .L1631+4
+	bcs	.L1630
+	ldr	r1, .L1635+4
 	movw	r2, #503
-	ldr	r0, .L1631+8
+	ldr	r0, .L1635+8
 	bl	printf
-	ldr	r0, .L1631+12
-	ldr	r1, .L1631+16
+	ldr	r0, .L1635+12
+	ldr	r1, .L1635+16
 	bl	printf
-.L1626:
-	ldr	r3, .L1631+20
-	ldr	r8, .L1631+44
+.L1630:
+	ldr	r3, .L1635+20
+	ldr	r8, .L1635+44
 	ldr	r3, [r3, #0]
 	ldr	r6, [r3, r4, lsl #2]
 	movs	r3, #12
-	cbnz	r6, .L1627
+	cbnz	r6, .L1631
 	muls	r7, r3, r7
 	ldr	r3, [r8, #0]
 	movs	r1, #255
 	adds	r3, r3, r7
 	ldr	r0, [r3, #8]
-	ldr	r3, .L1631+24
+	ldr	r3, .L1635+24
 	ldrh	r2, [r3, #0]
 	bl	memset
 	ldr	r3, [r8, #0]
 	adds	r2, r3, r7
 	strh	r4, [r3, r7]	@ movhi
 	str	r6, [r2, #4]
-	b	.L1628
-.L1627:
+	b	.L1632
+.L1631:
 	muls	r7, r3, r7
 	ldr	r3, [r8, #0]
-	ldr	r5, .L1631+28
+	ldr	r5, .L1635+28
 	movs	r1, #1
 	adds	r3, r3, r7
 	mov	r2, r1
@@ -14697,62 +14738,62 @@ load_l2p_region:
 	ldr	r3, [r3, #8]
 	str	r6, [r5, #4]
 	str	r3, [r5, #8]
-	ldr	r3, .L1631+32
+	ldr	r3, .L1635+32
 	ldr	r3, [r3, #0]
 	str	r3, [r5, #12]
 	bl	FlashReadPages
 	ldr	r3, [r5, #0]
 	ldr	sl, [r5, #12]
 	cmp	r3, #256
-	bne	.L1629
+	bne	.L1633
 	mov	r2, r6
 	mov	r1, r4
-	ldr	r0, .L1631+36
+	ldr	r0, .L1635+36
 	lsrs	r6, r6, #10
 	bl	printf
 	ldr	r3, [r8, #0]
-	ldr	r0, .L1631+40
+	ldr	r0, .L1635+40
 	mov	r1, r4
 	adds	r3, r3, r7
 	strh	r6, [r0, #40]	@ movhi
 	ldr	r2, [r3, #8]
 	bl	FtlMapWritePage
-.L1629:
+.L1633:
 	ldrh	r3, [sl, #8]
 	cmp	r3, r4
-	beq	.L1630
-	ldr	r1, .L1631+4
+	beq	.L1634
+	ldr	r1, .L1635+4
 	movw	r2, #529
-	ldr	r0, .L1631+8
+	ldr	r0, .L1635+8
 	bl	printf
-	ldr	r0, .L1631+12
-	ldr	r1, .L1631+16
+	ldr	r0, .L1635+12
+	ldr	r1, .L1635+16
 	bl	printf
-.L1630:
-	ldr	r3, .L1631+44
+.L1634:
+	ldr	r3, .L1635+44
 	movs	r1, #0
 	ldr	r3, [r3, #0]
 	adds	r2, r3, r7
 	strh	r4, [r3, r7]	@ movhi
 	str	r1, [r2, #4]
-.L1628:
+.L1632:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1632:
+.L1636:
 	.align	2
-.L1631:
-	.word	.LANCHOR82
+.L1635:
+	.word	.LANCHOR70
 	.word	.LANCHOR220
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR126
-	.word	.LANCHOR73
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR114
+	.word	.LANCHOR61
 	.word	.LANCHOR198
 	.word	.LANCHOR184
 	.word	.LC38
-	.word	.LANCHOR122
-	.word	.LANCHOR114
+	.word	.LANCHOR110
+	.word	.LANCHOR102
 	.size	load_l2p_region, .-load_l2p_region
 	.section	.text.log2phys,"ax",%progbits
 	.align	1
@@ -14763,7 +14804,7 @@ load_l2p_region:
 log2phys:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1643
+	ldr	r3, .L1647
 	push	{r4, r5, r6, r7, r8, lr}
 	movs	r5, #1
 	ldrh	r3, [r3, #0]
@@ -14772,76 +14813,76 @@ log2phys:
 	adds	r3, r3, #7
 	lsr	r4, r0, r3
 	lsl	r5, r5, r3
-	ldr	r3, .L1643+4
+	ldr	r3, .L1647+4
 	subs	r5, r5, #1
 	ands	r5, r5, r0
 	uxth	r4, r4
 	ldr	r3, [r3, #0]
 	uxth	r5, r5
 	cmp	r0, r3
-	bcc	.L1634
-	ldr	r1, .L1643+8
+	bcc	.L1638
+	ldr	r1, .L1647+8
 	movw	r2, #851
-	ldr	r0, .L1643+12
+	ldr	r0, .L1647+12
 	bl	printf
-	ldr	r0, .L1643+16
-	ldr	r1, .L1643+20
+	ldr	r0, .L1647+16
+	ldr	r1, .L1647+20
 	bl	printf
-.L1634:
-	ldr	r3, .L1643+24
+.L1638:
+	ldr	r3, .L1647+24
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1643+28
+	ldr	r3, .L1647+28
 	ldr	r2, [r3, #0]
 	movs	r3, #0
 	mov	r8, r3
-	b	.L1635
-.L1641:
+	b	.L1639
+.L1645:
 	adds	r3, r3, #12
 	adds	r0, r2, r3
 	ldrh	r0, [r0, #-12]
 	cmp	r0, r4
-	bne	.L1636
-.L1637:
-	ldr	r2, .L1643+28
+	bne	.L1640
+.L1641:
+	ldr	r2, .L1647+28
 	movs	r3, #12
 	ldr	r2, [r2, #0]
 	mla	r3, r3, r8, r2
-	cbnz	r7, .L1638
+	cbnz	r7, .L1642
 	ldr	r3, [r3, #8]
 	ldr	r3, [r3, r5, lsl #2]
 	str	r3, [r6, #0]
-	b	.L1639
-.L1638:
+	b	.L1643
+.L1642:
 	ldr	r1, [r6, #0]
 	ldr	r2, [r3, #8]
 	str	r1, [r2, r5, lsl #2]
 	ldr	r2, [r3, #4]
 	orr	r2, r2, #-2147483648
 	str	r2, [r3, #4]
-	ldr	r3, .L1643+32
+	ldr	r3, .L1647+32
 	strh	r4, [r3, #0]	@ movhi
-.L1639:
-	ldr	r3, .L1643+28
+.L1643:
+	ldr	r3, .L1647+28
 	movs	r2, #12
 	ldr	r3, [r3, #0]
 	mla	r3, r2, r8, r3
 	ldr	r2, [r3, #4]
 	adds	r0, r2, #1
-	beq	.L1640
+	beq	.L1644
 	adds	r2, r2, #1
 	str	r2, [r3, #4]
-.L1640:
+.L1644:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1636:
+.L1640:
 	add	r8, r8, #1
 	uxth	r8, r8
-.L1635:
+.L1639:
 	cmp	r8, r1
-	bne	.L1641
+	bne	.L1645
 	bl	select_l2p_ram_region
 	movs	r3, #12
-	ldr	r2, .L1643+28
+	ldr	r2, .L1647+28
 	ldr	r2, [r2, #0]
 	mul	r3, r3, r0
 	mov	r8, r0
@@ -14849,28 +14890,28 @@ log2phys:
 	ldrh	r2, [r2, r3]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1642
+	beq	.L1646
 	ldr	r3, [r1, #4]
 	cmp	r3, #0
-	bge	.L1642
+	bge	.L1646
 	bl	flush_l2p_region
-.L1642:
+.L1646:
 	mov	r0, r4
 	mov	r1, r8
 	bl	load_l2p_region
-	b	.L1637
-.L1644:
+	b	.L1641
+.L1648:
 	.align	2
-.L1643:
-	.word	.LANCHOR72
-	.word	.LANCHOR88
+.L1647:
+	.word	.LANCHOR60
+	.word	.LANCHOR76
 	.word	.LANCHOR221
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR83
-	.word	.LANCHOR114
-	.word	.LANCHOR115
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR71
+	.word	.LANCHOR102
+	.word	.LANCHOR103
 	.size	log2phys, .-log2phys
 	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
@@ -14886,86 +14927,86 @@ FtlReUsePrevPpa:
 	ubfx	r0, r1, #10, #16
 	str	r1, [sp, #4]
 	bl	P2V_block_in_plane
-	ldr	r3, .L1652
+	ldr	r3, .L1656
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r0, lsl #1]
 	mov	r4, r0
 	cmp	r2, #0
-	bne	.L1646
-	ldr	r3, .L1652+4
+	bne	.L1650
+	ldr	r3, .L1656+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	beq	.L1647
-	ldr	r1, .L1652+8
+	beq	.L1651
+	ldr	r1, .L1656+8
 	movs	r5, #6
-	ldr	r0, .L1652+12
+	ldr	r0, .L1656+12
 	ldrh	r7, [r1, #0]
-	ldr	r1, .L1652+16
+	ldr	r1, .L1656+16
 	ldr	r1, [r1, #0]
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r0, r3
 	movw	r0, #65535
 	uxth	r3, r3
-	b	.L1648
-.L1651:
+	b	.L1652
+.L1655:
 	cmp	r3, r4
-	bne	.L1649
-	ldr	r5, .L1652+8
+	bne	.L1653
+	ldr	r5, .L1656+8
 	mov	r1, r4
-	ldr	r0, .L1652+4
+	ldr	r0, .L1656+4
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1650
-	ldr	r1, .L1652+20
+	cbnz	r3, .L1654
+	ldr	r1, .L1656+20
 	movw	r2, #1823
-	ldr	r0, .L1652+24
+	ldr	r0, .L1656+24
 	bl	printf
-	ldr	r0, .L1652+28
-	ldr	r1, .L1652+32
+	ldr	r0, .L1656+28
+	ldr	r1, .L1656+32
 	bl	printf
-.L1650:
+.L1654:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5, #0]	@ movhi
 	bl	INSERT_DATA_LIST
-	ldr	r3, .L1652
+	ldr	r3, .L1656
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r4, lsl #1]
-	b	.L1646
-.L1649:
+	b	.L1650
+.L1653:
 	muls	r3, r5, r3
 	ldrh	r3, [r1, r3]
 	cmp	r3, r0
-	beq	.L1647
+	beq	.L1651
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L1648:
+.L1652:
 	cmp	r2, r7
-	bne	.L1651
-	b	.L1647
-.L1646:
+	bne	.L1655
+	b	.L1651
+.L1650:
 	adds	r2, r2, #1
 	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1647:
+.L1651:
 	mov	r0, r6
 	add	r1, sp, #4
 	movs	r2, #1
 	bl	log2phys
 	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L1653:
+.L1657:
 	.align	2
-.L1652:
-	.word	.LANCHOR101
-	.word	.LANCHOR105
-	.word	.LANCHOR106
+.L1656:
+	.word	.LANCHOR89
+	.word	.LANCHOR93
+	.word	.LANCHOR94
 	.word	-1431655765
-	.word	.LANCHOR99
+	.word	.LANCHOR87
 	.word	.LANCHOR222
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
 	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
@@ -14978,48 +15019,48 @@ FtlProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r3
-	ldr	r3, .L1670
+	ldr	r3, .L1674
 	mov	r5, r0
 	str	r1, [sp, #4]
 	ldrb	r7, [r3, #0]	@ zero_extendqisi2
-	cbz	r7, .L1655
+	cbz	r7, .L1659
 	ldrb	r7, [r4, #8]	@ zero_extendqisi2
 	sub	r2, r7, #1
 	rsbs	r7, r2, #0
 	adc	r7, r7, r2
-.L1655:
+.L1659:
 	mov	r0, r5
 	ldr	r1, [sp, #4]
 	mov	r2, r7
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
 	mov	sl, #0
-	ldr	r6, .L1670+4
-	ldr	fp, .L1670+36
-	b	.L1656
-.L1659:
+	ldr	r6, .L1674+4
+	ldr	fp, .L1674+36
+	b	.L1660
+.L1663:
 	ldr	r0, [r5, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldrh	r3, [r4, #0]
 	cmp	r3, r0
-	bne	.L1657
+	bne	.L1661
 	ldr	r2, [r6, #0]
 	ldrh	r1, [r4, #4]
 	ldrh	r0, [r2, r3, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r2, r3, lsl #1]	@ movhi
-	ldr	r2, .L1670+8
+	ldr	r2, .L1674+8
 	strb	r8, [r4, #6]
 	strh	r8, [r4, #4]	@ movhi
 	ldrh	r3, [r2, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1657:
+.L1661:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1658
+	cbnz	r3, .L1662
 	mov	r0, r4
 	bl	allocate_new_data_superblock
-.L1658:
+.L1662:
 	ldr	r0, [r5, #4]
 	ldr	r3, [fp, #96]
 	ubfx	r0, r0, #10, #16
@@ -15035,32 +15076,32 @@ FtlProgPages:
 	mov	r0, r5
 	ldrb	r3, [r4, #9]	@ zero_extendqisi2
 	bl	FlashProgPages
-	b	.L1668
-.L1669:
+	b	.L1672
+.L1673:
 	mov	r8, #0
-.L1668:
+.L1672:
 	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1659
-	ldr	r3, .L1670+12
+	beq	.L1663
+	ldr	r3, .L1674+12
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1660
-	ldr	r1, .L1670+16
+	bcc	.L1664
+	ldr	r1, .L1674+16
 	movw	r2, #1550
-	ldr	r0, .L1670+20
+	ldr	r0, .L1674+20
 	bl	printf
-	ldr	r0, .L1670+24
-	ldr	r1, .L1670+28
+	ldr	r0, .L1674+24
+	ldr	r1, .L1674+28
 	bl	printf
-.L1660:
+.L1664:
 	ldr	r3, [r5, #4]
 	str	r3, [sp, #12]
-	cbz	r7, .L1661
+	cbz	r7, .L1665
 	orr	r3, r3, #-2147483648
 	str	r3, [sp, #12]
-.L1661:
+.L1665:
 	movs	r2, #1
 	ldr	r0, [r5, #16]
 	add	r1, sp, #12
@@ -15068,53 +15109,53 @@ FtlProgPages:
 	ldr	r3, [r5, #12]
 	ldr	r0, [r3, #12]
 	adds	r3, r0, #1
-	beq	.L1662
+	beq	.L1666
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	ldr	r3, [r6, #0]
 	ldrh	r2, [r3, r0, lsl #1]
 	mov	r8, r0
-	cbnz	r2, .L1663
-	ldr	r0, .L1670+32
+	cbnz	r2, .L1667
+	ldr	r0, .L1674+32
 	mov	r1, r8
 	bl	printf
-.L1663:
+.L1667:
 	mov	r0, r8
 	bl	decrement_vpc_count
-.L1662:
+.L1666:
 	add	sl, sl, #1
 	adds	r5, r5, #36
-.L1656:
+.L1660:
 	ldr	r3, [sp, #4]
 	cmp	sl, r3
-	bne	.L1669
-	ldr	r3, .L1670+12
+	bne	.L1673
+	ldr	r3, .L1674+12
 	ldrb	r2, [r4, #6]	@ zero_extendqisi2
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1654
-	ldr	r1, .L1670+16
+	bcc	.L1658
+	ldr	r1, .L1674+16
 	movw	r2, #1567
-	ldr	r0, .L1670+20
+	ldr	r0, .L1674+20
 	bl	printf
-	ldr	r0, .L1670+24
-	ldr	r1, .L1670+28
+	ldr	r0, .L1674+24
+	ldr	r1, .L1674+28
 	bl	printf
-.L1654:
+.L1658:
 	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1671:
+.L1675:
 	.align	2
-.L1670:
+.L1674:
 	.word	.LANCHOR7
-	.word	.LANCHOR101
-	.word	.LANCHOR68
-	.word	.LANCHOR53
+	.word	.LANCHOR89
+	.word	.LANCHOR56
+	.word	.LANCHOR41
 	.word	.LANCHOR223
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LC39
-	.word	.LANCHOR144
+	.word	.LANCHOR132
 	.size	FtlProgPages, .-FtlProgPages
 	.section	.text.FtlCacheWriteBack,"ax",%progbits
 	.align	1
@@ -15126,23 +15167,23 @@ FtlCacheWriteBack:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, lr}
-	ldr	r4, .L1674
+	ldr	r4, .L1678
 	ldr	r0, [r4, #0]
-	cbz	r0, .L1673
-	ldr	r3, .L1674+4
+	cbz	r0, .L1677
+	ldr	r3, .L1678+4
 	movs	r1, #1
 	movs	r2, #0
 	ldr	r3, [r3, #0]
 	bl	FtlProgPages
 	movs	r3, #0
 	str	r3, [r4, #0]
-.L1673:
+.L1677:
 	movs	r0, #0
 	pop	{r4, pc}
-.L1675:
+.L1679:
 	.align	2
-.L1674:
-	.word	.LANCHOR137
+.L1678:
+	.word	.LANCHOR125
 	.word	.LANCHOR224
 	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
 	.section	.text.FtlSysFlush,"ax",%progbits
@@ -15155,21 +15196,21 @@ FtlSysFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1678
+	ldr	r3, .L1682
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1677
+	cbnz	r3, .L1681
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	movs	r0, #1
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1677:
+.L1681:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1679:
+.L1683:
 	.align	2
-.L1678:
-	.word	.LANCHOR94
+.L1682:
+	.word	.LANCHOR82
 	.size	FtlSysFlush, .-FtlSysFlush
 	.section	.text.FtlDeInit,"ax",%progbits
 	.align	1
@@ -15181,17 +15222,17 @@ FtlDeInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1682
+	ldr	r3, .L1686
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L1681
+	bne	.L1685
 	bl	FtlSysFlush
-.L1681:
+.L1685:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1683:
+.L1687:
 	.align	2
-.L1682:
+.L1686:
 	.word	.LANCHOR225
 	.size	FtlDeInit, .-FtlDeInit
 	.section	.text.rk_ftl_de_init,"ax",%progbits
@@ -15218,36 +15259,36 @@ rk_ftl_de_init:
 FtlGcFreeTempBlock:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1703
+	ldr	r3, .L1707
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1703+4
+	ldr	r3, .L1707+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1699
-	ldr	r0, .L1703+8
+	bne	.L1703
+	ldr	r0, .L1707+8
 	movw	r3, #65535
 	ldrh	r4, [r0, #0]
 	cmp	r4, r3
-	beq	.L1687
+	beq	.L1691
 	bl	FtlGcScanTempBlk
 	str	r0, [sp, #4]
 	adds	r0, r0, #1
-	beq	.L1687
-	ldr	r3, .L1703+12
+	beq	.L1691
+	ldr	r3, .L1707+12
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r4, lsl #1]
 	cmp	r2, #4
-	bls	.L1688
+	bls	.L1692
 	subs	r2, r2, #5
 	movs	r0, #1
 	strh	r2, [r3, r4, lsl #1]	@ movhi
 	bl	FtlEctTblFlush
-.L1688:
-	ldr	r3, .L1703+16
+.L1692:
+	ldr	r3, .L1707+16
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1689
-	ldr	r3, .L1703+20
+	cbnz	r3, .L1693
+	ldr	r3, .L1707+20
 	ldr	r0, [sp, #4]
 	ldr	r2, [r3, #96]
 	ubfx	r0, r0, #10, #16
@@ -15255,59 +15296,59 @@ FtlGcFreeTempBlock:
 	str	r2, [r3, #96]
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
-.L1689:
-	ldr	r3, .L1703+16
+.L1693:
+	ldr	r3, .L1707+16
 	movs	r2, #0
 	movs	r4, #1
 	str	r2, [r3, #0]
-	b	.L1686
-.L1687:
-	ldr	r5, .L1703+8
+	b	.L1690
+.L1691:
+	ldr	r5, .L1707+8
 	movs	r4, #0
-	ldr	r3, .L1703+16
+	ldr	r3, .L1707+16
 	ldrh	r2, [r5, #0]
 	str	r4, [r3, #0]
 	movw	r3, #65535
 	cmp	r2, r3
-	beq	.L1686
+	beq	.L1690
 	bl	FtlCacheWriteBack
-	ldr	r3, .L1703+24
-	ldr	r1, .L1703
+	ldr	r3, .L1707+24
+	ldr	r1, .L1707
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r1, #0]
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
 	muls	r3, r1, r3
 	cmp	r2, r3
-	beq	.L1690
-	ldr	r1, .L1703+28
+	beq	.L1694
+	ldr	r1, .L1707+28
 	movs	r2, #163
-	ldr	r0, .L1703+32
+	ldr	r0, .L1707+32
 	bl	printf
-	ldr	r0, .L1703+36
-	ldr	r1, .L1703+40
+	ldr	r0, .L1707+36
+	ldr	r1, .L1707+40
 	bl	printf
-.L1690:
-	ldr	r3, .L1703+8
+.L1694:
+	ldr	r3, .L1707+8
 	movs	r5, #0
-	ldr	r2, .L1703+44
-	ldr	r4, .L1703
+	ldr	r2, .L1707+44
+	ldr	r4, .L1707
 	ldrh	r1, [r3, #0]
 	ldr	r2, [r2, #0]
 	ldrh	r4, [r4, #0]
 	ldrb	r0, [r3, #7]	@ zero_extendqisi2
 	muls	r0, r4, r0
 	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldr	r1, .L1703+48
-	ldr	r2, .L1703+24
-	ldr	fp, .L1703+80
+	ldr	r1, .L1707+48
+	ldr	r2, .L1707+24
+	ldr	fp, .L1707+80
 	ldr	r0, [r1, #0]
 	mov	sl, r2
 	ldrh	r4, [r2, #0]
-	ldr	r8, .L1703+84
+	ldr	r8, .L1707+84
 	adds	r0, r4, r0
 	str	r0, [r1, #0]
-	b	.L1691
-.L1695:
+	b	.L1695
+.L1699:
 	ldr	r7, [fp, #0]
 	movs	r6, #12
 	muls	r6, r5, r6
@@ -15315,15 +15356,15 @@ FtlGcFreeTempBlock:
 	adds	r4, r7, r6
 	ldr	r2, [r4, #8]
 	cmp	r2, r3
-	bcc	.L1692
-	ldr	r1, .L1703+28
+	bcc	.L1696
+	ldr	r1, .L1707+28
 	movs	r2, #168
-	ldr	r0, .L1703+32
+	ldr	r0, .L1707+32
 	bl	printf
-	ldr	r0, .L1703+36
-	ldr	r1, .L1703+40
+	ldr	r0, .L1707+36
+	ldr	r1, .L1707+40
 	bl	printf
-.L1692:
+.L1696:
 	movs	r2, #0
 	ldr	r0, [r4, #8]
 	add	r1, sp, #4
@@ -15331,7 +15372,7 @@ FtlGcFreeTempBlock:
 	ldr	r0, [sp, #4]
 	ldr	r3, [r7, r6]
 	cmp	r0, r3
-	bne	.L1693
+	bne	.L1697
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	adds	r1, r4, #4
@@ -15340,96 +15381,96 @@ FtlGcFreeTempBlock:
 	ldr	r0, [r4, #8]
 	bl	log2phys
 	mov	r0, r6
-	b	.L1702
-.L1693:
+	b	.L1706
+.L1697:
 	ldr	r3, [r4, #4]
 	cmp	r0, r3
-	beq	.L1694
-	ldr	r3, .L1703+8
+	beq	.L1698
+	ldr	r3, .L1707+8
 	ldrh	r0, [r3, #0]
-.L1702:
+.L1706:
 	bl	decrement_vpc_count
-.L1694:
+.L1698:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L1691:
+.L1695:
 	ldrh	r3, [sl, #0]
 	cmp	r3, r5
-	bhi	.L1695
+	bhi	.L1699
 	movw	r0, #65535
-	ldr	r4, .L1703+8
+	ldr	r4, .L1707+8
 	bl	decrement_vpc_count
-	ldr	r3, .L1703+52
+	ldr	r3, .L1707+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1696
-	ldr	r0, .L1703+56
+	cbz	r3, .L1700
+	ldr	r0, .L1707+56
 	ldrh	r1, [r4, #0]
 	bl	printf
-.L1696:
-	ldr	r3, .L1703+44
+.L1700:
+	ldr	r3, .L1707+44
 	ldrh	r0, [r4, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1697
+	cbz	r3, .L1701
 	bl	INSERT_DATA_LIST
-	b	.L1698
-.L1697:
+	b	.L1702
+.L1701:
 	bl	INSERT_FREE_LIST
-.L1698:
-	ldr	r3, .L1703+8
+.L1702:
+	ldr	r3, .L1707+8
 	movw	r5, #65535
 	movs	r4, #0
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1703+24
+	ldr	r3, .L1707+24
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1703+60
+	ldr	r3, .L1707+60
 	strh	r4, [r3, #0]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	ldr	r3, .L1703+64
-	ldr	r2, .L1703+68
+	ldr	r3, .L1707+64
+	ldr	r2, .L1707+68
 	movs	r1, #3
 	ldrh	r3, [r3, #0]
 	ldrh	r2, [r2, #0]
 	muls	r2, r1, r2
 	cmp	r3, r2, lsr #2
-	ble	.L1686
-	ldr	r3, .L1703+72
+	ble	.L1690
+	ldr	r3, .L1707+72
 	movs	r2, #20
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1703+76
+	ldr	r3, .L1707+76
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1686
-.L1699:
+	b	.L1690
+.L1703:
 	movs	r4, #0
-.L1686:
+.L1690:
 	mov	r0, r4
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1704:
+.L1708:
 	.align	2
-.L1703:
-	.word	.LANCHOR68
-	.word	.LANCHOR94
-	.word	.LANCHOR111
-	.word	.LANCHOR96
-	.word	.LANCHOR140
-	.word	.LANCHOR144
-	.word	.LANCHOR147
+.L1707:
+	.word	.LANCHOR56
+	.word	.LANCHOR82
+	.word	.LANCHOR99
+	.word	.LANCHOR84
+	.word	.LANCHOR128
+	.word	.LANCHOR132
+	.word	.LANCHOR135
 	.word	.LANCHOR226
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR101
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR89
 	.word	.LANCHOR158
 	.word	.LANCHOR7
 	.word	.LC40
-	.word	.LANCHOR145
-	.word	.LANCHOR106
+	.word	.LANCHOR133
+	.word	.LANCHOR94
 	.word	.LANCHOR201
 	.word	.LANCHOR202
 	.word	.LANCHOR173
-	.word	.LANCHOR148
-	.word	.LANCHOR88
+	.word	.LANCHOR136
+	.word	.LANCHOR76
 	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
 	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
 	.align	1
@@ -15441,43 +15482,43 @@ Ftl_gc_temp_data_write_back:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1714
+	ldr	r3, .L1718
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1714+4
-	cbz	r2, .L1706
+	ldr	r3, .L1718+4
+	cbz	r2, .L1710
 	ldr	r2, [r3, #0]
 	lsls	r2, r2, #31
-	bpl	.L1706
-	ldr	r2, .L1714+8
+	bpl	.L1710
+	ldr	r2, .L1718+8
 	ldrh	r2, [r2, #4]
 	cmp	r2, #0
-	bne	.L1711
-.L1706:
-	ldr	r4, .L1714+12
+	bne	.L1715
+.L1710:
+	ldr	r4, .L1718+12
 	movs	r2, #0
 	ldr	r1, [r3, #0]
 	mov	r3, r2
 	movs	r5, #0
-	ldr	r7, .L1714+4
+	ldr	r7, .L1718+4
 	ldr	r0, [r4, #0]
 	movs	r6, #36
 	bl	FlashProgPages
-	b	.L1708
-.L1710:
+	b	.L1712
+.L1714:
 	mul	r3, r6, r5
 	ldr	r1, [r4, #0]
 	adds	r2, r1, r3
 	ldr	r1, [r1, r3]
 	adds	r0, r1, #1
-	bne	.L1709
-	ldr	r3, .L1714+8
+	bne	.L1713
+	ldr	r3, .L1718+8
 	movs	r5, #0
-	ldr	r0, .L1714+16
+	ldr	r0, .L1718+16
 	ldrh	r4, [r3, #0]
 	ldr	r0, [r0, #0]
 	strh	r5, [r0, r4, lsl #1]	@ movhi
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L1714+20
+	ldr	r3, .L1718+20
 	ldr	r0, [r2, #4]
 	ldr	r1, [r3, #96]
 	ubfx	r0, r0, #10, #16
@@ -15486,8 +15527,8 @@ Ftl_gc_temp_data_write_back:
 	bl	FtlBbmMapBadBlock
 	bl	FtlBbmTblFlush
 	bl	FtlGcPageVarInit
-	b	.L1713
-.L1709:
+	b	.L1717
+.L1713:
 	ldr	r3, [r2, #12]
 	adds	r5, r5, #1
 	ldr	r1, [r2, #4]
@@ -15495,37 +15536,37 @@ Ftl_gc_temp_data_write_back:
 	ldr	r0, [r3, #12]
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
-.L1708:
+.L1712:
 	ldr	r1, [r7, #0]
 	cmp	r5, r1
-	bcc	.L1710
-	ldr	r3, .L1714+12
+	bcc	.L1714
+	ldr	r3, .L1718+12
 	ldr	r0, [r3, #0]
 	bl	FtlGcBufFree
-	ldr	r3, .L1714+4
+	ldr	r3, .L1718+4
 	movs	r0, #0
 	str	r0, [r3, #0]
-	ldr	r3, .L1714+8
+	ldr	r3, .L1718+8
 	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1707
+	cbnz	r3, .L1711
 	movs	r0, #1
 	bl	FtlGcFreeTempBlock
-.L1713:
+.L1717:
 	movs	r0, #1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1711:
+.L1715:
 	movs	r0, #0
-.L1707:
+.L1711:
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1715:
+.L1719:
 	.align	2
-.L1714:
+.L1718:
 	.word	.LANCHOR7
-	.word	.LANCHOR131
-	.word	.LANCHOR111
+	.word	.LANCHOR119
+	.word	.LANCHOR99
 	.word	.LANCHOR178
-	.word	.LANCHOR101
-	.word	.LANCHOR144
+	.word	.LANCHOR89
+	.word	.LANCHOR132
 	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
 	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
@@ -15538,38 +15579,38 @@ Ftl_get_new_temp_ppa:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movw	r3, #65535
-	ldr	r5, .L1719
+	ldr	r5, .L1723
 	ldrh	r2, [r5, #0]
 	cmp	r2, r3
-	beq	.L1717
+	beq	.L1721
 	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1718
-.L1717:
+	cbnz	r3, .L1722
+.L1721:
 	bl	FtlCacheWriteBack
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1719
+	ldr	r0, .L1723
 	movs	r4, #0
 	strb	r4, [r5, #8]
 	bl	allocate_data_superblock
-	ldr	r3, .L1719+4
+	ldr	r3, .L1723+4
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1719+8
+	ldr	r3, .L1723+8
 	strh	r4, [r3, #0]	@ movhi
 	bl	l2p_flush
 	mov	r0, r4
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
-.L1718:
-	ldr	r0, .L1719
+.L1722:
+	ldr	r0, .L1723
 	pop	{r3, r4, r5, lr}
 	b	get_new_active_ppa
-.L1720:
+.L1724:
 	.align	2
-.L1719:
-	.word	.LANCHOR111
-	.word	.LANCHOR145
-	.word	.LANCHOR147
+.L1723:
+	.word	.LANCHOR99
+	.word	.LANCHOR133
+	.word	.LANCHOR135
 	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
 	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
@@ -15581,31 +15622,31 @@ FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
-	ldr	r4, .L1723
-	ldr	r5, .L1723+4
+	ldr	r4, .L1727
+	ldr	r5, .L1727+4
 	ldrh	r1, [r4, #0]
 	mov	r0, r5
 	bl	FtlGcScanTempBlk
 	ldrh	r2, [r5, #2]
 	ldrh	r3, [r4, #0]
 	cmp	r2, r3
-	bcc	.L1721
-	ldr	r0, .L1723+8
+	bcc	.L1725
+	ldr	r0, .L1727+8
 	bl	FtlMapBlkWriteDumpData
 	movs	r0, #0
 	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1723+12
+	ldr	r3, .L1727+12
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1721:
+.L1725:
 	pop	{r3, r4, r5, pc}
-.L1724:
+.L1728:
 	.align	2
-.L1723:
-	.word	.LANCHOR68
-	.word	.LANCHOR111
-	.word	.LANCHOR122
-	.word	.LANCHOR140
+.L1727:
+	.word	.LANCHOR56
+	.word	.LANCHOR99
+	.word	.LANCHOR110
+	.word	.LANCHOR128
 	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
 	.section	.text.ftl_discard,"ax",%progbits
 	.align	1
@@ -15616,18 +15657,18 @@ FtlGcPageRecovery:
 ftl_discard:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1734
+	ldr	r3, .L1738
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r4, r2
 	ldr	r3, [r3, #0]
 	adds	r2, r2, r1
 	mov	r6, r1
 	cmp	r2, r3
-	bhi	.L1731
+	bhi	.L1735
 	cmp	r4, #31
-	bls	.L1732
+	bls	.L1736
 	bl	FtlCacheWriteBack
-	ldr	r3, .L1734+4
+	ldr	r3, .L1738+4
 	mov	r0, r6
 	ldrh	r7, [r3, #0]
 	mov	r1, r7
@@ -15635,7 +15676,7 @@ ftl_discard:
 	mls	r6, r0, r7, r6
 	mov	r5, r0
 	uxth	r6, r6
-	cbz	r6, .L1727
+	cbz	r6, .L1731
 	subs	r6, r7, r6
 	adds	r5, r0, #1
 	cmp	r6, r4
@@ -15643,21 +15684,21 @@ ftl_discard:
 	movcs	r6, r4
 	uxth	r6, r6
 	subs	r4, r4, r6
-.L1727:
+.L1731:
 	mov	r3, #-1
-	ldr	r8, .L1734+4
+	ldr	r8, .L1738+4
 	str	r3, [sp, #4]
-	ldr	r7, .L1734+8
-	ldr	r6, .L1734+12
-	b	.L1728
-.L1730:
+	ldr	r7, .L1738+8
+	ldr	r6, .L1738+12
+	b	.L1732
+.L1734:
 	movs	r2, #0
 	mov	r0, r5
 	mov	r1, sp
 	bl	log2phys
 	ldr	r3, [sp, #0]
 	adds	r3, r3, #1
-	beq	.L1729
+	beq	.L1733
 	ldr	r3, [r7, #0]
 	add	r1, sp, #4
 	movs	r2, #1
@@ -15672,38 +15713,38 @@ ftl_discard:
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	bl	decrement_vpc_count
-.L1729:
+.L1733:
 	ldrh	r3, [r8, #0]
 	adds	r5, r5, #1
 	subs	r4, r4, r3
-.L1728:
+.L1732:
 	ldrh	r3, [r8, #0]
 	cmp	r4, r3
-	bcs	.L1730
-	ldr	r3, .L1734+8
+	bcs	.L1734
+	ldr	r3, .L1738+8
 	mov	r4, #0
 	ldr	r2, [r3, #0]
 	cmp	r2, #32
-	bls	.L1733
+	bls	.L1737
 	str	r4, [r3, #0]
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-	b	.L1733
-.L1731:
+	b	.L1737
+.L1735:
 	mov	r0, #-1
-	b	.L1726
-.L1732:
+	b	.L1730
+.L1736:
 	movs	r0, #0
-	b	.L1726
-.L1733:
+	b	.L1730
+.L1737:
 	mov	r0, r4
-.L1726:
+.L1730:
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L1735:
+.L1739:
 	.align	2
-.L1734:
-	.word	.LANCHOR84
-	.word	.LANCHOR71
+.L1738:
+	.word	.LANCHOR72
+	.word	.LANCHOR59
 	.word	.LANCHOR227
 	.word	.LANCHOR160
 	.size	ftl_discard, .-ftl_discard
@@ -15722,9 +15763,9 @@ FtlRecoverySuperblock:
 	cmp	r2, r3
 	sub	sp, sp, #64
 	mov	r4, r0
-	beq	.L1737
+	beq	.L1741
 	ldrh	r5, [r0, #2]
-	ldr	r2, .L1829
+	ldr	r2, .L1833
 	str	r5, [sp, #20]
 	ldrb	r5, [r0, #6]	@ zero_extendqisi2
 	ldrh	r2, [r2, #0]
@@ -15732,88 +15773,88 @@ FtlRecoverySuperblock:
 	ldr	r5, [sp, #20]
 	cmp	r2, r5
 	mov	r5, #0
-	bne	.L1738
+	bne	.L1742
 	mov	r3, r5	@ movhi
 	strh	r5, [r0, #4]	@ movhi
-	b	.L1826
-.L1738:
+	b	.L1830
+.L1742:
 	ldrh	r0, [r0, #16]
-	b	.L1739
-.L1740:
+	b	.L1743
+.L1744:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	add	r2, r5, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.L1739:
+.L1743:
 	cmp	r0, r3
-	beq	.L1740
+	beq	.L1744
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L1741
+	bne	.L1745
 	bl	FtlGetLastWrittenPage
 	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1742
-	ldr	r3, .L1829+4
+	beq	.L1746
+	ldr	r3, .L1833+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1821
-	ldr	r3, .L1829+8
+	cbnz	r3, .L1825
+	ldr	r3, .L1833+8
 	ldrh	r7, [r3, r0, lsl #1]
-	b	.L1811
-.L1741:
+	b	.L1815
+.L1745:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
 	adds	r3, r0, #1
 	mov	r6, r0
-	beq	.L1742
-.L1821:
+	beq	.L1746
+.L1825:
 	mov	r7, r6
-.L1811:
-	ldr	r3, .L1829+12
+.L1815:
+	ldr	r3, .L1833+12
 	movs	r5, #0
 	str	r4, [sp, #44]
 	mov	r2, r4
 	ldrh	fp, [r3, #0]
-	ldr	r3, .L1829+16
+	ldr	r3, .L1833+16
 	ldr	sl, [r3, #0]
-	ldr	r3, .L1829+20
+	ldr	r3, .L1833+20
 	ldr	r8, [r3, #0]
-	ldr	r3, .L1829+24
+	ldr	r3, .L1833+24
 	ldrh	ip, [r3, #0]
 	mov	r3, r5
-	b	.L1744
-.L1742:
+	b	.L1748
+.L1746:
 	ldr	r3, [sp, #20]
-	cbz	r3, .L1745
-	ldr	r1, .L1829+28
+	cbz	r3, .L1749
+	ldr	r1, .L1833+28
 	movw	r2, #1894
-	ldr	r0, .L1829+32
+	ldr	r0, .L1833+32
 	bl	printf
-	ldr	r0, .L1829+36
-	ldr	r1, .L1829+40
+	ldr	r0, .L1833+36
+	ldr	r1, .L1833+40
 	bl	printf
-.L1745:
+.L1749:
 	ldr	r3, [sp, #28]
-	cbz	r3, .L1746
+	cbz	r3, .L1750
 	cmp	r3, r5
-	beq	.L1746
-	ldr	r1, .L1829+28
+	beq	.L1750
+	ldr	r1, .L1833+28
 	movw	r2, #1895
-	ldr	r0, .L1829+32
+	ldr	r0, .L1833+32
 	bl	printf
-	ldr	r0, .L1829+36
-	ldr	r1, .L1829+40
+	ldr	r0, .L1833+36
+	ldr	r1, .L1833+40
 	bl	printf
-.L1746:
+.L1750:
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
-	b	.L1737
-.L1748:
+	b	.L1741
+.L1752:
 	ldrh	r0, [r2, #16]
 	movw	lr, #65535
 	cmp	r0, lr
-	beq	.L1747
+	beq	.L1751
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
 	mla	r1, lr, r5, sl
@@ -15826,26 +15867,26 @@ FtlRecoverySuperblock:
 	bic	r0, r0, #3
 	add	r0, r8, r0
 	str	r0, [r1, #12]
-.L1747:
+.L1751:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1744:
+.L1748:
 	cmp	r3, fp
-	bne	.L1748
+	bne	.L1752
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1813
-	ldr	r3, .L1829+4
+	bne	.L1817
+	ldr	r3, .L1833+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-	b	.L1822
-.L1813:
+	b	.L1826
+.L1817:
 	movs	r3, #0
-.L1822:
-	ldr	r8, .L1829+16
+.L1826:
+	ldr	r8, .L1833+16
 	mov	r1, r5
 	str	r3, [sp, #24]
 	mov	fp, #0
@@ -15853,109 +15894,109 @@ FtlRecoverySuperblock:
 	mov	sl, fp
 	ldr	r0, [r8, #0]
 	bl	FlashReadPages
-	ldr	r3, .L1829+44
+	ldr	r3, .L1833+44
 	movw	ip, #65535
 	str	ip, [sp, #8]
 	ldr	r2, [r3, #0]
 	str	r2, [sp, #12]
 	uxth	r2, r7
 	str	r2, [sp, #16]
-	b	.L1750
-.L1755:
-	ldr	r3, .L1829+16
+	b	.L1754
+.L1759:
+	ldr	r3, .L1833+16
 	ldr	r2, [r3, #0]
 	add	r3, r2, fp
 	ldr	r2, [r2, fp]
-	cbnz	r2, .L1751
+	cbnz	r2, .L1755
 	ldr	r3, [r3, #12]
 	ldr	r8, [r3, #4]
 	cmp	r8, #-1
-	beq	.L1752
-	ldr	r2, .L1829+44
+	beq	.L1756
+	ldr	r2, .L1833+44
 	mov	r0, r8
 	ldr	r1, [r2, #0]
 	str	r3, [sp, #0]
 	bl	ftl_cmp_data_ver
 	ldr	r3, [sp, #0]
-	cbz	r0, .L1752
-	ldr	r0, .L1829+44
+	cbz	r0, .L1756
+	ldr	r0, .L1833+44
 	add	r2, r8, #1
 	str	r2, [r0, #0]
-.L1752:
+.L1756:
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	bne	.L1753
-	ldr	r3, .L1829+16
+	bne	.L1757
+	ldr	r3, .L1833+16
 	movs	r2, #36
 	uxth	r6, r6
 	ldr	r3, [r3, #0]
 	mla	r3, r2, sl, r3
-	b	.L1823
-.L1751:
+	b	.L1827
+.L1755:
 	ldr	r1, [r3, #4]
-	ldr	r0, .L1829+48
+	ldr	r0, .L1833+48
 	bl	printf
 	ldr	r2, [sp, #16]
 	ldrh	r3, [r4, #0]
-	ldr	r0, .L1829+52
+	ldr	r0, .L1833+52
 	str	r2, [sp, #8]
 	strh	r3, [r0, #0]	@ movhi
-.L1753:
+.L1757:
 	add	sl, sl, #1
 	add	fp, fp, #36
 	uxth	sl, sl
-.L1750:
+.L1754:
 	cmp	sl, r5
-	bne	.L1755
-	ldr	r3, .L1829+16
+	bne	.L1759
+	ldr	r3, .L1833+16
 	adds	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r3, #0]
-.L1823:
+.L1827:
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
 	str	r0, [sp, #16]
-	bne	.L1756
-	ldr	r2, .L1829+4
+	bne	.L1760
+	ldr	r2, .L1833+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1756
-	ldr	r2, .L1829+8
+	cbnz	r2, .L1760
+	ldr	r2, .L1833+8
 	ldrh	r6, [r2, r6, lsl #1]
-.L1756:
-	ldr	r2, .L1829
+.L1760:
+	ldr	r2, .L1833
 	ldrh	r2, [r2, #0]
 	cmp	r2, r6
-	bne	.L1757
+	bne	.L1761
 	movs	r2, #0
 	strh	r6, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	strh	r2, [r4, #4]	@ movhi
-.L1757:
+.L1761:
 	ldr	r5, [sp, #20]
 	cmp	r6, r5
-	bne	.L1758
+	bne	.L1762
 	ldr	r8, [sp, #16]
 	ldr	r5, [sp, #28]
 	cmp	r8, r5
-	bne	.L1758
+	bne	.L1762
 	mov	r0, r4
 	mov	r1, r6
 	mov	r2, r8
-	b	.L1827
-.L1758:
+	b	.L1831
+.L1762:
 	ldr	r2, [sp, #12]
 	ldr	r8, [sp, #8]
 	subs	r5, r2, #1
 	movw	r2, #65535
 	cmp	r8, r2
-	bne	.L1759
+	bne	.L1763
 	cmp	r3, #0
-	bne	.L1760
-.L1759:
-	ldr	r2, .L1829+56
+	bne	.L1764
+.L1763:
+	ldr	r2, .L1833+56
 	uxth	r3, r7
 	ldr	r0, [sp, #20]
 	ldr	r1, [r2, #0]
@@ -15966,24 +16007,24 @@ FtlRecoverySuperblock:
 	str	r2, [sp, #8]
 	adds	r2, r0, #7
 	cmp	r3, r2
-	ble	.L1814
+	ble	.L1818
 	subs	r7, r3, #7
 	uxth	r7, r7
-	b	.L1762
-.L1814:
+	b	.L1766
+.L1818:
 	ldr	r7, [sp, #20]
-.L1762:
+.L1766:
 	mov	fp, #-1
 	mov	r8, r3
 	mov	sl, fp
 	mov	r3, r6
 	mov	r6, r5
-	b	.L1763
-.L1765:
+	b	.L1767
+.L1769:
 	ldrh	r0, [r1, #16]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1764
+	beq	.L1768
 	ldr	r3, [sp, #12]
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
@@ -15991,22 +16032,22 @@ FtlRecoverySuperblock:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r0, [ip, #4]
-.L1764:
+.L1768:
 	adds	r2, r2, #1
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1776:
+.L1780:
 	ldr	r0, [sp, #36]
 	cmp	r2, r0
-	bne	.L1765
-	ldr	ip, .L1829+16
+	bne	.L1769
+	ldr	ip, .L1833+16
 	mov	r1, r5
 	ldr	r3, [sp, #32]
 	ldr	r2, [sp, #24]
 	ldr	r0, [ip, #0]
 	stmia	sp, {r3, ip}
 	bl	FlashReadPages
-	ldr	r2, .L1829+4
+	ldr	r2, .L1833+4
 	movs	r0, #0
 	ldr	ip, [sp, #4]
 	ldr	r3, [sp, #0]
@@ -16015,117 +16056,117 @@ FtlRecoverySuperblock:
 	mov	ip, r3
 	str	r5, [sp, #32]
 	str	r2, [sp, #12]
-	ldr	r2, .L1829+56
+	ldr	r2, .L1833+56
 	ldr	r2, [r2, #0]
-	b	.L1766
-.L1830:
+	b	.L1770
+.L1834:
 	.align	2
-.L1829:
-	.word	.LANCHOR68
+.L1833:
+	.word	.LANCHOR56
 	.word	.LANCHOR7
 	.word	.LANCHOR8
-	.word	.LANCHOR53
+	.word	.LANCHOR41
 	.word	.LANCHOR177
-	.word	.LANCHOR133
-	.word	.LANCHOR74
+	.word	.LANCHOR121
+	.word	.LANCHOR62
 	.word	.LANCHOR228
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR157
 	.word	.LC41
 	.word	.LANCHOR229
-	.word	.LANCHOR141
-.L1774:
+	.word	.LANCHOR129
+.L1778:
 	ldr	r3, [r1, #0]
-	cbnz	r3, .L1767
+	cbnz	r3, .L1771
 	ldr	r3, [r1, #12]
 	movw	r5, #65535
 	ldrh	lr, [r3, #0]
 	cmp	lr, r5
-	beq	.L1816
+	beq	.L1820
 	ldr	r3, [r3, #4]
 	adds	r5, r3, #1
-	beq	.L1816
+	beq	.L1820
 	cmp	fp, #-1
-	bne	.L1768
-	ldr	r5, .L1831
+	bne	.L1772
+	ldr	r5, .L1835
 	ldrh	lr, [r5, r7, lsl #1]
 	movw	r5, #65535
 	cmp	lr, r5
-	bne	.L1769
+	bne	.L1773
 	ldr	r5, [sp, #12]
 	cmp	r5, #0
-	beq	.L1768
-.L1769:
+	beq	.L1772
+.L1773:
 	cmp	r2, r6
 	ite	ne
 	movne	fp, r2
 	moveq	fp, #-1
-	b	.L1768
-.L1767:
-	ldr	r1, .L1831+4
+	b	.L1772
+.L1771:
+	ldr	r1, .L1835+4
 	mov	r5, r6
 	ldrh	r0, [r4, #0]
 	mov	r6, ip
-	ldr	r3, .L1831+8
+	ldr	r3, .L1835+8
 	strh	r0, [r1, #0]	@ movhi
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	str	r2, [r3, #0]
 	cmp	r1, #0
-	bne	.L1760
-	ldr	r1, .L1831
+	bne	.L1764
+	ldr	r1, .L1835
 	ldrh	r0, [r1, r7, lsl #1]
 	movw	r1, #65535
 	cmp	r0, r1
-	bne	.L1770
+	bne	.L1774
 	cmp	fp, #-1
-	beq	.L1771
+	beq	.L1775
 	str	fp, [r3, #0]
-	b	.L1760
-.L1771:
+	b	.L1764
+.L1775:
 	ldr	r0, [sp, #8]
 	cmp	r0, r5
-	beq	.L1828
+	beq	.L1832
 	str	r0, [r3, #0]
-	b	.L1760
-.L1770:
+	b	.L1764
+.L1774:
 	cmp	sl, r5
-	beq	.L1773
+	beq	.L1777
 	cmp	sl, #-1
-	beq	.L1760
+	beq	.L1764
 	str	sl, [r3, #0]
-	b	.L1760
-.L1773:
+	b	.L1764
+.L1777:
 	cmp	r2, r5
-	beq	.L1760
-.L1828:
+	beq	.L1764
+.L1832:
 	subs	r2, r2, #1
-	b	.L1824
-.L1816:
+	b	.L1828
+.L1820:
 	mov	r3, r2
 	mov	r2, sl
-.L1768:
+.L1772:
 	adds	r0, r0, #1
 	mov	sl, r2
 	adds	r1, r1, #36
 	mov	r2, r3
 	uxth	r0, r0
-.L1766:
+.L1770:
 	ldr	r3, [sp, #32]
 	cmp	r0, r3
-	bne	.L1774
+	bne	.L1778
 	adds	r7, r7, #1
-	ldr	r1, .L1831+8
+	ldr	r1, .L1835+8
 	mov	r3, ip
 	uxth	r7, r7
 	str	r2, [r1, #0]
-.L1763:
+.L1767:
 	cmp	r7, r8
-	bhi	.L1775
-	ldr	r5, .L1831+12
+	bhi	.L1779
+	ldr	r5, .L1835+12
 	mov	r1, r4
-	ldr	r2, .L1831+16
+	ldr	r2, .L1835+16
 	str	r3, [sp, #32]
 	ldrh	lr, [r5, #0]
 	movs	r5, #0
@@ -16133,59 +16174,59 @@ FtlRecoverySuperblock:
 	str	lr, [sp, #36]
 	str	r2, [sp, #12]
 	mov	r2, r5
-	b	.L1776
-.L1775:
+	b	.L1780
+.L1779:
 	mov	r5, r6
 	mov	r6, r3
-	ldr	r3, .L1831+8
+	ldr	r3, .L1835+8
 	mov	r2, #-1
-.L1824:
+.L1828:
 	str	r2, [r3, #0]
-.L1760:
-	ldr	r3, .L1831+20
+.L1764:
+	ldr	r3, .L1835+20
 	movs	r2, #1
-	ldr	r0, .L1831+24
-	ldr	r7, .L1831+16
+	ldr	r0, .L1835+24
+	ldr	r7, .L1835+16
 	strh	r2, [r3, #0]	@ movhi
 	bl	FtlMapBlkWriteDumpData
 	ldr	sl, [sp, #20]
 	str	r6, [sp, #12]
-.L1777:
-	ldr	r3, .L1831+28
+.L1781:
+	ldr	r3, .L1835+28
 	movs	r6, #0
-	ldr	r0, .L1831+12
+	ldr	r0, .L1835+12
 	mov	r2, r4
 	ldr	lr, [r7, #0]
 	ldrb	fp, [r3, #0]	@ zero_extendqisi2
 	mov	r3, r6
 	ldrh	ip, [r0, #0]
-	b	.L1778
-.L1781:
+	b	.L1782
+.L1785:
 	ldrh	r0, [r2, #16]
 	movw	r1, #65535
 	cmp	r0, r1
-	beq	.L1779
+	beq	.L1783
 	mov	r8, #36
 	orr	r0, sl, r0, lsl #10
 	mla	r1, r8, r6, lr
 	str	r0, [r1, #4]
 	ldrb	r8, [r4, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L1780
+	bne	.L1784
 	cmp	fp, #0
-	beq	.L1780
+	beq	.L1784
 	orr	r0, r0, #-2147483648
 	str	r0, [r1, #4]
-.L1780:
+.L1784:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1779:
+.L1783:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1778:
+.L1782:
 	cmp	r3, ip
-	bne	.L1781
+	bne	.L1785
 	ldr	r0, [r7, #0]
 	mov	r1, r6
 	ldr	r2, [sp, #24]
@@ -16195,8 +16236,8 @@ FtlRecoverySuperblock:
 	str	sl, [sp, #32]
 	muls	r3, r6, r3
 	str	r3, [sp, #40]
-	b	.L1782
-.L1806:
+	b	.L1786
+.L1810:
 	ldr	r3, [r7, #0]
 	add	sl, r3, r8
 	ldr	r6, [sl, #4]
@@ -16206,40 +16247,40 @@ FtlRecoverySuperblock:
 	ldr	ip, [sp, #32]
 	ldr	r3, [sp, #20]
 	cmp	ip, r3
-	bcc	.L1783
-	bne	.L1784
+	bcc	.L1787
+	bne	.L1788
 	ldr	r3, [sp, #28]
 	cmp	r0, r3
-	bcc	.L1783
-.L1784:
+	bcc	.L1787
+.L1788:
 	ldr	ip, [sp, #32]
 	ldr	r3, [sp, #12]
 	cmp	ip, r3
-	bne	.L1785
+	bne	.L1789
 	ldr	ip, [sp, #16]
 	cmp	r0, ip
-	beq	.L1820
-.L1785:
+	beq	.L1824
+.L1789:
 	ldr	r3, [sl, #0]
 	adds	r3, r3, #1
-	beq	.L1787
+	beq	.L1791
 	ldr	r6, [sl, #12]
 	movw	r3, #61589
 	ldrh	r2, [r6, #0]
 	cmp	r2, r3
-	bne	.L1794
-.L1788:
+	bne	.L1798
+.L1792:
 	ldr	r5, [r6, #4]
 	adds	r3, r5, #1
-	beq	.L1789
-	ldr	sl, .L1831+32
+	beq	.L1793
+	ldr	sl, .L1835+32
 	mov	r0, r5
 	ldr	r1, [sl, #0]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1789
+	cbz	r0, .L1793
 	adds	r3, r5, #1
 	str	r3, [sl, #0]
-.L1789:
+.L1793:
 	ldr	sl, [r6, #8]
 	add	r1, sp, #56
 	ldr	r3, [r6, #12]
@@ -16247,17 +16288,17 @@ FtlRecoverySuperblock:
 	mov	r0, sl
 	str	r3, [sp, #52]
 	bl	log2phys
-	ldr	r0, .L1831+8
+	ldr	r0, .L1835+8
 	ldr	r1, [r0, #0]
 	adds	r0, r1, #1
-	beq	.L1790
+	beq	.L1794
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1790
+	beq	.L1794
 	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	beq	.L1791
+	beq	.L1795
 	ldr	r0, [r7, #0]
 	movs	r2, #0
 	add	r0, r0, r8
@@ -16273,40 +16314,40 @@ FtlRecoverySuperblock:
 	add	fp, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L1792
-	b	.L1793
-.L1791:
+	bne	.L1796
+	b	.L1797
+.L1795:
 	ldr	r3, [sp, #60]
 	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	bne	.L1794
+	bne	.L1798
 	mov	r0, sl
 	add	r1, sp, #52
 	movs	r2, #1
 	bl	log2phys
-.L1794:
+.L1798:
 	ldrh	r0, [r4, #0]
-	b	.L1825
-.L1792:
+	b	.L1829
+.L1796:
 	ldr	r3, [sp, #8]
 	ldr	r6, [r3, #8]
 	cmp	r6, sl
-	bne	.L1793
-	ldr	r1, .L1831+8
+	bne	.L1797
+	ldr	r1, .L1835+8
 	ldr	r0, [r1, #0]
 	ldr	r1, [sp, #36]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1793
+	cbz	r0, .L1797
 	ldr	r3, [sp, #56]
 	ldr	r2, [sp, #60]
 	cmp	r3, r2
-	beq	.L1798
-.L1795:
+	beq	.L1802
+.L1799:
 	ldr	r2, [sp, #52]
 	cmp	r3, r2
-	beq	.L1793
+	beq	.L1797
 	adds	r2, r3, #1
-	beq	.L1796
+	beq	.L1800
 	ldr	r2, [fp, #12]
 	mov	r0, fp
 	str	r3, [fp, #4]
@@ -16314,77 +16355,77 @@ FtlRecoverySuperblock:
 	str	r2, [sp, #8]
 	movs	r2, #0
 	bl	FlashReadPages
-	b	.L1797
-.L1796:
+	b	.L1801
+.L1800:
 	str	r3, [fp, #0]
-.L1797:
+.L1801:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	beq	.L1798
+	beq	.L1802
 	ldr	r3, [sp, #8]
-	ldr	r1, .L1831+8
+	ldr	r1, .L1835+8
 	ldr	sl, [r3, #4]
 	ldr	r0, [r1, #0]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1798
+	cbz	r0, .L1802
 	ldr	r0, [sp, #36]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1793
-.L1798:
+	cbz	r0, .L1797
+.L1802:
 	mov	r0, r6
 	ldr	r1, [sp, #52]
 	bl	FtlReUsePrevPpa
-.L1793:
+.L1797:
 	ldrh	r0, [r4, #0]
 	mov	r3, #-1
 	str	r3, [sp, #52]
 	bl	decrement_vpc_count
-	b	.L1800
-.L1832:
+	b	.L1804
+.L1836:
 	.align	2
-.L1831:
+.L1835:
 	.word	.LANCHOR9
 	.word	.LANCHOR229
-	.word	.LANCHOR141
-	.word	.LANCHOR53
+	.word	.LANCHOR129
+	.word	.LANCHOR41
 	.word	.LANCHOR177
 	.word	.LANCHOR230
-	.word	.LANCHOR122
+	.word	.LANCHOR110
 	.word	.LANCHOR7
 	.word	.LANCHOR157
-.L1790:
+.L1794:
 	ldr	r3, [sp, #60]
 	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	beq	.L1800
+	beq	.L1804
 	movs	r2, #1
 	mov	r0, sl
 	add	r1, sp, #60
 	bl	log2phys
 	ldr	fp, [sp, #56]
 	cmp	fp, #-1
-	beq	.L1800
+	beq	.L1804
 	ldr	r3, [sp, #52]
 	cmp	fp, r3
-	beq	.L1800
+	beq	.L1804
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1833
+	ldr	r3, .L1837
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1801
-	ldr	r3, .L1833+4
+	beq	.L1805
+	ldr	r3, .L1837+4
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1801
-	ldr	r3, .L1833+8
+	beq	.L1805
+	ldr	r3, .L1837+8
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1800
-.L1801:
+	bne	.L1804
+.L1805:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	movs	r2, #0
@@ -16395,129 +16436,129 @@ FtlRecoverySuperblock:
 	ldr	r1, [r6, #4]
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	beq	.L1800
+	beq	.L1804
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
-	cbnz	r0, .L1800
+	cbnz	r0, .L1804
 	mov	r0, sl
 	add	r1, sp, #56
 	movs	r2, #1
 	bl	log2phys
-.L1800:
+.L1804:
 	ldr	r0, [sp, #52]
 	adds	r3, r0, #1
-	beq	.L1783
+	beq	.L1787
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1833+12
+	ldr	r3, .L1837+12
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
 	mov	r6, r0
-	bhi	.L1802
-	ldr	r1, .L1833+16
+	bhi	.L1806
+	ldr	r1, .L1837+16
 	movw	r2, #2177
-	ldr	r0, .L1833+20
+	ldr	r0, .L1837+20
 	bl	printf
-	ldr	r0, .L1833+24
-	ldr	r1, .L1833+28
+	ldr	r0, .L1837+24
+	ldr	r1, .L1837+28
 	bl	printf
-.L1802:
-	ldr	r3, .L1833+32
+.L1806:
+	ldr	r3, .L1837+32
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L1803
+	cbz	r3, .L1807
 	mov	r0, r6
-.L1825:
+.L1829:
 	bl	decrement_vpc_count
-	b	.L1783
-.L1803:
+	b	.L1787
+.L1807:
 	mov	r1, r6
-	ldr	r0, .L1833+36
+	ldr	r0, .L1837+36
 	bl	printf
-	b	.L1783
-.L1787:
+	b	.L1787
+.L1791:
 	ldrh	r3, [r4, #0]
 	mov	r1, r6
-	ldr	r2, .L1833+40
-	ldr	r0, .L1833+44
+	ldr	r2, .L1837+40
+	ldr	r0, .L1837+44
 	strh	r3, [r2, #0]	@ movhi
 	mov	r2, r5
 	bl	printf
-	ldr	r0, .L1833+48
+	ldr	r0, .L1837+48
 	ldr	r3, [r0, #0]
 	cmp	r3, #31
-	bhi	.L1804
+	bhi	.L1808
 	ldr	r2, [sp, #60]
-	ldr	r1, .L1833+52
+	ldr	r1, .L1837+52
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	str	r3, [r0, #0]
-.L1804:
+.L1808:
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-	ldr	r2, .L1833+56
+	ldr	r2, .L1837+56
 	ldr	r3, [r2, #0]
 	adds	r1, r3, #1
-	bne	.L1805
+	bne	.L1809
 	str	r5, [r2, #0]
-	b	.L1783
-.L1805:
+	b	.L1787
+.L1809:
 	cmp	r3, r5
 	itt	hi
-	ldrhi	r3, .L1833+56
+	ldrhi	r3, .L1837+56
 	strhi	r5, [r3, #0]
-.L1783:
+.L1787:
 	add	r8, r8, #36
-.L1782:
+.L1786:
 	ldr	ip, [sp, #40]
 	cmp	r8, ip
-	bne	.L1806
+	bne	.L1810
 	ldr	sl, [sp, #32]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	add	sl, sl, #1
 	cmp	r3, #1
 	uxth	sl, sl
-	bne	.L1807
-	ldr	r3, .L1833+60
+	bne	.L1811
+	ldr	r3, .L1837+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1807
-	ldr	r3, .L1833+64
+	cbz	r3, .L1811
+	ldr	r3, .L1837+64
 	ldrh	r3, [r3, #0]
 	cmp	r3, sl
-	bne	.L1807
+	bne	.L1811
 	ldr	r3, [sp, #12]
 	cmp	r3, sl
-	beq	.L1820
-.L1807:
-	ldr	r3, .L1833+68
+	beq	.L1824
+.L1811:
+	ldr	r3, .L1837+68
 	ldrh	r3, [r3, #0]
 	cmp	sl, r3
-	bne	.L1777
-	ldr	r2, .L1833+72
+	bne	.L1781
+	ldr	r2, .L1837+72
 	movs	r3, #0
 	strh	sl, [r4, #2]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldrh	r1, [r2, #0]
 	movw	r2, #65535
 	ldr	r0, [sp, #44]
-	b	.L1808
-.L1810:
+	b	.L1812
+.L1814:
 	adds	r0, r0, #2
 	ldrh	r5, [r0, #14]
 	cmp	r5, r2
-	beq	.L1809
-.L1826:
+	beq	.L1813
+.L1830:
 	strb	r3, [r4, #6]
-	b	.L1737
-.L1809:
+	b	.L1741
+.L1813:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1808:
+.L1812:
 	cmp	r3, r1
-	bne	.L1810
-	b	.L1737
-.L1820:
-.L1786:
+	bne	.L1814
+	b	.L1741
+.L1824:
+.L1790:
 	ldr	r6, [sp, #12]
 	mov	r0, r4
 	ldr	r5, [sp, #16]
@@ -16525,34 +16566,34 @@ FtlRecoverySuperblock:
 	mov	r2, r5
 	strh	r6, [r4, #2]	@ movhi
 	strb	r5, [r4, #6]
-.L1827:
+.L1831:
 	bl	ftl_sb_update_avl_pages
-.L1737:
+.L1741:
 	movs	r0, #0
-	add	sp, sp, #64
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1834:
-	.align	2
-.L1833:
-	.word	.LANCHOR109
-	.word	.LANCHOR110
-	.word	.LANCHOR111
-	.word	.LANCHOR55
+	add	sp, sp, #64
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1838:
+	.align	2
+.L1837:
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR43
 	.word	.LANCHOR228
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR101
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR89
 	.word	.LC42
 	.word	.LANCHOR229
 	.word	.LC43
 	.word	.LANCHOR231
 	.word	.LANCHOR232
-	.word	.LANCHOR141
+	.word	.LANCHOR129
 	.word	.LANCHOR7
-	.word	.LANCHOR69
-	.word	.LANCHOR68
-	.word	.LANCHOR53
+	.word	.LANCHOR57
+	.word	.LANCHOR56
+	.word	.LANCHOR41
 	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
 	.section	.text.FtlPowerLostRecovery,"ax",%progbits
 	.align	1
@@ -16565,13 +16606,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L1836
-	ldr	r5, .L1836+4
+	ldr	r3, .L1840
+	ldr	r5, .L1840+4
 	str	r4, [r3, #0]
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1836+8
+	ldr	r5, .L1840+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -16582,12 +16623,12 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1837:
+.L1841:
 	.align	2
-.L1836:
+.L1840:
 	.word	.LANCHOR231
-	.word	.LANCHOR109
-	.word	.LANCHOR110
+	.word	.LANCHOR97
+	.word	.LANCHOR98
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -16598,25 +16639,25 @@ FtlPowerLostRecovery:
 FtlSysBlkInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1848
+	ldr	r3, .L1852
 	movs	r2, #0
 	push	{r4, r5, r6, lr}
 	movw	r4, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1848+4
+	ldr	r3, .L1852+4
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1848+8
+	ldr	r3, .L1852+8
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1848+12
+	ldr	r3, .L1852+12
 	ldrh	r3, [r3, #0]
 	cmp	r3, r4
-	beq	.L1844
+	beq	.L1848
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L1845
+	bne	.L1849
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -16626,39 +16667,39 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1848+16
+	ldr	r3, .L1852+16
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1848+20
+	ldr	r3, .L1852+20
 	ldr	r2, [r3, #0]
 	mov	r3, r4
-	b	.L1840
-.L1842:
+	b	.L1844
+.L1846:
 	adds	r0, r2, r4
 	adds	r4, r4, #12
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L1841
+	blt	.L1845
 	adds	r3, r3, #1
-.L1840:
+.L1844:
 	cmp	r3, r1
-	blt	.L1842
-	b	.L1847
-.L1841:
-	ldr	r5, .L1848+24
+	blt	.L1846
+	b	.L1851
+.L1845:
+	ldr	r5, .L1852+24
 	movs	r6, #0
-	ldr	r4, .L1848+28
+	ldr	r4, .L1852+28
 	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
 	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r3, .L1848+32
+	ldr	r3, .L1852+32
 	ldrh	r2, [r5, #0]
 	ldrh	r1, [r5, #4]
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r2, .L1848+36
+	ldr	r2, .L1852+36
 	ldrh	r0, [r4, #4]
 	strb	r6, [r5, #6]
 	ldrh	r1, [r2, #0]
@@ -16669,14 +16710,14 @@ FtlSysBlkInit:
 	subs	r0, r5, r0
 	strh	r0, [r3, r1, lsl #1]	@ movhi
 	ldrh	r3, [r2, #0]
-	ldr	r0, .L1848+40
+	ldr	r0, .L1852+40
 	strb	r6, [r4, #6]
 	strh	r3, [r4, #2]	@ movhi
 	strh	r6, [r4, #4]	@ movhi
 	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L1848+44
+	ldr	r0, .L1852+44
 	bl	FtlMapBlkWriteDumpData
-	ldr	r3, .L1848+48
+	ldr	r3, .L1852+48
 	ldrh	r2, [r3, #30]
 	adds	r2, r2, #1
 	strh	r2, [r3, #30]	@ movhi
@@ -16685,34 +16726,34 @@ FtlSysBlkInit:
 	bl	FtlVpcTblFlush
 	mov	r0, r6
 	pop	{r4, r5, r6, pc}
-.L1844:
+.L1848:
 	mov	r0, #-1
 	pop	{r4, r5, r6, pc}
-.L1845:
+.L1849:
 	mov	r0, #-1
 	pop	{r4, r5, r6, pc}
-.L1847:
-	ldr	r3, .L1848
+.L1851:
+	ldr	r3, .L1852
 	ldrh	r0, [r3, #0]
 	cmp	r0, #0
-	bne	.L1841
+	bne	.L1845
 	pop	{r4, r5, r6, pc}
-.L1849:
+.L1853:
 	.align	2
-.L1848:
+.L1852:
 	.word	.LANCHOR230
 	.word	.LANCHOR229
-	.word	.LANCHOR54
+	.word	.LANCHOR42
 	.word	.LANCHOR196
-	.word	.LANCHOR83
-	.word	.LANCHOR114
-	.word	.LANCHOR109
+	.word	.LANCHOR71
+	.word	.LANCHOR102
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR89
+	.word	.LANCHOR56
 	.word	.LANCHOR110
-	.word	.LANCHOR101
-	.word	.LANCHOR68
-	.word	.LANCHOR122
 	.word	.LANCHOR215
-	.word	.LANCHOR143
+	.word	.LANCHOR131
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
@@ -16723,205 +16764,205 @@ FtlSysBlkInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1912
+	ldr	r3, .L1916
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #32
 	ldr	r2, [r3, #0]
 	cmp	r2, #0
-	bne	.L1901
-	ldr	r3, .L1912+4
+	bne	.L1905
+	ldr	r3, .L1916+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1902
-	ldr	r2, .L1912+8
+	bne	.L1906
+	ldr	r2, .L1916+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, #47
-	bls	.L1903
-	ldr	r3, .L1912+12
+	bls	.L1907
+	ldr	r3, .L1916+12
 	movw	r5, #65535
 	ldrh	r4, [r3, #0]
 	cmp	r4, r5
-	beq	.L1852
-	ldr	r1, .L1912+16
+	beq	.L1856
+	ldr	r1, .L1916+16
 	ldrh	r2, [r1, #0]
 	cmp	r2, r5
 	itt	eq
 	strheq	r4, [r1, #0]	@ movhi
 	strheq	r2, [r3, #0]	@ movhi
-.L1852:
+.L1856:
 	cmp	r0, #0
-	bne	.L1904
-	ldr	r3, .L1912+20
+	bne	.L1908
+	ldr	r3, .L1916+20
 	ldrh	r3, [r3, #0]
 	cmp	r3, #24
-	bhi	.L1905
-	ldr	r2, .L1912+24
+	bhi	.L1909
+	ldr	r2, .L1916+24
 	cmp	r3, #16
 	ldrh	r4, [r2, #0]
-	bls	.L1855
+	bls	.L1859
 	lsrs	r4, r4, #5
-	b	.L1854
-.L1855:
+	b	.L1858
+.L1859:
 	cmp	r3, #12
-	bls	.L1856
+	bls	.L1860
 	lsrs	r4, r4, #4
-	b	.L1854
-.L1856:
+	b	.L1858
+.L1860:
 	cmp	r3, #8
-	bls	.L1854
+	bls	.L1858
 	lsrs	r4, r4, #2
-	b	.L1854
-.L1905:
+	b	.L1858
+.L1909:
 	movs	r4, #1
-.L1854:
-	ldr	r2, .L1912+28
+.L1858:
+	ldr	r2, .L1916+28
 	ldrh	r1, [r2, #0]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1858
-	ldr	r3, .L1912+32
+	bcs	.L1862
+	ldr	r3, .L1916+32
 	movw	r0, #65535
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1859
-	ldr	r0, .L1912+16
+	bne	.L1863
+	ldr	r0, .L1916+16
 	ldrh	r0, [r0, #0]
 	cmp	r0, r3
-	bne	.L1859
-	ldr	r3, .L1912+36
+	bne	.L1863
+	ldr	r3, .L1916+36
 	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1860
-	ldr	r3, .L1912+40
+	cbnz	r0, .L1864
+	ldr	r3, .L1916+40
 	movs	r1, #3
 	ldr	r3, [r3, #0]
 	muls	r1, r3, r1
-	ldr	r3, .L1912+44
+	ldr	r3, .L1916+44
 	ldr	r3, [r3, #0]
 	cmp	r3, r1, lsr #2
-	bcs	.L1861
-.L1860:
-	ldr	r3, .L1912+48
+	bcs	.L1865
+.L1864:
+	ldr	r3, .L1916+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r2, r3, r2
-	ldr	r3, .L1912+28
+	ldr	r3, .L1916+28
 	asrs	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1862
-.L1861:
+	b	.L1866
+.L1865:
 	movs	r3, #18
 	strh	r3, [r2, #0]	@ movhi
-.L1862:
-	ldr	r3, .L1912+52
+.L1866:
+	ldr	r3, .L1916+52
 	movs	r2, #0
 	str	r2, [r3, #0]
-	b	.L1851
-.L1859:
-	ldr	r3, .L1912+48
+	b	.L1855
+.L1863:
+	ldr	r3, .L1916+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r3, r2, r3
 	asrs	r3, r3, #2
 	strh	r3, [r1, #0]	@ movhi
-.L1858:
-	ldr	r3, .L1912+56
+.L1862:
+	ldr	r3, .L1916+56
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1853
+	cbz	r3, .L1857
 	adds	r4, r4, #32
 	uxth	r4, r4
-	b	.L1853
-.L1904:
+	b	.L1857
+.L1908:
 	movs	r4, #1
-.L1853:
-	ldr	r3, .L1912+60
+.L1857:
+	ldr	r3, .L1916+60
 	ldrh	r2, [r3, #0]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1864
-	ldr	r3, .L1912+16
+	bne	.L1868
+	ldr	r3, .L1916+16
 	ldrh	r1, [r3, #0]
 	cmp	r1, r2
-	beq	.L1865
-	ldr	r0, .L1912+64
+	beq	.L1869
+	ldr	r0, .L1916+64
 	ldr	r0, [r0, #0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1866
+	cbnz	r1, .L1870
 	strh	r2, [r3, #0]	@ movhi
-.L1866:
+.L1870:
 	ldrh	r1, [r3, #0]
-	ldr	r2, .L1912+60
+	ldr	r2, .L1916+60
 	strh	r1, [r2, #0]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1865:
-	ldr	r5, .L1912+60
+.L1869:
+	ldr	r5, .L1916+60
 	movw	r6, #65535
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1864
+	beq	.L1868
 	bl	IsBlkInGcList
-	cbz	r0, .L1867
+	cbz	r0, .L1871
 	strh	r6, [r5, #0]	@ movhi
-.L1867:
-	ldr	r3, .L1912+68
-	ldr	r6, .L1912+60
+.L1871:
+	ldr	r3, .L1916+68
+	ldr	r6, .L1916+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1868
+	cbz	r3, .L1872
 	ldrh	r0, [r6, #0]
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L1868:
+.L1872:
 	ldrh	r2, [r6, #0]
 	movw	r3, #65535
-	ldr	r5, .L1912+60
+	ldr	r5, .L1916+60
 	cmp	r2, r3
-	beq	.L1864
+	beq	.L1868
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1912+72
+	ldr	r2, .L1916+72
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L1912+64
+	ldr	r3, .L1916+64
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1912+76
+	ldr	r3, .L1916+76
 	strh	r2, [r3, #0]	@ movhi
-.L1864:
-	ldr	r2, .L1912+60
-	ldr	r1, .L1912+80
+.L1868:
+	ldr	r2, .L1916+60
+	ldr	r1, .L1916+80
 	ldrh	r3, [r2, #0]
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	beq	.L1869
-	ldr	r1, .L1912+84
+	beq	.L1873
+	ldr	r1, .L1916+84
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	bne	.L1906
-.L1870:
-.L1869:
+	bne	.L1910
+.L1874:
+.L1873:
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1911
-.L1906:
-	ldr	r6, .L1912+88
-	ldr	r7, .L1912+92
-.L1908:
-	ldr	r3, .L1912+60
+	b	.L1915
+.L1910:
+	ldr	r6, .L1916+88
+	ldr	r7, .L1916+92
+.L1912:
+	ldr	r3, .L1916+60
 	movw	r2, #65535
 	ldrh	r8, [r3, #0]
 	cmp	r8, r2
-	bne	.L1872
-	ldr	r2, .L1912+52
+	bne	.L1876
+	ldr	r2, .L1916+52
 	mov	sl, r3
-	ldr	fp, .L1912+64
+	ldr	fp, .L1916+64
 	movs	r1, #0
 	str	r1, [r2, #0]
-.L1907:
+.L1911:
 	ldrh	r1, [r6, #0]
 	mov	r0, r1
 	str	r1, [sp, #8]
@@ -16929,175 +16970,175 @@ rk_ftl_garbage_collect:
 	uxth	r5, r0
 	strh	r5, [sl, #0]	@ movhi
 	cmp	r5, r8
-	bne	.L1874
-	ldr	r3, .L1912+88
+	bne	.L1878
+	ldr	r3, .L1916+88
 	movs	r2, #0
 	movs	r0, #8
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1851
-.L1874:
+	b	.L1855
+.L1878:
 	mov	r0, r5
 	bl	IsBlkInGcList
 	ldr	r2, [sp, #8]
 	adds	r3, r2, #1
-	cbnz	r0, .L1909
-.L1875:
-	ldr	r1, .L1912+24
+	cbnz	r0, .L1913
+.L1879:
+	ldr	r1, .L1916+24
 	uxth	r0, r3
 	ldr	r3, [fp, #0]
 	strh	r0, [r6, #0]	@ movhi
 	ldrh	ip, [r1, #0]
-	ldr	r1, .L1912+96
+	ldr	r1, .L1916+96
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r1, [r1, #0]
 	mul	r1, r1, ip
 	cmp	r2, r1, asr #1
-	bgt	.L1877
+	bgt	.L1881
 	cmp	r0, #48
-	bls	.L1878
+	bls	.L1882
 	cmp	r2, #8
-	bls	.L1878
-	ldr	r2, .L1912+100
+	bls	.L1882
+	ldr	r2, .L1916+100
 	ldrh	r2, [r2, #0]
 	cmp	r2, #35
-	bhi	.L1878
-.L1877:
+	bhi	.L1882
+.L1881:
 	movs	r2, #0
 	strh	r2, [r6, #0]	@ movhi
-.L1878:
+.L1882:
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1912+60
+	ldr	r3, .L1916+60
 	cmp	r2, r1
-	blt	.L1879
+	blt	.L1883
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1912+88
+	ldr	r3, .L1916+88
 	movs	r2, #0
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1911
-.L1879:
+	b	.L1915
+.L1883:
 	cmp	r2, #0
-	bne	.L1880
+	bne	.L1884
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r6, #0]
 	adds	r3, r3, #1
-.L1909:
-	strh	r3, [r6, #0]	@ movhi
-	b	.L1907
 .L1913:
+	strh	r3, [r6, #0]	@ movhi
+	b	.L1911
+.L1917:
 	.align	2
-.L1912:
-	.word	.LANCHOR94
+.L1916:
+	.word	.LANCHOR82
 	.word	.LANCHOR168
-	.word	.LANCHOR103
-	.word	.LANCHOR150
-	.word	.LANCHOR149
-	.word	.LANCHOR106
-	.word	.LANCHOR68
+	.word	.LANCHOR91
+	.word	.LANCHOR138
+	.word	.LANCHOR137
+	.word	.LANCHOR94
+	.word	.LANCHOR56
 	.word	.LANCHOR173
-	.word	.LANCHOR111
+	.word	.LANCHOR99
 	.word	.LANCHOR233
-	.word	.LANCHOR88
-	.word	.LANCHOR118
+	.word	.LANCHOR76
+	.word	.LANCHOR106
 	.word	.LANCHOR201
 	.word	.LANCHOR169
-	.word	.LANCHOR151
+	.word	.LANCHOR139
 	.word	.LANCHOR202
-	.word	.LANCHOR101
+	.word	.LANCHOR89
 	.word	.LANCHOR7
 	.word	.LANCHOR234
 	.word	.LANCHOR235
-	.word	.LANCHOR109
-	.word	.LANCHOR110
+	.word	.LANCHOR97
+	.word	.LANCHOR98
 	.word	.LANCHOR175
-	.word	.LANCHOR135
-	.word	.LANCHOR53
-	.word	.LANCHOR145
-.L1880:
+	.word	.LANCHOR123
+	.word	.LANCHOR41
+	.word	.LANCHOR133
+.L1884:
 	movs	r2, #0
 	strb	r2, [r3, #8]
-	ldr	r2, .L1914
+	ldr	r2, .L1918
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1881
+	cbz	r2, .L1885
 	mov	r0, r5
 	str	r3, [sp, #4]
 	bl	ftl_get_blk_mode
 	ldr	r3, [sp, #4]
 	strb	r0, [r3, #8]
-.L1881:
-	ldr	r5, .L1914+4
-	ldr	r3, .L1914+8
+.L1885:
+	ldr	r5, .L1918+4
+	ldr	r3, .L1918+8
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1882
-	ldr	r1, .L1914+12
+	bne	.L1886
+	ldr	r1, .L1918+12
 	movw	r2, #835
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1882:
-	ldr	r3, .L1914+28
+.L1886:
+	ldr	r3, .L1918+28
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1883
-	ldr	r1, .L1914+12
+	bne	.L1887
+	ldr	r1, .L1918+12
 	mov	r2, #836
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1883:
-	ldr	r5, .L1914+4
-	ldr	r3, .L1914+32
+.L1887:
+	ldr	r5, .L1918+4
+	ldr	r3, .L1918+32
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1884
-	ldr	r1, .L1914+12
+	bne	.L1888
+	ldr	r1, .L1918+12
 	movw	r2, #837
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1884:
-	ldr	r0, .L1914+4
+.L1888:
+	ldr	r0, .L1918+4
 	bl	make_superblock
-	ldr	r1, .L1914+36
+	ldr	r1, .L1918+36
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strh	r3, [r1, #0]	@ movhi
-	ldr	r1, .L1914+40
+	ldr	r1, .L1918+40
 	ldr	r1, [r1, #0]
 	ldrh	r0, [r1, r0, lsl #1]
-	ldr	r1, .L1914+44
+	ldr	r1, .L1918+44
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r0, [r1, #0]	@ movhi
-.L1872:
-	ldr	r3, .L1914+48
+.L1876:
+	ldr	r3, .L1918+48
 	movs	r2, #1
 	str	r2, [r3, #0]
-	ldr	r3, .L1914+52
+	ldr	r3, .L1918+52
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #8]
-	ldr	r3, .L1914
+	ldr	r3, .L1918
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1914+4
-	cbz	r2, .L1885
+	ldr	r3, .L1918+4
+	cbz	r2, .L1889
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1885
-	ldr	r2, .L1914+56
+	bne	.L1889
+	ldr	r2, .L1918+56
 	ldrh	r2, [r2, #0]
 	str	r2, [sp, #8]
-.L1885:
+.L1889:
 	ldrh	r3, [r3, #2]
 	ldr	r8, [sp, #8]
 	adds	r2, r3, r4
@@ -17108,24 +17149,24 @@ rk_ftl_garbage_collect:
 	movs	r3, #0
 	str	r4, [sp, #20]
 	str	r3, [sp, #12]
-	b	.L1887
-.L1889:
+	b	.L1891
+.L1893:
 	ldrh	r1, [r2, #2]!
 	movw	r8, #65535
 	cmp	r1, r8
-	beq	.L1888
+	beq	.L1892
 	mla	r8, r0, r5, lr
 	adds	r5, r5, #1
 	orr	r1, r4, r1, lsl #10
 	uxth	r5, r5
 	str	r1, [r8, #4]
-.L1888:
+.L1892:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1896:
+.L1900:
 	cmp	r3, ip
-	bne	.L1889
-	ldr	r3, .L1914+4
+	bne	.L1893
+	ldr	r3, .L1918+4
 	mov	r1, r5
 	ldr	r0, [r7, #0]
 	movs	r4, #0
@@ -17133,29 +17174,29 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	bl	FlashReadPages
 	str	r4, [sp, #16]
-	b	.L1890
-.L1894:
+	b	.L1894
+.L1898:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r4
 	ldr	r3, [r3, r4]
 	ldr	r5, [r2, #12]
 	adds	r3, r3, #1
-	beq	.L1891
+	beq	.L1895
 	ldrh	r3, [r5, #0]
 	movw	r8, #61589
 	cmp	r3, r8
-	bne	.L1891
+	bne	.L1895
 	ldr	r8, [r5, #8]
 	cmp	r8, #-1
-	bne	.L1892
-	ldr	r1, .L1914+12
+	bne	.L1896
+	ldr	r1, .L1918+12
 	mov	r2, #876
-	ldr	r0, .L1914+16
+	ldr	r0, .L1918+16
 	bl	printf
-	ldr	r0, .L1914+20
-	ldr	r1, .L1914+24
+	ldr	r0, .L1918+20
+	ldr	r1, .L1918+24
 	bl	printf
-.L1892:
+.L1896:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r8
@@ -17166,30 +17207,30 @@ rk_ftl_garbage_collect:
 	bic	r1, r1, #-2147483648
 	ldr	r3, [r2, #4]
 	cmp	r1, r3
-	bne	.L1891
-	ldr	r0, .L1914+36
+	bne	.L1895
+	ldr	r0, .L1918+36
 	mov	fp, #36
-	ldr	r8, .L1914+72
+	ldr	r8, .L1918+72
 	ldr	r2, [r2, #16]
 	ldrh	r3, [r0, #0]
 	ldr	r1, [r8, #0]
 	adds	r3, r3, #1
 	strh	r3, [r0, #0]	@ movhi
-	ldr	r0, .L1914+60
+	ldr	r0, .L1918+60
 	ldr	r3, [r0, #0]
 	mla	r3, fp, r1, r3
 	str	r2, [r3, #16]
 	str	r3, [sp, #4]
 	bl	Ftl_get_new_temp_ppa
 	ldr	r3, [sp, #4]
-	ldr	r1, .L1914+60
+	ldr	r1, .L1918+60
 	ldr	r2, [r1, #0]
 	str	r0, [r3, #4]
 	ldr	r3, [r8, #0]
 	ldr	r0, [r7, #0]
 	mla	r2, fp, r3, r2
 	adds	r0, r0, r4
-	ldr	fp, .L1914+32
+	ldr	fp, .L1918+32
 	adds	r3, r3, #1
 	ldr	r1, [r0, #8]
 	str	r1, [r2, #8]
@@ -17200,45 +17241,45 @@ rk_ftl_garbage_collect:
 	str	r2, [r5, #12]
 	ldrh	r2, [fp, #0]
 	strh	r2, [r5, #2]	@ movhi
-	ldr	r2, .L1914+64
+	ldr	r2, .L1918+64
 	str	r3, [r8, #0]
 	ldr	r2, [r2, #0]
 	str	r2, [r5, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L1914
+	ldr	r3, .L1918
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1893
+	cbnz	r3, .L1897
 	ldrb	r3, [fp, #7]	@ zero_extendqisi2
 	ldr	r2, [r8, #0]
 	cmp	r2, r3
-	beq	.L1893
+	beq	.L1897
 	ldrh	r3, [fp, #4]
-	cbnz	r3, .L1891
-.L1893:
+	cbnz	r3, .L1895
+.L1897:
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L1910
-.L1891:
+	bne	.L1914
+.L1895:
 	ldr	r8, [sp, #16]
 	adds	r4, r4, #36
 	add	r3, r8, #1
 	uxth	r3, r3
 	str	r3, [sp, #16]
-.L1890:
+.L1894:
 	ldr	r3, [sp, #16]
 	cmp	r3, sl
-	bne	.L1894
+	bne	.L1898
 	ldr	r8, [sp, #12]
 	add	r8, r8, #1
 	str	r8, [sp, #12]
-.L1887:
+.L1891:
 	ldr	r8, [sp, #12]
-	ldr	r2, .L1914+4
+	ldr	r2, .L1918+4
 	uxth	r3, r8
 	ldr	r8, [sp, #20]
 	cmp	r3, r8
-	bcs	.L1895
-	ldr	r3, .L1914+68
+	bcs	.L1899
+	ldr	r3, .L1918+68
 	movs	r5, #0
 	ldrh	r4, [r2, #2]
 	movs	r0, #36
@@ -17248,8 +17289,8 @@ rk_ftl_garbage_collect:
 	ldr	r3, [sp, #12]
 	adds	r4, r4, r3
 	mov	r3, r5
-	b	.L1896
-.L1895:
+	b	.L1900
+.L1899:
 	ldrh	r3, [r2, #2]
 	ldr	r4, [sp, #20]
 	ldr	r8, [sp, #8]
@@ -17257,87 +17298,87 @@ rk_ftl_garbage_collect:
 	uxth	r4, r4
 	strh	r4, [r2, #2]	@ movhi
 	cmp	r4, r8
-	bcc	.L1897
-	ldr	r3, .L1914+72
+	bcc	.L1901
+	ldr	r3, .L1918+72
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1898
+	cbz	r3, .L1902
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1898
-.L1910:
-	ldr	r3, .L1914+48
+	cbz	r0, .L1902
+.L1914:
+	ldr	r3, .L1918+48
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1911:
-	ldr	r3, .L1914+76
+.L1915:
+	ldr	r3, .L1918+76
 	ldrh	r0, [r3, #0]
-	b	.L1851
-.L1898:
-	ldr	r3, .L1914+36
+	b	.L1855
+.L1902:
+	ldr	r3, .L1918+36
 	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1899
-	ldr	r3, .L1914+4
-	ldr	r2, .L1914+40
+	cbnz	r0, .L1903
+	ldr	r3, .L1918+4
+	ldr	r2, .L1918+40
 	ldrh	r1, [r3, #0]
 	ldr	r2, [r2, #0]
 	ldrh	r4, [r2, r1, lsl #1]
-	cbz	r4, .L1899
+	cbz	r4, .L1903
 	strh	r0, [r2, r1, lsl #1]	@ movhi
 	ldrh	r0, [r3, #0]
 	bl	update_vpc_list
 	bl	FtlCacheWriteBack
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
-.L1899:
-	ldr	r3, .L1914+4
+.L1903:
+	ldr	r3, .L1918+4
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1897:
-	ldr	r3, .L1914+80
+.L1901:
+	ldr	r3, .L1918+80
 	ldrh	r0, [r3, #0]
 	cmp	r0, #2
-	bhi	.L1900
-	ldr	r3, .L1914+52
+	bhi	.L1904
+	ldr	r3, .L1918+52
 	ldrh	r4, [r3, #0]
-	b	.L1908
-.L1900:
-	ldr	r3, .L1914+48
+	b	.L1912
+.L1904:
+	ldr	r3, .L1918+48
 	movs	r2, #0
 	adds	r0, r0, #1
 	str	r2, [r3, #0]
-	b	.L1851
-.L1915:
+	b	.L1855
+.L1919:
 	.align	2
-.L1914:
+.L1918:
 	.word	.LANCHOR7
 	.word	.LANCHOR202
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.word	.LANCHOR236
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR110
-	.word	.LANCHOR111
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
+	.word	.LANCHOR98
+	.word	.LANCHOR99
 	.word	.LANCHOR234
-	.word	.LANCHOR101
+	.word	.LANCHOR89
 	.word	.LANCHOR235
 	.word	.LANCHOR168
-	.word	.LANCHOR68
-	.word	.LANCHOR69
+	.word	.LANCHOR56
+	.word	.LANCHOR57
 	.word	.LANCHOR178
 	.word	.LANCHOR157
-	.word	.LANCHOR53
-	.word	.LANCHOR131
+	.word	.LANCHOR41
+	.word	.LANCHOR119
 	.word	.LANCHOR233
-	.word	.LANCHOR106
-.L1901:
+	.word	.LANCHOR94
+.L1905:
 	movs	r0, #0
-	b	.L1851
-.L1902:
+	b	.L1855
+.L1906:
 	mov	r0, r2
-	b	.L1851
-.L1903:
+	b	.L1855
+.L1907:
 	mov	r0, r3
-.L1851:
+.L1855:
 	add	sp, sp, #32
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
@@ -17350,20 +17391,20 @@ rk_ftl_garbage_collect:
 ftl_fix_nand_power_lost_error:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1925
+	ldr	r3, .L1929
 	push	{r4, r5, r6, r7, r8, lr}
 	sub	sp, sp, #48
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
-	beq	.L1916
-	ldr	r3, .L1925+4
-	ldr	r5, .L1925+8
-	ldr	r8, .L1925+32
+	beq	.L1920
+	ldr	r3, .L1929+4
+	ldr	r5, .L1929+8
+	ldr	r8, .L1929+32
 	ldrh	r4, [r3, #0]
 	ldr	r3, [r5, #0]
-	ldr	r7, .L1925+12
+	ldr	r7, .L1929+12
 	mov	r1, r4
-	ldr	r0, .L1925+16
+	ldr	r0, .L1929+16
 	lsls	r6, r4, #1
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
@@ -17376,46 +17417,46 @@ ftl_fix_nand_power_lost_error:
 	mov	r0, r7
 	bl	allocate_new_data_superblock
 	movw	r7, #4097
-	b	.L1918
-.L1920:
+	b	.L1922
+.L1924:
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
 	ldr	r3, [r5, #0]
 	ldrh	r3, [r3, r6]
-	cbz	r3, .L1919
-.L1918:
+	cbz	r3, .L1923
+.L1922:
 	subs	r7, r7, #1
-	bne	.L1920
-.L1919:
-	ldr	r5, .L1925+8
+	bne	.L1924
+.L1923:
+	ldr	r5, .L1929+8
 	mov	r1, r4
-	ldr	r0, .L1925+16
+	ldr	r0, .L1929+16
 	ldr	r3, [r5, #0]
 	ldrh	r2, [r3, r4, lsl #1]
 	bl	printf
 	ldr	r3, [r5, #0]
 	ldrh	r5, [r3, r4, lsl #1]
 	cmp	r5, #0
-	bne	.L1921
+	bne	.L1925
 	add	r6, sp, #48
 	mov	r0, sp
 	movs	r7, #36
 	strh	r4, [r6, #-48]!	@ movhi
 	adds	r6, r6, #14
 	bl	make_superblock
-	ldr	r3, .L1925+20
+	ldr	r3, .L1929+20
 	movw	lr, #65535
 	mov	r1, r5
 	ldrh	r8, [r3, #0]
-	ldr	r3, .L1925+24
+	ldr	r3, .L1929+24
 	ldr	ip, [r3, #0]
-	mov	r3, r5
-	b	.L1922
-.L1924:
+	mov	r3, r5
+	b	.L1926
+.L1928:
 	ldrh	r0, [r6, #2]!
 	cmp	r0, lr
-	beq	.L1923
+	beq	.L1927
 	mla	r2, r7, r5, ip
 	adds	r5, r5, #1
 	lsls	r0, r0, #10
@@ -17423,18 +17464,18 @@ ftl_fix_nand_power_lost_error:
 	str	r0, [r2, #4]
 	str	r1, [r2, #8]
 	str	r1, [r2, #12]
-.L1923:
+.L1927:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1922:
+.L1926:
 	cmp	r3, r8
-	bne	.L1924
-	ldr	r3, .L1925+8
+	bne	.L1928
+	ldr	r3, .L1929+8
 	mov	r1, r4
-	ldr	r0, .L1925+28
+	ldr	r0, .L1929+28
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r4, lsl #1]
-	ldr	r4, .L1925+24
+	ldr	r4, .L1929+24
 	bl	printf
 	movs	r1, #0
 	mov	r2, r5
@@ -17444,25 +17485,25 @@ ftl_fix_nand_power_lost_error:
 	movs	r1, #1
 	mov	r2, r5
 	bl	FlashEraseBlocks
-.L1921:
-	ldr	r3, .L1925+4
+.L1925:
+	ldr	r3, .L1929+4
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1916:
+.L1920:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1926:
+.L1930:
 	.align	2
-.L1925:
+.L1929:
 	.word	.LANCHOR7
 	.word	.LANCHOR229
-	.word	.LANCHOR101
-	.word	.LANCHOR110
+	.word	.LANCHOR89
+	.word	.LANCHOR98
 	.word	.LC44
-	.word	.LANCHOR53
-	.word	.LANCHOR95
+	.word	.LANCHOR41
+	.word	.LANCHOR83
 	.word	.LC45
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
 	.section	.text.FtlInit,"ax",%progbits
 	.align	1
@@ -17473,70 +17514,70 @@ ftl_fix_nand_power_lost_error:
 FtlInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-.L1928:
+.L1932:
 	push	{r3, r4, r5, lr}
 	mov	r3, #-1
-	ldr	r2, .L1935
+	ldr	r2, .L1939
 	mov	r5, r0
-	ldr	r4, .L1935+4
-	ldr	r1, .L1935+8
-	ldr	r0, .L1935+12
+	ldr	r4, .L1939+4
+	ldr	r1, .L1939+8
+	ldr	r0, .L1939+12
 	str	r3, [r4, #0]
 	movs	r3, #0
 	str	r3, [r2, #0]
-	ldr	r2, .L1935+16
+	ldr	r2, .L1939+16
 	str	r3, [r2, #0]
 	bl	printf
 	mov	r0, r5
 	bl	FtlConstantsInit
 	bl	FtlMemInit
 	bl	FtlVariablesInit
-	ldr	r3, .L1935+20
+	ldr	r3, .L1939+20
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L1929
-	ldr	r0, .L1935+24
-	b	.L1934
-.L1929:
+	cbz	r0, .L1933
+	ldr	r0, .L1939+24
+	b	.L1938
+.L1933:
 	bl	FtlSysBlkInit
-	cbz	r0, .L1931
-	ldr	r0, .L1935+28
-.L1934:
-	ldr	r1, .L1935+32
+	cbz	r0, .L1935
+	ldr	r0, .L1939+28
+.L1938:
+	ldr	r1, .L1939+32
 	bl	printf
-	b	.L1930
-.L1931:
+	b	.L1934
+.L1935:
 	movs	r1, #1
 	str	r1, [r4, #0]
 	bl	rk_ftl_garbage_collect
-	ldr	r3, .L1935+36
+	ldr	r3, .L1939+36
 	ldrh	r3, [r3, #0]
 	cmp	r3, #15
-	bhi	.L1930
+	bhi	.L1934
 	mov	r4, #1024
-.L1932:
+.L1936:
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
 	subs	r4, r4, #1
-	bne	.L1932
-.L1930:
+	bne	.L1936
+.L1934:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L1936:
+.L1940:
 	.align	2
-.L1935:
+.L1939:
 	.word	.LANCHOR237
 	.word	.LANCHOR225
 	.word	.LC46
-	.word	.LC10
-	.word	.LANCHOR94
-	.word	.LANCHOR54
+	.word	.LC4
+	.word	.LANCHOR82
+	.word	.LANCHOR42
 	.word	.LC47
 	.word	.LC48
 	.word	.LANCHOR238
-	.word	.LANCHOR106
+	.word	.LANCHOR94
 	.size	FtlInit, .-FtlInit
 	.section	.text.ftl_write,"ax",%progbits
 	.align	1
@@ -17553,28 +17594,28 @@ ftl_write:
 	mov	r5, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	bne	.L1938
+	bne	.L1942
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartWrite
-	b	.L1939
-.L1938:
-	ldr	r3, .L1980
+	b	.L1943
+.L1942:
+	ldr	r3, .L1984
 	ldr	r0, [sp, #12]
 	ldr	r3, [r3, #0]
 	adds	r7, r0, r1
 	cmp	r7, r3
-	bhi	.L1970
-	ldr	r3, .L1980+4
+	bhi	.L1974
+	ldr	r3, .L1984+4
 	ldr	r0, [r3, #0]
 	adds	r3, r0, #1
-	beq	.L1939
-	ldr	r3, .L1980+8
+	beq	.L1943
+	ldr	r3, .L1984+8
 	mov	r2, #2048
 	mov	r0, r1
 	str	r2, [r3, #0]
-	ldr	r3, .L1980+12
+	ldr	r3, .L1984+12
 	ldrh	r6, [r3, #0]
 	mov	r1, r6
 	bl	__aeabi_uidiv
@@ -17582,7 +17623,7 @@ ftl_write:
 	mov	sl, r0
 	subs	r0, r7, #1
 	bl	__aeabi_uidiv
-	ldr	r3, .L1980+16
+	ldr	r3, .L1984+16
 	ldr	r2, [r3, #0]
 	rsb	r4, sl, r0
 	str	r0, [sp, #24]
@@ -17590,16 +17631,16 @@ ftl_write:
 	str	r1, [sp, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	ldr	r3, .L1980+20
+	ldr	r3, .L1984+20
 	ldr	r7, [r3, #0]
-	cbz	r7, .L1940
+	cbz	r7, .L1944
 	ldr	r3, [r7, #16]
 	cmp	sl, r3
-	beq	.L1941
+	beq	.L1945
 	bl	FtlCacheWriteBack
-	b	.L1940
-.L1941:
-	ldr	r3, .L1980+24
+	b	.L1944
+.L1945:
+	ldr	r3, .L1984+24
 	mov	r1, r6
 	mov	r0, r5
 	ldr	r2, [r3, #0]
@@ -17618,7 +17659,7 @@ ftl_write:
 	mov	r2, r8
 	bl	memcpy
 	cmp	r4, #0
-	beq	.L1972
+	beq	.L1976
 	ldr	r3, [sp, #12]
 	adds	r5, r5, r6
 	ldr	r0, [sp, #4]
@@ -17629,36 +17670,36 @@ ftl_write:
 	str	r0, [sp, #4]
 	bl	FtlCacheWriteBack
 	str	r4, [sp, #0]
-.L1940:
+.L1944:
 	mov	r4, sl
 	str	sl, [sp, #20]
-	ldr	r6, .L1980+28
+	ldr	r6, .L1984+28
 	mov	sl, r5
-	b	.L1942
-.L1969:
-	ldr	r1, .L1980+32
+	b	.L1946
+.L1973:
+	ldr	r1, .L1984+32
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1943
-	ldr	r1, .L1980+36
+	bcc	.L1947
+	ldr	r1, .L1984+36
 	movw	r2, #1630
-	ldr	r0, .L1980+40
+	ldr	r0, .L1984+40
 	bl	printf
-	ldr	r0, .L1980+44
-	ldr	r1, .L1980+48
+	ldr	r0, .L1984+44
+	ldr	r1, .L1984+48
 	bl	printf
-.L1943:
-	ldr	r2, .L1980+28
+.L1947:
+	ldr	r2, .L1984+28
 	ldrh	r3, [r2, #4]
-	cbnz	r3, .L1944
+	cbnz	r3, .L1948
 	bl	FtlCacheWriteBack
-	ldr	r0, .L1980+28
+	ldr	r0, .L1984+28
 	bl	allocate_new_data_superblock
-.L1944:
+.L1948:
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6, #4]
-	ldr	r1, .L1980+32
+	ldr	r1, .L1984+32
 	lsls	r3, r3, #2
 	ldr	r0, [sp, #0]
 	cmp	r3, r2
@@ -17671,29 +17712,29 @@ ftl_write:
 	ldrh	r3, [r1, #0]
 	str	r0, [sp, #8]
 	cmp	r2, r3
-	bcc	.L1945
-	ldr	r1, .L1980+36
+	bcc	.L1949
+	ldr	r1, .L1984+36
 	movw	r2, #1663
-	ldr	r0, .L1980+40
+	ldr	r0, .L1984+40
 	bl	printf
-	ldr	r0, .L1980+44
-	ldr	r1, .L1980+48
+	ldr	r0, .L1984+44
+	ldr	r1, .L1984+48
 	bl	printf
-.L1945:
+.L1949:
 	movs	r3, #0
-	ldr	r5, .L1980+52
+	ldr	r5, .L1984+52
 	str	r3, [sp, #16]
-	b	.L1946
-.L1965:
+	b	.L1950
+.L1969:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1973
+	beq	.L1977
 	movs	r2, #0
 	add	r1, sp, #76
 	mov	r0, r4
 	movs	r7, #36
 	bl	log2phys
-	ldr	r0, .L1980+28
+	ldr	r0, .L1984+28
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #16]
 	muls	r7, r3, r7
@@ -17701,13 +17742,13 @@ ftl_write:
 	adds	r3, r3, r7
 	str	r4, [r3, #16]
 	str	r0, [r3, #4]
-	ldr	r0, .L1980+56
+	ldr	r0, .L1984+56
 	ldrh	r2, [r0, #0]
 	ldr	r0, [sp, #16]
 	mul	r1, r2, r0
 	lsrs	r1, r1, #2
 	str	r1, [sp, #32]
-	ldr	r1, .L1980+60
+	ldr	r1, .L1984+60
 	ldr	r0, [sp, #32]
 	ldr	r1, [r1, #0]
 	add	r8, r1, r0, lsl #2
@@ -17717,14 +17758,14 @@ ftl_write:
 	movs	r1, #0
 	bl	memset
 	ldr	r1, [sp, #20]
-	ldr	r3, .L1980+12
+	ldr	r3, .L1984+12
 	cmp	r4, r1
-	beq	.L1948
+	beq	.L1952
 	ldr	r2, [sp, #24]
 	cmp	r4, r2
-	bne	.L1975
-	b	.L1979
-.L1948:
+	bne	.L1979
+	b	.L1983
+.L1952:
 	ldrh	fp, [r3, #0]
 	mov	r0, sl
 	mov	r1, fp
@@ -17735,8 +17776,8 @@ ftl_write:
 	cmp	fp, r3
 	it	cs
 	movcs	fp, r3
-	b	.L1951
-.L1979:
+	b	.L1955
+.L1983:
 	ldr	r0, [sp, #12]
 	ldrh	fp, [r3, #0]
 	movs	r3, #0
@@ -17744,39 +17785,39 @@ ftl_write:
 	str	r3, [sp, #28]
 	mls	fp, r4, fp, r2
 	uxth	fp, fp
-.L1951:
-	ldr	r3, .L1980+12
+.L1955:
+	ldr	r3, .L1984+12
 	ldrh	r3, [r3, #0]
 	cmp	fp, r3
-	bne	.L1952
+	bne	.L1956
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r7, r3, r7
-	bne	.L1953
+	bne	.L1957
 	ldr	r1, [sp, #4]
 	str	r1, [r7, #8]
-	b	.L1954
-.L1953:
+	b	.L1958
+.L1957:
 	mul	r3, fp, r4
 	ldr	r2, [sp, #4]
 	rsb	r3, sl, r3
 	add	r3, r2, r3, lsl #9
-	b	.L1978
-.L1952:
+	b	.L1982
+.L1956:
 	ldr	r3, [sp, #20]
 	cmp	r4, r3
 	ldr	r3, [r5, #0]
 	it	eq
-	ldreq	r2, .L1980+64
+	ldreq	r2, .L1984+64
 	add	r3, r3, r7
 	it	ne
-	ldrne	r2, .L1980+68
+	ldrne	r2, .L1984+68
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #76]
 	adds	r1, r3, #1
-	beq	.L1957
+	beq	.L1961
 	str	r3, [sp, #44]
 	movs	r1, #1
 	ldr	r3, [r5, #0]
@@ -17791,102 +17832,102 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1958
-	ldr	r3, .L1980+72
+	bne	.L1962
+	ldr	r3, .L1984+72
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
-	b	.L1959
-.L1958:
+	b	.L1963
+.L1962:
 	ldr	r1, [r8, #8]
 	cmp	r1, r4
-	beq	.L1960
-	ldr	r3, .L1980+72
-	ldr	r0, .L1980+76
+	beq	.L1964
+	ldr	r3, .L1984+72
+	ldr	r0, .L1984+76
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
 	mov	r2, r4
 	bl	printf
-.L1960:
+.L1964:
 	ldr	r3, [r8, #8]
 	cmp	r3, r4
-	beq	.L1959
-	ldr	r1, .L1980+36
+	beq	.L1963
+	ldr	r1, .L1984+36
 	movw	r2, #1716
-	ldr	r0, .L1980+40
+	ldr	r0, .L1984+40
 	bl	printf
-	ldr	r1, .L1980+48
-	ldr	r0, .L1980+44
+	ldr	r1, .L1984+48
+	ldr	r0, .L1984+44
 	bl	printf
-	b	.L1959
-.L1957:
+	b	.L1963
+.L1961:
 	ldr	r3, [r5, #0]
 	movs	r1, #0
 	adds	r3, r3, r7
 	ldr	r0, [r3, #8]
-	ldr	r3, .L1980+80
+	ldr	r3, .L1984+80
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1959:
+.L1963:
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r3, r3, r7
-	bne	.L1961
+	bne	.L1965
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #28]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-	b	.L1977
-.L1981:
+	b	.L1981
+.L1985:
 	.align	2
-.L1980:
-	.word	.LANCHOR84
+.L1984:
+	.word	.LANCHOR72
 	.word	.LANCHOR225
 	.word	.LANCHOR239
-	.word	.LANCHOR71
+	.word	.LANCHOR59
 	.word	.LANCHOR159
-	.word	.LANCHOR137
+	.word	.LANCHOR125
 	.word	.LANCHOR161
-	.word	.LANCHOR109
-	.word	.LANCHOR53
+	.word	.LANCHOR97
+	.word	.LANCHOR41
 	.word	.LANCHOR240
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR179
-	.word	.LANCHOR74
+	.word	.LANCHOR62
 	.word	.LANCHOR185
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR144
+	.word	.LANCHOR132
 	.word	.LC49
-	.word	.LANCHOR73
-.L1961:
-	ldr	r2, .L1982
+	.word	.LANCHOR61
+.L1965:
+	ldr	r2, .L1986
 	ldr	r0, [r3, #8]
 	ldrh	r1, [r2, #0]
 	muls	r1, r4, r1
 	ldr	r2, [sp, #4]
 	rsb	r1, sl, r1
 	add	r1, r2, r1, lsl #9
-.L1977:
+.L1981:
 	lsl	r2, fp, #9
 	bl	memcpy
 	ldr	r3, [sp, #24]
 	cmp	r4, r3
-	bne	.L1954
+	bne	.L1958
 	ldrh	r3, [r6, #4]
-	cbz	r3, .L1954
+	cbz	r3, .L1958
 	ldr	r3, [r5, #0]
 	adds	r7, r3, r7
-	ldr	r3, .L1982+4
+	ldr	r3, .L1986+4
 	str	r7, [r3, #0]
-	ldr	r3, .L1982+8
+	ldr	r3, .L1986+8
 	str	r6, [r3, #0]
-	b	.L1954
-.L1975:
+	b	.L1958
+.L1979:
 	ldr	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	muls	r3, r4, r3
@@ -17894,36 +17935,36 @@ ftl_write:
 	rsb	r3, sl, r3
 	adds	r7, r2, r7
 	add	r3, r0, r3, lsl #9
-.L1978:
+.L1982:
 	str	r3, [r7, #8]
-.L1954:
-	ldr	r1, .L1982+12
+.L1958:
+	ldr	r1, .L1986+12
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1963
-	ldr	r1, .L1982+16
+	bcc	.L1967
+	ldr	r1, .L1986+16
 	movw	r2, #1737
-	ldr	r0, .L1982+20
+	ldr	r0, .L1986+20
 	bl	printf
-	ldr	r0, .L1982+24
-	ldr	r1, .L1982+28
+	ldr	r0, .L1986+24
+	ldr	r1, .L1986+28
 	bl	printf
-.L1963:
+.L1967:
 	ldr	r2, [sp, #36]
 	movw	r3, #61589
 	ldr	r0, [sp, #32]
 	strh	r3, [r2, r0, lsl #2]	@ movhi
-	ldr	r3, .L1982+32
+	ldr	r3, .L1986+32
 	ldr	r2, [r3, #0]
 	str	r2, [r8, #4]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
 	adds	r2, r2, #1
-	bne	.L1964
+	bne	.L1968
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1964:
+.L1968:
 	ldr	r3, [sp, #76]
 	str	r4, [r8, #8]
 	adds	r4, r4, #1
@@ -17933,83 +17974,83 @@ ftl_write:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	str	r3, [sp, #16]
-.L1946:
+.L1950:
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #8]
 	cmp	r3, r0
-	bne	.L1965
-	b	.L1947
-.L1973:
+	bne	.L1969
+	b	.L1951
+.L1977:
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #8]
-.L1947:
-	ldr	r3, .L1982+4
+.L1951:
+	ldr	r3, .L1986+4
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1966
+	cbz	r3, .L1970
 	ldr	r0, [sp, #8]
 	subs	r0, r0, #1
 	str	r0, [sp, #8]
-	beq	.L1967
+	beq	.L1971
 	ldr	r1, [sp, #0]
 	subs	r1, r1, #1
 	str	r1, [sp, #0]
-.L1966:
-	ldr	r3, .L1982+36
+.L1970:
+	ldr	r3, .L1986+36
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1982+40
+	ldr	r3, .L1986+40
 	bl	FtlProgPages
 	ldr	r2, [sp, #0]
 	ldr	r3, [sp, #8]
 	cmp	r2, r3
-	bcs	.L1968
-	ldr	r1, .L1982+16
+	bcs	.L1972
+	ldr	r1, .L1986+16
 	mov	r2, #1752
-	ldr	r0, .L1982+20
+	ldr	r0, .L1986+20
 	bl	printf
-	ldr	r0, .L1982+24
-	ldr	r1, .L1982+28
+	ldr	r0, .L1986+24
+	ldr	r1, .L1986+28
 	bl	printf
-.L1968:
+.L1972:
 	ldr	r0, [sp, #0]
 	ldr	r1, [sp, #8]
 	subs	r0, r0, r1
 	str	r0, [sp, #0]
-.L1942:
+.L1946:
 	ldr	r2, [sp, #0]
 	cmp	r2, #0
-	bne	.L1969
-.L1967:
+	bne	.L1973
+.L1971:
 	ldr	sl, [sp, #20]
 	movs	r0, #0
 	ldr	r3, [sp, #24]
 	rsb	r1, sl, r3
 	bl	rk_ftl_garbage_collect
 	movs	r0, #0
-	b	.L1939
-.L1970:
+	b	.L1943
+.L1974:
 	mov	r0, #-1
-	b	.L1939
-.L1972:
+	b	.L1943
+.L1976:
 	mov	r0, r4
-.L1939:
+.L1943:
 	add	sp, sp, #80
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1983:
+.L1987:
 	.align	2
-.L1982:
-	.word	.LANCHOR71
-	.word	.LANCHOR137
+.L1986:
+	.word	.LANCHOR59
+	.word	.LANCHOR125
 	.word	.LANCHOR224
-	.word	.LANCHOR53
+	.word	.LANCHOR41
 	.word	.LANCHOR240
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
+	.word	.LC3
+	.word	.LC4
+	.word	.LC5
 	.word	.LANCHOR157
 	.word	.LANCHOR179
-	.word	.LANCHOR109
+	.word	.LANCHOR97
 	.size	ftl_write, .-ftl_write
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -18026,27 +18067,27 @@ ftl_read:
 	mov	r4, r1
 	mov	r7, r3
 	str	r2, [sp, #36]
-	bne	.L1985
+	bne	.L1989
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartRead
 	str	r0, [sp, #12]
-	b	.L1986
-.L1985:
+	b	.L1990
+.L1989:
 	ldr	r3, [sp, #36]
 	adds	r3, r3, r1
 	str	r3, [sp, #16]
-	ldr	r3, .L2018
+	ldr	r3, .L2022
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bhi	.L2006
-	ldr	r3, .L2018+4
+	bhi	.L2010
+	ldr	r3, .L2022+4
 	ldr	r3, [r3, #0]
 	adds	r2, r3, #1
-	beq	.L2007
-	ldr	fp, .L2018+48
+	beq	.L2011
+	ldr	fp, .L2022+48
 	bl	FtlCacheWriteBack
 	mov	r0, r4
 	mov	sl, #0
@@ -18067,54 +18108,54 @@ ftl_read:
 	str	sl, [sp, #12]
 	adds	r3, r3, r0
 	str	r3, [sp, #8]
-	ldr	r3, .L2018+8
+	ldr	r3, .L2022+8
 	ldr	r1, [sp, #8]
 	str	r0, [sp, #24]
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	b	.L2013
-.L2005:
+	b	.L2017
+.L2009:
 	movs	r2, #0
 	mov	r0, r6
 	add	r1, sp, #68
 	bl	log2phys
 	ldr	r3, [sp, #68]
 	adds	r0, r3, #1
-	bne	.L2014
-	b	.L2017
-.L1991:
+	bne	.L2018
+	b	.L2021
+.L1995:
 	mla	r0, r0, r6, r4
 	cmp	r0, r8
-	bcc	.L1990
+	bcc	.L1994
 	ldr	r3, [sp, #16]
 	cmp	r0, r3
-	bcs	.L1990
+	bcs	.L1994
 	rsb	r0, r8, r0
 	movs	r1, #0
 	mov	r2, #512
 	add	r0, r7, r0, lsl #9
 	bl	memset
-.L1990:
+.L1994:
 	adds	r4, r4, #1
-	b	.L1988
-.L2017:
+	b	.L1992
+.L2021:
 	movs	r4, #0
-.L1988:
+.L1992:
 	ldrh	r0, [fp, #0]
 	cmp	r4, r0
-	bcc	.L1991
-	b	.L1992
-.L2014:
-	ldr	r2, .L2018+12
+	bcc	.L1995
+	b	.L1996
+.L2018:
+	ldr	r2, .L2022+12
 	movs	r4, #36
 	ldr	r2, [r2, #0]
 	mla	r4, r4, r5, r2
 	str	r3, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1993
-	ldr	r3, .L2018+16
+	bne	.L1997
+	ldr	r3, .L2022+16
 	mov	r0, r8
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #8]
@@ -18131,14 +18172,14 @@ ftl_read:
 	movcc	r1, r2
 	str	r1, [sp, #32]
 	cmp	r1, r3
-	bne	.L1994
+	bne	.L1998
 	str	r7, [r4, #8]
-	b	.L1994
-.L1993:
+	b	.L1998
+.L1997:
 	ldr	r3, [sp, #24]
 	cmp	r6, r3
-	bne	.L1995
-	ldr	r3, .L2018+20
+	bne	.L1999
+	ldr	r3, .L2022+20
 	ldrh	r2, [fp, #0]
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
@@ -18146,18 +18187,18 @@ ftl_read:
 	mul	r3, r2, r6
 	rsb	sl, r3, r1
 	cmp	sl, r2
-	bne	.L1994
-	b	.L2015
-.L1995:
+	bne	.L1998
+	b	.L2019
+.L1999:
 	ldrh	r3, [fp, #0]
 	muls	r3, r6, r3
-.L2015:
+.L2019:
 	rsb	r3, r8, r3
 	add	r3, r7, r3, lsl #9
 	str	r3, [r4, #8]
-.L1994:
-	ldr	r3, .L2018+24
-	ldr	r2, .L2018+28
+.L1998:
+	ldr	r3, .L2022+24
+	ldr	r2, .L2022+28
 	str	r6, [r4, #16]
 	ldrh	r3, [r3, #0]
 	muls	r3, r5, r3
@@ -18166,20 +18207,20 @@ ftl_read:
 	bic	r3, r3, #3
 	adds	r3, r2, r3
 	str	r3, [r4, #12]
-.L1992:
+.L1996:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1996
-	ldr	r3, .L2018+32
+	beq	.L2000
+	ldr	r3, .L2022+32
 	ldrh	r3, [r3, #0]
 	cmp	r5, r3, lsl #2
-	bne	.L2013
-.L1996:
+	bne	.L2017
+.L2000:
 	cmp	r5, #0
-	beq	.L2013
-	ldr	r4, .L2018+12
+	beq	.L2017
+	ldr	r4, .L2022+12
 	mov	r1, r5
 	movs	r2, #0
 	ldr	r0, [r4, #0]
@@ -18195,7 +18236,7 @@ ftl_read:
 	str	r3, [sp, #52]
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L2004:
+.L2008:
 	movs	r6, #36
 	ldr	r3, [sp, #28]
 	muls	r6, r3, r6
@@ -18204,111 +18245,111 @@ ftl_read:
 	adds	r3, r3, r6
 	ldr	r2, [r3, #16]
 	cmp	r2, r1
-	bne	.L1998
+	bne	.L2002
 	ldr	r1, [r3, #8]
-	ldr	r3, .L2018+16
+	ldr	r3, .L2022+16
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1999
+	bne	.L2003
 	ldr	r3, [sp, #44]
 	mov	r0, r7
 	ldr	r2, [sp, #48]
 	adds	r1, r1, r3
-	b	.L2016
-.L1998:
+	b	.L2020
+.L2002:
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
-	bne	.L1999
-	ldr	r2, .L2018+20
+	bne	.L2003
+	ldr	r2, .L2022+20
 	ldr	r1, [r3, #8]
 	ldr	r3, [r2, #0]
 	cmp	r1, r3
-	bne	.L1999
+	bne	.L2003
 	ldrh	r0, [fp, #0]
 	ldr	r3, [sp, #24]
 	muls	r0, r3, r0
 	rsb	r0, r8, r0
 	ldr	r2, [sp, #52]
 	add	r0, r7, r0, lsl #9
-.L2016:
+.L2020:
 	bl	memcpy
-.L1999:
+.L2003:
 	ldr	r3, [r4, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
 	adds	r1, r3, #1
-	bne	.L2000
-	ldr	r2, .L2018+36
+	bne	.L2004
+	ldr	r2, .L2022+36
 	str	r3, [sp, #12]
 	ldr	r1, [r2, #72]
 	adds	r1, r1, #1
 	str	r1, [r2, #72]
-	b	.L2001
-.L2000:
+	b	.L2005
+.L2004:
 	cmp	r3, #256
-	bne	.L2001
+	bne	.L2005
 	ldr	r0, [r2, #4]
 	movw	r6, #2049
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	str	r0, [sp, #56]
 	bl	FtlGcRefreshBlock
-.L2003:
+.L2007:
 	subs	r6, r6, #1
-	beq	.L2002
+	beq	.L2006
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
-	ldr	r1, .L2018+40
+	ldr	r1, .L2022+40
 	ldr	r2, [sp, #56]
 	ldrh	r3, [r1, #0]
 	cmp	r3, r2
-	beq	.L2003
-.L2002:
+	beq	.L2007
+.L2006:
 	bl	FtlSysFlush
-.L2001:
+.L2005:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
 	cmp	r3, r5
-	bne	.L2004
+	bne	.L2008
 	ldr	r6, [sp, #60]
 	movs	r5, #0
-.L2013:
+.L2017:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L2005
-	ldr	r3, .L2018+44
+	bne	.L2009
+	ldr	r3, .L2022+44
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1986
+	cbz	r3, .L1990
 	ldr	r0, [sp, #8]
 	movs	r1, #1
 	bl	rk_ftl_garbage_collect
-	b	.L1986
-.L2006:
+	b	.L1990
+.L2010:
 	mov	r3, #-1
-.L2007:
+.L2011:
 	str	r3, [sp, #12]
-.L1986:
+.L1990:
 	ldr	r0, [sp, #12]
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2019:
+.L2023:
 	.align	2
-.L2018:
-	.word	.LANCHOR84
+.L2022:
+	.word	.LANCHOR72
 	.word	.LANCHOR225
 	.word	.LANCHOR163
 	.word	.LANCHOR177
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR74
+	.word	.LANCHOR62
 	.word	.LANCHOR185
-	.word	.LANCHOR53
-	.word	.LANCHOR144
+	.word	.LANCHOR41
+	.word	.LANCHOR132
 	.word	.LANCHOR202
-	.word	.LANCHOR151
-	.word	.LANCHOR71
+	.word	.LANCHOR139
+	.word	.LANCHOR59
 	.size	ftl_read, .-ftl_read
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
 	.align	1
@@ -18320,16 +18361,16 @@ FlashReadFacBbtData:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
 	mov	r3, r2
-	ldr	r2, .L2029
+	ldr	r2, .L2033
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r6, r1
 	ldrh	sl, [r2, #14]
 	sub	sp, sp, #48
 	ldrh	r1, [r2, #12]
 	mov	r4, r0
-	ldr	r2, .L2029+4
+	ldr	r2, .L2033+4
 	movw	fp, #61664
-	ldr	r7, .L2029+8
+	ldr	r7, .L2033+8
 	mul	sl, sl, r1
 	ldr	r2, [r2, #0]
 	str	r2, [sp, #20]
@@ -18340,8 +18381,8 @@ FlashReadFacBbtData:
 	str	r2, [sp, #24]
 	uxth	r5, r5
 	sub	sl, sl, #15
-	b	.L2021
-.L2027:
+	b	.L2025
+.L2031:
 	add	r2, r5, r8
 	movs	r1, #1
 	add	r0, sp, #12
@@ -18353,19 +18394,19 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L2022
+	beq	.L2026
 	ldr	r2, [r7, #0]
 	ldrh	r2, [r2, #0]
 	cmp	r2, fp
-	bne	.L2022
-	cbz	r4, .L2028
-	cbnz	r6, .L2024
-	ldr	r2, .L2029+4
+	bne	.L2026
+	cbz	r4, .L2032
+	cbnz	r6, .L2028
+	ldr	r2, .L2033+4
 	movs	r0, #1
-	ldr	r5, .L2029+12
+	ldr	r5, .L2033+12
 	ldr	r2, [r2, #0]
-	b	.L2025
-.L2026:
+	b	.L2029
+.L2030:
 	ubfx	r1, r6, #5, #16
 	and	r7, r6, #31
 	adds	r6, r6, #1
@@ -18374,43 +18415,43 @@ FlashReadFacBbtData:
 	uxth	r6, r6
 	orr	r7, lr, r7
 	str	r7, [r2, r1, lsl #2]
-.L2025:
+.L2029:
 	ldr	r1, [r5, #0]
 	cmp	r6, r1
-	bcc	.L2026
-.L2024:
-	ldr	r2, .L2029+4
+	bcc	.L2030
+.L2028:
+	ldr	r2, .L2033+4
 	mov	r0, r4
 	ldr	r1, [r2, #0]
 	mov	r2, r3
 	bl	memcpy
 	movs	r2, #4
-	ldr	r0, .L2029+16
+	ldr	r0, .L2033+16
 	mov	r1, r4
 	mov	r3, r2
 	bl	rknand_print_hex
 	movs	r0, #0
-	b	.L2023
-.L2022:
+	b	.L2027
+.L2026:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L2021:
+.L2025:
 	cmp	sl, r5
-	ble	.L2027
+	ble	.L2031
 	mov	r0, #-1
-	b	.L2023
-.L2028:
+	b	.L2027
+.L2032:
 	mov	r0, r4
-.L2023:
+.L2027:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2030:
+.L2034:
 	.align	2
-.L2029:
+.L2033:
 	.word	.LANCHOR28
-	.word	.LANCHOR44
+	.word	.LANCHOR146
 	.word	.LANCHOR241
-	.word	.LANCHOR46
+	.word	.LANCHOR148
 	.word	.LC50
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
@@ -18424,8 +18465,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L2038
-	ldr	r6, .L2038+4
+	ldr	r3, .L2042
+	ldr	r6, .L2042+4
 	ldr	r3, [r3, #0]
 	ldr	r0, [r6, #0]
 	ldrb	r2, [r3, #13]	@ zero_extendqisi2
@@ -18436,45 +18477,45 @@ FlashGetBadBlockList:
 	lsrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	beq	.L2037
+	beq	.L2041
 	movs	r2, #0
 	lsrs	r0, r4, #4
 	ldr	r6, [r6, #0]
 	mov	r3, r2
 	subs	r4, r4, #1
 	movs	r1, #1
-	b	.L2033
-.L2035:
+	b	.L2037
+.L2039:
 	lsrs	r7, r2, #5
 	and	ip, r2, #31
 	lsl	ip, r1, ip
 	ldr	r7, [r6, r7, lsl #2]
 	tst	ip, r7
-	beq	.L2034
+	beq	.L2038
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L2034:
+.L2038:
 	cmp	r3, r0
-	bcs	.L2037
+	bcs	.L2041
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L2033:
-	cmp	r2, r4
-	blt	.L2035
-	b	.L2032
 .L2037:
+	cmp	r2, r4
+	blt	.L2039
+	b	.L2036
+.L2041:
 	movs	r3, #0
-.L2032:
+.L2036:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L2039:
+.L2043:
 	.align	2
-.L2038:
+.L2042:
 	.word	.LANCHOR23
-	.word	.LANCHOR41
+	.word	.LANCHOR143
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
 	.section	.text.FtlMakeBbt,"ax",%progbits
 	.align	1
@@ -18485,24 +18526,24 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2059
+	ldr	r3, .L2063
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r4, [r3, #0]
 	cmp	r4, #0
-	bne	.L2041
-	ldr	r5, .L2059+4
+	bne	.L2045
+	ldr	r5, .L2063+4
 	bl	FtlBbtMemInit
-	ldr	r6, .L2059+8
+	ldr	r6, .L2063+8
 	bl	FtlLoadFactoryBbt
 	add	r2, r5, #12
 	str	r2, [sp, #4]
-	b	.L2042
-.L2048:
-	ldr	r3, .L2059+12
+	b	.L2046
+.L2052:
+	ldr	r3, .L2063+12
 	ldr	r2, [sp, #4]
-	ldr	r8, .L2059+24
+	ldr	r8, .L2063+24
 	ldr	r0, [r3, #0]
-	ldr	r3, .L2059+16
+	ldr	r3, .L2063+16
 	str	r0, [r8, #8]
 	ldr	sl, [r3, #0]
 	ldrh	r3, [r2], #2
@@ -18510,7 +18551,7 @@ FtlMakeBbt:
 	str	r2, [sp, #4]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L2043
+	beq	.L2047
 	ldrh	r7, [r6, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -18525,8 +18566,8 @@ FtlMakeBbt:
 	ldr	r1, [r8, #8]
 	lsrs	r2, r2, #3
 	bl	memcpy
-	b	.L2044
-.L2043:
+	b	.L2048
+.L2047:
 	mov	r1, r4
 	bl	FlashGetBadBlockList
 	ldr	r1, [r5, #28]
@@ -18539,20 +18580,20 @@ FtlMakeBbt:
 	mov	r4, sl
 	mov	sl, r3
 	uxth	fp, fp
-	b	.L2057
-.L2046:
+	b	.L2061
+.L2050:
 	add	fp, fp, #-1
 	uxth	fp, fp
-.L2057:
+.L2061:
 	ldrh	r0, [r6, #0]
 	mla	r0, r5, r0, fp
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2046
+	beq	.L2050
 	ldr	r3, [sp, #4]
 	movs	r1, #0
-	ldr	r2, .L2059+16
+	ldr	r2, .L2063+16
 	strh	fp, [r3, #-2]	@ movhi
 	ldr	r0, [r2, #0]
 	movs	r2, #16
@@ -18570,89 +18611,89 @@ FtlMakeBbt:
 	ldr	r1, [sl, #28]
 	lsls	r3, r7, #10
 	str	r3, [r8, #4]
-	ldr	r3, .L2059+20
+	ldr	r3, .L2063+20
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memcpy
 	movs	r1, #1
 	mov	r2, r1
-	ldr	r0, .L2059+24
+	ldr	r0, .L2063+24
 	bl	FlashEraseBlocks
 	movs	r1, #1
 	mov	r3, r1
-	ldr	r0, .L2059+24
+	ldr	r0, .L2063+24
 	mov	r2, r1
 	bl	FlashProgPages
 	ldr	r3, [r8, #0]
 	adds	r3, r3, #1
-	bne	.L2058
+	bne	.L2062
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-	b	.L2057
-.L2058:
+	b	.L2061
+.L2062:
 	mov	r4, r5
 	mov	r5, sl
-.L2044:
+.L2048:
 	uxth	r0, r7
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	adds	r5, r5, #4
-.L2042:
-	ldr	r2, .L2059+28
+.L2046:
+	ldr	r2, .L2063+28
 	ldrh	r3, [r2, #0]
 	cmp	r4, r3
-	bcc	.L2048
+	bcc	.L2052
 	movs	r4, #0
-	ldr	r5, .L2059+32
-	b	.L2049
-.L2050:
+	ldr	r5, .L2063+32
+	b	.L2053
+.L2054:
 	mov	r0, r4
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	uxth	r4, r4
-.L2049:
+.L2053:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L2050
-	ldr	r5, .L2059+4
+	bhi	.L2054
+	ldr	r5, .L2063+4
 	movw	r6, #65535
 	ldrh	r4, [r5, #12]
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L2051
-.L2056:
+	b	.L2055
+.L2060:
 	mov	r0, r4
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L2052
+	beq	.L2056
 	mov	r0, r4
 	bl	FlashTestBlk
-	cbz	r0, .L2053
+	cbz	r0, .L2057
 	mov	r0, r4
 	bl	FtlBbmMapBadBlock
-	b	.L2052
-.L2053:
+	b	.L2056
+.L2057:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r6
-	bne	.L2054
+	bne	.L2058
 	strh	r4, [r5, #0]	@ movhi
-	b	.L2052
-.L2054:
-	ldr	r3, .L2059+4
+	b	.L2056
+.L2058:
+	ldr	r3, .L2063+4
 	strh	r4, [r3, #4]	@ movhi
-	b	.L2055
-.L2052:
+	b	.L2059
+.L2056:
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L2051:
+.L2055:
 	ldrh	r3, [r5, #12]
 	subs	r3, r3, #47
 	cmp	r3, r4
-	ble	.L2056
-.L2055:
-	ldr	r4, .L2059+4
+	ble	.L2060
+.L2059:
+	ldr	r4, .L2063+4
 	movs	r5, #0
-	ldr	r3, .L2059+36
+	ldr	r3, .L2063+36
 	movs	r2, #2
 	movs	r1, #1
 	str	r5, [r4, #8]
@@ -18679,22 +18720,22 @@ FtlMakeBbt:
 	strh	r2, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-.L2041:
+.L2045:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L2060:
+.L2064:
 	.align	2
-.L2059:
-	.word	.LANCHOR94
-	.word	.LANCHOR90
-	.word	.LANCHOR66
-	.word	.LANCHOR98
+.L2063:
+	.word	.LANCHOR82
+	.word	.LANCHOR78
+	.word	.LANCHOR54
+	.word	.LANCHOR86
 	.word	.LANCHOR184
-	.word	.LANCHOR91
+	.word	.LANCHOR79
 	.word	.LANCHOR198
-	.word	.LANCHOR60
-	.word	.LANCHOR75
-	.word	.LANCHOR95
+	.word	.LANCHOR48
+	.word	.LANCHOR63
+	.word	.LANCHOR83
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -18705,48 +18746,48 @@ FtlMakeBbt:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2082
+	ldr	r3, .L2086
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L2062
-	ldr	r2, .L2082+4
+	bne	.L2066
+	ldr	r2, .L2086+4
 	str	r3, [r2, #0]
-	ldr	r2, .L2082+8
+	ldr	r2, .L2086+8
 	str	r3, [r2, #0]
-	ldr	r3, .L2082+12
+	ldr	r3, .L2086+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2063
+	cbz	r0, .L2067
 	bl	FtlMakeBbt
-.L2063:
-	ldr	r3, .L2082+16
-	ldr	r2, .L2082+20
+.L2067:
+	ldr	r3, .L2086+16
+	ldr	r2, .L2086+20
 	ldrh	r4, [r3, #0]
-	ldr	r3, .L2082+24
+	ldr	r3, .L2086+24
 	lsls	r4, r4, #7
 	ldr	r0, [r3, #0]
-	ldr	r3, .L2082+28
+	ldr	r3, .L2086+28
 	ldr	r1, [r3, #0]
 	movs	r3, #0
-	b	.L2064
-.L2065:
+	b	.L2068
+.L2069:
 	mvns	r5, r3
 	orr	r5, r3, r5, lsl #16
 	str	r5, [r0, r3, lsl #2]
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L2064:
+.L2068:
 	cmp	r3, r4
-	blt	.L2065
-	ldr	r3, .L2082+32
+	blt	.L2069
+	ldr	r3, .L2086+32
 	movs	r4, #0
-	ldr	r6, .L2082+36
+	ldr	r6, .L2086+36
 	ldrh	r5, [r3, #0]
-	b	.L2066
-.L2067:
+	b	.L2070
+.L2071:
 	mov	r0, r5
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -18754,47 +18795,47 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2066:
+.L2070:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2067
-	ldr	r3, .L2082+40
+	bhi	.L2071
+	ldr	r3, .L2086+40
 	ldrh	r1, [r3, #0]
 	subs	r3, r4, #2
 	cmp	r3, r1, lsl #1
-	bgt	.L2068
-.L2072:
+	bgt	.L2072
+.L2076:
 	movs	r4, #0
-	ldr	r6, .L2082+32
+	ldr	r6, .L2086+32
 	mov	r5, r4
-	b	.L2069
-.L2068:
+	b	.L2073
+.L2072:
 	mov	r0, r4
-	ldr	r5, .L2082+36
+	ldr	r5, .L2086+36
 	bl	__aeabi_uidiv
-	ldr	r3, .L2082+44
+	ldr	r3, .L2086+44
 	ldr	r3, [r3, #0]
 	adds	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-	ldr	r3, .L2082+12
+	ldr	r3, .L2086+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
-	ldr	r3, .L2082+32
+	ldr	r3, .L2086+32
 	ldrh	r4, [r3, #0]
-	b	.L2070
-.L2071:
+	b	.L2074
+.L2075:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L2070:
+.L2074:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L2071
-	b	.L2072
-.L2073:
+	bhi	.L2075
+	b	.L2076
+.L2077:
 	mov	r0, r5
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
@@ -18802,19 +18843,19 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2069:
+.L2073:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2073
-	ldr	r3, .L2082+36
-	ldr	r8, .L2082+68
-	ldr	sl, .L2082+72
+	bhi	.L2077
+	ldr	r3, .L2086+36
+	ldr	r8, .L2086+68
+	ldr	sl, .L2086+72
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2082+48
+	ldr	r3, .L2086+48
 	str	r2, [r3, #0]
-	ldr	r3, .L2082+52
+	ldr	r3, .L2086+52
 	ldr	fp, [r3, #0]
-	ldr	r3, .L2082+40
+	ldr	r3, .L2086+40
 	mov	r0, fp
 	ldrh	r5, [r3, #0]
 	mov	r1, r5
@@ -18827,7 +18868,7 @@ FtlLowFormat:
 	muls	r3, r5, r3
 	cmp	r4, r3
 	str	r0, [sl, #0]
-	ble	.L2074
+	ble	.L2078
 	rsb	r0, r4, fp
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -18835,113 +18876,113 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r8, #0]	@ movhi
-.L2074:
-	ldr	r3, .L2082+56
+.L2078:
+	ldr	r3, .L2086+56
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L2075
+	bne	.L2079
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2082+68
+	ldr	r8, .L2086+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2075:
-	ldr	r3, .L2082+60
+.L2079:
+	ldr	r3, .L2086+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2076
+	cbz	r3, .L2080
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2082+68
+	ldr	r8, .L2086+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2076:
-	ldr	r3, .L2082+64
+.L2080:
+	ldr	r3, .L2086+64
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L2077
-	ldr	r2, .L2082+68
+	cbz	r3, .L2081
+	ldr	r2, .L2086+68
 	ldrh	r1, [r2, #0]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2, #0]	@ movhi
 	mul	r1, r5, r3
 	cmp	r1, r4
-	ble	.L2077
-	ldr	r1, .L2082+72
+	ble	.L2081
+	ldr	r1, .L2086+72
 	adds	r3, r3, #32
 	adds	r7, r7, r3
 	strh	r7, [r2, #0]	@ movhi
 	str	r6, [r1, #0]
-.L2077:
-	ldr	r3, .L2082+72
-	ldr	r2, .L2082+68
-	ldr	r6, .L2082+76
+.L2081:
+	ldr	r3, .L2086+72
+	ldr	r2, .L2086+68
+	ldr	r6, .L2086+76
 	ldr	r1, [r3, #0]
 	ldrh	r2, [r2, #0]
-	ldr	r4, .L2082+80
+	ldr	r4, .L2086+80
 	subs	r2, r1, r2
 	muls	r5, r2, r5
-	ldr	r2, .L2082+84
+	ldr	r2, .L2086+84
 	str	r5, [r2, #0]
-	ldr	r2, .L2082+88
+	ldr	r2, .L2086+88
 	ldrh	r2, [r2, #0]
 	muls	r5, r2, r5
 	str	r5, [r3, #0]
-	ldr	r3, .L2082+16
+	ldr	r3, .L2086+16
 	ldrh	r3, [r3, #0]
 	muls	r5, r3, r5
-	ldr	r3, .L2082+92
+	ldr	r3, .L2086+92
 	str	r5, [r3, #0]
 	movw	r5, #65535
 	bl	FtlBbmTblFlush
-	ldr	r3, .L2082+36
+	ldr	r3, .L2086+36
 	movs	r1, #0
 	ldr	r0, [r6, #0]
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r2, .L2082+96
+	ldr	r2, .L2086+96
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
 	movs	r1, #255
 	str	r3, [r2, #0]
-	ldr	r2, .L2082+100
+	ldr	r2, .L2086+100
 	strh	r3, [r4, #0]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
 	strb	r3, [r2, #8]
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	ldr	r3, .L2082+32
+	ldr	r3, .L2086+32
 	strh	r5, [r2, #0]	@ movhi
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2082+104
+	ldr	r3, .L2086+104
 	lsrs	r2, r2, #3
 	ldr	r0, [r3, #0]
 	bl	memset
-.L2078:
-	ldr	r7, .L2082+80
+.L2082:
+	ldr	r7, .L2086+80
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r3, .L2082+76
-	cbnz	r2, .L2079
+	ldr	r3, .L2086+76
+	cbnz	r2, .L2083
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r6, #0]
 	strh	r5, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2078
-.L2079:
-	ldr	r2, .L2082+4
+	b	.L2082
+.L2083:
+	ldr	r2, .L2086+4
 	movw	r6, #65535
-	ldr	r4, .L2082+108
+	ldr	r4, .L2086+108
 	ldrh	r0, [r7, #4]
 	ldr	r1, [r2, #0]
 	str	r1, [r7, #12]
@@ -18959,53 +19000,53 @@ FtlLowFormat:
 	strh	r2, [r4, #0]	@ movhi
 	movs	r2, #1
 	strb	r2, [r4, #8]
-.L2080:
-	ldr	r5, .L2082+108
+.L2084:
+	ldr	r5, .L2086+108
 	mov	r0, r5
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2081
+	bne	.L2085
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r7, #0]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2080
-.L2083:
+	b	.L2084
+.L2087:
 	.align	2
-.L2082:
-	.word	.LANCHOR94
+.L2086:
+	.word	.LANCHOR82
 	.word	.LANCHOR156
 	.word	.LANCHOR157
-	.word	.LANCHOR54
-	.word	.LANCHOR71
+	.word	.LANCHOR42
+	.word	.LANCHOR59
 	.word	168778952
 	.word	.LANCHOR182
 	.word	.LANCHOR183
-	.word	.LANCHOR55
-	.word	.LANCHOR56
-	.word	.LANCHOR53
-	.word	.LANCHOR81
-	.word	.LANCHOR89
-	.word	.LANCHOR57
-	.word	.LANCHOR128
+	.word	.LANCHOR43
+	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR69
+	.word	.LANCHOR77
+	.word	.LANCHOR45
+	.word	.LANCHOR116
 	.word	.LANCHOR7
-	.word	.LANCHOR64
+	.word	.LANCHOR52
 	.word	.LANCHOR201
-	.word	.LANCHOR88
-	.word	.LANCHOR101
-	.word	.LANCHOR109
+	.word	.LANCHOR76
+	.word	.LANCHOR89
+	.word	.LANCHOR97
 	.word	.LANCHOR200
-	.word	.LANCHOR68
-	.word	.LANCHOR84
-	.word	.LANCHOR118
+	.word	.LANCHOR56
+	.word	.LANCHOR72
+	.word	.LANCHOR106
 	.word	.LANCHOR202
-	.word	.LANCHOR119
-	.word	.LANCHOR110
-.L2081:
-	ldr	r4, .L2084
+	.word	.LANCHOR107
+	.word	.LANCHOR98
+.L2085:
+	ldr	r4, .L2088
 	ldrh	r1, [r5, #4]
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r4, #0]
@@ -19013,16 +19054,16 @@ FtlLowFormat:
 	adds	r3, r3, #1
 	str	r3, [r4, #0]
 	movw	r5, #65535
-	ldr	r3, .L2084+4
+	ldr	r3, .L2088+4
 	ldr	r3, [r3, #0]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2084+8
+	ldr	r3, .L2088+8
 	strh	r5, [r3, #0]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2084+12
+	ldr	r3, .L2088+12
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, .L2084+16
+	ldr	r2, .L2088+16
 	strh	r5, [r3, #4]	@ movhi
 	ldr	r2, [r2, #0]
 	strh	r2, [r3, #6]	@ movhi
@@ -19033,19 +19074,19 @@ FtlLowFormat:
 	strh	r0, [r3, #0]	@ movhi
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2062
-	ldr	r3, .L2084+20
+	cbnz	r0, .L2066
+	ldr	r3, .L2088+20
 	movs	r2, #1
 	str	r2, [r3, #0]
-.L2062:
+.L2066:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2085:
+.L2089:
 	.align	2
-.L2084:
+.L2088:
 	.word	.LANCHOR156
-	.word	.LANCHOR101
-	.word	.LANCHOR111
+	.word	.LANCHOR89
+	.word	.LANCHOR99
 	.word	.LANCHOR196
 	.word	.LANCHOR200
 	.word	.LANCHOR225
@@ -19059,7 +19100,7 @@ FtlLowFormat:
 HynixGetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2175
+	ldr	r3, .L2179
 	movs	r2, #172
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
@@ -19073,16 +19114,16 @@ HynixGetReadRetryDefault:
 	strb	r0, [r3, #5]
 	strb	r1, [r3, #6]
 	strb	r2, [r3, #7]
-	bne	.L2087
+	bne	.L2091
 	movs	r2, #167
 	strb	r2, [r3, #4]
-	ldr	r3, .L2175+4
+	ldr	r3, .L2179+4
 	movs	r2, #247
 	strb	r2, [r3, #17]
-	b	.L2142
-.L2087:
+	b	.L2146
+.L2091:
 	cmp	r4, #3
-	bne	.L2089
+	bne	.L2093
 	movs	r2, #176
 	strb	r2, [r3, #4]
 	movs	r2, #177
@@ -19098,10 +19139,10 @@ HynixGetReadRetryDefault:
 	movs	r2, #182
 	strb	r2, [r3, #10]
 	movs	r2, #183
-	b	.L2169
-.L2089:
+	b	.L2173
+.L2093:
 	cmp	r4, #4
-	bne	.L2090
+	bne	.L2094
 	movs	r5, #204
 	strb	r0, [r3, #9]
 	strb	r5, [r3, #4]
@@ -19114,14 +19155,14 @@ HynixGetReadRetryDefault:
 	strb	r5, [r3, #7]
 	movs	r5, #205
 	strb	r5, [r3, #8]
-.L2169:
+.L2173:
 	movs	r6, #8
 	strb	r2, [r3, #11]
 	mov	r5, r6
-	b	.L2088
-.L2090:
+	b	.L2092
+.L2094:
 	cmp	r4, #5
-	bne	.L2091
+	bne	.L2095
 	movs	r2, #56
 	movs	r6, #8
 	strb	r2, [r3, #4]
@@ -19131,10 +19172,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #59
 	strb	r2, [r3, #7]
-	b	.L2168
-.L2091:
+	b	.L2172
+.L2095:
 	cmp	r4, #6
-	bne	.L2092
+	bne	.L2096
 	movs	r2, #14
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -19144,10 +19185,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #17
 	strb	r2, [r3, #7]
-	b	.L2168
-.L2092:
+	b	.L2172
+.L2096:
 	cmp	r4, #7
-	bne	.L2142
+	bne	.L2146
 	movs	r2, #176
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -19170,21 +19211,21 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #12]
 	movs	r2, #213
 	strb	r2, [r3, #13]
-	b	.L2088
-.L2142:
+	b	.L2092
+.L2146:
 	movs	r6, #7
-.L2168:
+.L2172:
 	movs	r5, #4
-.L2088:
+.L2092:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L2164
-	b	.L2173
-.L2099:
-	ldr	r3, .L2175+8
+	bhi	.L2168
+	b	.L2177
+.L2103:
+	ldr	r3, .L2179+8
 	mov	sl, #0
-	ldr	r1, .L2175+12
-	ldr	r4, .L2175+16
+	ldr	r1, .L2179+12
+	ldr	r4, .L2179+16
 	ldrb	r2, [r3, r7]	@ zero_extendqisi2
 	ldr	r0, [r1, r2, lsl #3]
 	add	r4, r4, r2, lsl #6
@@ -19193,7 +19234,7 @@ HynixGetReadRetryDefault:
 	movs	r2, #55
 	adds	r3, r3, #8
 	add	r3, r0, r3, lsl #8
-.L2095:
+.L2099:
 	add	r1, r8, sl
 	str	r2, [r3, #8]
 	movs	r0, #80
@@ -19209,26 +19250,26 @@ HynixGetReadRetryDefault:
 	ldr	r2, [sp, #8]
 	uxtb	r1, sl
 	cmp	r1, r5
-	bcc	.L2095
+	bcc	.L2099
 	movs	r3, #0
-	b	.L2096
-.L2097:
+	b	.L2100
+.L2101:
 	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
 	ldrb	r0, [r4, r3]	@ zero_extendqisi2
 	add	r0, ip, r0
 	strb	r0, [r1, r2, lsl #3]
 	adds	r2, r2, #1
 	cmp	r2, #7
-	bne	.L2097
+	bne	.L2101
 	adds	r3, r3, #1
 	cmp	r3, #4
-	beq	.L2098
-.L2096:
+	beq	.L2102
+.L2100:
 	movs	r2, #1
 	adds	r1, r4, r3
 	add	sl, fp, r3
-	b	.L2097
-.L2098:
+	b	.L2101
+.L2102:
 	adds	r7, r7, #1
 	movs	r3, #0
 	strb	r3, [r4, #16]
@@ -19239,21 +19280,21 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L2093
-.L2173:
-	ldr	r8, .L2175
+	b	.L2097
+.L2177:
+	ldr	r8, .L2179
 	movs	r7, #0
-	ldr	fp, .L2175+4
-.L2093:
-	ldr	r3, .L2175+20
+	ldr	fp, .L2179+4
+.L2097:
+	ldr	r3, .L2179+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, r7
-	bhi	.L2099
-	b	.L2100
-.L2164:
+	bhi	.L2103
+	b	.L2104
+.L2168:
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L2100
+	bhi	.L2104
 	smulbb	r3, r5, r6
 	str	r6, [sp, #48]
 	asrs	r2, r3, #2
@@ -19265,12 +19306,12 @@ HynixGetReadRetryDefault:
 	str	r2, [sp, #24]
 	uxtb	r3, r3
 	str	r3, [sp, #56]
-	b	.L2101
-.L2141:
-	ldr	r3, .L2175+8
+	b	.L2105
+.L2145:
+	ldr	r3, .L2179+8
 	ldr	fp, [sp, #20]
 	ldrb	r6, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2175+12
+	ldr	r3, .L2179+12
 	mov	r0, r6
 	ldr	sl, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
@@ -19283,46 +19324,46 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	r4, #7
 	sxth	r3, r6
-	beq	.L2102
-	ldr	r1, .L2175+16
+	beq	.L2106
+	ldr	r1, .L2179+16
 	add	r3, r1, r3, lsl #6
-	b	.L2170
-.L2102:
+	b	.L2174
+.L2106:
 	lsls	r1, r3, #7
 	add	r3, r1, r3, lsl #5
-	ldr	r1, .L2175+24
+	ldr	r1, .L2179+24
 	adds	r3, r1, r3
-.L2170:
+.L2174:
 	str	r3, [sp, #32]
 	movs	r3, #54
 	cmp	r4, #4
 	str	r3, [r7, #8]
-	bne	.L2104
+	bne	.L2108
 	movs	r3, #255
 	str	r3, [r7, #4]
 	movs	r3, #64
 	str	r3, [sl, r8]
 	movs	r3, #204
-	b	.L2171
-.L2104:
+	b	.L2175
+.L2108:
 	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L2106
-	ldr	r3, .L2175
+	bhi	.L2110
+	ldr	r3, .L2179
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r7, #4]
 	movs	r3, #82
-	b	.L2172
-.L2106:
+	b	.L2176
+.L2110:
 	movs	r3, #174
 	str	r3, [r7, #4]
 	movs	r3, #0
 	str	r3, [sl, r8]
 	movs	r3, #176
-.L2171:
+.L2175:
 	str	r3, [r7, #4]
 	movs	r3, #77
-.L2172:
+.L2176:
 	str	r3, [sl, r8]
 	movs	r3, #22
 	str	r3, [r7, #8]
@@ -19352,71 +19393,71 @@ HynixGetReadRetryDefault:
 	mov	r1, ip
 	str	ip, [sp, #36]
 	cmp	r1, #1
-	bls	.L2144
+	bls	.L2148
 	cmp	r4, #7
 	ite	eq
 	moveq	r1, #32
 	movne	r1, #2
-	b	.L2110
-.L2144:
+	b	.L2114
+.L2148:
 	movs	r1, #16
-.L2110:
-	ldr	r3, .L2175+28
+.L2114:
+	ldr	r3, .L2179+28
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-.L2111:
+.L2115:
 	ldr	r0, [r7, #0]
 	strb	r0, [r2, r3]
 	adds	r3, r3, #1
 	uxtb	r0, r3
 	cmp	r0, r1
-	bcc	.L2111
+	bcc	.L2115
 	cmp	r4, #7
-	bne	.L2112
+	bne	.L2116
 	movs	r3, #0
-.L2114:
+.L2118:
 	ldrb	r1, [r2, #0]	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2113
+	beq	.L2117
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	cmp	r1, #10
-	beq	.L2113
+	beq	.L2117
 	adds	r3, r3, #1
 	adds	r2, r2, #4
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2114
-	b	.L2115
-.L2113:
+	bne	.L2118
+	b	.L2119
+.L2117:
 	cmp	r3, #6
-	bls	.L2116
-.L2115:
-	ldr	r0, .L2175+32
+	bls	.L2120
+.L2119:
+	ldr	r0, .L2179+32
 	movs	r1, #0
 	bl	printf
-.L2117:
-	b	.L2117
-.L2112:
+.L2121:
+	b	.L2121
+.L2116:
 	cmp	r4, #6
-	bne	.L2116
+	bne	.L2120
 	movs	r3, #0
-.L2118:
+.L2122:
 	ldrb	r1, [r2], #1	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2116
+	beq	.L2120
 	ldrb	r1, [r2, #7]	@ zero_extendqisi2
 	cmp	r1, #4
-	beq	.L2116
+	beq	.L2120
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2118
-	b	.L2174
-.L2120:
-	b	.L2120
-.L2176:
+	bne	.L2122
+	b	.L2178
+.L2124:
+	b	.L2124
+.L2180:
 	.align	2
-.L2175:
+.L2179:
 	.word	.LANCHOR31
 	.word	.LANCHOR242
 	.word	.LANCHOR19
@@ -19424,22 +19465,22 @@ HynixGetReadRetryDefault:
 	.word	.LANCHOR31+20
 	.word	.LANCHOR16
 	.word	.LANCHOR31+28
-	.word	.LANCHOR44
+	.word	.LANCHOR146
 	.word	.LC51
-.L2116:
-	ldr	r0, .L2177
+.L2120:
+	ldr	r0, .L2181
 	movs	r3, #0
 	ldr	r0, [r0, #0]
 	str	r0, [sp, #40]
-.L2121:
+.L2125:
 	ldr	r2, [r7, #0]
 	ldr	r1, [sp, #40]
 	strb	r2, [r1, r3]
 	adds	r3, r3, #1
 	ldr	r2, [sp, #52]
 	cmp	r3, r2
-	blt	.L2121
-	ldr	r3, .L2177
+	blt	.L2125
+	ldr	r3, .L2181
 	movs	r2, #8
 	ldr	ip, [sp, #24]
 	ldr	r1, [r3, #0]
@@ -19447,10 +19488,10 @@ HynixGetReadRetryDefault:
 	lsl	fp, ip, #3
 	str	r0, [sp, #44]
 	adds	r0, r1, r0
-.L2123:
+.L2127:
 	movs	r3, #0
 	mov	lr, r3
-.L2122:
+.L2126:
 	ldr	ip, [r0, r3]
 	add	lr, lr, #1
 	mvn	ip, ip
@@ -19458,15 +19499,15 @@ HynixGetReadRetryDefault:
 	ldr	ip, [sp, #24]
 	adds	r3, r3, #4
 	cmp	lr, ip
-	blt	.L2122
+	blt	.L2126
 	subs	r2, r2, #1
 	add	r0, r0, fp
-	bne	.L2123
+	bne	.L2127
 	mov	lr, r1
 	str	r2, [sp, #16]
 	str	r5, [sp, #60]
-	b	.L2124
-.L2128:
+	b	.L2128
+.L2132:
 	movs	r0, #1
 	mov	fp, #16
 	str	r3, [sp, #4]
@@ -19474,7 +19515,7 @@ HynixGetReadRetryDefault:
 	movs	r0, #0
 	mov	ip, r0
 	str	fp, [sp, #28]
-.L2126:
+.L2130:
 	ldr	fp, [lr, r0]
 	ldr	r3, [sp, #44]
 	and	fp, r5, fp
@@ -19485,92 +19526,92 @@ HynixGetReadRetryDefault:
 	addeq	ip, ip, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	bne	.L2126
+	bne	.L2130
 	ldr	r3, [sp, #4]
 	cmp	ip, #8
 	it	hi
 	orrhi	r2, r2, r5
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L2128
+	bne	.L2132
 	ldr	fp, [sp, #16]
 	ldr	ip, [sp, #24]
 	add	fp, fp, #1
 	str	r2, [lr], #4
 	cmp	fp, ip
 	str	fp, [sp, #16]
-	bge	.L2146
-.L2124:
+	bge	.L2150
+.L2128:
 	movs	r2, #0
 	mov	r3, r2
-	b	.L2128
-.L2146:
+	b	.L2132
+.L2150:
 	movs	r3, #0
 	ldr	r5, [sp, #60]
 	mov	r2, r3
-.L2129:
+.L2133:
 	ldr	r0, [r1, r3]
-	cbnz	r0, .L2130
+	cbnz	r0, .L2134
 	adds	r2, r2, #1
-.L2130:
+.L2134:
 	adds	r3, r3, #4
 	cmp	r3, #32
-	bne	.L2129
+	bne	.L2133
 	cmp	r2, #7
-	ble	.L2131
-	ldr	r0, .L2177+4
+	ble	.L2135
+	ldr	r0, .L2181+4
 	movs	r2, #1
 	mov	r3, #1024
 	bl	rknand_print_hex
-	ldr	r0, .L2177+8
+	ldr	r0, .L2181+8
 	movs	r1, #0
 	bl	printf
-.L2132:
-	b	.L2132
-.L2131:
+.L2136:
+	b	.L2136
+.L2135:
 	cmp	r4, #6
-	beq	.L2147
+	beq	.L2151
 	cmp	r4, #7
 	ite	eq
 	moveq	r0, #10
 	movne	r0, #8
 	str	r0, [sp, #16]
-	b	.L2133
-.L2147:
+	b	.L2137
+.L2151:
 	movs	r1, #4
 	str	r1, [sp, #16]
-.L2133:
-	cbz	r5, .L2134
+.L2137:
+	cbz	r5, .L2138
 	ldr	r2, [sp, #56]
 	add	lr, r2, #1
-	b	.L2135
-.L2134:
+	b	.L2139
+.L2138:
 	mov	lr, #1
-.L2135:
+.L2139:
 	ldr	r0, [sp, #40]
 	movs	r2, #0
 	ldr	r1, [sp, #32]
 	mov	fp, r4
-	b	.L2136
-.L2137:
+	b	.L2140
+.L2141:
 	ldrb	ip, [r4], #1	@ zero_extendqisi2
 	strb	ip, [r1, r3]
 	adds	r3, r3, #1
 	uxtb	ip, r3
 	cmp	ip, r5
-	bcc	.L2137
+	bcc	.L2141
 	ldr	ip, [sp, #48]
 	adds	r2, r2, #1
 	ldr	r3, [sp, #16]
 	add	r0, r0, lr
 	cmp	r2, ip
 	add	r1, r1, r3
-	bge	.L2138
-.L2136:
+	bge	.L2142
+.L2140:
 	mov	r4, r0
 	movs	r3, #0
-	b	.L2137
-.L2138:
+	b	.L2141
+.L2142:
 	movs	r3, #255
 	mov	r0, r6
 	str	r3, [r7, #8]
@@ -19578,10 +19619,10 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r1, [sp, #36]
 	cmp	r1, #1
-	bhi	.L2139
+	bhi	.L2143
 	movs	r3, #54
 	str	r3, [r7, #8]
-	ldr	r3, .L2177+12
+	ldr	r3, .L2181+12
 	mov	r1, #-1
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -19591,39 +19632,39 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r7, #8]
 	bl	FlashReadCmd
-	b	.L2140
-.L2139:
+	b	.L2144
+.L2143:
 	movs	r3, #56
 	str	r3, [r7, #8]
-.L2140:
+.L2144:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r2, [sp, #20]
 	adds	r3, r2, #1
 	uxtb	r3, r3
 	str	r3, [sp, #20]
-.L2101:
-	ldr	r0, .L2177+16
+.L2105:
+	ldr	r0, .L2181+16
 	ldr	r2, [sp, #20]
 	ldrb	r3, [r0, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bhi	.L2141
+	bhi	.L2145
 	ldr	r6, [sp, #48]
-.L2100:
-	ldr	r3, .L2177+12
+.L2104:
+	ldr	r3, .L2181+12
 	strb	r5, [r3, #1]
 	strb	r6, [r3, #2]
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2174:
+.L2178:
 	movs	r1, #0
-	ldr	r0, .L2177+8
+	ldr	r0, .L2181+8
 	bl	printf
-	b	.L2120
-.L2178:
+	b	.L2124
+.L2182:
 	.align	2
-.L2177:
-	.word	.LANCHOR44
+.L2181:
+	.word	.LANCHOR146
 	.word	.LC52
 	.word	.LC51
 	.word	.LANCHOR31
@@ -19641,75 +19682,75 @@ FlashGetReadRetryDefault:
 	@ link register save eliminated.
 	mov	r3, r0
 	cmp	r0, #0
-	beq	.L2179
+	beq	.L2183
 	subs	r2, r0, #1
 	cmp	r2, #6
-	bhi	.L2181
+	bhi	.L2185
 	b	HynixGetReadRetryDefault
-.L2181:
+.L2185:
 	cmp	r0, #49
-	bne	.L2182
-	ldr	r0, .L2190
+	bne	.L2186
+	ldr	r0, .L2194
 	movs	r2, #64
-	ldr	r1, .L2190+4
+	ldr	r1, .L2194+4
 	strb	r3, [r0, #0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2188
-.L2182:
+	b	.L2192
+.L2186:
 	cmp	r0, #33
-	beq	.L2183
+	beq	.L2187
 	cmp	r0, #65
-	beq	.L2183
+	beq	.L2187
 	cmp	r0, #66
-	bne	.L2184
-.L2183:
-	ldr	r0, .L2190
+	bne	.L2188
+.L2187:
+	ldr	r0, .L2194
 	strb	r3, [r0, #0]
 	movs	r3, #4
-	b	.L2189
-.L2184:
+	b	.L2193
+.L2188:
 	cmp	r0, #34
-	beq	.L2185
+	beq	.L2189
 	cmp	r0, #67
-	bne	.L2186
-.L2185:
-	ldr	r0, .L2190
+	bne	.L2190
+.L2189:
+	ldr	r0, .L2194
 	strb	r3, [r0, #0]
 	movs	r3, #5
-.L2189:
+.L2193:
 	strb	r3, [r0, #1]
 	movs	r2, #45
 	movs	r3, #7
-	ldr	r1, .L2190+8
+	ldr	r1, .L2194+8
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2188
-.L2186:
+	b	.L2192
+.L2190:
 	cmp	r0, #35
-	beq	.L2187
+	beq	.L2191
 	cmp	r0, #68
-	bne	.L2179
-.L2187:
-	ldr	r0, .L2190
+	bne	.L2183
+.L2191:
+	ldr	r0, .L2194
 	movs	r2, #95
-	ldr	r1, .L2190+12
+	ldr	r1, .L2194+12
 	strb	r3, [r0, #0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-.L2188:
+.L2192:
 	b	memcpy
-.L2179:
+.L2183:
 	bx	lr
-.L2191:
+.L2195:
 	.align	2
-.L2190:
+.L2194:
 	.word	.LANCHOR31
 	.word	.LANCHOR15
 	.word	.LANCHOR10
@@ -19729,51 +19770,51 @@ FlashInit:
 	sub	sp, sp, #24
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2238
+	ldr	r3, .L2242
 	movs	r5, #0
-	ldr	r8, .L2238+84
+	ldr	r8, .L2242+84
 	mov	r6, r5
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2238+4
+	ldr	r3, .L2242+4
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2238+8
+	ldr	r3, .L2242+8
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2238+12
+	ldr	r3, .L2242+12
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2238+16
-	ldr	r2, .L2238+20
+	ldr	r3, .L2242+16
+	ldr	r2, .L2242+20
 	str	r0, [r3, #0]
 	movs	r3, #50
 	strb	r3, [r2, #0]
 	mov	r0, r4
-	ldr	r2, .L2238+24
-	ldr	r4, .L2238+28
+	ldr	r2, .L2242+24
+	ldr	r4, .L2242+28
 	strb	r3, [r2, #0]
 	movs	r2, #128
-	ldr	r3, .L2238+32
+	ldr	r3, .L2242+32
 	mov	r7, r4
 	str	r5, [r3, #0]
-	ldr	r3, .L2238+36
+	ldr	r3, .L2242+36
 	str	r2, [r3, #0]
 	movs	r2, #60
-	ldr	r3, .L2238+40
+	ldr	r3, .L2242+40
 	strb	r5, [r3, #0]
-	ldr	r3, .L2238+44
+	ldr	r3, .L2242+44
 	str	r5, [r3, #0]
-	ldr	r3, .L2238+48
+	ldr	r3, .L2242+48
 	strb	r5, [r3, #0]
-	ldr	r3, .L2238+52
+	ldr	r3, .L2242+52
 	strb	r2, [r3, #0]
 	bl	NandcInit
-.L2197:
+.L2201:
 	uxtb	r3, r6
 	str	r3, [sp, #16]
 	mov	r0, r3
@@ -19814,10 +19855,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2193
+	bhi	.L2197
 	ldrb	r1, [r4, #2]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2238+56
+	ldr	r0, .L2242+56
 	str	r1, [sp, #0]
 	ldrb	r1, [r4, #3]	@ zero_extendqisi2
 	str	r1, [sp, #4]
@@ -19827,96 +19868,102 @@ FlashInit:
 	str	r1, [sp, #12]
 	adds	r1, r6, #1
 	bl	printf
-.L2193:
-	cbnz	r6, .L2194
+.L2197:
+	cbnz	r6, .L2198
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2231
+	bhi	.L2235
 	ldrb	r3, [r7, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2231
-.L2194:
+	beq	.L2235
+.L2198:
 	ldrb	r3, [r5, r7]	@ zero_extendqisi2
 	cmp	r3, #181
-	bne	.L2196
+	bne	.L2200
 	movs	r3, #44
 	strb	r3, [r5, r7]
-.L2196:
+.L2200:
 	adds	r6, r6, #1
 	adds	r5, r5, #8
 	adds	r4, r4, #8
 	cmp	r6, #4
-	bne	.L2197
-	ldr	r3, .L2238+28
+	bne	.L2201
+	ldr	r3, .L2242+28
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L2198
-	ldr	r3, .L2238+60
+	beq	.L2202
+	ldr	r3, .L2242+60
 	ldr	r0, [r3, #0]
 	bl	NandcSetDdrMode
-.L2198:
+.L2202:
 	movs	r1, #0
 	mov	r2, #852
-	ldr	r0, .L2238+64
+	ldr	r0, .L2242+64
 	bl	memset
-	ldr	r2, .L2238+68
-	ldr	r3, .L2238+72
+	ldr	r2, .L2242+68
+	ldr	r3, .L2242+72
 	str	r2, [r3, #0]
 	movs	r2, #0
-	ldr	r3, .L2238+76
+	ldr	r3, .L2242+76
 	strb	r2, [r3, #0]
-	ldr	r3, .L2238+28
-	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	ldr	r2, .L2242+28
+	ldrb	r3, [r2, #1]	@ zero_extendqisi2
+	cmp	r3, #161
+	beq	.L2203
 	cmp	r3, #241
-	beq	.L2199
+	beq	.L2203
 	cmp	r3, #218
-	beq	.L2199
+	beq	.L2203
 	cmp	r3, #220
-	bne	.L2200
-.L2199:
-	ldr	r2, .L2238+48
+	bne	.L2204
+	ldrb	r2, [r2, #3]	@ zero_extendqisi2
+	cmp	r2, #149
+	bne	.L2204
+.L2203:
+	ldr	r2, .L2242+48
 	movs	r1, #1
-	ldr	r0, .L2238+28
+	ldr	r0, .L2242+28
 	strb	r1, [r2, #0]
 	movs	r2, #16
-	ldr	r1, .L2238+20
+	ldr	r1, .L2242+20
 	ldrb	r4, [r0, #0]	@ zero_extendqisi2
 	strb	r2, [r1, #0]
 	cmp	r4, #152
-	ldr	r1, .L2238+52
+	ldr	r1, .L2242+52
 	strb	r2, [r1, #0]
-	ldr	r2, .L2238+80
+	ldr	r2, .L2242+80
 	strb	r4, [r2, #1]
-	bne	.L2201
+	strb	r3, [r2, #2]
+	bne	.L2205
 	ldrsb	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L2201
+	blt	.L2205
 	movs	r0, #24
 	strb	r0, [r1, #0]
-.L2201:
+.L2205:
 	cmp	r3, #218
-	bne	.L2202
+	bne	.L2206
 	mov	r1, #2048
-	b	.L2236
-.L2239:
+	b	.L2240
+.L2243:
 	.align	2
-.L2238:
-	.word	.LANCHOR44
-	.word	.LANCHOR41
+.L2242:
+	.word	.LANCHOR146
+	.word	.LANCHOR143
 	.word	.LANCHOR241
 	.word	.LANCHOR204
 	.word	.LANCHOR205
 	.word	.LANCHOR1
-	.word	.LANCHOR49
+	.word	.LANCHOR151
 	.word	.LANCHOR22
-	.word	.LANCHOR46
+	.word	.LANCHOR148
 	.word	.LANCHOR2
 	.word	.LANCHOR35
-	.word	.LANCHOR50
+	.word	.LANCHOR152
 	.word	.LANCHOR0
-	.word	.LANCHOR45
+	.word	.LANCHOR147
 	.word	.LC53
 	.word	.LANCHOR192
 	.word	.LANCHOR31
@@ -19925,110 +19972,110 @@ FlashInit:
 	.word	.LANCHOR4
 	.word	.LANCHOR243
 	.word	.LANCHOR5
-.L2202:
+.L2206:
 	cmp	r3, #220
-	bne	.L2203
+	bne	.L2207
 	mov	r1, #4096
-.L2236:
+.L2240:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L2203:
-	ldr	r1, .L2240
+.L2207:
+	ldr	r1, .L2244
 	movs	r2, #32
-	ldr	r0, .L2240+4
+	ldr	r0, .L2244+4
 	bl	memcpy
-	ldr	r0, .L2240+8
-	ldr	r1, .L2240+12
+	ldr	r0, .L2244+8
+	ldr	r1, .L2244+12
 	movs	r2, #32
 	bl	memcpy
-.L2200:
-	ldr	r3, .L2240+16
+.L2204:
+	ldr	r3, .L2244+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2204
+	bne	.L2208
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L2205
-	ldr	r3, .L2240+20
-	ldr	r4, .L2240+24
+	cbnz	r0, .L2209
+	ldr	r3, .L2244+20
+	ldr	r4, .L2244+24
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, #16]
 	ubfx	r0, r0, #8, #3
 	strb	r0, [r4, #0]
 	lsls	r2, r0, #31
-	bmi	.L2205
-	ldr	r3, .L2240+28
+	bmi	.L2209
+	ldr	r3, .L2244+28
 	movs	r2, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r4, #0]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L2205:
-	ldr	r4, .L2240+20
+.L2209:
+	ldr	r4, .L2244+20
 	ldr	r3, [r4, #0]
 	ldrb	r2, [r3, #26]	@ zero_extendqisi2
-	ldr	r3, .L2240+32
+	ldr	r3, .L2244+32
 	strb	r2, [r3, #0]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L2204
+	beq	.L2208
 	ldr	r3, [r4, #0]
-	ldr	r0, .L2240+36
+	ldr	r0, .L2244+36
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r3, r0, #1
-	beq	.L2195
+	beq	.L2199
 	bl	FlashDieInfoInit
 	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
-	ldr	r1, .L2240+40
+	ldr	r1, .L2244+40
 	ldr	r3, [r4, #0]
 	ldrh	r1, [r1, #0]
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	addw	r1, r1, #4095
 	cmp	r2, r1, lsr #12
-	blt	.L2206
+	blt	.L2210
 	ldrh	r1, [r3, #14]
 	adds	r1, r1, #255
 	cmp	r2, r1, lsr #8
-	bge	.L2207
-.L2206:
+	bge	.L2211
+.L2210:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L2207:
-	ldr	r3, .L2240+24
+.L2211:
+	ldr	r3, .L2244+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2208
+	beq	.L2212
 	bl	FlashSavePhyInfo
-	ldr	r3, .L2240+44
+	ldr	r3, .L2244+44
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2208:
+.L2212:
 	bl	FlashSavePhyInfo
-.L2204:
-	ldr	r5, .L2240+20
-	ldr	r2, .L2240+32
-	ldr	r4, .L2240+48
+.L2208:
+	ldr	r5, .L2244+20
+	ldr	r2, .L2244+32
+	ldr	r4, .L2244+48
 	ldr	r3, [r5, #0]
 	ldrb	r1, [r3, #26]	@ zero_extendqisi2
 	ldrb	r6, [r3, #18]	@ zero_extendqisi2
 	strb	r1, [r2, #0]
-	ldr	r1, .L2240+52
+	ldr	r1, .L2244+52
 	ldrh	r2, [r3, #16]
 	ubfx	r0, r2, #7, #1
 	strb	r0, [r1, #0]
-	ldr	r1, .L2240+56
+	ldr	r1, .L2244+56
 	ubfx	r0, r2, #3, #1
 	strb	r0, [r1, #0]
 	ubfx	r0, r2, #4, #1
-	ldr	r1, .L2240+60
+	ldr	r1, .L2244+60
 	ubfx	r2, r2, #8, #3
 	strb	r0, [r1, #0]
-	ldr	r1, .L2240+24
+	ldr	r1, .L2244+24
 	ldrh	r0, [r3, #10]
 	strb	r2, [r1, #0]
 	movs	r2, #0
@@ -20042,120 +20089,120 @@ FlashInit:
 	ldr	r3, [r5, #0]
 	ldrh	r2, [r3, #16]
 	lsls	r0, r2, #25
-	bpl	.L2209
+	bpl	.L2213
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r2, .L2240+64
-	ldr	r3, .L2240+68
+	ldr	r2, .L2244+64
+	ldr	r3, .L2244+68
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	strb	r0, [r3, #0]
-	ldr	r3, .L2240+72
+	ldr	r3, .L2244+72
 	strb	r1, [r3, #0]
 	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	ldr	r3, .L2240+76
+	ldr	r3, .L2244+76
 	strb	r1, [r3, #0]
 	subs	r1, r0, #1
 	cmp	r1, #6
-	bhi	.L2210
-	ldr	r3, .L2240+80
+	bhi	.L2214
+	ldr	r3, .L2244+80
 	str	r3, [r4, #0]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bhi	.L2211
-	ldr	r3, .L2240+84
+	bhi	.L2215
+	ldr	r3, .L2244+84
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L2212
-.L2211:
+	b	.L2216
+.L2215:
 	cmp	r0, #7
-	beq	.L2233
-.L2212:
-	ldr	r1, .L2240+88
-	b	.L2213
-.L2233:
+	beq	.L2237
+.L2216:
+	ldr	r1, .L2244+88
+	b	.L2217
+.L2237:
 	add	r1, r2, #28
-.L2213:
+.L2217:
 	movs	r3, #0
 	mov	r2, r3
-.L2215:
+.L2219:
 	ldrsb	r4, [r1, r2]
-	cbnz	r4, .L2214
+	cbnz	r4, .L2218
 	adds	r3, r3, #1
-.L2214:
+.L2218:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L2215
+	bne	.L2219
 	cmp	r3, #27
-	bls	.L2209
+	bls	.L2213
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-	b	.L2209
-.L2210:
+	b	.L2213
+.L2214:
 	sub	r2, r0, #17
 	cmp	r2, #2
-	bhi	.L2216
-	ldr	r2, .L2240+92
+	bhi	.L2220
+	ldr	r2, .L2244+92
 	str	r2, [r4, #0]
 	movs	r2, #7
 	cmp	r0, #19
 	strb	r2, [r3, #0]
-	bne	.L2209
+	bne	.L2213
 	movs	r2, #15
-	b	.L2237
-.L2216:
+	b	.L2241
+.L2220:
 	cmp	r0, #33
-	beq	.L2217
+	beq	.L2221
 	cmp	r0, #65
-	beq	.L2217
+	beq	.L2221
 	cmp	r0, #66
-	bne	.L2218
-.L2217:
-	ldr	r2, .L2240+96
-	ldr	r3, .L2240+48
+	bne	.L2222
+.L2221:
+	ldr	r2, .L2244+96
+	ldr	r3, .L2244+48
 	str	r2, [r3, #0]
 	movs	r2, #4
-	ldr	r3, .L2240+72
+	ldr	r3, .L2244+72
 	strb	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2240+76
-	b	.L2237
-.L2218:
+	ldr	r3, .L2244+76
+	b	.L2241
+.L2222:
 	cmp	r0, #67
-	beq	.L2219
+	beq	.L2223
 	cmp	r0, #34
-	beq	.L2219
+	beq	.L2223
 	cmp	r0, #35
-	beq	.L2219
+	beq	.L2223
 	cmp	r0, #68
-	bne	.L2220
-.L2219:
-	ldr	r2, .L2240+96
-	ldr	r3, .L2240+48
+	bne	.L2224
+.L2223:
+	ldr	r2, .L2244+96
+	ldr	r3, .L2244+48
 	str	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2240+76
+	ldr	r3, .L2244+76
 	cmp	r0, #35
 	strb	r2, [r3, #0]
-	beq	.L2221
+	beq	.L2225
 	cmp	r0, #68
-	bne	.L2222
-.L2221:
+	bne	.L2226
+.L2225:
 	movs	r2, #17
 	strb	r2, [r3, #0]
-.L2222:
+.L2226:
 	subs	r0, r0, #67
-	ldr	r3, .L2240+72
+	ldr	r3, .L2244+72
 	cmp	r0, #1
-	bhi	.L2223
+	bhi	.L2227
 	movs	r2, #4
-.L2237:
+.L2241:
 	strb	r2, [r3, #0]
-	b	.L2209
-.L2223:
+	b	.L2213
+.L2227:
 	movs	r2, #5
-	b	.L2237
-.L2241:
+	b	.L2241
+.L2245:
 	.align	2
-.L2240:
+.L2244:
 	.word	.LANCHOR27+32
 	.word	.LANCHOR6
 	.word	.LANCHOR18
@@ -20167,83 +20214,83 @@ FlashInit:
 	.word	.LANCHOR7
 	.word	.LC54
 	.word	.LANCHOR24
-	.word	.LANCHOR47
-	.word	.LANCHOR51
+	.word	.LANCHOR149
+	.word	.LANCHOR153
 	.word	.LANCHOR4
 	.word	.LANCHOR194
 	.word	.LANCHOR33
 	.word	.LANCHOR31
 	.word	.LANCHOR11
 	.word	.LANCHOR14
-	.word	.LANCHOR42
+	.word	.LANCHOR144
 	.word	HynixReadRetrial
 	.word	.LANCHOR39
 	.word	.LANCHOR31+20
 	.word	MicronReadRetrial
 	.word	ToshibaReadRetrial
-.L2220:
+.L2224:
 	cmp	r0, #49
-	bne	.L2209
-	ldr	r2, .L2242
-	ldr	r3, .L2242+4
+	bne	.L2213
+	ldr	r2, .L2246
+	ldr	r3, .L2246+4
 	str	r2, [r3, #0]
-.L2209:
-	ldr	r3, .L2242+8
+.L2213:
+	ldr	r3, .L2246+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L2242+12
+	ldr	r3, .L2246+12
 	cmp	r2, r3
-	bne	.L2224
-	ldr	r3, .L2242+16
+	bne	.L2228
+	ldr	r3, .L2246+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2224
-	ldr	r3, .L2242+20
+	cbz	r3, .L2228
+	ldr	r3, .L2246+20
 	movs	r2, #0
 	ldr	r3, [r3, #0]
 	strb	r2, [r3, #18]
-.L2224:
-	ldr	r3, .L2242+24
+.L2228:
+	ldr	r3, .L2246+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L2225
-	ldr	r3, .L2242+28
+	bne	.L2229
+	ldr	r3, .L2246+28
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	cbz	r2, .L2225
+	cbz	r2, .L2229
 	movs	r2, #0
 	movs	r0, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L2225:
+.L2229:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L2242+32
+	ldr	r3, .L2246+32
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2226
-	ldr	r2, .L2242+28
+	beq	.L2230
+	ldr	r2, .L2246+28
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L2227
+	cbnz	r2, .L2231
 	lsls	r1, r3, #31
-	bmi	.L2226
-.L2227:
-	ldr	r3, .L2242+36
+	bmi	.L2230
+.L2231:
+	ldr	r3, .L2246+36
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2226:
-	ldr	r4, .L2242+20
+.L2230:
+	ldr	r4, .L2246+20
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	mov	r8, #16
 	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L2242+40
+	ldr	r0, .L2246+40
 	bl	FlashReadIdbDataRaw
 	ldr	r5, [r4, #0]
-	ldr	r3, .L2242+44
-	ldr	r4, .L2242+48
+	ldr	r3, .L2246+44
+	ldr	r4, .L2246+48
 	ldrb	r1, [r5, #12]	@ zero_extendqisi2
 	strb	r8, [r3, #0]
 	ldrh	r6, [r5, #10]
@@ -20252,10 +20299,10 @@ FlashInit:
 	mov	r0, r6
 	ldrh	r7, [r5, #14]
 	str	r3, [r4, #4]
-	ldr	r3, .L2242+24
+	ldr	r3, .L2246+24
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #0]
-	ldr	r3, .L2242+52
+	ldr	r3, .L2246+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r5, #13]	@ zero_extendqisi2
@@ -20269,13 +20316,13 @@ FlashInit:
 	muls	r6, r3, r6
 	strh	r2, [r4, #24]	@ movhi
 	uxth	r6, r6
-	ldr	r2, .L2242+56
+	ldr	r2, .L2246+56
 	strh	r3, [r4, #20]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	strh	r8, [r4, #26]	@ movhi
 	cmp	r2, #1
-	bne	.L2229
+	bne	.L2233
 	lsls	r3, r3, #1
 	lsrs	r7, r7, #1
 	strh	r3, [r4, #20]	@ movhi
@@ -20284,29 +20331,29 @@ FlashInit:
 	strh	r7, [r4, #14]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L2229:
+.L2233:
 	ldrb	r0, [r5, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-	b	.L2195
-.L2231:
+	b	.L2199
+.L2235:
 	mvn	r0, #1
-.L2195:
+.L2199:
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2243:
+.L2247:
 	.align	2
-.L2242:
+.L2246:
 	.word	SamsungReadRetrial
-	.word	.LANCHOR51
-	.word	.LANCHOR40
+	.word	.LANCHOR153
+	.word	.LANCHOR142
 	.word	1446522928
 	.word	.LANCHOR7
 	.word	.LANCHOR23
 	.word	.LANCHOR22
 	.word	.LANCHOR35
 	.word	.LANCHOR34
-	.word	.LANCHOR47
+	.word	.LANCHOR149
 	.word	.LANCHOR25
 	.word	.LANCHOR1
 	.word	.LANCHOR28
@@ -20325,18 +20372,18 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2245
-	ldr	r0, .L2246
+	cbnz	r0, .L2249
+	ldr	r0, .L2250
 	bl	FtlInit
-.L2245:
+.L2249:
 	mov	r1, r4
-	ldr	r0, .L2246+4
+	ldr	r0, .L2250+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2247:
+.L2251:
 	.align	2
-.L2246:
+.L2250:
 	.word	.LANCHOR28
 	.word	.LC55
 	.size	rk_ftl_init, .-rk_ftl_init
@@ -20561,7 +20608,7 @@ rk_ftl_init:
 	.global	IDByte
 	.global	read_retry_cur_offset
 	.section	.rodata
-.LANCHOR48 = . + 0
+.LANCHOR150 = . + 0
 .LC0:
 	.byte	60
 	.byte	40
@@ -20576,20 +20623,20 @@ g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
-.LANCHOR119 = . + 0
+.LANCHOR107 = . + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
 	.space	4
-	.section	.rodata.__func__.7399,"a",%progbits
-.LANCHOR240 = . + 0
-	.type	__func__.7399, %object
-	.size	__func__.7399, 10
-__func__.7399:
-	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.7798,"a",%progbits
+.LANCHOR221 = . + 0
+	.type	__func__.7798, %object
+	.size	__func__.7798, 9
+__func__.7798:
+	.ascii	"log2phys\000"
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-.LANCHOR146 = . + 0
+.LANCHOR134 = . + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
@@ -20635,12 +20682,6 @@ gNandParaInfo:
 	.byte	0
 	.byte	0
 	.space	4
-	.section	.rodata.__func__.8085,"a",%progbits
-.LANCHOR127 = . + 0
-	.type	__func__.8085, %object
-	.size	__func__.8085, 16
-__func__.8085:
-	.ascii	"make_superblock\000"
 	.section	.bss.gNandRandomizer,"aw",%nobits
 .LANCHOR4 = . + 0
 	.type	gNandRandomizer, %object
@@ -20654,6 +20695,12 @@ gNandRandomizer:
 	.size	gDieOp, 128
 gDieOp:
 	.space	128
+	.section	.rodata.__func__.8089,"a",%progbits
+.LANCHOR115 = . + 0
+	.type	__func__.8089, %object
+	.size	__func__.8089, 16
+__func__.8089:
+	.ascii	"make_superblock\000"
 	.section	.data.refValueDefault,"aw",%progbits
 .LANCHOR242 = . + 0
 	.type	refValueDefault, %object
@@ -20695,21 +20742,21 @@ gFlashToggleModeEn:
 	.space	1
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-.LANCHOR144 = . + 0
+.LANCHOR132 = . + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
-.LANCHOR70 = . + 0
+.LANCHOR58 = . + 0
 	.type	c_ftl_nand_page_pre_super_blk, %object
 	.size	c_ftl_nand_page_pre_super_blk, 2
 c_ftl_nand_page_pre_super_blk:
 	.space	2
 	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-.LANCHOR128 = . + 0
+.LANCHOR116 = . + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
@@ -20720,12 +20767,6 @@ g_inkDie_check_enable:
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.space	1
-	.section	.rodata.__func__.7688,"a",%progbits
-.LANCHOR220 = . + 0
-	.type	__func__.7688, %object
-	.size	__func__.7688, 16
-__func__.7688:
-	.ascii	"load_l2p_region\000"
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
 .LANCHOR201 = . + 0
@@ -20733,15 +20774,21 @@ __func__.7688:
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.space	2
-	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.section	.rodata.__func__.7377,"a",%progbits
+.LANCHOR223 = . + 0
+	.type	__func__.7377, %object
+	.size	__func__.7377, 13
+__func__.7377:
+	.ascii	"FtlProgPages\000"
+	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-.LANCHOR180 = . + 0
-	.type	p_sys_data_buf_1, %object
-	.size	p_sys_data_buf_1, 4
-p_sys_data_buf_1:
+.LANCHOR169 = . + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
 	.space	4
 	.section	.bss.g_maxRetryCount,"aw",%nobits
-.LANCHOR42 = . + 0
+.LANCHOR144 = . + 0
 	.type	g_maxRetryCount, %object
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
@@ -20757,14 +20804,8 @@ gMultiPageProgEn:
 .LANCHOR38 = . + 0
 	.type	gMasterInfo, %object
 	.size	gMasterInfo, 32
-gMasterInfo:
-	.space	32
-	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
-	.align	1
-	.type	g_gc_refresh_block_temp_tbl, %object
-	.size	g_gc_refresh_block_temp_tbl, 34
-g_gc_refresh_block_temp_tbl:
-	.space	34
+gMasterInfo:
+	.space	32
 	.section	.bss.gReadRetryInfo,"aw",%nobits
 .LANCHOR31 = . + 0
 	.type	gReadRetryInfo, %object
@@ -20773,11 +20814,18 @@ gReadRetryInfo:
 	.space	852
 	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
 	.align	1
-.LANCHOR60 = . + 0
+.LANCHOR48 = . + 0
 	.type	c_ftl_nand_die_num, %object
 	.size	c_ftl_nand_die_num, 2
 c_ftl_nand_die_num:
 	.space	2
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+.LANCHOR77 = . + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
 	.section	.bss.gToggleModeClkDiv,"aw",%nobits
 	.align	2
 	.type	gToggleModeClkDiv, %object
@@ -20786,21 +20834,21 @@ gToggleModeClkDiv:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-.LANCHOR101 = . + 0
+.LANCHOR89 = . + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-.LANCHOR95 = . + 0
+.LANCHOR83 = . + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
 	.space	4
 	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
 	.align	2
-.LANCHOR57 = . + 0
+.LANCHOR45 = . + 0
 	.type	c_ftl_nand_max_data_blks, %object
 	.size	c_ftl_nand_max_data_blks, 4
 c_ftl_nand_max_data_blks:
@@ -20812,13 +20860,13 @@ gNandFlashInfoBlockEcc:
 	.space	1
 	.section	.bss.g_nandc_version_data,"aw",%nobits
 	.align	2
-.LANCHOR40 = . + 0
+.LANCHOR142 = . + 0
 	.type	g_nandc_version_data, %object
 	.size	g_nandc_version_data, 4
 g_nandc_version_data:
 	.space	4
 	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
-.LANCHOR49 = . + 0
+.LANCHOR151 = . + 0
 	.type	gNandIDBResBlkNumSaveInFlash, %object
 	.size	gNandIDBResBlkNumSaveInFlash, 1
 gNandIDBResBlkNumSaveInFlash:
@@ -20830,6 +20878,13 @@ gNandIDBResBlkNumSaveInFlash:
 	.size	g_MaxLbn, 4
 g_MaxLbn:
 	.space	4
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+.LANCHOR230 = . + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
 	.section	.bss.g_retryMode,"aw",%nobits
 .LANCHOR11 = . + 0
 	.type	g_retryMode, %object
@@ -20838,23 +20893,18 @@ g_retryMode:
 	.space	1
 	.section	.bss.g_page_map_check_enable,"aw",%nobits
 	.align	1
-.LANCHOR85 = . + 0
+.LANCHOR73 = . + 0
 	.type	g_page_map_check_enable, %object
 	.size	g_page_map_check_enable, 2
 g_page_map_check_enable:
 	.space	2
-	.section	.rodata.__func__.7617,"a",%progbits
-.LANCHOR107 = . + 0
-	.type	__func__.7617, %object
-	.size	__func__.7617, 17
-__func__.7617:
-	.ascii	"INSERT_FREE_LIST\000"
-	.section	.rodata.__func__.7462,"a",%progbits
-.LANCHOR92 = . + 0
-	.type	__func__.7462, %object
-	.size	__func__.7462, 14
-__func__.7462:
-	.ascii	"FtlBbt2Bitmap\000"
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+.LANCHOR145 = . + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
+	.space	4
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
 .LANCHOR156 = . + 0
@@ -20862,9 +20912,15 @@ __func__.7462:
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.space	4
+	.section	.rodata.__func__.7466,"a",%progbits
+.LANCHOR80 = . + 0
+	.type	__func__.7466, %object
+	.size	__func__.7466, 14
+__func__.7466:
+	.ascii	"FtlBbt2Bitmap\000"
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
-.LANCHOR51 = . + 0
+.LANCHOR153 = . + 0
 	.type	gpReadRetrial, %object
 	.size	gpReadRetrial, 4
 gpReadRetrial:
@@ -20873,28 +20929,28 @@ gpReadRetrial:
 .LC1:
 	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
 .LC2:
-	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
 .LC3:
-	.ascii	"ECC:%d\012\000"
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
 .LC4:
-	.ascii	"sdr read ok %x ecc=%d\012\000"
+	.ascii	"%s\012\000"
 .LC5:
-	.ascii	"sync para %d\012\000"
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
 .LC6:
-	.ascii	"TOG mode Read error %x %x\012\000"
+	.ascii	"remove_from_free_sys_Queue %x\012\000"
 .LC7:
-	.ascii	"read retry status %x %x %x\012\000"
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
 .LC8:
-	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
-	.ascii	"\000"
+	.ascii	"ECC:%d\012\000"
 .LC9:
-	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+	.ascii	"sdr read ok %x ecc=%d\012\000"
 .LC10:
-	.ascii	"%s\012\000"
+	.ascii	"sync para %d\012\000"
 .LC11:
-	.ascii	"!!!!! FTL sys Error !!!!!\000"
+	.ascii	"TOG mode Read error %x %x\012\000"
 .LC12:
-	.ascii	"remove_from_free_sys_Queue %x\012\000"
+	.ascii	"read retry status %x %x %x\012\000"
 .LC13:
 	.ascii	"%s 0x%x:\000"
 .LC14:
@@ -20910,7 +20966,7 @@ gpReadRetrial:
 .LC19:
 	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
 .LC20:
-	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!! \012\000"
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
 .LC21:
 	.ascii	"prog error: = %x\012\000"
 .LC22:
@@ -20934,7 +20990,7 @@ gpReadRetrial:
 .LC31:
 	.ascii	"page map lost: %x %x\012\000"
 .LC32:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"FtlMapWritePage error = %x\012\000"
 .LC33:
 	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC34:
@@ -20952,7 +21008,7 @@ gpReadRetrial:
 .LC40:
 	.ascii	"GC des block %x done\012\000"
 .LC41:
-	.ascii	"RSB refresh addr %x \012\000"
+	.ascii	"RSB refresh addr %x\012\000"
 .LC42:
 	.ascii	"spuer block %x vpn is 0\012 \000"
 .LC43:
@@ -20962,7 +21018,7 @@ gpReadRetrial:
 .LC45:
 	.ascii	"erase power lost blk = %x vpc=%x\012\000"
 .LC46:
-	.ascii	"FTL version: 5.0.47 20171110\000"
+	.ascii	"FTL version: 5.0.47 20171221\000"
 .LC47:
 	.ascii	"...%s: no bad block mapping table, format device\012"
 	.ascii	"\000"
@@ -20984,7 +21040,7 @@ gpReadRetrial:
 	.ascii	"FtlInit %x\012\000"
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR46 = . + 0
+.LANCHOR148 = . + 0
 	.type	gNandFlashIdbBlockAddr, %object
 	.size	gNandFlashIdbBlockAddr, 4
 gNandFlashIdbBlockAddr:
@@ -20996,18 +21052,20 @@ gNandFlashIdbBlockAddr:
 	.size	req_sys, 36
 req_sys:
 	.space	36
-	.section	.rodata.__func__.7998,"a",%progbits
-.LANCHOR222 = . + 0
-	.type	__func__.7998, %object
-	.size	__func__.7998, 16
-__func__.7998:
-	.ascii	"FtlReUsePrevPpa\000"
-	.section	.rodata.__func__.7856,"a",%progbits
-.LANCHOR206 = . + 0
-	.type	__func__.7856, %object
-	.size	__func__.7856, 15
-__func__.7856:
-	.ascii	"FtlVpcTblFlush\000"
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR241 = . + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+.LANCHOR59 = . + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
 .LANCHOR189 = . + 0
@@ -21017,11 +21075,17 @@ p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-.LANCHOR149 = . + 0
+.LANCHOR137 = . + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
 	.space	2
+	.section	.rodata.__func__.7692,"a",%progbits
+.LANCHOR220 = . + 0
+	.type	__func__.7692, %object
+	.size	__func__.7692, 16
+__func__.7692:
+	.ascii	"load_l2p_region\000"
 	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
 	.align	2
 .LANCHOR9 = . + 0
@@ -21031,30 +21095,35 @@ mlcPageToSlcPageTbl:
 	.space	1024
 	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
 	.align	1
-.LANCHOR72 = . + 0
+.LANCHOR60 = . + 0
 	.type	c_ftl_nand_sec_pre_page_shift, %object
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
 	.section	.bss.g_flash_read_only_en,"aw",%nobits
 	.align	2
-.LANCHOR94 = . + 0
+.LANCHOR82 = . + 0
 	.type	g_flash_read_only_en, %object
 	.size	g_flash_read_only_en, 4
 g_flash_read_only_en:
 	.space	4
-	.section	.rodata.__func__.8218,"a",%progbits
-.LANCHOR208 = . + 0
-	.type	__func__.8218, %object
-	.size	__func__.8218, 20
-__func__.8218:
-	.ascii	"decrement_vpc_count\000"
+	.section	.rodata.__func__.8217,"a",%progbits
+.LANCHOR207 = . + 0
+	.type	__func__.8217, %object
+	.size	__func__.8217, 16
+__func__.8217:
+	.ascii	"update_vpc_list\000"
 	.section	.bss.read_retry_cur_offset,"aw",%nobits
 .LANCHOR32 = . + 0
 	.type	read_retry_cur_offset, %object
 	.size	read_retry_cur_offset, 4
 read_retry_cur_offset:
 	.space	4
+	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.space	1
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
 .LANCHOR188 = . + 0
@@ -21069,33 +21138,26 @@ p_vendor_block_valid_page_count:
 	.size	gNandcVer, 4
 gNandcVer:
 	.space	4
-	.section	.rodata.__func__.7732,"a",%progbits
-.LANCHOR212 = . + 0
-	.type	__func__.7732, %object
-	.size	__func__.7732, 15
-__func__.7732:
-	.ascii	"ftl_map_blk_gc\000"
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR106 = . + 0
+.LANCHOR94 = . + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-.LANCHOR99 = . + 0
+.LANCHOR87 = . + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
-	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
-	.align	1
-.LANCHOR229 = . + 0
-	.type	g_power_lost_ecc_error_blk, %object
-	.size	g_power_lost_ecc_error_blk, 2
-g_power_lost_ecc_error_blk:
-	.space	2
+	.section	.rodata.__func__.7933,"a",%progbits
+.LANCHOR199 = . + 0
+	.type	__func__.7933, %object
+	.size	__func__.7933, 15
+__func__.7933:
+	.ascii	"FtlLoadSysInfo\000"
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
 .LANCHOR172 = . + 0
@@ -21105,7 +21167,7 @@ g_gc_skip_write_count:
 	.space	4
 	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR55 = . + 0
+.LANCHOR43 = . + 0
 	.type	c_ftl_nand_data_blks_per_plane, %object
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
@@ -21177,11 +21239,11 @@ gSlcNandParaInfo:
 	.byte	0
 	.space	4
 	.section	.rodata.__func__.7621,"a",%progbits
-.LANCHOR104 = . + 0
+.LANCHOR95 = . + 0
 	.type	__func__.7621, %object
 	.size	__func__.7621, 17
 __func__.7621:
-	.ascii	"INSERT_DATA_LIST\000"
+	.ascii	"INSERT_FREE_LIST\000"
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
 .LANCHOR184 = . + 0
@@ -21189,22 +21251,27 @@ __func__.7621:
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
 	.space	4
-	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
-	.align	1
-.LANCHOR153 = . + 0
-	.type	g_gc_bad_block_gc_index, %object
-	.size	g_gc_bad_block_gc_index, 2
-g_gc_bad_block_gc_index:
-	.space	2
+	.section	.rodata.__func__.7625,"a",%progbits
+.LANCHOR92 = . + 0
+	.type	__func__.7625, %object
+	.size	__func__.7625, 17
+__func__.7625:
+	.ascii	"INSERT_DATA_LIST\000"
 	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
 	.align	2
 	.type	gNandFlashResEndPageAddr, %object
 	.size	gNandFlashResEndPageAddr, 4
 gNandFlashResEndPageAddr:
 	.space	4
+	.section	.rodata.__func__.8290,"a",%progbits
+.LANCHOR226 = . + 0
+	.type	__func__.8290, %object
+	.size	__func__.8290, 19
+__func__.8290:
+	.ascii	"FtlGcFreeTempBlock\000"
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-.LANCHOR134 = . + 0
+.LANCHOR122 = . + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
@@ -21225,7 +21292,7 @@ g_totle_write_sector:
 	.space	4
 	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
 	.align	1
-.LANCHOR64 = . + 0
+.LANCHOR52 = . + 0
 	.type	c_ftl_nand_ext_blk_pre_plane, %object
 	.size	c_ftl_nand_ext_blk_pre_plane, 2
 c_ftl_nand_ext_blk_pre_plane:
@@ -21235,17 +21302,10 @@ c_ftl_nand_ext_blk_pre_plane:
 	.type	gpNandc1, %object
 	.size	gpNandc1, 4
 gpNandc1:
-	.space	4
-	.section	.bss.g_in_swl_replace,"aw",%nobits
-	.align	2
-.LANCHOR169 = . + 0
-	.type	g_in_swl_replace, %object
-	.size	g_in_swl_replace, 4
-g_in_swl_replace:
 	.space	4
 	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
 	.align	2
-.LANCHOR50 = . + 0
+.LANCHOR152 = . + 0
 	.type	FlashDdrTunningReadCount, %object
 	.size	FlashDdrTunningReadCount, 4
 FlashDdrTunningReadCount:
@@ -21265,18 +21325,24 @@ gNandMaxChip:
 	.space	1
 	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
 	.align	1
-.LANCHOR63 = . + 0
+.LANCHOR51 = . + 0
 	.type	c_mlc_erase_count_value, %object
 	.size	c_mlc_erase_count_value, 2
 c_mlc_erase_count_value:
 	.space	2
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-.LANCHOR124 = . + 0
+.LANCHOR112 = . + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
 	.space	4
+	.section	.rodata.__func__.7512,"a",%progbits
+.LANCHOR203 = . + 0
+	.type	__func__.7512, %object
+	.size	__func__.7512, 11
+__func__.7512:
+	.ascii	"FtlLoadBbt\000"
 	.section	.data.SamsungRefValue,"aw",%progbits
 .LANCHOR15 = . + 0
 	.type	SamsungRefValue, %object
@@ -21427,25 +21493,20 @@ NandOptPara:
 	.byte	0
 	.byte	0
 	.space	14
-	.section	.rodata.__func__.7373,"a",%progbits
-.LANCHOR223 = . + 0
-	.type	__func__.7373, %object
-	.size	__func__.7373, 13
-__func__.7373:
-	.ascii	"FtlProgPages\000"
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
-.LANCHOR66 = . + 0
+.LANCHOR54 = . + 0
 	.type	c_ftl_nand_blks_per_die, %object
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.space	2
-	.section	.rodata.__func__.8031,"a",%progbits
-.LANCHOR228 = . + 0
-	.type	__func__.8031, %object
-	.size	__func__.8031, 22
-__func__.8031:
-	.ascii	"FtlRecoverySuperblock\000"
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR234 = . + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
 .LANCHOR217 = . + 0
@@ -21455,7 +21516,7 @@ g_totle_read_sector:
 	.space	4
 	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
 	.align	2
-.LANCHOR54 = . + 0
+.LANCHOR42 = . + 0
 	.type	c_ftl_nand_max_sys_blks, %object
 	.size	c_ftl_nand_max_sys_blks, 4
 c_ftl_nand_max_sys_blks:
@@ -21467,23 +21528,11 @@ c_ftl_nand_max_sys_blks:
 g_slc2KBNand:
 	.space	1
 	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-.LANCHOR45 = . + 0
+.LANCHOR147 = . + 0
 	.type	gNandFlashIDBEccBits, %object
 	.size	gNandFlashIDBEccBits, 1
 gNandFlashIDBEccBits:
 	.space	1
-	.section	.rodata.__func__.8182,"a",%progbits
-.LANCHOR210 = . + 0
-	.type	__func__.8182, %object
-	.size	__func__.8182, 25
-__func__.8182:
-	.ascii	"allocate_data_superblock\000"
-	.section	.rodata.__func__.7745,"a",%progbits
-.LANCHOR213 = . + 0
-	.type	__func__.7745, %object
-	.size	__func__.7745, 31
-__func__.7745:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
 	.section	.data.Toshiba15RefValue,"aw",%progbits
 .LANCHOR12 = . + 0
 	.type	Toshiba15RefValue, %object
@@ -21586,28 +21635,46 @@ Toshiba15RefValue:
 	.byte	0
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-.LANCHOR150 = . + 0
+.LANCHOR138 = . + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
+	.section	.rodata.__func__.7749,"a",%progbits
+.LANCHOR213 = . + 0
+	.type	__func__.7749, %object
+	.size	__func__.7749, 31
+__func__.7749:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.rodata.__func__.7403,"a",%progbits
+.LANCHOR240 = . + 0
+	.type	__func__.7403, %object
+	.size	__func__.7403, 10
+__func__.7403:
+	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.8186,"a",%progbits
+.LANCHOR210 = . + 0
+	.type	__func__.8186, %object
+	.size	__func__.8186, 25
+__func__.8186:
+	.ascii	"allocate_data_superblock\000"
 	.section	.bss.g_free_slc_blk_num,"aw",%nobits
 	.align	1
-.LANCHOR129 = . + 0
+.LANCHOR117 = . + 0
 	.type	g_free_slc_blk_num, %object
 	.size	g_free_slc_blk_num, 2
 g_free_slc_blk_num:
 	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
-.LANCHOR82 = . + 0
+.LANCHOR70 = . + 0
 	.type	c_ftl_nand_map_region_num, %object
 	.size	c_ftl_nand_map_region_num, 2
 c_ftl_nand_map_region_num:
 	.space	2
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-.LANCHOR135 = . + 0
+.LANCHOR123 = . + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -21619,23 +21686,22 @@ req_gc:
 	.size	gpNandc, 4
 gpNandc:
 	.space	4
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-.LANCHOR43 = . + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
+	.section	.rodata.__func__.8035,"a",%progbits
+.LANCHOR228 = . + 0
+	.type	__func__.8035, %object
+	.size	__func__.8035, 22
+__func__.8035:
+	.ascii	"FtlRecoverySuperblock\000"
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-.LANCHOR86 = . + 0
+.LANCHOR74 = . + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.space	2
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-.LANCHOR114 = . + 0
+.LANCHOR102 = . + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -21647,7 +21713,7 @@ p_l2p_ram_map:
 FlashWaitBusyScheduleEn:
 	.space	4
 	.section	.bss.p_plane_order_table,"aw",%nobits
-.LANCHOR62 = . + 0
+.LANCHOR50 = . + 0
 	.type	p_plane_order_table, %object
 	.size	p_plane_order_table, 32
 p_plane_order_table:
@@ -21668,14 +21734,14 @@ g_totle_cache_write_count:
 	.space	4
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
-.LANCHOR74 = . + 0
+.LANCHOR62 = . + 0
 	.type	c_ftl_nand_byte_pre_oob, %object
 	.size	c_ftl_nand_byte_pre_oob, 2
 c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR152 = . + 0
+.LANCHOR140 = . + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -21685,13 +21751,26 @@ g_gc_bad_block_temp_tbl:
 	.size	gFlashSdrModeEn, 1
 gFlashSdrModeEn:
 	.space	1
+	.section	.rodata.__func__.7860,"a",%progbits
+.LANCHOR206 = . + 0
+	.type	__func__.7860, %object
+	.size	__func__.7860, 15
+__func__.7860:
+	.ascii	"FtlVpcTblFlush\000"
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-.LANCHOR102 = . + 0
+.LANCHOR90 = . + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
 	.space	4
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+.LANCHOR229 = . + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
 	.section	.bss.gFlashInterfaceMode,"aw",%nobits
 .LANCHOR34 = . + 0
 	.type	gFlashInterfaceMode, %object
@@ -21700,7 +21779,7 @@ gFlashInterfaceMode:
 	.space	1
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR125 = . + 0
+.LANCHOR113 = . + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
@@ -21764,32 +21843,32 @@ ToshibaA19RefValue:
 	.byte	0
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-.LANCHOR139 = . + 0
+.LANCHOR127 = . + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-.LANCHOR90 = . + 0
+.LANCHOR78 = . + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
 	.space	60
 	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
 	.align	1
-.LANCHOR73 = . + 0
+.LANCHOR61 = . + 0
 	.type	c_ftl_nand_byte_pre_page, %object
 	.size	c_ftl_nand_byte_pre_page, 2
 c_ftl_nand_byte_pre_page:
 	.space	2
-	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
-	.align	1
-.LANCHOR230 = . + 0
-	.type	g_power_lost_recovery_flag, %object
-	.size	g_power_lost_recovery_flag, 2
-g_power_lost_recovery_flag:
-	.space	2
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+.LANCHOR178 = . + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
 	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
 .LANCHOR1 = . + 0
 	.type	gNandIDBResBlkNum, %object
@@ -21812,14 +21891,14 @@ g_gc_refresh_block_temp_num:
 	.space	2
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-.LANCHOR138 = . + 0
+.LANCHOR126 = . + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
 	.space	2
 	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
 	.align	2
-.LANCHOR58 = . + 0
+.LANCHOR46 = . + 0
 	.type	c_ftl_nand_totle_phy_blks, %object
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
@@ -21833,28 +21912,28 @@ ftl_gc_temp_block_bops_scan_page_addr:
 	.short	-1
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR126 = . + 0
+.LANCHOR114 = . + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
 	.space	4
-	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
 	.align	1
-.LANCHOR234 = . + 0
-	.type	g_gc_cur_blk_valid_pages, %object
-	.size	g_gc_cur_blk_valid_pages, 2
-g_gc_cur_blk_valid_pages:
+.LANCHOR63 = . + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
 	.space	2
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-.LANCHOR148 = . + 0
+.LANCHOR136 = . + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
 	.space	4
 	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
 	.align	1
-.LANCHOR83 = . + 0
+.LANCHOR71 = . + 0
 	.type	c_ftl_nand_l2pmap_ram_region_num, %object
 	.size	c_ftl_nand_l2pmap_ram_region_num, 2
 c_ftl_nand_l2pmap_ram_region_num:
@@ -21866,12 +21945,12 @@ c_ftl_nand_l2pmap_ram_region_num:
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
-	.section	.rodata.__func__.7758,"a",%progbits
-.LANCHOR214 = . + 0
-	.type	__func__.7758, %object
-	.size	__func__.7758, 16
-__func__.7758:
-	.ascii	"FtlMapWritePage\000"
+	.section	.rodata.__func__.8384,"a",%progbits
+.LANCHOR236 = . + 0
+	.type	__func__.8384, %object
+	.size	__func__.8384, 23
+__func__.8384:
+	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
 .LANCHOR186 = . + 0
@@ -21886,15 +21965,9 @@ g_ect_tbl_info_size:
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.space	4
-	.section	.rodata.__func__.7508,"a",%progbits
-.LANCHOR203 = . + 0
-	.type	__func__.7508, %object
-	.size	__func__.7508, 11
-__func__.7508:
-	.ascii	"FtlLoadBbt\000"
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
-.LANCHOR78 = . + 0
+.LANCHOR66 = . + 0
 	.type	c_ftl_nand_vendor_region_num, %object
 	.size	c_ftl_nand_vendor_region_num, 2
 c_ftl_nand_vendor_region_num:
@@ -21921,14 +21994,14 @@ ToshibaRefValue:
 	.byte	112
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-.LANCHOR115 = . + 0
+.LANCHOR103 = . + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-.LANCHOR147 = . + 0
+.LANCHOR135 = . + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
@@ -21940,16 +22013,16 @@ g_gc_page_offset:
 	.size	gMasterTempBuf, 4
 gMasterTempBuf:
 	.space	4
-	.section	.bss.g_gc_blk_num,"aw",%nobits
-	.align	1
-.LANCHOR145 = . + 0
-	.type	g_gc_blk_num, %object
-	.size	g_gc_blk_num, 2
-g_gc_blk_num:
-	.space	2
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+.LANCHOR204 = . + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
 	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
 	.align	2
-.LANCHOR80 = . + 0
+.LANCHOR68 = . + 0
 	.type	c_ftl_nand_max_map_blks, %object
 	.size	c_ftl_nand_max_map_blks, 4
 c_ftl_nand_max_map_blks:
@@ -21963,21 +22036,21 @@ g_totle_read_page_count:
 	.space	4
 	.section	.bss.g_gc_num_req,"aw",%nobits
 	.align	2
-.LANCHOR131 = . + 0
+.LANCHOR119 = . + 0
 	.type	g_gc_num_req, %object
 	.size	g_gc_num_req, 4
 g_gc_num_req:
 	.space	4
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-.LANCHOR142 = . + 0
+.LANCHOR130 = . + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-.LANCHOR140 = . + 0
+.LANCHOR128 = . + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
@@ -21989,11 +22062,17 @@ ftl_gc_temp_power_lost_recovery_flag:
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
-	.section	.rodata.__func__.7875,"a",%progbits
+	.section	.rodata.__func__.8002,"a",%progbits
+.LANCHOR222 = . + 0
+	.type	__func__.8002, %object
+	.size	__func__.8002, 16
+__func__.8002:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.7879,"a",%progbits
 .LANCHOR197 = . + 0
-	.type	__func__.7875, %object
-	.size	__func__.7875, 14
-__func__.7875:
+	.type	__func__.7879, %object
+	.size	__func__.7879, 14
+__func__.7879:
 	.ascii	"FtlScanSysBlk\000"
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
@@ -22004,7 +22083,7 @@ p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR120 = . + 0
+.LANCHOR108 = . + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
@@ -22025,14 +22104,14 @@ g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR103 = . + 0
+.LANCHOR91 = . + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
 	.space	2
 	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
 	.align	1
-.LANCHOR56 = . + 0
+.LANCHOR44 = . + 0
 	.type	c_ftl_nand_blk_pre_plane, %object
 	.size	c_ftl_nand_blk_pre_plane, 2
 c_ftl_nand_blk_pre_plane:
@@ -22051,19 +22130,19 @@ g_gc_head_data_block:
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
-	.section	.rodata.__func__.8202,"a",%progbits
-.LANCHOR209 = . + 0
-	.type	__func__.8202, %object
-	.size	__func__.8202, 19
-__func__.8202:
-	.ascii	"get_new_active_ppa\000"
-	.section	.bss.req_gc_dst,"aw",%nobits
-	.align	2
-.LANCHOR178 = . + 0
-	.type	req_gc_dst, %object
-	.size	req_gc_dst, 4
-req_gc_dst:
-	.space	4
+	.section	.rodata.__func__.7685,"a",%progbits
+.LANCHOR100 = . + 0
+	.type	__func__.7685, %object
+	.size	__func__.7685, 22
+__func__.7685:
+	.ascii	"List_update_data_list\000"
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+.LANCHOR133 = . + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
 .LANCHOR177 = . + 0
@@ -22080,17 +22159,11 @@ g_totle_avg_erase_count:
 	.space	4
 	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
 	.align	1
-.LANCHOR61 = . + 0
+.LANCHOR49 = . + 0
 	.type	c_ftl_nand_planes_per_die, %object
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.space	2
-	.section	.rodata.__func__.7794,"a",%progbits
-.LANCHOR221 = . + 0
-	.type	__func__.7794, %object
-	.size	__func__.7794, 9
-__func__.7794:
-	.ascii	"log2phys\000"
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
 .LANCHOR174 = . + 0
@@ -22100,7 +22173,7 @@ g_gc_merge_free_blk_threshold:
 	.space	2
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-.LANCHOR88 = . + 0
+.LANCHOR76 = . + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -22112,12 +22185,6 @@ g_MaxLpn:
 	.size	gpNandParaInfo, 4
 gpNandParaInfo:
 	.space	4
-	.section	.rodata.__func__.7651,"a",%progbits
-.LANCHOR108 = . + 0
-	.type	__func__.7651, %object
-	.size	__func__.7651, 17
-__func__.7651:
-	.ascii	"List_remove_node\000"
 	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
 .LANCHOR237 = . + 0
@@ -22127,14 +22194,14 @@ g_LowFormat:
 	.space	4
 	.section	.bss.c_ftl_nand_type,"aw",%nobits
 	.align	1
-.LANCHOR59 = . + 0
+.LANCHOR47 = . + 0
 	.type	c_ftl_nand_type, %object
 	.size	c_ftl_nand_type, 2
 c_ftl_nand_type:
 	.space	2
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-.LANCHOR93 = . + 0
+.LANCHOR81 = . + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -22146,52 +22213,39 @@ gSysFreeQueue:
 	.size	slcPageToMlcPageTbl, 512
 slcPageToMlcPageTbl:
 	.space	512
-	.section	.rodata.__func__.8286,"a",%progbits
-.LANCHOR226 = . + 0
-	.type	__func__.8286, %object
-	.size	__func__.8286, 19
-__func__.8286:
-	.ascii	"FtlGcFreeTempBlock\000"
-	.section	.rodata.__func__.7313,"a",%progbits
+	.section	.rodata.__func__.7317,"a",%progbits
 .LANCHOR238 = . + 0
-	.type	__func__.7313, %object
-	.size	__func__.7313, 8
-__func__.7313:
+	.type	__func__.7317, %object
+	.size	__func__.7317, 8
+__func__.7317:
 	.ascii	"FtlInit\000"
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
 	.align	2
-.LANCHOR52 = . + 0
+.LANCHOR40 = . + 0
 	.type	c_ftl_nand_sys_blks_per_plane, %object
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.space	4
-	.section	.rodata.__func__.8380,"a",%progbits
-.LANCHOR236 = . + 0
-	.type	__func__.8380, %object
-	.size	__func__.8380, 23
-__func__.8380:
-	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-.LANCHOR110 = . + 0
+.LANCHOR98 = . + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR98 = . + 0
+.LANCHOR86 = . + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
 	.space	4
-	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
-	.align	1
-.LANCHOR75 = . + 0
-	.type	c_ftl_nand_reserved_blks, %object
-	.size	c_ftl_nand_reserved_blks, 2
-c_ftl_nand_reserved_blks:
-	.space	2
+	.section	.rodata.__func__.7722,"a",%progbits
+.LANCHOR101 = . + 0
+	.type	__func__.7722, %object
+	.size	__func__.7722, 26
+__func__.7722:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
 	.section	.bss.g_maxRegNum,"aw",%nobits
 .LANCHOR14 = . + 0
 	.type	g_maxRegNum, %object
@@ -22200,20 +22254,14 @@ g_maxRegNum:
 	.space	1
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR133 = . + 0
+.LANCHOR121 = . + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
-	.section	.rodata.__func__.7681,"a",%progbits
-.LANCHOR112 = . + 0
-	.type	__func__.7681, %object
-	.size	__func__.7681, 22
-__func__.7681:
-	.ascii	"List_update_data_list\000"
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
-.LANCHOR47 = . + 0
+.LANCHOR149 = . + 0
 	.type	gNandFlashInfoBlockAddr, %object
 	.size	gNandFlashInfoBlockAddr, 4
 gNandFlashInfoBlockAddr:
@@ -22233,14 +22281,14 @@ p_io_spare_buf:
 	.space	4
 	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
 	.align	1
-.LANCHOR65 = . + 0
+.LANCHOR53 = . + 0
 	.type	c_ftl_vendor_part_size, %object
 	.size	c_ftl_vendor_part_size, 2
 c_ftl_vendor_part_size:
 	.space	2
 	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
 	.align	1
-.LANCHOR53 = . + 0
+.LANCHOR41 = . + 0
 	.type	c_ftl_nand_planes_num, %object
 	.size	c_ftl_nand_planes_num, 2
 c_ftl_nand_planes_num:
@@ -22265,11 +22313,12 @@ p_io_data_buf_1:
 	.size	power_up_flag, 4
 power_up_flag:
 	.word	1
-	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
-	.type	gFlashOnfiModeEn, %object
-	.size	gFlashOnfiModeEn, 1
-gFlashOnfiModeEn:
-	.space	1
+	.section	.rodata.__func__.8109,"a",%progbits
+.LANCHOR118 = . + 0
+	.type	__func__.8109, %object
+	.size	__func__.8109, 18
+__func__.8109:
+	.ascii	"SupperBlkListInit\000"
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
 .LANCHOR159 = . + 0
@@ -22284,12 +22333,6 @@ g_totle_write_page_count:
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
-	.section	.rodata.__func__.7929,"a",%progbits
-.LANCHOR199 = . + 0
-	.type	__func__.7929, %object
-	.size	__func__.7929, 15
-__func__.7929:
-	.ascii	"FtlLoadSysInfo\000"
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
 .LANCHOR167 = . + 0
@@ -22299,29 +22342,23 @@ g_min_erase_count:
 	.space	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-.LANCHOR117 = . + 0
+.LANCHOR105 = . + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
 	.space	2
-	.section	.rodata.__func__.8213,"a",%progbits
-.LANCHOR207 = . + 0
-	.type	__func__.8213, %object
-	.size	__func__.8213, 16
-__func__.8213:
-	.ascii	"update_vpc_list\000"
-	.section	.rodata.__func__.7778,"a",%progbits
-.LANCHOR116 = . + 0
-	.type	__func__.7778, %object
-	.size	__func__.7778, 22
-__func__.7778:
-	.ascii	"select_l2p_ram_region\000"
-	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.section	.rodata.__func__.7762,"a",%progbits
+.LANCHOR214 = . + 0
+	.type	__func__.7762, %object
+	.size	__func__.7762, 16
+__func__.7762:
+	.ascii	"FtlMapWritePage\000"
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR89 = . + 0
-	.type	g_cur_erase_blk, %object
-	.size	g_cur_erase_blk, 4
-g_cur_erase_blk:
+.LANCHOR180 = . + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
 	.space	4
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
@@ -22337,23 +22374,23 @@ g_in_gc_progress:
 	.size	gNandChipMap, 32
 gNandChipMap:
 	.space	32
-	.section	.bss.gFlashPageBuffer1,"aw",%nobits
-	.align	2
-.LANCHOR41 = . + 0
-	.type	gFlashPageBuffer1, %object
-	.size	gFlashPageBuffer1, 4
-gFlashPageBuffer1:
-	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+.LANCHOR141 = . + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
 	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
 	.align	2
-.LANCHOR81 = . + 0
+.LANCHOR69 = . + 0
 	.type	c_ftl_nand_init_sys_blks_per_plane, %object
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR105 = . + 0
+.LANCHOR93 = . + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -22379,12 +22416,6 @@ gNandPhyInfo:
 	.size	gSysInfo, 12
 gSysInfo:
 	.space	12
-	.section	.rodata.__func__.8105,"a",%progbits
-.LANCHOR130 = . + 0
-	.type	__func__.8105, %object
-	.size	__func__.8105, 18
-__func__.8105:
-	.ascii	"SupperBlkListInit\000"
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
 .LANCHOR175 = . + 0
@@ -22429,7 +22460,7 @@ gp_last_act_superblock:
 	.space	4
 	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
 	.align	1
-.LANCHOR77 = . + 0
+.LANCHOR65 = . + 0
 	.type	c_ftl_nand_max_vendor_blks, %object
 	.size	c_ftl_nand_max_vendor_blks, 2
 c_ftl_nand_max_vendor_blks:
@@ -22568,13 +22599,12 @@ random_seed:
 	.short	28406
 	.short	17598
 	.short	28087
-	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
-	.align	1
-.LANCHOR71 = . + 0
-	.type	c_ftl_nand_sec_pre_page, %object
-	.size	c_ftl_nand_sec_pre_page, 2
-c_ftl_nand_sec_pre_page:
-	.space	2
+	.section	.rodata.__func__.7655,"a",%progbits
+.LANCHOR96 = . + 0
+	.type	__func__.7655, %object
+	.size	__func__.7655, 17
+__func__.7655:
+	.ascii	"List_remove_node\000"
 	.section	.bss.gNandMaxDie,"aw",%nobits
 .LANCHOR16 = . + 0
 	.type	gNandMaxDie, %object
@@ -22583,35 +22613,35 @@ gNandMaxDie:
 	.space	1
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR132 = . + 0
+.LANCHOR120 = . + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
-.LANCHOR84 = . + 0
+.LANCHOR72 = . + 0
 	.type	g_MaxLbaSector, %object
 	.size	g_MaxLbaSector, 4
 g_MaxLbaSector:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-.LANCHOR96 = . + 0
+.LANCHOR84 = . + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-.LANCHOR87 = . + 0
+.LANCHOR75 = . + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR100 = . + 0
+.LANCHOR88 = . + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
@@ -22624,14 +22654,14 @@ gNandOptPara:
 	.space	32
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-.LANCHOR143 = . + 0
+.LANCHOR131 = . + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-.LANCHOR118 = . + 0
+.LANCHOR106 = . + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
@@ -22650,20 +22680,24 @@ g_recovery_page_num:
 	.size	gTotleBlock, 2
 gTotleBlock:
 	.space	2
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
-	.align	2
-.LANCHOR241 = . + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
-	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
-	.align	2
-.LANCHOR204 = . + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
-	.space	4
+	.section	.rodata.__func__.7782,"a",%progbits
+.LANCHOR104 = . + 0
+	.type	__func__.7782, %object
+	.size	__func__.7782, 22
+__func__.7782:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.rodata.__func__.8222,"a",%progbits
+.LANCHOR208 = . + 0
+	.type	__func__.8222, %object
+	.size	__func__.8222, 20
+__func__.8222:
+	.ascii	"decrement_vpc_count\000"
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
+	.align	1
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
 	.section	.bss.IDByte,"aw",%nobits
 	.align	2
 .LANCHOR22 = . + 0
@@ -22673,14 +22707,14 @@ IDByte:
 	.space	32
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-.LANCHOR111 = . + 0
+.LANCHOR99 = . + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
 	.space	48
 	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
 	.align	1
-.LANCHOR69 = . + 0
+.LANCHOR57 = . + 0
 	.type	c_ftl_nand_page_pre_slc_blk, %object
 	.size	c_ftl_nand_page_pre_slc_blk, 2
 c_ftl_nand_page_pre_slc_blk:
@@ -22692,6 +22726,12 @@ c_ftl_nand_page_pre_slc_blk:
 	.size	gBlockPageAlignSize, 4
 gBlockPageAlignSize:
 	.space	4
+	.section	.rodata.__func__.8200,"a",%progbits
+.LANCHOR219 = . + 0
+	.type	__func__.8200, %object
+	.size	__func__.8200, 29
+__func__.8200:
+	.ascii	"allocate_new_data_superblock\000"
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
 .LANCHOR202 = . + 0
@@ -22699,22 +22739,16 @@ gBlockPageAlignSize:
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.space	48
-	.section	.rodata.__func__.8196,"a",%progbits
-.LANCHOR219 = . + 0
-	.type	__func__.8196, %object
-	.size	__func__.8196, 29
-__func__.8196:
-	.ascii	"allocate_new_data_superblock\000"
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR97 = . + 0
+.LANCHOR85 = . + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
 	.space	4
 	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
 	.align	1
-.LANCHOR67 = . + 0
+.LANCHOR55 = . + 0
 	.type	c_ftl_nand_blks_per_die_shift, %object
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
@@ -22726,6 +22760,12 @@ c_ftl_nand_blks_per_die_shift:
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.space	4
+	.section	.rodata.__func__.8206,"a",%progbits
+.LANCHOR209 = . + 0
+	.type	__func__.8206, %object
+	.size	__func__.8206, 19
+__func__.8206:
+	.ascii	"get_new_active_ppa\000"
 	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
 	.align	1
 .LANCHOR235 = . + 0
@@ -22742,14 +22782,14 @@ g_totle_discard_page_count:
 	.space	4
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-.LANCHOR91 = . + 0
+.LANCHOR79 = . + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.space	2
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-.LANCHOR122 = . + 0
+.LANCHOR110 = . + 0
 	.type	gL2pMapInfo, %object
 	.size	gL2pMapInfo, 44
 gL2pMapInfo:
@@ -22763,17 +22803,24 @@ g_gc_head_data_block_count:
 	.space	4
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
-.LANCHOR44 = . + 0
+.LANCHOR146 = . + 0
 	.type	gFlashPageBuffer0, %object
 	.size	gFlashPageBuffer0, 4
 gFlashPageBuffer0:
 	.space	4
 	.section	.bss.g_req_cache,"aw",%nobits
 	.align	2
-.LANCHOR137 = . + 0
+.LANCHOR125 = . + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 4
 g_req_cache:
+	.space	4
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.align	2
+.LANCHOR143 = . + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
 	.space	4
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
@@ -22784,17 +22831,11 @@ gFtlInitStatus:
 	.word	-1
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-.LANCHOR136 = . + 0
+.LANCHOR124 = . + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.space	4
-	.section	.rodata.__func__.7718,"a",%progbits
-.LANCHOR113 = . + 0
-	.type	__func__.7718, %object
-	.size	__func__.7718, 26
-__func__.7718:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
 .LANCHOR26 = . + 0
@@ -24673,23 +24714,29 @@ NandFlashParaTbl:
 	.byte	0
 	.byte	0
 	.space	4
+	.section	.rodata.__func__.7736,"a",%progbits
+.LANCHOR212 = . + 0
+	.type	__func__.7736, %object
+	.size	__func__.7736, 15
+__func__.7736:
+	.ascii	"ftl_map_blk_gc\000"
 	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
 	.align	1
-.LANCHOR68 = . + 0
+.LANCHOR56 = . + 0
 	.type	c_ftl_nand_page_pre_blk, %object
 	.size	c_ftl_nand_page_pre_blk, 2
 c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-.LANCHOR123 = . + 0
+.LANCHOR111 = . + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
 	.space	2
 	.section	.bss.DeviceCapacity,"aw",%nobits
 	.align	2
-.LANCHOR76 = . + 0
+.LANCHOR64 = . + 0
 	.type	DeviceCapacity, %object
 	.size	DeviceCapacity, 4
 DeviceCapacity:
@@ -24703,39 +24750,37 @@ gp_ect_tbl_info:
 	.space	4
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR79 = . + 0
+.LANCHOR67 = . + 0
 	.type	c_ftl_nand_map_blks_per_plane, %object
 	.size	c_ftl_nand_map_blks_per_plane, 2
 c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-.LANCHOR121 = . + 0
+.LANCHOR109 = . + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
 	.space	4
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-.LANCHOR141 = . + 0
+.LANCHOR129 = . + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-.LANCHOR109 = . + 0
+.LANCHOR97 = . + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-.LANCHOR151 = . + 0
+.LANCHOR139 = . + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:
 	.space	2
 	.hidden	free
-	.ident	"GCC: (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3"
-	.section	.note.GNU-stack,"",%progbits

commit 0fe38820d9e1384319dff86638bf28a90f6645aa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 08:54:50 2017 +0800

    rockchip: rk3229: update header macro
    
    Do not use a common name '_CONFIG_H_'
    
    Change-Id: I1b184e9663eb27a06ec89039b6b88b1d099119dc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index c73a100ebb..7f2d2fe1e5 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __RK322X_CONFIG_H
+#define __RK322X_CONFIG_H
 
 #include <configs/rk322x_common.h>
 

commit f011305a0a8e295ffe0a79f306edd29049100739
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 13 17:34:43 2017 +0800

    rockchip: rk3128: move timer init to arch_cpu_init
    
    The board init is too late.
    
    Change-Id: Ie63e86c98644123d1f611280784252a0cc0ada2e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index c77fbde3be..8217fd52c8 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -13,7 +13,6 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/grf_rk3128.h>
 #include <asm/arch/boot_mode.h>
-#include <asm/arch/timer.h>
 #include <power/charge_display.h>
 #include <power/regulator.h>
 #include <video_rockchip.h>
@@ -63,8 +62,6 @@ int board_init(void)
 {
 	int ret = 0;
 
-	rockchip_timer_init();
-
 	ret = regulators_enable_boot_on(false);
 	if (ret) {
 		debug("%s: Cannot enable boot on regulator\n", __func__);
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index ef0ed3bcd4..24c1ee8bf9 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -5,6 +5,7 @@
  */
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/timer.h>
 
 #define GRF_GPIO1C_IOMUX		0x200080c0
 #define SDMMC_INTMASK			0x10214024
@@ -34,6 +35,7 @@ int arch_cpu_init(void)
 	 */
 	writel(0, SDMMC_INTMASK);
 #endif
+	rockchip_timer_init();
 
 	return 0;
 }

commit 2f773ef5440243ad785422d9c7ebe4f4d88fbab0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 08:52:16 2017 +0800

    rockchip: resc_img: return err if some img missing
    
    We are not ablt to go on if we do not able to get some image which
    is must.
    
    Change-Id: I1cebd327ec894c688f57627518df85f6ff4aa836
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index b755b79742..2f026dc624 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -177,12 +177,16 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 	/* Read boot/recovery and chenc if this is an AOSP img */
 	ret = part_get_info_by_name(dev_desc, boot_partname,
 					 &part_info);
-	if (ret < 0)
+	if (ret < 0) {
 		printf("fail to get %s part\n", boot_partname);
+		goto out;
+	}
 	andr_hdr = (void *)hdr;
 	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
-	if (ret != 1)
+	if (ret != 1) {
 		printf("%s read fail\n", __func__);
+		goto out;
+	}
 	ret = android_image_check_header(andr_hdr);
 	if (!ret) {
 		debug("%s Load resource from %s senond pos\n",
@@ -201,8 +205,10 @@ static int init_resource_list(struct resource_img_hdr *hdr)
 		/* Read resource from Rockchip Resource partition */
 		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
 					 &part_info);
-		if (ret < 0)
+		if (ret < 0) {
 			printf("fail to get %s part\n", PART_RESOURCE);
+			goto out;
+		}
 		offset = part_info.start;
 		debug("%s Load resource from %s\n", __func__, part_info.name);
 	}

commit f5a168ec10a7f7c32e863018b76eeaa1404c9e8d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Dec 11 18:04:44 2017 +0800

    rockchip: clk: remove not used file
    
    Change-Id: I29debf757749ca2a63a55d5b45a96d5170b51d85
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c.bak b/drivers/clk/rockchip/clk_rk3128.c.bak
deleted file mode 100644
index cd6ebe96f2..0000000000
--- a/drivers/clk/rockchip/clk_rk3128.c.bak
+++ /dev/null
@@ -1,602 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <clk-uclass.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3128.h>
-#include <asm/arch/hardware.h>
-#include <bitfield.h>
-#include <dm/lists.h>
-#include <dt-bindings/clock/rk3128-cru.h>
-#include <linux/log2.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-enum {
-	VCO_MAX_HZ	= 2400U * 1000000,
-	VCO_MIN_HZ	= 600 * 1000000,
-	OUTPUT_MAX_HZ	= 2400U * 1000000,
-	OUTPUT_MIN_HZ	= 24 * 1000000,
-};
-
-#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
-
-#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
-	.refdiv = _refdiv,\
-	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
-	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
-
-/* use integer mode*/
-static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
-static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
-
-static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
-			 const struct pll_div *div)
-{
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-
-	/* All PLLs have same VCO and output frequency range restrictions. */
-	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
-	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
-
-	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
-	      pll, div->fbdiv, div->refdiv, div->postdiv1,
-	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
-
-	/* use integer mode */
-	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
-	/* Power down */
-	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
-		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
-		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
-		     div->refdiv << PLL_REFDIV_SHIFT));
-
-	/* Power Up */
-	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
-
-	/* waiting for pll lock */
-	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
-		udelay(1);
-
-	return 0;
-}
-
-static int pll_para_config(u32 freq_hz, struct pll_div *div)
-{
-	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
-	u32 postdiv1, postdiv2 = 1;
-	u32 fref_khz;
-	u32 diff_khz, best_diff_khz;
-	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
-	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
-	u32 vco_khz;
-	u32 freq_khz = freq_hz / 1000;
-
-	if (!freq_hz) {
-		printf("%s: the frequency can't be 0 Hz\n", __func__);
-		return -1;
-	}
-
-	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
-	if (postdiv1 > max_postdiv1) {
-		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
-		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
-	}
-
-	vco_khz = freq_khz * postdiv1 * postdiv2;
-
-	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
-	    postdiv2 > max_postdiv2) {
-		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
-		       __func__, freq_hz);
-		return -1;
-	}
-
-	div->postdiv1 = postdiv1;
-	div->postdiv2 = postdiv2;
-
-	best_diff_khz = vco_khz;
-	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
-		fref_khz = ref_khz / refdiv;
-
-		fbdiv = vco_khz / fref_khz;
-		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
-			continue;
-		diff_khz = vco_khz - fbdiv * fref_khz;
-		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
-			fbdiv++;
-			diff_khz = fref_khz - diff_khz;
-		}
-
-		if (diff_khz >= best_diff_khz)
-			continue;
-
-		best_diff_khz = diff_khz;
-		div->refdiv = refdiv;
-		div->fbdiv = fbdiv;
-	}
-
-	if (best_diff_khz > 4 * (1000)) {
-		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
-		       __func__, freq_hz,
-		       best_diff_khz * 1000);
-		return -1;
-	}
-	return 0;
-}
-
-static void rkclk_init(struct rk3128_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	/* pll enter slow-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
-		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
-		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
-
-	/* init pll */
-	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
-	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
-
-	/*
-	 * select apll as cpu/core clock pll source and
-	 * set up dependent divisors for PERI and ACLK clocks.
-	 * core hz : apll = 1:1
-	 */
-	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
-
-	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
-		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
-		     0 << CORE_DIV_CON_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
-		     aclk_div << CORE_ACLK_DIV_SHIFT |
-		     pclk_div << CORE_PERI_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_bus bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
-
-	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
-
-	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
-
-	rk_clrsetreg(&cru->cru_clksel_con[0],
-		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
-		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
-		     aclk_div << BUS_ACLK_DIV_SHIFT);
-
-	rk_clrsetreg(&cru->cru_clksel_con[1],
-		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
-		     pclk_div << BUS_PCLK_DIV_SHIFT |
-		     hclk_div << BUS_HCLK_DIV_SHIFT);
-
-	/*
-	 * select gpll as pd_peri bus clock source and
-	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
-	 */
-	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
-
-	rk_clrsetreg(&cru->cru_clksel_con[10],
-		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
-		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
-		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
-		     pclk_div << PERI_PCLK_DIV_SHIFT |
-		     hclk_div << PERI_HCLK_DIV_SHIFT |
-		     aclk_div << PERI_ACLK_DIV_SHIFT);
-
-	/* PLL enter normal-mode */
-	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
-		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT |
-		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
-
-	/*fix NAND controller  working clock max to 150Mhz */
-	rk_clrsetreg(&cru->cru_clksel_con[2],
-		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
-		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
-		     3 << NANDC_CLK_DIV_SHIFT);
-}
-
-/* Get pll rate by id */
-static u32 rkclk_pll_get_rate(struct rk3128_cru *cru,
-			      enum rk_clk_id clk_id)
-{
-	u32 refdiv, fbdiv, postdiv1, postdiv2;
-	u32 con;
-	int pll_id = rk_pll_id(clk_id);
-	struct rk3128_pll *pll = &cru->pll[pll_id];
-	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
-		GPLL_MODE_SHIFT, 0xff
-	};
-	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
-		GPLL_MODE_MASK, 0xff
-	};
-	uint shift;
-	uint mask;
-
-	con = readl(&cru->cru_mode_con);
-	shift = clk_shift[clk_id];
-	mask = clk_mask[clk_id];
-
-	switch ((con & mask) >> shift) {
-	case GPLL_MODE_SLOW:
-		return OSC_HZ;
-	case GPLL_MODE_NORM:
-		/* normal mode */
-		con = readl(&pll->con0);
-		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
-		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
-		con = readl(&pll->con1);
-		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
-		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
-		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
-	case GPLL_MODE_DEEP:
-	default:
-		return 32768;
-	}
-}
-
-static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
-				  int periph)
-{
-	uint src_rate;
-	uint div, mux;
-	u32 con;
-
-	switch (periph) {
-	case HCLK_EMMC:
-	case SCLK_EMMC:
-	case SCLK_EMMC_SAMPLE:
-		con = readl(&cru->cru_clksel_con[12]);
-		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
-		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
-		break;
-	case HCLK_SDMMC:
-	case SCLK_SDMMC:
-		con = readl(&cru->cru_clksel_con[11]);
-		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
-		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
-	return DIV_TO_RATE(src_rate, div);
-}
-
-static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
-				  int periph, uint freq)
-{
-	int src_clk_div;
-	int mux;
-
-	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
-
-	/* mmc clock defaulg div 2 internal, need provide double in cru */
-	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
-
-	if (src_clk_div > 128) {
-		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
-		mux = EMMC_SEL_24M;
-	} else {
-		mux = EMMC_SEL_GPLL;
-	}
-
-	switch (periph) {
-	case HCLK_EMMC:
-		rk_clrsetreg(&cru->cru_clksel_con[12],
-			     EMMC_PLL_MASK | EMMC_DIV_MASK,
-			     mux << EMMC_PLL_SHIFT |
-			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
-		break;
-	case HCLK_SDMMC:
-	case SCLK_SDMMC:
-		rk_clrsetreg(&cru->cru_clksel_con[11],
-			     MMC0_PLL_MASK | MMC0_DIV_MASK,
-			     mux << MMC0_PLL_SHIFT |
-			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
-}
-
-static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
-{
-	u32 div, con;
-
-	switch (clk_id) {
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		con = readl(&cru->cru_clksel_con[10]);
-		div = con >> 12 & 0x3;
-		break;
-	default:
-		printf("do not support this peripheral bus\n");
-		return -EINVAL;
-	}
-
-	return DIV_TO_RATE(PERI_ACLK_HZ, div);
-}
-
-static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
-{
-	int src_clk_div;
-
-	src_clk_div = PERI_ACLK_HZ / hz;
-	assert(src_clk_div - 1 < 4);
-
-	switch (clk_id) {
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		rk_setreg(&cru->cru_clksel_con[10],
-			  ((src_clk_div - 1) << 12));
-		break;
-	default:
-		printf("do not support this peripheral bus\n");
-		return -EINVAL;
-	}
-
-	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
-}
-
-static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
-{
-	u32 div, val;
-
-	val = readl(&cru->cru_clksel_con[24]);
-	div = bitfield_extract(val, SARADC_DIV_CON_SHIFT,
-			       SARADC_DIV_CON_WIDTH);
-
-	return DIV_TO_RATE(OSC_HZ, div);
-}
-
-static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
-{
-	int src_clk_div;
-
-	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
-
-	rk_clrsetreg(&cru->cru_clksel_con[24],
-		     SARADC_DIV_CON_MASK,
-		     src_clk_div << SARADC_DIV_CON_SHIFT);
-
-	return rk3128_saradc_get_clk(cru);
-}
-
-static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
-{
-	int src_clk_div;
-	struct pll_div cpll_config = {0};
-
-	src_clk_div = GPLL_HZ / hz;
-	assert(src_clk_div - 1 < 31);
-
-	switch (clk_id) {
-	case ACLK_VIO0:
-		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     VIO0_PLL_MASK | VIO0_DIV_MASK,
-			     VIO0_SEL_GPLL << VIO0_PLL_SHIFT |
-			     (src_clk_div - 1) << VIO0_DIV_SHIFT);
-		break;
-	case ACLK_VIO1:
-		rk_clrsetreg(&cru->cru_clksel_con[31],
-			     VIO1_PLL_MASK | VIO1_DIV_MASK,
-			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
-			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
-		break;
-	case DCLK_LCDC:
-		if (pll_para_config(hz, &cpll_config))
-			return -1;
-		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
-
-		rk_clrsetreg(&cru->cru_clksel_con[27],
-			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
-			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
-			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
-		break;
-	default:
-		printf("do not support this vop freq\n");
-		return -EINVAL;
-	}
-
-	return hz;
-}
-
-static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
-{
-	u32 div, con, parent;
-
-	switch (clk_id) {
-	case ACLK_VIO0:
-		con = readl(&cru->cru_clksel_con[31]);
-		div = con  & 0x1f;
-		parent = GPLL_HZ;
-		break;
-	case ACLK_VIO1:
-		con = readl(&cru->cru_clksel_con[31]);
-		div = (con >> 8) & 0x1f;
-		parent = GPLL_HZ;
-		break;
-	case DCLK_LCDC:
-		con = readl(&cru->cru_clksel_con[27]);
-		div = (con >> 8) & 0xfff;
-		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
-		break;
-	default:
-		return -ENOENT;
-	}
-	return DIV_TO_RATE(parent, div);
-}
-
-static ulong rk3128_clk_get_rate(struct clk *clk)
-{
-	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-
-	switch (clk->id) {
-	case 0 ... 63:
-		return rkclk_pll_get_rate(priv->cru, clk->id);
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		return rk3128_peri_get_pclk(priv->cru, clk->id);
-	case SCLK_SARADC:
-		return rk3128_saradc_get_clk(priv->cru);
-	case DCLK_LCDC:
-	case ACLK_VIO0:
-	case ACLK_VIO1:
-		return rk3128_vop_get_rate(priv->cru, clk->id);
-	default:
-		return -ENOENT;
-	}
-}
-
-static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
-{
-	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
-	ulong new_rate, gclk_rate;
-
-	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
-	switch (clk->id) {
-	case 0 ... 63:
-		return 0;
-	case DCLK_LCDC:
-	case ACLK_VIO0:
-	case ACLK_VIO1:
-		new_rate = rk3128_vop_set_clk(priv->cru,
-					      clk->id, rate);
-		break;
-	case HCLK_EMMC:
-		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
-						clk->id, rate);
-		break;
-	case PCLK_I2C0:
-	case PCLK_I2C1:
-	case PCLK_I2C2:
-	case PCLK_I2C3:
-	case PCLK_PWM:
-		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
-		break;
-	case SCLK_SARADC:
-		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
-		break;
-	default:
-		return -ENOENT;
-	}
-
-	return new_rate;
-}
-
-static struct clk_ops rk3128_clk_ops = {
-	.get_rate	= rk3128_clk_get_rate,
-	.set_rate	= rk3128_clk_set_rate,
-};
-
-static int rk3128_clk_probe(struct udevice *dev)
-{
-	struct rk3128_clk_priv *priv = dev_get_priv(dev);
-
-	priv->cru = (struct rk3128_cru *)dev_read_addr(dev);
-	rkclk_init(priv->cru);
-
-	return 0;
-}
-
-static int rk3128_clk_bind(struct udevice *dev)
-{
-	int ret;
-	struct udevice *sys_child;
-	struct sysreset_reg *priv;
-	u32 offset;
-
-	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
-				 &sys_child);
-	if (ret) {
-		debug("Warning: No sysreset driver: ret=%d\n", ret);
-	} else {
-		priv = malloc(sizeof(struct sysreset_reg));
-		priv->glb_srst_fst_value = offsetof(struct rk3128_cru,
-						    cru_glb_srst_fst_value);
-		priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
-						    cru_glb_srst_snd_value);
-		sys_child->priv = priv;
-	}
-
-	offset = offsetof(struct rk3128_cru, cru_softrst_con[0]);
-	ret = rockchip_reset_bind(dev, offset, 9);
-	if (ret)
-		debug("Warning: software reset driver bind faile\n");
-
-	return 0;
-}
-
-static const struct udevice_id rk3128_clk_ids[] = {
-	{ .compatible = "rockchip,rk3128-cru" },
-	{ .compatible = "rockchip,rk3126-cru" },
-	{ }
-};
-
-U_BOOT_DRIVER(rockchip_rk3128_cru) = {
-	.name		= "clk_rk3128",
-	.id		= UCLASS_CLK,
-	.of_match	= rk3128_clk_ids,
-	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
-	.ops		= &rk3128_clk_ops,
-	.bind		= rk3128_clk_bind,
-	.probe		= rk3128_clk_probe,
-};

commit 5ecf0ee53bba61db0a04402e4bb83e991658ffd0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 12:22:58 2017 +0800

    disk: part: use common api to lookup part driver
    
    Do not need to scan disk every time when we get part info
    by name.
    
    Change-Id: Id79a3a9065731815567055329a2f7f80b3c8c9d4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index b007138600..96c2858ac9 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -638,26 +638,23 @@ cleanup:
 int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 	disk_partition_t *info)
 {
-	struct part_driver *first_drv =
-		ll_entry_start(struct part_driver, part_driver);
-	const int n_drvs = ll_entry_count(struct part_driver, part_driver);
 	struct part_driver *part_drv;
+	int ret;
+	int i;
 
-	for (part_drv = first_drv; part_drv != first_drv + n_drvs; part_drv++) {
-		int ret;
-		int i;
-		for (i = 1; i < part_drv->max_entries; i++) {
-			ret = part_drv->get_info(dev_desc, i, info);
-			if (ret != 0) {
-				/* no more entries in table */
-				break;
-			}
-			if (strcmp(name, (const char *)info->name) == 0) {
-				/* matched */
-				return i;
-			}
+	part_drv = part_driver_lookup_type(dev_desc);
+	for (i = 1; i < part_drv->max_entries; i++) {
+		ret = part_drv->get_info(dev_desc, i, info);
+		if (ret != 0) {
+			/* no more entries in table */
+			break;
+		}
+		if (strcmp(name, (const char *)info->name) == 0) {
+			/* matched */
+			return i;
 		}
 	}
+
 	return -1;
 }
 

commit 067b22ddca2a4f0942c75a6d5e8748061887ad93
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 14:24:31 2017 +0800

    disk: part: scan the disk if the part_type is unknow
    
    We can get the new part table when we write a new partition table to
    a blank disk with this patch, or else we have to reset the board
    to get new partition table.
    
    Change-Id: If6688149a4a3ae9d6f5731757a1b5831494a9152
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/part.c b/disk/part.c
index c04e91af20..b007138600 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -24,16 +24,28 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef HAVE_BLOCK_DEVICE
-static struct part_driver *part_driver_lookup_type(int part_type)
+static struct part_driver *part_driver_lookup_type(struct blk_desc *dev_desc)
 {
 	struct part_driver *drv =
 		ll_entry_start(struct part_driver, part_driver);
 	const int n_ents = ll_entry_count(struct part_driver, part_driver);
 	struct part_driver *entry;
 
-	for (entry = drv; entry != drv + n_ents; entry++) {
-		if (part_type == entry->part_type)
-			return entry;
+	if (dev_desc->part_type == PART_TYPE_UNKNOWN) {
+		for (entry = drv; entry != drv + n_ents; entry++) {
+			int ret;
+
+			ret = entry->test(dev_desc);
+			if (!ret) {
+				dev_desc->part_type = entry->part_type;
+				return entry;
+			}
+		}
+	} else {
+		for (entry = drv; entry != drv + n_ents; entry++) {
+			if (dev_desc->part_type == entry->part_type)
+				return entry;
+		}
 	}
 
 	/* Not found */
@@ -286,7 +298,7 @@ void part_print(struct blk_desc *dev_desc)
 {
 	struct part_driver *drv;
 
-	drv = part_driver_lookup_type(dev_desc->part_type);
+	drv = part_driver_lookup_type(dev_desc);
 	if (!drv) {
 		printf("## Unknown partition table type %x\n",
 		       dev_desc->part_type);
@@ -315,7 +327,7 @@ int part_get_info(struct blk_desc *dev_desc, int part,
 	info->type_guid[0] = 0;
 #endif
 
-	drv = part_driver_lookup_type(dev_desc->part_type);
+	drv = part_driver_lookup_type(dev_desc);
 	if (!drv) {
 		debug("## Unknown partition table type %x\n",
 		      dev_desc->part_type);

commit 1a3726ad9146f508bfaae6ce2b4e199829e7279d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 14 10:52:54 2017 +0800

    rockchip: boot_rkimg: fix wrong size for bootloader_message
    
    size in byte for malloc, and in block/512bytes for blk read.
    
    Change-Id: I0534a13838ff00452d9ca472d7caea03502cc058
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
index d03e4315e1..f146a3e630 100644
--- a/common/boot_rkimg.c
+++ b/common/boot_rkimg.c
@@ -158,7 +158,8 @@ int rockchip_get_boot_mode(void)
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 	struct bootloader_message *bmsg;
-	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE);
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE)
+		   * RK_BLK_SIZE;
 	int ret;
 
 	if (boot_mode != -1)
@@ -173,7 +174,7 @@ int rockchip_get_boot_mode(void)
 	bmsg = memalign(ARCH_DMA_MINALIGN, size);
 	ret = blk_dread(dev_desc,
 			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
-			size, bmsg);
+			size >> 9, bmsg);
 	if (ret < 0)
 		goto err;
 

commit b7c7eca21dd935db5981d3c7428f5c70b8ecd73d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 7 16:47:56 2017 +0800

    make.sh: guide user how to obtain rkbin Responsity
    
    Change-Id: I74f6902da21cf0ea50298653fc029c410b0771bb
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index a5010a82e1..57f292daf1 100755
--- a/make.sh
+++ b/make.sh
@@ -33,7 +33,11 @@ pack_images()
 	if [ -d ${dst} ]; then
 		path=$(cd `dirname ${dst}`; pwd)
 	else
-		echo "Can't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
+		echo "\nCan't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
+		echo "How to obtain, 3 ways:"
+		echo "	1. Login your gerrit account: \"Projects\" -> \"List\" -> search rkbin Responsity"
+		echo "	2. Github Responsity: https://github.com/rockchip-linux/rkbin"
+		echo "	3. Download full release SDK Responsity\n"
 		exit 1
 	fi
 

commit 882c725118e0691f787d4b8c11ce9a7f10ebe608
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Dec 7 16:02:43 2017 +0800

    rockchip: add CRC32 image verify driver
    
    This CRC32 driver is from: remotes/origin/rkdevelop.
    RK format images is packed by mkknlimg tool, it adds the
    CRC32 checksum which is not standard into image header,
    so this CRC32 function is only used for rockchip platforms.
    
    Change-Id: Ia52c6efa9dede148b1cb448691380f2d3184cd5e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_crc.h b/arch/arm/include/asm/arch-rockchip/rockchip_crc.h
new file mode 100644
index 0000000000..c017394d12
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_crc.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_CRC_H_
+#define __ROCKCHIP_CRC_H_
+
+u32 rockchip_crc_verify(unsigned char *data, u32 size);
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 68675a89f8..cb80f26ac3 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -312,6 +312,12 @@ config ROCKCHIP_VENDOR_PARTITION
 	  This enable support to read/write vendor configuration data from/to
 	  this partition.
 
+config ROCKCHIP_CRC
+	bool "Rockchip CRC verify images"
+	help
+	  This enable support Rockchip CRC verify images. It takes a lot of time,
+	  so it is better only used for debug.
+
 config ROCKCHIP_SMCCC
 	bool "Rockchip SMCCC"
 	default y if ARM_SMCCC
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 2ef209a3ca..4ea4ff43ff 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -31,6 +31,7 @@ ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
 obj-y += boot_mode.o
 endif
 
+obj-$(CONFIG_ROCKCHIP_CRC) += rockchip_crc.o
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
diff --git a/arch/arm/mach-rockchip/rockchip_crc.c b/arch/arm/mach-rockchip/rockchip_crc.c
new file mode 100644
index 0000000000..61ddbfb8d2
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_crc.c
@@ -0,0 +1,119 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/rockchip_crc.h>
+
+#define tole(x) cpu_to_le32(x)
+
+/* Table of CRC-32's of all single-byte values (made by make_crc_table) */
+static const uint32_t crc_table[256] = {
+	tole(0x00000000L), tole(0x04c10db7L), tole(0x09821b6eL), tole(0x0d4316d9L),
+	tole(0x130436dcL), tole(0x17c53b6bL), tole(0x1a862db2L), tole(0x1e472005L),
+	tole(0x26086db8L), tole(0x22c9600fL), tole(0x2f8a76d6L), tole(0x2b4b7b61L),
+	tole(0x350c5b64L), tole(0x31cd56d3L), tole(0x3c8e400aL), tole(0x384f4dbdL),
+	tole(0x4c10db70L), tole(0x48d1d6c7L), tole(0x4592c01eL), tole(0x4153cda9L),
+	tole(0x5f14edacL), tole(0x5bd5e01bL), tole(0x5696f6c2L), tole(0x5257fb75L),
+	tole(0x6a18b6c8L), tole(0x6ed9bb7fL), tole(0x639aada6L), tole(0x675ba011L),
+	tole(0x791c8014L), tole(0x7ddd8da3L), tole(0x709e9b7aL), tole(0x745f96cdL),
+	tole(0x9821b6e0L), tole(0x9ce0bb57L), tole(0x91a3ad8eL), tole(0x9562a039L),
+	tole(0x8b25803cL), tole(0x8fe48d8bL), tole(0x82a79b52L), tole(0x866696e5L),
+	tole(0xbe29db58L), tole(0xbae8d6efL), tole(0xb7abc036L), tole(0xb36acd81L),
+	tole(0xad2ded84L), tole(0xa9ece033L), tole(0xa4aff6eaL), tole(0xa06efb5dL),
+	tole(0xd4316d90L), tole(0xd0f06027L), tole(0xddb376feL), tole(0xd9727b49L),
+	tole(0xc7355b4cL), tole(0xc3f456fbL), tole(0xceb74022L), tole(0xca764d95L),
+	tole(0xf2390028L), tole(0xf6f80d9fL), tole(0xfbbb1b46L), tole(0xff7a16f1L),
+	tole(0xe13d36f4L), tole(0xe5fc3b43L), tole(0xe8bf2d9aL), tole(0xec7e202dL),
+	tole(0x34826077L), tole(0x30436dc0L), tole(0x3d007b19L), tole(0x39c176aeL),
+	tole(0x278656abL), tole(0x23475b1cL), tole(0x2e044dc5L), tole(0x2ac54072L),
+	tole(0x128a0dcfL), tole(0x164b0078L), tole(0x1b0816a1L), tole(0x1fc91b16L),
+	tole(0x018e3b13L), tole(0x054f36a4L), tole(0x080c207dL), tole(0x0ccd2dcaL),
+	tole(0x7892bb07L), tole(0x7c53b6b0L), tole(0x7110a069L), tole(0x75d1addeL),
+	tole(0x6b968ddbL), tole(0x6f57806cL), tole(0x621496b5L), tole(0x66d59b02L),
+	tole(0x5e9ad6bfL), tole(0x5a5bdb08L), tole(0x5718cdd1L), tole(0x53d9c066L),
+	tole(0x4d9ee063L), tole(0x495fedd4L), tole(0x441cfb0dL), tole(0x40ddf6baL),
+	tole(0xaca3d697L), tole(0xa862db20L), tole(0xa521cdf9L), tole(0xa1e0c04eL),
+	tole(0xbfa7e04bL), tole(0xbb66edfcL), tole(0xb625fb25L), tole(0xb2e4f692L),
+	tole(0x8aabbb2fL), tole(0x8e6ab698L), tole(0x8329a041L), tole(0x87e8adf6L),
+	tole(0x99af8df3L), tole(0x9d6e8044L), tole(0x902d969dL), tole(0x94ec9b2aL),
+	tole(0xe0b30de7L), tole(0xe4720050L), tole(0xe9311689L), tole(0xedf01b3eL),
+	tole(0xf3b73b3bL), tole(0xf776368cL), tole(0xfa352055L), tole(0xfef42de2L),
+	tole(0xc6bb605fL), tole(0xc27a6de8L), tole(0xcf397b31L), tole(0xcbf87686L),
+	tole(0xd5bf5683L), tole(0xd17e5b34L), tole(0xdc3d4dedL), tole(0xd8fc405aL),
+	tole(0x6904c0eeL), tole(0x6dc5cd59L), tole(0x6086db80L), tole(0x6447d637L),
+	tole(0x7a00f632L), tole(0x7ec1fb85L), tole(0x7382ed5cL), tole(0x7743e0ebL),
+	tole(0x4f0cad56L), tole(0x4bcda0e1L), tole(0x468eb638L), tole(0x424fbb8fL),
+	tole(0x5c089b8aL), tole(0x58c9963dL), tole(0x558a80e4L), tole(0x514b8d53L),
+	tole(0x25141b9eL), tole(0x21d51629L), tole(0x2c9600f0L), tole(0x28570d47L),
+	tole(0x36102d42L), tole(0x32d120f5L), tole(0x3f92362cL), tole(0x3b533b9bL),
+	tole(0x031c7626L), tole(0x07dd7b91L), tole(0x0a9e6d48L), tole(0x0e5f60ffL),
+	tole(0x101840faL), tole(0x14d94d4dL), tole(0x199a5b94L), tole(0x1d5b5623L),
+	tole(0xf125760eL), tole(0xf5e47bb9L), tole(0xf8a76d60L), tole(0xfc6660d7L),
+	tole(0xe22140d2L), tole(0xe6e04d65L), tole(0xeba35bbcL), tole(0xef62560bL),
+	tole(0xd72d1bb6L), tole(0xd3ec1601L), tole(0xdeaf00d8L), tole(0xda6e0d6fL),
+	tole(0xc4292d6aL), tole(0xc0e820ddL), tole(0xcdab3604L), tole(0xc96a3bb3L),
+	tole(0xbd35ad7eL), tole(0xb9f4a0c9L), tole(0xb4b7b610L), tole(0xb076bba7L),
+	tole(0xae319ba2L), tole(0xaaf09615L), tole(0xa7b380ccL), tole(0xa3728d7bL),
+	tole(0x9b3dc0c6L), tole(0x9ffccd71L), tole(0x92bfdba8L), tole(0x967ed61fL),
+	tole(0x8839f61aL), tole(0x8cf8fbadL), tole(0x81bbed74L), tole(0x857ae0c3L),
+	tole(0x5d86a099L), tole(0x5947ad2eL), tole(0x5404bbf7L), tole(0x50c5b640L),
+	tole(0x4e829645L), tole(0x4a439bf2L), tole(0x47008d2bL), tole(0x43c1809cL),
+	tole(0x7b8ecd21L), tole(0x7f4fc096L), tole(0x720cd64fL), tole(0x76cddbf8L),
+	tole(0x688afbfdL), tole(0x6c4bf64aL), tole(0x6108e093L), tole(0x65c9ed24L),
+	tole(0x11967be9L), tole(0x1557765eL), tole(0x18146087L), tole(0x1cd56d30L),
+	tole(0x02924d35L), tole(0x06534082L), tole(0x0b10565bL), tole(0x0fd15becL),
+	tole(0x379e1651L), tole(0x335f1be6L), tole(0x3e1c0d3fL), tole(0x3add0088L),
+	tole(0x249a208dL), tole(0x205b2d3aL), tole(0x2d183be3L), tole(0x29d93654L),
+	tole(0xc5a71679L), tole(0xc1661bceL), tole(0xcc250d17L), tole(0xc8e400a0L),
+	tole(0xd6a320a5L), tole(0xd2622d12L), tole(0xdf213bcbL), tole(0xdbe0367cL),
+	tole(0xe3af7bc1L), tole(0xe76e7676L), tole(0xea2d60afL), tole(0xeeec6d18L),
+	tole(0xf0ab4d1dL), tole(0xf46a40aaL), tole(0xf9295673L), tole(0xfde85bc4L),
+	tole(0x89b7cd09L), tole(0x8d76c0beL), tole(0x8035d667L), tole(0x84f4dbd0L),
+	tole(0x9ab3fbd5L), tole(0x9e72f662L), tole(0x9331e0bbL), tole(0x97f0ed0cL),
+	tole(0xafbfa0b1L), tole(0xab7ead06L), tole(0xa63dbbdfL), tole(0xa2fcb668L),
+	tole(0xbcbb966dL), tole(0xb87a9bdaL), tole(0xb5398d03L), tole(0xb1f880b4L)
+};
+
+#define DO_CRC(x) crc = tab[((crc >> 24) ^ (x)) & 255] ^ (crc << 8)
+
+static uint32_t crc32_rk(uint32_t crc, const unsigned char *s, uint32_t len)
+{
+	const uint32_t *tab;
+
+	tab = crc_table;
+	crc = cpu_to_le32(crc);
+
+	do {
+		DO_CRC(*s++);
+	} while (--len);
+
+	return le32_to_cpu(crc);
+}
+
+#undef DO_CRC
+
+u32 rockchip_crc_verify(unsigned char *data, u32 size)
+{
+	u32 crc_check = 0, crc_calc = 0;
+	int i = 0;
+
+	if (size <= 4)
+		return 0;
+
+	size -= 4;
+	for (i = 3; i >= 0; i--)
+		crc_check = (crc_check << 8) + (*(data + size + i));
+
+	crc_calc = crc32_rk(0, data, size);
+
+	debug("%s: crc_check=0x%x, crc_calc=0x%x\n",
+	      __func__, crc_check, crc_calc);
+
+	if (crc_calc == crc_check)
+		return crc_check;
+
+	return 0;
+}

commit 5059d297b0c0091c93398c39d56d3bdaa88b318e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 17:49:34 2017 +0800

    rockchip: config: add a bootcmd for rkimg
    
    Try emmc first, and then nand;
    Try boot_android first, and then bootrkp;
    
    Change-Id: I21ae59bbfe420adc66409766aca05d44db7e19aa
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index 69e300605f..56ea754554 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -20,4 +20,7 @@
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"
 
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND
+
 #endif
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 082dd1d43b..5b3fdb5ddb 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -61,6 +61,12 @@
 	"name=security,size=2M,uuid=${uuid_gpt_security};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};"
 
+#define RKIMG_BOOTCOMMAND \
+	"if mmc dev 0; then setenv devtype mmc; setenv devnum 0;" \
+	"else if rknand dev 0; then setenv devtype mmc; setenv devnum 0; fi;" \
+	"fi; boot_android ${devtype} ${devnum};" \
+	"bootrkp;"
+
 #endif
 
 /*

commit 3c186af272c70be971f6669ce67ff1c9f93b8f37
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 16:19:47 2017 +0800

    rockchip: rk3229: config: updpate block api to rkimg api
    
    Change-Id: Ic73e266835f17509d7a45af589dd11d2df79fc14
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index c124cd7b94..32c52ca461 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -10,7 +10,7 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index b036fa784e..f8a58e86df 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -10,7 +10,7 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
-CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_RKIMG_BOOTLOADER=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_GVA_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000

commit 6442f219ba8b20e38565d205151e8caa369aeb5b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 16:18:30 2017 +0800

    rockchip: clk: rk322x: update assert for periph hclk/pclk
    
    This is a fix to:
    f04b6e2 rockchip: rk322x: fix pd_bus hclk/pclk
    
    Change-Id: Ia57554a8f09e44b576c59c60273247dd7fcef10d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index ce7d62a0e4..bc9055ee63 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -124,10 +124,8 @@ static void rkclk_init(struct rk322x_cru *cru)
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

commit f54f0bc2eec914f0cec058beda1ed623068052f2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 16:14:47 2017 +0800

    rockchip: rk3036: clk: update periph hclk/pclk
    
    periph hclk/pclk parent is aclk, not gpll.
    
    Change-Id: Ic59abb7964f5efd627f9b76c13643e2b83af6e96
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 32b250f97c..761f032d81 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -116,17 +116,17 @@ static void rkclk_init(struct rk3036_cru *cru)
 		     pclk_div << CORE_PERI_DIV_SHIFT);
 
 	/*
-	 * select apll as pd_bus bus clock source and
+	 * select gpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
-	pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
 
-	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
+	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

commit b5381a6c8c317b6d23b5117358f02799fef14f2f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 11:56:54 2017 +0800

    rockchip: config: add a default partition table for rkimg
    
    Rockchip use it's own partition table for product like android.
    
    Change-Id: I1c46c7aebd07ff0b433c4ebeba97673983297205
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index a6a6096341..082dd1d43b 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -42,6 +42,25 @@
 	"name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
 	"name=rootfs,size=-,uuid="ROOT_UUID
 
+#define PARTS_RKIMG \
+	"uuid_disk=${uuid_gpt_disk};" \
+	"name=uboot,start=8MB,size=4MB,uuid=${uuid_gpt_loader2};" \
+	"name=trust,size=4M,uuid=${uuid_gpt_atf};" \
+	"name=misc,size=4MB,uuid=${uuid_gpt_misc};" \
+	"name=resource,size=16MB,uuid=${uuid_gpt_resource};" \
+	"name=kernel,size=32M,uuid=${uuid_gpt_kernel};" \
+	"name=boot,size=32M,bootable,uuid=${uuid_gpt_boot};" \
+	"name=recovery,size=32M,uuid=${uuid_gpt_recovery};" \
+	"name=backup,size=112M,uuid=${uuid_gpt_backup};" \
+	"name=cache,size=512M,uuid=${uuid_gpt_cache};" \
+	"name=system,size=2048M,uuid=${uuid_gpt_system};" \
+	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
+	"name=vendor,size=32M,uuid=${uuid_gpt_vendor};" \
+	"name=oem,size=32M,uuid=${uuid_gpt_oem};" \
+	"name=frp,size=512K,uuid=${uuid_gpt_frp};" \
+	"name=security,size=2M,uuid=${uuid_gpt_security};" \
+	"name=userdata,size=-,uuid=${uuid_gpt_userdata};"
+
 #endif
 
 /*

commit c446d7743f79994ca33bf4f55290c3933fa8f18b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 11:18:22 2017 +0800

    rockchip: rk312x-config: update config with new api
    
    Change-Id: Id912e2a63e57fe82dffdd678fa9574f08e18bd30
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index ab1756c172..1059dc5f59 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -2,10 +2,10 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_BLOCK_API=y
-CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_ROCKCHIP_PARTITION_BOOT=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 7d8120860b..8c55012136 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -2,14 +2,15 @@ CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_RK3126=y
-CONFIG_ROCKCHIP_BLOCK_API=y
-CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
-CONFIG_ROCKCHIP_PARTITION_BOOT=y
+CONFIG_RKIMG_BOOTLOADER=y
+CONFIG_CMD_BOOT_ROCKCHIP=y
+CONFIG_RKPARM_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -19,6 +20,8 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y

commit ab03cc9f18441ad8569825369916e3dd8b720c53
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 29 17:59:14 2017 +0800

    rockchip: remove blk and parameter
    
    We use blk_desc instead of interface from BLOCK_API, and move parameter
    into disk/ as a standard partition format.
    
    Change-Id: I6923ef1c23fa6ba1d614dfca079599e87c123ccc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrkp.h b/arch/arm/include/asm/arch-rockchip/bootrkp.h
deleted file mode 100644
index f1110ac06d..0000000000
--- a/arch/arm/include/asm/arch-rockchip/bootrkp.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef __BOOTRKP_H_
-#define __BOOTRKP_H_
-
-enum android_boot_mode {
-	ANDROID_BOOT_MODE_NORMAL = 0,
-
-	/* "recovery" mode is triggered by the "reboot recovery" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "boot-recovery" in the BCB message. This mode should boot the
-	 * recovery kernel.
-	 */
-	ANDROID_BOOT_MODE_RECOVERY,
-
-	/* "bootloader" mode is triggered by the "reboot bootloader" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "bootonce-bootloader" in the BCB message. This mode should boot into
-	 * fastboot.
-	 */
-	ANDROID_BOOT_MODE_BOOTLOADER,
-};
-
-int rockchip_get_boot_mode(void);
-
-#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 7f59383b41..68675a89f8 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -298,19 +298,6 @@ config RKIMG_BOOTLOADER
 	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
 	  like SN and MAC address.
 
-config ROCKCHIP_BLOCK_API
-	bool "Rockchip block device api support"
-	help
-	  This enable read access to block device on
-	  rockchip platform.
-
-config ROCKCHIP_PARAM
-	bool "Rockchip parameter support"
-	depends on ROCKCHIP_BLOCK_API
-	help
-	  This enable support to get partition from rockchip
-	  parameter
-
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
 	depends on RKIMG_BOOTLOADER
@@ -318,12 +305,6 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
-config ROCKCHIP_PARTITION_BOOT
-	bool "Enable support for booting system from rockchip format partition"
-	depends on ROCKCHIP_RESOURCE_IMAGE
-	help
-	  This enables support for bootimg system from rockchip format partition
-
 config ROCKCHIP_VENDOR_PARTITION
 	bool "Rockchip vendor storage partition support"
 	depends on RKIMG_BOOTLOADER
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b58aa37620..2ef209a3ca 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -32,12 +32,8 @@ obj-y += boot_mode.o
 endif
 
 obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
-
-obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
-obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
-obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
 obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
deleted file mode 100644
index f231287f17..0000000000
--- a/arch/arm/mach-rockchip/blk.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <blk.h>
-#include <dm.h>
-#include <mmc.h>
-#include <rknand.h>
-#include <spi.h>
-#include <spi_flash.h>
-#include "rockchip_blk.h"
-
-struct blkdev {
-	int if_type;
-	int devnum;
-	ulong (*write)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer);
-	ulong (*read)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer);
-	void *priv;
-};
-
-static struct blkdev *blkdev;
-
-struct mmc *mmcblk_dev_init(int dev)
-{
-	struct mmc *mmcdev;
-
-	mmcdev = find_mmc_device(dev);
-	if (!mmcdev) {
-		printf("no mmc device at slot %x\n", dev);
-		return NULL;
-	}
-
-	if (mmc_init(mmcdev))
-		return NULL;
-
-	return mmcdev;
-}
-
-static struct spi_flash *spi_flash_init(int dev)
-{
-	struct spi_flash *flash;
-	struct udevice *udev;
-	int ret;
-
-	ret = spi_flash_probe_bus_cs(0, 0, 0, 0, &udev);
-	if (ret) {
-		printf("Failed to initialize SPI flash(error %d)\n", ret);
-		return NULL;
-	}
-
-	flash = dev_get_uclass_priv(udev);
-
-	return flash;
-}
-
-ulong blk_read(struct blkdev* blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
-{
-	struct blk_desc *desc;
-	const char *if_name;
-	ulong n;
-
-	if_name = blk_get_if_type_name(blkdev->if_type);
-	desc = blk_get_dev(if_name, blkdev->devnum);
-	n = blk_dread(desc, start, blkcnt, buffer);
-
-	return n == blkcnt ? 0 : 1;
-}
-
-ulong blk_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
-{
-	struct blk_desc *desc;
-	const char *if_name;
-	ulong n;
-
-	if_name = blk_get_if_type_name(blkdev->if_type);
-	desc = blk_get_dev(if_name, blkdev->devnum);
-	n = blk_dwrite(desc, start, blkcnt, buffer);
-
-	return n == blkcnt ? 0 : 1;
-}
-
-ulong sf_read(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
-{
-	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
-	u32 offset = start << 9;
-	size_t len = blkcnt << 9;
-
-	return spi_flash_read(flash, offset, len, buffer);
-}
-
-ulong sf_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
-{
-	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
-	u32 offset = start << 9;
-	size_t len = blkcnt << 9;
-
-	return spi_flash_write(flash, offset, len, buffer);
-}
-
-static int get_bootdev_if_type(int dev)
-{
-	int if_type;
-
-	switch (dev) {
-	case BOOT_FROM_EMMC:
-		if_type = IF_TYPE_MMC;
-		break;
-	case BOOT_FROM_FLASH:
-		if_type = IF_TYPE_RKNAND;
-		break;
-	default:
-		if_type = dev;
-		break;
-	}
-
-	return if_type;
-}
-
-static struct blkdev *blkdev_init(void)
-{
-	struct blkdev *blkdev;
-	int dev;
-	int if_type;
-	void *priv;
-
-
-	dev = get_bootdev_type();
-	if_type = get_bootdev_if_type(dev);
-
-	if (if_type == IF_TYPE_MMC) {
-		priv = mmcblk_dev_init(0);
-	} else if (if_type == IF_TYPE_RKNAND) {
-		priv = (void *)rknand_scan_namespace();
-	} else if (if_type == BOOT_FROM_SPI_NOR) {
-		priv = spi_flash_init(0);
-	}
-
-	blkdev = malloc(sizeof(*blkdev));
-	if (!blkdev) {
-		printf("out of memory for blkdev\n");
-		return NULL;
-	}
-
-	blkdev->if_type = if_type;
-	blkdev->devnum = 0;
-	blkdev ->priv = priv;
-	if ((if_type == IF_TYPE_MMC) || (if_type == IF_TYPE_RKNAND)) {
-		blkdev->read = blk_read;
-		blkdev->write = blk_write;
-	} else if (if_type == BOOT_FROM_SPI_NOR) {
-		blkdev->read = sf_read;
-		blkdev->write = sf_write;
-	}
-
-	return blkdev;
-}
-
-int blkdev_read(void *buffer, u32 blk, u32 cnt)
-{
-	if (!blkdev) {
-		blkdev = blkdev_init();
-		if (!blkdev)
-			return -ENODEV;
-	}
-
-	return blkdev->read(blkdev, blk, cnt, buffer);
-}
-
-
-int blkdev_write(void *buffer, u32 blk, u32 cnt)
-{
-	if (!blkdev) {
-		blkdev = blkdev_init();
-		if (!blkdev)
-			return -ENODEV;
-	}
-
-	return blkdev->write(blkdev, blk, cnt, buffer);
-}
-
-/* Gets the storage type of the current device */
-int get_bootdev_type(void)
-{
-	int type = 0;
-
-	#ifdef CONFIG_EMMC_BOOT
-		type = BOOT_FROM_EMMC;
-	#endif /* CONFIG_EMMC_BOOT */
-	#ifdef CONFIG_QSPI_BOOT
-		type = BOOT_FROM_SPI_NAND;
-	#endif /* CONFIG_QSPI_BOOT */
-	#ifdef CONFIG_NAND_BOOT
-		type = BOOT_FROM_FLASH;
-	#endif /* CONFIG_NAND_BOOT */
-	#ifdef CONFIG_NOR_BOOT
-		type = BOOT_FROM_SPI_NOR;
-	#endif /* CONFIG_NOR_BOOT */
-
-	/* For current use(Only EMMC support!) */
-	if (!type)
-		type = BOOT_FROM_EMMC;
-
-	return type;
-}
diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
deleted file mode 100644
index 6840eb0a1b..0000000000
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <bootm.h>
-#include <linux/list.h>
-#include <libfdt.h>
-#include <malloc.h>
-#include <asm/arch/bootrkp.h>
-#include <asm/arch/resource_img.h>
-#include "rockchip_parameter.h"
-#include "rockchip_blk.h"
-
-#define TAG_KERNEL			0x4C4E524B
-
-#define PART_MISC			"misc"
-#define PART_KERNEL			"kernel"
-#define PART_BOOT			"boot"
-#define PART_RECOVERY			"recovery"
-
-#define DTB_FILE			"rk-kernel.dtb"
-
-#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
-#define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
-
-struct bootloader_message {
-	char command[32];
-	char status[32];
-	char recovery[768];
-
-	/*
-         * The 'recovery' field used to be 1024 bytes.  It has only ever
-	 * been used to store the recovery command line, so 768 bytes
-	 * should be plenty.  We carve off the last 256 bytes to store the
-	 * stage string (for multistage packages) and possible future
-	 * expansion.
-         */
-	char stage[32];
-	char slot_suffix[32];
-	char reserved[192];
-};
-
-struct rockchip_image {
-	uint32_t tag;
-	uint32_t size;
-	int8_t image[1];
-	uint32_t crc;
-};
-
-#if !defined(CONFIG_ARM64)
-#ifdef CONFIG_LMB
-static void boot_start_lmb(bootm_headers_t *images)
-{
-	ulong		mem_start;
-	phys_size_t	mem_size;
-
-	lmb_init(&images->lmb);
-
-	mem_start = env_get_bootm_low();
-	mem_size = env_get_bootm_size();
-
-	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
-
-	arch_lmb_reserve(&images->lmb);
-	board_lmb_reserve(&images->lmb);
-}
-#else
-static inline void boot_start_lmb(bootm_headers_t *images) { }
-#endif
-
-static void boot_lmb_init(bootm_headers_t *images)
-{
-	boot_start_lmb(images);
-	images->state = BOOTM_STATE_OS_GO;
-}
-#endif
-
-static int read_boot_mode_from_misc(struct blk_part *misc)
-{
-	struct bootloader_message *bmsg;
-	int size = DIV_ROUND_UP(sizeof(struct bootloader_message),
-				RK_BLK_SIZE) * RK_BLK_SIZE;
-	int ret = 0;
-
-	bmsg = memalign(ARCH_DMA_MINALIGN, size);
-	ret = blkdev_read(bmsg, misc->from + BOOTLOADER_MESSAGE_BLK_OFFSET,
-			  size >> 9);
-	if (ret < 0)
-		goto out;
-
-	if (!strcmp(bmsg->command, "boot-recovery")) {
-		printf("boot mode: recovery\n");
-		ret = ANDROID_BOOT_MODE_RECOVERY;
-	} else {
-		printf("boot mode: normal\n");
-		ret = ANDROID_BOOT_MODE_NORMAL;
-	}
-
-out:
-	free(bmsg);
-	return ret;
-}
-
-/*
- * non-OTA packaged kernel.img & boot.img
- * return the image size on success, and a
- * negative value on error.
- */
-static int read_rockchip_image(struct blk_part *part, void *dst)
-{
-	struct rockchip_image *img;
-	int header_len = 8;
-	int cnt;
-	int ret;
-
-	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
-	if (!img) {
-		printf("out of memory\n");
-		return -ENOMEM;
-	}
-
-	/* read first block with header imformation */
-	ret = blkdev_read(img, part->from, 1);
-	if (ret < 0)
-		goto err;
-	if (img->tag != TAG_KERNEL) {
-		printf("%s: invalid image tag(0x%x)\n", part->name, img->tag);
-		ret = -ENODEV;
-		goto err;
-	}
-
-	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
-	/*
-	 * read the rest blks
-	 * total size  = image size + 8 bytes header + 4 bytes crc32
-	 */
-	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
-	ret = blkdev_read(dst + RK_BLK_SIZE - header_len,
-			  part->from + 1, cnt - 1);
-	if (!ret)
-		ret = img->size;
-err:
-	free(img);
-	return ret;
-}
-
-int rockchip_get_boot_mode(void)
-{
-	struct blk_part *misc;
-	int boot_mode;
-
-	misc = rockchip_get_blk_part(PART_MISC);
-	if (misc)
-		boot_mode = read_boot_mode_from_misc(misc);
-	else
-		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
-
-	return boot_mode;
-}
-
-static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
-{
-	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
-	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
-	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
-	struct blk_part *boot;
-	struct blk_part *kernel;
-	ulong ramdisk_size;
-	ulong kernel_size;
-	ulong fdt_size;
-	int boot_mode;
-	int ret = 0;
-
-	boot_mode = rockchip_get_boot_mode();
-
-	if (boot_mode == ANDROID_BOOT_MODE_RECOVERY)
-		boot = rockchip_get_blk_part(PART_RECOVERY);
-	else
-		boot = rockchip_get_blk_part(PART_BOOT);
-	kernel = rockchip_get_blk_part(PART_KERNEL);
-
-	if (!kernel || !boot) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	kernel_size = read_rockchip_image(kernel, (void *)kernel_addr_r);
-	if (kernel_size < 0) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	ramdisk_size = read_rockchip_image(boot, (void *)ramdisk_addr_r);
-	if (ramdisk_size < 0) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
-	if (fdt_size < 0) {
-		ret = CMD_RET_FAILURE;
-		goto out;
-	}
-
-	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
-	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
-#if defined(CONFIG_ARM64)
-	char cmdbuf[64];
-	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
-		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
-	run_command(cmdbuf, 0);
-#else
-	boot_lmb_init(&images);
-	images.ep = kernel_addr_r;
-	images.initrd_start = ramdisk_addr_r;
-	images.initrd_end = ramdisk_addr_r + ramdisk_size;
-	images.ft_addr = (void *)fdt_addr_r;
-	images.ft_len = fdt_totalsize(fdt_addr_r);
-	do_bootm_linux(0, 0, NULL, &images);
-#endif
-out:
-	return ret;
-}
-
-U_BOOT_CMD(
-	bootrkp,  CONFIG_SYS_MAXARGS,     1,      do_bootrkp,
-	"boot Linux Image image from rockchip partition storage",
-	""
-);
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
deleted file mode 100644
index f6040d0b7b..0000000000
--- a/arch/arm/mach-rockchip/rockchip_blk.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef __RK_BLK_H_
-#define __RK_BLK_H_
-
-/*
- * boot device type define
- * 1:flash 2:emmc 4:sdcard0 8:sdcard1
- */
-#define BOOT_FROM_FLASH		(1 << 0)
-#define BOOT_FROM_EMMC		(1 << 1)
-#define BOOT_FROM_SD0		(1 << 2)
-#define BOOT_FROM_SD1		(1 << 3)
-#define BOOT_FROM_SPI_NOR	(1 << 4)
-#define BOOT_FROM_RAM		(1 << 5)
-#define BOOT_FROM_SPI_NAND	(1 << 6)
-
-int blkdev_read(void *buffer, u32 blk, u32 cnt);
-int blkdev_write(void *buffer, u32 blk, u32 cnt);
-int get_bootdev_type(void);
-
-#endif
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
deleted file mode 100644
index afb6f8a8fa..0000000000
--- a/arch/arm/mach-rockchip/rockchip_parameter.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <malloc.h>
-#include "rockchip_parameter.h"
-#include "rockchip_blk.h"
-
-#define MAX_PARAM_SIZE			(1024 * 64)
-
-struct rockchip_param {
-	u32 tag;
-	u32 length;
-	char params[1];
-	u32 crc;
-};
-
-static LIST_HEAD(parts_head);
-
-static int rockchip_param_parse(char *param)
-{
-	struct blk_part *part;
-	const char *cmdline = strstr(param, "CMDLINE:");
-	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
-	const char *blkdev_parts = strstr(cmdline, "mtdparts");
-	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
-	char *next = (char *)blkdev_def;
-	char *pend;
-	int len;
-	unsigned long size, from;
-
-	if (!cmdline) {
-		printf("invalid parameter\n");
-		return -EINVAL;
-	}
-
-	*cmdline_end = '\0';
-	debug("%s", cmdline);
-	/* skip "CMDLINE:" */
-	env_update("bootargs", cmdline + strlen("CMDLINE:"));
-
-	while (*next) {
-		if (*next == '-') {
-			size = (~0UL);
-			next++;
-		} else {
-			size = simple_strtoul(next, &next, 16);
-		}
-		next++;
-		from = simple_strtoul(next, &next, 16);
-		next++;
-		pend =  strchr(next, ')');
-		if (!pend)
-			break;
-		len = min_t(int, pend - next, PART_NAME_SIZE);
-		part = malloc(sizeof(*part));
-		if (!part) {
-			printf("out of memory\n");
-			break;
-		}
-		part->from = from;
-		part->size = size;
-		strncpy(part->name, next, len);
-		part->name[len] = '\0';
-		next = strchr(next, ',');
-		next++;
-		list_add_tail(&part->node, &parts_head);
-		debug("0x%lx@0x%lx(%s)\n", part->size, part->from, part->name);
-	}
-
-	return 0;
-}
-
-static int rockchip_init_param(void)
-{
-	struct rockchip_param *param;
-
-	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
-	if (!param) {
-		printf("out of memory\n");
-		return -ENOMEM;
-	}
-
-	blkdev_read(param, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9);
-
-	return rockchip_param_parse(param->params);
-
-}
-
-struct blk_part *rockchip_get_blk_part(const char *name)
-{
-	struct blk_part *part;
-	struct list_head *node;
-
-	if (list_empty(&parts_head))
-		rockchip_init_param();
-
-	list_for_each(node, &parts_head) {
-		part = list_entry(node, struct blk_part, node);
-		if (!strcmp(part->name, name))
-			return part;
-	}
-
-	return NULL;
-}
-
-
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.h b/arch/arm/mach-rockchip/rockchip_parameter.h
deleted file mode 100644
index 46d32a2a8b..0000000000
--- a/arch/arm/mach-rockchip/rockchip_parameter.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef _ROCKCHIP_PARAMS_H_
-#define _ROCKCHIP_PARAMS_H_
-
-#include <linux/list.h>
-
-#define RK_PARAM_OFFSET			0x2000
-#define PART_NAME_SIZE			32
-#define RK_BLK_SIZE			(1 << 9)
-
-struct blk_part {
-	char name[PART_NAME_SIZE];
-	unsigned long from;
-	unsigned long size;
-	struct list_head node;
-};
-
-struct blk_part *rockchip_get_blk_part(const char *name);
-
-#endif

commit 891380b57d864bc35a1f86adcc090c47557b18c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 23 15:19:45 2017 +0800

    cmd: boot_android: support legacy aosp image from rockchip
    
    New cmd usage:
    boot_android mmc 0
    
    update boot_android:
    - do not need provide argv for misc partition and slot
    - If CONFIG_ROCKCHIP_RESOURCE_IMAGE is enabled, try to get dtb from resource
    partition.
    
    Change-Id: I7242880f9cde916ca10d677ddac07790c66a07a4
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 9c3294e21f..a9c195ae0b 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -22,9 +22,8 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	int ret = CMD_RET_SUCCESS;
 	char *addr_arg_endp, *addr_str;
 	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
 
-	if (argc < 4)
+	if (argc < 3)
 		return CMD_RET_USAGE;
 	if (argc > 5)
 		return CMD_RET_USAGE;
@@ -34,20 +33,20 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 		if (addr_arg_endp == argv[4] || *addr_arg_endp != '\0')
 			return CMD_RET_USAGE;
 	} else {
-		addr_str = env_get("loadaddr");
+		addr_str = env_get("kernel_addr_r");
 		if (addr_str)
 			load_address = simple_strtoul(addr_str, NULL, 16);
 		else
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
-	if (part_get_info_by_dev_and_name_or_num(argv[1], argv[2],
-						 &dev_desc, &part_info) < 0) {
+	dev_desc = blk_get_dev(argv[1], simple_strtoul(argv[2], NULL, 16));
+	if (!dev_desc) {
+		printf("Could not get %s %s\n", argv[1], argv[2]);
 		return CMD_RET_FAILURE;
 	}
 
-	ret = android_bootloader_boot_flow(dev_desc, &part_info, argv[3],
-					   load_address);
+	ret = android_bootloader_boot_flow(dev_desc, load_address);
 	if (ret < 0) {
 		printf("Android boot failed, error %d.\n", ret);
 		return CMD_RET_FAILURE;
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index efda47d18a..3f562258f8 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -12,17 +12,26 @@
 #include <common.h>
 #include <malloc.h>
 #include <fs.h>
+#include <boot_rkimg.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_MISC "misc"
 #define ANDROID_PARTITION_OEM  "oem"
+#define ANDROID_PARTITION_RECOVERY  "recovery"
 #define ANDROID_PARTITION_SYSTEM "system"
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
 #define ANDROID_ARG_SERIALNO "androidboot.serialno="
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
+#define ANDROID_ARG_FDT_FILENAME "rk-kernel.dtb"
+#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
+#define BOOTLOADER_MESSAGE_BLK_OFFSET	(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+#else
 #define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
+#endif
 
-static int android_bootloader_message_load(
+int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
 	const disk_partition_t *part_info,
 	struct android_bootloader_message *message)
@@ -34,7 +43,12 @@ static int android_bootloader_message_load(
 		return -1;
 	}
 
+#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+	if (blk_dread(dev_desc, part_info->start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+	     message_blocks, message) !=
+#else
 	if (blk_dread(dev_desc, part_info->start, message_blocks, message) !=
+#endif
 	    message_blocks) {
 		printf("Could not read from misc partition\n");
 		return -1;
@@ -140,7 +154,7 @@ static int android_part_get_info_by_name_suffix(struct blk_desc *dev_desc,
 	if (!part_name)
 		return -1;
 	strcpy(part_name, base_name);
-	if (slot_suffix)
+	if (slot_suffix && (slot_suffix[0] != '\0'))
 		strcat(part_name, slot_suffix);
 
 	part_num = part_get_info_by_name(dev_desc, part_name, part_info);
@@ -162,6 +176,7 @@ static int android_bootloader_boot_bootloader(void)
 	return -1;
 }
 
+#ifdef CONFIG_SUPPORT_OEM_DTB
 static int android_bootloader_get_fdt(const char *part_name,
 		const char *load_file_name)
 {
@@ -221,6 +236,7 @@ static int android_bootloader_get_fdt(const char *part_name,
 
 	return 0;
 }
+#endif
 
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
@@ -229,12 +245,6 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
-	if (!android_bootloader_get_fdt(ANDROID_PARTITION_OEM,
-					ANDROID_ARG_FDT_FILENAME)) {
-		fdt_addr = env_get("fdt_addr_r");
-		bootm_args[3] = fdt_addr;
-	}
-
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
 	printf("Booting kernel at %s with fdt at %s...\n\n\n",
@@ -344,23 +354,28 @@ char *android_assemble_cmdline(const char *slot_suffix,
 }
 
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
-				 const disk_partition_t *misc_part_info,
-				 const char *slot,
-				 unsigned long kernel_address)
+				 unsigned long load_address)
 {
 	enum android_boot_mode mode;
 	disk_partition_t boot_part_info;
-	disk_partition_t system_part_info;
-	int boot_part_num, system_part_num;
+	disk_partition_t misc_part_info;
+	int part_num;
 	int ret;
 	char *command_line;
 	char slot_suffix[3];
 	const char *mode_cmdline = NULL;
+	char *boot_partname = ANDROID_PARTITION_BOOT;
+	ulong fdt_addr;
 
-	/* Determine the boot mode and clear its value for the next boot if
-	 * needed.
+	/*
+	 * 1. Load MISC partition and determine the boot mode
+	 *   clear its value for the next boot if needed.
 	 */
-	mode = android_bootloader_load_and_clear_mode(dev_desc, misc_part_info);
+	part_num = part_get_info_by_name(dev_desc, ANDROID_PARTITION_MISC,
+					 &misc_part_info);
+	if (part_num < 0)
+		printf("%s Could not find misc partition\n", __func__);
+	mode = android_bootloader_load_and_clear_mode(dev_desc, &misc_part_info);
 	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
 
 	switch (mode) {
@@ -375,6 +390,9 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		/* In recovery mode we still boot the kernel from "boot" but
 		 * don't skip the initramfs so it boots to recovery.
 		 */
+#ifndef CONFIG_AVB_LIBAVB_USER
+		boot_partname = ANDROID_PARTITION_RECOVERY;
+#endif
 		break;
 	case ANDROID_BOOT_MODE_BOOTLOADER:
 		/* Bootloader mode enters fastboot. If this operation fails we
@@ -385,40 +403,38 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	}
 
 	slot_suffix[0] = '\0';
-	if (slot && slot[0]) {
-		slot_suffix[0] = '_';
-		slot_suffix[1] = slot[0];
-		slot_suffix[2] = '\0';
-	}
+#ifdef CONFIG_AVB_LIBAVB_USER
+	/*TODO: get from pre-loader or misc partition*/
+	slot_suffix[0] = '_';
+	slot_suffix[1] = 'a';
+	slot_suffix[2] = '\0';
+#endif
 
-	/* Load the kernel from the desired "boot" partition. */
-	boot_part_num =
+	/*
+	 * 2. Load the boot/recovery from the desired "boot" partition.
+	 * Determine if this is an AOSP image.
+	 */
+	part_num =
 	    android_part_get_info_by_name_suffix(dev_desc,
-						 ANDROID_PARTITION_BOOT,
+						 boot_partname,
 						 slot_suffix, &boot_part_info);
-	if (boot_part_num < 0)
+	if (part_num < 0) {
+		printf("%s Could not found bootable partition %s\n", __func__,
+		       boot_partname);
 		return -1;
+	}
 	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
-	      boot_part_info.name, boot_part_num);
+	      boot_part_info.name, part_num);
 
-	system_part_num =
-	    android_part_get_info_by_name_suffix(dev_desc,
-						 ANDROID_PARTITION_SYSTEM,
-						 slot_suffix,
-						 &system_part_info);
-	if (system_part_num < 0)
-		return -1;
-	debug("ANDROID: Using system image from \"%s\", partition %d.\n",
-	      system_part_info.name, system_part_num);
-
-	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+	ret = android_image_load(dev_desc, &boot_part_info, load_address,
 				 -1UL);
-	if (ret < 0)
+	if (ret < 0) {
+		printf("%s %s part load fail\n", __func__, boot_part_info.name);
 		return ret;
+	}
 
 	/* Set Android root variables. */
 	env_set_ulong("android_root_devnum", dev_desc->devnum);
-	env_set_ulong("android_root_partnum", system_part_num);
 	env_set("android_slotsufix", slot_suffix);
 
 	/* Assemble the command line */
@@ -427,7 +443,17 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 
 	debug("ANDROID: bootargs: \"%s\"\n", command_line);
 
-	android_bootloader_boot_kernel(kernel_address);
+#ifdef CONFIG_SUPPORT_OEM_DTB
+	if (android_bootloader_get_fdt(ANDROID_PARTITION_OEM,
+				       ANDROID_ARG_FDT_FILENAME)) {
+		printf("Can not get the fdt data from oem!\n");
+	}
+#else
+	ret = android_image_get_fdt((void *)load_address, &fdt_addr);
+	if (!ret)
+		env_set_ulong("fdt_addr", fdt_addr);
+#endif
+	android_bootloader_boot_kernel(load_address);
 
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
 	return -1;
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 97e36ed49a..cd6a4995ef 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -34,16 +34,12 @@ enum android_boot_mode {
  * Message. On success it doesn't return.
  *
  * @dev_desc:		device where to load the kernel and system to boot from.
- * @misc_part_info:	the "misc" partition descriptor in 'dev_desc'.
- * @slot:		the boot slot to boot from.
- * @kernel_address:	address where to load the kernel if needed.
+ * @load_address:	address where to load the boot img if needed.
  *
  * @return a negative number in case of error, otherwise it doesn't return.
  */
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
-				 const disk_partition_t *misc_part_info,
-				 const char *slot,
-				 unsigned long kernel_address);
+				 unsigned long load_address);
 
 /** android_avb_boot_flow - Execute the Android Bootloader Flow.
  * This fuction use to select and boot kernel through ab_suffix.

commit 5bd6dc275b949cd766db6845bda625e4a09b98d3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Dec 8 10:19:47 2017 +0800

    rockchip: vendor: update to block api instead of rkblk
    
    Use block API for vendor storage access.
    
    Change-Id: I1e00812688cb1d9264fa4a3e1c1551f179d0a931
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index fce8fc6a31..7f59383b41 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -325,11 +325,11 @@ config ROCKCHIP_PARTITION_BOOT
 	  This enables support for bootimg system from rockchip format partition
 
 config ROCKCHIP_VENDOR_PARTITION
-        bool "Rockchip vendor partition support"
-        depends on ROCKCHIP_BLOCK_API
-        help
-          This enable support to read/write vendor configuration data from/to
-	  this partition
+	bool "Rockchip vendor storage partition support"
+	depends on RKIMG_BOOTLOADER
+	help
+	  This enable support to read/write vendor configuration data from/to
+	  this partition.
 
 config ROCKCHIP_SMCCC
 	bool "Rockchip SMCCC"
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
index b1c08e2d43..627e123339 100644
--- a/arch/arm/mach-rockchip/vendor.c
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -7,8 +7,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <asm/arch/vendor.h>
-
-#include "rockchip_blk.h"
+#include <boot_rkimg.h>
 
 /* tag for vendor check */
 #define VENDOR_TAG		0x524B5644
@@ -107,12 +106,14 @@ static int bootdev_type;
 /**********************************************************/
 static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 {
+	struct blk_desc *dev_desc;
 	unsigned int lba = 0;
 	int ret = 0;
 
+	dev_desc = rockchip_get_bootdev();
 	/* Get the offset address according to the device type */
-	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	switch (dev_desc->if_type) {
+	case IF_TYPE_MMC:
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
@@ -125,9 +126,9 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 		lba = EMMC_VENDOR_PART_OFFSET;
 		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		/*
 		 * The location of VendorStorage in Flash is shown in the
 		 * following figure. The starting address of the VendorStorage
@@ -147,9 +148,9 @@ static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
 	}
 	if (!ret) {
 		if (write)
-			ret = blkdev_write(buffer, lba + addr, n_sec);
+			ret = blk_dwrite(dev_desc, lba + addr, n_sec, buffer);
 		else
-			ret = blkdev_read(buffer, lba + addr, n_sec);
+			ret = blk_dread(dev_desc, lba + addr, n_sec, buffer);
 	}
 	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
 
@@ -180,25 +181,26 @@ int vendor_storage_init(void)
 	u32 max_index = 0;
 	u16 data_offset, hash_offset;
 	u16 version2_offset, part_size;
+	struct blk_desc *dev_desc;
 
-	bootdev_type = get_bootdev_type();
-	if (!bootdev_type) {
+	dev_desc = rockchip_get_bootdev();
+	if (!dev_desc) {
 		printf("[Vednor ERROR]:Invalid boot device type(%d)\n",
 		       bootdev_type);
 		return -ENODEV;
 	}
 
-	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	switch (dev_desc->if_type) {
+	case IF_TYPE_MMC:
 		size = EMMC_VENDOR_INFO_SIZE;
 		part_size = EMMC_VENDOR_PART_BLKS;
 		data_offset = EMMC_VENDOR_DATA_OFFSET;
 		hash_offset = EMMC_VENDOR_HASH_OFFSET;
 		version2_offset = EMMC_VENDOR_VERSION2_OFFSET;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
 		data_offset = FLASH_VENDOR_DATA_OFFSET;
@@ -313,13 +315,13 @@ int vendor_storage_write(u16 id, void *pbuf, u16 size)
 	}
 
 	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	case IF_TYPE_MMC:
 		part_size = EMMC_VENDOR_PART_BLKS;
 		max_item_num = EMMC_VENDOR_ITEM_NUM;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		part_size = FLASH_VENDOR_PART_BLKS;
 		max_item_num = FLASH_VENDOR_ITEM_NUM;
 		break;
@@ -393,13 +395,13 @@ void vendor_test_reset(void)
 	u32 size;
 
 	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	case IF_TYPE_MMC:
 		size = EMMC_VENDOR_INFO_SIZE;
 		part_size = EMMC_VENDOR_PART_BLKS;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		size = FLASH_VENDOR_INFO_SIZE;
 		part_size = FLASH_VENDOR_PART_BLKS;
 		break;
@@ -443,14 +445,14 @@ int vendor_storage_test(void)
 	 * allocable memory for each item.
 	 */
 	switch (bootdev_type) {
-	case BOOT_FROM_EMMC:
+	case IF_TYPE_MMC:
 		item_num = EMMC_VENDOR_ITEM_NUM;
 		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
 		size = total_size/item_num;
 		break;
-	case BOOT_FROM_FLASH:
-	case BOOT_FROM_SPI_NOR:
-	case BOOT_FROM_SPI_NAND:
+	case IF_TYPE_RKNAND:
+	case IF_TYPE_SPINOR:
+	case IF_TYPE_SPINAND:
 		item_num = FLASH_VENDOR_ITEM_NUM;
 		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
 		size = total_size/item_num;
diff --git a/include/blk.h b/include/blk.h
index 25a6bcd1c6..9cf5466662 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -33,6 +33,8 @@ enum if_type {
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
 	IF_TYPE_RKNAND,
+	IF_TYPE_SPINAND,
+	IF_TYPE_SPINOR,
 
 	IF_TYPE_COUNT,			/* Number of interface types */
 };

commit a12bbc3452901a5566b36cd371f8d0375143dff9
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Nov 27 14:51:09 2017 +0800

    rockchip: resource: support gpt via block api
    
    - support both gpt and rkparameter
    - using blk_desc for read/write instead of rkblk api
    - add a rockchip_get_resource_file() API for those image alread in RAM;
    - try to get resource from AOSP boot.img/recovery.img first instead of
      RESOURCE partition.
    
    Change-Id: If7eb53723821b48e26a392bb18a3114faf35748a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
index af4596250a..0e4ea83fe9 100644
--- a/arch/arm/include/asm/arch-rockchip/resource_img.h
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -16,4 +16,6 @@
  */
 int rockchip_read_resource_file(void *buf, const char *name,
 				int offset, int len);
+int rockchip_get_resource_file(void *buf, const char *name);
+
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 186c9e2a49..fce8fc6a31 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -313,7 +313,7 @@ config ROCKCHIP_PARAM
 
 config ROCKCHIP_RESOURCE_IMAGE
 	bool "Enable support for rockchip resource image"
-	depends on ROCKCHIP_PARAM
+	depends on RKIMG_BOOTLOADER
 	help
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
index 9a5d46fff9..b755b79742 100644
--- a/arch/arm/mach-rockchip/resource_img.c
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -7,8 +7,11 @@
 #include <malloc.h>
 #include <linux/list.h>
 #include <asm/arch/resource_img.h>
-#include "rockchip_parameter.h"
-#include "rockchip_blk.h"
+#include <boot_rkimg.h>
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+#include <android_bootloader.h>
+#include <android_image.h>
+#endif
 
 #define PART_RESOURCE			"resource"
 #define RESOURCE_MAGIC			"RSCE"
@@ -90,10 +93,9 @@ struct resource_file {
 	uint32_t	f_offset;
 	uint32_t	f_size;
 	struct list_head link;
+	uint32_t 	rsce_base;	/* Base addr of resource */
 };
 
-static struct blk_part *rsce_blk;
-
 static LIST_HEAD(entrys_head);
 
 static int resource_image_check_header(const struct resource_img_hdr *hdr)
@@ -117,7 +119,7 @@ static int resource_image_check_header(const struct resource_img_hdr *hdr)
 	return ret;
 }
 
-static int add_file_to_list(struct resource_entry *entry)
+static int add_file_to_list(struct resource_entry *entry, int rsce_base)
 {
 	struct resource_file *file;
 
@@ -131,6 +133,7 @@ static int add_file_to_list(struct resource_entry *entry)
 		return -ENOMEM;
 	}
 	strcpy(file->name, entry->name);
+	file->rsce_base = rsce_base;
 	file->f_offset = entry->f_offset;
 	file->f_size = entry->f_size;
 	list_add_tail(&file->link, &entrys_head);
@@ -140,28 +143,72 @@ static int add_file_to_list(struct resource_entry *entry)
 	return 0;
 }
 
-static int read_file_info_from_blk_dev(void)
+static int init_resource_list(struct resource_img_hdr *hdr)
 {
-	struct resource_img_hdr *hdr;
 	struct resource_entry *entry;
 	void *content;
 	int size;
 	int ret;
 	int e_num;
+	int offset = 0;
+	int mode = 0;
+	struct blk_desc *dev_desc;
+	struct andr_img_hdr *andr_hdr;
+	disk_partition_t part_info;
+	char *boot_partname = PART_BOOT;
 
-	rsce_blk = rockchip_get_blk_part(PART_RESOURCE);
-	if (!rsce_blk) {
-		printf("no resource partition found\n");
-		return  -ENODEV;
+	if (hdr) {
+		content = (void *)(hdr + hdr->c_offset);
+		goto init_list;
 	}
 
+	dev_desc = rockchip_get_bootdev();
 	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
 	if (!hdr) {
-		printf("out of memory!\n");
+		printf("%s out of memory!\n", __func__);
 		return -ENOMEM;
 	}
 
-	ret = blkdev_read(hdr, rsce_blk->from, 1);
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+	/* Get boot mode from misc */
+	mode = rockchip_get_boot_mode();
+	if (mode == BOOT_MODE_RECOVERY)
+		boot_partname = PART_RECOVERY;
+	/* Read boot/recovery and chenc if this is an AOSP img */
+	ret = part_get_info_by_name(dev_desc, boot_partname,
+					 &part_info);
+	if (ret < 0)
+		printf("fail to get %s part\n", boot_partname);
+	andr_hdr = (void *)hdr;
+	ret = blk_dread(dev_desc, part_info.start, 1, andr_hdr);
+	if (ret != 1)
+		printf("%s read fail\n", __func__);
+	ret = android_image_check_header(andr_hdr);
+	if (!ret) {
+		debug("%s Load resource from %s senond pos\n",
+		      __func__, part_info.name);
+		/* Read resource from second offset */
+		offset = part_info.start;
+		offset += andr_hdr->page_size;
+		offset += ALIGN(andr_hdr->kernel_size, andr_hdr->page_size);
+		offset += ALIGN(andr_hdr->ramdisk_size, andr_hdr->page_size);
+	} else {
+		/* Set mode to 0 in for recovery is not valid AOSP img */
+		mode = 0;
+	}
+#endif
+	if (!mode) {
+		/* Read resource from Rockchip Resource partition */
+		ret = part_get_info_by_name(dev_desc, PART_RESOURCE,
+					 &part_info);
+		if (ret < 0)
+			printf("fail to get %s part\n", PART_RESOURCE);
+		offset = part_info.start;
+		debug("%s Load resource from %s\n", __func__, part_info.name);
+	}
+
+	hdr = (void *)andr_hdr;
+	ret = blk_dread(dev_desc, offset, 1, hdr);
 	if (ret < 0)
 		goto out;
 	ret = resource_image_check_header(hdr);
@@ -173,15 +220,16 @@ static int read_file_info_from_blk_dev(void)
 		printf("alloc memory for content failed\n");
 		goto out;
 	}
-	ret = blkdev_read(content, rsce_blk->from + hdr->c_offset,
-			  hdr->e_blks * hdr->e_nums);
+	ret = blk_dread(dev_desc, offset + hdr->c_offset,
+			hdr->e_blks * hdr->e_nums, content);
 	if (ret < 0)
 		goto err;
 
+init_list:
 	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
 		size = e_num * hdr->e_blks * RK_BLK_SIZE;
 		entry = (struct resource_entry *)(content + size);
-		add_file_to_list(entry);
+		add_file_to_list(entry, offset);
 	}
 
 err:
@@ -193,14 +241,13 @@ out:
 }
 
 static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
-					   const void *content,
 					   const char *name)
 {
 	struct resource_file *file;
 	struct list_head *node;
 
 	if (list_empty(&entrys_head))
-		read_file_info_from_blk_dev();
+		init_resource_list(hdr);
 
 	list_for_each(node, &entrys_head) {
 		file = list_entry(node, struct resource_file, link);
@@ -211,6 +258,15 @@ static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
 	return NULL;
 }
 
+int rockchip_get_resource_file(void *buf, const char *name)
+{
+	struct resource_file *file;
+
+	file = get_file_info(buf, name);
+
+	return file->f_offset;
+}
+
 /*
  * read file from resource partition
  * @buf: destination buf to store file data;
@@ -224,8 +280,9 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	struct resource_file *file;
 	int ret = 0;
 	int blks;
+	struct blk_desc *dev_desc;
 
-	file = get_file_info(NULL, NULL, name);
+	file = get_file_info(NULL, name);
 	if (!file) {
 		printf("Can't find file:%s\n", name);
 		return -ENOENT;
@@ -234,7 +291,9 @@ int rockchip_read_resource_file(void *buf, const char *name,
 	if (len <= 0 || len > file->f_size)
 		len = file->f_size;
 	blks = DIV_ROUND_UP(len, RK_BLK_SIZE);
-	ret = blkdev_read(buf, rsce_blk->from + file->f_offset + offset, blks);
+	dev_desc = rockchip_get_bootdev();
+	ret = blk_dread(dev_desc, file->rsce_base + file->f_offset + offset,
+			blks, buf);
 	if (!ret)
 		ret = len;
 

commit d3ff9cf90a7dc8e8fcf30bb113e6e11612b9ac9c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 18:09:36 2017 +0800

    rockchip: charge_animation: update for rkimg api
    
    Change-Id: If3157382c05717d363c42f045abcc12489ffec64
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 7b0126b898..0662357b29 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,17 +4,17 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
-#include <asm/suspend.h>
-#include <asm/arch/rockchip_smccc.h>
-#include <asm/arch/bootrkp.h>
 #include <common.h>
+#include <boot_rkimg.h>
 #include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <pwm.h>
 #include <irq-generic.h>
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/suspend.h>
 #include <linux/input.h>
-#include <pwm.h>
 #include <power/charge_display.h>
 #include <power/fuel_gauge.h>
 #include <power/pmic.h>
@@ -245,9 +245,9 @@ static int charge_animation_show(struct udevice *dev)
 		return 0;
 	}
 
-#ifdef CONFIG_ROCKCHIP_PARTITION_BOOT
+#ifdef CONFIG_RKIMG_BOOTLOADER
 	boot_mode = rockchip_get_boot_mode();
-	if (boot_mode != ANDROID_BOOT_MODE_NORMAL) {
+	if (boot_mode != BOOT_MODE_NORMAL) {
 		debug("exit charge, due to boot mode: %d\n", boot_mode);
 		return 0;
 	}

commit 270f9eac7344026498482195a2c7f1b1c2a42a13
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 15:32:31 2017 +0800

    image-android: add a api to get fdt from boot img
    
    Get the dtb file from boot img second position or inside resource for
    Rockchip image.
    
    Change-Id: I843366b32f79ea8fb320d695d79420607a496d68
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/image-android.c b/common/image-android.c
index e6976d0e63..ac4ea46ab1 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -147,6 +147,28 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	return 0;
 }
 
+int android_image_get_fdt(const struct andr_img_hdr *hdr,
+			      ulong *rd_data)
+{
+	if (!hdr->second_size) {
+		*rd_data = 0;
+		return -1;
+	}
+
+	printf("FDT load addr 0x%08x size %u KiB\n",
+	       hdr->second_addr, DIV_ROUND_UP(hdr->second_size, 1024));
+
+	*rd_data = (unsigned long)hdr;
+	*rd_data += hdr->page_size;
+	*rd_data += ALIGN(hdr->kernel_size, hdr->page_size);
+	*rd_data += ALIGN(hdr->ramdisk_size, hdr->page_size);
+
+#ifdef CONFIG_ROCKCHIP_BOOTLOADER
+	rockchip_get_resource_file(rd_data, "rk-kernel.dtb");
+#endif
+	return 0;
+}
+
 long android_image_load(struct blk_desc *dev_desc,
 			const disk_partition_t *part_info,
 			unsigned long load_address,
diff --git a/include/image.h b/include/image.h
index 300a72a4b5..fe0febabaa 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1234,6 +1234,8 @@ int android_image_get_kernel(const struct andr_img_hdr *hdr, int verify,
 			     ulong *os_data, ulong *os_len);
 int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 			      ulong *rd_data, ulong *rd_len);
+int android_image_get_fdt(const struct andr_img_hdr *hdr,
+			      ulong *rd_data);
 ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);

commit a0e58cf2cc5f85a68cc478474f369913a3320283
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 15:02:05 2017 +0800

    cmd: bootrkp: add a cmd for rockchip rkimg bootloader
    
    'bootrkp' will find the boot device and find all necessary images.
    Basically, these partitions are must:
    Kernel.img: kernel Image
    Resource.img: kernel dtb and logo
    system.img: rootfs
    
    Change-Id: Iba3df2535705fa3ed529377f44f041fa2294ce60
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 502002de95..b8df092e79 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -773,6 +773,16 @@ config CMD_ANDROID_AB_SELECT
 	  is used by the new A/B update model where one slot is updated in the
 	  background while running from the other slot.
 
+config CMD_BOOT_ROCKCHIP
+	bool "boot_rockchip"
+	default n
+	depends on RKIMG_BOOTLOADER
+	help
+	  Performs the Rockchip Bootloader boot flow, loading the appropriate
+	  Rockchip image (normal kernel, boot, resource and revocery)
+	  and booting it. The boot mode is determined by the contents of the
+	  Rockchip bootloader helper.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index 29fb14aa25..f8396ce585 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
 obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
 obj-$(CONFIG_CMD_BMP) += bmp.o
 obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o
+obj-$(CONFIG_CMD_BOOT_ROCKCHIP) += bootrkp.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
 obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
diff --git a/cmd/bootrkp.c b/cmd/bootrkp.c
new file mode 100644
index 0000000000..6c5943f32c
--- /dev/null
+++ b/cmd/bootrkp.c
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <android_bootloader.h>
+#include <boot_rkimg.h>
+
+static int do_boot_rockchip(cmd_tbl_t *cmdtp, int flag, int argc,
+		      char * const argv[])
+{
+	disk_partition_t part_info;
+	struct blk_desc *dev_desc;
+	int mode = 0;
+	char *boot_partname = PART_BOOT;
+	int ret = 0;
+
+	dev_desc = rockchip_get_bootdev();
+	mode = rockchip_get_boot_mode();
+	if (mode == BOOT_MODE_RECOVERY)
+		boot_partname = PART_RECOVERY;
+	ret = part_get_info_by_name(dev_desc, boot_partname, &part_info);
+
+	if(boot_rockchip_image(dev_desc, &part_info))
+		ret = CMD_RET_FAILURE;
+
+	return ret;
+}
+
+U_BOOT_CMD(
+	boot_rockchip,  CONFIG_SYS_MAXARGS,     1,      do_boot_rockchip,
+	"boot Linux Image image from rockchip partition storage",
+	""
+);

commit 06621a79d4e261209a03bd5d8f82b78fcd3f8888
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Dec 7 14:58:47 2017 +0800

    rockchip: add rkimg bootloader support
    
    Rockchip use rkimg bootloader to boot Android during development cycle and for
    other OS, typical content kernel.img with zImage/Image, boot.img and
    recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
    with dtb and uboot/kernel logo bmp, vendor storage for custom info
    like SN and MAC address.
    
    Change-Id: I400195a5e622437f234f22d6675a5e96db9085c6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 02106f4a28..186c9e2a49 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -288,6 +288,16 @@ config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
 config SPL_MMC_SUPPORT
 	default y if !SPL_ROCKCHIP_BACK_TO_BROM
 
+config RKIMG_BOOTLOADER
+	bool "Support for Rockchip Image Bootloader boot flow"
+	default n
+	help
+	  Rockchip use this to boot Android during development cycle and for
+	  other OS, typical content kernel.img with zImage/Image, boot.img and
+	  recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
+	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
+	  like SN and MAC address.
+
 config ROCKCHIP_BLOCK_API
 	bool "Rockchip block device api support"
 	help
diff --git a/common/Makefile b/common/Makefile
index 232cd85213..1757f39dd8 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -110,7 +110,7 @@ obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
 obj-y += memsize.o
 obj-y += stdio.o
-
+obj-$(CONFIG_RKIMG_BOOTLOADER) += boot_rkimg.o
 # This option is not just y/n - it can have a numeric value
 ifdef CONFIG_FASTBOOT_FLASH
 obj-y += image-sparse.o
diff --git a/common/boot_rkimg.c b/common/boot_rkimg.c
new file mode 100644
index 0000000000..d03e4315e1
--- /dev/null
+++ b/common/boot_rkimg.c
@@ -0,0 +1,257 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <bootm.h>
+#include <linux/list.h>
+#include <libfdt.h>
+#include <malloc.h>
+#include <asm/arch/resource_img.h>
+#include <boot_rkimg.h>
+
+#define TAG_KERNEL			0x4C4E524B
+
+#define DTB_FILE			"rk-kernel.dtb"
+
+#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
+#define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+
+struct bootloader_message {
+	char command[32];
+	char status[32];
+	char recovery[768];
+
+	/*
+         * The 'recovery' field used to be 1024 bytes.  It has only ever
+	 * been used to store the recovery command line, so 768 bytes
+	 * should be plenty.  We carve off the last 256 bytes to store the
+	 * stage string (for multistage packages) and possible future
+	 * expansion.
+         */
+	char stage[32];
+	char slot_suffix[32];
+	char reserved[192];
+};
+
+struct rockchip_image {
+	uint32_t tag;
+	uint32_t size;
+	int8_t image[1];
+	uint32_t crc;
+};
+
+#if !defined(CONFIG_ARM64)
+#ifdef CONFIG_LMB
+static void boot_start_lmb(bootm_headers_t *images)
+{
+	ulong		mem_start;
+	phys_size_t	mem_size;
+
+	lmb_init(&images->lmb);
+
+	mem_start = env_get_bootm_low();
+	mem_size = env_get_bootm_size();
+
+	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
+
+	arch_lmb_reserve(&images->lmb);
+	board_lmb_reserve(&images->lmb);
+}
+#else
+static inline void boot_start_lmb(bootm_headers_t *images) { }
+#endif
+
+static void boot_lmb_init(bootm_headers_t *images)
+{
+	boot_start_lmb(images);
+	images->state = BOOTM_STATE_OS_GO;
+}
+#endif
+
+/*
+ * non-OTA packaged kernel.img & boot.img
+ * return the image size on success, and a
+ * negative value on error.
+ */
+static int read_rockchip_image(struct blk_desc *dev_desc,
+			       disk_partition_t *part_info,
+			       void *dst)
+{
+	struct rockchip_image *img;
+	int header_len = 8;
+	int cnt;
+	int ret;
+
+	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!img) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	/* read first block with header imformation */
+	ret = blk_dread(dev_desc, part_info->start, 1, img);
+	if (ret < 0)
+		goto err;
+	if (img->tag != TAG_KERNEL) {
+		printf("%s: invalid image tag(0x%x)\n", part_info->name, img->tag);
+		ret = -EINVAL;
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
+	/*
+	 * read the rest blks
+	 * total size  = image size + 8 bytes header + 4 bytes crc32
+	 */
+	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	ret = blk_dread(dev_desc, part_info->start + 1, cnt - 1,
+			dst + RK_BLK_SIZE - header_len);
+	if (!ret)
+		ret = img->size;
+err:
+	free(img);
+	return ret;
+}
+
+/* Gets the storage type of the current device */
+int get_bootdev_type(void)
+{
+	int type = 0;
+
+	#ifdef CONFIG_EMMC_BOOT
+		type = IF_TYPE_MMC;
+	#endif /* CONFIG_EMMC_BOOT */
+	#ifdef CONFIG_QSPI_BOOT
+		type = IF_TYPE_SPI_NAND;
+	#endif /* CONFIG_QSPI_BOOT */
+	#ifdef CONFIG_NAND_BOOT
+		type = IF_TYPE_RKNAND;
+	#endif /* CONFIG_NAND_BOOT */
+	#ifdef CONFIG_NOR_BOOT
+		type = IF_TYPE_SPI_NOR;
+	#endif /* CONFIG_NOR_BOOT */
+
+	/* For current use(Only EMMC support!) */
+	if (!type)
+		type = IF_TYPE_MMC;
+
+	return type;
+}
+
+struct blk_desc *rockchip_get_bootdev(void)
+{
+	struct blk_desc *dev_desc;
+	int dev_type;
+
+	dev_type = get_bootdev_type();
+	dev_desc = blk_get_devnum_by_type(dev_type, 0);
+
+	return dev_desc;
+}
+
+static int boot_mode = -1;
+int rockchip_get_boot_mode(void)
+{
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	struct bootloader_message *bmsg;
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message), RK_BLK_SIZE);
+	int ret;
+
+	if (boot_mode != -1)
+		return boot_mode;
+
+	dev_desc = rockchip_get_bootdev();
+	ret = part_get_info_by_name(dev_desc, PART_MISC,
+			&part_info);
+	if (ret < 0)
+		printf("get part %s fail %d\n", PART_MISC, ret);
+
+	bmsg = memalign(ARCH_DMA_MINALIGN, size);
+	ret = blk_dread(dev_desc,
+			part_info.start + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			size, bmsg);
+	if (ret < 0)
+		goto err;
+
+	if (!strcmp(bmsg->command, "boot-recovery")) {
+		printf("boot mode: recovery\n");
+		ret = BOOT_MODE_RECOVERY;
+	} else {
+		printf("boot mode: normal\n");
+		ret = BOOT_MODE_NORMAL;
+	}
+	boot_mode = ret;
+err:
+	free(bmsg);
+
+	return ret;
+}
+
+int boot_rockchip_image(struct blk_desc *dev_desc, disk_partition_t *boot_part)
+{
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
+	disk_partition_t kernel_part;
+	ulong ramdisk_size;
+	ulong kernel_size;
+	ulong fdt_size;
+	int ret = 0;
+	int part_num;
+
+	printf("=Booting Rockchip format image=\n");
+	part_num = part_get_info_by_name(dev_desc, PART_KERNEL,
+					 &kernel_part);
+
+	if (part_num < 0 || !boot_part) {
+		printf("%s krenel or boot part info error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	kernel_size = read_rockchip_image(dev_desc, &kernel_part,
+					  (void *)kernel_addr_r);
+	if (kernel_size < 0) {
+		printf("%s krenel part read error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ramdisk_size = read_rockchip_image(dev_desc, boot_part,
+					   (void *)ramdisk_addr_r);
+	if (ramdisk_size < 0) {
+		printf("%s ramdisk part read error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
+	if (fdt_size < 0) {
+		printf("%s fdt read error\n", __func__);
+		ret = -EINVAL;
+		goto out;
+	}
+
+	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
+	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
+#if defined(CONFIG_ARM64)
+	char cmdbuf[64];
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
+		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
+	run_command(cmdbuf, 0);
+#else
+	boot_lmb_init(&images);
+	images.ep = kernel_addr_r;
+	images.initrd_start = ramdisk_addr_r;
+	images.initrd_end = ramdisk_addr_r + ramdisk_size;
+	images.ft_addr = (void *)fdt_addr_r;
+	images.ft_len = fdt_totalsize(fdt_addr_r);
+	do_bootm_linux(0, 0, NULL, &images);
+#endif
+out:
+	return ret;
+}
diff --git a/include/boot_rkimg.h b/include/boot_rkimg.h
new file mode 100644
index 0000000000..f59bf2e41b
--- /dev/null
+++ b/include/boot_rkimg.h
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __BOOT_ROCKCHIP_H_
+#define __BOOT_ROCKCHIP_H_
+
+/* This is a copy from Android boot loader */
+enum _boot_mode {
+	BOOT_MODE_NORMAL = 0,
+	BOOT_MODE_RECOVERY,
+	BOOT_MODE_BOOTLOADER,
+};
+
+
+#define PART_MISC			"misc"
+#define PART_KERNEL			"kernel"
+#define PART_BOOT			"boot"
+#define PART_RECOVERY			"recovery"
+
+#define RK_BLK_SIZE 512
+
+int rockchip_get_boot_mode(void);
+int boot_rockchip_image(struct blk_desc *dev, disk_partition_t *boot_part);
+struct blk_desc *rockchip_get_bootdev(void);
+
+#endif

commit 82198b5ccd31ca903c84f3d16e015ca704af852c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Dec 6 15:09:31 2017 +0800

    disk: part_rockchip: add new partition type for rockchip parameter
    
    Rockchip parameter parameter is a partition type like cmdline partition,
    widely used in rockchip legacy system.
    
    Change-Id: I107748733c4cfed22f3a2ef8716033211eafdf7c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/disk/Kconfig b/disk/Kconfig
index 9396562120..1489e6569f 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -117,4 +117,14 @@ config PARTITION_TYPE_GUID
 	  Activate the configuration of GUID type
 	  for EFI partition
 
+config RKPARM_PARTITION
+	bool "Enable Rockchip parameter partition table"
+	depends on PARTITIONS
+	help
+	  Say Y here if you would like to use device under U-Boot which
+	  were partitioned using Rockchip parameter.
+
+config SPL_ROCKCHIP_PARTITION
+	bool "Enable Rockchip partition table for SPL"
+
 endmenu
diff --git a/disk/Makefile b/disk/Makefile
index 12c0531689..97a23830f3 100644
--- a/disk/Makefile
+++ b/disk/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_$(SPL_)DOS_PARTITION)   += part_dos.o
 obj-$(CONFIG_$(SPL_)ISO_PARTITION)   += part_iso.o
 obj-$(CONFIG_$(SPL_)AMIGA_PARTITION) += part_amiga.o
 obj-$(CONFIG_$(SPL_)EFI_PARTITION)   += part_efi.o
+obj-$(CONFIG_$(SPL_)RKPARM_PARTITION)   += part_rkparm.o
diff --git a/disk/part_rkparm.c b/disk/part_rkparm.c
new file mode 100644
index 0000000000..a9af237a1e
--- /dev/null
+++ b/disk/part_rkparm.c
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2017 rkparm Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+
+#ifdef HAVE_BLOCK_DEVICE
+#define RK_PARAM_OFFSET			0x2000
+#define MAX_PARAM_SIZE			(1024 * 64)
+
+struct rkparm_param {
+	u32 tag;
+	u32 length;
+	char params[1];
+	u32 crc;
+};
+
+struct rkparm_part {
+	char name[PART_NAME_LEN];
+	unsigned long start;
+	unsigned long size;
+	struct list_head node;
+};
+
+
+static LIST_HEAD(parts_head);
+
+static int rkparm_param_parse(char *param, struct list_head *parts_head)
+{
+	struct rkparm_part *part;
+	const char *cmdline = strstr(param, "CMDLINE:");
+	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
+	const char *blkdev_parts = strstr(cmdline, "mtdparts");
+	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
+	char *next = (char *)blkdev_def;
+	char *pend;
+	int len;
+	unsigned long size, start;
+
+	if (!cmdline) {
+		printf("invalid parameter\n");
+		return -EINVAL;
+	}
+
+	*cmdline_end = '\0';
+	/* skip "CMDLINE:" */
+	env_update("bootargs", cmdline + strlen("CMDLINE:"));
+
+	while (*next) {
+		if (*next == '-') {
+			size = (~0UL);
+			next++;
+		} else {
+			size = simple_strtoul(next, &next, 16);
+		}
+		next++;
+		start = simple_strtoul(next, &next, 16);
+		next++;
+		pend =  strchr(next, ')');
+		if (!pend)
+			break;
+		len = min_t(int, pend - next, PART_NAME_LEN);
+		part = malloc(sizeof(*part));
+		if (!part) {
+			printf("out of memory\n");
+			break;
+		}
+		part->start = start;
+		part->size = size;
+		strncpy(part->name, next, len);
+		part->name[len] = '\0';
+		next = strchr(next, ',');
+		next++;
+		list_add_tail(&part->node, parts_head);
+	}
+
+	return 0;
+}
+
+static int rkparm_init_param(struct blk_desc *dev_desc,
+				struct list_head *parts_head)
+{
+	struct rkparm_param *param;
+	int ret;
+
+	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
+	if (!param) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	ret = blk_dread(dev_desc, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9,
+			(ulong *)param);
+	if (ret < 0) {
+		printf("%s param read fail\n", __func__);
+		return -EINVAL;
+	}
+
+	return rkparm_param_parse(param->params, parts_head);
+
+}
+
+static void part_print_rkparm(struct blk_desc *dev_desc)
+{
+	int ret = 0;
+	struct list_head *node;
+	struct rkparm_part *p = NULL;
+	int i = 0;
+
+	if (list_empty(&parts_head))
+		ret = rkparm_init_param(dev_desc, &parts_head);
+
+	if (ret) {
+		printf("%s Invalid rkparm parameter\n", __func__);
+		return;
+	}
+
+	printf("Part\tStart LBA\tSize\t\tName\n");
+	list_for_each(node, &parts_head) {
+		p = list_entry(node, struct rkparm_part, node);
+		printf("%3d\t0x%08lx\t0x%08lx\t%s\n", (i++ + 1),
+		       p->start, p->size, p->name);
+	}
+
+
+	return;
+}
+
+static int part_get_info_rkparm(struct blk_desc *dev_desc, int idx,
+		      disk_partition_t *info)
+{
+	struct list_head *node;
+	struct rkparm_part *p = NULL;
+	int part_num = 1;
+	int ret = 0;
+
+	if (idx < 1) {
+		printf("%s Invalid partition no.%d\n", __func__, idx);
+		return -EINVAL;
+	}
+
+	if (list_empty(&parts_head))
+		ret = rkparm_init_param(dev_desc, &parts_head);
+
+	if (ret) {
+		printf("%s Invalid rkparm partition\n", __func__);
+		return -1;
+	}
+
+	list_for_each(node, &parts_head) {
+		p = list_entry(node, struct rkparm_part, node);
+		if (idx == part_num)
+			break;
+		part_num ++;
+	}
+
+	if (part_num > idx) {
+		printf("%s Invalid partition no.%d\n", __func__, idx);
+		return -EINVAL;
+	}
+
+	info->start = p->start;
+	info->size = p->size << 9;
+	info->blksz = dev_desc->blksz;
+
+	sprintf((char *)info->name, "%s", p->name);
+	strcpy((char *)info->type, "U-Boot");
+	info->bootable = 0;
+
+	return 0;
+}
+
+static int part_test_rkparm(struct blk_desc *dev_desc)
+{
+	int ret = 0;
+
+	if (list_empty(&parts_head))
+		ret = rkparm_init_param(dev_desc, &parts_head);
+	if (ret)
+		ret = -1;
+
+	return ret;
+}
+/*
+ * Add an 'b_' prefix so it comes before 'dos' and after 'a_efi' in the linker
+ * list. We need to check EFI first, and then rkparm partition
+ */
+U_BOOT_PART_TYPE(b_rkparm) = {
+	.name		= "RKPARM",
+	.part_type	= PART_TYPE_RKPARM,
+	.max_entries	= GPT_ENTRY_NUMBERS,
+	.get_info	= part_get_info_ptr(part_get_info_rkparm),
+	.print		= part_print_ptr(part_print_rkparm),
+	.test		= part_test_rkparm,
+};
+#endif
diff --git a/include/part.h b/include/part.h
index 0d5c99836b..5739a2d37b 100644
--- a/include/part.h
+++ b/include/part.h
@@ -29,6 +29,7 @@ struct block_drvr {
 #define PART_TYPE_ISO		0x03
 #define PART_TYPE_AMIGA		0x04
 #define PART_TYPE_EFI		0x05
+#define PART_TYPE_RKPARM	0x06
 
 /* maximum number of partition entries supported by search */
 #define DOS_ENTRY_NUMBERS	8

commit f1e236acd5781d3907d4a8bf9248487bd819de90
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 27 19:59:45 2017 +0800

    UPSTREAM: rockchip: board: evb_rv1108: update README
    
    After commit d962e5dadc2c("rockchip: mkimage: use spl_boot0 for all Rockchip SoCs"),
    the mkimage will not pad the Tag memroy, so we shoud
    pass a Taged ddr.bin/spl.bin to it.
    
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit dca4740930c77c465b9645e0a6928c3710b21cdd)
    
    Change-Id: I83e99669e90fda662d176f8f687785609e364312
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/board/rockchip/evb_rv1108/README b/board/rockchip/evb_rv1108/README
index 58895960e9..79a97c3138 100644
--- a/board/rockchip/evb_rv1108/README
+++ b/board/rockchip/evb_rv1108/README
@@ -3,12 +3,11 @@ Here is the step-by-step to boot U-Boot on rv1108 evb.
 Get ddr init binary
 ==============================================================================
   > git clone  https://github.com/rockchip-linux/rkbin.git
-  > dd if=./rkbin/rv1x/rv1108ddr.bin of=ddr.bin bs=4 skip=1
 
 Compile  U-Boot
 ===========================
   > make CROSS_COMPILE=arm-linux-gnueabi- evb-rv1108_defconfig  all
-  > ./tools/mkimage  -n rv1108 -T rksd -d ddr.bin spl.bin
+  > ./tools/mkimage  -n rv1108 -T rksd -d ../rkbin/rv1x/rv1108ddr_v1.00.bin spl.bin
   > cat spl.bin u-boot.bin > u-boot.img
 
 Flash the image by rkdeveloptool
@@ -16,7 +15,7 @@ Flash the image by rkdeveloptool
 rkdeveloptool can get from https://github.com/rockchip-linux/rkdeveloptool.git
 
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
-  > rkdeveloptool db ./rkbin/rv1x/RV1108_usb_boot.bin
+  > rkdeveloptool db ./rkbin/rv1x/rv1108usbboot_v1.00.bin
   > rkdeveloptool wl 0x40 u-boot.img
   > rkdeveloptool RD
 

commit df3e17bde5d906390f6d5e02dbf8b10007e161bb
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Thu Dec 7 10:25:54 2017 +0800

    lib: optee_client: Fix compile error.
    
    this bug make compile error when we compile all code in android.
    
    Change-Id: Id9b8673576bee13c4df0990bd068548fa11458bf
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index de8a3b4058..7d402989e7 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -13,4 +13,4 @@ obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
 
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
 lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
-	$(q)lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
+	$(srctree)/lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@

commit 2d1049f50b25c0229adf6e1c312fc9def42eb3d0
Author: Xing Zheng <zhengxing@rock-chips.com>
Date:   Wed Dec 6 17:34:00 2017 +0800

    board: rockchip: add rk3288-evb-rk1608 board support
    
    The rk3288-evb-rk1608 is a development/evaluation for RK3288
    and RK1608. The RK3288 as Host AP, and the RK1608 as a
    Dual-cores DSP coprocessor, it provides high-performance
    professional computing capabilities to Host AP.
    
    They communicate with each other through MIPI and SPI. There
    is a good host environment on host RK3288, we can easily debug
    RK1608.
    
    Also, the rk3288-evb-rk1608 is different with rk3288-evb, so
    we need to add a independent BSP configuration for rk3288-evb-rk1608.
    
    Change-Id: I75ec0e14ee88acd9de7f809d7e88bca97a77a5c2
    Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/arch/arm/dts/rk3288-evb-rk1608.dts b/arch/arm/dts/rk3288-evb-rk1608.dts
new file mode 100644
index 0000000000..5e8635c05b
--- /dev/null
+++ b/arch/arm/dts/rk3288-evb-rk1608.dts
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+/dts-v1/;
+#include "rk3288-evb-rk1608.dtsi"
+
+/ {
+	model = "Evb-RK3288-RK1608";
+	compatible = "rockchip,rk3288-evb-rk1608", "rockchip,rk3288";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
+
+&dmc {
+	rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+		0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+		0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+		0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+		0x5 0x0>;
+	rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+		0xa60 0x40 0x10 0x0>;
+	/* Add a dummy value to cause of-platdata think this is bytes */
+	rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+};
+
+&pinctrl {
+	u-boot,dm-pre-reloc;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	reg-shift = <2>;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio8 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3288-evb-rk1608.dtsi b/arch/arm/dts/rk3288-evb-rk1608.dtsi
new file mode 100644
index 0000000000..4f51961579
--- /dev/null
+++ b/arch/arm/dts/rk3288-evb-rk1608.dtsi
@@ -0,0 +1,455 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+#include "rk3288.dtsi"
+
+/ {
+	memory {
+		reg = <0 0x80000000>;
+	};
+
+	ext_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <125000000>;
+		clock-output-names = "ext_gmac";
+	};
+
+	vcc_sys: vsys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc_flash: flash-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_flash";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_5v: usb-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc_host_5v: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc_host_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vcc_5v>;
+	};
+
+	vcc_otg_5v: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc_otg_5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		vin-supply = <&vcc_5v>;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		power-supply = <&vcc_sys>;
+		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+		brightness-levels = <
+			  0   1   2   3   4   5   6   7
+			  8   9  10  11  12  13  14  15
+			 16  17  18  19  20  21  22  23
+			 24  25  26  27  28  29  30  31
+			 32  33  34  35  36  37  38  39
+			 40  41  42  43  44  45  46  47
+			 48  49  50  51  52  53  54  55
+			 56  57  58  59  60  61  62  63
+			 64  65  66  67  68  69  70  71
+			 72  73  74  75  76  77  78  79
+			 80  81  82  83  84  85  86  87
+			 88  89  90  91  92  93  94  95
+			 96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <50>;
+		pwms = <&pwm0 0 25000 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		pwm-delay-us = <10000>;
+		status = "disabled";
+	};
+
+	panel: panel {
+		compatible = "simple-panel";
+		power-supply = <&vcc_io>;
+		backlight = <&backlight>;
+		enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+};
+
+&cpu0 {
+	cpu0-supply = <&vdd_cpu>;
+};
+
+&emmc {
+	broken-cd;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
+	vmmc-supply = <&vcc_io>;
+	vqmmc-supply = <&vcc_flash>;
+	status = "okay";
+};
+
+&gmac {
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio4 7 0>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 1000000>;
+	assigned-clocks = <&cru SCLK_MAC>;
+	assigned-clock-parents = <&ext_gmac>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	tx_delay = <0x30>;
+	rx_delay = <0x10>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	vdd_cpu: syr827@40 {
+		compatible = "silergy,syr827";
+		fcs,suspend-voltage-selector = <1>;
+		reg = <0x40>;
+		regulator-name = "vdd_cpu";
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vdd_gpu: syr828@41 {
+		compatible = "silergy,syr828";
+		fcs,suspend-voltage-selector = <1>;
+		reg = <0x41>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		interrupt-parent = <&gpio7>;
+		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&rtc_int>;
+	};
+
+	act8846: act8846@5a {
+		compatible = "active-semi,act8846";
+		reg = <0x5a>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_hold>;
+		system-power-controller;
+
+		regulators {
+			vcc_ddr: REG1 {
+				regulator-name = "vcc_ddr";
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-always-on;
+			};
+
+			vcc_io: REG2 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd_log: REG3 {
+				regulator-name = "vdd_log";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+			};
+
+			vcc_20: REG4 {
+				regulator-name = "vcc_20";
+				regulator-min-microvolt = <2000000>;
+				regulator-max-microvolt = <2000000>;
+				regulator-always-on;
+			};
+
+			vccio_sd: REG5 {
+				regulator-name = "vccio_sd";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vdd10_lcd: REG6 {
+				regulator-name = "vdd10_lcd";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};
+
+			vcca_codec: REG7 {
+				regulator-name = "vcca_codec";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vcc_tp: REG8 {
+				regulator-name = "vcca_33";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vccio_pmu: REG9 {
+				regulator-name = "vccio_pmu";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			vdd_10: REG10 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+			};
+
+			vcc_18: REG11 {
+				regulator-name = "vcc_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+
+			vcc18_lcd: REG12 {
+				regulator-name = "vcc18_lcd";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c4 {
+	status = "okay";
+};
+
+&i2c5 {
+	status = "okay";
+};
+
+&pinctrl {
+	pcfg_output_high: pcfg-output-high {
+		output-high;
+	};
+
+	pcfg_output_low: pcfg-output-low {
+		output-low;
+	};
+
+	act8846 {
+		pwr_hold: pwr-hold {
+			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_output_high>;
+		};
+	};
+
+	hym8563 {
+		rtc_int: rtc-int {
+			rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_otg {
+		otg_vbus_drv: otg-vbus-drv {
+			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcc_18>;
+	status = "okay";
+};
+
+&sdio0 {
+	broken-cd;
+	bus-width = <4>;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
+	vmmc-supply = <&vcc_18>;
+	status = "disabled";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+	vmmc-supply = <&vccio_sd>;
+	status = "okay";
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&usb_host1 {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&mipi_dsi0 {
+	status = "disabled";
+	rockchip,panel = <&panel>;
+	display-timings {
+		timing0 {
+			bits-per-pixel = <24>;
+			clock-frequency = <160000000>;
+			hfront-porch = <120>;
+			hsync-len = <20>;
+			hback-porch = <21>;
+			hactive = <1200>;
+			vfront-porch = <21>;
+			vsync-len = <3>;
+			vback-porch = <18>;
+			vactive = <1920>;
+			hsync-active = <0>;
+			vsync-active = <0>;
+			de-active = <1>;
+			pixelclk-active = <0>;
+		};
+	};
+};
+
+&wdt {
+	status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 9da8c8109d..1fecdd4add 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -39,6 +39,17 @@ config TARGET_EVB_RK3288
 	  also includes on-board eMMC and 2GB of SDRAM. Expansion connectors
 	  provide access to display pins, I2C, SPI, UART and GPIOs.
 
+config TARGET_EVB_RK3288_RK1608
+	bool "Evb-RK3288-RK1608"
+	select BOARD_LATE_INIT
+	help
+	  The EVB-RK3288-RK1608 includes a Host AP RK3288 and a DSP coprocessor
+	  RK1608. The EVB can help us to develop the RK1608 easily through a
+	  good RK3288 host environment. On the RK3288 side, there are 2 USB
+	  ports, MIPI, micro-SD card, WiFi and Gigabit Ethernet, It also
+	  includes on-board eMMC and 2GB of DDR3. Expansion connectors provide
+	  access to display pins, I2C, SPI, UART and GPIOs.
+
 config TARGET_FENNEC_RK3288
 	bool "Fennec-RK3288"
 	select BOARD_LATE_INIT
@@ -151,6 +162,8 @@ source "board/radxa/rock2/Kconfig"
 
 source "board/rockchip/evb_rk3288/Kconfig"
 
+source "board/rockchip/evb_rk3288_rk1608/Kconfig"
+
 source "board/rockchip/fennec_rk3288/Kconfig"
 
 source "board/rockchip/tinker_rk3288/Kconfig"
diff --git a/board/rockchip/evb_rk3288_rk1608/Kconfig b/board/rockchip/evb_rk3288_rk1608/Kconfig
new file mode 100644
index 0000000000..317fa88607
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3288_RK1608
+
+config SYS_BOARD
+	default "evb_rk3288_rk1608"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3288_rk1608"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3288_rk1608/MAINTAINERS b/board/rockchip/evb_rk3288_rk1608/MAINTAINERS
new file mode 100644
index 0000000000..a5a0f36eed
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3288-RK1608
+M:	Xing Zheng <zhengxing@rock-chips.com>
+S:	Maintained
+F:	board/rockchip/evb_rk3288_rk1608
+F:	include/configs/evb_rk3288_rk1608.h
+F:	configs/evb-rk3288-rk1608_defconfig
diff --git a/board/rockchip/evb_rk3288_rk1608/Makefile b/board/rockchip/evb_rk3288_rk1608/Makefile
new file mode 100644
index 0000000000..cad3527c97
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += evb-rk3288-rk1608.o
diff --git a/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
new file mode 100644
index 0000000000..db332b4872
--- /dev/null
+++ b/board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+
+void board_boot_order(u32 *spl_boot_list)
+{
+	/* eMMC prior to sdcard. */
+	spl_boot_list[0] = BOOT_DEVICE_MMC2;
+	spl_boot_list[1] = BOOT_DEVICE_MMC1;
+}
diff --git a/configs/evb-rk3288-rk1608_defconfig b/configs/evb-rk3288-rk1608_defconfig
new file mode 100644
index 0000000000..f81bf138cb
--- /dev/null
+++ b/configs/evb-rk3288-rk1608_defconfig
@@ -0,0 +1,82 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TARGET_EVB_RK3288_RK1608=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb-rk1608"
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SILENT_CONSOLE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/evb_rk3288_rk1608.h b/include/configs/evb_rk3288_rk1608.h
new file mode 100644
index 0000000000..8efd300d44
--- /dev/null
+++ b/include/configs/evb_rk3288_rk1608.h
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define ROCKCHIP_DEVICE_SETTINGS
+#include <configs/rk3288_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#endif

commit 8676c3314ab8b01fb8e3c63bdbae4d781c689bc1
Author: Caesar Wang <wxt@rock-chips.com>
Date:   Wed Nov 29 15:03:19 2017 +0800

    rockchip/rk3036: sdram: update the ddr for 400MHz
    
    As the emac need get the 50MHz frequency and the parent clock is dpll,
    So we will update this to fix it.
    
    Change-Id: I5b8f344dab263e9e0df72bf521394984b59ea9fe
    Signed-off-by: Caesar Wang <wxt@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index e6e8bff219..ffcf4de65f 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -34,12 +34,12 @@ struct rk3036_sdram_priv {
 	struct rk3036_ddr_config ddr_config;
 };
 
-/* use integer mode, 396MHz dpll setting
+/* use integer mode, 800MHz dpll setting
  * refdiv, fbdiv, postdiv1, postdiv2
  */
-const struct pll_div dpll_init_cfg = {1, 66, 2, 1};
+const struct pll_div dpll_init_cfg = {1, 100, 3, 1};
 
-/* 396Mhz ddr timing */
+/* 400Mhz ddr timing */
 const struct rk3036_ddr_timing ddr_timing = {0x18c,
 	{0x18c, 0xc8, 0x1f4, 0x27, 0x4e,
 	0x4, 0x8b, 0x06, 0x03, 0x0, 0x06, 0x05, 0x0f, 0x15, 0x06, 0x04, 0x04,

commit 85993e5ff6b7f6c516c99c89174cb49572f5eb32
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Nov 27 17:58:39 2017 +0800

    drm/rockchip: Complete missing header files
    
    Change-Id: I36c1a0663afbedcfc82b1f6a71d9e8f8fa6ac26b
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/include/linux/dw_hdmi.h b/include/linux/dw_hdmi.h
new file mode 100644
index 0000000000..83b65e9b92
--- /dev/null
+++ b/include/linux/dw_hdmi.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc.
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DW_HDMI__
+#define __DW_HDMI__
+
+/**
+ * DOC: Supported input formats and encodings
+ *
+ * Depending on the Hardware configuration of the Controller IP, it supports
+ * a subset of the following input formats and encodings on its internal
+ * 48bit bus.
+ *
+ * +----------------------+----------------------------------+------------------------------+
+ * + Format Name          + Format Code                      + Encodings                    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 8bit       + ``MEDIA_BUS_FMT_RGB888_1X24``    + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 10bits     + ``MEDIA_BUS_FMT_RGB101010_1X30`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 12bits     + ``MEDIA_BUS_FMT_RGB121212_1X36`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + RGB 4:4:4 16bits     + ``MEDIA_BUS_FMT_RGB161616_1X48`` + ``V4L2_YCBCR_ENC_DEFAULT``   +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 8bit     + ``MEDIA_BUS_FMT_YUV8_1X24``      + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 10bits   + ``MEDIA_BUS_FMT_YUV10_1X30``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 12bits   + ``MEDIA_BUS_FMT_YUV12_1X36``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:4:4 16bits   + ``MEDIA_BUS_FMT_YUV16_1X48``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV601``  +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_XV709``  +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:2 8bit     + ``MEDIA_BUS_FMT_UYVY8_1X16``     + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:2 10bits   + ``MEDIA_BUS_FMT_UYVY10_1X20``    + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:2 12bits   + ``MEDIA_BUS_FMT_UYVY12_1X24``    + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 8bit     + ``MEDIA_BUS_FMT_UYYVYY8_0_5X24`` + ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 10bits   + ``MEDIA_BUS_FMT_UYYVYY10_0_5X30``+ ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 12bits   + ``MEDIA_BUS_FMT_UYYVYY12_0_5X36``+ ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ * + YCbCr 4:2:0 16bits   + ``MEDIA_BUS_FMT_UYYVYY16_0_5X48``+ ``V4L2_YCBCR_ENC_601``       +
+ * +                      +                                  + or ``V4L2_YCBCR_ENC_709``    +
+ * +----------------------+----------------------------------+------------------------------+
+ */
+
+enum {
+	DW_HDMI_RES_8,
+	DW_HDMI_RES_10,
+	DW_HDMI_RES_12,
+	DW_HDMI_RES_MAX,
+};
+
+enum dw_hdmi_devtype {
+	IMX6Q_HDMI,
+	IMX6DL_HDMI,
+	RK3228_HDMI,
+	RK3288_HDMI,
+	RK3328_HDMI,
+	RK3366_HDMI,
+	RK3368_HDMI,
+	RK3399_HDMI,
+};
+
+struct dw_hdmi_audio_tmds_n {
+	unsigned long tmds;
+	unsigned int n_32k;
+	unsigned int n_44k1;
+	unsigned int n_48k;
+};
+
+enum dw_hdmi_phy_type {
+	DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00,
+	DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2,
+	DW_HDMI_PHY_DWC_MHL_PHY = 0xc2,
+	DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC = 0xe2,
+	DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2,
+	DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3,
+	DW_HDMI_PHY_VENDOR_PHY = 0xfe,
+};
+
+struct dw_hdmi_mpll_config {
+	unsigned long mpixelclock;
+	struct {
+		u16 cpce;
+		u16 gmp;
+	} res[DW_HDMI_RES_MAX];
+};
+
+struct dw_hdmi_curr_ctrl {
+	unsigned long mpixelclock;
+	u16 curr[DW_HDMI_RES_MAX];
+};
+
+struct dw_hdmi_phy_config {
+	unsigned long mpixelclock;
+	u16 sym_ctr;    /*clock symbol and transmitter control*/
+	u16 term;       /*transmission termination value*/
+	u16 vlev_ctr;   /* voltage level control */
+};
+
+struct dw_hdmi_phy_ops {
+	int (*init)(struct dw_hdmi *hdmi, void *data,
+		    struct drm_display_mode *mode);
+	void (*disable)(struct dw_hdmi *hdmi, void *data);
+	enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
+};
+
+struct dw_hdmi_plat_data {
+	enum dw_hdmi_devtype dev_type;
+	unsigned long input_bus_format;
+	unsigned long input_bus_encoding;
+	u32 vop_sel_bit;
+	u32 grf_vop_sel_reg;
+	/* Vendor PHY support */
+	const struct dw_hdmi_phy_ops *phy_ops;
+	const struct dw_hdmi_audio_tmds_n *tmds_n_table;
+	const char *phy_name;
+	void *phy_data;
+
+	/* Synopsys PHY support */
+	const struct dw_hdmi_mpll_config *mpll_cfg;
+	const struct dw_hdmi_curr_ctrl *cur_ctr;
+	const struct dw_hdmi_phy_config *phy_config;
+	int (*configure_phy)(struct dw_hdmi *hdmi,
+			     const struct dw_hdmi_plat_data *pdata,
+			     unsigned long mpixelclock);
+	unsigned long (*get_input_bus_format)(void *data);
+	unsigned long (*get_output_bus_format)(void *data);
+	unsigned long (*get_enc_in_encoding)(void *data);
+	unsigned long (*get_enc_out_encoding)(void *data);
+};
+
+#endif /* __IMX_HDMI_H__ */

commit 50982e19a8336049bc49dbf4b9beb03d4ec4a301
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Dec 6 09:57:09 2017 +0800

    rockchip: evb_rv1108: read zImage from offset 0xc0000
    
    Load kernel image(zImage + dtb) start block 0x600.
    
    Change-Id: I426e6834a42e994a215332fa04bf6b1d0751006d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/evb_rv1108.h b/include/configs/evb_rv1108.h
index ff3531b321..c02ce65b28 100644
--- a/include/configs/evb_rv1108.h
+++ b/include/configs/evb_rv1108.h
@@ -19,7 +19,7 @@
 	""
 #define CONFIG_BOOTCOMMAND						\
 	"sf probe;"							\
-	"sf read 0x62000000 0x140800 0x500000;"				\
+	"sf read 0x62000000 0xc0000 0x500000;"				\
 	"dcache off;"							\
 	"go 0x62000000"
 

commit b4e776703f81c7d502d6eac6911110d52f17229d
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Dec 6 09:56:29 2017 +0800

    rockchip: evb_rv1108: enable ROCKCHIP_SFC
    
    This enable Rockchip Serial Flash controller for
    SPI Nor divices.
    
    Change-Id: I5ee3a0697336be04b5619e4592a2c49de7099cf9
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 1713cc6468..c7ef594071 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -43,6 +43,7 @@ CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x10210000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y

commit c1cd6cb672251f2568450829c103d57efa450247
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Aug 8 09:43:39 2017 +0800

    driver: spi: add rockchip sfc support
    
    SFC stands for Serial Flash Controller on some
    rockchip platforms such as RV1108 / RK3128.
    
    This patch add support for it with Standard,Dual,Quad
    mode.
    
    Change-Id: Iaf60a789d4806371679fd0c0e1b2adf4fc04f85c
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 3c5582a950..e168ed6b15 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -99,6 +99,14 @@ config ROCKCHIP_SPI
 	  This uses driver model and requires a device tree binding to
 	  operate.
 
+config ROCKCHIP_SFC
+	bool "Rockchip SFC driver"
+	help
+	  Enable the Rockchip SFC driver, used to access SPI NOR flash
+	  on Rockchip SoCs.
+	  This uses driver model and requires a device tree binding to
+	  operate.
+
 config SANDBOX_SPI
 	bool "Sandbox SPI driver"
 	depends on SANDBOX && DM
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 9f8b86de76..052c6082b0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_MXS_SPI) += mxs_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
 obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
+obj-$(CONFIG_ROCKCHIP_SFC) += rockchip_sfc.o
 obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
 obj-$(CONFIG_SH_SPI) += sh_spi.o
 obj-$(CONFIG_SH_QSPI) += sh_qspi.o
diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
new file mode 100644
index 0000000000..4388e51920
--- /dev/null
+++ b/drivers/spi/rockchip_sfc.c
@@ -0,0 +1,402 @@
+/*
+ * sfc driver for rockchip
+ *
+ * (C) Copyright 2008-2016 Rockchip Electronics
+ * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <spi.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+#include "rockchip_sfc.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum rockchip_sfc_if_type {
+	IF_TYPE_STD,
+	IF_TYPE_DUAL,
+	IF_TYPE_QUAD,
+};
+
+struct rockchip_sfc_platdata {
+	s32 frequency;
+	fdt_addr_t base;
+};
+
+struct rockchip_sfc {
+	struct rockchip_sfc_reg *regbase;
+	struct clk clk;
+	unsigned int max_freq;
+	unsigned int mode;
+	unsigned int speed_hz;
+	u32 cmd;
+	u32 addr;
+};
+
+static int rockchip_sfc_ofdata_to_platdata(struct udevice *bus)
+{
+	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(bus);
+	int subnode;
+	int ret;
+
+	plat->base = devfdt_get_addr(bus);
+
+	ret = clk_get_by_index(bus, 0, &sfc->clk);
+	if (ret < 0) {
+		debug("Could not get clock for %s: %d\n", bus->name, ret);
+		return ret;
+	}
+
+	subnode = fdt_first_subnode(blob, node);
+	if (subnode < 0) {
+		debug("Error: subnode with SPI flash config missing!\n");
+		return -ENODEV;
+	}
+
+	plat->frequency = fdtdec_get_int(blob, subnode, "spi-max-frequency",
+					 100000000);
+
+	return 0;
+}
+
+static int rockchip_sfc_probe(struct udevice *bus)
+{
+	struct rockchip_sfc_platdata *plat = dev_get_platdata(bus);
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	int ret;
+
+	sfc->regbase = (struct rockchip_sfc_reg *)plat->base;
+
+	sfc->max_freq = plat->frequency;
+
+	ret = clk_set_rate(&sfc->clk, sfc->max_freq);
+	if (ret < 0) {
+		debug("%s: Failed to set clock: %d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	int tbase = get_timer(0);
+	u32 rcvr;
+	int ret = 0;
+
+	writel(SFC_RESET, &regs->rcvr);
+	do {
+		rcvr = readl(&regs->rcvr);
+		if (get_timer(tbase) > 1000) {
+			debug("sfc reset timeout\n");
+			ret =  -ETIMEDOUT;
+			break;
+		}
+		udelay(1);
+	} while (rcvr);
+
+	writel(0xFFFFFFFF, &regs->iclr);
+
+	debug("sfc reset\n");
+
+	return ret;
+}
+
+static u8 rockchip_sfc_get_if_type(struct rockchip_sfc *sfc)
+{
+	int type = IF_TYPE_STD;
+
+	if (sfc->cmd & SFC_WR) {
+		if (sfc->mode & SPI_TX_QUAD)
+			type = IF_TYPE_QUAD;
+		else if (sfc->mode & SPI_TX_DUAL)
+			type = IF_TYPE_DUAL;
+		else
+			type = IF_TYPE_STD;
+	} else {
+		if (sfc->mode & SPI_RX_QUAD)
+			type = IF_TYPE_QUAD;
+		else if (sfc->mode & SPI_RX_DUAL)
+			type = IF_TYPE_DUAL;
+		else
+			type = IF_TYPE_STD;
+	}
+
+	return type;
+}
+
+static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	u32 val = 0x02;
+	u32 fsr = readl(&regs->fsr);
+	u32 sr = readl(&regs->sr);
+	u8 data_width = IF_TYPE_STD;
+
+	if (!(fsr & SFC_TX_EMPTY) || !(fsr & SFC_RX_EMPTY) || (sr & SFC_BUSY))
+		rockchip_sfc_reset(sfc);
+
+	if (sfc->cmd & SFC_ADDR_XBITS)
+		data_width = rockchip_sfc_get_if_type(sfc);
+
+	val |= (data_width << SFC_DATA_WIDTH_SHIFT);
+
+	writel(val, &regs->ctrl);
+	writel(sfc->cmd, &regs->cmd);
+	if (sfc->cmd & SFC_ADDR_XBITS)
+		writel(sfc->addr, &regs->addr);
+}
+
+static int rockchip_sfc_do_dma_xfer(struct rockchip_sfc *sfc, u32 *buffer)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	int timeout = 1000;
+	int ret = 0;
+	int risr;
+	unsigned long tbase;
+
+	rockchip_sfc_setup_xfer(sfc);
+
+	writel(0xFFFFFFFF, &regs->iclr);
+	writel((u32)buffer, &regs->dmaaddr);
+	writel(SFC_DMA_START, &regs->dmatr);
+
+	tbase = get_timer(0);
+	do {
+		udelay(1);
+		risr = readl(&regs->risr);
+		if (get_timer(tbase) > timeout) {
+			debug("dma timeout\n");
+			ret = -ETIMEDOUT;
+			break;
+		}
+	} while (!(risr & TRANS_FINISH_INT));
+
+	writel(0xFFFFFFFF, &regs->iclr);
+
+	return ret;
+}
+
+static int rockchip_sfc_dma_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	u32 trb;
+	u32 *p32_data = buf;
+	int ret = 0;
+
+	while (len) {
+		trb = min(len, (u32)SFC_MAX_TRB);
+		sfc->cmd |= (trb << SFC_TRB_SHIFT);
+		ret = rockchip_sfc_do_dma_xfer(sfc, p32_data);
+		if (ret < 0)
+			break;
+		len -= trb;
+		sfc->addr += trb;
+		p32_data += (trb >> 2);
+	}
+
+	return ret;
+}
+
+static int rockchip_sfc_wait_fifo_ready(struct rockchip_sfc *sfc, int wr,
+					u32 timeout)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	unsigned long tbase = get_timer(0);
+	u8 level;
+	u32 fsr;
+
+	do {
+		fsr = readl(&regs->fsr);
+		if (wr)
+			level = (fsr & SFC_TXLV_MASK) >> SFC_TXLV_SHIFT;
+		else
+			level = (fsr & SFC_RXLV_MASK) >> SFC_RXLV_SHIFT;
+		if (get_timer(tbase) > timeout)
+			return -ETIMEDOUT;
+		udelay(1);
+	} while (!level);
+
+	return level;
+}
+
+static int rockchip_sfc_write(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	u32 bytes = len & 0x3;
+	u32 words = len >> 2;
+	u32 tx_level = 0;
+	u32 val = 0;
+	u8 count;
+
+	while (words) {
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		if (tx_level <= 0)
+			return tx_level;
+		count = min(words, tx_level);
+		writesl(&regs->data, buf, count);
+		buf += count;
+		words -= count;
+	}
+
+	/* handle the last none word aligned bytes */
+	if (bytes) {
+		tx_level = rockchip_sfc_wait_fifo_ready(sfc, 1, 1000);
+		if (tx_level <= 0)
+			return tx_level;
+		memcpy(&val, buf, bytes);
+		writel(val, &regs->data);
+	}
+
+	return 0;
+}
+
+static int rockchip_sfc_read(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	struct rockchip_sfc_reg *regs = sfc->regbase;
+	u32 bytes = len & 0x3;
+	u32 words = len >> 2;
+	u32 rx_level = 0;
+	u32 count;
+	u32 val;
+
+	while (words) {
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		if (rx_level <= 0)
+			return rx_level;
+		count = min(words, rx_level);
+		readsl(&regs->data, buf, count);
+		buf += count;
+		words -= count;
+	}
+
+	/* handle the last none word aligned bytes */
+	if (bytes) {
+		rx_level = rockchip_sfc_wait_fifo_ready(sfc, 0, 1000);
+		if (rx_level <= 0)
+			return rx_level;
+		val = readl(&regs->data);
+		memcpy(buf, &val, bytes);
+	}
+
+	return 0;
+}
+
+static int rockchip_sfc_pio_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	int ret = 0;
+	int rw = sfc->cmd & SFC_WR;
+
+	sfc->cmd |= (len << SFC_TRB_SHIFT);
+	rockchip_sfc_setup_xfer(sfc);
+
+	if (len) {
+		if (rw)
+			ret = rockchip_sfc_write(sfc, buf, len);
+		else
+			ret = rockchip_sfc_read(sfc, buf, len);
+	}
+
+	return ret;
+}
+
+static int rockchip_sfc_do_xfer(struct rockchip_sfc *sfc, u32 *buf, u32 len)
+{
+	int ret = 0;
+
+	if (!(len & 0x03) && (len >= 4))
+		ret = rockchip_sfc_dma_xfer(sfc, buf, len);
+	else
+		ret = rockchip_sfc_pio_xfer(sfc, buf, len);
+
+	return ret;
+}
+
+static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
+			     const void *dout, void *din, unsigned long flags)
+{
+	struct udevice *bus = dev->parent;
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+	int len = bitlen >> 3;
+	u8 *pcmd = (u8 *)dout;
+	int ret = 0;
+
+	if (flags & SPI_XFER_BEGIN) {
+		sfc->cmd = pcmd[0];
+		if (len >= 4) {
+			sfc->cmd |= SFC_ADDR_24BITS | (((len - 4) * 8) << 8);
+			sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
+		}
+	}
+
+	if (flags == (SPI_XFER_BEGIN | SPI_XFER_END))
+		len = 0;
+
+	if (flags & SPI_XFER_END) {
+		if (dout && len)
+			sfc->cmd |= SFC_WR;
+
+		if (din)
+			ret = rockchip_sfc_do_xfer(sfc, (u32 *)din, len);
+		else if (dout)
+			ret = rockchip_sfc_do_xfer(sfc, (u32 *)dout, len);
+	}
+
+	return ret;
+}
+
+static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
+{
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+
+	if (speed > sfc->max_freq)
+		speed = sfc->max_freq;
+
+	sfc->speed_hz = speed;
+
+	return 0;
+}
+
+static int rockchip_sfc_set_mode(struct udevice *bus, uint mode)
+{
+	struct rockchip_sfc *sfc = dev_get_priv(bus);
+
+	sfc->mode = mode;
+
+	return 0;
+}
+
+static const struct dm_spi_ops rockchip_sfc_ops = {
+	.xfer		= rockchip_sfc_xfer,
+	.set_speed	= rockchip_sfc_set_speed,
+	.set_mode	= rockchip_sfc_set_mode,
+};
+
+static const struct udevice_id rockchip_sfc_ids[] = {
+	{ .compatible = "rockchip,sfc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_sfc_driver) = {
+	.name	= "rockchip_sfc",
+	.id	= UCLASS_SPI,
+	.of_match = rockchip_sfc_ids,
+	.ops	= &rockchip_sfc_ops,
+	.ofdata_to_platdata = rockchip_sfc_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct rockchip_sfc_platdata),
+	.priv_auto_alloc_size = sizeof(struct rockchip_sfc),
+	.probe	= rockchip_sfc_probe,
+};
diff --git a/drivers/spi/rockchip_sfc.h b/drivers/spi/rockchip_sfc.h
new file mode 100644
index 0000000000..b8650564ed
--- /dev/null
+++ b/drivers/spi/rockchip_sfc.h
@@ -0,0 +1,82 @@
+/*
+ * sfc driver for rockchip
+ *
+ * (C) Copyright 2008-2016 Rockchip Electronics
+ * Yifeng.zhao, Software Engineering, <zhao0116@gmail.com>.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RK_SFC_H
+#define __RK_SFC_H
+
+struct rockchip_sfc_reg {
+	u32 ctrl;
+	u32 imr;
+	u32 iclr;
+	u32 ftlr;
+	u32 rcvr;
+	u32 ax;
+	u32 abit;
+	u32 isr;
+	u32 fsr;
+	u32 sr;
+	u32 risr;
+	u32 reserved[21];
+	u32 dmatr;
+	u32 dmaaddr;
+	u32 reserved1[30];
+	u32 cmd;
+	u32 addr;
+	u32 data;
+};
+check_member(rockchip_sfc_reg, data, 0x108);
+
+/*SFC_CTRL*/
+#define SFC_DATA_WIDTH_SHIFT	12
+#define SFC_DATA_WIDTH_MASK	GENMASK(13, 12)
+#define SFC_ADDR_WIDTH_SHIFT	10
+#define SFC_ADDR_WIDTH_MASK	GENMASK(11, 10)
+#define SFC_CMD_WIDTH_SHIT	8
+#define SFC_CMD_WIDTH_MASK	GENMASK(9, 8)
+#define SFC_DATA_SHIFT_NEGETIVE	BIT(1)
+
+/*SFC_CMD*/
+#define SFC_WR			BIT(12)
+#define SFC_ADDR_0BITS		(0 << 14)
+#define SFC_ADDR_24BITS		(1 << 14)
+#define SFC_ADDR_32BITS		(2 << 14)
+#define SFC_ADDR_XBITS		(3 << 14)
+#define SFC_TRB_SHIFT		(16)
+#define SFC_TRB_MASK		GENMASK(29, 16)
+
+/* Dma start trigger signal. Auto cleared after write */
+#define SFC_DMA_START		BIT(0)
+
+#define SFC_RESET		BIT(0)
+
+/*SFC_FSR*/
+#define SFC_RXLV_SHIFT		(16)
+#define SFC_RXLV_MASK		GENMASK(20, 16)
+#define SFC_TXLV_SHIFT		(8)
+#define SFC_TXLV_MASK		GENMASK(12, 8)
+#define SFC_RX_FULL		BIT(3)	/* rx fifo full */
+#define SFC_RX_EMPTY		BIT(2)	/* rx fifo empty */
+#define SFC_TX_EMPTY		BIT(1)	/* tx fifo empty */
+#define SFC_TX_FULL		BIT(0)	/* tx fifo full */
+
+#define SFC_BUSY		BIT(0)	/* sfc busy flag */
+
+/*SFC_RISR*/
+#define DMA_FINISH_INT		BIT(7)        /* dma interrupt */
+#define SPI_ERR_INT		BIT(6)        /* Nspi error interrupt */
+#define AHB_ERR_INT		BIT(5)        /* Ahb bus error interrupt */
+#define TRANS_FINISH_INT	BIT(4)        /* Transfer finish interrupt */
+#define TX_EMPTY_INT		BIT(3)        /* Tx fifo empty interrupt */
+#define TX_OF_INT		BIT(2)        /* Tx fifo overflow interrupt */
+#define RX_UF_INT		BIT(1)        /* Rx fifo underflow interrupt */
+#define RX_FULL_INT		BIT(0)        /* Rx fifo full interrupt */
+
+#define SFC_MAX_TRB		(1024 << 3)
+
+#endif

commit 6f775b34e5e8c9b7fbab688106843cc588fc208e
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Aug 8 09:40:25 2017 +0800

    sf: add support for GD25Q256
    
    Add support for GD25Q256, a 32MiB SPI Nor
    flash from Gigadevice.
    
    Change-Id: Id28c00189058971580406270e708a126c94c0461
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 839cdbe1b0..357b3bcfd4 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -37,6 +37,7 @@ enum spi_nor_option_flags {
 #define SPI_FLASH_CFI_MFR_SST		0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND	0xef
 #define SPI_FLASH_CFI_MFR_ATMEL		0x1f
+#define SPI_FLASH_CIF_MFR_GIGADEVICE	0xc8
 
 /* Erase commands */
 #define CMD_ERASE_4K			0x20
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 34f68881ed..d39c24251d 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -807,7 +807,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 #endif
 
 
-#ifdef CONFIG_SPI_FLASH_MACRONIX
+#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
 static int macronix_quad_enable(struct spi_flash *flash)
 {
 	u8 qeb_status;
@@ -892,8 +892,9 @@ static int set_quad_mode(struct spi_flash *flash,
 			 const struct spi_flash_info *info)
 {
 	switch (JEDEC_MFR(info)) {
-#ifdef CONFIG_SPI_FLASH_MACRONIX
+#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
 	case SPI_FLASH_CFI_MFR_MACRONIX:
+	case SPI_FLASH_CIF_MFR_GIGADEVICE:
 		return macronix_quad_enable(flash);
 #endif
 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
index c4ccf48af4..bb43231b16 100644
--- a/drivers/mtd/spi/spi_flash_ids.c
+++ b/drivers/mtd/spi/spi_flash_ids.c
@@ -65,6 +65,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
 	{"gd25q64b",	   INFO(0xc84017, 0x0, 64 * 1024,   128, SECT_4K) },
 	{"gd25lq32",	   INFO(0xc86016, 0x0, 64 * 1024,    64, SECT_4K) },
+	{"GD25Q256",       INFO(0xc84019, 0x0, 64 * 1024,   512, RD_FULL | WR_QPP | SECT_4K)},
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */
 	{"is25lp032",	   INFO(0x9d6016, 0x0, 64 * 1024,    64, 0) },

commit b49168b2b67bcad4975cc5886a59f4eb6fc204ef
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Nov 30 14:18:08 2017 +0800

    rockchip: bootrkp: set return errno when failed to get image
    
    We should return a errno when failed to get a valid image.
    
    Change-Id: I2290539bc5c874312940cedc9325cc16146ce6ce
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
index bea42a5a30..6840eb0a1b 100644
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -128,6 +128,7 @@ static int read_rockchip_image(struct blk_part *part, void *dst)
 		goto err;
 	if (img->tag != TAG_KERNEL) {
 		printf("%s: invalid image tag(0x%x)\n", part->name, img->tag);
+		ret = -ENODEV;
 		goto err;
 	}
 

commit e1ec45d2ebd447dc16525156f6c03d89d05b7880
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:18:36 2017 +0800

    rk312x: add arch_cpu_init implementation
    
    1. set read latency configure;
    2. set lcdc cpu axi qos priority level;
    3. set GPIO1_C1 iomux to gpio, default sdcard_detn;
    4. disable interrupt of rk3126.
    
    Change-Id: Iebd980e68f4a9fccbf8d620bac0f103571e1d4de
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index 9d6e3b1ee1..ef0ed3bcd4 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -3,10 +3,37 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#define GRF_GPIO1C_IOMUX		0x200080c0
+#define SDMMC_INTMASK			0x10214024
+#define READLATENCY_VAL			0x3f
+#define BUS_MSCH_QOS_BASE		0x10128014
+#define	CPU_AXI_QOS_PRIORITY_BASE	0x1012f188
+#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
+	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
 int arch_cpu_init(void)
 {
 	/* We do some SoC one time setting here. */
 
+	/* Read latency configure */
+	writel(READLATENCY_VAL, BUS_MSCH_QOS_BASE);
+
+	/* Set lcdc cpu axi qos priority level */
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(3, 3), CPU_AXI_QOS_PRIORITY_BASE);
+
+	/* Set GPIO1_C1 iomux to gpio, default sdcard_detn */
+	writel(0x00040000, GRF_GPIO1C_IOMUX);
+
+#ifdef CONFIG_ROCKCHIP_RK3126
+	/*
+	 * Disable interrupt, otherwise it always generates wakeup signal. This
+	 * is an IC hardware issue.
+	 */
+	writel(0, SDMMC_INTMASK);
+#endif
+
 	return 0;
 }

commit 8535e8778232c61c036d12dc59b6c2b0e800093c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:22:12 2017 +0800

    rockchip: configs: evb-rk3126: add CONFIG_ROCKCHIP_RK3126
    
    drivers can use the macro to distinguish RK3128 and RK3126
    
    Change-Id: I9dac767a4db114cfbc0ae13d52d7499cc8db3096
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index aa6320ddc6..7d8120860b 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_RK3126=y
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y

commit f151ed19e05cfc2fdb9e73867b60122f1b23dcdc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:20:29 2017 +0800

    rockchip: configs: bnd-d708: add CONFIG_ROCKCHIP_RK3126
    
    drivers can use the macro to distinguish RK3128 and RK3126
    
    Change-Id: I518c0097eb2191f911f3fdde0289dce9e19851cf
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index d686968e2f..ab1756c172 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_RK3126=y
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y

commit e1048023de17ca19896cda00dd3751d50d0eb64d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 29 17:39:34 2017 +0800

    rockchip: Kconfig: add ROCKCHIP_RK3126 option
    
    RK3126 can use most code from RK3128, but at some situations we have
    to distinguish between RK3126 and RK3128, so this macro gives help.
    It is usually selected in rk3126 board defconfig.
    
    Change-Id: Ifd8588efb0441bd58129d9942aaacec8232f1f20
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 782146f53f..02106f4a28 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -22,6 +22,16 @@ config ROCKCHIP_RK3128
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3128
+
+config ROCKCHIP_RK3126
+	bool "Support Rockchip RK3126 "
+	help
+	  RK3126 can use most code from RK3128, but at some situations we have
+	  to distinguish between RK3126 and RK3128, so this macro gives help.
+	  It is usually selected in rk3126 board defconfig.
+endif
+
 config ROCKCHIP_RK3066
 	bool "Support Rockchip RK3066"
 	select CPU_V7

commit de9a6cd2f90847d3b74950e6bb9f1ac0067846bb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 28 21:12:09 2017 +0800

    make.sh: support pack uboot.img
    
    Change-Id: Iaa95a69b20850f0b842c76b1d8a9d8cdcc0e7be5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/make.sh b/make.sh
index 7a355fc6ed..a5010a82e1 100755
--- a/make.sh
+++ b/make.sh
@@ -24,7 +24,26 @@ select_toolchain()
 	fi
 	echo toolchain: ${TOOLCHAIN}
 }
+
+pack_images()
+{
+	local sys_text_base dst
+
+	dst=../rkbin/tools
+	if [ -d ${dst} ]; then
+		path=$(cd `dirname ${dst}`; pwd)
+	else
+		echo "Can't find '../rkbin/' or '../rkbin/tools/' Responsity, please download it before pack image!"
+		exit 1
+	fi
+
+	sys_text_base=`sed -n "/CONFIG_SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" ${DSTDIR}/out/include/autoconf.mk|tr -d '\r'`
+	echo U-Boot entry point address: ${sys_text_base}
+	${path}/tools/loaderimage --pack --uboot ${DSTDIR}/out/u-boot.bin uboot.img ${sys_text_base}
+}
+
 echo "make for ${BOARD}_defconfig by -j${JOB}"
 make ${BOARD}_defconfig O=${DSTDIR}/out
 select_toolchain
 make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out
+pack_images

commit b177a917da8501bfb58e1b8ec506011f9bd1e9ea
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:57:51 2017 +0800

    power: charge animation: add system suspend support
    
    cpu0 will trap into ATF for system suspend, ATF can
    lead system to a extrem low power state.
    
    Change-Id: I1fad3671a11ed41d22533d21fb0df656b4a84e82
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 5cd7b604ca..7b0126b898 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,12 +4,15 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/suspend.h>
+#include <asm/arch/rockchip_smccc.h>
 #include <asm/arch/bootrkp.h>
 #include <common.h>
 #include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
+#include <irq-generic.h>
 #include <linux/input.h>
 #include <pwm.h>
 #include <power/charge_display.h>
@@ -21,15 +24,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define LONG_PRESSED_TIME			2000 /* 2s */
 #define IMAGE_SHOW_RESET			-1
 
-enum key_event {
-	KEY_NOT_PRESSED = 0,
-	KEY_SHORT_PRESSED,
-	KEY_LONG_PRESSED,
-};
-
 struct charge_image {
 	const char *name;
 	int soc;
@@ -167,60 +163,61 @@ static int charge_animation_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
-static int check_key_press(struct udevice *dev, bool restar_time)
+static int check_key_press(struct udevice *dev)
 {
-	static unsigned long pressed_time;
-	static int old_state;
-	int report = KEY_NOT_PRESSED;
-	int state;
-
-	/* just for restart time */
-	if (restar_time) {
-		pressed_time = get_timer(0);
-		goto out;
-	}
+	u32 state;
 
 	state = key_read(dev);
-	if (state < 0) {
+	if (state < 0)
 		printf("read power key failed: %d\n", state);
-		goto out;
-	}
 
-	/* Start time is not initialized, let's do it */
-	if (!pressed_time && (state == KEY_PRESS_DOWN)) {
-		pressed_time = get_timer(0);
-		return KEY_NOT_PRESSED;
-	} else {
-		debug("key state = %d\n", state);
-
-		if (state == KEY_PRESS_DOWN) {
-			if (get_timer(pressed_time) >= LONG_PRESSED_TIME) {
-				report = KEY_LONG_PRESSED;
-				pressed_time = 0;
-				old_state = KEY_LONG_PRESSED;
-				printf("power key long pressed...\n");
-			}
+	if (state == KEY_PRESS_LONG_DOWN)
+		printf("power key long pressed...\n");
+	else if (state == KEY_PRESS_DOWN)
+		printf("power key short pressed...\n");
+
+	return state;
+}
+
+static int system_suspend_enter(void)
+{
+	/*
+	 * TODO: enter low power mode:
+	 * 3. auto turn off screen when timout;
+	 * 4. power key wakeup;
+	 * 5. timer period wakeup for pmic fg ?
+	 */
+	if (IS_ENABLED(CONFIG_ARM_SMCCC)) {
+		printf("\nSystem suspend: ");
+		putc('1');
+		local_irq_disable();
+		putc('2');
+		irqs_suspend();
+		putc('3');
+		putc('\n');
+
+		/* Trap into ATF for low power mode */
+		cpu_suspend(0, psci_system_suspend);
+
+		putc('\n');
+		putc('3');
+		irqs_resume();
+		putc('2');
+		local_irq_enable();
+		putc('1');
+		putc('\n');
+
 		/*
-		 * If you don't check 'old_state != KEY_LONG_PRESSED', it will
-		 * treat 'key long pressed' release as a 'short key pressed'
-		 * release.
+		 * We must wait for key release event finish, otherwise
+		 * we may read key state too early.
 		 */
-		} else if ((state == KEY_PRESS_UP) &&
-			   (old_state != KEY_LONG_PRESSED)) {
-			report = KEY_SHORT_PRESSED;
-			old_state = report;
-			pressed_time = 0;
-			printf("power key short pressed...\n");
-		} else {
-			report = KEY_NOT_PRESSED;
-			old_state = report;
-			pressed_time = 0;
-			debug("power key Not pressed...\n");
-		}
+		mdelay(300);
+	} else {
+		printf("\nWfi\n");
+		wfi();
 	}
 
-out:
-	return report;
+	return 0;
 }
 
 static int charge_animation_show(struct udevice *dev)
@@ -379,15 +376,7 @@ static int charge_animation_show(struct udevice *dev)
 			debug("SHOW: %s\n", image[show_idx].name);
 			rockchip_show_bmp(image[show_idx].name);
 		} else {
-			/*
-			 * TODO: enter low power mode:
-			 *
-			 * 1. cut off some regualtors;
-			 * 2. set 24MHZ for some PLLs;
-			 * 3. auto turn off screen when timout;
-			 * 4. power key wakeup;
-			 * 5. timer period wakeup for pmic fg ?
-			 */
+			system_suspend_enter();
 		}
 
 		mdelay(5);
@@ -409,8 +398,8 @@ static int charge_animation_show(struct udevice *dev)
 		 * Short key event: turn on/off screen;
 		 * Long key event: show logo and boot system or still charging.
 		 */
-		key_state = check_key_press(pwrkey, false);
-		if (key_state == KEY_SHORT_PRESSED) {
+		key_state = check_key_press(pwrkey);
+		if (key_state == KEY_PRESS_DOWN) {
 			/* NULL means show nothing, ie. turn off screen */
 			if (screen_on)
 				rockchip_show_bmp(NULL);
@@ -435,7 +424,7 @@ static int charge_animation_show(struct udevice *dev)
 				screen_on = false;
 			else
 				screen_on = true;
-		} else if (key_state == KEY_LONG_PRESSED) {
+		} else if (key_state == KEY_PRESS_LONG_DOWN) {
 			/* Only long pressed while screen off needs screen_on true */
 			if (!screen_on)
 				screen_on = true;
@@ -445,8 +434,6 @@ static int charge_animation_show(struct udevice *dev)
 				printf("soc=%d%%, threshold soc=%d%%\n",
 				       soc, pdata->power_on_soc_threshold);
 				printf("Low power, unable to boot, charging...\n");
-				/* 'true': just for clear time of check key */
-				check_key_press(pwrkey, true);
 				show_idx = image_num - 1;
 				continue;
 			}
@@ -455,8 +442,6 @@ static int charge_animation_show(struct udevice *dev)
 				printf("voltage=%dmv, threshold voltage=%dmv\n",
 				       voltage, pdata->power_on_voltage_threshold);
 				printf("Low power, unable to boot, charging...\n");
-				/* 'true': just for clear time of check key */
-				check_key_press(pwrkey, true);
 				show_idx = image_num - 1;
 				continue;
 			}

commit 3ccaecfa6fefcfca9326285e5137b8b476c02d3c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 28 18:22:59 2017 +0800

    input: rk8xx pwrkey: use irq to detect key event
    
    because we support U-Boot system suspend and trap into ATF,
    we have to make pwrkey as wakeup source, so that we must
    register pmic_int as an irq.
    
    we found reading 'get_timer(0)' will return a large value in
    the interrupt routine and I don't find out what happend now,
    so I add the 'get_ms()' which reads arm gerneric timer tick
    direcly.
    
    we clean all PMIC interrupt status for safety to avoid pmic_int
    hold in low level which make PMIC can't respond to interrupt any
    more.
    
    Change-Id: I46ff81030696f4672faa9fc81141952e52fd5ba9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index cabdd3ce2c..497eac4314 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -10,9 +10,16 @@
 #include <linux/input.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
+#include <irq-generic.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
 
 #define	RK816_INT_STS_REG1	0x49
 #define	RK816_INT_MSK_REG1	0x4a
+#define	RK816_INT_STS_REG2	0x4c
+#define	RK816_INT_MSK_REG2	0x4d
+#define	RK816_INT_STS_REG3	0x4e
+#define	RK816_INT_MSK_REG3	0x4f
 #define RK816_PWRON_RISE_INT	(1 << 6)
 #define RK816_PWRON_FALL_INT	(1 << 5)
 
@@ -26,41 +33,156 @@ struct key_data {
 	u8 int_msk_reg;
 	u8 pwron_rise_int;
 	u8 pwron_fall_int;
+	struct reg_data *init_reg;
+	u32 init_reg_num;
+	struct reg_data *irq_reg;
+	u32 irq_reg_num;
+	uint64_t key_down_t;
+	uint64_t key_up_t;
 };
 
+struct reg_data {
+	u8 reg;
+	u8 val;
+};
+
+static struct reg_data rk816_init_reg[] = {
+	/* only enable rise/fall interrupt */
+	{ RK816_INT_MSK_REG1, 0x9f },
+	{ RK816_INT_MSK_REG2, 0xff },
+	{ RK816_INT_MSK_REG3, 0xff },
+	/* clear all interrupt states */
+	{ RK816_INT_STS_REG1, 0xff },
+	{ RK816_INT_STS_REG2, 0xff },
+	{ RK816_INT_STS_REG3, 0xff },
+};
+
+static struct reg_data rk816_irq_reg[] = {
+	/* clear all interrupt states */
+	{ RK816_INT_STS_REG1, 0xff },
+	{ RK816_INT_STS_REG2, 0xff },
+	{ RK816_INT_STS_REG3, 0xff },
+};
+
+static struct reg_data rk805_irq_reg[] = {
+	/* clear all interrupt states */
+	{ RK805_INT_STS_REG, 0xff },
+};
+
+static struct reg_data rk805_init_reg[] = {
+	/* only enable rise/fall interrupt */
+	{ RK805_INT_MSK_REG, 0x7e },
+	/* clear all interrupt states */
+	{ RK805_INT_STS_REG, 0xff },
+};
+
+static inline uint64_t arch_counter_get_cntpct(void)
+{
+	uint64_t cval = 0;
+
+	isb();
+#ifdef CONFIG_ARM64
+	asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
+#else
+	asm volatile ("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+#endif
+	return cval;
+}
+
+static uint64_t get_ms(uint64_t base)
+{
+	return (arch_counter_get_cntpct() / 24000UL) - base;
+}
+
 static int rk8xx_pwrkey_read(struct udevice *dev)
 {
 	struct key_data *key = dev_get_priv(dev);
-	int status = KEY_PRESS_NONE;
-	int ret, val;
+	u32 report = KEY_PRESS_NONE;
+
+	if ((key->key_up_t > key->key_down_t) &&
+	    (key->key_up_t - key->key_down_t) >= KEY_LONG_DOWN_MS) {
+		debug("%s: long key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
+		key->key_up_t = 0;
+		key->key_down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+	} else if (key->key_down_t && get_ms(key->key_down_t) >= KEY_LONG_DOWN_MS) {
+		debug("%s: long key (hold) ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
+		key->key_up_t = 0;
+		key->key_down_t = 0;
+		report = KEY_PRESS_LONG_DOWN;
+	} else if ((key->key_up_t > key->key_down_t) &&
+		   (key->key_up_t - key->key_down_t) < KEY_LONG_DOWN_MS) {
+		debug("%s: short key ms: %llu\n", __func__, key->key_up_t - key->key_down_t);
+		key->key_up_t = 0;
+		key->key_down_t = 0;
+		report = KEY_PRESS_DOWN;
+	} else {
+		debug("%s: key up: %llu, down: %llu\n", __func__, key->key_up_t, key->key_down_t);
+	}
 
+	return report;
+}
+
+static void pwrkey_irq_handler(int irq, void *data)
+{
+	struct udevice *dev = data;
+	struct key_data *key = dev_get_priv(dev);
+	int ret, val, i;
+
+	/* read status */
 	val = pmic_reg_read(dev->parent, key->int_sts_reg);
 	if (val < 0) {
 		printf("%s: i2c read failed, ret=%d\n", __func__, val);
-		return val;
+		return;
 	}
 
-	if (val & key->pwron_fall_int)
-		status = KEY_PRESS_DOWN;
+	/* fall event */
+	if (val & key->pwron_fall_int) {
+		key->key_down_t = get_ms(0);
+		printf("%s: key down: %llu ms\n", __func__, key->key_down_t);
+	}
 
-	/* Must check pwron rise behind of fall !! */
+	/* rise event */
 	if (val & key->pwron_rise_int) {
-		/* Clear fall when detect rise */
-		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-				     key->pwron_fall_int | key->pwron_rise_int);
+		key->key_up_t = get_ms(0);
+		printf("%s: key up: %llu ms\n", __func__, key->key_up_t);
+	}
+
+	/* clear intertup */
+	for (i = 0; i < key->irq_reg_num; i++) {
+		ret = pmic_reg_write(dev->parent,
+				     key->irq_reg[i].reg,
+				     key->irq_reg[i].val);
 		if (ret < 0) {
-			printf("%s: i2c write failed, ret=%d\n", __func__, val);
-			return ret;
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, key->irq_reg[i].reg, ret);
 		}
+	}
+}
+
+static int pwrkey_interrupt_init(struct udevice *dev)
+{
+	u32 interrupt[2], phandle;
+	int irq, ret;
+
+	phandle = dev_read_u32_default(dev->parent, "interrupt-parent", -1);
+	if (phandle < 0) {
+		printf("failed get 'interrupt-parent', ret=%d\n", phandle);
+		return phandle;
+	}
 
-		status = KEY_PRESS_UP;
+	ret = dev_read_u32_array(dev->parent, "interrupts", interrupt, 2);
+	if (ret) {
+		printf("failed get 'interrupt', ret=%d\n", ret);
+		return ret;
 	}
 
-	debug("%s: int sts = 0x%x msk = 0x%x\n",
-	      __func__, pmic_reg_read(dev->parent, key->int_sts_reg),
-	      pmic_reg_read(dev->parent, key->int_msk_reg));
+	irq = phandle_gpio_to_irq(phandle, interrupt[0]);
+	irq_install_handler(irq, pwrkey_irq_handler, dev);
+	irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+	irq_handler_enable(irq);
 
-	return status;
+	return 0;
 }
 
 static const struct dm_key_ops key_ops = {
@@ -73,7 +195,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 {
 	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
 	struct key_data *key = dev_get_priv(dev);
-	int ret, val;
+	int ret, i;
 
 	switch (rk8xx->variant) {
 	case RK805_ID:
@@ -81,6 +203,10 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		key->int_msk_reg = RK805_INT_MSK_REG;
 		key->pwron_rise_int = RK805_PWRON_RISE_INT;
 		key->pwron_fall_int = RK805_PWRON_FALL_INT;
+		key->init_reg = rk805_init_reg;
+		key->init_reg_num = ARRAY_SIZE(rk805_init_reg);
+		key->irq_reg = rk805_irq_reg;
+		key->irq_reg_num = ARRAY_SIZE(rk805_irq_reg);
 		break;
 
 	case RK816_ID:
@@ -88,36 +214,29 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 		key->int_msk_reg = RK816_INT_MSK_REG1;
 		key->pwron_rise_int = RK816_PWRON_RISE_INT;
 		key->pwron_fall_int = RK816_PWRON_FALL_INT;
+		key->init_reg = rk816_init_reg;
+		key->init_reg_num = ARRAY_SIZE(rk816_init_reg);
+		key->irq_reg = rk816_irq_reg;
+		key->irq_reg_num = ARRAY_SIZE(rk816_irq_reg);
 		break;
 
 	default:
 		return -EINVAL;
 	}
 
-	/* Clear states */
-	ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-			     key->pwron_rise_int | key->pwron_fall_int);
-	if (ret < 0) {
-		printf("%s: i2c write failed, ret=%d\n", __func__, ret);
-		return ret;
-	}
-
-	val = pmic_reg_read(dev->parent, key->int_msk_reg);
-	if (val < 0) {
-		printf("%s: i2c read failed, ret=%d\n", __func__, val);
-		return val;
-	}
-
-	/* enable fall and rise interrupt */
-	val = 0xff;
-	val &= ~(key->pwron_rise_int | key->pwron_fall_int);
-	ret = pmic_reg_write(dev->parent, key->int_msk_reg, val);
-	if (ret < 0) {
-		printf("%s: i2c write failed, ret=%d\n", __func__, val);
-		return ret;
+	/* mask and clear intertup */
+	for (i = 0; i < key->init_reg_num; i++) {
+		ret = pmic_reg_write(dev->parent,
+				     key->init_reg[i].reg,
+				     key->init_reg[i].val);
+		if (ret < 0) {
+			printf("%s: i2c write reg 0x%x failed, ret=%d\n",
+			       __func__, key->init_reg[i].reg, ret);
+			return ret;
+		}
 	}
 
-	return 0;
+	return pwrkey_interrupt_init(dev);
 }
 
 U_BOOT_DRIVER(rk8xx_pwrkey) = {

commit c315aab89c33d8a3ee8ec59d2fdc53fa9ce94b6d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 28 18:25:53 2017 +0800

    dm: key.h: add key state
    
    add KEY_PRESS_LONG_DOWN and KEY_LONG_DOWN_MS.
    
    Change-Id: I3877a3562779a44b29c31820c583f187530778f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/key.h b/include/key.h
index 16bf4cac5b..f5fe4fb5fe 100644
--- a/include/key.h
+++ b/include/key.h
@@ -7,10 +7,13 @@
 #ifndef _KEY_H_
 #define _KEY_H_
 
+#define KEY_LONG_DOWN_MS	2000
+
 enum key_state {
 	KEY_PRESS_NONE,
 	KEY_PRESS_UP,
 	KEY_PRESS_DOWN,
+	KEY_PRESS_LONG_DOWN,
 };
 
 struct dm_key_ops {

commit 965c1b10639ba6b6c3ac6b594cb31f89ea6e3936
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:57:21 2017 +0800

    rockchip: rk3128: enable CONFIG_ARM_SMCCC
    
    Change-Id: I4776c9603a91814df3371a55d573d513dbc95dd4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8210c0743a..782146f53f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -15,6 +15,7 @@ config ROCKCHIP_RK3128
 	bool "Support Rockchip RK3128"
 	select CPU_V7
 	select GICV2
+	select ARM_SMCCC
 	help
 	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options

commit f270a3f8f1778b63ebcf6fb34fac70a2ccfdae9c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:56:36 2017 +0800

    rockchip: add rockchip smccc support
    
    It supports rockchip platforms individual conversation
    between U-Boot and ATF via ARM SMCCC.
    
    Change-Id: I75077219f409e075bd3d0b312b2d85c205d6a96f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
new file mode 100644
index 0000000000..7a2b0a7420
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/rockchip_smccc.h
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_SMCCC_H__
+#define __ROCKCHIP_SMCCC_H__
+
+/* Stand PSCI system suspend */
+int psci_system_suspend(unsigned long unused);
+
+int sip_smc_set_suspend_mode(unsigned long ctrl,
+			     unsigned long config1,
+			     unsigned long config2);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c61adedbb7..8210c0743a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -310,6 +310,12 @@ config ROCKCHIP_VENDOR_PARTITION
           This enable support to read/write vendor configuration data from/to
 	  this partition
 
+config ROCKCHIP_SMCCC
+	bool "Rockchip SMCCC"
+	default y if ARM_SMCCC
+	help
+	  This enable support for Rockchip SMC calls
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ba38e97623..b58aa37620 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -31,6 +31,8 @@ ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
 obj-y += boot_mode.o
 endif
 
+obj-$(CONFIG_ROCKCHIP_SMCCC) += rockchip_smccc.o
+
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
diff --git a/arch/arm/mach-rockchip/rockchip_smccc.c b/arch/arm/mach-rockchip/rockchip_smccc.c
new file mode 100644
index 0000000000..ea56758e0d
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_smccc.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/arch/rockchip_smccc.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <asm/suspend.h>
+#include <linux/arm-smccc.h>
+
+#ifdef CONFIG_ARM64
+#define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND
+#else
+#define ARM_PSCI_1_0_SYSTEM_SUSPEND	ARM_PSCI_1_0_FN_SYSTEM_SUSPEND
+#endif
+
+/* Rockchip platform SiP call ID */
+#define SIP_SUSPEND_MODE		0x82000003
+
+static struct arm_smccc_res __invoke_sip_fn_smc(unsigned long function_id,
+						unsigned long arg0,
+						unsigned long arg1,
+						unsigned long arg2)
+{
+	struct arm_smccc_res res;
+
+	arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
+	return res;
+}
+
+int psci_system_suspend(unsigned long unused)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(ARM_PSCI_1_0_SYSTEM_SUSPEND,
+				  virt_to_phys(cpu_resume), 0, 0);
+	return res.a0;
+}
+
+int sip_smc_set_suspend_mode(unsigned long ctrl,
+			     unsigned long config1,
+			     unsigned long config2)
+{
+	struct arm_smccc_res res;
+
+	res = __invoke_sip_fn_smc(SIP_SUSPEND_MODE, ctrl, config1, config2);
+	return res.a0;
+}

commit ed837edf989da43204ef4e9b5d8d34b82d38dd8c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:05:30 2017 +0800

    irq: support irq suspend and resume
    
    U-Boot will support cpu suspend/resume, cpu and logic may
    lose power, this patch guarantees gic works normally.
    
    Change-Id: I8ebee881fa27fea075502f962f9faabaa8264f67
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index ab7d5493e5..c7ad094db6 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -180,6 +180,32 @@ void irq_free_handler(int irq)
 	irqs_desc[irq].data = NULL;
 }
 
+int irqs_suspend(void)
+{
+	int err;
+
+	err = gic_irq_chip->irq_suspend();
+	if (err) {
+		printf("ERROR: irqs suspend failed\n");
+		return err;
+	}
+
+	return 0;
+}
+
+int irqs_resume(void)
+{
+	int err;
+
+	err = gic_irq_chip->irq_resume();
+	if (err) {
+		printf("ERROR: irqs resume failed\n");
+		return err;
+	}
+
+	return 0;
+}
+
 #ifdef CONFIG_ARM64
 static void cpu_local_irq_enable(void)
 {
diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
index 3b1c91db9d..8907cc5a73 100644
--- a/drivers/irq/irq-gic.c
+++ b/drivers/irq/irq-gic.c
@@ -10,6 +10,11 @@
 #include <irq-generic.h>
 #include "irq-gic.h"
 
+#define gicd_readl(offset)	readl(GICD_BASE + (offset))
+#define gicc_readl(offset)	readl(GICC_BASE + (offset))
+#define gicd_writel(v, offset)	writel(v, GICD_BASE + (offset))
+#define gicc_writel(v, offset)	writel(v, GICC_BASE + (offset))
+
 typedef enum INT_TRIG {
 	INT_LEVEL_TRIGGER,
 	INT_EDGE_TRIGGER
@@ -243,6 +248,112 @@ static int gic_irq_get(void)
 #endif
 }
 
+struct gic_dist_data {
+	uint32_t ctlr;
+	uint32_t icfgr[DIV_ROUND_UP(1020, 16)];
+	uint32_t itargetsr[DIV_ROUND_UP(1020, 4)];
+	uint32_t ipriorityr[DIV_ROUND_UP(1020, 4)];
+	uint32_t igroupr[DIV_ROUND_UP(1020, 32)];
+	uint32_t ispendr[DIV_ROUND_UP(1020, 32)];
+	uint32_t isenabler[DIV_ROUND_UP(1020, 32)];
+};
+
+struct gic_cpu_data {
+	uint32_t ctlr;
+	uint32_t pmr;
+};
+
+static struct gic_dist_data gicd_save;
+static struct gic_cpu_data gicc_save;
+
+#define IRQ_REG_X4(irq)		(4 * ((irq) / 4))
+#define IRQ_REG_X16(irq)	(4 * ((irq) / 16))
+#define IRQ_REG_X32(irq)	(4 * ((irq) / 32))
+
+static int gic_irq_suspend(void)
+{
+	int irq_nr, i, irq;
+
+	/* irq nr */
+	irq_nr = ((gicd_readl(GICD_TYPER) & 0x1f) + 1) * 32;
+	if (irq_nr > 1020)
+		irq_nr = 1020;
+
+	/* GICC save */
+	gicc_save.ctlr = gicc_readl(GICC_CTLR);
+	gicc_save.pmr = gicc_readl(GICC_PMR);
+
+	/* GICD save */
+	gicd_save.ctlr = gicd_readl(GICD_CTLR);
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
+		gicd_save.icfgr[i++] = gicd_readl(GICD_ICFGR + IRQ_REG_X16(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_save.itargetsr[i++] = gicd_readl(GICD_ITARGETSRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_save.ipriorityr[i++] = gicd_readl(GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_save.igroupr[i++] = gicd_readl(GICD_IGROUPRn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_save.ispendr[i++] = gicd_readl(GICD_ISPENDRn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_save.isenabler[i++] = gicd_readl(GICD_ISENABLERn + IRQ_REG_X32(irq));
+
+	dsb();
+
+	return 0;
+}
+
+static int gic_irq_resume(void)
+{
+	int irq_nr, i, irq;
+
+	irq_nr = ((gicd_readl(GICD_TYPER) & 0x1f) + 1) * 32;
+	if (irq_nr > 1020)
+		irq_nr = 1020;
+
+	/* Disable ctrl register */
+	gicc_writel(0, GICC_CTLR);
+	gicd_writel(0, GICD_CTLR);
+	dsb();
+
+	/* Clear all interrupt */
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(0xffffffff, GICD_ICENABLERn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 16)
+		gicd_writel(gicd_save.icfgr[i++], GICD_ICFGR + IRQ_REG_X16(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_writel(gicd_save.itargetsr[i++], GICD_ITARGETSRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 4)
+		gicd_writel(gicd_save.ipriorityr[i++], GICD_IPRIORITYRn + IRQ_REG_X4(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(gicd_save.igroupr[i++], GICD_IGROUPRn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(gicd_save.isenabler[i++], GICD_ISENABLERn + IRQ_REG_X32(irq));
+
+	for (i = 0, irq = 0; irq < irq_nr; irq += 32)
+		gicd_writel(gicd_save.ispendr[i++], GICD_ISPENDRn + IRQ_REG_X32(irq));
+	dsb();
+
+	gicc_writel(gicc_save.pmr, GICC_PMR);
+	gicc_writel(gicc_save.ctlr, GICC_CTLR);
+	gicd_writel(gicd_save.ctlr, GICD_CTLR);
+	dsb();
+
+	return 0;
+}
+
+/**************************************regs save and resume**************************/
 static int gic_irq_init(void)
 {
 	/* GICV3 done in: arch/arm/cpu/armv8/start.S */
@@ -276,6 +387,8 @@ static int gic_irq_init(void)
 static struct irq_chip gic_irq_chip = {
 	.name		= "gic-irq-chip",
 	.irq_init	= gic_irq_init,
+	.irq_suspend	= gic_irq_suspend,
+	.irq_resume	= gic_irq_resume,
 	.irq_get	= gic_irq_get,
 	.irq_enable	= gic_irq_enable,
 	.irq_disable	= gic_irq_disable,
diff --git a/include/irq-generic.h b/include/irq-generic.h
index f16c8e5ca0..8bb3ee8769 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -47,6 +47,8 @@ enum {
 struct irq_chip {
 	const char	*name;
 	int		(*irq_init)(void);
+	int		(*irq_suspend)(void);
+	int		(*irq_resume)(void);
 	int		(*irq_get)(void);
 	int		(*irq_enable)(int irq);
 	int		(*irq_disable)(int irq);
@@ -61,6 +63,8 @@ void irq_free_handler(int irq);
 int irq_set_irq_type(int irq, unsigned int type);
 int irq_handler_enable(int irq);
 int irq_handler_disable(int irq);
+int irqs_suspend(void);
+int irqs_resume(void);
 int gpio_to_irq(struct gpio_desc *gpio);
 
 /*

commit e917b032f55e0f08148a4d30153e4ee7980ec08f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:02:51 2017 +0800

    regulator: rk8xx: add regulator suspend state setting implement
    
    Change-Id: I194f3bd7f9d7c03d9b8b15030d7448363b37af99
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 6d4a243855..355c945a3b 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -33,73 +33,73 @@
 #define RK818_USB_ILIM_SEL_MASK		0x0f
 #define RK818_USB_CHG_SD_VSEL_MASK	0x70
 
-
 struct rk8xx_reg_info {
 	uint min_uv;
 	uint step_uv;
 	s8 vsel_reg;
+	s8 vsel_sleep_reg;
 	u8 vsel_mask;
 };
 
 static const struct rk8xx_reg_info rk808_buck[] = {
-	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK808_BUCK_VSEL_MASK, },
-	{ 712500, 12500, -1, RK808_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK808_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, RK808_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_buck[] = {
 	/* buck 1 */
-	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000, 0, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000,      0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
 	/* buck 2 */
-	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 200000, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 2300000, 0, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{  712500,  12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000,      0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
 	/* buck 3 */
-	{ 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
+	{ 712500, 12500, -1, -1, RK818_BUCK_VSEL_MASK, },
 	/* buck 4 */
-	{ 800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{  800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk818_buck[] = {
-	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
-	{ 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
-	{ 1800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 712500,   12500, -1, -1, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, RK818_BUCK4_VSEL_MASK, },
 };
 
 #ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info rk808_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO7_ON_VSEL, RK808_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK808_BUCK4_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK808_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk816_ldo[] = {
-	{ 800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 };
 
 static const struct rk8xx_reg_info rk818_ldo[] = {
-	{ 1800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 800000, 100000, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, },
-	{ 1800000, 100000, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, RK818_LDO3_ON_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{  800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, RK818_LDO_VSEL_MASK, },
 };
 #endif
 
@@ -153,6 +153,21 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
 
+static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
+{
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == -1)
+		return -ENOSYS;
+	val = (uvolt - info->min_uv) / info->step_uv;
+	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
+	      val);
+
+	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
+}
+
 static int _buck_get_enable(struct udevice *pmic, int buck)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
@@ -181,7 +196,6 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 	return ret & mask ? true : false;
 }
 
-
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 {
 	uint mask, value, en_reg;
@@ -227,6 +241,33 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 	return ret;
 }
 
+static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
+{
+	uint mask;
+	int ret;
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << buck;
+		ret = pmic_clrsetbits(pmic, RK816_REG_DCDC_SLP_EN, mask,
+				      enable ? mask : 0);
+		break;
+
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
+				      enable ? 0 : mask);
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
 #ifdef ENABLE_DRIVER
 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 					     int num)
@@ -272,7 +313,6 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 	return ret & mask ? true : false;
 }
 
-
 static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
@@ -306,6 +346,30 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 	return ret;
 }
 
+static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK805_ID:
+	case RK816_ID:
+		mask = 1 << ldo;
+		ret = pmic_clrsetbits(pmic, RK816_REG_LDO_SLP_EN, mask,
+				      enable ? mask : 0);
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
+				      enable ? 0 : mask);
+		break;
+	}
+
+	return ret;
+}
+
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -330,6 +394,13 @@ static int buck_set_value(struct udevice *dev, int uvolt)
 	return _buck_set_value(dev->parent, buck, uvolt);
 }
 
+static int buck_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_suspend_value(dev->parent, buck, uvolt);
+}
+
 static int buck_set_enable(struct udevice *dev, bool enable)
 {
 	int buck = dev->driver_data - 1;
@@ -337,6 +408,13 @@ static int buck_set_enable(struct udevice *dev, bool enable)
 	return _buck_set_enable(dev->parent, buck, enable);
 }
 
+static int buck_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	int buck = dev->driver_data - 1;
+
+	return _buck_set_suspend_enable(dev->parent, buck, enable);
+}
+
 static int buck_get_enable(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
@@ -377,6 +455,22 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
 }
 
+static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
+{
+	int ldo = dev->driver_data - 1;
+	const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo);
+	int mask = info->vsel_mask;
+	int val;
+
+	if (info->vsel_sleep_reg == -1)
+		return -ENOSYS;
+	val = (uvolt - info->min_uv) / info->step_uv;
+	debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_sleep_reg, mask,
+	      val);
+
+	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
+}
+
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
 	int ldo = dev->driver_data - 1;
@@ -384,6 +478,13 @@ static int ldo_set_enable(struct udevice *dev, bool enable)
 	return _ldo_set_enable(dev->parent, ldo, enable);
 }
 
+static int ldo_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	int ldo = dev->driver_data - 1;
+
+	return _ldo_set_suspend_enable(dev->parent, ldo, enable);
+}
+
 static int ldo_get_enable(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
@@ -456,15 +557,19 @@ static int rk8xx_switch_probe(struct udevice *dev)
 static const struct dm_regulator_ops rk8xx_buck_ops = {
 	.get_value  = buck_get_value,
 	.set_value  = buck_set_value,
+	.set_suspend_value = buck_set_suspend_value,
 	.get_enable = buck_get_enable,
 	.set_enable = buck_set_enable,
+	.set_suspend_enable = buck_set_suspend_enable,
 };
 
 static const struct dm_regulator_ops rk8xx_ldo_ops = {
 	.get_value  = ldo_get_value,
 	.set_value  = ldo_set_value,
+	.set_suspend_value = ldo_set_suspend_value,
 	.get_enable = ldo_get_enable,
 	.set_enable = ldo_set_enable,
+	.set_suspend_enable = ldo_set_suspend_enable,
 };
 
 static const struct dm_regulator_ops rk8xx_switch_ops = {
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index b1482b78ce..699fd87dba 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -173,6 +173,8 @@ enum {
 enum {
 	RK816_REG_DCDC_EN1 = 0x23,
 	RK816_REG_DCDC_EN2,
+	RK816_REG_DCDC_SLP_EN,
+	RK816_REG_LDO_SLP_EN,
 	RK816_REG_LDO_EN1 = 0x27,
 	RK816_REG_LDO_EN2,
 };

commit fbc6dab9388e181eb1e6f7b06a5e27b77d7a826d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 27 16:02:07 2017 +0800

    dm: regulator: support regulator set suspend state
    
    support parse regulator standard property:
            regulator-off-in-suspend;
            regulator-suspend-microvolt;
    
    Change-Id: I59bf60b28293e891b4d2817462efb36447c46887
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 426a933d66..a2aab2b4cf 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -55,6 +55,23 @@ int regulator_set_value(struct udevice *dev, int uV)
 	return ops->set_value(dev, uV);
 }
 
+int regulator_set_suspend_value(struct udevice *dev, int uV)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+	struct dm_regulator_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
+		return -EINVAL;
+	if (uc_pdata->max_uV != -ENODATA && uV > uc_pdata->max_uV)
+		return -EINVAL;
+
+	if (!ops || !ops->set_suspend_value)
+		return -ENOSYS;
+
+	return ops->set_suspend_value(dev, uV);
+}
+
 /*
  * To be called with at most caution as there is no check
  * before setting the actual voltage value.
@@ -116,6 +133,16 @@ int regulator_set_enable(struct udevice *dev, bool enable)
 	return ops->set_enable(dev, enable);
 }
 
+int regulator_set_suspend_enable(struct udevice *dev, bool enable)
+{
+	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_suspend_enable)
+		return -ENOSYS;
+
+	return ops->set_suspend_enable(dev, enable);
+}
+
 int regulator_get_mode(struct udevice *dev)
 {
 	const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
@@ -181,6 +208,11 @@ int regulator_autoset(struct udevice *dev)
 	int ret = 0;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
+
+	ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
+	if (!ret && uc_pdata->suspend_on)
+		ret = regulator_set_suspend_value(dev, uc_pdata->suspend_uV);
+
 	if (!uc_pdata->always_on && !uc_pdata->boot_on)
 		return -EMEDIUMTYPE;
 
@@ -306,6 +338,7 @@ static int regulator_post_bind(struct udevice *dev)
 static int regulator_pre_probe(struct udevice *dev)
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
+	ofnode node;
 
 	uc_pdata = dev_get_uclass_platdata(dev);
 	if (!uc_pdata)
@@ -323,6 +356,16 @@ static int regulator_pre_probe(struct udevice *dev)
 	uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on");
 	uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on");
 
+	node = dev_read_subnode(dev, "regulator-state-mem");
+	if (ofnode_valid(node)) {
+		uc_pdata->suspend_on = !ofnode_read_bool(node, "regulator-off-in-suspend");
+		if (ofnode_read_u32(node, "regulator-suspend-microvolt", &uc_pdata->suspend_uV))
+			uc_pdata->suspend_uV = uc_pdata->max_uA;
+	} else {
+		uc_pdata->suspend_on = true;
+		uc_pdata->suspend_uV = uc_pdata->max_uA;
+	}
+
 	/* Those values are optional (-ENODATA if unset) */
 	if ((uc_pdata->min_uV != -ENODATA) &&
 	    (uc_pdata->max_uV != -ENODATA) &&
diff --git a/include/power/regulator.h b/include/power/regulator.h
index 2bbc1e51b3..ea1bf995bb 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -176,6 +176,8 @@ struct dm_regulator_uclass_platdata {
 	int flags;
 	u8 ctrl_reg;
 	u8 volt_reg;
+	bool suspend_on;
+	u32 suspend_uV;
 };
 
 /* Regulator device operations */
@@ -191,6 +193,7 @@ struct dm_regulator_ops {
 	 */
 	int (*get_value)(struct udevice *dev);
 	int (*set_value)(struct udevice *dev, int uV);
+	int (*set_suspend_value)(struct udevice *dev, int uV);
 
 	/**
 	 * The regulator output current function calls operates on a micro Amps.
@@ -215,6 +218,7 @@ struct dm_regulator_ops {
 	 */
 	int (*get_enable)(struct udevice *dev);
 	int (*set_enable)(struct udevice *dev, bool enable);
+	int (*set_suspend_enable)(struct udevice *dev, bool enable);
 
 	/**
 	 * The 'get/set_mode()' function calls should operate on a driver-
@@ -260,6 +264,15 @@ int regulator_get_value(struct udevice *dev);
  */
 int regulator_set_value(struct udevice *dev, int uV);
 
+/**
+ * regulator_set_suspend_value: set the suspend microvoltage value of a given regulator.
+ *
+ * @dev    - pointer to the regulator device
+ * @uV     - the output suspend value to set [micro Volts]
+ * @return - 0 on success or -errno val if fails
+ */
+int regulator_set_suspend_value(struct udevice *dev, int uV);
+
 /**
  * regulator_set_value_force: set the microvoltage value of a given regulator
  *			      without any min-,max condition check
@@ -304,6 +317,15 @@ int regulator_get_enable(struct udevice *dev);
  */
 int regulator_set_enable(struct udevice *dev, bool enable);
 
+/**
+ * regulator_set_suspend_enable: set regulator suspend enable state
+ *
+ * @dev    - pointer to the regulator device
+ * @enable - set true or false
+ * @return - 0 on success or -errno val if fails
+ */
+int regulator_set_suspend_enable(struct udevice *dev, bool enable);
+
 /**
  * regulator_get_mode: get active operation mode id of a given regulator
  *

commit 1367bfe31ccef7a093c26e55a34c6e16400bceb9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 14 21:10:17 2017 +0800

    power: charge animation: implement dm charge display callbacks
    
    Change-Id: I3c38f16dbeafd4defdf4533b7d516060fdca9cf2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index d9ae07db99..5cd7b604ca 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -6,6 +6,7 @@
 
 #include <asm/arch/bootrkp.h>
 #include <common.h>
+#include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <key.h>
@@ -51,7 +52,7 @@ struct charge_animation_pdata {
 	bool auto_start_kernel;
 };
 
-static int charge_animation_threshold_soc(struct udevice *dev)
+static int charge_animation_get_power_on_soc(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 
@@ -61,7 +62,7 @@ static int charge_animation_threshold_soc(struct udevice *dev)
 	return pdata->power_on_soc_threshold;
 }
 
-static int charge_animation_threshold_voltage(struct udevice *dev)
+static int charge_animation_get_power_on_voltage(struct udevice *dev)
 {
 	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
 
@@ -71,6 +72,52 @@ static int charge_animation_threshold_voltage(struct udevice *dev)
 	return pdata->power_on_voltage_threshold;
 }
 
+static int charge_animation_get_screen_on_voltage(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	return pdata->screen_on_voltage_threshold;
+}
+
+static int charge_animation_set_power_on_soc(struct udevice *dev, int val)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	pdata->power_on_soc_threshold = val;
+
+	return 0;
+}
+
+static int charge_animation_set_power_on_voltage(struct udevice *dev, int val)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	pdata->power_on_voltage_threshold = val;
+
+	return 0;
+}
+
+static int charge_animation_set_screen_on_voltage(struct udevice *dev, int val)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	pdata->screen_on_voltage_threshold = val;
+
+	return 0;
+}
+
 /*
  * IF you want to use your own charge images, please:
  *
@@ -435,6 +482,14 @@ static int charge_animation_show(struct udevice *dev)
 				break;
 			}
 		}
+
+		/* Step6: Exit by ctrl+c */
+		if (ctrlc()) {
+			if (voltage >= pdata->screen_on_voltage_threshold)
+				rockchip_show_logo();
+			printf("Exit charge, due to ctrl+c\n");
+			break;
+		}
 	}
 
 	ms = get_timer(charge_start);
@@ -450,8 +505,12 @@ static int charge_animation_show(struct udevice *dev)
 }
 
 static const struct dm_charge_display_ops charge_animation_ops = {
-	.get_power_on_soc = charge_animation_threshold_soc,
-	.get_power_on_voltage = charge_animation_threshold_voltage,
+	.get_power_on_soc = charge_animation_get_power_on_soc,
+	.get_power_on_voltage = charge_animation_get_power_on_voltage,
+	.get_screen_on_voltage = charge_animation_get_screen_on_voltage,
+	.set_power_on_soc = charge_animation_set_power_on_soc,
+	.set_power_on_voltage = charge_animation_set_power_on_voltage,
+	.set_screen_on_voltage = charge_animation_set_screen_on_voltage,
 	.show = charge_animation_show,
 };
 

commit 05b73bbbfe7617d18be96c9b5a2c30da356496a8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 14 21:09:12 2017 +0800

    cmd: charge: support command parameter
    
    This is maily for debug. the format is:
    charge <power on soc> <power on voltage> <screen on voltage>
    
    Change-Id: I821d574a386eb2eddd03ef50f543f96cb05b620e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/charge.c b/cmd/charge.c
index 805fdb30f7..a9ee0d4306 100644
--- a/cmd/charge.c
+++ b/cmd/charge.c
@@ -12,10 +12,11 @@
 static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 			  char *const argv[])
 {
-	int ret;
+	int on_soc, on_voltage, screen_voltage;
+	int ret, save[3];
 	struct udevice *dev;
 
-	if (argc != 1)
+	if (argc != 4 && argc != 1)
 		return CMD_RET_USAGE;
 
 	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
@@ -28,11 +29,38 @@ static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
 		return 0;
 	}
 
-	return charge_display_show(dev);
+	if (argc == 4) {
+		save[0] = charge_display_get_power_on_soc(dev);
+		save[1] = charge_display_get_power_on_voltage(dev);
+		save[2] = charge_display_get_screen_on_voltage(dev);
+
+		on_soc = simple_strtoul(argv[1], NULL, 0);
+		on_voltage = simple_strtoul(argv[2], NULL, 0);
+		screen_voltage = simple_strtoul(argv[3], NULL, 0);
+		debug("new: on_soc=%d, on_voltage=%d, screen_voltage=%d\n",
+		      on_soc, on_voltage, screen_voltage);
+
+		charge_display_set_power_on_soc(dev, on_soc);
+		charge_display_set_power_on_voltage(dev, on_voltage);
+		charge_display_set_screen_on_voltage(dev, screen_voltage);
+
+		charge_display_show(dev);
+
+		charge_display_set_power_on_soc(dev, save[0]);
+		charge_display_set_power_on_voltage(dev, save[1]);
+		charge_display_set_screen_on_voltage(dev, save[2]);
+
+	} else if (argc == 1) {
+		charge_display_show(dev);
+	} else {
+		return CMD_RET_USAGE;
+	}
+
+	return 0;
 }
 
-U_BOOT_CMD(
-	charge, 1, 0, charge_display,
-	"Charge display",
-	""
+U_BOOT_CMD(charge, 4, 0, charge_display,
+	   "Charge display",
+	   "-charge\n"
+	   "-charge <power on soc> <power on voltage> <screen on voltage>"
 );

commit 0cd6d3b96ff337995ff290b22e24325c43229bad
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 14 21:07:53 2017 +0800

    dm: charge display: add interface to get and update fdt parameter
    
    Change-Id: Ie2ab5c8c68fb629fd7628310f8a67084ef751f21
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
index 41bed07ce8..d3899b972f 100644
--- a/drivers/power/charge-display-uclass.c
+++ b/drivers/power/charge-display-uclass.c
@@ -29,6 +29,16 @@ int charge_display_get_power_on_voltage(struct udevice *dev)
 	return ops->get_power_on_voltage(dev);
 }
 
+int charge_display_get_screen_on_voltage(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_screen_on_voltage)
+		return -ENOSYS;
+
+	return ops->get_screen_on_voltage(dev);
+}
+
 int charge_display_show(struct udevice *dev)
 {
 	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
@@ -39,6 +49,36 @@ int charge_display_show(struct udevice *dev)
 	return ops->show(dev);
 }
 
+int charge_display_set_power_on_soc(struct udevice *dev, int val)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_power_on_soc)
+		return -ENOSYS;
+
+	return ops->set_power_on_soc(dev, val);
+}
+
+int charge_display_set_power_on_voltage(struct udevice *dev, int val)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_power_on_voltage)
+		return -ENOSYS;
+
+	return ops->set_power_on_voltage(dev, val);
+}
+
+int charge_display_set_screen_on_voltage(struct udevice *dev, int val)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->set_screen_on_voltage)
+		return -ENOSYS;
+
+	return ops->set_screen_on_voltage(dev, val);
+}
+
 UCLASS_DRIVER(charge_display) = {
 	.id	= UCLASS_CHARGE_DISPLAY,
 	.name	= "charge_display",
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
index 9c3486ea52..2fc9b3adec 100644
--- a/include/power/charge_display.h
+++ b/include/power/charge_display.h
@@ -10,11 +10,20 @@
 struct dm_charge_display_ops {
 	int (*get_power_on_soc)(struct udevice *dev);
 	int (*get_power_on_voltage)(struct udevice *dev);
+	int (*get_screen_on_voltage)(struct udevice *dev);
+	int (*set_power_on_soc)(struct udevice *dev, int val);
+	int (*set_power_on_voltage)(struct udevice *dev, int val);
+	int (*set_screen_on_voltage)(struct udevice *dev, int val);
 	int (*show)(struct udevice *dev);
 };
 
 int charge_display_get_power_on_soc(struct udevice *dev);
 int charge_display_get_power_on_voltage(struct udevice *dev);
+int charge_display_get_screen_on_voltage(struct udevice *dev);
+int charge_display_set_power_on_soc(struct udevice *dev, int val);
+int charge_display_set_power_on_voltage(struct udevice *dev, int val);
+int charge_display_set_screen_on_voltage(struct udevice *dev, int val);
+
 int charge_display_show(struct udevice *dev);
 
 #endif

commit 54457d1a884a18b96123c4e20af753864956e4c6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 29 14:17:07 2017 +0800

    rockchip: rk3126-bnd: enable boot_android
    
    Change-Id: I2e7268d1d49033bdf8c922a8dcfc235cb6fa78b4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index c86f8c4518..d686968e2f 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -19,6 +20,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_NAND_BOOT=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y

commit 275460b66e641e5aa6e6313c2e5f8028bae3ca34
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Wed Nov 29 15:27:02 2017 +0800

    rockchip: dts: rk312x: support mipi dsi
    
    Change-Id: I76ec4888c9f66dbab95b6c289270934cd190ef01
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
index 2f8feb7c96..a185e73ee2 100644
--- a/arch/arm/dts/rk3126-bnd-d708.dts
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -17,16 +17,6 @@
 		stdout-path = &uart2;
 	};
 
-	vcc5v0_otg: vcc5v0-otg-drv {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_otg";
-		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&otg_vbus_drv>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-
 	vcc5v0_host: vcc5v0-host-drv {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0_host";
@@ -117,6 +107,71 @@
 	};
 };
 
+&mipi_dphy {
+	status = "okay";
+};
+
+&dsi {
+	status = "okay";
+
+	panel@0 {
+		u-boot,dm-pre-reloc;
+		compatible = "simple-panel-dsi";
+		reg = <0>;
+		backlight = <&backlight>;
+		power-supply = <&ldo6>;
+		power-invert = <1>;
+		enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
+		prepare-delay-ms = <20>;
+		reset-delay-ms = <20>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <20>;
+		unprepare-delay-ms = <20>;
+
+		width-mm = <153>;
+		height-mm = <85>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+		status = "okay";
+
+		panel-init-sequence = [
+			05 1e 01 01
+			15 00 02 80 47
+			15 00 02 81 40
+			15 00 02 82 04
+			15 00 02 83 77
+			15 00 02 84 0f
+			15 00 02 85 70
+			15 78 02 86 70
+		];
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <49500000>;
+				hactive = <1024>;
+				hfront-porch = <120>;
+				hsync-len = <40>;
+				hback-porch = <120>;
+				vactive = <600>;
+				vfront-porch = <14>;
+				vsync-len = <4>;
+				vback-porch = <14>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
 &i2c0 {
 	status = "okay";
 	clock-frequency = <400000>;
@@ -289,6 +344,10 @@
 	status = "okay";
 };
 
+&pwm0 {
+	status = "okay";
+};
+
 &u2phy {
 	status = "okay";
 };
@@ -310,7 +369,6 @@
 };
 
 &usb_otg {
-	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 
@@ -333,6 +391,14 @@
 	};
 };
 
+&route_dsi {
+	status = "okay";
+};
+
+&vop {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index c4bd95384b..fabb596fa3 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/clock/rk3128-cru.h>
+#include <dt-bindings/media/rockchip_mipi_dsi.h>
 #include "skeleton.dtsi"
 
 / {
@@ -385,6 +386,35 @@
 				reg = <1>;
 				remote-endpoint = <&lvds_in_vop>;
 			};
+
+			vop_out_dsi: endpoint@2 {
+				reg = <1>;
+				remote-endpoint = <&dsi_in_vop>;
+			};
+		};
+	};
+
+	dsi: dsi@10110000 {
+		compatible = "rockchip,rk312x-mipi-dsi";
+		reg = <0x10110000 0x4000>;
+		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&mipi_dphy>;
+		clock-names = "pclk", "h2p", "hs_clk";
+		resets = <&cru SRST_VIO_MIPI_DSI>;
+		reset-names = "apb";
+		phys = <&mipi_dphy>;
+		phy-names = "mipi_dphy";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		ports {
+			port {
+				dsi_in_vop: endpoint {
+					remote-endpoint = <&vop_out_dsi>;
+				};
+			};
 		};
 	};
 
@@ -401,6 +431,14 @@
 				charge_logo,mode = "center";
 				connect = <&vop_out_lvds>;
 			};
+
+			route_dsi: route-dsi {
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "fullscreen";
+				charge_logo,mode = "center";
+				connect = <&vop_out_dsi>;
+			};
 		};
 	};
 
@@ -510,6 +548,19 @@
 		status = "disabled";
 	};
 
+	mipi_dphy: mipi-dphy@20038000 {
+		compatible = "rockchip,rk312x-mipi-dphy";
+		reg = <0x20038000 0x4000>;
+		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>, <&cru HCLK_VIO_H2P>;
+		clock-names = "ref", "pclk", "h2p";
+		clock-output-names = "mipi_dphy_pll";
+		#clock-cells = <0>;
+		resets = <&cru SRST_MIPIPHY_P>;
+		reset-names = "apb";
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
 	lvds: lvds@20038000 {
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3126-lvds";

commit 7d46341ee478732a8ac7052bf8c6dcfa6ef4d86e
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Wed Nov 29 15:25:07 2017 +0800

    rockchip: include: rk3128-cru: add same clk define for mipi dsi
    
    Change-Id: I045ad0101c152648de2a0c53d160b2398367a6e4
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 476268a78b..7ab50902c7 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -44,6 +44,7 @@
 #define SCLK_PVTM_CORE          123
 #define SCLK_PVTM_GPU           124
 #define SCLK_PVTM_VIDEO         125
+#define SCLK_MIPI_24M           148
 #define SCLK_MAC		151
 #define SCLK_MACREF		152
 #define SCLK_SFC		160
@@ -64,6 +65,7 @@
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
 #define PCLK_GPIO3		323
+#define PCLK_MIPI               325
 #define PCLK_GRF		329
 #define PCLK_I2C0		332
 #define PCLK_I2C1		333
@@ -80,6 +82,7 @@
 #define PCLK_PERI		363
 #define PCLK_DDRUPCTL		364
 #define PCLK_WDT		368
+#define PCLK_MIPIPHY            370
 
 /* hclk gates */
 #define HCLK_OTG0		449
@@ -91,6 +94,7 @@
 #define HCLK_I2S		462
 #define HCLK_LCDC		465
 #define HCLK_ROM		467
+#define HCLK_VIO_H2P            469
 #define HCLK_VIO_BUS		472
 #define HCLK_VCODEC		476
 #define HCLK_CPU		477
@@ -129,6 +133,7 @@
 #define SRST_GPIO0		32
 #define SRST_GPIO1		33
 #define SRST_GPIO2		34
+#define SRST_MIPIPHY_P          36
 #define SRST_UART0		39
 #define SRST_UART1		40
 #define SRST_UART2		41
@@ -186,5 +191,6 @@
 #define SRST_GPU_NIU_A		122
 
 #define SRST_DBG_P		131
+#define SRST_VIO_MIPI_DSI       137
 
 #endif

commit b1db1c31495a2f7592fe5d35e84833a2a9f6d252
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:55:55 2017 +0800

    drm/rockchip: dsi-panel: support power-supply
    
    Change-Id: I6b3dfbe4c1539961423a2ebd74edaf7ce91fe0c9
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
old mode 100644
new mode 100755
index c1d4128eaf..fed1fbc5fb
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -19,6 +19,7 @@
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
 #include <backlight.h>
+#include <power/regulator.h>
 #include <asm/gpio.h>
 
 #include "rockchip_display.h"
@@ -54,6 +55,8 @@ struct rockchip_dsi_panel {
 
 	int bus_format;
 
+	struct udevice *power_supply;
+	bool power_invert;
 	struct udevice *backlight;
 	struct gpio_desc enable;
 	struct gpio_desc reset;
@@ -183,6 +186,14 @@ static int rockchip_dsi_panel_prepare(struct display_state *state)
 	struct rockchip_dsi_panel *panel = panel_state->private;
 	int ret;
 
+	if (panel->power_supply) {
+		ret = regulator_set_enable(panel->power_supply,
+					   panel->power_invert);
+		if (ret)
+			printf("%s: failed to enable power_supply",
+			       __func__);
+	}
+
 	dm_gpio_set_value(&panel->enable, 1);
 	msleep(panel->delay_prepare);
 
@@ -319,6 +330,16 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 		return ret;
 	}
 
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
+					   "power-supply",
+					   &panel->power_supply);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+
 	/* keep panel blank on init. */
 	dm_gpio_set_value(&panel->enable, 0);
 	dm_gpio_set_value(&panel->reset, 0);

commit 740d383426281565142a88dd1f3f36ebbf7e053a
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:54:26 2017 +0800

    drm/rockchip: dphy: support rk312x
    
    Change-Id: I6810d2291407024de3024be01bf514e03258a813
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index 6572735ab0..2c7f146953 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -26,6 +26,10 @@ static const struct rockchip_phy rockchip_rk3366_mipi_dphy_data = {
 static const struct rockchip_phy rockchip_rk3368_mipi_dphy_data = {
 	 .funcs = &inno_mipi_dphy_funcs,
 };
+
+static const struct rockchip_phy rockchip_rk312x_mipi_dphy_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
 #endif
 
 static const struct udevice_id rockchip_phy_ids[] = {
@@ -38,6 +42,10 @@ static const struct udevice_id rockchip_phy_ids[] = {
 	 .compatible = "rockchip,rk3368-mipi-dphy",
 	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
 	},
+	{
+	 .compatible = "rockchip,rk312x-mipi-dphy",
+	 .data = (ulong)&rockchip_rk312x_mipi_dphy_data,
+	},
 #endif
 	{}
 };

commit b43d5222fe48dfb95ef4d5e5edc0f4a869ad670c
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:52:22 2017 +0800

    drm/rockchip: support mipi dsi
    
    Change-Id: I2431121a010e05f241337124fb4d6b799b1a79ff
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index 352b2be2a1..9e865118fc 100644
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
index ab1d7042df..55e068a9f1 100644
--- a/drivers/video/drm/rockchip-dw-mipi-dsi.c
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -46,13 +46,33 @@
 #define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
 #define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
 
+#define RK3288_GRF_SOC_CON9		0x0268
+
+#define RK3288_GRF_SOC_CON14		0x027c
+#define RK3288_TXRX_BASEDIR		BIT(15)
+#define RK3288_TXRX_MASTERSLAVEZ	BIT(14)
+#define RK3288_TXRX_CLKEN		BIT(12)
+
+#define RK3366_GRF_SOC_CON0		0x0400
+#define RK3366_DSI_SEL_VOP_LIT		BIT(2)
+
 #define RK3399_GRF_SOC_CON19		0x6250
 #define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
 #define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
 
 /* disable turnrequest, turndisable, forcetxstopmode, forcerxmode */
 #define RK3399_GRF_SOC_CON22		0x6258
-#define RK3399_GRF_DSI_MODE		0xffff0000
+#define RK3399_GRF_DSI0_MODE		0xffff0000
+/* disable turndisable, forcetxstopmode, forcerxmode, enable */
+#define RK3399_GRF_SOC_CON23		0x625c
+#define RK3399_GRF_DSI1_MODE1		0xffff0000
+#define RK3399_GRF_DSI1_ENABLE		0x000f000f
+/* disable basedir and enable clk*/
+#define RK3399_GRF_SOC_CON24		0x6260
+#define RK3399_TXRX_MASTERSLAVEZ	BIT(7)
+#define RK3399_TXRX_ENABLECLK		BIT(6)
+#define RK3399_TXRX_BASEDIR		BIT(5)
+#define RK3399_GRF_DSI1_MODE2		0x00600040
 
 #define DSI_VERSION			0x00
 #define DSI_PWR_UP			0x04
@@ -101,16 +121,22 @@
 #define ENABLE_CMD_MODE			BIT(0)
 
 #define DSI_VID_MODE_CFG		0x38
+#define VPG_EN				BIT(16)
 #define FRAME_BTA_ACK			BIT(14)
-#define ENABLE_LOW_POWER		(0x3f << 8)
-#define ENABLE_LOW_POWER_MASK		(0x3f << 8)
-#define VID_MODE_TYPE_BURST_SYNC_PULSES		0x2
-#define VID_MODE_TYPE_MASK			0x3
+#define LP_HFP_EN			BIT(13)
+#define LP_HBP_EN			BIT(12)
+#define ENABLE_LOW_POWER		(0xf << 8)
+#define ENABLE_LOW_POWER_MASK		(0xf << 8)
+#define VID_MODE_TYPE_BURST_SYNC_PULSES	0x0
+#define VID_MODE_TYPE_BURST_SYNC_EVENTS	0x1
+#define VID_MODE_TYPE_BURST		0x2
 
 #define DSI_VID_PKT_SIZE		0x3c
 #define VID_PKT_SIZE(p)			(((p) & 0x3fff) << 0)
 #define VID_PKT_MAX_SIZE		0x3fff
 
+#define DSI_VID_NUM_CHUMKS		0x40
+#define DSI_VID_NULL_PKT_SIZE		0x44
 #define DSI_VID_HSA_TIME		0x48
 #define DSI_VID_HBP_TIME		0x4c
 #define DSI_VID_HLINE_TIME		0x50
@@ -289,30 +315,51 @@ struct dw_mipi_dsi_plat_data {
 	u32 grf_switch_reg;
 	u32 grf_dsi0_mode;
 	u32 grf_dsi0_mode_reg;
+	u32 grf_dsi1_mode;
+	u32 grf_dsi1_mode_reg1;
+	u32 dsi1_basedir;
+	u32 dsi1_masterslavez;
+	u32 dsi1_enableclk;
+	u32 grf_dsi1_mode_reg2;
+	u32 grf_dsi1_cfg_reg;
 	unsigned int max_data_lanes;
 	u32 max_bit_rate_per_lane;
 	bool has_vop_sel;
+	bool vsync_quirk;
+};
+
+struct mipi_dphy {
+	/* Non-SNPS PHY */
+	const struct rockchip_phy *phy;
+
+	u16 input_div;
+	u16 feedback_div;
 };
 
 struct dw_mipi_dsi {
 	void *base;
 	void *grf;
+	const void *blob;
+	int node;
+
+	/* dual-channel */
+	struct dw_mipi_dsi *master;
+	struct dw_mipi_dsi *slave;
 
 	unsigned int lane_mbps; /* per lane */
 	u32 channel;
 	u32 lanes;
 	u32 format;
 	u32 mode_flags;
-	u16 input_div;
-	u16 feedback_div;
+	struct mipi_dphy dphy;
 	struct drm_display_mode *mode;
 
 	const struct dw_mipi_dsi_plat_data *pdata;
 };
 
 enum dw_mipi_dsi_mode {
-	DW_MIPI_DSI_CMD_MODE,
-	DW_MIPI_DSI_VID_MODE,
+	DSI_COMMAND_MODE,
+	DSI_VIDEO_MODE,
 };
 
 struct dphy_pll_testdin_map {
@@ -345,19 +392,6 @@ static int max_mbps_to_testdin(unsigned int max_mbps)
 	return -EINVAL;
 }
 
-/*
- * The controller should generate 2 frames before
- * preparing the peripheral.
- */
-static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
-{
-	int refresh, two_frames;
-
-	refresh = drm_mode_vrefresh(dsi->mode);
-	two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
-	mdelay(two_frames);
-}
-
 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)
 {
 	writel(val, dsi->base + reg);
@@ -368,6 +402,56 @@ static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
 	return readl(dsi->base + reg);
 }
 
+static int rockchip_wait_w_pld_fifo_not_full(struct dw_mipi_dsi *dsi)
+{
+	u32 sts;
+	int ret;
+
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, !(sts & GEN_PLD_W_FULL), 10,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("generic write payload fifo is full\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_wait_cmd_fifo_not_full(struct dw_mipi_dsi *dsi)
+{
+	u32 sts;
+	int ret;
+
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, !(sts & GEN_CMD_FULL), 10,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("generic write cmd fifo is full\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_wait_write_fifo_empty(struct dw_mipi_dsi *dsi)
+{
+	u32 sts;
+	u32 mask;
+	int ret;
+
+	mask = GEN_CMD_EMPTY | GEN_PLD_W_EMPTY;
+	ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, (sts & mask) == mask, 10,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("generic write fifo is full\n");
+		return ret;
+	}
+
+	return 0;
+}
+
 static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
 				 u8 test_data)
 {
@@ -415,12 +499,13 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 
 	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
 
+	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->dphy.input_div));
+	val = LOOP_DIV_LOW_SEL(dsi->dphy.feedback_div) | LOW_PROGRAM_EN;
+	dw_mipi_dsi_phy_write(dsi, 0x18, val);
+	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	val = LOOP_DIV_HIGH_SEL(dsi->dphy.feedback_div) | HIGH_PROGRAM_EN;
+	dw_mipi_dsi_phy_write(dsi, 0x18, val);
 	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
-	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->input_div));
-	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_LOW_SEL(dsi->feedback_div) |
-					 LOW_PROGRAM_EN);
-	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_HIGH_SEL(dsi->feedback_div) |
-					 HIGH_PROGRAM_EN);
 
 	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
 					 BIAS_BLOCK_ON | BANDGAP_ON);
@@ -437,20 +522,20 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 					 BANDGAP_SEL(BANDGAP_96_10));
 
 	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x55);
+	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
 	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
 
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
 				     PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
 	if (ret < 0) {
 		printf("failed to wait for phy lock state\n");
 		return ret;
 	}
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+	ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
 				 val, val & STOP_STATE_CLK_LANE, 1000,
 				 PHY_STATUS_TIMEOUT_US);
 	if (ret < 0)
@@ -459,137 +544,160 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
 	return ret;
 }
 
-static unsigned long dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi,
-					 unsigned long rate)
+static unsigned long rockchip_dsi_calc_bandwidth(struct dw_mipi_dsi *dsi)
 {
-	unsigned int i, pre;
-	unsigned long pllref, tmp;
-	unsigned int m = 1, n = 1;
-
-	pllref = 24000000;
-	tmp = pllref;
-
-	for (i = 1; i < 6; i++) {
-		pre = pllref / i;
-		if ((tmp > (rate % pre)) && (rate / pre < 512)) {
-			tmp = rate % pre;
-			n = i;
-			m = rate / pre;
-		}
-		if (tmp == 0)
-			break;
-	}
-
-	dsi->input_div = n;
-	dsi->feedback_div = m;
-
-	return pllref * m / n;
-}
-
-static unsigned long dw_mipi_dsi_calc_link_bandwidth(struct dw_mipi_dsi *dsi)
-{
-	unsigned long mpclk, tmp;
-	unsigned int target_mbps = 1000, max_mbps;
 	int bpp;
-
+	unsigned long mpclk, tmp;
+	unsigned long target_mbps = 1000;
+	unsigned int max_mbps;
+	int lanes;
+	int rate;
+
+	/* optional override of the desired bandwidth */
+	rate = fdt_getprop_u32_default_node(dsi->blob, dsi->node, 0,
+					     "rockchip,lane-rate", -1);
+	if (rate > 0) {
+		return rate;
+	}
 	max_mbps = dsi->pdata->max_bit_rate_per_lane / USEC_PER_SEC;
 
 	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
 	if (bpp < 0) {
-		printf("failed to get bpp for pixel format %d\n", dsi->format);
-		return bpp;
+		printf("failed to get bpp for pixel format %d\n",
+			dsi->format);
+		bpp = 24;
 	}
 
+	lanes = dsi->slave ? dsi->lanes * 2 : dsi->lanes;
+
 	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
 	if (mpclk) {
 		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
-		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
+		tmp = mpclk * (bpp / lanes) * 10 / 9;
 		if (tmp < max_mbps)
 			target_mbps = tmp;
 		else
 			printf("DPHY clock frequency is out of range\n");
 	}
 
-	return target_mbps * USEC_PER_SEC;
+	return target_mbps;
 }
 
-static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 val)
+static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
 {
-	int ret;
-	int sts = 0;
+	unsigned int i, pre;
+	unsigned long pllref, tmp;
+	unsigned int m = 1, n = 1;
+	unsigned long target_mbps;
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, !(sts & GEN_CMD_FULL), 1000,
-				 CMD_PKT_STATUS_TIMEOUT_US);
-	if (ret < 0) {
-		printf("failed to get available command FIFO\n");
-		return ret;
-	}
+	if (dsi->master)
+		return 0;
 
-	dsi_write(dsi, DSI_GEN_HDR, val);
+	target_mbps = rockchip_dsi_calc_bandwidth(dsi);
 
-	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
-				 sts, sts & (GEN_CMD_EMPTY | GEN_PLD_W_EMPTY),
-				 1000, CMD_PKT_STATUS_TIMEOUT_US);
-	if (ret < 0) {
-		printf("failed to write command FIFO\n");
-		return ret;
+	/* ref clk : 24MHz*/
+	pllref = 24;
+	tmp = pllref;
+
+	for (i = 1; i < 6; i++) {
+		pre = pllref / i;
+		if ((tmp > (target_mbps % pre)) && (target_mbps / pre < 512)) {
+			tmp = target_mbps % pre;
+			n = i;
+			m = target_mbps / pre;
+		}
+		if (tmp == 0)
+			break;
+	}
+
+	dsi->lane_mbps = pllref / n * m;
+	dsi->dphy.input_div = n;
+	dsi->dphy.feedback_div = m;
+	if (dsi->slave) {
+		dsi->slave->lane_mbps = dsi->lane_mbps;
+		dsi->slave->dphy.input_div = n;
+		dsi->slave->dphy.feedback_div = m;
 	}
 
 	return 0;
 }
 
-static int dw_mipi_dsi_short_write(struct dw_mipi_dsi *dsi,
-				   const struct mipi_dsi_msg *msg)
+static void rockchip_set_transfer_mode(struct dw_mipi_dsi *dsi, int flags)
 {
-	const u16 *tx_buf = msg->tx_buf;
-	u32 val = GEN_HDATA(*tx_buf) | GEN_HTYPE(msg->type);
-
-	if (msg->tx_len > 2) {
-		printf("too long tx buf length %zu for short write\n",
-		       msg->tx_len);
-		return -EINVAL;
+	if (flags & MIPI_DSI_MSG_USE_LPM) {
+		dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
+		dsi_write(dsi, DSI_LPCLK_CTRL, 0);
+	} else {
+		dsi_write(dsi, DSI_CMD_MODE_CFG, 0);
+		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
 	}
-
-	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
 }
 
-static int dw_mipi_dsi_long_write(struct dw_mipi_dsi *dsi,
-				  const struct mipi_dsi_msg *msg)
+static ssize_t rockchip_dsi_send_packet(struct dw_mipi_dsi *dsi,
+					const struct mipi_dsi_msg *msg)
 {
-	const u32 *tx_buf = msg->tx_buf;
-	int len = msg->tx_len, pld_data_bytes = sizeof(*tx_buf), ret;
-	u32 val = GEN_HDATA(msg->tx_len) | GEN_HTYPE(msg->type);
-	u32 remainder = 0;
-	u32 sts = 0;
-
-	if (msg->tx_len < 3) {
-		printf("wrong tx buf length %zu for long write\n",
-		       msg->tx_len);
-		return -EINVAL;
+	struct mipi_dsi_packet packet;
+	int ret;
+	int val;
+
+	/* create a packet to the DSI protocol */
+	ret = mipi_dsi_create_packet(&packet, msg);
+	if (ret) {
+		printf("failed to create packet: %d\n", ret);
+		return ret;
 	}
 
-	while (DIV_ROUND_UP(len, pld_data_bytes)) {
-		if (len < pld_data_bytes) {
-			memcpy(&remainder, tx_buf, len);
-			dsi_write(dsi, DSI_GEN_PLD_DATA, remainder);
-			len = 0;
+	rockchip_set_transfer_mode(dsi, msg->flags);
+
+	/* Send payload,  */
+	while (DIV_ROUND_UP(packet.payload_length, 4)) {
+		/*
+		 * Alternatively, you can always keep the FIFO
+		 * nearly full by monitoring the FIFO state until
+		 * it is not full, and then writea single word of data.
+		 * This solution is more resource consuming
+		 * but it simultaneously avoids FIFO starvation,
+		 * making it possible to use FIFO sizes smaller than
+		 * the amount of data of the longest packet to be written.
+		 */
+		ret = rockchip_wait_w_pld_fifo_not_full(dsi);
+		if (ret)
+			return ret;
+
+		if (packet.payload_length < 4) {
+			/* send residu payload */
+			val = 0;
+			memcpy(&val, packet.payload, packet.payload_length);
+			dsi_write(dsi, DSI_GEN_PLD_DATA, val);
+			packet.payload_length = 0;
 		} else {
-			dsi_write(dsi, DSI_GEN_PLD_DATA, *tx_buf);
-			tx_buf++;
-			len -= pld_data_bytes;
+			val = get_unaligned_le32(packet.payload);
+			dsi_write(dsi, DSI_GEN_PLD_DATA, val);
+			packet.payload += 4;
+			packet.payload_length -= 4;
 		}
+	}
+
+	ret = rockchip_wait_cmd_fifo_not_full(dsi);
+	if (ret)
+		return ret;
+
+	/* Send packet header */
+	val = get_unaligned_le32(packet.header);
+	dsi_write(dsi, DSI_GEN_HDR, val);
+
+	ret = rockchip_wait_write_fifo_empty(dsi);
+	if (ret)
+		return ret;
 
-		ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
-					 sts, !(sts & GEN_PLD_W_FULL), 1000,
-					 CMD_PKT_STATUS_TIMEOUT_US);
-		if (ret < 0) {
-			printf("failed to get available write payload FIFO\n");
+	if (dsi->slave) {
+		ret = rockchip_dsi_send_packet(dsi->slave, msg);
+		if (ret) {
+			printf("failed to send command through dsi slave, ret = %d\n", ret);
 			return ret;
 		}
 	}
-
-	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+	return 0;
 }
 
 static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
@@ -597,35 +705,22 @@ static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
-	int ret;
-
-	switch (msg->type) {
-	case MIPI_DSI_DCS_SHORT_WRITE:
-	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
-	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
-	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
-		ret = dw_mipi_dsi_short_write(dsi, msg);
-		break;
-	case MIPI_DSI_DCS_LONG_WRITE:
-	case MIPI_DSI_GENERIC_LONG_WRITE:
-		ret = dw_mipi_dsi_long_write(dsi, msg);
-		break;
-	default:
-		printf("unsupport packet data type: %d\n", msg->type);
-		ret = -EINVAL;
-		break;
-	}
 
-	return ret;
+	return rockchip_dsi_send_packet(dsi, msg);
 }
 
 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
 	u32 val;
 
-	val = VID_MODE_TYPE_BURST_SYNC_PULSES | ENABLE_LOW_POWER;
+	val = LP_HFP_EN | ENABLE_LOW_POWER;
+
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
+		val |= VID_MODE_TYPE_BURST;
+	else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
+		val |= VID_MODE_TYPE_BURST_SYNC_PULSES;
+	else
+		val |= VID_MODE_TYPE_BURST_SYNC_EVENTS;
 
 	dsi_write(dsi, DSI_VID_MODE_CFG, val);
 }
@@ -633,32 +728,43 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
 				 enum dw_mipi_dsi_mode mode)
 {
-	if (mode == DW_MIPI_DSI_CMD_MODE) {
-		dsi_write(dsi, DSI_PWR_UP, RESET);
+	if (mode == DSI_COMMAND_MODE) {
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
-		dsi_write(dsi, DSI_PWR_UP, POWERUP);
 	} else {
 		dsi_write(dsi, DSI_PWR_UP, RESET);
+		dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
 		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
-		dw_mipi_dsi_video_mode_config(dsi);
 		dsi_write(dsi, DSI_PWR_UP, POWERUP);
 	}
 }
 
 static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
 {
+	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
+
+	/* host */
+	dsi_write(dsi, DSI_LPCLK_CTRL, 0);
 	dsi_write(dsi, DSI_PWR_UP, RESET);
+
+	/* phy */
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ);
+
+	if (dsi->slave)
+		dw_mipi_dsi_disable(dsi->slave);
 }
 
 static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
 {
+	u32 esc_clk_div;
+
 	dsi_write(dsi, DSI_PWR_UP, RESET);
 	dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
 		  | PHY_RSTZ | PHY_SHUTDOWNZ);
+
+	/* The maximum value of the escape clock frequency is 20MHz */
+	esc_clk_div = DIV_ROUND_UP(dsi->lane_mbps >> 3, 20);
 	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
-		  TX_ESC_CLK_DIVIDSION(7));
-	dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+		  TX_ESC_CLK_DIVIDSION(esc_clk_div));
 }
 
 static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
@@ -681,11 +787,14 @@ static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
 		break;
 	}
 
-	if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 		val |= VSYNC_ACTIVE_LOW;
-	if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 		val |= HSYNC_ACTIVE_LOW;
 
+	if (dsi->pdata->vsync_quirk)
+		val ^= VSYNC_ACTIVE_LOW;
+
 	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
 	dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
 	dsi_write(dsi, DSI_DPI_CFG_POL, val);
@@ -701,36 +810,41 @@ static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
 static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
 					    struct drm_display_mode *mode)
 {
-	dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));
+	int pkt_size;
+
+	if (dsi->slave || dsi->master)
+		pkt_size = VID_PKT_SIZE(mode->hdisplay / 2 + 4);
+	else
+		pkt_size = VID_PKT_SIZE(mode->hdisplay);
+
+	dsi_write(dsi, DSI_VID_PKT_SIZE, pkt_size);
 }
 
 static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
 {
 	dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));
 	dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
-	dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
-	dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
 }
 
 /* Get lane byte clock cycles. */
-static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
+static int dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
 					   u32 hcomponent)
 {
-	u32 frac, lbcc;
+	u32 lbcc;
 
 	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
 
-	frac = lbcc % dsi->mode->clock;
-	lbcc = lbcc / dsi->mode->clock;
-	if (frac)
-		lbcc++;
+	if (dsi->mode->clock == 0) {
+		printf("dsi mode clock is 0!\n");
+		return 0;
+	}
 
-	return lbcc;
+	return DIV_ROUND_CLOSEST(lbcc, dsi->mode->clock);
 }
 
 static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
 {
-	u32 htotal, hsa, hbp, lbcc;
+	int htotal, hsa, hbp, lbcc;
 	struct drm_display_mode *mode = dsi->mode;
 
 	htotal = mode->htotal;
@@ -786,10 +900,19 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
 	dsi_write(dsi, DSI_INT_MSK1, 0);
 }
 
+const struct dw_mipi_dsi_plat_data rk312x_mipi_dsi_drv_data = {
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1000000000,
+	.vsync_quirk = true,
+};
+
 const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
 	.dsi0_en_bit = RK3288_DSI0_SEL_VOP_LIT,
 	.dsi1_en_bit = RK3288_DSI1_SEL_VOP_LIT,
 	.grf_switch_reg = RK3288_GRF_SOC_CON6,
+	.dsi1_basedir = RK3288_TXRX_BASEDIR,
+	.dsi1_masterslavez = RK3288_TXRX_MASTERSLAVEZ,
+	.grf_dsi1_cfg_reg = RK3288_GRF_SOC_CON14,
 	.max_data_lanes = 4,
 	.max_bit_rate_per_lane = 1500000000,
 	.has_vop_sel = true,
@@ -812,8 +935,14 @@ const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
 	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
 	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
 	.grf_switch_reg = RK3399_GRF_SOC_CON19,
-	.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
+	.grf_dsi0_mode = RK3399_GRF_DSI0_MODE,
 	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
+	.grf_dsi1_mode = RK3399_GRF_DSI1_MODE1,
+	.grf_dsi1_mode_reg1 = RK3399_GRF_SOC_CON23,
+	.dsi1_basedir = RK3399_TXRX_BASEDIR,
+	.dsi1_masterslavez = RK3399_TXRX_MASTERSLAVEZ,
+	.dsi1_enableclk = RK3399_TXRX_ENABLECLK,
+	.grf_dsi1_mode_reg2 = RK3399_GRF_SOC_CON24,
 	.max_data_lanes = 4,
 	.max_bit_rate_per_lane = 1500000000,
 	.has_vop_sel = true,
@@ -824,6 +953,52 @@ static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
 	return 0;
 }
 
+static int rockchip_dsi_dual_channel_probe(struct dw_mipi_dsi *master)
+{
+	int node0, node1;
+	struct dw_mipi_dsi *slave = NULL;
+
+	node0 = fdt_getprop_u32_default_node(master->blob, master->node, 0,
+					       "rockchip,dual-channel", -1);
+	if (node0 < 0)
+		return 0;
+
+	node1 = fdt_node_offset_by_phandle(master->blob, node0);
+	if (node1 < 0) {
+		printf("failed to find dsi slave node\n");
+		return -ENODEV;
+	}
+
+	if (!fdt_device_is_available(master->blob, node1)) {
+		printf("dsi slave node is not available\n");
+		return -ENODEV;
+	}
+
+	slave = malloc(sizeof(*slave));
+	if (!slave)
+		return -ENOMEM;
+
+	memset(slave, 0, sizeof(*slave));
+
+	master->lanes /= 2;
+	master->slave = slave;
+	slave->master = master;
+
+	slave->blob = master->blob;
+	slave->node = node1;
+	slave->base = (void *)fdtdec_get_addr_size_auto_noparent(slave->blob,
+								 node1, "reg",
+								 0, NULL, false);
+	slave->pdata = master->pdata;
+	slave->dphy.phy = master->dphy.phy;
+	slave->lanes = master->lanes;
+	slave->format = master->format;
+	slave->mode_flags = master->mode_flags;
+	slave->channel = master->channel;
+
+	return 0;
+}
+
 static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -832,16 +1007,27 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	int mipi_node = conn_state->node;
 	struct dw_mipi_dsi *dsi;
 	int panel;
+	int ret;
 
 	dsi = malloc(sizeof(*dsi));
 	if (!dsi)
 		return -ENOMEM;
+	memset(dsi, 0, sizeof(*dsi));
 
 	dsi->base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
 						mipi_node, "reg", 0, NULL, false);
+
+	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (dsi->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+			__func__, dsi->grf);
+		return -ENXIO;
+	}
+
 	dsi->pdata = pdata;
+	dsi->blob = state->blob;
+	dsi->node = mipi_node;
 	conn_state->private = dsi;
-	conn_state->type = DRM_MODE_CONNECTOR_DSI;
 	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
 	panel = fdt_subnode_offset(state->blob, mipi_node, "panel");
@@ -862,12 +1048,13 @@ static int rockchip_dw_mipi_dsi_init(struct display_state *state)
 	FDT_GET_INT(dsi->mode_flags, "dsi,mode_flags");
 	FDT_GET_INT(dsi->channel, "reg");
 
-	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	if (dsi->grf <= 0) {
-		printf("%s: Get syscon grf failed (ret=%p)\n",
-		      __func__, dsi->grf);
-		return  -ENXIO;
-	}
+	ret = rockchip_dsi_dual_channel_probe(dsi);
+	if (ret)
+		return ret;
+
+	conn_state->type = DRM_MODE_CONNECTOR_DSI;
+	if (dsi->slave)
+		conn_state->output_type = ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL;
 
 	return 0;
 }
@@ -877,79 +1064,150 @@ static void rockchip_dw_mipi_dsi_deinit(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
+	if (dsi->slave)
+		free(dsi->slave);
 	free(dsi);
 }
 
-static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
+static void rockchip_dw_dsi_pre_init(struct display_state *state,
+				     struct dw_mipi_dsi *dsi)
 {
 	struct connector_state *conn_state = &state->conn_state;
-	struct dw_mipi_dsi *dsi = conn_state->private;
 	unsigned long bw, rate;
 
 	dsi->mode = &conn_state->mode;
 
 	dw_mipi_dsi_clk_enable(dsi);
 
-	rockchip_phy_power_on(state);
 
-	bw = dw_mipi_dsi_calc_link_bandwidth(dsi);
-
-	if (conn_state->phy)
-		rate = rockchip_phy_set_pll(state, bw);
-	else
-		rate = dw_mipi_dsi_set_pll(dsi, bw);
-
-	dsi->lane_mbps = rate / USEC_PER_SEC;
+	if (conn_state->phy) {
+		bw = rockchip_dsi_calc_bandwidth(dsi);
+		rate = rockchip_phy_set_pll(state, bw * USEC_PER_SEC);
+		dsi->lane_mbps = rate / USEC_PER_SEC;
+		rockchip_phy_power_on(state);
+	} else {
+		dw_mipi_dsi_get_lane_bps(dsi);
+	}
 
 	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
 	       dsi->lane_mbps, dsi->lanes);
 
+	if (dsi->slave)
+		rockchip_dw_dsi_pre_init(state, dsi->slave);
+}
+
+static void rockchip_dw_dsi_host_init(struct dw_mipi_dsi *dsi)
+{
 	dw_mipi_dsi_init(dsi);
 	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
 	dw_mipi_dsi_packet_handler_config(dsi);
 	dw_mipi_dsi_video_mode_config(dsi);
 	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
 	dw_mipi_dsi_command_mode_config(dsi);
+	dw_mipi_dsi_set_mode(dsi, DSI_COMMAND_MODE);
 	dw_mipi_dsi_line_timer_config(dsi);
 	dw_mipi_dsi_vertical_timing_config(dsi);
 	dw_mipi_dsi_dphy_timing_config(dsi);
 	dw_mipi_dsi_dphy_interface_config(dsi);
 	dw_mipi_dsi_clear_err(dsi);
+}
+
+static int
+rockchip_dsi_grf_config(const struct dw_mipi_dsi_plat_data *pdata,
+			struct dw_mipi_dsi *dsi, int vop_id)
+{
+	int val;
+
+	if (pdata->grf_dsi0_mode_reg)
+		writel(pdata->grf_dsi0_mode,
+		       dsi->grf + pdata->grf_dsi0_mode_reg);
+
+	if (dsi->slave) {
+		if (vop_id)
+			val = pdata->dsi0_en_bit |
+			      (pdata->dsi0_en_bit << 16) |
+			      pdata->dsi1_en_bit |
+			      (pdata->dsi1_en_bit << 16);
+		else
+			val = (pdata->dsi0_en_bit << 16) |
+			      (pdata->dsi1_en_bit << 16);
+
+		if (pdata->grf_switch_reg)
+			writel(val, dsi->grf + pdata->grf_switch_reg);
+
+		val = pdata->dsi1_masterslavez |
+		      (pdata->dsi1_masterslavez << 16) |
+		      (pdata->dsi1_basedir << 16);
+		if (pdata->grf_dsi1_cfg_reg)
+			writel(val, dsi->grf + pdata->grf_dsi1_cfg_reg);
+
+		if (pdata->grf_dsi0_mode_reg)
+			writel(pdata->grf_dsi0_mode,
+			       dsi->grf + pdata->grf_dsi0_mode_reg);
+		if (pdata->grf_dsi1_mode_reg1)
+			writel(pdata->grf_dsi1_mode,
+			       dsi->grf + pdata->grf_dsi1_mode_reg1);
+		if (pdata->grf_dsi1_mode_reg2)
+			writel(RK3399_GRF_DSI1_MODE2,
+			       dsi->grf + pdata->grf_dsi1_mode_reg2);
+		if (pdata->grf_dsi1_mode_reg1)
+			writel(RK3399_GRF_DSI1_ENABLE,
+			       dsi->grf + pdata->grf_dsi1_mode_reg1);
+	} else {
+		if (pdata->grf_switch_reg) {
+			if (vop_id)
+				val = pdata->dsi0_en_bit |
+				      (pdata->dsi0_en_bit << 16);
+			else
+				val = pdata->dsi0_en_bit << 16;
+
+			writel(val, dsi->grf + pdata->grf_switch_reg);
+		}
+	}
+	debug("vop %s output to dsi0\n", (vop_id) ? "LIT" : "BIG");
 
 	return 0;
 }
 
-static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+static void rockchip_dw_dsi_controller_init(struct dw_mipi_dsi *dsi)
+{
+	rockchip_dw_dsi_host_init(dsi);
+
+	mdelay(10);
+	dw_mipi_dsi_phy_init(dsi);
+
+	if (dsi->slave)
+		rockchip_dw_dsi_controller_init(dsi->slave);
+}
+
+static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
 	struct crtc_state *crtc_state = &state->crtc_state;
 	const struct rockchip_connector *connector = conn_state->connector;
 	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
 	struct dw_mipi_dsi *dsi = conn_state->private;
-	u32 val;
 
-	if (pdata->grf_dsi0_mode_reg)
-		writel(pdata->grf_dsi0_mode,
-		       dsi->grf + pdata->grf_dsi0_mode_reg);
+	rockchip_dsi_grf_config(pdata, dsi, crtc_state->crtc_id);
 
-	if (!conn_state->phy)
-		dw_mipi_dsi_phy_init(dsi);
-	dw_mipi_dsi_wait_for_two_frames(dsi);
+	rockchip_dw_dsi_pre_init(state, dsi);
 
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+	rockchip_dw_dsi_controller_init(dsi);
 
 	if (!pdata->has_vop_sel)
 		return 0;
 
-	if (pdata->grf_switch_reg) {
-		if (crtc_state->crtc_id)
-			val = pdata->dsi0_en_bit | (pdata->dsi0_en_bit << 16);
-		else
-			val = pdata->dsi0_en_bit << 16;
+	return 0;
+}
 
-		writel(val, dsi->grf + pdata->grf_switch_reg);
-	}
-	debug("vop %s output to dsi0\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
+static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	dw_mipi_dsi_set_mode(dsi, DSI_VIDEO_MODE);
+	if (dsi->slave)
+		dw_mipi_dsi_set_mode(dsi->slave, DSI_VIDEO_MODE);
 
 	return 0;
 }
@@ -959,16 +1217,12 @@ static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
 	struct connector_state *conn_state = &state->conn_state;
 	struct dw_mipi_dsi *dsi = conn_state->private;
 
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
-
 	/*
 	 * This is necessary to make sure the peripheral will be driven
 	 * normally when the display is enabled again later.
 	 */
 	mdelay(120);
 
-	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
 	dw_mipi_dsi_disable(dsi);
 	return 0;
 }
@@ -1002,6 +1256,11 @@ const struct rockchip_connector rk3399_mipi_dsi_data = {
 	 .data = &rk3399_mipi_dsi_drv_data,
 };
 
+static const struct rockchip_connector rk312x_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk312x_mipi_dsi_drv_data,
+};
+
 static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	{
 	 .compatible = "rockchip,rk3288-mipi-dsi",
@@ -1015,7 +1274,11 @@ static const struct udevice_id rockchip_mipi_dsi_ids[] = {
 	},{
 	 .compatible = "rockchip,rk3399-mipi-dsi",
 	 .data = (ulong)&rk3399_mipi_dsi_data,
-	}, {}
+	},{
+	 .compatible = "rockchip,rk312x-mipi-dsi",
+	 .data = (ulong)&rk312x_mipi_dsi_data,
+	},
+	{}
 };
 
 U_BOOT_DRIVER(rockchip_mipi_dsi) = {

commit 2ff77a3ca1d35de3092a57ebe9d5154b23230bcd
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:47:47 2017 +0800

    rockchip: configs: bnd-d708: support mipi dsi
    
    Change-Id: Iee84fb31c0cd6a8d9a680cdf7c2e7fcf7dd13781
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 8801ba6175..c86f8c4518 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -70,8 +70,10 @@ CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x310c
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit de2eadf240155c3d7c89c7fe7d0088f1a12d1293
Author: Jerry Xu <xbl@rock-chips.com>
Date:   Tue Nov 28 20:33:43 2017 +0800

    rockchip: include: add some define for mipi dsi
    
    Change-Id: Ia125dff2293d4b41a26265ad46236f0429633753
    Signed-off-by: Jerry Xu <xbl@rock-chips.com>

diff --git a/include/dt-bindings/media/rockchip_mipi_dsi.h b/include/dt-bindings/media/rockchip_mipi_dsi.h
index 469d8c4358..78b915a946 100644
--- a/include/dt-bindings/media/rockchip_mipi_dsi.h
+++ b/include/dt-bindings/media/rockchip_mipi_dsi.h
@@ -7,6 +7,8 @@
 #ifndef __ROCKCHIP_MIPI_DSI_H__
 #define __ROCKCHIP_MIPI_DSI_H__
 
+#define BIT(nr)			(1UL << (nr))
+
 /* request ACK from peripheral */
 #define MIPI_DSI_MSG_REQ_ACK	BIT(0)
 /* use Low Power Mode to transmit message */
@@ -39,10 +41,15 @@
 /* transmit data in low power */
 #define MIPI_DSI_MODE_LPM		BIT(11)
 
-#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
-#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
-#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
-#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
-#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY	BIT(2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL	BIT(3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP	BIT(4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL	BIT(5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE	BIT(6)
+
+#define MIPI_DSI_FMT_RGB888		0
+#define MIPI_DSI_FMT_RGB666		1
+#define MIPI_DSI_FMT_RGB666_PACKED	2
+#define MIPI_DSI_FMT_RGB565		3
 
 #endif /* __ROCKCHIP_MIPI_DSI__ */

commit 9ea7f399ea2a6ca5fc55c2b427c0f4fe9b17a814
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Nov 29 11:41:40 2017 +0800

    drivers: rknand: add part type detect
    
    bug: part type unknown issue
    => rknand part 0
    
    Change-Id: Ibb84249d4110fcadfbdb3f2c3a9ce2da2b520b2f
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
index 06d31cef72..44fa20e1f5 100644
--- a/drivers/rknand/rknand.c
+++ b/drivers/rknand/rknand.c
@@ -146,7 +146,7 @@ static int rknand_blk_probe(struct udevice *udev)
 	sprintf(desc->vendor, "0x%.4x", 0x2207);
 	memcpy(desc->product, "rknand", sizeof("rknand"));
 	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
-	/* part_init(desc); */
+	part_init(desc);
 	return 0;
 }
 

commit 692e3bb125b01104e9a6df687b34c20b03c3b988
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 17:29:30 2017 +0800

    rockchip: clk: don't reture error when not found reset driver
    
    It's OK to continue work without reset driver.
    
    Change-Id: I7addc19cd0a6fbbc3ebd07c1686067e5e8f4225f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c.bak b/drivers/clk/rockchip/clk_rk3128.c.bak
new file mode 100644
index 0000000000..cd6ebe96f2
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3128.c.bak
@@ -0,0 +1,602 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <bitfield.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3128-cru.h>
+#include <linux/log2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 2400U * 1000000,
+	VCO_MIN_HZ	= 600 * 1000000,
+	OUTPUT_MAX_HZ	= 2400U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+
+/* use integer mode*/
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+
+static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div)
+{
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+		udelay(1);
+
+	return 0;
+}
+
+static int pll_para_config(u32 freq_hz, struct pll_div *div)
+{
+	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 freq_khz = freq_hz / 1000;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return -1;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = freq_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->postdiv1 = postdiv1;
+	div->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->refdiv = refdiv;
+		div->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (1000)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, freq_hz,
+		       best_diff_khz * 1000);
+		return -1;
+	}
+	return 0;
+}
+
+static void rkclk_init(struct rk3128_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
+		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+
+	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
+	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_PERI_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
+	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
+
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
+	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
+	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+		PERI_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
+	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+		PERI_ACLK_HZ && pclk_div < 0x8);
+
+	rk_clrsetreg(&cru->cru_clksel_con[10],
+		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
+		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
+		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
+		     APLL_MODE_NORM << APLL_MODE_SHIFT |
+		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
+
+	/*fix NAND controller  working clock max to 150Mhz */
+	rk_clrsetreg(&cru->cru_clksel_con[2],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     3 << NANDC_CLK_DIV_SHIFT);
+}
+
+/* Get pll rate by id */
+static u32 rkclk_pll_get_rate(struct rk3128_cru *cru,
+			      enum rk_clk_id clk_id)
+{
+	u32 refdiv, fbdiv, postdiv1, postdiv2;
+	u32 con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		GPLL_MODE_SHIFT, 0xff
+	};
+	static u32 clk_mask[CLK_COUNT] = {
+		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
+		GPLL_MODE_MASK, 0xff
+	};
+	uint shift;
+	uint mask;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	mask = clk_mask[clk_id];
+
+	switch ((con & mask) >> shift) {
+	case GPLL_MODE_SLOW:
+		return OSC_HZ;
+	case GPLL_MODE_NORM:
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case GPLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph)
+{
+	uint src_rate;
+	uint div, mux;
+	u32 con;
+
+	switch (periph) {
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con = readl(&cru->cru_clksel_con[12]);
+		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
+		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con = readl(&cru->cru_clksel_con[11]);
+		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
+		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	return DIV_TO_RATE(src_rate, div);
+}
+
+static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph, uint freq)
+{
+	int src_clk_div;
+	int mux;
+
+	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
+
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+
+	if (src_clk_div > 128) {
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+		mux = EMMC_SEL_24M;
+	} else {
+		mux = EMMC_SEL_GPLL;
+	}
+
+	switch (periph) {
+	case HCLK_EMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     mux << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     MMC0_PLL_MASK | MMC0_DIV_MASK,
+			     mux << MMC0_PLL_SHIFT |
+			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+}
+
+static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = con >> 12 & 0x3;
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, div);
+}
+
+static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = PERI_ACLK_HZ / hz;
+	assert(src_clk_div - 1 < 4);
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		rk_setreg(&cru->cru_clksel_con[10],
+			  ((src_clk_div - 1) << 12));
+		break;
+	default:
+		printf("do not support this peripheral bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
+}
+
+static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, SARADC_DIV_CON_SHIFT,
+			       SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     SARADC_DIV_CON_MASK,
+		     src_clk_div << SARADC_DIV_CON_SHIFT);
+
+	return rk3128_saradc_get_clk(cru);
+}
+
+static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+	struct pll_div cpll_config = {0};
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO0_PLL_MASK | VIO0_DIV_MASK,
+			     VIO0_SEL_GPLL << VIO0_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO0_DIV_SHIFT);
+		break;
+	case ACLK_VIO1:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO1_PLL_MASK | VIO1_DIV_MASK,
+			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
+		break;
+	case DCLK_LCDC:
+		if (pll_para_config(hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
+
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
+			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
+			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return hz;
+}
+
+static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = con  & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case ACLK_VIO1:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = (con >> 8) & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case DCLK_LCDC:
+		con = readl(&cru->cru_clksel_con[27]);
+		div = (con >> 8) & 0xfff;
+		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
+		break;
+	default:
+		return -ENOENT;
+	}
+	return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3128_clk_get_rate(struct clk *clk)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+
+	switch (clk->id) {
+	case 0 ... 63:
+		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		return rk3128_peri_get_pclk(priv->cru, clk->id);
+	case SCLK_SARADC:
+		return rk3128_saradc_get_clk(priv->cru);
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		return rk3128_vop_get_rate(priv->cru, clk->id);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong new_rate, gclk_rate;
+
+	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
+	switch (clk->id) {
+	case 0 ... 63:
+		return 0;
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		new_rate = rk3128_vop_set_clk(priv->cru,
+					      clk->id, rate);
+		break;
+	case HCLK_EMMC:
+		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
+						clk->id, rate);
+		break;
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_PWM:
+		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
+		break;
+	case SCLK_SARADC:
+		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static struct clk_ops rk3128_clk_ops = {
+	.get_rate	= rk3128_clk_get_rate,
+	.set_rate	= rk3128_clk_set_rate,
+};
+
+static int rk3128_clk_probe(struct udevice *dev)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct rk3128_cru *)dev_read_addr(dev);
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int rk3128_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
+	u32 offset;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
+
+	offset = offsetof(struct rk3128_cru, cru_softrst_con[0]);
+	ret = rockchip_reset_bind(dev, offset, 9);
+	if (ret)
+		debug("Warning: software reset driver bind faile\n");
+
+	return 0;
+}
+
+static const struct udevice_id rk3128_clk_ids[] = {
+	{ .compatible = "rockchip,rk3128-cru" },
+	{ .compatible = "rockchip,rk3126-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3128_cru) = {
+	.name		= "clk_rk3128",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3128_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
+	.ops		= &rk3128_clk_ops,
+	.bind		= rk3128_clk_bind,
+	.probe		= rk3128_clk_probe,
+};
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 1388b44d98..db79ffe3bd 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -627,7 +627,7 @@ static int rk3328_clk_bind(struct udevice *dev)
 		sf_child->priv = sf_priv;
 	}
 
-	return ret;
+	return 0;
 }
 
 static const struct udevice_id rk3328_clk_ids[] = {
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 4a37bc9556..f185215702 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -556,7 +556,7 @@ static int rk3368_clk_bind(struct udevice *dev)
 		sf_child->priv = sf_priv;
 	}
 
-	return ret;
+	return 0;
 }
 
 static const struct udevice_id rk3368_clk_ids[] = {

commit 2acdadc03f793d497034539c156e101b5d5e9bce
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 09:57:39 2017 +0800

    rockchip: rk3036: sdram: correct setting for pll integer mode
    
    According to rk3036 TRM, should be set to '1' for the pll
    integer mode, while the '0' means the frac mode.
    
    Change-Id: Ibd35723d471e3091d8846c700aca128ac5ca0327
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index f59db3dd5f..e6e8bff219 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -333,7 +333,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
 
 	/* use integer mode */
-	rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 
 	rk_clrsetreg(&pll->con0,
 		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,

commit c659cba98404451969fe579cfcf13b5c579928b6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 09:54:39 2017 +0800

    rockchip: rk3036: update clock driver for ddr
    
    After the MASK MACRO update, we need to update the driver at the same time.
    This is a fix to:
    37943aa rockchip: rk3036: clean mask definition for cru reg
    
    Change-Id: I23504454f5df17cff332ca5096928f1079e83bf6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 51b2406dbb..f59db3dd5f 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -329,19 +329,17 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 	struct rk3036_pll *pll = &priv->cru->pll[1];
 
 	/* pll enter slow-mode */
-	rk_clrsetreg(&priv->cru->cru_mode_con,
-		     DPLL_MODE_MASK << DPLL_MODE_SHIFT,
+	rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK,
 		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
 
 	/* use integer mode */
 	rk_clrreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
 
 	rk_clrsetreg(&pll->con0,
-		     PLL_POSTDIV1_MASK << PLL_POSTDIV1_SHIFT | PLL_FBDIV_MASK,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
 		     (dpll_init_cfg.postdiv1 << PLL_POSTDIV1_SHIFT) |
 			dpll_init_cfg.fbdiv);
-	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK << PLL_POSTDIV2_SHIFT |
-			PLL_REFDIV_MASK << PLL_REFDIV_SHIFT,
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
 			(dpll_init_cfg.postdiv2 << PLL_POSTDIV2_SHIFT |
 			 dpll_init_cfg.refdiv << PLL_REFDIV_SHIFT));
 
@@ -350,8 +348,7 @@ static void rkdclk_init(struct rk3036_sdram_priv *priv)
 		rockchip_udelay(1);
 
 	/* PLL enter normal-mode */
-	rk_clrsetreg(&priv->cru->cru_mode_con,
-		     DPLL_MODE_MASK << DPLL_MODE_SHIFT,
+	rk_clrsetreg(&priv->cru->cru_mode_con, DPLL_MODE_MASK,
 		     DPLL_MODE_NORM << DPLL_MODE_SHIFT);
 }
 

commit 5ce558eee1d84a2b85f2bbc4c4547c8ea1c1dae4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Nov 28 09:50:22 2017 +0800

    rockchip: rk3036: fix pll config for correct frequency
    
    There is a fixed div-2 between PLL and clk_ddr/clk_ddrphy,
    so we need to double to pll output and then ddr can work
    in correct frequency.
    
    Change-Id: I53141ddf7679bd6e2f414b2ce0171f8e0df65297
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 460dd6074e..51b2406dbb 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -37,7 +37,7 @@ struct rk3036_sdram_priv {
 /* use integer mode, 396MHz dpll setting
  * refdiv, fbdiv, postdiv1, postdiv2
  */
-const struct pll_div dpll_init_cfg = {1, 50, 3, 1};
+const struct pll_div dpll_init_cfg = {1, 66, 2, 1};
 
 /* 396Mhz ddr timing */
 const struct rk3036_ddr_timing ddr_timing = {0x18c,

commit 4aacf5882fdfd9976f22bb12fc43a39fc826bbe9
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Nov 28 08:42:02 2017 +0800

    rockchip: configs: bnd-d708: enable nand support
    
    Board bnd-d708 uses nand as the system storage,
    so enable nand support here.
    
    Change-Id: Ia56e6c5e47196f45432261b6b895d8b0fdcb1de5
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
index 18afe17745..8801ba6175 100644
--- a/configs/bnd-d708-rk3126_defconfig
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -16,6 +16,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_NAND_BOOT=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
@@ -48,6 +49,7 @@ CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_RKNAND=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2

commit d2f223262266422489b98e8e33a686014c7a5e56
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 27 16:38:06 2017 +0800

    rockchip: blk: add support for rknand and spi
    
    MMC and RKNAND are under blk framework, so they
    can be accessed via blk_dread/dwrite, and the SPI
    Nor Flash is under spi framework, which need to
    accessed by spi_flash_read/write.
    
    Change-Id: Ieaefc571846d29d5ca779c501661378e456fed95
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index c94148a525..f231287f17 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -5,10 +5,23 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <dm.h>
 #include <mmc.h>
+#include <rknand.h>
+#include <spi.h>
+#include <spi_flash.h>
 #include "rockchip_blk.h"
 
-static struct mmc *mmc;
+struct blkdev {
+	int if_type;
+	int devnum;
+	ulong (*write)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer);
+	ulong (*read)(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer);
+	void *priv;
+};
+
+static struct blkdev *blkdev;
 
 struct mmc *mmcblk_dev_init(int dev)
 {
@@ -26,53 +39,146 @@ struct mmc *mmcblk_dev_init(int dev)
 	return mmcdev;
 }
 
-static int mmcblk_read(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+static struct spi_flash *spi_flash_init(int dev)
 {
-	u32 n;
+	struct spi_flash *flash;
+	struct udevice *udev;
+	int ret;
+
+	ret = spi_flash_probe_bus_cs(0, 0, 0, 0, &udev);
+	if (ret) {
+		printf("Failed to initialize SPI flash(error %d)\n", ret);
+		return NULL;
+	}
+
+	flash = dev_get_uclass_priv(udev);
 
-	debug("\nMMC read: block # 0x%x, count 0x%x  to %p... ", blk, cnt, buffer);
+	return flash;
+}
 
-	n = blk_dread(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
+ulong blk_read(struct blkdev* blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
+{
+	struct blk_desc *desc;
+	const char *if_name;
+	ulong n;
 
-	debug("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+	if_name = blk_get_if_type_name(blkdev->if_type);
+	desc = blk_get_dev(if_name, blkdev->devnum);
+	n = blk_dread(desc, start, blkcnt, buffer);
 
-	return (n == cnt) ? 0 : -EIO;
+	return n == blkcnt ? 0 : 1;
 }
 
+ulong blk_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
+{
+	struct blk_desc *desc;
+	const char *if_name;
+	ulong n;
 
-int blkdev_read(void *buffer, u32 blk, u32 cnt)
+	if_name = blk_get_if_type_name(blkdev->if_type);
+	desc = blk_get_dev(if_name, blkdev->devnum);
+	n = blk_dwrite(desc, start, blkcnt, buffer);
+
+	return n == blkcnt ? 0 : 1;
+}
+
+ulong sf_read(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, void *buffer)
 {
-	if (!mmc) {
-		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
-		if (!mmc)
-			return -ENODEV;
+	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
+	u32 offset = start << 9;
+	size_t len = blkcnt << 9;
+
+	return spi_flash_read(flash, offset, len, buffer);
+}
+
+ulong sf_write(struct blkdev *blkdev, lbaint_t start, lbaint_t blkcnt, const void *buffer)
+{
+	struct spi_flash *flash = (struct spi_flash *)blkdev->priv;
+	u32 offset = start << 9;
+	size_t len = blkcnt << 9;
+
+	return spi_flash_write(flash, offset, len, buffer);
+}
+
+static int get_bootdev_if_type(int dev)
+{
+	int if_type;
+
+	switch (dev) {
+	case BOOT_FROM_EMMC:
+		if_type = IF_TYPE_MMC;
+		break;
+	case BOOT_FROM_FLASH:
+		if_type = IF_TYPE_RKNAND;
+		break;
+	default:
+		if_type = dev;
+		break;
 	}
 
-	return mmcblk_read(mmc, buffer, blk, cnt);
+	return if_type;
 }
 
-static int mmcblk_write(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+static struct blkdev *blkdev_init(void)
 {
-	u32 n;
+	struct blkdev *blkdev;
+	int dev;
+	int if_type;
+	void *priv;
+
+
+	dev = get_bootdev_type();
+	if_type = get_bootdev_if_type(dev);
+
+	if (if_type == IF_TYPE_MMC) {
+		priv = mmcblk_dev_init(0);
+	} else if (if_type == IF_TYPE_RKNAND) {
+		priv = (void *)rknand_scan_namespace();
+	} else if (if_type == BOOT_FROM_SPI_NOR) {
+		priv = spi_flash_init(0);
+	}
+
+	blkdev = malloc(sizeof(*blkdev));
+	if (!blkdev) {
+		printf("out of memory for blkdev\n");
+		return NULL;
+	}
 
-	debug("\nMMC write: block # 0x%x, count 0x%x  from %p... ",
-	      blk, cnt, buffer);
+	blkdev->if_type = if_type;
+	blkdev->devnum = 0;
+	blkdev ->priv = priv;
+	if ((if_type == IF_TYPE_MMC) || (if_type == IF_TYPE_RKNAND)) {
+		blkdev->read = blk_read;
+		blkdev->write = blk_write;
+	} else if (if_type == BOOT_FROM_SPI_NOR) {
+		blkdev->read = sf_read;
+		blkdev->write = sf_write;
+	}
 
-	n = blk_dwrite(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
-	debug("%d blocks write: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+	return blkdev;
+}
 
-	return (n == cnt) ? 0 : -EIO;
+int blkdev_read(void *buffer, u32 blk, u32 cnt)
+{
+	if (!blkdev) {
+		blkdev = blkdev_init();
+		if (!blkdev)
+			return -ENODEV;
+	}
+
+	return blkdev->read(blkdev, blk, cnt, buffer);
 }
 
+
 int blkdev_write(void *buffer, u32 blk, u32 cnt)
 {
-	if (!mmc) {
-		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
-		if (!mmc)
+	if (!blkdev) {
+		blkdev = blkdev_init();
+		if (!blkdev)
 			return -ENODEV;
 	}
 
-	return mmcblk_write(mmc, buffer, blk, cnt);
+	return blkdev->write(blkdev, blk, cnt, buffer);
 }
 
 /* Gets the storage type of the current device */
@@ -99,4 +205,3 @@ int get_bootdev_type(void)
 
 	return type;
 }
-

commit a039a64ff13ce49ce6c85d0afdf585d3260b14fb
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 27 11:10:51 2017 +0800

    rockchip: fix a variable typo in function get_bootdev_type
    
    Change-Id: I73d5ac6570eff0a0405f14184dbaadd29ba38a99
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index 0396a83d23..c94148a525 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -87,7 +87,7 @@ int get_bootdev_type(void)
 		type = BOOT_FROM_SPI_NAND;
 	#endif /* CONFIG_QSPI_BOOT */
 	#ifdef CONFIG_NAND_BOOT
-		typpe = BOOT_FROM_FLASH;
+		type = BOOT_FROM_FLASH;
 	#endif /* CONFIG_NAND_BOOT */
 	#ifdef CONFIG_NOR_BOOT
 		type = BOOT_FROM_SPI_NOR;

commit 27e702b6e5f0ea6f7c6ef1dfdfa218216c878d71
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 22 15:22:23 2017 +0800

    rockchip: clk: add compatible for rk3126
    
    kernel dts may use rk3126 or rk3128, sync it to work with kernel dtb.
    
    Change-Id: Id582f403605d3be16ab53f6088f576d90ed5bd1e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 2bd67c7f83..944ccc066f 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -595,6 +595,7 @@ static int rk3128_clk_bind(struct udevice *dev)
 
 static const struct udevice_id rk3128_clk_ids[] = {
 	{ .compatible = "rockchip,rk3128-cru" },
+	{ .compatible = "rockchip,rk3126-cru" },
 	{ }
 };
 

commit 0bb3aadfba8a31a4e4db3b618931243b09cdec9c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 22 15:21:00 2017 +0800

    rockchip: clk: rk3128: update hclk/pclk assert
    
    Update assert compare target, we use BUS_ACLK_HZ instead of GPLL
    
    Change-Id: Ic5acf6f2045e9db45523f2468df74119eb8f23e2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 100f4688dd..2bd67c7f83 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -185,10 +185,10 @@ static void rkclk_init(struct rk3128_cru *cru)
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

commit a25359fbffadc069a38d082ecbe82d7a495b1a92
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Nov 22 15:12:13 2017 +0800

    rockchip: rk3128: update compatible for usb
    
    Use "rockchip,rk3128-usb" for the compatible to both work with
    U-Boot and kernel dts.
    
    Change-Id: Ib6016c3961cbc2793ad49ec1be9466b1da914950
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 7fc4deefdd..c77fbde3be 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -114,7 +114,7 @@ int board_usb_init(int index, enum usb_init_type init)
 
 	/* find the usb_otg node */
 	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3288-usb");
+					"rockchip,rk3128-usb");
 
 	while (node > 0) {
 		mode = fdt_getprop(blob, node, "dr_mode", NULL);

commit b8e90bad40711b5c6772391d5e26733dd40ce9e5
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Fri Nov 24 14:48:15 2017 +0800

    driver: rknand: fix nand driver initialization failure
    
    The nand driver used dma to tranfer data and need flush cache.
    
    Change-Id: I8441621a6d411a45bfaccc0a0c1302da6d900741
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
index dd234e0d3a..0c82460803 100644
--- a/drivers/rknand/rk_ftl_arm_v7.S
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -2525,150 +2525,154 @@ NandcSendDumpDataDone:
 	.thumb_func
 	.type	NandcXferStart, %function
 NandcXferStart:
-	@ args = 8, pretend = 0, frame = 32
+	@ args = 8, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #32
-	ldr	r4, [sp, #68]
-	ldr	r6, [sp, #64]
-	cbnz	r4, .L351
-	adds	r7, r6, #0
+	sub	sp, sp, #24
+	mov	r4, r1
+	ldr	r1, [sp, #60]
+	ldr	r8, [sp, #56]
+	cbnz	r1, .L351
+	adds	r1, r8, #0
 	it	ne
-	movne	r7, #1
+	movne	r1, #1
 	b	.L340
 .L351:
-	movs	r7, #1
+	movs	r1, #1
 .L340:
 	ldr	r5, .L354
-	mov	r8, #16
-	ldr	r4, [r5, r0, lsl #3]
+	mov	ip, #16
+	ldr	r6, [r5, r0, lsl #3]
 	add	r0, r5, r0, lsl #3
-	ldrb	ip, [r0, #4]	@ zero_extendqisi2
-	movs	r0, #0
-	ldr	r5, [r4, #12]
-	bfi	r5, r8, #8, #8
-	bfi	r5, r0, #3, #1
-	bfi	r0, r1, #1, #1
-	bfi	r5, ip, #5, #3
-	orr	r0, r0, #8
-	mov	ip, #1
-	bfi	r0, ip, #5, #2
-	lsr	r3, r3, ip
-	orr	r0, r0, #536870912
-	orr	r0, r0, #1024
-	bfi	r0, r3, #4, #1
+	movs	r5, #0
+	ldrb	r0, [r0, #4]	@ zero_extendqisi2
+	ldr	r7, [r6, #12]
+	bfi	r7, ip, #8, #8
+	bfi	r7, r5, #3, #1
+	bfi	r5, r4, #1, #1
+	bfi	r7, r0, #5, #3
+	orr	r5, r5, #8
+	movs	r0, #1
+	bfi	r5, r0, #5, #2
+	lsr	r3, r3, r0
+	orr	r5, r5, #536870912
+	orr	r5, r5, #1024
+	bfi	r5, r3, #4, #1
 	ldr	r3, .L354+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #3
 	bls	.L341
-	ldr	r3, [r4, #16]
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	ldr	r3, [r6, #16]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
 	bfc	r3, #2, #1
-	str	r3, [sp, #28]
-	cmp	r7, #0
-	beq	.L342
+	str	r3, [sp, #20]
 	cmp	r1, #0
-	beq	.L343
+	beq	.L342
+	cbz	r4, .L343
 	ldr	r3, .L354+8
-	str	r1, [sp, #8]
 	str	r2, [sp, #4]
 	ldr	r3, [r3, #0]
 	cmp	r3, #24
 	ite	hi
 	movhi	r3, #128
 	movls	r3, #64
-	str	r3, [sp, #16]
-	lsr	r3, r2, ip
-	str	r3, [sp, #20]
-	ldr	r3, .L354+12
-	ldr	ip, [sp, #68]
-	ldr	r3, [r3, #4]
+	str	r3, [sp, #8]
+	lsr	r3, r2, r0
 	str	r3, [sp, #12]
+	ldr	r3, .L354+12
+	ldr	r0, [sp, #60]
+	ldr	lr, [r3, #4]
 	movs	r3, #0
-	mov	r7, r3
+	mov	r1, r3
 	b	.L345
 .L348:
-	ldr	r1, [sp, #68]
-	lsr	fp, r3, #2
-	cbz	r1, .L346
-	ldrh	sl, [ip, #2]
-	ldr	r2, [sp, #12]
-	ldrh	r8, [ip], #4
-	orr	r8, r8, sl, lsl #16
-	str	r8, [r2, fp, lsl #2]
+	ldr	r2, [sp, #60]
+	lsr	ip, r3, #2
+	cbz	r2, .L346
+	ldrh	fp, [r0, #2]
+	ldrh	sl, [r0], #4
+	orr	sl, sl, fp, lsl #16
+	str	sl, [lr, ip, lsl #2]
 	b	.L347
 .L346:
-	ldr	r2, [sp, #12]
-	mov	r1, #-1
-	str	r1, [r2, fp, lsl #2]
+	mov	r2, #-1
+	str	r2, [lr, ip, lsl #2]
 .L347:
-	ldr	r1, [sp, #16]
-	adds	r7, r7, #1
-	adds	r3, r3, r1
+	ldr	r2, [sp, #8]
+	adds	r1, r1, #1
+	adds	r3, r3, r2
 .L345:
-	ldr	r2, [sp, #20]
-	cmp	r7, r2
+	ldr	r2, [sp, #12]
+	cmp	r1, r2
 	bcc	.L348
-	ldr	r1, [sp, #8]
 	ldr	r2, [sp, #4]
 .L343:
 	adds	r2, r2, #1
-	ldr	r3, .L354+12
+	ldr	sl, .L354+12
 	asrs	r2, r2, #1
-	bfi	r0, r2, #22, #6
-	cbnz	r6, .L353
-	ldr	r2, [r3, #0]
+	bfi	r5, r2, #22, #6
+	cmp	r8, #0
+	bne	.L353
+	ldr	r0, [sl, #0]
 	b	.L349
 .L353:
-	mov	r2, r6
+	mov	r0, r8
 .L349:
-	ldr	r7, [r3, #4]
-	mov	ip, #1
-	str	r2, [r3, #8]
-	str	ip, [r3, #24]
-	str	r2, [r3, #16]
-	str	r7, [r3, #20]
-	str	r7, [r3, #12]
-	movs	r3, #0
-	str	r2, [r4, #20]
+	ldr	r3, [sl, #4]
+	ubfx	fp, r5, #22, #5
+	str	r0, [sl, #8]
+	add	r1, r0, fp, lsl #10
+	str	r0, [sl, #16]
+	str	r3, [sl, #12]
+	str	r3, [sl, #20]
+	bl	flush_dcache_range
+	ldr	r0, [sl, #12]
+	add	r1, r0, fp, lsl #7
+	bl	flush_dcache_range
+	movs	r3, #1
+	str	r3, [sl, #24]
 	movs	r2, #16
-	str	r7, [r4, #24]
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	ldr	r3, [sl, #16]
+	str	r3, [r6, #20]
+	ldr	r3, [sl, #20]
+	str	r3, [r6, #24]
+	movs	r3, #0
+	str	r3, [sp, #20]
+	tst	r8, #3
+	ldr	r3, [sp, #20]
 	bfi	r3, r2, #9, #5
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
 	orr	r3, r3, #448
-	str	r3, [sp, #28]
-	lsls	r3, r6, #30
+	str	r3, [sp, #20]
 	bne	.L350
-	ldr	r3, [sp, #28]
+	ldr	r3, [sp, #20]
 	movs	r2, #2
 	bfi	r3, r2, #3, #3
-	str	r3, [sp, #28]
+	str	r3, [sp, #20]
 .L350:
-	ldr	r3, [sp, #28]
-	rsbs	r1, r1, #1
+	ldr	r3, [sp, #20]
+	rsbs	r4, r4, #1
 	it	cc
-	movcc	r1, #0
+	movcc	r4, #0
 	orr	r3, r3, #4
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
-	bfi	r3, r1, #1, #1
-	str	r3, [sp, #28]
-	ldr	r3, [sp, #28]
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
+	bfi	r3, r4, #1, #1
+	str	r3, [sp, #20]
+	ldr	r3, [sp, #20]
 	orr	r3, r3, #1
-	str	r3, [sp, #28]
+	str	r3, [sp, #20]
 .L342:
-	ldr	r3, [sp, #28]
-	str	r3, [r4, #16]
+	ldr	r3, [sp, #20]
+	str	r3, [r6, #16]
 .L341:
-	str	r5, [r4, #12]
-	str	r0, [r4, #8]
-	orr	r0, r0, #4
-	str	r0, [r4, #8]
-	add	sp, sp, #32
+	str	r7, [r6, #12]
+	str	r5, [r6, #8]
+	orr	r5, r5, #4
+	str	r5, [r6, #8]
+	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 .L355:
 	.align	2
@@ -2687,77 +2691,91 @@ NandcXferStart:
 NandcXferComp:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L372
+	ldr	r3, .L373
 	push	{r0, r1, r2, r4, r5, lr}
 	ldr	r4, [r3, r0, lsl #3]
-	ldr	r3, .L372+4
+	ldr	r3, .L373+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #3
-	bls	.L368
+	bls	.L369
 	ldr	r2, [r4, #16]
-	lsls	r0, r2, #29
-	bpl	.L368
+	lsls	r2, r2, #29
+	bpl	.L369
 	ldr	r2, [r4, #16]
-	lsls	r1, r2, #30
-	bpl	.L364
+	lsls	r0, r2, #30
+	bpl	.L365
 	ldr	r2, [r4, #8]
 	str	r2, [sp, #0]
-	b	.L371
+	b	.L372
 .L362:
 	cmp	r3, #5
-	bls	.L371
+	bls	.L372
 	ldr	r2, [r4, #0]
 	str	r2, [sp, #4]
 	ldr	r2, [sp, #4]
-	lsls	r2, r2, #18
-	bpl	.L371
+	lsls	r1, r2, #18
+	bpl	.L372
 	ldr	r2, [sp, #4]
-	lsls	r0, r2, #14
+	lsls	r2, r2, #14
 	bmi	.L361
-.L371:
+.L372:
 	ldr	r1, [r4, #28]
 	ldr	r2, [sp, #0]
 	ubfx	r1, r1, #16, #5
 	ubfx	r2, r2, #22, #6
 	cmp	r1, r2
 	blt	.L362
-	b	.L361
-.L364:
+.L361:
+	ldr	r4, .L373+8
+	ldr	r3, [r4, #24]
+	cbz	r3, .L363
+	ldr	r1, [sp, #0]
+	ldr	r0, [r4, #16]
+	ubfx	r1, r1, #22, #5
+	add	r1, r0, r1, lsl #10
+	bl	invalidate_dcache_range
+	ldr	r1, [sp, #0]
+	ldr	r0, [r4, #20]
+	ubfx	r1, r1, #22, #5
+	add	r1, r0, r1, lsl #7
+	bl	invalidate_dcache_range
+	b	.L363
+.L365:
 	ldr	r3, [r4, #8]
 	str	r3, [sp, #0]
 	ldr	r3, [sp, #0]
-	lsls	r1, r3, #11
-	bpl	.L364
-	ldr	r5, .L372+8
+	lsls	r5, r3, #11
+	bpl	.L365
+	ldr	r5, .L373+12
 	ldr	r3, [r5, #0]
-	cbz	r3, .L365
+	cbz	r3, .L366
 	mov	r0, r4
 	bl	NandcSendDumpDataStart
-.L365:
+.L366:
 	ldr	r3, [r5, #0]
-	cbz	r3, .L361
+	cbz	r3, .L363
 	mov	r0, r4
 	bl	NandcSendDumpDataDone
-.L361:
-	ldr	r3, .L372+12
+.L363:
+	ldr	r3, .L373+8
 	movs	r2, #0
 	str	r2, [r3, #24]
 	b	.L356
-.L368:
+.L369:
 	ldr	r3, [r4, #8]
 	str	r3, [sp, #0]
 	ldr	r3, [sp, #0]
-	lsls	r2, r3, #11
-	bpl	.L368
+	lsls	r0, r3, #11
+	bpl	.L369
 .L356:
 	pop	{r1, r2, r3, r4, r5, pc}
-.L373:
+.L374:
 	.align	2
-.L372:
+.L373:
 	.word	.LANCHOR5
 	.word	.LANCHOR37
-	.word	.LANCHOR39
 	.word	.LANCHOR38
+	.word	.LANCHOR39
 	.size	NandcXferComp, .-NandcXferComp
 	.section	.text.NandcCopy1KB,"ax",%progbits
 	.align	1
@@ -2775,14 +2793,14 @@ NandcCopy1KB:
 	ldr	r5, [sp, #16]
 	add	r6, r0, #512
 	add	r2, r2, r4, lsl #9
-	bne	.L375
-	cbz	r3, .L376
+	bne	.L376
+	cbz	r3, .L377
 	mov	r0, r2
 	mov	r1, r3
 	mov	r2, #1024
 	bl	memcpy
-.L376:
-	cbz	r5, .L374
+.L377:
+	cbz	r5, .L375
 	lsrs	r4, r4, #1
 	ldrb	r2, [r5, #1]	@ zero_extendqisi2
 	lsls	r3, r4, #4
@@ -2797,14 +2815,14 @@ NandcCopy1KB:
 	orr	r3, r3, r2, lsl #24
 	str	r3, [r6, r4]
 	pop	{r4, r5, r6, pc}
-.L375:
-	cbz	r3, .L378
+.L376:
+	cbz	r3, .L379
 	mov	r1, r2
 	mov	r0, r3
 	mov	r2, #1024
 	bl	memcpy
-.L378:
-	cbz	r5, .L374
+.L379:
+	cbz	r5, .L375
 	lsrs	r4, r4, #1
 	lsls	r3, r4, #4
 	lsls	r4, r4, #6
@@ -2817,7 +2835,7 @@ NandcCopy1KB:
 	lsrs	r3, r3, #24
 	strb	r2, [r5, #2]
 	strb	r3, [r5, #3]
-.L374:
+.L375:
 	pop	{r4, r5, r6, pc}
 	.size	NandcCopy1KB, .-NandcCopy1KB
 	.section	.text.NandcXferData,"ax",%progbits
@@ -2833,21 +2851,21 @@ NandcXferData:
 	sub	sp, sp, #88
 	mov	r4, r3
 	mov	fp, r3
-	ldr	r3, .L417
+	ldr	r3, .L418
 	mov	r6, r0
 	str	r1, [sp, #12]
 	lsls	r1, r4, #26
 	mov	sl, r2
 	ldr	r5, [sp, #120]
 	ldr	r8, [r3, r0, lsl #3]
-	bne	.L380
-	cbnz	r5, .L381
+	bne	.L381
+	cbnz	r5, .L382
 	add	r0, sp, #20
 	movs	r1, #255
 	movs	r2, #64
 	add	r5, sp, #20
 	bl	memset
-.L381:
+.L382:
 	movs	r3, #0
 	mov	r0, r6
 	ldr	r1, [sp, #12]
@@ -2858,10 +2876,10 @@ NandcXferData:
 	bl	NandcXferComp
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	bne	.L404
-	ldr	r3, .L417+4
+	bne	.L405
+	ldr	r3, .L418+4
 	lsr	r0, sl, #1
-	ldr	r1, .L417+8
+	ldr	r1, .L418+8
 	ldr	r4, [r3, #0]
 	ldr	r3, [sp, #12]
 	cmp	r4, #24
@@ -2869,8 +2887,8 @@ NandcXferData:
 	movhi	r4, #128
 	movls	r4, #64
 	mov	r2, r3
-	b	.L384
-.L385:
+	b	.L385
+.L386:
 	ldr	r7, [r1, #4]
 	lsrs	r3, r3, #2
 	adds	r2, r2, #1
@@ -2884,30 +2902,30 @@ NandcXferData:
 	strb	r3, [r5, #3]
 	adds	r5, r5, #4
 	mov	r3, r6
-.L384:
+.L385:
 	cmp	r2, r0
 	add	r6, r3, r4
-	bcc	.L385
-	ldr	r3, .L417+4
+	bcc	.L386
+	ldr	r3, .L418+4
 	lsr	sl, sl, #2
 	ldr	r0, [r3, #0]
-	ldr	r3, .L417+12
+	ldr	r3, .L418+12
 	ldr	r1, [r3, #0]
 	movs	r3, #0
 	mov	r4, r3
-	b	.L386
-.L392:
+	b	.L387
+.L393:
 	add	r2, r3, #8
 	ldr	r2, [r8, r2, lsl #2]
 	str	r2, [sp, #84]
 	ldr	r2, [sp, #84]
 	lsls	r2, r2, #29
-	bmi	.L407
+	bmi	.L408
 	ldr	r2, [sp, #84]
 	ands	r2, r2, #32768
-	bne	.L407
+	bne	.L408
 	cmp	r1, #5
-	bls	.L388
+	bls	.L389
 	ldr	r7, [sp, #84]
 	ldr	r5, [sp, #84]
 	ldr	r6, [sp, #84]
@@ -2920,19 +2938,19 @@ NandcXferData:
 	orr	r2, r6, r2, lsl #5
 	cmp	r5, r2
 	ldr	r5, [sp, #84]
-	bls	.L389
+	bls	.L390
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #3, #5
 	ubfx	r2, r2, #27, #1
-	b	.L416
-.L389:
+	b	.L417
+.L390:
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #16, #5
 	ubfx	r2, r2, #29, #1
-	b	.L416
-.L388:
+	b	.L417
+.L389:
 	cmp	r1, #3
-	bls	.L390
+	bls	.L391
 	ldr	r7, [sp, #84]
 	ldr	r5, [sp, #84]
 	ldr	r6, [sp, #84]
@@ -2945,45 +2963,45 @@ NandcXferData:
 	orr	r2, r6, r2, lsl #5
 	cmp	r5, r2
 	ldr	r5, [sp, #84]
-	bls	.L391
+	bls	.L392
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #3, #5
 	ubfx	r2, r2, #28, #1
-	b	.L416
-.L391:
+	b	.L417
+.L392:
 	ldr	r2, [sp, #84]
 	ubfx	r5, r5, #16, #5
 	ubfx	r2, r2, #30, #1
-.L416:
+.L417:
 	orr	r2, r5, r2, lsl #5
-.L390:
+.L391:
 	cmp	r4, r2
 	it	cc
 	movcc	r4, r2
-	b	.L387
-.L407:
+	b	.L388
+.L408:
 	mov	r4, #-1
-.L387:
+.L388:
 	adds	r3, r3, #1
-.L386:
+.L387:
 	cmp	r3, sl
-	bcs	.L382
+	bcs	.L383
 	cmp	r0, #0
-	bne	.L392
-	b	.L382
-.L404:
+	bne	.L393
+	b	.L383
+.L405:
 	movs	r4, #0
-.L382:
+.L383:
 	movs	r3, #0
 	str	r3, [r8, #16]
-	b	.L393
-.L380:
+	b	.L394
+.L381:
 	ldr	r3, [sp, #12]
 	mov	r7, #0
 	cmp	r3, #1
-	bne	.L414
-	b	.L394
-.L397:
+	bne	.L415
+	b	.L395
+.L398:
 	cmp	r5, #0
 	ite	ne
 	movne	r3, #2
@@ -3008,12 +3026,12 @@ NandcXferData:
 	mov	r0, r6
 	bl	NandcXferComp
 	add	fp, fp, #1024
-.L394:
+.L395:
 	cmp	r7, sl
-	bcc	.L397
+	bcc	.L398
 	movs	r4, #0
-	b	.L393
-.L414:
+	b	.L394
+.L415:
 	mov	r1, r7
 	movs	r2, #2
 	mov	r3, r7
@@ -3021,15 +3039,15 @@ NandcXferData:
 	str	r7, [sp, #4]
 	mov	r4, r7
 	bl	NandcXferStart
-	b	.L398
-.L402:
+	b	.L399
+.L403:
 	mov	r0, r6
 	bl	NandcXferComp
 	ldr	r3, [r8, #32]
 	add	ip, r7, #2
 	cmp	ip, sl
 	str	r3, [sp, #84]
-	bcs	.L399
+	bcs	.L400
 	movs	r3, #0
 	mov	r0, r6
 	str	r3, [sp, #0]
@@ -3040,10 +3058,10 @@ NandcXferData:
 	str	ip, [sp, #8]
 	bl	NandcXferStart
 	ldr	ip, [sp, #8]
-.L399:
+.L400:
 	ldr	r3, [sp, #84]
-	lsls	r3, r3, #29
-	bmi	.L411
+	lsls	r1, r3, #29
+	bmi	.L412
 	ldr	r2, [sp, #84]
 	ldr	r3, [sp, #84]
 	ubfx	r2, r2, #3, #5
@@ -3052,10 +3070,10 @@ NandcXferData:
 	cmp	r4, r3
 	it	cc
 	movcc	r4, r3
-	b	.L400
-.L411:
+	b	.L401
+.L412:
 	mov	r4, #-1
-.L400:
+.L401:
 	cmp	r5, #0
 	ite	ne
 	movne	r3, #2
@@ -3072,30 +3090,30 @@ NandcXferData:
 	bl	NandcCopy1KB
 	ldr	ip, [sp, #8]
 	mov	r7, ip
-.L398:
+.L399:
 	cmp	r7, sl
-	bcc	.L402
-.L393:
-	ldr	r3, .L417+12
+	bcc	.L403
+.L394:
+	ldr	r3, .L418+12
 	ldr	r3, [r3, #0]
 	cmp	r3, #5
-	bls	.L403
+	bls	.L404
 	ldr	r3, [sp, #12]
-	cbnz	r3, .L403
+	cbnz	r3, .L404
 	ldr	r3, [r8, #0]
 	and	r2, r3, #139264
 	cmp	r2, #139264
-	bne	.L403
+	bne	.L404
 	mov	r4, #-1
 	orr	r3, r3, #131072
 	str	r3, [r8, #0]
-.L403:
+.L404:
 	mov	r0, r4
 	add	sp, sp, #88
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L418:
+.L419:
 	.align	2
-.L417:
+.L418:
 	.word	.LANCHOR5
 	.word	.LANCHOR36
 	.word	.LANCHOR38
@@ -3112,27 +3130,27 @@ FlashProgPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L422
+	ldr	r3, .L423
 	mov	r5, r1
 	mov	r6, r2
 	mov	r4, r0
 	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L420
-	ldr	r3, .L422+4
-	ldr	r2, .L422+8
+	cbnz	r0, .L421
+	ldr	r3, .L423+4
+	ldr	r2, .L423+8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
 	muls	r3, r2, r3
 	cmp	r1, r3
-	bcs	.L420
-	ldr	r3, .L422+12
+	bcs	.L421
+	ldr	r3, .L423+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L421
+	cbnz	r3, .L422
 	subs	r7, r7, #2
-	b	.L420
-.L421:
+	b	.L421
+.L422:
 	movs	r7, #4
-.L420:
+.L421:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -3159,9 +3177,9 @@ FlashProgPage:
 	bl	NandcFlashDeCs
 	and	r0, r5, #1
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L423:
+.L424:
 	.align	2
-.L422:
+.L423:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR2
@@ -3176,36 +3194,36 @@ FlashProgPage:
 FlashPageProgMsbFFData:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L432
+	ldr	r3, .L433
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r2
-	ldr	r2, .L432+4
+	ldr	r2, .L433+4
 	mov	r8, r0
 	ldr	r3, [r3, #0]
 	mov	r7, r1
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
-	cbz	r2, .L425
-	ldr	r2, .L432+8
+	cbz	r2, .L426
+	ldr	r2, .L433+8
 	ldr	r1, [r2, #0]
-	ldr	r2, .L432+12
+	ldr	r2, .L433+12
 	cmp	r1, r2
-	beq	.L424
-.L425:
+	beq	.L425
+.L426:
 	subs	r2, r3, #5
 	cmp	r2, #2
-	bls	.L429
+	bls	.L430
 	cmp	r3, #68
-	beq	.L429
+	beq	.L430
 	cmp	r3, #35
-	beq	.L429
+	beq	.L430
 	cmp	r3, #19
-	bne	.L424
-	b	.L429
-.L430:
+	bne	.L425
+	b	.L430
+.L431:
 	ldrh	r3, [sl, r4, lsl #1]
 	cmp	r3, fp
-	bne	.L424
+	bne	.L425
 	movs	r1, #255
 	mov	r2, #32768
 	ldr	r0, [r5, #0]
@@ -3217,22 +3235,22 @@ FlashPageProgMsbFFData:
 	movs	r3, #0
 	bl	FlashProgPage
 	uxth	r4, r4
-	b	.L431
-.L429:
-	ldr	r6, .L432
+	b	.L432
+.L430:
+	ldr	r6, .L433
 	movw	fp, #65535
-	ldr	sl, .L432+20
-	ldr	r5, .L432+16
-.L431:
+	ldr	sl, .L433+20
+	ldr	r5, .L433+16
+.L432:
 	ldr	r3, [r6, #0]
 	ldrh	r3, [r3, #10]
 	cmp	r3, r4
-	bhi	.L430
-.L424:
+	bhi	.L431
+.L425:
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L433:
+.L434:
 	.align	2
-.L432:
+.L433:
 	.word	.LANCHOR23
 	.word	.LANCHOR7
 	.word	.LANCHOR40
@@ -3251,21 +3269,21 @@ FlashReadRawPage:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r8, r3
-	ldr	r3, .L437
+	ldr	r3, .L438
 	mov	r6, r1
 	mov	r5, r2
 	mov	r4, r0
 	ldrb	r7, [r3, #9]	@ zero_extendqisi2
-	cbnz	r0, .L435
-	ldr	r3, .L437+4
-	ldr	r2, .L437+8
+	cbnz	r0, .L436
+	ldr	r3, .L438+4
+	ldr	r2, .L438+8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
 	muls	r3, r2, r3
 	cmp	r1, r3
 	it	cc
 	movcc	r7, #4
-.L435:
+.L436:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
 	mov	r0, r4
@@ -3286,9 +3304,9 @@ FlashReadRawPage:
 	bl	NandcFlashDeCs
 	mov	r0, r5
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L438:
+.L439:
 	.align	2
-.L437:
+.L438:
 	.word	.LANCHOR18
 	.word	.LANCHOR1
 	.word	.LANCHOR2
@@ -3304,7 +3322,7 @@ HynixReadRetrial:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r2
-	ldr	r2, .L454
+	ldr	r2, .L455
 	mov	r7, r3
 	mov	r6, r0
 	str	r1, [sp, #4]
@@ -3312,7 +3330,7 @@ HynixReadRetrial:
 	mov	r8, #0
 	ldrb	fp, [r2, #2]	@ zero_extendqisi2
 	mov	r5, #-1
-	ldr	r2, .L454+4
+	ldr	r2, .L455+4
 	ldrb	r4, [r3, #12]	@ zero_extendqisi2
 	ldr	r2, [r2, #0]
 	ldrb	r2, [r2, #19]	@ zero_extendqisi2
@@ -3320,10 +3338,10 @@ HynixReadRetrial:
 	it	eq
 	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
 	bl	NandcWaitFlashReady
-	b	.L441
-.L446:
+	b	.L442
+.L447:
 	adds	r4, r4, #1
-	ldr	r2, .L454
+	ldr	r2, .L455
 	mov	r0, r6
 	uxtb	r4, r4
 	cmp	r4, fp
@@ -3339,33 +3357,33 @@ HynixReadRetrial:
 	mov	r2, sl
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
-	beq	.L443
-	ldr	r2, .L454+8
+	beq	.L444
+	ldr	r2, .L455+8
 	cmp	r5, #-1
 	it	eq
 	moveq	r5, r0
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcc	.L452
+	bcc	.L453
 	movs	r7, #0
 	mov	sl, r7
-.L443:
+.L444:
 	add	r8, r8, #1
-.L441:
+.L442:
 	cmp	r8, fp
-	bcc	.L446
-	b	.L445
-.L452:
+	bcc	.L447
+	b	.L446
+.L453:
 	mov	r5, r0
-.L445:
-	ldr	r3, .L454+4
+.L446:
+	ldr	r3, .L455+4
 	ldr	r3, [r3, #0]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	cmp	r3, #7
-	ldr	r3, .L454
+	ldr	r3, .L455
 	add	r6, r3, r6
-	ldr	r3, .L454+8
+	ldr	r3, .L455+8
 	it	eq
 	strbeq	r4, [r6, #20]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
@@ -3373,21 +3391,22 @@ HynixReadRetrial:
 	strbne	r4, [r6, #12]
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bcc	.L449
+	bcc	.L450
 	cmp	r5, #-1
 	ite	eq
 	moveq	r5, #-1
 	movne	r5, #256
-.L449:
+.L450:
 	mov	r0, r5
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L455:
+.L456:
 	.align	2
-.L454:
+.L455:
 	.word	.LANCHOR31
 	.word	.LANCHOR23
 	.word	.LANCHOR29
 	.size	HynixReadRetrial, .-HynixReadRetrial
+	.global	__aeabi_idiv
 	.section	.text.MicronReadRetrial,"ax",%progbits
 	.align	1
 	.global	MicronReadRetrial
@@ -3398,26 +3417,28 @@ MicronReadRetrial:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #24
 	mov	fp, r3
-	ldr	r3, .L470
-	str	r2, [sp, #20]
+	ldr	r3, .L471
 	mov	sl, r0
-	ldr	r2, .L470+4
+	sub	sp, sp, #24
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L471+4
 	str	r1, [sp, #16]
+	str	r2, [sp, #20]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L457
-	add	r3, r3, r3, lsl #1
-	ubfx	r3, r3, #2, #8
-	b	.L469
-.L457:
-	lsrs	r3, r3, #2
-.L469:
+	cbnz	r3, .L458
+	add	r0, r0, r0, lsl #1
+	ubfx	r0, r0, #2, #8
+	b	.L470
+.L458:
+	movs	r1, #3
+	bl	__aeabi_idiv
+	uxtb	r0, r0
+.L470:
+	str	r0, [sp, #12]
 	mov	r0, sl
-	str	r3, [sp, #12]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L470+8
+	ldr	r3, .L471+8
 	mov	r8, #0
 	mov	r4, #-1
 	ldr	r6, [r3, sl, lsl #3]
@@ -3426,8 +3447,8 @@ MicronReadRetrial:
 	adds	r7, r7, #8
 	lsls	r7, r7, #8
 	adds	r5, r6, r7
-	b	.L459
-.L463:
+	b	.L460
+.L464:
 	movs	r2, #239
 	movs	r3, #137
 	str	r2, [r5, #8]
@@ -3448,26 +3469,26 @@ MicronReadRetrial:
 	bl	FlashReadRawPage
 	ldr	ip, [sp, #8]
 	adds	r2, r0, #1
-	beq	.L460
+	beq	.L461
 	ldr	r3, [sp, #12]
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	cmp	r0, r3
-	bcc	.L467
+	bcc	.L468
 	mov	fp, #0
 	str	fp, [sp, #20]
-.L460:
+.L461:
 	mov	r8, ip
-.L459:
-	ldr	r2, .L470+12
+.L460:
+	ldr	r2, .L471+12
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	cmp	r8, r3
-	bcc	.L463
-	b	.L462
-.L467:
+	bcc	.L464
+	b	.L463
+.L468:
 	mov	r4, r0
-.L462:
+.L463:
 	movs	r3, #239
 	movs	r0, #200
 	str	r3, [r5, #8]
@@ -3481,8 +3502,8 @@ MicronReadRetrial:
 	str	r3, [r6, r7]
 	ldr	r3, [sp, #12]
 	cmp	r4, r3
-	bcc	.L464
-	ldr	r0, .L470+16
+	bcc	.L465
+	ldr	r0, .L471+16
 	mov	r1, r8
 	ldr	r2, [sp, #16]
 	mov	r3, r8
@@ -3492,13 +3513,13 @@ MicronReadRetrial:
 	movne	r4, #256
 	str	r4, [sp, #0]
 	bl	printf
-.L464:
+.L465:
 	mov	r0, r4
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L471:
+.L472:
 	.align	2
-.L470:
+.L471:
 	.word	.LANCHOR29
 	.word	.LANCHOR7
 	.word	.LANCHOR5
@@ -3520,7 +3541,7 @@ SamsungReadRetrial:
 	mov	r6, r3
 	mov	fp, r1
 	bl	NandcWaitFlashReady
-	ldr	r3, .L482
+	ldr	r3, .L483
 	movs	r5, #1
 	mov	r4, #-1
 	ldr	r2, [r3, r7, lsl #3]
@@ -3528,8 +3549,8 @@ SamsungReadRetrial:
 	ldrb	sl, [r3, #4]	@ zero_extendqisi2
 	add	sl, sl, #8
 	add	sl, r2, sl, lsl #8
-	b	.L473
-.L477:
+	b	.L474
+.L478:
 	mov	r0, sl
 	uxtb	r1, r5
 	bl	SamsungSetRRPara
@@ -3539,47 +3560,47 @@ SamsungReadRetrial:
 	mov	r3, r6
 	bl	FlashReadRawPage
 	adds	r1, r0, #1
-	beq	.L474
-	ldr	r2, .L482+4
+	beq	.L475
+	ldr	r2, .L483+4
 	cmp	r4, #-1
 	it	eq
 	moveq	r4, r0
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r0, r3, lsr #2
-	bcc	.L480
+	bcc	.L481
 	movs	r6, #0
 	mov	r8, r6
-.L474:
+.L475:
 	adds	r5, r5, #1
-.L473:
-	ldr	r2, .L482+8
+.L474:
+	ldr	r2, .L483+8
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r5, r3
-	bcc	.L477
-	b	.L476
-.L480:
+	bcc	.L478
+	b	.L477
+.L481:
 	mov	r4, r0
-.L476:
+.L477:
 	movs	r1, #0
 	mov	r0, sl
 	bl	SamsungSetRRPara
-	ldr	r3, .L482+4
+	ldr	r3, .L483+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r4, r3, lsr #2
-	bcc	.L478
+	bcc	.L479
 	cmp	r4, #-1
 	ite	eq
 	moveq	r4, #-1
 	movne	r4, #256
-.L478:
+.L479:
 	mov	r0, r4
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L483:
+.L484:
 	.align	2
-.L482:
+.L483:
 	.word	.LANCHOR5
 	.word	.LANCHOR29
 	.word	.LANCHOR42
@@ -3599,69 +3620,69 @@ ToshibaReadRetrial:
 	mov	r8, r3
 	str	r1, [sp, #4]
 	bl	NandcWaitFlashReady
-	ldr	r3, .L506
+	ldr	r3, .L507
 	ldr	r2, [r3, r7, lsl #3]
 	add	r3, r3, r7, lsl #3
 	ldrb	r4, [r3, #4]	@ zero_extendqisi2
-	ldr	r3, .L506+4
+	ldr	r3, .L507+4
 	adds	r4, r4, #8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r4, r2, r4, lsl #8
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bls	.L501
-	ldr	r3, .L506+8
+	bls	.L502
+	ldr	r3, .L507+8
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L502
+	cbz	r3, .L503
 	movs	r0, #0
 	mov	sl, #1
 	bl	NandcSetDdrMode
-	b	.L486
-.L502:
+	b	.L487
+.L503:
 	mov	sl, r3
-.L486:
+.L487:
 	movs	r3, #92
 	str	r3, [r4, #8]
 	movs	r3, #197
 	str	r3, [r4, #8]
-	b	.L485
-.L501:
+	b	.L486
+.L502:
 	mov	sl, #0
-.L485:
+.L486:
 	movs	r6, #1
 	mov	r5, #-1
-	b	.L487
-.L496:
-	ldr	r1, .L506+4
+	b	.L488
+.L497:
+	ldr	r1, .L507+4
 	mov	r0, r4
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
 	uxtb	r1, r6
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L488
+	bhi	.L489
 	bl	SandiskSetRRPara
-	b	.L489
-.L488:
-	bl	ToshibaSetRRPara
+	b	.L490
 .L489:
-	ldr	r2, .L506+4
+	bl	ToshibaSetRRPara
+.L490:
+	ldr	r2, .L507+4
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, #34
-	bne	.L490
-	ldr	r1, .L506+12
+	bne	.L491
+	ldr	r1, .L507+12
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
 	subs	r3, r3, #3
 	cmp	r6, r3
-	bne	.L490
+	bne	.L491
 	movs	r2, #179
 	str	r2, [r4, #8]
-.L490:
+.L491:
 	movs	r3, #38
 	str	r3, [r4, #8]
 	movs	r3, #93
 	str	r3, [r4, #8]
 	cmp	sl, #0
-	beq	.L491
+	beq	.L492
 	movs	r0, #4
 	bl	NandcSetDdrMode
 	ldr	r1, [sp, #4]
@@ -3674,75 +3695,75 @@ ToshibaReadRetrial:
 	str	r3, [sp, #0]
 	bl	NandcSetDdrMode
 	ldr	r3, [sp, #0]
-	b	.L492
-.L491:
+	b	.L493
+.L492:
 	mov	r3, r8
 	mov	r0, r7
 	ldr	r1, [sp, #4]
 	mov	r2, fp
 	bl	FlashReadRawPage
 	mov	r3, r0
-.L492:
+.L493:
 	adds	r0, r3, #1
-	beq	.L493
-	ldr	r1, .L506+16
+	beq	.L494
+	ldr	r1, .L507+16
 	cmp	r5, #-1
 	it	eq
 	moveq	r5, r3
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	add	r2, r2, r2, lsl #1
 	cmp	r3, r2, lsr #2
-	bcc	.L504
+	bcc	.L505
 	mov	r8, #0
 	mov	fp, r8
-.L493:
+.L494:
 	adds	r6, r6, #1
-.L487:
-	ldr	r2, .L506+12
+.L488:
+	ldr	r2, .L507+12
 	ldrb	r3, [r2, #0]	@ zero_extendqisi2
 	adds	r3, r3, #1
 	cmp	r6, r3
-	bcc	.L496
-	b	.L495
-.L504:
+	bcc	.L497
+	b	.L496
+.L505:
 	mov	r5, r3
-.L495:
-	ldr	r3, .L506+4
+.L496:
+	ldr	r3, .L507+4
 	movs	r1, #0
 	mov	r0, r4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	subs	r3, r3, #67
 	cmp	r3, #1
-	bhi	.L497
+	bhi	.L498
 	bl	SandiskSetRRPara
-	b	.L498
-.L497:
-	bl	ToshibaSetRRPara
+	b	.L499
 .L498:
+	bl	ToshibaSetRRPara
+.L499:
 	movs	r3, #255
 	str	r3, [r4, #8]
-	ldr	r3, .L506+16
+	ldr	r3, .L507+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bcc	.L499
+	bcc	.L500
 	cmp	r5, #-1
 	ite	eq
 	moveq	r5, #-1
 	movne	r5, #256
-.L499:
+.L500:
 	mov	r0, r7
 	bl	NandcWaitFlashReady
 	cmp	sl, #0
-	beq	.L500
+	beq	.L501
 	movs	r0, #4
 	bl	NandcSetDdrMode
-.L500:
+.L501:
 	mov	r0, r5
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L507:
+.L508:
 	.align	2
-.L506:
+.L507:
 	.word	.LANCHOR5
 	.word	.LANCHOR11
 	.word	.LANCHOR35
@@ -3760,14 +3781,14 @@ FlashSavePhyInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r5, #0
-	ldr	r7, .L515
-	ldr	r8, .L515+60
-	ldr	sl, .L515+64
+	ldr	r7, .L516
+	ldr	r8, .L516+60
+	ldr	sl, .L516+64
 	ldr	r3, [r7, #0]
-	ldr	fp, .L515+48
-	ldr	r6, .L515+4
+	ldr	fp, .L516+48
+	ldr	r6, .L516+4
 	str	r3, [r8, #0]
-	ldr	r3, .L515+8
+	ldr	r3, .L516+8
 	ldrb	r0, [r3, #0]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r1, #0
@@ -3775,43 +3796,43 @@ FlashSavePhyInfo:
 	ldr	r0, [r7, #0]
 	bl	memset
 	ldr	r0, [r8, #0]
-	ldr	r3, .L515+12
+	ldr	r3, .L516+12
 	movs	r2, #32
-	ldr	r1, .L515+16
+	ldr	r1, .L516+16
 	str	sl, [r0, #0]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r0, #12]	@ movhi
-	ldr	r3, .L515+20
+	ldr	r3, .L516+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r0, #14]	@ movhi
-	ldr	r3, .L515+24
+	ldr	r3, .L516+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	str	r3, [r0, #1076]
 	adds	r0, r0, #16
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+28
+	ldr	r1, .L516+28
 	movs	r2, #8
 	adds	r0, r0, #80
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+32
+	ldr	r1, .L516+32
 	movs	r2, #32
 	adds	r0, r0, #96
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+36
+	ldr	r1, .L516+36
 	movs	r2, #32
 	adds	r0, r0, #160
 	bl	memcpy
 	ldr	r0, [r8, #0]
-	ldr	r1, .L515+40
+	ldr	r1, .L516+40
 	movs	r2, #32
 	adds	r0, r0, #192
 	bl	memcpy
 	ldr	r0, [r8, #0]
 	mov	r2, #852
-	ldr	r1, .L515+44
+	ldr	r1, .L516+44
 	adds	r0, r0, #224
 	bl	memcpy
 	ldr	r4, [r8, #0]
@@ -3826,7 +3847,7 @@ FlashSavePhyInfo:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
 	mov	r4, r5
-.L511:
+.L512:
 	movs	r0, #0
 	ldr	r1, [r6, #0]
 	mov	r2, r0
@@ -3845,7 +3866,7 @@ FlashSavePhyInfo:
 	ldr	r2, [r7, #0]
 	adds	r1, r1, #1
 	bl	FlashProgPage
-	ldr	r3, .L515+48
+	ldr	r3, .L516+48
 	movs	r0, #0
 	ldr	r1, [r6, #0]
 	muls	r1, r4, r1
@@ -3853,32 +3874,32 @@ FlashSavePhyInfo:
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L509
+	beq	.L510
 	ldr	fp, [r8, #0]
 	ldr	r3, [fp, #0]
 	cmp	r3, sl
-	bne	.L509
+	bne	.L510
 	add	r0, fp, #12
 	movw	r1, #2036
 	bl	JSHash
 	ldr	r3, [fp, #8]
 	cmp	r3, r0
-	bne	.L509
-	ldr	r3, .L515+52
+	bne	.L510
+	ldr	r3, .L516+52
 	adds	r2, r4, #1
 	adds	r5, r5, #1
 	str	r2, [r3, #0]
-	ldr	r3, .L515+56
+	ldr	r3, .L516+56
 	ldr	r2, [r6, #0]
 	muls	r2, r4, r2
 	cmp	r5, #1
 	str	r2, [r3, #0]
-	bhi	.L510
-.L509:
+	bhi	.L511
+.L510:
 	adds	r4, r4, #1
 	cmp	r4, #4
-	bne	.L511
-.L510:
+	bne	.L512
+.L511:
 	movs	r0, #0
 	bl	flash_exit_slc_mode
 	cmp	r5, #0
@@ -3886,9 +3907,9 @@ FlashSavePhyInfo:
 	moveq	r0, #-1
 	movne	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L516:
+.L517:
 	.align	2
-.L515:
+.L516:
 	.word	.LANCHOR44
 	.word	.LANCHOR2
 	.word	.LANCHOR45
@@ -3919,37 +3940,37 @@ FlashReadIdbDataRaw:
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r2, #4
 	mov	r8, r0
-	ldr	r1, .L528
+	ldr	r1, .L529
 	add	r0, sp, #12
 	bl	memcpy
-	ldr	r3, .L528+4
+	ldr	r3, .L529+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	str	r3, [sp, #4]
-	ldr	r3, .L528+8
+	ldr	r3, .L529+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L528+12
+	ldr	r3, .L529+12
 	cmp	r2, r3
-	bne	.L518
+	bne	.L519
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-.L518:
+.L519:
 	mov	r0, r8
 	movs	r1, #0
 	mov	r2, #2048
 	mov	r7, #-1
 	bl	memset
 	movs	r4, #2
-	ldr	sl, .L528+32
-	ldr	fp, .L528+36
-	ldr	r6, .L528+16
-	b	.L519
-.L526:
+	ldr	sl, .L529+32
+	ldr	fp, .L529+36
+	ldr	r6, .L529+16
+	b	.L520
+.L527:
 	movs	r5, #0
-.L521:
+.L522:
 	add	r3, sp, #12
 	ldrb	r0, [r3, r5]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r3, .L528+16
+	ldr	r3, .L529+16
 	movs	r0, #0
 	ldr	r1, [fp, #0]
 	muls	r1, r4, r1
@@ -3957,19 +3978,19 @@ FlashReadIdbDataRaw:
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L520
+	bne	.L521
 	adds	r5, r5, #1
 	cmp	r5, #4
-	bne	.L521
-	b	.L522
-.L520:
+	bne	.L522
+	b	.L523
+.L521:
 	ldr	r3, [r6, #0]
 	ldr	r2, [r3, #0]
-	ldr	r3, .L528+20
+	ldr	r3, .L529+20
 	cmp	r2, r3
-	bne	.L522
+	bne	.L523
 	add	r3, sp, #16
-	ldr	r0, .L528+24
+	ldr	r0, .L529+24
 	adds	r5, r3, r5
 	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
 	bl	printf
@@ -3980,39 +4001,39 @@ FlashReadIdbDataRaw:
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #512]
 	strb	r3, [sl, #0]
-	ldr	r3, .L528+28
+	ldr	r3, .L529+28
 	ldr	r2, [r3, #0]
 	cmp	r2, r4
-	bls	.L525
+	bls	.L526
 	str	r4, [r3, #0]
 	movs	r7, #0
 	bl	FlashSavePhyInfo
-.L522:
+.L523:
 	adds	r4, r4, #1
-.L519:
+.L520:
 	ldrb	r3, [sl, #0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L526
-	b	.L523
-.L525:
+	bcc	.L527
+	b	.L524
+.L526:
 	movs	r7, #0
-.L523:
+.L524:
 	ldr	r0, [sp, #4]
 	bl	FlashBchSel
-	ldr	r3, .L528+8
+	ldr	r3, .L529+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L528+12
+	ldr	r3, .L529+12
 	cmp	r2, r3
-	bne	.L524
+	bne	.L525
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-.L524:
+.L525:
 	mov	r0, r7
 	add	sp, sp, #16
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L529:
+.L530:
 	.align	2
-.L528:
+.L529:
 	.word	.LANCHOR48
 	.word	.LANCHOR29
 	.word	.LANCHOR40
@@ -4035,25 +4056,25 @@ FlashLoadPhyInfo:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r2, #4
-	ldr	sl, .L542+40
+	ldr	sl, .L543+40
 	add	r0, sp, #12
-	ldr	r1, .L542
+	ldr	r1, .L543
 	movs	r4, #0
 	bl	memcpy
-	ldr	r5, .L542+4
+	ldr	r5, .L543+4
 	ldr	r3, [sl, #0]
 	mov	r0, r4
-	ldr	r6, .L542+8
+	ldr	r6, .L543+8
 	mov	r8, #4
 	mov	r7, #-1
 	str	r3, [r5, #0]
-	ldr	r3, .L542+12
+	ldr	r3, .L543+12
 	ldrh	r2, [r6, #10]
 	str	r4, [r3, #0]
 	str	r2, [sp, #4]
 	bl	flash_enter_slc_mode
-	b	.L531
-.L533:
+	b	.L532
+.L534:
 	add	r3, sp, #12
 	ldrb	r0, [r3, r6]	@ zero_extendqisi2
 	bl	FlashBchSel
@@ -4063,96 +4084,96 @@ FlashLoadPhyInfo:
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L532
+	bne	.L533
 	movs	r0, #0
 	mov	r1, fp
 	ldr	r2, [sl, #0]
 	mov	r3, r0
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	bne	.L532
+	bne	.L533
 	adds	r6, r6, #1
 	cmp	r6, #4
-	beq	.L534
-	b	.L533
-.L532:
+	beq	.L535
+	b	.L534
+.L533:
 	ldr	r6, [r5, #0]
-	ldr	r2, .L542+16
+	ldr	r2, .L543+16
 	ldr	r3, [r6, #0]
 	cmp	r3, r2
-	bne	.L534
-	cbnz	r7, .L535
-	ldr	r3, .L542+8
+	bne	.L535
+	cbnz	r7, .L536
+	ldr	r3, .L543+8
 	mov	r0, r4
 	ldrh	r1, [r3, #10]
 	bl	__aeabi_uidiv
-	ldr	r3, .L542+20
+	ldr	r3, .L543+20
 	adds	r0, r0, #1
 	str	r0, [r3, #0]
 	mov	r0, r7
-	b	.L541
-.L535:
+	b	.L542
+.L536:
 	add	r0, r6, #12
 	movw	r1, #2036
 	bl	JSHash
 	ldr	r3, [r6, #8]
 	cmp	r3, r0
-	bne	.L534
+	bne	.L535
 	add	r1, r6, #160
 	movs	r2, #32
-	ldr	r0, .L542+8
+	ldr	r0, .L543+8
 	bl	memcpy
 	ldr	r1, [r5, #0]
 	movs	r2, #32
-	ldr	r0, .L542+24
+	ldr	r0, .L543+24
 	adds	r1, r1, #192
 	bl	memcpy
 	ldr	r1, [r5, #0]
 	mov	r2, #852
-	ldr	r0, .L542+28
+	ldr	r0, .L543+28
 	adds	r1, r1, #224
 	bl	memcpy
 	ldr	r6, [r5, #0]
-	ldr	r3, .L542+32
+	ldr	r3, .L543+32
 	mov	r0, r4
 	ldr	r2, [r6, #1076]
 	strb	r2, [r3, #0]
-	ldr	r3, .L542+12
+	ldr	r3, .L543+12
 	str	r4, [r3, #0]
-	ldr	r3, .L542+8
+	ldr	r3, .L543+8
 	ldrh	r1, [r3, #10]
 	bl	__aeabi_uidiv
-	ldr	r3, .L542+20
+	ldr	r3, .L543+20
 	adds	r0, r0, #1
 	str	r0, [r3, #0]
 	cmp	r0, #1
-	bne	.L537
+	bne	.L538
 	movs	r2, #2
 	str	r2, [r3, #0]
-.L537:
+.L538:
 	ldrh	r2, [r6, #14]
 	movs	r7, #0
-	ldr	r3, .L542+36
+	ldr	r3, .L543+36
 	strb	r2, [r3, #0]
-.L534:
+.L535:
 	ldr	r2, [sp, #4]
 	subs	r8, r8, #1
 	add	r4, r4, r2
-	beq	.L538
-.L531:
+	beq	.L539
+.L532:
 	add	fp, r4, #1
 	movs	r6, #0
-	b	.L533
-.L538:
+	b	.L534
+.L539:
 	mov	r0, r8
-.L541:
+.L542:
 	bl	flash_exit_slc_mode
 	mov	r0, r7
 	add	sp, sp, #16
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L543:
+.L544:
 	.align	2
-.L542:
+.L543:
 	.word	.LANCHOR48
 	.word	.LANCHOR43
 	.word	.LANCHOR18
@@ -4176,7 +4197,7 @@ FlashDdrTunningRead:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r3
-	ldr	r3, .L564
+	ldr	r3, .L565
 	sub	sp, sp, #24
 	mov	fp, r2
 	str	r0, [sp, #8]
@@ -4184,16 +4205,16 @@ FlashDdrTunningRead:
 	str	r1, [sp, #12]
 	ldr	r3, [r3, #304]
 	str	r3, [sp, #20]
-	ldr	r3, .L564+4
+	ldr	r3, .L565+4
 	ldr	r7, [r3, #0]
 	ldr	r3, [sp, #56]
 	cmp	r7, #7
 	ite	hi
 	movhi	r7, #12
 	movls	r7, #6
-	cbz	r3, .L556
+	cbz	r3, .L557
 	movs	r0, #1
-	ldr	r4, .L564+8
+	ldr	r4, .L565+8
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
@@ -4210,31 +4231,31 @@ FlashDdrTunningRead:
 	ldrb	r0, [r4, #0]	@ zero_extendqisi2
 	bl	NandcSetMode
 	cmp	r8, #-1
-	beq	.L547
+	beq	.L548
 	mov	r2, r8
-	ldr	r0, .L564+12
+	ldr	r0, .L565+12
 	ldr	r1, [sp, #12]
 	bl	printf
-	ldr	r3, .L564+16
+	ldr	r3, .L565+16
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
 	cmp	r2, #2048
-	bcc	.L547
+	bcc	.L548
 	movs	r2, #0
 	str	r2, [r3, #0]
 	mov	sl, r2
 	mov	fp, r2
-	b	.L546
-.L556:
+	b	.L547
+.L557:
 	mov	r8, #1024
-.L546:
+.L547:
 	movs	r4, #0
 	mov	r6, #-1
 	mov	ip, r4
 	mov	r5, r4
 	str	r4, [sp, #16]
-.L552:
+.L553:
 	uxtb	r0, r7
 	str	ip, [sp, #4]
 	bl	NandcSetDdrPara
@@ -4246,71 +4267,71 @@ FlashDdrTunningRead:
 	add	r3, r8, #1
 	ldr	ip, [sp, #4]
 	cmp	r0, r3
-	bhi	.L548
+	bhi	.L549
 	cmp	r0, #2
-	bhi	.L558
+	bhi	.L559
 	adds	r5, r5, #1
 	cmp	r5, #9
-	bls	.L558
+	bls	.L559
 	subs	r4, r7, r5
 	mov	r8, r0
 	movs	r6, #0
-	b	.L550
-.L548:
+	b	.L551
+.L549:
 	cmp	ip, r5
-	bcs	.L559
+	bcs	.L560
 	cmp	r5, #7
 	rsb	r3, r5, r4
 	str	r3, [sp, #16]
-	bhi	.L551
+	bhi	.L552
 	mov	ip, r5
-	b	.L559
-.L558:
+	b	.L560
+.L559:
 	movs	r6, #0
 	mov	r4, r7
 	mov	r8, r0
 	mov	sl, r6
 	mov	fp, r6
-	b	.L549
-.L559:
+	b	.L550
+.L560:
 	movs	r5, #0
-.L549:
+.L550:
 	adds	r7, r7, #2
 	cmp	r7, #69
-	bls	.L552
-.L550:
-	cmp	ip, r5
-	bcc	.L553
+	bls	.L553
 .L551:
+	cmp	ip, r5
+	bcc	.L554
+.L552:
 	ldr	r4, [sp, #16]
-.L553:
-	cbz	r4, .L554
-	ldr	r0, .L564+20
+.L554:
+	cbz	r4, .L555
+	ldr	r0, .L565+20
 	mov	r1, r4
 	bl	printf
 	uxtb	r0, r4
 	bl	NandcSetDdrPara
-.L554:
-	cbz	r6, .L547
-	ldr	r0, .L564+24
+.L555:
+	cbz	r6, .L548
+	ldr	r0, .L565+24
 	ldr	r1, [sp, #8]
 	ldr	r2, [sp, #12]
 	bl	printf
 	ldr	r3, [sp, #56]
-	cbz	r3, .L561
+	cbz	r3, .L562
 	ldr	r3, [sp, #20]
 	ubfx	r0, r3, #8, #8
 	bl	NandcSetDdrPara
-	b	.L547
-.L561:
+	b	.L548
+.L562:
 	mov	r8, r6
-.L547:
+.L548:
 	mov	r0, r8
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L565:
+.L566:
 	.align	2
-.L564:
+.L565:
 	.word	.LANCHOR30
 	.word	.LANCHOR37
 	.word	.LANCHOR34
@@ -4330,7 +4351,7 @@ FlashDdrParaScan:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
-	ldr	r5, .L571
+	ldr	r5, .L572
 	movs	r4, #0
 	mov	r7, r1
 	ldrb	r0, [r5, #0]	@ zero_extendqisi2
@@ -4350,29 +4371,29 @@ FlashDdrParaScan:
 	mov	r0, r6
 	bl	FlashReadRawPage
 	adds	r0, r0, #1
-	beq	.L567
+	beq	.L568
 	cmp	r8, #-1
-	bne	.L568
-.L567:
+	bne	.L569
+.L568:
 	ldrb	r3, [r5, #0]	@ zero_extendqisi2
 	lsls	r3, r3, #31
-	bpl	.L568
+	bpl	.L569
 	movs	r0, #1
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
 	movs	r2, #0
-	b	.L570
-.L568:
+	b	.L571
+.L569:
 	movs	r2, #1
-.L570:
-	ldr	r3, .L571+4
+.L571:
+	ldr	r3, .L572+4
 	movs	r0, #0
 	strb	r2, [r3, #0]
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L572:
+.L573:
 	.align	2
-.L571:
+.L572:
 	.word	.LANCHOR34
 	.word	.LANCHOR35
 	.size	FlashDdrParaScan, .-FlashDdrParaScan
@@ -4393,11 +4414,11 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	adds	r3, r0, #1
 	mov	r4, r0
-	bne	.L574
-	ldr	r6, .L579
+	bne	.L575
+	ldr	r6, .L580
 	ldrb	fp, [r6, #0]	@ zero_extendqisi2
 	cmp	fp, #0
-	beq	.L575
+	beq	.L576
 	movs	r3, #0
 	mov	r0, r5
 	strb	r3, [r6, #0]
@@ -4407,12 +4428,12 @@ FlashReadPage:
 	bl	FlashReadRawPage
 	strb	fp, [r6, #0]
 	adds	r6, r0, #1
-	bne	.L578
-.L575:
-	ldr	r3, .L579+4
+	bne	.L579
+.L576:
+	ldr	r3, .L580+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L574
-	ldr	r3, .L579+8
+	cbz	r3, .L575
+	ldr	r3, .L580+8
 	mov	r0, r5
 	mov	r1, r7
 	mov	r2, r8
@@ -4424,23 +4445,23 @@ FlashReadPage:
 	bl	FlashDdrTunningRead
 	mov	r4, r0
 	adds	r0, r0, #1
-	beq	.L576
-	ldr	r3, .L579+12
+	beq	.L577
+	ldr	r3, .L580+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r4, r3, lsr #1
-	bls	.L574
-.L576:
+	bls	.L575
+.L577:
 	ubfx	r0, r6, #8, #8
 	bl	NandcSetDdrPara
-	b	.L574
-.L578:
+	b	.L575
+.L579:
 	mov	r4, r0
-.L574:
-	ldr	fp, .L579+24
+.L575:
+	ldr	fp, .L580+24
 	ldr	r6, [fp, #0]
-	cbz	r6, .L577
+	cbz	r6, .L578
 	adds	r1, r4, #1
-	bne	.L577
+	bne	.L578
 	mov	r1, r7
 	mov	r2, r8
 	mov	r3, sl
@@ -4449,14 +4470,14 @@ FlashReadPage:
 	mov	r2, r5
 	mov	r3, r7
 	mov	r4, r0
-	ldr	r0, .L579+16
+	ldr	r0, .L580+16
 	mov	r1, r4
 	bl	printf
 	adds	r2, r4, #1
-	bne	.L577
-	ldr	r3, .L579+20
+	bne	.L578
+	ldr	r3, .L580+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L577
+	cbz	r3, .L578
 	mov	r0, r5
 	bl	flash_enter_slc_mode
 	ldr	r4, [fp, #0]
@@ -4466,12 +4487,14 @@ FlashReadPage:
 	mov	r3, sl
 	blx	r4
 	mov	r4, r0
-.L577:
+	mov	r0, r5
+	bl	flash_exit_slc_mode
+.L578:
 	mov	r0, r4
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L580:
+.L581:
 	.align	2
-.L579:
+.L580:
 	.word	.LANCHOR4
 	.word	.LANCHOR35
 	.word	.LANCHOR30
@@ -4492,14 +4515,14 @@ Ftl_log2:
 	@ link register save eliminated.
 	movs	r2, #1
 	movs	r3, #0
-	b	.L582
-.L583:
+	b	.L583
+.L584:
 	adds	r3, r3, #1
 	lsls	r2, r2, #1
 	uxth	r3, r3
-.L582:
+.L583:
 	cmp	r2, r0
-	bls	.L583
+	bls	.L584
 	subs	r3, r3, #1
 	uxth	r0, r3
 	bx	lr
@@ -4526,31 +4549,31 @@ FtlSysBlkNumInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L588
+	ldr	r3, .L589
 	cmp	r0, #23
 	it	ls
 	movls	r0, #24
-	ldr	r2, .L588+4
+	ldr	r2, .L589+4
 	str	r0, [r3, #0]
-	ldr	r3, .L588+8
+	ldr	r3, .L589+8
 	ldrh	r3, [r3, #0]
 	muls	r3, r0, r3
 	str	r3, [r2, #0]
-	ldr	r2, .L588+12
+	ldr	r2, .L589+12
 	ldrh	r2, [r2, #0]
 	subs	r0, r2, r0
-	ldr	r2, .L588+16
+	ldr	r2, .L589+16
 	strh	r0, [r2, #0]	@ movhi
 	movs	r0, #0
-	ldr	r2, .L588+20
+	ldr	r2, .L589+20
 	ldr	r2, [r2, #0]
 	subs	r3, r2, r3
-	ldr	r2, .L588+24
+	ldr	r2, .L589+24
 	str	r3, [r2, #0]
 	bx	lr
-.L589:
+.L590:
 	.align	2
-.L588:
+.L589:
 	.word	.LANCHOR52
 	.word	.LANCHOR54
 	.word	.LANCHOR53
@@ -4559,7 +4582,6 @@ FtlSysBlkNumInit:
 	.word	.LANCHOR58
 	.word	.LANCHOR57
 	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
-	.global	__aeabi_idiv
 	.section	.text.FtlConstantsInit,"ax",%progbits
 	.align	1
 	.global	FtlConstantsInit
@@ -4573,29 +4595,29 @@ FtlConstantsInit:
 	mov	r4, r0
 	ldrh	r7, [r0, #8]
 	sub	sp, sp, #32
-	ldr	r3, .L605
+	ldr	r3, .L607
 	ldrh	r1, [r0, #10]
 	ldrh	r0, [r0, #12]
 	strh	r7, [r3, #0]	@ movhi
-	ldr	r3, .L605+4
+	ldr	r3, .L607+4
 	ldrh	ip, [r4, #14]
-	ldr	r2, .L605+8
+	ldr	r2, .L607+8
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L605+12
+	ldr	r3, .L607+12
 	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L605+16
+	ldr	r3, .L607+16
 	strh	ip, [r3, #0]	@ movhi
 	movs	r3, #0
-.L591:
+.L592:
 	strb	r3, [r3, r2]
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L591
+	bne	.L592
 	ldrh	r2, [r4, #14]
 	ldrh	r3, [r4, #20]
 	cmp	r3, r2, lsr #8
-	bcs	.L592
-	ldr	r3, .L605+8
+	bcs	.L593
+	ldr	r3, .L607+8
 	uxtb	sl, r0
 	movs	r2, #0
 	subs	r6, r3, r0
@@ -4607,8 +4629,8 @@ FtlConstantsInit:
 	rsb	r5, r8, #0
 	uxtb	r5, r5
 	str	r6, [sp, #28]
-	b	.L593
-.L594:
+	b	.L594
+.L595:
 	ldr	r2, [sp, #12]
 	add	fp, r6, r5
 	add	lr, lr, #1
@@ -4617,8 +4639,8 @@ FtlConstantsInit:
 	add	fp, r6, r2
 	ldr	r2, [sp, #16]
 	strb	fp, [r2, r3]
-	b	.L595
-.L603:
+	b	.L596
+.L605:
 	ldr	fp, [sp, #24]
 	movs	r3, #0
 	mov	r6, r3
@@ -4631,77 +4653,77 @@ FtlConstantsInit:
 	str	fp, [sp, #16]
 	add	fp, r5, sl
 	str	fp, [sp, #20]
-.L595:
+.L596:
 	add	r6, r6, r8
 	cmp	lr, r1
 	add	r3, r3, r0
 	uxtb	r6, r6
-	bcc	.L594
+	bcc	.L595
 	ldr	r2, [sp, #4]
 	adds	r5, r5, #1
 	adds	r2, r2, #1
 	uxtb	r5, r5
-.L593:
+.L594:
 	cmp	r2, r0
-	bcc	.L603
-	ldr	r3, .L605+4
+	bcc	.L605
+	ldr	r3, .L607+4
 	lsls	r1, r1, #1
 	lsr	ip, ip, #1
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L605+16
+	ldr	r3, .L607+16
 	strh	ip, [r3, #0]	@ movhi
-.L592:
-	ldr	r3, .L605+20
+.L593:
+	ldr	r3, .L607+20
 	movs	r2, #5
 	movs	r1, #0
 	cmp	r7, #1
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L605+24
+	ldr	r2, .L607+24
 	it	eq
 	strheq	r7, [r3, #0]	@ movhi
-	ldr	r3, .L605+28
+	ldr	r3, .L607+28
 	strh	r1, [r2, #0]	@ movhi
 	mov	r2, #4352
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r2, .L605+32
+	ldr	r2, .L607+32
 	ldrb	r8, [r2, #0]	@ zero_extendqisi2
 	cmp	r8, #0
-	beq	.L597
+	beq	.L598
 	mov	r2, #384
 	strh	r2, [r3, #0]	@ movhi
-.L597:
-	ldr	r3, .L605+4
+.L598:
+	ldr	r3, .L607+4
 	ldrh	r5, [r3, #0]
 	muls	r5, r0, r5
-	ldr	r3, .L605+36
+	ldr	r3, .L607+36
 	uxth	r5, r5
 	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L605+16
+	ldr	r3, .L607+16
 	ldrh	r6, [r3, #0]
 	muls	r0, r6, r0
-	ldr	r3, .L605+40
+	ldr	r3, .L607+40
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	bl	Ftl_log2
-	ldr	r3, .L605+44
+	ldr	r3, .L607+44
 	ldrh	fp, [r4, #16]
 	ldrh	r1, [r4, #18]
 	ldrh	sl, [r4, #20]
 	mul	r2, fp, r5
 	strh	r0, [r3, #0]	@ movhi
 	mov	r0, sl
-	ldr	r3, .L605+48
+	ldr	r3, .L607+48
 	strh	fp, [r3, #0]	@ movhi
-	ldr	r3, .L605+52
+	ldr	r3, .L607+52
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L605+56
+	ldr	r3, .L607+56
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L605+60
+	ldr	r3, .L607+60
 	strh	sl, [r3, #0]	@ movhi
 	str	r1, [sp, #8]
 	bl	Ftl_log2
-	ldr	r3, .L605+64
-	ldr	r2, .L605+68
+	ldr	r3, .L607+64
+	ldr	r2, .L607+68
 	ldr	r1, [sp, #8]
 	mul	r1, r1, sl
 	strh	r0, [r3, #0]	@ movhi
@@ -4709,26 +4731,26 @@ FtlConstantsInit:
 	mov	r7, r0
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L605+72
+	ldr	r2, .L607+72
 	lsrs	r3, r3, #8
 	cmp	r6, #1024
 	strh	r3, [r2, #0]	@ movhi
 	ldrh	r2, [r4, #26]
-	ldr	r3, .L605+76
-	ldr	r4, .L605+28
+	ldr	r3, .L607+76
+	ldr	r4, .L607+28
 	strh	r2, [r3, #0]	@ movhi
 	mul	r2, r6, r5
-	ldr	r3, .L605+80
+	ldr	r3, .L607+80
 	ldrh	r0, [r4, #0]
 	str	r2, [r3, #0]
 	it	hi
 	uxtbhi	r2, r6
-	ldr	r3, .L605+24
+	ldr	r3, .L607+24
 	it	hi
 	strhhi	r2, [r3, #0]	@ movhi
 	lsls	r0, r0, #3
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L605+84
+	ldr	r3, .L607+84
 	subs	r2, r6, r2
 	muls	r2, r5, r2
 	mul	r2, sl, r2
@@ -4736,92 +4758,109 @@ FtlConstantsInit:
 	asr	r2, fp, #11
 	str	r2, [r3, #0]
 	bl	__aeabi_idiv
-	ldr	r3, .L605+88
+	ldr	r3, .L607+88
 	uxth	r0, r0
 	strh	r0, [r3, #0]	@ movhi
 	cmp	r0, #4
-	bhi	.L599
+	bhi	.L600
 	movs	r2, #4
 	strh	r2, [r3, #0]	@ movhi
-.L599:
+.L600:
 	cmp	r8, #0
-	beq	.L600
+	beq	.L601
 	mov	r3, #640
 	strh	r3, [r4, #0]	@ movhi
-.L600:
+.L601:
 	ldrh	r2, [r4, #0]
 	lsls	r6, r6, #6
-	ldr	r3, .L605+92
+	ldr	r3, .L607+92
 	mov	r1, r5
-	ldr	r4, .L605+96
+	ldr	r4, .L607+96
 	asr	r2, r2, r7
 	adds	r7, r7, #9
 	asr	r6, r6, r7
 	adds	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
 	uxth	r6, r6
-	ldr	r3, .L605+100
+	ldr	r3, .L607+100
 	mul	r2, r5, r6
 	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L605+104
+	ldr	r3, .L607+104
 	adds	r6, r6, #8
 	str	r2, [r3, #0]
-	ldr	r3, .L605+88
+	ldr	r3, .L607+88
 	ldrh	r0, [r3, #0]
 	bl	__aeabi_uidiv
 	cmp	r5, #1
 	uxtah	r6, r6, r0
 	str	r6, [r4, #0]
-	bne	.L601
+	bne	.L602
 	adds	r6, r6, #4
 	str	r6, [r4, #0]
-.L601:
+.L602:
 	ldrh	r0, [r4, #0]
 	bl	FtlSysBlkNumInit
 	ldr	r2, [r4, #0]
-	ldr	r3, .L605+108
+	ldr	r3, .L607+108
 	str	r2, [r3, #0]
-	ldr	r3, .L605+112
-	ldr	r2, [r3, #0]
-	ldr	r3, .L605+48
-	lsls	r2, r2, #2
+	movs	r2, #24
+	ldr	r3, .L607+112
+	ldr	r1, [r3, #0]
+	ldr	r3, .L607+48
+	lsls	r1, r1, #2
 	ldrh	r3, [r3, #0]
-	muls	r2, r3, r2
-	ldr	r3, .L605+64
+	muls	r1, r3, r1
+	ldr	r3, .L607+64
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #9
-	lsr	r2, r2, r3
-	ldr	r3, .L605+116
-	adds	r2, r2, #2
-	strh	r2, [r3, #0]	@ movhi
-	movs	r2, #24
-	ldr	r3, .L605+120
+	lsr	r1, r1, r3
+	ldr	r3, .L607+116
+	adds	r1, r1, #2
+	uxth	r1, r1
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L607+120
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #0
-	ldr	r3, .L605+124
+	ldr	r3, .L607+124
 	str	r2, [r3, #0]
-	ldr	r2, .L605+88
-	ldrh	r0, [r2, #0]
-	adds	r3, r0, #3
+	ldr	r2, .L607+88
+	ldrh	r4, [r2, #0]
+	adds	r3, r4, #3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L605+104
-	ldr	r1, [r3, #0]
-	adds	r4, r1, #3
-	str	r4, [r3, #0]
-	ldr	r4, .L605+128
-	ldrb	r4, [r4, #0]	@ zero_extendqisi2
-	cbz	r4, .L602
-	adds	r0, r0, #4
-	adds	r1, r1, #5
-	strh	r0, [r2, #0]	@ movhi
-	str	r1, [r3, #0]
-.L602:
+	ldr	r3, .L607+104
+	ldr	r0, [r3, #0]
+	adds	r5, r0, #3
+	str	r5, [r3, #0]
+	ldr	r5, .L607+128
+	ldrb	r5, [r5, #0]	@ zero_extendqisi2
+	cbz	r5, .L603
+	adds	r4, r4, #4
+	adds	r0, r0, #5
+	strh	r4, [r2, #0]	@ movhi
+	str	r0, [r3, #0]
+.L603:
+	ldr	r3, .L607+132
+	movs	r2, #0
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r2, .L607+136
+	ldrh	r2, [r2, #0]
+	lsrs	r0, r2, #3
+	add	r2, r0, r2, lsl #1
+	adds	r2, r2, #52
+	add	r1, r2, r1, lsl #2
+	ldr	r2, .L607+60
+	ldrh	r2, [r2, #0]
+	cmp	r1, r2, lsl #9
+	bcs	.L604
+	movs	r2, #1
+	strh	r2, [r3, #0]	@ movhi
+.L604:
 	movs	r0, #0
 	add	sp, sp, #32
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L606:
+.L608:
 	.align	2
-.L605:
+.L607:
 	.word	.LANCHOR59
 	.word	.LANCHOR60
 	.word	.LANCHOR62
@@ -4855,6 +4894,8 @@ FtlConstantsInit:
 	.word	.LANCHOR83
 	.word	.LANCHOR84
 	.word	.LANCHOR7
+	.word	.LANCHOR85
+	.word	.LANCHOR55
 	.size	FtlConstantsInit, .-FtlConstantsInit
 	.section	.text.IsBlkInVendorPart,"ax",%progbits
 	.align	1
@@ -4865,39 +4906,39 @@ FtlConstantsInit:
 IsBlkInVendorPart:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L614
+	ldr	r3, .L616
 	push	{r4, lr}
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L612
-	ldr	r3, .L614+4
+	cbz	r3, .L614
+	ldr	r3, .L616+4
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L614+8
+	ldr	r3, .L616+8
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-	b	.L609
-.L611:
+	b	.L611
+.L613:
 	ldrh	r4, [r2], #2
 	cmp	r4, r0
-	beq	.L613
+	beq	.L615
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L609:
+.L611:
 	cmp	r3, r1
-	bne	.L611
+	bne	.L613
 	movs	r0, #0
 	pop	{r4, pc}
-.L613:
+.L615:
 	movs	r0, #1
 	pop	{r4, pc}
-.L612:
+.L614:
 	mov	r0, r3
 	pop	{r4, pc}
-.L615:
+.L617:
 	.align	2
-.L614:
-	.word	.LANCHOR85
-	.word	.LANCHOR77
+.L616:
 	.word	.LANCHOR86
+	.word	.LANCHOR77
+	.word	.LANCHOR87
 	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
 	.section	.text.FtlGetCap,"ax",%progbits
 	.align	1
@@ -4909,12 +4950,12 @@ FtlGetCap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L617
+	ldr	r3, .L619
 	ldr	r0, [r3, #0]
 	bx	lr
-.L618:
+.L620:
 	.align	2
-.L617:
+.L619:
 	.word	.LANCHOR84
 	.size	FtlGetCap, .-FtlGetCap
 	.section	.text.FtlGetCapacity,"ax",%progbits
@@ -4927,12 +4968,12 @@ FtlGetCapacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L620
+	ldr	r3, .L622
 	ldr	r0, [r3, #0]
 	bx	lr
-.L621:
+.L623:
 	.align	2
-.L620:
+.L622:
 	.word	.LANCHOR84
 	.size	FtlGetCapacity, .-FtlGetCapacity
 	.section	.text.ftl_get_density,"ax",%progbits
@@ -4945,12 +4986,12 @@ ftl_get_density:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L623
+	ldr	r3, .L625
 	ldr	r0, [r3, #0]
 	bx	lr
-.L624:
+.L626:
 	.align	2
-.L623:
+.L625:
 	.word	.LANCHOR84
 	.size	ftl_get_density, .-ftl_get_density
 	.section	.text.FtlGetLpn,"ax",%progbits
@@ -4963,13 +5004,13 @@ FtlGetLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L626
+	ldr	r3, .L628
 	ldr	r0, [r3, #0]
 	bx	lr
-.L627:
+.L629:
 	.align	2
-.L626:
-	.word	.LANCHOR87
+.L628:
+	.word	.LANCHOR88
 	.size	FtlGetLpn, .-FtlGetLpn
 	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
 	.align	1
@@ -4981,16 +5022,16 @@ FtlGetCurEraseBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L629
-	ldr	r3, .L629+4
+	ldr	r2, .L631
+	ldr	r3, .L631+4
 	ldr	r0, [r2, #0]
 	ldrh	r3, [r3, #0]
 	muls	r0, r3, r0
 	bx	lr
-.L630:
+.L632:
 	.align	2
-.L629:
-	.word	.LANCHOR88
+.L631:
+	.word	.LANCHOR89
 	.word	.LANCHOR53
 	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
 	.section	.text.FtlGetAllBlockNum,"ax",%progbits
@@ -5003,15 +5044,15 @@ FtlGetAllBlockNum:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L632
-	ldr	r3, .L632+4
+	ldr	r2, .L634
+	ldr	r3, .L634+4
 	ldrh	r0, [r2, #0]
 	ldrh	r3, [r3, #0]
 	muls	r0, r3, r0
 	bx	lr
-.L633:
+.L635:
 	.align	2
-.L632:
+.L634:
 	.word	.LANCHOR53
 	.word	.LANCHOR56
 	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
@@ -5024,7 +5065,7 @@ FtlGetAllBlockNum:
 FtlBbmMapBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L635
+	ldr	r3, .L637
 	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 	mov	r5, r0
 	ldrh	r4, [r3, #0]
@@ -5033,7 +5074,7 @@ FtlBbmMapBadBlock:
 	bl	__aeabi_uidiv
 	uxth	r2, r0
 	mls	r3, r4, r2, r5
-	ldr	r4, .L635+4
+	ldr	r4, .L637+4
 	add	r1, r4, r2, lsl #2
 	ldr	r0, [r1, #28]
 	uxth	r3, r3
@@ -5045,18 +5086,18 @@ FtlBbmMapBadBlock:
 	str	r1, [r0, r6, lsl #2]
 	str	r1, [sp, #0]
 	mov	r1, r5
-	ldr	r0, .L635+8
+	ldr	r0, .L637+8
 	bl	printf
 	ldrh	r3, [r4, #6]
 	movs	r0, #0
 	adds	r3, r3, #1
 	strh	r3, [r4, #6]	@ movhi
 	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L636:
+.L638:
 	.align	2
-.L635:
+.L637:
 	.word	.LANCHOR66
-	.word	.LANCHOR89
+	.word	.LANCHOR90
 	.word	.LC8
 	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
 	.global	__aeabi_uidivmod
@@ -5069,7 +5110,7 @@ FtlBbmMapBadBlock:
 FtlBbmIsBadBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L638
+	ldr	r3, .L640
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r5, [r3, #0]
@@ -5079,7 +5120,7 @@ FtlBbmIsBadBlock:
 	uxth	r4, r1
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r3, .L638+4
+	ldr	r3, .L640+4
 	lsrs	r2, r4, #5
 	and	r4, r4, #31
 	uxth	r0, r0
@@ -5089,11 +5130,11 @@ FtlBbmIsBadBlock:
 	lsr	r0, r0, r4
 	and	r0, r0, #1
 	pop	{r4, r5, r6, pc}
-.L639:
+.L641:
 	.align	2
-.L638:
+.L640:
 	.word	.LANCHOR66
-	.word	.LANCHOR89
+	.word	.LANCHOR90
 	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
 	.section	.text.FtlBbtInfoPrint,"ax",%progbits
 	.align	1
@@ -5116,33 +5157,33 @@ FtlBbtInfoPrint:
 FtlBbt2Bitmap:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L646
+	ldr	r3, .L648
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r6, r0
 	ldrh	r2, [r3, #0]
 	mov	r0, r1
 	mov	r5, r1
 	movs	r1, #0
-	ldr	r7, .L646+4
+	ldr	r7, .L648+4
 	movs	r4, #0
 	lsls	r2, r2, #2
 	movw	r8, #65535
 	bl	memset
-.L644:
+.L646:
 	ldrh	r3, [r6, r4]
 	cmp	r3, r8
-	beq	.L641
+	beq	.L643
 	ldrh	r2, [r7, #0]
 	cmp	r2, r3
-	bhi	.L643
-	ldr	r1, .L646+8
+	bhi	.L645
+	ldr	r1, .L648+8
 	movs	r2, #79
-	ldr	r0, .L646+12
+	ldr	r0, .L648+12
 	bl	printf
-	ldr	r0, .L646+16
-	ldr	r1, .L646+20
+	ldr	r0, .L648+16
+	ldr	r1, .L648+20
 	bl	printf
-.L643:
+.L645:
 	ldrh	r2, [r6, r4]
 	movs	r1, #1
 	adds	r4, r4, #2
@@ -5153,15 +5194,15 @@ FtlBbt2Bitmap:
 	ldr	r1, [r5, r3, lsl #2]
 	orr	r2, r1, r2
 	str	r2, [r5, r3, lsl #2]
-	bne	.L644
-.L641:
+	bne	.L646
+.L643:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L647:
+.L649:
 	.align	2
-.L646:
-	.word	.LANCHOR90
-	.word	.LANCHOR66
+.L648:
 	.word	.LANCHOR91
+	.word	.LANCHOR66
+	.word	.LANCHOR92
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5176,7 +5217,7 @@ FtlBbtMemInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L649
+	ldr	r0, .L651
 	movw	r3, #65535
 	movs	r1, #255
 	movs	r2, #16
@@ -5185,10 +5226,10 @@ FtlBbtMemInit:
 	strh	r3, [r0, #6]	@ movhi
 	adds	r0, r0, #12
 	b	memset
-.L650:
+.L652:
 	.align	2
-.L649:
-	.word	.LANCHOR89
+.L651:
+	.word	.LANCHOR90
 	.size	FtlBbtMemInit, .-FtlBbtMemInit
 	.section	.text.V2P_block,"ax",%progbits
 	.align	1
@@ -5201,13 +5242,13 @@ V2P_block:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r7, r1
-	ldr	r3, .L652
+	ldr	r3, .L654
 	mov	r6, r0
 	ldrh	r4, [r3, #0]
 	muls	r7, r4, r7
 	mov	r1, r4
 	bl	__aeabi_uidiv
-	ldr	r3, .L652+4
+	ldr	r3, .L654+4
 	mov	r1, r4
 	ldrh	r5, [r3, #0]
 	mla	r5, r0, r5, r7
@@ -5216,9 +5257,9 @@ V2P_block:
 	adds	r1, r5, r1
 	uxth	r0, r1
 	pop	{r3, r4, r5, r6, r7, pc}
-.L653:
+.L655:
 	.align	2
-.L652:
+.L654:
 	.word	.LANCHOR61
 	.word	.LANCHOR66
 	.size	V2P_block, .-V2P_block
@@ -5231,11 +5272,11 @@ V2P_block:
 P2V_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L655
+	ldr	r3, .L657
 	push	{r4, r5, r6, lr}
 	mov	r6, r0
 	ldrh	r4, [r3, #0]
-	ldr	r3, .L655+4
+	ldr	r3, .L657+4
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
 	mov	r1, r4
@@ -5245,9 +5286,9 @@ P2V_plane:
 	adds	r1, r5, r1
 	uxth	r0, r1
 	pop	{r4, r5, r6, pc}
-.L656:
+.L658:
 	.align	2
-.L655:
+.L657:
 	.word	.LANCHOR61
 	.word	.LANCHOR66
 	.size	P2V_plane, .-P2V_plane
@@ -5261,18 +5302,18 @@ P2V_block_in_plane:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L658
+	ldr	r3, .L660
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidivmod
-	ldr	r3, .L658+4
+	ldr	r3, .L660+4
 	uxth	r0, r1
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
 	uxth	r0, r0
 	pop	{r3, pc}
-.L659:
+.L661:
 	.align	2
-.L658:
+.L660:
 	.word	.LANCHOR66
 	.word	.LANCHOR61
 	.size	P2V_block_in_plane, .-P2V_block_in_plane
@@ -5287,14 +5328,14 @@ ftl_cmp_data_ver:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
 	cmp	r0, r1
-	bls	.L661
+	bls	.L663
 	subs	r0, r0, r1
 	cmp	r0, #-2147483648
 	ite	hi
 	movhi	r0, #0
 	movls	r0, #1
 	bx	lr
-.L661:
+.L663:
 	subs	r0, r1, r0
 	cmp	r0, #-2147483648
 	ite	ls
@@ -5311,7 +5352,7 @@ ftl_cmp_data_ver:
 FtlFreeSysBlkQueueInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L664
+	ldr	r3, .L666
 	mov	r2, #2048
 	push	{r4, lr}
 	movs	r4, #0
@@ -5324,10 +5365,10 @@ FtlFreeSysBlkQueueInit:
 	bl	memset
 	mov	r0, r4
 	pop	{r4, pc}
-.L665:
+.L667:
 	.align	2
-.L664:
-	.word	.LANCHOR92
+.L666:
+	.word	.LANCHOR93
 	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
 	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
 	.align	1
@@ -5339,16 +5380,16 @@ FtlFreeSysBlkQueueEmpty:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L667
+	ldr	r3, .L669
 	ldrh	r0, [r3, #6]
 	rsbs	r0, r0, #1
 	it	cc
 	movcc	r0, #0
 	bx	lr
-.L668:
+.L670:
 	.align	2
-.L667:
-	.word	.LANCHOR92
+.L669:
+	.word	.LANCHOR93
 	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
 	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
 	.align	1
@@ -5360,16 +5401,16 @@ FtlFreeSysBlkQueueFull:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L670
+	ldr	r3, .L672
 	ldrh	r0, [r3, #6]
 	sub	r2, r0, #1024
 	rsbs	r0, r2, #0
 	adc	r0, r0, r2
 	bx	lr
-.L671:
+.L673:
 	.align	2
-.L670:
-	.word	.LANCHOR92
+.L672:
+	.word	.LANCHOR93
 	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
 	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
 	.align	1
@@ -5382,13 +5423,16 @@ FtlFreeSysBlkQueueIn:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L675
+	ldr	r3, .L677
 	ldrh	r3, [r3, #6]
 	cmp	r3, #1024
-	beq	.L672
-	cbz	r1, .L674
+	beq	.L674
+	cbz	r1, .L676
+	ldr	r3, .L677+4
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L676
 	bl	P2V_block_in_plane
-	ldr	r3, .L675+4
+	ldr	r3, .L677+8
 	movs	r1, #1
 	mov	r2, r1
 	mov	r5, r0
@@ -5396,17 +5440,17 @@ FtlFreeSysBlkQueueIn:
 	lsls	r3, r4, #10
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
-	ldr	r3, .L675+8
+	ldr	r3, .L677+12
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L675+12
+	ldr	r3, .L677+16
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-.L674:
-	ldr	r3, .L675
+.L676:
+	ldr	r3, .L677
 	ldrh	r2, [r3, #6]
 	adds	r2, r2, #1
 	strh	r2, [r3, #6]	@ movhi
@@ -5416,15 +5460,16 @@ FtlFreeSysBlkQueueIn:
 	bic	r2, r2, #64512
 	strh	r2, [r3, #4]	@ movhi
 	strh	r4, [r3, r1, lsl #1]	@ movhi
-.L672:
+.L674:
 	pop	{r3, r4, r5, pc}
-.L676:
+.L678:
 	.align	2
-.L675:
-	.word	.LANCHOR92
+.L677:
 	.word	.LANCHOR93
 	.word	.LANCHOR94
 	.word	.LANCHOR95
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
 	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
 	.align	1
@@ -5437,11 +5482,11 @@ FtlFreeSysBLkSort:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, r8, sl, lr}
 	movs	r4, #0
-	ldr	r5, .L687
-	ldr	r7, .L687+4
-	ldr	r6, .L687+8
-	b	.L678
-.L679:
+	ldr	r5, .L689
+	ldr	r7, .L689+4
+	ldr	r6, .L689+8
+	b	.L680
+.L681:
 	add	r8, r4, r8
 	add	r8, r8, #4
 	ldrh	r0, [r5, r8, lsl #1]
@@ -5452,24 +5497,24 @@ FtlFreeSysBLkSort:
 	str	r2, [r3, r4, lsl #2]
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L678:
+.L680:
 	ldrh	ip, [r5, #6]
 	ldrh	r8, [r5, #2]
 	cmp	r4, ip
-	bcc	.L679
-	ldr	r3, .L687+4
+	bcc	.L681
+	ldr	r3, .L689+4
 	add	r6, ip, #-1
-	ldr	r4, .L687
+	ldr	r4, .L689
 	ldr	r1, [r3, #0]
 	movs	r3, #0
-	b	.L680
-.L685:
+	b	.L682
+.L687:
 	adds	r5, r3, #1
 	mov	r2, r3
 	uxth	r5, r5
 	mov	r0, r5
-	b	.L681
-.L683:
+	b	.L683
+.L685:
 	ldr	r7, [r1, r0, lsl #2]
 	ldr	sl, [r1, r2, lsl #2]
 	cmp	sl, r7
@@ -5477,11 +5522,11 @@ FtlFreeSysBLkSort:
 	movhi	r2, r0
 	adds	r0, r0, #1
 	uxth	r0, r0
-.L681:
+.L683:
 	cmp	r0, ip
-	bcc	.L683
+	bcc	.L685
 	cmp	r3, r2
-	beq	.L684
+	beq	.L686
 	ldr	r0, [r1, r2, lsl #2]
 	ldr	r7, [r1, r3, lsl #2]
 	str	r7, [r1, r2, lsl #2]
@@ -5494,58 +5539,75 @@ FtlFreeSysBLkSort:
 	ldrh	r7, [r4, r3, lsl #1]
 	strh	r7, [r4, r2, lsl #1]	@ movhi
 	strh	r0, [r4, r3, lsl #1]	@ movhi
-.L684:
+.L686:
 	mov	r3, r5
-.L680:
+.L682:
 	cmp	r3, r6
-	blt	.L685
+	blt	.L687
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L688:
+.L690:
 	.align	2
-.L687:
-	.word	.LANCHOR92
+.L689:
+	.word	.LANCHOR93
+	.word	.LANCHOR98
 	.word	.LANCHOR96
-	.word	.LANCHOR94
 	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
-	.section	.text.IsInFreeQueue,"ax",%progbits
+	.section	.text.remove_from_free_sys_Queue,"ax",%progbits
 	.align	1
-	.global	IsInFreeQueue
+	.global	remove_from_free_sys_Queue
 	.thumb
 	.thumb_func
-	.type	IsInFreeQueue, %function
-IsInFreeQueue:
+	.type	remove_from_free_sys_Queue, %function
+remove_from_free_sys_Queue:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L695
-	push	{r4, r5, lr}
-	ldrh	r1, [r2, #6]
-	cmp	r1, #1024
-	beq	.L693
-	ldrh	r4, [r2, #2]
-	movs	r3, #0
-	b	.L691
-.L692:
-	adds	r5, r3, r4
-	lsls	r5, r5, #22
-	add	r5, r2, r5, lsr #21
-	ldrh	r5, [r5, #8]
-	cmp	r5, r0
-	beq	.L694
-	adds	r3, r3, #1
-.L691:
-	cmp	r3, r1
-	bcc	.L692
-.L693:
-	movs	r0, #0
-	pop	{r4, r5, pc}
-.L694:
+	ldr	r3, .L697
+	mov	r1, r0
+	push	{r4, r5, r6, lr}
+	ldrh	r0, [r3, #6]
+	cbz	r0, .L692
+	ldrh	r2, [r3, #2]
+	movs	r5, #0
+	b	.L693
+.L695:
+	adds	r6, r5, r2
+	ldr	r4, .L697
+	lsls	r6, r6, #22
+	add	r6, r3, r6, lsr #21
+	ldrh	r6, [r6, #8]
+	cmp	r6, r1
+	bne	.L694
+	ldr	r0, .L697+4
+	bl	printf
+	ldrh	r3, [r4, #2]
 	movs	r0, #1
-	pop	{r4, r5, pc}
-.L696:
+	adds	r5, r5, r3
+	adds	r2, r3, #4
+	adds	r3, r3, #1
+	lsls	r5, r5, #22
+	ldrh	r2, [r4, r2, lsl #1]
+	bic	r3, r3, #64512
+	strh	r3, [r4, #2]	@ movhi
+	add	r5, r4, r5, lsr #21
+	ldrh	r3, [r4, #6]
+	strh	r2, [r5, #8]	@ movhi
+	subs	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	pop	{r4, r5, r6, pc}
+.L694:
+	adds	r5, r5, #1
+.L693:
+	cmp	r5, r0
+	bcc	.L695
+	movs	r0, #0
+.L692:
+	pop	{r4, r5, r6, pc}
+.L698:
 	.align	2
-.L695:
-	.word	.LANCHOR92
-	.size	IsInFreeQueue, .-IsInFreeQueue
+.L697:
+	.word	.LANCHOR93
+	.word	.LC12
+	.size	remove_from_free_sys_Queue, .-remove_from_free_sys_Queue
 	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
 	.align	1
 	.global	FtlFreeSysBlkQueueOut
@@ -5555,10 +5617,11 @@ IsInFreeQueue:
 FtlFreeSysBlkQueueOut:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r3, .L700
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L703
 	ldrh	r1, [r3, #6]
-	cbz	r1, .L699
+	cmp	r1, #0
+	beq	.L702
 	ldrh	r2, [r3, #2]
 	subs	r1, r1, #1
 	strh	r1, [r3, #6]	@ movhi
@@ -5567,42 +5630,51 @@ FtlFreeSysBlkQueueOut:
 	bic	r2, r2, #64512
 	strh	r2, [r3, #2]	@ movhi
 	ldrh	r4, [r3, r0, lsl #1]
-	ldr	r3, .L700+4
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L698
+	ldr	r3, .L703+4
+	ldr	r7, [r3, #0]
+	cbnz	r7, .L700
 	mov	r0, r4
+	ldr	r6, .L703+8
 	bl	P2V_block_in_plane
-	ldr	r3, .L700+8
-	movs	r1, #1
-	mov	r2, r1
-	mov	r5, r0
-	ldr	r0, [r3, #0]
 	lsls	r3, r4, #10
+	mov	r5, r0
+	ldr	r0, [r6, #0]
 	str	r3, [r0, #4]
+	ldr	r3, .L703+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L701
+	mov	r1, r7
+	movs	r2, #1
+	bl	FlashEraseBlocks
+.L701:
+	movs	r1, #1
+	ldr	r0, [r6, #0]
+	mov	r2, r1
 	bl	FlashEraseBlocks
-	ldr	r3, .L700+12
+	ldr	r3, .L703+16
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L700+16
+	ldr	r3, .L703+20
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-	b	.L698
-.L699:
+	b	.L700
+.L702:
 	movw	r4, #65535
-.L698:
+.L700:
 	mov	r0, r4
-	pop	{r3, r4, r5, pc}
-.L701:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L704:
 	.align	2
-.L700:
-	.word	.LANCHOR92
-	.word	.LANCHOR7
+.L703:
 	.word	.LANCHOR93
 	.word	.LANCHOR94
 	.word	.LANCHOR95
+	.word	.LANCHOR7
+	.word	.LANCHOR96
+	.word	.LANCHOR97
 	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
 	.section	.text.insert_data_list,"ax",%progbits
 	.align	1
@@ -5613,13 +5685,13 @@ FtlFreeSysBlkQueueOut:
 insert_data_list:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L718
+	ldr	r3, .L721
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	ldrh	fp, [r3, #0]
 	cmp	r0, fp
-	bcs	.L703
-	ldr	r3, .L718+4
+	bcs	.L706
+	ldr	r3, .L721+4
 	movs	r6, #6
 	muls	r6, r0, r6
 	ldr	r1, [r3, #0]
@@ -5627,29 +5699,29 @@ insert_data_list:
 	adds	r2, r1, r6
 	strh	r3, [r1, r6]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
-	ldr	r3, .L718+8
+	ldr	r3, .L721+8
 	ldr	r5, [r3, #0]
 	cmp	r5, #0
-	beq	.L717
-.L704:
-	ldr	r3, .L718+12
+	beq	.L720
+.L707:
+	ldr	r3, .L721+12
 	ldrh	r4, [r2, #4]
 	ldr	ip, [r3, #0]
 	lsls	r3, r0, #1
 	ldrh	r7, [ip, r0, lsl #1]
-	cbz	r4, .L713
+	cbz	r4, .L716
 	muls	r4, r7, r4
-	b	.L716
-.L713:
-	mov	r4, #-1
+	b	.L719
 .L716:
+	mov	r4, #-1
+.L719:
 	str	r4, [sp, #8]
 	subs	r4, r5, r1
-	ldr	r7, .L718+16
+	ldr	r7, .L721+16
 	mov	sl, r2
 	asrs	r4, r4, #1
 	muls	r4, r7, r4
-	ldr	r7, .L718+20
+	ldr	r7, .L721+20
 	uxth	r4, r4
 	str	ip, [sp, #4]
 	ldr	r7, [r7, #0]
@@ -5658,84 +5730,84 @@ insert_data_list:
 	str	r7, [sp, #12]
 	mov	r3, r5
 	movs	r7, #0
-.L711:
+.L714:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r7, fp
-	bhi	.L703
+	bhi	.L706
 	cmp	r0, r4
-	beq	.L703
+	beq	.L706
 	ldr	r2, [sp, #4]
 	lsl	r8, r4, #1
 	str	r8, [sp, #16]
 	ldrh	r8, [r2, r4, lsl #1]
 	ldrh	r2, [r3, #4]
-	cbz	r2, .L714
+	cbz	r2, .L717
 	mul	r2, r2, r8
-	b	.L706
-.L714:
+	b	.L709
+.L717:
 	mov	r2, #-1
-.L706:
+.L709:
 	ldr	r8, [sp, #8]
 	cmp	r2, r8
-	bne	.L707
+	bne	.L710
 	ldr	r2, [sp, #12]
 	ldr	ip, [sp, #16]
 	ldrh	r8, [r2, ip]
 	ldr	r2, [sp, #20]
 	ldrh	ip, [r2, #0]
 	cmp	r8, ip
-	bcc	.L709
-	b	.L715
-.L707:
-	bhi	.L715
-.L709:
+	bcc	.L712
+	b	.L718
+.L710:
+	bhi	.L718
+.L712:
 	ldrh	r2, [r3, #0]
 	movw	r8, #65535
 	cmp	r2, r8
-	bne	.L710
+	bne	.L713
 	mov	r2, sl
 	strh	r0, [r3, #0]	@ movhi
-	ldr	r3, .L718+24
+	ldr	r3, .L721+24
 	strh	r4, [r2, #2]	@ movhi
-	b	.L717
-.L710:
+	b	.L720
+.L713:
 	mov	ip, #6
 	mov	r4, r2
 	mla	r3, ip, r2, r1
-	b	.L711
-.L715:
+	b	.L714
+.L718:
 	strh	r4, [r1, r6]	@ movhi
 	mov	r2, sl
 	ldrh	r4, [r3, #2]
 	cmp	r3, r5
 	strh	r4, [r2, #2]	@ movhi
-	bne	.L712
+	bne	.L715
 	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L718+8
-.L717:
+	ldr	r3, .L721+8
+.L720:
 	str	r2, [r3, #0]
-	b	.L703
-.L712:
+	b	.L706
+.L715:
 	ldrh	r2, [r3, #2]
 	movs	r4, #6
 	strh	r0, [r3, #2]	@ movhi
 	muls	r2, r4, r2
 	strh	r0, [r1, r2]	@ movhi
-.L703:
+.L706:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L719:
+.L722:
 	.align	2
-.L718:
+.L721:
 	.word	.LANCHOR55
-	.word	.LANCHOR97
-	.word	.LANCHOR98
 	.word	.LANCHOR99
-	.word	-1431655765
-	.word	.LANCHOR94
 	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	-1431655765
+	.word	.LANCHOR96
+	.word	.LANCHOR102
 	.size	insert_data_list, .-insert_data_list
 	.section	.text.INSERT_DATA_LIST,"ax",%progbits
 	.align	1
@@ -5748,31 +5820,31 @@ INSERT_DATA_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_data_list
-	ldr	r2, .L722
+	ldr	r2, .L725
 	ldrh	r3, [r2, #0]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L722+4
+	ldr	r2, .L725+4
 	ldrh	r2, [r2, #0]
 	cmp	r2, r3
-	bcs	.L720
-	ldr	r1, .L722+8
-	movs	r2, #196
-	ldr	r0, .L722+12
+	bcs	.L723
+	ldr	r1, .L725+8
+	movs	r2, #205
+	ldr	r0, .L725+12
 	bl	printf
-	ldr	r0, .L722+16
-	ldr	r1, .L722+20
+	ldr	r0, .L725+16
+	ldr	r1, .L725+20
 	pop	{r3, lr}
 	b	printf
-.L720:
-	pop	{r3, pc}
 .L723:
+	pop	{r3, pc}
+.L726:
 	.align	2
-.L722:
-	.word	.LANCHOR101
+.L725:
+	.word	.LANCHOR103
 	.word	.LANCHOR55
-	.word	.LANCHOR102
+	.word	.LANCHOR104
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5789,67 +5861,67 @@ insert_free_list:
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movw	r8, #65535
 	cmp	r0, r8
-	beq	.L725
-	ldr	r3, .L732
+	beq	.L728
+	ldr	r3, .L735
 	mov	fp, #6
 	mul	r6, fp, r0
 	ldr	r2, [r3, #0]
-	ldr	r3, .L732+4
+	ldr	r3, .L735+4
 	adds	r1, r2, r6
 	ldr	r4, [r3, #0]
 	strh	r8, [r1, #2]	@ movhi
 	strh	r8, [r2, r6]	@ movhi
-	cbz	r4, .L731
-.L726:
-	ldr	r3, .L732+8
+	cbz	r4, .L734
+.L729:
+	ldr	r3, .L735+8
 	subs	r5, r4, r2
 	asrs	r5, r5, #1
 	ldr	ip, [r3, #0]
-	ldr	r3, .L732+12
+	ldr	r3, .L735+12
 	muls	r5, r3, r5
 	mov	r3, r4
 	uxth	r5, r5
 	ldrh	sl, [ip, r0, lsl #1]
-.L729:
+.L732:
 	ldrh	r7, [ip, r5, lsl #1]
 	cmp	r7, sl
-	bcs	.L727
+	bcs	.L730
 	ldrh	r7, [r3, #0]
 	cmp	r7, r8
-	bne	.L728
+	bne	.L731
 	strh	r5, [r1, #2]	@ movhi
 	strh	r0, [r3, #0]	@ movhi
-	b	.L725
-.L728:
+	b	.L728
+.L731:
 	mla	r3, fp, r7, r2
 	mov	r5, r7
-	b	.L729
-.L727:
+	b	.L732
+.L730:
 	ldrh	r7, [r3, #2]
 	cmp	r3, r4
 	strh	r5, [r2, r6]	@ movhi
 	strh	r7, [r1, #2]	@ movhi
-	bne	.L730
+	bne	.L733
 	strh	r0, [r3, #2]	@ movhi
-	ldr	r3, .L732+4
-.L731:
+	ldr	r3, .L735+4
+.L734:
 	str	r1, [r3, #0]
-	b	.L725
-.L730:
+	b	.L728
+.L733:
 	ldrh	r1, [r3, #2]
 	movs	r4, #6
 	strh	r0, [r3, #2]	@ movhi
 	muls	r1, r4, r1
 	strh	r0, [r2, r1]	@ movhi
-.L725:
+.L728:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L733:
+.L736:
 	.align	2
-.L732:
-	.word	.LANCHOR97
-	.word	.LANCHOR103
-	.word	.LANCHOR94
+.L735:
+	.word	.LANCHOR99
+	.word	.LANCHOR105
+	.word	.LANCHOR96
 	.word	-1431655765
 	.size	insert_free_list, .-insert_free_list
 	.section	.text.INSERT_FREE_LIST,"ax",%progbits
@@ -5863,31 +5935,31 @@ INSERT_FREE_LIST:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
 	bl	insert_free_list
-	ldr	r2, .L736
+	ldr	r2, .L739
 	ldrh	r3, [r2, #0]
 	adds	r3, r3, #1
 	uxth	r3, r3
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L736+4
+	ldr	r2, .L739+4
 	ldrh	r2, [r2, #0]
 	cmp	r2, r3
-	bcs	.L734
-	ldr	r1, .L736+8
-	movs	r2, #189
-	ldr	r0, .L736+12
+	bcs	.L737
+	ldr	r1, .L739+8
+	movs	r2, #198
+	ldr	r0, .L739+12
 	bl	printf
-	ldr	r0, .L736+16
-	ldr	r1, .L736+20
+	ldr	r0, .L739+16
+	ldr	r1, .L739+20
 	pop	{r3, lr}
 	b	printf
-.L734:
-	pop	{r3, pc}
 .L737:
+	pop	{r3, pc}
+.L740:
 	.align	2
-.L736:
-	.word	.LANCHOR104
+.L739:
+	.word	.LANCHOR106
 	.word	.LANCHOR55
-	.word	.LANCHOR105
+	.word	.LANCHOR107
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5904,57 +5976,57 @@ List_remove_node:
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r6, #6
 	muls	r6, r1, r6
-	ldr	r3, .L744
+	ldr	r3, .L747
 	mov	r5, r0
 	ldr	r7, [r3, #0]
 	movw	r3, #65535
 	adds	r4, r7, r6
 	ldrh	r2, [r4, #2]
 	cmp	r2, r3
-	bne	.L739
+	bne	.L742
 	ldr	r3, [r0, #0]
 	cmp	r4, r3
-	beq	.L739
-	ldr	r1, .L744+4
-	mov	r2, #354
-	ldr	r0, .L744+8
+	beq	.L742
+	ldr	r1, .L747+4
+	movw	r2, #363
+	ldr	r0, .L747+8
 	bl	printf
-	ldr	r0, .L744+12
-	ldr	r1, .L744+16
+	ldr	r0, .L747+12
+	ldr	r1, .L747+16
 	bl	printf
-.L739:
+.L742:
 	ldr	r3, [r5, #0]
 	movw	r2, #65535
 	cmp	r4, r3
 	ldrh	r3, [r7, r6]
-	bne	.L740
+	bne	.L743
 	cmp	r3, r2
-	bne	.L741
+	bne	.L744
 	movs	r3, #0
 	str	r3, [r5, #0]
-	b	.L742
-.L741:
-	ldr	r1, .L744
+	b	.L745
+.L744:
+	ldr	r1, .L747
 	movs	r0, #6
 	ldr	r1, [r1, #0]
 	mla	r3, r0, r3, r1
 	str	r3, [r5, #0]
 	strh	r2, [r3, #2]	@ movhi
-	b	.L742
-.L740:
+	b	.L745
+.L743:
 	cmp	r3, r2
 	ldrh	r2, [r4, #2]
-	bne	.L743
+	bne	.L746
 	cmp	r2, r3
-	beq	.L742
-	ldr	r1, .L744
+	beq	.L745
+	ldr	r1, .L747
 	movs	r0, #6
 	muls	r2, r0, r2
 	ldr	r1, [r1, #0]
 	strh	r3, [r1, r2]	@ movhi
-	b	.L742
-.L743:
-	ldr	r1, .L744
+	b	.L745
+.L746:
+	ldr	r1, .L747
 	movs	r0, #6
 	ldr	r1, [r1, #0]
 	mla	r5, r0, r3, r1
@@ -5962,17 +6034,17 @@ List_remove_node:
 	ldrh	r2, [r4, #2]
 	muls	r0, r2, r0
 	strh	r3, [r1, r0]	@ movhi
-.L742:
+.L745:
 	movw	r3, #65535
 	movs	r0, #0
 	strh	r3, [r7, r6]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L745:
+.L748:
 	.align	2
-.L744:
-	.word	.LANCHOR97
-	.word	.LANCHOR106
+.L747:
+	.word	.LANCHOR99
+	.word	.LANCHOR108
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -5988,24 +6060,24 @@ List_pop_index_node:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldr	r3, [r0, #0]
 	push	{r4, r5, r6, lr}
-	cbz	r3, .L751
-	ldr	r2, .L752
+	cbz	r3, .L754
+	ldr	r2, .L755
 	movw	r6, #65535
 	movs	r5, #6
 	ldr	r4, [r2, #0]
-	b	.L748
-.L750:
+	b	.L751
+.L753:
 	mla	r3, r5, r2, r4
 	subs	r1, r1, #1
 	uxth	r1, r1
-.L748:
-	cbz	r1, .L749
+.L751:
+	cbz	r1, .L752
 	ldrh	r2, [r3, #0]
 	cmp	r2, r6
-	bne	.L750
-.L749:
+	bne	.L753
+.L752:
 	subs	r4, r3, r4
-	ldr	r3, .L752+4
+	ldr	r3, .L755+4
 	asrs	r4, r4, #1
 	muls	r4, r3, r4
 	uxth	r4, r4
@@ -6013,28 +6085,15 @@ List_pop_index_node:
 	bl	List_remove_node
 	mov	r0, r4
 	pop	{r4, r5, r6, pc}
-.L751:
+.L754:
 	movw	r0, #65535
 	pop	{r4, r5, r6, pc}
-.L753:
+.L756:
 	.align	2
-.L752:
-	.word	.LANCHOR97
+.L755:
+	.word	.LANCHOR99
 	.word	-1431655765
 	.size	List_pop_index_node, .-List_pop_index_node
-	.section	.text.List_pop_head_node,"ax",%progbits
-	.align	1
-	.global	List_pop_head_node
-	.thumb
-	.thumb_func
-	.type	List_pop_head_node, %function
-List_pop_head_node:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	@ link register save eliminated.
-	movs	r1, #0
-	b	List_pop_index_node
-	.size	List_pop_head_node, .-List_pop_head_node
 	.section	.text.List_get_gc_head_node,"ax",%progbits
 	.align	1
 	.global	List_get_gc_head_node
@@ -6044,41 +6103,41 @@ List_pop_head_node:
 List_get_gc_head_node:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L761
+	ldr	r3, .L763
 	push	{r4, lr}
 	ldr	r3, [r3, #0]
-	cbz	r3, .L760
-	ldr	r2, .L761+4
+	cbz	r3, .L762
+	ldr	r2, .L763+4
 	movw	r1, #65535
 	movs	r4, #6
 	ldr	r2, [r2, #0]
-	b	.L757
-.L759:
+	b	.L759
+.L761:
 	mla	r3, r4, r3, r2
 	subs	r0, r0, #1
 	uxth	r0, r0
-.L757:
-	cbz	r0, .L758
+.L759:
+	cbz	r0, .L760
 	ldrh	r3, [r3, #0]
 	cmp	r3, r1
-	bne	.L759
+	bne	.L761
 	mov	r0, r1
 	pop	{r4, pc}
-.L758:
+.L760:
 	subs	r3, r3, r2
-	ldr	r0, .L761+8
+	ldr	r0, .L763+8
 	asrs	r3, r3, #1
 	muls	r0, r3, r0
 	uxth	r0, r0
 	pop	{r4, pc}
-.L760:
+.L762:
 	movw	r0, #65535
 	pop	{r4, pc}
-.L762:
+.L764:
 	.align	2
-.L761:
-	.word	.LANCHOR98
-	.word	.LANCHOR97
+.L763:
+	.word	.LANCHOR100
+	.word	.LANCHOR99
 	.word	-1431655765
 	.size	List_get_gc_head_node, .-List_get_gc_head_node
 	.section	.text.List_update_data_list,"ax",%progbits
@@ -6090,30 +6149,30 @@ List_get_gc_head_node:
 List_update_data_list:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L772
+	ldr	r3, .L774
 	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L764
-	ldr	r3, .L772+4
+	beq	.L766
+	ldr	r3, .L774+4
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L764
-	ldr	r3, .L772+8
+	beq	.L766
+	ldr	r3, .L774+8
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L764
-	ldr	r3, .L772+12
+	beq	.L766
+	ldr	r3, .L774+12
 	movs	r7, #6
 	muls	r7, r0, r7
 	ldr	r8, [r3, #0]
-	ldr	r3, .L772+16
+	ldr	r3, .L774+16
 	add	r5, r8, r7
 	ldr	r3, [r3, #0]
 	cmp	r5, r3
-	beq	.L764
-	ldr	r3, .L772+20
+	beq	.L766
+	ldr	r3, .L774+20
 	movw	r2, #65535
 	ldrh	r6, [r5, #4]
 	ldr	r3, [r3, #0]
@@ -6123,35 +6182,35 @@ List_update_data_list:
 	it	eq
 	moveq	r6, #-1
 	cmp	r3, r2
-	bne	.L766
+	bne	.L768
 	ldrh	r2, [r8, r7]
 	cmp	r2, r3
-	bne	.L766
-	ldr	r1, .L772+24
-	movw	r2, #445
-	ldr	r0, .L772+28
+	bne	.L768
+	ldr	r1, .L774+24
+	movw	r2, #481
+	ldr	r0, .L774+28
 	bl	printf
-	ldr	r0, .L772+32
-	ldr	r1, .L772+36
+	ldr	r0, .L774+32
+	ldr	r1, .L774+36
 	bl	printf
-.L766:
+.L768:
 	ldrh	r3, [r5, #2]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L767
+	bne	.L769
 	ldrh	r2, [r8, r7]
 	cmp	r2, r3
-	beq	.L764
-.L767:
-	ldr	r2, .L772+12
+	beq	.L766
+.L769:
+	ldr	r2, .L774+12
 	movs	r1, #6
 	ldr	r2, [r2, #0]
 	mla	r3, r1, r3, r2
-	ldr	r1, .L772+40
+	ldr	r1, .L774+40
 	subs	r2, r3, r2
 	asrs	r2, r2, #1
 	muls	r2, r1, r2
-	ldr	r1, .L772+20
+	ldr	r1, .L774+20
 	uxth	r2, r2
 	ldrh	r3, [r3, #4]
 	ldr	r1, [r1, #0]
@@ -6160,44 +6219,44 @@ List_update_data_list:
 	it	eq
 	moveq	r3, #-1
 	cmp	r6, r3
-	bcs	.L764
-	ldr	r5, .L772+44
+	bcs	.L766
+	ldr	r5, .L774+44
 	mov	r1, r4
-	ldr	r0, .L772+16
+	ldr	r0, .L774+16
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L769
-	ldr	r1, .L772+24
-	mov	r2, #456
-	ldr	r0, .L772+28
+	cbnz	r3, .L771
+	ldr	r1, .L774+24
+	mov	r2, #492
+	ldr	r0, .L774+28
 	bl	printf
-	ldr	r0, .L772+32
-	ldr	r1, .L772+36
+	ldr	r0, .L774+32
+	ldr	r1, .L774+36
 	bl	printf
-.L769:
+.L771:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
 	strh	r3, [r5, #0]	@ movhi
 	bl	INSERT_DATA_LIST
-.L764:
+.L766:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, pc}
-.L773:
+.L775:
 	.align	2
-.L772:
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+.L774:
 	.word	.LANCHOR109
-	.word	.LANCHOR97
-	.word	.LANCHOR98
-	.word	.LANCHOR99
 	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR99
+	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR112
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	-1431655765
-	.word	.LANCHOR101
+	.word	.LANCHOR103
 	.size	List_update_data_list, .-List_update_data_list
 	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
 	.align	1
@@ -6219,47 +6278,47 @@ ftl_free_no_use_map_blk:
 	mov	r0, r5
 	bl	memset
 	movs	r2, #0
-	b	.L775
-.L779:
+	b	.L777
+.L781:
 	ldr	r1, [r7, r2, lsl #2]
 	movs	r3, #0
 	ubfx	r1, r1, #10, #16
-	b	.L776
-.L778:
+	b	.L778
+.L780:
 	ldrh	r0, [r6, r3, lsl #1]
 	cmp	r0, r1
-	bne	.L777
+	bne	.L779
 	ldrh	r0, [r5, r3, lsl #1]
 	adds	r0, r0, #1
 	strh	r0, [r5, r3, lsl #1]	@ movhi
-.L777:
+.L779:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L776:
+.L778:
 	ldrh	r0, [r4, #10]
 	cmp	r0, r3
-	bhi	.L778
+	bhi	.L780
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L775:
+.L777:
 	ldrh	r3, [r4, #6]
 	cmp	r3, r2
-	bhi	.L779
+	bhi	.L781
 	mov	sl, #0
 	ldrh	r3, [r5, #0]
 	mov	r7, sl
-	ldr	r2, .L785
-	b	.L780
-.L784:
+	ldr	r2, .L787
+	b	.L782
+.L786:
 	ldrh	r1, [r4, #0]
 	cmp	r1, r7
-	bne	.L781
+	bne	.L783
 	ldrh	r1, [r2, #0]
 	ldrh	r0, [r4, #2]
 	cmp	r0, r1
 	it	cc
 	strhcc	r1, [r5, r7, lsl #1]	@ movhi
-.L781:
+.L783:
 	ldrh	r8, [r5, r7, lsl #1]
 	lsl	fp, r7, #1
 	cmp	r3, r8
@@ -6267,9 +6326,9 @@ ftl_free_no_use_map_blk:
 	movhi	sl, r7
 	movhi	r3, r8
 	cmp	r8, #0
-	bne	.L783
+	bne	.L785
 	ldrh	r0, [r6, fp]
-	cbz	r0, .L783
+	cbz	r0, .L785
 	movs	r1, #1
 	stmia	sp, {r2, r3}
 	bl	FtlFreeSysBlkQueueIn
@@ -6278,18 +6337,18 @@ ftl_free_no_use_map_blk:
 	ldrh	r1, [r4, #8]
 	subs	r1, r1, #1
 	strh	r1, [r4, #8]	@ movhi
-.L783:
+.L785:
 	adds	r7, r7, #1
 	uxth	r7, r7
-.L780:
+.L782:
 	ldrh	r1, [r4, #10]
 	cmp	r1, r7
-	bhi	.L784
+	bhi	.L786
 	mov	r0, sl
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L786:
+.L788:
 	.align	2
-.L785:
+.L787:
 	.word	.LANCHOR69
 	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
 	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
@@ -6306,15 +6365,15 @@ ftl_map_blk_alloc_new_blk:
 	ldrh	r2, [r0, #10]
 	movs	r5, #0
 	ldr	r3, [r0, #12]
-	b	.L788
-.L791:
+	b	.L790
+.L793:
 	mov	r7, r3
 	adds	r3, r3, #2
 	ldrh	r6, [r7, #0]
-	cbnz	r6, .L789
+	cbnz	r6, .L791
 	bl	FtlFreeSysBlkQueueOut
 	strh	r0, [r7, #0]	@ movhi
-	cbz	r0, .L790
+	cbz	r0, .L792
 	ldr	r3, [r4, #28]
 	strh	r6, [r4, #2]	@ movhi
 	adds	r3, r3, #1
@@ -6323,31 +6382,31 @@ ftl_map_blk_alloc_new_blk:
 	strh	r5, [r4, #0]	@ movhi
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	b	.L790
-.L789:
+	b	.L792
+.L791:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L788:
-	cmp	r5, r2
-	bne	.L791
 .L790:
+	cmp	r5, r2
+	bne	.L793
+.L792:
 	ldrh	r3, [r4, #10]
 	cmp	r3, r5
-	bhi	.L792
-	ldr	r1, .L793
-	movw	r2, #553
-	ldr	r0, .L793+4
+	bhi	.L794
+	ldr	r1, .L795
+	movw	r2, #594
+	ldr	r0, .L795+4
 	bl	printf
-	ldr	r0, .L793+8
-	ldr	r1, .L793+12
+	ldr	r0, .L795+8
+	ldr	r1, .L795+12
 	bl	printf
-.L792:
+.L794:
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L794:
+.L796:
 	.align	2
-.L793:
-	.word	.LANCHOR111
+.L795:
+	.word	.LANCHOR113
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -6361,93 +6420,93 @@ ftl_map_blk_alloc_new_blk:
 select_l2p_ram_region:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L807
+	ldr	r2, .L809
 	movw	r1, #65535
 	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L807+4
+	ldr	r3, .L809+4
 	ldr	r0, [r2, #0]
 	movs	r2, #0
 	mov	r4, r2
 	ldrh	r3, [r3, #0]
-	b	.L796
-.L798:
+	b	.L798
+.L800:
 	adds	r2, r2, #12
 	adds	r5, r0, r2
 	ldrh	r5, [r5, #-12]
 	cmp	r5, r1
-	beq	.L797
+	beq	.L799
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L796:
+.L798:
 	cmp	r4, r3
-	bne	.L798
+	bne	.L800
 	movs	r1, #0
 	mov	r4, r3
 	mov	r6, #-2147483648
 	mov	r2, r1
-	b	.L799
-.L801:
+	b	.L801
+.L803:
 	adds	r5, r0, r1
 	ldr	r5, [r5, #4]
 	cmp	r5, #0
-	blt	.L800
+	blt	.L802
 	cmp	r5, r6
 	itt	cc
 	movcc	r6, r5
 	movcc	r4, r2
-.L800:
+.L802:
 	adds	r2, r2, #1
 	adds	r1, r1, #12
 	uxth	r2, r2
-.L799:
+.L801:
 	cmp	r2, r3
-	bne	.L801
+	bne	.L803
 	cmp	r4, r3
-	bcc	.L797
-	ldr	r2, .L807+8
+	bcc	.L799
+	ldr	r2, .L809+8
 	movs	r1, #0
 	mov	r4, r3
 	mov	r5, #-1
 	ldrh	r7, [r2, #0]
 	mov	r2, r1
-	b	.L802
-.L804:
+	b	.L804
+.L806:
 	adds	r6, r0, r1
 	ldr	r6, [r6, #4]
 	cmp	r6, r5
-	bcs	.L803
+	bcs	.L805
 	ldrh	ip, [r0, r1]
 	cmp	ip, r7
 	it	ne
 	movne	r5, r6
 	it	ne
 	movne	r4, r2
-.L803:
+.L805:
 	adds	r2, r2, #1
 	adds	r1, r1, #12
 	uxth	r2, r2
-.L802:
+.L804:
 	cmp	r2, r3
-	bne	.L804
+	bne	.L806
 	cmp	r4, r2
-	bcc	.L797
-	ldr	r1, .L807+12
-	mov	r2, #756
-	ldr	r0, .L807+16
+	bcc	.L799
+	ldr	r1, .L809+12
+	movw	r2, #826
+	ldr	r0, .L809+16
 	bl	printf
-	ldr	r0, .L807+20
-	ldr	r1, .L807+24
+	ldr	r0, .L809+20
+	ldr	r1, .L809+24
 	bl	printf
-.L797:
+.L799:
 	mov	r0, r4
 	pop	{r3, r4, r5, r6, r7, pc}
-.L808:
+.L810:
 	.align	2
-.L807:
-	.word	.LANCHOR112
-	.word	.LANCHOR83
-	.word	.LANCHOR113
+.L809:
 	.word	.LANCHOR114
+	.word	.LANCHOR83
+	.word	.LANCHOR115
+	.word	.LANCHOR116
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -6461,46 +6520,46 @@ select_l2p_ram_region:
 FtlUpdateVaildLpn:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L815
+	ldr	r3, .L817
 	push	{r4, r5, lr}
 	ldrh	r2, [r3, #0]
 	adds	r1, r2, #1
 	cmp	r2, #4
 	strh	r1, [r3, #0]	@ movhi
 	mov	r2, r3
-	bhi	.L810
-	cbz	r0, .L809
-.L810:
+	bhi	.L812
+	cbz	r0, .L811
+.L812:
 	movs	r3, #0
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L815+4
+	ldr	r2, .L817+4
 	movw	r4, #65535
 	ldrh	r5, [r2, #0]
-	ldr	r2, .L815+8
+	ldr	r2, .L817+8
 	ldr	r1, [r2, #0]
 	mov	r2, r3
-	b	.L812
-.L814:
+	b	.L814
+.L816:
 	ldrh	r0, [r1], #2
 	cmp	r0, r4
 	it	ne
 	addne	r3, r3, r0
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L812:
+.L814:
 	cmp	r2, r5
-	bne	.L814
-	ldr	r2, .L815+12
+	bne	.L816
+	ldr	r2, .L817+12
 	str	r3, [r2, #0]
-.L809:
+.L811:
 	pop	{r4, r5, pc}
-.L816:
+.L818:
 	.align	2
-.L815:
-	.word	.LANCHOR115
+.L817:
+	.word	.LANCHOR117
 	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	.LANCHOR116
+	.word	.LANCHOR101
+	.word	.LANCHOR118
 	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
 	.section	.text.ftl_set_blk_mode,"ax",%progbits
 	.align	1
@@ -6512,29 +6571,29 @@ ftl_set_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L821
+	ldr	r3, .L823
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	uxth	r2, r2
 	ldr	r3, [r3, #0]
-	cbz	r1, .L818
+	cbz	r1, .L820
 	movs	r1, #1
 	lsl	r0, r1, r0
 	ldr	r1, [r3, r2, lsl #2]
 	orrs	r0, r0, r1
-	b	.L820
-.L818:
+	b	.L822
+.L820:
 	movs	r1, #1
 	lsl	r0, r1, r0
 	ldr	r1, [r3, r2, lsl #2]
 	bic	r0, r1, r0
-.L820:
+.L822:
 	str	r0, [r3, r2, lsl #2]
 	bx	lr
-.L822:
+.L824:
 	.align	2
-.L821:
-	.word	.LANCHOR117
+.L823:
+	.word	.LANCHOR119
 	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
 	.section	.text.ftl_get_blk_mode,"ax",%progbits
 	.align	1
@@ -6546,7 +6605,7 @@ ftl_get_blk_mode:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L824
+	ldr	r3, .L826
 	lsrs	r2, r0, #5
 	and	r0, r0, #31
 	ldr	r3, [r3, #0]
@@ -6554,10 +6613,10 @@ ftl_get_blk_mode:
 	lsr	r0, r3, r0
 	and	r0, r0, #1
 	bx	lr
-.L825:
+.L827:
 	.align	2
-.L824:
-	.word	.LANCHOR117
+.L826:
+	.word	.LANCHOR119
 	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
 	.section	.text.FtlL2PDataInit,"ax",%progbits
 	.align	1
@@ -6568,15 +6627,15 @@ ftl_get_blk_mode:
 FtlL2PDataInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L829
+	ldr	r3, .L831
 	movs	r1, #0
 	push	{r4, r5, r6, r7, r8, lr}
 	ldr	r2, [r3, #0]
-	ldr	r3, .L829+4
-	ldr	r5, .L829+8
-	ldr	r4, .L829+12
+	ldr	r3, .L831+4
+	ldr	r5, .L831+8
+	ldr	r4, .L831+12
 	lsls	r2, r2, #1
-	ldr	r6, .L829+16
+	ldr	r6, .L831+16
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldrh	r3, [r4, #0]
@@ -6585,73 +6644,74 @@ FtlL2PDataInit:
 	muls	r2, r3, r2
 	ldr	r0, [r5, #0]
 	bl	memset
-	ldr	r3, .L829+20
+	ldr	r3, .L831+20
 	ldrh	r7, [r6, #0]
 	ldr	ip, [r5, #0]
 	movw	r5, #65535
 	ldr	r2, [r3, #0]
 	movs	r3, #0
 	ldrh	r6, [r4, #0]
-	mov	r1, r3
+	mov	r0, r3
 	mov	r4, r3
-	b	.L827
-.L828:
-	adds	r1, r1, #1
+	b	.L829
+.L830:
+	adds	r0, r0, #1
 	bic	r3, r3, #3
 	add	r3, ip, r3
 	str	r3, [r2, #-4]
-	uxth	r1, r1
+	uxth	r0, r0
 	mov	r3, r8
 	str	r4, [r2, #-8]
 	strh	r5, [r2, #-12]	@ movhi
-.L827:
+.L829:
 	adds	r2, r2, #12
-	cmp	r1, r7
+	cmp	r0, r7
 	add	r8, r3, r6
-	movw	r0, #65535
-	bne	.L828
-	ldr	r2, .L829
-	ldr	r3, .L829+24
+	movw	r1, #65535
+	bne	.L830
+	ldr	r2, .L831
+	ldr	r3, .L831+24
 	ldr	r2, [r2, #0]
-	strh	r0, [r3, #2]	@ movhi
-	strh	r0, [r3, #0]	@ movhi
+	strh	r1, [r3, #2]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
 	strh	r2, [r3, #10]	@ movhi
 	movw	r2, #61634
 	strh	r2, [r3, #4]	@ movhi
-	ldr	r2, .L829+28
+	ldr	r2, .L831+28
+	strh	r1, [r3, #40]	@ movhi
 	ldrh	r2, [r2, #0]
 	strh	r2, [r3, #8]	@ movhi
-	ldr	r2, .L829+32
+	ldr	r2, .L831+32
 	ldrh	r2, [r2, #0]
 	strh	r2, [r3, #6]	@ movhi
-	ldr	r2, .L829+36
+	ldr	r2, .L831+36
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #12]
-	ldr	r2, .L829+40
+	ldr	r2, .L831+40
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #16]
-	ldr	r2, .L829+4
+	ldr	r2, .L831+4
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #20]
-	ldr	r2, .L829+44
+	ldr	r2, .L831+44
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #24]
 	pop	{r4, r5, r6, r7, r8, pc}
-.L830:
+.L832:
 	.align	2
-.L829:
+.L831:
 	.word	.LANCHOR80
-	.word	.LANCHOR118
-	.word	.LANCHOR119
-	.word	.LANCHOR73
-	.word	.LANCHOR83
-	.word	.LANCHOR112
 	.word	.LANCHOR120
 	.word	.LANCHOR121
-	.word	.LANCHOR82
+	.word	.LANCHOR73
+	.word	.LANCHOR83
+	.word	.LANCHOR114
 	.word	.LANCHOR122
 	.word	.LANCHOR123
+	.word	.LANCHOR82
 	.word	.LANCHOR124
+	.word	.LANCHOR125
+	.word	.LANCHOR126
 	.size	FtlL2PDataInit, .-FtlL2PDataInit
 	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
 	.align	1
@@ -6664,51 +6724,51 @@ ftl_sb_update_avl_pages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	movs	r3, #0
 	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L838
+	ldr	r3, .L840
 	push	{r4, r5, r6, r7, lr}
 	movw	r4, #65535
 	ldrh	r3, [r3, #0]
-	b	.L832
-.L834:
+	b	.L834
+.L836:
 	add	r5, r2, #8
 	ldrh	r5, [r0, r5, lsl #1]
 	cmp	r5, r4
-	beq	.L833
+	beq	.L835
 	ldrh	r5, [r0, #4]
 	adds	r5, r5, #1
 	strh	r5, [r0, #4]	@ movhi
-.L833:
+.L835:
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L832:
+.L834:
 	cmp	r2, r3
-	bcc	.L834
-	ldr	r2, .L838+4
+	bcc	.L836
+	ldr	r2, .L840+4
 	mov	r4, r0
 	movw	r5, #65535
 	mvns	r1, r1
 	ldrh	r6, [r2, #0]
 	movs	r2, #0
-	b	.L835
-.L837:
+	b	.L837
+.L839:
 	ldrh	r7, [r4, #16]
 	cmp	r7, r5
-	beq	.L836
+	beq	.L838
 	ldrh	r7, [r0, #4]
 	adds	r7, r6, r7
 	adds	r7, r7, r1
 	strh	r7, [r0, #4]	@ movhi
-.L836:
+.L838:
 	adds	r2, r2, #1
 	adds	r4, r4, #2
 	uxth	r2, r2
-.L835:
+.L837:
 	cmp	r2, r3
-	bne	.L837
+	bne	.L839
 	pop	{r4, r5, r6, r7, pc}
-.L839:
+.L841:
 	.align	2
-.L838:
+.L840:
 	.word	.LANCHOR53
 	.word	.LANCHOR68
 	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -6721,29 +6781,29 @@ ftl_sb_update_avl_pages:
 make_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L847
+	ldr	r3, .L849
 	ldrh	r2, [r0, #0]
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L841
-	ldr	r1, .L847+4
-	movw	r2, #2145
-	ldr	r0, .L847+8
+	bcc	.L843
+	ldr	r1, .L849+4
+	movw	r2, #2296
+	ldr	r0, .L849+8
 	bl	printf
-	ldr	r0, .L847+12
-	ldr	r1, .L847+16
+	ldr	r0, .L849+12
+	ldr	r1, .L849+16
 	bl	printf
-.L841:
+.L843:
 	movs	r5, #0
-	ldr	r8, .L847+40
+	ldr	r8, .L849+40
 	strh	r5, [r4, #4]	@ movhi
 	movw	r6, #65535
 	strb	r5, [r4, #7]
-	ldr	r7, .L847+20
-	b	.L842
-.L844:
+	ldr	r7, .L849+20
+	b	.L844
+.L846:
 	ldrb	r0, [r7, r5]	@ zero_extendqisi2
 	add	sl, r5, #8
 	ldrh	r1, [r4, #0]
@@ -6751,58 +6811,58 @@ make_superblock:
 	strh	r6, [r4, sl, lsl #1]	@ movhi
 	mov	fp, r0
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L843
+	cbnz	r0, .L845
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	strh	fp, [r4, sl, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	strb	r3, [r4, #7]
-.L843:
+.L845:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L842:
+.L844:
 	ldrh	r3, [r8, #0]
 	cmp	r3, r5
-	bhi	.L844
-	ldr	r2, .L847+24
+	bhi	.L846
+	ldr	r2, .L849+24
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strb	r3, [r4, #9]
-	ldr	r3, .L847+28
+	ldr	r3, .L849+28
 	ldr	r3, [r3, #0]
-	cbz	r3, .L845
-	ldr	r3, .L847+32
+	cbz	r3, .L847
+	ldr	r3, .L849+32
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r2, lsl #1]
 	cmp	r3, #59
-	bhi	.L845
+	bhi	.L847
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L845:
-	ldr	r3, .L847+36
+.L847:
+	ldr	r3, .L849+36
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L846
+	cbz	r3, .L848
 	movs	r3, #1
 	strb	r3, [r4, #9]
-.L846:
+.L848:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L848:
+.L850:
 	.align	2
-.L847:
+.L849:
 	.word	.LANCHOR55
-	.word	.LANCHOR125
+	.word	.LANCHOR127
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	.LANCHOR62
 	.word	.LANCHOR68
-	.word	.LANCHOR126
-	.word	.LANCHOR94
-	.word	.LANCHOR7
+	.word	.LANCHOR128
+	.word	.LANCHOR96
+	.word	.LANCHOR0
 	.word	.LANCHOR53
 	.size	make_superblock, .-make_superblock
 	.section	.text.SupperBlkListInit,"ax",%progbits
@@ -6812,143 +6872,150 @@ make_superblock:
 	.thumb_func
 	.type	SupperBlkListInit, %function
 SupperBlkListInit:
-	@ args = 0, pretend = 0, frame = 0
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L860
+	ldr	r2, .L862
+	ldr	r3, .L862+4
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r1, #0
-	ldr	r3, .L860+4
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r6, #0
 	ldrh	r3, [r3, #0]
-	mov	r7, r6
+	movs	r5, #0
 	ldr	r0, [r2, #0]
 	movs	r2, #6
 	muls	r2, r3, r2
-	mov	r4, r6
+	mov	r4, r5
 	bl	memset
-	ldr	r3, .L860+8
-	ldr	sl, .L860+68
-	str	r6, [r3, #0]
-	ldr	r3, .L860+12
-	str	r6, [r3, #0]
-	ldr	r3, .L860+16
-	str	r6, [r3, #0]
-	ldr	r3, .L860+20
-	strh	r6, [r3, #0]	@ movhi
-	ldr	r3, .L860+24
-	strh	r6, [r3, #0]	@ movhi
-	b	.L850
-.L852:
-	ldr	r2, .L860+28
+	ldr	r3, .L862+8
+	mov	r8, r5
+	mov	sl, r5
+	str	r5, [r3, #0]
+	ldr	r3, .L862+12
+	str	r5, [r3, #0]
+	ldr	r3, .L862+16
+	str	r5, [r3, #0]
+	ldr	r3, .L862+20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L862+24
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L862+28
+	strh	r5, [r3, #0]	@ movhi
+	b	.L852
+.L854:
+	ldr	r2, .L862+32
 	mov	r1, r4
-	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	ldrb	r0, [r2, r7]	@ zero_extendqisi2
+	str	ip, [sp, #4]
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L851
-	ldrh	r3, [fp, #0]
-	adds	r5, r5, r3
-	uxth	r5, r5
-.L851:
-	add	r8, r8, #1
-	uxth	r8, r8
-	b	.L857
+	ldr	ip, [sp, #4]
+	cbnz	r0, .L853
+	ldrh	r2, [fp, #0]
+	adds	r6, r6, r2
+	uxth	r6, r6
+.L853:
+	adds	r7, r7, #1
+	b	.L859
+.L861:
+	movs	r7, #0
+	uxth	r3, r4
+	ldr	fp, .L862+76
+	mov	ip, r4
+	mov	r6, r7
+	mov	r4, r3
 .L859:
-	movs	r5, #0
-	ldr	fp, .L860+72
-	mov	r8, r5
-.L857:
-	ldr	r2, .L860+32
-	ldrh	r3, [r2, #0]
-	cmp	r3, r8
-	bhi	.L852
-	cbz	r5, .L853
-	mov	r1, r5
+	ldr	r3, .L862+36
+	ldrh	r2, [r3, #0]
+	cmp	r7, r2
+	blt	.L854
+	mov	r4, ip
+	cbz	r6, .L855
+	sxth	r1, r6
 	mov	r0, #32768
 	bl	__aeabi_idiv
-	uxth	r5, r0
-	b	.L854
-.L853:
-	ldr	r3, .L860+36
+	uxth	r6, r0
+	b	.L856
+.L855:
+	ldr	r3, .L862+40
 	movw	r2, #65535
 	ldr	r3, [r3, #0]
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L854:
-	ldr	r3, .L860
-	movs	r2, #6
+	strh	r2, [r3, ip, lsl #1]	@ movhi
+.L856:
+	ldr	r3, .L862
 	ldr	r3, [r3, #0]
-	mla	r3, r2, r4, r3
-	strh	r5, [r3, #4]	@ movhi
-	ldr	r3, .L860+40
+	adds	r3, r3, r5
+	strh	r6, [r3, #4]	@ movhi
+	ldr	r3, .L862+44
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L855
-	ldr	r3, .L860+44
+	cmp	r4, r3
+	beq	.L857
+	ldr	r3, .L862+48
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L855
-	ldr	r3, .L860+48
+	cmp	r4, r3
+	beq	.L857
+	ldr	r3, .L862+52
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	beq	.L855
-	ldr	r3, .L860+36
+	cmp	r4, r3
+	beq	.L857
+	ldr	r3, .L862+40
+	uxth	r0, r4
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r4, lsl #1]
-	cbnz	r3, .L856
-	adds	r6, r6, #1
-	mov	r0, r4
-	uxth	r6, r6
+	cbnz	r3, .L858
+	add	r8, r8, #1
+	uxth	r8, r8
 	bl	INSERT_FREE_LIST
-	b	.L855
-.L856:
-	adds	r7, r7, #1
-	mov	r0, r4
-	uxth	r7, r7
+	b	.L857
+.L858:
+	add	sl, sl, #1
+	uxth	sl, sl
 	bl	INSERT_DATA_LIST
-.L855:
+.L857:
 	adds	r4, r4, #1
-	uxth	r4, r4
-.L850:
-	ldrh	r3, [sl, #0]
+	adds	r5, r5, #6
+.L852:
+	ldr	r2, .L862+56
+	ldrh	r3, [r2, #0]
 	cmp	r4, r3
-	bcc	.L859
-	ldr	r2, .L860+20
-	strh	r7, [r2, #0]	@ movhi
-	ldr	r2, .L860+24
-	strh	r6, [r2, #0]	@ movhi
-	adds	r6, r7, r6
-	cmp	r6, r3
-	ble	.L858
-	ldr	r1, .L860+52
-	movw	r2, #2209
-	ldr	r0, .L860+56
+	blt	.L861
+	ldr	r2, .L862+20
+	strh	sl, [r2, #0]	@ movhi
+	ldr	r2, .L862+24
+	strh	r8, [r2, #0]	@ movhi
+	add	r8, sl, r8
+	cmp	r8, r3
+	ble	.L860
+	ldr	r1, .L862+60
+	movw	r2, #2366
+	ldr	r0, .L862+64
 	bl	printf
-	ldr	r0, .L860+60
-	ldr	r1, .L860+64
+	ldr	r0, .L862+68
+	ldr	r1, .L862+72
 	bl	printf
-.L858:
+.L860:
 	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L861:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L863:
 	.align	2
-.L860:
-	.word	.LANCHOR97
+.L862:
+	.word	.LANCHOR99
 	.word	.LANCHOR56
-	.word	.LANCHOR103
-	.word	.LANCHOR98
+	.word	.LANCHOR105
 	.word	.LANCHOR100
-	.word	.LANCHOR101
-	.word	.LANCHOR104
+	.word	.LANCHOR102
+	.word	.LANCHOR103
+	.word	.LANCHOR106
+	.word	.LANCHOR129
 	.word	.LANCHOR62
 	.word	.LANCHOR53
-	.word	.LANCHOR99
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+	.word	.LANCHOR101
 	.word	.LANCHOR109
-	.word	.LANCHOR127
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR55
+	.word	.LANCHOR130
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR55
 	.word	.LANCHOR68
 	.size	SupperBlkListInit, .-SupperBlkListInit
 	.section	.text.update_multiplier_value,"ax",%progbits
@@ -6964,44 +7031,44 @@ update_multiplier_value:
 	movs	r4, #0
 	mov	r6, r0
 	mov	r5, r4
-	ldr	sl, .L867+8
-	ldr	r8, .L867+12
-	ldr	r7, .L867
-	b	.L863
-.L865:
+	ldr	sl, .L869+8
+	ldr	r8, .L869+12
+	ldr	r7, .L869
+	b	.L865
+.L867:
 	mov	r1, r6
 	ldrb	r0, [r8, r5]	@ zero_extendqisi2
 	bl	V2P_block
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L864
+	cbnz	r0, .L866
 	ldrh	r3, [r7, #0]
 	adds	r4, r4, r3
 	uxth	r4, r4
-.L864:
+.L866:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L863:
+.L865:
 	ldrh	r3, [sl, #0]
 	cmp	r3, r5
-	bhi	.L865
-	cbz	r4, .L866
+	bhi	.L867
+	cbz	r4, .L868
 	mov	r1, r4
 	mov	r0, #32768
 	bl	__aeabi_idiv
 	uxth	r4, r0
-.L866:
-	ldr	r3, .L867+4
+.L868:
+	ldr	r3, .L869+4
 	movs	r2, #6
 	movs	r0, #0
 	ldr	r3, [r3, #0]
 	mla	r6, r2, r6, r3
 	strh	r4, [r6, #4]	@ movhi
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L868:
+.L870:
 	.align	2
-.L867:
+.L869:
 	.word	.LANCHOR68
-	.word	.LANCHOR97
+	.word	.LANCHOR99
 	.word	.LANCHOR53
 	.word	.LANCHOR62
 	.size	update_multiplier_value, .-update_multiplier_value
@@ -7015,28 +7082,28 @@ GetFreeBlockMinEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L872
+	ldr	r3, .L874
 	ldr	r0, [r3, #0]
-	cbz	r0, .L870
-	ldr	r3, .L872+4
+	cbz	r0, .L872
+	ldr	r3, .L874+4
 	ldr	r3, [r3, #0]
 	subs	r0, r0, r3
-	ldr	r3, .L872+8
+	ldr	r3, .L874+8
 	asrs	r0, r0, #1
 	muls	r0, r3, r0
-	ldr	r3, .L872+12
+	ldr	r3, .L874+12
 	uxth	r0, r0
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r0, lsl #1]
-.L870:
+.L872:
 	bx	lr
-.L873:
+.L875:
 	.align	2
-.L872:
-	.word	.LANCHOR103
-	.word	.LANCHOR97
+.L874:
+	.word	.LANCHOR105
+	.word	.LANCHOR99
 	.word	-1431655765
-	.word	.LANCHOR94
+	.word	.LANCHOR96
 	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
 	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
 	.align	1
@@ -7047,11 +7114,11 @@ GetFreeBlockMinEraseCount:
 GetFreeBlockMaxEraseCount:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L881
+	ldr	r3, .L883
 	push	{r4, r5, r6, lr}
 	ldr	r3, [r3, #0]
-	cbz	r3, .L880
-	ldr	r2, .L881+4
+	cbz	r3, .L882
+	ldr	r2, .L883+4
 	movs	r1, #7
 	movw	r5, #65535
 	ldrh	r2, [r2, #0]
@@ -7060,43 +7127,43 @@ GetFreeBlockMaxEraseCount:
 	cmp	r0, r2
 	it	gt
 	uxthgt	r0, r2
-	ldr	r2, .L881+8
+	ldr	r2, .L883+8
 	movs	r6, #6
 	ldr	r1, [r2, #0]
-	ldr	r2, .L881+12
+	ldr	r2, .L883+12
 	subs	r3, r3, r1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
 	movs	r2, #0
 	uxth	r3, r3
-	b	.L877
-.L879:
+	b	.L879
+.L881:
 	mul	r4, r6, r3
 	ldrh	r4, [r1, r4]
 	cmp	r4, r5
-	beq	.L878
+	beq	.L880
 	adds	r2, r2, #1
 	mov	r3, r4
 	uxth	r2, r2
-.L877:
+.L879:
 	cmp	r2, r0
-	bne	.L879
-.L878:
-	ldr	r2, .L881+16
+	bne	.L881
+.L880:
+	ldr	r2, .L883+16
 	ldr	r2, [r2, #0]
 	ldrh	r0, [r2, r3, lsl #1]
 	pop	{r4, r5, r6, pc}
-.L880:
+.L882:
 	mov	r0, r3
 	pop	{r4, r5, r6, pc}
-.L882:
+.L884:
 	.align	2
-.L881:
-	.word	.LANCHOR103
-	.word	.LANCHOR104
-	.word	.LANCHOR97
+.L883:
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.word	.LANCHOR99
 	.word	-1431655765
-	.word	.LANCHOR94
+	.word	.LANCHOR96
 	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
 	.section	.text.free_data_superblock,"ax",%progbits
 	.align	1
@@ -7110,19 +7177,19 @@ free_data_superblock:
 	movw	r2, #65535
 	cmp	r0, r2
 	push	{r3, lr}
-	beq	.L884
-	ldr	r2, .L885
+	beq	.L886
+	ldr	r2, .L887
 	movs	r1, #0
 	ldr	r2, [r2, #0]
 	strh	r1, [r2, r0, lsl #1]	@ movhi
 	bl	INSERT_FREE_LIST
-.L884:
+.L886:
 	movs	r0, #0
 	pop	{r3, pc}
-.L886:
+.L888:
 	.align	2
-.L885:
-	.word	.LANCHOR99
+.L887:
+	.word	.LANCHOR101
 	.size	free_data_superblock, .-free_data_superblock
 	.section	.text.FtlGcBufInit,"ax",%progbits
 	.align	1
@@ -7133,29 +7200,29 @@ free_data_superblock:
 FtlGcBufInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L892
+	ldr	r3, .L894
 	movs	r2, #0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r2
 	str	r2, [r3, #0]
-	ldr	r3, .L892+4
+	ldr	r3, .L894+4
 	ldrh	ip, [r3, #0]
-	ldr	r3, .L892+8
+	ldr	r3, .L894+8
 	ldr	r7, [r3, #0]
-	ldr	r3, .L892+12
+	ldr	r3, .L894+12
 	ldr	r6, [r3, #0]
-	ldr	r3, .L892+16
+	ldr	r3, .L894+16
 	ldr	r1, [r3, #0]
-	ldr	r3, .L892+20
+	ldr	r3, .L894+20
 	ldrh	r5, [r3, #0]
-	ldr	r3, .L892+24
+	ldr	r3, .L894+24
 	str	r5, [sp, #4]
 	ldrh	fp, [r3, #0]
-	ldr	r3, .L892+28
+	ldr	r3, .L894+28
 	ldr	r0, [r3, #0]
 	mov	r3, r2
-	b	.L888
-.L889:
+	b	.L890
+.L891:
 	movs	r5, #1
 	bic	r4, r4, #3
 	adds	r3, r3, r5
@@ -7170,30 +7237,30 @@ FtlGcBufInit:
 	mov	r4, r8
 	str	r2, [r0, #-24]
 	mov	r2, sl
-.L888:
+.L890:
 	adds	r1, r1, #12
 	ldr	r5, [sp, #4]
 	adds	r0, r0, #36
 	cmp	r3, ip
 	add	r8, r4, r5
 	add	sl, r2, fp
-	bne	.L889
-	ldr	r1, .L892+8
+	bne	.L891
+	ldr	r1, .L894+8
 	movs	r4, #12
-	ldr	r2, .L892+32
+	ldr	r2, .L894+32
 	mov	fp, #0
 	ldr	ip, [r1, #0]
-	ldr	r1, .L892+20
+	ldr	r1, .L894+20
 	ldr	r8, [r2, #0]
-	ldr	r2, .L892+16
+	ldr	r2, .L894+16
 	ldrh	r7, [r1, #0]
-	ldr	r1, .L892+12
+	ldr	r1, .L894+12
 	ldr	r2, [r2, #0]
 	ldr	r6, [r1, #0]
-	ldr	r1, .L892+24
+	ldr	r1, .L894+24
 	ldrh	r5, [r1, #0]
-	b	.L890
-.L891:
+	b	.L892
+.L893:
 	mul	r1, r4, r3
 	mul	r0, r7, r3
 	add	sl, r2, r1
@@ -7207,22 +7274,22 @@ FtlGcBufInit:
 	bic	r1, r1, #3
 	adds	r1, r6, r1
 	str	r1, [sl, #4]
-.L890:
+.L892:
 	cmp	r3, r8
-	bcc	.L891
+	bcc	.L893
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L893:
+.L895:
 	.align	2
-.L892:
-	.word	.LANCHOR128
-	.word	.LANCHOR53
-	.word	.LANCHOR129
-	.word	.LANCHOR130
+.L894:
 	.word	.LANCHOR131
-	.word	.LANCHOR73
-	.word	.LANCHOR74
+	.word	.LANCHOR53
 	.word	.LANCHOR132
 	.word	.LANCHOR133
+	.word	.LANCHOR134
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR135
+	.word	.LANCHOR136
 	.size	FtlGcBufInit, .-FtlGcBufInit
 	.section	.text.FtlVariablesInit,"ax",%progbits
 	.align	1
@@ -7235,37 +7302,37 @@ FtlVariablesInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L895
+	ldr	r3, .L897
 	movw	r2, #65535
-	ldr	r5, .L895+4
+	ldr	r5, .L897+4
 	mov	r1, r4
 	str	r4, [r3, #0]
-	ldr	r3, .L895+8
+	ldr	r3, .L897+8
 	strh	r2, [r3, #0]	@ movhi
 	mov	r2, #-1
-	ldr	r3, .L895+12
+	ldr	r3, .L897+12
 	str	r4, [r3, #0]
-	ldr	r3, .L895+16
+	ldr	r3, .L897+16
 	str	r4, [r3, #0]
-	ldr	r3, .L895+20
+	ldr	r3, .L897+20
 	str	r2, [r3, #0]
-	ldr	r3, .L895+24
+	ldr	r3, .L897+24
 	str	r4, [r3, #0]
-	ldr	r3, .L895+28
+	ldr	r3, .L897+28
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L895+32
+	ldr	r3, .L897+32
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L895+36
+	ldr	r3, .L897+36
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldrh	r2, [r5, #0]
-	ldr	r3, .L895+40
+	ldr	r3, .L897+40
 	mov	r1, r4
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L895+44
+	ldr	r3, .L897+44
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
@@ -7273,33 +7340,33 @@ FtlVariablesInit:
 	bl	memset
 	mov	r1, r4
 	movs	r2, #48
-	ldr	r0, .L895+48
+	ldr	r0, .L897+48
 	bl	memset
 	mov	r1, r4
 	mov	r2, #512
-	ldr	r0, .L895+52
+	ldr	r0, .L897+52
 	bl	memset
 	bl	FtlGcBufInit
 	bl	FtlL2PDataInit
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L896:
+.L898:
 	.align	2
-.L895:
-	.word	.LANCHOR134
-	.word	.LANCHOR56
-	.word	.LANCHOR135
-	.word	.LANCHOR136
+.L897:
 	.word	.LANCHOR137
+	.word	.LANCHOR56
 	.word	.LANCHOR138
-	.word	.LANCHOR126
-	.word	.LANCHOR85
-	.word	.LANCHOR77
-	.word	.LANCHOR86
-	.word	.LANCHOR94
 	.word	.LANCHOR139
 	.word	.LANCHOR140
 	.word	.LANCHOR141
+	.word	.LANCHOR128
+	.word	.LANCHOR86
+	.word	.LANCHOR77
+	.word	.LANCHOR87
+	.word	.LANCHOR96
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR144
 	.size	FtlVariablesInit, .-FtlVariablesInit
 	.section	.text.FtlGcBufFree,"ax",%progbits
 	.align	1
@@ -7310,50 +7377,50 @@ FtlVariablesInit:
 FtlGcBufFree:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L904
+	ldr	r3, .L906
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r5, #36
 	ldr	r6, [r3, #0]
-	ldr	r3, .L904+4
+	ldr	r3, .L906+4
 	ldr	r4, [r3, #0]
 	movs	r3, #0
 	mov	fp, r3
-	b	.L898
-.L901:
+	b	.L900
+.L903:
 	mov	ip, #12
 	mul	r3, ip, r2
 	add	sl, r4, r3
 	ldr	ip, [r4, r3]
 	ldr	r3, [r7, #8]
 	cmp	ip, r3
-	bne	.L899
+	bne	.L901
 	mov	r3, r8
 	str	fp, [sl, #8]
-	b	.L900
-.L899:
+	b	.L902
+.L901:
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L903:
+.L905:
 	cmp	r2, r6
-	bcc	.L901
+	bcc	.L903
 	mov	r3, r8
-.L900:
+.L902:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L898:
+.L900:
 	cmp	r3, r1
-	bcs	.L897
+	bcs	.L899
 	mla	r7, r5, r3, r0
 	movs	r2, #0
 	mov	r8, r3
-	b	.L903
-.L897:
+	b	.L905
+.L899:
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L905:
+.L907:
 	.align	2
-.L904:
-	.word	.LANCHOR133
-	.word	.LANCHOR131
+.L906:
+	.word	.LANCHOR136
+	.word	.LANCHOR134
 	.size	FtlGcBufFree, .-FtlGcBufFree
 	.section	.text.FtlGcBufAlloc,"ax",%progbits
 	.align	1
@@ -7364,49 +7431,49 @@ FtlGcBufFree:
 FtlGcBufAlloc:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L913
+	ldr	r3, .L915
 	push	{r4, r5, r6, r7, r8, sl, lr}
 	movs	r7, #12
 	ldr	r8, [r3, #0]
 	movs	r6, #1
-	ldr	r3, .L913+4
+	ldr	r3, .L915+4
 	movs	r5, #36
 	ldr	ip, [r3, #0]
 	movs	r3, #0
-	b	.L907
-.L910:
+	b	.L909
+.L912:
 	mla	r4, r7, r2, ip
 	ldr	sl, [r4, #8]
 	cmp	sl, #0
-	bne	.L908
+	bne	.L910
 	mla	r2, r5, r3, r0
 	str	r6, [r4, #8]
 	ldr	sl, [r4, #0]
 	ldr	r4, [r4, #4]
 	str	sl, [r2, #8]
 	str	r4, [r2, #12]
-	b	.L909
-.L908:
+	b	.L911
+.L910:
 	adds	r2, r2, #1
 	uxth	r2, r2
-	b	.L911
-.L912:
+	b	.L913
+.L914:
 	movs	r2, #0
-.L911:
+.L913:
 	cmp	r2, r8
-	bcc	.L910
-.L909:
+	bcc	.L912
+.L911:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L907:
+.L909:
 	cmp	r3, r1
-	bcc	.L912
+	bcc	.L914
 	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L914:
+.L916:
 	.align	2
-.L913:
-	.word	.LANCHOR133
-	.word	.LANCHOR131
+.L915:
+	.word	.LANCHOR136
+	.word	.LANCHOR134
 	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
 	.section	.text.IsBlkInGcList,"ax",%progbits
 	.align	1
@@ -7417,32 +7484,32 @@ FtlGcBufAlloc:
 IsBlkInGcList:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L920
+	ldr	r3, .L922
 	push	{r4, lr}
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L920+4
+	ldr	r3, .L922+4
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-	b	.L916
-.L918:
+	b	.L918
+.L920:
 	ldrh	r4, [r2], #2
 	cmp	r4, r0
-	beq	.L919
+	beq	.L921
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L916:
+.L918:
 	cmp	r3, r1
-	bne	.L918
+	bne	.L920
 	movs	r0, #0
 	pop	{r4, pc}
-.L919:
+.L921:
 	movs	r0, #1
 	pop	{r4, pc}
-.L921:
+.L923:
 	.align	2
-.L920:
-	.word	.LANCHOR142
-	.word	.LANCHOR143
+.L922:
+	.word	.LANCHOR145
+	.word	.LANCHOR146
 	.size	IsBlkInGcList, .-IsBlkInGcList
 	.section	.text.FtlGcUpdatePage,"ax",%progbits
 	.align	1
@@ -7459,31 +7526,31 @@ FtlGcUpdatePage:
 	mov	r5, r1
 	mov	r6, r2
 	bl	P2V_block_in_plane
-	ldr	r3, .L926
+	ldr	r3, .L928
 	ldrh	r7, [r3, #0]
-	ldr	r3, .L926+4
+	ldr	r3, .L928+4
 	ldr	r2, [r3, #0]
 	movs	r3, #0
 	mov	r1, r2
-	b	.L923
-.L925:
+	b	.L925
+.L927:
 	ldrh	ip, [r1], #2
 	cmp	ip, r0
-	beq	.L924
+	beq	.L926
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L923:
+.L925:
 	cmp	r3, r7
-	bne	.L925
+	bne	.L927
 	strh	r0, [r2, r3, lsl #1]	@ movhi
-	ldr	r3, .L926
+	ldr	r3, .L928
 	ldrh	r2, [r3, #0]
 	adds	r2, r2, #1
 	strh	r2, [r3, #0]	@ movhi
-.L924:
-	ldr	r0, .L926+8
+.L926:
+	ldr	r0, .L928+8
 	movs	r1, #12
-	ldr	r3, .L926+12
+	ldr	r3, .L928+12
 	ldr	r0, [r0, #0]
 	ldrh	r2, [r3, #0]
 	muls	r1, r2, r1
@@ -7494,13 +7561,13 @@ FtlGcUpdatePage:
 	str	r6, [r7, #8]
 	strh	r2, [r3, #0]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L927:
+.L929:
 	.align	2
-.L926:
-	.word	.LANCHOR142
-	.word	.LANCHOR143
+.L928:
 	.word	.LANCHOR145
-	.word	.LANCHOR144
+	.word	.LANCHOR146
+	.word	.LANCHOR148
+	.word	.LANCHOR147
 	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
 	.section	.text.FtlGcPageVarInit,"ax",%progbits
 	.align	1
@@ -7511,20 +7578,20 @@ FtlGcUpdatePage:
 FtlGcPageVarInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L929
+	ldr	r2, .L931
 	movs	r3, #0
 	push	{r4, lr}
 	movs	r1, #255
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r4, .L929+4
-	ldr	r2, .L929+8
+	ldr	r4, .L931+4
+	ldr	r2, .L931+8
 	strh	r3, [r2, #0]	@ movhi
 	ldrh	r2, [r4, #0]
-	ldr	r3, .L929+12
+	ldr	r3, .L931+12
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r2, .L929+16
+	ldr	r2, .L931+16
 	ldrh	r3, [r4, #0]
 	movs	r1, #255
 	ldr	r0, [r2, #0]
@@ -7533,15 +7600,51 @@ FtlGcPageVarInit:
 	bl	memset
 	pop	{r4, lr}
 	b	FtlGcBufInit
-.L930:
+.L932:
 	.align	2
-.L929:
-	.word	.LANCHOR142
-	.word	.LANCHOR70
-	.word	.LANCHOR144
-	.word	.LANCHOR143
+.L931:
 	.word	.LANCHOR145
+	.word	.LANCHOR70
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR148
 	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcRefreshOpenBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshOpenBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcRefreshOpenBlock, %function
+FtlGcRefreshOpenBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L936
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L934
+	ldr	r3, .L936+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L934
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L935
+	strh	r0, [r4, #0]	@ movhi
+	b	.L934
+.L935:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L934:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L937:
+	.align	2
+.L936:
+	.word	.LANCHOR149
+	.word	.LANCHOR150
+	.size	FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
 	.section	.text.FtlGcRefreshBlock,"ax",%progbits
 	.align	1
 	.global	FtlGcRefreshBlock
@@ -7552,31 +7655,31 @@ FtlGcRefreshBlock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, lr}
-	ldr	r4, .L934
+	ldr	r4, .L941
 	ldrh	r5, [r4, #0]
 	cmp	r5, r0
-	beq	.L932
-	ldr	r3, .L934+4
+	beq	.L939
+	ldr	r3, .L941+4
 	ldrh	r1, [r3, #0]
 	cmp	r1, r0
-	beq	.L932
+	beq	.L939
 	movw	r2, #65535
 	cmp	r5, r2
-	bne	.L933
+	bne	.L940
 	strh	r0, [r4, #0]	@ movhi
-	b	.L932
-.L933:
+	b	.L939
+.L940:
 	cmp	r1, r2
 	it	eq
 	strheq	r0, [r3, #0]	@ movhi
-.L932:
+.L939:
 	movs	r0, #0
 	pop	{r4, r5, pc}
-.L935:
+.L942:
 	.align	2
-.L934:
-	.word	.LANCHOR146
-	.word	.LANCHOR147
+.L941:
+	.word	.LANCHOR149
+	.word	.LANCHOR150
 	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
 	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
 	.align	1
@@ -7592,49 +7695,49 @@ FtlGcMarkBadPhyBlk:
 	bl	P2V_block_in_plane
 	mov	r5, r0
 	bl	FtlGcRefreshBlock
-	ldr	r3, .L941
+	ldr	r3, .L948
 	ldr	r3, [r3, #0]
-	cbz	r3, .L937
-	ldr	r3, .L941+4
+	cbz	r3, .L944
+	ldr	r3, .L948+4
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
 	cmp	r2, #29
-	bls	.L937
+	bls	.L944
 	subs	r2, r2, #30
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-.L937:
-	ldr	r3, .L941+8
-	ldr	r2, .L941+12
+.L944:
+	ldr	r3, .L948+8
+	ldr	r2, .L948+12
 	ldrh	r1, [r3, #0]
 	movs	r3, #0
-	b	.L938
-.L940:
+	b	.L945
+.L947:
 	ldrh	r0, [r2, #2]!
 	cmp	r0, r4
-	beq	.L939
+	beq	.L946
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L938:
+.L945:
 	cmp	r3, r1
-	bne	.L940
+	bne	.L947
 	cmp	r3, #15
-	bhi	.L939
-	ldr	r2, .L941+16
+	bhi	.L946
+	ldr	r2, .L948+16
 	strh	r4, [r2, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
-	ldr	r2, .L941+8
+	ldr	r2, .L948+8
 	strh	r3, [r2, #0]	@ movhi
-.L939:
+.L946:
 	movs	r0, #0
 	pop	{r3, r4, r5, pc}
-.L942:
+.L949:
 	.align	2
-.L941:
-	.word	.LANCHOR126
-	.word	.LANCHOR94
-	.word	.LANCHOR148
-	.word	.LANCHOR149-2
-	.word	.LANCHOR149
+.L948:
+	.word	.LANCHOR128
+	.word	.LANCHOR96
+	.word	.LANCHOR151
+	.word	.LANCHOR152-2
+	.word	.LANCHOR152
 	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
 	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
 	.align	1
@@ -7645,23 +7748,23 @@ FtlGcMarkBadPhyBlk:
 FtlGcReFreshBadBlk:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L946
+	ldr	r3, .L953
 	push	{r4, lr}
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L944
-	ldr	r2, .L946+4
+	cbz	r3, .L951
+	ldr	r2, .L953+4
 	ldrh	r1, [r2, #0]
 	movw	r2, #65535
 	cmp	r1, r2
-	bne	.L944
-	ldr	r4, .L946+8
+	bne	.L951
+	ldr	r4, .L953+8
 	ldrh	r2, [r4, #0]
 	cmp	r2, r3
-	bcc	.L945
+	bcc	.L952
 	movs	r3, #0
 	strh	r3, [r4, #0]	@ movhi
-.L945:
-	ldr	r3, .L946+12
+.L952:
+	ldr	r3, .L953+12
 	ldrh	r2, [r4, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	bl	P2V_block_in_plane
@@ -7669,16 +7772,16 @@ FtlGcReFreshBadBlk:
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-.L944:
+.L951:
 	movs	r0, #0
 	pop	{r4, pc}
-.L947:
+.L954:
 	.align	2
-.L946:
-	.word	.LANCHOR148
-	.word	.LANCHOR146
-	.word	.LANCHOR150
+.L953:
+	.word	.LANCHOR151
 	.word	.LANCHOR149
+	.word	.LANCHOR153
+	.word	.LANCHOR152
 	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
 	.section	.text.ftl_memset,"ax",%progbits
 	.align	1
@@ -7726,11 +7829,11 @@ rknand_get_clk_rate:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r0, .L952
+	ldr	r0, .L959
 	bx	lr
-.L953:
+.L960:
 	.align	2
-.L952:
+.L959:
 	.word	148000000
 	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
 	.section	.text.ftl_malloc,"ax",%progbits
@@ -7755,81 +7858,85 @@ ftl_malloc:
 FtlMemInit:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L960
+	ldr	r3, .L967
 	push	{r0, r1, r4, r5, r6, r7, r8, lr}
 	movs	r1, #0
-	str	r1, [r3, #0]
+	strh	r1, [r3, #0]	@ movhi
 	movs	r5, #12
-	ldr	r3, .L960+4
-	ldr	r2, .L960+8
-	ldr	r4, .L960+12
+	ldr	r3, .L967+4
+	ldr	r2, .L967+8
+	ldr	r4, .L967+12
 	str	r1, [r3, #0]
-	ldr	r3, .L960+16
+	ldr	r3, .L967+16
 	ldrh	r0, [r4, #0]
-	ldr	r8, .L960+296
+	ldr	r8, .L967+304
 	str	r1, [r3, #0]
-	ldr	r3, .L960+20
+	ldr	r3, .L967+20
 	lsls	r0, r0, #1
-	ldr	r7, .L960+24
+	ldr	r7, .L967+24
+	str	r1, [r3, #0]
+	ldr	r3, .L967+28
 	str	r1, [r3, #0]
-	ldr	r3, .L960+28
+	ldr	r3, .L967+32
 	str	r1, [r3, #0]
-	ldr	r3, .L960+32
+	ldr	r3, .L967+36
 	str	r1, [r3, #0]
-	ldr	r3, .L960+36
+	ldr	r3, .L967+40
 	str	r1, [r3, #0]
-	ldr	r3, .L960+40
+	ldr	r3, .L967+44
 	str	r1, [r3, #0]
-	ldr	r3, .L960+44
+	ldr	r3, .L967+48
 	str	r1, [r3, #0]
-	ldr	r3, .L960+48
+	ldr	r3, .L967+52
 	str	r1, [r3, #0]
-	ldr	r3, .L960+52
+	ldr	r3, .L967+56
 	str	r1, [r3, #0]
-	ldr	r3, .L960+56
+	ldr	r3, .L967+60
 	str	r1, [r3, #0]
-	ldr	r3, .L960+60
+	ldr	r3, .L967+64
 	str	r1, [r3, #0]
-	ldr	r3, .L960+64
+	ldr	r3, .L967+68
 	str	r1, [r3, #0]
-	ldr	r3, .L960+68
+	ldr	r3, .L967+72
 	str	r1, [r3, #0]
-	ldr	r3, .L960+72
+	ldr	r3, .L967+76
 	str	r1, [r3, #0]
-	ldr	r3, .L960+76
+	ldr	r3, .L967+80
 	str	r1, [r3, #0]
 	movw	r3, #65535
 	str	r3, [r2, #0]
-	ldr	r2, .L960+80
+	ldr	r2, .L967+84
 	str	r1, [r2, #0]
-	ldr	r2, .L960+84
+	ldr	r2, .L967+88
 	str	r1, [r2, #0]
-	ldr	r2, .L960+88
+	ldr	r2, .L967+92
 	str	r1, [r2, #0]
-	ldr	r2, .L960+92
+	ldr	r2, .L967+96
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r2, .L960+96
+	ldr	r2, .L967+100
 	strh	r3, [r2, #0]	@ movhi
 	movs	r2, #32
-	ldr	r3, .L960+100
+	ldr	r3, .L967+104
 	strh	r2, [r3, #0]	@ movhi
 	movs	r2, #128
-	ldr	r3, .L960+104
+	ldr	r3, .L967+108
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L960+108
+	ldr	r3, .L967+112
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L960+112
+	ldr	r3, .L967+116
 	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L960+116
+	ldr	r3, .L967+120
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L967+124
 	strh	r1, [r3, #0]	@ movhi
 	str	r1, [sp, #4]
 	bl	ftl_malloc
-	ldr	r3, .L960+120
+	ldr	r3, .L967+128
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+124
+	ldr	r3, .L967+132
 	movs	r4, #36
 	str	r0, [r3, #0]
 	ldrh	r3, [r8, #0]
@@ -7837,24 +7944,24 @@ FtlMemInit:
 	lsls	r6, r4, #2
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L960+128
+	ldr	r3, .L967+136
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+132
+	ldr	r3, .L967+140
 	str	r0, [r3, #0]
 	mov	r0, r6
 	bl	ftl_malloc
-	ldr	r3, .L960+136
-	ldr	r6, .L960+140
+	ldr	r3, .L967+144
+	ldr	r6, .L967+148
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+144
+	ldr	r3, .L967+152
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+148
+	ldr	r3, .L967+156
 	ldrh	r4, [r6, #0]
 	str	r0, [r3, #0]
 	mov	r0, r4
@@ -7863,153 +7970,158 @@ FtlMemInit:
 	adds	r3, r3, #1
 	str	r3, [r7, #0]
 	bl	ftl_malloc
-	ldr	r3, .L960+152
+	ldr	r3, .L967+160
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+156
+	ldr	r3, .L967+164
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+160
+	ldr	r3, .L967+168
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r4, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+164
+	ldr	r3, .L967+172
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+168
+	ldr	r3, .L967+176
 	str	r0, [r3, #0]
 	mov	r0, r4
 	bl	ftl_malloc
-	ldr	r3, .L960+172
-	ldr	r4, .L960+176
+	ldr	r3, .L967+180
+	ldr	r4, .L967+184
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+180
+	ldr	r3, .L967+188
 	ldrh	r8, [r8, #0]
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	mul	r8, r8, r3
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+184
+	ldr	r3, .L967+192
 	str	r0, [r3, #0]
 	lsl	r0, r8, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+188
+	ldr	r3, .L967+196
 	str	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
 	ldr	r0, [r7, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r4, .L960+192
-	ldr	r3, .L960+196
-	ldr	r7, .L960+200
+	ldr	r4, .L967+200
+	ldr	r3, .L967+204
+	ldr	r7, .L967+208
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	uxth	r0, r0
 	strh	r0, [r7, #0]	@ movhi
 	bl	ftl_malloc
-	ldr	r3, .L960+204
+	ldr	r3, .L967+212
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	addw	r0, r0, #547
 	lsrs	r0, r0, #9
 	strh	r0, [r7, #0]	@ movhi
-	ldr	r7, .L960+208
+	ldr	r7, .L967+216
 	lsls	r0, r0, #9
 	bl	ftl_malloc
-	ldr	r3, .L960+212
+	ldr	r3, .L967+220
 	str	r0, [r3, #0]
 	adds	r0, r0, #32
-	ldr	r3, .L960+216
+	ldr	r3, .L967+224
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L960+220
+	ldr	r3, .L967+228
 	str	r0, [r3, #0]
 	ldr	r3, [r7, #0]
 	lsl	r8, r3, #1
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+224
+	ldr	r3, .L967+232
 	str	r0, [r3, #0]
 	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+228
-	ldr	r8, .L960+300
+	ldr	r3, .L967+236
+	ldr	r8, .L967+308
 	str	r0, [r3, #0]
 	ldrh	r0, [r4, #0]
 	lsrs	r0, r0, #3
 	adds	r0, r0, #4
 	bl	ftl_malloc
-	ldr	r3, .L960+232
+	ldr	r3, .L967+240
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L960+236
+	ldr	r3, .L967+244
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #1
 	bl	ftl_malloc
-	ldr	r3, .L960+240
+	ldr	r3, .L967+248
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
-	ldr	r8, .L960+304
+	ldr	r8, .L967+312
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+244
+	ldr	r3, .L967+252
 	str	r0, [r3, #0]
 	ldrh	r0, [r8, #0]
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+248
+	ldr	r3, .L967+256
 	ldrh	r2, [r8, #0]
 	ldr	r1, [sp, #4]
 	lsls	r2, r2, #2
 	str	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L960+252
-	ldrh	r0, [r3, #0]
-	lsls	r0, r0, #2
+	ldr	r3, .L967+260
+	ldrh	r8, [r3, #0]
+	lsl	r8, r8, #2
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L967+264
+	str	r0, [r3, #0]
+	mov	r0, r8
 	bl	ftl_malloc
-	ldr	r3, .L960+256
+	ldr	r3, .L967+268
 	str	r0, [r3, #0]
 	ldr	r0, [r7, #0]
-	ldr	r7, .L960+260
+	ldr	r7, .L967+272
 	lsls	r0, r0, #2
 	bl	ftl_malloc
-	ldr	r3, .L960+264
+	ldr	r3, .L967+276
 	str	r0, [r3, #0]
 	ldrh	r0, [r7, #0]
 	muls	r0, r5, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+268
-	ldr	r5, .L960+272
+	ldr	r3, .L967+280
+	ldr	r5, .L967+284
 	str	r0, [r3, #0]
 	ldrh	r3, [r7, #0]
 	ldrh	r0, [r6, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+276
+	ldr	r3, .L967+288
 	str	r0, [r3, #0]
 	movs	r0, #6
 	ldrh	r3, [r4, #0]
 	muls	r0, r3, r0
 	bl	ftl_malloc
-	ldr	r3, .L960+280
-	ldr	r4, .L960+284
+	ldr	r3, .L967+292
+	ldr	r4, .L967+296
 	ldrh	r2, [r5, #0]
 	str	r0, [r3, #0]
-	ldr	r3, .L960+288
+	ldr	r3, .L967+300
 	ldrh	r3, [r3, #0]
 	adds	r3, r3, #31
 	lsrs	r3, r3, #5
@@ -8017,123 +8129,127 @@ FtlMemInit:
 	muls	r3, r2, r3
 	lsls	r0, r3, #2
 	bl	ftl_malloc
-	ldr	r2, .L960+292
-	ldrh	r4, [r4, #0]
-	movs	r1, #1
-	mov	r3, r2
-	ldrh	r5, [r5, #0]
-	lsls	r4, r4, #2
-	str	r0, [r3, #28]!
-	mov	r0, r4
-	b	.L956
-.L961:
+	b	.L968
+.L969:
 	.align	2
-.L960:
-	.word	.LANCHOR151
-	.word	.LANCHOR152
-	.word	.LANCHOR167
-	.word	.LANCHOR70
-	.word	.LANCHOR153
+.L967:
+	.word	.LANCHOR129
 	.word	.LANCHOR154
-	.word	.LANCHOR133
+	.word	.LANCHOR170
+	.word	.LANCHOR70
 	.word	.LANCHOR155
 	.word	.LANCHOR156
+	.word	.LANCHOR136
 	.word	.LANCHOR157
 	.word	.LANCHOR158
 	.word	.LANCHOR159
 	.word	.LANCHOR160
 	.word	.LANCHOR161
 	.word	.LANCHOR162
-	.word	.LANCHOR95
 	.word	.LANCHOR163
 	.word	.LANCHOR164
 	.word	.LANCHOR165
+	.word	.LANCHOR97
 	.word	.LANCHOR166
+	.word	.LANCHOR167
 	.word	.LANCHOR168
 	.word	.LANCHOR169
-	.word	.LANCHOR88
-	.word	.LANCHOR146
-	.word	.LANCHOR147
-	.word	.LANCHOR170
 	.word	.LANCHOR171
 	.word	.LANCHOR172
-	.word	.LANCHOR148
+	.word	.LANCHOR89
+	.word	.LANCHOR149
 	.word	.LANCHOR150
-	.word	.LANCHOR143
-	.word	.LANCHOR145
 	.word	.LANCHOR173
 	.word	.LANCHOR174
 	.word	.LANCHOR175
-	.word	.LANCHOR73
-	.word	.LANCHOR93
-	.word	.LANCHOR132
-	.word	.LANCHOR96
+	.word	.LANCHOR151
 	.word	.LANCHOR176
+	.word	.LANCHOR153
+	.word	.LANCHOR146
+	.word	.LANCHOR148
 	.word	.LANCHOR177
-	.word	.LANCHOR129
 	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR74
-	.word	.LANCHOR131
+	.word	.LANCHOR73
+	.word	.LANCHOR95
+	.word	.LANCHOR135
+	.word	.LANCHOR98
 	.word	.LANCHOR180
 	.word	.LANCHOR181
-	.word	.LANCHOR56
-	.word	.LANCHOR130
+	.word	.LANCHOR132
 	.word	.LANCHOR182
-	.word	.LANCHOR139
-	.word	.LANCHOR80
 	.word	.LANCHOR183
-	.word	.LANCHOR94
-	.word	.LANCHOR99
-	.word	.LANCHOR122
-	.word	.LANCHOR118
-	.word	.LANCHOR117
-	.word	.LANCHOR86
+	.word	.LANCHOR74
+	.word	.LANCHOR134
 	.word	.LANCHOR184
 	.word	.LANCHOR185
+	.word	.LANCHOR56
+	.word	.LANCHOR133
 	.word	.LANCHOR186
-	.word	.LANCHOR82
+	.word	.LANCHOR142
+	.word	.LANCHOR80
+	.word	.LANCHOR187
+	.word	.LANCHOR96
+	.word	.LANCHOR101
 	.word	.LANCHOR124
+	.word	.LANCHOR120
+	.word	.LANCHOR119
+	.word	.LANCHOR87
+	.word	.LANCHOR188
+	.word	.LANCHOR189
+	.word	.LANCHOR190
+	.word	.LANCHOR82
+	.word	.LANCHOR126
+	.word	.LANCHOR191
 	.word	.LANCHOR83
-	.word	.LANCHOR123
-	.word	.LANCHOR112
+	.word	.LANCHOR125
+	.word	.LANCHOR114
 	.word	.LANCHOR60
-	.word	.LANCHOR119
-	.word	.LANCHOR97
-	.word	.LANCHOR90
+	.word	.LANCHOR121
+	.word	.LANCHOR99
+	.word	.LANCHOR91
 	.word	.LANCHOR66
-	.word	.LANCHOR89
 	.word	.LANCHOR53
 	.word	.LANCHOR77
 	.word	.LANCHOR78
-.L957:
+.L968:
+	ldr	r2, .L970
+	ldrh	r4, [r4, #0]
+	movs	r1, #1
+	mov	r3, r2
+	ldrh	r5, [r5, #0]
+	lsls	r4, r4, #2
+	str	r0, [r3, #28]!
+	mov	r0, r4
+	b	.L963
+.L964:
 	ldr	r6, [r2, #28]
 	adds	r1, r1, #1
 	adds	r6, r6, r0
 	adds	r0, r0, r4
 	str	r6, [r3, #4]!
-.L956:
+.L963:
 	cmp	r1, r5
-	bcc	.L957
-	ldr	r0, .L962
+	bcc	.L964
+	ldr	r0, .L970
 	movs	r3, #0
 	mov	r2, r3
 	add	r0, r0, r1, lsl #2
-	b	.L958
-.L959:
+	b	.L965
+.L966:
 	adds	r4, r0, r3
 	adds	r1, r1, #1
 	adds	r3, r3, #4
 	str	r2, [r4, #28]
-.L958:
+.L965:
 	cmp	r1, #7
-	bls	.L959
+	bls	.L966
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L963:
+.L971:
 	.align	2
-.L962:
-	.word	.LANCHOR89
+.L970:
+	.word	.LANCHOR90
 	.size	FtlMemInit, .-FtlMemInit
 	.section	.text.NandcInit,"ax",%progbits
 	.align	1
@@ -8146,9 +8262,9 @@ NandcInit:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r2, #1
-	ldr	r3, .L965
+	ldr	r3, .L973
 	movs	r4, #0
-	ldr	r5, .L965+4
+	ldr	r5, .L973+4
 	stmia	r3, {r0, r4}
 	str	r2, [r3, #12]
 	movs	r2, #2
@@ -8159,19 +8275,19 @@ NandcInit:
 	str	r2, [r3, #28]
 	str	r0, [r3, #24]
 	str	r0, [r5, #0]
-	ldr	r2, .L965+8
+	ldr	r2, .L973+8
 	ldr	r3, [r0, #0]
 	and	r3, r3, #253952
 	ubfx	r1, r3, #13, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L965+12
+	ldr	r2, .L973+12
 	and	r3, r3, #245760
 	ldr	r1, [r0, #352]
 	orr	r3, r3, #256
 	ubfx	r1, r1, #16, #4
 	str	r1, [r2, #0]
 	ldr	r1, [r0, #352]
-	ldr	r2, .L965+16
+	ldr	r2, .L973+16
 	str	r1, [r2, #0]
 	str	r3, [r0, #0]
 	str	r4, [r0, #336]
@@ -8181,29 +8297,29 @@ NandcInit:
 	movw	r2, #8322
 	mov	r0, #36864
 	str	r2, [r3, #344]
-	ldr	r2, .L965+20
+	ldr	r2, .L973+20
 	str	r2, [r3, #304]
 	bl	ftl_malloc
-	ldr	r3, .L965+24
+	ldr	r3, .L973+24
 	str	r0, [r3, #0]
-	ldr	r3, .L965+28
+	ldr	r3, .L973+28
 	str	r0, [r3, #0]
 	add	r0, r0, #32768
 	str	r4, [r3, #24]
 	str	r0, [r3, #4]
-	ldr	r3, .L965+32
+	ldr	r3, .L973+32
 	str	r4, [r3, #0]
 	pop	{r3, r4, r5, pc}
-.L966:
+.L974:
 	.align	2
-.L965:
+.L973:
 	.word	.LANCHOR5
 	.word	.LANCHOR30
-	.word	.LANCHOR187
+	.word	.LANCHOR192
 	.word	.LANCHOR37
 	.word	.LANCHOR40
 	.word	1710593
-	.word	.LANCHOR188
+	.word	.LANCHOR193
 	.word	.LANCHOR38
 	.word	.LANCHOR39
 	.size	NandcInit, .-NandcInit
@@ -8292,12 +8408,12 @@ rk_ftl_get_capacity:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r3, .L973
+	ldr	r3, .L981
 	ldr	r0, [r3, #0]
 	bx	lr
-.L974:
+.L982:
 	.align	2
-.L973:
+.L981:
 	.word	.LANCHOR84
 	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
 	.section	.text.rknand_print_hex,"ax",%progbits
@@ -8316,49 +8432,49 @@ rknand_print_hex:
 	mov	r5, r2
 	mov	r8, r3
 	mov	r6, r7
-	b	.L976
-.L982:
-	cbnz	r7, .L977
-	ldr	r0, .L984
+	b	.L984
+.L990:
+	cbnz	r7, .L985
+	ldr	r0, .L992
 	mov	r1, sl
 	mov	r2, r6
 	bl	printf
-.L977:
+.L985:
 	cmp	r5, #4
-	ldr	r0, .L984+4
-	bne	.L978
+	ldr	r0, .L992+4
+	bne	.L986
 	ldr	r1, [r4, r6, lsl #2]
-	b	.L983
-.L978:
+	b	.L991
+.L986:
 	cmp	r5, #2
 	ite	eq
 	ldrsheq	r1, [r4, r6, lsl #1]
 	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
-.L983:
+.L991:
 	adds	r7, r7, #1
 	bl	printf
 	cmp	r7, #15
-	bls	.L981
-	ldr	r0, .L984+8
+	bls	.L989
+	ldr	r0, .L992+8
 	movs	r7, #0
-	ldr	r1, .L984+12
+	ldr	r1, .L992+12
 	bl	printf
-.L981:
+.L989:
 	adds	r6, r6, #1
-.L976:
+.L984:
 	cmp	r6, r8
-	bne	.L982
-	ldr	r0, .L984+8
-	ldr	r1, .L984+12
+	bne	.L990
+	ldr	r0, .L992+8
+	ldr	r1, .L992+12
 	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
 	b	printf
-.L985:
+.L993:
 	.align	2
-.L984:
-	.word	.LC12
+.L992:
 	.word	.LC13
-	.word	.LC10
 	.word	.LC14
+	.word	.LC10
+	.word	.LC15
 	.size	rknand_print_hex, .-rknand_print_hex
 	.section	.text.FlashReadSlc2KPages,"ax",%progbits
 	.align	1
@@ -8369,7 +8485,7 @@ rknand_print_hex:
 FlashReadSlc2KPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1000
+	ldr	r3, .L1008
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
 	mov	r7, r1
@@ -8377,9 +8493,9 @@ FlashReadSlc2KPages:
 	str	r2, [sp, #12]
 	mov	r4, r0
 	movs	r6, #0
-	ldr	sl, .L1000+28
-	b	.L987
-.L996:
+	ldr	sl, .L1008+28
+	b	.L995
+.L1004:
 	subs	r3, r7, r6
 	ldr	r1, [sp, #12]
 	add	r2, sp, #20
@@ -8388,16 +8504,16 @@ FlashReadSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #16
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1000+4
+	ldr	r1, .L1008+4
 	ldr	r3, [sp, #16]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L988
+	bcc	.L996
 	mov	r3, #-1
 	str	r3, [r4, #0]
-	b	.L989
-.L988:
-	ldr	r2, .L1000+8
+	b	.L997
+.L996:
+	ldr	r2, .L1008+8
 	ldrb	r5, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r5
 	bl	NandcWaitFlashReady
@@ -8422,13 +8538,13 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	bl	FlashReadCmd
 	ldr	r3, [r4, #8]
-	cbz	r3, .L990
+	cbz	r3, .L998
 	add	r3, r3, #2048
-.L990:
+.L998:
 	ldr	r2, [r4, #12]
-	cbz	r2, .L991
+	cbz	r2, .L999
 	adds	r2, r2, #8
-.L991:
+.L999:
 	movs	r1, #0
 	str	r2, [sp, #0]
 	mov	r0, r5
@@ -8438,7 +8554,7 @@ FlashReadSlc2KPages:
 	mov	r0, r5
 	str	r3, [sp, #8]
 	bl	NandcFlashDeCs
-	ldr	r2, .L1000+12
+	ldr	r2, .L1008+12
 	ldr	r3, [sp, #8]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, fp
@@ -8446,70 +8562,70 @@ FlashReadSlc2KPages:
 	movcc	r3, fp
 	add	r2, r2, r2, lsl #1
 	cmp	r3, r2, lsr #2
-	bls	.L992
+	bls	.L1000
 	cmp	r3, #-1
 	ite	eq
 	moveq	r3, #-1
 	movne	r3, #256
-.L992:
+.L1000:
 	adds	r2, r3, #1
 	str	r3, [r4, #0]
-	beq	.L993
+	beq	.L1001
 	cmp	r3, #256
-	beq	.L993
+	beq	.L1001
 	movs	r3, #0
 	str	r3, [r4, #0]
-.L993:
+.L1001:
 	ldr	r3, [r4, #12]
-	cbz	r3, .L994
+	cbz	r3, .L1002
 	ldr	r2, [r3, #8]
 	adds	r0, r2, #1
-	bne	.L994
+	bne	.L1002
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
 	it	ne
 	strne	r2, [r4, #0]
-.L994:
+.L1002:
 	ldr	r3, [r4, #0]
 	adds	r1, r3, #1
-	bne	.L989
-	ldr	r2, .L1000+12
+	bne	.L997
+	ldr	r2, .L1008+12
 	ldr	r1, [r4, #4]
-	ldr	r0, .L1000+16
+	ldr	r0, .L1008+16
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r4, #8]
-	cbz	r1, .L995
-	ldr	r0, .L1000+20
+	cbz	r1, .L1003
+	ldr	r0, .L1008+20
 	movs	r2, #4
 	movs	r3, #8
 	bl	rknand_print_hex
-.L995:
+.L1003:
 	ldr	r1, [r4, #12]
-	cbz	r1, .L989
+	cbz	r1, .L997
 	movs	r2, #4
-	ldr	r0, .L1000+24
+	ldr	r0, .L1008+24
 	mov	r3, r2
 	bl	rknand_print_hex
-.L989:
+.L997:
 	adds	r6, r6, #1
 	adds	r4, r4, #36
-.L987:
+.L995:
 	cmp	r6, r7
-	bne	.L996
+	bne	.L1004
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1001:
+.L1009:
 	.align	2
-.L1000:
+.L1008:
 	.word	.LANCHOR18
 	.word	.LANCHOR16
 	.word	.LANCHOR19
 	.word	.LANCHOR29
-	.word	.LC15
 	.word	.LC16
 	.word	.LC17
+	.word	.LC18
 	.word	.LANCHOR2
 	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
 	.section	.text.FlashReadPages,"ax",%progbits
@@ -8521,24 +8637,24 @@ FlashReadSlc2KPages:
 FlashReadPages:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1050
+	ldr	r3, .L1058
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #48
 	ldrb	r3, [r3, #9]	@ zero_extendqisi2
 	str	r0, [sp, #12]
 	str	r1, [sp, #32]
 	str	r3, [sp, #28]
-	ldr	r3, .L1050+4
+	ldr	r3, .L1058+4
 	str	r2, [sp, #20]
 	ldrb	r4, [r3, #0]	@ zero_extendqisi2
 	str	r4, [sp, #36]
-	ldr	r4, .L1050+8
+	ldr	r4, .L1058+8
 	ldrb	r4, [r4, #0]	@ zero_extendqisi2
 	cmp	r4, #0
-	beq	.L1036
+	beq	.L1044
 	bl	FlashReadSlc2KPages
-	b	.L1004
-.L1035:
+	b	.L1012
+.L1043:
 	movs	r3, #36
 	ldr	r4, [sp, #12]
 	add	r2, sp, #44
@@ -8554,99 +8670,99 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #40
 	bl	LogAddr2PhyAddr
-	ldr	r2, .L1050+12
+	ldr	r2, .L1058+12
 	ldr	r3, [sp, #40]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	cmp	r3, r2
 	mov	r8, r0
-	bcc	.L1005
+	bcc	.L1013
 	ldr	r1, [sp, #12]
 	mov	r3, #-1
 	ldr	r4, [sp, #16]
 	str	r3, [r1, r4]
-	b	.L1006
-.L1005:
-	ldr	r2, .L1050+16
+	b	.L1014
+.L1013:
+	ldr	r2, .L1058+16
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
-	ldr	r3, .L1050+20
+	ldr	r3, .L1058+20
 	mov	r0, r4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r8, #0
 	bl	NandcWaitFlashReady
-	ldr	r3, .L1050+24
+	ldr	r3, .L1058+24
 	ldr	r3, [r3, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r0, #1
 	cmp	r3, #6
-	bhi	.L1008
-	ldr	r2, .L1050+28
+	bhi	.L1016
+	ldr	r2, .L1058+28
 	cmp	r0, #7
 	add	r1, r2, r4
 	ldrb	r3, [r1, #12]	@ zero_extendqisi2
 	it	eq
 	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
-	ldr	r1, .L1050+32
+	ldr	r1, .L1058+32
 	ldrb	r1, [r1, r4]	@ zero_extendqisi2
 	cmp	r1, r3
-	beq	.L1008
+	beq	.L1016
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	mov	r0, r4
-	ldr	r2, .L1050+36
+	ldr	r2, .L1058+36
 	bl	HynixSetRRPara
-.L1008:
+.L1016:
 	mov	r0, r4
 	and	r5, r5, #-2147483648
 	str	r5, [sp, #24]
 	bl	NandcFlashCs
 	ldr	r2, [sp, #20]
 	cmp	r2, #1
-	beq	.L1010
+	beq	.L1018
 	ldr	r5, [sp, #24]
-	cbz	r5, .L1011
-.L1010:
-	ldr	r3, .L1050+40
+	cbz	r5, .L1019
+.L1018:
+	ldr	r3, .L1058+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1011
+	cbz	r3, .L1019
 	mov	r0, r4
 	bl	flash_enter_slc_mode
-	b	.L1012
-.L1011:
+	b	.L1020
+.L1019:
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1012:
+.L1020:
 	mov	r5, r7
 	movs	r6, #0
 	mov	r7, r8
-.L1049:
+.L1057:
 	ldr	r1, [sp, #44]
 	adds	r2, r1, #1
-	bne	.L1014
+	bne	.L1022
 	cmp	r4, #255
-	beq	.L1038
-.L1014:
-	cbz	r7, .L1016
-	ldr	r3, .L1050+44
+	beq	.L1046
+.L1022:
+	cbz	r7, .L1024
+	ldr	r3, .L1058+44
 	mov	r0, r4
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	bl	FlashReadDpCmd
-	b	.L1017
-.L1016:
+	b	.L1025
+.L1024:
 	mov	r0, r4
 	bl	FlashReadCmd
-.L1017:
+.L1025:
 	mov	r0, r4
 	bl	NandcWaitFlashReady
-	cbz	r7, .L1015
+	cbz	r7, .L1023
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	bl	FlashReadDpDataOutCmd
-	b	.L1015
-.L1038:
+	b	.L1023
+.L1046:
 	movs	r7, #0
-.L1015:
+.L1023:
 	ldr	r3, [r5, #12]
 	movs	r1, #0
 	mov	r0, r4
@@ -8654,22 +8770,22 @@ FlashReadPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r5, #8]
 	bl	NandcXferData
-	ldr	r1, .L1050+4
+	ldr	r1, .L1058+4
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1040
+	cbz	r3, .L1048
 	adds	r3, r0, #1
-	bne	.L1040
+	bne	.L1048
 	strb	r6, [r1, #0]
 	movs	r7, #0
-	b	.L1049
-.L1040:
+	b	.L1057
+.L1048:
 	mov	r8, r7
 	mov	r7, r5
 	mov	r6, r8
 	mov	r5, r0
 	cmp	r8, #0
-	beq	.L1019
-	ldr	r2, .L1050+44
+	beq	.L1027
+	ldr	r2, .L1058+44
 	mov	r0, r4
 	ldr	r3, [sp, #44]
 	ldr	r1, [r2, #0]
@@ -8691,18 +8807,18 @@ FlashReadPages:
 	ite	ne
 	movne	r6, r8
 	moveq	r6, #0
-.L1019:
+.L1027:
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	ldr	r3, [sp, #36]
-	ldr	r2, .L1050+4
+	ldr	r2, .L1058+4
 	adds	r0, r5, #1
 	strb	r3, [r2, #0]
-	bne	.L1023
-	ldr	r3, .L1050+48
+	bne	.L1031
+	ldr	r3, .L1058+48
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1021
-	ldr	r3, .L1050+52
+	cbz	r3, .L1029
+	ldr	r3, .L1058+52
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r3, [r3, #0]
@@ -8714,73 +8830,73 @@ FlashReadPages:
 	bl	FlashDdrTunningRead
 	adds	r1, r0, #1
 	mov	r5, r0
-	beq	.L1022
-	ldr	r3, .L1050+56
+	beq	.L1030
+	ldr	r3, .L1058+56
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r0, r3, lsr #1
-	bls	.L1043
-.L1022:
+	bls	.L1051
+.L1030:
 	ubfx	r0, r6, #8, #8
 	bl	NandcSetDdrPara
 	adds	r2, r5, #1
-	bne	.L1043
-.L1021:
-	ldr	r3, .L1050+60
+	bne	.L1051
+.L1029:
+	ldr	r3, .L1058+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
 	ldr	r6, [r3, #0]
 	ldr	r3, [r7, #12]
 	cmp	r6, #0
-	beq	.L1024
+	beq	.L1032
 	blx	r6
 	adds	r3, r0, #1
 	mov	r5, r0
-	bne	.L1045
-	ldr	r3, .L1050+24
+	bne	.L1053
+	ldr	r3, .L1058+24
 	ldr	r3, [r3, #0]
 	ldrb	r3, [r3, #19]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	cmp	r3, #6
-	bhi	.L1026
-	ldr	r2, .L1050+28
+	bhi	.L1034
+	ldr	r2, .L1058+28
 	mov	r0, r4
 	movs	r3, #0
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	adds	r2, r2, #4
 	bl	HynixSetRRPara
-.L1026:
+.L1034:
 	ldr	r1, [sp, #44]
 	mov	r0, r4
 	ldr	r2, [r7, #8]
 	ldr	r3, [r7, #12]
 	bl	FlashReadRawPage
-	ldr	r3, .L1050+56
+	ldr	r3, .L1058+56
 	ldr	r1, [r7, #4]
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
 	mov	r5, r0
-	ldr	r0, .L1050+64
+	ldr	r0, .L1058+64
 	mov	r3, r5
 	bl	printf
 	adds	r6, r5, #1
-	bne	.L1045
-	ldr	r3, .L1050+40
+	bne	.L1053
+	ldr	r3, .L1058+40
 	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	cmp	r6, #0
-	beq	.L1025
+	beq	.L1033
 	ldr	r1, [sp, #20]
 	mov	r0, r4
 	cmp	r1, #1
-	beq	.L1027
+	beq	.L1035
 	ldr	r2, [sp, #24]
-	cbz	r2, .L1028
-.L1027:
+	cbz	r2, .L1036
+.L1035:
 	bl	flash_enter_slc_mode
-	b	.L1029
-.L1028:
+	b	.L1037
+.L1036:
 	bl	flash_exit_slc_mode
-.L1029:
-	ldr	r3, .L1050+60
+.L1037:
+	ldr	r3, .L1058+60
 	mov	r0, r4
 	ldr	r1, [sp, #44]
 	ldr	r2, [r7, #8]
@@ -8788,20 +8904,20 @@ FlashReadPages:
 	ldr	r3, [r7, #12]
 	blx	r5
 	mov	r5, r0
-	b	.L1045
-.L1024:
+	b	.L1053
+.L1032:
 	bl	FlashReadRawPage
 	mov	r5, r0
-	b	.L1025
-.L1051:
+	b	.L1033
+.L1059:
 	.align	2
-.L1050:
+.L1058:
 	.word	.LANCHOR18
 	.word	.LANCHOR4
 	.word	.LANCHOR0
 	.word	.LANCHOR16
 	.word	.LANCHOR19
-	.word	.LANCHOR189
+	.word	.LANCHOR194
 	.word	.LANCHOR23
 	.word	.LANCHOR31
 	.word	.LANCHOR32
@@ -8812,109 +8928,109 @@ FlashReadPages:
 	.word	.LANCHOR30
 	.word	.LANCHOR29
 	.word	.LANCHOR51
-	.word	.LC18
-.L1043:
+	.word	.LC19
+.L1051:
 	movs	r6, #0
-.L1023:
-	ldr	r3, .L1052
+.L1031:
+	ldr	r3, .L1060
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	r5, r3, lsr #2
-	bls	.L1025
-	ldr	r3, .L1052+4
+	bls	.L1033
+	ldr	r3, .L1060+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	r5, #256
-	b	.L1025
-.L1045:
+	b	.L1033
+.L1053:
 	movs	r6, #0
-.L1025:
+.L1033:
 	ldr	r1, [sp, #12]
 	adds	r0, r5, #1
 	ldr	r3, [sp, #16]
 	str	r5, [r1, r3]
-	beq	.L1030
+	beq	.L1038
 	cmp	r5, #256
-	beq	.L1030
+	beq	.L1038
 	ldr	r2, [sp, #16]
 	movs	r3, #0
 	str	r3, [r1, r2]
-.L1030:
+.L1038:
 	ldr	r1, [sp, #16]
 	ldr	r2, [sp, #12]
 	ldr	r3, [r2, r1]
 	adds	r1, r3, #1
-	bne	.L1031
-	ldr	r2, .L1052
+	bne	.L1039
+	ldr	r2, .L1060
 	ldr	r1, [r7, #4]
-	ldr	r0, .L1052+8
+	ldr	r0, .L1060+8
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	bl	printf
 	ldr	r1, [r7, #12]
-	cbz	r1, .L1031
+	cbz	r1, .L1039
 	movs	r2, #4
-	ldr	r0, .L1052+12
+	ldr	r0, .L1060+12
 	mov	r3, r2
 	bl	rknand_print_hex
-.L1031:
-	cbz	r6, .L1032
-	ldr	r3, .L1052
+.L1039:
+	cbz	r6, .L1040
+	ldr	r3, .L1060
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	add	r3, r3, r3, lsl #1
 	cmp	sl, r3, lsr #2
-	bls	.L1033
-	ldr	r3, .L1052+4
+	bls	.L1041
+	ldr	r3, .L1060+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
 	it	eq
 	moveq	sl, #256
-.L1033:
+.L1041:
 	ldr	r1, [sp, #12]
 	movs	r2, #36
 	add	r3, fp, #1
 	muls	r3, r2, r3
 	cmp	sl, #-1
 	str	sl, [r1, r3]
-	beq	.L1032
+	beq	.L1040
 	cmp	sl, #256
-	beq	.L1032
+	beq	.L1040
 	movs	r2, #0
 	str	r2, [r1, r3]
-.L1032:
+.L1040:
 	ldr	r2, [sp, #20]
 	add	fp, fp, r6
 	cmp	r2, #1
-	beq	.L1034
+	beq	.L1042
 	ldr	r3, [sp, #24]
-	cbz	r3, .L1006
-.L1034:
-	ldr	r3, .L1052+16
+	cbz	r3, .L1014
+.L1042:
+	ldr	r3, .L1060+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1006
+	cbz	r3, .L1014
 	mov	r0, r4
 	bl	flash_exit_slc_mode
-.L1006:
+.L1014:
 	add	fp, fp, #1
-	b	.L1003
-.L1036:
+	b	.L1011
+.L1044:
 	mov	sl, r4
 	mov	fp, r4
-.L1003:
+.L1011:
 	ldr	r4, [sp, #32]
 	cmp	fp, r4
-	bcc	.L1035
+	bcc	.L1043
 	movs	r0, #0
-.L1004:
+.L1012:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1053:
+.L1061:
 	.align	2
-.L1052:
+.L1060:
 	.word	.LANCHOR29
 	.word	.LANCHOR51
-	.word	.LC15
-	.word	.LC17
+	.word	.LC16
+	.word	.LC18
 	.word	.LANCHOR7
 	.size	FlashReadPages, .-FlashReadPages
 	.section	.text.FtlGcScanTempBlk,"ax",%progbits
@@ -8926,187 +9042,194 @@ FlashReadPages:
 FtlGcScanTempBlk:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1078
+	ldr	r3, .L1085
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r5, r0
-	ldrh	r4, [r3, #0]
+	mov	r4, r0
+	ldrh	r5, [r3, #0]
 	movw	r3, #65535
 	sub	sp, sp, #24
-	cmp	r4, r3
-	beq	.L1072
-	cbnz	r4, .L1055
-	b	.L1056
-.L1072:
-	movs	r4, #0
-.L1055:
-	ldr	r3, .L1078+4
+	cmp	r5, r3
+	beq	.L1081
+	cbnz	r5, .L1063
+	b	.L1064
+.L1081:
+	movs	r5, #0
+.L1063:
+	ldr	r3, .L1085+4
 	ldrh	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1057
-.L1056:
+	bne	.L1065
+.L1064:
 	bl	FtlGcPageVarInit
-.L1057:
-	mov	sl, #-1
-	movw	r8, #65535
-.L1069:
-	ldrh	r3, [r5, #0]
+.L1065:
+	ldr	r8, .L1085+44
+	movw	sl, #65535
+	mov	r3, #-1
+	str	r3, [sp, #20]
+.L1078:
+	ldrh	r3, [r4, #0]
 	movs	r2, #0
-	strb	r2, [r5, #8]
-	cmp	r3, r8
-	beq	.L1058
-.L1059:
-	mov	fp, sl
-.L1076:
-	ldr	r3, .L1078+8
-	ldr	r2, .L1078+12
-	ldr	r0, .L1078+16
+	strb	r2, [r4, #8]
+	cmp	r3, sl
+	beq	.L1066
+.L1067:
+	mov	r7, r4
+.L1083:
+	ldr	r3, .L1085+8
+	mov	r2, r7
+	ldr	r6, .L1085+12
+	ldr	ip, [r8, #0]
 	ldr	lr, [r3, #0]
-	ldr	r3, .L1078+20
-	ldr	ip, [r2, #0]
-	mov	r2, r5
-	ldrh	sl, [r0, #0]
-	ldrh	r7, [r3, #0]
+	ldr	r3, .L1085+16
+	ldrh	fp, [r6, #0]
+	ldrh	r6, [r3, #0]
 	movs	r3, #0
-	mov	r6, r3
-	str	ip, [sp, #8]
-	str	r5, [sp, #4]
-	b	.L1060
-.L1062:
+	mov	r4, r3
+	stmia	sp, {r6, ip}
+	b	.L1068
+.L1070:
 	ldrh	r0, [r2, #16]
-	cmp	r0, r8
-	beq	.L1061
-	ldr	r5, [sp, #8]
+	cmp	r0, sl
+	beq	.L1069
+	ldr	r6, [sp, #4]
 	mov	ip, #36
-	orr	r0, r4, r0, lsl #10
-	mla	r1, ip, r6, r5
+	orr	r0, r5, r0, lsl #10
+	mla	r1, ip, r4, r6
+	ldr	r6, [sp, #0]
 	str	r0, [r1, #4]
 	movs	r0, #0
 	str	r0, [r1, #8]
-	mul	r0, r7, r6
-	adds	r6, r6, #1
-	uxth	r6, r6
+	mul	r0, r6, r4
+	adds	r4, r4, #1
+	uxth	r4, r4
 	bic	r0, r0, #3
 	add	r0, lr, r0
 	str	r0, [r1, #12]
-.L1061:
+.L1069:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1060:
-	cmp	r3, sl
-	bne	.L1062
-	ldr	r2, .L1078+12
-	mov	r1, r6
-	movs	r7, #0
-	ldr	r5, [sp, #4]
-	mov	sl, r7
-	ldr	r0, [r2, #0]
+.L1068:
+	cmp	r3, fp
+	bne	.L1070
+	ldr	r0, [r8, #0]
+	mov	r1, r4
 	movs	r2, #0
+	movs	r6, #0
 	bl	FlashReadPages
-	b	.L1063
-.L1070:
-	ldr	r0, .L1078+12
-	ldr	r3, [r0, #0]
-	adds	r2, r3, r7
+	mov	fp, r6
+	b	.L1071
+.L1079:
+	ldr	r3, [r8, #0]
+	adds	r2, r3, r6
 	ldr	r1, [r2, #4]
-	str	r2, [sp, #20]
+	str	r2, [sp, #16]
 	ubfx	r0, r1, #10, #16
-	str	r3, [sp, #16]
-	str	r1, [sp, #12]
+	str	r3, [sp, #12]
+	str	r1, [sp, #8]
 	bl	P2V_plane
-	ldr	r3, [sp, #16]
-	ldr	r1, [sp, #12]
-	ldr	r2, [sp, #20]
-	ldr	r3, [r3, r7]
-	cbnz	r3, .L1064
+	ldr	r3, [sp, #12]
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #16]
+	ldr	r3, [r3, r6]
+	cbnz	r3, .L1072
 	ldr	r3, [r2, #12]
-	adds	r7, r7, #36
+	adds	r6, r6, #36
 	ldrh	r2, [r3, #0]
-	cmp	r2, r8
-	bne	.L1065
-	ldr	r3, .L1078+24
+	cmp	r2, sl
+	bne	.L1073
+	ldr	r3, .L1085+20
 	movs	r1, #1
 	mov	r2, r0
-	mov	sl, fp
+	mov	r4, r7
 	str	r1, [r3, #0]
-	b	.L1058
-.L1065:
-	add	sl, sl, #1
+	b	.L1066
+.L1073:
+	add	fp, fp, #1
 	ldr	r0, [r3, #12]
 	ldr	r2, [r3, #8]
 	bl	FtlGcUpdatePage
-	uxth	sl, sl
-	b	.L1063
-.L1064:
-	ldr	r2, .L1078+28
-	mov	sl, fp
-	ldr	r2, [r2, #0]
-	cbnz	r2, .L1066
-	ldr	r2, .L1078+32
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1067
-.L1066:
-	ldr	r2, .L1078+36
-	ldrh	r0, [r5, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r2, [r2, r0, lsl #1]
-	cmp	r2, #119
-	bls	.L1074
-.L1067:
-	cmp	r3, #-1
-	it	eq
-	moveq	sl, r1
-	b	.L1068
+	uxth	fp, fp
+	b	.L1071
+.L1072:
+	mov	fp, r1
+	ldr	r0, .L1085+24
+	ldrh	r1, [r7, #0]
+	mov	r2, fp
+	bl	printf
+	ldr	r3, .L1085+28
+	mov	r4, r7
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1074
+	ldr	r3, .L1085+32
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1075
 .L1074:
-	mov	sl, r1
-.L1068:
-	ldr	r3, .L1078+40
-	movs	r4, #0
-	ldrh	r2, [r5, #0]
+	ldr	r3, .L1085+36
+	ldrh	r2, [r4, #0]
 	ldr	r3, [r3, #0]
-	strh	r4, [r3, r2, lsl #1]	@ movhi
-	ldrh	r0, [r5, #0]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #119
+	bls	.L1076
+.L1075:
+	ldr	r3, [r8, #0]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	bne	.L1077
+.L1076:
+	ldr	r3, [r8, #0]
+	adds	r6, r3, r6
+	ldr	r6, [r6, #4]
+	str	r6, [sp, #20]
+.L1077:
+	ldr	r3, .L1085+40
+	movs	r5, #0
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r3, #0]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r4, #0]
 	bl	INSERT_FREE_LIST
-	strh	r8, [r5, #0]	@ movhi
+	strh	sl, [r4, #0]	@ movhi
 	bl	FtlGcPageVarInit
-	b	.L1069
-.L1063:
-	cmp	sl, r6
-	bne	.L1070
-	ldr	r3, .L1078+4
-	adds	r4, r4, #1
-	uxth	r4, r4
+	b	.L1078
+.L1071:
+	cmp	fp, r4
+	bne	.L1079
+	ldr	r3, .L1085+4
+	adds	r5, r5, #1
+	uxth	r5, r5
 	ldrh	r3, [r3, #0]
-	cmp	r3, r4
-	bhi	.L1076
-	mov	sl, fp
+	cmp	r3, r5
+	bhi	.L1083
+	mov	r4, r7
 	movs	r2, #0
-.L1058:
-	ldr	r3, .L1078
-	mov	r0, r5
+.L1066:
+	ldr	r3, .L1085
+	mov	r0, r4
 	movw	r1, #65535
-	strh	r4, [r5, #2]	@ movhi
-	strb	r2, [r5, #6]
+	strh	r5, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
 	strh	r1, [r3, #0]	@ movhi
-	mov	r1, r4
+	mov	r1, r5
 	bl	ftl_sb_update_avl_pages
-	mov	r0, sl
+	ldr	r0, [sp, #20]
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1079:
+.L1086:
 	.align	2
-.L1078:
-	.word	.LANCHOR190
+.L1085:
+	.word	.LANCHOR195
 	.word	.LANCHOR68
-	.word	.LANCHOR130
-	.word	.LANCHOR173
+	.word	.LANCHOR133
 	.word	.LANCHOR53
 	.word	.LANCHOR74
-	.word	.LANCHOR137
-	.word	.LANCHOR126
+	.word	.LANCHOR140
+	.word	.LC20
+	.word	.LANCHOR128
 	.word	.LANCHOR7
-	.word	.LANCHOR94
-	.word	.LANCHOR99
+	.word	.LANCHOR96
+	.word	.LANCHOR101
+	.word	.LANCHOR177
 	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
 	.section	.text.FtlScanSysBlk,"ax",%progbits
 	.align	1
@@ -9117,49 +9240,49 @@ FtlGcScanTempBlk:
 FtlScanSysBlk:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1141
+	ldr	r3, .L1148
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	movs	r4, #0
-	ldr	r5, .L1141+4
+	ldr	r5, .L1148+4
 	sub	sp, sp, #40
 	strh	r4, [r3, #0]	@ movhi
 	mov	r1, r4
-	ldr	r3, .L1141+8
+	ldr	r3, .L1148+8
 	ldr	r2, [r5, #0]
-	ldr	r7, .L1141+12
+	ldr	r7, .L1148+12
 	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1141+16
+	ldr	r3, .L1148+16
 	lsls	r2, r2, #2
 	ldr	r0, [r3, #0]
 	bl	memset
 	ldr	r2, [r5, #0]
-	ldr	r3, .L1141+20
+	ldr	r3, .L1148+20
 	mov	r1, r4
-	ldr	r5, .L1141+24
+	ldr	r5, .L1148+24
 	lsls	r2, r2, #1
 	ldr	r0, [r3, #0]
 	bl	memset
-	ldr	r3, .L1141+28
+	ldr	r3, .L1148+28
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memset
-	ldr	r3, .L1141+32
+	ldr	r3, .L1148+32
 	ldrh	r2, [r5, #0]
 	mov	r1, r4
 	ldr	r0, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r0, .L1141+36
+	ldr	r0, .L1148+36
 	movs	r1, #255
 	movs	r2, #12
 	bl	memset
-	ldr	r3, .L1141+40
+	ldr	r3, .L1148+40
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #24]
-	b	.L1081
-.L1083:
+	b	.L1088
+.L1090:
 	ldrb	r0, [fp, r4]	@ zero_extendqisi2
 	ldr	r1, [sp, #24]
 	str	r3, [sp, #4]
@@ -9168,7 +9291,7 @@ FtlScanSysBlk:
 	bl	FtlBbmIsBadBlock
 	ldr	r2, [sp, #8]
 	ldr	r3, [sp, #4]
-	cbnz	r0, .L1082
+	cbnz	r0, .L1089
 	ldr	r1, [r7, #0]
 	lsls	r2, r2, #10
 	ldr	r0, [r6, #0]
@@ -9183,34 +9306,34 @@ FtlScanSysBlk:
 	adds	r2, r0, r2
 	str	r2, [r1, #12]
 	uxth	r3, r3
-.L1082:
+.L1089:
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1118
-.L1130:
+	b	.L1125
+.L1137:
 	movs	r3, #0
-	ldr	fp, .L1141+76
-	ldr	r8, .L1141+80
+	ldr	fp, .L1148+76
+	ldr	r8, .L1148+80
 	mov	r4, r3
-	ldr	r6, .L1141+44
+	ldr	r6, .L1148+44
 	mov	sl, #36
-	ldr	r5, .L1141+48
+	ldr	r5, .L1148+48
 	str	r3, [sp, #20]
-.L1118:
-	ldr	r1, .L1141+52
+.L1125:
+	ldr	r1, .L1148+52
 	ldrh	r2, [r1, #0]
 	cmp	r2, r4
-	bhi	.L1083
+	bhi	.L1090
 	str	r3, [sp, #20]
 	cmp	r3, #0
-	beq	.L1084
+	beq	.L1091
 	ldr	r0, [r7, #0]
 	mov	r1, r3
 	movs	r2, #1
 	movs	r6, #0
 	bl	FlashReadPages
 	str	r6, [sp, #32]
-.L1117:
+.L1124:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
@@ -9218,9 +9341,9 @@ FtlScanSysBlk:
 	adds	r3, r3, #1
 	ldr	r4, [r2, #12]
 	ubfx	r5, r5, #10, #16
-	bne	.L1085
+	bne	.L1092
 	mov	r8, #16
-.L1087:
+.L1094:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -9232,79 +9355,79 @@ FtlScanSysBlk:
 	ldrh	r3, [r4, #0]
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1086
-	ldr	r1, .L1141+12
+	bne	.L1093
+	ldr	r1, .L1148+12
 	mov	r2, #-1
 	ldr	r3, [r1, #0]
 	str	r2, [r3, r6]
-	b	.L1085
-.L1086:
+	b	.L1092
+.L1093:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	bne	.L1085
+	bne	.L1092
 	add	r8, r8, #-1
 	uxth	r8, r8
 	cmp	r8, #0
-	bne	.L1087
-.L1085:
+	bne	.L1094
+.L1092:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r6]
 	adds	r3, r3, #1
-	beq	.L1088
-	ldr	r2, .L1141+56
+	beq	.L1095
+	ldr	r2, .L1148+56
 	ldr	r3, [r4, #4]
 	ldr	r1, [r2, #0]
 	adds	r0, r1, #1
-	beq	.L1089
+	beq	.L1096
 	cmp	r1, r3
-	bhi	.L1090
-.L1089:
+	bhi	.L1097
+.L1096:
 	adds	r1, r3, #1
-	beq	.L1090
+	beq	.L1097
 	adds	r3, r3, #1
 	str	r3, [r2, #0]
-.L1090:
+.L1097:
 	ldrh	r3, [r4, #0]
 	movw	r2, #61604
 	cmp	r3, r2
-	beq	.L1093
-	bhi	.L1096
+	beq	.L1100
+	bhi	.L1103
 	movw	r2, #61574
 	cmp	r3, r2
-	bne	.L1091
-	b	.L1139
-.L1096:
+	bne	.L1098
+	b	.L1146
+.L1103:
 	movw	r2, #61634
 	cmp	r3, r2
-	beq	.L1094
+	beq	.L1101
 	movw	r2, #65535
 	cmp	r3, r2
-	bne	.L1091
-	b	.L1140
-.L1094:
-	ldr	r3, .L1141
-	ldr	r8, .L1141+4
+	bne	.L1098
+	b	.L1147
+.L1101:
+	ldr	r3, .L1148
+	ldr	r8, .L1148+4
 	ldrh	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1097
-	ldr	r1, .L1141+60
-	movw	r2, #1183
-	ldr	r0, .L1141+64
+	bls	.L1104
+	ldr	r1, .L1148+60
+	movw	r2, #1269
+	ldr	r0, .L1148+64
 	bl	printf
-	ldr	r0, .L1141+68
-	ldr	r1, .L1141+72
+	ldr	r0, .L1148+68
+	ldr	r1, .L1148+72
 	bl	printf
-.L1097:
+.L1104:
 	ldr	r3, [r8, #0]
 	mov	ip, #0
-	ldr	r1, .L1141
+	ldr	r1, .L1148
 	uxth	r2, r3
 	str	r3, [sp, #12]
 	subs	r3, r2, #1
 	ldrh	r0, [r1, #0]
-	ldr	r1, .L1141+16
+	ldr	r1, .L1148+16
 	uxth	r3, r3
 	subs	r2, r2, r0
 	subs	r2, r2, #1
@@ -9315,8 +9438,8 @@ FtlScanSysBlk:
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #16]
 	mov	sl, r5
-	b	.L1098
-.L1104:
+	b	.L1105
+.L1111:
 	rsb	r2, ip, fp
 	str	r2, [sp, #28]
 	ldr	r2, [sp, #16]
@@ -9326,20 +9449,20 @@ FtlScanSysBlk:
 	str	r5, [sp, #16]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1099
+	bls	.L1106
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	str	r2, [sp, #16]
 	cmp	ip, #0
-	bne	.L1100
+	bne	.L1107
 	ldr	r2, [sp, #12]
 	cmp	r0, r2
-	beq	.L1100
+	beq	.L1107
 	add	ip, r0, #1
-	ldr	r0, .L1141
+	ldr	r0, .L1148
 	strh	ip, [r0, #0]	@ movhi
-.L1100:
-	ldr	r0, .L1141+20
+.L1107:
+	ldr	r0, .L1148+20
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #12]
@@ -9347,98 +9470,98 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1101
-.L1102:
+	b	.L1108
+.L1109:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [ip, #2]!
 	strh	sl, [r8], #2	@ movhi
-.L1101:
+.L1108:
 	ldr	r2, [sp, #12]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1102
+	bne	.L1109
 	ldr	r1, [r4, #4]
 	mov	r3, fp
 	ldr	r2, [sp, #16]
 	ldr	sl, [sp, #28]
 	str	r1, [r2, #0]
-	ldr	r2, .L1141+20
+	ldr	r2, .L1148+20
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1103
-.L1099:
+	b	.L1110
+.L1106:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1098:
+.L1105:
 	ldr	r5, [sp, #36]
 	sxth	r2, r3
 	cmp	r2, r5
-	bgt	.L1104
+	bgt	.L1111
 	mov	r5, sl
-.L1103:
+.L1110:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1091
-	ldr	r2, .L1141
-	ldr	r0, .L1141+4
+	blt	.L1098
+	ldr	r2, .L1148
+	ldr	r0, .L1148+4
 	ldrh	r1, [r2, #0]
 	ldr	r0, [r0, #0]
 	subs	r0, r0, r1
 	subs	r0, r0, #1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1091
+	bgt	.L1098
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1141+16
+	ldr	r2, .L1148+16
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1141+20
-	b	.L1137
-.L1142:
+	ldr	r2, .L1148+20
+	b	.L1144
+.L1149:
 	.align	2
-.L1141:
-	.word	.LANCHOR121
-	.word	.LANCHOR80
-	.word	.LANCHOR85
-	.word	.LANCHOR173
+.L1148:
 	.word	.LANCHOR123
-	.word	.LANCHOR122
-	.word	.LANCHOR77
-	.word	.LANCHOR185
+	.word	.LANCHOR80
 	.word	.LANCHOR86
-	.word	.LANCHOR191
+	.word	.LANCHOR177
+	.word	.LANCHOR125
+	.word	.LANCHOR124
+	.word	.LANCHOR77
+	.word	.LANCHOR189
+	.word	.LANCHOR87
+	.word	.LANCHOR196
 	.word	.LANCHOR55
-	.word	.LANCHOR130
+	.word	.LANCHOR133
 	.word	.LANCHOR74
 	.word	.LANCHOR53
-	.word	.LANCHOR153
-	.word	.LANCHOR192
+	.word	.LANCHOR156
+	.word	.LANCHOR197
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	.LANCHOR62
-	.word	.LANCHOR129
-.L1139:
-	ldr	r3, .L1143
-	ldr	r8, .L1143+28
+	.word	.LANCHOR132
+.L1146:
+	ldr	r3, .L1150
+	ldr	r8, .L1150+28
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r8, #0]
 	cmp	r2, r3
-	bls	.L1105
-	ldr	r1, .L1143+4
-	movw	r2, #1230
-	ldr	r0, .L1143+8
+	bls	.L1112
+	ldr	r1, .L1150+4
+	movw	r2, #1316
+	ldr	r0, .L1150+8
 	bl	printf
-	ldr	r0, .L1143+12
-	ldr	r1, .L1143+16
+	ldr	r0, .L1150+12
+	ldr	r1, .L1150+16
 	bl	printf
-.L1105:
-	ldr	r1, .L1143
+.L1112:
+	ldr	r1, .L1150
 	mov	ip, #0
 	ldrh	r8, [r8, #0]
 	ldrh	r0, [r1, #0]
@@ -9447,14 +9570,14 @@ FtlScanSysBlk:
 	uxth	r3, r2
 	subs	r2, r2, r0
 	str	r2, [sp, #36]
-	ldr	r2, .L1143+20
+	ldr	r2, .L1150+20
 	sxth	fp, r3
 	ldr	r1, [r2, #0]
 	add	sl, r1, fp, lsl #2
 	str	sl, [sp, #28]
 	mov	sl, r5
-	b	.L1106
-.L1112:
+	b	.L1113
+.L1119:
 	ldr	r2, [sp, #28]
 	add	ip, ip, #1
 	ldr	r8, [r4, #4]
@@ -9462,19 +9585,19 @@ FtlScanSysBlk:
 	str	r5, [sp, #28]
 	ldr	r5, [r2, #0]
 	cmp	r8, r5
-	bls	.L1107
+	bls	.L1114
 	ldr	ip, [r1, #0]
 	mov	r5, sl
 	cmp	ip, #0
-	bne	.L1108
+	bne	.L1115
 	ldr	sl, [sp, #16]
 	cmp	r0, sl
-	beq	.L1108
+	beq	.L1115
 	add	ip, r0, #1
-	ldr	r0, .L1143
+	ldr	r0, .L1150
 	strh	ip, [r0, #0]	@ movhi
-.L1108:
-	ldr	r0, .L1143+24
+.L1115:
+	ldr	r0, .L1150+24
 	sxth	sl, r3
 	mov	fp, r3
 	str	sl, [sp, #16]
@@ -9483,109 +9606,109 @@ FtlScanSysBlk:
 	ldr	ip, [r0, #0]
 	movs	r0, #0
 	mov	r8, ip
-	b	.L1109
-.L1110:
+	b	.L1116
+.L1117:
 	ldr	sl, [r1, #4]!
 	adds	r0, r0, #1
 	uxth	r0, r0
 	str	sl, [r3], #4
 	ldrh	sl, [r8, #2]!
 	strh	sl, [ip], #2	@ movhi
-.L1109:
+.L1116:
 	ldr	r2, [sp, #16]
 	sxth	sl, r0
 	cmp	sl, r2
-	bne	.L1110
+	bne	.L1117
 	ldr	r2, [sp, #28]
 	mov	r3, fp
 	ldr	r1, [r4, #4]
 	ldr	sl, [sp, #12]
 	str	r1, [r2, #0]
-	ldr	r2, .L1143+24
+	ldr	r2, .L1150+24
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, sl, lsl #1]	@ movhi
-	b	.L1111
-.L1107:
+	b	.L1118
+.L1114:
 	subs	r3, r3, #1
 	uxth	r3, r3
-.L1106:
+.L1113:
 	ldr	r5, [sp, #36]
 	rsb	r2, ip, fp
 	str	r2, [sp, #12]
 	cmp	r2, r5
-	bgt	.L1112
+	bgt	.L1119
 	mov	r5, sl
-.L1111:
+.L1118:
 	sxth	r3, r3
 	cmp	r3, #0
-	blt	.L1091
-	ldr	r0, .L1143+28
-	ldr	r2, .L1143
+	blt	.L1098
+	ldr	r0, .L1150+28
+	ldr	r2, .L1150
 	ldrh	r0, [r0, #0]
 	ldrh	r1, [r2, #0]
 	subs	r0, r0, #1
 	subs	r0, r0, r1
 	sxth	r0, r0
 	cmp	r3, r0
-	bgt	.L1091
+	bgt	.L1098
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-	ldr	r2, .L1143+20
+	ldr	r2, .L1150+20
 	ldr	r1, [r4, #4]
 	ldr	r2, [r2, #0]
 	str	r1, [r2, r3, lsl #2]
-	ldr	r2, .L1143+24
-.L1137:
+	ldr	r2, .L1150+24
+.L1144:
 	ldr	r2, [r2, #0]
 	strh	r5, [r2, r3, lsl #1]	@ movhi
-	b	.L1091
-.L1093:
-	ldr	r8, .L1143+32
+	b	.L1098
+.L1100:
+	ldr	r8, .L1150+32
 	movw	sl, #65535
 	ldrh	r3, [r8, #0]
 	cmp	r3, sl
-	bne	.L1113
+	bne	.L1120
 	ldr	r3, [r4, #4]
 	strh	r5, [r8, #0]	@ movhi
 	str	r3, [r8, #8]
-	b	.L1091
-.L1113:
+	b	.L1098
+.L1120:
 	ldrh	r0, [r8, #4]
 	movw	ip, #65535
 	cmp	r0, ip
-	beq	.L1114
+	beq	.L1121
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1114:
+.L1121:
 	ldr	r2, [r4, #4]
 	ldr	r1, [r8, #8]
-	ldr	r3, .L1143+32
+	ldr	r3, .L1150+32
 	cmp	r1, r2
-	bcs	.L1115
+	bcs	.L1122
 	ldrh	r1, [r3, #0]
 	str	r2, [r3, #8]
 	strh	r5, [r3, #0]	@ movhi
 	strh	r1, [r3, #4]	@ movhi
-	b	.L1091
-.L1115:
+	b	.L1098
+.L1122:
 	strh	r5, [r3, #4]	@ movhi
-	b	.L1091
-.L1140:
+	b	.L1098
+.L1147:
 	mov	r0, r5
-	b	.L1138
-.L1088:
-	ldr	r1, .L1143+36
+	b	.L1145
+.L1095:
+	ldr	r1, .L1150+36
 	mov	r0, r5
 	ldrb	r3, [r1, #0]	@ zero_extendqisi2
-	cbz	r3, .L1116
-.L1138:
+	cbz	r3, .L1123
+.L1145:
 	movs	r1, #0
-	b	.L1136
-.L1116:
+	b	.L1143
+.L1123:
 	movs	r1, #1
-.L1136:
+.L1143:
 	bl	FtlFreeSysBlkQueueIn
-.L1091:
+.L1098:
 	ldr	r5, [sp, #32]
 	adds	r6, r6, #36
 	adds	r3, r5, #1
@@ -9593,36 +9716,36 @@ FtlScanSysBlk:
 	uxth	r3, r3
 	str	r3, [sp, #32]
 	cmp	r3, r5
-	bne	.L1117
-.L1084:
+	bne	.L1124
+.L1091:
 	ldr	sl, [sp, #24]
 	add	r3, sl, #1
 	uxth	r3, r3
 	str	r3, [sp, #24]
-.L1081:
-	ldr	r3, .L1143+40
+.L1088:
+	ldr	r3, .L1150+40
 	ldr	ip, [sp, #24]
 	ldrh	r3, [r3, #0]
 	cmp	r3, ip
-	bhi	.L1130
-	ldr	r3, .L1143+44
+	bhi	.L1137
+	ldr	r3, .L1150+44
 	ldr	r1, [r3, #0]
 	ldrh	r3, [r1, #0]
-	cbnz	r3, .L1119
-	ldr	r2, .L1143+48
+	cbnz	r3, .L1126
+	ldr	r2, .L1150+48
 	ldrh	r2, [r2, #0]
-	cbz	r2, .L1119
-	ldr	r2, .L1143+52
+	cbz	r2, .L1126
+	ldr	r2, .L1150+52
 	ldr	r4, [r2, #0]
 	mov	r2, r1
-	b	.L1120
-.L1123:
+	b	.L1127
+.L1130:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
-	cbz	r5, .L1120
-	ldr	r3, .L1143+56
+	cbz	r5, .L1127
+	ldr	r3, .L1150+56
 	sxth	r0, r0
-	ldr	ip, .L1143+52
+	ldr	ip, .L1150+52
 	mov	sl, r1
 	add	r6, r1, r0, lsl #1
 	ldr	r5, [r3, #0]
@@ -9631,8 +9754,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r7, r5, r0, lsl #2
 	mov	fp, r3
-	b	.L1121
-.L1122:
+	b	.L1128
+.L1129:
 	ldrh	r1, [r6, r2]
 	strh	r1, [sl, r2]	@ movhi
 	ldr	r1, [r7, r3]
@@ -9640,37 +9763,37 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	fp, [r6, r2]	@ movhi
 	adds	r2, r2, #2
-.L1121:
+.L1128:
 	ldr	r1, [ip, #0]
 	add	r8, r4, r0
 	adds	r4, r4, #1
 	cmp	r8, r1
-	bcc	.L1122
-	b	.L1119
-.L1120:
+	bcc	.L1129
+	b	.L1126
+.L1127:
 	cmp	r3, r4
 	uxth	r0, r3
-	bne	.L1123
-.L1119:
-	ldr	r3, .L1143+24
+	bne	.L1130
+.L1126:
+	ldr	r3, .L1150+24
 	ldr	r0, [r3, #0]
 	ldrh	r3, [r0, #0]
 	cmp	r3, #0
-	bne	.L1124
-	ldr	r2, .L1143
+	bne	.L1131
+	ldr	r2, .L1150
 	ldrh	r2, [r2, #0]
 	cmp	r2, #0
-	beq	.L1124
-	ldr	r2, .L1143+28
+	beq	.L1131
+	ldr	r2, .L1150+28
 	ldrh	r4, [r2, #0]
 	mov	r2, r0
-	b	.L1125
-.L1128:
+	b	.L1132
+.L1135:
 	ldrh	r5, [r2], #2
 	adds	r3, r3, #1
 	cmp	r5, #0
-	beq	.L1125
-	ldr	r3, .L1143+20
+	beq	.L1132
+	ldr	r3, .L1150+20
 	sxth	r1, r1
 	subs	r6, r1, r6
 	add	r7, r0, r1, lsl #1
@@ -9680,8 +9803,8 @@ FtlScanSysBlk:
 	mov	r4, r3
 	add	r0, r0, r6, lsl #1
 	add	ip, r5, r1, lsl #2
-	b	.L1126
-.L1127:
+	b	.L1133
+.L1134:
 	ldrh	r8, [r7, r2]
 	ldr	sl, [ip, r3]
 	strh	r8, [r0, r2]	@ movhi
@@ -9691,1082 +9814,749 @@ FtlScanSysBlk:
 	adds	r3, r3, #4
 	strh	r8, [r7, r2]	@ movhi
 	adds	r2, r2, #2
-.L1126:
-	ldr	r8, .L1143+28
+.L1133:
+	ldr	r8, .L1150+28
 	add	sl, r4, r1
 	adds	r4, r4, #1
 	ldrh	r8, [r8, #0]
 	cmp	sl, r8
-	blt	.L1127
-	b	.L1124
-.L1144:
+	blt	.L1134
+	b	.L1131
+.L1151:
 	.align	2
-.L1143:
-	.word	.LANCHOR85
-	.word	.LANCHOR192
+.L1150:
+	.word	.LANCHOR86
+	.word	.LANCHOR197
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR185
-	.word	.LANCHOR86
+	.word	.LANCHOR189
+	.word	.LANCHOR87
 	.word	.LANCHOR77
-	.word	.LANCHOR191
+	.word	.LANCHOR196
 	.word	.LANCHOR7
 	.word	.LANCHOR56
-	.word	.LANCHOR122
-	.word	.LANCHOR121
-	.word	.LANCHOR80
+	.word	.LANCHOR124
 	.word	.LANCHOR123
-.L1125:
+	.word	.LANCHOR80
+	.word	.LANCHOR125
+.L1132:
 	cmp	r3, r4
 	uxth	r1, r3
 	mov	r6, r3
-	blt	.L1128
-.L1124:
-	ldr	r3, .L1145
+	blt	.L1135
+.L1131:
+	ldr	r3, .L1152
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1145+4
+	ldr	r3, .L1152+4
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	bls	.L1129
-	ldr	r1, .L1145+8
-	movw	r2, #1364
-	ldr	r0, .L1145+12
+	bls	.L1136
+	ldr	r1, .L1152+8
+	movw	r2, #1450
+	ldr	r0, .L1152+12
 	bl	printf
-	ldr	r0, .L1145+16
-	ldr	r1, .L1145+20
+	ldr	r0, .L1152+16
+	ldr	r1, .L1152+20
 	bl	printf
-.L1129:
+.L1136:
 	movs	r0, #0
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1146:
+.L1153:
 	.align	2
-.L1145:
-	.word	.LANCHOR121
+.L1152:
+	.word	.LANCHOR123
 	.word	.LANCHOR80
-	.word	.LANCHOR192
+	.word	.LANCHOR197
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.size	FtlScanSysBlk, .-FtlScanSysBlk
-	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartRead
+	.global	FtlGetLastWrittenPage
 	.thumb
 	.thumb_func
-	.type	FtlVendorPartRead, %function
-FtlVendorPartRead:
-	@ args = 0, pretend = 0, frame = 48
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1157
-	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r8, r2
-	ldrh	sl, [r3, #0]
-	adds	r2, r1, r0
-	ldr	r3, .L1157+4
-	sub	sp, sp, #48
-	mov	r6, r0
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	sub	sp, sp, #108
+	it	eq
+	ldreq	r3, .L1165
 	mov	r5, r1
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bhi	.L1155
-	lsr	sl, r0, sl
+	it	ne
+	ldrne	r3, .L1165+4
+	add	sl, sp, #68
+	lsl	r8, r0, #10
+	movs	r1, #1
+	mov	r0, sl
+	mov	r2, r5
+	ldrh	r4, [r3, #0]
+	add	r3, sp, #4
+	str	r3, [sp, #80]
 	movs	r7, #0
-	lsl	sl, sl, #2
-	b	.L1149
-.L1154:
-	ldr	r1, .L1157+8
-	mov	r0, r6
-	ldr	r2, .L1157+12
-	ldr	r3, [r1, #0]
-	ldrh	r4, [r2, #0]
-	mov	r1, r4
-	ldr	fp, [r3, sl]
-	bl	__aeabi_uidivmod
-	uxth	r3, r1
-	subs	r4, r4, r3
+	subs	r4, r4, #1
+	str	r7, [sp, #76]
 	uxth	r4, r4
-	cmp	r4, r5
-	it	hi
-	uxthhi	r4, r5
-	cmp	fp, #0
-	beq	.L1151
-	ldr	r1, .L1157+16
-	add	r0, sp, #12
-	str	fp, [sp, #16]
-	ldr	r2, [r1, #0]
+	sxth	r3, r4
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L1158
+	b	.L1163
+.L1161:
+	adds	r6, r6, r3
 	movs	r1, #1
-	str	r3, [sp, #4]
-	str	r2, [sp, #20]
-	movs	r2, #0
-	str	r2, [sp, #24]
-	mov	r2, r1
+	mov	r0, sl
+	mov	r2, r5
+	add	r6, r6, r6, lsr #31
+	ubfx	r6, r6, #1, #16
+	sxth	r3, r6
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
 	bl	FlashReadPages
-	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
-	mov	r0, r8
-	cmp	r2, #-1
-	it	eq
-	moveq	r7, #-1
-	ldr	r2, .L1157+16
-	ldr	r1, [r2, #0]
-	lsls	r2, r4, #9
-	add	r1, r1, r3, lsl #9
-	bl	memcpy
-	b	.L1153
-.L1151:
-	mov	r0, r8
-	mov	r1, fp
-	lsls	r2, r4, #9
-	bl	memset
-.L1153:
-	subs	r5, r5, r4
-	adds	r6, r6, r4
-	add	r8, r8, r4, lsl #9
-	add	sl, sl, #4
-.L1149:
-	cmp	r5, #0
-	bne	.L1154
-	b	.L1148
-.L1155:
-	mov	r7, #-1
-.L1148:
-	mov	r0, r7
-	add	sp, sp, #48
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	adds	r3, r3, #1
+	bne	.L1159
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	bne	.L1159
+	ldr	r3, [sp, #68]
+	adds	r3, r3, #1
+	beq	.L1159
+	subs	r4, r6, #1
+	uxth	r4, r4
+	b	.L1163
+.L1159:
+	adds	r6, r6, #1
+	uxth	r7, r6
+.L1163:
+	sxth	r6, r7
+	sxth	r3, r4
+	cmp	r6, r3
+	ble	.L1161
 .L1158:
+	sxth	r0, r4
+	add	sp, sp, #108
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L1166:
 	.align	2
-.L1157:
-	.word	.LANCHOR72
-	.word	.LANCHOR65
-	.word	.LANCHOR186
-	.word	.LANCHOR71
-	.word	.LANCHOR177
-	.size	FtlVendorPartRead, .-FtlVendorPartRead
-	.section	.text.Ftl_load_ext_data,"ax",%progbits
+.L1165:
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
 	.align	1
-	.global	Ftl_load_ext_data
+	.global	FtlLoadSysInfo
 	.thumb
 	.thumb_func
-	.type	Ftl_load_ext_data, %function
-Ftl_load_ext_data:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #0
-	ldr	r4, .L1163
-	movs	r1, #1
-	ldr	r5, .L1163+4
-	mov	r2, r4
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	cmp	r3, r5
-	beq	.L1160
-	mov	r0, r4
-	movs	r1, #0
-	mov	r2, #512
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1188
+	mov	r1, r4
+	ldr	r5, .L1188+4
+	ldr	r8, .L1188+60
+	ldr	r3, [r6, #0]
+	str	r4, [r5, #8]
+	str	r3, [r5, #12]
+	ldr	r3, .L1188+8
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1188+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
 	bl	memset
-	str	r5, [r4, #0]
-.L1160:
-	ldr	r2, [r4, #0]
-	ldr	r3, .L1163
-	cmp	r2, r5
-	bne	.L1161
-	ldr	r1, [r3, #88]
-	ldr	r2, .L1163+8
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #92]
-	ldr	r2, .L1163+12
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #8]
-	ldr	r2, .L1163+16
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #12]
-	ldr	r2, .L1163+20
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #16]
-	ldr	r2, .L1163+24
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #20]
-	ldr	r2, .L1163+28
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #28]
-	ldr	r2, .L1163+32
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #32]
-	ldr	r2, .L1163+36
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #36]
-	ldr	r2, .L1163+40
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #40]
-	ldr	r2, .L1163+44
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #44]
-	ldr	r2, .L1163+48
-	str	r1, [r2, #0]
-	ldr	r1, [r3, #48]
-	ldr	r2, .L1163+52
-	str	r1, [r2, #0]
-	ldr	r2, [r3, #60]
-	ldr	r3, .L1163+56
-	str	r2, [r3, #0]
-.L1161:
-	ldr	r3, .L1163+60
-	movs	r2, #0
-	str	r2, [r3, #0]
-	ldr	r3, .L1163
-	ldr	r2, [r3, #68]
-	ldr	r3, .L1163+64
+	ldrh	r0, [r8, #0]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1184
+	movs	r1, #1
+	mov	fp, r8
+	bl	FtlGetLastWrittenPage
+	uxth	sl, r0
+	mov	r7, r0
+	add	r3, sl, #1
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r8, .L1188+160
+	ldr	r3, .L1188+16
+	b	.L1169
+.L1172:
+	ldrh	r1, [fp, #0]
+	sxth	r2, sl
+	subs	r2, r2, r4
+	ldr	r0, .L1188+4
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	ldr	r2, [r8, #0]
+	movs	r1, #1
+	str	r2, [r5, #8]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r5, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1170
+	ldr	r2, [r8, #0]
+	ldr	r2, [r2, #0]
 	cmp	r2, r3
-	bne	.L1162
-	ldr	r3, .L1163+68
-	movs	r2, #1
-	ldr	r0, .L1163+72
-	ldr	r1, .L1163+76
-	str	r2, [r3, #0]
-	bl	printf
-.L1162:
-	ldr	r3, .L1163+80
+	bne	.L1170
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r2, #0]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L1171
+.L1170:
+	adds	r4, r4, #1
+.L1169:
+	subs	r2, r7, r4
+	lsls	r2, r2, #16
+	bpl	.L1172
+	b	.L1187
+.L1171:
+	ldr	r3, .L1188+8
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1163+84
+	ldr	r3, .L1188+20
+	adds	r2, r2, #24
+	ldrh	r3, [r3, #0]
+	cmp	r3, r2, lsl #1
+	bcs	.L1174
+	ldr	r1, .L1188+24
+	mov	r2, #1512
+	ldr	r0, .L1188+28
+	bl	printf
+	ldr	r0, .L1188+32
+	ldr	r1, .L1188+36
+	bl	printf
+.L1174:
+	ldr	r4, .L1188+4
+	movs	r2, #48
+	ldr	r5, .L1188+8
+	ldr	r0, .L1188+40
+	ldr	r1, [r4, #8]
+	bl	memcpy
+	ldr	r3, .L1188+12
+	ldrh	r2, [r5, #0]
+	ldr	r1, [r4, #8]
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1163+32
-	ldr	r3, [r3, #0]
-	mla	r0, r0, r2, r3
-	ldr	r3, .L1163+88
-	ldrh	r1, [r3, #0]
+	adds	r1, r1, #48
+	lsls	r2, r2, #1
+	bl	memcpy
+	ldrh	r2, [r5, #0]
+	ldr	r0, .L1188+44
+	add	r1, r2, #24
+	ldr	r3, [r4, #8]
+	lsrs	r2, r2, #3
+	lsrs	r1, r1, #1
+	ldr	r0, [r0, #0]
+	adds	r2, r2, #4
+	add	r1, r3, r1, lsl #2
+	bl	memcpy
+	ldr	r3, .L1188+48
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1175
+	ldrh	r3, [r5, #0]
+	ldr	r2, .L1188+52
+	ldr	r0, .L1188+56
+	lsrs	r1, r3, #3
+	add	r1, r1, r3, lsl #1
+	ldrh	r2, [r2, #0]
+	adds	r1, r1, #52
+	ldr	r3, [r4, #8]
+	ubfx	r1, r1, #2, #14
+	ldr	r0, [r0, #0]
+	lsls	r2, r2, #2
+	add	r1, r3, r1, lsl #2
+	bl	memcpy
+.L1175:
+	ldr	r3, .L1188+40
+	ldr	r2, .L1188+16
+	ldr	r1, [r3, #0]
+	cmp	r1, r2
+	bne	.L1184
+	ldrh	r4, [r3, #8]
+	ldr	r2, .L1188+60
+	strh	r4, [r2, #6]	@ movhi
+	ldrb	r2, [r3, #10]	@ zero_extendqisi2
+	ldr	r3, .L1188+64
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1184
+	ldr	r3, .L1188+68
+	ldr	r2, .L1188+72
+	str	r4, [r3, #0]
+	ldr	r3, .L1188+76
+	ldrh	r3, [r3, #0]
+	muls	r3, r4, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L1188+80
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	ldr	r2, .L1188+84
+	str	r3, [r2, #0]
+	ldr	r3, .L1188+88
+	ldr	r5, [r3, #0]
+	ldr	r3, .L1188+92
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1188+96
+	subs	r0, r5, r0
+	subs	r0, r0, r4
+	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1163+92
-	str	r0, [r3, #0]
-	pop	{r3, r4, r5, pc}
-.L1164:
+	ldr	r3, .L1188+100
+	cmp	r4, r5
+	strh	r0, [r3, #0]	@ movhi
+	bls	.L1176
+	ldr	r1, .L1188+24
+	movw	r2, #1539
+	ldr	r0, .L1188+28
+	bl	printf
+	ldr	r0, .L1188+32
+	ldr	r1, .L1188+36
+	bl	printf
+.L1176:
+	ldr	r3, .L1188+40
+	ldr	r2, .L1188+104
+	ldrh	r1, [r3, #16]
+	ldrh	r0, [r3, #14]
+	ldrh	r5, [r3, #18]
+	lsrs	r4, r1, #6
+	and	r1, r1, #63
+	strb	r1, [r2, #6]
+	ldrb	r1, [r3, #11]	@ zero_extendqisi2
+	strh	r4, [r2, #2]	@ movhi
+	movw	r4, #65535
+	strh	r0, [r2, #0]	@ movhi
+	strb	r1, [r2, #8]
+	movs	r2, #0
+	ldr	r1, .L1188+108
+	strh	r2, [r1, #2]	@ movhi
+	strh	r4, [r1, #0]	@ movhi
+	strb	r2, [r1, #6]
+	strb	r2, [r1, #8]
+	ldr	r1, .L1188+112
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #20]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1188+116
+	ldrh	r5, [r3, #22]
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #13]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1188+120
+	ldr	r5, [r3, #32]
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+124
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+128
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+132
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+136
+	str	r5, [r1, #0]
+	ldr	r1, .L1188+140
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+144
+	str	r2, [r1, #0]
+	ldr	r1, .L1188+148
+	str	r2, [r1, #0]
+	ldr	r2, .L1188+152
+	ldr	r1, [r3, #40]
+	ldr	r5, [r2, #0]
+	cmp	r1, r5
+	it	hi
+	strhi	r1, [r2, #0]
+	ldr	r2, [r3, #36]
+	ldr	r3, .L1188+156
+	ldr	r1, [r3, #0]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3, #0]
+	cmp	r0, r4
+	beq	.L1179
+	ldr	r0, .L1188+104
+	bl	make_superblock
+.L1179:
+	ldr	r0, .L1188+112
+	movw	r4, #65535
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1180
+	bl	make_superblock
+.L1180:
+	ldr	r0, .L1188+116
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1181
+	bl	make_superblock
+.L1181:
+	ldr	r0, .L1188+108
+	movw	r3, #65535
+	ldrh	r2, [r0, #0]
+	cmp	r2, r3
+	beq	.L1185
+	bl	make_superblock
+	b	.L1185
+.L1184:
+	mov	r0, #-1
+	b	.L1168
+.L1185:
+	movs	r0, #0
+.L1168:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1187:
+	ldr	r1, .L1188+24
+	movw	r2, #1510
+	ldr	r0, .L1188+28
+	bl	printf
+	ldr	r1, .L1188+36
+	ldr	r0, .L1188+32
+	bl	printf
+	b	.L1171
+.L1189:
 	.align	2
-.L1163:
-	.word	.LANCHOR141
+.L1188:
+	.word	.LANCHOR184
+	.word	.LANCHOR198
+	.word	.LANCHOR55
+	.word	.LANCHOR101
 	.word	1179929683
-	.word	.LANCHOR193
-	.word	.LANCHOR194
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR160
-	.word	.LANCHOR159
-	.word	.LANCHOR162
-	.word	.LANCHOR95
-	.word	.LANCHOR157
+	.word	.LANCHOR73
+	.word	.LANCHOR199
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR143
+	.word	.LANCHOR119
+	.word	.LANCHOR85
+	.word	.LANCHOR82
+	.word	.LANCHOR191
+	.word	.LANCHOR196
+	.word	.LANCHOR60
+	.word	.LANCHOR200
+	.word	.LANCHOR88
+	.word	.LANCHOR68
+	.word	.LANCHOR71
+	.word	.LANCHOR84
+	.word	.LANCHOR57
+	.word	.LANCHOR90
+	.word	.LANCHOR53
+	.word	.LANCHOR201
+	.word	.LANCHOR109
+	.word	.LANCHOR202
+	.word	.LANCHOR110
+	.word	.LANCHOR111
 	.word	.LANCHOR158
+	.word	.LANCHOR159
 	.word	.LANCHOR163
+	.word	.LANCHOR162
 	.word	.LANCHOR164
-	.word	.LANCHOR152
-	.word	.LANCHOR151
-	.word	305432421
-	.word	.LANCHOR126
-	.word	.LC10
-	.word	.LC19
-	.word	.LANCHOR63
+	.word	.LANCHOR165
+	.word	.LANCHOR166
 	.word	.LANCHOR161
-	.word	.LANCHOR55
-	.word	.LANCHOR195
-	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
-	.section	.text.FtlLoadEctTbl,"ax",%progbits
-	.align	1
-	.global	FtlLoadEctTbl
-	.thumb
-	.thumb_func
-	.type	FtlLoadEctTbl, %function
-FtlLoadEctTbl:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movs	r0, #64
-	ldr	r4, .L1167
-	ldr	r5, .L1167+4
-	ldr	r2, [r4, #0]
-	ldrh	r1, [r5, #0]
-	bl	FtlVendorPartRead
-	ldr	r3, [r4, #0]
-	ldr	r2, [r3, #0]
-	ldr	r3, .L1167+8
-	cmp	r2, r3
-	beq	.L1166
-	ldr	r1, .L1167+12
-	ldr	r0, .L1167+16
-	bl	printf
-	ldrh	r2, [r5, #0]
-	ldr	r0, [r4, #0]
-	movs	r1, #0
-	lsls	r2, r2, #9
-	bl	memset
-.L1166:
-	movs	r0, #0
-	pop	{r3, r4, r5, pc}
-.L1168:
-	.align	2
-.L1167:
-	.word	.LANCHOR183
-	.word	.LANCHOR182
-	.word	1112818501
-	.word	.LC20
-	.word	.LC10
-	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
-	.section	.text.load_l2p_region,"ax",%progbits
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	.LANCHOR98
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlLoadBbt,"ax",%progbits
 	.align	1
-	.global	load_l2p_region
+	.global	FtlLoadBbt
 	.thumb
 	.thumb_func
-	.type	load_l2p_region, %function
-load_l2p_region:
-	@ args = 0, pretend = 0, frame = 0
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1174
-	push	{r4, r5, r6, r7, r8, lr}
-	mov	r4, r0
-	ldrh	r3, [r3, #0]
-	mov	r8, r1
-	cmp	r3, r0
-	bcs	.L1170
-	ldr	r1, .L1174+4
-	movw	r2, #467
-	ldr	r0, .L1174+8
-	bl	printf
-	ldr	r0, .L1174+12
-	ldr	r1, .L1174+16
-	bl	printf
-.L1170:
-	ldr	r3, .L1174+20
-	ldr	r7, .L1174+24
-	ldr	r3, [r3, #0]
-	ldr	r6, [r3, r4, lsl #2]
-	movs	r3, #12
-	cbnz	r6, .L1171
-	mul	r5, r3, r8
-	ldr	r3, [r7, #0]
-	movs	r1, #255
-	adds	r3, r3, r5
-	ldr	r0, [r3, #8]
-	ldr	r3, .L1174+28
-	ldrh	r2, [r3, #0]
-	bl	memset
-	ldr	r3, [r7, #0]
-	adds	r2, r3, r5
-	strh	r4, [r3, r5]	@ movhi
-	str	r6, [r2, #4]
-	b	.L1172
-.L1171:
-	ldr	r5, .L1174+32
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r3, #0
+	ldr	r6, .L1209
+	movw	sl, #61649
+	str	r3, [r6, #8]
+	ldr	r3, .L1209+4
+	ldr	r4, [r3, #0]
+	str	r4, [r6, #12]
+	bl	FtlBbtMemInit
+	ldr	r3, .L1209+8
+	mov	r8, r3
+	ldrh	r5, [r3, #0]
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1191
+.L1195:
 	movs	r1, #1
+	ldr	r0, .L1209
 	mov	r2, r1
-	mov	r0, r5
-	str	r6, [r5, #4]
-	mul	r6, r3, r8
-	ldr	r3, [r7, #0]
-	adds	r3, r3, r6
-	ldr	r3, [r3, #8]
-	str	r3, [r5, #8]
-	ldr	r3, .L1174+36
-	ldr	r3, [r3, #0]
-	str	r3, [r5, #12]
+	lsls	r3, r5, #10
+	str	r3, [r6, #4]
 	bl	FlashReadPages
-	ldr	r3, [r5, #12]
-	ldrh	r3, [r3, #8]
-	cmp	r3, r4
-	beq	.L1173
-	ldr	r1, .L1174+4
-	mov	r2, #488
-	ldr	r0, .L1174+8
-	bl	printf
-	ldr	r0, .L1174+12
-	ldr	r1, .L1174+16
-	bl	printf
-.L1173:
-	ldr	r3, .L1174+24
-	movs	r1, #0
-	ldr	r3, [r3, #0]
-	adds	r2, r3, r6
-	strh	r4, [r3, r6]	@ movhi
-	str	r1, [r2, #4]
-.L1172:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1175:
-	.align	2
-.L1174:
-	.word	.LANCHOR82
-	.word	.LANCHOR196
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR124
-	.word	.LANCHOR112
-	.word	.LANCHOR73
-	.word	.LANCHOR197
-	.word	.LANCHOR180
-	.size	load_l2p_region, .-load_l2p_region
-	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
-	.align	1
-	.global	FtlGetLastWrittenPage
-	.thumb
-	.thumb_func
-	.type	FtlGetLastWrittenPage, %function
-FtlGetLastWrittenPage:
-	@ args = 0, pretend = 0, frame = 104
-	@ frame_needed = 0, uses_anonymous_args = 0
-	cmp	r1, #1
-	push	{r4, r5, r6, r7, r8, sl, lr}
-	sub	sp, sp, #108
-	it	eq
-	ldreq	r3, .L1187
-	mov	r5, r1
-	it	ne
-	ldrne	r3, .L1187+4
-	add	sl, sp, #68
-	lsl	r8, r0, #10
+	ldr	r3, [r6, #0]
+	ldr	r7, .L1209
+	adds	r3, r3, #1
+	bne	.L1192
+	ldr	r3, [r6, #4]
 	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	ldrh	r4, [r3, #0]
-	add	r3, sp, #4
-	str	r3, [sp, #80]
-	movs	r7, #0
-	subs	r4, r4, #1
-	str	r7, [sp, #76]
-	uxth	r4, r4
-	sxth	r3, r4
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
+	mov	r0, r7
+	mov	r2, r1
+	adds	r3, r3, #1
+	str	r3, [r6, #4]
 	bl	FlashReadPages
-	ldr	r3, [sp, #4]
+.L1192:
+	ldr	r3, [r7, #0]
 	adds	r3, r3, #1
-	bne	.L1180
-	b	.L1185
-.L1183:
-	adds	r6, r6, r3
+	beq	.L1193
+	ldrh	r3, [r4, #0]
+	cmp	r3, sl
+	bne	.L1193
+	ldr	r3, .L1209+12
+	ldr	r2, [r4, #4]
+	strh	r5, [r3, #0]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r4, #8]
+	strh	r2, [r3, #4]	@ movhi
+	b	.L1194
+.L1193:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1191:
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	ble	.L1195
+.L1194:
+	ldr	r5, .L1209+12
+	movw	r3, #65535
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1206
+	ldrh	r2, [r5, #4]
+	cmp	r2, r3
+	beq	.L1197
+	ldr	r6, .L1209
 	movs	r1, #1
-	mov	r0, sl
-	mov	r2, r5
-	add	r6, r6, r6, lsr #31
-	ubfx	r6, r6, #1, #16
-	sxth	r3, r6
-	orr	r3, r3, r8
-	str	r3, [sp, #72]
+	lsls	r2, r2, #10
+	mov	r0, r6
+	str	r2, [r6, #4]
+	mov	r2, r1
 	bl	FlashReadPages
-	ldr	r3, [sp, #4]
-	adds	r3, r3, #1
-	bne	.L1181
-	ldr	r3, [sp, #8]
-	adds	r3, r3, #1
-	bne	.L1181
-	ldr	r3, [sp, #68]
+	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	beq	.L1181
-	subs	r4, r6, #1
-	uxth	r4, r4
-	b	.L1185
-.L1181:
-	adds	r6, r6, #1
-	uxth	r7, r6
-.L1185:
-	sxth	r6, r7
-	sxth	r3, r4
-	cmp	r6, r3
-	ble	.L1183
-.L1180:
-	sxth	r0, r4
-	add	sp, sp, #108
-	pop	{r4, r5, r6, r7, r8, sl, pc}
-.L1188:
-	.align	2
-.L1187:
-	.word	.LANCHOR69
-	.word	.LANCHOR68
-	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
-	.section	.text.FtlLoadSysInfo,"ax",%progbits
-	.align	1
-	.global	FtlLoadSysInfo
-	.thumb
-	.thumb_func
-	.type	FtlLoadSysInfo, %function
-FtlLoadSysInfo:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r4, #0
+	beq	.L1197
+	ldrh	r2, [r4, #0]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1197
+	ldr	r3, [r4, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1197
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r4, #8]
+	strh	r2, [r5, #0]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1197:
+	ldr	fp, .L1209+12
+	movs	r1, #1
+	movs	r5, #0
 	ldr	r6, .L1209
-	mov	r1, r4
-	ldr	r5, .L1209+4
 	ldr	r8, .L1209+48
-	ldr	r3, [r6, #0]
-	str	r4, [r5, #8]
-	str	r3, [r5, #12]
-	ldr	r3, .L1209+8
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1209+12
-	lsls	r2, r2, #1
-	ldr	r0, [r3, #0]
-	bl	memset
-	ldrh	r0, [r8, #0]
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1205
-	movs	r1, #1
-	mov	fp, r8
+	ldrh	r0, [fp, #0]
 	bl	FtlGetLastWrittenPage
 	uxth	sl, r0
 	mov	r7, r0
 	add	r3, sl, #1
-	strh	r3, [r8, #2]	@ movhi
-	ldr	r8, .L1209+148
-	ldr	r3, .L1209+16
-	b	.L1191
-.L1194:
+	strh	r3, [fp, #2]	@ movhi
+	sxth	sl, sl
+	movw	r3, #61649
+	b	.L1198
+.L1201:
 	ldrh	r1, [fp, #0]
-	sxth	r2, sl
-	subs	r2, r2, r4
-	ldr	r0, .L1209+4
+	rsb	r2, r5, sl
+	ldr	r0, .L1209
 	orr	r2, r2, r1, lsl #10
-	str	r2, [r5, #4]
+	str	r2, [r6, #4]
 	ldr	r2, [r8, #0]
 	movs	r1, #1
-	str	r2, [r5, #8]
-	mov	r2, r1
 	str	r3, [sp, #4]
+	str	r2, [r6, #8]
+	mov	r2, r1
 	bl	FlashReadPages
-	ldr	r2, [r5, #0]
+	ldr	r2, [r6, #0]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1192
-	ldr	r2, [r8, #0]
-	ldr	r2, [r2, #0]
+	beq	.L1199
+	ldrh	r2, [r4, #0]
 	cmp	r2, r3
-	bne	.L1192
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r2, #0]
-	movw	r2, #61604
-	cmp	r1, r2
-	beq	.L1193
-.L1192:
-	adds	r4, r4, #1
-.L1191:
-	subs	r2, r7, r4
-	lsls	r2, r2, #16
-	bpl	.L1194
+	beq	.L1200
+.L1199:
+	adds	r5, r5, #1
+.L1198:
+	subs	r2, r7, r5
+	lsls	r1, r2, #16
+	bpl	.L1201
 	b	.L1208
-.L1193:
-	ldr	r3, .L1209+8
-	ldrh	r2, [r3, #0]
+.L1200:
+	ldr	r3, .L1209+12
+	ldrh	r2, [r4, #10]
+	ldrh	r0, [r4, #12]
+	strh	r2, [r3, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1203
+	ldr	r3, .L1209+16
+	ldr	r2, [r3, #0]
+	cmp	r0, r2
+	beq	.L1203
 	ldr	r3, .L1209+20
-	adds	r2, r2, #24
 	ldrh	r3, [r3, #0]
-	cmp	r3, r2, lsl #1
-	bcs	.L1196
-	ldr	r1, .L1209+24
-	movw	r2, #1426
-	ldr	r0, .L1209+28
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1203
+	cmp	r0, r3
+	bcs	.L1203
+	bl	FtlSysBlkNumInit
+.L1203:
+	ldr	r5, .L1209+24
+	movs	r4, #0
+	ldr	r8, .L1209+52
+	ldr	r7, .L1209+28
+	ldr	r6, .L1209
+	b	.L1204
+.L1205:
+	ldrh	r2, [r7, #0]
+	ldr	r1, [r6, #8]
+	ldr	r0, [r5, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r4, r2, r1
+	bl	memcpy
+	adds	r4, r4, #1
+.L1204:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcc	.L1205
+	movs	r0, #0
+	b	.L1196
+.L1206:
+	mov	r0, #-1
+.L1196:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1208:
+	ldr	r1, .L1209+32
+	mov	r2, #336
+	ldr	r0, .L1209+36
 	bl	printf
-	ldr	r0, .L1209+32
-	ldr	r1, .L1209+36
+	ldr	r1, .L1209+40
+	ldr	r0, .L1209+44
 	bl	printf
-.L1196:
-	ldr	r5, .L1209+4
-	movs	r2, #48
-	ldr	r4, .L1209+40
-	ldr	r6, .L1209+8
-	ldr	r1, [r5, #8]
-	mov	r0, r4
-	bl	memcpy
-	ldr	r3, .L1209+12
-	ldrh	r2, [r6, #0]
-	ldr	r1, [r5, #8]
-	ldr	r0, [r3, #0]
-	adds	r1, r1, #48
-	lsls	r2, r2, #1
-	bl	memcpy
-	ldrh	r2, [r6, #0]
-	ldr	r0, .L1209+44
-	add	r1, r2, #24
-	ldr	r3, [r5, #8]
-	lsrs	r2, r2, #3
-	lsrs	r1, r1, #1
-	adds	r2, r2, #4
-	ldr	r0, [r0, #0]
-	add	r1, r3, r1, lsl #2
-	bl	memcpy
-	ldr	r2, [r4, #0]
-	ldr	r3, .L1209+16
-	cmp	r2, r3
-	bne	.L1205
-	ldr	r3, .L1209+48
-	ldrh	r5, [r4, #8]
-	ldrb	r2, [r4, #10]	@ zero_extendqisi2
-	strh	r5, [r3, #6]	@ movhi
-	ldr	r3, .L1209+52
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1205
-	ldr	r3, .L1209+56
-	ldr	r2, .L1209+60
-	str	r5, [r3, #0]
-	ldr	r3, .L1209+64
-	ldrh	r3, [r3, #0]
-	muls	r3, r5, r3
-	str	r3, [r2, #0]
-	ldr	r2, .L1209+68
-	ldrh	r2, [r2, #0]
-	muls	r3, r2, r3
-	ldr	r2, .L1209+72
-	str	r3, [r2, #0]
-	ldr	r3, .L1209+76
-	ldr	r4, [r3, #0]
-	ldr	r3, .L1209+80
-	ldrh	r0, [r3, #6]
-	ldr	r3, .L1209+84
-	subs	r0, r4, r0
-	subs	r0, r0, r5
-	ldrh	r1, [r3, #0]
-	bl	__aeabi_uidiv
-	ldr	r3, .L1209+88
-	cmp	r5, r4
-	strh	r0, [r3, #0]	@ movhi
-	bls	.L1197
-	ldr	r1, .L1209+24
-	mov	r2, #1448
-	ldr	r0, .L1209+28
-	bl	printf
-	ldr	r0, .L1209+32
-	ldr	r1, .L1209+36
-	bl	printf
-.L1197:
-	ldr	r3, .L1209+40
-	ldr	r2, .L1209+92
-	ldrh	r1, [r3, #16]
-	ldrh	r0, [r3, #14]
-	ldrh	r5, [r3, #18]
-	lsrs	r4, r1, #6
-	and	r1, r1, #63
-	strb	r1, [r2, #6]
-	ldrb	r1, [r3, #11]	@ zero_extendqisi2
-	strh	r4, [r2, #2]	@ movhi
-	movw	r4, #65535
-	strh	r0, [r2, #0]	@ movhi
-	strb	r1, [r2, #8]
-	movs	r2, #0
-	ldr	r1, .L1209+96
-	strh	r2, [r1, #2]	@ movhi
-	strh	r4, [r1, #0]	@ movhi
-	strb	r2, [r1, #6]
-	strb	r2, [r1, #8]
-	ldr	r1, .L1209+100
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #20]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #12]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1209+104
-	ldrh	r5, [r3, #22]
-	strh	r5, [r1, #0]	@ movhi
-	ldrh	r5, [r3, #24]
-	lsrs	r6, r5, #6
-	and	r5, r5, #63
-	strb	r5, [r1, #6]
-	ldrb	r5, [r3, #13]	@ zero_extendqisi2
-	strh	r6, [r1, #2]	@ movhi
-	strb	r5, [r1, #8]
-	ldr	r1, .L1209+108
-	ldr	r5, [r3, #32]
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+112
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+116
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+120
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+124
-	str	r5, [r1, #0]
-	ldr	r1, .L1209+128
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+132
-	str	r2, [r1, #0]
-	ldr	r1, .L1209+136
-	str	r2, [r1, #0]
-	ldr	r2, .L1209+140
-	ldr	r1, [r3, #40]
-	ldr	r5, [r2, #0]
-	cmp	r1, r5
-	it	hi
-	strhi	r1, [r2, #0]
-	ldr	r2, [r3, #36]
-	ldr	r3, .L1209+144
-	ldr	r1, [r3, #0]
-	cmp	r2, r1
-	it	hi
-	strhi	r2, [r3, #0]
-	cmp	r0, r4
-	beq	.L1200
-	ldr	r0, .L1209+92
-	bl	make_superblock
-.L1200:
-	ldr	r0, .L1209+100
-	movw	r4, #65535
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1201
-	bl	make_superblock
-.L1201:
-	ldr	r0, .L1209+104
-	ldrh	r3, [r0, #0]
-	cmp	r3, r4
-	beq	.L1202
-	bl	make_superblock
-.L1202:
-	ldr	r0, .L1209+96
-	movw	r3, #65535
-	ldrh	r2, [r0, #0]
-	cmp	r2, r3
-	beq	.L1206
-	bl	make_superblock
-	b	.L1206
-.L1205:
-	mov	r0, #-1
-	b	.L1190
-.L1206:
-	movs	r0, #0
-.L1190:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1208:
-	ldr	r1, .L1209+24
-	mov	r2, #1424
-	ldr	r0, .L1209+28
-	bl	printf
-	ldr	r1, .L1209+36
-	ldr	r0, .L1209+32
-	bl	printf
-	b	.L1193
+	b	.L1200
 .L1210:
 	.align	2
 .L1209:
-	.word	.LANCHOR180
-	.word	.LANCHOR197
-	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	1179929683
-	.word	.LANCHOR73
 	.word	.LANCHOR198
+	.word	.LANCHOR184
+	.word	.LANCHOR66
+	.word	.LANCHOR90
+	.word	.LANCHOR52
+	.word	.LANCHOR56
+	.word	.LANCHOR90+24
+	.word	.LANCHOR91
+	.word	.LANCHOR203
 	.word	.LC9
-	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR140
-	.word	.LANCHOR117
-	.word	.LANCHOR191
+	.word	.LC10
+	.word	.LANCHOR98
 	.word	.LANCHOR60
-	.word	.LANCHOR199
-	.word	.LANCHOR87
-	.word	.LANCHOR68
-	.word	.LANCHOR71
-	.word	.LANCHOR84
-	.word	.LANCHOR57
-	.word	.LANCHOR89
-	.word	.LANCHOR53
-	.word	.LANCHOR200
-	.word	.LANCHOR107
-	.word	.LANCHOR201
-	.word	.LANCHOR108
-	.word	.LANCHOR109
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR160
-	.word	.LANCHOR159
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR158
-	.word	.LANCHOR153
-	.word	.LANCHOR154
-	.word	.LANCHOR96
-	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
-	.section	.text.FtlLoadBbt,"ax",%progbits
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
 	.align	1
-	.global	FtlLoadBbt
+	.global	FtlLoadFactoryBbt
 	.thumb
 	.thumb_func
-	.type	FtlLoadBbt, %function
-FtlLoadBbt:
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1218
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r3, #0
-	ldr	r6, .L1230
-	movw	sl, #61649
-	str	r3, [r6, #8]
-	ldr	r3, .L1230+4
-	ldr	r4, [r3, #0]
-	str	r4, [r6, #12]
-	bl	FtlBbtMemInit
-	ldr	r3, .L1230+8
-	mov	r8, r3
-	ldrh	r5, [r3, #0]
-	subs	r5, r5, #1
-	uxth	r5, r5
+	movs	r5, #0
+	ldr	r7, .L1218+4
+	ldr	r3, [r3, #0]
+	ldr	r6, .L1218+8
+	ldr	r8, .L1218+20
+	str	r3, [r7, #8]
+	ldr	r3, .L1218+12
+	ldr	sl, [r3, #0]
+	ldr	r3, .L1218+16
+	str	sl, [r7, #12]
 	b	.L1212
+.L1217:
+	ldrh	r4, [r8, #0]
+	movw	r2, #65535
+	movw	fp, #61664
+	strh	r2, [r6], #2	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1213
 .L1216:
+	mla	r2, r2, r5, r4
 	movs	r1, #1
-	ldr	r0, .L1230
-	mov	r2, r1
-	lsls	r3, r5, #10
-	str	r3, [r6, #4]
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
-	ldr	r7, .L1230
-	adds	r3, r3, #1
-	bne	.L1213
-	ldr	r3, [r6, #4]
-	movs	r1, #1
-	mov	r0, r7
+	ldr	r0, .L1218+4
+	lsls	r2, r2, #10
+	str	r2, [r7, #4]
 	mov	r2, r1
-	adds	r3, r3, #1
-	str	r3, [r6, #4]
+	str	r3, [sp, #4]
 	bl	FlashReadPages
-.L1213:
-	ldr	r3, [r7, #0]
-	adds	r3, r3, #1
+	ldr	r2, [r7, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
 	beq	.L1214
-	ldrh	r3, [r4, #0]
-	cmp	r3, sl
+	ldrh	r2, [sl, #0]
+	cmp	r2, fp
 	bne	.L1214
-	ldr	r3, .L1230+12
-	ldr	r2, [r4, #4]
-	strh	r5, [r3, #0]	@ movhi
-	str	r2, [r3, #8]
-	ldrh	r2, [r4, #8]
-	strh	r2, [r3, #4]	@ movhi
+	strh	r4, [r6, #-2]	@ movhi
 	b	.L1215
 .L1214:
-	subs	r5, r5, #1
-	uxth	r5, r5
-.L1212:
-	ldrh	r3, [r8, #0]
-	subs	r3, r3, #47
-	cmp	r3, r5
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1213:
+	ldrh	r2, [r8, #0]
+	sub	r1, r2, #15
+	cmp	r1, r4
 	ble	.L1216
 .L1215:
-	ldr	r5, .L1230+12
-	movw	r3, #65535
-	ldrh	r2, [r5, #0]
-	cmp	r2, r3
-	beq	.L1227
-	ldrh	r2, [r5, #4]
-	cmp	r2, r3
-	beq	.L1218
-	ldr	r6, .L1230
-	movs	r1, #1
-	lsls	r2, r2, #10
-	mov	r0, r6
-	str	r2, [r6, #4]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r3, [r6, #0]
-	adds	r3, r3, #1
-	beq	.L1218
-	ldrh	r2, [r4, #0]
-	movw	r3, #61649
-	cmp	r2, r3
-	bne	.L1218
-	ldr	r3, [r4, #4]
-	ldr	r2, [r5, #8]
-	cmp	r3, r2
-	bls	.L1218
-	ldrh	r2, [r5, #4]
-	str	r3, [r5, #8]
-	ldrh	r3, [r4, #8]
-	strh	r2, [r5, #0]	@ movhi
-	strh	r3, [r5, #4]	@ movhi
-.L1218:
-	ldr	fp, .L1230+12
-	movs	r1, #1
-	movs	r5, #0
-	ldr	r6, .L1230
-	ldr	r8, .L1230+48
-	ldrh	r0, [fp, #0]
-	bl	FtlGetLastWrittenPage
-	uxth	sl, r0
-	mov	r7, r0
-	add	r3, sl, #1
-	strh	r3, [fp, #2]	@ movhi
-	sxth	sl, sl
-	movw	r3, #61649
-	b	.L1219
-.L1222:
-	ldrh	r1, [fp, #0]
-	rsb	r2, r5, sl
-	ldr	r0, .L1230
-	orr	r2, r2, r1, lsl #10
-	str	r2, [r6, #4]
-	ldr	r2, [r8, #0]
-	movs	r1, #1
-	str	r3, [sp, #4]
-	str	r2, [r6, #8]
-	mov	r2, r1
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1220
-	ldrh	r2, [r4, #0]
-	cmp	r2, r3
-	beq	.L1221
-.L1220:
-	adds	r5, r5, #1
-.L1219:
-	subs	r2, r7, r5
-	lsls	r1, r2, #16
-	bpl	.L1222
-	b	.L1229
-.L1221:
-	ldr	r3, .L1230+12
-	ldrh	r2, [r4, #10]
-	ldrh	r0, [r4, #12]
-	strh	r2, [r3, #6]	@ movhi
-	movw	r3, #65535
-	cmp	r0, r3
-	beq	.L1224
-	ldr	r3, .L1230+16
-	ldr	r2, [r3, #0]
-	cmp	r0, r2
-	beq	.L1224
-	ldr	r3, .L1230+20
-	ldrh	r3, [r3, #0]
-	lsrs	r3, r3, #2
-	cmp	r2, r3
-	bcs	.L1224
-	cmp	r0, r3
-	bcs	.L1224
-	bl	FtlSysBlkNumInit
-.L1224:
-	ldr	r5, .L1230+24
-	movs	r4, #0
-	ldr	r8, .L1230+52
-	ldr	r7, .L1230+28
-	ldr	r6, .L1230
-	b	.L1225
-.L1226:
-	ldrh	r2, [r7, #0]
-	ldr	r1, [r6, #8]
-	ldr	r0, [r5, #4]!
-	lsls	r2, r2, #2
-	mla	r1, r4, r2, r1
-	bl	memcpy
-	adds	r4, r4, #1
-.L1225:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcc	.L1226
-	movs	r0, #0
-	b	.L1217
-.L1227:
-	mov	r0, #-1
-.L1217:
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1229:
-	ldr	r1, .L1230+32
-	mov	r2, #332
-	ldr	r0, .L1230+36
-	bl	printf
-	ldr	r1, .L1230+40
-	ldr	r0, .L1230+44
-	bl	printf
-	b	.L1221
-.L1231:
-	.align	2
-.L1230:
-	.word	.LANCHOR197
-	.word	.LANCHOR180
-	.word	.LANCHOR66
-	.word	.LANCHOR89
-	.word	.LANCHOR52
-	.word	.LANCHOR56
-	.word	.LANCHOR89+24
-	.word	.LANCHOR90
-	.word	.LANCHOR202
-	.word	.LC9
-	.word	.LC11
-	.word	.LC10
-	.word	.LANCHOR96
-	.word	.LANCHOR60
-	.size	FtlLoadBbt, .-FtlLoadBbt
-	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
-	.align	1
-	.global	FtlLoadFactoryBbt
-	.thumb
-	.thumb_func
-	.type	FtlLoadFactoryBbt, %function
-FtlLoadFactoryBbt:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1239
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r5, #0
-	ldr	r7, .L1239+4
-	ldr	r3, [r3, #0]
-	ldr	r6, .L1239+8
-	ldr	r8, .L1239+20
-	str	r3, [r7, #8]
-	ldr	r3, .L1239+12
-	ldr	sl, [r3, #0]
-	ldr	r3, .L1239+16
-	str	sl, [r7, #12]
-	b	.L1233
-.L1238:
-	ldrh	r4, [r8, #0]
-	movw	r2, #65535
-	movw	fp, #61664
-	strh	r2, [r6], #2	@ movhi
-	subs	r4, r4, #1
-	uxth	r4, r4
-	b	.L1234
-.L1237:
-	mla	r2, r2, r5, r4
-	movs	r1, #1
-	ldr	r0, .L1239+4
-	lsls	r2, r2, #10
-	str	r2, [r7, #4]
-	mov	r2, r1
-	str	r3, [sp, #4]
-	bl	FlashReadPages
-	ldr	r2, [r7, #0]
-	ldr	r3, [sp, #4]
-	adds	r2, r2, #1
-	beq	.L1235
-	ldrh	r2, [sl, #0]
-	cmp	r2, fp
-	bne	.L1235
-	strh	r4, [r6, #-2]	@ movhi
-	b	.L1236
-.L1235:
-	subs	r4, r4, #1
-	uxth	r4, r4
-.L1234:
-	ldrh	r2, [r8, #0]
-	sub	r1, r2, #15
-	cmp	r1, r4
-	ble	.L1237
-.L1236:
 	adds	r5, r5, #1
-.L1233:
+.L1212:
 	ldrh	r2, [r3, #0]
 	cmp	r5, r2
-	bcc	.L1238
+	bcc	.L1217
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1240:
+.L1219:
 	.align	2
-.L1239:
-	.word	.LANCHOR96
-	.word	.LANCHOR197
-	.word	.LANCHOR89+12
-	.word	.LANCHOR180
+.L1218:
+	.word	.LANCHOR98
+	.word	.LANCHOR198
+	.word	.LANCHOR90+12
+	.word	.LANCHOR184
 	.word	.LANCHOR60
 	.word	.LANCHOR66
 	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
@@ -10785,13 +10575,13 @@ FlashProgSlc2KPages:
 	mov	fp, r1
 	str	r3, [sp, #12]
 	mov	r5, r0
-	ldr	r3, .L1259
+	ldr	r3, .L1238
 	movs	r6, #0
 	str	r2, [sp, #8]
-	ldr	r7, .L1259+4
+	ldr	r7, .L1238+4
 	ldrb	r8, [r3, #9]	@ zero_extendqisi2
-	b	.L1242
-.L1249:
+	b	.L1221
+.L1228:
 	rsb	r3, r6, fp
 	ldr	r1, [sp, #8]
 	add	r2, sp, #56
@@ -10800,16 +10590,16 @@ FlashProgSlc2KPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #60
 	bl	LogAddr2PhyAddr
-	ldr	r1, .L1259+8
+	ldr	r1, .L1238+8
 	ldr	r3, [sp, #60]
 	ldrb	r2, [r1, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bcc	.L1243
+	bcc	.L1222
 	mov	r3, #-1
 	str	r3, [r5, #0]
-	b	.L1244
-.L1243:
-	ldr	r2, .L1259+12
+	b	.L1223
+.L1222:
+	ldr	r2, .L1238+12
 	ldrb	r4, [r2, r3]	@ zero_extendqisi2
 	mov	r0, r4
 	bl	NandcWaitFlashReady
@@ -10843,13 +10633,13 @@ FlashProgSlc2KPages:
 	mov	r0, r4
 	bl	FlashProgFirstCmd
 	ldr	r3, [r5, #8]
-	cbz	r3, .L1246
+	cbz	r3, .L1225
 	add	r3, r3, #2048
-.L1246:
+.L1225:
 	ldr	r2, [r5, #12]
-	cbz	r2, .L1247
+	cbz	r2, .L1226
 	adds	r2, r2, #8
-.L1247:
+.L1226:
 	movs	r1, #1
 	str	r2, [sp, #0]
 	mov	r0, r4
@@ -10871,31 +10661,31 @@ FlashProgSlc2KPages:
 	movmi	r3, #-1
 	strmi	r3, [r5, #0]
 	bl	NandcFlashDeCs
-.L1244:
+.L1223:
 	adds	r6, r6, #1
 	adds	r5, r5, #36
-.L1242:
+.L1221:
 	cmp	r6, fp
-	bne	.L1249
+	bne	.L1228
 	ldr	r3, [sp, #12]
 	cmp	r3, #0
-	beq	.L1250
+	beq	.L1229
 	movs	r5, #0
 	add	r4, sl, #8
-	ldr	r6, .L1259+16
+	ldr	r6, .L1238+16
 	mov	sl, r5
-	ldr	r8, .L1259+36
-	b	.L1251
-.L1256:
+	ldr	r8, .L1238+36
+	b	.L1230
+.L1235:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1252
+	bne	.L1231
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1259+20
+	ldr	r0, .L1238+20
 	bl	printf
-	b	.L1253
-.L1252:
+	b	.L1232
+.L1231:
 	rsb	r3, sl, fp
 	mov	r0, r7
 	ldr	r1, [sp, #8]
@@ -10924,60 +10714,60 @@ FlashProgSlc2KPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #20]
 	adds	r0, r5, #1
-	bne	.L1254
-	ldr	r0, .L1259+24
+	bne	.L1233
+	ldr	r0, .L1238+24
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1254:
+.L1233:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1255
+	cbz	r3, .L1234
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1255
-	ldr	r0, .L1259+28
+	beq	.L1234
+	ldr	r0, .L1238+28
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1255:
+.L1234:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1253
+	cbz	r3, .L1232
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1253
-	ldr	r0, .L1259+32
+	beq	.L1232
+	ldr	r0, .L1238+32
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1253:
+.L1232:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1251:
+.L1230:
 	cmp	sl, fp
-	bne	.L1256
-.L1250:
+	bne	.L1235
+.L1229:
 	movs	r0, #0
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1260:
+.L1239:
 	.align	2
-.L1259:
+.L1238:
 	.word	.LANCHOR18
 	.word	.LANCHOR2
 	.word	.LANCHOR16
 	.word	.LANCHOR19
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC21
 	.word	.LC22
 	.word	.LC23
 	.word	.LC24
-	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
 	.section	.text.FlashProgPages,"ax",%progbits
 	.align	1
@@ -10990,7 +10780,7 @@ FlashProgPages:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #72
-	ldr	r4, .L1288
+	ldr	r4, .L1267
 	mov	r8, r0
 	str	r1, [sp, #8]
 	mov	fp, r2
@@ -10998,16 +10788,16 @@ FlashProgPages:
 	ldr	r4, [r4, #0]
 	ldrb	r4, [r4, #19]	@ zero_extendqisi2
 	str	r4, [sp, #20]
-	ldr	r4, .L1288+4
+	ldr	r4, .L1267+4
 	ldrb	r4, [r4, #9]	@ zero_extendqisi2
 	str	r4, [sp, #12]
-	ldr	r4, .L1288+8
+	ldr	r4, .L1267+8
 	ldrb	r5, [r4, #0]	@ zero_extendqisi2
 	cmp	r5, #0
-	beq	.L1285
+	beq	.L1264
 	bl	FlashProgSlc2KPages
-	b	.L1263
-.L1275:
+	b	.L1242
+.L1254:
 	ldr	r1, [sp, #8]
 	movs	r4, #36
 	muls	r4, r5, r4
@@ -11020,56 +10810,56 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	add	r3, sp, #68
 	bl	LogAddr2PhyAddr
-	ldr	r3, .L1288+12
+	ldr	r3, .L1267+12
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	mov	r7, r0
 	ldr	r0, [sp, #68]
 	cmp	r0, r3
-	bcc	.L1264
+	bcc	.L1243
 	mov	r3, #-1
 	str	r3, [r8, r4]
-	b	.L1265
-.L1264:
-	ldr	r3, .L1288+16
+	b	.L1244
+.L1243:
+	ldr	r3, .L1267+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
 	it	eq
 	moveq	r7, #0
 	add	r3, sl, r0, lsl #4
 	ldr	r3, [r3, #8]
-	cbz	r3, .L1267
+	cbz	r3, .L1246
 	uxtb	r0, r0
 	bl	FlashWaitCmdDone
-.L1267:
+.L1246:
 	ldr	r2, [sp, #68]
-	ldr	r1, .L1288+20
+	ldr	r1, .L1267+20
 	add	r3, r1, r2, lsl #4
 	movs	r1, #0
 	str	r1, [r3, #12]
 	ldr	r1, [sp, #64]
 	str	r6, [r3, #8]
 	str	r1, [r3, #4]
-	cbz	r7, .L1268
+	cbz	r7, .L1247
 	adds	r1, r5, #1
 	movs	r0, #36
 	mla	r1, r0, r1, r8
 	str	r1, [r3, #12]
-.L1268:
-	ldr	r3, .L1288+24
+.L1247:
+	ldr	r3, .L1267+24
 	ldrb	r4, [r3, r2]	@ zero_extendqisi2
 	lsls	r2, r2, #4
-	ldr	r3, .L1288+12
+	ldr	r3, .L1267+12
 	mov	r0, r4
 	strb	r4, [sl, r2]
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1269
+	bne	.L1248
 	bl	NandcWaitFlashReady
-	b	.L1270
-.L1269:
+	b	.L1249
+.L1248:
 	bl	NandcFlashCs
 	ldr	r2, [sp, #68]
-	ldr	r3, .L1288+28
+	ldr	r3, .L1267+28
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	ldr	r2, [r3, r2, lsl #2]
@@ -11079,34 +10869,34 @@ FlashProgPages:
 	bl	FlashWaitReadyEN
 	mov	r0, r4
 	bl	NandcFlashDeCs
-.L1270:
+.L1249:
 	ldr	r2, [sp, #20]
 	subs	r3, r2, #1
 	cmp	r3, #6
-	bhi	.L1271
-	ldr	r3, .L1288+32
+	bhi	.L1250
+	ldr	r3, .L1267+32
 	ldrb	r3, [r3, r4]	@ zero_extendqisi2
-	cbz	r3, .L1271
-	ldr	r3, .L1288+36
+	cbz	r3, .L1250
+	ldr	r3, .L1267+36
 	mov	r0, r4
 	adds	r2, r3, #4
 	ldrb	r1, [r3, #1]	@ zero_extendqisi2
 	movs	r3, #0
 	bl	HynixSetRRPara
-.L1271:
+.L1250:
 	mov	r0, r4
 	bl	NandcFlashCs
 	cmp	fp, #1
 	mov	r0, r4
-	bne	.L1272
-	ldr	r3, .L1288+40
+	bne	.L1251
+	ldr	r3, .L1267+40
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1272
+	cbz	r3, .L1251
 	bl	flash_enter_slc_mode
-	b	.L1273
-.L1272:
+	b	.L1252
+.L1251:
 	bl	flash_exit_slc_mode
-.L1273:
+.L1252:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgFirstCmd
@@ -11117,11 +10907,11 @@ FlashProgPages:
 	str	r3, [sp, #0]
 	ldr	r3, [r6, #8]
 	bl	NandcXferData
-	cbz	r7, .L1274
+	cbz	r7, .L1253
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgDpFirstCmd
-	ldr	r3, .L1288+28
+	ldr	r3, .L1267+28
 	ldr	r2, [sp, #68]
 	mov	r0, r4
 	ldr	r1, [sp, #64]
@@ -11130,7 +10920,7 @@ FlashProgPages:
 	it	ne
 	movne	r2, #1
 	bl	FlashWaitReadyEN
-	ldr	r3, .L1288+44
+	ldr	r3, .L1267+44
 	mov	r0, r4
 	ldr	r1, [r3, #0]
 	ldr	r3, [sp, #64]
@@ -11146,62 +10936,62 @@ FlashProgPages:
 	ldr	r2, [sp, #12]
 	ldr	r3, [r3, #8]
 	bl	NandcXferData
-.L1274:
+.L1253:
 	mov	r0, r4
 	ldr	r1, [sp, #64]
 	bl	FlashProgSecondCmd
 	mov	r0, r4
 	bl	NandcFlashDeCs
 	adds	r5, r5, r7
-.L1265:
+.L1244:
 	adds	r5, r5, #1
-	b	.L1262
-.L1285:
-	ldr	sl, .L1288+20
-.L1262:
+	b	.L1241
+.L1264:
+	ldr	sl, .L1267+20
+.L1241:
 	ldr	r1, [sp, #8]
 	cmp	r5, r1
-	bcc	.L1275
+	bcc	.L1254
 	movs	r4, #0
-	ldr	r7, .L1288+12
-	ldr	r6, .L1288+40
-	ldr	r5, .L1288+20
-	b	.L1276
-.L1278:
+	ldr	r7, .L1267+12
+	ldr	r6, .L1267+40
+	ldr	r5, .L1267+20
+	b	.L1255
+.L1257:
 	uxtb	r0, r4
 	bl	FlashWaitCmdDone
 	cmp	fp, #1
-	bne	.L1277
+	bne	.L1256
 	ldrb	r3, [r6, #0]	@ zero_extendqisi2
-	cbz	r3, .L1277
+	cbz	r3, .L1256
 	lsls	r3, r4, #4
 	ldrb	r0, [r5, r3]	@ zero_extendqisi2
 	bl	flash_exit_slc_mode
-.L1277:
+.L1256:
 	adds	r4, r4, #1
-.L1276:
+.L1255:
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	cmp	r4, r3
-	bcc	.L1278
+	bcc	.L1257
 	ldr	r2, [sp, #16]
 	cmp	r2, #0
-	beq	.L1287
+	beq	.L1266
 	movs	r5, #0
 	add	r4, r8, #8
-	ldr	r6, .L1288+48
+	ldr	r6, .L1267+48
 	mov	sl, r5
-	ldr	r8, .L1288+68
-	b	.L1279
-.L1284:
+	ldr	r8, .L1267+68
+	b	.L1258
+.L1263:
 	ldr	r3, [r4, #-8]
 	sub	r7, r4, #8
 	adds	r3, r3, #1
-	bne	.L1280
+	bne	.L1259
 	ldr	r1, [r4, #-4]
-	ldr	r0, .L1288+52
+	ldr	r0, .L1267+52
 	bl	printf
-	b	.L1281
-.L1280:
+	b	.L1260
+.L1259:
 	ldr	r1, [sp, #8]
 	mov	r0, r7
 	add	r2, sp, #64
@@ -11231,49 +11021,49 @@ FlashProgPages:
 	bl	FlashReadPages
 	ldr	r5, [sp, #28]
 	adds	r2, r5, #1
-	bne	.L1282
-	ldr	r0, .L1288+56
+	bne	.L1261
+	ldr	r0, .L1267+56
 	ldr	r1, [r4, #-4]
 	bl	printf
 	str	r5, [r4, #-8]
-.L1282:
+.L1261:
 	ldr	r3, [r4, #4]
-	cbz	r3, .L1283
+	cbz	r3, .L1262
 	ldr	r2, [r3, #0]
 	ldr	r3, [r8, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1283
-	ldr	r0, .L1288+60
+	beq	.L1262
+	ldr	r0, .L1267+60
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1283:
+.L1262:
 	ldr	r3, [r4, #0]
-	cbz	r3, .L1281
+	cbz	r3, .L1260
 	ldr	r2, [r3, #0]
 	ldr	r3, [r6, #0]
 	ldr	r3, [r3, #0]
 	cmp	r2, r3
-	beq	.L1281
-	ldr	r0, .L1288+64
+	beq	.L1260
+	ldr	r0, .L1267+64
 	ldr	r1, [r4, #-4]
 	bl	printf
 	mov	r3, #-1
 	str	r3, [r4, #-8]
-.L1281:
+.L1260:
 	add	sl, sl, #1
 	adds	r4, r4, #36
-.L1279:
+.L1258:
 	ldr	r2, [sp, #8]
 	cmp	sl, r2
-	bne	.L1284
+	bne	.L1263
 	movs	r0, #0
-	b	.L1263
-.L1289:
+	b	.L1242
+.L1268:
 	.align	2
-.L1288:
+.L1267:
 	.word	.LANCHOR23
 	.word	.LANCHOR18
 	.word	.LANCHOR0
@@ -11286,15 +11076,15 @@ FlashProgPages:
 	.word	.LANCHOR31
 	.word	.LANCHOR7
 	.word	.LANCHOR2
-	.word	.LANCHOR203
+	.word	.LANCHOR204
 	.word	.LC21
 	.word	.LC22
 	.word	.LC23
 	.word	.LC24
-	.word	.LANCHOR204
-.L1287:
+	.word	.LANCHOR205
+.L1266:
 	ldr	r0, [sp, #16]
-.L1263:
+.L1242:
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
 	.size	FlashProgPages, .-FlashProgPages
@@ -11307,104 +11097,128 @@ FlashProgPages:
 FtlVpcTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1281
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r8, #0
-	ldr	r4, .L1302
-	ldr	sl, .L1302+88
-	ldr	fp, .L1302+92
-	ldr	r6, .L1302+4
-	ldr	r0, [sl, #0]
-	ldr	r5, [fp, #0]
-	ldrh	r3, [r4, #0]
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1270
+	ldr	r2, .L1281+4
+	ldr	r6, .L1281+8
+	ldr	r4, .L1281+12
+	ldr	r0, [r2, #0]
+	ldr	r2, .L1281+16
+	ldr	r7, .L1281+20
 	str	r0, [r6, #8]
+	ldr	r5, [r2, #0]
+	ldr	r2, .L1281+24
 	str	r5, [r6, #12]
-	strh	r3, [r5, #2]	@ movhi
-	movw	r3, #61604
-	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, [r4, #8]
-	ldr	r7, .L1302+8
-	ldr	r1, .L1302+12
-	str	r3, [r5, #4]
-	ldr	r3, .L1302+16
-	str	r8, [r5, #8]
-	str	r8, [r5, #12]
-	stmia	r7, {r1, r3}
-	ldrh	r3, [r4, #6]
-	strh	r3, [r7, #8]	@ movhi
-	ldr	r3, .L1302+20
+	ldrh	r1, [r2, #0]
+	str	r3, [r5, #12]
+	strh	r1, [r5, #2]	@ movhi
+	movw	r1, #61604
+	strh	r1, [r5, #0]	@ movhi
+	ldr	r1, [r2, #8]
+	str	r3, [r5, #8]
+	ldr	r3, .L1281+28
+	str	r1, [r5, #4]
+	stmia	r4, {r3, r7}
+	ldrh	r3, [r2, #6]
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L1281+32
 	ldrh	r3, [r3, #0]
-	strb	r3, [r7, #10]
-	ldr	r3, .L1302+24
+	strb	r3, [r4, #10]
+	ldr	r3, .L1281+36
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r7, #14]	@ movhi
+	strh	r2, [r4, #14]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	orr	r2, r2, r1, lsl #6
-	strh	r2, [r7, #16]	@ movhi
-	strb	r3, [r7, #11]
-	ldr	r3, .L1302+28
+	strh	r2, [r4, #16]	@ movhi
+	strb	r3, [r4, #11]
+	ldr	r3, .L1281+40
 	ldrh	r2, [r3, #0]
 	ldrh	r1, [r3, #2]
-	strh	r2, [r7, #18]	@ movhi
+	strh	r2, [r4, #18]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
 	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	orr	r2, r2, r1, lsl #6
-	strh	r2, [r7, #20]	@ movhi
-	strb	r3, [r7, #12]
-	ldr	r3, .L1302+32
+	strh	r2, [r4, #20]	@ movhi
+	strb	r3, [r4, #12]
+	ldr	r3, .L1281+44
 	ldrh	r2, [r3, #0]
-	strh	r2, [r7, #22]	@ movhi
 	ldrh	r1, [r3, #2]
+	strh	r2, [r4, #22]	@ movhi
 	ldrb	r2, [r3, #6]	@ zero_extendqisi2
-	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	orr	r2, r2, r1, lsl #6
+	strh	r2, [r4, #24]	@ movhi
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
 	movs	r1, #255
-	strh	r2, [r7, #24]	@ movhi
-	strb	r3, [r7, #13]
-	ldr	r3, .L1302+36
+	strb	r3, [r4, #13]
+	ldr	r3, .L1281+48
 	ldr	r3, [r3, #0]
-	str	r3, [r7, #32]
-	ldr	r3, .L1302+40
+	str	r3, [r4, #32]
+	ldr	r3, .L1281+52
 	ldr	r3, [r3, #0]
-	str	r3, [r7, #40]
-	ldr	r3, .L1302+44
+	str	r3, [r4, #40]
+	ldr	r3, .L1281+56
 	ldr	r3, [r3, #0]
-	str	r3, [r7, #36]
-	ldr	r3, .L1302+48
+	str	r3, [r4, #36]
+	ldr	r3, .L1281+60
 	ldrh	r2, [r3, #0]
 	bl	memset
-	mov	r1, r7
-	ldr	r7, .L1302+52
+	mov	r1, r4
+	ldr	r4, .L1281+64
 	movs	r2, #48
 	ldr	r0, [r6, #8]
 	bl	memcpy
-	ldr	r3, .L1302+56
-	ldrh	r2, [r7, #0]
+	ldr	r3, .L1281+68
+	ldrh	r2, [r4, #0]
 	ldr	r0, [r6, #8]
 	ldr	r1, [r3, #0]
 	lsls	r2, r2, #1
 	adds	r0, r0, #48
 	bl	memcpy
-	ldrh	r2, [r7, #0]
+	ldrh	r2, [r4, #0]
 	ldr	r3, [r6, #8]
-	mov	r7, r8
 	add	r0, r2, #24
 	lsrs	r2, r2, #3
 	lsrs	r0, r0, #1
 	adds	r2, r2, #4
 	add	r0, r3, r0, lsl #2
-	ldr	r3, .L1302+60
+	ldr	r3, .L1281+72
 	ldr	r1, [r3, #0]
 	bl	memcpy
-	mov	r0, r8
+	ldr	r3, .L1281+76
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1271
+	ldrh	r3, [r4, #0]
+	ldr	r1, [r6, #8]
+	lsrs	r0, r3, #3
+	add	r0, r0, r3, lsl #1
+	ldr	r3, .L1281+80
+	adds	r0, r0, #52
+	ubfx	r0, r0, #2, #14
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1281+84
+	add	r0, r1, r0, lsl #2
+	lsls	r2, r2, #2
+	ldr	r1, [r3, #0]
+	bl	memcpy
+.L1271:
+	movs	r0, #0
+	ldr	r6, .L1281+8
 	bl	FtlUpdateVaildLpn
+	ldr	sl, .L1281+4
+	ldr	fp, .L1281+16
+	movs	r7, #0
+	ldr	r4, .L1281+24
 	movw	r8, #65535
-.L1301:
+.L1280:
 	ldr	r3, [sl, #0]
 	movs	r1, #1
 	ldrh	r2, [r4, #0]
-	ldr	r0, .L1302+4
+	ldr	r0, .L1281+8
 	str	r3, [r6, #8]
 	ldr	r3, [fp, #0]
 	str	r3, [r6, #12]
@@ -11414,19 +11228,19 @@ FtlVpcTblFlush:
 	str	r3, [r6, #4]
 	mov	r3, r1
 	bl	FlashProgPages
-	ldr	r3, .L1302+64
+	ldr	r3, .L1281+88
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1292
+	blt	.L1273
 	ldrh	r3, [r4, #0]
 	ldrh	r8, [r4, #4]
 	strh	r3, [r4, #4]	@ movhi
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r2, .L1302+40
+	ldr	r2, .L1281+52
 	ldr	r3, [r2, #0]
 	adds	r1, r3, #1
 	str	r1, [r2, #0]
@@ -11439,85 +11253,93 @@ FtlVpcTblFlush:
 	str	r3, [r5, #4]
 	mov	r3, r1
 	strh	r0, [r5, #2]	@ movhi
-	ldr	r0, .L1302+4
+	ldr	r0, .L1281+8
 	bl	FlashProgPages
-.L1292:
+.L1273:
 	ldrh	r3, [r4, #2]
 	ldr	r2, [r6, #0]
 	adds	r3, r3, #1
-	adds	r2, r2, #1
+	adds	r1, r2, #1
 	uxth	r3, r3
 	strh	r3, [r4, #2]	@ movhi
-	bne	.L1293
+	bne	.L1274
 	cmp	r3, #1
-	bne	.L1294
-	ldr	r1, .L1302+68
-	mov	r2, #1096
-	ldr	r0, .L1302+72
+	bne	.L1275
+	ldr	r1, .L1281+92
+	movw	r2, #1180
+	ldr	r0, .L1281+96
 	bl	printf
-	ldr	r0, .L1302+76
-	ldr	r1, .L1302+80
+	ldr	r0, .L1281+100
+	ldr	r1, .L1281+104
 	bl	printf
-.L1294:
-	ldr	r2, .L1302
+.L1275:
+	ldr	r2, .L1281+24
 	ldrh	r3, [r2, #2]
 	cmp	r3, #1
-	bne	.L1295
-	ldr	r3, .L1302+64
+	bne	.L1276
+	ldr	r3, .L1281+88
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1295:
+.L1276:
 	adds	r7, r7, #1
 	uxth	r7, r7
 	cmp	r7, #3
-	bls	.L1301
-	ldr	r3, .L1302+4
+	bls	.L1280
+	ldr	r3, .L1281+8
 	mov	r2, r7
-	ldr	r0, .L1302+84
+	ldr	r0, .L1281+108
 	ldr	r1, [r3, #4]
 	bl	printf
-.L1297:
-	b	.L1297
-.L1293:
+	ldr	r3, .L1281
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L1270
+.L1274:
 	cmp	r3, #1
-	beq	.L1301
+	beq	.L1280
+	cmp	r2, #256
+	beq	.L1280
 	movw	r3, #65535
 	cmp	r8, r3
-	beq	.L1298
+	beq	.L1270
 	mov	r0, r8
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
-.L1298:
+.L1270:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1303:
+.L1282:
 	.align	2
-.L1302:
-	.word	.LANCHOR191
-	.word	.LANCHOR197
-	.word	.LANCHOR140
+.L1281:
+	.word	.LANCHOR94
+	.word	.LANCHOR98
+	.word	.LANCHOR198
+	.word	.LANCHOR143
+	.word	.LANCHOR184
+	.word	1342177351
+	.word	.LANCHOR196
 	.word	1179929683
-	.word	1342177344
 	.word	.LANCHOR60
-	.word	.LANCHOR107
-	.word	.LANCHOR108
 	.word	.LANCHOR109
-	.word	.LANCHOR161
-	.word	.LANCHOR153
-	.word	.LANCHOR154
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR164
+	.word	.LANCHOR156
+	.word	.LANCHOR157
 	.word	.LANCHOR73
 	.word	.LANCHOR55
-	.word	.LANCHOR99
-	.word	.LANCHOR117
+	.word	.LANCHOR101
+	.word	.LANCHOR119
+	.word	.LANCHOR85
+	.word	.LANCHOR82
+	.word	.LANCHOR126
 	.word	.LANCHOR69
-	.word	.LANCHOR205
+	.word	.LANCHOR206
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
 	.word	.LC25
-	.word	.LANCHOR96
-	.word	.LANCHOR180
 	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
 	.section	.text.FtlBbmTblFlush,"ax",%progbits
 	.align	1
@@ -11528,24 +11350,27 @@ FtlVpcTblFlush:
 FtlBbmTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1316
+	ldr	r3, .L1295
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	movs	r1, #0
+	ldr	r4, [r3, #0]
+	cmp	r4, #0
+	bne	.L1284
+	ldr	r3, .L1295+4
+	mov	r1, r4
+	ldr	r7, .L1295+8
+	ldr	r5, .L1295+12
 	ldr	r0, [r3, #0]
-	movs	r4, #0
-	ldr	r3, .L1316+4
-	ldr	r7, .L1316+8
-	ldr	r5, .L1316+12
-	ldr	r3, [r3, #0]
+	ldr	r3, .L1295+16
+	ldr	r8, .L1295+52
 	str	r0, [r7, #8]
-	ldr	r8, .L1316+48
+	ldr	r3, [r3, #0]
+	ldr	sl, .L1295+56
 	str	r3, [r7, #12]
-	ldr	r3, .L1316+16
-	ldr	sl, .L1316+52
+	ldr	r3, .L1295+20
 	ldrh	r2, [r3, #0]
 	bl	memset
-	b	.L1305
-.L1306:
+	b	.L1285
+.L1286:
 	ldrh	r2, [sl, #0]
 	ldr	r3, [r7, #8]
 	ldr	r1, [r5, #4]!
@@ -11554,11 +11379,11 @@ FtlBbmTblFlush:
 	adds	r4, r4, #1
 	add	r0, r3, r0, lsl #2
 	bl	memcpy
-.L1305:
+.L1285:
 	ldrh	r3, [r8, #0]
-	ldr	r6, .L1316+8
+	ldr	r6, .L1295+8
 	cmp	r4, r3
-	blt	.L1306
+	blt	.L1286
 	ldr	r5, [r6, #12]
 	movs	r2, #16
 	movs	r1, #255
@@ -11568,9 +11393,9 @@ FtlBbmTblFlush:
 	bl	memset
 	movw	r3, #61649
 	strh	r3, [r5, #0]	@ movhi
-	ldr	r3, .L1316+20
-	ldr	sl, .L1316
-	ldr	fp, .L1316+4
+	ldr	r3, .L1295+24
+	ldr	sl, .L1295+4
+	ldr	fp, .L1295+16
 	ldr	r2, [r3, #8]
 	str	r2, [r5, #4]
 	ldrh	r2, [r3, #0]
@@ -11579,16 +11404,16 @@ FtlBbmTblFlush:
 	ldrh	r3, [r3, #6]
 	strh	r2, [r5, #8]	@ movhi
 	strh	r3, [r5, #10]	@ movhi
-	ldr	r3, .L1316+24
+	ldr	r3, .L1295+28
 	ldr	r3, [r3, #0]
 	strh	r3, [r5, #12]	@ movhi
-	b	.L1315
-.L1312:
+	b	.L1294
+.L1291:
 	mov	r8, #1
-.L1315:
+.L1294:
 	ldr	r3, [sl, #0]
 	movs	r1, #0
-	ldr	r4, .L1316+20
+	ldr	r4, .L1295+24
 	ldrh	r0, [r5, #10]
 	str	r3, [r6, #8]
 	str	r1, [r6, #0]
@@ -11600,19 +11425,19 @@ FtlBbmTblFlush:
 	str	r3, [r6, #4]
 	ldrh	r3, [r4, #4]
 	str	r0, [sp, #0]
-	ldr	r0, .L1316+28
+	ldr	r0, .L1295+32
 	bl	printf
 	movs	r1, #1
 	mov	r2, r1
 	mov	r3, r1
-	ldr	r0, .L1316+8
+	ldr	r0, .L1295+8
 	bl	FlashProgPages
-	ldr	r3, .L1316+32
+	ldr	r3, .L1295+36
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	blt	.L1308
+	blt	.L1288
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #8]
@@ -11624,7 +11449,7 @@ FtlBbmTblFlush:
 	strh	r2, [r5, #8]	@ movhi
 	ldrh	r3, [r4, #4]
 	strh	r2, [r4, #4]	@ movhi
-	ldr	r2, .L1316+36
+	ldr	r2, .L1295+40
 	strh	r3, [r4, #0]	@ movhi
 	lsls	r3, r3, #10
 	str	r3, [r6, #4]
@@ -11633,54 +11458,58 @@ FtlBbmTblFlush:
 	str	r3, [r0, #4]
 	bl	FlashEraseBlocks
 	movs	r1, #1
-	ldr	r0, .L1316+8
+	ldr	r0, .L1295+8
 	mov	r2, r1
 	mov	r3, r1
 	bl	FlashProgPages
-.L1308:
-	ldr	r3, .L1316+20
+.L1288:
+	ldr	r3, .L1295+24
 	ldrh	r2, [r3, #2]
 	adds	r2, r2, #1
 	strh	r2, [r3, #2]	@ movhi
 	ldr	r3, [r6, #0]
 	adds	r3, r3, #1
-	bne	.L1309
+	bne	.L1289
 	adds	r7, r7, #1
-	ldr	r0, .L1316+40
+	ldr	r0, .L1295+44
 	ldr	r1, [r6, #4]
 	uxth	r7, r7
 	bl	printf
 	cmp	r7, #3
-	bls	.L1315
-	ldr	r3, .L1316+8
+	bls	.L1294
+	ldr	r3, .L1295+8
 	mov	r2, r7
-	ldr	r0, .L1316+44
+	ldr	r0, .L1295+48
 	ldr	r1, [r3, #4]
 	bl	printf
-.L1311:
-	b	.L1311
-.L1309:
+	ldr	r3, .L1295
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L1284
+.L1289:
 	cmp	r8, #0
-	beq	.L1312
+	beq	.L1291
+.L1284:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1317:
+.L1296:
 	.align	2
-.L1316:
-	.word	.LANCHOR96
-	.word	.LANCHOR180
-	.word	.LANCHOR197
-	.word	.LANCHOR89+24
+.L1295:
+	.word	.LANCHOR94
+	.word	.LANCHOR98
+	.word	.LANCHOR198
+	.word	.LANCHOR90+24
+	.word	.LANCHOR184
 	.word	.LANCHOR73
-	.word	.LANCHOR89
+	.word	.LANCHOR90
 	.word	.LANCHOR52
 	.word	.LC26
 	.word	.LANCHOR69
-	.word	.LANCHOR93
+	.word	.LANCHOR95
 	.word	.LC27
 	.word	.LC28
 	.word	.LANCHOR60
-	.word	.LANCHOR90
+	.word	.LANCHOR91
 	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
 	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
 	.align	1
@@ -11693,22 +11522,22 @@ FtlGcFreeBadSuperBlk:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	sl, r0
-	ldr	r5, .L1328
+	ldr	r5, .L1307
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1327
-	b	.L1320
-.L1326:
-	ldr	r3, .L1328+4
+	cbnz	r3, .L1306
+	b	.L1299
+.L1305:
+	ldr	r3, .L1307+4
 	mov	r1, sl
 	mov	fp, #0
 	ldrb	r0, [r3, r4]	@ zero_extendqisi2
 	bl	V2P_block
 	mov	r3, r0
-	b	.L1321
-.L1325:
+	b	.L1300
+.L1304:
 	ldrh	r2, [r7, fp, lsl #1]
 	cmp	r2, r3
-	bne	.L1322
+	bne	.L1301
 	mov	r0, r3
 	str	r3, [sp, #4]
 	bl	FtlBbmMapBadBlock
@@ -11716,46 +11545,46 @@ FtlGcFreeBadSuperBlk:
 	ldrh	r1, [r5, #0]
 	mov	r2, fp
 	ldr	r3, [sp, #4]
-	b	.L1323
-.L1324:
+	b	.L1302
+.L1303:
 	adds	r0, r2, #1
 	ldrh	lr, [r6, r0, lsl #1]
 	strh	lr, [r6, r2, lsl #1]	@ movhi
 	uxth	r2, r0
-.L1323:
+.L1302:
 	cmp	r2, r1
-	bcc	.L1324
+	bcc	.L1303
 	subs	r1, r1, #1
 	strh	r1, [r5, #0]	@ movhi
-.L1322:
+.L1301:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1321:
+.L1300:
 	ldrh	r2, [r5, #0]
 	cmp	r2, fp
-	bhi	.L1325
+	bhi	.L1304
 	adds	r4, r4, #1
 	uxth	r4, r4
-	b	.L1319
-.L1327:
-	ldr	r7, .L1328+8
+	b	.L1298
+.L1306:
+	ldr	r7, .L1307+8
 	movs	r4, #0
-	ldr	r8, .L1328+12
+	ldr	r8, .L1307+12
 	mov	r6, r7
-.L1319:
+.L1298:
 	ldrh	r3, [r8, #0]
 	cmp	r3, r4
-	bhi	.L1326
+	bhi	.L1305
 	bl	FtlGcReFreshBadBlk
-.L1320:
+.L1299:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1329:
+.L1308:
 	.align	2
-.L1328:
-	.word	.LANCHOR148
+.L1307:
+	.word	.LANCHOR151
 	.word	.LANCHOR62
-	.word	.LANCHOR149
+	.word	.LANCHOR152
 	.word	.LANCHOR53
 	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
 	.section	.text.update_vpc_list,"ax",%progbits
@@ -11769,46 +11598,46 @@ update_vpc_list:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	mov	r4, r0
-	ldr	r3, .L1340
+	ldr	r3, .L1319
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
 	cmp	r3, #0
-	bne	.L1331
-	ldr	r2, .L1340+4
+	bne	.L1310
+	ldr	r2, .L1319+4
 	ldrh	r1, [r2, #0]
 	cmp	r1, r0
-	bne	.L1332
+	bne	.L1311
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1333
-.L1332:
-	ldr	r2, .L1340+8
+	b	.L1312
+.L1311:
+	ldr	r2, .L1319+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1334
-	ldr	r2, .L1340+12
+	beq	.L1313
+	ldr	r2, .L1319+12
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1334
-	ldr	r2, .L1340+16
+	beq	.L1313
+	ldr	r2, .L1319+16
 	ldrh	r2, [r2, #0]
 	cmp	r2, r0
-	beq	.L1334
-.L1333:
-	ldr	r5, .L1340+20
+	beq	.L1313
+.L1312:
+	ldr	r5, .L1319+20
 	mov	r1, r4
-	ldr	r0, .L1340+24
+	ldr	r0, .L1319+24
 	bl	List_remove_node
 	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1335
-	ldr	r1, .L1340+28
-	movw	r2, #2809
-	ldr	r0, .L1340+32
+	cbnz	r3, .L1314
+	ldr	r1, .L1319+28
+	movw	r2, #3039
+	ldr	r0, .L1319+32
 	bl	printf
-	ldr	r0, .L1340+36
-	ldr	r1, .L1340+40
+	ldr	r0, .L1319+36
+	ldr	r1, .L1319+40
 	bl	printf
-.L1335:
+.L1314:
 	ldrh	r3, [r5, #0]
 	mov	r0, r4
 	subs	r3, r3, #1
@@ -11816,46 +11645,46 @@ update_vpc_list:
 	bl	free_data_superblock
 	mov	r0, r4
 	bl	FtlGcFreeBadSuperBlk
-	ldr	r3, .L1340+44
+	ldr	r3, .L1319+44
 	ldrh	r2, [r3, #0]
 	ldrh	r3, [r5, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1340+48
+	ldr	r3, .L1319+48
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1339
-	ldr	r1, .L1340+28
-	movw	r2, #2812
-	ldr	r0, .L1340+32
+	ble	.L1318
+	ldr	r1, .L1319+28
+	movw	r2, #3042
+	ldr	r0, .L1319+32
 	bl	printf
-	ldr	r1, .L1340+40
-	ldr	r0, .L1340+36
+	ldr	r1, .L1319+40
+	ldr	r0, .L1319+36
 	bl	printf
-	b	.L1339
-.L1331:
+	b	.L1318
+.L1310:
 	bl	List_update_data_list
 	movs	r3, #0
-	b	.L1334
-.L1339:
+	b	.L1313
+.L1318:
 	movs	r3, #1
-.L1334:
+.L1313:
 	mov	r0, r3
 	pop	{r3, r4, r5, pc}
-.L1341:
+.L1320:
 	.align	2
-.L1340:
-	.word	.LANCHOR99
-	.word	.LANCHOR201
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR109
+.L1319:
 	.word	.LANCHOR101
-	.word	.LANCHOR98
-	.word	.LANCHOR206
+	.word	.LANCHOR202
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR103
+	.word	.LANCHOR100
+	.word	.LANCHOR207
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR104
+	.word	.LANCHOR106
 	.word	.LANCHOR55
 	.size	update_vpc_list, .-update_vpc_list
 	.section	.text.decrement_vpc_count,"ax",%progbits
@@ -11871,87 +11700,87 @@ decrement_vpc_count:
 	cmp	r0, r3
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
-	beq	.L1343
-	ldr	r6, .L1349
+	beq	.L1322
+	ldr	r6, .L1328
 	ldr	r3, [r6, #0]
 	ldrh	r5, [r3, r0, lsl #1]
-	cbnz	r5, .L1344
+	cbnz	r5, .L1323
 	mov	r1, r4
-	ldr	r0, .L1349+4
+	ldr	r0, .L1328+4
 	mov	r2, r5
 	bl	printf
 	ldr	r3, [r6, #0]
 	ldrh	r4, [r3, r4, lsl #1]
 	cmp	r4, #0
-	bne	.L1345
-	ldr	r1, .L1349+8
-	movw	r2, #2827
-	ldr	r0, .L1349+12
+	bne	.L1324
+	ldr	r1, .L1328+8
+	movw	r2, #3057
+	ldr	r0, .L1328+12
 	mov	r5, r4
 	bl	printf
-	ldr	r0, .L1349+16
-	ldr	r1, .L1349+20
+	ldr	r0, .L1328+16
+	ldr	r1, .L1328+20
 	bl	printf
-	b	.L1345
-.L1344:
+	b	.L1324
+.L1323:
 	subs	r5, r5, #1
 	strh	r5, [r3, r0, lsl #1]	@ movhi
-.L1343:
-	ldr	r6, .L1349+24
+.L1322:
+	ldr	r6, .L1328+24
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	bne	.L1346
+	bne	.L1325
 	strh	r4, [r6, #0]	@ movhi
-	b	.L1348
-.L1346:
+	b	.L1327
+.L1325:
 	cmp	r0, r4
-	beq	.L1348
+	beq	.L1327
 	bl	update_vpc_list
-	ldr	r3, .L1349+28
+	ldr	r3, .L1328+28
 	strh	r4, [r6, #0]	@ movhi
 	ldr	r2, [r3, #0]
-	ldr	r3, .L1349+32
+	ldr	r3, .L1328+32
 	ldr	r3, [r3, #0]
 	subs	r3, r2, r3
-	ldr	r2, .L1349+36
+	ldr	r2, .L1328+36
 	adds	r5, r0, #0
 	it	ne
 	movne	r5, #1
 	asrs	r3, r3, #1
 	muls	r3, r2, r3
-	ldr	r2, .L1349
+	ldr	r2, .L1328
 	uxth	r3, r3
 	ldr	r2, [r2, #0]
 	ldrh	r2, [r2, r3, lsl #1]
-	cbnz	r2, .L1345
+	cbnz	r2, .L1324
 	cmp	r4, r3
-	beq	.L1345
-	ldr	r1, .L1349+8
-	movw	r2, #2843
-	ldr	r0, .L1349+12
+	beq	.L1324
+	ldr	r1, .L1328+8
+	movw	r2, #3079
+	ldr	r0, .L1328+12
 	bl	printf
-	ldr	r1, .L1349+20
-	ldr	r0, .L1349+16
+	ldr	r1, .L1328+20
+	ldr	r0, .L1328+16
 	bl	printf
-	b	.L1345
-.L1348:
+	b	.L1324
+.L1327:
 	movs	r5, #0
-.L1345:
+.L1324:
 	mov	r0, r5
 	pop	{r4, r5, r6, pc}
-.L1350:
+.L1329:
 	.align	2
-.L1349:
-	.word	.LANCHOR99
+.L1328:
+	.word	.LANCHOR101
 	.word	.LC29
-	.word	.LANCHOR207
+	.word	.LANCHOR208
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR135
-	.word	.LANCHOR98
-	.word	.LANCHOR97
+	.word	.LANCHOR138
+	.word	.LANCHOR100
+	.word	.LANCHOR99
 	.word	-1431655765
 	.size	decrement_vpc_count, .-decrement_vpc_count
 	.section	.text.get_new_active_ppa,"ax",%progbits
@@ -11968,133 +11797,133 @@ get_new_active_ppa:
 	movw	r3, #65535
 	cmp	r2, r3
 	mov	r4, r0
-	bne	.L1352
-	ldr	r1, .L1367
-	movw	r2, #2749
-	ldr	r0, .L1367+4
+	bne	.L1331
+	ldr	r1, .L1346
+	movw	r2, #2979
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1352:
-	ldr	r3, .L1367+16
+.L1331:
+	ldr	r3, .L1346+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1353
-	ldr	r1, .L1367
-	movw	r2, #2750
-	ldr	r0, .L1367+4
+	bne	.L1332
+	ldr	r1, .L1346
+	movw	r2, #2980
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1353:
+.L1332:
 	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1354
-	ldr	r1, .L1367
-	movw	r2, #2751
-	ldr	r0, .L1367+4
+	cbnz	r3, .L1333
+	ldr	r1, .L1346
+	movw	r2, #2981
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1354:
+.L1333:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	movs	r7, #0
 	movw	r6, #65535
 	strb	r7, [r4, #10]
 	adds	r3, r3, #8
-	ldr	sl, .L1367+24
-	ldr	r8, .L1367+28
+	ldr	sl, .L1346+24
+	ldr	r8, .L1346+28
 	ldrh	r3, [r4, r3, lsl #1]
-	ldr	r5, .L1367+20
-	b	.L1355
-.L1356:
+	ldr	r5, .L1346+20
+	b	.L1334
+.L1335:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r5, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1357
+	bne	.L1336
 	ldrh	r3, [r4, #2]
 	strb	r7, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1357:
+.L1336:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1355:
+.L1334:
 	cmp	r3, r6
-	beq	.L1356
+	beq	.L1335
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1358
+	bne	.L1337
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1358
+	cbnz	r2, .L1337
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r6
-	bne	.L1358
+	bne	.L1337
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1356
-.L1358:
+	b	.L1335
+.L1337:
 	ldrh	r5, [r4, #2]
 	movw	r6, #65535
-	ldr	sl, .L1367+20
+	ldr	sl, .L1346+20
 	mov	r8, r6
-	ldr	r7, .L1367+24
+	ldr	r7, .L1346+24
 	orr	r5, r5, r3, lsl #10
 	ldrh	r3, [r4, #4]
 	subs	r3, r3, #1
 	strh	r3, [r4, #4]	@ movhi
-.L1363:
+.L1342:
 	ldrh	r2, [sl, #0]
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
-.L1360:
+.L1339:
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, r2
-	bne	.L1359
+	bne	.L1338
 	ldrh	r3, [r4, #2]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
-.L1359:
+.L1338:
 	add	r1, r3, #8
 	ldrh	r1, [r4, r1, lsl #1]
 	cmp	r1, r6
-	beq	.L1360
+	beq	.L1339
 	strb	r3, [r4, #6]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1361
+	bne	.L1340
 	ldrb	r2, [r7, #0]	@ zero_extendqisi2
 	ldrh	r3, [r4, #2]
-	cbnz	r2, .L1365
-	ldr	r2, .L1367+28
+	cbnz	r2, .L1344
+	ldr	r2, .L1346+28
 	ldrh	r3, [r2, r3, lsl #1]
 	cmp	r3, r8
-	bne	.L1361
+	bne	.L1340
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1361
+	cbz	r3, .L1340
 	subs	r3, r3, #1
 	ldrh	r0, [r4, #0]
 	strh	r3, [r4, #4]	@ movhi
 	bl	decrement_vpc_count
-	b	.L1363
-.L1365:
-	ldr	r2, .L1367+32
+	b	.L1342
+.L1344:
+	ldr	r2, .L1346+32
 	ldrh	r2, [r2, #0]
 	cmp	r3, r2
-	bcc	.L1361
-	ldr	r3, .L1367+36
+	bcc	.L1340
+	ldr	r3, .L1346+36
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -12104,32 +11933,32 @@ get_new_active_ppa:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1367+16
+	ldr	r3, .L1346+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1361:
-	ldr	r3, .L1367+16
+.L1340:
+	ldr	r3, .L1346+16
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1364
+	bne	.L1343
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1364
-	ldr	r1, .L1367
-	movw	r2, #2795
-	ldr	r0, .L1367+4
+	cbz	r3, .L1343
+	ldr	r1, .L1346
+	movw	r2, #3025
+	ldr	r0, .L1346+4
 	bl	printf
-	ldr	r0, .L1367+8
-	ldr	r1, .L1367+12
+	ldr	r0, .L1346+8
+	ldr	r1, .L1346+12
 	bl	printf
-.L1364:
+.L1343:
 	mov	r0, r5
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1368:
+.L1347:
 	.align	2
-.L1367:
-	.word	.LANCHOR208
+.L1346:
+	.word	.LANCHOR209
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -12138,7 +11967,7 @@ get_new_active_ppa:
 	.word	.LANCHOR7
 	.word	.LANCHOR9
 	.word	.LANCHOR69
-	.word	.LANCHOR99
+	.word	.LANCHOR101
 	.size	get_new_active_ppa, .-get_new_active_ppa
 	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
 	.align	1
@@ -12153,47 +11982,47 @@ FtlSlcSuperblockCheck:
 	mov	r4, r0
 	ldrh	r3, [r0, #4]
 	cmp	r3, #0
-	beq	.L1369
+	beq	.L1348
 	ldrh	r3, [r0, #0]
 	movw	r5, #65535
 	cmp	r3, r5
-	beq	.L1369
+	beq	.L1348
 	ldrb	r3, [r0, #6]	@ zero_extendqisi2
 	movs	r6, #0
-	ldr	sl, .L1375+4
+	ldr	sl, .L1354+4
 	adds	r3, r3, #8
-	ldr	r8, .L1375+20
-	ldr	r7, .L1375
+	ldr	r8, .L1354+20
+	ldr	r7, .L1354
 	ldrh	r3, [r0, r3, lsl #1]
-	b	.L1371
-.L1372:
+	b	.L1350
+.L1351:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	ldrh	r2, [r7, #0]
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	strb	r3, [r4, #6]
 	cmp	r2, r3
-	bne	.L1373
+	bne	.L1352
 	ldrh	r3, [r4, #2]
 	strb	r6, [r4, #6]
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1373:
+.L1352:
 	ldrb	r3, [r4, #6]	@ zero_extendqisi2
 	adds	r3, r3, #8
 	ldrh	r3, [r4, r3, lsl #1]
-.L1371:
+.L1350:
 	cmp	r3, r5
-	beq	.L1372
+	beq	.L1351
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1374
+	bne	.L1353
 	ldrb	r2, [sl, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1374
+	cbnz	r2, .L1353
 	ldrh	r2, [r4, #2]
 	ldrh	r2, [r8, r2, lsl #1]
 	cmp	r2, r5
-	bne	.L1374
+	bne	.L1353
 	ldrh	r3, [r4, #4]
 	ldrh	r0, [r4, #0]
 	subs	r3, r3, #1
@@ -12201,24 +12030,24 @@ FtlSlcSuperblockCheck:
 	bl	decrement_vpc_count
 	ldrh	r3, [r4, #4]
 	cmp	r3, #0
-	bne	.L1372
+	bne	.L1351
 	ldrh	r2, [r4, #2]
 	strb	r3, [r4, #6]
 	adds	r2, r2, #1
 	strh	r2, [r4, #2]	@ movhi
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1374:
-	ldr	r2, .L1375+4
+.L1353:
+	ldr	r2, .L1354+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1369
+	cbz	r2, .L1348
 	cmp	r3, #1
-	bne	.L1369
-	ldr	r3, .L1375+8
+	bne	.L1348
+	ldr	r3, .L1354+8
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1369
-	ldr	r3, .L1375+12
+	bcc	.L1348
+	ldr	r3, .L1354+12
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
@@ -12228,19 +12057,19 @@ FtlSlcSuperblockCheck:
 	movs	r3, #0
 	strh	r3, [r4, #4]	@ movhi
 	mov	r2, r3	@ movhi
-	ldr	r3, .L1375+16
+	ldr	r3, .L1354+16
 	strb	r2, [r4, #6]
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
-.L1369:
+.L1348:
 	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
-.L1376:
+.L1355:
 	.align	2
-.L1375:
+.L1354:
 	.word	.LANCHOR53
 	.word	.LANCHOR7
 	.word	.LANCHOR69
-	.word	.LANCHOR99
+	.word	.LANCHOR101
 	.word	.LANCHOR68
 	.word	.LANCHOR9
 	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
@@ -12253,103 +12082,108 @@ FtlSlcSuperblockCheck:
 allocate_data_superblock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1401
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
-	ldr	r7, .L1419
+	ldr	r3, [r3, #0]
 	sub	sp, sp, #24
-	ldr	r8, .L1419+100
-.L1416:
-	ldr	r1, .L1419+4
+	cmp	r3, #0
+	bne	.L1357
+	ldr	r7, .L1401+4
+	ldr	r8, .L1401+104
+.L1397:
+	ldr	r1, .L1401+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1379
-	ldr	r1, .L1419+12
-	movw	r2, #2594
-	ldr	r0, .L1419+16
+	ble	.L1359
+	ldr	r1, .L1401+16
+	movw	r2, #2815
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1379:
-	ldr	r3, .L1419+28
+.L1359:
+	ldr	r3, .L1401+32
 	cmp	r4, r3
-	bne	.L1380
-	ldr	r3, .L1419+32
+	bne	.L1360
+	ldr	r3, .L1401+36
 	ldrh	r2, [r7, #0]
 	ldr	r3, [r3, #0]
 	lsrs	r1, r2, #1
 	adds	r0, r1, #1
 	mul	r5, r3, r2
 	add	r0, r0, r5, lsr #2
-	ldr	r5, .L1419+36
+	ldr	r5, .L1401+40
 	uxth	r0, r0
 	ldr	r5, [r5, #0]
-	cbz	r5, .L1408
-	ldr	r5, .L1419+40
+	cbz	r5, .L1389
+	ldr	r5, .L1401+44
 	ldr	r5, [r5, #0]
 	cmp	r5, #29
-	bhi	.L1408
+	bhi	.L1389
 	cmp	r5, #2
-	bls	.L1413
+	bls	.L1394
 	lsls	r0, r2, #31
-	bpl	.L1381
-	cbz	r3, .L1410
-	b	.L1381
-.L1380:
+	bpl	.L1361
+	cbz	r3, .L1391
+	b	.L1361
+.L1360:
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1413
-	ldr	r3, .L1419+44
+	bne	.L1394
+	ldr	r3, .L1401+48
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1413
-	ldr	r3, .L1419+48
+	beq	.L1394
+	ldr	r3, .L1401+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1413
-	ldr	r2, .L1419+36
+	cbnz	r3, .L1394
+	ldr	r2, .L1401+40
 	ldrh	r3, [r7, #0]
 	ldr	r2, [r2, #0]
 	lsrs	r1, r3, #3
-	cbz	r2, .L1381
-	ldr	r2, .L1419+40
+	cbz	r2, .L1361
+	ldr	r2, .L1401+44
 	ldr	r2, [r2, #0]
 	cmp	r2, #1
-	bhi	.L1381
+	bhi	.L1361
 	movs	r1, #7
 	muls	r1, r3, r1
 	lsrs	r1, r1, #3
-	b	.L1381
-.L1408:
+	b	.L1361
+.L1389:
 	mov	r1, r0
-.L1381:
-	cbz	r1, .L1382
+.L1361:
+	cbz	r1, .L1362
 	subs	r1, r1, #1
 	uxth	r1, r1
-	b	.L1382
-.L1410:
+	b	.L1362
+.L1391:
 	mov	r1, r3
-	b	.L1382
-.L1413:
+	b	.L1362
+.L1394:
 	movs	r1, #0
-.L1382:
-	ldr	r0, .L1419+52
+.L1362:
+	ldr	r0, .L1401+56
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	bl	List_pop_index_node
 	ldrh	r3, [r7, #0]
 	uxth	r5, r0
-	cbnz	r3, .L1383
-	ldr	r1, .L1419+12
-	movw	r2, #2614
-	ldr	r0, .L1419+16
+	cbnz	r3, .L1363
+	ldr	r1, .L1401+16
+	movw	r2, #2835
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1383:
-	ldr	r2, .L1419
+.L1363:
+	ldr	r2, .L1401+4
 	mov	r0, r4
 	ldrh	r3, [r2, #0]
 	subs	r3, r3, #1
@@ -12357,45 +12191,45 @@ allocate_data_superblock:
 	strh	r5, [r4, #0]	@ movhi
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1384
-	ldr	r3, .L1419+56
+	cbnz	r3, .L1364
+	ldr	r3, .L1401+60
 	movw	r2, #65535
-	ldr	r1, .L1419+4
+	ldr	r1, .L1401+8
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	ldrh	r3, [r1, #0]
 	ldrh	r2, [r7, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1416
-	ldr	r1, .L1419+12
-	movw	r2, #2625
-	ldr	r0, .L1419+16
+	ble	.L1397
+	ldr	r1, .L1401+16
+	movw	r2, #2847
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r1, .L1419+24
-	ldr	r0, .L1419+20
+	ldr	r1, .L1401+28
+	ldr	r0, .L1401+24
 	bl	printf
-	b	.L1416
-.L1384:
-	ldr	r1, .L1419+4
+	b	.L1397
+.L1364:
+	ldr	r1, .L1401+8
 	ldrh	r2, [r7, #0]
 	ldrh	r3, [r1, #0]
 	adds	r2, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	ble	.L1386
-	ldr	r1, .L1419+12
-	movw	r2, #2628
-	ldr	r0, .L1419+16
+	ble	.L1366
+	ldr	r1, .L1401+16
+	movw	r2, #2850
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1386:
-	ldr	r3, .L1419+60
+.L1366:
+	ldr	r3, .L1401+64
 	movs	r6, #0
 	ldr	lr, [r8, #0]
 	mov	sl, r4
@@ -12406,14 +12240,14 @@ allocate_data_superblock:
 	stmia	sp, {r4, lr}
 	str	r3, [sp, #20]
 	mov	r3, lr
-	b	.L1387
-.L1389:
+	b	.L1367
+.L1369:
 	str	r0, [r3, #8]
 	movw	r4, #65535
 	str	r0, [r3, #12]
 	ldrh	ip, [r1, #16]
 	cmp	ip, r4
-	beq	.L1388
+	beq	.L1368
 	ldr	r4, [sp, #4]
 	mov	lr, #36
 	lsl	ip, ip, #10
@@ -12421,154 +12255,170 @@ allocate_data_superblock:
 	adds	r6, r6, #1
 	uxth	r6, r6
 	str	ip, [fp, #4]
-.L1388:
+.L1368:
 	adds	r2, r2, #1
 	adds	r3, r3, #36
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1387:
+.L1367:
 	ldr	r4, [sp, #20]
 	cmp	r2, r4
-	bne	.L1389
+	bne	.L1369
 	ldr	r4, [sp, #0]
-	cbnz	r6, .L1390
-	ldr	r1, .L1419+12
-	mov	r2, #2640
-	ldr	r0, .L1419+16
+	cbnz	r6, .L1370
+	ldr	r1, .L1401+16
+	movw	r2, #2862
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1390:
-	ldr	r3, .L1419+36
+.L1370:
+	ldr	r3, .L1401+40
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1391
-	ldr	r3, .L1419+64
+	cbz	r3, .L1371
+	ldr	r3, .L1401+68
 	cmp	r4, r3
-	bne	.L1391
-	ldr	r3, .L1419+68
+	bne	.L1371
+	ldr	r3, .L1401+72
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
 	cmp	r3, #30
-	bls	.L1391
+	bls	.L1371
 	movs	r3, #0
 	strb	r3, [r4, #8]
-.L1391:
-	ldr	r3, .L1419+72
+.L1371:
+	ldr	r3, .L1401+76
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bne	.L1392
-	ldr	r1, .L1419+12
-	movw	r2, #2647
-	ldr	r0, .L1419+16
+	bne	.L1372
+	ldr	r1, .L1401+16
+	movw	r2, #2869
+	ldr	r0, .L1401+20
 	bl	printf
-	ldr	r0, .L1419+20
-	ldr	r1, .L1419+24
+	ldr	r0, .L1401+24
+	ldr	r1, .L1401+28
 	bl	printf
-.L1392:
-	ldr	r3, .L1419+68
+.L1372:
+	ldr	r3, .L1401+72
 	ldrb	r2, [r4, #8]	@ zero_extendqisi2
 	ldr	r3, [r3, #0]
-	cbnz	r2, .L1393
+	cbnz	r2, .L1373
 	ldrh	r2, [r3, r5, lsl #1]
-	cbz	r2, .L1394
-	ldr	r1, .L1419+76
+	cbz	r2, .L1374
+	ldr	r1, .L1401+80
 	ldrh	r1, [r1, #0]
 	adds	r2, r2, r1
-	b	.L1417
-.L1394:
+	b	.L1398
+.L1374:
 	movs	r2, #2
-.L1417:
+.L1398:
 	strh	r2, [r3, r5, lsl #1]	@ movhi
 	mov	r0, r5
-	ldr	r3, .L1419+80
+	ldr	r3, .L1401+84
 	movs	r1, #0
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-	b	.L1418
-.L1393:
+	b	.L1399
+.L1373:
 	ldrh	r2, [r3, r5, lsl #1]
 	mov	r0, r5
 	movs	r1, #1
 	adds	r2, r2, #1
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	ldr	r3, .L1419+84
+	ldr	r3, .L1401+88
 	ldr	r2, [r3, #0]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
-.L1418:
+.L1399:
 	bl	ftl_set_blk_mode
-	ldr	r3, .L1419+68
+	ldr	r3, .L1401+72
 	lsl	fp, r5, #1
 	str	fp, [sp, #20]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1419+88
+	ldr	r3, .L1401+92
 	ldr	r1, [r3, #0]
 	cmp	r2, r1
 	it	hi
 	strhi	r2, [r3, #0]
-	ldr	r3, .L1419+76
+	ldr	r3, .L1401+80
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L1419+80
+	ldr	r3, .L1401+84
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1419+84
+	ldr	r3, .L1401+88
 	ldr	r3, [r3, #0]
 	mla	r0, r0, r2, r3
-	ldr	r3, .L1419+8
+	ldr	r3, .L1401+12
 	ldrh	r1, [r3, #0]
 	bl	__aeabi_uidiv
-	ldr	r3, .L1419+92
+	ldr	r3, .L1401+96
 	str	r0, [r3, #0]
-	ldr	r3, .L1419+96
+	ldr	r3, .L1401+100
 	ldr	r3, [r3, #0]
 	ldr	r2, [r3, #16]
 	adds	r2, r2, #1
 	str	r2, [r3, #16]
 	ldr	r3, [r8, #0]
 	movs	r2, #0
-	b	.L1398
-.L1420:
+	b	.L1378
+.L1402:
 	.align	2
-.L1419:
-	.word	.LANCHOR104
-	.word	.LANCHOR101
+.L1401:
+	.word	.LANCHOR94
+	.word	.LANCHOR106
+	.word	.LANCHOR103
 	.word	.LANCHOR55
-	.word	.LANCHOR209
+	.word	.LANCHOR210
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR109
-	.word	.LANCHOR166
-	.word	.LANCHOR126
-	.word	.LANCHOR164
+	.word	.LANCHOR111
+	.word	.LANCHOR169
+	.word	.LANCHOR128
+	.word	.LANCHOR167
 	.word	.LANCHOR59
 	.word	.LANCHOR7
-	.word	.LANCHOR103
-	.word	.LANCHOR99
+	.word	.LANCHOR105
+	.word	.LANCHOR101
 	.word	.LANCHOR53
-	.word	.LANCHOR107
-	.word	.LANCHOR94
-	.word	.LANCHOR201
+	.word	.LANCHOR109
+	.word	.LANCHOR96
+	.word	.LANCHOR202
 	.word	.LANCHOR63
-	.word	.LANCHOR161
-	.word	.LANCHOR162
-	.word	.LANCHOR163
-	.word	.LANCHOR195
-	.word	.LANCHOR183
-	.word	.LANCHOR93
-.L1399:
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR211
+	.word	.LANCHOR187
+	.word	.LANCHOR95
+.L1379:
 	adds	r2, r2, #1
 	ldr	r1, [r3, #-32]
 	uxth	r2, r2
 	bic	r1, r1, #1020
 	bic	r1, r1, #3
 	str	r1, [r3, #-32]
-.L1398:
+.L1378:
 	adds	r3, r3, #36
 	cmp	r2, r6
-	bne	.L1399
+	bne	.L1379
+	ldr	r3, .L1403
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1380
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	ldr	r0, [r8, #0]
+	cmp	r3, #1
+	bne	.L1381
+	movs	r1, #0
+	b	.L1400
+.L1381:
+	movs	r1, #1
+.L1400:
+	mov	r2, r6
+	bl	FlashEraseBlocks
+.L1380:
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	mov	r2, r6
 	mov	fp, #0
@@ -12579,52 +12429,52 @@ allocate_data_superblock:
 	mov	r5, fp
 	mov	r6, r4
 	mov	r4, fp
-	b	.L1400
-.L1402:
+	b	.L1382
+.L1384:
 	ldr	r1, [r8, #0]
 	add	r0, r1, fp
 	ldr	r1, [r1, fp]
 	adds	r2, r1, #1
-	bne	.L1401
+	bne	.L1383
 	ldr	r0, [r0, #4]
 	adds	r5, r5, #1
 	str	r1, [sp, #16]
 	ubfx	r0, r0, #10, #16
-	str	r3, [sp, #12]
-	str	ip, [sp, #8]
+	str	r3, [sp, #8]
+	str	ip, [sp, #12]
 	bl	FtlBbmMapBadBlock
 	ldr	r1, [sp, #16]
 	strh	r1, [sl, #16]	@ movhi
 	ldrb	r1, [r6, #7]	@ zero_extendqisi2
 	subs	r1, r1, #1
 	strb	r1, [r6, #7]
-	ldr	ip, [sp, #8]
-	ldr	r3, [sp, #12]
-.L1401:
+	ldr	ip, [sp, #12]
+	ldr	r3, [sp, #8]
+.L1383:
 	adds	r4, r4, #1
 	add	fp, fp, #36
 	add	sl, sl, #2
 	uxth	r4, r4
-.L1400:
+.L1382:
 	cmp	r4, r3
-	bne	.L1402
+	bne	.L1384
 	mov	r3, r5
 	mov	r4, r6
 	mov	r5, ip
-	cbz	r3, .L1403
+	cbz	r3, .L1385
 	mov	r0, ip
 	bl	update_multiplier_value
 	bl	FtlBbmTblFlush
-.L1403:
+.L1385:
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1404
-	ldr	r3, .L1421
+	cbnz	r3, .L1386
+	ldr	r3, .L1403+4
 	movw	r2, #65535
 	ldr	r3, [r3, #0]
 	strh	r2, [r3, r5, lsl #1]	@ movhi
-	b	.L1416
-.L1404:
-	ldr	r2, .L1421+4
+	b	.L1397
+.L1386:
+	ldr	r2, .L1403+8
 	ldr	fp, [sp, #20]
 	ldrh	r2, [r2, #0]
 	muls	r3, r2, r3
@@ -12632,39 +12482,40 @@ allocate_data_superblock:
 	strh	r2, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	uxth	r3, r3
-	ldr	r2, .L1421+8
+	ldr	r2, .L1403+12
 	strh	r5, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldr	r1, [r2, #0]
 	str	r1, [r4, #12]
 	adds	r1, r1, #1
 	str	r1, [r2, #0]
-	ldr	r2, .L1421
+	ldr	r2, .L1403+4
 	ldr	r2, [r2, #0]
 	strh	r3, [r2, fp]	@ movhi
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1405
+	cbz	r3, .L1387
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
-	cbnz	r3, .L1406
-.L1405:
-	ldr	r1, .L1421+12
-	movw	r2, #2700
-	ldr	r0, .L1421+16
+	cbnz	r3, .L1357
+.L1387:
+	ldr	r1, .L1403+16
+	mov	r2, #2928
+	ldr	r0, .L1403+20
 	bl	printf
-	ldr	r0, .L1421+20
-	ldr	r1, .L1421+24
+	ldr	r0, .L1403+24
+	ldr	r1, .L1403+28
 	bl	printf
-.L1406:
+.L1357:
 	movs	r0, #0
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1422:
+.L1404:
 	.align	2
-.L1421:
-	.word	.LANCHOR99
+.L1403:
+	.word	.LANCHOR7
+	.word	.LANCHOR101
 	.word	.LANCHOR68
-	.word	.LANCHOR153
-	.word	.LANCHOR209
+	.word	.LANCHOR156
+	.word	.LANCHOR210
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
@@ -12678,67 +12529,72 @@ allocate_data_superblock:
 FtlSuperblockPowerLostFix:
 	@ args = 0, pretend = 0, frame = 40
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1430
+	ldr	r3, .L1414
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
-	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	ldrb	r6, [r3, #0]	@ zero_extendqisi2
 	sub	sp, sp, #40
-	cbz	r7, .L1424
-	ldrb	r7, [r0, #8]	@ zero_extendqisi2
-	sub	r5, r7, #1
-	rsbs	r7, r5, #0
-	adc	r7, r7, r5
-.L1424:
-	mov	r8, #7
-	mov	r5, #-1
-	ldr	sl, .L1430+16
-	ldr	fp, .L1430+20
-	ldr	r6, .L1430+4
-	b	.L1425
-.L1428:
+	cbz	r6, .L1413
+	ldrb	r6, [r0, #8]	@ zero_extendqisi2
+	cmp	r6, #1
+	bne	.L1412
+	ldrh	r5, [r0, #4]
+	b	.L1406
+.L1412:
+	movs	r6, #0
+.L1413:
+	movs	r5, #12
+.L1406:
+	mov	r7, #-1
+	ldr	sl, .L1414+12
+	ldr	fp, .L1414+16
+	ldr	r8, .L1414+20
+	b	.L1407
+.L1410:
 	ldrh	r3, [r4, #4]
-	cbz	r3, .L1426
+	cbz	r3, .L1408
 	mov	r0, r4
 	bl	get_new_active_ppa
 	str	r0, [sp, #8]
 	adds	r0, r0, #1
-	beq	.L1426
+	beq	.L1408
 	ldr	r3, [sl, #0]
 	add	r0, sp, #4
 	ldr	r2, [fp, #0]
-	ldr	r1, [r6, #0]
+	subs	r5, r5, #1
+	ldr	r1, [r8, #0]
 	str	r3, [sp, #12]
 	ldrh	r3, [r4, #0]
 	str	r2, [sp, #16]
-	str	r5, [sp, #20]
+	str	r7, [sp, #20]
 	strh	r3, [r2, #2]	@ movhi
 	movs	r3, #0
 	str	r1, [r2, #4]
 	strh	r3, [r2, #0]	@ movhi
-	str	r5, [r2, #8]
-	str	r5, [r2, #12]
+	str	r7, [r2, #8]
+	str	r7, [r2, #12]
 	adds	r2, r1, #1
 	cmp	r2, #-1
 	it	eq
 	moveq	r2, r3
 	movs	r1, #1
-	str	r2, [r6, #0]
-	mov	r2, r7
+	str	r2, [r8, #0]
+	mov	r2, r6
 	bl	FlashProgPages
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-.L1425:
-	subs	r8, r8, #1
-	bne	.L1428
-.L1426:
-	ldr	r3, .L1430+8
+.L1407:
+	cmp	r5, #0
+	bne	.L1410
+.L1408:
+	ldr	r3, .L1414+4
 	ldrh	r2, [r4, #0]
 	ldrh	r1, [r4, #4]
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, r2, lsl #1]
 	subs	r1, r0, r1
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L1430+12
+	ldr	r3, .L1414+8
 	ldrh	r3, [r3, #0]
 	strh	r3, [r4, #2]	@ movhi
 	movs	r3, #0
@@ -12746,15 +12602,15 @@ FtlSuperblockPowerLostFix:
 	strh	r3, [r4, #4]	@ movhi
 	add	sp, sp, #40
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1431:
+.L1415:
 	.align	2
-.L1430:
+.L1414:
 	.word	.LANCHOR7
-	.word	.LANCHOR154
-	.word	.LANCHOR99
+	.word	.LANCHOR101
 	.word	.LANCHOR68
-	.word	.LANCHOR96
-	.word	.LANCHOR180
+	.word	.LANCHOR98
+	.word	.LANCHOR184
+	.word	.LANCHOR157
 	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
 	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
 	.align	1
@@ -12765,24 +12621,27 @@ FtlSuperblockPowerLostFix:
 FtlLowFormatEraseBlock:
 	@ args = 0, pretend = 0, frame = 24
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1462
+	ldr	r3, .L1447
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #24
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	movs	r6, #0
-	str	r0, [sp, #12]
+	ldr	r6, [r3, #0]
 	mov	r8, r1
-	mov	r4, r6
+	str	r0, [sp, #12]
+	cmp	r6, #0
+	bne	.L1440
+	ldr	r3, .L1447+4
 	mov	r5, r6
-	str	r3, [sp, #8]
+	mov	r4, r6
+	ldr	sl, .L1447+28
 	movs	r7, #36
-	ldr	r3, .L1462+4
-	ldr	sl, .L1462+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [sp, #8]
+	ldr	r3, .L1447+8
 	str	r0, [r3, #0]
-	b	.L1433
-.L1437:
+	b	.L1418
+.L1422:
 	mul	r3, r7, r6
-	ldr	r1, .L1462+8
+	ldr	r1, .L1447+12
 	ldr	fp, [sl, #0]
 	movs	r0, #0
 	str	r0, [fp, r3]
@@ -12791,106 +12650,106 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #4]
 	cmp	r8, #0
-	beq	.L1434
+	beq	.L1419
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1435
-.L1434:
+	cbnz	r0, .L1420
+.L1419:
 	ldr	r0, [sp, #4]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1436
-	mul	r3, r7, r4
+	cbnz	r0, .L1421
+	mul	r3, r7, r5
 	ldr	r2, [sl, #0]
 	ldr	ip, [sp, #4]
 	adds	r2, r2, r3
 	add	r3, fp, r3
 	lsl	r1, ip, #10
 	str	r0, [r3, #8]
-	ldr	r0, .L1462+12
+	ldr	r0, .L1447+16
 	str	r1, [r2, #4]
 	ldrh	r2, [r0, #0]
-	muls	r2, r4, r2
-	ldr	r0, .L1462+16
-	adds	r4, r4, #1
+	muls	r2, r5, r2
+	ldr	r0, .L1447+20
+	adds	r5, r5, #1
 	bic	r2, r2, #3
-	uxth	r4, r4
+	uxth	r5, r5
 	ldr	r1, [r0, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-	b	.L1435
-.L1436:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L1435:
+	b	.L1420
+.L1421:
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L1420:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1433:
-	ldr	r1, .L1462+20
+.L1418:
+	ldr	r1, .L1447+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, r6
-	bhi	.L1437
-	cmp	r4, #0
-	beq	.L1439
+	bhi	.L1422
+	cmp	r5, #0
+	beq	.L1417
 	ldr	r2, [sp, #8]
 	mov	sl, #0
-	ldr	r7, .L1462+24
+	ldr	r7, .L1447+28
 	mov	fp, sl
 	adds	r6, r2, #0
-	mov	r2, r4
+	mov	r2, r5
 	it	ne
 	movne	r6, #1
 	ldr	r0, [r7, #0]
 	mov	r1, r6
 	bl	FlashEraseBlocks
-.L1441:
+.L1426:
 	ldr	r3, [r7, #0]
 	add	r2, r3, sl
 	ldr	r3, [r3, sl]
 	adds	r3, r3, #1
-	bne	.L1440
+	bne	.L1425
 	ldr	r0, [r2, #4]
-	adds	r5, r5, #1
+	adds	r4, r4, #1
 	ubfx	r0, r0, #10, #16
-	uxth	r5, r5
+	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
-.L1440:
+.L1425:
 	add	fp, fp, #1
 	add	sl, sl, #36
 	uxth	fp, fp
-	cmp	fp, r4
-	bne	.L1441
+	cmp	fp, r5
+	bne	.L1426
 	cmp	r8, #0
-	beq	.L1455
-	ldr	r3, .L1462+28
+	beq	.L1441
+	ldr	r3, .L1447+32
 	ldrh	r3, [r3, #0]
-	str	r3, [sp, #8]
-	ldr	r3, .L1462
+	str	r3, [sp, #4]
+	ldr	r3, .L1447+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1456
-	ldr	ip, [sp, #8]
+	cbnz	r3, .L1442
+	ldr	ip, [sp, #4]
 	movs	r6, #1
 	lsr	ip, ip, #2
-	str	ip, [sp, #4]
-	b	.L1442
-.L1455:
+	str	ip, [sp, #8]
+	b	.L1427
+.L1441:
 	mov	ip, #6
-	str	ip, [sp, #4]
-	mov	ip, #1
 	str	ip, [sp, #8]
-	b	.L1442
-.L1456:
-	movs	r6, #1
-	str	r6, [sp, #4]
+	mov	ip, #1
+	str	ip, [sp, #4]
+	b	.L1427
 .L1442:
-	ldr	sl, .L1462+24
+	movs	r6, #1
+	str	r6, [sp, #8]
+.L1427:
+	ldr	sl, .L1447+28
 	movs	r7, #0
-.L1450:
+.L1435:
 	mov	fp, #0
-	mov	r4, fp
-	b	.L1443
-.L1446:
+	mov	r5, fp
+	b	.L1428
+.L1431:
 	mov	ip, #36
 	ldr	r2, [sl, #0]
-	ldr	r1, .L1462+8
+	ldr	r1, .L1447+12
 	movs	r0, #0
 	mul	r3, ip, fp
 	str	r2, [sp, #16]
@@ -12900,127 +12759,133 @@ FtlLowFormatEraseBlock:
 	bl	V2P_block
 	str	r0, [sp, #20]
 	cmp	r8, #0
-	beq	.L1444
+	beq	.L1429
 	bl	IsBlkInVendorPart
-	cbnz	r0, .L1445
-.L1444:
+	cbnz	r0, .L1430
+.L1429:
 	ldr	r0, [sp, #20]
 	bl	FtlBbmIsBadBlock
-	cbnz	r0, .L1445
+	cbnz	r0, .L1430
 	ldr	r2, [sp, #16]
 	mov	ip, #36
 	ldr	r1, [sp, #20]
-	ldr	r0, .L1462+32
-	mla	r3, ip, r4, r2
+	ldr	r0, .L1447+36
+	mla	r3, ip, r5, r2
 	add	r2, r7, r1, lsl #10
-	ldr	r1, .L1462+12
+	ldr	r1, .L1447+16
 	str	r2, [r3, #4]
 	ldr	r2, [r0, #0]
-	ldr	r0, .L1462+36
+	ldr	r0, .L1447+40
 	str	r2, [r3, #8]
 	ldrh	r2, [r1, #0]
-	muls	r2, r4, r2
-	adds	r4, r4, #1
+	muls	r2, r5, r2
+	adds	r5, r5, #1
 	ldr	r1, [r0, #0]
 	bic	r2, r2, #3
-	uxth	r4, r4
+	uxth	r5, r5
 	adds	r2, r1, r2
 	str	r2, [r3, #12]
-.L1445:
+.L1430:
 	add	fp, fp, #1
 	uxth	fp, fp
-.L1443:
-	ldr	r1, .L1462+20
+.L1428:
+	ldr	r1, .L1447+24
 	ldrh	r3, [r1, #0]
 	cmp	r3, fp
-	bhi	.L1446
-	cmp	r4, #0
-	beq	.L1439
-	mov	r1, r4
+	bhi	.L1431
+	cmp	r5, #0
+	beq	.L1417
+	mov	r1, r5
 	mov	r2, r6
 	ldr	r0, [sl, #0]
 	movs	r3, #1
 	mov	fp, #0
 	bl	FlashProgPages
 	mov	ip, r8
-	mov	r8, r6
-	mov	r6, r4
-	mov	r4, fp
-.L1449:
+	mov	r8, r7
+	mov	r7, r6
+	mov	r6, r5
+	mov	r5, fp
+.L1434:
 	ldr	r2, [sl, #0]
 	add	r1, r2, fp
 	ldr	r2, [r2, fp]
-	cbz	r2, .L1448
+	cbz	r2, .L1433
 	ldr	r0, [r1, #4]
-	adds	r5, r5, #1
+	adds	r4, r4, #1
 	str	ip, [sp, #0]
 	ubfx	r0, r0, #10, #16
-	uxth	r5, r5
+	uxth	r4, r4
 	bl	FtlBbmMapBadBlock
 	ldr	ip, [sp, #0]
-.L1448:
-	adds	r4, r4, #1
+.L1433:
+	adds	r5, r5, #1
 	add	fp, fp, #36
-	uxth	r4, r4
-	cmp	r4, r6
-	bne	.L1449
-	mov	r4, r6
-	mov	r6, r8
+	uxth	r5, r5
+	cmp	r5, r6
+	bne	.L1434
+	mov	r5, r6
+	mov	r6, r7
+	mov	r7, r8
 	mov	r8, ip
-	ldr	ip, [sp, #4]
-	add	r7, r7, ip
 	ldr	ip, [sp, #8]
+	add	r7, r7, ip
+	ldr	ip, [sp, #4]
 	uxth	r7, r7
 	cmp	r7, ip
-	bcc	.L1450
+	bcc	.L1435
 	movs	r7, #0
-	ldr	fp, .L1462+24
+	ldr	fp, .L1447+28
 	mov	sl, r7
-.L1452:
+.L1437:
 	cmp	r8, #0
-	beq	.L1451
+	beq	.L1436
 	ldr	r3, [fp, #0]
 	adds	r2, r3, r7
 	ldr	r3, [r3, r7]
-	cbnz	r3, .L1451
+	cbnz	r3, .L1436
 	ldr	r0, [r2, #4]
 	movs	r1, #1
 	ubfx	r0, r0, #10, #16
 	bl	FtlFreeSysBlkQueueIn
-.L1451:
+.L1436:
 	add	sl, sl, #1
 	adds	r7, r7, #36
 	uxth	sl, sl
-	cmp	sl, r4
-	bne	.L1452
+	cmp	sl, r5
+	bne	.L1437
 	ldr	r0, [sp, #12]
 	cmp	r0, #63
-	bls	.L1453
+	bls	.L1438
 	cmp	r8, #0
-	beq	.L1439
-.L1453:
-	ldr	r3, .L1462+24
+	beq	.L1417
+.L1438:
+	ldr	r3, .L1447+28
 	mov	r1, r6
-	mov	r2, r4
+	mov	r2, r5
 	ldr	r0, [r3, #0]
 	bl	FlashEraseBlocks
-.L1439:
-	mov	r0, r5
+	b	.L1417
+.L1440:
+	movs	r4, #0
+.L1417:
+	mov	r0, r4
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1463:
+.L1448:
 	.align	2
-.L1462:
+.L1447:
+	.word	.LANCHOR94
 	.word	.LANCHOR7
-	.word	.LANCHOR88
+	.word	.LANCHOR89
 	.word	.LANCHOR62
 	.word	.LANCHOR74
-	.word	.LANCHOR181
+	.word	.LANCHOR185
 	.word	.LANCHOR53
-	.word	.LANCHOR93
+	.word	.LANCHOR95
 	.word	.LANCHOR69
-	.word	.LANCHOR178
-	.word	.LANCHOR179
+	.word	.LANCHOR182
+	.word	.LANCHOR183
 	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
 	.section	.text.FlashTestBlk,"ax",%progbits
 	.align	1
@@ -13031,15 +12896,15 @@ FtlLowFormatEraseBlock:
 FlashTestBlk:
 	@ args = 0, pretend = 0, frame = 104
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1469
+	ldr	r3, .L1454
 	push	{r4, r5, lr}
 	mov	r4, r0
 	ldr	r3, [r3, #0]
 	sub	sp, sp, #108
 	cmp	r0, r3
-	bcc	.L1467
-.L1466:
-	ldr	r5, .L1469+4
+	bcc	.L1452
+.L1451:
+	ldr	r5, .L1454+4
 	add	r0, sp, #4
 	movs	r1, #165
 	movs	r2, #32
@@ -13071,16 +12936,16 @@ FlashTestBlk:
 	movne	r4, #-1
 	moveq	r4, #0
 	bl	FlashEraseBlocks
-	b	.L1465
-.L1467:
+	b	.L1450
+.L1452:
 	movs	r4, #0
-.L1465:
+.L1450:
 	mov	r0, r4
 	add	sp, sp, #108
 	pop	{r4, r5, pc}
-.L1470:
+.L1455:
 	.align	2
-.L1469:
+.L1454:
 	.word	.LANCHOR46
 	.word	.LANCHOR41
 	.size	FlashTestBlk, .-FlashTestBlk
@@ -13096,114 +12961,164 @@ ftl_map_blk_gc:
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
 	ldr	r5, [r0, #12]
-	ldr	sl, [r0, #24]
+	ldr	fp, [r0, #24]
 	bl	ftl_free_no_use_map_blk
-	ldrh	r3, [r4, #10]
+	ldrh	r7, [r4, #10]
 	ldrh	r2, [r4, #8]
-	subs	r3, r3, #4
+	subs	r3, r7, #4
 	cmp	r2, r3
-	blt	.L1472
-	uxth	r0, r0
-	ldrh	r7, [r5, r0, lsl #1]
+	bge	.L1457
+	ldrh	r2, [r4, #40]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1458
+	ldr	r3, .L1471
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1458
+.L1457:
+	ldrh	r1, [r4, #40]
+	movw	r3, #65535
+	uxth	r6, r0
+	cmp	r1, r3
+	beq	.L1459
+	ldr	r2, .L1471
+	ldrh	r3, [r4, #2]
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bhi	.L1459
+	mov	r0, r5
+	movs	r2, #0
+	b	.L1460
+.L1462:
+	ldrh	lr, [r0], #2
+	cmp	lr, r1
+	beq	.L1470
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1460:
+	cmp	r2, r7
+	bne	.L1462
+	b	.L1461
+.L1470:
+	mov	r6, r2
+.L1461:
+	ldr	r0, .L1471+4
+	ldrh	r2, [r5, r2, lsl #1]
+	bl	printf
+	movw	r3, #65535
+	strh	r3, [r4, #40]	@ movhi
+.L1459:
+	ldrh	r7, [r5, r6, lsl #1]
+	lsls	r2, r6, #1
 	cmp	r7, #0
-	beq	.L1472
+	beq	.L1458
 	ldr	r3, [r4, #32]
 	cmp	r3, #0
-	bne	.L1472
-	movs	r2, #1
-	str	r2, [r4, #32]
-	strh	r3, [r5, r0, lsl #1]	@ movhi
+	bne	.L1458
+	movs	r1, #1
+	str	r1, [r4, #32]
+	strh	r3, [r5, r2]	@ movhi
 	ldrh	r3, [r4, #8]
 	ldrh	r2, [r4, #2]
 	subs	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
-	ldr	r3, .L1480
+	ldr	r3, .L1471
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1473
+	bcc	.L1463
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1473:
+.L1463:
 	movs	r5, #0
-	ldr	r6, .L1480+4
-	ldr	fp, .L1480+28
-	mov	r8, r7
-	b	.L1474
-.L1478:
+	ldr	r6, .L1471+8
+	ldr	sl, .L1471+40
+	b	.L1464
+.L1468:
 	lsls	r3, r5, #2
 	str	r3, [sp, #4]
-	ldr	r3, [sl, r5, lsl #2]
-	cmp	r8, r3, lsr #10
-	bne	.L1475
-	ldr	r2, [fp, #0]
+	ldr	r3, [fp, r5, lsl #2]
+	cmp	r7, r3, lsr #10
+	bne	.L1465
+	ldr	r2, [sl, #0]
 	movs	r1, #1
-	ldr	r0, .L1480+4
 	str	r3, [r6, #4]
+	ldr	r0, .L1471+8
 	str	r2, [r6, #8]
-	ldr	r2, .L1480+8
-	ldr	r7, [r2, #0]
+	ldr	r2, .L1471+12
+	ldr	r8, [r2, #0]
 	mov	r2, r1
-	str	r7, [r6, #12]
+	str	r8, [r6, #12]
 	bl	FlashReadPages
-	ldrh	r3, [r7, #8]
+	ldrh	r3, [r8, #8]
 	cmp	r3, r5
-	beq	.L1476
-	ldr	r1, .L1480+12
-	movw	r2, #585
-	ldr	r0, .L1480+16
+	beq	.L1466
+	ldr	r1, .L1471+16
+	movw	r2, #638
+	ldr	r0, .L1471+20
 	bl	printf
-	ldr	r0, .L1480+20
-	ldr	r1, .L1480+24
+	ldr	r0, .L1471+24
+	ldr	r1, .L1471+28
 	bl	printf
-.L1476:
-	ldr	r3, .L1480+4
+.L1466:
+	ldr	r3, .L1471+8
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	bne	.L1477
+	bne	.L1467
 	ldr	r2, [sp, #4]
 	movs	r3, #0
-	str	r3, [sl, r2]
-	b	.L1475
-.L1477:
+	ldr	r0, .L1471+32
+	str	r3, [fp, r2]
+	ldrh	r2, [r8, #8]
+	ldr	r1, [r6, #4]
+	bl	printf
+	ldr	r2, .L1471+36
+	movs	r3, #1
+	str	r3, [r2, #0]
+	b	.L1465
+.L1467:
 	mov	r0, r4
 	mov	r1, r5
 	ldr	r2, [r6, #8]
 	bl	FtlMapWritePage
-.L1475:
+.L1465:
 	adds	r5, r5, #1
 	uxth	r5, r5
-.L1474:
+.L1464:
 	ldrh	r3, [r4, #6]
 	cmp	r3, r5
-	bhi	.L1478
-	mov	r7, r8
-	mov	r0, r8
+	bhi	.L1468
+	mov	r0, r7
 	movs	r1, #1
 	bl	FtlFreeSysBlkQueueIn
 	movs	r3, #0
 	str	r3, [r4, #32]
-.L1472:
-	ldr	r3, .L1480
+.L1458:
+	ldr	r3, .L1471
 	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1479
+	bcc	.L1469
 	mov	r0, r4
 	bl	ftl_map_blk_alloc_new_blk
-.L1479:
+.L1469:
 	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1481:
+.L1472:
 	.align	2
-.L1480:
+.L1471:
 	.word	.LANCHOR69
-	.word	.LANCHOR197
-	.word	.LANCHOR180
-	.word	.LANCHOR210
+	.word	.LC30
+	.word	.LANCHOR198
+	.word	.LANCHOR184
+	.word	.LANCHOR212
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR176
+	.word	.LC31
+	.word	.LANCHOR94
+	.word	.LANCHOR180
 	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
 	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
 	.align	1
@@ -13214,24 +13129,28 @@ ftl_map_blk_gc:
 Ftl_write_map_blk_to_last_page:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	movw	r2, #65535
-	ldrh	r3, [r0, #0]
+	ldr	r3, .L1480
+	push	{r4, r5, r6, r7, r8, lr}
 	mov	r4, r0
+	ldr	r6, [r3, #0]
 	ldr	r5, [r0, #12]
+	ldr	r8, [r0, #24]
+	cmp	r6, #0
+	bne	.L1474
+	ldrh	r3, [r0, #0]
+	movw	r2, #65535
 	cmp	r3, r2
-	ldr	r7, [r0, #24]
-	bne	.L1483
+	bne	.L1475
 	ldrh	r3, [r0, #8]
-	cbz	r3, .L1484
-	ldr	r1, .L1489
-	movw	r2, #613
-	ldr	r0, .L1489+4
+	cbz	r3, .L1476
+	ldr	r1, .L1480+4
+	movw	r2, #670
+	ldr	r0, .L1480+8
 	bl	printf
-	ldr	r0, .L1489+8
-	ldr	r1, .L1489+12
+	ldr	r0, .L1480+12
+	ldr	r1, .L1480+16
 	bl	printf
-.L1484:
+.L1476:
 	ldrh	r3, [r4, #8]
 	adds	r3, r3, #1
 	strh	r3, [r4, #8]	@ movhi
@@ -13243,17 +13162,17 @@ Ftl_write_map_blk_to_last_page:
 	ldr	r3, [r4, #28]
 	adds	r3, r3, #1
 	str	r3, [r4, #28]
-	b	.L1485
-.L1483:
+	b	.L1474
+.L1475:
 	ldrh	r5, [r5, r3, lsl #1]
 	movs	r1, #255
-	ldr	r2, .L1489+16
+	ldr	r2, .L1480+20
 	ldrh	r3, [r0, #2]
-	ldr	r6, .L1489+20
+	ldr	r7, .L1480+24
 	orr	r3, r3, r5, lsl #10
 	str	r3, [r2, #4]
-	ldr	r3, .L1489+24
-	ldr	r0, [r6, #0]
+	ldr	r3, .L1480+28
+	ldr	r0, [r7, #0]
 	ldr	r3, [r3, #0]
 	str	r0, [r2, #8]
 	str	r3, [r2, #12]
@@ -13264,34 +13183,34 @@ Ftl_write_map_blk_to_last_page:
 	ldrh	r2, [r4, #4]
 	strh	r5, [r3, #2]	@ movhi
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1489+28
+	ldr	r3, .L1480+32
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #3
 	bl	memset
-	movs	r3, #0
 	ldrh	r0, [r4, #6]
-	mov	r2, r3
-	ldr	r1, [r6, #0]
-	b	.L1486
-.L1488:
-	ldr	r6, [r7], #4
-	cmp	r5, r6, lsr #10
-	bne	.L1487
-	adds	r2, r2, #1
-	uxth	r2, r2
-	str	r3, [r1, r2, lsl #3]
-	add	r6, r1, r2, lsl #3
-	ldr	lr, [r7, #-4]
-	str	lr, [r6, #4]
-.L1487:
+	ldr	r1, [r7, #0]
+	mov	r2, r8
+	mov	r3, r6
+	b	.L1477
+.L1479:
+	ldr	r7, [r2], #4
+	cmp	r5, r7, lsr #10
+	bne	.L1478
 	adds	r3, r3, #1
-.L1486:
-	uxth	r6, r3
-	cmp	r6, r0
-	bcc	.L1488
+	uxth	r3, r3
+	str	r6, [r1, r3, lsl #3]
+	add	r7, r1, r3, lsl #3
+	ldr	lr, [r2, #-4]
+	str	lr, [r7, #4]
+.L1478:
+	adds	r6, r6, #1
+.L1477:
+	uxth	r7, r6
+	cmp	r7, r0
+	bcc	.L1479
 	movs	r1, #1
 	movs	r3, #0
-	ldr	r0, .L1489+16
+	ldr	r0, .L1480+20
 	mov	r2, r1
 	bl	FlashProgPages
 	ldrh	r3, [r4, #2]
@@ -13299,19 +13218,20 @@ Ftl_write_map_blk_to_last_page:
 	adds	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
 	bl	ftl_map_blk_gc
-.L1485:
+.L1474:
 	movs	r0, #0
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1490:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1481:
 	.align	2
-.L1489:
-	.word	.LANCHOR211
+.L1480:
+	.word	.LANCHOR94
+	.word	.LANCHOR213
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR197
-	.word	.LANCHOR96
-	.word	.LANCHOR180
+	.word	.LANCHOR198
+	.word	.LANCHOR98
+	.word	.LANCHOR184
 	.word	.LANCHOR69
 	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
 	.section	.text.FtlMapWritePage,"ax",%progbits
@@ -13323,138 +13243,144 @@ Ftl_write_map_blk_to_last_page:
 FtlMapWritePage:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1496
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
-	ldr	r7, .L1507
-	movs	r6, #0
-	ldr	r8, .L1507+32
-	ldr	r5, .L1507+4
-	ldr	fp, .L1507+36
+	ldr	r6, [r3, #0]
 	stmia	sp, {r1, r2}
-.L1505:
-	ldr	r3, [r7, #0]
+	cmp	r6, #0
+	bne	.L1483
+	ldr	r8, .L1496+32
+	ldr	sl, .L1496+36
+	ldr	r5, .L1496+4
+	ldr	fp, .L1496+40
+.L1495:
+	ldr	r3, [r8, #0]
 	ldrh	r2, [r4, #2]
 	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	ldrh	r3, [r8, #0]
+	str	r3, [r8, #0]
+	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	cmp	r2, r3
-	bge	.L1493
+	bge	.L1485
 	ldrh	r3, [r4, #0]
 	movw	r1, #65535
 	cmp	r3, r1
-	bne	.L1494
-.L1493:
+	bne	.L1486
+.L1485:
 	mov	r0, r4
 	bl	Ftl_write_map_blk_to_last_page
-.L1494:
+.L1486:
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r4, #12]
 	ldrh	r3, [r3, r2, lsl #1]
-	cbnz	r3, .L1495
-	ldr	r1, .L1507+8
-	movw	r2, #671
-	ldr	r0, .L1507+12
+	cbnz	r3, .L1487
+	ldr	r1, .L1496+8
+	movw	r2, #731
+	ldr	r0, .L1496+12
 	bl	printf
-	ldr	r0, .L1507+16
-	ldr	r1, .L1507+20
+	ldr	r0, .L1496+16
+	ldr	r1, .L1496+20
 	bl	printf
-.L1495:
+.L1487:
 	ldrh	r2, [r4, #0]
 	ldrh	r3, [r4, #10]
 	cmp	r2, r3
-	bcc	.L1496
-	ldr	r1, .L1507+8
-	mov	r2, #672
-	ldr	r0, .L1507+12
+	bcc	.L1488
+	ldr	r1, .L1496+8
+	mov	r2, #732
+	ldr	r0, .L1496+12
 	bl	printf
-	ldr	r0, .L1507+16
-	ldr	r1, .L1507+20
+	ldr	r0, .L1496+16
+	ldr	r1, .L1496+20
 	bl	printf
-.L1496:
+.L1488:
 	ldrh	r2, [r4, #0]
 	movs	r1, #0
 	ldr	r3, [r4, #12]
 	ldr	r0, [fp, #0]
-	ldrh	sl, [r3, r2, lsl #1]
+	ldrh	r7, [r3, r2, lsl #1]
 	ldr	r2, [sp, #4]
 	ldrh	r3, [r4, #2]
 	str	r0, [r5, #12]
 	str	r2, [r5, #8]
 	movs	r2, #16
-	orr	r3, r3, sl, lsl #10
+	orr	r3, r3, r7, lsl #10
 	str	r3, [r5, #4]
 	bl	memset
 	ldr	r3, [r5, #12]
 	ldr	r2, [r4, #28]
 	ldr	r1, [sp, #0]
-	ldr	r0, .L1507+4
+	ldr	r0, .L1496+4
 	str	r2, [r3, #4]
 	ldrh	r2, [r4, #4]
 	strh	r1, [r3, #8]	@ movhi
 	movs	r1, #1
-	strh	sl, [r3, #2]	@ movhi
+	strh	r7, [r3, #2]	@ movhi
 	strh	r2, [r3, #0]	@ movhi
 	mov	r2, r1
 	mov	r3, r1
 	bl	FlashProgPages
-	ldrh	r3, [r4, #2]
-	ldr	r2, [r5, #0]
-	adds	r3, r3, #1
+	ldrh	r2, [r4, #2]
+	ldr	r3, [r5, #0]
 	adds	r2, r2, #1
-	uxth	r3, r3
-	strh	r3, [r4, #2]	@ movhi
-	bne	.L1497
-	ldr	r0, .L1507+24
+	adds	r1, r3, #1
+	uxth	r2, r2
+	strh	r2, [r4, #2]	@ movhi
+	bne	.L1489
+	ldr	r0, .L1496+24
 	adds	r6, r6, #1
 	ldr	r1, [r5, #4]
 	bl	printf
 	ldrh	r3, [r4, #2]
 	uxth	r6, r6
 	cmp	r3, #2
-	bhi	.L1498
-	ldrh	r3, [r8, #0]
+	bhi	.L1490
+	ldrh	r3, [sl, #0]
 	subs	r3, r3, #1
 	strh	r3, [r4, #2]	@ movhi
-.L1498:
+.L1490:
 	cmp	r6, #3
-	bls	.L1499
-	ldr	r3, .L1507+4
+	bls	.L1495
+	ldr	r3, .L1496+4
 	mov	r2, r6
-	ldr	r0, .L1507+28
+	ldr	r0, .L1496+28
 	ldr	r1, [r3, #4]
 	bl	printf
-.L1500:
-	b	.L1500
-.L1499:
-	ldr	r3, [r4, #32]
-	cmp	r3, #0
-	beq	.L1505
-.L1506:
-	b	.L1506
-.L1497:
-	cmp	r3, #1
-	beq	.L1505
-	ldr	r3, .L1507+4
-	movs	r0, #0
+	ldr	r3, .L1496
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L1483
+.L1489:
+	cbz	r3, .L1492
+	strh	r7, [r4, #40]	@ movhi
+.L1492:
+	cmp	r2, #1
+	beq	.L1495
+	cmp	r3, #256
+	beq	.L1495
+	ldr	r3, .L1496+4
 	ldr	r1, [sp, #0]
 	ldr	r2, [r3, #4]
 	ldr	r3, [r4, #24]
 	str	r2, [r3, r1, lsl #2]
+.L1483:
+	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1508:
+.L1497:
 	.align	2
-.L1507:
-	.word	.LANCHOR159
-	.word	.LANCHOR197
-	.word	.LANCHOR212
+.L1496:
+	.word	.LANCHOR94
+	.word	.LANCHOR198
+	.word	.LANCHOR214
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LC30
-	.word	.LC31
+	.word	.LC32
+	.word	.LC33
+	.word	.LANCHOR162
 	.word	.LANCHOR69
-	.word	.LANCHOR180
+	.word	.LANCHOR184
 	.size	FtlMapWritePage, .-FtlMapWritePage
 	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
 	.align	1
@@ -13471,27 +13397,31 @@ FtlMapBlkWriteDumpData:
 	ldrh	r6, [r0, #6]
 	ldr	r8, [r0, #24]
 	cmp	r3, #0
-	beq	.L1509
+	beq	.L1498
 	movs	r3, #0
 	str	r3, [r0, #36]
-	ldr	r3, .L1515
-	ldr	r5, .L1515+4
+	ldr	r3, .L1504
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1498
+	ldr	r3, .L1504+4
+	ldr	r5, .L1504+8
 	ldr	r3, [r3, #0]
 	str	r3, [r5, #8]
-	ldr	r3, .L1515+8
+	ldr	r3, .L1504+12
 	ldr	r7, [r3, #0]
 	ldrh	r3, [r0, #2]
 	str	r7, [r5, #12]
-	cbz	r3, .L1511
-	ldr	r2, .L1515+12
+	cbz	r3, .L1500
+	ldr	r2, .L1504+16
 	ldrh	r2, [r2, #0]
 	subs	r2, r2, #1
 	cmp	r3, r2
-	bge	.L1511
+	bge	.L1500
 	ldrh	r2, [r0, #0]
 	movw	r1, #65535
 	cmp	r2, r1
-	beq	.L1511
+	beq	.L1500
 	ldr	r1, [r0, #12]
 	subs	r3, r3, #1
 	mov	r0, r5
@@ -13503,85 +13433,370 @@ FtlMapBlkWriteDumpData:
 	bl	FlashReadPages
 	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1511
+	beq	.L1500
 	ldr	r3, [r4, #24]
 	ldrh	r1, [r7, #8]
 	ldr	r2, [r3, r1, lsl #2]
 	ldr	r3, [r5, #4]
 	cmp	r2, r3
-	bne	.L1511
+	bne	.L1500
 	mov	r0, r4
-	b	.L1514
-.L1511:
+	b	.L1503
+.L1500:
 	subs	r6, r6, #1
-	ldr	r5, .L1515+4
+	ldr	r5, .L1504+8
 	uxth	r6, r6
 	ldr	r3, [r8, r6, lsl #2]
 	str	r3, [r5, #4]
-	cbz	r3, .L1512
+	cbz	r3, .L1501
 	movs	r1, #1
 	mov	r0, r5
 	mov	r2, r1
 	bl	FlashReadPages
-	b	.L1513
-.L1512:
-	ldr	r3, .L1515+16
+	b	.L1502
+.L1501:
+	ldr	r3, .L1504+20
 	movs	r1, #255
 	ldr	r0, [r5, #8]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1513:
+.L1502:
 	mov	r0, r4
 	mov	r1, r6
-.L1514:
+.L1503:
 	ldr	r2, [r5, #8]
 	pop	{r4, r5, r6, r7, r8, lr}
 	b	FtlMapWritePage
-.L1509:
+.L1498:
 	pop	{r4, r5, r6, r7, r8, pc}
-.L1516:
+.L1505:
 	.align	2
-.L1515:
-	.word	.LANCHOR176
-	.word	.LANCHOR197
+.L1504:
+	.word	.LANCHOR94
 	.word	.LANCHOR180
+	.word	.LANCHOR198
+	.word	.LANCHOR184
 	.word	.LANCHOR69
 	.word	.LANCHOR73
 	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
-	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.section	.text.FtlVendorPartRead,"ax",%progbits
 	.align	1
-	.global	FtlVendorPartWrite
+	.global	FtlVendorPartRead
 	.thumb
 	.thumb_func
-	.type	FtlVendorPartWrite, %function
-FtlVendorPartWrite:
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
 	@ args = 0, pretend = 0, frame = 56
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1527
+	ldr	r3, .L1517
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
-	sub	sp, sp, #56
-	ldrh	sl, [r3, #0]
-	mov	r6, r0
-	ldr	r3, .L1527+4
-	mov	r4, r1
-	str	r2, [sp, #8]
+	mov	fp, r2
+	ldrh	r6, [r3, #0]
 	adds	r2, r1, r0
+	ldr	r3, .L1517+4
+	sub	sp, sp, #56
+	mov	r7, r0
+	mov	r5, r1
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bhi	.L1525
-	lsr	sl, r0, sl
-	mov	fp, #0
-	ldr	r7, .L1527+8
-	lsl	r3, sl, #2
+	bhi	.L1515
+	lsr	r6, r0, r6
+	ldr	r8, .L1517+28
+	lsls	r3, r6, #2
+	str	r3, [sp, #8]
+	movs	r3, #0
 	str	r3, [sp, #4]
-	b	.L1519
-.L1524:
-	ldr	r2, .L1527+12
-	mov	r0, r6
+	b	.L1508
+.L1514:
+	ldr	r2, .L1517+8
+	mov	r0, r7
 	ldr	r3, [r2, #0]
-	ldr	r2, [sp, #4]
-	ldr	r3, [r3, r2]
-	ldr	r2, .L1527+16
+	ldr	r2, [sp, #8]
+	ldr	sl, [r3, r2]
+	ldr	r3, .L1517+12
+	ldrh	r4, [r3, #0]
+	mov	r1, r4
+	bl	__aeabi_uidivmod
+	uxth	r1, r1
+	str	r1, [sp, #12]
+	subs	r4, r4, r1
+	uxth	r4, r4
+	cmp	r4, r5
+	it	hi
+	uxthhi	r4, r5
+	cmp	sl, #0
+	beq	.L1510
+	ldr	r3, [r8, #0]
+	movs	r1, #1
+	mov	r2, r1
+	add	r0, sp, #20
+	str	sl, [sp, #24]
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
+	bl	FlashReadPages
+	ldr	r3, [sp, #20]
+	ldr	r2, [sp, #4]
+	cmp	r3, #-1
+	it	eq
+	moveq	r2, #-1
+	str	r2, [sp, #4]
+	ldr	r2, .L1517+16
+	ldr	r3, [r2, #0]
+	cmp	r3, #256
+	bne	.L1512
+	mov	r1, r6
+	mov	r2, sl
+	ldr	r0, .L1517+20
+	bl	printf
+	ldr	r0, .L1517+24
+	mov	r1, r6
+	ldr	r2, [r8, #0]
+	bl	FtlMapWritePage
+.L1512:
+	ldr	r3, [sp, #12]
+	mov	r0, fp
+	ldr	r1, [r8, #0]
+	lsls	r2, r4, #9
+	add	r1, r1, r3, lsl #9
+	bl	memcpy
+	b	.L1513
+.L1510:
+	mov	r0, fp
+	mov	r1, sl
+	lsls	r2, r4, #9
+	bl	memset
+.L1513:
+	ldr	r3, [sp, #8]
+	adds	r6, r6, #1
+	subs	r5, r5, r4
+	adds	r7, r7, r4
+	add	fp, fp, r4, lsl #9
+	adds	r3, r3, #4
+	str	r3, [sp, #8]
+.L1508:
+	cmp	r5, #0
+	bne	.L1514
+	b	.L1507
+.L1515:
+	mov	r3, #-1
+	str	r3, [sp, #4]
+.L1507:
+	ldr	r0, [sp, #4]
+	add	sp, sp, #56
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1518:
+	.align	2
+.L1517:
+	.word	.LANCHOR72
+	.word	.LANCHOR65
+	.word	.LANCHOR190
+	.word	.LANCHOR71
+	.word	.LANCHOR198
+	.word	.LC34
+	.word	.LANCHOR215
+	.word	.LANCHOR181
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.thumb
+	.thumb_func
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #0
+	ldr	r4, .L1523
+	movs	r1, #1
+	ldr	r5, .L1523+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	cmp	r3, r5
+	beq	.L1520
+	mov	r0, r4
+	movs	r1, #0
+	mov	r2, #512
+	bl	memset
+	str	r5, [r4, #0]
+.L1520:
+	ldr	r2, [r4, #0]
+	ldr	r3, .L1523
+	cmp	r2, r5
+	bne	.L1521
+	ldr	r1, [r3, #88]
+	ldr	r2, .L1523+8
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #92]
+	ldr	r2, .L1523+12
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #8]
+	ldr	r2, .L1523+16
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #12]
+	ldr	r2, .L1523+20
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #16]
+	ldr	r2, .L1523+24
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #20]
+	ldr	r2, .L1523+28
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #28]
+	ldr	r2, .L1523+32
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #32]
+	ldr	r2, .L1523+36
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #36]
+	ldr	r2, .L1523+40
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #40]
+	ldr	r2, .L1523+44
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #44]
+	ldr	r2, .L1523+48
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #48]
+	ldr	r2, .L1523+52
+	str	r1, [r2, #0]
+	ldr	r2, [r3, #60]
+	ldr	r3, .L1523+56
+	str	r2, [r3, #0]
+.L1521:
+	ldr	r3, .L1523+60
+	movs	r2, #0
+	str	r2, [r3, #0]
+	ldr	r3, .L1523
+	ldr	r2, [r3, #68]
+	ldr	r3, .L1523+64
+	cmp	r2, r3
+	bne	.L1522
+	ldr	r3, .L1523+68
+	movs	r2, #1
+	ldr	r0, .L1523+72
+	ldr	r1, .L1523+76
+	str	r2, [r3, #0]
+	bl	printf
+.L1522:
+	ldr	r3, .L1523+80
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1523+84
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1523+32
+	ldr	r3, [r3, #0]
+	mla	r0, r0, r2, r3
+	ldr	r3, .L1523+88
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1523+92
+	str	r0, [r3, #0]
+	pop	{r3, r4, r5, pc}
+.L1524:
+	.align	2
+.L1523:
+	.word	.LANCHOR144
+	.word	1179929683
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR163
+	.word	.LANCHOR162
+	.word	.LANCHOR165
+	.word	.LANCHOR97
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR155
+	.word	.LANCHOR154
+	.word	305432421
+	.word	.LANCHOR128
+	.word	.LC10
+	.word	.LC35
+	.word	.LANCHOR63
+	.word	.LANCHOR164
+	.word	.LANCHOR55
+	.word	.LANCHOR211
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
+	.align	1
+	.global	FtlLoadEctTbl
+	.thumb
+	.thumb_func
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L1527
+	ldr	r5, .L1527+4
+	ldr	r2, [r4, #0]
+	ldrh	r1, [r5, #0]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L1527+8
+	cmp	r2, r3
+	beq	.L1526
+	ldr	r1, .L1527+12
+	ldr	r0, .L1527+16
+	bl	printf
+	ldrh	r2, [r5, #0]
+	ldr	r0, [r4, #0]
+	movs	r1, #0
+	lsls	r2, r2, #9
+	bl	memset
+.L1526:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1528:
+	.align	2
+.L1527:
+	.word	.LANCHOR187
+	.word	.LANCHOR186
+	.word	1112818501
+	.word	.LC36
+	.word	.LC10
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.thumb
+	.thumb_func
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1539
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #56
+	ldrh	sl, [r3, #0]
+	mov	r6, r0
+	ldr	r3, .L1539+4
+	mov	r4, r1
+	str	r2, [sp, #8]
+	adds	r2, r1, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bhi	.L1537
+	lsr	sl, r0, sl
+	mov	fp, #0
+	ldr	r7, .L1539+8
+	lsl	r3, sl, #2
+	str	r3, [sp, #4]
+	b	.L1531
+.L1536:
+	ldr	r2, .L1539+12
+	mov	r0, r6
+	ldr	r3, [r2, #0]
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L1539+16
 	ldrh	r8, [r2, #0]
 	str	r3, [sp, #0]
 	mov	r1, r8
@@ -13594,9 +13809,9 @@ FtlVendorPartWrite:
 	cmp	r5, r4
 	it	hi
 	uxthhi	r5, r4
-	cbz	r3, .L1521
+	cbz	r3, .L1533
 	cmp	r5, r8
-	beq	.L1521
+	beq	.L1533
 	str	r3, [sp, #24]
 	movs	r1, #1
 	ldr	r3, [r7, #0]
@@ -13606,14 +13821,14 @@ FtlVendorPartWrite:
 	movs	r3, #0
 	str	r3, [sp, #32]
 	bl	FlashReadPages
-	b	.L1522
-.L1521:
-	ldr	r3, .L1527+20
+	b	.L1534
+.L1533:
+	ldr	r3, .L1539+20
 	movs	r1, #0
 	ldr	r0, [r7, #0]
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1522:
+.L1534:
 	ldr	r3, [sp, #12]
 	lsl	r8, r5, #9
 	ldr	r0, [r7, #0]
@@ -13624,7 +13839,7 @@ FtlVendorPartWrite:
 	adds	r6, r6, r5
 	bl	memcpy
 	mov	r1, sl
-	ldr	r0, .L1527+24
+	ldr	r0, .L1539+24
 	add	sl, sl, #1
 	ldr	r2, [r7, #0]
 	bl	FtlMapWritePage
@@ -13637,26 +13852,26 @@ FtlVendorPartWrite:
 	cmp	r0, #-1
 	it	eq
 	moveq	fp, #-1
-.L1519:
+.L1531:
 	cmp	r4, #0
-	bne	.L1524
-	b	.L1518
-.L1525:
+	bne	.L1536
+	b	.L1530
+.L1537:
 	mov	fp, #-1
-.L1518:
+.L1530:
 	mov	r0, fp
 	add	sp, sp, #56
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1528:
+.L1540:
 	.align	2
-.L1527:
+.L1539:
 	.word	.LANCHOR72
 	.word	.LANCHOR65
-	.word	.LANCHOR177
-	.word	.LANCHOR186
+	.word	.LANCHOR181
+	.word	.LANCHOR190
 	.word	.LANCHOR71
 	.word	.LANCHOR73
-	.word	.LANCHOR213
+	.word	.LANCHOR215
 	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
 	.section	.text.Ftl_save_ext_data,"ax",%progbits
 	.align	1
@@ -13668,80 +13883,80 @@ Ftl_save_ext_data:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	@ link register save eliminated.
-	ldr	r2, .L1531
-	ldr	r3, .L1531+4
+	ldr	r2, .L1543
+	ldr	r3, .L1543+4
 	ldr	r1, [r2, #0]
 	cmp	r1, r3
-	bne	.L1529
-	ldr	r3, .L1531+8
+	bne	.L1541
+	ldr	r3, .L1543+8
 	movs	r0, #0
 	movs	r1, #1
 	str	r3, [r2, #4]
-	ldr	r3, .L1531+12
+	ldr	r3, .L1543+12
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #88]
-	ldr	r3, .L1531+16
+	ldr	r3, .L1543+16
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #92]
-	ldr	r3, .L1531+20
+	ldr	r3, .L1543+20
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #8]
-	ldr	r3, .L1531+24
+	ldr	r3, .L1543+24
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #12]
-	ldr	r3, .L1531+28
+	ldr	r3, .L1543+28
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #16]
-	ldr	r3, .L1531+32
+	ldr	r3, .L1543+32
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #20]
-	ldr	r3, .L1531+36
+	ldr	r3, .L1543+36
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #28]
-	ldr	r3, .L1531+40
+	ldr	r3, .L1543+40
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #32]
-	ldr	r3, .L1531+44
+	ldr	r3, .L1543+44
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #36]
-	ldr	r3, .L1531+48
+	ldr	r3, .L1543+48
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #40]
-	ldr	r3, .L1531+52
+	ldr	r3, .L1543+52
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #44]
-	ldr	r3, .L1531+56
+	ldr	r3, .L1543+56
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #48]
-	ldr	r3, .L1531+60
+	ldr	r3, .L1543+60
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #60]
-	ldr	r3, .L1531+64
+	ldr	r3, .L1543+64
 	ldr	r3, [r3, #0]
 	str	r3, [r2, #64]
 	b	FtlVendorPartWrite
-.L1529:
+.L1541:
 	bx	lr
-.L1532:
+.L1544:
 	.align	2
-.L1531:
-	.word	.LANCHOR141
+.L1543:
+	.word	.LANCHOR144
 	.word	1179929683
-	.word	1342177344
-	.word	.LANCHOR193
-	.word	.LANCHOR194
-	.word	.LANCHOR155
-	.word	.LANCHOR156
-	.word	.LANCHOR160
+	.word	1342177351
+	.word	.LANCHOR216
+	.word	.LANCHOR217
+	.word	.LANCHOR158
 	.word	.LANCHOR159
+	.word	.LANCHOR163
 	.word	.LANCHOR162
-	.word	.LANCHOR95
-	.word	.LANCHOR157
-	.word	.LANCHOR158
-	.word	.LANCHOR163
-	.word	.LANCHOR164
-	.word	.LANCHOR152
-	.word	.LANCHOR151
+	.word	.LANCHOR165
+	.word	.LANCHOR97
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR166
+	.word	.LANCHOR167
+	.word	.LANCHOR155
+	.word	.LANCHOR154
 	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
 	.section	.text.FtlEctTblFlush,"ax",%progbits
 	.align	1
@@ -13753,43 +13968,43 @@ FtlEctTblFlush:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, lr}
-	ldr	r3, .L1540
+	ldr	r3, .L1552
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1538
-	ldr	r3, .L1540+4
+	cbz	r3, .L1550
+	ldr	r3, .L1552+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
 	ite	ls
 	movls	r3, #4
 	movhi	r3, #32
-	b	.L1534
-.L1538:
+	b	.L1546
+.L1550:
 	movs	r3, #32
-.L1534:
-	ldr	r2, .L1540+8
+.L1546:
+	ldr	r2, .L1552+8
 	ldrh	r1, [r2, #0]
 	cmp	r1, #31
-	bhi	.L1535
+	bhi	.L1547
 	movs	r3, #1
 	adds	r1, r1, #1
 	strh	r1, [r2, #0]	@ movhi
-.L1535:
-	ldr	r2, .L1540+12
-	cbnz	r0, .L1536
+.L1547:
+	ldr	r2, .L1552+12
+	cbnz	r0, .L1548
 	ldr	r1, [r2, #0]
 	ldr	r0, [r1, #20]
 	ldr	r1, [r1, #16]
 	adds	r3, r3, r0
 	cmp	r1, r3
-	bcc	.L1537
-.L1536:
+	bcc	.L1549
+.L1548:
 	ldr	r2, [r2, #0]
 	movs	r0, #64
 	ldr	r3, [r2, #16]
 	str	r3, [r2, #20]
-	ldr	r3, .L1540+16
+	ldr	r3, .L1552+16
 	str	r3, [r2, #0]
-	ldr	r3, .L1540+20
+	ldr	r3, .L1552+20
 	ldrh	r1, [r3, #0]
 	lsls	r3, r1, #9
 	str	r3, [r2, #12]
@@ -13800,18 +14015,18 @@ FtlEctTblFlush:
 	str	r3, [r2, #4]
 	bl	FtlVendorPartWrite
 	bl	Ftl_save_ext_data
-.L1537:
+.L1549:
 	movs	r0, #0
 	pop	{r3, pc}
-.L1541:
+.L1553:
 	.align	2
-.L1540:
-	.word	.LANCHOR126
-	.word	.LANCHOR164
-	.word	.LANCHOR214
-	.word	.LANCHOR183
+.L1552:
+	.word	.LANCHOR128
+	.word	.LANCHOR167
+	.word	.LANCHOR218
+	.word	.LANCHOR187
 	.word	1112818501
-	.word	.LANCHOR182
+	.word	.LANCHOR186
 	.size	FtlEctTblFlush, .-FtlEctTblFlush
 	.section	.text.flush_l2p_region,"ax",%progbits
 	.align	1
@@ -13825,8 +14040,8 @@ flush_l2p_region:
 	push	{r3, r4, r5, lr}
 	movs	r4, #12
 	muls	r4, r0, r4
-	ldr	r5, .L1543
-	ldr	r0, .L1543+4
+	ldr	r5, .L1555
+	ldr	r0, .L1555+4
 	ldr	r2, [r5, #0]
 	adds	r3, r2, r4
 	ldrh	r1, [r2, r4]
@@ -13839,225 +14054,12 @@ flush_l2p_region:
 	bic	r3, r3, #-2147483648
 	str	r3, [r4, #4]
 	pop	{r3, r4, r5, pc}
-.L1544:
-	.align	2
-.L1543:
-	.word	.LANCHOR112
-	.word	.LANCHOR120
-	.size	flush_l2p_region, .-flush_l2p_region
-	.section	.text.log2phys,"ax",%progbits
-	.align	1
-	.global	log2phys
-	.thumb
-	.thumb_func
-	.type	log2phys, %function
-log2phys:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1555
-	push	{r4, r5, r6, r7, r8, lr}
-	movs	r5, #1
-	ldrh	r3, [r3, #0]
-	mov	r6, r1
-	mov	r7, r2
-	adds	r3, r3, #7
-	lsr	r4, r0, r3
-	lsl	r5, r5, r3
-	ldr	r3, .L1555+4
-	subs	r5, r5, #1
-	ands	r5, r5, r0
-	uxth	r4, r4
-	ldr	r3, [r3, #0]
-	uxth	r5, r5
-	cmp	r0, r3
-	bcc	.L1546
-	ldr	r1, .L1555+8
-	movw	r2, #781
-	ldr	r0, .L1555+12
-	bl	printf
-	ldr	r0, .L1555+16
-	ldr	r1, .L1555+20
-	bl	printf
-.L1546:
-	ldr	r3, .L1555+24
-	ldrh	r1, [r3, #0]
-	ldr	r3, .L1555+28
-	ldr	r2, [r3, #0]
-	movs	r3, #0
-	mov	r8, r3
-	b	.L1547
-.L1553:
-	adds	r3, r3, #12
-	adds	r0, r2, r3
-	ldrh	r0, [r0, #-12]
-	cmp	r0, r4
-	bne	.L1548
-.L1549:
-	ldr	r2, .L1555+28
-	movs	r3, #12
-	ldr	r2, [r2, #0]
-	mla	r3, r3, r8, r2
-	cbnz	r7, .L1550
-	ldr	r3, [r3, #8]
-	ldr	r3, [r3, r5, lsl #2]
-	str	r3, [r6, #0]
-	b	.L1551
-.L1550:
-	ldr	r1, [r6, #0]
-	ldr	r2, [r3, #8]
-	str	r1, [r2, r5, lsl #2]
-	ldr	r2, [r3, #4]
-	orr	r2, r2, #-2147483648
-	str	r2, [r3, #4]
-	ldr	r3, .L1555+32
-	strh	r4, [r3, #0]	@ movhi
-.L1551:
-	ldr	r3, .L1555+28
-	movs	r2, #12
-	ldr	r3, [r3, #0]
-	mla	r3, r2, r8, r3
-	ldr	r2, [r3, #4]
-	adds	r1, r2, #1
-	beq	.L1552
-	adds	r2, r2, #1
-	str	r2, [r3, #4]
-.L1552:
-	movs	r0, #0
-	pop	{r4, r5, r6, r7, r8, pc}
-.L1548:
-	add	r8, r8, #1
-	uxth	r8, r8
-.L1547:
-	cmp	r8, r1
-	bne	.L1553
-	bl	select_l2p_ram_region
-	movs	r3, #12
-	ldr	r2, .L1555+28
-	ldr	r2, [r2, #0]
-	mul	r3, r3, r0
-	mov	r8, r0
-	adds	r1, r2, r3
-	ldrh	r2, [r2, r3]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1554
-	ldr	r3, [r1, #4]
-	cmp	r3, #0
-	bge	.L1554
-	bl	flush_l2p_region
-.L1554:
-	mov	r0, r4
-	mov	r1, r8
-	bl	load_l2p_region
-	b	.L1549
 .L1556:
 	.align	2
 .L1555:
-	.word	.LANCHOR72
-	.word	.LANCHOR87
-	.word	.LANCHOR215
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR83
-	.word	.LANCHOR112
-	.word	.LANCHOR113
-	.size	log2phys, .-log2phys
-	.section	.text.FtlReUsePrevPpa,"ax",%progbits
-	.align	1
-	.global	FtlReUsePrevPpa
-	.thumb
-	.thumb_func
-	.type	FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
-	@ args = 0, pretend = 0, frame = 8
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r4, r5, r6, r7, lr}
-	mov	r6, r0
-	ubfx	r0, r1, #10, #16
-	str	r1, [sp, #4]
-	bl	P2V_block_in_plane
-	ldr	r3, .L1564
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r0, lsl #1]
-	mov	r4, r0
-	cmp	r2, #0
-	bne	.L1558
-	ldr	r3, .L1564+4
-	ldr	r3, [r3, #0]
-	cmp	r3, #0
-	beq	.L1559
-	ldr	r1, .L1564+8
-	movs	r5, #6
-	ldr	r0, .L1564+12
-	ldrh	r7, [r1, #0]
-	ldr	r1, .L1564+16
-	ldr	r1, [r1, #0]
-	subs	r3, r3, r1
-	asrs	r3, r3, #1
-	muls	r3, r0, r3
-	movw	r0, #65535
-	uxth	r3, r3
-	b	.L1560
-.L1563:
-	cmp	r3, r4
-	bne	.L1561
-	ldr	r5, .L1564+8
-	mov	r1, r4
-	ldr	r0, .L1564+4
-	bl	List_remove_node
-	ldrh	r3, [r5, #0]
-	cbnz	r3, .L1562
-	ldr	r1, .L1564+20
-	movw	r2, #1677
-	ldr	r0, .L1564+24
-	bl	printf
-	ldr	r0, .L1564+28
-	ldr	r1, .L1564+32
-	bl	printf
-.L1562:
-	ldrh	r3, [r5, #0]
-	mov	r0, r4
-	subs	r3, r3, #1
-	strh	r3, [r5, #0]	@ movhi
-	bl	INSERT_DATA_LIST
-	ldr	r3, .L1564
-	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	b	.L1558
-.L1561:
-	muls	r3, r5, r3
-	ldrh	r3, [r1, r3]
-	cmp	r3, r0
-	beq	.L1559
-	adds	r2, r2, #1
-	uxth	r2, r2
-.L1560:
-	cmp	r2, r7
-	bne	.L1563
-	b	.L1559
-.L1558:
-	adds	r2, r2, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-.L1559:
-	mov	r0, r6
-	add	r1, sp, #4
-	movs	r2, #1
-	bl	log2phys
-	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
-.L1565:
-	.align	2
-.L1564:
-	.word	.LANCHOR99
-	.word	.LANCHOR103
-	.word	.LANCHOR104
-	.word	-1431655765
-	.word	.LANCHOR97
-	.word	.LANCHOR216
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.word	.LANCHOR114
+	.word	.LANCHOR122
+	.size	flush_l2p_region, .-flush_l2p_region
 	.section	.text.l2p_flush,"ax",%progbits
 	.align	1
 	.global	l2p_flush
@@ -14069,32 +14071,32 @@ l2p_flush:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	movs	r4, #0
-	ldr	r7, .L1570
+	ldr	r7, .L1561
 	movs	r5, #12
-	ldr	r6, .L1570+4
-	b	.L1567
-.L1569:
+	ldr	r6, .L1561+4
+	b	.L1558
+.L1560:
 	ldr	r3, [r6, #0]
 	mla	r3, r5, r4, r3
 	ldr	r3, [r3, #4]
 	cmp	r3, #0
-	bge	.L1568
+	bge	.L1559
 	mov	r0, r4
 	bl	flush_l2p_region
-.L1568:
+.L1559:
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L1567:
+.L1558:
 	ldrh	r3, [r7, #0]
 	cmp	r3, r4
-	bhi	.L1569
+	bhi	.L1560
 	movs	r0, #0
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1571:
+.L1562:
 	.align	2
-.L1570:
+.L1561:
 	.word	.LANCHOR83
-	.word	.LANCHOR112
+	.word	.LANCHOR114
 	.size	l2p_flush, .-l2p_flush
 	.section	.text.allocate_new_data_superblock,"ax",%progbits
 	.align	1
@@ -14105,1120 +14107,1606 @@ l2p_flush:
 allocate_new_data_superblock:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1584
+	ldr	r3, .L1576
 	push	{r4, r5, r6, lr}
 	mov	r4, r0
 	ldrh	r5, [r0, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r3, r5
-	bhi	.L1573
-	ldr	r1, .L1584+4
-	movw	r2, #2707
-	ldr	r0, .L1584+8
+	bcs	.L1564
+	ldr	r1, .L1576+4
+	movw	r2, #2936
+	ldr	r0, .L1576+8
 	bl	printf
-	ldr	r0, .L1584+12
-	ldr	r1, .L1584+16
+	ldr	r0, .L1576+12
+	ldr	r1, .L1576+16
 	bl	printf
-.L1573:
+.L1564:
+	ldr	r3, .L1576+20
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1565
 	movw	r3, #65535
 	cmp	r5, r3
-	beq	.L1574
-	ldr	r3, .L1584+20
+	beq	.L1566
+	ldr	r3, .L1576+24
 	mov	r0, r5
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r5, lsl #1]
-	cbz	r3, .L1575
+	cbz	r3, .L1567
 	bl	INSERT_DATA_LIST
-	b	.L1574
-.L1575:
+	b	.L1566
+.L1567:
 	bl	INSERT_FREE_LIST
-.L1574:
+.L1566:
 	movs	r3, #0
 	strb	r3, [r4, #8]
-	ldr	r3, .L1584+24
+	ldr	r3, .L1576+28
 	cmp	r4, r3
-	beq	.L1576
-	ldr	r3, .L1584+28
+	beq	.L1568
+	ldr	r3, .L1576+32
 	ldrh	r3, [r3, #0]
 	cmp	r3, #1
-	beq	.L1576
-	ldr	r2, .L1584+32
+	beq	.L1568
+	ldr	r2, .L1576+36
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1577
-.L1576:
+	cbz	r2, .L1569
+.L1568:
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	b	.L1578
-.L1577:
-	ldr	r2, .L1584+36
+	b	.L1570
+.L1569:
+	ldr	r2, .L1576+40
 	cmp	r4, r2
-	bne	.L1578
+	bne	.L1570
 	cmp	r3, #3
-	beq	.L1579
-	ldr	r3, .L1584+40
+	beq	.L1571
+	ldr	r3, .L1576+44
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L1580
-.L1579:
+	bne	.L1572
+.L1571:
 	movs	r3, #1
 	strb	r3, [r2, #8]
-.L1580:
-	ldr	r3, .L1584+44
+.L1572:
+	ldr	r3, .L1576+48
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1578
-	ldr	r3, .L1584+48
+	cbz	r3, .L1570
+	ldr	r3, .L1576+52
 	ldr	r3, [r3, #0]
 	cmp	r3, #29
-	bhi	.L1578
-	ldr	r3, .L1584+36
+	bhi	.L1570
+	ldr	r3, .L1576+40
 	movs	r2, #1
 	strb	r2, [r3, #8]
-.L1578:
-	ldr	r6, .L1584+52
+.L1570:
+	ldr	r6, .L1576+56
 	movw	r3, #65535
 	ldrh	r0, [r6, #0]
 	cmp	r0, r3
-	beq	.L1581
+	beq	.L1573
 	cmp	r5, r0
-	bne	.L1582
-	ldr	r3, .L1584+20
+	bne	.L1574
+	ldr	r3, .L1576+24
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1583
-.L1582:
+	cbz	r3, .L1575
+.L1574:
 	bl	update_vpc_list
-.L1583:
+.L1575:
 	movw	r3, #65535
 	strh	r3, [r6, #0]	@ movhi
-.L1581:
+.L1573:
 	mov	r0, r4
 	bl	allocate_data_superblock
 	bl	l2p_flush
 	movs	r0, #0
 	bl	FtlEctTblFlush
 	bl	FtlVpcTblFlush
+.L1565:
 	movs	r0, #0
 	pop	{r4, r5, r6, pc}
-.L1585:
+.L1577:
 	.align	2
-.L1584:
+.L1576:
 	.word	.LANCHOR55
-	.word	.LANCHOR217
+	.word	.LANCHOR219
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR99
-	.word	.LANCHOR108
-	.word	.LANCHOR59
+	.word	.LANCHOR94
+	.word	.LANCHOR101
+	.word	.LANCHOR110
+	.word	.LANCHOR59
 	.word	.LANCHOR7
-	.word	.LANCHOR107
-	.word	.LANCHOR152
-	.word	.LANCHOR126
-	.word	.LANCHOR164
-	.word	.LANCHOR135
+	.word	.LANCHOR109
+	.word	.LANCHOR155
+	.word	.LANCHOR128
+	.word	.LANCHOR167
+	.word	.LANCHOR138
 	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
-	.section	.text.FtlProgPages,"ax",%progbits
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
 	.align	1
-	.global	FtlProgPages
+	.global	FtlMapTblRecovery
 	.thumb
 	.thumb_func
-	.type	FtlProgPages, %function
-FtlProgPages:
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r3
-	ldr	r3, .L1602
-	mov	r5, r0
-	str	r1, [sp, #4]
-	ldrb	r7, [r3, #0]	@ zero_extendqisi2
-	cbz	r7, .L1587
-	ldrb	r7, [r4, #8]	@ zero_extendqisi2
-	sub	r2, r7, #1
-	rsbs	r7, r2, #0
-	adc	r7, r7, r2
-.L1587:
-	mov	r0, r5
-	ldr	r1, [sp, #4]
-	mov	r2, r7
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	mov	sl, #0
-	ldr	r6, .L1602+4
-	ldr	fp, .L1602+36
-	b	.L1588
-.L1591:
-	ldr	r0, [r5, #4]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	ldrh	r3, [r4, #0]
-	cmp	r3, r0
-	bne	.L1589
-	ldr	r2, [r6, #0]
-	ldrh	r1, [r4, #4]
-	ldrh	r0, [r2, r3, lsl #1]
-	subs	r1, r0, r1
-	strh	r1, [r2, r3, lsl #1]	@ movhi
-	ldr	r2, .L1602+8
-	strb	r8, [r4, #6]
-	strh	r8, [r4, #4]	@ movhi
-	ldrh	r3, [r2, #0]
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	sub	sp, sp, #24
+	ldr	fp, [r0, #24]
+	ldr	r3, [r4, #16]
+	movs	r1, #0
+	ldrh	sl, [r4, #6]
+	ldr	r0, [r0, #12]
+	str	r3, [sp, #20]
+	ldrh	r3, [r4, #8]
+	lsl	r2, sl, #2
+	str	r0, [sp, #12]
+	mov	r0, fp
+	ldr	r6, .L1615
+	str	r3, [sp, #16]
+	bl	memset
+	ldr	r1, .L1615+4
+	movs	r2, #0
+	mov	r8, r2
+	str	r2, [r4, #32]
+	str	r2, [r4, #28]
+	ldr	r3, [r1, #0]
+	str	r3, [r6, #8]
+	ldr	r3, .L1615+8
+	ldr	r5, [r3, #0]
+	movw	r3, #65535
+	str	r5, [r6, #12]
+	strh	r3, [r4, #0]	@ movhi
 	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #1
+	str	r3, [r4, #36]
+	ldr	r3, [sp, #12]
+	mov	r7, r3
+	mov	r3, fp
+	mov	fp, sl
+	mov	sl, r4
+	b	.L1579
+.L1593:
+	ldr	r0, [sp, #16]
+	subs	r2, r0, #1
+	cmp	r8, r2
+	bne	.L1580
+	sxth	r6, r1
+	mov	r7, r1
+	ldr	r1, [sp, #12]
+	mov	r4, sl
+	mov	sl, fp
+	mov	fp, r3
+	add	r8, r1, r6, lsl #1
+	ldrh	r0, [r1, r6, lsl #1]
+	movs	r1, #1
+	bl	FtlGetLastWrittenPage
+	strh	r7, [r4, #0]	@ movhi
+	ldr	r7, .L1615
+	uxth	r3, r0
+	ldr	r0, [sp, #20]
+	adds	r2, r3, #1
+	strh	r2, [r4, #2]	@ movhi
+	sxth	r3, r3
+	ldr	r2, [r0, r6, lsl #2]
+	movs	r6, #0
+	str	r2, [r4, #28]
+	b	.L1581
+.L1584:
+	ldrh	r2, [r8, #0]
+	movs	r1, #1
+	ldr	r0, .L1615
+	orr	r2, r6, r2, lsl #10
+	str	r2, [r7, #4]
+	mov	r2, r1
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, [r7, #0]
+	ldr	r3, [sp, #8]
+	adds	r2, r2, #1
+	beq	.L1582
+	ldrh	r2, [r5, #8]
+	cmp	r2, sl
+	bcs	.L1583
+	ldrh	r0, [r5, #0]
+	ldrh	r1, [r4, #4]
+	cmp	r0, r1
+	bne	.L1583
+	ldr	r1, [r7, #4]
+	str	r1, [fp, r2, lsl #2]
+	b	.L1583
+.L1582:
+	ldrh	r2, [r8, #0]
+	strh	r2, [r4, #40]	@ movhi
+.L1583:
+	adds	r6, r6, #1
+.L1581:
+	sxth	r2, r6
+	cmp	r3, r2
+	bge	.L1584
+	b	.L1585
+.L1580:
+	ldr	r1, .L1615+4
+	ldr	r0, .L1615+12
+	ldr	r2, [r1, #0]
+	ldrh	r1, [r7], #2
+	str	r2, [r6, #8]
+	ldrh	r2, [r0, #0]
+	ldr	r0, .L1615
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	movs	r1, #1
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	r3, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	r3, [sp, #8]
+	adds	r2, r2, #1
+	beq	.L1606
+	ldrh	r1, [r5, #0]
+	ldrh	r2, [sl, #4]
+	cmp	r1, r2
+	bne	.L1606
+	ldrh	r2, [r5, #8]
+	movw	r1, #64245
+	cmp	r2, r1
+	bne	.L1606
+	ldr	r2, .L1615+12
+	movs	r1, #0
+	ldr	r0, .L1615+4
+	mov	lr, r3
+	ldrh	r4, [r2, #0]
+	ldr	r2, [r0, #0]
+	subs	r4, r4, #1
+	b	.L1587
 .L1589:
-	ldrh	r3, [r4, #4]
-	cbnz	r3, .L1590
-	mov	r0, r4
-	bl	allocate_new_data_superblock
-.L1590:
-	ldr	r0, [r5, #4]
-	ldr	r3, [fp, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r3, r3, #1
-	str	r3, [fp, #96]
-	bl	FtlGcMarkBadPhyBlk
-	mov	r0, r4
-	bl	get_new_active_ppa
+	ldrh	r0, [r2, #0]
+	cmp	r0, fp
+	itt	cc
+	ldrcc	r3, [r2, #4]
+	strcc	r3, [lr, r0, lsl #2]
+	adds	r1, r1, #1
+	adds	r2, r2, #8
+.L1587:
+	cmp	r1, r4
+	blt	.L1589
+	mov	r3, lr
+	b	.L1590
+.L1592:
+	ldrh	r2, [r7, #-2]
 	movs	r1, #1
-	mov	r2, r7
-	str	r0, [r5, #4]
-	str	r0, [sp, #12]
-	mov	r0, r5
-	ldrb	r3, [r4, #9]	@ zero_extendqisi2
-	bl	FlashProgPages
-	b	.L1600
-.L1601:
-	mov	r8, #0
-.L1600:
-	ldr	r3, [r5, #0]
-	adds	r3, r3, #1
+	ldr	r0, .L1615
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	ip, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	ip, [sp, #8]
+	adds	r2, r2, #1
 	beq	.L1591
-	ldr	r3, .L1602+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r5, #8]
+	cmp	r2, fp
+	bcs	.L1591
+	ldrh	r1, [sl, #4]
+	ldrh	r0, [r5, #0]
+	cmp	r0, r1
+	itt	eq
+	ldreq	r1, [r6, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L1591:
+	adds	r4, r4, #1
+	b	.L1610
+.L1606:
+	mov	ip, r8
+	movs	r4, #0
+	mov	r8, r3
+.L1610:
+	ldr	r1, .L1615+12
+	ldrh	r2, [r1, #0]
+	cmp	r4, r2
+	blt	.L1592
+	mov	r3, r8
+	mov	r8, ip
+.L1590:
+	add	r8, r8, #1
+.L1579:
+	ldr	r2, [sp, #16]
+	uxth	r1, r8
+	cmp	r8, r2
+	blt	.L1593
+	mov	r4, sl
+.L1585:
+	ldr	r3, .L1615+16
+	cmp	r4, r3
+	bne	.L1594
+	ldr	r3, .L1615+20
 	ldrh	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1607
+	b	.L1594
+.L1601:
+	ldr	r3, [r8, #0]
+	lsls	r4, r7, #2
+	ldr	r3, [r3, r7, lsl #2]
+	subs	r2, r3, #1
+	adds	r2, r2, #3
+	bhi	.L1596
+	ldr	r2, [r6, #0]
+	ldr	r2, [r2, r7, lsl #2]
+	cmp	r3, r2
+	beq	.L1596
+	ldr	r0, .L1615+4
+	movs	r1, #1
+	str	r3, [sl, #4]
+	ldr	r2, [r0, #0]
+	ldr	r0, .L1615
+	str	r2, [sl, #8]
+	ldr	r2, .L1615+8
+	ldr	r5, [r2, #0]
+	mov	r2, r1
+	str	r5, [sl, #12]
+	bl	FlashReadPages
+	ldr	r3, [sl, #0]
+	adds	r3, r3, #1
+	beq	.L1609
+	ldr	r3, .L1615+16
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #4]
 	cmp	r2, r3
-	bcc	.L1592
-	ldr	r1, .L1602+16
-	mov	r2, #1464
-	ldr	r0, .L1602+20
-	bl	printf
-	ldr	r0, .L1602+24
-	ldr	r1, .L1602+28
-	bl	printf
-.L1592:
-	ldr	r3, [r5, #4]
-	str	r3, [sp, #12]
-	cbz	r7, .L1593
-	orr	r3, r3, #-2147483648
-	str	r3, [sp, #12]
-.L1593:
-	movs	r2, #1
-	ldr	r0, [r5, #16]
-	add	r1, sp, #12
-	bl	log2phys
-	ldr	r3, [r5, #12]
-	ldr	r0, [r3, #12]
-	adds	r3, r0, #1
-	beq	.L1594
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
+	bne	.L1609
+	ldr	fp, [r5, #4]
+	b	.L1597
+.L1609:
+	mov	fp, #0
+.L1597:
 	ldr	r3, [r6, #0]
-	ldrh	r2, [r3, r0, lsl #1]
-	mov	r8, r0
-	cbnz	r2, .L1595
-	ldr	r0, .L1602+32
-	mov	r1, r8
+	movs	r1, #1
+	mov	r2, r1
+	ldr	r0, .L1615
+	ldr	r3, [r3, r4]
+	str	r3, [sl, #4]
+	bl	FlashReadPages
+	ldr	r1, [r5, #4]
+	cmp	fp, r1
+	bls	.L1596
+	ldr	r2, [r8, #0]
+	ldr	r3, [r6, #0]
+	ldr	r0, .L1615+24
+	str	r1, [sp, #0]
+	ldr	r1, [r2, r4]
+	ldr	r2, [r3, r4]
+	mov	r3, fp
 	bl	printf
+	ldr	r3, [r8, #0]
+	ldr	r2, [r6, #0]
+	ldr	r1, [r3, r4]
+	str	r1, [r2, r4]
+	movs	r2, #0
+	ldr	r0, [r3, r4]
+	ldr	r3, .L1615+28
+	ubfx	r0, r0, #10, #16
+	ldr	r1, [sp, #12]
+	ldrh	r3, [r3, #0]
+	b	.L1598
+.L1599:
+	ldrh	r4, [r1], #2
+	adds	r2, r2, #1
+	cmp	r4, r0
+	beq	.L1596
+.L1598:
+	cmp	r2, r3
+	blt	.L1599
+	b	.L1613
+.L1614:
+	ldr	r1, [sp, #12]
+	strh	r0, [r1, r3, lsl #1]	@ movhi
+	ldr	r3, .L1615+28
+	ldrh	r2, [r3, #0]
+	adds	r2, r2, #1
+	strh	r2, [r3, #0]	@ movhi
+	bl	remove_from_free_sys_Queue
+.L1596:
+	adds	r7, r7, #1
+	b	.L1595
+.L1616:
+	.align	2
+.L1615:
+	.word	.LANCHOR198
+	.word	.LANCHOR98
+	.word	.LANCHOR184
+	.word	.LANCHOR69
+	.word	.LANCHOR122
+	.word	.LANCHOR85
+	.word	.LC37
+	.word	.LANCHOR123
+.L1607:
+	ldr	r8, .L1617+16
+	movs	r7, #0
+	ldr	r6, .L1617
+	ldr	sl, .L1617+20
+	str	r4, [sp, #16]
 .L1595:
-	mov	r0, r8
-	bl	decrement_vpc_count
+	ldr	r2, .L1617+4
+	ldrh	r3, [r2, #0]
+	cmp	r7, r3
+	bcc	.L1601
+	ldr	r4, [sp, #16]
 .L1594:
-	add	sl, sl, #1
-	adds	r5, r5, #36
-.L1588:
-	ldr	r3, [sp, #4]
-	cmp	sl, r3
-	bne	.L1601
-	ldr	r3, .L1602+12
-	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L1617+8
+	ldrh	r2, [r4, #2]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bcc	.L1586
-	ldr	r1, .L1602+16
-	movw	r2, #1481
-	ldr	r0, .L1602+20
-	bl	printf
-	ldr	r0, .L1602+24
-	ldr	r1, .L1602+28
-	bl	printf
-.L1586:
-	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1603:
-	.align	2
+	bne	.L1602
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
 .L1602:
-	.word	.LANCHOR7
-	.word	.LANCHOR99
-	.word	.LANCHOR68
-	.word	.LANCHOR53
-	.word	.LANCHOR218
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LC32
-	.word	.LANCHOR141
-	.size	FtlProgPages, .-FtlProgPages
-	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1613:
+	ldr	r2, .L1617+12
+	ldr	r2, [r2, #0]
+	cmp	r3, r2
+	bcs	.L1596
+	b	.L1614
+.L1618:
+	.align	2
+.L1617:
+	.word	.LANCHOR126
+	.word	.LANCHOR82
+	.word	.LANCHOR69
+	.word	.LANCHOR80
+	.word	.LANCHOR191
+	.word	.LANCHOR198
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
 	.align	1
-	.global	FtlCacheWriteBack
+	.global	FtlLoadMapInfo
 	.thumb
 	.thumb_func
-	.type	FtlCacheWriteBack, %function
-FtlCacheWriteBack:
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	ldr	r4, .L1606
-	ldr	r0, [r4, #0]
-	cbz	r0, .L1605
-	ldr	r3, .L1606+4
-	movs	r1, #1
-	movs	r2, #0
-	ldr	r3, [r3, #0]
-	bl	FtlProgPages
-	movs	r3, #0
-	str	r3, [r4, #0]
-.L1605:
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L1620
+	bl	FtlMapTblRecovery
 	movs	r0, #0
-	pop	{r4, pc}
-.L1607:
+	pop	{r3, pc}
+.L1621:
 	.align	2
-.L1606:
-	.word	.LANCHOR134
-	.word	.LANCHOR219
-	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
-	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+.L1620:
+	.word	.LANCHOR122
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
 	.align	1
-	.global	FtlGcFreeTempBlock
+	.global	FtlLoadVonderInfo
 	.thumb
 	.thumb_func
-	.type	FtlGcFreeTempBlock, %function
-FtlGcFreeTempBlock:
-	@ args = 0, pretend = 0, frame = 8
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
-	ldr	r0, .L1624
-	ldr	r3, .L1624+4
-	ldrh	r4, [r0, #0]
-	ldrh	r1, [r3, #0]
-	movw	r3, #65535
-	cmp	r4, r3
-	beq	.L1609
-	bl	FtlGcScanTempBlk
-	str	r0, [sp, #4]
-	adds	r0, r0, #1
-	beq	.L1609
-	ldr	r3, .L1624+8
+	push	{r3, lr}
+	ldr	r3, .L1623
+	ldr	r0, .L1623+4
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L1623+8
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L1623+12
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L1623+16
 	ldr	r3, [r3, #0]
-	ldrh	r2, [r3, r4, lsl #1]
-	cmp	r2, #4
-	bls	.L1610
-	subs	r2, r2, #5
-	movs	r0, #1
-	strh	r2, [r3, r4, lsl #1]	@ movhi
-	bl	FtlEctTblFlush
-.L1610:
-	ldr	r3, .L1624+12
+	str	r3, [r0, #12]
+	ldr	r3, .L1623+20
 	ldr	r3, [r3, #0]
-	cbnz	r3, .L1611
-	ldr	r3, .L1624+16
-	ldr	r0, [sp, #4]
-	ldr	r2, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r2, r2, #1
-	str	r2, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-.L1611:
-	ldr	r3, .L1624+12
-	movs	r2, #0
-	movs	r4, #1
-	str	r2, [r3, #0]
-	b	.L1612
-.L1609:
-	ldr	r5, .L1624
-	movs	r4, #0
-	ldr	r3, .L1624+12
-	ldrh	r2, [r5, #0]
-	str	r4, [r3, #0]
+	str	r3, [r0, #16]
+	ldr	r3, .L1623+24
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #20]
+	ldr	r3, .L1623+28
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #24]
 	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1612
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1624+20
-	ldr	r1, .L1624+4
-	ldrh	r2, [r3, #0]
-	ldrh	r1, [r1, #0]
-	ldrb	r3, [r5, #7]	@ zero_extendqisi2
-	muls	r3, r1, r3
-	cmp	r2, r3
-	beq	.L1613
-	ldr	r1, .L1624+24
-	movs	r2, #161
-	ldr	r0, .L1624+28
+	strh	r3, [r0, #40]	@ movhi
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L1624:
+	.align	2
+.L1623:
+	.word	.LANCHOR77
+	.word	.LANCHOR215
+	.word	.LANCHOR86
+	.word	.LANCHOR78
+	.word	.LANCHOR87
+	.word	.LANCHOR189
+	.word	.LANCHOR188
+	.word	.LANCHOR190
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.thumb
+	.thumb_func
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	mov	r4, r0
+	ldr	r3, .L1631
+	mov	r7, r1
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	bcs	.L1626
+	ldr	r1, .L1631+4
+	movw	r2, #503
+	ldr	r0, .L1631+8
 	bl	printf
-	ldr	r0, .L1624+32
-	ldr	r1, .L1624+36
+	ldr	r0, .L1631+12
+	ldr	r1, .L1631+16
 	bl	printf
-.L1613:
-	ldr	r3, .L1624
-	movs	r5, #0
-	ldr	r2, .L1624+40
-	ldr	r4, .L1624+4
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r4, #0]
-	ldrb	r0, [r3, #7]	@ zero_extendqisi2
-	muls	r0, r4, r0
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldr	r1, .L1624+44
-	ldr	r2, .L1624+20
-	ldr	fp, .L1624+68
-	ldr	r0, [r1, #0]
-	mov	sl, r2
-	ldrh	r4, [r2, #0]
-	ldr	r8, .L1624+72
-	adds	r0, r4, r0
-	str	r0, [r1, #0]
-	b	.L1614
-.L1618:
-	ldr	r7, [fp, #0]
-	movs	r6, #12
-	muls	r6, r5, r6
+.L1626:
+	ldr	r3, .L1631+20
+	ldr	r8, .L1631+44
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, r4, lsl #2]
+	movs	r3, #12
+	cbnz	r6, .L1627
+	muls	r7, r3, r7
 	ldr	r3, [r8, #0]
-	adds	r4, r7, r6
-	ldr	r2, [r4, #8]
-	cmp	r2, r3
-	bcc	.L1615
-	ldr	r1, .L1624+24
-	movs	r2, #166
-	ldr	r0, .L1624+28
-	bl	printf
-	ldr	r0, .L1624+32
-	ldr	r1, .L1624+36
-	bl	printf
-.L1615:
-	movs	r2, #0
-	ldr	r0, [r4, #8]
-	add	r1, sp, #4
-	bl	log2phys
-	ldr	r0, [sp, #4]
-	ldr	r3, [r7, r6]
-	cmp	r0, r3
-	bne	.L1616
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	adds	r1, r4, #4
-	movs	r2, #1
-	mov	r6, r0
-	ldr	r0, [r4, #8]
-	bl	log2phys
-	mov	r0, r6
-	b	.L1623
-.L1616:
-	ldr	r3, [r4, #4]
-	cmp	r0, r3
-	beq	.L1617
-	ldr	r3, .L1624
-	ldrh	r0, [r3, #0]
-.L1623:
-	bl	decrement_vpc_count
-.L1617:
-	adds	r5, r5, #1
-	uxth	r5, r5
-.L1614:
-	ldrh	r3, [sl, #0]
-	cmp	r3, r5
-	bhi	.L1618
-	movw	r0, #65535
-	ldr	r4, .L1624
-	bl	decrement_vpc_count
-	ldr	r3, .L1624+40
-	ldrh	r0, [r4, #0]
+	movs	r1, #255
+	adds	r3, r3, r7
+	ldr	r0, [r3, #8]
+	ldr	r3, .L1631+24
+	ldrh	r2, [r3, #0]
+	bl	memset
+	ldr	r3, [r8, #0]
+	adds	r2, r3, r7
+	strh	r4, [r3, r7]	@ movhi
+	str	r6, [r2, #4]
+	b	.L1628
+.L1627:
+	muls	r7, r3, r7
+	ldr	r3, [r8, #0]
+	ldr	r5, .L1631+28
+	movs	r1, #1
+	adds	r3, r3, r7
+	mov	r2, r1
+	mov	r0, r5
+	ldr	r3, [r3, #8]
+	str	r6, [r5, #4]
+	str	r3, [r5, #8]
+	ldr	r3, .L1631+32
 	ldr	r3, [r3, #0]
-	ldrh	r3, [r3, r0, lsl #1]
-	cbz	r3, .L1619
-	bl	INSERT_DATA_LIST
-	b	.L1620
-.L1619:
-	bl	INSERT_FREE_LIST
-.L1620:
-	ldr	r3, .L1624+20
-	movw	r5, #65535
-	strh	r5, [r4, #0]	@ movhi
-	movs	r4, #0
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1624+48
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	ldr	r3, .L1624+52
-	ldr	r2, .L1624+56
-	movs	r1, #3
-	ldrh	r3, [r3, #0]
-	ldrh	r2, [r2, #0]
-	muls	r2, r1, r2
-	cmp	r3, r2, lsr #2
-	ble	.L1612
-	ldr	r3, .L1624+60
-	movs	r2, #20
-	strh	r5, [r3, #0]	@ movhi
-	ldr	r3, .L1624+64
-	strh	r2, [r3, #0]	@ movhi
-.L1612:
-	mov	r0, r4
-	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1625:
+	str	r3, [r5, #12]
+	bl	FlashReadPages
+	ldr	r3, [r5, #0]
+	ldr	sl, [r5, #12]
+	cmp	r3, #256
+	bne	.L1629
+	mov	r2, r6
+	mov	r1, r4
+	ldr	r0, .L1631+36
+	lsrs	r6, r6, #10
+	bl	printf
+	ldr	r3, [r8, #0]
+	ldr	r0, .L1631+40
+	mov	r1, r4
+	adds	r3, r3, r7
+	strh	r6, [r0, #40]	@ movhi
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+.L1629:
+	ldrh	r3, [sl, #8]
+	cmp	r3, r4
+	beq	.L1630
+	ldr	r1, .L1631+4
+	movw	r2, #529
+	ldr	r0, .L1631+8
+	bl	printf
+	ldr	r0, .L1631+12
+	ldr	r1, .L1631+16
+	bl	printf
+.L1630:
+	ldr	r3, .L1631+44
+	movs	r1, #0
+	ldr	r3, [r3, #0]
+	adds	r2, r3, r7
+	strh	r4, [r3, r7]	@ movhi
+	str	r1, [r2, #4]
+.L1628:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1632:
 	.align	2
-.L1624:
-	.word	.LANCHOR109
-	.word	.LANCHOR68
-	.word	.LANCHOR94
-	.word	.LANCHOR137
-	.word	.LANCHOR141
-	.word	.LANCHOR144
+.L1631:
+	.word	.LANCHOR82
 	.word	.LANCHOR220
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR99
-	.word	.LANCHOR155
-	.word	.LANCHOR142
-	.word	.LANCHOR104
-	.word	.LANCHOR200
-	.word	.LANCHOR201
-	.word	.LANCHOR170
-	.word	.LANCHOR145
-	.word	.LANCHOR87
-	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
-	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.word	.LANCHOR126
+	.word	.LANCHOR73
+	.word	.LANCHOR198
+	.word	.LANCHOR184
+	.word	.LC38
+	.word	.LANCHOR122
+	.word	.LANCHOR114
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.log2phys,"ax",%progbits
 	.align	1
-	.global	Ftl_gc_temp_data_write_back
+	.global	log2phys
 	.thumb
 	.thumb_func
-	.type	Ftl_gc_temp_data_write_back, %function
-Ftl_gc_temp_data_write_back:
+	.type	log2phys, %function
+log2phys:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, r6, r7, lr}
-	ldr	r3, .L1635
-	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1635+4
-	cbz	r2, .L1627
-	ldr	r2, [r3, #0]
-	lsls	r2, r2, #31
-	bpl	.L1627
-	ldr	r2, .L1635+8
-	ldrh	r2, [r2, #4]
-	cmp	r2, #0
-	bne	.L1632
-.L1627:
-	ldr	r4, .L1635+12
-	movs	r2, #0
-	ldr	r1, [r3, #0]
-	mov	r3, r2
-	movs	r5, #0
-	ldr	r7, .L1635+4
-	ldr	r0, [r4, #0]
-	movs	r6, #36
-	bl	FlashProgPages
-	b	.L1629
-.L1631:
-	mul	r3, r6, r5
-	ldr	r1, [r4, #0]
-	adds	r2, r1, r3
-	ldr	r1, [r1, r3]
-	adds	r0, r1, #1
-	bne	.L1630
-	ldr	r3, .L1635+8
-	movs	r5, #0
-	ldr	r0, .L1635+16
-	ldrh	r4, [r3, #0]
-	ldr	r0, [r0, #0]
-	strh	r5, [r0, r4, lsl #1]	@ movhi
-	strh	r1, [r3, #0]	@ movhi
-	ldr	r3, .L1635+20
-	ldr	r0, [r2, #4]
-	ldr	r1, [r3, #96]
-	ubfx	r0, r0, #10, #16
-	adds	r1, r1, #1
-	str	r1, [r3, #96]
-	bl	FtlBbmMapBadBlock
-	bl	FtlBbmTblFlush
-	bl	FtlGcPageVarInit
-	b	.L1634
-.L1630:
-	ldr	r3, [r2, #12]
-	adds	r5, r5, #1
-	ldr	r1, [r2, #4]
+	ldr	r3, .L1643
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #1
+	ldrh	r3, [r3, #0]
+	mov	r6, r1
+	mov	r7, r2
+	adds	r3, r3, #7
+	lsr	r4, r0, r3
+	lsl	r5, r5, r3
+	ldr	r3, .L1643+4
+	subs	r5, r5, #1
+	ands	r5, r5, r0
+	uxth	r4, r4
+	ldr	r3, [r3, #0]
 	uxth	r5, r5
-	ldr	r0, [r3, #12]
-	ldr	r2, [r3, #8]
-	bl	FtlGcUpdatePage
-.L1629:
-	ldr	r1, [r7, #0]
-	cmp	r5, r1
-	bcc	.L1631
-	ldr	r3, .L1635+12
-	ldr	r0, [r3, #0]
-	bl	FtlGcBufFree
-	ldr	r3, .L1635+4
-	movs	r0, #0
-	str	r0, [r3, #0]
-	ldr	r3, .L1635+8
-	ldrh	r3, [r3, #4]
-	cbnz	r3, .L1628
-	movs	r0, #1
-	bl	FtlGcFreeTempBlock
+	cmp	r0, r3
+	bcc	.L1634
+	ldr	r1, .L1643+8
+	movw	r2, #851
+	ldr	r0, .L1643+12
+	bl	printf
+	ldr	r0, .L1643+16
+	ldr	r1, .L1643+20
+	bl	printf
 .L1634:
-	movs	r0, #1
-	pop	{r3, r4, r5, r6, r7, pc}
-.L1632:
+	ldr	r3, .L1643+24
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1643+28
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r8, r3
+	b	.L1635
+.L1641:
+	adds	r3, r3, #12
+	adds	r0, r2, r3
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r4
+	bne	.L1636
+.L1637:
+	ldr	r2, .L1643+28
+	movs	r3, #12
+	ldr	r2, [r2, #0]
+	mla	r3, r3, r8, r2
+	cbnz	r7, .L1638
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r6, #0]
+	b	.L1639
+.L1638:
+	ldr	r1, [r6, #0]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r5, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L1643+32
+	strh	r4, [r3, #0]	@ movhi
+.L1639:
+	ldr	r3, .L1643+28
+	movs	r2, #12
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r8, r3
+	ldr	r2, [r3, #4]
+	adds	r0, r2, #1
+	beq	.L1640
+	adds	r2, r2, #1
+	str	r2, [r3, #4]
+.L1640:
 	movs	r0, #0
-.L1628:
-	pop	{r3, r4, r5, r6, r7, pc}
+	pop	{r4, r5, r6, r7, r8, pc}
 .L1636:
-	.align	2
+	add	r8, r8, #1
+	uxth	r8, r8
 .L1635:
-	.word	.LANCHOR7
-	.word	.LANCHOR128
-	.word	.LANCHOR109
-	.word	.LANCHOR174
-	.word	.LANCHOR99
-	.word	.LANCHOR141
-	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
-	.section	.text.FtlGcPageRecovery,"ax",%progbits
-	.align	1
-	.global	FtlGcPageRecovery
-	.thumb
-	.thumb_func
-	.type	FtlGcPageRecovery, %function
-FtlGcPageRecovery:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	ldr	r4, .L1639
-	ldr	r5, .L1639+4
-	ldrh	r1, [r4, #0]
-	mov	r0, r5
-	bl	FtlGcScanTempBlk
-	ldrh	r2, [r5, #2]
-	ldrh	r3, [r4, #0]
-	cmp	r2, r3
-	bcc	.L1637
-	ldr	r0, .L1639+8
-	bl	FtlMapBlkWriteDumpData
-	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r3, .L1639+12
-	movs	r2, #0
-	str	r2, [r3, #0]
-.L1637:
-	pop	{r3, r4, r5, pc}
-.L1640:
-	.align	2
-.L1639:
-	.word	.LANCHOR68
-	.word	.LANCHOR109
-	.word	.LANCHOR120
-	.word	.LANCHOR137
-	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
-	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
-	.align	1
-	.global	Ftl_get_new_temp_ppa
-	.thumb
-	.thumb_func
-	.type	Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, r4, r5, lr}
-	movw	r3, #65535
-	ldr	r5, .L1644
-	ldrh	r2, [r5, #0]
+	cmp	r8, r1
+	bne	.L1641
+	bl	select_l2p_ram_region
+	movs	r3, #12
+	ldr	r2, .L1643+28
+	ldr	r2, [r2, #0]
+	mul	r3, r3, r0
+	mov	r8, r0
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
+	movw	r3, #65535
 	cmp	r2, r3
 	beq	.L1642
-	ldrh	r3, [r5, #4]
-	cbnz	r3, .L1643
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L1642
+	bl	flush_l2p_region
 .L1642:
-	bl	FtlCacheWriteBack
-	movs	r0, #0
-	bl	FtlGcFreeTempBlock
-	ldr	r0, .L1644
-	movs	r4, #0
-	strb	r4, [r5, #8]
-	bl	allocate_data_superblock
-	ldr	r3, .L1644+4
-	strh	r4, [r3, #0]	@ movhi
-	ldr	r3, .L1644+8
-	strh	r4, [r3, #0]	@ movhi
-	bl	l2p_flush
 	mov	r0, r4
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-.L1643:
-	ldr	r0, .L1644
-	pop	{r3, r4, r5, lr}
-	b	get_new_active_ppa
-.L1645:
-	.align	2
+	mov	r1, r8
+	bl	load_l2p_region
+	b	.L1637
 .L1644:
-	.word	.LANCHOR109
-	.word	.LANCHOR142
-	.word	.LANCHOR144
-	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
-	.section	.text.ftl_discard,"ax",%progbits
+	.align	2
+.L1643:
+	.word	.LANCHOR72
+	.word	.LANCHOR88
+	.word	.LANCHOR221
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR83
+	.word	.LANCHOR114
+	.word	.LANCHOR115
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
 	.align	1
-	.global	ftl_discard
+	.global	FtlReUsePrevPpa
 	.thumb
 	.thumb_func
-	.type	ftl_discard, %function
-ftl_discard:
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1655
-	push	{r0, r1, r4, r5, r6, r7, r8, lr}
-	mov	r4, r2
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r6, r0
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, .L1652
 	ldr	r3, [r3, #0]
-	adds	r2, r2, r1
-	mov	r6, r1
-	cmp	r2, r3
-	bhi	.L1652
-	cmp	r4, #31
-	bls	.L1653
-	bl	FtlCacheWriteBack
-	ldr	r3, .L1655+4
-	mov	r0, r6
-	ldrh	r7, [r3, #0]
-	mov	r1, r7
-	bl	__aeabi_uidiv
-	mls	r6, r0, r7, r6
-	mov	r5, r0
-	uxth	r6, r6
-	cbz	r6, .L1648
-	subs	r6, r7, r6
-	adds	r5, r0, #1
-	cmp	r6, r4
-	it	cs
-	movcs	r6, r4
-	uxth	r6, r6
-	subs	r4, r4, r6
-.L1648:
-	mov	r3, #-1
-	ldr	r8, .L1655+4
-	str	r3, [sp, #4]
-	ldr	r7, .L1655+8
-	ldr	r6, .L1655+12
-	b	.L1649
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r4, r0
+	cmp	r2, #0
+	bne	.L1646
+	ldr	r3, .L1652+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	beq	.L1647
+	ldr	r1, .L1652+8
+	movs	r5, #6
+	ldr	r0, .L1652+12
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L1652+16
+	ldr	r1, [r1, #0]
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r0, r3
+	movw	r0, #65535
+	uxth	r3, r3
+	b	.L1648
 .L1651:
-	movs	r2, #0
-	mov	r0, r5
-	mov	r1, sp
-	bl	log2phys
-	ldr	r3, [sp, #0]
-	adds	r3, r3, #1
-	beq	.L1650
-	ldr	r3, [r7, #0]
-	add	r1, sp, #4
-	movs	r2, #1
-	mov	r0, r5
-	adds	r3, r3, #1
-	str	r3, [r7, #0]
-	ldr	r3, [r6, #0]
-	adds	r3, r3, #1
-	str	r3, [r6, #0]
-	bl	log2phys
-	ldr	r0, [sp, #0]
-	ubfx	r0, r0, #10, #16
-	bl	P2V_block_in_plane
-	bl	decrement_vpc_count
+	cmp	r3, r4
+	bne	.L1649
+	ldr	r5, .L1652+8
+	mov	r1, r4
+	ldr	r0, .L1652+4
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1650
+	ldr	r1, .L1652+20
+	movw	r2, #1823
+	ldr	r0, .L1652+24
+	bl	printf
+	ldr	r0, .L1652+28
+	ldr	r1, .L1652+32
+	bl	printf
 .L1650:
-	ldrh	r3, [r8, #0]
-	adds	r5, r5, #1
-	subs	r4, r4, r3
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L1652
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	b	.L1646
 .L1649:
-	ldrh	r3, [r8, #0]
-	cmp	r4, r3
-	bcs	.L1651
-	ldr	r3, .L1655+8
-	mov	r4, #0
-	ldr	r2, [r3, #0]
-	cmp	r2, #32
-	bls	.L1654
-	str	r4, [r3, #0]
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-	b	.L1654
-.L1652:
-	mov	r0, #-1
-	b	.L1647
-.L1653:
-	movs	r0, #0
+	muls	r3, r5, r3
+	ldrh	r3, [r1, r3]
+	cmp	r3, r0
+	beq	.L1647
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1648:
+	cmp	r2, r7
+	bne	.L1651
 	b	.L1647
-.L1654:
-	mov	r0, r4
+.L1646:
+	adds	r2, r2, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
 .L1647:
-	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
-.L1656:
-	.align	2
-.L1655:
-	.word	.LANCHOR84
-	.word	.LANCHOR71
-	.word	.LANCHOR221
-	.word	.LANCHOR157
-	.size	ftl_discard, .-ftl_discard
-	.section	.text.FtlSysFlush,"ax",%progbits
-	.align	1
-	.global	FtlSysFlush
-	.thumb
-	.thumb_func
-	.type	FtlSysFlush, %function
-FtlSysFlush:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	movs	r0, #1
-	bl	FtlEctTblFlush
-	bl	FtlVpcTblFlush
-	movs	r0, #0
-	pop	{r3, pc}
-	.size	FtlSysFlush, .-FtlSysFlush
-	.section	.text.FtlDeInit,"ax",%progbits
-	.align	1
-	.global	FtlDeInit
-	.thumb
-	.thumb_func
-	.type	FtlDeInit, %function
-FtlDeInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1660
-	ldr	r3, [r3, #0]
-	cmp	r3, #1
-	bne	.L1659
-	bl	FtlSysFlush
-.L1659:
-	movs	r0, #0
-	pop	{r3, pc}
-.L1661:
+	mov	r0, r6
+	add	r1, sp, #4
+	movs	r2, #1
+	bl	log2phys
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L1653:
 	.align	2
-.L1660:
+.L1652:
+	.word	.LANCHOR101
+	.word	.LANCHOR105
+	.word	.LANCHOR106
+	.word	-1431655765
+	.word	.LANCHOR99
 	.word	.LANCHOR222
-	.size	FtlDeInit, .-FtlDeInit
-	.section	.text.rk_ftl_de_init,"ax",%progbits
-	.align	1
-	.global	rk_ftl_de_init
-	.thumb
-	.thumb_func
-	.type	rk_ftl_de_init, %function
-rk_ftl_de_init:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	rk_nand_de_init
-	bl	FtlDeInit
-	pop	{r3, lr}
-	b	rk_nand_de_init
-	.size	rk_ftl_de_init, .-rk_ftl_de_init
-	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.FtlProgPages,"ax",%progbits
 	.align	1
-	.global	FtlMapTblRecovery
+	.global	FtlProgPages
 	.thumb
 	.thumb_func
-	.type	FtlMapTblRecovery, %function
-FtlMapTblRecovery:
+	.type	FtlProgPages, %function
+FtlProgPages:
 	@ args = 0, pretend = 0, frame = 16
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
-	mov	r4, r0
-	ldr	r3, [r0, #12]
-	movs	r1, #0
-	ldrh	sl, [r0, #6]
-	ldr	fp, [r0, #24]
-	str	r3, [sp, #8]
-	ldr	r3, [r0, #16]
-	lsl	r2, sl, #2
-	ldr	r6, .L1683
-	str	r3, [sp, #12]
-	ldrh	r3, [r0, #8]
-	mov	r0, fp
-	str	r3, [sp, #4]
-	bl	memset
-	ldr	r1, .L1683+4
-	movs	r2, #0
-	mov	r8, r2
-	str	r2, [r4, #32]
-	str	r2, [r4, #28]
-	ldr	r3, [r1, #0]
-	str	r3, [r6, #8]
-	ldr	r3, .L1683+8
-	ldr	r5, [r3, #0]
-	movw	r3, #65535
-	str	r5, [r6, #12]
-	strh	r3, [r4, #0]	@ movhi
+	mov	r4, r3
+	ldr	r3, .L1670
+	mov	r5, r0
+	str	r1, [sp, #4]
+	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	cbz	r7, .L1655
+	ldrb	r7, [r4, #8]	@ zero_extendqisi2
+	sub	r2, r7, #1
+	rsbs	r7, r2, #0
+	adc	r7, r7, r2
+.L1655:
+	mov	r0, r5
+	ldr	r1, [sp, #4]
+	mov	r2, r7
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	mov	sl, #0
+	ldr	r6, .L1670+4
+	ldr	fp, .L1670+36
+	b	.L1656
+.L1659:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4, #0]
+	cmp	r3, r0
+	bne	.L1657
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r2, r3, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	ldr	r2, .L1670+8
+	strb	r8, [r4, #6]
+	strh	r8, [r4, #4]	@ movhi
+	ldrh	r3, [r2, #0]
 	strh	r3, [r4, #2]	@ movhi
-	movs	r3, #1
-	str	r3, [r4, #36]
-	ldr	r3, [sp, #8]
-	mov	r7, r3
-	mov	r3, fp
-	mov	fp, sl
-	mov	sl, r4
-	b	.L1664
-.L1677:
-	ldr	r0, [sp, #4]
-	subs	r2, r0, #1
-	cmp	r8, r2
-	bne	.L1665
-	sxth	r6, r1
-	mov	r4, sl
-	mov	sl, fp
-	mov	fp, r3
-	ldr	r3, [sp, #8]
-	mov	r7, r1
+.L1657:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1658
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.L1658:
+	ldr	r0, [r5, #4]
+	ldr	r3, [fp, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [fp, #96]
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
 	movs	r1, #1
-	add	r3, r3, r6, lsl #1
-	str	r3, [sp, #4]
-	ldr	r3, [sp, #8]
-	ldrh	r0, [r3, r6, lsl #1]
-	bl	FtlGetLastWrittenPage
-	ldr	r1, [sp, #12]
-	strh	r7, [r4, #0]	@ movhi
-	ldr	r7, .L1683
-	uxth	r0, r0
-	adds	r3, r0, #1
-	strh	r3, [r4, #2]	@ movhi
-	ldr	r3, [r1, r6, lsl #2]
-	sxth	r8, r0
-	movs	r6, #0
-	str	r3, [r4, #28]
-	b	.L1666
+	mov	r2, r7
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
+	mov	r0, r5
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	b	.L1668
+.L1669:
+	mov	r8, #0
 .L1668:
-	ldr	r2, [sp, #4]
-	movs	r1, #1
-	ldr	r0, .L1683
-	ldrh	r3, [r2, #0]
-	mov	r2, r1
-	orr	r3, r6, r3, lsl #10
-	str	r3, [r7, #4]
-	bl	FlashReadPages
-	ldr	r3, [r7, #0]
+	ldr	r3, [r5, #0]
 	adds	r3, r3, #1
-	beq	.L1667
-	ldrh	r3, [r5, #8]
-	cmp	r3, sl
-	bcs	.L1667
-	ldrh	r2, [r4, #4]
-	ldrh	r1, [r5, #0]
-	cmp	r1, r2
-	itt	eq
-	ldreq	r2, [r7, #4]
-	streq	r2, [fp, r3, lsl #2]
-.L1667:
-	adds	r6, r6, #1
-.L1666:
-	sxth	r3, r6
-	cmp	r8, r3
-	bge	.L1668
-	b	.L1669
-.L1665:
-	ldr	r0, .L1683+4
-	ldrh	r1, [r7], #2
-	ldr	r2, [r0, #0]
-	ldr	r0, .L1683+12
-	str	r2, [r6, #8]
-	ldrh	r2, [r0, #0]
-	ldr	r0, .L1683
-	subs	r2, r2, #1
-	orr	r2, r2, r1, lsl #10
-	movs	r1, #1
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	r3, [sp, #0]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	r3, [sp, #0]
-	adds	r2, r2, #1
-	beq	.L1681
-	ldrh	r1, [r5, #0]
-	ldrh	r2, [sl, #4]
-	cmp	r1, r2
-	bne	.L1681
-	ldrh	r2, [r5, #8]
-	movw	r1, #64245
-	cmp	r2, r1
-	bne	.L1681
-	ldr	r2, .L1683+12
-	movs	r1, #0
-	ldr	r0, .L1683+4
-	mov	lr, r3
-	ldrh	r4, [r2, #0]
-	ldr	r2, [r0, #0]
-	subs	r4, r4, #1
-	b	.L1671
-.L1673:
-	ldrh	r0, [r2, #0]
-	cmp	r0, fp
-	itt	cc
-	ldrcc	r3, [r2, #4]
-	strcc	r3, [lr, r0, lsl #2]
-	adds	r1, r1, #1
-	adds	r2, r2, #8
+	beq	.L1659
+	ldr	r3, .L1670+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1660
+	ldr	r1, .L1670+16
+	movw	r2, #1550
+	ldr	r0, .L1670+20
+	bl	printf
+	ldr	r0, .L1670+24
+	ldr	r1, .L1670+28
+	bl	printf
+.L1660:
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #12]
+	cbz	r7, .L1661
+	orr	r3, r3, #-2147483648
+	str	r3, [sp, #12]
+.L1661:
+	movs	r2, #1
+	ldr	r0, [r5, #16]
+	add	r1, sp, #12
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #12]
+	adds	r3, r0, #1
+	beq	.L1662
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, [r6, #0]
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r8, r0
+	cbnz	r2, .L1663
+	ldr	r0, .L1670+32
+	mov	r1, r8
+	bl	printf
+.L1663:
+	mov	r0, r8
+	bl	decrement_vpc_count
+.L1662:
+	add	sl, sl, #1
+	adds	r5, r5, #36
+.L1656:
+	ldr	r3, [sp, #4]
+	cmp	sl, r3
+	bne	.L1669
+	ldr	r3, .L1670+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1654
+	ldr	r1, .L1670+16
+	movw	r2, #1567
+	ldr	r0, .L1670+20
+	bl	printf
+	ldr	r0, .L1670+24
+	ldr	r1, .L1670+28
+	bl	printf
+.L1654:
+	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
 .L1671:
-	cmp	r1, r4
-	blt	.L1673
-	mov	r3, lr
-	b	.L1674
-.L1676:
-	ldrh	r2, [r7, #-2]
+	.align	2
+.L1670:
+	.word	.LANCHOR7
+	.word	.LANCHOR101
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.word	.LANCHOR223
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC39
+	.word	.LANCHOR144
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.thumb
+	.thumb_func
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L1674
+	ldr	r0, [r4, #0]
+	cbz	r0, .L1673
+	ldr	r3, .L1674+4
 	movs	r1, #1
-	ldr	r0, .L1683
-	orr	r2, r4, r2, lsl #10
-	str	r2, [r6, #4]
-	mov	r2, r1
-	str	ip, [sp, #0]
-	bl	FlashReadPages
-	ldr	r2, [r6, #0]
-	ldr	ip, [sp, #0]
-	adds	r2, r2, #1
-	beq	.L1675
-	ldrh	r2, [r5, #8]
-	cmp	r2, fp
-	bcs	.L1675
-	ldrh	r1, [sl, #4]
-	ldrh	r0, [r5, #0]
-	cmp	r0, r1
-	itt	eq
-	ldreq	r1, [r6, #4]
-	streq	r1, [r8, r2, lsl #2]
+	movs	r2, #0
+	ldr	r3, [r3, #0]
+	bl	FtlProgPages
+	movs	r3, #0
+	str	r3, [r4, #0]
+.L1673:
+	movs	r0, #0
+	pop	{r4, pc}
 .L1675:
-	adds	r4, r4, #1
-	b	.L1682
-.L1681:
-	mov	ip, r8
-	movs	r4, #0
-	mov	r8, r3
-.L1682:
-	ldr	r1, .L1683+12
-	ldrh	r2, [r1, #0]
-	cmp	r4, r2
-	blt	.L1676
-	mov	r3, r8
-	mov	r8, ip
+	.align	2
 .L1674:
-	add	r8, r8, #1
-.L1664:
-	ldr	r2, [sp, #4]
-	uxth	r1, r8
-	cmp	r8, r2
-	blt	.L1677
-	mov	r4, sl
-.L1669:
-	mov	r0, r4
-	bl	ftl_free_no_use_map_blk
-	ldr	r3, .L1683+12
-	ldrh	r2, [r4, #2]
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1678
-	mov	r0, r4
-	bl	ftl_map_blk_alloc_new_blk
+	.word	.LANCHOR137
+	.word	.LANCHOR224
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.thumb
+	.thumb_func
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1678
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1677
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1677:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1679:
+	.align	2
 .L1678:
+	.word	.LANCHOR94
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
+	.align	1
+	.global	FtlDeInit
+	.thumb
+	.thumb_func
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1682
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L1681
+	bl	FtlSysFlush
+.L1681:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1683:
+	.align	2
+.L1682:
+	.word	.LANCHOR225
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.thumb
+	.thumb_func
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	rk_nand_de_init
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	rk_nand_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1703
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1703+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1699
+	ldr	r0, .L1703+8
+	movw	r3, #65535
+	ldrh	r4, [r0, #0]
+	cmp	r4, r3
+	beq	.L1687
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #4]
+	adds	r0, r0, #1
+	beq	.L1687
+	ldr	r3, .L1703+12
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	cmp	r2, #4
+	bls	.L1688
+	subs	r2, r2, #5
+	movs	r0, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L1688:
+	ldr	r3, .L1703+16
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1689
+	ldr	r3, .L1703+20
+	ldr	r0, [sp, #4]
+	ldr	r2, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r2, r2, #1
+	str	r2, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L1689:
+	ldr	r3, .L1703+16
+	movs	r2, #0
+	movs	r4, #1
+	str	r2, [r3, #0]
+	b	.L1686
+.L1687:
+	ldr	r5, .L1703+8
+	movs	r4, #0
+	ldr	r3, .L1703+16
+	ldrh	r2, [r5, #0]
+	str	r4, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1686
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1703+24
+	ldr	r1, .L1703
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r1, #0]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1690
+	ldr	r1, .L1703+28
+	movs	r2, #163
+	ldr	r0, .L1703+32
+	bl	printf
+	ldr	r0, .L1703+36
+	ldr	r1, .L1703+40
+	bl	printf
+.L1690:
+	ldr	r3, .L1703+8
+	movs	r5, #0
+	ldr	r2, .L1703+44
+	ldr	r4, .L1703
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r4, #0]
+	ldrb	r0, [r3, #7]	@ zero_extendqisi2
+	muls	r0, r4, r0
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldr	r1, .L1703+48
+	ldr	r2, .L1703+24
+	ldr	fp, .L1703+80
+	ldr	r0, [r1, #0]
+	mov	sl, r2
+	ldrh	r4, [r2, #0]
+	ldr	r8, .L1703+84
+	adds	r0, r4, r0
+	str	r0, [r1, #0]
+	b	.L1691
+.L1695:
+	ldr	r7, [fp, #0]
+	movs	r6, #12
+	muls	r6, r5, r6
+	ldr	r3, [r8, #0]
+	adds	r4, r7, r6
+	ldr	r2, [r4, #8]
+	cmp	r2, r3
+	bcc	.L1692
+	ldr	r1, .L1703+28
+	movs	r2, #168
+	ldr	r0, .L1703+32
+	bl	printf
+	ldr	r0, .L1703+36
+	ldr	r1, .L1703+40
+	bl	printf
+.L1692:
+	movs	r2, #0
+	ldr	r0, [r4, #8]
+	add	r1, sp, #4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	ldr	r3, [r7, r6]
+	cmp	r0, r3
+	bne	.L1693
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	adds	r1, r4, #4
+	movs	r2, #1
+	mov	r6, r0
+	ldr	r0, [r4, #8]
+	bl	log2phys
+	mov	r0, r6
+	b	.L1702
+.L1693:
+	ldr	r3, [r4, #4]
+	cmp	r0, r3
+	beq	.L1694
+	ldr	r3, .L1703+8
+	ldrh	r0, [r3, #0]
+.L1702:
+	bl	decrement_vpc_count
+.L1694:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1691:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L1695
+	movw	r0, #65535
+	ldr	r4, .L1703+8
+	bl	decrement_vpc_count
+	ldr	r3, .L1703+52
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1696
+	ldr	r0, .L1703+56
+	ldrh	r1, [r4, #0]
+	bl	printf
+.L1696:
+	ldr	r3, .L1703+44
+	ldrh	r0, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1697
+	bl	INSERT_DATA_LIST
+	b	.L1698
+.L1697:
+	bl	INSERT_FREE_LIST
+.L1698:
+	ldr	r3, .L1703+8
+	movw	r5, #65535
+	movs	r4, #0
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L1703+24
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1703+60
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L1703+64
+	ldr	r2, .L1703+68
+	movs	r1, #3
+	ldrh	r3, [r3, #0]
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	cmp	r3, r2, lsr #2
+	ble	.L1686
+	ldr	r3, .L1703+72
+	movs	r2, #20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L1703+76
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1686
+.L1699:
+	movs	r4, #0
+.L1686:
 	mov	r0, r4
-	bl	ftl_map_blk_gc
-	mov	r0, r4
-	bl	ftl_map_blk_gc
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1704:
+	.align	2
+.L1703:
+	.word	.LANCHOR68
+	.word	.LANCHOR94
+	.word	.LANCHOR111
+	.word	.LANCHOR96
+	.word	.LANCHOR140
+	.word	.LANCHOR144
+	.word	.LANCHOR147
+	.word	.LANCHOR226
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR101
+	.word	.LANCHOR158
+	.word	.LANCHOR7
+	.word	.LC40
+	.word	.LANCHOR145
+	.word	.LANCHOR106
+	.word	.LANCHOR201
+	.word	.LANCHOR202
+	.word	.LANCHOR173
+	.word	.LANCHOR148
+	.word	.LANCHOR88
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.thumb
+	.thumb_func
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L1714
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1714+4
+	cbz	r2, .L1706
+	ldr	r2, [r3, #0]
+	lsls	r2, r2, #31
+	bpl	.L1706
+	ldr	r2, .L1714+8
+	ldrh	r2, [r2, #4]
+	cmp	r2, #0
+	bne	.L1711
+.L1706:
+	ldr	r4, .L1714+12
+	movs	r2, #0
+	ldr	r1, [r3, #0]
+	mov	r3, r2
+	movs	r5, #0
+	ldr	r7, .L1714+4
+	ldr	r0, [r4, #0]
+	movs	r6, #36
+	bl	FlashProgPages
+	b	.L1708
+.L1710:
+	mul	r3, r6, r5
+	ldr	r1, [r4, #0]
+	adds	r2, r1, r3
+	ldr	r1, [r1, r3]
+	adds	r0, r1, #1
+	bne	.L1709
+	ldr	r3, .L1714+8
+	movs	r5, #0
+	ldr	r0, .L1714+16
+	ldrh	r4, [r3, #0]
+	ldr	r0, [r0, #0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L1714+20
+	ldr	r0, [r2, #4]
+	ldr	r1, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r1, r1, #1
+	str	r1, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+	b	.L1713
+.L1709:
+	ldr	r3, [r2, #12]
+	adds	r5, r5, #1
+	ldr	r1, [r2, #4]
+	uxth	r5, r5
+	ldr	r0, [r3, #12]
+	ldr	r2, [r3, #8]
+	bl	FtlGcUpdatePage
+.L1708:
+	ldr	r1, [r7, #0]
+	cmp	r5, r1
+	bcc	.L1710
+	ldr	r3, .L1714+12
+	ldr	r0, [r3, #0]
+	bl	FtlGcBufFree
+	ldr	r3, .L1714+4
 	movs	r0, #0
-	add	sp, sp, #16
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1684:
+	str	r0, [r3, #0]
+	ldr	r3, .L1714+8
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L1707
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.L1713:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1711:
+	movs	r0, #0
+.L1707:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1715:
 	.align	2
-.L1683:
-	.word	.LANCHOR197
-	.word	.LANCHOR96
-	.word	.LANCHOR180
-	.word	.LANCHOR69
-	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
-	.section	.text.FtlLoadMapInfo,"ax",%progbits
+.L1714:
+	.word	.LANCHOR7
+	.word	.LANCHOR131
+	.word	.LANCHOR111
+	.word	.LANCHOR178
+	.word	.LANCHOR101
+	.word	.LANCHOR144
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
 	.align	1
-	.global	FtlLoadMapInfo
+	.global	Ftl_get_new_temp_ppa
 	.thumb
 	.thumb_func
-	.type	FtlLoadMapInfo, %function
-FtlLoadMapInfo:
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	bl	FtlL2PDataInit
-	ldr	r0, .L1686
-	bl	FtlMapTblRecovery
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r5, .L1719
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1717
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1718
+.L1717:
+	bl	FtlCacheWriteBack
 	movs	r0, #0
-	pop	{r3, pc}
-.L1687:
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L1719
+	movs	r4, #0
+	strb	r4, [r5, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L1719+4
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1719+8
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	mov	r0, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1718:
+	ldr	r0, .L1719
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L1720:
 	.align	2
-.L1686:
-	.word	.LANCHOR120
-	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
-	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+.L1719:
+	.word	.LANCHOR111
+	.word	.LANCHOR145
+	.word	.LANCHOR147
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
 	.align	1
-	.global	FtlLoadVonderInfo
+	.global	FtlGcPageRecovery
 	.thumb
 	.thumb_func
-	.type	FtlLoadVonderInfo, %function
-FtlLoadVonderInfo:
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r3, lr}
-	ldr	r3, .L1689
-	ldr	r0, .L1689+4
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #10]	@ movhi
-	movw	r3, #61574
-	strh	r3, [r0, #4]	@ movhi
-	ldr	r3, .L1689+8
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #8]	@ movhi
-	ldr	r3, .L1689+12
-	ldrh	r3, [r3, #0]
-	strh	r3, [r0, #6]	@ movhi
-	ldr	r3, .L1689+16
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #12]
-	ldr	r3, .L1689+20
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #16]
-	ldr	r3, .L1689+24
-	ldr	r3, [r3, #0]
-	str	r3, [r0, #20]
-	ldr	r3, .L1689+28
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L1723
+	ldr	r5, .L1723+4
+	ldrh	r1, [r4, #0]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4, #0]
+	cmp	r2, r3
+	bcc	.L1721
+	ldr	r0, .L1723+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L1723+12
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1721:
+	pop	{r3, r4, r5, pc}
+.L1724:
+	.align	2
+.L1723:
+	.word	.LANCHOR68
+	.word	.LANCHOR111
+	.word	.LANCHOR122
+	.word	.LANCHOR140
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.thumb
+	.thumb_func
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1734
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r4, r2
 	ldr	r3, [r3, #0]
-	str	r3, [r0, #24]
-	bl	FtlMapTblRecovery
+	adds	r2, r2, r1
+	mov	r6, r1
+	cmp	r2, r3
+	bhi	.L1731
+	cmp	r4, #31
+	bls	.L1732
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1734+4
+	mov	r0, r6
+	ldrh	r7, [r3, #0]
+	mov	r1, r7
+	bl	__aeabi_uidiv
+	mls	r6, r0, r7, r6
+	mov	r5, r0
+	uxth	r6, r6
+	cbz	r6, .L1727
+	subs	r6, r7, r6
+	adds	r5, r0, #1
+	cmp	r6, r4
+	it	cs
+	movcs	r6, r4
+	uxth	r6, r6
+	subs	r4, r4, r6
+.L1727:
+	mov	r3, #-1
+	ldr	r8, .L1734+4
+	str	r3, [sp, #4]
+	ldr	r7, .L1734+8
+	ldr	r6, .L1734+12
+	b	.L1728
+.L1730:
+	movs	r2, #0
+	mov	r0, r5
+	mov	r1, sp
+	bl	log2phys
+	ldr	r3, [sp, #0]
+	adds	r3, r3, #1
+	beq	.L1729
+	ldr	r3, [r7, #0]
+	add	r1, sp, #4
+	movs	r2, #1
+	mov	r0, r5
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	str	r3, [r6, #0]
+	bl	log2phys
+	ldr	r0, [sp, #0]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1729:
+	ldrh	r3, [r8, #0]
+	adds	r5, r5, #1
+	subs	r4, r4, r3
+.L1728:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcs	.L1730
+	ldr	r3, .L1734+8
+	mov	r4, #0
+	ldr	r2, [r3, #0]
+	cmp	r2, #32
+	bls	.L1733
+	str	r4, [r3, #0]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1733
+.L1731:
+	mov	r0, #-1
+	b	.L1726
+.L1732:
 	movs	r0, #0
-	pop	{r3, pc}
-.L1690:
+	b	.L1726
+.L1733:
+	mov	r0, r4
+.L1726:
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L1735:
 	.align	2
-.L1689:
-	.word	.LANCHOR77
-	.word	.LANCHOR213
-	.word	.LANCHOR85
-	.word	.LANCHOR78
-	.word	.LANCHOR86
-	.word	.LANCHOR185
-	.word	.LANCHOR184
-	.word	.LANCHOR186
-	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+.L1734:
+	.word	.LANCHOR84
+	.word	.LANCHOR71
+	.word	.LANCHOR227
+	.word	.LANCHOR160
+	.size	ftl_discard, .-ftl_discard
 	.section	.text.FtlRecoverySuperblock,"ax",%progbits
 	.align	1
 	.global	FtlRecoverySuperblock
@@ -15226,106 +15714,106 @@ FtlLoadVonderInfo:
 	.thumb_func
 	.type	FtlRecoverySuperblock, %function
 FtlRecoverySuperblock:
-	@ args = 0, pretend = 0, frame = 72
+	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
 	ldrh	r2, [r0, #0]
 	movw	r3, #65535
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	cmp	r2, r3
-	sub	sp, sp, #72
+	sub	sp, sp, #64
 	mov	r4, r0
-	beq	.L1692
+	beq	.L1737
 	ldrh	r5, [r0, #2]
-	ldr	r2, .L1784
-	str	r5, [sp, #24]
+	ldr	r2, .L1829
+	str	r5, [sp, #20]
 	ldrb	r5, [r0, #6]	@ zero_extendqisi2
 	ldrh	r2, [r2, #0]
-	str	r5, [sp, #36]
-	ldr	r5, [sp, #24]
+	str	r5, [sp, #28]
+	ldr	r5, [sp, #20]
 	cmp	r2, r5
 	mov	r5, #0
-	bne	.L1693
+	bne	.L1738
 	mov	r3, r5	@ movhi
 	strh	r5, [r0, #4]	@ movhi
-	b	.L1781
-.L1693:
+	b	.L1826
+.L1738:
 	ldrh	r0, [r0, #16]
-	b	.L1694
-.L1695:
+	b	.L1739
+.L1740:
 	adds	r5, r5, #1
 	uxth	r5, r5
 	add	r2, r5, #8
 	ldrh	r0, [r4, r2, lsl #1]
-.L1694:
+.L1739:
 	cmp	r0, r3
-	beq	.L1695
+	beq	.L1740
 	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	cmp	r1, #1
-	bne	.L1696
+	bne	.L1741
 	bl	FtlGetLastWrittenPage
-	adds	r3, r0, #1
+	adds	r2, r0, #1
 	mov	r6, r0
-	beq	.L1697
-	ldr	r3, .L1784+4
+	beq	.L1742
+	ldr	r3, .L1829+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1776
-	ldr	r3, .L1784+8
+	cbnz	r3, .L1821
+	ldr	r3, .L1829+8
 	ldrh	r7, [r3, r0, lsl #1]
-	b	.L1766
-.L1696:
+	b	.L1811
+.L1741:
 	movs	r1, #0
 	bl	FtlGetLastWrittenPage
+	adds	r3, r0, #1
 	mov	r6, r0
-	adds	r0, r0, #1
-	beq	.L1697
-.L1776:
+	beq	.L1742
+.L1821:
 	mov	r7, r6
-.L1766:
-	ldr	r3, .L1784+12
+.L1811:
+	ldr	r3, .L1829+12
 	movs	r5, #0
-	str	r4, [sp, #48]
+	str	r4, [sp, #44]
 	mov	r2, r4
 	ldrh	fp, [r3, #0]
-	ldr	r3, .L1784+16
+	ldr	r3, .L1829+16
 	ldr	sl, [r3, #0]
-	ldr	r3, .L1784+20
+	ldr	r3, .L1829+20
 	ldr	r8, [r3, #0]
-	ldr	r3, .L1784+24
+	ldr	r3, .L1829+24
 	ldrh	ip, [r3, #0]
 	mov	r3, r5
-	b	.L1699
-.L1697:
-	ldr	r3, [sp, #24]
-	cbz	r3, .L1700
-	ldr	r1, .L1784+28
-	movw	r2, #1748
-	ldr	r0, .L1784+32
+	b	.L1744
+.L1742:
+	ldr	r3, [sp, #20]
+	cbz	r3, .L1745
+	ldr	r1, .L1829+28
+	movw	r2, #1894
+	ldr	r0, .L1829+32
 	bl	printf
-	ldr	r0, .L1784+36
-	ldr	r1, .L1784+40
+	ldr	r0, .L1829+36
+	ldr	r1, .L1829+40
 	bl	printf
-.L1700:
-	ldr	r3, [sp, #36]
-	cbz	r3, .L1701
+.L1745:
+	ldr	r3, [sp, #28]
+	cbz	r3, .L1746
 	cmp	r3, r5
-	beq	.L1701
-	ldr	r1, .L1784+28
-	movw	r2, #1749
-	ldr	r0, .L1784+32
+	beq	.L1746
+	ldr	r1, .L1829+28
+	movw	r2, #1895
+	ldr	r0, .L1829+32
 	bl	printf
-	ldr	r0, .L1784+36
-	ldr	r1, .L1784+40
+	ldr	r0, .L1829+36
+	ldr	r1, .L1829+40
 	bl	printf
-.L1701:
+.L1746:
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
-	b	.L1692
-.L1703:
+	b	.L1737
+.L1748:
 	ldrh	r0, [r2, #16]
 	movw	lr, #65535
 	cmp	r0, lr
-	beq	.L1702
+	beq	.L1747
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
 	mla	r1, lr, r5, sl
@@ -15338,556 +15826,565 @@ FtlRecoverySuperblock:
 	bic	r0, r0, #3
 	add	r0, r8, r0
 	str	r0, [r1, #12]
-.L1702:
+.L1747:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1699:
+.L1744:
 	cmp	r3, fp
-	bne	.L1703
+	bne	.L1748
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	bne	.L1768
-	ldr	r3, .L1784+4
+	bne	.L1813
+	ldr	r3, .L1829+4
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	adds	r3, r3, #0
 	it	ne
 	movne	r3, #1
-	b	.L1777
-.L1768:
+	b	.L1822
+.L1813:
 	movs	r3, #0
-.L1777:
-	ldr	r8, .L1784+16
+.L1822:
+	ldr	r8, .L1829+16
 	mov	r1, r5
-	str	r3, [sp, #32]
-	mov	fp, r7
-	ldr	r2, [sp, #32]
+	str	r3, [sp, #24]
+	mov	fp, #0
+	ldr	r2, [sp, #24]
+	mov	sl, fp
 	ldr	r0, [r8, #0]
 	bl	FlashReadPages
-	ldr	r2, .L1784+44
-	ldr	sl, [r8, #0]
-	uxth	ip, r7
-	movw	r8, #65535
-	str	r8, [sp, #16]
-	ldr	r3, [r2, #0]
-	mov	r8, #0
-	str	r3, [sp, #20]
-	mov	r3, r6
-	mov	r6, sl
-	mov	sl, ip
-	b	.L1705
-.L1710:
-	ldr	r1, [r6, #0]
-	cbnz	r1, .L1706
-	ldr	ip, [r6, #12]
-	ldr	r7, [ip, #4]
-	adds	r1, r7, #1
-	beq	.L1707
-	ldr	r1, [r2, #0]
-	mov	r0, r7
-	str	r2, [sp, #12]
-	str	r3, [sp, #4]
+	ldr	r3, .L1829+44
+	movw	ip, #65535
 	str	ip, [sp, #8]
+	ldr	r2, [r3, #0]
+	str	r2, [sp, #12]
+	uxth	r2, r7
+	str	r2, [sp, #16]
+	b	.L1750
+.L1755:
+	ldr	r3, .L1829+16
+	ldr	r2, [r3, #0]
+	add	r3, r2, fp
+	ldr	r2, [r2, fp]
+	cbnz	r2, .L1751
+	ldr	r3, [r3, #12]
+	ldr	r8, [r3, #4]
+	cmp	r8, #-1
+	beq	.L1752
+	ldr	r2, .L1829+44
+	mov	r0, r8
+	ldr	r1, [r2, #0]
+	str	r3, [sp, #0]
 	bl	ftl_cmp_data_ver
-	ldr	r2, [sp, #12]
-	ldr	r3, [sp, #4]
-	ldr	ip, [sp, #8]
-	cbz	r0, .L1707
-	adds	r7, r7, #1
-	str	r7, [r2, #0]
-.L1707:
-	ldr	r1, [ip, #0]
-	adds	r1, r1, #1
-	bne	.L1708
-	uxth	r6, r3
-	ldr	r3, .L1784+16
+	ldr	r3, [sp, #0]
+	cbz	r0, .L1752
+	ldr	r0, .L1829+44
+	add	r2, r8, #1
+	str	r2, [r0, #0]
+.L1752:
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	bne	.L1753
+	ldr	r3, .L1829+16
 	movs	r2, #36
-	mov	r7, fp
+	uxth	r6, r6
 	ldr	r3, [r3, #0]
-	mla	r3, r2, r8, r3
-	b	.L1778
-.L1706:
-	str	sl, [sp, #16]
-.L1708:
-	add	r8, r8, #1
-	adds	r6, r6, #36
-	uxth	r8, r8
-.L1705:
-	cmp	r8, r5
-	bne	.L1710
-	adds	r6, r3, #1
-	ldr	r3, .L1784+16
-	mov	r7, fp
+	mla	r3, r2, sl, r3
+	b	.L1823
+.L1751:
+	ldr	r1, [r3, #4]
+	ldr	r0, .L1829+48
+	bl	printf
+	ldr	r2, [sp, #16]
+	ldrh	r3, [r4, #0]
+	ldr	r0, .L1829+52
+	str	r2, [sp, #8]
+	strh	r3, [r0, #0]	@ movhi
+.L1753:
+	add	sl, sl, #1
+	add	fp, fp, #36
+	uxth	sl, sl
+.L1750:
+	cmp	sl, r5
+	bne	.L1755
+	ldr	r3, .L1829+16
+	adds	r6, r6, #1
 	uxth	r6, r6
 	ldr	r3, [r3, #0]
-.L1778:
+.L1823:
 	ldr	r0, [r3, #4]
 	ubfx	r0, r0, #10, #16
 	bl	P2V_plane
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	cmp	r3, #1
-	str	r0, [sp, #28]
-	bne	.L1711
-	ldr	r2, .L1784+4
+	str	r0, [sp, #16]
+	bne	.L1756
+	ldr	r2, .L1829+4
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L1711
-	ldr	r2, .L1784+8
+	cbnz	r2, .L1756
+	ldr	r2, .L1829+8
 	ldrh	r6, [r2, r6, lsl #1]
-.L1711:
-	ldr	r2, .L1784
+.L1756:
+	ldr	r2, .L1829
 	ldrh	r2, [r2, #0]
 	cmp	r2, r6
-	bne	.L1712
+	bne	.L1757
 	movs	r2, #0
 	strh	r6, [r4, #2]	@ movhi
 	strb	r2, [r4, #6]
 	strh	r2, [r4, #4]	@ movhi
-.L1712:
-	ldr	r5, [sp, #24]
+.L1757:
+	ldr	r5, [sp, #20]
 	cmp	r6, r5
-	bne	.L1713
-	ldr	r8, [sp, #28]
-	ldr	r5, [sp, #36]
+	bne	.L1758
+	ldr	r8, [sp, #16]
+	ldr	r5, [sp, #28]
 	cmp	r8, r5
-	bne	.L1713
+	bne	.L1758
 	mov	r0, r4
 	mov	r1, r6
 	mov	r2, r8
-	b	.L1782
-.L1713:
-	ldr	r2, [sp, #20]
-	ldr	r8, [sp, #16]
+	b	.L1827
+.L1758:
+	ldr	r2, [sp, #12]
+	ldr	r8, [sp, #8]
 	subs	r5, r2, #1
 	movw	r2, #65535
 	cmp	r8, r2
-	bne	.L1714
+	bne	.L1759
 	cmp	r3, #0
-	bne	.L1715
-.L1714:
-	ldr	r2, .L1784+48
+	bne	.L1760
+.L1759:
+	ldr	r2, .L1829+56
 	uxth	r3, r7
-	ldr	r0, [sp, #24]
+	ldr	r0, [sp, #20]
 	ldr	r1, [r2, #0]
 	adds	r1, r1, #1
 	it	eq
 	streq	r5, [r2, #0]
 	ldr	r2, [r2, #0]
-	str	r2, [sp, #16]
+	str	r2, [sp, #8]
 	adds	r2, r0, #7
 	cmp	r3, r2
-	ble	.L1769
+	ble	.L1814
 	subs	r7, r3, #7
 	uxth	r7, r7
-	b	.L1717
-.L1769:
-	ldr	r7, [sp, #24]
-.L1717:
+	b	.L1762
+.L1814:
+	ldr	r7, [sp, #20]
+.L1762:
 	mov	fp, #-1
 	mov	r8, r3
 	mov	sl, fp
 	mov	r3, r6
 	mov	r6, r5
-	b	.L1718
-.L1720:
+	b	.L1763
+.L1765:
 	ldrh	r0, [r1, #16]
 	movw	r3, #65535
 	cmp	r0, r3
-	beq	.L1719
-	ldr	r3, [sp, #20]
+	beq	.L1764
+	ldr	r3, [sp, #12]
 	mov	lr, #36
 	orr	r0, r7, r0, lsl #10
 	mla	ip, lr, r5, r3
 	adds	r5, r5, #1
 	uxth	r5, r5
 	str	r0, [ip, #4]
-.L1719:
+.L1764:
 	adds	r2, r2, #1
 	adds	r1, r1, #2
 	uxth	r2, r2
-.L1731:
-	ldr	r0, [sp, #44]
+.L1776:
+	ldr	r0, [sp, #36]
 	cmp	r2, r0
-	bne	.L1720
-	ldr	ip, .L1784+16
+	bne	.L1765
+	ldr	ip, .L1829+16
 	mov	r1, r5
-	ldr	r3, [sp, #40]
-	ldr	r2, [sp, #32]
+	ldr	r3, [sp, #32]
+	ldr	r2, [sp, #24]
 	ldr	r0, [ip, #0]
-	str	r3, [sp, #4]
-	str	ip, [sp, #8]
+	stmia	sp, {r3, ip}
 	bl	FlashReadPages
-	ldr	r2, .L1784+4
+	ldr	r2, .L1829+4
 	movs	r0, #0
-	ldr	ip, [sp, #8]
-	ldr	r3, [sp, #4]
+	ldr	ip, [sp, #4]
+	ldr	r3, [sp, #0]
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
 	ldr	r1, [ip, #0]
 	mov	ip, r3
-	str	r5, [sp, #40]
-	str	r2, [sp, #20]
-	ldr	r2, .L1784+48
+	str	r5, [sp, #32]
+	str	r2, [sp, #12]
+	ldr	r2, .L1829+56
 	ldr	r2, [r2, #0]
-	b	.L1721
-.L1785:
+	b	.L1766
+.L1830:
 	.align	2
-.L1784:
+.L1829:
 	.word	.LANCHOR68
 	.word	.LANCHOR7
 	.word	.LANCHOR8
 	.word	.LANCHOR53
-	.word	.LANCHOR173
-	.word	.LANCHOR130
+	.word	.LANCHOR177
+	.word	.LANCHOR133
 	.word	.LANCHOR74
-	.word	.LANCHOR223
+	.word	.LANCHOR228
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR154
-	.word	.LANCHOR138
-.L1729:
+	.word	.LANCHOR157
+	.word	.LC41
+	.word	.LANCHOR229
+	.word	.LANCHOR141
+.L1774:
 	ldr	r3, [r1, #0]
-	cbnz	r3, .L1722
+	cbnz	r3, .L1767
 	ldr	r3, [r1, #12]
 	movw	r5, #65535
 	ldrh	lr, [r3, #0]
 	cmp	lr, r5
-	beq	.L1771
+	beq	.L1816
 	ldr	r3, [r3, #4]
 	adds	r5, r3, #1
-	beq	.L1771
+	beq	.L1816
 	cmp	fp, #-1
-	bne	.L1723
-	ldr	r5, .L1786
+	bne	.L1768
+	ldr	r5, .L1831
 	ldrh	lr, [r5, r7, lsl #1]
 	movw	r5, #65535
 	cmp	lr, r5
-	bne	.L1724
-	ldr	r5, [sp, #20]
-	cbz	r5, .L1723
-.L1724:
+	bne	.L1769
+	ldr	r5, [sp, #12]
+	cmp	r5, #0
+	beq	.L1768
+.L1769:
 	cmp	r2, r6
 	ite	ne
 	movne	fp, r2
 	moveq	fp, #-1
-	b	.L1723
-.L1722:
-	ldr	r3, .L1786+4
+	b	.L1768
+.L1767:
+	ldr	r1, .L1831+4
 	mov	r5, r6
-	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	ldrh	r0, [r4, #0]
 	mov	r6, ip
+	ldr	r3, .L1831+8
+	strh	r0, [r1, #0]	@ movhi
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
 	str	r2, [r3, #0]
 	cmp	r1, #0
-	bne	.L1715
-	ldr	r1, .L1786
+	bne	.L1760
+	ldr	r1, .L1831
 	ldrh	r0, [r1, r7, lsl #1]
 	movw	r1, #65535
 	cmp	r0, r1
-	bne	.L1725
+	bne	.L1770
 	cmp	fp, #-1
-	beq	.L1726
+	beq	.L1771
 	str	fp, [r3, #0]
-	b	.L1715
-.L1726:
-	ldr	r0, [sp, #16]
+	b	.L1760
+.L1771:
+	ldr	r0, [sp, #8]
 	cmp	r0, r5
-	beq	.L1783
+	beq	.L1828
 	str	r0, [r3, #0]
-	b	.L1715
-.L1725:
+	b	.L1760
+.L1770:
 	cmp	sl, r5
-	beq	.L1728
+	beq	.L1773
 	cmp	sl, #-1
-	beq	.L1715
+	beq	.L1760
 	str	sl, [r3, #0]
-	b	.L1715
-.L1728:
+	b	.L1760
+.L1773:
 	cmp	r2, r5
-	beq	.L1715
-.L1783:
+	beq	.L1760
+.L1828:
 	subs	r2, r2, #1
-	b	.L1779
-.L1771:
+	b	.L1824
+.L1816:
 	mov	r3, r2
 	mov	r2, sl
-.L1723:
+.L1768:
 	adds	r0, r0, #1
 	mov	sl, r2
 	adds	r1, r1, #36
 	mov	r2, r3
 	uxth	r0, r0
-.L1721:
-	ldr	r3, [sp, #40]
+.L1766:
+	ldr	r3, [sp, #32]
 	cmp	r0, r3
-	bne	.L1729
+	bne	.L1774
 	adds	r7, r7, #1
-	ldr	r1, .L1786+4
+	ldr	r1, .L1831+8
 	mov	r3, ip
 	uxth	r7, r7
 	str	r2, [r1, #0]
-.L1718:
+.L1763:
 	cmp	r7, r8
-	bhi	.L1730
-	ldr	r5, .L1786+8
+	bhi	.L1775
+	ldr	r5, .L1831+12
 	mov	r1, r4
-	ldr	r2, .L1786+12
-	str	r3, [sp, #40]
+	ldr	r2, .L1831+16
+	str	r3, [sp, #32]
 	ldrh	lr, [r5, #0]
 	movs	r5, #0
 	ldr	r2, [r2, #0]
-	str	lr, [sp, #44]
-	str	r2, [sp, #20]
+	str	lr, [sp, #36]
+	str	r2, [sp, #12]
 	mov	r2, r5
-	b	.L1731
-.L1730:
+	b	.L1776
+.L1775:
 	mov	r5, r6
 	mov	r6, r3
-	ldr	r3, .L1786+4
+	ldr	r3, .L1831+8
 	mov	r2, #-1
-.L1779:
+.L1824:
 	str	r2, [r3, #0]
-.L1715:
-	ldr	r3, .L1786+16
+.L1760:
+	ldr	r3, .L1831+20
 	movs	r2, #1
-	ldr	r0, .L1786+20
-	ldr	r7, .L1786+12
+	ldr	r0, .L1831+24
+	ldr	r7, .L1831+16
 	strh	r2, [r3, #0]	@ movhi
 	bl	FtlMapBlkWriteDumpData
-	ldr	sl, [sp, #24]
-	str	r6, [sp, #20]
-.L1732:
-	ldr	r3, .L1786+24
+	ldr	sl, [sp, #20]
+	str	r6, [sp, #12]
+.L1777:
+	ldr	r3, .L1831+28
 	movs	r6, #0
-	ldr	r0, .L1786+8
+	ldr	r0, .L1831+12
 	mov	r2, r4
 	ldr	lr, [r7, #0]
 	ldrb	fp, [r3, #0]	@ zero_extendqisi2
 	mov	r3, r6
 	ldrh	ip, [r0, #0]
-	b	.L1733
-.L1736:
+	b	.L1778
+.L1781:
 	ldrh	r0, [r2, #16]
 	movw	r1, #65535
 	cmp	r0, r1
-	beq	.L1734
+	beq	.L1779
 	mov	r8, #36
 	orr	r0, sl, r0, lsl #10
 	mla	r1, r8, r6, lr
 	str	r0, [r1, #4]
 	ldrb	r8, [r4, #8]	@ zero_extendqisi2
 	cmp	r8, #1
-	bne	.L1735
+	bne	.L1780
 	cmp	fp, #0
-	beq	.L1735
+	beq	.L1780
 	orr	r0, r0, #-2147483648
 	str	r0, [r1, #4]
-.L1735:
+.L1780:
 	adds	r6, r6, #1
 	uxth	r6, r6
-.L1734:
+.L1779:
 	adds	r3, r3, #1
 	adds	r2, r2, #2
 	uxth	r3, r3
-.L1733:
+.L1778:
 	cmp	r3, ip
-	bne	.L1736
+	bne	.L1781
 	ldr	r0, [r7, #0]
 	mov	r1, r6
-	ldr	r2, [sp, #32]
+	ldr	r2, [sp, #24]
 	mov	r8, #0
 	bl	FlashReadPages
 	movs	r3, #36
-	str	sl, [sp, #40]
+	str	sl, [sp, #32]
 	muls	r3, r6, r3
-	str	r3, [sp, #52]
-	b	.L1737
-.L1761:
+	str	r3, [sp, #40]
+	b	.L1782
+.L1806:
 	ldr	r3, [r7, #0]
 	add	sl, r3, r8
 	ldr	r6, [sl, #4]
 	ubfx	r0, r6, #10, #16
-	str	r6, [sp, #68]
+	str	r6, [sp, #60]
 	bl	P2V_plane
-	ldr	ip, [sp, #40]
-	ldr	r3, [sp, #24]
+	ldr	ip, [sp, #32]
+	ldr	r3, [sp, #20]
 	cmp	ip, r3
-	bcc	.L1738
-	bne	.L1739
-	ldr	r3, [sp, #36]
+	bcc	.L1783
+	bne	.L1784
+	ldr	r3, [sp, #28]
 	cmp	r0, r3
-	bcc	.L1738
-.L1739:
-	ldr	ip, [sp, #40]
-	ldr	r3, [sp, #20]
+	bcc	.L1783
+.L1784:
+	ldr	ip, [sp, #32]
+	ldr	r3, [sp, #12]
 	cmp	ip, r3
-	bne	.L1740
-	ldr	ip, [sp, #28]
+	bne	.L1785
+	ldr	ip, [sp, #16]
 	cmp	r0, ip
-	beq	.L1775
-.L1740:
+	beq	.L1820
+.L1785:
 	ldr	r3, [sl, #0]
 	adds	r3, r3, #1
-	beq	.L1742
+	beq	.L1787
 	ldr	r6, [sl, #12]
-	movw	lr, #61589
-	ldrh	r3, [r6, #0]
-	cmp	r3, lr
-	bne	.L1749
-.L1743:
+	movw	r3, #61589
+	ldrh	r2, [r6, #0]
+	cmp	r2, r3
+	bne	.L1794
+.L1788:
 	ldr	r5, [r6, #4]
 	adds	r3, r5, #1
-	beq	.L1744
-	ldr	sl, .L1786+28
+	beq	.L1789
+	ldr	sl, .L1831+32
 	mov	r0, r5
 	ldr	r1, [sl, #0]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1744
+	cbz	r0, .L1789
 	adds	r3, r5, #1
 	str	r3, [sl, #0]
-.L1744:
+.L1789:
 	ldr	sl, [r6, #8]
-	add	r1, sp, #64
+	add	r1, sp, #56
 	ldr	r3, [r6, #12]
 	movs	r2, #0
 	mov	r0, sl
-	str	r3, [sp, #60]
+	str	r3, [sp, #52]
 	bl	log2phys
-	ldr	r0, .L1786+4
+	ldr	r0, .L1831+8
 	ldr	r1, [r0, #0]
 	adds	r0, r1, #1
-	beq	.L1745
+	beq	.L1790
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
 	cmp	r0, #0
-	beq	.L1745
-	ldr	r3, [sp, #60]
+	beq	.L1790
+	ldr	r3, [sp, #52]
 	adds	r1, r3, #1
-	beq	.L1746
+	beq	.L1791
 	ldr	r0, [r7, #0]
 	movs	r2, #0
 	add	r0, r0, r8
 	ldr	r1, [r0, #12]
 	str	r3, [r0, #4]
-	str	r1, [sp, #16]
+	str	r1, [sp, #8]
 	movs	r1, #1
 	bl	FlashReadPages
-	ldr	r3, [sp, #16]
+	ldr	r3, [sp, #8]
 	ldr	r3, [r3, #4]
-	str	r3, [sp, #44]
+	str	r3, [sp, #36]
 	ldr	r3, [r7, #0]
 	add	fp, r3, r8
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	bne	.L1747
-	b	.L1748
-.L1746:
-	ldr	r3, [sp, #68]
-	ldr	r2, [sp, #64]
+	bne	.L1792
+	b	.L1793
+.L1791:
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	bne	.L1749
+	bne	.L1794
 	mov	r0, sl
-	add	r1, sp, #60
+	add	r1, sp, #52
 	movs	r2, #1
 	bl	log2phys
-.L1749:
+.L1794:
 	ldrh	r0, [r4, #0]
-	b	.L1780
-.L1747:
-	ldr	r3, [sp, #16]
+	b	.L1825
+.L1792:
+	ldr	r3, [sp, #8]
 	ldr	r6, [r3, #8]
 	cmp	r6, sl
-	bne	.L1748
-	ldr	r1, .L1786+4
+	bne	.L1793
+	ldr	r1, .L1831+8
 	ldr	r0, [r1, #0]
-	ldr	r1, [sp, #44]
+	ldr	r1, [sp, #36]
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1748
-	ldr	r3, [sp, #64]
-	ldr	r2, [sp, #68]
-	cmp	r3, r2
-	beq	.L1753
-.L1750:
+	cbz	r0, .L1793
+	ldr	r3, [sp, #56]
 	ldr	r2, [sp, #60]
 	cmp	r3, r2
-	beq	.L1748
+	beq	.L1798
+.L1795:
+	ldr	r2, [sp, #52]
+	cmp	r3, r2
+	beq	.L1793
 	adds	r2, r3, #1
-	beq	.L1751
+	beq	.L1796
 	ldr	r2, [fp, #12]
 	mov	r0, fp
 	str	r3, [fp, #4]
 	movs	r1, #1
-	str	r2, [sp, #16]
+	str	r2, [sp, #8]
 	movs	r2, #0
 	bl	FlashReadPages
-	b	.L1752
-.L1751:
+	b	.L1797
+.L1796:
 	str	r3, [fp, #0]
-.L1752:
+.L1797:
 	ldr	r3, [r7, #0]
 	ldr	r3, [r3, r8]
 	adds	r3, r3, #1
-	beq	.L1753
-	ldr	r3, [sp, #16]
-	ldr	r1, .L1786+4
+	beq	.L1798
+	ldr	r3, [sp, #8]
+	ldr	r1, .L1831+8
 	ldr	sl, [r3, #4]
 	ldr	r0, [r1, #0]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1753
-	ldr	r0, [sp, #44]
+	cbz	r0, .L1798
+	ldr	r0, [sp, #36]
 	mov	r1, sl
 	bl	ftl_cmp_data_ver
-	cbz	r0, .L1748
-.L1753:
+	cbz	r0, .L1793
+.L1798:
 	mov	r0, r6
-	ldr	r1, [sp, #60]
+	ldr	r1, [sp, #52]
 	bl	FtlReUsePrevPpa
-.L1748:
+.L1793:
 	ldrh	r0, [r4, #0]
 	mov	r3, #-1
-	str	r3, [sp, #60]
+	str	r3, [sp, #52]
 	bl	decrement_vpc_count
-	b	.L1755
-.L1787:
+	b	.L1800
+.L1832:
 	.align	2
-.L1786:
+.L1831:
 	.word	.LANCHOR9
-	.word	.LANCHOR138
+	.word	.LANCHOR229
+	.word	.LANCHOR141
 	.word	.LANCHOR53
-	.word	.LANCHOR173
-	.word	.LANCHOR224
-	.word	.LANCHOR120
+	.word	.LANCHOR177
+	.word	.LANCHOR230
+	.word	.LANCHOR122
 	.word	.LANCHOR7
-	.word	.LANCHOR154
-.L1745:
-	ldr	r3, [sp, #68]
-	ldr	r2, [sp, #64]
+	.word	.LANCHOR157
+.L1790:
+	ldr	r3, [sp, #60]
+	ldr	r2, [sp, #56]
 	cmp	r2, r3
-	beq	.L1755
+	beq	.L1800
 	movs	r2, #1
 	mov	r0, sl
-	add	r1, sp, #68
+	add	r1, sp, #60
 	bl	log2phys
-	ldr	fp, [sp, #64]
+	ldr	fp, [sp, #56]
 	cmp	fp, #-1
-	beq	.L1755
-	ldr	r3, [sp, #60]
+	beq	.L1800
+	ldr	r3, [sp, #52]
 	cmp	fp, r3
-	beq	.L1755
+	beq	.L1800
 	ubfx	r0, fp, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1788
+	ldr	r3, .L1833
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1756
-	ldr	r3, .L1788+4
+	beq	.L1801
+	ldr	r3, .L1833+4
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	beq	.L1756
-	ldr	r3, .L1788+8
+	beq	.L1801
+	ldr	r3, .L1833+8
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1755
-.L1756:
+	bne	.L1800
+.L1801:
 	ldr	r0, [r7, #0]
 	movs	r1, #1
 	movs	r2, #0
@@ -15898,150 +16395,160 @@ FtlRecoverySuperblock:
 	ldr	r1, [r6, #4]
 	ldr	r3, [r3, #0]
 	adds	r3, r3, #1
-	beq	.L1755
+	beq	.L1800
 	mov	r0, r5
 	bl	ftl_cmp_data_ver
-	cbnz	r0, .L1755
+	cbnz	r0, .L1800
 	mov	r0, sl
-	add	r1, sp, #64
+	add	r1, sp, #56
 	movs	r2, #1
 	bl	log2phys
-.L1755:
-	ldr	r0, [sp, #60]
+.L1800:
+	ldr	r0, [sp, #52]
 	adds	r3, r0, #1
-	beq	.L1738
+	beq	.L1783
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
-	ldr	r3, .L1788+12
+	ldr	r3, .L1833+12
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
 	mov	r6, r0
-	bhi	.L1757
-	ldr	r1, .L1788+16
-	movw	r2, #2027
-	ldr	r0, .L1788+20
+	bhi	.L1802
+	ldr	r1, .L1833+16
+	movw	r2, #2177
+	ldr	r0, .L1833+20
 	bl	printf
-	ldr	r0, .L1788+24
-	ldr	r1, .L1788+28
+	ldr	r0, .L1833+24
+	ldr	r1, .L1833+28
 	bl	printf
-.L1757:
-	ldr	r3, .L1788+32
+.L1802:
+	ldr	r3, .L1833+32
 	ldr	r3, [r3, #0]
 	ldrh	r3, [r3, r6, lsl #1]
-	cbz	r3, .L1758
+	cbz	r3, .L1803
 	mov	r0, r6
-.L1780:
+.L1825:
 	bl	decrement_vpc_count
-	b	.L1738
-.L1758:
+	b	.L1783
+.L1803:
 	mov	r1, r6
-	ldr	r0, .L1788+36
+	ldr	r0, .L1833+36
 	bl	printf
-	b	.L1738
-.L1742:
-	ldr	r2, .L1788+40
-	ldr	r3, [r2, #0]
+	b	.L1783
+.L1787:
+	ldrh	r3, [r4, #0]
+	mov	r1, r6
+	ldr	r2, .L1833+40
+	ldr	r0, .L1833+44
+	strh	r3, [r2, #0]	@ movhi
+	mov	r2, r5
+	bl	printf
+	ldr	r0, .L1833+48
+	ldr	r3, [r0, #0]
 	cmp	r3, #31
-	bhi	.L1759
-	ldr	r0, .L1788+44
-	str	r6, [r0, r3, lsl #2]
+	bhi	.L1804
+	ldr	r2, [sp, #60]
+	ldr	r1, .L1833+52
+	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
-	str	r3, [r2, #0]
-.L1759:
+	str	r3, [r0, #0]
+.L1804:
 	ldrh	r0, [r4, #0]
 	bl	decrement_vpc_count
-	ldr	r1, .L1788+48
-	ldr	r3, [r1, #0]
-	adds	r0, r3, #1
-	bne	.L1760
-	str	r5, [r1, #0]
-	b	.L1738
-.L1760:
+	ldr	r2, .L1833+56
+	ldr	r3, [r2, #0]
+	adds	r1, r3, #1
+	bne	.L1805
+	str	r5, [r2, #0]
+	b	.L1783
+.L1805:
 	cmp	r3, r5
 	itt	hi
-	ldrhi	r2, .L1788+48
-	strhi	r5, [r2, #0]
-.L1738:
+	ldrhi	r3, .L1833+56
+	strhi	r5, [r3, #0]
+.L1783:
 	add	r8, r8, #36
-.L1737:
-	ldr	r3, [sp, #52]
-	cmp	r8, r3
-	bne	.L1761
-	ldr	sl, [sp, #40]
+.L1782:
+	ldr	ip, [sp, #40]
+	cmp	r8, ip
+	bne	.L1806
+	ldr	sl, [sp, #32]
 	ldrb	r3, [r4, #8]	@ zero_extendqisi2
 	add	sl, sl, #1
 	cmp	r3, #1
 	uxth	sl, sl
-	bne	.L1762
-	ldr	r3, .L1788+52
+	bne	.L1807
+	ldr	r3, .L1833+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1762
-	ldr	r3, .L1788+56
+	cbz	r3, .L1807
+	ldr	r3, .L1833+64
 	ldrh	r3, [r3, #0]
 	cmp	r3, sl
-	bne	.L1762
-	ldr	r8, [sp, #20]
-	cmp	r8, sl
-	beq	.L1775
-.L1762:
-	ldr	r3, .L1788+60
+	bne	.L1807
+	ldr	r3, [sp, #12]
+	cmp	r3, sl
+	beq	.L1820
+.L1807:
+	ldr	r3, .L1833+68
 	ldrh	r3, [r3, #0]
 	cmp	sl, r3
-	bne	.L1732
-	ldr	r2, .L1788+64
+	bne	.L1777
+	ldr	r2, .L1833+72
 	movs	r3, #0
 	strh	sl, [r4, #2]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	ldrh	r1, [r2, #0]
 	movw	r2, #65535
-	ldr	r0, [sp, #48]
-	b	.L1763
-.L1765:
+	ldr	r0, [sp, #44]
+	b	.L1808
+.L1810:
 	adds	r0, r0, #2
 	ldrh	r5, [r0, #14]
 	cmp	r5, r2
-	beq	.L1764
-.L1781:
+	beq	.L1809
+.L1826:
 	strb	r3, [r4, #6]
-	b	.L1692
-.L1764:
+	b	.L1737
+.L1809:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1763:
+.L1808:
 	cmp	r3, r1
-	bne	.L1765
-	b	.L1692
-.L1775:
-.L1741:
-	ldr	r6, [sp, #20]
+	bne	.L1810
+	b	.L1737
+.L1820:
+.L1786:
+	ldr	r6, [sp, #12]
 	mov	r0, r4
-	ldr	r3, [sp, #28]
+	ldr	r5, [sp, #16]
 	mov	r1, r6
-	mov	r2, r3
+	mov	r2, r5
 	strh	r6, [r4, #2]	@ movhi
-	strb	r3, [r4, #6]
-.L1782:
+	strb	r5, [r4, #6]
+.L1827:
 	bl	ftl_sb_update_avl_pages
-.L1692:
+.L1737:
 	movs	r0, #0
-	add	sp, sp, #72
+	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1789:
+.L1834:
 	.align	2
-.L1788:
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+.L1833:
 	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR111
 	.word	.LANCHOR55
-	.word	.LANCHOR223
+	.word	.LANCHOR228
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR99
-	.word	.LC33
-	.word	.LANCHOR225
-	.word	.LANCHOR226
-	.word	.LANCHOR138
+	.word	.LANCHOR101
+	.word	.LC42
+	.word	.LANCHOR229
+	.word	.LC43
+	.word	.LANCHOR231
+	.word	.LANCHOR232
+	.word	.LANCHOR141
 	.word	.LANCHOR7
 	.word	.LANCHOR69
 	.word	.LANCHOR68
@@ -16058,13 +16565,13 @@ FtlPowerLostRecovery:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, lr}
 	movs	r4, #0
-	ldr	r3, .L1791
-	ldr	r5, .L1791+4
+	ldr	r3, .L1836
+	ldr	r5, .L1836+4
 	str	r4, [r3, #0]
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
 	mov	r0, r5
-	ldr	r5, .L1791+8
+	ldr	r5, .L1836+8
 	bl	FtlSlcSuperblockCheck
 	mov	r0, r5
 	bl	FtlRecoverySuperblock
@@ -16075,12 +16582,12 @@ FtlPowerLostRecovery:
 	bl	decrement_vpc_count
 	mov	r0, r4
 	pop	{r3, r4, r5, pc}
-.L1792:
+.L1837:
 	.align	2
-.L1791:
-	.word	.LANCHOR225
-	.word	.LANCHOR107
-	.word	.LANCHOR108
+.L1836:
+	.word	.LANCHOR231
+	.word	.LANCHOR109
+	.word	.LANCHOR110
 	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
 	.section	.text.FtlSysBlkInit,"ax",%progbits
 	.align	1
@@ -16091,23 +16598,25 @@ FtlPowerLostRecovery:
 FtlSysBlkInit:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1803
+	ldr	r3, .L1848
 	movs	r2, #0
-	push	{r4, lr}
+	push	{r4, r5, r6, lr}
+	movw	r4, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1803+4
+	ldr	r3, .L1848+4
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1848+8
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlScanSysBlk
-	ldr	r3, .L1803+8
-	ldrh	r2, [r3, #0]
-	movw	r3, #65535
-	cmp	r2, r3
-	beq	.L1799
+	ldr	r3, .L1848+12
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L1844
 	bl	FtlLoadSysInfo
 	mov	r4, r0
 	cmp	r0, #0
-	bne	.L1800
+	bne	.L1845
 	bl	FtlLoadMapInfo
 	bl	FtlLoadVonderInfo
 	bl	Ftl_load_ext_data
@@ -16117,105 +16626,94 @@ FtlSysBlkInit:
 	bl	FtlPowerLostRecovery
 	movs	r0, #1
 	bl	FtlUpdateVaildLpn
-	ldr	r3, .L1803+12
+	ldr	r3, .L1848+16
 	ldrh	r1, [r3, #0]
-	ldr	r3, .L1803+16
+	ldr	r3, .L1848+20
 	ldr	r2, [r3, #0]
 	mov	r3, r4
-	b	.L1795
-.L1797:
+	b	.L1840
+.L1842:
 	adds	r0, r2, r4
 	adds	r4, r4, #12
 	ldr	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L1796
+	blt	.L1841
 	adds	r3, r3, #1
-.L1795:
+.L1840:
 	cmp	r3, r1
-	blt	.L1797
-	b	.L1802
-.L1796:
-	ldr	r0, .L1803+20
+	blt	.L1842
+	b	.L1847
+.L1841:
+	ldr	r5, .L1848+24
+	movs	r6, #0
+	ldr	r4, .L1848+28
+	mov	r0, r5
 	bl	FtlSuperblockPowerLostFix
-	ldr	r0, .L1803+24
+	mov	r0, r4
 	bl	FtlSuperblockPowerLostFix
-	ldr	r0, .L1803+28
+	ldr	r3, .L1848+32
+	ldrh	r2, [r5, #0]
+	ldrh	r1, [r5, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r2, .L1848+36
+	ldrh	r0, [r4, #4]
+	strb	r6, [r5, #6]
+	ldrh	r1, [r2, #0]
+	strh	r6, [r5, #4]	@ movhi
+	strh	r1, [r5, #2]	@ movhi
+	ldrh	r1, [r4, #0]
+	ldrh	r5, [r3, r1, lsl #1]
+	subs	r0, r5, r0
+	strh	r0, [r3, r1, lsl #1]	@ movhi
+	ldrh	r3, [r2, #0]
+	ldr	r0, .L1848+40
+	strb	r6, [r4, #6]
+	strh	r3, [r4, #2]	@ movhi
+	strh	r6, [r4, #4]	@ movhi
 	bl	FtlMapBlkWriteDumpData
-	ldr	r0, .L1803+32
+	ldr	r0, .L1848+44
 	bl	FtlMapBlkWriteDumpData
-	ldr	r3, .L1803+36
+	ldr	r3, .L1848+48
 	ldrh	r2, [r3, #30]
 	adds	r2, r2, #1
 	strh	r2, [r3, #30]	@ movhi
 	bl	l2p_flush
 	bl	FtlVpcTblFlush
 	bl	FtlVpcTblFlush
-	movs	r0, #0
-	pop	{r4, pc}
-.L1799:
+	mov	r0, r6
+	pop	{r4, r5, r6, pc}
+.L1844:
 	mov	r0, #-1
-	pop	{r4, pc}
-.L1800:
+	pop	{r4, r5, r6, pc}
+.L1845:
 	mov	r0, #-1
-	pop	{r4, pc}
-.L1802:
-	ldr	r3, .L1803
+	pop	{r4, r5, r6, pc}
+.L1847:
+	ldr	r3, .L1848
 	ldrh	r0, [r3, #0]
 	cmp	r0, #0
-	bne	.L1796
-	pop	{r4, pc}
-.L1804:
+	bne	.L1841
+	pop	{r4, r5, r6, pc}
+.L1849:
 	.align	2
-.L1803:
-	.word	.LANCHOR224
+.L1848:
+	.word	.LANCHOR230
+	.word	.LANCHOR229
 	.word	.LANCHOR54
-	.word	.LANCHOR191
+	.word	.LANCHOR196
 	.word	.LANCHOR83
-	.word	.LANCHOR112
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR120
-	.word	.LANCHOR213
-	.word	.LANCHOR140
+	.word	.LANCHOR114
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR101
+	.word	.LANCHOR68
+	.word	.LANCHOR122
+	.word	.LANCHOR215
+	.word	.LANCHOR143
 	.size	FtlSysBlkInit, .-FtlSysBlkInit
-	.section	.text.FtlInit,"ax",%progbits
-	.align	1
-	.global	FtlInit
-	.thumb
-	.thumb_func
-	.type	FtlInit, %function
-FtlInit:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 0, uses_anonymous_args = 0
-	push	{r4, lr}
-	mov	r3, #-1
-	ldr	r4, .L1807
-	movs	r2, #0
-	str	r3, [r4, #0]
-	ldr	r3, .L1807+4
-	str	r2, [r3, #0]
-	bl	FtlConstantsInit
-	bl	FtlMemInit
-	bl	FtlVariablesInit
-	ldr	r3, .L1807+8
-	ldrh	r0, [r3, #0]
-	bl	FtlFreeSysBlkQueueInit
-	bl	FtlLoadBbt
-	cbnz	r0, .L1806
-	bl	FtlSysBlkInit
-	cbnz	r0, .L1806
-	movs	r3, #1
-	str	r3, [r4, #0]
-.L1806:
-	movs	r0, #0
-	pop	{r4, pc}
-.L1808:
-	.align	2
-.L1807:
-	.word	.LANCHOR222
-	.word	.LANCHOR227
-	.word	.LANCHOR54
-	.size	FtlInit, .-FtlInit
 	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
 	.align	1
 	.global	rk_ftl_garbage_collect
@@ -16225,201 +16723,205 @@ FtlInit:
 rk_ftl_garbage_collect:
 	@ args = 0, pretend = 0, frame = 32
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L1871
+	ldr	r3, .L1912
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	sub	sp, sp, #32
+	ldr	r2, [r3, #0]
+	cmp	r2, #0
+	bne	.L1901
+	ldr	r3, .L1912+4
 	ldr	r3, [r3, #0]
 	cmp	r3, #0
-	bne	.L1861
-	ldr	r2, .L1871+4
+	bne	.L1902
+	ldr	r2, .L1912+8
 	ldrh	r2, [r2, #0]
 	cmp	r2, #47
-	bls	.L1862
-	ldr	r3, .L1871+8
+	bls	.L1903
+	ldr	r3, .L1912+12
 	movw	r5, #65535
 	ldrh	r4, [r3, #0]
 	cmp	r4, r5
-	beq	.L1811
-	ldr	r1, .L1871+12
+	beq	.L1852
+	ldr	r1, .L1912+16
 	ldrh	r2, [r1, #0]
 	cmp	r2, r5
 	itt	eq
 	strheq	r4, [r1, #0]	@ movhi
 	strheq	r2, [r3, #0]	@ movhi
-.L1811:
+.L1852:
 	cmp	r0, #0
-	bne	.L1863
-	ldr	r3, .L1871+16
+	bne	.L1904
+	ldr	r3, .L1912+20
 	ldrh	r3, [r3, #0]
 	cmp	r3, #24
-	bhi	.L1864
-	ldr	r2, .L1871+20
+	bhi	.L1905
+	ldr	r2, .L1912+24
 	cmp	r3, #16
 	ldrh	r4, [r2, #0]
-	bls	.L1814
+	bls	.L1855
 	lsrs	r4, r4, #5
-	b	.L1813
-.L1814:
+	b	.L1854
+.L1855:
 	cmp	r3, #12
-	bls	.L1815
+	bls	.L1856
 	lsrs	r4, r4, #4
-	b	.L1813
-.L1815:
+	b	.L1854
+.L1856:
 	cmp	r3, #8
-	bls	.L1813
+	bls	.L1854
 	lsrs	r4, r4, #2
-	b	.L1813
-.L1864:
+	b	.L1854
+.L1905:
 	movs	r4, #1
-.L1813:
-	ldr	r2, .L1871+24
+.L1854:
+	ldr	r2, .L1912+28
 	ldrh	r1, [r2, #0]
 	cmp	r1, r3
 	mov	r1, r2
-	bcs	.L1817
-	ldr	r3, .L1871+28
+	bcs	.L1858
+	ldr	r3, .L1912+32
 	movw	r0, #65535
 	ldrh	r3, [r3, #0]
 	cmp	r3, r0
-	bne	.L1818
-	ldr	r0, .L1871+12
+	bne	.L1859
+	ldr	r0, .L1912+16
 	ldrh	r0, [r0, #0]
 	cmp	r0, r3
-	bne	.L1818
-	ldr	r3, .L1871+32
+	bne	.L1859
+	ldr	r3, .L1912+36
 	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1819
-	ldr	r3, .L1871+36
+	cbnz	r0, .L1860
+	ldr	r3, .L1912+40
 	movs	r1, #3
 	ldr	r3, [r3, #0]
 	muls	r1, r3, r1
-	ldr	r3, .L1871+40
+	ldr	r3, .L1912+44
 	ldr	r3, [r3, #0]
 	cmp	r3, r1, lsr #2
-	bcs	.L1820
-.L1819:
-	ldr	r3, .L1871+44
+	bcs	.L1861
+.L1860:
+	ldr	r3, .L1912+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r2, r3, r2
-	ldr	r3, .L1871+24
+	ldr	r3, .L1912+28
 	asrs	r2, r2, #2
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1821
-.L1820:
+	b	.L1862
+.L1861:
 	movs	r3, #18
 	strh	r3, [r2, #0]	@ movhi
-.L1821:
-	ldr	r3, .L1871+48
+.L1862:
+	ldr	r3, .L1912+52
 	movs	r2, #0
 	str	r2, [r3, #0]
-	b	.L1810
-.L1818:
-	ldr	r3, .L1871+44
+	b	.L1851
+.L1859:
+	ldr	r3, .L1912+48
 	movs	r2, #3
 	ldrh	r3, [r3, #0]
 	muls	r3, r2, r3
 	asrs	r3, r3, #2
 	strh	r3, [r1, #0]	@ movhi
-.L1817:
-	ldr	r3, .L1871+52
+.L1858:
+	ldr	r3, .L1912+56
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1812
+	cbz	r3, .L1853
 	adds	r4, r4, #32
 	uxth	r4, r4
-	b	.L1812
-.L1863:
+	b	.L1853
+.L1904:
 	movs	r4, #1
-.L1812:
-	ldr	r3, .L1871+56
+.L1853:
+	ldr	r3, .L1912+60
 	ldrh	r2, [r3, #0]
 	movw	r3, #65535
 	cmp	r2, r3
-	bne	.L1823
-	ldr	r3, .L1871+12
+	bne	.L1864
+	ldr	r3, .L1912+16
 	ldrh	r1, [r3, #0]
 	cmp	r1, r2
-	beq	.L1824
-	ldr	r0, .L1871+60
+	beq	.L1865
+	ldr	r0, .L1912+64
 	ldr	r0, [r0, #0]
 	ldrh	r1, [r0, r1, lsl #1]
-	cbnz	r1, .L1825
+	cbnz	r1, .L1866
 	strh	r2, [r3, #0]	@ movhi
-.L1825:
+.L1866:
 	ldrh	r1, [r3, #0]
-	ldr	r2, .L1871+56
+	ldr	r2, .L1912+60
 	strh	r1, [r2, #0]	@ movhi
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-.L1824:
-	ldr	r5, .L1871+56
+.L1865:
+	ldr	r5, .L1912+60
 	movw	r6, #65535
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strb	r3, [r5, #8]
 	cmp	r0, r6
-	beq	.L1823
+	beq	.L1864
 	bl	IsBlkInGcList
-	cbz	r0, .L1826
+	cbz	r0, .L1867
 	strh	r6, [r5, #0]	@ movhi
-.L1826:
-	ldr	r3, .L1871+64
-	ldr	r6, .L1871+56
+.L1867:
+	ldr	r3, .L1912+68
+	ldr	r6, .L1912+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L1827
+	cbz	r3, .L1868
 	ldrh	r0, [r6, #0]
 	bl	ftl_get_blk_mode
 	strb	r0, [r6, #8]
-.L1827:
+.L1868:
 	ldrh	r2, [r6, #0]
 	movw	r3, #65535
-	ldr	r5, .L1871+56
+	ldr	r5, .L1912+60
 	cmp	r2, r3
-	beq	.L1823
+	beq	.L1864
 	mov	r0, r5
 	bl	make_superblock
-	ldr	r2, .L1871+68
+	ldr	r2, .L1912+72
 	movs	r3, #0
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r3, [r2, #0]	@ movhi
-	ldr	r3, .L1871+60
+	ldr	r3, .L1912+64
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r3, #0]
 	ldrh	r2, [r3, r2, lsl #1]
-	ldr	r3, .L1871+72
+	ldr	r3, .L1912+76
 	strh	r2, [r3, #0]	@ movhi
-.L1823:
-	ldr	r2, .L1871+56
-	ldr	r1, .L1871+76
+.L1864:
+	ldr	r2, .L1912+60
+	ldr	r1, .L1912+80
 	ldrh	r3, [r2, #0]
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	beq	.L1828
-	ldr	r1, .L1871+80
+	beq	.L1869
+	ldr	r1, .L1912+84
 	ldrh	r1, [r1, #0]
 	cmp	r1, r3
-	bne	.L1865
-.L1829:
-.L1828:
+	bne	.L1906
+.L1870:
+.L1869:
 	movw	r3, #65535
 	strh	r3, [r2, #0]	@ movhi
-	b	.L1870
-.L1865:
-	ldr	r6, .L1871+84
-	ldr	r7, .L1871+88
-.L1867:
-	ldr	r3, .L1871+56
+	b	.L1911
+.L1906:
+	ldr	r6, .L1912+88
+	ldr	r7, .L1912+92
+.L1908:
+	ldr	r3, .L1912+60
 	movw	r2, #65535
 	ldrh	r8, [r3, #0]
 	cmp	r8, r2
-	bne	.L1831
-	ldr	r2, .L1871+48
+	bne	.L1872
+	ldr	r2, .L1912+52
 	mov	sl, r3
-	ldr	fp, .L1871+60
+	ldr	fp, .L1912+64
 	movs	r1, #0
 	str	r1, [r2, #0]
-.L1866:
+.L1907:
 	ldrh	r1, [r6, #0]
 	mov	r0, r1
 	str	r1, [sp, #8]
@@ -16427,173 +16929,175 @@ rk_ftl_garbage_collect:
 	uxth	r5, r0
 	strh	r5, [sl, #0]	@ movhi
 	cmp	r5, r8
-	bne	.L1833
-	ldr	r3, .L1871+84
+	bne	.L1874
+	ldr	r3, .L1912+88
 	movs	r2, #0
 	movs	r0, #8
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1810
-.L1833:
+	b	.L1851
+.L1874:
 	mov	r0, r5
 	bl	IsBlkInGcList
 	ldr	r2, [sp, #8]
 	adds	r3, r2, #1
-	cbnz	r0, .L1868
-.L1834:
-	ldr	r1, .L1871+20
+	cbnz	r0, .L1909
+.L1875:
+	ldr	r1, .L1912+24
 	uxth	r0, r3
 	ldr	r3, [fp, #0]
 	strh	r0, [r6, #0]	@ movhi
 	ldrh	ip, [r1, #0]
-	ldr	r1, .L1871+92
+	ldr	r1, .L1912+96
 	ldrh	r2, [r3, r5, lsl #1]
 	ldrh	r1, [r1, #0]
 	mul	r1, r1, ip
 	cmp	r2, r1, asr #1
-	bgt	.L1836
+	bgt	.L1877
 	cmp	r0, #48
-	bls	.L1837
+	bls	.L1878
 	cmp	r2, #8
-	bls	.L1837
-	ldr	r2, .L1871+96
+	bls	.L1878
+	ldr	r2, .L1912+100
 	ldrh	r2, [r2, #0]
 	cmp	r2, #35
-	bhi	.L1837
-.L1836:
+	bhi	.L1878
+.L1877:
 	movs	r2, #0
 	strh	r2, [r6, #0]	@ movhi
-.L1837:
+.L1878:
 	ldrh	r2, [r3, r5, lsl #1]
-	ldr	r3, .L1871+56
+	ldr	r3, .L1912+60
 	cmp	r2, r1
-	blt	.L1838
+	blt	.L1879
 	movw	r2, #65535
 	strh	r2, [r3, #0]	@ movhi
-	ldr	r3, .L1871+84
+	ldr	r3, .L1912+88
 	movs	r2, #0
 	strh	r2, [r3, #0]	@ movhi
-	b	.L1870
-.L1838:
-	cbnz	r2, .L1839
+	b	.L1911
+.L1879:
+	cmp	r2, #0
+	bne	.L1880
 	movw	r0, #65535
 	bl	decrement_vpc_count
 	ldrh	r3, [r6, #0]
 	adds	r3, r3, #1
-.L1868:
+.L1909:
 	strh	r3, [r6, #0]	@ movhi
-	b	.L1866
-.L1872:
+	b	.L1907
+.L1913:
 	.align	2
-.L1871:
-	.word	.LANCHOR165
-	.word	.LANCHOR101
-	.word	.LANCHOR147
-	.word	.LANCHOR146
-	.word	.LANCHOR104
+.L1912:
+	.word	.LANCHOR94
+	.word	.LANCHOR168
+	.word	.LANCHOR103
+	.word	.LANCHOR150
+	.word	.LANCHOR149
+	.word	.LANCHOR106
 	.word	.LANCHOR68
-	.word	.LANCHOR170
-	.word	.LANCHOR109
-	.word	.LANCHOR228
-	.word	.LANCHOR87
-	.word	.LANCHOR116
-	.word	.LANCHOR200
-	.word	.LANCHOR166
-	.word	.LANCHOR148
+	.word	.LANCHOR173
+	.word	.LANCHOR111
+	.word	.LANCHOR233
+	.word	.LANCHOR88
+	.word	.LANCHOR118
 	.word	.LANCHOR201
-	.word	.LANCHOR99
+	.word	.LANCHOR169
+	.word	.LANCHOR151
+	.word	.LANCHOR202
+	.word	.LANCHOR101
 	.word	.LANCHOR7
-	.word	.LANCHOR229
-	.word	.LANCHOR230
-	.word	.LANCHOR107
-	.word	.LANCHOR108
-	.word	.LANCHOR172
-	.word	.LANCHOR132
+	.word	.LANCHOR234
+	.word	.LANCHOR235
+	.word	.LANCHOR109
+	.word	.LANCHOR110
+	.word	.LANCHOR175
+	.word	.LANCHOR135
 	.word	.LANCHOR53
-	.word	.LANCHOR142
-.L1839:
+	.word	.LANCHOR145
+.L1880:
 	movs	r2, #0
 	strb	r2, [r3, #8]
-	ldr	r2, .L1873
+	ldr	r2, .L1914
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbz	r2, .L1840
+	cbz	r2, .L1881
 	mov	r0, r5
 	str	r3, [sp, #4]
 	bl	ftl_get_blk_mode
 	ldr	r3, [sp, #4]
 	strb	r0, [r3, #8]
-.L1840:
-	ldr	r5, .L1873+4
-	ldr	r3, .L1873+8
+.L1881:
+	ldr	r5, .L1914+4
+	ldr	r3, .L1914+8
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1841
-	ldr	r1, .L1873+12
-	mov	r2, #772
-	ldr	r0, .L1873+16
+	bne	.L1882
+	ldr	r1, .L1914+12
+	movw	r2, #835
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1841:
-	ldr	r3, .L1873+28
+.L1882:
+	ldr	r3, .L1914+28
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1842
-	ldr	r1, .L1873+12
-	movw	r2, #773
-	ldr	r0, .L1873+16
+	bne	.L1883
+	ldr	r1, .L1914+12
+	mov	r2, #836
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1842:
-	ldr	r5, .L1873+4
-	ldr	r3, .L1873+32
+.L1883:
+	ldr	r5, .L1914+4
+	ldr	r3, .L1914+32
 	ldrh	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	cmp	r2, r3
-	bne	.L1843
-	ldr	r1, .L1873+12
-	movw	r2, #774
-	ldr	r0, .L1873+16
+	bne	.L1884
+	ldr	r1, .L1914+12
+	movw	r2, #837
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1843:
-	ldr	r0, .L1873+4
+.L1884:
+	ldr	r0, .L1914+4
 	bl	make_superblock
-	ldr	r1, .L1873+36
+	ldr	r1, .L1914+36
 	movs	r3, #0
 	ldrh	r0, [r5, #0]
 	strh	r3, [r1, #0]	@ movhi
-	ldr	r1, .L1873+40
+	ldr	r1, .L1914+40
 	ldr	r1, [r1, #0]
 	ldrh	r0, [r1, r0, lsl #1]
-	ldr	r1, .L1873+44
+	ldr	r1, .L1914+44
 	strh	r3, [r5, #2]	@ movhi
 	strb	r3, [r5, #6]
 	strh	r0, [r1, #0]	@ movhi
-.L1831:
-	ldr	r3, .L1873+48
+.L1872:
+	ldr	r3, .L1914+48
 	movs	r2, #1
 	str	r2, [r3, #0]
-	ldr	r3, .L1873+52
+	ldr	r3, .L1914+52
 	ldrh	r3, [r3, #0]
 	str	r3, [sp, #8]
-	ldr	r3, .L1873
+	ldr	r3, .L1914
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	ldr	r3, .L1873+4
-	cbz	r2, .L1844
+	ldr	r3, .L1914+4
+	cbz	r2, .L1885
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	cmp	r2, #1
-	bne	.L1844
-	ldr	r2, .L1873+56
+	bne	.L1885
+	ldr	r2, .L1914+56
 	ldrh	r2, [r2, #0]
 	str	r2, [sp, #8]
-.L1844:
+.L1885:
 	ldrh	r3, [r3, #2]
 	ldr	r8, [sp, #8]
 	adds	r2, r3, r4
@@ -16604,24 +17108,24 @@ rk_ftl_garbage_collect:
 	movs	r3, #0
 	str	r4, [sp, #20]
 	str	r3, [sp, #12]
-	b	.L1846
-.L1848:
+	b	.L1887
+.L1889:
 	ldrh	r1, [r2, #2]!
 	movw	r8, #65535
 	cmp	r1, r8
-	beq	.L1847
+	beq	.L1888
 	mla	r8, r0, r5, lr
 	adds	r5, r5, #1
 	orr	r1, r4, r1, lsl #10
 	uxth	r5, r5
 	str	r1, [r8, #4]
-.L1847:
+.L1888:
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1855:
+.L1896:
 	cmp	r3, ip
-	bne	.L1848
-	ldr	r3, .L1873+4
+	bne	.L1889
+	ldr	r3, .L1914+4
 	mov	r1, r5
 	ldr	r0, [r7, #0]
 	movs	r4, #0
@@ -16629,29 +17133,29 @@ rk_ftl_garbage_collect:
 	ldrb	r2, [r3, #8]	@ zero_extendqisi2
 	bl	FlashReadPages
 	str	r4, [sp, #16]
-	b	.L1849
-.L1853:
+	b	.L1890
+.L1894:
 	ldr	r3, [r7, #0]
 	adds	r2, r3, r4
 	ldr	r3, [r3, r4]
 	ldr	r5, [r2, #12]
 	adds	r3, r3, #1
-	beq	.L1850
+	beq	.L1891
 	ldrh	r3, [r5, #0]
 	movw	r8, #61589
 	cmp	r3, r8
-	bne	.L1850
+	bne	.L1891
 	ldr	r8, [r5, #8]
 	cmp	r8, #-1
-	bne	.L1851
-	ldr	r1, .L1873+12
-	mov	r2, #812
-	ldr	r0, .L1873+16
+	bne	.L1892
+	ldr	r1, .L1914+12
+	mov	r2, #876
+	ldr	r0, .L1914+16
 	bl	printf
-	ldr	r0, .L1873+20
-	ldr	r1, .L1873+24
+	ldr	r0, .L1914+20
+	ldr	r1, .L1914+24
 	bl	printf
-.L1851:
+.L1892:
 	movs	r2, #0
 	add	r1, sp, #28
 	mov	r0, r8
@@ -16662,30 +17166,30 @@ rk_ftl_garbage_collect:
 	bic	r1, r1, #-2147483648
 	ldr	r3, [r2, #4]
 	cmp	r1, r3
-	bne	.L1850
-	ldr	r0, .L1873+36
+	bne	.L1891
+	ldr	r0, .L1914+36
 	mov	fp, #36
-	ldr	r8, .L1873+72
+	ldr	r8, .L1914+72
 	ldr	r2, [r2, #16]
 	ldrh	r3, [r0, #0]
 	ldr	r1, [r8, #0]
 	adds	r3, r3, #1
 	strh	r3, [r0, #0]	@ movhi
-	ldr	r0, .L1873+60
+	ldr	r0, .L1914+60
 	ldr	r3, [r0, #0]
 	mla	r3, fp, r1, r3
 	str	r2, [r3, #16]
 	str	r3, [sp, #4]
 	bl	Ftl_get_new_temp_ppa
 	ldr	r3, [sp, #4]
-	ldr	r1, .L1873+60
+	ldr	r1, .L1914+60
 	ldr	r2, [r1, #0]
 	str	r0, [r3, #4]
 	ldr	r3, [r8, #0]
 	ldr	r0, [r7, #0]
 	mla	r2, fp, r3, r2
 	adds	r0, r0, r4
-	ldr	fp, .L1873+32
+	ldr	fp, .L1914+32
 	adds	r3, r3, #1
 	ldr	r1, [r0, #8]
 	str	r1, [r2, #8]
@@ -16696,45 +17200,45 @@ rk_ftl_garbage_collect:
 	str	r2, [r5, #12]
 	ldrh	r2, [fp, #0]
 	strh	r2, [r5, #2]	@ movhi
-	ldr	r2, .L1873+64
+	ldr	r2, .L1914+64
 	str	r3, [r8, #0]
 	ldr	r2, [r2, #0]
 	str	r2, [r5, #4]
 	bl	FtlGcBufAlloc
-	ldr	r3, .L1873
+	ldr	r3, .L1914
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbnz	r3, .L1852
+	cbnz	r3, .L1893
 	ldrb	r3, [fp, #7]	@ zero_extendqisi2
 	ldr	r2, [r8, #0]
 	cmp	r2, r3
-	beq	.L1852
+	beq	.L1893
 	ldrh	r3, [fp, #4]
-	cbnz	r3, .L1850
-.L1852:
+	cbnz	r3, .L1891
+.L1893:
 	bl	Ftl_gc_temp_data_write_back
 	cmp	r0, #0
-	bne	.L1869
-.L1850:
+	bne	.L1910
+.L1891:
 	ldr	r8, [sp, #16]
 	adds	r4, r4, #36
 	add	r3, r8, #1
 	uxth	r3, r3
 	str	r3, [sp, #16]
-.L1849:
+.L1890:
 	ldr	r3, [sp, #16]
 	cmp	r3, sl
-	bne	.L1853
+	bne	.L1894
 	ldr	r8, [sp, #12]
 	add	r8, r8, #1
 	str	r8, [sp, #12]
-.L1846:
+.L1887:
 	ldr	r8, [sp, #12]
-	ldr	r2, .L1873+4
+	ldr	r2, .L1914+4
 	uxth	r3, r8
 	ldr	r8, [sp, #20]
 	cmp	r3, r8
-	bcs	.L1854
-	ldr	r3, .L1873+68
+	bcs	.L1895
+	ldr	r3, .L1914+68
 	movs	r5, #0
 	ldrh	r4, [r2, #2]
 	movs	r0, #36
@@ -16744,8 +17248,8 @@ rk_ftl_garbage_collect:
 	ldr	r3, [sp, #12]
 	adds	r4, r4, r3
 	mov	r3, r5
-	b	.L1855
-.L1854:
+	b	.L1896
+.L1895:
 	ldrh	r3, [r2, #2]
 	ldr	r4, [sp, #20]
 	ldr	r8, [sp, #8]
@@ -16753,102 +17257,287 @@ rk_ftl_garbage_collect:
 	uxth	r4, r4
 	strh	r4, [r2, #2]	@ movhi
 	cmp	r4, r8
-	bcs	.L1856
-	ldr	r3, .L1873+36
-	ldrh	r2, [r3, #0]
-	ldr	r3, .L1873+44
-	ldrh	r3, [r3, #0]
-	cmp	r2, r3
-	bne	.L1857
-.L1856:
-	ldr	r3, .L1873+72
+	bcc	.L1897
+	ldr	r3, .L1914+72
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1858
+	cbz	r3, .L1898
 	bl	Ftl_gc_temp_data_write_back
-	cbz	r0, .L1858
-.L1869:
-	ldr	r3, .L1873+48
+	cbz	r0, .L1898
+.L1910:
+	ldr	r3, .L1914+48
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1870:
-	ldr	r3, .L1873+76
+.L1911:
+	ldr	r3, .L1914+76
 	ldrh	r0, [r3, #0]
-	b	.L1810
-.L1874:
+	b	.L1851
+.L1898:
+	ldr	r3, .L1914+36
+	ldrh	r0, [r3, #0]
+	cbnz	r0, .L1899
+	ldr	r3, .L1914+4
+	ldr	r2, .L1914+40
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r2, r1, lsl #1]
+	cbz	r4, .L1899
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldrh	r0, [r3, #0]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1899:
+	ldr	r3, .L1914+4
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1897:
+	ldr	r3, .L1914+80
+	ldrh	r0, [r3, #0]
+	cmp	r0, #2
+	bhi	.L1900
+	ldr	r3, .L1914+52
+	ldrh	r4, [r3, #0]
+	b	.L1908
+.L1900:
+	ldr	r3, .L1914+48
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3, #0]
+	b	.L1851
+.L1915:
+	.align	2
+.L1914:
+	.word	.LANCHOR7
+	.word	.LANCHOR202
+	.word	.LANCHOR109
+	.word	.LANCHOR236
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR110
+	.word	.LANCHOR111
+	.word	.LANCHOR234
+	.word	.LANCHOR101
+	.word	.LANCHOR235
+	.word	.LANCHOR168
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR178
+	.word	.LANCHOR157
+	.word	.LANCHOR53
+	.word	.LANCHOR131
+	.word	.LANCHOR233
+	.word	.LANCHOR106
+.L1901:
+	movs	r0, #0
+	b	.L1851
+.L1902:
+	mov	r0, r2
+	b	.L1851
+.L1903:
+	mov	r0, r3
+.L1851:
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.ftl_fix_nand_power_lost_error,"ax",%progbits
+	.align	1
+	.global	ftl_fix_nand_power_lost_error
+	.thumb
+	.thumb_func
+	.type	ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1925
+	push	{r4, r5, r6, r7, r8, lr}
+	sub	sp, sp, #48
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	beq	.L1916
+	ldr	r3, .L1925+4
+	ldr	r5, .L1925+8
+	ldr	r8, .L1925+32
+	ldrh	r4, [r3, #0]
+	ldr	r3, [r5, #0]
+	ldr	r7, .L1925+12
+	mov	r1, r4
+	ldr	r0, .L1925+16
+	lsls	r6, r4, #1
+	ldrh	r2, [r3, r4, lsl #1]
+	bl	printf
+	ldrh	r0, [r8, #0]
+	bl	FtlGcRefreshOpenBlock
+	ldrh	r0, [r7, #0]
+	bl	FtlGcRefreshOpenBlock
+	mov	r0, r8
+	bl	allocate_new_data_superblock
+	mov	r0, r7
+	bl	allocate_new_data_superblock
+	movw	r7, #4097
+	b	.L1918
+.L1920:
+	movs	r0, #1
+	mov	r1, r0
+	bl	rk_ftl_garbage_collect
+	ldr	r3, [r5, #0]
+	ldrh	r3, [r3, r6]
+	cbz	r3, .L1919
+.L1918:
+	subs	r7, r7, #1
+	bne	.L1920
+.L1919:
+	ldr	r5, .L1925+8
+	mov	r1, r4
+	ldr	r0, .L1925+16
+	ldr	r3, [r5, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	bl	printf
+	ldr	r3, [r5, #0]
+	ldrh	r5, [r3, r4, lsl #1]
+	cmp	r5, #0
+	bne	.L1921
+	add	r6, sp, #48
+	mov	r0, sp
+	movs	r7, #36
+	strh	r4, [r6, #-48]!	@ movhi
+	adds	r6, r6, #14
+	bl	make_superblock
+	ldr	r3, .L1925+20
+	movw	lr, #65535
+	mov	r1, r5
+	ldrh	r8, [r3, #0]
+	ldr	r3, .L1925+24
+	ldr	ip, [r3, #0]
+	mov	r3, r5
+	b	.L1922
+.L1924:
+	ldrh	r0, [r6, #2]!
+	cmp	r0, lr
+	beq	.L1923
+	mla	r2, r7, r5, ip
+	adds	r5, r5, #1
+	lsls	r0, r0, #10
+	uxth	r5, r5
+	str	r0, [r2, #4]
+	str	r1, [r2, #8]
+	str	r1, [r2, #12]
+.L1923:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1922:
+	cmp	r3, r8
+	bne	.L1924
+	ldr	r3, .L1925+8
+	mov	r1, r4
+	ldr	r0, .L1925+28
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	ldr	r4, .L1925+24
+	bl	printf
+	movs	r1, #0
+	mov	r2, r5
+	ldr	r0, [r4, #0]
+	bl	FlashEraseBlocks
+	ldr	r0, [r4, #0]
+	movs	r1, #1
+	mov	r2, r5
+	bl	FlashEraseBlocks
+.L1921:
+	ldr	r3, .L1925+4
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1916:
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1926:
 	.align	2
-.L1873:
+.L1925:
 	.word	.LANCHOR7
-	.word	.LANCHOR201
-	.word	.LANCHOR107
-	.word	.LANCHOR231
-	.word	.LC9
-	.word	.LC10
-	.word	.LC11
-	.word	.LANCHOR108
-	.word	.LANCHOR109
 	.word	.LANCHOR229
-	.word	.LANCHOR99
-	.word	.LANCHOR230
-	.word	.LANCHOR165
-	.word	.LANCHOR68
-	.word	.LANCHOR69
-	.word	.LANCHOR174
-	.word	.LANCHOR154
+	.word	.LANCHOR101
+	.word	.LANCHOR110
+	.word	.LC44
 	.word	.LANCHOR53
-	.word	.LANCHOR128
-	.word	.LANCHOR228
-.L1858:
-	ldr	r3, .L1875
-	ldrh	r0, [r3, #0]
-	cbnz	r0, .L1859
-	ldr	r3, .L1875+4
-	ldr	r2, .L1875+8
-	ldrh	r1, [r3, #0]
-	ldr	r2, [r2, #0]
-	ldrh	r4, [r2, r1, lsl #1]
-	cbz	r4, .L1859
-	strh	r0, [r2, r1, lsl #1]	@ movhi
-	ldrh	r0, [r3, #0]
-	bl	update_vpc_list
-	bl	FtlCacheWriteBack
-	bl	l2p_flush
-	bl	FtlVpcTblFlush
-.L1859:
-	ldr	r3, .L1875+4
-	movw	r2, #65535
-	strh	r2, [r3, #0]	@ movhi
-.L1857:
-	ldr	r3, .L1875+12
+	.word	.LANCHOR95
+	.word	.LC45
+	.word	.LANCHOR109
+	.size	ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+	.section	.text.FtlInit,"ax",%progbits
+	.align	1
+	.global	FtlInit
+	.thumb
+	.thumb_func
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+.L1928:
+	push	{r3, r4, r5, lr}
+	mov	r3, #-1
+	ldr	r2, .L1935
+	mov	r5, r0
+	ldr	r4, .L1935+4
+	ldr	r1, .L1935+8
+	ldr	r0, .L1935+12
+	str	r3, [r4, #0]
+	movs	r3, #0
+	str	r3, [r2, #0]
+	ldr	r2, .L1935+16
+	str	r3, [r2, #0]
+	bl	printf
+	mov	r0, r5
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1935+20
 	ldrh	r0, [r3, #0]
-	cmp	r0, #2
-	bhi	.L1860
-	ldr	r3, .L1875+16
-	ldrh	r4, [r3, #0]
-	b	.L1867
-.L1860:
-	ldr	r3, .L1875+20
-	movs	r2, #0
-	adds	r0, r0, #1
-	str	r2, [r3, #0]
-	b	.L1810
-.L1861:
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L1929
+	ldr	r0, .L1935+24
+	b	.L1934
+.L1929:
+	bl	FtlSysBlkInit
+	cbz	r0, .L1931
+	ldr	r0, .L1935+28
+.L1934:
+	ldr	r1, .L1935+32
+	bl	printf
+	b	.L1930
+.L1931:
+	movs	r1, #1
+	str	r1, [r4, #0]
+	bl	rk_ftl_garbage_collect
+	ldr	r3, .L1935+36
+	ldrh	r3, [r3, #0]
+	cmp	r3, #15
+	bhi	.L1930
+	mov	r4, #1024
+.L1932:
+	movs	r0, #1
+	mov	r1, r0
+	bl	rk_ftl_garbage_collect
+	subs	r4, r4, #1
+	bne	.L1932
+.L1930:
 	movs	r0, #0
-	b	.L1810
-.L1862:
-	mov	r0, r3
-.L1810:
-	add	sp, sp, #32
-	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1876:
+	pop	{r3, r4, r5, pc}
+.L1936:
 	.align	2
-.L1875:
-	.word	.LANCHOR229
-	.word	.LANCHOR201
-	.word	.LANCHOR99
-	.word	.LANCHOR104
-	.word	.LANCHOR68
-	.word	.LANCHOR165
-	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+.L1935:
+	.word	.LANCHOR237
+	.word	.LANCHOR225
+	.word	.LC46
+	.word	.LC10
+	.word	.LANCHOR94
+	.word	.LANCHOR54
+	.word	.LC47
+	.word	.LC48
+	.word	.LANCHOR238
+	.word	.LANCHOR106
+	.size	FtlInit, .-FtlInit
 	.section	.text.ftl_write,"ax",%progbits
 	.align	1
 	.global	ftl_write
@@ -16864,28 +17553,28 @@ ftl_write:
 	mov	r5, r1
 	str	r2, [sp, #12]
 	str	r3, [sp, #4]
-	bne	.L1878
+	bne	.L1938
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartWrite
-	b	.L1879
-.L1878:
-	ldr	r3, .L1920
+	b	.L1939
+.L1938:
+	ldr	r3, .L1980
 	ldr	r0, [sp, #12]
 	ldr	r3, [r3, #0]
 	adds	r7, r0, r1
 	cmp	r7, r3
-	bhi	.L1910
-	ldr	r3, .L1920+4
+	bhi	.L1970
+	ldr	r3, .L1980+4
 	ldr	r0, [r3, #0]
-	adds	r1, r0, #1
-	beq	.L1879
-	ldr	r3, .L1920+8
+	adds	r3, r0, #1
+	beq	.L1939
+	ldr	r3, .L1980+8
 	mov	r2, #2048
-	mov	r0, r5
+	mov	r0, r1
 	str	r2, [r3, #0]
-	ldr	r3, .L1920+12
+	ldr	r3, .L1980+12
 	ldrh	r6, [r3, #0]
 	mov	r1, r6
 	bl	__aeabi_uidiv
@@ -16893,7 +17582,7 @@ ftl_write:
 	mov	sl, r0
 	subs	r0, r7, #1
 	bl	__aeabi_uidiv
-	ldr	r3, .L1920+16
+	ldr	r3, .L1980+16
 	ldr	r2, [r3, #0]
 	rsb	r4, sl, r0
 	str	r0, [sp, #24]
@@ -16901,16 +17590,16 @@ ftl_write:
 	str	r1, [sp, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	ldr	r3, .L1920+20
+	ldr	r3, .L1980+20
 	ldr	r7, [r3, #0]
-	cbz	r7, .L1880
+	cbz	r7, .L1940
 	ldr	r3, [r7, #16]
 	cmp	sl, r3
-	beq	.L1881
+	beq	.L1941
 	bl	FtlCacheWriteBack
-	b	.L1880
-.L1881:
-	ldr	r3, .L1920+24
+	b	.L1940
+.L1941:
+	ldr	r3, .L1980+24
 	mov	r1, r6
 	mov	r0, r5
 	ldr	r2, [r3, #0]
@@ -16929,7 +17618,7 @@ ftl_write:
 	mov	r2, r8
 	bl	memcpy
 	cmp	r4, #0
-	beq	.L1912
+	beq	.L1972
 	ldr	r3, [sp, #12]
 	adds	r5, r5, r6
 	ldr	r0, [sp, #4]
@@ -16940,36 +17629,36 @@ ftl_write:
 	str	r0, [sp, #4]
 	bl	FtlCacheWriteBack
 	str	r4, [sp, #0]
-.L1880:
+.L1940:
 	mov	r4, sl
 	str	sl, [sp, #20]
-	ldr	r6, .L1920+28
+	ldr	r6, .L1980+28
 	mov	sl, r5
-	b	.L1882
-.L1909:
-	ldr	r1, .L1920+32
+	b	.L1942
+.L1969:
+	ldr	r1, .L1980+32
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1883
-	ldr	r1, .L1920+36
-	mov	r2, #1544
-	ldr	r0, .L1920+40
+	bcc	.L1943
+	ldr	r1, .L1980+36
+	movw	r2, #1630
+	ldr	r0, .L1980+40
 	bl	printf
-	ldr	r0, .L1920+44
-	ldr	r1, .L1920+48
+	ldr	r0, .L1980+44
+	ldr	r1, .L1980+48
 	bl	printf
-.L1883:
-	ldr	r2, .L1920+28
+.L1943:
+	ldr	r2, .L1980+28
 	ldrh	r3, [r2, #4]
-	cbnz	r3, .L1884
+	cbnz	r3, .L1944
 	bl	FtlCacheWriteBack
-	ldr	r0, .L1920+28
+	ldr	r0, .L1980+28
 	bl	allocate_new_data_superblock
-.L1884:
+.L1944:
 	ldrb	r3, [r6, #7]	@ zero_extendqisi2
 	ldrh	r2, [r6, #4]
-	ldr	r1, .L1920+32
+	ldr	r1, .L1980+32
 	lsls	r3, r3, #2
 	ldr	r0, [sp, #0]
 	cmp	r3, r2
@@ -16982,29 +17671,29 @@ ftl_write:
 	ldrh	r3, [r1, #0]
 	str	r0, [sp, #8]
 	cmp	r2, r3
-	bcc	.L1885
-	ldr	r1, .L1920+36
-	movw	r2, #1577
-	ldr	r0, .L1920+40
+	bcc	.L1945
+	ldr	r1, .L1980+36
+	movw	r2, #1663
+	ldr	r0, .L1980+40
 	bl	printf
-	ldr	r0, .L1920+44
-	ldr	r1, .L1920+48
+	ldr	r0, .L1980+44
+	ldr	r1, .L1980+48
 	bl	printf
-.L1885:
+.L1945:
 	movs	r3, #0
-	ldr	r5, .L1920+52
+	ldr	r5, .L1980+52
 	str	r3, [sp, #16]
-	b	.L1886
-.L1905:
+	b	.L1946
+.L1965:
 	ldrh	r3, [r6, #4]
 	cmp	r3, #0
-	beq	.L1913
+	beq	.L1973
 	movs	r2, #0
 	add	r1, sp, #76
 	mov	r0, r4
 	movs	r7, #36
 	bl	log2phys
-	ldr	r0, .L1920+28
+	ldr	r0, .L1980+28
 	bl	get_new_active_ppa
 	ldr	r3, [sp, #16]
 	muls	r7, r3, r7
@@ -17012,13 +17701,13 @@ ftl_write:
 	adds	r3, r3, r7
 	str	r4, [r3, #16]
 	str	r0, [r3, #4]
-	ldr	r0, .L1920+56
+	ldr	r0, .L1980+56
 	ldrh	r2, [r0, #0]
 	ldr	r0, [sp, #16]
 	mul	r1, r2, r0
 	lsrs	r1, r1, #2
 	str	r1, [sp, #32]
-	ldr	r1, .L1920+60
+	ldr	r1, .L1980+60
 	ldr	r0, [sp, #32]
 	ldr	r1, [r1, #0]
 	add	r8, r1, r0, lsl #2
@@ -17028,14 +17717,14 @@ ftl_write:
 	movs	r1, #0
 	bl	memset
 	ldr	r1, [sp, #20]
-	ldr	r3, .L1920+12
+	ldr	r3, .L1980+12
 	cmp	r4, r1
-	beq	.L1888
+	beq	.L1948
 	ldr	r2, [sp, #24]
 	cmp	r4, r2
-	bne	.L1915
-	b	.L1919
-.L1888:
+	bne	.L1975
+	b	.L1979
+.L1948:
 	ldrh	fp, [r3, #0]
 	mov	r0, sl
 	mov	r1, fp
@@ -17046,8 +17735,8 @@ ftl_write:
 	cmp	fp, r3
 	it	cs
 	movcs	fp, r3
-	b	.L1891
-.L1919:
+	b	.L1951
+.L1979:
 	ldr	r0, [sp, #12]
 	ldrh	fp, [r3, #0]
 	movs	r3, #0
@@ -17055,39 +17744,39 @@ ftl_write:
 	str	r3, [sp, #28]
 	mls	fp, r4, fp, r2
 	uxth	fp, fp
-.L1891:
-	ldr	r3, .L1920+12
+.L1951:
+	ldr	r3, .L1980+12
 	ldrh	r3, [r3, #0]
 	cmp	fp, r3
-	bne	.L1892
+	bne	.L1952
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r7, r3, r7
-	bne	.L1893
+	bne	.L1953
 	ldr	r1, [sp, #4]
 	str	r1, [r7, #8]
-	b	.L1894
-.L1893:
+	b	.L1954
+.L1953:
 	mul	r3, fp, r4
 	ldr	r2, [sp, #4]
 	rsb	r3, sl, r3
 	add	r3, r2, r3, lsl #9
-	b	.L1918
-.L1892:
+	b	.L1978
+.L1952:
 	ldr	r3, [sp, #20]
 	cmp	r4, r3
 	ldr	r3, [r5, #0]
 	it	eq
-	ldreq	r2, .L1920+64
+	ldreq	r2, .L1980+64
 	add	r3, r3, r7
 	it	ne
-	ldrne	r2, .L1920+68
+	ldrne	r2, .L1980+68
 	ldr	r2, [r2, #0]
 	str	r2, [r3, #8]
 	ldr	r3, [sp, #76]
-	adds	r2, r3, #1
-	beq	.L1897
+	adds	r1, r3, #1
+	beq	.L1957
 	str	r3, [sp, #44]
 	movs	r1, #1
 	ldr	r3, [r5, #0]
@@ -17102,102 +17791,102 @@ ftl_write:
 	bl	FlashReadPages
 	ldr	r3, [sp, #40]
 	adds	r3, r3, #1
-	bne	.L1898
-	ldr	r3, .L1920+72
+	bne	.L1958
+	ldr	r3, .L1980+72
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
-	b	.L1899
-.L1898:
+	b	.L1959
+.L1958:
 	ldr	r1, [r8, #8]
 	cmp	r1, r4
-	beq	.L1900
-	ldr	r3, .L1920+72
-	ldr	r0, .L1920+76
+	beq	.L1960
+	ldr	r3, .L1980+72
+	ldr	r0, .L1980+76
 	ldr	r2, [r3, #72]
 	adds	r2, r2, #1
 	str	r2, [r3, #72]
 	mov	r2, r4
 	bl	printf
-.L1900:
+.L1960:
 	ldr	r3, [r8, #8]
 	cmp	r3, r4
-	beq	.L1899
-	ldr	r1, .L1920+36
-	movw	r2, #1630
-	ldr	r0, .L1920+40
+	beq	.L1959
+	ldr	r1, .L1980+36
+	movw	r2, #1716
+	ldr	r0, .L1980+40
 	bl	printf
-	ldr	r1, .L1920+48
-	ldr	r0, .L1920+44
+	ldr	r1, .L1980+48
+	ldr	r0, .L1980+44
 	bl	printf
-	b	.L1899
-.L1897:
+	b	.L1959
+.L1957:
 	ldr	r3, [r5, #0]
 	movs	r1, #0
 	adds	r3, r3, r7
 	ldr	r0, [r3, #8]
-	ldr	r3, .L1920+80
+	ldr	r3, .L1980+80
 	ldrh	r2, [r3, #0]
 	bl	memset
-.L1899:
+.L1959:
 	ldr	r0, [sp, #20]
 	ldr	r3, [r5, #0]
 	cmp	r4, r0
 	add	r3, r3, r7
-	bne	.L1901
+	bne	.L1961
 	ldr	r0, [r3, #8]
 	ldr	r3, [sp, #28]
 	ldr	r1, [sp, #4]
 	add	r0, r0, r3, lsl #9
-	b	.L1917
-.L1921:
+	b	.L1977
+.L1981:
 	.align	2
-.L1920:
+.L1980:
 	.word	.LANCHOR84
-	.word	.LANCHOR222
-	.word	.LANCHOR232
+	.word	.LANCHOR225
+	.word	.LANCHOR239
 	.word	.LANCHOR71
-	.word	.LANCHOR156
-	.word	.LANCHOR134
-	.word	.LANCHOR158
-	.word	.LANCHOR107
+	.word	.LANCHOR159
+	.word	.LANCHOR137
+	.word	.LANCHOR161
+	.word	.LANCHOR109
 	.word	.LANCHOR53
-	.word	.LANCHOR233
+	.word	.LANCHOR240
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR175
-	.word	.LANCHOR74
-	.word	.LANCHOR181
-	.word	.LANCHOR178
 	.word	.LANCHOR179
-	.word	.LANCHOR141
-	.word	.LC34
+	.word	.LANCHOR74
+	.word	.LANCHOR185
+	.word	.LANCHOR182
+	.word	.LANCHOR183
+	.word	.LANCHOR144
+	.word	.LC49
 	.word	.LANCHOR73
-.L1901:
-	ldr	r2, .L1922
+.L1961:
+	ldr	r2, .L1982
 	ldr	r0, [r3, #8]
 	ldrh	r1, [r2, #0]
 	muls	r1, r4, r1
 	ldr	r2, [sp, #4]
 	rsb	r1, sl, r1
 	add	r1, r2, r1, lsl #9
-.L1917:
+.L1977:
 	lsl	r2, fp, #9
 	bl	memcpy
 	ldr	r3, [sp, #24]
 	cmp	r4, r3
-	bne	.L1894
+	bne	.L1954
 	ldrh	r3, [r6, #4]
-	cbz	r3, .L1894
+	cbz	r3, .L1954
 	ldr	r3, [r5, #0]
 	adds	r7, r3, r7
-	ldr	r3, .L1922+4
+	ldr	r3, .L1982+4
 	str	r7, [r3, #0]
-	ldr	r3, .L1922+8
+	ldr	r3, .L1982+8
 	str	r6, [r3, #0]
-	b	.L1894
-.L1915:
+	b	.L1954
+.L1975:
 	ldr	r2, [r5, #0]
 	ldrh	r3, [r3, #0]
 	muls	r3, r4, r3
@@ -17205,36 +17894,36 @@ ftl_write:
 	rsb	r3, sl, r3
 	adds	r7, r2, r7
 	add	r3, r0, r3, lsl #9
-.L1918:
+.L1978:
 	str	r3, [r7, #8]
-.L1894:
-	ldr	r1, .L1922+12
+.L1954:
+	ldr	r1, .L1982+12
 	ldrb	r2, [r6, #6]	@ zero_extendqisi2
 	ldrh	r3, [r1, #0]
 	cmp	r2, r3
-	bcc	.L1903
-	ldr	r1, .L1922+16
-	movw	r2, #1651
-	ldr	r0, .L1922+20
+	bcc	.L1963
+	ldr	r1, .L1982+16
+	movw	r2, #1737
+	ldr	r0, .L1982+20
 	bl	printf
-	ldr	r0, .L1922+24
-	ldr	r1, .L1922+28
+	ldr	r0, .L1982+24
+	ldr	r1, .L1982+28
 	bl	printf
-.L1903:
+.L1963:
 	ldr	r2, [sp, #36]
 	movw	r3, #61589
 	ldr	r0, [sp, #32]
 	strh	r3, [r2, r0, lsl #2]	@ movhi
-	ldr	r3, .L1922+32
+	ldr	r3, .L1982+32
 	ldr	r2, [r3, #0]
 	str	r2, [r8, #4]
 	adds	r2, r2, #1
 	str	r2, [r3, #0]
 	adds	r2, r2, #1
-	bne	.L1904
+	bne	.L1964
 	movs	r2, #0
 	str	r2, [r3, #0]
-.L1904:
+.L1964:
 	ldr	r3, [sp, #76]
 	str	r4, [r8, #8]
 	adds	r4, r4, #1
@@ -17244,83 +17933,83 @@ ftl_write:
 	ldr	r3, [sp, #16]
 	adds	r3, r3, #1
 	str	r3, [sp, #16]
-.L1886:
+.L1946:
 	ldr	r3, [sp, #16]
 	ldr	r0, [sp, #8]
 	cmp	r3, r0
-	bne	.L1905
-	b	.L1887
-.L1913:
+	bne	.L1965
+	b	.L1947
+.L1973:
 	ldr	r3, [sp, #16]
 	str	r3, [sp, #8]
-.L1887:
-	ldr	r3, .L1922+4
+.L1947:
+	ldr	r3, .L1982+4
 	ldr	r3, [r3, #0]
-	cbz	r3, .L1906
+	cbz	r3, .L1966
 	ldr	r0, [sp, #8]
 	subs	r0, r0, #1
 	str	r0, [sp, #8]
-	beq	.L1907
+	beq	.L1967
 	ldr	r1, [sp, #0]
 	subs	r1, r1, #1
 	str	r1, [sp, #0]
-.L1906:
-	ldr	r3, .L1922+36
+.L1966:
+	ldr	r3, .L1982+36
 	movs	r2, #0
 	ldr	r1, [sp, #8]
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1922+40
+	ldr	r3, .L1982+40
 	bl	FtlProgPages
 	ldr	r2, [sp, #0]
 	ldr	r3, [sp, #8]
 	cmp	r2, r3
-	bcs	.L1908
-	ldr	r1, .L1922+16
-	movw	r2, #1666
-	ldr	r0, .L1922+20
+	bcs	.L1968
+	ldr	r1, .L1982+16
+	mov	r2, #1752
+	ldr	r0, .L1982+20
 	bl	printf
-	ldr	r0, .L1922+24
-	ldr	r1, .L1922+28
+	ldr	r0, .L1982+24
+	ldr	r1, .L1982+28
 	bl	printf
-.L1908:
+.L1968:
 	ldr	r0, [sp, #0]
 	ldr	r1, [sp, #8]
 	subs	r0, r0, r1
 	str	r0, [sp, #0]
-.L1882:
+.L1942:
 	ldr	r2, [sp, #0]
 	cmp	r2, #0
-	bne	.L1909
-.L1907:
+	bne	.L1969
+.L1967:
 	ldr	sl, [sp, #20]
 	movs	r0, #0
 	ldr	r3, [sp, #24]
 	rsb	r1, sl, r3
 	bl	rk_ftl_garbage_collect
 	movs	r0, #0
-	b	.L1879
-.L1910:
+	b	.L1939
+.L1970:
 	mov	r0, #-1
-	b	.L1879
-.L1912:
+	b	.L1939
+.L1972:
 	mov	r0, r4
-.L1879:
+.L1939:
 	add	sp, sp, #80
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1923:
+.L1983:
 	.align	2
-.L1922:
+.L1982:
 	.word	.LANCHOR71
-	.word	.LANCHOR134
-	.word	.LANCHOR219
+	.word	.LANCHOR137
+	.word	.LANCHOR224
 	.word	.LANCHOR53
-	.word	.LANCHOR233
+	.word	.LANCHOR240
 	.word	.LC9
 	.word	.LC10
 	.word	.LC11
-	.word	.LANCHOR154
-	.word	.LANCHOR175
-	.word	.LANCHOR107
+	.word	.LANCHOR157
+	.word	.LANCHOR179
+	.word	.LANCHOR109
 	.size	ftl_write, .-ftl_write
 	.section	.text.ftl_read,"ax",%progbits
 	.align	1
@@ -17337,27 +18026,27 @@ ftl_read:
 	mov	r4, r1
 	mov	r7, r3
 	str	r2, [sp, #36]
-	bne	.L1925
+	bne	.L1985
 	add	r0, r1, #256
 	mov	r1, r2
 	mov	r2, r3
 	bl	FtlVendorPartRead
 	str	r0, [sp, #12]
-	b	.L1926
-.L1925:
+	b	.L1986
+.L1985:
 	ldr	r3, [sp, #36]
 	adds	r3, r3, r1
 	str	r3, [sp, #16]
-	ldr	r3, .L1958
+	ldr	r3, .L2018
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bhi	.L1946
-	ldr	r3, .L1958+4
+	bhi	.L2006
+	ldr	r3, .L2018+4
 	ldr	r3, [r3, #0]
 	adds	r2, r3, #1
-	beq	.L1947
-	ldr	fp, .L1958+48
+	beq	.L2007
+	ldr	fp, .L2018+48
 	bl	FtlCacheWriteBack
 	mov	r0, r4
 	mov	sl, #0
@@ -17378,54 +18067,54 @@ ftl_read:
 	str	sl, [sp, #12]
 	adds	r3, r3, r0
 	str	r3, [sp, #8]
-	ldr	r3, .L1958+8
+	ldr	r3, .L2018+8
 	ldr	r1, [sp, #8]
 	str	r0, [sp, #24]
 	ldr	r2, [r3, #0]
 	adds	r2, r1, r2
 	str	r2, [r3, #0]
-	b	.L1953
-.L1945:
+	b	.L2013
+.L2005:
 	movs	r2, #0
 	mov	r0, r6
 	add	r1, sp, #68
 	bl	log2phys
 	ldr	r3, [sp, #68]
-	adds	r4, r3, #1
-	bne	.L1954
-	b	.L1957
-.L1931:
+	adds	r0, r3, #1
+	bne	.L2014
+	b	.L2017
+.L1991:
 	mla	r0, r0, r6, r4
 	cmp	r0, r8
-	bcc	.L1930
+	bcc	.L1990
 	ldr	r3, [sp, #16]
 	cmp	r0, r3
-	bcs	.L1930
+	bcs	.L1990
 	rsb	r0, r8, r0
 	movs	r1, #0
 	mov	r2, #512
 	add	r0, r7, r0, lsl #9
 	bl	memset
-.L1930:
+.L1990:
 	adds	r4, r4, #1
-	b	.L1928
-.L1957:
+	b	.L1988
+.L2017:
 	movs	r4, #0
-.L1928:
+.L1988:
 	ldrh	r0, [fp, #0]
 	cmp	r4, r0
-	bcc	.L1931
-	b	.L1932
-.L1954:
-	ldr	r2, .L1958+12
+	bcc	.L1991
+	b	.L1992
+.L2014:
+	ldr	r2, .L2018+12
 	movs	r4, #36
 	ldr	r2, [r2, #0]
 	mla	r4, r4, r5, r2
 	str	r3, [r4, #4]
 	ldr	r3, [sp, #20]
 	cmp	r6, r3
-	bne	.L1933
-	ldr	r3, .L1958+16
+	bne	.L1993
+	ldr	r3, .L2018+16
 	mov	r0, r8
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #8]
@@ -17442,14 +18131,14 @@ ftl_read:
 	movcc	r1, r2
 	str	r1, [sp, #32]
 	cmp	r1, r3
-	bne	.L1934
+	bne	.L1994
 	str	r7, [r4, #8]
-	b	.L1934
-.L1933:
+	b	.L1994
+.L1993:
 	ldr	r3, [sp, #24]
 	cmp	r6, r3
-	bne	.L1935
-	ldr	r3, .L1958+20
+	bne	.L1995
+	ldr	r3, .L2018+20
 	ldrh	r2, [fp, #0]
 	ldr	r1, [sp, #16]
 	ldr	r3, [r3, #0]
@@ -17457,18 +18146,18 @@ ftl_read:
 	mul	r3, r2, r6
 	rsb	sl, r3, r1
 	cmp	sl, r2
-	bne	.L1934
-	b	.L1955
-.L1935:
+	bne	.L1994
+	b	.L2015
+.L1995:
 	ldrh	r3, [fp, #0]
 	muls	r3, r6, r3
-.L1955:
+.L2015:
 	rsb	r3, r8, r3
 	add	r3, r7, r3, lsl #9
 	str	r3, [r4, #8]
-.L1934:
-	ldr	r3, .L1958+24
-	ldr	r2, .L1958+28
+.L1994:
+	ldr	r3, .L2018+24
+	ldr	r2, .L2018+28
 	str	r6, [r4, #16]
 	ldrh	r3, [r3, #0]
 	muls	r3, r5, r3
@@ -17477,20 +18166,20 @@ ftl_read:
 	bic	r3, r3, #3
 	adds	r3, r2, r3
 	str	r3, [r4, #12]
-.L1932:
+.L1992:
 	ldr	r3, [sp, #8]
 	adds	r6, r6, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #8]
-	beq	.L1936
-	ldr	r3, .L1958+32
+	beq	.L1996
+	ldr	r3, .L2018+32
 	ldrh	r3, [r3, #0]
 	cmp	r5, r3, lsl #2
-	bne	.L1953
-.L1936:
+	bne	.L2013
+.L1996:
 	cmp	r5, #0
-	beq	.L1953
-	ldr	r4, .L1958+12
+	beq	.L2013
+	ldr	r4, .L2018+12
 	mov	r1, r5
 	movs	r2, #0
 	ldr	r0, [r4, #0]
@@ -17506,7 +18195,7 @@ ftl_read:
 	str	r3, [sp, #52]
 	movs	r3, #0
 	str	r3, [sp, #28]
-.L1944:
+.L2004:
 	movs	r6, #36
 	ldr	r3, [sp, #28]
 	muls	r6, r3, r6
@@ -17515,110 +18204,110 @@ ftl_read:
 	adds	r3, r3, r6
 	ldr	r2, [r3, #16]
 	cmp	r2, r1
-	bne	.L1938
+	bne	.L1998
 	ldr	r1, [r3, #8]
-	ldr	r3, .L1958+16
+	ldr	r3, .L2018+16
 	ldr	r3, [r3, #0]
 	cmp	r1, r3
-	bne	.L1939
+	bne	.L1999
 	ldr	r3, [sp, #44]
 	mov	r0, r7
 	ldr	r2, [sp, #48]
 	adds	r1, r1, r3
-	b	.L1956
-.L1938:
+	b	.L2016
+.L1998:
 	ldr	r1, [sp, #24]
 	cmp	r2, r1
-	bne	.L1939
-	ldr	r2, .L1958+20
+	bne	.L1999
+	ldr	r2, .L2018+20
 	ldr	r1, [r3, #8]
 	ldr	r3, [r2, #0]
 	cmp	r1, r3
-	bne	.L1939
+	bne	.L1999
 	ldrh	r0, [fp, #0]
 	ldr	r3, [sp, #24]
 	muls	r0, r3, r0
 	rsb	r0, r8, r0
 	ldr	r2, [sp, #52]
 	add	r0, r7, r0, lsl #9
-.L1956:
+.L2016:
 	bl	memcpy
-.L1939:
+.L1999:
 	ldr	r3, [r4, #0]
 	adds	r2, r3, r6
 	ldr	r3, [r3, r6]
-	adds	r0, r3, #1
-	bne	.L1940
-	ldr	r2, .L1958+36
+	adds	r1, r3, #1
+	bne	.L2000
+	ldr	r2, .L2018+36
 	str	r3, [sp, #12]
 	ldr	r1, [r2, #72]
 	adds	r1, r1, #1
 	str	r1, [r2, #72]
-	b	.L1941
-.L1940:
+	b	.L2001
+.L2000:
 	cmp	r3, #256
-	bne	.L1941
+	bne	.L2001
 	ldr	r0, [r2, #4]
 	movw	r6, #2049
 	ubfx	r0, r0, #10, #16
 	bl	P2V_block_in_plane
 	str	r0, [sp, #56]
 	bl	FtlGcRefreshBlock
-.L1943:
+.L2003:
 	subs	r6, r6, #1
-	beq	.L1942
+	beq	.L2002
 	movs	r0, #1
 	mov	r1, r0
 	bl	rk_ftl_garbage_collect
-	ldr	r1, .L1958+40
+	ldr	r1, .L2018+40
 	ldr	r2, [sp, #56]
 	ldrh	r3, [r1, #0]
 	cmp	r3, r2
-	beq	.L1943
-.L1942:
+	beq	.L2003
+.L2002:
 	bl	FtlSysFlush
-.L1941:
+.L2001:
 	ldr	r3, [sp, #28]
 	adds	r3, r3, #1
 	str	r3, [sp, #28]
 	cmp	r3, r5
-	bne	.L1944
+	bne	.L2004
 	ldr	r6, [sp, #60]
 	movs	r5, #0
-.L1953:
+.L2013:
 	ldr	r3, [sp, #8]
 	cmp	r3, #0
-	bne	.L1945
-	ldr	r3, .L1958+44
+	bne	.L2005
+	ldr	r3, .L2018+44
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L1926
+	cbz	r3, .L1986
 	ldr	r0, [sp, #8]
 	movs	r1, #1
 	bl	rk_ftl_garbage_collect
-	b	.L1926
-.L1946:
+	b	.L1986
+.L2006:
 	mov	r3, #-1
-.L1947:
+.L2007:
 	str	r3, [sp, #12]
-.L1926:
+.L1986:
 	ldr	r0, [sp, #12]
 	add	sp, sp, #72
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1959:
+.L2019:
 	.align	2
-.L1958:
+.L2018:
 	.word	.LANCHOR84
-	.word	.LANCHOR222
-	.word	.LANCHOR160
-	.word	.LANCHOR173
-	.word	.LANCHOR178
-	.word	.LANCHOR179
+	.word	.LANCHOR225
+	.word	.LANCHOR163
+	.word	.LANCHOR177
+	.word	.LANCHOR182
+	.word	.LANCHOR183
 	.word	.LANCHOR74
-	.word	.LANCHOR181
+	.word	.LANCHOR185
 	.word	.LANCHOR53
-	.word	.LANCHOR141
-	.word	.LANCHOR201
-	.word	.LANCHOR148
+	.word	.LANCHOR144
+	.word	.LANCHOR202
+	.word	.LANCHOR151
 	.word	.LANCHOR71
 	.size	ftl_read, .-ftl_read
 	.section	.text.FlashReadFacBbtData,"ax",%progbits
@@ -17631,16 +18320,16 @@ FlashReadFacBbtData:
 	@ args = 0, pretend = 0, frame = 48
 	@ frame_needed = 0, uses_anonymous_args = 0
 	mov	r3, r2
-	ldr	r2, .L1969
+	ldr	r2, .L2029
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r6, r1
 	ldrh	sl, [r2, #14]
 	sub	sp, sp, #48
 	ldrh	r1, [r2, #12]
 	mov	r4, r0
-	ldr	r2, .L1969+4
+	ldr	r2, .L2029+4
 	movw	fp, #61664
-	ldr	r7, .L1969+8
+	ldr	r7, .L2029+8
 	mul	sl, sl, r1
 	ldr	r2, [r2, #0]
 	str	r2, [sp, #20]
@@ -17651,8 +18340,8 @@ FlashReadFacBbtData:
 	str	r2, [sp, #24]
 	uxth	r5, r5
 	sub	sl, sl, #15
-	b	.L1961
-.L1967:
+	b	.L2021
+.L2027:
 	add	r2, r5, r8
 	movs	r1, #1
 	add	r0, sp, #12
@@ -17664,19 +18353,19 @@ FlashReadFacBbtData:
 	ldr	r2, [sp, #12]
 	ldr	r3, [sp, #4]
 	adds	r2, r2, #1
-	beq	.L1962
+	beq	.L2022
 	ldr	r2, [r7, #0]
 	ldrh	r2, [r2, #0]
 	cmp	r2, fp
-	bne	.L1962
-	cbz	r4, .L1968
-	cbnz	r6, .L1964
-	ldr	r2, .L1969+4
+	bne	.L2022
+	cbz	r4, .L2028
+	cbnz	r6, .L2024
+	ldr	r2, .L2029+4
 	movs	r0, #1
-	ldr	r5, .L1969+12
+	ldr	r5, .L2029+12
 	ldr	r2, [r2, #0]
-	b	.L1965
-.L1966:
+	b	.L2025
+.L2026:
 	ubfx	r1, r6, #5, #16
 	and	r7, r6, #31
 	adds	r6, r6, #1
@@ -17685,44 +18374,44 @@ FlashReadFacBbtData:
 	uxth	r6, r6
 	orr	r7, lr, r7
 	str	r7, [r2, r1, lsl #2]
-.L1965:
+.L2025:
 	ldr	r1, [r5, #0]
 	cmp	r6, r1
-	bcc	.L1966
-.L1964:
-	ldr	r2, .L1969+4
+	bcc	.L2026
+.L2024:
+	ldr	r2, .L2029+4
 	mov	r0, r4
 	ldr	r1, [r2, #0]
 	mov	r2, r3
 	bl	memcpy
 	movs	r2, #4
-	ldr	r0, .L1969+16
+	ldr	r0, .L2029+16
 	mov	r1, r4
 	mov	r3, r2
 	bl	rknand_print_hex
 	movs	r0, #0
-	b	.L1963
-.L1962:
+	b	.L2023
+.L2022:
 	subs	r5, r5, #1
 	uxth	r5, r5
-.L1961:
+.L2021:
 	cmp	sl, r5
-	ble	.L1967
+	ble	.L2027
 	mov	r0, #-1
-	b	.L1963
-.L1968:
+	b	.L2023
+.L2028:
 	mov	r0, r4
-.L1963:
+.L2023:
 	add	sp, sp, #48
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L1970:
+.L2030:
 	.align	2
-.L1969:
+.L2029:
 	.word	.LANCHOR28
 	.word	.LANCHOR44
-	.word	.LANCHOR234
+	.word	.LANCHOR241
 	.word	.LANCHOR46
-	.word	.LC35
+	.word	.LC50
 	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
 	.section	.text.FlashGetBadBlockList,"ax",%progbits
 	.align	1
@@ -17735,8 +18424,8 @@ FlashGetBadBlockList:
 	@ frame_needed = 0, uses_anonymous_args = 0
 	push	{r3, r4, r5, r6, r7, lr}
 	mov	r5, r0
-	ldr	r3, .L1978
-	ldr	r6, .L1978+4
+	ldr	r3, .L2038
+	ldr	r6, .L2038+4
 	ldr	r3, [r3, #0]
 	ldr	r0, [r6, #0]
 	ldrb	r2, [r3, #13]	@ zero_extendqisi2
@@ -17747,43 +18436,43 @@ FlashGetBadBlockList:
 	lsrs	r2, r2, #3
 	bl	FlashReadFacBbtData
 	adds	r0, r0, #1
-	beq	.L1977
+	beq	.L2037
 	movs	r2, #0
 	lsrs	r0, r4, #4
 	ldr	r6, [r6, #0]
 	mov	r3, r2
 	subs	r4, r4, #1
 	movs	r1, #1
-	b	.L1973
-.L1975:
+	b	.L2033
+.L2035:
 	lsrs	r7, r2, #5
 	and	ip, r2, #31
 	lsl	ip, r1, ip
 	ldr	r7, [r6, r7, lsl #2]
 	tst	ip, r7
-	beq	.L1974
+	beq	.L2034
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L1974:
+.L2034:
 	cmp	r3, r0
-	bcs	.L1977
+	bcs	.L2037
 	adds	r2, r2, #1
 	uxth	r2, r2
-.L1973:
+.L2033:
 	cmp	r2, r4
-	blt	.L1975
-	b	.L1972
-.L1977:
+	blt	.L2035
+	b	.L2032
+.L2037:
 	movs	r3, #0
-.L1972:
+.L2032:
 	movw	r2, #65535
 	movs	r0, #0
 	strh	r2, [r5, r3, lsl #1]	@ movhi
 	pop	{r3, r4, r5, r6, r7, pc}
-.L1979:
+.L2039:
 	.align	2
-.L1978:
+.L2038:
 	.word	.LANCHOR23
 	.word	.LANCHOR41
 	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
@@ -17796,21 +18485,24 @@ FlashGetBadBlockList:
 FtlMakeBbt:
 	@ args = 0, pretend = 0, frame = 8
 	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2059
 	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r4, [r3, #0]
+	cmp	r4, #0
+	bne	.L2041
+	ldr	r5, .L2059+4
 	bl	FtlBbtMemInit
-	movs	r4, #0
-	ldr	r5, .L1998
+	ldr	r6, .L2059+8
 	bl	FtlLoadFactoryBbt
-	ldr	r6, .L1998+4
 	add	r2, r5, #12
 	str	r2, [sp, #4]
-	b	.L1981
-.L1987:
-	ldr	r3, .L1998+8
+	b	.L2042
+.L2048:
+	ldr	r3, .L2059+12
 	ldr	r2, [sp, #4]
-	ldr	r8, .L1998+20
+	ldr	r8, .L2059+24
 	ldr	r0, [r3, #0]
-	ldr	r3, .L1998+12
+	ldr	r3, .L2059+16
 	str	r0, [r8, #8]
 	ldr	sl, [r3, #0]
 	ldrh	r3, [r2], #2
@@ -17818,7 +18510,7 @@ FtlMakeBbt:
 	str	r2, [sp, #4]
 	movw	r2, #65535
 	cmp	r3, r2
-	beq	.L1982
+	beq	.L2043
 	ldrh	r7, [r6, #0]
 	movs	r1, #1
 	mov	r2, r1
@@ -17833,8 +18525,8 @@ FtlMakeBbt:
 	ldr	r1, [r8, #8]
 	lsrs	r2, r2, #3
 	bl	memcpy
-	b	.L1983
-.L1982:
+	b	.L2044
+.L2043:
 	mov	r1, r4
 	bl	FlashGetBadBlockList
 	ldr	r1, [r5, #28]
@@ -17847,20 +18539,20 @@ FtlMakeBbt:
 	mov	r4, sl
 	mov	sl, r3
 	uxth	fp, fp
-	b	.L1996
-.L1985:
+	b	.L2057
+.L2046:
 	add	fp, fp, #-1
 	uxth	fp, fp
-.L1996:
+.L2057:
 	ldrh	r0, [r6, #0]
 	mla	r0, r5, r0, fp
 	uxth	r0, r0
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1985
+	beq	.L2046
 	ldr	r3, [sp, #4]
 	movs	r1, #0
-	ldr	r2, .L1998+12
+	ldr	r2, .L2059+16
 	strh	fp, [r3, #-2]	@ movhi
 	ldr	r0, [r2, #0]
 	movs	r2, #16
@@ -17878,91 +18570,91 @@ FtlMakeBbt:
 	ldr	r1, [sl, #28]
 	lsls	r3, r7, #10
 	str	r3, [r8, #4]
-	ldr	r3, .L1998+16
+	ldr	r3, .L2059+20
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #2
 	bl	memcpy
 	movs	r1, #1
 	mov	r2, r1
-	ldr	r0, .L1998+20
+	ldr	r0, .L2059+24
 	bl	FlashEraseBlocks
 	movs	r1, #1
 	mov	r3, r1
-	ldr	r0, .L1998+20
+	ldr	r0, .L2059+24
 	mov	r2, r1
 	bl	FlashProgPages
 	ldr	r3, [r8, #0]
 	adds	r3, r3, #1
-	bne	.L1997
+	bne	.L2058
 	uxth	r0, r7
 	bl	FtlBbmMapBadBlock
-	b	.L1996
-.L1997:
+	b	.L2057
+.L2058:
 	mov	r4, r5
 	mov	r5, sl
-.L1983:
+.L2044:
 	uxth	r0, r7
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	adds	r5, r5, #4
-.L1981:
-	ldr	r2, .L1998+24
+.L2042:
+	ldr	r2, .L2059+28
 	ldrh	r3, [r2, #0]
 	cmp	r4, r3
-	bcc	.L1987
+	bcc	.L2048
 	movs	r4, #0
-	ldr	r5, .L1998+28
-	b	.L1988
-.L1989:
+	ldr	r5, .L2059+32
+	b	.L2049
+.L2050:
 	mov	r0, r4
 	adds	r4, r4, #1
 	bl	FtlBbmMapBadBlock
 	uxth	r4, r4
-.L1988:
+.L2049:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L1989
-	ldr	r5, .L1998
+	bhi	.L2050
+	ldr	r5, .L2059+4
 	movw	r6, #65535
 	ldrh	r4, [r5, #12]
 	subs	r4, r4, #1
 	uxth	r4, r4
-	b	.L1990
-.L1995:
+	b	.L2051
+.L2056:
 	mov	r0, r4
 	bl	FtlBbmIsBadBlock
 	cmp	r0, #1
-	beq	.L1991
+	beq	.L2052
 	mov	r0, r4
 	bl	FlashTestBlk
-	cbz	r0, .L1992
+	cbz	r0, .L2053
 	mov	r0, r4
 	bl	FtlBbmMapBadBlock
-	b	.L1991
-.L1992:
+	b	.L2052
+.L2053:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r6
-	bne	.L1993
+	bne	.L2054
 	strh	r4, [r5, #0]	@ movhi
-	b	.L1991
-.L1993:
-	ldr	r3, .L1998
+	b	.L2052
+.L2054:
+	ldr	r3, .L2059+4
 	strh	r4, [r3, #4]	@ movhi
-	b	.L1994
-.L1991:
+	b	.L2055
+.L2052:
 	subs	r4, r4, #1
 	uxth	r4, r4
-.L1990:
+.L2051:
 	ldrh	r3, [r5, #12]
 	subs	r3, r3, #47
 	cmp	r3, r4
-	ble	.L1995
-.L1994:
-	ldr	r4, .L1998
+	ble	.L2056
+.L2055:
+	ldr	r4, .L2059+4
 	movs	r5, #0
-	ldr	r3, .L1998+32
-	movs	r1, #1
+	ldr	r3, .L2059+36
 	movs	r2, #2
+	movs	r1, #1
 	str	r5, [r4, #8]
 	ldr	r0, [r3, #0]
 	ldrh	r3, [r4, #0]
@@ -17987,20 +18679,22 @@ FtlMakeBbt:
 	strh	r2, [r4, #0]	@ movhi
 	strh	r3, [r4, #4]	@ movhi
 	bl	FtlBbmTblFlush
-	mov	r0, r5
+.L2041:
+	movs	r0, #0
 	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
-.L1999:
+.L2060:
 	.align	2
-.L1998:
-	.word	.LANCHOR89
-	.word	.LANCHOR66
-	.word	.LANCHOR96
-	.word	.LANCHOR180
+.L2059:
+	.word	.LANCHOR94
 	.word	.LANCHOR90
-	.word	.LANCHOR197
+	.word	.LANCHOR66
+	.word	.LANCHOR98
+	.word	.LANCHOR184
+	.word	.LANCHOR91
+	.word	.LANCHOR198
 	.word	.LANCHOR60
 	.word	.LANCHOR75
-	.word	.LANCHOR93
+	.word	.LANCHOR95
 	.size	FtlMakeBbt, .-FtlMakeBbt
 	.section	.text.FtlLowFormat,"ax",%progbits
 	.align	1
@@ -18011,45 +18705,48 @@ FtlMakeBbt:
 FtlLowFormat:
 	@ args = 0, pretend = 0, frame = 0
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r2, .L2021
-	movs	r3, #0
+	ldr	r3, .L2082
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L2062
+	ldr	r2, .L2082+4
 	str	r3, [r2, #0]
-	ldr	r2, .L2021+4
+	ldr	r2, .L2082+8
 	str	r3, [r2, #0]
-	ldr	r3, .L2021+8
+	ldr	r3, .L2082+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
 	bl	FtlLoadBbt
-	cbz	r0, .L2001
+	cbz	r0, .L2063
 	bl	FtlMakeBbt
-.L2001:
-	ldr	r3, .L2021+12
-	ldr	r2, .L2021+16
+.L2063:
+	ldr	r3, .L2082+16
+	ldr	r2, .L2082+20
 	ldrh	r4, [r3, #0]
-	ldr	r3, .L2021+20
+	ldr	r3, .L2082+24
 	lsls	r4, r4, #7
 	ldr	r0, [r3, #0]
-	ldr	r3, .L2021+24
+	ldr	r3, .L2082+28
 	ldr	r1, [r3, #0]
 	movs	r3, #0
-	b	.L2002
-.L2003:
+	b	.L2064
+.L2065:
 	mvns	r5, r3
 	orr	r5, r3, r5, lsl #16
 	str	r5, [r0, r3, lsl #2]
 	str	r2, [r1, r3, lsl #2]
 	adds	r3, r3, #1
 	uxth	r3, r3
-.L2002:
+.L2064:
 	cmp	r3, r4
-	blt	.L2003
-	ldr	r3, .L2021+28
+	blt	.L2065
+	ldr	r3, .L2082+32
 	movs	r4, #0
-	ldr	r6, .L2021+32
+	ldr	r6, .L2082+36
 	ldrh	r5, [r3, #0]
-	b	.L2004
-.L2005:
+	b	.L2066
+.L2067:
 	mov	r0, r5
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
@@ -18057,47 +18754,47 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2004:
+.L2066:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2005
-	ldr	r3, .L2021+36
+	bhi	.L2067
+	ldr	r3, .L2082+40
 	ldrh	r1, [r3, #0]
 	subs	r3, r4, #2
 	cmp	r3, r1, lsl #1
-	bgt	.L2006
-.L2010:
+	bgt	.L2068
+.L2072:
 	movs	r4, #0
-	ldr	r6, .L2021+28
+	ldr	r6, .L2082+32
 	mov	r5, r4
-	b	.L2007
-.L2006:
+	b	.L2069
+.L2068:
 	mov	r0, r4
-	ldr	r5, .L2021+32
+	ldr	r5, .L2082+36
 	bl	__aeabi_uidiv
-	ldr	r3, .L2021+40
+	ldr	r3, .L2082+44
 	ldr	r3, [r3, #0]
 	adds	r0, r0, r3
 	uxth	r0, r0
 	bl	FtlSysBlkNumInit
-	ldr	r3, .L2021+8
+	ldr	r3, .L2082+12
 	ldrh	r0, [r3, #0]
 	bl	FtlFreeSysBlkQueueInit
-	ldr	r3, .L2021+28
+	ldr	r3, .L2082+32
 	ldrh	r4, [r3, #0]
-	b	.L2008
-.L2009:
+	b	.L2070
+.L2071:
 	mov	r0, r4
 	movs	r1, #1
 	bl	FtlLowFormatEraseBlock
 	adds	r4, r4, #1
 	uxth	r4, r4
-.L2008:
+.L2070:
 	ldrh	r3, [r5, #0]
 	cmp	r3, r4
-	bhi	.L2009
-	b	.L2010
-.L2011:
+	bhi	.L2071
+	b	.L2072
+.L2073:
 	mov	r0, r5
 	movs	r1, #0
 	bl	FtlLowFormatEraseBlock
@@ -18105,19 +18802,19 @@ FtlLowFormat:
 	uxth	r5, r5
 	adds	r4, r4, r0
 	uxth	r4, r4
-.L2007:
+.L2069:
 	ldrh	r3, [r6, #0]
 	cmp	r3, r5
-	bhi	.L2011
-	ldr	r3, .L2021+32
-	ldr	r8, .L2021+64
-	ldr	sl, .L2021+68
+	bhi	.L2073
+	ldr	r3, .L2082+36
+	ldr	r8, .L2082+68
+	ldr	sl, .L2082+72
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2021+44
+	ldr	r3, .L2082+48
 	str	r2, [r3, #0]
-	ldr	r3, .L2021+48
+	ldr	r3, .L2082+52
 	ldr	fp, [r3, #0]
-	ldr	r3, .L2021+36
+	ldr	r3, .L2082+40
 	mov	r0, fp
 	ldrh	r5, [r3, #0]
 	mov	r1, r5
@@ -18130,7 +18827,7 @@ FtlLowFormat:
 	muls	r3, r5, r3
 	cmp	r4, r3
 	str	r0, [sl, #0]
-	ble	.L2012
+	ble	.L2074
 	rsb	r0, r4, fp
 	mov	r1, r5
 	bl	__aeabi_uidiv
@@ -18138,113 +18835,113 @@ FtlLowFormat:
 	lsrs	r0, r0, #5
 	adds	r0, r0, #24
 	strh	r0, [r8, #0]	@ movhi
-.L2012:
-	ldr	r3, .L2021+52
+.L2074:
+	ldr	r3, .L2082+56
 	ldr	r3, [r3, #0]
 	cmp	r3, #1
-	bne	.L2013
+	bne	.L2075
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2021+64
+	ldr	r8, .L2082+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2013:
-	ldr	r3, .L2021+56
+.L2075:
+	ldr	r3, .L2082+60
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2014
+	cbz	r3, .L2076
 	mov	r0, r4
 	mov	r1, r5
 	bl	__aeabi_uidiv
-	ldr	r8, .L2021+64
+	ldr	r8, .L2082+68
 	ldrh	sl, [r8, #0]
 	uxtah	r0, sl, r0
 	add	sl, sl, r0, lsr #2
 	strh	sl, [r8, #0]	@ movhi
-.L2014:
-	ldr	r3, .L2021+60
+.L2076:
+	ldr	r3, .L2082+64
 	ldrh	r3, [r3, #0]
-	cbz	r3, .L2015
-	ldr	r2, .L2021+64
+	cbz	r3, .L2077
+	ldr	r2, .L2082+68
 	ldrh	r1, [r2, #0]
 	add	r1, r1, r3, lsr #1
 	strh	r1, [r2, #0]	@ movhi
 	mul	r1, r5, r3
 	cmp	r1, r4
-	ble	.L2015
-	ldr	r1, .L2021+68
+	ble	.L2077
+	ldr	r1, .L2082+72
 	adds	r3, r3, #32
 	adds	r7, r7, r3
 	strh	r7, [r2, #0]	@ movhi
 	str	r6, [r1, #0]
-.L2015:
-	ldr	r3, .L2021+68
-	ldr	r2, .L2021+64
-	ldr	r6, .L2021+72
+.L2077:
+	ldr	r3, .L2082+72
+	ldr	r2, .L2082+68
+	ldr	r6, .L2082+76
 	ldr	r1, [r3, #0]
 	ldrh	r2, [r2, #0]
-	ldr	r4, .L2021+76
+	ldr	r4, .L2082+80
 	subs	r2, r1, r2
 	muls	r5, r2, r5
-	ldr	r2, .L2021+80
+	ldr	r2, .L2082+84
 	str	r5, [r2, #0]
-	ldr	r2, .L2021+84
+	ldr	r2, .L2082+88
 	ldrh	r2, [r2, #0]
 	muls	r5, r2, r5
 	str	r5, [r3, #0]
-	ldr	r3, .L2021+12
+	ldr	r3, .L2082+16
 	ldrh	r3, [r3, #0]
 	muls	r5, r3, r5
-	ldr	r3, .L2021+88
+	ldr	r3, .L2082+92
 	str	r5, [r3, #0]
 	movw	r5, #65535
 	bl	FtlBbmTblFlush
-	ldr	r3, .L2021+32
+	ldr	r3, .L2082+36
 	movs	r1, #0
 	ldr	r0, [r6, #0]
 	ldrh	r2, [r3, #0]
 	lsls	r2, r2, #1
 	bl	memset
-	ldr	r2, .L2021+92
+	ldr	r2, .L2082+96
 	movs	r3, #0
 	strh	r3, [r4, #2]	@ movhi
 	strb	r3, [r4, #6]
 	movs	r1, #255
 	str	r3, [r2, #0]
-	ldr	r2, .L2021+96
+	ldr	r2, .L2082+100
 	strh	r3, [r4, #0]	@ movhi
 	strh	r3, [r2, #2]	@ movhi
 	strb	r3, [r2, #6]
 	strb	r3, [r2, #8]
 	movs	r3, #1
 	strb	r3, [r4, #8]
-	ldr	r3, .L2021+28
+	ldr	r3, .L2082+32
 	strh	r5, [r2, #0]	@ movhi
 	ldrh	r2, [r3, #0]
-	ldr	r3, .L2021+100
+	ldr	r3, .L2082+104
 	lsrs	r2, r2, #3
 	ldr	r0, [r3, #0]
 	bl	memset
-.L2016:
-	ldr	r7, .L2021+76
+.L2078:
+	ldr	r7, .L2082+80
 	mov	r0, r7
 	bl	make_superblock
 	ldrb	r2, [r4, #7]	@ zero_extendqisi2
-	ldr	r3, .L2021+72
-	cbnz	r2, .L2017
+	ldr	r3, .L2082+76
+	cbnz	r2, .L2079
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r6, #0]
 	strh	r5, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2016
-.L2017:
-	ldr	r2, .L2021
+	b	.L2078
+.L2079:
+	ldr	r2, .L2082+4
 	movw	r6, #65535
-	ldr	r4, .L2021+104
+	ldr	r4, .L2082+108
 	ldrh	r0, [r7, #4]
 	ldr	r1, [r2, #0]
 	str	r1, [r7, #12]
@@ -18262,52 +18959,53 @@ FtlLowFormat:
 	strh	r2, [r4, #0]	@ movhi
 	movs	r2, #1
 	strb	r2, [r4, #8]
-.L2018:
-	ldr	r5, .L2021+104
+.L2080:
+	ldr	r5, .L2082+108
 	mov	r0, r5
 	bl	make_superblock
 	ldrb	r3, [r4, #7]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2019
+	bne	.L2081
 	ldrh	r2, [r4, #0]
 	ldr	r3, [r7, #0]
 	strh	r6, [r3, r2, lsl #1]	@ movhi
 	ldrh	r3, [r4, #0]
 	adds	r3, r3, #1
 	strh	r3, [r4, #0]	@ movhi
-	b	.L2018
-.L2022:
+	b	.L2080
+.L2083:
 	.align	2
-.L2021:
-	.word	.LANCHOR153
-	.word	.LANCHOR154
+.L2082:
+	.word	.LANCHOR94
+	.word	.LANCHOR156
+	.word	.LANCHOR157
 	.word	.LANCHOR54
 	.word	.LANCHOR71
 	.word	168778952
-	.word	.LANCHOR178
-	.word	.LANCHOR179
+	.word	.LANCHOR182
+	.word	.LANCHOR183
 	.word	.LANCHOR55
 	.word	.LANCHOR56
 	.word	.LANCHOR53
 	.word	.LANCHOR81
-	.word	.LANCHOR88
+	.word	.LANCHOR89
 	.word	.LANCHOR57
-	.word	.LANCHOR126
+	.word	.LANCHOR128
 	.word	.LANCHOR7
 	.word	.LANCHOR64
+	.word	.LANCHOR201
+	.word	.LANCHOR88
+	.word	.LANCHOR101
+	.word	.LANCHOR109
 	.word	.LANCHOR200
-	.word	.LANCHOR87
-	.word	.LANCHOR99
-	.word	.LANCHOR107
-	.word	.LANCHOR199
 	.word	.LANCHOR68
 	.word	.LANCHOR84
-	.word	.LANCHOR116
-	.word	.LANCHOR201
-	.word	.LANCHOR117
-	.word	.LANCHOR108
-.L2019:
-	ldr	r4, .L2023
+	.word	.LANCHOR118
+	.word	.LANCHOR202
+	.word	.LANCHOR119
+	.word	.LANCHOR110
+.L2081:
+	ldr	r4, .L2084
 	ldrh	r1, [r5, #4]
 	ldrh	r2, [r5, #0]
 	ldr	r3, [r4, #0]
@@ -18315,16 +19013,16 @@ FtlLowFormat:
 	adds	r3, r3, #1
 	str	r3, [r4, #0]
 	movw	r5, #65535
-	ldr	r3, .L2023+4
+	ldr	r3, .L2084+4
 	ldr	r3, [r3, #0]
 	strh	r1, [r3, r2, lsl #1]	@ movhi
-	ldr	r3, .L2023+8
+	ldr	r3, .L2084+8
 	strh	r5, [r3, #0]	@ movhi
 	bl	FtlFreeSysBlkQueueOut
-	ldr	r3, .L2023+12
+	ldr	r3, .L2084+12
 	movs	r2, #0
 	strh	r2, [r3, #2]	@ movhi
-	ldr	r2, .L2023+16
+	ldr	r2, .L2084+16
 	strh	r5, [r3, #4]	@ movhi
 	ldr	r2, [r2, #0]
 	strh	r2, [r3, #6]	@ movhi
@@ -18335,22 +19033,22 @@ FtlLowFormat:
 	strh	r0, [r3, #0]	@ movhi
 	bl	FtlVpcTblFlush
 	bl	FtlSysBlkInit
-	cbnz	r0, .L2020
-	ldr	r3, .L2023+20
+	cbnz	r0, .L2062
+	ldr	r3, .L2084+20
 	movs	r2, #1
 	str	r2, [r3, #0]
-.L2020:
+.L2062:
 	movs	r0, #0
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2024:
+.L2085:
 	.align	2
-.L2023:
-	.word	.LANCHOR153
-	.word	.LANCHOR99
-	.word	.LANCHOR109
-	.word	.LANCHOR191
-	.word	.LANCHOR199
-	.word	.LANCHOR222
+.L2084:
+	.word	.LANCHOR156
+	.word	.LANCHOR101
+	.word	.LANCHOR111
+	.word	.LANCHOR196
+	.word	.LANCHOR200
+	.word	.LANCHOR225
 	.size	FtlLowFormat, .-FtlLowFormat
 	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
 	.align	1
@@ -18361,7 +19059,7 @@ FtlLowFormat:
 HynixGetReadRetryDefault:
 	@ args = 0, pretend = 0, frame = 64
 	@ frame_needed = 0, uses_anonymous_args = 0
-	ldr	r3, .L2114
+	ldr	r3, .L2175
 	movs	r2, #172
 	push	{r4, r5, r6, r7, r8, sl, fp, lr}
 	mov	r4, r0
@@ -18375,16 +19073,16 @@ HynixGetReadRetryDefault:
 	strb	r0, [r3, #5]
 	strb	r1, [r3, #6]
 	strb	r2, [r3, #7]
-	bne	.L2026
+	bne	.L2087
 	movs	r2, #167
 	strb	r2, [r3, #4]
-	ldr	r3, .L2114+4
+	ldr	r3, .L2175+4
 	movs	r2, #247
 	strb	r2, [r3, #17]
-	b	.L2081
-.L2026:
+	b	.L2142
+.L2087:
 	cmp	r4, #3
-	bne	.L2028
+	bne	.L2089
 	movs	r2, #176
 	strb	r2, [r3, #4]
 	movs	r2, #177
@@ -18400,10 +19098,10 @@ HynixGetReadRetryDefault:
 	movs	r2, #182
 	strb	r2, [r3, #10]
 	movs	r2, #183
-	b	.L2108
-.L2028:
+	b	.L2169
+.L2089:
 	cmp	r4, #4
-	bne	.L2029
+	bne	.L2090
 	movs	r5, #204
 	strb	r0, [r3, #9]
 	strb	r5, [r3, #4]
@@ -18416,14 +19114,14 @@ HynixGetReadRetryDefault:
 	strb	r5, [r3, #7]
 	movs	r5, #205
 	strb	r5, [r3, #8]
-.L2108:
+.L2169:
 	movs	r6, #8
 	strb	r2, [r3, #11]
 	mov	r5, r6
-	b	.L2027
-.L2029:
+	b	.L2088
+.L2090:
 	cmp	r4, #5
-	bne	.L2030
+	bne	.L2091
 	movs	r2, #56
 	movs	r6, #8
 	strb	r2, [r3, #4]
@@ -18433,10 +19131,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #59
 	strb	r2, [r3, #7]
-	b	.L2107
-.L2030:
+	b	.L2168
+.L2091:
 	cmp	r4, #6
-	bne	.L2031
+	bne	.L2092
 	movs	r2, #14
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -18446,10 +19144,10 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #6]
 	movs	r2, #17
 	strb	r2, [r3, #7]
-	b	.L2107
-.L2031:
+	b	.L2168
+.L2092:
 	cmp	r4, #7
-	bne	.L2081
+	bne	.L2142
 	movs	r2, #176
 	movs	r6, #12
 	strb	r2, [r3, #4]
@@ -18472,21 +19170,21 @@ HynixGetReadRetryDefault:
 	strb	r2, [r3, #12]
 	movs	r2, #213
 	strb	r2, [r3, #13]
-	b	.L2027
-.L2081:
+	b	.L2088
+.L2142:
 	movs	r6, #7
-.L2107:
+.L2168:
 	movs	r5, #4
-.L2027:
+.L2088:
 	subs	r3, r4, #1
 	cmp	r3, #1
-	bhi	.L2103
-	b	.L2112
-.L2038:
-	ldr	r3, .L2114+8
+	bhi	.L2164
+	b	.L2173
+.L2099:
+	ldr	r3, .L2175+8
 	mov	sl, #0
-	ldr	r1, .L2114+12
-	ldr	r4, .L2114+16
+	ldr	r1, .L2175+12
+	ldr	r4, .L2175+16
 	ldrb	r2, [r3, r7]	@ zero_extendqisi2
 	ldr	r0, [r1, r2, lsl #3]
 	add	r4, r4, r2, lsl #6
@@ -18495,7 +19193,7 @@ HynixGetReadRetryDefault:
 	movs	r2, #55
 	adds	r3, r3, #8
 	add	r3, r0, r3, lsl #8
-.L2034:
+.L2095:
 	add	r1, r8, sl
 	str	r2, [r3, #8]
 	movs	r0, #80
@@ -18511,26 +19209,26 @@ HynixGetReadRetryDefault:
 	ldr	r2, [sp, #8]
 	uxtb	r1, sl
 	cmp	r1, r5
-	bcc	.L2034
+	bcc	.L2095
 	movs	r3, #0
-	b	.L2035
-.L2036:
+	b	.L2096
+.L2097:
 	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
 	ldrb	r0, [r4, r3]	@ zero_extendqisi2
 	add	r0, ip, r0
 	strb	r0, [r1, r2, lsl #3]
 	adds	r2, r2, #1
 	cmp	r2, #7
-	bne	.L2036
+	bne	.L2097
 	adds	r3, r3, #1
 	cmp	r3, #4
-	beq	.L2037
-.L2035:
+	beq	.L2098
+.L2096:
 	movs	r2, #1
 	adds	r1, r4, r3
 	add	sl, fp, r3
-	b	.L2036
-.L2037:
+	b	.L2097
+.L2098:
 	adds	r7, r7, #1
 	movs	r3, #0
 	strb	r3, [r4, #16]
@@ -18541,21 +19239,21 @@ HynixGetReadRetryDefault:
 	strb	r3, [r4, #48]
 	strb	r3, [r4, #41]
 	strb	r3, [r4, #49]
-	b	.L2032
-.L2112:
-	ldr	r8, .L2114
+	b	.L2093
+.L2173:
+	ldr	r8, .L2175
 	movs	r7, #0
-	ldr	fp, .L2114+4
-.L2032:
-	ldr	r3, .L2114+20
+	ldr	fp, .L2175+4
+.L2093:
+	ldr	r3, .L2175+20
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, r7
-	bhi	.L2038
-	b	.L2039
-.L2103:
+	bhi	.L2099
+	b	.L2100
+.L2164:
 	subs	r3, r4, #3
 	cmp	r3, #4
-	bhi	.L2039
+	bhi	.L2100
 	smulbb	r3, r5, r6
 	str	r6, [sp, #48]
 	asrs	r2, r3, #2
@@ -18567,12 +19265,12 @@ HynixGetReadRetryDefault:
 	str	r2, [sp, #24]
 	uxtb	r3, r3
 	str	r3, [sp, #56]
-	b	.L2040
-.L2080:
-	ldr	r3, .L2114+8
+	b	.L2101
+.L2141:
+	ldr	r3, .L2175+8
 	ldr	fp, [sp, #20]
 	ldrb	r6, [r3, fp]	@ zero_extendqisi2
-	ldr	r3, .L2114+12
+	ldr	r3, .L2175+12
 	mov	r0, r6
 	ldr	sl, [r3, r6, lsl #3]
 	add	r3, r3, r6, lsl #3
@@ -18585,46 +19283,46 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	cmp	r4, #7
 	sxth	r3, r6
-	beq	.L2041
-	ldr	r1, .L2114+16
+	beq	.L2102
+	ldr	r1, .L2175+16
 	add	r3, r1, r3, lsl #6
-	b	.L2109
-.L2041:
+	b	.L2170
+.L2102:
 	lsls	r1, r3, #7
 	add	r3, r1, r3, lsl #5
-	ldr	r1, .L2114+24
+	ldr	r1, .L2175+24
 	adds	r3, r1, r3
-.L2109:
+.L2170:
 	str	r3, [sp, #32]
 	movs	r3, #54
 	cmp	r4, #4
 	str	r3, [r7, #8]
-	bne	.L2043
+	bne	.L2104
 	movs	r3, #255
 	str	r3, [r7, #4]
 	movs	r3, #64
 	str	r3, [sl, r8]
 	movs	r3, #204
-	b	.L2110
-.L2043:
+	b	.L2171
+.L2104:
 	subs	r3, r4, #5
 	cmp	r3, #1
-	bhi	.L2045
-	ldr	r3, .L2114
+	bhi	.L2106
+	ldr	r3, .L2175
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
 	str	r3, [r7, #4]
 	movs	r3, #82
-	b	.L2111
-.L2045:
+	b	.L2172
+.L2106:
 	movs	r3, #174
 	str	r3, [r7, #4]
 	movs	r3, #0
 	str	r3, [sl, r8]
 	movs	r3, #176
-.L2110:
+.L2171:
 	str	r3, [r7, #4]
 	movs	r3, #77
-.L2111:
+.L2172:
 	str	r3, [sl, r8]
 	movs	r3, #22
 	str	r3, [r7, #8]
@@ -18654,94 +19352,94 @@ HynixGetReadRetryDefault:
 	mov	r1, ip
 	str	ip, [sp, #36]
 	cmp	r1, #1
-	bls	.L2083
+	bls	.L2144
 	cmp	r4, #7
 	ite	eq
 	moveq	r1, #32
 	movne	r1, #2
-	b	.L2049
-.L2083:
+	b	.L2110
+.L2144:
 	movs	r1, #16
-.L2049:
-	ldr	r3, .L2114+28
+.L2110:
+	ldr	r3, .L2175+28
 	ldr	r2, [r3, #0]
 	movs	r3, #0
-.L2050:
+.L2111:
 	ldr	r0, [r7, #0]
 	strb	r0, [r2, r3]
 	adds	r3, r3, #1
 	uxtb	r0, r3
 	cmp	r0, r1
-	bcc	.L2050
+	bcc	.L2111
 	cmp	r4, #7
-	bne	.L2051
+	bne	.L2112
 	movs	r3, #0
-.L2053:
+.L2114:
 	ldrb	r1, [r2, #0]	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2052
+	beq	.L2113
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	cmp	r1, #10
-	beq	.L2052
+	beq	.L2113
 	adds	r3, r3, #1
 	adds	r2, r2, #4
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2053
-	b	.L2054
-.L2052:
+	bne	.L2114
+	b	.L2115
+.L2113:
 	cmp	r3, #6
-	bls	.L2055
-.L2054:
-	ldr	r0, .L2114+32
+	bls	.L2116
+.L2115:
+	ldr	r0, .L2175+32
 	movs	r1, #0
 	bl	printf
-.L2056:
-	b	.L2056
-.L2051:
+.L2117:
+	b	.L2117
+.L2112:
 	cmp	r4, #6
-	bne	.L2055
+	bne	.L2116
 	movs	r3, #0
-.L2057:
+.L2118:
 	ldrb	r1, [r2], #1	@ zero_extendqisi2
 	cmp	r1, #12
-	beq	.L2055
+	beq	.L2116
 	ldrb	r1, [r2, #7]	@ zero_extendqisi2
 	cmp	r1, #4
-	beq	.L2055
+	beq	.L2116
 	adds	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #8
-	bne	.L2057
-	b	.L2113
-.L2059:
-	b	.L2059
-.L2115:
+	bne	.L2118
+	b	.L2174
+.L2120:
+	b	.L2120
+.L2176:
 	.align	2
-.L2114:
+.L2175:
 	.word	.LANCHOR31
-	.word	.LANCHOR235
+	.word	.LANCHOR242
 	.word	.LANCHOR19
 	.word	.LANCHOR5
 	.word	.LANCHOR31+20
 	.word	.LANCHOR16
 	.word	.LANCHOR31+28
 	.word	.LANCHOR44
-	.word	.LC36
-.L2055:
-	ldr	r0, .L2116
+	.word	.LC51
+.L2116:
+	ldr	r0, .L2177
 	movs	r3, #0
 	ldr	r0, [r0, #0]
 	str	r0, [sp, #40]
-.L2060:
+.L2121:
 	ldr	r2, [r7, #0]
 	ldr	r1, [sp, #40]
 	strb	r2, [r1, r3]
 	adds	r3, r3, #1
 	ldr	r2, [sp, #52]
 	cmp	r3, r2
-	blt	.L2060
-	ldr	r3, .L2116
+	blt	.L2121
+	ldr	r3, .L2177
 	movs	r2, #8
 	ldr	ip, [sp, #24]
 	ldr	r1, [r3, #0]
@@ -18749,10 +19447,10 @@ HynixGetReadRetryDefault:
 	lsl	fp, ip, #3
 	str	r0, [sp, #44]
 	adds	r0, r1, r0
-.L2062:
+.L2123:
 	movs	r3, #0
 	mov	lr, r3
-.L2061:
+.L2122:
 	ldr	ip, [r0, r3]
 	add	lr, lr, #1
 	mvn	ip, ip
@@ -18760,15 +19458,15 @@ HynixGetReadRetryDefault:
 	ldr	ip, [sp, #24]
 	adds	r3, r3, #4
 	cmp	lr, ip
-	blt	.L2061
+	blt	.L2122
 	subs	r2, r2, #1
 	add	r0, r0, fp
-	bne	.L2062
+	bne	.L2123
 	mov	lr, r1
 	str	r2, [sp, #16]
 	str	r5, [sp, #60]
-	b	.L2063
-.L2067:
+	b	.L2124
+.L2128:
 	movs	r0, #1
 	mov	fp, #16
 	str	r3, [sp, #4]
@@ -18776,7 +19474,7 @@ HynixGetReadRetryDefault:
 	movs	r0, #0
 	mov	ip, r0
 	str	fp, [sp, #28]
-.L2065:
+.L2126:
 	ldr	fp, [lr, r0]
 	ldr	r3, [sp, #44]
 	and	fp, r5, fp
@@ -18787,92 +19485,92 @@ HynixGetReadRetryDefault:
 	addeq	ip, ip, #1
 	subs	r3, r3, #1
 	str	r3, [sp, #28]
-	bne	.L2065
+	bne	.L2126
 	ldr	r3, [sp, #4]
 	cmp	ip, #8
 	it	hi
 	orrhi	r2, r2, r5
 	adds	r3, r3, #1
 	cmp	r3, #32
-	bne	.L2067
+	bne	.L2128
 	ldr	fp, [sp, #16]
 	ldr	ip, [sp, #24]
 	add	fp, fp, #1
 	str	r2, [lr], #4
 	cmp	fp, ip
 	str	fp, [sp, #16]
-	bge	.L2085
-.L2063:
+	bge	.L2146
+.L2124:
 	movs	r2, #0
 	mov	r3, r2
-	b	.L2067
-.L2085:
+	b	.L2128
+.L2146:
 	movs	r3, #0
 	ldr	r5, [sp, #60]
 	mov	r2, r3
-.L2068:
+.L2129:
 	ldr	r0, [r1, r3]
-	cbnz	r0, .L2069
+	cbnz	r0, .L2130
 	adds	r2, r2, #1
-.L2069:
+.L2130:
 	adds	r3, r3, #4
 	cmp	r3, #32
-	bne	.L2068
+	bne	.L2129
 	cmp	r2, #7
-	ble	.L2070
-	ldr	r0, .L2116+4
+	ble	.L2131
+	ldr	r0, .L2177+4
 	movs	r2, #1
 	mov	r3, #1024
 	bl	rknand_print_hex
-	ldr	r0, .L2116+8
+	ldr	r0, .L2177+8
 	movs	r1, #0
 	bl	printf
-.L2071:
-	b	.L2071
-.L2070:
+.L2132:
+	b	.L2132
+.L2131:
 	cmp	r4, #6
-	beq	.L2086
+	beq	.L2147
 	cmp	r4, #7
 	ite	eq
 	moveq	r0, #10
 	movne	r0, #8
 	str	r0, [sp, #16]
-	b	.L2072
-.L2086:
+	b	.L2133
+.L2147:
 	movs	r1, #4
 	str	r1, [sp, #16]
-.L2072:
-	cbz	r5, .L2073
+.L2133:
+	cbz	r5, .L2134
 	ldr	r2, [sp, #56]
 	add	lr, r2, #1
-	b	.L2074
-.L2073:
+	b	.L2135
+.L2134:
 	mov	lr, #1
-.L2074:
+.L2135:
 	ldr	r0, [sp, #40]
 	movs	r2, #0
 	ldr	r1, [sp, #32]
 	mov	fp, r4
-	b	.L2075
-.L2076:
+	b	.L2136
+.L2137:
 	ldrb	ip, [r4], #1	@ zero_extendqisi2
 	strb	ip, [r1, r3]
 	adds	r3, r3, #1
 	uxtb	ip, r3
 	cmp	ip, r5
-	bcc	.L2076
+	bcc	.L2137
 	ldr	ip, [sp, #48]
 	adds	r2, r2, #1
 	ldr	r3, [sp, #16]
 	add	r0, r0, lr
 	cmp	r2, ip
 	add	r1, r1, r3
-	bge	.L2077
-.L2075:
+	bge	.L2138
+.L2136:
 	mov	r4, r0
 	movs	r3, #0
-	b	.L2076
-.L2077:
+	b	.L2137
+.L2138:
 	movs	r3, #255
 	mov	r0, r6
 	str	r3, [r7, #8]
@@ -18880,10 +19578,10 @@ HynixGetReadRetryDefault:
 	bl	NandcWaitFlashReady
 	ldr	r1, [sp, #36]
 	cmp	r1, #1
-	bhi	.L2078
+	bhi	.L2139
 	movs	r3, #54
 	str	r3, [r7, #8]
-	ldr	r3, .L2116+12
+	ldr	r3, .L2177+12
 	mov	r1, #-1
 	ldr	r0, [sp, #20]
 	ldrb	r3, [r3, #4]	@ zero_extendqisi2
@@ -18893,41 +19591,41 @@ HynixGetReadRetryDefault:
 	movs	r3, #22
 	str	r3, [r7, #8]
 	bl	FlashReadCmd
-	b	.L2079
-.L2078:
+	b	.L2140
+.L2139:
 	movs	r3, #56
 	str	r3, [r7, #8]
-.L2079:
+.L2140:
 	mov	r0, r6
 	bl	NandcWaitFlashReady
 	ldr	r2, [sp, #20]
 	adds	r3, r2, #1
 	uxtb	r3, r3
 	str	r3, [sp, #20]
-.L2040:
-	ldr	r0, .L2116+16
+.L2101:
+	ldr	r0, .L2177+16
 	ldr	r2, [sp, #20]
 	ldrb	r3, [r0, #0]	@ zero_extendqisi2
 	cmp	r3, r2
-	bhi	.L2080
+	bhi	.L2141
 	ldr	r6, [sp, #48]
-.L2039:
-	ldr	r3, .L2116+12
+.L2100:
+	ldr	r3, .L2177+12
 	strb	r5, [r3, #1]
 	strb	r6, [r3, #2]
 	add	sp, sp, #64
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2113:
+.L2174:
 	movs	r1, #0
-	ldr	r0, .L2116+8
+	ldr	r0, .L2177+8
 	bl	printf
-	b	.L2059
-.L2117:
+	b	.L2120
+.L2178:
 	.align	2
-.L2116:
+.L2177:
 	.word	.LANCHOR44
-	.word	.LC37
-	.word	.LC36
+	.word	.LC52
+	.word	.LC51
 	.word	.LANCHOR31
 	.word	.LANCHOR16
 	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
@@ -18943,75 +19641,75 @@ FlashGetReadRetryDefault:
 	@ link register save eliminated.
 	mov	r3, r0
 	cmp	r0, #0
-	beq	.L2118
+	beq	.L2179
 	subs	r2, r0, #1
 	cmp	r2, #6
-	bhi	.L2120
+	bhi	.L2181
 	b	HynixGetReadRetryDefault
-.L2120:
+.L2181:
 	cmp	r0, #49
-	bne	.L2121
-	ldr	r0, .L2129
+	bne	.L2182
+	ldr	r0, .L2190
 	movs	r2, #64
-	ldr	r1, .L2129+4
+	ldr	r1, .L2190+4
 	strb	r3, [r0, #0]
 	movs	r3, #4
 	strb	r3, [r0, #1]
 	movs	r3, #15
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2127
-.L2121:
+	b	.L2188
+.L2182:
 	cmp	r0, #33
-	beq	.L2122
+	beq	.L2183
 	cmp	r0, #65
-	beq	.L2122
+	beq	.L2183
 	cmp	r0, #66
-	bne	.L2123
-.L2122:
-	ldr	r0, .L2129
+	bne	.L2184
+.L2183:
+	ldr	r0, .L2190
 	strb	r3, [r0, #0]
 	movs	r3, #4
-	b	.L2128
-.L2123:
+	b	.L2189
+.L2184:
 	cmp	r0, #34
-	beq	.L2124
+	beq	.L2185
 	cmp	r0, #67
-	bne	.L2125
-.L2124:
-	ldr	r0, .L2129
+	bne	.L2186
+.L2185:
+	ldr	r0, .L2190
 	strb	r3, [r0, #0]
 	movs	r3, #5
-.L2128:
+.L2189:
 	strb	r3, [r0, #1]
 	movs	r2, #45
 	movs	r3, #7
-	ldr	r1, .L2129+8
+	ldr	r1, .L2190+8
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-	b	.L2127
-.L2125:
+	b	.L2188
+.L2186:
 	cmp	r0, #35
-	beq	.L2126
+	beq	.L2187
 	cmp	r0, #68
-	bne	.L2118
-.L2126:
-	ldr	r0, .L2129
+	bne	.L2179
+.L2187:
+	ldr	r0, .L2190
 	movs	r2, #95
-	ldr	r1, .L2129+12
+	ldr	r1, .L2190+12
 	strb	r3, [r0, #0]
 	movs	r3, #5
 	strb	r3, [r0, #1]
 	movs	r3, #17
 	strb	r3, [r0, #2]
 	adds	r0, r0, #4
-.L2127:
+.L2188:
 	b	memcpy
-.L2118:
+.L2179:
 	bx	lr
-.L2130:
+.L2191:
 	.align	2
-.L2129:
+.L2190:
 	.word	.LANCHOR31
 	.word	.LANCHOR15
 	.word	.LANCHOR10
@@ -19031,51 +19729,51 @@ FlashInit:
 	sub	sp, sp, #24
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2180
+	ldr	r3, .L2238
 	movs	r5, #0
-	ldr	r8, .L2180+84
+	ldr	r8, .L2238+84
 	mov	r6, r5
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2180+4
+	ldr	r3, .L2238+4
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2180+8
+	ldr	r3, .L2238+8
 	str	r0, [r3, #0]
 	mov	r0, #32768
 	bl	ftl_malloc
-	ldr	r3, .L2180+12
+	ldr	r3, .L2238+12
 	str	r0, [r3, #0]
 	mov	r0, #4096
 	bl	ftl_malloc
-	ldr	r3, .L2180+16
-	ldr	r2, .L2180+20
+	ldr	r3, .L2238+16
+	ldr	r2, .L2238+20
 	str	r0, [r3, #0]
 	movs	r3, #50
 	strb	r3, [r2, #0]
 	mov	r0, r4
-	ldr	r2, .L2180+24
-	ldr	r4, .L2180+28
+	ldr	r2, .L2238+24
+	ldr	r4, .L2238+28
 	strb	r3, [r2, #0]
 	movs	r2, #128
-	ldr	r3, .L2180+32
+	ldr	r3, .L2238+32
 	mov	r7, r4
 	str	r5, [r3, #0]
-	ldr	r3, .L2180+36
+	ldr	r3, .L2238+36
 	str	r2, [r3, #0]
 	movs	r2, #60
-	ldr	r3, .L2180+40
+	ldr	r3, .L2238+40
 	strb	r5, [r3, #0]
-	ldr	r3, .L2180+44
+	ldr	r3, .L2238+44
 	str	r5, [r3, #0]
-	ldr	r3, .L2180+48
+	ldr	r3, .L2238+48
 	strb	r5, [r3, #0]
-	ldr	r3, .L2180+52
+	ldr	r3, .L2238+52
 	strb	r2, [r3, #0]
 	bl	NandcInit
-.L2136:
+.L2197:
 	uxtb	r3, r6
 	str	r3, [sp, #16]
 	mov	r0, r3
@@ -19116,10 +19814,10 @@ FlashInit:
 	subs	r3, r2, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2132
+	bhi	.L2193
 	ldrb	r1, [r4, #2]	@ zero_extendqisi2
 	ldrb	r3, [r4, #1]	@ zero_extendqisi2
-	ldr	r0, .L2180+56
+	ldr	r0, .L2238+56
 	str	r1, [sp, #0]
 	ldrb	r1, [r4, #3]	@ zero_extendqisi2
 	str	r1, [sp, #4]
@@ -19129,87 +19827,87 @@ FlashInit:
 	str	r1, [sp, #12]
 	adds	r1, r6, #1
 	bl	printf
-.L2132:
-	cbnz	r6, .L2133
+.L2193:
+	cbnz	r6, .L2194
 	ldrb	r3, [r7, #0]	@ zero_extendqisi2
 	subs	r3, r3, #1
 	uxtb	r3, r3
 	cmp	r3, #253
-	bhi	.L2172
+	bhi	.L2231
 	ldrb	r3, [r7, #1]	@ zero_extendqisi2
 	cmp	r3, #255
-	beq	.L2172
-.L2133:
+	beq	.L2231
+.L2194:
 	ldrb	r3, [r5, r7]	@ zero_extendqisi2
 	cmp	r3, #181
-	bne	.L2135
+	bne	.L2196
 	movs	r3, #44
 	strb	r3, [r5, r7]
-.L2135:
+.L2196:
 	adds	r6, r6, #1
 	adds	r5, r5, #8
 	adds	r4, r4, #8
 	cmp	r6, #4
-	bne	.L2136
-	ldr	r3, .L2180+28
+	bne	.L2197
+	ldr	r3, .L2238+28
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #173
-	beq	.L2137
-	ldr	r3, .L2180+60
+	beq	.L2198
+	ldr	r3, .L2238+60
 	ldr	r0, [r3, #0]
 	bl	NandcSetDdrMode
-.L2137:
+.L2198:
 	movs	r1, #0
 	mov	r2, #852
-	ldr	r0, .L2180+64
+	ldr	r0, .L2238+64
 	bl	memset
-	ldr	r2, .L2180+68
-	ldr	r3, .L2180+72
+	ldr	r2, .L2238+68
+	ldr	r3, .L2238+72
 	str	r2, [r3, #0]
 	movs	r2, #0
-	ldr	r3, .L2180+76
+	ldr	r3, .L2238+76
 	strb	r2, [r3, #0]
-	ldr	r3, .L2180+28
+	ldr	r3, .L2238+28
 	ldrb	r3, [r3, #1]	@ zero_extendqisi2
 	cmp	r3, #241
-	beq	.L2138
+	beq	.L2199
 	cmp	r3, #218
-	beq	.L2138
+	beq	.L2199
 	cmp	r3, #220
-	bne	.L2139
-.L2138:
-	ldr	r2, .L2180+48
+	bne	.L2200
+.L2199:
+	ldr	r2, .L2238+48
 	movs	r1, #1
-	ldr	r0, .L2180+28
+	ldr	r0, .L2238+28
 	strb	r1, [r2, #0]
 	movs	r2, #16
-	ldr	r1, .L2180+20
+	ldr	r1, .L2238+20
 	ldrb	r4, [r0, #0]	@ zero_extendqisi2
 	strb	r2, [r1, #0]
 	cmp	r4, #152
-	ldr	r1, .L2180+52
+	ldr	r1, .L2238+52
 	strb	r2, [r1, #0]
-	ldr	r2, .L2180+80
+	ldr	r2, .L2238+80
 	strb	r4, [r2, #1]
-	bne	.L2140
+	bne	.L2201
 	ldrsb	r0, [r0, #4]
 	cmp	r0, #0
-	blt	.L2140
+	blt	.L2201
 	movs	r0, #24
 	strb	r0, [r1, #0]
-.L2140:
+.L2201:
 	cmp	r3, #218
-	bne	.L2141
+	bne	.L2202
 	mov	r1, #2048
-	b	.L2177
-.L2181:
+	b	.L2236
+.L2239:
 	.align	2
-.L2180:
+.L2238:
 	.word	.LANCHOR44
 	.word	.LANCHOR41
-	.word	.LANCHOR234
-	.word	.LANCHOR203
+	.word	.LANCHOR241
 	.word	.LANCHOR204
+	.word	.LANCHOR205
 	.word	.LANCHOR1
 	.word	.LANCHOR49
 	.word	.LANCHOR22
@@ -19219,118 +19917,118 @@ FlashInit:
 	.word	.LANCHOR50
 	.word	.LANCHOR0
 	.word	.LANCHOR45
-	.word	.LC38
-	.word	.LANCHOR187
+	.word	.LC53
+	.word	.LANCHOR192
 	.word	.LANCHOR31
 	.word	.LANCHOR18
 	.word	.LANCHOR23
 	.word	.LANCHOR4
-	.word	.LANCHOR236
+	.word	.LANCHOR243
 	.word	.LANCHOR5
-.L2141:
+.L2202:
 	cmp	r3, #220
-	bne	.L2142
+	bne	.L2203
 	mov	r1, #4096
-.L2177:
+.L2236:
 	strh	r1, [r2, #14]	@ movhi
 	strb	r3, [r2, #2]
-.L2142:
-	ldr	r1, .L2182
+.L2203:
+	ldr	r1, .L2240
 	movs	r2, #32
-	ldr	r0, .L2182+4
+	ldr	r0, .L2240+4
 	bl	memcpy
-	ldr	r0, .L2182+8
-	ldr	r1, .L2182+12
+	ldr	r0, .L2240+8
+	ldr	r1, .L2240+12
 	movs	r2, #32
 	bl	memcpy
-.L2139:
-	ldr	r3, .L2182+16
+.L2200:
+	ldr	r3, .L2240+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #0
-	bne	.L2143
+	bne	.L2204
 	bl	FlashLoadPhyInfoInRam
-	cbnz	r0, .L2144
-	ldr	r3, .L2182+20
-	ldr	r4, .L2182+24
+	cbnz	r0, .L2205
+	ldr	r3, .L2240+20
+	ldr	r4, .L2240+24
 	ldr	r3, [r3, #0]
 	ldrh	r0, [r3, #16]
 	ubfx	r0, r0, #8, #3
 	strb	r0, [r4, #0]
 	lsls	r2, r0, #31
-	bmi	.L2144
-	ldr	r3, .L2182+28
+	bmi	.L2205
+	ldr	r3, .L2240+28
 	movs	r2, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	ldrb	r0, [r4, #0]	@ zero_extendqisi2
 	bl	NandcSetMode
-.L2144:
-	ldr	r4, .L2182+20
+.L2205:
+	ldr	r4, .L2240+20
 	ldr	r3, [r4, #0]
 	ldrb	r2, [r3, #26]	@ zero_extendqisi2
-	ldr	r3, .L2182+32
+	ldr	r3, .L2240+32
 	strb	r2, [r3, #0]
 	bl	FlashLoadPhyInfo
 	cmp	r0, #0
-	beq	.L2143
+	beq	.L2204
 	ldr	r3, [r4, #0]
-	ldr	r0, .L2182+36
+	ldr	r0, .L2240+36
 	ldrh	r1, [r3, #14]
 	bl	printf
 	bl	FlashLoadPhyInfoInRam
 	adds	r3, r0, #1
-	beq	.L2134
+	beq	.L2195
 	bl	FlashDieInfoInit
 	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
 	bl	FlashGetReadRetryDefault
-	ldr	r1, .L2182+40
+	ldr	r1, .L2240+40
 	ldr	r3, [r4, #0]
 	ldrh	r1, [r1, #0]
 	ldrb	r2, [r3, #9]	@ zero_extendqisi2
 	addw	r1, r1, #4095
 	cmp	r2, r1, lsr #12
-	blt	.L2145
+	blt	.L2206
 	ldrh	r1, [r3, #14]
 	adds	r1, r1, #255
 	cmp	r2, r1, lsr #8
-	bge	.L2146
-.L2145:
+	bge	.L2207
+.L2206:
 	ldrh	r2, [r3, #14]
 	bic	r2, r2, #255
 	strh	r2, [r3, #14]	@ movhi
-.L2146:
-	ldr	r3, .L2182+24
+.L2207:
+	ldr	r3, .L2240+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2147
+	beq	.L2208
 	bl	FlashSavePhyInfo
-	ldr	r3, .L2182+44
+	ldr	r3, .L2240+44
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2147:
+.L2208:
 	bl	FlashSavePhyInfo
-.L2143:
-	ldr	r5, .L2182+20
-	ldr	r2, .L2182+32
-	ldr	r4, .L2182+48
+.L2204:
+	ldr	r5, .L2240+20
+	ldr	r2, .L2240+32
+	ldr	r4, .L2240+48
 	ldr	r3, [r5, #0]
 	ldrb	r1, [r3, #26]	@ zero_extendqisi2
 	ldrb	r6, [r3, #18]	@ zero_extendqisi2
 	strb	r1, [r2, #0]
-	ldr	r1, .L2182+52
+	ldr	r1, .L2240+52
 	ldrh	r2, [r3, #16]
 	ubfx	r0, r2, #7, #1
 	strb	r0, [r1, #0]
-	ldr	r1, .L2182+56
+	ldr	r1, .L2240+56
 	ubfx	r0, r2, #3, #1
 	strb	r0, [r1, #0]
 	ubfx	r0, r2, #4, #1
-	ldr	r1, .L2182+60
+	ldr	r1, .L2240+60
 	ubfx	r2, r2, #8, #3
 	strb	r0, [r1, #0]
-	ldr	r1, .L2182+24
+	ldr	r1, .L2240+24
 	ldrh	r0, [r3, #10]
 	strb	r2, [r1, #0]
 	movs	r2, #0
@@ -19344,245 +20042,220 @@ FlashInit:
 	ldr	r3, [r5, #0]
 	ldrh	r2, [r3, #16]
 	lsls	r0, r2, #25
-	bpl	.L2148
+	bpl	.L2209
 	ldrb	r0, [r3, #19]	@ zero_extendqisi2
-	ldr	r2, .L2182+64
-	ldr	r3, .L2182+68
+	ldr	r2, .L2240+64
+	ldr	r3, .L2240+68
 	ldrb	r1, [r2, #1]	@ zero_extendqisi2
 	strb	r0, [r3, #0]
-	ldr	r3, .L2182+72
+	ldr	r3, .L2240+72
 	strb	r1, [r3, #0]
 	ldrb	r1, [r2, #2]	@ zero_extendqisi2
-	ldr	r3, .L2182+76
+	ldr	r3, .L2240+76
 	strb	r1, [r3, #0]
 	subs	r1, r0, #1
 	cmp	r1, #6
-	bhi	.L2149
-	ldr	r3, .L2182+80
+	bhi	.L2210
+	ldr	r3, .L2240+80
 	str	r3, [r4, #0]
 	subs	r3, r0, #5
 	cmp	r3, #1
-	bhi	.L2150
-	ldr	r3, .L2182+84
+	bhi	.L2211
+	ldr	r3, .L2240+84
 	movs	r2, #1
 	str	r2, [r3, #0]
-	b	.L2151
-.L2150:
+	b	.L2212
+.L2211:
 	cmp	r0, #7
-	beq	.L2174
-.L2151:
-	ldr	r1, .L2182+88
-	b	.L2152
-.L2174:
+	beq	.L2233
+.L2212:
+	ldr	r1, .L2240+88
+	b	.L2213
+.L2233:
 	add	r1, r2, #28
-.L2152:
+.L2213:
 	movs	r3, #0
 	mov	r2, r3
-.L2154:
+.L2215:
 	ldrsb	r4, [r1, r2]
-	cbnz	r4, .L2153
+	cbnz	r4, .L2214
 	adds	r3, r3, #1
-.L2153:
+.L2214:
 	adds	r2, r2, #1
 	cmp	r2, #32
-	bne	.L2154
+	bne	.L2215
 	cmp	r3, #27
-	bls	.L2148
+	bls	.L2209
 	bl	FlashGetReadRetryDefault
 	bl	FlashSavePhyInfo
-	b	.L2148
-.L2149:
+	b	.L2209
+.L2210:
 	sub	r2, r0, #17
 	cmp	r2, #2
-	bhi	.L2155
-	ldr	r2, .L2182+92
+	bhi	.L2216
+	ldr	r2, .L2240+92
 	str	r2, [r4, #0]
 	movs	r2, #7
 	cmp	r0, #19
 	strb	r2, [r3, #0]
-	bne	.L2148
+	bne	.L2209
 	movs	r2, #15
-	b	.L2178
-.L2155:
+	b	.L2237
+.L2216:
 	cmp	r0, #33
-	beq	.L2156
+	beq	.L2217
 	cmp	r0, #65
-	beq	.L2156
+	beq	.L2217
 	cmp	r0, #66
-	bne	.L2157
-.L2156:
-	ldr	r2, .L2182+96
-	ldr	r3, .L2182+48
+	bne	.L2218
+.L2217:
+	ldr	r2, .L2240+96
+	ldr	r3, .L2240+48
 	str	r2, [r3, #0]
 	movs	r2, #4
-	ldr	r3, .L2182+72
+	ldr	r3, .L2240+72
 	strb	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2182+76
-	b	.L2178
-.L2157:
+	ldr	r3, .L2240+76
+	b	.L2237
+.L2218:
 	cmp	r0, #67
-	beq	.L2158
+	beq	.L2219
 	cmp	r0, #34
-	beq	.L2158
+	beq	.L2219
 	cmp	r0, #35
-	beq	.L2158
+	beq	.L2219
 	cmp	r0, #68
-	bne	.L2159
-.L2158:
-	ldr	r2, .L2182+96
-	ldr	r3, .L2182+48
+	bne	.L2220
+.L2219:
+	ldr	r2, .L2240+96
+	ldr	r3, .L2240+48
 	str	r2, [r3, #0]
 	movs	r2, #7
-	ldr	r3, .L2182+76
+	ldr	r3, .L2240+76
 	cmp	r0, #35
 	strb	r2, [r3, #0]
-	beq	.L2160
+	beq	.L2221
 	cmp	r0, #68
-	bne	.L2161
-.L2160:
+	bne	.L2222
+.L2221:
 	movs	r2, #17
 	strb	r2, [r3, #0]
-.L2161:
+.L2222:
 	subs	r0, r0, #67
-	ldr	r3, .L2182+72
+	ldr	r3, .L2240+72
 	cmp	r0, #1
-	bhi	.L2162
+	bhi	.L2223
 	movs	r2, #4
-.L2178:
+.L2237:
 	strb	r2, [r3, #0]
-	b	.L2148
-.L2162:
+	b	.L2209
+.L2223:
 	movs	r2, #5
-	b	.L2178
-.L2159:
+	b	.L2237
+.L2241:
+	.align	2
+.L2240:
+	.word	.LANCHOR27+32
+	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.word	.LANCHOR243
+	.word	.LANCHOR0
+	.word	.LANCHOR23
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.word	.LANCHOR7
+	.word	.LC54
+	.word	.LANCHOR24
+	.word	.LANCHOR47
+	.word	.LANCHOR51
+	.word	.LANCHOR4
+	.word	.LANCHOR194
+	.word	.LANCHOR33
+	.word	.LANCHOR31
+	.word	.LANCHOR11
+	.word	.LANCHOR14
+	.word	.LANCHOR42
+	.word	HynixReadRetrial
+	.word	.LANCHOR39
+	.word	.LANCHOR31+20
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+.L2220:
 	cmp	r0, #49
-	bne	.L2148
-	ldr	r2, .L2182+100
-	ldr	r3, .L2182+48
+	bne	.L2209
+	ldr	r2, .L2242
+	ldr	r3, .L2242+4
 	str	r2, [r3, #0]
-.L2148:
-	ldr	r3, .L2182+104
+.L2209:
+	ldr	r3, .L2242+8
 	ldr	r2, [r3, #0]
-	ldr	r3, .L2182+108
+	ldr	r3, .L2242+12
 	cmp	r2, r3
-	bne	.L2163
-	ldr	r3, .L2182+32
+	bne	.L2224
+	ldr	r3, .L2242+16
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cbz	r3, .L2163
-	ldr	r3, .L2182+20
+	cbz	r3, .L2224
+	ldr	r3, .L2242+20
 	movs	r2, #0
 	ldr	r3, [r3, #0]
 	strb	r2, [r3, #18]
-.L2163:
-	ldr	r3, .L2182+112
+.L2224:
+	ldr	r3, .L2242+24
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	cmp	r3, #44
-	bne	.L2164
-	ldr	r3, .L2182+28
+	bne	.L2225
+	ldr	r3, .L2242+28
 	ldrb	r2, [r3, #0]	@ zero_extendqisi2
-	cbz	r2, .L2164
+	cbz	r2, .L2225
 	movs	r2, #0
 	movs	r0, #1
 	strb	r2, [r3, #0]
 	bl	FlashSetInterfaceMode
 	movs	r0, #1
 	bl	NandcSetMode
-.L2164:
+.L2225:
 	movs	r0, #0
 	bl	flash_enter_slc_mode
-	ldr	r3, .L2182+24
+	ldr	r3, .L2242+32
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	tst	r3, #6
-	beq	.L2165
-	ldr	r2, .L2182+28
+	beq	.L2226
+	ldr	r2, .L2242+28
 	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cbnz	r2, .L2166
+	cbnz	r2, .L2227
 	lsls	r1, r3, #31
-	bmi	.L2165
-.L2166:
-	ldr	r3, .L2182+44
+	bmi	.L2226
+.L2227:
+	ldr	r3, .L2242+36
 	movs	r0, #0
 	ldr	r1, [r3, #0]
 	bl	FlashDdrParaScan
-.L2165:
+.L2226:
+	ldr	r4, .L2242+20
 	movs	r0, #0
 	bl	flash_exit_slc_mode
-	ldr	r3, .L2182+20
-	ldr	r3, [r3, #0]
+	mov	r8, #16
+	ldr	r3, [r4, #0]
 	ldrb	r0, [r3, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
-	ldr	r0, .L2182+116
+	ldr	r0, .L2242+40
 	bl	FlashReadIdbDataRaw
-	ldr	r3, .L2182+120
-	cmp	r0, #0
-	bne	.L2167
-	ldr	r2, .L2182+124
-	ldrb	r1, [r3, #0]	@ zero_extendqisi2
-	ldrb	r2, [r2, #0]	@ zero_extendqisi2
-	cmp	r1, r2
-	it	hi
-	strbhi	r2, [r3, #0]
-	ldrb	r3, [r3, #0]	@ zero_extendqisi2
-	cmp	r3, #15
-	bhi	.L2169
-	movs	r2, #16
-	ldr	r3, .L2182+120
-	b	.L2179
-.L2183:
-	.align	2
-.L2182:
-	.word	.LANCHOR27+32
-	.word	.LANCHOR6
-	.word	.LANCHOR18
-	.word	.LANCHOR236
-	.word	.LANCHOR0
-	.word	.LANCHOR23
-	.word	.LANCHOR34
-	.word	.LANCHOR35
-	.word	.LANCHOR7
-	.word	.LC39
-	.word	.LANCHOR24
-	.word	.LANCHOR47
-	.word	.LANCHOR51
-	.word	.LANCHOR4
-	.word	.LANCHOR189
-	.word	.LANCHOR33
-	.word	.LANCHOR31
-	.word	.LANCHOR11
-	.word	.LANCHOR14
-	.word	.LANCHOR42
-	.word	HynixReadRetrial
-	.word	.LANCHOR39
-	.word	.LANCHOR31+20
-	.word	MicronReadRetrial
-	.word	ToshibaReadRetrial
-	.word	SamsungReadRetrial
-	.word	.LANCHOR40
-	.word	1446522928
-	.word	.LANCHOR22
-	.word	.LANCHOR25
-	.word	.LANCHOR1
-	.word	.LANCHOR49
-.L2167:
-	movs	r2, #16
-.L2179:
-	strb	r2, [r3, #0]
-.L2169:
-	ldr	r3, .L2184
-	ldr	r4, .L2184+4
-	ldr	r5, [r3, #0]
+	ldr	r5, [r4, #0]
+	ldr	r3, .L2242+44
+	ldr	r4, .L2242+48
 	ldrb	r1, [r5, #12]	@ zero_extendqisi2
+	strb	r8, [r3, #0]
 	ldrh	r6, [r5, #10]
-	ldrh	r7, [r5, #14]
 	strh	r1, [r4, #8]	@ movhi
-	mov	r0, r6
 	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	mov	r0, r6
+	ldrh	r7, [r5, #14]
 	str	r3, [r4, #4]
-	ldr	r3, .L2184+8
+	ldr	r3, .L2242+24
 	ldr	r3, [r3, #0]
 	str	r3, [r4, #0]
-	ldr	r3, .L2184+12
+	ldr	r3, .L2242+52
 	ldrb	r3, [r3, #0]	@ zero_extendqisi2
 	strh	r3, [r4, #10]	@ movhi
 	ldrb	r3, [r5, #13]	@ zero_extendqisi2
@@ -19596,43 +20269,48 @@ FlashInit:
 	muls	r6, r3, r6
 	strh	r2, [r4, #24]	@ movhi
 	uxth	r6, r6
-	ldr	r2, .L2184+16
+	ldr	r2, .L2242+56
 	strh	r3, [r4, #20]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
-	ldrb	r1, [r2, #0]	@ zero_extendqisi2
-	strh	r1, [r4, #26]	@ movhi
-	ldr	r1, .L2184+20
-	ldrb	r1, [r1, #0]	@ zero_extendqisi2
-	cmp	r1, #1
-	bne	.L2170
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	strh	r8, [r4, #26]	@ movhi
+	cmp	r2, #1
+	bne	.L2229
 	lsls	r3, r3, #1
-	movs	r1, #16
 	lsrs	r7, r7, #1
 	strh	r3, [r4, #20]	@ movhi
 	lsls	r6, r6, #1
 	movs	r3, #8
-	strb	r1, [r2, #0]
 	strh	r7, [r4, #14]	@ movhi
 	strh	r6, [r4, #22]	@ movhi
 	strh	r3, [r4, #26]	@ movhi
-.L2170:
+.L2229:
 	ldrb	r0, [r5, #20]	@ zero_extendqisi2
 	bl	FlashBchSel
 	movs	r0, #0
-	b	.L2134
-.L2172:
+	b	.L2195
+.L2231:
 	mvn	r0, #1
-.L2134:
+.L2195:
 	add	sp, sp, #24
 	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
-.L2185:
+.L2243:
 	.align	2
-.L2184:
+.L2242:
+	.word	SamsungReadRetrial
+	.word	.LANCHOR51
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR7
 	.word	.LANCHOR23
-	.word	.LANCHOR28
 	.word	.LANCHOR22
-	.word	.LANCHOR16
+	.word	.LANCHOR35
+	.word	.LANCHOR34
+	.word	.LANCHOR47
+	.word	.LANCHOR25
 	.word	.LANCHOR1
+	.word	.LANCHOR28
+	.word	.LANCHOR16
 	.word	.LANCHOR0
 	.size	FlashInit, .-FlashInit
 	.section	.text.rk_ftl_init,"ax",%progbits
@@ -19647,20 +20325,20 @@ rk_ftl_init:
 	push	{r4, lr}
 	bl	FlashInit
 	mov	r4, r0
-	cbnz	r0, .L2187
-	ldr	r0, .L2188
+	cbnz	r0, .L2245
+	ldr	r0, .L2246
 	bl	FtlInit
-.L2187:
+.L2245:
 	mov	r1, r4
-	ldr	r0, .L2188+4
+	ldr	r0, .L2246+4
 	bl	printf
 	mov	r0, r4
 	pop	{r4, pc}
-.L2189:
+.L2247:
 	.align	2
-.L2188:
+.L2246:
 	.word	.LANCHOR28
-	.word	.LC40
+	.word	.LC55
 	.size	rk_ftl_init, .-rk_ftl_init
 	.global	gc_ink_free_return_value
 	.global	FtlUpdateVaildLpnCount
@@ -19678,6 +20356,8 @@ rk_ftl_init:
 	.global	gSlcNandParaInfo
 	.global	gNandParaInfo
 	.global	NandFlashParaTbl
+	.global	g_page_map_check_enable
+	.global	g_power_lost_ecc_error_blk
 	.global	g_power_lost_recovery_flag
 	.global	c_mlc_erase_count_value
 	.global	g_recovery_ppa_tbl
@@ -19709,6 +20389,9 @@ rk_ftl_init:
 	.global	g_gc_blk_index
 	.global	g_gc_merge_free_blk_threshold
 	.global	g_gc_free_blk_threshold
+	.global	g_gc_refresh_block_temp_tbl
+	.global	g_free_slc_blk_num
+	.global	g_gc_refresh_block_temp_num
 	.global	g_gc_bad_block_temp_tbl
 	.global	g_gc_bad_block_gc_index
 	.global	g_gc_bad_block_temp_num
@@ -19742,6 +20425,7 @@ rk_ftl_init:
 	.global	p_vendor_block_valid_page_count
 	.global	p_vendor_block_table
 	.global	g_totle_map_block
+	.global	p_map_region_ppn_check_table
 	.global	p_map_region_ppn_table
 	.global	p_map_block_ver_table
 	.global	p_map_block_valid_page_count
@@ -19779,6 +20463,7 @@ rk_ftl_init:
 	.global	gSysFreeQueue
 	.global	gSysInfo
 	.global	gBbtInfo
+	.global	g_flash_read_only_en
 	.global	g_inkDie_check_enable
 	.global	g_SlcPartLbaEndSector
 	.global	g_MaxLbn
@@ -19884,34 +20569,34 @@ rk_ftl_init:
 	.byte	16
 	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
 	.align	2
-.LANCHOR226 = . + 0
+.LANCHOR232 = . + 0
 	.type	g_recovery_ppa_tbl, %object
 	.size	g_recovery_ppa_tbl, 128
 g_recovery_ppa_tbl:
 	.space	128
 	.section	.bss.p_blk_mode_table,"aw",%nobits
 	.align	2
-.LANCHOR117 = . + 0
+.LANCHOR119 = . + 0
 	.type	p_blk_mode_table, %object
 	.size	p_blk_mode_table, 4
 p_blk_mode_table:
 	.space	4
-	.section	.rodata.__func__.8224,"a",%progbits
-.LANCHOR220 = . + 0
-	.type	__func__.8224, %object
-	.size	__func__.8224, 19
-__func__.8224:
-	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.7399,"a",%progbits
+.LANCHOR240 = . + 0
+	.type	__func__.7399, %object
+	.size	__func__.7399, 10
+__func__.7399:
+	.ascii	"ftl_write\000"
 	.section	.bss.p_gc_blk_tbl,"aw",%nobits
 	.align	2
-.LANCHOR143 = . + 0
+.LANCHOR146 = . + 0
 	.type	p_gc_blk_tbl, %object
 	.size	p_gc_blk_tbl, 4
 p_gc_blk_tbl:
 	.space	4
 	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
 	.align	1
-.LANCHOR214 = . + 0
+.LANCHOR218 = . + 0
 	.type	g_ect_tbl_power_up_flush, %object
 	.size	g_ect_tbl_power_up_flush, 2
 g_ect_tbl_power_up_flush:
@@ -19950,6 +20635,12 @@ gNandParaInfo:
 	.byte	0
 	.byte	0
 	.space	4
+	.section	.rodata.__func__.8085,"a",%progbits
+.LANCHOR127 = . + 0
+	.type	__func__.8085, %object
+	.size	__func__.8085, 16
+__func__.8085:
+	.ascii	"make_superblock\000"
 	.section	.bss.gNandRandomizer,"aw",%nobits
 .LANCHOR4 = . + 0
 	.type	gNandRandomizer, %object
@@ -19964,7 +20655,7 @@ gNandRandomizer:
 gDieOp:
 	.space	128
 	.section	.data.refValueDefault,"aw",%progbits
-.LANCHOR235 = . + 0
+.LANCHOR242 = . + 0
 	.type	refValueDefault, %object
 	.size	refValueDefault, 28
 refValueDefault:
@@ -20004,17 +20695,11 @@ gFlashToggleModeEn:
 	.space	1
 	.section	.bss.g_sys_ext_data,"aw",%nobits
 	.align	2
-.LANCHOR141 = . + 0
+.LANCHOR144 = . + 0
 	.type	g_sys_ext_data, %object
 	.size	g_sys_ext_data, 512
 g_sys_ext_data:
 	.space	512
-	.section	.rodata.__func__.8120,"a",%progbits
-.LANCHOR209 = . + 0
-	.type	__func__.8120, %object
-	.size	__func__.8120, 25
-__func__.8120:
-	.ascii	"allocate_data_superblock\000"
 	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
 	.align	1
 .LANCHOR70 = . + 0
@@ -20024,7 +20709,7 @@ c_ftl_nand_page_pre_super_blk:
 	.space	2
 	.section	.bss.g_inkDie_check_enable,"aw",%nobits
 	.align	2
-.LANCHOR126 = . + 0
+.LANCHOR128 = . + 0
 	.type	g_inkDie_check_enable, %object
 	.size	g_inkDie_check_enable, 4
 g_inkDie_check_enable:
@@ -20035,16 +20720,22 @@ g_inkDie_check_enable:
 	.size	gNandFlashEccBits, 1
 gNandFlashEccBits:
 	.space	1
+	.section	.rodata.__func__.7688,"a",%progbits
+.LANCHOR220 = . + 0
+	.type	__func__.7688, %object
+	.size	__func__.7688, 16
+__func__.7688:
+	.ascii	"load_l2p_region\000"
 	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
 	.align	1
-.LANCHOR200 = . + 0
+.LANCHOR201 = . + 0
 	.type	c_ftl_nand_data_op_blks_per_plane, %object
 	.size	c_ftl_nand_data_op_blks_per_plane, 2
 c_ftl_nand_data_op_blks_per_plane:
 	.space	2
 	.section	.bss.p_sys_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR176 = . + 0
+.LANCHOR180 = . + 0
 	.type	p_sys_data_buf_1, %object
 	.size	p_sys_data_buf_1, 4
 p_sys_data_buf_1:
@@ -20055,12 +20746,6 @@ p_sys_data_buf_1:
 	.size	g_maxRetryCount, 1
 g_maxRetryCount:
 	.space	1
-	.section	.rodata.__func__.7721,"a",%progbits
-.LANCHOR212 = . + 0
-	.type	__func__.7721, %object
-	.size	__func__.7721, 16
-__func__.7721:
-	.ascii	"FtlMapWritePage\000"
 	.section	.bss.gMultiPageProgEn,"aw",%nobits
 .LANCHOR33 = . + 0
 	.type	gMultiPageProgEn, %object
@@ -20074,6 +20759,12 @@ gMultiPageProgEn:
 	.size	gMasterInfo, 32
 gMasterInfo:
 	.space	32
+	.section	.bss.g_gc_refresh_block_temp_tbl,"aw",%nobits
+	.align	1
+	.type	g_gc_refresh_block_temp_tbl, %object
+	.size	g_gc_refresh_block_temp_tbl, 34
+g_gc_refresh_block_temp_tbl:
+	.space	34
 	.section	.bss.gReadRetryInfo,"aw",%nobits
 .LANCHOR31 = . + 0
 	.type	gReadRetryInfo, %object
@@ -20095,14 +20786,14 @@ gToggleModeClkDiv:
 	.space	4
 	.section	.bss.p_valid_page_count_table,"aw",%nobits
 	.align	2
-.LANCHOR99 = . + 0
+.LANCHOR101 = . + 0
 	.type	p_valid_page_count_table, %object
 	.size	p_valid_page_count_table, 4
 p_valid_page_count_table:
 	.space	4
 	.section	.bss.req_erase,"aw",%nobits
 	.align	2
-.LANCHOR93 = . + 0
+.LANCHOR95 = . + 0
 	.type	req_erase, %object
 	.size	req_erase, 4
 req_erase:
@@ -20134,7 +20825,7 @@ gNandIDBResBlkNumSaveInFlash:
 	.space	1
 	.section	.bss.g_MaxLbn,"aw",%nobits
 	.align	2
-.LANCHOR199 = . + 0
+.LANCHOR200 = . + 0
 	.type	g_MaxLbn, %object
 	.size	g_MaxLbn, 4
 g_MaxLbn:
@@ -20145,39 +20836,32 @@ g_MaxLbn:
 	.size	g_retryMode, 1
 g_retryMode:
 	.space	1
-	.section	.bss.gMasterTempBuf,"aw",%nobits
-	.align	2
-.LANCHOR188 = . + 0
-	.type	gMasterTempBuf, %object
-	.size	gMasterTempBuf, 4
-gMasterTempBuf:
-	.space	4
+	.section	.bss.g_page_map_check_enable,"aw",%nobits
+	.align	1
+.LANCHOR85 = . + 0
+	.type	g_page_map_check_enable, %object
+	.size	g_page_map_check_enable, 2
+g_page_map_check_enable:
+	.space	2
 	.section	.rodata.__func__.7617,"a",%progbits
-.LANCHOR106 = . + 0
+.LANCHOR107 = . + 0
 	.type	__func__.7617, %object
 	.size	__func__.7617, 17
 __func__.7617:
-	.ascii	"List_remove_node\000"
-	.section	.bss.gpFlashSaveInfo,"aw",%nobits
-	.align	2
-.LANCHOR43 = . + 0
-	.type	gpFlashSaveInfo, %object
-	.size	gpFlashSaveInfo, 4
-gpFlashSaveInfo:
-	.space	4
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.rodata.__func__.7462,"a",%progbits
+.LANCHOR92 = . + 0
+	.type	__func__.7462, %object
+	.size	__func__.7462, 14
+__func__.7462:
+	.ascii	"FtlBbt2Bitmap\000"
 	.section	.bss.g_GlobalSysVersion,"aw",%nobits
 	.align	2
-.LANCHOR153 = . + 0
+.LANCHOR156 = . + 0
 	.type	g_GlobalSysVersion, %object
 	.size	g_GlobalSysVersion, 4
 g_GlobalSysVersion:
 	.space	4
-	.section	.rodata.__func__.7840,"a",%progbits
-.LANCHOR192 = . + 0
-	.type	__func__.7840, %object
-	.size	__func__.7840, 14
-__func__.7840:
-	.ascii	"FtlScanSysBlk\000"
 	.section	.bss.gpReadRetrial,"aw",%nobits
 	.align	2
 .LANCHOR51 = . + 0
@@ -20210,23 +20894,23 @@ gpReadRetrial:
 .LC11:
 	.ascii	"!!!!! FTL sys Error !!!!!\000"
 .LC12:
-	.ascii	"%s 0x%x:\000"
+	.ascii	"remove_from_free_sys_Queue %x\012\000"
 .LC13:
-	.ascii	"%x \000"
+	.ascii	"%s 0x%x:\000"
 .LC14:
-	.ascii	"\000"
+	.ascii	"%x \000"
 .LC15:
-	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+	.ascii	"\000"
 .LC16:
-	.ascii	"data:\000"
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
 .LC17:
-	.ascii	"spare:\000"
+	.ascii	"data:\000"
 .LC18:
-	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+	.ascii	"spare:\000"
 .LC19:
-	.ascii	"slc mode\000"
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
 .LC20:
-	.ascii	"no ect\000"
+	.ascii	"FtlGcScanTempBlkError ID %x %x!!!!!!! \012\000"
 .LC21:
 	.ascii	"prog error: = %x\012\000"
 .LC22:
@@ -20246,26 +20930,57 @@ gpReadRetrial:
 .LC29:
 	.ascii	"decrement_vpc_count %x = %d\012\000"
 .LC30:
-	.ascii	"FtlMapWritePage error = %x \012\000"
+	.ascii	"ftl_map_blk_gc blk info: %x %x %x\012\000"
 .LC31:
-	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+	.ascii	"page map lost: %x %x\012\000"
 .LC32:
-	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+	.ascii	"FtlMapWritePage error = %x \012\000"
 .LC33:
-	.ascii	"spuer block %x vpn is 0\012 \000"
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
 .LC34:
-	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+	.ascii	"FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
 .LC35:
-	.ascii	"BBT:\000"
+	.ascii	"slc mode\000"
 .LC36:
-	.ascii	"otp error! %d\000"
+	.ascii	"no ect\000"
 .LC37:
-	.ascii	"rr\000"
+	.ascii	"page map lost %x %x %x %x\012\000"
 .LC38:
-	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+	.ascii	"load_l2p_region refresh = %x phyAddr = %x\012\000"
 .LC39:
-	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
 .LC40:
+	.ascii	"GC des block %x done\012\000"
+.LC41:
+	.ascii	"RSB refresh addr %x \012\000"
+.LC42:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC43:
+	.ascii	"g_recovery_ppa %x ver %x\012 \000"
+.LC44:
+	.ascii	"fix power lost blk = %x vpc=%x\012\000"
+.LC45:
+	.ascii	"erase power lost blk = %x vpc=%x\012\000"
+.LC46:
+	.ascii	"FTL version: 5.0.47 20171110\000"
+.LC47:
+	.ascii	"...%s: no bad block mapping table, format device\012"
+	.ascii	"\000"
+.LC48:
+	.ascii	"...%s FtlSysBlkInit error ,format device!\012\000"
+.LC49:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+.LC50:
+	.ascii	"BBT:\000"
+.LC51:
+	.ascii	"otp error! %d\000"
+.LC52:
+	.ascii	"rr\000"
+.LC53:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC54:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+.LC55:
 	.ascii	"FtlInit %x\012\000"
 	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
 	.align	2
@@ -20276,28 +20991,33 @@ gNandFlashIdbBlockAddr:
 	.space	4
 	.section	.bss.req_sys,"aw",%nobits
 	.align	2
-.LANCHOR197 = . + 0
+.LANCHOR198 = . + 0
 	.type	req_sys, %object
 	.size	req_sys, 36
 req_sys:
 	.space	36
-	.section	.bss.gFlashSpareBuffer,"aw",%nobits
-	.align	2
-.LANCHOR234 = . + 0
-	.type	gFlashSpareBuffer, %object
-	.size	gFlashSpareBuffer, 4
-gFlashSpareBuffer:
-	.space	4
+	.section	.rodata.__func__.7998,"a",%progbits
+.LANCHOR222 = . + 0
+	.type	__func__.7998, %object
+	.size	__func__.7998, 16
+__func__.7998:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.rodata.__func__.7856,"a",%progbits
+.LANCHOR206 = . + 0
+	.type	__func__.7856, %object
+	.size	__func__.7856, 15
+__func__.7856:
+	.ascii	"FtlVpcTblFlush\000"
 	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR185 = . + 0
+.LANCHOR189 = . + 0
 	.type	p_vendor_block_ver_table, %object
 	.size	p_vendor_block_ver_table, 4
 p_vendor_block_ver_table:
 	.space	4
 	.section	.bss.g_gc_next_blk,"aw",%nobits
 	.align	1
-.LANCHOR146 = . + 0
+.LANCHOR149 = . + 0
 	.type	g_gc_next_blk, %object
 	.size	g_gc_next_blk, 2
 g_gc_next_blk:
@@ -20316,12 +21036,19 @@ mlcPageToSlcPageTbl:
 	.size	c_ftl_nand_sec_pre_page_shift, 2
 c_ftl_nand_sec_pre_page_shift:
 	.space	2
-	.section	.rodata.__func__.8134,"a",%progbits
-.LANCHOR217 = . + 0
-	.type	__func__.8134, %object
-	.size	__func__.8134, 29
-__func__.8134:
-	.ascii	"allocate_new_data_superblock\000"
+	.section	.bss.g_flash_read_only_en,"aw",%nobits
+	.align	2
+.LANCHOR94 = . + 0
+	.type	g_flash_read_only_en, %object
+	.size	g_flash_read_only_en, 4
+g_flash_read_only_en:
+	.space	4
+	.section	.rodata.__func__.8218,"a",%progbits
+.LANCHOR208 = . + 0
+	.type	__func__.8218, %object
+	.size	__func__.8218, 20
+__func__.8218:
+	.ascii	"decrement_vpc_count\000"
 	.section	.bss.read_retry_cur_offset,"aw",%nobits
 .LANCHOR32 = . + 0
 	.type	read_retry_cur_offset, %object
@@ -20330,7 +21057,7 @@ read_retry_cur_offset:
 	.space	4
 	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR184 = . + 0
+.LANCHOR188 = . + 0
 	.type	p_vendor_block_valid_page_count, %object
 	.size	p_vendor_block_valid_page_count, 4
 p_vendor_block_valid_page_count:
@@ -20342,29 +21069,36 @@ p_vendor_block_valid_page_count:
 	.size	gNandcVer, 4
 gNandcVer:
 	.space	4
+	.section	.rodata.__func__.7732,"a",%progbits
+.LANCHOR212 = . + 0
+	.type	__func__.7732, %object
+	.size	__func__.7732, 15
+__func__.7732:
+	.ascii	"ftl_map_blk_gc\000"
 	.section	.bss.g_num_free_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR104 = . + 0
+.LANCHOR106 = . + 0
 	.type	g_num_free_superblocks, %object
 	.size	g_num_free_superblocks, 2
 g_num_free_superblocks:
 	.space	2
 	.section	.bss.p_data_block_list_table,"aw",%nobits
 	.align	2
-.LANCHOR97 = . + 0
+.LANCHOR99 = . + 0
 	.type	p_data_block_list_table, %object
 	.size	p_data_block_list_table, 4
 p_data_block_list_table:
 	.space	4
-	.section	.rodata.__func__.7894,"a",%progbits
-.LANCHOR198 = . + 0
-	.type	__func__.7894, %object
-	.size	__func__.7894, 15
-__func__.7894:
-	.ascii	"FtlLoadSysInfo\000"
+	.section	.bss.g_power_lost_ecc_error_blk,"aw",%nobits
+	.align	1
+.LANCHOR229 = . + 0
+	.type	g_power_lost_ecc_error_blk, %object
+	.size	g_power_lost_ecc_error_blk, 2
+g_power_lost_ecc_error_blk:
+	.space	2
 	.section	.bss.g_gc_skip_write_count,"aw",%nobits
 	.align	2
-.LANCHOR169 = . + 0
+.LANCHOR172 = . + 0
 	.type	g_gc_skip_write_count, %object
 	.size	g_gc_skip_write_count, 4
 g_gc_skip_write_count:
@@ -20376,19 +21110,19 @@ g_gc_skip_write_count:
 	.size	c_ftl_nand_data_blks_per_plane, 2
 c_ftl_nand_data_blks_per_plane:
 	.space	2
-	.section	.bss.gc_ink_free_return_value,"aw",%nobits
-	.align	1
-.LANCHOR228 = . + 0
-	.type	gc_ink_free_return_value, %object
-	.size	gc_ink_free_return_value, 2
-gc_ink_free_return_value:
-	.space	2
-	.section	.rodata.__func__.7583,"a",%progbits
-.LANCHOR105 = . + 0
-	.type	__func__.7583, %object
-	.size	__func__.7583, 17
-__func__.7583:
-	.ascii	"INSERT_FREE_LIST\000"
+	.section	.bss.p_map_region_ppn_check_table,"aw",%nobits
+	.align	2
+.LANCHOR191 = . + 0
+	.type	p_map_region_ppn_check_table, %object
+	.size	p_map_region_ppn_check_table, 4
+p_map_region_ppn_check_table:
+	.space	4
+	.section	.bss.gMultiPageReadEn,"aw",%nobits
+.LANCHOR194 = . + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.space	1
 	.section	.bss.DieAddrs,"aw",%nobits
 	.align	2
 .LANCHOR20 = . + 0
@@ -20398,20 +21132,21 @@ DieAddrs:
 	.space	32
 	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR161 = . + 0
+.LANCHOR164 = . + 0
 	.type	g_totle_mlc_erase_count, %object
 	.size	g_totle_mlc_erase_count, 4
 g_totle_mlc_erase_count:
 	.space	4
-	.section	.rodata.__func__.7587,"a",%progbits
-.LANCHOR102 = . + 0
-	.type	__func__.7587, %object
-	.size	__func__.7587, 17
-__func__.7587:
-	.ascii	"INSERT_DATA_LIST\000"
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR205 = . + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
+	.space	4
 	.section	.data.gSlcNandParaInfo,"aw",%progbits
 	.align	1
-.LANCHOR236 = . + 0
+.LANCHOR243 = . + 0
 	.type	gSlcNandParaInfo, %object
 	.size	gSlcNandParaInfo, 32
 gSlcNandParaInfo:
@@ -20441,16 +21176,22 @@ gSlcNandParaInfo:
 	.byte	0
 	.byte	0
 	.space	4
+	.section	.rodata.__func__.7621,"a",%progbits
+.LANCHOR104 = . + 0
+	.type	__func__.7621, %object
+	.size	__func__.7621, 17
+__func__.7621:
+	.ascii	"INSERT_DATA_LIST\000"
 	.section	.bss.p_sys_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR180 = . + 0
+.LANCHOR184 = . + 0
 	.type	p_sys_spare_buf, %object
 	.size	p_sys_spare_buf, 4
 p_sys_spare_buf:
 	.space	4
 	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
 	.align	1
-.LANCHOR150 = . + 0
+.LANCHOR153 = . + 0
 	.type	g_gc_bad_block_gc_index, %object
 	.size	g_gc_bad_block_gc_index, 2
 g_gc_bad_block_gc_index:
@@ -20463,27 +21204,21 @@ gNandFlashResEndPageAddr:
 	.space	4
 	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
 	.align	2
-.LANCHOR131 = . + 0
+.LANCHOR134 = . + 0
 	.type	gp_gc_page_buf_info, %object
 	.size	gp_gc_page_buf_info, 4
 gp_gc_page_buf_info:
 	.space	4
-	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
 	.align	1
-.LANCHOR230 = . + 0
-	.type	g_gc_cur_blk_max_valid_pages, %object
-	.size	g_gc_cur_blk_max_valid_pages, 2
-g_gc_cur_blk_max_valid_pages:
+.LANCHOR233 = . + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
 	.space	2
-	.section	.rodata.__func__.7474,"a",%progbits
-.LANCHOR202 = . + 0
-	.type	__func__.7474, %object
-	.size	__func__.7474, 11
-__func__.7474:
-	.ascii	"FtlLoadBbt\000"
 	.section	.bss.g_totle_write_sector,"aw",%nobits
 	.align	2
-.LANCHOR193 = . + 0
+.LANCHOR216 = . + 0
 	.type	g_totle_write_sector, %object
 	.size	g_totle_write_sector, 4
 g_totle_write_sector:
@@ -20503,7 +21238,7 @@ gpNandc1:
 	.space	4
 	.section	.bss.g_in_swl_replace,"aw",%nobits
 	.align	2
-.LANCHOR166 = . + 0
+.LANCHOR169 = . + 0
 	.type	g_in_swl_replace, %object
 	.size	g_in_swl_replace, 4
 g_in_swl_replace:
@@ -20517,7 +21252,7 @@ FlashDdrTunningReadCount:
 	.space	4
 	.section	.bss.gBootDdrMode,"aw",%nobits
 	.align	2
-.LANCHOR187 = . + 0
+.LANCHOR192 = . + 0
 	.type	gBootDdrMode, %object
 	.size	gBootDdrMode, 4
 gBootDdrMode:
@@ -20537,7 +21272,7 @@ c_mlc_erase_count_value:
 	.space	2
 	.section	.bss.p_map_block_table,"aw",%nobits
 	.align	2
-.LANCHOR122 = . + 0
+.LANCHOR124 = . + 0
 	.type	p_map_block_table, %object
 	.size	p_map_block_table, 4
 p_map_block_table:
@@ -20611,12 +21346,6 @@ SamsungRefValue:
 	.byte	12
 	.byte	2
 	.byte	0
-	.section	.rodata.__func__.8140,"a",%progbits
-.LANCHOR208 = . + 0
-	.type	__func__.8140, %object
-	.size	__func__.8140, 19
-__func__.8140:
-	.ascii	"get_new_active_ppa\000"
 	.section	.data.NandOptPara,"aw",%progbits
 .LANCHOR27 = . + 0
 	.type	NandOptPara, %object
@@ -20698,6 +21427,12 @@ NandOptPara:
 	.byte	0
 	.byte	0
 	.space	14
+	.section	.rodata.__func__.7373,"a",%progbits
+.LANCHOR223 = . + 0
+	.type	__func__.7373, %object
+	.size	__func__.7373, 13
+__func__.7373:
+	.ascii	"FtlProgPages\000"
 	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
 	.align	1
 .LANCHOR66 = . + 0
@@ -20705,15 +21440,15 @@ NandOptPara:
 	.size	c_ftl_nand_blks_per_die, 2
 c_ftl_nand_blks_per_die:
 	.space	2
-	.section	.rodata.__func__.7364,"a",%progbits
-.LANCHOR233 = . + 0
-	.type	__func__.7364, %object
-	.size	__func__.7364, 10
-__func__.7364:
-	.ascii	"ftl_write\000"
+	.section	.rodata.__func__.8031,"a",%progbits
+.LANCHOR228 = . + 0
+	.type	__func__.8031, %object
+	.size	__func__.8031, 22
+__func__.8031:
+	.ascii	"FtlRecoverySuperblock\000"
 	.section	.bss.g_totle_read_sector,"aw",%nobits
 	.align	2
-.LANCHOR194 = . + 0
+.LANCHOR217 = . + 0
 	.type	g_totle_read_sector, %object
 	.size	g_totle_read_sector, 4
 g_totle_read_sector:
@@ -20731,12 +21466,24 @@ c_ftl_nand_max_sys_blks:
 	.size	g_slc2KBNand, 1
 g_slc2KBNand:
 	.space	1
-	.section	.rodata.__func__.7743,"a",%progbits
-.LANCHOR114 = . + 0
-	.type	__func__.7743, %object
-	.size	__func__.7743, 22
-__func__.7743:
-	.ascii	"select_l2p_ram_region\000"
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+.LANCHOR45 = . + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.rodata.__func__.8182,"a",%progbits
+.LANCHOR210 = . + 0
+	.type	__func__.8182, %object
+	.size	__func__.8182, 25
+__func__.8182:
+	.ascii	"allocate_data_superblock\000"
+	.section	.rodata.__func__.7745,"a",%progbits
+.LANCHOR213 = . + 0
+	.type	__func__.7745, %object
+	.size	__func__.7745, 31
+__func__.7745:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
 	.section	.data.Toshiba15RefValue,"aw",%progbits
 .LANCHOR12 = . + 0
 	.type	Toshiba15RefValue, %object
@@ -20839,17 +21586,18 @@ Toshiba15RefValue:
 	.byte	0
 	.section	.bss.g_gc_next_blk_1,"aw",%nobits
 	.align	1
-.LANCHOR147 = . + 0
+.LANCHOR150 = . + 0
 	.type	g_gc_next_blk_1, %object
 	.size	g_gc_next_blk_1, 2
 g_gc_next_blk_1:
 	.space	2
-	.section	.rodata.__func__.7820,"a",%progbits
-.LANCHOR205 = . + 0
-	.type	__func__.7820, %object
-	.size	__func__.7820, 15
-__func__.7820:
-	.ascii	"FtlVpcTblFlush\000"
+	.section	.bss.g_free_slc_blk_num,"aw",%nobits
+	.align	1
+.LANCHOR129 = . + 0
+	.type	g_free_slc_blk_num, %object
+	.size	g_free_slc_blk_num, 2
+g_free_slc_blk_num:
+	.space	2
 	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
 	.align	1
 .LANCHOR82 = . + 0
@@ -20859,7 +21607,7 @@ c_ftl_nand_map_region_num:
 	.space	2
 	.section	.bss.req_gc,"aw",%nobits
 	.align	2
-.LANCHOR132 = . + 0
+.LANCHOR135 = . + 0
 	.type	req_gc, %object
 	.size	req_gc, 4
 req_gc:
@@ -20870,17 +21618,24 @@ req_gc:
 	.type	gpNandc, %object
 	.size	gpNandc, 4
 gpNandc:
+	.space	4
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+.LANCHOR43 = . + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
 	.space	4
 	.section	.bss.g_totle_vendor_block,"aw",%nobits
 	.align	1
-.LANCHOR85 = . + 0
+.LANCHOR86 = . + 0
 	.type	g_totle_vendor_block, %object
 	.size	g_totle_vendor_block, 2
 g_totle_vendor_block:
 	.space	2
 	.section	.bss.p_l2p_ram_map,"aw",%nobits
 	.align	2
-.LANCHOR112 = . + 0
+.LANCHOR114 = . + 0
 	.type	p_l2p_ram_map, %object
 	.size	p_l2p_ram_map, 4
 p_l2p_ram_map:
@@ -20906,17 +21661,10 @@ DieCsIndex:
 	.space	8
 	.section	.bss.g_totle_cache_write_count,"aw",%nobits
 	.align	2
-.LANCHOR158 = . + 0
+.LANCHOR161 = . + 0
 	.type	g_totle_cache_write_count, %object
 	.size	g_totle_cache_write_count, 4
 g_totle_cache_write_count:
-	.space	4
-	.section	.bss.g_gc_num_req,"aw",%nobits
-	.align	2
-.LANCHOR128 = . + 0
-	.type	g_gc_num_req, %object
-	.size	g_gc_num_req, 4
-g_gc_num_req:
 	.space	4
 	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
 	.align	1
@@ -20927,7 +21675,7 @@ c_ftl_nand_byte_pre_oob:
 	.space	2
 	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
 	.align	1
-.LANCHOR149 = . + 0
+.LANCHOR152 = . + 0
 	.type	g_gc_bad_block_temp_tbl, %object
 	.size	g_gc_bad_block_temp_tbl, 34
 g_gc_bad_block_temp_tbl:
@@ -20939,7 +21687,7 @@ gFlashSdrModeEn:
 	.space	1
 	.section	.bss.p_data_block_list_tail,"aw",%nobits
 	.align	2
-.LANCHOR100 = . + 0
+.LANCHOR102 = . + 0
 	.type	p_data_block_list_tail, %object
 	.size	p_data_block_list_tail, 4
 p_data_block_list_tail:
@@ -20952,7 +21700,7 @@ gFlashInterfaceMode:
 	.space	1
 	.section	.bss.p_map_block_ver_table,"aw",%nobits
 	.align	2
-.LANCHOR123 = . + 0
+.LANCHOR125 = . + 0
 	.type	p_map_block_ver_table, %object
 	.size	p_map_block_ver_table, 4
 p_map_block_ver_table:
@@ -21016,14 +21764,14 @@ ToshibaA19RefValue:
 	.byte	0
 	.section	.bss.g_totle_swl_count,"aw",%nobits
 	.align	2
-.LANCHOR136 = . + 0
+.LANCHOR139 = . + 0
 	.type	g_totle_swl_count, %object
 	.size	g_totle_swl_count, 4
 g_totle_swl_count:
 	.space	4
 	.section	.bss.gBbtInfo,"aw",%nobits
 	.align	2
-.LANCHOR89 = . + 0
+.LANCHOR90 = . + 0
 	.type	gBbtInfo, %object
 	.size	gBbtInfo, 60
 gBbtInfo:
@@ -21037,7 +21785,7 @@ c_ftl_nand_byte_pre_page:
 	.space	2
 	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
 	.align	1
-.LANCHOR224 = . + 0
+.LANCHOR230 = . + 0
 	.type	g_power_lost_recovery_flag, %object
 	.size	g_power_lost_recovery_flag, 2
 g_power_lost_recovery_flag:
@@ -21055,16 +21803,16 @@ gNandIDBResBlkNum:
 	.size	gNandcDumpWriteEn, 4
 gNandcDumpWriteEn:
 	.space	4
-	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
-	.align	2
-.LANCHOR204 = . + 0
-	.type	gFlashProgCheckSpareBuffer, %object
-	.size	gFlashProgCheckSpareBuffer, 4
-gFlashProgCheckSpareBuffer:
-	.space	4
+	.section	.bss.g_gc_refresh_block_temp_num,"aw",%nobits
+	.align	1
+.LANCHOR176 = . + 0
+	.type	g_gc_refresh_block_temp_num, %object
+	.size	g_gc_refresh_block_temp_num, 2
+g_gc_refresh_block_temp_num:
+	.space	2
 	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
 	.align	1
-.LANCHOR135 = . + 0
+.LANCHOR138 = . + 0
 	.type	g_tmp_data_superblock_id, %object
 	.size	g_tmp_data_superblock_id, 2
 g_tmp_data_superblock_id:
@@ -21076,23 +21824,30 @@ g_tmp_data_superblock_id:
 	.size	c_ftl_nand_totle_phy_blks, 4
 c_ftl_nand_totle_phy_blks:
 	.space	4
+	.section	.data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits
+	.align	1
+.LANCHOR195 = . + 0
+	.type	ftl_gc_temp_block_bops_scan_page_addr, %object
+	.size	ftl_gc_temp_block_bops_scan_page_addr, 2
+ftl_gc_temp_block_bops_scan_page_addr:
+	.short	-1
 	.section	.bss.p_map_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR124 = . + 0
+.LANCHOR126 = . + 0
 	.type	p_map_region_ppn_table, %object
 	.size	p_map_region_ppn_table, 4
 p_map_region_ppn_table:
 	.space	4
 	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
 	.align	1
-.LANCHOR229 = . + 0
+.LANCHOR234 = . + 0
 	.type	g_gc_cur_blk_valid_pages, %object
 	.size	g_gc_cur_blk_valid_pages, 2
 g_gc_cur_blk_valid_pages:
 	.space	2
 	.section	.bss.p_gc_page_info,"aw",%nobits
 	.align	2
-.LANCHOR145 = . + 0
+.LANCHOR148 = . + 0
 	.type	p_gc_page_info, %object
 	.size	p_gc_page_info, 4
 p_gc_page_info:
@@ -21106,37 +21861,37 @@ c_ftl_nand_l2pmap_ram_region_num:
 	.space	2
 	.section	.bss.gc_discard_updated,"aw",%nobits
 	.align	2
-.LANCHOR221 = . + 0
+.LANCHOR227 = . + 0
 	.type	gc_discard_updated, %object
 	.size	gc_discard_updated, 4
 gc_discard_updated:
 	.space	4
-	.section	.rodata.__func__.7759,"a",%progbits
-.LANCHOR215 = . + 0
-	.type	__func__.7759, %object
-	.size	__func__.7759, 9
-__func__.7759:
-	.ascii	"log2phys\000"
+	.section	.rodata.__func__.7758,"a",%progbits
+.LANCHOR214 = . + 0
+	.type	__func__.7758, %object
+	.size	__func__.7758, 16
+__func__.7758:
+	.ascii	"FtlMapWritePage\000"
 	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
 	.align	1
-.LANCHOR182 = . + 0
+.LANCHOR186 = . + 0
 	.type	g_ect_tbl_info_size, %object
 	.size	g_ect_tbl_info_size, 2
 g_ect_tbl_info_size:
 	.space	2
 	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
 	.align	2
-.LANCHOR152 = . + 0
+.LANCHOR155 = . + 0
 	.type	g_all_blk_used_slc_mode, %object
 	.size	g_all_blk_used_slc_mode, 4
 g_all_blk_used_slc_mode:
 	.space	4
-	.section	.rodata.__func__.8040,"a",%progbits
-.LANCHOR125 = . + 0
-	.type	__func__.8040, %object
-	.size	__func__.8040, 16
-__func__.8040:
-	.ascii	"make_superblock\000"
+	.section	.rodata.__func__.7508,"a",%progbits
+.LANCHOR203 = . + 0
+	.type	__func__.7508, %object
+	.size	__func__.7508, 11
+__func__.7508:
+	.ascii	"FtlLoadBbt\000"
 	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
 	.align	1
 .LANCHOR78 = . + 0
@@ -21146,7 +21901,7 @@ c_ftl_nand_vendor_region_num:
 	.space	2
 	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
 	.align	2
-.LANCHOR232 = . + 0
+.LANCHOR239 = . + 0
 	.type	g_ftl_nand_free_count, %object
 	.size	g_ftl_nand_free_count, 4
 g_ftl_nand_free_count:
@@ -21166,27 +21921,28 @@ ToshibaRefValue:
 	.byte	112
 	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
 	.align	1
-.LANCHOR113 = . + 0
+.LANCHOR115 = . + 0
 	.type	g_l2p_last_update_region_id, %object
 	.size	g_l2p_last_update_region_id, 2
 g_l2p_last_update_region_id:
 	.space	2
 	.section	.bss.g_gc_page_offset,"aw",%nobits
 	.align	1
-.LANCHOR144 = . + 0
+.LANCHOR147 = . + 0
 	.type	g_gc_page_offset, %object
 	.size	g_gc_page_offset, 2
 g_gc_page_offset:
 	.space	2
-	.section	.rodata.__func__.8060,"a",%progbits
-.LANCHOR127 = . + 0
-	.type	__func__.8060, %object
-	.size	__func__.8060, 18
-__func__.8060:
-	.ascii	"SupperBlkListInit\000"
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+.LANCHOR193 = . + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
+	.space	4
 	.section	.bss.g_gc_blk_num,"aw",%nobits
 	.align	1
-.LANCHOR142 = . + 0
+.LANCHOR145 = . + 0
 	.type	g_gc_blk_num, %object
 	.size	g_gc_blk_num, 2
 g_gc_blk_num:
@@ -21200,82 +21956,76 @@ c_ftl_nand_max_map_blks:
 	.space	4
 	.section	.bss.g_totle_read_page_count,"aw",%nobits
 	.align	2
-.LANCHOR160 = . + 0
+.LANCHOR163 = . + 0
 	.type	g_totle_read_page_count, %object
 	.size	g_totle_read_page_count, 4
 g_totle_read_page_count:
 	.space	4
-	.section	.rodata.__func__.7648,"a",%progbits
-.LANCHOR110 = . + 0
-	.type	__func__.7648, %object
-	.size	__func__.7648, 22
-__func__.7648:
-	.ascii	"List_update_data_list\000"
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+.LANCHOR131 = . + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
 	.section	.bss.p_swl_mul_table,"aw",%nobits
 	.align	2
-.LANCHOR139 = . + 0
+.LANCHOR142 = . + 0
 	.type	p_swl_mul_table, %object
 	.size	p_swl_mul_table, 4
 p_swl_mul_table:
 	.space	4
 	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
 	.align	2
-.LANCHOR137 = . + 0
+.LANCHOR140 = . + 0
 	.type	ftl_gc_temp_power_lost_recovery_flag, %object
 	.size	ftl_gc_temp_power_lost_recovery_flag, 4
 ftl_gc_temp_power_lost_recovery_flag:
 	.space	4
 	.section	.bss.p_vendor_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR177 = . + 0
+.LANCHOR181 = . + 0
 	.type	p_vendor_data_buf, %object
 	.size	p_vendor_data_buf, 4
 p_vendor_data_buf:
 	.space	4
-	.section	.data.gc_tmp_blk_bops_scan_addr,"aw",%progbits
-	.align	1
-.LANCHOR190 = . + 0
-	.type	gc_tmp_blk_bops_scan_addr, %object
-	.size	gc_tmp_blk_bops_scan_addr, 2
-gc_tmp_blk_bops_scan_addr:
-	.short	-1
-	.section	.rodata.__func__.8315,"a",%progbits
-.LANCHOR231 = . + 0
-	.type	__func__.8315, %object
-	.size	__func__.8315, 23
-__func__.8315:
-	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.rodata.__func__.7875,"a",%progbits
+.LANCHOR197 = . + 0
+	.type	__func__.7875, %object
+	.size	__func__.7875, 14
+__func__.7875:
+	.ascii	"FtlScanSysBlk\000"
 	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
 	.align	2
-.LANCHOR186 = . + 0
+.LANCHOR190 = . + 0
 	.type	p_vendor_region_ppn_table, %object
 	.size	p_vendor_region_ppn_table, 4
 p_vendor_region_ppn_table:
 	.space	4
 	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
 	.align	2
-.LANCHOR118 = . + 0
+.LANCHOR120 = . + 0
 	.type	p_map_block_valid_page_count, %object
 	.size	p_map_block_valid_page_count, 4
 p_map_block_valid_page_count:
 	.space	4
 	.section	.bss.req_prgm,"aw",%nobits
 	.align	2
-.LANCHOR175 = . + 0
+.LANCHOR179 = . + 0
 	.type	req_prgm, %object
 	.size	req_prgm, 4
 req_prgm:
 	.space	4
 	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
 	.align	2
-.LANCHOR159 = . + 0
+.LANCHOR162 = . + 0
 	.type	g_totle_l2p_write_count, %object
 	.size	g_totle_l2p_write_count, 4
 g_totle_l2p_write_count:
 	.space	4
 	.section	.bss.g_num_data_superblocks,"aw",%nobits
 	.align	1
-.LANCHOR101 = . + 0
+.LANCHOR103 = . + 0
 	.type	g_num_data_superblocks, %object
 	.size	g_num_data_superblocks, 2
 g_num_data_superblocks:
@@ -21289,41 +22039,41 @@ c_ftl_nand_blk_pre_plane:
 	.space	2
 	.section	.bss.g_gc_head_data_block,"aw",%nobits
 	.align	2
-.LANCHOR167 = . + 0
+.LANCHOR170 = . + 0
 	.type	g_gc_head_data_block, %object
 	.size	g_gc_head_data_block, 4
 g_gc_head_data_block:
 	.space	4
 	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR162 = . + 0
+.LANCHOR165 = . + 0
 	.type	g_totle_slc_erase_count, %object
 	.size	g_totle_slc_erase_count, 4
 g_totle_slc_erase_count:
 	.space	4
-	.section	.rodata.__func__.7685,"a",%progbits
-.LANCHOR111 = . + 0
-	.type	__func__.7685, %object
-	.size	__func__.7685, 26
-__func__.7685:
-	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.rodata.__func__.8202,"a",%progbits
+.LANCHOR209 = . + 0
+	.type	__func__.8202, %object
+	.size	__func__.8202, 19
+__func__.8202:
+	.ascii	"get_new_active_ppa\000"
 	.section	.bss.req_gc_dst,"aw",%nobits
 	.align	2
-.LANCHOR174 = . + 0
+.LANCHOR178 = . + 0
 	.type	req_gc_dst, %object
 	.size	req_gc_dst, 4
 req_gc_dst:
 	.space	4
 	.section	.bss.req_read,"aw",%nobits
 	.align	2
-.LANCHOR173 = . + 0
+.LANCHOR177 = . + 0
 	.type	req_read, %object
 	.size	req_read, 4
 req_read:
 	.space	4
 	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR195 = . + 0
+.LANCHOR211 = . + 0
 	.type	g_totle_avg_erase_count, %object
 	.size	g_totle_avg_erase_count, 4
 g_totle_avg_erase_count:
@@ -21335,28 +22085,22 @@ g_totle_avg_erase_count:
 	.size	c_ftl_nand_planes_per_die, 2
 c_ftl_nand_planes_per_die:
 	.space	2
-	.section	.rodata.__func__.7427,"a",%progbits
-.LANCHOR91 = . + 0
-	.type	__func__.7427, %object
-	.size	__func__.7427, 14
-__func__.7427:
-	.ascii	"FtlBbt2Bitmap\000"
+	.section	.rodata.__func__.7794,"a",%progbits
+.LANCHOR221 = . + 0
+	.type	__func__.7794, %object
+	.size	__func__.7794, 9
+__func__.7794:
+	.ascii	"log2phys\000"
 	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
 	.align	1
-.LANCHOR171 = . + 0
+.LANCHOR174 = . + 0
 	.type	g_gc_merge_free_blk_threshold, %object
 	.size	g_gc_merge_free_blk_threshold, 2
 g_gc_merge_free_blk_threshold:
 	.space	2
-	.section	.rodata.__func__.7986,"a",%progbits
-.LANCHOR223 = . + 0
-	.type	__func__.7986, %object
-	.size	__func__.7986, 22
-__func__.7986:
-	.ascii	"FtlRecoverySuperblock\000"
 	.section	.bss.g_MaxLpn,"aw",%nobits
 	.align	2
-.LANCHOR87 = . + 0
+.LANCHOR88 = . + 0
 	.type	g_MaxLpn, %object
 	.size	g_MaxLpn, 4
 g_MaxLpn:
@@ -21368,9 +22112,15 @@ g_MaxLpn:
 	.size	gpNandParaInfo, 4
 gpNandParaInfo:
 	.space	4
+	.section	.rodata.__func__.7651,"a",%progbits
+.LANCHOR108 = . + 0
+	.type	__func__.7651, %object
+	.size	__func__.7651, 17
+__func__.7651:
+	.ascii	"List_remove_node\000"
 	.section	.bss.g_LowFormat,"aw",%nobits
 	.align	2
-.LANCHOR227 = . + 0
+.LANCHOR237 = . + 0
 	.type	g_LowFormat, %object
 	.size	g_LowFormat, 4
 g_LowFormat:
@@ -21384,7 +22134,7 @@ c_ftl_nand_type:
 	.space	2
 	.section	.bss.gSysFreeQueue,"aw",%nobits
 	.align	1
-.LANCHOR92 = . + 0
+.LANCHOR93 = . + 0
 	.type	gSysFreeQueue, %object
 	.size	gSysFreeQueue, 2056
 gSysFreeQueue:
@@ -21396,6 +22146,18 @@ gSysFreeQueue:
 	.size	slcPageToMlcPageTbl, 512
 slcPageToMlcPageTbl:
 	.space	512
+	.section	.rodata.__func__.8286,"a",%progbits
+.LANCHOR226 = . + 0
+	.type	__func__.8286, %object
+	.size	__func__.8286, 19
+__func__.8286:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.rodata.__func__.7313,"a",%progbits
+.LANCHOR238 = . + 0
+	.type	__func__.7313, %object
+	.size	__func__.7313, 8
+__func__.7313:
+	.ascii	"FtlInit\000"
 	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
 	.align	2
 .LANCHOR52 = . + 0
@@ -21403,16 +22165,22 @@ slcPageToMlcPageTbl:
 	.size	c_ftl_nand_sys_blks_per_plane, 4
 c_ftl_nand_sys_blks_per_plane:
 	.space	4
+	.section	.rodata.__func__.8380,"a",%progbits
+.LANCHOR236 = . + 0
+	.type	__func__.8380, %object
+	.size	__func__.8380, 23
+__func__.8380:
+	.ascii	"rk_ftl_garbage_collect\000"
 	.section	.bss.g_buffer_superblock,"aw",%nobits
 	.align	2
-.LANCHOR108 = . + 0
+.LANCHOR110 = . + 0
 	.type	g_buffer_superblock, %object
 	.size	g_buffer_superblock, 48
 g_buffer_superblock:
 	.space	48
 	.section	.bss.p_sys_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR96 = . + 0
+.LANCHOR98 = . + 0
 	.type	p_sys_data_buf, %object
 	.size	p_sys_data_buf, 4
 p_sys_data_buf:
@@ -21432,18 +22200,17 @@ g_maxRegNum:
 	.space	1
 	.section	.bss.p_gc_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR130 = . + 0
+.LANCHOR133 = . + 0
 	.type	p_gc_spare_buf, %object
 	.size	p_gc_spare_buf, 4
 p_gc_spare_buf:
 	.space	4
-	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
-	.align	2
-.LANCHOR203 = . + 0
-	.type	gFlashProgCheckBuffer, %object
-	.size	gFlashProgCheckBuffer, 4
-gFlashProgCheckBuffer:
-	.space	4
+	.section	.rodata.__func__.7681,"a",%progbits
+.LANCHOR112 = . + 0
+	.type	__func__.7681, %object
+	.size	__func__.7681, 22
+__func__.7681:
+	.ascii	"List_update_data_list\000"
 	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
 	.align	2
 .LANCHOR47 = . + 0
@@ -21459,7 +22226,7 @@ p_valid_page_count_check_table:
 	.space	4
 	.section	.bss.p_io_spare_buf,"aw",%nobits
 	.align	2
-.LANCHOR181 = . + 0
+.LANCHOR185 = . + 0
 	.type	p_io_spare_buf, %object
 	.size	p_io_spare_buf, 4
 p_io_spare_buf:
@@ -21480,14 +22247,14 @@ c_ftl_nand_planes_num:
 	.space	2
 	.section	.bss.p_io_data_buf_0,"aw",%nobits
 	.align	2
-.LANCHOR178 = . + 0
+.LANCHOR182 = . + 0
 	.type	p_io_data_buf_0, %object
 	.size	p_io_data_buf_0, 4
 p_io_data_buf_0:
 	.space	4
 	.section	.bss.p_io_data_buf_1,"aw",%nobits
 	.align	2
-.LANCHOR179 = . + 0
+.LANCHOR183 = . + 0
 	.type	p_io_data_buf_1, %object
 	.size	p_io_data_buf_1, 4
 p_io_data_buf_1:
@@ -21505,42 +22272,60 @@ gFlashOnfiModeEn:
 	.space	1
 	.section	.bss.g_totle_write_page_count,"aw",%nobits
 	.align	2
-.LANCHOR156 = . + 0
+.LANCHOR159 = . + 0
 	.type	g_totle_write_page_count, %object
 	.size	g_totle_write_page_count, 4
 g_totle_write_page_count:
 	.space	4
 	.section	.bss.g_totle_gc_page_count,"aw",%nobits
 	.align	2
-.LANCHOR155 = . + 0
+.LANCHOR158 = . + 0
 	.type	g_totle_gc_page_count, %object
 	.size	g_totle_gc_page_count, 4
 g_totle_gc_page_count:
 	.space	4
+	.section	.rodata.__func__.7929,"a",%progbits
+.LANCHOR199 = . + 0
+	.type	__func__.7929, %object
+	.size	__func__.7929, 15
+__func__.7929:
+	.ascii	"FtlLoadSysInfo\000"
 	.section	.bss.g_min_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR164 = . + 0
+.LANCHOR167 = . + 0
 	.type	g_min_erase_count, %object
 	.size	g_min_erase_count, 4
 g_min_erase_count:
 	.space	4
 	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
 	.align	1
-.LANCHOR115 = . + 0
+.LANCHOR117 = . + 0
 	.type	FtlUpdateVaildLpnCount, %object
 	.size	FtlUpdateVaildLpnCount, 2
 FtlUpdateVaildLpnCount:
 	.space	2
+	.section	.rodata.__func__.8213,"a",%progbits
+.LANCHOR207 = . + 0
+	.type	__func__.8213, %object
+	.size	__func__.8213, 16
+__func__.8213:
+	.ascii	"update_vpc_list\000"
+	.section	.rodata.__func__.7778,"a",%progbits
+.LANCHOR116 = . + 0
+	.type	__func__.7778, %object
+	.size	__func__.7778, 22
+__func__.7778:
+	.ascii	"select_l2p_ram_region\000"
 	.section	.bss.g_cur_erase_blk,"aw",%nobits
 	.align	2
-.LANCHOR88 = . + 0
+.LANCHOR89 = . + 0
 	.type	g_cur_erase_blk, %object
 	.size	g_cur_erase_blk, 4
 g_cur_erase_blk:
 	.space	4
 	.section	.bss.g_in_gc_progress,"aw",%nobits
 	.align	2
-.LANCHOR165 = . + 0
+.LANCHOR168 = . + 0
 	.type	g_in_gc_progress, %object
 	.size	g_in_gc_progress, 4
 g_in_gc_progress:
@@ -21566,15 +22351,9 @@ gFlashPageBuffer1:
 	.size	c_ftl_nand_init_sys_blks_per_plane, 4
 c_ftl_nand_init_sys_blks_per_plane:
 	.space	4
-	.section	.rodata.__func__.8151,"a",%progbits
-.LANCHOR206 = . + 0
-	.type	__func__.8151, %object
-	.size	__func__.8151, 16
-__func__.8151:
-	.ascii	"update_vpc_list\000"
 	.section	.bss.p_free_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR103 = . + 0
+.LANCHOR105 = . + 0
 	.type	p_free_data_block_list_head, %object
 	.size	p_free_data_block_list_head, 4
 p_free_data_block_list_head:
@@ -21586,12 +22365,6 @@ p_free_data_block_list_head:
 	.size	gNandIDataBuf, 2048
 gNandIDataBuf:
 	.space	2048
-	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
-.LANCHOR45 = . + 0
-	.type	gNandFlashIDBEccBits, %object
-	.size	gNandFlashIDBEccBits, 1
-gNandFlashIDBEccBits:
-	.space	1
 	.section	.bss.gNandPhyInfo,"aw",%nobits
 	.align	2
 .LANCHOR28 = . + 0
@@ -21601,55 +22374,55 @@ gNandPhyInfo:
 	.space	28
 	.section	.bss.gSysInfo,"aw",%nobits
 	.align	2
-.LANCHOR191 = . + 0
+.LANCHOR196 = . + 0
 	.type	gSysInfo, %object
 	.size	gSysInfo, 12
 gSysInfo:
 	.space	12
-	.section	.bss.gMultiPageReadEn,"aw",%nobits
-.LANCHOR189 = . + 0
-	.type	gMultiPageReadEn, %object
-	.size	gMultiPageReadEn, 1
-gMultiPageReadEn:
-	.space	1
+	.section	.rodata.__func__.8105,"a",%progbits
+.LANCHOR130 = . + 0
+	.type	__func__.8105, %object
+	.size	__func__.8105, 18
+__func__.8105:
+	.ascii	"SupperBlkListInit\000"
 	.section	.bss.g_gc_blk_index,"aw",%nobits
 	.align	1
-.LANCHOR172 = . + 0
+.LANCHOR175 = . + 0
 	.type	g_gc_blk_index, %object
 	.size	g_gc_blk_index, 2
 g_gc_blk_index:
 	.space	2
 	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
 	.align	1
-.LANCHOR170 = . + 0
+.LANCHOR173 = . + 0
 	.type	g_gc_free_blk_threshold, %object
 	.size	g_gc_free_blk_threshold, 2
 g_gc_free_blk_threshold:
 	.space	2
 	.section	.bss.g_max_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR163 = . + 0
+.LANCHOR166 = . + 0
 	.type	g_max_erase_count, %object
 	.size	g_max_erase_count, 4
 g_max_erase_count:
 	.space	4
 	.section	.bss.gVendorBlkInfo,"aw",%nobits
 	.align	2
-.LANCHOR213 = . + 0
+.LANCHOR215 = . + 0
 	.type	gVendorBlkInfo, %object
-	.size	gVendorBlkInfo, 40
+	.size	gVendorBlkInfo, 44
 gVendorBlkInfo:
-	.space	40
+	.space	44
 	.section	.bss.g_GlobalDataVersion,"aw",%nobits
 	.align	2
-.LANCHOR154 = . + 0
+.LANCHOR157 = . + 0
 	.type	g_GlobalDataVersion, %object
 	.size	g_GlobalDataVersion, 4
 g_GlobalDataVersion:
 	.space	4
 	.section	.bss.gp_last_act_superblock,"aw",%nobits
 	.align	2
-.LANCHOR219 = . + 0
+.LANCHOR224 = . + 0
 	.type	gp_last_act_superblock, %object
 	.size	gp_last_act_superblock, 4
 gp_last_act_superblock:
@@ -21808,25 +22581,13 @@ c_ftl_nand_sec_pre_page:
 	.size	gNandMaxDie, 1
 gNandMaxDie:
 	.space	1
-	.section	.rodata.__func__.7708,"a",%progbits
-.LANCHOR211 = . + 0
-	.type	__func__.7708, %object
-	.size	__func__.7708, 31
-__func__.7708:
-	.ascii	"Ftl_write_map_blk_to_last_page\000"
 	.section	.bss.p_gc_data_buf,"aw",%nobits
 	.align	2
-.LANCHOR129 = . + 0
+.LANCHOR132 = . + 0
 	.type	p_gc_data_buf, %object
 	.size	p_gc_data_buf, 4
 p_gc_data_buf:
 	.space	4
-	.section	.rodata.__func__.7953,"a",%progbits
-.LANCHOR216 = . + 0
-	.type	__func__.7953, %object
-	.size	__func__.7953, 16
-__func__.7953:
-	.ascii	"FtlReUsePrevPpa\000"
 	.section	.bss.g_MaxLbaSector,"aw",%nobits
 	.align	2
 .LANCHOR84 = . + 0
@@ -21836,21 +22597,21 @@ g_MaxLbaSector:
 	.space	4
 	.section	.bss.p_erase_count_table,"aw",%nobits
 	.align	2
-.LANCHOR94 = . + 0
+.LANCHOR96 = . + 0
 	.type	p_erase_count_table, %object
 	.size	p_erase_count_table, 4
 p_erase_count_table:
 	.space	4
 	.section	.bss.p_vendor_block_table,"aw",%nobits
 	.align	2
-.LANCHOR86 = . + 0
+.LANCHOR87 = . + 0
 	.type	p_vendor_block_table, %object
 	.size	p_vendor_block_table, 4
 p_vendor_block_table:
 	.space	4
 	.section	.bss.p_data_block_list_head,"aw",%nobits
 	.align	2
-.LANCHOR98 = . + 0
+.LANCHOR100 = . + 0
 	.type	p_data_block_list_head, %object
 	.size	p_data_block_list_head, 4
 p_data_block_list_head:
@@ -21863,21 +22624,21 @@ gNandOptPara:
 	.space	32
 	.section	.bss.g_sys_save_data,"aw",%nobits
 	.align	2
-.LANCHOR140 = . + 0
+.LANCHOR143 = . + 0
 	.type	g_sys_save_data, %object
 	.size	g_sys_save_data, 48
 g_sys_save_data:
 	.space	48
 	.section	.bss.g_VaildLpn,"aw",%nobits
 	.align	2
-.LANCHOR116 = . + 0
+.LANCHOR118 = . + 0
 	.type	g_VaildLpn, %object
 	.size	g_VaildLpn, 4
 g_VaildLpn:
 	.space	4
 	.section	.bss.g_recovery_page_num,"aw",%nobits
 	.align	2
-.LANCHOR225 = . + 0
+.LANCHOR231 = . + 0
 	.type	g_recovery_page_num, %object
 	.size	g_recovery_page_num, 4
 g_recovery_page_num:
@@ -21889,12 +22650,20 @@ g_recovery_page_num:
 	.size	gTotleBlock, 2
 gTotleBlock:
 	.space	2
-	.section	.rodata.__func__.7695,"a",%progbits
-.LANCHOR210 = . + 0
-	.type	__func__.7695, %object
-	.size	__func__.7695, 15
-__func__.7695:
-	.ascii	"ftl_map_blk_gc\000"
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR241 = . + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+.LANCHOR204 = . + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
 	.section	.bss.IDByte,"aw",%nobits
 	.align	2
 .LANCHOR22 = . + 0
@@ -21904,7 +22673,7 @@ IDByte:
 	.space	32
 	.section	.bss.g_gc_temp_superblock,"aw",%nobits
 	.align	2
-.LANCHOR109 = . + 0
+.LANCHOR111 = . + 0
 	.type	g_gc_temp_superblock, %object
 	.size	g_gc_temp_superblock, 48
 g_gc_temp_superblock:
@@ -21925,14 +22694,20 @@ gBlockPageAlignSize:
 	.space	4
 	.section	.bss.g_gc_superblock,"aw",%nobits
 	.align	2
-.LANCHOR201 = . + 0
+.LANCHOR202 = . + 0
 	.type	g_gc_superblock, %object
 	.size	g_gc_superblock, 48
 g_gc_superblock:
 	.space	48
+	.section	.rodata.__func__.8196,"a",%progbits
+.LANCHOR219 = . + 0
+	.type	__func__.8196, %object
+	.size	__func__.8196, 29
+__func__.8196:
+	.ascii	"allocate_new_data_superblock\000"
 	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
 	.align	2
-.LANCHOR95 = . + 0
+.LANCHOR97 = . + 0
 	.type	g_totle_sys_slc_erase_count, %object
 	.size	g_totle_sys_slc_erase_count, 4
 g_totle_sys_slc_erase_count:
@@ -21944,53 +22719,48 @@ g_totle_sys_slc_erase_count:
 	.size	c_ftl_nand_blks_per_die_shift, 2
 c_ftl_nand_blks_per_die_shift:
 	.space	2
-	.section	.rodata.__func__.8156,"a",%progbits
-.LANCHOR207 = . + 0
-	.type	__func__.8156, %object
-	.size	__func__.8156, 20
-__func__.8156:
-	.ascii	"decrement_vpc_count\000"
 	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
 	.align	2
-.LANCHOR151 = . + 0
+.LANCHOR154 = . + 0
 	.type	g_SlcPartLbaEndSector, %object
 	.size	g_SlcPartLbaEndSector, 4
 g_SlcPartLbaEndSector:
 	.space	4
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR235 = . + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
 	.section	.bss.g_totle_discard_page_count,"aw",%nobits
 	.align	2
-.LANCHOR157 = . + 0
+.LANCHOR160 = . + 0
 	.type	g_totle_discard_page_count, %object
 	.size	g_totle_discard_page_count, 4
 g_totle_discard_page_count:
 	.space	4
 	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
 	.align	1
-.LANCHOR90 = . + 0
+.LANCHOR91 = . + 0
 	.type	c_ftl_nand_bbm_buf_size, %object
 	.size	c_ftl_nand_bbm_buf_size, 2
 c_ftl_nand_bbm_buf_size:
 	.space	2
 	.section	.bss.gL2pMapInfo,"aw",%nobits
 	.align	2
-.LANCHOR120 = . + 0
+.LANCHOR122 = . + 0
 	.type	gL2pMapInfo, %object
-	.size	gL2pMapInfo, 40
+	.size	gL2pMapInfo, 44
 gL2pMapInfo:
-	.space	40
+	.space	44
 	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
 	.align	2
-.LANCHOR168 = . + 0
+.LANCHOR171 = . + 0
 	.type	g_gc_head_data_block_count, %object
 	.size	g_gc_head_data_block_count, 4
 g_gc_head_data_block_count:
 	.space	4
-	.section	.rodata.__func__.7338,"a",%progbits
-.LANCHOR218 = . + 0
-	.type	__func__.7338, %object
-	.size	__func__.7338, 13
-__func__.7338:
-	.ascii	"FtlProgPages\000"
 	.section	.bss.gFlashPageBuffer0,"aw",%nobits
 	.align	2
 .LANCHOR44 = . + 0
@@ -22000,25 +22770,31 @@ gFlashPageBuffer0:
 	.space	4
 	.section	.bss.g_req_cache,"aw",%nobits
 	.align	2
-.LANCHOR134 = . + 0
+.LANCHOR137 = . + 0
 	.type	g_req_cache, %object
 	.size	g_req_cache, 4
 g_req_cache:
 	.space	4
 	.section	.data.gFtlInitStatus,"aw",%progbits
 	.align	2
-.LANCHOR222 = . + 0
+.LANCHOR225 = . + 0
 	.type	gFtlInitStatus, %object
 	.size	gFtlInitStatus, 4
 gFtlInitStatus:
 	.word	-1
 	.section	.bss.c_gc_page_buf_num,"aw",%nobits
 	.align	2
-.LANCHOR133 = . + 0
+.LANCHOR136 = . + 0
 	.type	c_gc_page_buf_num, %object
 	.size	c_gc_page_buf_num, 4
 c_gc_page_buf_num:
 	.space	4
+	.section	.rodata.__func__.7718,"a",%progbits
+.LANCHOR113 = . + 0
+	.type	__func__.7718, %object
+	.size	__func__.7718, 26
+__func__.7718:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
 	.section	.data.NandFlashParaTbl,"aw",%progbits
 	.align	1
 .LANCHOR26 = . + 0
@@ -23906,7 +24682,7 @@ c_ftl_nand_page_pre_blk:
 	.space	2
 	.section	.bss.g_totle_map_block,"aw",%nobits
 	.align	1
-.LANCHOR121 = . + 0
+.LANCHOR123 = . + 0
 	.type	g_totle_map_block, %object
 	.size	g_totle_map_block, 2
 g_totle_map_block:
@@ -23920,17 +24696,11 @@ DeviceCapacity:
 	.space	4
 	.section	.bss.gp_ect_tbl_info,"aw",%nobits
 	.align	2
-.LANCHOR183 = . + 0
+.LANCHOR187 = . + 0
 	.type	gp_ect_tbl_info, %object
 	.size	gp_ect_tbl_info, 4
 gp_ect_tbl_info:
 	.space	4
-	.section	.rodata.__func__.7655,"a",%progbits
-.LANCHOR196 = . + 0
-	.type	__func__.7655, %object
-	.size	__func__.7655, 16
-__func__.7655:
-	.ascii	"load_l2p_region\000"
 	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
 	.align	1
 .LANCHOR79 = . + 0
@@ -23940,28 +24710,28 @@ c_ftl_nand_map_blks_per_plane:
 	.space	2
 	.section	.bss.p_l2p_map_buf,"aw",%nobits
 	.align	2
-.LANCHOR119 = . + 0
+.LANCHOR121 = . + 0
 	.type	p_l2p_map_buf, %object
 	.size	p_l2p_map_buf, 4
 p_l2p_map_buf:
 	.space	4
 	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
 	.align	2
-.LANCHOR138 = . + 0
+.LANCHOR141 = . + 0
 	.type	g_recovery_page_min_ver, %object
 	.size	g_recovery_page_min_ver, 4
 g_recovery_page_min_ver:
 	.space	4
 	.section	.bss.g_active_superblock,"aw",%nobits
 	.align	2
-.LANCHOR107 = . + 0
+.LANCHOR109 = . + 0
 	.type	g_active_superblock, %object
 	.size	g_active_superblock, 48
 g_active_superblock:
 	.space	48
 	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
 	.align	1
-.LANCHOR148 = . + 0
+.LANCHOR151 = . + 0
 	.type	g_gc_bad_block_temp_num, %object
 	.size	g_gc_bad_block_temp_num, 2
 g_gc_bad_block_temp_num:

commit f312c7e47abcd342da8b8e6a635ab0aacab2228c
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Nov 17 17:23:44 2017 +0800

    rockchip: i2c: rk3228: support i2c for rk3228 SoC
    
    Change-Id: I94e308893462928a8dd92993261c939bf1e26195
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>
    (cherry picked from commit 82a1cec1a4789ca34c6067ad7d1b27a66c1316ac)

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index a051893c4a..4c0d95adf6 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -398,6 +398,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
 	{ .compatible = "rockchip,rk3288-i2c" },
 	{ .compatible = "rockchip,rk3328-i2c" },
 	{ .compatible = "rockchip,rk3399-i2c" },
+	{ .compatible = "rockchip,rk3228-i2c" },
 	{ }
 };
 

commit f492fc00668915c59921e0c63b252aa09a7aed81
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 17 11:06:24 2017 +0800

    rockchip: rk3126: add bnd-d708 board support
    
    Change-Id: Iaf6c81dcc2eb8623f5234d7f2e32b47e536b1c32
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 378e43e097..0032a21377 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
 	rk3066a-mk808.dtb \
 	rk3126-evb.dtb \
+	rk3126-bnd-d708.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
diff --git a/arch/arm/dts/rk3126-bnd-d708.dts b/arch/arm/dts/rk3126-bnd-d708.dts
new file mode 100644
index 0000000000..2f8feb7c96
--- /dev/null
+++ b/arch/arm/dts/rk3126-bnd-d708.dts
@@ -0,0 +1,338 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RK3126 bnd-d708 board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	vcc_backlight: vcc-backlight {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_backlight";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <
+			255 169 168 168 167 166 166 165
+			164 164 163 162 162 161 160 160
+			159 158 158 157 156 156 155 154
+			154 153 152 152 151 150 150 149
+			148 148 147 146 146 145 144 144
+			143 142 142 141 140 140 139 138
+			138 137 136 136 135 134 134 133
+			132 132 131 130 130 129 128 128
+			127 126 126 125 124 124 123 122
+			122 121 120 120 119 118 118 117
+			116 116 115 114 114 113 112 112
+			111 110 110 109 108 108 107 106
+			106 105 104 104 103 102 102 101
+			100 100  99  98  98  97  96  96
+			 95  94  94  93  92  92  91  90
+			 90  89  88  88  87  86  86  85
+			 84  84  83  82  82  81  80  80
+			 79  78  78  77  76  76  75  74
+			 74  73  72  72  71  70  70  69
+			 68  68  67  66  66  65  64  64
+			 63  62  62  61  60  60  59  58
+			 58  57  56  56  55  54  54  53
+			 52  52  51  50  50  49  48  48
+			 47  46  46  45  44  44  43  42
+			 42  41  40  40  39  38  38  37
+			 36  36  35  34  34  33  32  32
+			 31  30  30  29  28  28  27  26
+			 26  25  24  24  23  22  22  21
+			 20  20  19  18  18  17  16  16
+			 15  14  14  13  12  12  11  10
+			 10   9   8   8   7   6   6   5
+			  4   4   3   2   1   1   1   0>;
+		default-brightness-level = <128>;
+		pwms = <&pwm0 0 25000 0>;
+		enable-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
+		power-supply = <&vcc_backlight>;
+		status = "okay";
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <3300000>;
+
+		button-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <0>;
+		};
+
+		button-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <1650000>;
+		};
+	};
+
+	charge-animation {
+		compatible = "charge-animation";
+		screen-on-voltage-threshold = <3350>;
+		power-on-voltage-threshold = <3450>;
+		power-on-soc-threshold = <0>;
+		status = "okay";
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	rk816: pmic@1a {
+		compatible = "rockchip,rk816";
+		reg = <0x1a>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk816-clkout2";
+
+		gpio {
+			status = "okay";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		rtc {
+			status = "okay";
+		};
+
+		battery {
+			compatible = "rk816-battery";
+			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
+						  3825 3843 3858 3870 3886 3916 3955
+						  3988 4010 4023 4032 4049 4080 4151 >;
+			design_capacity = <2000>;
+			design_qmax = <2200>;
+			bat_res = <120>;
+			max_input_current = <2000>;
+			max_chrg_current = <1000>;
+			max_chrg_voltage = <4200>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3800>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			virtual_power = <0>;
+			power_dc2otg = <0>;
+			dc_det_adc = <0>;
+		};
+
+		regulators {
+
+			vdd_arm: DCDC_REG1{
+				regulator-name= "vdd_arm";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vdd_log: DCDC_REG2 {
+				regulator-name= "vdd_logic";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc28_cif: LDO_REG1 {
+				regulator-name = "vcc28_cif";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc18_cif: LDO_REG2 {
+				regulator-name = "vcc18_cif";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_11: LDO_REG3 {
+				regulator-name = "vdd_11";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			ldo4: LDO_REG4 {
+				regulator-name= "ldo4";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo5: LDO_REG5 {
+				regulator-name= "ldo5";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo6: LDO_REG6 {
+				regulator-name= "ldo6";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+		};
+	};
+};
+
+&nandc {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
+&usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+	};
+};
+
+&saradc {
+	status = "okay";
+};
diff --git a/configs/bnd-d708-rk3126_defconfig b/configs/bnd-d708-rk3126_defconfig
new file mode 100644
index 0000000000..18afe17745
--- /dev/null
+++ b/configs/bnd-d708-rk3126_defconfig
@@ -0,0 +1,76 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_PARAM=y
+CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
+CONFIG_ROCKCHIP_PARTITION_BOOT=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3126-bnd-d708"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_CHARGE_DISPLAY=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 2ffd0cc6471a3ff735add1d658365f9288fa455a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Nov 20 11:07:37 2017 +0800

    ARM: dts: rk3128: fix i2c2 address typo
    
    Change-Id: I798374f2c7625c92809aa51613efcb3e6895a177
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index bed21b4bf8..c4bd95384b 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -533,7 +533,7 @@
 
 	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <20072000 0x1000>;
+		reg = <0x20072000 0x1000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;

commit e9cfb932f981cf94c2771cd8a60277cf3f85f019
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Mon Nov 20 12:50:35 2017 +0800

    rockchip: efuse: Fix compile warning.
    
    Change-Id: I57b331c0e2bdc713c60e1f636b66a11cdf3ef015
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
    (cherry picked from commit d3f8f6517e8b2073aff51d6a35528baeb35d2153)

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 1b060b7aa6..b4ad19cfe8 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -209,19 +209,19 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 static const struct udevice_id rockchip_efuse_ids[] = {
 	{
 		.compatible = "rockchip,rockchip-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk3066a-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk3188-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk322x-efuse",
-		.data = (void *)&rockchip_rk3288_efuse_read,
+		.data = (ulong)&rockchip_rk3288_efuse_read,
 	},
 	{
 		.compatible = "rockchip,rk3399-efuse",

commit 95a5167379ba2d7f27e907afb5b00f2474376791
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Mon Nov 20 12:51:01 2017 +0800

    libavb: Fix compile warning.
    
    Change-Id: I6a36f02348e61c166334221edc157ee8a261253a
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
    (cherry picked from commit a0e0ea07af830fdf873fb874a7e76264597bca3b)

diff --git a/lib/avb/rk_libavb/avb_sysdeps_posix.c b/lib/avb/rk_libavb/avb_sysdeps_posix.c
index 44ca777ce1..562f9214be 100644
--- a/lib/avb/rk_libavb/avb_sysdeps_posix.c
+++ b/lib/avb/rk_libavb/avb_sysdeps_posix.c
@@ -56,7 +56,6 @@ size_t avb_strlen(const char* str) {
 
 void avb_abort(void) {
   abort();
-return;
 }
 
 void avb_print(const char* message) {

commit f6762129cedbb0a18ada56c11ec32acc901152c6
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Mon Nov 20 12:50:18 2017 +0800

    rockchip: rk322x: Fix compile warning.
    
    Change-Id: I52b94730e87bbefb8cccb371c7a246c0980345fc
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>
    (cherry picked from commit 4ed43066238174127e72758fbed3725eb95c6b97)

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 88281abc0c..fdfdb5bc4c 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -12,6 +12,7 @@
 #include <asm/gpio.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
+#include <asm/arch/timer.h>
 #include <asm/arch/grf_rk322x.h>
 #include <asm/arch/boot_mode.h>
 
@@ -37,6 +38,19 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk322x_grf *grf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
+
+	return 0;
+}
+
 #define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
 static int fastboot_key_pressed(void)
 {
@@ -44,6 +58,7 @@ static int fastboot_key_pressed(void)
 	gpio_direction_input(FASTBOOT_KEY_GPIO);
 	return !gpio_get_value(FASTBOOT_KEY_GPIO);
 }
+#endif
 
 __weak int rk_board_late_init(void)
 {
@@ -52,10 +67,12 @@ __weak int rk_board_late_init(void)
 
 int board_late_init(void)
 {
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
 	if (fastboot_key_pressed()) {
 		printf("fastboot key pressed!\n");
 		fb_set_reboot_flag();
 	}
+#endif
 
 	setup_boot_mode();
 
@@ -171,16 +188,3 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 }
 #endif
 
-#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
-int fb_set_reboot_flag(void)
-{
-	struct rk322x_grf *grf;
-
-	printf("Setting reboot to fastboot flag ...\n");
-	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	/* Set boot mode to fastboot */
-	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
-
-	return 0;
-}
-#endif

commit f337c9f71544a430370ef1bd10f550651b9f18ea
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Nov 20 19:08:56 2017 +0800

    common: edid: Fix some warning
    
    Change-Id: I65483b598fa89bd871913f58ad00935f6dadaa95
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 0eb8984021..adfe8f6952 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -1442,14 +1442,14 @@ static void decode_mode(u8 *buf, struct drm_display_mode *mode)
  *
  * Returns true if @vendor is in @edid, false otherwise
  */
-static bool edid_vendor(struct edid1_info *edid, char *vendor)
+static bool edid_vendor(struct edid *edid, char *vendor)
 {
 	char edid_vendor[3];
 
-	edid_vendor[0] = ((edid->manufacturer_name[0] & 0x7c) >> 2) + '@';
-	edid_vendor[1] = (((edid->manufacturer_name[0] & 0x3) << 3) |
-			  ((edid->manufacturer_name[1] & 0xe0) >> 5)) + '@';
-	edid_vendor[2] = (edid->manufacturer_name[1] & 0x1f) + '@';
+	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
+	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
+			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
+	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
 
 	return !strncmp(edid_vendor, vendor, 3);
 }
@@ -1487,6 +1487,32 @@ static bool cea_is_hdmi_vsdb_present(struct edid_cea861_info *info)
 	return false;
 }
 
+static int drm_get_vrefresh(const struct drm_display_mode *mode)
+{
+	int refresh = 0;
+	unsigned int calc_val;
+
+	if (mode->vrefresh > 0) {
+		refresh = mode->vrefresh;
+	} else if (mode->htotal > 0 && mode->vtotal > 0) {
+		int vtotal;
+
+		vtotal = mode->vtotal;
+		/* work out vrefresh the value will be x1000 */
+		calc_val = (mode->clock * 1000);
+		calc_val /= mode->htotal;
+		refresh = (calc_val + vtotal / 2) / vtotal;
+
+		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+			refresh *= 2;
+		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+			refresh /= 2;
+		if (mode->vscan > 1)
+			refresh /= mode->vscan;
+	}
+	return refresh;
+}
+
 int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
 		      int *panel_bits_per_colourp)
 {
@@ -1977,7 +2003,7 @@ struct drm_display_mode *drm_cvt_mode(int hdisplay, int vdisplay, int vrefresh,
 		/* 3) Nominal HSync width (% of line period) - default 8 */
 #define CVT_HSYNC_PERCENTAGE	8
 		unsigned int hblank_percentage;
-		int vsyncandback_porch, vback_porch, hblank;
+		int vsyncandback_porch, hblank;
 
 		/* estimated the horizontal period */
 		tmp1 = HV_FACTOR * 1000000  -
@@ -1992,8 +2018,9 @@ struct drm_display_mode *drm_cvt_mode(int hdisplay, int vdisplay, int vrefresh,
 			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
 		else
 			vsyncandback_porch = tmp1;
-		/* 10. Find number of lines in back porch */
-		vback_porch = vsyncandback_porch - vsync;
+		/* 10. Find number of lines in back porch
+		 *		vback_porch = vsyncandback_porch - vsync;
+		 */
 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
 				vsyncandback_porch + CVT_MIN_V_PORCH;
 		/* 5) Definition of Horizontal blanking time limitation */
@@ -2203,9 +2230,8 @@ static bool drm_valid_hdmi_vic(u8 vic)
 }
 
 static void drm_add_hdmi_modes(struct hdmi_edid_data *data,
-			       struct drm_display_mode *mode)
+			       const struct drm_display_mode *mode)
 {
-	int ret;
 	struct drm_display_mode *mode_buf = data->mode_buf;
 
 	mode_buf[(data->modes)++] = *mode;
@@ -2327,8 +2353,7 @@ static
 int do_y420vdb_modes(const u8 *svds, u8 svds_len, struct drm_hdmi_info *hdmi,
 		     struct hdmi_edid_data *data)
 {
-	int modes = 0, i, ret;
-	struct drm_display_mode *mode_buf = data->mode_buf;
+	int modes = 0, i;
 
 	for (i = 0; i < svds_len; i++) {
 		u8 vic = svd_to_vic(svds[i]);
@@ -2371,7 +2396,7 @@ stereo_match_mandatory(const struct drm_display_mode *mode,
 	return mode->hdisplay == stereo_mode->width &&
 	       mode->vdisplay == stereo_mode->height &&
 	       interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
-	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
+	       drm_get_vrefresh(mode) == stereo_mode->vrefresh;
 }
 
 static int add_hdmi_mandatory_stereo_modes(struct hdmi_edid_data *data)
@@ -2450,8 +2475,6 @@ static int add_3d_struct_modes(struct hdmi_edid_data *data, u16 structure,
 
 static int add_hdmi_mode(struct hdmi_edid_data *data, u8 vic)
 {
-	struct drm_display_mode *newmode;
-
 	if (!drm_valid_hdmi_vic(vic)) {
 		debug("Unknown HDMI VIC: %d\n", vic);
 		return 0;
@@ -3007,7 +3030,7 @@ static void drm_add_display_info(struct hdmi_edid_data *data, struct edid *edid)
 		break;
 	}
 
-	debug("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
+	debug("Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
 	      info->bpc);
 
 	info->color_formats |= DRM_COLOR_FORMAT_RGB444;
@@ -3020,12 +3043,10 @@ static void drm_add_display_info(struct hdmi_edid_data *data, struct edid *edid)
 static
 int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 {
-	struct edid_cea861_info *info;
 	const u8 *cea = drm_find_cea_extension(edid);
 	const u8 *db, *hdmi = NULL, *video = NULL;
 	u8 dbl, hdmi_len, video_len = 0;
 	int modes = 0;
-	u8 end, i = 0;
 
 	if (cea && cea_revision(cea) >= 3) {
 		int i, start, end;
@@ -3261,7 +3282,7 @@ struct drm_display_mode *drm_mode_detailed(struct edid *edid,
 
 set_refresh:
 
-	mode->vrefresh = drm_mode_vrefresh(mode);
+	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
 }
@@ -3718,7 +3739,7 @@ static struct drm_display_mode *drm_mode_find_dmt(
 			continue;
 		if (vsize != ptr->vdisplay)
 			continue;
-		if (fresh != drm_mode_vrefresh(ptr))
+		if (fresh != drm_get_vrefresh(ptr))
 			continue;
 		if (rb != mode_is_rb(ptr))
 			continue;
@@ -3755,9 +3776,8 @@ drm_gtf_mode_complex(int hdisplay, int vdisplay,
 	int top_margin, bottom_margin;
 	int interlace;
 	unsigned int hfreq_est;
-	int vsync_plus_bp, vback_porch;
-	unsigned int vtotal_lines, vfieldrate_est, hperiod;
-	unsigned int vfield_rate, vframe_rate;
+	int vsync_plus_bp;
+	unsigned int vtotal_lines;
 	int left_margin, right_margin;
 	unsigned int total_active_pixels, ideal_duty_cycle;
 	unsigned int hblank, total_pixels, pixel_freq;
@@ -3817,23 +3837,28 @@ drm_gtf_mode_complex(int hdisplay, int vdisplay,
 	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
 	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
 	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
-	/*  9. Find the number of lines in V back porch alone: */
-	vback_porch = vsync_plus_bp - V_SYNC_RQD;
+	/*  9. Find the number of lines in V back porch alone:
+	 *	vback_porch = vsync_plus_bp - V_SYNC_RQD;
+	 */
 	/*  10. Find the total number of lines in Vertical field period: */
 	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
 			vsync_plus_bp + GTF_MIN_V_PORCH;
-	/*  11. Estimate the Vertical field frequency: */
-	vfieldrate_est = hfreq_est / vtotal_lines;
-	/*  12. Find the actual horizontal period: */
-	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
-
-	/*  13. Find the actual Vertical field frequency: */
-	vfield_rate = hfreq_est / vtotal_lines;
-	/*  14. Find the Vertical frame frequency: */
-	if (interlaced)
-		vframe_rate = vfield_rate / 2;
-	else
-		vframe_rate = vfield_rate;
+	/*  11. Estimate the Vertical field frequency:
+	 *  vfieldrate_est = hfreq_est / vtotal_lines;
+	 */
+
+	/*  12. Find the actual horizontal period:
+	 *	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
+	 */
+	/*  13. Find the actual Vertical field frequency:
+	 *	vfield_rate = hfreq_est / vtotal_lines;
+	 */
+	/*  14. Find the Vertical frame frequency:
+	 *	if (interlaced)
+	 *		vframe_rate = vfield_rate / 2;
+	 *	else
+	 *		vframe_rate = vfield_rate;
+	 */
 	/*  15. Find number of pixels in left margin: */
 	if (margins)
 		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
@@ -3973,7 +3998,7 @@ static struct drm_display_mode *
 drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
 	     struct std_timing *t)
 {
-	struct drm_display_mode *m, *mode = NULL;
+	struct drm_display_mode *mode = NULL;
 	int i, hsize, vsize;
 	int vrefresh_rate;
 	int num = data->modes;
@@ -4021,7 +4046,7 @@ drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
 	for (i = 0; i < num; i++)
 		if (data->mode_buf[i].hdisplay == hsize &&
 		    data->mode_buf[i].hdisplay &&
-		    drm_mode_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
+		    drm_get_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
 			return NULL;
 
 	/* HDTV hack, part 2 */
@@ -4249,7 +4274,7 @@ static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
 static int
 add_alternate_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
 {
-	struct drm_display_mode *mode, *tmp;
+	struct drm_display_mode *mode;
 	int i, num, modes = 0;
 
 	/* Don't add CEA modes if the CEA extension block is missing */
@@ -4389,7 +4414,7 @@ drm_display_mode *drm_displayid_detailed(struct displayid_detailed_timings_1
 		vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 
 	if (timings->flags & 0x80)
-	mode->vrefresh = drm_mode_vrefresh(mode);
+	mode->vrefresh = drm_get_vrefresh(mode);
 
 	return mode;
 }
@@ -4487,7 +4512,7 @@ mode_in_vsync_range(const struct drm_display_mode *mode,
 	vmax = t[6];
 	if (edid->revision >= 4)
 		vmax += ((t[4] & 0x02) ? 255 : 0);
-	vsync = drm_mode_vrefresh(mode);
+	vsync = drm_get_vrefresh(mode);
 
 	return (vsync <= vmax && vsync >= vmin);
 }
@@ -4548,7 +4573,7 @@ static bool valid_inferred_mode(struct hdmi_edid_data *data,
 		m = &data->mode_buf[i];
 		if (mode->hdisplay == m->hdisplay &&
 		    mode->vdisplay == m->vdisplay &&
-		    drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
+		    drm_get_vrefresh(mode) == drm_get_vrefresh(m))
 			return false; /* duplicated */
 		if (mode->hdisplay <= m->hdisplay &&
 		    mode->vdisplay <= m->vdisplay)
@@ -4712,7 +4737,7 @@ add_inferred_modes(struct hdmi_edid_data *data, struct edid *edid)
 static void edid_fixup_preferred(struct hdmi_edid_data *data,
 				 u32 quirks)
 {
-	struct drm_display_mode *t, *cur_mode, *preferred_mode;
+	struct drm_display_mode *cur_mode, *preferred_mode;
 	int i, target_refresh = 0;
 	int num = data->modes;
 	int cur_vrefresh, preferred_vrefresh;
@@ -4738,9 +4763,9 @@ static void edid_fixup_preferred(struct hdmi_edid_data *data,
 			preferred_mode = cur_mode;
 
 		cur_vrefresh = cur_mode->vrefresh ?
-		cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
+		cur_mode->vrefresh : drm_get_vrefresh(cur_mode);
 		preferred_vrefresh = preferred_mode->vrefresh ?
-		preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
+		preferred_mode->vrefresh : drm_get_vrefresh(preferred_mode);
 		/* At a given size, try to get closest to target refresh */
 		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
 		    MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <

commit 8f7c31646f1f4c9f772dafe69c73d3e362f0a759
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Thu Nov 16 14:18:14 2017 +0800

    drm/rockchip: Using get device function to get display device.
    
    If the uclass_find_device_by_of_offset display device probe function won't be
    called. Display device's pinctrl will not take effect. SO we use
    uclass_get_device_by_of_offset to get display device.
    
    Change-Id: I1329eb5b5ffca7609dfc52bcc5623476f99bc8b0
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 5a746d579f..c5ef626907 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -918,7 +918,7 @@ static int rockchip_display_probe(struct udevice *dev)
 			       fdt_get_name(blob, child, NULL));
 			continue;
 		}
-		ret = uclass_find_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
+		ret = uclass_get_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
 		if (ret) {
 			printf("Warn: %s: can't find connector driver\n",
 			       fdt_get_name(blob, child, NULL));

commit f5e7d251111abcb792372f8aa5f10b29ae81f10b
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Oct 30 15:09:22 2017 +0800

    drm/rockchip: Support drm dw-hdmi
    
    Add drm hdmi refer to kernel. Support Synopsys PHY HDMI,
    RK3399 has been tested.
    
    Change-Id: Iaae35ff15333cd1082149e016157c66ec3a6f3a6
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 3f262e6e8a..08aebd99d1 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -15,6 +15,14 @@ config DRM_ROCKCHIP_PANEL
 config DRM_ROCKCHIP_DSI_PANEL
 	bool
 
+config DRM_ROCKCHIP_DW_HDMI
+	bool "Rockchip specific extensions for Synopsys DW HDMI"
+	depends on DRM_ROCKCHIP
+	help
+	 This selects support for Rockchip SoC specific extensions
+	 for the Synopsys DesignWare HDMI driver. If you want to
+	 enable HDMI on, you should selet this option.
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
old mode 100755
new mode 100644
index 8ecbad06d8..352b2be2a1
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -11,6 +11,8 @@ obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
 obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
 			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_HDMI) += rockchip_dw_hdmi.o dw_hdmi.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
 obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
diff --git a/drivers/video/drm/dw_hdmi.c b/drivers/video/drm/dw_hdmi.c
new file mode 100644
index 0000000000..746afcd0f6
--- /dev/null
+++ b/drivers/video/drm/dw_hdmi.c
@@ -0,0 +1,2246 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <malloc.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <edid.h>
+#include <linux/hdmi.h>
+#include <linux/media-bus-format.h>
+#include <linux/dw_hdmi.h>
+#include <asm/io.h>
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "dw_hdmi.h"
+
+/*
+ * Unless otherwise noted, entries in this table are 100% optimization.
+ * Values can be obtained from hdmi_compute_n() but that function is
+ * slow so we pre-compute values we expect to see.
+ *
+ * All 32k and 48k values are expected to be the same (due to the way
+ * the math works) for any rate that's an exact kHz.
+ */
+static const struct dw_hdmi_audio_tmds_n common_tmds_n_table[] = {
+	{ .tmds = 25175000, .n_32k = 4096, .n_44k1 = 12854, .n_48k = 6144, },
+	{ .tmds = 25200000, .n_32k = 4096, .n_44k1 = 5656, .n_48k = 6144, },
+	{ .tmds = 27000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 28320000, .n_32k = 4096, .n_44k1 = 5586, .n_48k = 6144, },
+	{ .tmds = 30240000, .n_32k = 4096, .n_44k1 = 5642, .n_48k = 6144, },
+	{ .tmds = 31500000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
+	{ .tmds = 32000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
+	{ .tmds = 33750000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
+	{ .tmds = 36000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+	{ .tmds = 40000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
+	{ .tmds = 49500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 50000000, .n_32k = 4096, .n_44k1 = 5292, .n_48k = 6144, },
+	{ .tmds = 54000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+	{ .tmds = 65000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 68250000, .n_32k = 4096, .n_44k1 = 5376, .n_48k = 6144, },
+	{ .tmds = 71000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 72000000, .n_32k = 4096, .n_44k1 = 5635, .n_48k = 6144, },
+	{ .tmds = 73250000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, },
+	{ .tmds = 74250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
+	{ .tmds = 75000000, .n_32k = 4096, .n_44k1 = 5880, .n_48k = 6144, },
+	{ .tmds = 78750000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
+	{ .tmds = 78800000, .n_32k = 4096, .n_44k1 = 5292, .n_48k = 6144, },
+	{ .tmds = 79500000, .n_32k = 4096, .n_44k1 = 4704, .n_48k = 6144, },
+	{ .tmds = 83500000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 85500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 88750000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, },
+	{ .tmds = 97750000, .n_32k = 4096, .n_44k1 = 14112, .n_48k = 6144, },
+	{ .tmds = 101000000, .n_32k = 4096, .n_44k1 = 7056, .n_48k = 6144, },
+	{ .tmds = 106500000, .n_32k = 4096, .n_44k1 = 4704, .n_48k = 6144, },
+	{ .tmds = 108000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+	{ .tmds = 115500000, .n_32k = 4096, .n_44k1 = 5712, .n_48k = 6144, },
+	{ .tmds = 119000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, },
+	{ .tmds = 135000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 146250000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
+	{ .tmds = 148500000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
+	{ .tmds = 154000000, .n_32k = 4096, .n_44k1 = 5544, .n_48k = 6144, },
+	{ .tmds = 162000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
+
+	/* For 297 MHz+ HDMI spec have some other rule for setting N */
+	{ .tmds = 297000000, .n_32k = 3073, .n_44k1 = 4704, .n_48k = 5120, },
+	{ .tmds = 594000000, .n_32k = 3073, .n_44k1 = 9408, .n_48k = 10240, },
+
+	/* End of table */
+	{ .tmds = 0,         .n_32k = 0,    .n_44k1 = 0,    .n_48k = 0, },
+};
+
+static const u16 csc_coeff_default[3][4] = {
+	{ 0x2000, 0x0000, 0x0000, 0x0000 },
+	{ 0x0000, 0x2000, 0x0000, 0x0000 },
+	{ 0x0000, 0x0000, 0x2000, 0x0000 }
+};
+
+static const u16 csc_coeff_rgb_out_eitu601[3][4] = {
+	{ 0x2000, 0x6926, 0x74fd, 0x010e },
+	{ 0x2000, 0x2cdd, 0x0000, 0x7e9a },
+	{ 0x2000, 0x0000, 0x38b4, 0x7e3b }
+};
+
+static const u16 csc_coeff_rgb_out_eitu709[3][4] = {
+	{ 0x2000, 0x7106, 0x7a02, 0x00a7 },
+	{ 0x2000, 0x3264, 0x0000, 0x7e6d },
+	{ 0x2000, 0x0000, 0x3b61, 0x7e25 }
+};
+
+static const u16 csc_coeff_rgb_in_eitu601[3][4] = {
+	{ 0x2591, 0x1322, 0x074b, 0x0000 },
+	{ 0x6535, 0x2000, 0x7acc, 0x0200 },
+	{ 0x6acd, 0x7534, 0x2000, 0x0200 }
+};
+
+static const u16 csc_coeff_rgb_in_eitu709[3][4] = {
+	{ 0x2dc5, 0x0d9b, 0x049e, 0x0000 },
+	{ 0x62f0, 0x2000, 0x7d11, 0x0200 },
+	{ 0x6756, 0x78ab, 0x2000, 0x0200 }
+};
+
+struct hdmi_vmode {
+	bool mdataenablepolarity;
+
+	unsigned int mpixelclock;
+	unsigned int mpixelrepetitioninput;
+	unsigned int mpixelrepetitionoutput;
+};
+
+struct hdmi_data_info {
+	unsigned int enc_in_bus_format;
+	unsigned int enc_out_bus_format;
+	unsigned int enc_in_encoding;
+	unsigned int enc_out_encoding;
+	unsigned int pix_repet_factor;
+	struct hdmi_vmode video_mode;
+};
+
+struct dw_hdmi_phy_data {
+	enum dw_hdmi_phy_type type;
+	const char *name;
+	unsigned int gen;
+	bool has_svsret;
+	int (*configure)(struct dw_hdmi *hdmi,
+			 const struct dw_hdmi_plat_data *pdata,
+			 unsigned long mpixelclock);
+};
+
+struct dw_hdmi {
+	enum dw_hdmi_devtype dev_type;
+	unsigned int version;
+	struct hdmi_data_info hdmi_data;
+	struct hdmi_edid_data edid_data;
+	const struct dw_hdmi_plat_data *plat_data;
+
+	int vic;
+	int io_width;
+
+	unsigned long bus_format;
+	bool cable_plugin;
+	bool sink_is_hdmi;
+	bool sink_has_audio;
+	void *regs;
+	void *grf;
+
+	struct {
+		const struct dw_hdmi_phy_ops *ops;
+		const char *name;
+		void *data;
+		bool enabled;
+	} phy;
+
+	struct drm_display_mode previous_mode;
+
+	unsigned int sample_rate;
+	unsigned int audio_cts;
+	unsigned int audio_n;
+	bool audio_enable;
+
+	void (*write)(struct dw_hdmi *hdmi, u8 val, int offset);
+	u8 (*read)(struct dw_hdmi *hdmi, int offset);
+};
+
+static void dw_hdmi_writel(struct dw_hdmi *hdmi, u8 val, int offset)
+{
+	writel(val, hdmi->regs + (offset << 2));
+}
+
+static u8 dw_hdmi_readl(struct dw_hdmi *hdmi, int offset)
+{
+	return readl(hdmi->regs + (offset << 2));
+}
+
+static void dw_hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
+{
+	writeb(val, hdmi->regs + offset);
+}
+
+static u8 dw_hdmi_readb(struct dw_hdmi *hdmi, int offset)
+{
+	return readb(hdmi->regs + offset);
+}
+
+static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset)
+{
+	hdmi->write(hdmi, val, offset);
+}
+
+static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset)
+{
+	return hdmi->read(hdmi, offset);
+}
+
+static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg)
+{
+	u8 val = hdmi_readb(hdmi, reg) & ~mask;
+
+	val |= data & mask;
+	hdmi_writeb(hdmi, val, reg);
+}
+
+static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg,
+			     u8 shift, u8 mask)
+{
+	hdmi_modb(hdmi, data << shift, mask, reg);
+}
+
+static bool hdmi_bus_fmt_is_rgb(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv444(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv422(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static bool hdmi_bus_fmt_is_yuv420(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+static int hdmi_bus_fmt_color_depth(unsigned int bus_format)
+{
+	switch (bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		return 8;
+
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		return 10;
+
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+		return 12;
+
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+	case MEDIA_BUS_FMT_YUV16_1X48:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		return 16;
+
+	default:
+		return 0;
+	}
+}
+
+static int is_color_space_conversion(struct dw_hdmi *hdmi)
+{
+	return hdmi->hdmi_data.enc_in_bus_format !=
+	hdmi->hdmi_data.enc_out_bus_format;
+}
+
+static int is_color_space_decimation(struct dw_hdmi *hdmi)
+{
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		return 0;
+
+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_in_bus_format) ||
+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_in_bus_format))
+		return 1;
+
+	return 0;
+}
+
+static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi,
+				       unsigned char bit)
+{
+	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET,
+		  HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0);
+}
+
+static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi,
+					unsigned char bit)
+{
+	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET,
+		  HDMI_PHY_TST0_TSTEN_MASK, HDMI_PHY_TST0);
+}
+
+static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi,
+				       unsigned char bit)
+{
+	hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET,
+		  HDMI_PHY_TST0_TSTCLK_MASK, HDMI_PHY_TST0);
+}
+
+static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi,
+				     unsigned char bit)
+{
+	hdmi_writeb(hdmi, bit, HDMI_PHY_TST1);
+}
+
+static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi,
+				      unsigned char bit)
+{
+	hdmi_writeb(hdmi, bit, HDMI_PHY_TST2);
+}
+
+static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec)
+{
+	u32 val;
+
+	while ((val = hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) {
+		if (msec-- == 0)
+			return false;
+		udelay(1000);
+	}
+	hdmi_writeb(hdmi, val, HDMI_IH_I2CMPHY_STAT0);
+
+	return true;
+}
+
+static void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data,
+				  unsigned char addr)
+{
+	hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0);
+	hdmi_writeb(hdmi, addr, HDMI_PHY_I2CM_ADDRESS_ADDR);
+	hdmi_writeb(hdmi, (unsigned char)(data >> 8),
+		    HDMI_PHY_I2CM_DATAO_1_ADDR);
+	hdmi_writeb(hdmi, (unsigned char)(data >> 0),
+		    HDMI_PHY_I2CM_DATAO_0_ADDR);
+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_OPERATION_ADDR_WRITE,
+		    HDMI_PHY_I2CM_OPERATION_ADDR);
+	hdmi_phy_wait_i2c_done(hdmi, 1000);
+}
+
+static void dw_hdmi_phy_enable_powerdown(struct dw_hdmi *hdmi, bool enable)
+{
+	hdmi_mask_writeb(hdmi, !enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_PDZ_OFFSET,
+			 HDMI_PHY_CONF0_PDZ_MASK);
+}
+
+static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_ENTMDS_OFFSET,
+			 HDMI_PHY_CONF0_ENTMDS_MASK);
+}
+
+static void dw_hdmi_phy_enable_svsret(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_SVSRET_OFFSET,
+			 HDMI_PHY_CONF0_SVSRET_MASK);
+}
+
+static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET,
+			 HDMI_PHY_CONF0_GEN2_PDDQ_MASK);
+}
+
+static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET,
+			 HDMI_PHY_CONF0_GEN2_TXPWRON_MASK);
+}
+
+static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_SELDATAENPOL_OFFSET,
+			 HDMI_PHY_CONF0_SELDATAENPOL_MASK);
+}
+
+static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
+{
+	hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0,
+			 HDMI_PHY_CONF0_SELDIPIF_OFFSET,
+			 HDMI_PHY_CONF0_SELDIPIF_MASK);
+}
+
+static void dw_hdmi_phy_power_off(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
+	unsigned int i;
+	u16 val;
+
+	if (phy->gen == 1) {
+		dw_hdmi_phy_enable_tmds(hdmi, 0);
+		dw_hdmi_phy_enable_powerdown(hdmi, true);
+		return;
+	}
+
+	dw_hdmi_phy_gen2_txpwron(hdmi, 0);
+
+	/*
+	 * Wait for TX_PHY_LOCK to be deasserted to indicate that the PHY went
+	 * to low power mode.
+	 */
+	for (i = 0; i < 5; ++i) {
+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0);
+		if (!(val & HDMI_PHY_TX_PHY_LOCK))
+			break;
+
+		udelay(2000);
+	}
+
+	if (val & HDMI_PHY_TX_PHY_LOCK)
+		printf("PHY failed to power down\n");
+	else
+		printf("PHY powered down in %u iterations\n", i);
+
+	dw_hdmi_phy_gen2_pddq(hdmi, 1);
+}
+
+static int dw_hdmi_phy_power_on(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
+	unsigned int i;
+	u8 val;
+
+	if (phy->gen == 1) {
+		dw_hdmi_phy_enable_powerdown(hdmi, false);
+
+		/* Toggle TMDS enable. */
+		dw_hdmi_phy_enable_tmds(hdmi, 0);
+		dw_hdmi_phy_enable_tmds(hdmi, 1);
+		return 0;
+	}
+
+	dw_hdmi_phy_gen2_txpwron(hdmi, 1);
+	dw_hdmi_phy_gen2_pddq(hdmi, 0);
+
+	/* Wait for PHY PLL lock */
+	for (i = 0; i < 5; ++i) {
+		val = hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_TX_PHY_LOCK;
+		if (val)
+			break;
+
+		udelay(2000);
+	}
+
+	if (!val) {
+		printf("PHY PLL failed to lock\n");
+		return -ETIMEDOUT;
+	}
+
+	printf("PHY PLL locked %u iterations\n", i);
+	return 0;
+}
+
+/*
+ * PHY configuration function for the DWC HDMI 3D TX PHY. Based on the available
+ * information the DWC MHL PHY has the same register layout and is thus also
+ * supported by this function.
+ */
+static
+int hdmi_phy_configure_dwc_hdmi_3d_tx(struct dw_hdmi *hdmi,
+				      const struct dw_hdmi_plat_data *pdata,
+				      unsigned long mpixelclock)
+{
+	const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
+	const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
+	const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
+
+	/* PLL/MPLL Cfg - always match on final entry */
+	for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
+		if (mpixelclock <= mpll_config->mpixelclock)
+			break;
+
+	for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++)
+		if (mpixelclock <= curr_ctrl->mpixelclock)
+			break;
+
+	for (; phy_config->mpixelclock != ~0UL; phy_config++)
+		if (mpixelclock <= phy_config->mpixelclock)
+			break;
+
+	if (mpll_config->mpixelclock == ~0UL ||
+	    curr_ctrl->mpixelclock == ~0UL ||
+	    phy_config->mpixelclock == ~0UL)
+		return -EINVAL;
+
+	/*
+	 * RK3399 mpll clock source is vpll, also is vop clock source.
+	 * vpll rate is twice of mpixelclock in YCBCR420 mode, we need
+	 * to enable mpll pre-divider.
+	 */
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) &&
+	    (hdmi->dev_type == RK3399_HDMI || hdmi->dev_type == RK3368_HDMI))
+		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce | 4,
+				      HDMI_3D_TX_PHY_CPCE_CTRL);
+	else
+		dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce,
+				      HDMI_3D_TX_PHY_CPCE_CTRL);
+	dw_hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp,
+			      HDMI_3D_TX_PHY_GMPCTRL);
+	dw_hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0],
+			      HDMI_3D_TX_PHY_CURRCTRL);
+
+	dw_hdmi_phy_i2c_write(hdmi, 0, HDMI_3D_TX_PHY_PLLPHBYCTRL);
+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK,
+			      HDMI_3D_TX_PHY_MSM_CTRL);
+
+	dw_hdmi_phy_i2c_write(hdmi, 0x0004, HDMI_3D_TX_PHY_TXTERM);
+	dw_hdmi_phy_i2c_write(hdmi, 0x8009,
+			      HDMI_3D_TX_PHY_CKSYMTXCTRL);
+	dw_hdmi_phy_i2c_write(hdmi, 0x0272,
+			      HDMI_3D_TX_PHY_VLEVCTRL);
+
+	/* Override and disable clock termination. */
+	dw_hdmi_phy_i2c_write(hdmi, HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE,
+			      HDMI_3D_TX_PHY_CKCALCTRL);
+	return 0;
+}
+
+static const struct dw_hdmi_phy_data dw_hdmi_phys[] = {
+	{
+		.type = DW_HDMI_PHY_DWC_HDMI_TX_PHY,
+		.name = "DWC HDMI TX PHY",
+		.gen = 1,
+	}, {
+		.type = DW_HDMI_PHY_DWC_MHL_PHY_HEAC,
+		.name = "DWC MHL PHY + HEAC PHY",
+		.gen = 2,
+		.has_svsret = true,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_MHL_PHY,
+		.name = "DWC MHL PHY",
+		.gen = 2,
+		.has_svsret = true,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC,
+		.name = "DWC HDMI 3D TX PHY + HEAC PHY",
+		.gen = 2,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY,
+		.name = "DWC HDMI 3D TX PHY",
+		.gen = 2,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
+		.name = "DWC HDMI 2.0 TX PHY",
+		.gen = 2,
+		.has_svsret = true,
+		.configure = hdmi_phy_configure_dwc_hdmi_3d_tx,
+	}, {
+		.type = DW_HDMI_PHY_VENDOR_PHY,
+		.name = "Vendor PHY",
+	}
+};
+
+/* ddc i2c master reset */
+static void rockchip_dw_hdmi_i2cm_reset(struct dw_hdmi *hdmi)
+{
+	hdmi_writeb(hdmi, 0x00, HDMI_I2CM_SOFTRSTZ);
+	udelay(100);
+}
+
+static void rockchip_dw_hdmi_i2cm_mask_int(struct dw_hdmi *hdmi, int mask)
+{
+	if (!mask) {
+		hdmi_writeb(hdmi, HDMI_I2CM_INT_DONE_POL, HDMI_I2CM_INT);
+		hdmi_writeb(hdmi, HDMI_I2CM_CTLINT_NAC_POL |
+			    HDMI_I2CM_CTLINT_ARB_POL, HDMI_I2CM_CTLINT);
+		hdmi_writeb(hdmi, 0x00, HDMI_IH_MUTE_I2CM_STAT0);
+	} else {
+		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_INT);
+		hdmi_writeb(hdmi, 0xff, HDMI_I2CM_CTLINT);
+	}
+}
+
+static u16 i2c_count(u16 sfrclock, u16 sclmintime)
+{
+	unsigned long tmp_scl_period = 0;
+
+	if (((sfrclock * sclmintime) % I2C_DIV_FACTOR) != 0)
+		tmp_scl_period = (unsigned long)((sfrclock * sclmintime) +
+				(I2C_DIV_FACTOR - ((sfrclock * sclmintime) %
+				I2C_DIV_FACTOR))) / I2C_DIV_FACTOR;
+	else
+		tmp_scl_period = (unsigned long)(sfrclock * sclmintime) /
+				I2C_DIV_FACTOR;
+
+	return (u16)(tmp_scl_period);
+}
+
+static void rockchip_dw_hdmi_i2cm_clk_init(struct dw_hdmi *hdmi)
+{
+	int value;
+
+	/* Set DDC I2C CLK which divided from DDC_CLK. */
+	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_HIGH_TIME);
+	hdmi_writeb(hdmi, value & 0xff,
+		    HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
+	hdmi_writeb(hdmi, (value >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_HCNT_1_ADDR);
+	value = i2c_count(24000, EDID_I2C_MIN_SS_SCL_LOW_TIME);
+	hdmi_writeb(hdmi, value & 0xff,
+		    HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
+	hdmi_writeb(hdmi, (value >> 8) & 0xff,
+		    HDMI_I2CM_SS_SCL_LCNT_1_ADDR);
+	hdmi_modb(hdmi, HDMI_I2CM_DIV_STD_MODE,
+		  HDMI_I2CM_DIV_FAST_STD_MODE, HDMI_I2CM_DIV);
+}
+
+/*set read/write offset,set read/write mode*/
+static void rockchip_dw_hdmi_i2cm_write_request(struct dw_hdmi *hdmi,
+						u8 offset, u8 data)
+{
+	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
+	hdmi_writeb(hdmi, data, HDMI_I2CM_DATAO);
+	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_WRITE, HDMI_I2CM_OPERATION_READ);
+}
+
+static void rockchip_dw_hdmi_i2cm_read_request(struct dw_hdmi *hdmi,
+					       u8 offset)
+{
+	hdmi_writeb(hdmi, offset, HDMI_I2CM_ADDRESS);
+	hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ, HDMI_I2CM_OPERATION);
+}
+
+static void rockchip_dw_hdmi_i2cm_write_data(struct dw_hdmi *hdmi,
+					     u8 data, u8 offset)
+{
+	u8 interrupt = 0;
+	int trytime = 2;
+	int i = 20;
+
+	while (trytime-- > 0) {
+		rockchip_dw_hdmi_i2cm_write_request(hdmi, offset, data);
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi,
+					    interrupt, HDMI_IH_I2CM_STAT0);
+
+			if (interrupt & (m_SCDC_READREQ |
+					 m_I2CM_DONE | m_I2CM_ERROR))
+				break;
+		}
+
+		if (interrupt & m_I2CM_DONE) {
+			printf("[%s] write offset %02x data %02x success\n",
+			       __func__, offset, data);
+			trytime = 0;
+		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+			printf("[%s] write data error\n", __func__);
+			rockchip_dw_hdmi_i2cm_reset(hdmi);
+		}
+	}
+}
+
+static int rockchip_dw_hdmi_i2cm_read_data(struct dw_hdmi *hdmi, u8 offset)
+{
+	u8 interrupt = 0, val = 0;
+	int trytime = 2;
+	int i = 20;
+
+	while (trytime-- > 0) {
+		rockchip_dw_hdmi_i2cm_read_request(hdmi, offset);
+		while (i--) {
+			udelay(1000);
+			interrupt = hdmi_readb(hdmi, HDMI_IH_I2CM_STAT0);
+			if (interrupt)
+				hdmi_writeb(hdmi, HDMI_IH_I2CM_STAT0,
+					    interrupt);
+
+			if (interrupt & (m_SCDC_READREQ |
+				m_I2CM_DONE | m_I2CM_ERROR))
+				break;
+		}
+
+		if (interrupt & m_I2CM_DONE) {
+			val = hdmi_readb(hdmi, HDMI_I2CM_DATAI);
+			trytime = 0;
+		} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+			printf("[%s] read data error\n", __func__);
+			rockchip_dw_hdmi_i2cm_reset(hdmi);
+		}
+	}
+	return val;
+}
+
+static int rockchip_dw_hdmi_scdc_get_sink_version(struct dw_hdmi *hdmi)
+{
+	return rockchip_dw_hdmi_i2cm_read_data(hdmi, SCDC_SINK_VERSION);
+}
+
+static void rockchip_dw_hdmi_scdc_set_source_version(struct dw_hdmi *hdmi,
+						     u8 version)
+{
+	rockchip_dw_hdmi_i2cm_write_data(hdmi, version, SCDC_SOURCE_VERSION);
+}
+
+static void rockchip_dw_hdmi_scdc_init(struct dw_hdmi *hdmi)
+{
+	rockchip_dw_hdmi_i2cm_reset(hdmi);
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
+	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
+	/* set scdc i2c addr */
+	hdmi_writeb(hdmi, DDC_I2C_SCDC_ADDR, HDMI_I2CM_SLAVE);
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);/*enable interrupt*/
+}
+
+static int rockchip_dw_hdmi_scrambling_enable(struct dw_hdmi *hdmi,
+					      int enable)
+{
+	int stat;
+
+	rockchip_dw_hdmi_scdc_init(hdmi);
+	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
+					       SCDC_TMDS_CONFIG);
+	if (stat < 0) {
+		debug("Failed to read tmds config\n");
+		return false;
+	}
+
+	if (enable == 1) {
+		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
+		stat |= SCDC_SCRAMBLING_ENABLE;
+		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+		/* TMDS software reset request */
+		hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
+			    HDMI_MC_SWRSTZ);
+		/* Enable/Disable Scrambling */
+		hdmi_writeb(hdmi, 1, HDMI_FC_SCRAMBLER_CTRL);
+	} else {
+		/* Enable/Disable Scrambling */
+		hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
+		/* TMDS software reset request */
+		hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
+			    HDMI_MC_SWRSTZ);
+		/* Write on Rx the bit Scrambling_Enable, register 0x20 */
+		stat &= ~SCDC_SCRAMBLING_ENABLE;
+		rockchip_dw_hdmi_i2cm_write_data(hdmi, stat, SCDC_TMDS_CONFIG);
+	}
+
+	return 0;
+}
+
+static void rockchip_dw_hdmi_scdc_set_tmds_rate(struct dw_hdmi *hdmi)
+{
+	int stat;
+
+	rockchip_dw_hdmi_scdc_init(hdmi);
+	stat = rockchip_dw_hdmi_i2cm_read_data(hdmi,
+					       SCDC_TMDS_CONFIG);
+	if (hdmi->hdmi_data.video_mode.mpixelclock > 340000000)
+		stat |= SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
+	else
+		stat &= ~SCDC_TMDS_BIT_CLOCK_RATIO_BY_40;
+	rockchip_dw_hdmi_i2cm_write_data(hdmi, stat,
+					 SCDC_TMDS_CONFIG);
+}
+
+static int hdmi_phy_configure(struct dw_hdmi *hdmi)
+{
+	const struct dw_hdmi_phy_data *phy = hdmi->phy.data;
+	const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
+	unsigned long mpixelclock = hdmi->hdmi_data.video_mode.mpixelclock;
+	int ret, sink_version;
+
+	dw_hdmi_phy_power_off(hdmi);
+
+	/* Control for TMDS Bit Period/TMDS Clock-Period Ratio */
+	if (hdmi->edid_data.display_info.hdmi.scdc.supported)
+		rockchip_dw_hdmi_scdc_set_tmds_rate(hdmi);
+
+	/* Leave low power consumption mode by asserting SVSRET. */
+	if (phy->has_svsret)
+		dw_hdmi_phy_enable_svsret(hdmi, 1);
+
+	/* PHY reset. The reset signal is active high on Gen2 PHYs. */
+	hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_PHYRSTZ, HDMI_MC_PHYRSTZ);
+	hdmi_writeb(hdmi, 0, HDMI_MC_PHYRSTZ);
+
+	hdmi_writeb(hdmi, HDMI_MC_HEACPHY_RST_ASSERT, HDMI_MC_HEACPHY_RST);
+
+	hdmi_phy_test_clear(hdmi, 1);
+	hdmi_writeb(hdmi, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2,
+		    HDMI_PHY_I2CM_SLAVE_ADDR);
+	hdmi_phy_test_clear(hdmi, 0);
+
+	/* Write to the PHY as configured by the platform */
+	if (pdata->configure_phy)
+		ret = pdata->configure_phy(hdmi, pdata, mpixelclock);
+	else
+		ret = phy->configure(hdmi, pdata, mpixelclock);
+	if (ret) {
+		printf("PHY configuration failed (clock %lu)\n",
+		       mpixelclock);
+		return ret;
+	}
+
+	/* Wait for resuming transmission of TMDS clock and data */
+	if (mpixelclock > 340000000)
+		mdelay(100);
+
+	return dw_hdmi_phy_power_on(hdmi);
+}
+
+static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,
+			    struct drm_display_mode *mode)
+{
+	int i, ret;
+
+	/* HDMI Phy spec says to do the phy initialization sequence twice */
+	for (i = 0; i < 2; i++) {
+		dw_hdmi_phy_sel_data_en_pol(hdmi, 1);
+		dw_hdmi_phy_sel_interface_control(hdmi, 0);
+		ret = hdmi_phy_configure(hdmi);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi, void *data)
+{
+	dw_hdmi_phy_power_off(hdmi);
+}
+
+static enum drm_connector_status dw_hdmi_phy_read_hpd(struct dw_hdmi *hdmi,
+						      void *data)
+{
+	return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ?
+		connector_status_connected : connector_status_disconnected;
+}
+
+static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = {
+	.init = dw_hdmi_phy_init,
+	.disable = dw_hdmi_phy_disable,
+	.read_hpd = dw_hdmi_phy_read_hpd,
+};
+
+static int dw_hdmi_detect_phy(struct dw_hdmi *hdmi)
+{
+	unsigned int i;
+	u8 phy_type;
+
+	phy_type = hdmi_readb(hdmi, HDMI_CONFIG2_ID);
+
+	/*
+	 * RK3228 and RK3328 phy_type is DW_HDMI_PHY_DWC_HDMI20_TX_PHY,
+	 * but it has a vedor phy.
+	 */
+	if (phy_type == DW_HDMI_PHY_VENDOR_PHY ||
+	    hdmi->dev_type == RK3328_HDMI ||
+	    hdmi->dev_type == RK3228_HDMI) {
+		/* Vendor PHYs require support from the glue layer. */
+		if (!hdmi->plat_data->phy_ops || !hdmi->plat_data->phy_name) {
+			printf(
+				"Vendor HDMI PHY not supported by glue layer\n");
+			return -ENODEV;
+		}
+
+		hdmi->phy.ops = hdmi->plat_data->phy_ops;
+		hdmi->phy.data = hdmi->plat_data->phy_data;
+		hdmi->phy.name = hdmi->plat_data->phy_name;
+		return 0;
+	}
+
+	/* Synopsys PHYs are handled internally. */
+	for (i = 0; i < ARRAY_SIZE(dw_hdmi_phys); ++i) {
+		if (dw_hdmi_phys[i].type == phy_type) {
+			hdmi->phy.ops = &dw_hdmi_synopsys_phy_ops;
+			hdmi->phy.name = dw_hdmi_phys[i].name;
+			hdmi->phy.data = (void *)&dw_hdmi_phys[i];
+
+			if (!dw_hdmi_phys[i].configure &&
+			    !hdmi->plat_data->configure_phy) {
+				printf("%s requires platform support\n",
+				       hdmi->phy.name);
+				return -ENODEV;
+			}
+
+			return 0;
+		}
+	}
+
+	printf("Unsupported HDMI PHY type (%02x)\n", phy_type);
+	return -ENODEV;
+}
+
+static void hdmi_av_composer(struct dw_hdmi *hdmi,
+			     const struct drm_display_mode *mode)
+{
+	u8 inv_val = 0;
+	struct hdmi_vmode *vmode = &hdmi->hdmi_data.video_mode;
+	struct drm_hdmi_info *hdmi_info = &hdmi->edid_data.display_info.hdmi;
+	int bytes, hblank, vblank, h_de_hs, v_de_vs, hsync_len, vsync_len;
+	unsigned int hdisplay, vdisplay;
+
+	vmode->mpixelclock = mode->clock * 1000;
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		vmode->mpixelclock /= 2;
+	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
+		DRM_MODE_FLAG_3D_FRAME_PACKING)
+		vmode->mpixelclock *= 2;
+	printf("final pixclk = %d\n", vmode->mpixelclock);
+
+	/* Set up HDMI_FC_INVIDCONF
+	 * fc_invidconf.HDCP_keepout must be set (1'b1)
+	 * when activate the scrambler feature.
+	 */
+	inv_val = (vmode->mpixelclock > 340000000 ||
+		   hdmi_info->scdc.scrambling.low_rates ?
+		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE :
+		   HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE);
+
+	inv_val |= mode->flags & DRM_MODE_FLAG_PVSYNC ?
+		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH :
+		HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW;
+
+	inv_val |= mode->flags & DRM_MODE_FLAG_PHSYNC ?
+		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH :
+		HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW;
+
+	inv_val |= (vmode->mdataenablepolarity ?
+		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH :
+		HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW);
+
+	if (hdmi->vic == 39)
+		inv_val |= HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH;
+	else
+		inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
+			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH :
+			HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW;
+
+	inv_val |= mode->flags & DRM_MODE_FLAG_INTERLACE ?
+		HDMI_FC_INVIDCONF_IN_I_P_INTERLACED :
+		HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE;
+
+	inv_val |= hdmi->sink_is_hdmi ?
+		HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE :
+		HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE;
+
+	hdmi_writeb(hdmi, inv_val, HDMI_FC_INVIDCONF);
+
+	hdisplay = mode->hdisplay;
+	hblank = mode->htotal - mode->hdisplay;
+	h_de_hs = mode->hsync_start - mode->hdisplay;
+	hsync_len = mode->hsync_end - mode->hsync_start;
+
+	/*
+	 * When we're setting a YCbCr420 mode, we need
+	 * to adjust the horizontal timing to suit.
+	 */
+	/*
+	 * When we're setting a YCbCr420 mode, we need
+	 * to adjust the horizontal timing to suit.
+	 */
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
+		hdisplay /= 2;
+		hblank /= 2;
+		h_de_hs /= 2;
+		hsync_len /= 2;
+	}
+
+	vdisplay = mode->vdisplay;
+	vblank = mode->vtotal - mode->vdisplay;
+	v_de_vs = mode->vsync_start - mode->vdisplay;
+	vsync_len = mode->vsync_end - mode->vsync_start;
+
+	/*
+	 * When we're setting an interlaced mode, we need
+	 * to adjust the vertical timing to suit.
+	 */
+	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		vdisplay /= 2;
+		vblank /= 2;
+		v_de_vs /= 2;
+		vsync_len /= 2;
+	} else if ((mode->flags & DRM_MODE_FLAG_3D_MASK) ==
+		DRM_MODE_FLAG_3D_FRAME_PACKING) {
+		vdisplay += mode->vtotal;
+	}
+
+	/* Scrambling Control */
+	if (hdmi_info->scdc.supported) {
+		if (vmode->mpixelclock > 340000000 ||
+		    hdmi_info->scdc.scrambling.low_rates) {
+			bytes = rockchip_dw_hdmi_scdc_get_sink_version(hdmi);
+			rockchip_dw_hdmi_scdc_set_source_version(hdmi, bytes);
+			rockchip_dw_hdmi_scrambling_enable(hdmi, 1);
+		} else {
+			rockchip_dw_hdmi_scrambling_enable(hdmi, 0);
+		}
+	}
+
+	/* Set up horizontal active pixel width */
+	hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1);
+	hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0);
+
+	/* Set up vertical active lines */
+	hdmi_writeb(hdmi, vdisplay >> 8, HDMI_FC_INVACTV1);
+	hdmi_writeb(hdmi, vdisplay, HDMI_FC_INVACTV0);
+
+	/* Set up horizontal blanking pixel region width */
+	hdmi_writeb(hdmi, hblank >> 8, HDMI_FC_INHBLANK1);
+	hdmi_writeb(hdmi, hblank, HDMI_FC_INHBLANK0);
+
+	/* Set up vertical blanking pixel region width */
+	hdmi_writeb(hdmi, vblank, HDMI_FC_INVBLANK);
+
+	/* Set up HSYNC active edge delay width (in pixel clks) */
+	hdmi_writeb(hdmi, h_de_hs >> 8, HDMI_FC_HSYNCINDELAY1);
+	hdmi_writeb(hdmi, h_de_hs, HDMI_FC_HSYNCINDELAY0);
+
+	/* Set up VSYNC active edge delay (in lines) */
+	hdmi_writeb(hdmi, v_de_vs, HDMI_FC_VSYNCINDELAY);
+
+	/* Set up HSYNC active pulse width (in pixel clks) */
+	hdmi_writeb(hdmi, hsync_len >> 8, HDMI_FC_HSYNCINWIDTH1);
+	hdmi_writeb(hdmi, hsync_len, HDMI_FC_HSYNCINWIDTH0);
+
+	/* Set up VSYNC active edge delay (in lines) */
+	hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH);
+}
+
+static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi)
+{
+	const u16 (*csc_coeff)[3][4] = &csc_coeff_default;
+	unsigned i;
+	u32 csc_scale = 1;
+
+	if (is_color_space_conversion(hdmi)) {
+		if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format)) {
+			if (hdmi->hdmi_data.enc_out_encoding ==
+						V4L2_YCBCR_ENC_601)
+				csc_coeff = &csc_coeff_rgb_out_eitu601;
+			else
+				csc_coeff = &csc_coeff_rgb_out_eitu709;
+		} else if (hdmi_bus_fmt_is_rgb(
+					hdmi->hdmi_data.enc_in_bus_format)) {
+			if (hdmi->hdmi_data.enc_out_encoding ==
+						V4L2_YCBCR_ENC_601)
+				csc_coeff = &csc_coeff_rgb_in_eitu601;
+			else
+				csc_coeff = &csc_coeff_rgb_in_eitu709;
+			csc_scale = 0;
+		}
+	}
+
+	/* The CSC registers are sequential, alternating MSB then LSB */
+	for (i = 0; i < ARRAY_SIZE(csc_coeff_default[0]); i++) {
+		u16 coeff_a = (*csc_coeff)[0][i];
+		u16 coeff_b = (*csc_coeff)[1][i];
+		u16 coeff_c = (*csc_coeff)[2][i];
+
+		hdmi_writeb(hdmi, coeff_a & 0xff, HDMI_CSC_COEF_A1_LSB + i * 2);
+		hdmi_writeb(hdmi, coeff_a >> 8, HDMI_CSC_COEF_A1_MSB + i * 2);
+		hdmi_writeb(hdmi, coeff_b & 0xff, HDMI_CSC_COEF_B1_LSB + i * 2);
+		hdmi_writeb(hdmi, coeff_b >> 8, HDMI_CSC_COEF_B1_MSB + i * 2);
+		hdmi_writeb(hdmi, coeff_c & 0xff, HDMI_CSC_COEF_C1_LSB + i * 2);
+		hdmi_writeb(hdmi, coeff_c >> 8, HDMI_CSC_COEF_C1_MSB + i * 2);
+	}
+
+	hdmi_modb(hdmi, csc_scale, HDMI_CSC_SCALE_CSCSCALE_MASK,
+		  HDMI_CSC_SCALE);
+}
+
+static int is_color_space_interpolation(struct dw_hdmi *hdmi)
+{
+	if (!hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_in_bus_format))
+		return 0;
+
+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
+		return 1;
+
+	return 0;
+}
+
+static void hdmi_video_csc(struct dw_hdmi *hdmi)
+{
+	int color_depth = 0;
+	int interpolation = HDMI_CSC_CFG_INTMODE_DISABLE;
+	int decimation = 0;
+
+	/* YCC422 interpolation to 444 mode */
+	if (is_color_space_interpolation(hdmi))
+		interpolation = HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1;
+	else if (is_color_space_decimation(hdmi))
+		decimation = HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3;
+
+	switch (hdmi_bus_fmt_color_depth(hdmi->hdmi_data.enc_out_bus_format)) {
+	case 8:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP;
+		break;
+	case 10:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP;
+		break;
+	case 12:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP;
+		break;
+	case 16:
+		color_depth = HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP;
+		break;
+
+	default:
+		return;
+	}
+
+	/* Configure the CSC registers */
+	hdmi_writeb(hdmi, interpolation | decimation, HDMI_CSC_CFG);
+	hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK,
+		  HDMI_CSC_SCALE);
+
+	dw_hdmi_update_csc_coeffs(hdmi);
+}
+
+static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi)
+{
+	u8 clkdis;
+
+	/* control period minimum duration */
+	hdmi_writeb(hdmi, 12, HDMI_FC_CTRLDUR);
+	hdmi_writeb(hdmi, 32, HDMI_FC_EXCTRLDUR);
+	hdmi_writeb(hdmi, 1, HDMI_FC_EXCTRLSPAC);
+
+	/* Set to fill TMDS data channels */
+	hdmi_writeb(hdmi, 0x0B, HDMI_FC_CH0PREAM);
+	hdmi_writeb(hdmi, 0x16, HDMI_FC_CH1PREAM);
+	hdmi_writeb(hdmi, 0x21, HDMI_FC_CH2PREAM);
+
+	/* Enable pixel clock and tmds data path */
+	clkdis = 0x7F;
+	clkdis &= ~HDMI_MC_CLKDIS_PIXELCLK_DISABLE;
+	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+
+	clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
+	hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+
+	/* Enable csc path */
+	if (is_color_space_conversion(hdmi)) {
+		clkdis &= ~HDMI_MC_CLKDIS_CSCCLK_DISABLE;
+		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+	}
+
+	/* Enable pixel repetition path */
+	if (hdmi->hdmi_data.video_mode.mpixelrepetitioninput) {
+		clkdis &= ~HDMI_MC_CLKDIS_PREPCLK_DISABLE;
+		hdmi_writeb(hdmi, clkdis, HDMI_MC_CLKDIS);
+	}
+
+	/* Enable color space conversion if needed */
+	if (is_color_space_conversion(hdmi))
+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH,
+			    HDMI_MC_FLOWCTRL);
+	else
+		hdmi_writeb(hdmi, HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS,
+			    HDMI_MC_FLOWCTRL);
+}
+
+static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi)
+{
+	unsigned int count;
+	unsigned int i;
+	u8 val;
+
+	/*
+	 * Under some circumstances the Frame Composer arithmetic unit can miss
+	 * an FC register write due to being busy processing the previous one.
+	 * The issue can be worked around by issuing a TMDS software reset and
+	 * then write one of the FC registers several times.
+	 *
+	 * The number of iterations matters and depends on the HDMI TX revision
+	 * (and possibly on the platform). So far only i.MX6Q (v1.30a) and
+	 * i.MX6DL (v1.31a) have been identified as needing the workaround, with
+	 * 4 and 1 iterations respectively.
+	 */
+
+	switch (hdmi->version) {
+	case 0x130a:
+		count = 4;
+		break;
+	case 0x131a:
+		count = 1;
+		break;
+	default:
+		return;
+	}
+
+	/* TMDS software reset */
+	hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ);
+
+	val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF);
+	for (i = 0; i < count; i++)
+		hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF);
+}
+
+static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi)
+{
+	hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK,
+		    HDMI_IH_MUTE_FC_STAT2);
+}
+
+static void hdmi_video_packetize(struct dw_hdmi *hdmi)
+{
+	unsigned int color_depth = 0;
+	unsigned int remap_size = HDMI_VP_REMAP_YCC422_16bit;
+	unsigned int output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_PP;
+	struct hdmi_data_info *hdmi_data = &hdmi->hdmi_data;
+	u8 val, vp_conf;
+
+	if (hdmi_bus_fmt_is_rgb(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (hdmi_bus_fmt_color_depth(
+					hdmi->hdmi_data.enc_out_bus_format)) {
+		case 8:
+			color_depth = 0;
+			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
+			break;
+		case 10:
+			color_depth = 5;
+			break;
+		case 12:
+			color_depth = 6;
+			break;
+		case 16:
+			color_depth = 7;
+			break;
+		default:
+			output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS;
+		}
+	} else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format)) {
+		switch (hdmi_bus_fmt_color_depth(
+					hdmi->hdmi_data.enc_out_bus_format)) {
+		case 0:
+		case 8:
+			remap_size = HDMI_VP_REMAP_YCC422_16bit;
+			break;
+		case 10:
+			remap_size = HDMI_VP_REMAP_YCC422_20bit;
+			break;
+		case 12:
+			remap_size = HDMI_VP_REMAP_YCC422_24bit;
+			break;
+
+		default:
+			return;
+		}
+		output_select = HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422;
+	} else {
+		return;
+	}
+
+	/* set the packetizer registers */
+	val = ((color_depth << HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET) &
+		HDMI_VP_PR_CD_COLOR_DEPTH_MASK) |
+		((hdmi_data->pix_repet_factor <<
+		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET) &
+		HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK);
+	hdmi_writeb(hdmi, val, HDMI_VP_PR_CD);
+
+	hdmi_modb(hdmi, HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE,
+		  HDMI_VP_STUFF_PR_STUFFING_MASK, HDMI_VP_STUFF);
+
+	/* Data from pixel repeater block */
+	if (hdmi_data->pix_repet_factor > 0) {
+		vp_conf = HDMI_VP_CONF_PR_EN_ENABLE |
+			  HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER;
+	} else { /* data from packetizer block */
+		vp_conf = HDMI_VP_CONF_PR_EN_DISABLE |
+			  HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER;
+	}
+
+	hdmi_modb(hdmi, vp_conf,
+		  HDMI_VP_CONF_PR_EN_MASK |
+		  HDMI_VP_CONF_BYPASS_SELECT_MASK, HDMI_VP_CONF);
+
+	hdmi_modb(hdmi, 1 << HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET,
+		  HDMI_VP_STUFF_IDEFAULT_PHASE_MASK, HDMI_VP_STUFF);
+
+	hdmi_writeb(hdmi, remap_size, HDMI_VP_REMAP);
+
+	if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_PP) {
+		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
+			  HDMI_VP_CONF_PP_EN_ENABLE |
+			  HDMI_VP_CONF_YCC422_EN_DISABLE;
+	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422) {
+		vp_conf = HDMI_VP_CONF_BYPASS_EN_DISABLE |
+			  HDMI_VP_CONF_PP_EN_DISABLE |
+			  HDMI_VP_CONF_YCC422_EN_ENABLE;
+	} else if (output_select == HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS) {
+		vp_conf = HDMI_VP_CONF_BYPASS_EN_ENABLE |
+			  HDMI_VP_CONF_PP_EN_DISABLE |
+			  HDMI_VP_CONF_YCC422_EN_DISABLE;
+	} else {
+		return;
+	}
+
+	hdmi_modb(hdmi, vp_conf,
+		  HDMI_VP_CONF_BYPASS_EN_MASK | HDMI_VP_CONF_PP_EN_ENMASK |
+		  HDMI_VP_CONF_YCC422_EN_MASK, HDMI_VP_CONF);
+
+	hdmi_modb(hdmi, HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE |
+			HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE,
+		  HDMI_VP_STUFF_PP_STUFFING_MASK |
+		  HDMI_VP_STUFF_YCC422_STUFFING_MASK, HDMI_VP_STUFF);
+
+	hdmi_modb(hdmi, output_select, HDMI_VP_CONF_OUTPUT_SELECTOR_MASK,
+		  HDMI_VP_CONF);
+}
+
+static void hdmi_video_sample(struct dw_hdmi *hdmi)
+{
+	int color_format = 0;
+	u8 val;
+
+	switch (hdmi->hdmi_data.enc_in_bus_format) {
+	case MEDIA_BUS_FMT_RGB888_1X24:
+		color_format = 0x01;
+		break;
+	case MEDIA_BUS_FMT_RGB101010_1X30:
+		color_format = 0x03;
+		break;
+	case MEDIA_BUS_FMT_RGB121212_1X36:
+		color_format = 0x05;
+		break;
+	case MEDIA_BUS_FMT_RGB161616_1X48:
+		color_format = 0x07;
+		break;
+
+	case MEDIA_BUS_FMT_YUV8_1X24:
+	case MEDIA_BUS_FMT_UYYVYY8_0_5X24:
+		color_format = 0x09;
+		break;
+	case MEDIA_BUS_FMT_YUV10_1X30:
+	case MEDIA_BUS_FMT_UYYVYY10_0_5X30:
+		color_format = 0x0B;
+		break;
+	case MEDIA_BUS_FMT_YUV12_1X36:
+	case MEDIA_BUS_FMT_UYYVYY12_0_5X36:
+		color_format = 0x0D;
+		break;
+	case MEDIA_BUS_FMT_YUV16_1X48:
+	case MEDIA_BUS_FMT_UYYVYY16_0_5X48:
+		color_format = 0x0F;
+		break;
+
+	case MEDIA_BUS_FMT_UYVY8_1X16:
+		color_format = 0x16;
+		break;
+	case MEDIA_BUS_FMT_UYVY10_1X20:
+		color_format = 0x14;
+		break;
+	case MEDIA_BUS_FMT_UYVY12_1X24:
+		color_format = 0x12;
+		break;
+
+	default:
+		return;
+	}
+
+	val = HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE |
+		((color_format << HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET) &
+		HDMI_TX_INVID0_VIDEO_MAPPING_MASK);
+	hdmi_writeb(hdmi, val, HDMI_TX_INVID0);
+
+	/* Enable TX stuffing: When DE is inactive, fix the output data to 0 */
+	val = HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE |
+		HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE |
+		HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE;
+	hdmi_writeb(hdmi, val, HDMI_TX_INSTUFFING);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA0);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_GYDATA1);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA0);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_RCRDATA1);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA0);
+	hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1);
+}
+
+static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi)
+{
+	hdmi_writeb(hdmi, 0, HDMI_FC_MASK2);
+	hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2);
+}
+
+static void dw_hdmi_disable(struct dw_hdmi *hdmi)
+{
+	if (hdmi->phy.enabled) {
+		hdmi->phy.ops->disable(hdmi, hdmi->phy.data);
+		hdmi->phy.enabled = false;
+	}
+}
+
+static void hdmi_config_AVI(struct dw_hdmi *hdmi, struct drm_display_mode *mode)
+{
+	struct hdmi_avi_infoframe frame;
+	u8 val;
+	bool is_hdmi2 = false;
+
+	if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format) ||
+	    hdmi->edid_data.display_info.hdmi.scdc.supported)
+		is_hdmi2 = true;
+	/* Initialise info frame from DRM mode */
+	drm_hdmi_avi_infoframe_from_display_mode(&frame, mode, is_hdmi2);
+
+	if (hdmi_bus_fmt_is_yuv444(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV444;
+	else if (hdmi_bus_fmt_is_yuv422(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV422;
+	else if (hdmi_bus_fmt_is_yuv420(hdmi->hdmi_data.enc_out_bus_format))
+		frame.colorspace = HDMI_COLORSPACE_YUV420;
+	else
+		frame.colorspace = HDMI_COLORSPACE_RGB;
+
+	/* Set up colorimetry */
+	switch (hdmi->hdmi_data.enc_out_encoding) {
+	case V4L2_YCBCR_ENC_601:
+		if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV601)
+			frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
+		else
+			frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
+		frame.extended_colorimetry =
+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
+		break;
+	case V4L2_YCBCR_ENC_709:
+		if (hdmi->hdmi_data.enc_in_encoding == V4L2_YCBCR_ENC_XV709)
+			frame.colorimetry = HDMI_COLORIMETRY_EXTENDED;
+		else
+			frame.colorimetry = HDMI_COLORIMETRY_ITU_709;
+		frame.extended_colorimetry =
+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
+		break;
+	default: /* Carries no data */
+		frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
+		frame.extended_colorimetry =
+				HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
+		break;
+	}
+
+	frame.scan_mode = HDMI_SCAN_MODE_NONE;
+
+	/*
+	 * The Designware IP uses a different byte format from standard
+	 * AVI info frames, though generally the bits are in the correct
+	 * bytes.
+	 */
+
+	/*
+	 * AVI data byte 1 differences: Colorspace in bits 0,1,7 rather than
+	 * 5,6,7, active aspect present in bit 6 rather than 4.
+	 */
+	val = (frame.scan_mode & 3) << 4 | (frame.colorspace & 0x3);
+	if (frame.active_aspect & 15)
+		val |= HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT;
+	if (frame.top_bar || frame.bottom_bar)
+		val |= HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR;
+	if (frame.left_bar || frame.right_bar)
+		val |= HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR;
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF0);
+
+	/* AVI data byte 2 differences: none */
+	val = ((frame.colorimetry & 0x3) << 6) |
+	      ((frame.picture_aspect & 0x3) << 4) |
+	      (frame.active_aspect & 0xf);
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF1);
+
+	/* AVI data byte 3 differences: none */
+	val = ((frame.extended_colorimetry & 0x7) << 4) |
+	      ((frame.quantization_range & 0x3) << 2) |
+	      (frame.nups & 0x3);
+	if (frame.itc)
+		val |= HDMI_FC_AVICONF2_IT_CONTENT_VALID;
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF2);
+
+	/* AVI data byte 4 differences: none */
+	val = frame.video_code & 0x7f;
+	hdmi_writeb(hdmi, val, HDMI_FC_AVIVID);
+
+	/* AVI Data Byte 5- set up input and output pixel repetition */
+	val = (((hdmi->hdmi_data.video_mode.mpixelrepetitioninput + 1) <<
+		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET) &
+		HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK) |
+		((hdmi->hdmi_data.video_mode.mpixelrepetitionoutput <<
+		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET) &
+		HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK);
+	hdmi_writeb(hdmi, val, HDMI_FC_PRCONF);
+
+	/*
+	 * AVI data byte 5 differences: content type in 0,1 rather than 4,5,
+	 * ycc range in bits 2,3 rather than 6,7
+	 */
+	val = ((frame.ycc_quantization_range & 0x3) << 2) |
+	      (frame.content_type & 0x3);
+	hdmi_writeb(hdmi, val, HDMI_FC_AVICONF3);
+
+	/* AVI Data Bytes 6-13 */
+	hdmi_writeb(hdmi, frame.top_bar & 0xff, HDMI_FC_AVIETB0);
+	hdmi_writeb(hdmi, (frame.top_bar >> 8) & 0xff, HDMI_FC_AVIETB1);
+	hdmi_writeb(hdmi, frame.bottom_bar & 0xff, HDMI_FC_AVISBB0);
+	hdmi_writeb(hdmi, (frame.bottom_bar >> 8) & 0xff, HDMI_FC_AVISBB1);
+	hdmi_writeb(hdmi, frame.left_bar & 0xff, HDMI_FC_AVIELB0);
+	hdmi_writeb(hdmi, (frame.left_bar >> 8) & 0xff, HDMI_FC_AVIELB1);
+	hdmi_writeb(hdmi, frame.right_bar & 0xff, HDMI_FC_AVISRB0);
+	hdmi_writeb(hdmi, (frame.right_bar >> 8) & 0xff, HDMI_FC_AVISRB1);
+}
+
+static void hdmi_config_vendor_specific_infoframe(struct dw_hdmi *hdmi,
+						  struct drm_display_mode *mode)
+{
+	struct hdmi_vendor_infoframe frame;
+	u8 buffer[10];
+	ssize_t err;
+
+	/* Disable HDMI vendor specific infoframe send */
+	hdmi_mask_writeb(hdmi, 0, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
+			 HDMI_FC_DATAUTO0_VSD_MASK);
+
+	err = drm_hdmi_vendor_infoframe_from_display_mode(&frame, mode);
+	if (err < 0)
+		/*
+		 * Going into that statement does not means vendor infoframe
+		 * fails. It just informed us that vendor infoframe is not
+		 * needed for the selected mode. Only 4k or stereoscopic 3D
+		 * mode requires vendor infoframe. So just simply return.
+		 */
+		return;
+
+	err = hdmi_vendor_infoframe_pack(&frame, buffer, sizeof(buffer));
+	if (err < 0) {
+		printf("Failed to pack vendor infoframe: %zd\n", err);
+		return;
+	}
+
+	/* Set the length of HDMI vendor specific InfoFrame payload */
+	hdmi_writeb(hdmi, buffer[2], HDMI_FC_VSDSIZE);
+
+	/* Set 24bit IEEE Registration Identifier */
+	hdmi_writeb(hdmi, buffer[4], HDMI_FC_VSDIEEEID0);
+	hdmi_writeb(hdmi, buffer[5], HDMI_FC_VSDIEEEID1);
+	hdmi_writeb(hdmi, buffer[6], HDMI_FC_VSDIEEEID2);
+
+	/* Set HDMI_Video_Format and HDMI_VIC/3D_Structure */
+	hdmi_writeb(hdmi, buffer[7], HDMI_FC_VSDPAYLOAD0);
+	hdmi_writeb(hdmi, buffer[8], HDMI_FC_VSDPAYLOAD1);
+
+	if (frame.s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
+		hdmi_writeb(hdmi, buffer[9], HDMI_FC_VSDPAYLOAD2);
+
+	/* Packet frame interpolation */
+	hdmi_writeb(hdmi, 1, HDMI_FC_DATAUTO1);
+
+	/* Auto packets per frame and line spacing */
+	hdmi_writeb(hdmi, 0x11, HDMI_FC_DATAUTO2);
+
+	/* Configures the Frame Composer On RDRB mode */
+	hdmi_mask_writeb(hdmi, 1, HDMI_FC_DATAUTO0, HDMI_FC_DATAUTO0_VSD_OFFSET,
+			 HDMI_FC_DATAUTO0_VSD_MASK);
+}
+
+static void hdmi_set_cts_n(struct dw_hdmi *hdmi, unsigned int cts,
+			   unsigned int n)
+{
+	/* Must be set/cleared first */
+	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+
+	/* nshift factor = 0 */
+	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3);
+
+	hdmi_writeb(hdmi, ((cts >> 16) & HDMI_AUD_CTS3_AUDCTS19_16_MASK) |
+		    HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+	hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
+	hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
+
+	hdmi_writeb(hdmi, (n >> 16) & 0x0f, HDMI_AUD_N3);
+	hdmi_writeb(hdmi, (n >> 8) & 0xff, HDMI_AUD_N2);
+	hdmi_writeb(hdmi, n & 0xff, HDMI_AUD_N1);
+}
+
+static int hdmi_match_tmds_n_table(struct dw_hdmi *hdmi,
+				   unsigned long pixel_clk,
+				   unsigned long freq)
+{
+	const struct dw_hdmi_plat_data *plat_data = hdmi->plat_data;
+	const struct dw_hdmi_audio_tmds_n *tmds_n = NULL;
+	int i;
+
+	if (plat_data->tmds_n_table) {
+		for (i = 0; plat_data->tmds_n_table[i].tmds != 0; i++) {
+			if (pixel_clk == plat_data->tmds_n_table[i].tmds) {
+				tmds_n = &plat_data->tmds_n_table[i];
+				break;
+			}
+		}
+	}
+
+	if (!tmds_n) {
+		for (i = 0; common_tmds_n_table[i].tmds != 0; i++) {
+			if (pixel_clk == common_tmds_n_table[i].tmds) {
+				tmds_n = &common_tmds_n_table[i];
+				break;
+			}
+		}
+	}
+
+	if (!tmds_n)
+		return -ENOENT;
+
+	switch (freq) {
+	case 32000:
+		return tmds_n->n_32k;
+	case 44100:
+	case 88200:
+	case 176400:
+		return (freq / 44100) * tmds_n->n_44k1;
+	case 48000:
+	case 96000:
+	case 192000:
+		return (freq / 48000) * tmds_n->n_48k;
+	default:
+		return -ENOENT;
+	}
+}
+
+static u64 hdmi_audio_math_diff(unsigned int freq, unsigned int n,
+				unsigned int pixel_clk)
+{
+	u64 final, diff;
+	u64 cts;
+
+	final = (u64)pixel_clk * n;
+
+	cts = final;
+	do_div(cts, 128 * freq);
+
+	diff = final - (u64)cts * (128 * freq);
+
+	return diff;
+}
+
+static unsigned int hdmi_compute_n(struct dw_hdmi *hdmi,
+				   unsigned long pixel_clk,
+				   unsigned long freq)
+{
+	unsigned int min_n = DIV_ROUND_UP((128 * freq), 1500);
+	unsigned int max_n = (128 * freq) / 300;
+	unsigned int ideal_n = (128 * freq) / 1000;
+	unsigned int best_n_distance = ideal_n;
+	unsigned int best_n = 0;
+	u64 best_diff = U64_MAX;
+	int n;
+
+	/* If the ideal N could satisfy the audio math, then just take it */
+	if (hdmi_audio_math_diff(freq, ideal_n, pixel_clk) == 0)
+		return ideal_n;
+
+	for (n = min_n; n <= max_n; n++) {
+		u64 diff = hdmi_audio_math_diff(freq, n, pixel_clk);
+
+		if (diff < best_diff || (diff == best_diff &&
+					 abs(n - ideal_n) < best_n_distance)) {
+			best_n = n;
+			best_diff = diff;
+			best_n_distance = abs(best_n - ideal_n);
+		}
+
+		/*
+		 * The best N already satisfy the audio math, and also be
+		 * the closest value to ideal N, so just cut the loop.
+		 */
+		if ((best_diff == 0) && (abs(n - ideal_n) > best_n_distance))
+			break;
+	}
+
+	return best_n;
+}
+
+static unsigned int hdmi_find_n(struct dw_hdmi *hdmi, unsigned long pixel_clk,
+				unsigned long sample_rate)
+{
+	int n;
+
+	n = hdmi_match_tmds_n_table(hdmi, pixel_clk, sample_rate);
+	if (n > 0)
+		return n;
+
+	printf("Rate %lu missing; compute N dynamically\n",
+	       pixel_clk);
+
+	return hdmi_compute_n(hdmi, pixel_clk, sample_rate);
+}
+
+static
+void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, unsigned long pixel_clk,
+			      unsigned int sample_rate)
+{
+	unsigned long ftdms = pixel_clk;
+	unsigned int n, cts;
+	u64 tmp;
+
+	n = hdmi_find_n(hdmi, pixel_clk, sample_rate);
+
+	/*
+	 * Compute the CTS value from the N value.  Note that CTS and N
+	 * can be up to 20 bits in total, so we need 64-bit math.  Also
+	 * note that our TDMS clock is not fully accurate; it is accurate
+	 * to kHz.  This can introduce an unnecessary remainder in the
+	 * calculation below, so we don't try to warn about that.
+	 */
+	tmp = (u64)ftdms * n;
+	do_div(tmp, 128 * sample_rate);
+	cts = tmp;
+
+	printf("%s: fs=%uHz ftdms=%lu.%03luMHz N=%d cts=%d\n", __func__,
+	       sample_rate, ftdms / 1000000, (ftdms / 1000) % 1000, n, cts);
+
+	hdmi->audio_n = n;
+	hdmi->audio_cts = cts;
+	hdmi_set_cts_n(hdmi, cts, hdmi->audio_enable ? n : 0);
+}
+
+static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi)
+{
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+				 hdmi->sample_rate);
+}
+
+static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi)
+{
+	hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS);
+}
+
+void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate)
+{
+	hdmi->sample_rate = rate;
+	hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock,
+				 hdmi->sample_rate);
+}
+
+static int dw_hdmi_setup(struct dw_hdmi *hdmi,
+			 struct drm_display_mode *mode)
+{
+	int ret;
+	void *data = hdmi->plat_data->phy_data;
+
+	hdmi_disable_overflow_interrupts(hdmi);
+
+	if (!hdmi->vic)
+		printf("Non-CEA mode used in HDMI\n");
+	else
+		printf("CEA mode used vic=%d\n", hdmi->vic);
+
+	if (hdmi->plat_data->get_enc_out_encoding)
+		hdmi->hdmi_data.enc_out_encoding =
+			hdmi->plat_data->get_enc_out_encoding(data);
+	else if ((hdmi->vic == 6) || (hdmi->vic == 7) ||
+		 (hdmi->vic == 21) || (hdmi->vic == 22) ||
+		 (hdmi->vic == 2) || (hdmi->vic == 3) ||
+		 (hdmi->vic == 17) || (hdmi->vic == 18))
+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_601;
+	else
+		hdmi->hdmi_data.enc_out_encoding = V4L2_YCBCR_ENC_709;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+		hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 1;
+		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 1;
+	} else {
+		hdmi->hdmi_data.video_mode.mpixelrepetitionoutput = 0;
+		hdmi->hdmi_data.video_mode.mpixelrepetitioninput = 0;
+	}
+
+	/* TOFIX: Get input format from plat data or fallback to RGB888 */
+	if (hdmi->plat_data->get_input_bus_format)
+		hdmi->hdmi_data.enc_in_bus_format =
+			hdmi->plat_data->get_input_bus_format(data);
+	else if (hdmi->plat_data->input_bus_format)
+		hdmi->hdmi_data.enc_in_bus_format =
+			hdmi->plat_data->input_bus_format;
+	else
+		hdmi->hdmi_data.enc_in_bus_format =
+			MEDIA_BUS_FMT_RGB888_1X24;
+
+	/* TOFIX: Default to RGB888 output format */
+	if (hdmi->plat_data->get_output_bus_format)
+		hdmi->hdmi_data.enc_out_bus_format =
+			hdmi->plat_data->get_output_bus_format(data);
+	else
+		hdmi->hdmi_data.enc_out_bus_format =
+			MEDIA_BUS_FMT_RGB888_1X24;
+
+	/* TOFIX: Get input encoding from plat data or fallback to none */
+	if (hdmi->plat_data->get_enc_in_encoding)
+		hdmi->hdmi_data.enc_in_encoding =
+			hdmi->plat_data->get_enc_in_encoding(data);
+	else if (hdmi->plat_data->input_bus_encoding)
+		hdmi->hdmi_data.enc_in_encoding =
+			hdmi->plat_data->input_bus_encoding;
+	else
+		hdmi->hdmi_data.enc_in_encoding = V4L2_YCBCR_ENC_DEFAULT;
+	/*
+	 * According to the dw-hdmi specification 6.4.2
+	 * vp_pr_cd[3:0]:
+	 * 0000b: No pixel repetition (pixel sent only once)
+	 * 0001b: Pixel sent two times (pixel repeated once)
+	 */
+	hdmi->hdmi_data.pix_repet_factor =
+		(mode->flags & DRM_MODE_FLAG_DBLCLK) ? 1 : 0;
+	hdmi->hdmi_data.video_mode.mdataenablepolarity = true;
+
+	/* HDMI Initialization Step B.1 */
+	hdmi_av_composer(hdmi, mode);
+
+	/* HDMI Initialization Step B.2 */
+	ret = hdmi->phy.ops->init(hdmi, hdmi->phy.data, &hdmi->previous_mode);
+	if (ret)
+		return ret;
+	hdmi->phy.enabled = true;
+
+	/* HDMI Initializateion Step B.3 */
+	dw_hdmi_enable_video_path(hdmi);
+
+	/* HDMI Initialization Step E - Configure audio */
+	if (hdmi->sink_has_audio) {
+		printf("sink has audio support\n");
+		hdmi_clk_regenerator_update_pixel_clock(hdmi);
+		hdmi_enable_audio_clk(hdmi);
+	}
+
+	/* not for DVI mode */
+	if (hdmi->sink_is_hdmi) {
+		printf("%s HDMI mode\n", __func__);
+
+		/* HDMI Initialization Step F - Configure AVI InfoFrame */
+		hdmi_config_AVI(hdmi, mode);
+		hdmi_config_vendor_specific_infoframe(hdmi, mode);
+	} else {
+		printf("%s DVI mode\n", __func__);
+	}
+
+	hdmi_video_packetize(hdmi);
+	hdmi_video_csc(hdmi);
+	hdmi_video_sample(hdmi);
+	dw_hdmi_clear_overflow(hdmi);
+	if (hdmi->cable_plugin && hdmi->sink_is_hdmi)
+		hdmi_enable_overflow_interrupts(hdmi);
+
+	return 0;
+}
+
+int dw_hdmi_detect_hotplug(struct dw_hdmi *hdmi)
+{
+	return hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
+}
+
+static int dw_hdmi_set_reg_wr(struct dw_hdmi *hdmi)
+{
+	switch (hdmi->io_width) {
+	case 4:
+		hdmi->write = dw_hdmi_writel;
+		hdmi->read = dw_hdmi_readl;
+		break;
+	case 1:
+		hdmi->write = dw_hdmi_writeb;
+		hdmi->read = dw_hdmi_readb;
+		break;
+	default:
+		printf("reg-io-width must be 1 or 4\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static void initialize_hdmi_mutes(struct dw_hdmi *hdmi)
+{
+	/*mute unnecessary interrupt, only enable hpd */
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT1);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_FC_STAT2);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AS_STAT0);
+	hdmi_writeb(hdmi, 0xfe, HDMI_IH_MUTE_PHY_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CM_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_CEC_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_VP_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_I2CMPHY_STAT0);
+	hdmi_writeb(hdmi, 0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
+	hdmi_writeb(hdmi, 0xf1, HDMI_PHY_MASK0);
+
+	/*Force output black*/
+	dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS2);
+	dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS1);
+	dw_hdmi_writel(hdmi, 0x00, HDMI_FC_DBGTMDS0);
+}
+
+static void dw_hdmi_dev_init(struct dw_hdmi *hdmi)
+{
+	hdmi->version = (hdmi_readb(hdmi, HDMI_DESIGN_ID) << 8)
+		      | (hdmi_readb(hdmi, HDMI_REVISION_ID) << 0);
+
+	dw_hdmi_phy_power_off(hdmi);
+	initialize_hdmi_mutes(hdmi);
+}
+
+static int dw_hdmi_read_edid(struct dw_hdmi *hdmi,
+			     int block, unsigned char *buff)
+{
+	int i = 0, n = 0, index = 0, ret = -1, trytime = 2;
+	int offset = (block % 2) * 0x80;
+	int interrupt = 0;
+
+	rockchip_dw_hdmi_i2cm_reset(hdmi);
+
+	/* Set DDC I2C CLK which divided from DDC_CLK to 100KHz. */
+	rockchip_dw_hdmi_i2cm_clk_init(hdmi);
+
+	/* Enable I2C interrupt for reading edid */
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 0);
+
+	hdmi_writeb(hdmi, DDC_I2C_EDID_ADDR, HDMI_I2CM_SLAVE);
+	hdmi_writeb(hdmi, DDC_I2C_SEG_ADDR, HDMI_I2CM_SEGADDR);
+	hdmi_writeb(hdmi, block / 2, HDMI_I2CM_SEGPTR);
+
+	while (trytime--) {
+		for (n = 0; n < HDMI_EDID_BLOCK_SIZE / 8; n++) {
+			hdmi_writeb(hdmi, offset + 8 * n, HDMI_I2CM_ADDRESS);
+			/*enable extend sequential read operation*/
+			if (block == 0)
+				hdmi_writeb(hdmi, HDMI_I2CM_OPERATION_READ8,
+					    HDMI_I2CM_OPERATION);
+			else
+				hdmi_writeb(hdmi,
+					    HDMI_I2CM_OPERATION_READ8_EXT,
+					    HDMI_I2CM_OPERATION);
+
+			i = 20;
+			while (i--) {
+				mdelay(1);
+				interrupt = hdmi_readb(hdmi,
+						       HDMI_IH_I2CM_STAT0);
+				if (interrupt) {
+					hdmi_writeb(hdmi,
+						    interrupt,
+						    HDMI_IH_I2CM_STAT0);
+				}
+
+				if (interrupt &
+				    (m_SCDC_READREQ |
+				     m_I2CM_DONE |
+				     m_I2CM_ERROR))
+					break;
+				mdelay(4);
+			}
+
+			if (interrupt & m_I2CM_DONE) {
+				for (index = 0; index < 8; index++)
+					buff[8 * n + index] =
+					hdmi_readb(hdmi, HDMI_I2CM_READ_BUFF0
+						   + index);
+
+				if (n == HDMI_EDID_BLOCK_SIZE / 8 - 1) {
+					ret = 0;
+					printf("[%s] edid read success\n",
+					       __func__);
+					goto exit;
+				}
+				continue;
+			} else if ((interrupt & m_I2CM_ERROR) || (i == -1)) {
+				printf("[%s] edid read error\n", __func__);
+				rockchip_dw_hdmi_i2cm_reset(hdmi);
+				break;
+			}
+		}
+
+		printf("[%s] edid try times %d\n", __func__, trytime);
+		mdelay(100);
+	}
+
+exit:
+	/* Disable I2C interrupt */
+	rockchip_dw_hdmi_i2cm_mask_int(hdmi, 1);
+	return ret;
+}
+
+static int drm_do_get_edid(struct dw_hdmi *hdmi, u8 *edid)
+{
+	int i, j, block_num, ret;
+
+	/* base block fetch */
+	for (i = 0; i < 3; i++) {
+		ret = dw_hdmi_read_edid(hdmi, 0, edid);
+		if (!ret)
+			break;
+	}
+
+	if (ret) {
+		printf("get base block failed\n");
+		goto err;
+	}
+
+	/* get the number of extensions */
+	block_num = edid[0x7e];
+
+	for (j = 1; j <= block_num; j++) {
+		for (i = 0; i < 3; i++) {
+			ret = dw_hdmi_read_edid(hdmi, j, &edid[0x80 * j]);
+			if (!ret)
+				break;
+		}
+	}
+
+	if (ret) {
+		printf("get extensions failed\n");
+		goto err;
+	}
+
+	return 0;
+
+err:
+	memset(edid, 0, HDMI_EDID_BLOCK_SIZE);
+	return -EFAULT;
+}
+
+void dw_hdmi_audio_enable(struct dw_hdmi *hdmi)
+{
+	hdmi->audio_enable = true;
+	hdmi_set_cts_n(hdmi, hdmi->audio_cts, hdmi->audio_n);
+}
+
+void dw_hdmi_audio_disable(struct dw_hdmi *hdmi)
+{
+	hdmi->audio_enable = false;
+	hdmi_set_cts_n(hdmi, hdmi->audio_cts, 0);
+}
+
+int rockchip_dw_hdmi_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct dw_hdmi_plat_data *pdata = connector->data;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct dw_hdmi *hdmi;
+	struct drm_display_mode *mode_buf;
+	int hdmi_node = conn_state->node;
+	u32 val;
+
+	hdmi = malloc(sizeof(struct dw_hdmi));
+	if (!hdmi)
+		return -ENOMEM;
+
+	memset(hdmi, 0, sizeof(struct dw_hdmi));
+
+	mode_buf = malloc(MODE_LEN * sizeof(struct drm_display_mode));
+	if (!mode_buf)
+		return -ENOMEM;
+	memset(mode_buf, 0, MODE_LEN * sizeof(struct drm_display_mode));
+
+	hdmi->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+					hdmi_node, "reg", 0, NULL, false);
+	hdmi->io_width = fdtdec_get_int(state->blob, hdmi_node,
+					"reg-io-width", -1);
+	hdmi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (hdmi->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		       __func__, hdmi->grf);
+		return -ENXIO;
+	}
+
+	dw_hdmi_set_reg_wr(hdmi);
+
+	if (crtc_state->crtc_id)
+		val = ((1 << pdata->vop_sel_bit) |
+		       (1 << (16 + pdata->vop_sel_bit)));
+	else
+		val = ((0 << pdata->vop_sel_bit) |
+		       (1 << (16 + pdata->vop_sel_bit)));
+	writel(val, hdmi->grf + pdata->grf_vop_sel_reg);
+
+	conn_state->type = DRM_MODE_CONNECTOR_HDMIA;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+
+	hdmi->dev_type = pdata->dev_type;
+	hdmi->plat_data = pdata;
+	hdmi->edid_data.mode_buf = mode_buf;
+	hdmi->sample_rate = 48000;
+
+	conn_state->private = hdmi;
+	dw_hdmi_detect_phy(hdmi);
+	dw_hdmi_dev_init(hdmi);
+
+	return 0;
+}
+
+void rockchip_dw_hdmi_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (hdmi->edid_data.mode_buf)
+		free(hdmi->edid_data.mode_buf);
+	if (hdmi)
+		free(hdmi);
+}
+
+int rockchip_dw_hdmi_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+int rockchip_dw_hdmi_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+
+	dw_hdmi_setup(hdmi, mode);
+
+	return 0;
+}
+
+int rockchip_dw_hdmi_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	dw_hdmi_disable(hdmi);
+	return 0;
+}
+
+int rockchip_dw_hdmi_get_timing(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+	ret = drm_do_get_edid(hdmi, conn_state->edid);
+	if (!ret) {
+		ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid);
+
+		if (ret > 0) {
+			hdmi->sink_is_hdmi =
+				drm_detect_hdmi_monitor(conn_state->edid);
+			hdmi->sink_has_audio = false;
+			*mode = *hdmi->edid_data.preferred_mode;
+			hdmi->vic = drm_match_cea_mode(mode);
+
+			return 0;
+		}
+	}
+
+	/* if can't get edid timing, use default resolution. */
+	printf("can't get edid timing\n");
+	hdmi->vic = HDMI_VIDEO_DEFAULT_MODE;
+	hdmi->sink_is_hdmi = true;
+	hdmi->sink_has_audio = false;
+	mode->hdisplay = 1280;
+	mode->hsync_start = 1390;
+	mode->hsync_end = 1430;
+	mode->htotal = 1650;
+	mode->vdisplay = 720;
+	mode->vsync_start = 725;
+	mode->vsync_end = 730;
+	mode->vtotal = 750;
+	mode->clock = 74250;
+	mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+
+	return 0;
+}
+
+int rockchip_dw_hdmi_detect(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	if (!hdmi)
+		return -EFAULT;
+
+	ret = dw_hdmi_detect_hotplug(hdmi);
+
+	return ret;
+}
+
+int rockchip_dw_hdmi_get_edid(struct display_state *state)
+{
+	int ret;
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_hdmi *hdmi = conn_state->private;
+
+	ret = drm_do_get_edid(hdmi, conn_state->edid);
+
+	return ret;
+}
+
diff --git a/drivers/video/drm/dw_hdmi.h b/drivers/video/drm/dw_hdmi.h
new file mode 100644
index 0000000000..5f9c48befa
--- /dev/null
+++ b/drivers/video/drm/dw_hdmi.h
@@ -0,0 +1,1342 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_HDMI_H_
+#define _ROCKCHIP_HDMI_H_
+
+#define HDMI_DESIGN_ID                          0x0000
+#define HDMI_REVISION_ID                        0x0001
+#define HDMI_PRODUCT_ID0                        0x0002
+#define HDMI_PRODUCT_ID1                        0x0003
+#define HDMI_CONFIG0_ID                         0x0004
+#define HDMI_CONFIG1_ID                         0x0005
+#define HDMI_CONFIG2_ID                         0x0006
+#define HDMI_CONFIG3_ID                         0x0007
+
+/* Interrupt Registers */
+#define HDMI_IH_FC_STAT0                        0x0100
+#define HDMI_IH_FC_STAT1                        0x0101
+#define HDMI_IH_FC_STAT2                        0x0102
+#define HDMI_IH_AS_STAT0                        0x0103
+#define HDMI_IH_PHY_STAT0                       0x0104
+#define HDMI_IH_I2CM_STAT0                      0x0105
+#define m_SCDC_READREQ                          BIT(2)
+#define m_I2CM_DONE                             BIT(1)
+#define m_I2CM_ERROR                            BIT(0)
+#define HDMI_IH_CEC_STAT0                       0x0106
+#define HDMI_IH_VP_STAT0                        0x0107
+#define HDMI_IH_I2CMPHY_STAT0                   0x0108
+#define HDMI_IH_AHBDMAAUD_STAT0                 0x0109
+
+#define HDMI_IH_MUTE_FC_STAT0                   0x0180
+#define HDMI_IH_MUTE_FC_STAT1                   0x0181
+#define HDMI_IH_MUTE_FC_STAT2                   0x0182
+#define HDMI_IH_MUTE_AS_STAT0                   0x0183
+#define HDMI_IH_MUTE_PHY_STAT0                  0x0184
+#define HDMI_IH_MUTE_I2CM_STAT0                 0x0185
+#define HDMI_IH_MUTE_CEC_STAT0                  0x0186
+#define HDMI_IH_MUTE_VP_STAT0                   0x0187
+#define HDMI_IH_MUTE_I2CMPHY_STAT0              0x0188
+#define HDMI_IH_MUTE_AHBDMAAUD_STAT0            0x0189
+#define HDMI_IH_MUTE                            0x01FF
+
+/* Video Sample Registers */
+#define HDMI_TX_INVID0                          0x0200
+#define HDMI_TX_INSTUFFING                      0x0201
+#define HDMI_TX_GYDATA0                         0x0202
+#define HDMI_TX_GYDATA1                         0x0203
+#define HDMI_TX_RCRDATA0                        0x0204
+#define HDMI_TX_RCRDATA1                        0x0205
+#define HDMI_TX_BCBDATA0                        0x0206
+#define HDMI_TX_BCBDATA1                        0x0207
+
+/* Video Packetizer Registers */
+#define HDMI_VP_STATUS                          0x0800
+#define HDMI_VP_PR_CD                           0x0801
+#define HDMI_VP_STUFF                           0x0802
+#define HDMI_VP_REMAP                           0x0803
+#define HDMI_VP_CONF                            0x0804
+#define HDMI_VP_STAT                            0x0805
+#define HDMI_VP_INT                             0x0806
+#define HDMI_VP_MASK                            0x0807
+#define HDMI_VP_POL                             0x0808
+
+/* Frame Composer Registers */
+#define HDMI_FC_INVIDCONF                       0x1000
+#define HDMI_FC_INHACTV0                        0x1001
+#define HDMI_FC_INHACTV1                        0x1002
+#define HDMI_FC_INHBLANK0                       0x1003
+#define HDMI_FC_INHBLANK1                       0x1004
+#define HDMI_FC_INVACTV0                        0x1005
+#define HDMI_FC_INVACTV1                        0x1006
+#define HDMI_FC_INVBLANK                        0x1007
+#define HDMI_FC_HSYNCINDELAY0                   0x1008
+#define HDMI_FC_HSYNCINDELAY1                   0x1009
+#define HDMI_FC_HSYNCINWIDTH0                   0x100A
+#define HDMI_FC_HSYNCINWIDTH1                   0x100B
+#define HDMI_FC_VSYNCINDELAY                    0x100C
+#define HDMI_FC_VSYNCINWIDTH                    0x100D
+#define HDMI_FC_INFREQ0                         0x100E
+#define HDMI_FC_INFREQ1                         0x100F
+#define HDMI_FC_INFREQ2                         0x1010
+#define HDMI_FC_CTRLDUR                         0x1011
+#define HDMI_FC_EXCTRLDUR                       0x1012
+#define HDMI_FC_EXCTRLSPAC                      0x1013
+#define HDMI_FC_CH0PREAM                        0x1014
+#define HDMI_FC_CH1PREAM                        0x1015
+#define HDMI_FC_CH2PREAM                        0x1016
+#define HDMI_FC_AVICONF3                        0x1017
+#define HDMI_FC_GCP                             0x1018
+#define HDMI_FC_AVICONF0                        0x1019
+#define HDMI_FC_AVICONF1                        0x101A
+#define HDMI_FC_AVICONF2                        0x101B
+#define HDMI_FC_AVIVID                          0x101C
+#define HDMI_FC_AVIETB0                         0x101D
+#define HDMI_FC_AVIETB1                         0x101E
+#define HDMI_FC_AVISBB0                         0x101F
+#define HDMI_FC_AVISBB1                         0x1020
+#define HDMI_FC_AVIELB0                         0x1021
+#define HDMI_FC_AVIELB1                         0x1022
+#define HDMI_FC_AVISRB0                         0x1023
+#define HDMI_FC_AVISRB1                         0x1024
+#define HDMI_FC_AUDICONF0                       0x1025
+#define HDMI_FC_AUDICONF1                       0x1026
+#define HDMI_FC_AUDICONF2                       0x1027
+#define HDMI_FC_AUDICONF3                       0x1028
+#define HDMI_FC_VSDIEEEID0                      0x1029
+#define HDMI_FC_VSDSIZE                         0x102A
+#define HDMI_FC_VSDIEEEID1                      0x1030
+#define HDMI_FC_VSDIEEEID2                      0x1031
+#define HDMI_FC_VSDPAYLOAD0                     0x1032
+#define HDMI_FC_VSDPAYLOAD1                     0x1033
+#define HDMI_FC_VSDPAYLOAD2                     0x1034
+#define HDMI_FC_VSDPAYLOAD3                     0x1035
+#define HDMI_FC_VSDPAYLOAD4                     0x1036
+#define HDMI_FC_VSDPAYLOAD5                     0x1037
+#define HDMI_FC_VSDPAYLOAD6                     0x1038
+#define HDMI_FC_VSDPAYLOAD7                     0x1039
+#define HDMI_FC_VSDPAYLOAD8                     0x103A
+#define HDMI_FC_VSDPAYLOAD9                     0x103B
+#define HDMI_FC_VSDPAYLOAD10                    0x103C
+#define HDMI_FC_VSDPAYLOAD11                    0x103D
+#define HDMI_FC_VSDPAYLOAD12                    0x103E
+#define HDMI_FC_VSDPAYLOAD13                    0x103F
+#define HDMI_FC_VSDPAYLOAD14                    0x1040
+#define HDMI_FC_VSDPAYLOAD15                    0x1041
+#define HDMI_FC_VSDPAYLOAD16                    0x1042
+#define HDMI_FC_VSDPAYLOAD17                    0x1043
+#define HDMI_FC_VSDPAYLOAD18                    0x1044
+#define HDMI_FC_VSDPAYLOAD19                    0x1045
+#define HDMI_FC_VSDPAYLOAD20                    0x1046
+#define HDMI_FC_VSDPAYLOAD21                    0x1047
+#define HDMI_FC_VSDPAYLOAD22                    0x1048
+#define HDMI_FC_VSDPAYLOAD23                    0x1049
+#define HDMI_FC_SPDVENDORNAME0                  0x104A
+#define HDMI_FC_SPDVENDORNAME1                  0x104B
+#define HDMI_FC_SPDVENDORNAME2                  0x104C
+#define HDMI_FC_SPDVENDORNAME3                  0x104D
+#define HDMI_FC_SPDVENDORNAME4                  0x104E
+#define HDMI_FC_SPDVENDORNAME5                  0x104F
+#define HDMI_FC_SPDVENDORNAME6                  0x1050
+#define HDMI_FC_SPDVENDORNAME7                  0x1051
+#define HDMI_FC_SDPPRODUCTNAME0                 0x1052
+#define HDMI_FC_SDPPRODUCTNAME1                 0x1053
+#define HDMI_FC_SDPPRODUCTNAME2                 0x1054
+#define HDMI_FC_SDPPRODUCTNAME3                 0x1055
+#define HDMI_FC_SDPPRODUCTNAME4                 0x1056
+#define HDMI_FC_SDPPRODUCTNAME5                 0x1057
+#define HDMI_FC_SDPPRODUCTNAME6                 0x1058
+#define HDMI_FC_SDPPRODUCTNAME7                 0x1059
+#define HDMI_FC_SDPPRODUCTNAME8                 0x105A
+#define HDMI_FC_SDPPRODUCTNAME9                 0x105B
+#define HDMI_FC_SDPPRODUCTNAME10                0x105C
+#define HDMI_FC_SDPPRODUCTNAME11                0x105D
+#define HDMI_FC_SDPPRODUCTNAME12                0x105E
+#define HDMI_FC_SDPPRODUCTNAME13                0x105F
+#define HDMI_FC_SDPPRODUCTNAME14                0x1060
+#define HDMI_FC_SPDPRODUCTNAME15                0x1061
+#define HDMI_FC_SPDDEVICEINF                    0x1062
+#define HDMI_FC_AUDSCONF                        0x1063
+#define HDMI_FC_AUDSSTAT                        0x1064
+#define HDMI_FC_AUDSCHNLS0                      0x1067
+#define HDMI_FC_AUDSCHNLS1                      0x1068
+#define HDMI_FC_AUDSCHNLS2                      0x1069
+#define HDMI_FC_AUDSCHNLS3                      0x106a
+#define HDMI_FC_AUDSCHNLS4                      0x106b
+#define HDMI_FC_AUDSCHNLS5                      0x106c
+#define HDMI_FC_AUDSCHNLS6                      0x106d
+#define HDMI_FC_AUDSCHNLS7                      0x106e
+#define HDMI_FC_AUDSCHNLS8                      0x106f
+#define HDMI_FC_DATACH0FILL                     0x1070
+#define HDMI_FC_DATACH1FILL                     0x1071
+#define HDMI_FC_DATACH2FILL                     0x1072
+#define HDMI_FC_CTRLQHIGH                       0x1073
+#define HDMI_FC_CTRLQLOW                        0x1074
+#define HDMI_FC_ACP0                            0x1075
+#define HDMI_FC_ACP28                           0x1076
+#define HDMI_FC_ACP27                           0x1077
+#define HDMI_FC_ACP26                           0x1078
+#define HDMI_FC_ACP25                           0x1079
+#define HDMI_FC_ACP24                           0x107A
+#define HDMI_FC_ACP23                           0x107B
+#define HDMI_FC_ACP22                           0x107C
+#define HDMI_FC_ACP21                           0x107D
+#define HDMI_FC_ACP20                           0x107E
+#define HDMI_FC_ACP19                           0x107F
+#define HDMI_FC_ACP18                           0x1080
+#define HDMI_FC_ACP17                           0x1081
+#define HDMI_FC_ACP16                           0x1082
+#define HDMI_FC_ACP15                           0x1083
+#define HDMI_FC_ACP14                           0x1084
+#define HDMI_FC_ACP13                           0x1085
+#define HDMI_FC_ACP12                           0x1086
+#define HDMI_FC_ACP11                           0x1087
+#define HDMI_FC_ACP10                           0x1088
+#define HDMI_FC_ACP9                            0x1089
+#define HDMI_FC_ACP8                            0x108A
+#define HDMI_FC_ACP7                            0x108B
+#define HDMI_FC_ACP6                            0x108C
+#define HDMI_FC_ACP5                            0x108D
+#define HDMI_FC_ACP4                            0x108E
+#define HDMI_FC_ACP3                            0x108F
+#define HDMI_FC_ACP2                            0x1090
+#define HDMI_FC_ACP1                            0x1091
+#define HDMI_FC_ISCR1_0                         0x1092
+#define HDMI_FC_ISCR1_16                        0x1093
+#define HDMI_FC_ISCR1_15                        0x1094
+#define HDMI_FC_ISCR1_14                        0x1095
+#define HDMI_FC_ISCR1_13                        0x1096
+#define HDMI_FC_ISCR1_12                        0x1097
+#define HDMI_FC_ISCR1_11                        0x1098
+#define HDMI_FC_ISCR1_10                        0x1099
+#define HDMI_FC_ISCR1_9                         0x109A
+#define HDMI_FC_ISCR1_8                         0x109B
+#define HDMI_FC_ISCR1_7                         0x109C
+#define HDMI_FC_ISCR1_6                         0x109D
+#define HDMI_FC_ISCR1_5                         0x109E
+#define HDMI_FC_ISCR1_4                         0x109F
+#define HDMI_FC_ISCR1_3                         0x10A0
+#define HDMI_FC_ISCR1_2                         0x10A1
+#define HDMI_FC_ISCR1_1                         0x10A2
+#define HDMI_FC_ISCR2_15                        0x10A3
+#define HDMI_FC_ISCR2_14                        0x10A4
+#define HDMI_FC_ISCR2_13                        0x10A5
+#define HDMI_FC_ISCR2_12                        0x10A6
+#define HDMI_FC_ISCR2_11                        0x10A7
+#define HDMI_FC_ISCR2_10                        0x10A8
+#define HDMI_FC_ISCR2_9                         0x10A9
+#define HDMI_FC_ISCR2_8                         0x10AA
+#define HDMI_FC_ISCR2_7                         0x10AB
+#define HDMI_FC_ISCR2_6                         0x10AC
+#define HDMI_FC_ISCR2_5                         0x10AD
+#define HDMI_FC_ISCR2_4                         0x10AE
+#define HDMI_FC_ISCR2_3                         0x10AF
+#define HDMI_FC_ISCR2_2                         0x10B0
+#define HDMI_FC_ISCR2_1                         0x10B1
+#define HDMI_FC_ISCR2_0                         0x10B2
+#define HDMI_FC_DATAUTO0                        0x10B3
+#define HDMI_FC_DATAUTO1                        0x10B4
+#define HDMI_FC_DATAUTO2                        0x10B5
+#define HDMI_FC_DATMAN                          0x10B6
+#define HDMI_FC_DATAUTO3                        0x10B7
+#define HDMI_FC_RDRB0                           0x10B8
+#define HDMI_FC_RDRB1                           0x10B9
+#define HDMI_FC_RDRB2                           0x10BA
+#define HDMI_FC_RDRB3                           0x10BB
+#define HDMI_FC_RDRB4                           0x10BC
+#define HDMI_FC_RDRB5                           0x10BD
+#define HDMI_FC_RDRB6                           0x10BE
+#define HDMI_FC_RDRB7                           0x10BF
+#define HDMI_FC_STAT0                           0x10D0
+#define HDMI_FC_INT0                            0x10D1
+#define HDMI_FC_MASK0                           0x10D2
+#define HDMI_FC_POL0                            0x10D3
+#define HDMI_FC_STAT1                           0x10D4
+#define HDMI_FC_INT1                            0x10D5
+#define HDMI_FC_MASK1                           0x10D6
+#define HDMI_FC_POL1                            0x10D7
+#define HDMI_FC_STAT2                           0x10D8
+#define HDMI_FC_INT2                            0x10D9
+#define HDMI_FC_MASK2                           0x10DA
+#define HDMI_FC_POL2                            0x10DB
+#define HDMI_FC_PRCONF                          0x10E0
+#define HDMI_FC_SCRAMBLER_CTRL                  0x10E1
+
+#define HDMI_FC_GMD_STAT                        0x1100
+#define HDMI_FC_GMD_EN                          0x1101
+#define HDMI_FC_GMD_UP                          0x1102
+#define HDMI_FC_GMD_CONF                        0x1103
+#define HDMI_FC_GMD_HB                          0x1104
+#define HDMI_FC_GMD_PB0                         0x1105
+#define HDMI_FC_GMD_PB1                         0x1106
+#define HDMI_FC_GMD_PB2                         0x1107
+#define HDMI_FC_GMD_PB3                         0x1108
+#define HDMI_FC_GMD_PB4                         0x1109
+#define HDMI_FC_GMD_PB5                         0x110A
+#define HDMI_FC_GMD_PB6                         0x110B
+#define HDMI_FC_GMD_PB7                         0x110C
+#define HDMI_FC_GMD_PB8                         0x110D
+#define HDMI_FC_GMD_PB9                         0x110E
+#define HDMI_FC_GMD_PB10                        0x110F
+#define HDMI_FC_GMD_PB11                        0x1110
+#define HDMI_FC_GMD_PB12                        0x1111
+#define HDMI_FC_GMD_PB13                        0x1112
+#define HDMI_FC_GMD_PB14                        0x1113
+#define HDMI_FC_GMD_PB15                        0x1114
+#define HDMI_FC_GMD_PB16                        0x1115
+#define HDMI_FC_GMD_PB17                        0x1116
+#define HDMI_FC_GMD_PB18                        0x1117
+#define HDMI_FC_GMD_PB19                        0x1118
+#define HDMI_FC_GMD_PB20                        0x1119
+#define HDMI_FC_GMD_PB21                        0x111A
+#define HDMI_FC_GMD_PB22                        0x111B
+#define HDMI_FC_GMD_PB23                        0x111C
+#define HDMI_FC_GMD_PB24                        0x111D
+#define HDMI_FC_GMD_PB25                        0x111E
+#define HDMI_FC_GMD_PB26                        0x111F
+#define HDMI_FC_GMD_PB27                        0x1120
+
+#define HDMI_FC_DBGFORCE                        0x1200
+#define HDMI_FC_DBGAUD0CH0                      0x1201
+#define HDMI_FC_DBGAUD1CH0                      0x1202
+#define HDMI_FC_DBGAUD2CH0                      0x1203
+#define HDMI_FC_DBGAUD0CH1                      0x1204
+#define HDMI_FC_DBGAUD1CH1                      0x1205
+#define HDMI_FC_DBGAUD2CH1                      0x1206
+#define HDMI_FC_DBGAUD0CH2                      0x1207
+#define HDMI_FC_DBGAUD1CH2                      0x1208
+#define HDMI_FC_DBGAUD2CH2                      0x1209
+#define HDMI_FC_DBGAUD0CH3                      0x120A
+#define HDMI_FC_DBGAUD1CH3                      0x120B
+#define HDMI_FC_DBGAUD2CH3                      0x120C
+#define HDMI_FC_DBGAUD0CH4                      0x120D
+#define HDMI_FC_DBGAUD1CH4                      0x120E
+#define HDMI_FC_DBGAUD2CH4                      0x120F
+#define HDMI_FC_DBGAUD0CH5                      0x1210
+#define HDMI_FC_DBGAUD1CH5                      0x1211
+#define HDMI_FC_DBGAUD2CH5                      0x1212
+#define HDMI_FC_DBGAUD0CH6                      0x1213
+#define HDMI_FC_DBGAUD1CH6                      0x1214
+#define HDMI_FC_DBGAUD2CH6                      0x1215
+#define HDMI_FC_DBGAUD0CH7                      0x1216
+#define HDMI_FC_DBGAUD1CH7                      0x1217
+#define HDMI_FC_DBGAUD2CH7                      0x1218
+#define HDMI_FC_DBGTMDS0                        0x1219
+#define HDMI_FC_DBGTMDS1                        0x121A
+#define HDMI_FC_DBGTMDS2                        0x121B
+
+/* HDMI Source PHY Registers */
+#define HDMI_PHY_CONF0                          0x3000
+#define HDMI_PHY_TST0                           0x3001
+#define HDMI_PHY_TST1                           0x3002
+#define HDMI_PHY_TST2                           0x3003
+#define HDMI_PHY_STAT0                          0x3004
+#define HDMI_PHY_INT0                           0x3005
+#define HDMI_PHY_MASK0                          0x3006
+#define HDMI_PHY_POL0                           0x3007
+
+/* HDMI Master PHY Registers */
+#define HDMI_PHY_I2CM_SLAVE_ADDR                0x3020
+#define HDMI_PHY_I2CM_ADDRESS_ADDR              0x3021
+#define HDMI_PHY_I2CM_DATAO_1_ADDR              0x3022
+#define HDMI_PHY_I2CM_DATAO_0_ADDR              0x3023
+#define HDMI_PHY_I2CM_DATAI_1_ADDR              0x3024
+#define HDMI_PHY_I2CM_DATAI_0_ADDR              0x3025
+#define HDMI_PHY_I2CM_OPERATION_ADDR            0x3026
+#define HDMI_PHY_I2CM_INT_ADDR                  0x3027
+#define HDMI_PHY_I2CM_CTLINT_ADDR               0x3028
+#define HDMI_PHY_I2CM_DIV_ADDR                  0x3029
+#define HDMI_PHY_I2CM_SOFTRSTZ_ADDR             0x302a
+#define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR        0x302b
+#define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR        0x302c
+#define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR        0x302d
+#define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR        0x302e
+#define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR        0x302f
+#define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR        0x3030
+#define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR        0x3031
+#define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR        0x3032
+
+/* Audio Sampler Registers */
+#define HDMI_AUD_CONF0                          0x3100
+#define HDMI_AUD_CONF1                          0x3101
+#define HDMI_AUD_INT                            0x3102
+#define HDMI_AUD_CONF2                          0x3103
+#define HDMI_AUD_N1                             0x3200
+#define HDMI_AUD_N2                             0x3201
+#define HDMI_AUD_N3                             0x3202
+#define HDMI_AUD_CTS1                           0x3203
+#define HDMI_AUD_CTS2                           0x3204
+#define HDMI_AUD_CTS3                           0x3205
+#define HDMI_AUD_INPUTCLKFS                     0x3206
+#define HDMI_AUD_SPDIFINT			                  0x3302
+#define HDMI_AUD_CONF0_HBR                      0x3400
+#define HDMI_AUD_HBR_STATUS                     0x3401
+#define HDMI_AUD_HBR_INT                        0x3402
+#define HDMI_AUD_HBR_POL                        0x3403
+#define HDMI_AUD_HBR_MASK                       0x3404
+
+/*
+ * Generic Parallel Audio Interface Registers
+ * Not used as GPAUD interface is not enabled in hw
+ */
+#define HDMI_GP_CONF0                           0x3500
+#define HDMI_GP_CONF1                           0x3501
+#define HDMI_GP_CONF2                           0x3502
+#define HDMI_GP_STAT                            0x3503
+#define HDMI_GP_INT                             0x3504
+#define HDMI_GP_MASK                            0x3505
+#define HDMI_GP_POL                             0x3506
+
+/* Audio DMA Registers */
+#define HDMI_AHB_DMA_CONF0                      0x3600
+#define HDMI_AHB_DMA_START                      0x3601
+#define HDMI_AHB_DMA_STOP                       0x3602
+#define HDMI_AHB_DMA_THRSLD                     0x3603
+#define HDMI_AHB_DMA_STRADDR0                   0x3604
+#define HDMI_AHB_DMA_STRADDR1                   0x3605
+#define HDMI_AHB_DMA_STRADDR2                   0x3606
+#define HDMI_AHB_DMA_STRADDR3                   0x3607
+#define HDMI_AHB_DMA_STPADDR0                   0x3608
+#define HDMI_AHB_DMA_STPADDR1                   0x3609
+#define HDMI_AHB_DMA_STPADDR2                   0x360a
+#define HDMI_AHB_DMA_STPADDR3                   0x360b
+#define HDMI_AHB_DMA_BSTADDR0                   0x360c
+#define HDMI_AHB_DMA_BSTADDR1                   0x360d
+#define HDMI_AHB_DMA_BSTADDR2                   0x360e
+#define HDMI_AHB_DMA_BSTADDR3                   0x360f
+#define HDMI_AHB_DMA_MBLENGTH0                  0x3610
+#define HDMI_AHB_DMA_MBLENGTH1                  0x3611
+#define HDMI_AHB_DMA_STAT                       0x3612
+#define HDMI_AHB_DMA_INT                        0x3613
+#define HDMI_AHB_DMA_MASK                       0x3614
+#define HDMI_AHB_DMA_POL                        0x3615
+#define HDMI_AHB_DMA_CONF1                      0x3616
+#define HDMI_AHB_DMA_BUFFSTAT                   0x3617
+#define HDMI_AHB_DMA_BUFFINT                    0x3618
+#define HDMI_AHB_DMA_BUFFMASK                   0x3619
+#define HDMI_AHB_DMA_BUFFPOL                    0x361a
+
+/* Main Controller Registers */
+#define HDMI_MC_SFRDIV                          0x4000
+#define HDMI_MC_CLKDIS                          0x4001
+#define HDMI_MC_SWRSTZ                          0x4002
+#define HDMI_MC_OPCTRL                          0x4003
+#define HDMI_MC_FLOWCTRL                        0x4004
+#define HDMI_MC_PHYRSTZ                         0x4005
+#define HDMI_MC_LOCKONCLOCK                     0x4006
+#define HDMI_MC_HEACPHY_RST                     0x4007
+
+/* Color Space  Converter Registers */
+#define HDMI_CSC_CFG                            0x4100
+#define HDMI_CSC_SCALE                          0x4101
+#define HDMI_CSC_COEF_A1_MSB                    0x4102
+#define HDMI_CSC_COEF_A1_LSB                    0x4103
+#define HDMI_CSC_COEF_A2_MSB                    0x4104
+#define HDMI_CSC_COEF_A2_LSB                    0x4105
+#define HDMI_CSC_COEF_A3_MSB                    0x4106
+#define HDMI_CSC_COEF_A3_LSB                    0x4107
+#define HDMI_CSC_COEF_A4_MSB                    0x4108
+#define HDMI_CSC_COEF_A4_LSB                    0x4109
+#define HDMI_CSC_COEF_B1_MSB                    0x410A
+#define HDMI_CSC_COEF_B1_LSB                    0x410B
+#define HDMI_CSC_COEF_B2_MSB                    0x410C
+#define HDMI_CSC_COEF_B2_LSB                    0x410D
+#define HDMI_CSC_COEF_B3_MSB                    0x410E
+#define HDMI_CSC_COEF_B3_LSB                    0x410F
+#define HDMI_CSC_COEF_B4_MSB                    0x4110
+#define HDMI_CSC_COEF_B4_LSB                    0x4111
+#define HDMI_CSC_COEF_C1_MSB                    0x4112
+#define HDMI_CSC_COEF_C1_LSB                    0x4113
+#define HDMI_CSC_COEF_C2_MSB                    0x4114
+#define HDMI_CSC_COEF_C2_LSB                    0x4115
+#define HDMI_CSC_COEF_C3_MSB                    0x4116
+#define HDMI_CSC_COEF_C3_LSB                    0x4117
+#define HDMI_CSC_COEF_C4_MSB                    0x4118
+#define HDMI_CSC_COEF_C4_LSB                    0x4119
+
+/* HDCP Encryption Engine Registers */
+#define HDMI_A_HDCPCFG0                         0x5000
+#define HDMI_A_HDCPCFG1                         0x5001
+#define HDMI_A_HDCPOBS0                         0x5002
+#define HDMI_A_HDCPOBS1                         0x5003
+#define HDMI_A_HDCPOBS2                         0x5004
+#define HDMI_A_HDCPOBS3                         0x5005
+#define HDMI_A_APIINTCLR                        0x5006
+#define HDMI_A_APIINTSTAT                       0x5007
+#define HDMI_A_APIINTMSK                        0x5008
+#define HDMI_A_VIDPOLCFG                        0x5009
+#define HDMI_A_OESSWCFG                         0x500A
+#define HDMI_A_TIMER1SETUP0                     0x500B
+#define HDMI_A_TIMER1SETUP1                     0x500C
+#define HDMI_A_TIMER2SETUP0                     0x500D
+#define HDMI_A_TIMER2SETUP1                     0x500E
+#define HDMI_A_100MSCFG                         0x500F
+#define HDMI_A_2SCFG0                           0x5010
+#define HDMI_A_2SCFG1                           0x5011
+#define HDMI_A_5SCFG0                           0x5012
+#define HDMI_A_5SCFG1                           0x5013
+#define HDMI_A_SRMVERLSB                        0x5014
+#define HDMI_A_SRMVERMSB                        0x5015
+#define HDMI_A_SRMCTRL                          0x5016
+#define HDMI_A_SFRSETUP                         0x5017
+#define HDMI_A_I2CHSETUP                        0x5018
+#define HDMI_A_INTSETUP                         0x5019
+#define HDMI_A_PRESETUP                         0x501A
+#define HDMI_A_SRM_BASE                         0x5020
+
+/* CEC Engine Registers */
+#define HDMI_CEC_CTRL                           0x7D00
+#define HDMI_CEC_STAT                           0x7D01
+#define HDMI_CEC_MASK                           0x7D02
+#define HDMI_CEC_POLARITY                       0x7D03
+#define HDMI_CEC_INT                            0x7D04
+#define HDMI_CEC_ADDR_L                         0x7D05
+#define HDMI_CEC_ADDR_H                         0x7D06
+#define HDMI_CEC_TX_CNT                         0x7D07
+#define HDMI_CEC_RX_CNT                         0x7D08
+#define HDMI_CEC_TX_DATA0                       0x7D10
+#define HDMI_CEC_TX_DATA1                       0x7D11
+#define HDMI_CEC_TX_DATA2                       0x7D12
+#define HDMI_CEC_TX_DATA3                       0x7D13
+#define HDMI_CEC_TX_DATA4                       0x7D14
+#define HDMI_CEC_TX_DATA5                       0x7D15
+#define HDMI_CEC_TX_DATA6                       0x7D16
+#define HDMI_CEC_TX_DATA7                       0x7D17
+#define HDMI_CEC_TX_DATA8                       0x7D18
+#define HDMI_CEC_TX_DATA9                       0x7D19
+#define HDMI_CEC_TX_DATA10                      0x7D1a
+#define HDMI_CEC_TX_DATA11                      0x7D1b
+#define HDMI_CEC_TX_DATA12                      0x7D1c
+#define HDMI_CEC_TX_DATA13                      0x7D1d
+#define HDMI_CEC_TX_DATA14                      0x7D1e
+#define HDMI_CEC_TX_DATA15                      0x7D1f
+#define HDMI_CEC_RX_DATA0                       0x7D20
+#define HDMI_CEC_RX_DATA1                       0x7D21
+#define HDMI_CEC_RX_DATA2                       0x7D22
+#define HDMI_CEC_RX_DATA3                       0x7D23
+#define HDMI_CEC_RX_DATA4                       0x7D24
+#define HDMI_CEC_RX_DATA5                       0x7D25
+#define HDMI_CEC_RX_DATA6                       0x7D26
+#define HDMI_CEC_RX_DATA7                       0x7D27
+#define HDMI_CEC_RX_DATA8                       0x7D28
+#define HDMI_CEC_RX_DATA9                       0x7D29
+#define HDMI_CEC_RX_DATA10                      0x7D2a
+#define HDMI_CEC_RX_DATA11                      0x7D2b
+#define HDMI_CEC_RX_DATA12                      0x7D2c
+#define HDMI_CEC_RX_DATA13                      0x7D2d
+#define HDMI_CEC_RX_DATA14                      0x7D2e
+#define HDMI_CEC_RX_DATA15                      0x7D2f
+#define HDMI_CEC_LOCK                           0x7D30
+#define HDMI_CEC_WKUPCTRL                       0x7D31
+
+/* I2C Master Registers (E-DDC) */
+#define HDMI_I2CM_SLAVE                         0x7E00
+#define HDMI_I2CM_ADDRESS                       0x7E01
+#define HDMI_I2CM_DATAO                         0x7E02
+#define HDMI_I2CM_DATAI                         0x7E03
+#define HDMI_I2CM_OPERATION                     0x7E04
+#define HDMI_I2CM_INT                           0x7E05
+#define HDMI_I2CM_CTLINT                        0x7E06
+#define HDMI_I2CM_DIV                           0x7E07
+#define HDMI_I2CM_SEGADDR                       0x7E08
+#define HDMI_I2CM_SOFTRSTZ                      0x7E09
+#define HDMI_I2CM_SEGPTR                        0x7E0A
+#define HDMI_I2CM_SS_SCL_HCNT_1_ADDR            0x7E0B
+#define HDMI_I2CM_SS_SCL_HCNT_0_ADDR            0x7E0C
+#define HDMI_I2CM_SS_SCL_LCNT_1_ADDR            0x7E0D
+#define HDMI_I2CM_SS_SCL_LCNT_0_ADDR            0x7E0E
+#define HDMI_I2CM_FS_SCL_HCNT_1_ADDR            0x7E0F
+#define HDMI_I2CM_FS_SCL_HCNT_0_ADDR            0x7E10
+#define HDMI_I2CM_FS_SCL_LCNT_1_ADDR            0x7E11
+#define HDMI_I2CM_FS_SCL_LCNT_0_ADDR            0x7E12
+#define HDMI_I2CM_SDA_HOLD                      0x7E13
+#define HDMI_I2CM_SCDC_READ_UPDATE              0x7E14
+#define HDMI_I2CM_READ_REQ_EN_MSK               BIT(4)
+#define HDMI_I2CM_READ_REQ_EN_OFFSET            4
+#define HDMI_I2CM_READ_UPDATE_MSK               BIT(0)
+#define HDMI_I2CM_READ_UPDATE_OFFSET            0
+#define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_MSK        BIT(5)
+#define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_OFFSET     5
+#define	HDMI_I2CM_READ_BUFF0                    0x7E20
+#define	HDMI_I2CM_SCDC_UPDATE0                  0x7E30
+#define	HDMI_I2CM_SCDC_UPDATE1                  0x7E31
+#define DDC_I2C_EDID_ADDR                       0x50
+#define DDC_I2C_SEG_ADDR                        0x30
+#define DDC_I2C_SCDC_ADDR                       0x54
+#define HDMI_EDID_BLOCK_SIZE                    128
+#define EDID_I2C_MIN_SS_SCL_HIGH_TIME           9625
+#define EDID_I2C_MIN_SS_SCL_LOW_TIME            10000
+#define I2C_DIV_FACTOR                          1000000
+
+/* SCDC Registers */
+#define SCDC_SINK_VERSION 0x01
+#define SCDC_SOURCE_VERSION 0x02
+
+#define SCDC_UPDATE_0 0x10
+#define SCDC_READ_REQUEST_TEST BIT(2)
+#define SCDC_CED_UPDATE BIT(1)
+#define SCDC_STATUS_UPDATE BIT(0)
+#define SCDC_UPDATE_1 0x11
+
+#define SCDC_TMDS_CONFIG 0x20
+#define SCDC_TMDS_BIT_CLOCK_RATIO_BY_40 BIT(1)
+#define SCDC_TMDS_BIT_CLOCK_RATIO_BY_10 (0 << 1)
+#define SCDC_SCRAMBLING_ENABLE BIT(0)
+#define SCDC_SCRAMBLER_STATUS 0x21
+#define SCDC_SCRAMBLING_STATUS BIT(0)
+
+#define SCDC_CONFIG_0 0x30
+#define SCDC_READ_REQUEST_ENABLE BIT(0)
+
+#define SCDC_STATUS_FLAGS_0 0x40
+#define SCDC_CH2_LOCK BIT(3)
+#define SCDC_CH1_LOCK BIT(2)
+#define SCDC_CH0_LOCK BIT(1)
+#define SCDC_CH_LOCK_MASK (SCDC_CH2_LOCK | SCDC_CH1_LOCK | SCDC_CH0_LOCK)
+#define SCDC_CLOCK_DETECT BIT(0)
+#define SCDC_STATUS_FLAGS_1 0x41
+
+#define SCDC_ERR_DET_0_L 0x50
+#define SCDC_ERR_DET_0_H 0x51
+#define SCDC_ERR_DET_1_L 0x52
+#define SCDC_ERR_DET_1_H 0x53
+#define SCDC_ERR_DET_2_L 0x54
+#define SCDC_ERR_DET_2_H 0x55
+#define SCDC_CHANNEL_VALID BIT(7)
+#define SCDC_ERR_DET_CHECKSUM 0x56
+
+#define SCDC_TEST_CONFIG_0 0xc0
+#define SCDC_TEST_READ_REQUEST BIT(7)
+#define SCDC_TEST_READ_REQUEST_DELAY(x) ((x) & 0x7f)
+
+#define SCDC_MANUFACTURER_IEEE_OUI 0xd0
+#define SCDC_MANUFACTURER_IEEE_OUI_SIZE 3
+#define SCDC_DEVICE_ID 0xd3
+#define SCDC_DEVICE_ID_SIZE 8
+#define SCDC_DEVICE_HARDWARE_REVISION 0xdb
+#define SCDC_DEVICE_HARDWARE_REVISION_MAJOR(x) (((x) >> 4) & 0xf)
+#define SCDC_DEVICE_HARDWARE_REVISION_MINOR(x) (((x) >> 0) & 0xf)
+#define SCDC_DEVICE_SOFTWARE_MAJOR_REVISION 0xdc
+#define SCDC_DEVICE_SOFTWARE_MINOR_REVISION 0xdd
+
+#define SCDC_MANUFACTURER_SPECIFIC 0xde
+#define SCDC_MANUFACTURER_SPECIFIC_SIZE 34
+
+enum {
+/* PRODUCT_ID0 field values */
+	HDMI_PRODUCT_ID0_HDMI_TX = 0xa0,
+
+/* PRODUCT_ID1 field values */
+	HDMI_PRODUCT_ID1_HDCP = 0xc0,
+	HDMI_PRODUCT_ID1_HDMI_RX = 0x02,
+	HDMI_PRODUCT_ID1_HDMI_TX = 0x01,
+
+/* CONFIG0_ID field values */
+	HDMI_CONFIG0_I2S = 0x10,
+
+/* CONFIG1_ID field values */
+	HDMI_CONFIG1_AHB = 0x01,
+
+/* CONFIG3_ID field values */
+	HDMI_CONFIG3_AHBAUDDMA = 0x02,
+	HDMI_CONFIG3_GPAUD = 0x01,
+
+/* IH_FC_INT2 field values */
+	HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,
+	HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* IH_FC_STAT2 field values */
+	HDMI_IH_FC_STAT2_OVERFLOW_MASK = 0x03,
+	HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* IH_PHY_STAT0 field values */
+	HDMI_IH_PHY_STAT0_RX_SENSE3 = 0x20,
+	HDMI_IH_PHY_STAT0_RX_SENSE2 = 0x10,
+	HDMI_IH_PHY_STAT0_RX_SENSE1 = 0x8,
+	HDMI_IH_PHY_STAT0_RX_SENSE0 = 0x4,
+	HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2,
+	HDMI_IH_PHY_STAT0_HPD = 0x1,
+
+/* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */
+	HDMI_IH_I2CM_STAT0_DONE = 0x2,
+	HDMI_IH_I2CM_STAT0_ERROR = 0x1,
+
+/* IH_MUTE_I2CMPHY_STAT0 field values */
+	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2,
+	HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1,
+
+/* IH_AHBDMAAUD_STAT0 field values */
+	HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20,
+	HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10,
+	HDMI_IH_AHBDMAAUD_STAT0_RETRY = 0x08,
+	HDMI_IH_AHBDMAAUD_STAT0_DONE = 0x04,
+	HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
+	HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
+
+/* IH_MUTE_FC_STAT2 field values */
+	HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK = 0x03,
+	HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* IH_MUTE_AHBDMAAUD_STAT0 field values */
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = 0x20,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = 0x10,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = 0x08,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = 0x04,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = 0x02,
+	HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01,
+
+/* IH_MUTE field values */
+	HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2,
+	HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1,
+
+/* TX_INVID0 field values */
+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK = 0x80,
+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE = 0x80,
+	HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00,
+	HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1F,
+	HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0,
+
+/* TX_INSTUFFING field values */
+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK = 0x4,
+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4,
+	HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE = 0x0,
+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK = 0x2,
+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2,
+	HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE = 0x0,
+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK = 0x1,
+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1,
+	HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE = 0x0,
+
+/* VP_PR_CD field values */
+	HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xF0,
+	HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4,
+	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0F,
+	HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0,
+
+/* VP_STUFF field values */
+	HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20,
+	HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5,
+	HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK = 0x10,
+	HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET = 4,
+	HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK = 0x8,
+	HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET = 3,
+	HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4,
+	HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4,
+	HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE = 0x0,
+	HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2,
+	HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2,
+	HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE = 0x0,
+	HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1,
+	HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1,
+	HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE = 0x0,
+
+/* VP_CONF field values */
+	HDMI_VP_CONF_BYPASS_EN_MASK = 0x40,
+	HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40,
+	HDMI_VP_CONF_BYPASS_EN_DISABLE = 0x00,
+	HDMI_VP_CONF_PP_EN_ENMASK = 0x20,
+	HDMI_VP_CONF_PP_EN_ENABLE = 0x20,
+	HDMI_VP_CONF_PP_EN_DISABLE = 0x00,
+	HDMI_VP_CONF_PR_EN_MASK = 0x10,
+	HDMI_VP_CONF_PR_EN_ENABLE = 0x10,
+	HDMI_VP_CONF_PR_EN_DISABLE = 0x00,
+	HDMI_VP_CONF_YCC422_EN_MASK = 0x8,
+	HDMI_VP_CONF_YCC422_EN_ENABLE = 0x8,
+	HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0,
+	HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4,
+	HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4,
+	HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER = 0x0,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 = 0x1,
+	HDMI_VP_CONF_OUTPUT_SELECTOR_PP = 0x0,
+
+/* VP_REMAP field values */
+	HDMI_VP_REMAP_MASK = 0x3,
+	HDMI_VP_REMAP_YCC422_24bit = 0x2,
+	HDMI_VP_REMAP_YCC422_20bit = 0x1,
+	HDMI_VP_REMAP_YCC422_16bit = 0x0,
+
+/* FC_INVIDCONF field values */
+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,
+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,
+	HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,
+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,
+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,
+	HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20,
+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20,
+	HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10,
+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10,
+	HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00,
+	HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8,
+	HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8,
+	HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0,
+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2,
+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2,
+	HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0,
+	HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1,
+	HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1,
+	HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0,
+
+/* FC_AUDICONF0 field values */
+	HDMI_FC_AUDICONF0_CC_OFFSET = 4,
+	HDMI_FC_AUDICONF0_CC_MASK = 0x70,
+	HDMI_FC_AUDICONF0_CT_OFFSET = 0,
+	HDMI_FC_AUDICONF0_CT_MASK = 0xF,
+
+/* FC_AUDICONF1 field values */
+	HDMI_FC_AUDICONF1_SS_OFFSET = 3,
+	HDMI_FC_AUDICONF1_SS_MASK = 0x18,
+	HDMI_FC_AUDICONF1_SF_OFFSET = 0,
+	HDMI_FC_AUDICONF1_SF_MASK = 0x7,
+
+/* FC_AUDICONF3 field values */
+	HDMI_FC_AUDICONF3_LFEPBL_OFFSET = 5,
+	HDMI_FC_AUDICONF3_LFEPBL_MASK = 0x60,
+	HDMI_FC_AUDICONF3_DM_INH_OFFSET = 4,
+	HDMI_FC_AUDICONF3_DM_INH_MASK = 0x10,
+	HDMI_FC_AUDICONF3_LSV_OFFSET = 0,
+	HDMI_FC_AUDICONF3_LSV_MASK = 0xF,
+
+/* FC_AUDSCHNLS0 field values */
+	HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS0_CGMSA_MASK = 0x30,
+	HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK = 0x01,
+
+/* FC_AUDSCHNLS3-6 field values */
+	HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK = 0xf0,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK = 0xf0,
+
+	HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK = 0xf0,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK = 0xf0,
+
+/* HDMI_FC_AUDSCHNLS7 field values */
+	HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30,
+	HDMI_FC_AUDSCHNLS7_SAMPFREQ_OFFSET = 0,
+	HDMI_FC_AUDSCHNLS7_SAMPFREQ_MASK = 0x0f,
+
+/* HDMI_FC_AUDSCHNLS8 field values */
+	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0,
+	HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET = 4,
+	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f,
+	HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0,
+
+/* HDMI_FC_AUDSCHNLS Sample Rate */
+	HDMI_FC_AUDSCHNLS_32K = 0x3,
+	HDMI_FC_AUDSCHNLS_441K = 0x0,
+	HDMI_FC_AUDSCHNLS_48K = 0x2,
+	HDMI_FC_AUDSCHNLS_882K = 0x8,
+	HDMI_FC_AUDSCHNLS_96K = 0xa,
+	HDMI_FC_AUDSCHNLS_1764K = 0xc,
+	HDMI_FC_AUDSCHNLS_192K = 0xe,
+
+/* FC_AUDSCONF field values */
+	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0,
+	HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK = 0x1,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET = 0,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1 = 0x1,
+	HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0 = 0x0,
+
+/* FC_STAT2 field values */
+	HDMI_FC_STAT2_OVERFLOW_MASK = 0x03,
+	HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* FC_INT2 field values */
+	HDMI_FC_INT2_OVERFLOW_MASK = 0x03,
+	HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* FC_MASK2 field values */
+	HDMI_FC_MASK2_OVERFLOW_MASK = 0x03,
+	HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW = 0x02,
+	HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW = 0x01,
+
+/* FC_PRCONF field values */
+	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK = 0xF0,
+	HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET = 4,
+	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F,
+	HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0,
+
+/* FC_AVICONF0-FC_AVICONF3 field values */
+	HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03,
+	HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00,
+	HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01,
+	HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02,
+	HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40,
+	HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40,
+	HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00,
+	HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C,
+	HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00,
+	HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04,
+	HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08,
+	HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C,
+	HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30,
+	HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10,
+	HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20,
+	HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00,
+
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A,
+	HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10,
+	HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20,
+	HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xC0,
+	HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00,
+	HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40,
+	HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80,
+	HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xC0,
+
+	HDMI_FC_AVICONF2_SCALING_MASK = 0x03,
+	HDMI_FC_AVICONF2_SCALING_NONE = 0x00,
+	HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01,
+	HDMI_FC_AVICONF2_SCALING_VERT = 0x02,
+	HDMI_FC_AVICONF2_SCALING_HORIZ_VERT = 0x03,
+	HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0C,
+	HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00,
+	HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04,
+	HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30,
+	HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40,
+	HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80,
+	HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00,
+	HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80,
+
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02,
+	HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03,
+	HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C,
+	HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00,
+	HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04,
+
+/* FC_DBGFORCE field values */
+	HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10,
+	HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1,
+
+/* FC_DATAUTO0 field values */
+	HDMI_FC_DATAUTO0_VSD_MASK = 0x08,
+	HDMI_FC_DATAUTO0_VSD_OFFSET = 3,
+
+/* PHY_CONF0 field values */
+	HDMI_PHY_CONF0_PDZ_MASK = 0x80,
+	HDMI_PHY_CONF0_PDZ_OFFSET = 7,
+	HDMI_PHY_CONF0_ENTMDS_MASK = 0x40,
+	HDMI_PHY_CONF0_ENTMDS_OFFSET = 6,
+	HDMI_PHY_CONF0_SVSRET_MASK = 0x20,
+	HDMI_PHY_CONF0_SVSRET_OFFSET = 5,
+	HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10,
+	HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4,
+	HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8,
+	HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3,
+	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK = 0x4,
+	HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET = 2,
+	HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2,
+	HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1,
+	HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1,
+	HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0,
+
+/* PHY_TST0 field values */
+	HDMI_PHY_TST0_TSTCLR_MASK = 0x20,
+	HDMI_PHY_TST0_TSTCLR_OFFSET = 5,
+	HDMI_PHY_TST0_TSTEN_MASK = 0x10,
+	HDMI_PHY_TST0_TSTEN_OFFSET = 4,
+	HDMI_PHY_TST0_TSTCLK_MASK = 0x1,
+	HDMI_PHY_TST0_TSTCLK_OFFSET = 0,
+
+/* PHY_STAT0 field values */
+	HDMI_PHY_RX_SENSE3 = 0x80,
+	HDMI_PHY_RX_SENSE2 = 0x40,
+	HDMI_PHY_RX_SENSE1 = 0x20,
+	HDMI_PHY_RX_SENSE0 = 0x10,
+	HDMI_PHY_HPD = 0x02,
+	HDMI_PHY_TX_PHY_LOCK = 0x01,
+
+/* PHY_I2CM_SLAVE_ADDR field values */
+	HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69,
+	HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49,
+
+/* PHY_I2CM_OPERATION_ADDR field values */
+	HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10,
+	HDMI_PHY_I2CM_OPERATION_ADDR_READ = 0x1,
+
+/* HDMI_PHY_I2CM_INT_ADDR */
+	HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08,
+	HDMI_PHY_I2CM_INT_ADDR_DONE_MASK = 0x04,
+
+/* HDMI_PHY_I2CM_CTLINT_ADDR */
+	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80,
+	HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK = 0x40,
+	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08,
+	HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04,
+
+/* AUD_CONF0 field values */
+	HDMI_AUD_CONF0_SW_RESET = 0x80,
+	HDMI_AUD_CONF0_I2S_2CHANNEL_ENABLE = 0x21,
+	HDMI_AUD_CONF0_I2S_4CHANNEL_ENABLE = 0x23,
+	HDMI_AUD_CONF0_I2S_6CHANNEL_ENABLE = 0x27,
+	HDMI_AUD_CONF0_I2S_8CHANNEL_ENABLE = 0x2F,
+	HDMI_AUD_CONF0_I2S_ALL_ENABLE = 0x2F,
+
+/* AUD_INT field values */
+	HDMI_AUD_INT_FIFO_EMPTY_MSK = BIT(3),
+	HDMI_AUD_INT_FIFO_FULL_MSK = BIT(2),
+
+/* AUD_CONF1 field values */
+	HDMI_AUD_CONF1_MODE_I2S = 0x00,
+	HDMI_AUD_CONF1_MODE_RIGHT_J = 0x02,
+	HDMI_AUD_CONF1_MODE_LEFT_J = 0x04,
+	HDMI_AUD_CONF1_WIDTH_16 = 0x10,
+	HDMI_AUD_CONF1_WIDTH_21 = 0x15,
+	HDMI_AUD_CONF1_WIDTH_24 = 0x18,
+
+/* AUD_CONF2 filed values */
+	HDMI_AUD_CONF2_HBR = 0x1,
+	HDMI_AUD_CONF2_NLPCM = 0x2,
+	HDMI_AUD_CONF2_INSERT_PCUV = 0x04,
+
+/* AUD_CTS3 field values */
+	HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
+	HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,
+	HDMI_AUD_CTS3_N_SHIFT_1 = 0,
+	HDMI_AUD_CTS3_N_SHIFT_16 = 0x20,
+	HDMI_AUD_CTS3_N_SHIFT_32 = 0x40,
+	HDMI_AUD_CTS3_N_SHIFT_64 = 0x60,
+	HDMI_AUD_CTS3_N_SHIFT_128 = 0x80,
+	HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0,
+	/* note that the CTS3 MANUAL bit has been removed from our part. */
+	HDMI_AUD_CTS3_CTS_MANUAL = 0x10,
+	HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f,
+
+/* HDMI_AUD_INPUTCLKFS field values */
+	HDMI_AUD_INPUTCLKFS_128FS = 0,
+	HDMI_AUD_INPUTCLKFS_256FS = 1,
+	HDMI_AUD_INPUTCLKFS_512FS = 2,
+	HDMI_AUD_INPUTCLKFS_64FS = 4,
+
+/* AHB_DMA_CONF0 field values */
+	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7,
+	HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80,
+	HDMI_AHB_DMA_CONF0_HBR = 0x10,
+	HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET = 3,
+	HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK = 0x08,
+	HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET = 1,
+	HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK = 0x06,
+	HDMI_AHB_DMA_CONF0_INCR4 = 0x0,
+	HDMI_AHB_DMA_CONF0_INCR8 = 0x2,
+	HDMI_AHB_DMA_CONF0_INCR16 = 0x4,
+	HDMI_AHB_DMA_CONF0_BURST_MODE = 0x1,
+
+/* HDMI_AHB_DMA_START field values */
+	HDMI_AHB_DMA_START_START_OFFSET = 0,
+	HDMI_AHB_DMA_START_START_MASK = 0x01,
+
+/* HDMI_AHB_DMA_STOP field values */
+	HDMI_AHB_DMA_STOP_STOP_OFFSET = 0,
+	HDMI_AHB_DMA_STOP_STOP_MASK = 0x01,
+
+/* AHB_DMA_STAT, AHB_DMA_INT, AHB_DMA_MASK, AHB_DMA_POL field values */
+	HDMI_AHB_DMA_DONE = 0x80,
+	HDMI_AHB_DMA_RETRY_SPLIT = 0x40,
+	HDMI_AHB_DMA_LOSTOWNERSHIP = 0x20,
+	HDMI_AHB_DMA_ERROR = 0x10,
+	HDMI_AHB_DMA_FIFO_THREMPTY = 0x04,
+	HDMI_AHB_DMA_FIFO_FULL = 0x02,
+	HDMI_AHB_DMA_FIFO_EMPTY = 0x01,
+
+/* AHB_DMA_BUFFSTAT, AHB_DMA_BUFFINT,AHB_DMA_BUFFMASK,AHB_DMA_BUFFPOL values */
+	HDMI_AHB_DMA_BUFFSTAT_FULL = 0x02,
+	HDMI_AHB_DMA_BUFFSTAT_EMPTY = 0x01,
+
+/* MC_CLKDIS field values */
+	HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40,
+	HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20,
+	HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10,
+	HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,
+	HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4,
+	HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,
+	HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,
+
+/* MC_SWRSTZ field values */
+	HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02,
+
+/* MC_FLOWCTRL field values */
+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK = 0x1,
+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1,
+	HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0,
+
+/* MC_PHYRSTZ field values */
+	HDMI_MC_PHYRSTZ_PHYRSTZ = 0x01,
+
+/* MC_HEACPHY_RST field values */
+	HDMI_MC_HEACPHY_RST_ASSERT = 0x1,
+	HDMI_MC_HEACPHY_RST_DEASSERT = 0x0,
+
+/* CSC_CFG field values */
+	HDMI_CSC_CFG_INTMODE_MASK = 0x30,
+	HDMI_CSC_CFG_INTMODE_OFFSET = 4,
+	HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,
+	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10,
+	HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20,
+	HDMI_CSC_CFG_DECMODE_MASK = 0x3,
+	HDMI_CSC_CFG_DECMODE_OFFSET = 0,
+	HDMI_CSC_CFG_DECMODE_DISABLE = 0x0,
+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1,
+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2,
+	HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3,
+
+/* CSC_SCALE field values */
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,
+	HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,
+	HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,
+
+/* A_HDCPCFG0 field values */
+	HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80,
+	HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80,
+	HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40,
+	HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40,
+	HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20,
+	HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20,
+	HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10,
+	HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10,
+	HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00,
+	HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8,
+	HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8,
+	HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0,
+	HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4,
+	HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4,
+	HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0,
+	HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2,
+	HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2,
+	HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0,
+	HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1,
+	HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1,
+	HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0,
+
+/* A_HDCPCFG1 field values */
+	HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8,
+	HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8,
+	HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0,
+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4,
+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4,
+	HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0,
+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2,
+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2,
+	HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0,
+	HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1,
+	HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0,
+
+/* A_VIDPOLCFG field values */
+	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60,
+	HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5,
+	HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10,
+	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10,
+	HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0,
+	HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8,
+	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8,
+	HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0,
+	HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
+	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
+	HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
+
+/* I2CM_OPERATION field values */
+	HDMI_I2CM_OPERATION_WRITE = 0x10,
+	HDMI_I2CM_OPERATION_READ8_EXT = 0x8,
+	HDMI_I2CM_OPERATION_READ8 = 0x4,
+	HDMI_I2CM_OPERATION_READ_EXT = 0x2,
+	HDMI_I2CM_OPERATION_READ = 0x1,
+
+/* I2CM_INT field values */
+	HDMI_I2CM_INT_DONE_POL = 0x8,
+	HDMI_I2CM_INT_DONE_MASK = 0x4,
+
+/* I2CM_CTLINT field values */
+	HDMI_I2CM_CTLINT_NAC_POL = 0x80,
+	HDMI_I2CM_CTLINT_NAC_MASK = 0x40,
+	HDMI_I2CM_CTLINT_ARB_POL = 0x8,
+	HDMI_I2CM_CTLINT_ARB_MASK = 0x4,
+
+/* I2CM_DIV field values */
+	HDMI_I2CM_DIV_FAST_STD_MODE = 0x8,
+	HDMI_I2CM_DIV_FAST_MODE = 0x8,
+	HDMI_I2CM_DIV_STD_MODE = 0,
+
+/* HDMI_MC_SWRSTZ filed values */
+	HDMI_MC_SWRSTZ_I2S_RESET_MSK = BIT(3),
+};
+
+/*
+ * HDMI 3D TX PHY registers
+ */
+#define HDMI_3D_TX_PHY_PWRCTRL			0x00
+#define HDMI_3D_TX_PHY_SERDIVCTRL		0x01
+#define HDMI_3D_TX_PHY_SERCKCTRL		0x02
+#define HDMI_3D_TX_PHY_SERCKKILLCTRL		0x03
+#define HDMI_3D_TX_PHY_TXRESCTRL		0x04
+#define HDMI_3D_TX_PHY_CKCALCTRL		0x05
+#define HDMI_3D_TX_PHY_CPCE_CTRL		0x06
+#define HDMI_3D_TX_PHY_TXCLKMEASCTRL		0x07
+#define HDMI_3D_TX_PHY_TXMEASCTRL		0x08
+#define HDMI_3D_TX_PHY_CKSYMTXCTRL		0x09
+#define HDMI_3D_TX_PHY_CMPSEQCTRL		0x0a
+#define HDMI_3D_TX_PHY_CMPPWRCTRL		0x0b
+#define HDMI_3D_TX_PHY_CMPMODECTRL		0x0c
+#define HDMI_3D_TX_PHY_MEASCTRL			0x0d
+#define HDMI_3D_TX_PHY_VLEVCTRL			0x0e
+#define HDMI_3D_TX_PHY_D2ACTRL			0x0f
+#define HDMI_3D_TX_PHY_CURRCTRL			0x10
+#define HDMI_3D_TX_PHY_DRVANACTRL		0x11
+#define HDMI_3D_TX_PHY_PLLMEASCTRL		0x12
+#define HDMI_3D_TX_PHY_PLLPHBYCTRL		0x13
+#define HDMI_3D_TX_PHY_GRP_CTRL			0x14
+#define HDMI_3D_TX_PHY_GMPCTRL			0x15
+#define HDMI_3D_TX_PHY_MPLLMEASCTRL		0x16
+#define HDMI_3D_TX_PHY_MSM_CTRL			0x17
+#define HDMI_3D_TX_PHY_SCRPB_STATUS		0x18
+#define HDMI_3D_TX_PHY_TXTERM			0x19
+#define HDMI_3D_TX_PHY_PTRPT_ENBL		0x1a
+#define HDMI_3D_TX_PHY_PATTERNGEN		0x1b
+#define HDMI_3D_TX_PHY_SDCAP_MODE		0x1c
+#define HDMI_3D_TX_PHY_SCOPEMODE		0x1d
+#define HDMI_3D_TX_PHY_DIGTXMODE		0x1e
+#define HDMI_3D_TX_PHY_STR_STATUS		0x1f
+#define HDMI_3D_TX_PHY_SCOPECNT0		0x20
+#define HDMI_3D_TX_PHY_SCOPECNT1		0x21
+#define HDMI_3D_TX_PHY_SCOPECNT2		0x22
+#define HDMI_3D_TX_PHY_SCOPECNTCLK		0x23
+#define HDMI_3D_TX_PHY_SCOPESAMPLE		0x24
+#define HDMI_3D_TX_PHY_SCOPECNTMSB01		0x25
+#define HDMI_3D_TX_PHY_SCOPECNTMSB2CK		0x26
+
+/* HDMI_3D_TX_PHY_CKCALCTRL values */
+#define HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE		BIT(15)
+
+/* HDMI_3D_TX_PHY_MSM_CTRL values */
+#define HDMI_3D_TX_PHY_MSM_CTRL_MPLL_PH_SEL_CK		BIT(13)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_CLK_REF_MPLL	(0 << 1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_OFF		BIT(1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_PCLK		(2 << 1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK		(3 << 1)
+#define HDMI_3D_TX_PHY_MSM_CTRL_SCOPE_CK_SEL		BIT(0)
+
+/* HDMI_3D_TX_PHY_PTRPT_ENBL values */
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_OVERRIDE		BIT(15)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT2		BIT(8)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT1		BIT(7)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT0		BIT(6)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CK_REF_ENB		BIT(5)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_RCAL_ENB		BIT(4)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_CLK_ALIGN_ENB	BIT(3)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_READY		BIT(2)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_CKO_WORD_ENB		BIT(1)
+#define HDMI_3D_TX_PHY_PTRPT_ENBL_REFCLK_ENB		BIT(0)
+
+#define HDMI_VIDEO_DEFAULT_MODE 4
+
+enum v4l2_ycbcr_encoding {
+	/*
+	 * Mapping of V4L2_YCBCR_ENC_DEFAULT to actual encodings for the
+	 * various colorspaces:
+	 *
+	 * V4L2_COLORSPACE_SMPTE170M, V4L2_COLORSPACE_470_SYSTEM_M,
+	 * V4L2_COLORSPACE_470_SYSTEM_BG, V4L2_COLORSPACE_ADOBERGB and
+	 * V4L2_COLORSPACE_JPEG: V4L2_YCBCR_ENC_601
+	 *
+	 * V4L2_COLORSPACE_REC709 and V4L2_COLORSPACE_DCI_P3: V4L2_YCBCR_ENC_709
+	 *
+	 * V4L2_COLORSPACE_SRGB: V4L2_YCBCR_ENC_SYCC
+	 *
+	 * V4L2_COLORSPACE_BT2020: V4L2_YCBCR_ENC_BT2020
+	 *
+	 * V4L2_COLORSPACE_SMPTE240M: V4L2_YCBCR_ENC_SMPTE240M
+	 */
+	V4L2_YCBCR_ENC_DEFAULT        = 0,
+
+	/* ITU-R 601 -- SDTV */
+	V4L2_YCBCR_ENC_601            = 1,
+
+	/* Rec. 709 -- HDTV */
+	V4L2_YCBCR_ENC_709            = 2,
+
+	/* ITU-R 601/EN 61966-2-4 Extended Gamut -- SDTV */
+	V4L2_YCBCR_ENC_XV601          = 3,
+
+	/* Rec. 709/EN 61966-2-4 Extended Gamut -- HDTV */
+	V4L2_YCBCR_ENC_XV709          = 4,
+
+	/* sYCC (Y'CbCr encoding of sRGB) */
+	V4L2_YCBCR_ENC_SYCC           = 5,
+
+	/* BT.2020 Non-constant Luminance Y'CbCr */
+	V4L2_YCBCR_ENC_BT2020         = 6,
+
+	/* BT.2020 Constant Luminance Y'CbcCrc */
+	V4L2_YCBCR_ENC_BT2020_CONST_LUM = 7,
+
+	/* SMPTE 240M -- Obsolete HDTV */
+	V4L2_YCBCR_ENC_SMPTE240M      = 8,
+};
+
+/* Color Space Conversion Mode */
+enum {
+	CSC_RGB_0_255_TO_RGB_16_235_8BIT,
+	CSC_RGB_0_255_TO_RGB_16_235_10BIT,
+	CSC_RGB_0_255_TO_ITU601_16_235_8BIT,
+	CSC_RGB_0_255_TO_ITU601_16_235_10BIT,
+	CSC_RGB_0_255_TO_ITU709_16_235_8BIT,
+	CSC_RGB_0_255_TO_ITU709_16_235_10BIT,
+	CSC_ITU601_16_235_TO_RGB_0_255_8BIT,
+	CSC_ITU709_16_235_TO_RGB_0_255_8BIT,
+	CSC_ITU601_16_235_TO_RGB_16_235_8BIT,
+	CSC_ITU709_16_235_TO_RGB_16_235_8BIT
+};
+
+enum drm_connector_status {
+	connector_status_disconnected = 0,
+	connector_status_connected = 1,
+};
+
+enum {
+	STANDARD_MODE = 0,
+	FAST_MODE
+};
+
+#endif /* _ROCKCHIP_HDMI_H_ */
diff --git a/drivers/video/drm/rockchip_dw_hdmi.c b/drivers/video/drm/rockchip_dw_hdmi.c
new file mode 100644
index 0000000000..d951d146ab
--- /dev/null
+++ b/drivers/video/drm/rockchip_dw_hdmi.c
@@ -0,0 +1,184 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm/device.h>
+#include <linux/dw_hdmi.h>
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "dw_hdmi.h"
+#include "rockchip_dw_hdmi.h"
+
+#define HDMI_SEL_LCDC(x, bit)  ((((x) & 1) << bit) | (1 << (16 + bit)))
+#define RK3288_GRF_SOC_CON6		0x025C
+#define RK3288_HDMI_LCDC_SEL		BIT(4)
+#define RK3399_GRF_SOC_CON20		0x6250
+#define RK3399_HDMI_LCDC_SEL		BIT(6)
+
+static const struct dw_hdmi_mpll_config rockchip_mpll_cfg[] = {
+	{
+		30666000, {
+			{ 0x00b3, 0x0000 },
+			{ 0x2153, 0x0000 },
+			{ 0x40f3, 0x0000 },
+		},
+	},  {
+		36800000, {
+			{ 0x00b3, 0x0000 },
+			{ 0x2153, 0x0000 },
+			{ 0x40a2, 0x0001 },
+		},
+	},  {
+		46000000, {
+			{ 0x00b3, 0x0000 },
+			{ 0x2142, 0x0001 },
+			{ 0x40a2, 0x0001 },
+		},
+	},  {
+		61333000, {
+			{ 0x0072, 0x0001 },
+			{ 0x2142, 0x0001 },
+			{ 0x40a2, 0x0001 },
+		},
+	},  {
+		73600000, {
+			{ 0x0072, 0x0001 },
+			{ 0x2142, 0x0001 },
+			{ 0x4061, 0x0002 },
+		},
+	},  {
+		92000000, {
+			{ 0x0072, 0x0001 },
+			{ 0x2145, 0x0002 },
+			{ 0x4061, 0x0002 },
+		},
+	},  {
+		122666000, {
+			{ 0x0051, 0x0002 },
+			{ 0x2145, 0x0002 },
+			{ 0x4061, 0x0002 },
+		},
+	},  {
+		147200000, {
+			{ 0x0051, 0x0002 },
+			{ 0x2145, 0x0002 },
+			{ 0x4064, 0x0003 },
+		},
+	},  {
+		184000000, {
+			{ 0x0051, 0x0002 },
+			{ 0x214c, 0x0003 },
+			{ 0x4064, 0x0003 },
+		},
+	},  {
+		226666000, {
+			{ 0x0040, 0x0003 },
+			{ 0x214c, 0x0003 },
+			{ 0x4064, 0x0003 },
+		},
+	},  {
+		272000000, {
+			{ 0x0040, 0x0003 },
+			{ 0x214c, 0x0003 },
+			{ 0x5a64, 0x0003 },
+		},
+	},  {
+		340000000, {
+			{ 0x0040, 0x0003 },
+			{ 0x3b4c, 0x0003 },
+			{ 0x5a64, 0x0003 },
+		},
+	},  {
+		600000000, {
+			{ 0x1a40, 0x0003 },
+			{ 0x3b4c, 0x0003 },
+			{ 0x5a64, 0x0003 },
+		},
+	},  {
+		~0UL, {
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+			{ 0x0000, 0x0000 },
+		},
+	}
+};
+
+static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
+	/*      pixelclk    bpp8    bpp10   bpp12 */
+	{
+		600000000, { 0x0000, 0x0000, 0x0000 },
+	},  {
+		~0UL,      { 0x0000, 0x0000, 0x0000},
+	}
+};
+
+static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
+	/*pixelclk   symbol   term   vlev*/
+	{ 74250000,  0x8009, 0x0004, 0x0272},
+	{ 165000000, 0x802b, 0x0004, 0x0209},
+	{ 297000000, 0x8039, 0x0005, 0x028d},
+	{ 594000000, 0x8039, 0x0000, 0x019d},
+	{ ~0UL,	     0x0000, 0x0000, 0x0000}
+};
+
+static const struct rockchip_connector_funcs rockchip_dw_hdmi_funcs = {
+	.init = rockchip_dw_hdmi_init,
+	.deinit = rockchip_dw_hdmi_deinit,
+	.prepare = rockchip_dw_hdmi_prepare,
+	.enable = rockchip_dw_hdmi_enable,
+	.disable = rockchip_dw_hdmi_disable,
+	.get_timing = rockchip_dw_hdmi_get_timing,
+	.detect = rockchip_dw_hdmi_detect,
+	.get_edid = rockchip_dw_hdmi_get_edid,
+};
+
+static const struct dw_hdmi_plat_data rk3288_hdmi_drv_data = {
+	.vop_sel_bit = 4,
+	.grf_vop_sel_reg = RK3288_GRF_SOC_CON6,
+	.dev_type   = RK3288_HDMI,
+};
+
+static const struct dw_hdmi_plat_data rk3399_hdmi_drv_data = {
+	.vop_sel_bit = 6,
+	.grf_vop_sel_reg = RK3399_GRF_SOC_CON20,
+	.mpll_cfg   = rockchip_mpll_cfg,
+	.cur_ctr    = rockchip_cur_ctr,
+	.phy_config = rockchip_phy_config,
+	.dev_type   = RK3399_HDMI,
+};
+
+static const struct rockchip_connector rk3399_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3399_hdmi_drv_data,
+};
+
+static const struct rockchip_connector rk3288_dw_hdmi_data = {
+	.funcs = &rockchip_dw_hdmi_funcs,
+	.data = &rk3288_hdmi_drv_data,
+};
+
+static int rockchip_dw_hdmi_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static const struct udevice_id rockchip_dw_hdmi_ids[] = {
+	{
+	 .compatible = "rockchip,rk3399-dw-hdmi",
+	 .data = (ulong)&rk3399_dw_hdmi_data,
+	}, {
+	 .compatible = "rockchip,rk3288-dw-hdmi",
+	 .data = (ulong)&rk3288_dw_hdmi_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_dw_hdmi) = {
+	.name = "rockchip_dw_hdmi",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_dw_hdmi_ids,
+	.probe	= rockchip_dw_hdmi_probe,
+};
diff --git a/drivers/video/drm/rockchip_dw_hdmi.h b/drivers/video/drm/rockchip_dw_hdmi.h
new file mode 100644
index 0000000000..bf09bbaa18
--- /dev/null
+++ b/drivers/video/drm/rockchip_dw_hdmi.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef _ROCKCHIP_DW_HDMI_REG_H_
+#define _ROCKCHIP_DW_HDMI_REG_H_
+
+/*
+ * Rockchip connector callbacks.
+ * If you want to know the details, please refer to rockchip_connector.h
+ */
+int rockchip_dw_hdmi_init(struct display_state *state);
+void rockchip_dw_hdmi_deinit(struct display_state *state);
+int rockchip_dw_hdmi_prepare(struct display_state *state);
+int rockchip_dw_hdmi_enable(struct display_state *state);
+int rockchip_dw_hdmi_disable(struct display_state *state);
+int rockchip_dw_hdmi_get_timing(struct display_state *state);
+int rockchip_dw_hdmi_detect(struct display_state *state);
+int rockchip_dw_hdmi_get_edid(struct display_state *state);
+
+#endif /* _ROCKCHIP_DW_HDMI_REG_H_ */

commit 21016d27c500da4326bdc59cd3505fcd85d236db
Author: Algea Cao <algea.cao@rock-chips.com>
Date:   Mon Oct 30 14:45:52 2017 +0800

    common: edid: Add more detailed edid parsing
    
    The original edid parsing methods are too simple. The
    new parsing methods are carried from kernel.
    
    Change-Id: I28b9b14e1bc76c38366f41d23f0e01ac779780d0
    Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 9de7e2f92d..0eb8984021 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -8,15 +8,1257 @@
  *
  * Contains stolen code from ddcprobe project which is:
  * Copyright (C) Nalin Dahyabhai <bigfun@pobox.com>
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 #include <common.h>
+#include <compiler.h>
+#include <div64.h>
+#include <drm_modes.h>
 #include <edid.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <malloc.h>
+#include <linux/compat.h>
 #include <linux/ctype.h>
+#include <linux/fb.h>
+#include <linux/hdmi.h>
 #include <linux/string.h>
-#include <drm_modes.h>
+
+#define EDID_EST_TIMINGS 16
+#define EDID_STD_TIMINGS 8
+#define EDID_DETAILED_TIMINGS 4
+#define BITS_PER_LONG 64
+#define BIT_WORD(nr)             ((nr) / BITS_PER_LONG)
+#define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1)))
+#define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1)))
+#define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
+#define version_greater(edid, maj, min) \
+	(((edid)->version > (maj)) || \
+	 ((edid)->version == (maj) && (edid)->revision > (min)))
+
+/*
+ * EDID blocks out in the wild have a variety of bugs, try to collect
+ * them here (note that userspace may work around broken monitors first,
+ * but fixes should make their way here so that the kernel "just works"
+ * on as many displays as possible).
+ */
+
+/* First detailed mode wrong, use largest 60Hz mode */
+#define EDID_QUIRK_PREFER_LARGE_60		BIT(0)
+/* Reported 135MHz pixel clock is too high, needs adjustment */
+#define EDID_QUIRK_135_CLOCK_TOO_HIGH		BIT(1)
+/* Prefer the largest mode at 75 Hz */
+#define EDID_QUIRK_PREFER_LARGE_75		BIT(2)
+/* Detail timing is in cm not mm */
+#define EDID_QUIRK_DETAILED_IN_CM		BIT(3)
+/* Detailed timing descriptors have bogus size values, so just take the
+ * maximum size and use that.
+ */
+#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	BIT(4)
+/* Monitor forgot to set the first detailed is preferred bit. */
+#define EDID_QUIRK_FIRST_DETAILED_PREFERRED	BIT(5)
+/* use +hsync +vsync for detailed mode */
+#define EDID_QUIRK_DETAILED_SYNC_PP		BIT(6)
+/* Force reduced-blanking timings for detailed modes */
+#define EDID_QUIRK_FORCE_REDUCED_BLANKING	BIT(7)
+/* Force 8bpc */
+#define EDID_QUIRK_FORCE_8BPC			BIT(8)
+/* Force 12bpc */
+#define EDID_QUIRK_FORCE_12BPC			BIT(9)
+/* Force 6bpc */
+#define EDID_QUIRK_FORCE_6BPC			BIT(10)
+/* Force 10bpc */
+#define EDID_QUIRK_FORCE_10BPC			BIT(11)
+
+struct detailed_mode_closure {
+	struct edid *edid;
+	struct hdmi_edid_data *data;
+	u32 quirks;
+	int modes;
+};
+
+#define LEVEL_DMT	0
+#define LEVEL_GTF	1
+#define LEVEL_GTF2	2
+#define LEVEL_CVT	3
+
+static struct edid_quirk {
+	char vendor[4];
+	int product_id;
+	u32 quirks;
+} edid_quirk_list[] = {
+	/* Acer AL1706 */
+	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
+	/* Acer F51 */
+	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
+	/* Unknown Acer */
+	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
+
+	/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
+	{ "AEO", 0, EDID_QUIRK_FORCE_6BPC },
+
+	/* Belinea 10 15 55 */
+	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
+	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
+
+	/* Envision Peripherals, Inc. EN-7100e */
+	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
+	/* Envision EN2028 */
+	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
+
+	/* Funai Electronics PM36B */
+	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
+	  EDID_QUIRK_DETAILED_IN_CM },
+
+	/* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
+	{ "LGD", 764, EDID_QUIRK_FORCE_10BPC },
+
+	/* LG Philips LCD LP154W01-A5 */
+	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
+	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
+
+	/* Philips 107p5 CRT */
+	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
+
+	/* Proview AY765C */
+	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
+
+	/* Samsung SyncMaster 205BW.  Note: irony */
+	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
+	/* Samsung SyncMaster 22[5-6]BW */
+	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
+	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
+
+	/* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
+	{ "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
+
+	/* ViewSonic VA2026w */
+	{ "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
+
+	/* Medion MD 30217 PG */
+	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
+
+	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
+	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
+
+	/* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
+	{ "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
+};
+
+/*
+ * Probably taken from CEA-861 spec.
+ * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
+ *
+ * Index using the VIC.
+ */
+static const struct drm_display_mode edid_cea_modes[] = {
+	/* 0 - dummy, VICs start at 1 */
+	{ },
+	/* 1 - 640x480@60Hz */
+	{ DRM_MODE(25175, 640, 656,
+		   752, 800, 480, 490, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 2 - 720x480@60Hz */
+	{ DRM_MODE(27000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 3 - 720x480@60Hz */
+	{ DRM_MODE(27000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 4 - 1280x720@60Hz */
+	{ DRM_MODE(74250, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 5 - 1920x1080i@60Hz */
+	{ DRM_MODE(74250, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 6 - 720(1440)x480i@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 7 - 720(1440)x480i@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 8 - 720(1440)x240@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 9 - 720(1440)x240@60Hz */
+	{ DRM_MODE(13500, 720, 739,
+		   801, 858, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 10 - 2880x480i@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 11 - 2880x480i@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 12 - 2880x240@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 13 - 2880x240@60Hz */
+	{ DRM_MODE(54000, 2880, 2956,
+		   3204, 3432, 240, 244, 247, 262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 14 - 1440x480@60Hz */
+	{ DRM_MODE(54000, 1440, 1472,
+		   1596, 1716, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 15 - 1440x480@60Hz */
+	{ DRM_MODE(54000, 1440, 1472,
+		   1596, 1716, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 16 - 1920x1080@60Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 17 - 720x576@50Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 18 - 720x576@50Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 19 - 1280x720@50Hz */
+	{ DRM_MODE(74250, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 20 - 1920x1080i@50Hz */
+	{ DRM_MODE(74250, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 21 - 720(1440)x576i@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 22 - 720(1440)x576i@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 23 - 720(1440)x288@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 24 - 720(1440)x288@50Hz */
+	{ DRM_MODE(13500, 720, 732,
+		   795, 864, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 25 - 2880x576i@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 26 - 2880x576i@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 27 - 2880x288@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 28 - 2880x288@50Hz */
+	{ DRM_MODE(54000, 2880, 2928,
+		   3180, 3456, 288, 290, 293, 312, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 29 - 1440x576@50Hz */
+	{ DRM_MODE(54000, 1440, 1464,
+		   1592, 1728, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 30 - 1440x576@50Hz */
+	{ DRM_MODE(54000, 1440, 1464,
+		   1592, 1728, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 31 - 1920x1080@50Hz */
+	{ DRM_MODE(148500, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 32 - 1920x1080@24Hz */
+	{ DRM_MODE(74250, 1920, 2558,
+		   2602, 2750, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 33 - 1920x1080@25Hz */
+	{ DRM_MODE(74250, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 34 - 1920x1080@30Hz */
+	{ DRM_MODE(74250, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 35 - 2880x480@60Hz */
+	{ DRM_MODE(108000, 2880, 2944,
+		   3192, 3432, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 36 - 2880x480@60Hz */
+	{ DRM_MODE(108000, 2880, 2944,
+		   3192, 3432, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 37 - 2880x576@50Hz */
+	{ DRM_MODE(108000, 2880, 2928,
+		   3184, 3456, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 38 - 2880x576@50Hz */
+	{ DRM_MODE(108000, 2880, 2928,
+		   3184, 3456, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 39 - 1920x1080i@50Hz */
+	{ DRM_MODE(72000, 1920, 1952,
+		   2120, 2304, 1080, 1126, 1136, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 40 - 1920x1080i@100Hz */
+	{ DRM_MODE(148500, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 41 - 1280x720@100Hz */
+	{ DRM_MODE(148500, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 42 - 720x576@100Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 43 - 720x576@100Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 44 - 720(1440)x576i@100Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 45 - 720(1440)x576i@100Hz */
+	{ DRM_MODE(27000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 46 - 1920x1080i@120Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1094, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+			DRM_MODE_FLAG_INTERLACE),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 47 - 1280x720@120Hz */
+	{ DRM_MODE(148500, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 48 - 720x480@120Hz */
+	{ DRM_MODE(54000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 49 - 720x480@120Hz */
+	{ DRM_MODE(54000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 50 - 720(1440)x480i@120Hz */
+	{ DRM_MODE(27000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 51 - 720(1440)x480i@120Hz */
+	{ DRM_MODE(27000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 52 - 720x576@200Hz */
+	{ DRM_MODE(108000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 53 - 720x576@200Hz */
+	{ DRM_MODE(108000, 720, 732,
+		   796, 864, 576, 581, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 54 - 720(1440)x576i@200Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 55 - 720(1440)x576i@200Hz */
+	{ DRM_MODE(54000, 720, 732,
+		   795, 864, 576, 580, 586, 625, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 56 - 720x480@240Hz */
+	{ DRM_MODE(108000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 57 - 720x480@240Hz */
+	{ DRM_MODE(108000, 720, 736,
+		   798, 858, 480, 489, 495, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 58 - 720(1440)x480i@240 */
+	{ DRM_MODE(54000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
+	/* 59 - 720(1440)x480i@240 */
+	{ DRM_MODE(54000, 720, 739,
+		   801, 858, 480, 488, 494, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
+	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 60 - 1280x720@24Hz */
+	{ DRM_MODE(59400, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 61 - 1280x720@25Hz */
+	{ DRM_MODE(74250, 1280, 3700,
+		   3740, 3960, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 62 - 1280x720@30Hz */
+	{ DRM_MODE(74250, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 63 - 1920x1080@120Hz */
+	{ DRM_MODE(297000, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 64 - 1920x1080@100Hz */
+	{ DRM_MODE(297000, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 65 - 1280x720@24Hz */
+	{ DRM_MODE(59400, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 66 - 1280x720@25Hz */
+	{ DRM_MODE(74250, 1280, 3700,
+		   3740, 3960, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 67 - 1280x720@30Hz */
+	{ DRM_MODE(74250, 1280, 3040,
+		   3080, 3300, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 68 - 1280x720@50Hz */
+	{ DRM_MODE(74250, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 69 - 1280x720@60Hz */
+	{ DRM_MODE(74250, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 70 - 1280x720@100Hz */
+	{ DRM_MODE(148500, 1280, 1720,
+		   1760, 1980, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 71 - 1280x720@120Hz */
+	{ DRM_MODE(148500, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 72 - 1920x1080@24Hz */
+	{ DRM_MODE(74250, 1920, 2558,
+		   2602, 2750, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 73 - 1920x1080@25Hz */
+	{ DRM_MODE(74250, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 74 - 1920x1080@30Hz */
+	{ DRM_MODE(74250, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 75 - 1920x1080@50Hz */
+	{ DRM_MODE(148500, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 76 - 1920x1080@60Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 77 - 1920x1080@100Hz */
+	{ DRM_MODE(297000, 1920, 2448,
+		   2492, 2640, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 78 - 1920x1080@120Hz */
+	{ DRM_MODE(297000, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 79 - 1680x720@24Hz */
+	{ DRM_MODE(59400, 1680, 3040,
+		3080, 3300, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 80 - 1680x720@25Hz */
+	{ DRM_MODE(59400, 1680, 2908,
+		2948, 3168, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 81 - 1680x720@30Hz */
+	{ DRM_MODE(59400, 1680, 2380,
+		2420, 2640, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 82 - 1680x720@50Hz */
+	{ DRM_MODE(82500, 1680, 1940,
+		1980, 2200, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 83 - 1680x720@60Hz */
+	{ DRM_MODE(99000, 1680, 1940,
+		1980, 2200, 720, 725, 730, 750, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 84 - 1680x720@100Hz */
+	{ DRM_MODE(165000, 1680, 1740,
+		1780, 2000, 720, 725, 730, 825, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 85 - 1680x720@120Hz */
+	{ DRM_MODE(198000, 1680, 1740,
+		1780, 2000, 720, 725, 730, 825, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 86 - 2560x1080@24Hz */
+	{ DRM_MODE(99000, 2560, 3558,
+		3602, 3750, 1080, 1084, 1089, 1100, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 87 - 2560x1080@25Hz */
+	{ DRM_MODE(90000, 2560, 3008,
+		3052, 3200, 1080, 1084, 1089, 1125, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 88 - 2560x1080@30Hz */
+	{ DRM_MODE(118800, 2560, 3328,
+		3372, 3520, 1080, 1084, 1089, 1125, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 89 - 2560x1080@50Hz */
+	{ DRM_MODE(185625, 2560, 3108,
+		3152, 3300, 1080, 1084, 1089, 1125, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 90 - 2560x1080@60Hz */
+	{ DRM_MODE(198000, 2560, 2808,
+		2852, 3000, 1080, 1084, 1089, 1100, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 91 - 2560x1080@100Hz */
+	{ DRM_MODE(371250, 2560, 2778,
+		2822, 2970, 1080, 1084, 1089, 1250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 92 - 2560x1080@120Hz */
+	{ DRM_MODE(495000, 2560, 3108,
+		3152, 3300, 1080, 1084, 1089, 1250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 93 - 3840x2160p@24Hz 16:9 */
+	{ DRM_MODE(297000, 3840, 5116,
+		5204, 5500, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 94 - 3840x2160p@25Hz 16:9 */
+	{ DRM_MODE(297000, 3840, 4896,
+		4984, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 95 - 3840x2160p@30Hz 16:9 */
+	{ DRM_MODE(297000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 96 - 3840x2160p@50Hz 16:9 */
+	{ DRM_MODE(594000, 3840, 4896,
+		4984, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 97 - 3840x2160p@60Hz 16:9 */
+	{ DRM_MODE(594000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+	/* 98 - 4096x2160p@24Hz 256:135 */
+	{ DRM_MODE(297000, 4096, 5116,
+		5204, 5500, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 99 - 4096x2160p@25Hz 256:135 */
+	{ DRM_MODE(297000, 4096, 5064,
+		5152, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 100 - 4096x2160p@30Hz 256:135 */
+	{ DRM_MODE(297000, 4096, 4184,
+		4272, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 101 - 4096x2160p@50Hz 256:135 */
+	{ DRM_MODE(594000, 4096, 5064,
+		5152, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 102 - 4096x2160p@60Hz 256:135 */
+	{ DRM_MODE(594000, 4096, 4184,
+		4272, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+	/* 103 - 3840x2160p@24Hz 64:27 */
+	{ DRM_MODE(297000, 3840, 5116,
+		5204, 5500, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 104 - 3840x2160p@25Hz 64:27 */
+	{ DRM_MODE(297000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 105 - 3840x2160p@30Hz 64:27 */
+	{ DRM_MODE(297000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 106 - 3840x2160p@50Hz 64:27 */
+	{ DRM_MODE(594000, 3840, 4896,
+		4984, 5280, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+	/* 107 - 3840x2160p@60Hz 64:27 */
+	{ DRM_MODE(594000, 3840, 4016,
+		4104, 4400, 2160, 2168, 2178, 2250, 0,
+		DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+};
+
+/*
+ * HDMI 1.4 4k modes. Index using the VIC.
+ */
+static const struct drm_display_mode edid_4k_modes[] = {
+	/* 0 - dummy, VICs start at 1 */
+	{ },
+	/* 1 - 3840x2160@30Hz */
+	{ DRM_MODE(297000,
+		   3840, 4016, 4104, 4400,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 30, },
+	/* 2 - 3840x2160@25Hz */
+	{ DRM_MODE(297000,
+		   3840, 4896, 4984, 5280,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 25, },
+	/* 3 - 3840x2160@24Hz */
+	{ DRM_MODE(297000,
+		   3840, 5116, 5204, 5500,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, },
+	/* 4 - 4096x2160@24Hz (SMPTE) */
+	{ DRM_MODE(297000,
+		   4096, 5116, 5204, 5500,
+		   2160, 2168, 2178, 2250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+	  .vrefresh = 24, },
+};
+
+/*
+ * Autogenerated from the DMT spec.
+ * This table is copied from xfree86/modes/xf86EdidModes.c.
+ */
+static const struct drm_display_mode drm_dmt_modes[] = {
+	/* 0x01 - 640x350@85Hz */
+	{ DRM_MODE(31500, 640, 672,
+		   736, 832, 350, 382, 385, 445, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x02 - 640x400@85Hz */
+	{ DRM_MODE(31500, 640, 672,
+		   736, 832, 400, 401, 404, 445, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x03 - 720x400@85Hz */
+	{ DRM_MODE(35500, 720, 756,
+		   828, 936, 400, 401, 404, 446, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x04 - 640x480@60Hz */
+	{ DRM_MODE(25175, 640, 656,
+		   752, 800, 480, 490, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x05 - 640x480@72Hz */
+	{ DRM_MODE(31500, 640, 664,
+		   704, 832, 480, 489, 492, 520, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x06 - 640x480@75Hz */
+	{ DRM_MODE(31500, 640, 656,
+		   720, 840, 480, 481, 484, 500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x07 - 640x480@85Hz */
+	{ DRM_MODE(36000, 640, 696,
+		   752, 832, 480, 481, 484, 509, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x08 - 800x600@56Hz */
+	{ DRM_MODE(36000, 800, 824,
+		   896, 1024, 600, 601, 603, 625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x09 - 800x600@60Hz */
+	{ DRM_MODE(40000, 800, 840,
+		   968, 1056, 600, 601, 605, 628, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0a - 800x600@72Hz */
+	{ DRM_MODE(50000, 800, 856,
+		   976, 1040, 600, 637, 643, 666, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0b - 800x600@75Hz */
+	{ DRM_MODE(49500, 800, 816,
+		   896, 1056, 600, 601, 604, 625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0c - 800x600@85Hz */
+	{ DRM_MODE(56250, 800, 832,
+		   896, 1048, 600, 601, 604, 631, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0d - 800x600@120Hz RB */
+	{ DRM_MODE(73250, 800, 848,
+		   880, 960, 600, 603, 607, 636, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x0e - 848x480@60Hz */
+	{ DRM_MODE(33750, 848, 864,
+		   976, 1088, 480, 486, 494, 517, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x0f - 1024x768@43Hz, interlace */
+	{ DRM_MODE(44900, 1024, 1032,
+		   1208, 1264, 768, 768, 772, 817, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE) },
+	/* 0x10 - 1024x768@60Hz */
+	{ DRM_MODE(65000, 1024, 1048,
+		   1184, 1344, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x11 - 1024x768@70Hz */
+	{ DRM_MODE(75000, 1024, 1048,
+		   1184, 1328, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x12 - 1024x768@75Hz */
+	{ DRM_MODE(78750, 1024, 1040,
+		   1136, 1312, 768, 769, 772, 800, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x13 - 1024x768@85Hz */
+	{ DRM_MODE(94500, 1024, 1072,
+		   1168, 1376, 768, 769, 772, 808, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x14 - 1024x768@120Hz RB */
+	{ DRM_MODE(115500, 1024, 1072,
+		   1104, 1184, 768, 771, 775, 813, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x15 - 1152x864@75Hz */
+	{ DRM_MODE(108000, 1152, 1216,
+		   1344, 1600, 864, 865, 868, 900, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x55 - 1280x720@60Hz */
+	{ DRM_MODE(74250, 1280, 1390,
+		   1430, 1650, 720, 725, 730, 750, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x16 - 1280x768@60Hz RB */
+	{ DRM_MODE(68250, 1280, 1328,
+		   1360, 1440, 768, 771, 778, 790, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x17 - 1280x768@60Hz */
+	{ DRM_MODE(79500, 1280, 1344,
+		   1472, 1664, 768, 771, 778, 798, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x18 - 1280x768@75Hz */
+	{ DRM_MODE(102250, 1280, 1360,
+		   1488, 1696, 768, 771, 778, 805, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x19 - 1280x768@85Hz */
+	{ DRM_MODE(117500, 1280, 1360,
+		   1496, 1712, 768, 771, 778, 809, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1a - 1280x768@120Hz RB */
+	{ DRM_MODE(140250, 1280, 1328,
+		   1360, 1440, 768, 771, 778, 813, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x1b - 1280x800@60Hz RB */
+	{ DRM_MODE(71000, 1280, 1328,
+		   1360, 1440, 800, 803, 809, 823, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x1c - 1280x800@60Hz */
+	{ DRM_MODE(83500, 1280, 1352,
+		   1480, 1680, 800, 803, 809, 831, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1d - 1280x800@75Hz */
+	{ DRM_MODE(106500, 1280, 1360,
+		   1488, 1696, 800, 803, 809, 838, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1e - 1280x800@85Hz */
+	{ DRM_MODE(122500, 1280, 1360,
+		   1496, 1712, 800, 803, 809, 843, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x1f - 1280x800@120Hz RB */
+	{ DRM_MODE(146250, 1280, 1328,
+		   1360, 1440, 800, 803, 809, 847, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x20 - 1280x960@60Hz */
+	{ DRM_MODE(108000, 1280, 1376,
+		   1488, 1800, 960, 961, 964, 1000, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x21 - 1280x960@85Hz */
+	{ DRM_MODE(148500, 1280, 1344,
+		   1504, 1728, 960, 961, 964, 1011, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x22 - 1280x960@120Hz RB */
+	{ DRM_MODE(175500, 1280, 1328,
+		   1360, 1440, 960, 963, 967, 1017, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x23 - 1280x1024@60Hz */
+	{ DRM_MODE(108000, 1280, 1328,
+		   1440, 1688, 1024, 1025, 1028, 1066, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x24 - 1280x1024@75Hz */
+	{ DRM_MODE(135000, 1280, 1296,
+		   1440, 1688, 1024, 1025, 1028, 1066, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x25 - 1280x1024@85Hz */
+	{ DRM_MODE(157500, 1280, 1344,
+		   1504, 1728, 1024, 1025, 1028, 1072, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x26 - 1280x1024@120Hz RB */
+	{ DRM_MODE(187250, 1280, 1328,
+		   1360, 1440, 1024, 1027, 1034, 1084, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x27 - 1360x768@60Hz */
+	{ DRM_MODE(85500, 1360, 1424,
+		   1536, 1792, 768, 771, 777, 795, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x28 - 1360x768@120Hz RB */
+	{ DRM_MODE(148250, 1360, 1408,
+		   1440, 1520, 768, 771, 776, 813, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x51 - 1366x768@60Hz */
+	{ DRM_MODE(85500, 1366, 1436,
+		   1579, 1792, 768, 771, 774, 798, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x56 - 1366x768@60Hz */
+	{ DRM_MODE(72000, 1366, 1380,
+		   1436, 1500, 768, 769, 772, 800, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x29 - 1400x1050@60Hz RB */
+	{ DRM_MODE(101000, 1400, 1448,
+		   1480, 1560, 1050, 1053, 1057, 1080, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x2a - 1400x1050@60Hz */
+	{ DRM_MODE(121750, 1400, 1488,
+		   1632, 1864, 1050, 1053, 1057, 1089, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x2b - 1400x1050@75Hz */
+	{ DRM_MODE(156000, 1400, 1504,
+		   1648, 1896, 1050, 1053, 1057, 1099, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x2c - 1400x1050@85Hz */
+	{ DRM_MODE(179500, 1400, 1504,
+		   1656, 1912, 1050, 1053, 1057, 1105, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x2d - 1400x1050@120Hz RB */
+	{ DRM_MODE(208000, 1400, 1448,
+		   1480, 1560, 1050, 1053, 1057, 1112, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x2e - 1440x900@60Hz RB */
+	{ DRM_MODE(88750, 1440, 1488,
+		   1520, 1600, 900, 903, 909, 926, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x2f - 1440x900@60Hz */
+	{ DRM_MODE(106500, 1440, 1520,
+		   1672, 1904, 900, 903, 909, 934, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x30 - 1440x900@75Hz */
+	{ DRM_MODE(136750, 1440, 1536,
+		   1688, 1936, 900, 903, 909, 942, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x31 - 1440x900@85Hz */
+	{ DRM_MODE(157000, 1440, 1544,
+		   1696, 1952, 900, 903, 909, 948, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x32 - 1440x900@120Hz RB */
+	{ DRM_MODE(182750, 1440, 1488,
+		   1520, 1600, 900, 903, 909, 953, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x53 - 1600x900@60Hz */
+	{ DRM_MODE(108000, 1600, 1624,
+		   1704, 1800, 900, 901, 904, 1000, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x33 - 1600x1200@60Hz */
+	{ DRM_MODE(162000, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x34 - 1600x1200@65Hz */
+	{ DRM_MODE(175500, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x35 - 1600x1200@70Hz */
+	{ DRM_MODE(189000, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x36 - 1600x1200@75Hz */
+	{ DRM_MODE(202500, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x37 - 1600x1200@85Hz */
+	{ DRM_MODE(229500, 1600, 1664,
+		   1856, 2160, 1200, 1201, 1204, 1250, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x38 - 1600x1200@120Hz RB */
+	{ DRM_MODE(268250, 1600, 1648,
+		   1680, 1760, 1200, 1203, 1207, 1271, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x39 - 1680x1050@60Hz RB */
+	{ DRM_MODE(119000, 1680, 1728,
+		   1760, 1840, 1050, 1053, 1059, 1080, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x3a - 1680x1050@60Hz */
+	{ DRM_MODE(146250, 1680, 1784,
+		   1960, 2240, 1050, 1053, 1059, 1089, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3b - 1680x1050@75Hz */
+	{ DRM_MODE(187000, 1680, 1800,
+		   1976, 2272, 1050, 1053, 1059, 1099, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3c - 1680x1050@85Hz */
+	{ DRM_MODE(214750, 1680, 1808,
+		   1984, 2288, 1050, 1053, 1059, 1105, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3d - 1680x1050@120Hz RB */
+	{ DRM_MODE(245500, 1680, 1728,
+		   1760, 1840, 1050, 1053, 1059, 1112, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x3e - 1792x1344@60Hz */
+	{ DRM_MODE(204750, 1792, 1920,
+		   2120, 2448, 1344, 1345, 1348, 1394, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x3f - 1792x1344@75Hz */
+	{ DRM_MODE(261000, 1792, 1888,
+		   2104, 2456, 1344, 1345, 1348, 1417, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x40 - 1792x1344@120Hz RB */
+	{ DRM_MODE(333250, 1792, 1840,
+		   1872, 1952, 1344, 1347, 1351, 1423, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x41 - 1856x1392@60Hz */
+	{ DRM_MODE(218250, 1856, 1952,
+		   2176, 2528, 1392, 1393, 1396, 1439, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x42 - 1856x1392@75Hz */
+	{ DRM_MODE(288000, 1856, 1984,
+		   2208, 2560, 1392, 1393, 1396, 1500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x43 - 1856x1392@120Hz RB */
+	{ DRM_MODE(356500, 1856, 1904,
+		   1936, 2016, 1392, 1395, 1399, 1474, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x52 - 1920x1080@60Hz */
+	{ DRM_MODE(148500, 1920, 2008,
+		   2052, 2200, 1080, 1084, 1089, 1125, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x44 - 1920x1200@60Hz RB */
+	{ DRM_MODE(154000, 1920, 1968,
+		   2000, 2080, 1200, 1203, 1209, 1235, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x45 - 1920x1200@60Hz */
+	{ DRM_MODE(193250, 1920, 2056,
+		   2256, 2592, 1200, 1203, 1209, 1245, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x46 - 1920x1200@75Hz */
+	{ DRM_MODE(245250, 1920, 2056,
+		   2264, 2608, 1200, 1203, 1209, 1255, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x47 - 1920x1200@85Hz */
+	{ DRM_MODE(281250, 1920, 2064,
+		   2272, 2624, 1200, 1203, 1209, 1262, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x48 - 1920x1200@120Hz RB */
+	{ DRM_MODE(317000, 1920, 1968,
+		   2000, 2080, 1200, 1203, 1209, 1271, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x49 - 1920x1440@60Hz */
+	{ DRM_MODE(234000, 1920, 2048,
+		   2256, 2600, 1440, 1441, 1444, 1500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4a - 1920x1440@75Hz */
+	{ DRM_MODE(297000, 1920, 2064,
+		   2288, 2640, 1440, 1441, 1444, 1500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4b - 1920x1440@120Hz RB */
+	{ DRM_MODE(380500, 1920, 1968,
+		   2000, 2080, 1440, 1443, 1447, 1525, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x54 - 2048x1152@60Hz */
+	{ DRM_MODE(162000, 2048, 2074,
+		   2154, 2250, 1152, 1153, 1156, 1200, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4c - 2560x1600@60Hz RB */
+	{ DRM_MODE(268500, 2560, 2608,
+		   2640, 2720, 1600, 1603, 1609, 1646, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x4d - 2560x1600@60Hz */
+	{ DRM_MODE(348500, 2560, 2752,
+		   3032, 3504, 1600, 1603, 1609, 1658, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4e - 2560x1600@75Hz */
+	{ DRM_MODE(443250, 2560, 2768,
+		   3048, 3536, 1600, 1603, 1609, 1672, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x4f - 2560x1600@85Hz */
+	{ DRM_MODE(505250, 2560, 2768,
+		   3048, 3536, 1600, 1603, 1609, 1682, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 0x50 - 2560x1600@120Hz RB */
+	{ DRM_MODE(552750, 2560, 2608,
+		   2640, 2720, 1600, 1603, 1609, 1694, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x57 - 4096x2160@60Hz RB */
+	{ DRM_MODE(556744, 4096, 4104,
+		   4136, 4176, 2160, 2208, 2216, 2222, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 0x58 - 4096x2160@59.94Hz RB */
+	{ DRM_MODE(556188, 4096, 4104,
+		   4136, 4176, 2160, 2208, 2216, 2222, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
+};
+
+/*
+ * These more or less come from the DMT spec.  The 720x400 modes are
+ * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
+ * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
+ * should be 1152x870, again for the Mac, but instead we use the x864 DMT
+ * mode.
+ *
+ * The DMT modes have been fact-checked; the rest are mild guesses.
+ */
+static const struct drm_display_mode edid_est_modes[] = {
+	/* 800x600@60Hz */
+	{ DRM_MODE(40000, 800, 840,
+		   968, 1056, 600, 601, 605, 628, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 800x600@56Hz */
+	{ DRM_MODE(36000, 800, 824,
+		   896, 1024, 600, 601, 603,  625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 640x480@75Hz */
+	{ DRM_MODE(31500, 640, 656,
+		   720, 840, 480, 481, 484, 500, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 640x480@72Hz */
+	{ DRM_MODE(31500, 640, 664,
+		   704,  832, 480, 489, 492, 520, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 640x480@67Hz */
+	{ DRM_MODE(30240, 640, 704,
+		   768,  864, 480, 483, 486, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 640x480@60Hz */
+	{ DRM_MODE(25175, 640, 656,
+		   752, 800, 480, 490, 492, 525, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 720x400@88Hz */
+	{ DRM_MODE(35500, 720, 738,
+		   846, 900, 400, 421, 423,  449, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 720x400@70Hz */
+	{ DRM_MODE(28320, 720, 738,
+		   846,  900, 400, 412, 414, 449, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1280x1024@75Hz */
+	{ DRM_MODE(135000, 1280, 1296,
+		   1440, 1688, 1024, 1025, 1028, 1066, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1024x768@75Hz */
+	{ DRM_MODE(78750, 1024, 1040,
+		   1136, 1312,  768, 769, 772, 800, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1024x768@70Hz */
+	{ DRM_MODE(75000, 1024, 1048,
+		   1184, 1328, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 1024x768@60Hz */
+	{ DRM_MODE(65000, 1024, 1048,
+		   1184, 1344, 768, 771, 777, 806, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 1024x768@43Hz */
+	{ DRM_MODE(44900, 1024, 1032,
+		   1208, 1264, 768, 768, 776, 817, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
+		   DRM_MODE_FLAG_INTERLACE) },
+	/* 832x624@75Hz */
+	{ DRM_MODE(57284, 832, 864,
+		   928, 1152, 624, 625, 628, 667, 0,
+		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
+	/* 800x600@75Hz */
+	{ DRM_MODE(49500, 800, 816,
+		   896, 1056, 600, 601, 604,  625, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 800x600@72Hz */
+	{ DRM_MODE(50000, 800, 856,
+		   976, 1040, 600, 637, 643, 666, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+	/* 1152x864@75Hz */
+	{ DRM_MODE(108000, 1152, 1216,
+		   1344, 1600, 864, 865, 868, 900, 0,
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
+};
+
+struct minimode {
+	short w;
+	short h;
+	short r;
+	short rb;
+};
+
+static const struct minimode est3_modes[] = {
+	/* byte 6 */
+	{ 640, 350, 85, 0 },
+	{ 640, 400, 85, 0 },
+	{ 720, 400, 85, 0 },
+	{ 640, 480, 85, 0 },
+	{ 848, 480, 60, 0 },
+	{ 800, 600, 85, 0 },
+	{ 1024, 768, 85, 0 },
+	{ 1152, 864, 75, 0 },
+	/* byte 7 */
+	{ 1280, 768, 60, 1 },
+	{ 1280, 768, 60, 0 },
+	{ 1280, 768, 75, 0 },
+	{ 1280, 768, 85, 0 },
+	{ 1280, 960, 60, 0 },
+	{ 1280, 960, 85, 0 },
+	{ 1280, 1024, 60, 0 },
+	{ 1280, 1024, 85, 0 },
+	/* byte 8 */
+	{ 1360, 768, 60, 0 },
+	{ 1440, 900, 60, 1 },
+	{ 1440, 900, 60, 0 },
+	{ 1440, 900, 75, 0 },
+	{ 1440, 900, 85, 0 },
+	{ 1400, 1050, 60, 1 },
+	{ 1400, 1050, 60, 0 },
+	{ 1400, 1050, 75, 0 },
+	/* byte 9 */
+	{ 1400, 1050, 85, 0 },
+	{ 1680, 1050, 60, 1 },
+	{ 1680, 1050, 60, 0 },
+	{ 1680, 1050, 75, 0 },
+	{ 1680, 1050, 85, 0 },
+	{ 1600, 1200, 60, 0 },
+	{ 1600, 1200, 65, 0 },
+	{ 1600, 1200, 70, 0 },
+	/* byte 10 */
+	{ 1600, 1200, 75, 0 },
+	{ 1600, 1200, 85, 0 },
+	{ 1792, 1344, 60, 0 },
+	{ 1792, 1344, 75, 0 },
+	{ 1856, 1392, 60, 0 },
+	{ 1856, 1392, 75, 0 },
+	{ 1920, 1200, 60, 1 },
+	{ 1920, 1200, 60, 0 },
+	/* byte 11 */
+	{ 1920, 1200, 75, 0 },
+	{ 1920, 1200, 85, 0 },
+	{ 1920, 1440, 60, 0 },
+	{ 1920, 1440, 75, 0 },
+};
+
+static const struct minimode extra_modes[] = {
+	{ 1024, 576,  60, 0 },
+	{ 1366, 768,  60, 0 },
+	{ 1600, 900,  60, 0 },
+	{ 1680, 945,  60, 0 },
+	{ 1920, 1080, 60, 0 },
+	{ 2048, 1152, 60, 0 },
+	{ 2048, 1536, 60, 0 },
+};
 
 int edid_check_info(struct edid1_info *edid_info)
 {
@@ -193,6 +1435,25 @@ static void decode_mode(u8 *buf, struct drm_display_mode *mode)
 	      mode->vtotal, vborder);
 }
 
+/**
+ * edid_vendor - match a string against EDID's obfuscated vendor field
+ * @edid: EDID to match
+ * @vendor: vendor string
+ *
+ * Returns true if @vendor is in @edid, false otherwise
+ */
+static bool edid_vendor(struct edid1_info *edid, char *vendor)
+{
+	char edid_vendor[3];
+
+	edid_vendor[0] = ((edid->manufacturer_name[0] & 0x7c) >> 2) + '@';
+	edid_vendor[1] = (((edid->manufacturer_name[0] & 0x3) << 3) |
+			  ((edid->manufacturer_name[1] & 0xe0) >> 5)) + '@';
+	edid_vendor[2] = (edid->manufacturer_name[1] & 0x1f) + '@';
+
+	return !strncmp(edid_vendor, vendor, 3);
+}
+
 /**
  * Check if HDMI vendor specific data block is present in CEA block
  * @param info	CEA extension block
@@ -331,7 +1592,6 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 	return 0;
 }
 
-
 /**
  * Snip the tailing whitespace/return of a string.
  *
@@ -350,7 +1610,7 @@ static char *snip(char *string)
 	s = &string[strlen(string) - 1];
 
 	while (s >= string && (isspace(*s) || *s == '\n' || *s == '\r' ||
-			*s == '\0'))
+	       *s == '\0'))
 		*(s--) = '\0';
 
 	return string;
@@ -390,8 +1650,8 @@ static void edid_print_dtd(struct edid_monitor_descriptor *monitor,
 			       monitor->data.range_data.vertical_max,
 			       monitor->data.range_data.pixel_clock_max * 10);
 	} else {
-		uint32_t pixclock, h_active, h_blanking, v_active, v_blanking;
-		uint32_t h_total, v_total, vfreq;
+		u32 pixclock, h_active, h_blanking, v_active, v_blanking;
+		u32 h_total, v_total, vfreq;
 
 		pixclock = EDID_DETAILED_TIMING_PIXEL_CLOCK(*timing);
 		h_active = EDID_DETAILED_TIMING_HORIZONTAL_ACTIVE(*timing);
@@ -430,7 +1690,7 @@ void edid_print_info(struct edid1_info *edid_info)
 	int i;
 	char manufacturer[4];
 	unsigned int have_timing = 0;
-	uint32_t serial_number;
+	u32 serial_number;
 
 	if (edid_check_info(edid_info)) {
 		printf("Not a valid EDID\n");
@@ -535,7 +1795,7 @@ void edid_print_info(struct edid1_info *edid_info)
 		    ((xres != 0) && (xres != 1)) ||
 		    ((vfreq != 0) && (vfreq != 1))) {
 			switch (EDID1_INFO_STANDARD_TIMING_ASPECT(*edid_info,
-					i)) {
+				i)) {
 			case ASPECT_625:
 				aspect = 6250;
 				break;
@@ -567,3 +1827,3438 @@ void edid_print_info(struct edid1_info *edid_info)
 	if (!have_timing)
 		printf("\tNone\n");
 }
+
+/**
+ * drm_mode_create - create a new display mode
+ *
+ * Create a new, cleared drm_display_mode.
+ *
+ * Returns:
+ * Pointer to new mode on success, NULL on error.
+ */
+static struct drm_display_mode *drm_mode_create(void)
+{
+	struct drm_display_mode *nmode;
+
+	nmode = malloc(sizeof(struct drm_display_mode));
+	memset(nmode, 0, sizeof(struct drm_display_mode));
+	if (!nmode)
+		return NULL;
+
+	return nmode;
+}
+
+/**
+ * drm_mode_destroy - remove a mode
+ * @mode: mode to remove
+ *
+ */
+static void drm_mode_destroy(struct drm_display_mode *mode)
+{
+	if (!mode)
+		return;
+
+	kfree(mode);
+}
+
+/**
+ * drm_cvt_mode -create a modeline based on the CVT algorithm
+ * @hdisplay: hdisplay size
+ * @vdisplay: vdisplay size
+ * @vrefresh: vrefresh rate
+ * @reduced: whether to use reduced blanking
+ * @interlaced: whether to compute an interlaced mode
+ * @margins: whether to add margins (borders)
+ *
+ * This function is called to generate the modeline based on CVT algorithm
+ * according to the hdisplay, vdisplay, vrefresh.
+ * It is based from the VESA(TM) Coordinated Video Timing Generator by
+ * Graham Loveridge April 9, 2003 available at
+ * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
+ *
+ * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
+ * What I have done is to translate it by using integer calculation.
+ *
+ * Returns:
+ * The modeline based on the CVT algorithm stored in a drm_display_mode object.
+ * The display mode object is allocated with drm_mode_create(). Returns NULL
+ * when no mode could be allocated.
+ */
+static
+struct drm_display_mode *drm_cvt_mode(int hdisplay, int vdisplay, int vrefresh,
+				      bool reduced, bool interlaced,
+				      bool margins)
+{
+#define HV_FACTOR			1000
+	/* 1) top/bottom margin size (% of height) - default: 1.8, */
+#define	CVT_MARGIN_PERCENTAGE		18
+	/* 2) character cell horizontal granularity (pixels) - default 8 */
+#define	CVT_H_GRANULARITY		8
+	/* 3) Minimum vertical porch (lines) - default 3 */
+#define	CVT_MIN_V_PORCH			3
+	/* 4) Minimum number of vertical back porch lines - default 6 */
+#define	CVT_MIN_V_BPORCH		6
+	/* Pixel Clock step (kHz) */
+#define CVT_CLOCK_STEP			250
+	struct drm_display_mode *drm_mode;
+	unsigned int vfieldrate, hperiod;
+	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
+	int interlace;
+
+	/* allocate the drm_display_mode structure. If failure, we will
+	 * return directly
+	 */
+	drm_mode = drm_mode_create();
+	if (!drm_mode)
+		return NULL;
+
+	/* the CVT default refresh rate is 60Hz */
+	if (!vrefresh)
+		vrefresh = 60;
+
+	/* the required field fresh rate */
+	if (interlaced)
+		vfieldrate = vrefresh * 2;
+	else
+		vfieldrate = vrefresh;
+
+	/* horizontal pixels */
+	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
+
+	/* determine the left&right borders */
+	hmargin = 0;
+	if (margins) {
+		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
+		hmargin -= hmargin % CVT_H_GRANULARITY;
+	}
+	/* find the total active pixels */
+	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
+
+	/* find the number of lines per field */
+	if (interlaced)
+		vdisplay_rnd = vdisplay / 2;
+	else
+		vdisplay_rnd = vdisplay;
+
+	/* find the top & bottom borders */
+	vmargin = 0;
+	if (margins)
+		vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
+
+	drm_mode->vdisplay = vdisplay + 2 * vmargin;
+
+	/* Interlaced */
+	if (interlaced)
+		interlace = 1;
+	else
+		interlace = 0;
+
+	/* Determine VSync Width from aspect ratio */
+	if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
+		vsync = 4;
+	else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
+		vsync = 5;
+	else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
+		vsync = 6;
+	else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
+		vsync = 7;
+	else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
+		vsync = 7;
+	else /* custom */
+		vsync = 10;
+
+	if (!reduced) {
+		/* simplify the GTF calculation */
+		/* 4) Minimum time of vertical sync + back porch interval
+		 * default 550.0
+		 */
+		int tmp1, tmp2;
+#define CVT_MIN_VSYNC_BP	550
+		/* 3) Nominal HSync width (% of line period) - default 8 */
+#define CVT_HSYNC_PERCENTAGE	8
+		unsigned int hblank_percentage;
+		int vsyncandback_porch, vback_porch, hblank;
+
+		/* estimated the horizontal period */
+		tmp1 = HV_FACTOR * 1000000  -
+				CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
+		tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
+				interlace;
+		hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
+
+		tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
+		/* 9. Find number of lines in sync + backporch */
+		if (tmp1 < (vsync + CVT_MIN_V_PORCH))
+			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
+		else
+			vsyncandback_porch = tmp1;
+		/* 10. Find number of lines in back porch */
+		vback_porch = vsyncandback_porch - vsync;
+		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
+				vsyncandback_porch + CVT_MIN_V_PORCH;
+		/* 5) Definition of Horizontal blanking time limitation */
+		/* Gradient (%/kHz) - default 600 */
+#define CVT_M_FACTOR	600
+		/* Offset (%) - default 40 */
+#define CVT_C_FACTOR	40
+		/* Blanking time scaling factor - default 128 */
+#define CVT_K_FACTOR	128
+		/* Scaling factor weighting - default 20 */
+#define CVT_J_FACTOR	20
+#define CVT_M_PRIME	(CVT_M_FACTOR * CVT_K_FACTOR / 256)
+#define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
+			 CVT_J_FACTOR)
+		/* 12. Find ideal blanking duty cycle from formula */
+		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
+					hperiod / 1000;
+		/* 13. Blanking time */
+		if (hblank_percentage < 20 * HV_FACTOR)
+			hblank_percentage = 20 * HV_FACTOR;
+		hblank = drm_mode->hdisplay * hblank_percentage /
+			 (100 * HV_FACTOR - hblank_percentage);
+		hblank -= hblank % (2 * CVT_H_GRANULARITY);
+		/* 14. find the total pixels per line */
+		drm_mode->htotal = drm_mode->hdisplay + hblank;
+		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
+		drm_mode->hsync_start = drm_mode->hsync_end -
+			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
+		drm_mode->hsync_start += CVT_H_GRANULARITY -
+			drm_mode->hsync_start % CVT_H_GRANULARITY;
+		/* fill the Vsync values */
+		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
+		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
+	} else {
+		/* Reduced blanking */
+		/* Minimum vertical blanking interval time - default 460 */
+#define CVT_RB_MIN_VBLANK	460
+		/* Fixed number of clocks for horizontal sync */
+#define CVT_RB_H_SYNC		32
+		/* Fixed number of clocks for horizontal blanking */
+#define CVT_RB_H_BLANK		160
+		/* Fixed number of lines for vertical front porch - default 3*/
+#define CVT_RB_VFPORCH		3
+		int vbilines;
+		int tmp1, tmp2;
+		/* 8. Estimate Horizontal period. */
+		tmp1 = HV_FACTOR * 1000000 -
+			CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
+		tmp2 = vdisplay_rnd + 2 * vmargin;
+		hperiod = tmp1 / (tmp2 * vfieldrate);
+		/* 9. Find number of lines in vertical blanking */
+		vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
+		/* 10. Check if vertical blanking is sufficient */
+		if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
+			vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
+		/* 11. Find total number of lines in vertical field */
+		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
+		/* 12. Find total number of pixels in a line */
+		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
+		/* Fill in HSync values */
+		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
+		drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
+		/* Fill in VSync values */
+		drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
+		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
+	}
+	/* 15/13. Find pixel clock frequency (kHz for xf86) */
+	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
+	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
+	/* 18/16. Find actual vertical frame frequency */
+	/* ignore - just set the mode flag for interlaced */
+	if (interlaced) {
+		drm_mode->vtotal *= 2;
+		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
+	}
+
+	if (reduced)
+		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
+					DRM_MODE_FLAG_NVSYNC);
+	else
+		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
+					DRM_MODE_FLAG_NHSYNC);
+
+	return drm_mode;
+}
+
+static int
+cea_db_payload_len(const u8 *db)
+{
+	return db[0] & 0x1f;
+}
+
+static int
+cea_db_extended_tag(const u8 *db)
+{
+	return db[1];
+}
+
+static int
+cea_db_tag(const u8 *db)
+{
+	return db[0] >> 5;
+}
+
+#define for_each_cea_db(cea, i, start, end) \
+	for ((i) = (start); (i) < (end) && (i) + \
+	cea_db_payload_len(&(cea)[(i)]) < \
+	(end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
+
+static int
+cea_revision(const u8 *cea)
+{
+	return cea[1];
+}
+
+static int
+cea_db_offsets(const u8 *cea, int *start, int *end)
+{
+	/* Data block offset in CEA extension block */
+	*start = 4;
+	*end = cea[2];
+	if (*end == 0)
+		*end = 127;
+	if (*end < 4 || *end > 127)
+		return -ERANGE;
+
+	/*
+	 * XXX: cea[2] is equal to the real value minus one in some sink edid.
+	 */
+	if (*end != 4) {
+		int i;
+
+		i = *start;
+		while (i < (*end) &&
+		       i + cea_db_payload_len(&(cea)[i]) < (*end))
+			i += cea_db_payload_len(&(cea)[i]) + 1;
+
+		if (cea_db_payload_len(&(cea)[i]) &&
+		    i + cea_db_payload_len(&(cea)[i]) == (*end))
+			(*end)++;
+	}
+
+	return 0;
+}
+
+static bool cea_db_is_hdmi_vsdb(const u8 *db)
+{
+	int hdmi_id;
+
+	if (cea_db_tag(db) != EDID_CEA861_DB_VENDOR)
+		return false;
+
+	if (cea_db_payload_len(db) < 5)
+		return false;
+
+	hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
+
+	return hdmi_id == HDMI_IEEE_OUI;
+}
+
+static bool cea_db_is_hdmi_forum_vsdb(const u8 *db)
+{
+	unsigned int oui;
+
+	if (cea_db_tag(db) != EDID_CEA861_DB_VENDOR)
+		return false;
+
+	if (cea_db_payload_len(db) < 7)
+		return false;
+
+	oui = db[3] << 16 | db[2] << 8 | db[1];
+
+	return oui == HDMI_FORUM_IEEE_OUI;
+}
+
+static bool cea_db_is_y420cmdb(const u8 *db)
+{
+	if (cea_db_tag(db) != EDID_CEA861_DB_USE_EXTENDED)
+		return false;
+
+	if (!cea_db_payload_len(db))
+		return false;
+
+	if (cea_db_extended_tag(db) != EXT_VIDEO_CAP_BLOCK_Y420CMDB)
+		return false;
+
+	return true;
+}
+
+static bool cea_db_is_y420vdb(const u8 *db)
+{
+	if (cea_db_tag(db) != EDID_CEA861_DB_USE_EXTENDED)
+		return false;
+
+	if (!cea_db_payload_len(db))
+		return false;
+
+	if (cea_db_extended_tag(db) != EXT_VIDEO_DATA_BLOCK_420)
+		return false;
+
+	return true;
+}
+
+static bool drm_valid_hdmi_vic(u8 vic)
+{
+	return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
+}
+
+static void drm_add_hdmi_modes(struct hdmi_edid_data *data,
+			       struct drm_display_mode *mode)
+{
+	int ret;
+	struct drm_display_mode *mode_buf = data->mode_buf;
+
+	mode_buf[(data->modes)++] = *mode;
+}
+
+static bool drm_valid_cea_vic(u8 vic)
+{
+	return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
+}
+
+static u8 svd_to_vic(u8 svd)
+{
+	/* 0-6 bit vic, 7th bit native mode indicator */
+	if ((svd >= 1 &&  svd <= 64) || (svd >= 129 && svd <= 192))
+		return svd & 127;
+
+	return svd;
+}
+
+static struct drm_display_mode *
+drm_display_mode_from_vic_index(const u8 *video_db, u8 video_len,
+				u8 video_index)
+{
+	struct drm_display_mode *newmode;
+	u8 vic;
+
+	if (!video_db || video_index >= video_len)
+		return NULL;
+
+	/* CEA modes are numbered 1..127 */
+	vic = svd_to_vic(video_db[video_index]);
+	if (!drm_valid_cea_vic(vic))
+		return NULL;
+
+	newmode = drm_mode_create();
+	if (!newmode)
+		return NULL;
+
+	*newmode = edid_cea_modes[vic];
+	newmode->vrefresh = 0;
+
+	return newmode;
+}
+
+static void bitmap_set(unsigned long *map, unsigned int start, int len)
+{
+	unsigned long *p = map + BIT_WORD(start);
+	const unsigned int size = start + len;
+	int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG);
+	unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start);
+
+	while (len - bits_to_set >= 0) {
+		*p |= mask_to_set;
+		len -= bits_to_set;
+		bits_to_set = BITS_PER_LONG;
+		mask_to_set = ~0UL;
+		p++;
+	}
+	if (len) {
+		mask_to_set &= BITMAP_LAST_WORD_MASK(size);
+		*p |= mask_to_set;
+	}
+}
+
+static void
+drm_add_cmdb_modes(u8 svd, struct drm_hdmi_info *hdmi)
+{
+	u8 vic = svd_to_vic(svd);
+
+	if (!drm_valid_cea_vic(vic))
+		return;
+
+	bitmap_set(hdmi->y420_cmdb_modes, vic, 1);
+}
+
+static int
+do_cea_modes(const u8 *db, u8 len, struct drm_hdmi_info *hdmi,
+	     struct hdmi_edid_data *data)
+{
+	int i, modes = 0;
+
+	for (i = 0; i < len; i++) {
+		struct drm_display_mode *mode;
+
+		mode = drm_display_mode_from_vic_index(db, len, i);
+		if (mode) {
+			/*
+			 * YCBCR420 capability block contains a bitmap which
+			 * gives the index of CEA modes from CEA VDB, which
+			 * can support YCBCR 420 sampling output also (apart
+			 * from RGB/YCBCR444 etc).
+			 * For example, if the bit 0 in bitmap is set,
+			 * first mode in VDB can support YCBCR420 output too.
+			 * Add YCBCR420 modes only if sink is HDMI 2.0 capable.
+			 */
+			if (i < 64 && hdmi->y420_cmdb_map & (1ULL << i))
+				drm_add_cmdb_modes(db[i], hdmi);
+			drm_add_hdmi_modes(data, mode);
+			drm_mode_destroy(mode);
+			modes++;
+		}
+	}
+
+	return modes;
+}
+
+/*
+ * do_y420vdb_modes - Parse YCBCR 420 only modes
+ * @data: the structure that save parsed hdmi edid data
+ * @svds: start of the data block of CEA YCBCR 420 VDB
+ * @svds_len: length of the CEA YCBCR 420 VDB
+ * @hdmi: runtime information about the connected HDMI sink
+ *
+ * Parse the CEA-861-F YCBCR 420 Video Data Block (Y420VDB)
+ * which contains modes which can be supported in YCBCR 420
+ * output format only.
+ */
+static
+int do_y420vdb_modes(const u8 *svds, u8 svds_len, struct drm_hdmi_info *hdmi,
+		     struct hdmi_edid_data *data)
+{
+	int modes = 0, i, ret;
+	struct drm_display_mode *mode_buf = data->mode_buf;
+
+	for (i = 0; i < svds_len; i++) {
+		u8 vic = svd_to_vic(svds[i]);
+
+		if (!drm_valid_cea_vic(vic))
+			continue;
+
+		bitmap_set(hdmi->y420_vdb_modes, vic, 1);
+		drm_add_hdmi_modes(data, &edid_cea_modes[vic]);
+		modes++;
+	}
+
+	return modes;
+}
+
+struct stereo_mandatory_mode {
+	int width, height, vrefresh;
+	unsigned int flags;
+};
+
+static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
+	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
+	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
+	{ 1920, 1080, 50,
+	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
+	{ 1920, 1080, 60,
+	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
+	{ 1280, 720,  50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
+	{ 1280, 720,  50, DRM_MODE_FLAG_3D_FRAME_PACKING },
+	{ 1280, 720,  60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
+	{ 1280, 720,  60, DRM_MODE_FLAG_3D_FRAME_PACKING }
+};
+
+static bool
+stereo_match_mandatory(const struct drm_display_mode *mode,
+		       const struct stereo_mandatory_mode *stereo_mode)
+{
+	unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
+
+	return mode->hdisplay == stereo_mode->width &&
+	       mode->vdisplay == stereo_mode->height &&
+	       interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
+	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
+}
+
+static int add_hdmi_mandatory_stereo_modes(struct hdmi_edid_data *data)
+{
+	const struct drm_display_mode *mode;
+	int num = data->modes, modes = 0, i, k;
+
+	for (k = 0; k < num; k++) {
+		mode = &data->mode_buf[k];
+		for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
+			const struct stereo_mandatory_mode *mandatory;
+			struct drm_display_mode *new_mode;
+
+			if (!stereo_match_mandatory(mode,
+						    &stereo_mandatory_modes[i]))
+				continue;
+
+			mandatory = &stereo_mandatory_modes[i];
+			new_mode = drm_mode_create();
+			if (!new_mode)
+				continue;
+
+			*new_mode = *mode;
+			new_mode->flags |= mandatory->flags;
+			drm_add_hdmi_modes(data, new_mode);
+			drm_mode_destroy(new_mode);
+			modes++;
+		}
+	}
+
+	return modes;
+}
+
+static int add_3d_struct_modes(struct hdmi_edid_data *data, u16 structure,
+			       const u8 *video_db, u8 video_len, u8 video_index)
+{
+	struct drm_display_mode *newmode;
+	int modes = 0;
+
+	if (structure & (1 << 0)) {
+		newmode = drm_display_mode_from_vic_index(video_db,
+							  video_len,
+							  video_index);
+		if (newmode) {
+			newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+	if (structure & (1 << 6)) {
+		newmode = drm_display_mode_from_vic_index(video_db,
+							  video_len,
+							  video_index);
+		if (newmode) {
+			newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+	if (structure & (1 << 8)) {
+		newmode = drm_display_mode_from_vic_index(video_db,
+							  video_len,
+							  video_index);
+		if (newmode) {
+			newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+
+	return modes;
+}
+
+static int add_hdmi_mode(struct hdmi_edid_data *data, u8 vic)
+{
+	struct drm_display_mode *newmode;
+
+	if (!drm_valid_hdmi_vic(vic)) {
+		debug("Unknown HDMI VIC: %d\n", vic);
+		return 0;
+	}
+
+	drm_add_hdmi_modes(data, &edid_4k_modes[vic]);
+
+	return 1;
+}
+
+/*
+ * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
+ * @db: start of the CEA vendor specific block
+ * @len: length of the CEA block payload, ie. one can access up to db[len]
+ *
+ * Parses the HDMI VSDB looking for modes to add to @data. This function
+ * also adds the stereo 3d modes when applicable.
+ */
+static int
+do_hdmi_vsdb_modes(const u8 *db, u8 len, const u8 *video_db, u8 video_len,
+		   struct hdmi_edid_data *data)
+{
+	int modes = 0, offset = 0, i, multi_present = 0, multi_len;
+	u8 vic_len, hdmi_3d_len = 0;
+	u16 mask;
+	u16 structure_all;
+
+	if (len < 8)
+		goto out;
+
+	/* no HDMI_Video_Present */
+	if (!(db[8] & (1 << 5)))
+		goto out;
+
+	/* Latency_Fields_Present */
+	if (db[8] & (1 << 7))
+		offset += 2;
+
+	/* I_Latency_Fields_Present */
+	if (db[8] & (1 << 6))
+		offset += 2;
+
+	/* the declared length is not long enough for the 2 first bytes
+	 * of additional video format capabilities
+	 */
+	if (len < (8 + offset + 2))
+		goto out;
+
+	/* 3D_Present */
+	offset++;
+	if (db[8 + offset] & (1 << 7)) {
+		modes += add_hdmi_mandatory_stereo_modes(data);
+
+		/* 3D_Multi_present */
+		multi_present = (db[8 + offset] & 0x60) >> 5;
+	}
+
+	offset++;
+	vic_len = db[8 + offset] >> 5;
+	hdmi_3d_len = db[8 + offset] & 0x1f;
+
+	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
+		u8 vic;
+
+		vic = db[9 + offset + i];
+		modes += add_hdmi_mode(data, vic);
+	}
+
+	offset += 1 + vic_len;
+
+	if (multi_present == 1)
+		multi_len = 2;
+	else if (multi_present == 2)
+		multi_len = 4;
+	else
+		multi_len = 0;
+
+	if (len < (8 + offset + hdmi_3d_len - 1))
+		goto out;
+
+	if (hdmi_3d_len < multi_len)
+		goto out;
+
+	if (multi_present == 1 || multi_present == 2) {
+		/* 3D_Structure_ALL */
+		structure_all = (db[8 + offset] << 8) | db[9 + offset];
+
+		/* check if 3D_MASK is present */
+		if (multi_present == 2)
+			mask = (db[10 + offset] << 8) | db[11 + offset];
+		else
+			mask = 0xffff;
+
+		for (i = 0; i < 16; i++) {
+			if (mask & (1 << i))
+				modes += add_3d_struct_modes(data,
+						structure_all,
+						video_db,
+						video_len, i);
+		}
+	}
+
+	offset += multi_len;
+
+	for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
+		int vic_index;
+		struct drm_display_mode *newmode = NULL;
+		unsigned int newflag = 0;
+		bool detail_present;
+
+		detail_present = ((db[8 + offset + i] & 0x0f) > 7);
+
+		if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
+			break;
+
+		/* 2D_VIC_order_X */
+		vic_index = db[8 + offset + i] >> 4;
+
+		/* 3D_Structure_X */
+		switch (db[8 + offset + i] & 0x0f) {
+		case 0:
+			newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
+			break;
+		case 6:
+			newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
+			break;
+		case 8:
+			/* 3D_Detail_X */
+			if ((db[9 + offset + i] >> 4) == 1)
+				newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
+			break;
+		}
+
+		if (newflag != 0) {
+			newmode = drm_display_mode_from_vic_index(
+								  video_db,
+								  video_len,
+								  vic_index);
+
+			if (newmode) {
+				newmode->flags |= newflag;
+				drm_add_hdmi_modes(data, newmode);
+				modes++;
+				drm_mode_destroy(newmode);
+			}
+		}
+
+		if (detail_present)
+			i++;
+	}
+
+out:
+	return modes;
+}
+
+/**
+ * edid_get_quirks - return quirk flags for a given EDID
+ * @edid: EDID to process
+ *
+ * This tells subsequent routines what fixes they need to apply.
+ */
+static u32 edid_get_quirks(struct edid *edid)
+{
+	struct edid_quirk *quirk;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
+		quirk = &edid_quirk_list[i];
+
+		if (edid_vendor(edid, quirk->vendor) &&
+		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
+			return quirk->quirks;
+	}
+
+	return 0;
+}
+
+static void drm_parse_y420cmdb_bitmap(struct hdmi_edid_data *data,
+				      const u8 *db)
+{
+	struct drm_display_info *info = &data->display_info;
+	struct drm_hdmi_info *hdmi = &info->hdmi;
+	u8 map_len = cea_db_payload_len(db) - 1;
+	u8 count;
+	u64 map = 0;
+
+	if (map_len == 0) {
+		/* All CEA modes support ycbcr420 sampling also.*/
+		hdmi->y420_cmdb_map = U64_MAX;
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB420;
+		return;
+	}
+
+	/*
+	 * This map indicates which of the existing CEA block modes
+	 * from VDB can support YCBCR420 output too. So if bit=0 is
+	 * set, first mode from VDB can support YCBCR420 output too.
+	 * We will parse and keep this map, before parsing VDB itself
+	 * to avoid going through the same block again and again.
+	 *
+	 * Spec is not clear about max possible size of this block.
+	 * Clamping max bitmap block size at 8 bytes. Every byte can
+	 * address 8 CEA modes, in this way this map can address
+	 * 8*8 = first 64 SVDs.
+	 */
+	if (map_len > 8)
+		map_len = 8;
+
+	for (count = 0; count < map_len; count++)
+		map |= (u64)db[2 + count] << (8 * count);
+
+	if (map)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB420;
+
+	hdmi->y420_cmdb_map = map;
+}
+
+static void drm_parse_ycbcr420_deep_color_info(struct hdmi_edid_data *data,
+					       const u8 *db)
+{
+	u8 dc_mask;
+	struct drm_hdmi_info *hdmi = &data->display_info.hdmi;
+
+	dc_mask = db[7] & DRM_EDID_YCBCR420_DC_MASK;
+	hdmi->y420_dc_modes |= dc_mask;
+}
+
+static void drm_parse_hdmi_forum_vsdb(struct hdmi_edid_data *data,
+				      const u8 *hf_vsdb)
+{
+	struct drm_display_info *display = &data->display_info;
+	struct drm_hdmi_info *hdmi = &display->hdmi;
+
+	if (hf_vsdb[6] & 0x80) {
+		hdmi->scdc.supported = true;
+		if (hf_vsdb[6] & 0x40)
+			hdmi->scdc.read_request = true;
+	}
+
+	/*
+	 * All HDMI 2.0 monitors must support scrambling at rates > 340 MHz.
+	 * And as per the spec, three factors confirm this:
+	 * * Availability of a HF-VSDB block in EDID (check)
+	 * * Non zero Max_TMDS_Char_Rate filed in HF-VSDB (let's check)
+	 * * SCDC support available (let's check)
+	 * Lets check it out.
+	 */
+
+	if (hf_vsdb[5]) {
+		/* max clock is 5000 KHz times block value */
+		u32 max_tmds_clock = hf_vsdb[5] * 5000;
+		struct drm_scdc *scdc = &hdmi->scdc;
+
+		if (max_tmds_clock > 340000) {
+			display->max_tmds_clock = max_tmds_clock;
+			debug("HF-VSDB: max TMDS clock %d kHz\n",
+			      display->max_tmds_clock);
+		}
+
+		if (scdc->supported) {
+			scdc->scrambling.supported = true;
+
+			/* Few sinks support scrambling for cloks < 340M */
+			if ((hf_vsdb[6] & 0x8))
+				scdc->scrambling.low_rates = true;
+		}
+	}
+
+	drm_parse_ycbcr420_deep_color_info(data, hf_vsdb);
+}
+
+static void drm_parse_hdmi_deep_color_info(struct hdmi_edid_data *data,
+					   const u8 *hdmi)
+{
+	struct drm_display_info *info = &data->display_info;
+	unsigned int dc_bpc = 0;
+
+	/* HDMI supports at least 8 bpc */
+	info->bpc = 8;
+
+	if (cea_db_payload_len(hdmi) < 6)
+		return;
+
+	if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
+		dc_bpc = 10;
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
+		debug("HDMI sink does deep color 30.\n");
+	}
+
+	if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
+		dc_bpc = 12;
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
+		debug("HDMI sink does deep color 36.\n");
+	}
+
+	if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
+		dc_bpc = 16;
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
+		debug("HDMI sink does deep color 48.\n");
+	}
+
+	if (dc_bpc == 0) {
+		debug("No deep color support on this HDMI sink.\n");
+		return;
+	}
+
+	debug("Assigning HDMI sink color depth as %d bpc.\n", dc_bpc);
+	info->bpc = dc_bpc;
+
+	/* YCRCB444 is optional according to spec. */
+	if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
+		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_Y444;
+		debug("HDMI sink does YCRCB444 in deep color.\n");
+	}
+
+	/*
+	 * Spec says that if any deep color mode is supported at all,
+	 * then deep color 36 bit must be supported.
+	 */
+	if (!(hdmi[6] & DRM_EDID_HDMI_DC_36))
+		debug("HDMI sink should do DC_36, but does not!\n");
+}
+
+/*
+ * Search EDID for CEA extension block.
+ */
+static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
+{
+	u8 *edid_ext = NULL;
+	int i;
+
+	/* No EDID or EDID extensions */
+	if (!edid || !edid->extensions)
+		return NULL;
+
+	/* Find CEA extension */
+	for (i = 0; i < edid->extensions; i++) {
+		edid_ext = (u8 *)edid + EDID_SIZE * (i + 1);
+		if (edid_ext[0] == ext_id)
+			break;
+	}
+
+	if (i == edid->extensions)
+		return NULL;
+
+	return edid_ext;
+}
+
+static u8 *drm_find_cea_extension(struct edid *edid)
+{
+	return drm_find_edid_extension(edid, 0x02);
+}
+
+#define AUDIO_BLOCK	0x01
+#define VIDEO_BLOCK     0x02
+#define VENDOR_BLOCK    0x03
+#define SPEAKER_BLOCK	0x04
+#define EDID_BASIC_AUDIO BIT(6)
+
+/**
+ * drm_detect_hdmi_monitor - detect whether monitor is HDMI
+ * @edid: monitor EDID information
+ *
+ * Parse the CEA extension according to CEA-861-B.
+ *
+ * Return: True if the monitor is HDMI, false if not or unknown.
+ */
+bool drm_detect_hdmi_monitor(struct edid *edid)
+{
+	u8 *edid_ext;
+	int i;
+	int start_offset, end_offset;
+
+	edid_ext = drm_find_cea_extension(edid);
+	if (!edid_ext)
+		return false;
+
+	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
+		return false;
+
+	/*
+	 * Because HDMI identifier is in Vendor Specific Block,
+	 * search it from all data blocks of CEA extension.
+	 */
+	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
+		if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
+			return true;
+	}
+
+	return false;
+}
+
+/**
+ * drm_detect_monitor_audio - check monitor audio capability
+ * @edid: EDID block to scan
+ *
+ * Monitor should have CEA extension block.
+ * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
+ * audio' only. If there is any audio extension block and supported
+ * audio format, assume at least 'basic audio' support, even if 'basic
+ * audio' is not defined in EDID.
+ *
+ * Return: True if the monitor supports audio, false otherwise.
+ */
+bool drm_detect_monitor_audio(struct edid *edid)
+{
+	u8 *edid_ext;
+	int i, j;
+	bool has_audio = false;
+	int start_offset, end_offset;
+
+	edid_ext = drm_find_cea_extension(edid);
+	if (!edid_ext)
+		goto end;
+
+	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
+
+	if (has_audio) {
+		printf("Monitor has basic audio support\n");
+		goto end;
+	}
+
+	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
+		goto end;
+
+	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
+		if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
+			has_audio = true;
+			for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1;
+			     j += 3)
+				debug("CEA audio format %d\n",
+				      (edid_ext[i + j] >> 3) & 0xf);
+			goto end;
+		}
+	}
+end:
+	return has_audio;
+}
+
+static void
+drm_parse_hdmi_vsdb_video(struct hdmi_edid_data *data, const u8 *db)
+{
+	struct drm_display_info *info = &data->display_info;
+	u8 len = cea_db_payload_len(db);
+
+	if (len >= 6)
+		info->dvi_dual = db[6] & 1;
+	if (len >= 7)
+		info->max_tmds_clock = db[7] * 5000;
+
+	drm_parse_hdmi_deep_color_info(data, db);
+}
+
+static void drm_parse_cea_ext(struct hdmi_edid_data *data,
+			      struct edid *edid)
+{
+	struct drm_display_info *info = &data->display_info;
+	const u8 *edid_ext;
+	int i, start, end;
+
+	edid_ext = drm_find_cea_extension(edid);
+	if (!edid_ext)
+		return;
+
+	info->cea_rev = edid_ext[1];
+
+	/* The existence of a CEA block should imply RGB support */
+	info->color_formats = DRM_COLOR_FORMAT_RGB444;
+	if (edid_ext[3] & EDID_CEA_YCRCB444)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
+	if (edid_ext[3] & EDID_CEA_YCRCB422)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
+
+	if (cea_db_offsets(edid_ext, &start, &end))
+		return;
+
+	for_each_cea_db(edid_ext, i, start, end) {
+		const u8 *db = &edid_ext[i];
+
+		if (cea_db_is_hdmi_vsdb(db))
+			drm_parse_hdmi_vsdb_video(data, db);
+		if (cea_db_is_hdmi_forum_vsdb(db))
+			drm_parse_hdmi_forum_vsdb(data, db);
+		if (cea_db_is_y420cmdb(db))
+			drm_parse_y420cmdb_bitmap(data, db);
+	}
+}
+
+static void drm_add_display_info(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct drm_display_info *info = &data->display_info;
+
+	info->width_mm = edid->width_cm * 10;
+	info->height_mm = edid->height_cm * 10;
+
+	/* driver figures it out in this case */
+	info->bpc = 0;
+	info->color_formats = 0;
+	info->cea_rev = 0;
+	info->max_tmds_clock = 0;
+	info->dvi_dual = false;
+	info->edid_hdmi_dc_modes = 0;
+
+	memset(&info->hdmi, 0, sizeof(info->hdmi));
+
+	if (edid->revision < 3)
+		return;
+
+	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
+		return;
+
+	drm_parse_cea_ext(data, edid);
+
+	/*
+	 * Digital sink with "DFP 1.x compliant TMDS" according to EDID 1.3?
+	 *
+	 * For such displays, the DFP spec 1.0, section 3.10 "EDID support"
+	 * tells us to assume 8 bpc color depth if the EDID doesn't have
+	 * extensions which tell otherwise.
+	 */
+	if ((info->bpc == 0) && (edid->revision < 4) &&
+	    (edid->input & DRM_EDID_DIGITAL_TYPE_DVI)) {
+		info->bpc = 8;
+		debug("Assigning DFP sink color depth as %d bpc.\n", info->bpc);
+	}
+
+	/* Only defined for 1.4 with digital displays */
+	if (edid->revision < 4)
+		return;
+
+	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
+	case DRM_EDID_DIGITAL_DEPTH_6:
+		info->bpc = 6;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_8:
+		info->bpc = 8;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_10:
+		info->bpc = 10;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_12:
+		info->bpc = 12;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_14:
+		info->bpc = 14;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_16:
+		info->bpc = 16;
+		break;
+	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
+	default:
+		info->bpc = 0;
+		break;
+	}
+
+	debug("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
+	      info->bpc);
+
+	info->color_formats |= DRM_COLOR_FORMAT_RGB444;
+	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
+	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
+}
+
+static
+int add_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct edid_cea861_info *info;
+	const u8 *cea = drm_find_cea_extension(edid);
+	const u8 *db, *hdmi = NULL, *video = NULL;
+	u8 dbl, hdmi_len, video_len = 0;
+	int modes = 0;
+	u8 end, i = 0;
+
+	if (cea && cea_revision(cea) >= 3) {
+		int i, start, end;
+
+		if (cea_db_offsets(cea, &start, &end))
+			return 0;
+
+		for_each_cea_db(cea, i, start, end) {
+			db = &cea[i];
+			dbl = cea_db_payload_len(db);
+
+			if (cea_db_tag(db) == EDID_CEA861_DB_VIDEO) {
+				video = db + 1;
+				video_len = dbl;
+				modes += do_cea_modes(video, dbl,
+						      &data->hdmi_info, data);
+			} else if (cea_db_is_hdmi_vsdb(db)) {
+				hdmi = db;
+				hdmi_len = dbl;
+			} else if (cea_db_is_y420vdb(db)) {
+				const u8 *vdb420 = &db[2];
+
+				/* Add 4:2:0(only) modes present in EDID */
+				modes += do_y420vdb_modes(vdb420, dbl - 1,
+							  &data->hdmi_info,
+							  data);
+			}
+		}
+	}
+
+	/*
+	 * We parse the HDMI VSDB after having added the cea modes as we will
+	 * be patching their flags when the sink supports stereo 3D.
+	 */
+	if (hdmi)
+		modes += do_hdmi_vsdb_modes(hdmi, hdmi_len, video,
+					    video_len, data);
+
+	return modes;
+}
+
+typedef void detailed_cb(struct detailed_timing *timing, void *closure);
+
+static
+void cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+{
+	int i, n = 0;
+	u8 d = ext[0x02];
+	u8 *det_base = ext + d;
+
+	n = (127 - d) / 18;
+	for (i = 0; i < n; i++)
+		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+}
+
+static
+void vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
+{
+	unsigned int i, n = min((int)ext[0x02], 6);
+	u8 *det_base = ext + 5;
+
+	if (ext[0x01] != 1)
+		return; /* unknown version */
+
+	for (i = 0; i < n; i++)
+		cb((struct detailed_timing *)(det_base + 18 * i), closure);
+}
+
+static
+void drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
+{
+	int i;
+	struct edid *edid = (struct edid *)raw_edid;
+
+	if (!edid)
+		return;
+
+	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
+		cb(&edid->detailed_timings[i], closure);
+
+	for (i = 1; i <= raw_edid[0x7e]; i++) {
+		u8 *ext = raw_edid + (i * EDID_SIZE);
+
+		switch (*ext) {
+		case CEA_EXT:
+			cea_for_each_detailed_block(ext, cb, closure);
+			break;
+		case VTB_EXT:
+			vtb_for_each_detailed_block(ext, cb, closure);
+			break;
+		default:
+			break;
+		}
+	}
+}
+
+/*
+ * EDID is delightfully ambiguous about how interlaced modes are to be
+ * encoded.  Our internal representation is of frame height, but some
+ * HDTV detailed timings are encoded as field height.
+ *
+ * The format list here is from CEA, in frame size.  Technically we
+ * should be checking refresh rate too.  Whatever.
+ */
+static void
+drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
+			    struct detailed_pixel_timing *pt)
+{
+	int i;
+
+	static const struct {
+		int w, h;
+	} cea_interlaced[] = {
+		{ 1920, 1080 },
+		{  720,  480 },
+		{ 1440,  480 },
+		{ 2880,  480 },
+		{  720,  576 },
+		{ 1440,  576 },
+		{ 2880,  576 },
+	};
+
+	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
+		return;
+
+	for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
+		if ((mode->hdisplay == cea_interlaced[i].w) &&
+		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
+			mode->vdisplay *= 2;
+			mode->vsync_start *= 2;
+			mode->vsync_end *= 2;
+			mode->vtotal *= 2;
+			mode->vtotal |= 1;
+		}
+	}
+
+	mode->flags |= DRM_MODE_FLAG_INTERLACE;
+}
+
+/**
+ * drm_mode_detailed - create a new mode from an EDID detailed timing section
+ * @edid: EDID block
+ * @timing: EDID detailed timing info
+ * @quirks: quirks to apply
+ *
+ * An EDID detailed timing block contains enough info for us to create and
+ * return a new struct drm_display_mode.
+ */
+static
+struct drm_display_mode *drm_mode_detailed(struct edid *edid,
+					   struct detailed_timing *timing,
+					   u32 quirks)
+{
+	struct drm_display_mode *mode;
+	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
+	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
+	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
+	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
+	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
+	unsigned hsync_offset =
+		(pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 |
+		pt->hsync_offset_lo;
+	unsigned hsync_pulse_width =
+		(pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 |
+		pt->hsync_pulse_width_lo;
+	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) <<
+		2 | pt->vsync_offset_pulse_width_lo >> 4;
+	unsigned vsync_pulse_width =
+		(pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 |
+		(pt->vsync_offset_pulse_width_lo & 0xf);
+
+	/* ignore tiny modes */
+	if (hactive < 64 || vactive < 64)
+		return NULL;
+
+	if (pt->misc & DRM_EDID_PT_STEREO) {
+		debug("stereo mode not supported\n");
+		return NULL;
+	}
+	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC))
+		debug("composite sync not supported\n");
+
+	/* it is incorrect if hsync/vsync width is zero */
+	if (!hsync_pulse_width || !vsync_pulse_width) {
+		debug("Incorrect Detailed timing. "
+		      "Wrong Hsync/Vsync pulse width\n");
+		return NULL;
+	}
+
+	if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
+		mode = drm_cvt_mode(hactive, vactive, 60, true, false, false);
+		if (!mode)
+			return NULL;
+
+		goto set_refresh;
+	}
+
+	mode = drm_mode_create();
+	if (!mode)
+		return NULL;
+
+	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
+		timing->pixel_clock = cpu_to_le16(1088);
+
+	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+
+	mode->hdisplay = hactive;
+	mode->hsync_start = mode->hdisplay + hsync_offset;
+	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
+	mode->htotal = mode->hdisplay + hblank;
+
+	mode->vdisplay = vactive;
+	mode->vsync_start = mode->vdisplay + vsync_offset;
+	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
+	mode->vtotal = mode->vdisplay + vblank;
+
+	/* Some EDIDs have bogus h/vtotal values */
+	if (mode->hsync_end > mode->htotal)
+		mode->htotal = mode->hsync_end + 1;
+	if (mode->vsync_end > mode->vtotal)
+		mode->vtotal = mode->vsync_end + 1;
+
+	drm_mode_do_interlace_quirk(mode, pt);
+
+	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP)
+		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE |
+			DRM_EDID_PT_VSYNC_POSITIVE;
+
+	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
+		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
+		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+set_refresh:
+
+	mode->vrefresh = drm_mode_vrefresh(mode);
+
+	return mode;
+}
+
+/*
+ * Calculate the alternate clock for the CEA mode
+ * (60Hz vs. 59.94Hz etc.)
+ */
+static unsigned int
+cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
+{
+	unsigned int clock = cea_mode->clock;
+
+	if (cea_mode->vrefresh % 6 != 0)
+		return clock;
+
+	/*
+	 * edid_cea_modes contains the 59.94Hz
+	 * variant for 240 and 480 line modes,
+	 * and the 60Hz variant otherwise.
+	 */
+	if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
+		clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
+	else
+		clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
+
+	return clock;
+}
+
+/**
+ * drm_mode_equal_no_clocks_no_stereo - test modes for equality
+ * @mode1: first mode
+ * @mode2: second mode
+ *
+ * Check to see if @mode1 and @mode2 are equivalent, but
+ * don't check the pixel clocks nor the stereo layout.
+ *
+ * Returns:
+ * True if the modes are equal, false otherwise.
+ */
+
+static
+bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
+					const struct drm_display_mode *mode2)
+{
+	unsigned int flags_mask =
+		~(DRM_MODE_FLAG_3D_MASK | DRM_MODE_FLAG_420_MASK);
+
+	if (mode1->hdisplay == mode2->hdisplay &&
+	    mode1->hsync_start == mode2->hsync_start &&
+	    mode1->hsync_end == mode2->hsync_end &&
+	    mode1->htotal == mode2->htotal &&
+	    mode1->vdisplay == mode2->vdisplay &&
+	    mode1->vsync_start == mode2->vsync_start &&
+	    mode1->vsync_end == mode2->vsync_end &&
+	    mode1->vtotal == mode2->vtotal &&
+	    mode1->vscan == mode2->vscan &&
+	    (mode1->flags & flags_mask) == (mode2->flags & flags_mask))
+		return true;
+
+	return false;
+}
+
+/**
+ * drm_mode_equal_no_clocks - test modes for equality
+ * @mode1: first mode
+ * @mode2: second mode
+ *
+ * Check to see if @mode1 and @mode2 are equivalent, but
+ * don't check the pixel clocks.
+ *
+ * Returns:
+ * True if the modes are equal, false otherwise.
+ */
+static bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1,
+				     const struct drm_display_mode *mode2)
+{
+	if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
+	    (mode2->flags & DRM_MODE_FLAG_3D_MASK))
+		return false;
+
+	return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
+}
+
+static
+u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
+				      unsigned int clock_tolerance)
+{
+	u8 vic;
+
+	if (!to_match->clock)
+		return 0;
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
+		const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Check both 60Hz and 59.94Hz */
+		clock1 = cea_mode->clock;
+		clock2 = cea_mode_alternate_clock(cea_mode);
+
+		if (abs(to_match->clock - clock1) > clock_tolerance &&
+		    abs(to_match->clock - clock2) > clock_tolerance)
+			continue;
+
+		if (drm_mode_equal_no_clocks(to_match, cea_mode))
+			return vic;
+	}
+
+	return 0;
+}
+
+static unsigned int
+hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
+{
+	if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
+		return hdmi_mode->clock;
+
+	return cea_mode_alternate_clock(hdmi_mode);
+}
+
+static
+u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
+				       unsigned int clock_tolerance)
+{
+	u8 vic;
+
+	if (!to_match->clock)
+		return 0;
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
+		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Make sure to also match alternate clocks */
+		clock1 = hdmi_mode->clock;
+		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
+
+		if (abs(to_match->clock - clock1) > clock_tolerance &&
+		    abs(to_match->clock - clock2) > clock_tolerance)
+			continue;
+
+		if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
+			return vic;
+	}
+
+	return 0;
+}
+
+static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
+{
+	const struct drm_display_mode *cea_mode;
+	int clock1, clock2, clock;
+	u8 vic;
+	const char *type;
+
+	/*
+	 * allow 5kHz clock difference either way to account for
+	 * the 10kHz clock resolution limit of detailed timings.
+	 */
+	vic = drm_match_cea_mode_clock_tolerance(mode, 5);
+	if (drm_valid_cea_vic(vic)) {
+		type = "CEA";
+		cea_mode = &edid_cea_modes[vic];
+		clock1 = cea_mode->clock;
+		clock2 = cea_mode_alternate_clock(cea_mode);
+	} else {
+		vic = drm_match_hdmi_mode_clock_tolerance(mode, 5);
+		if (drm_valid_hdmi_vic(vic)) {
+			type = "HDMI";
+			cea_mode = &edid_4k_modes[vic];
+			clock1 = cea_mode->clock;
+			clock2 = hdmi_mode_alternate_clock(cea_mode);
+		} else {
+			return;
+		}
+	}
+
+	/* pick whichever is closest */
+	if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
+		clock = clock1;
+	else
+		clock = clock2;
+
+	if (mode->clock == clock)
+		return;
+
+	debug("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
+	      type, vic, mode->clock, clock);
+	mode->clock = clock;
+}
+
+static void
+do_detailed_mode(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct drm_display_mode *newmode;
+
+	if (timing->pixel_clock) {
+		newmode = drm_mode_detailed(
+					    closure->edid, timing,
+					    closure->quirks);
+		if (!newmode)
+			return;
+
+		/*
+		 * Detailed modes are limited to 10kHz pixel clock resolution,
+		 * so fix up anything that looks like CEA/HDMI mode,
+		 * but the clock is just slightly off.
+		 */
+		fixup_detailed_cea_mode_clock(newmode);
+		drm_add_hdmi_modes(closure->data, newmode);
+		drm_mode_destroy(newmode);
+		closure->modes++;
+	}
+}
+
+/*
+ * add_detailed_modes - Add modes from detailed timings
+ * @data: attached data
+ * @edid: EDID block to scan
+ * @quirks: quirks to apply
+ */
+static int
+add_detailed_modes(struct hdmi_edid_data *data, struct edid *edid,
+		   u32 quirks)
+{
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+		.quirks = quirks,
+	};
+
+	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
+
+	return closure.modes;
+}
+
+static int drm_cvt_modes(struct hdmi_edid_data *data,
+			 struct detailed_timing *timing)
+{
+	int i, j, modes = 0;
+	struct drm_display_mode *newmode;
+	struct cvt_timing *cvt;
+	const int rates[] = { 60, 85, 75, 60, 50 };
+	const u8 empty[3] = { 0, 0, 0 };
+
+	for (i = 0; i < 4; i++) {
+		int uninitialized_var(width), height;
+
+		cvt = &timing->data.other_data.data.cvt[i];
+
+		if (!memcmp(cvt->code, empty, 3))
+			continue;
+
+		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
+		switch (cvt->code[1] & 0x0c) {
+		case 0x00:
+			width = height * 4 / 3;
+			break;
+		case 0x04:
+			width = height * 16 / 9;
+			break;
+		case 0x08:
+			width = height * 16 / 10;
+			break;
+		case 0x0c:
+			width = height * 15 / 9;
+			break;
+		}
+
+		for (j = 1; j < 5; j++) {
+			if (cvt->code[2] & (1 << j)) {
+				newmode = drm_cvt_mode(width, height,
+						       rates[j], j == 0,
+						       false, false);
+				if (newmode) {
+					drm_add_hdmi_modes(data, newmode);
+					modes++;
+					drm_mode_destroy(newmode);
+				}
+			}
+		}
+	}
+
+	return modes;
+}
+
+static void
+do_cvt_mode(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+
+	if (data->type == EDID_DETAIL_CVT_3BYTE)
+		closure->modes += drm_cvt_modes(closure->data, timing);
+}
+
+static int
+add_cvt_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	if (version_greater(edid, 1, 2))
+		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
+
+	/* XXX should also look for CVT codes in VTB blocks */
+
+	return closure.modes;
+}
+
+static void
+find_gtf2(struct detailed_timing *t, void *data)
+{
+	u8 *r = (u8 *)t;
+
+	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
+		*(u8 **)data = r;
+}
+
+/* Secondary GTF curve kicks in above some break frequency */
+static int
+drm_gtf2_hbreak(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? (r[12] * 2) : 0;
+}
+
+static int
+drm_gtf2_2c(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? r[13] : 0;
+}
+
+static int
+drm_gtf2_m(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? (r[15] << 8) + r[14] : 0;
+}
+
+static int
+drm_gtf2_k(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? r[16] : 0;
+}
+
+static int
+drm_gtf2_2j(struct edid *edid)
+{
+	u8 *r = NULL;
+
+	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
+	return r ? r[17] : 0;
+}
+
+/**
+ * standard_timing_level - get std. timing level(CVT/GTF/DMT)
+ * @edid: EDID block to scan
+ */
+static int standard_timing_level(struct edid *edid)
+{
+	if (edid->revision >= 2) {
+		if (edid->revision >= 4 &&
+		    (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
+			return LEVEL_CVT;
+		if (drm_gtf2_hbreak(edid))
+			return LEVEL_GTF2;
+		return LEVEL_GTF;
+	}
+	return LEVEL_DMT;
+}
+
+/*
+ * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
+ * monitors fill with ascii space (0x20) instead.
+ */
+static int
+bad_std_timing(u8 a, u8 b)
+{
+	return (a == 0x00 && b == 0x00) ||
+	       (a == 0x01 && b == 0x01) ||
+	       (a == 0x20 && b == 0x20);
+}
+
+static void
+is_rb(struct detailed_timing *t, void *data)
+{
+	u8 *r = (u8 *)t;
+
+	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
+		if (r[15] & 0x10)
+			*(bool *)data = true;
+}
+
+/* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
+static bool
+drm_monitor_supports_rb(struct edid *edid)
+{
+	if (edid->revision >= 4) {
+		bool ret = false;
+
+		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
+		return ret;
+	}
+
+	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
+}
+
+static bool
+mode_is_rb(const struct drm_display_mode *mode)
+{
+	return (mode->htotal - mode->hdisplay == 160) &&
+	       (mode->hsync_end - mode->hdisplay == 80) &&
+	       (mode->hsync_end - mode->hsync_start == 32) &&
+	       (mode->vsync_start - mode->vdisplay == 3);
+}
+
+/*
+ * drm_mode_find_dmt - Create a copy of a mode if present in DMT
+ * @hsize: Mode width
+ * @vsize: Mode height
+ * @fresh: Mode refresh rate
+ * @rb: Mode reduced-blanking-ness
+ *
+ * Walk the DMT mode list looking for a match for the given parameters.
+ *
+ * Return: A newly allocated copy of the mode, or NULL if not found.
+ */
+static struct drm_display_mode *drm_mode_find_dmt(
+					   int hsize, int vsize, int fresh,
+					   bool rb)
+{
+	int i;
+	struct drm_display_mode *newmode;
+
+	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
+		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
+
+		if (hsize != ptr->hdisplay)
+			continue;
+		if (vsize != ptr->vdisplay)
+			continue;
+		if (fresh != drm_mode_vrefresh(ptr))
+			continue;
+		if (rb != mode_is_rb(ptr))
+			continue;
+
+		newmode = drm_mode_create();
+		*newmode = *ptr;
+		return newmode;
+	}
+
+	return NULL;
+}
+
+static struct drm_display_mode *
+drm_gtf_mode_complex(int hdisplay, int vdisplay,
+		     int vrefresh, bool interlaced, int margins,
+		     int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
+{	/* 1) top/bottom margin size (% of height) - default: 1.8, */
+#define	GTF_MARGIN_PERCENTAGE		18
+	/* 2) character cell horizontal granularity (pixels) - default 8 */
+#define	GTF_CELL_GRAN			8
+	/* 3) Minimum vertical porch (lines) - default 3 */
+#define	GTF_MIN_V_PORCH			1
+	/* width of vsync in lines */
+#define V_SYNC_RQD			3
+	/* width of hsync as % of total line */
+#define H_SYNC_PERCENT			8
+	/* min time of vsync + back porch (microsec) */
+#define MIN_VSYNC_PLUS_BP		550
+	/* C' and M' are part of the Blanking Duty Cycle computation */
+#define GTF_C_PRIME	((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
+#define GTF_M_PRIME	(GTF_K * GTF_M / 256)
+	struct drm_display_mode *drm_mode;
+	unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
+	int top_margin, bottom_margin;
+	int interlace;
+	unsigned int hfreq_est;
+	int vsync_plus_bp, vback_porch;
+	unsigned int vtotal_lines, vfieldrate_est, hperiod;
+	unsigned int vfield_rate, vframe_rate;
+	int left_margin, right_margin;
+	unsigned int total_active_pixels, ideal_duty_cycle;
+	unsigned int hblank, total_pixels, pixel_freq;
+	int hsync, hfront_porch, vodd_front_porch_lines;
+	unsigned int tmp1, tmp2;
+
+	drm_mode = drm_mode_create();
+	if (!drm_mode)
+		return NULL;
+
+	/* 1. In order to give correct results, the number of horizontal
+	 * pixels requested is first processed to ensure that it is divisible
+	 * by the character size, by rounding it to the nearest character
+	 * cell boundary:
+	 */
+	hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
+	hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
+
+	/* 2. If interlace is requested, the number of vertical lines assumed
+	 * by the calculation must be halved, as the computation calculates
+	 * the number of vertical lines per field.
+	 */
+	if (interlaced)
+		vdisplay_rnd = vdisplay / 2;
+	else
+		vdisplay_rnd = vdisplay;
+
+	/* 3. Find the frame rate required: */
+	if (interlaced)
+		vfieldrate_rqd = vrefresh * 2;
+	else
+		vfieldrate_rqd = vrefresh;
+
+	/* 4. Find number of lines in Top margin: */
+	top_margin = 0;
+	if (margins)
+		top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
+				1000;
+	/* 5. Find number of lines in bottom margin: */
+	bottom_margin = top_margin;
+
+	/* 6. If interlace is required, then set variable interlace: */
+	if (interlaced)
+		interlace = 1;
+	else
+		interlace = 0;
+
+	/* 7. Estimate the Horizontal frequency */
+	{
+		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
+		tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
+				2 + interlace;
+		hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
+	}
+
+	/* 8. Find the number of lines in V sync + back porch */
+	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
+	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
+	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
+	/*  9. Find the number of lines in V back porch alone: */
+	vback_porch = vsync_plus_bp - V_SYNC_RQD;
+	/*  10. Find the total number of lines in Vertical field period: */
+	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
+			vsync_plus_bp + GTF_MIN_V_PORCH;
+	/*  11. Estimate the Vertical field frequency: */
+	vfieldrate_est = hfreq_est / vtotal_lines;
+	/*  12. Find the actual horizontal period: */
+	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
+
+	/*  13. Find the actual Vertical field frequency: */
+	vfield_rate = hfreq_est / vtotal_lines;
+	/*  14. Find the Vertical frame frequency: */
+	if (interlaced)
+		vframe_rate = vfield_rate / 2;
+	else
+		vframe_rate = vfield_rate;
+	/*  15. Find number of pixels in left margin: */
+	if (margins)
+		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
+				1000;
+	else
+		left_margin = 0;
+
+	/* 16.Find number of pixels in right margin: */
+	right_margin = left_margin;
+	/* 17.Find total number of active pixels in image and left and right */
+	total_active_pixels = hdisplay_rnd + left_margin + right_margin;
+	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
+	ideal_duty_cycle = GTF_C_PRIME * 1000 -
+				(GTF_M_PRIME * 1000000 / hfreq_est);
+	/* 19.Find the number of pixels in the blanking time to the nearest
+	 * double character cell:
+	 */
+	hblank = total_active_pixels * ideal_duty_cycle /
+			(100000 - ideal_duty_cycle);
+	hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
+	hblank = hblank * 2 * GTF_CELL_GRAN;
+	/* 20.Find total number of pixels: */
+	total_pixels = total_active_pixels + hblank;
+	/* 21.Find pixel clock frequency: */
+	pixel_freq = total_pixels * hfreq_est / 1000;
+	/* Stage 1 computations are now complete; I should really pass
+	 * the results to another function and do the Stage 2 computations,
+	 * but I only need a few more values so I'll just append the
+	 * computations here for now
+	 */
+
+	/* 17. Find the number of pixels in the horizontal sync period: */
+	hsync = H_SYNC_PERCENT * total_pixels / 100;
+	hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
+	hsync = hsync * GTF_CELL_GRAN;
+	/* 18. Find the number of pixels in horizontal front porch period */
+	hfront_porch = hblank / 2 - hsync;
+	/*  36. Find the number of lines in the odd front porch period: */
+	vodd_front_porch_lines = GTF_MIN_V_PORCH;
+
+	/* finally, pack the results in the mode struct */
+	drm_mode->hdisplay = hdisplay_rnd;
+	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
+	drm_mode->hsync_end = drm_mode->hsync_start + hsync;
+	drm_mode->htotal = total_pixels;
+	drm_mode->vdisplay = vdisplay_rnd;
+	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
+	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
+	drm_mode->vtotal = vtotal_lines;
+
+	drm_mode->clock = pixel_freq;
+
+	if (interlaced) {
+		drm_mode->vtotal *= 2;
+		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
+	}
+
+	if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
+		drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
+	else
+		drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
+
+	return drm_mode;
+}
+
+/**
+ * drm_gtf_mode - create the mode based on the GTF algorithm
+ * @hdisplay: hdisplay size
+ * @vdisplay: vdisplay size
+ * @vrefresh: vrefresh rate.
+ * @interlaced: whether to compute an interlaced mode
+ * @margins: desired margin (borders) size
+ *
+ * return the mode based on GTF algorithm
+ *
+ * This function is to create the mode based on the GTF algorithm.
+ * Generalized Timing Formula is derived from:
+ *	GTF Spreadsheet by Andy Morrish (1/5/97)
+ *	available at http://www.vesa.org
+ *
+ * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
+ * What I have done is to translate it by using integer calculation.
+ * I also refer to the function of fb_get_mode in the file of
+ * drivers/video/fbmon.c
+ *
+ * Standard GTF parameters:
+ * M = 600
+ * C = 40
+ * K = 128
+ * J = 20
+ *
+ * Returns:
+ * The modeline based on the GTF algorithm stored in a drm_display_mode object.
+ * The display mode object is allocated with drm_mode_create(). Returns NULL
+ * when no mode could be allocated.
+ */
+static struct drm_display_mode *
+drm_gtf_mode(int hdisplay, int vdisplay, int vrefresh,
+	     bool interlaced, int margins)
+{
+	return drm_gtf_mode_complex(hdisplay, vdisplay, vrefresh,
+				    interlaced, margins,
+				    600, 40 * 2, 128, 20 * 2);
+}
+
+/** drm_mode_hsync - get the hsync of a mode
+ * @mode: mode
+ *
+ * Returns:
+ * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the
+ * value first if it is not yet set.
+ */
+static int drm_mode_hsync(const struct drm_display_mode *mode)
+{
+	unsigned int calc_val;
+
+	if (mode->htotal < 0)
+		return 0;
+
+	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
+	calc_val += 500;				/* round to 1000Hz */
+	calc_val /= 1000;				/* truncate to kHz */
+
+	return calc_val;
+}
+
+/**
+ * drm_mode_std - convert standard mode info (width, height, refresh) into mode
+ * @data: the structure that save parsed hdmi edid data
+ * @edid: EDID block to scan
+ * @t: standard timing params
+ *
+ * Take the standard timing params (in this case width, aspect, and refresh)
+ * and convert them into a real mode using CVT/GTF/DMT.
+ */
+static struct drm_display_mode *
+drm_mode_std(struct hdmi_edid_data *data, struct edid *edid,
+	     struct std_timing *t)
+{
+	struct drm_display_mode *m, *mode = NULL;
+	int i, hsize, vsize;
+	int vrefresh_rate;
+	int num = data->modes;
+	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
+		>> EDID_TIMING_ASPECT_SHIFT;
+	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
+		>> EDID_TIMING_VFREQ_SHIFT;
+	int timing_level = standard_timing_level(edid);
+
+	if (bad_std_timing(t->hsize, t->vfreq_aspect))
+		return NULL;
+
+	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
+	hsize = t->hsize * 8 + 248;
+	/* vrefresh_rate = vfreq + 60 */
+	vrefresh_rate = vfreq + 60;
+	/* the vdisplay is calculated based on the aspect ratio */
+	if (aspect_ratio == 0) {
+		if (edid->revision < 3)
+			vsize = hsize;
+		else
+			vsize = (hsize * 10) / 16;
+	} else if (aspect_ratio == 1) {
+		vsize = (hsize * 3) / 4;
+	} else if (aspect_ratio == 2) {
+		vsize = (hsize * 4) / 5;
+	} else {
+		vsize = (hsize * 9) / 16;
+	}
+
+	/* HDTV hack, part 1 */
+	if (vrefresh_rate == 60 &&
+	    ((hsize == 1360 && vsize == 765) ||
+	     (hsize == 1368 && vsize == 769))) {
+		hsize = 1366;
+		vsize = 768;
+	}
+
+	/*
+	 * If we already has a mode for this size and refresh
+	 * rate (because it came from detailed or CVT info), use that
+	 * instead.  This way we don't have to guess at interlace or
+	 * reduced blanking.
+	 */
+	for (i = 0; i < num; i++)
+		if (data->mode_buf[i].hdisplay == hsize &&
+		    data->mode_buf[i].hdisplay &&
+		    drm_mode_vrefresh(&data->mode_buf[i]) == vrefresh_rate)
+			return NULL;
+
+	/* HDTV hack, part 2 */
+	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
+		mode = drm_cvt_mode(1366, 768, vrefresh_rate, 0, 0,
+				    false);
+		mode->hdisplay = 1366;
+		mode->hsync_start = mode->hsync_start - 1;
+		mode->hsync_end = mode->hsync_end - 1;
+		return mode;
+	}
+
+	/* check whether it can be found in default mode table */
+	if (drm_monitor_supports_rb(edid)) {
+		mode = drm_mode_find_dmt(hsize, vsize, vrefresh_rate,
+					 true);
+		if (mode)
+			return mode;
+	}
+
+	mode = drm_mode_find_dmt(hsize, vsize, vrefresh_rate, false);
+	if (mode)
+		return mode;
+
+	/* okay, generate it */
+	switch (timing_level) {
+	case LEVEL_DMT:
+		break;
+	case LEVEL_GTF:
+		mode = drm_gtf_mode(hsize, vsize, vrefresh_rate, 0, 0);
+		break;
+	case LEVEL_GTF2:
+		/*
+		 * This is potentially wrong if there's ever a monitor with
+		 * more than one ranges section, each claiming a different
+		 * secondary GTF curve.  Please don't do that.
+		 */
+		mode = drm_gtf_mode(hsize, vsize, vrefresh_rate, 0, 0);
+		if (!mode)
+			return NULL;
+		if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
+			drm_mode_destroy(mode);
+			mode = drm_gtf_mode_complex(hsize, vsize,
+						    vrefresh_rate, 0, 0,
+						    drm_gtf2_m(edid),
+						    drm_gtf2_2c(edid),
+						    drm_gtf2_k(edid),
+						    drm_gtf2_2j(edid));
+		}
+		break;
+	case LEVEL_CVT:
+		mode = drm_cvt_mode(hsize, vsize, vrefresh_rate, 0, 0,
+				    false);
+		break;
+	}
+
+	return mode;
+}
+
+static void
+do_standard_modes(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid *edid = closure->edid;
+
+	if (data->type == EDID_DETAIL_STD_MODES) {
+		int i;
+
+		for (i = 0; i < 6; i++) {
+			struct std_timing *std;
+			struct drm_display_mode *newmode;
+
+			std = &data->data.timings[i];
+			newmode = drm_mode_std(closure->data, edid, std);
+			if (newmode) {
+				drm_add_hdmi_modes(closure->data, newmode);
+				closure->modes++;
+				drm_mode_destroy(newmode);
+			}
+		}
+	}
+}
+
+/**
+ * add_standard_modes - get std. modes from EDID and add them
+ * @data: data to add mode(s) to
+ * @edid: EDID block to scan
+ *
+ * Standard modes can be calculated using the appropriate standard (DMT,
+ * GTF or CVT. Grab them from @edid and add them to the list.
+ */
+static int
+add_standard_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	int i, modes = 0;
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	for (i = 0; i < EDID_STD_TIMINGS; i++) {
+		struct drm_display_mode *newmode;
+
+		newmode = drm_mode_std(data, edid,
+				       &edid->standard_timings[i]);
+		if (newmode) {
+			drm_add_hdmi_modes(data, newmode);
+			modes++;
+			drm_mode_destroy(newmode);
+		}
+	}
+
+	if (version_greater(edid, 1, 0))
+		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
+					    &closure);
+
+	/* XXX should also look for standard codes in VTB blocks */
+
+	return modes + closure.modes;
+}
+
+static int
+drm_est3_modes(struct hdmi_edid_data *data, struct detailed_timing *timing)
+{
+	int i, j, m, modes = 0;
+	struct drm_display_mode *mode;
+	u8 *est = ((u8 *)timing) + 6;
+
+	for (i = 0; i < 6; i++) {
+		for (j = 7; j >= 0; j--) {
+			m = (i * 8) + (7 - j);
+			if (m >= ARRAY_SIZE(est3_modes))
+				break;
+			if (est[i] & (1 << j)) {
+				mode = drm_mode_find_dmt(
+							 est3_modes[m].w,
+							 est3_modes[m].h,
+							 est3_modes[m].r,
+							 est3_modes[m].rb);
+				if (mode) {
+					drm_add_hdmi_modes(data, mode);
+					modes++;
+					drm_mode_destroy(mode);
+				}
+			}
+		}
+	}
+
+	return modes;
+}
+
+static void
+do_established_modes(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+
+	if (data->type == EDID_DETAIL_EST_TIMINGS)
+		closure->modes += drm_est3_modes(closure->data, timing);
+}
+
+/**
+ * add_established_modes - get est. modes from EDID and add them
+ * @data: data to add mode(s) to
+ * @edid: EDID block to scan
+ *
+ * Each EDID block contains a bitmap of the supported "established modes" list
+ * (defined above).  Tease them out and add them to the modes list.
+ */
+static int
+add_established_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	unsigned long est_bits = edid->established_timings.t1 |
+		(edid->established_timings.t2 << 8) |
+		((edid->established_timings.mfg_rsvd & 0x80) << 9);
+	int i, modes = 0;
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
+		if (est_bits & (1 << i)) {
+			struct drm_display_mode *newmode = drm_mode_create();
+			*newmode = edid_est_modes[i];
+			if (newmode) {
+				drm_add_hdmi_modes(data, newmode);
+				modes++;
+				drm_mode_destroy(newmode);
+			}
+		}
+	}
+
+	if (version_greater(edid, 1, 0))
+		drm_for_each_detailed_block((u8 *)edid,
+					    do_established_modes, &closure);
+
+	return modes + closure.modes;
+}
+
+static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
+{
+	u8 vic;
+
+	if (!to_match->clock)
+		return 0;
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
+		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Make sure to also match alternate clocks */
+		clock1 = hdmi_mode->clock;
+		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
+
+		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
+		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
+		    drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
+			return vic;
+	}
+	return 0;
+}
+
+static int
+add_alternate_cea_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct drm_display_mode *mode, *tmp;
+	int i, num, modes = 0;
+
+	/* Don't add CEA modes if the CEA extension block is missing */
+	if (!drm_find_cea_extension(edid))
+		return 0;
+
+	/*
+	 * Go through all probed modes and create a new mode
+	 * with the alternate clock for certain CEA modes.
+	 */
+	num = data->modes;
+
+	for (i = 0; i < num; i++) {
+		const struct drm_display_mode *cea_mode = NULL;
+		struct drm_display_mode *newmode;
+		u8 vic;
+		unsigned int clock1, clock2;
+
+		mode = &data->mode_buf[i];
+		vic = drm_match_cea_mode(mode);
+
+		if (drm_valid_cea_vic(vic)) {
+			cea_mode = &edid_cea_modes[vic];
+			clock2 = cea_mode_alternate_clock(cea_mode);
+		} else {
+			vic = drm_match_hdmi_mode(mode);
+			if (drm_valid_hdmi_vic(vic)) {
+				cea_mode = &edid_4k_modes[vic];
+				clock2 = hdmi_mode_alternate_clock(cea_mode);
+			}
+		}
+
+		if (!cea_mode)
+			continue;
+
+		clock1 = cea_mode->clock;
+
+		if (clock1 == clock2)
+			continue;
+
+		if (mode->clock != clock1 && mode->clock != clock2)
+			continue;
+
+		newmode = drm_mode_create();
+		*newmode = *cea_mode;
+		if (!newmode)
+			continue;
+
+		/* Carry over the stereo flags */
+		newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+		/*
+		 * The current mode could be either variant. Make
+		 * sure to pick the "other" clock for the new mode.
+		 */
+		if (mode->clock != clock1)
+			newmode->clock = clock1;
+		else
+			newmode->clock = clock2;
+
+		drm_add_hdmi_modes(data, newmode);
+		modes++;
+		drm_mode_destroy(newmode);
+	}
+
+	return modes;
+}
+
+static u8 *drm_find_displayid_extension(struct edid *edid)
+{
+	return drm_find_edid_extension(edid, DISPLAYID_EXT);
+}
+
+static int validate_displayid(u8 *displayid, int length, int idx)
+{
+	int i;
+	u8 csum = 0;
+	struct displayid_hdr *base;
+
+	base = (struct displayid_hdr *)&displayid[idx];
+
+	debug("base revision 0x%x, length %d, %d %d\n",
+	      base->rev, base->bytes, base->prod_id, base->ext_count);
+
+	if (base->bytes + 5 > length - idx)
+		return -EINVAL;
+	for (i = idx; i <= base->bytes + 5; i++)
+		csum += displayid[i];
+	if (csum) {
+		debug("DisplayID checksum invalid, remainder is %d\n", csum);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static struct
+drm_display_mode *drm_displayid_detailed(struct displayid_detailed_timings_1
+					      *timings)
+{
+	struct drm_display_mode *mode;
+	unsigned pixel_clock = (timings->pixel_clock[0] |
+				(timings->pixel_clock[1] << 8) |
+				(timings->pixel_clock[2] << 16));
+	unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
+	unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
+	unsigned hsync = (timings->hsync[0] |
+		(timings->hsync[1] & 0x7f) << 8) + 1;
+	unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
+	unsigned vactive = (timings->vactive[0] |
+		timings->vactive[1] << 8) + 1;
+	unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
+	unsigned vsync = (timings->vsync[0] |
+		(timings->vsync[1] & 0x7f) << 8) + 1;
+	unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
+	bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
+	bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
+
+	mode = drm_mode_create();
+	if (!mode)
+		return NULL;
+
+	mode->clock = pixel_clock * 10;
+	mode->hdisplay = hactive;
+	mode->hsync_start = mode->hdisplay + hsync;
+	mode->hsync_end = mode->hsync_start + hsync_width;
+	mode->htotal = mode->hdisplay + hblank;
+
+	mode->vdisplay = vactive;
+	mode->vsync_start = mode->vdisplay + vsync;
+	mode->vsync_end = mode->vsync_start + vsync_width;
+	mode->vtotal = mode->vdisplay + vblank;
+
+	mode->flags = 0;
+	mode->flags |=
+		hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	mode->flags |=
+		vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+	if (timings->flags & 0x80)
+	mode->vrefresh = drm_mode_vrefresh(mode);
+
+	return mode;
+}
+
+static int add_displayid_detailed_1_modes(struct hdmi_edid_data *data,
+					  struct displayid_block *block)
+{
+	struct displayid_detailed_timing_block *det;
+	int i;
+	int num_timings;
+	struct drm_display_mode *newmode;
+	int num_modes = 0;
+
+	det = (struct displayid_detailed_timing_block *)block;
+	/* blocks must be multiple of 20 bytes length */
+	if (block->num_bytes % 20)
+		return 0;
+
+	num_timings = block->num_bytes / 20;
+	for (i = 0; i < num_timings; i++) {
+		struct displayid_detailed_timings_1 *timings =
+			&det->timings[i];
+
+		newmode = drm_displayid_detailed(timings);
+		if (!newmode)
+			continue;
+
+		drm_add_hdmi_modes(data, newmode);
+		num_modes++;
+		drm_mode_destroy(newmode);
+	}
+	return num_modes;
+}
+
+static int add_displayid_detailed_modes(struct hdmi_edid_data *data,
+					struct edid *edid)
+{
+	u8 *displayid;
+	int ret;
+	int idx = 1;
+	int length = EDID_SIZE;
+	struct displayid_block *block;
+	int num_modes = 0;
+
+	displayid = drm_find_displayid_extension(edid);
+	if (!displayid)
+		return 0;
+
+	ret = validate_displayid(displayid, length, idx);
+	if (ret)
+		return 0;
+
+	idx += sizeof(struct displayid_hdr);
+	while (block = (struct displayid_block *)&displayid[idx],
+	       idx + sizeof(struct displayid_block) <= length &&
+	       idx + sizeof(struct displayid_block) + block->num_bytes <=
+	       length && block->num_bytes > 0) {
+		idx += block->num_bytes + sizeof(struct displayid_block);
+		switch (block->tag) {
+		case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
+			num_modes +=
+				add_displayid_detailed_1_modes(data, block);
+			break;
+		}
+	}
+	return num_modes;
+}
+
+static bool
+mode_in_hsync_range(const struct drm_display_mode *mode,
+		    struct edid *edid, u8 *t)
+{
+	int hsync, hmin, hmax;
+
+	hmin = t[7];
+	if (edid->revision >= 4)
+		hmin += ((t[4] & 0x04) ? 255 : 0);
+	hmax = t[8];
+	if (edid->revision >= 4)
+		hmax += ((t[4] & 0x08) ? 255 : 0);
+	hsync = drm_mode_hsync(mode);
+
+	return (hsync <= hmax && hsync >= hmin);
+}
+
+static bool
+mode_in_vsync_range(const struct drm_display_mode *mode,
+		    struct edid *edid, u8 *t)
+{
+	int vsync, vmin, vmax;
+
+	vmin = t[5];
+	if (edid->revision >= 4)
+		vmin += ((t[4] & 0x01) ? 255 : 0);
+	vmax = t[6];
+	if (edid->revision >= 4)
+		vmax += ((t[4] & 0x02) ? 255 : 0);
+	vsync = drm_mode_vrefresh(mode);
+
+	return (vsync <= vmax && vsync >= vmin);
+}
+
+static u32
+range_pixel_clock(struct edid *edid, u8 *t)
+{
+	/* unspecified */
+	if (t[9] == 0 || t[9] == 255)
+		return 0;
+
+	/* 1.4 with CVT support gives us real precision, yay */
+	if (edid->revision >= 4 && t[10] == 0x04)
+		return (t[9] * 10000) - ((t[12] >> 2) * 250);
+
+	/* 1.3 is pathetic, so fuzz up a bit */
+	return t[9] * 10000 + 5001;
+}
+
+static bool
+mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
+	      struct detailed_timing *timing)
+{
+	u32 max_clock;
+	u8 *t = (u8 *)timing;
+
+	if (!mode_in_hsync_range(mode, edid, t))
+		return false;
+
+	if (!mode_in_vsync_range(mode, edid, t))
+		return false;
+
+	max_clock = range_pixel_clock(edid, t);
+	if (max_clock)
+		if (mode->clock > max_clock)
+			return false;
+
+	/* 1.4 max horizontal check */
+	if (edid->revision >= 4 && t[10] == 0x04)
+		if (t[13] && mode->hdisplay > 8 *
+		    (t[13] + (256 * (t[12] & 0x3))))
+			return false;
+
+	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
+		return false;
+
+	return true;
+}
+
+static bool valid_inferred_mode(struct hdmi_edid_data *data,
+				const struct drm_display_mode *mode)
+{
+	const struct drm_display_mode *m;
+	bool ok = false;
+	int i;
+
+	for (i = 0; i < data->modes; i++) {
+		m = &data->mode_buf[i];
+		if (mode->hdisplay == m->hdisplay &&
+		    mode->vdisplay == m->vdisplay &&
+		    drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
+			return false; /* duplicated */
+		if (mode->hdisplay <= m->hdisplay &&
+		    mode->vdisplay <= m->vdisplay)
+			ok = true;
+	}
+	return ok;
+}
+
+static int
+drm_dmt_modes_for_range(struct hdmi_edid_data *data, struct edid *edid,
+			struct detailed_timing *timing)
+{
+	int i, modes = 0;
+
+	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
+		if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
+		    valid_inferred_mode(data, drm_dmt_modes + i)) {
+			drm_add_hdmi_modes(data, &drm_dmt_modes[i]);
+			modes++;
+		}
+	}
+
+	return modes;
+}
+
+/* fix up 1366x768 mode from 1368x768;
+ * GFT/CVT can't express 1366 width which isn't dividable by 8
+ */
+static void fixup_mode_1366x768(struct drm_display_mode *mode)
+{
+	if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
+		mode->hdisplay = 1366;
+		mode->hsync_start--;
+		mode->hsync_end--;
+	}
+}
+
+static int
+drm_gtf_modes_for_range(struct hdmi_edid_data *data, struct edid *edid,
+			struct detailed_timing *timing)
+{
+	int i, modes = 0;
+	struct drm_display_mode *newmode;
+
+	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
+		const struct minimode *m = &extra_modes[i];
+
+		newmode = drm_gtf_mode(m->w, m->h, m->r, 0, 0);
+		if (!newmode)
+			return modes;
+
+		fixup_mode_1366x768(newmode);
+		if (!mode_in_range(newmode, edid, timing) ||
+		    !valid_inferred_mode(data, newmode)) {
+			drm_mode_destroy(newmode);
+			continue;
+		}
+
+		drm_add_hdmi_modes(data, newmode);
+		modes++;
+		drm_mode_destroy(newmode);
+	}
+
+	return modes;
+}
+
+static int
+drm_cvt_modes_for_range(struct hdmi_edid_data *data, struct edid *edid,
+			struct detailed_timing *timing)
+{
+	int i, modes = 0;
+	struct drm_display_mode *newmode;
+	bool rb = drm_monitor_supports_rb(edid);
+
+	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
+		const struct minimode *m = &extra_modes[i];
+
+		newmode = drm_cvt_mode(m->w, m->h, m->r, rb, 0, 0);
+		if (!newmode)
+			return modes;
+
+		fixup_mode_1366x768(newmode);
+		if (!mode_in_range(newmode, edid, timing) ||
+		    !valid_inferred_mode(data, newmode)) {
+			drm_mode_destroy(newmode);
+			continue;
+		}
+
+		drm_add_hdmi_modes(data, newmode);
+		modes++;
+		drm_mode_destroy(newmode);
+	}
+
+	return modes;
+}
+
+static void
+do_inferred_modes(struct detailed_timing *timing, void *c)
+{
+	struct detailed_mode_closure *closure = c;
+	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct detailed_data_monitor_range *range = &data->data.range;
+
+	if (data->type != EDID_DETAIL_MONITOR_RANGE)
+		return;
+
+	closure->modes += drm_dmt_modes_for_range(closure->data,
+						  closure->edid,
+						  timing);
+
+	if (!version_greater(closure->edid, 1, 1))
+		return; /* GTF not defined yet */
+
+	switch (range->flags) {
+	case 0x02: /* secondary gtf, XXX could do more */
+	case 0x00: /* default gtf */
+		closure->modes += drm_gtf_modes_for_range(closure->data,
+							  closure->edid,
+							  timing);
+		break;
+	case 0x04: /* cvt, only in 1.4+ */
+		if (!version_greater(closure->edid, 1, 3))
+			break;
+
+		closure->modes += drm_cvt_modes_for_range(closure->data,
+							  closure->edid,
+							  timing);
+		break;
+	case 0x01: /* just the ranges, no formula */
+	default:
+		break;
+	}
+}
+
+static int
+add_inferred_modes(struct hdmi_edid_data *data, struct edid *edid)
+{
+	struct detailed_mode_closure closure = {
+		.data = data,
+		.edid = edid,
+	};
+
+	if (version_greater(edid, 1, 0))
+		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
+					    &closure);
+
+	return closure.modes;
+}
+
+#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
+#define MODE_REFRESH_DIFF(c, t) (abs((c) - (t)))
+
+/**
+ * edid_fixup_preferred - set preferred modes based on quirk list
+ * @data: the structure that save parsed hdmi edid data
+ * @quirks: quirks list
+ *
+ * Walk the mode list, clearing the preferred status
+ * on existing modes and setting it anew for the right mode ala @quirks.
+ */
+static void edid_fixup_preferred(struct hdmi_edid_data *data,
+				 u32 quirks)
+{
+	struct drm_display_mode *t, *cur_mode, *preferred_mode;
+	int i, target_refresh = 0;
+	int num = data->modes;
+	int cur_vrefresh, preferred_vrefresh;
+
+	if (!num)
+		return;
+
+	preferred_mode = data->preferred_mode;
+
+	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
+		target_refresh = 60;
+	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
+		target_refresh = 75;
+
+	for (i = 0; i < num; i++) {
+		cur_mode = &data->mode_buf[i];
+
+		if (cur_mode == preferred_mode)
+			continue;
+
+		/* Largest mode is preferred */
+		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
+			preferred_mode = cur_mode;
+
+		cur_vrefresh = cur_mode->vrefresh ?
+		cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
+		preferred_vrefresh = preferred_mode->vrefresh ?
+		preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
+		/* At a given size, try to get closest to target refresh */
+		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
+		    MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
+		    MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
+			preferred_mode = cur_mode;
+		}
+	}
+	data->preferred_mode = preferred_mode;
+}
+
+static const u8 edid_header[] = {
+	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
+};
+
+/**
+ * drm_edid_header_is_valid - sanity check the header of the base EDID block
+ * @raw_edid: pointer to raw base EDID block
+ *
+ * Sanity check the header of the base EDID block.
+ *
+ * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
+ */
+static int drm_edid_header_is_valid(const u8 *raw_edid)
+{
+	int i, score = 0;
+
+	for (i = 0; i < sizeof(edid_header); i++)
+		if (raw_edid[i] == edid_header[i])
+			score++;
+
+	return score;
+}
+
+static int drm_edid_block_checksum(const u8 *raw_edid)
+{
+	int i;
+	u8 csum = 0;
+
+	for (i = 0; i < EDID_SIZE; i++)
+		csum += raw_edid[i];
+
+	return csum;
+}
+
+static bool drm_edid_is_zero(const u8 *in_edid, int length)
+{
+	if (memchr_inv(in_edid, 0, length))
+		return false;
+
+	return true;
+}
+
+/**
+ * drm_edid_block_valid - Sanity check the EDID block (base or extension)
+ * @raw_edid: pointer to raw EDID block
+ * @block: type of block to validate (0 for base, extension otherwise)
+ * @print_bad_edid: if true, dump bad EDID blocks to the console
+ * @edid_corrupt: if true, the header or checksum is invalid
+ *
+ * Validate a base or extension EDID block and optionally dump bad blocks to
+ * the console.
+ *
+ * Return: True if the block is valid, false otherwise.
+ */
+static
+bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
+			  bool *edid_corrupt)
+{
+	u8 csum;
+	int edid_fixup = 6;
+	struct edid *edid = (struct edid *)raw_edid;
+
+	if ((!raw_edid))
+		return false;
+
+	if (block == 0) {
+		int score = drm_edid_header_is_valid(raw_edid);
+
+		if (score == 8) {
+			if (edid_corrupt)
+				*edid_corrupt = false;
+		} else if (score >= edid_fixup) {
+			/* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
+			 * The corrupt flag needs to be set here otherwise, the
+			 * fix-up code here will correct the problem, the
+			 * checksum is correct and the test fails
+			 */
+			if (edid_corrupt)
+				*edid_corrupt = true;
+			debug("Fixing header, your hardware may be failing\n");
+			memcpy(raw_edid, edid_header, sizeof(edid_header));
+		} else {
+			if (edid_corrupt)
+				*edid_corrupt = true;
+			goto bad;
+		}
+	}
+
+	csum = drm_edid_block_checksum(raw_edid);
+	if (csum) {
+		if (print_bad_edid) {
+			debug("EDID checksum is invalid, remainder is %d\n",
+			      csum);
+		}
+
+		if (edid_corrupt)
+			*edid_corrupt = true;
+
+		/* allow CEA to slide through, switches mangle this */
+		if (raw_edid[0] != 0x02)
+			goto bad;
+	}
+
+	/* per-block-type checks */
+	switch (raw_edid[0]) {
+	case 0: /* base */
+		if (edid->version != 1) {
+			debug("EDID has major version %d, instead of 1\n",
+			      edid->version);
+			goto bad;
+		}
+
+		if (edid->revision > 4)
+			debug("minor > 4, assuming backward compatibility\n");
+		break;
+
+	default:
+		break;
+	}
+
+	return true;
+
+bad:
+	if (print_bad_edid) {
+		if (drm_edid_is_zero(raw_edid, EDID_SIZE)) {
+			debug("EDID block is all zeroes\n");
+		} else {
+			debug("Raw EDID:\n");
+			print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
+				       raw_edid, EDID_SIZE, false);
+		}
+	}
+	return false;
+}
+
+/**
+ * drm_edid_is_valid - sanity check EDID data
+ * @edid: EDID data
+ *
+ * Sanity-check an entire EDID record (including extensions)
+ *
+ * Return: True if the EDID data is valid, false otherwise.
+ */
+static bool drm_edid_is_valid(struct edid *edid)
+{
+	int i;
+	u8 *raw = (u8 *)edid;
+
+	if (!edid)
+		return false;
+
+	for (i = 0; i <= edid->extensions; i++)
+		if (!drm_edid_block_valid(raw + i * EDID_SIZE, i, true, NULL))
+			return false;
+
+	return true;
+}
+
+/**
+ * drm_add_edid_modes - add modes from EDID data, if available
+ * @data: data we're probing
+ * @edid: EDID data
+ *
+ * Add the specified modes to the data's mode list.
+ *
+ * Return: The number of modes added or 0 if we couldn't find any.
+ */
+int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *raw_edid)
+{
+	int num_modes = 0;
+	u32 quirks;
+	struct edid *edid = (struct edid *)raw_edid;
+
+	if (!edid) {
+		debug("no edid\n");
+		return 0;
+	}
+
+	if (!drm_edid_is_valid(edid)) {
+		debug("EDID invalid\n");
+		return 0;
+	}
+
+	if (!data->mode_buf) {
+		debug("mode buff is null\n");
+		return 0;
+	}
+
+	quirks = edid_get_quirks(edid);
+	/*
+	 * CEA-861-F adds ycbcr capability map block, for HDMI 2.0 sinks.
+	 * To avoid multiple parsing of same block, lets parse that map
+	 * from sink info, before parsing CEA modes.
+	 */
+	drm_add_display_info(data, edid);
+
+	/*
+	 * EDID spec says modes should be preferred in this order:
+	 * - preferred detailed mode
+	 * - other detailed modes from base block
+	 * - detailed modes from extension blocks
+	 * - CVT 3-byte code modes
+	 * - standard timing codes
+	 * - established timing codes
+	 * - modes inferred from GTF or CVT range information
+	 *
+	 * We get this pretty much right.
+	 *
+	 * XXX order for additional mode types in extension blocks?
+	 */
+	num_modes += add_detailed_modes(data, edid, quirks);
+	num_modes += add_cvt_modes(data, edid);
+	num_modes += add_standard_modes(data, edid);
+	num_modes += add_established_modes(data, edid);
+	num_modes += add_cea_modes(data, edid);
+	num_modes += add_alternate_cea_modes(data, edid);
+	num_modes += add_displayid_detailed_modes(data, edid);
+
+	if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
+		num_modes += add_inferred_modes(data, edid);
+
+	if (num_modes > 0)
+		data->preferred_mode = &data->mode_buf[0];
+
+	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
+		edid_fixup_preferred(data, quirks);
+
+	if (quirks & EDID_QUIRK_FORCE_6BPC)
+		data->display_info.bpc = 6;
+
+	if (quirks & EDID_QUIRK_FORCE_8BPC)
+		data->display_info.bpc = 8;
+
+	if (quirks & EDID_QUIRK_FORCE_10BPC)
+		data->display_info.bpc = 10;
+
+	if (quirks & EDID_QUIRK_FORCE_12BPC)
+		data->display_info.bpc = 12;
+
+	return num_modes;
+}
+
+static int hdmi_avi_infoframe_init(struct hdmi_avi_infoframe *frame)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_AVI;
+	frame->version = 2;
+	frame->length = HDMI_AVI_INFOFRAME_SIZE;
+
+	return 0;
+}
+
+u8 drm_match_cea_mode(struct drm_display_mode *to_match)
+{
+	u8 vic;
+
+	if (!to_match->clock) {
+		printf("can't find to match\n");
+		return 0;
+	}
+
+	for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
+		const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
+		unsigned int clock1, clock2;
+
+		/* Check both 60Hz and 59.94Hz */
+		clock1 = cea_mode->clock;
+		clock2 = cea_mode_alternate_clock(cea_mode);
+		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
+		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
+		    drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
+			return vic;
+	}
+
+	return 0;
+}
+
+static enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
+{
+	return edid_cea_modes[video_code].picture_aspect_ratio;
+}
+
+int
+drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
+					 struct drm_display_mode *mode,
+					 bool is_hdmi2_sink)
+{
+	int err;
+
+	if (!frame || !mode)
+		return -EINVAL;
+
+	err = hdmi_avi_infoframe_init(frame);
+	if (err < 0)
+		return err;
+
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+		frame->pixel_repeat = 1;
+
+	frame->video_code = drm_match_cea_mode(mode);
+
+	/*
+	 * HDMI 1.4 VIC range: 1 <= VIC <= 64 (CEA-861-D) but
+	 * HDMI 2.0 VIC range: 1 <= VIC <= 107 (CEA-861-F). So we
+	 * have to make sure we dont break HDMI 1.4 sinks.
+	 */
+	if (!is_hdmi2_sink && frame->video_code > 64)
+		frame->video_code = 0;
+
+	/*
+	 * HDMI spec says if a mode is found in HDMI 1.4b 4K modes
+	 * we should send its VIC in vendor infoframes, else send the
+	 * VIC in AVI infoframes. Lets check if this mode is present in
+	 * HDMI 1.4b 4K modes
+	 */
+	if (frame->video_code) {
+		u8 vendor_if_vic = drm_match_hdmi_mode(mode);
+		bool is_s3d = mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+		if (drm_valid_hdmi_vic(vendor_if_vic) && !is_s3d)
+			frame->video_code = 0;
+	}
+
+	frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
+
+	/*
+	 * Populate picture aspect ratio from either
+	 * user input (if specified) or from the CEA mode list.
+	 */
+	if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
+	    mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
+		frame->picture_aspect = mode->picture_aspect_ratio;
+	else if (frame->video_code > 0)
+		frame->picture_aspect = drm_get_cea_aspect_ratio(
+						frame->video_code);
+
+	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
+	frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
+
+	return 0;
+}
+
+/**
+ * hdmi_vendor_infoframe_init() - initialize an HDMI vendor infoframe
+ * @frame: HDMI vendor infoframe
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+static int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)
+{
+	memset(frame, 0, sizeof(*frame));
+
+	frame->type = HDMI_INFOFRAME_TYPE_VENDOR;
+	frame->version = 1;
+
+	frame->oui = HDMI_IEEE_OUI;
+
+	/*
+	 * 0 is a valid value for s3d_struct, so we use a special "not set"
+	 * value
+	 */
+	frame->s3d_struct = HDMI_3D_STRUCTURE_INVALID;
+
+	return 0;
+}
+
+static enum hdmi_3d_structure
+s3d_structure_from_display_mode(const struct drm_display_mode *mode)
+{
+	u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+	switch (layout) {
+	case DRM_MODE_FLAG_3D_FRAME_PACKING:
+		return HDMI_3D_STRUCTURE_FRAME_PACKING;
+	case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
+		return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
+	case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
+		return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
+	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
+		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
+	case DRM_MODE_FLAG_3D_L_DEPTH:
+		return HDMI_3D_STRUCTURE_L_DEPTH;
+	case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
+		return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
+	case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
+		return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
+	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
+		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
+	default:
+		return HDMI_3D_STRUCTURE_INVALID;
+	}
+}
+
+int
+drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
+					    struct drm_display_mode *mode)
+{
+	int err;
+	u32 s3d_flags;
+	u8 vic;
+
+	if (!frame || !mode)
+		return -EINVAL;
+
+	vic = drm_match_hdmi_mode(mode);
+
+	s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
+
+	if (!vic && !s3d_flags)
+		return -EINVAL;
+
+	if (vic && s3d_flags)
+		return -EINVAL;
+
+	err = hdmi_vendor_infoframe_init(frame);
+	if (err < 0)
+		return err;
+
+	if (vic)
+		frame->vic = vic;
+	else
+		frame->s3d_struct = s3d_structure_from_display_mode(mode);
+
+	return 0;
+}
+
+static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
+{
+	u8 csum = 0;
+	size_t i;
+
+	/* compute checksum */
+	for (i = 0; i < size; i++)
+		csum += ptr[i];
+
+	return 256 - csum;
+}
+
+static void hdmi_infoframe_set_checksum(void *buffer, size_t size)
+{
+	u8 *ptr = buffer;
+
+	ptr[3] = hdmi_infoframe_checksum(buffer, size);
+}
+
+/**
+ * hdmi_vendor_infoframe_pack() - write a HDMI vendor infoframe to binary buffer
+ * @frame: HDMI infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
+				   void *buffer, size_t size)
+{
+	u8 *ptr = buffer;
+	size_t length;
+
+	/* empty info frame */
+	if (frame->vic == 0 && frame->s3d_struct == HDMI_3D_STRUCTURE_INVALID)
+		return -EINVAL;
+
+	/* only one of those can be supplied */
+	if (frame->vic != 0 && frame->s3d_struct != HDMI_3D_STRUCTURE_INVALID)
+		return -EINVAL;
+
+	/* for side by side (half) we also need to provide 3D_Ext_Data */
+	if (frame->s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
+		frame->length = 6;
+	else
+		frame->length = 5;
+
+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+	if (size < length)
+		return -ENOSPC;
+
+	memset(buffer, 0, size);
+
+	ptr[0] = frame->type;
+	ptr[1] = frame->version;
+	ptr[2] = frame->length;
+	ptr[3] = 0; /* checksum */
+
+	/* HDMI OUI */
+	ptr[4] = 0x03;
+	ptr[5] = 0x0c;
+	ptr[6] = 0x00;
+
+	if (frame->vic) {
+		ptr[7] = 0x1 << 5;	/* video format */
+		ptr[8] = frame->vic;
+	} else {
+		ptr[7] = 0x2 << 5;	/* video format */
+		ptr[8] = (frame->s3d_struct & 0xf) << 4;
+		if (frame->s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
+			ptr[9] = (frame->s3d_ext_data & 0xf) << 4;
+	}
+
+	hdmi_infoframe_set_checksum(buffer, length);
+
+	return length;
+}
diff --git a/include/drm_modes.h b/include/drm_modes.h
index 6e9121a0c8..bc8d569f63 100644
--- a/include/drm_modes.h
+++ b/include/drm_modes.h
@@ -7,6 +7,14 @@
 #ifndef _DRM_MODES_H
 #define _DRM_MODES_H
 
+#define DRM_MODE_TYPE_BUILTIN	BIT(0)
+#define DRM_MODE_TYPE_CLOCK_C	(BIT(1) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_CRTC_C	(BIT(2) | DRM_MODE_TYPE_BUILTIN)
+#define DRM_MODE_TYPE_PREFERRED	BIT(3)
+#define DRM_MODE_TYPE_DEFAULT	BIT(4)
+#define DRM_MODE_TYPE_USERDEF	BIT(5)
+#define DRM_MODE_TYPE_DRIVER	BIT(6)
+
 /* Video mode flags */
 /* bit compatible with the xorg definitions. */
 #define DRM_MODE_FLAG_PHSYNC			(1 << 0)
@@ -62,6 +70,7 @@ struct drm_display_mode {
 	int vrefresh;
 	int vscan;
 	unsigned int flags;
+	int picture_aspect_ratio;
 };
 
 #endif
diff --git a/include/edid.h b/include/edid.h
index 9f3276c080..06698db9c3 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -8,24 +8,65 @@
  *
  * Contains stolen code from ddcprobe project which is:
  * Copyright (C) Nalin Dahyabhai <bigfun@pobox.com>
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 #ifndef __EDID_H_
 #define __EDID_H_
 
+#include <div64.h>
 #include <linux/types.h>
 
 /* Size of the EDID data */
 #define EDID_SIZE	128
 #define EDID_EXT_SIZE	256
+#define MODE_LEN	120
+
+#define CEA_EXT	    0x02
+#define VTB_EXT	    0x10
+#define DI_EXT	    0x40
+#define LS_EXT	    0x50
+#define MI_EXT	    0x60
+#define DISPLAYID_EXT 0x70
+
+#define EDID_TIMING_ASPECT_SHIFT 6
+#define EDID_TIMING_ASPECT_MASK  (0x3 << EDID_TIMING_ASPECT_SHIFT)
+
+/* need to add 60 */
+#define EDID_TIMING_VFREQ_SHIFT  0
+#define EDID_TIMING_VFREQ_MASK   (0x3f << EDID_TIMING_VFREQ_SHIFT)
 
 /* OUI of HDMI vendor specific data block */
 #define HDMI_IEEE_OUI 0x000c03
 
+/* drm mode 4k and 3d */
+#define DRM_MODE_FLAG_420_MASK			(0x03 << 23)
+#define  DRM_MODE_FLAG_420			BIT(23)
+#define  DRM_MODE_FLAG_420_ONLY			BIT(24)
+
+#define DRM_MODE_FLAG_3D_MASK			(0x1f << 14)
+#define  DRM_MODE_FLAG_3D_NONE			(0 << 14)
+#define  DRM_MODE_FLAG_3D_FRAME_PACKING		BIT(14)
+#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2 << 14)
+#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH		(5 << 14)
+#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6 << 14)
+#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7 << 14)
+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8 << 14)
+
+#define BITS_PER_BYTE         8
+#define BITS_TO_LONGS(nr)     DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
 #define GET_BIT(_x, _pos) \
 	(((_x) >> (_pos)) & 1)
 #define GET_BITS(_x, _pos_msb, _pos_lsb) \
 	(((_x) >> (_pos_lsb)) & ((1 << ((_pos_msb) - (_pos_lsb) + 1)) - 1))
+#define DRM_MODE(c, hd, hss, hse, ht, vd, vss, vse, vt, vs, f) \
+	.clock = (c), \
+	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
+	.htotal = (ht), .vdisplay = (vd), \
+	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
+	.vscan = (vs), .flags = (f)
 
 /* Aspect ratios used in EDID info. */
 enum edid_aspect {
@@ -35,6 +76,129 @@ enum edid_aspect {
 	ASPECT_5625,
 };
 
+struct est_timings {
+	u8 t1;
+	u8 t2;
+	u8 mfg_rsvd;
+} __packed;
+
+/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
+#define EDID_TIMING_ASPECT_SHIFT 6
+#define EDID_TIMING_ASPECT_MASK  (0x3 << EDID_TIMING_ASPECT_SHIFT)
+
+/* need to add 60 */
+#define EDID_TIMING_VFREQ_SHIFT  0
+#define EDID_TIMING_VFREQ_MASK   (0x3f << EDID_TIMING_VFREQ_SHIFT)
+
+struct std_timing {
+	u8 hsize; /* need to multiply by 8 then add 248 */
+	u8 vfreq_aspect;
+} __packed;
+
+struct detailed_pixel_timing {
+	u8 hactive_lo;
+	u8 hblank_lo;
+	u8 hactive_hblank_hi;
+	u8 vactive_lo;
+	u8 vblank_lo;
+	u8 vactive_vblank_hi;
+	u8 hsync_offset_lo;
+	u8 hsync_pulse_width_lo;
+	u8 vsync_offset_pulse_width_lo;
+	u8 hsync_vsync_offset_pulse_width_hi;
+	u8 width_mm_lo;
+	u8 height_mm_lo;
+	u8 width_height_mm_hi;
+	u8 hborder;
+	u8 vborder;
+	u8 misc;
+} __packed;
+
+/* If it's not pixel timing, it'll be one of the below */
+struct detailed_data_string {
+	u8 str[13];
+} __packed;
+
+struct detailed_data_monitor_range {
+	u8 min_vfreq;
+	u8 max_vfreq;
+	u8 min_hfreq_khz;
+	u8 max_hfreq_khz;
+	u8 pixel_clock_mhz; /* need to multiply by 10 */
+	u8 flags;
+	union {
+		struct {
+			u8 reserved;
+			u8 hfreq_start_khz; /* need to multiply by 2 */
+			u8 c; /* need to divide by 2 */
+			__le16 m;
+			u8 k;
+			u8 j; /* need to divide by 2 */
+		} __packed gtf2;
+		struct {
+			u8 version;
+			u8 data1; /* high 6 bits: extra clock resolution */
+			u8 data2; /* plus low 2 of above: max hactive */
+			u8 supported_aspects;
+			u8 flags; /* preferred aspect and blanking support */
+			u8 supported_scalings;
+			u8 preferred_refresh;
+		} __packed cvt;
+	} formula;
+} __packed;
+
+struct detailed_data_wpindex {
+	u8 white_yx_lo; /* Lower 2 bits each */
+	u8 white_x_hi;
+	u8 white_y_hi;
+	u8 gamma; /* need to divide by 100 then add 1 */
+} __packed;
+
+struct detailed_data_color_point {
+	u8 windex1;
+	u8 wpindex1[3];
+	u8 windex2;
+	u8 wpindex2[3];
+} __packed;
+
+struct cvt_timing {
+	u8 code[3];
+} __packed;
+
+struct detailed_non_pixel {
+	u8 pad1;
+	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
+		  * fb=color point data, fa=standard timing data,
+		  * f9=undefined, f8=mfg. reserved
+		  */
+	u8 pad2;
+	union {
+		struct detailed_data_string str;
+		struct detailed_data_monitor_range range;
+		struct detailed_data_wpindex color;
+		struct std_timing timings[6];
+		struct cvt_timing cvt[4];
+	} data;
+} __packed;
+
+#define EDID_DETAIL_EST_TIMINGS 0xf7
+#define EDID_DETAIL_CVT_3BYTE 0xf8
+#define EDID_DETAIL_COLOR_MGMT_DATA 0xf9
+#define EDID_DETAIL_STD_MODES 0xfa
+#define EDID_DETAIL_MONITOR_CPDATA 0xfb
+#define EDID_DETAIL_MONITOR_NAME 0xfc
+#define EDID_DETAIL_MONITOR_RANGE 0xfd
+#define EDID_DETAIL_MONITOR_STRING 0xfe
+#define EDID_DETAIL_MONITOR_SERIAL 0xff
+
+struct detailed_timing {
+	__le16 pixel_clock; /* need to multiply by 10 KHz */
+	union {
+		struct detailed_pixel_timing pixel_data;
+		struct detailed_non_pixel other_data;
+	} data;
+} __packed;
+
 /* Detailed timing information used in EDID v1.x */
 struct edid_detailed_timing {
 	unsigned char pixel_clock[2];
@@ -126,6 +290,58 @@ struct edid_monitor_descriptor {
 	} data;
 } __attribute__ ((__packed__));
 
+#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
+#define DRM_EDID_INPUT_SYNC_ON_GREEN   (1 << 1)
+#define DRM_EDID_INPUT_COMPOSITE_SYNC  (1 << 2)
+#define DRM_EDID_INPUT_SEPARATE_SYNCS  (1 << 3)
+#define DRM_EDID_INPUT_BLANK_TO_BLACK  (1 << 4)
+#define DRM_EDID_INPUT_VIDEO_LEVEL     (3 << 5)
+#define DRM_EDID_INPUT_DIGITAL         (1 << 7)
+#define DRM_EDID_DIGITAL_DEPTH_MASK    (7 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_UNDEF   (0 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_6       (1 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_8       (2 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_10      (3 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_12      (4 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_14      (5 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_16      (6 << 4)
+#define DRM_EDID_DIGITAL_DEPTH_RSVD    (7 << 4)
+#define DRM_EDID_DIGITAL_TYPE_UNDEF    (0)
+#define DRM_EDID_DIGITAL_TYPE_DVI      (1)
+#define DRM_EDID_DIGITAL_TYPE_HDMI_A   (2)
+#define DRM_EDID_DIGITAL_TYPE_HDMI_B   (3)
+#define DRM_EDID_DIGITAL_TYPE_MDDI     (4)
+#define DRM_EDID_DIGITAL_TYPE_DP       (5)
+
+#define DRM_EDID_FEATURE_DEFAULT_GTF      (1 << 0)
+#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
+#define DRM_EDID_FEATURE_STANDARD_COLOR   (1 << 2)
+/* If analog */
+#define DRM_EDID_FEATURE_DISPLAY_TYPE     (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
+/* If digital */
+#define DRM_EDID_FEATURE_COLOR_MASK	  (3 << 3)
+#define DRM_EDID_FEATURE_RGB		  (0 << 3)
+#define DRM_EDID_FEATURE_RGB_YCRCB444	  (1 << 3)
+#define DRM_EDID_FEATURE_RGB_YCRCB422	  (2 << 3)
+#define DRM_EDID_FEATURE_RGB_YCRCB	  (3 << 3) /* both 4:4:4 and 4:2:2 */
+
+#define DRM_EDID_FEATURE_PM_ACTIVE_OFF    (1 << 5)
+#define DRM_EDID_FEATURE_PM_SUSPEND       (1 << 6)
+#define DRM_EDID_FEATURE_PM_STANDBY       (1 << 7)
+
+#define DRM_EDID_HDMI_DC_48               (1 << 6)
+#define DRM_EDID_HDMI_DC_36               (1 << 5)
+#define DRM_EDID_HDMI_DC_30               (1 << 4)
+#define DRM_EDID_HDMI_DC_Y444             (1 << 3)
+
+/* YCBCR 420 deep color modes */
+#define DRM_EDID_YCBCR420_DC_48		  (1 << 2)
+#define DRM_EDID_YCBCR420_DC_36		  (1 << 1)
+#define DRM_EDID_YCBCR420_DC_30		  (1 << 0)
+#define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \
+				    DRM_EDID_YCBCR420_DC_36 | \
+				    DRM_EDID_YCBCR420_DC_30)
+
 struct edid1_info {
 	unsigned char header[8];
 	unsigned char manufacturer_name[2];
@@ -242,8 +458,19 @@ enum edid_cea861_db_types {
 	EDID_CEA861_DB_VIDEO = 0x02,
 	EDID_CEA861_DB_VENDOR = 0x03,
 	EDID_CEA861_DB_SPEAKER = 0x04,
+	EDID_CEA861_DB_USE_EXTENDED = 0x07,
 };
 
+#define EXT_VIDEO_CAPABILITY_BLOCK 0x00
+#define EXT_VIDEO_DATA_BLOCK_420        0x0E
+#define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
+#define EDID_BASIC_AUDIO        BIT(6)
+#define EDID_CEA_YCRCB444       BIT(5)
+#define EDID_CEA_YCRCB422       BIT(4)
+#define EDID_CEA_VCDB_QS        BIT(6)
+
+#define EXT_VIDEO_DATA_BLOCK_420 0x0E
+
 struct edid_cea861_info {
 	unsigned char extension_tag;
 #define EDID_CEA861_EXTENSION_TAG	0x02
@@ -267,6 +494,222 @@ struct edid_cea861_info {
 	GET_BITS((_x).data[offset], 4, 0)
 } __attribute__ ((__packed__));
 
+#define DATA_BLOCK_PRODUCT_ID 0x00
+#define DATA_BLOCK_DISPLAY_PARAMETERS 0x01
+#define DATA_BLOCK_COLOR_CHARACTERISTICS 0x02
+#define DATA_BLOCK_TYPE_1_DETAILED_TIMING 0x03
+#define DATA_BLOCK_TYPE_2_DETAILED_TIMING 0x04
+#define DATA_BLOCK_TYPE_3_SHORT_TIMING 0x05
+#define DATA_BLOCK_TYPE_4_DMT_TIMING 0x06
+#define DATA_BLOCK_VESA_TIMING 0x07
+#define DATA_BLOCK_CEA_TIMING 0x08
+#define DATA_BLOCK_VIDEO_TIMING_RANGE 0x09
+#define DATA_BLOCK_PRODUCT_SERIAL_NUMBER 0x0a
+#define DATA_BLOCK_GP_ASCII_STRING 0x0b
+#define DATA_BLOCK_DISPLAY_DEVICE_DATA 0x0c
+#define DATA_BLOCK_INTERFACE_POWER_SEQUENCING 0x0d
+#define DATA_BLOCK_TRANSFER_CHARACTERISTICS 0x0e
+#define DATA_BLOCK_DISPLAY_INTERFACE 0x0f
+#define DATA_BLOCK_STEREO_DISPLAY_INTERFACE 0x10
+#define DATA_BLOCK_TILED_DISPLAY 0x12
+
+struct displayid_hdr {
+	u8 rev;
+	u8 bytes;
+	u8 prod_id;
+	u8 ext_count;
+} __packed;
+
+struct displayid_block {
+	u8 tag;
+	u8 rev;
+	u8 num_bytes;
+} __packed;
+
+struct displayid_detailed_timings_1 {
+	u8 pixel_clock[3];
+	u8 flags;
+	u8 hactive[2];
+	u8 hblank[2];
+	u8 hsync[2];
+	u8 hsw[2];
+	u8 vactive[2];
+	u8 vblank[2];
+	u8 vsync[2];
+	u8 vsw[2];
+} __packed;
+
+struct displayid_detailed_timing_block {
+	struct displayid_block base;
+	struct displayid_detailed_timings_1 timings[0];
+};
+
+/**
+ * struct drm_scrambling: sink's scrambling support.
+ */
+struct drm_scrambling {
+	/**
+	 * @supported: scrambling supported for rates > 340 Mhz.
+	 */
+	bool supported;
+	/**
+	 * @low_rates: scrambling supported for rates <= 340 Mhz.
+	 */
+	bool low_rates;
+};
+
+/**
+ * struct drm_scdc - Information about scdc capabilities of a HDMI 2.0 sink
+ *
+ * Provides SCDC register support and capabilities related information on a
+ * HDMI 2.0 sink. In case of a HDMI 1.4 sink, all parameter must be 0.
+ */
+
+struct drm_scdc {
+	/**
+	 * @supported: status control & data channel present.
+	 */
+	bool supported;
+	/**
+	 * @read_request: sink is capable of generating scdc read request.
+	 */
+	bool read_request;
+	/**
+	 * @scrambling: sink's scrambling capabilities
+	 */
+	struct drm_scrambling scrambling;
+};
+
+/**
+ * struct drm_hdmi_info - runtime information about the connected HDMI sink
+ *
+ * Describes if a given display supports advanced HDMI 2.0 features.
+ * This information is available in CEA-861-F extension blocks (like HF-VSDB).
+ */
+struct drm_hdmi_info {
+	struct drm_scdc scdc;
+
+	/**
+	 * @y420_vdb_modes: bitmap of modes which can support ycbcr420
+	 * output only (not normal RGB/YCBCR444/422 outputs). There are total
+	 * 107 VICs defined by CEA-861-F spec, so the size is 128 bits to map
+	 * upto 128 VICs;
+	 */
+	unsigned long y420_vdb_modes[BITS_TO_LONGS(128)];
+
+	/**
+	 * @y420_cmdb_modes: bitmap of modes which can support ycbcr420
+	 * output also, along with normal HDMI outputs. There are total 107
+	 * VICs defined by CEA-861-F spec, so the size is 128 bits to map upto
+	 * 128 VICs;
+	 */
+	unsigned long y420_cmdb_modes[BITS_TO_LONGS(128)];
+
+	/** @y420_cmdb_map: bitmap of SVD index, to extraxt vcb modes */
+	u64 y420_cmdb_map;
+
+	/** @y420_dc_modes: bitmap of deep color support index */
+	u8 y420_dc_modes;
+};
+
+enum subpixel_order {
+	subpixelunknown = 0,
+	subpixelhorizontalrgb,
+	subpixelhorizontalbgr,
+	subpixelverticalrgb,
+	subpixelverticalbgr,
+	subpixelnone,
+};
+
+#define DRM_COLOR_FORMAT_RGB444         BIT(0)
+#define DRM_COLOR_FORMAT_YCRCB444       BIT(1)
+#define DRM_COLOR_FORMAT_YCRCB422       BIT(2)
+#define DRM_COLOR_FORMAT_YCRCB420       BIT(3)
+
+/*
+ * Describes a given display (e.g. CRT or flat panel) and its limitations.
+ */
+struct drm_display_info {
+	char name[32];
+
+	/* Physical size */
+	unsigned int width_mm;
+	unsigned int height_mm;
+
+	/* Clock limits FIXME: storage format */
+	unsigned int min_vfreq, max_vfreq;
+	unsigned int min_hfreq, max_hfreq;
+	unsigned int pixel_clock;
+	unsigned int bpc;
+
+	enum subpixel_order subpixel_order;
+	u32 color_formats;
+
+	const u32 *bus_formats;
+	unsigned int num_bus_formats;
+
+	/**
+	 * @max_tmds_clock: Maximum TMDS clock rate supported by the
+	 * sink in kHz. 0 means undefined.
+	 */
+	int max_tmds_clock;
+
+	/**
+	 * @dvi_dual: Dual-link DVI sink?
+	 */
+	bool dvi_dual;
+
+	/* Mask of supported hdmi deep color modes */
+	u8 edid_hdmi_dc_modes;
+
+	u8 cea_rev;
+
+	/**
+	 * @hdmi: advance features of a HDMI sink.
+	 */
+	struct drm_hdmi_info hdmi;
+};
+
+struct edid {
+	u8 header[8];
+	/* Vendor & product info */
+	u8 mfg_id[2];
+	u8 prod_code[2];
+	u32 serial; /* FIXME: byte order */
+	u8 mfg_week;
+	u8 mfg_year;
+	/* EDID version */
+	u8 version;
+	u8 revision;
+	/* Display info: */
+	u8 input;
+	u8 width_cm;
+	u8 height_cm;
+	u8 gamma;
+	u8 features;
+	/* Color characteristics */
+	u8 red_green_lo;
+	u8 black_white_lo;
+	u8 red_x;
+	u8 red_y;
+	u8 green_x;
+	u8 green_y;
+	u8 blue_x;
+	u8 blue_y;
+	u8 white_x;
+	u8 white_y;
+	/* Est. timings and mfg rsvd timings*/
+	struct est_timings established_timings;
+	/* Standard timings 1-8*/
+	struct std_timing standard_timings[8];
+	/* Detailing timings 1-4 */
+	struct detailed_timing detailed_timings[4];
+	/* Number of 128 byte ext. blocks */
+	u8 extensions;
+	/* Checksum */
+	u8 checksum;
+} __packed;
+
 /**
  * Print the EDID info.
  *
@@ -296,9 +739,9 @@ int edid_check_checksum(u8 *edid_block);
  *
  * @param edid	The EDID info
  * @param hmin	Returns the minimum horizontal rate
- * @param hmax	Returns the maxium horizontal rate
+ * @param hmax	Returns the maximum horizontal rate
  * @param vmin	Returns the minimum vertical rate
- * @param vmax	Returns the maxium vertical rate
+ * @param vmax	Returns the maximum vertical rate
  * @return 0 on success, or -1 on error
  */
 int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
@@ -308,6 +751,14 @@ int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
 struct drm_display_mode;
 struct display_timing;
 
+struct hdmi_edid_data {
+	struct drm_display_mode *preferred_mode;
+	int modes;
+	struct drm_hdmi_info hdmi_info;
+	struct drm_display_mode *mode_buf;
+	struct drm_display_info display_info;
+};
+
 /**
  * edid_get_timing() - Get basic digital display parameters
  *
@@ -323,5 +774,8 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 		    int *panel_bits_per_colourp);
 int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
 		      int *panel_bits_per_colourp);
+int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *edid);
+bool drm_detect_hdmi_monitor(struct edid *edid);
+bool drm_detect_monitor_audio(struct edid *edid);
 
 #endif /* __EDID_H_ */
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
new file mode 100644
index 0000000000..041034ff00
--- /dev/null
+++ b/include/linux/hdmi.h
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2012 Avionic Design GmbH
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __LINUX_HDMI_H_
+#define __LINUX_HDMI_H_
+
+#include <linux/types.h>
+
+enum hdmi_infoframe_type {
+	HDMI_INFOFRAME_TYPE_VENDOR = 0x81,
+	HDMI_INFOFRAME_TYPE_AVI = 0x82,
+	HDMI_INFOFRAME_TYPE_SPD = 0x83,
+	HDMI_INFOFRAME_TYPE_AUDIO = 0x84,
+};
+
+#define HDMI_IEEE_OUI 0x000c03
+#define HDMI_FORUM_IEEE_OUI 0xc45dd8
+#define HDMI_INFOFRAME_HEADER_SIZE  4
+#define HDMI_AVI_INFOFRAME_SIZE    13
+#define HDMI_SPD_INFOFRAME_SIZE    25
+#define HDMI_AUDIO_INFOFRAME_SIZE  10
+
+#define HDMI_INFOFRAME_SIZE(type)	\
+	(HDMI_INFOFRAME_HEADER_SIZE + HDMI_ ## type ## _INFOFRAME_SIZE)
+
+struct hdmi_any_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+};
+
+enum hdmi_colorspace {
+	HDMI_COLORSPACE_RGB,
+	HDMI_COLORSPACE_YUV422,
+	HDMI_COLORSPACE_YUV444,
+	HDMI_COLORSPACE_YUV420,
+	HDMI_COLORSPACE_RESERVED4,
+	HDMI_COLORSPACE_RESERVED5,
+	HDMI_COLORSPACE_RESERVED6,
+	HDMI_COLORSPACE_IDO_DEFINED,
+};
+
+enum hdmi_scan_mode {
+	HDMI_SCAN_MODE_NONE,
+	HDMI_SCAN_MODE_OVERSCAN,
+	HDMI_SCAN_MODE_UNDERSCAN,
+	HDMI_SCAN_MODE_RESERVED,
+};
+
+enum hdmi_colorimetry {
+	HDMI_COLORIMETRY_NONE,
+	HDMI_COLORIMETRY_ITU_601,
+	HDMI_COLORIMETRY_ITU_709,
+	HDMI_COLORIMETRY_EXTENDED,
+};
+
+enum hdmi_picture_aspect {
+	HDMI_PICTURE_ASPECT_NONE,
+	HDMI_PICTURE_ASPECT_4_3,
+	HDMI_PICTURE_ASPECT_16_9,
+	HDMI_PICTURE_ASPECT_64_27,
+	HDMI_PICTURE_ASPECT_256_135,
+	HDMI_PICTURE_ASPECT_RESERVED,
+};
+
+enum hdmi_active_aspect {
+	HDMI_ACTIVE_ASPECT_16_9_TOP = 2,
+	HDMI_ACTIVE_ASPECT_14_9_TOP = 3,
+	HDMI_ACTIVE_ASPECT_16_9_CENTER = 4,
+	HDMI_ACTIVE_ASPECT_PICTURE = 8,
+	HDMI_ACTIVE_ASPECT_4_3 = 9,
+	HDMI_ACTIVE_ASPECT_16_9 = 10,
+	HDMI_ACTIVE_ASPECT_14_9 = 11,
+	HDMI_ACTIVE_ASPECT_4_3_SP_14_9 = 13,
+	HDMI_ACTIVE_ASPECT_16_9_SP_14_9 = 14,
+	HDMI_ACTIVE_ASPECT_16_9_SP_4_3 = 15,
+};
+
+enum hdmi_extended_colorimetry {
+	HDMI_EXTENDED_COLORIMETRY_XV_YCC_601,
+	HDMI_EXTENDED_COLORIMETRY_XV_YCC_709,
+	HDMI_EXTENDED_COLORIMETRY_S_YCC_601,
+	HDMI_EXTENDED_COLORIMETRY_ADOBE_YCC_601,
+	HDMI_EXTENDED_COLORIMETRY_ADOBE_RGB,
+
+	/* The following EC values are only defined in CEA-861-F. */
+	HDMI_EXTENDED_COLORIMETRY_BT2020_CONST_LUM,
+	HDMI_EXTENDED_COLORIMETRY_BT2020,
+	HDMI_EXTENDED_COLORIMETRY_RESERVED,
+};
+
+enum hdmi_quantization_range {
+	HDMI_QUANTIZATION_RANGE_DEFAULT,
+	HDMI_QUANTIZATION_RANGE_LIMITED,
+	HDMI_QUANTIZATION_RANGE_FULL,
+	HDMI_QUANTIZATION_RANGE_RESERVED,
+};
+
+/* non-uniform picture scaling */
+enum hdmi_nups {
+	HDMI_NUPS_UNKNOWN,
+	HDMI_NUPS_HORIZONTAL,
+	HDMI_NUPS_VERTICAL,
+	HDMI_NUPS_BOTH,
+};
+
+enum hdmi_ycc_quantization_range {
+	HDMI_YCC_QUANTIZATION_RANGE_LIMITED,
+	HDMI_YCC_QUANTIZATION_RANGE_FULL,
+};
+
+enum hdmi_content_type {
+	HDMI_CONTENT_TYPE_GRAPHICS,
+	HDMI_CONTENT_TYPE_PHOTO,
+	HDMI_CONTENT_TYPE_CINEMA,
+	HDMI_CONTENT_TYPE_GAME,
+};
+
+struct hdmi_avi_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	enum hdmi_colorspace colorspace;
+	enum hdmi_scan_mode scan_mode;
+	enum hdmi_colorimetry colorimetry;
+	enum hdmi_picture_aspect picture_aspect;
+	enum hdmi_active_aspect active_aspect;
+	bool itc;
+	enum hdmi_extended_colorimetry extended_colorimetry;
+	enum hdmi_quantization_range quantization_range;
+	enum hdmi_nups nups;
+	unsigned char video_code;
+	enum hdmi_ycc_quantization_range ycc_quantization_range;
+	enum hdmi_content_type content_type;
+	unsigned char pixel_repeat;
+	unsigned short top_bar;
+	unsigned short bottom_bar;
+	unsigned short left_bar;
+	unsigned short right_bar;
+};
+
+enum hdmi_spd_sdi {
+	HDMI_SPD_SDI_UNKNOWN,
+	HDMI_SPD_SDI_DSTB,
+	HDMI_SPD_SDI_DVDP,
+	HDMI_SPD_SDI_DVHS,
+	HDMI_SPD_SDI_HDDVR,
+	HDMI_SPD_SDI_DVC,
+	HDMI_SPD_SDI_DSC,
+	HDMI_SPD_SDI_VCD,
+	HDMI_SPD_SDI_GAME,
+	HDMI_SPD_SDI_PC,
+	HDMI_SPD_SDI_BD,
+	HDMI_SPD_SDI_SACD,
+	HDMI_SPD_SDI_HDDVD,
+	HDMI_SPD_SDI_PMP,
+};
+
+struct hdmi_spd_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	char vendor[8];
+	char product[16];
+	enum hdmi_spd_sdi sdi;
+};
+
+enum hdmi_audio_coding_type {
+	HDMI_AUDIO_CODING_TYPE_STREAM,
+	HDMI_AUDIO_CODING_TYPE_PCM,
+	HDMI_AUDIO_CODING_TYPE_AC3,
+	HDMI_AUDIO_CODING_TYPE_MPEG1,
+	HDMI_AUDIO_CODING_TYPE_MP3,
+	HDMI_AUDIO_CODING_TYPE_MPEG2,
+	HDMI_AUDIO_CODING_TYPE_AAC_LC,
+	HDMI_AUDIO_CODING_TYPE_DTS,
+	HDMI_AUDIO_CODING_TYPE_ATRAC,
+	HDMI_AUDIO_CODING_TYPE_DSD,
+	HDMI_AUDIO_CODING_TYPE_EAC3,
+	HDMI_AUDIO_CODING_TYPE_DTS_HD,
+	HDMI_AUDIO_CODING_TYPE_MLP,
+	HDMI_AUDIO_CODING_TYPE_DST,
+	HDMI_AUDIO_CODING_TYPE_WMA_PRO,
+	HDMI_AUDIO_CODING_TYPE_CXT,
+};
+
+enum hdmi_audio_sample_size {
+	HDMI_AUDIO_SAMPLE_SIZE_STREAM,
+	HDMI_AUDIO_SAMPLE_SIZE_16,
+	HDMI_AUDIO_SAMPLE_SIZE_20,
+	HDMI_AUDIO_SAMPLE_SIZE_24,
+};
+
+enum hdmi_audio_sample_frequency {
+	HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_32000,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_44100,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_48000,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_88200,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_96000,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_176400,
+	HDMI_AUDIO_SAMPLE_FREQUENCY_192000,
+};
+
+enum hdmi_audio_coding_type_ext {
+	/* Refer to Audio Coding Type (CT) field in Data Byte 1 */
+	HDMI_AUDIO_CODING_TYPE_EXT_CT,
+
+	/*
+	 * The next three CXT values are defined in CEA-861-E only.
+	 * They do not exist in older versions, and in CEA-861-F they are
+	 * defined as 'Not in use'.
+	 */
+	HDMI_AUDIO_CODING_TYPE_EXT_HE_AAC,
+	HDMI_AUDIO_CODING_TYPE_EXT_HE_AAC_V2,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG_SURROUND,
+
+	/* The following CXT values are only defined in CEA-861-F. */
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC_V2,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_AAC_LC,
+	HDMI_AUDIO_CODING_TYPE_EXT_DRA,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_HE_AAC_SURROUND,
+	HDMI_AUDIO_CODING_TYPE_EXT_MPEG4_AAC_LC_SURROUND = 10,
+};
+
+struct hdmi_audio_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	unsigned char channels;
+	enum hdmi_audio_coding_type coding_type;
+	enum hdmi_audio_sample_size sample_size;
+	enum hdmi_audio_sample_frequency sample_frequency;
+	enum hdmi_audio_coding_type_ext coding_type_ext;
+	unsigned char channel_allocation;
+	unsigned char level_shift_value;
+	bool downmix_inhibit;
+
+};
+
+enum hdmi_3d_structure {
+	HDMI_3D_STRUCTURE_INVALID = -1,
+	HDMI_3D_STRUCTURE_FRAME_PACKING = 0,
+	HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE,
+	HDMI_3D_STRUCTURE_LINE_ALTERNATIVE,
+	HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL,
+	HDMI_3D_STRUCTURE_L_DEPTH,
+	HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH,
+	HDMI_3D_STRUCTURE_TOP_AND_BOTTOM,
+	HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF = 8,
+};
+
+struct hdmi_vendor_infoframe {
+	enum hdmi_infoframe_type type;
+	unsigned char version;
+	unsigned char length;
+	unsigned int oui;
+	u8 vic;
+	enum hdmi_3d_structure s3d_struct;
+	unsigned int s3d_ext_data;
+};
+
+union hdmi_vendor_any_infoframe {
+	struct {
+		enum hdmi_infoframe_type type;
+		unsigned char version;
+		unsigned char length;
+		unsigned int oui;
+	} any;
+	struct hdmi_vendor_infoframe hdmi;
+};
+
+/**
+ * union hdmi_infoframe: overall union of all abstract infoframe representations
+ * @any: generic infoframe
+ * @avi: avi infoframe
+ * @spd: spd infoframe
+ * @vendor: union of all vendor infoframes
+ * @audio: audio infoframe
+ *
+ * This is used by the generic pack function. This works since all infoframes
+ * have the same header which also indicates which type of infoframe should be
+ * packed.
+ */
+union hdmi_infoframe {
+	struct hdmi_any_infoframe any;
+	struct hdmi_avi_infoframe avi;
+	struct hdmi_spd_infoframe spd;
+	union hdmi_vendor_any_infoframe vendor;
+	struct hdmi_audio_infoframe audio;
+};
+
+ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
+				   void *buffer, size_t size);
+int
+drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
+					    struct drm_display_mode *mode);
+int
+drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
+					 struct drm_display_mode *mode,
+					 bool is_hdmi2_sink);
+u8 drm_match_cea_mode(struct drm_display_mode *to_match);
+
+#endif /* _DRM_HDMI_H */
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
index 190d491d5b..37ca603fe2 100644
--- a/include/linux/media-bus-format.h
+++ b/include/linux/media-bus-format.h
@@ -2,6 +2,7 @@
  * Media Bus API header
  *
  * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -57,6 +58,9 @@
 #define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA	0x1012
 #define MEDIA_BUS_FMT_ARGB8888_1X32		0x100d
 #define MEDIA_BUS_FMT_RGB888_1X32_PADHI		0x100f
+#define MEDIA_BUS_FMT_RGB101010_1X30		0x1018
+#define MEDIA_BUS_FMT_RGB121212_1X36		0x1019
+#define MEDIA_BUS_FMT_RGB161616_1X48		0x101a
 
 /* YUV (including grey) - next is	0x2026 */
 #define MEDIA_BUS_FMT_Y8_1X8			0x2001
@@ -90,12 +94,18 @@
 #define MEDIA_BUS_FMT_YVYU10_1X20		0x200e
 #define MEDIA_BUS_FMT_VUY8_1X24			0x2024
 #define MEDIA_BUS_FMT_YUV8_1X24			0x2025
+#define MEDIA_BUS_FMT_UYYVYY8_0_5X24		0x2026
 #define MEDIA_BUS_FMT_UYVY12_1X24		0x2020
 #define MEDIA_BUS_FMT_VYUY12_1X24		0x2021
 #define MEDIA_BUS_FMT_YUYV12_1X24		0x2022
 #define MEDIA_BUS_FMT_YVYU12_1X24		0x2023
 #define MEDIA_BUS_FMT_YUV10_1X30		0x2016
+#define MEDIA_BUS_FMT_UYYVYY10_0_5X30		0x2027
 #define MEDIA_BUS_FMT_AYUV8_1X32		0x2017
+#define MEDIA_BUS_FMT_UYYVYY12_0_5X36		0x2028
+#define MEDIA_BUS_FMT_YUV12_1X36		0x2029
+#define MEDIA_BUS_FMT_YUV16_1X48		0x202a
+#define MEDIA_BUS_FMT_UYYVYY16_0_5X48		0x202b
 
 /* Bayer - next is	0x3019 */
 #define MEDIA_BUS_FMT_SBGGR8_1X8		0x3001

commit 5e7e40617c072f20dbaf33e6a32b8721eb8157e3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Nov 13 15:26:40 2017 +0800

    test: rockchip: add bootrom download mode test
    
    Enter bootrom download mode by command: rktest brom_dnl
    
    Change-Id: I6120a885e5514a57c81fd469ce27a2472009c4fd
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index 0113a3724e..90c710ce44 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -12,3 +12,4 @@ obj-y += test-regulator.o
 obj-y += test-rknand.o
 obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
+obj-y += test-brom-dnl.o
diff --git a/test/rockchip/test-brom-dnl.c b/test/rockchip/test-brom-dnl.c
new file mode 100644
index 0000000000..85f60c5afc
--- /dev/null
+++ b/test/rockchip/test-brom-dnl.c
@@ -0,0 +1,9 @@
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+
+int board_brom_dnl_test(int argc, char * const argv[])
+{
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+	return do_reset(NULL, 0, 0, NULL);
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 22e369022a..d6e808bfb9 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -25,6 +25,7 @@ static board_module_t g_board_modules[] = {
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
+	{ .name = "brom_dnl",	.test = board_brom_dnl_test}
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 29930a4748..e628829a28 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -19,4 +19,6 @@ int board_eth_test(int argc, char * const argv[]);
 int board_ir_test(int argc, char * const argv[]);
 #endif
 
+int board_brom_dnl_test(int argc, char * const argv[]);
+
 #endif /* _TEST_ROCKCHIP_H */

commit 4334dc85d1eb7c8b1a1ae0db95e477b735c14e1b
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 14 19:34:56 2017 +0800

    gva_rk3229: Use GPIO1_B3 as key for fastboot.
    
    TODO:
    Switch back to SoM defined GPIO3_C4 when SoM HW ready.
    
    Change-Id: I58c4fc0b6ec330d3b5ebe62c974605c3a5111c8b
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index ce96538f6f..88281abc0c 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -37,7 +37,7 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
-#define FASTBOOT_KEY_GPIO 116 /* GPIO3_C4 */
+#define FASTBOOT_KEY_GPIO 43 /* GPIO1_B3 */
 static int fastboot_key_pressed(void)
 {
 	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");

commit 5fbcd8b99c0c2d3205e9d4f6fe883e7a1ff90d24
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Wed Nov 15 16:10:33 2017 +0800

    rk322x: fastboot mode: Call fb_set_reboot_flag instead.
    
    Don't set env "preboot", set reboot flag instead.
    And let setup_boot_mode to do the mode change.
    
    Change-Id: I3de480fc306255f31a7ae99e2186e6345df36ca8
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index eeb68a1fc8..ce96538f6f 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -52,13 +52,13 @@ __weak int rk_board_late_init(void)
 
 int board_late_init(void)
 {
-	setup_boot_mode();
-
 	if (fastboot_key_pressed()) {
 		printf("fastboot key pressed!\n");
-		env_set("preboot", "setenv preboot; fastboot usb 0");
+		fb_set_reboot_flag();
 	}
 
+	setup_boot_mode();
+
 	return rk_board_late_init();
 }
 

commit 6dfc2752ce75a48760916cfbd9ec0eb9eac67ad5
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Mon Nov 13 16:39:41 2017 +0800

    bootmode: add check key status to boot into fastboot mode
    
    Change-Id: Ib064a7b0208b7f59715b6563af23716f9e9fa9e3
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index ee89c121bf..eeb68a1fc8 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -9,6 +9,7 @@
 #include <ram.h>
 #include <syscon.h>
 #include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
 #include <asm/arch/grf_rk322x.h>
@@ -36,6 +37,14 @@ struct tos_parameter_t {
 	s64 reserve[8];
 };
 
+#define FASTBOOT_KEY_GPIO 116 /* GPIO3_C4 */
+static int fastboot_key_pressed(void)
+{
+	gpio_request(FASTBOOT_KEY_GPIO, "fastboot_key");
+	gpio_direction_input(FASTBOOT_KEY_GPIO);
+	return !gpio_get_value(FASTBOOT_KEY_GPIO);
+}
+
 __weak int rk_board_late_init(void)
 {
 	return 0;
@@ -45,6 +54,11 @@ int board_late_init(void)
 {
 	setup_boot_mode();
 
+	if (fastboot_key_pressed()) {
+		printf("fastboot key pressed!\n");
+		env_set("preboot", "setenv preboot; fastboot usb 0");
+	}
+
 	return rk_board_late_init();
 }
 

commit 4d0fc6653425df6de128bc7911d38c65ce554ab6
Author: Andy Ye <Andy.Ye@rock-chips.com>
Date:   Tue Nov 7 15:21:45 2017 +0800

    fastboot:support attestation commands
    
    Change-Id: I984a107270991a9e9d60e907b9be4e0d0d462671
    Signed-off-by: Andy Ye <andy.ye@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 93e504d09f..3e867f34c7 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -28,6 +28,9 @@
 #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV
 #include <fb_nand.h>
 #endif
+#ifdef CONFIG_OPTEE_CLIENT
+#include <optee_include/OpteeClientInterface.h>
+#endif
 
 #define FASTBOOT_VERSION		"0.4"
 
@@ -435,13 +438,31 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		else
 			strcpy(response, "FAILValue not set");
 	} else if (strncmp("at-attest-dh", cmd, 12) == 0) {
-		char dh[32] = {0};
-
-		strncat(response, dh, chars_left);
+#ifdef CONFIG_OPTEE_CLIENT
+		char dhbuf[8];
+		uint32_t dh_len = 8;
+		uint32_t res = trusty_attest_dh((uint8_t *)dhbuf, &dh_len);
+		if (res)
+			strcpy(response, "FAILdh not set");
+		else
+			strncat(response, dhbuf, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-attest-uuid", cmd, 14) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
 		char uuid[32] = {0};
-
-		strncat(response, uuid, chars_left);
+		uint32_t uuid_len = 32;
+		uint32_t res = trusty_attest_uuid((uint8_t *)uuid, &uuid_len);
+		if (res)
+			strcpy(response, "FAILuuid not set");
+		else
+			strncat(response, uuid, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-vboot-state", cmd, 14) == 0) {
 		char uuid[32] = {0};
 
@@ -762,7 +783,7 @@ static void cb_upload(struct usb_ep *ep, struct usb_request *req)
 {
 	char response[FASTBOOT_RESPONSE_LEN];
 
-	upload_size = download_bytes;
+
 
 	printf("Starting upload of %d bytes\n", upload_size);
 
@@ -941,9 +962,41 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
+#ifdef CONFIG_OPTEE_CLIENT
+		uint8_t operation_start[128];
+		uint8_t out[256];
+		uint32_t operation_size = download_bytes;
+		uint32_t out_len = 256;
+		uint32_t res = 0;
+		memcpy(operation_start, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
+		res = trusty_attest_get_ca(operation_start, &operation_size, out, &out_len);
+		if (res) {
+			fastboot_tx_write_str("FAILtrusty_attest_get_ca failed");
+			return;
+		}
+		upload_size = out_len;
+		memcpy((void *)CONFIG_FASTBOOT_BUF_ADDR, out, out_len);
 		fastboot_tx_write_str("OKAY");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
-		fastboot_tx_write_str("OKAY");
+#ifdef CONFIG_OPTEE_CLIENT
+		uint8_t ca_response[8*1024];
+		uint32_t ca_response_size = download_bytes;
+		uint32_t res = 0;
+		memcpy(ca_response, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes);
+		res = trusty_attest_set_ca(ca_response, &ca_response_size);
+		if (res) {
+			fastboot_tx_write_str("FAILtrusty_attest_set_ca failed");
+		} else {
+			fastboot_tx_write_str("OKAY");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;

commit 6e7a7f7010d7f7a47c770257f9ce0c3cc3ab66e6
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Fri Nov 17 17:32:59 2017 +0800

    rockchip: rk3229: gva: add cw201x support.
    
    Change-Id: Ic2717c89949d0361f4720dbcdc0fd6e6f098d078
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index 17a6708837..35b266e3b3 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -224,6 +224,26 @@
 			};
 		};
 	};
+
+	cw201x: cw2015@62 {
+		compatible = "cw201x";
+		status = "okay";
+		reg = <0x62>;
+		bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48
+				   0x48 0x44 0x44 0x46 0x49 0x48 0x32 0x24
+				   0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45
+				   0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E
+				   0x4D 0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D
+				   0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52
+				   0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB 0xCB
+				   0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
+		support_dc_adp = <1>;
+		dc_det_gpio = <88>;
+		dc_det_flag = <1>;
+		hw_id_check = <1>;
+		hw_id0_gpio = <86>;
+		hw_id1_gpio = <87>;
+	};
 };
 
 &cpu0 {

commit 384c6d153df5975ab8d237ce1ad74548a8d6b32f
Author: Shunqing Chen <csq@rock-chips.com>
Date:   Thu Nov 16 17:00:00 2017 +0800

    fuel gauge: add cw201x support.
    
    The CW2013 is a system-side used Fuel Gauging.
    
    Change-Id: Iac7c2d72bef36710a3e8966f2e58741d2ec421d9
    Signed-off-by: Shunqing Chen <csq@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 3be00c67a3..7ba34aadaf 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -4,6 +4,13 @@ config DM_FUEL_GAUGE
 	help
 	  This adds a simple uclass for fuel gauge.
 
+config POWER_FG_CW201X
+	bool "CW201X Fuel gauge support"
+	depends on DM_FUEL_GAUGE
+	default y
+	help
+	  This adds support for CW201X fuel gauge support.
+
 config POWER_FG_RK818
 	bool "RK818 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 5e9d2c6126..fa73ef770e 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 
+obj-$(CONFIG_POWER_FG_CW201X) += fg_cw201x.o
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
 obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
 obj-$(CONFIG_POWER_FG_RK816) += fg_rk816.o
diff --git a/drivers/power/fuel_gauge/fg_cw201x.c b/drivers/power/fuel_gauge/fg_cw201x.c
new file mode 100755
index 0000000000..eb14c116f0
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_cw201x.c
@@ -0,0 +1,354 @@
+/*
+ * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <asm/gpio.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include <malloc.h>
+#include <power/battery.h>
+#include <power/fuel_gauge.h>
+#include <power/pmic.h>
+#include "fg_regs.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define COMPAT_ROCKCHIP_CW201X "cw201x"
+
+#define REG_VERSION		0x0
+#define REG_VCELL		0x2
+#define REG_SOC			0x4
+#define REG_RRT_ALERT		0x6
+#define REG_CONFIG		0x8
+#define REG_MODE		0xA
+#define REG_BATINFO		0x10
+
+#define MODE_SLEEP_MASK		(0x3 << 6)
+#define MODE_SLEEP		(0x3 << 6)
+#define MODE_NORMAL		(0x0 << 6)
+#define MODE_QUICK_START	(0x3 << 4)
+#define MODE_RESTART		(0xf << 0)
+
+#define CONFIG_UPDATE_FLG	(0x1 << 1)
+#define ATHD			(0x0 << 3)
+
+enum charger_type {
+	CHARGER_TYPE_NO = 0,
+	CHARGER_TYPE_USB,
+	CHARGER_TYPE_AC,
+	CHARGER_TYPE_DC,
+	CHARGER_TYPE_UNDEF,
+};
+
+struct cw201x_info {
+	struct udevice *dev;
+	int capacity;
+	u32 *cw_bat_config_info;
+	int divider_res1;
+	int divider_res2;
+	int hw_id_check;
+	int hw_id0;
+	int hw_id1;
+	int support_dc_adp;
+	int dc_det_gpio;
+	int dc_det_flag;
+};
+
+static u8 cw201x_read(struct cw201x_info *cw201x, u8 reg)
+{
+	u8 val;
+	int ret;
+
+	ret = dm_i2c_read(cw201x->dev, reg, &val, 1);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      cw201x->dev, reg);
+		return ret;
+	}
+
+	return val;
+}
+
+static int cw201x_write(struct cw201x_info *cw201x, u8 reg, u8 val)
+{
+	int ret;
+
+	ret = dm_i2c_write(cw201x->dev, reg, &val, 1);
+	if (ret) {
+		debug("write error to device: %p register: %#x!",
+		      cw201x->dev, reg);
+		return ret;
+	}
+
+	return 0;
+}
+
+static u16 cw201x_read_half_word(struct cw201x_info *cw201x, int reg)
+{
+	u8 vall, valh;
+	u16 val;
+
+	valh = cw201x_read(cw201x, reg);
+	vall = cw201x_read(cw201x, reg + 1);
+	val = ((u16)valh << 8) | vall;
+
+	return val;
+}
+
+static int cw201x_ofdata_to_platdata(struct udevice *dev)
+{
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+	int ret;
+	int len, size;
+	int hw_id0_val, hw_id1_val;
+
+	if (fdt_getprop(blob, node, "bat_config_info", &len)) {
+		len /= sizeof(u32);
+		size = sizeof(*cw201x->cw_bat_config_info) * len;
+		cw201x->cw_bat_config_info = calloc(size, 1);
+		if (!cw201x->cw_bat_config_info) {
+			debug("calloc cw_bat_config_info fail\n");
+			return -EINVAL;
+		}
+		ret = fdtdec_get_int_array(blob, node,
+					   "bat_config_info",
+					   cw201x->cw_bat_config_info, len);
+		if (ret) {
+			debug("fdtdec_get cw_bat_config_info fail\n");
+			return -EINVAL;
+		}
+	}
+
+	cw201x->support_dc_adp = fdtdec_get_int(blob, node,
+						"support_dc_adp", 0);
+	if (cw201x->support_dc_adp) {
+		cw201x->dc_det_gpio = fdtdec_get_int(blob, node,
+						     "dc_det_gpio", 0);
+		if (!cw201x->dc_det_gpio)
+			return -EINVAL;
+		gpio_request(cw201x->dc_det_gpio, "dc_det_gpio");
+		gpio_direction_input(cw201x->dc_det_gpio);
+
+		cw201x->dc_det_flag = fdtdec_get_int(blob, node,
+						     "dc_det_flag", 0);
+	}
+
+	cw201x->hw_id_check = fdtdec_get_int(blob, node, "hw_id_check", 0);
+	if (cw201x->hw_id_check) {
+		cw201x->hw_id0 = fdtdec_get_int(blob, node, "hw_id0_gpio", 0);
+		if (!cw201x->hw_id0)
+			return -EINVAL;
+		gpio_request(cw201x->hw_id0, "hw_id0_gpio");
+		gpio_direction_input(cw201x->hw_id0);
+		hw_id0_val = gpio_get_value(cw201x->hw_id0);
+
+		cw201x->hw_id1 = fdtdec_get_int(blob, node, "hw_id1_gpio", 0);
+		if (!cw201x->hw_id1)
+			return -EINVAL;
+		gpio_request(cw201x->hw_id1, "hw_id1_gpio");
+		gpio_direction_input(cw201x->hw_id1);
+		hw_id1_val = gpio_get_value(cw201x->hw_id1);
+
+		/* ID1 = 0, ID0 = 1 : Battery */
+		if (!hw_id0_val || hw_id1_val)
+			return -EINVAL;
+	}
+
+	cw201x->divider_res1 = fdtdec_get_int(blob, node, "divider_res1", 0);
+	cw201x->divider_res2 = fdtdec_get_int(blob, node, "divider_res2", 0);
+
+	return 0;
+}
+
+static int cw201x_get_vol(struct cw201x_info *cw201x)
+{
+	u16 value16, value16_1, value16_2, value16_3;
+	int voltage;
+	int res1, res2;
+
+	value16 = cw201x_read_half_word(cw201x, REG_VCELL);
+	if (value16 < 0)
+		return -1;
+
+	value16_1 = cw201x_read_half_word(cw201x, REG_VCELL);
+	if (value16_1 < 0)
+		return -1;
+
+	value16_2 = cw201x_read_half_word(cw201x, REG_VCELL);
+	if (value16_2 < 0)
+		return -1;
+
+	if (value16 > value16_1) {
+		value16_3 = value16;
+		value16 = value16_1;
+		value16_1 = value16_3;
+	}
+
+	if (value16_1 > value16_2) {
+		value16_3 = value16_1;
+		value16_1 = value16_2;
+		value16_2 = value16_3;
+	}
+
+	if (value16 > value16_1) {
+		value16_3 = value16;
+		value16 = value16_1;
+		value16_1 = value16_3;
+	}
+
+	voltage = value16_1 * 312 / 1024;
+
+	if (cw201x->divider_res1 &&
+	    cw201x->divider_res2) {
+		res1 = cw201x->divider_res1;
+		res2 = cw201x->divider_res2;
+		voltage = voltage * (res1 + res2) / res2;
+	}
+
+	debug("the cw201x voltage=%d\n", voltage);
+	return voltage;
+}
+
+static int cw201x_dwc_otg_check_dpdm(void)
+{
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
+	return rockchip_chg_get_type();
+#else
+	debug("rockchip_chg_get_type() is not implement\n");
+	return CHARGER_TYPE_NO;
+#endif
+}
+
+static int cw201x_get_usb_state(struct cw201x_info *cw201x)
+{
+	int charger_type;
+
+	switch (cw201x_dwc_otg_check_dpdm()) {
+	case 0:
+		charger_type = CHARGER_TYPE_NO;
+		break;
+	case 1:
+	case 3:
+		charger_type = CHARGER_TYPE_USB;
+		break;
+	case 2:
+		charger_type = CHARGER_TYPE_AC;
+		break;
+	default:
+		charger_type = CHARGER_TYPE_NO;
+		break;
+	}
+
+	return charger_type;
+}
+
+static bool cw201x_get_dc_state(struct cw201x_info *cw201x)
+{
+	if (gpio_get_value(cw201x->dc_det_gpio) == cw201x->dc_det_flag)
+		return true;
+
+	return false;
+}
+
+static bool cw201x_check_charge(struct cw201x_info *cw201x)
+{
+	if (cw201x_get_usb_state(cw201x) != CHARGER_TYPE_NO)
+		return true;
+	if (cw201x_get_dc_state(cw201x))
+		return true;
+
+	return false;
+}
+
+static int cw201x_get_soc(struct cw201x_info *cw201x)
+{
+	int cap;
+
+	cap = cw201x_read(cw201x, REG_SOC);
+	if ((cap < 0) || (cap > 100))
+		cap = cw201x->capacity;
+
+	cw201x->capacity = cap;
+	return cw201x->capacity;
+}
+
+static int cw201x_update_get_soc(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	return cw201x_get_soc(cw201x);
+}
+
+static int cw201x_update_get_voltage(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	return cw201x_get_vol(cw201x);
+}
+
+static bool cw201x_update_get_chrg_online(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	return cw201x_check_charge(cw201x);
+}
+
+static struct dm_fuel_gauge_ops cw201x_fg_ops = {
+	.get_soc = cw201x_update_get_soc,
+	.get_voltage = cw201x_update_get_voltage,
+	.get_chrg_online = cw201x_update_get_chrg_online,
+};
+
+static int cw201x_fg_cfg(struct cw201x_info *cw201x)
+{
+	u8 val = MODE_SLEEP;
+	int i;
+
+	if ((val & MODE_SLEEP_MASK) == MODE_SLEEP) {
+		val = MODE_NORMAL;
+		cw201x_write(cw201x, REG_MODE, val);
+	}
+
+	for (i = 0; i < 64; i++) {
+		cw201x_write(cw201x, REG_BATINFO + i,
+			     (u8)cw201x->cw_bat_config_info[i]);
+	}
+
+	return 0;
+}
+
+static int cw201x_fg_probe(struct udevice *dev)
+{
+	struct cw201x_info *cw201x = dev_get_priv(dev);
+
+	cw201x->dev = dev;
+	cw201x_fg_cfg(cw201x);
+
+	debug("vol: %d, soc: %d\n",
+	      cw201x_get_vol(cw201x), cw201x_get_soc(cw201x));
+
+	return 0;
+}
+
+static const struct udevice_id cw201x_ids[] = {
+	{ .compatible = "cw201x" },
+	{ }
+};
+
+U_BOOT_DRIVER(cw201x_fg) = {
+	.name = "cw201x_fg",
+	.id = UCLASS_FG,
+	.of_match = cw201x_ids,
+	.probe = cw201x_fg_probe,
+	.ofdata_to_platdata = cw201x_ofdata_to_platdata,
+	.ops = &cw201x_fg_ops,
+	.priv_auto_alloc_size = sizeof(struct cw201x_info),
+};

commit 4aa617558f6924256fa0e0150df1bffc229e81e7
Author: Andy Ye <Andy.Ye@rock-chips.com>
Date:   Tue Nov 7 14:11:53 2017 +0800

    lib: optee_client: add attestation protocol support using optee
    
    support attestation commands:
    at-attest-dh,at-attest-uuid,at-get-ca-request,at-set-ca-request
    
    Change-Id: I3fe94befa57a131e89dbe136c065a948b1631756
    Signed-off-by: Andy Ye <andy.ye@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 5f3089d367..9954cbf7aa 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -27,5 +27,10 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
-
+uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size);
+uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size);
+uint32_t trusty_attest_get_ca
+	(uint8_t *operation_start, uint32_t *operation_size,
+	 uint8_t *out, uint32_t *out_len);
+uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size);
 #endif
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
deleted file mode 100644
index e9c3aadc3d..0000000000
--- a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
+++ /dev/null
@@ -1,16634 +0,0 @@
-#include <stdint.h>
-#include <stddef.h>
-
-const uint8_t keymaster_data[] = {
-0x48, 0x53, 0x54, 0x4f, 0x00, 0x00, 0x00, 0x00,
-0x70, 0x06, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
-0x20, 0x00, 0x00, 0x01, 0xfa, 0xf1, 0xef, 0x23,
-0x6e, 0xa3, 0x2e, 0xd9, 0x56, 0x3c, 0xb6, 0xba,
-0xa6, 0x3d, 0x60, 0x08, 0x6b, 0xe0, 0xe0, 0xd0,
-0x4c, 0x96, 0xb0, 0x72, 0xdf, 0x4e, 0xfa, 0xa7,
-0x79, 0x79, 0x93, 0xff, 0x0e, 0xf2, 0xf0, 0x25,
-0x90, 0x40, 0x71, 0x55, 0x95, 0xb8, 0x56, 0x83,
-0x30, 0x9a, 0x9b, 0x02, 0x9e, 0x30, 0x02, 0xfa,
-0x13, 0xad, 0x86, 0x5b, 0x76, 0xf7, 0x23, 0xda,
-0xc9, 0x40, 0xa1, 0x12, 0x20, 0x8f, 0xc6, 0x5a,
-0xed, 0x01, 0x0d, 0xc3, 0xe3, 0xcd, 0xc4, 0x00,
-0x90, 0xd5, 0x97, 0xf8, 0x24, 0x79, 0x9f, 0xab,
-0xaf, 0xc4, 0xf2, 0xe2, 0x67, 0xa2, 0xe2, 0x41,
-0x64, 0x8d, 0x3c, 0x91, 0xde, 0xc6, 0x5b, 0xe3,
-0xf5, 0xa6, 0x32, 0xbf, 0x64, 0xa6, 0xaf, 0xa3,
-0x18, 0xec, 0x24, 0x8d, 0x32, 0x95, 0x0a, 0xe6,
-0x63, 0x5c, 0xa6, 0x5d, 0x02, 0xa4, 0x5b, 0x06,
-0x95, 0x7e, 0xa8, 0xe3, 0x8f, 0xe6, 0xd5, 0xe4,
-0xd8, 0x8f, 0xba, 0x06, 0x1a, 0xa2, 0x7a, 0xd2,
-0x14, 0xe5, 0x75, 0xde, 0xd7, 0x8a, 0x63, 0x0d,
-0x51, 0x18, 0xc1, 0xfb, 0x78, 0xa3, 0xbd, 0x06,
-0x06, 0x1f, 0xa9, 0x8c, 0x1b, 0x9f, 0x46, 0xe8,
-0xd9, 0x77, 0x91, 0xc5, 0xf8, 0x9f, 0xd0, 0x8d,
-0x60, 0xdf, 0xb4, 0x6d, 0xe3, 0x7d, 0xf9, 0xab,
-0xff, 0x7b, 0xfe, 0x78, 0x7f, 0x2b, 0x67, 0x6c,
-0x3e, 0x6d, 0x7b, 0x47, 0xaa, 0x1f, 0xe6, 0x6e,
-0xa6, 0x94, 0xc3, 0x3c, 0xf7, 0x27, 0x3d, 0xbe,
-0x3e, 0xba, 0x69, 0x5d, 0x67, 0x98, 0xf0, 0x96,
-0x04, 0x6d, 0x01, 0xbb, 0x5f, 0x3b, 0x58, 0x57,
-0xe0, 0xbf, 0x8e, 0x6c, 0x32, 0xc2, 0x3d, 0x03,
-0xf4, 0xa5, 0x4a, 0xcd, 0x19, 0xc3, 0x9e, 0xfb,
-0xe0, 0xec, 0x25, 0xff, 0xb7, 0x67, 0x77, 0xe7,
-0x07, 0x0b, 0xb1, 0xa6, 0xb3, 0x5b, 0x5f, 0x97,
-0xa1, 0xc8, 0x83, 0x62, 0x6b, 0x2b, 0x1d, 0xf3,
-0xfd, 0x92, 0x3e, 0x45, 0x7f, 0x09, 0xf1, 0xcc,
-0xab, 0x59, 0xd6, 0xbd, 0x21, 0x7c, 0xec, 0xef,
-0x9d, 0xba, 0x52, 0x07, 0xf9, 0xd8, 0x92, 0xfb,
-0x8e, 0x11, 0x4d, 0xa1, 0x7f, 0x45, 0x4c, 0x46,
-0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x28, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
-0x34, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x02, 0x00,
-0x02, 0x00, 0x00, 0x05, 0x34, 0x00, 0x20, 0x00,
-0x04, 0x00, 0x28, 0x00, 0x10, 0x00, 0x0f, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x80, 0x32, 0x01, 0x00, 0x80, 0x32, 0x01, 0x00,
-0x07, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00,
-0x00, 0x40, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00,
-0xd2, 0x0d, 0x00, 0x00, 0x9a, 0xba, 0x00, 0x00,
-0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
-0xc0, 0x02, 0x00, 0x00, 0xc0, 0x02, 0x00, 0x00,
-0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x78, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00,
-0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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-0x01, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0xc0, 0x02, 0x02, 0x00,
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-0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x3f, 0x03, 0x02, 0x00,
-0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x6e, 0x00, 0x00, 0x00,
-0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
-0xa0, 0x31, 0x01, 0x00, 0xa0, 0xb1, 0x01, 0x00,
-0x98, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x79, 0x03, 0x02, 0x00,
-0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, };
-const uint32_t keymaster_size = 133028;
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index 49e6582cc6..7de07bb0cf 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 9f309d0a44..7710c89a50 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1217,3 +1217,244 @@ uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
 
 	return TeecResult;
 }
+
+uint32_t trusty_attest_dh(uint8_t *dh, uint32_t *dh_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *dh_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					143,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	*dh_size = TeecOperation.params[0].tmpref.size;
+	memcpy(dh, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_attest_uuid(uint8_t *uuid, uint32_t *uuid_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *uuid_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					144,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	*uuid_size = TeecOperation.params[0].tmpref.size;
+	memcpy(uuid, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_attest_get_ca(uint8_t *operation_start,
+			      uint32_t *operation_size,
+			      uint8_t *out,
+			      uint32_t *out_len)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	OpteeClientApiLibInitialize();
+
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *operation_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, operation_start, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = *out_len;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					145,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	*out_len = TeecOperation.params[1].tmpref.size;
+	memcpy(out, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	return TeecResult;
+}
+
+uint32_t trusty_attest_set_ca(uint8_t *ca_response, uint32_t *ca_response_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+				{ 0xa8, 0x69, 0x9c, 0xe6,
+				  0x88, 0x6c, 0x5d, 0x5d
+				}
+			     };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				      &TeecSession,
+				      TeecUuid,
+				      TEEC_LOGIN_PUBLIC,
+				      NULL,
+				      NULL,
+				      &ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = *ca_response_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, ca_response, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INOUT,
+						    TEEC_NONE,
+						    TEEC_NONE,
+						    TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					146,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}

commit 90e877b59cfff7acecfdea99df7acda8be1d6a39
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Nov 10 14:06:09 2017 +0800

    android: load fdt from the oem partition
    
    The fdt must be named of "kernel.dtb", and it's saved
    in the root dir of the oem partition.
    
    Change-Id: I70dc9cbbc295f23b08bf122df3b29bba7dacb82f
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 7060b2e690..efda47d18a 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -14,11 +14,13 @@
 #include <fs.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_OEM  "oem"
 #define ANDROID_PARTITION_SYSTEM "system"
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
 #define ANDROID_ARG_SERIALNO "androidboot.serialno="
+#define ANDROID_ARG_FDT_FILENAME "kernel.dtb"
 
 static int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
@@ -227,6 +229,12 @@ int android_bootloader_boot_kernel(unsigned long kernel_address)
 	char *bootm_args[] = {
 		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
+	if (!android_bootloader_get_fdt(ANDROID_PARTITION_OEM,
+					ANDROID_ARG_FDT_FILENAME)) {
+		fdt_addr = env_get("fdt_addr_r");
+		bootm_args[3] = fdt_addr;
+	}
+
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 
 	printf("Booting kernel at %s with fdt at %s...\n\n\n",

commit 8ce4d2843d8b611cf7fec1d74f7648a03f16f714
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Fri Nov 10 11:32:45 2017 +0800

    android: add api for loading fdt
    
    If user get the kernel fdt into the independent partition
    which is the ext4 filesystem, we can use this api to load
    fdt.
    
    Change-Id: I4fa494beffecb41e8c0e4c02f1e782d0291e2d05
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 733c0580d3..7060b2e690 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -6,10 +6,12 @@
 
 #include <android_bootloader.h>
 #include <android_bootloader_message.h>
+#include <android_avb/avb_ops_user.h>
 
 #include <cli.h>
 #include <common.h>
 #include <malloc.h>
+#include <fs.h>
 
 #define ANDROID_PARTITION_BOOT "boot"
 #define ANDROID_PARTITION_SYSTEM "system"
@@ -158,6 +160,66 @@ static int android_bootloader_boot_bootloader(void)
 	return -1;
 }
 
+static int android_bootloader_get_fdt(const char *part_name,
+		const char *load_file_name)
+{
+	const char *dev_iface = "mmc";
+	struct blk_desc *dev_desc;
+	disk_partition_t boot_part_info;
+	char *fdt_addr = NULL;
+	char slot_suffix[5] = {0};
+	char dev_part[3] = {0};
+	loff_t bytes = 0;
+	loff_t pos = 0;
+	loff_t len_read;
+	unsigned long addr = 0;
+	int part_num = -1;
+	int dev_num = 0;
+	int ret;
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	memset(&boot_part_info, 0, sizeof(boot_part_info));
+
+#ifdef CONFIG_AVB_LIBAVB_USER
+	if (avb_get_current_slot(slot_suffix)) {
+		printf("ANDROID: Get Current Slot error.\n");
+		return -1;
+	}
+
+	part_num = android_part_get_info_by_name_suffix(dev_desc,
+					     part_name,
+					     slot_suffix, &boot_part_info);
+#else
+	part_num = part_get_info_by_name(dev_desc, part_name, &boot_part_info);
+	if (part_num < 0) {
+		printf("ANDROID: Could not find partition \"%s\"\n", part_name);
+		return -1;
+	}
+#endif
+
+	snprintf(dev_part, ARRAY_SIZE(dev_part), ":%x", part_num);
+	if (fs_set_blk_dev(dev_iface, dev_part, FS_TYPE_EXT))
+		return -1;
+
+	fdt_addr = env_get("fdt_addr_r");
+	if (!fdt_addr) {
+		printf("ANDROID: No Found FDT Load Address.\n");
+		return -1;
+	}
+	addr = simple_strtoul(fdt_addr, NULL, 16);
+
+	ret = fs_read(load_file_name, addr, pos, bytes, &len_read);
+	if (ret < 0)
+		return -1;
+
+	return 0;
+}
+
 int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char kernel_addr_str[12];

commit bf17c6275dad7d8f168a2a1517f6ac53fbe399c5
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 17 11:09:55 2017 +0800

    androidboot: boot the system without a/b avb
    
    Support boot the system in the old mode, and there
    is no need to differentiate the _a or _b slot
    in the gpt table.
    
    Change-Id: I162e34a9bd0120db051f709faec06daf3bc0aa9c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 0861317d8c..9c3294e21f 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -751,6 +751,20 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
 		android_avb_boot_flow(boot_slot_select, load_address);
+	} else if (verify_flag == 'o') {
+		load_address = CONFIG_SYS_LOAD_ADDR;
+		strcat(slot_partition[1], requested_partitions[1]);
+		ops->get_unique_guid_for_partition(ops,
+						   slot_partition[1],
+						   guid_buf,
+						   guid_buf_size);
+		strcat(root_data, guid_buf);
+		command_line = android_assemble_cmdline(boot_slot_select,
+							mode_cmdline);
+		strcat(root_data, " ");
+		strcat(root_data, command_line);
+		env_set("bootargs", root_data);
+		android_boot_flow(load_address);
 	} else {
 		return CMD_RET_USAGE;
 	}

commit b3b934b63660f484b9aa2e398fdb8c4151402420
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 17 10:55:00 2017 +0800

    android: boot the system without a/b and avb
    
    Change-Id: I9a6da661c9cf17e2e3190b55f18acd600f9b63f1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 33388c585d..733c0580d3 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -388,3 +388,27 @@ int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
 	return -1;
 }
+
+int android_boot_flow(unsigned long kernel_address)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t boot_part_info;
+	int ret;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+	/* Load the kernel from the desired "boot" partition. */
+	part_get_info_by_name(dev_desc, ANDROID_PARTITION_BOOT, &boot_part_info);
+	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+				 -1UL);
+	if (ret < 0)
+		return ret;
+	android_bootloader_boot_kernel(kernel_address);
+
+	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
+	return -1;
+}
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index ef072a9374..97e36ed49a 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -73,4 +73,12 @@ char *android_assemble_cmdline(const char *slot_suffix,
  */
 int android_bootloader_boot_kernel(unsigned long kernel_address);
 
+/** android_bootloader_boot_kernel- Load and execute the kernel boot.
+ *
+ * @kernel_address:	address where to load the kernel if needed.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_boot_flow(unsigned long kernel_address);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 9aed1a133698e1fd4bd90672d5b8ad0e0cdae58d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Tue Nov 14 22:33:59 2017 +0800

    androidboot: add some new info to cmdline
    
    The android things system need some avb info
    in the stage of u-boot, like VBH value and so
    on.
    
    Change-Id: Ia102931f3b0c912c7e1f34f668d8af0b45fa4a6e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 96fa50f08a..0861317d8c 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -647,6 +647,7 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	bool unlocked = true;
 	const char *mode_cmdline = NULL;
 	char root_data[70] = "root=PARTUUID=";
+	char avb_root_data[2000] = {0};
 	size_t guid_buf_size = 37;
 	char guid_buf[37];
 	char verify_flag;
@@ -718,18 +719,13 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			return CMD_RET_FAILURE;
 		}
 
-		strcat(slot_partition[1], requested_partitions[1]);
-		strcat(slot_partition[1], slot_data->ab_suffix);
-		ops->get_unique_guid_for_partition(ops,
-						   slot_partition[1],
-						   guid_buf,
-						   guid_buf_size);
-		strcat(root_data, guid_buf);
 		command_line = android_assemble_cmdline(slot_data->ab_suffix,
 							mode_cmdline);
-		strcat(root_data, " ");
-		strcat(root_data, command_line);
-		env_set("bootargs", root_data);
+		strcat(avb_root_data, " ");
+		strcat(avb_root_data, command_line);
+		strcat(avb_root_data, " ");
+		strcat(avb_root_data, slot_data->cmdline);
+		env_set("bootargs", avb_root_data);
 		load_address = CONFIG_SYS_LOAD_ADDR;
 		if (avb_close_optee_client())
 			printf("Can not close optee client!\n");

commit 54fcf04fb5d81b5ec0cd78b0d3faef0106e005b4
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Fri Nov 17 13:22:55 2017 +0800

    gva_rk3229: Update README document.
    
    Change-Id: I423d625f4f92e4762a32162772f3858f8069723a
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/README b/board/rockchip/gva_rk3229/README
index 579ec4d812..434cc04010 100644
--- a/board/rockchip/gva_rk3229/README
+++ b/board/rockchip/gva_rk3229/README
@@ -9,6 +9,8 @@ Get the Source and prebuild binary
   > git clone https://github.com/rockchip-linux/rkdeveloptool.git
 
 Compile the OP-TEE
+(For Android Things Project, use the image bellow.
+<android root>/vendor/bsp/rockchip/security/optee/os/trust_with_ta.img)
 ===============
 
   > cd optee_os
@@ -18,6 +20,7 @@ Compile the OP-TEE
   > cp out/arm-plat-rockchip/core/tee-pager.bin ../u-boot/tee.bin
 
 Compile the U-Boot
+(For Android Things Project, use Android build system.)
 ==================
 
   > cd ../u-boot
@@ -31,11 +34,11 @@ Compile the U-Boot
 Compile the rkdeveloptool
 =======================
   Follow instructions in latest README
-  > cd ../rkflashtool
+  > cd ../rkdeveloptool
+  > sudo apt-get install libudev-dev libusb-1.0-0-dev dh-autoreconf
   > autoreconf -i
   > ./configure
   > make
-  > sudo make install
 
   Get rkdeveloptool in you Host in this step.
 
@@ -43,19 +46,23 @@ Both origin binaries and Tool are ready now, choose either option 1 or
 option 2 to deploy U-Boot.
 
 Package the image
+(For Android Things Project, use Android build system.)
 =================
 
   > cd ../u-boot
-  > rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img
+  > rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img 0x61000000
 
   Get uboot.img in this step.
 
 Flash the image to eMMC
+(For Android Things Project that supports AB update,
+please follow google's documents.)
 =======================
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > cd ..
   > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
   > rkdeveloptool wl 0x4000 uboot.img
+  > rkdeveloptool wl 0x6000 trust.img
   > rkdeveloptool rd
 
 You should be able to get U-Boot log message with OP-TEE boot info.

commit 00412ace7105ebcf421f78984110375d07f80fec
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 18:46:55 2017 +0800

    gva_rk3229: add serialno init
    
    Change-Id: I6fc41b5480adfbd8456032e844d4f22f30c413a5
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
index cacd2479c4..ece9ed57a9 100644
--- a/board/rockchip/gva_rk3229/gva_rk3229.c
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -6,14 +6,99 @@
 
 #include <common.h>
 #include <dm.h>
+#include <misc.h>
+#include <time.h>
 #include <asm/io.h>
+#include <asm/setup.h>
 #include <asm/arch/uart.h>
+#include <asm/arch/vendor.h>
+#include <configs/gva_rk3229.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* define serialno max length, the max length is 512 Bytes
+ * The remaining bytes are used to ensure that the first 512 bytes
+ * are valid when executing 'env_set("serial#", value)'.
+ */
+#define VENDOR_SN_MAX	513
+/* These values are provided by the chip documentation */
+#define RK3229_CPUID_OFF  0x7
+#define RK3229_CPUID_LEN  0x10
+
+/*
+ * First obtain the serial number from vendor partition,
+ * if vendor partition is not initialized, then generate
+ * a default serial number according to CPU Id.
+ */
+int set_serialno(void)
+{
+	char serialno_str[VENDOR_SN_MAX];
+	struct udevice *dev;
+	u8 cpuid[RK3229_CPUID_LEN] = {0};
+	u8 low[RK3229_CPUID_LEN/2], high[RK3229_CPUID_LEN/2];
+	u64 serialno;
+	int ret, i;
+
+	/* Read serial number from vendor storage part */
+	memset(serialno_str, 0, VENDOR_SN_MAX);
+#ifdef CONFIG_VENDOR_STORAGE_API
+	ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1));
+	if (ret > 0) {
+		env_set("serial#", serialno_str);
+	} else {
+#endif
+#ifdef CONFIG_ROCKCHIP_EFUSE
+		/* retrieve the device */
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_GET_DRIVER(rockchip_efuse), &dev);
+		if (ret) {
+			printf("%s: could not find efuse device\n", __func__);
+			return ret;
+		}
+		/* read the cpu_id range from the efuses */
+		ret = misc_read(dev, RK3229_CPUID_OFF, &cpuid, sizeof(cpuid));
+		if (ret) {
+			printf("%s: reading cpuid from the efuses failed\n", __func__);
+			return ret;
+		}
+#endif
+		/* Generate the serial number based on CPU ID */
+		for (i = 0; i < 8; i++) {
+			low[i] = cpuid[1 + (i << 1)];
+			high[i] = cpuid[i << 1];
+		}
+		serialno = crc32_no_comp(0, low, 8);
+		serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
+		snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+
+		env_set("serial#", serialno_str);
+#ifdef CONFIG_VENDOR_STORAGE_API
+	}
+#endif
+	return 0;
+}
+
 #ifdef CONFIG_MISC_INIT_R
 int misc_init_r(void)
 {
+	set_serialno();
+
 	return 0;
 }
 #endif
+
+#ifdef CONFIG_SERIAL_TAG
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+	char *serial_string;
+	u64 serial = 0;
+
+	serial_string = env_get("serial#");
+
+	if (serial_string)
+		serial = simple_strtoull(serial_string, NULL, 16);
+
+	serialnr->high = (u32)(serial >> 32);
+	serialnr->low = (u32)(serial & 0xffffffff);
+}
+#endif
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index ca958ebfe1..2847bdda16 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -9,6 +9,10 @@
 
 #include <configs/rk322x_common.h>
 
+/* Read CPUID and set "serial#" env. */
+#define CONFIG_MISC_INIT_R
+#define CONFIG_SERIAL_TAG
+#define CONFIG_ENV_OVERWRITE
 
 /* Store env in emmc */
 #undef CONFIG_ENV_SIZE

commit c9d8141cc65a6536931bb9d677aeebfebb38d3d2
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Fri Nov 17 10:49:01 2017 +0800

    gva_rk3229: Modify to bringup Android Things.
    
    Change-Id: Ie13341380f3526478ca35643e52ebbee741f9269
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
index 4c9b90e901..17a6708837 100644
--- a/arch/arm/dts/rk3229-gva.dts
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -13,22 +13,15 @@
 	model = "RK3229 GVA/Android Things Board V1.0";
 	compatible = "rockchip,rk3229-gva", "rockchip,rk3229";
 
+	chosen {
+		stdout-path = &uart2;
+	};
+
 	memory@60000000 {
 		device_type = "memory";
 		reg = <0x60000000 0x40000000>;
 	};
 
-	reserved-memory {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		trust_reserved: trust@0x68400000 {
-			 reg = <0x68400000 0xe00000>;
-			 no-map;
-		};
-	};
-
 	sdio_pwrseq: sdio-pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		clocks = <&rk805 1>;
diff --git a/board/rockchip/gva_rk3229/MAINTAINERS b/board/rockchip/gva_rk3229/MAINTAINERS
index dfa1090c3e..2c3e2e0bd1 100644
--- a/board/rockchip/gva_rk3229/MAINTAINERS
+++ b/board/rockchip/gva_rk3229/MAINTAINERS
@@ -1,6 +1,6 @@
-EVB-RK3229
+GVA-RK3229
 M:      Kever Yang <kever.yang@rock-chips.com>
 S:      Maintained
-F:      board/rockchip/evb_rk3229
-F:      include/configs/evb_rk3229.h
-F:      configs/evb-rk3229_defconfig
+F:      board/rockchip/gva_rk3229
+F:      include/configs/gva_rk3229.h
+F:      configs/gva-rk3229_defconfig
diff --git a/board/rockchip/gva_rk3229/Makefile b/board/rockchip/gva_rk3229/Makefile
index 65dcd8be35..27cc3da993 100644
--- a/board/rockchip/gva_rk3229/Makefile
+++ b/board/rockchip/gva_rk3229/Makefile
@@ -1,7 +1,7 @@
 #
-# (C) Copyright 2015 Google, Inc
+# Copyright (C) 2017 Rockchip Electronic Co.,Ltd
 #
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y	+= evb_rk3229.o
+obj-y	+= gva_rk3229.o
diff --git a/board/rockchip/gva_rk3229/README b/board/rockchip/gva_rk3229/README
index 93328c75b2..579ec4d812 100644
--- a/board/rockchip/gva_rk3229/README
+++ b/board/rockchip/gva_rk3229/README
@@ -1,8 +1,8 @@
 Get the Source and prebuild binary
 ==================================
 
-  > mkdir ~/evb_rk3229
-  > cd ~/evb_rk3229
+  > mkdir ~/gva_rk3229
+  > cd ~/gva_rk3229
   > git clone git://git.denx.de/u-boot.git
   > git clone https://github.com/OP-TEE/optee_os.git
   > git clone https://github.com/rockchip-linux/rkbin.git
@@ -23,11 +23,10 @@ Compile the U-Boot
   > cd ../u-boot
   > export CROSS_COMPILE=arm-linux-gnueabihf-
   > export ARCH=arm
-  > make evb-rk3229_defconfig
-  > make
-  > make u-boot.itb
+  > make gva-rk3229_defconfig
+  > make u-boot-dtb.bin
 
-  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+  Get u-boot-dtb.bin in this step.
 
 Compile the rkdeveloptool
 =======================
@@ -47,25 +46,18 @@ Package the image
 =================
 
   > cd ../u-boot
-  > tools/mkimage -n rk322x -T rksd -d tpl/u-boot-spl.bin idbloader.img
-  > cat spl/u-boot-spl.bin >> idbloader.img
+  > rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img
 
-  Get idbloader.img in this step.
+  Get uboot.img in this step.
 
 Flash the image to eMMC
 =======================
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
   > cd ..
   > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
-  > rkdeveloptool wl 64 u-boot/idbloader.img
-  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool wl 0x4000 uboot.img
   > rkdeveloptool rd
 
-Flash the image to SD card
-==========================
-  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
-  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
-
 You should be able to get U-Boot log message with OP-TEE boot info.
 
 For more detail, please reference to:
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index fd5af2fd58..b036fa784e 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -12,14 +12,10 @@ CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_VENDOR_PARTITION=y
-CONFIG_TARGET_EVB_RK3229=y
+CONFIG_TARGET_GVA_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"
 CONFIG_DEBUG_UART=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -78,6 +74,8 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_SHA1=y
+CONFIG_SHA256=y
 CONFIG_ERRNO_STR=y
 CONFIG_AVB_LIBAVB=y
 CONFIG_AVB_LIBAVB_AB=y
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index bbb734968c..ca958ebfe1 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -23,10 +23,10 @@
 #undef PARTS_DEFAULT
 #define PARTS_DEFAULT \
 	"uuid_disk=${uuid_gpt_disk};" \
-	"name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
-	"name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=bootloader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
+	"name=bootloader_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=tos_a,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=tos_b,size=4M,uuid=${uuid_gpt_reserved};" \
 	"name=misc,size=4M,uuid=${uuid_gpt_misc};" \
 	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
 	"name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
@@ -35,6 +35,8 @@
 	"name=system_b,size=512M,uuid=${uuid_gpt_system_b};" \
 	"name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
 	"name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
+	"name=oem_a,size=32M,uuid=${uuid_gpt_oem_a};" \
+	"name=oem_b,size=32M,uuid=${uuid_gpt_oem_b};" \
 	"name=cache,size=100M,uuid=${uuid_gpt_cache};" \
 	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
@@ -50,7 +52,7 @@
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 #undef CONFIG_BOOTCOMMAND
 #define CONFIG_BOOTCOMMAND \
-	"boot_android mmc 0:7 a;" \
+	"bootavb flow v; " \
 
 /* Enable atags */
 #define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)

commit f795db4fdef86fea8f81660fbf3ff579999f5f6a
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:45:15 2017 +0800

    rockchip: rk3229: set CONFIG_ROCKCHIP_VENDOR_PARTITION to enable vendor api
    
    Change-Id: I51fb6f6c66bf4e2ebb24a833184f336be640cf57
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index f63245b641..c124cd7b94 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -11,6 +11,7 @@ CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"

commit 991297a54a58dd03c193b4c31181814a71ad3b3c
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:37:29 2017 +0800

    rockchip: rk3229: set CONFIG_ROCKCHIP_BLOCK_API to enable block api
    
    Change-Id: I16d20e39df54441739ee59084f737b44a3d6caf0
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 91da20a0b6..f63245b641 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -10,6 +10,7 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"

commit ceecd5fea6de2781691f9680016d16f24249362f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Oct 23 10:38:13 2017 +0800

    lib: avb: support the atx and public_key verify
    
    1.support the permanent attribute verify
    2.support the PRK, PIK, PSK certificate verify
    and then get the psk public_key, compare it with
    public_key in vbmeta.
    
    If the function is required, please open the macro
    AVB_VBMETA_PUBLIC_KEY_VALIDATE.
    
    Change-Id: Ifeab776c76f97fadd980671481ce27d203516673
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
index f5804885b9..28d5be030d 100644
--- a/include/android_avb/avb_atx_validate.h
+++ b/include/android_avb/avb_atx_validate.h
@@ -43,6 +43,31 @@ extern "C" {
 #define AVB_ATX_PIK_VERSION_LOCATION 0x1000
 #define AVB_ATX_PSK_VERSION_LOCATION 0x1001
 
+/**
+ * read permanent attributes from rpmb
+ *
+ * @param atx_ops
+ *
+ * @param attributes The attributes inclue psk_public product id,
+ * 		     ref:AvbAtxPermanentAttributes.
+ *
+ * @return AvbIOResult
+ */
+AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
+				      AvbAtxPermanentAttributes* attributes);
+
+/**
+ * read permanent attributes hash from efuse
+ *
+ * @param atx_ops
+ *
+ * @param attributes The attributes inclue psk_public product id,
+ * 		     ref:AvbAtxPermanentAttributes.
+ *
+ * @return AvbIOResult
+ */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
+					   uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
 /* An implementation of validate_vbmeta_public_key for Android Things. See
  * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
  * implementation uses the metadata expected with Android Things vbmeta images
diff --git a/lib/avb/rk_libavb_atx/avb_atx_validate.c b/lib/avb/rk_libavb_atx/avb_atx_validate.c
index dbc6769313..4002038273 100644
--- a/lib/avb/rk_libavb_atx/avb_atx_validate.c
+++ b/lib/avb/rk_libavb_atx/avb_atx_validate.c
@@ -23,11 +23,40 @@
  */
 
 #include <android_avb/avb_atx_validate.h>
-
 #include <android_avb/avb_rsa.h>
 #include <android_avb/avb_sha.h>
 #include <android_avb/avb_sysdeps.h>
 #include <android_avb/avb_util.h>
+#include <optee_include/OpteeClientInterface.h>
+
+/* read permanent attributes from rpmb */
+AvbIOResult avb_read_perm_attr(AvbAtxOps* atx_ops,
+				      AvbAtxPermanentAttributes* attributes)
+{
+	if (attributes != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
+		trusty_read_permanent_attributes((uint8_t *)attributes,
+						 sizeof(struct AvbAtxPermanentAttributes));
+		return AVB_IO_RESULT_OK;
+#endif
+	}
+
+	return -1;
+}
+
+/*read permanent attributes hash from efuse */
+AvbIOResult avb_read_perm_attr_hash(AvbAtxOps* atx_ops,
+					   uint8_t hash[AVB_SHA256_DIGEST_SIZE])
+{
+#ifdef CONFIG_OPTEE_CLIENT
+	if (trusty_read_attribute_hash((uint32_t *)hash, AVB_SHA256_DIGEST_SIZE / 4))
+		return -1;
+#else
+	avb_error("Please open the macro!\n");
+	return -1;
+#endif
+	return AVB_IO_RESULT_OK;
+}
 
 /* Computes the SHA256 |hash| of |length| bytes of |data|. */
 static void sha256(const uint8_t* data,
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index bf6c293684..887bb6b274 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -158,9 +158,20 @@ static AvbIOResult validate_vbmeta_public_key(
 	size_t public_key_metadata_length,
 	bool *out_is_trusted)
 {
+#ifdef AVB_VBMETA_PUBLIC_KEY_VALIDATE
+	if (out_is_trusted != NULL) {
+		avb_atx_validate_vbmeta_public_key(ops,
+						   public_key_data,
+						   public_key_length,
+						   public_key_metadata,
+						   public_key_metadata_length,
+						   out_is_trusted);
+	}
+#else
 	if (out_is_trusted != NULL) {
 		*out_is_trusted = true;
 	}
+#endif
 	return AVB_IO_RESULT_OK;
 }
 
@@ -293,6 +304,8 @@ AvbOps* avb_ops_user_new(void)
 	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
 	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
 	ops->ab_ops->init_ab_metadata = avb_ab_data_init;
+	ops->atx_ops->read_permanent_attributes = avb_read_perm_attr;
+	ops->atx_ops->read_permanent_attributes_hash = avb_read_perm_attr_hash;
 out:
 	return ops;
 }

commit 0916e43b542697b5028b6088dc33742933d88057
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 3 18:25:07 2017 +0800

    fastboot: support fuse at-perm-attr writting efuse
    
    In the android things system, the command of fuse at-perm-attr
    is used to program the permanent attributes and its hash.The
    permanent attributes is written in eMMC RPMB, and its hash is
    writen in efuse.
    
    Change-Id: Ib0745100063d18b56e2dfcb638e0c9f7e2ef9b0a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index a48b3e57f8..93e504d09f 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -985,12 +985,35 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
+		if (PERM_ATTR_TOTAL_SIZE != download_bytes) {
+			printf("Permanent attribute size is not equal!\n");
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+
 		if (avb_write_permanent_attributes((uint8_t *)
-						   CONFIG_FASTBOOT_BUF_ADDR,
-						   download_bytes))
+					       CONFIG_FASTBOOT_BUF_ADDR,
+					       download_bytes
+					       - PERM_ATTR_DIGEST_SIZE)) {
 			fastboot_tx_write_str("FAIL");
-		else
-			fastboot_tx_write_str("OKAY");
+			return;
+		}
+
+		if (avb_write_attribute_hash((uint8_t *)
+					     (CONFIG_FASTBOOT_BUF_ADDR
+					     + download_bytes
+					     - PERM_ATTR_DIGEST_SIZE),
+					     PERM_ATTR_DIGEST_SIZE)) {
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+
+		if (avb_write_perm_attr_flag(1)) {
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+
+		fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 #endif

commit fd717dcefea6deb8b59792cc2bf99c48549764c3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 8 16:04:05 2017 +0800

    lib: avb: support write efuse
    
    Write the permanent attributes hash to efuse.
    
    Change-Id: Id11586a66f055e7eb1a66997814f351509d49b21
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index 89ed4d5d24..ad57615aa6 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -224,4 +224,15 @@ int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
  */
 int avb_close_optee_client(void);
 
+/**
+ * Write the permanent attributes hash.
+ *
+ * @param buf    The permanent attributes hash data.
+ *
+ * @param length The length of permanent attributes hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_attribute_hash(uint8_t *buf, uint8_t length);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index d3e50c99bb..bf6c293684 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -466,3 +466,11 @@ int avb_close_optee_client(void)
 		return -1;
 	return 0;
 }
+
+int avb_write_attribute_hash(uint8_t *buf, uint8_t length)
+{
+	if (trusty_write_attribute_hash((uint32_t *)buf,
+	    (uint32_t)(length/sizeof(uint32_t))))
+		return -1;
+	return 0;
+}

commit 7b960a8a90538e615713a811177fe03585caee7c
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Thu Nov 16 16:32:13 2017 +0800

    fastboot: mmc: add actual disk size to response
    
    If GPT buf is invalid, it will send actual disk size
    back. We can use this actual disk size to build correct
    GPT partition.
    
    Change-Id: Ia54112951b7b8daa6afe369bc16a037cdbe8db39
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 6fddf5e86f..0c655ac9fa 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -293,6 +293,10 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
+#if CONFIG_IS_ENABLED(EFI_PARTITION)
+	u64 disksize = 0;
+	char reason[128] = {0};
+#endif
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
@@ -308,7 +312,14 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 		if (is_valid_gpt_buf(dev_desc, download_buffer)) {
 			printf("%s: invalid GPT - refusing to write to flash\n",
 			       __func__);
-			fastboot_fail("invalid GPT partition", response);
+			disksize = dev_desc->blksz * cpu_to_le64(dev_desc->lba);
+			snprintf(reason, ARRAY_SIZE(reason),
+				 "%s - %s '%lld.%lld MiB')",
+					"invalid GPT partition",
+					"Actual Disk Size",
+					disksize/0x100000,
+					disksize%0x100000);
+			fastboot_fail(reason, response);
 			return;
 		}
 		if (write_mbr_and_gpt_partitions(dev_desc, download_buffer)) {

commit 271551c99a0abe2ab0b8f61a1f0efbe74d772507
Author: Weiwen Chen <cww@rock-chips.com>
Date:   Thu Nov 16 16:15:39 2017 +0800

    part: efi: add check gpt alternate_lba attribute
    
    Change-Id: I00b4dc9fe0c75ed57110682a3dc0b3fbaa3cbcc7
    Signed-off-by: Weiwen Chen <cww@rock-chips.com>

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 2973d52f6a..b43b8b3d19 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -785,6 +785,14 @@ int is_valid_gpt_buf(struct blk_desc *dev_desc, void *buf)
 	/* determine start of GPT Header in the buffer */
 	gpt_h = buf + (GPT_PRIMARY_PARTITION_TABLE_LBA *
 		       dev_desc->blksz);
+
+	if ((le64_to_cpu(gpt_h->alternate_lba) + 1)
+			!= cpu_to_le64(dev_desc->lba)) {
+		printf("%s: failed checking '%s'\n", __func__,
+		       "invalid GPT Disk Size");
+		return -1;
+	}
+
 	if (validate_gpt_header(gpt_h, GPT_PRIMARY_PARTITION_TABLE_LBA,
 				dev_desc->lba))
 		return -1;

commit 5d3e2943595db6187114a583997ea4ac9f3c753f
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:49:31 2017 +0800

    rockchip: dts: rk322x: add efuse device node
    
    Change-Id: I7054a931a4cf742bd23e89477324b1eb1d953b8f
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 22324f97b3..246013d604 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -213,6 +213,23 @@
 		status = "disabled";
 	};
 
+	efuse: efuse@11040000 {
+		compatible = "rockchip,rk322x-efuse";
+		reg = <0x11040000 0x20>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru PCLK_EFUSE_256>;
+		clock-names = "pclk_efuse";
+
+		/* Data cells */
+		efuse_id: id@7 {
+			reg = <0x7 0x10>;
+		};
+		cpu_leakage: cpu_leakage@17 {
+			reg = <0x17 0x1>;
+		};
+	};
+
 	i2c0: i2c@11050000 {
 		compatible = "rockchip,rk3228-i2c";
 		reg = <0x11050000 0x1000>;

commit 1df1c8728fb4a2076a9f7b2d5b9507d03984c368
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Thu Nov 16 14:46:06 2017 +0800

    gva-rk3229: Enable rockchip efuse driver.
    
    Change-Id: Icc10ec157c9c86ecb909d71766f0d16ae920b451
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
index a9a3a40ce8..cacd2479c4 100644
--- a/board/rockchip/gva_rk3229/gva_rk3229.c
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -10,3 +10,10 @@
 #include <asm/arch/uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+	return 0;
+}
+#endif
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index ba71cc7dd1..fd5af2fd58 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -55,6 +55,8 @@ CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y

commit b4fa32f0b6f1b0f30c7aa8c8df6133b3384f877f
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:50:11 2017 +0800

    rockchip: efuse: Support rk322x non-secure efuse.
    
    Change-Id: Ia25df975d21d7c97cf090f0d374074c2c5cd1a58
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2e3bc9137a..1b060b7aa6 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -28,6 +28,17 @@
 #define RK3399_STROBE           BIT(1)
 #define RK3399_CSB              BIT(0)
 
+#define RK3288_A_SHIFT          6
+#define RK3288_A_MASK           0x3ff
+#define RK3288_NFUSES           32
+#define RK3288_BYTES_PER_FUSE   1
+#define RK3288_PGENB            BIT(3)
+#define RK3288_LOAD             BIT(2)
+#define RK3288_STROBE           BIT(1)
+#define RK3288_CSB              BIT(0)
+
+typedef int (*EFUSE_READ)(struct udevice *dev, int offset, void *buf, int size);
+
 struct rockchip_efuse_regs {
 	u32 ctrl;      /* 0x00  efuse control register */
 	u32 dout;      /* 0x04  efuse data out register */
@@ -54,7 +65,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
 	 */
 
 	struct udevice *dev;
-	u8 fuses[128];
+	u8 fuses[128] = {0};
 	int ret;
 
 	/* retrieve the device */
@@ -78,7 +89,7 @@ static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
 }
 
 U_BOOT_CMD(
-	rk3399_dump_efuses, 1, 1, dump_efuses,
+	rockchip_dump_efuses, 1, 1, dump_efuses,
 	"Dump the content of the efuses",
 	""
 );
@@ -128,10 +139,59 @@ static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
 	return 0;
 }
 
+static int rockchip_rk3288_efuse_read(struct udevice *dev, int offset,
+				      void *buf, int size)
+{
+	struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+	struct rockchip_efuse_regs *efuse =
+		(struct rockchip_efuse_regs *)plat->base;
+	u8 *buffer = buf;
+	int max_size = RK3288_NFUSES * RK3288_BYTES_PER_FUSE;
+
+	if (size > (max_size - offset))
+		size = max_size - offset;
+
+	/* Switch to read mode */
+	writel(RK3288_LOAD | RK3288_PGENB, &efuse->ctrl);
+	udelay(1);
+
+	while (size--) {
+		writel(readl(&efuse->ctrl) &
+				(~(RK3288_A_MASK << RK3288_A_SHIFT)),
+				&efuse->ctrl);
+		/* set addr */
+		writel(readl(&efuse->ctrl) |
+				((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
+				&efuse->ctrl);
+		udelay(1);
+		/* strobe low to high */
+		writel(readl(&efuse->ctrl) |
+				RK3288_STROBE, &efuse->ctrl);
+		ndelay(60);
+		/* read data */
+		*buffer++ = readl(&efuse->dout);
+		/* reset strobe to low */
+		writel(readl(&efuse->ctrl) &
+				(~RK3288_STROBE), &efuse->ctrl);
+		udelay(1);
+	}
+
+	/* Switch to standby mode */
+	writel(RK3288_PGENB | RK3288_CSB, &efuse->ctrl);
+
+	return 0;
+}
+
 static int rockchip_efuse_read(struct udevice *dev, int offset,
 			       void *buf, int size)
 {
-	return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+	EFUSE_READ efuse_read = NULL;
+
+	efuse_read = (EFUSE_READ)dev_get_driver_data(dev);
+	if (!efuse_read)
+		return -ENOSYS;
+
+	return (*efuse_read)(dev, offset, buf, size);
 }
 
 static const struct misc_ops rockchip_efuse_ops = {
@@ -147,7 +207,26 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
 }
 
 static const struct udevice_id rockchip_efuse_ids[] = {
-	{ .compatible = "rockchip,rk3399-efuse" },
+	{
+		.compatible = "rockchip,rockchip-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3066a-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3188-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk322x-efuse",
+		.data = (void *)&rockchip_rk3288_efuse_read,
+	},
+	{
+		.compatible = "rockchip,rk3399-efuse",
+		.data = (ulong)&rockchip_rk3399_efuse_read,
+	},
 	{}
 };
 

commit cd99aa821336764edd928f718f18202512f206f4
Author: Francis Fan <francis.fan@rock-chips.com>
Date:   Tue Nov 7 17:48:00 2017 +0800

    rockchip: rk322x: add PCLK_EFUSE_256 for dts file
    
    Change-Id: I46c4f0f80b54a72acdba107ea290a45c231c3dda
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index 13f9c864ca..1aa9e7c720 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -99,6 +99,8 @@
 
 #define CLK_NR_CLKS		(HCLK_PERI + 1)
 
+#define PCLK_EFUSE_256		327
+
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

commit 24b70d1ee058ab6858b7ac433bf2e697167dfb5e
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Thu Nov 16 14:37:46 2017 +0800

    gva-rk3229: Enable vendor storage related api.
    
    Change-Id: Iffb5761f2203592f9151c9c58d91e2678d9a781e
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
index ddcde563bf..ba71cc7dd1 100644
--- a/configs/gva-rk3229_defconfig
+++ b/configs/gva-rk3229_defconfig
@@ -10,6 +10,8 @@ CONFIG_TPL_MAX_SIZE=28672
 CONFIG_TPL_STACK=0x10088000
 CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_VENDOR_PARTITION=y
 CONFIG_TARGET_EVB_RK3229=y
 CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"

commit 263629555d5f42490c123e545ad25969a0a2b95a
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Wed Nov 15 15:53:57 2017 +0800

    rockchip: bootmode: Init mmc device for fastboot mode.
    
    This fixes issue that fastboot command failed with
    "MMC device -1 not found"
    
    Change-Id: Ifb136874aaf10dff3d3dc02043225407441085ca
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index ba3cf9fd27..d0dbff3bb8 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -69,6 +69,7 @@ int setup_boot_mode(void)
 {
 	void *reg;
 	int boot_mode;
+	char env_preboot[256] = {0};
 
 	rockchip_dnl_mode_check();
 
@@ -84,7 +85,15 @@ int setup_boot_mode(void)
 	switch (boot_mode) {
 	case BOOT_FASTBOOT:
 		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb 0");
+#if defined(CONFIG_FASTBOOT_FLASH_MMC_DEV)
+		snprintf(env_preboot, 256,
+				"setenv preboot; mmc dev %x; fastboot usb 0; ",
+				CONFIG_FASTBOOT_FLASH_MMC_DEV);
+#elif defined(CONFIG_FASTBOOT_FLASH_NAND_DEV)
+		snprintf(env_preboot, 256,
+				"setenv preboot; fastboot usb 0; ");
+#endif
+		env_set("preboot", env_preboot);
 		break;
 	case BOOT_UMS:
 		printf("enter UMS!\n");

commit e291f58fb4f581c35d6e3d2caebce877fc564945
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Nov 15 16:19:51 2017 +0800

    lib: avb: modify load boot partition size
    
    Load the boot image real size other than the
    boot partition size. If not, the uboot can not
    malloc a big buffer for the all boot partition.
    
    Change-Id: Ifc8d7cc1f214b94f6018c68cb03e8e9ce89781de
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_libavb/avb_slot_verify.c b/lib/avb/rk_libavb/avb_slot_verify.c
index aab33d9657..342144f290 100644
--- a/lib/avb/rk_libavb/avb_slot_verify.c
+++ b/lib/avb/rk_libavb/avb_slot_verify.c
@@ -135,7 +135,7 @@ static AvbSlotVerifyResult load_and_verify_hash_partition(
 	 * since it's such a common workflow.
 	 */
 	image_size = hash_desc.image_size;
-	if (allow_verification_error) {
+	if (0) {
 		if (ops->get_size_of_partition == NULL) {
 			avb_errorv(part_name,
 			": The get_size_of_partition() operation is "

commit d7c30fe9d62d193d1b6222328950d53cb8d7c439
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 14 19:21:00 2017 +0800

    gva_rk3229: Add preboot commands.
    
    1. Select eMMC as default device.
    2. Enter fastboot mode if no partition table exists.
    
    Change-Id: I4416076353f6d9dc8365153c1edec1924754b072
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
index f42d40d277..bbb734968c 100644
--- a/include/configs/gva_rk3229.h
+++ b/include/configs/gva_rk3229.h
@@ -39,7 +39,13 @@
 	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
 	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
 
-#define CONFIG_PREBOOT
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
 
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 #undef CONFIG_BOOTCOMMAND

commit d816b9732f5f3eab435aa72b25461f24b5bfb8ef
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 14 22:33:48 2017 +0800

    evb_rk3229: Add preboot commands.
    
    1. Select eMMC as default device.
    2. Enter fastboot mode if no partition table exists.
    
    Change-Id: Iebdf94c94605bd1165155bc7de027f364324cb19
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index a74303385d..c73a100ebb 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -18,7 +18,13 @@
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
-#define CONFIG_PREBOOT
+#undef CONFIG_PREBOOT
+#define CONFIG_PREBOOT \
+	"mmc dev 0; " \
+	"gpt guid mmc 0; " \
+	"if test $? = 1; then " \
+		"fastboot usb 0; " \
+	"fi; "
 
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 

commit 0e3d235ecd97cbc9e139535ea44fcf5b13b83e81
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Fri Nov 10 13:19:26 2017 +0800

    androidboot: Pass "androidboot.serialno" to kernel cmdline.
    
    Change-Id: Ia0b693f2652ab35b2e29b1c23335f962b3943050
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 1f92f00d74..33388c585d 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -16,6 +16,7 @@
 
 #define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
 #define ANDROID_ARG_ROOT "root="
+#define ANDROID_ARG_SERIALNO "androidboot.serialno="
 
 static int android_bootloader_message_load(
 	struct blk_desc *dev_desc,
@@ -214,8 +215,9 @@ char *android_assemble_cmdline(const char *slot_suffix,
 {
 	const char *cmdline_chunks[16];
 	const char **current_chunk = cmdline_chunks;
-	char *env_cmdline, *cmdline, *rootdev_input;
+	char *env_cmdline, *cmdline, *rootdev_input, *serialno;
 	char *allocated_suffix = NULL;
+	char *allocated_serialno = NULL;
 	char *allocated_rootdev = NULL;
 	unsigned long rootdev_len;
 
@@ -234,6 +236,17 @@ char *android_assemble_cmdline(const char *slot_suffix,
 		*(current_chunk++) = allocated_suffix;
 	}
 
+	serialno = env_get("serial#");
+	if (serialno) {
+		allocated_serialno = malloc(strlen(ANDROID_ARG_SERIALNO) +
+					  strlen(serialno) + 1);
+		memset(allocated_serialno, 0, strlen(ANDROID_ARG_SERIALNO) +
+				strlen(serialno) + 1);
+		strcpy(allocated_serialno, ANDROID_ARG_SERIALNO);
+		strcat(allocated_serialno, serialno);
+		*(current_chunk++) = allocated_serialno;
+	}
+
 	rootdev_input = env_get("android_rootdev");
 	if (rootdev_input) {
 		rootdev_len = strlen(ANDROID_ARG_ROOT) + CONFIG_SYS_CBSIZE + 1;

commit 374a999563f37fafc1d38863844ae294949f3f65
Author: Cody Xie <cody.xie@rock-chips.com>
Date:   Tue Nov 7 14:09:14 2017 +0800

    fastboot: usb: Add fastboot cmds to pass bootloadertest.
    
    TEST:
    python system/extra/tests/bootloader/bootloader.py --device-type iot
    
    TODO:
    "fastboot getvar all" is still NOT implemnted.
    Functions should be implemented with actual state.
    
    Change-Id: Ic757694622a5038a9766cedfde26c22935446347
    Signed-off-by: Cody Xie <cody.xie@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 8d32bdc973..a48b3e57f8 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -408,6 +408,20 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		strncat(response, FASTBOOT_VERSION, chars_left);
 	} else if (!strcmp_l1("bootloader-version", cmd)) {
 		strncat(response, U_BOOT_VERSION, chars_left);
+	} else if (!strcmp_l1("product", cmd)) {
+		strncat(response, CONFIG_SYS_BOARD, chars_left);
+	} else if (!strcmp_l1("variant", cmd)) {
+		strncat(response, "userdebug", chars_left);
+	} else if (!strcmp_l1("secure", cmd)) {
+		strncat(response, "no", chars_left);
+	} else if (!strcmp_l1("unlocked", cmd)) {
+		strncat(response, "yes", chars_left);
+	} else if (!strcmp_l1("off-mode-charge", cmd)) {
+		strncat(response, "0", chars_left);
+	} else if (!strcmp_l1("battery-voltage", cmd)) {
+		strncat(response, "7.4", chars_left);
+	} else if (!strcmp_l1("battery-soc-ok", cmd)) {
+		strncat(response, "yes", chars_left);
 	} else if (!strcmp_l1("downloadsize", cmd) ||
 		!strcmp_l1("max-download-size", cmd)) {
 		char str_num[12];
@@ -450,7 +464,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		char slot_surrent[8] = {0};
 
 		if (!avb_get_current_slot(slot_surrent))
-			strncat(response, slot_surrent, chars_left);
+			strncat(response, slot_surrent+1, chars_left);
 		else
 			strcpy(response, "FAILgeterror");
 #else
@@ -484,7 +498,9 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		cmd = strsep(&part_name, ":");
 		if (!strcmp(part_name, "boot") ||
 		    !strcmp(part_name, "system") ||
-		    !strcmp(part_name, "boot")) {
+		    !strcmp(part_name, "vendor") ||
+		    !strcmp(part_name, "vbmeta") ||
+		    !strcmp(part_name, "oem")) {
 			strncat(response, "yes", chars_left);
 		} else {
 			strcpy(response, "FAILno");
@@ -492,6 +508,60 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 #else
 		fastboot_tx_write_str("FAILnot implemented");
 		return;
+#endif
+	} else if (!strncmp("slot-unbootable", cmd, 15)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *slot_name = cmd;
+
+		cmd = strsep(&slot_name, ":");
+		if (!strcmp(slot_name, "a") ||
+		    !strcmp(slot_name, "b")) {
+			strncat(response, "no", chars_left);
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("slot-successful", cmd, 15)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *slot_name = cmd;
+
+		cmd = strsep(&slot_name, ":");
+		if (!strcmp(slot_name, "a") ||
+		    !strcmp(slot_name, "b")) {
+			strncat(response, "no", chars_left);
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("slot-retry-count", cmd, 16)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *slot_name = cmd;
+		char count[10] = {0};
+		static int cnt[2] = {0};
+
+		cmd = strsep(&slot_name, ":");
+		if (!strcmp(slot_name, "a")) {
+			sprintf(count, "%c", 0x30+cnt[0]);
+			strncat(response, count, chars_left);
+			if (cnt[0] > 0)
+				cnt[0]--;
+		} else if (!strcmp(slot_name, "b")) {
+			sprintf(count, "%c", 0x30+cnt[1]);
+			strncat(response, count, chars_left);
+			if (cnt[1] > 0)
+				cnt[1]--;
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
 #endif
 	} else if (!strncmp("partition-type", cmd, 14) ||
 		   !strncmp("partition-size", cmd, 14)) {
@@ -775,7 +845,7 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
-	char response[FASTBOOT_RESPONSE_LEN];
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
 #ifdef CONFIG_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 

commit 8ddd5824c59745d58956299bb3125926155c599a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Nov 16 10:13:47 2017 +0800

    usb: gadget: add bos descriptor response for rockusb command
    
    Rockchip upgrade tool use bcdUSB (0x0201) field distinguishing maskrom
    or loader device at present. Unfortunately, it conflict with Windows 8
    and beyond which request BOS descriptor in this case that bcdUSB is set
    to 0x0201. This patch adds the HACK codes to fix it.
    
    Change-Id: I6a186139f79ba27f5d9e099493e9e742a29bbe40
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index d0ee7847b9..626117f075 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -271,6 +271,18 @@ static int count_configs(struct usb_composite_dev *cdev, unsigned type)
 	return count;
 }
 
+static int bos_desc(struct usb_composite_dev *cdev)
+{
+	struct usb_bos_descriptor	*bos = cdev->req->buf;
+
+	bos->bLength = USB_DT_BOS_SIZE;
+	bos->bDescriptorType = USB_DT_BOS;
+	bos->wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE);
+	bos->bNumDeviceCaps = 0;
+
+	return le16_to_cpu(bos->wTotalLength);
+}
+
 static void device_qual(struct usb_composite_dev *cdev)
 {
 	struct usb_qualifier_descriptor	*qual = cdev->req->buf;
@@ -764,6 +776,18 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 				value = min(w_length, (u16) value);
 			break;
 		case USB_DT_BOS:
+			/* HACK: only for rockusb command.
+			 * Rockchip upgrade tool use bcdUSB (0x0201) field
+			 * distinguishing maskrom or loader device at present.
+			 * Unfortunately, it conflict with Windows 8 and beyond
+			 * which request BOS descriptor in this case that bcdUSB
+			 * is set to 0x0201.
+			 */
+			if (!strncmp(cdev->driver->name, "rkusb_ums_dnl", 13)) {
+				value = bos_desc(cdev);
+				value = min(w_length, (u16) value);
+			}
+
 			/*
 			 * The USB compliance test (USB 2.0 Command Verifier)
 			 * issues this request. We should not run into the

commit ba437c8c987895da95fa841aaeea893b747ab0e5
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Nov 13 17:46:11 2017 +0800

    usb: gadget: force rockchip vid and pid for rockusb
    
    This change amend USB VID & PID to Rockchip for rockusb.
    
    Change-Id: I3c94e442cc0190d2d3f13424470dd2d84af55eb0
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index b5d350a975..aa4b139945 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -48,9 +48,14 @@ struct rk_flash_info {
 
 int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 {
-	/* Enumerate as a loader device */
-	if (IS_RKUSB_UMS_DNL(name))
+	if (IS_RKUSB_UMS_DNL(name)) {
+		/* Fix to Rockchip VID and PID */
+		dev->idVendor  = __constant_cpu_to_le16(0x2207);
+		dev->idProduct = __constant_cpu_to_le16(CONFIG_ROCKUSB_G_DNL_PID);
+
+		/* Enumerate as a loader device */
 		dev->bcdUSB = cpu_to_le16(0x0201);
+	}
 
 	return 0;
 }
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 3a2bf339b1..d883efcf9b 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -29,6 +29,7 @@
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK30"
+#define CONFIG_ROCKUSB_G_DNL_PID	0x301A
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
index 7e9664303d..5ed44e2073 100644
--- a/include/configs/rk3066_common.h
+++ b/include/configs/rk3066_common.h
@@ -36,6 +36,8 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	8
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x300A
+
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_TEXT_BASE		0x10080C04
 #define CONFIG_SPL_STACK		0x1008FFFF
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index f311ebc2a9..3696b71960 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -30,6 +30,9 @@
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x310C
+#define TEST_NUM_G
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index b8f549cd9d..0fde4cc985 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -35,6 +35,7 @@
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(0x8000 - 0x800)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK31"
+#define CONFIG_ROCKUSB_G_DNL_PID	0x310B
 
 #define CONFIG_SPL_TEXT_BASE		0x10080800
 /* spl size 32kb sram - 2kb bootrom */
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 62cb1b557f..d0e7fda38a 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -33,6 +33,7 @@
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(28 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK32"
+#define CONFIG_ROCKUSB_G_DNL_PID	0x320B
 
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index b0e7c80529..2d1a41a040 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -36,6 +36,8 @@
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x320A
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index c5aba94508..b7971782b5 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -30,6 +30,8 @@
 #define GICD_BASE			0xFF811000
 #define GICC_BASE			0xFF812000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x320C
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 86d1a1c808..734dd63636 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -37,6 +37,8 @@
 #define GICD_BASE			0xffB71000
 #define GICC_BASE			0xffB72000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x330A
+
 #define CONFIG_BOUNCE_BUFFER
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 9873131be8..a9a7905723 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -38,6 +38,8 @@
 #define GICR_BASE			0xFEF00000
 #define GICC_BASE			0xFFF00000
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x330C
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index bfb11ffdff..93bda24782 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -27,6 +27,8 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+#define CONFIG_ROCKUSB_G_DNL_PID	0x110A
+
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 9ce0c3f039..aeb490718e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1900,6 +1900,7 @@ CONFIG_ROCKCHIP_CHIP_TAG
 CONFIG_ROCKCHIP_MAX_INIT_SIZE
 CONFIG_ROCKCHIP_SDHCI_MAX_FREQ
 CONFIG_ROCKCHIP_USB2_PHY
+CONFIG_ROCKUSB_G_DNL_PID
 CONFIG_ROM_STUBS
 CONFIG_ROOTFS_OFFSET
 CONFIG_ROOTPATH

commit dd31eefe79c7c288965c32b3372353ab576c2850
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Nov 14 10:39:28 2017 +0800

    cmd: rockusb: fix upgrade failed when gpt partitions exist
    
    We found rockusb upgraded failed when there had gpt partitions in
    system caused by total sectors checking, this change expose all mmc
    partitions for rockusb command.
    
    Change-Id: I8847c3c7885d17d47189c55765f97abb4965e8b4
    Reported-by: Joseph Chen <chenjh@rock-chips.com>
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 177f71ad21..1ffbb8fbae 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -96,14 +96,9 @@ static int rkusb_init(const char *devtype, const char *devnums_part_str)
 		g_rkusb->ums = ums_new;
 		cnt = g_rkusb->ums_cnt;
 
-		/* if partnum = 0, expose all partitions */
-		if (partnum == 0) {
-			g_rkusb->ums[cnt].start_sector = 0;
-			g_rkusb->ums[cnt].num_sectors = block_dev->lba;
-		} else {
-			g_rkusb->ums[cnt].start_sector = info.start;
-			g_rkusb->ums[cnt].num_sectors = info.size;
-		}
+		/* Expose all partitions for rockusb command */
+		g_rkusb->ums[cnt].start_sector = 0;
+		g_rkusb->ums[cnt].num_sectors = block_dev->lba;
 
 		g_rkusb->ums[cnt].read_sector = rkusb_read_sector;
 		g_rkusb->ums[cnt].write_sector = rkusb_write_sector;

commit b4a5485919805ced01a2052cdd9b0871cc28d500
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 13 10:33:02 2017 +0800

    rockchip: rk3229: add gva som board support
    
    gva-rk3229 is a som based board design for Android Things project.
    
    Change-Id: I2e054407231a2549573d2302855c09b9795fdddd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-gva.dts b/arch/arm/dts/rk3229-gva.dts
new file mode 100644
index 0000000000..4c9b90e901
--- /dev/null
+++ b/arch/arm/dts/rk3229-gva.dts
@@ -0,0 +1,289 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ X11
+ */
+
+/dts-v1/;
+
+#include "rk322x.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "RK3229 GVA/Android Things Board V1.0";
+	compatible = "rockchip,rk3229-gva", "rockchip,rk3229";
+
+	memory@60000000 {
+		device_type = "memory";
+		reg = <0x60000000 0x40000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		trust_reserved: trust@0x68400000 {
+			 reg = <0x68400000 0xe00000>;
+			 no-map;
+		};
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk805 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
+	};
+
+	vcc_host: vcc-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc_host";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		clocks = <&rk805 1>;
+		clock-names = "ext_clock";
+		uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default", "rts_gpio";
+		BT,reset_gpio    = <&gpio2 29 GPIO_ACTIVE_HIGH>;
+		BT,wake_gpio     = <&gpio3 27 GPIO_ACTIVE_HIGH>;
+		BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		rockchip,grf = <&grf>;
+		wifi_chip_type = "ap6255";
+		WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		autorepeat;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key>;
+
+		power_key: power-key {
+			label = "GPIO Key Power";
+			gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
+			linux,code = <116>;
+			debounce-interval = <100>;
+			wakeup-source;
+		};
+	};
+};
+
+
+&i2c0 {
+	status = "okay";
+
+	rk805: rk805@18 {
+		compatible = "rockchip,rk805";
+		status = "okay";
+		reg = <0x18>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+
+		rtc {
+			status = "okay";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		gpio {
+			status = "okay";
+		};
+
+		regulators {
+			compatible = "rk805-regulator";
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vdd_arm: RK805_DCDC1@0 {
+				regulator-compatible = "RK805_DCDC1";
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-initial-mode = <0x1>;
+				regulator-ramp-delay = <12500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vdd_logic: RK805_DCDC2@1 {
+				regulator-compatible = "RK805_DCDC2";
+				regulator-name = "vdd_logic";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-initial-mode = <0x1>;
+				regulator-ramp-delay = <12500>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: RK805_DCDC3@2 {
+				regulator-compatible = "RK805_DCDC3";
+				regulator-name = "vcc_ddr";
+				regulator-initial-mode = <0x1>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: RK805_DCDC4@3 {
+				regulator-compatible = "RK805_DCDC4";
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-initial-mode = <0x1>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-mode = <0x2>;
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_18: RK805_LDO1@4 {
+				regulator-compatible = "RK805_LDO1";
+				regulator-name = "vcc_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_18emmc: RK805_LDO2@5 {
+				regulator-compatible = "RK805_LDO2";
+				regulator-name = "vcc_18emmc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10: RK805_LDO3@6 {
+				regulator-compatible = "RK805_LDO3";
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <1 12 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_b4 */
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	keys {
+		pwr_key: pwr-key {
+			rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&dmc {
+	rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
+		0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
+		0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1
+		0x5 0x5 0x3 0xC 0x1E 0x100 0x0 0x4
+		0x0 0x924>;
+	rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>;
+	rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15
+		0 300 3 0 120>;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&uart2 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&usb20_otg {
+       status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig
index dc8071e4f3..eebe63131d 100644
--- a/arch/arm/mach-rockchip/rk322x/Kconfig
+++ b/arch/arm/mach-rockchip/rk322x/Kconfig
@@ -4,6 +4,13 @@ config TARGET_EVB_RK3229
 	bool "EVB_RK3229"
 	select BOARD_LATE_INIT
 
+config TARGET_GVA_RK3229
+	bool "GVA RK3229 board"
+	select BOARD_LATE_INIT
+	help
+	  GVA RK3229 is a SOM and base-board combination based on RK3229. It
+	  target for Google Voice Assistant with Android Things project.
+
 config SYS_SOC
 	default "rockchip"
 
@@ -14,5 +21,6 @@ config SPL_SERIAL_SUPPORT
 	default y
 
 source "board/rockchip/evb_rk3229/Kconfig"
+source "board/rockchip/gva_rk3229/Kconfig"
 
 endif
diff --git a/board/rockchip/gva_rk3229/Kconfig b/board/rockchip/gva_rk3229/Kconfig
new file mode 100644
index 0000000000..61a5cad55e
--- /dev/null
+++ b/board/rockchip/gva_rk3229/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_GVA_RK3229
+
+config SYS_BOARD
+	default "gva_rk3229"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "gva_rk3229"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/gva_rk3229/MAINTAINERS b/board/rockchip/gva_rk3229/MAINTAINERS
new file mode 100644
index 0000000000..dfa1090c3e
--- /dev/null
+++ b/board/rockchip/gva_rk3229/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3229
+M:      Kever Yang <kever.yang@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk3229
+F:      include/configs/evb_rk3229.h
+F:      configs/evb-rk3229_defconfig
diff --git a/board/rockchip/gva_rk3229/Makefile b/board/rockchip/gva_rk3229/Makefile
new file mode 100644
index 0000000000..65dcd8be35
--- /dev/null
+++ b/board/rockchip/gva_rk3229/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Google, Inc
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb_rk3229.o
diff --git a/board/rockchip/gva_rk3229/README b/board/rockchip/gva_rk3229/README
new file mode 100644
index 0000000000..93328c75b2
--- /dev/null
+++ b/board/rockchip/gva_rk3229/README
@@ -0,0 +1,72 @@
+Get the Source and prebuild binary
+==================================
+
+  > mkdir ~/evb_rk3229
+  > cd ~/evb_rk3229
+  > git clone git://git.denx.de/u-boot.git
+  > git clone https://github.com/OP-TEE/optee_os.git
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
+
+Compile the OP-TEE
+===============
+
+  > cd optee_os
+  > make clean
+  > make CROSS_COMPILE_ta_arm32=arm-none-eabi- PLATFORM=rockchip-rk322x
+  Get tee.bin in this step, copy it to U-Boot root dir:
+  > cp out/arm-plat-rockchip/core/tee-pager.bin ../u-boot/tee.bin
+
+Compile the U-Boot
+==================
+
+  > cd ../u-boot
+  > export CROSS_COMPILE=arm-linux-gnueabihf-
+  > export ARCH=arm
+  > make evb-rk3229_defconfig
+  > make
+  > make u-boot.itb
+
+  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
+  > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
+  > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+  > cd ../u-boot
+  > tools/mkimage -n rk322x -T rksd -d tpl/u-boot-spl.bin idbloader.img
+  > cat spl/u-boot-spl.bin >> idbloader.img
+
+  Get idbloader.img in this step.
+
+Flash the image to eMMC
+=======================
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > cd ..
+  > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
+  > rkdeveloptool wl 64 u-boot/idbloader.img
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool rd
+
+Flash the image to SD card
+==========================
+  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
+  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
+
+You should be able to get U-Boot log message with OP-TEE boot info.
+
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option
diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c
new file mode 100644
index 0000000000..a9a3a40ce8
--- /dev/null
+++ b/board/rockchip/gva_rk3229/gva_rk3229.c
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/configs/gva-rk3229_defconfig b/configs/gva-rk3229_defconfig
new file mode 100644
index 0000000000..ddcde563bf
--- /dev/null
+++ b/configs/gva-rk3229_defconfig
@@ -0,0 +1,82 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_ROCKCHIP_RK322X=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081004
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_TARGET_EVB_RK3229=y
+CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_DEFAULT_DEVICE_TREE="rk3229-gva"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SPL_OPTEE_SUPPORT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK322X=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0x11030000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y
diff --git a/include/configs/gva_rk3229.h b/include/configs/gva_rk3229.h
new file mode 100644
index 0000000000..f42d40d277
--- /dev/null
+++ b/include/configs/gva_rk3229.h
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIGS_GVA_RK3229_H
+#define __CONFIGS_GVA_RK3229_H
+
+#include <configs/rk322x_common.h>
+
+
+/* Store env in emmc */
+#undef CONFIG_ENV_SIZE
+#define CONFIG_ENV_SIZE                 (32 << 10)
+#define CONFIG_SYS_MMC_ENV_DEV          0
+#define CONFIG_SYS_MMC_ENV_PART         0
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
+
+#ifndef CONFIG_SPL_BUILD
+/* Enable gpt partition table */
+#undef PARTS_DEFAULT
+#define PARTS_DEFAULT \
+	"uuid_disk=${uuid_gpt_disk};" \
+	"name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
+	"name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \
+	"name=misc,size=4M,uuid=${uuid_gpt_misc};" \
+	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
+	"name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
+	"name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
+	"name=system_a,size=512M,uuid=${uuid_gpt_system_a};" \
+	"name=system_b,size=512M,uuid=${uuid_gpt_system_b};" \
+	"name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
+	"name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
+	"name=cache,size=100M,uuid=${uuid_gpt_cache};" \
+	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
+	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
+
+#define CONFIG_PREBOOT
+
+#define CONFIG_SYS_BOOT_RAMDISK_HIGH
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND \
+	"boot_android mmc 0:7 a;" \
+
+/* Enable atags */
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
+#define CONFIG_INITRD_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+
+#endif
+
+#endif

commit a2be733b20f6a3349ed1657dc10936fdb6808af9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 17:09:47 2017 +0800

    rockchip: evb-rk3399: update defconfig after rebase
    
    Change-Id: I81018850cc6612d2252558db53f864651c6f73d6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index b39c38f399..4557c2b032 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -11,22 +11,24 @@ CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
@@ -60,7 +62,6 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
-CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
@@ -88,8 +89,8 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_LCD=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
+CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit bcf2399d4d5b7e5de09abeca269da17e0e311ad3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 17:03:45 2017 +0800

    rockchip: evb-rk3229: update defconfig after rebase
    
    update defconfig after rebase from next-dev, mostly:
    - add boot_android, avb
    
    Change-Id: I44807f7ad51656fd350b5fe558ac47884c022934
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index e035e7c771..91da20a0b6 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -19,21 +19,19 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_SPL_OPTEE_SUPPORT=y
-CONFIG_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_ANDROID_BOOT_IMAGE=y
-CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -55,7 +53,6 @@ CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_DM_RC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
@@ -63,14 +60,12 @@ CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
-CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
@@ -80,3 +75,8 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_ERRNO_STR=y
+CONFIG_AVB_LIBAVB=y
+CONFIG_AVB_LIBAVB_AB=y
+CONFIG_AVB_LIBAVB_ATX=y
+CONFIG_AVB_LIBAVB_USER=y
+CONFIG_OPTEE_CLIENT=y

commit 89e3937034cc4774be3ea626f36f6318b70f89bd
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 16:59:33 2017 +0800

    rockchip: boot_mode: add rocovery mode
    
    Add recovery mode as one of reboot mode.
    
    Change-Id: I7288e8cc31eee213766dad45ed717aa16985abd5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 87ff3220a9..ba3cf9fd27 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -98,6 +98,10 @@ int setup_boot_mode(void)
 		printf("enter charging!\n");
 		env_set("preboot", "setenv preboot; charge");
 		break;
+	case BOOT_RECOVERY:
+		printf("enter Recovery mode!\n");
+		env_set("reboot_mode", "recovery");
+		break;
 	}
 
 	return 0;

commit 9f7ea89d5d531a16e3dec5041865c535a00a5f9d
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Wed Oct 18 15:43:32 2017 +0800

    androidboot: add BOOT_RECOVERY support
    
    if user input "reboot recovery" by adb or serial console,
    uboot will load recovery ramfs image to run.
    
    Change-Id: Ibad1709ed78938dbf1826446a0de5c822c6ce4e4
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
    split boot_android and boot_mode int two commits.
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index fec7e729c0..96fa50f08a 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -674,7 +674,18 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		printf("Enter boot-normal!\n");
 		mode_cmdline = "skip_initramfs";
 	} else {
-		mode_cmdline = "skip_initramfs";
+		/*
+		 * Firstly, confirm if there is a command in misc partition in
+		 * previous cases, and then we need to confirm whether user has
+		 * requested to enter recovery mode by entering "reboot recovery"
+		 * command through adb or serial console.
+		 */
+		char *env_rebootmode = env_get("reboot_mode");
+
+		if (env_rebootmode && !strcmp("recovery", env_rebootmode))
+			printf("Enter recovery mode by command 'reboot recovery'!\n");
+		else
+			mode_cmdline = "skip_initramfs";
 	}
 
 	avb_version = avb_version_string();

commit 3f55bd17ec79d4c1fff6548e4f9007cd9bb47bc1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 16:55:30 2017 +0800

    rockchip: bootmode: adapt fastboot cmd to google code
    
    Google change the fastboot cmd, update it.
    
    Change-Id: I50f03f8d4f2ba5679920553a055b24ecc0ba92b0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 4238dc9818..87ff3220a9 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -84,7 +84,7 @@ int setup_boot_mode(void)
 	switch (boot_mode) {
 	case BOOT_FASTBOOT:
 		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
+		env_set("preboot", "setenv preboot; fastboot usb 0");
 		break;
 	case BOOT_UMS:
 		printf("enter UMS!\n");

commit 8fafb73c37984ebf461c50e0847123dc752e9c8d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 14 11:07:27 2017 +0800

    rockchip: rk322x: reserve memory for trsut TA
    
    U-boot must reserve memory for trsut TA if
    android system can call trust TA for security
    service.So u-boot can reserve memory using
    fixed parametar and obtaining parameter from
    trust TA.
    
    Change-Id: Idf869be3e041699914075ed5a2ce206e6dd262ff
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 137479eb7d..ee89c121bf 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -16,6 +16,26 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define TRUST_PARAMETER_OFFSET    (34 * 1024 * 1024)
+
+struct tos_parameter_t {
+	u32 version;
+	u32 checksum;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}tee_mem;
+	struct {
+		char name[8];
+		s64 phy_addr;
+		u32 size;
+		u32 flags;
+	}drm_mem;
+	s64 reserve[8];
+};
+
 __weak int rk_board_late_init(void)
 {
 	return 0;
@@ -59,13 +79,26 @@ int board_init(void)
 
 int dram_init_banksize(void)
 {
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 32M for OPTEE with TA */
-	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+	struct tos_parameter_t *tos_parameter;
+	tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
+			TRUST_PARAMETER_OFFSET);
+	if (tos_parameter->tee_mem.flags == 1) {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
+					- CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
+					tos_parameter->tee_mem.size;
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+					+ gd->ram_size - gd->bd->bi_dram[1].start;
+	} else {
+		gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+		gd->bd->bi_dram[0].size = 0x8400000;
+		/* Reserve 32M for OPTEE with TA */
+		gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
 				+ gd->bd->bi_dram[0].size + 0x2000000;
-	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+		gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
 				+ gd->ram_size - gd->bd->bi_dram[1].start;
+	}
 
 	return 0;
 }

commit ef52a073f0f0fbdc7152173f342b717a01437fa3
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Nov 3 17:27:27 2017 +0800

    fastboot: add missing brace in cb_flash()
    
    In the function cb_flash, we call avb_read_flash_lock_state
    in the conditional judgement, but we do not add brackets after
    the return.This cause the fastboot can not work well.
    
    Change-Id: Ib9bbd367d25bdc3e93e6db4444896caa114382a7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index d46fde9212..8d32bdc973 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -779,9 +779,11 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 
-	if (avb_read_flash_lock_state(&flash_lock_state))
+	if (avb_read_flash_lock_state(&flash_lock_state)) {
 		fastboot_tx_write_str("FAIL");
 		return;
+	}
+
 	if (flash_lock_state == 0) {
 		fastboot_tx_write_str("FAILThe device is locked, can not flash!");
 		printf("The device is locked, can not flash!\n");

commit 82ee22d4d330164fa24d6431ca69bf6133ec3143
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 11 17:28:47 2017 +0800

    androidboot: support recovery and fastboot mode
    
    The system must support recovery and fastboot
    mode, so the u-boot must judge the boot command
    in the misc partition.
    
    Change-Id: I53c876eeefdc20ebe313a6a73d4cfac443fafa67
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index c986764b0f..fec7e729c0 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <bootm.h>
 #include <command.h>
+#include <android_bootloader_message.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
@@ -74,6 +75,60 @@ U_BOOT_CMD(
 );
 
 #ifdef CONFIG_AVB_LIBAVB_USER
+static int bootloader_message_read(struct android_bootloader_message *data)
+{
+	AvbOps *ops;
+	char requested_partitions[] = "misc";
+	size_t out_num_read;
+	char *buffer;
+
+	ops = avb_ops_user_new();
+	buffer = (char *)data;
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->read_from_partition(ops, requested_partitions,
+				     0, 2048, buffer,
+				     &out_num_read) != 0) {
+		printf("do avb read error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+static int bootloader_message_write(struct android_bootloader_message *data)
+{
+	AvbOps *ops;
+	char requested_partitions[] = "misc";
+	char *buffer;
+
+	ops = avb_ops_user_new();
+	buffer = (char *)data;
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->write_to_partition(ops, requested_partitions,
+				     0, 2048, buffer) != 0) {
+		printf("do avb write error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
 int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
 			    int argc, char * const argv[])
 {
@@ -592,14 +647,36 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	bool unlocked = true;
 	const char *mode_cmdline = NULL;
 	char root_data[70] = "root=PARTUUID=";
-	mode_cmdline = "skip_initramfs";
 	size_t guid_buf_size = 37;
 	char guid_buf[37];
 	char verify_flag;
 	char boot_slot_select[5];
+	struct android_bootloader_message data;
+	const char *fastboot_cmd = env_get("fastbootcmd");
 
 	if (argc != 2)
 		return CMD_RET_USAGE;
+
+	bootloader_message_read(&data);
+	if (!strcmp("bootonce-bootloader", data.command)) {
+		memset(data.command, 0, sizeof(data.command));
+		bootloader_message_write(&data);
+		if (fastboot_cmd) {
+			printf("bootonce-bootloader!\n");
+			return run_command(fastboot_cmd, CMD_FLAG_ENV);
+		} else {
+			printf("The fastbootcmd is NULL!\n");
+			return CMD_RET_SUCCESS;
+		}
+	} else if (!strcmp("boot-recovery", data.command)) {
+		printf("Enter boot-recovery!\n");
+	} else if(!strcmp("boot-normal", data.command)) {
+		printf("Enter boot-normal!\n");
+		mode_cmdline = "skip_initramfs";
+	} else {
+		mode_cmdline = "skip_initramfs";
+	}
+
 	avb_version = avb_version_string();
 	printf("Android avb version is %s.\n", avb_version);
 	ops = avb_ops_user_new();

commit 4e1bbe849d3f26647783cb425fa4e8010e31ac90
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 16:31:40 2017 +0800

    fastboot: support oem fuse at-bootloader-vboot-key
    
    Change-Id: Ifd5a0edeaf43cf1b359125db6168d7e102bcf0bf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 059cc3ad4b..d46fde9212 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -921,6 +921,23 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 			fastboot_tx_write_str("OKAY");
 #else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
+	} else if (strncmp("fuse at-bootloader-vboot-key", cmd + 4, 27) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		if (download_bytes != VBOOT_KEY_HASH_SIZE) {
+			fastboot_tx_write_str("FAIL");
+			printf("The vboot key size error!\n");
+		}
+
+		if (avb_write_vbootkey_hash((uint8_t *)
+					    CONFIG_FASTBOOT_BUF_ADDR,
+					    VBOOT_KEY_HASH_SIZE)) {
+			fastboot_tx_write_str("FAIL");
+			return;
+		}
+		fastboot_tx_write_str("OKAY");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
 #endif
 	} else {
 		fastboot_tx_write_str("FAILunknown oem command");

commit cf7b148dc2268eee010bfabfcf1c3119a8af6847
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 16:16:22 2017 +0800

    androidboot: free no use buffer
    
    If excute avb_ab_flow() failed, the free the
    no use buffer.
    
    Change-Id: I874f3367eceb35424b069a04a1ec35c37b46e639
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index bfe48708ac..c986764b0f 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -620,10 +620,12 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (verify_flag == 'v') {
 		debug("start with verify!\n");
 		if (avb_ab_flow(ops->ab_ops,
-			    requested_partitions,
-			    flags,
-			    AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-			    &slot_data)) {
+				requested_partitions,
+				flags,
+				AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+				&slot_data)) {
+			avb_slot_verify_data_free(slot_data);
+			avb_ops_user_free(ops);
 			printf("avb_ab_flow() error!\n");
 			return CMD_RET_FAILURE;
 		}
@@ -648,8 +650,6 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		       slot_data->loaded_partitions->data,
 		       slot_data->loaded_partitions->data_size);
 		android_bootloader_boot_kernel(load_address);
-		avb_slot_verify_data_free(slot_data);
-		avb_ops_user_free(ops);
 	} else if (verify_flag == 'n') {
 		load_address = CONFIG_SYS_LOAD_ADDR;
 		avb_ab_slot_select(ops->ab_ops, boot_slot_select);

commit 708de1435a2fb38cb5e434c55b54087855fede8d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 16:10:37 2017 +0800

    androidboot: close optee client when start kernel
    
    Change-Id: I4b4626e8e2bc89c711988fe23245fa6e71ac7204
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 27834bc73a..bfe48708ac 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -641,6 +641,9 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		strcat(root_data, command_line);
 		env_set("bootargs", root_data);
 		load_address = CONFIG_SYS_LOAD_ADDR;
+		if (avb_close_optee_client())
+			printf("Can not close optee client!\n");
+
 		memcpy((uint8_t*)load_address,
 		       slot_data->loaded_partitions->data,
 		       slot_data->loaded_partitions->data_size);

commit 52b8c717cf31a68d8f2e0b4800537d47bf2f709c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 15:46:52 2017 +0800

    lib: avb: close optee client
    
    Change-Id: Iee7c991f7c06acbb064e016e11338cbf846be20d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index 6fb4bacfbc..89ed4d5d24 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -215,4 +215,13 @@ int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
  */
 int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
 
+/**
+ * U-boot close the optee client when start kernel
+ * to prevent the optee client being invoking by other
+ * program.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_close_optee_client(void);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 32124bd3ad..d3e50c99bb 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -459,3 +459,10 @@ int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
 		return -1;
 	return 0;
 }
+
+int avb_close_optee_client(void)
+{
+	if(trusty_notify_optee_uboot_end())
+		return -1;
+	return 0;
+}

commit 468df3b26a47b957e05f99cf210e1581ffb07eb2
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Nov 3 11:51:52 2017 +0800

    lib: optee_client: add read vboot key flag func
    
    Change-Id: Id0405cc2b695f00b5d7586d01bd0b66279b24430
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index c1aa6c4d10..5f3089d367 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -24,6 +24,7 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
 uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag);
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
 uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 6a57e3b7d6..9f309d0a44 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1027,6 +1027,64 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 	return TeecResult;
 }
 
+uint32_t trusty_read_vbootkey_enable_flag(uint8_t *flag)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	uint32_t bootflag;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = 1 * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					5,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS) {
+		memcpy(&bootflag, SharedMem0.buffer, SharedMem0.size);
+		if (bootflag == 0x000000FF)
+			*flag = 1;
+	}
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
 uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
 {
 	TEEC_Result TeecResult;

commit 4a872f4aa8369cafafa5dca780687b8552a7b5cb
Author: Wenping Zhang <wenping.zhang@rock-chips.com>
Date:   Fri Oct 20 09:19:01 2017 +0800

    rockchip: rk322x: speed up the emmc and the cpu.
    
    increase the cpu frequence to 816M, and enable mmc ddr mode
    for emmc.
    
    Change-Id: I93d6b3c625c73d5e75accfb26559930dd299e0e9
    Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index a7999ca5af..c93609d5ce 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -11,11 +11,11 @@
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
-#define APLL_HZ		(600 * MHz)
+#define APLL_HZ		(816 * MHz)
 #define GPLL_HZ		(594 * MHz)
 
-#define CORE_PERI_HZ	150000000
-#define CORE_ACLK_HZ	300000000
+#define CORE_PERI_HZ	204000000
+#define CORE_ACLK_HZ	408000000
 
 #define BUS_ACLK_HZ	148500000
 #define BUS_HCLK_HZ	148500000
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 250e6c8833..20c083db63 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -277,6 +277,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	}
 #endif
 	dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
+	plat->cfg.host_caps |= MMC_MODE_DDR_52MHz;
 	host->mmc = &plat->mmc;
 	host->mmc->priv = &priv->host;
 	host->mmc->dev = dev;

commit fe83bbf40d3910628895c2b0e325a6d8a8bdf8cf
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 12:11:00 2017 +0800

    lib: avb: add reed/write vbootkey hash
    
    The android things require the soc-v key hash to be flashed
    using the fastboot. So these function can be used in fastboot
    to flash the key hash.
    
    Change-Id: I6e00f2e1e371793b6f0868356ac0a51090adfe5e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index c232ee8320..6fb4bacfbc 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -30,6 +30,7 @@
 
 #define PERM_ATTR_DIGEST_SIZE 32
 #define PERM_ATTR_TOTAL_SIZE  1084
+#define VBOOT_KEY_HASH_SIZE   32
 
 /* Allocates an AvbOps instance suitable for use in Android userspace
  * on the device. Returns NULL on OOM.
@@ -188,4 +189,30 @@ int avb_read_perm_attr_flag(uint8_t *flag);
  */
 int avb_write_perm_attr_flag(uint8_t flag);
 
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length);
+
+/**
+ * The android things require the soc-v key hash to be flashed
+ * using the fastboot. So the function can be used in fastboot
+ * to flash the key hash.
+ *
+ * @param buf    The vboot key hash data.
+ *
+ * @param length The length of key hash.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 5152de7a11..32124bd3ad 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -443,3 +443,19 @@ int avb_write_perm_attr_flag(uint8_t flag)
 		return -1;
 	return 0;
 }
+
+int avb_read_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+	if (trusty_read_vbootkey_hash((uint32_t *)buf,
+				      (uint32_t)length / sizeof(uint32_t)))
+		return -1;
+	return 0;
+}
+
+int avb_write_vbootkey_hash(uint8_t *buf, uint8_t length)
+{
+	if (trusty_write_vbootkey_hash((uint32_t *)buf,
+				       (uint32_t)length / sizeof(uint32_t)))
+		return -1;
+	return 0;
+}

commit f74d184a88a9a5ea742eb0beab7e6175fc80f461
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 10:25:36 2017 +0800

    lib: avb: add a permanent attribute flag
    
    Add a flag to indicate the permanent attributes
    have been written or not.
    
    Change-Id: Id0b22158772bdf18466205df5f08cb0ddb820fbf
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index a51a8c2715..c232ee8320 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -28,6 +28,9 @@
 #include <android_avb/libavb.h>
 #include <android_avb/avb_ab_flow.h>
 
+#define PERM_ATTR_DIGEST_SIZE 32
+#define PERM_ATTR_TOTAL_SIZE  1084
+
 /* Allocates an AvbOps instance suitable for use in Android userspace
  * on the device. Returns NULL on OOM.
  *
@@ -162,4 +165,27 @@ int avb_read_lock_state(uint8_t *lock_state);
  */
 int avb_write_lock_state(uint8_t lock_state);
 
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   indicate the permanent attributes have been written
+ *               or not.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_perm_attr_flag(uint8_t *flag);
+
+/**
+ * The android things uses fastboot to flash the permanent attributes.
+ * And if them were written, there must have a flag to indicate.
+ *
+ * @param flag   We can call this function to write the flag '1'
+ *               to indicate the permanent attributes has been
+ *               written.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_perm_attr_flag(uint8_t flag);
+
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index cc93eb4b76..5152de7a11 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -429,3 +429,17 @@ int avb_write_lock_state(uint8_t lock_state)
 		return -1;
 	return 0;
 }
+
+int avb_read_perm_attr_flag(uint8_t *flag)
+{
+	if (trusty_read_permanent_attributes_flag(flag))
+		return -1;
+	return 0;
+}
+
+int avb_write_perm_attr_flag(uint8_t flag)
+{
+	if (trusty_write_permanent_attributes_flag(flag))
+		return -1;
+	return 0;
+}

commit 5b09015999d90f1b63fe7fb436d72b0b8abbd6a1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Nov 2 09:47:49 2017 +0800

    lib: avb: change the prefix of some functions to make them coincident
    
    Change-Id: Id876e6e49fb614e43d9f15cd9d24cee29aead223
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 9640d4f057..059cc3ad4b 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -438,7 +438,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 		char temp;
 
 		slot_count[1] = '\0';
-		read_slot_count(&temp);
+		avb_read_slot_count(&temp);
 		slot_count[0] = temp + 0x30;
 		strncat(response, slot_count, chars_left);
 #else
@@ -449,7 +449,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		char slot_surrent[8] = {0};
 
-		if (!get_current_slot(slot_surrent))
+		if (!avb_get_current_slot(slot_surrent))
 			strncat(response, slot_surrent, chars_left);
 		else
 			strcpy(response, "FAILgeterror");
@@ -465,7 +465,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 
 		memset(slot_suffixes_temp, 0, 4);
 		memset(slot_suffixes, 0, 9);
-		read_slot_suffixes(slot_suffixes_temp);
+		avb_read_slot_suffixes(slot_suffixes_temp);
 		while (slot_suffixes_temp[slot_cnt] != '\0') {
 			slot_suffixes[slot_cnt * 2]
 				= slot_suffixes_temp[slot_cnt];
@@ -754,10 +754,10 @@ static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
 	unsigned int slot_number;
 	if (strncmp("a", cmd, 1) == 0) {
 		slot_number = 0;
-		set_slot_active(&slot_number);
+		avb_set_slot_active(&slot_number);
 	} else if (strncmp("b", cmd, 1) == 0) {
 		slot_number = 1;
-		set_slot_active(&slot_number);
+		avb_set_slot_active(&slot_number);
 	} else {
 		fastboot_tx_write_str("FAIL: unkown slot name");
 		return;
@@ -779,7 +779,7 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 	uint8_t flash_lock_state;
 
-	if (read_flash_lock_state(&flash_lock_state))
+	if (avb_read_flash_lock_state(&flash_lock_state))
 		fastboot_tx_write_str("FAIL");
 		return;
 	if (flash_lock_state == 0) {
@@ -816,7 +816,7 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 0;
-		if (write_flash_lock_state(flash_lock_state))
+		if (avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -827,7 +827,7 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t flash_lock_state;
 		flash_lock_state = 1;
-		if (write_flash_lock_state(flash_lock_state))
+		if (avb_write_flash_lock_state(flash_lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -876,7 +876,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 0;
-		if (write_lock_state(lock_state))
+		if (avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -886,13 +886,13 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;
-		if (read_lock_state(&lock_state))
+		if (avb_read_lock_state(&lock_state))
 			fastboot_tx_write_str("FAIL");
 		if (lock_state >> 1 == 1) {
 			fastboot_tx_write_str("FAILThe vboot is disable!");
 		} else {
 			lock_state = 1;
-			if (write_lock_state(lock_state))
+			if (avb_write_lock_state(lock_state))
 				fastboot_tx_write_str("FAIL");
 			else
 				fastboot_tx_write_str("OKAY");
@@ -904,7 +904,7 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #ifdef CONFIG_AVB_LIBAVB_USER
 		uint8_t lock_state;
 		lock_state = 2;
-		if (write_lock_state(lock_state))
+		if (avb_write_lock_state(lock_state))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
@@ -913,9 +913,9 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
-		if (write_permanent_attributes((uint8_t *)
-					       CONFIG_FASTBOOT_BUF_ADDR,
-					       download_bytes))
+		if (avb_write_permanent_attributes((uint8_t *)
+						   CONFIG_FASTBOOT_BUF_ADDR,
+						   download_bytes))
 			fastboot_tx_write_str("FAIL");
 		else
 			fastboot_tx_write_str("OKAY");
diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index c84539d0e3..a51a8c2715 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -1,22 +1,165 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
 #ifndef AVB_OPS_USER_H_
 #define AVB_OPS_USER_H_
 
 #include <android_avb/libavb.h>
 #include <android_avb/avb_ab_flow.h>
 
-
-
+/* Allocates an AvbOps instance suitable for use in Android userspace
+ * on the device. Returns NULL on OOM.
+ *
+ * The returned AvbOps has the following characteristics:
+ *
+ * - The read_from_partition(), write_to_partition(), and
+ *   get_size_of_partition() operations are implemented, however for
+ *   these operations to work the fstab file on the device must have a
+ *   /misc entry using a by-name device file scheme and the containing
+ *   by-name/ subdirectory must have files for other partitions.
+ *
+ * - The remaining operations are implemented and never fails and
+ *   return the following values:
+ *   - validate_vbmeta_public_key(): always returns |true|.
+ *   - read_rollback_index(): returns 0 for any roolback index.
+ *   - write_rollback_index(): no-op.
+ *   - read_is_device_unlocked(): always returns |true|.
+ *   - get_unique_guid_for_partition(): always returns the empty string.
+ *
+ * - The |ab_ops| member will point to a valid AvbABOps instance
+ *   implemented via libavb_ab/. This should only be used if the AVB
+ *   A/B stack is used on the device. This is what is used in
+ *   bootctrl.avb boot control implementation.
+ *
+ * Free with avb_ops_user_free().
+ */
 AvbOps* avb_ops_user_new(void);
+
+/* Frees an AvbOps instance previously allocated with avb_ops_device_new(). */
 void avb_ops_user_free(AvbOps* ops);
-int read_slot_count(char *slot_count);
-int read_slot_suffixes(char *slot_suffixes);
-int set_slot_active(unsigned int *slot_number);
-int get_current_slot(char *select_slot);
-int read_permanent_attributes(uint8_t *attributes, uint32_t size);
-int write_permanent_attributes(uint8_t *attributes, uint32_t size);
-int read_flash_lock_state(uint8_t *flash_lock_state);
-int write_flash_lock_state(uint8_t flash_lock_state);
-int read_lock_state(uint8_t *lock_state);
-int write_lock_state(uint8_t lock_state);
+
+/**
+ * Provided to fastboot to read how many slot in this system.
+ *
+ * @param slot_count  We use parameter slot_count to obtain
+ *                    how many slots in the system.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_slot_count(char *slot_count);
+
+/**
+ * The android things supply many slots, their name like '_a', '_b'.
+ * We can use this function to read current slot is '_a' or '_b'.
+ *
+ * @slot_suffixes  read value '_a' or '_b'.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_slot_suffixes(char *slot_suffixes);
+
+/**
+ * Use this function to set which slot boot first.
+ *
+ * @param slot_number set '0' or '1'
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_set_slot_active(unsigned int *slot_number);
+
+/**
+ * Get current slot: '_a' or '_b'.
+ *
+ * @param select_slot  obtain current slot.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_get_current_slot(char *select_slot);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to read them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The android things defines permanent attributes to
+ * store PSK_public, product id. We can use this function
+ * to write them.
+ *
+ * @param attributes  PSK_public, product id....
+ *
+ * @param size        The size of attributes.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+
+/**
+ * The funtion can be use to read the device state to judge
+ * whether the device can be flash.
+ *
+ * @param flash_lock_state  A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_flash_lock_state(uint8_t *flash_lock_state);
+
+/**
+ * The function is provided to write device flash state.
+ *
+ * @param flash_lock_state   A flag indicate the device flash state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_flash_lock_state(uint8_t flash_lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state  A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_read_lock_state(uint8_t *lock_state);
+
+/**
+ * The android things use the flag of lock state to indicate
+ * whether the device can be booted when verified error.
+ *
+ * @param lock_state   A flag indicate the device lock state.
+ *
+ * @return 0 if the command succeeded, -1 if it failed
+ */
+int avb_write_lock_state(uint8_t lock_state);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 962fcf5423..cc93eb4b76 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -305,7 +305,7 @@ void avb_ops_user_free(AvbOps *ops)
 }
 
 
-int read_slot_count(char *slot_count)
+int avb_read_slot_count(char *slot_count)
 {
 	AvbOps* ops;
 	AvbABData ab_data;
@@ -326,7 +326,7 @@ int read_slot_count(char *slot_count)
 	return 0;
 }
 
-int read_slot_suffixes(char *slot_suffixes)
+int avb_read_slot_suffixes(char *slot_suffixes)
 {
 	AvbOps* ops;
 	AvbABData ab_data;
@@ -347,7 +347,7 @@ int read_slot_suffixes(char *slot_suffixes)
 	return 0;
 }
 
-int set_slot_active(unsigned int *slot_number)
+int avb_set_slot_active(unsigned int *slot_number)
 {
 	AvbOps* ops;
 	ops = avb_ops_user_new();
@@ -366,7 +366,7 @@ int set_slot_active(unsigned int *slot_number)
 	return 0;
 }
 
-int get_current_slot(char *select_slot)
+int avb_get_current_slot(char *select_slot)
 {
 	AvbOps* ops;
 	ops = avb_ops_user_new();
@@ -384,7 +384,7 @@ int get_current_slot(char *select_slot)
 	return 0;
 }
 
-int read_permanent_attributes(uint8_t *attributes, uint32_t size)
+int avb_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 {
 	if(trusty_read_permanent_attributes(attributes, size) != 0) {
 		return -1;
@@ -393,7 +393,7 @@ int read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	return 0;
 }
 
-int write_permanent_attributes(uint8_t *attributes, uint32_t size)
+int avb_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 {
 	if(trusty_write_permanent_attributes(attributes, size) != 0) {
 		return -1;
@@ -402,28 +402,28 @@ int write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	return 0;
 }
 
-int read_flash_lock_state(uint8_t *flash_lock_state)
+int avb_read_flash_lock_state(uint8_t *flash_lock_state)
 {
 	if (trusty_read_flash_lock_state(flash_lock_state))
 		return -1;
 	return 0;
 }
 
-int write_flash_lock_state(uint8_t flash_lock_state)
+int avb_write_flash_lock_state(uint8_t flash_lock_state)
 {
 	if (trusty_write_flash_lock_state(flash_lock_state))
 		return -1;
 	return 0;
 }
 
-int read_lock_state(uint8_t *lock_state)
+int avb_read_lock_state(uint8_t *lock_state)
 {
 	if (trusty_read_lock_state(lock_state))
 		return -1;
 	return 0;
 }
 
-int write_lock_state(uint8_t lock_state)
+int avb_write_lock_state(uint8_t lock_state)
 {
 	if (trusty_write_lock_state(lock_state))
 		return -1;

commit e13fd25b91c29650b15ba5aae9296a91795bb7e6
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 18:25:08 2017 +0800

    rockchip: mmc: add test case.
    
    Change-Id: I87e616c0a0f49f426b5e222fcc56cf5a170b3419
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 94bd46f237..ae42200bfa 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -150,11 +150,62 @@ static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
 	debug("sizeof(value) %x\n ", sizeof(value));
 	if (value == 0x1122334455667788)
 		printf("good ! value==0x1122334455667788\n ");
-	uint8_t filename[] = "testfile1";
+	else
+		printf("error ! value!=0x1122334455667788\n ");
+
 	uint8_t data[] = "just a data";
-	write_to_keymaster(filename, sizeof(filename), data, sizeof(data));
+	uint8_t data_read[11];
+	trusty_write_permanent_attributes(data, sizeof(data));
+	trusty_read_permanent_attributes(data_read, sizeof(data));
+	printf("attribute: %s\n ", data_read);
+
+	trusty_notify_optee_uboot_end();
+	printf(" tell_optee_uboot_end \n ");
+	value = 0;
+	trusty_read_rollback_index(0x87654321, &value);
+	if (value == 0x1122334455667788)
+		printf(" value==0x1122334455667788 read still enable\n ");
+	else
+		printf(" good! value!=0x1122334455667788 read denied\n ");
 	return CMD_RET_SUCCESS;
 }
+
+static int do_mmc_testefuse(cmd_tbl_t *cmdtp,
+		int flag, int argc, char * const argv[])
+{
+	uint32_t buf32[8];
+	uint32_t outbuf32[8];
+
+	buf32[0] = 0x01020304;
+	buf32[1] = 0x05060708;
+	buf32[2] = 0x090a0b0c;
+	buf32[3] = 0x0d0e0f10;
+	buf32[4] = 0x11121314;
+	buf32[5] = 0x15161718;
+	buf32[6] = 0x191a1b1c;
+	buf32[7] = 0x1d1e1f20;
+
+	trusty_write_attribute_hash(buf32, 8);
+
+	trusty_read_attribute_hash(outbuf32, 8);
+
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[4], outbuf32[5], outbuf32[6], outbuf32[7]);
+
+	trusty_write_vbootkey_hash(buf32, 8);
+
+	trusty_read_vbootkey_hash(outbuf32, 8);
+
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[0], outbuf32[1], outbuf32[2], outbuf32[3]);
+	printf(" 0x%x  0x%x  0x%x  0x%x \n",
+		outbuf32[4], outbuf32[5], outbuf32[6], outbuf32[7]);
+
+	return CMD_RET_SUCCESS;
+}
+
 #endif
 
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
@@ -921,6 +972,7 @@ static cmd_tbl_t cmd_mmc[] = {
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
 	U_BOOT_CMD_MKENT(testrpmb, 1, 0, do_mmc_testrpmb, "", ""),
+	U_BOOT_CMD_MKENT(testefuse, 1, 0, do_mmc_testefuse, "", ""),
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""),
@@ -988,6 +1040,7 @@ U_BOOT_CMD(
 #endif
 #ifdef CONFIG_OPTEE_CLIENT
 	"mmc testrpmb - test CA call static TA,and TA call rpmb in uboot\n"
+	"mmc testefuse - test CA call static TA,and TA read or write efuse\n"
 #endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	"mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n"

commit 095e2a82368f85b21ba902ec00863919dfd7bd89
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 18:14:52 2017 +0800

    lib: optee_client: add R&W attribute flag support.
    
    Change-Id: I682e1d9133c005022351c540f843f383703c7c65
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 071f7ea1c2..c1aa6c4d10 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -24,5 +24,7 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
 uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes);
+uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 83d91f9e8b..6a57e3b7d6 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -1026,3 +1026,136 @@ uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
 
 	return TeecResult;
 }
+
+uint32_t trusty_read_permanent_attributes_flag(uint8_t *attributes)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes_flag");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					142,
+					&TeecOperation,
+					&ErrorOrigin);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_permanent_attributes_flag(uint8_t attributes)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes_flag");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes_flag", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, (char *)&attributes, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					141,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}

commit 46b2a054c352b4082b8c9bb0e66d06e517c74754
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 18:08:10 2017 +0800

    lib: optee_client: write attr to keymaster
    
    updata keymaster ta and write attributes to keymaster
    
    Change-Id: Iac3e64f7e4da1d6b5700d9f049d5fa8b1427b077
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
index 0391f7c5e4..e9c3aadc3d 100644
--- a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
+++ b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
@@ -3,64 +3,64 @@
 
 const uint8_t keymaster_data[] = {
 0x48, 0x53, 0x54, 0x4f, 0x00, 0x00, 0x00, 0x00,
-0xfc, 0xfa, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
-0x20, 0x00, 0x00, 0x01, 0x50, 0xf6, 0x8d, 0xb1,
-0x65, 0x28, 0xe8, 0x47, 0x09, 0xb2, 0x66, 0x2b,
-0xcb, 0x36, 0xab, 0x32, 0x8f, 0xcb, 0x33, 0xdb,
-0x64, 0xa3, 0x10, 0x5e, 0x35, 0xe6, 0xb4, 0xed,
-0x3e, 0xf8, 0x34, 0xc3, 0x0d, 0x1c, 0xef, 0x0a,
-0x8c, 0x0b, 0xf6, 0x92, 0xda, 0xba, 0xc4, 0x6a,
-0x29, 0x4d, 0x59, 0xc5, 0x2a, 0x45, 0x67, 0x15,
-0x1f, 0xa2, 0xcd, 0x5c, 0x2d, 0x10, 0xf1, 0x61,
-0x10, 0x8f, 0x48, 0x2a, 0x9b, 0x9d, 0x1f, 0x39,
-0xe0, 0x98, 0x63, 0x78, 0xb2, 0x5c, 0x90, 0xcb,
-0x56, 0x93, 0xac, 0x50, 0x53, 0xaa, 0x7d, 0xe9,
-0x7c, 0x35, 0x92, 0xf6, 0x29, 0x98, 0xef, 0x53,
-0xa8, 0x68, 0x54, 0x6f, 0x7c, 0x67, 0xa9, 0x8b,
-0xb8, 0x1c, 0x21, 0x0b, 0xea, 0xc8, 0x20, 0x6b,
-0xbe, 0x85, 0x8a, 0x9e, 0xb9, 0x04, 0x04, 0xd5,
-0x56, 0xe7, 0x69, 0x01, 0x43, 0x31, 0x61, 0xe3,
-0x43, 0xde, 0x92, 0x18, 0xf6, 0x80, 0x60, 0xd0,
-0x67, 0x7a, 0xed, 0xda, 0x86, 0x48, 0xf6, 0xfe,
-0xfd, 0xfe, 0xd9, 0x3a, 0x00, 0xd2, 0x77, 0x4a,
-0xad, 0xce, 0xa0, 0x3e, 0xd2, 0xbf, 0xf8, 0x94,
-0xe1, 0xf6, 0xdd, 0x56, 0x70, 0xa2, 0x7f, 0x8c,
-0xef, 0x95, 0xfb, 0xd5, 0x6c, 0xe3, 0x7b, 0x1a,
-0xb1, 0x22, 0xb3, 0xd9, 0x27, 0xea, 0x7b, 0xd2,
-0x27, 0x87, 0xfd, 0x6c, 0x2c, 0x7a, 0xd2, 0x08,
-0x1f, 0x6f, 0x06, 0x06, 0x81, 0x18, 0x0e, 0x45,
-0x73, 0xa5, 0x4d, 0xe6, 0xfe, 0x13, 0x4a, 0x44,
-0x01, 0xc8, 0x8e, 0x5b, 0xb3, 0x16, 0xb3, 0x3d,
-0x91, 0xbd, 0x08, 0x4e, 0xb5, 0x90, 0xe5, 0x10,
-0xab, 0x00, 0xf9, 0x71, 0x5a, 0x8d, 0x24, 0x95,
-0x10, 0xd5, 0x78, 0x51, 0x12, 0x10, 0x88, 0xdb,
-0x1f, 0x1d, 0xfe, 0x48, 0x13, 0x84, 0x1a, 0x10,
-0x46, 0xf2, 0x57, 0x76, 0x47, 0x6e, 0xa4, 0x60,
-0x7e, 0xbc, 0xa8, 0xf6, 0x73, 0xd3, 0xdd, 0xa9,
-0x10, 0xa1, 0x93, 0x48, 0xfc, 0x0f, 0x1e, 0x60,
-0x30, 0xd9, 0xf4, 0x89, 0x35, 0xec, 0x8d, 0x03,
-0x75, 0xa8, 0xf9, 0xfa, 0xb3, 0x35, 0x6a, 0xd9,
-0x34, 0xb6, 0xfb, 0xda, 0x7f, 0x45, 0x4c, 0x46,
+0x70, 0x06, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
+0x20, 0x00, 0x00, 0x01, 0xfa, 0xf1, 0xef, 0x23,
+0x6e, 0xa3, 0x2e, 0xd9, 0x56, 0x3c, 0xb6, 0xba,
+0xa6, 0x3d, 0x60, 0x08, 0x6b, 0xe0, 0xe0, 0xd0,
+0x4c, 0x96, 0xb0, 0x72, 0xdf, 0x4e, 0xfa, 0xa7,
+0x79, 0x79, 0x93, 0xff, 0x0e, 0xf2, 0xf0, 0x25,
+0x90, 0x40, 0x71, 0x55, 0x95, 0xb8, 0x56, 0x83,
+0x30, 0x9a, 0x9b, 0x02, 0x9e, 0x30, 0x02, 0xfa,
+0x13, 0xad, 0x86, 0x5b, 0x76, 0xf7, 0x23, 0xda,
+0xc9, 0x40, 0xa1, 0x12, 0x20, 0x8f, 0xc6, 0x5a,
+0xed, 0x01, 0x0d, 0xc3, 0xe3, 0xcd, 0xc4, 0x00,
+0x90, 0xd5, 0x97, 0xf8, 0x24, 0x79, 0x9f, 0xab,
+0xaf, 0xc4, 0xf2, 0xe2, 0x67, 0xa2, 0xe2, 0x41,
+0x64, 0x8d, 0x3c, 0x91, 0xde, 0xc6, 0x5b, 0xe3,
+0xf5, 0xa6, 0x32, 0xbf, 0x64, 0xa6, 0xaf, 0xa3,
+0x18, 0xec, 0x24, 0x8d, 0x32, 0x95, 0x0a, 0xe6,
+0x63, 0x5c, 0xa6, 0x5d, 0x02, 0xa4, 0x5b, 0x06,
+0x95, 0x7e, 0xa8, 0xe3, 0x8f, 0xe6, 0xd5, 0xe4,
+0xd8, 0x8f, 0xba, 0x06, 0x1a, 0xa2, 0x7a, 0xd2,
+0x14, 0xe5, 0x75, 0xde, 0xd7, 0x8a, 0x63, 0x0d,
+0x51, 0x18, 0xc1, 0xfb, 0x78, 0xa3, 0xbd, 0x06,
+0x06, 0x1f, 0xa9, 0x8c, 0x1b, 0x9f, 0x46, 0xe8,
+0xd9, 0x77, 0x91, 0xc5, 0xf8, 0x9f, 0xd0, 0x8d,
+0x60, 0xdf, 0xb4, 0x6d, 0xe3, 0x7d, 0xf9, 0xab,
+0xff, 0x7b, 0xfe, 0x78, 0x7f, 0x2b, 0x67, 0x6c,
+0x3e, 0x6d, 0x7b, 0x47, 0xaa, 0x1f, 0xe6, 0x6e,
+0xa6, 0x94, 0xc3, 0x3c, 0xf7, 0x27, 0x3d, 0xbe,
+0x3e, 0xba, 0x69, 0x5d, 0x67, 0x98, 0xf0, 0x96,
+0x04, 0x6d, 0x01, 0xbb, 0x5f, 0x3b, 0x58, 0x57,
+0xe0, 0xbf, 0x8e, 0x6c, 0x32, 0xc2, 0x3d, 0x03,
+0xf4, 0xa5, 0x4a, 0xcd, 0x19, 0xc3, 0x9e, 0xfb,
+0xe0, 0xec, 0x25, 0xff, 0xb7, 0x67, 0x77, 0xe7,
+0x07, 0x0b, 0xb1, 0xa6, 0xb3, 0x5b, 0x5f, 0x97,
+0xa1, 0xc8, 0x83, 0x62, 0x6b, 0x2b, 0x1d, 0xf3,
+0xfd, 0x92, 0x3e, 0x45, 0x7f, 0x09, 0xf1, 0xcc,
+0xab, 0x59, 0xd6, 0xbd, 0x21, 0x7c, 0xec, 0xef,
+0x9d, 0xba, 0x52, 0x07, 0xf9, 0xd8, 0x92, 0xfb,
+0x8e, 0x11, 0x4d, 0xa1, 0x7f, 0x45, 0x4c, 0x46,
 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x28, 0x00,
 0x01, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
-0x34, 0x00, 0x00, 0x00, 0x7c, 0xf8, 0x02, 0x00,
+0x34, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x02, 0x00,
 0x02, 0x00, 0x00, 0x05, 0x34, 0x00, 0x20, 0x00,
 0x04, 0x00, 0x28, 0x00, 0x10, 0x00, 0x0f, 0x00,
 0x01, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x78, 0x09, 0x02, 0x00, 0x78, 0x09, 0x02, 0x00,
+0x80, 0x32, 0x01, 0x00, 0x80, 0x32, 0x01, 0x00,
 0x07, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00,
-0x00, 0x10, 0x02, 0x00, 0x00, 0x10, 0x02, 0x00,
-0x50, 0x06, 0x00, 0x00, 0x14, 0xb3, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x01, 0x00,
+0x00, 0x40, 0x01, 0x00, 0x00, 0x40, 0x01, 0x00,
+0xd2, 0x0d, 0x00, 0x00, 0x9a, 0xba, 0x00, 0x00,
 0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x02, 0x00,
-0x00, 0xd0, 0x02, 0x00, 0x00, 0xd0, 0x02, 0x00,
-0x4c, 0x27, 0x00, 0x00, 0x4c, 0x27, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
+0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
+0xc0, 0x02, 0x00, 0x00, 0xc0, 0x02, 0x00, 0x00,
 0x06, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x02, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x02, 0x00,
-0x00, 0xd0, 0x02, 0x00, 0x00, 0xd0, 0x02, 0x00,
+0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
+0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00,
 0x78, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00,
 0x06, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -4139,9407 +4139,5507 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x95, 0xe7, 0x8b, 0x25,
 0xca, 0xf9, 0xe6, 0x40, 0xa8, 0x69, 0x9c, 0xe6,
 0x88, 0x6c, 0x5d, 0x5d, 0x00, 0x08, 0x00, 0x00,
-0x0f, 0x00, 0x00, 0x00, 0x3d, 0x25, 0x01, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x84, 0xb0, 0xcd, 0xe9,
-0x02, 0x7e, 0xcd, 0xe9, 0x00, 0x45, 0x94, 0xb0,
-0x04, 0xaf, 0x78, 0x60, 0x7a, 0x4c, 0x7c, 0x44,
-0x04, 0x20, 0x00, 0x21, 0x79, 0x4b, 0xe3, 0x58,
-0x98, 0x47, 0xb8, 0x63, 0x01, 0x23, 0x7b, 0x63,
-0x40, 0xf2, 0x37, 0x43, 0x3b, 0x63, 0x02, 0x23,
-0xfb, 0x61, 0x75, 0x4b, 0x7b, 0x44, 0xfb, 0x62,
-0x16, 0x23, 0xbb, 0x62, 0x10, 0x23, 0x7b, 0x62,
-0x78, 0x6a, 0x00, 0x21, 0x6f, 0x4b, 0xe3, 0x58,
-0x98, 0x47, 0x38, 0x62, 0x07, 0xf1, 0x1c, 0x03,
-0xba, 0x6b, 0x00, 0x92, 0x78, 0x6b, 0x19, 0x46,
-0x04, 0x22, 0x3b, 0x6b, 0x6b, 0x4d, 0x65, 0x59,
-0xa8, 0x47, 0xf8, 0x63, 0xfa, 0x6b, 0x08, 0x23,
-0xcf, 0xf6, 0xff, 0x73, 0x9a, 0x42, 0x5f, 0xd1,
-0x07, 0xf1, 0x1c, 0x03, 0x00, 0x22, 0x00, 0x92,
-0xfa, 0x6a, 0x01, 0x92, 0xba, 0x6a, 0x02, 0x92,
-0xba, 0x6b, 0x03, 0x92, 0x78, 0x6b, 0x19, 0x46,
-0x04, 0x22, 0x3b, 0x6b, 0x60, 0x4d, 0x65, 0x59,
-0xa8, 0x47, 0xf8, 0x63, 0xfb, 0x6b, 0x00, 0x2b,
-0x0e, 0xd0, 0x5e, 0x4b, 0x7b, 0x44, 0x00, 0x93,
-0xfb, 0x6b, 0x01, 0x93, 0x5c, 0x4b, 0x7b, 0x44,
-0x18, 0x46, 0x40, 0x21, 0x02, 0x22, 0x01, 0x23,
-0x5a, 0x4d, 0x65, 0x59, 0xa8, 0x47, 0x91, 0xe0,
-0x59, 0x4b, 0x7b, 0x44, 0x00, 0x93, 0x59, 0x4b,
-0x7b, 0x44, 0x18, 0x46, 0x43, 0x21, 0x02, 0x22,
-0x01, 0x23, 0x54, 0x4d, 0x65, 0x59, 0xa8, 0x47,
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+0x08, 0x2b, 0x11, 0xd0, 0x67, 0x4b, 0x00, 0x25,
+0x01, 0x22, 0x67, 0x48, 0x4f, 0xf4, 0xe9, 0x61,
+0x01, 0x95, 0x7b, 0x44, 0x78, 0x44, 0x00, 0x93,
+0x00, 0xf5, 0x13, 0x70, 0x13, 0x46, 0x02, 0xf0,
+0x3b, 0xfa, 0x28, 0x46, 0x03, 0xf0, 0xa6, 0xf8,
+0x63, 0x68, 0x08, 0x2b, 0x11, 0xd0, 0x5f, 0x4b,
+0x00, 0x25, 0x01, 0x22, 0x5e, 0x48, 0x40, 0xf2,
+0x4b, 0x71, 0x01, 0x95, 0x7b, 0x44, 0x78, 0x44,
+0x00, 0x93, 0x00, 0xf5, 0x13, 0x70, 0x13, 0x46,
+0x02, 0xf0, 0x26, 0xfa, 0x28, 0x46, 0x03, 0xf0,
+0x91, 0xf8, 0x25, 0x6a, 0x85, 0xb9, 0x57, 0x4b,
+0x01, 0x22, 0x40, 0xf2, 0x4d, 0x71, 0x56, 0x48,
+0x7b, 0x44, 0x78, 0x44, 0xcd, 0xe9, 0x00, 0x35,
+0x00, 0xf5, 0x13, 0x70, 0x13, 0x46, 0x02, 0xf0,
+0x13, 0xfa, 0x28, 0x46, 0x03, 0xf0, 0x7e, 0xf8,
+0xa3, 0x68, 0x06, 0x2b, 0x11, 0xd0, 0x4f, 0x4b,
+0x00, 0x25, 0x01, 0x22, 0x4e, 0x48, 0x40, 0xf2,
+0x4f, 0x71, 0x01, 0x95, 0x7b, 0x44, 0x78, 0x44,
+0x00, 0x93, 0x00, 0xf5, 0x13, 0x70, 0x13, 0x46,
+0x02, 0xf0, 0xfe, 0xf9, 0x28, 0x46, 0x03, 0xf0,
+0x69, 0xf8, 0xe0, 0x69, 0x10, 0xf4, 0x80, 0x25,
+0x10, 0xd1, 0x46, 0x4b, 0x01, 0x22, 0x40, 0xf2,
+0x51, 0x71, 0x45, 0x48, 0x7b, 0x44, 0x78, 0x44,
+0xcd, 0xe9, 0x00, 0x35, 0x00, 0xf5, 0x13, 0x70,
+0x13, 0x46, 0x02, 0xf0, 0xe9, 0xf9, 0x28, 0x46,
+0x03, 0xf0, 0x54, 0xf8, 0x48, 0x46, 0x39, 0x1d,
+0x00, 0xf0, 0xf6, 0xea, 0x88, 0xb1, 0x3d, 0x4b,
+0x00, 0x25, 0x01, 0x22, 0x3c, 0x48, 0x40, 0xf2,
+0x55, 0x71, 0x01, 0x95, 0x7b, 0x44, 0x78, 0x44,
+0x00, 0x93, 0x00, 0xf5, 0x13, 0x70, 0x13, 0x46,
+0x02, 0xf0, 0xd2, 0xf9, 0x28, 0x46, 0x03, 0xf0,
+0x3d, 0xf8, 0x7b, 0x68, 0xb3, 0xf1, 0x20, 0x4f,
+0x11, 0xd0, 0x34, 0x4b, 0x00, 0x25, 0x01, 0x22,
+0x33, 0x48, 0x4f, 0xf4, 0xeb, 0x61, 0x01, 0x95,
+0x7b, 0x44, 0x78, 0x44, 0x00, 0x93, 0x00, 0xf5,
+0x13, 0x70, 0x13, 0x46, 0x02, 0xf0, 0xbc, 0xf9,
+0x28, 0x46, 0x03, 0xf0, 0x27, 0xf8, 0xfb, 0x69,
+0x9b, 0x03, 0x11, 0xd5, 0x2b, 0x4b, 0x00, 0x25,
+0x01, 0x22, 0x2b, 0x48, 0x40, 0xf2, 0x5a, 0x71,
+0x01, 0x95, 0x7b, 0x44, 0x78, 0x44, 0x00, 0x93,
+0x00, 0xf5, 0x13, 0x70, 0x13, 0x46, 0x02, 0xf0,
+0xa7, 0xf9, 0x28, 0x46, 0x03, 0xf0, 0x12, 0xf8,
+0x50, 0x46, 0x41, 0x46, 0x32, 0x46, 0xfc, 0xf7,
+0x83, 0xfd, 0xe0, 0x6b, 0x51, 0x46, 0x32, 0x46,
+0x4b, 0x46, 0x00, 0xf0, 0xfe, 0xea, 0x04, 0x46,
+0x80, 0xb1, 0x1e, 0x4b, 0x01, 0x22, 0x4f, 0xf4,
+0xec, 0x61, 0x7b, 0x44, 0xcd, 0xe9, 0x00, 0x30,
+0x1b, 0x48, 0x13, 0x46, 0x78, 0x44, 0x00, 0xf5,
+0x13, 0x70, 0x02, 0xf0, 0x89, 0xf9, 0x20, 0x46,
+0x02, 0xf0, 0xf4, 0xff, 0x20, 0x37, 0xbd, 0x46,
+0xbd, 0xe8, 0xf0, 0x87, 0xe3, 0x7d, 0x00, 0x00,
+0xf8, 0x80, 0x00, 0x00, 0xbb, 0x7d, 0x00, 0x00,
+0xd0, 0x80, 0x00, 0x00, 0x8d, 0x7d, 0x00, 0x00,
+0xa2, 0x80, 0x00, 0x00, 0x63, 0x7d, 0x00, 0x00,
+0x78, 0x80, 0x00, 0x00, 0x3f, 0x7d, 0x00, 0x00,
+0x54, 0x80, 0x00, 0x00, 0x13, 0x7d, 0x00, 0x00,
+0x28, 0x80, 0x00, 0x00, 0xeb, 0x7c, 0x00, 0x00,
+0x00, 0x80, 0x00, 0x00, 0xbb, 0x7c, 0x00, 0x00,
+0xd0, 0x7f, 0x00, 0x00, 0x8f, 0x7c, 0x00, 0x00,
+0xa4, 0x7f, 0x00, 0x00, 0x65, 0x7c, 0x00, 0x00,
+0x7a, 0x7f, 0x00, 0x00, 0x2d, 0x7c, 0x00, 0x00,
+0x3a, 0x7f, 0x00, 0x00, 0x13, 0xb5, 0x00, 0xf0,
+0xc2, 0xea, 0x04, 0x46, 0x98, 0xb1, 0x0b, 0x4b,
+0x01, 0x22, 0x40, 0xf2, 0x6b, 0x71, 0x7b, 0x44,
+0xcd, 0xe9, 0x00, 0x30, 0x08, 0x48, 0x13, 0x46,
+0x78, 0x44, 0x00, 0xf2, 0x5a, 0x20, 0x02, 0xf0,
+0x43, 0xf9, 0x20, 0x46, 0x02, 0xb0, 0xbd, 0xe8,
+0x10, 0x40, 0x02, 0xf0, 0xab, 0xbf, 0x02, 0xb0,
+0x10, 0xbd, 0x00, 0xbf, 0xa1, 0x7b, 0x00, 0x00,
+0xae, 0x7e, 0x00, 0x00, 0x13, 0xb5, 0x00, 0xf0,
+0x48, 0xec, 0x04, 0x46, 0x98, 0xb1, 0x0b, 0x4b,
+0x01, 0x22, 0x40, 0xf2, 0x74, 0x71, 0x7b, 0x44,
+0xcd, 0xe9, 0x00, 0x30, 0x08, 0x48, 0x13, 0x46,
+0x78, 0x44, 0x00, 0xf2, 0x6d, 0x20, 0x02, 0xf0,
+0x23, 0xf9, 0x20, 0x46, 0x02, 0xb0, 0xbd, 0xe8,
+0x10, 0x40, 0x02, 0xf0, 0x8b, 0xbf, 0x02, 0xb0,
+0x10, 0xbd, 0x00, 0xbf, 0x61, 0x7b, 0x00, 0x00,
+0x6e, 0x7e, 0x00, 0x00, 0x05, 0x4b, 0x7b, 0x44,
+0x1b, 0x68, 0x23, 0xb1, 0x1a, 0x68, 0x82, 0x42,
+0x01, 0xd0, 0x9b, 0x68, 0xf9, 0xe7, 0x18, 0x46,
+0x70, 0x47, 0x00, 0xbf, 0x9a, 0x96, 0x00, 0x00,
+0x08, 0xb5, 0x10, 0x4b, 0x7b, 0x44, 0x1b, 0x68,
+0xdb, 0xb1, 0x1a, 0x68, 0x82, 0x42, 0x16, 0xd1,
+0x9a, 0x68, 0xd9, 0x68, 0x0a, 0xb1, 0xd1, 0x60,
+0x02, 0xe0, 0x0b, 0x48, 0x78, 0x44, 0x41, 0x60,
+0xd9, 0x68, 0x18, 0x46, 0x0a, 0x60, 0xfc, 0xf7,
+0xcb, 0xfc, 0x08, 0x4a, 0x7a, 0x44, 0x13, 0x68,
+0x01, 0x3b, 0x13, 0x60, 0x2b, 0xb9, 0xbd, 0xe8,
+0x08, 0x40, 0xf5, 0xf7, 0x35, 0xbd, 0x9b, 0x68,
+0xe2, 0xe7, 0x08, 0xbd, 0x7c, 0x96, 0x00, 0x00,
+0x64, 0x96, 0x00, 0x00, 0x40, 0xa5, 0x00, 0x00,
+0x03, 0x48, 0x00, 0x21, 0x20, 0x22, 0x78, 0x44,
+0x04, 0x30, 0x02, 0xf0, 0xa9, 0xbf, 0x00, 0xbf,
+0x16, 0xa5, 0x00, 0x00, 0xdf, 0xf8, 0x98, 0x81,
+0x01, 0x28, 0x16, 0x46, 0x80, 0xb5, 0x99, 0x46,
+0x8e, 0xb0, 0x0f, 0x46, 0xf8, 0x44, 0x3f, 0xd0,
+0x02, 0xd3, 0x02, 0x28, 0x49, 0xd0, 0x70, 0xe0,
+0x08, 0x46, 0xff, 0xf7, 0xaf, 0xff, 0x00, 0x28,
+0x7d, 0xd1, 0x5e, 0x4d, 0x7d, 0x44, 0x2c, 0x68,
+0x01, 0x34, 0x01, 0x2c, 0x2c, 0x60, 0x13, 0xd0,
+0x10, 0x20, 0x4f, 0xf0, 0x00, 0x41, 0xfc, 0xf7,
+0x8b, 0xfc, 0x00, 0x28, 0x00, 0xf0, 0xa5, 0x80,
+0x00, 0x23, 0x07, 0x60, 0x43, 0x60, 0x83, 0x60,
+0x55, 0x4b, 0x7b, 0x44, 0x5a, 0x68, 0xc2, 0x60,
+0x10, 0x60, 0x08, 0x30, 0x58, 0x60, 0x62, 0xe0,
+0x95, 0xf8, 0x24, 0x30, 0x93, 0xb9, 0x02, 0xf0,
+0x0f, 0xff, 0x02, 0xf0, 0x87, 0xf8, 0x4f, 0x4b,
+0x58, 0xf8, 0x03, 0x30, 0x03, 0x93, 0x4e, 0x4b,
+0x03, 0x98, 0x58, 0xf8, 0x03, 0x30, 0x19, 0x68,
+0x01, 0xf0, 0x04, 0xfc, 0x00, 0xf0, 0xac, 0xfd,
+0x85, 0xf8, 0x24, 0x40, 0xf5, 0xf7, 0xda, 0xfc,
+0x00, 0x28, 0xd1, 0xd0, 0x04, 0x46, 0x4c, 0xe0,
+0x08, 0x46, 0xff, 0xf7, 0x73, 0xff, 0x00, 0x28,
+0x46, 0xd0, 0x40, 0x68, 0x00, 0x24, 0xf5, 0xf7,
+0xeb, 0xfc, 0x38, 0x46, 0xff, 0xf7, 0x78, 0xff,
+0x3f, 0xe0, 0x08, 0x46, 0xff, 0xf7, 0x66, 0xff,
+0x80, 0x46, 0x00, 0x28, 0x38, 0xd0, 0x06, 0xaf,
+0x3c, 0x4c, 0x05, 0xa9, 0x38, 0x46, 0x32, 0x46,
+0xfc, 0xf7, 0x86, 0xfa, 0x3d, 0x46, 0xdd, 0xf8,
+0x14, 0xe0, 0x0f, 0xcd, 0x7c, 0x44, 0x04, 0x34,
+0xc4, 0xf8, 0x24, 0xe0, 0x0f, 0xc4, 0x95, 0xe8,
+0x0f, 0x00, 0x84, 0xe8, 0x0f, 0x00, 0x49, 0x46,
+0x72, 0x46, 0xd8, 0xf8, 0x04, 0x00, 0x3b, 0x46,
+0xf7, 0xf7, 0xe0, 0xf8, 0x04, 0x46, 0x05, 0x99,
+0x30, 0x46, 0x3a, 0x46, 0xfc, 0xf7, 0x44, 0xfa,
+0x17, 0xe0, 0x2d, 0x4b, 0x00, 0x24, 0x01, 0x22,
+0x2c, 0x48, 0xd7, 0x21, 0x01, 0x94, 0x7b, 0x44,
+0x78, 0x44, 0x00, 0x93, 0x13, 0x46, 0x02, 0xf0,
+0x4b, 0xf8, 0x20, 0x46, 0x4f, 0xf0, 0xff, 0x34,
+0x02, 0xf0, 0xb4, 0xfe, 0x05, 0xe0, 0x38, 0x46,
+0xff, 0xf7, 0x2c, 0xff, 0x81, 0x46, 0x48, 0xb9,
+0x19, 0x4c, 0x23, 0x4b, 0x00, 0x22, 0x7b, 0x44,
+0x9a, 0x62, 0xff, 0xf7, 0x59, 0xff, 0x20, 0x46,
+0x00, 0xf0, 0x42, 0xe8, 0x0d, 0xf1, 0x18, 0x08,
+0x1e, 0x4c, 0x05, 0xa9, 0x40, 0x46, 0x32, 0x46,
+0xfc, 0xf7, 0x42, 0xfa, 0x45, 0x46, 0xdd, 0xf8,
+0x14, 0xe0, 0x0f, 0xcd, 0x7c, 0x44, 0x04, 0x34,
+0xc4, 0xf8, 0x24, 0xe0, 0x0f, 0xc4, 0x95, 0xe8,
+0x0f, 0x00, 0x84, 0xe8, 0x0f, 0x00, 0x41, 0x46,
+0x09, 0xf1, 0x04, 0x02, 0x70, 0x46, 0xf5, 0xf7,
+0x68, 0xfc, 0x04, 0x46, 0x05, 0x99, 0x30, 0x46,
+0x42, 0x46, 0xfc, 0xf7, 0x01, 0xfa, 0x00, 0x2c,
+0xd3, 0xd0, 0x38, 0x46, 0xff, 0xf7, 0x08, 0xff,
+0xcf, 0xe7, 0x02, 0x4c, 0xcd, 0xe7, 0x00, 0xbf,
+0x07, 0x00, 0xff, 0xff, 0x0c, 0x00, 0xff, 0xff,
+0x24, 0x87, 0x00, 0x00, 0xe0, 0xa4, 0x00, 0x00,
+0xce, 0x95, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00,
+0x0c, 0x00, 0x00, 0x00, 0x38, 0xa4, 0x00, 0x00,
+0xa9, 0x79, 0x00, 0x00, 0x40, 0x7f, 0x00, 0x00,
+0xd6, 0xa3, 0x00, 0x00, 0xb0, 0xa3, 0x00, 0x00,
 0xe0, 0x40, 0x2d, 0xe9, 0x00, 0x70, 0xa0, 0xe3,
 0x00, 0x60, 0xa0, 0xe3, 0x00, 0x00, 0x00, 0xef,
 0xe0, 0x80, 0xbd, 0xe8, 0xe0, 0x40, 0x2d, 0xe9,
@@ -13736,4975 +9836,2813 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0xef, 0xe0, 0x80, 0xbd, 0xe8,
 0xe0, 0x40, 0x2d, 0xe9, 0x4a, 0x70, 0xa0, 0xe3,
 0x00, 0x60, 0xa0, 0xe3, 0x00, 0x00, 0x00, 0xef,
-0xe0, 0x80, 0xbd, 0xe8, 0x4d, 0xf8, 0x04, 0x7d,
-0x83, 0xb0, 0x00, 0xaf, 0x78, 0x60, 0x7b, 0x68,
-0x10, 0x33, 0x18, 0x46, 0x0c, 0x37, 0xbd, 0x46,
-0x5d, 0xf8, 0x04, 0x7b, 0x70, 0x47, 0x00, 0xbf,
-0x4d, 0xf8, 0x04, 0x7d, 0x83, 0xb0, 0x00, 0xaf,
-0x78, 0x60, 0x7b, 0x68, 0x9b, 0x68, 0x01, 0x22,
-0x9b, 0x1a, 0x10, 0x3b, 0x18, 0x46, 0x0c, 0x37,
-0xbd, 0x46, 0x5d, 0xf8, 0x04, 0x7b, 0x70, 0x47,
-0x4d, 0xf8, 0x04, 0x7d, 0x83, 0xb0, 0x00, 0xaf,
-0x78, 0x60, 0x7b, 0x68, 0x10, 0x3b, 0x18, 0x46,
-0x0c, 0x37, 0xbd, 0x46, 0x5d, 0xf8, 0x04, 0x7b,
-0x70, 0x47, 0x00, 0xbf, 0x6d, 0xe9, 0x02, 0x7e,
-0x84, 0xb0, 0x00, 0xaf, 0x78, 0x60, 0x0c, 0x4b,
-0x7b, 0x44, 0x1b, 0x68, 0xfb, 0x60, 0x0b, 0xe0,
-0xf8, 0x68, 0xff, 0xf7, 0xc7, 0xff, 0x02, 0x46,
-0x7b, 0x68, 0x9a, 0x42, 0x01, 0xd1, 0x01, 0x23,
-0x06, 0xe0, 0xfb, 0x68, 0x1b, 0x68, 0xfb, 0x60,
-0xfb, 0x68, 0x00, 0x2b, 0xf0, 0xd1, 0x00, 0x23,
-0x18, 0x46, 0x10, 0x37, 0xbd, 0x46, 0x80, 0xbd,
-0xcc, 0xe9, 0x00, 0x00, 0x6d, 0xe9, 0x04, 0x45,
-0xcd, 0xe9, 0x02, 0x7e, 0x8c, 0xb0, 0x08, 0xaf,
-0xf8, 0x60, 0xb9, 0x60, 0x7a, 0x60, 0x3b, 0x60,
-0x11, 0x4d, 0x7d, 0x44, 0x38, 0x6a, 0xff, 0xf7,
-0xa5, 0xff, 0x04, 0x46, 0x38, 0x6a, 0xff, 0xf7,
-0xaf, 0xff, 0x02, 0x46, 0x0d, 0x4b, 0x7b, 0x44,
-0x00, 0x93, 0xbb, 0x68, 0x01, 0x93, 0x7b, 0x68,
-0x02, 0x93, 0x3b, 0x68, 0x03, 0x93, 0x3b, 0x6a,
-0x04, 0x93, 0x05, 0x94, 0x06, 0x92, 0x00, 0x20,
-0x00, 0x21, 0xfa, 0x68, 0x01, 0x23, 0x06, 0x4c,
-0x2c, 0x59, 0xa0, 0x47, 0x10, 0x37, 0xbd, 0x46,
-0xdd, 0xe9, 0x00, 0x45, 0x02, 0xb0, 0x80, 0xbd,
-0xce, 0xd0, 0x00, 0x00, 0xaa, 0xbb, 0x00, 0x00,
-0xa0, 0x00, 0x00, 0x00, 0x4d, 0xf8, 0x04, 0x7d,
-0x83, 0xb0, 0x00, 0xaf, 0x78, 0x60, 0x0e, 0x4b,
-0x7b, 0x44, 0x1a, 0x68, 0x7b, 0x68, 0x13, 0x44,
-0x0c, 0x4a, 0x7a, 0x44, 0x13, 0x60, 0x0c, 0x4b,
-0x7b, 0x44, 0x1b, 0x68, 0x01, 0x33, 0x0b, 0x4a,
-0x7a, 0x44, 0x13, 0x60, 0x0a, 0x4b, 0x7b, 0x44,
-0x5a, 0x68, 0x7b, 0x68, 0x13, 0x44, 0x09, 0x4a,
-0x7a, 0x44, 0x53, 0x60, 0x0c, 0x37, 0xbd, 0x46,
-0x5d, 0xf8, 0x04, 0x7b, 0x70, 0x47, 0x00, 0xbf,
-0xd8, 0x6a, 0x01, 0x00, 0xce, 0x6a, 0x01, 0x00,
-0xcc, 0x6a, 0x01, 0x00, 0xc4, 0x6a, 0x01, 0x00,
-0xbe, 0x6a, 0x01, 0x00, 0xb4, 0x6a, 0x01, 0x00,
-0x4d, 0xf8, 0x04, 0x7d, 0x83, 0xb0, 0x00, 0xaf,
-0x78, 0x60, 0x0e, 0x4b, 0x7b, 0x44, 0x1a, 0x68,
-0x7b, 0x68, 0xd3, 0x1a, 0x0c, 0x4a, 0x7a, 0x44,
-0x13, 0x60, 0x0c, 0x4b, 0x7b, 0x44, 0x1b, 0x68,
-0x01, 0x3b, 0x0b, 0x4a, 0x7a, 0x44, 0x13, 0x60,
-0x0a, 0x4b, 0x7b, 0x44, 0x5a, 0x68, 0x7b, 0x68,
-0xd3, 0x1a, 0x09, 0x4a, 0x7a, 0x44, 0x53, 0x60,
-0x0c, 0x37, 0xbd, 0x46, 0x5d, 0xf8, 0x04, 0x7b,
-0x70, 0x47, 0x00, 0xbf, 0x7c, 0x6a, 0x01, 0x00,
-0x72, 0x6a, 0x01, 0x00, 0x70, 0x6a, 0x01, 0x00,
-0x68, 0x6a, 0x01, 0x00, 0x62, 0x6a, 0x01, 0x00,
-0x58, 0x6a, 0x01, 0x00, 0x6d, 0xe9, 0x02, 0x7e,
-0x86, 0xb0, 0x02, 0xaf, 0x78, 0x60, 0x7b, 0x68,
-0xfb, 0x60, 0x7b, 0x68, 0x9b, 0x68, 0x01, 0x22,
-0x9b, 0x1a, 0xfa, 0x68, 0x13, 0x44, 0x1b, 0x78,
-0x1a, 0x46, 0xfb, 0x68, 0xdb, 0xb2, 0x83, 0xf0,
-0xc5, 0x03, 0x9a, 0x42, 0x0c, 0xd0, 0x7b, 0x68,
-0x00, 0x93, 0x01, 0x20, 0x07, 0x4b, 0x7b, 0x44,
-0x19, 0x46, 0xe3, 0x22, 0x06, 0x4b, 0x7b, 0x44,
-0xff, 0xf7, 0x50, 0xff, 0x00, 0x23, 0x00, 0xe0,
-0x01, 0x23, 0x18, 0x46, 0x10, 0x37, 0xbd, 0x46,
-0x80, 0xbd, 0x00, 0xbf, 0x7a, 0xbb, 0x00, 0x00,
-0x9e, 0xba, 0x00, 0x00, 0x4d, 0xf8, 0x0c, 0x4d,
-0xcd, 0xe9, 0x01, 0x7e, 0x87, 0xb0, 0x02, 0xaf,
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@@ -21032,209 +14045,6 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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-0x02, 0x01, 0x00, 0x02, 0x81, 0x81, 0x00, 0xc0,
-0x83, 0x23, 0xdc, 0x56, 0x88, 0x1b, 0xb8, 0x30,
-0x20, 0x69, 0xf5, 0xb0, 0x85, 0x61, 0xc6, 0xee,
-0xbe, 0x7f, 0x05, 0xe2, 0xf5, 0xa8, 0x42, 0x04,
-0x8a, 0xbe, 0x8b, 0x47, 0xbe, 0x76, 0xfe, 0xae,
-0xf2, 0x5c, 0xf2, 0x9b, 0x2a, 0xfa, 0x32, 0x00,
-0x14, 0x16, 0x01, 0x42, 0x99, 0x89, 0xa1, 0x5f,
-0xcf, 0xc6, 0x81, 0x5e, 0xb3, 0x63, 0x58, 0x3c,
-0x2f, 0xd2, 0xf2, 0x0b, 0xe4, 0x98, 0x32, 0x83,
-0xdd, 0x81, 0x4b, 0x16, 0xd7, 0xe1, 0x85, 0x41,
-0x7a, 0xe5, 0x4a, 0xbc, 0x29, 0x6a, 0x3a, 0x6d,
-0xb5, 0xc0, 0x04, 0x08, 0x3b, 0x68, 0xc5, 0x56,
-0xc1, 0xf0, 0x23, 0x39, 0x91, 0x64, 0x19, 0x86,
-0x4d, 0x50, 0xb7, 0x4d, 0x40, 0xae, 0xca, 0x48,
-0x4c, 0x77, 0x35, 0x6c, 0x89, 0x5a, 0x0c, 0x27,
-0x5a, 0xbf, 0xac, 0x49, 0x9d, 0x5d, 0x7d, 0x23,
-0x62, 0xf2, 0x9c, 0x5e, 0x02, 0xe8, 0x71, 0x02,
-0x03, 0x01, 0x00, 0x01, 0x02, 0x81, 0x81, 0x00,
-0xbe, 0x86, 0x0b, 0x0b, 0x99, 0xa8, 0x02, 0xa6,
-0xfb, 0x1a, 0x59, 0x43, 0x8a, 0x7b, 0xb7, 0x15,
-0x06, 0x5b, 0x09, 0xa3, 0x6d, 0xc6, 0xe9, 0xca,
-0xcc, 0x6b, 0xf3, 0xc0, 0x2c, 0x34, 0xd7, 0xd7,
-0x9e, 0x94, 0xc6, 0x60, 0x64, 0x28, 0xd8, 0x8c,
-0x7b, 0x7f, 0x65, 0x77, 0xc1, 0xcd, 0xea, 0x64,
-0x07, 0x4a, 0xbe, 0x8e, 0x72, 0x86, 0xdf, 0x1f,
-0x08, 0x11, 0xdc, 0x97, 0x28, 0x26, 0x08, 0x68,
-0xde, 0x95, 0xd3, 0x2e, 0xfc, 0x96, 0xb6, 0xd0,
-0x84, 0xff, 0x27, 0x1a, 0x5f, 0x60, 0xde, 0xfc,
-0xc7, 0x03, 0xe7, 0xa3, 0x8e, 0x6e, 0x29, 0xba,
-0x9a, 0x3c, 0x5f, 0xc2, 0xc2, 0x80, 0x76, 0xb6,
-0xa8, 0x96, 0xaf, 0x1d, 0x34, 0xd7, 0x88, 0x28,
-0xce, 0x9b, 0xdd, 0xb1, 0xf3, 0x4f, 0x9c, 0x94,
-0x04, 0x43, 0x07, 0x81, 0x29, 0x8e, 0x20, 0x13,
-0x16, 0x72, 0x5b, 0xbd, 0xbc, 0x99, 0x3a, 0x41,
-0x02, 0x41, 0x00, 0xe1, 0xc6, 0xd9, 0x27, 0x64,
-0x6c, 0x09, 0x16, 0xec, 0x36, 0x82, 0x6d, 0x59,
-0x49, 0x83, 0x74, 0x0c, 0x21, 0xf1, 0xb0, 0x74,
-0xc4, 0xa1, 0xa5, 0x98, 0x67, 0xc6, 0x69, 0x79,
-0x5c, 0x85, 0xd3, 0xdc, 0x46, 0x4c, 0x5b, 0x92,
-0x9e, 0x94, 0xbf, 0xb3, 0x4e, 0x0d, 0xcc, 0x50,
-0x14, 0xb1, 0x0f, 0x13, 0x34, 0x1a, 0xb7, 0xfd,
-0xd5, 0xf6, 0x04, 0x14, 0xd2, 0xa3, 0x26, 0xca,
-0xd4, 0x1c, 0xc5, 0x02, 0x41, 0x00, 0xda, 0x48,
-0x59, 0x97, 0x78, 0x5c, 0xd5, 0x63, 0x0f, 0xb0,
-0xfd, 0x8c, 0x52, 0x54, 0xf9, 0x8e, 0x53, 0x8e,
-0x18, 0x98, 0x3a, 0xae, 0x9e, 0x6b, 0x7e, 0x6a,
-0x5a, 0x7b, 0x5d, 0x34, 0x37, 0x55, 0xb9, 0x21,
-0x8e, 0xbd, 0x40, 0x32, 0x0d, 0x28, 0x38, 0x7d,
-0x78, 0x9f, 0x76, 0xfa, 0x21, 0x8b, 0xcc, 0x2d,
-0x8b, 0x68, 0xa5, 0xf6, 0x41, 0x8f, 0xbb, 0xec,
-0xa5, 0x17, 0x9a, 0xb3, 0xaf, 0xbd, 0x02, 0x40,
-0x50, 0xfe, 0xfc, 0x32, 0x64, 0x95, 0x59, 0x61,
-0x6e, 0xd6, 0x53, 0x4e, 0x15, 0x45, 0x09, 0x32,
-0x9d, 0x93, 0xa3, 0xd8, 0x10, 0xdb, 0xe5, 0xbd,
-0xb9, 0x82, 0x29, 0x2c, 0xf7, 0x8b, 0xd8, 0xba,
-0xdb, 0x80, 0x20, 0xae, 0x8d, 0x57, 0xf4, 0xb7,
-0x1d, 0x05, 0x38, 0x6f, 0xfe, 0x9e, 0x9d, 0xb2,
-0x71, 0xca, 0x34, 0x77, 0xa3, 0x49, 0x99, 0xdb,
-0x76, 0xf8, 0xe5, 0xec, 0xe9, 0xc0, 0xd4, 0x9d,
-0x02, 0x40, 0x15, 0xb7, 0x4c, 0xf2, 0x7c, 0xce,
-0xff, 0x8b, 0xb3, 0x6b, 0xf0, 0x4d, 0x9d, 0x83,
-0x46, 0xb0, 0x9a, 0x2f, 0x70, 0xd2, 0xf4, 0x43,
-0x9b, 0x0f, 0x26, 0xac, 0x7e, 0x03, 0xf7, 0xe9,
-0xd1, 0xf7, 0x7d, 0x4b, 0x91, 0x5f, 0xd2, 0x9b,
-0x28, 0x23, 0xf0, 0x3a, 0xcb, 0x5d, 0x52, 0x00,
-0xe0, 0x85, 0x7f, 0xf2, 0xa8, 0x03, 0xe9, 0x3e,
-0xee, 0x96, 0xd6, 0x23, 0x5c, 0xe9, 0x54, 0x42,
-0xbc, 0x21, 0x02, 0x41, 0x00, 0x90, 0xa7, 0x45,
-0xda, 0x89, 0x70, 0xb2, 0xcd, 0x64, 0x96, 0x60,
-0x32, 0x42, 0x28, 0xc5, 0xf8, 0x28, 0x56, 0xff,
-0xd6, 0x65, 0xba, 0x9a, 0x85, 0xc8, 0xd6, 0x0f,
-0x1b, 0x8b, 0xee, 0x71, 0x7e, 0xcd, 0x2c, 0x72,
-0xea, 0xe0, 0x1d, 0xad, 0x86, 0xba, 0x76, 0x54,
-0xd4, 0xcf, 0x45, 0xad, 0xb5, 0xf1, 0xf2, 0xb3,
-0x1d, 0x9f, 0x81, 0x22, 0xcf, 0xa5, 0xf1, 0xa5,
-0x57, 0x0f, 0x9b, 0x2d, 0x25, 0x00, 0x00, 0x00,
-0x30, 0x77, 0x02, 0x01, 0x01, 0x04, 0x20, 0x21,
-0xe0, 0x86, 0x43, 0x2a, 0x15, 0x19, 0x84, 0x59,
-0xcf, 0x36, 0x3a, 0x50, 0xfc, 0x14, 0xc9, 0xda,
-0xad, 0xf9, 0x35, 0xf5, 0x27, 0xc2, 0xdf, 0xd7,
-0x1e, 0x4d, 0x6d, 0xbc, 0x42, 0xe5, 0x44, 0xa0,
-0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d,
-0x03, 0x01, 0x07, 0xa1, 0x44, 0x03, 0x42, 0x00,
-0x04, 0xeb, 0x9e, 0x79, 0xf8, 0x42, 0x63, 0x59,
-0xac, 0xcb, 0x2a, 0x91, 0x4c, 0x89, 0x86, 0xcc,
-0x70, 0xad, 0x90, 0x66, 0x93, 0x82, 0xa9, 0x73,
-0x26, 0x13, 0xfe, 0xac, 0xcb, 0xf8, 0x21, 0x27,
-0x4c, 0x21, 0x74, 0x97, 0x4a, 0x2a, 0xfe, 0xa5,
-0xb9, 0x4d, 0x7f, 0x66, 0xd4, 0xe0, 0x65, 0x10,
-0x66, 0x35, 0xbc, 0x53, 0xb7, 0xa0, 0xa3, 0xa6,
-0x71, 0x58, 0x3e, 0xdb, 0x3e, 0x11, 0xae, 0x10,
-0x14, 0x00, 0x00, 0x00, 0xfb, 0xda, 0x04, 0x89,
-0xa1, 0x58, 0x16, 0x0e, 0xa4, 0x02, 0xe9, 0x29,
-0xe3, 0xb6, 0x8f, 0x04, 0x30, 0x82, 0x02, 0x5d,
-0x02, 0x01, 0x00, 0x02, 0x81, 0x81, 0x00, 0xc0,
-0x83, 0x23, 0xdc, 0x56, 0x88, 0x1b, 0xb8, 0x30,
-0x20, 0x69, 0xf5, 0xb0, 0x85, 0x61, 0xc6, 0xee,
-0xbe, 0x7f, 0x05, 0xe2, 0xf5, 0xa8, 0x42, 0x04,
-0x8a, 0xbe, 0x8b, 0x47, 0xbe, 0x76, 0xfe, 0xae,
-0xf2, 0x5c, 0xf2, 0x9b, 0x2a, 0xfa, 0x32, 0x00,
-0x14, 0x16, 0x01, 0x42, 0x99, 0x89, 0xa1, 0x5f,
-0xcf, 0xc6, 0x81, 0x5e, 0xb3, 0x63, 0x58, 0x3c,
-0x2f, 0xd2, 0xf2, 0x0b, 0xe4, 0x98, 0x32, 0x83,
-0xdd, 0x81, 0x4b, 0x16, 0xd7, 0xe1, 0x85, 0x41,
-0x7a, 0xe5, 0x4a, 0xbc, 0x29, 0x6a, 0x3a, 0x6d,
-0xb5, 0xc0, 0x04, 0x08, 0x3b, 0x68, 0xc5, 0x56,
-0xc1, 0xf0, 0x23, 0x39, 0x91, 0x64, 0x19, 0x86,
-0x4d, 0x50, 0xb7, 0x4d, 0x40, 0xae, 0xca, 0x48,
-0x4c, 0x77, 0x35, 0x6c, 0x89, 0x5a, 0x0c, 0x27,
-0x5a, 0xbf, 0xac, 0x49, 0x9d, 0x5d, 0x7d, 0x23,
-0x62, 0xf2, 0x9c, 0x5e, 0x02, 0xe8, 0x71, 0x02,
-0x03, 0x01, 0x00, 0x01, 0x02, 0x81, 0x81, 0x00,
-0xbe, 0x86, 0x0b, 0x0b, 0x99, 0xa8, 0x02, 0xa6,
-0xfb, 0x1a, 0x59, 0x43, 0x8a, 0x7b, 0xb7, 0x15,
-0x06, 0x5b, 0x09, 0xa3, 0x6d, 0xc6, 0xe9, 0xca,
-0xcc, 0x6b, 0xf3, 0xc0, 0x2c, 0x34, 0xd7, 0xd7,
-0x9e, 0x94, 0xc6, 0x60, 0x64, 0x28, 0xd8, 0x8c,
-0x7b, 0x7f, 0x65, 0x77, 0xc1, 0xcd, 0xea, 0x64,
-0x07, 0x4a, 0xbe, 0x8e, 0x72, 0x86, 0xdf, 0x1f,
-0x08, 0x11, 0xdc, 0x97, 0x28, 0x26, 0x08, 0x68,
-0xde, 0x95, 0xd3, 0x2e, 0xfc, 0x96, 0xb6, 0xd0,
-0x84, 0xff, 0x27, 0x1a, 0x5f, 0x60, 0xde, 0xfc,
-0xc7, 0x03, 0xe7, 0xa3, 0x8e, 0x6e, 0x29, 0xba,
-0x9a, 0x3c, 0x5f, 0xc2, 0xc2, 0x80, 0x76, 0xb6,
-0xa8, 0x96, 0xaf, 0x1d, 0x34, 0xd7, 0x88, 0x28,
-0xce, 0x9b, 0xdd, 0xb1, 0xf3, 0x4f, 0x9c, 0x94,
-0x04, 0x43, 0x07, 0x81, 0x29, 0x8e, 0x20, 0x13,
-0x16, 0x72, 0x5b, 0xbd, 0xbc, 0x99, 0x3a, 0x41,
-0x02, 0x41, 0x00, 0xe1, 0xc6, 0xd9, 0x27, 0x64,
-0x6c, 0x09, 0x16, 0xec, 0x36, 0x82, 0x6d, 0x59,
-0x49, 0x83, 0x74, 0x0c, 0x21, 0xf1, 0xb0, 0x74,
-0xc4, 0xa1, 0xa5, 0x98, 0x67, 0xc6, 0x69, 0x79,
-0x5c, 0x85, 0xd3, 0xdc, 0x46, 0x4c, 0x5b, 0x92,
-0x9e, 0x94, 0xbf, 0xb3, 0x4e, 0x0d, 0xcc, 0x50,
-0x14, 0xb1, 0x0f, 0x13, 0x34, 0x1a, 0xb7, 0xfd,
-0xd5, 0xf6, 0x04, 0x14, 0xd2, 0xa3, 0x26, 0xca,
-0xd4, 0x1c, 0xc5, 0x02, 0x41, 0x00, 0xda, 0x48,
-0x59, 0x97, 0x78, 0x5c, 0xd5, 0x63, 0x0f, 0xb0,
-0xfd, 0x8c, 0x52, 0x54, 0xf9, 0x8e, 0x53, 0x8e,
-0x18, 0x98, 0x3a, 0xae, 0x9e, 0x6b, 0x7e, 0x6a,
-0x5a, 0x7b, 0x5d, 0x34, 0x37, 0x55, 0xb9, 0x21,
-0x8e, 0xbd, 0x40, 0x32, 0x0d, 0x28, 0x38, 0x7d,
-0x78, 0x9f, 0x76, 0xfa, 0x21, 0x8b, 0xcc, 0x2d,
-0x8b, 0x68, 0xa5, 0xf6, 0x41, 0x8f, 0xbb, 0xec,
-0xa5, 0x17, 0x9a, 0xb3, 0xaf, 0xbd, 0x02, 0x40,
-0x50, 0xfe, 0xfc, 0x32, 0x64, 0x95, 0x59, 0x61,
-0x6e, 0xd6, 0x53, 0x4e, 0x15, 0x45, 0x09, 0x32,
-0x9d, 0x93, 0xa3, 0xd8, 0x10, 0xdb, 0xe5, 0xbd,
-0xb9, 0x82, 0x29, 0x2c, 0xf7, 0x8b, 0xd8, 0xba,
-0xdb, 0x80, 0x20, 0xae, 0x8d, 0x57, 0xf4, 0xb7,
-0x1d, 0x05, 0x38, 0x6f, 0xfe, 0x9e, 0x9d, 0xb2,
-0x71, 0xca, 0x34, 0x77, 0xa3, 0x49, 0x99, 0xdb,
-0x76, 0xf8, 0xe5, 0xec, 0xe9, 0xc0, 0xd4, 0x9d,
-0x02, 0x40, 0x15, 0xb7, 0x4c, 0xf2, 0x7c, 0xce,
-0xff, 0x8b, 0xb3, 0x6b, 0xf0, 0x4d, 0x9d, 0x83,
-0x46, 0xb0, 0x9a, 0x2f, 0x70, 0xd2, 0xf4, 0x43,
-0x9b, 0x0f, 0x26, 0xac, 0x7e, 0x03, 0xf7, 0xe9,
-0xd1, 0xf7, 0x7d, 0x4b, 0x91, 0x5f, 0xd2, 0x9b,
-0x28, 0x23, 0xf0, 0x3a, 0xcb, 0x5d, 0x52, 0x00,
-0xe0, 0x85, 0x7f, 0xf2, 0xa8, 0x03, 0xe9, 0x3e,
-0xee, 0x96, 0xd6, 0x23, 0x5c, 0xe9, 0x54, 0x42,
-0xbc, 0x21, 0x02, 0x41, 0x00, 0x90, 0xa7, 0x45,
-0xda, 0x89, 0x70, 0xb2, 0xcd, 0x64, 0x96, 0x60,
-0x32, 0x42, 0x28, 0xc5, 0xf8, 0x28, 0x56, 0xff,
-0xd6, 0x65, 0xba, 0x9a, 0x85, 0xc8, 0xd6, 0x0f,
-0x1b, 0x8b, 0xee, 0x71, 0x7e, 0xcd, 0x2c, 0x72,
-0xea, 0xe0, 0x1d, 0xad, 0x86, 0xba, 0x76, 0x54,
-0xd4, 0xcf, 0x45, 0xad, 0xb5, 0xf1, 0xf2, 0xb3,
-0x1d, 0x9f, 0x81, 0x22, 0xcf, 0xa5, 0xf1, 0xa5,
-0x57, 0x0f, 0x9b, 0x2d, 0x25, 0x00, 0x00, 0x00,
-0x30, 0x77, 0x02, 0x01, 0x01, 0x04, 0x20, 0x21,
-0xe0, 0x86, 0x43, 0x2a, 0x15, 0x19, 0x84, 0x59,
-0xcf, 0x36, 0x3a, 0x50, 0xfc, 0x14, 0xc9, 0xda,
-0xad, 0xf9, 0x35, 0xf5, 0x27, 0xc2, 0xdf, 0xd7,
-0x1e, 0x4d, 0x6d, 0xbc, 0x42, 0xe5, 0x44, 0xa0,
-0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d,
-0x03, 0x01, 0x07, 0xa1, 0x44, 0x03, 0x42, 0x00,
-0x04, 0xeb, 0x9e, 0x79, 0xf8, 0x42, 0x63, 0x59,
-0xac, 0xcb, 0x2a, 0x91, 0x4c, 0x89, 0x86, 0xcc,
-0x70, 0xad, 0x90, 0x66, 0x93, 0x82, 0xa9, 0x73,
-0x26, 0x13, 0xfe, 0xac, 0xcb, 0xf8, 0x21, 0x27,
-0x4c, 0x21, 0x74, 0x97, 0x4a, 0x2a, 0xfe, 0xa5,
-0xb9, 0x4d, 0x7f, 0x66, 0xd4, 0xe0, 0x65, 0x10,
-0x66, 0x35, 0xbc, 0x53, 0xb7, 0xa0, 0xa3, 0xa6,
-0x71, 0x58, 0x3e, 0xdb, 0x3e, 0x11, 0xae, 0x10,
-0x14, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
-0x98, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x8c, 0xe0, 0x01, 0x00, 0xb0, 0xe0, 0x01, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x8d, 0xe0, 0x01, 0x00,
-0xc4, 0xe0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x8e, 0xe0, 0x01, 0x00, 0xe0, 0xe0, 0x01, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x90, 0xe0, 0x01, 0x00,
-0xf0, 0xe0, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x94, 0xe0, 0x01, 0x00, 0x04, 0xe1, 0x01, 0x00,
-0x04, 0x00, 0x00, 0x00, 0x14, 0xe1, 0x01, 0x00,
-0x28, 0xe1, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x3c, 0xe1, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x28, 0x16, 0x02, 0x00, 0x10, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x34, 0x16, 0x02, 0x00,
-0xf4, 0x97, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x40, 0x16, 0x02, 0x00,
-0x40, 0x16, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -21566,6 +14376,467 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
+0x74, 0x23, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x76, 0xf5, 0x00, 0x00, 0x8a, 0x23, 0x01, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x75, 0xf5, 0x00, 0x00,
+0x9e, 0x23, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x74, 0xf5, 0x00, 0x00, 0xb7, 0x23, 0x01, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x70, 0xf5, 0x00, 0x00,
+0xc7, 0x23, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x6c, 0xf5, 0x00, 0x00, 0xd8, 0x23, 0x01, 0x00,
+0x04, 0x00, 0x00, 0x00, 0xe7, 0x23, 0x01, 0x00,
+0xf9, 0x23, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x0c, 0x24, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x58, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x60, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x68, 0x40, 0x01, 0x00,
+0x68, 0x40, 0x01, 0x00, 0xfb, 0xda, 0x04, 0x89,
+0xa1, 0x58, 0x16, 0x0e, 0xa4, 0x02, 0xe9, 0x29,
+0xe3, 0xb6, 0x8f, 0x04, 0x30, 0x82, 0x02, 0x5d,
+0x02, 0x01, 0x00, 0x02, 0x81, 0x81, 0x00, 0xc0,
+0x83, 0x23, 0xdc, 0x56, 0x88, 0x1b, 0xb8, 0x30,
+0x20, 0x69, 0xf5, 0xb0, 0x85, 0x61, 0xc6, 0xee,
+0xbe, 0x7f, 0x05, 0xe2, 0xf5, 0xa8, 0x42, 0x04,
+0x8a, 0xbe, 0x8b, 0x47, 0xbe, 0x76, 0xfe, 0xae,
+0xf2, 0x5c, 0xf2, 0x9b, 0x2a, 0xfa, 0x32, 0x00,
+0x14, 0x16, 0x01, 0x42, 0x99, 0x89, 0xa1, 0x5f,
+0xcf, 0xc6, 0x81, 0x5e, 0xb3, 0x63, 0x58, 0x3c,
+0x2f, 0xd2, 0xf2, 0x0b, 0xe4, 0x98, 0x32, 0x83,
+0xdd, 0x81, 0x4b, 0x16, 0xd7, 0xe1, 0x85, 0x41,
+0x7a, 0xe5, 0x4a, 0xbc, 0x29, 0x6a, 0x3a, 0x6d,
+0xb5, 0xc0, 0x04, 0x08, 0x3b, 0x68, 0xc5, 0x56,
+0xc1, 0xf0, 0x23, 0x39, 0x91, 0x64, 0x19, 0x86,
+0x4d, 0x50, 0xb7, 0x4d, 0x40, 0xae, 0xca, 0x48,
+0x4c, 0x77, 0x35, 0x6c, 0x89, 0x5a, 0x0c, 0x27,
+0x5a, 0xbf, 0xac, 0x49, 0x9d, 0x5d, 0x7d, 0x23,
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+0x66, 0x48, 0x60, 0x7b, 0x02, 0x20, 0x4d, 0x0b,
+0xf3, 0x51, 0xd9, 0x30, 0x7c, 0x7d, 0x5b, 0xda,
+0x35, 0x34, 0x1d, 0xa8, 0x47, 0x1b, 0x63, 0xa5,
+0x85, 0x65, 0x3c, 0xad, 0x4f, 0x24, 0xa7, 0xe7,
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+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -23080,17 +16351,6 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x50, 0xf0, 0x02, 0x00, 0x05, 0x00, 0x00, 0x00,
-0xf8, 0xdf, 0x02, 0x00, 0x06, 0x00, 0x00, 0x00,
-0x78, 0xd0, 0x02, 0x00, 0x0a, 0x00, 0x00, 0x00,
-0x56, 0x10, 0x00, 0x00, 0x0b, 0x00, 0x00, 0x00,
-0x10, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
-0x50, 0x01, 0x02, 0x00, 0x12, 0x00, 0x00, 0x00,
-0x28, 0x08, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0xfa, 0xff, 0xff, 0x6f,
-0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -23099,1121 +16359,12 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x02, 0x00, 0x66, 0x00, 0x00, 0x00,
-0x61, 0xb0, 0x01, 0x00, 0x3c, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x76, 0x00, 0x00, 0x00,
-0x55, 0xcc, 0x00, 0x00, 0xf4, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x92, 0x00, 0x00, 0x00,
-0x09, 0x74, 0x01, 0x00, 0x60, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x9b, 0x00, 0x00, 0x00,
-0xfd, 0x7f, 0x01, 0x00, 0x8e, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xa7, 0x00, 0x00, 0x00,
-0x35, 0xb0, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xb6, 0x00, 0x00, 0x00,
-0x95, 0x74, 0x01, 0x00, 0x6e, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xcc, 0x00, 0x00, 0x00,
-0x70, 0x29, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xe4, 0x00, 0x00, 0x00,
-0xdc, 0x25, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xf0, 0x00, 0x00, 0x00,
-0x5d, 0xf6, 0x00, 0x00, 0xc4, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x01, 0x01, 0x00, 0x00,
-0xc1, 0x30, 0x01, 0x00, 0xc0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x16, 0x01, 0x00, 0x00,
-0xc1, 0xa7, 0x01, 0x00, 0x10, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x81, 0x02, 0x00, 0x00,
-0xa9, 0xb8, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x1e, 0x01, 0x00, 0x00,
-0x81, 0x31, 0x01, 0x00, 0x2c, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x30, 0x01, 0x00, 0x00,
-0xf0, 0x25, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x39, 0x01, 0x00, 0x00,
-0x49, 0xce, 0x00, 0x00, 0xb0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x4e, 0x01, 0x00, 0x00,
-0x09, 0x09, 0x01, 0x00, 0xec, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x2a, 0x0c, 0x00, 0x00,
-0x75, 0x7a, 0x01, 0x00, 0x70, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x61, 0x01, 0x00, 0x00,
-0x25, 0x5e, 0x01, 0x00, 0x2a, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x6b, 0x01, 0x00, 0x00,
-0x95, 0x75, 0x01, 0x00, 0x28, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x76, 0x01, 0x00, 0x00,
-0x65, 0x5b, 0x01, 0x00, 0x16, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x13, 0x0e, 0x00, 0x00,
-0x5d, 0x59, 0x01, 0x00, 0x50, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x7e, 0x01, 0x00, 0x00,
-0xf9, 0xce, 0x00, 0x00, 0xb0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x95, 0x01, 0x00, 0x00,
-0x88, 0xe0, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x11, 0x00, 0x03, 0x00, 0xa2, 0x01, 0x00, 0x00,
-0x4d, 0x49, 0x00, 0x00, 0xa0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xae, 0x01, 0x00, 0x00,
-0x5d, 0xcb, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xc7, 0x01, 0x00, 0x00,
-0x81, 0x41, 0x01, 0x00, 0x28, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xd3, 0x01, 0x00, 0x00,
-0x28, 0x27, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xe9, 0x01, 0x00, 0x00,
-0x5d, 0x91, 0x00, 0x00, 0x9c, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xf5, 0x01, 0x00, 0x00,
-0xf8, 0x28, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x0c, 0x02, 0x00, 0x00,
-0x11, 0xf8, 0x00, 0x00, 0x4c, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x1b, 0x02, 0x00, 0x00,
-0xc5, 0x85, 0x00, 0x00, 0x42, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x2c, 0x02, 0x00, 0x00,
-0x8d, 0x56, 0x00, 0x00, 0x7c, 0x03, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x41, 0x02, 0x00, 0x00,
-0xad, 0x8a, 0x01, 0x00, 0xfc, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x49, 0x02, 0x00, 0x00,
-0xbc, 0xef, 0x01, 0x00, 0x08, 0x00, 0x00, 0x00,
-0x11, 0x00, 0x03, 0x00, 0x53, 0x02, 0x00, 0x00,
-0x0d, 0x05, 0x01, 0x00, 0x20, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x5e, 0x02, 0x00, 0x00,
-0x81, 0x9b, 0x01, 0x00, 0x2c, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x6d, 0x02, 0x00, 0x00,
-0x25, 0x42, 0x01, 0x00, 0x2c, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x7b, 0x02, 0x00, 0x00,
-0xe1, 0x6d, 0x01, 0x00, 0xac, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x88, 0x02, 0x00, 0x00,
-0x95, 0x5a, 0x01, 0x00, 0xd0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x8f, 0x02, 0x00, 0x00,
-0x54, 0x27, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xa4, 0x02, 0x00, 0x00,
-0xc1, 0x73, 0x01, 0x00, 0x48, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xad, 0x02, 0x00, 0x00,
-0xc5, 0x9f, 0x00, 0x00, 0x74, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xbb, 0x02, 0x00, 0x00,
-0xac, 0x70, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x4e, 0x0e, 0x00, 0x00,
-0xa9, 0xb9, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xcc, 0x02, 0x00, 0x00,
-0x8d, 0x80, 0x01, 0x00, 0x2e, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xd9, 0x02, 0x00, 0x00,
-0x15, 0x9e, 0x01, 0x00, 0xfc, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xe8, 0x02, 0x00, 0x00,
-0xd4, 0x27, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xfa, 0x02, 0x00, 0x00,
-0x7d, 0x99, 0x01, 0x00, 0xe4, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x02, 0x03, 0x00, 0x00,
-0x3d, 0x9c, 0x00, 0x00, 0x88, 0x03, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x0f, 0x03, 0x00, 0x00,
-0xcd, 0x0c, 0x01, 0x00, 0xa8, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xcc, 0x01, 0x00, 0x00,
-0xd9, 0x55, 0x01, 0x00, 0x28, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x25, 0x03, 0x00, 0x00,
-0x3c, 0x28, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x12, 0x0e, 0x00, 0x00,
-0xad, 0x59, 0x01, 0x00, 0x44, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x39, 0x03, 0x00, 0x00,
-0xa5, 0xd1, 0x00, 0x00, 0x30, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x60, 0x0b, 0x00, 0x00,
-0xd0, 0x15, 0x02, 0x00, 0x04, 0x00, 0x00, 0x00,
-0x11, 0x00, 0x06, 0x00, 0x49, 0x03, 0x00, 0x00,
-0xe0, 0x28, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x65, 0x03, 0x00, 0x00,
-0x5d, 0xfc, 0x00, 0x00, 0xe8, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x76, 0x03, 0x00, 0x00,
-0x65, 0x20, 0x01, 0x00, 0x70, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x8b, 0x03, 0x00, 0x00,
-0xac, 0x2b, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xa0, 0x03, 0x00, 0x00,
-0xb4, 0x28, 0x01, 0x00, 0x18, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xb2, 0x03, 0x00, 0x00,
-0x80, 0xe0, 0x01, 0x00, 0x08, 0x00, 0x00, 0x00,
-0x11, 0x00, 0x03, 0x00, 0xc3, 0x03, 0x00, 0x00,
-0x28, 0x2a, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xda, 0x03, 0x00, 0x00,
-0x4d, 0x96, 0x01, 0x00, 0x88, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xf3, 0x03, 0x00, 0x00,
-0xe5, 0x7a, 0x01, 0x00, 0x4e, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x05, 0x04, 0x00, 0x00,
-0x61, 0x9a, 0x01, 0x00, 0xd0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x12, 0x04, 0x00, 0x00,
-0x15, 0x13, 0x00, 0x00, 0x0e, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x27, 0x04, 0x00, 0x00,
-0x05, 0x34, 0x01, 0x00, 0x58, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x33, 0x04, 0x00, 0x00,
-0xf5, 0x03, 0x01, 0x00, 0x18, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x19, 0x00, 0x00, 0x00,
-0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x10, 0x00, 0xf1, 0xff, 0x47, 0x04, 0x00, 0x00,
-0x21, 0xf7, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x59, 0x04, 0x00, 0x00,
-0xb1, 0x7a, 0x00, 0x00, 0x50, 0x04, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x68, 0x04, 0x00, 0x00,
-0xa9, 0x47, 0x00, 0x00, 0x32, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x76, 0x04, 0x00, 0x00,
-0xed, 0x34, 0x01, 0x00, 0x50, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x88, 0x04, 0x00, 0x00,
-0x00, 0x2a, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x9f, 0x04, 0x00, 0x00,
-0xb8, 0x17, 0x02, 0x00, 0x00, 0x80, 0x00, 0x00,
-0x11, 0x00, 0x07, 0x00, 0xa7, 0x04, 0x00, 0x00,
-0x8d, 0x13, 0x00, 0x00, 0x4c, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xc1, 0x04, 0x00, 0x00,
-0x75, 0x0f, 0x01, 0x00, 0xa8, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xd7, 0x04, 0x00, 0x00,
-0xd5, 0xd2, 0x00, 0x00, 0x0c, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xf0, 0x04, 0x00, 0x00,
-0x40, 0x27, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x05, 0x05, 0x00, 0x00,
-0x8d, 0x3f, 0x00, 0x00, 0x4c, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x20, 0x05, 0x00, 0x00,
-0x6d, 0xb8, 0x01, 0x00, 0xdc, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x30, 0x05, 0x00, 0x00,
-0xad, 0x9c, 0x01, 0x00, 0xb8, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x47, 0x05, 0x00, 0x00,
-0xed, 0x49, 0x00, 0x00, 0xa0, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x56, 0x05, 0x00, 0x00,
-0x28, 0x28, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x6a, 0x05, 0x00, 0x00,
-0x14, 0x27, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x7b, 0x05, 0x00, 0x00,
-0x14, 0x28, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x92, 0x05, 0x00, 0x00,
-0xc1, 0x44, 0x00, 0x00, 0x84, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xa2, 0x05, 0x00, 0x00,
-0x21, 0x56, 0x01, 0x00, 0x2c, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xa9, 0x05, 0x00, 0x00,
-0xcd, 0xc2, 0x00, 0x00, 0x2c, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xb4, 0x05, 0x00, 0x00,
-0xd8, 0x26, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xcb, 0x05, 0x00, 0x00,
-0x50, 0x28, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xdf, 0x05, 0x00, 0x00,
-0xd1, 0xa9, 0x01, 0x00, 0x34, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xe7, 0x05, 0x00, 0x00,
-0xe9, 0xd9, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xfa, 0x05, 0x00, 0x00,
-0x35, 0xc7, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x17, 0x06, 0x00, 0x00,
-0x25, 0x13, 0x00, 0x00, 0x68, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x30, 0x06, 0x00, 0x00,
-0xa9, 0x91, 0x01, 0x00, 0xf8, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x38, 0x06, 0x00, 0x00,
-0xec, 0x29, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x50, 0x06, 0x00, 0x00,
-0x85, 0xeb, 0x00, 0x00, 0xbc, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x62, 0x06, 0x00, 0x00,
-0x9c, 0x29, 0x01, 0x00, 0x14, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x7a, 0x06, 0x00, 0x00,
-0xfd, 0xc3, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x8b, 0x06, 0x00, 0x00,
-0x39, 0xa0, 0x00, 0x00, 0xe0, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x99, 0x06, 0x00, 0x00,
-0x29, 0x96, 0x01, 0x00, 0x24, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xb3, 0x06, 0x00, 0x00,
-0x31, 0x9b, 0x01, 0x00, 0x24, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xcc, 0x06, 0x00, 0x00,
-0xad, 0x45, 0x00, 0x00, 0xfa, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xd5, 0x06, 0x00, 0x00,
-0xf5, 0x0a, 0x01, 0x00, 0xd8, 0x01, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xe8, 0x06, 0x00, 0x00,
-0x6d, 0xbf, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0xf4, 0x06, 0x00, 0x00,
-0x79, 0x00, 0x01, 0x00, 0xf8, 0x00, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x00, 0x07, 0x00, 0x00,
-0x6d, 0x17, 0x01, 0x00, 0x94, 0x02, 0x00, 0x00,
-0x12, 0x00, 0x02, 0x00, 0x19, 0x07, 0x00, 0x00,
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-0xf2, 0x00, 0x00, 0x00, 0x89, 0x00, 0x00, 0x00,
-0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
-0xbb, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x83, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x67, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xcb, 0x00, 0x00, 0x00, 0xd9, 0x00, 0x00, 0x00,
-0xbf, 0x00, 0x00, 0x00, 0xba, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -24224,237 +16375,260 @@ const uint8_t keymaster_data[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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-};
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+0x77, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, };
+const uint32_t keymaster_size = 133028;
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
index d1a6989c04..49e6582cc6 100644
Binary files a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index da3b16df5b..83d91f9e8b 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -73,13 +73,12 @@ void test_optee(void)
 
 	TEEC_CloseSession(&TeecSession);
 
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	debug("testmm end\n");
 	debug("TeecResult %x\n", TeecResult);
 }
 
-
 static uint8_t b2hs_add_base(uint8_t in)
 {
 	if (in > 9)
@@ -162,15 +161,15 @@ uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
 					0,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
 
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 
 	TEEC_CloseSession(&TeecSession);
 
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	debug("testmm end\n");
 	return TeecResult;
@@ -240,7 +239,7 @@ uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
 
 	TEEC_CloseSession(&TeecSession);
 
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 
 	debug("testmm end\n");
 
@@ -253,8 +252,8 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
@@ -300,15 +299,15 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					0,
+					142,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -320,8 +319,8 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 	TEEC_Context TeecContext;
 	TEEC_Session TeecSession;
 	uint32_t ErrorOrigin;
-	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
-		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
 	TEEC_UUID *TeecUuid = &tempuuid;
 	TEEC_Operation TeecOperation = {0};
 
@@ -369,14 +368,14 @@ uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
 						TEEC_NONE);
 
 	TeecResult = TEEC_InvokeCommand(&TeecSession,
-					1,
+					141,
 					&TeecOperation,
 					&ErrorOrigin);
 
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -439,12 +438,12 @@ uint32_t trusty_read_lock_state(uint8_t *lock_state)
 					0,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -512,7 +511,7 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -575,12 +574,12 @@ uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
 					0,
 					&TeecOperation,
 					&ErrorOrigin);
-
-	memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -649,7 +648,7 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 
 	return TeecResult;
@@ -721,7 +720,7 @@ uint32_t write_to_keymaster(uint8_t *filename,
 	TEEC_ReleaseSharedMemory(&SharedMem0);
 	TEEC_ReleaseSharedMemory(&SharedMem1);
 	TEEC_CloseSession(&TeecSession);
-	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	TEEC_FinalizeContext(&TeecContext);
 	debug("testmm end\n");
 	debug("TeecResult %x\n", TeecResult);
 

commit 2cd27853d2f45c04381e1637528a15d28ee6666c
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:53:37 2017 +0800

    lib: optee_client: add R&W vboot key hash func
    
    uboot can read vboot key hash from efuse and write
    vboot key hash to efuse, secure boot will be enable
    after you write vboot key hash.
    
    Change-Id: Ibe7b2a5778a3f38e13a241261617f1be8537c88e
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index f1fed494e2..071f7ea1c2 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -22,5 +22,7 @@ uint32_t write_to_keymaster
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_notify_optee_uboot_end(void);
+uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index b6674c82d9..da3b16df5b 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -921,3 +921,109 @@ uint32_t trusty_notify_optee_uboot_end(void)
 	res |= notify_optee_efuse_ta();
 	return res;
 }
+
+uint32_t trusty_read_vbootkey_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					3,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+uint32_t trusty_write_vbootkey_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					4,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}

commit 165396163ee1502fdaa9d187e17bae957d1d281f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:43:25 2017 +0800

    lib: optee_client: notify optee when uboot end
    
    trusty_notify_optee_uboot_end() function is used before uboot
    jump into kernel, then optee will free memery and denied
    call some tipc functions, denied call read write attribute hash.
    
    Change-Id: I96b5687e1afd5bfdf1780ed1641f5fff2fc17eee
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 0834ce3034..f1fed494e2 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -21,5 +21,6 @@ uint32_t write_to_keymaster
 	uint8_t *data, uint32_t data_size);
 uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
 uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_notify_optee_uboot_end(void);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index b998a2b480..b6674c82d9 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -834,3 +834,90 @@ uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
 
 	return TeecResult;
 }
+
+uint32_t notify_optee_rpmb_ta(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					2,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t notify_optee_efuse_ta(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					2,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_notify_optee_uboot_end(void)
+{
+	TEEC_Result res;
+	res = notify_optee_rpmb_ta();
+	res |= notify_optee_efuse_ta();
+	return res;
+}

commit 7b9ee69be599bd672f1111a38fad4e6b08c23c0f
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:36:30 2017 +0800

    lib: optee_client: add macro definition
    
    Change-Id: If6791e63a70190273b09c3cfa7f61490d7f5f0cd
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
index a1df9239ed..2e07fbb105 100644
--- a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
+++ b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
@@ -3,6 +3,10 @@
  *
  * SPDX-License-Identifier:     GPL-2.0+
  */
+#ifndef _KEYMASTER_TA_H_
+#define _KEYMASTER_TA_H_
 
 extern const uint8_t keymaster_data[];
 extern const uint32_t keymaster_size;
+
+#endif /* _KEYMASTER_TA_H_ */
diff --git a/include/optee_include/OpteeClientApiLib.h b/include/optee_include/OpteeClientApiLib.h
index a88565fbff..8c68643e29 100644
--- a/include/optee_include/OpteeClientApiLib.h
+++ b/include/optee_include/OpteeClientApiLib.h
@@ -4,7 +4,12 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_APILIB_H_
+#define _OPTEE_CLIENT_APILIB_H_
+
 #include <optee_include/tee_base_types.h>
 #include <optee_include/tee_client_api.h>
 
 TEEC_Result OpteeClientApiLibInitialize(void);
+
+#endif /*_OPTEE_CLIENT_APILIB_H_*/
diff --git a/include/optee_include/OpteeClientImage.h b/include/optee_include/OpteeClientImage.h
index d18928480a..e67142cefc 100644
--- a/include/optee_include/OpteeClientImage.h
+++ b/include/optee_include/OpteeClientImage.h
@@ -14,4 +14,5 @@
 	0xee3206cb, 0x950a, 0x49eb, \
 	{ 0xbd, 0xd7, 0xc1, 0x95, 0xcb, 0x9b, 0x2e, 0xbf } \
 }
+
 #endif
diff --git a/include/optee_include/OpteeClientMem.h b/include/optee_include/OpteeClientMem.h
index 2e4c877b36..ba85f829c3 100644
--- a/include/optee_include/OpteeClientMem.h
+++ b/include/optee_include/OpteeClientMem.h
@@ -4,6 +4,8 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_MEM_H_
+#define _OPTEE_CLIENT_MEM_H_
 
 #include <linux/types.h>
 
@@ -12,3 +14,5 @@ void OpteeClientMemInit(void);
 void *OpteeClientMemAlloc(uint32_t length);
 
 void  OpteeClientMemFree(void *mem);
+
+#endif /*_OPTEE_CLIENT_MEM_H_*/
diff --git a/include/optee_include/OpteeClientRPC.h b/include/optee_include/OpteeClientRPC.h
index 3efa427d37..b4a3574532 100644
--- a/include/optee_include/OpteeClientRPC.h
+++ b/include/optee_include/OpteeClientRPC.h
@@ -4,6 +4,9 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_RPC_H_
+#define _OPTEE_CLIENT_RPC_H_
+
 #include <optee_include/tee_base_types.h>
 #include <optee_include/OpteeClientApiLib.h>
 
@@ -51,3 +54,5 @@ typedef struct s_rpmb_back {
 } EFI_RK_RPMB_DATA_PACKET_BACK;
 
 TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs);
+
+#endif /*_OPTEE_CLIENT_RPC_H_*/
diff --git a/include/optee_include/OpteeClientSMC.h b/include/optee_include/OpteeClientSMC.h
index 2bbcbe9063..d8b8bb2e1f 100644
--- a/include/optee_include/OpteeClientSMC.h
+++ b/include/optee_include/OpteeClientSMC.h
@@ -4,6 +4,8 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEE_CLIENT_SMC_H_
+#define _OPTEE_CLIENT_SMC_H_
 
 #include <optee_include/tee_base_types.h>
 #include <optee_include/OpteeClientApiLib.h>
@@ -24,3 +26,5 @@ TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
 
 TEEC_Result TEEC_SMC_RequestCancellation(TEEC_Operation *operation,
 				uint32_t *error_origin);
+
+#endif /*_OPTEE_CLIENT_SMC_H_*/

commit 6ef445a4c243003c1d9d75deaca03b2435d8c109
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 17:13:46 2017 +0800

    lib: optee_client: add support for R&W efuse
    
    Change-Id: I8b06523c5379f253994c3ad89aa3b354d79b4c45
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/OpteeClientInterface.h b/include/optee_include/OpteeClientInterface.h
index 00b3599ab2..0834ce3034 100644
--- a/include/optee_include/OpteeClientInterface.h
+++ b/include/optee_include/OpteeClientInterface.h
@@ -19,5 +19,7 @@ uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
+uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length);
+uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length);
 
 #endif
diff --git a/lib/optee_clientApi/OpteeClientInterface.c b/lib/optee_clientApi/OpteeClientInterface.c
index 382d3299f5..b998a2b480 100644
--- a/lib/optee_clientApi/OpteeClientInterface.c
+++ b/lib/optee_clientApi/OpteeClientInterface.c
@@ -727,3 +727,110 @@ uint32_t write_to_keymaster(uint8_t *filename,
 
 	return TeecResult;
 }
+
+uint32_t trusty_read_attribute_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_OUTPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	if (TeecResult == TEEC_SUCCESS)
+		memcpy(buf, SharedMem0.buffer, SharedMem0.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_attribute_hash(uint32_t *buf, uint32_t length)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x2d26d8a8, 0x5134, 0x4dd8, \
+			{ 0xb3, 0x2f, 0xb3, 0x4b, 0xce, 0xeb, 0xc4, 0x71 } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = length * sizeof(uint32_t);
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, buf, SharedMem0.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_NONE,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_CloseSession(&TeecSession);
+	TEEC_FinalizeContext(&TeecContext);
+
+	return TeecResult;
+}

commit ae8ec5e1394c5d98dfa1830d00daa005945fdb8e
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Mon Oct 30 16:55:11 2017 +0800

    lib: optee_client: change file name
    
    change OpteeClientTest.c to OpteeClientInterface.c
    
    Change-Id: I68b32a2a4757af655bd4eaa723067f024ff112ef
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index ca3721d90f..94bd46f237 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -8,7 +8,7 @@
 #include <command.h>
 #include <console.h>
 #include <mmc.h>
-#include <optee_include/OpteeClientTest.h>
+#include <optee_include/OpteeClientInterface.h>
 #include <optee_include/OpteeClientApiLib.h>
 
 static int curr_device = -1;
diff --git a/include/optee_include/OpteeClientTest.h b/include/optee_include/OpteeClientInterface.h
similarity index 100%
rename from include/optee_include/OpteeClientTest.h
rename to include/optee_include/OpteeClientInterface.h
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index b8ae4763c9..962fcf5423 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -35,7 +35,7 @@
 #include <android_avb/avb_ops_user.h>
 #include <android_avb/libavb_ab.h>
 #include <android_avb/avb_atx_validate.h>
-#include <optee_include/OpteeClientTest.h>
+#include <optee_include/OpteeClientInterface.h>
 
 static void byte_to_block(int64_t *offset,
 			  size_t *num_bytes,
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
index 0cc40a7c18..de8a3b4058 100644
--- a/lib/optee_clientApi/Makefile
+++ b/lib/optee_clientApi/Makefile
@@ -5,7 +5,7 @@
 
 obj-y += OpteeClientMem.o
 obj-y += OpteeClientApiLib.o
-obj-y += OpteeClientTest.o
+obj-y += OpteeClientInterface.o
 obj-y += OpteeClientSMC.o
 obj-y += OpteeClientRPC.o
 obj-y += tee_smc-arm64.o
diff --git a/lib/optee_clientApi/OpteeClientTest.c b/lib/optee_clientApi/OpteeClientInterface.c
similarity index 100%
rename from lib/optee_clientApi/OpteeClientTest.c
rename to lib/optee_clientApi/OpteeClientInterface.c

commit 4397fdfd14cb55940ebae2015cc9c276de87b475
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Oct 25 22:15:30 2017 +0800

    androidboot: modify do_avb_flow
    
    In the fuction do_avb_flow, the return value of
    avb_ab_flow() must be judged. If not, the process
    can not return to u-boot command line when execute
    avb_ab_flow failing.
    
    Change-Id: I925c9c63cee2153d365ea78b286d8958624b106c
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 49ed44e2aa..27834bc73a 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -619,11 +619,15 @@ int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	verify_flag = argv[1][0];
 	if (verify_flag == 'v') {
 		debug("start with verify!\n");
-		avb_ab_flow(ops->ab_ops,
+		if (avb_ab_flow(ops->ab_ops,
 			    requested_partitions,
 			    flags,
 			    AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
-			    &slot_data);
+			    &slot_data)) {
+			printf("avb_ab_flow() error!\n");
+			return CMD_RET_FAILURE;
+		}
+
 		strcat(slot_partition[1], requested_partitions[1]);
 		strcat(slot_partition[1], slot_data->ab_suffix);
 		ops->get_unique_guid_for_partition(ops,

commit e7e0443e3e5110fc23a736a95a15b53156b9e69e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 16:55:49 2017 +0800

    avb: modify the function read_from_partition and write_to_partition
    
    There is no need to malloc a space if offset
    and num_bytes is multiple of 512 in function
    read_from_partition.
    
    The blk_dwrite in write_to_partition do not
    return 1 if execute success. So do not need
    to judge the return value.
    
    Change-Id: Icd5681815640e86166d05ab3fc74f95d669621c7
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index ac7d2263ca..b8ae4763c9 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -72,14 +72,12 @@ static AvbIOResult read_from_partition(AvbOps* ops,
                                        size_t* out_num_read)
 {
 	char *dev_iface = "mmc";
-	char *buffer_temp;
 	int dev_num = 0;
 	struct blk_desc *dev_desc;
 	lbaint_t offset_blk, blkcnt;
 	disk_partition_t part_info;
 
 	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
-	buffer_temp = malloc(512 * blkcnt);
 	dev_desc = blk_get_dev(dev_iface, dev_num);
 	if (!dev_desc) {
 		printf("Could not find %s %d\n", dev_iface, dev_num);
@@ -95,11 +93,17 @@ static AvbIOResult read_from_partition(AvbOps* ops,
 		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
 		*out_num_read = blkcnt * 512;
 	} else {
+		char *buffer_temp;
+		buffer_temp = malloc(512 * blkcnt);
+		if (buffer_temp == NULL) {
+			printf("malloc error!\n");
+			return -1;
+		}
 		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
 		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
 		*out_num_read = num_bytes;
+		free(buffer_temp);
 	}
-	free(buffer_temp);
 
 	return AVB_IO_RESULT_OK;
 }
@@ -119,8 +123,11 @@ static AvbIOResult write_to_partition(AvbOps* ops,
 
 	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
 	buffer_temp = malloc(512 * blkcnt);
+	if (buffer_temp == NULL) {
+		printf("malloc error!\n");
+		return -1;
+	}
 	memset(buffer_temp, 0, 512 * blkcnt);
-
 	dev_desc = blk_get_dev(dev_iface, dev_num);
 	if (!dev_desc) {
 		printf("Could not find %s %d\n", dev_iface, dev_num);
@@ -135,11 +142,9 @@ static AvbIOResult write_to_partition(AvbOps* ops,
 	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
 		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
 	}
-	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
 
-	if(blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer) != 1){
-		printf("Can't write %s partition",partition);
-	}
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+	blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
 	free(buffer_temp);
 
 	return AVB_IO_RESULT_OK;

commit d8bd6e971f5ff7304840323d055f644bd32e41be
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 16:53:05 2017 +0800

    fastboot: add new fastboot cmd
    
    fastboot oem at-lock-vboot
    fastboot oem at-unlock-vboot
    fastboot oem at-disable-unlock-vboot
    
    Change-Id: Id2ae9c64abab271fdc4abe385a68e7f156916e05
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 9de1731947..9640d4f057 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -873,11 +873,44 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
 		fastboot_tx_write_str("OKAY");
 	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t lock_state;
+		lock_state = 0;
+		if (write_lock_state(lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t lock_state;
+		if (read_lock_state(&lock_state))
+			fastboot_tx_write_str("FAIL");
+		if (lock_state >> 1 == 1) {
+			fastboot_tx_write_str("FAILThe vboot is disable!");
+		} else {
+			lock_state = 1;
+			if (write_lock_state(lock_state))
+				fastboot_tx_write_str("FAIL");
+			else
+				fastboot_tx_write_str("OKAY");
+		}
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t lock_state;
+		lock_state = 2;
+		if (write_lock_state(lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
 #ifdef CONFIG_AVB_LIBAVB_USER
 		if (write_permanent_attributes((uint8_t *)

commit 5170bcddeccbefffbf722320ea2de32ea64f4b1f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 16:06:48 2017 +0800

    avb: provide read/write vboot state function for fastboot
    
    Change-Id: I197868d00a24719ce504a25fb81dc1577d2a214e
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index 4a1ef7cc89..c84539d0e3 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -16,5 +16,7 @@ int read_permanent_attributes(uint8_t *attributes, uint32_t size);
 int write_permanent_attributes(uint8_t *attributes, uint32_t size);
 int read_flash_lock_state(uint8_t *flash_lock_state);
 int write_flash_lock_state(uint8_t flash_lock_state);
+int read_lock_state(uint8_t *lock_state);
+int write_lock_state(uint8_t lock_state);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 1a00a47947..ac7d2263ca 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -410,3 +410,17 @@ int write_flash_lock_state(uint8_t flash_lock_state)
 		return -1;
 	return 0;
 }
+
+int read_lock_state(uint8_t *lock_state)
+{
+	if (trusty_read_lock_state(lock_state))
+		return -1;
+	return 0;
+}
+
+int write_lock_state(uint8_t lock_state)
+{
+	if (trusty_write_lock_state(lock_state))
+		return -1;
+	return 0;
+}

commit 7bc1707d3f3ba59b12ea6ed915e47e2b1099cd2e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 15:13:28 2017 +0800

    fastboot: support fastboot flashing lock/unlock
    
    The new fastboot cmd add the lock/unlock state.
    If the device is lock, fastboot can not flash
    the device. The fastboot flash just can flash
    the device if the device is unlock.
    
    Change-Id: Ic1fb3a3c32c47f4c80e0e26c1b675b2d6a88c3f6
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 6d821eb1ee..9de1731947 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -776,7 +776,18 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
 	char response[FASTBOOT_RESPONSE_LEN];
+#ifdef CONFIG_AVB_LIBAVB_USER
+	uint8_t flash_lock_state;
 
+	if (read_flash_lock_state(&flash_lock_state))
+		fastboot_tx_write_str("FAIL");
+		return;
+	if (flash_lock_state == 0) {
+		fastboot_tx_write_str("FAILThe device is locked, can not flash!");
+		printf("The device is locked, can not flash!\n");
+		return;
+	}
+#endif
 	strsep(&cmd, ":");
 	if (!cmd) {
 		error("missing partition name");
@@ -802,9 +813,27 @@ static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
 	char *cmd = req->buf;
 
 	if (strncmp("lock", cmd + 9, 4) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t flash_lock_state;
+		flash_lock_state = 0;
+		if (write_flash_lock_state(flash_lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("unlock", cmd + 9, 6) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		uint8_t flash_lock_state;
+		flash_lock_state = 1;
+		if (write_flash_lock_state(flash_lock_state))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else if (strncmp("lock_critical", cmd + 9, 12) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("unlock_critical", cmd + 9, 14) == 0) {

commit 023e4d551636cf1836ff99cae4af36db9b38556c
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:50:37 2017 +0800

    avb: provide read-write flash_lock_state functions for fastboot
    
    Change-Id: Id6135c58416b0b914d2de8b5d911bf9eb02c5c60
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index c3b725fe9d..4a1ef7cc89 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -14,5 +14,7 @@ int set_slot_active(unsigned int *slot_number);
 int get_current_slot(char *select_slot);
 int read_permanent_attributes(uint8_t *attributes, uint32_t size);
 int write_permanent_attributes(uint8_t *attributes, uint32_t size);
+int read_flash_lock_state(uint8_t *flash_lock_state);
+int write_flash_lock_state(uint8_t flash_lock_state);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index 0f6df5ba32..1a00a47947 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -396,3 +396,17 @@ int write_permanent_attributes(uint8_t *attributes, uint32_t size)
 
 	return 0;
 }
+
+int read_flash_lock_state(uint8_t *flash_lock_state)
+{
+	if (trusty_read_flash_lock_state(flash_lock_state))
+		return -1;
+	return 0;
+}
+
+int write_flash_lock_state(uint8_t flash_lock_state)
+{
+	if (trusty_write_flash_lock_state(flash_lock_state))
+		return -1;
+	return 0;
+}

commit ccc0859168ef2fcf0d6253fd753539b5a3e0c84f
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:45:33 2017 +0800

    tipc: add read/write flashing lock state
    
    The new fastboot cmd need to store the flashing
    lock state in order to prevent flash. And the state
    is stored in rpmb. So the tipc provide the functions
    to read/write the flash_lock_state.
    
    Change-Id: Idf6eb7de7aff1b3257fcd70d0fc87ac7634de4d0
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/optee_include/OpteeClientTest.h b/include/optee_include/OpteeClientTest.h
index e7e63ef042..00b3599ab2 100644
--- a/include/optee_include/OpteeClientTest.h
+++ b/include/optee_include/OpteeClientTest.h
@@ -4,6 +4,9 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
+#ifndef _OPTEECLIENTTEST_H_
+#define _OPTEECLIENTTEST_H_
+
 void test_optee(void);
 uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
 uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
@@ -11,6 +14,10 @@ uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
 uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size);
 uint32_t trusty_read_lock_state(uint8_t *lock_state);
 uint32_t trusty_write_lock_state(uint8_t lock_state);
+uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state);
+uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state);
 uint32_t write_to_keymaster
 	(uint8_t *filename, uint32_t filename_size,
 	uint8_t *data, uint32_t data_size);
+
+#endif
diff --git a/lib/optee_clientApi/OpteeClientTest.c b/lib/optee_clientApi/OpteeClientTest.c
index 791ac3a361..382d3299f5 100644
--- a/lib/optee_clientApi/OpteeClientTest.c
+++ b/lib/optee_clientApi/OpteeClientTest.c
@@ -518,6 +518,143 @@ uint32_t trusty_write_lock_state(uint8_t lock_state)
 	return TeecResult;
 }
 
+uint32_t trusty_read_flash_lock_state(uint8_t *flash_lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("flash_lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy(flash_lock_state, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+
+uint32_t trusty_write_flash_lock_state(uint8_t flash_lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("flash_lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "flash_lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, &flash_lock_state, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
 uint32_t write_to_keymaster(uint8_t *filename,
 		uint32_t filename_size,
 		uint8_t *data,

commit 4f3cd37c6062b594801b5c2fe35d26a60c7a0219
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:38:41 2017 +0800

    fastboot: support fastboot oem fuse at-perm-attr
    
    Change-Id: I82631a9edb69bd100bd676120fd07fbddbf34a2a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 431e5fb3ff..6d821eb1ee 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -850,7 +850,16 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
 	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		if (write_permanent_attributes((uint8_t *)
+					       CONFIG_FASTBOOT_BUF_ADDR,
+					       download_bytes))
+			fastboot_tx_write_str("FAIL");
+		else
+			fastboot_tx_write_str("OKAY");
+#else
 		fastboot_tx_write_str("FAILnot implemented");
+#endif
 	} else {
 		fastboot_tx_write_str("FAILunknown oem command");
 	}

commit b71a2499bf8d56899f589b25b8da9a32ec106f21
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Oct 12 14:29:51 2017 +0800

    avb: provide some functions used by fastboot
    
    In the avb process, the pub_key must be verified
    by some permanent attributes.The permanent attributes
    is written by fastboot. So the write_permanent_attributes
    function is provided to write permanent attributes.
    the read_permanent_attributes functions is provided to
    verified the data.
    
    Change-Id: Ib448c31062e34ce7f15fc32ab141793755bacf8a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
index e6247bf656..c3b725fe9d 100644
--- a/include/android_avb/avb_ops_user.h
+++ b/include/android_avb/avb_ops_user.h
@@ -12,5 +12,7 @@ int read_slot_count(char *slot_count);
 int read_slot_suffixes(char *slot_suffixes);
 int set_slot_active(unsigned int *slot_number);
 int get_current_slot(char *select_slot);
+int read_permanent_attributes(uint8_t *attributes, uint32_t size);
+int write_permanent_attributes(uint8_t *attributes, uint32_t size);
 
 #endif
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index d4954a6a93..0f6df5ba32 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -379,7 +379,20 @@ int get_current_slot(char *select_slot)
 	return 0;
 }
 
+int read_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	if(trusty_read_permanent_attributes(attributes, size) != 0) {
+		return -1;
+	}
 
+	return 0;
+}
 
+int write_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	if(trusty_write_permanent_attributes(attributes, size) != 0) {
+		return -1;
+	}
 
-
+	return 0;
+}

commit 367cce4d64c5c63186fe56f729d0f5a3ae353669
Author: Xu Hongfei <xuhf@rock-chips.com>
Date:   Mon Sep 11 19:31:12 2017 +0800

    fastboot: add some new functions
    
    1.add the support of 'set_active' command
    2.add the support of 'get_staged' command
    3.parse the command of 'oem' and 'flashing'
    
    Change-Id: Ib890a938adfb65f537f5e1e2d5ae8055cc99073c
    Signed-off-by: Xu Hongfei <xuhf@rock-chips.com>

diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index a5c460b999..431e5fb3ff 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -21,6 +21,7 @@
 #include <linux/compiler.h>
 #include <version.h>
 #include <g_dnl.h>
+#include <android_avb/avb_ops_user.h>
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 #include <fb_mmc.h>
 #endif
@@ -61,6 +62,9 @@ static inline struct f_fastboot *func_to_fastboot(struct usb_function *f)
 static struct f_fastboot *fastboot_func;
 static unsigned int download_size;
 static unsigned int download_bytes;
+static unsigned int upload_size;
+static unsigned int upload_bytes;
+static bool start_upload;
 
 static struct usb_endpoint_descriptor fs_ep_in = {
 	.bLength            = USB_DT_ENDPOINT_SIZE,
@@ -416,6 +420,98 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req)
 			strncat(response, s, chars_left);
 		else
 			strcpy(response, "FAILValue not set");
+	} else if (strncmp("at-attest-dh", cmd, 12) == 0) {
+		char dh[32] = {0};
+
+		strncat(response, dh, chars_left);
+	} else if (strncmp("at-attest-uuid", cmd, 14) == 0) {
+		char uuid[32] = {0};
+
+		strncat(response, uuid, chars_left);
+	} else if (strncmp("at-vboot-state", cmd, 14) == 0) {
+		char uuid[32] = {0};
+
+		strncat(response, uuid, chars_left);
+	} else if (!strcmp_l1("slot-count", cmd)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char slot_count[2];
+		char temp;
+
+		slot_count[1] = '\0';
+		read_slot_count(&temp);
+		slot_count[0] = temp + 0x30;
+		strncat(response, slot_count, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strcmp_l1("current-slot", cmd)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char slot_surrent[8] = {0};
+
+		if (!get_current_slot(slot_surrent))
+			strncat(response, slot_surrent, chars_left);
+		else
+			strcpy(response, "FAILgeterror");
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strcmp_l1("slot-suffixes", cmd)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char slot_suffixes_temp[4];
+		char slot_suffixes[9];
+		int slot_cnt = 0;
+
+		memset(slot_suffixes_temp, 0, 4);
+		memset(slot_suffixes, 0, 9);
+		read_slot_suffixes(slot_suffixes_temp);
+		while (slot_suffixes_temp[slot_cnt] != '\0') {
+			slot_suffixes[slot_cnt * 2]
+				= slot_suffixes_temp[slot_cnt];
+			slot_suffixes[slot_cnt * 2 + 1] = ',';
+			slot_cnt++;
+		}
+		strncat(response, slot_suffixes, chars_left);
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("has-slot", cmd, 8)) {
+#ifdef CONFIG_AVB_LIBAVB_USER
+		char *part_name = cmd;
+
+		cmd = strsep(&part_name, ":");
+		if (!strcmp(part_name, "boot") ||
+		    !strcmp(part_name, "system") ||
+		    !strcmp(part_name, "boot")) {
+			strncat(response, "yes", chars_left);
+		} else {
+			strcpy(response, "FAILno");
+		}
+#else
+		fastboot_tx_write_str("FAILnot implemented");
+		return;
+#endif
+	} else if (!strncmp("partition-type", cmd, 14) ||
+		   !strncmp("partition-size", cmd, 14)) {
+		disk_partition_t part_info;
+		struct blk_desc *dev_desc;
+		char *part_name = cmd;
+		char part_size_str[20];
+
+		cmd = strsep(&part_name, ":");
+		dev_desc = blk_get_dev("mmc", 0);
+		if (!dev_desc) {
+			strcpy(response, "FAILblock device not found");
+		} else if (part_get_info_by_name(dev_desc, part_name, &part_info) < 0) {
+			strcpy(response, "FAILpartition not found");
+		} else if (!strncmp("partition-type", cmd, 14)) {
+			strncat(response, (char *)part_info.type, chars_left);
+		} else if (!strncmp("partition-size", cmd, 14)) {
+			sprintf(part_size_str, "0x%016x", (int)part_info.size);
+			strncat(response, part_size_str, chars_left);
+		}
 	} else {
 		char *envstr;
 
@@ -536,6 +632,78 @@ static void cb_download(struct usb_ep *ep, struct usb_request *req)
 		req->complete = rx_handler_dl_image;
 		req->length = rx_bytes_expected(ep);
 	}
+
+	fastboot_tx_write_str(response);
+}
+
+static void tx_handler_ul(struct usb_ep *ep, struct usb_request *req)
+{
+	unsigned int xfer_size = 0;
+	unsigned int pre_dot_num, now_dot_num;
+	unsigned int remain_size = 0;
+	unsigned int transferred_size = req->actual;
+
+	if (req->status != 0) {
+		printf("Bad status: %d\n", req->status);
+		return;
+	}
+
+	if (start_upload) {
+		pre_dot_num = upload_bytes / BYTES_PER_DOT;
+		upload_bytes += transferred_size;
+		now_dot_num = upload_bytes / BYTES_PER_DOT;
+
+		if (pre_dot_num != now_dot_num) {
+			putc('.');
+			if (!(now_dot_num % 74))
+				putc('\n');
+		}
+	}
+
+	remain_size = upload_size - upload_bytes;
+	xfer_size = (remain_size > EP_BUFFER_SIZE) ?
+		    EP_BUFFER_SIZE : remain_size;
+
+	debug("%s: remain_size=%d, transferred_size=%d",
+	      __func__, remain_size, transferred_size);
+	debug("xfer_size=%d, upload_bytes=%d, upload_size=%d!\n",
+	      xfer_size, upload_bytes, upload_size);
+
+	if (remain_size <= 0) {
+		fastboot_func->in_req->complete = fastboot_complete;
+		fastboot_tx_write_str("OKAY");
+		printf("\nuploading of %d bytes finished\n", upload_bytes);
+		upload_bytes = 0;
+		upload_size = 0;
+		start_upload = false;
+		return;
+	}
+
+	/* Remove the transfer callback which response the upload */
+	/* request from host */
+	if (!upload_bytes)
+		start_upload = true;
+
+	fastboot_tx_write((char *)(CONFIG_FASTBOOT_BUF_ADDR + upload_bytes),
+			  xfer_size);
+}
+
+static void cb_upload(struct usb_ep *ep, struct usb_request *req)
+{
+	char response[FASTBOOT_RESPONSE_LEN];
+
+	upload_size = download_bytes;
+
+	printf("Starting upload of %d bytes\n", upload_size);
+
+	if (0 == upload_size) {
+		strcpy(response, "FAILdata invalid size");
+	} else {
+		start_upload = false;
+		sprintf(response, "DATA%08x", upload_size);
+		fastboot_func->in_req->complete = tx_handler_ul;
+	}
+
 	fastboot_tx_write_str(response);
 }
 
@@ -570,6 +738,39 @@ static void cb_continue(struct usb_ep *ep, struct usb_request *req)
 	fastboot_tx_write_str("OKAY");
 }
 
+static void cb_set_active(struct usb_ep *ep, struct usb_request *req)
+{
+	char *cmd = req->buf;
+
+	debug("%s: %s\n", __func__, cmd);
+
+	strsep(&cmd, ":");
+	if (!cmd) {
+		error("missing slot name");
+		fastboot_tx_write_str("FAIL: missing slot name");
+		return;
+	}
+#ifdef CONFIG_AVB_LIBAVB_USER
+	unsigned int slot_number;
+	if (strncmp("a", cmd, 1) == 0) {
+		slot_number = 0;
+		set_slot_active(&slot_number);
+	} else if (strncmp("b", cmd, 1) == 0) {
+		slot_number = 1;
+		set_slot_active(&slot_number);
+	} else {
+		fastboot_tx_write_str("FAIL: unkown slot name");
+		return;
+	}
+
+	fastboot_tx_write_str("OKAY");
+	return;
+#else
+	fastboot_tx_write_str("FAILnot implemented");
+	return;
+#endif
+}
+
 #ifdef CONFIG_FASTBOOT_FLASH
 static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 {
@@ -596,9 +797,35 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 }
 #endif
 
+static void cb_flashing(struct usb_ep *ep, struct usb_request *req)
+{
+	char *cmd = req->buf;
+
+	if (strncmp("lock", cmd + 9, 4) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("unlock", cmd + 9, 6) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("lock_critical", cmd + 9, 12) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("unlock_critical", cmd + 9, 14) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("get_unlock_ability", cmd + 9, 17) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("get_unlock_bootloader_nonce", cmd + 4, 27) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("unlock_bootloader", cmd + 9, 17) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("lock_bootloader", cmd + 9, 15) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else {
+		fastboot_tx_write_str("FAILunknown flashing command");
+	}
+}
+
 static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 {
 	char *cmd = req->buf;
+
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	if (strncmp("format", cmd + 4, 6) == 0) {
 		char cmdbuf[32];
@@ -612,8 +839,19 @@ static void cb_oem(struct usb_ep *ep, struct usb_request *req)
 #endif
 	if (strncmp("unlock", cmd + 4, 8) == 0) {
 		fastboot_tx_write_str("FAILnot implemented");
-	}
-	else {
+	} else if (strncmp("at-get-ca-request", cmd + 4, 17) == 0) {
+		fastboot_tx_write_str("OKAY");
+	} else if (strncmp("at-set-ca-response", cmd + 4, 18) == 0) {
+		fastboot_tx_write_str("OKAY");
+	} else if (strncmp("at-lock-vboot", cmd + 4, 13) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("at-unlock-vboot", cmd + 4, 15) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("at-disable-unlock-vboot", cmd + 4, 23) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else if (strncmp("fuse at-perm-attr", cmd + 4, 16) == 0) {
+		fastboot_tx_write_str("FAILnot implemented");
+	} else {
 		fastboot_tx_write_str("FAILunknown oem command");
 	}
 }
@@ -657,14 +895,24 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = {
 	}, {
 		.cmd = "download:",
 		.cb = cb_download,
+	}, {
+		.cmd = "upload",
+		.cb = cb_upload,
 	}, {
 		.cmd = "boot",
 		.cb = cb_boot,
 	}, {
 		.cmd = "continue",
 		.cb = cb_continue,
+	}, {
+		.cmd = "set_active",
+		.cb = cb_set_active,
 	},
 #ifdef CONFIG_FASTBOOT_FLASH
+	{
+		.cmd = "flashing",
+		.cb = cb_flashing,
+	},
 	{
 		.cmd = "flash",
 		.cb = cb_flash,

commit aa8829ac3748e8f11247872e028bf8107f59fd1a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Oct 13 09:05:25 2017 +0800

    rockchip: dts: add 4GB ddr3 support for rk3399
    
    Change-Id: Ib268f96cc82e8e885c3554786d14c4b78881dfd8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
new file mode 100644
index 0000000000..745e2a5f2e
--- /dev/null
+++ b/arch/arm/dts/rk3399-sdram-ddr3-4G-1600.dtsi
@@ -0,0 +1,1536 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&dmc {
+        rockchip,sdram-params = <
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
+		0xf
+		1
+		0x80151015
+		0x14040902
+		0x00000002
+		0x00006346
+		0x0000004c
+		0x00000000
+		0x2
+		0xa
+		0x3
+		0x2
+		0x1
+		0x0
+		0xf
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+		0x00020055
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+		0x00010100
+		0x00000601
+		0x00000000
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+		0x01221102
+		0x00000000
+		0x00031f00
+		0x031f031f
+		0x031f031f
+		0x00030003
+		0x03000300
+		0x00000300
+		0x01221102
+		0x00000000
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+		0x03020000
+		0x00000001
+		0x00008011
+		0x00000011
+		0x00000440
+		0x00000040
+		0x00004011
+		0x00004011
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+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004410
+		0x00004011
+		0x00004410
+		0x00004011
+		0x00004410
+		0x00004011
+		0x00004410
+		0x00000000
+		0x00000000
+		0x00000000
+		0x04000000
+		0x00000000
+		0x00000000
+		0x00000508
+		0x00000000
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+		0x00000000
+		0x00000000
+		0xe4000000
+		0x00000000
+		0x00000000
+		0x01010000
+		0x00000000
+	>;
+};

commit 99e29a1e831319b7af621cf13ab45f58a3158e97
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 12 14:49:29 2017 +0800

    rockchip: rk3399-evb: add boot order for SPL
    
    add boot order for rk3399 evb/excavator/sapphire borad.
    
    Change-Id: I97c17a96e2a79fc3cc2b97f1a2b23bfb4e35c6a4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 0e5d8d79a1..a0ea589015 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -17,6 +17,7 @@
 
 	chosen {
 		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sdhci, &sdmmc;
 	};
 
 	vdd_center: vdd-center {

commit f0864c7f9d9e35368339ead29f68dc800219673d
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 20 15:24:54 2017 +0800

    androidboot: init slot_partition
    
    Change-Id: I1be603307523d245ef8961815a0df38786366d0d
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index aac7563692..49ed44e2aa 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -581,7 +581,7 @@ int do_avb_verify_partition(cmd_tbl_t *cmdtp, int flag,
 
 int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	char slot_partition[2][20];
+	char slot_partition[2][20] = {{0}, {0}};
 	unsigned long load_address;
 	AvbOps *ops;
 	const char *avb_version;

commit e8e29e8d8b70fc092891ebc18d0488d061d26c38
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 18 09:37:32 2017 +0800

    androidboot: add new android boot cmds with avb.
    
    The android things boot must have avb function,
    then we add the fuction in file cmd/boot_android.c.
    In boot_android.c, we add bootavb flow v/n to
    bootload android system.
    
    The bootavb flow v bootload android system
    with avb.And bootavb flow n bootload android
    system as usual.
    
    Change-Id: I3064f8a4aebf2b4bfdb0cf6f0458f42438c27027
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 0da6a7d056..aac7563692 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -5,8 +5,13 @@
  */
 
 #include <android_bootloader.h>
+#include <android_avb/avb_version.h>
+#include <android_avb/avb_ab_flow.h>
+#include <android_avb/avb_ops_user.h>
 #include <android_cmds.h>
+#include <malloc.h>
 #include <common.h>
+#include <bootm.h>
 #include <command.h>
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
@@ -67,3 +72,671 @@ U_BOOT_CMD(
 	"      partition name whose label is 'part_name' will be looked up in\n"
 	"      the partition table. This is commonly the \"misc\" partition.\n"
 );
+
+#ifdef CONFIG_AVB_LIBAVB_USER
+int do_avb_init_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	memset(&ab_data, 0, sizeof(AvbABData));
+	debug("sizeof(AvbABData) = %d\n", sizeof(AvbABData));
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	ops->ab_ops->init_ab_metadata(&ab_data);
+	debug("init");
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_init_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_version(cmd_tbl_t *cmdtp, int flag, int argc,
+		   char * const argv[])
+{
+	const char *avb_version;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	avb_version = avb_version_string();
+	printf("Android avb version is %s.\n", avb_version);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_ab_mark_slot_active(cmd_tbl_t *cmdtp, int flag,
+			       int argc, char * const argv[])
+{
+	AvbOps *ops;
+	unsigned int slot_number;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_active(ops->ab_ops, slot_number) != 0) {
+		printf("avb_ab_mark_slot_active error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_ab_mark_slot_unbootable(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
+{
+	AvbOps *ops;
+	unsigned int slot_number;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_unbootable(ops->ab_ops, slot_number) != 0) {
+		printf("do_avb_ab_mark_slot_unbootable error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_ab_mark_slot_successful(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
+{
+	AvbOps *ops;
+	unsigned int slot_number;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	slot_number = simple_strtoul(argv[1], NULL, 16);
+	if (avb_ab_mark_slot_successful(ops->ab_ops, slot_number) != 0) {
+		printf("do_avb_ab_mark_slot_successful error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read_rollback_index(cmd_tbl_t *cmdtp, int flag,
+			       int argc, char * const argv[])
+{
+	AvbOps *ops;
+	uint64_t out_rollback_index;
+	size_t rollback_index_location;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	rollback_index_location = simple_strtoul(argv[1], NULL, 16);
+	if (ops->read_rollback_index(ops, rollback_index_location,
+				     &out_rollback_index) != 0) {
+		printf("do_avb_read_rollback_index error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	printf("out_rollback_index = %llx\n", out_rollback_index);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_write_rollback_index(cmd_tbl_t *cmdtp, int flag,
+				int argc, char * const argv[])
+{
+	AvbOps *ops;
+	uint64_t out_rollback_index;
+	size_t rollback_index_location;
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	rollback_index_location = simple_strtoul(argv[1], NULL, 16);
+	out_rollback_index = simple_strtoull(argv[2], NULL, 16);
+	debug("out_rollback_index = %llx\n", out_rollback_index);
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->write_rollback_index(ops, rollback_index_location,
+				      out_rollback_index) != 0) {
+		printf("do_avb_write_rollback_index error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
+				   int argc, char * const argv[])
+{
+	AvbOps *ops;
+	bool out_is_unlocked;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->read_is_device_unlocked(ops, &out_is_unlocked) != 0) {
+		printf("do_avb_read_is_device_unlocked error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	debug("out_is_unlocked = %d\n", out_is_unlocked);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+int do_avb_write_is_device_unlocked(cmd_tbl_t *cmdtp, int flag,
+				    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	bool out_is_unlocked;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	out_is_unlocked = simple_strtoul(argv[1], NULL, 16);
+	if ((out_is_unlocked != 0) || (out_is_unlocked != 1))
+		printf("enter out_is_unlocked value must is '0' or '1'\n");
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->write_is_device_unlocked(ops, &out_is_unlocked) != 0) {
+		printf("do_avb_write_is_device_unlocked error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	debug("out_is_unlocked = %d\n", out_is_unlocked);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_get_size_of_partition(cmd_tbl_t *cmdtp, int flag,
+				 int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	uint64_t out_size_in_bytes;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->get_size_of_partition(ops, requested_partitions,
+				       &out_size_in_bytes) != 0) {
+		printf("do_avb_get_size_of_partition error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	printf("partition size = %lld\n", out_size_in_bytes);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_get_get_unique_guid_for_partition(cmd_tbl_t *cmdtp, int flag,
+					     int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	size_t guid_buf_size = 37;
+	char guid_buf[37];
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->get_unique_guid_for_partition(ops, requested_partitions,
+					       guid_buf, guid_buf_size) != 0) {
+		printf("do_avb_get_get_unique_guid_for_partition error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	printf("guid = %s\n", guid_buf);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	int64_t offset_blk;
+	size_t blkcnt;
+	size_t out_num_read;
+	int i;
+	char *buffer;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	offset_blk = simple_strtoul(argv[2], NULL, 16);
+	blkcnt = simple_strtoul(argv[3], NULL, 16);
+	ops = avb_ops_user_new();
+	buffer = (char *)malloc(blkcnt * 512);
+	if (buffer == NULL)
+		printf("malloc buffer failed!\n");
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->read_from_partition(ops, requested_partitions,
+				     offset_blk, blkcnt, buffer,
+				     &out_num_read) != 0) {
+		printf("do avb read error!\n");
+		free(buffer);
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	for (i = 0; i < 512 * blkcnt; i++)
+		printf("buffer %d = %d\n", i, buffer[i]);
+
+	free(buffer);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	AvbOps *ops;
+	char *requested_partitions;
+	int64_t offset_blk;
+	size_t blkcnt;
+	size_t out_num_read;
+	char *buffer;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	requested_partitions = argv[1];
+	offset_blk = simple_strtoul(argv[2], NULL, 16);
+	blkcnt = simple_strtoul(argv[3], NULL, 16);
+	ops = avb_ops_user_new();
+	buffer = (char *)malloc(blkcnt * 512);
+	if (buffer == NULL) {
+		printf("malloc buffer failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+	if (ops->read_from_partition(ops, requested_partitions, offset_blk,
+				     blkcnt, buffer, &out_num_read) != 0) {
+		printf("do_avb_write error!\n");
+		free(buffer);
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	free(buffer);
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_load_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data, ab_data_orig;
+	char *data;
+	int i;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (load_metadata(ops->ab_ops, &ab_data, &ab_data_orig) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	data = (char *)&ab_data;
+	for (i = 0; i < 33; i++)
+		printf("%d\n", data[i]);
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_read_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->ab_ops->read_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_write_ab_metadata(cmd_tbl_t *cmdtp, int flag,
+			     int argc, char * const argv[])
+{
+	AvbOps *ops;
+	AvbABData ab_data;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (ops->ab_ops->write_ab_metadata(ops->ab_ops, &ab_data) != 0) {
+		printf("do_avb_write_ab_metadata error!\n");
+		avb_ops_user_free(ops);
+		return CMD_RET_FAILURE;
+	}
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_verify_partition(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	AvbOps *ops;
+	const char *requested_partitions[1];
+	const char * slot_suffixes[2] = {"_a", "_b"};
+	AvbSlotVerifyFlags flags;
+	AvbSlotVerifyData *slot_data[2] = {NULL, NULL};
+	AvbSlotVerifyResult verify_result;
+	size_t n;
+
+	if (argc != 3)
+		return CMD_RET_USAGE;
+
+	requested_partitions[0] = argv[1];
+	n = simple_strtoul(argv[2], NULL, 16);
+	ops = avb_ops_user_new();
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	verify_result =
+		avb_slot_verify(ops,
+				requested_partitions,
+				slot_suffixes[n],
+				flags,
+				AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+				&slot_data[n]);
+	if (verify_result != 0)
+		return CMD_RET_FAILURE;
+
+	avb_ops_user_free(ops);
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_avb_flow(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	char slot_partition[2][20];
+	unsigned long load_address;
+	AvbOps *ops;
+	const char *avb_version;
+	AvbSlotVerifyData *slot_data;
+	AvbSlotVerifyFlags flags;
+	const char *requested_partitions[] = {"boot", "system", NULL};
+	char *command_line;
+	bool unlocked = true;
+	const char *mode_cmdline = NULL;
+	char root_data[70] = "root=PARTUUID=";
+	mode_cmdline = "skip_initramfs";
+	size_t guid_buf_size = 37;
+	char guid_buf[37];
+	char verify_flag;
+	char boot_slot_select[5];
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+	avb_version = avb_version_string();
+	printf("Android avb version is %s.\n", avb_version);
+	ops = avb_ops_user_new();
+	if (ops == NULL)
+		printf("avb_ops_user_new() failed!\n");
+
+	if (ops->read_is_device_unlocked(ops, &unlocked) != 0)
+		printf("Error determining whether device is unlocked.\n");
+
+	printf("read_is_device_unlocked() ops returned that device is %s\n",
+	       unlocked ? "UNLOCKED" : "LOCKED");
+
+	flags = AVB_SLOT_VERIFY_FLAGS_NONE;
+	if (unlocked)
+		flags |= AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR;
+
+	verify_flag = argv[1][0];
+	if (verify_flag == 'v') {
+		debug("start with verify!\n");
+		avb_ab_flow(ops->ab_ops,
+			    requested_partitions,
+			    flags,
+			    AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+			    &slot_data);
+		strcat(slot_partition[1], requested_partitions[1]);
+		strcat(slot_partition[1], slot_data->ab_suffix);
+		ops->get_unique_guid_for_partition(ops,
+						   slot_partition[1],
+						   guid_buf,
+						   guid_buf_size);
+		strcat(root_data, guid_buf);
+		command_line = android_assemble_cmdline(slot_data->ab_suffix,
+							mode_cmdline);
+		strcat(root_data, " ");
+		strcat(root_data, command_line);
+		env_set("bootargs", root_data);
+		load_address = CONFIG_SYS_LOAD_ADDR;
+		memcpy((uint8_t*)load_address,
+		       slot_data->loaded_partitions->data,
+		       slot_data->loaded_partitions->data_size);
+		android_bootloader_boot_kernel(load_address);
+		avb_slot_verify_data_free(slot_data);
+		avb_ops_user_free(ops);
+	} else if (verify_flag == 'n') {
+		load_address = CONFIG_SYS_LOAD_ADDR;
+		avb_ab_slot_select(ops->ab_ops, boot_slot_select);
+		strcat(slot_partition[1], requested_partitions[1]);
+		strcat(slot_partition[1], boot_slot_select);
+		printf("%s\n", slot_partition[1]);
+		ops->get_unique_guid_for_partition(ops,
+						   slot_partition[1],
+						   guid_buf,
+						   guid_buf_size);
+		strcat(root_data, guid_buf);
+		command_line = android_assemble_cmdline(boot_slot_select,
+							mode_cmdline);
+		strcat(root_data, " ");
+		strcat(root_data, command_line);
+		env_set("bootargs", root_data);
+		android_avb_boot_flow(boot_slot_select, load_address);
+	} else {
+		return CMD_RET_USAGE;
+	}
+
+	return CMD_RET_SUCCESS;
+}
+
+static cmd_tbl_t cmd_avb[] = {
+	U_BOOT_CMD_MKENT(init, 1, 1, do_avb_init_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(version, 1, 1, do_avb_version, "", ""),
+	U_BOOT_CMD_MKENT(slot_active, 2, 1,
+			 do_avb_ab_mark_slot_active, "", ""),
+	U_BOOT_CMD_MKENT(slot_unbootable, 2, 1,
+			 do_avb_ab_mark_slot_unbootable, "", ""),
+	U_BOOT_CMD_MKENT(slot_successful, 2, 1,
+			 do_avb_ab_mark_slot_successful, "", ""),
+	U_BOOT_CMD_MKENT(read_rollback, 2, 1,
+			 do_avb_read_rollback_index, "", ""),
+	U_BOOT_CMD_MKENT(write_rollback, 3, 1,
+			 do_avb_write_rollback_index, "", ""),
+	U_BOOT_CMD_MKENT(read_lock_status, 1, 1,
+			 do_avb_read_is_device_unlocked, "", ""),
+	U_BOOT_CMD_MKENT(write_lock_status, 2, 1,
+			 do_avb_write_is_device_unlocked, "", ""),
+	U_BOOT_CMD_MKENT(part_size, 2, 1,
+			 do_avb_get_size_of_partition, "", ""),
+	U_BOOT_CMD_MKENT(part_guid, 2, 1,
+			 do_avb_get_get_unique_guid_for_partition, "", ""),
+	U_BOOT_CMD_MKENT(read, 4, 1, do_avb_read, "", ""),
+	U_BOOT_CMD_MKENT(write, 4, 1, do_avb_write, "", ""),
+	U_BOOT_CMD_MKENT(loadabmisc, 1, 1, do_avb_load_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(readabmisc, 1, 1, do_avb_read_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(writeabmisc, 1, 1, do_avb_write_ab_metadata, "", ""),
+	U_BOOT_CMD_MKENT(verify, 3, 1, do_avb_verify_partition, "", ""),
+	U_BOOT_CMD_MKENT(flow, 2, 1, do_avb_flow, "", "")
+};
+
+static int do_boot_avb(cmd_tbl_t *cmdtp,
+		       int flag,
+		       int argc,
+		       char * const argv[])
+{
+	cmd_tbl_t *cp;
+
+	cp = find_cmd_tbl(argv[1], cmd_avb, ARRAY_SIZE(cmd_avb));
+
+	argc--;
+	argv++;
+
+	if (cp == NULL || argc > cp->maxargs)
+		return CMD_RET_USAGE;
+	if (flag == CMD_FLAG_REPEAT && !cp->repeatable)
+		return CMD_RET_SUCCESS;
+
+	return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(
+	bootavb, 29, 1, do_boot_avb,
+	"Execute the Android avb a/b boot flow.",
+	"init - initialize the avbabmeta\n"
+	"bootavb version - display info of bootavb version\n"
+	"bootavb slot_active cnt\n"
+	"bootavb slot_unbootable cnt\n"
+	"bootavb slot_successful cnt\n"
+	"bootavb read_rollback rollback_index_location\n"
+	"bootavb write_rollback rollback_index_location out_rollback_index\n"
+	"bootavb read_lock_status\n"
+	"bootavb write_lock_status 0 or 1\n"
+	"bootavb part_size partitions_name\n"
+	"bootavb part_guid partitions_name\n"
+	"bootavb read partition offset_blk cnt\n"
+	"bootavb write partition offset_blk cnt\n"
+	"bootavb loadabmisc\n"
+	"bootavb readabmisc\n"
+	"bootavb writeabmisc\n"
+	"bootavb verify partition slot_cnt;partion name without '_a' or '_b'\n"
+	"bootavb flow v/n\n"
+);
+#endif

commit 2d07abe11162ee250d26ea79314259c3f2c79bce
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 18 09:00:49 2017 +0800

    tipc: change the tipc compile conditions
    
    Since the tipc is not used in tpl and
    spl, we just compile tipc and generate
    in u-boot.bin.
    
    Change-Id: Id2845aef127d209c8243cb4cfee8dfbd04ba1305
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/Makefile b/lib/Makefile
index b3544d86c5..d242b7fe94 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_TPM) += tpm.o
 obj-$(CONFIG_RBTREE)	+= rbtree.o
 obj-$(CONFIG_BITREVERSE) += bitrev.o
 obj-y += list_sort.o
+obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/rk_libavb/
@@ -50,8 +51,6 @@ obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
 obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/rk_libavb_user/
 
-obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
-
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o

commit de183ed0f19bff9c440c2dfb906531b702bfad65
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Mon Sep 18 08:45:36 2017 +0800

    android: declare some functions externally
    
    In file boot_android.c, we use some functions
    belong to common/android_bootloader.c. BUt these
    functions attribute are static. So we modify these
    functions used in the boot_android.c.
    
    And android_avb_boot_flow is added to boot a/b
    android system.
    
    Change-Id: I3ebc0a6fb24691ab1a0f8475220e16ca633412f1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index fbfe3de50c..1f92f00d74 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -157,7 +157,7 @@ static int android_bootloader_boot_bootloader(void)
 	return -1;
 }
 
-static int android_bootloader_boot_kernel(unsigned long kernel_address)
+int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char kernel_addr_str[12];
 	char *fdt_addr = env_get("fdt_addr");
@@ -209,7 +209,7 @@ static char *strjoin(const char **chunks, char separator)
 /** android_assemble_cmdline - Assemble the command line to pass to the kernel
  * @return a newly allocated string
  */
-static char *android_assemble_cmdline(const char *slot_suffix,
+char *android_assemble_cmdline(const char *slot_suffix,
 				      const char *extra_args)
 {
 	const char *cmdline_chunks[16];
@@ -349,3 +349,29 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
 	return -1;
 }
+
+int android_avb_boot_flow(char *slot_suffix, unsigned long kernel_address)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t boot_part_info;
+	int ret;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+	/* Load the kernel from the desired "boot" partition. */
+	android_part_get_info_by_name_suffix(dev_desc,
+					     ANDROID_PARTITION_BOOT,
+					     slot_suffix, &boot_part_info);
+	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+				 -1UL);
+	if (ret < 0)
+		return ret;
+	android_bootloader_boot_kernel(kernel_address);
+
+	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
+	return -1;
+}
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index ddf6d76f64..ef072a9374 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -45,4 +45,32 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 const char *slot,
 				 unsigned long kernel_address);
 
+/** android_avb_boot_flow - Execute the Android Bootloader Flow.
+ * This fuction use to select and boot kernel through ab_suffix.
+ *
+ * @ab_suffix:		the boot slot to boot from.
+ * @kernel_address:	address where to load the kernel if needed.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_avb_boot_flow(char *ab_suffix, unsigned long kernel_address);
+
+/** android_assemble_cmdline - Assemble args for cmdline.
+ *
+ * @ab_suffix:		the boot slot to boot from.
+ * @extra_args:   	select the args to command line.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+char *android_assemble_cmdline(const char *slot_suffix,
+			       const char *extra_args);
+
+/** android_bootloader_boot_kernel- Execute the kernel boot.
+ *
+ * @kernel_address:	address where to load the kernel if needed.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_bootloader_boot_kernel(unsigned long kernel_address);
+
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 38de3d97e46fd624a3204db1184c598e4b8cfa81
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Sep 15 17:30:57 2017 +0800

    avb: add avb config to spl and tpl
    
    Change-Id: Idc5102e29c4b66acacda554f3c61903606314025
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/Makefile b/lib/Makefile
index b5199e5fbd..b3544d86c5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -45,10 +45,10 @@ obj-$(CONFIG_BITREVERSE) += bitrev.o
 obj-y += list_sort.o
 endif
 
-obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
-obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
-obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
-obj-$(CONFIG_AVB_LIBAVB_USER) += avb/rk_libavb_user/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB) += avb/rk_libavb/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_AB) += avb/rk_libavb_ab/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
+obj-$(CONFIG_$(SPL_TPL_)AVB_LIBAVB_USER) += avb/rk_libavb_user/
 
 obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 
diff --git a/lib/avb/rk_libavb/Kconfig b/lib/avb/rk_libavb/Kconfig
index c569909bdb..71c8be3610 100644
--- a/lib/avb/rk_libavb/Kconfig
+++ b/lib/avb/rk_libavb/Kconfig
@@ -4,3 +4,17 @@ config AVB_LIBAVB
 	  The new android bootloader need to startup
 	  with a/b and avb.This config can add the
 	  AVB functions to u-boot.
+
+config SPL_AVB_LIBAVB
+	bool "Support running U-Boot AVB for spl"
+	help
+	  The new android bootloader need to startup
+	  with a/b and avb.This config can add the
+	  AVB functions to u-boot.
+
+config TPL_AVB_LIBAVB
+	bool "Support running U-Boot AVB for tpl"
+	help
+	  The new android bootloader need to startup
+	  with a/b and avb.This config can add the
+	  AVB functions to u-boot.
diff --git a/lib/avb/rk_libavb_ab/Kconfig b/lib/avb/rk_libavb_ab/Kconfig
index ae1a8095f3..d4a0dc279a 100644
--- a/lib/avb/rk_libavb_ab/Kconfig
+++ b/lib/avb/rk_libavb_ab/Kconfig
@@ -1,7 +1,23 @@
 config AVB_LIBAVB_AB
 	bool "Choose the a/b system and flow"
 	help
-	  In the android things system, there are 
+	  In the android things system, there are
+	  _a and _b or more systems. So we have to
+	  choose the _a or _b system to startup.
+	  This libavb_ab can suport these functions.
+
+config SPL_AVB_LIBAVB_AB
+	bool "Choose the a/b system and flow for spl"
+	help
+	  In the android things system, there are
+	  _a and _b or more systems. So we have to
+	  choose the _a or _b system to startup.
+	  This libavb_ab can suport these functions.
+
+config TPL_AVB_LIBAVB_AB
+	bool "Choose the a/b system and flow for tpl"
+	help
+	  In the android things system, there are
 	  _a and _b or more systems. So we have to
 	  choose the _a or _b system to startup.
 	  This libavb_ab can suport these functions.
diff --git a/lib/avb/rk_libavb_atx/Kconfig b/lib/avb/rk_libavb_atx/Kconfig
index f191d4d8bc..1c168baeec 100644
--- a/lib/avb/rk_libavb_atx/Kconfig
+++ b/lib/avb/rk_libavb_atx/Kconfig
@@ -4,3 +4,17 @@ config AVB_LIBAVB_ATX
 	  Android Things requires specific public key
 	  metadata and verification logic to correctly
 	  verify vbmeta public keys.
+
+config SPL_AVB_LIBAVB_ATX
+	bool "support vbmeta public key verify for SPL"
+	help
+	  Android Things requires specific public key
+	  metadata and verification logic to correctly
+	  verify vbmeta public keys.
+
+config TPL_AVB_LIBAVB_ATX
+	bool "support vbmeta public key verify for TPL"
+	help
+	  Android Things requires specific public key
+	  metadata and verification logic to correctly
+	  verify vbmeta public keys.
diff --git a/lib/avb/rk_libavb_user/Kconfig b/lib/avb/rk_libavb_user/Kconfig
index f6b3ca3c30..c27412fcba 100644
--- a/lib/avb/rk_libavb_user/Kconfig
+++ b/lib/avb/rk_libavb_user/Kconfig
@@ -2,6 +2,22 @@ config AVB_LIBAVB_USER
 	bool "Android AVB read/write hardware"
 	help
 	  This config support the android things system to
-	  read/write hardware image, like vbmeta, misc, and 
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config SPL_AVB_LIBAVB_USER
+	bool "Android AVB read/write hardware for spl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
+
+config TPL_AVB_LIBAVB_USER
+	bool "Android AVB read/write hardware for tpl"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and
 	  so on. And it can provide some a/b and avb information
 	  to fastboot and kernel.

commit 844d3f39ae378293b1bde52c31006d8330937b46
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Fri Sep 15 15:45:05 2017 +0800

    libavb_user: add config depended on tipc
    
    In the avb_ops_user.c file, we use some
    functions provided by tipc, so excute the
    functions may depend on tipc. If the config
    is not enable, it may compile fail.
    
    Change-Id: I323f7e8d675407f2ec2f9f5358d1696b3b118880
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
index f16b0368a0..d4954a6a93 100644
--- a/lib/avb/rk_libavb_user/avb_ops_user.c
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -165,7 +165,9 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
                                        uint64_t *out_rollback_index)
 {
 	if (out_rollback_index != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
 		trusty_read_rollback_index(rollback_index_location, out_rollback_index);
+#endif
 	}
 	return AVB_IO_RESULT_OK;
 }
@@ -174,14 +176,18 @@ static AvbIOResult write_rollback_index(AvbOps *ops,
                                         size_t rollback_index_location,
                                         uint64_t rollback_index)
 {
+#ifdef CONFIG_OPTEE_CLIENT
 	trusty_write_rollback_index(rollback_index_location, rollback_index);
+#endif
 	return AVB_IO_RESULT_OK;
 }
 
 static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 {
 	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
 		trusty_read_lock_state((uint8_t *)out_is_unlocked);
+#endif
 	}
 	return AVB_IO_RESULT_OK;
 }
@@ -189,7 +195,9 @@ static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
 {
 	if (out_is_unlocked != NULL) {
+#ifdef CONFIG_OPTEE_CLIENT
 		trusty_write_lock_state(*out_is_unlocked);
+#endif
 	}
 	return AVB_IO_RESULT_OK;
 }

commit 10a4cc1b3594adac014937f333f203b3286ed055
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Sep 15 09:50:38 2017 +0800

    rockchip: enable USB_FUNCTION_ROCKUSB
    
    Change-Id: I851b16cad86e723739898ee9e6016271463953be
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e9504b2f30..84462f3b6a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1118,6 +1118,7 @@ config ARCH_ROCKCHIP
 	imply FASTBOOT
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT
+	imply USB_FUNCTION_ROCKUSB
 	imply SPL_SYSRESET
 	imply TPL_SYSRESET
 	imply ADC

commit f70bed31127ef0e39242d637fad8390ab30112dc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 14 16:52:13 2017 +0800

    rockchip: evb-rk3229: enable RPMB
    
    Change-Id: Id608ebf485b56349f4b7aea47d4077ec7f664ac4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index 129b4a53ba..a74303385d 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -14,6 +14,7 @@
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_SUPPORT_EMMC_RPMB
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */

commit 6c551138ca32fe8065f37a7a1dc1a0f3491313f1
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Thu Sep 14 09:29:35 2017 +0800

    avb: create avb function for user use
    
    The libavb_user provide some fuctions to get
    a/b and avb information from misc or vbmeta
    partitions, which can be use in libavb...
    
    It also can use to enable or disable the verification
    function by using avb_user_verity_set in the file
    avb_user_verify.c.
    
    Since we use fastboot to program our firmware,
    some necessary function is provided to fastboot
    to get useful information, like slot number, current
    slot and so on.
    
    Some functions in the avb_ops_user.c, like read_rollback_index,
    depend on the OpteeClientTest.h.
    
    Change-Id: I94f77db30d5c7896724b5da3d218041ebdc1f46a
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ops_user.h b/include/android_avb/avb_ops_user.h
new file mode 100644
index 0000000000..e6247bf656
--- /dev/null
+++ b/include/android_avb/avb_ops_user.h
@@ -0,0 +1,16 @@
+#ifndef AVB_OPS_USER_H_
+#define AVB_OPS_USER_H_
+
+#include <android_avb/libavb.h>
+#include <android_avb/avb_ab_flow.h>
+
+
+
+AvbOps* avb_ops_user_new(void);
+void avb_ops_user_free(AvbOps* ops);
+int read_slot_count(char *slot_count);
+int read_slot_suffixes(char *slot_suffixes);
+int set_slot_active(unsigned int *slot_number);
+int get_current_slot(char *select_slot);
+
+#endif
diff --git a/include/android_avb/avb_user_verification.h b/include/android_avb/avb_user_verification.h
new file mode 100644
index 0000000000..a0077cbe17
--- /dev/null
+++ b/include/android_avb/avb_user_verification.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef AVB_USER_VERIFICATION_H_
+#define AVB_USER_VERIFICATION_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Function to enable or disable verification for an entire slot. The
+ * passed in |ops| should be obtained via avb_ops_user_new(). The
+ * |ab_suffix| parameter should specify the slot to modify including
+ * the leading underscore (e.g. "_a" or "_b"). The
+ * |enable_verification| parameter should be set to |true| to enable
+ * dm-verification and |false| to disable.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verification_set(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool enable_verification);
+
+/* Gets whether verification is enabled for an entire slot. The passed
+ * in |ops| should be obtained via avb_ops_user_new(). The |ab_suffix|
+ * parameter should specify the slot to query including the leading
+ * underscore (e.g. "_a" or "_b"). The result is returned in the
+ * |out_verification_enabled| parameter.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verification_get(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool* out_verification_enabled);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_USER_VERIFICATION_H_ */
diff --git a/include/android_avb/avb_user_verity.h b/include/android_avb/avb_user_verity.h
new file mode 100644
index 0000000000..c8c2a6214b
--- /dev/null
+++ b/include/android_avb/avb_user_verity.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef AVB_USER_VERITY_H_
+#define AVB_USER_VERITY_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Function to enable or disable dm-verity for an entire slot. The
+ * passed in |ops| should be obtained via avb_ops_user_new(). The
+ * |ab_suffix| parameter should specify the slot to modify including
+ * the leading underscore (e.g. "_a" or "_b"). The |enable_verity|
+ * parameter should be set to |true| to enable dm-verity and |false|
+ * to disable.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verity_set(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool enable_verity);
+
+/* Gets whether dm-verity is enabled for an entire slot. The passed in
+ * |ops| should be obtained via avb_ops_user_new(). The |ab_suffix|
+ * parameter should specify the slot to query including the leading
+ * underscore (e.g. "_a" or "_b"). The result is returned in the
+ * |out_verity_enabled| parameter.
+ *
+ * Returns |true| if the operation succeeded, otherwise |false|.
+ */
+bool avb_user_verity_get(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool* out_verity_enabled);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_USER_VERITY_H_ */
diff --git a/include/android_avb/libavb_user.h b/include/android_avb/libavb_user.h
new file mode 100644
index 0000000000..2bca7a5dcb
--- /dev/null
+++ b/include/android_avb/libavb_user.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_USER_H_
+#define LIBAVB_USER_H_
+
+#include <android_avb/libavb_ab.h>
+
+/* The AVB_INSIDE_LIBAVB_USER_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_USER_H
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/avb_user_verification.h>
+#include <android_avb/avb_user_verity.h>
+#undef AVB_INSIDE_LIBAVB_USER_H
+
+#endif /* LIBAVB_USER_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 7ef02fa4d8..065f9c21f5 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -271,6 +271,7 @@ source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
 source lib/avb/rk_libavb_ab/Kconfig
 source lib/avb/rk_libavb_atx/Kconfig
+source lib/avb/rk_libavb_user/Kconfig
 source lib/optee_clientApi/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 5c8570ef27..b5199e5fbd 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -48,6 +48,7 @@ endif
 obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
 obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
+obj-$(CONFIG_AVB_LIBAVB_USER) += avb/rk_libavb_user/
 
 obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
 
diff --git a/lib/avb/rk_libavb_user/Kconfig b/lib/avb/rk_libavb_user/Kconfig
new file mode 100644
index 0000000000..f6b3ca3c30
--- /dev/null
+++ b/lib/avb/rk_libavb_user/Kconfig
@@ -0,0 +1,7 @@
+config AVB_LIBAVB_USER
+	bool "Android AVB read/write hardware"
+	help
+	  This config support the android things system to
+	  read/write hardware image, like vbmeta, misc, and 
+	  so on. And it can provide some a/b and avb information
+	  to fastboot and kernel.
diff --git a/lib/avb/rk_libavb_user/Makefile b/lib/avb/rk_libavb_user/Makefile
new file mode 100644
index 0000000000..fe634018e3
--- /dev/null
+++ b/lib/avb/rk_libavb_user/Makefile
@@ -0,0 +1,3 @@
+obj-y	+= avb_ops_user.o
+obj-y	+= avb_user_verification.o
+obj-y	+= avb_user_verity.o
diff --git a/lib/avb/rk_libavb_user/avb_ops_user.c b/lib/avb/rk_libavb_user/avb_ops_user.c
new file mode 100644
index 0000000000..f16b0368a0
--- /dev/null
+++ b/lib/avb/rk_libavb_user/avb_ops_user.c
@@ -0,0 +1,377 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/avb_ops_user.h>
+#include <android_avb/libavb_ab.h>
+#include <android_avb/avb_atx_validate.h>
+#include <optee_include/OpteeClientTest.h>
+
+static void byte_to_block(int64_t *offset,
+			  size_t *num_bytes,
+			  lbaint_t *offset_blk,
+			  lbaint_t *blkcnt)
+{
+	*offset_blk = (lbaint_t)(*offset / 512);
+	if (*num_bytes % 512 == 0) {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512);
+		} else {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		}
+	} else {
+		if (*offset % 512 == 0) {
+			*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+		} else {
+			if ((*offset % 512) + (*num_bytes % 512) < 512 ||
+			    (*offset % 512) + (*num_bytes % 512) == 512) {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 1;
+			} else {
+				*blkcnt = (lbaint_t)(*num_bytes / 512) + 2;
+			}
+			
+		}
+	}
+}
+
+static AvbIOResult read_from_partition(AvbOps* ops,
+                                       const char* partition,
+                                       int64_t offset,
+                                       size_t num_bytes,
+                                       void* buffer,
+                                       size_t* out_num_read)
+{
+	char *dev_iface = "mmc";
+	char *buffer_temp;
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	lbaint_t offset_blk, blkcnt;
+	disk_partition_t part_info;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+
+	if((offset % 512 == 0) && (num_bytes % 512 == 0)) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer);
+		*out_num_read = blkcnt * 512;
+	} else {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+		memcpy(buffer, buffer_temp + (offset % 512), num_bytes);
+		*out_num_read = num_bytes;
+	}
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_to_partition(AvbOps* ops,
+                                      const char* partition,
+                                      int64_t offset,
+                                      size_t num_bytes,
+                                      const void* buffer)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	char *buffer_temp;
+	disk_partition_t part_info;
+	lbaint_t offset_blk, blkcnt;
+
+	byte_to_block(&offset, &num_bytes, &offset_blk, &blkcnt);
+	buffer_temp = malloc(512 * blkcnt);
+	memset(buffer_temp, 0, 512 * blkcnt);
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+
+	if ((offset % 512 != 0) && (num_bytes % 512) != 0) {
+		blk_dread(dev_desc, part_info.start + offset_blk, blkcnt, buffer_temp);
+	}
+	memcpy(buffer_temp, buffer + (offset % 512), num_bytes);
+
+	if(blk_dwrite(dev_desc, part_info.start + offset_blk, blkcnt, buffer) != 1){
+		printf("Can't write %s partition",partition);
+	}
+	free(buffer_temp);
+
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult validate_vbmeta_public_key(
+	AvbOps *ops,
+	const uint8_t *public_key_data,
+	size_t public_key_length,
+	const uint8_t *public_key_metadata,
+	size_t public_key_metadata_length,
+	bool *out_is_trusted)
+{
+	if (out_is_trusted != NULL) {
+		*out_is_trusted = true;
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+
+static AvbIOResult read_rollback_index(AvbOps *ops,
+                                       size_t rollback_index_location,
+                                       uint64_t *out_rollback_index)
+{
+	if (out_rollback_index != NULL) {
+		trusty_read_rollback_index(rollback_index_location, out_rollback_index);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_rollback_index(AvbOps *ops,
+                                        size_t rollback_index_location,
+                                        uint64_t rollback_index)
+{
+	trusty_write_rollback_index(rollback_index_location, rollback_index);
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult read_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+		trusty_read_lock_state((uint8_t *)out_is_unlocked);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult write_is_device_unlocked(AvbOps *ops, bool *out_is_unlocked)
+{
+	if (out_is_unlocked != NULL) {
+		trusty_write_lock_state(*out_is_unlocked);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_size_of_partition(AvbOps *ops,
+                                         const char *partition,
+                                         uint64_t *out_size_in_bytes)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+	*out_size_in_bytes = (part_info.size) * 512;
+	return AVB_IO_RESULT_OK;
+}
+
+static AvbIOResult get_unique_guid_for_partition(AvbOps *ops,
+                                                 const char *partition,
+                                                 char *guid_buf,
+                                                 size_t guid_buf_size)
+{
+	const char *dev_iface = "mmc";
+	int dev_num = 0;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+
+	if (part_get_info_by_name(dev_desc, partition, &part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", partition);
+		return -1;
+	}
+	if (guid_buf != NULL && guid_buf_size > 0) {
+		memcpy(guid_buf, part_info.uuid, guid_buf_size);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+AvbOps* avb_ops_user_new(void)
+{
+	AvbOps* ops;
+
+	ops = calloc(1, sizeof(AvbOps));
+	if (ops == NULL) {
+		avb_error("Error allocating memory for AvbOps.\n");
+		goto out;
+	}
+
+	ops->ab_ops = calloc(1, sizeof(AvbABOps));
+	if (ops->ab_ops == NULL) {
+		avb_error("Error allocating memory for AvbABOps.\n");
+		free(ops);
+		goto out;
+	}
+	ops->atx_ops = calloc(1, sizeof(AvbAtxOps));
+	if (ops->atx_ops == NULL) {
+		avb_error("Error allocating memory for AvbAtxOps.\n");
+		free(ops->ab_ops);
+		free(ops);
+		goto out;
+	}
+	ops->ab_ops->ops = ops;
+	ops->atx_ops->ops = ops;
+
+	ops->read_from_partition = read_from_partition;
+	ops->write_to_partition = write_to_partition;
+	ops->validate_vbmeta_public_key = validate_vbmeta_public_key;
+	ops->read_rollback_index = read_rollback_index;
+	ops->write_rollback_index = write_rollback_index;
+	ops->read_is_device_unlocked = read_is_device_unlocked;
+	ops->write_is_device_unlocked = write_is_device_unlocked;
+	ops->get_unique_guid_for_partition = get_unique_guid_for_partition;
+	ops->get_size_of_partition = get_size_of_partition;
+	ops->ab_ops->read_ab_metadata = avb_ab_data_read;
+	ops->ab_ops->write_ab_metadata = avb_ab_data_write;
+	ops->ab_ops->init_ab_metadata = avb_ab_data_init;
+out:
+	return ops;
+}
+
+void avb_ops_user_free(AvbOps *ops)
+{
+	free(ops->ab_ops);
+	free(ops->atx_ops);
+	free(ops);
+}
+
+
+int read_slot_count(char *slot_count)
+{
+	AvbOps* ops;
+	AvbABData ab_data;
+	memset(&ab_data,0,sizeof(AvbABData));
+	ops = avb_ops_user_new();
+	printf("read_slot_count\n");
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
+		printf("read_slot_count error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+	*slot_count = ab_data.nb_slot;
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+int read_slot_suffixes(char *slot_suffixes)
+{
+	AvbOps* ops;
+	AvbABData ab_data;
+	memset(&ab_data,0,sizeof(AvbABData));
+	ops = avb_ops_user_new();
+	printf("read_slot_suffixes\n");
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	if (ops->ab_ops->read_ab_metadata(ops->ab_ops,&ab_data) != 0) {
+		printf("read_slot_suffixes error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+	memcpy(slot_suffixes,ab_data.slot_suffix,4);
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+int set_slot_active(unsigned int *slot_number)
+{
+	AvbOps* ops;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	printf("set_slot_active\n");
+	if (avb_ab_mark_slot_active(ops->ab_ops, *slot_number) != 0) {
+		printf("set_slot_active error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+int get_current_slot(char *select_slot)
+{
+	AvbOps* ops;
+	ops = avb_ops_user_new();
+	if (ops == NULL) {
+		printf("avb_ops_user_new() failed!\n");
+		return -1;
+	}
+	if (avb_ab_slot_select(ops->ab_ops, select_slot) != 0) {
+		printf("get_current_slot error!\n");
+		avb_ops_user_free(ops);
+		return -1;
+	}
+
+	avb_ops_user_free(ops);
+	return 0;
+}
+
+
+
+
+
diff --git a/lib/avb/rk_libavb_user/avb_user_verification.c b/lib/avb/rk_libavb_user/avb_user_verification.c
new file mode 100644
index 0000000000..9b0e69d401
--- /dev/null
+++ b/lib/avb/rk_libavb_user/avb_user_verification.c
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_user_verification.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define AVB_PART_NAME_MAX_SIZE 32
+
+/* Loads the toplevel AvbVBMetaImageHeader from the slot denoted by
+ * |ab_suffix| into |vbmeta_image|. No validation, verification, or
+ * byteswapping is performed.
+ *
+ * If successful, |true| is returned and the partition it was loaded
+ * from is returned in |out_partition_name| and the offset on said
+ * partition is returned in |out_vbmeta_offset|.
+ */
+static bool load_top_level_vbmeta_header(
+    AvbOps* ops,
+    const char* ab_suffix,
+    uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE],
+    char out_partition_name[AVB_PART_NAME_MAX_SIZE],
+    uint64_t* out_vbmeta_offset) {
+  uint64_t vbmeta_offset = 0;
+  size_t num_read;
+  bool ret = false;
+  AvbIOResult io_res;
+
+  /* Construct full partition name. */
+  if (!avb_str_concat(out_partition_name,
+                      AVB_PART_NAME_MAX_SIZE,
+                      "vbmeta",
+                      6,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    goto out;
+  }
+
+  /* Only read the header, not the entire struct. */
+  io_res = ops->read_from_partition(ops,
+                                    out_partition_name,
+                                    vbmeta_offset,
+                                    AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                    vbmeta_image,
+                                    &num_read);
+  if (io_res == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION) {
+    AvbFooter footer;
+
+    /* Try looking for the vbmeta struct in 'boot' via the footer. */
+    if (!avb_str_concat(out_partition_name,
+                        AVB_PART_NAME_MAX_SIZE,
+                        "boot",
+                        4,
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      goto out;
+    }
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      -AVB_FOOTER_SIZE,
+                                      AVB_FOOTER_SIZE,
+                                      &footer,
+                                      &num_read);
+    if (io_res != AVB_IO_RESULT_OK) {
+      avb_errorv("Error loading footer from partition '",
+                 out_partition_name,
+                 "'\n",
+                 NULL);
+      goto out;
+    }
+
+    if (avb_memcmp(footer.magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) != 0) {
+      avb_errorv("Data from '",
+                 out_partition_name,
+                 "' does not look like a vbmeta footer.\n",
+                 NULL);
+      goto out;
+    }
+
+    vbmeta_offset = avb_be64toh(footer.vbmeta_offset);
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      vbmeta_offset,
+                                      AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                      vbmeta_image,
+                                      &num_read);
+  }
+
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv(
+        "Error loading from partition '", out_partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  if (out_vbmeta_offset != NULL) {
+    *out_vbmeta_offset = vbmeta_offset;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verification_get(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool* out_verification_enabled) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, NULL)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the VERIFICATION_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+
+  if (out_verification_enabled != NULL) {
+    *out_verification_enabled =
+        !(flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED);
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verification_set(AvbOps* ops,
+                               const char* ab_suffix,
+                               bool enable_verification) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  uint64_t vbmeta_offset;
+  AvbIOResult io_res;
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, &vbmeta_offset)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the VERIFICATION_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+  flags &= ~AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED;
+  if (!enable_verification) {
+    flags |= AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED;
+  }
+  header->flags = avb_htobe32(flags);
+
+  /* Write the header. */
+  io_res = ops->write_to_partition(ops,
+                                   partition_name,
+                                   vbmeta_offset,
+                                   AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                   vbmeta_image);
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv("Error writing to partition '", partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
diff --git a/lib/avb/rk_libavb_user/avb_user_verity.c b/lib/avb/rk_libavb_user/avb_user_verity.c
new file mode 100644
index 0000000000..e3f1a4d554
--- /dev/null
+++ b/lib/avb/rk_libavb_user/avb_user_verity.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_user_verity.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define AVB_PART_NAME_MAX_SIZE 32
+
+/* Loads the toplevel AvbVBMetaImageHeader from the slot denoted by
+ * |ab_suffix| into |vbmeta_image|. No validation, verification, or
+ * byteswapping is performed.
+ *
+ * If successful, |true| is returned and the partition it was loaded
+ * from is returned in |out_partition_name| and the offset on said
+ * partition is returned in |out_vbmeta_offset|.
+ */
+static bool load_top_level_vbmeta_header(
+    AvbOps* ops,
+    const char* ab_suffix,
+    uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE],
+    char out_partition_name[AVB_PART_NAME_MAX_SIZE],
+    uint64_t* out_vbmeta_offset) {
+  uint64_t vbmeta_offset = 0;
+  size_t num_read;
+  bool ret = false;
+  AvbIOResult io_res;
+
+  /* Construct full partition name. */
+  if (!avb_str_concat(out_partition_name,
+                      AVB_PART_NAME_MAX_SIZE,
+                      "vbmeta",
+                      6,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+    avb_error("Partition name and suffix does not fit.\n");
+    goto out;
+  }
+
+  /* Only read the header, not the entire struct. */
+  io_res = ops->read_from_partition(ops,
+                                    out_partition_name,
+                                    vbmeta_offset,
+                                    AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                    vbmeta_image,
+                                    &num_read);
+  if (io_res == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION) {
+    AvbFooter footer;
+
+    /* Try looking for the vbmeta struct in 'boot' via the footer. */
+    if (!avb_str_concat(out_partition_name,
+                        AVB_PART_NAME_MAX_SIZE,
+                        "boot",
+                        4,
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+      avb_error("Partition name and suffix does not fit.\n");
+      goto out;
+    }
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      -AVB_FOOTER_SIZE,
+                                      AVB_FOOTER_SIZE,
+                                      &footer,
+                                      &num_read);
+    if (io_res != AVB_IO_RESULT_OK) {
+      avb_errorv("Error loading footer from partition '",
+                 out_partition_name,
+                 "'\n",
+                 NULL);
+      goto out;
+    }
+
+    if (avb_memcmp(footer.magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) != 0) {
+      avb_errorv("Data from '",
+                 out_partition_name,
+                 "' does not look like a vbmeta footer.\n",
+                 NULL);
+      goto out;
+    }
+
+    vbmeta_offset = avb_be64toh(footer.vbmeta_offset);
+    io_res = ops->read_from_partition(ops,
+                                      out_partition_name,
+                                      vbmeta_offset,
+                                      AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                      vbmeta_image,
+                                      &num_read);
+  }
+
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv(
+        "Error loading from partition '", out_partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  if (out_vbmeta_offset != NULL) {
+    *out_vbmeta_offset = vbmeta_offset;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verity_get(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool* out_verity_enabled) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, NULL)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the HASHTREE_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+
+  if (out_verity_enabled != NULL) {
+    *out_verity_enabled = !(flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED);
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+bool avb_user_verity_set(AvbOps* ops,
+                         const char* ab_suffix,
+                         bool enable_verity) {
+  uint8_t vbmeta_image[AVB_VBMETA_IMAGE_HEADER_SIZE]; /* 256 bytes. */
+  char partition_name[AVB_PART_NAME_MAX_SIZE];        /* 32 bytes. */
+  uint64_t vbmeta_offset;
+  AvbIOResult io_res;
+  AvbVBMetaImageHeader* header;
+  uint32_t flags;
+  bool ret = false;
+
+  if (!load_top_level_vbmeta_header(
+          ops, ab_suffix, vbmeta_image, partition_name, &vbmeta_offset)) {
+    goto out;
+  }
+
+  if (avb_memcmp(vbmeta_image, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_errorv("Data from '",
+               partition_name,
+               "' does not look like a vbmeta header.\n",
+               NULL);
+    goto out;
+  }
+
+  /* Set/clear the HASHTREE_DISABLED bit, as requested. */
+  header = (AvbVBMetaImageHeader*)vbmeta_image;
+  flags = avb_be32toh(header->flags);
+  flags &= ~AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED;
+  if (!enable_verity) {
+    flags |= AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED;
+  }
+  header->flags = avb_htobe32(flags);
+
+  /* Write the header. */
+  io_res = ops->write_to_partition(ops,
+                                   partition_name,
+                                   vbmeta_offset,
+                                   AVB_VBMETA_IMAGE_HEADER_SIZE,
+                                   vbmeta_image);
+  if (io_res != AVB_IO_RESULT_OK) {
+    avb_errorv("Error writing to partition '", partition_name, "'\n", NULL);
+    goto out;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}

commit ea5fd1c643bd65fc08f6791c730f7e75032ac034
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Sep 8 11:07:23 2017 +0800

    mmc: rpmb: Add interface functions
    
    Add interface functions for external programs,
    other functions can use it to read and write
    rpmb partitions.
    
    Change-Id: Ie94a6586077e1e9f4fc2924d283029f0a4a3e545
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index fcca28d914..dda84de781 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -350,3 +350,58 @@ int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
 		return -1;
 	return cnt;
 }
+
+int read_counter(struct mmc *mmc, struct s_rpmb *requestpackets)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	if (mmc_rpmb_response(mmc, requestpackets, RPMB_RESP_WCOUNTER, 1))
+		return -1;
+
+	return 0;
+}
+
+int program_key(struct mmc *mmc, struct s_rpmb *requestpackets)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, true))
+		return -1;
+
+	memset(requestpackets, 0, sizeof(struct s_rpmb));
+
+	requestpackets->request = cpu_to_be16(RPMB_REQ_STATUS);
+
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	return mmc_rpmb_response(mmc, requestpackets, RPMB_RESP_KEY, 1);
+}
+
+int authenticated_read(struct mmc *mmc,
+	struct s_rpmb *requestpackets, uint16_t block_count)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	if (mmc_rpmb_response
+		(mmc, requestpackets, RPMB_RESP_READ_DATA, block_count))
+		return -1;
+
+	return 0;
+}
+
+int authenticated_write(struct mmc *mmc, struct s_rpmb *requestpackets)
+{
+	if (mmc_rpmb_request(mmc, requestpackets, 1, true))
+		return -1;
+
+	memset(requestpackets, 0, sizeof(struct s_rpmb));
+
+	requestpackets->request = cpu_to_be16(RPMB_REQ_STATUS);
+
+	if (mmc_rpmb_request(mmc, requestpackets, 1, false))
+		return -1;
+
+	return mmc_rpmb_response(mmc, requestpackets, RPMB_RESP_WRITE_DATA, 1);
+}
+
diff --git a/include/mmc.h b/include/mmc.h
index e7e21f0218..492b0434e7 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -336,6 +336,12 @@ int do_authenticatedread(struct s_rpmb *requestpackets, uint16_t block_count);
 int do_authenticatedwrite(struct s_rpmb *requestpackets);
 struct mmc *do_returnmmc(void);
 
+int read_counter(struct mmc *mmc, struct s_rpmb *requestpackets);
+int program_key(struct mmc *mmc, struct s_rpmb *requestpackets);
+int authenticated_read
+	(struct mmc *mmc, struct s_rpmb *requestpackets, uint16_t block_count);
+int authenticated_write(struct mmc *mmc, struct s_rpmb *requestpackets);
+
 /* Driver model support */
 
 /**

commit 87b8e6decf5c045a5720a2c26a393b4eb1e1e2bd
Author: Hisping Lin <hisping.lin@rock-chips.com>
Date:   Fri Sep 8 10:55:22 2017 +0800

    mmc: add mmc cmd to test tipc functions
    
    input mmc testrpmb to test store data to rpmb.
    
    Change-Id: I0b8361bd7a22fc7854e1a94ae4ae81972e523b3b
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 7b9d5fe991..ca3721d90f 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -4,11 +4,12 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-
 #include <common.h>
 #include <command.h>
 #include <console.h>
 #include <mmc.h>
+#include <optee_include/OpteeClientTest.h>
+#include <optee_include/OpteeClientApiLib.h>
 
 static int curr_device = -1;
 
@@ -123,7 +124,120 @@ static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
+#ifdef CONFIG_OPTEE_CLIENT
+static int do_mmc_testrpmb(cmd_tbl_t *cmdtp,
+		int flag, int argc, char * const argv[])
+{
+	struct mmc *mmc;
+
+	if (curr_device < 0) {
+		if (get_mmc_num() > 0) {
+			puts("MMC device available\n");
+			curr_device = 0;
+		} else {
+			puts("No MMC device available\n");
+			return 1;
+		}
+	}
+
+	mmc = init_mmc_device(curr_device, false);
+	if (!mmc)
+		return CMD_RET_FAILURE;
+
+	uint64_t value;
+	trusty_write_rollback_index(0x87654321, 0x1122334455667788);
+	trusty_read_rollback_index(0x87654321, &value);
+	debug("sizeof(value) %x\n ", sizeof(value));
+	if (value == 0x1122334455667788)
+		printf("good ! value==0x1122334455667788\n ");
+	uint8_t filename[] = "testfile1";
+	uint8_t data[] = "just a data";
+	write_to_keymaster(filename, sizeof(filename), data, sizeof(data));
+	return CMD_RET_SUCCESS;
+}
+#endif
+
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
+char temp_original_part;
+int init_rpmb(void)
+{
+	struct mmc *mmc;
+
+	mmc = init_mmc_device(curr_device, false);
+	if (!mmc)
+		return CMD_RET_FAILURE;
+
+	if (!(mmc->version & MMC_VERSION_MMC)) {
+		printf("It is not a EMMC device\n");
+		return CMD_RET_FAILURE;
+	}
+	if (mmc->version < MMC_VERSION_4_41) {
+		printf("RPMB not supported before version 4.41\n");
+		return CMD_RET_FAILURE;
+	}
+
+		/* Switch to the RPMB partition */
+#ifndef CONFIG_BLK
+	temp_original_part = mmc->block_dev.hwpart;
+	debug("mmc->block_dev.hwpart\n");
+#else
+	temp_original_part = mmc_get_blk_desc(mmc)->hwpart;
+	debug("mmc_get_blk_desc(mmc)->hwpart\n");
+#endif
+	debug("init_rpmb temp_original_part = 0x%X\n", temp_original_part);
+	if (blk_select_hwpart_devnum
+		(IF_TYPE_MMC, curr_device, MMC_PART_RPMB) != 0)
+		return CMD_RET_FAILURE;
+
+	return CMD_RET_SUCCESS;
+}
+
+int finish_rpmb(void)
+{
+	/* Return to original partition */
+	debug("finish_rpmb temp_original_part = 0x%X\n", temp_original_part);
+	if (blk_select_hwpart_devnum
+		(IF_TYPE_MMC, curr_device, temp_original_part) != 0)
+		return CMD_RET_FAILURE;
+
+	return CMD_RET_SUCCESS;
+}
+
+int do_readcounter(struct s_rpmb *requestpackets)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return read_counter(mmc, requestpackets);
+}
+
+int do_programkey(struct s_rpmb *requestpackets)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return program_key(mmc, requestpackets);
+}
+
+int do_authenticatedread(struct s_rpmb *requestpackets, uint16_t block_count)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return authenticated_read(mmc, requestpackets, block_count);
+}
+
+int do_authenticatedwrite(struct s_rpmb *requestpackets)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return authenticated_write(mmc, requestpackets);
+}
+
+struct mmc *do_returnmmc(void)
+{
+	struct mmc *mmc = find_mmc_device(curr_device);
+
+	return mmc;
+}
+
 static int confirm_key_prog(void)
 {
 	puts("Warning: Programming authentication key can be done only once !\n"
@@ -805,6 +919,9 @@ static cmd_tbl_t cmd_mmc[] = {
 	U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""),
 	U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""),
 #endif
+#ifdef CONFIG_OPTEE_CLIENT
+	U_BOOT_CMD_MKENT(testrpmb, 1, 0, do_mmc_testrpmb, "", ""),
+#endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""),
 #endif
@@ -869,6 +986,9 @@ U_BOOT_CMD(
 	" - Change the RST_n_FUNCTION field of the specified device\n"
 	"   WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n"
 #endif
+#ifdef CONFIG_OPTEE_CLIENT
+	"mmc testrpmb - test CA call static TA,and TA call rpmb in uboot\n"
+#endif
 #ifdef CONFIG_SUPPORT_EMMC_RPMB
 	"mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n"
 	"mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n"
@@ -888,3 +1008,4 @@ U_BOOT_CMD(
 	"display MMC info",
 	"- display info of the current MMC device"
 );
+
diff --git a/include/mmc.h b/include/mmc.h
index 75d2fbd453..e7e21f0218 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -299,6 +299,43 @@
 #define MMC_NUM_BOOT_PARTITION	2
 #define MMC_PART_RPMB           3       /* RPMB partition number */
 
+/* Sizes of RPMB data frame */
+#define RPMB_SZ_STUFF		196
+#define RPMB_SZ_MAC		32
+#define RPMB_SZ_DATA		256
+#define RPMB_SZ_NONCE		16
+
+/* Structure of RPMB data frame. */
+struct s_rpmb {
+	unsigned char stuff[RPMB_SZ_STUFF];
+	unsigned char mac[RPMB_SZ_MAC];
+	unsigned char data[RPMB_SZ_DATA];
+	unsigned char nonce[RPMB_SZ_NONCE];
+	unsigned int write_counter;
+	unsigned short address;
+	unsigned short block_count;
+	unsigned short result;
+	unsigned short request;
+} __packed;
+
+struct s_rpmb_verify {
+	unsigned char data[RPMB_SZ_DATA];
+	unsigned char nonce[RPMB_SZ_NONCE];
+	unsigned int write_counter;
+	unsigned short address;
+	unsigned short block_count;
+	unsigned short result;
+	unsigned short request;
+} __packed;
+
+int init_rpmb(void);
+int finish_rpmb(void);
+int do_readcounter(struct s_rpmb *requestpackets);
+int do_programkey(struct s_rpmb *requestpackets);
+int do_authenticatedread(struct s_rpmb *requestpackets, uint16_t block_count);
+int do_authenticatedwrite(struct s_rpmb *requestpackets);
+struct mmc *do_returnmmc(void);
+
 /* Driver model support */
 
 /**
@@ -711,3 +748,4 @@ int mmc_get_env_dev(void);
 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc);
 
 #endif /* _MMC_H_ */
+

commit abdd24375050db7ce121b48477cc332d6c8c40f6
Author: hisping <hisping.lin@rock-chips.com>
Date:   Thu Aug 24 17:15:26 2017 +0800

    lib: add tipc functions
    
    tipc functions is used for uboot communicate
    with TEE. uboot can request service for secure
    store or secure algorithm.
    
    Change-Id: Ie44095aff4c044feceb5f362abf6e3d24ceb8d4c
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
new file mode 100644
index 0000000000..a1df9239ed
--- /dev/null
+++ b/include/optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h
@@ -0,0 +1,8 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+extern const uint8_t keymaster_data[];
+extern const uint32_t keymaster_size;
diff --git a/include/optee_include/OpteeClientApiLib.h b/include/optee_include/OpteeClientApiLib.h
new file mode 100644
index 0000000000..a88565fbff
--- /dev/null
+++ b/include/optee_include/OpteeClientApiLib.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <optee_include/tee_base_types.h>
+#include <optee_include/tee_client_api.h>
+
+TEEC_Result OpteeClientApiLibInitialize(void);
diff --git a/include/optee_include/OpteeClientImage.h b/include/optee_include/OpteeClientImage.h
new file mode 100644
index 0000000000..d18928480a
--- /dev/null
+++ b/include/optee_include/OpteeClientImage.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __OPTEE_CLIENT_IMAGE_GUID_H__
+#define __OPTEE_CLIENT_IMAGE_GUID_H__
+
+#include <optee_include/tee_base_types.h>
+
+#define OPTEE_CLIENT_IMAGE_GUID \
+{ \
+	0xee3206cb, 0x950a, 0x49eb, \
+	{ 0xbd, 0xd7, 0xc1, 0x95, 0xcb, 0x9b, 0x2e, 0xbf } \
+}
+#endif
diff --git a/include/optee_include/OpteeClientMem.h b/include/optee_include/OpteeClientMem.h
new file mode 100644
index 0000000000..2e4c877b36
--- /dev/null
+++ b/include/optee_include/OpteeClientMem.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/types.h>
+
+void OpteeClientMemInit(void);
+
+void *OpteeClientMemAlloc(uint32_t length);
+
+void  OpteeClientMemFree(void *mem);
diff --git a/include/optee_include/OpteeClientRPC.h b/include/optee_include/OpteeClientRPC.h
new file mode 100644
index 0000000000..3efa427d37
--- /dev/null
+++ b/include/optee_include/OpteeClientRPC.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <optee_include/tee_base_types.h>
+#include <optee_include/OpteeClientApiLib.h>
+
+typedef struct{
+	unsigned int Arg0;
+	unsigned int Arg1;
+	unsigned int Arg2;
+	unsigned int Arg3;
+	unsigned int Arg4;
+	unsigned int Arg5;
+	unsigned int Arg6;
+	unsigned int Arg7;
+} ARM_SMC_ARGS;
+
+#define RPMB_PACKET_DATA_TO_UINT16(d) ((d[0] << 8) + (d[1]))
+#define RPMB_PACKET_DATA_TO_UINT16(d) ((d[0] << 8) + (d[1]))
+#define RPMB_STUFF_DATA_SIZE                        196
+#define RPMB_KEY_MAC_SIZE                           32
+#define RPMB_DATA_SIZE                              256
+#define RPMB_NONCE_SIZE                             16
+#define RPMB_DATA_FRAME_SIZE                        512
+
+typedef struct rpmb_data_frame {
+	unsigned char stuff_bytes[RPMB_STUFF_DATA_SIZE];
+	unsigned char key_mac[RPMB_KEY_MAC_SIZE];
+	unsigned char data[RPMB_DATA_SIZE];
+	unsigned char nonce[RPMB_NONCE_SIZE];
+	unsigned char write_counter[4];
+	unsigned char address[2];
+	unsigned char block_count[2];
+	unsigned char op_result[2];
+	unsigned char msg_type[2];
+} EFI_RK_RPMB_DATA_PACKET;
+
+typedef struct s_rpmb_back {
+	unsigned char stuff[RPMB_STUFF_DATA_SIZE];
+	unsigned char mac[RPMB_KEY_MAC_SIZE];
+	unsigned char data[RPMB_DATA_SIZE];
+	unsigned char nonce[RPMB_NONCE_SIZE];
+	unsigned int write_counter;
+	unsigned short address;
+	unsigned short block_count;
+	unsigned short result;
+	unsigned short request;
+} EFI_RK_RPMB_DATA_PACKET_BACK;
+
+TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs);
diff --git a/include/optee_include/OpteeClientSMC.h b/include/optee_include/OpteeClientSMC.h
new file mode 100644
index 0000000000..2bbcbe9063
--- /dev/null
+++ b/include/optee_include/OpteeClientSMC.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <optee_include/tee_base_types.h>
+#include <optee_include/OpteeClientApiLib.h>
+
+TEEC_Result TEEC_SMC_OpenSession(TEEC_Context * context,
+				TEEC_Session * session,
+				const TEEC_UUID * destination,
+				TEEC_Operation * operation,
+				uint32_t *error_origin);
+
+TEEC_Result TEEC_SMC_CloseSession(TEEC_Session *session,
+				uint32_t *error_origin);
+
+TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
+				uint32_t cmd_id,
+				TEEC_Operation *operation,
+				uint32_t *error_origin);
+
+TEEC_Result TEEC_SMC_RequestCancellation(TEEC_Operation *operation,
+				uint32_t *error_origin);
diff --git a/include/optee_include/OpteeClientTest.h b/include/optee_include/OpteeClientTest.h
new file mode 100644
index 0000000000..e7e63ef042
--- /dev/null
+++ b/include/optee_include/OpteeClientTest.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+void test_optee(void);
+uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value);
+uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value);
+uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size);
+uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size);
+uint32_t trusty_read_lock_state(uint8_t *lock_state);
+uint32_t trusty_write_lock_state(uint8_t lock_state);
+uint32_t write_to_keymaster
+	(uint8_t *filename, uint32_t filename_size,
+	uint8_t *data, uint32_t data_size);
diff --git a/include/optee_include/tee_api_defines.h b/include/optee_include/tee_api_defines.h
new file mode 100644
index 0000000000..75852bddf0
--- /dev/null
+++ b/include/optee_include/tee_api_defines.h
@@ -0,0 +1,441 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Based on GP TEE Internal Core API Specification Version 1.1 */
+#ifndef TEE_API_DEFINES_H
+#define TEE_API_DEFINES_H
+
+#include <optee_include/tee_base_types.h>
+
+#define TEE_INT_CORE_API_SPEC_VERSION     0x0000000A
+
+#define TEE_HANDLE_NULL                   0
+
+#define TEE_TIMEOUT_INFINITE              0xFFFFFFFF
+
+/* API Error Codes */
+#define TEE_SUCCESS                       0x00000000
+#define TEE_ERROR_CORRUPT_OBJECT          0xF0100001
+#define TEE_ERROR_CORRUPT_OBJECT_2        0xF0100002
+#define TEE_ERROR_STORAGE_NOT_AVAILABLE   0xF0100003
+#define TEE_ERROR_STORAGE_NOT_AVAILABLE_2 0xF0100004
+#define TEE_ERROR_GENERIC                 0xFFFF0000
+#define TEE_ERROR_ACCESS_DENIED           0xFFFF0001
+#define TEE_ERROR_CANCEL                  0xFFFF0002
+#define TEE_ERROR_ACCESS_CONFLICT         0xFFFF0003
+#define TEE_ERROR_EXCESS_DATA             0xFFFF0004
+#define TEE_ERROR_BAD_FORMAT              0xFFFF0005
+#define TEE_ERROR_BAD_PARAMETERS          0xFFFF0006
+#define TEE_ERROR_BAD_STATE               0xFFFF0007
+#define TEE_ERROR_ITEM_NOT_FOUND          0xFFFF0008
+#define TEE_ERROR_NOT_IMPLEMENTED         0xFFFF0009
+#define TEE_ERROR_NOT_SUPPORTED           0xFFFF000A
+#define TEE_ERROR_NO_DATA                 0xFFFF000B
+#define TEE_ERROR_OUT_OF_MEMORY           0xFFFF000C
+#define TEE_ERROR_BUSY                    0xFFFF000D
+#define TEE_ERROR_COMMUNICATION           0xFFFF000E
+#define TEE_ERROR_SECURITY                0xFFFF000F
+#define TEE_ERROR_SHORT_BUFFER            0xFFFF0010
+#define TEE_ERROR_EXTERNAL_CANCEL         0xFFFF0011
+#define TEE_ERROR_OVERFLOW                0xFFFF300F
+#define TEE_ERROR_TARGET_DEAD             0xFFFF3024
+#define TEE_ERROR_STORAGE_NO_SPACE        0xFFFF3041
+#define TEE_ERROR_MAC_INVALID             0xFFFF3071
+#define TEE_ERROR_SIGNATURE_INVALID       0xFFFF3072
+#define TEE_ERROR_TIME_NOT_SET            0xFFFF5000
+#define TEE_ERROR_TIME_NEEDS_RESET        0xFFFF5001
+
+/*
+ * Proprietary error codes.
+ * All proprietary error codes should use the 0xF57E prefix.
+ */
+#define TEE_ERROR_SYSTEM_BUSY           0xF57E0000
+#define TEE_ERROR_FILE_NOT_FOUND        0xF57E0010
+
+/* Parameter Type Constants */
+#define TEE_PARAM_TYPE_NONE             0
+#define TEE_PARAM_TYPE_VALUE_INPUT      1
+#define TEE_PARAM_TYPE_VALUE_OUTPUT     2
+#define TEE_PARAM_TYPE_VALUE_INOUT      3
+#define TEE_PARAM_TYPE_MEMREF_INPUT     5
+#define TEE_PARAM_TYPE_MEMREF_OUTPUT    6
+#define TEE_PARAM_TYPE_MEMREF_INOUT     7
+
+/* Login Type Constants */
+#define TEE_LOGIN_PUBLIC                0x00000000
+#define TEE_LOGIN_USER                  0x00000001
+#define TEE_LOGIN_GROUP                 0x00000002
+#define TEE_LOGIN_APPLICATION           0x00000004
+#define TEE_LOGIN_APPLICATION_USER      0x00000005
+#define TEE_LOGIN_APPLICATION_GROUP     0x00000006
+#define TEE_LOGIN_TRUSTED_APP           0xF0000000
+
+/* Origin Code Constants */
+#define TEE_ORIGIN_API                  0x00000001
+#define TEE_ORIGIN_COMMS                0x00000002
+#define TEE_ORIGIN_TEE                  0x00000003
+#define TEE_ORIGIN_TRUSTED_APP          0x00000004
+
+/* Property Sets pseudo handles */
+#define TEE_PROPSET_TEE_IMPLEMENTATION  ((TEE_PropSetHandle)0xFFFFFFFD)
+#define TEE_PROPSET_CURRENT_CLIENT      ((TEE_PropSetHandle)0xFFFFFFFE)
+#define TEE_PROPSET_CURRENT_TA          ((TEE_PropSetHandle)0xFFFFFFFF)
+
+/* Memory Access Rights Constants */
+#define TEE_MEMORY_ACCESS_READ             0x00000001
+#define TEE_MEMORY_ACCESS_WRITE            0x00000002
+#define TEE_MEMORY_ACCESS_ANY_OWNER        0x00000004
+
+/* Other constants */
+#define TEE_STORAGE_PRIVATE                0x00000001
+
+#define TEE_DATA_FLAG_ACCESS_READ          0x00000001
+#define TEE_DATA_FLAG_ACCESS_WRITE         0x00000002
+#define TEE_DATA_FLAG_ACCESS_WRITE_META    0x00000004
+#define TEE_DATA_FLAG_SHARE_READ           0x00000010
+#define TEE_DATA_FLAG_SHARE_WRITE          0x00000020
+#define TEE_DATA_FLAG_EXCLUSIVE            0x00000400
+#define TEE_DATA_MAX_POSITION              0xFFFFFFFF
+#define TEE_OBJECT_ID_MAX_LEN              64
+#define TEE_USAGE_EXTRACTABLE              0x00000001
+#define TEE_USAGE_ENCRYPT                  0x00000002
+#define TEE_USAGE_DECRYPT                  0x00000004
+#define TEE_USAGE_MAC                      0x00000008
+#define TEE_USAGE_SIGN                     0x00000010
+#define TEE_USAGE_VERIFY                   0x00000020
+#define TEE_USAGE_DERIVE                   0x00000040
+#define TEE_HANDLE_FLAG_PERSISTENT         0x00010000
+#define TEE_HANDLE_FLAG_INITIALIZED        0x00020000
+#define TEE_HANDLE_FLAG_KEY_SET            0x00040000
+#define TEE_HANDLE_FLAG_EXPECT_TWO_KEYS    0x00080000
+#define TEE_OPERATION_CIPHER               1
+#define TEE_OPERATION_MAC                  3
+#define TEE_OPERATION_AE                   4
+#define TEE_OPERATION_DIGEST               5
+#define TEE_OPERATION_ASYMMETRIC_CIPHER    6
+#define TEE_OPERATION_ASYMMETRIC_SIGNATURE 7
+#define TEE_OPERATION_KEY_DERIVATION       8
+#define TEE_OPERATION_STATE_INITIAL        0x00000000
+#define TEE_OPERATION_STATE_ACTIVE         0x00000001
+
+/* Algorithm Identifiers */
+#define TEE_ALG_AES_ECB_NOPAD                   0x10000010
+#define TEE_ALG_AES_CBC_NOPAD                   0x10000110
+#define TEE_ALG_AES_CTR                         0x10000210
+#define TEE_ALG_AES_CTS                         0x10000310
+#define TEE_ALG_AES_XTS                         0x10000410
+#define TEE_ALG_AES_CBC_MAC_NOPAD               0x30000110
+#define TEE_ALG_AES_CBC_MAC_PKCS5               0x30000510
+#define TEE_ALG_AES_CMAC                        0x30000610
+#define TEE_ALG_AES_CCM                         0x40000710
+#define TEE_ALG_AES_GCM                         0x40000810
+#define TEE_ALG_DES_ECB_NOPAD                   0x10000011
+#define TEE_ALG_DES_CBC_NOPAD                   0x10000111
+#define TEE_ALG_DES_CBC_MAC_NOPAD               0x30000111
+#define TEE_ALG_DES_CBC_MAC_PKCS5               0x30000511
+#define TEE_ALG_DES3_ECB_NOPAD                  0x10000013
+#define TEE_ALG_DES3_CBC_NOPAD                  0x10000113
+#define TEE_ALG_DES3_CBC_MAC_NOPAD              0x30000113
+#define TEE_ALG_DES3_CBC_MAC_PKCS5              0x30000513
+#define TEE_ALG_RSASSA_PKCS1_V1_5_MD5           0x70001830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA1          0x70002830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA224        0x70003830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA256        0x70004830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA384        0x70005830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_SHA512        0x70006830
+#define TEE_ALG_RSASSA_PKCS1_V1_5_MD5SHA1       0x7000F830
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA1      0x70212930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA224    0x70313930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA256    0x70414930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA384    0x70515930
+#define TEE_ALG_RSASSA_PKCS1_PSS_MGF1_SHA512    0x70616930
+#define TEE_ALG_RSAES_PKCS1_V1_5                0x60000130
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA1      0x60210230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA224    0x60310230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA256    0x60410230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA384    0x60510230
+#define TEE_ALG_RSAES_PKCS1_OAEP_MGF1_SHA512    0x60610230
+#define TEE_ALG_RSA_NOPAD                       0x60000030
+#define TEE_ALG_DSA_SHA1                        0x70002131
+#define TEE_ALG_DSA_SHA224                      0x70003131
+#define TEE_ALG_DSA_SHA256                      0x70004131
+#define TEE_ALG_DH_DERIVE_SHARED_SECRET         0x80000032
+#define TEE_ALG_MD5                             0x50000001
+#define TEE_ALG_SHA1                            0x50000002
+#define TEE_ALG_SHA224                          0x50000003
+#define TEE_ALG_SHA256                          0x50000004
+#define TEE_ALG_SHA384                          0x50000005
+#define TEE_ALG_SHA512                          0x50000006
+#define TEE_ALG_MD5SHA1                         0x5000000F
+#define TEE_ALG_HMAC_MD5                        0x30000001
+#define TEE_ALG_HMAC_SHA1                       0x30000002
+#define TEE_ALG_HMAC_SHA224                     0x30000003
+#define TEE_ALG_HMAC_SHA256                     0x30000004
+#define TEE_ALG_HMAC_SHA384                     0x30000005
+#define TEE_ALG_HMAC_SHA512                     0x30000006
+#define TEE_ALG_ECDSA_P192                      0x70001042
+#define TEE_ALG_ECDSA_P224                      0x70002042
+#define TEE_ALG_ECDSA_P256                      0x70003042
+#define TEE_ALG_ECDSA_P384                      0x70004042
+#define TEE_ALG_ECDSA_P521                      0x70005042
+#define TEE_ALG_ECDH_P192                       0x80001042
+#define TEE_ALG_ECDH_P224                       0x80002042
+#define TEE_ALG_ECDH_P256                       0x80003042
+#define TEE_ALG_ECDH_P384                       0x80004042
+#define TEE_ALG_ECDH_P521                       0x80005042
+
+/* Object Types */
+
+#define TEE_TYPE_AES                        0xA0000010
+#define TEE_TYPE_DES                        0xA0000011
+#define TEE_TYPE_DES3                       0xA0000013
+#define TEE_TYPE_HMAC_MD5                   0xA0000001
+#define TEE_TYPE_HMAC_SHA1                  0xA0000002
+#define TEE_TYPE_HMAC_SHA224                0xA0000003
+#define TEE_TYPE_HMAC_SHA256                0xA0000004
+#define TEE_TYPE_HMAC_SHA384                0xA0000005
+#define TEE_TYPE_HMAC_SHA512                0xA0000006
+#define TEE_TYPE_RSA_PUBLIC_KEY             0xA0000030
+#define TEE_TYPE_RSA_KEYPAIR                0xA1000030
+#define TEE_TYPE_DSA_PUBLIC_KEY             0xA0000031
+#define TEE_TYPE_DSA_KEYPAIR                0xA1000031
+#define TEE_TYPE_DH_KEYPAIR                 0xA1000032
+#define TEE_TYPE_ECDSA_PUBLIC_KEY           0xA0000041
+#define TEE_TYPE_ECDSA_KEYPAIR              0xA1000041
+#define TEE_TYPE_ECDH_PUBLIC_KEY            0xA0000042
+#define TEE_TYPE_ECDH_KEYPAIR               0xA1000042
+#define TEE_TYPE_GENERIC_SECRET             0xA0000000
+#define TEE_TYPE_CORRUPTED_OBJECT           0xA00000BE
+#define TEE_TYPE_DATA                       0xA00000BF
+
+/* List of Object or Operation Attributes */
+
+#define TEE_ATTR_SECRET_VALUE               0xC0000000
+#define TEE_ATTR_RSA_MODULUS                0xD0000130
+#define TEE_ATTR_RSA_PUBLIC_EXPONENT        0xD0000230
+#define TEE_ATTR_RSA_PRIVATE_EXPONENT       0xC0000330
+#define TEE_ATTR_RSA_PRIME1                 0xC0000430
+#define TEE_ATTR_RSA_PRIME2                 0xC0000530
+#define TEE_ATTR_RSA_EXPONENT1              0xC0000630
+#define TEE_ATTR_RSA_EXPONENT2              0xC0000730
+#define TEE_ATTR_RSA_COEFFICIENT            0xC0000830
+#define TEE_ATTR_DSA_PRIME                  0xD0001031
+#define TEE_ATTR_DSA_SUBPRIME               0xD0001131
+#define TEE_ATTR_DSA_BASE                   0xD0001231
+#define TEE_ATTR_DSA_PUBLIC_VALUE           0xD0000131
+#define TEE_ATTR_DSA_PRIVATE_VALUE          0xC0000231
+#define TEE_ATTR_DH_PRIME                   0xD0001032
+#define TEE_ATTR_DH_SUBPRIME                0xD0001132
+#define TEE_ATTR_DH_BASE                    0xD0001232
+#define TEE_ATTR_DH_X_BITS                  0xF0001332
+#define TEE_ATTR_DH_PUBLIC_VALUE            0xD0000132
+#define TEE_ATTR_DH_PRIVATE_VALUE           0xC0000232
+#define TEE_ATTR_RSA_OAEP_LABEL             0xD0000930
+#define TEE_ATTR_RSA_PSS_SALT_LENGTH        0xF0000A30
+#define TEE_ATTR_ECC_PUBLIC_VALUE_X         0xD0000141
+#define TEE_ATTR_ECC_PUBLIC_VALUE_Y         0xD0000241
+#define TEE_ATTR_ECC_PRIVATE_VALUE          0xC0000341
+#define TEE_ATTR_ECC_CURVE                  0xF0000441
+
+#define TEE_ATTR_BIT_PROTECTED		(1 << 28)
+#define TEE_ATTR_BIT_VALUE		(1 << 29)
+
+/* Panicked Functions Identification */
+/* TA Interface */
+#define TEE_PANIC_ID_TA_CLOSESESSIONENTRYPOINT      0x00000101
+#define TEE_PANIC_ID_TA_CREATEENTRYPOINT            0x00000102
+#define TEE_PANIC_ID_TA_DESTROYENTRYPOINT           0x00000103
+#define TEE_PANIC_ID_TA_INVOKECOMMANDENTRYPOINT     0x00000104
+#define TEE_PANIC_ID_TA_OPENSESSIONENTRYPOINT       0x00000105
+/* Property Access */
+#define TEE_PANIC_ID_TEE_ALLOCATEPROPERTYENUMERATOR 0x00000201
+#define TEE_PANIC_ID_TEE_FREEPROPERTYENUMERATOR     0x00000202
+#define TEE_PANIC_ID_TEE_GETNEXTPROPERTY            0x00000203
+#define TEE_PANIC_ID_TEE_GETPROPERTYASBINARYBLOCK   0x00000204
+#define TEE_PANIC_ID_TEE_GETPROPERTYASBOOL          0x00000205
+#define TEE_PANIC_ID_TEE_GETPROPERTYASIDENTITY      0x00000206
+#define TEE_PANIC_ID_TEE_GETPROPERTYASSTRING        0x00000207
+#define TEE_PANIC_ID_TEE_GETPROPERTYASU32           0x00000208
+#define TEE_PANIC_ID_TEE_GETPROPERTYASUUID          0x00000209
+#define TEE_PANIC_ID_TEE_GETPROPERTYNAME            0x0000020A
+#define TEE_PANIC_ID_TEE_RESETPROPERTYENUMERATOR    0x0000020B
+#define TEE_PANIC_ID_TEE_STARTPROPERTYENUMERATOR    0x0000020C
+/* Panic Function */
+#define TEE_PANIC_ID_TEE_PANIC                      0x00000301
+/* Internal Client API */
+#define TEE_PANIC_ID_TEE_CLOSETASESSION             0x00000401
+#define TEE_PANIC_ID_TEE_INVOKETACOMMAND            0x00000402
+#define TEE_PANIC_ID_TEE_OPENTASESSION              0x00000403
+/* Cancellation */
+#define TEE_PANIC_ID_TEE_GETCANCELLATIONFLAG        0x00000501
+#define TEE_PANIC_ID_TEE_MASKCANCELLATION           0x00000502
+#define TEE_PANIC_ID_TEE_UNMASKCANCELLATION         0x00000503
+/* Memory Management */
+#define TEE_PANIC_ID_TEE_CHECKMEMORYACCESSRIGHTS    0x00000601
+#define TEE_PANIC_ID_TEE_FREE                       0x00000602
+#define TEE_PANIC_ID_TEE_GETINSTANCEDATA            0x00000603
+#define TEE_PANIC_ID_TEE_MALLOC                     0x00000604
+#define TEE_PANIC_ID_TEE_MEMCOMPARE                 0x00000605
+#define TEE_PANIC_ID_TEE_MEMFILL                    0x00000606
+#define TEE_PANIC_ID_TEE_MEMMOVE                    0x00000607
+#define TEE_PANIC_ID_TEE_REALLOC                    0x00000608
+#define TEE_PANIC_ID_TEE_SETINSTANCEDATA            0x00000609
+/* Generic Object */
+#define TEE_PANIC_ID_TEE_CLOSEOBJECT                0x00000701
+#define TEE_PANIC_ID_TEE_GETOBJECTBUFFERATTRIBUTE   0x00000702
+/* deprecated */
+#define TEE_PANIC_ID_TEE_GETOBJECTINFO              0x00000703
+#define TEE_PANIC_ID_TEE_GETOBJECTVALUEATTRIBUTE    0x00000704
+/* deprecated */
+#define TEE_PANIC_ID_TEE_RESTRICTOBJECTUSAGE        0x00000705
+#define TEE_PANIC_ID_TEE_GETOBJECTINFO1             0x00000706
+#define TEE_PANIC_ID_TEE_RESTRICTOBJECTUSAGE1       0x00000707
+/* Transient Object */
+#define TEE_PANIC_ID_TEE_ALLOCATETRANSIENTOBJECT    0x00000801
+/* deprecated */
+#define TEE_PANIC_ID_TEE_COPYOBJECTATTRIBUTES       0x00000802
+#define TEE_PANIC_ID_TEE_FREETRANSIENTOBJECT        0x00000803
+#define TEE_PANIC_ID_TEE_GENERATEKEY                0x00000804
+#define TEE_PANIC_ID_TEE_INITREFATTRIBUTE           0x00000805
+#define TEE_PANIC_ID_TEE_INITVALUEATTRIBUTE         0x00000806
+#define TEE_PANIC_ID_TEE_POPULATETRANSIENTOBJECT    0x00000807
+#define TEE_PANIC_ID_TEE_RESETTRANSIENTOBJECT       0x00000808
+#define TEE_PANIC_ID_TEE_COPYOBJECTATTRIBUTES1      0x00000809
+/* Persistent Object */
+/* deprecated */
+#define TEE_PANIC_ID_TEE_CLOSEANDDELETEPERSISTENTOBJECT  0x00000901
+#define TEE_PANIC_ID_TEE_CREATEPERSISTENTOBJECT          0x00000902
+#define TEE_PANIC_ID_TEE_OPENPERSISTENTOBJECT            0x00000903
+#define TEE_PANIC_ID_TEE_RENAMEPERSISTENTOBJECT          0x00000904
+#define TEE_PANIC_ID_TEE_CLOSEANDDELETEPERSISTENTOBJECT1 0x00000905
+/* Persistent Object Enumeration */
+#define TEE_PANIC_ID_TEE_ALLOCATEPERSISTENTOBJECTENUMERATOR 0x00000A01
+#define TEE_PANIC_ID_TEE_FREEPERSISTENTOBJECTENUMERATOR     0x00000A02
+#define TEE_PANIC_ID_TEE_GETNEXTPERSISTENTOBJECT            0x00000A03
+#define TEE_PANIC_ID_TEE_RESETPERSISTENTOBJECTENUMERATOR    0x00000A04
+#define TEE_PANIC_ID_TEE_STARTPERSISTENTOBJECTENUMERATOR    0x00000A05
+/* Data Stream Access */
+#define TEE_PANIC_ID_TEE_READOBJECTDATA             0x00000B01
+#define TEE_PANIC_ID_TEE_SEEKOBJECTDATA             0x00000B02
+#define TEE_PANIC_ID_TEE_TRUNCATEOBJECTDATA         0x00000B03
+#define TEE_PANIC_ID_TEE_WRITEOBJECTDATA            0x00000B04
+/* Generic Operation */
+#define TEE_PANIC_ID_TEE_ALLOCATEOPERATION          0x00000C01
+#define TEE_PANIC_ID_TEE_COPYOPERATION              0x00000C02
+#define TEE_PANIC_ID_TEE_FREEOPERATION              0x00000C03
+#define TEE_PANIC_ID_TEE_GETOPERATIONINFO           0x00000C04
+#define TEE_PANIC_ID_TEE_RESETOPERATION             0x00000C05
+#define TEE_PANIC_ID_TEE_SETOPERATIONKEY            0x00000C06
+#define TEE_PANIC_ID_TEE_SETOPERATIONKEY2           0x00000C07
+#define TEE_PANIC_ID_TEE_GETOPERATIONINFOMULTIPLE   0x00000C08
+/* Message Digest */
+#define TEE_PANIC_ID_TEE_DIGESTDOFINAL              0x00000D01
+#define TEE_PANIC_ID_TEE_DIGESTUPDATE               0x00000D02
+/* Symmetric Cipher */
+#define TEE_PANIC_ID_TEE_CIPHERDOFINAL              0x00000E01
+#define TEE_PANIC_ID_TEE_CIPHERINIT                 0x00000E02
+#define TEE_PANIC_ID_TEE_CIPHERUPDATE               0x00000E03
+/* MAC */
+#define TEE_PANIC_ID_TEE_MACCOMPAREFINAL            0x00000F01
+#define TEE_PANIC_ID_TEE_MACCOMPUTEFINAL            0x00000F02
+#define TEE_PANIC_ID_TEE_MACINIT                    0x00000F03
+#define TEE_PANIC_ID_TEE_MACUPDATE                  0x00000F04
+/* Authenticated Encryption */
+#define TEE_PANIC_ID_TEE_AEDECRYPTFINAL             0x00001001
+#define TEE_PANIC_ID_TEE_AEENCRYPTFINAL             0x00001002
+#define TEE_PANIC_ID_TEE_AEINIT                     0x00001003
+#define TEE_PANIC_ID_TEE_AEUPDATE                   0x00001004
+#define TEE_PANIC_ID_TEE_AEUPDATEAAD                0x00001005
+/* Asymmetric */
+#define TEE_PANIC_ID_TEE_ASYMMETRICDECRYPT          0x00001101
+#define TEE_PANIC_ID_TEE_ASYMMETRICENCRYPT          0x00001102
+#define TEE_PANIC_ID_TEE_ASYMMETRICSIGNDIGEST       0x00001103
+#define TEE_PANIC_ID_TEE_ASYMMETRICVERIFYDIGEST     0x00001104
+/* Key Derivation */
+#define TEE_PANIC_ID_TEE_DERIVEKEY                  0x00001201
+/* Random Data Generation */
+#define TEE_PANIC_ID_TEE_GENERATERANDOM             0x00001301
+/* Time */
+#define TEE_PANIC_ID_TEE_GETREETIME                 0x00001401
+#define TEE_PANIC_ID_TEE_GETSYSTEMTIME              0x00001402
+#define TEE_PANIC_ID_TEE_GETTAPERSISTENTTIME        0x00001403
+#define TEE_PANIC_ID_TEE_SETTAPERSISTENTTIME        0x00001404
+#define TEE_PANIC_ID_TEE_WAIT                       0x00001405
+/* Memory Allocation and Size of Objects */
+#define TEE_PANIC_ID_TEE_BIGINTFMMCONTEXTSIZEINU32  0x00001501
+#define TEE_PANIC_ID_TEE_BIGINTFMMSIZEINU32         0x00001502
+/* Initialization */
+#define TEE_PANIC_ID_TEE_BIGINTINIT                 0x00001601
+#define TEE_PANIC_ID_TEE_BIGINTINITFMM              0x00001602
+#define TEE_PANIC_ID_TEE_BIGINTINITFMMCONTEXT       0x00001603
+/* Converter */
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTFROMOCTETSTRING 0x00001701
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTFROMS32         0x00001702
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTTOOCTETSTRING   0x00001703
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTTOS32           0x00001704
+/* Logical Operation */
+#define TEE_PANIC_ID_TEE_BIGINTCMP                  0x00001801
+#define TEE_PANIC_ID_TEE_BIGINTCMPS32               0x00001802
+#define TEE_PANIC_ID_TEE_BIGINTGETBIT               0x00001803
+#define TEE_PANIC_ID_TEE_BIGINTGETBITCOUNT          0x00001804
+#define TEE_PANIC_ID_TEE_BIGINTSHIFTRIGHT           0x00001805
+/* Basic Arithmetic */
+#define TEE_PANIC_ID_TEE_BIGINTADD                  0x00001901
+#define TEE_PANIC_ID_TEE_BIGINTDIV                  0x00001902
+#define TEE_PANIC_ID_TEE_BIGINTMUL                  0x00001903
+#define TEE_PANIC_ID_TEE_BIGINTNEG                  0x00001904
+#define TEE_PANIC_ID_TEE_BIGINTSQUARE               0x00001905
+#define TEE_PANIC_ID_TEE_BIGINTSUB                  0x00001906
+/* Modular Arithmetic */
+#define TEE_PANIC_ID_TEE_BIGINTADDMOD               0x00001A01
+#define TEE_PANIC_ID_TEE_BIGINTINVMOD               0x00001A02
+#define TEE_PANIC_ID_TEE_BIGINTMOD                  0x00001A03
+#define TEE_PANIC_ID_TEE_BIGINTMULMOD               0x00001A04
+#define TEE_PANIC_ID_TEE_BIGINTSQUAREMOD            0x00001A05
+#define TEE_PANIC_ID_TEE_BIGINTSUBMOD               0x00001A06
+/* Other Arithmetic */
+#define TEE_PANIC_ID_TEE_BIGINTCOMPUTEEXTENDEDGCD   0x00001B01
+#define TEE_PANIC_ID_TEE_BIGINTISPROBABLEPRIME      0x00001B02
+#define TEE_PANIC_ID_TEE_BIGINTRELATIVEPRIME        0x00001B03
+/* Fast Modular Multiplication */
+#define TEE_PANIC_ID_TEE_BIGINTCOMPUTEFMM           0x00001C01
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTFROMFMM       0x00001C02
+#define TEE_PANIC_ID_TEE_BIGINTCONVERTTOFMM         0x00001C03
+
+/*
+ * The macro TEE_PARAM_TYPES can be used to construct a value that you can
+ * compare against an incoming paramTypes to check the type of all the
+ * parameters in one comparison, like in the following example:
+ * if (paramTypes != TEE_PARAM_TYPES(TEE_PARAM_TYPE_MEMREF_INPUT,
+ *                                  TEE_PARAM_TYPE_MEMREF_OUPUT,
+ *                                  TEE_PARAM_TYPE_NONE, TEE_PARAM_TYPE_NONE)) {
+ *      return TEE_ERROR_BAD_PARAMETERS;
+ *  }
+ */
+#define TEE_PARAM_TYPES(t0, t1, t2, t3) \
+	((t0) | ((t1) << 4) | ((t2) << 8) | ((t3) << 12))
+
+/*
+ * The macro TEE_PARAM_TYPE_GET can be used to extract the type of a given
+ * parameter from paramTypes if you need more fine-grained type checking.
+ */
+#define TEE_PARAM_TYPE_GET(t, i) ((((uint32_t)t) >> ((i)*4)) & 0xF)
+
+/*
+ * The macro TEE_PARAM_TYPE_SET can be used to load the type of a given
+ * parameter from paramTypes without specifying all types (TEE_PARAM_TYPES)
+ */
+#define TEE_PARAM_TYPE_SET(t, i) (((uint32_t)(t) & 0xF) << ((i)*4))
+
+/* Not specified in the standard */
+#define TEE_NUM_PARAMS  4
+
+/* TEE Arithmetical APIs */
+
+#define TEE_BigIntSizeInU32(n) ((((n)+31)/32)+2)
+
+#endif /* TEE_API_DEFINES_H */
diff --git a/include/optee_include/tee_api_types.h b/include/optee_include/tee_api_types.h
new file mode 100644
index 0000000000..d33b69fd06
--- /dev/null
+++ b/include/optee_include/tee_api_types.h
@@ -0,0 +1,199 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/* Based on GP TEE Internal API Specification Version 0.11 */
+#ifndef TEE_API_TYPES_H
+#define TEE_API_TYPES_H
+
+#include <optee_include/tee_base_types.h>
+#include <optee_include/tee_api_defines.h>
+
+
+/*
+ * Common Definitions
+ */
+
+typedef uint32_t TEE_Result;
+
+typedef struct {
+	uint32_t timeLow;
+	uint16_t timeMid;
+	uint16_t timeHiAndVersion;
+	uint8_t clockSeqAndNode[8];
+} TEE_UUID;
+
+/*
+ * The TEE_Identity structure defines the full identity of a Client:
+ * - login is one of the TEE_LOGIN_XXX constants
+ * - uuid contains the client UUID or Nil if not applicable
+ */
+typedef struct {
+	uint32_t login;
+	TEE_UUID uuid;
+} TEE_Identity;
+
+/*
+ * This union describes one parameter passed by the Trusted Core Framework
+ * to the entry points TA_OpenSessionEntryPoint or
+ * TA_InvokeCommandEntryPoint or by the TA to the functions
+ * TEE_OpenTASession or TEE_InvokeTACommand.
+ *
+ * Which of the field value or memref to select is determined by the
+ * parameter type specified in the argument paramTypes passed to the entry
+ * point.
+*/
+typedef union {
+	struct {
+		void *buffer;
+		uint32_t size;
+	} memref;
+	struct {
+		uint32_t a;
+		uint32_t b;
+	} value;
+} TEE_Param;
+
+/*
+ * The type of opaque handles on TA Session. These handles are returned by
+ * the function TEE_OpenTASession.
+ */
+typedef struct __TEE_TASessionHandle *TEE_TASessionHandle;
+
+/*
+ * The type of opaque handles on property sets or enumerators. These
+ * handles are either one of the pseudo handles TEE_PROPSET_XXX or are
+ * returned by the function TEE_AllocatePropertyEnumerator.
+*/
+typedef struct __TEE_PropSetHandle *TEE_PropSetHandle;
+
+typedef struct __TEE_ObjectHandle *TEE_ObjectHandle;
+typedef struct __TEE_ObjectEnumHandle *TEE_ObjectEnumHandle;
+typedef struct __TEE_OperationHandle *TEE_OperationHandle;
+
+/*
+ * Storage Definitions
+ */
+
+typedef uint32_t TEE_ObjectType;
+
+typedef struct {
+	uint32_t objectType;
+	uint32_t keySize;
+	uint32_t maxKeySize;
+	uint32_t objectUsage;
+	uint32_t dataSize;
+	uint32_t dataPosition;
+	uint32_t handleFlags;
+} TEE_ObjectInfo;
+
+typedef enum {
+	TEE_DATA_SEEK_SET = 0,
+	TEE_DATA_SEEK_CUR = 1,
+	TEE_DATA_SEEK_END = 2
+} TEE_Whence;
+
+typedef struct {
+	uint32_t attributeID;
+	union {
+		struct {
+			void *buffer;
+			uint32_t length;
+		} ref;
+		struct {
+			uint32_t a, b;
+		} value;
+	} content;
+} TEE_Attribute;
+
+/* Cryptographic Operations API */
+
+typedef enum {
+	TEE_MODE_ENCRYPT = 0,
+	TEE_MODE_DECRYPT = 1,
+	TEE_MODE_SIGN = 2,
+	TEE_MODE_VERIFY = 3,
+	TEE_MODE_MAC = 4,
+	TEE_MODE_DIGEST = 5,
+	TEE_MODE_DERIVE = 6
+} TEE_OperationMode;
+
+typedef struct {
+	uint32_t algorithm;
+	uint32_t operationClass;
+	uint32_t mode;
+	uint32_t digestLength;
+	uint32_t maxKeySize;
+	uint32_t keySize;
+	uint32_t requiredKeyUsage;
+	uint32_t handleState;
+} TEE_OperationInfo;
+
+typedef struct {
+	uint32_t keySize;
+	uint32_t requiredKeyUsage;
+} TEE_OperationInfoKey;
+
+typedef struct {
+	uint32_t algorithm;
+	uint32_t operationClass;
+	uint32_t mode;
+	uint32_t digestLength;
+	uint32_t maxKeySize;
+	uint32_t handleState;
+	uint32_t operationState;
+	uint32_t numberOfKeys;
+	TEE_OperationInfoKey keyInformation[];
+} TEE_OperationInfoMultiple;
+
+/* Time & Date API */
+
+typedef struct {
+	uint32_t seconds;
+	uint32_t millis;
+} TEE_Time;
+
+/* TEE Arithmetical APIs */
+
+typedef uint32_t TEE_BigInt;
+
+typedef uint32_t TEE_BigIntFMM;
+
+typedef uint32_t TEE_BigIntFMMContext;
+
+/* Tee Secure Element APIs */
+
+typedef struct __TEE_SEServiceHandle *TEE_SEServiceHandle;
+typedef struct __TEE_SEReaderHandle *TEE_SEReaderHandle;
+typedef struct __TEE_SESessionHandle *TEE_SESessionHandle;
+typedef struct __TEE_SEChannelHandle *TEE_SEChannelHandle;
+
+typedef struct {
+	bool sePresent;
+	bool teeOnly;
+	bool selectResponseEnable;
+} TEE_SEReaderProperties;
+
+typedef struct {
+	uint8_t *buffer;
+	size_t bufferLen;
+} TEE_SEAID;
+
+/* Other definitions */
+typedef uint32_t TEE_ErrorOrigin;
+typedef void *TEE_Session;
+
+#define TEE_MEM_INPUT   0x00000001
+#define TEE_MEM_OUTPUT  0x00000002
+
+#define TEE_MEMREF_0_USED  0x00000001
+#define TEE_MEMREF_1_USED  0x00000002
+#define TEE_MEMREF_2_USED  0x00000004
+#define TEE_MEMREF_3_USED  0x00000008
+
+#define TEE_SE_READER_NAME_MAX	20
+
+#endif /* TEE_API_TYPES_H */
diff --git a/include/optee_include/tee_base_types.h b/include/optee_include/tee_base_types.h
new file mode 100644
index 0000000000..f7053dc477
--- /dev/null
+++ b/include/optee_include/tee_base_types.h
@@ -0,0 +1,2 @@
+#include <linux/types.h>
+
diff --git a/include/optee_include/tee_client_api.h b/include/optee_include/tee_client_api.h
new file mode 100644
index 0000000000..7d2af2eda2
--- /dev/null
+++ b/include/optee_include/tee_client_api.h
@@ -0,0 +1,531 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEE_CLIENT_API_H
+#define TEE_CLIENT_API_H
+
+#include <optee_include/tee_base_types.h>
+/*
+ * Defines the number of available memory references in an open session or
+ * invoke command operation payload.
+ */
+#define TEEC_CONFIG_PAYLOAD_REF_COUNT 4
+
+/**
+ * Defines the maximum size of a single shared memory block, in bytes, of both
+ * API allocated and API registered memory. The size is currently set to
+ * 512 * kB (512 * 1024).
+ */
+#define TEEC_CONFIG_SHAREDMEM_MAX_SIZE 0x8000
+
+/**
+ * Flag constants indicating the type of parameters encoded inside the
+ * operation payload (TEEC_Operation), Type is uint32_t.
+ *
+ * TEEC_NONE                   The Parameter is not used
+ *
+ * TEEC_VALUE_INPUT            The Parameter is a TEEC_Value tagged as input.
+ *
+ * TEEC_VALUE_OUTPUT           The Parameter is a TEEC_Value tagged as output.
+ *
+ * TEEC_VALUE_INOUT            The Parameter is a TEEC_Value tagged as both as
+ *                             input and output, i.e., for which both the
+ *                             behaviors of TEEC_VALUE_INPUT and
+ *                             TEEC_VALUE_OUTPUT apply.
+ *
+ * TEEC_MEMREF_TEMP_INPUT      The Parameter is a TEEC_TempMemoryReference
+ *                             describing a region of memory which needs to be
+ *                             temporarily registered for the duration of the
+ *                             Operation and is tagged as input.
+ *
+ * TEEC_MEMREF_TEMP_OUTPUT     Same as TEEC_MEMREF_TEMP_INPUT, but the Memory
+ *                             Reference is tagged as output. The
+ *                             Implementation may update the size field to
+ *                             reflect the required output size in some use
+ *                             cases.
+ *
+ * TEEC_MEMREF_TEMP_INOUT      A Temporary Memory Reference tagged as both
+ *                             input and output, i.e., for which both the
+ *                             behaviors of TEEC_MEMREF_TEMP_INPUT and
+ *                             TEEC_MEMREF_TEMP_OUTPUT apply.
+ *
+ * TEEC_MEMREF_WHOLE           The Parameter is a Registered Memory Reference
+ *                             that refers to the entirety of its parent Shared
+ *                             Memory block. The parameter structure is a
+ *                             TEEC_MemoryReference. In this structure, the
+ *                             Implementation MUST read only the parent field
+ *                             and MAY update the size field when the operation
+ *                             completes.
+ *
+ * TEEC_MEMREF_PARTIAL_INPUT   A Registered Memory Reference structure that
+ *                             refers to a partial region of its parent Shared
+ *                             Memory block and is tagged as input.
+ *
+ * TEEC_MEMREF_PARTIAL_OUTPUT  Registered Memory Reference structure that
+ *                             refers to a partial region of its parent Shared
+ *                             Memory block and is tagged as output.
+ *
+ * TEEC_MEMREF_PARTIAL_INOUT   The Registered Memory Reference structure that
+ *                             refers to a partial region of its parent Shared
+ *                             Memory block and is tagged as both input and
+ *                             output, i.e., for which both the behaviors of
+ *                             TEEC_MEMREF_PARTIAL_INPUT and
+ *                             TEEC_MEMREF_PARTIAL_OUTPUT apply.
+ */
+#define TEEC_NONE                   0x00000000
+#define TEEC_VALUE_INPUT            0x00000001
+#define TEEC_VALUE_OUTPUT           0x00000002
+#define TEEC_VALUE_INOUT            0x00000003
+#define TEEC_MEMREF_TEMP_INPUT      0x00000005
+#define TEEC_MEMREF_TEMP_OUTPUT     0x00000006
+#define TEEC_MEMREF_TEMP_INOUT      0x00000007
+#define TEEC_MEMREF_WHOLE           0x0000000C
+#define TEEC_MEMREF_PARTIAL_INPUT   0x0000000D
+#define TEEC_MEMREF_PARTIAL_OUTPUT  0x0000000E
+#define TEEC_MEMREF_PARTIAL_INOUT   0x0000000F
+
+/**
+ * Flag constants indicating the data transfer direction of memory in
+ * TEEC_Parameter. TEEC_MEM_INPUT signifies data transfer direction from the
+ * client application to the TEE. TEEC_MEM_OUTPUT signifies data transfer
+ * direction from the TEE to the client application. Type is uint32_t.
+ *
+ * TEEC_MEM_INPUT   The Shared Memory can carry data from the client
+ *                  application to the Trusted Application.
+ * TEEC_MEM_OUTPUT  The Shared Memory can carry data from the Trusted
+ *                  Application to the client application.
+ */
+#define TEEC_MEM_INPUT   0x00000001
+#define TEEC_MEM_OUTPUT  0x00000002
+
+/**
+ * Return values. Type is TEEC_Result
+ *
+ * TEEC_SUCCESS                 The operation was successful.
+ * TEEC_ERROR_GENERIC           Non-specific cause.
+ * TEEC_ERROR_ACCESS_DENIED     Access privileges are not sufficient.
+ * TEEC_ERROR_CANCEL            The operation was canceled.
+ * TEEC_ERROR_ACCESS_CONFLICT   Concurrent accesses caused conflict.
+ * TEEC_ERROR_EXCESS_DATA       Too much data for the requested operation was
+ *                              passed.
+ * TEEC_ERROR_BAD_FORMAT        Input data was of invalid format.
+ * TEEC_ERROR_BAD_PARAMETERS    Input parameters were invalid.
+ * TEEC_ERROR_BAD_STATE         Operation is not valid in the current state.
+ * TEEC_ERROR_ITEM_NOT_FOUND    The requested data item is not found.
+ * TEEC_ERROR_NOT_IMPLEMENTED   The requested operation should exist but is not
+ *                              yet implemented.
+ * TEEC_ERROR_NOT_SUPPORTED     The requested operation is valid but is not
+ *                              supported in this implementation.
+ * TEEC_ERROR_NO_DATA           Expected data was missing.
+ * TEEC_ERROR_OUT_OF_MEMORY     System ran out of resources.
+ * TEEC_ERROR_BUSY              The system is busy working on something else.
+ * TEEC_ERROR_COMMUNICATION     Communication with a remote party failed.
+ * TEEC_ERROR_SECURITY          A security fault was detected.
+ * TEEC_ERROR_SHORT_BUFFER      The supplied buffer is too short for the
+ *                              generated output.
+ * TEEC_ERROR_TARGET_DEAD       Trusted Application has panicked
+ *                              during the operation.
+ */
+
+/**
+ *  Standard defined error codes.
+ */
+#define TEEC_SUCCESS                0x00000000
+#define TEEC_ERROR_GENERIC          0xFFFF0000
+#define TEEC_ERROR_ACCESS_DENIED    0xFFFF0001
+#define TEEC_ERROR_CANCEL           0xFFFF0002
+#define TEEC_ERROR_ACCESS_CONFLICT  0xFFFF0003
+#define TEEC_ERROR_EXCESS_DATA      0xFFFF0004
+#define TEEC_ERROR_BAD_FORMAT       0xFFFF0005
+#define TEEC_ERROR_BAD_PARAMETERS   0xFFFF0006
+#define TEEC_ERROR_BAD_STATE        0xFFFF0007
+#define TEEC_ERROR_ITEM_NOT_FOUND   0xFFFF0008
+#define TEEC_ERROR_NOT_IMPLEMENTED  0xFFFF0009
+#define TEEC_ERROR_NOT_SUPPORTED    0xFFFF000A
+#define TEEC_ERROR_NO_DATA          0xFFFF000B
+#define TEEC_ERROR_OUT_OF_MEMORY    0xFFFF000C
+#define TEEC_ERROR_BUSY             0xFFFF000D
+#define TEEC_ERROR_COMMUNICATION    0xFFFF000E
+#define TEEC_ERROR_SECURITY         0xFFFF000F
+#define TEEC_ERROR_SHORT_BUFFER     0xFFFF0010
+#define TEEC_ERROR_TARGET_DEAD      0xFFFF3024
+
+/**
+ * Function error origins, of type TEEC_ErrorOrigin. These indicate where in
+ * the software stack a particular return value originates from.
+ *
+ * TEEC_ORIGIN_API          The error originated within the TEE Client API
+ *                          implementation.
+ * TEEC_ORIGIN_COMMS        The error originated within the underlying
+ *                          communications stack linking the rich OS with
+ *                          the TEE.
+ * TEEC_ORIGIN_TEE          The error originated within the common TEE code.
+ * TEEC_ORIGIN_TRUSTED_APP  The error originated within the Trusted Application
+ *                          code.
+ */
+#define TEEC_ORIGIN_API          0x00000001
+#define TEEC_ORIGIN_COMMS        0x00000002
+#define TEEC_ORIGIN_TEE          0x00000003
+#define TEEC_ORIGIN_TRUSTED_APP  0x00000004
+
+/**
+ * Session login methods, for use in TEEC_OpenSession() as parameter
+ * connectionMethod. Type is uint32_t.
+ *
+ * TEEC_LOGIN_PUBLIC       No login data is provided.
+ * TEEC_LOGIN_USER         Login data about the user running the Client
+ *                         Application process is provided.
+ * TEEC_LOGIN_GROUP        Login data about the group running the Client
+ *                         Application process is provided.
+ * TEEC_LOGIN_APPLICATION  Login data about the running Client Application
+ *                         itself is provided.
+ */
+#define TEEC_LOGIN_PUBLIC       0x00000000
+#define TEEC_LOGIN_USER         0x00000001
+#define TEEC_LOGIN_GROUP        0x00000002
+#define TEEC_LOGIN_APPLICATION  0x00000004
+
+/**
+ * Encode the paramTypes according to the supplied types.
+ *
+ * @param p0 The first param type.
+ * @param p1 The second param type.
+ * @param p2 The third param type.
+ * @param p3 The fourth param type.
+ */
+#define TEEC_PARAM_TYPES(p0, p1, p2, p3) \
+	((p0) | ((p1) << 4) | ((p2) << 8) | ((p3) << 12))
+
+/**
+ * Get the i_th param type from the paramType.
+ *
+ * @param p The paramType.
+ * @param i The i-th parameter to get the type for.
+ */
+#define TEEC_PARAM_TYPE_GET(p, i) (((p) >> (i * 4)) & 0xF)
+
+typedef uint32_t TEEC_Result;
+
+/**
+ * struct TEEC_Context - Represents a connection between a client application
+ * and a TEE.
+ */
+typedef struct {
+	char devname[256];
+	int fd;
+} TEEC_Context;
+
+/**
+ * This type contains a Universally Unique Resource Identifier (UUID) type as
+ * defined in RFC4122. These UUID values are used to identify Trusted
+ * Applications.
+ */
+typedef struct {
+	uint32_t timeLow;
+	uint16_t timeMid;
+	uint16_t timeHiAndVersion;
+	uint8_t clockSeqAndNode[8];
+} TEEC_UUID;
+
+/**
+ * struct TEEC_SharedMemory - Memory to transfer data between a client
+ * application and trusted code.
+ *
+ * @param buffer      The memory buffer which is to be, or has been, shared
+ *                    with the TEE.
+ * @param size        The size, in bytes, of the memory buffer.
+ * @param flags       Bit-vector which holds properties of buffer.
+ *                    The bit-vector can contain either or both of the
+ *                    TEEC_MEM_INPUT and TEEC_MEM_OUTPUT flags.
+ *
+ * A shared memory block is a region of memory allocated in the context of the
+ * client application memory space that can be used to transfer data between
+ * that client application and a trusted application. The user of this struct
+ * is responsible to populate the buffer pointer.
+ */
+typedef struct {
+	void *buffer;
+	size_t size;
+	uint32_t flags;
+	/*
+	 * Implementation-Defined
+	 *
+	 * These represent a pointer to an allocated buffer.
+	 * This can be different from the
+	 * "buffer" above if the caller tried to register
+	 * a buffer rather than allocate one.
+	 */
+	void   *alloc_buffer;
+} TEEC_SharedMemory;
+
+/**
+ * struct TEEC_TempMemoryReference - Temporary memory to transfer data between
+ * a client application and trusted code, only used for the duration of the
+ * operation.
+ *
+ * @param buffer  The memory buffer which is to be, or has been shared with
+ *                the TEE.
+ * @param size    The size, in bytes, of the memory buffer.
+ *
+ * A memory buffer that is registered temporarily for the duration of the
+ * operation to be called.
+ */
+typedef struct {
+	void *buffer;
+	size_t size;
+} TEEC_TempMemoryReference;
+
+/**
+ * struct TEEC_RegisteredMemoryReference - use a pre-registered or
+ * pre-allocated shared memory block of memory to transfer data between
+ * a client application and trusted code.
+ *
+ * @param parent  Points to a shared memory structure. The memory reference
+ *                may utilize the whole shared memory or only a part of it.
+ *                Must not be NULL
+ *
+ * @param size    The size, in bytes, of the memory buffer.
+ *
+ * @param offset  The offset, in bytes, of the referenced memory region from
+ *                the start of the shared memory block.
+ *
+ */
+typedef struct {
+	TEEC_SharedMemory *parent;
+	size_t size;
+	size_t offset;
+} TEEC_RegisteredMemoryReference;
+
+/**
+ * struct TEEC_Value - Small raw data container
+ *
+ * Instead of allocating a shared memory buffer this structure can be used
+ * to pass small raw data between a client application and trusted code.
+ *
+ * @param a  The first integer value.
+ *
+ * @param b  The second second value.
+ */
+typedef struct {
+	uint32_t a;
+	uint32_t b;
+} TEEC_Value;
+
+/**
+ * union TEEC_Parameter - Memory container to be used when passing data between
+ *                        client application and trusted code.
+ *
+ * Either the client uses a shared memory reference, parts of it or a small raw
+ * data container.
+ *
+ * @param tmpref  A temporary memory reference only valid for the duration
+ *                of the operation.
+ *
+ * @param memref  The entire shared memory or parts of it.
+ *
+ * @param value   The small raw data container to use
+ */
+typedef union {
+	TEEC_TempMemoryReference tmpref;
+	TEEC_RegisteredMemoryReference memref;
+	TEEC_Value value;
+} TEEC_Parameter;
+
+/**
+ * struct TEEC_Session - Represents a connection between a client application
+ * and a trusted application.
+ */
+typedef struct {
+	uint32_t id;
+} TEEC_Session;
+
+/**
+ * struct TEEC_Operation - Holds information and memory references used in
+ * TEEC_InvokeCommand().
+ *
+ * @param   started     Client must initialize to zero if it needs to cancel
+ *                      an operation about to be performed.
+ * @param   paramTypes  Type of data passed. Use TEEC_PARAMS_TYPE macro to
+ *                      create the correct flags.
+ *                      0 means TEEC_NONE is passed for all params.
+ * @param   params      Array of parameters of type TEEC_Parameter.
+ * @param   session     Internal pointer to the last session used by
+ *                      TEEC_InvokeCommand with this operation.
+ *
+ */
+typedef struct {
+	uint32_t started;
+	uint32_t paramTypes;
+	TEEC_Parameter params[TEEC_CONFIG_PAYLOAD_REF_COUNT];
+	/* Implementation-Defined */
+	TEEC_Session *session;
+	TEEC_SharedMemory memRefs[TEEC_CONFIG_PAYLOAD_REF_COUNT];
+	uint32_t flags;
+} TEEC_Operation;
+
+/**
+ * TEEC_InitializeContext() - Initializes a context holding connection
+ * information on the specific TEE, designated by the name string.
+
+ * @param name    A zero-terminated string identifying the TEE to connect to.
+ *                If name is set to NULL, the default TEE is connected to. NULL
+ *                is the only supported value in this version of the API
+ *                implementation.
+ *
+ * @param context The context structure which is to be initialized.
+ *
+ * @return TEEC_SUCCESS  The initialization was successful.
+ * @return TEEC_Result   Something failed.
+ */
+TEEC_Result TEEC_InitializeContext(const char *name, TEEC_Context *context);
+
+/**
+ * TEEC_FinalizeContext() - Destroys a context holding connection information
+ * on the specific TEE.
+ *
+ * This function destroys an initialized TEE context, closing the connection
+ * between the client application and the TEE. This function must only be
+ * called when all sessions related to this TEE context have been closed and
+ * all shared memory blocks have been released, otherwise an error will be
+ * returned.
+ *
+ * @param context       The context to be destroyed.
+ *
+ * @return TEEC_SUCCESS The function call was successful.
+ * @return TEEC_Result  Something failed.
+ */
+TEEC_Result TEEC_FinalizeContext(TEEC_Context *context);
+
+/**
+ * TEEC_OpenSession() - Opens a new session with the specified trusted
+ *                      application.
+ *
+ * @param context            The initialized TEE context structure in which
+ *                           scope to open the session.
+ * @param session            The session to initialize.
+ * @param destination        A structure identifying the trusted application
+ *                           with which to open a session.
+ *
+ * @param connectionMethod   The connection method to use.
+ * @param connectionData     Any data necessary to connect with the chosen
+ *                           connection method. Not supported, should be set to
+ *                           NULL.
+ * @param operation          An operation structure to use in the session. May
+ *                           be set to NULL to signify no operation structure
+ *                           needed.
+ *
+ * @param returnOrigin       A parameter which will hold the error origin if
+ *                           this function returns any value other than
+ *                           TEEC_SUCCESS.
+ *
+ * @return TEEC_SUCCESS      OpenSession successfully opened a new session.
+ * @return TEEC_Result       Something failed.
+ *
+ */
+TEEC_Result TEEC_OpenSession(TEEC_Context *context,
+			     TEEC_Session *session,
+			     const TEEC_UUID *destination,
+			     uint32_t connectionMethod,
+			     const void *connectionData,
+			     TEEC_Operation *operation,
+			     uint32_t *returnOrigin);
+
+/**
+ * TEEC_CloseSession() - Closes the session which has been opened with the
+ * specific trusted application.
+ *
+ * @param session The opened session to close.
+ */
+void TEEC_CloseSession(TEEC_Session *session);
+
+/**
+ * TEEC_InvokeCommand() - Executes a command in the specified trusted
+ * application.
+ *
+ * @param session        A handle to an open connection to the trusted
+ *                       application.
+ * @param commandID      Identifier of the command in the trusted application
+ *                       to invoke.
+ * @param operation      An operation structure to use in the invoke command.
+ *                       May be set to NULL to signify no operation structure
+ *                       needed.
+ * @param returnOrigin   A parameter which will hold the error origin if this
+ *                       function returns any value other than TEEC_SUCCESS.
+ *
+ * @return TEEC_SUCCESS  OpenSession successfully opened a new session.
+ * @return TEEC_Result   Something failed.
+ */
+TEEC_Result TEEC_InvokeCommand(TEEC_Session *session,
+			       uint32_t commandID,
+			       TEEC_Operation *operation,
+			       uint32_t *returnOrigin);
+
+/**
+ * TEEC_RegisterSharedMemory() - Register a block of existing memory as a
+ * shared block within the scope of the specified context.
+ *
+ * @param context    The initialized TEE context structure in which scope to
+ *                   open the session.
+ * @param sharedMem  pointer to the shared memory structure to register.
+ *
+ * @return TEEC_SUCCESS              The registration was successful.
+ * @return TEEC_ERROR_OUT_OF_MEMORY  Memory exhaustion.
+ * @return TEEC_Result               Something failed.
+ */
+TEEC_Result TEEC_RegisterSharedMemory(TEEC_Context *context,
+				      TEEC_SharedMemory *sharedMem);
+
+/**
+ * TEEC_AllocateSharedMemory() - Allocate shared memory for TEE.
+ *
+ * @param context     The initialized TEE context structure in which scope to
+ *                    open the session.
+ * @param sharedMem   Pointer to the allocated shared memory.
+ *
+ * @return TEEC_SUCCESS              The registration was successful.
+ * @return TEEC_ERROR_OUT_OF_MEMORY  Memory exhaustion.
+ * @return TEEC_Result               Something failed.
+ */
+TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
+				      TEEC_SharedMemory *sharedMem);
+
+/**
+ * TEEC_ReleaseSharedMemory() - Free or deregister the shared memory.
+ *
+ * @param sharedMem  Pointer to the shared memory to be freed.
+ */
+void TEEC_ReleaseSharedMemory(TEEC_SharedMemory *sharedMemory);
+
+/**
+ * TEEC_RequestCancellation() - Request the cancellation of a pending open
+ *                              session or command invocation.
+ *
+ * @param operation Pointer to an operation previously passed to open session
+ *                  or invoke.
+ */
+void TEEC_RequestCancellation(TEEC_Operation *operation);
+
+/**
+ * Register a pre-allocated Trusted Application This is mainly intended for
+ * OS-FREE contexts or when a filesystem is not available.
+ *
+ * @param ta   Pointer to the trusted application binary
+ * @param size The size of the TA binary
+ *
+ * @return TEEC_SUCCESS if successful.
+ * @return TEEC_Result something failed.
+ */
+TEEC_Result TEEC_RegisterTA(const void *ta, const size_t size);
+
+/**
+ * Unregister a pre-allocated Trusted Application This is mainly intended for
+ * OS-FREE contexts or when a filesystem is not available.
+ *
+ * @param ta Pointer to the trusted application binary
+ */
+void TEEC_UnregisterTA(const void *ta);
+
+#endif
diff --git a/include/optee_include/tee_rpc.h b/include/optee_include/tee_rpc.h
new file mode 100644
index 0000000000..c6ddc6b3c1
--- /dev/null
+++ b/include/optee_include/tee_rpc.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEE_RPC_H
+#define TEE_RPC_H
+
+#include <optee_include/tee_base_types.h>
+/*
+ * tee_rpc_invoke cmd definitions, keep in sync with tee-supplicant
+ */
+#define TEE_RPC_LOAD_TA		0x10000001
+#define TEE_RPC_FREE_TA		0x10000009
+#define TEE_RPC_RPMB_CMD	0x1000000A
+#define TEE_RPC_FS		0x10000010
+#define TEE_RPC_GET_TIME	0x10000011
+
+/* RPMB Related defines */
+#define TEE_RPC_RPMB_CMD_DATA_REQ       0x00
+#define TEE_RPC_RPMB_CMD_GET_DEV_INFO   0x01
+
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM          0x0001
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_WRITE_COUNTER_VAL_READ    0x0002
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_WRITE           0x0003
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_READ            0x0004
+#define TEE_RPC_RPMB_MSG_TYPE_REQ_RESULT_READ               0x0005
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_AUTH_KEY_PROGRAM         0x0100
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_WRITE_COUNTER_VAL_READ   0x0200
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_AUTH_DATA_WRITE          0x0300
+#define TEE_RPC_RPMB_MSG_TYPE_RESP_AUTH_DATA_READ           0x0400
+
+/* keep in sync with Linux driver */
+#define TEE_RPC_WAIT_MUTEX	0x20000000
+/* Values specific to TEE_RPC_WAIT_MUTEX */
+#define TEE_WAIT_MUTEX_SLEEP	0
+#define TEE_WAIT_MUTEX_WAKEUP	1
+#define TEE_WAIT_MUTEX_DELETE	2
+#define TEE_RPC_WAIT		0x30000000
+
+
+#endif
diff --git a/include/optee_include/tee_rpc_types.h b/include/optee_include/tee_rpc_types.h
new file mode 100644
index 0000000000..a90c1a63f9
--- /dev/null
+++ b/include/optee_include/tee_rpc_types.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEE_RPC_TYPES_H
+#define TEE_RPC_TYPES_H
+
+#include <optee_include/tee_base_types.h>
+#include <optee_include/tee_api_types.h>
+
+struct tee_rpc_load_ta_cmd {
+	TEE_UUID uuid;
+	void *va;
+};
+
+struct tee_rpc_rpmb_cmd {
+	uint16_t cmd;
+	uint16_t dev_id;
+	uint16_t block_count;
+	/* variable length of data */
+	/* uint8_t data[]; REMOVED! */
+};
+
+#define TEE_RPC_RPMB_EMMC_CID_SIZE 16
+struct tee_rpc_rpmb_dev_info {
+	uint8_t cid[TEE_RPC_RPMB_EMMC_CID_SIZE];
+	/* EXT CSD-slice 168 "RPMB Size" */
+	uint8_t rpmb_size_mult;
+	/* EXT CSD-slice 222 "Reliable Write Sector Count" */
+	uint8_t rel_wr_sec_c;
+	/* Check the ret code and accept the data only if it is OK. */
+	uint8_t ret_code;
+};
+
+#endif
diff --git a/include/optee_include/teesmc.h b/include/optee_include/teesmc.h
new file mode 100644
index 0000000000..1bad06d0a8
--- /dev/null
+++ b/include/optee_include/teesmc.h
@@ -0,0 +1,676 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef TEESMC_H
+#define TEESMC_H
+
+#include <optee_include/tee_base_types.h>
+
+#ifndef ASM
+/*
+ * This section depends on uint64_t, uint32_t uint8_t already being
+ * defined. Since this file is used in several different environments
+ * (secure world OS and normal world Linux kernel to start with) where
+ * stdint.h may not be available it's the responsibility of the one
+ * including this file to provide those types.
+ */
+
+/*
+ * Trusted OS SMC interface.
+ *
+ * The SMC interface follows SMC Calling Convention
+ * (ARM_DEN0028A_SMC_Calling_Convention).
+ *
+ * The primary objective of this API is to provide a transport layer on
+ * which a Global Platform compliant TEE interfaces can be deployed. But the
+ * interface can also be used for other implementations.
+ *
+ * This file is divided in two parts.
+ * Part 1 deals with passing parameters to Trusted Applications running in
+ * a trusted OS in secure world.
+ * Part 2 deals with the lower level handling of the SMC.
+ */
+
+/*
+ *******************************************************************************
+ * Part 1 - passing parameters to Trusted Applications
+ *******************************************************************************
+ */
+
+/*
+ * Same values as TEE_PARAM_* from TEE Internal API
+ */
+#define TEESMC_ATTR_TYPE_NONE		0
+#define TEESMC_ATTR_TYPE_VALUE_INPUT	1
+#define TEESMC_ATTR_TYPE_VALUE_OUTPUT	2
+#define TEESMC_ATTR_TYPE_VALUE_INOUT	3
+#define TEESMC_ATTR_TYPE_MEMREF_INPUT	5
+#define TEESMC_ATTR_TYPE_MEMREF_OUTPUT	6
+#define TEESMC_ATTR_TYPE_MEMREF_INOUT	7
+
+#define TEESMC_ATTR_TYPE_MASK		0x7
+
+/*
+ * Meta parameter to be absorbed by the Secure OS and not passed
+ * to the Trusted Application.
+ *
+ * One example of this is a struct teesmc_meta_open_session which
+ * is added to TEESMC{32,64}_CMD_OPEN_SESSION.
+ */
+#define TEESMC_ATTR_META		0x8
+
+/*
+ * Used as an indication from normal world of compatible cache usage.
+ * 'I' stands for inner cache and 'O' for outer cache.
+ */
+#define TEESMC_ATTR_CACHE_I_NONCACHE	0x0
+#define TEESMC_ATTR_CACHE_I_WRITE_THR	0x1
+#define TEESMC_ATTR_CACHE_I_WRITE_BACK	0x2
+#define TEESMC_ATTR_CACHE_O_NONCACHE	0x0
+#define TEESMC_ATTR_CACHE_O_WRITE_THR	0x4
+#define TEESMC_ATTR_CACHE_O_WRITE_BACK	0x8
+
+#define TEESMC_ATTR_CACHE_NONCACHE	0x0
+#define TEESMC_ATTR_CACHE_DEFAULT	(TEESMC_ATTR_CACHE_I_WRITE_BACK | \
+					 TEESMC_ATTR_CACHE_O_WRITE_BACK)
+
+#define TEESMC_ATTR_CACHE_SHIFT		4
+#define TEESMC_ATTR_CACHE_MASK		0xf
+
+#define TEESMC_CMD_OPEN_SESSION		0
+#define TEESMC_CMD_INVOKE_COMMAND	1
+#define TEESMC_CMD_CLOSE_SESSION	2
+#define TEESMC_CMD_CANCEL		3
+
+/**
+ * struct teesmc32_param_memref - memory reference
+ * @buf_ptr: Address of the buffer
+ * @size: Size of the buffer
+ *
+ * Secure and normal world communicates pointer via physical address instead of
+ * the virtual address with is usually used for pointers. This is because
+ * Secure and normal world has completely independant memory mapping. Normal
+ * world can even have a hypervisor which need to translate the guest
+ * physical address (AKA IPA in ARM lingo) to a real physical address
+ * before passing the structure to secure world.
+ */
+struct teesmc32_param_memref {
+	uint32_t buf_ptr;
+	uint32_t size;
+};
+
+/**
+ * struct teesmc32_param_memref - memory reference
+ * @buf_ptr: Address of the buffer
+ * @size: Size of the buffer
+ *
+ * See description of struct teesmc32_param_memref.
+ */
+struct teesmc64_param_memref {
+	uint64_t buf_ptr;
+	uint64_t size;
+};
+
+/**
+ * struct teesmc32_param_value - values
+ * @a: first value
+ * @b: second value
+ */
+struct teesmc32_param_value {
+	uint32_t a;
+	uint32_t b;
+};
+
+/**
+ * struct teesmc64_param_value - values
+ * @a: first value
+ * @b: second value
+ */
+struct teesmc64_param_value {
+	uint64_t a;
+	uint64_t b;
+};
+
+/**
+ * struct teesmc32_param - parameter
+ * @attr: attributes
+ * @memref: a memory reference
+ * @value: a value
+ *
+ * attr & TEESMC_ATTR_TYPE_MASK indicates if memref or value is used in the
+ * union. TEESMC_ATTR_TYPE_VALUE_* indicates value and
+ * TEESMC_ATTR_TYPE_MEMREF_* indicates memref. TEESMC_ATTR_TYPE_NONE
+ * indicates that none of the members are used.
+ */
+struct teesmc32_param {
+	uint32_t attr;
+	union {
+		struct teesmc32_param_memref memref;
+		struct teesmc32_param_value value;
+	} u;
+};
+
+/**
+ * struct teesmc64_param - parameter
+ * @attr: attributes
+ * @memref: a memory reference
+ * @value: a value
+ *
+ * See description of union teesmc32_param.
+ */
+struct teesmc64_param {
+	uint64_t attr;
+	union {
+		struct teesmc64_param_memref memref;
+		struct teesmc64_param_value value;
+	} u;
+};
+
+/**
+ * struct teesmc32_arg - SMC argument for Trusted OS
+ * @cmd: Command, one of TEESMC_CMD_*
+ * @ta_func: Trusted Application function, specific to the Trusted Application,
+ *	     used if cmd == TEESMC_CMD_INVOKE_COMMAND
+ * @session: In parameter for all TEESMC_CMD_* except
+ *	     TEESMC_CMD_OPEN_SESSION where it's an output paramter instead
+ * @ret: return value
+ * @ret_origin: origin of the return value
+ * @num_params: number of parameters supplied to the OS Command
+ * @params: the parameters supplied to the OS Command
+ *
+ * All normal SMC calls to Trusted OS uses this struct. If cmd requires
+ * further information than what these field holds it can be passed as a
+ * parameter tagged as meta (setting the TEESMC_ATTR_META bit in
+ * corresponding param_attrs). This is used for TEESMC_CMD_OPEN_SESSION
+ * to pass a struct teesmc32_meta_open_session which is needed find the
+ * Trusted Application and to indicate the credentials of the client.
+ */
+struct teesmc32_arg {
+	uint32_t cmd;
+	uint32_t ta_func;
+	uint32_t session;
+	uint32_t ret;
+	uint32_t ret_origin;
+	uint32_t num_params;
+	/*
+	 * Commented out element used to visualize the layout dynamic part
+	 * of the struct. Note that this field is not available at all
+	 * if num_params == 0.
+	 *
+	 * params is accessed through the macro TEESMC32_GET_PARAMS
+	 *
+	 * struct teesmc32_param params[num_params];
+	 */
+};
+
+/**
+ * TEESMC32_GET_PARAMS - return pointer to union teesmc32_param *
+ *
+ * @x: Pointer to a struct teesmc32_arg
+ *
+ * Returns a pointer to the params[] inside a struct teesmc32_arg.
+ */
+#define TEESMC32_GET_PARAMS(x) \
+	(struct teesmc32_param *)(((struct teesmc32_arg *)(x)) + 1)
+
+/**
+ * TEESMC32_GET_ARG_SIZE - return size of struct teesmc32_arg
+ *
+ * @num_params: Number of parameters embedded in the struct teesmc32_arg
+ *
+ * Returns the size of the struct teesmc32_arg together with the number
+ * of embedded paramters.
+ */
+#define TEESMC32_GET_ARG_SIZE(num_params) \
+	(sizeof(struct teesmc32_arg) + \
+	 sizeof(struct teesmc32_param) * (num_params))
+
+/**
+ * struct teesmc64_arg - SMC argument for Trusted OS
+ * @cmd: OS Command, one of TEESMC_CMD_*
+ * @ta_func: Trusted Application function, specific to the Trusted Application
+ * @session: In parameter for all TEESMC_CMD_* but
+ *	     TEESMC_CMD_OPEN_SESSION
+ * @ret: return value
+ * @ret_origin: origin of the return value
+ * @num_params: number of parameters supplied to the OS Command
+ * @params: the parameters supplied to the OS Command
+ *
+ * See description of struct teesmc32_arg.
+ */
+struct teesmc64_arg {
+	uint64_t cmd;
+	uint64_t ta_func;
+	uint64_t session;
+	uint64_t ret;
+	uint64_t ret_origin;
+	uint64_t num_params;
+	/*
+	 * Commented out element used to visualize the layout dynamic part
+	 * of the struct. Note that this field is not available at all
+	 * if num_params == 0.
+	 *
+	 * params is accessed through the macro TEESMC64_GET_PARAMS
+	 *
+	 * struct teesmc64_param params[num_params];
+	 */
+};
+
+/**
+ * TEESMC64_GET_PARAMS - return pointer to union teesmc64_param *
+ *
+ * @x: Pointer to a struct teesmc64_arg
+ *
+ * Returns a pointer to the params[] inside a struct teesmc64_arg.
+ */
+#define TEESMC64_GET_PARAMS(x) \
+	(struct teesmc64_param *)(((struct teesmc64_arg *)(x)) + 1)
+
+/**
+ * TEESMC64_GET_ARG_SIZE - return size of struct teesmc64_arg
+ *
+ * @num_params: Number of parameters embedded in the struct teesmc64_arg
+ *
+ * Returns the size of the struct teesmc64_arg together with the number
+ * of embedded paramters.
+ */
+#define TEESMC64_GET_ARG_SIZE(num_params) \
+	(sizeof(struct teesmc64_arg) + \
+	 sizeof(struct teesmc64_param) * (num_params))
+
+#define TEESMC_UUID_LEN	16
+
+/**
+ * struct teesmc_meta_open_session - additional parameters for
+ *				     TEESMC32_CMD_OPEN_SESSION and
+ *				     TEESMC64_CMD_OPEN_SESSION
+ * @uuid: UUID of the Trusted Application
+ * @clnt_uuid: UUID of client
+ * @clnt_login: Login class of client, TEE_LOGIN_* if being Global Platform
+ *		compliant
+ *
+ * This struct is passed in the first parameter as an input memref tagged
+ * as meta on an TEESMC{32,64}_CMD_OPEN_SESSION cmd. It's important
+ * that it really is the first parameter to make it easy for an eventual
+ * hypervisor to inspect and possibly update clnt_* values.
+ */
+struct teesmc_meta_open_session {
+	uint8_t uuid[TEESMC_UUID_LEN];
+	uint8_t clnt_uuid[TEESMC_UUID_LEN];
+	uint32_t clnt_login;
+};
+
+
+#endif /*!ASM*/
+
+/*
+ *******************************************************************************
+ * Part 2 - low level SMC interaction
+ *******************************************************************************
+ */
+
+#define TEESMC_32			0
+#define TEESMC_64			0x40000000
+#define TEESMC_FAST_CALL		0x80000000
+#define TEESMC_STD_CALL			0
+
+#define TEESMC_OWNER_MASK		0x3F
+#define TEESMC_OWNER_SHIFT		24
+
+#define TEESMC_FUNC_MASK		0xFFFF
+
+#define TEESMC_IS_FAST_CALL(smc_val)	((smc_val) & TEESMC_FAST_CALL)
+#define TEESMC_IS_64(smc_val)		((smc_val) & TEESMC_64)
+#define TEESMC_FUNC_NUM(smc_val)	((smc_val) & TEESMC_FUNC_MASK)
+#define TEESMC_OWNER_NUM(smc_val)	(((smc_val) >> TEESMC_OWNER_SHIFT) & \
+					 TEESMC_OWNER_MASK)
+
+#define TEESMC_CALL_VAL(type, calling_convention, owner, func_num) \
+			((type) | (calling_convention) | \
+			(((owner) & TEESMC_OWNER_MASK) << TEESMC_OWNER_SHIFT) |\
+			((func_num) & TEESMC_FUNC_MASK))
+
+#define TEESMC_OWNER_ARCH		0
+#define TEESMC_OWNER_CPU		1
+#define TEESMC_OWNER_SIP		2
+#define TEESMC_OWNER_OEM		3
+#define TEESMC_OWNER_STANDARD		4
+#define TEESMC_OWNER_TRUSTED_APP	48
+#define TEESMC_OWNER_TRUSTED_OS		50
+
+#define TEESMC_OWNER_TRUSTED_OS_OPTEED	62
+#define TEESMC_OWNER_TRUSTED_OS_API	63
+
+/*
+ * Function specified by SMC Calling convention.
+ */
+#define TEESMC32_FUNCID_CALLS_COUNT	0xFF00
+#define TEESMC32_CALLS_COUNT \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, \
+			TEESMC_OWNER_TRUSTED_OS_API, \
+			TEESMC32_FUNCID_CALLS_COUNT)
+
+/*
+ * Function specified by SMC Calling convention
+ *
+ * Return one of the following UIDs if using API specified in this file
+ * without further extentions:
+ * 65cb6b93-af0c-4617-8ed6-644a8d1140f8 : Only 32 bit calls are supported
+ * 65cb6b93-af0c-4617-8ed6-644a8d1140f9 : Both 32 and 64 bit calls are supported
+ */
+#define TEESMC_UID_R0			0x65cb6b93
+#define TEESMC_UID_R1			0xaf0c4617
+#define TEESMC_UID_R2			0x8ed6644a
+#define TEESMC_UID32_R3			0x8d1140f8
+#define TEESMC_UID64_R3			0x8d1140f9
+#define TEESMC32_FUNCID_CALLS_UID	0xFF01
+#define TEESMC32_CALLS_UID \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, \
+			TEESMC_OWNER_TRUSTED_OS_API, \
+			TEESMC32_FUNCID_CALLS_UID)
+
+/*
+ * Function specified by SMC Calling convention
+ *
+ * Returns 1.0 if using API specified in this file without further extentions.
+ */
+#define TEESMC_REVISION_MAJOR	1
+#define TEESMC_REVISION_MINOR	0
+#define TEESMC32_FUNCID_CALLS_REVISION	0xFF03
+#define TEESMC32_CALLS_REVISION \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, \
+			TEESMC_OWNER_TRUSTED_OS_API, \
+			TEESMC32_FUNCID_CALLS_REVISION)
+
+/*
+ * Get UUID of Trusted OS.
+ *
+ * Used by non-secure world to figure out which Trusted OS is installed.
+ * Note that returned UUID is the UUID of the Trusted OS, not of the API.
+ *
+ * Returns UUID in r0-4/w0-4 in the same way as TEESMC32_CALLS_UID
+ * described above.
+ */
+#define TEESMC_FUNCID_GET_OS_UUID	0
+#define TEESMC32_CALL_GET_OS_UUID \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_GET_OS_UUID)
+
+/*
+ * Get revision of Trusted OS.
+ *
+ * Used by non-secure world to figure out which version of the Trusted OS
+ * is installed. Note that the returned revision is the revision of the
+ * Trusted OS, not of the API.
+ *
+ * Returns revision in r0-1/w0-1 in the same way as TEESMC32_CALLS_REVISION
+ * described above.
+ */
+#define TEESMC_FUNCID_GET_OS_REVISION	1
+#define TEESMC32_CALL_GET_OS_REVISION \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_GET_OS_REVISION)
+
+
+
+/*
+ * Call with struct teesmc32_arg as argument
+ *
+ * Call register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_WITH_ARG
+ * r1/x1	Physical pointer to a struct teesmc32_arg
+ * r2-6/x2-6	Not used
+ * r7/x7	Hypervisor Client ID register
+ *
+ * Normal return register usage:
+ * r0/x0	Return value, TEESMC_RETURN_*
+ * r1-3/x1-3	Not used
+ * r4-7/x4-7	Preserved
+ *
+ * Ebusy return register usage:
+ * r0/x0	Return value, TEESMC_RETURN_EBUSY
+ * r1-3/x1-3	Preserved
+ * r4-7/x4-7	Preserved
+ *
+ * RPC return register usage:
+ * r0/x0	Return value, TEESMC_RETURN_IS_RPC(val)
+ * r1-2/x1-2	RPC parameters
+ * r3-7/x3-7	Resume information, must be preserved
+ *
+ * Possible return values:
+ * TEESMC_RETURN_UNKNOWN_FUNCTION	Trusted OS does not recognize this
+ *					function.
+ * TEESMC_RETURN_OK			Call completed, result updated in
+ *					the previously supplied struct
+ *					teesmc32_arg.
+ * TEESMC_RETURN_EBUSY			Trusted OS busy, try again later.
+ * TEESMC_RETURN_EBADADDR		Bad physcial pointer to struct
+ *					teesmc32_arg.
+ * TEESMC_RETURN_EBADCMD		Bad/unknown cmd in struct teesmc32_arg
+ * TEESMC_RETURN_IS_RPC()		Call suspended by RPC call to normal
+ *					world.
+ */
+#define TEESMC_FUNCID_CALL_WITH_ARG	2
+#define TEESMC32_CALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+/* Same as TEESMC32_CALL_WITH_ARG but a "fast call". */
+#define TEESMC32_FASTCALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+
+/*
+ * Call with struct teesmc64_arg as argument
+ *
+ * See description of TEESMC32_CALL_WITH_ARG above, uses struct
+ * teesmc64_arg in x1 instead.
+ */
+#define TEESMC64_CALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+/* Same as TEESMC64_CALL_WITH_ARG but a "fast call". */
+#define TEESMC64_FASTCALL_WITH_ARG \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+	TEESMC_FUNCID_CALL_WITH_ARG)
+
+/*
+ * Resume from RPC (for example after processing an IRQ)
+ *
+ * Call register usage:
+ * r0/x0	SMC Function ID,
+ *		TEESMC32_CALL_RETURN_FROM_RPC or
+ *		TEESMC32_FASTCALL_RETURN_FROM_RPC
+ * r1-3/x1-3	Value of r1-3/x1-3 when TEESMC32_CALL_WITH_ARG returned
+ *		TEESMC_RETURN_RPC in r0/x0
+ *
+ * Return register usage is the same as for TEESMC32_CALL_WITH_ARG above.
+ *
+ * Possible return values
+ * TEESMC_RETURN_UNKNOWN_FUNCTION	Trusted OS does not recognize this
+ *					function.
+ * TEESMC_RETURN_OK			Original call completed, result
+ *					updated in the previously supplied.
+ *					struct teesmc32_arg
+ * TEESMC_RETURN_RPC			Call suspended by RPC call to normal
+ *					world.
+ * TEESMC_RETURN_EBUSY			Trusted OS busy, try again later.
+ * TEESMC_RETURN_ERESUME		Resume failed, the opaque resume
+ *					information was corrupt.
+ */
+#define TEESMC_FUNCID_RETURN_FROM_RPC	3
+#define TEESMC32_CALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+/* Same as TEESMC32_CALL_RETURN_FROM_RPC but a "fast call". */
+#define TEESMC32_FASTCALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+
+/*
+ * Resume from RPC (for example after processing an IRQ)
+ *
+ * See description of TEESMC32_CALL_RETURN_FROM_RPC above, used when
+ * it's a 64bit call that has returned.
+ */
+#define TEESMC64_CALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+/* Same as TEESMC64_CALL_RETURN_FROM_RPC but a "fast call". */
+#define TEESMC64_FASTCALL_RETURN_FROM_RPC \
+	TEESMC_CALL_VAL(TEESMC_64, TEESMC_STD_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_FUNCID_RETURN_FROM_RPC)
+
+#define TEESMC_RETURN_RPC_PREFIX_MASK	0xFFFF0000
+#define TEESMC_RETURN_RPC_PREFIX	0xFFFF0000
+#define TEESMC_RETURN_RPC_FUNC_MASK	0x0000FFFF
+
+#define TEESMC_RETURN_GET_RPC_FUNC(ret)	((ret) & TEESMC_RETURN_RPC_FUNC_MASK)
+
+#define TEESMC_RPC_VAL(func)		((func) | TEESMC_RETURN_RPC_PREFIX)
+
+/*
+ * Allocate argument memory for RPC parameter passing.
+ * Argument memory is used to hold a struct teesmc32_arg.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_ALLOC
+ * r1/x1	Size in bytes of required argument memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Physical pointer to allocated argument memory, 0 if size
+ *		was 0 or if memory can't be allocated
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_ALLOC_ARG	0
+#define TEESMC_RETURN_RPC_ALLOC_ARG	\
+	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_ALLOC_ARG)
+
+/*
+ * Allocate payload memory for RPC parameter passing.
+ * Payload memory is used to hold the memory referred to by struct
+ * teesmc32_param_memref.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_ALLOC
+ * r1/x1	Size in bytes of required payload memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Physical pointer to allocated payload memory, 0 if size
+ *		was 0 or if memory can't be allocated
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_ALLOC_PAYLOAD	1
+#define TEESMC_RETURN_RPC_ALLOC_PAYLOAD	\
+	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_ALLOC_PAYLOAD)
+
+/*
+ * Free memory previously allocated by TEESMC_RETURN_RPC_ALLOC_ARG.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_FREE
+ * r1/x1	Physical pointer to previously allocated argument memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Not used
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_FREE_ARG	2
+#define TEESMC_RETURN_RPC_FREE_ARG	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_FREE_ARG)
+
+/*
+ * Free memory previously allocated by TEESMC_RETURN_RPC_ALLOC_PAYLOAD.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_RPC_FREE
+ * r1/x1	Physical pointer to previously allocated payload memory
+ * r3-7/x3-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1-2/x1-2	Not used
+ * r3-7/x3-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_FREE_PAYLOAD	3
+#define TEESMC_RETURN_RPC_FREE_PAYLOAD	\
+	TEESMC_RPC_VAL(TEESMC_RPC_FUNC_FREE_PAYLOAD)
+
+/*
+ * Deliver an IRQ in normal world.
+ *
+ * "Call" register usage:
+ * r0/x0	TEESMC_RETURN_RPC_IRQ
+ * r1-7/x1-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1-7/x1-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_IRQ		4
+#define TEESMC_RETURN_RPC_IRQ		TEESMC_RPC_VAL(TEESMC_RPC_FUNC_IRQ)
+
+/*
+ * Do an RPC request. The supplied struct teesmc{32,64}_arg tells which
+ * request to do and the paramters for the request. The following fields
+ * are used (the rest are unused):
+ * - cmd		the Request ID
+ * - ret		return value of the request, filled in by normal world
+ * - num_params		number of parameters for the request
+ * - params		the parameters
+ * - param_attrs	attributes of the parameters
+ *
+ * "Call" register usage:
+ * r0/x0	TEESMC_RETURN_RPC_CMD
+ * r1/x1	Physical pointer to a struct teesmc32_arg if returning from
+ *		a AArch32 SMC or a struct teesmc64_arg if returning from a
+ *		AArch64 SMC, must be preserved, only the data should
+ *		be updated
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1-7/x1-7	Preserved
+ */
+#define TEESMC_RPC_FUNC_CMD		5
+#define TEESMC_RETURN_RPC_CMD		TEESMC_RPC_VAL(TEESMC_RPC_FUNC_CMD)
+
+
+/* Returned in r0 */
+#define TEESMC_RETURN_UNKNOWN_FUNCTION	0xFFFFFFFF
+
+/* Returned in r0 only from Trusted OS functions */
+#define TEESMC_RETURN_OK		0x0
+#define TEESMC_RETURN_EBUSY		0x1
+#define TEESMC_RETURN_ERESUME		0x2
+#define TEESMC_RETURN_EBADADDR		0x3
+#define TEESMC_RETURN_EBADCMD		0x4
+#define TEESMC_RETURN_IS_RPC(ret) \
+	(((ret) & TEESMC_RETURN_RPC_PREFIX_MASK) == TEESMC_RETURN_RPC_PREFIX)
+
+typedef struct teesmc32_arg             t_teesmc32_arg;
+typedef struct teesmc32_param           t_teesmc32_param;
+typedef struct teesmc_meta_open_session t_teesmc_meta_open_session;
+
+void tee_smc_call(ARM_SMC_ARGS *param);
+
+#endif /* TEESMC_H */
diff --git a/include/optee_include/teesmc_optee.h b/include/optee_include/teesmc_optee.h
new file mode 100644
index 0000000000..a2b7d6a5a9
--- /dev/null
+++ b/include/optee_include/teesmc_optee.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef TEESMC_OPTEE_H
+#define TEESMC_OPTEE_H
+
+#include <optee_include/tee_base_types.h>
+
+#define TEESMC_OPTEE_RETURN_NOTAVAIL	0x5700
+
+/*
+ * Get Shared Memory Config
+ *
+ * Returns the Secure/Non-secure shared memory config.
+ *
+ * Call register usage:
+ * r0	SMC Function ID, TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG
+ * r1-6	Not used
+ * r7	Hypervisor Client ID register
+ *
+ * Have config return register usage:
+ * r0	TEESMC_RETURN_OK
+ * r1	Physical address of start of SHM
+ * r2	Size of of SHM
+ * r3	1 if SHM is cached, 0 if uncached.
+ * r4-7	Preserved
+ *
+ * Not available register usage:
+ * r0	TEESMC_OPTEE_RETURN_NOTAVAIL
+ * r1-3 Not used
+ * r4-7	Preserved
+ */
+#define TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG	0x5700
+#define TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_OPTEE_FUNCID_GET_SHM_CONFIG)
+
+/*
+ * Configures L2CC mutex
+ *
+ * Disables, enables usage of L2CC mutex. Returns or sets physical address
+ * of L2CC mutex.
+ *
+ * Call register usage:
+ * r0	SMC Function ID, TEESMC32_OPTEE_FASTCALL_L2CC_MUTEX
+ * r1	TEESMC_OPTEE_L2CC_MUTEX_GET_ADDR Get physical address of mutex
+ *	TEESMC_OPTEE_L2CC_MUTEX_SET_ADDR Set physical address of mutex
+ *	TEESMC_OPTEE_L2CC_MUTEX_ENABLE	 Enable usage of mutex
+ *	TEESMC_OPTEE_L2CC_MUTEX_DISABLE	 Disable usage of mutex
+ * r2	if r1 == TEESMC_OPTEE_L2CC_MUTEX_SET_ADDR, physical address of mutex
+ * r3-6	Not used
+ * r7	Hypervisor Client ID register
+ *
+ * Have config return register usage:
+ * r0	TEESMC_RETURN_OK
+ * r1	Preserved
+ * r2	if r1 == 0, physical address of L2CC mutex
+ * r3-7	Preserved
+ *
+ * Error return register usage:
+ * r0	TEESMC_OPTEE_RETURN_NOTAVAIL	Physical address not available
+ *	TEESMC_RETURN_EBADADDR		Bad supplied physical address
+ *	TEESMC_RETURN_EBADCMD		Unsupported value in r1
+ * r1-7	Preserved
+ */
+#define TEESMC_OPTEE_L2CC_MUTEX_GET_ADDR	0
+#define TEESMC_OPTEE_L2CC_MUTEX_SET_ADDR	1
+#define TEESMC_OPTEE_L2CC_MUTEX_ENABLE	2
+#define TEESMC_OPTEE_L2CC_MUTEX_DISABLE	3
+#define TEESMC_OPTEE_FUNCID_L2CC_MUTEX	0x5701
+#define TEESMC32_OPTEE_FASTCALL_L2CC_MUTEX \
+	TEESMC_CALL_VAL(TEESMC_32, TEESMC_FAST_CALL, TEESMC_OWNER_TRUSTED_OS, \
+			TEESMC_OPTEE_FUNCID_L2CC_MUTEX)
+
+/*
+ * Allocate payload memory for RPC parameter passing.
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD
+ * r1/x1	Size in bytes of required payload memory
+ * r2/x2	Not used
+ * r3-7/x3-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r1/x1	Physical pointer to allocated payload memory, 0 if size
+ *		was 0 or if memory can't be allocated
+ * r2/x2	Shared memory cookie used when freeing the memory
+ * r3-7/x3-7	Preserved
+ */
+#define TEESMC_OPTEE_RPC_FUNC_ALLOC_PAYLOAD	0x5700
+#define TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD	\
+		TEESMC_RPC_VAL(TEESMC_OPTEE_RPC_FUNC_ALLOC_PAYLOAD)
+
+
+/*
+ * Free memory previously allocated by TEESMC_RETURN_OPTEE_RPC_ALLOC_PAYLOAD
+ *
+ * "Call" register usage:
+ * r0/x0	This value, TEESMC_RETURN_OPTEE_RPC_FREE_PAYLOAD
+ * r1/x1	Shared memory cookie belonging to this payload memory
+ * r2-7/x2-7	Resume information, must be preserved
+ *
+ * "Return" register usage:
+ * r0/x0	SMC Function ID, TEESMC32_CALL_RETURN_FROM_RPC if it was an
+ *		AArch32 SMC return or TEESMC64_CALL_RETURN_FROM_RPC for
+ *		AArch64 SMC return
+ * r2-7/x2-7	Preserved
+ */
+#define TEESMC_OPTEE_RPC_FUNC_FREE_PAYLOAD		0x5701
+#define TEESMC_RETURN_OPTEE_RPC_FREE_PAYLOAD	\
+		TEESMC_RPC_VAL(TEESMC_OPTEE_RPC_FUNC_FREE_PAYLOAD)
+
+/*
+ * Overriding default UID of the API since the it has OP-TEE extensions
+ * 384fb3e0-e7f8-11e3-af63-0002a5d5c51b : Only 32 bit calls are supported
+ * 384fb3e0-e7f8-11e3-af63-0002a5d5c51c : Both 32 and 64 bit calls are supported
+ */
+#define TEESMC_OPTEE_UID_R0		0x384fb3e0
+#define TEESMC_OPTEE_UID_R1		0xe7f811e3
+#define TEESMC_OPTEE_UID_R2		0xaf630002
+#define TEESMC_OPTEE_UID32_R3		0xa5d5c51b
+#define TEESMC_OPTEE_UID64_R3		0xa5d5c51c
+
+#define TEESMC_OPTEE_REVISION_MAJOR	1
+#define TEESMC_OPTEE_REVISION_MINOR	0
+
+/*
+ * UUID for OP-TEE
+ * 486178e0-e7f8-11e3-bc5e-0002a5d5c51b
+ */
+#define TEESMC_OS_OPTEE_UUID_R0		0x486178e0
+#define TEESMC_OS_OPTEE_UUID_R1		0xe7f811e3
+#define TEESMC_OS_OPTEE_UUID_R2		0xbc5e0002
+#define TEESMC_OS_OPTEE_UUID_R3		0xa5d5c51b
+
+#define TEESMC_OS_OPTEE_REVISION_MAJOR	1
+#define TEESMC_OS_OPTEE_REVISION_MINOR	0
+
+#endif /*TEESMC_OPTEE_H*/
diff --git a/lib/Kconfig b/lib/Kconfig
index cf29e9b609..7ef02fa4d8 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -271,5 +271,6 @@ source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
 source lib/avb/rk_libavb_ab/Kconfig
 source lib/avb/rk_libavb_atx/Kconfig
+source lib/optee_clientApi/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index a74b72db15..5c8570ef27 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -49,6 +49,8 @@ obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
 obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
 
+obj-$(CONFIG_OPTEE_CLIENT) += optee_clientApi/
+
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
new file mode 100644
index 0000000000..0391f7c5e4
--- /dev/null
+++ b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
@@ -0,0 +1,24460 @@
+#include <stdint.h>
+#include <stddef.h>
+
+const uint8_t keymaster_data[] = {
+0x48, 0x53, 0x54, 0x4f, 0x00, 0x00, 0x00, 0x00,
+0xfc, 0xfa, 0x02, 0x00, 0x30, 0x48, 0x00, 0x70,
+0x20, 0x00, 0x00, 0x01, 0x50, 0xf6, 0x8d, 0xb1,
+0x65, 0x28, 0xe8, 0x47, 0x09, 0xb2, 0x66, 0x2b,
+0xcb, 0x36, 0xab, 0x32, 0x8f, 0xcb, 0x33, 0xdb,
+0x64, 0xa3, 0x10, 0x5e, 0x35, 0xe6, 0xb4, 0xed,
+0x3e, 0xf8, 0x34, 0xc3, 0x0d, 0x1c, 0xef, 0x0a,
+0x8c, 0x0b, 0xf6, 0x92, 0xda, 0xba, 0xc4, 0x6a,
+0x29, 0x4d, 0x59, 0xc5, 0x2a, 0x45, 0x67, 0x15,
+0x1f, 0xa2, 0xcd, 0x5c, 0x2d, 0x10, 0xf1, 0x61,
+0x10, 0x8f, 0x48, 0x2a, 0x9b, 0x9d, 0x1f, 0x39,
+0xe0, 0x98, 0x63, 0x78, 0xb2, 0x5c, 0x90, 0xcb,
+0x56, 0x93, 0xac, 0x50, 0x53, 0xaa, 0x7d, 0xe9,
+0x7c, 0x35, 0x92, 0xf6, 0x29, 0x98, 0xef, 0x53,
+0xa8, 0x68, 0x54, 0x6f, 0x7c, 0x67, 0xa9, 0x8b,
+0xb8, 0x1c, 0x21, 0x0b, 0xea, 0xc8, 0x20, 0x6b,
+0xbe, 0x85, 0x8a, 0x9e, 0xb9, 0x04, 0x04, 0xd5,
+0x56, 0xe7, 0x69, 0x01, 0x43, 0x31, 0x61, 0xe3,
+0x43, 0xde, 0x92, 0x18, 0xf6, 0x80, 0x60, 0xd0,
+0x67, 0x7a, 0xed, 0xda, 0x86, 0x48, 0xf6, 0xfe,
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+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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+0x03, 0x00, 0x00, 0x00, 0x00, 0xd0, 0x02, 0x00,
+0x00, 0xd0, 0x02, 0x00, 0x78, 0x00, 0x00, 0x00,
+0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+0x47, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+0x02, 0x00, 0x00, 0x00, 0xf8, 0xdf, 0x02, 0x00,
+0xf8, 0xdf, 0x02, 0x00, 0x56, 0x10, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x4f, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
+0x02, 0x00, 0x00, 0x00, 0x50, 0xf0, 0x02, 0x00,
+0x50, 0xf0, 0x02, 0x00, 0xfc, 0x06, 0x00, 0x00,
+0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
+0x55, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x4c, 0xf7, 0x02, 0x00, 0x7f, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x5e, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x70,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0xcb, 0xf7, 0x02, 0x00, 0x3a, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x6e, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00,
+0x02, 0x00, 0x00, 0x00, 0x50, 0x01, 0x02, 0x00,
+0x50, 0x81, 0x02, 0x00, 0xa0, 0x00, 0x00, 0x00,
+0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x05, 0xf8, 0x02, 0x00, 0x77, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+const uint32_t keymaster_size = 195632;
diff --git a/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
new file mode 100644
index 0000000000..d1a6989c04
Binary files /dev/null and b/lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta differ
diff --git a/lib/optee_clientApi/Kconfig b/lib/optee_clientApi/Kconfig
new file mode 100644
index 0000000000..1b86310a6e
--- /dev/null
+++ b/lib/optee_clientApi/Kconfig
@@ -0,0 +1,7 @@
+config OPTEE_CLIENT
+	bool "Support OPTEE"
+	help
+	  U-boot can communicate with trust if
+	  the config is enable. This function can
+	  be use in android bootloader a/b and avb
+	  step.
diff --git a/lib/optee_clientApi/Makefile b/lib/optee_clientApi/Makefile
new file mode 100644
index 0000000000..0cc40a7c18
--- /dev/null
+++ b/lib/optee_clientApi/Makefile
@@ -0,0 +1,16 @@
+#Copyright 2012 The Chromium Authors
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += OpteeClientMem.o
+obj-y += OpteeClientApiLib.o
+obj-y += OpteeClientTest.o
+obj-y += OpteeClientSMC.o
+obj-y += OpteeClientRPC.o
+obj-y += tee_smc-arm64.o
+obj-y += 258be795-f9ca-40e6-a8699ce6886c5d5d.o
+
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.o: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c
+lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.c: lib/optee_clientApi/258be795-f9ca-40e6-a8699ce6886c5d5d.ta
+	$(q)lib/optee_clientApi/tabinary_to_cfile.py --prefix keymaster --TA $< --out $@
diff --git a/lib/optee_clientApi/OpteeClientApiLib.c b/lib/optee_clientApi/OpteeClientApiLib.c
new file mode 100644
index 0000000000..8704be9057
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientApiLib.c
@@ -0,0 +1,321 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientSMC.h>
+
+/*
+ * Initlialize the library
+ */
+TEEC_Result OpteeClientApiLibInitialize(void)
+{
+	TEEC_Result status = TEEC_SUCCESS;
+
+	OpteeClientMemInit();
+
+	return status;
+}
+
+/*
+ * This function initializes a new TEE Context, connecting this Client
+ * application to the TEE indentified by the name name.
+ *
+ * name == NULL will give the default TEE.
+ *
+ * In this implementation only the default name is supported.
+ * If name != NULL then TEEC_ERROR_ITEM_NOT_FOUND is returned.
+ */
+TEEC_Result TEEC_InitializeContext(const char *name,
+				TEEC_Context *context)
+{
+	TEEC_Result teecresult = TEEC_SUCCESS;
+
+	debug("TEEC_InitializeContext Enter: name=%s  context=%s  0x%X\n",
+			name, context->devname, context->fd);
+
+	if (context == NULL) {
+		teecresult = TEEC_ERROR_BAD_PARAMETERS;
+		goto exit;
+	}
+
+	if (name != NULL) {
+		teecresult = TEEC_ERROR_ITEM_NOT_FOUND;
+		goto exit;
+	}
+
+	memset(context, 0, sizeof(*context));
+
+exit:
+	debug("TEEC_InitializeContext Exit : teecresult=0x%X\n\n", teecresult);
+	return teecresult;
+}
+
+/*
+ * This function destroys an initialized TEE Context, closing the connection
+ * between the Client and the TEE.
+ * The function implementation MUST do nothing if context is NULL
+ *
+ * There is nothing to do here since there is no context state.
+ */
+TEEC_Result TEEC_FinalizeContext(TEEC_Context *context)
+{
+	debug("TEEC_FinalizeContext Enter-Exit: context=0x%X\n",
+		(unsigned int)context);
+	return TEEC_SUCCESS;
+}
+
+/*
+ * Allocates or registers shared memory.
+ *
+ * Since EDK2 is configured flat with virtual memory == physical memory
+ * then we don't need to perform any special operations to get physical
+ * contiguous memory.
+ */
+TEEC_Result TEEC_AllocateSharedMemory(TEEC_Context *context,
+			TEEC_SharedMemory *shared_memory)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+
+	debug("TEEC_AllocateSharedMemory Enter: context=%s 0x%X, shared_memory=0x%X\n",
+		context->devname, context->fd, shared_memory->size);
+
+	if ((context == NULL) || (shared_memory == NULL)) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	if (shared_memory->flags != 0) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	shared_memory->buffer = NULL;
+	shared_memory->alloc_buffer = 0;
+
+	debug("TEEC_AllocateSharedMemory: size=0x%X, flags=0x%X\n",
+			shared_memory->size, shared_memory->flags);
+
+	shared_memory->buffer = OpteeClientMemAlloc(shared_memory->size);
+	if (shared_memory->buffer == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	shared_memory->alloc_buffer = shared_memory->buffer;
+
+Exit:
+	debug("TEEC_AllocateSharedMemory Exit : TeecResult=0x%X\n", TeecResult);
+	return TeecResult;
+}
+
+/*
+ * Releases shared memory.
+ *
+ * The optee_client implementation allows this to be called with a null pointer
+ * and null buffer but we'll assert this is not the case for better debugging.
+ */
+void TEEC_ReleaseSharedMemory(TEEC_SharedMemory *shared_memory)
+{
+	debug("TEEC_ReleaseSharedMemory Enter: shared_memory=0x%X\n",
+				shared_memory->size);
+
+	if (shared_memory == NULL)
+		goto Exit;
+
+	if (shared_memory->buffer == NULL)
+		goto Exit;
+
+	if (shared_memory->alloc_buffer != 0) {
+		OpteeClientMemFree(shared_memory->alloc_buffer);
+		shared_memory->alloc_buffer = 0;
+	}
+
+	shared_memory->buffer = NULL;
+	shared_memory->size = 0;
+
+Exit:
+	return;
+}
+
+/*
+ * Register shared memory
+ *
+ * If the supplied buffer is compatible we can use it as supplied otherwise
+ * we'll need to allocate a copy buffer for the transfer instead.
+ */
+TEEC_Result TEEC_RegisterSharedMemory(TEEC_Context *context,
+			TEEC_SharedMemory *shared_memory)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+
+	if ((context == NULL) || (shared_memory == NULL)) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	if (shared_memory->buffer == NULL) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	shared_memory->alloc_buffer = 0;
+
+	phys_addr_t start = (phys_addr_t) shared_memory->buffer;
+
+	if ((start % 4096) != 0) {
+		TEEC_SharedMemory TempSharedMemory;
+		TempSharedMemory.size  = shared_memory->size;
+		TempSharedMemory.flags = shared_memory->flags;
+
+		TeecResult = TEEC_AllocateSharedMemory
+			(context, &TempSharedMemory);
+
+		if (TeecResult != TEEC_SUCCESS)
+			goto Exit;
+
+		shared_memory->alloc_buffer = TempSharedMemory.alloc_buffer;
+	}
+
+Exit:
+	debug("TEEC_RegisterSharedMemory Exit : TeecResult=0x%X\n", TeecResult);
+	return TeecResult;
+}
+
+/*
+ * This function opens a new Session between the Client application and the
+ * specified TEE application.
+ *
+ * Only connection_method == TEEC_LOGIN_PUBLIC is supported connection_data and
+ * operation shall be set to NULL.
+ */
+TEEC_Result TEEC_OpenSession(TEEC_Context *context,
+			TEEC_Session *session,
+			const TEEC_UUID *destination,
+			uint32_t connection_method,
+			const void *connection_data,
+			TEEC_Operation *operation,
+			uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	debug("TEEC_OpenSession: session=0x%X, ...\n", session->id);
+
+	if ((context == NULL) || (session == NULL) || (destination == NULL)) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	if (connection_method != TEEC_LOGIN_PUBLIC) {
+		TeecResult = TEEC_ERROR_NOT_SUPPORTED;
+		goto Exit;
+	}
+
+	TEEC_Operation TeecNullOperation = {0};
+	TEEC_Operation *TeecOperation;
+
+	if (operation == NULL) {
+		memset(&TeecNullOperation, 0, sizeof(TEEC_Operation));
+		TeecOperation = &TeecNullOperation;
+	} else {
+		TeecOperation = operation;
+	}
+
+	TeecResult = TEEC_SMC_OpenSession(context, session, destination,
+				TeecOperation, &TeecErrorOrigin);
+
+Exit:
+	if (error_origin != NULL)
+		*error_origin = TeecErrorOrigin;
+
+	debug("TEEC_OpenSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+				TeecResult, TeecErrorOrigin);
+	return TeecResult;
+}
+
+/*
+ * This function closes a session which has been opened with a TEE
+ * application.
+ */
+void TEEC_CloseSession(TEEC_Session *session)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	debug("TEEC_CloseSession Enter: session=0x%X\n", session->id);
+
+	if (session == NULL)
+		goto Exit;
+
+	TeecResult = TEEC_SMC_CloseSession(session, &TeecErrorOrigin);
+
+Exit:
+	debug("TEEC_CloseSession Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+			TeecResult, TeecErrorOrigin);
+	return;
+}
+
+/*
+ * Invokes a TEE command (secure service, sub-PA or whatever).
+ */
+TEEC_Result TEEC_InvokeCommand(TEEC_Session *session,
+				uint32_t cmd_id,
+				TEEC_Operation *operation,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	debug("TEEC_InvokeCommand Enter: session=0x%X, cmd_id=0x%X\n",
+			session->id, cmd_id);
+
+	if (session == NULL) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TEEC_Operation TeecNullOperation = {0};
+	TEEC_Operation *TeecOperation;
+
+	if (operation == NULL)
+		TeecOperation = &TeecNullOperation;
+	else
+		TeecOperation = operation;
+
+	TeecResult = TEEC_SMC_InvokeCommand(session, cmd_id,
+			TeecOperation, &TeecErrorOrigin);
+
+Exit:
+	if (error_origin != NULL)
+		*error_origin = TeecErrorOrigin;
+
+	debug("TEEC_InvokeCommand Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n\n",
+				TeecResult, TeecErrorOrigin);
+
+	return TeecResult;
+}
+
+/*
+ * Request a cancellation of a in-progress operation (best effort)
+ */
+void TEEC_RequestCancellation(TEEC_Operation *operation)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeecErrorOrigin = TEEC_ORIGIN_API;
+
+	if (operation == NULL)
+		goto Exit;
+
+	TeecResult = TEEC_SMC_RequestCancellation(operation, &TeecErrorOrigin);
+
+Exit:
+	debug("TEEC_RequestCancellation Exit : TeecResult=0x%X, TeecErrorOrigin=0x%X\n",
+			TeecResult, TeecErrorOrigin);
+
+	return;
+}
diff --git a/lib/optee_clientApi/OpteeClientMem.c b/lib/optee_clientApi/OpteeClientMem.c
new file mode 100644
index 0000000000..ac63037b22
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientMem.c
@@ -0,0 +1,154 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <optee_include/OpteeClientMem.h>
+
+void *my_mem_start;
+uint32_t my_count;
+uint8_t *my_flag;
+typedef struct {
+	void *addrBlock;
+	uint32_t sizeBlock;
+	uint8_t used;
+} ALLOC_FLAG;
+ALLOC_FLAG alloc_flags[50];
+
+void my_malloc_init(void *start, uint32_t size)
+{
+	memset(start, 0, size);
+	my_mem_start = start;
+	my_count = size/4096;
+	my_flag = malloc(size/4096);
+	memset(my_flag, 0, size/4096);
+	memset(alloc_flags, 0, 50 * sizeof(ALLOC_FLAG));
+}
+
+void write_usedblock(void *addr, uint32_t size)
+{
+	uint8_t k;
+	for (k = 0; k < 50; k++) {
+		if (alloc_flags[k].used == 0) {
+			alloc_flags[k].used = 1;
+			alloc_flags[k].addrBlock = addr;
+			alloc_flags[k].sizeBlock = size;
+			break;
+		}
+	}
+}
+
+uint32_t find_sizeblock(void *addr)
+{
+	uint8_t k;
+	for (k = 0; k < 50; k++)
+		if (alloc_flags[k].used == 1 &&
+				alloc_flags[k].addrBlock == addr)
+			return alloc_flags[k].sizeBlock;
+
+	return 0;
+}
+
+void free_usedblock(void *addr)
+{
+	uint8_t k;
+	for (k = 0; k < 50; k++) {
+		if (alloc_flags[k].used == 1 &&
+				alloc_flags[k].addrBlock == addr) {
+			alloc_flags[k].used = 0;
+			alloc_flags[k].addrBlock = 0;
+			alloc_flags[k].sizeBlock = 0;
+			break;
+		}
+	}
+}
+
+void *my_malloc(uint32_t size)
+{
+	uint32_t i, j, k, num;
+
+	num = (size - 1) / 4096 + 1;
+
+	for (i = 0; i < my_count - num; i++) {
+		if (*(my_flag + i) == 0) {
+			for (j = 0; j < num; j++) {
+				if (*(my_flag + i + j) != 0)
+					break;
+			}
+			if (j == num) {
+				for (k = 0; k < num; k++) {
+					*(my_flag + i + k) = 1;
+					memset(my_mem_start +
+						(i + k) * 4096, 0, 4096);
+				}
+				debug(" malloc is: 0x%X  0x%X\n",
+					(int)i, (int)num);
+				write_usedblock((my_mem_start + i * 4096),
+					num * 4096);
+
+				return my_mem_start + (i * 4096);
+			}
+		}
+	}
+
+	return 0;
+}
+
+void my_free(void *ptr)
+{
+	uint32_t i, j, num, size;
+
+	if (ptr < my_mem_start)
+		return;
+
+	i = (ptr - my_mem_start) / 4096;
+	size = find_sizeblock(ptr);
+	free_usedblock(ptr);
+	if (size == 0)
+		return;
+
+	num = (size-1)/4096+1;
+	debug(" free is: 0x%X  0x%X\n", i, num);
+
+	for (j = 0; j < num; j++) {
+		*(my_flag + i + j) = 0;
+		memset(my_mem_start + (i + j) * 4096, 0, 4096);
+	}
+}
+
+/*
+ * Initlialize the memory component, for example providing the
+ * containing drivers handle.
+ */
+void OpteeClientMemInit(void)
+{
+#ifdef CONFIG_ROCKCHIP_RK3328
+	debug(" OpteeClientMemInit 64\n");
+	my_malloc_init(0x09200000, 0x00200000);
+#endif
+#ifdef CONFIG_ROCKCHIP_RK322X
+	debug(" OpteeClientMemInit 32\n");
+	my_malloc_init((void *)0x6910a000, 0x000e0000);
+#endif
+}
+
+/*
+ * Allocate a page aligned block of memory from the TrustZone
+ * shared memory block.
+ */
+void *OpteeClientMemAlloc(uint32_t length)
+{
+	return my_malloc(length);
+}
+
+/*
+ * Free a block of memory previously allocated using the
+ * OpteeClientMemAlloc function.
+ */
+void OpteeClientMemFree(void *mem)
+{
+	my_free(mem);
+}
diff --git a/lib/optee_clientApi/OpteeClientRPC.c b/lib/optee_clientApi/OpteeClientRPC.c
new file mode 100644
index 0000000000..3c03ac79d1
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientRPC.c
@@ -0,0 +1,562 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <stdlib.h>
+#include <command.h>
+#include <mmc.h>
+#include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientRPC.h>
+#include <optee_include/teesmc.h>
+#include <optee_include/teesmc_optee.h>
+#include <optee_include/tee_rpc_types.h>
+#include <optee_include/tee_rpc.h>
+#include <optee_include/258be795-f9ca-40e6-a8699ce6886c5d5d.h>
+
+/*
+ * Memory allocation.
+ * Currently treated the same for both arguments & payloads.
+ */
+TEEC_Result OpteeRpcAlloc(uint32_t Size, uint32_t *Address)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t AllocAddress;
+
+	*Address = 0;
+
+	if (Size != 0) {
+		AllocAddress = (uint32_t) OpteeClientMemAlloc(Size);
+
+		if (AllocAddress == 0)
+			TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		else
+			*Address = AllocAddress;
+	}
+	return TeecResult;
+}
+
+/*
+ * Memory free.
+ * Currently treated the same for both arguments & payloads.
+ */
+TEEC_Result OpteeRpcFree(uint32_t Address)
+{
+	OpteeClientMemFree((void *)Address);
+	return TEEC_SUCCESS;
+}
+
+/*
+ * Load a TA from storage into memory and provide it back to OpTEE.
+ * Param[0] = IN: struct tee_rpc_load_ta_cmd
+ * Param[1] = IN: all-zero OUT: TA Image allocated
+ */
+TEEC_Result OpteeRpcCmdLoadTa(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	struct tee_rpc_load_ta_cmd *TeeLoadTaCmd = NULL;
+	uint32_t TeeLoadTaCmdSize = 0;
+
+	if (TeeSmc32Arg->num_params != 2) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+	TeeLoadTaCmd = (struct tee_rpc_load_ta_cmd *)
+					TeeSmc32Param[0].u.memref.buf_ptr;
+	TeeLoadTaCmdSize = TeeSmc32Param[0].u.memref.size;
+
+	if ((TeeLoadTaCmd == NULL) ||
+		(TeeLoadTaCmdSize != sizeof(*TeeLoadTaCmd))) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TEEC_Result Status = 0;
+	void *ImageData = NULL;
+	uint32_t ImageSize = 0;
+	uint32_t AllocAddress = 0;
+
+	ImageData = (void *)keymaster_data;
+	ImageSize = keymaster_size;
+
+	if (Status != 0) {
+		TeecResult = TEEC_ERROR_ITEM_NOT_FOUND;
+		goto Exit;
+	}
+
+	AllocAddress = (uint32_t) OpteeClientMemAlloc(ImageSize);
+
+	if (AllocAddress == 0) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memcpy((void *)AllocAddress, ImageData, ImageSize);
+
+	debug("...TA loaded at 0x%X of size 0x%X bytes\n",
+		AllocAddress, ImageSize);
+	debug("...AllocAddress[0] 0x%X ; AllocAddress[1] 0x%X bytes\n",
+		*(char *)AllocAddress, *(char *)(AllocAddress+1));
+
+	TeeLoadTaCmd->va = (void *)AllocAddress;
+
+	TeeSmc32Param[1].u.memref.buf_ptr = AllocAddress;
+	TeeSmc32Param[1].u.memref.size = ImageSize;
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	debug("OpteeRpcCmdLoadTa Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
+
+/*
+ * Free a previously loaded TA and release the memory
+ * Param[0] = IN: TA Image to free
+ *
+ * Um, why is OpTEE holding on to this memory? The OS code suggests that OpTEE
+ * is using the binary in place out of shared memory but I don't understand how
+ * runtime modifications of the binary are being prevented if that's the case?
+ */
+TEEC_Result OpteeRpcCmdFreeTa(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	uint32_t ImageSize = 0;
+	uint32_t AllocAddress = 0;
+
+	if (TeeSmc32Arg->num_params != 1) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	AllocAddress = TeeSmc32Param[0].u.memref.buf_ptr;
+	ImageSize = TeeSmc32Param[0].u.memref.size;
+
+	debug("OpteeRpcCmdFreeTa Enter: AllocAddress=0x%X, ImageSize=0x%X\n",
+			(uint32_t) AllocAddress, (uint32_t) ImageSize);
+
+	if (AllocAddress == 0) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	OpteeClientMemFree((void *)AllocAddress);
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	debug("OpteeRpcCmdFreeTa Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
+
+/*
+ * Execute an RPMB storage operation.
+ */
+uint16_t global_block_count;
+TEEC_Result OpteeRpcCmdRpmb(t_teesmc32_arg *TeeSmc32Arg)
+{
+	struct tee_rpc_rpmb_dev_info *DevInfo;
+	TEEC_Result EfiStatus;
+	uint16_t RequestMsgType, i;
+	EFI_RK_RPMB_DATA_PACKET *RequestPackets;
+	EFI_RK_RPMB_DATA_PACKET *ResponsePackets;
+	EFI_RK_RPMB_DATA_PACKET *tempPackets;
+	EFI_RK_RPMB_DATA_PACKET_BACK *RequestPackets_back;
+	EFI_RK_RPMB_DATA_PACKET_BACK *tempPackets_back;
+	struct tee_rpc_rpmb_cmd *RpmbRequest;
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	t_teesmc32_param *TeeSmc32Param;
+	struct mmc *mmc;
+
+	debug("Entered RPMB RPC\n");
+
+	if (TeeSmc32Arg->num_params != 2) {
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+		goto Exit;
+	}
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+	RpmbRequest = (struct tee_rpc_rpmb_cmd *)
+		TeeSmc32Param[0].u.memref.buf_ptr;
+	switch (RpmbRequest->cmd) {
+	case TEE_RPC_RPMB_CMD_DATA_REQ: {
+		RequestPackets = (EFI_RK_RPMB_DATA_PACKET *)(RpmbRequest + 1);
+		ResponsePackets = (EFI_RK_RPMB_DATA_PACKET *)
+		TeeSmc32Param[1].u.memref.buf_ptr;
+
+		global_block_count =
+			(RpmbRequest->block_count == 0 ?
+			1 : RpmbRequest->block_count);
+		RequestPackets_back =
+			malloc(sizeof(EFI_RK_RPMB_DATA_PACKET_BACK)
+			* global_block_count);
+		memcpy(RequestPackets_back->stuff,
+			RequestPackets->stuff_bytes,
+			RPMB_STUFF_DATA_SIZE);
+		memcpy(RequestPackets_back->mac,
+			RequestPackets->key_mac,
+			RPMB_KEY_MAC_SIZE);
+		memcpy(RequestPackets_back->data,
+			RequestPackets->data,
+			RPMB_DATA_SIZE);
+		memcpy(RequestPackets_back->nonce,
+			RequestPackets->nonce,
+			RPMB_NONCE_SIZE);
+		RequestPackets_back->write_counter =
+			((RequestPackets->write_counter[3]) << 24) +
+			((RequestPackets->write_counter[2]) << 16) +
+			((RequestPackets->write_counter[1]) << 8) +
+			(RequestPackets->write_counter[0]);
+		RequestPackets_back->address =
+			((RequestPackets->address[1]) << 8) +
+			(RequestPackets->address[0]);
+		RequestPackets_back->block_count =
+			((RequestPackets->block_count[1]) << 8) +
+			(RequestPackets->block_count[0]);
+		RequestPackets_back->result =
+			((RequestPackets->op_result[1]) << 8) +
+			(RequestPackets->op_result[0]);
+		RequestPackets_back->request =
+			((RequestPackets->msg_type[1]) << 8) +
+			(RequestPackets->msg_type[0]);
+
+		RequestMsgType = RPMB_PACKET_DATA_TO_UINT16(
+				RequestPackets->msg_type);
+
+		debug("RPMB Data request %d\n", RequestMsgType);
+
+		switch (RequestMsgType) {
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_KEY_PROGRAM: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_programkey((struct s_rpmb *)
+				RequestPackets_back);
+
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_WRITE_COUNTER_VAL_READ: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_readcounter((struct s_rpmb *)
+				RequestPackets_back);
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_WRITE: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_authenticatedwrite((struct s_rpmb *)
+				RequestPackets_back);
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		case TEE_RPC_RPMB_MSG_TYPE_REQ_AUTH_DATA_READ: {
+			EfiStatus = init_rpmb();
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = do_authenticatedread((struct s_rpmb *)
+				RequestPackets_back, global_block_count);
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			EfiStatus = finish_rpmb();
+
+			if (EfiStatus != 0) {
+				TeecResult = TEEC_ERROR_GENERIC;
+				break;
+			}
+
+			break;
+		}
+
+		default:
+			TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+			break;
+		}
+		debug("RPMB TeecResult %d\n", TeecResult);
+		break;
+	}
+
+	case TEE_RPC_RPMB_CMD_GET_DEV_INFO: {
+		mmc = do_returnmmc();
+
+		DevInfo = (struct tee_rpc_rpmb_dev_info *)
+		TeeSmc32Param[1].u.memref.buf_ptr;
+
+		DevInfo->cid[0] = (mmc->cid[0]) >> 24 & 0xff;
+		DevInfo->cid[1] = (mmc->cid[0]) >> 16 & 0xff;
+		DevInfo->cid[2] = (mmc->cid[0]) >> 8 & 0xff;
+		DevInfo->cid[3] = (mmc->cid[0]) & 0xff;
+		DevInfo->cid[4] = (mmc->cid[1]) >> 24 & 0xff;
+		DevInfo->cid[5] = (mmc->cid[1]) >> 16 & 0xff;
+		DevInfo->cid[6] = (mmc->cid[1]) >> 8 & 0xff;
+		DevInfo->cid[7] = (mmc->cid[1]) & 0xff;
+		DevInfo->cid[8] = (mmc->cid[2]) >> 24 & 0xff;
+		DevInfo->cid[9] = (mmc->cid[2]) >> 16 & 0xff;
+		DevInfo->cid[10] = (mmc->cid[2]) >> 8 & 0xff;
+		DevInfo->cid[11] = (mmc->cid[2]) & 0xff;
+		DevInfo->cid[12] = (mmc->cid[3]) >> 24 & 0xff;
+		DevInfo->cid[13] = (mmc->cid[3]) >> 16 & 0xff;
+		DevInfo->cid[14] = (mmc->cid[3]) >> 8 & 0xff;
+		DevInfo->cid[15] = (mmc->cid[3]) & 0xff;
+		DevInfo->rel_wr_sec_c = 1;
+		DevInfo->rpmb_size_mult =
+			(uint8_t)(mmc->capacity_rpmb / (128 * 1024));
+		DevInfo->ret_code = 0;
+
+		goto Exit;
+	}
+
+	default:
+		TeecResult = TEEC_ERROR_BAD_PARAMETERS;
+
+		goto Exit;
+	}
+
+	tempPackets = ResponsePackets;
+	tempPackets_back = RequestPackets_back;
+
+	for (i = 0; i < global_block_count; i++) {
+		memcpy(tempPackets->stuff_bytes,
+			tempPackets_back->stuff,
+			RPMB_STUFF_DATA_SIZE);
+		memcpy(tempPackets->key_mac,
+			tempPackets_back->mac,
+			RPMB_KEY_MAC_SIZE);
+		memcpy(tempPackets->data,
+			tempPackets_back->data,
+			RPMB_DATA_SIZE);
+		memcpy(tempPackets->nonce,
+			tempPackets_back->nonce,
+			RPMB_NONCE_SIZE);
+		tempPackets->write_counter[3] =
+			((tempPackets_back->write_counter) >> 24) & 0xFF;
+		tempPackets->write_counter[2] =
+			((tempPackets_back->write_counter) >> 16) & 0xFF;
+		tempPackets->write_counter[1] =
+			((tempPackets_back->write_counter) >> 8) & 0xFF;
+		tempPackets->write_counter[0] =
+			(tempPackets_back->write_counter) & 0xFF;
+		tempPackets->address[1] =
+			((tempPackets_back->address) >> 8) & 0xFF;
+		tempPackets->address[0] =
+			(tempPackets_back->address) & 0xFF;
+		tempPackets->block_count[1] =
+			((tempPackets_back->block_count) >> 8) & 0xFF;
+		tempPackets->block_count[0] =
+			(tempPackets_back->block_count) & 0xFF;
+		tempPackets->op_result[1] =
+			((tempPackets_back->result) >> 8) & 0xFF;
+		tempPackets->op_result[0] =
+			(tempPackets_back->result) & 0xFF;
+		tempPackets->msg_type[1] =
+			((tempPackets_back->request) >> 8) & 0xFF;
+		tempPackets->msg_type[0] =
+			(tempPackets_back->request) & 0xFF;
+		tempPackets++;
+		tempPackets_back++;
+	}
+
+	free(RequestPackets_back);
+
+Exit:
+	TeeSmc32Arg->ret = TeecResult;
+	TeeSmc32Arg->ret_origin = TEEC_ORIGIN_API;
+
+	return TeecResult;
+}
+
+/*
+ * Execute a normal world local file system operation.
+ */
+TEEC_Result OpteeRpcCmdFs(t_teesmc32_arg *TeeSmc32Arg)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+
+/*
+ * TBD.
+ */
+TEEC_Result OpteeRpcCmdGetTime(t_teesmc32_arg *TeeSmc32Arg)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+
+/*
+ * TBD.
+ */
+TEEC_Result OpteeRpcCmdWaitMutex(t_teesmc32_arg *TeeSmc32Arg)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+/*
+ * Handle the callback from secure world.
+ */
+TEEC_Result OpteeRpcCallback(ARM_SMC_ARGS *ArmSmcArgs)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+
+	debug("OpteeRpcCallback Enter: Arg0=0x%X, Arg1=0x%X, Arg2=0x%X\n",
+		ArmSmcArgs->Arg0, ArmSmcArgs->Arg1, ArmSmcArgs->Arg2);
+
+	switch (TEESMC_RETURN_GET_RPC_FUNC(ArmSmcArgs->Arg0)) {
+	case TEESMC_RPC_FUNC_ALLOC_ARG: {
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_ALLOC_PAYLOAD: {
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_FREE_ARG: {
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_FREE_PAYLOAD: {
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_IRQ: {
+		break;
+	}
+
+	case TEESMC_RPC_FUNC_CMD: {
+		t_teesmc32_arg *TeeSmc32Arg =
+			(t_teesmc32_arg *)ArmSmcArgs->Arg1;
+
+		switch (TeeSmc32Arg->cmd) {
+		case TEE_RPC_LOAD_TA: {
+			TeecResult = OpteeRpcCmdLoadTa(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_FREE_TA: {
+			TeecResult = OpteeRpcCmdFreeTa(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_RPMB_CMD: {
+			TeecResult = OpteeRpcCmdRpmb(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_FS: {
+			TeecResult = OpteeRpcCmdFs(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_GET_TIME: {
+			TeecResult = OpteeRpcCmdGetTime(TeeSmc32Arg);
+			break;
+		}
+
+		case TEE_RPC_WAIT_MUTEX: {
+			TeecResult = OpteeRpcCmdWaitMutex(TeeSmc32Arg);
+			break;
+		}
+
+		default: {
+			printf("...unsupported RPC CMD: cmd=0x%X\n",
+				TeeSmc32Arg->cmd);
+			TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
+			break;
+		}
+	}
+
+		break;
+	}
+
+	case TEESMC_OPTEE_RPC_FUNC_ALLOC_PAYLOAD: {
+		TeecResult = OpteeRpcAlloc(ArmSmcArgs->Arg1, &ArmSmcArgs->Arg1);
+		ArmSmcArgs->Arg2 = ArmSmcArgs->Arg1;
+		break;
+	}
+
+	case TEESMC_OPTEE_RPC_FUNC_FREE_PAYLOAD: {
+		TeecResult = OpteeRpcFree(ArmSmcArgs->Arg1);
+		break;
+	}
+
+	default: {
+		printf("...unsupported RPC : Arg0=0x%X\n", ArmSmcArgs->Arg0);
+		TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
+		break;
+	}
+	}
+
+	ArmSmcArgs->Arg0 = TEESMC32_CALL_RETURN_FROM_RPC;
+	debug("OpteeRpcCallback Exit : TeecResult=0x%X\n", TeecResult);
+
+	return TeecResult;
+}
diff --git a/lib/optee_clientApi/OpteeClientSMC.c b/lib/optee_clientApi/OpteeClientSMC.c
new file mode 100644
index 0000000000..b3df5d6f7f
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientSMC.c
@@ -0,0 +1,335 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <optee_include/OpteeClientMem.h>
+#include <optee_include/OpteeClientSMC.h>
+#include <optee_include/OpteeClientRPC.h>
+#include <optee_include/teesmc.h>
+
+#define TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES \
+	(TEESMC_ATTR_CACHE_DEFAULT << TEESMC_ATTR_CACHE_SHIFT);
+
+static void SetTeeSmc32Params(TEEC_Operation *operation,
+	t_teesmc32_param *TeeSmc32Param);
+static void GetTeeSmc32Params(t_teesmc32_param *TeeSmc32Param,
+	TEEC_Operation *operation);
+static TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg);
+
+/*
+ * This function opens a new Session between the Client application and the
+ * specified TEE application.
+ *
+ * Only connection_method == TEEC_LOGIN_PUBLIC is supported connection_data and
+ * operation shall be set to NULL.
+ */
+TEEC_Result TEEC_SMC_OpenSession(TEEC_Context *context,
+				TEEC_Session *session,
+				const TEEC_UUID *destination,
+				TEEC_Operation  *operation,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeeSmc32ArgLength;
+	uint32_t TeeSmcMetaSessionLength;
+
+	t_teesmc32_arg *TeeSmc32Arg = NULL;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+	t_teesmc_meta_open_session *TeeSmcMetaSession = NULL;
+	static const uint32_t MetaNum = 1;
+
+	*error_origin = TEEC_ORIGIN_API;
+
+	TeeSmc32ArgLength =
+		TEESMC32_GET_ARG_SIZE(TEEC_CONFIG_PAYLOAD_REF_COUNT + MetaNum);
+
+	TeeSmc32Arg = (t_teesmc32_arg *)OpteeClientMemAlloc(TeeSmc32ArgLength);
+
+	if (TeeSmc32Arg == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmc32Arg, 0, TeeSmc32ArgLength);
+
+	TeeSmcMetaSessionLength = sizeof(*TeeSmcMetaSession);
+
+	TeeSmcMetaSession = (t_teesmc_meta_open_session *)
+		OpteeClientMemAlloc(TeeSmcMetaSessionLength);
+
+	if (TeeSmcMetaSession == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmcMetaSession, 0, TeeSmcMetaSessionLength);
+
+	TeeSmc32Arg->cmd = TEESMC_CMD_OPEN_SESSION;
+	TeeSmc32Arg->num_params = TEEC_CONFIG_PAYLOAD_REF_COUNT + MetaNum;
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	memcpy(&TeeSmcMetaSession->uuid,
+		destination,
+		sizeof(TeeSmcMetaSession->uuid));
+	TeeSmcMetaSession->clnt_login = TEEC_LOGIN_PUBLIC;
+
+	TeeSmc32Param[0].u.memref.buf_ptr = (uint32_t) TeeSmcMetaSession;
+	TeeSmc32Param[0].u.memref.size = sizeof(*TeeSmcMetaSession);
+
+#ifdef CONFIG_ROCKCHIP_RK3328
+	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
+				TEESMC_ATTR_META              |
+				TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK322X
+	TeeSmc32Param[0].attr = TEESMC_ATTR_TYPE_MEMREF_INPUT |
+				TEESMC_ATTR_META;
+#endif
+
+	SetTeeSmc32Params(operation, TeeSmc32Param + MetaNum);
+
+	*error_origin = TEEC_ORIGIN_COMMS;
+
+	TeecResult = OpteeSmcCall(TeeSmc32Arg);
+	if (TeecResult != TEEC_SUCCESS)
+		goto Exit;
+
+	session->id = TeeSmc32Arg->session;
+	TeecResult = TeeSmc32Arg->ret;
+	*error_origin = TeeSmc32Arg->ret_origin;
+
+	GetTeeSmc32Params(TeeSmc32Param + MetaNum, operation);
+
+Exit:
+	if (TeeSmc32Arg != NULL)
+		OpteeClientMemFree(TeeSmc32Arg);
+
+	if (TeeSmcMetaSession != NULL)
+		OpteeClientMemFree(TeeSmcMetaSession);
+
+	return TeecResult;
+}
+
+/*
+ * This function closes a session which has been opened with a TEE
+ * application.
+ *
+ * Note that the GP specification does not allow for this API to fail and return
+ * a failure code however we'll support this at the SMC level so we can get
+ * see debug information about such failures.
+ */
+TEEC_Result TEEC_SMC_CloseSession(TEEC_Session *session,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeeSmc32ArgLength;
+	t_teesmc32_arg *TeeSmc32Arg = NULL;
+
+	*error_origin = TEEC_ORIGIN_API;
+
+	TeeSmc32ArgLength =
+		TEESMC32_GET_ARG_SIZE(TEEC_CONFIG_PAYLOAD_REF_COUNT);
+
+	TeeSmc32Arg = (t_teesmc32_arg *)OpteeClientMemAlloc(TeeSmc32ArgLength);
+
+	if (TeeSmc32Arg == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmc32Arg, 0, TeeSmc32ArgLength);
+
+	TeeSmc32Arg->cmd = TEESMC_CMD_CLOSE_SESSION;
+	TeeSmc32Arg->session = session->id;
+
+	*error_origin = TEEC_ORIGIN_COMMS;
+
+	TeecResult = OpteeSmcCall(TeeSmc32Arg);
+
+	if (TeecResult != TEEC_SUCCESS)
+		goto Exit;
+
+	TeecResult = TeeSmc32Arg->ret;
+	*error_origin = TeeSmc32Arg->ret_origin;
+
+Exit:
+	if (TeeSmc32Arg != NULL)
+		OpteeClientMemFree(TeeSmc32Arg);
+
+	return TeecResult;
+}
+
+/*
+ * Invokes a TEE command (secure service, sub-PA or whatever).
+ */
+TEEC_Result TEEC_SMC_InvokeCommand(TEEC_Session *session,
+				uint32_t cmd_id,
+				TEEC_Operation *operation,
+				uint32_t *error_origin)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	uint32_t TeeSmc32ArgLength;
+	t_teesmc32_arg *TeeSmc32Arg = NULL;
+	t_teesmc32_param *TeeSmc32Param = NULL;
+
+	*error_origin = TEEC_ORIGIN_API;
+
+	TeeSmc32ArgLength =
+		TEESMC32_GET_ARG_SIZE(TEEC_CONFIG_PAYLOAD_REF_COUNT);
+
+	TeeSmc32Arg = (t_teesmc32_arg *)OpteeClientMemAlloc(TeeSmc32ArgLength);
+
+	if (TeeSmc32Arg == NULL) {
+		TeecResult = TEEC_ERROR_OUT_OF_MEMORY;
+		goto Exit;
+	}
+
+	memset(TeeSmc32Arg, 0, TeeSmc32ArgLength);
+
+	TeeSmc32Arg->cmd = TEESMC_CMD_INVOKE_COMMAND;
+	TeeSmc32Arg->ta_func = cmd_id;
+	TeeSmc32Arg->session = session->id;
+	TeeSmc32Arg->num_params = TEEC_CONFIG_PAYLOAD_REF_COUNT;
+
+	TeeSmc32Param = TEESMC32_GET_PARAMS(TeeSmc32Arg);
+
+	SetTeeSmc32Params(operation, TeeSmc32Param);
+
+	*error_origin = TEEC_ORIGIN_COMMS;
+
+	TeecResult = OpteeSmcCall(TeeSmc32Arg);
+	if (TeecResult != TEEC_SUCCESS)
+		goto Exit;
+
+	TeecResult = TeeSmc32Arg->ret;
+	*error_origin = TeeSmc32Arg->ret_origin;
+
+	GetTeeSmc32Params(TeeSmc32Param, operation);
+
+Exit:
+	if (TeeSmc32Arg != NULL)
+		OpteeClientMemFree(TeeSmc32Arg);
+
+
+	return TeecResult;
+}
+
+/*
+ * Request a cancellation of a in-progress operation (best effort)
+ *
+ * Note that the GP specification does not allow for this API to fail and return
+ * a failure code however we'll support this at the SMC level so we can get
+ * see debug information about such failures.
+ */
+TEEC_Result TEEC_SMC_RequestCancellation(TEEC_Operation *operation,
+					uint32_t *error_origin)
+{
+	return TEEC_ERROR_NOT_IMPLEMENTED;
+}
+
+/*
+ * Set the call parameter blocks in the
+ * SMC call based on the TEEC parameter supplied.
+ * This only handles the parameters supplied in
+ * the originating call and not those
+ * considered internal meta parameters and is
+ * thus constrained by the build
+ * constants exposed to callers.
+ */
+void SetTeeSmc32Params(TEEC_Operation *operation,
+						t_teesmc32_param *TeeSmc32Param)
+{
+	uint32_t ParamCount;
+
+	for (ParamCount = 0;
+		ParamCount < TEEC_CONFIG_PAYLOAD_REF_COUNT;
+		ParamCount++) {
+		uint32_t attr =
+			TEEC_PARAM_TYPE_GET(operation->paramTypes, ParamCount);
+
+		if (attr == TEEC_MEMREF_TEMP_INPUT ||
+			attr == TEEC_MEMREF_TEMP_OUTPUT ||
+			attr == TEEC_MEMREF_TEMP_INOUT) {
+#ifdef CONFIG_ROCKCHIP_RK3328
+			attr |= TEEC_SMC_DEFAULT_CACHE_ATTRIBUTES;
+			debug(" 3328 attr %x\n", attr);
+#endif
+#ifdef CONFIG_ROCKCHIP_RK322X
+			debug(" 322X attr %x\n", attr);
+#endif
+			TeeSmc32Param[ParamCount].attr = attr;
+			TeeSmc32Param[ParamCount].u.memref.buf_ptr =
+			(uint32_t)operation->params[ParamCount].tmpref.buffer;
+			TeeSmc32Param[ParamCount].u.memref.size =
+				operation->params[ParamCount].tmpref.size;
+		} else {
+			TeeSmc32Param[ParamCount].attr = attr;
+			TeeSmc32Param[ParamCount].u.value.a =
+				operation->params[ParamCount].value.a;
+			TeeSmc32Param[ParamCount].u.value.b =
+				operation->params[ParamCount].value.b;
+		}
+	}
+}
+
+/*
+ * Get the return parameter blocks from
+ * the SMC call into the TEEC parameter supplied.
+ * This only handles the parameters supplied
+ * in the originating call and not those
+ * considered internal meta parameters and
+ * is thus constrained by the build
+ * constants exposed to callers.
+ */
+void GetTeeSmc32Params(t_teesmc32_param *TeeSmc32Param,
+				TEEC_Operation *operation)
+{
+	uint32_t ParamCount;
+
+	for (ParamCount = 0;
+	ParamCount < TEEC_CONFIG_PAYLOAD_REF_COUNT;
+	ParamCount++) {
+		operation->params[ParamCount].value.a =
+			TeeSmc32Param[ParamCount].u.value.a;
+		operation->params[ParamCount].value.b =
+			TeeSmc32Param[ParamCount].u.value.b;
+	}
+}
+
+/*
+ * Populate the SMC registers and make
+ * the call with OpTEE specific handling.
+ */
+TEEC_Result OpteeSmcCall(t_teesmc32_arg *TeeSmc32Arg)
+{
+	TEEC_Result TeecResult = TEEC_SUCCESS;
+	ARM_SMC_ARGS ArmSmcArgs = {0};
+
+	ArmSmcArgs.Arg0 = TEESMC32_CALL_WITH_ARG;
+	ArmSmcArgs.Arg1 = (uint32_t) TeeSmc32Arg;
+
+	while (1) {
+		tee_smc_call(&ArmSmcArgs);
+
+		if (TEESMC_RETURN_IS_RPC(ArmSmcArgs.Arg0)) {
+			(void) OpteeRpcCallback(&ArmSmcArgs);
+		} else if (ArmSmcArgs.Arg0 == TEESMC_RETURN_UNKNOWN_FUNCTION) {
+			TeecResult = TEEC_ERROR_NOT_IMPLEMENTED;
+			break;
+		} else if (ArmSmcArgs.Arg0 != TEESMC_RETURN_OK) {
+			TeecResult = TEEC_ERROR_COMMUNICATION;
+			break;
+		} else {
+			TeecResult = TEEC_SUCCESS;
+			break;
+		}
+	}
+
+	return TeecResult;
+}
+
diff --git a/lib/optee_clientApi/OpteeClientTest.c b/lib/optee_clientApi/OpteeClientTest.c
new file mode 100644
index 0000000000..791ac3a361
--- /dev/null
+++ b/lib/optee_clientApi/OpteeClientTest.c
@@ -0,0 +1,592 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <optee_include/OpteeClientApiLib.h>
+#include <optee_include/tee_client_api.h>
+
+void test_optee(void)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("filename_test");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "filename_test", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 32;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memset(SharedMem1.buffer, 'a', SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	debug("testmm end\n");
+	debug("TeecResult %x\n", TeecResult);
+}
+
+
+static uint8_t b2hs_add_base(uint8_t in)
+{
+	if (in > 9)
+		return in + 55;
+	else
+		return in + 48;
+}
+
+uint32_t b2hs(uint8_t *b, uint8_t *hs, uint32_t blen, uint32_t hslen)
+{
+	uint32_t i = 0;
+
+	if (blen * 2 + 1 > hslen)
+		return 0;
+
+	for (; i < blen; i++) {
+		hs[i * 2 + 1] = b2hs_add_base(b[i] & 0xf);
+		hs[i * 2] = b2hs_add_base(b[i] >> 4);
+	}
+	hs[blen * 2] = 0;
+
+	return blen * 2;
+}
+
+
+uint32_t trusty_read_rollback_index(uint32_t slot, uint64_t *value)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+			{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	uint8_t hs[9];
+
+	b2hs((uint8_t *)&slot, hs, 4, 9);
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = 8;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy((char *)value, SharedMem1.buffer, SharedMem1.size);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	debug("testmm end\n");
+	return TeecResult;
+}
+
+uint32_t trusty_write_rollback_index(uint32_t slot, uint64_t value)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+	uint8_t hs[9];
+	b2hs((uint8_t *)&slot, hs, 4, 9);
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = 8;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, hs, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 8;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, (char *)&value, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+
+	TEEC_CloseSession(&TeecSession);
+
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_read_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy(attributes, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_permanent_attributes(uint8_t *attributes, uint32_t size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("attributes");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "attributes", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, attributes, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_read_lock_state(uint8_t *lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					0,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	memcpy(lock_state, SharedMem1.buffer, SharedMem1.size);
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t trusty_write_lock_state(uint8_t lock_state)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+	TEEC_UUID  tempuuid = { 0x1b484ea5, 0x698b, 0x4142,
+		{ 0x82, 0xb8, 0x3a, 0xcf, 0x16, 0xe9, 0x9e, 0x2a } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("testmm start\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = sizeof("lock_state");
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, "lock_state", SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = 1;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, &lock_state, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					1,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+
+	return TeecResult;
+}
+
+uint32_t write_to_keymaster(uint8_t *filename,
+		uint32_t filename_size,
+		uint8_t *data,
+		uint32_t data_size)
+{
+	TEEC_Result TeecResult;
+	TEEC_Context TeecContext;
+	TEEC_Session TeecSession;
+	uint32_t ErrorOrigin;
+
+	TEEC_UUID tempuuid = { 0x258be795, 0xf9ca, 0x40e6,
+		{ 0xa8, 0x69, 0x9c, 0xe6, 0x88, 0x6c, 0x5d, 0x5d } };
+	TEEC_UUID *TeecUuid = &tempuuid;
+	TEEC_Operation TeecOperation = {0};
+
+	debug("write_to_keymaster\n");
+	OpteeClientApiLibInitialize();
+
+	TeecResult = TEEC_InitializeContext(NULL, &TeecContext);
+
+	TeecResult = TEEC_OpenSession(&TeecContext,
+				&TeecSession,
+				TeecUuid,
+				TEEC_LOGIN_PUBLIC,
+				NULL,
+				NULL,
+				&ErrorOrigin);
+
+	TEEC_SharedMemory SharedMem0 = {0};
+
+	SharedMem0.size = filename_size;
+	SharedMem0.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem0);
+
+	memcpy(SharedMem0.buffer, filename, SharedMem0.size);
+
+	TEEC_SharedMemory SharedMem1 = {0};
+
+	SharedMem1.size = data_size;
+	SharedMem1.flags = 0;
+
+	TeecResult = TEEC_AllocateSharedMemory(&TeecContext, &SharedMem1);
+
+	memcpy(SharedMem1.buffer, data, SharedMem1.size);
+
+	TeecOperation.params[0].tmpref.buffer = SharedMem0.buffer;
+	TeecOperation.params[0].tmpref.size = SharedMem0.size;
+
+	TeecOperation.params[1].tmpref.buffer = SharedMem1.buffer;
+	TeecOperation.params[1].tmpref.size = SharedMem1.size;
+
+
+	TeecOperation.paramTypes = TEEC_PARAM_TYPES(TEEC_MEMREF_TEMP_INPUT,
+						TEEC_MEMREF_TEMP_INOUT,
+						TEEC_NONE,
+						TEEC_NONE);
+
+	TeecResult = TEEC_InvokeCommand(&TeecSession,
+					139,
+					&TeecOperation,
+					&ErrorOrigin);
+
+	TEEC_ReleaseSharedMemory(&SharedMem0);
+	TEEC_ReleaseSharedMemory(&SharedMem1);
+	TEEC_CloseSession(&TeecSession);
+	TeecResult = TEEC_FinalizeContext(&TeecContext);
+	debug("testmm end\n");
+	debug("TeecResult %x\n", TeecResult);
+
+	return TeecResult;
+}
diff --git a/lib/optee_clientApi/tabinary_to_cfile.py b/lib/optee_clientApi/tabinary_to_cfile.py
new file mode 100755
index 0000000000..1574c271b6
--- /dev/null
+++ b/lib/optee_clientApi/tabinary_to_cfile.py
@@ -0,0 +1,58 @@
+#!/usr/bin/env python
+#
+# Copyright 2017, Rockchip Electronics Co., Ltd
+# hisping lin, <hisping.lin@rock-chips.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+def get_args():
+	import argparse
+
+	parser = argparse.ArgumentParser()
+	parser.add_argument('--prefix', required=True, \
+		help='Prefix for the TA array in c file')
+
+	parser.add_argument('--out', required=True, \
+		help='Name of c file for the TA')
+
+	parser.add_argument('--TA', required=True, help='Name of TA')
+
+	return parser.parse_args()
+
+def main():
+	import array
+#	from Crypto.PublicKey import RSA
+#	from Crypto.Util.number import long_to_bytes
+
+	args = get_args();
+
+	f = open(args.TA, 'r')
+	TAdata = f.read()
+	f.close
+
+	f = open(args.out, 'w')
+
+	f.write("#include <stdint.h>\n");
+	f.write("#include <stddef.h>\n\n");
+
+#	f.write("const uint32_t " + args.prefix + "_exponent = " +
+#		str(key.publickey().e) + ";\n\n")
+
+	f.write("const uint8_t " + args.prefix + "_data[] = {\n")
+	i = 0;
+	for x in array.array("B", TAdata):
+		f.write("0x" + '{0:02x}'.format(x) + ",")
+		i = i + 1;
+		if i % 8 == 0:
+			f.write("\n");
+		else:
+			f.write(" ");
+	f.write("};\n");
+
+	f.write("const uint32_t " + args.prefix + "_size = " + str(i) + ";\n" )
+
+	f.close()
+
+if __name__ == "__main__":
+	main()
diff --git a/lib/optee_clientApi/tee_smc-arm64.S b/lib/optee_clientApi/tee_smc-arm64.S
new file mode 100644
index 0000000000..f28a94c277
--- /dev/null
+++ b/lib/optee_clientApi/tee_smc-arm64.S
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2017, Rockchip Electronics Co., Ltd
+ * hisping lin, <hisping.lin@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+
+#ifdef CONFIG_ARM64
+	.text
+
+#define SMC_PARAM_W0_OFFS	0
+#define SMC_PARAM_W2_OFFS	8
+#define SMC_PARAM_W4_OFFS	16
+#define SMC_PARAM_W6_OFFS	24
+
+	/* void tee_smc_call(struct smc_param *param); */
+	.globl	tee_smc_call
+ENTRY(tee_smc_call)
+	stp	x28, x30, [sp, #-16]!
+	mov	x28, x0
+	ldp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
+	ldp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
+	ldp	w4, w5, [x28, #SMC_PARAM_W4_OFFS]
+	ldp	w6, w7, [x28, #SMC_PARAM_W6_OFFS]
+	smc	#0
+	stp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
+	stp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
+	ldp	x28, x30, [sp], #16
+	ret
+ENDPROC(tee_smc_call)
+
+#else
+
+.text
+.balign 4
+.code 32
+
+	/* void tee_smc_call(struct smc_param *param); */
+	.globl	tee_smc_call
+ENTRY(tee_smc_call)
+	push	{r4-r8, lr}
+	mov	r8, r0
+	ldm	r8, {r0-r7}
+.arch_extension sec
+	smc	#0
+	stm	r8, {r0-r7}
+	pop	{r4-r8, pc}
+ENDPROC(tee_smc_call)
+#endif

commit 97a8a900793ea92b95c52783363400bc4fda2587
Author: hisping <hisping.lin@rock-chips.com>
Date:   Thu Aug 24 16:56:55 2017 +0800

    rockchip: rpmb: add support for multi block
    
    add support for uboot read Multi block data from
    rpmb partition and write Multi block data to rpmb partition.
    The previous patch can only read or write one block one time,
    and it affect reading and writing efficiency.
    
    Change-Id: I4b0b19a4a0d985e1d08930fdfbce13ffb847d2f8
    Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>

diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index 0b6b6222bd..fcca28d914 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -40,12 +40,6 @@
 #define RPMB_ERR_CNT_EXPIRED	0x80
 #define RPMB_ERR_MSK		0x7
 
-/* Sizes of RPMB data frame */
-#define RPMB_SZ_STUFF		196
-#define RPMB_SZ_MAC		32
-#define RPMB_SZ_DATA		256
-#define RPMB_SZ_NONCE		16
-
 #define SHA256_BLOCK_SIZE	64
 
 /* Error messages */
@@ -60,20 +54,6 @@ static const char * const rpmb_err_msg[] = {
 	"Authentication key not yet programmed",
 };
 
-
-/* Structure of RPMB data frame. */
-struct s_rpmb {
-	unsigned char stuff[RPMB_SZ_STUFF];
-	unsigned char mac[RPMB_SZ_MAC];
-	unsigned char data[RPMB_SZ_DATA];
-	unsigned char nonce[RPMB_SZ_NONCE];
-	unsigned int write_counter;
-	unsigned short address;
-	unsigned short block_count;
-	unsigned short result;
-	unsigned short request;
-};
-
 static int mmc_set_blockcount(struct mmc *mmc, unsigned int blockcount,
 			      bool is_rel_write)
 {
@@ -87,7 +67,7 @@ static int mmc_set_blockcount(struct mmc *mmc, unsigned int blockcount,
 
 	return mmc_send_cmd(mmc, &cmd, NULL);
 }
-static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
+static int mmc_rpmb_request(struct mmc *mmc, const void *s,
 			    unsigned int count, bool is_rel_write)
 {
 	struct mmc_cmd cmd = {0};
@@ -107,7 +87,7 @@ static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
 	cmd.resp_type = MMC_RSP_R1b;
 
 	data.src = (const char *)s;
-	data.blocks = 1;
+	data.blocks = count;
 	data.blocksize = MMC_MAX_BLOCK_LEN;
 	data.flags = MMC_DATA_WRITE;
 
@@ -121,13 +101,13 @@ static int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s,
 	return 0;
 }
 static int mmc_rpmb_response(struct mmc *mmc, struct s_rpmb *s,
-			     unsigned short expected)
+			     unsigned short expected, unsigned short cnt)
 {
 	struct mmc_cmd cmd = {0};
 	struct mmc_data data;
 	int ret;
 
-	ret = mmc_set_blockcount(mmc, 1, false);
+	ret = mmc_set_blockcount(mmc, cnt, false);
 	if (ret) {
 #ifdef CONFIG_MMC_RPMB_TRACE
 		printf("%s:mmc_set_blockcount-> %d\n", __func__, ret);
@@ -139,7 +119,7 @@ static int mmc_rpmb_response(struct mmc *mmc, struct s_rpmb *s,
 	cmd.resp_type = MMC_RSP_R1;
 
 	data.dest = (char *)s;
-	data.blocks = 1;
+	data.blocks = cnt;
 	data.blocksize = MMC_MAX_BLOCK_LEN;
 	data.flags = MMC_DATA_READ;
 
@@ -178,7 +158,7 @@ static int mmc_rpmb_status(struct mmc *mmc, unsigned short expected)
 		return -1;
 
 	/* Read the result */
-	return mmc_rpmb_response(mmc, rpmb_frame, expected);
+	return mmc_rpmb_response(mmc, rpmb_frame, expected, 1);
 }
 static void rpmb_hmac(unsigned char *key, unsigned char *buff, int len,
 		      unsigned char *output)
@@ -236,7 +216,7 @@ int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *pcounter)
 		return -1;
 
 	/* Read the result */
-	ret = mmc_rpmb_response(mmc, rpmb_frame, RPMB_RESP_WCOUNTER);
+	ret = mmc_rpmb_response(mmc, rpmb_frame, RPMB_RESP_WCOUNTER, 1);
 	if (ret)
 		return ret;
 
@@ -260,65 +240,113 @@ int mmc_rpmb_set_key(struct mmc *mmc, void *key)
 int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk,
 		  unsigned short cnt, unsigned char *key)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(struct s_rpmb, rpmb_frame, 1);
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data,
+		sizeof(struct s_rpmb) * cnt);
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data_verify,
+		sizeof(struct s_rpmb_verify) * cnt);
+	struct s_rpmb *rpmb_frame;
+	struct s_rpmb_verify *rpmb_frame_vrify;
 	int i;
 
+	memset(rpmb_frame_data, 0, sizeof(struct s_rpmb) * cnt);
+	memset(rpmb_frame_data_verify, 0, sizeof(struct s_rpmb_verify) * cnt);
+	rpmb_frame = (struct s_rpmb *)rpmb_frame_data;
+	rpmb_frame->address = cpu_to_be16(blk);
+	rpmb_frame->request = cpu_to_be16(RPMB_REQ_READ_DATA);
+	if (mmc_rpmb_request(mmc, rpmb_frame, 1, false)) {
+		printf("mmc_rpmb_read request error\n");
+		return -1;
+	}
+
+	if (mmc_rpmb_response
+			(mmc,
+			(struct s_rpmb *)rpmb_frame_data,
+			RPMB_RESP_READ_DATA, cnt)) {
+		printf("mmc_rpmb_read response error\n");
+		return -1;
+	}
+
 	for (i = 0; i < cnt; i++) {
-		/* Fill the request */
-		memset(rpmb_frame, 0, sizeof(struct s_rpmb));
-		rpmb_frame->address = cpu_to_be16(blk + i);
-		rpmb_frame->request = cpu_to_be16(RPMB_REQ_READ_DATA);
-		if (mmc_rpmb_request(mmc, rpmb_frame, 1, false))
-			break;
-
-		/* Read the result */
-		if (mmc_rpmb_response(mmc, rpmb_frame, RPMB_RESP_READ_DATA))
-			break;
-
-		/* Check the HMAC if key is provided */
-		if (key) {
-			unsigned char ret_hmac[RPMB_SZ_MAC];
-
-			rpmb_hmac(key, rpmb_frame->data, 284, ret_hmac);
-			if (memcmp(ret_hmac, rpmb_frame->mac, RPMB_SZ_MAC)) {
-				printf("MAC error on block #%d\n", i);
-				break;
-			}
-		}
-		/* Copy data */
+		rpmb_frame = (struct s_rpmb *)
+					(rpmb_frame_data +
+					i * sizeof(struct s_rpmb));
+
+		rpmb_frame_vrify = (struct s_rpmb_verify *)
+					(rpmb_frame_data_verify +
+					i * sizeof(struct s_rpmb_verify));
 		memcpy(addr + i * RPMB_SZ_DATA, rpmb_frame->data, RPMB_SZ_DATA);
+		memcpy(rpmb_frame_vrify->data, rpmb_frame->data, 284);
 	}
-	return i;
+
+	if (key) {
+		unsigned char ret_hmac[RPMB_SZ_MAC];
+		rpmb_hmac
+			(key, (unsigned char *)rpmb_frame_data_verify,
+			284 * cnt, ret_hmac);
+		if (memcmp(ret_hmac, rpmb_frame->mac, RPMB_SZ_MAC)) {
+			printf("MAC error on block #%d\n", i);
+			return -1;
+		}
+	}
+
+	return cnt;
 }
 int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk,
 		  unsigned short cnt, unsigned char *key)
 {
-	ALLOC_CACHE_ALIGN_BUFFER(struct s_rpmb, rpmb_frame, 1);
+	struct s_rpmb *rpmb_frame;
+	struct s_rpmb_verify *rpmb_frame_vrify;
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data,
+		sizeof(struct s_rpmb) * cnt);
+	ALLOC_CACHE_ALIGN_BUFFER
+		(char, rpmb_frame_data_verify,
+		sizeof(struct s_rpmb_verify) * cnt);
+
 	unsigned long wcount;
-	int i;
+	unsigned short i;
+	unsigned short temp;
 
+	temp = cnt - 1;
+	memset(rpmb_frame_data, 0, sizeof(struct s_rpmb) * cnt);
+	memset(rpmb_frame_data_verify, 0, sizeof(struct s_rpmb_verify) * cnt);
 	for (i = 0; i < cnt; i++) {
-		if (mmc_rpmb_get_counter(mmc, &wcount)) {
-			printf("Cannot read RPMB write counter\n");
-			break;
+		if (i == 0) {
+			if (mmc_rpmb_get_counter(mmc, &wcount)) {
+				printf("Cannot read RPMB write counter\n");
+				break;
+			}
 		}
 
-		/* Fill the request */
-		memset(rpmb_frame, 0, sizeof(struct s_rpmb));
+		rpmb_frame = (struct s_rpmb *)
+			(rpmb_frame_data +
+			i * sizeof(struct s_rpmb));
+		rpmb_frame_vrify = (struct s_rpmb_verify *)
+			(rpmb_frame_data_verify +
+			i * sizeof(struct s_rpmb_verify));
 		memcpy(rpmb_frame->data, addr + i * RPMB_SZ_DATA, RPMB_SZ_DATA);
-		rpmb_frame->address = cpu_to_be16(blk + i);
-		rpmb_frame->block_count = cpu_to_be16(1);
+		memcpy(rpmb_frame_vrify->data, addr +
+			i * RPMB_SZ_DATA, RPMB_SZ_DATA);
+		rpmb_frame->address = cpu_to_be16(blk);
+		rpmb_frame_vrify->address = cpu_to_be16(blk);
+		rpmb_frame->block_count = cpu_to_be16(cnt);
+		rpmb_frame_vrify->block_count = cpu_to_be16(cnt);
 		rpmb_frame->write_counter = cpu_to_be32(wcount);
+		rpmb_frame_vrify->write_counter = cpu_to_be32(wcount);
 		rpmb_frame->request = cpu_to_be16(RPMB_REQ_WRITE_DATA);
-		/* Computes HMAC */
-		rpmb_hmac(key, rpmb_frame->data, 284, rpmb_frame->mac);
-
-		if (mmc_rpmb_request(mmc, rpmb_frame, 1, true))
-			break;
-
-		/* Get status */
-		if (mmc_rpmb_status(mmc, RPMB_RESP_WRITE_DATA))
-			break;
+		rpmb_frame_vrify->request = cpu_to_be16(RPMB_REQ_WRITE_DATA);
+		if (i == temp) {
+			rpmb_hmac
+				(key, (unsigned char *)rpmb_frame_data_verify,
+				284 * cnt, rpmb_frame->mac);
+		}
 	}
-	return i;
+	if (mmc_rpmb_request(mmc, rpmb_frame_data, cnt, true))
+		return -1;
+
+	if (mmc_rpmb_status(mmc, RPMB_RESP_WRITE_DATA))
+		return -1;
+	return cnt;
 }

commit 3ccd4bb0b4c2a2e49ccce6f2748cdcff4bb293b6
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 13 13:21:18 2017 +0800

    avb: support vbmeta key_pub verify
    
    Android Things requires specific public key
    metadata and verification logic to correctly
    verify vbmeta public keys.
    
    This commit provide fuction avb_atx_validate_vbmeta_public_key
    to verify the vbmeta.
    
    Change-Id: I227e93b342671b4395cbaa7dea2121cbf0d7234b
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_atx_ops.h b/include/android_avb/avb_atx_ops.h
new file mode 100644
index 0000000000..668a4e2b5b
--- /dev/null
+++ b/include/android_avb/avb_atx_ops.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_OPS_H_
+#define AVB_ATX_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbAtxOps;
+typedef struct AvbAtxOps AvbAtxOps;
+
+/* An extension to AvbOps required by avb_atx_validate_vbmeta_public_key(). */
+struct AvbAtxOps {
+  /* Operations from libavb. */
+  AvbOps* ops;
+
+  /* Reads permanent |attributes| data. There are no restrictions on where this
+   * data is stored. On success, returns AVB_IO_RESULT_OK and populates
+   * |attributes|.
+   */
+  AvbIOResult (*read_permanent_attributes)(
+      AvbAtxOps* atx_ops, AvbAtxPermanentAttributes* attributes);
+
+  /* Reads a |hash| of permanent attributes. This hash MUST be retrieved from a
+   * permanently read-only location (e.g. fuses) when a device is LOCKED. On
+   * success, returned AVB_IO_RESULT_OK and populates |hash|.
+   */
+  AvbIOResult (*read_permanent_attributes_hash)(
+      AvbAtxOps* atx_ops, uint8_t hash[AVB_SHA256_DIGEST_SIZE]);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_OPS_H_ */
diff --git a/include/android_avb/avb_atx_types.h b/include/android_avb/avb_atx_types.h
new file mode 100644
index 0000000000..e52c11dfd8
--- /dev/null
+++ b/include/android_avb/avb_atx_types.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_TYPES_H_
+#define AVB_ATX_TYPES_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size in bytes of an Android Things product ID. */
+#define AVB_ATX_PRODUCT_ID_SIZE 16
+
+/* Size in bytes of a serialized public key with a 4096-bit modulus. */
+#define AVB_ATX_PUBLIC_KEY_SIZE (sizeof(AvbRSAPublicKeyHeader) + 1024)
+
+/* Data structure of Android Things permanent attributes. */
+typedef struct AvbAtxPermanentAttributes {
+  uint32_t version;
+  uint8_t product_root_public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE];
+} AVB_ATTR_PACKED AvbAtxPermanentAttributes;
+
+/* Data structure of signed fields in an Android Things certificate. */
+typedef struct AvbAtxCertificateSignedData {
+  uint32_t version;
+  uint8_t public_key[AVB_ATX_PUBLIC_KEY_SIZE];
+  uint8_t subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t usage[AVB_SHA256_DIGEST_SIZE];
+  uint64_t key_version;
+} AVB_ATTR_PACKED AvbAtxCertificateSignedData;
+
+/* Data structure of an Android Things certificate. */
+typedef struct AvbAtxCertificate {
+  AvbAtxCertificateSignedData signed_data;
+  uint8_t signature[AVB_RSA4096_NUM_BYTES];
+} AVB_ATTR_PACKED AvbAtxCertificate;
+
+/* Data structure of Android Things public key metadata in vbmeta. */
+typedef struct AvbAtxPublicKeyMetadata {
+  uint32_t version;
+  AvbAtxCertificate product_intermediate_key_certificate;
+  AvbAtxCertificate product_signing_key_certificate;
+} AVB_ATTR_PACKED AvbAtxPublicKeyMetadata;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_TYPES_H_ */
diff --git a/include/android_avb/avb_atx_validate.h b/include/android_avb/avb_atx_validate.h
new file mode 100644
index 0000000000..f5804885b9
--- /dev/null
+++ b/include/android_avb/avb_atx_validate.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_ATX_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_atx/libavb_atx.h instead."
+#endif
+*/
+
+#ifndef AVB_ATX_VALIDATE_H_
+#define AVB_ATX_VALIDATE_H_
+
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Rollback index locations for Android Things key versions. */
+#define AVB_ATX_PIK_VERSION_LOCATION 0x1000
+#define AVB_ATX_PSK_VERSION_LOCATION 0x1001
+
+/* An implementation of validate_vbmeta_public_key for Android Things. See
+ * libavb/avb_ops.h for details on validate_vbmeta_public_key in general. This
+ * implementation uses the metadata expected with Android Things vbmeta images
+ * to perform validation on the public key. The ATX ops must be implemented.
+ * That is, |ops->atx_ops| must be valid.
+ *
+ * There are a multiple values that need verification:
+ *   - Permanent Product Attributes: A hash of these attributes is fused into
+ *                                   hardware. Consistency is checked.
+ *   - Product Root Key (PRK): This key is provided in permanent attributes and
+ *                             is the root authority for all Android Things
+ *                             products.
+ *   - Product Intermediate Key (PIK): This key is a rotated intermediary. It is
+ *                                     certified by the PRK.
+ *   - Product Signing Key (PSK): This key is a rotated authority for a specific
+ *                                Android Things product. It is certified by a
+ *                                PIK and must match |public_key_data|.
+ *   - Product ID: This value is provided in permanent attributes and is unique
+ *                 to a specific Android Things product. This value must match
+ *                 the subject of the PSK certificate.
+ */
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_ATX_VALIDATE_H_ */
diff --git a/include/android_avb/libavb_atx.h b/include/android_avb/libavb_atx.h
new file mode 100644
index 0000000000..fc7c876a18
--- /dev/null
+++ b/include/android_avb/libavb_atx.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_ATX_H_
+#define LIBAVB_ATX_H_
+
+#include <android_avb/libavb.h>
+
+/* The AVB_INSIDE_LIBAVB_ATX_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_ATX_H
+#include <android_avb/avb_atx_ops.h>
+#include <android_avb/avb_atx_types.h>
+#include <android_avb/avb_atx_validate.h>
+#undef AVB_INSIDE_LIBAVB_ATX_H
+
+#endif /* LIBAVB_ATX_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 710cca7170..cf29e9b609 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -270,5 +270,6 @@ source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
 source lib/avb/rk_libavb_ab/Kconfig
+source lib/avb/rk_libavb_atx/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index b629ce6cd0..a74b72db15 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -47,6 +47,7 @@ endif
 
 obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
 obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
+obj-$(CONFIG_AVB_LIBAVB_ATX) += avb/rk_libavb_atx/
 
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/avb/rk_libavb_atx/Kconfig b/lib/avb/rk_libavb_atx/Kconfig
new file mode 100644
index 0000000000..f191d4d8bc
--- /dev/null
+++ b/lib/avb/rk_libavb_atx/Kconfig
@@ -0,0 +1,6 @@
+config AVB_LIBAVB_ATX
+	bool "support vbmeta public key verify"
+	help
+	  Android Things requires specific public key
+	  metadata and verification logic to correctly
+	  verify vbmeta public keys.
diff --git a/lib/avb/rk_libavb_atx/Makefile b/lib/avb/rk_libavb_atx/Makefile
new file mode 100644
index 0000000000..3ffa57a0b1
--- /dev/null
+++ b/lib/avb/rk_libavb_atx/Makefile
@@ -0,0 +1 @@
+obj-y	+= avb_atx_validate.o
diff --git a/lib/avb/rk_libavb_atx/avb_atx_validate.c b/lib/avb/rk_libavb_atx/avb_atx_validate.c
new file mode 100644
index 0000000000..dbc6769313
--- /dev/null
+++ b/lib/avb/rk_libavb_atx/avb_atx_validate.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_atx_validate.h>
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Computes the SHA256 |hash| of |length| bytes of |data|. */
+static void sha256(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  AvbSHA256Ctx context;
+  avb_sha256_init(&context);
+  avb_sha256_update(&context, data, length);
+  uint8_t* tmp = avb_sha256_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA256_DIGEST_SIZE);
+}
+
+/* Computes the SHA512 |hash| of |length| bytes of |data|. */
+static void sha512(const uint8_t* data,
+                   uint32_t length,
+                   uint8_t hash[AVB_SHA512_DIGEST_SIZE]) {
+  AvbSHA512Ctx context;
+  avb_sha512_init(&context);
+  avb_sha512_update(&context, data, length);
+  uint8_t* tmp = avb_sha512_final(&context);
+  avb_memcpy(hash, tmp, AVB_SHA512_DIGEST_SIZE);
+}
+
+/* Computes the SHA256 |hash| of a NUL-terminated |str|. */
+static void sha256_str(const char* str, uint8_t hash[AVB_SHA256_DIGEST_SIZE]) {
+  sha256((const uint8_t*)str, avb_strlen(str), hash);
+}
+
+/* Verifies structure and |expected_hash| of permanent |attributes|. */
+static bool verify_permanent_attributes(
+    const AvbAtxPermanentAttributes* attributes,
+    uint8_t expected_hash[AVB_SHA256_DIGEST_SIZE]) {
+  uint8_t hash[AVB_SHA256_DIGEST_SIZE];
+
+  if (attributes->version != 1) {
+    avb_error("Unsupported permanent attributes version.\n");
+    return false;
+  }
+  sha256((const uint8_t*)attributes, sizeof(AvbAtxPermanentAttributes), hash);
+  if (0 != avb_safe_memcmp(hash, expected_hash, AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid permanent attributes.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies the format, key version, usage, and signature of a certificate. */
+static bool verify_certificate(AvbAtxCertificate* certificate,
+                               uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                               uint64_t minimum_key_version,
+                               uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE]) {
+  const AvbAlgorithmData* algorithm_data;
+  uint8_t certificate_hash[AVB_SHA512_DIGEST_SIZE];
+
+  if (certificate->signed_data.version != 1) {
+    avb_error("Unsupported certificate format.\n");
+    return false;
+  }
+  algorithm_data = avb_get_algorithm_data(AVB_ALGORITHM_TYPE_SHA512_RSA4096);
+  sha512((const uint8_t*)&certificate->signed_data,
+         sizeof(AvbAtxCertificateSignedData),
+         certificate_hash);
+  if (!avb_rsa_verify(authority,
+                      AVB_ATX_PUBLIC_KEY_SIZE,
+                      certificate->signature,
+                      AVB_RSA4096_NUM_BYTES,
+                      certificate_hash,
+                      AVB_SHA512_DIGEST_SIZE,
+                      algorithm_data->padding,
+                      algorithm_data->padding_len)) {
+    avb_error("Invalid certificate signature.\n");
+    return false;
+  }
+  if (certificate->signed_data.key_version < minimum_key_version) {
+    avb_error("Key rollback detected.\n");
+    return false;
+  }
+  if (0 != avb_safe_memcmp(certificate->signed_data.usage,
+                           expected_usage,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Invalid certificate usage.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PIK certificate. */
+static bool verify_pik_certificate(AvbAtxCertificate* certificate,
+                                   uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+                                   uint64_t minimum_version) {
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot.ca", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PIK certificate.\n");
+    return false;
+  }
+  return true;
+}
+
+/* Verifies signature and fields of a PSK certificate. */
+static bool verify_psk_certificate(
+    AvbAtxCertificate* certificate,
+    uint8_t authority[AVB_ATX_PUBLIC_KEY_SIZE],
+    uint64_t minimum_version,
+    uint8_t product_id[AVB_ATX_PRODUCT_ID_SIZE]) {
+  uint8_t expected_subject[AVB_SHA256_DIGEST_SIZE];
+  uint8_t expected_usage[AVB_SHA256_DIGEST_SIZE];
+
+  sha256_str("com.google.android.things.vboot", expected_usage);
+  if (!verify_certificate(
+          certificate, authority, minimum_version, expected_usage)) {
+    avb_error("Invalid PSK certificate.\n");
+    return false;
+  }
+  sha256(product_id, AVB_ATX_PRODUCT_ID_SIZE, expected_subject);
+  if (0 != avb_safe_memcmp(certificate->signed_data.subject,
+                           expected_subject,
+                           AVB_SHA256_DIGEST_SIZE)) {
+    avb_error("Product ID mismatch.\n");
+    return false;
+  }
+  return true;
+}
+
+AvbIOResult avb_atx_validate_vbmeta_public_key(
+    AvbOps* ops,
+    const uint8_t* public_key_data,
+    size_t public_key_length,
+    const uint8_t* public_key_metadata,
+    size_t public_key_metadata_length,
+    bool* out_is_trusted) {
+  AvbIOResult result = AVB_IO_RESULT_OK;
+  AvbAtxPermanentAttributes permanent_attributes;
+  uint8_t permanent_attributes_hash[AVB_SHA256_DIGEST_SIZE];
+  AvbAtxPublicKeyMetadata metadata;
+  uint64_t minimum_version;
+
+  /* Be pessimistic so we can exit early without having to remember to clear.
+   */
+  *out_is_trusted = false;
+
+  /* Read and verify permanent attributes. */
+  result = ops->atx_ops->read_permanent_attributes(ops->atx_ops,
+                                                   &permanent_attributes);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes.\n");
+    return result;
+  }
+  result = ops->atx_ops->read_permanent_attributes_hash(
+      ops->atx_ops, permanent_attributes_hash);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read permanent attributes hash.\n");
+    return result;
+  }
+  if (!verify_permanent_attributes(&permanent_attributes,
+                                   permanent_attributes_hash)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Sanity check public key metadata. */
+  if (public_key_metadata_length != sizeof(AvbAtxPublicKeyMetadata)) {
+    avb_error("Invalid public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  avb_memcpy(&metadata, public_key_metadata, sizeof(AvbAtxPublicKeyMetadata));
+  if (metadata.version != 1) {
+    avb_error("Unsupported public key metadata.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PIK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PIK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PIK minimum version.\n");
+    return result;
+  }
+  if (!verify_pik_certificate(&metadata.product_intermediate_key_certificate,
+                              permanent_attributes.product_root_public_key,
+                              minimum_version)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK certificate. */
+  result = ops->read_rollback_index(
+      ops, AVB_ATX_PSK_VERSION_LOCATION, &minimum_version);
+  if (result != AVB_IO_RESULT_OK) {
+    avb_error("Failed to read PSK minimum version.\n");
+    return result;
+  }
+  if (!verify_psk_certificate(
+          &metadata.product_signing_key_certificate,
+          metadata.product_intermediate_key_certificate.signed_data.public_key,
+          minimum_version,
+          permanent_attributes.product_id)) {
+    return AVB_IO_RESULT_OK;
+  }
+
+  /* Verify the PSK is the same key that verified vbmeta. */
+  if (public_key_length != AVB_ATX_PUBLIC_KEY_SIZE) {
+    avb_error("Public key length mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+  if (0 != avb_safe_memcmp(
+               metadata.product_signing_key_certificate.signed_data.public_key,
+               public_key_data,
+               AVB_ATX_PUBLIC_KEY_SIZE)) {
+    avb_error("Public key mismatch.\n");
+    return AVB_IO_RESULT_OK;
+  }
+
+  *out_is_trusted = true;
+  return AVB_IO_RESULT_OK;
+}

commit cf7c71c1bf6a7af45601b778885a81aaada5967e
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 13 11:32:58 2017 +0800

    avb: add functions to choose a/b system
    
    This commit is based on google avb, and it
    can be getted by https://android.googlesource.com/platform/external/avb.
    
    This new rk_libavb_ab depend on rk_libavb.
    
    This commit provide some useful functions.
    The function of avb_ab_flow can be use to
    chose a/b system and flow.The other functions
    can be used to debug.
    
    Change-Id: I768272286898b36e9a64749ff30bc6ff0cb019a1
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_ab_flow.h b/include/android_avb/avb_ab_flow.h
new file mode 100644
index 0000000000..6b3d9e4e1c
--- /dev/null
+++ b/include/android_avb/avb_ab_flow.h
@@ -0,0 +1,279 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_FLOW_H_
+#define AVB_AB_FLOW_H_
+
+#include <android_avb/avb_ab_ops.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the A/B struct when serialized. */
+#define AVB_AB_MAGIC "\0AB0"
+#define AVB_AB_MAGIC_LEN 4
+
+/* Versioning for the on-disk A/B metadata - keep in sync with avbtool. */
+#define AVB_AB_MAJOR_VERSION 1
+#define AVB_AB_MINOR_VERSION 0
+
+/* Size of AvbABData struct. */
+#define AVB_AB_DATA_SIZE 512
+
+/* Maximum values for slot data */
+#define AVB_AB_MAX_PRIORITY 15
+#define AVB_AB_MAX_TRIES_REMAINING 7
+
+/* Struct used for recording per-slot metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABSlotData {
+  /* Slot priority. Valid values range from 0 to AVB_AB_MAX_PRIORITY,
+   * both inclusive with 1 being the lowest and AVB_AB_MAX_PRIORITY
+   * being the highest. The special value 0 is used to indicate the
+   * slot is unbootable.
+   */
+  uint8_t priority : 4;
+
+  /* Number of times left attempting to boot this slot ranging from 0
+   * to AVB_AB_MAX_TRIES_REMAINING.
+   */
+  uint8_t tries_remaining : 3;
+
+  /* Non-zero if this slot has booted successfully, 0 otherwise. */
+  uint8_t successful_boot : 1;
+    /* 1 if this slot is corrupted from a dm-verity corruption, 0 */
+    /* otherwise. */
+    uint8_t verity_corrupted : 1;
+  /* Reserved for future use. */
+  uint8_t reserved : 7;
+} AVB_ATTR_PACKED AvbABSlotData;
+
+/* Struct used for recording A/B metadata.
+ *
+ * When serialized, data is stored in network byte-order.
+ */
+typedef struct AvbABData
+{
+	/* NUL terminated active slot suffix. */
+	char slot_suffix[4];
+	/* Magic number used for identification - see AVB_AB_MAGIC. */
+	uint8_t magic[AVB_AB_MAGIC_LEN];
+
+	/* Version of on-disk struct - see AVB_AB_{MAJOR,MINOR}_VERSION. */
+	uint8_t version_major;
+
+	/* Number of slots being managed. */
+	uint8_t nb_slot : 3;
+	/* Number of times left attempting to boot recovery. */
+	uint8_t recovery_tries_remaining : 3;
+	/* Padding to ensure |slots| field start eight bytes in. */
+	uint8_t reserved1[2];
+
+	/* Per-slot metadata. */
+	AvbABSlotData slots[4];
+
+	/* Reserved for future use. */
+	uint8_t reserved2[8];
+	//uint8_t reserved3[480];
+
+	/* CRC32 of all 28 bytes preceding this field. */
+	uint32_t crc32;
+	uint8_t version_minor;
+} AVB_ATTR_PACKED AvbABData;
+
+/* Copies |src| to |dest|, byte-swapping fields in the
+ * process. Returns false if the data is invalid (e.g. wrong magic,
+ * wrong CRC32 etc.), true otherwise.
+ */
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Copies |src| to |dest|, byte-swapping fields in the process. Also
+ * updates the |crc32| field in |dest|.
+ */
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src, AvbABData* dest);
+
+/* Initializes |data| such that it has two slots and both slots have
+ * maximum tries remaining. The CRC is not set.
+ */
+void avb_ab_data_init(AvbABData* data);
+
+/* Reads A/B metadata from the 'misc' partition using |ops|. Returned
+ * data is properly byteswapped. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ *
+ * If the data read from disk is invalid (e.g. wrong magic or CRC
+ * checksum failure), the metadata will be reset using
+ * avb_ab_data_init() and then written to disk.
+ */
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data);
+
+/* Load A/B metadata, like function avb_ab_data_read*/
+AvbIOResult load_metadata(AvbABOps* ab_ops,
+                                 AvbABData* ab_data,
+                                 AvbABData* ab_data_orig);
+
+/* Writes A/B metadata to the 'misc' partition using |ops|. This will
+ * byteswap and update the CRC as needed. Returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data);
+
+/* Return codes used in avb_ab_flow(), see that function for
+ * documentation of each value.
+ */
+typedef enum {
+  AVB_AB_FLOW_RESULT_OK,
+  AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR,
+  AVB_AB_FLOW_RESULT_ERROR_OOM,
+  AVB_AB_FLOW_RESULT_ERROR_IO,
+  AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS,
+  AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT
+} AvbABFlowResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_ab_flow_result_to_string(AvbABFlowResult result);
+
+/* High-level function to select a slot to boot. The following
+ * algorithm is used:
+ *
+ * 1. A/B metadata is loaded and validated using the
+ * read_ab_metadata() operation. Typically this means it's read from
+ * the 'misc' partition and if it's invalid then it's reset using
+ * avb_ab_data_init() and this reset metadata is returned.
+ *
+ * 2. All bootable slots listed in the A/B metadata are verified using
+ * avb_slot_verify(). If a slot is invalid or if it fails verification
+ * (and AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is not set, see
+ * below), it will be marked as unbootable in the A/B metadata and the
+ * metadata will be saved to disk before returning.
+ *
+ * 3. If there are no bootable slots, the value
+ * AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS is returned.
+ *
+ * 4. For each bootable slot, the Stored Rollback Indexes are updated
+ * such that for each rollback index location, the Stored Rollback
+ * Index is the largest number smaller than or equal to the Rollback
+ * Index of each slot.
+ *
+ * 5. The bootable slot with the highest priority is selected and
+ * returned in |out_data|. If this slot is already marked as
+ * successful, the A/B metadata is not modified. However, if the slot
+ * is not marked as bootable its |tries_remaining| count is
+ * decremented and the A/B metadata is saved to disk before returning.
+ * In either case the value AVB_AB_FLOW_RESULT_OK is returning.
+ *
+ * The partitions to load is given in |requested_partitions| as a
+ * NULL-terminated array of NUL-terminated strings. Typically the
+ * |requested_partitions| array only contains a single item for the
+ * boot partition, 'boot'.
+ *
+ * If the device is unlocked (and _only_ if it's unlocked), the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag should be set
+ * in the |flags| parameter. This will allow considering slots as
+ * verified even when avb_slot_verify() returns
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX for the slot in
+ * question.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * If a slot was selected and it verified then AVB_AB_FLOW_RESULT_OK
+ * is returned.
+ *
+ * If a slot was selected but it didn't verify then
+ * AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR is returned. This can
+ * only happen when the AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+ * flag is set.
+ *
+ * If an I/O operation - such as loading/saving metadata or checking
+ * rollback indexes - fail, the value AVB_AB_FLOW_RESULT_ERROR_IO is
+ * returned.
+ *
+ * If memory allocation fails, AVB_AB_FLOW_RESULT_ERROR_OOM is
+ * returned.
+ *
+ * If invalid arguments are passed,
+ * AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT is returned. For example
+ * this can happen if using AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ *
+ * Reasonable behavior for handling AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS
+ * is to initiate device repair (which is device-dependent).
+ */
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data);
+
+AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[]);
+
+/* Marks the slot with the given slot number as active. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater when completing
+ * an update. It can also used by the firmware for implementing the
+ * "set_active" command.
+ */
+AvbIOResult avb_ab_mark_slot_active(AvbABOps* ab_ops, unsigned int slot_number);
+
+/* Marks the slot with the given slot number as unbootable. Returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ *
+ * This function is typically used by the OS updater before writing to
+ * a slot.
+ */
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+/* Marks the slot with the given slot number as having booted
+ * successfully. Returns AVB_IO_RESULT_OK on success, error code
+ * otherwise.
+ *
+ * Calling this on an unbootable slot is an error - AVB_IO_RESULT_OK
+ * will be returned yet the function will have no side-effects.
+ *
+ * This function is typically used by the OS updater after having
+ * confirmed that the slot works as intended.
+ */
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps* ab_ops,
+                                        unsigned int slot_number);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_FLOW_H_ */
diff --git a/include/android_avb/avb_ab_ops.h b/include/android_avb/avb_ab_ops.h
new file mode 100644
index 0000000000..d440e75b18
--- /dev/null
+++ b/include/android_avb/avb_ab_ops.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_AB_H) && !defined(AVB_COMPILATION)
+#error \
+    "Never include this file directly, include libavb_ab/libavb_ab.h instead."
+#endif
+*/
+
+#ifndef AVB_AB_OPS_H_
+#define AVB_AB_OPS_H_
+
+#include <android_avb/libavb.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct AvbABOps;
+typedef struct AvbABOps AvbABOps;
+
+struct AvbABData;
+
+/* High-level operations/functions/methods for A/B that are platform
+ * dependent.
+ */
+struct AvbABOps {
+	/* Operations from libavb. */
+	AvbOps* ops;
+
+	/* Reads A/B metadata from persistent storage. Returned data is
+	 * properly byteswapped. Returns AVB_IO_RESULT_OK on success, error
+	 * code otherwise.
+	 *
+	 * If the data read is invalid (e.g. wrong magic or CRC checksum
+	 * failure), the metadata shoule be reset using avb_ab_data_init()
+	 * and then written to persistent storage.
+	 *
+	 * Implementations will typically want to use avb_ab_data_read()
+	 * here to use the 'misc' partition for persistent storage.
+	 */
+	AvbIOResult (*read_ab_metadata)(AvbABOps *ab_ops, struct AvbABData *data);
+
+	/* Writes A/B metadata to persistent storage. This will byteswap and
+	 * update the CRC as needed. Returns AVB_IO_RESULT_OK on success,
+	 * error code otherwise.
+	 *
+	 * Implementations will typically want to use avb_ab_data_write()
+	 * here to use the 'misc' partition for persistent storage.
+	 */
+	AvbIOResult (*write_ab_metadata)(AvbABOps *ab_ops, const struct AvbABData *data);
+	void (*init_ab_metadata)(struct AvbABData *data);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_AB_OPS_H_ */
diff --git a/include/android_avb/libavb_ab.h b/include/android_avb/libavb_ab.h
new file mode 100644
index 0000000000..fcedfd61bf
--- /dev/null
+++ b/include/android_avb/libavb_ab.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_AB_H_
+#define LIBAVB_AB_H_
+
+#include <android_avb/libavb.h>
+
+/* The AVB_INSIDE_LIBAVB_AB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_AB_H
+#include <android_avb/avb_ab_flow.h>
+#include <android_avb/avb_ab_ops.h>
+#undef AVB_INSIDE_LIBAVB_AB_H
+
+#endif /* LIBAVB_AB_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 96f2b269ce..710cca7170 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -269,5 +269,6 @@ endmenu
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
 source lib/avb/rk_libavb/Kconfig
+source lib/avb/rk_libavb_ab/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index f949f447dd..b629ce6cd0 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -46,6 +46,7 @@ obj-y += list_sort.o
 endif
 
 obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
+obj-$(CONFIG_AVB_LIBAVB_AB) += avb/rk_libavb_ab/
 
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
diff --git a/lib/avb/rk_libavb_ab/Kconfig b/lib/avb/rk_libavb_ab/Kconfig
new file mode 100644
index 0000000000..ae1a8095f3
--- /dev/null
+++ b/lib/avb/rk_libavb_ab/Kconfig
@@ -0,0 +1,7 @@
+config AVB_LIBAVB_AB
+	bool "Choose the a/b system and flow"
+	help
+	  In the android things system, there are 
+	  _a and _b or more systems. So we have to
+	  choose the _a or _b system to startup.
+	  This libavb_ab can suport these functions.
diff --git a/lib/avb/rk_libavb_ab/Makefile b/lib/avb/rk_libavb_ab/Makefile
new file mode 100644
index 0000000000..9b1aa04880
--- /dev/null
+++ b/lib/avb/rk_libavb_ab/Makefile
@@ -0,0 +1 @@
+obj-y	+= avb_ab_flow.o
diff --git a/lib/avb/rk_libavb_ab/avb_ab_flow.c b/lib/avb/rk_libavb_ab/avb_ab_flow.c
new file mode 100644
index 0000000000..9f1fa6df6e
--- /dev/null
+++ b/lib/avb/rk_libavb_ab/avb_ab_flow.c
@@ -0,0 +1,603 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include <common.h>
+#include <image.h>
+#include <android_image.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <mapmem.h>
+#include <errno.h>
+#include <command.h>
+#include <mmc.h>
+#include <blk.h>
+#include <part.h>
+#include <android_avb/libavb_ab.h>
+#include <config.h>
+#include <command.h>
+#include <environment.h>
+#include <linux/types.h>
+#include <api_public.h>
+#include <android_avb/libavb.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_ab_flow.h>
+
+
+bool avb_ab_data_verify_and_byteswap(const AvbABData* src, AvbABData* dest)
+{
+	/* Ensure magic is correct. */
+	if (avb_safe_memcmp(src->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN) != 0) {
+		avb_error("Magic is incorrect.\n");
+		return false;
+	}
+
+	avb_memcpy(dest, src, sizeof(AvbABData));
+	dest->crc32 = avb_be32toh(dest->crc32);
+
+	/* Ensure we don't attempt to access any fields if the major version
+	* is not supported.
+	*/
+	if (dest->version_major > AVB_AB_MAJOR_VERSION) {
+		avb_error("No support for given major version.\n");
+		return false;
+	}
+
+	/* Bail if CRC32 doesn't match. */
+	if (dest->crc32 !=
+		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1)) {
+		avb_error("CRC32 does not match.\n");
+		return false;
+	}
+
+	return true;
+}
+
+void avb_ab_data_update_crc_and_byteswap(const AvbABData* src,
+                                         AvbABData* dest)
+{
+	avb_memcpy(dest, src, sizeof(AvbABData));
+	dest->crc32 = avb_htobe32(
+		avb_crc32((const uint8_t*)dest, sizeof(AvbABData) - sizeof(uint32_t) - 1));
+}
+
+void avb_ab_data_init(AvbABData *data)
+{
+	avb_memset(data, '\0', sizeof(AvbABData));
+	avb_memcpy(data->magic, AVB_AB_MAGIC, AVB_AB_MAGIC_LEN);
+	data->nb_slot = 2;
+	data->slot_suffix[0] = 'a';
+	data->slot_suffix[1] = 'b';
+	data->slot_suffix[2] = '\0';
+	data->slot_suffix[3] = '\0';
+	data->version_major = AVB_AB_MAJOR_VERSION;
+	data->version_minor = AVB_AB_MINOR_VERSION;
+	data->slots[0].priority = AVB_AB_MAX_PRIORITY;
+	data->slots[0].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	data->slots[0].successful_boot = 0;
+	data->slots[1].priority = AVB_AB_MAX_PRIORITY - 1;
+	data->slots[1].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	data->slots[1].successful_boot = 0;
+}
+
+/* The AvbABData struct is stored 2048 bytes into the 'misc' partition
+ * following the 'struct bootloader_message' field. The struct is
+ * compatible with the guidelines in bootable/recovery/bootloader.h -
+ * e.g. it is stored in the |slot_suffix| field, starts with a
+ * NUL-byte, and is 32 bytes long.
+ */
+#define AB_METADATA_MISC_PARTITION_OFFSET 2048
+
+AvbIOResult avb_ab_data_read(AvbABOps* ab_ops, AvbABData* data)
+{
+	AvbOps* ops = ab_ops->ops;
+	ALLOC_CACHE_ALIGN_BUFFER(u8, serialized, 512);
+	size_t num_bytes_read;
+
+	memset(serialized,0,sizeof(u8) * 512);
+	ops->read_from_partition(ops,
+				"misc",
+				AB_METADATA_MISC_PARTITION_OFFSET,
+				512,
+				(AvbABData*)serialized,
+				&num_bytes_read);
+	if (!avb_ab_data_verify_and_byteswap((AvbABData*)serialized, data)) {
+	avb_error(
+		"Error validating A/B metadata from disk. "
+		"Resetting and writing new A/B metadata to disk.\n");
+		avb_ab_data_init(data);
+		return avb_ab_data_write(ab_ops, data);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+AvbIOResult avb_ab_data_write(AvbABOps* ab_ops, const AvbABData* data) {
+	AvbOps* ops = ab_ops->ops;
+	AvbIOResult io_ret;
+	ALLOC_CACHE_ALIGN_BUFFER(u8, temp, 512);
+	memset(temp,0,sizeof(u8) * 512);
+
+	avb_ab_data_update_crc_and_byteswap(data, (AvbABData*)temp);
+	io_ret = ops->write_to_partition(ops,
+                                   "misc",
+                                   AB_METADATA_MISC_PARTITION_OFFSET,
+                                   512,
+                                   temp);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		return AVB_IO_RESULT_ERROR_OOM;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		avb_error("Error writing A/B metadata.\n");
+		return AVB_IO_RESULT_ERROR_IO;
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+static bool slot_is_bootable(AvbABSlotData* slot)
+{
+	return slot->priority > 0 &&
+		(slot->successful_boot || (slot->tries_remaining > 0));
+}
+
+static void slot_set_unbootable(AvbABSlotData* slot)
+{
+	slot->priority = 0;
+	slot->tries_remaining = 0;
+	slot->successful_boot = 0;
+}
+
+/* Ensure all unbootable and/or illegal states are marked as the
+ * canonical 'unbootable' state, e.g. priority=0, tries_remaining=0,
+ * and successful_boot=0.
+ */
+static void slot_normalize(AvbABSlotData* slot)
+{
+	if (slot->priority > 0) {
+		if (slot->tries_remaining == 0 && !slot->successful_boot) {
+		/* We've exhausted all tries -> unbootable. */
+		slot_set_unbootable(slot);
+	}
+	if (slot->tries_remaining > 0 && slot->successful_boot) {
+		/* Illegal state - avb_ab_mark_slot_successful() will clear
+		 * tries_remaining when setting successful_boot.
+		 */
+		slot_set_unbootable(slot);
+	}
+	} else {
+		slot_set_unbootable(slot);
+	}
+}
+
+static const char* slot_suffixes[2] = {"_a", "_b"};
+
+/* Helper function to load metadata - returns AVB_IO_RESULT_OK on
+ * success, error code otherwise.
+ */
+AvbIOResult load_metadata(AvbABOps *ab_ops,
+				AvbABData *ab_data,
+				AvbABData *ab_data_orig)
+{
+	AvbIOResult io_ret;
+	io_ret = ab_ops->read_ab_metadata(ab_ops,ab_data);
+	if(io_ret != AVB_IO_RESULT_OK) {
+		avb_error("I/O error while loading A/B metadata.\n");
+		return io_ret;
+	}
+
+	*ab_data_orig = *ab_data;
+	slot_normalize(&ab_data->slots[0]);
+	slot_normalize(&ab_data->slots[1]);
+	return AVB_IO_RESULT_OK;
+}
+
+
+/* Writes A/B metadata to disk only if it has changed - returns
+ * AVB_IO_RESULT_OK on success, error code otherwise.
+ */
+static AvbIOResult save_metadata_if_changed(AvbABOps* ab_ops,
+                                            AvbABData* ab_data,
+                                            AvbABData* ab_data_orig)
+{
+	if (avb_safe_memcmp(ab_data, ab_data_orig, sizeof(AvbABData)) != 0) {
+		avb_debug("Writing A/B metadata to disk.\n");
+		return ab_ops->write_ab_metadata(ab_ops, ab_data);
+	}
+	return AVB_IO_RESULT_OK;
+}
+
+AvbABFlowResult avb_ab_flow(AvbABOps* ab_ops,
+                            const char* const* requested_partitions,
+                            AvbSlotVerifyFlags flags,
+                            AvbHashtreeErrorMode hashtree_error_mode,
+                            AvbSlotVerifyData** out_data)
+{
+	AvbOps* ops = ab_ops->ops;
+	AvbSlotVerifyData* slot_data[2] = {NULL, NULL};
+	AvbSlotVerifyData* data = NULL;
+	AvbABFlowResult ret;
+	AvbABData ab_data, ab_data_orig;
+	size_t slot_index_to_boot, n;
+	AvbIOResult io_ret;
+	bool saw_and_allowed_verification_error = false;
+	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		goto out;
+	}
+
+	/* Validate all bootable slots. */
+	for (n = 0; n < 2; n++) {
+		if (slot_is_bootable(&ab_data.slots[n])) {
+			AvbSlotVerifyResult verify_result;
+			bool set_slot_unbootable = false;
+
+			verify_result = avb_slot_verify(ops,
+                                      requested_partitions,
+                                      slot_suffixes[n],
+                                      flags,
+                                      hashtree_error_mode,
+                                      &slot_data[n]);
+			switch (verify_result) {
+			case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+				ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+				goto out;
+
+			case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+				goto out;
+
+			case AVB_SLOT_VERIFY_RESULT_OK:
+				break;
+
+			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+			case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+			/* Even with AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR
+		 	 * these mean game over.
+		 	 */
+				set_slot_unbootable = true;
+				break;
+
+			/* explicit fallthrough. */
+			case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+			case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+			case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+				if (flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR) {
+				/* Do nothing since we allow this. */
+					avb_debugv("Allowing slot ",
+					slot_suffixes[n],
+					" which verified "
+					"with result ",
+					avb_slot_verify_result_to_string(verify_result),
+					" because "
+					"AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR "
+					"is set.\n",
+					NULL);
+					saw_and_allowed_verification_error = true;
+				} else {
+					set_slot_unbootable = true;
+				}
+				break;
+
+			case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+				ret = AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT;
+				goto out;
+			/* Do not add a 'default:' case here because of -Wswitch. */
+			}
+
+			if (set_slot_unbootable) {
+				avb_errorv("Error verifying slot ",
+					slot_suffixes[n],
+					" with result ",
+					avb_slot_verify_result_to_string(verify_result),
+					" - setting unbootable.\n",
+					NULL);
+				slot_set_unbootable(&ab_data.slots[n]);
+			}
+		}
+	}
+
+	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+			slot_index_to_boot = 1;
+		} else {
+			slot_index_to_boot = 0;
+		}
+		} else if (slot_is_bootable(&ab_data.slots[0])) {
+			slot_index_to_boot = 0;
+		} else if (slot_is_bootable(&ab_data.slots[1])) {
+			slot_index_to_boot = 1;
+		} else {
+		/* No bootable slots! */
+			avb_error("No bootable slots found.\n");
+			ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+			goto out;
+		}
+
+		/* Update stored rollback index such that the stored rollback index
+		 * is the largest value supporting all currently bootable slots. Do
+		 * this for every rollback index location.
+		 */
+		for (n = 0; n < AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS; n++) {
+			uint64_t rollback_index_value = 0;
+
+			if (slot_data[0] != NULL && slot_data[1] != NULL) {
+				uint64_t a_rollback_index = slot_data[0]->rollback_indexes[n];
+				uint64_t b_rollback_index = slot_data[1]->rollback_indexes[n];
+				rollback_index_value =
+				(a_rollback_index < b_rollback_index ? a_rollback_index
+								: b_rollback_index);
+			} else if (slot_data[0] != NULL) {
+				rollback_index_value = slot_data[0]->rollback_indexes[n];
+			} else if (slot_data[1] != NULL) {
+				rollback_index_value = slot_data[1]->rollback_indexes[n];
+			}
+
+			if (rollback_index_value != 0) {
+				uint64_t current_rollback_index_value;
+				io_ret = ops->read_rollback_index(ops, n, &current_rollback_index_value);
+				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+					goto out;
+			} else if (io_ret != AVB_IO_RESULT_OK) {
+				avb_error("Error getting rollback index for slot.\n");
+				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+				goto out;
+			}
+			if (current_rollback_index_value != rollback_index_value) {
+				io_ret = ops->write_rollback_index(ops, n, rollback_index_value);
+				if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+ 					ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+					goto out;
+				} else if (io_ret != AVB_IO_RESULT_OK) {
+					avb_error("Error setting stored rollback index.\n");
+          				ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+          				goto out;
+				}
+			}
+		}
+	}
+
+	/* Finally, select this slot. */
+	avb_assert(slot_data[slot_index_to_boot] != NULL);
+	data = slot_data[slot_index_to_boot];
+	slot_data[slot_index_to_boot] = NULL;
+	if (saw_and_allowed_verification_error) {
+		avb_assert(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+		ret = AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR;
+	} else {
+		ret = AVB_AB_FLOW_RESULT_OK;
+	}
+
+	/* ... and decrement tries remaining, if applicable. */
+	if (!ab_data.slots[slot_index_to_boot].successful_boot &&
+		ab_data.slots[slot_index_to_boot].tries_remaining > 0) {
+		ab_data.slots[slot_index_to_boot].tries_remaining -= 1;
+	}
+
+out:
+	io_ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	if (io_ret != AVB_IO_RESULT_OK) {
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+	} else {
+			ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		}
+		if (data != NULL) {
+			avb_slot_verify_data_free(data);
+			data = NULL;
+		}
+	}
+
+	for (n = 0; n < 2; n++) {
+		if (slot_data[n] != NULL) {
+			avb_slot_verify_data_free(slot_data[n]);
+		}
+	}
+
+	if (out_data != NULL) {
+		*out_data = data;
+	} else {
+		if (data != NULL) {
+			avb_slot_verify_data_free(data);
+		}
+	}
+
+	return ret;
+}
+
+AvbABFlowResult avb_ab_slot_select(AvbABOps* ab_ops,char select_slot[])
+{
+	AvbABFlowResult ret = 0;
+	AvbIOResult io_ret = 0;
+	AvbABData ab_data, ab_data_orig;
+	size_t slot_index_to_boot;
+	io_ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		ret = AVB_AB_FLOW_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (slot_is_bootable(&ab_data.slots[0]) && slot_is_bootable(&ab_data.slots[1])) {
+		if (ab_data.slots[1].priority > ab_data.slots[0].priority) {
+			slot_index_to_boot = 1;
+		} else {
+			slot_index_to_boot = 0;
+		}
+	} else if(slot_is_bootable(&ab_data.slots[0])) {
+		slot_index_to_boot = 0;
+	} else if(slot_is_bootable(&ab_data.slots[1])) {
+		slot_index_to_boot = 1;
+	} else {
+		avb_error("No bootable slots found.\n");
+		ret = AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS;
+		goto out;
+	}
+	if (slot_index_to_boot == 0) {
+		select_slot[0] = '_';
+		select_slot[1] = 'a';
+		select_slot[2] = '\0';
+	} else if(slot_index_to_boot == 1) {
+		select_slot[0] = '_';
+		select_slot[1] = 'b';
+		select_slot[2] = '\0';
+	}
+out:
+	return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_active(AvbABOps *ab_ops,
+                                    unsigned int slot_number)
+{
+	AvbABData ab_data, ab_data_orig;
+	unsigned int other_slot_number;
+	AvbIOResult ret;
+
+	if( slot_number > 1) {
+		avb_error("slot_number can not > 1");
+		return -1;
+	}
+	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (ret != AVB_IO_RESULT_OK) {
+		goto out;
+	}
+	/* Make requested slot top priority, unsuccessful, and with max tries. */
+	ab_data.slots[slot_number].priority = AVB_AB_MAX_PRIORITY;
+	ab_data.slots[slot_number].tries_remaining = AVB_AB_MAX_TRIES_REMAINING;
+	ab_data.slots[slot_number].successful_boot = 0;
+
+	/* Ensure other slot doesn't have as high a priority. */
+	other_slot_number = 1 - slot_number;
+	if (ab_data.slots[other_slot_number].priority == AVB_AB_MAX_PRIORITY) {
+		ab_data.slots[other_slot_number].priority = AVB_AB_MAX_PRIORITY - 1;
+	}
+
+	ret = AVB_IO_RESULT_OK;
+
+out:
+	if (ret == AVB_IO_RESULT_OK) {
+		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	}
+	return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_unbootable(AvbABOps *ab_ops,
+                                        unsigned int slot_number)
+{
+	AvbABData ab_data, ab_data_orig;
+	AvbIOResult ret;
+
+	if( slot_number > 1) {
+		avb_error("slot_number can not > 1");
+		return -1;
+	}
+
+	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (ret != AVB_IO_RESULT_OK) {
+		goto out;
+	}
+
+	slot_set_unbootable(&ab_data.slots[slot_number]);
+
+	ret = AVB_IO_RESULT_OK;
+
+out:
+	if (ret == AVB_IO_RESULT_OK) {
+		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	}
+	return ret;
+}
+
+AvbIOResult avb_ab_mark_slot_successful(AvbABOps *ab_ops,
+                                        unsigned int slot_number)
+{
+	AvbABData ab_data, ab_data_orig;
+	AvbIOResult ret;
+
+	if( slot_number > 1) {
+		avb_error("slot_number can not > 1");
+		return -1;
+	}
+
+	ret = load_metadata(ab_ops, &ab_data, &ab_data_orig);
+	if (ret != AVB_IO_RESULT_OK) {
+		goto out;
+	}
+
+	if (!slot_is_bootable(&ab_data.slots[slot_number])) {
+		avb_error("Cannot mark unbootable slot as successful.\n");
+		ret = AVB_IO_RESULT_OK;
+		goto out;
+	}
+
+	ab_data.slots[slot_number].tries_remaining = 0;
+	ab_data.slots[slot_number].successful_boot = 1;
+
+	ret = AVB_IO_RESULT_OK;
+
+out:
+	if (ret == AVB_IO_RESULT_OK) {
+		ret = save_metadata_if_changed(ab_ops, &ab_data, &ab_data_orig);
+	}
+	return ret;
+}
+
+const char *avb_ab_flow_result_to_string(AvbABFlowResult result)
+{
+	const char* ret = NULL;
+
+	switch (result) {
+	case AVB_AB_FLOW_RESULT_OK:
+		ret = "OK";
+		break;
+
+	case AVB_AB_FLOW_RESULT_OK_WITH_VERIFICATION_ERROR:
+		ret = "OK_WITH_VERIFICATION_ERROR";
+		break;
+
+	case AVB_AB_FLOW_RESULT_ERROR_OOM:
+		ret = "ERROR_OOM";
+		break;
+
+	case AVB_AB_FLOW_RESULT_ERROR_IO:
+		ret = "ERROR_IO";
+		break;
+
+	case AVB_AB_FLOW_RESULT_ERROR_NO_BOOTABLE_SLOTS:
+		ret = "ERROR_NO_BOOTABLE_SLOTS";
+		break;
+	case AVB_AB_FLOW_RESULT_ERROR_INVALID_ARGUMENT:
+		ret = "ERROR_INVALID_ARGUMENT";
+		break;
+	/* Do not add a 'default:' case here because of -Wswitch. */
+	}
+
+	if (ret == NULL) {
+		avb_error("Unknown AvbABFlowResult value.\n");
+		ret = "(unknown)";
+	}
+
+	return ret;
+}

commit 5b69db0720b90f33ecb7fb666b196bfc90404185
Author: Jason Zhu <jason.zhu@rock-chips.com>
Date:   Wed Sep 13 09:41:53 2017 +0800

    avb: add the google avb to lib
    
    The avb lib is provided by google, and it must be
    used in the android things to boot and verify
    android system. It can be getted in
    https://android.googlesource.com/platform/external/avb.
    
    Then we can use the functions suported by avb to program
    the a/b and avb code.
    
    Change-Id: I09371fe53cd50233a69533cfa09d5ebca5b10871
    Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

diff --git a/include/android_avb/avb_chain_partition_descriptor.h b/include/android_avb/avb_chain_partition_descriptor.h
new file mode 100644
index 0000000000..3e5395fec5
--- /dev/null
+++ b/include/android_avb/avb_chain_partition_descriptor.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+#define AVB_CHAIN_PARTITION_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing a pointer to signed integrity data stored
+ * on another partition. The descriptor contains the partition name in
+ * question (without the A/B suffix), the public key used to sign the
+ * integrity data, and rollback index location to use for rollback
+ * protection.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded) and |public_key_len| bytes of the
+ * public key.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbChainPartitionDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t rollback_index_location;
+  uint32_t partition_name_len;
+  uint32_t public_key_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbChainPartitionDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src,
+    AvbChainPartitionDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CHAIN_PARTITION_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_crypto.h b/include/android_avb/avb_crypto.h
new file mode 100644
index 0000000000..a5b790cc55
--- /dev/null
+++ b/include/android_avb/avb_crypto.h
@@ -0,0 +1,167 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_CRYPTO_H_
+#define AVB_CRYPTO_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Size of a RSA-2048 signature. */
+#define AVB_RSA2048_NUM_BYTES 256
+
+/* Size of a RSA-4096 signature. */
+#define AVB_RSA4096_NUM_BYTES 512
+
+/* Size of a RSA-8192 signature. */
+#define AVB_RSA8192_NUM_BYTES 1024
+
+/* Size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_DIGEST_SIZE 32
+
+/* Size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_DIGEST_SIZE 64
+
+/* Algorithms that can be used in the vbmeta image for
+ * verification. An algorithm consists of a hash type and a signature
+ * type.
+ *
+ * The data used to calculate the hash is the three blocks mentioned
+ * in the documentation for |AvbVBMetaImageHeader| except for the data
+ * in the "Authentication data" block.
+ *
+ * For signatures with RSA keys, PKCS v1.5 padding is used. The public
+ * key data is stored in the auxiliary data block, see
+ * |AvbRSAPublicKeyHeader| for the serialization format.
+ *
+ * Each algorithm type is described below:
+ *
+ * AVB_ALGORITHM_TYPE_NONE: There is no hash, no signature of the
+ * data, and no public key. The data cannot be verified. The fields
+ * |hash_size|, |signature_size|, and |public_key_size| must be zero.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA2048: The hash function used is
+ * SHA-256, resulting in 32 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 32,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA256_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA2048: The hash function used is
+ * SHA-512, resulting in 64 bytes of hash digest data. This hash is
+ * signed with a 2048-bit RSA key. The field |hash_size| must be 64,
+ * |signature_size| must be 256, and the public key data must have
+ * |key_num_bits| set to 2048.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA4096: Like above, but only with
+ * a 4096-bit RSA key and |signature_size| set to 512.
+ *
+ * AVB_ALGORITHM_TYPE_SHA512_RSA8192: Like above, but only with
+ * a 8192-bit RSA key and |signature_size| set to 1024.
+ */
+typedef enum {
+  AVB_ALGORITHM_TYPE_NONE,
+  AVB_ALGORITHM_TYPE_SHA256_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA256_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA256_RSA8192,
+  AVB_ALGORITHM_TYPE_SHA512_RSA2048,
+  AVB_ALGORITHM_TYPE_SHA512_RSA4096,
+  AVB_ALGORITHM_TYPE_SHA512_RSA8192,
+  _AVB_ALGORITHM_NUM_TYPES
+} AvbAlgorithmType;
+
+/* Holds algorithm-specific data. The |padding| is needed by avb_rsa_verify. */
+typedef struct {
+  const uint8_t* padding;
+  size_t padding_len;
+  size_t hash_len;
+} AvbAlgorithmData;
+
+/* Provides algorithm-specific data for a given |algorithm|. Returns NULL if
+ * |algorithm| is invalid.
+ */
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* The header for a serialized RSA public key.
+ *
+ * The size of the key is given by |key_num_bits|, for example 2048
+ * for a RSA-2048 key. By definition, a RSA public key is the pair (n,
+ * e) where |n| is the modulus (which can be represented in
+ * |key_num_bits| bits) and |e| is the public exponent. The exponent
+ * is not stored since it's assumed to always be 65537.
+ *
+ * To optimize verification, the key block includes two precomputed
+ * values, |n0inv| (fits in 32 bits) and |rr| and can always be
+ * represented in |key_num_bits|.
+
+ * The value |n0inv| is the value -1/n[0] (mod 2^32). The value |rr|
+ * is (2^key_num_bits)^2 (mod n).
+ *
+ * Following this header is |key_num_bits| bits of |n|, then
+ * |key_num_bits| bits of |rr|. Both values are stored with most
+ * significant bit first. Each serialized number takes up
+ * |key_num_bits|/8 bytes.
+ *
+ * All fields in this struct are stored in network byte order when
+ * serialized.  To generate a copy with fields swapped to native byte
+ * order, use the function avb_rsa_public_key_header_validate_and_byteswap().
+ *
+ * The avb_rsa_verify() function expects a key in this serialized
+ * format.
+ *
+ * The 'avbtool extract_public_key' command can be used to generate a
+ * serialized RSA public key.
+ */
+typedef struct AvbRSAPublicKeyHeader {
+  uint32_t key_num_bits;
+  uint32_t n0inv;
+} AVB_ATTR_PACKED AvbRSAPublicKeyHeader;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src,
+    AvbRSAPublicKeyHeader* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_CRYPTO_H_ */
diff --git a/include/android_avb/avb_descriptor.h b/include/android_avb/avb_descriptor.h
new file mode 100644
index 0000000000..9b0ef2a46f
--- /dev/null
+++ b/include/android_avb/avb_descriptor.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_DESCRIPTOR_H_
+#define AVB_DESCRIPTOR_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Well-known descriptor tags.
+ *
+ * AVB_DESCRIPTOR_TAG_PROPERTY: see |AvbPropertyDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASHTREE: see |AvbHashtreeDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_HASH: see |AvbHashDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: see |AvbKernelCmdlineDescriptor| struct.
+ * AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: see |AvbChainPartitionDescriptor| struct.
+ */
+typedef enum {
+  AVB_DESCRIPTOR_TAG_PROPERTY,
+  AVB_DESCRIPTOR_TAG_HASHTREE,
+  AVB_DESCRIPTOR_TAG_HASH,
+  AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE,
+  AVB_DESCRIPTOR_TAG_CHAIN_PARTITION,
+} AvbDescriptorTag;
+
+/* The header for a serialized descriptor.
+ *
+ * A descriptor always have two fields, a |tag| (denoting its type,
+ * see the |AvbDescriptorTag| enumeration) and the size of the bytes
+ * following, |num_bytes_following|.
+ *
+ * For padding, |num_bytes_following| is always a multiple of 8.
+ */
+typedef struct AvbDescriptor {
+  uint64_t tag;
+  uint64_t num_bytes_following;
+} AVB_ATTR_PACKED AvbDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_descriptor_validate_and_byteswap(
+    const AvbDescriptor* src, AvbDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Signature for callback function used in avb_descriptor_foreach().
+ * The passed in descriptor is given by |descriptor| and the
+ * |user_data| passed to avb_descriptor_foreach() function is in
+ * |user_data|. Return true to continue iterating, false to stop
+ * iterating.
+ *
+ * Note that |descriptor| points into the image passed to
+ * avb_descriptor_foreach() - all fields need to be byteswapped!
+ */
+typedef bool AvbDescriptorForeachFunc(const AvbDescriptor* descriptor,
+                                      void* user_data);
+
+/* Convenience function to iterate over all descriptors in an vbmeta
+ * image.
+ *
+ * The function given by |foreach_func| will be called for each
+ * descriptor. The given function should return true to continue
+ * iterating, false to stop.
+ *
+ * The |user_data| parameter will be passed to |foreach_func|.
+ *
+ * Returns false if the iteration was short-circuited, that is if
+ * an invocation of |foreach_func| returned false.
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data);
+
+/* Gets all descriptors in a vbmeta image.
+ *
+ * The return value is a NULL-pointer terminated array of
+ * AvbDescriptor pointers. Free with avb_free() when you are done with
+ * it. If |out_num_descriptors| is non-NULL, the number of descriptors
+ * will be returned there.
+ *
+ * Note that each AvbDescriptor pointer in the array points into
+ * |image_data| - all fields need to be byteswapped!
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a known
+ * good public key. Additionally, |image_data| must be word-aligned.
+ */
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_footer.h b/include/android_avb/avb_footer.h
new file mode 100644
index 0000000000..48f2c378d5
--- /dev/null
+++ b/include/android_avb/avb_footer.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_FOOTER_H_
+#define AVB_FOOTER_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Magic for the footer. */
+#define AVB_FOOTER_MAGIC "AVBf"
+#define AVB_FOOTER_MAGIC_LEN 4
+
+/* Size of the footer. */
+#define AVB_FOOTER_SIZE 64
+
+/* The current footer version used - keep in sync with avbtool. */
+#define AVB_FOOTER_VERSION_MAJOR 1
+#define AVB_FOOTER_VERSION_MINOR 0
+
+/* The struct used as a footer used on partitions, used to find the
+ * AvbVBMetaImageHeader struct. This struct is always stored at the
+ * end of a partition.
+ */
+typedef struct AvbFooter {
+  /*   0: Four bytes equal to "AVBf" (AVB_FOOTER_MAGIC). */
+  uint8_t magic[AVB_FOOTER_MAGIC_LEN];
+  /*   4: The major version of the footer struct. */
+  uint32_t version_major;
+  /*   8: The minor version of the footer struct. */
+  uint32_t version_minor;
+
+  /*  12: The original size of the image on the partition. */
+  uint64_t original_image_size;
+
+  /*  20: The offset of the |AvbVBMetaImageHeader| struct. */
+  uint64_t vbmeta_offset;
+
+  /*  28: The size of the vbmeta block (header + auth + aux blocks). */
+  uint64_t vbmeta_size;
+
+  /*  36: Padding to ensure struct is size AVB_FOOTER_SIZE bytes. This
+   * must be set to zeroes.
+   */
+  uint8_t reserved[28];
+} AVB_ATTR_PACKED AvbFooter;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ */
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_FOOTER_H_ */
diff --git a/include/android_avb/avb_hash_descriptor.h b/include/android_avb/avb_hash_descriptor.h
new file mode 100644
index 0000000000..57333ad97a
--- /dev/null
+++ b/include/android_avb/avb_hash_descriptor.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASH_DESCRIPTOR_H_
+#define AVB_HASH_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about hash for an image.
+ *
+ * This descriptor is typically used for boot partitions to verify the
+ * entire kernel+initramfs image before executing it.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |digest_len| bytes of the digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t image_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASH_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_hashtree_descriptor.h b/include/android_avb/avb_hashtree_descriptor.h
new file mode 100644
index 0000000000..e4e0218c0e
--- /dev/null
+++ b/include/android_avb/avb_hashtree_descriptor.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_HASHTREE_DESCRIPTOR_H_
+#define AVB_HASHTREE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor containing information about a dm-verity hashtree.
+ *
+ * Hash-trees are used to verify large partitions typically containing
+ * file systems. See
+ * https://gitlab.com/cryptsetup/cryptsetup/wikis/DMVerity for more
+ * information about dm-verity.
+ *
+ * Following this struct are |partition_name_len| bytes of the
+ * partition name (UTF-8 encoded), |salt_len| bytes of salt, and then
+ * |root_digest_len| bytes of the root digest.
+ *
+ * The |reserved| field is for future expansion and must be set to NUL
+ * bytes.
+ */
+typedef struct AvbHashtreeDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t dm_verity_version;
+  uint64_t image_size;
+  uint64_t tree_offset;
+  uint64_t tree_size;
+  uint32_t data_block_size;
+  uint32_t hash_block_size;
+  uint32_t fec_num_roots;
+  uint64_t fec_offset;
+  uint64_t fec_size;
+  uint8_t hash_algorithm[32];
+  uint32_t partition_name_len;
+  uint32_t salt_len;
+  uint32_t root_digest_len;
+  uint8_t reserved[64];
+} AVB_ATTR_PACKED AvbHashtreeDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src,
+    AvbHashtreeDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_HASHTREE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_kernel_cmdline_descriptor.h b/include/android_avb/avb_kernel_cmdline_descriptor.h
new file mode 100644
index 0000000000..aee042cded
--- /dev/null
+++ b/include/android_avb/avb_kernel_cmdline_descriptor.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+#define AVB_KERNEL_CMDLINE_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Flags for kernel command-line descriptors.
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED: The
+ * cmdline will only be applied if hashtree verification is not
+ * disabled (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ *
+ * AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED: The cmdline
+ * will only be applied if hashtree verification is disabled
+ * (cf. AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED).
+ */
+typedef enum {
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED = (1 << 0),
+  AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED = (1 << 1)
+} AvbKernelCmdlineFlags;
+
+/* A descriptor containing information to be appended to the kernel
+ * command-line.
+ *
+ * The |flags| field contains flags from the AvbKernelCmdlineFlags
+ * enumeration.
+ *
+ * Following this struct are |kernel_cmdline_len| bytes with the
+ * kernel command-line (UTF-8 encoded).
+ */
+typedef struct AvbKernelCmdlineDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint32_t flags;
+  uint32_t kernel_cmdline_length;
+} AVB_ATTR_PACKED AvbKernelCmdlineDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src,
+    AvbKernelCmdlineDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_KERNEL_CMDLINE_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_ops.h b/include/android_avb/avb_ops.h
new file mode 100644
index 0000000000..0900b0e0be
--- /dev/null
+++ b/include/android_avb/avb_ops.h
@@ -0,0 +1,231 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_OPS_H_
+#define AVB_OPS_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used for I/O operations.
+ *
+ * AVB_IO_RESULT_OK is returned if the requested operation was
+ * successful.
+ *
+ * AVB_IO_RESULT_ERROR_IO is returned if the underlying hardware (disk
+ * or other subsystem) encountered an I/O error.
+ *
+ * AVB_IO_RESULT_ERROR_OOM is returned if unable to allocate memory.
+ *
+ * AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION is returned if the requested
+ * partition does not exist.
+ *
+ * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION is returned if the
+ * range of bytes requested to be read or written is outside the range
+ * of the partition.
+ */
+typedef enum {
+	AVB_IO_RESULT_OK,
+	AVB_IO_RESULT_ERROR_OOM,
+	AVB_IO_RESULT_ERROR_IO,
+	AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION,
+	AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION
+} AvbIOResult;
+
+struct AvbOps;
+typedef struct AvbOps AvbOps;
+
+/* Forward-declaration of operations in libavb_ab. */
+struct AvbABOps;
+
+/* Forward-declaration of operations in libavb_atx. */
+struct AvbAtxOps;
+
+/* High-level operations/functions/methods that are platform
+ * dependent.
+ *
+ * Operations may be added in the future so when implementing it
+ * always make sure to zero out sizeof(AvbOps) bytes of the struct to
+ * ensure that unimplemented operations are set to NULL.
+ */
+struct AvbOps {
+	/* This pointer can be used by the application/bootloader using
+	 * libavb and is typically used in each operation to get a pointer
+	 * to platform-specific resources. It cannot be used by libraries.
+	 */
+	void* user_data;
+
+	/* If libavb_ab is used, this should point to the
+	 * AvbABOps. Otherwise it must be set to NULL.
+	 */
+	struct AvbABOps* ab_ops;
+
+	/* If libavb_atx is used, this should point to the
+	 * AvbAtxOps. Otherwise it must be set to NULL.
+	 */
+	struct AvbAtxOps* atx_ops;
+
+	/* Reads |num_bytes| from offset |offset| from partition with name
+	 * |partition| (NUL-terminated UTF-8 string). If |offset| is
+	 * negative, its absolute value should be interpreted as the number
+	 * of bytes from the end of the partition.
+	 *
+	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+	 * there is no partition with the given name,
+	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+	 * |offset| is outside the partition, and AVB_IO_RESULT_ERROR_IO if
+	 * there was an I/O error from the underlying I/O subsystem.  If the
+	 * operation succeeds as requested AVB_IO_RESULT_OK is returned and
+	 * the data is available in |buffer|.
+	 *
+	 * The only time partial I/O may occur is if reading beyond the end
+	 * of the partition. In this case the value returned in
+	 * |out_num_read| may be smaller than |num_bytes|.
+	 */
+	AvbIOResult (*read_from_partition)(AvbOps* ops,
+                                       const char* partition,
+                                       int64_t offset,
+                                       size_t num_bytes,
+                                       void* buffer,
+                                       size_t* out_num_read);
+
+	/* Writes |num_bytes| from |bffer| at offset |offset| to partition
+	 * with name |partition| (NUL-terminated UTF-8 string). If |offset|
+	 * is negative, its absolute value should be interpreted as the
+	 * number of bytes from the end of the partition.
+	 *
+	 * This function returns AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION if
+	 * there is no partition with the given name,
+	 * AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION if the requested
+	 * byterange goes outside the partition, and AVB_IO_RESULT_ERROR_IO
+	 * if there was an I/O error from the underlying I/O subsystem.  If
+	 * the operation succeeds as requested AVB_IO_RESULT_OK is
+	 * returned.
+	 *
+	 * This function never does any partial I/O, it either transfers all
+	 * of the requested bytes or returns an error.
+	 */
+	AvbIOResult (*write_to_partition)(AvbOps* ops,
+                                      const char* partition,
+                                      int64_t offset,
+                                      size_t num_bytes,
+                                      const void* buffer);
+
+	/* Checks if the given public key used to sign the 'vbmeta'
+	 * partition is trusted. Boot loaders typically compare this with
+	 * embedded key material generated with 'avbtool
+	 * extract_public_key'.
+	 *
+	 * The public key is in the array pointed to by |public_key_data|
+	 * and is of |public_key_length| bytes.
+	 *
+	 * If there is no public key metadata (set with the avbtool option
+	 * --public_key_metadata) then |public_key_metadata| will be set to
+	 * NULL. Otherwise this field points to the data which is
+	 * |public_key_metadata_length| bytes long.
+	 *
+	 * If AVB_IO_RESULT_OK is returned then |out_is_trusted| is set -
+	 * true if trusted or false if untrusted.
+	 */
+	AvbIOResult (*validate_vbmeta_public_key)(AvbOps* ops,
+                                            	  const uint8_t* public_key_data,
+                                            	  size_t public_key_length,
+                                            	  const uint8_t* public_key_metadata,
+                                            	  size_t public_key_metadata_length,
+                                            	  bool* out_is_trusted);
+
+	/* Gets the rollback index corresponding to the location given by
+	 * |rollback_index_location|. The value is returned in
+	 * |out_rollback_index|. Returns AVB_IO_RESULT_OK if the rollback
+	 * index was retrieved, otherwise an error code.
+	 *
+	 * A device may have a limited amount of rollback index locations (say,
+	 * one or four) so may error out if |rollback_index_location| exceeds
+	 * this number.
+	 */
+	AvbIOResult (*read_rollback_index)(AvbOps* ops,
+                                     	   size_t rollback_index_location,
+                                     	   uint64_t* out_rollback_index);
+
+	/* Sets the rollback index corresponding to the location given by
+	 * |rollback_index_location| to |rollback_index|. Returns
+	 * AVB_IO_RESULT_OK if the rollback index was set, otherwise an
+	 * error code.
+	 *
+	 * A device may have a limited amount of rollback index locations (say,
+	 * one or four) so may error out if |rollback_index_location| exceeds
+	 * this number.
+	 */
+	AvbIOResult (*write_rollback_index)(AvbOps* ops,
+                                      	    size_t rollback_index_location,
+                                      	    uint64_t rollback_index);
+
+	/* Gets whether the device is unlocked. The value is returned in
+	 * |out_is_unlocked| (true if unlocked, false otherwise). Returns
+	 * AVB_IO_RESULT_OK if the state was retrieved, otherwise an error
+	 * code.
+	 */
+	AvbIOResult (*read_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+	AvbIOResult (*write_is_device_unlocked)(AvbOps* ops, bool* out_is_unlocked);
+
+	/* Gets the unique partition GUID for a partition with name in
+	 * |partition| (NUL-terminated UTF-8 string). The GUID is copied as
+	 * a string into |guid_buf| of size |guid_buf_size| and will be NUL
+	 * terminated. The string must be lower-case and properly
+	 * hyphenated. For example:
+	 *
+	 *  527c1c6d-6361-4593-8842-3c78fcd39219
+	 *
+	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+	 */
+	 AvbIOResult (*get_unique_guid_for_partition)(AvbOps* ops,
+                                                      const char* partition,
+                                                      char* guid_buf,
+                                                      size_t guid_buf_size);
+
+	/* Gets the size of a partition with the name in |partition|
+	 * (NUL-terminated UTF-8 string). Returns the value in
+	 * |out_size_num_bytes|.
+	 *
+	 * Returns AVB_IO_RESULT_OK on success, otherwise an error code.
+	 */
+	AvbIOResult (*get_size_of_partition)(AvbOps* ops,
+                                       	     const char* partition,
+                                             uint64_t* out_size_num_bytes);
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_OPS_H_ */
diff --git a/include/android_avb/avb_property_descriptor.h b/include/android_avb/avb_property_descriptor.h
new file mode 100644
index 0000000000..08409892a9
--- /dev/null
+++ b/include/android_avb/avb_property_descriptor.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_PROPERTY_DESCRIPTOR_H_
+#define AVB_PROPERTY_DESCRIPTOR_H_
+
+#include <android_avb/avb_descriptor.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* A descriptor for properties (free-form key/value pairs).
+ *
+ * Following this struct are |key_num_bytes| bytes of key data,
+ * followed by a NUL byte, then |value_num_bytes| bytes of value data,
+ * followed by a NUL byte and then enough padding to make the combined
+ * size a multiple of 8.
+ */
+typedef struct AvbPropertyDescriptor {
+  AvbDescriptor parent_descriptor;
+  uint64_t key_num_bytes;
+  uint64_t value_num_bytes;
+} AVB_ATTR_PACKED AvbPropertyDescriptor;
+
+/* Copies |src| to |dest| and validates, byte-swapping fields in the
+ * process if needed. Returns true if valid, false if invalid.
+ *
+ * Data following the struct is not validated nor copied.
+ */
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src,
+    AvbPropertyDescriptor* dest) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Convenience function for looking up the value for a property with
+ * name |key| in a vbmeta image. If |key_size| is 0, |key| must be
+ * NUL-terminated.
+ *
+ * The |image_data| parameter must be a pointer to a vbmeta image of
+ * size |image_size|.
+ *
+ * This function returns a pointer to the value inside the passed-in
+ * image or NULL if not found. Note that the value is always
+ * guaranteed to be followed by a NUL byte.
+ *
+ * If the value was found and |out_value_size| is not NULL, the size
+ * of the value is returned there.
+ *
+ * This function is O(n) in number of descriptors so if you need to
+ * look up a lot of values, you may want to build a more efficient
+ * lookup-table by manually walking all descriptors using
+ * avb_descriptor_foreach().
+ *
+ * Before using this function, you MUST verify |image_data| with
+ * avb_vbmeta_image_verify() and reject it unless it's signed by a
+ * known good public key.
+ */
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_property_lookup() but parses the intial portions of the
+ * value as an unsigned 64-bit integer. Both decimal and hexadecimal
+ * representations (e.g. "0x2a") are supported. Returns false on
+ * failure and true on success. On success, the parsed value is
+ * returned in |out_value|.
+ */
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value)
+    AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_PROPERTY_DESCRIPTOR_H_ */
diff --git a/include/android_avb/avb_rsa.h b/include/android_avb/avb_rsa.h
new file mode 100644
index 0000000000..728c215a31
--- /dev/null
+++ b/include/android_avb/avb_rsa.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_rsa.h in the public header libavb.h."
+#endif
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_RSA_H_
+#define AVB_RSA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Using the key given by |key|, verify a RSA signature |sig| of
+ * length |sig_num_bytes| against an expected |hash| of length
+ * |hash_num_bytes|. The padding to expect must be passed in using
+ * |padding| of length |padding_num_bytes|.
+ *
+ * The data in |key| must match the format defined in
+ * |AvbRSAPublicKeyHeader|, including the two large numbers
+ * following. The |key_num_bytes| must be the size of the entire
+ * serialized key.
+ *
+ * Returns false if verification fails, true otherwise.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_RSA_H_ */
diff --git a/include/android_avb/avb_sha.h b/include/android_avb/avb_sha.h
new file mode 100644
index 0000000000..94ac339a2d
--- /dev/null
+++ b/include/android_avb/avb_sha.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifdef AVB_INSIDE_LIBAVB_H
+#error "You can't include avb_sha.h in the public header libavb.h."
+#endif
+
+/*
+#ifndef AVB_COMPILATION
+#error "Never include this file, it may only be used from internal avb code."
+#endif
+*/
+
+#ifndef AVB_SHA_H_
+#define AVB_SHA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_sysdeps.h>
+
+/* Block size in bytes of a SHA-256 digest. */
+#define AVB_SHA256_BLOCK_SIZE 64
+
+
+/* Block size in bytes of a SHA-512 digest. */
+#define AVB_SHA512_BLOCK_SIZE 128
+
+/* Data structure used for SHA-256. */
+typedef struct {
+  uint32_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA256_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA256_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA256Ctx;
+
+/* Data structure used for SHA-512. */
+typedef struct {
+  uint64_t h[8];
+  uint32_t tot_len;
+  uint32_t len;
+  uint8_t block[2 * AVB_SHA512_BLOCK_SIZE];
+  uint8_t buf[AVB_SHA512_DIGEST_SIZE]; /* Used for storing the final digest. */
+} AvbSHA512Ctx;
+
+/* Initializes the SHA-256 context. */
+void avb_sha256_init(AvbSHA256Ctx* ctx);
+
+/* Updates the SHA-256 context with |len| bytes from |data|. */
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-256 digest. */
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Initializes the SHA-512 context. */
+void avb_sha512_init(AvbSHA512Ctx* ctx);
+
+/* Updates the SHA-512 context with |len| bytes from |data|. */
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len);
+
+/* Returns the SHA-512 digest. */
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SHA_H_ */
diff --git a/include/android_avb/avb_slot_verify.h b/include/android_avb/avb_slot_verify.h
new file mode 100644
index 0000000000..a34a872a6f
--- /dev/null
+++ b/include/android_avb/avb_slot_verify.h
@@ -0,0 +1,341 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SLOT_VERIFY_H_
+#define AVB_SLOT_VERIFY_H_
+
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Return codes used in avb_slot_verify(), see that function for
+ * documentation for each field.
+ *
+ * Use avb_slot_verify_result_to_string() to get a textual
+ * representation usable for error/debug output.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_RESULT_OK,
+  AVB_SLOT_VERIFY_RESULT_ERROR_OOM,
+  AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+  AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX,
+  AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA,
+  AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION,
+  AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
+} AvbSlotVerifyResult;
+
+/* Various error handling modes for when verification fails using a
+ * hashtree at runtime inside the HLOS.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE means that the OS
+ * will invalidate the current slot and restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_RESTART means that the OS will restart.
+ *
+ * AVB_HASHTREE_ERROR_MODE_EIO means that an EIO error will be
+ * returned to applications.
+ *
+ * AVB_HASHTREE_ERROR_MODE_LOGGING means that errors will be logged
+ * and corrupt data may be returned to applications. This mode should
+ * be used ONLY for diagnostics and debugging. It cannot be used
+ * unless AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is also
+ * used.
+ */
+typedef enum {
+  AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
+  AVB_HASHTREE_ERROR_MODE_RESTART,
+  AVB_HASHTREE_ERROR_MODE_EIO,
+  AVB_HASHTREE_ERROR_MODE_LOGGING
+} AvbHashtreeErrorMode;
+
+/* Flags that influence how avb_slot_verify() works.
+ *
+ * If AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is NOT set then
+ * avb_slot_verify() will bail out as soon as an error is encountered
+ * and |out_data| is set only if AVB_SLOT_VERIFY_RESULT_OK is
+ * returned.
+ *
+ * Otherwise if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set
+ * avb_slot_verify() will continue verification efforts and |out_data|
+ * is also set if AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED,
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION, or
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned. It is
+ * undefined which error is returned if more than one distinct error
+ * is encountered. It is guaranteed that AVB_SLOT_VERIFY_RESULT_OK is
+ * returned if, and only if, there are no errors. This mode is needed
+ * to boot valid but unverified slots when the device is unlocked.
+ *
+ * Also, if AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR is set the
+ * contents loaded from |requested_partition| will be the contents of
+ * the entire partition instead of just the size specified in the hash
+ * descriptor.
+ */
+typedef enum {
+  AVB_SLOT_VERIFY_FLAGS_NONE = 0,
+  AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR = (1 << 0)
+} AvbSlotVerifyFlags;
+
+/* Get a textual representation of |result|. */
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result);
+
+/* Maximum number of rollback index locations supported. */
+#define AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS 32
+
+/* AvbPartitionData contains data loaded from partitions when using
+ * avb_slot_verify(). The |partition_name| field contains the name of
+ * the partition (without A/B suffix), |data| points to the loaded
+ * data which is |data_size| bytes long.
+ *
+ * Note that this is strictly less than the partition size - it's only
+ * the image stored there, not the entire partition nor any of the
+ * metadata.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* data;
+  size_t data_size;
+} AvbPartitionData;
+
+/* AvbVBMetaData contains a vbmeta struct loaded from a partition when
+ * using avb_slot_verify(). The |partition_name| field contains the
+ * name of the partition (without A/B suffix), |vbmeta_data| points to
+ * the loaded data which is |vbmeta_size| bytes long.
+ *
+ * The |verify_result| field contains the result of
+ * avb_vbmeta_image_verify() on the data. This is guaranteed to be
+ * AVB_VBMETA_VERIFY_RESULT_OK for all vbmeta images if
+ * avb_slot_verify() returns AVB_SLOT_VERIFY_RESULT_OK.
+ *
+ * You can use avb_descriptor_get_all(), avb_descriptor_foreach(), and
+ * avb_vbmeta_image_header_to_host_byte_order() with this data.
+ */
+typedef struct {
+  char* partition_name;
+  uint8_t* vbmeta_data;
+  size_t vbmeta_size;
+  AvbVBMetaVerifyResult verify_result;
+} AvbVBMetaData;
+
+/* AvbSlotVerifyData contains data needed to boot a particular slot
+ * and is returned by avb_slot_verify() if partitions in a slot are
+ * successfully verified.
+ *
+ * All data pointed to by this struct - including data in each item in
+ * the |partitions| array - will be freed when the
+ * avb_slot_verify_data_free() function is called.
+ *
+ * The |ab_suffix| field is the copy of the of |ab_suffix| field
+ * passed to avb_slot_verify(). It is the A/B suffix of the slot. This
+ * value includes the leading underscore - typical values are "" (if
+ * no slots are in use), "_a" (for the first slot), and "_b" (for the
+ * second slot).
+ *
+ * The VBMeta images that were checked are available in the
+ * |vbmeta_images| field. The field |num_vbmeta_images| contains the
+ * number of elements in this array. The first element -
+ * vbmeta_images[0] - is guaranteed to be from the partition with the
+ * top-level vbmeta struct. This is usually the "vbmeta" partition in
+ * the requested slot but if there is no "vbmeta" partition it can
+ * also be the "boot" partition.
+ *
+ * The partitions loaded and verified from from the slot are
+ * accessible in the |loaded_partitions| array. The field
+ * |num_loaded_partitions| contains the number of elements in this
+ * array. The order of partitions in this array may not necessarily be
+ * the same order as in the passed-in |requested_partitions| array.
+ *
+ * Rollback indexes for the verified slot are stored in the
+ * |rollback_indexes| field. Note that avb_slot_verify() will NEVER
+ * modify stored_rollback_index[n] locations e.g. it will never use
+ * the write_rollback_index() AvbOps operation. Instead it is the job
+ * of the caller of avb_slot_verify() to do this based on e.g. A/B
+ * policy and other factors. See libavb_ab/avb_ab_flow.c for an
+ * example of how to do this.
+ *
+ * The |cmdline| field is a NUL-terminated string in UTF-8 resulting
+ * from concatenating all |AvbKernelCmdlineDescriptor| and then
+ * performing proper substitution of the variables
+ * $(ANDROID_SYSTEM_PARTUUID), $(ANDROID_BOOT_PARTUUID), and
+ * $(ANDROID_VBMETA_PARTUUID) using the
+ * get_unique_guid_for_partition() operation in |AvbOps|. Additionally
+ * $(ANDROID_VERITY_MODE) will be replaced with the proper dm-verity
+ * option depending on the value of |hashtree_error_mode|.
+ *
+ * Additionally, the |cmdline| field will have the following kernel
+ * command-line options set:
+ *
+ *   androidboot.veritymode: This is set to 'disabled' if the
+ *   AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED flag is set in top-level
+ *   vbmeta struct. Otherwise it is set to 'enforcing' if the
+ *   passed-in hashtree error mode is AVB_HASHTREE_ERROR_MODE_RESTART
+ *   or AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE, 'eio' if it's
+ *   set to AVB_HASHTREE_ERROR_MODE_EIO, and 'logging' if it's set to
+ *   AVB_HASHTREE_ERROR_MODE_LOGGING.
+ *
+ *   androidboot.vbmeta.invalidate_on_error: This is set to 'yes' only
+ *   if hashtree validation isn't disabled and the passed-in hashtree
+ *   error mode is AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE.
+ *
+ *   androidboot.vbmeta.device_state: set to "locked" or "unlocked"
+ *   depending on the result of the result of AvbOps's
+ *   read_is_unlocked() function.
+ *
+ *   androidboot.vbmeta.{hash_alg, size, digest}: Will be set to
+ *   the digest of all images in |vbmeta_images|.
+ *
+ *   androidboot.vbmeta.device: This is set to the value
+ *   PARTUUID=$(ANDROID_VBMETA_PARTUUID) before substitution so it
+ *   will end up pointing to the vbmeta partition for the verified
+ *   slot. If there is no vbmeta partition it will point to the boot
+ *   partition of the verified slot.
+ *
+ *   androidboot.vbmeta.avb_version: This is set to the decimal value
+ *   of AVB_VERSION_MAJOR followed by a dot followed by the decimal
+ *   value of AVB_VERSION_MINOR, for example "1.0" or "1.4". This
+ *   version number represents the vbmeta file format version
+ *   supported by libavb copy used in the boot loader. This is not
+ *   necessarily the same version number of the on-disk metadata for
+ *   the slot that was verified.
+ *
+ * Note that neither androidboot.slot_suffix nor androidboot.slot are
+ * set in the |cmdline| field in |AvbSlotVerifyData| - you will have
+ * to pass these yourself.
+ *
+ * Also note that androidboot.veritymode is set by libavb and since
+ * AVB only supports 'enforcing' and 'disabled' values, the boot
+ * loader is relieved of managing any state related to dm-verity or
+ * setting this cmdline parameter.
+ *
+ * This struct may grow in the future without it being considered an
+ * ABI break.
+ */
+typedef struct {
+  char* ab_suffix;
+  AvbVBMetaData* vbmeta_images;
+  size_t num_vbmeta_images;
+  AvbPartitionData* loaded_partitions;
+  size_t num_loaded_partitions;
+  char* cmdline;
+  uint64_t rollback_indexes[AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS];
+} AvbSlotVerifyData;
+
+/* Frees a |AvbSlotVerifyData| including all data it points to. */
+void avb_slot_verify_data_free(AvbSlotVerifyData* data);
+
+/* Performs a full verification of the slot identified by |ab_suffix|
+ * and load and verify the contents of the partitions whose name is in
+ * the NULL-terminated string array |requested_partitions| (each
+ * partition must use hash verification). If not using A/B, pass an
+ * empty string (e.g. "", not NULL) for |ab_suffix|. This parameter
+ * must include the leading underscore, for example "_a" should be
+ * used to refer to the first slot.
+ *
+ * Typically the |requested_partitions| array only contains a single
+ * item for the boot partition, 'boot'.
+ *
+ * Verification includes loading and verifying data from the 'vbmeta',
+ * the requested hash partitions, and possibly other partitions (with
+ * |ab_suffix| appended), inspecting rollback indexes, and checking if
+ * the public key used to sign the data is acceptable. The functions
+ * in |ops| will be used to do this.
+ *
+ * If |out_data| is not NULL, it will be set to a newly allocated
+ * |AvbSlotVerifyData| struct containing all the data needed to
+ * actually boot the slot. This data structure should be freed with
+ * avb_slot_verify_data_free() when you are done with it. See below
+ * for when this is returned.
+ *
+ * The |flags| parameter is used to influence the semantics of
+ * avb_slot_verify() - for example the
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR flag can be used to
+ * ignore verification errors which is something needed in the
+ * UNLOCKED state. See the AvbSlotVerifyFlags enumeration for details.
+ *
+ * The |hashtree_error_mode| parameter should be set to the desired
+ * error handling mode when hashtree validation fails inside the
+ * HLOS. This value isn't used by libavb per se - it is forwarded to
+ * the HLOS through the androidboot.veritymode and
+ * androidboot.vbmeta.invalidate_on_error cmdline parameters. See the
+ * AvbHashtreeErrorMode enumeration for details.
+ *
+ * Also note that |out_data| is never set if
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM, AVB_SLOT_VERIFY_RESULT_ERROR_IO,
+ * or AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned.
+ *
+ * AVB_SLOT_VERIFY_RESULT_OK is returned if everything is verified
+ * correctly and all public keys are accepted.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED is returned if
+ * everything is verified correctly out but one or more public keys
+ * are not accepted. This includes the case where integrity data is
+ * not signed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_OOM is returned if unable to
+ * allocate memory.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_IO is returned if an I/O error
+ * occurred while trying to load data or get a rollback index.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION is returned if the data
+ * did not verify, e.g. the digest didn't match or signature checks
+ * failed.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX is returned if a
+ * rollback index was less than its stored value.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA is returned if some
+ * of the metadata is invalid or inconsistent.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION is returned if
+ * some of the metadata requires a newer version of libavb than what
+ * is in use.
+ *
+ * AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT is returned if the
+ * caller passed invalid parameters, for example trying to use
+ * AVB_HASHTREE_ERROR_MODE_LOGGING without
+ * AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR.
+ */
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SLOT_VERIFY_H_ */
diff --git a/include/android_avb/avb_sysdeps.h b/include/android_avb/avb_sysdeps.h
new file mode 100644
index 0000000000..df7f1d2028
--- /dev/null
+++ b/include/android_avb/avb_sysdeps.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_SYSDEPS_H_
+#define AVB_SYSDEPS_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Change these includes to match your platform to bring in the
+ * equivalent types available in a normal C runtime. At least things
+ * like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
+ * must be present.
+ */
+#include <inttypes.h>
+#include <stdbool.h>
+#include <stddef.h>
+#ifdef CONFIG_USE_STDINT
+/* Provided by gcc. */
+#include <stdint.h>
+#else
+/* Type for `void *' pointers. */
+typedef unsigned long int uintptr_t;
+#endif
+
+/* If you don't have gcc or clang, these attribute macros may need to
+ * be adjusted.
+ */
+#define AVB_ATTR_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
+#define AVB_ATTR_PACKED __attribute__((packed))
+#define AVB_ATTR_NO_RETURN __attribute__((noreturn))
+#define AVB_ATTR_SENTINEL __attribute__((__sentinel__))
+
+/* Size in bytes used for alignment. */
+#ifdef __LP64__
+#define AVB_ALIGNMENT_SIZE 8
+#else
+#define AVB_ALIGNMENT_SIZE 4
+#endif
+
+/* Compare |n| bytes in |src1| and |src2|.
+ *
+ * Returns an integer less than, equal to, or greater than zero if the
+ * first |n| bytes of |src1| is found, respectively, to be less than,
+ * to match, or be greater than the first |n| bytes of |src2|. */
+int avb_memcmp(const void* src1,
+               const void* src2,
+               size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare two strings.
+ *
+ * Return an integer less than, equal to, or greater than zero if |s1|
+ * is found, respectively, to be less than, to match, or be greater
+ * than |s2|.
+ */
+int avb_strcmp(const char* s1, const char* s2);
+
+/* Copy |n| bytes from |src| to |dest|. */
+void* avb_memcpy(void* dest, const void* src, size_t n);
+
+/* Set |n| bytes starting at |s| to |c|.  Returns |dest|. */
+void* avb_memset(void* dest, const int c, size_t n);
+
+/* Prints out a message. The string passed must be a NUL-terminated
+ * UTF-8 string.
+ */
+void avb_print(const char* message);
+
+/* Prints out a vector of strings. Each argument must point to a
+ * NUL-terminated UTF-8 string and NULL should be the last argument.
+ */
+void avb_printv(const char* message, ...) AVB_ATTR_SENTINEL;
+
+/* Aborts the program or reboots the device. */
+void avb_abort(void) AVB_ATTR_NO_RETURN;
+
+/* Allocates |size| bytes. Returns NULL if no memory is available,
+ * otherwise a pointer to the allocated memory.
+ *
+ * The memory is not initialized.
+ *
+ * The pointer returned is guaranteed to be word-aligned.
+ *
+ * The memory should be freed with avb_free() when you are done with it.
+ */
+void* avb_malloc_(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Frees memory previously allocated with avb_malloc(). */
+void avb_free(void* ptr);
+
+/* Returns the lenght of |str|, excluding the terminating NUL-byte. */
+size_t avb_strlen(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_SYSDEPS_H_ */
diff --git a/include/android_avb/avb_util.h b/include/android_avb/avb_util.h
new file mode 100644
index 0000000000..6c04a880f0
--- /dev/null
+++ b/include/android_avb/avb_util.h
@@ -0,0 +1,273 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_UTIL_H_
+#define AVB_UTIL_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+/* Converts a 32-bit unsigned integer from big-endian to host byte order. */
+uint32_t avb_be32toh(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from big-endian to host byte order. */
+uint64_t avb_be64toh(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Compare |n| bytes starting at |s1| with |s2| and return 0 if they
+ * match, 1 if they don't.  Returns 0 if |n|==0, since no bytes
+ * mismatched.
+ *
+ * Time taken to perform the comparison is only dependent on |n| and
+ * not on the relationship of the match between |s1| and |s2|.
+ *
+ * Note that unlike avb_memcmp(), this only indicates inequality, not
+ * whether |s1| is less than or greater than |s2|.
+ */
+int avb_safe_memcmp(const void* s1,
+                    const void* s2,
+                    size_t n) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |value_to_add| to |value| with overflow protection.
+ *
+ * Returns false if the addition overflows, true otherwise. In either
+ * case, |value| is always modified.
+ */
+bool avb_safe_add_to(uint64_t* value,
+                     uint64_t value_to_add) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Adds |a| and |b| with overflow protection, returning the value in
+ * |out_result|.
+ *
+ * It's permissible to pass NULL for |out_result| if you just want to
+ * check that the addition would not overflow.
+ *
+ * Returns false if the addition overflows, true otherwise.
+ */
+bool avb_safe_add(uint64_t* out_result,
+                  uint64_t a,
+                  uint64_t b) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Checks if |num_bytes| data at |data| is a valid UTF-8
+ * string. Returns true if valid UTF-8, false otherwise.
+ */
+bool avb_validate_utf8(const uint8_t* data,
+                       size_t num_bytes) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Concatenates |str1| (of |str1_len| bytes) and |str2| (of |str2_len|
+ * bytes) and puts the result in |buf| which holds |buf_size|
+ * bytes. The result is also guaranteed to be NUL terminated. Fail if
+ * there is not enough room in |buf| for the resulting string plus
+ * terminating NUL byte.
+ *
+ * Returns true if the operation succeeds, false otherwise.
+ */
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len);
+
+/* Like avb_malloc_() but prints a error using avb_error() if memory
+ * allocation fails.
+ */
+void* avb_malloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Like avb_malloc() but sets the memory with zeroes. */
+void* avb_calloc(size_t size) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NUL-terminated string. Returns NULL on OOM. */
+char* avb_strdup(const char* str) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Duplicates a NULL-terminated array of NUL-terminated strings by
+ * concatenating them. The returned string will be
+ * NUL-terminated. Returns NULL on OOM.
+ */
+char* avb_strdupv(const char* str,
+                  ...) AVB_ATTR_WARN_UNUSED_RESULT AVB_ATTR_SENTINEL;
+
+/* Finds the first occurrence of |needle| in the string |haystack|
+ * where both strings are NUL-terminated strings. The terminating NUL
+ * bytes are not compared.
+ *
+ * Returns NULL if not found, otherwise points into |haystack| for the
+ * first occurrence of |needle|.
+ */
+const char* avb_strstr(const char* haystack,
+                       const char* needle) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Finds the first occurrence of |str| in the NULL-terminated string
+ * array |strings|. Each element in |strings| must be
+ * NUL-terminated. The string given by |str| need not be
+ * NUL-terminated but its size must be given in |str_size|.
+ *
+ * Returns NULL if not found, otherwise points into |strings| for the
+ * first occurrence of |str|.
+ */
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size);
+
+/* Replaces all occurrences of |search| with |replace| in |str|.
+ *
+ * Returns a newly allocated string or NULL if out of memory.
+ */
+char* avb_replace(const char* str,
+                  const char* search,
+                  const char* replace) AVB_ATTR_WARN_UNUSED_RESULT;
+
+/* Calculates the CRC-32 for data in |buf| of size |buf_size|. */
+uint32_t avb_crc32(const uint8_t* buf, size_t buf_size);
+
+/* Returns the basename of |str|. This is defined as the last path
+ * component, assuming the normal POSIX separator '/'. If there are no
+ * separators, returns |str|.
+ */
+const char *avb_basename(const char* str);
+
+
+
+#define AVB_STRINGIFY(x) #x
+#define AVB_TO_STRING(x) AVB_STRINGIFY(x)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Aborts the program if |expr| is false.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert(expr)                     \
+  do {                                       \
+    if (!(expr)) {                           \
+      avb_fatal("assert fail: " #expr "\n"); \
+    }                                        \
+  } while (0)
+#else
+#define avb_assert(expr)
+#endif
+
+/* Aborts the program if reached.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#ifdef AVB_ENABLE_DEBUG
+#define avb_assert_not_reached()         \
+  do {                                   \
+    avb_fatal("assert_not_reached()\n"); \
+  } while (0)
+#else
+#define avb_assert_not_reached()
+#endif
+
+/* Aborts the program if |addr| is not word-aligned.
+ *
+ * This has no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_assert_aligned(addr) \
+  avb_assert((((uintptr_t)addr) & (AVB_ALIGNMENT_SIZE - 1)) == 0)
+
+#ifdef AVB_ENABLE_DEBUG
+/* Print functions, used for diagnostics.
+ *
+ * These have no effect unless AVB_ENABLE_DEBUG is defined.
+ */
+#define avb_debug(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_debugv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": DEBUG: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+#else
+#define avb_debug(message)
+#define avb_debugv(message, ...)
+#endif
+
+/* Prints out a message. This is typically used if a runtime-error
+ * occurs.
+ */
+#define avb_error(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               NULL);                   \
+  } while (0)
+#define avb_errorv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": ERROR: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+  } while (0)
+
+/* Prints out a message and calls avb_abort().
+ */
+#define avb_fatal(message)              \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               NULL);                   \
+    avb_abort();                        \
+  } while (0)
+#define avb_fatalv(message, ...)        \
+  do {                                  \
+    avb_printv(avb_basename(__FILE__),  \
+               ":",                     \
+               AVB_TO_STRING(__LINE__), \
+               ": FATAL: ",             \
+               message,                 \
+               ##__VA_ARGS__);          \
+    avb_abort();                        \
+  } while (0)
+
+#endif /* AVB_UTIL_H_ */
diff --git a/include/android_avb/avb_vbmeta_image.h b/include/android_avb/avb_vbmeta_image.h
new file mode 100644
index 0000000000..ab78e0f4e8
--- /dev/null
+++ b/include/android_avb/avb_vbmeta_image.h
@@ -0,0 +1,293 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VBMETA_IMAGE_H_
+#define AVB_VBMETA_IMAGE_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_descriptor.h>
+
+/* Size of the vbmeta image header. */
+#define AVB_VBMETA_IMAGE_HEADER_SIZE 256
+
+/* Magic for the vbmeta image header. */
+#define AVB_MAGIC "AVB0"
+#define AVB_MAGIC_LEN 4
+
+/* Maximum size of the release string including the terminating NUL byte. */
+#define AVB_RELEASE_STRING_SIZE 48
+
+/* Flags for the vbmeta image.
+ *
+ * AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED: If this flag is set,
+ * hashtree image verification will be disabled.
+ */
+typedef enum {
+  AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED = (1 << 0),
+  AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED = (1 << 1)
+} AvbVBMetaImageFlags;
+
+/* Binary format for header of the vbmeta image.
+ *
+ * The vbmeta image consists of three blocks:
+ *
+ *  +-----------------------------------------+
+ *  | Header data - fixed size                |
+ *  +-----------------------------------------+
+ *  | Authentication data - variable size     |
+ *  +-----------------------------------------+
+ *  | Auxiliary data - variable size          |
+ *  +-----------------------------------------+
+ *
+ * The "Header data" block is described by this struct and is always
+ * |AVB_VBMETA_IMAGE_HEADER_SIZE| bytes long.
+ *
+ * The "Authentication data" block is |authentication_data_block_size|
+ * bytes long and contains the hash and signature used to authenticate
+ * the vbmeta image. The type of the hash and signature is defined by
+ * the |algorithm_type| field.
+ *
+ * The "Auxiliary data" is |auxiliary_data_block_size| bytes long and
+ * contains the auxiliary data including the public key used to make
+ * the signature and descriptors.
+ *
+ * The public key is at offset |public_key_offset| with size
+ * |public_key_size| in this block. The size of the public key data is
+ * defined by the |algorithm_type| field. The format of the public key
+ * data is described in the |AvbRSAPublicKeyHeader| struct.
+ *
+ * The descriptors starts at |descriptors_offset| from the beginning
+ * of the "Auxiliary Data" block and take up |descriptors_size|
+ * bytes. Each descriptor is stored as a |AvbDescriptor| with tag and
+ * number of bytes following. The number of descriptors can be
+ * determined by walking this data until |descriptors_size| is
+ * exhausted.
+ *
+ * The size of each of the "Authentication data" and "Auxiliary data"
+ * blocks must be divisible by 64. This is to ensure proper alignment.
+ *
+ * Descriptors are free-form blocks stored in a part of the vbmeta
+ * image subject to the same integrity checks as the rest of the
+ * image. See the documentation for |AvbDescriptor| for well-known
+ * descriptors. See avb_descriptor_foreach() for a convenience
+ * function to iterate over descriptors.
+ *
+ * This struct is versioned, see the |required_libavb_version_major|
+ * and |required_libavb_version_minor| fields. This represents the
+ * minimum version of libavb required to verify the header and depends
+ * on the features (e.g. algorithms, descriptors) used. Note that this
+ * may be 1.0 even if generated by an avbtool from 1.4 but where no
+ * features introduced after 1.0 has been used. See the "Versioning
+ * and compatibility" section in the README.md file for more details.
+ *
+ * All fields are stored in network byte order when serialized. To
+ * generate a copy with fields swapped to native byte order, use the
+ * function avb_vbmeta_image_header_to_host_byte_order().
+ *
+ * Before reading and/or using any of this data, you MUST verify it
+ * using avb_vbmeta_image_verify() and reject it unless it's signed by
+ * a known good public key.
+ */
+typedef struct AvbVBMetaImageHeader {
+  /*   0: Four bytes equal to "AVB0" (AVB_MAGIC). */
+  uint8_t magic[AVB_MAGIC_LEN];
+
+  /*   4: The major version of libavb required for this header. */
+  uint32_t required_libavb_version_major;
+  /*   8: The minor version of libavb required for this header. */
+  uint32_t required_libavb_version_minor;
+
+  /*  12: The size of the signature block. */
+  uint64_t authentication_data_block_size;
+  /*  20: The size of the auxiliary data block. */
+  uint64_t auxiliary_data_block_size;
+
+  /*  28: The verification algorithm used, see |AvbAlgorithmType| enum. */
+  uint32_t algorithm_type;
+
+  /*  32: Offset into the "Authentication data" block of hash data. */
+  uint64_t hash_offset;
+  /*  40: Length of the hash data. */
+  uint64_t hash_size;
+
+  /*  48: Offset into the "Authentication data" block of signature data. */
+  uint64_t signature_offset;
+  /*  56: Length of the signature data. */
+  uint64_t signature_size;
+
+  /*  64: Offset into the "Auxiliary data" block of public key data. */
+  uint64_t public_key_offset;
+  /*  72: Length of the public key data. */
+  uint64_t public_key_size;
+
+  /*  80: Offset into the "Auxiliary data" block of public key metadata. */
+  uint64_t public_key_metadata_offset;
+  /*  88: Length of the public key metadata. Must be set to zero if there
+   *  is no public key metadata.
+   */
+  uint64_t public_key_metadata_size;
+
+  /*  96: Offset into the "Auxiliary data" block of descriptor data. */
+  uint64_t descriptors_offset;
+  /* 104: Length of descriptor data. */
+  uint64_t descriptors_size;
+
+  /* 112: The rollback index which can be used to prevent rollback to
+   *  older versions.
+   */
+  uint64_t rollback_index;
+
+  /* 120: Flags from the AvbVBMetaImageFlags enumeration. This must be
+   * set to zero if the vbmeta image is not a top-level image.
+   */
+  uint32_t flags;
+
+  /* 124: Reserved to ensure |release_string| start on a 16-byte
+   * boundary. Must be set to zeroes.
+   */
+  uint8_t reserved0[4];
+
+  /* 128: The release string from avbtool, e.g. "avbtool 1.0.0" or
+   * "avbtool 1.0.0 xyz_board Git-234abde89". Is guaranteed to be NUL
+   * terminated. Applications must not make assumptions about how this
+   * string is formatted.
+   */
+  uint8_t release_string[AVB_RELEASE_STRING_SIZE];
+
+  /* 176: Padding to ensure struct is size AVB_VBMETA_IMAGE_HEADER_SIZE
+   * bytes. This must be set to zeroes.
+   */
+  uint8_t reserved[80];
+} AVB_ATTR_PACKED AvbVBMetaImageHeader;
+
+/* Copies |src| to |dest|, byte-swapping fields in the process.
+ *
+ * Make sure you've verified |src| using avb_vbmeta_image_verify()
+ * before accessing the data and/or using this function.
+ */
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest);
+
+/* Return codes used in avb_vbmeta_image_verify().
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK is returned if the vbmeta image header
+ * is valid, the hash is correct and the signature is correct. Keep in
+ * mind that you still need to check that you know the public key used
+ * to sign the image, see avb_vbmeta_image_verify() for details.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED is returned if the vbmeta
+ * image header is valid but there is no signature or hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER is returned if the
+ * header of the vbmeta image is invalid, for example, invalid magic
+ * or inconsistent data.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION is returned if a) the
+ * vbmeta image requires a minimum version of libavb which exceeds the
+ * version of libavb used; or b) the vbmeta image major version
+ * differs from the major version of libavb in use.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH is returned if the hash
+ * stored in the "Authentication data" block does not match the
+ * calculated hash.
+ *
+ * AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH is returned if the
+ * signature stored in the "Authentication data" block is invalid or
+ * doesn't match the public key stored in the vbmeta image.
+ */
+typedef enum {
+  AVB_VBMETA_VERIFY_RESULT_OK,
+  AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED,
+  AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER,
+  AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION,
+  AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH,
+  AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH,
+} AvbVBMetaVerifyResult;
+
+/* Get a textual representation of |result|. */
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result);
+
+/* Checks that vbmeta image at |data| of size |length| is a valid
+ * vbmeta image. The complete contents of the vbmeta image must be
+ * passed in. It's fine if |length| is bigger than the actual image,
+ * typically callers of this function will load the entire contents of
+ * the 'vbmeta_a' or 'vbmeta_b' partition and pass in its length (for
+ * example, 1 MiB).
+ *
+ * See the |AvbVBMetaImageHeader| struct for information about the
+ * three blocks (header, authentication, auxiliary) that make up a
+ * vbmeta image.
+ *
+ * If the function returns |AVB_VBMETA_VERIFY_RESULT_OK| and
+ * |out_public_key_data| is non-NULL, it will be set to point inside
+ * |data| for where the serialized public key data is stored and
+ * |out_public_key_length|, if non-NULL, will be set to the length of
+ * the public key data. If there is no public key in the metadata then
+ * |out_public_key_data| is set to NULL.
+ *
+ * See the |AvbVBMetaVerifyResult| enum for possible return values.
+ *
+ * VERY IMPORTANT:
+ *
+ *   1. Even if |AVB_VBMETA_VERIFY_RESULT_OK| is returned, you still
+ *      need to check that the public key embedded in the image
+ *      matches a known key! You can use 'avbtool extract_public_key'
+ *      to extract the key (at build time, then store it along your
+ *      code) and compare it to what is returned in
+ *      |out_public_key_data|.
+ *
+ *   2. You need to check the |rollback_index| field against a stored
+ *      value in NVRAM and reject the vbmeta image if the value in
+ *      NVRAM is bigger than |rollback_index|. You must also update
+ *      the value stored in NVRAM to the smallest value of
+ *      |rollback_index| field from boot images in all bootable and
+ *      authentic slots marked as GOOD.
+ *
+ * This is a low-level function to only verify the vbmeta data - you
+ * are likely looking for avb_slot_verify() instead for verifying
+ * integrity data for a whole set of partitions.
+ */
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length) AVB_ATTR_WARN_UNUSED_RESULT;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VBMETA_IMAGE_H_ */
diff --git a/include/android_avb/avb_version.h b/include/android_avb/avb_version.h
new file mode 100644
index 0000000000..3479acc484
--- /dev/null
+++ b/include/android_avb/avb_version.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+#if !defined(AVB_INSIDE_LIBAVB_H) && !defined(AVB_COMPILATION)
+#error "Never include this file directly, include libavb.h instead."
+#endif
+*/
+
+#ifndef AVB_VERSION_H_
+#define AVB_VERSION_H_
+
+#include <android_avb/avb_sysdeps.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* The version number of AVB - keep in sync with avbtool. */
+#define AVB_VERSION_MAJOR 1
+#define AVB_VERSION_MINOR 0
+#define AVB_VERSION_SUB 0
+
+/* Returns a NUL-terminated string for the libavb version in use.  The
+ * returned string usually looks like "%d.%d.%d". Applications must
+ * not make assumptions about the content of this string.
+ *
+ * Boot loaders should display this string in debug/diagnostics output
+ * to aid with debugging.
+ *
+ * This is similar to the string put in the |release_string| string
+ * field in the VBMeta struct by avbtool.
+ */
+const char* avb_version_string(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AVB_VERSION_H_ */
diff --git a/include/android_avb/libavb.h b/include/android_avb/libavb.h
new file mode 100644
index 0000000000..596a8b7245
--- /dev/null
+++ b/include/android_avb/libavb.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef LIBAVB_H_
+#define LIBAVB_H_
+
+/* The AVB_INSIDE_LIBAVB_H preprocessor symbol is used to enforce
+ * library users to include only this file. All public interfaces, and
+ * only public interfaces, must be included here.
+ */
+
+#define AVB_INSIDE_LIBAVB_H
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_ops.h>
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+#undef AVB_INSIDE_LIBAVB_H
+
+#endif /* LIBAVB_H_ */
diff --git a/lib/Kconfig b/lib/Kconfig
index 4554bb28ea..96f2b269ce 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -268,5 +268,6 @@ endmenu
 
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
+source lib/avb/rk_libavb/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 2eef1eb80e..f949f447dd 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -45,6 +45,8 @@ obj-$(CONFIG_BITREVERSE) += bitrev.o
 obj-y += list_sort.o
 endif
 
+obj-$(CONFIG_AVB_LIBAVB) += avb/rk_libavb/
+
 obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
diff --git a/lib/avb/rk_libavb/Kconfig b/lib/avb/rk_libavb/Kconfig
new file mode 100644
index 0000000000..c569909bdb
--- /dev/null
+++ b/lib/avb/rk_libavb/Kconfig
@@ -0,0 +1,6 @@
+config AVB_LIBAVB
+	bool "Support running U-Boot AVB"
+	help
+	  The new android bootloader need to startup
+	  with a/b and avb.This config can add the
+	  AVB functions to u-boot.
diff --git a/lib/avb/rk_libavb/Makefile b/lib/avb/rk_libavb/Makefile
new file mode 100644
index 0000000000..07ddb0cb9a
--- /dev/null
+++ b/lib/avb/rk_libavb/Makefile
@@ -0,0 +1,17 @@
+obj-y	+= avb_chain_partition_descriptor.o
+obj-y	+= avb_crc32.o
+obj-y	+= avb_crypto.o
+obj-y	+= avb_descriptor.o
+obj-y	+= avb_footer.o
+obj-y	+= avb_hash_descriptor.o
+obj-y	+= avb_hashtree_descriptor.o
+obj-y	+= avb_kernel_cmdline_descriptor.o
+obj-y	+= avb_property_descriptor.o
+obj-y	+= avb_rsa.o
+obj-y	+= avb_sha256.o
+obj-y	+= avb_sha512.o
+obj-y	+= avb_sysdeps_posix.o
+obj-y	+= avb_slot_verify.o
+obj-y	+= avb_util.o
+obj-y	+= avb_vbmeta_image.o
+obj-y	+= avb_version.o
diff --git a/lib/avb/rk_libavb/avb_chain_partition_descriptor.c b/lib/avb/rk_libavb/avb_chain_partition_descriptor.c
new file mode 100644
index 0000000000..145b01b560
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_chain_partition_descriptor.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_chain_partition_descriptor_validate_and_byteswap(
+    const AvbChainPartitionDescriptor* src, AvbChainPartitionDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbChainPartitionDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_CHAIN_PARTITION) {
+    avb_error("Invalid tag for chain partition descriptor.\n");
+    return false;
+  }
+
+  dest->rollback_index_location = avb_be32toh(dest->rollback_index_location);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->public_key_len = avb_be32toh(dest->public_key_len);
+
+  if (dest->rollback_index_location < 1) {
+    avb_error("Invalid rollback index location value.\n");
+    return false;
+  }
+
+  /* Check that partition_name and public_key are fully contained. */
+  expected_size = sizeof(AvbChainPartitionDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->public_key_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_crc32.c b/lib/avb/rk_libavb/avb_crc32.c
new file mode 100644
index 0000000000..674dfe38c6
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_crc32.c
@@ -0,0 +1,114 @@
+/*-
+ *  COPYRIGHT (C) 1986 Gary S. Brown.  You may use this program, or
+ *  code or tables extracted from it, as desired without restriction.
+ */
+
+/*
+ *  First, the polynomial itself and its table of feedback terms.  The
+ *  polynomial is
+ *  X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
+ *
+ *  Note that we take it "backwards" and put the highest-order term in
+ *  the lowest-order bit.  The X^32 term is "implied"; the LSB is the
+ *  X^31 term, etc.  The X^0 term (usually shown as "+1") results in
+ *  the MSB being 1
+ *
+ *  Note that the usual hardware shift register implementation, which
+ *  is what we're using (we're merely optimizing it by doing eight-bit
+ *  chunks at a time) shifts bits into the lowest-order term.  In our
+ *  implementation, that means shifting towards the right.  Why do we
+ *  do it this way?  Because the calculated CRC must be transmitted in
+ *  order from highest-order term to lowest-order term.  UARTs transmit
+ *  characters in order from LSB to MSB.  By storing the CRC this way
+ *  we hand it to the UART in the order low-byte to high-byte; the UART
+ *  sends each low-bit to hight-bit; and the result is transmission bit
+ *  by bit from highest- to lowest-order term without requiring any bit
+ *  shuffling on our part.  Reception works similarly
+ *
+ *  The feedback terms table consists of 256, 32-bit entries.  Notes
+ *
+ *      The table can be generated at runtime if desired; code to do so
+ *      is shown later.  It might not be obvious, but the feedback
+ *      terms simply represent the results of eight shift/xor opera
+ *      tions for all combinations of data and CRC register values
+ *
+ *      The values must be right-shifted by eight bits by the "updcrc
+ *      logic; the shift must be unsigned (bring in zeroes).  On some
+ *      hardware you could probably optimize the shift in assembler by
+ *      using byte-swap instructions
+ *      polynomial $edb88320
+ *
+ *
+ * CRC32 code derived from work by Gary S. Brown.
+ */
+
+#include <android_avb/avb_sysdeps.h>
+#include <android_avb/avb_util.h>
+
+/* Code taken from FreeBSD 8 */
+
+static uint32_t crc32_tab[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f,
+    0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+    0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2,
+    0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9,
+    0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+    0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c,
+    0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423,
+    0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+    0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106,
+    0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d,
+    0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
+    0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950,
+    0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7,
+    0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
+    0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa,
+    0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81,
+    0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
+    0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84,
+    0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb,
+    0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
+    0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e,
+    0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55,
+    0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
+    0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28,
+    0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f,
+    0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
+    0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242,
+    0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69,
+    0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
+    0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc,
+    0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693,
+    0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
+    0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d};
+
+/*
+ * A function that calculates the CRC-32 based on the table above is
+ * given below for documentation purposes. An equivalent implementation
+ * of this function that's actually used in the kernel can be found
+ * in sys/libkern.h, where it can be inlined.
+ */
+
+static uint32_t crc32(uint32_t crc_in, const uint8_t* buf, int size) {
+  const uint8_t* p = buf;
+  uint32_t crc;
+
+  crc = crc_in ^ ~0U;
+  while (size--)
+    crc = crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8);
+  return crc ^ ~0U;
+}
+
+uint32_t avb_crc32(const uint8_t* buf, size_t size) {
+  return crc32(0, buf, size);
+}
diff --git a/lib/avb/rk_libavb/avb_crypto.c b/lib/avb/rk_libavb/avb_crypto.c
new file mode 100644
index 0000000000..89c814803c
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_crypto.c
@@ -0,0 +1,373 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+
+/* NOTE: The PKC1-v1.5 padding is a blob of binary DER of ASN.1 and is
+ * obtained from section 5.2.2 of RFC 4880.
+ */
+
+static const uint8_t
+    padding_RSA2048_SHA256[AVB_RSA2048_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA4096_SHA256[AVB_RSA4096_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA8192_SHA256[AVB_RSA8192_NUM_BYTES - AVB_SHA256_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0x00, 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65,
+        0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20};
+
+static const uint8_t
+    padding_RSA2048_SHA512[AVB_RSA2048_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA4096_SHA512[AVB_RSA4096_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30,
+        0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03,
+        0x05, 0x00, 0x04, 0x40};
+
+static const uint8_t
+    padding_RSA8192_SHA512[AVB_RSA8192_NUM_BYTES - AVB_SHA512_DIGEST_SIZE] = {
+        0x00, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0x51, 0x30, 0x0d, 0x06, 0x09, 0x60,
+        0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x03, 0x05, 0x00, 0x04, 0x40};
+
+static AvbAlgorithmData algorithm_data[_AVB_ALGORITHM_NUM_TYPES] = {
+    /* AVB_ALGORITHM_TYPE_NONE */
+    {.padding = NULL, .padding_len = 0, .hash_len = 0},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA2048 */
+    {.padding = padding_RSA2048_SHA256,
+     .padding_len = sizeof(padding_RSA2048_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA4096 */
+    {.padding = padding_RSA4096_SHA256,
+     .padding_len = sizeof(padding_RSA4096_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA256_RSA8192 */
+    {.padding = padding_RSA8192_SHA256,
+     .padding_len = sizeof(padding_RSA8192_SHA256),
+     .hash_len = AVB_SHA256_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA2048 */
+    {.padding = padding_RSA2048_SHA512,
+     .padding_len = sizeof(padding_RSA2048_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA4096 */
+    {.padding = padding_RSA4096_SHA512,
+     .padding_len = sizeof(padding_RSA4096_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+    /* AVB_ALGORITHM_TYPE_SHA512_RSA8192 */
+    {.padding = padding_RSA8192_SHA512,
+     .padding_len = sizeof(padding_RSA8192_SHA512),
+     .hash_len = AVB_SHA512_DIGEST_SIZE},
+};
+
+const AvbAlgorithmData* avb_get_algorithm_data(AvbAlgorithmType algorithm) {
+  if (algorithm >= AVB_ALGORITHM_TYPE_NONE &&
+      algorithm < _AVB_ALGORITHM_NUM_TYPES) {
+    return &algorithm_data[algorithm];
+  }
+  return NULL;
+}
+
+bool avb_rsa_public_key_header_validate_and_byteswap(
+    const AvbRSAPublicKeyHeader* src, AvbRSAPublicKeyHeader* dest) {
+  avb_memcpy(dest, src, sizeof(AvbRSAPublicKeyHeader));
+
+  dest->key_num_bits = avb_be32toh(dest->key_num_bits);
+  dest->n0inv = avb_be32toh(dest->n0inv);
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_descriptor.c b/lib/avb/rk_libavb/avb_descriptor.c
new file mode 100644
index 0000000000..ffe9add145
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_descriptor.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_descriptor.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
+                                          AvbDescriptor* dest) {
+  dest->tag = avb_be64toh(src->tag);
+  dest->num_bytes_following = avb_be64toh(src->num_bytes_following);
+
+  if ((dest->num_bytes_following & 0x07) != 0) {
+    avb_error("Descriptor size is not divisible by 8.\n");
+    return false;
+  }
+  return true;
+}
+
+bool avb_descriptor_foreach(const uint8_t* image_data,
+                            size_t image_size,
+                            AvbDescriptorForeachFunc foreach_func,
+                            void* user_data) {
+  const AvbVBMetaImageHeader* header = NULL;
+  bool ret = false;
+  const uint8_t* image_end;
+  const uint8_t* desc_start;
+  const uint8_t* desc_end;
+  const uint8_t* p;
+
+  if (image_data == NULL) {
+    avb_error("image_data is NULL\n.");
+    goto out;
+  }
+
+  if (foreach_func == NULL) {
+    avb_error("foreach_func is NULL\n.");
+    goto out;
+  }
+
+  if (image_size < sizeof(AvbVBMetaImageHeader)) {
+    avb_error("Length is smaller than header.\n");
+    goto out;
+  }
+
+  /* Ensure magic is correct. */
+  if (avb_memcmp(image_data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+    avb_error("Magic is incorrect.\n");
+    goto out;
+  }
+
+  /* Careful, not byteswapped - also ensure it's aligned properly. */
+  avb_assert_aligned(image_data);
+  header = (const AvbVBMetaImageHeader*)image_data;
+  image_end = image_data + image_size;
+
+  desc_start = image_data + sizeof(AvbVBMetaImageHeader) +
+               avb_be64toh(header->authentication_data_block_size) +
+               avb_be64toh(header->descriptors_offset);
+
+  desc_end = desc_start + avb_be64toh(header->descriptors_size);
+
+  if (desc_start < image_data || desc_start > image_end ||
+      desc_end < image_data || desc_end > image_end || desc_end < desc_start) {
+    avb_error("Descriptors not inside passed-in data.\n");
+    goto out;
+  }
+
+  for (p = desc_start; p < desc_end;) {
+    const AvbDescriptor* dh = (const AvbDescriptor*)p;
+    avb_assert_aligned(dh);
+    uint64_t nb_following = avb_be64toh(dh->num_bytes_following);
+    uint64_t nb_total = sizeof(AvbDescriptor) + nb_following;
+
+    if ((nb_total & 7) != 0) {
+      avb_error("Invalid descriptor length.\n");
+      goto out;
+    }
+
+    if (nb_total + p < desc_start || nb_total + p > desc_end) {
+      avb_error("Invalid data in descriptors array.\n");
+      goto out;
+    }
+
+    if (foreach_func(dh, user_data) == 0) {
+      goto out;
+    }
+
+    p += nb_total;
+  }
+
+  ret = true;
+
+out:
+  return ret;
+}
+
+static bool count_descriptors(const AvbDescriptor* descriptor,
+                              void* user_data) {
+  size_t* num_descriptors = user_data;
+  *num_descriptors += 1;
+  return true;
+}
+
+typedef struct {
+  size_t descriptor_number;
+  const AvbDescriptor** descriptors;
+} SetDescriptorData;
+
+static bool set_descriptors(const AvbDescriptor* descriptor, void* user_data) {
+  SetDescriptorData* data = user_data;
+  data->descriptors[data->descriptor_number++] = descriptor;
+  return true;
+}
+
+const AvbDescriptor** avb_descriptor_get_all(const uint8_t* image_data,
+                                             size_t image_size,
+                                             size_t* out_num_descriptors) {
+  size_t num_descriptors = 0;
+  SetDescriptorData data;
+
+  avb_descriptor_foreach(
+      image_data, image_size, count_descriptors, &num_descriptors);
+
+  data.descriptor_number = 0;
+  data.descriptors =
+      avb_calloc(sizeof(const AvbDescriptor*) * (num_descriptors + 1));
+  if (data.descriptors == NULL) {
+    return NULL;
+  }
+  avb_descriptor_foreach(image_data, image_size, set_descriptors, &data);
+  avb_assert(data.descriptor_number == num_descriptors);
+
+  if (out_num_descriptors != NULL) {
+    *out_num_descriptors = num_descriptors;
+  }
+
+  return data.descriptors;
+}
diff --git a/lib/avb/rk_libavb/avb_footer.c b/lib/avb/rk_libavb/avb_footer.c
new file mode 100644
index 0000000000..31257d0949
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_footer.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_util.h>
+
+bool avb_footer_validate_and_byteswap(const AvbFooter* src, AvbFooter* dest) {
+  avb_memcpy(dest, src, sizeof(AvbFooter));
+
+  dest->version_major = avb_be32toh(dest->version_major);
+  dest->version_minor = avb_be32toh(dest->version_minor);
+
+  dest->original_image_size = avb_be64toh(dest->original_image_size);
+  dest->vbmeta_offset = avb_be64toh(dest->vbmeta_offset);
+  dest->vbmeta_size = avb_be64toh(dest->vbmeta_size);
+
+  /* Check that magic is correct. */
+  if (avb_safe_memcmp(dest->magic, AVB_FOOTER_MAGIC, AVB_FOOTER_MAGIC_LEN) !=
+      0) {
+    avb_error("Footer magic is incorrect.\n");
+    return false;
+  }
+
+  /* Ensure we don't attempt to access any fields if the footer major
+   * version is not supported.
+   */
+  if (dest->version_major > AVB_FOOTER_VERSION_MAJOR) {
+    avb_error("No support for footer version.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hash_descriptor.c b/lib/avb/rk_libavb/avb_hash_descriptor.c
new file mode 100644
index 0000000000..5444ca2d6a
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_hash_descriptor.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hash_descriptor_validate_and_byteswap(const AvbHashDescriptor* src,
+                                               AvbHashDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASH) {
+    avb_error("Invalid tag for hash descriptor.\n");
+    return false;
+  }
+
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->digest_len = avb_be32toh(dest->digest_len);
+
+  /* Check that partition_name, salt, and digest are fully contained. */
+  expected_size = sizeof(AvbHashDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_hashtree_descriptor.c b/lib/avb/rk_libavb/avb_hashtree_descriptor.c
new file mode 100644
index 0000000000..2b4b03da52
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_hashtree_descriptor.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_hashtree_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_hashtree_descriptor_validate_and_byteswap(
+    const AvbHashtreeDescriptor* src, AvbHashtreeDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbHashtreeDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_HASHTREE) {
+    avb_error("Invalid tag for hashtree descriptor.\n");
+    return false;
+  }
+
+  dest->dm_verity_version = avb_be32toh(dest->dm_verity_version);
+  dest->image_size = avb_be64toh(dest->image_size);
+  dest->tree_offset = avb_be64toh(dest->tree_offset);
+  dest->tree_size = avb_be64toh(dest->tree_size);
+  dest->data_block_size = avb_be32toh(dest->data_block_size);
+  dest->hash_block_size = avb_be32toh(dest->hash_block_size);
+  dest->fec_num_roots = avb_be32toh(dest->fec_num_roots);
+  dest->fec_offset = avb_be64toh(dest->fec_offset);
+  dest->fec_size = avb_be64toh(dest->fec_size);
+  dest->partition_name_len = avb_be32toh(dest->partition_name_len);
+  dest->salt_len = avb_be32toh(dest->salt_len);
+  dest->root_digest_len = avb_be32toh(dest->root_digest_len);
+
+  /* Check that partition_name, salt, and root_digest are fully contained. */
+  expected_size = sizeof(AvbHashtreeDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->partition_name_len) ||
+      !avb_safe_add_to(&expected_size, dest->salt_len) ||
+      !avb_safe_add_to(&expected_size, dest->root_digest_len)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c b/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
new file mode 100644
index 0000000000..b33e19d997
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_kernel_cmdline_descriptor.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_kernel_cmdline_descriptor_validate_and_byteswap(
+    const AvbKernelCmdlineDescriptor* src, AvbKernelCmdlineDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbKernelCmdlineDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE) {
+    avb_error("Invalid tag for kernel cmdline descriptor.\n");
+    return false;
+  }
+
+  dest->flags = avb_be32toh(dest->flags);
+  dest->kernel_cmdline_length = avb_be32toh(dest->kernel_cmdline_length);
+
+  /* Check that kernel_cmdline is fully contained. */
+  expected_size = sizeof(AvbKernelCmdlineDescriptor) - sizeof(AvbDescriptor);
+  if (!avb_safe_add_to(&expected_size, dest->kernel_cmdline_length)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
diff --git a/lib/avb/rk_libavb/avb_property_descriptor.c b/lib/avb/rk_libavb/avb_property_descriptor.c
new file mode 100644
index 0000000000..f567fd7033
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_property_descriptor.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_property_descriptor.h>
+#include <android_avb/avb_util.h>
+
+bool avb_property_descriptor_validate_and_byteswap(
+    const AvbPropertyDescriptor* src, AvbPropertyDescriptor* dest) {
+  uint64_t expected_size;
+
+  avb_memcpy(dest, src, sizeof(AvbPropertyDescriptor));
+
+  if (!avb_descriptor_validate_and_byteswap((const AvbDescriptor*)src,
+                                            (AvbDescriptor*)dest))
+    return false;
+
+  if (dest->parent_descriptor.tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    avb_error("Invalid tag for property descriptor.\n");
+    return false;
+  }
+
+  dest->key_num_bytes = avb_be64toh(dest->key_num_bytes);
+  dest->value_num_bytes = avb_be64toh(dest->value_num_bytes);
+
+  /* Check that key and value are fully contained. */
+  expected_size = sizeof(AvbPropertyDescriptor) - sizeof(AvbDescriptor) + 2;
+  if (!avb_safe_add_to(&expected_size, dest->key_num_bytes) ||
+      !avb_safe_add_to(&expected_size, dest->value_num_bytes)) {
+    avb_error("Overflow while adding up sizes.\n");
+    return false;
+  }
+  if (expected_size > dest->parent_descriptor.num_bytes_following) {
+    avb_error("Descriptor payload size overflow.\n");
+    return false;
+  }
+
+  return true;
+}
+
+typedef struct {
+  const char* key;
+  size_t key_size;
+  const char* ret_value;
+  size_t ret_value_size;
+} PropertyIteratorData;
+
+static bool property_lookup_desc_foreach(const AvbDescriptor* header,
+                                         void* user_data) {
+  PropertyIteratorData* data = (PropertyIteratorData*)user_data;
+  AvbPropertyDescriptor prop_desc;
+  const uint8_t* p;
+  bool ret = true;
+
+  if (header->tag != AVB_DESCRIPTOR_TAG_PROPERTY) {
+    goto out;
+  }
+
+  if (!avb_property_descriptor_validate_and_byteswap(
+          (const AvbPropertyDescriptor*)header, &prop_desc)) {
+    goto out;
+  }
+
+  p = (const uint8_t*)header;
+  if (p[sizeof(AvbPropertyDescriptor) + prop_desc.key_num_bytes] != 0) {
+    avb_error("No terminating NUL byte in key.\n");
+    goto out;
+  }
+
+  if (data->key_size == prop_desc.key_num_bytes) {
+    if (avb_memcmp(p + sizeof(AvbPropertyDescriptor),
+                   data->key,
+                   data->key_size) == 0) {
+      data->ret_value = (const char*)(p + sizeof(AvbPropertyDescriptor) +
+                                      prop_desc.key_num_bytes + 1);
+      data->ret_value_size = prop_desc.value_num_bytes;
+      /* Stop iterating. */
+      ret = false;
+      goto out;
+    }
+  }
+
+out:
+  return ret;
+}
+
+const char* avb_property_lookup(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                size_t* out_value_size) {
+  PropertyIteratorData data;
+
+  if (key_size == 0) {
+    key_size = avb_strlen(key);
+  }
+
+  data.key = key;
+  data.key_size = key_size;
+
+  if (avb_descriptor_foreach(
+          image_data, image_size, property_lookup_desc_foreach, &data) == 0) {
+    if (out_value_size != NULL) {
+      *out_value_size = data.ret_value_size;
+    }
+    return data.ret_value;
+  }
+
+  if (out_value_size != NULL) {
+    *out_value_size = 0;
+  }
+  return NULL;
+}
+
+bool avb_property_lookup_uint64(const uint8_t* image_data,
+                                size_t image_size,
+                                const char* key,
+                                size_t key_size,
+                                uint64_t* out_value) {
+  const char* value;
+  bool ret = false;
+  uint64_t parsed_val;
+  int base;
+  int n;
+
+  value = avb_property_lookup(image_data, image_size, key, key_size, NULL);
+  if (value == NULL) {
+    goto out;
+  }
+
+  base = 10;
+  if (avb_memcmp(value, "0x", 2) == 0) {
+    base = 16;
+    value += 2;
+  }
+
+  parsed_val = 0;
+  for (n = 0; value[n] != '\0'; n++) {
+    int c = value[n];
+    int digit;
+
+    parsed_val *= base;
+
+    if (c >= '0' && c <= '9') {
+      digit = c - '0';
+    } else if (base == 16 && c >= 'a' && c <= 'f') {
+      digit = c - 'a' + 10;
+    } else if (base == 16 && c >= 'A' && c <= 'F') {
+      digit = c - 'A' + 10;
+    } else {
+      avb_error("Invalid digit.\n");
+      goto out;
+    }
+
+    parsed_val += digit;
+  }
+
+  ret = true;
+  if (out_value != NULL) {
+    *out_value = parsed_val;
+  }
+
+out:
+  return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_rsa.c b/lib/avb/rk_libavb/avb_rsa.c
new file mode 100644
index 0000000000..e2f62f113d
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_rsa.c
@@ -0,0 +1,299 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Implementation of RSA signature verification which uses a pre-processed
+ * key for computation. The code extends libmincrypt RSA verification code to
+ * support multiple RSA key lengths and hash digest algorithms.
+ */
+
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+
+typedef struct Key {
+  unsigned int len; /* Length of n[] in number of uint32_t */
+  uint32_t n0inv;   /* -1 / n[0] mod 2^32 */
+  uint32_t* n;      /* modulus as array (host-byte order) */
+  uint32_t* rr;     /* R^2 as array (host-byte order) */
+} Key;
+
+Key* parse_key_data(const uint8_t* data, size_t length) {
+  AvbRSAPublicKeyHeader h;
+  Key* key = NULL;
+  size_t expected_length;
+  unsigned int i;
+  const uint8_t* n;
+  const uint8_t* rr;
+
+  if (!avb_rsa_public_key_header_validate_and_byteswap(
+          (const AvbRSAPublicKeyHeader*)data, &h)) {
+    avb_error("Invalid key.\n");
+    goto fail;
+  }
+
+  if (!(h.key_num_bits == 2048 || h.key_num_bits == 4096 ||
+        h.key_num_bits == 8192)) {
+    avb_error("Unexpected key length.\n");
+    goto fail;
+  }
+
+  expected_length = sizeof(AvbRSAPublicKeyHeader) + 2 * h.key_num_bits / 8;
+  if (length != expected_length) {
+    avb_error("Key does not match expected length.\n");
+    goto fail;
+  }
+
+  n = data + sizeof(AvbRSAPublicKeyHeader);
+  rr = data + sizeof(AvbRSAPublicKeyHeader) + h.key_num_bits / 8;
+
+  /* Store n and rr following the key header so we only have to do one
+   * allocation.
+   */
+  key = (Key*)(avb_malloc(sizeof(Key) + 2 * h.key_num_bits / 8));
+  if (key == NULL) {
+    goto fail;
+  }
+
+  key->len = h.key_num_bits / 32;
+  key->n0inv = h.n0inv;
+  key->n = (uint32_t*)(key + 1); /* Skip ahead sizeof(Key) bytes. */
+  key->rr = key->n + key->len;
+
+  /* Crypto-code below (modpowF4() and friends) expects the key in
+   * little-endian format (rather than the format we're storing the
+   * key in), so convert it.
+   */
+  for (i = 0; i < key->len; i++) {
+    key->n[i] = avb_be32toh(((uint32_t*)n)[key->len - i - 1]);
+    key->rr[i] = avb_be32toh(((uint32_t*)rr)[key->len - i - 1]);
+  }
+  return key;
+
+fail:
+  if (key != NULL) {
+    avb_free(key);
+  }
+  return NULL;
+}
+
+void free_parsed_key(Key* key) {
+  avb_free(key);
+}
+
+/* a[] -= mod */
+static void subM(const Key* key, uint32_t* a) {
+  int64_t A = 0;
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    A += (uint64_t)a[i] - key->n[i];
+    a[i] = (uint32_t)A;
+    A >>= 32;
+  }
+}
+
+/* return a[] >= mod */
+static int geM(const Key* key, uint32_t* a) {
+  uint32_t i;
+  for (i = key->len; i;) {
+    --i;
+    if (a[i] < key->n[i]) {
+      return 0;
+    }
+    if (a[i] > key->n[i]) {
+      return 1;
+    }
+  }
+  return 1; /* equal */
+}
+
+/* montgomery c[] += a * b[] / R % mod */
+static void montMulAdd(const Key* key,
+                       uint32_t* c,
+                       const uint32_t a,
+                       const uint32_t* b) {
+  uint64_t A = (uint64_t)a * b[0] + c[0];
+  uint32_t d0 = (uint32_t)A * key->n0inv;
+  uint64_t B = (uint64_t)d0 * key->n[0] + (uint32_t)A;
+  uint32_t i;
+
+  for (i = 1; i < key->len; ++i) {
+    A = (A >> 32) + (uint64_t)a * b[i] + c[i];
+    B = (B >> 32) + (uint64_t)d0 * key->n[i] + (uint32_t)A;
+    c[i - 1] = (uint32_t)B;
+  }
+
+  A = (A >> 32) + (B >> 32);
+
+  c[i - 1] = (uint32_t)A;
+
+  if (A >> 32) {
+    subM(key, c);
+  }
+}
+
+/* montgomery c[] = a[] * b[] / R % mod */
+static void montMul(const Key* key, uint32_t* c, uint32_t* a, uint32_t* b) {
+  uint32_t i;
+  for (i = 0; i < key->len; ++i) {
+    c[i] = 0;
+  }
+  for (i = 0; i < key->len; ++i) {
+    montMulAdd(key, c, a[i], b);
+  }
+}
+
+/* In-place public exponentiation. (65537}
+ * Input and output big-endian byte array in inout.
+ */
+static void modpowF4(const Key* key, uint8_t* inout) {
+  uint32_t* a = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  uint32_t* aaR = (uint32_t*)avb_malloc(key->len * sizeof(uint32_t));
+  if (a == NULL || aR == NULL || aaR == NULL) {
+    goto out;
+  }
+
+  uint32_t* aaa = aaR; /* Re-use location. */
+  int i;
+
+  /* Convert from big endian byte array to little endian word array. */
+  for (i = 0; i < (int)key->len; ++i) {
+    uint32_t tmp = (inout[((key->len - 1 - i) * 4) + 0] << 24) |
+                   (inout[((key->len - 1 - i) * 4) + 1] << 16) |
+                   (inout[((key->len - 1 - i) * 4) + 2] << 8) |
+                   (inout[((key->len - 1 - i) * 4) + 3] << 0);
+    a[i] = tmp;
+  }
+
+  montMul(key, aR, a, key->rr); /* aR = a * RR / R mod M   */
+  for (i = 0; i < 16; i += 2) {
+    montMul(key, aaR, aR, aR);  /* aaR = aR * aR / R mod M */
+    montMul(key, aR, aaR, aaR); /* aR = aaR * aaR / R mod M */
+  }
+  montMul(key, aaa, aR, a); /* aaa = aR * a / R mod M */
+
+  /* Make sure aaa < mod; aaa is at most 1x mod too large. */
+  if (geM(key, aaa)) {
+    subM(key, aaa);
+  }
+
+  /* Convert to bigendian byte array */
+  for (i = (int)key->len - 1; i >= 0; --i) {
+    uint32_t tmp = aaa[i];
+    *inout++ = (uint8_t)(tmp >> 24);
+    *inout++ = (uint8_t)(tmp >> 16);
+    *inout++ = (uint8_t)(tmp >> 8);
+    *inout++ = (uint8_t)(tmp >> 0);
+  }
+
+out:
+  if (a != NULL) {
+    avb_free(a);
+  }
+  if (aR != NULL) {
+    avb_free(aR);
+  }
+  if (aaR != NULL) {
+    avb_free(aaR);
+  }
+}
+
+/* Verify a RSA PKCS1.5 signature against an expected hash.
+ * Returns false on failure, true on success.
+ */
+bool avb_rsa_verify(const uint8_t* key,
+                    size_t key_num_bytes,
+                    const uint8_t* sig,
+                    size_t sig_num_bytes,
+                    const uint8_t* hash,
+                    size_t hash_num_bytes,
+                    const uint8_t* padding,
+                    size_t padding_num_bytes) {
+  uint8_t* buf = NULL;
+  Key* parsed_key = NULL;
+  bool success = false;
+
+  if (key == NULL || sig == NULL || hash == NULL || padding == NULL) {
+    avb_error("Invalid input.\n");
+    goto out;
+  }
+
+  parsed_key = parse_key_data(key, key_num_bytes);
+  if (parsed_key == NULL) {
+    avb_error("Error parsing key.\n");
+    goto out;
+  }
+
+  if (sig_num_bytes != (parsed_key->len * sizeof(uint32_t))) {
+    avb_error("Signature length does not match key length.\n");
+    goto out;
+  }
+
+  if (padding_num_bytes != sig_num_bytes - hash_num_bytes) {
+    avb_error("Padding length does not match hash and signature lengths.\n");
+    goto out;
+  }
+
+  buf = (uint8_t*)avb_malloc(sig_num_bytes);
+  if (buf == NULL) {
+    avb_error("Error allocating memory.\n");
+    goto out;
+  }
+  avb_memcpy(buf, sig, sig_num_bytes);
+
+  modpowF4(parsed_key, buf);
+
+  /* Check padding bytes.
+   *
+   * Even though there are probably no timing issues here, we use
+   * avb_safe_memcmp() just to be on the safe side.
+   */
+  if (avb_safe_memcmp(buf, padding, padding_num_bytes)) {
+    avb_error("Padding check failed.\n");
+    goto out;
+  }
+
+  /* Check hash. */
+  if (avb_safe_memcmp(buf + padding_num_bytes, hash, hash_num_bytes)) {
+    avb_error("Hash check failed.\n");
+    goto out;
+  }
+
+  success = true;
+
+out:
+  if (parsed_key != NULL) {
+    free_parsed_key(parsed_key);
+  }
+  if (buf != NULL) {
+    avb_free(buf);
+  }
+  return success;
+}
diff --git a/lib/avb/rk_libavb/avb_sha256.c b/lib/avb/rk_libavb/avb_sha256.c
new file mode 100644
index 0000000000..b6d30c112e
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_sha256.c
@@ -0,0 +1,390 @@
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
+#define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
+#define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3))
+#define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define PACK32(str, x)                                                    \
+  {                                                                       \
+    *(x) = ((uint32_t) * ((str) + 3)) | ((uint32_t) * ((str) + 2) << 8) | \
+           ((uint32_t) * ((str) + 1) << 16) |                             \
+           ((uint32_t) * ((str) + 0) << 24);                              \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA256_SCR(i) \
+  { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA256_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA256_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha256_k[j] + \
+         w[j];                                                              \
+    t2 = SHA256_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint32_t sha256_h0[8] = {0x6a09e667,
+                                      0xbb67ae85,
+                                      0x3c6ef372,
+                                      0xa54ff53a,
+                                      0x510e527f,
+                                      0x9b05688c,
+                                      0x1f83d9ab,
+                                      0x5be0cd19};
+
+static const uint32_t sha256_k[64] = {
+    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
+    0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
+    0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
+    0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
+    0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
+    0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2};
+
+/* SHA-256 implementation */
+void avb_sha256_init(AvbSHA256Ctx* ctx) {
+#ifndef UNROLL_LOOPS
+  int i;
+  for (i = 0; i < 8; i++) {
+    ctx->h[i] = sha256_h0[i];
+  }
+#else
+  ctx->h[0] = sha256_h0[0];
+  ctx->h[1] = sha256_h0[1];
+  ctx->h[2] = sha256_h0[2];
+  ctx->h[3] = sha256_h0[3];
+  ctx->h[4] = sha256_h0[4];
+  ctx->h[5] = sha256_h0[5];
+  ctx->h[6] = sha256_h0[6];
+  ctx->h[7] = sha256_h0[7];
+#endif /* !UNROLL_LOOPS */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA256_transform(AvbSHA256Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint32_t w[64];
+  uint32_t wv[8];
+  uint32_t t1, t2;
+  const unsigned char* sub_block;
+  int i;
+
+#ifndef UNROLL_LOOPS
+  int j;
+#endif
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 6);
+
+#ifndef UNROLL_LOOPS
+    for (j = 0; j < 16; j++) {
+      PACK32(&sub_block[j << 2], &w[j]);
+    }
+
+    for (j = 16; j < 64; j++) {
+      SHA256_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 64; j++) {
+      t1 = wv[7] + SHA256_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha256_k[j] +
+           w[j];
+      t2 = SHA256_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++) {
+      ctx->h[j] += wv[j];
+    }
+#else
+    PACK32(&sub_block[0], &w[0]);
+    PACK32(&sub_block[4], &w[1]);
+    PACK32(&sub_block[8], &w[2]);
+    PACK32(&sub_block[12], &w[3]);
+    PACK32(&sub_block[16], &w[4]);
+    PACK32(&sub_block[20], &w[5]);
+    PACK32(&sub_block[24], &w[6]);
+    PACK32(&sub_block[28], &w[7]);
+    PACK32(&sub_block[32], &w[8]);
+    PACK32(&sub_block[36], &w[9]);
+    PACK32(&sub_block[40], &w[10]);
+    PACK32(&sub_block[44], &w[11]);
+    PACK32(&sub_block[48], &w[12]);
+    PACK32(&sub_block[52], &w[13]);
+    PACK32(&sub_block[56], &w[14]);
+    PACK32(&sub_block[60], &w[15]);
+
+    SHA256_SCR(16);
+    SHA256_SCR(17);
+    SHA256_SCR(18);
+    SHA256_SCR(19);
+    SHA256_SCR(20);
+    SHA256_SCR(21);
+    SHA256_SCR(22);
+    SHA256_SCR(23);
+    SHA256_SCR(24);
+    SHA256_SCR(25);
+    SHA256_SCR(26);
+    SHA256_SCR(27);
+    SHA256_SCR(28);
+    SHA256_SCR(29);
+    SHA256_SCR(30);
+    SHA256_SCR(31);
+    SHA256_SCR(32);
+    SHA256_SCR(33);
+    SHA256_SCR(34);
+    SHA256_SCR(35);
+    SHA256_SCR(36);
+    SHA256_SCR(37);
+    SHA256_SCR(38);
+    SHA256_SCR(39);
+    SHA256_SCR(40);
+    SHA256_SCR(41);
+    SHA256_SCR(42);
+    SHA256_SCR(43);
+    SHA256_SCR(44);
+    SHA256_SCR(45);
+    SHA256_SCR(46);
+    SHA256_SCR(47);
+    SHA256_SCR(48);
+    SHA256_SCR(49);
+    SHA256_SCR(50);
+    SHA256_SCR(51);
+    SHA256_SCR(52);
+    SHA256_SCR(53);
+    SHA256_SCR(54);
+    SHA256_SCR(55);
+    SHA256_SCR(56);
+    SHA256_SCR(57);
+    SHA256_SCR(58);
+    SHA256_SCR(59);
+    SHA256_SCR(60);
+    SHA256_SCR(61);
+    SHA256_SCR(62);
+    SHA256_SCR(63);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 0);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 1);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 2);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 3);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 4);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 5);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 6);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 7);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 8);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 9);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 10);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 11);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 12);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 13);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 14);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 15);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 16);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 17);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 18);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 19);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 20);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 21);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 22);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 23);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 24);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 25);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 26);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 27);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 28);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 29);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 30);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 31);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 32);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 33);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 34);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 35);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 36);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 37);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 38);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 39);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 40);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 41);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 42);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 43);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 44);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 45);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 46);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 47);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 48);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 49);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 50);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 51);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 52);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 53);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 54);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 55);
+    SHA256_EXP(0, 1, 2, 3, 4, 5, 6, 7, 56);
+    SHA256_EXP(7, 0, 1, 2, 3, 4, 5, 6, 57);
+    SHA256_EXP(6, 7, 0, 1, 2, 3, 4, 5, 58);
+    SHA256_EXP(5, 6, 7, 0, 1, 2, 3, 4, 59);
+    SHA256_EXP(4, 5, 6, 7, 0, 1, 2, 3, 60);
+    SHA256_EXP(3, 4, 5, 6, 7, 0, 1, 2, 61);
+    SHA256_EXP(2, 3, 4, 5, 6, 7, 0, 1, 62);
+    SHA256_EXP(1, 2, 3, 4, 5, 6, 7, 0, 63);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#endif /* !UNROLL_LOOPS */
+  }
+}
+
+void avb_sha256_update(AvbSHA256Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA256_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA256_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA256_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA256_transform(ctx, ctx->block, 1);
+  SHA256_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA256_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 6], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 6;
+}
+
+uint8_t* avb_sha256_final(AvbSHA256Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+#ifndef UNROLL_LOOPS
+  int i;
+#endif
+
+  block_nb =
+      (1 + ((AVB_SHA256_BLOCK_SIZE - 9) < (ctx->len % AVB_SHA256_BLOCK_SIZE)));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 6;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA256_transform(ctx, ctx->block, block_nb);
+
+#ifndef UNROLL_LOOPS
+  for (i = 0; i < 8; i++) {
+    UNPACK32(ctx->h[i], &ctx->buf[i << 2]);
+  }
+#else
+  UNPACK32(ctx->h[0], &ctx->buf[0]);
+  UNPACK32(ctx->h[1], &ctx->buf[4]);
+  UNPACK32(ctx->h[2], &ctx->buf[8]);
+  UNPACK32(ctx->h[3], &ctx->buf[12]);
+  UNPACK32(ctx->h[4], &ctx->buf[16]);
+  UNPACK32(ctx->h[5], &ctx->buf[20]);
+  UNPACK32(ctx->h[6], &ctx->buf[24]);
+  UNPACK32(ctx->h[7], &ctx->buf[28]);
+#endif /* !UNROLL_LOOPS */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/rk_libavb/avb_sha512.c b/lib/avb/rk_libavb/avb_sha512.c
new file mode 100644
index 0000000000..cb4a2eeb41
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_sha512.c
@@ -0,0 +1,388 @@
+/* SHA-256 and SHA-512 implementation based on code by Oliver Gay
+ * <olivier.gay@a3.epfl.ch> under a BSD-style license. See below.
+ */
+
+/*
+ * FIPS 180-2 SHA-224/256/384/512 implementation
+ * Last update: 02/02/2007
+ * Issue date:  04/30/2005
+ *
+ * Copyright (C) 2005, 2007 Olivier Gay <olivier.gay@a3.epfl.ch>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <android_avb/avb_sha.h>
+
+#define SHFR(x, n) (x >> n)
+#define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
+#define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
+#define CH(x, y, z) ((x & y) ^ (~x & z))
+#define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z))
+
+#define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
+#define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
+#define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7))
+#define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6))
+
+#define UNPACK32(x, str)                 \
+  {                                      \
+    *((str) + 3) = (uint8_t)((x));       \
+    *((str) + 2) = (uint8_t)((x) >> 8);  \
+    *((str) + 1) = (uint8_t)((x) >> 16); \
+    *((str) + 0) = (uint8_t)((x) >> 24); \
+  }
+
+#define UNPACK64(x, str)                         \
+  {                                              \
+    *((str) + 7) = (uint8_t)x;                   \
+    *((str) + 6) = (uint8_t)((uint64_t)x >> 8);  \
+    *((str) + 5) = (uint8_t)((uint64_t)x >> 16); \
+    *((str) + 4) = (uint8_t)((uint64_t)x >> 24); \
+    *((str) + 3) = (uint8_t)((uint64_t)x >> 32); \
+    *((str) + 2) = (uint8_t)((uint64_t)x >> 40); \
+    *((str) + 1) = (uint8_t)((uint64_t)x >> 48); \
+    *((str) + 0) = (uint8_t)((uint64_t)x >> 56); \
+  }
+
+#define PACK64(str, x)                                                        \
+  {                                                                           \
+    *(x) =                                                                    \
+        ((uint64_t) * ((str) + 7)) | ((uint64_t) * ((str) + 6) << 8) |        \
+        ((uint64_t) * ((str) + 5) << 16) | ((uint64_t) * ((str) + 4) << 24) | \
+        ((uint64_t) * ((str) + 3) << 32) | ((uint64_t) * ((str) + 2) << 40) | \
+        ((uint64_t) * ((str) + 1) << 48) | ((uint64_t) * ((str) + 0) << 56);  \
+  }
+
+/* Macros used for loops unrolling */
+
+#define SHA512_SCR(i) \
+  { w[i] = SHA512_F4(w[i - 2]) + w[i - 7] + SHA512_F3(w[i - 15]) + w[i - 16]; }
+
+#define SHA512_EXP(a, b, c, d, e, f, g, h, j)                               \
+  {                                                                         \
+    t1 = wv[h] + SHA512_F2(wv[e]) + CH(wv[e], wv[f], wv[g]) + sha512_k[j] + \
+         w[j];                                                              \
+    t2 = SHA512_F1(wv[a]) + MAJ(wv[a], wv[b], wv[c]);                       \
+    wv[d] += t1;                                                            \
+    wv[h] = t1 + t2;                                                        \
+  }
+
+static const uint64_t sha512_h0[8] = {0x6a09e667f3bcc908ULL,
+                                      0xbb67ae8584caa73bULL,
+                                      0x3c6ef372fe94f82bULL,
+                                      0xa54ff53a5f1d36f1ULL,
+                                      0x510e527fade682d1ULL,
+                                      0x9b05688c2b3e6c1fULL,
+                                      0x1f83d9abfb41bd6bULL,
+                                      0x5be0cd19137e2179ULL};
+
+static const uint64_t sha512_k[80] = {
+    0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL,
+    0xe9b5dba58189dbbcULL, 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL,
+    0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, 0xd807aa98a3030242ULL,
+    0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL,
+    0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL,
+    0xc19bf174cf692694ULL, 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL,
+    0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, 0x2de92c6f592b0275ULL,
+    0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL,
+    0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL,
+    0xbf597fc7beef0ee4ULL, 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL,
+    0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, 0x27b70a8546d22ffcULL,
+    0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL,
+    0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL,
+    0x92722c851482353bULL, 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL,
+    0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, 0xd192e819d6ef5218ULL,
+    0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL,
+    0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL,
+    0x34b0bcb5e19b48a8ULL, 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL,
+    0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, 0x748f82ee5defb2fcULL,
+    0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL,
+    0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL,
+    0xc67178f2e372532bULL, 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL,
+    0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, 0x06f067aa72176fbaULL,
+    0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL,
+    0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL,
+    0x431d67c49c100d4cULL, 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL,
+    0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL};
+
+/* SHA-512 implementation */
+
+void avb_sha512_init(AvbSHA512Ctx* ctx) {
+#ifdef UNROLL_LOOPS_SHA512
+  ctx->h[0] = sha512_h0[0];
+  ctx->h[1] = sha512_h0[1];
+  ctx->h[2] = sha512_h0[2];
+  ctx->h[3] = sha512_h0[3];
+  ctx->h[4] = sha512_h0[4];
+  ctx->h[5] = sha512_h0[5];
+  ctx->h[6] = sha512_h0[6];
+  ctx->h[7] = sha512_h0[7];
+#else
+  int i;
+
+  for (i = 0; i < 8; i++)
+    ctx->h[i] = sha512_h0[i];
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  ctx->len = 0;
+  ctx->tot_len = 0;
+}
+
+static void SHA512_transform(AvbSHA512Ctx* ctx,
+                             const uint8_t* message,
+                             unsigned int block_nb) {
+  uint64_t w[80];
+  uint64_t wv[8];
+  uint64_t t1, t2;
+  const uint8_t* sub_block;
+  int i, j;
+
+  for (i = 0; i < (int)block_nb; i++) {
+    sub_block = message + (i << 7);
+
+#ifdef UNROLL_LOOPS_SHA512
+    PACK64(&sub_block[0], &w[0]);
+    PACK64(&sub_block[8], &w[1]);
+    PACK64(&sub_block[16], &w[2]);
+    PACK64(&sub_block[24], &w[3]);
+    PACK64(&sub_block[32], &w[4]);
+    PACK64(&sub_block[40], &w[5]);
+    PACK64(&sub_block[48], &w[6]);
+    PACK64(&sub_block[56], &w[7]);
+    PACK64(&sub_block[64], &w[8]);
+    PACK64(&sub_block[72], &w[9]);
+    PACK64(&sub_block[80], &w[10]);
+    PACK64(&sub_block[88], &w[11]);
+    PACK64(&sub_block[96], &w[12]);
+    PACK64(&sub_block[104], &w[13]);
+    PACK64(&sub_block[112], &w[14]);
+    PACK64(&sub_block[120], &w[15]);
+
+    SHA512_SCR(16);
+    SHA512_SCR(17);
+    SHA512_SCR(18);
+    SHA512_SCR(19);
+    SHA512_SCR(20);
+    SHA512_SCR(21);
+    SHA512_SCR(22);
+    SHA512_SCR(23);
+    SHA512_SCR(24);
+    SHA512_SCR(25);
+    SHA512_SCR(26);
+    SHA512_SCR(27);
+    SHA512_SCR(28);
+    SHA512_SCR(29);
+    SHA512_SCR(30);
+    SHA512_SCR(31);
+    SHA512_SCR(32);
+    SHA512_SCR(33);
+    SHA512_SCR(34);
+    SHA512_SCR(35);
+    SHA512_SCR(36);
+    SHA512_SCR(37);
+    SHA512_SCR(38);
+    SHA512_SCR(39);
+    SHA512_SCR(40);
+    SHA512_SCR(41);
+    SHA512_SCR(42);
+    SHA512_SCR(43);
+    SHA512_SCR(44);
+    SHA512_SCR(45);
+    SHA512_SCR(46);
+    SHA512_SCR(47);
+    SHA512_SCR(48);
+    SHA512_SCR(49);
+    SHA512_SCR(50);
+    SHA512_SCR(51);
+    SHA512_SCR(52);
+    SHA512_SCR(53);
+    SHA512_SCR(54);
+    SHA512_SCR(55);
+    SHA512_SCR(56);
+    SHA512_SCR(57);
+    SHA512_SCR(58);
+    SHA512_SCR(59);
+    SHA512_SCR(60);
+    SHA512_SCR(61);
+    SHA512_SCR(62);
+    SHA512_SCR(63);
+    SHA512_SCR(64);
+    SHA512_SCR(65);
+    SHA512_SCR(66);
+    SHA512_SCR(67);
+    SHA512_SCR(68);
+    SHA512_SCR(69);
+    SHA512_SCR(70);
+    SHA512_SCR(71);
+    SHA512_SCR(72);
+    SHA512_SCR(73);
+    SHA512_SCR(74);
+    SHA512_SCR(75);
+    SHA512_SCR(76);
+    SHA512_SCR(77);
+    SHA512_SCR(78);
+    SHA512_SCR(79);
+
+    wv[0] = ctx->h[0];
+    wv[1] = ctx->h[1];
+    wv[2] = ctx->h[2];
+    wv[3] = ctx->h[3];
+    wv[4] = ctx->h[4];
+    wv[5] = ctx->h[5];
+    wv[6] = ctx->h[6];
+    wv[7] = ctx->h[7];
+
+    j = 0;
+
+    do {
+      SHA512_EXP(0, 1, 2, 3, 4, 5, 6, 7, j);
+      j++;
+      SHA512_EXP(7, 0, 1, 2, 3, 4, 5, 6, j);
+      j++;
+      SHA512_EXP(6, 7, 0, 1, 2, 3, 4, 5, j);
+      j++;
+      SHA512_EXP(5, 6, 7, 0, 1, 2, 3, 4, j);
+      j++;
+      SHA512_EXP(4, 5, 6, 7, 0, 1, 2, 3, j);
+      j++;
+      SHA512_EXP(3, 4, 5, 6, 7, 0, 1, 2, j);
+      j++;
+      SHA512_EXP(2, 3, 4, 5, 6, 7, 0, 1, j);
+      j++;
+      SHA512_EXP(1, 2, 3, 4, 5, 6, 7, 0, j);
+      j++;
+    } while (j < 80);
+
+    ctx->h[0] += wv[0];
+    ctx->h[1] += wv[1];
+    ctx->h[2] += wv[2];
+    ctx->h[3] += wv[3];
+    ctx->h[4] += wv[4];
+    ctx->h[5] += wv[5];
+    ctx->h[6] += wv[6];
+    ctx->h[7] += wv[7];
+#else
+    for (j = 0; j < 16; j++) {
+      PACK64(&sub_block[j << 3], &w[j]);
+    }
+
+    for (j = 16; j < 80; j++) {
+      SHA512_SCR(j);
+    }
+
+    for (j = 0; j < 8; j++) {
+      wv[j] = ctx->h[j];
+    }
+
+    for (j = 0; j < 80; j++) {
+      t1 = wv[7] + SHA512_F2(wv[4]) + CH(wv[4], wv[5], wv[6]) + sha512_k[j] +
+           w[j];
+      t2 = SHA512_F1(wv[0]) + MAJ(wv[0], wv[1], wv[2]);
+      wv[7] = wv[6];
+      wv[6] = wv[5];
+      wv[5] = wv[4];
+      wv[4] = wv[3] + t1;
+      wv[3] = wv[2];
+      wv[2] = wv[1];
+      wv[1] = wv[0];
+      wv[0] = t1 + t2;
+    }
+
+    for (j = 0; j < 8; j++)
+      ctx->h[j] += wv[j];
+#endif /* UNROLL_LOOPS_SHA512 */
+  }
+}
+
+void avb_sha512_update(AvbSHA512Ctx* ctx, const uint8_t* data, uint32_t len) {
+  unsigned int block_nb;
+  unsigned int new_len, rem_len, tmp_len;
+  const uint8_t* shifted_data;
+
+  tmp_len = AVB_SHA512_BLOCK_SIZE - ctx->len;
+  rem_len = len < tmp_len ? len : tmp_len;
+
+  avb_memcpy(&ctx->block[ctx->len], data, rem_len);
+
+  if (ctx->len + len < AVB_SHA512_BLOCK_SIZE) {
+    ctx->len += len;
+    return;
+  }
+
+  new_len = len - rem_len;
+  block_nb = new_len / AVB_SHA512_BLOCK_SIZE;
+
+  shifted_data = data + rem_len;
+
+  SHA512_transform(ctx, ctx->block, 1);
+  SHA512_transform(ctx, shifted_data, block_nb);
+
+  rem_len = new_len % AVB_SHA512_BLOCK_SIZE;
+
+  avb_memcpy(ctx->block, &shifted_data[block_nb << 7], rem_len);
+
+  ctx->len = rem_len;
+  ctx->tot_len += (block_nb + 1) << 7;
+}
+
+uint8_t* avb_sha512_final(AvbSHA512Ctx* ctx) {
+  unsigned int block_nb;
+  unsigned int pm_len;
+  unsigned int len_b;
+
+#ifndef UNROLL_LOOPS_SHA512
+  int i;
+#endif
+
+  block_nb =
+      1 + ((AVB_SHA512_BLOCK_SIZE - 17) < (ctx->len % AVB_SHA512_BLOCK_SIZE));
+
+  len_b = (ctx->tot_len + ctx->len) << 3;
+  pm_len = block_nb << 7;
+
+  avb_memset(ctx->block + ctx->len, 0, pm_len - ctx->len);
+  ctx->block[ctx->len] = 0x80;
+  UNPACK32(len_b, ctx->block + pm_len - 4);
+
+  SHA512_transform(ctx, ctx->block, block_nb);
+
+#ifdef UNROLL_LOOPS_SHA512
+  UNPACK64(ctx->h[0], &ctx->buf[0]);
+  UNPACK64(ctx->h[1], &ctx->buf[8]);
+  UNPACK64(ctx->h[2], &ctx->buf[16]);
+  UNPACK64(ctx->h[3], &ctx->buf[24]);
+  UNPACK64(ctx->h[4], &ctx->buf[32]);
+  UNPACK64(ctx->h[5], &ctx->buf[40]);
+  UNPACK64(ctx->h[6], &ctx->buf[48]);
+  UNPACK64(ctx->h[7], &ctx->buf[56]);
+#else
+  for (i = 0; i < 8; i++)
+    UNPACK64(ctx->h[i], &ctx->buf[i << 3]);
+#endif /* UNROLL_LOOPS_SHA512 */
+
+  return ctx->buf;
+}
diff --git a/lib/avb/rk_libavb/avb_slot_verify.c b/lib/avb/rk_libavb/avb_slot_verify.c
new file mode 100644
index 0000000000..aab33d9657
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_slot_verify.c
@@ -0,0 +1,1465 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_slot_verify.h>
+#include <android_avb/avb_chain_partition_descriptor.h>
+#include <android_avb/avb_footer.h>
+#include <android_avb/avb_hash_descriptor.h>
+#include <android_avb/avb_kernel_cmdline_descriptor.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_version.h>
+
+/* Maximum allow length (in bytes) of a partition name, including
+ * ab_suffix.
+ */
+#define PART_NAME_MAX_SIZE 32
+
+/* Maximum number of partitions that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_LOADED_PARTITIONS 32
+
+/* Maximum number of vbmeta images that can be loaded with avb_slot_verify(). */
+#define MAX_NUMBER_OF_VBMETA_IMAGES 32
+
+/* Maximum size of a vbmeta image - 64 KiB. */
+#define VBMETA_MAX_SIZE (64 * 1024)
+
+/* Helper function to see if we should continue with verification in
+ * allow_verification_error=true mode if something goes wrong. See the
+ * comments for the avb_slot_verify() function for more information.
+ */
+static inline bool result_should_continue(AvbSlotVerifyResult result)
+{
+	switch (result) {
+	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+		return false;
+
+	case AVB_SLOT_VERIFY_RESULT_OK:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+		return true;
+  }
+
+  return false;
+}
+
+static AvbSlotVerifyResult load_and_verify_hash_partition(
+    AvbOps* ops,
+    const char* const* requested_partitions,
+    const char* ab_suffix,
+    bool allow_verification_error,
+    const AvbDescriptor* descriptor,
+    AvbSlotVerifyData* slot_data)
+{
+	AvbHashDescriptor hash_desc;
+	const uint8_t* desc_partition_name = NULL;
+	const uint8_t* desc_salt;
+	const uint8_t* desc_digest;
+	char part_name[PART_NAME_MAX_SIZE];
+	AvbSlotVerifyResult ret;
+	AvbIOResult io_ret;
+	uint8_t* image_buf = NULL;
+	size_t part_num_read;
+	uint8_t* digest;
+	size_t digest_len;
+	const char* found;
+	uint64_t image_size;
+
+	if (!avb_hash_descriptor_validate_and_byteswap(
+		(const AvbHashDescriptor*)descriptor, &hash_desc)) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+	desc_partition_name = ((const uint8_t*)descriptor) + sizeof(AvbHashDescriptor);
+	desc_salt = desc_partition_name + hash_desc.partition_name_len;
+	desc_digest = desc_salt + hash_desc.salt_len;
+
+	if (!avb_validate_utf8(desc_partition_name, hash_desc.partition_name_len)) {
+		avb_error("Partition name is not valid UTF-8.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+	/* Don't bother loading or validating unless the partition was
+	 * requested in the first place.
+	 */
+	found = avb_strv_find_str(requested_partitions,
+                            (const char*)desc_partition_name,
+                            hash_desc.partition_name_len);
+	if (found == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_OK;
+		goto out;
+	}
+	if (!avb_str_concat(part_name,
+                      sizeof part_name,
+                      (const char*)desc_partition_name,
+                      hash_desc.partition_name_len,
+                      ab_suffix,
+                      avb_strlen(ab_suffix))) {
+		avb_error("Partition name and suffix does not fit.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+	/* If we're allowing verification errors then hash_desc.image_size
+	 * may no longer match what's in the partition... so in this case
+	 * just load the entire partition.
+	 *
+	 * For example, this can happen if a developer does 'fastboot flash
+	 * boot /path/to/new/and/bigger/boot.img'. We want this to work
+	 * since it's such a common workflow.
+	 */
+	image_size = hash_desc.image_size;
+	if (allow_verification_error) {
+		if (ops->get_size_of_partition == NULL) {
+			avb_errorv(part_name,
+			": The get_size_of_partition() operation is "
+			"not implemented so we may not load the entire partition. "
+			"Please implement.",
+			NULL);
+		} else {
+			io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+				goto out;
+			} else if (io_ret != AVB_IO_RESULT_OK) {
+				avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+				goto out;
+			}
+			avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+		}
+	}
+	image_buf = avb_malloc(image_size);
+	if (image_buf == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	}
+	io_ret = ops->read_from_partition(ops, part_name, 0 /* offset */, 
+					image_size, image_buf, &part_num_read);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (part_num_read != image_size) {
+		avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+		goto out;
+	}
+
+	if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha256") == 0) {
+		AvbSHA256Ctx sha256_ctx;
+		avb_sha256_init(&sha256_ctx);
+		avb_sha256_update(&sha256_ctx, desc_salt, hash_desc.salt_len);
+		avb_sha256_update(&sha256_ctx, image_buf, hash_desc.image_size);
+		digest = avb_sha256_final(&sha256_ctx);
+		digest_len = AVB_SHA256_DIGEST_SIZE;
+	} else if (avb_strcmp((const char*)hash_desc.hash_algorithm, "sha512") == 0) {
+		AvbSHA512Ctx sha512_ctx;
+		avb_sha512_init(&sha512_ctx);
+		avb_sha512_update(&sha512_ctx, desc_salt, hash_desc.salt_len);
+		avb_sha512_update(&sha512_ctx, image_buf, hash_desc.image_size);
+		digest = avb_sha512_final(&sha512_ctx);
+		digest_len = AVB_SHA512_DIGEST_SIZE;
+	} else {
+		avb_errorv(part_name, ": Unsupported hash algorithm.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	if (digest_len != hash_desc.digest_len) {
+		avb_errorv(
+			part_name, ": Digest in descriptor not of expected size.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	if (avb_safe_memcmp(digest, desc_digest, digest_len) != 0) {
+		avb_errorv(part_name,
+			": Hash of data does not match digest in descriptor.\n",
+			NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+		goto out;
+	}
+
+	ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+	/* If it worked and something was loaded, copy to slot_data. */
+	if ((ret == AVB_SLOT_VERIFY_RESULT_OK || result_should_continue(ret)) &&
+		image_buf != NULL) {
+		AvbPartitionData* loaded_partition;
+		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto fail;
+		}
+		loaded_partition = &slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+		loaded_partition->partition_name = avb_strdup(found);
+		loaded_partition->data_size = image_size;
+		loaded_partition->data = image_buf;
+		image_buf = NULL;
+	}
+
+fail:
+	if (image_buf != NULL) {
+		avb_free(image_buf);
+	}
+	return ret;
+}
+
+static AvbSlotVerifyResult load_requested_partitions(
+	AvbOps* ops,
+	const char* const* requested_partitions,
+	const char* ab_suffix,
+	AvbSlotVerifyData* slot_data)
+{
+	AvbSlotVerifyResult ret;
+	uint8_t* image_buf = NULL;
+	size_t n;
+
+	if (ops->get_size_of_partition == NULL) {
+		avb_error("get_size_of_partition() not implemented.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+		goto out;
+	}
+
+	for (n = 0; requested_partitions[n] != NULL; n++) {
+		char part_name[PART_NAME_MAX_SIZE];
+		AvbIOResult io_ret;
+		uint64_t image_size;
+		size_t part_num_read;
+		AvbPartitionData* loaded_partition;
+
+		if (!avb_str_concat(part_name,
+                        sizeof part_name,
+                        requested_partitions[n],
+                        avb_strlen(requested_partitions[n]),
+                        ab_suffix,
+                        avb_strlen(ab_suffix))) {
+ 			avb_error("Partition name and suffix does not fit.\n");
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		io_ret = ops->get_size_of_partition(ops, part_name, &image_size);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_errorv(part_name, ": Error determining partition size.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+		avb_debugv(part_name, ": Loading entire partition.\n", NULL);
+
+		image_buf = avb_malloc(image_size);
+		if (image_buf == NULL) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		}
+
+		io_ret = ops->read_from_partition(
+		ops, part_name, 0 /* offset */, image_size, image_buf, &part_num_read);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_errorv(part_name, ": Error loading data from partition.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+		if (part_num_read != image_size) {
+			avb_errorv(part_name, ": Read fewer than requested bytes.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+
+		/* Move to slot_data. */
+		if (slot_data->num_loaded_partitions == MAX_NUMBER_OF_LOADED_PARTITIONS) {
+			avb_errorv(part_name, ": Too many loaded partitions.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		}
+		loaded_partition =
+			&slot_data->loaded_partitions[slot_data->num_loaded_partitions++];
+		loaded_partition->partition_name = avb_strdup(requested_partitions[n]);
+		if (loaded_partition->partition_name == NULL) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		}
+		loaded_partition->data_size = image_size;
+		loaded_partition->data = image_buf;
+		image_buf = NULL;
+	}
+
+	ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+	if (image_buf != NULL) {
+		avb_free(image_buf);
+	}
+	return ret;
+}
+
+static AvbSlotVerifyResult load_and_verify_vbmeta
+(
+	AvbOps* ops,
+	const char* const* requested_partitions,
+	const char* ab_suffix,
+	bool allow_verification_error,
+	AvbVBMetaImageFlags toplevel_vbmeta_flags,
+	int rollback_index_location,
+	const char* partition_name,
+	size_t partition_name_len,
+	const uint8_t* expected_public_key,
+	size_t expected_public_key_length,
+	AvbSlotVerifyData* slot_data,
+	AvbAlgorithmType* out_algorithm_type)
+{
+	char full_partition_name[PART_NAME_MAX_SIZE];
+	AvbSlotVerifyResult ret;
+	AvbIOResult io_ret;
+	size_t vbmeta_offset;
+	size_t vbmeta_size;
+	uint8_t* vbmeta_buf = NULL;
+	size_t vbmeta_num_read;
+	AvbVBMetaVerifyResult vbmeta_ret;
+	const uint8_t* pk_data;
+	size_t pk_len;
+	AvbVBMetaImageHeader vbmeta_header;
+	uint64_t stored_rollback_index;
+	const AvbDescriptor** descriptors = NULL;
+	size_t num_descriptors;
+	size_t n;
+	bool is_main_vbmeta;
+	bool is_vbmeta_partition;
+	AvbVBMetaData* vbmeta_image_data = NULL;
+
+	ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+	avb_assert(slot_data != NULL);
+
+	/* Since we allow top-level vbmeta in 'boot', use
+	 * rollback_index_location to determine whether we're the main
+	 * vbmeta struct.
+	 */
+	is_main_vbmeta = (rollback_index_location == 0);
+	is_vbmeta_partition = (avb_strcmp(partition_name, "vbmeta") == 0);
+
+	if (!avb_validate_utf8((const uint8_t*)partition_name, partition_name_len)) {
+		avb_error("Partition name is not valid UTF-8.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	/* Construct full partition name. */
+	if (!avb_str_concat(full_partition_name,
+		sizeof full_partition_name,
+		partition_name,
+		partition_name_len,
+		ab_suffix,
+		avb_strlen(ab_suffix))) {
+		avb_error("Partition name and suffix does not fit.\n");
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	avb_debugv("Loading vbmeta struct from partition '",
+		full_partition_name,
+		"'.\n",
+		NULL);
+
+	/* If we're loading from the main vbmeta partition, the vbmeta
+	 * struct is in the beginning. Otherwise we have to locate it via a
+	 * footer.
+	 */
+	if (is_vbmeta_partition) {
+		vbmeta_offset = 0;
+		vbmeta_size = VBMETA_MAX_SIZE;
+	} else {
+		uint8_t footer_buf[AVB_FOOTER_SIZE];
+		size_t footer_num_read;
+		AvbFooter footer;
+
+		io_ret = ops->read_from_partition(ops,
+					full_partition_name,
+					-AVB_FOOTER_SIZE,
+					AVB_FOOTER_SIZE,
+					footer_buf,
+					&footer_num_read);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto out;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_errorv(full_partition_name, ": Error loading footer.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+		avb_assert(footer_num_read == AVB_FOOTER_SIZE);
+
+		if (!avb_footer_validate_and_byteswap((const AvbFooter*)footer_buf,&footer)) {
+			avb_errorv(full_partition_name, ": Error validating footer.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		/* Basic footer sanity check since the data is untrusted. */
+		if (footer.vbmeta_size > VBMETA_MAX_SIZE) {
+			avb_errorv(full_partition_name, ": Invalid vbmeta size in footer.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		vbmeta_offset = footer.vbmeta_offset;
+		vbmeta_size = footer.vbmeta_size;
+	}
+
+	vbmeta_buf = avb_malloc(vbmeta_size);
+	if (vbmeta_buf == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	}
+	io_ret = ops->read_from_partition(ops,
+					full_partition_name,
+					vbmeta_offset,
+					vbmeta_size,
+					vbmeta_buf,
+					&vbmeta_num_read);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		/* If we're looking for 'vbmeta' but there is no such partition,
+		* go try to get it from the boot partition instead.
+		*/
+		if (is_main_vbmeta && io_ret == AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION && is_vbmeta_partition) {
+			avb_debugv(full_partition_name,
+			": No such partition. Trying 'boot' instead.\n",
+			NULL);
+			ret = load_and_verify_vbmeta(ops,
+					requested_partitions,
+					ab_suffix,
+					allow_verification_error,
+					0 /* toplevel_vbmeta_flags */,
+					0 /* rollback_index_location */,
+					"boot",
+					avb_strlen("boot"),
+					NULL /* expected_public_key */,
+					0 /* expected_public_key_length */,
+					slot_data,
+					out_algorithm_type);
+			goto out;
+		} else {
+			avb_errorv(full_partition_name, ": Error loading vbmeta data.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+			goto out;
+		}
+	}
+	avb_assert(vbmeta_num_read <= vbmeta_size);
+	/* Check if the image is properly signed and get the public key used
+	 * to sign the image.
+	 */
+	vbmeta_ret = avb_vbmeta_image_verify(vbmeta_buf, vbmeta_num_read, &pk_data, &pk_len);
+	switch (vbmeta_ret) {
+	case AVB_VBMETA_VERIFY_RESULT_OK:
+		avb_assert(pk_data != NULL && pk_len > 0);
+		break;
+
+	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION;
+		avb_errorv(full_partition_name,
+			": Error verifying vbmeta image: ",
+			avb_vbmeta_verify_result_to_string(vbmeta_ret),
+			"\n",
+			NULL);
+		if (!allow_verification_error) {
+			goto out;
+		}
+		break;
+
+	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+		/* No way to continue this case. */
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		avb_errorv(full_partition_name,
+			": Error verifying vbmeta image: invalid vbmeta header\n",
+			NULL);
+		goto out;
+
+	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+		/* No way to continue this case. */
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION;
+		avb_errorv(full_partition_name,
+			": Error verifying vbmeta image: unsupported AVB version\n",
+			NULL);
+		goto out;
+	}
+
+	/* Byteswap the header. */
+	avb_vbmeta_image_header_to_host_byte_order((AvbVBMetaImageHeader*)vbmeta_buf,
+                                             &vbmeta_header);
+
+	/* If we're the toplevel, assign flags so they'll be passed down. */
+	if (is_main_vbmeta) {
+		toplevel_vbmeta_flags = (AvbVBMetaImageFlags)vbmeta_header.flags;
+	} else {
+		if (vbmeta_header.flags != 0) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			avb_errorv(full_partition_name,
+				": chained vbmeta image has non-zero flags\n",
+				NULL);
+			goto out;
+		}
+	}
+
+	/* Check if key used to make signature matches what is expected. */
+	if (pk_data != NULL) {
+		if (expected_public_key != NULL) {
+			avb_assert(!is_main_vbmeta);
+			if (expected_public_key_length != pk_len ||
+			avb_safe_memcmp(expected_public_key, pk_data, pk_len) != 0) {
+				avb_errorv(full_partition_name,
+					": Public key used to sign data does not match key in chain "
+					"partition descriptor.\n",
+					NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+				if (!allow_verification_error) {
+					goto out;
+				}
+			}
+		} else {
+			bool key_is_trusted = false;
+			const uint8_t* pk_metadata = NULL;
+			size_t pk_metadata_len = 0;
+
+			if (vbmeta_header.public_key_metadata_size > 0) {
+				pk_metadata = vbmeta_buf + sizeof(AvbVBMetaImageHeader) +
+				vbmeta_header.authentication_data_block_size +
+				vbmeta_header.public_key_metadata_offset;
+				pk_metadata_len = vbmeta_header.public_key_metadata_size;
+			}
+
+			avb_assert(is_main_vbmeta);
+			io_ret = ops->validate_vbmeta_public_key(
+				ops, pk_data, pk_len, pk_metadata, pk_metadata_len, &key_is_trusted);
+			if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+				goto out;
+			} else if (io_ret != AVB_IO_RESULT_OK) {
+				avb_errorv(full_partition_name,
+				": Error while checking public key used to sign data.\n",
+				NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+				goto out;
+			}
+			if (!key_is_trusted) {
+				avb_errorv(full_partition_name,
+				": Public key used to sign data rejected.\n",
+				NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED;
+				if (!allow_verification_error) {
+					goto out;
+				}
+			}
+		}
+	}
+
+	/* Check rollback index. */
+	io_ret = ops->read_rollback_index(
+		ops, rollback_index_location, &stored_rollback_index);
+	if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	} else if (io_ret != AVB_IO_RESULT_OK) {
+		avb_errorv(full_partition_name,
+			": Error getting rollback index for location.\n",
+			NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+		goto out;
+	}
+	if (vbmeta_header.rollback_index < stored_rollback_index) {
+		avb_errorv(
+			full_partition_name,
+			": Image rollback index is less than the stored rollback index.\n",
+			NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX;
+		if (!allow_verification_error) {
+			goto out;
+		}
+	}
+
+	/* Copy vbmeta to vbmeta_images before recursing. */
+	if (is_main_vbmeta) {
+		avb_assert(slot_data->num_vbmeta_images == 0);
+	} else {
+		avb_assert(slot_data->num_vbmeta_images > 0);
+	}
+	if (slot_data->num_vbmeta_images == MAX_NUMBER_OF_VBMETA_IMAGES) {
+		avb_errorv(full_partition_name, ": Too many vbmeta images.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto out;
+	}
+	vbmeta_image_data = &slot_data->vbmeta_images[slot_data->num_vbmeta_images++];
+	vbmeta_image_data->partition_name = avb_strdup(partition_name);
+	vbmeta_image_data->vbmeta_data = vbmeta_buf;
+	/* Note that |vbmeta_buf| is actually |vbmeta_num_read| bytes long
+	 * and this includes data past the end of the image. Pass the
+	 * actual size of the vbmeta image. Also, no need to use
+	 * avb_safe_add() since the header has already been verified.
+	 */
+	vbmeta_image_data->vbmeta_size =
+	sizeof(AvbVBMetaImageHeader) +
+	vbmeta_header.authentication_data_block_size +
+	vbmeta_header.auxiliary_data_block_size;
+	vbmeta_image_data->verify_result = vbmeta_ret;
+  /* If verification has been disabled by setting a bit in the image,
+   * we're done... except that we need to load the entirety of the
+   * requested partitions.
+   */
+  if (vbmeta_header.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+    AvbSlotVerifyResult sub_ret;
+    avb_debugv(
+        full_partition_name, ": VERIFICATION_DISABLED bit is set.\n", NULL);
+    /* If load_requested_partitions() fail it is always a fatal
+     * failure (e.g. ERROR_INVALID_ARGUMENT, ERROR_OOM, etc.) rather
+     * than recoverable (e.g. one where result_should_continue()
+     * returns true) and we want to convey that error.
+     */
+    sub_ret = load_requested_partitions(
+        ops, requested_partitions, ab_suffix, slot_data);
+    if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+      ret = sub_ret;
+    }
+    goto out;
+  }
+	/* Now go through all descriptors and take the appropriate action:
+	 *
+	 * - hash descriptor: Load data from partition, calculate hash, and
+	 *   checks that it matches what's in the hash descriptor.
+	 *
+	 * - hashtree descriptor: Do nothing since verification happens
+	 *   on-the-fly from within the OS.
+	 *
+	 * - chained partition descriptor: Load the footer, load the vbmeta
+	 *   image, verify vbmeta image (includes rollback checks, hash
+	 *   checks, bail on chained partitions).
+	 */
+	descriptors =
+	avb_descriptor_get_all(vbmeta_buf, vbmeta_num_read, &num_descriptors);
+	for (n = 0; n < num_descriptors; n++) {
+		AvbDescriptor desc;
+
+		if (!avb_descriptor_validate_and_byteswap(descriptors[n], &desc)) {
+			avb_errorv(full_partition_name, ": Descriptor is invalid.\n", NULL);
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+			goto out;
+		}
+
+		switch (desc.tag) {
+		case AVB_DESCRIPTOR_TAG_HASH: {
+			AvbSlotVerifyResult sub_ret;
+			sub_ret = load_and_verify_hash_partition(ops,
+                                                 requested_partitions,
+                                                 ab_suffix,
+                                                 allow_verification_error,
+                                                 descriptors[n],
+                                                 slot_data);
+			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+				ret = sub_ret;
+				if (!allow_verification_error || !result_should_continue(ret)) {
+					goto out;
+				}
+			}
+		} break;
+
+		case AVB_DESCRIPTOR_TAG_CHAIN_PARTITION: {
+			AvbSlotVerifyResult sub_ret;
+			AvbChainPartitionDescriptor chain_desc;
+			const uint8_t* chain_partition_name;
+			const uint8_t* chain_public_key;
+
+			/* Only allow CHAIN_PARTITION descriptors in the main vbmeta image. */
+			if (!is_main_vbmeta) {
+				avb_errorv(full_partition_name,
+                     			": Encountered chain descriptor not in main image.\n",
+                     			NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			if (!avb_chain_partition_descriptor_validate_and_byteswap(
+				(AvbChainPartitionDescriptor*)descriptors[n], &chain_desc)) {
+				avb_errorv(full_partition_name,
+                    			 ": Chain partition descriptor is invalid.\n",
+                    			 NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			if (chain_desc.rollback_index_location == 0) {
+				avb_errorv(full_partition_name,
+                     			": Chain partition has invalid "
+                     			"rollback_index_location field.\n",
+                    			 NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			chain_partition_name = ((const uint8_t*)descriptors[n]) +
+                               sizeof(AvbChainPartitionDescriptor);
+			chain_public_key = chain_partition_name + chain_desc.partition_name_len;
+
+			sub_ret = load_and_verify_vbmeta(ops,
+                                         requested_partitions,
+                                         ab_suffix,
+                                         allow_verification_error,
+                                         toplevel_vbmeta_flags,
+                                         chain_desc.rollback_index_location,
+                                         (const char*)chain_partition_name,
+                                         chain_desc.partition_name_len,
+                                         chain_public_key,
+                                         chain_desc.public_key_len,
+                                         slot_data,
+                                         NULL /* out_algorithm_type */);
+			if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+				ret = sub_ret;
+				if (!result_should_continue(ret)) {
+					goto out;
+				}
+			}
+		} break;
+
+		case AVB_DESCRIPTOR_TAG_KERNEL_CMDLINE: {
+			const uint8_t* kernel_cmdline;
+			AvbKernelCmdlineDescriptor kernel_cmdline_desc;
+			bool apply_cmdline;
+
+			if (!avb_kernel_cmdline_descriptor_validate_and_byteswap(
+				(AvbKernelCmdlineDescriptor*)descriptors[n],
+				&kernel_cmdline_desc)) {
+				avb_errorv(full_partition_name,
+                     			": Kernel cmdline descriptor is invalid.\n",
+                     			NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			kernel_cmdline = ((const uint8_t*)descriptors[n]) +
+				sizeof(AvbKernelCmdlineDescriptor);
+
+			if (!avb_validate_utf8(kernel_cmdline,
+                               kernel_cmdline_desc.kernel_cmdline_length)) {
+				avb_errorv(full_partition_name,
+                     			": Kernel cmdline is not valid UTF-8.\n",
+                     			NULL);
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+				goto out;
+			}
+
+			/* Compare the flags for top-level VBMeta struct with flags in
+			 * the command-line descriptor so command-line snippets only
+			 * intended for a certain mode (dm-verity enabled/disabled)
+			 * are skipped if applicable.
+			 */
+			apply_cmdline = true;
+			if (toplevel_vbmeta_flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+				if (kernel_cmdline_desc.flags &
+  					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_NOT_DISABLED) {
+					apply_cmdline = false;
+				}
+			} else {
+				if (kernel_cmdline_desc.flags &
+					AVB_KERNEL_CMDLINE_FLAGS_USE_ONLY_IF_HASHTREE_DISABLED) {
+					apply_cmdline = false;
+				}
+			}
+
+			if (apply_cmdline) {
+				if (slot_data->cmdline == NULL) {
+					slot_data->cmdline =
+					avb_calloc(kernel_cmdline_desc.kernel_cmdline_length + 1);
+					if (slot_data->cmdline == NULL) {
+						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+						goto out;
+					}
+					avb_memcpy(slot_data->cmdline,
+                       				kernel_cmdline,
+                       				kernel_cmdline_desc.kernel_cmdline_length);
+					} else {
+					/* new cmdline is: <existing_cmdline> + ' ' + <newcmdline> + '\0' */
+					size_t orig_size = avb_strlen(slot_data->cmdline);
+					size_t new_size =
+                				orig_size + 1 + kernel_cmdline_desc.kernel_cmdline_length + 1;
+					char* new_cmdline = avb_calloc(new_size);
+					if (new_cmdline == NULL) {
+						ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+						goto out;
+					}
+					avb_memcpy(new_cmdline, slot_data->cmdline, orig_size);
+					new_cmdline[orig_size] = ' ';
+					avb_memcpy(new_cmdline + orig_size + 1,
+ 					kernel_cmdline,
+					kernel_cmdline_desc.kernel_cmdline_length);
+					avb_free(slot_data->cmdline);
+					slot_data->cmdline = new_cmdline;
+				}
+			}
+		} break;
+
+		/* Explicit fall-through */
+		case AVB_DESCRIPTOR_TAG_PROPERTY:
+		case AVB_DESCRIPTOR_TAG_HASHTREE:
+		/* Do nothing. */
+		break;
+		}
+	}
+
+	if (rollback_index_location >= AVB_MAX_NUMBER_OF_ROLLBACK_INDEX_LOCATIONS) {
+		avb_errorv(
+		full_partition_name, ": Invalid rollback_index_location.\n", NULL);
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA;
+		goto out;
+	}
+
+	slot_data->rollback_indexes[rollback_index_location] =
+		vbmeta_header.rollback_index;
+
+	if (out_algorithm_type != NULL) {
+		*out_algorithm_type = (AvbAlgorithmType)vbmeta_header.algorithm_type;
+	}
+
+out:
+	/* If |vbmeta_image_data| isn't NULL it means that it adopted
+	 * |vbmeta_buf| so in that case don't free it here.
+	 */
+	if (vbmeta_image_data == NULL) {
+		if (vbmeta_buf != NULL) {
+			avb_free(vbmeta_buf);
+		}
+	}
+	if (descriptors != NULL) {
+		avb_free(descriptors);
+	}
+	return ret;
+}
+
+#define NUM_GUIDS 3
+
+/* Substitutes all variables (e.g. $(ANDROID_SYSTEM_PARTUUID)) with
+ * values. Returns NULL on OOM, otherwise the cmdline with values
+ * replaced.
+ */
+static char* sub_cmdline(AvbOps* ops,
+                         const char* cmdline,
+                         const char* ab_suffix,
+                         bool using_boot_for_vbmeta)
+{
+	const char* part_name_str[NUM_GUIDS] = {"system", "boot", "vbmeta"};
+	const char* replace_str[NUM_GUIDS] = {"$(ANDROID_SYSTEM_PARTUUID)",
+                                        "$(ANDROID_BOOT_PARTUUID)",
+                                        "$(ANDROID_VBMETA_PARTUUID)"};
+	char* ret = NULL;
+	AvbIOResult io_ret;
+	size_t n;
+
+	/* Special-case for when the top-level vbmeta struct is in the boot
+	 * partition.
+	 */
+	if (using_boot_for_vbmeta) {
+		part_name_str[2] = "boot";
+	}
+
+	/* Replace unique partition GUIDs */
+	for (n = 0; n < NUM_GUIDS; n++) {
+		char part_name[PART_NAME_MAX_SIZE];
+		char guid_buf[37];
+
+		if (!avb_str_concat(part_name,
+                        	sizeof part_name,
+                        	part_name_str[n],
+                        	avb_strlen(part_name_str[n]),
+                        	ab_suffix,
+                        	avb_strlen(ab_suffix))) {
+			avb_error("Partition name and suffix does not fit.\n");
+			goto fail;
+		}
+
+		io_ret = ops->get_unique_guid_for_partition(
+			ops, part_name, guid_buf, sizeof guid_buf);
+		if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+			return NULL;
+		} else if (io_ret != AVB_IO_RESULT_OK) {
+			avb_error("Error getting unique GUID for partition.\n");
+			goto fail;
+		}
+
+		if (ret == NULL) {
+			ret = avb_replace(cmdline, replace_str[n], guid_buf);
+		} else {
+			char* new_ret = avb_replace(ret, replace_str[n], guid_buf);
+			avb_free(ret);
+ 			ret = new_ret;
+		}
+		if (ret == NULL) {
+			goto fail;
+		}
+	}
+
+	return ret;
+
+fail:
+	if (ret != NULL) {
+		avb_free(ret);
+	}
+	return NULL;
+}
+
+static int cmdline_append_option(AvbSlotVerifyData* slot_data,
+                                 const char* key,
+                                 const char* value)
+{
+	size_t offset, key_len, value_len;
+	char* new_cmdline;
+
+	key_len = avb_strlen(key);
+	value_len = avb_strlen(value);
+
+	offset = 0;
+	if (slot_data->cmdline != NULL) {
+		offset = avb_strlen(slot_data->cmdline);
+		if (offset > 0) {
+			offset += 1;
+		}
+	}
+
+	new_cmdline = avb_calloc(offset + key_len + value_len + 2);
+	if (new_cmdline == NULL) {
+		return 0;
+	}
+	if (offset > 0) {
+		avb_memcpy(new_cmdline, slot_data->cmdline, offset - 1);
+		new_cmdline[offset - 1] = ' ';
+	}
+	avb_memcpy(new_cmdline + offset, key, key_len);
+	new_cmdline[offset + key_len] = '=';
+	avb_memcpy(new_cmdline + offset + key_len + 1, value, value_len);
+	if (slot_data->cmdline != NULL) {
+		avb_free(slot_data->cmdline);
+	}
+	slot_data->cmdline = new_cmdline;
+
+	return 1;
+}
+
+#define AVB_MAX_DIGITS_UINT64 32
+
+/* Writes |value| to |digits| in base 10 followed by a NUL byte.
+ * Returns number of characters written excluding the NUL byte.
+ */
+static size_t uint64_to_base10(uint64_t value,
+                               char digits[AVB_MAX_DIGITS_UINT64])
+{
+	char rev_digits[AVB_MAX_DIGITS_UINT64];
+	size_t n, num_digits;
+
+	for (num_digits = 0; num_digits < AVB_MAX_DIGITS_UINT64 - 1;) {
+		rev_digits[num_digits++] = (value % 10) + '0';
+		value /= 10;
+		if (value == 0) {
+			break;
+		}
+	}
+
+	for (n = 0; n < num_digits; n++) {
+		digits[n] = rev_digits[num_digits - 1 - n];
+	}
+	digits[n] = '\0';
+	return n;
+}
+
+static int cmdline_append_version(AvbSlotVerifyData* slot_data,
+                                  const char* key,
+                                  uint64_t major_version,
+                                  uint64_t minor_version)
+{
+	char major_digits[AVB_MAX_DIGITS_UINT64];
+	char minor_digits[AVB_MAX_DIGITS_UINT64];
+	char combined[AVB_MAX_DIGITS_UINT64 * 2 + 1];
+	size_t num_major_digits, num_minor_digits;
+
+	num_major_digits = uint64_to_base10(major_version, major_digits);
+	num_minor_digits = uint64_to_base10(minor_version, minor_digits);
+	avb_memcpy(combined, major_digits, num_major_digits);
+	combined[num_major_digits] = '.';
+	avb_memcpy(combined + num_major_digits + 1, minor_digits, num_minor_digits);
+	combined[num_major_digits + 1 + num_minor_digits] = '\0';
+
+	return cmdline_append_option(slot_data, key, combined);
+}
+
+static int cmdline_append_uint64_base10(AvbSlotVerifyData* slot_data,
+                                        const char* key,
+                                        uint64_t value)
+{
+	char digits[AVB_MAX_DIGITS_UINT64];
+	uint64_to_base10(value, digits);
+	return cmdline_append_option(slot_data, key, digits);
+}
+
+static int cmdline_append_hex(AvbSlotVerifyData* slot_data,
+                              const char* key,
+                              const uint8_t* data,
+                              size_t data_len)
+{
+	char hex_digits[17] = "0123456789abcdef";
+	char* hex_data;
+	int ret;
+	size_t n;
+
+	hex_data = avb_malloc(data_len * 2 + 1);
+	if (hex_data == NULL) {
+		return 0;
+	}
+
+	for (n = 0; n < data_len; n++) {
+		hex_data[n * 2] = hex_digits[data[n] >> 4];
+		hex_data[n * 2 + 1] = hex_digits[data[n] & 0x0f];
+	}
+	hex_data[n * 2] = '\0';
+
+	ret = cmdline_append_option(slot_data, key, hex_data);
+	avb_free(hex_data);
+	return ret;
+}
+
+static AvbSlotVerifyResult append_options(
+    AvbOps* ops,
+    AvbSlotVerifyData* slot_data,
+    AvbVBMetaImageHeader* toplevel_vbmeta,
+    AvbAlgorithmType algorithm_type,
+    AvbHashtreeErrorMode hashtree_error_mode) {
+  AvbSlotVerifyResult ret;
+  const char* verity_mode = NULL;
+  bool is_device_unlocked;
+  AvbIOResult io_ret;
+
+  /* Add androidboot.vbmeta.device option. */
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device",
+                             "PARTUUID=$(ANDROID_VBMETA_PARTUUID)")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Add androidboot.vbmeta.avb_version option. */
+  if (!cmdline_append_version(slot_data,
+                              "androidboot.vbmeta.avb_version",
+                              AVB_VERSION_MAJOR,
+                              AVB_VERSION_MINOR)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.avb.device_state to "locked" or "unlocked". */
+  io_ret = ops->read_is_device_unlocked(ops, &is_device_unlocked);
+  if (io_ret == AVB_IO_RESULT_ERROR_OOM) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  } else if (io_ret != AVB_IO_RESULT_OK) {
+    avb_error("Error getting device state.\n");
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_IO;
+    goto out;
+  }
+  if (!cmdline_append_option(slot_data,
+                             "androidboot.vbmeta.device_state",
+                             is_device_unlocked ? "unlocked" : "locked")) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  /* Set androidboot.vbmeta.{hash_alg, size, digest} - use same hash
+   * function as is used to sign vbmeta.
+   */
+  switch (algorithm_type) {
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_NONE:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA256_RSA8192: {
+      AvbSHA256Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha256_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha256_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha256") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha256_final(&ctx),
+                              AVB_SHA256_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    /* Explicit fallthrough. */
+    case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+    case AVB_ALGORITHM_TYPE_SHA512_RSA8192: {
+      AvbSHA512Ctx ctx;
+      size_t n, total_size = 0;
+      avb_sha512_init(&ctx);
+      for (n = 0; n < slot_data->num_vbmeta_images; n++) {
+        avb_sha512_update(&ctx,
+                          slot_data->vbmeta_images[n].vbmeta_data,
+                          slot_data->vbmeta_images[n].vbmeta_size);
+        total_size += slot_data->vbmeta_images[n].vbmeta_size;
+      }
+      if (!cmdline_append_option(
+              slot_data, "androidboot.vbmeta.hash_alg", "sha512") ||
+          !cmdline_append_uint64_base10(
+              slot_data, "androidboot.vbmeta.size", total_size) ||
+          !cmdline_append_hex(slot_data,
+                              "androidboot.vbmeta.digest",
+                              avb_sha512_final(&ctx),
+                              AVB_SHA512_DIGEST_SIZE)) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto out;
+      }
+    } break;
+    case _AVB_ALGORITHM_NUM_TYPES:
+      avb_assert_not_reached();
+      break;
+  }
+
+  /* Set androidboot.veritymode and androidboot.vbmeta.invalidate_on_error */
+  if (toplevel_vbmeta->flags & AVB_VBMETA_IMAGE_FLAGS_HASHTREE_DISABLED) {
+    verity_mode = "disabled";
+  } else {
+    const char* dm_verity_mode = NULL;
+    char* new_ret;
+
+    switch (hashtree_error_mode) {
+      case AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE:
+        if (!cmdline_append_option(
+                slot_data, "androidboot.vbmeta.invalidate_on_error", "yes")) {
+          ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+          goto out;
+        }
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_RESTART:
+        verity_mode = "enforcing";
+        dm_verity_mode = "restart_on_corruption";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_EIO:
+        verity_mode = "eio";
+        /* For now there's no option to specify the EIO mode. So
+         * just use 'ignore_zero_blocks' since that's already set
+         * and dm-verity-target.c supports specifying this multiple
+         * times.
+         */
+        dm_verity_mode = "ignore_zero_blocks";
+        break;
+      case AVB_HASHTREE_ERROR_MODE_LOGGING:
+        verity_mode = "logging";
+        dm_verity_mode = "ignore_corruption";
+        break;
+    }
+    new_ret = avb_replace(
+        slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
+    avb_free(slot_data->cmdline);
+    slot_data->cmdline = new_ret;
+    if (slot_data->cmdline == NULL) {
+      ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+      goto out;
+    }
+  }
+  if (!cmdline_append_option(
+          slot_data, "androidboot.veritymode", verity_mode)) {
+    ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+    goto out;
+  }
+
+  ret = AVB_SLOT_VERIFY_RESULT_OK;
+
+out:
+
+  return ret;
+}
+
+AvbSlotVerifyResult avb_slot_verify(AvbOps* ops,
+                                    const char* const* requested_partitions,
+                                    const char* ab_suffix,
+                                    AvbSlotVerifyFlags flags,
+                                    AvbHashtreeErrorMode hashtree_error_mode,
+                                    AvbSlotVerifyData** out_data)
+{
+	AvbSlotVerifyResult ret;
+	AvbSlotVerifyData* slot_data = NULL;
+	AvbAlgorithmType algorithm_type = AVB_ALGORITHM_TYPE_SHA256_RSA4096;
+	bool using_boot_for_vbmeta = false;
+	AvbVBMetaImageHeader toplevel_vbmeta;
+	bool allow_verification_error =
+		(flags & AVB_SLOT_VERIFY_FLAGS_ALLOW_VERIFICATION_ERROR);
+
+	/* Fail early if we're missing the AvbOps needed for slot verification.
+	 *
+	 * For now, handle get_size_of_partition() not being implemented. In
+	 * a later release we may change that.
+	 */
+	avb_assert(ops->read_is_device_unlocked != NULL);
+	avb_assert(ops->read_from_partition != NULL);
+	avb_assert(ops->validate_vbmeta_public_key != NULL);
+	avb_assert(ops->read_rollback_index != NULL);
+	avb_assert(ops->get_unique_guid_for_partition != NULL);
+	/* avb_assert(ops->get_size_of_partition != NULL); */
+
+	if (out_data != NULL) {
+		*out_data = NULL;
+	}
+
+	/* Allowing dm-verity errors defeats the purpose of verified boot so
+	 * only allow this if set up to allow verification errors
+	 * (e.g. typically only UNLOCKED mode).
+	 */
+	if (hashtree_error_mode == AVB_HASHTREE_ERROR_MODE_LOGGING &&
+		!allow_verification_error) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT;
+		goto fail;
+	}
+
+	slot_data = avb_calloc(sizeof(AvbSlotVerifyData));
+	if (slot_data == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto fail;
+	}
+	slot_data->vbmeta_images =
+		avb_calloc(sizeof(AvbVBMetaData) * MAX_NUMBER_OF_VBMETA_IMAGES);
+	if (slot_data->vbmeta_images == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto fail;
+	}
+	slot_data->loaded_partitions =
+		avb_calloc(sizeof(AvbPartitionData) * MAX_NUMBER_OF_LOADED_PARTITIONS);
+	if (slot_data->loaded_partitions == NULL) {
+		ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+		goto fail;
+	}
+
+	ret = load_and_verify_vbmeta(ops,
+                               requested_partitions,
+                               ab_suffix,
+                               allow_verification_error,
+                               0 /* toplevel_vbmeta_flags */,
+                               0 /* rollback_index_location */,
+                               "vbmeta",
+                               avb_strlen("vbmeta"),
+                               NULL /* expected_public_key */,
+                               0 /* expected_public_key_length */,
+                               slot_data,
+                               &algorithm_type);
+	if (!allow_verification_error && ret != AVB_SLOT_VERIFY_RESULT_OK) {
+		goto fail;
+	}
+
+	/* If things check out, mangle the kernel command-line as needed. */
+	if (result_should_continue(ret)) {
+		if (avb_strcmp(slot_data->vbmeta_images[0].partition_name, "vbmeta") != 0) {
+		avb_assert(
+  			avb_strcmp(slot_data->vbmeta_images[0].partition_name, "boot") == 0);
+			using_boot_for_vbmeta = true;
+		}
+
+		/* Byteswap top-level vbmeta header since we'll need it below. */
+		avb_vbmeta_image_header_to_host_byte_order(
+        		(const AvbVBMetaImageHeader*)slot_data->vbmeta_images[0].vbmeta_data,
+        		&toplevel_vbmeta);
+
+		/* Fill in |ab_suffix| field. */
+		slot_data->ab_suffix = avb_strdup(ab_suffix);
+		if (slot_data->ab_suffix == NULL) {
+			ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+			goto fail;
+		}
+
+    /* If verification is disabled, we are done ... we specifically
+     * don't want to add any androidboot.* options since verification
+     * is disabled.
+     */
+    if (toplevel_vbmeta.flags & AVB_VBMETA_IMAGE_FLAGS_VERIFICATION_DISABLED) {
+      /* Since verification is disabled we didn't process any
+       * descriptors and thus there's no cmdline... so set root= such
+       * that the system partition is mounted.
+       */
+      avb_assert(slot_data->cmdline == NULL);
+      slot_data->cmdline =
+          avb_strdup("root=PARTUUID=$(ANDROID_SYSTEM_PARTUUID)");
+      if (slot_data->cmdline == NULL) {
+        ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+        goto fail;
+      }
+    } else {
+      /* Add options - any failure in append_options() is either an
+       * I/O or OOM error.
+       */
+      AvbSlotVerifyResult sub_ret = append_options(ops,
+                                                   slot_data,
+                                                   &toplevel_vbmeta,
+                                                   algorithm_type,
+                                                   hashtree_error_mode);
+      if (sub_ret != AVB_SLOT_VERIFY_RESULT_OK) {
+        ret = sub_ret;
+        goto fail;
+      }
+    }
+
+		/* Substitute $(ANDROID_SYSTEM_PARTUUID) and friends. */
+		if (slot_data->cmdline != NULL) {
+			char* new_cmdline;
+			new_cmdline = sub_cmdline(
+			ops, slot_data->cmdline, ab_suffix, using_boot_for_vbmeta);
+			if (new_cmdline == NULL) {
+				ret = AVB_SLOT_VERIFY_RESULT_ERROR_OOM;
+				goto fail;
+			}
+			avb_free(slot_data->cmdline);
+			slot_data->cmdline = new_cmdline;
+		}
+
+		if (out_data != NULL) {
+			*out_data = slot_data;
+		} else {
+			avb_slot_verify_data_free(slot_data);
+		}
+	}
+
+	if (!allow_verification_error) {
+		avb_assert(ret == AVB_SLOT_VERIFY_RESULT_OK);
+	}
+
+	return ret;
+
+fail:
+	if (slot_data != NULL) {
+		avb_slot_verify_data_free(slot_data);
+	}
+	return ret;
+}
+
+void avb_slot_verify_data_free(AvbSlotVerifyData* data)
+{
+	if (data->ab_suffix != NULL) {
+		avb_free(data->ab_suffix);
+	}
+	if (data->cmdline != NULL) {
+		avb_free(data->cmdline);
+	}
+	if (data->vbmeta_images != NULL) {
+		size_t n;
+		for (n = 0; n < data->num_vbmeta_images; n++) {
+			AvbVBMetaData* vbmeta_image = &data->vbmeta_images[n];
+			if (vbmeta_image->partition_name != NULL) {
+				avb_free(vbmeta_image->partition_name);
+			}
+			if (vbmeta_image->vbmeta_data != NULL) {
+				avb_free(vbmeta_image->vbmeta_data);
+			}
+		}
+		avb_free(data->vbmeta_images);
+	}
+	if (data->loaded_partitions != NULL) {
+		size_t n;
+		for (n = 0; n < data->num_loaded_partitions; n++) {
+			AvbPartitionData* loaded_partition = &data->loaded_partitions[n];
+			if (loaded_partition->partition_name != NULL) {
+				avb_free(loaded_partition->partition_name);
+			}
+			if (loaded_partition->data != NULL) {
+				avb_free(loaded_partition->data);
+			}
+		}
+		avb_free(data->loaded_partitions);
+	}
+	avb_free(data);
+}
+
+const char* avb_slot_verify_result_to_string(AvbSlotVerifyResult result)
+{
+	const char* ret = NULL;
+
+	switch (result) {
+	case AVB_SLOT_VERIFY_RESULT_OK:
+		ret = "OK";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+		ret = "ERROR_OOM";
+ 		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+		ret = "ERROR_IO";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+		ret = "ERROR_VERIFICATION";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+		ret = "ERROR_ROLLBACK_INDEX";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+		ret = "ERROR_PUBLIC_KEY_REJECTED";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+		ret = "ERROR_INVALID_METADATA";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+		ret = "ERROR_UNSUPPORTED_VERSION";
+		break;
+	case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+		ret = "ERROR_INVALID_ARGUMENT";
+		break;
+	/* Do not add a 'default:' case here because of -Wswitch. */
+	}
+
+	if (ret == NULL) {
+		avb_error("Unknown AvbSlotVerifyResult value.\n");
+		ret = "(unknown)";
+	}
+
+	return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_sysdeps_posix.c b/lib/avb/rk_libavb/avb_sysdeps_posix.c
new file mode 100644
index 0000000000..44ca777ce1
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_sysdeps_posix.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+//#include <bits/endian.h>
+#include <common.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#include <android_avb/avb_sysdeps.h>
+
+void abort(void);
+
+int avb_memcmp(const void* src1, const void* src2, size_t n) {
+  return memcmp(src1, src2, n);
+}
+
+void* avb_memcpy(void* dest, const void* src, size_t n) {
+  return memcpy(dest, src, n);
+}
+
+void* avb_memset(void* dest, const int c, size_t n) {
+  return memset(dest, c, n);
+}
+
+int avb_strcmp(const char* s1, const char* s2) {
+  return strcmp(s1, s2);
+}
+
+size_t avb_strlen(const char* str) {
+  return strlen(str);
+}
+
+void avb_abort(void) {
+  abort();
+return;
+}
+
+void avb_print(const char* message) {
+  fprintf(stderr, "%s", message);
+}
+
+void avb_printv(const char* message, ...) {
+  va_list ap;
+  const char* m;
+
+  va_start(ap, message);
+  for (m = message; m != NULL; m = va_arg(ap, const char*)) {
+    fprintf(stderr, "%s", m);
+  }
+  va_end(ap);
+}
+
+void* avb_malloc_(size_t size) {
+  return malloc(size);
+}
+
+void avb_free(void* ptr) {
+  free(ptr);
+}
diff --git a/lib/avb/rk_libavb/avb_util.c b/lib/avb/rk_libavb/avb_util.c
new file mode 100644
index 0000000000..f18267a89e
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_util.c
@@ -0,0 +1,404 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_util.h>
+#include <malloc.h>
+#include <stdarg.h>
+
+uint32_t avb_be32toh(uint32_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint32_t ret;
+  ret = ((uint32_t)d[0]) << 24;
+  ret |= ((uint32_t)d[1]) << 16;
+  ret |= ((uint32_t)d[2]) << 8;
+  ret |= ((uint32_t)d[3]);
+  return ret;
+}
+
+uint64_t avb_be64toh(uint64_t in) {
+  uint8_t* d = (uint8_t*)&in;
+  uint64_t ret;
+  ret = ((uint64_t)d[0]) << 56;
+  ret |= ((uint64_t)d[1]) << 48;
+  ret |= ((uint64_t)d[2]) << 40;
+  ret |= ((uint64_t)d[3]) << 32;
+  ret |= ((uint64_t)d[4]) << 24;
+  ret |= ((uint64_t)d[5]) << 16;
+  ret |= ((uint64_t)d[6]) << 8;
+  ret |= ((uint64_t)d[7]);
+  return ret;
+}
+
+/* Converts a 32-bit unsigned integer from host to big-endian byte order. */
+uint32_t avb_htobe32(uint32_t in) {
+  union {
+    uint32_t word;
+    uint8_t bytes[4];
+  } ret;
+  ret.bytes[0] = (in >> 24) & 0xff;
+  ret.bytes[1] = (in >> 16) & 0xff;
+  ret.bytes[2] = (in >> 8) & 0xff;
+  ret.bytes[3] = in & 0xff;
+  return ret.word;
+}
+
+/* Converts a 64-bit unsigned integer from host to big-endian byte order. */
+uint64_t avb_htobe64(uint64_t in) {
+  union {
+    uint64_t word;
+    uint8_t bytes[8];
+  } ret;
+  ret.bytes[0] = (in >> 56) & 0xff;
+  ret.bytes[1] = (in >> 48) & 0xff;
+  ret.bytes[2] = (in >> 40) & 0xff;
+  ret.bytes[3] = (in >> 32) & 0xff;
+  ret.bytes[4] = (in >> 24) & 0xff;
+  ret.bytes[5] = (in >> 16) & 0xff;
+  ret.bytes[6] = (in >> 8) & 0xff;
+  ret.bytes[7] = in & 0xff;
+  return ret.word;
+}
+
+int avb_safe_memcmp(const void* s1, const void* s2, size_t n) {
+  const unsigned char* us1 = s1;
+  const unsigned char* us2 = s2;
+  int result = 0;
+
+  if (0 == n) {
+    return 0;
+  }
+
+  /*
+   * Code snippet without data-dependent branch due to Nate Lawson
+   * (nate@root.org) of Root Labs.
+   */
+  while (n--) {
+    result |= *us1++ ^ *us2++;
+  }
+
+  return result != 0;
+}
+
+bool avb_safe_add_to(uint64_t* value, uint64_t value_to_add) {
+  uint64_t original_value;
+
+  avb_assert(value != NULL);
+
+  original_value = *value;
+
+  *value += value_to_add;
+  if (*value < original_value) {
+    avb_error("Overflow when adding values.\n");
+    return false;
+  }
+
+  return true;
+}
+
+bool avb_safe_add(uint64_t* out_result, uint64_t a, uint64_t b) {
+  uint64_t dummy;
+  if (out_result == NULL) {
+    out_result = &dummy;
+  }
+  *out_result = a;
+  return avb_safe_add_to(out_result, b);
+}
+
+bool avb_validate_utf8(const uint8_t* data, size_t num_bytes) {
+  size_t n;
+  unsigned int num_cc;
+
+  for (n = 0, num_cc = 0; n < num_bytes; n++) {
+    uint8_t c = data[n];
+
+    if (num_cc > 0) {
+      if ((c & (0x80 | 0x40)) == 0x80) {
+        /* 10xx xxxx */
+      } else {
+        goto fail;
+      }
+      num_cc--;
+    } else {
+      if (c < 0x80) {
+        num_cc = 0;
+      } else if ((c & (0x80 | 0x40 | 0x20)) == (0x80 | 0x40)) {
+        /* 110x xxxx */
+        num_cc = 1;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10)) == (0x80 | 0x40 | 0x20)) {
+        /* 1110 xxxx */
+        num_cc = 2;
+      } else if ((c & (0x80 | 0x40 | 0x20 | 0x10 | 0x08)) ==
+                 (0x80 | 0x40 | 0x20 | 0x10)) {
+        /* 1111 0xxx */
+        num_cc = 3;
+      } else {
+        goto fail;
+      }
+    }
+  }
+
+  if (num_cc != 0) {
+    goto fail;
+  }
+
+  return true;
+
+fail:
+  return false;
+}
+
+bool avb_str_concat(char* buf,
+                    size_t buf_size,
+                    const char* str1,
+                    size_t str1_len,
+                    const char* str2,
+                    size_t str2_len) {
+  uint64_t combined_len;
+
+  if (!avb_safe_add(&combined_len, str1_len, str2_len)) {
+    avb_error("Overflow when adding string sizes.\n");
+    return false;
+  }
+
+  if (combined_len > buf_size - 1) {
+    avb_error("Insufficient buffer space.\n");
+    return false;
+  }
+
+  avb_memcpy(buf, str1, str1_len);
+  avb_memcpy(buf + str1_len, str2, str2_len);
+  buf[combined_len] = '\0';
+
+  return true;
+}
+
+void* avb_malloc(size_t size) {
+  void* ret = avb_malloc_(size);
+  if (ret == NULL) {
+    avb_error("Failed to allocate memory.\n");
+    return NULL;
+  }
+  return ret;
+}
+
+void* avb_calloc(size_t size) {
+  void* ret = avb_malloc(size);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memset(ret, '\0', size);
+  return ret;
+}
+
+char* avb_strdup(const char* str) {
+  size_t len = avb_strlen(str);
+  char* ret = avb_malloc(len + 1);
+  if (ret == NULL) {
+    return NULL;
+  }
+
+  avb_memcpy(ret, str, len);
+  ret[len] = '\0';
+
+  return ret;
+}
+
+const char* avb_strstr(const char* haystack, const char* needle) {
+  size_t n, m;
+
+  /* Look through |haystack| and check if the first character of
+   * |needle| matches. If so, check the rest of |needle|.
+   */
+  for (n = 0; haystack[n] != '\0'; n++) {
+    if (haystack[n] != needle[0]) {
+      continue;
+    }
+
+    for (m = 1;; m++) {
+      if (needle[m] == '\0') {
+        return haystack + n;
+      }
+
+      if (haystack[n + m] != needle[m]) {
+        break;
+      }
+    }
+  }
+
+  return NULL;
+}
+
+const char* avb_strv_find_str(const char* const* strings,
+                              const char* str,
+                              size_t str_size) {
+  size_t n;
+  for (n = 0; strings[n] != NULL; n++) {
+    if (avb_strlen(strings[n]) == str_size &&
+        avb_memcmp(strings[n], str, str_size) == 0) {
+      return strings[n];
+    }
+  }
+  return NULL;
+}
+
+char* avb_replace(const char* str, const char* search, const char* replace) {
+  char* ret = NULL;
+  size_t ret_len = 0;
+  size_t search_len, replace_len;
+  const char* str_after_last_replace;
+
+  search_len = avb_strlen(search);
+  replace_len = avb_strlen(replace);
+
+  str_after_last_replace = str;
+  while (*str != '\0') {
+    const char* s;
+    size_t num_before;
+    size_t num_new;
+
+    s = avb_strstr(str, search);
+    if (s == NULL) {
+      break;
+    }
+
+    num_before = s - str;
+
+    if (ret == NULL) {
+      num_new = num_before + replace_len + 1;
+      ret = avb_malloc(num_new);
+      if (ret == NULL) {
+        goto out;
+      }
+      avb_memcpy(ret, str, num_before);
+      avb_memcpy(ret + num_before, replace, replace_len);
+      ret[num_new - 1] = '\0';
+      ret_len = num_new - 1;
+    } else {
+      char* new_str;
+      num_new = ret_len + num_before + replace_len + 1;
+      new_str = avb_malloc(num_new);
+      if (ret == NULL) {
+        goto out;
+      }
+      avb_memcpy(new_str, ret, ret_len);
+      avb_memcpy(new_str + ret_len, str, num_before);
+      avb_memcpy(new_str + ret_len + num_before, replace, replace_len);
+      new_str[num_new - 1] = '\0';
+      avb_free(ret);
+      ret = new_str;
+      ret_len = num_new - 1;
+    }
+
+    str = s + search_len;
+    str_after_last_replace = str;
+  }
+
+  if (ret == NULL) {
+    ret = avb_strdup(str_after_last_replace);
+    if (ret == NULL) {
+      goto out;
+    }
+  } else {
+    size_t num_remaining = avb_strlen(str_after_last_replace);
+    size_t num_new = ret_len + num_remaining + 1;
+    char* new_str = avb_malloc(num_new);
+    if (ret == NULL) {
+      goto out;
+    }
+    avb_memcpy(new_str, ret, ret_len);
+    avb_memcpy(new_str + ret_len, str_after_last_replace, num_remaining);
+    new_str[num_new - 1] = '\0';
+    avb_free(ret);
+    ret = new_str;
+    ret_len = num_new - 1;
+  }
+
+out:
+  return ret;
+}
+
+/* We only support a limited amount of strings in avb_strdupv(). */
+#define AVB_STRDUPV_MAX_NUM_STRINGS 32
+
+char* avb_strdupv(const char* str, ...) {
+  va_list ap;
+  const char* strings[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t lengths[AVB_STRDUPV_MAX_NUM_STRINGS];
+  size_t num_strings, n;
+  uint64_t total_length;
+  char *ret = NULL, *dest;
+
+  num_strings = 0;
+  total_length = 0;
+  va_start(ap, str);
+  do {
+    size_t str_len = avb_strlen(str);
+    strings[num_strings] = str;
+    lengths[num_strings] = str_len;
+    if (!avb_safe_add_to(&total_length, str_len)) {
+      avb_fatal("Overflow while determining total length.\n");
+      break;
+    }
+    num_strings++;
+    if (num_strings == AVB_STRDUPV_MAX_NUM_STRINGS) {
+      avb_fatal("Too many strings passed.\n");
+      break;
+    }
+    str = va_arg(ap, const char*);
+  } while (str != NULL);
+  va_end(ap);
+
+  ret = avb_malloc(total_length + 1);
+  if (ret == NULL) {
+    goto out;
+  }
+
+  dest = ret;
+  for (n = 0; n < num_strings; n++) {
+    avb_memcpy(dest, strings[n], lengths[n]);
+    dest += lengths[n];
+  }
+  *dest = '\0';
+  avb_assert(dest == ret + total_length);
+
+out:
+  return ret;
+}
+
+const char* avb_basename(const char* str) {
+  int64_t n;
+  size_t len;
+
+  len = avb_strlen(str);
+  if (len >= 2) {
+    for (n = len - 2; n >= 0; n--) {
+      if (str[n] == '/') {
+        return str + n + 1;
+      }
+    }
+  }
+  return str;
+}
+
diff --git a/lib/avb/rk_libavb/avb_vbmeta_image.c b/lib/avb/rk_libavb/avb_vbmeta_image.c
new file mode 100644
index 0000000000..76ea3ad230
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_vbmeta_image.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/avb_vbmeta_image.h>
+#include <android_avb/avb_crypto.h>
+#include <android_avb/avb_rsa.h>
+#include <android_avb/avb_sha.h>
+#include <android_avb/avb_util.h>
+#include <android_avb/avb_version.h>
+
+AvbVBMetaVerifyResult avb_vbmeta_image_verify(
+    const uint8_t* data,
+    size_t length,
+    const uint8_t** out_public_key_data,
+    size_t* out_public_key_length)
+{
+	AvbVBMetaVerifyResult ret;
+	AvbVBMetaImageHeader h;
+	uint8_t* computed_hash;
+	const AvbAlgorithmData* algorithm;
+	AvbSHA256Ctx sha256_ctx;
+	AvbSHA512Ctx sha512_ctx;
+	const uint8_t* header_block;
+	const uint8_t* authentication_block;
+	const uint8_t* auxiliary_block;
+	int verification_result;
+
+	ret = AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER;
+
+	if (out_public_key_data != NULL) {
+		*out_public_key_data = NULL;
+	}
+	if (out_public_key_length != NULL) {
+		*out_public_key_length = 0;
+	}
+
+	/* Ensure magic is correct. */
+	if (avb_safe_memcmp(data, AVB_MAGIC, AVB_MAGIC_LEN) != 0) {
+		avb_error("Magic is incorrect.\n");
+		goto out;
+	}
+
+	/* Before we byteswap, ensure length is long enough. */
+	if (length < sizeof(AvbVBMetaImageHeader)) {
+		avb_error("Length is smaller than header.\n");
+		goto out;
+	}
+	avb_vbmeta_image_header_to_host_byte_order((const AvbVBMetaImageHeader*)data,
+                                             &h);
+
+	/* Ensure we don't attempt to access any fields if we do not meet
+	 * the specified minimum version of libavb.
+	 */
+	if ((h.required_libavb_version_major != AVB_VERSION_MAJOR) ||
+		(h.required_libavb_version_minor > AVB_VERSION_MINOR)) {
+		avb_error("Mismatch between image version and libavb version.\n");
+		ret = AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION;
+		goto out;
+	}
+
+	/* Ensure |release_string| ends with a NUL byte. */
+	if (h.release_string[AVB_RELEASE_STRING_SIZE - 1] != '\0') {
+		avb_error("Release string does not end with a NUL byte.\n");
+		goto out;
+	}
+
+	/* Ensure inner block sizes are multiple of 64. */
+	if ((h.authentication_data_block_size & 0x3f) != 0 ||
+		(h.auxiliary_data_block_size & 0x3f) != 0) {
+		avb_error("Block size is not a multiple of 64.\n");
+		goto out;
+	}
+
+	/* Ensure block sizes all add up to at most |length|. */
+	uint64_t block_total = sizeof(AvbVBMetaImageHeader);
+	if (!avb_safe_add_to(&block_total, h.authentication_data_block_size) ||
+		!avb_safe_add_to(&block_total, h.auxiliary_data_block_size)) {
+		avb_error("Overflow while computing size of boot image.\n");
+		goto out;
+	}
+	if (block_total > length) {
+		avb_error("Block sizes add up to more than given length.\n");
+		goto out;
+	}
+
+	uintptr_t data_ptr = (uintptr_t)data;
+	/* Ensure passed in memory doesn't wrap. */
+	if (!avb_safe_add(NULL, (uint64_t)data_ptr, length)) {
+		avb_error("Boot image location and length mismatch.\n");
+		goto out;
+	}
+
+	/* Ensure hash and signature are entirely in the Authentication data block. */
+	uint64_t hash_end;
+	if (!avb_safe_add(&hash_end, h.hash_offset, h.hash_size) ||
+		hash_end > h.authentication_data_block_size) {
+		avb_error("Hash is not entirely in its block.\n");
+		goto out;
+	}
+	uint64_t signature_end;
+	if (!avb_safe_add(&signature_end, h.signature_offset, h.signature_size) ||
+		signature_end > h.authentication_data_block_size) {
+		avb_error("Signature is not entirely in its block.\n");
+		goto out;
+	}
+
+	/* Ensure public key is entirely in the Auxiliary data block. */
+	uint64_t pubkey_end;
+	if (!avb_safe_add(&pubkey_end, h.public_key_offset, h.public_key_size) ||
+		pubkey_end > h.auxiliary_data_block_size) {
+		avb_error("Public key is not entirely in its block.\n");
+		goto out;
+	}
+
+	/* Ensure public key metadata (if set) is entirely in the Auxiliary
+	 * data block. */
+	if (h.public_key_metadata_size > 0) {
+		uint64_t pubkey_md_end;
+		if (!avb_safe_add(&pubkey_md_end,
+			h.public_key_metadata_offset,
+			h.public_key_metadata_size) ||
+			pubkey_md_end > h.auxiliary_data_block_size) {
+			avb_error("Public key metadata is not entirely in its block.\n");
+			goto out;
+		}
+	}
+
+	/* Bail early if there's no hash or signature. */
+	if (h.algorithm_type == AVB_ALGORITHM_TYPE_NONE) {
+		ret = AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED;
+		goto out;
+	}
+
+	/* Ensure algorithm field is supported. */
+	algorithm = avb_get_algorithm_data(h.algorithm_type);
+	if (!algorithm) {
+		avb_error("Invalid or unknown algorithm.\n");
+		goto out;
+	}
+
+	/* Bail if the embedded hash size doesn't match the chosen algorithm. */
+	if (h.hash_size != algorithm->hash_len) {
+		avb_error("Embedded hash has wrong size.\n");
+		goto out;
+	}
+
+	/* No overflow checks needed from here-on after since all block
+	 * sizes and offsets have been verified above.
+	 */
+
+	header_block = data;
+	authentication_block = header_block + sizeof(AvbVBMetaImageHeader);
+	auxiliary_block = authentication_block + h.authentication_data_block_size;
+
+	switch (h.algorithm_type) {
+	/* Explicit fall-through: */
+	case AVB_ALGORITHM_TYPE_SHA256_RSA2048:
+	case AVB_ALGORITHM_TYPE_SHA256_RSA4096:
+	case AVB_ALGORITHM_TYPE_SHA256_RSA8192:
+		avb_sha256_init(&sha256_ctx);
+		avb_sha256_update(
+			&sha256_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+		avb_sha256_update(
+			&sha256_ctx, auxiliary_block, h.auxiliary_data_block_size);
+		computed_hash = avb_sha256_final(&sha256_ctx);
+		break;
+	/* Explicit fall-through: */
+	case AVB_ALGORITHM_TYPE_SHA512_RSA2048:
+	case AVB_ALGORITHM_TYPE_SHA512_RSA4096:
+	case AVB_ALGORITHM_TYPE_SHA512_RSA8192:
+		avb_sha512_init(&sha512_ctx);
+		avb_sha512_update(
+			&sha512_ctx, header_block, sizeof(AvbVBMetaImageHeader));
+		avb_sha512_update(
+			&sha512_ctx, auxiliary_block, h.auxiliary_data_block_size);
+		computed_hash = avb_sha512_final(&sha512_ctx);
+		break;
+	default:
+		avb_error("Unknown algorithm.\n");
+		goto out;
+	}
+
+	if (avb_safe_memcmp(authentication_block + h.hash_offset,
+                      computed_hash,
+                      h.hash_size) != 0) {
+		avb_error("Hash does not match!\n");
+		ret = AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH;
+		goto out;
+	}
+
+	verification_result = avb_rsa_verify(auxiliary_block + h.public_key_offset,
+					h.public_key_size,
+					authentication_block + h.signature_offset,
+					h.signature_size,
+					authentication_block + h.hash_offset,
+					h.hash_size,
+					algorithm->padding,
+					algorithm->padding_len);
+
+	if (verification_result == 0) {
+		ret = AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH;
+		goto out;
+	}
+
+	if (h.public_key_size > 0) {
+		if (out_public_key_data != NULL) {
+			*out_public_key_data = auxiliary_block + h.public_key_offset;
+		}
+		if (out_public_key_length != NULL) {
+			*out_public_key_length = h.public_key_size;
+		}
+	}
+
+	ret = AVB_VBMETA_VERIFY_RESULT_OK;
+
+out:
+	return ret;
+}
+
+void avb_vbmeta_image_header_to_host_byte_order(const AvbVBMetaImageHeader* src,
+                                                AvbVBMetaImageHeader* dest)
+{
+	avb_memcpy(dest, src, sizeof(AvbVBMetaImageHeader));
+
+	dest->required_libavb_version_major =
+		avb_be32toh(dest->required_libavb_version_major);
+	dest->required_libavb_version_minor =
+		avb_be32toh(dest->required_libavb_version_minor);
+
+	dest->authentication_data_block_size =
+		avb_be64toh(dest->authentication_data_block_size);
+	dest->auxiliary_data_block_size =
+		avb_be64toh(dest->auxiliary_data_block_size);
+
+	dest->algorithm_type = avb_be32toh(dest->algorithm_type);
+
+	dest->hash_offset = avb_be64toh(dest->hash_offset);
+	dest->hash_size = avb_be64toh(dest->hash_size);
+
+	dest->signature_offset = avb_be64toh(dest->signature_offset);
+	dest->signature_size = avb_be64toh(dest->signature_size);
+
+	dest->public_key_offset = avb_be64toh(dest->public_key_offset);
+	dest->public_key_size = avb_be64toh(dest->public_key_size);
+
+	dest->public_key_metadata_offset =
+		avb_be64toh(dest->public_key_metadata_offset);
+	dest->public_key_metadata_size = avb_be64toh(dest->public_key_metadata_size);
+
+	dest->descriptors_offset = avb_be64toh(dest->descriptors_offset);
+	dest->descriptors_size = avb_be64toh(dest->descriptors_size);
+
+	dest->rollback_index = avb_be64toh(dest->rollback_index);
+	dest->flags = avb_be32toh(dest->flags);
+}
+
+const char* avb_vbmeta_verify_result_to_string(AvbVBMetaVerifyResult result)
+{
+	const char* ret = NULL;
+
+	switch (result) {
+	case AVB_VBMETA_VERIFY_RESULT_OK:
+		ret = "OK";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_OK_NOT_SIGNED:
+		ret = "OK_NOT_SIGNED";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_INVALID_VBMETA_HEADER:
+		ret = "INVALID_VBMETA_HEADER";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_UNSUPPORTED_VERSION:
+		ret = "UNSUPPORTED_VERSION";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_HASH_MISMATCH:
+		ret = "HASH_MISMATCH";
+		break;
+	case AVB_VBMETA_VERIFY_RESULT_SIGNATURE_MISMATCH:
+		ret = "SIGNATURE_MISMATCH";
+		break;
+	/* Do not add a 'default:' case here because of -Wswitch. */
+	}
+
+	if (ret == NULL) {
+		avb_error("Unknown AvbVBMetaVerifyResult value.\n");
+		ret = "(unknown)";
+	}
+
+	return ret;
+}
diff --git a/lib/avb/rk_libavb/avb_version.c b/lib/avb/rk_libavb/avb_version.c
new file mode 100644
index 0000000000..8137a7201a
--- /dev/null
+++ b/lib/avb/rk_libavb/avb_version.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <android_avb/libavb.h>
+
+#define AVB_QUOTE(str) #str
+#define AVB_EXPAND_AND_QUOTE(str) AVB_QUOTE(str)
+
+/* Keep in sync with get_release_string() in avbtool. */
+const char* avb_version_string(void) {
+  return AVB_EXPAND_AND_QUOTE(AVB_VERSION_MAJOR) "." AVB_EXPAND_AND_QUOTE(
+      AVB_VERSION_MINOR) "." AVB_EXPAND_AND_QUOTE(AVB_VERSION_SUB);
+}

commit 03204b06ffc9f3c1dd9d98b430ee2c784d0c4f33
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 15:16:52 2017 +0800

    common: support static_assert()
    
    The static_assert() is support in C11, which may used in source code,
    use _Static_assert for it.
    
    Change-Id: Id029c4db3a899c9531c481e55541090e0b92e2b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/common.h b/include/common.h
index d5067cd1d0..017268929f 100644
--- a/include/common.h
+++ b/include/common.h
@@ -98,6 +98,11 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 			##args, __FILE__, __LINE__, __func__);		\
 } while (0)
 
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+# undef static_assert
+# define static_assert _Static_assert
+#endif
+
 #ifndef BUG
 #define BUG() do { \
 	printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \

commit 2be87fa7ea6a33093312000bd0c9b31c02ba2a7b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 15 09:59:37 2017 +0800

    rockchip: rk3229: use google vid/pid
    
    Change-Id: I385cdbcd0d97a8ae680898aeb3669a6f00a41954
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index ffe7ee27e9..e035e7c771 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -77,6 +77,6 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x320a
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
 CONFIG_ERRNO_STR=y

commit 2a132aff67810ce8071f79b3e188093dc8dc53c0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 15 09:56:18 2017 +0800

    rockchip: rk322x: reserve memory for trsut TA
    
    Change-Id: I10f271018b8aaaaeac4f23680b099b2df1947ab4
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 1c931b03d7..137479eb7d 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -61,9 +61,9 @@ int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 0x200000 for OPTEE */
+	/* Reserve 32M for OPTEE with TA */
 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0x200000;
+				+ gd->bd->bi_dram[0].size + 0x2000000;
 	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
 				+ gd->ram_size - gd->bd->bi_dram[1].start;
 

commit f5af8671dfbc99b1b7aa8ef66d922acb86f34abb
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jul 25 16:55:19 2017 +0800

    rockchip: enable fastboot for firefly
    
    Change-Id: I8f0cbe975e8d63de3988bad7fe8593d460372cc9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index da9741c292..5d228af96c 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -23,7 +23,14 @@ CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
+CONFIG_FASTBOOT=y
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_CMD_LOAD_ANDROID=y
+CONFIG_CMD_BOOT_ANDROID=y
 # CONFIG_CMD_IMLS is not set
+CONFIG_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -85,9 +92,21 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_VBUS_DRAW=0
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330c
-CONFIG_ERRNO_STR=y
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0xd00d
+CONFIG_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_CMD_USB_MASS_STORAGE=y

commit 16d3892d4475248226624ef79474611db7095c7f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jul 25 16:52:03 2017 +0800

    fastboot: mmc: add response for all ack
    
    To pass the build.
    
    Change-Id: Ifafbb3bd586f4ff0a7def210720e4db16064ec4d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index a499bc4ffe..6fddf5e86f 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -141,7 +141,8 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
  */
 static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 				       disk_partition_t *info,
-				       struct andr_img_hdr *hdr)
+				       struct andr_img_hdr *hdr,
+				       char *response)
 {
 	ulong sector_size;		/* boot partition sector size */
 	lbaint_t hdr_sectors;		/* boot image header sectors count */
@@ -152,7 +153,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	hdr_sectors = DIV_ROUND_UP(sizeof(struct andr_img_hdr), sector_size);
 	if (hdr_sectors == 0) {
 		error("invalid number of boot sectors: 0");
-		fastboot_fail("invalid number of boot sectors: 0");
+		fastboot_fail("invalid number of boot sectors: 0", response);
 		return 0;
 	}
 
@@ -160,7 +161,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	res = blk_dread(dev_desc, info->start, hdr_sectors, (void *)hdr);
 	if (res != hdr_sectors) {
 		error("cannot read header from boot partition");
-		fastboot_fail("cannot read header from boot partition");
+		fastboot_fail("cannot read header from boot partition", response);
 		return 0;
 	}
 
@@ -168,7 +169,7 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
 	res = android_image_check_header(hdr);
 	if (res != 0) {
 		error("bad boot image magic");
-		fastboot_fail("boot partition not initialized");
+		fastboot_fail("boot partition not initialized", response);
 		return 0;
 	}
 
@@ -186,7 +187,8 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
  */
 static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 				void *download_buffer,
-				unsigned int download_bytes)
+				unsigned int download_bytes,
+				char *response)
 {
 	uintptr_t hdr_addr;			/* boot image header address */
 	struct andr_img_hdr *hdr;		/* boot image header */
@@ -206,7 +208,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = part_get_info_by_name(dev_desc, BOOT_PARTITION_NAME, &info);
 	if (res < 0) {
 		error("cannot find boot partition");
-		fastboot_fail("cannot find boot partition");
+		fastboot_fail("cannot find boot partition", response);
 		return -1;
 	}
 
@@ -215,17 +217,17 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	hdr = (struct andr_img_hdr *)hdr_addr;
 
 	/* Read boot image header */
-	hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr);
+	hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr, response);
 	if (hdr_sectors == 0) {
 		error("unable to read boot image header");
-		fastboot_fail("unable to read boot image header");
+		fastboot_fail("unable to read boot image header", response);
 		return -1;
 	}
 
 	/* Check if boot image has second stage in it (we don't support it) */
 	if (hdr->second_size > 0) {
 		error("moving second stage is not supported yet");
-		fastboot_fail("moving second stage is not supported yet");
+		fastboot_fail("moving second stage is not supported yet", response);
 		return -1;
 	}
 
@@ -243,7 +245,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 			ramdisk_buffer);
 	if (res != ramdisk_sectors) {
 		error("cannot read ramdisk from boot partition");
-		fastboot_fail("cannot read ramdisk from boot partition");
+		fastboot_fail("cannot read ramdisk from boot partition", response);
 		return -1;
 	}
 
@@ -252,7 +254,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	res = blk_dwrite(dev_desc, info.start, hdr_sectors, (void *)hdr);
 	if (res == 0) {
 		error("cannot writeback boot image header");
-		fastboot_fail("cannot write back boot image header");
+		fastboot_fail("cannot write back boot image header", response);
 		return -1;
 	}
 
@@ -264,7 +266,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 			 download_buffer);
 	if (res == 0) {
 		error("cannot write new kernel");
-		fastboot_fail("cannot write new kernel");
+		fastboot_fail("cannot write new kernel", response);
 		return -1;
 	}
 
@@ -276,12 +278,12 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 			 ramdisk_buffer);
 	if (res == 0) {
 		error("cannot write back original ramdisk");
-		fastboot_fail("cannot write back original ramdisk");
+		fastboot_fail("cannot write back original ramdisk", response);
 		return -1;
 	}
 
 	puts("........ zImage was updated in boot partition\n");
-	fastboot_okay("");
+	fastboot_okay("", response);
 	return 0;
 }
 #endif
@@ -327,23 +329,23 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 		if (is_valid_dos_buf(download_buffer)) {
 			printf("%s: invalid MBR - refusing to write to flash\n",
 			       __func__);
-			fastboot_fail("invalid MBR partition");
+			fastboot_fail("invalid MBR partition", response);
 			return;
 		}
 		if (write_mbr_partition(dev_desc, download_buffer)) {
 			printf("%s: writing MBR partition failed\n", __func__);
-			fastboot_fail("writing MBR partition failed");
+			fastboot_fail("writing MBR partition failed", response);
 			return;
 		}
 		printf("........ success\n");
-		fastboot_okay("");
+		fastboot_okay("", response);
 		return;
 	}
 #endif
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
 	if (strncasecmp(cmd, "zimage", 6) == 0) {
-		fb_mmc_update_zimage(dev_desc, download_buffer, download_bytes);
+		fb_mmc_update_zimage(dev_desc, download_buffer, download_bytes, response);
 		return;
 	}
 #endif

commit 46eed855886811b48055ebd26652b1b6828f6f97
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Jul 25 16:51:00 2017 +0800

    android: do not compile android boot in SPL
    
    Change-Id: I2797754e320255f751aa9d02f168031dcaa50fb9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/Makefile b/common/Makefile
index 463042f1a0..232cd85213 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -100,11 +100,11 @@ obj-y += malloc_simple.o
 endif
 endif
 obj-y += image.o
-obj-$(CONFIG_ANDROID_AB) += android_ab.o
-obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
+obj-$(CONFIG_$(SPL_TPL_)ANDROID_AB) += android_ab.o
+obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOT_IMAGE) += image-android.o
+obj-$(CONFIG_$(SPL_TPL_)ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
-obj-$(CONFIG_ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o

commit a49a0552269958a5623fae5da5b6d3fc21c8da55
Author: Alex Deymo <deymo@google.com>
Date:   Fri Apr 21 18:03:08 2017 -0700

    android: Pass the ramdisk to the kernel.
    
    Android kernel image format can include an initramfs image in the same
    kernel partition. This patch passes the initramfs to the kernel, which
    in the normal boot mode ignores it by passing "skip_initramfs" in the
    command line.
    
    Bug: 34346003
    Test: `am broadcast -a android.intent.action.MASTER_CLEAR` factory
    reseted the device.
    
    Change-Id: I21d89e34a0f54badf3b2e3ad8981cef75f6d5edf

diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 8ed3b378d6..fbfe3de50c 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -161,7 +161,8 @@ static int android_bootloader_boot_kernel(unsigned long kernel_address)
 {
 	char kernel_addr_str[12];
 	char *fdt_addr = env_get("fdt_addr");
-	char *bootm_args[] = { "bootm", kernel_addr_str, "-", fdt_addr, NULL };
+	char *bootm_args[] = {
+		"bootm", kernel_addr_str, kernel_addr_str, fdt_addr, NULL };
 
 	sprintf(kernel_addr_str, "0x%lx", kernel_address);
 

commit df6f4a1cdf82bcd055fc1a815251d47324102371
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Apr 4 15:34:27 2017 -0700

    fastboot: Handle getvar for partition-size
    
    Bug: 36889156
    Test: Ran 'getvar partition-size:<partition>' for all partitions on rpi3
    Change-Id: Id85a1164ab382f43201a08d3f9d86eb42ad1e3cd

diff --git a/net/fastboot.c b/net/fastboot.c
index a5d059bb08..4ec3f09db0 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -280,19 +280,24 @@ static void fb_getvar(char *response)
 		} else {
 			write_fb_response("OKAY", "no", response);
 		}
-	} else if (!strncmp("partition-type", cmd_parameter, 14)) {
+	} else if (!strncmp("partition-type", cmd_parameter, 14) ||
+		   !strncmp("partition-size", cmd_parameter, 14)) {
 		disk_partition_t part_info;
 		struct blk_desc *dev_desc;
 		char *part_name = cmd_parameter;
+		char part_size_str[20];
 
 		cmd_parameter = strsep(&part_name, ":");
 		dev_desc = blk_get_dev("mmc", 0);
-		if (dev_desc == NULL) {
+		if (!dev_desc) {
 			write_fb_response("FAIL", "block device not found", response);
 		} else if (part_get_info_efi_by_name(dev_desc, part_name, &part_info) < 0) {
 			write_fb_response("FAIL", "partition not found", response);
-		} else {
+		} else if (!strncmp("partition-type", cmd_parameter, 14)) {
 			write_fb_response("OKAY", (char*)part_info.type, response);
+		} else if (!strncmp("partition-size", cmd_parameter, 14)) {
+			sprintf(part_size_str, "0x%016x", (int)part_info.size);
+			write_fb_response("OKAY", part_size_str, response);
 		}
 	} else {
 		printf("WARNING: unknown variable: %s\n", cmd_parameter);

commit 170e9eb9d1a08bef196b8c4ded4119cb531a8c1c
Author: Alex Deymo <deymo@google.com>
Date:   Sat Apr 1 23:00:59 2017 -0700

    android: Fix off-by-one error when joining strings
    
    When concatenating the strings to form a new command line in the
    android bootloader flow, the null-terminator was placed one byte after
    the end of the allocated string.
    
    Bug: None
    Test: booted a rpi3.
    Change-Id: I120e09a77bb1c27980e7ce2b5f9b8961424ed0c3

diff --git a/cmd/android_ab_select.c b/cmd/android_ab_select.c
index 512fa48d90..2e3a3116ba 100644
--- a/cmd/android_ab_select.c
+++ b/cmd/android_ab_select.c
@@ -35,7 +35,7 @@ static int do_android_ab_select(cmd_tbl_t *cmdtp, int flag, int argc,
 	/* Android standard slot names are 'a', 'b', ... */
 	slot[0] = ANDROID_BOOT_SLOT_NAME(ret);
 	slot[1] = '\0';
-	setenv(argv[1], slot);
+	env_set(argv[1], slot);
 	printf("ANDROID: Booting slot: %s\n", slot);
 	return CMD_RET_SUCCESS;
 }
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index 5c659c7576..8ed3b378d6 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -200,7 +200,8 @@ static char *strjoin(const char **chunks, char separator)
 		*current = separator;
 		current++;
 	}
-	*current = '\0';
+	/* Replace the last separator by a \0. */
+	current[-1] = '\0';
 	return ret;
 }
 

commit 180cc7c60133d7a54b43ddb99014424402d0339e
Author: Alex Deymo <deymo@google.com>
Date:   Fri Mar 24 23:05:29 2017 -0700

    android: Implement A/B slot select.
    
    The android_bootloader_control struct defined in bootloader_message.h
    stored the A/B metadata used to decide which slot should we use to boot
    the device. This patch implements the bootloader side of the slot
    selection in a new "android_ab_select" command which decides the
    current slot and updates the metadata as needed.
    
    Bug: 32707546
    Test: Booted a rpi3, updated to the other slot.
    Change-Id: I9344ff5b76194160d2b466a50e84f4f423b1a98a

diff --git a/cmd/Kconfig b/cmd/Kconfig
index e989873deb..502002de95 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -762,6 +762,17 @@ config CMD_BOOT_ANDROID
 	  and booting it. The boot mode is determined by the contents of the
 	  Android Bootloader Message.
 
+config CMD_ANDROID_AB_SELECT
+	bool "android_ab_select"
+	default n
+	depends on ANDROID_AB
+	help
+	  On Android devices with more than one boot slot (multiple copies of
+	  the kernel and system images) this provides a command to select which
+	  slot should be used to boot from and register the boot attempt. This
+	  is used by the new A/B update model where one slot is updated in the
+	  background while running from the other slot.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index 8f19d7dfe5..29fb14aa25 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -14,6 +14,8 @@ obj-y += version.o
 
 # command
 obj-$(CONFIG_CMD_AES) += aes.o
+obj-$(CONFIG_CMD_AMBAPP) += ambapp.o
+obj-$(CONFIG_CMD_ANDROID_AB_SELECT) += android_ab_select.o android_cmds.o
 obj-$(CONFIG_CMD_ARMFLASH) += armflash.o
 obj-y += blk_common.o
 obj-$(CONFIG_SOURCE) += source.o
@@ -77,7 +79,7 @@ obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
 obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
-obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o
+obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o android_cmds.o
 obj-$(CONFIG_LOGBUFFER) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
diff --git a/cmd/android_ab_select.c b/cmd/android_ab_select.c
new file mode 100644
index 0000000000..512fa48d90
--- /dev/null
+++ b/cmd/android_ab_select.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_cmds.h>
+#include <android_ab.h>
+#include <common.h>
+#include <command.h>
+
+static int do_android_ab_select(cmd_tbl_t *cmdtp, int flag, int argc,
+				char * const argv[])
+{
+	int ret;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	char slot[2];
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	/* Lookup the "misc" partition from argv[2] and argv[3] */
+	if (part_get_info_by_dev_and_name_or_num(argv[2], argv[3],
+						 &dev_desc, &part_info) < 0) {
+		return CMD_RET_FAILURE;
+	}
+
+	ret = android_ab_select(dev_desc, &part_info);
+	if (ret < 0) {
+		printf("Android boot failed, error %d.\n", ret);
+		return CMD_RET_FAILURE;
+	}
+
+	/* Android standard slot names are 'a', 'b', ... */
+	slot[0] = ANDROID_BOOT_SLOT_NAME(ret);
+	slot[1] = '\0';
+	setenv(argv[1], slot);
+	printf("ANDROID: Booting slot: %s\n", slot);
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+	android_ab_select, 4, 0, do_android_ab_select,
+	"Select the slot used to boot from and register the boot attempt.",
+	"<slot_var_name> <interface> <dev[:part|;part_name]>\n"
+	"    - Load the slot metadata from the partition 'part' on\n"
+	"      device type 'interface' instance 'dev' and store the active\n"
+	"      slot in the 'slot_var_name' variable. This also updates the\n"
+	"      Android slot metadata with a boot attempt, which can cause\n"
+	"      successive calls to this function to return a different result\n"
+	"      if the returned slot runs out of boot attempts.\n"
+	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
+	"      partition name whose label is 'part_name' will be looked up in\n"
+	"      the partition table. This is commonly the \"misc\" partition.\n"
+);
diff --git a/cmd/android_cmds.c b/cmd/android_cmds.c
new file mode 100644
index 0000000000..95265773ae
--- /dev/null
+++ b/cmd/android_cmds.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_cmds.h>
+
+#include <common.h>
+#include <part.h>
+
+/**
+ * part_get_info_by_dev_and_name - Parse a device number and partition name
+ * string in the form of "device_num;partition_name", for example "0;misc".
+ * If the partition is found, sets dev_desc and part_info accordingly with the
+ * information of the partition with the given partition_name.
+ *
+ * @dev_iface:		Device interface.
+ * @dev_part_str:	Input string argument, like "0;misc".
+ * @dev_desc:		Place to store the device description pointer.
+ * @part_info:		Place to store the partition information.
+ * @return 0 on success, or -1 on error
+ */
+static int part_get_info_by_dev_and_name(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info)
+{
+	char *ep;
+	const char *part_str;
+	int dev_num;
+
+	part_str = strchr(dev_part_str, ';');
+	if (!part_str || part_str == dev_part_str)
+		return -1;
+
+	dev_num = simple_strtoul(dev_part_str, &ep, 16);
+	if (ep != part_str) {
+		/* Not all the first part before the ; was parsed. */
+		return -1;
+	}
+	part_str++;
+
+	*dev_desc = blk_get_dev(dev_iface, dev_num);
+	if (!*dev_desc) {
+		printf("Could not find %s %d\n", dev_iface, dev_num);
+		return -1;
+	}
+	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", part_str);
+		return -1;
+	}
+	return 0;
+}
+
+int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info) {
+	/* Split the part_name if passed as "$dev_num;part_name". */
+	if (!part_get_info_by_dev_and_name(dev_iface, dev_part_str,
+					   dev_desc, part_info))
+		return 0;
+	/* Couldn't lookup by name, try looking up the partition description
+	 * directly.
+	 */
+	if (blk_get_device_part_str(dev_iface, dev_part_str,
+				    dev_desc, part_info, 1) < 0) {
+		printf("Couldn't find partition %s %s\n",
+		       dev_iface, dev_part_str);
+		return -1;
+	}
+	return 0;
+}
diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index a2148e0238..0da6a7d056 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -5,53 +5,10 @@
  */
 
 #include <android_bootloader.h>
+#include <android_cmds.h>
 #include <common.h>
 #include <command.h>
 
-/**
- * part_get_info_by_dev_and_name - Parse a device number and partition name
- * string in the form of "device_num;partition_name", for example "0;misc".
- * If the partition is found, sets dev_desc and part_info accordingly with the
- * information of the partition with the given partition_name.
- *
- * @dev_iface:		Device interface.
- * @dev_part_str:	Input string argument, like "0;misc".
- * @dev_desc:		Place to put the device description pointer.
- * @part_info:		Place to put the partition information.
- * @return 0 on success, or -1 on error
- */
-static int part_get_info_by_dev_and_name(const char *dev_iface,
-					 const char *dev_part_str,
-					 struct blk_desc **dev_desc,
-					 disk_partition_t *part_info)
-{
-	char *ep;
-	const char *part_str;
-	int dev_num;
-
-	part_str = strchr(dev_part_str, ';');
-	if (!part_str)
-		return -1;
-
-	dev_num = simple_strtoul(dev_part_str, &ep, 16);
-	if (ep != part_str) {
-		/* Not all the first part before the ; was parsed. */
-		return -1;
-	}
-	part_str++;
-
-	*dev_desc = blk_get_dev(dev_iface, dev_num);
-	if (!*dev_desc) {
-		printf("Could not find %s %d\n", dev_iface, dev_num);
-		return -1;
-	}
-	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
-		printf("Could not find \"%s\" partition\n", part_str);
-		return -1;
-	}
-	return 0;
-}
-
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
 {
@@ -60,8 +17,6 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	char *addr_arg_endp, *addr_str;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
-	const char *misc_part_iface;
-	const char *misc_part_desc;
 
 	if (argc < 4)
 		return CMD_RET_USAGE;
@@ -80,21 +35,9 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			load_address = CONFIG_SYS_LOAD_ADDR;
 	}
 
-	/* Lookup the "misc" partition from argv[1] and argv[2] */
-	misc_part_iface = argv[1];
-	misc_part_desc = argv[2];
-	/* Split the part_name if passed as "$dev_num;part_name". */
-	if (part_get_info_by_dev_and_name(misc_part_iface, misc_part_desc,
-					  &dev_desc, &part_info) < 0) {
-		/* Couldn't lookup by name from mmc, try looking up the
-		 * partition description directly.
-		 */
-		if (blk_get_device_part_str(misc_part_iface, misc_part_desc,
-					    &dev_desc, &part_info, 1) < 0) {
-			printf("Couldn't find partition %s %s\n",
-			       misc_part_iface, misc_part_desc);
-			return CMD_RET_FAILURE;
-		}
+	if (part_get_info_by_dev_and_name_or_num(argv[1], argv[2],
+						 &dev_desc, &part_info) < 0) {
+		return CMD_RET_FAILURE;
 	}
 
 	ret = android_bootloader_boot_flow(dev_desc, &part_info, argv[3],
diff --git a/common/Kconfig b/common/Kconfig
index f36ba427ed..fec9afff24 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -482,6 +482,16 @@ config ANDROID_BOOTLOADER
 	  recovery mode or bootloader mode) and, if enabled, the slot to boot
 	  from in devices with multiple boot slots (A/B devices).
 
+config ANDROID_AB
+	bool "Support for Android A/B updates"
+	default n
+	help
+	  If enabled, adds support for the new Android A/B update model. This
+	  allows the bootloader to select which slot to boot from based on the
+	  information provided by userspace via the Android boot_ctrl HAL. This
+	  allows a bootloader to try a new version of the system but roll back
+	  to previous version if the new one didn't boot all the way.
+
 config ANDROID_BOOT_IMAGE
 	bool "Enable support for Android Boot Images"
 	help
diff --git a/common/Makefile b/common/Makefile
index 5f936fdc53..463042f1a0 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -100,6 +100,7 @@ obj-y += malloc_simple.o
 endif
 endif
 obj-y += image.o
+obj-$(CONFIG_ANDROID_AB) += android_ab.o
 obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
diff --git a/common/android_ab.c b/common/android_ab.c
new file mode 100644
index 0000000000..cfbf5301a5
--- /dev/null
+++ b/common/android_ab.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_ab.h>
+
+#include <android_bootloader_message.h>
+#include <common.h>
+#include <malloc.h>
+#include <u-boot/crc.h>
+
+/** android_boot_control_compute_crc - Compute the CRC-32 of the bootloader
+ * control struct. Only the bytes up to the crc32_le field are considered for
+ * the CRC-32 calculation.
+ */
+static uint32_t android_boot_control_compute_crc(
+		struct android_bootloader_control *abc)
+{
+	return crc32(0, (void *)abc, offsetof(typeof(*abc), crc32_le));
+}
+
+/** android_boot_control_default - Initialize android_bootloader_control to the
+ * default value which allows to boot all slots in order from the first one.
+ * This value should be used when the bootloader message is corrupted, but not
+ * when a valid message indicates that all slots are unbootable.
+ */
+void android_boot_control_default(struct android_bootloader_control *abc)
+{
+	int i;
+	const struct android_slot_metadata metadata = {
+		.priority = 15,
+		.tries_remaining = 7,
+		.successful_boot = 0,
+		.verity_corrupted = 0,
+		.reserved = 0
+	};
+	memcpy(abc->slot_suffix, "a\0\0\0", 4);
+	abc->magic = ANDROID_BOOT_CTRL_MAGIC;
+	abc->version = ANDROID_BOOT_CTRL_VERSION;
+	abc->nb_slot = ARRAY_SIZE(abc->slot_info);
+	memset(abc->reserved0, 0, sizeof(abc->reserved0));
+	for (i = 0; i < abc->nb_slot; ++i) {
+		abc->slot_info[i] = metadata;
+	}
+	memset(abc->reserved1, 0, sizeof(abc->reserved1));
+	abc->crc32_le = android_boot_control_compute_crc(abc);
+}
+
+/** android_boot_control_create_from_disk
+ * Load the boot_control struct from disk into newly allocated memory. This
+ * function allocates and returns an integer number of disk blocks, based on the
+ * block size of the passed device to help performing a read-modify-write
+ * operation on the boot_control struct. The boot_control struct offset (2 KiB)
+ * must be a multiple of the device block size, for simplicity.
+ * @dev_desc: device where to read the boot_control struct from.
+ * @part_info: partition in 'dev_desc' where to read from, normally the "misc"
+ *             partition should be used.
+ */
+static void *android_boot_control_create_from_disk(
+		struct blk_desc *dev_desc,
+		const disk_partition_t *part_info)
+{
+	ulong abc_offset, abc_blocks;
+	void *buf;
+
+	abc_offset = offsetof(struct android_bootloader_message_ab,
+			      slot_suffix);
+	if (abc_offset % part_info->blksz) {
+		printf("ANDROID: Boot control block not block aligned.\n");
+		return NULL;
+	}
+	abc_offset /= part_info->blksz;
+
+	abc_blocks = DIV_ROUND_UP(sizeof(struct android_bootloader_control),
+				  part_info->blksz);
+	if (abc_offset + abc_blocks > part_info->size) {
+		printf("ANDROID: boot control partition too small. Need at"
+		       " least %lu blocks but have %lu blocks.\n",
+		       abc_offset + abc_blocks, part_info->size);
+		return NULL;
+	}
+	buf = malloc(abc_blocks * part_info->blksz);
+	if (!buf)
+		return NULL;
+
+	if (blk_dread(dev_desc, part_info->start + abc_offset, abc_blocks,
+		      buf) != abc_blocks) {
+		printf("ANDROID: Could not read from boot control partition\n");
+		free(buf);
+		return NULL;
+	}
+	debug("ANDROID: Loaded ABC, %lu blocks.\n", abc_blocks);
+	return buf;
+}
+
+/** android_boot_control_store
+ * Store the loaded boot_control block back to the same location it was read
+ * from with android_boot_control_create_from_misc().
+ *
+ * @abc_data_block: pointer to the boot_control struct and the extra bytes after
+ *                  it up to the nearest block boundary.
+ * @dev_desc: device where we should write the boot_control struct.
+ * @part_info: partition on the 'dev_desc' where to write.
+ * @return 0 on success and -1 on error.
+ */
+static int android_boot_control_store(void *abc_data_block,
+				      struct blk_desc *dev_desc,
+				      const disk_partition_t *part_info)
+{
+	ulong abc_offset, abc_blocks;
+
+	abc_offset = offsetof(struct android_bootloader_message_ab,
+			      slot_suffix) / part_info->blksz;
+	abc_blocks = DIV_ROUND_UP(sizeof(struct android_bootloader_control),
+				  part_info->blksz);
+	if (blk_dwrite(dev_desc, part_info->start + abc_offset, abc_blocks,
+		       abc_data_block) != abc_blocks) {
+		printf("ANDROID: Could not write back the misc partition\n");
+		return -1;
+	}
+	return 0;
+}
+
+/** android_boot_compare_slots - compares two slots returning which slot is
+ * should we boot from among the two.
+ * @a: The first bootable slot metadata
+ * @b: The second bootable slot metadata
+ * @return negative if the slot "a" is better, positive of the slot "b" is
+ * better or 0 if they are equally good.
+ */
+static int android_ab_compare_slots(const struct android_slot_metadata *a,
+				    const struct android_slot_metadata *b)
+{
+	/* Higher priority is better */
+	if (a->priority != b->priority)
+		return b->priority - a->priority;
+
+	/* Higher successful_boot value is better, in case of same priority. */
+	if (a->successful_boot != b->successful_boot)
+		return b->successful_boot - a->successful_boot;
+
+	/* Higher tries_remaining is better to ensure round-robin. */
+	if (a->tries_remaining != b->tries_remaining)
+		return b->tries_remaining - a->tries_remaining;
+
+	return 0;
+}
+
+int android_ab_select(struct blk_desc *dev_desc, disk_partition_t *part_info)
+{
+	struct android_bootloader_control *abc;
+	u32 crc32_le;
+	int slot, i;
+	bool store_needed = false;
+	char slot_suffix[4];
+
+	abc = android_boot_control_create_from_disk(dev_desc, part_info);
+	if (!abc) {
+		/* This condition represents an actual problem with the code
+		 * or the board setup, like an invalid partition information.
+		 * Signal a repair mode and do not try to boot from either
+		 * slot.
+		 */
+		return -1;
+	}
+
+	crc32_le = android_boot_control_compute_crc(abc);
+	if (abc->crc32_le != crc32_le) {
+		printf("ANDROID: Invalid CRC-32 (expected %.8x, found %.8x), "
+		       "re-initializing A/B metadata.\n",
+		       crc32_le, abc->crc32_le);
+		android_boot_control_default(abc);
+		store_needed = true;
+	}
+
+	if (abc->magic != ANDROID_BOOT_CTRL_MAGIC) {
+		printf("ANDROID: Unknown A/B metadata: %.8x\n", abc->magic);
+		free(abc);
+		return -1;
+	}
+
+	if (abc->version > ANDROID_BOOT_CTRL_VERSION) {
+		printf("ANDROID: Unsupported A/B metadata version: %.8x\n",
+		       abc->version);
+		free(abc);
+		return -1;
+	}
+
+	/* At this point a valid boot control metadata is stored in abc,
+	 * followed by other reserved data in the same block.
+	 * We select a with the higher priority slot that
+	 *  - is not marked as corrupted and
+	 *  - either has tries_remaining > 0 or successful_boot is true.
+	 * If the slot selected has a false successful_boot, we also decrement
+	 * the tries_remaining until it eventually becomes unbootable because
+	 * tries_remaining reaches 0. This mechanism produces a bootloader
+	 * induced rollback, typically right after a failed update.
+	 */
+
+	/* Safety check: limit the number of slots. */
+	if (abc->nb_slot > ARRAY_SIZE(abc->slot_info)) {
+		abc->nb_slot = ARRAY_SIZE(abc->slot_info);
+		store_needed = true;
+	}
+
+	slot = -1;
+	for (i = 0; i < abc->nb_slot; ++i) {
+		if (abc->slot_info[i].verity_corrupted ||
+		    !abc->slot_info[i].tries_remaining) {
+			debug("ANDROID: unbootable slot %d tries: %d, "
+			      "corrupt: %d\n",
+			      i,
+			      abc->slot_info[i].tries_remaining,
+			      abc->slot_info[i].verity_corrupted);
+			continue;
+		}
+		debug("ANDROID: bootable slot %d pri: %d, tries: %d, "
+		      "corrupt: %d, successful: %d\n",
+		      i,
+		      abc->slot_info[i].priority,
+		      abc->slot_info[i].tries_remaining,
+		      abc->slot_info[i].verity_corrupted,
+		      abc->slot_info[i].successful_boot);
+
+		if (slot < 0 ||
+		    android_ab_compare_slots(&abc->slot_info[i],
+					     &abc->slot_info[slot]) < 0) {
+			slot = i;
+		}
+	}
+
+	if (slot >= 0 && !abc->slot_info[slot].successful_boot) {
+		printf("ANDROID: Attempting slot %c, tries remaining %d\n",
+		       ANDROID_BOOT_SLOT_NAME(slot),
+		       abc->slot_info[slot].tries_remaining);
+		abc->slot_info[slot].tries_remaining--;
+		store_needed = true;
+	}
+
+	if (slot >= 0) {
+		/* Legacy user-space requires this field to be set in the BCB.
+		 * Newer releases load this the slot suffix from the command
+		 * line or the device tree.
+		 */
+		memset(slot_suffix, 0, sizeof(slot_suffix));
+		slot_suffix[0] = ANDROID_BOOT_SLOT_NAME(slot);
+		if (memcmp(abc->slot_suffix, slot_suffix,
+			   sizeof(slot_suffix))) {
+			memcpy(abc->slot_suffix, slot_suffix,
+			       sizeof(slot_suffix));
+			store_needed = true;
+		}
+	}
+
+	if (store_needed) {
+		abc->crc32_le = android_boot_control_compute_crc(abc);
+		android_boot_control_store(abc, dev_desc, part_info);
+	}
+	free(abc);
+
+	if (slot < 0)
+		return -1;
+	return slot;
+}
diff --git a/include/android_ab.h b/include/android_ab.h
new file mode 100644
index 0000000000..c264e9b948
--- /dev/null
+++ b/include/android_ab.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_AB_H
+#define __ANDROID_AB_H
+
+#include <common.h>
+
+/* Android standard boot slot names are 'a', 'b', 'c', ... */
+#define ANDROID_BOOT_SLOT_NAME(slot_num) ('a' + (slot_num))
+
+/** android_ab_select - Select the slot where to boot from.
+ * On Android devices with more than one boot slot (multiple copies of the
+ * kernel and system images) selects which slot should be used to boot from and
+ * registers the boot attempt. This is used in by the new A/B update model where
+ * one slot is updated in the background while running from the other slot. If
+ * the selected slot did not successfully boot in the past, a boot attempt is
+ * registered before returning from this function so it isn't selected
+ * indefinitely.
+ *
+ * @dev_desc:		Place to store the device description pointer.
+ * @part_info:		Place to store the partition information.
+ * @return the slot number (0-based) on success, or -1 on error.
+ */
+int android_ab_select(struct blk_desc *dev_desc, disk_partition_t *part_info);
+
+#endif
diff --git a/include/android_cmds.h b/include/android_cmds.h
new file mode 100644
index 0000000000..94df916835
--- /dev/null
+++ b/include/android_cmds.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2017 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_CMDS_H
+#define __ANDROID_CMDS_H
+
+#include <common.h>
+
+/**
+ * part_get_info_by_dev_and_name_or_num - Parse a device number and partition
+ * description (either name or number) in the form of device number plus
+ * partition name separated by a ";" (like "device_num;partition_name") or
+ * a device number plus a partition number separated by a ":". For example both
+ * "0;misc" and "0:1" can be valid partition descriptions for a given interface.
+ * If the partition is found, sets dev_desc and part_info accordingly with the
+ * information of the partition.
+ *
+ * @dev_iface:		Device interface.
+ * @dev_part_str:	Input partition description, like "0;misc" or "0:1".
+ * @dev_desc:		Place to store the device description pointer.
+ * @part_info:		Place to store the partition information.
+ * @return 0 on success, or -1 on error
+ */
+int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info);
+
+#endif

commit df7cce43619a94f77bb34c41cdc3d3336841d3e5
Author: Alex Deymo <deymo@google.com>
Date:   Fri Mar 24 22:17:26 2017 -0700

    boot_android: Drop the "mmc" restriction on the partition name.
    
    part_get_info_by_name() was extended to support more than just mmc/efi
    partitions. This patch remove this restriction from the
    part_get_info_by_dev_and_name() function.
    
    Bug: 32707546
    Test: Booted rpi3.
    Change-Id: If6399f7d24e99911b3b14a125a6bc1f472b7eecf

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 04573b10d1..a2148e0238 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -14,7 +14,7 @@
  * If the partition is found, sets dev_desc and part_info accordingly with the
  * information of the partition with the given partition_name.
  *
- * @dev_iface:		Device interface. Only "mmc" is supported at the moment.
+ * @dev_iface:		Device interface.
  * @dev_part_str:	Input string argument, like "0;misc".
  * @dev_desc:		Place to put the device description pointer.
  * @part_info:		Place to put the partition information.
@@ -25,15 +25,10 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 					 struct blk_desc **dev_desc,
 					 disk_partition_t *part_info)
 {
-#ifdef CONFIG_EFI_PARTITION
 	char *ep;
 	const char *part_str;
 	int dev_num;
 
-	/* We only support "mmc" for looking up partition names. */
-	if (strcmp(dev_iface, "mmc") != 0)
-		return -1;
-
 	part_str = strchr(dev_part_str, ';');
 	if (!part_str)
 		return -1;
@@ -45,9 +40,9 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 	}
 	part_str++;
 
-	*dev_desc = blk_get_dev("mmc", dev_num);
+	*dev_desc = blk_get_dev(dev_iface, dev_num);
 	if (!*dev_desc) {
-		printf("Could not find mmc %d\n", dev_num);
+		printf("Could not find %s %d\n", dev_iface, dev_num);
 		return -1;
 	}
 	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
@@ -55,9 +50,6 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 		return -1;
 	}
 	return 0;
-#else
-	return -1;
-#endif  /* CONFIG_EFI_PARTITION */
 }
 
 static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
@@ -117,12 +109,7 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 U_BOOT_CMD(
 	boot_android, 5, 0, do_boot_android,
 	"Execute the Android Bootloader flow.",
-	"<interface> <dev[:part"
-#if defined(CONFIG_EFI_PARTITION)
-	/* When EFI is enabled we also support looking up a partition name. */
-	"|;part_name"
-#endif	/* CONFIG_EFI_PARTITION */
-	"]> <slot> [<kernel_addr>]\n"
+	"<interface> <dev[:part|;part_name]> <slot> [<kernel_addr>]\n"
 	"    - Load the Boot Control Block (BCB) from the partition 'part' on\n"
 	"      device type 'interface' instance 'dev' to determine the boot\n"
 	"      mode, and load and execute the appropriate kernel.\n"
@@ -133,9 +120,7 @@ U_BOOT_CMD(
 	"      On Android devices with multiple slots, the pass 'slot' is\n"
 	"      used to load the appropriate kernel. The standard slot names\n"
 	"      are 'a' and 'b'.\n"
-#if defined(CONFIG_EFI_PARTITION)
 	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
 	"      partition name whose label is 'part_name' will be looked up in\n"
 	"      the partition table. This is commonly the \"misc\" partition.\n"
-#endif	/* CONFIG_EFI_PARTITION */
 );

commit 806222402666e6df9c63adc56ae6a22832c53b3f
Author: Alex Deymo <deymo@google.com>
Date:   Fri Mar 24 21:33:43 2017 -0700

    boot_android: Pass the slot from the command.
    
    In order to support booting from either slot, this patch passes the
    slot name from the command line.
    
    Bug: 32707546
    Test: Booted rpi3.
    Change-Id: I30582bd8b1b95dc0f25b0c6624e7909ee4118bd0

diff --git a/cmd/boot_android.c b/cmd/boot_android.c
index 0c6bbf1722..04573b10d1 100644
--- a/cmd/boot_android.c
+++ b/cmd/boot_android.c
@@ -71,14 +71,14 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	const char *misc_part_iface;
 	const char *misc_part_desc;
 
-	if (argc < 3)
+	if (argc < 4)
 		return CMD_RET_USAGE;
-	if (argc > 4)
+	if (argc > 5)
 		return CMD_RET_USAGE;
 
-	if (argc >= 4) {
-		load_address = simple_strtoul(argv[3], &addr_arg_endp, 16);
-		if (addr_arg_endp == argv[3] || *addr_arg_endp != '\0')
+	if (argc >= 5) {
+		load_address = simple_strtoul(argv[4], &addr_arg_endp, 16);
+		if (addr_arg_endp == argv[4] || *addr_arg_endp != '\0')
 			return CMD_RET_USAGE;
 	} else {
 		addr_str = env_get("loadaddr");
@@ -105,7 +105,8 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 		}
 	}
 
-	ret = android_bootloader_boot_flow(dev_desc, &part_info, load_address);
+	ret = android_bootloader_boot_flow(dev_desc, &part_info, argv[3],
+					   load_address);
 	if (ret < 0) {
 		printf("Android boot failed, error %d.\n", ret);
 		return CMD_RET_FAILURE;
@@ -114,14 +115,14 @@ static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 U_BOOT_CMD(
-	boot_android, 4, 0, do_boot_android,
+	boot_android, 5, 0, do_boot_android,
 	"Execute the Android Bootloader flow.",
 	"<interface> <dev[:part"
 #if defined(CONFIG_EFI_PARTITION)
 	/* When EFI is enabled we also support looking up a partition name. */
 	"|;part_name"
 #endif	/* CONFIG_EFI_PARTITION */
-	"]> [<kernel_addr>]\n"
+	"]> <slot> [<kernel_addr>]\n"
 	"    - Load the Boot Control Block (BCB) from the partition 'part' on\n"
 	"      device type 'interface' instance 'dev' to determine the boot\n"
 	"      mode, and load and execute the appropriate kernel.\n"
@@ -129,6 +130,9 @@ U_BOOT_CMD(
 	"      the corresponding \"boot\" partition. In bootloader mode, the\n"
 	"      command defined in the \"fastbootcmd\" variable will be\n"
 	"      executed.\n"
+	"      On Android devices with multiple slots, the pass 'slot' is\n"
+	"      used to load the appropriate kernel. The standard slot names\n"
+	"      are 'a' and 'b'.\n"
 #if defined(CONFIG_EFI_PARTITION)
 	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
 	"      partition name whose label is 'part_name' will be looked up in\n"
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
index a8b457a886..5c659c7576 100644
--- a/common/android_bootloader.c
+++ b/common/android_bootloader.c
@@ -126,12 +126,17 @@ static int android_part_get_info_by_name_suffix(struct blk_desc *dev_desc,
 {
 	char *part_name;
 	int part_num;
+	size_t part_name_len;
 
-	part_name = malloc(strlen(base_name) + strlen(slot_suffix) + 1);
+	part_name_len = strlen(base_name) + 1;
+	if (slot_suffix)
+		part_name_len += strlen(slot_suffix);
+	part_name = malloc(part_name_len);
 	if (!part_name)
 		return -1;
 	strcpy(part_name, base_name);
-	strcat(part_name, slot_suffix);
+	if (slot_suffix)
+		strcat(part_name, slot_suffix);
 
 	part_num = part_get_info_by_name(dev_desc, part_name, part_info);
 	if (part_num < 0) {
@@ -255,6 +260,7 @@ static char *android_assemble_cmdline(const char *slot_suffix,
 
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 const disk_partition_t *misc_part_info,
+				 const char *slot,
 				 unsigned long kernel_address)
 {
 	enum android_boot_mode mode;
@@ -263,8 +269,7 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 	int boot_part_num, system_part_num;
 	int ret;
 	char *command_line;
-	/* TODO: lookup the slot_suffix based on the BCB. */
-	const char *slot_suffix = "_a";
+	char slot_suffix[3];
 	const char *mode_cmdline = NULL;
 
 	/* Determine the boot mode and clear its value for the next boot if
@@ -294,6 +299,13 @@ int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 		return android_bootloader_boot_bootloader();
 	}
 
+	slot_suffix[0] = '\0';
+	if (slot && slot[0]) {
+		slot_suffix[0] = '_';
+		slot_suffix[1] = slot[0];
+		slot_suffix[2] = '\0';
+	}
+
 	/* Load the kernel from the desired "boot" partition. */
 	boot_part_num =
 	    android_part_get_info_by_name_suffix(dev_desc,
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
index 947913e547..ddf6d76f64 100644
--- a/include/android_bootloader.h
+++ b/include/android_bootloader.h
@@ -33,10 +33,16 @@ enum android_boot_mode {
  * The boot mode is determined by the contents of the Android Bootloader
  * Message. On success it doesn't return.
  *
+ * @dev_desc:		device where to load the kernel and system to boot from.
+ * @misc_part_info:	the "misc" partition descriptor in 'dev_desc'.
+ * @slot:		the boot slot to boot from.
+ * @kernel_address:	address where to load the kernel if needed.
+ *
  * @return a negative number in case of error, otherwise it doesn't return.
  */
 int android_bootloader_boot_flow(struct blk_desc *dev_desc,
 				 const disk_partition_t *misc_part_info,
+				 const char *slot,
 				 unsigned long kernel_address);
 
 #endif  /* __ANDROID_BOOTLOADER_H */

commit 06f4a8746e68c25013788a9d46f4abca1fd920a3
Author: Alex Deymo <deymo@google.com>
Date:   Thu Dec 1 14:21:51 2016 -0800

    Add "boot_android" command.
    
    The new "boot_android" command simply executes the Android Bootloader
    flow. This receives the location (interface, dev, partition) of the
    Android "misc" partition which is then used to lookup and infer the
    kernel and system images that should be booted.
    
    Bug: 32707546
    Test: Booted a rpi3 build with Android Things.
    Signed-off-by: Alex Deymo <deymo@google.com>
    
    Change-Id: Ibf3f31e38b159d42db7a0835b99ad7ec260fc2a7

diff --git a/README b/README
index c2818d6427..788564070e 100644
--- a/README
+++ b/README
@@ -1243,6 +1243,12 @@ The following options need to be configured:
 		sending again an USB request to the device.
 
 - Android Bootloader support:
+		CONFIG_CMD_BOOT_ANDROID
+		This enables the command "boot_android" which executes the
+		Android Bootloader flow. Enabling CONFIG_CMD_FASTBOOT is
+		recommended to support the Android Fastboot protocol as part
+		of the bootloader.
+
 		CONFIG_ANDROID_BOOTLOADER
 		This enables support for the Android bootloader flow. Android
 		devices can boot in normal mode, recovery mode or bootloader
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 833d98d8c6..e989873deb 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -752,6 +752,16 @@ config CMD_LOAD_ANDROID
 	  define the size and kernel address on the header, which are used by
 	  this command.
 
+config CMD_BOOT_ANDROID
+	bool "boot_android"
+	default n
+	depends on ANDROID_BOOTLOADER
+	help
+	  Performs the Android Bootloader boot flow, loading the appropriate
+	  Android image (normal kernel, recovery kernel or "bootloader" mode)
+	  and booting it. The boot mode is determined by the contents of the
+	  Android Bootloader Message.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index f1c412160d..8f19d7dfe5 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_CMD_BDI) += bdinfo.o
 obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
 obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o
 obj-$(CONFIG_CMD_BMP) += bmp.o
+obj-$(CONFIG_CMD_BOOT_ANDROID) += boot_android.o
 obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o
 obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o
 obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o
diff --git a/cmd/boot_android.c b/cmd/boot_android.c
new file mode 100644
index 0000000000..0c6bbf1722
--- /dev/null
+++ b/cmd/boot_android.c
@@ -0,0 +1,137 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_bootloader.h>
+#include <common.h>
+#include <command.h>
+
+/**
+ * part_get_info_by_dev_and_name - Parse a device number and partition name
+ * string in the form of "device_num;partition_name", for example "0;misc".
+ * If the partition is found, sets dev_desc and part_info accordingly with the
+ * information of the partition with the given partition_name.
+ *
+ * @dev_iface:		Device interface. Only "mmc" is supported at the moment.
+ * @dev_part_str:	Input string argument, like "0;misc".
+ * @dev_desc:		Place to put the device description pointer.
+ * @part_info:		Place to put the partition information.
+ * @return 0 on success, or -1 on error
+ */
+static int part_get_info_by_dev_and_name(const char *dev_iface,
+					 const char *dev_part_str,
+					 struct blk_desc **dev_desc,
+					 disk_partition_t *part_info)
+{
+#ifdef CONFIG_EFI_PARTITION
+	char *ep;
+	const char *part_str;
+	int dev_num;
+
+	/* We only support "mmc" for looking up partition names. */
+	if (strcmp(dev_iface, "mmc") != 0)
+		return -1;
+
+	part_str = strchr(dev_part_str, ';');
+	if (!part_str)
+		return -1;
+
+	dev_num = simple_strtoul(dev_part_str, &ep, 16);
+	if (ep != part_str) {
+		/* Not all the first part before the ; was parsed. */
+		return -1;
+	}
+	part_str++;
+
+	*dev_desc = blk_get_dev("mmc", dev_num);
+	if (!*dev_desc) {
+		printf("Could not find mmc %d\n", dev_num);
+		return -1;
+	}
+	if (part_get_info_by_name(*dev_desc, part_str, part_info) < 0) {
+		printf("Could not find \"%s\" partition\n", part_str);
+		return -1;
+	}
+	return 0;
+#else
+	return -1;
+#endif  /* CONFIG_EFI_PARTITION */
+}
+
+static int do_boot_android(cmd_tbl_t *cmdtp, int flag, int argc,
+			   char * const argv[])
+{
+	unsigned long load_address;
+	int ret = CMD_RET_SUCCESS;
+	char *addr_arg_endp, *addr_str;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+	const char *misc_part_iface;
+	const char *misc_part_desc;
+
+	if (argc < 3)
+		return CMD_RET_USAGE;
+	if (argc > 4)
+		return CMD_RET_USAGE;
+
+	if (argc >= 4) {
+		load_address = simple_strtoul(argv[3], &addr_arg_endp, 16);
+		if (addr_arg_endp == argv[3] || *addr_arg_endp != '\0')
+			return CMD_RET_USAGE;
+	} else {
+		addr_str = env_get("loadaddr");
+		if (addr_str)
+			load_address = simple_strtoul(addr_str, NULL, 16);
+		else
+			load_address = CONFIG_SYS_LOAD_ADDR;
+	}
+
+	/* Lookup the "misc" partition from argv[1] and argv[2] */
+	misc_part_iface = argv[1];
+	misc_part_desc = argv[2];
+	/* Split the part_name if passed as "$dev_num;part_name". */
+	if (part_get_info_by_dev_and_name(misc_part_iface, misc_part_desc,
+					  &dev_desc, &part_info) < 0) {
+		/* Couldn't lookup by name from mmc, try looking up the
+		 * partition description directly.
+		 */
+		if (blk_get_device_part_str(misc_part_iface, misc_part_desc,
+					    &dev_desc, &part_info, 1) < 0) {
+			printf("Couldn't find partition %s %s\n",
+			       misc_part_iface, misc_part_desc);
+			return CMD_RET_FAILURE;
+		}
+	}
+
+	ret = android_bootloader_boot_flow(dev_desc, &part_info, load_address);
+	if (ret < 0) {
+		printf("Android boot failed, error %d.\n", ret);
+		return CMD_RET_FAILURE;
+	}
+	return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+	boot_android, 4, 0, do_boot_android,
+	"Execute the Android Bootloader flow.",
+	"<interface> <dev[:part"
+#if defined(CONFIG_EFI_PARTITION)
+	/* When EFI is enabled we also support looking up a partition name. */
+	"|;part_name"
+#endif	/* CONFIG_EFI_PARTITION */
+	"]> [<kernel_addr>]\n"
+	"    - Load the Boot Control Block (BCB) from the partition 'part' on\n"
+	"      device type 'interface' instance 'dev' to determine the boot\n"
+	"      mode, and load and execute the appropriate kernel.\n"
+	"      In normal and recovery mode, the kernel will be loaded from\n"
+	"      the corresponding \"boot\" partition. In bootloader mode, the\n"
+	"      command defined in the \"fastbootcmd\" variable will be\n"
+	"      executed.\n"
+#if defined(CONFIG_EFI_PARTITION)
+	"    - If 'part_name' is passed, preceded with a ; instead of :, the\n"
+	"      partition name whose label is 'part_name' will be looked up in\n"
+	"      the partition table. This is commonly the \"misc\" partition.\n"
+#endif	/* CONFIG_EFI_PARTITION */
+);

commit 67dac67453c08a760320a21ccd076abd47c9c9f1
Author: Alex Deymo <deymo@google.com>
Date:   Wed Nov 9 12:04:28 2016 -0800

    Initial support for the Android Bootloader flow
    
    An Android Bootloader must comply with certain boot modes and change
    the kernel command line accordingly. This patch introduces the Android
    boot mode concept which determines whether the device should boot to
    one of the following:
     * recovery: which should boot to the recovery image,
     * bootloader: which should boot to the "bootloader" (fastboot) and
     * normal: which should boot to the system image.
    
    The boot mode is determined in part by the Boot Control Block (BCB)
    which is stored at the beginning of the "misc" partition. The BCB
    is defined in the "bootloader_message.h" file in AOSP, now copied
    here as android_bootloader_message.h with minor modifications.
    
    This patch implements the basic boot flow that loads and boots an
    Android kernel image assuming an A/B device which implies that it uses
    boot as recovery (BOARD_USES_RECOVERY_AS_BOOT in the BoardConfig.mk).
    This means that the recovery image shares the same kernel with the
    normal boot system image, but stores the recovery image as a ramdisk
    which is not used in normal mode.
    
    Among the limitations, this patch doesn't implement the A/B slot
    selection, it only boots from the slot "a".
    
    Bug: 31887729
    Test: Booted a rpi3 with this flow.
    
    Signed-off-by: Alex Deymo <deymo@google.com>
    Change-Id: Ia2932c6f398f1ae713f0cd9670828f84103dca38
    update setenv/getenv to env_set/env_get.
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/README b/README
index a46850c808..c2818d6427 100644
--- a/README
+++ b/README
@@ -1242,6 +1242,68 @@ The following options need to be configured:
 		entering dfuMANIFEST state. Host waits this timeout, before
 		sending again an USB request to the device.
 
+- Android Bootloader support:
+		CONFIG_ANDROID_BOOTLOADER
+		This enables support for the Android bootloader flow. Android
+		devices can boot in normal mode, recovery mode or bootloader
+		mode. The normal mode is the most common boot mode, but
+		recovery mode is often used to perform factory reset and OTA
+		(over-the-air) updates in the legacy updater. Also it is
+		possible for an Android system to request a reboot to the
+		"bootloader", which often means reboot to fastboot but may also
+		include a UI with a menu.
+
+		CONFIG_ANDROID_BOOT_IMAGE
+		This enables support for booting images which use the Android
+		image format header.
+
+- USB Device Android Fastboot support:
+		CONFIG_USB_FUNCTION_FASTBOOT
+		This enables the USB part of the fastboot gadget
+
+		CONFIG_CMD_FASTBOOT
+		This enables the command "fastboot" which enables the Android
+		fastboot mode for the platform's USB device. Fastboot is a USB
+		protocol for downloading images, flashing and device control
+		used on Android devices.
+		See doc/README.android-fastboot for more information.
+
+		CONFIG_FASTBOOT_BUF_ADDR
+		The fastboot protocol requires a large memory buffer for
+		downloads. Define this to the starting RAM address to use for
+		downloaded images.
+
+		CONFIG_FASTBOOT_BUF_SIZE
+		The fastboot protocol requires a large memory buffer for
+		downloads. This buffer should be as large as possible for a
+		platform. Define this to the size available RAM for fastboot.
+
+		CONFIG_FASTBOOT_FLASH
+		The fastboot protocol includes a "flash" command for writing
+		the downloaded image to a non-volatile storage device. Define
+		this to enable the "fastboot flash" command.
+
+		CONFIG_FASTBOOT_FLASH_MMC_DEV
+		The fastboot "flash" command requires additional information
+		regarding the non-volatile storage device. Define this to
+		the eMMC device that fastboot should use to store the image.
+
+		CONFIG_FASTBOOT_GPT_NAME
+		The fastboot "flash" command supports writing the downloaded
+		image to the Protective MBR and the Primary GUID Partition
+		Table. (Additionally, this downloaded image is post-processed
+		to generate and write the Backup GUID Partition Table.)
+		This occurs when the specified "partition name" on the
+		"fastboot flash" command line matches this value.
+		The default is "gpt" if undefined.
+
+		CONFIG_FASTBOOT_MBR_NAME
+		The fastboot "flash" command supports writing the downloaded
+		image to DOS MBR.
+		This occurs when the "partition name" specified on the
+		"fastboot flash" command line matches this value.
+		If not defined the default value "mbr" is used.
+
 - Journaling Flash filesystem support:
 		CONFIG_JFFS2_NAND
 		Define these for a default partition on a NAND device
diff --git a/common/Kconfig b/common/Kconfig
index 4d8cae9610..f36ba427ed 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -469,6 +469,24 @@ config BOARD_EARLY_INIT_F
 	  debug UART will be available if enabled.
 
 endmenu
+config ANDROID_BOOTLOADER
+	bool "Support for Android Bootloader boot flow"
+	default n
+	depends on ANDROID_BOOT_IMAGE
+	help
+	  If enabled, adds support to boot an Android device following the
+	  Android Bootloader boot flow. This flow requires an Android Bootloader
+	  to handle the Android Bootloader Message stored in the Boot Control
+	  Block (BCB), normally in the "misc" partition of an Android device.
+	  The BCB is used to determine the boot mode of the device (normal mode,
+	  recovery mode or bootloader mode) and, if enabled, the slot to boot
+	  from in devices with multiple boot slots (A/B devices).
+
+config ANDROID_BOOT_IMAGE
+	bool "Enable support for Android Boot Images"
+	help
+	  This enables support for booting images which use the Android
+	  image format header.
 
 menu "Security support"
 
diff --git a/common/Makefile b/common/Makefile
index a66a3fd6dd..5f936fdc53 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -103,6 +103,7 @@ obj-y += image.o
 obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o
 obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
 obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
+obj-$(CONFIG_ANDROID_BOOTLOADER) += android_bootloader.o
 obj-$(CONFIG_FIT_EMBED) += boot_fit.o common_fit.o
 obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-sig.o
 obj-$(CONFIG_IO_TRACE) += iotrace.o
diff --git a/common/android_bootloader.c b/common/android_bootloader.c
new file mode 100644
index 0000000000..a8b457a886
--- /dev/null
+++ b/common/android_bootloader.c
@@ -0,0 +1,337 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <android_bootloader.h>
+#include <android_bootloader_message.h>
+
+#include <cli.h>
+#include <common.h>
+#include <malloc.h>
+
+#define ANDROID_PARTITION_BOOT "boot"
+#define ANDROID_PARTITION_SYSTEM "system"
+
+#define ANDROID_ARG_SLOT_SUFFIX "androidboot.slot_suffix="
+#define ANDROID_ARG_ROOT "root="
+
+static int android_bootloader_message_load(
+	struct blk_desc *dev_desc,
+	const disk_partition_t *part_info,
+	struct android_bootloader_message *message)
+{
+	ulong message_blocks = sizeof(struct android_bootloader_message) /
+	    part_info->blksz;
+	if (message_blocks > part_info->size) {
+		printf("misc partition too small.\n");
+		return -1;
+	}
+
+	if (blk_dread(dev_desc, part_info->start, message_blocks, message) !=
+	    message_blocks) {
+		printf("Could not read from misc partition\n");
+		return -1;
+	}
+	debug("ANDROID: Loaded BCB, %lu blocks.\n", message_blocks);
+	return 0;
+}
+
+static int android_bootloader_message_write(
+	struct blk_desc *dev_desc,
+	const disk_partition_t *part_info,
+	struct android_bootloader_message *message)
+{
+	ulong message_blocks = sizeof(struct android_bootloader_message) /
+	    part_info->blksz;
+	if (message_blocks > part_info->size) {
+		printf("misc partition too small.\n");
+		return -1;
+	}
+
+	if (blk_dwrite(dev_desc, part_info->start, message_blocks, message) !=
+	    message_blocks) {
+		printf("Could not write to misc partition\n");
+		return -1;
+	}
+	debug("ANDROID: Wrote new BCB, %lu blocks.\n", message_blocks);
+	return 0;
+}
+
+static enum android_boot_mode android_bootloader_load_and_clear_mode(
+	struct blk_desc *dev_desc,
+	const disk_partition_t *misc_part_info)
+{
+	struct android_bootloader_message bcb;
+
+#ifdef CONFIG_FASTBOOT
+	char *bootloader_str;
+
+	/* Check for message from bootloader stored in RAM from a previous boot.
+	 */
+	bootloader_str = (char *)CONFIG_FASTBOOT_BUF_ADDR;
+	if (!strcmp("reboot-bootloader", bootloader_str)) {
+		bootloader_str[0] = '\0';
+		return ANDROID_BOOT_MODE_BOOTLOADER;
+	}
+#endif
+
+	/* Check and update the BCB message if needed. */
+	if (android_bootloader_message_load(dev_desc, misc_part_info, &bcb) <
+	    0) {
+		printf("WARNING: Unable to load the BCB.\n");
+		return ANDROID_BOOT_MODE_NORMAL;
+	}
+
+	if (!strcmp("bootonce-bootloader", bcb.command)) {
+		/* Erase the message in the BCB since this value should be used
+		 * only once.
+		 */
+		memset(bcb.command, 0, sizeof(bcb.command));
+		android_bootloader_message_write(dev_desc, misc_part_info,
+						 &bcb);
+		return ANDROID_BOOT_MODE_BOOTLOADER;
+	}
+
+	if (!strcmp("boot-recovery", bcb.command))
+		return ANDROID_BOOT_MODE_RECOVERY;
+
+	return ANDROID_BOOT_MODE_NORMAL;
+}
+
+/**
+ * Return the reboot reason string for the passed boot mode.
+ *
+ * @param mode	The Android Boot mode.
+ * @return a pointer to the reboot reason string for mode.
+ */
+static const char *android_boot_mode_str(enum android_boot_mode mode)
+{
+	switch (mode) {
+	case ANDROID_BOOT_MODE_NORMAL:
+		return "(none)";
+	case ANDROID_BOOT_MODE_RECOVERY:
+		return "recovery";
+	case ANDROID_BOOT_MODE_BOOTLOADER:
+		return "bootloader";
+	}
+	return NULL;
+}
+
+static int android_part_get_info_by_name_suffix(struct blk_desc *dev_desc,
+						const char *base_name,
+						const char *slot_suffix,
+						disk_partition_t *part_info)
+{
+	char *part_name;
+	int part_num;
+
+	part_name = malloc(strlen(base_name) + strlen(slot_suffix) + 1);
+	if (!part_name)
+		return -1;
+	strcpy(part_name, base_name);
+	strcat(part_name, slot_suffix);
+
+	part_num = part_get_info_by_name(dev_desc, part_name, part_info);
+	if (part_num < 0) {
+		debug("ANDROID: Could not find partition \"%s\"\n", part_name);
+		part_num = -1;
+	}
+
+	free(part_name);
+	return part_num;
+}
+
+static int android_bootloader_boot_bootloader(void)
+{
+	const char *fastboot_cmd = env_get("fastbootcmd");
+
+	if (fastboot_cmd)
+		return run_command(fastboot_cmd, CMD_FLAG_ENV);
+	return -1;
+}
+
+static int android_bootloader_boot_kernel(unsigned long kernel_address)
+{
+	char kernel_addr_str[12];
+	char *fdt_addr = env_get("fdt_addr");
+	char *bootm_args[] = { "bootm", kernel_addr_str, "-", fdt_addr, NULL };
+
+	sprintf(kernel_addr_str, "0x%lx", kernel_address);
+
+	printf("Booting kernel at %s with fdt at %s...\n\n\n",
+	       kernel_addr_str, fdt_addr);
+	do_bootm(NULL, 0, 4, bootm_args);
+
+	return -1;
+}
+
+static char *strjoin(const char **chunks, char separator)
+{
+	int len, joined_len = 0;
+	char *ret, *current;
+	const char **p;
+
+	for (p = chunks; *p; p++)
+		joined_len += strlen(*p) + 1;
+
+	if (!joined_len) {
+		ret = malloc(1);
+		if (ret)
+			ret[0] = '\0';
+		return ret;
+	}
+
+	ret = malloc(joined_len);
+	current = ret;
+	if (!ret)
+		return ret;
+
+	for (p = chunks; *p; p++) {
+		len = strlen(*p);
+		memcpy(current, *p, len);
+		current += len;
+		*current = separator;
+		current++;
+	}
+	*current = '\0';
+	return ret;
+}
+
+/** android_assemble_cmdline - Assemble the command line to pass to the kernel
+ * @return a newly allocated string
+ */
+static char *android_assemble_cmdline(const char *slot_suffix,
+				      const char *extra_args)
+{
+	const char *cmdline_chunks[16];
+	const char **current_chunk = cmdline_chunks;
+	char *env_cmdline, *cmdline, *rootdev_input;
+	char *allocated_suffix = NULL;
+	char *allocated_rootdev = NULL;
+	unsigned long rootdev_len;
+
+	env_cmdline = env_get("bootargs");
+	if (env_cmdline)
+		*(current_chunk++) = env_cmdline;
+
+	/* The |slot_suffix| needs to be passed to the kernel to know what
+	 * slot to boot from.
+	 */
+	if (slot_suffix) {
+		allocated_suffix = malloc(strlen(ANDROID_ARG_SLOT_SUFFIX) +
+					  strlen(slot_suffix));
+		strcpy(allocated_suffix, ANDROID_ARG_SLOT_SUFFIX);
+		strcat(allocated_suffix, slot_suffix);
+		*(current_chunk++) = allocated_suffix;
+	}
+
+	rootdev_input = env_get("android_rootdev");
+	if (rootdev_input) {
+		rootdev_len = strlen(ANDROID_ARG_ROOT) + CONFIG_SYS_CBSIZE + 1;
+		allocated_rootdev = malloc(rootdev_len);
+		strcpy(allocated_rootdev, ANDROID_ARG_ROOT);
+		cli_simple_process_macros(rootdev_input,
+					  allocated_rootdev +
+					  strlen(ANDROID_ARG_ROOT));
+		/* Make sure that the string is null-terminated since the
+		 * previous could not copy to the end of the input string if it
+		 * is too big.
+		 */
+		allocated_rootdev[rootdev_len - 1] = '\0';
+		*(current_chunk++) = allocated_rootdev;
+	}
+
+	if (extra_args)
+		*(current_chunk++) = extra_args;
+
+	*(current_chunk++) = NULL;
+	cmdline = strjoin(cmdline_chunks, ' ');
+	free(allocated_suffix);
+	free(allocated_rootdev);
+	return cmdline;
+}
+
+int android_bootloader_boot_flow(struct blk_desc *dev_desc,
+				 const disk_partition_t *misc_part_info,
+				 unsigned long kernel_address)
+{
+	enum android_boot_mode mode;
+	disk_partition_t boot_part_info;
+	disk_partition_t system_part_info;
+	int boot_part_num, system_part_num;
+	int ret;
+	char *command_line;
+	/* TODO: lookup the slot_suffix based on the BCB. */
+	const char *slot_suffix = "_a";
+	const char *mode_cmdline = NULL;
+
+	/* Determine the boot mode and clear its value for the next boot if
+	 * needed.
+	 */
+	mode = android_bootloader_load_and_clear_mode(dev_desc, misc_part_info);
+	printf("ANDROID: reboot reason: \"%s\"\n", android_boot_mode_str(mode));
+
+	switch (mode) {
+	case ANDROID_BOOT_MODE_NORMAL:
+		/* In normal mode, we load the kernel from "boot" but append
+		 * "skip_initramfs" to the cmdline to make it ignore the
+		 * recovery initramfs in the boot partition.
+		 */
+		mode_cmdline = "skip_initramfs";
+		break;
+	case ANDROID_BOOT_MODE_RECOVERY:
+		/* In recovery mode we still boot the kernel from "boot" but
+		 * don't skip the initramfs so it boots to recovery.
+		 */
+		break;
+	case ANDROID_BOOT_MODE_BOOTLOADER:
+		/* Bootloader mode enters fastboot. If this operation fails we
+		 * simply return since we can't recover from this situation by
+		 * switching to another slot.
+		 */
+		return android_bootloader_boot_bootloader();
+	}
+
+	/* Load the kernel from the desired "boot" partition. */
+	boot_part_num =
+	    android_part_get_info_by_name_suffix(dev_desc,
+						 ANDROID_PARTITION_BOOT,
+						 slot_suffix, &boot_part_info);
+	if (boot_part_num < 0)
+		return -1;
+	debug("ANDROID: Loading kernel from \"%s\", partition %d.\n",
+	      boot_part_info.name, boot_part_num);
+
+	system_part_num =
+	    android_part_get_info_by_name_suffix(dev_desc,
+						 ANDROID_PARTITION_SYSTEM,
+						 slot_suffix,
+						 &system_part_info);
+	if (system_part_num < 0)
+		return -1;
+	debug("ANDROID: Using system image from \"%s\", partition %d.\n",
+	      system_part_info.name, system_part_num);
+
+	ret = android_image_load(dev_desc, &boot_part_info, kernel_address,
+				 -1UL);
+	if (ret < 0)
+		return ret;
+
+	/* Set Android root variables. */
+	env_set_ulong("android_root_devnum", dev_desc->devnum);
+	env_set_ulong("android_root_partnum", system_part_num);
+	env_set("android_slotsufix", slot_suffix);
+
+	/* Assemble the command line */
+	command_line = android_assemble_cmdline(slot_suffix, mode_cmdline);
+	env_set("bootargs", command_line);
+
+	debug("ANDROID: bootargs: \"%s\"\n", command_line);
+
+	android_bootloader_boot_kernel(kernel_address);
+
+	/* TODO: If the kernel doesn't boot mark the selected slot as bad. */
+	return -1;
+}
diff --git a/include/android_bootloader.h b/include/android_bootloader.h
new file mode 100644
index 0000000000..947913e547
--- /dev/null
+++ b/include/android_bootloader.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2016 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_BOOTLOADER_H
+#define __ANDROID_BOOTLOADER_H
+
+#include <common.h>
+
+enum android_boot_mode {
+	ANDROID_BOOT_MODE_NORMAL = 0,
+
+	/* "recovery" mode is triggered by the "reboot recovery" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "boot-recovery" in the BCB message. This mode should boot the
+	 * recovery kernel.
+	 */
+	ANDROID_BOOT_MODE_RECOVERY,
+
+	/* "bootloader" mode is triggered by the "reboot bootloader" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "bootonce-bootloader" in the BCB message. This mode should boot into
+	 * fastboot.
+	 */
+	ANDROID_BOOT_MODE_BOOTLOADER,
+};
+
+/** android_bootloader_boot_flow - Execute the Android Bootloader Flow.
+ * Performs the Android Bootloader boot flow, loading the appropriate Android
+ * image (normal kernel, recovery kernel or "bootloader" mode) and booting it.
+ * The boot mode is determined by the contents of the Android Bootloader
+ * Message. On success it doesn't return.
+ *
+ * @return a negative number in case of error, otherwise it doesn't return.
+ */
+int android_bootloader_boot_flow(struct blk_desc *dev_desc,
+				 const disk_partition_t *misc_part_info,
+				 unsigned long kernel_address);
+
+#endif  /* __ANDROID_BOOTLOADER_H */
diff --git a/include/android_bootloader_message.h b/include/android_bootloader_message.h
new file mode 100644
index 0000000000..2c2142dc6f
--- /dev/null
+++ b/include/android_bootloader_message.h
@@ -0,0 +1,174 @@
+/*
+ * This is from the Android Project,
+ * Repository: https://android.googlesource.com/platform/bootable/recovery/
+ * File: bootloader_message/include/bootloader_message/bootloader_message.h
+ * Commit: 8b309f6970ab3b7c53cc529c51a2cb44e1c7a7e1
+ *
+ * Copyright (C) 2008 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#ifndef __ANDROID_BOOTLOADER_MESSAGE_H
+#define __ANDROID_BOOTLOADER_MESSAGE_H
+
+/* compiler.h defines the types that otherwise are included from stdint.h and
+ * stddef.h
+ */
+#include <compiler.h>
+
+/* Spaces used by misc partition are as below:
+ * 0   - 2K     Bootloader Message
+ * 2K  - 16K    Used by Vendor's bootloader (the 2K - 4K range may be optionally used
+ *              as bootloader_message_ab struct)
+ * 16K - 64K    Used by uncrypt and recovery to store wipe_package for A/B devices
+ * Note that these offsets are admitted by bootloader,recovery and uncrypt, so they
+ * are not configurable without changing all of them.
+ */
+static const size_t ANDROID_BOOTLOADER_MESSAGE_OFFSET_IN_MISC = 0;
+static const size_t ANDROID_WIPE_PACKAGE_OFFSET_IN_MISC = 16 * 1024;
+
+/* Bootloader Message (2-KiB)
+ *
+ * This structure describes the content of a block in flash
+ * that is used for recovery and the bootloader to talk to
+ * each other.
+ *
+ * The command field is updated by linux when it wants to
+ * reboot into recovery or to update radio or bootloader firmware.
+ * It is also updated by the bootloader when firmware update
+ * is complete (to boot into recovery for any final cleanup)
+ *
+ * The status field is written by the bootloader after the
+ * completion of an "update-radio" or "update-hboot" command.
+ *
+ * The recovery field is only written by linux and used
+ * for the system to send a message to recovery or the
+ * other way around.
+ *
+ * The stage field is written by packages which restart themselves
+ * multiple times, so that the UI can reflect which invocation of the
+ * package it is.  If the value is of the format "#/#" (eg, "1/3"),
+ * the UI will add a simple indicator of that status.
+ *
+ * We used to have slot_suffix field for A/B boot control metadata in
+ * this struct, which gets unintentionally cleared by recovery or
+ * uncrypt. Move it into struct bootloader_message_ab to avoid the
+ * issue.
+ */
+struct android_bootloader_message {
+    char command[32];
+    char status[32];
+    char recovery[768];
+
+    /* The 'recovery' field used to be 1024 bytes.  It has only ever
+     * been used to store the recovery command line, so 768 bytes
+     * should be plenty.  We carve off the last 256 bytes to store the
+     * stage string (for multistage packages) and possible future
+     * expansion. */
+    char stage[32];
+
+    /* The 'reserved' field used to be 224 bytes when it was initially
+     * carved off from the 1024-byte recovery field. Bump it up to
+     * 1184-byte so that the entire bootloader_message struct rounds up
+     * to 2048-byte. */
+    char reserved[1184];
+};
+
+/**
+ * We must be cautious when changing the bootloader_message struct size,
+ * because A/B-specific fields may end up with different offsets.
+ */
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+static_assert(sizeof(struct android_bootloader_message) == 2048,
+              "struct bootloader_message size changes, which may break A/B devices");
+#endif
+
+/**
+ * The A/B-specific bootloader message structure (4-KiB).
+ *
+ * We separate A/B boot control metadata from the regular bootloader
+ * message struct and keep it here. Everything that's A/B-specific
+ * stays after struct bootloader_message, which should be managed by
+ * the A/B-bootloader or boot control HAL.
+ *
+ * The slot_suffix field is used for A/B implementations where the
+ * bootloader does not set the androidboot.ro.boot.slot_suffix kernel
+ * commandline parameter. This is used by fs_mgr to mount /system and
+ * other partitions with the slotselect flag set in fstab. A/B
+ * implementations are free to use all 32 bytes and may store private
+ * data past the first NUL-byte in this field. It is encouraged, but
+ * not mandatory, to use 'struct bootloader_control' described below.
+ */
+struct android_bootloader_message_ab {
+    struct android_bootloader_message message;
+    char slot_suffix[32];
+
+    /* Round up the entire struct to 4096-byte. */
+    char reserved[2016];
+};
+
+/**
+ * Be cautious about the struct size change, in case we put anything post
+ * bootloader_message_ab struct (b/29159185).
+ */
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+static_assert(sizeof(struct android_bootloader_message_ab) == 4096,
+              "struct bootloader_message_ab size changes");
+#endif
+
+#define ANDROID_BOOT_CTRL_MAGIC   0x42414342 /* Bootloader Control AB */
+#define ANDROID_BOOT_CTRL_VERSION 1
+
+struct android_slot_metadata {
+    /* Slot priority with 15 meaning highest priority, 1 lowest
+     * priority and 0 the slot is unbootable. */
+    uint8_t priority : 4;
+    /* Number of times left attempting to boot this slot. */
+    uint8_t tries_remaining : 3;
+    /* 1 if this slot has booted successfully, 0 otherwise. */
+    uint8_t successful_boot : 1;
+    /* 1 if this slot is corrupted from a dm-verity corruption, 0 */
+    /* otherwise. */
+    uint8_t verity_corrupted : 1;
+    /* Reserved for further use. */
+    uint8_t reserved : 7;
+} __attribute__((packed));
+
+/* Bootloader Control AB
+ *
+ * This struct can be used to manage A/B metadata. It is designed to
+ * be put in the 'slot_suffix' field of the 'bootloader_message'
+ * structure described above. It is encouraged to use the
+ * 'bootloader_control' structure to store the A/B metadata, but not
+ * mandatory.
+ */
+struct android_bootloader_control {
+    /* NUL terminated active slot suffix. */
+    char slot_suffix[4];
+    /* Bootloader Control AB magic number (see BOOT_CTRL_MAGIC). */
+    uint32_t magic;
+    /* Version of struct being used (see BOOT_CTRL_VERSION). */
+    uint8_t version;
+    /* Number of slots being managed. */
+    uint8_t nb_slot : 3;
+    /* Number of times left attempting to boot recovery. */
+    uint8_t recovery_tries_remaining : 3;
+    /* Ensure 4-bytes alignment for slot_info field. */
+    uint8_t reserved0[2];
+    /* Per-slot information.  Up to 4 slots. */
+    struct android_slot_metadata slot_info[4];
+    /* Reserved for further use. */
+    uint8_t reserved1[8];
+    /* CRC32 of all 28 bytes preceding this field (little endian
+     * format). */
+    uint32_t crc32_le;
+} __attribute__((packed));
+
+#if (__STDC_VERSION__ >= 201112L) || defined(__cplusplus)
+static_assert(sizeof(struct android_bootloader_control) ==
+              sizeof(((struct android_bootloader_message_ab *)0)->slot_suffix),
+              "struct bootloader_control has wrong size");
+#endif
+
+#endif  /* __ANDROID_BOOTLOADER_MESSAGE_H */

commit 76e2a5a6c67043440fb0ea4942cde9b08e260a9d
Author: Alex Deymo <deymo@google.com>
Date:   Mon Jan 9 20:36:34 2017 -0800

    Move Android Image loading logic to image-android.c
    
    This patch moves the Android Image loading logic from the load_android
    command to a new android_load_image() function in image-android.c so it
    can be re-used from other commands.
    
    Bug: 32707546
    Test: Booted the rpi3 with this patch.
    Signed-off-by: Alex Deymo <deymo@google.com>
    Change-Id: I12d206141ead1b94ebbcc90ee05512a276c7595a

diff --git a/cmd/load_android.c b/cmd/load_android.c
index e6c5930837..e2ca4fe6ca 100644
--- a/cmd/load_android.c
+++ b/cmd/load_android.c
@@ -1,21 +1,18 @@
 /*
-  * Copyright (C) 2008 The Android Open Source Project
+ * Copyright (C) 2016 The Android Open Source Project
  *
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
 #include <common.h>
 #include <command.h>
-#include <mapmem.h>
 
 static int do_load_android(cmd_tbl_t *cmdtp, int flag, int argc,
 			   char * const argv[])
 {
 	int boot_partition;
-	unsigned long load_address, blk_cnt, blk_read;
-	int ret = CMD_RET_SUCCESS;
+	unsigned long load_address;
 	char *addr_arg_endp, *addr_str;
-	void *buf;
 	struct blk_desc *dev_desc;
 	disk_partition_t part_info;
 
@@ -37,44 +34,19 @@ static int do_load_android(cmd_tbl_t *cmdtp, int flag, int argc,
 	}
 
 	boot_partition = blk_get_device_part_str(argv[1],
-	                                         (argc >= 3) ? argv[2] : NULL,
-	                                         &dev_desc, &part_info, 1);
+						 (argc >= 3) ? argv[2] : NULL,
+						 &dev_desc, &part_info, 1);
 	if (boot_partition < 0)
 		return CMD_RET_FAILURE;
 
-	/* We don't know the size of the Android image before reading the header
-	 * so we don't limit the size of the mapped memory. */
-	buf = map_sysmem(load_address, 0 /* size */);
-
-	/* Read the Android header first and then read the rest. */
-	if (blk_dread(dev_desc, part_info.start, 1, buf) != 1) {
-		ret = CMD_RET_FAILURE;
-	}
-
-	if (ret == CMD_RET_SUCCESS && android_image_check_header(buf) != 0) {
-		printf("\n** Invalid Android Image header on %s %d:%d **\n",
-		       argv[1], dev_desc->devnum, boot_partition);
-		ret = CMD_RET_FAILURE;
-	}
-	if (ret == CMD_RET_SUCCESS) {
-		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
-		           part_info.blksz - 1) / part_info.blksz;
-		printf("\nLoading Android Image (%lu blocks) to 0x%lx... ",
-		       blk_cnt, load_address);
-		blk_read = blk_dread(dev_desc, part_info.start, blk_cnt, buf);
+	if (android_image_load(dev_desc, &part_info, load_address, -1UL) < 0) {
+		printf("Error loading Android Image from %s %d:%d to 0x%lx.\n",
+		       argv[1], dev_desc->devnum, boot_partition, load_address);
+		return CMD_RET_FAILURE;
 	}
-
-	unmap_sysmem(buf);
-	if (ret != CMD_RET_SUCCESS)
-		return ret;
-
-	printf("%lu blocks read: %s\n",
-	       blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
-	return (blk_read == blk_cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+	return CMD_RET_SUCCESS;
 }
 
-
-#if defined(CONFIG_CMD_LOAD_ANDROID)
 U_BOOT_CMD(
 	load_android, 4, 0, do_load_android,
 	"load Android Boot image from storage.",
@@ -82,4 +54,3 @@ U_BOOT_CMD(
 	"    - Load a binary Android Boot image from the partition 'part' on\n"
 	"      device type 'interface' instance 'dev' to address 'addr'."
 );
-#endif	/* CONFIG_CMD_LOAD_ANDROID */
diff --git a/common/image-android.c b/common/image-android.c
index e74d0aafca..e6976d0e63 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -8,6 +8,7 @@
 #include <image.h>
 #include <android_image.h>
 #include <malloc.h>
+#include <mapmem.h>
 #include <errno.h>
 
 #define ANDROID_IMAGE_DEFAULT_KERNEL_ADDR	0x10008000
@@ -146,6 +147,56 @@ int android_image_get_ramdisk(const struct andr_img_hdr *hdr,
 	return 0;
 }
 
+long android_image_load(struct blk_desc *dev_desc,
+			const disk_partition_t *part_info,
+			unsigned long load_address,
+			unsigned long max_size) {
+	void *buf;
+	long blk_cnt, blk_read = 0;
+
+	if (max_size < part_info->blksz)
+		return -1;
+
+	/* We don't know the size of the Android image before reading the header
+	 * so we don't limit the size of the mapped memory.
+	 */
+	buf = map_sysmem(load_address, 0 /* size */);
+
+	/* Read the Android header first and then read the rest. */
+	if (blk_dread(dev_desc, part_info->start, 1, buf) != 1)
+		blk_read = -1;
+
+	if (!blk_read && android_image_check_header(buf) != 0) {
+		printf("** Invalid Android Image header **\n");
+		blk_read = -1;
+	}
+	if (!blk_read) {
+		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
+			   part_info->blksz - 1) / part_info->blksz;
+		if (blk_cnt * part_info->blksz > max_size) {
+			debug("Android Image too big (%lu bytes, max %lu)\n",
+			      android_image_get_end(buf) - (ulong)buf,
+			      max_size);
+			blk_read = -1;
+		} else {
+			debug("Loading Android Image (%lu blocks) to 0x%lx... ",
+			      blk_cnt, load_address);
+			blk_read = blk_dread(dev_desc, part_info->start,
+					     blk_cnt, buf);
+		}
+	}
+
+	unmap_sysmem(buf);
+	if (blk_read < 0)
+		return blk_read;
+
+	debug("%lu blocks read: %s\n",
+	      blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
+	if (blk_read != blk_cnt)
+		return -1;
+	return blk_read;
+}
+
 #if !defined(CONFIG_SPL_BUILD)
 /**
  * android_print_contents - prints out the contents of the Android format image
diff --git a/include/image.h b/include/image.h
index 10ff094709..300a72a4b5 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1238,6 +1238,25 @@ ulong android_image_get_end(const struct andr_img_hdr *hdr);
 ulong android_image_get_kload(const struct andr_img_hdr *hdr);
 void android_print_contents(const struct andr_img_hdr *hdr);
 
+/** android_image_load - Load an Android Image from storage.
+ *
+ * Load an Android Image based on the header size in the storage. Return the
+ * number of bytes read from storage, which could be bigger than the actual
+ * Android Image as described in the header size. In case of error reading the
+ * image or if the image size needed to be read from disk is bigger than the
+ * the passed |max_size| a negative number is returned.
+ *
+ * @dev_desc:		The device where to read the image from
+ * @part_info:		The partition in |dev_desc| where to read the image from
+ * @load_address:	The address where the image will be loaded
+ * @max_size:		The maximum loaded size, in bytes
+ * @return the number of bytes read or a negative number in case of error.
+ */
+long android_image_load(struct blk_desc *dev_desc,
+			const disk_partition_t *part_info,
+			unsigned long load_address,
+			unsigned long max_size);
+
 #endif /* CONFIG_ANDROID_BOOT_IMAGE */
 
 /**

commit 95916cf3d65d30912db4e4078bca6c9ff67726bb
Author: Alex Deymo <deymo@google.com>
Date:   Fri Jan 27 15:18:05 2017 -0800

    Add PREUPLOAD.cfg.
    
    Add a PREUPLOAD.cfg file to check the patches before uploading them.
    
    Bug: None
    Test: repo upload
    Change-Id: I6266360503f5360f968fd0d83bbf209b6f72e43c

diff --git a/PREUPLOAD.cfg b/PREUPLOAD.cfg
new file mode 100644
index 0000000000..ca5a558549
--- /dev/null
+++ b/PREUPLOAD.cfg
@@ -0,0 +1,2 @@
+[Builtin Hooks]
+checkpatch = true

commit 9ec8daff33ec31bf37d9083ebc4441a35c42aaa5
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 22 17:33:40 2016 -0800

    Handle all commands and variables for "fastboot flashall"
    
    Implement the rest of the variables and fastboot commands for flashall.
    For A/B related commands, slot A is always selected.
    
    Bug: 31887729
    Test: "fastboot flashall" does not result in any unknown commands or
          variables
    
    Change-Id: Iec794a0a0805aeb744157ab25b417443a3fc7f5a

diff --git a/net/fastboot.c b/net/fastboot.c
index 194c57471f..a5d059bb08 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -9,6 +9,7 @@
 #include <fb_mmc.h>
 #include <net.h>
 #include <net/fastboot.h>
+#include <part.h>
 #include <stdlib.h>
 #include <version.h>
 
@@ -180,6 +181,9 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			fb_continue(response);
 		} else if (!strncmp("reboot", cmd_string, 6)) {
 			fb_reboot(response);
+		} else if (!strcmp("set_active", cmd_string)) {
+			/* A/B not implemented, for now do nothing */
+			write_fb_response("OKAY", "", response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -238,10 +242,11 @@ static void fb_getvar(char *response)
 		write_fb_response("FAIL", "missing var", response);
 	} else if (!strcmp("version", cmd_parameter)) {
 		write_fb_response("OKAY", FASTBOOT_VERSION, response);
-	} else if (!strcmp("bootloader-version", cmd_parameter)) {
+	} else if (!strcmp("bootloader-version", cmd_parameter) ||
+			!strcmp("version-bootloader", cmd_parameter)) {
 		write_fb_response("OKAY", U_BOOT_VERSION, response);
 	} else if (!strcmp("downloadsize", cmd_parameter) ||
-		!strcmp("max-download-size", cmd_parameter)) {
+			!strcmp("max-download-size", cmd_parameter)) {
 		char buf_size_str[12];
 		sprintf(buf_size_str, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
 		write_fb_response("OKAY", buf_size_str, response);
@@ -252,6 +257,43 @@ static void fb_getvar(char *response)
 		} else {
 			write_fb_response("FAIL", "Value not set", response);
 		}
+	} else if (!strcmp("version-baseband", cmd_parameter)) {
+		write_fb_response("OKAY", "N/A", response);
+	} else if (!strcmp("product", cmd_parameter)) {
+		const char *board = getenv("board");
+		if (board) {
+			write_fb_response("OKAY", board, response);
+		} else {
+			write_fb_response("FAIL", "Board not set", response);
+		}
+	} else if (!strcmp("current-slot", cmd_parameter)) {
+		/* A/B not implemented, for now always return _a */
+		write_fb_response("OKAY", "_a", response);
+	} else if (!strcmp("slot-suffixes", cmd_parameter)) {
+		write_fb_response("OKAY", "_a,_b", response);
+	} else if (!strncmp("has-slot", cmd_parameter, 8)) {
+		char *part_name = cmd_parameter;
+
+		cmd_parameter = strsep(&part_name, ":");
+		if (!strcmp(part_name, "boot") || !strcmp(part_name, "system")) {
+			write_fb_response("OKAY", "yes", response);
+		} else {
+			write_fb_response("OKAY", "no", response);
+		}
+	} else if (!strncmp("partition-type", cmd_parameter, 14)) {
+		disk_partition_t part_info;
+		struct blk_desc *dev_desc;
+		char *part_name = cmd_parameter;
+
+		cmd_parameter = strsep(&part_name, ":");
+		dev_desc = blk_get_dev("mmc", 0);
+		if (dev_desc == NULL) {
+			write_fb_response("FAIL", "block device not found", response);
+		} else if (part_get_info_efi_by_name(dev_desc, part_name, &part_info) < 0) {
+			write_fb_response("FAIL", "partition not found", response);
+		} else {
+			write_fb_response("OKAY", (char*)part_info.type, response);
+		}
 	} else {
 		printf("WARNING: unknown variable: %s\n", cmd_parameter);
 		write_fb_response("FAIL", "Variable not implemented", response);

commit aba554cc34bdfc92eb13ef852a73d6bd82329f37
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 22 17:39:21 2016 -0800

    Handle slow MMC writes
    
    Flashing a 400Mb sparse system image takes ~10 minutes. The fastboot UDP
    protocol expects a response within 1 minute, so during long flash
    operations, the device must send fastboot "INFO" packets.
    
    This patch does the following:
      - Separate large writes into writes of size FASTBOOT_MAX_BLK_WRITE.
        This parameter was tuned by hand to result in a ~10 second write.
      - Keep a timer and send an INFO packet every 30 seconds.
      - Adjust the sequence number in the header of the fastboot OKAY packet
        to account for any INFO packets sent during flashing.
      - Reduce busywaiting in the bcm2835 MMC driver. This change is based on
        what the kernel does, and doesn't seem to corrupt the MMC. Without
        this change, "flashall" takes 25 minutes.
    
    Bug: 31887729
    Test: "fastboot -s udp:$RPI_IP flashall" works, rpi3 boots
          - Compute CRC checksum over every write to verify written data
            was not corrupted.
    
    Change-Id: Ib17ef6a85715705a8b5f722a8b7d3e5fd1a6625d

diff --git a/common/fb_common.c b/common/fb_common.c
index a1daaccd55..d6e41988e9 100644
--- a/common/fb_common.c
+++ b/common/fb_common.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <fastboot.h>
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+#include <net/fastboot.h>
+#endif
 
 void fastboot_fail(const char *reason, char *response)
 {
@@ -20,3 +23,19 @@ void fastboot_okay(const char *reason, char *response)
 	strncpy(response, okay_str, FASTBOOT_RESPONSE_LEN);
 	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(okay_str) - 1);
 }
+
+void timed_send_info(ulong *start, const char *msg)
+{
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+	/* Initialize timer */
+	if (*start == 0) {
+		*start = get_timer(0);
+	}
+	ulong time = get_timer(*start);
+	/* Send INFO packet to host every 30 seconds */
+	if (time >= 30000) {
+		*start = get_timer(0);
+		fastboot_send_info(msg);
+	}
+#endif
+}
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 50cae9b418..a499bc4ffe 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -30,6 +30,8 @@
 #endif
 
 #define BOOT_PARTITION_NAME "boot"
+#define FASTBOOT_MAX_BLK_WRITE 16384
+static ulong timer;
 
 struct fb_mmc_sparse {
 	struct blk_desc	*dev_desc;
@@ -57,13 +59,37 @@ static int part_get_info_by_name_or_alias(struct blk_desc *dev_desc,
 	return ret;
 }
 
+static lbaint_t fb_mmc_blk_write(struct blk_desc *block_dev, lbaint_t start,
+		lbaint_t blkcnt, const void *buffer)
+{
+	lbaint_t blk = start;
+	lbaint_t blks_written;
+	lbaint_t cur_blkcnt;
+	lbaint_t blks = 0;
+	int i;
+	for (i = 0; i < blkcnt; i += FASTBOOT_MAX_BLK_WRITE) {
+		cur_blkcnt = min((int)blkcnt-i, FASTBOOT_MAX_BLK_WRITE);
+		if (buffer != NULL) {
+			timed_send_info(&timer, "writing");
+			blks_written = blk_dwrite(block_dev, blk, cur_blkcnt,
+					buffer+(i*block_dev->blksz));
+		} else {
+			timed_send_info(&timer, "erasing");
+			blks_written = blk_derase(block_dev, blk, cur_blkcnt);
+		}
+		blk += blks_written;
+		blks += blks_written;
+	}
+	return blks;
+}
+
 static lbaint_t fb_mmc_sparse_write(struct sparse_storage *info,
 		lbaint_t blk, lbaint_t blkcnt, const void *buffer)
 {
 	struct fb_mmc_sparse *sparse = info->priv;
 	struct blk_desc *dev_desc = sparse->dev_desc;
 
-	return blk_dwrite(dev_desc, blk, blkcnt, buffer);
+	return fb_mmc_blk_write(dev_desc, blk, blkcnt, buffer);
 }
 
 static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info,
@@ -91,7 +117,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 
 	puts("Flashing Raw Image\n");
 
-	blks = blk_dwrite(dev_desc, info->start, blkcnt, buffer);
+	blks = fb_mmc_blk_write(dev_desc, info->start, blkcnt, buffer);
 	if (blks != blkcnt) {
 		error("failed writing to device %d\n", dev_desc->devnum);
 		fastboot_fail("failed writing to device", response);
@@ -392,7 +418,7 @@ void fb_mmc_erase(const char *cmd, char *response)
 	printf("Erasing blocks " LBAFU " to " LBAFU " due to alignment\n",
 	       blks_start, blks_start + blks_size);
 
-	blks = blk_derase(dev_desc, blks_start, blks_size);
+	blks = fb_mmc_blk_write(dev_desc, blks_start, blks_size, NULL);
 	if (blks != blks_size) {
 		error("failed erasing from device %d", dev_desc->devnum);
 		fastboot_fail("failed erasing from device", response);
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index 3157354d2a..819bd88960 100644
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -50,11 +50,6 @@
 #define MIN_FREQ 400000
 #define SDHCI_BUFFER 0x20
 
-struct bcm2835_sdhci_plat {
-	struct mmc_config cfg;
-	struct mmc mmc;
-};
-
 struct bcm2835_sdhci_host {
 	struct sdhci_host host;
 	uint twoticks_delay;
@@ -80,8 +75,7 @@ static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val,
 	 * too)
 	 */
 	if (reg != SDHCI_BUFFER) {
-		while (timer_get_us() - bcm_host->last_write <
-		       bcm_host->twoticks_delay)
+		while (timer_get_us() - bcm_host->last_write < bcm_host->twoticks_delay)
 			;
 	}
 
diff --git a/include/fastboot.h b/include/fastboot.h
index 17bf12cac4..bc7ff2bb14 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -19,4 +19,17 @@
 void fastboot_fail(const char *reason, char *response);
 void fastboot_okay(const char *reason, char *response);
 
+/**
+ * Send an INFO packet during long commands based on timer. If
+ * CONFIG_UDP_FUNCTION_FASTBOOT is defined, an INFO packet is sent
+ * if the time is 30 seconds after start. Else, noop.
+ *
+ * TODO: Handle the situation where both UDP and USB fastboot are
+ *       enabled.
+ *
+ * @param start:  Time since last INFO packet was sent.
+ * @param msg:    String describing the reason for waiting
+ */
+void timed_send_info(ulong *start, const char *msg);
+
 #endif /* _FASTBOOT_H_ */
diff --git a/include/net/fastboot.h b/include/net/fastboot.h
index 10a5e39be1..538af29323 100644
--- a/include/net/fastboot.h
+++ b/include/net/fastboot.h
@@ -16,6 +16,12 @@
  * Wait for incoming fastboot comands.
  */
 void fastboot_start_server(void);
+/**
+ * Send an INFO packet during long commands
+ *
+ * @param msg: String describing the reason for waiting
+ */
+void fastboot_send_info(const char*);
 
 /**********************************************************************/
 
diff --git a/net/fastboot.c b/net/fastboot.c
index e1a2f223f3..194c57471f 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -67,6 +67,41 @@ static void boot_downloaded_image(void);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
+void fastboot_send_info(const char *msg)
+{
+	uchar *packet;
+	uchar *packet_base;
+	int len = 0;
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
+
+	struct fastboot_header fb_response_header =
+	{
+		.id = FASTBOOT_FASTBOOT,
+		.flags = 0,
+		.seq = htons(fb_sequence_number)
+	};
+	++fb_sequence_number;
+	packet = net_tx_packet + net_eth_hdr_size() + IP_UDP_HDR_SIZE;
+	packet_base = packet;
+
+	/* Write headers */
+	memcpy(packet, &fb_response_header, sizeof(fb_response_header));
+	packet += sizeof(fb_response_header);
+	/* Write response */
+	write_fb_response("INFO", msg, response);
+	memcpy(packet, response, strlen(response));
+	packet += strlen(response);
+
+	len = packet-packet_base;
+
+	/* Save packet for retransmitting */
+	last_packet_len = len;
+	memcpy(last_packet, packet_base, last_packet_len);
+
+	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
+			    fastboot_remote_port, fastboot_our_port, len);
+}
+
 /**
  * Constructs and sends a packet in response to received fastboot packet
  *
@@ -149,6 +184,11 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
 		}
+		/* Sent some INFO packets, need to update sequence number in header */
+		if (fb_header.seq != fb_sequence_number) {
+			fb_response_header.seq = htons(fb_sequence_number);
+			memcpy(packet_base, &fb_response_header, sizeof(fb_response_header));
+		}
 		/* Write response to packet */
 		memcpy(packet, response, strlen(response));
 		packet += strlen(response);

commit 0eda6822d05eaee8a099ca3cef1340ef6daa57c5
Author: Jocelyn Bohr <bohr@google.com>
Date:   Thu Nov 10 11:40:45 2016 -0800

    Implement fastboot continue, reboot, reboot-bootloader, boot.
    
    Add functions to respond to fastboot continue, reboot, and
    reboot-bootloader. Continue continues the normal android boot process.
    Reboot-bootloader writes a message to the start of the fastboot
    buffer, to be parsed at the start of the android boot process. Boot
    boots the previously downloaded image from memory.
    
    Bug: 31887729
    Test: - Sending "continue" boots into android.
          - Sending "reboot" reboots the device.
          - Sending "reboot-bootloader" reboots the device, and the
            message persists in memory.
          - Sending "boot boot.img" boots into kernel.
    
    Change-Id: I8b14724de4612450ccc382bb7532edb993e6e8a4

diff --git a/net/fastboot.c b/net/fastboot.c
index d0b8b34b92..e1a2f223f3 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -61,6 +61,9 @@ static void fb_getvar(char*);
 static void fb_download(char*, unsigned int, char*);
 static void fb_flash(char*);
 static void fb_erase(char*);
+static void fb_continue(char*);
+static void fb_reboot(char*);
+static void boot_downloaded_image(void);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
@@ -136,6 +139,12 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			fb_flash(response);
 		} else if (!strcmp("erase", cmd_string)) {
 			fb_erase(response);
+		} else if (!strcmp("boot", cmd_string)) {
+			write_fb_response("OKAY", "", response);
+		} else if (!strcmp("continue", cmd_string)) {
+			fb_continue(response);
+		} else if (!strncmp("reboot", cmd_string, 6)) {
+			fb_reboot(response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -158,6 +167,18 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
 			    fastboot_remote_port, fastboot_our_port, len);
 
+	/* Continue boot process after sending response */
+	if (!strncmp("OKAY", response, 4)) {
+		if (!strcmp("boot", cmd_string)) {
+			boot_downloaded_image();
+		} else if (!strcmp("continue", cmd_string)) {
+			run_command(getenv("bootcmd"), CMD_FLAG_ENV);
+		} else if (!strncmp("reboot", cmd_string, 6)) {
+			/* Matches reboot or reboot-bootloader */
+			do_reset(NULL, 0, 0, NULL);
+		}
+	}
+
 	/* OKAY and FAIL indicate command is complete */
 	if (!strncmp("OKAY", response, 4) ||
 			!strncmp("FAIL", response, 4)) {
@@ -273,6 +294,55 @@ static void fb_erase(char *response)
 	fb_mmc_erase(cmd_parameter, response);
 }
 
+/**
+ * Continues normal boot process by running "bootcmd". Writes
+ * to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_continue(char *response)
+{
+	char *bootcmd;
+	bootcmd = getenv("bootcmd");
+	if (bootcmd) {
+		write_fb_response("OKAY", "", response);
+	} else {
+		write_fb_response("FAIL", "bootcmd not set", response);
+	}
+}
+
+/**
+ * Sets reboot bootloader flag if requested. Writes to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_reboot(char *response)
+{
+	write_fb_response("OKAY", "", response);
+	if (!strcmp("reboot-bootloader", cmd_string)) {
+		strcpy((char*)CONFIG_FASTBOOT_BUF_ADDR, "reboot-bootloader");
+	}
+}
+
+/**
+ * Boots into downloaded image.
+ */
+static void boot_downloaded_image(void)
+{
+	char kernel_addr[12];
+	char *fdt_addr = getenv("fdt_addr_r");
+	char *bootm_args[] = { "bootm", kernel_addr, "-", fdt_addr, NULL };
+
+	sprintf(kernel_addr, "0x%lx", (long)CONFIG_FASTBOOT_BUF_ADDR);
+
+	printf("\nBooting kernel at %s with fdt at %s...\n\n\n",
+			kernel_addr, fdt_addr);
+	do_bootm(NULL, 0, 4, bootm_args);
+
+	/* This only happens if image is faulty so we start over. */
+	do_reset(NULL, 0, 0, NULL);
+}
+
 /**
  * Writes a response to response buffer of the form "$tag$reason".
  *

commit 8b464fa913ab295ac832e50d3964e04b34c2c337
Author: Jocelyn Bohr <bohr@google.com>
Date:   Wed Nov 9 11:24:08 2016 -0800

    Implement fastboot flash and erase.
    
    Add function to respond to fastboot flash and erase. Flash writes the
    previously downloaded image to indicated partition. Erase clears the
    indicated partition. fb_flash and fb_erase are essentially wrappers
    for fb_mmc_flash_write and fb_mmc_erase, which are implemented in
    common/fb_mmc.c.
    
    Added common/fb_common.c, where fastboot_okay/fail are implemented.
    common/fb_mmc.c assumes fasboot_okay() and fastboot_fail() are
    implemented, but they were tied to the fastboot USB implementation.
    This refactor adds the response string as a parameter to
    fastboot_okay/fail, instead of modifying a global.
    
    Bug: 31887729
    Test: FLASH:
          - Create file "foo" containing 2048 chars = "-"
          - Start "fastboot udp" on device and run
            "fastboot -s udp:$RPI_IP flash misc foo" from host
          - From U-boot console, read into memory the first 4 blocks from
            misc partition, observe each byte is "-".
    
          ERASE
          - Start "fastboot udp" on device and run
            "fastboot -s udp:$RPI_IP erase misc" from host
              - From U-boot console, read into memory many blocks from misc
            partition, observe each byte is 0x00
    
              Configs that use fastboot USB implementation still build.
    
    Change-Id: I5bd54868990bd9d5736d0969b3db240c2926eeec

diff --git a/common/Makefile b/common/Makefile
index 1b56cf9a70..a66a3fd6dd 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -120,6 +120,10 @@ obj-y += fb_nand.o
 endif
 endif
 
+ifneq ($(or $(CONFIG_USB_FUNCTION_FASTBOOT),$(CONFIG_UDP_FUNCTION_FASTBOOT)),)
+obj-y += fb_common.o
+endif
+
 ifdef CONFIG_CMD_EEPROM_LAYOUT
 obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o
 endif
diff --git a/common/fb_common.c b/common/fb_common.c
new file mode 100644
index 0000000000..a1daaccd55
--- /dev/null
+++ b/common/fb_common.c
@@ -0,0 +1,22 @@
+/*
+* Copyright (C) 2016 The Android Open Source Project
+*
+* SPDX-License-Identifier: BSD-2-Clause
+*/
+
+#include <common.h>
+#include <fastboot.h>
+
+void fastboot_fail(const char *reason, char *response)
+{
+	const char *fail_str = "FAIL";
+	strncpy(response, fail_str, FASTBOOT_RESPONSE_LEN);
+	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(fail_str) - 1);
+}
+
+void fastboot_okay(const char *reason, char *response)
+{
+	const char *okay_str = "OKAY";
+	strncpy(response, okay_str, FASTBOOT_RESPONSE_LEN);
+	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(okay_str) - 1);
+}
diff --git a/common/fb_mmc.c b/common/fb_mmc.c
index 26d60b88d0..50cae9b418 100644
--- a/common/fb_mmc.c
+++ b/common/fb_mmc.c
@@ -74,7 +74,7 @@ static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info,
 
 static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 		const char *part_name, void *buffer,
-		unsigned int download_bytes)
+		unsigned int download_bytes, char *response)
 {
 	lbaint_t blkcnt;
 	lbaint_t blks;
@@ -85,7 +85,7 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 
 	if (blkcnt > info->size) {
 		error("too large for partition: '%s'\n", part_name);
-		fastboot_fail("too large for partition");
+		fastboot_fail("too large for partition", response);
 		return;
 	}
 
@@ -94,13 +94,13 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
 	blks = blk_dwrite(dev_desc, info->start, blkcnt, buffer);
 	if (blks != blkcnt) {
 		error("failed writing to device %d\n", dev_desc->devnum);
-		fastboot_fail("failed writing to device");
+		fastboot_fail("failed writing to device", response);
 		return;
 	}
 
 	printf("........ wrote " LBAFU " bytes to '%s'\n", blkcnt * info->blksz,
 	       part_name);
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
 
 #ifdef CONFIG_ANDROID_BOOT_IMAGE
@@ -261,7 +261,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 #endif
 
 void fb_mmc_flash_write(const char *cmd, void *download_buffer,
-			unsigned int download_bytes)
+			unsigned int download_bytes, char *response)
 {
 	struct blk_desc *dev_desc;
 	disk_partition_t info;
@@ -269,7 +269,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		error("invalid mmc device\n");
-		fastboot_fail("invalid mmc device");
+		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
@@ -280,16 +280,17 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 		if (is_valid_gpt_buf(dev_desc, download_buffer)) {
 			printf("%s: invalid GPT - refusing to write to flash\n",
 			       __func__);
-			fastboot_fail("invalid GPT partition");
+			fastboot_fail("invalid GPT partition", response);
 			return;
 		}
 		if (write_mbr_and_gpt_partitions(dev_desc, download_buffer)) {
 			printf("%s: writing GPT partitions failed\n", __func__);
-			fastboot_fail("writing GPT partitions failed");
+			fastboot_fail(
+				      "writing GPT partitions failed", response);
 			return;
 		}
 		printf("........ success\n");
-		fastboot_okay("");
+		fastboot_okay("", response);
 		return;
 	}
 #endif
@@ -323,7 +324,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 
 	if (part_get_info_by_name_or_alias(dev_desc, cmd, &info) < 0) {
 		error("cannot find partition: '%s'\n", cmd);
-		fastboot_fail("cannot find partition");
+		fastboot_fail("cannot find partition", response);
 		return;
 	}
 
@@ -344,14 +345,14 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer,
 
 		sparse.priv = &sparse_priv;
 		write_sparse_image(&sparse, cmd, download_buffer,
-				   download_bytes);
+				   download_bytes, response);
 	} else {
 		write_raw_image(dev_desc, &info, cmd, download_buffer,
-				download_bytes);
+				download_bytes, response);
 	}
 }
 
-void fb_mmc_erase(const char *cmd)
+void fb_mmc_erase(const char *cmd, char *response)
 {
 	int ret;
 	struct blk_desc *dev_desc;
@@ -361,21 +362,21 @@ void fb_mmc_erase(const char *cmd)
 
 	if (mmc == NULL) {
 		error("invalid mmc device");
-		fastboot_fail("invalid mmc device");
+		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
 		error("invalid mmc device");
-		fastboot_fail("invalid mmc device");
+		fastboot_fail("invalid mmc device", response);
 		return;
 	}
 
 	ret = part_get_info_by_name_or_alias(dev_desc, cmd, &info);
 	if (ret < 0) {
 		error("cannot find partition: '%s'", cmd);
-		fastboot_fail("cannot find partition");
+		fastboot_fail("cannot find partition", response);
 		return;
 	}
 
@@ -394,11 +395,11 @@ void fb_mmc_erase(const char *cmd)
 	blks = blk_derase(dev_desc, blks_start, blks_size);
 	if (blks != blks_size) {
 		error("failed erasing from device %d", dev_desc->devnum);
-		fastboot_fail("failed erasing from device");
+		fastboot_fail("failed erasing from device", response);
 		return;
 	}
 
 	printf("........ erased " LBAFU " bytes from '%s'\n",
 	       blks_size * info.blksz, cmd);
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
diff --git a/common/fb_nand.c b/common/fb_nand.c
index 3d027d4375..49c6023e74 100644
--- a/common/fb_nand.c
+++ b/common/fb_nand.c
@@ -32,7 +32,8 @@ __weak int board_fastboot_write_partition_setup(char *name)
 
 static int fb_nand_lookup(const char *partname,
 			  struct mtd_info **mtd,
-			  struct part_info **part)
+			  struct part_info **part
+			  char *response)
 {
 	struct mtd_device *dev;
 	int ret;
@@ -41,21 +42,21 @@ static int fb_nand_lookup(const char *partname,
 	ret = mtdparts_init();
 	if (ret) {
 		error("Cannot initialize MTD partitions\n");
-		fastboot_fail("cannot init mtdparts");
+		fastboot_fail("cannot init mtdparts", response);
 		return ret;
 	}
 
 	ret = find_dev_and_part(partname, &dev, &pnum, part);
 	if (ret) {
 		error("cannot find partition: '%s'", partname);
-		fastboot_fail("cannot find partition");
+		fastboot_fail("cannot find partition", response);
 		return ret;
 	}
 
 	if (dev->id->type != MTD_DEV_TYPE_NAND) {
 		error("partition '%s' is not stored on a NAND device",
 		      partname);
-		fastboot_fail("not a NAND device");
+		fastboot_fail("not a NAND device", response);
 		return -EINVAL;
 	}
 
@@ -146,16 +147,16 @@ static lbaint_t fb_nand_sparse_reserve(struct sparse_storage *info,
 }
 
 void fb_nand_flash_write(const char *cmd, void *download_buffer,
-			 unsigned int download_bytes)
+			 unsigned int download_bytes, char *response)
 {
 	struct part_info *part;
 	struct mtd_info *mtd = NULL;
 	int ret;
 
-	ret = fb_nand_lookup(cmd, &mtd, &part);
+	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
 		error("invalid NAND device");
-		fastboot_fail("invalid NAND device");
+		fastboot_fail("invalid NAND device", response);
 		return;
 	}
 
@@ -181,7 +182,7 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 
 		sparse.priv = &sparse_priv;
 		write_sparse_image(&sparse, cmd, download_buffer,
-				   download_bytes);
+				   download_bytes, response);
 	} else {
 		printf("Flashing raw image at offset 0x%llx\n",
 		       part->offset);
@@ -194,23 +195,23 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer,
 	}
 
 	if (ret) {
-		fastboot_fail("error writing the image");
+		fastboot_fail("error writing the image", response);
 		return;
 	}
 
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
 
-void fb_nand_erase(const char *cmd)
+void fb_nand_erase(const char *cmd, char *response)
 {
 	struct part_info *part;
 	struct mtd_info *mtd = NULL;
 	int ret;
 
-	ret = fb_nand_lookup(cmd, &mtd, &part);
+	ret = fb_nand_lookup(cmd, &mtd, &part, response);
 	if (ret) {
 		error("invalid NAND device");
-		fastboot_fail("invalid NAND device");
+		fastboot_fail("invalid NAND device", response);
 		return;
 	}
 
@@ -221,9 +222,9 @@ void fb_nand_erase(const char *cmd)
 	ret = _fb_nand_erase(mtd, part);
 	if (ret) {
 		error("failed erasing from device %s", mtd->name);
-		fastboot_fail("failed erasing from device");
+		fastboot_fail("failed erasing from device", response);
 		return;
 	}
 
-	fastboot_okay("");
+	fastboot_okay("", response);
 }
diff --git a/common/image-sparse.c b/common/image-sparse.c
index ddf5772cf8..f1382bd351 100644
--- a/common/image-sparse.c
+++ b/common/image-sparse.c
@@ -51,7 +51,7 @@
 
 void write_sparse_image(
 		struct sparse_storage *info, const char *part_name,
-		void *data, unsigned sz)
+		void *data, unsigned sz, char *response)
 {
 	lbaint_t blk;
 	lbaint_t blkcnt;
@@ -101,7 +101,7 @@ void write_sparse_image(
 	if (offset) {
 		printf("%s: Sparse image block size issue [%u]\n",
 		       __func__, sparse_header->blk_sz);
-		fastboot_fail("sparse image block size issue");
+		fastboot_fail("sparse image block size issue", response);
 		return;
 	}
 
@@ -137,7 +137,7 @@ void write_sparse_image(
 			if (chunk_header->total_sz !=
 			    (sparse_header->chunk_hdr_sz + chunk_data_sz)) {
 				fastboot_fail(
-					"Bogus chunk size for chunk type Raw");
+					"Bogus chunk size for chunk type Raw", response);
 				return;
 			}
 
@@ -146,7 +146,7 @@ void write_sparse_image(
 				    "%s: Request would exceed partition size!\n",
 				    __func__);
 				fastboot_fail(
-				    "Request would exceed partition size!");
+				    "Request would exceed partition size!", response);
 				return;
 			}
 
@@ -157,7 +157,7 @@ void write_sparse_image(
 				       __func__, "Write failed, block #",
 				       blk, blks);
 				fastboot_fail(
-					      "flash write failure");
+					      "flash write failure", response);
 				return;
 			}
 			blk += blks;
@@ -170,7 +170,7 @@ void write_sparse_image(
 			if (chunk_header->total_sz !=
 			    (sparse_header->chunk_hdr_sz + sizeof(uint32_t))) {
 				fastboot_fail(
-					"Bogus chunk size for chunk type FILL");
+					"Bogus chunk size for chunk type FILL", response);
 				return;
 			}
 
@@ -181,7 +181,7 @@ void write_sparse_image(
 						ARCH_DMA_MINALIGN));
 			if (!fill_buf) {
 				fastboot_fail(
-					"Malloc failed for: CHUNK_TYPE_FILL");
+					"Malloc failed for: CHUNK_TYPE_FILL", response);
 				return;
 			}
 
@@ -199,7 +199,7 @@ void write_sparse_image(
 				    "%s: Request would exceed partition size!\n",
 				    __func__);
 				fastboot_fail(
-				    "Request would exceed partition size!");
+				    "Request would exceed partition size!", response);
 				return;
 			}
 
@@ -215,7 +215,7 @@ void write_sparse_image(
 					       "Write failed, block #",
 					       blk, j);
 					fastboot_fail(
-						      "flash write failure");
+						      "flash write failure", response);
 					free(fill_buf);
 					return;
 				}
@@ -236,7 +236,7 @@ void write_sparse_image(
 			if (chunk_header->total_sz !=
 			    sparse_header->chunk_hdr_sz) {
 				fastboot_fail(
-					"Bogus chunk size for chunk type Dont Care");
+					"Bogus chunk size for chunk type Dont Care", response);
 				return;
 			}
 			total_blocks += chunk_header->chunk_sz;
@@ -246,7 +246,7 @@ void write_sparse_image(
 		default:
 			printf("%s: Unknown chunk type: %x\n", __func__,
 			       chunk_header->chunk_type);
-			fastboot_fail("Unknown chunk type");
+			fastboot_fail("Unknown chunk type", response);
 			return;
 		}
 	}
@@ -256,9 +256,9 @@ void write_sparse_image(
 	printf("........ wrote %u bytes to '%s'\n", bytes_written, part_name);
 
 	if (total_blocks != sparse_header->total_blks)
-		fastboot_fail("sparse image write failure");
+		fastboot_fail("sparse image write failure", response);
 	else
-		fastboot_okay("");
+		fastboot_okay("", response);
 
 	return;
 }
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index f3382a965b..a5c460b999 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -150,21 +150,6 @@ static struct usb_gadget_strings *fastboot_strings[] = {
 static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
 static int strcmp_l1(const char *s1, const char *s2);
 
-
-static char *fb_response_str;
-
-void fastboot_fail(const char *reason)
-{
-	strncpy(fb_response_str, "FAIL\0", 5);
-	strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1);
-}
-
-void fastboot_okay(const char *reason)
-{
-	strncpy(fb_response_str, "OKAY\0", 5);
-	strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1);
-}
-
 static void fastboot_complete(struct usb_ep *ep, struct usb_request *req)
 {
 	int status = req->status;
@@ -598,18 +583,14 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req)
 		return;
 	}
 
-	/* initialize the response buffer */
-	fb_response_str = response;
-
-	fastboot_fail("no flash device defined");
+	fastboot_fail("no flash device defined", response);
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
 	fb_mmc_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR,
-			   download_bytes);
+				download_bytes, response);
 #endif
 #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV
-	fb_nand_flash_write(cmd,
-			    (void *)CONFIG_FASTBOOT_BUF_ADDR,
-			    download_bytes);
+	fb_nand_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR,
+				download_bytes, response);
 #endif
 	fastboot_tx_write_str(response);
 }
@@ -650,15 +631,12 @@ static void cb_erase(struct usb_ep *ep, struct usb_request *req)
 		return;
 	}
 
-	/* initialize the response buffer */
-	fb_response_str = response;
-
-	fastboot_fail("no flash device defined");
+	fastboot_fail("no flash device defined", response);
 #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV
-	fb_mmc_erase(cmd);
+	fb_mmc_erase(cmd, response);
 #endif
 #ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV
-	fb_nand_erase(cmd);
+	fb_nand_erase(cmd, response);
 #endif
 	fastboot_tx_write_str(response);
 }
diff --git a/include/fastboot.h b/include/fastboot.h
index 616631e9aa..17bf12cac4 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -14,9 +14,9 @@
 #define _FASTBOOT_H_
 
 /* The 64 defined bytes plus \0 */
-#define FASTBOOT_RESPONSE_LEN	(64 + 1)
+#define FASTBOOT_RESPONSE_LEN (64 + 1)
 
-void fastboot_fail(const char *reason);
-void fastboot_okay(const char *reason);
+void fastboot_fail(const char *reason, char *response);
+void fastboot_okay(const char *reason, char *response);
 
 #endif /* _FASTBOOT_H_ */
diff --git a/include/fb_mmc.h b/include/fb_mmc.h
index 12b99cb5ee..402ba9b1b4 100644
--- a/include/fb_mmc.h
+++ b/include/fb_mmc.h
@@ -5,5 +5,5 @@
  */
 
 void fb_mmc_flash_write(const char *cmd, void *download_buffer,
-			unsigned int download_bytes);
-void fb_mmc_erase(const char *cmd);
+			unsigned int download_bytes, char *response);
+void fb_mmc_erase(const char *cmd, char *response);
diff --git a/include/fb_nand.h b/include/fb_nand.h
index aaf7cf7ae8..88bdf3690d 100644
--- a/include/fb_nand.h
+++ b/include/fb_nand.h
@@ -6,5 +6,5 @@
  */
 
 void fb_nand_flash_write(const char *cmd, void *download_buffer,
-			 unsigned int download_bytes);
-void fb_nand_erase(const char *cmd);
+			 unsigned int download_bytes, char *response);
+void fb_nand_erase(const char *cmd, char *response);
diff --git a/include/image-sparse.h b/include/image-sparse.h
index b0cc5007f7..967bb6a897 100644
--- a/include/image-sparse.h
+++ b/include/image-sparse.h
@@ -37,4 +37,4 @@ static inline int is_sparse_image(void *buf)
 }
 
 void write_sparse_image(struct sparse_storage *info, const char *part_name,
-			void *data, unsigned sz);
+			void *data, unsigned sz, char *response);
diff --git a/net/fastboot.c b/net/fastboot.c
index 1ae9d262e5..d0b8b34b92 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -5,6 +5,8 @@
 */
 
 #include <common.h>
+#include <fastboot.h>
+#include <fb_mmc.h>
 #include <net.h>
 #include <net/fastboot.h>
 #include <stdlib.h>
@@ -29,7 +31,6 @@ struct __attribute__((packed)) fastboot_header {
 #define PACKET_SIZE 1024
 #define FASTBOOT_HEADER_SIZE sizeof(struct fastboot_header)
 #define DATA_SIZE (PACKET_SIZE - FASTBOOT_HEADER_SIZE)
-#define FASTBOOT_RESPONSE_LEN (64 + 1)
 #define FASTBOOT_VERSION "0.4"
 
 /* Sequence number sent for every packet */
@@ -58,6 +59,8 @@ static int fastboot_our_port;
 
 static void fb_getvar(char*);
 static void fb_download(char*, unsigned int, char*);
+static void fb_flash(char*);
+static void fb_erase(char*);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
@@ -129,6 +132,10 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			fb_getvar(response);
 		} else if (!strcmp("download", cmd_string)) {
 			fb_download(fastboot_data, fastboot_data_len, response);
+		} else if (!strcmp("flash", cmd_string)) {
+			fb_flash(response);
+		} else if (!strcmp("erase", cmd_string)) {
+			fb_erase(response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -243,6 +250,29 @@ static void fb_download(char *fastboot_data, unsigned int fastboot_data_len,
 	}
 }
 
+/**
+ * Writes the previously downloaded image to the partition indicated by
+ * cmd_parameter. Writes to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_flash(char *response)
+{
+	fb_mmc_flash_write(cmd_parameter, (void*)CONFIG_FASTBOOT_BUF_ADDR,
+			image_size, response);
+}
+
+/**
+ * Erases the partition indicated by cmd_parameter (clear to 0x00s). Writes
+ * to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_erase(char *response)
+{
+	fb_mmc_erase(cmd_parameter, response);
+}
+
 /**
  * Writes a response to response buffer of the form "$tag$reason".
  *

commit 45930fc17be7eeb48062e3585b4cdc21607e8584
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 8 15:26:38 2016 -0800

    Implement fastboot download.
    
    Adds function to respond to fastboot download, and copy downloaded
    image to buffer in RAM.
    
    Bug: 31887729
    Test: - Create file "foo" containing 2048 chars = "-"
          - Start "fastboot udp" on device and run
            "fastboot -s udp:$RPI_IP flash boot foo" from host
          - Observe that rpi received 2048 bytes of data, and
            CONFIG_FASTBOOT_BUF_ADDR contains "-"*2048
    
    Change-Id: Ib42378448627b48c629af89f39a0394db93c3824

diff --git a/net/fastboot.c b/net/fastboot.c
index 4b192710ee..1ae9d262e5 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -45,6 +45,11 @@ static unsigned int last_packet_len = 0;
 static char *cmd_string = NULL;
 static char *cmd_parameter = NULL;
 
+/* Fastboot download parameters */
+static unsigned int bytes_received = 0;
+static unsigned int bytes_expected = 0;
+static unsigned int image_size = 0;
+
 static struct in_addr fastboot_remote_ip;
 /* The UDP port at their end */
 static int fastboot_remote_port;
@@ -52,6 +57,7 @@ static int fastboot_remote_port;
 static int fastboot_our_port;
 
 static void fb_getvar(char*);
+static void fb_download(char*, unsigned int, char*);
 static void cleanup_command_data(void);
 static void write_fb_response(const char*, const char*, char*);
 
@@ -121,6 +127,8 @@ static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
 			}
 		} else if (!strcmp("getvar", cmd_string)) {
 			fb_getvar(response);
+		} else if (!strcmp("download", cmd_string)) {
+			fb_download(fastboot_data, fastboot_data_len, response);
 		} else {
 			error("command %s not implemented.\n", cmd_string);
 			write_fb_response("FAIL", "unrecognized command", response);
@@ -182,6 +190,59 @@ static void fb_getvar(char *response)
 	}
 }
 
+/**
+ * Copies image data from fastboot_data to CONFIG_FASTBOOT_BUF_ADDR.
+ * Writes to response.
+ *
+ * @param fastboot_data        Pointer to received fastboot data
+ * @param fastboot_data_len    Length of received fastboot data
+ * @param repsonse             Pointer to fastboot response buffer
+ */
+static void fb_download(char *fastboot_data, unsigned int fastboot_data_len,
+		char *response)
+{
+	char *tmp;
+
+	if (bytes_expected == 0) {
+		if (cmd_parameter == NULL) {
+			write_fb_response("FAIL", "Expected command parameter", response);
+			return;
+		}
+		bytes_expected = simple_strtoul(cmd_parameter, &tmp, 16);
+		if (bytes_expected == 0) {
+			write_fb_response("FAIL", "Expected nonzero image size", response);
+			return;
+		}
+	}
+	if (fastboot_data_len == 0 && bytes_received == 0) {
+		/* Nothing to download yet. Response is of the form:
+		 * [DATA|FAIL]$cmd_parameter
+		 *
+		 * where cmd_parameter is an 8 digit hexadecimal number
+		 */
+		if (bytes_expected > CONFIG_FASTBOOT_BUF_SIZE) {
+			write_fb_response("FAIL", cmd_parameter, response);
+		} else {
+			write_fb_response("DATA", cmd_parameter, response);
+		}
+	} else if (fastboot_data_len == 0 && (bytes_received >= bytes_expected)) {
+		/* Download complete. Respond with "OKAY" */
+		write_fb_response("OKAY", "", response);
+		image_size = bytes_received;
+		bytes_expected = bytes_received = 0;
+	} else {
+		if (fastboot_data_len == 0 ||
+				(bytes_received + fastboot_data_len) > bytes_expected) {
+			write_fb_response("FAIL", "Received invalid data length", response);
+			return;
+		}
+		/* Download data to CONFIG_FASTBOOT_BUF_ADDR */
+		memcpy((void*)CONFIG_FASTBOOT_BUF_ADDR + bytes_received, fastboot_data,
+				fastboot_data_len);
+		bytes_received += fastboot_data_len;
+	}
+}
+
 /**
  * Writes a response to response buffer of the form "$tag$reason".
  *

commit 02ad78925c7d198b08fbeca995163189ee18def5
Author: Jocelyn Bohr <bohr@google.com>
Date:   Tue Nov 8 12:58:15 2016 -0800

    Handle Fastboot packet types, implement getvar.
    
    This patch adds functionality to parse Fastboot packet types, and send
    a response to getvar commands.
    
    Bug: 31887729
    Test: Responds to getvar commands with correct values for variables
          version, bootloader-version, downloadsize, serialno.
    
    Change-Id: I752a6119d3019745f20defbb1f0c13dba1f24221

diff --git a/net/fastboot.c b/net/fastboot.c
index eefd648df4..4b192710ee 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -28,6 +28,9 @@ struct __attribute__((packed)) fastboot_header {
 
 #define PACKET_SIZE 1024
 #define FASTBOOT_HEADER_SIZE sizeof(struct fastboot_header)
+#define DATA_SIZE (PACKET_SIZE - FASTBOOT_HEADER_SIZE)
+#define FASTBOOT_RESPONSE_LEN (64 + 1)
+#define FASTBOOT_VERSION "0.4"
 
 /* Sequence number sent for every packet */
 static unsigned short fb_sequence_number = 1;
@@ -38,19 +41,30 @@ static const unsigned short fb_udp_version = 1;
 static uchar last_packet[PACKET_SIZE];
 static unsigned int last_packet_len = 0;
 
+/* Parsed from first fastboot command packet */
+static char *cmd_string = NULL;
+static char *cmd_parameter = NULL;
+
 static struct in_addr fastboot_remote_ip;
 /* The UDP port at their end */
 static int fastboot_remote_port;
 /* The UDP port at our end */
 static int fastboot_our_port;
 
+static void fb_getvar(char*);
+static void cleanup_command_data(void);
+static void write_fb_response(const char*, const char*, char*);
+
 /**
  * Constructs and sends a packet in response to received fastboot packet
  *
- * @param fb_header    Header for response packet
- * @param retransmit   Nonzero if sending last sent packet
+ * @param fb_header            Header for response packet
+ * @param fastboot_data        Pointer to received fastboot data
+ * @param fastboot_data_len    Length of received fastboot data
+ * @param retransmit           Nonzero if sending last sent packet
  */
-static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
+static void fastboot_send(struct fastboot_header fb_header, char *fastboot_data,
+		unsigned int fastboot_data_len, uchar retransmit)
 {
 	uchar *packet;
 	uchar *packet_base;
@@ -58,6 +72,7 @@ static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
 	const char *error_msg = "An error occurred.";
 	short tmp;
 	struct fastboot_header fb_response_header = fb_header;
+	char response[FASTBOOT_RESPONSE_LEN] = {0};
 	/*
 	 *	We will always be sending some sort of packet, so
 	 *	cobble together the packet headers now.
@@ -96,6 +111,24 @@ static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
 		packet += strlen(error_msg);
 		break;
 	case FASTBOOT_FASTBOOT:
+		if (cmd_string == NULL) {
+			/* Parse command and send ack */
+			cmd_parameter = fastboot_data;
+			cmd_string = strsep(&cmd_parameter, ":");
+			cmd_string = strdup(cmd_string);
+			if (cmd_parameter) {
+				cmd_parameter = strdup(cmd_parameter);
+			}
+		} else if (!strcmp("getvar", cmd_string)) {
+			fb_getvar(response);
+		} else {
+			error("command %s not implemented.\n", cmd_string);
+			write_fb_response("FAIL", "unrecognized command", response);
+		}
+		/* Write response to packet */
+		memcpy(packet, response, strlen(response));
+		packet += strlen(response);
+		break;
 	default:
 		error("ID %d not implemented.\n", fb_header.id);
 		return;
@@ -109,6 +142,75 @@ static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
 
 	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
 			    fastboot_remote_port, fastboot_our_port, len);
+
+	/* OKAY and FAIL indicate command is complete */
+	if (!strncmp("OKAY", response, 4) ||
+			!strncmp("FAIL", response, 4)) {
+		cleanup_command_data();
+	}
+}
+
+/**
+ * Writes ascii string specified by cmd_parameter to response.
+ *
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void fb_getvar(char *response)
+{
+
+	if (cmd_parameter == NULL) {
+		write_fb_response("FAIL", "missing var", response);
+	} else if (!strcmp("version", cmd_parameter)) {
+		write_fb_response("OKAY", FASTBOOT_VERSION, response);
+	} else if (!strcmp("bootloader-version", cmd_parameter)) {
+		write_fb_response("OKAY", U_BOOT_VERSION, response);
+	} else if (!strcmp("downloadsize", cmd_parameter) ||
+		!strcmp("max-download-size", cmd_parameter)) {
+		char buf_size_str[12];
+		sprintf(buf_size_str, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE);
+		write_fb_response("OKAY", buf_size_str, response);
+	} else if (!strcmp("serialno", cmd_parameter)) {
+		const char *tmp = getenv("serial#");
+		if (tmp) {
+			write_fb_response("OKAY", tmp, response);
+		} else {
+			write_fb_response("FAIL", "Value not set", response);
+		}
+	} else {
+		printf("WARNING: unknown variable: %s\n", cmd_parameter);
+		write_fb_response("FAIL", "Variable not implemented", response);
+	}
+}
+
+/**
+ * Writes a response to response buffer of the form "$tag$reason".
+ *
+ * @param tag         The first part of the response
+ * @param reason      The second part of the response
+ * @param repsonse    Pointer to fastboot response buffer
+ */
+static void write_fb_response(const char* tag, const char *reason,
+		char *response)
+{
+	strncpy(response, tag, strlen(tag));
+	strncat(response, reason, FASTBOOT_RESPONSE_LEN - strlen(tag) - 1);
+}
+
+/**
+ * Frees any resources allocated during current fastboot command.
+ */
+static void cleanup_command_data(void)
+{
+	/* cmd_parameter and cmd_string potentially point to memory allocated by
+	 * strdup
+	 */
+	if (cmd_parameter) {
+		free(cmd_parameter);
+	}
+	if (cmd_string) {
+		free(cmd_string);
+	}
+	cmd_parameter = cmd_string = NULL;
 }
 
 /**
@@ -124,6 +226,8 @@ static void fastboot_handler(uchar *packet, unsigned dport, struct in_addr sip,
 		unsigned sport, unsigned len)
 {
 	struct fastboot_header fb_header;
+	char fastboot_data[DATA_SIZE] = {0};
+	unsigned int fastboot_data_len = 0;
 
 	if (dport != fastboot_our_port) {
 		return;
@@ -143,22 +247,26 @@ static void fastboot_handler(uchar *packet, unsigned dport, struct in_addr sip,
 
 	switch (fb_header.id) {
 	case FASTBOOT_QUERY:
-		fastboot_send(fb_header, 0);
+		fastboot_send(fb_header, fastboot_data, 0, 0);
 		break;
 	case FASTBOOT_INIT:
+	case FASTBOOT_FASTBOOT:
+		fastboot_data_len = len;
+		if (len > 0) {
+			memcpy(fastboot_data, packet, len);
+		}
 		if (fb_header.seq == fb_sequence_number) {
-			fastboot_send(fb_header, 0);
+			fastboot_send(fb_header, fastboot_data, fastboot_data_len, 0);
 			fb_sequence_number++;
 		} else if (fb_header.seq == fb_sequence_number - 1) {
 			/* Retransmit last sent packet */
-			fastboot_send(fb_header, 1);
+			fastboot_send(fb_header, fastboot_data, fastboot_data_len, 1);
 		}
 		break;
-	case FASTBOOT_FASTBOOT:
 	default:
 		error("ID %d not implemented.\n", fb_header.id);
 		fb_header.id = FASTBOOT_ERROR;
-		fastboot_send(fb_header, 0);
+		fastboot_send(fb_header, fastboot_data, 0, 0);
 		break;
 	}
 }

commit 965eda410b8d28439dc1ba4f76061880d72978fd
Author: Jocelyn Bohr <bohr@google.com>
Date:   Mon Nov 7 08:43:55 2016 -0800

    Add support for fastboot command over UDP
    
    The Raspberry Pi does not support USB device mode, so fastboot over
    USB does not work. This patch adds support for and partially
    implements the device side fastboot UDP protocol as a U-boot command.
    It requires an ip address set and ethernet initialized.
    
    - Modify U-boot fastboot command to do fastboot over UDP
    - Add net/fastboot.c, which implements fastboot server functions
    - Handle QUERY and INIT fastboot packets
    - Add CONFIG_UDP_FUNCION_FASTBOOT to enable fastboot over UDP
    
    Bug: 31887729
    Test: Tested with fastboot, responds correctly to query and init
          packets.
    
    Change-Id: I4045abaf7a4455d756b7c1c00215afaa90c70a6e

diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 488822a2ee..3e24fa0bd2 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -11,18 +11,37 @@
 #include <command.h>
 #include <console.h>
 #include <g_dnl.h>
+#include <net.h>
 #include <usb.h>
 
 static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 {
+#ifdef CONFIG_USB_FUNCTION_FASTBOOT
 	int controller_index;
 	char *usb_controller;
 	int ret;
+#endif
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
 
-	usb_controller = argv[1];
+	if (!strcmp(argv[1], "udp")) {
+#ifndef CONFIG_UDP_FUNCTION_FASTBOOT
+		error("Fastboot UDP not enabled\n");
+		return -1;
+#else
+		return do_fastboot_udp(cmdtp, flag, argc, argv);
+#endif
+	}
+
+	if (strcmp(argv[1], "usb") || argc < 3)
+		return CMD_RET_USAGE;
+
+#ifndef CONFIG_USB_FUNCTION_FASTBOOT
+	error("Fastboot USB not enabled\n");
+	return -1;
+#else
+	usb_controller = argv[2];
 	controller_index = simple_strtoul(usb_controller, NULL, 0);
 
 	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
@@ -59,11 +78,14 @@ exit:
 	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
 
 	return ret;
+#endif
 }
 
 U_BOOT_CMD(
-	fastboot, 2, 1, do_fastboot,
-	"use USB Fastboot protocol",
-	"<USB_controller>\n"
-	"    - run as a fastboot usb device"
+	fastboot, 3, 1, do_fastboot,
+	"use USB or UDP Fastboot protocol",
+	"[usb,udp] <USB_controller>\n"
+	" - run as a fastboot usb or udp device\n"
+	"   usb: specify <USB_controller>\n"
+	"   udp: requires ip_addr set and ethernet initialized\n"
 );
diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index a2638a8bba..453cc49057 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -11,17 +11,25 @@ config USB_FUNCTION_FASTBOOT
 	help
 	  This enables the USB part of the fastboot gadget.
 
+config UDP_FUNCTION_FASTBOOT
+	select NET
+	bool "Enable fastboot protocol over UDP"
+	help
+	  This enables the fastboot protocol over UDP.
+
 config CMD_FASTBOOT
 	bool "Enable FASTBOOT command"
+	depends on USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 	help
 	  This enables the command "fastboot" which enables the Android
-	  fastboot mode for the platform's USB device. Fastboot is a USB
-	  protocol for downloading images, flashing and device control
-	  used on Android devices.
+	  fastboot mode for the platform. Fastboot is a protocol for
+	  downloading images, flashing and device control used on
+	  Android devices. Fastboot requires either network stack
+	  enabled or support for acting as a USB device.
 
 	  See doc/README.android-fastboot for more information.
 
-if USB_FUNCTION_FASTBOOT
+if USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 
 config FASTBOOT_BUF_ADDR
 	hex "Define FASTBOOT buffer address"
@@ -74,29 +82,6 @@ config FASTBOOT_FLASH_MMC_DEV
 	  regarding the non-volatile storage device. Define this to
 	  the eMMC device that fastboot should use to store the image.
 
-config FASTBOOT_GPT_NAME
-	string "Target name for updating GPT"
-	depends on FASTBOOT_FLASH
-	default "gpt"
-	help
-	  The fastboot "flash" command supports writing the downloaded
-	  image to the Protective MBR and the Primary GUID Partition
-	  Table. (Additionally, this downloaded image is post-processed
-	  to generate and write the Backup GUID Partition Table.)
-	  This occurs when the specified "partition name" on the
-	  "fastboot flash" command line matches the value defined here.
-	  The default target name for updating GPT is "gpt".
-
-config FASTBOOT_MBR_NAME
-	string "Target name for updating MBR"
-	depends on FASTBOOT_FLASH
-	default "mbr"
-	help
-	  The fastboot "flash" command allows to write the downloaded image
-	  to the Master Boot Record. This occurs when the "partition name"
-	  specified on the "fastboot flash" command line matches the value
-	  defined here. The default target name for updating MBR is "mbr".
-
-endif # USB_FUNCTION_FASTBOOT
+endif # USB_FUNCTION_FASTBOOT || UDP_FUNCTION_FASTBOOT
 
 endif # FASTBOOT
diff --git a/cmd/net.c b/cmd/net.c
index d7c776aacf..1727198c86 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -70,6 +70,12 @@ U_BOOT_CMD(
 );
 #endif
 
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+int do_fastboot_udp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	return netboot_common(FASTBOOT, cmdtp, argc, argv);
+}
+#endif
 
 #ifdef CONFIG_CMD_RARP
 int do_rarpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
diff --git a/include/net.h b/include/net.h
index 455b48f6c7..109c15e283 100644
--- a/include/net.h
+++ b/include/net.h
@@ -538,7 +538,7 @@ extern int		net_restart_wrap;	/* Tried all network devices */
 
 enum proto_t {
 	BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP,
-	TFTPSRV, TFTPPUT, LINKLOCAL
+	TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT
 };
 
 extern char	net_boot_file_name[1024];/* Boot File name */
@@ -552,6 +552,10 @@ extern char *net_dns_resolve;		/* The host to resolve  */
 extern char *net_dns_env_var;		/* the env var to put the ip into */
 #endif
 
+#if defined(CONFIG_UDP_FUNCTION_FASTBOOT)
+int do_fastboot_udp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+#endif
+
 #if defined(CONFIG_CMD_PING)
 extern struct in_addr net_ping_ip;	/* the ip address to ping */
 #endif
diff --git a/include/net/fastboot.h b/include/net/fastboot.h
new file mode 100644
index 0000000000..10a5e39be1
--- /dev/null
+++ b/include/net/fastboot.h
@@ -0,0 +1,22 @@
+/*
+* Copyright (C) 2016 The Android Open Source Project
+*
+* SPDX-License-Identifier: BSD-2-Clause
+*/
+
+#ifndef __NET_FASTBOOT_H__
+#define __NET_FASTBOOT_H__
+
+/**********************************************************************/
+/*
+ *	Global functions and variables.
+ */
+
+/**
+ * Wait for incoming fastboot comands.
+ */
+void fastboot_start_server(void);
+
+/**********************************************************************/
+
+#endif /* __NET_FASTBOOT_H__ */
diff --git a/net/Makefile b/net/Makefile
index ae54eee5af..6dfd82e647 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_CMD_NET)  += tftp.o
 # sprintf(buf, index ? "foo%d" : "foo", index)
 # and this is intentional usage.
 CFLAGS_eth_common.o += -Wno-format-extra-args
+obj-$(CONFIG_UDP_FUNCTION_FASTBOOT)  += fastboot.o
diff --git a/net/fastboot.c b/net/fastboot.c
new file mode 100644
index 0000000000..eefd648df4
--- /dev/null
+++ b/net/fastboot.c
@@ -0,0 +1,177 @@
+/*
+* Copyright (C) 2016 The Android Open Source Project
+*
+* SPDX-License-Identifier: BSD-2-Clause
+*/
+
+#include <common.h>
+#include <net.h>
+#include <net/fastboot.h>
+#include <stdlib.h>
+#include <version.h>
+
+/* Fastboot port # defined in spec */
+#define WELL_KNOWN_PORT 5554
+
+enum {
+	FASTBOOT_ERROR = 0,
+	FASTBOOT_QUERY = 1,
+	FASTBOOT_INIT = 2,
+	FASTBOOT_FASTBOOT = 3,
+};
+
+struct __attribute__((packed)) fastboot_header {
+	uchar id;
+	uchar flags;
+	unsigned short seq;
+};
+
+#define PACKET_SIZE 1024
+#define FASTBOOT_HEADER_SIZE sizeof(struct fastboot_header)
+
+/* Sequence number sent for every packet */
+static unsigned short fb_sequence_number = 1;
+static const unsigned short fb_packet_size = PACKET_SIZE;
+static const unsigned short fb_udp_version = 1;
+
+/* Keep track of last packet for resubmission */
+static uchar last_packet[PACKET_SIZE];
+static unsigned int last_packet_len = 0;
+
+static struct in_addr fastboot_remote_ip;
+/* The UDP port at their end */
+static int fastboot_remote_port;
+/* The UDP port at our end */
+static int fastboot_our_port;
+
+/**
+ * Constructs and sends a packet in response to received fastboot packet
+ *
+ * @param fb_header    Header for response packet
+ * @param retransmit   Nonzero if sending last sent packet
+ */
+static void fastboot_send(struct fastboot_header fb_header, uchar retransmit)
+{
+	uchar *packet;
+	uchar *packet_base;
+	int len = 0;
+	const char *error_msg = "An error occurred.";
+	short tmp;
+	struct fastboot_header fb_response_header = fb_header;
+	/*
+	 *	We will always be sending some sort of packet, so
+	 *	cobble together the packet headers now.
+	 */
+	packet = net_tx_packet + net_eth_hdr_size() + IP_UDP_HDR_SIZE;
+	packet_base = packet;
+
+	/* Resend last packet */
+	if (retransmit) {
+		memcpy(packet, last_packet, last_packet_len);
+		net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
+				    fastboot_remote_port, fastboot_our_port, last_packet_len);
+		return;
+	}
+
+	fb_response_header.seq = htons(fb_response_header.seq);
+	memcpy(packet, &fb_response_header, sizeof(fb_response_header));
+	packet += sizeof(fb_response_header);
+
+	switch (fb_header.id) {
+	case FASTBOOT_QUERY:
+		tmp = htons(fb_sequence_number);
+		memcpy(packet, &tmp, sizeof(tmp));
+		packet += sizeof(tmp);
+		break;
+	case FASTBOOT_INIT:
+		tmp = htons(fb_udp_version);
+		memcpy(packet, &tmp, sizeof(tmp));
+		packet += sizeof(tmp);
+		tmp = htons(fb_packet_size);
+		memcpy(packet, &tmp, sizeof(tmp));
+		packet += sizeof(tmp);
+		break;
+	case FASTBOOT_ERROR:
+		memcpy(packet, error_msg, strlen(error_msg));
+		packet += strlen(error_msg);
+		break;
+	case FASTBOOT_FASTBOOT:
+	default:
+		error("ID %d not implemented.\n", fb_header.id);
+		return;
+	}
+
+	len = packet-packet_base;
+
+	/* Save packet for retransmitting */
+	last_packet_len = len;
+	memcpy(last_packet, packet_base, last_packet_len);
+
+	net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
+			    fastboot_remote_port, fastboot_our_port, len);
+}
+
+/**
+ * Incoming UDP packet handler.
+ *
+ * @param packet  Pointer to incoming UDP packet
+ * @param dport   Destination UDP port
+ * @param sip     Source IP address
+ * @param sport   Source UDP port
+ * @param len     Packet length
+ */
+static void fastboot_handler(uchar *packet, unsigned dport, struct in_addr sip,
+		unsigned sport, unsigned len)
+{
+	struct fastboot_header fb_header;
+
+	if (dport != fastboot_our_port) {
+		return;
+	}
+
+	fastboot_remote_ip = sip;
+	fastboot_remote_port = sport;
+
+	if (len < FASTBOOT_HEADER_SIZE || len > PACKET_SIZE) {
+		return;
+	}
+	memcpy(&fb_header, packet, sizeof(fb_header));
+	fb_header.flags = 0;
+	fb_header.seq = ntohs(fb_header.seq);
+	packet += sizeof(fb_header);
+	len -= sizeof(fb_header);
+
+	switch (fb_header.id) {
+	case FASTBOOT_QUERY:
+		fastboot_send(fb_header, 0);
+		break;
+	case FASTBOOT_INIT:
+		if (fb_header.seq == fb_sequence_number) {
+			fastboot_send(fb_header, 0);
+			fb_sequence_number++;
+		} else if (fb_header.seq == fb_sequence_number - 1) {
+			/* Retransmit last sent packet */
+			fastboot_send(fb_header, 1);
+		}
+		break;
+	case FASTBOOT_FASTBOOT:
+	default:
+		error("ID %d not implemented.\n", fb_header.id);
+		fb_header.id = FASTBOOT_ERROR;
+		fastboot_send(fb_header, 0);
+		break;
+	}
+}
+
+void fastboot_start_server(void)
+{
+	printf("Using %s device\n", eth_get_name());
+	printf("Listening for fastboot command on %pI4\n", &net_ip);
+
+	fastboot_our_port = WELL_KNOWN_PORT;
+
+	net_set_udp_handler(fastboot_handler);
+
+	/* zero out server ether in case the server ip has changed */
+	memset(net_server_ethaddr, 0, 6);
+}
diff --git a/net/net.c b/net/net.c
index 4259c9e321..3469a456ea 100644
--- a/net/net.c
+++ b/net/net.c
@@ -87,6 +87,9 @@
 #include <environment.h>
 #include <errno.h>
 #include <net.h>
+#if defined(CONFIG_UDP_FUNCTION_FASTBOOT)
+#include <net/fastboot.h>
+#endif
 #include <net/tftp.h>
 #if defined(CONFIG_LED_STATUS)
 #include <miiphy.h>
@@ -453,6 +456,11 @@ restart:
 			tftp_start_server();
 			break;
 #endif
+#ifdef CONFIG_UDP_FUNCTION_FASTBOOT
+		case FASTBOOT:
+			fastboot_start_server();
+			break;
+#endif
 #if defined(CONFIG_CMD_DHCP)
 		case DHCP:
 			bootp_reset();
@@ -1324,6 +1332,7 @@ common:
 		/* Fall through */
 
 	case NETCONS:
+	case FASTBOOT:
 	case TFTPSRV:
 		if (net_ip.s_addr == 0) {
 			puts("*** ERROR: `ipaddr' not set\n");

commit 83a51ebaaad9be5e90ca18534919101787559789
Author: Alex Deymo <deymo@google.com>
Date:   Mon Oct 3 17:38:26 2016 -0700

    Add 'load_android' command to load Android images.
    
    Android kernel images include a header that specifies addresses and
    kernel size. This patch adds a command to load these images from
    storage without specifying the size or address of them, and parsing
    them from the header instead.
    
    Bug: 31636643
    Change-Id: I84a9cf82cff78ce2299b1981c4f6f9a5720e4d0d

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 87b56e2c92..833d98d8c6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -743,6 +743,15 @@ config CMD_LOADS
 	help
 	  Load an S-Record file over serial line
 
+config CMD_LOAD_ANDROID
+	bool "load_android"
+	default n
+	depends on ANDROID_BOOT_IMAGE
+	help
+	  Load an Android Boot image from storage. The Android Boot images
+	  define the size and kernel address on the header, which are used by
+	  this command.
+
 config CMD_MMC
 	bool "mmc"
 	help
diff --git a/cmd/Makefile b/cmd/Makefile
index 868113eab2..f1c412160d 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_LED_STATUS_CMD) += legacy_led.o
 obj-$(CONFIG_CMD_LED) += led.o
 obj-$(CONFIG_CMD_LICENSE) += license.o
 obj-y += load.o
+obj-$(CONFIG_CMD_LOAD_ANDROID) += load_android.o
 obj-$(CONFIG_LOGBUFFER) += log.o
 obj-$(CONFIG_ID_EEPROM) += mac.o
 obj-$(CONFIG_CMD_MD5SUM) += md5sum.o
diff --git a/cmd/load_android.c b/cmd/load_android.c
new file mode 100644
index 0000000000..e6c5930837
--- /dev/null
+++ b/cmd/load_android.c
@@ -0,0 +1,85 @@
+/*
+  * Copyright (C) 2008 The Android Open Source Project
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+#include <common.h>
+#include <command.h>
+#include <mapmem.h>
+
+static int do_load_android(cmd_tbl_t *cmdtp, int flag, int argc,
+			   char * const argv[])
+{
+	int boot_partition;
+	unsigned long load_address, blk_cnt, blk_read;
+	int ret = CMD_RET_SUCCESS;
+	char *addr_arg_endp, *addr_str;
+	void *buf;
+	struct blk_desc *dev_desc;
+	disk_partition_t part_info;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+	if (argc > 4)
+		return CMD_RET_USAGE;
+
+	if (argc >= 4) {
+		load_address = simple_strtoul(argv[3], &addr_arg_endp, 16);
+		if (addr_arg_endp == argv[3] || *addr_arg_endp != '\0')
+			return CMD_RET_USAGE;
+	} else {
+		addr_str = env_get("loadaddr");
+		if (addr_str != NULL)
+			load_address = simple_strtoul(addr_str, NULL, 16);
+		else
+			load_address = CONFIG_SYS_LOAD_ADDR;
+	}
+
+	boot_partition = blk_get_device_part_str(argv[1],
+	                                         (argc >= 3) ? argv[2] : NULL,
+	                                         &dev_desc, &part_info, 1);
+	if (boot_partition < 0)
+		return CMD_RET_FAILURE;
+
+	/* We don't know the size of the Android image before reading the header
+	 * so we don't limit the size of the mapped memory. */
+	buf = map_sysmem(load_address, 0 /* size */);
+
+	/* Read the Android header first and then read the rest. */
+	if (blk_dread(dev_desc, part_info.start, 1, buf) != 1) {
+		ret = CMD_RET_FAILURE;
+	}
+
+	if (ret == CMD_RET_SUCCESS && android_image_check_header(buf) != 0) {
+		printf("\n** Invalid Android Image header on %s %d:%d **\n",
+		       argv[1], dev_desc->devnum, boot_partition);
+		ret = CMD_RET_FAILURE;
+	}
+	if (ret == CMD_RET_SUCCESS) {
+		blk_cnt = (android_image_get_end(buf) - (ulong)buf +
+		           part_info.blksz - 1) / part_info.blksz;
+		printf("\nLoading Android Image (%lu blocks) to 0x%lx... ",
+		       blk_cnt, load_address);
+		blk_read = blk_dread(dev_desc, part_info.start, blk_cnt, buf);
+	}
+
+	unmap_sysmem(buf);
+	if (ret != CMD_RET_SUCCESS)
+		return ret;
+
+	printf("%lu blocks read: %s\n",
+	       blk_read, (blk_read == blk_cnt) ? "OK" : "ERROR");
+	return (blk_read == blk_cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
+}
+
+
+#if defined(CONFIG_CMD_LOAD_ANDROID)
+U_BOOT_CMD(
+	load_android, 4, 0, do_load_android,
+	"load Android Boot image from storage.",
+	"<interface> [<dev[:part]> [<addr>]]\n"
+	"    - Load a binary Android Boot image from the partition 'part' on\n"
+	"      device type 'interface' instance 'dev' to address 'addr'."
+);
+#endif	/* CONFIG_CMD_LOAD_ANDROID */

commit dd3908179b0c80b0920894c24e3134371749c9a9
Author: Alex Deymo <deymo@google.com>
Date:   Fri Sep 23 10:28:10 2016 -0700

    rpi: Capture the device tree passed from the bootloader.
    
    The Raspberry Pi bootloader (bootcode.bin and start.elf) will load
    the device tree from the same FAT partition and combine it with
    device tree overlays specified in config.txt. This device tree is then
    passed to the kernel (in this case U-Boot) in the r2 register.
    
    This patch retrieves the machine id (r1 register) and the device tree
    (r2 register) passed to U-Boot and store those in environment variables
    on boot so boot scripts can refer to those and pass them to the kernel.
    
    When CONFIG_OF_BOARD is defined, the same device tree passed to U-Boot
    will be used in lieu of bundling one with the U-Boot image at build
    time.
    
    Bug: 31636643
    Test: Booted a Raspberry Pi3 passing the DT from the bootloader.
    Change-Id: Ibf9c754719b3e0f41d20382833abf853ba7613e2

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 530f149617..10b386901d 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -348,11 +348,72 @@ static void set_serial_number(void)
 	env_set("serial#", serial_string);
 }
 
+/* Save parameters passed from the bootloader. Initialize these in a non-zero
+ * value to force them to be placed in .data instead of .bss since the .bss
+ * section will be initialized with 0 later in the boot process. */
+static u32 _saved_boot_r0 = 1;
+static u32 _saved_boot_r1 = 2;
+static u32 _saved_boot_r2 = 3;
+
+void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {
+	_saved_boot_r0 = r0;
+	_saved_boot_r1 = r1;
+	_saved_boot_r2 = r2;
+	save_boot_params_ret();
+}
+
+/* Returns whether we got passed a FDT from the bootloader. If it was passed,
+ * it returns the address of it. Otherwise returns NULL.
+ *
+ * The RPi start.elf passes important system configuration like memory sizes
+ * and overlays attached as configured in the config.txt file via a Device Tree.
+ *
+ * start.elf determines whether the kernel (in this case U-Boot) supports DT by
+ * looking at a the tail of the kernel file which is added by mkknlimg tool in
+ * the following repository:
+ *
+ * https://github.com/raspberrypi/tools/blob/master/mkimage/knlinfo
+ *
+ * To force start.elf to pass a combined, ready-to-go DT, you have to use the
+ * mkknlimg tool on the kernel the raspberry bootloader is using, that is, the
+ * u-boot.bin image:
+ *
+ * ./mkknlimg --dtok u-boot.bin /boot/u-boot.bin
+ */
+static void* rpi_passed_fdt(void)
+{
+	if (_saved_boot_r0 != 0 || fdt_check_header((void *)_saved_boot_r2))
+		return NULL;
+	return (void *)_saved_boot_r2;
+}
+
+void* board_fdt_blob_setup(void)
+{
+	return rpi_passed_fdt();
+}
+
+static void set_boot_args(void)
+{
+	struct fdt_header *passed_fdt = rpi_passed_fdt();
+	if (passed_fdt == NULL)
+		return;
+
+	/* Set the machine id from r1 register and FDT from register r2. */
+	setenv_hex("machid", _saved_boot_r1);
+	setenv_hex("fdt_addr_r", _saved_boot_r2);
+
+	/* Setting fdt_high forces the updated FDT generated by U-Boot to be
+	 * placed at this address. We choose to place it 512 KiB before the
+	 * passed FDT, limiting the FDT size to 512 KiB. */
+	setenv_hex("fdt_high", _saved_boot_r2 - 512 * 1024);
+}
+
 int misc_init_r(void)
 {
 	set_fdt_addr();
 	set_fdtfile();
 	set_usbethaddr();
+	set_boot_args();
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	set_board_info();
 #endif

commit 8f9ff705552d803cd6fcf6cb109cc3b9bedc7ab8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 10 18:23:42 2017 +0800

    power: charge animation: exit charge if not boot normal mode
    
    exactly for exit charge when detect boot recovery mode now.
    
    Change-Id: I72cdc6cab58d1a825f6a9f036abc0cf13dbcc443
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index 8ef6f14365..d9ae07db99 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 
+#include <asm/arch/bootrkp.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
@@ -192,6 +193,7 @@ static int charge_animation_show(struct udevice *dev)
 	int start_idx = 0, show_idx = -1;
 	int soc, voltage, key_state;
 	int i, charging = 1;
+	int boot_mode;
 
 	/* If there is preboot command, exit */
 	if (preboot) {
@@ -199,6 +201,13 @@ static int charge_animation_show(struct udevice *dev)
 		return 0;
 	}
 
+#ifdef CONFIG_ROCKCHIP_PARTITION_BOOT
+	boot_mode = rockchip_get_boot_mode();
+	if (boot_mode != ANDROID_BOOT_MODE_NORMAL) {
+		debug("exit charge, due to boot mode: %d\n", boot_mode);
+		return 0;
+	}
+#endif
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)

commit 145fcb5cde3e8f856e58e61ec8b6f030c5ba652e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Nov 10 18:21:48 2017 +0800

    rockchip: add rockchip_get_boot_mode function
    
    Change-Id: Ie1cc9353f05456ad3965260cb0f72bfb2d8a775b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrkp.h b/arch/arm/include/asm/arch-rockchip/bootrkp.h
new file mode 100644
index 0000000000..f1110ac06d
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/bootrkp.h
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __BOOTRKP_H_
+#define __BOOTRKP_H_
+
+enum android_boot_mode {
+	ANDROID_BOOT_MODE_NORMAL = 0,
+
+	/* "recovery" mode is triggered by the "reboot recovery" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "boot-recovery" in the BCB message. This mode should boot the
+	 * recovery kernel.
+	 */
+	ANDROID_BOOT_MODE_RECOVERY,
+
+	/* "bootloader" mode is triggered by the "reboot bootloader" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "bootonce-bootloader" in the BCB message. This mode should boot into
+	 * fastboot.
+	 */
+	ANDROID_BOOT_MODE_BOOTLOADER,
+};
+
+int rockchip_get_boot_mode(void);
+
+#endif
diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
index fe25c469b3..bea42a5a30 100644
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -9,6 +9,7 @@
 #include <linux/list.h>
 #include <libfdt.h>
 #include <malloc.h>
+#include <asm/arch/bootrkp.h>
 #include <asm/arch/resource_img.h>
 #include "rockchip_parameter.h"
 #include "rockchip_blk.h"
@@ -25,24 +26,6 @@
 #define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
 #define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
 
-enum android_boot_mode {
-	ANDROID_BOOT_MODE_NORMAL = 0,
-
-	/* "recovery" mode is triggered by the "reboot recovery" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "boot-recovery" in the BCB message. This mode should boot the
-	 * recovery kernel.
-	 */
-	ANDROID_BOOT_MODE_RECOVERY,
-
-	/* "bootloader" mode is triggered by the "reboot bootloader" command or
-	 * equivalent adb/fastboot command. It can also be triggered by writing
-	 * "bootonce-bootloader" in the BCB message. This mode should boot into
-	 * fastboot.
-	 */
-	ANDROID_BOOT_MODE_BOOTLOADER,
-};
-
 struct bootloader_message {
 	char command[32];
 	char status[32];
@@ -163,6 +146,20 @@ err:
 	return ret;
 }
 
+int rockchip_get_boot_mode(void)
+{
+	struct blk_part *misc;
+	int boot_mode;
+
+	misc = rockchip_get_blk_part(PART_MISC);
+	if (misc)
+		boot_mode = read_boot_mode_from_misc(misc);
+	else
+		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
+
+	return boot_mode;
+}
+
 static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 		      char * const argv[])
 {
@@ -171,18 +168,13 @@ static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
 	struct blk_part *boot;
 	struct blk_part *kernel;
-	struct blk_part *misc;
 	ulong ramdisk_size;
 	ulong kernel_size;
 	ulong fdt_size;
 	int boot_mode;
 	int ret = 0;
 
-	misc = rockchip_get_blk_part(PART_MISC);
-	if (misc)
-		boot_mode = read_boot_mode_from_misc(misc);
-	else
-		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
+	boot_mode = rockchip_get_boot_mode();
 
 	if (boot_mode == ANDROID_BOOT_MODE_RECOVERY)
 		boot = rockchip_get_blk_part(PART_RECOVERY);

commit dd9a11eaf4c9eb4ce49dc449988625c2c825d4f5
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Fri Nov 10 11:23:37 2017 +0800

    rockchip: rk3128: check bootmode from pmu_sys_reg0
    
    To keep synchronization with other paltforms, RK312x
    will also check all bootmode information from one
    register--PMU_SYS_REG0(0x0x100a0038).
    
    This change should based on rk3126_ddr_300MHz_v2.09.bin
    
    Change-Id: Ia09c87a2d55337b4d6f3ddc58f1a8dfcef8bb4a2
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index db3ef48973..c61adedbb7 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -223,7 +223,7 @@ config TPL_ROCKCHIP_BACK_TO_BROM
 config ROCKCHIP_BOOT_MODE_REG
 	hex "Rockchip boot mode flag register address"
 	default 0x200081c8 if ROCKCHIP_RK3036
-	default 0x200081c8 if ROCKCHIP_RK3128
+	default 0x100a0038 if ROCKCHIP_RK3128
 	default 0x20004040 if ROCKCHIP_RK3188
 	default 0x110005c8 if ROCKCHIP_RK322X
 	default 0xff730094 if ROCKCHIP_RK3288
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 08653c1f0a..4238dc9818 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -72,10 +72,7 @@ int setup_boot_mode(void)
 
 	rockchip_dnl_mode_check();
 
-	if (of_machine_is_compatible("rockchip,rk3128"))
-		reg = (void *)0x100a0038;
-	else
-		reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
+	reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
 
 	boot_mode = readl(reg);
 

commit bab2d2c3600f035fc878e551ab3dd278f88d6462
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Nov 10 09:20:35 2017 +0800

    clk: rockchip: Use common interface for pclk_peri
    
    The peripherals pclk rate is the same, use a common interface
    for peripherals like i2c, pwm and etc.
    
    Change-Id: Id9668400f2bb24be397adee312da5365e09c9237
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 038c34a1da..100f4688dd 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -347,7 +347,7 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
 }
 
-static ulong rk3128_i2c_get_clk(struct rk3128_cru *cru, ulong clk_id)
+static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id)
 {
 	u32 div, con;
 
@@ -356,18 +356,19 @@ static ulong rk3128_i2c_get_clk(struct rk3128_cru *cru, ulong clk_id)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
+	case PCLK_PWM:
 		con = readl(&cru->cru_clksel_con[10]);
 		div = con >> 12 & 0x3;
 		break;
 	default:
-		printf("do not support this i2c bus\n");
+		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
 	return DIV_TO_RATE(PERI_ACLK_HZ, div);
 }
 
-static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 {
 	int src_clk_div;
 
@@ -379,11 +380,12 @@ static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
+	case PCLK_PWM:
 		rk_setreg(&cru->cru_clksel_con[10],
 			  ((src_clk_div - 1) << 12));
 		break;
 	default:
-		printf("do not support this i2c bus\n");
+		printf("do not support this peripheral bus\n");
 		return -EINVAL;
 	}
 
@@ -491,7 +493,8 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
-		return rk3128_i2c_get_clk(priv->cru, clk->id);
+	case PCLK_PWM:
+		return rk3128_peri_get_pclk(priv->cru, clk->id);
 	case SCLK_SARADC:
                 return rk3128_saradc_get_clk(priv->cru);
 	case DCLK_LCDC:
@@ -526,7 +529,8 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_I2C1:
 	case PCLK_I2C2:
 	case PCLK_I2C3:
-		new_rate = rk3128_i2c_set_clk(priv->cru, clk->id, rate);
+	case PCLK_PWM:
+		new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate);
 		break;
 	case SCLK_SARADC:
 		new_rate = rk3128_saradc_set_clk(priv->cru, rate);

commit e630a69b2d40b72a01980750f6798ae5030b9103
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Nov 8 14:21:11 2017 +0800

    rockchip: test: Add ethernet test cases
    
    1. Add phy loopback test
    2. Add delayline array scaned
    3. Add delayline setting
    4. Add dhcp boot from network
    
    Change-Id: I00abc1c7acb4659b78e29bffc12f0964e5d02937
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index e0c18d728b..0113a3724e 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -10,4 +10,5 @@ obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
 obj-y += test-rknand.o
+obj-$(CONFIG_GMAC_ROCKCHIP) += test-eth.o
 obj-$(CONFIG_RK_IR) += test-ir.o
diff --git a/test/rockchip/test-eth.c b/test/rockchip/test-eth.c
new file mode 100644
index 0000000000..364e106f54
--- /dev/null
+++ b/test/rockchip/test-eth.c
@@ -0,0 +1,309 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <adc.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <miiphy.h>
+#include <net.h>
+#include <phy.h>
+#include "test-rockchip.h"
+
+#define LOOPBACK_TEST_HDR_SIZE		14
+#define LOOPBACK_TEST_DATA_SIZE		1500
+#define LOOPBACK_TEST_FRAME_SIZE	(14 + 1500)
+
+#define MAX_TX_DELAY_LINE		0X7F
+#define MAX_RX_DELAY_LINE		0X7F
+
+/* MAC configuration register definitions */
+#define FRAMEBURSTENABLE		(1 << 21)
+#define MII_PORTSELECT			(1 << 15)
+#define FES_100				(1 << 14)
+#define DISABLERXOWN			(1 << 13)
+#define FULLDPLXMODE			(1 << 11)
+
+enum loopback_speed {
+	LOOPBACK_SPEED_10	= 10,
+	LOOPBACK_SPEED_100	= 100,
+	LOOPBACK_SPEED_1000	= 1000
+};
+
+extern void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay);
+
+static struct phy_device *get_current_phydev(void)
+{
+	struct mii_dev *bus = mdio_get_current_dev();
+	int i;
+
+	for (i = 0; i < PHY_MAX_ADDR; i++) {
+		if (bus->phymap[i])
+			return bus->phymap[i];
+	}
+
+	return NULL;
+}
+
+static void create_lbtest_frame(uchar *data, unsigned int frame_size)
+{
+	memset(data, 0xFF, frame_size);
+	frame_size &= ~1;
+	memset(data + (frame_size / 2), 0xAA, frame_size / 2 - 1);
+}
+
+static void alter_lbtest_frame(uchar *data, unsigned int frame_size,
+			       unsigned int tx, unsigned int rx)
+{
+	frame_size &= ~1;
+	memset(data + (frame_size / 2 + tx), 0xBE, 1);
+	memset(data + (frame_size / 2 + rx), 0xAF, 1);
+}
+
+static int check_lbtest_frame(uchar *tx_data, uchar *rx_data,
+			      unsigned int frame_size)
+{
+	int i;
+
+	for (i = 0; i < frame_size; i++) {
+		if (tx_data[i] != rx_data[i])
+			return 13;
+	}
+
+	return 0;
+}
+
+static void eth_setup_loopback_test(struct udevice *current, int speed)
+{
+	struct phy_device *phydev = get_current_phydev();
+	struct eth_pdata *pdata = dev_get_platdata(current);
+	u32 conf;
+	int val;
+
+	if (!phydev) {
+		printf("%s, can't get phydev\n", __func__);
+		return;
+	}
+
+	/* set mac ctrl register */
+	conf = readl(pdata->iobase);
+	if (speed != LOOPBACK_SPEED_1000)
+		conf |= MII_PORTSELECT;
+	else
+		conf &= ~MII_PORTSELECT;
+
+	if (speed == LOOPBACK_SPEED_100)
+		conf |= FES_100;
+
+	if (phydev->duplex)
+		conf |= FULLDPLXMODE;
+	writel(conf, pdata->iobase);
+
+	/* set phy ctrl register */
+	val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+	val &= ~(BMCR_ANENABLE | BMCR_PDOWN);
+	val |= BMCR_LOOPBACK;
+	if (speed == LOOPBACK_SPEED_1000) {
+		val |= BMCR_SPEED1000;
+		val &= ~BMCR_SPEED100;
+	} else if (speed == LOOPBACK_SPEED_100) {
+		val &= ~BMCR_SPEED1000;
+		val |= BMCR_SPEED100;
+	} else if (speed == LOOPBACK_SPEED_10) {
+		val &= ~BMCR_SPEED1000;
+		val &= ~BMCR_SPEED100;
+	}
+	val |= BMCR_FULLDPLX;
+	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, val);
+}
+
+static int eth_run_loopback_test(struct udevice *current, int speed, int delay_test)
+{
+	int flags = ETH_RECV_CHECK_DEVICE;
+	uchar *tx_pkt, *rx_packet;
+	int ret, length, success = 0;
+	u32 i, j;
+
+	/* make sure the net_tx_packet is initialized (net_init() was called) */
+	assert(net_tx_packet != NULL);
+	if (net_tx_packet == NULL)
+		return -EINVAL;
+
+	net_set_ether(net_tx_packet, net_bcast_ethaddr, LOOPBACK_TEST_DATA_SIZE);
+	tx_pkt = (uchar *)net_tx_packet + LOOPBACK_TEST_HDR_SIZE;
+	create_lbtest_frame(tx_pkt, LOOPBACK_TEST_DATA_SIZE);
+	udelay(50000);
+
+	for (i = 0x0; i < MAX_TX_DELAY_LINE; i++) {
+		if (delay_test)
+			printf("[0x%02x]:", i);
+		for (j = 0x0; j < MAX_RX_DELAY_LINE; j++) {
+			if (delay_test)
+				gmac_set_rgmii(current, i, j);
+
+			alter_lbtest_frame(tx_pkt, LOOPBACK_TEST_DATA_SIZE, i, j);
+			net_send_packet(net_tx_packet, LOOPBACK_TEST_FRAME_SIZE);
+
+			/*
+			 * Make sure that mac have enough delay time to
+			 * receive packet.
+			 */
+			if (speed == LOOPBACK_SPEED_10)
+				udelay(2000);
+			else if (speed == LOOPBACK_SPEED_100)
+				udelay(2000);
+			else
+				/* The default is 1000M speed */
+				udelay(200);
+
+			length = eth_get_ops(current)->recv(current, flags, &rx_packet);
+			if (length > 0) {
+				if (!check_lbtest_frame(net_tx_packet, rx_packet,
+							LOOPBACK_TEST_FRAME_SIZE)) {
+					printf("*");
+					success++;
+					ret = 0;
+				} else {
+					printf("x");
+					ret = -EINVAL;
+				}
+			} else if (length == 0) {
+				ret = -EBUSY;
+				printf("?");
+			} else {
+				ret = length;
+				printf(" ");
+			}
+
+			if (length >= 0 && eth_get_ops(current)->free_pkt)
+				eth_get_ops(current)->free_pkt(current, rx_packet,
+							       length);
+
+			/* Only run loopback test once */
+			if (!delay_test) {
+				printf("\n");
+				return ret;
+			}
+		}
+		printf("\n");
+	}
+
+	if (delay_test && success > 0)
+		ret = 0;
+
+	return ret;
+}
+
+static int ethernet_init(void)
+{
+	int ret = -EINVAL;
+
+	net_init();
+	eth_halt();
+	eth_set_current();
+	ret = eth_init();
+	if (ret < 0) {
+		eth_halt();
+		return ret;
+	}
+
+	return ret;
+}
+
+static int eth_loopback_test(int speed, int delay_test)
+{
+	struct udevice *current;
+	int ret;
+
+	current = eth_get_dev();
+	if (!current || !device_active(current))
+		return -EINVAL;
+
+	eth_setup_loopback_test(current, speed);
+	ret = ethernet_init();
+	if (ret) {
+		printf("%s, ethernet_init error: %d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = eth_run_loopback_test(current, speed, delay_test);
+
+	return ret;
+}
+
+static void do_eth_help(void)
+{
+	printf("Usage:\n");
+	printf("rktest eth loopback speed - Test the phy loopback, speed is 1000/100/10, need to unplug the RJ45 cable\n");
+	printf("rktest eth delaytest - Get the loopback-passed tx_delay/rx_delay array, need to unplug the RJ45 cable\n");
+	printf("rktest eth delayline tx_delay rx_delay - Delay value is 0x00~0x7f\n");
+	printf("rktest eth dhcp address IP:file - Boot image via network using DHCP/TFTP protocol, example: rktest eth dhcp 0x62000000 192.168.1.100:Image\n");
+}
+
+int board_eth_test(int argc, char * const argv[])
+{
+	int ret;
+	char cmd_eth[512] = {0};
+	int i, speed;
+	u32 tx_delay, rx_delay;
+	struct udevice *current;
+
+	current = eth_get_dev();
+	if (!current || !device_active(current))
+		return -EINVAL;
+
+	switch (argc) {
+	case 3:
+		if (!strncmp(argv[2], "delaytest", sizeof("delaytest"))) {
+			/* Force 1000 speed test */
+			speed = LOOPBACK_SPEED_1000;
+			ret = eth_loopback_test(speed, 1);
+			return ret;
+		} else if (!strncmp(argv[2], "help", sizeof("help"))) {
+			do_eth_help();
+			return 0;
+		}
+		break;
+	case 4:
+		if (!strncmp(argv[2], "loopback", sizeof("loopback"))) {
+			speed = strtoul(argv[3], NULL, 0);
+			ret = eth_loopback_test(speed, 0);
+			return ret;
+		}
+		break;
+	case 5:
+		if (!strncmp(argv[2], "delayline", sizeof("delayline"))) {
+			tx_delay = strtoul(argv[3], NULL, 0);
+			rx_delay = strtoul(argv[4], NULL, 0);
+			gmac_set_rgmii(current, tx_delay, rx_delay);
+			return 0;
+		}
+		break;
+	default:
+		break;
+	}
+
+	for (i = 2; i < argc; i++) {
+		strncat(cmd_eth, argv[i], sizeof(cmd_eth));
+		if (i < argc - 1)
+			strncat(cmd_eth, " ", sizeof(" "));
+	}
+
+	/* run dhcp/tftp test */
+	ret = cli_simple_run_command(cmd_eth, 0);
+	if (ret < 0) {
+		printf("DHCP test error: %d\n", ret);
+		return ret;
+	}
+
+
+	return 0;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index bae1177574..22e369022a 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -19,6 +19,9 @@ static board_module_t g_board_modules[] = {
 	{ .name = "emmc",	.test = board_emmc_test },
 	{ .name = "regulator",	.test = board_regulator_test },
 	{ .name = "rknand",	.test = board_rknand_test },
+#if defined(CONFIG_GMAC_ROCKCHIP)
+	{ .name = "eth",        .test = board_eth_test },
+#endif
 #if defined(CONFIG_RK_IR)
 	{ .name = "ir",		.test = board_ir_test },
 #endif
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 5287b2d35f..29930a4748 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -12,7 +12,9 @@ int board_key_test(int argc, char * const argv[]);
 int board_emmc_test(int argc, char * const argv[]);
 int board_regulator_test(int argc, char * const argv[]);
 int board_rknand_test(int argc, char * const argv[]);
-
+#if defined(CONFIG_GMAC_ROCKCHIP)
+int board_eth_test(int argc, char * const argv[]);
+#endif
 #if defined(CONFIG_RK_IR)
 int board_ir_test(int argc, char * const argv[]);
 #endif

commit 1eb9d0643a39b2b0034ca80cffba6d5a2da4f754
Author: David Wu <david.wu@rock-chips.com>
Date:   Fri Nov 10 09:11:39 2017 +0800

    net: gmac_rockchip: export set_rgmii delayline function
    
    We will use the common interface to set gamc rgmii sometimes,
    but the set_rgmii is a private ops. So abstract an exposed
    interface out for use.
    
    Change-Id: Ie1cd15033465ff324b77de389e57d32b28c3d389
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 586ccbff0a..49cba41f52 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -40,6 +40,17 @@ struct rk_gmac_ops {
 	void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
 };
 
+void gmac_set_rgmii(struct udevice *dev, u32 tx_delay, u32 rx_delay)
+{
+	struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
+	struct rk_gmac_ops *ops =
+		(struct rk_gmac_ops *)dev_get_driver_data(dev);
+
+	pdata->tx_delay = tx_delay;
+	pdata->rx_delay = rx_delay;
+
+	ops->set_to_rgmii(pdata);
+}
 
 static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 {

commit 885d92d43062d951777ed3e54c9759bd7dc58e96
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 14:36:43 2017 +0800

    rockchip: boot_mode: add 'reboot charge' support
    
    Change-Id: Id64bedc1d0c0774d809a2aa54947aebe7fb8eebe
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 3d71abcb07..08653c1f0a 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -97,6 +97,10 @@ int setup_boot_mode(void)
 		printf("enter Rockusb!\n");
 		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
 		break;
+	case BOOT_CHARGING:
+		printf("enter charging!\n");
+		env_set("preboot", "setenv preboot; charge");
+		break;
 	}
 
 	return 0;

commit f21199c15e3087199e41574dc37ad61b7d2fe18c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:59:33 2017 +0800

    include: rk3128_common: enable preboot command
    
    Change-Id: Iedf21914fd85ba8d817b7c6fe4cf0920453407fc
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index ade2594f1e..f311ebc2a9 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -49,6 +49,7 @@
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
+#define CONFIG_PREBOOT
 
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE

commit 55aee569aa10441d2373d2b33e12b8625a52230f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:54:05 2017 +0800

    rockchip: parameter: mtdpart address uses cmdline directly
    
    1. rename RK_BLK_OFFSET to RK_PARAM_OFFSET;
    2. parameter.txt should promise partition address is physical.
    
    Change-Id: Ibadc0589c14f6e48475e4db8526535b8a986d944
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
index ff26a4bfd5..afb6f8a8fa 100644
--- a/arch/arm/mach-rockchip/rockchip_parameter.c
+++ b/arch/arm/mach-rockchip/rockchip_parameter.c
@@ -61,7 +61,7 @@ static int rockchip_param_parse(char *param)
 			printf("out of memory\n");
 			break;
 		}
-		part->from = from + RK_BLK_OFFSET;
+		part->from = from;
 		part->size = size;
 		strncpy(part->name, next, len);
 		part->name[len] = '\0';
@@ -84,7 +84,7 @@ static int rockchip_init_param(void)
 		return -ENOMEM;
 	}
 
-	blkdev_read(param, RK_BLK_OFFSET, MAX_PARAM_SIZE >> 9);
+	blkdev_read(param, RK_PARAM_OFFSET, MAX_PARAM_SIZE >> 9);
 
 	return rockchip_param_parse(param->params);
 
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.h b/arch/arm/mach-rockchip/rockchip_parameter.h
index b77a1599d9..46d32a2a8b 100644
--- a/arch/arm/mach-rockchip/rockchip_parameter.h
+++ b/arch/arm/mach-rockchip/rockchip_parameter.h
@@ -9,7 +9,7 @@
 
 #include <linux/list.h>
 
-#define RK_BLK_OFFSET			0x2000
+#define RK_PARAM_OFFSET			0x2000
 #define PART_NAME_SIZE			32
 #define RK_BLK_SIZE			(1 << 9)
 

commit 4853871c4fb9f678cbe7086523938685e934616f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 8 18:03:55 2017 +0800

    rockchip: boot mode: use rockusb download mode as first selection
    
    If failed, we fall back to bootrom download mode.
    
    Change-Id: I003a496d1162e56c459ed54b7d69930a48d91210
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index c6ebdf2e01..3d71abcb07 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -8,6 +8,7 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
+#include <cli.h>
 #include <dm.h>
 #include <fdtdec.h>
 
@@ -56,7 +57,9 @@ __weak int rockchip_dnl_key_pressed(void)
 void rockchip_dnl_mode_check(void)
 {
 	if (rockchip_dnl_key_pressed()) {
-		printf("download key pressed, entering download mode...");
+		printf("download key pressed, entering download mode...\n");
+		/* If failed, we fall back to bootrom download mode */
+		cli_simple_run_command("rockusb 0 mmc 0", 0);
 		set_back_to_bootrom_dnl_flag();
 		do_reset(NULL, 0, 0, NULL);
 	}

commit a8b9d0264602fa5fae47f085125bea1667f70789
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:34:10 2017 +0800

    power: charge animation: exit charge if detect preboot command.
    
    charge animation will call fuel gauge to set charge current according
    to adapter before exit, it promises lower power battery has enough power
    supply during some long time preboot command execution.
    
    Change-Id: I7fe5b19a0a48422528956310d5ee272ef556b840
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
index c68a04aa92..8ef6f14365 100644
--- a/drivers/power/charge_animation.c
+++ b/drivers/power/charge_animation.c
@@ -183,6 +183,7 @@ static int charge_animation_show(struct udevice *dev)
 	struct udevice *pwrkey = priv->pwrkey;
 	struct udevice *pmic = priv->pmic;
 	struct udevice *fg = priv->fg;
+	const char *preboot = env_get("preboot");
 	int image_num = priv->image_num;
 	bool ever_lowpower_screen_off = false;
 	bool screen_on = true;
@@ -192,6 +193,12 @@ static int charge_animation_show(struct udevice *dev)
 	int soc, voltage, key_state;
 	int i, charging = 1;
 
+	/* If there is preboot command, exit */
+	if (preboot) {
+		debug("preboot: %s\n", preboot);
+		return 0;
+	}
+
 	/* Not charger online, exit */
 	charging = fuel_gauge_get_chrg_online(fg);
 	if (charging <= 0)

commit 80d1262bcee06cd20b7fa11777ce8fc868b9b05f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 10:11:20 2017 +0800

    rk3128: fix typo of CONFIG_DM_CHARGE_DISPLAY
    
    Change-Id: I67b5f5d75fab2d97310b8ff81ee3dd906a160449
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 0e2af0b852..7fc4deefdd 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -20,7 +20,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_CHARGE_DISPLAY
+#ifdef CONFIG_DM_CHARGE_DISPLAY
 static int charge_display(void)
 {
 	int ret;
@@ -48,7 +48,7 @@ int board_late_init(void)
 {
 	setup_boot_mode();
 
-#ifdef CONFIG_CHARGE_DISPLAY
+#ifdef CONFIG_DM_CHARGE_DISPLAY
 	charge_display();
 #endif
 

commit 0130bb7851cd19353cbe25a9559b5993e4e3b0ca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 9 11:33:20 2017 +0800

    fuel gauge: rk816: initialize charge current at probe
    
    Change-Id: Ia2d9a22b39eecaf5a965971caef5bed953f2bf1b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 3ca9df47c8..700deb5597 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -983,12 +983,14 @@ static int rk816_fg_init(struct battery_info *di)
 	 */
 	rk816_bat_init_rsoc(di);
 	rk816_bat_init_chrg_config(di);
+	di->chrg_type = rk816_bat_get_charger_type(di);
 	di->voltage_avg = rk816_bat_get_avg_voltage(di);
 	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
 	di->current_avg = rk816_bat_get_avg_current(di);
 	di->sm_linek = rk816_bat_calc_linek(di);
 	di->finish_chrg_base = get_timer(0);
 	di->pwr_vol = di->voltage_avg;
+	rk816_bat_charger_setting(di, di->chrg_type);
 
 	printf("Battery: soc=%d%%, voltage=%dmv\n", di->dsoc, di->voltage_avg);
 

commit 462e467ddfe296e85ef1ad723d44a3c843c36af2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 8 16:27:05 2017 +0800

    fuel gauge: rk816: first power on must do rsoc initialization
    
    clean up conditons that allow do rsoc initialization:
    1. PMIC is first power on;
    2. dsoc or voltage is under threshold value.
    
    Change-Id: Icd5fb5eb72653a38f901b95a3d5e07cfac8c8a7b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index c98546484f..3ca9df47c8 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -921,30 +921,45 @@ static int rk816_bat_get_charger_type(struct battery_info *di)
 	return rk816_bat_get_usb_state(di);
 }
 
-void rk816_bat_init_rsoc(struct battery_info *di)
+static bool rk816_bat_is_under_threshold(struct battery_info *di)
 {
+	bool initialize = false;
 #ifdef CONFIG_DM_CHARGE_DISPLAY
 	struct udevice *dev;
 	int soc, voltage, est_voltage;
-	int ret;
+	int err;
 
-	ret = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
-	if (!ret) {
+	err = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	if (!err) {
 		est_voltage = rk816_bat_get_avg_voltage(di);
 		soc = charge_display_get_power_on_soc(dev);
 		voltage = charge_display_get_power_on_voltage(dev);
 		DBG("threshold: %d%%, %dmv; now: %d%%, %dmv\n",
 		    soc, voltage, di->dsoc, est_voltage);
-		if ((di->dsoc >= soc) && (est_voltage >= voltage))
-			return;
+		if ((di->dsoc <= soc) || (est_voltage <= voltage))
+			initialize = true;
 	}
 #endif
 
-	if (rk816_bat_get_charger_type(di) == NO_CHARGER)
+	return initialize;
+}
+
+void rk816_bat_init_rsoc(struct battery_info *di)
+{
+	bool initialize = false;
+
+	di->is_first_power_on = is_rk816_bat_first_poweron(di);
+	/* If first power on, we must do initialization */
+	if (di->is_first_power_on)
+		initialize = true;
+	/* Only charger online and under threshold, we do initialization */
+	else if (rk816_bat_get_charger_type(di) != NO_CHARGER)
+		initialize = rk816_bat_is_under_threshold(di);
+
+	if (!initialize)
 		return;
 
 	di->pwroff_min = rk816_bat_get_pwroff_min(di);
-	di->is_first_power_on = is_rk816_bat_first_poweron(di);
 	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
 
 	if (di->is_first_power_on || di->is_sw_reset)
@@ -975,6 +990,8 @@ static int rk816_fg_init(struct battery_info *di)
 	di->finish_chrg_base = get_timer(0);
 	di->pwr_vol = di->voltage_avg;
 
+	printf("Battery: soc=%d%%, voltage=%dmv\n", di->dsoc, di->voltage_avg);
+
 	return 0;
 }
 

commit 7a4d1b540601cf674de4f85400b71859f689c9b3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 10 15:27:45 2017 +0800

    rockchip: update boot0 hook
    
    armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS
    armv7 U-Boot: ARM_VECTORS
    armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399)
    armv8 U-Boot: 'b reset'
    
    Change-Id: I0ebb3e57d138c02e8781e50dbe775925cd0d71e0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index af3a733e98..65b4213231 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -26,7 +26,6 @@
 	 */
 	b 1f	 /* if overwritten, entry-address is at the next word */
 1:
-#endif
 #if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
 	adr     r3, entry_counter
 	ldr	r0, [r3]
@@ -40,6 +39,15 @@ entry_counter:
 	.word   0
 #endif
 	b reset
+
+#if defined(CONFIG_ROCKCHIP_RK3399)
+	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
+#endif
+
+#elif defined(CONFIG_ARM64) /* U-Boot for arm64 */
+	b reset
+#endif
+
 #if !defined(CONFIG_ARM64)
 	/*
 	 * For armv7, the addr '_start' will used as vector start address
@@ -49,7 +57,3 @@ entry_counter:
 _start:
 	ARM_VECTORS
 #endif
-
-#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
-	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */
-#endif

commit f4fc5f8dd310dab3c111745ca758dab5c22a4b85
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 9 19:34:04 2017 -0800

    arm: irq: do not enable irq in SPL/TPL
    
    Change-Id: I6a9b8b883ede2e45e2c5760c633f04bd9ab4fe4e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 7a21560416..b5ada61062 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -231,7 +231,7 @@ ENDPROC(apply_core_errata)
 WEAK(lowlevel_init)
 	mov	x29, lr			/* Save LR */
 
-#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	branch_if_slave x0, 1f
 	ldr	x0, =GICD_BASE
 	bl	gic_init_secure
@@ -246,7 +246,7 @@ WEAK(lowlevel_init)
 #endif
 #endif
 
-#if defined(CONFIG_IRQ)
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	/*
 	 * Setting HCR_EL2.TGE AMO IMO FMO for exception rounting to EL2
 	 */
diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S
index febd967e28..1e80fb93c2 100644
--- a/arch/arm/lib/gic_64.S
+++ b/arch/arm/lib/gic_64.S
@@ -108,7 +108,7 @@ ENTRY(gic_init_secure_percpu)
 	mov	w11, #0x1		/* Enable SGI 0 */
 	str	w11, [x10, GICR_ISENABLERn]
 
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	/* Rockchip: check elx */
 	switch_el x0, el3_sre, el2_sre, el1_sre
 
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 6b8ec16776..69cf54bd59 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -26,7 +26,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 int interrupt_init (void)
 {
 	/*
@@ -156,7 +156,7 @@ void do_fiq (struct pt_regs *pt_regs)
 	bad_mode ();
 }
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 void do_irq (struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index e151f80625..65e313e844 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,7 +9,7 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 int interrupt_init(void)
 {
 	return 0;
@@ -93,7 +93,7 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
 	panic("Resetting CPU ...\n");
 }
 
-#ifndef CONFIG_IRQ
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
 /*
  * do_irq handles the Irq exception.
  */
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index 5f15e34ed5..67e01b9865 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -25,7 +25,7 @@ int arch_reserve_stacks(void)
 	gd->irq_sp = gd->start_addr_sp;
 
 # if !defined(CONFIG_ARM64)
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 #ifndef CONFIG_IRQ_STACK_SIZE
 #define CONFIG_IRQ_STACK_SIZE	8192
 #endif
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 7079641213..9896b60652 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -147,7 +147,7 @@ IRQ_STACK_START_IN:
 	.word	0x0badc0de
 #endif
 
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 /* IRQ stack memory (calculated at run-time) */
 .globl IRQ_STACK_START
 IRQ_STACK_START:
@@ -280,7 +280,7 @@ not_used:
 
 	.align	5
 irq:
-#ifdef CONFIG_IRQ
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
 	get_irq_stack
 	irq_save_user_regs
 	bl	do_irq
diff --git a/drivers/Makefile b/drivers/Makefile
index 9f961fd3ed..b00a2ca1ae 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
 obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
 obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
 obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
-obj-$(CONFIG_IRQ) += irq/
+obj-$(CONFIG_$(SPL_TPL_)IRQ) += irq/
 
 ifndef CONFIG_TPL_BUILD
 ifdef CONFIG_SPL_BUILD

commit cd5a540c8ac727a1012de70f577391479075cda8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 12 14:51:26 2017 +0800

    rockchip: clk: update configure_cpu code order for rk3399
    
    The definition of function configure_cpu() need before rkclk_init().
    
    Change-Id: I791fe6d670af6f36e755978c144c47aaabd8e1b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index bfa3a29dd4..95976ac4ae 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -398,85 +398,6 @@ static int pll_para_config(u32 freq_hz, struct pll_div *div)
 	return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
-static void rkclk_init(struct rk3399_cru *cru)
-{
-	u32 aclk_div;
-	u32 hclk_div;
-	u32 pclk_div;
-
-	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
-	/*
-	 * some cru registers changed by bootrom, we'd better reset them to
-	 * reset/default values described in TRM to avoid confusion in kernel.
-	 * Please consider these three lines as a fix of bootrom bug.
-	 */
-	rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101);
-	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
-	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
-
-	/* configure gpll cpll */
-	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
-	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
-
-	/* configure perihp aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
-	       PERIHP_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
-	       PERIHP_ACLK_HZ && (pclk_div < 0x7));
-
-	rk_clrsetreg(&cru->clksel_con[14],
-		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK |
-		     ACLK_PERIHP_PLL_SEL_MASK | ACLK_PERIHP_DIV_CON_MASK,
-		     pclk_div << PCLK_PERIHP_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERIHP_DIV_CON_SHIFT |
-		     ACLK_PERIHP_PLL_SEL_GPLL << ACLK_PERIHP_PLL_SEL_SHIFT |
-		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
-
-	/* configure perilp0 aclk, hclk, pclk */
-	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
-
-	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
-	       PERILP0_ACLK_HZ && (hclk_div < 0x4));
-
-	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
-	       PERILP0_ACLK_HZ && (pclk_div < 0x7));
-
-	rk_clrsetreg(&cru->clksel_con[23],
-		     PCLK_PERILP0_DIV_CON_MASK | HCLK_PERILP0_DIV_CON_MASK |
-		     ACLK_PERILP0_PLL_SEL_MASK | ACLK_PERILP0_DIV_CON_MASK,
-		     pclk_div << PCLK_PERILP0_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERILP0_DIV_CON_SHIFT |
-		     ACLK_PERILP0_PLL_SEL_GPLL << ACLK_PERILP0_PLL_SEL_SHIFT |
-		     aclk_div << ACLK_PERILP0_DIV_CON_SHIFT);
-
-	/* perilp1 hclk select gpll as source */
-	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
-	       GPLL_HZ && (hclk_div < 0x1f));
-
-	pclk_div = PERILP1_HCLK_HZ / PERILP1_HCLK_HZ - 1;
-	assert((pclk_div + 1) * PERILP1_HCLK_HZ ==
-	       PERILP1_HCLK_HZ && (hclk_div < 0x7));
-
-	rk_clrsetreg(&cru->clksel_con[25],
-		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |
-		     HCLK_PERILP1_PLL_SEL_MASK,
-		     pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
-		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
-		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
-}
-#endif
-
 void rk3399_configure_cpu(struct rk3399_cru *cru,
 			  enum apll_l_frequencies apll_l_freq)
 {
@@ -990,6 +911,85 @@ static struct clk_ops rk3399_clk_ops = {
 	.set_rate = rk3399_clk_set_rate,
 };
 
+#ifdef CONFIG_SPL_BUILD
+static void rkclk_init(struct rk3399_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
+	/*
+	 * some cru registers changed by bootrom, we'd better reset them to
+	 * reset/default values described in TRM to avoid confusion in kernel.
+	 * Please consider these three lines as a fix of bootrom bug.
+	 */
+	rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101);
+	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);
+	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);
+
+	/* configure gpll cpll */
+	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
+	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
+
+	/* configure perihp aclk, hclk, pclk */
+	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERIHP_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = PERIHP_ACLK_HZ / PERIHP_HCLK_HZ - 1;
+	assert((hclk_div + 1) * PERIHP_HCLK_HZ ==
+	       PERIHP_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PERIHP_PCLK_HZ ==
+	       PERIHP_ACLK_HZ && (pclk_div < 0x7));
+
+	rk_clrsetreg(&cru->clksel_con[14],
+		     PCLK_PERIHP_DIV_CON_MASK | HCLK_PERIHP_DIV_CON_MASK |
+		     ACLK_PERIHP_PLL_SEL_MASK | ACLK_PERIHP_DIV_CON_MASK,
+		     pclk_div << PCLK_PERIHP_DIV_CON_SHIFT |
+		     hclk_div << HCLK_PERIHP_DIV_CON_SHIFT |
+		     ACLK_PERIHP_PLL_SEL_GPLL << ACLK_PERIHP_PLL_SEL_SHIFT |
+		     aclk_div << ACLK_PERIHP_DIV_CON_SHIFT);
+
+	/* configure perilp0 aclk, hclk, pclk */
+	aclk_div = GPLL_HZ / PERILP0_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERILP0_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = PERILP0_ACLK_HZ / PERILP0_HCLK_HZ - 1;
+	assert((hclk_div + 1) * PERILP0_HCLK_HZ ==
+	       PERILP0_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1;
+	assert((pclk_div + 1) * PERILP0_PCLK_HZ ==
+	       PERILP0_ACLK_HZ && (pclk_div < 0x7));
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     PCLK_PERILP0_DIV_CON_MASK | HCLK_PERILP0_DIV_CON_MASK |
+		     ACLK_PERILP0_PLL_SEL_MASK | ACLK_PERILP0_DIV_CON_MASK,
+		     pclk_div << PCLK_PERILP0_DIV_CON_SHIFT |
+		     hclk_div << HCLK_PERILP0_DIV_CON_SHIFT |
+		     ACLK_PERILP0_PLL_SEL_GPLL << ACLK_PERILP0_PLL_SEL_SHIFT |
+		     aclk_div << ACLK_PERILP0_DIV_CON_SHIFT);
+
+	/* perilp1 hclk select gpll as source */
+	hclk_div = GPLL_HZ / PERILP1_HCLK_HZ - 1;
+	assert((hclk_div + 1) * PERILP1_HCLK_HZ ==
+	       GPLL_HZ && (hclk_div < 0x1f));
+
+	pclk_div = PERILP1_HCLK_HZ / PERILP1_HCLK_HZ - 1;
+	assert((pclk_div + 1) * PERILP1_HCLK_HZ ==
+	       PERILP1_HCLK_HZ && (hclk_div < 0x7));
+
+	rk_clrsetreg(&cru->clksel_con[25],
+		     PCLK_PERILP1_DIV_CON_MASK | HCLK_PERILP1_DIV_CON_MASK |
+		     HCLK_PERILP1_PLL_SEL_MASK,
+		     pclk_div << PCLK_PERILP1_DIV_CON_SHIFT |
+		     hclk_div << HCLK_PERILP1_DIV_CON_SHIFT |
+		     HCLK_PERILP1_PLL_SEL_GPLL << HCLK_PERILP1_PLL_SEL_SHIFT);
+}
+#endif
+
 static int rk3399_clk_probe(struct udevice *dev)
 {
 #ifdef CONFIG_SPL_BUILD

commit 564ceadd6fc12d66584ebabe34fe52c02c2090fc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 9 15:41:18 2017 +0800

    rockchip: clk: continue work if there is no pmu reset driver
    
    Change-Id: I8011a932df63f82ded8d5713fef103153e751d5d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 231c94fe70..bfa3a29dd4 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1227,20 +1227,22 @@ static int rk3399_pmuclk_bind(struct udevice *dev)
 {
 	int ret = 0;
 	struct udevice *sf_child;
-	struct softreset_reg *sf_priv = malloc(sizeof(struct softreset_reg));
+	struct softreset_reg *sf_priv;
 
 	ret = device_bind_driver_to_node(dev, "rockchip_reset",
 					 "reset", dev_ofnode(dev),
 					 &sf_child);
-	if (ret)
+	if (ret) {
 		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3399_pmucru,
+						    pmucru_softrst_con[0]);
+		sf_priv->sf_reset_num = 2;
+		sf_child->priv = sf_priv;
+	}
 
-	sf_priv->sf_reset_offset = offsetof(struct rk3399_pmucru,
-					    pmucru_softrst_con[0]);
-	sf_priv->sf_reset_num = 2;
-	sf_child->priv = sf_priv;
-
-	return ret;
+	return 0;
 }
 
 static const struct udevice_id rk3399_pmuclk_ids[] = {

commit f90455d7bab10c284f4470a1ba7843628da018e2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 9 12:40:07 2017 +0800

    rockchip: inno-phy: Fix a compile warning
    
    In file included from drivers/phy/phy-rockchip-inno-usb2.c:8:0:
    
    ./arch/arm/include/asm/arch/clock.h:93:29: warning: 'struct udevice'
    declared inside parameter list [enabled by default]
    
    ./arch/arm/include/asm/arch/clock.h:93:29: warning: its scope is only
    this definition or declaration, which is probably not what you want
    [enabled by default]
    
    Change-Id: I2a17d469c70897b2a2024c71054b72c76b409f4e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 168f2da817..7a6fcb1b12 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -4,12 +4,12 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#include <asm/io.h>
-#include <asm/arch/clock.h>
 #include <common.h>
 #include <dm.h>
 #include <generic-phy.h>
 #include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
 
 #define U2PHY_BIT_WRITEABLE_SHIFT	16
 #define CHG_DCD_MAX_RETRIES		6

commit de2f83b25a91ccefd8e525f0013efbf204ebb81f
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Wed Nov 8 15:40:40 2017 +0800

    rockchip: test: Make start LBA mandatory for emmc test
    
    Support reading start LBA from test command and so that
    the developer could understand which area is cleared by
    the emmc write test, and he/she recovery the image respectively
    from the flashing tool by looking into the parameter file.
    
    Change-Id: Ie050c44bb7ef5c4f0edd5f80370da12420500f08
    Suggested-by:  Joseph Chen <chenjh@rock-chips.com>
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index a7b301e91e..05406d3eac 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -9,25 +9,28 @@
 #include <common.h>
 #include <irq-generic.h>
 #include <irq-platform.h>
+#include <linux/compat.h>
 #include <malloc.h>
 #include "test-rockchip.h"
 
 int board_emmc_test(int argc, char * const argv[])
 {
 	u8 *write_buffer, *read_buffer;
-	u32 i, blocks = 0;
+	u32 i, blocks = 0, lba;
 	unsigned long ts;
 	int err = 0;
 	char cmd_mmc[512] = {0};
 
-	blocks = simple_strtoul(argv[2], NULL, 0);
-	if (!blocks) {
-		printf("Usage: rktest emmc blocks\n");
-		printf("8129 <= blocks <= 30000\n");
+	if (argc < 4) {
+		printf("Usage: rktest emmc start_lba blocks\n");
+		printf("blocks should be from 8129 to 30000\n");
 		err = -EINVAL;
 		goto err_wb;
 	}
 
+	lba = simple_strtoul(argv[2], NULL, 0);
+	blocks = simple_strtoul(argv[3], NULL, 0);
+
 	if (blocks % 2)
 		/* Round up */
 		blocks += 1;
@@ -44,14 +47,14 @@ int board_emmc_test(int argc, char * const argv[])
 
 	/* 1. Prepare memory */
 
-	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
+	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
 	if (!write_buffer) {
 		printf("No memory for write_buffer!\n");
 		err = -ENOMEM;
 		goto err_wb;
 	}
 
-	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
+	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, GFP_KERNEL);
 	if (!read_buffer) {
 		printf("No memory for read_buffer!\n");
 		err = -ENOMEM;
@@ -65,8 +68,8 @@ int board_emmc_test(int argc, char * const argv[])
 
 	/* 2. Prepare and start cli command */
 
-	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x1000 0x%x",
-		 (u32)write_buffer, blocks);
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x%x 0x%x",
+		 (u32)write_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
@@ -76,8 +79,8 @@ int board_emmc_test(int argc, char * const argv[])
 	printf("eMMC write: size %dMB, used %ldms, speed %ldMB/s\n",
 		blocks / 2048, ts, (blocks >> 1) / ts);
 
-	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x1000 0x%x",
-		 (u32)read_buffer, blocks);
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x%x 0x%x",
+		 (u32)read_buffer, lba, blocks);
 	ts = get_timer(0);
 	err = cli_simple_run_command(cmd_mmc, 0);
 	ts = get_timer(0) - ts;
@@ -99,10 +102,10 @@ int board_emmc_test(int argc, char * const argv[])
 	}
 
 err_mw:
-	free(read_buffer);
+	kfree(read_buffer);
 	read_buffer = NULL;
 err_rb:
-	free(write_buffer);
+	kfree(write_buffer);
 	write_buffer = NULL;
 err_wb:
 	return err;

commit a52e8dd4da202de14100f589a10fa9fd2db799e0
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Nov 8 15:36:48 2017 +0800

    usb: gadget: dwc2: avoid reset core before devices connected
    
    Theoretically, the UDC register need not reconfig when GINTSTS.USBRst
    is set, and only do core reset if the devices was connected before.
    This change adds _connected_ flag to check the devices was really
    connected or not. As an optimization, reset device address to zero
    while GINTSTS.USBRst is set.
    
    This patch fix usb connect failed when continuously perform the
    'fastboot reboot-bootloader' command.
    
    Change-Id: I6a78228e147d2274329d922ac3f3ffef19492e7e
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index cb44374e81..8c0967fea5 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -169,6 +169,7 @@ static void udc_disable(struct dwc2_udc *dev)
 	dev->ep0state = WAIT_FOR_SETUP;
 	dev->gadget.speed = USB_SPEED_UNKNOWN;
 	dev->usb_address = 0;
+	dev->connected = 0;
 
 	otg_phy_off(dev);
 }
diff --git a/drivers/usb/gadget/dwc2_udc_otg_priv.h b/drivers/usb/gadget/dwc2_udc_otg_priv.h
index c40ecf8aca..a0dd2c826e 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_priv.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_priv.h
@@ -86,6 +86,7 @@ struct dwc2_udc {
 	unsigned char usb_address;
 
 	unsigned req_pending:1, req_std:1;
+	unsigned connected:1;
 };
 
 #define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index c94396afc0..7f5a7ab9a3 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -238,6 +238,7 @@ struct dwc2_usbotg_reg {
 #define DEV_SPEED_FULL_SPEED_11         (0x3 << 0)
 #define EP_MISS_CNT(x)                  (x << 18)
 #define DEVICE_ADDRESS(x)               (x << 4)
+#define DCFG_DEVADDR_MASK		(0x7f << 4)
 
 /* Core Reset Register (GRSTCTL) */
 #define TX_FIFO_FLUSH                   (0x1 << 5)
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 0d6d2fba8a..554936a493 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -544,6 +544,9 @@ static int dwc2_udc_irq(int irq, void *_dev)
 	}
 
 	if (intr_status & INT_RESET) {
+		u32 temp;
+		u32 connected = dev->connected;
+
 		usb_status = readl(&reg->gotgctl);
 		debug_cond(DEBUG_ISR,
 			"\tReset interrupt - (GOTGCTL):0x%x\n", usb_status);
@@ -554,7 +557,15 @@ static int dwc2_udc_irq(int irq, void *_dev)
 				debug_cond(DEBUG_ISR,
 					"\t\tOTG core got reset (%d)!!\n",
 					reset_available);
-				reconfig_usbd(dev);
+				/* Reset device address to zero */
+				temp = readl(&reg->dcfg);
+				temp &= ~DCFG_DEVADDR_MASK;
+				writel(temp, &reg->dcfg);
+
+				/* Soft reset the core if connected */
+				if (connected)
+					reconfig_usbd(dev);
+
 				dev->ep0state = WAIT_FOR_SETUP;
 				reset_available = 0;
 				dwc2_udc_pre_setup();
@@ -1348,7 +1359,7 @@ static void dwc2_ep0_setup(struct dwc2_udc *dev)
 			if (usb_ctrl->bRequestType
 				!= (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
 				break;
-
+			dev->connected = 1;
 			udc_set_address(dev, usb_ctrl->wValue);
 			return;
 

commit d007e7964b7dc0a173d2571cb6fc9f18ebaf2c7f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 7 09:24:17 2017 +0800

    arm: armv8: introduce cpu suspend and resume support
    
    Just like linux, it supports cpu save and restore context
    during enter and exit low power mode. With this patch, cpu
    is able to suspend with core power off.
    
    Workflow for trap into ATF for system suspend:
            cpu_suspend
               -> cpu_do_suspend
                  -> arch specific fn: int (*fn)(unsigned long)
                      -> psci_system_suspend(deliver 'cpu_resume()' address to ATF)
                         -> ATF system suspend
                         <- ATF system resume
                  <- cpu_resume
               <- cpu_do_resume
            next instruction
    
    Notice: If needed, you should remember to save and restore GIC by yourself.
    
    Change-Id: I7a7c4989ba0845f5b6880c55a6ea6c47724c99df
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 1249547436..b8c31aead8 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -18,6 +18,12 @@ obj-y	+= tlb.o
 obj-y	+= transition.o
 obj-y	+= fwcall.o
 obj-y	+= cpu-dt.o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-y	+= ../armv7/suspend.o
+obj-y	+= sleep.o
+endif
+
 obj-$(CONFIG_ARM_SMCCC)		+= smccc-call.o
 
 ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv8/sleep.S b/arch/arm/cpu/armv8/sleep.S
new file mode 100644
index 0000000000..74ddbeda3e
--- /dev/null
+++ b/arch/arm/cpu/armv8/sleep.S
@@ -0,0 +1,194 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/macro.h>
+#include <asm-offsets.h>
+#include <asm/psci.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+	.globl cpu_suspend
+	.globl cpu_do_suspend
+	.globl cpu_suspend_save
+	.globl cpu_resume
+	.globl cpu_do_resume
+
+/*
+ * int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
+ * @arg will be passed to fn as argument
+ * return value: 0 - cpu resumed from suspended state.
+ *		 -1 - cpu not suspended.
+ */
+ENTRY(cpu_suspend)
+	/*
+	 * Save x8~x30(lr is x30, sp is x29), total (23 + 1 reserved)*8=192
+	 */
+	stp	x29, lr, [sp, #-192]!
+	/* Reserve 8-byte after x8, just for offset with 16-byte aligned */
+	str	x8, [sp, #16]
+	stp	x9, x10, [sp, #32]
+	stp	x11, x12, [sp, #48]
+	stp	x13, x14, [sp, #64]
+	stp	x15, x16, [sp, #80]
+	stp	x17, x18, [sp, #96]
+	stp	x19, x20, [sp,#112]
+	stp	x21, x22, [sp,#128]
+	stp	x23, x24, [sp,#144]
+	stp	x25, x26, [sp,#160]
+	stp	x27, x28, [sp,#176]
+
+	mov	x19, sp
+	mov	x20, x0
+	mov	x21, x1
+
+	/* Save arch specific suspend fn and arg to stack */
+	sub	sp, sp, #PM_CTX_SIZE
+	stp	x0, x1, [sp, #-16]!
+
+	/* x18 is gd, save it to _suspend_gd !! */
+	adr	x0, _suspend_gd
+	str	x18, [x0]
+
+	/* x0: pm_ctx;	x1: sp where restore x8~x30 from */
+	add	x0, sp, #16
+	mov	x1, x19
+	bl	cpu_suspend_save
+
+	adr	lr, aborted
+	/* Jump to arch specific suspend */
+	mov	x0, x20
+	br	x21
+
+	/* Should never reach here, otherwise failed */
+aborted:
+	/* cpu not suspended */
+	add	sp, sp, #(16 + PM_CTX_SIZE)
+	/* Return -1 to the caller */
+	mov	x0, #(-1)
+
+suspend_return:
+	ldr	x8, [sp, #16]
+	ldp	x9, x10, [sp, #32]
+	ldp	x11, x12, [sp, #48]
+	ldp	x13, x14, [sp, #64]
+	ldp	x15, x16, [sp, #80]
+	ldp	x17, x18, [sp, #96]
+	ldp	x19, x20, [sp,#112]
+	ldp	x21, x22, [sp,#128]
+	ldp	x23, x24, [sp,#144]
+	ldp	x25, x26, [sp,#160]
+	ldp	x27, x28, [sp,#176]
+	ldp	x29, lr, [sp], #192
+	ret
+ENDPROC(cpu_suspend)
+
+ENTRY(cpu_do_suspend)
+	/*
+	 * Save temporary x2~x12, total: 11*8=88, maybe you need not so many
+	 * registers now, but I save them for future extendion.
+	 */
+	stp	x2,  x3, [sp, #-88]!
+	stp	x4,  x5, [sp, #16]
+	stp	x6,  x7, [sp, #32]
+	stp	x8,  x9, [sp, #48]
+	stp	x10, x11, [sp,#64]
+	str	x12, [sp, #80]
+
+	/*
+	 * Save core registers.
+	 *
+	 * Note: If you want to add/sub the register here,
+	 *	 remember update suspend_regs[] of struct pm_ctx.
+	 */
+	mrs	x2, vbar_el2
+	mrs	x3, cptr_el2
+	mrs	x4, ttbr0_el2
+	mrs	x5, tcr_el2
+	mrs	x6, mair_el2
+	mrs	x7, cntvoff_el2
+	mrs	x8, sctlr_el2
+	mrs	x9, hcr_el2
+	mrs	x10, daif
+
+	stp	x2,  x3, [x0, #0]
+	stp	x4,  x5, [x0, #16]
+	stp	x6,  x7, [x0, #32]
+	stp	x8,  x9, [x0, #48]
+	str	x10, [x0, #64]
+
+	/* Restore temporary x2~x12 */
+	ldp	x4,  x5, [sp, #16]
+	ldp	x6,  x7, [sp, #32]
+	ldp	x8,  x9, [sp, #48]
+	ldp	x10, x11, [sp,#64]
+	ldr	x12, [sp, #80]
+	ldp	x2,  x3, [sp], #88
+	ret
+ENDPROC(cpu_do_suspend)
+
+ENTRY(cpu_resume)
+	/* Disable interrupt */
+	msr       daifset, #0x03
+
+	/* Load gd !! */
+	adr x1, _suspend_gd
+	ldr x2, [x1]
+
+	/* Get pm_ctx */
+	add x2, x2, #PM_CTX_PHYS
+	ldr x0, [x2]
+
+	/* Need x0=x0-16, because cpu_do_resume needs it */
+	ldp	x1, lr, [x0], #16
+	mov	sp, x1
+	ret
+ENDPROC(cpu_resume)
+
+/*
+ * void sm_do_cpu_do_resume(paddr suspend_regs) __noreturn;
+ * Restore the registers stored when cpu_do_suspend
+ * x0 points to the physical base address of the suspend_regs
+ * field of struct pm_ctx.
+ */
+ENTRY(cpu_do_resume)
+	/*
+	 * Invalidate local tlb entries before turning on MMU !!!
+	 */
+	tlbi	alle2
+	dsb	sy
+	isb
+
+	ldp	x2, x3, [x0]
+	ldp	x4, x5, [x0, #16]
+	ldp	x6, x7, [x0, #32]
+	ldp	x8, x9, [x0, #48]
+	ldp	x10, x11, [x0, #64]
+	ldr	x12, [x0, #80]
+
+	/* Restore core register */
+	msr	vbar_el2, x2
+	msr	cptr_el2, x3
+	msr	ttbr0_el2, x4
+	msr	tcr_el2, x5
+	msr	mair_el2, x6
+	msr	cntvoff_el2, x7
+	msr	hcr_el2, x9
+
+	/* Enable MMU here */
+	msr	sctlr_el2, x8
+	dsb	sy
+	isb
+
+	/* resume interrupt */
+	msr	daif, x10
+
+	mov	x0, #0
+	b	suspend_return
+ENDPROC(cpu_do_resume)
+
+.align 8
+_suspend_gd:
+	.long	0x0

commit 5492555290751859631312c831537632d8e653d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Nov 7 09:07:40 2017 +0800

    arm: armv7: introduce cpu suspend and resume support
    
    Just like linux, it supports cpu save and restore context
    during enter and exit low power mode. With this patch, cpu
    is able to suspend with core power off.
    
    Workflow for trap into ATF for system suspend:
            cpu_suspend
               -> cpu_do_suspend
                  -> arch specific fn: int (*fn)(unsigned long)
                      -> psci_system_suspend(deliver 'cpu_resume()' address to ATF)
                         -> ATF system suspend
                         <- ATF system resume
                  <- cpu_resume
               <- cpu_do_resume
            next instruction
    
    Notice: If needed, you should remember to save and restore GIC by yourself.
    
    Change-Id: I5cb6fb6ac5b6a7f4ec4a975b0fc38250b000b28e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index b14ee54519..aca89142f0 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,6 +12,11 @@ obj-y	+= cache_v7.o cache_v7_asm.o
 obj-y	+= cpu.o cp15.o
 obj-y	+= syslib.o
 
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-y	+= suspend.o
+obj-y	+= sleep.o
+endif
+
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y	+= lowlevel_init.o
 endif
diff --git a/arch/arm/cpu/armv7/sleep.S b/arch/arm/cpu/armv7/sleep.S
new file mode 100644
index 0000000000..b3ea3c1b88
--- /dev/null
+++ b/arch/arm/cpu/armv7/sleep.S
@@ -0,0 +1,185 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arm32_macros.S>
+#include <asm/macro.h>
+#include <asm-offsets.h>
+#include <asm/psci.h>
+#include <config.h>
+#include <linux/linkage.h>
+
+	.globl cpu_suspend
+	.globl cpu_do_suspend
+	.globl cpu_suspend_save
+	.globl cpu_resume
+	.globl cpu_do_resume
+
+/*
+ * int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
+ * @arg will be passed to fn as argument
+ * return value: 0 - cpu resumed from suspended state.
+ *		 -1 - cpu not suspended.
+ */
+ENTRY(cpu_suspend)
+	push	{r4 - r12, lr}
+
+	mov	r5, sp
+	sub	sp, sp, #PM_CTX_SIZE
+	push	{r0, r1}
+
+	/* r9 is gd, save it to _suspend_gd !!! */
+	adr	r4, _suspend_gd
+	str	r9, [r4]
+
+	mov	r1, r5
+	add	r0, sp, #8
+	blx	cpu_suspend_save
+
+	adr	lr, aborted
+	/* Jump to arch specific suspend */
+	pop	{r0, pc}
+
+aborted:
+	/* cpu not suspended */
+	add	sp, sp, #PM_CTX_SIZE
+	/* Return -1 to the caller */
+	mov	r0, #(-1)
+
+suspend_return:
+	pop	{r4 - r12, pc}
+ENDPROC(cpu_suspend)
+
+ENTRY(cpu_do_suspend)
+	push	{r4 - r11}
+
+	read_midr r4
+	ubfx	r5, r4, #4, #12
+	ldr     r4, CORTEX_A7_PART_NUM
+	cmp	r5, r4
+	beq	a7_suspend
+	ldr     r4, CORTEX_A9_PART_NUM
+	cmp	r5, r4
+	beq	a9_suspend
+
+	/* cpu not supported */
+	b	.
+
+	/* A9 needs PCR/DIAG */
+a9_suspend:
+	read_pcr r4
+	read_diag r5
+	stmia	r0!, {r4 - r5}
+
+a7_suspend:
+	read_fcseidr r4
+	read_tpidruro r5
+	stmia	r0!, {r4 - r5}
+
+	read_dacr  r4
+	read_ttbr0 r5
+	read_ttbr1 r6
+	read_ttbcr r7
+	read_sctlr r8
+	read_actlr r9
+	read_cpacr r10
+	stmia	r0!, {r4 - r10}
+
+	read_prrr r4
+	read_nmrr r5
+	read_vbar r6
+	mrs r7, CPSR
+	stmia	r0, {r4 - r7}
+
+	pop	{r4 - r11}
+	bx	lr
+ENDPROC(cpu_do_suspend)
+
+ENTRY(cpu_resume)
+	/* Disable interrupt */
+	cpsid	aif
+
+	/* Load gd !! */
+	adr r1, _suspend_gd
+	ldr r2, [r1]
+
+	/* Get pm_ctx */
+	add r2, r2, #PM_CTX_PHYS
+	ldr r0, [r2]
+
+	/* Need to use r0!, because cpu_do_resume needs it */
+	ldmia	r0!, {sp, pc}
+ENDPROC(cpu_resume)
+
+/*
+ * void sm_do_cpu_do_resume(paddr suspend_regs) __noreturn;
+ * Restore the registers stored when cpu_do_suspend
+ * r0 points to the physical base address of the suspend_regs
+ * field of struct pm_ctx.
+ */
+ENTRY(cpu_do_resume)
+	read_midr r4
+	ubfx	r5, r4, #4, #12
+	ldr     r4, CORTEX_A7_PART_NUM
+	cmp	r5, r4
+	beq	a7_resume
+
+	/*
+	 * A9 needs PCR/DIAG
+	 */
+	ldmia   r0!, {r4 - r5}
+	write_pcr r4
+	write_diag r5
+
+a7_resume:
+	/* v7 resume */
+	mov	ip, #0
+
+	/* Invalidate icache to PoU */
+	write_iciallu
+	/* set reserved context */
+	write_contextidr ip
+
+	ldmia	r0!, {r4 - r5}
+	write_fcseidr r4
+	write_tpidruro r5
+
+	ldmia	r0!, {r4 - r10}
+	/* Invalidate entire TLB */
+	write_tlbiall
+	write_dacr r4
+	write_ttbr0 r5
+	write_ttbr1 r6
+	write_ttbcr r7
+
+	ldmia	r0, {r4 - r7}
+	write_prrr  r4
+	write_nmrr  r5
+	write_vbar  r6
+
+	write_actlr r9
+	write_cpacr r10
+	write_bpiall
+	isb
+	dsb
+
+	/* MMU will be enabled here */
+	write_sctlr r8
+	isb
+
+	/* Restore interrupt */
+	msr CPSR_c, r7
+
+	mov	r0, #0
+	b	suspend_return
+ENDPROC(cpu_do_resume)
+
+.align 4
+_suspend_gd:
+	.word	0x0
+CORTEX_A7_PART_NUM:
+	.word	0xC07
+CORTEX_A9_PART_NUM:
+	.word	0xC09
diff --git a/arch/arm/cpu/armv7/suspend.c b/arch/arm/cpu/armv7/suspend.c
new file mode 100644
index 0000000000..2b97561255
--- /dev/null
+++ b/arch/arm/cpu/armv7/suspend.c
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/suspend.h>
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void cpu_suspend_save(struct pm_ctx *ctx, unsigned long sp)
+{
+	gd->pm_ctx_phys = (phys_addr_t)ctx;
+
+	/* The content will be passed to cpu_do_resume as register sp */
+	ctx->sp = sp;
+	ctx->cpu_resume_addr = (phys_addr_t)cpu_do_resume;
+
+	cpu_do_suspend(ctx->suspend_regs);
+
+	flush_dcache_all();
+}
diff --git a/arch/arm/include/asm/arm32_macros.S b/arch/arm/include/asm/arm32_macros.S
new file mode 100644
index 0000000000..e6d4f0745e
--- /dev/null
+++ b/arch/arm/include/asm/arm32_macros.S
@@ -0,0 +1,264 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+	/* Please keep them sorted based on the CRn register */
+	.macro read_midr reg
+	mrc     p15, 0, \reg, c0, c0, 0
+	.endm
+
+	.macro read_ctr reg
+	mrc	p15, 0, \reg, c0, c0, 1
+	.endm
+
+	.macro read_mpidr reg
+	mrc	p15, 0, \reg, c0, c0, 5
+	.endm
+
+	.macro read_sctlr reg
+	mrc	p15, 0, \reg, c1, c0, 0
+	.endm
+
+	.macro write_sctlr reg
+	mcr	p15, 0, \reg, c1, c0, 0
+	.endm
+
+	.macro write_actlr reg
+	mcr	p15, 0, \reg, c1, c0, 1
+	.endm
+
+	.macro read_actlr reg
+	mrc	p15, 0, \reg, c1, c0, 1
+	.endm
+
+	.macro write_cpacr reg
+	mcr	p15, 0, \reg, c1, c0, 2
+	.endm
+
+	.macro read_cpacr reg
+	mrc	p15, 0, \reg, c1, c0, 2
+	.endm
+
+	.macro read_scr reg
+	mrc	p15, 0, \reg, c1, c1, 0
+	.endm
+
+	.macro write_scr reg
+	mcr	p15, 0, \reg, c1, c1, 0
+	.endm
+
+	.macro write_nsacr reg
+	mcr	p15, 0, \reg, c1, c1, 2
+	.endm
+
+	.macro read_nsacr reg
+	mrc	p15, 0, \reg, c1, c1, 2
+	.endm
+
+	.macro write_ttbr0 reg
+	mcr	p15, 0, \reg, c2, c0, 0
+	.endm
+
+	.macro read_ttbr0 reg
+	mrc	p15, 0, \reg, c2, c0, 0
+	.endm
+
+	.macro write_ttbr1 reg
+	mcr	p15, 0, \reg, c2, c0, 1
+	.endm
+
+	.macro read_ttbr1 reg
+	mrc	p15, 0, \reg, c2, c0, 1
+	.endm
+
+	.macro write_ttbcr reg
+	mcr	p15, 0, \reg, c2, c0, 2
+	.endm
+
+	.macro read_ttbcr reg
+	mrc	p15, 0, \reg, c2, c0, 2
+	.endm
+
+
+	.macro write_dacr reg
+	mcr	p15, 0, \reg, c3, c0, 0
+	.endm
+
+	.macro read_dacr reg
+	mrc	p15, 0, \reg, c3, c0, 0
+	.endm
+
+	.macro read_dfsr reg
+	mrc	p15, 0, \reg, c5, c0, 0
+	.endm
+
+	.macro write_icialluis
+	/*
+	 * Invalidate all instruction caches to PoU, Inner Shareable
+	 * (register ignored)
+	 */
+	mcr	p15, 0, r0, c7, c1, 0
+	.endm
+
+	.macro write_bpiallis
+	/*
+	 * Invalidate entire branch predictor array, Inner Shareable
+	 * (register ignored)
+	 */
+	mcr	p15, 0, r0, c7, c1, 6
+	.endm
+
+	.macro write_iciallu
+	/* Invalidate all instruction caches to PoU (register ignored) */
+	mcr	p15, 0, r0, c7, c5, 0
+	.endm
+
+	.macro write_icimvau reg
+	/* Instruction cache invalidate by MVA */
+	mcr	p15, 0, \reg, c7, c5, 1
+	.endm
+
+	.macro write_bpiall
+	/* Invalidate entire branch predictor array (register ignored) */
+	mcr	p15, 0, r0, c7, c5, 6
+	.endm
+
+	.macro write_dcimvac reg
+	/* Data cache invalidate by MVA */
+	mcr	p15, 0, \reg, c7, c6, 1
+	.endm
+
+	.macro write_dcisw reg
+	/* Data cache invalidate by set/way */
+	mcr	p15, 0, \reg, c7, c6, 2
+	.endm
+
+	.macro write_dccmvac reg
+	/* Data cache clean by MVA */
+	mcr	p15, 0, \reg, c7, c10, 1
+	.endm
+
+	.macro write_dccsw reg
+	/* Data cache clean by set/way */
+	mcr	p15, 0, \reg, c7, c10, 2
+	.endm
+
+	.macro write_dccimvac reg
+	/* Data cache invalidate by MVA */
+	mcr	p15, 0, \reg, c7, c14, 1
+	.endm
+
+	.macro write_dccisw reg
+	/* Data cache clean and invalidate by set/way */
+	mcr	p15, 0, \reg, c7, c14, 2
+	.endm
+
+	.macro write_tlbiall
+	/* Invalidate entire unified TLB (register ignored) */
+	mcr	p15, 0, r0, c8, c7, 0
+	.endm
+
+	.macro write_tlbiallis
+	/* Invalidate entire unified TLB Inner Sharable (register ignored) */
+	mcr	p15, 0, r0, c8, c3, 0
+	.endm
+
+	.macro write_tlbiasidis reg
+	/* Invalidate unified TLB by ASID Inner Sharable */
+	mcr	p15, 0, \reg, c8, c3, 2
+	.endm
+
+	.macro write_tlbimvaais reg
+	/* Invalidate unified TLB by MVA all ASID Inner Sharable */
+	mcr	p15, 0, \reg, c8, c3, 3
+	.endm
+
+	.macro write_prrr reg
+	mcr	p15, 0, \reg, c10, c2, 0
+	.endm
+
+	.macro read_prrr reg
+	mrc	p15, 0, \reg, c10, c2, 0
+	.endm
+
+	.macro write_nmrr reg
+	mcr	p15, 0, \reg, c10, c2, 1
+	.endm
+
+	.macro read_nmrr reg
+	mrc	p15, 0, \reg, c10, c2, 1
+	.endm
+
+	.macro read_vbar reg
+	mrc	p15, 0, \reg, c12, c0, 0
+	.endm
+
+	.macro write_vbar reg
+	mcr	p15, 0, \reg, c12, c0, 0
+	.endm
+
+	.macro write_mvbar reg
+	mcr	p15, 0, \reg, c12, c0, 1
+	.endm
+
+	.macro read_mvbar reg
+	mrc	p15, 0, \reg, c12, c0, 1
+	.endm
+
+	.macro write_fcseidr reg
+	mcr	p15, 0, \reg, c13, c0, 0
+	.endm
+
+	.macro read_fcseidr reg
+	mrc	p15, 0, \reg, c13, c0, 0
+	.endm
+
+	.macro write_contextidr reg
+	mcr	p15, 0, \reg, c13, c0, 1
+	.endm
+
+	.macro read_contextidr reg
+	mrc	p15, 0, \reg, c13, c0, 1
+	.endm
+
+	.macro write_tpidruro reg
+	mcr	p15, 0, \reg, c13, c0, 3
+	.endm
+
+	.macro read_tpidruro reg
+	mrc	p15, 0, \reg, c13, c0, 3
+	.endm
+
+	.macro read_clidr reg
+	/* Cache Level ID Register */
+	mrc	p15, 1, \reg, c0, c0, 1
+	.endm
+
+	.macro read_ccsidr reg
+	/* Cache Size ID Registers */
+	mrc	p15, 1, \reg, c0, c0, 0
+	.endm
+
+	.macro write_csselr reg
+	/* Cache Size Selection Register */
+	mcr	p15, 2, \reg, c0, c0, 0
+	.endm
+
+	/* Cortex A9: pcr, diag registers */
+	.macro write_pcr reg
+       mcr  p15, 0, \reg, c15, c0, 0
+       .endm
+
+       .macro read_pcr reg
+       mrc  p15, 0, \reg, c15, c0, 0
+       .endm
+
+       .macro write_diag reg
+       mcr  p15, 0, \reg, c15, c0, 1
+       .endm
+
+       .macro read_diag reg
+       mrc  p15, 0, \reg, c15, c0, 1
+       .endm
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
new file mode 100644
index 0000000000..ac7ba35753
--- /dev/null
+++ b/arch/arm/include/asm/suspend.h
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef SUSPEND_H
+#define SUSPEND_H
+#include <common.h>
+#include <asm-generic/global_data.h>
+
+/* suspend/resume core functions */
+void cpu_suspend_save(struct pm_ctx *ptr, unsigned long sp);
+void cpu_do_suspend(unsigned long *ptr);
+
+void cpu_resume(void);
+void cpu_do_resume(void);
+
+/*
+ * Exported to platform suspend, arg will be passed to fn as r0
+ * Return value: 0  - cpu resumed from suspended state.
+ *               -1 - cpu not suspended.
+ */
+int cpu_suspend(unsigned long arg, int (*fn)(unsigned long));
+#endif
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 944f58195c..dc2d6e8ce4 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -24,6 +24,13 @@
 #include <membuff.h>
 #include <linux/list.h>
 
+/* Never change the sequence of members !!! */
+struct pm_ctx {
+	unsigned long sp;
+	phys_addr_t cpu_resume_addr;
+	unsigned long suspend_regs[15];
+};
+
 typedef struct global_data {
 	bd_t *bd;
 	unsigned long flags;
@@ -114,6 +121,7 @@ typedef struct global_data {
 	struct bootstage_data *bootstage;	/* Bootstage information */
 	struct bootstage_data *new_bootstage;	/* Relocated bootstage info */
 #endif
+	phys_addr_t pm_ctx_phys;
 } gd_t;
 #endif
 
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index b04f7c6297..07b15497df 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -38,5 +38,8 @@ int main(void)
 
 	DEFINE(GD_START_ADDR_SP, offsetof(struct global_data, start_addr_sp));
 
+	DEFINE(PM_CTX_SIZE, sizeof(struct pm_ctx));
+	DEFINE(PM_CTX_PHYS, offsetof(struct global_data, pm_ctx_phys));
+
 	return 0;
 }

commit 6f00aaa2074b4c20dbde307e76d63acb3fc80c64
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 8 20:42:43 2017 +0800

    rockchip: blk: remove cache operation
    
    The underlying drivers should be responsible
    for the cache operation.
    
    Change-Id: Iff19807fc5f72295e721511081846e34291d7770
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index 2ffc8119a1..0396a83d23 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -29,13 +29,11 @@ struct mmc *mmcblk_dev_init(int dev)
 static int mmcblk_read(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
 {
 	u32 n;
-	ulong start = (ulong)buffer;
 
 	debug("\nMMC read: block # 0x%x, count 0x%x  to %p... ", blk, cnt, buffer);
 
 	n = blk_dread(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
-	/* invalidate cache after read via dma */
-	invalidate_dcache_range(start, start + cnt * 512);
+
 	debug("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
 
 	return (n == cnt) ? 0 : -EIO;

commit 2b0c24e04f61a0b8667c3995f73c8b8ac2312876
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 8 17:30:59 2017 +0800

    rockchip: configs: enable ROCKCHIP_PARTITION_BOOT
    
    This enable bootrkp command to boot a system from
    rockchip format partition.
    
    Change-Id: Ia7a1bdaccafc85393cc5156e41d8f44d500af7b8
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index e8d78868d3..aa6320ddc6 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -4,6 +4,7 @@ CONFIG_ROCKCHIP_RK3128=y
 CONFIG_ROCKCHIP_BLOCK_API=y
 CONFIG_ROCKCHIP_PARAM=y
 CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
+CONFIG_ROCKCHIP_PARTITION_BOOT=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y

commit efe731c26f1a0c08784d0e480be0b0b2c71eebf7
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Nov 8 11:31:13 2017 +0800

    rockchip: boot mode: parse adc channel from dts
    
    Most the current rockchip based boards use adc channel
    1 detect the download key, but there ares also some
    boards like rk312x base plaform use adc channel2.
    So we parse the adc channel from dts if we can get
    it, otherwise we use the channel 1 as default.
    
    Change-Id: I2fccb7bf73db67100d7e800f87ac34ac651bba34
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index c43a924de1..c6ebdf2e01 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -9,6 +9,9 @@
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <dm.h>
+#include <fdtdec.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 void set_back_to_bootrom_dnl_flag(void)
 {
@@ -27,9 +30,19 @@ void set_back_to_bootrom_dnl_flag(void)
 
 __weak int rockchip_dnl_key_pressed(void)
 {
+	const void *blob = gd->fdt_blob;
 	unsigned int val;
+	int channel = 1;
+	int node;
+	u32 chns[2];
+
+	node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
+	if (node >= 0) {
+	       if (!fdtdec_get_int_array(blob, node, "io-channels", chns, 2))
+		       channel = chns[1];
+	}
 
-	if (adc_channel_single_shot("saradc", 1, &val)) {
+	if (adc_channel_single_shot("saradc", channel, &val)) {
 		printf("%s adc_channel_single_shot fail!\n", __func__);
 		return false;
 	}

commit 692bb812fbfd0d32048c9f5689cb876eb4154764
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 11 15:01:31 2017 +0800

    FROMLIST: rockchip: check download key before bootup
    
    Enter download mode if the download key pressed.
    
    Change-Id: I4827884e1b974bf42d5a38c138c827d079d5983f
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index e9fc42d9c5..c43a924de1 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -5,15 +5,56 @@
  */
 
 #include <common.h>
+#include <adc.h>
 #include <asm/io.h>
 #include <asm/arch/boot_mode.h>
 #include <dm.h>
 
+void set_back_to_bootrom_dnl_flag(void)
+{
+	writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+}
+
+/*
+ * detect download key status by adc, most rockchip
+ * based boards use adc sample the download key status,
+ * but there are also some use gpio. So it's better to
+ * make this a weak function that can be override by
+ * some special boards.
+ */
+#define KEY_DOWN_MIN_VAL	0
+#define KEY_DOWN_MAX_VAL	30
+
+__weak int rockchip_dnl_key_pressed(void)
+{
+	unsigned int val;
+
+	if (adc_channel_single_shot("saradc", 1, &val)) {
+		printf("%s adc_channel_single_shot fail!\n", __func__);
+		return false;
+	}
+
+	if ((val >= KEY_DOWN_MIN_VAL) && (val <= KEY_DOWN_MAX_VAL))
+		return true;
+	else
+		return false;
+}
+
+void rockchip_dnl_mode_check(void)
+{
+	if (rockchip_dnl_key_pressed()) {
+		printf("download key pressed, entering download mode...");
+		set_back_to_bootrom_dnl_flag();
+		do_reset(NULL, 0, 0, NULL);
+	}
+}
+
 int setup_boot_mode(void)
 {
 	void *reg;
 	int boot_mode;
 
+	rockchip_dnl_mode_check();
 
 	if (of_machine_is_compatible("rockchip,rk3128"))
 		reg = (void *)0x100a0038;

commit 47a9f8fc78083662daba3035042874973bd67db3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 11 15:00:49 2017 +0800

    FROMLIST: rockchip: add support for enter to bootrom download mode
    
    Rockchip bootrom will enter download mode if it returns from
    spl/tpl with a non-zero value and couldn't find a valid image
    in the backup partition.
    This patch provide a method to instruct the system to back to
    bootrom download mode by checking the BROM_DOWNLOAD_FLAG register.
    As the bootrom download function relys on some modules such as
    interrupts, so we need to back to bootrom as early as possbile
    before the tpl/spl code override the interrupt configurations.
    
    Change-Id: Ib07315127573f1cc38e158f69679ba4e27857cf2
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index 163b2e7b04..6b2a610cf4 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -15,7 +15,11 @@
 #define BOOT_CHARGING		(REBOOT_FLAG + 11)
 /* enter usb mass storage mode */
 #define BOOT_UMS		(REBOOT_FLAG + 12)
+/* enter bootrom download mode */
+#define BOOT_BROM_DOWNLOAD	0xEF08A53C
 
+#ifndef __ASSEMBLY__
 int setup_boot_mode(void);
+#endif
 
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 0f6bb7a5c4..db3ef48973 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -184,6 +184,7 @@ config ROCKCHIP_RK3399
 	select DEBUG_UART_BOARD_INIT
 	select GICV3
 	select BOARD_LATE_INIT
+	select ROCKCHIP_BROM_HELPER
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index e369fdc25a..bef2a90d1f 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <asm/arch/bootrom.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/io.h>
 #include <asm/setjmp.h>
 #include <asm/system.h>
 
@@ -15,12 +17,45 @@
  */
 static jmp_buf brom_ctx __section(".data");
 
+static void _back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
+{
+	longjmp(brom_ctx, brom_cmd);
+}
+
 void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
 {
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 	puts("Returning to boot ROM...\n");
 #endif
-	longjmp(brom_ctx, brom_cmd);
+	_back_to_bootrom(brom_cmd);
+}
+
+/*
+ * we back to bootrom download mode if get a
+ * BOOT_BROM_DOWNLOAD flag in boot mode register
+ *
+ * note: the boot mode register is configured by
+ * application(next stage bootloader, kernel, etc),
+ * and the bootrom never check this register, so we need
+ * to check it and back to bootrom at very early bootstage(before
+ * some basic configurations(such as interrupts) been
+ * changed by TPL/SPL, as the bootrom download operation
+ * relys on many default settings(such as interrupts) by
+ * it's self.
+ */
+static bool check_back_to_brom_dnl_flag(void)
+{
+	u32 boot_mode;
+
+	if (CONFIG_ROCKCHIP_BOOT_MODE_REG) {
+		boot_mode = readl(CONFIG_ROCKCHIP_BOOT_MODE_REG);
+		if (boot_mode == BOOT_BROM_DOWNLOAD) {
+			writel(0, CONFIG_ROCKCHIP_BOOT_MODE_REG);
+			return true;
+		}
+	}
+
+	return false;
 }
 
 /*
@@ -34,6 +69,8 @@ int save_boot_params(void)
 
 	switch (ret) {
 	case 0:
+		if (check_back_to_brom_dnl_flag())
+			_back_to_bootrom(BROM_BOOT_ENTER_DNL);
 		/*
 		 * This is the initial pass through this function
 		 * (i.e. saving the context), setjmp just setup up the
@@ -54,7 +91,13 @@ int save_boot_params(void)
 		 */
 		ret = 0;
 		break;
-
+	case BROM_BOOT_ENTER_DNL:
+		/*
+		 * A non-zero return value will instruct the BROM enter
+		 * download mode.
+		 */
+		ret = 1;
+		break;
 	default:
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 		puts("FATAL: unexpected command to back_to_bootrom()\n");

commit be55ced34eeedacc1031dd96a7603d20b1a58381
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 11 15:00:16 2017 +0800

    FROMLIST: rockchip: make boot_mode related codes reused across all platforms
    
    setup_boot_mode function use the same logic but different
    mode register address across all the rockchip platforms,
    so it's better to make this function reused across all the
    platforms, and let the mode register address setting from
    the config file.
    
    Also add support for rk312x soc which is a little
    special: the bootrom download flag is stored in
    a grf register but the other boot mode flags are
    stored in anohter pmugrf register.
    
    Change-Id: I2e6a0ba870626adb837975c08094250d47767dac
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h
index bd65f60bf2..163b2e7b04 100644
--- a/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -16,4 +16,6 @@
 /* enter usb mass storage mode */
 #define BOOT_UMS		(REBOOT_FLAG + 12)
 
+int setup_boot_mode(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 0c7ea79fae..0f6bb7a5c4 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -183,6 +183,7 @@ config ROCKCHIP_RK3399
 	select SPL_DRIVERS_MISC_SUPPORT
 	select DEBUG_UART_BOARD_INIT
 	select GICV3
+	select BOARD_LATE_INIT
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
@@ -218,6 +219,21 @@ config TPL_ROCKCHIP_BACK_TO_BROM
           SPL will return to the boot rom, which will then load the U-Boot
           binary to keep going on.
 
+config ROCKCHIP_BOOT_MODE_REG
+	hex "Rockchip boot mode flag register address"
+	default 0x200081c8 if ROCKCHIP_RK3036
+	default 0x200081c8 if ROCKCHIP_RK3128
+	default 0x20004040 if ROCKCHIP_RK3188
+	default 0x110005c8 if ROCKCHIP_RK322X
+	default 0xff730094 if ROCKCHIP_RK3288
+	default 0xff738200 if ROCKCHIP_RK3368
+	default 0xff320300 if ROCKCHIP_RK3399
+	default 0x10300580 if ROCKCHIP_RV1108
+	default 0
+	help
+	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
+	  according to the value from this register.
+
 config ROCKCHIP_SPL_RESERVE_IRAM
 	hex "Size of IRAM reserved in SPL"
 	default 0x4000
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 9b408ba674..ba38e97623 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -26,6 +26,11 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+
+ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0)
+obj-y += boot_mode.o
+endif
+
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
new file mode 100644
index 0000000000..e9fc42d9c5
--- /dev/null
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+#include <dm.h>
+
+int setup_boot_mode(void)
+{
+	void *reg;
+	int boot_mode;
+
+
+	if (of_machine_is_compatible("rockchip,rk3128"))
+		reg = (void *)0x100a0038;
+	else
+		reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
+
+	boot_mode = readl(reg);
+
+	debug("boot mode %x.\n", boot_mode);
+
+	/* Clear boot mode */
+	writel(BOOT_NORMAL, reg);
+
+	switch (boot_mode) {
+	case BOOT_FASTBOOT:
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+		break;
+	case BOOT_UMS:
+		printf("enter UMS!\n");
+		env_set("preboot", "setenv preboot; ums mmc 0");
+		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
+	}
+
+	return 0;
+}
diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
index 1f11f8e6af..a5d257168f 100644
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -19,34 +19,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_BASE	0x20008000
-
-static void setup_boot_mode(void)
-{
-	struct rk3036_grf *const grf = (void *)GRF_BASE;
-	int boot_mode = readl(&grf->os_reg[4]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &grf->os_reg[4]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; ums mmc 0");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 __weak int rk_board_late_init(void)
 {
 	return 0;
diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 55ea7f1836..0e2af0b852 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -20,34 +20,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define PMU_BASE	0x100a0000
-
-static void setup_boot_mode(void)
-{
-	struct rk3128_pmu *const pmu = (void *)PMU_BASE;
-	int boot_mode = readl(&pmu->sys_reg[0]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &pmu->sys_reg[0]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; ums mmc 0");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 #ifdef CONFIG_CHARGE_DISPLAY
 static int charge_display(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c
index 622e046dc0..3d4aadebfe 100644
--- a/arch/arm/mach-rockchip/rk3188-board.c
+++ b/arch/arm/mach-rockchip/rk3188-board.c
@@ -24,6 +24,8 @@ int board_late_init(void)
 {
 	struct rk3188_grf *grf;
 
+	setup_boot_mode();
+
 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 	if (IS_ERR(grf)) {
 		error("grf syscon returned %ld\n", PTR_ERR(grf));
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index d97be336b6..1c931b03d7 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -16,34 +16,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define GRF_BASE	0x11000000
-
-static void setup_boot_mode(void)
-{
-	struct rk322x_grf *const grf = (void *)GRF_BASE;
-	int boot_mode = readl(&grf->os_reg[0]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &grf->os_reg[0]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; ums mmc 0");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 __weak int rk_board_late_init(void)
 {
 	return 0;
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 9ec1d420a2..9e69ced931 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -24,35 +24,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define PMU_BASE	0xff730000
-
-static void setup_boot_mode(void)
-{
-	struct rk3288_pmu *const pmu = (void *)PMU_BASE;
-	int boot_mode = readl(&pmu->sys_reg[0]);
-
-	debug("boot mode %x.\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &pmu->sys_reg[0]);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; if mmc dev 0;"
-		       "then ums mmc 0; else ums mmc 1;fi");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 __weak int rk_board_late_init(void)
 {
 	return 0;
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index ea449c8f5a..f2f2f75e32 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -64,35 +64,6 @@ int arch_cpu_init(void)
 	return 0;
 }
 
-static void setup_boot_mode(void)
-{
-	struct rk3399_pmugrf_regs *pmugrf;
-	int boot_mode;
-
-	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);;
-	boot_mode = readl(&pmugrf->os_reg0);
-	debug("boot mode %x\n", boot_mode);
-
-	/* Clear boot mode */
-	writel(BOOT_NORMAL, &pmugrf->os_reg0);
-
-	switch (boot_mode) {
-	case BOOT_FASTBOOT:
-		printf("enter fastboot!\n");
-		env_set("preboot", "setenv preboot; fastboot usb0");
-		break;
-	case BOOT_UMS:
-		printf("enter UMS!\n");
-		env_set("preboot", "setenv preboot; if mmc dev 0;"
-		       "then ums mmc 0; else ums mmc 1;fi");
-		break;
-	case BOOT_LOADER:
-		printf("enter Rockusb!\n");
-		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
-		break;
-	}
-}
-
 int board_late_init(void)
 {
 	setup_boot_mode();

commit 6053e13978f0bf4a68516b00e4f1652401aa7e25
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:18 2017 +0200

    UPSTREAM: rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)
    
    With all targets converted to generate prepadded images, this removes
    the spl_boot0 field from our config structure and removes the unused
    code-path (for images that are not prepadded): i.e. spl_boot0 is now
    implied as 'true' and the code is specialised by removing the other
    case.
    
    Change-Id: Ib3d90539acb72e01c31a9da819ba8b46134bcb5e
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index e72111028f..cc16ec0b36 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -58,9 +58,6 @@ struct header1_info {
  * @spl_hdr:		Boot ROM requires a 4-bytes spl header
  * @spl_size:		Spl size(include extra 4-bytes spl header)
  * @spl_rc4:		RC4 encode the SPL binary (same key as header)
- * @spl_boot0:          A new-style (ARM_SOC_BOOT0_HOOK) image that should
- *                      have the boot magic (e.g. 'RK33') written to its first
- *                      word.
  */
 
 struct spl_info {
@@ -68,20 +65,19 @@ struct spl_info {
 	const char *spl_hdr;
 	const uint32_t spl_size;
 	const bool spl_rc4;
-	const bool spl_boot0;
 };
 
 static struct spl_info spl_infos[] = {
-	{ "rk3036", "RK30", 0x1000, false, true },
-	{ "rk3066", "RK30", 0x8000, true, false },
-	{ "rk3128", "RK31", 0x1800, false, true },
-	{ "rk3188", "RK31", 0x8000 - 0x800, true, true },
-	{ "rk322x", "RK32", 0x8000 - 0x1000, false, true },
-	{ "rk3288", "RK32", 0x8000, false, true },
-	{ "rk3328", "RK32", 0x8000 - 0x1000, false, true },
-	{ "rk3368", "RK33", 0x8000 - 0x1000, false, true },
-	{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
-	{ "rv1108", "RK11", 0x1800, false, true },
+	{ "rk3036", "RK30", 0x1000, false },
+	{ "rk3066", "RK30", 0x8000, true, },
+	{ "rk3128", "RK31", 0x1800, false },
+	{ "rk3188", "RK31", 0x8000 - 0x800, true },
+	{ "rk322x", "RK32", 0x8000 - 0x1000, false },
+	{ "rk3288", "RK32", 0x8000, false },
+	{ "rk3328", "RK32", 0x8000 - 0x1000, false },
+	{ "rk3368", "RK33", 0x8000 - 0x1000, false },
+	{ "rk3399", "RK33", 0x30000 - 0x2000, false },
+	{ "rv1108", "RK11", 0x1800, false },
 };
 
 static unsigned char rc4_key[16] = {
@@ -159,16 +155,6 @@ bool rkcommon_need_rc4_spl(struct image_tool_params *params)
 	return info->spl_rc4;
 }
 
-bool rkcommon_spl_is_boot0(struct image_tool_params *params)
-{
-	struct spl_info *info = rkcommon_get_spl_info(params->imagename);
-
-	/*
-	 * info would not be NULL, because of we checked params before.
-	 */
-	return info->spl_boot0;
-}
-
 static void rkcommon_set_header0(void *buf, uint file_size, uint max_size,
 				 struct image_tool_params *params)
 {
@@ -368,15 +354,12 @@ int rkcommon_vrec_header(struct image_tool_params *params,
 	 * have the first 4 bytes reserved for the spl_name).  Reserving
 	 * these 4 bytes is done using the BOOT0_HOOK infrastructure.
 	 *
-	 * Depending on this, the header is either 0x800 (if this is a
-	 * 'boot0'-style payload, which has reserved 4 bytes at the
-	 * beginning for the 'spl_name' and expects us to overwrite
-	 * its first 4 bytes) or 0x804 bytes in length.
+	 * The header is always at 0x800 (as we now use a payload
+	 * prepadded using the boot0 hook for all targets): the first
+	 * 4 bytes of these images can safely be overwritten using the
+	 * boot magic.
 	 */
-	if (rkcommon_spl_is_boot0(params))
-		tparams->header_size = RK_SPL_HDR_START;
-	else
-		tparams->header_size = RK_SPL_HDR_START + 4;
+	tparams->header_size = RK_SPL_HDR_START;
 
 	/* Allocate, clear and install the header */
 	tparams->hdr = malloc(tparams->header_size);
diff --git a/tools/rkcommon.h b/tools/rkcommon.h
index cd357c71d0..8fd147a4e0 100644
--- a/tools/rkcommon.h
+++ b/tools/rkcommon.h
@@ -44,14 +44,6 @@ const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
  */
 int rkcommon_get_spl_size(struct image_tool_params *params);
 
-/**
- * rkcommon_spl_is_boot0() - is magic included in spl
- *
- * Returns true if magic (for example RK30) is included in spl
- */
-
-bool rkcommon_spl_is_boot0(struct image_tool_params *params);
-
 /**
  * rkcommon_set_header() - set up the header for a Rockchip boot image
  *
diff --git a/tools/rknand.c b/tools/rknand.c
index 690af2de4b..c93f053203 100644
--- a/tools/rknand.c
+++ b/tools/rknand.c
@@ -63,8 +63,7 @@ static void rknand_fill_ninfo(struct image_tool_params *params)
 	ninfo.tplsize = rknand_get_file_size(ninfo.tplfile);
 	ninfo.splsize = rknand_get_file_size(ninfo.splfile);
 
-	ninfo.tplpaddedsize = ROUND(ninfo.tplsize + 
-		(rkcommon_spl_is_boot0(params) ? 0 : 4), RKNAND_SECT_LEN);
+	ninfo.tplpaddedsize = ROUND(ninfo.tplsize, RKNAND_SECT_LEN);
 
 	ninfo.splpaddedsize = ROUND(ninfo.splsize, RKNAND_SECT_LEN);
 

commit 397403c7e477b32ce70ce32375dda21668f02d37
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:17 2017 +0200

    UPSTREAM: rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to Kconfig
    
    There still are a few CONFIG_SPL_* options selected using defines from
    rk3188_common.h instead of via Kconfig.  This migrates those over to
    Kconfig.
    
    Change-Id: Ib5190f8478a38613879a0182503ad1c720640384
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ea58b24e05..0c7ea79fae 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -41,8 +41,13 @@ config ROCKCHIP_RK3188
 	select CPU_V7
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
-	select SUPPORT_TPL
 	select SPL
+	select SPL_CLK
+	select SPL_PINCTRL
+	select SPL_REGMAP
+	select SPL_SYSCON
+	select SPL_RAM
+	select SPL_DRIVERS_MISC_SUPPORT
 	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index e8ce801984..b8f549cd9d 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -40,12 +40,6 @@
 /* spl size 32kb sram - 2kb bootrom */
 #define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x800)
 #define CONFIG_SPL_FRAMEWORK		1
-#define CONFIG_SPL_CLK			1
-#define CONFIG_SPL_PINCTRL		1
-#define CONFIG_SPL_REGMAP		1
-#define CONFIG_SPL_SYSCON		1
-#define CONFIG_SPL_RAM			1
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT	1
 #define CONFIG_ROCKCHIP_SERIAL		1
 
 #define CONFIG_SPL_STACK		0x10087fff

commit 50b28820e7eddd833d282d14d49fe7024b2f9e3d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:16 2017 +0200

    UPSTREAM: rockchip: back-to-bootrom: allow passing a cmd to the bootrom
    
    The BROM supports forcing it to enter download-mode, if an appropriate
    result/cmd-word is returned to it.  There already is a series to
    support this in review, so this prepares the (newly C-version) of the
    back-to-bootrom code to accept a cmd to passed on to the BROM.
    
    All the existing call-sites are adjusted to match the changed function
    signature.
    
    Also sync the support to rk3036 / rk3228
    
    Change-Id: I1ea9bc12d6d84a75c043754b0eba7b8959e81d69
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 9b0f6ade04..21994a65ee 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -24,6 +24,9 @@ extern u32 SAVE_SP_ADDR;
  * download mode, ...).
  *
  * This function does not return.
+ *
+ * @brom_cmd: indicates how the bootrom should continue the boot
+ *            sequence (e.g. load the next stage)
  */
 enum rockchip_bootrom_cmd {
 	/*
@@ -35,5 +38,5 @@ enum rockchip_bootrom_cmd {
 	BROM_BOOT_ENTER_DNL,      /* have BROM enter download-mode */
 };
 
-void back_to_bootrom(void);
+void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
 #endif
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index 7b9b307a89..e369fdc25a 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -15,12 +15,12 @@
  */
 static jmp_buf brom_ctx __section(".data");
 
-void back_to_bootrom(void)
+void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd)
 {
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 	puts("Returning to boot ROM...\n");
 #endif
-	longjmp(brom_ctx, BROM_BOOT_NEXTSTAGE);
+	longjmp(brom_ctx, brom_cmd);
 }
 
 /*
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 9458201bd3..550e3a1521 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -40,7 +40,7 @@ void board_init_f(ulong dummy)
 	sdram_init();
 
 	/* return to maskrom */
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 /* Place Holders */
diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c
index 5dcac90b52..03efe399e5 100644
--- a/arch/arm/mach-rockchip/rk3066-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3066-board-tpl.c
@@ -81,7 +81,7 @@ void board_init_f(ulong dummy)
 
 void board_return_to_bootrom(void)
 {
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 u32 spl_boot_device(void)
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
index 05d4ae682f..8e3b8ae3ba 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -158,7 +158,7 @@ void board_init_f(ulong dummy)
 
 	setup_arm_clock();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
 
@@ -219,7 +219,7 @@ void spl_board_init(void)
 
 	preloader_console_init();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 	return;
 
diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
index 5277dd6b9f..278e9d1d64 100644
--- a/arch/arm/mach-rockchip/rk322x-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c
@@ -76,6 +76,6 @@ void board_init_f(ulong dummy)
 	/* Disable the ddr secure region setting to make it non-secure */
 	rk_clrreg(SGRF_DDR_CON0, 0x4000);
 #if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6b7bf85d8d..6fa4909872 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -250,7 +250,7 @@ void board_init_f(ulong dummy)
 		return;
 	}
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 }
 
@@ -317,7 +317,7 @@ void spl_board_init(void)
 
 	preloader_console_init();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 	return;
 err:
diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
index 1c74ff29ea..0b8a0e16e4 100644
--- a/arch/arm/mach-rockchip/rk3328-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c
@@ -78,7 +78,7 @@ void board_debug_uart_init(void)
 
 void board_return_to_bootrom(void)
 {
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 u32 spl_boot_device(void)
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
index b3e6ffa781..60d5aeade9 100644
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ b/arch/arm/mach-rockchip/rk3368-board-tpl.c
@@ -148,7 +148,7 @@ void board_init_f(ulong dummy)
 
 void board_return_to_bootrom(void)
 {
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 }
 
 u32 spl_boot_device(void)
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index be3636f85b..cae09da0c6 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -161,7 +161,7 @@ void spl_board_init(void)
 
 	preloader_console_init();
 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-	back_to_bootrom();
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 #endif
 
 	return;

commit 3513fb1ea591c4d64d1da3f20fbacd3043e27943
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:14 2017 +0200

    UPSTREAM: rockchip: back-to-bootrom: replace assembly-implementation with C-code
    
    The back-to-bootrom implementation for Rockchip has always relied on
    the stack-pointer being valid on entry, so there was little reason to
    have this as an assembly implementation.
    
    This provides a new C-only implementation of save_boot_params and
    back_to_bootrom (relying on setjmp/longjmp) and removes the older
    assembly-only implementation.
    
    Change-Id: Ic20320dbbb71744386107686120475943442cdd7
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 92eb8783a3..9b0f6ade04 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -1,5 +1,6 @@
 /*
  * (C) Copyright 2017 Heiko Stuebner <heiko@sntech.de>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  *
  * SPDX-License-Identifier:	GPL-2.0
  */
@@ -14,14 +15,25 @@
 extern u32 SAVE_SP_ADDR;
 
 /**
- * Hand control back to the bootrom to load another
- * boot stage.
+ * back_to_bootrom() - return to bootrom (for TPL/SPL), passing a
+ *                     result code
+ *
+ * Transfer control back to the Rockchip BROM, restoring necessary
+ * register context and passing a command/result code to the BROM
+ * to instruct its next actions (e.g. continue boot sequence, enter
+ * download mode, ...).
+ *
+ * This function does not return.
  */
-void back_to_bootrom(void);
+enum rockchip_bootrom_cmd {
+	/*
+	* These can not start at 0, as 0 has a special meaning
+	* for setjmp().
+	*/
 
-/**
- * Assembler component for the above (do not call this directly)
- */
-void _back_to_bootrom_s(void);
+	BROM_BOOT_NEXTSTAGE = 1,  /* continue boot-sequence */
+	BROM_BOOT_ENTER_DNL,      /* have BROM enter download-mode */
+};
 
+void back_to_bootrom(void);
 #endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ba1bbab017..9b408ba674 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -8,8 +8,8 @@
 # this may have entered from ATF with the stack-pointer pointing to
 # inaccessible/protected memory (and the bootrom-helper assumes that
 # the stack-pointer is valid before switching to the U-Boot stack).
-obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
-obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
+obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
+obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index 8380e4e006..7b9b307a89 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -6,11 +6,61 @@
 
 #include <common.h>
 #include <asm/arch/bootrom.h>
+#include <asm/setjmp.h>
+#include <asm/system.h>
+
+/*
+ * Force the jmp_buf to the data-section, as .bss will not be valid
+ * when save_boot_params is invoked.
+ */
+static jmp_buf brom_ctx __section(".data");
 
 void back_to_bootrom(void)
 {
 #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
 	puts("Returning to boot ROM...\n");
 #endif
-	_back_to_bootrom_s();
+	longjmp(brom_ctx, BROM_BOOT_NEXTSTAGE);
+}
+
+/*
+ * All Rockchip BROM implementations enter with a valid stack-pointer,
+ * so this can safely be implemented in C (providing a single
+ * implementation both for ARMv7 and AArch64).
+ */
+int save_boot_params(void)
+{
+	int  ret = setjmp(brom_ctx);
+
+	switch (ret) {
+	case 0:
+		/*
+		 * This is the initial pass through this function
+		 * (i.e. saving the context), setjmp just setup up the
+		 * brom_ctx: transfer back into the startup-code at
+		 * 'save_boot_params_ret' and let the compiler know
+		 * that this will not return.
+		 */
+		save_boot_params_ret();
+		while (true)
+			/* does not return */;
+		break;
+
+	case BROM_BOOT_NEXTSTAGE:
+		/*
+		 * To instruct the BROM to boot the next stage, we
+		 * need to return 0 to it: i.e. we need to rewrite
+		 * the return code once more.
+		 */
+		ret = 0;
+		break;
+
+	default:
+#if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT)
+		puts("FATAL: unexpected command to back_to_bootrom()\n");
+#endif
+		hang();
+	};
+
+	return ret;
 }
diff --git a/arch/arm/mach-rockchip/save_boot_param.S b/arch/arm/mach-rockchip/save_boot_param.S
deleted file mode 100644
index 50fce207a5..0000000000
--- a/arch/arm/mach-rockchip/save_boot_param.S
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <linux/linkage.h>
-
-#if defined(CONFIG_ARM64)
-.globl	SAVE_SP_ADDR
-SAVE_SP_ADDR:
-	.quad 0
-
-ENTRY(save_boot_params)
-	sub	sp, sp, #0x60
-	stp	x29, x30, [sp, #0x50]
-	stp	x27, x28, [sp, #0x40]
-	stp	x25, x26, [sp, #0x30]
-	stp	x23, x24, [sp, #0x20]
-	stp	x21, x22, [sp, #0x10]
-	stp	x19, x20, [sp, #0]
-	ldr	x8, =SAVE_SP_ADDR
-	mov	x9, sp
-	str	x9, [x8]
-	b	save_boot_params_ret  /* back to my caller */
-ENDPROC(save_boot_params)
-
-.globl _back_to_bootrom_s
-ENTRY(_back_to_bootrom_s)
-	ldr	x0, =SAVE_SP_ADDR
-	ldr	x0, [x0]
-	mov	sp, x0
-	ldp	x29, x30, [sp, #0x50]
-	ldp	x27, x28, [sp, #0x40]
-	ldp	x25, x26, [sp, #0x30]
-	ldp	x23, x24, [sp, #0x20]
-	ldp	x21, x22, [sp, #0x10]
-	ldp	x19, x20, [sp]
-	add	sp, sp, #0x60
-	mov	x0, xzr
-	ret
-ENDPROC(_back_to_bootrom_s)
-#else
-.globl	SAVE_SP_ADDR
-SAVE_SP_ADDR:
-	.word 0
-
-/*
- * void save_boot_params
- *
- * Save sp, lr, r1~r12
- */
-ENTRY(save_boot_params)
-	push	{r1-r12, lr}
-	ldr	r0, =SAVE_SP_ADDR
-	str	sp, [r0]
-	b	save_boot_params_ret		@ back to my caller
-ENDPROC(save_boot_params)
-
-
-.globl _back_to_bootrom_s
-ENTRY(_back_to_bootrom_s)
-	ldr	r0, =SAVE_SP_ADDR
-	ldr	sp, [r0]
-	mov	r0, #0
-	pop	{r1-r12, pc}
-ENDPROC(_back_to_bootrom_s)
-#endif

commit 885cc66f31834683d956a7c82e6e6d783a363d00
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:15 2017 +0200

    UPSTREAM: rockchip: rk3188: use boot0 hook to load up SPL in 2 steps
    
    For the RK3188, the BROM will attempt to load up the first stage
    image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
    in the SRAM and then the remainder to offset 0xc00 in the SRAM.
    It always enters at 0x804, though.
    
    With this changeset, the RK3188 boot removes the TPL (stub) stage and
    builds a single SPL binary that utilizes the early back-to-bootrom via
    the boot0-hook.
    
    Consequently, the passing of the saved boot params via pmu->os_reg[2]
    is also removed.
    
    Change-Id: I1ced867bbf232db323cf7be95cc6653bc3b50ea6
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3a4e788342..ea58b24e05 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -43,7 +43,7 @@ config ROCKCHIP_RK3188
 	select SUPPORT_SPL
 	select SUPPORT_TPL
 	select SPL
-	select TPL
+	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
 	select BOARD_LATE_INIT
 	select ROCKCHIP_BROM_HELPER
 	help
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 814b641506..ba1bbab017 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -12,7 +12,6 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
-obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
index d3866bf029..05d4ae682f 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -101,7 +101,6 @@ static int setup_arm_clock(void)
 void board_init_f(ulong dummy)
 {
 	struct udevice *pinctrl, *dev;
-	struct rk3188_pmu *pmu;
 	int ret;
 
 	/* Example code showing how to enable the debug UART on RK3188 */
@@ -145,15 +144,6 @@ void board_init_f(ulong dummy)
 		return;
 	}
 
-	/*
-	 * Recover the bootrom's stackpointer.
-	 * For whatever reason needs to run after rockchip_get_clk.
-	 */
-	pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
-	if (IS_ERR(pmu))
-		error("pmu syscon returned %ld\n", PTR_ERR(pmu));
-	SAVE_SP_ADDR = readl(&pmu->sys_reg[2]);
-
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
 		debug("Pinctrl init failed: %d\n", ret);
diff --git a/arch/arm/mach-rockchip/rk3188-board-tpl.c b/arch/arm/mach-rockchip/rk3188-board-tpl.c
deleted file mode 100644
index b458ef6ea8..0000000000
--- a/arch/arm/mach-rockchip/rk3188-board-tpl.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/pmu_rk3188.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* track how often we were entered */
-static int rk3188_num_entries __attribute__ ((section(".data")));
-
-#define PMU_BASE	0x20004000
-#define SPL_ENTRY	0x10080C00
-
-static void jump_to_spl(void)
-{
-	typedef void __noreturn (*image_entry_noargs_t)(void);
-
-	struct rk3188_pmu * const pmu = (void *)PMU_BASE;
-	image_entry_noargs_t tpl_entry =
-		(image_entry_noargs_t)(unsigned long)SPL_ENTRY;
-
-	/* Store the SAVE_SP_ADDR in a location shared with SPL. */
-	writel(SAVE_SP_ADDR, &pmu->sys_reg[2]);
-	tpl_entry();
-}
-
-void board_init_f(ulong dummy)
-{
-	/* Example code showing how to enable the debug UART on RK3188 */
-#ifdef EARLY_UART
-#include <asm/arch/grf_rk3188.h>
-	/* Enable early UART on the RK3188 */
-#define GRF_BASE	0x20008000
-	struct rk3188_grf * const grf = (void *)GRF_BASE;
-
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK << GPIO1B1_SHIFT |
-		     GPIO1B0_MASK << GPIO1B0_SHIFT,
-		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
-		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-
-	printch('t');
-	printch('p');
-	printch('l');
-	printch('-');
-	printch(rk3188_num_entries + 1 + '0');
-	printch('\n');
-#endif
-
-	rk3188_num_entries++;
-
-	if (rk3188_num_entries == 1) {
-		/*
-		 * The original loader did some very basic integrity
-		 * checking at this point, but the remaining few bytes
-		 * could be used for any improvement making sense
-		 * really early on.
-		 */
-
-		back_to_bootrom();
-	} else {
-		/*
-		 * TPL part of the loader should now wait for us
-		 * at offset 0xC00 in the sram. Should never return
-		 * from there.
-		 */
-		jump_to_spl();
-	}
-}
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 07cc727e98..2fc6ed0200 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -158,17 +158,17 @@ described above, but the image creation needs a bit more care.
 
 The bootrom of rk3188 expects to find a small 1kb loader which returns
 control to the bootrom, after which it will load the real loader, which
-can then be up to 29kb in size and does the regular ddr init.
+can then be up to 29kb in size and does the regular ddr init.  This is
+handled by a single image (built as the SPL stage) that tests whether
+it is handled for the first or second time via code executed from the
+boot0-hook.
 
 Additionally the rk3188 requires everything the bootrom loads to be
 rc4-encrypted. Except for the very first stage the bootrom always reads
 and decodes 2kb pages, so files should be sized accordingly.
 
 # copy tpl, pad to 1020 bytes and append spl
-cat tpl/u-boot-tpl.bin > tplspl.bin
-truncate -s 1020 tplspl.bin
-cat spl/u-boot-spl.bin >> tplspl.bin
-tools/mkimage -n rk3188 -T rksd -d tplspl.bin out
+tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
 
 # truncate, encode and append u-boot.bin
 truncate -s %2048 u-boot.bin
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 7bd67e9ef5..e8ce801984 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -36,14 +36,9 @@
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(0x8000 - 0x800)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK31"
 
-#ifdef CONFIG_TPL_BUILD
-#define CONFIG_SPL_TEXT_BASE		0x10080804
-/* tpl size 1kb - 4byte RK31 header */
-#define CONFIG_SPL_MAX_SIZE		(0x400 - 0x4)
-#elif defined(CONFIG_SPL_BUILD)
-/* spl size 32kb sram - 2kb bootrom - 1kb spl */
-#define CONFIG_SPL_MAX_SIZE		(0x8000 - 0xC00)
-#define CONFIG_SPL_TEXT_BASE		0x10080C00
+#define CONFIG_SPL_TEXT_BASE		0x10080800
+/* spl size 32kb sram - 2kb bootrom */
+#define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x800)
 #define CONFIG_SPL_FRAMEWORK		1
 #define CONFIG_SPL_CLK			1
 #define CONFIG_SPL_PINCTRL		1
@@ -52,7 +47,6 @@
 #define CONFIG_SPL_RAM			1
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT	1
 #define CONFIG_ROCKCHIP_SERIAL		1
-#endif
 
 #define CONFIG_SPL_STACK		0x10087fff
 

commit c1da286a086ecbd7b2ee6837047dcc5707cf985f
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:13 2017 +0200

    UPSTREAM: arm: provide a PCS-compliant setjmp implementation
    
    The previous setjmp-implementation (as a static inline function that
    contained an 'asm volatile' sequence) was extremely fragile: (some
    versions of) GCC optimised the set of registers.  One critical example
    was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
    supplied.
    
    To increase robustness and ensure PCS-compliant behaviour, the setjmp
    and longjmp implementation are now in assembly and closely match what
    one would expect to find in a libc implementation.
    
    Change-Id: I9403d28218f03cdf84b1e8cbd4d3d4eef790e9b9
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/setjmp.h b/arch/arm/include/asm/setjmp.h
index c3399a7e15..517beebdea 100644
--- a/arch/arm/include/asm/setjmp.h
+++ b/arch/arm/include/asm/setjmp.h
@@ -1,6 +1,6 @@
 /*
- * (C) Copyright 2016
- * Alexander Graf <agraf@suse.de>
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ * (C) Copyright 2016 Alexander Graf <agraf@suse.de>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -8,89 +8,21 @@
 #ifndef _SETJMP_H_
 #define _SETJMP_H_	1
 
+/*
+ * This really should be opaque, but the EFI implementation wrongly
+ * assumes that a 'struct jmp_buf_data' is defined.
+ */
 struct jmp_buf_data {
-	ulong target;
-	ulong regs[5];
-	int ret;
-};
-
-typedef struct jmp_buf_data jmp_buf[1];
-
-static inline int setjmp(jmp_buf jmp)
-{
-	jmp->ret = 0;
-
-#ifdef CONFIG_ARM64
-	asm volatile(
-		"adr x1, jmp_target\n"
-		"str x1, %0\n"
-		"stp x26, x27, %1\n"
-		"stp x28, x29, %2\n"
-		"mov x1, sp\n"
-		"str x1, %3\n"
-		"jmp_target: "
-		: "=m" (jmp->target), "=m" (jmp->regs[0]),
-		  "=m" (jmp->regs[2]), "=m" (jmp->regs[4])
-		:
-		: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
-		  "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
-		  "x16", "x17", "x18", "x19", "x20", "x21", "x22",
-		  "x23", "x24", "x25", /* x26, x27, x28, x29, sp */
-		  "x30", "cc", "memory");
-#else
-	asm volatile(
-#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
-		".align 2\n"
-		"adr r0, jmp_target\n"
-		"add r0, r0, $1\n"
+#if defined(__aarch64__)
+	u64  regs[13];
 #else
-		"adr r0, jmp_target\n"
-#endif
-		"mov r1, %0\n"
-		"mov r2, sp\n"
-		"stm r1!, {r0, r2, r4, r5, r6, r7}\n"
-		".align 2\n"
-		"jmp_target: \n"
-		:
-		: "l" (&jmp->target)
-		: "r0", "r1", "r2", "r3", /* "r4", "r5", "r6", "r7", */
-		  "r8", "r9", "r10", "r11", /* sp, */ "ip", "lr",
-		  "cc", "memory");
-#endif
-
-	return jmp->ret;
-}
-
-static inline __noreturn void longjmp(jmp_buf jmp, int ret)
-{
-	jmp->ret = ret;
-
-#ifdef CONFIG_ARM64
-	asm volatile(
-		"ldr x0, %0\n"
-		"ldr x1, %3\n"
-		"mov sp, x1\n"
-		"ldp x26, x27, %1\n"
-		"ldp x28, x25, %2\n"
-		"mov x29, x25\n"
-		"br x0\n"
-		:
-		: "m" (jmp->target), "m" (jmp->regs[0]), "m" (jmp->regs[2]),
-		  "m" (jmp->regs[4])
-		: "x0", "x1", "x25", "x26", "x27", "x28");
-#else
-	asm volatile(
-		"mov r1, %0\n"
-		"ldm r1!, {r0, r2, r4, r5, r6, r7}\n"
-		"mov sp, r2\n"
-		"bx r0\n"
-		:
-		: "l" (&jmp->target)
-		: "r1");
+	u32  regs[10];  /* r4-r9, sl, fp, sp, lr */
 #endif
+};
 
-	while (1) { }
-}
+typedef struct jmp_buf_data jmp_buf[1];
 
+int setjmp(jmp_buf jmp);
+void longjmp(jmp_buf jmp, int ret);
 
 #endif /* _SETJMP_H_ */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 6e1c436933..abffa10c85 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -17,6 +17,12 @@ else
 obj-y	+= vectors.o crt0.o
 endif
 
+ifdef CONFIG_ARM64
+obj-y   += setjmp_aarch64.o
+else
+obj-y   += setjmp.o
+endif
+
 ifndef CONFIG_SPL_BUILD
 ifdef CONFIG_ARM64
 obj-y	+= relocate_64.o
diff --git a/arch/arm/lib/setjmp.S b/arch/arm/lib/setjmp.S
new file mode 100644
index 0000000000..6746e5e2cc
--- /dev/null
+++ b/arch/arm/lib/setjmp.S
@@ -0,0 +1,37 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/assembler.h>
+#include <linux/linkage.h>
+
+.pushsection .text.setjmp, "ax"
+ENTRY(setjmp)
+	/*
+	 * A subroutine must preserve the contents of the registers
+	 * r4-r8, r10, r11 (v1-v5, v7 and v8) and SP (and r9 in PCS
+	 * variants that designate r9 as v6).
+	 */
+	mov  ip, sp
+	stm  a1, {v1-v8, ip, lr}
+	mov  a1, #0
+	bx   lr
+ENDPROC(setjmp)
+.popsection
+
+.pushsection .text.longjmp, "ax"
+ENTRY(longjmp)
+	ldm  a1, {v1-v8, ip, lr}
+	mov  sp, ip
+	mov  a1, a2
+	/* If we were passed a return value of zero, return one instead */
+	cmp  a1, #0
+	bne  1f
+	mov  a1, #1
+1:
+	bx   lr
+ENDPROC(longjmp)
+.popsection
diff --git a/arch/arm/lib/setjmp_aarch64.S b/arch/arm/lib/setjmp_aarch64.S
new file mode 100644
index 0000000000..b68edb86d6
--- /dev/null
+++ b/arch/arm/lib/setjmp_aarch64.S
@@ -0,0 +1,42 @@
+/*
+ * (C) 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <asm/macro.h>
+#include <linux/linkage.h>
+
+.pushsection .text.setjmp, "ax"
+ENTRY(setjmp)
+	/* Preserve all callee-saved registers and the SP */
+	stp  x19, x20, [x0,#0]
+	stp  x21, x22, [x0,#16]
+	stp  x23, x24, [x0,#32]
+	stp  x25, x26, [x0,#48]
+	stp  x27, x28, [x0,#64]
+	stp  x29, x30, [x0,#80]
+	mov  x2, sp
+	str  x2, [x0, #96]
+	mov  x0, #0
+	ret
+ENDPROC(setjmp)
+.popsection
+
+.pushsection .text.longjmp, "ax"
+ENTRY(longjmp)
+	ldp  x19, x20, [x0,#0]
+	ldp  x21, x22, [x0,#16]
+	ldp  x23, x24, [x0,#32]
+	ldp  x25, x26, [x0,#48]
+	ldp  x27, x28, [x0,#64]
+	ldp  x29, x30, [x0,#80]
+	ldr  x2, [x0,#96]
+	mov  sp, x2
+	/* Move the return value in place, but return 1 if passed 0. */
+	adds x0, xzr, x1
+	csinc x0, x0, xzr, ne
+	ret
+ENDPROC(longjmp)
+.popsection

commit b04bb64b8ff963f472e54a2b0aae7f26be17eca2
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:12 2017 +0200

    UPSTREAM: arm: mark save_boot_params_ret as a function
    
    As no '.type' was set for save_boot_params_ret in start.S, binutils
    did not track whether it was emitted as A32 or T32.  By properly
    marking save_boot_params_ret as a potential function entry, we can
    make sure that the compiler will insert the appropriate instructions
    for branching to save_boot_params_ret both for call-sites emitted as
    A32 and T32.
    
    Change-Id: I51807d61cd8655853f672ab0baeae641b16a0493
    Reported-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 7b84a7a0f1..95a0b5224b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -31,6 +31,7 @@
 
 	.globl	reset
 	.globl	save_boot_params_ret
+	.type   save_boot_params_ret,%function
 #ifdef CONFIG_ARMV7_LPAE
 	.global	switch_to_hypervisor_ret
 #endif

commit b13b818cb6b4665022ac998f2a6a292708690a34
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:11 2017 +0200

    UPSTREAM: arm: make save_boot_params_ret prototype visible for AArch64
    
    The save_boot_params_ret() prototype (for those of us, that have a
    valid SP on entry and can implement save_boot_params() in C), was
    previously only defined for !defined(CONFIG_ARM64).
    
    This moves the declaration to a common block to ensure the prototype
    is available to everyone that might need it.
    
    Change-Id: Ic4c217ba9a3e6ded2106c75fec315351c925d639
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 79bd19af7d..e2af2969e0 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -332,37 +332,6 @@ void psci_arch_init(void);
 
 #ifndef __ASSEMBLY__
 
-/**
- * save_boot_params() - Save boot parameters before starting reset sequence
- *
- * If you provide this function it will be called immediately U-Boot starts,
- * both for SPL and U-Boot proper.
- *
- * All registers are unchanged from U-Boot entry. No registers need be
- * preserved.
- *
- * This is not a normal C function. There is no stack. Return by branching to
- * save_boot_params_ret.
- *
- * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3);
- */
-
-/**
- * save_boot_params_ret() - Return from save_boot_params()
- *
- * If you provide save_boot_params(), then you should jump back to this
- * function when done. Try to preserve all registers.
- *
- * If your implementation of save_boot_params() is in C then it is acceptable
- * to simply call save_boot_params_ret() at the end of your function. Since
- * there is no link register set up, you cannot just exit the function. U-Boot
- * will return to the (initialised) value of lr, and likely crash/hang.
- *
- * If your implementation of save_boot_params() is in assembler then you
- * should use 'b' or 'bx' to return to save_boot_params_ret.
- */
-void save_boot_params_ret(void);
-
 #ifdef CONFIG_ARMV7_LPAE
 void switch_to_hypervisor_ret(void);
 #endif
@@ -555,6 +524,37 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop);
 #endif /* CONFIG_ARM64 */
 
 #ifndef __ASSEMBLY__
+/**
+ * save_boot_params() - Save boot parameters before starting reset sequence
+ *
+ * If you provide this function it will be called immediately U-Boot starts,
+ * both for SPL and U-Boot proper.
+ *
+ * All registers are unchanged from U-Boot entry. No registers need be
+ * preserved.
+ *
+ * This is not a normal C function. There is no stack. Return by branching to
+ * save_boot_params_ret.
+ *
+ * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3);
+ */
+
+/**
+ * save_boot_params_ret() - Return from save_boot_params()
+ *
+ * If you provide save_boot_params(), then you should jump back to this
+ * function when done. Try to preserve all registers.
+ *
+ * If your implementation of save_boot_params() is in C then it is acceptable
+ * to simply call save_boot_params_ret() at the end of your function. Since
+ * there is no link register set up, you cannot just exit the function. U-Boot
+ * will return to the (initialised) value of lr, and likely crash/hang.
+ *
+ * If your implementation of save_boot_params() is in assembler then you
+ * should use 'b' or 'bx' to return to save_boot_params_ret.
+ */
+void save_boot_params_ret(void);
+
 /**
  * Change the cache settings for a region.
  *

commit dff737c455661368aa97eb8d242ddb80da34e081
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:10 2017 +0200

    UPSTREAM: rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM
    
    Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
    from NAND into SRAM and executes it. Then, following a return to bootrom, the
    BROM loads additional code to SRAM (not overwriting the first block read) and
    reenters at the same address as the first time.
    
    To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
    this model of having to count entries, this commit adds code to the boot0
    hook to track the number of entries and handle them accordingly.
    
    Change-Id: Ib7c0e9fc517ff7c040ba948ea4a570538d623760
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Tested-by: Andy Yan <andy.yan@rock-chips.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index f7c614669c..af3a733e98 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -19,12 +19,25 @@
 	 * beginning of the executable.	 However, as we want to keep
 	 * this generic and make it applicable to builds that are like
 	 * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no
-	 * TPL, but extra space needed in the SPL), we simply repeat
-	 * the 'b reset' with the expectation that the first one will
-	 * be overwritten, if this is the first stage contained in the
-	 * final image created with mkimage)...
+	 * TPL, but extra space needed in the SPL), we simply insert
+	 * a branch-to-next-instruction-word with the expectation that
+	 * the first one may be overwritten, if this is the first stage
+	 * contained in the final image created with mkimage)...
 	 */
-	b reset	 /* may be overwritten --- should be 'nop' or a 'b reset' */
+	b 1f	 /* if overwritten, entry-address is at the next word */
+1:
+#endif
+#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
+	adr     r3, entry_counter
+	ldr	r0, [r3]
+	cmp	r0, #1           /* check if entry_counter == 1 */
+	beq	reset            /* regular bootup */
+	add     r0, #1
+	str	r0, [r3]         /* increment the entry_counter in memory */
+	mov     r0, #0           /* return 0 to the BROM to signal 'OK' */
+	bx	lr               /* return control to the BROM */
+entry_counter:
+	.word   0
 #endif
 	b reset
 #if !defined(CONFIG_ARM64)
@@ -32,7 +45,7 @@
 	 * For armv7, the addr '_start' will used as vector start address
 	 * and write to VBAR register, which needs to aligned to 0x20.
 	 */
-	.align(5)
+	.align(5), 0x0
 _start:
 	ARM_VECTORS
 #endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 34d1606d3b..3a4e788342 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -224,6 +224,34 @@ config ROCKCHIP_SPL_RESERVE_IRAM
 config ROCKCHIP_BROM_HELPER
 	bool
 
+config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
+        bool "SPL requires early-return (for RK3188-style BROM) to BROM"
+	depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
+	help
+	  Some Rockchip BROM variants (e.g. on the RK3188) load the
+	  first stage in segments and enter multiple times. E.g. on
+	  the RK3188, the first 1KB of the first stage are loaded
+	  first and entered; after returning to the BROM, the
+	  remainder of the first stage is loaded, but the BROM
+	  re-enters at the same address/to the same code as previously.
+
+	  This enables support code in the BOOT0 hook for the SPL stage
+	  to allow multiple entries.
+
+config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
+        bool "TPL requires early-return (for RK3188-style BROM) to BROM"
+	depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
+	help
+	  Some Rockchip BROM variants (e.g. on the RK3188) load the
+	  first stage in segments and enter multiple times. E.g. on
+	  the RK3188, the first 1KB of the first stage are loaded
+	  first and entered; after returning to the BROM, the
+	  remainder of the first stage is loaded, but the BROM
+	  re-enters at the same address/to the same code as previously.
+
+	  This enables support code in the BOOT0 hook for the TPL stage
+	  to allow multiple entries.
+
 config SPL_MMC_SUPPORT
 	default y if !SPL_ROCKCHIP_BACK_TO_BROM
 

commit d2d9d8243e00415d3726b95b9d2d136849fd908d
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:09 2017 +0200

    UPSTREAM: bcm281xx: boot0 hook: adjust to unified boot0 semantics
    
    This updates the BCM281xx boot0-hook to the updated boot0 semantics
    by emitting _start and the vector table before the boot0 hook (as
    was the case before).
    
    Change-Id: Ia176a1b26c2275500855e699010ed73443c7b251
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-bcm281xx/boot0.h b/arch/arm/include/asm/arch-bcm281xx/boot0.h
index a747bd3823..28f05ba32d 100644
--- a/arch/arm/include/asm/arch-bcm281xx/boot0.h
+++ b/arch/arm/include/asm/arch-bcm281xx/boot0.h
@@ -5,5 +5,7 @@
  */
 
 /* BOOT0 header information */
+_start:
+	ARM_VECTORS
 	.word	0xbabeface
 	.word	_end - _start

commit 05b25c8bf30a77beb555abb8f65e78bd2f21b5de
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:08 2017 +0200

    UPSTREAM: bcm235xx: boot0 hook: adjust to unified boot0 semantics
    
    This updates the BCM235xx boot0-hook to the updated boot0 semantics
    by emitting _start and the vector table before the boot0 hook (as
    was the case before).
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    
    Version-changes: 5
    - ran 'whitespace-cleanup'
    
    Change-Id: I415c48016ce1aa5592a180f16f6f4d83227e9d38
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-bcm235xx/boot0.h b/arch/arm/include/asm/arch-bcm235xx/boot0.h
index a747bd3823..28f05ba32d 100644
--- a/arch/arm/include/asm/arch-bcm235xx/boot0.h
+++ b/arch/arm/include/asm/arch-bcm235xx/boot0.h
@@ -5,5 +5,7 @@
  */
 
 /* BOOT0 header information */
+_start:
+	ARM_VECTORS
 	.word	0xbabeface
 	.word	_end - _start

commit c0f2ab29ad948eb70cf9983b447944e95765329b
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:07 2017 +0200

    UPSTREAM: socfpga: boot0 hook: adjust to unified boot0 semantics
    
    With the updated boot0 semantics (i.e. giving the boot0-hook control
    over when and where the vector table is emitted), the boot0-hook for
    the socfpga needs to be adjusted.
    
    Change-Id: Ie970d3cffb39c60003810dd862ee86e26b22f6f4
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
index 22d9e7f7af..d6b9435d33 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -7,6 +7,9 @@
 #ifndef __BOOT0_H
 #define __BOOT0_H
 
+_start:
+	ARM_VECTORS
+
 #ifdef CONFIG_SPL_BUILD
 	.balignl 64,0xf33db33f;
 

commit cf883384376395106cfba2982ff10d45a5d259c7
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:06 2017 +0200

    UPSTREAM: rockchip: rk3036: use aligned address for SPL_TEXT_BASE
    
    With the boot0-hook inserting the additional padding to receive our
    SPL magic, the SPL_TEXT_BASE can be aligned again.
    
    Change-Id: I938b95ff1ab639047bf86cd975900a2242cd4ac2
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 4ed8f5a6c7..3a2bf339b1 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -25,7 +25,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 #define CONFIG_SPL_STACK		0x10081fff
-#define CONFIG_SPL_TEXT_BASE		0x10081004
+#define CONFIG_SPL_TEXT_BASE		0x10081000
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(4 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK30"

commit 24c5e2fff9f6b97078216aae3f00184f5570a3c6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 16:21:05 2017 +0200

    UPSTREAM: rockchip: rk3288: use aligned address for SPL_TEXT_BASE
    
    After we use boot0 hook, we can use offset '000' instead of '004' as
    SPL_TEXT_BASE.
    
    Change-Id: Ic29be8ee07382b641865281041e25aa8a8a61333
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    [Updated tag in commit summary:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 707febecbb..b0e7c80529 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -31,7 +31,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x00100000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
 #define CONFIG_SPL_STACK		0xff718000
-#define CONFIG_SPL_TEXT_BASE		0xff704004
+#define CONFIG_SPL_TEXT_BASE		0xff704000
 
 #define GICD_BASE			0xffc01000
 #define GICC_BASE			0xffc02000

commit 6bd5a2c444a54b1708cf43f0eca7e3e41701febc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 16:21:04 2017 +0200

    UPSTREAM: rockchip: mkimage: use spl_boot0 for all Rockchip SoCs
    
    Enable the spl_boot0 in SPL and use the pre-padding TAG memory,
    the mkimage do not need to pad it but only need to replace the value
    with correct TAG value.
    
    Change-Id: I5ae7b402c9958774acd9eac95e9417c48854c035
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 8c18e0567c..e72111028f 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -45,7 +45,7 @@ struct header0_info {
 };
 
 /**
- * struct header1_info
+ * struct header1 info
  */
 struct header1_info {
 	uint32_t magic;
@@ -72,16 +72,16 @@ struct spl_info {
 };
 
 static struct spl_info spl_infos[] = {
-	{ "rk3036", "RK30", 0x1000, false, false },
+	{ "rk3036", "RK30", 0x1000, false, true },
 	{ "rk3066", "RK30", 0x8000, true, false },
-	{ "rk3128", "RK31", 0x1800, false, false },
-	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
-	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
-	{ "rk3288", "RK32", 0x8000, false, false },
+	{ "rk3128", "RK31", 0x1800, false, true },
+	{ "rk3188", "RK31", 0x8000 - 0x800, true, true },
+	{ "rk322x", "RK32", 0x8000 - 0x1000, false, true },
+	{ "rk3288", "RK32", 0x8000, false, true },
 	{ "rk3328", "RK32", 0x8000 - 0x1000, false, true },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false, true },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
-	{ "rv1108", "RK11", 0x1800, false, false},
+	{ "rv1108", "RK11", 0x1800, false, true },
 };
 
 static unsigned char rc4_key[16] = {

commit 947101c3a47e1a56240f4418475ff9eeb1d39047
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:03 2017 +0200

    FROMLIST: rockchip: enable boot0-hook for all Rockchip SoCs
    
    Rockchip SoCs bootrom design is like this:
    - First 2KB or 4KB internal memory is for bootrom stack and heap;
    - Then the first 4-byte suppose to be a TAG like 'RK33';
    - The the following memory address end with '0004' is the first
      instruction load and running by bootrom;
    
    Let's use the boot0 hook to reserve the first 4-byte tag for all
    the Rockchip SoCs.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems>
    [Commit message:]
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    
    Change-Id: I2d3fbb1b3c1a5986c8c789cb3730b8c51596323a
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 194394ec4f..e9504b2f30 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1113,6 +1113,7 @@ config ARCH_ROCKCHIP
 	select DM_PWM
 	select DM_REGULATOR
 	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
+	select ENABLE_ARM_SOC_BOOT0_HOOK
 	imply CMD_FASTBOOT
 	imply FASTBOOT
 	imply FAT_WRITE
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 98ab2b4c77..34d1606d3b 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -103,7 +103,6 @@ config ROCKCHIP_RK3328
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
 	imply SPL_SEPARATE_BSS
-	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select SYS_NS16550
 	help
@@ -139,7 +138,6 @@ config ROCKCHIP_RK3368
 	imply SPL_SEPARATE_BSS
 	imply SPL_SERIAL_SUPPORT
 	imply TPL_SERIAL_SUPPORT
-	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select SYS_NS16550
 	select GICV2
@@ -178,7 +176,6 @@ config ROCKCHIP_RK3399
 	select SPL_SEPARATE_BSS
 	select SPL_SERIAL_SUPPORT
 	select SPL_DRIVERS_MISC_SUPPORT
-	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select GICV3
 	help

commit 5577f8545fd4b8b9671fcd67b4f2cc093eed63db
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 16:21:02 2017 +0200

    FROMLIST: rockchip: boot0: align to 0x20 for armv7 '_start'
    
    The '_start' is using as vector table base address, and will write
    to VBAR register, so it needs to be aligned to 0x20 for armv7.
    
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    [Updated to current code base:]
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    
    Change-Id: If3c151e7071f8d9556827bb05cfd38892b1c17f3
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 455d8428d8..f7c614669c 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -6,12 +6,13 @@
 
 /*
  * Execution starts on the instruction following this 4-byte header
- * (containing the magic 'RK33').
+ * (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33').  This
+ * magic constant will be written into the final image by the rkimage
+ * tool, but we need to reserve space for it here.
  *
  * To make life easier for everyone, we build the SPL binary with
  * space for this 4-byte header already included in the binary.
  */
-
 #ifdef CONFIG_SPL_BUILD
 	/*
 	 * We need to add 4 bytes of space for the 'RK33' at the
@@ -26,6 +27,15 @@
 	b reset	 /* may be overwritten --- should be 'nop' or a 'b reset' */
 #endif
 	b reset
+#if !defined(CONFIG_ARM64)
+	/*
+	 * For armv7, the addr '_start' will used as vector start address
+	 * and write to VBAR register, which needs to aligned to 0x20.
+	 */
+	.align(5)
+_start:
+	ARM_VECTORS
+#endif
 
 #if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
 	.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM	/* space for the ATF data */

commit 733d51d5a7b2cc3e474f4230ed87302b14b826a9
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Tue Oct 10 16:21:01 2017 +0200

    FROMLIST: arm: boot0 hook: move boot0 hook before '_start'
    
    The boot0 hook on ARM does not insert its payload before the vector
    table. This is both a mismatch with thec comment above it and
    contradict usage of the boot0 hook on ARM64.
    
    To fix this (and unify the semantics for ARM and ARM64), we change the
    boot0-hook semantics on ARM to match those on ARM64:
      (1) if a boot0-hook is present it is inserted at the start of
          the image
      (2) if a boot0-hook is present, emitting the ARM vector table
          (and the _start) symbol are suppressed in vectors.S and
          the boot0-hook has full control over where and when it
          wants to emit these
    
    Change-Id: Ibd3b7c18a6a32f90372d315659f68511d92ca648
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 72d264bcbe..455d8428d8 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -1,4 +1,3 @@
-
 /*
  * Copyright 2017 Theobroma Systems Design und Consulting GmbH
  *
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index d25cf4585c..7079641213 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -15,6 +15,22 @@
 
 #include <config.h>
 
+/*
+ * A macro to allow insertion of an ARM exception vector either
+ * for the non-boot0 case or by a boot0-header.
+ */
+        .macro ARM_VECTORS
+	b	reset
+	ldr	pc, _undefined_instruction
+	ldr	pc, _software_interrupt
+	ldr	pc, _prefetch_abort
+	ldr	pc, _data_abort
+	ldr	pc, _not_used
+	ldr	pc, _irq
+	ldr	pc, _fiq
+	.endm
+
+
 /*
  *************************************************************************
  *
@@ -35,6 +51,23 @@
 
 	.section ".vectors", "ax"
 
+#if defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
+/*
+ * Various SoCs need something special and SoC-specific up front in
+ * order to boot, allow them to set that in their boot0.h file and then
+ * use it here.
+ *
+ * To allow a boot0 hook to insert a 'special' sequence after the vector
+ * table (e.g. for the socfpga), the presence of a boot0 hook supresses
+ * the below vector table and assumes that the vector table is filled in
+ * by the boot0 hook.  The requirements for a boot0 hook thus are:
+ *   (1) defines '_start:' as appropriate
+ *   (2) inserts the vector table using ARM_VECTORS as appropriate
+ */
+#include <asm/arch/boot0.h>
+
+#else
+
 /*
  *************************************************************************
  *
@@ -46,28 +79,11 @@
  */
 
 _start:
-
 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
 	.word	CONFIG_SYS_DV_NOR_BOOT_CFG
 #endif
-
-	b	reset
-	ldr	pc, _undefined_instruction
-	ldr	pc, _software_interrupt
-	ldr	pc, _prefetch_abort
-	ldr	pc, _data_abort
-	ldr	pc, _not_used
-	ldr	pc, _irq
-	ldr	pc, _fiq
-
-#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK
-/*
- * Various SoCs need something special and SoC-specific up front in
- * order to boot, allow them to set that in their boot0.h file and then
- * use it here.
- */
-#include <asm/arch/boot0.h>
-#endif
+	ARM_VECTORS
+#endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */
 
 /*
  *************************************************************************

commit ed2668e8cfc65555be33f0bd4635869129ebc49b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:55:43 2017 +0800

    rockchip: rk3066: add defconfig for rk3066-evb
    
    Change-Id: Ia6ed2885c0bd3200691405d0b25720b3f281a755
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3066_defconfig b/configs/evb-rk3066_defconfig
new file mode 100644
index 0000000000..b512094db5
--- /dev/null
+++ b/configs/evb-rk3066_defconfig
@@ -0,0 +1,118 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3066=y
+CONFIG_TARGET_MK808_RK3066=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3066a-evb"
+CONFIG_CMD_REGULATOR=y
+CONFIG_CLK=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_RAM=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_SYS_NS16550=y
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_BOOTDELAY=1
+CONFIG_CONSOLE_MUX=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_CACHE=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SYSRESET=y
+CONFIG_CMD_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_MMC=y
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_EFI_PARTITION is not set
+CONFIG_CMD_BOOTEFI is not set
+CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_EFI_LOADER is not set
+CONFIG_CMD_GPIO=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_GENERIC=y
+CONFIG_PINCTRL_ROCKCHIP_RK3066=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0x20064000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_CMD_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
+CONFIG_USB_GADGET_VBUS_DRAW=500 
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x300a
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_NAND=y
+CONFIG_DFU_NAND=y
+CONFIG_USB_FUNCTION_DFU=y
+CONFIG_DFU_RAM=y
+CONFIG_CMD_DFU=y
+CONFIG_SPL_BLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_DFU_RAM=y
+CONFIG_SPL_DFU_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_RAM=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x70000000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMCPY is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
+# CONFIG_SPL_SIMPLE_BUS is not set
+# CONFIG_SPL_PINCTRL_FULL is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+# CONFIG_SPL_BOARD_INIT is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_CLK=y
+CONFIG_TPL_DM=y
+CONFIG_TPL_DM_SERIAL=y
+# CONFIG_TPL_DRIVERS_MISC_SUPPORT is not set
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_TPL_RAM=y
+CONFIG_TPL_REGMAP=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SYSCON=y
+CONFIG_TPL_TINY_MEMSET=y

commit 07c36383992614f42a23ba2ec450e0c52f88dd90
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:55:27 2017 +0800

    rockchip: rk3066: add evb dts
    
    Change-Id: Iac9c8eba309e9d76debf61137ef7e31edf943ea7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3066a-evb.dts b/arch/arm/dts/rk3066a-evb.dts
new file mode 100644
index 0000000000..dc48edc517
--- /dev/null
+++ b/arch/arm/dts/rk3066a-evb.dts
@@ -0,0 +1,193 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include "rk3066a.dtsi"
+
+/ {
+	model = "Rockchip RK3066a Evaluation board";
+	compatible = "rockchip,rk3066-evb", "rockchip,rk3066a";
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
+
+	memory@60000000 {
+		reg = <0x60000000 0x40000000>;
+		device_type = "memory";
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "mk808:blue:power";
+			gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			linux,default-trigger = "default-on";
+		};
+	};
+
+	vcc_io: vcc-io {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_io";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc_host: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&host_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "host-pwr";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_otg: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&otg_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "vcc_otg";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_sd: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+		pinctrl-0 = <&sdmmc_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_wifi: sdio-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&wifi_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+};
+
+&dmc {
+	compatible = "rockchip,rk3066-dmc", "syscon";
+	rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
+		0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
+		0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
+		0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
+		0x4 0x0>;
+	rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
+		0x220 0x40 0x0 0x0>;
+	rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
+};
+
+&emmc {
+	status = "okay";
+};
+
+&mmc0 {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	num-slots = <1>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
+&mmc1 {
+	bus-width = <4>;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
+	pinctrl-names = "default";
+	vmmc-supply = <&vcc_wifi>;
+	status = "okay";
+};
+
+&nandc {
+	u-boot,dm-spl;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <40>;
+		nand-ecc-step-size = <1024>;
+		rockchip,protect-bootrom-blocks;
+	};
+};
+
+&pinctrl {
+	usb-host {
+		host_drv: host-drv {
+			rockchip,pins = <RK_GPIO0 6 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	usb-otg {
+		otg_drv: otg-drv {
+			rockchip,pins = <RK_GPIO0 5 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <RK_GPIO3 7 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdio {
+		wifi_pwr: wifi-pwr {
+			rockchip,pins = <RK_GPIO3 24 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};

commit 95b9017fdc6e1eb246645f1a8e026b1608b621a9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:32:30 2017 +0800

    rockchip: dts: rk3066: fix mmc frequency and order
    
    U-Boot using 'mmc0 = &emmc' to assign the mmc number.
    'max-frequency' is needed for mmc probe.
    
    Change-Id: I7d163558004019f6897ae4c503b0c2a0d0d905c3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3xxx.dtsi b/arch/arm/dts/rk3xxx.dtsi
index d1c205b589..35c2b15980 100644
--- a/arch/arm/dts/rk3xxx.dtsi
+++ b/arch/arm/dts/rk3xxx.dtsi
@@ -19,9 +19,9 @@
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
-		mshc0 = &emmc;
-		mshc1 = &mmc0;
-		mshc2 = &mmc1;
+		mmc0 = &emmc;
+		mmc1 = &mmc0;
+		mmc2 = &mmc1;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -188,6 +188,7 @@
 	mmc0: dwmmc@10214000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10214000 0x1000>;
+		max-frequency = <37500000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
 		clock-names = "biu", "ciu";
@@ -198,6 +199,7 @@
 	mmc1: dwmmc@10218000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10218000 0x1000>;
+		max-frequency = <37500000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
 		clock-names = "biu", "ciu";
@@ -208,6 +210,7 @@
 	emmc: dwmmc@1021c000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x1021c000 0x1000>;
+		max-frequency = <37500000>;
 		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
 		clock-names = "biu", "ciu";

commit 337e8c3e6ab86cfcd2e9e165e9e2d88ea8d9d210
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:15:56 2017 +0200

    mmc: dw_mmc: rockchip: add support for rk3066 sdmmc
    
    This patch enables support for the Rockchip RK3066 SD/MMC controller,
    which is based on Designware IP. The device supports SD, SDIO, MMC and eMMC.
    
    Change-Id: I3724634928c5e2a8c0b187f953081e8e0faa3ec0
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 4e607bfec4..250e6c8833 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -294,6 +294,7 @@ static int rockchip_dwmmc_bind(struct udevice *dev)
 
 static const struct udevice_id rockchip_dwmmc_ids[] = {
 	{ .compatible = "rockchip,rk3288-dw-mshc" },
+	{ .compatible = "rockchip,rk2928-dw-mshc" },
 	{ }
 };
 

commit 39abf9c1e9e8da96605fbd2bb0ab43fbac75abcd
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:15:40 2017 +0200

    mmc: dw_mmc: support transfer mode autodetection
    
    dw_mmc supports two transfer modes in u-boot: idma and fifo.
    This patch adds autodetection of transfer mode and eliminates setting this in host config struct
    
    Change-Id: I0eafb78c3fd171827664e320b8959f3c5e27094a
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index cae88ac08e..1603f15f07 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -574,6 +574,7 @@ static int dwmci_set_ios(struct mmc *mmc)
 static int dwmci_init(struct mmc *mmc)
 {
 	struct dwmci_host *host = mmc->priv;
+	uint32_t use_dma;
 
 	if (host->board_init)
 		host->board_init(host);
@@ -585,6 +586,13 @@ static int dwmci_init(struct mmc *mmc)
 		return -EIO;
 	}
 
+	use_dma = SDMMC_GET_TRANS_MODE(dwmci_readl(host, DWMCI_HCON));
+	if (use_dma == DMA_INTERFACE_IDMA) {
+		host->fifo_mode = 0;
+	} else {
+		host->fifo_mode = 1;
+	}
+
 	/* Enumerate at 400KHz */
 	dwmci_setup_bus(host, mmc->cfg->f_min);
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 9edbdf65c5..2003f40b60 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -115,6 +115,10 @@
 #define RX_WMARK_SHIFT		16
 #define RX_WMARK_MASK		(0xfff << RX_WMARK_SHIFT)
 
+/* HCON Register */
+#define DMA_INTERFACE_IDMA		(0x0)
+#define SDMMC_GET_TRANS_MODE(x)		(((x)>>16) & 0x3)
+
 #define DWMCI_IDMAC_OWN		(1 << 31)
 #define DWMCI_IDMAC_CH		(1 << 4)
 #define DWMCI_IDMAC_FS		(1 << 3)

commit b9370edc3d75f5f5a0e59f8e46afb5d4b9432324
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:45 2017 +0200

    rockchip: board: rk3066: convert board_usb_init to live tree functions
    
    Use live tree functions to fill dwc2_plat_otg_data structure in board_usb_init.
    
    Change-Id: Iea1055a77e7f42ec65627bc82ad5a7924910e9b0
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
index 8fa06a2525..2b96eb2d41 100644
--- a/arch/arm/mach-rockchip/rk3066-board.c
+++ b/arch/arm/mach-rockchip/rk3066-board.c
@@ -90,55 +90,17 @@ static struct dwc2_plat_otg_data rk3066_otg_data = {
 
 int board_usb_init(int index, enum usb_init_type init)
 {
-	int node, phy_node;
-	const char *mode;
-	bool matched = false;
-	const void *blob = gd->fdt_blob;
-	u32 grf_phy_offset;
-
-	/* find the usb_otg node */
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3066-usb");
-
-	while (node > 0) {
-		mode = fdt_getprop(blob, node, "dr_mode", NULL);
-		if (mode && strcmp(mode, "otg") == 0) {
-			matched = true;
-			break;
-		}
-
-		node = fdt_node_offset_by_compatible(blob, node,
-					"rockchip,rk3066-usb");
-	}
-	if (!matched) {
-		debug("Not found usb_otg device\n");
-		return -ENODEV;
-	}
-	rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+	ofnode otg_node;
+	u32 reg;
 
-	node = fdtdec_lookup_phandle(blob, node, "phys");
-	if (node <= 0) {
-		debug("Not found usb phy device\n");
+	otg_node = ofnode_path("/usb@10180000");
+	if (!ofnode_valid(otg_node)) {
+		debug("Not found usb otg device\n");
 		return -ENODEV;
 	}
 
-	phy_node = fdt_parent_offset(blob, node);
-	if (phy_node <= 0) {
-		debug("Not found usb phy device\n");
-		return -ENODEV;
-	}
-
-	rk3066_otg_data.phy_of_node = phy_node;
-	grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
-
-	node = fdt_node_offset_by_compatible(blob, -1,
-					"rockchip,rk3066-grf");
-	if (node <= 0) {
-		debug("Not found grf device\n");
-		return -ENODEV;
-	}
-	rk3066_otg_data.regs_phy = grf_phy_offset +
-				fdtdec_get_addr(blob, node, "reg");
+	ofnode_read_u32(otg_node, "reg", &reg);
+	rk3066_otg_data.regs_otg = reg;
 
 	return dwc2_udc_probe(&rk3066_otg_data);
 }

commit b2dae9bd9403401d39334379a6dcd91daa8a92d8
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:26 2017 +0200

    rockchip: rk3066: add mk808 board files
    
    mk808 is a tv stick with two usb ports, micro sd card slot, hdmi and
    nand onboard.
    
    Change-Id: I317c516f2023eec59c46195dd8280684137f977c
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fcf0f71e5a..378e43e097 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
+	rk3066a-mk808.dtb \
 	rk3126-evb.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts
new file mode 100644
index 0000000000..0a452d7006
--- /dev/null
+++ b/arch/arm/dts/rk3066a-mk808.dts
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+ or X11
+ */
+
+/dts-v1/;
+#include "rk3066a.dtsi"
+
+/ {
+	model = "Rikomagic MK808";
+	compatible = "rikomagic,mk808", "rockchip,rk3066a";
+
+	chosen {
+		stdout-path = "serial2:115200n8";
+	};
+
+	memory@60000000 {
+		reg = <0x60000000 0x40000000>;
+		device_type = "memory";
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		blue {
+			label = "mk808:blue:power";
+			gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+			linux,default-trigger = "default-on";
+		};
+	};
+
+	vcc_io: vcc-io {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_io";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc_host: usb-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&host_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "host-pwr";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_otg: usb-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&otg_drv>;
+		pinctrl-names = "default";
+		regulator-always-on;
+		regulator-name = "vcc_otg";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_sd: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio3 7 GPIO_ACTIVE_LOW>;
+		pinctrl-0 = <&sdmmc_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_wifi: sdio-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&wifi_pwr>;
+		pinctrl-names = "default";
+		regulator-name = "vcc_wifi";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		vin-supply = <&vcc_io>;
+	};
+};
+
+&dmc {
+	compatible = "rockchip,rk3066-dmc", "syscon";
+	rockchip,pctl-timing = <0x12c 0xc8 0x1f4 0x1e 0x4e 0x4 0x69 0x6
+		0x3 0x0 0x6 0x5 0xc 0x10 0x6 0x4
+		0x4 0x5 0x4 0x200 0x3 0xa 0x40 0x0
+		0x1 0x5 0x5 0x3 0xc 0x1e 0x100 0x0
+		0x4 0x0>;
+	rockchip,phy-timing = <0x208c6690 0x690878 0x10022a00
+		0x220 0x40 0x0 0x0>;
+	rockchip,sdram-params = <0x24716310 0 2 300000000 3 9 0>;
+};
+
+&mmc0 {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	num-slots = <1>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
+&mmc1 {
+	bus-width = <4>;
+	disable-wp;
+	non-removable;
+	num-slots = <1>;
+	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
+	pinctrl-names = "default";
+	vmmc-supply = <&vcc_wifi>;
+	status = "okay";
+};
+
+&nandc {
+	u-boot,dm-spl;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand@0 {
+		u-boot,dm-spl;
+		reg = <0>;
+		nand-ecc-mode = "hw_syndrome";
+		nand-ecc-strength = <40>;
+		nand-ecc-step-size = <1024>;
+		rockchip,protect-bootrom-blocks;
+	};
+};
+
+&pinctrl {
+	usb-host {
+		host_drv: host-drv {
+			rockchip,pins = <RK_GPIO0 6 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	usb-otg {
+		otg_drv: otg-drv {
+			rockchip,pins = <RK_GPIO0 5 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <RK_GPIO3 7 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
+	sdio {
+		wifi_pwr: wifi-pwr {
+			rockchip,pins = <RK_GPIO3 24 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&uart2 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&usbphy {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig
index 89a48d2951..b5277fe53f 100644
--- a/arch/arm/mach-rockchip/rk3066/Kconfig
+++ b/arch/arm/mach-rockchip/rk3066/Kconfig
@@ -26,4 +26,6 @@ config TPL_LIBCOMMON_SUPPORT
 config TPL_LIBGENERIC_SUPPORT
         default y
 
+source "board/rikomagic/mk808_rk3066/Kconfig"
+
 endif
diff --git a/board/rikomagic/mk808_rk3066/Kconfig b/board/rikomagic/mk808_rk3066/Kconfig
new file mode 100644
index 0000000000..0da0a17542
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_MK808_RK3066
+
+config SYS_BOARD
+	default "mk808_rk3066"
+
+config SYS_VENDOR
+	default "rikomagic"
+
+config SYS_CONFIG_NAME
+	default "mk808_rk3066"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rikomagic/mk808_rk3066/MAINTAINERS b/board/rikomagic/mk808_rk3066/MAINTAINERS
new file mode 100644
index 0000000000..65b5cbdc24
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/MAINTAINERS
@@ -0,0 +1,6 @@
+MK808
+M:	Paweł Jarosz <paweljarosz3691@gmail.com>
+S:	Maintained
+F:	include/configs/mk808_rk3066.h
+F:	configs/mk808-rk3066_defconfig
+F:	board/rikomagic/mk808_rk3066
diff --git a/board/rikomagic/mk808_rk3066/Makefile b/board/rikomagic/mk808_rk3066/Makefile
new file mode 100644
index 0000000000..ef5ba56c4f
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2017 Paweł‚ Jarosz <paweljarosz3691@gmail.com>
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-y	+= mk808_rk3066.o
diff --git a/board/rikomagic/mk808_rk3066/mk808_rk3066.c b/board/rikomagic/mk808_rk3066/mk808_rk3066.c
new file mode 100644
index 0000000000..e5d66fe729
--- /dev/null
+++ b/board/rikomagic/mk808_rk3066/mk808_rk3066.c
@@ -0,0 +1,10 @@
+/*
+ * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
new file mode 100644
index 0000000000..b37532d973
--- /dev/null
+++ b/configs/mk808_defconfig
@@ -0,0 +1,117 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3066=y
+CONFIG_TARGET_MK808_RK3066=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808"
+CONFIG_CMD_REGULATOR=y
+CONFIG_CLK=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_RAM=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
+CONFIG_SYS_NS16550=y
+CONFIG_BOOTDELAY=1
+CONFIG_CONSOLE_MUX=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_CACHE=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SYSRESET=y
+CONFIG_CMD_MMC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_DM_MMC=y
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_EFI_PARTITION is not set
+CONFIG_CMD_BOOTEFI is not set
+CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+CONFIG_EFI_LOADER is not set
+CONFIG_CMD_GPIO=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_GENERIC=y
+CONFIG_PINCTRL_ROCKCHIP_RK3066=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0x20064000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_CMD_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY=y
+CONFIG_USB_GADGET_VBUS_DRAW=500 
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x300a
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_MTD_DEVICE=y
+CONFIG_NAND_ROCKCHIP=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_NAND=y
+CONFIG_DFU_NAND=y
+CONFIG_USB_FUNCTION_DFU=y
+CONFIG_DFU_RAM=y
+CONFIG_CMD_DFU=y
+CONFIG_SPL_BLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_DFU_RAM=y
+CONFIG_SPL_DFU_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_RAM=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_ADDR=0x70000000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMCPY is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
+# CONFIG_SPL_SIMPLE_BUS is not set
+# CONFIG_SPL_PINCTRL_FULL is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+# CONFIG_SPL_BOARD_INIT is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+# CONFIG_SPL_MMC_SUPPORT is not set
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_CLK=y
+CONFIG_TPL_DM=y
+CONFIG_TPL_DM_SERIAL=y
+# CONFIG_TPL_DRIVERS_MISC_SUPPORT is not set
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_TPL_RAM=y
+CONFIG_TPL_REGMAP=y
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SYSCON=y
+CONFIG_TPL_TINY_MEMSET=y
diff --git a/include/configs/mk808_rk3066.h b/include/configs/mk808_rk3066.h
new file mode 100644
index 0000000000..d6b1fc813a
--- /dev/null
+++ b/include/configs/mk808_rk3066.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+/*
+ * Using bootrom layout for rockchip-idb* and spl*. Size is nand erase size.
+ */
+#define MTDPARTS_DEFAULT \
+		"mtdparts=rockchip-nand.0:" \
+			"4M(idb)," \
+			"4M(idb.backup)," \
+			"4M(spl)," \
+			"4M(spl.backup1)," \
+			"4M(spl.backup2)," \
+			"4M(spl.backup3)," \
+			"4M(spl.backup4)," \
+			"4M(u-boot)," \
+			"4M(u-boot.backup)," \
+			"4M(u-boot-env)," \
+			"4M(u-boot-env.backup)," \
+			"16M(kernel)," \
+			"32M(initrd)," \
+			"-(rootfs)"
+
+#define DFU_ALT_INFO_NAND \
+		"idb raw 0x0 0x400000;" \
+		"idb.backup raw 0x400000 0x400000;" \
+		"spl raw 0x800000 0x400000;" \
+		"spl.backup1 raw 0xC00000 0x400000;" \
+		"spl.backup2 raw 0x1000000 0x400000;" \
+		"spl.backup3 raw 0x1400000 0x400000;" \
+		"spl.backup4 raw 0x1800000 0x400000;" \
+		"u-boot raw 0x1C00000 0x400000;" \
+		"u-boot.backup raw 0x2000000 0x400000;" \
+		"u-boot-env raw 0x2400000 0x400000;" \
+		"u-boot-env.backup raw 0x2800000 0x400000;" \
+		"kernel raw 0x2C00000 0x1000000;" \
+		"initrd raw 0x3C00000 0x2000000"
+
+#define DFU_ALT_INFO_RAM \
+	"tpl.bin ram 0x10080C00 0x10000;" \
+	"spl.bin ram 0x60000000 0x40000;" \
+	"u-boot.bin ram 0x60408000 0x80000"
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+	"mtdparts=" MTDPARTS_DEFAULT "\0" \
+	"dfu_alt_info=" DFU_ALT_INFO_NAND "\0" \
+	"dfu_alt_info_ram=" DFU_ALT_INFO_RAM "\0"
+
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE		SZ_4M
+#define CONFIG_SYS_NAND_U_BOOT_OFFS		0x01c00000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND	0x02000000
+
+#include <configs/rk3066_common.h>
+
+#endif
+

commit ca3cef26db1792e7dd9a538b61010072d5994d01
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:58 2017 +0200

    ARM: dts: rockchip: prefer u-boot, dm-pre-reloc rather than u-boot, dm-spl
    
    rk3xxx.dtsi is used by rk3188 and rk3066. rk3188 uses alocated data in spl but rk3066 needs it in tpl.
    
    Change-Id: I6e3ca3d45a6764421e441eba24e68ad7b8bec745
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3xxx.dtsi b/arch/arm/dts/rk3xxx.dtsi
index 6d9e36d235..d1c205b589 100644
--- a/arch/arm/dts/rk3xxx.dtsi
+++ b/arch/arm/dts/rk3xxx.dtsi
@@ -135,7 +135,7 @@
 	};
 
 	noc: syscon@10128000 {
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3188-noc", "syscon";
 		reg = <0x10128000 0x2000>;
 	};
@@ -218,13 +218,13 @@
 	pmu: pmu@20004000 {
 		compatible = "rockchip,rk3066-pmu", "syscon";
 		reg = <0x20004000 0x100>;
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 	};
 
 	grf: grf@20008000 {
 		compatible = "syscon";
 		reg = <0x20008000 0x200>;
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 	};
 
 	dmc: dmc@20020000 {
@@ -238,7 +238,7 @@
 		       0x20040000 0x294>;
 		clocks = <&cru PCLK_DDRUPCTL>, <&cru PCLK_PUBL>;
 		clock-names = "pclk_ddrupctl", "pclk_publ";
-		u-boot,dm-spl;
+		u-boot,dm-pre-reloc;
 	};
 
 	i2c0: i2c@2002d000 {

commit 907f97732fc211f3f09aaf0b09be5a4858f50f0d
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:16:54 2017 +0200

    mtd: nand: spl: allow build nand_bbt, nand_ids and nand_util
    
    This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers that need it.
    
    Change-Id: I20beea9442a13bce926a5a2be24e3e2a69cf1b2d
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index f5d191dd1c..6067b89837 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -18,6 +18,9 @@ obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
 obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
 obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
 obj-$(CONFIG_SPL_NAND_INIT) += nand.o
+obj-$(CONFIG_SPL_NAND_BBT) += nand_bbt.o
+obj-$(CONFIG_SPL_NAND_IDS) += nand_ids.o
+obj-$(CONFIG_SPL_NAND_UTIL) += nand_util.o
 ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
 obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
 endif

commit 200006a30c30614226b04047ebcec8305f2b4e20
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:16:39 2017 +0200

    dfu: fix spl build
    
    In current state dfu depends on cmd/mtdparts.c which isn't build in SPL.
    This patch resolves it by cutting out unwanted code in SPL build.
    
    Change-Id: I7b25d3991d2b4e3a4c50b90fa6cac760472650b2
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 6dc9ff7aea..23dfc8e519 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -192,8 +192,9 @@ unsigned int dfu_polltimeout_nand(struct dfu_entity *dfu)
 int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s)
 {
 	char *st;
+#ifndef CONFIG_SPL_BUILD
 	int ret, dev, part;
-
+#endif
 	dfu->data.nand.ubi = 0;
 	dfu->dev_type = DFU_DEV_NAND;
 	st = strsep(&s, " ");
@@ -203,6 +204,7 @@ int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s)
 		s++;
 		dfu->data.nand.size = simple_strtoul(s, &s, 16);
 	} else if ((!strcmp(st, "part")) || (!strcmp(st, "partubi"))) {
+#ifndef CONFIG_SPL_BUILD
 		char mtd_id[32];
 		struct mtd_device *mtd_dev;
 		u8 part_num;
@@ -229,6 +231,7 @@ int dfu_fill_entity_nand(struct dfu_entity *dfu, char *devstr, char *s)
 		dfu->data.nand.size = pi->size;
 		if (!strcmp(st, "partubi"))
 			dfu->data.nand.ubi = 1;
+#endif
 	} else {
 		printf("%s: Memory layout (%s) not supported!\n", __func__, st);
 		return -1;

commit 6f14746b0c5977b93f126c43b2a80198758399b9
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:30 2017 +0200

    rockchip: mkimage: add support for rockchip nand boot image
    
    The Rockchip boot ROM requires a particular file format for booting from NAND:
    
    * It starts with 512-byte, rc4 encoded header and is aligned to nand page size
    
    * Then first 2KB of first stage loader (tpl) aligned to nand page size
    * n empty pages
    
    * second 2KB of first stage loader (tpl) aligned to nand page size
    * n empty pages
    
    * ...
    
    * first 2KB of second stage loader (spl) aligned to nand page size
    * n empty pages
    
    * second 2KB of first stage loader (spl) aligned to nand page size
    * n empty pages
    
    * ...
    
    Size of spl and tpl must be aligned to 2KB.
    
    example usage for nand with page size 16384 and one empty page in iteration:
    
        # mkimage -n rk3066 -T rknand -d ./u-boot/tpl/u-boot-tpl.bin:./u-boot/spl/u-boot-spl.bin -X 16384,1 out
    
    Change-Id: Ie4ecb50637449251956a868272ce51ef489c7a1e
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/image.c b/common/image.c
index a058eb85e1..f5f6cd235b 100644
--- a/common/image.c
+++ b/common/image.c
@@ -167,6 +167,7 @@ static const table_entry_t uimage_type[] = {
 	{	IH_TYPE_FPGA,       "fpga",       "FPGA Image" },
 	{       IH_TYPE_TEE,        "tee",        "Trusted Execution Environment Image",},
 	{	IH_TYPE_FIRMWARE_IVT, "firmware_ivt", "Firmware with HABv4 IVT" },
+	{	IH_TYPE_RKNAND,     "rknand",     "Rockchip NAND Boot Image" },
 	{	-1,		    "",		  "",			},
 };
 
diff --git a/include/image.h b/include/image.h
index 1f4bfda2f3..10ff094709 100644
--- a/include/image.h
+++ b/include/image.h
@@ -269,6 +269,7 @@ enum {
 	IH_TYPE_VYBRIDIMAGE,	/* VYBRID .vyb Image */
 	IH_TYPE_TEE,            /* Trusted Execution Environment OS Image */
 	IH_TYPE_FIRMWARE_IVT,		/* Firmware Image with HABv4 IVT */
+	IH_TYPE_RKNAND,			/* Rockchip NAND Boot Image	*/
 
 	IH_TYPE_COUNT,			/* Number of image types */
 };
diff --git a/tools/Makefile b/tools/Makefile
index a0db19d6b0..8e1009bf6c 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -79,7 +79,7 @@ RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
 					rsa-sign.o rsa-verify.o rsa-checksum.o \
 					rsa-mod-exp.o)
 
-ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o
+ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rknand.o rksd.o rkspi.o
 
 # common objs for dumpimage and mkimage
 dumpimage-mkimage-objs := aisimage.o \
diff --git a/tools/imagetool.h b/tools/imagetool.h
index a8d505423b..0b2a707037 100644
--- a/tools/imagetool.h
+++ b/tools/imagetool.h
@@ -77,6 +77,7 @@ struct image_tool_params {
 	bool quiet;		/* Don't output text in normal operation */
 	unsigned int external_offset;	/* Add padding to external data */
 	const char *engine_id;	/* Engine to use for signing */
+	char *extraparams;	/* Extra parameters for img creation (-X) */
 };
 
 /*
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 28ff35e670..ffc91d2319 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -144,7 +144,7 @@ static void process_args(int argc, char **argv)
 	int opt;
 
 	while ((opt = getopt(argc, argv,
-			     "a:A:b:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qsT:vVx")) != -1) {
+			     "a:A:b:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qsT:vVxX:")) != -1) {
 		switch (opt) {
 		case 'a':
 			params.addr = strtoull(optarg, &ptr, 16);
@@ -279,6 +279,9 @@ static void process_args(int argc, char **argv)
 		case 'x':
 			params.xflag++;
 			break;
+		case 'X':
+			params.extraparams = optarg;
+			break;
 		default:
 			usage("Invalid option");
 		}
@@ -416,7 +419,8 @@ int main(int argc, char **argv)
 		exit (retval);
 	}
 
-	if ((params.type != IH_TYPE_MULTI) && (params.type != IH_TYPE_SCRIPT)) {
+	if ((params.type != IH_TYPE_MULTI) && (params.type != IH_TYPE_SCRIPT) &&
+	    (params.type != IH_TYPE_RKNAND)) {
 		dfd = open(params.datafile, O_RDONLY | O_BINARY);
 		if (dfd < 0) {
 			fprintf(stderr, "%s: Can't open %s: %s\n",
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 9fae9bc2c6..8c18e0567c 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -73,6 +73,7 @@ struct spl_info {
 
 static struct spl_info spl_infos[] = {
 	{ "rk3036", "RK30", 0x1000, false, false },
+	{ "rk3066", "RK30", 0x8000, true, false },
 	{ "rk3128", "RK31", 0x1800, false, false },
 	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
@@ -168,7 +169,7 @@ bool rkcommon_spl_is_boot0(struct image_tool_params *params)
 	return info->spl_boot0;
 }
 
-static void rkcommon_set_header0(void *buf, uint file_size,
+static void rkcommon_set_header0(void *buf, uint file_size, uint max_size,
 				 struct image_tool_params *params)
 {
 	struct header0_info *hdr = buf;
@@ -195,12 +196,13 @@ static void rkcommon_set_header0(void *buf, uint file_size,
 	 * see https://lists.denx.de/pipermail/u-boot/2017-May/293267.html
 	 * for a more detailed explanation by Andy Yan
 	 */
-	hdr->init_boot_size = hdr->init_size + RK_MAX_BOOT_SIZE / RK_BLK_SIZE;
+	hdr->init_boot_size = hdr->init_size + DIV_ROUND_UP(max_size, RK_BLK_SIZE);
+	hdr->init_boot_size = ROUND(hdr->init_boot_size, 4);
 
 	rc4_encode(buf, RK_BLK_SIZE, rc4_key);
 }
 
-int rkcommon_set_header(void *buf, uint file_size,
+int rkcommon_set_header(void *buf, uint file_size, uint max_size,
 			struct image_tool_params *params)
 {
 	struct header1_info *hdr = buf + RK_SPL_HDR_START;
@@ -208,7 +210,7 @@ int rkcommon_set_header(void *buf, uint file_size,
 	if (file_size > rkcommon_get_spl_size(params))
 		return -ENOSPC;
 
-	rkcommon_set_header0(buf, file_size, params);
+	rkcommon_set_header0(buf, file_size, max_size, params);
 
 	/* Set up the SPL name (i.e. copy spl_hdr over) */
 	memcpy(&hdr->magic, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE);
diff --git a/tools/rkcommon.h b/tools/rkcommon.h
index 8790f1ceab..cd357c71d0 100644
--- a/tools/rkcommon.h
+++ b/tools/rkcommon.h
@@ -44,6 +44,14 @@ const char *rkcommon_get_spl_hdr(struct image_tool_params *params);
  */
 int rkcommon_get_spl_size(struct image_tool_params *params);
 
+/**
+ * rkcommon_spl_is_boot0() - is magic included in spl
+ *
+ * Returns true if magic (for example RK30) is included in spl
+ */
+
+bool rkcommon_spl_is_boot0(struct image_tool_params *params);
+
 /**
  * rkcommon_set_header() - set up the header for a Rockchip boot image
  *
@@ -53,7 +61,7 @@ int rkcommon_get_spl_size(struct image_tool_params *params);
  * @file_size:	Size of the file we want the boot ROM to load, in bytes
  * @return 0 if OK, -ENOSPC if too large
  */
-int rkcommon_set_header(void *buf, uint file_size,
+int rkcommon_set_header(void *buf, uint file_size, uint max_size,
 			struct image_tool_params *params);
 
 /**
diff --git a/tools/rknand.c b/tools/rknand.c
new file mode 100644
index 0000000000..690af2de4b
--- /dev/null
+++ b/tools/rknand.c
@@ -0,0 +1,156 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include "imagetool.h"
+#include <image.h>
+#include <rc4.h>
+#include "mkimage.h"
+#include "rkcommon.h"
+
+enum {
+	RKNAND_SECT_LEN = RK_BLK_SIZE * 4,
+};
+
+struct rknand_info {
+	uint32_t pagesize;
+	uint32_t skippages;
+	uint32_t tplsize;
+	uint32_t splsize;
+	uint32_t tplpaddedsize;
+	uint32_t splpaddedsize;
+	uint32_t itersize;
+	uint32_t tplsplsize;
+	char *tplfile;
+	char *splfile;
+};
+
+struct rknand_info ninfo;
+
+static uint32_t rknand_get_file_size(char *filename)
+{
+	int dfd;
+	struct stat sbuf;
+
+	dfd = open(filename, O_RDONLY | O_BINARY);
+	if (dfd < 0) {
+		fprintf(stderr, "Can't open %s: %s\n", filename, strerror(errno));
+		exit(EXIT_FAILURE);
+	}
+
+	if (fstat(dfd, &sbuf) < 0) {
+		fprintf(stderr, "Can't stat %s: %s\n", filename, strerror(errno));
+		exit(EXIT_FAILURE);
+	}
+
+	close(dfd);
+
+	return sbuf.st_size;
+}
+
+static void rknand_fill_ninfo(struct image_tool_params *params)
+{
+	sscanf(params->extraparams, "%u,%u", &ninfo.pagesize, &ninfo.skippages);
+
+	ninfo.tplfile = params->datafile;
+	if ((ninfo.splfile = strchr(params->datafile, ':')) != NULL) {
+		*ninfo.splfile = '\0';
+		ninfo.splfile += 1;
+	}
+
+	ninfo.tplsize = rknand_get_file_size(ninfo.tplfile);
+	ninfo.splsize = rknand_get_file_size(ninfo.splfile);
+
+	ninfo.tplpaddedsize = ROUND(ninfo.tplsize + 
+		(rkcommon_spl_is_boot0(params) ? 0 : 4), RKNAND_SECT_LEN);
+
+	ninfo.splpaddedsize = ROUND(ninfo.splsize, RKNAND_SECT_LEN);
+
+	ninfo.itersize = ninfo.pagesize * (ninfo.skippages + 1);
+	ninfo.tplsplsize = ((ninfo.tplpaddedsize + ninfo.splpaddedsize) /
+		     RKNAND_SECT_LEN) * ninfo.itersize;
+}
+
+static void rknand_set_header(void *buf, struct stat *sbuf, int ifd,
+			     struct image_tool_params *params)
+{
+	int sector, sploffset, splfd, ret;
+
+	ret = rkcommon_set_header(buf, ninfo.tplsize, ninfo.splsize, params);
+	if (ret) {
+		printf("Warning: TPL image is too large (size %#x) and will "
+		       "not boot\n", ninfo.tplsize);
+	}
+
+	if ((splfd = open(ninfo.splfile, O_RDONLY | O_BINARY)) < 0) {
+		fprintf (stderr, "%s: Can't open %s: %s\n",
+			params->cmdname, ninfo.splfile, strerror(errno));
+		exit (EXIT_FAILURE);
+	}
+
+	sploffset = RKNAND_SECT_LEN + ninfo.tplpaddedsize;
+	if (read(splfd, buf + sploffset, ninfo.splsize) != ninfo.splsize) {
+		fprintf (stderr, "%s: Read error on %s: %s\n",
+			params->cmdname, ninfo.splfile, strerror(errno));
+		exit (EXIT_FAILURE);
+	}
+	close(splfd);
+
+	if (rkcommon_need_rc4_spl(params))
+		rkcommon_rc4_encode_spl(buf, sploffset, ninfo.splpaddedsize);
+
+	/*
+	 * Spread the image out so we only use the first 2KB of each pagesize
+	 * region. This is a feature of the NAND format required by the Rockchip
+	 * boot ROM.
+	 */
+	for (sector = ninfo.tplsplsize / ninfo.itersize - 1; sector >= 0; sector--) {
+		memmove(buf + sector * ninfo.itersize + ninfo.pagesize,
+			buf + (sector + 1) * RKNAND_SECT_LEN, RKNAND_SECT_LEN);
+
+		if (sector < (ninfo.tplsplsize / ninfo.itersize - 1))
+			memset(buf + sector * ninfo.itersize  + ninfo.pagesize +
+			       RKNAND_SECT_LEN, 0xFF, ninfo.itersize -
+			       RKNAND_SECT_LEN);
+	}
+	memset(buf + RKNAND_SECT_LEN, 0xFF, ninfo.pagesize - RKNAND_SECT_LEN);
+	memset(buf + ninfo.tplsplsize - ninfo.pagesize + RKNAND_SECT_LEN, 0xFF,
+	       ninfo.pagesize - RKNAND_SECT_LEN);
+}
+
+static int rknand_check_image_type(uint8_t type)
+{
+	if (type == IH_TYPE_RKNAND)
+		return EXIT_SUCCESS;
+	else
+		return EXIT_FAILURE;
+}
+
+static int rknand_vrec_header(struct image_tool_params *params,
+			     struct image_type_params *tparams)
+{
+	rknand_fill_ninfo(params);
+	rkcommon_vrec_header(params, tparams, RKNAND_SECT_LEN);
+
+	return ninfo.tplsplsize - tparams->header_size - ninfo.tplsize;
+}
+
+/*
+ * rknand parameters
+ */
+U_BOOT_IMAGE_TYPE(
+	rknand,
+	"Rockchip NAND Boot Image support",
+	0,
+	NULL,
+	rkcommon_check_params,
+	rkcommon_verify_header,
+	rkcommon_print_header,
+	rknand_set_header,
+	NULL,
+	rknand_check_image_type,
+	NULL,
+	rknand_vrec_header
+);
diff --git a/tools/rksd.c b/tools/rksd.c
index c56153d2ca..164c1fbcb7 100644
--- a/tools/rksd.c
+++ b/tools/rksd.c
@@ -26,7 +26,7 @@ static void rksd_set_header(void *buf,  struct stat *sbuf,  int ifd,
 	 * header).
 	 */
 	size = params->file_size - RK_SPL_HDR_START;
-	ret = rkcommon_set_header(buf, size, params);
+	ret = rkcommon_set_header(buf, size, RK_MAX_BOOT_SIZE, params);
 	if (ret) {
 		/* TODO(sjg@chromium.org): This method should return an error */
 		printf("Warning: SPL image is too large (size %#x) and will "
diff --git a/tools/rkspi.c b/tools/rkspi.c
index 4332ce1765..5005051d39 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -25,7 +25,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
 	int ret;
 
 	size = params->orig_file_size;
-	ret = rkcommon_set_header(buf, size, params);
+	ret = rkcommon_set_header(buf, size, RK_MAX_BOOT_SIZE, params);
 	debug("size %x\n", size);
 	if (ret) {
 		/* TODO(sjg@chromium.org): This method should return an error */

commit a3584243c99c9a2c2276ef4cef5ab2dd7306bc5b
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:14:09 2017 +0200

    mtd: nand: add the rockchip nand controller driver
    
    Add basic Rockchip nand driver.
    
    Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8 bit asynchronous flash interface support. Other features will come later.
    
    Change-Id: I8e766afe7358a2357d75cfe094c4cd6fe92bd281
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 85b26d6088..b43d86d050 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -76,6 +76,12 @@ config NAND_PXA3XX
 	  This enables the driver for the NAND flash device found on
 	  PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
 
+config NAND_ROCKCHIP
+	bool "Support for NAND on Rockchip SoCs"
+	select SYS_NAND_SELF_INIT
+	---help---
+	Enable support for Rockchip nand.
+
 config NAND_SUNXI
 	bool "Support for NAND on Allwinner SoCs"
 	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 9f7d9d6ff7..f5d191dd1c 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
 obj-$(CONFIG_NAND_PLAT) += nand_plat.o
 obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
 obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
+obj-$(CONFIG_NAND_ROCKCHIP) += rockchip_nand.o
 
 else  # minimal SPL drivers
 
diff --git a/drivers/mtd/nand/rockchip_nand.c b/drivers/mtd/nand/rockchip_nand.c
new file mode 100644
index 0000000000..d8f443972a
--- /dev/null
+++ b/drivers/mtd/nand/rockchip_nand.c
@@ -0,0 +1,660 @@
+/*
+ * Copyright (c) 2017 Yifeng Zhao <yifeng.zhao@rock-chips.com>
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <inttypes.h>
+#include <nand.h>
+#include <linux/kernel.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define NANDC_V6_BOOTROM_ECC	24
+#define	NANDC_V6_NUM_BANKS	8
+#define NANDC_V6_DEF_TIMEOUT	20000
+#define NANDC_V6_READ		0
+#define NANDC_V6_WRITE		1
+
+#define	NANDC_REG_V6_FMCTL	0x00
+#define	NANDC_REG_V6_FMWAIT	0x04
+#define	NANDC_REG_V6_FLCTL	0x08
+#define	NANDC_REG_V6_BCHCTL	0x0c
+#define	NANDC_REG_V6_DMA_CFG	0x10
+#define	NANDC_REG_V6_DMA_BUF0	0x14
+#define	NANDC_REG_V6_DMA_BUF1	0x18
+#define	NANDC_REG_V6_DMA_ST	0x1C
+#define	NANDC_REG_V6_BCHST	0x20
+#define	NANDC_REG_V6_RANDMZ	0x150
+#define	NANDC_REG_V6_VER	0x160
+#define	NANDC_REG_V6_INTEN	0x16C
+#define	NANDC_REG_V6_INTCLR 	0x170
+#define	NANDC_REG_V6_INTST	0x174
+#define	NANDC_REG_V6_SPARE0	0x200
+#define	NANDC_REG_V6_SPARE1	0x230
+#define	NANDC_REG_V6_BANK0	0x800
+#define	NANDC_REG_V6_SRAM0	0x1000
+#define	NANDC_REG_V6_SRAM_SIZE	0x400
+
+#define NANDC_REG_V6_DATA	0x00
+#define NANDC_REG_V6_ADDR	0x04
+#define NANDC_REG_V6_CMD	0x08
+
+/* FMCTL */
+#define NANDC_V6_FM_WP		BIT(8)
+#define NANDC_V6_FM_CE_SEL_M	0xFF
+#define NANDC_V6_FM_CE_SEL(x)	(1 << (x))
+#define NANDC_V6_FM_FREADY	BIT(9)
+
+/* FLCTL */
+#define NANDC_V6_FL_RST		BIT(0)
+#define NANDC_V6_FL_DIR_S	0x1
+#define NANDC_V6_FL_XFER_START	BIT(2)
+#define NANDC_V6_FL_XFER_EN	BIT(3)
+#define NANDC_V6_FL_ST_BUF_S	0x4
+#define NANDC_V6_FL_XFER_COUNT	BIT(5)
+#define NANDC_V6_FL_ACORRECT	BIT(10)
+#define NANDC_V6_FL_XFER_READY	BIT(20)
+
+/* BCHCTL */
+#define NAND_V6_BCH_REGION_S	0x5
+#define NAND_V6_BCH_REGION_M	0x7	
+
+/* BCHST */
+#define NANDC_V6_BCH0_ST_ERR	BIT(2)
+#define NANDC_V6_BCH1_ST_ERR	BIT(15)
+#define NANDC_V6_ECC_ERR_CNT0(x) ((((x & (0x1F << 3)) >> 3) \
+				| ((x & (1 << 27)) >> 22)) & 0x3F)
+#define NANDC_V6_ECC_ERR_CNT1(x) ((((x & (0x1F << 16)) >> 16) \
+				| ((x & (1 << 29)) >> 24)) & 0x3F)
+
+struct rk_nand {
+	uint32_t banks[NANDC_V6_NUM_BANKS];
+	struct nand_hw_control controller;
+	uint32_t ecc_strength;
+	struct mtd_info mtd;
+	bool bootromblocks;
+	void __iomem *regs;
+	int selected_bank;
+};
+
+static struct nand_ecclayout nand_oob_fix = {
+	.eccbytes = 24,
+	.eccpos = {
+		   4, 5, 6, 7, 8, 9, 10},
+	.oobfree = {
+		{.offset = 0,
+		 .length = 4} }
+};
+
+static inline struct rk_nand *to_rknand(struct nand_hw_control *ctrl)
+{
+	return container_of(ctrl, struct rk_nand, controller);
+}
+
+static void rockchip_nand_init(struct rk_nand *rknand)
+{
+	writel(0, rknand->regs + NANDC_REG_V6_RANDMZ);
+	writel(0, rknand->regs + NANDC_REG_V6_DMA_CFG);
+	writel(0, rknand->regs + NANDC_REG_V6_BCHCTL);
+	writel(NANDC_V6_FM_WP, rknand->regs + NANDC_REG_V6_FMCTL);
+	writel(0x1081, rknand->regs + NANDC_REG_V6_FMWAIT);
+}
+
+static void rockchip_nand_select_chip(struct mtd_info *mtd, int chipnr)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base;
+	uint32_t reg;
+	int banknr;
+
+	reg = readl(rknand->regs + NANDC_REG_V6_FMCTL);
+	reg &= ~NANDC_V6_FM_CE_SEL_M;
+
+	if (chipnr == -1) {
+		banknr = -1;
+	} else {
+		banknr = rknand->banks[chipnr];
+		bank_base = rknand->regs + NANDC_REG_V6_BANK0 + banknr * 0x100;
+
+		chip->IO_ADDR_R = bank_base;
+		chip->IO_ADDR_W = bank_base;
+
+		reg |= 1 << banknr;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V6_FMCTL);
+
+	rknand->selected_bank = banknr;
+}
+
+static void rockchip_nand_cmd_ctrl(struct mtd_info *mtd,
+				   int dat,
+				   unsigned int ctrl)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	if (ctrl & NAND_CTRL_CHANGE) {
+		if (ctrl & NAND_ALE)
+			bank_base += NANDC_REG_V6_ADDR;
+		else if (ctrl & NAND_CLE)
+			bank_base += NANDC_REG_V6_CMD;
+		chip->IO_ADDR_W = bank_base;
+	}
+
+	if (dat != NAND_CMD_NONE)
+		writeb(dat & 0xFF, chip->IO_ADDR_W);
+}
+
+static void rockchip_nand_read_buf(struct mtd_info *mtd,
+				   uint8_t *buf,
+				   int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		buf[offs] = readb(bank_base);
+}
+
+static void rockchip_nand_write_buf(struct mtd_info *mtd,
+				    const uint8_t *buf,
+				    int len)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	int offs = 0;
+	void __iomem *bank_base = rknand->regs + NANDC_REG_V6_BANK0
+				+ rknand->selected_bank * 0x100;
+
+	for (offs = 0; offs < len; offs++)
+		writeb(buf[offs], bank_base);
+}
+
+static uint8_t rockchip_nand_read_byte(struct mtd_info *mtd)
+{
+	uint8_t ret;
+
+	rockchip_nand_read_buf(mtd, &ret, 1);
+
+	return ret;
+}
+
+static int rockchip_nand_dev_ready(struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+
+	if (readl(rknand->regs + NANDC_REG_V6_FMCTL) & NANDC_V6_FM_FREADY)
+		return 1;
+
+	return 0;
+}
+
+static int rockchip_nand_hw_ecc_setup(struct mtd_info *mtd,
+				      struct nand_ecc_ctrl *ecc,
+				      uint32_t strength)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	u32 reg;
+
+	ecc->strength = strength;
+	ecc->bytes = DIV_ROUND_UP(ecc->strength * 14, 8);
+	ecc->bytes = ALIGN(ecc->bytes, 2);
+
+	switch (ecc->strength) {
+	case 60:
+		reg = 0x00040010;
+		break;
+	case 40:
+		reg = 0x00040000;
+		break;
+	case 24:
+		reg = 0x00000010;
+		break;
+	case 16:
+		reg = 0x00000000;
+		break;
+	default:
+		return -EINVAL;
+	}
+	writel(reg, rknand->regs + NANDC_REG_V6_BCHCTL);
+
+	return 0;
+}
+
+static void rockchip_nand_pio_xfer_start(struct rk_nand *rknand,
+					 u8 dir,
+					 u8 st_buf)
+{
+	u32 reg;
+
+	reg = readl(rknand->regs + NANDC_REG_V6_BCHCTL);
+	reg = (reg & (~(NAND_V6_BCH_REGION_M << NAND_V6_BCH_REGION_S))) |
+	      (rknand->selected_bank << NAND_V6_BCH_REGION_S);
+	writel(reg, rknand->regs + NANDC_REG_V6_BCHCTL);
+
+	reg = (dir << NANDC_V6_FL_DIR_S) | (st_buf << NANDC_V6_FL_ST_BUF_S) |
+	      NANDC_V6_FL_XFER_EN | NANDC_V6_FL_XFER_COUNT |
+	      NANDC_V6_FL_ACORRECT;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+
+	reg |= NANDC_V6_FL_XFER_START;
+	writel(reg, rknand->regs + NANDC_REG_V6_FLCTL);
+}
+
+static int rockchip_nand_wait_pio_xfer_done(struct rk_nand *rknand)
+{
+	int timeout = NANDC_V6_DEF_TIMEOUT;
+	int reg;
+
+	while (timeout--) {
+		reg = readl(rknand->regs + NANDC_REG_V6_FLCTL);
+
+		if ((reg & NANDC_V6_FL_XFER_READY) != 0)
+			break;
+
+		udelay(1);
+	}
+
+	if (timeout == 0)
+		return -1;
+
+	return 0;
+}
+
+static void rockchip_nand_read_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset + mtd->writesize, -1);
+
+	rockchip_nand_read_buf(mtd, oob + offset, len);
+}
+
+static void rockchip_nand_write_extra_oob(struct mtd_info *mtd, u8 *oob)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	int offset = ((ecc->bytes + ecc->prepad) * ecc->steps);
+	int len = mtd->oobsize - offset;
+
+	if (len <= 0)
+		return;
+
+	chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset + mtd->writesize, -1);
+
+	rockchip_nand_write_buf(mtd, oob + offset, len);
+}
+
+
+static int rockchip_nand_hw_syndrome_pio_read_page(struct mtd_info *mtd,
+						   struct nand_chip *chip,
+						   uint8_t *buf,
+						   int oob_required,
+						   int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V6_SRAM0;
+	unsigned int max_bitflips = 0;
+	int ret, step, bch_st;
+	int offset = page * mtd->writesize;
+
+	if (rknand->bootromblocks && (offset < (7 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V6_BOOTROM_ECC);
+
+	rockchip_nand_pio_xfer_start(rknand, NANDC_V6_READ, 0);
+
+	for (step = 0; step < ecc->steps; step++) {
+		int data_off = step * ecc->size;
+		int oob_off = step * (ecc->bytes + ecc->prepad);
+		u8 *data = buf + data_off;
+		u8 *oob = chip->oob_poi + oob_off;
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+
+		bch_st = readl(rknand->regs + NANDC_REG_V6_BCHST);
+
+		if (bch_st & NANDC_V6_BCH0_ST_ERR) {
+			mtd->ecc_stats.failed++;
+			max_bitflips = -1;
+		} else {
+			ret = NANDC_V6_ECC_ERR_CNT0(bch_st);
+			mtd->ecc_stats.corrected += ret;
+			max_bitflips = max_t(unsigned int, max_bitflips, ret);
+		}
+
+		if ((step + 1) < ecc->steps)
+			rockchip_nand_pio_xfer_start(rknand, NANDC_V6_READ,
+					      		(step + 1) & 0x1);
+
+		memcpy_fromio(data, sram_base + NANDC_REG_V6_SRAM_SIZE *
+			     				(step & 1), ecc->size);
+
+		if (step & 1)
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V6_SPARE1, 4);
+		else
+			memcpy_fromio(oob, rknand->regs + NANDC_REG_V6_SPARE0, 4);
+	}
+
+	rockchip_nand_read_extra_oob(mtd, chip->oob_poi);
+
+	if (rknand->bootromblocks)
+		rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return max_bitflips;
+}
+
+static uint32_t rockchip_nand_make_bootrom_compat(struct mtd_info *mtd,
+						  int page,
+						  const u8 *oob,
+						  bool bootromblocks)
+{
+	int pages_per_block = mtd->erasesize / mtd->writesize;
+	int offset = page * mtd->writesize;
+
+	if ((offset < (2 * mtd->erasesize)) || !(page % 2) ||
+	    (offset >= (7 * mtd->erasesize)) || !bootromblocks)
+		return oob[3] | (oob[2] << 8) | (oob[1] << 16) | (oob[0] << 24);
+
+	return (page % pages_per_block + 1) * 4;
+}
+
+static int rockchip_nand_hw_syndrome_pio_write_page(struct mtd_info *mtd,
+						    struct nand_chip *chip,
+						    const uint8_t *buf,
+						    int oob_required,
+						    int page)
+{
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	struct nand_ecc_ctrl *ecc = &chip->ecc;
+	void __iomem *sram_base = rknand->regs + NANDC_REG_V6_SRAM0;
+	int ret, index, step = 0;
+	int offset = page * mtd->writesize;
+	int data_off = step * ecc->size;
+	int oob_off = step * (ecc->bytes + ecc->prepad);
+	const u8 *data = buf + data_off;
+	const u8 *oob = chip->oob_poi + oob_off;
+
+	if (rknand->bootromblocks && (offset < (7 * mtd->erasesize)))
+		rockchip_nand_hw_ecc_setup(mtd, ecc, NANDC_V6_BOOTROM_ECC);
+
+	index = rockchip_nand_make_bootrom_compat(mtd, page, oob,
+					   rknand->bootromblocks);
+
+	memcpy_toio(sram_base, data, ecc->size);
+	memcpy_toio(rknand->regs + NANDC_REG_V6_SPARE0, &index, ecc->prepad);
+
+	for (step = 1; step <= ecc->steps; step++) {
+		rockchip_nand_pio_xfer_start(rknand, NANDC_V6_WRITE,
+					     (step - 1) & 0x1);
+
+		data_off = step * ecc->size;
+		oob_off = step * (ecc->bytes + ecc->prepad);
+		data = buf + data_off;
+		oob = chip->oob_poi + oob_off;
+
+		if (step < ecc->steps) {
+			memcpy_toio(sram_base + NANDC_REG_V6_SRAM_SIZE * 
+				    (step & 1), data, ecc->size);
+			if (step & 1)
+				memcpy_toio(rknand->regs + NANDC_REG_V6_SPARE1,
+					    oob, ecc->prepad);
+			else
+				memcpy_toio(rknand->regs + NANDC_REG_V6_SPARE0,
+					    oob, ecc->prepad);
+		}
+
+		ret = rockchip_nand_wait_pio_xfer_done(rknand);
+		if (ret)
+			return ret;
+	}
+
+	rockchip_nand_write_extra_oob(mtd, chip->oob_poi);
+
+	rockchip_nand_hw_ecc_setup(mtd, ecc, rknand->ecc_strength);
+
+	return 0;
+}
+
+static const u8 strengths[] = {60, 40, 24, 16};
+
+static int rockchip_nand_ecc_max_strength(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	uint32_t max_strength, index;
+	
+	max_strength = ((mtd->oobsize / ecc->steps) - ecc->prepad) * 8 / 14;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (max_strength >= strengths[index])
+			break;
+
+	if (index >= ARRAY_SIZE(strengths))
+		return -ENOTSUPP;
+
+	return strengths[index];
+}
+
+static bool rockchip_nand_strength_is_valid(int strength)
+{
+	uint32_t index;
+
+	for (index = 0; index < ARRAY_SIZE(strengths); index++)
+		if (strength == strengths[index])
+			break;
+
+	if (index == ARRAY_SIZE(strengths))
+		return false;
+
+	return true;
+}
+
+static int rockchip_nand_hw_ecc_ctrl_init(struct mtd_info *mtd,
+					  struct nand_ecc_ctrl *ecc)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct rk_nand *rknand = to_rknand(chip->controller);
+	uint32_t strength;
+	int index;
+
+	ecc->prepad = 4;
+	ecc->steps = mtd->writesize / ecc->size;
+
+	if (fdtdec_get_bool(gd->fdt_blob, chip->flash_node,
+			    "rockchip,protect-bootrom-blocks"))
+                rknand->bootromblocks = true;
+	else
+		rknand->bootromblocks = false;
+
+	if (rockchip_nand_strength_is_valid(ecc->strength))
+		strength = ecc->strength;
+	else
+		strength = rockchip_nand_ecc_max_strength(mtd, ecc);
+
+	rockchip_nand_hw_ecc_setup(mtd, ecc, strength);
+
+	rknand->ecc_strength = ecc->strength;
+
+	nand_oob_fix.eccbytes = ecc->bytes * ecc->steps;
+	for (index = 0; index < ecc->bytes; index++)
+		nand_oob_fix.eccpos[index] = index + ecc->prepad;
+	ecc->layout = &nand_oob_fix;
+
+	if (mtd->oobsize < ((ecc->bytes + ecc->prepad) * ecc->steps)) {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_ecc_init(struct mtd_info *mtd,
+				  struct nand_ecc_ctrl *ecc)
+{
+	int ret;
+
+	switch (ecc->mode) {
+	case NAND_ECC_HW_SYNDROME:
+		ret = rockchip_nand_hw_ecc_ctrl_init(mtd, ecc);
+		if (ret)
+			return ret;
+		ecc->read_page =  rockchip_nand_hw_syndrome_pio_read_page;
+		ecc->write_page = rockchip_nand_hw_syndrome_pio_write_page;
+		break;
+	case NAND_ECC_SOFT_BCH:
+	case NAND_ECC_NONE:
+	case NAND_ECC_SOFT:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_chip_init(int node, struct rk_nand *rknand, int devnum)
+{
+	const void *blob = gd->fdt_blob;
+	struct nand_chip *chip;
+	struct mtd_info *mtd;
+	int ret;
+
+	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+
+	chip->chip_delay = 50;
+	chip->flash_node = node;
+	chip->select_chip = rockchip_nand_select_chip;
+	chip->cmd_ctrl = rockchip_nand_cmd_ctrl;
+	chip->read_buf = rockchip_nand_read_buf;
+	chip->write_buf = rockchip_nand_write_buf;
+	chip->read_byte = rockchip_nand_read_byte;
+	chip->dev_ready = rockchip_nand_dev_ready;
+	chip->controller = &rknand->controller;
+
+	rknand->banks[devnum] = fdtdec_get_int(blob, node, "reg", -1);
+
+	if (rknand->banks[devnum] < 0)
+		return -EINVAL;
+
+	mtd = nand_to_mtd(chip);
+	mtd->name = "rknand";
+
+	ret = nand_scan_ident(mtd, 1, NULL);
+	if (ret)
+		return ret;
+
+	ret = rockchip_nand_ecc_init(mtd, &chip->ecc);
+	if (ret) {
+		debug("rockchip_nand_ecc_init failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_scan_tail(mtd);
+	if (ret) {
+		debug("nand_scan_tail failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = nand_register(devnum, mtd);
+	if (ret) {
+		debug("Failed to register mtd device: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_nand_chips_init(int node, struct rk_nand *rknand)
+{
+	const void *blob = gd->fdt_blob;
+	int nand_node;
+	int ret, i = 0;
+
+	for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
+	     nand_node = fdt_next_subnode(blob, nand_node)) {
+		ret = rockchip_nand_chip_init(nand_node, rknand, i++);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+void board_nand_init(void)
+{
+	const void *blob = gd->fdt_blob;
+	struct rk_nand *rknand;
+	fdt_addr_t regs;
+	int node;
+	int ret;
+
+	rknand = kzalloc(sizeof(*rknand), GFP_KERNEL);
+
+	node = fdtdec_next_compatible(blob, 0, COMPAT_ROCKCHIP_NANDC);
+
+	if (node < 0) {
+		debug("Nand node not found\n");
+		goto err;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, node)) {
+		debug("Nand disabled in device tree\n");
+		goto err;
+	}
+
+	regs = fdtdec_get_addr(blob, node, "reg");
+	if (regs == FDT_ADDR_T_NONE) {
+		debug("Nand address not found\n");
+		goto err;
+	}
+
+	rknand->regs = (void *)regs;
+
+	spin_lock_init(&rknand->controller.lock);
+	init_waitqueue_head(&rknand->controller.wq);
+
+	rockchip_nand_init(rknand);
+
+	ret = rockchip_nand_chips_init(node, rknand);
+	if (ret) {
+		debug("Failed to init nand chips\n");
+		goto err;
+	}
+
+	return;
+err:
+	kfree(rknand);
+}
+
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+	struct mtd_info *mtd;
+
+	mtd = get_nand_dev_by_index(0);
+	return nand_read_skip_bad(mtd, offs, &size, NULL, size, (u_char *)dst);
+}
+
+void nand_deselect(void) {}
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 1ba02be8e1..5592527fda 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -159,6 +159,7 @@ enum fdt_compat_id {
 	COMPAT_ALTERA_SOCFPGA_F2SDR0,           /* SoCFPGA fpga2SDRAM0 bridge */
 	COMPAT_ALTERA_SOCFPGA_F2SDR1,           /* SoCFPGA fpga2SDRAM1 bridge */
 	COMPAT_ALTERA_SOCFPGA_F2SDR2,           /* SoCFPGA fpga2SDRAM2 bridge */
+	COMPAT_ROCKCHIP_NANDC,			/* Rockchip NAND controller */
 
 	COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 107a892e79..4a8a8d74e0 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -70,6 +70,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 	COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
 	COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
+	COMPAT(ROCKCHIP_NANDC, "rockchip,nandc"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)

commit 037e9613716cc4390b62bec80663cc03a097d082
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:54 2017 +0200

    mtd: nand: add support for the Sandisk SDTNQGAMA chip
    
    Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support
    
    Change-Id: I7ff291de7406a6d43e99bc5fb8781a50abfd56ac
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index d36f9006c9..7bd9f7d417 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -58,6 +58,9 @@ struct nand_flash_dev nand_flash_ids[] = {
 	{"TC58NVG6D2 64G 3.3V 8-bit",
 		{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
 		  SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
+	{"SDTNQGAMA 64G 3.3V 8-bit",
+		{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} },
+		  SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
 	{"SDTNRGAMA 64G 3.3V 8-bit",
 		{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} },
 		  SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },

commit ffd0ed872a57915d44462dcef2beb66ba50c151a
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:42 2017 +0200

    rockchip: rk3066: add sdram driver
    
    Add rockchip rk3066 sdram driver
    
    Change-Id: I6f8dff6707e61e5f57868a0897be503aa5c1deb7
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
index 61b7fd41a6..7663b6a2f9 100644
--- a/arch/arm/mach-rockchip/rk3066/Makefile
+++ b/arch/arm/mach-rockchip/rk3066/Makefile
@@ -5,4 +5,5 @@
 #
 
 obj-y += clk_rk3066.o
+obj-y += sdram_rk3066.o
 obj-y += syscon_rk3066.o
diff --git a/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
new file mode 100644
index 0000000000..e7475b8965
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/sdram_rk3066.c
@@ -0,0 +1,943 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Copyright 2014 Rockchip Inc.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ *
+ * Adapted from the very similar rk3188 ddr init.
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <ram.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3066.h>
+#include <asm/arch/ddr_rk3188.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/pmu_rk3188.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
+#include <linux/err.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct chan_info {
+	struct rk3288_ddr_pctl *pctl;
+	struct rk3288_ddr_publ *publ;
+	struct rk3188_msch *msch;
+};
+
+struct dram_info {
+	struct chan_info chan[1];
+	struct ram_info info;
+	struct clk ddr_clk;
+	struct rk3066_cru *cru;
+	struct rk3066_grf *grf;
+	struct rk3066_sgrf *sgrf;
+	struct rk3188_pmu *pmu;
+};
+
+struct rk3066_sdram_params {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rk3066_dmc of_plat;
+#endif
+	struct rk3288_sdram_channel ch[2];
+	struct rk3288_sdram_pctl_timing pctl_timing;
+	struct rk3288_sdram_phy_timing phy_timing;
+	struct rk3288_base_params base;
+	int num_channels;
+	struct regmap *map;
+};
+
+const int ddrconf_table[] = {
+	/*
+	 * [5:4] row(13+n)
+	 * [1:0] col(9+n), assume bw=2
+	 * row	    col,bw
+	 */
+	0,
+	(2 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+	(1 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+	(0 << DDRCONF_ROW_SHIFT) | 1 << DDRCONF_COL_SHIFT,
+	(2 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+	(1 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+	(0 << DDRCONF_ROW_SHIFT) | 2 << DDRCONF_COL_SHIFT,
+	(1 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT,
+	(0 << DDRCONF_ROW_SHIFT) | 0 << DDRCONF_COL_SHIFT,
+	0,
+	0,
+	0,
+	0,
+	0,
+	0,
+	0,
+};
+
+#define TEST_PATTEN	0x5aa5f00f
+#define DQS_GATE_TRAINING_ERROR_RANK0	(1 << 4)
+#define DQS_GATE_TRAINING_ERROR_RANK1	(2 << 4)
+
+#ifdef CONFIG_TPL_BUILD
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+static void ddr_reset(struct rk3066_cru *cru, u32 ch, u32 ctl, u32 phy)
+{
+	u32 phy_ctl_srstn_shift = 13;
+	u32 ctl_psrstn_shift = 11;
+	u32 ctl_srstn_shift = 10;
+	u32 phy_psrstn_shift = 9;
+	u32 phy_srstn_shift = 8;
+
+	rk_clrsetreg(&cru->cru_softrst_con[5],
+		     1 << phy_ctl_srstn_shift | 1 << ctl_psrstn_shift |
+		     1 << ctl_srstn_shift | 1 << phy_psrstn_shift |
+		     1 << phy_srstn_shift,
+		     phy << phy_ctl_srstn_shift | ctl << ctl_psrstn_shift |
+		     ctl << ctl_srstn_shift | phy << phy_psrstn_shift |
+		     phy << phy_srstn_shift);
+}
+
+static void ddr_phy_ctl_reset(struct rk3066_cru *cru, u32 ch, u32 n)
+{
+	u32 phy_ctl_srstn_shift = 13;
+
+	rk_clrsetreg(&cru->cru_softrst_con[5],
+		     1 << phy_ctl_srstn_shift, n << phy_ctl_srstn_shift);
+}
+
+static void phy_pctrl_reset(struct rk3066_cru *cru,
+			    struct rk3288_ddr_publ *publ,
+			    int channel)
+{
+	int i;
+
+	ddr_reset(cru, channel, 1, 1);
+	udelay(1);
+	clrbits_le32(&publ->acdllcr, ACDLLCR_DLLSRST);
+	for (i = 0; i < 4; i++)
+		clrbits_le32(&publ->datx8[i].dxdllcr, DXDLLCR_DLLSRST);
+
+	udelay(10);
+	setbits_le32(&publ->acdllcr, ACDLLCR_DLLSRST);
+	for (i = 0; i < 4; i++)
+		setbits_le32(&publ->datx8[i].dxdllcr, DXDLLCR_DLLSRST);
+
+	udelay(10);
+	ddr_reset(cru, channel, 1, 0);
+	udelay(10);
+	ddr_reset(cru, channel, 0, 0);
+	udelay(10);
+}
+
+static void phy_dll_bypass_set(struct rk3288_ddr_publ *publ,
+	u32 freq)
+{
+	int i;
+
+	if (freq <= 250000000) {
+		if (freq <= 150000000)
+			clrbits_le32(&publ->dllgcr, SBIAS_BYPASS);
+		else
+			setbits_le32(&publ->dllgcr, SBIAS_BYPASS);
+		setbits_le32(&publ->acdllcr, ACDLLCR_DLLDIS);
+		for (i = 0; i < 4; i++)
+			setbits_le32(&publ->datx8[i].dxdllcr,
+				     DXDLLCR_DLLDIS);
+
+		setbits_le32(&publ->pir, PIR_DLLBYP);
+	} else {
+		clrbits_le32(&publ->dllgcr, SBIAS_BYPASS);
+		clrbits_le32(&publ->acdllcr, ACDLLCR_DLLDIS);
+		for (i = 0; i < 4; i++) {
+			clrbits_le32(&publ->datx8[i].dxdllcr,
+				     DXDLLCR_DLLDIS);
+		}
+
+		clrbits_le32(&publ->pir, PIR_DLLBYP);
+	}
+}
+
+static void dfi_cfg(struct rk3288_ddr_pctl *pctl, u32 dramtype)
+{
+	writel(DFI_INIT_START, &pctl->dfistcfg0);
+	writel(DFI_DRAM_CLK_SR_EN | DFI_DRAM_CLK_DPD_EN,
+	       &pctl->dfistcfg1);
+	writel(DFI_PARITY_INTR_EN | DFI_PARITY_EN, &pctl->dfistcfg2);
+	writel(7 << TLP_RESP_TIME_SHIFT | LP_SR_EN | LP_PD_EN,
+	       &pctl->dfilpcfg0);
+
+	writel(2 << TCTRL_DELAY_TIME_SHIFT, &pctl->dfitctrldelay);
+	writel(1 << TPHY_WRDATA_TIME_SHIFT, &pctl->dfitphywrdata);
+	writel(0xf << TPHY_RDLAT_TIME_SHIFT, &pctl->dfitphyrdlat);
+	writel(2 << TDRAM_CLK_DIS_TIME_SHIFT, &pctl->dfitdramclkdis);
+	writel(2 << TDRAM_CLK_EN_TIME_SHIFT, &pctl->dfitdramclken);
+	writel(1, &pctl->dfitphyupdtype0);
+
+	/* cs0 and cs1 write odt enable */
+	writel((RANK0_ODT_WRITE_SEL | RANK1_ODT_WRITE_SEL),
+	       &pctl->dfiodtcfg);
+	/* odt write length */
+	writel(7 << ODT_LEN_BL8_W_SHIFT, &pctl->dfiodtcfg1);
+	/* phyupd and ctrlupd disabled */
+	writel(0, &pctl->dfiupdcfg);
+}
+
+static void ddr_set_ddr3_mode(struct rk3066_grf *grf, uint channel,
+			      bool ddr3_mode)
+{
+	uint mask, val;
+
+	mask = MSCH4_MAINDDR3_MASK << MSCH4_MAINDDR3_SHIFT;
+	val = ddr3_mode << MSCH4_MAINDDR3_SHIFT;
+	rk_clrsetreg(&grf->soc_con2, mask, val);
+}
+
+static void ddr_rank_2_row15en(struct rk3066_grf *grf, bool enable)
+{
+	uint mask, val;
+
+	mask = RANK_TO_ROW15_EN_MASK << RANK_TO_ROW15_EN_SHIFT;
+	val = enable << RANK_TO_ROW15_EN_SHIFT;
+	rk_clrsetreg(&grf->soc_con2, mask, val);
+}
+
+static void pctl_cfg(int channel, struct rk3288_ddr_pctl *pctl,
+		     struct rk3066_sdram_params *sdram_params,
+		     struct rk3066_grf *grf)
+{
+	copy_to_reg(&pctl->togcnt1u, &sdram_params->pctl_timing.togcnt1u,
+		    sizeof(sdram_params->pctl_timing));
+	switch (sdram_params->base.dramtype) {
+	case DDR3:
+		if (sdram_params->phy_timing.mr[1] & DDR3_DLL_DISABLE) {
+			writel(sdram_params->pctl_timing.tcl - 3,
+			       &pctl->dfitrddataen);
+		} else {
+			writel(sdram_params->pctl_timing.tcl - 2,
+			       &pctl->dfitrddataen);
+		}
+		writel(sdram_params->pctl_timing.tcwl - 1,
+		       &pctl->dfitphywrlat);
+		writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT | DDR3_EN |
+		       DDR2_DDR3_BL_8 | (6 - 4) << TFAW_SHIFT | PD_EXIT_SLOW |
+		       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+		       &pctl->mcfg);
+		ddr_set_ddr3_mode(grf, channel, true);
+		break;
+	}
+
+	setbits_le32(&pctl->scfg, 1);
+}
+
+static void phy_cfg(const struct chan_info *chan, int channel,
+		    struct rk3066_sdram_params *sdram_params)
+{
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3188_msch *msch = chan->msch;
+	uint ddr_freq_mhz = sdram_params->base.ddr_freq / 1000000;
+	u32 dinit2;
+	int i;
+
+	dinit2 = DIV_ROUND_UP(ddr_freq_mhz * 200000, 1000);
+	/* DDR PHY Timing */
+	copy_to_reg(&publ->dtpr[0], &sdram_params->phy_timing.dtpr0,
+		    sizeof(sdram_params->phy_timing));
+	writel(sdram_params->base.noc_timing, &msch->ddrtiming);
+	writel(0x3f, &msch->readlatency);
+	writel(DIV_ROUND_UP(ddr_freq_mhz * 5120, 1000) << PRT_DLLLOCK_SHIFT |
+	       DIV_ROUND_UP(ddr_freq_mhz * 50, 1000) << PRT_DLLSRST_SHIFT |
+	       8 << PRT_ITMSRST_SHIFT, &publ->ptr[0]);
+	writel(DIV_ROUND_UP(ddr_freq_mhz * 500000, 1000) << PRT_DINIT0_SHIFT |
+	       DIV_ROUND_UP(ddr_freq_mhz * 400, 1000) << PRT_DINIT1_SHIFT,
+	       &publ->ptr[1]);
+	writel(min(dinit2, 0x1ffffU) << PRT_DINIT2_SHIFT |
+	       DIV_ROUND_UP(ddr_freq_mhz * 1000, 1000) << PRT_DINIT3_SHIFT,
+	       &publ->ptr[2]);
+
+	switch (sdram_params->base.dramtype) {
+	case DDR3:
+		clrbits_le32(&publ->pgcr, 0x1f);
+		clrsetbits_le32(&publ->dcr, DDRMD_MASK << DDRMD_SHIFT,
+				DDRMD_DDR3 << DDRMD_SHIFT);
+		break;
+	}
+	if (sdram_params->base.odt) {
+		/*dynamic RTT enable */
+		for (i = 0; i < 4; i++)
+			setbits_le32(&publ->datx8[i].dxgcr, DQSRTT | DQRTT);
+	} else {
+		/*dynamic RTT disable */
+		for (i = 0; i < 4; i++)
+			clrbits_le32(&publ->datx8[i].dxgcr, DQSRTT | DQRTT);
+	}
+}
+
+static void phy_init(struct rk3288_ddr_publ *publ)
+{
+	setbits_le32(&publ->pir, PIR_INIT | PIR_DLLSRST
+		| PIR_DLLLOCK | PIR_ZCAL | PIR_ITMSRST | PIR_CLRSR);
+	udelay(1);
+	while ((readl(&publ->pgsr) &
+		(PGSR_IDONE | PGSR_DLDONE | PGSR_ZCDONE)) !=
+		(PGSR_IDONE | PGSR_DLDONE | PGSR_ZCDONE))
+		;
+}
+
+static void send_command(struct rk3288_ddr_pctl *pctl, u32 rank,
+			 u32 cmd, u32 arg)
+{
+	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
+	udelay(1);
+	while (readl(&pctl->mcmd) & START_CMD)
+		;
+}
+
+static inline void send_command_op(struct rk3288_ddr_pctl *pctl,
+				   u32 rank, u32 cmd, u32 ma, u32 op)
+{
+	send_command(pctl, rank, cmd, (ma & LPDDR2_MA_MASK) << LPDDR2_MA_SHIFT |
+		     (op & LPDDR2_OP_MASK) << LPDDR2_OP_SHIFT);
+}
+
+static void memory_init(struct rk3288_ddr_publ *publ,
+			u32 dramtype)
+{
+	setbits_le32(&publ->pir,
+		     (PIR_INIT | PIR_DRAMINIT | PIR_LOCKBYP
+		      | PIR_ZCALBYP | PIR_CLRSR | PIR_ICPC
+		      | (dramtype == DDR3 ? PIR_DRAMRST : 0)));
+	udelay(1);
+	while ((readl(&publ->pgsr) & (PGSR_IDONE | PGSR_DLDONE))
+		!= (PGSR_IDONE | PGSR_DLDONE))
+		;
+}
+
+static void move_to_config_state(struct rk3288_ddr_publ *publ,
+				 struct rk3288_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK)
+				!= ACCESS)
+				;
+			/* wait DLL lock */
+			while ((readl(&publ->pgsr) & PGSR_DLDONE)
+				!= PGSR_DLDONE)
+				;
+			/*
+			 * if at low power state,need wakeup first,
+			 * and then enter the config, so
+			 * fallthrough
+			 */
+		case ACCESS:
+			/* fallthrough */
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+				;
+			break;
+		case CONFIG:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void set_bandwidth_ratio(const struct chan_info *chan, int channel,
+				u32 n, struct rk3066_grf *grf)
+{
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3188_msch *msch = chan->msch;
+
+	if (n == 1) {
+		setbits_le32(&pctl->ppcfg, 1);
+		setbits_le32(&msch->ddrtiming, 1 << 31);
+		/* Data Byte disable*/
+		clrbits_le32(&publ->datx8[2].dxgcr, 1);
+		clrbits_le32(&publ->datx8[3].dxgcr, 1);
+		/* disable DLL */
+		setbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLDIS);
+		setbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLDIS);
+	} else {
+		clrbits_le32(&pctl->ppcfg, 1);
+		clrbits_le32(&msch->ddrtiming, 1 << 31);
+		/* Data Byte enable*/
+		setbits_le32(&publ->datx8[2].dxgcr, 1);
+		setbits_le32(&publ->datx8[3].dxgcr, 1);
+
+		/* enable DLL */
+		clrbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLDIS);
+		clrbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLDIS);
+		/* reset DLL */
+		clrbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLSRST);
+		clrbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLSRST);
+		udelay(10);
+		setbits_le32(&publ->datx8[2].dxdllcr, DXDLLCR_DLLSRST);
+		setbits_le32(&publ->datx8[3].dxdllcr, DXDLLCR_DLLSRST);
+	}
+	setbits_le32(&pctl->dfistcfg0, 1 << 2);
+}
+
+static int data_training(const struct chan_info *chan, int channel,
+			 struct rk3066_sdram_params *sdram_params)
+{
+	unsigned int j;
+	int ret = 0;
+	u32 rank;
+	int i;
+	u32 step[2] = { PIR_QSTRN, PIR_RVTRN };
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+
+	/* disable auto refresh */
+	writel(0, &pctl->trefi);
+
+	if (sdram_params->base.dramtype != LPDDR3)
+		setbits_le32(&publ->pgcr, 1 << PGCR_DQSCFG_SHIFT);
+	rank = sdram_params->ch[channel].rank | 1;
+	for (j = 0; j < ARRAY_SIZE(step); j++) {
+		/*
+		 * trigger QSTRN and RVTRN
+		 * clear DTDONE status
+		 */
+		setbits_le32(&publ->pir, PIR_CLRSR);
+
+		/* trigger DTT */
+		setbits_le32(&publ->pir,
+			     PIR_INIT | step[j] | PIR_LOCKBYP | PIR_ZCALBYP |
+			     PIR_CLRSR);
+		udelay(1);
+		/* wait echo byte DTDONE */
+		while ((readl(&publ->datx8[0].dxgsr[0]) & rank)
+			!= rank)
+			;
+		while ((readl(&publ->datx8[1].dxgsr[0]) & rank)
+			!= rank)
+			;
+		if (!(readl(&pctl->ppcfg) & 1)) {
+			while ((readl(&publ->datx8[2].dxgsr[0])
+				& rank) != rank)
+				;
+			while ((readl(&publ->datx8[3].dxgsr[0])
+				& rank) != rank)
+				;
+		}
+		if (readl(&publ->pgsr) &
+		    (PGSR_DTERR | PGSR_RVERR | PGSR_RVEIRR)) {
+			ret = -1;
+			break;
+		}
+	}
+	/* send some auto refresh to complement the lost while DTT */
+	for (i = 0; i < (rank > 1 ? 8 : 4); i++)
+		send_command(pctl, rank, REF_CMD, 0);
+
+	if (sdram_params->base.dramtype != LPDDR3)
+		clrbits_le32(&publ->pgcr, 1 << PGCR_DQSCFG_SHIFT);
+
+	/* resume auto refresh */
+	writel(sdram_params->pctl_timing.trefi, &pctl->trefi);
+
+	return ret;
+}
+
+static void move_to_access_state(const struct chan_info *chan)
+{
+	struct rk3288_ddr_publ *publ = chan->publ;
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MSK;
+
+		switch (state) {
+		case LOW_POWER:
+			if (((readl(&pctl->stat) >> LP_TRIG_SHIFT) &
+					LP_TRIG_MASK) == 1)
+				return;
+
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) != ACCESS)
+				;
+			/* wait DLL lock */
+			while ((readl(&publ->pgsr) & PGSR_DLDONE)
+				!= PGSR_DLDONE)
+				;
+			break;
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MSK) == CONFIG)
+				;
+			break;
+		case ACCESS:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void dram_cfg_rbc(const struct chan_info *chan, u32 chnum,
+			 struct rk3066_sdram_params *sdram_params)
+{
+	struct rk3288_ddr_publ *publ = chan->publ;
+
+	if (sdram_params->ch[chnum].bk == 3)
+		clrsetbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT,
+				1 << PDQ_SHIFT);
+	else
+		clrbits_le32(&publ->dcr, PDQ_MASK << PDQ_SHIFT);
+
+	writel(sdram_params->base.ddrconfig, &chan->msch->ddrconf);
+}
+
+static void dram_all_config(const struct dram_info *dram,
+			    struct rk3066_sdram_params *sdram_params)
+{
+	unsigned int chan;
+	u32 sys_reg = 0;
+
+	sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
+	sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT;
+	for (chan = 0; chan < sdram_params->num_channels; chan++) {
+		const struct rk3288_sdram_channel *info =
+			&sdram_params->ch[chan];
+
+		sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
+		sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
+		sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
+		sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
+		sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
+		sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
+		sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan);
+		sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(chan);
+		sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan);
+
+		dram_cfg_rbc(&dram->chan[chan], chan, sdram_params);
+	}
+	if (sdram_params->ch[0].rank == 2)
+		ddr_rank_2_row15en(dram->grf, 0);
+	else
+		ddr_rank_2_row15en(dram->grf, 1);
+
+	writel(sys_reg, &dram->pmu->sys_reg[2]);
+}
+
+static int sdram_rank_bw_detect(struct dram_info *dram, int channel,
+		struct rk3066_sdram_params *sdram_params)
+{
+	int reg;
+	int need_trainig = 0;
+	const struct chan_info *chan = &dram->chan[channel];
+	struct rk3288_ddr_publ *publ = chan->publ;
+
+	ddr_rank_2_row15en(dram->grf, 0);
+
+	if (data_training(chan, channel, sdram_params) < 0) {
+		debug("first data training fail!\n");
+		reg = readl(&publ->datx8[0].dxgsr[0]);
+		/* Check the result for rank 0 */
+		if ((channel == 0) && (reg & DQS_GATE_TRAINING_ERROR_RANK0)) {
+			debug("data training fail!\n");
+			return -EIO;
+		}
+
+		/* Check the result for rank 1 */
+		if (reg & DQS_GATE_TRAINING_ERROR_RANK1) {
+			sdram_params->ch[channel].rank = 1;
+			clrsetbits_le32(&publ->pgcr, 0xF << 18,
+					sdram_params->ch[channel].rank << 18);
+			need_trainig = 1;
+		}
+		reg = readl(&publ->datx8[2].dxgsr[0]);
+		if (reg & (1 << 4)) {
+			sdram_params->ch[channel].bw = 1;
+			set_bandwidth_ratio(chan, channel,
+					    sdram_params->ch[channel].bw,
+					    dram->grf);
+			need_trainig = 1;
+		}
+	}
+	/* Assume the Die bit width are the same with the chip bit width */
+	sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw;
+
+	if (need_trainig &&
+	    (data_training(chan, channel, sdram_params) < 0)) {
+		if (sdram_params->base.dramtype == LPDDR3) {
+			ddr_phy_ctl_reset(dram->cru, channel, 1);
+			udelay(10);
+			ddr_phy_ctl_reset(dram->cru, channel, 0);
+			udelay(10);
+		}
+		debug("2nd data training failed!");
+		return -EIO;
+	}
+
+	return 0;
+}
+
+/*
+ * Detect ram columns and rows.
+ * @dram: dram info struct
+ * @channel: channel number to handle
+ * @sdram_params: sdram parameters, function will fill in col and row values
+ *
+ * Returns 0 or negative on error.
+ */
+static int sdram_col_row_detect(struct dram_info *dram, int channel,
+		struct rk3066_sdram_params *sdram_params)
+{
+	int row, col;
+	unsigned int addr;
+	const struct chan_info *chan = &dram->chan[channel];
+	struct rk3288_ddr_pctl *pctl = chan->pctl;
+	struct rk3288_ddr_publ *publ = chan->publ;
+	int ret = 0;
+
+	/* Detect col */
+	for (col = 11; col >= 9; col--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE +
+			(1 << (col + sdram_params->ch[channel].bw - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (col == 8) {
+		debug("Col detect error\n");
+		ret = -EINVAL;
+		goto out;
+	} else {
+		sdram_params->ch[channel].col = col;
+	}
+
+	ddr_rank_2_row15en(dram->grf, 1);
+	move_to_config_state(publ, pctl);
+	writel(1, &chan->msch->ddrconf);
+	move_to_access_state(chan);
+	/* Detect row, max 15,min13 in rk3066*/
+	for (row = 16; row >= 13; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE + (1 << (row + 15 - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 12) {
+		debug("Row detect error\n");
+		ret = -EINVAL;
+	} else {
+		sdram_params->ch[channel].cs1_row = row;
+		sdram_params->ch[channel].row_3_4 = 0;
+		debug("chn %d col %d, row %d\n", channel, col, row);
+		sdram_params->ch[channel].cs0_row = row;
+	}
+
+out:
+	return ret;
+}
+
+static int sdram_get_niu_config(struct rk3066_sdram_params *sdram_params)
+{
+	int i, tmp, size, ret = 0;
+
+	tmp = sdram_params->ch[0].col - 9;
+	tmp -= (sdram_params->ch[0].bw == 2) ? 0 : 1;
+	tmp |= ((sdram_params->ch[0].cs0_row - 13) << 4);
+	size = sizeof(ddrconf_table)/sizeof(ddrconf_table[0]);
+	for (i = 0; i < size; i++)
+		if (tmp == ddrconf_table[i])
+			break;
+	if (i >= size) {
+		debug("niu config not found\n");
+		ret = -EINVAL;
+	} else {
+		debug("niu config %d\n", i);
+		sdram_params->base.ddrconfig = i;
+	}
+
+	return ret;
+}
+
+static int sdram_init(struct dram_info *dram,
+		      struct rk3066_sdram_params *sdram_params)
+{
+	int channel;
+	int zqcr;
+	int ret;
+
+	if ((sdram_params->base.dramtype == DDR3 &&
+	     sdram_params->base.ddr_freq > 800000000)) {
+		debug("SDRAM frequency is too high!");
+		return -E2BIG;
+	}
+
+	ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq);
+	if (ret) {
+		debug("Could not set DDR clock\n");
+		return ret;
+	}
+
+	for (channel = 0; channel < 1; channel++) {
+		const struct chan_info *chan = &dram->chan[channel];
+		struct rk3288_ddr_pctl *pctl = chan->pctl;
+		struct rk3288_ddr_publ *publ = chan->publ;
+
+		phy_pctrl_reset(dram->cru, publ, channel);
+		phy_dll_bypass_set(publ, sdram_params->base.ddr_freq);
+
+		dfi_cfg(pctl, sdram_params->base.dramtype);
+
+		pctl_cfg(channel, pctl, sdram_params, dram->grf);
+
+		phy_cfg(chan, channel, sdram_params);
+
+		phy_init(publ);
+
+		writel(POWER_UP_START, &pctl->powctl);
+		while (!(readl(&pctl->powstat) & POWER_UP_DONE))
+			;
+
+		memory_init(publ, sdram_params->base.dramtype);
+		move_to_config_state(publ, pctl);
+
+		/* Using 32bit bus width for detect */
+		sdram_params->ch[channel].bw = 2;
+		set_bandwidth_ratio(chan, channel,
+				    sdram_params->ch[channel].bw, dram->grf);
+		/*
+		 * set cs, using n=3 for detect
+		 * CS0, n=1
+		 * CS1, n=2
+		 * CS0 & CS1, n = 3
+		 */
+		sdram_params->ch[channel].rank = 2,
+		clrsetbits_le32(&publ->pgcr, 0xF << 18,
+				(sdram_params->ch[channel].rank | 1) << 18);
+
+		/* DS=40ohm,ODT=155ohm */
+		zqcr = 1 << ZDEN_SHIFT | 2 << PU_ONDIE_SHIFT |
+			2 << PD_ONDIE_SHIFT | 0x19 << PU_OUTPUT_SHIFT |
+			0x19 << PD_OUTPUT_SHIFT;
+		writel(zqcr, &publ->zq1cr[0]);
+		writel(zqcr, &publ->zq0cr[0]);
+
+		/* Detect the rank and bit-width with data-training */
+		writel(1, &chan->msch->ddrconf);
+		sdram_rank_bw_detect(dram, channel, sdram_params);
+
+		if (sdram_params->base.dramtype == LPDDR3) {
+			u32 i;
+			writel(0, &pctl->mrrcfg0);
+			for (i = 0; i < 17; i++)
+				send_command_op(pctl, 1, MRR_CMD, i, 0);
+		}
+		writel(4, &chan->msch->ddrconf);
+		move_to_access_state(chan);
+		/* DDR3 and LPDDR3 are always 8 bank, no need detect */
+		sdram_params->ch[channel].bk = 3;
+		/* Detect Col and Row number*/
+		ret = sdram_col_row_detect(dram, channel, sdram_params);
+		if (ret)
+			goto error;
+	}
+	/* Find NIU DDR configuration */
+	ret = sdram_get_niu_config(sdram_params);
+	if (ret)
+		goto error;
+
+	dram_all_config(dram, sdram_params);
+	debug("%s done\n", __func__);
+
+	return 0;
+error:
+	debug("DRAM init failed!\n");
+	hang();
+}
+#endif /* CONFIG_TPL_BUILD */
+
+#ifdef CONFIG_TPL_BUILD
+static int setup_sdram(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+	struct rk3066_sdram_params *params = dev_get_platdata(dev);
+
+	return sdram_init(priv, params);
+}
+
+static int rk3066_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3066_sdram_params *params = dev_get_platdata(dev);
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	int ret;
+
+	/* rk3066 supports only one-channel */
+	params->num_channels = 1;
+	ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing",
+				   (u32 *)&params->pctl_timing,
+				   sizeof(params->pctl_timing) / sizeof(u32));
+	if (ret) {
+		debug("%s: Cannot read rockchip,pctl-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,phy-timing",
+				   (u32 *)&params->phy_timing,
+				   sizeof(params->phy_timing) / sizeof(u32));
+	if (ret) {
+		debug("%s: Cannot read rockchip,phy-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params",
+				   (u32 *)&params->base,
+				   sizeof(params->base) / sizeof(u32));
+	if (ret) {
+		debug("%s: Cannot read rockchip,sdram-params\n", __func__);
+		return -EINVAL;
+	}
+	ret = regmap_init_mem(dev, &params->map);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+#endif /* CONFIG_TPL_BUILD */
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+	struct rk3066_sdram_params *plat = dev_get_platdata(dev);
+	struct dtd_rockchip_rk3066_dmc *of_plat = &plat->of_plat;
+	int ret;
+
+	memcpy(&plat->pctl_timing, of_plat->rockchip_pctl_timing,
+	       sizeof(plat->pctl_timing));
+	memcpy(&plat->phy_timing, of_plat->rockchip_phy_timing,
+	       sizeof(plat->phy_timing));
+	memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
+	/* rk3066 supports dual-channel, set default channel num to 2 */
+	plat->num_channels = 1;
+	ret = regmap_init_mem_platdata(dev, of_plat->reg,
+				       ARRAY_SIZE(of_plat->reg) / 2,
+				       &plat->map);
+	if (ret)
+		return ret;
+	return 0;
+}
+#endif
+
+static int rk3066_dmc_probe(struct udevice *dev)
+{
+#ifdef CONFIG_TPL_BUILD
+	struct rk3066_sdram_params *plat = dev_get_platdata(dev);
+#endif
+	struct dram_info *priv = dev_get_priv(dev);
+	struct regmap *map;
+	int ret;
+	struct udevice *dev_clk;
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	ret = conv_of_platdata(dev);
+	if (ret)
+		return ret;
+#endif
+	map = syscon_get_regmap_by_driver_data(ROCKCHIP_SYSCON_NOC);
+	if (IS_ERR(map))
+		return PTR_ERR(map);
+	priv->chan[0].msch = regmap_get_range(map, 0);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
+
+#ifdef CONFIG_TPL_BUILD
+	priv->chan[0].pctl = regmap_get_range(plat->map, 0);
+	priv->chan[0].publ = regmap_get_range(plat->map, 1);
+#endif
+	ret = rockchip_get_clk(&dev_clk);
+	if (ret)
+		return ret;
+	priv->ddr_clk.id = CLK_DDR;
+
+	ret = clk_request(dev_clk, &priv->ddr_clk);
+	if (ret)
+		return ret;
+
+	priv->cru = rockchip_get_cru();
+	if (IS_ERR(priv->cru))
+		return PTR_ERR(priv->cru);
+#ifdef CONFIG_TPL_BUILD
+	ret = setup_sdram(dev);
+	if (ret)
+		return ret;
+#endif
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->pmu->sys_reg[2]);
+
+	return 0;
+}
+
+static int rk3066_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3066_dmc_ops = {
+	.get_info = rk3066_dmc_get_info,
+};
+
+static const struct udevice_id rk3066_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3066-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3066) = {
+	.name = "rockchip_rk3066_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3066_dmc_ids,
+	.ops = &rk3066_dmc_ops,
+#ifdef CONFIG_TPL_BUILD
+	.ofdata_to_platdata = rk3066_dmc_ofdata_to_platdata,
+#endif
+	.probe = rk3066_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+#ifdef CONFIG_TPL_BUILD
+	.platdata_auto_alloc_size = sizeof(struct rk3066_sdram_params),
+#endif
+};

commit 7ea94c784707858653acd0d883e64bb544c7e319
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 2 10:31:15 2017 +0800

    rockchip: test: key: use ctrl+c to exit test
    
    This is more flexible for users to determine exit or not
    
    Change-Id: Idcd9ad605b8615062fafae485cd2f297ed021fee
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
index 8a3cf6348f..bd76ba96f5 100644
--- a/test/rockchip/test-key.c
+++ b/test/rockchip/test-key.c
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <adc.h>
 #include <common.h>
+#include <console.h>
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
@@ -298,17 +299,14 @@ static int key_test(struct key_info *keys)
 	unsigned int adcval;
 	int adc_h, adc_l;
 	int err, i;
-	ulong start;
 
 	if (g_key_count == 0) {
 		printf("Find total 0 keys, finish test\n");
 		goto out;
 	}
 
-	printf("\nYou have 30s to test keys, press or release them, start!\n");
-
-	start = get_timer(0);
-	while (get_timer(start) <= 30000) {
+	printf("\nPress or release keys(Exit test by 'ctrl + c').. Start!\n");
+	while (!ctrlc()) {
 		mdelay(100);
 		for (i = 0, key = keys; i < g_key_count; i++, key++) {
 			if (key->type == ADC_KEY) {

commit 3557321365ac81accd4541fcf63bd3b114b48b2a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 2 10:38:24 2017 +0800

    rockchip: test: adjust position of guide info
    
    Change-Id: Ibd674a7fea9c8b109e5766d98ef80c15fb612633
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index f9310b46f7..bae1177574 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -31,6 +31,7 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	board_module_t *module = NULL;
 	char *module_name = NULL;
 	int index = 0, err = 0;
+	bool found = false;
 
 	if (argc >= 2) {
 		module_name = argv[1];
@@ -42,13 +43,16 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 	if (!module_name)
 		return 0;
 
-	printf("***********************************************************\n");
-	printf("Rockchip Board Module [%s] Test start.\n", module_name);
-	printf("***********************************************************\n");
 
 	for (index = 0; index < ARRAY_SIZE(g_board_modules); index++) {
 		module = &g_board_modules[index];
 		if (module && !strcmp(module->name, module_name)) {
+			found = true;
+
+			printf("***********************************************************\n");
+			printf("Rockchip Board Module [%s] Test start.\n", module_name);
+			printf("***********************************************************\n");
+
 			ms_start = get_timer(0);
 
 			err = module->test(argc, argv);
@@ -58,13 +62,17 @@ static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
 				sec = ms / 1000;
 				ms = ms % 1000;
 			}
+
+			printf("-----------------------------------------------------------\n");
+			printf("Rockchip Board Module [%s] Test end <%s>.. Total: %lu.%lus\n",
+			       module->name, err ? "FAILED" : "PASS", sec, ms);
+			printf("-----------------------------------------------------------\n\n\n");
 		}
 	}
 
-	printf("-----------------------------------------------------------\n");
-	printf("Rockchip Board Module [%s] Test end <%s>.. Total: %lu.%lus\n",
-	       module->name, err ? "FAILED" : "PASS", sec, ms);
-	printf("-----------------------------------------------------------\n\n\n");
+	if (!found)
+		printf("Rockchip Board Module [%s] is not support !\n",
+		       module_name);
 
 	return 0;
 }

commit 81ae24d4d6f45da9a0cf3245efb1a9125e729595
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Nov 6 16:34:10 2017 +0800

    fastboot: add buffer addr for RK3066
    
    Change-Id: I0d39e50063ab040d1027d342081bc63a19c9389b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/cmd/fastboot/Kconfig b/cmd/fastboot/Kconfig
index fb0c5da94c..a2638a8bba 100644
--- a/cmd/fastboot/Kconfig
+++ b/cmd/fastboot/Kconfig
@@ -29,8 +29,8 @@ config FASTBOOT_BUF_ADDR
 	default 0x81000000 if ARCH_OMAP2PLUS
 	default 0x42000000 if ARCH_SUNXI && !MACH_SUN9I
 	default 0x22000000 if ARCH_SUNXI && MACH_SUN9I
-	default 0x60800800 if ROCKCHIP_RK3036 || ROCKCHIP_RK3188 || \
-				ROCKCHIP_RK322X
+	default 0x60800800 if ROCKCHIP_RK3036 || ROCKCHIP_RK3066 || \
+				ROCKCHIP_RK3188 || ROCKCHIP_RK322X
 	default 0x800800 if ROCKCHIP_RK3288 || ROCKCHIP_RK3329 || \
 				ROCKCHIP_RK3399
 	default 0x280000 if ROCKCHIP_RK3368

commit 578306ea5a9e72388e3930c64346fda70f22e63e
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:13:11 2017 +0200

    rockchip: rk3066: add core support
    
    Add core skeleton for rk3066
    
    Change-Id: I9fac85baaf671ac598c1c759b0f387b83ba9c21c
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 41a7363d3a..98ab2b4c77 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -21,6 +21,21 @@ config ROCKCHIP_RK3128
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK3066
+	bool "Support Rockchip RK3066"
+	select CPU_V7
+	select SUPPORT_SPL
+	select SUPPORT_TPL
+	select SPL
+	select TPL
+	select BOARD_LATE_INIT
+	select ROCKCHIP_BROM_HELPER
+	help
+	  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
+	  including NEON and GPU, Mali-400 graphics, several DDR3 options
+	  and video codec support. Peripherals include ethernet, USB2 host
+	  and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
 config ROCKCHIP_RK3188
 	bool "Support Rockchip RK3188"
 	select CPU_V7
@@ -255,6 +270,7 @@ config GICV3
 	bool "ARM GICv3"
 
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
+source "arch/arm/mach-rockchip/rk3066/Kconfig"
 source "arch/arm/mach-rockchip/rk3128/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index dbaaf7d527..814b641506 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,12 +11,14 @@
 obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 
+obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
 
 obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
@@ -30,6 +32,7 @@ obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
@@ -44,6 +47,7 @@ obj-y += rk_timer.o
 endif
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
 obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
 ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
diff --git a/arch/arm/mach-rockchip/rk3066-board-spl.c b/arch/arm/mach-rockchip/rk3066-board-spl.c
new file mode 100644
index 0000000000..9acdd83dae
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066-board-spl.c
@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <led.h>
+#include <malloc.h>
+#include <ram.h>
+#include <spl.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3188.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/timer.h>
+#include <dm/pinctrl.h>
+#include <dm/root.h>
+#include <dm/test.h>
+#include <dm/util.h>
+#include <power/regulator.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_NAND;
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *pinctrl, *dev;
+	int ret;
+
+	debug_uart_init();
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("Pinctrl init failed: %d\n", ret);
+		return;
+	}
+
+	ret = rockchip_get_clk(&dev);
+	if (ret) {
+		debug("CLK init failed: %d\n", ret);
+		return;
+	}
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+}
+
+void spl_board_init(void)
+{
+	struct udevice *pinctrl;
+	int ret;
+
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
+	if (ret) {
+		debug("%s: Failed to set up SD card\n", __func__);
+		goto err;
+	}
+#endif
+
+	/* Enable debug UART */
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+	if (ret) {
+		debug("%s: Failed to set up console UART\n", __func__);
+		goto err;
+	}
+
+	preloader_console_init();
+
+	return;
+
+err:
+	debug("spl_board_init: Error %d\n", ret);
+
+	/* No way to report error here */
+	hang();
+}
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3066_otg_data = {
+	.rx_fifo_sz	= 275,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 256,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	ofnode otg_node;
+	u32 reg;
+
+	otg_node = ofnode_path("/usb@10180000");
+	if (!ofnode_valid(otg_node)) {
+		debug("Not found usb otg device\n");
+		return -ENODEV;
+	}
+
+	ofnode_read_u32(otg_node, "reg", &reg);
+	rk3066_otg_data.regs_otg = reg;
+
+	return dwc2_udc_probe(&rk3066_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c
new file mode 100644
index 0000000000..5dcac90b52
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066-board-tpl.c
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/ddr_rk3188.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/pmu_rk3188.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RK3066_TIMER_CONTROL	0x8
+#define GRF_BASE	0x20008000
+
+static int setup_arm_clock(void)
+{
+	struct udevice *dev;
+	struct clk clk;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ret;
+
+	clk.id = CLK_ARM;
+	ret = clk_request(dev, &clk);
+	if (ret < 0)
+		return ret;
+
+	ret = clk_set_rate(&clk, 600000000);
+
+	clk_free(&clk);
+	return ret;
+}
+
+void board_init_f(ulong dummy)
+{
+	struct rk3066_grf * const grf = (void *)GRF_BASE;
+	struct udevice *dev;
+	int ret;
+
+	/* Enable early UART on the RK3066 */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B0_MASK,
+		     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+		     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+
+	debug_uart_init();
+
+	printascii("U-Boot TPL board init\n");
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	/* Reset and enable Timer0 */
+	writel(0, CONFIG_SYS_TIMER_BASE);
+	rk_clrsetreg(CONFIG_SYS_TIMER_BASE + RK3066_TIMER_CONTROL, 0x1, 0x1);
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+
+	setup_arm_clock();
+}
+
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom();
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
new file mode 100644
index 0000000000..8fa06a2525
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066-board.c
@@ -0,0 +1,150 @@
+/*
+ * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3188.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/gpio.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_late_init(void)
+{
+	struct rk3066_grf *grf;
+
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(grf)) {
+		debug("grf syscon returned %ld\n", PTR_ERR(grf));
+		return PTR_ERR(grf);
+	}
+	/* enable noc remap to mimic legacy loaders */
+	rk_clrsetreg(&grf->soc_con0, NOC_REMAP_MASK, NOC_REMAP_MASK);
+
+	return 0;
+}
+
+int board_init(void)
+{
+#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
+	struct udevice *pinctrl;
+	int ret;
+
+	/*
+	 * We need to implement sdcard iomux here for the further
+	 * initialization, otherwise, it'll hit sdcard command sending
+	 * timeout exception.
+	 */
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: Cannot find pinctrl device\n", __func__);
+		goto err;
+	}
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
+	if (ret) {
+		debug("%s: Failed to set up SD card\n", __func__);
+		goto err;
+	}
+
+	return 0;
+err:
+	debug("board_init: Error %d\n", ret);
+
+	/* No way to report error here */
+	hang();
+
+	return -1;
+#else
+	return 0;
+#endif
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3066_otg_data = {
+	.rx_fifo_sz	= 275,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 256,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	int node, phy_node;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+	u32 grf_phy_offset;
+
+	/* find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"rockchip,rk3066-usb");
+
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node,
+					"rockchip,rk3066-usb");
+	}
+	if (!matched) {
+		debug("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+	rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	node = fdtdec_lookup_phandle(blob, node, "phys");
+	if (node <= 0) {
+		debug("Not found usb phy device\n");
+		return -ENODEV;
+	}
+
+	phy_node = fdt_parent_offset(blob, node);
+	if (phy_node <= 0) {
+		debug("Not found usb phy device\n");
+		return -ENODEV;
+	}
+
+	rk3066_otg_data.phy_of_node = phy_node;
+	grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
+
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"rockchip,rk3066-grf");
+	if (node <= 0) {
+		debug("Not found grf device\n");
+		return -ENODEV;
+	}
+	rk3066_otg_data.regs_phy = grf_phy_offset +
+				fdtdec_get_addr(blob, node, "reg");
+
+	return dwc2_udc_probe(&rk3066_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig
new file mode 100644
index 0000000000..89a48d2951
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/Kconfig
@@ -0,0 +1,29 @@
+if ROCKCHIP_RK3066
+
+config TARGET_MK808_RK3066
+        bool "MK808_RK3066"
+	help
+	  MK808 is a tv stick with usb host and otg, microsd card slot, hdmi and wifi.
+
+config SYS_SOC
+        default "rockchip"
+
+config SYS_MALLOC_F_LEN
+        default 0x0800
+
+config SPL_LIBCOMMON_SUPPORT
+        default y
+
+config SPL_LIBGENERIC_SUPPORT
+        default y
+
+config SPL_SERIAL_SUPPORT
+        default y
+
+config TPL_LIBCOMMON_SUPPORT
+        default y
+
+config TPL_LIBGENERIC_SUPPORT
+        default y
+
+endif
diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
new file mode 100644
index 0000000000..61b7fd41a6
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-y += clk_rk3066.o
+obj-y += syscon_rk3066.o
diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
new file mode 100644
index 0000000000..ae529027f8
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2016 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3066.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3066a_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk3066_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
new file mode 100644
index 0000000000..57b2376182
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3066_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC },
+	{ .compatible = "rockchip,rk3066-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rk3066-pmu", .data = ROCKCHIP_SYSCON_PMU },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3066) = {
+	.name = "rk3066_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids,
+};
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int rk3066_syscon_bind_of_platdata(struct udevice *dev)
+{
+	dev->driver_data = dev->driver->of_match->data;
+	debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(rockchip_rk3188_noc) = {
+	.name = "rockchip_rk3188_noc",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids,
+	.bind = rk3066_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3066_grf) = {
+	.name = "rockchip_rk3066_grf",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids + 1,
+	.bind = rk3066_syscon_bind_of_platdata,
+};
+
+U_BOOT_DRIVER(rockchip_rk3066_pmu) = {
+	.name = "rockchip_rk3066_pmu",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3066_syscon_ids + 2,
+	.bind = rk3066_syscon_bind_of_platdata,
+};
+#endif
diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
new file mode 100644
index 0000000000..7e9664303d
--- /dev/null
+++ b/include/configs/rk3066_common.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3066_COMMON_H
+#define __CONFIG_RK3066_COMMON_H
+
+#include <asm/arch/hardware.h>
+#include "rockchip-common.h"
+
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_MALLOC_LEN		(64 << 20)
+#define CONFIG_SYS_CBSIZE		256
+
+#define CONFIG_SYS_SDRAM_BASE		0x60000000
+#define CONFIG_NR_DRAM_BANKS		1
+#define SDRAM_BANK_SIZE			(1024UL << 20UL)
+#define SDRAM_MAX_SIZE			CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
+
+#define CONFIG_SYS_TIMER_RATE		24000000
+#define CONFIG_SYS_TIMER_BASE		0x20038000
+#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 4)
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
+
+#define CONFIG_SYS_TEXT_BASE		0x60408000
+#define CONFIG_SYS_INIT_SP_ADDR		0x78000000
+#define CONFIG_SYS_LOAD_ADDR		0x70800800
+
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_SPL_FRAMEWORK
+
+#define CONFIG_SYS_MAX_NAND_DEVICE	8
+
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SPL_TEXT_BASE		0x10080C04
+#define CONFIG_SPL_STACK		0x1008FFFF
+/* tpl size max 32kb - 4byte RK30 header */
+#define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x4)
+#elif defined(CONFIG_SPL_BUILD)
+/* spl size max 200k */
+#define CONFIG_SPL_MAX_SIZE		0x32000
+#define CONFIG_SPL_TEXT_BASE		0x60000000
+#define CONFIG_SPL_STACK		0x1008FFFF
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_LOAD
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_INIT
+#define CONFIG_SPL_NAND_BBT
+#define CONFIG_SPL_NAND_IDS
+#define CONFIG_SPL_NAND_UTIL
+#define CONFIG_SPL_NAND_RAW_ONLY
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
+#define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS
+#define CONFIG_MTD_DEVICE
+#endif
+
+#include <config_distro_defaults.h>
+
+#ifndef CONFIG_SPL_BUILD
+
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
+#define CONFIG_MTD_DEVICE
+#define MTDIDS_DEFAULT			"nand0=rockchip-nand.0"
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x60000000\0" \
+	"pxefile_addr_r=0x60100000\0" \
+	"fdt_addr_r=0x61f00000\0" \
+	"kernel_addr_r=0x62000000\0" \
+	"ramdisk_addr_r=0x64000000\0"
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"fdt_high=0x6fffffff\0" \
+	"initrd_high=0x6fffffff\0" \
+	"partitions=" PARTS_DEFAULT \
+	"mtdids=" MTDIDS_DEFAULT "\0" \
+	ENV_MEM_LAYOUT_SETTINGS \
+	ROCKCHIP_DEVICE_SETTINGS \
+	BOOTENV
+
+#endif
+
+#define CONFIG_PREBOOT
+
+#endif

commit 2c67c6667b5a71f797886cb45c2da62bef53bbb9
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:12:57 2017 +0200

    rockchip: rk3066: add rk3066 platform devicetree file
    
    rk3066 peripherials include usb, i2c, pwm, gpio, sdio, sdmmc, emmc, spi,
    watchdog and uart
    
    Change-Id: I38f07257bab251f043031028f2739ec9c861d014
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi
new file mode 100644
index 0000000000..92ee1c2aa0
--- /dev/null
+++ b/arch/arm/dts/rk3066a.dtsi
@@ -0,0 +1,707 @@
+/*
+ * Copyright (c) 2013 MundoReader S.L.
+ * Author: Heiko Stuebner <heiko@sntech.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3066a-cru.h>
+#include "rk3xxx.dtsi"
+
+/ {
+	compatible = "rockchip,rk3066a";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		enable-method = "rockchip,rk3066-smp";
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			next-level-cache = <&L2>;
+			reg = <0x0>;
+			operating-points = <
+				/* kHz    uV */
+				1416000 1300000
+				1200000 1175000
+				1008000 1125000
+				816000  1125000
+				600000  1100000
+				504000  1100000
+				312000  1075000
+			>;
+			clock-latency = <40000>;
+			clocks = <&cru ARMCLK>;
+		};
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			next-level-cache = <&L2>;
+			reg = <0x1>;
+		};
+	};
+
+	sram: sram@10080000 {
+		compatible = "mmio-sram";
+		reg = <0x10080000 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x10080000 0x10000>;
+
+		smp-sram@0 {
+			compatible = "rockchip,rk3066-smp-sram";
+			reg = <0x0 0x50>;
+		};
+	};
+
+	i2s0: i2s@10118000 {
+		compatible = "rockchip,rk3066-i2s";
+		reg = <0x10118000 0x2000>;
+		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s0_bus>;
+		dmas = <&dmac1_s 4>, <&dmac1_s 5>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_hclk", "i2s_clk";
+		clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
+		rockchip,playback-channels = <8>;
+		rockchip,capture-channels = <2>;
+		status = "disabled";
+	};
+
+	i2s1: i2s@1011a000 {
+		compatible = "rockchip,rk3066-i2s";
+		reg = <0x1011a000 0x2000>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s1_bus>;
+		dmas = <&dmac1_s 6>, <&dmac1_s 7>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_hclk", "i2s_clk";
+		clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>;
+		rockchip,playback-channels = <2>;
+		rockchip,capture-channels = <2>;
+		status = "disabled";
+	};
+
+	i2s2: i2s@1011c000 {
+		compatible = "rockchip,rk3066-i2s";
+		reg = <0x1011c000 0x2000>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2s2_bus>;
+		dmas = <&dmac1_s 9>, <&dmac1_s 10>;
+		dma-names = "tx", "rx";
+		clock-names = "i2s_hclk", "i2s_clk";
+		clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>;
+		rockchip,playback-channels = <2>;
+		rockchip,capture-channels = <2>;
+		status = "disabled";
+	};
+
+	nandc: nandc@10500000 {
+		compatible = "rockchip,nandc";
+		reg = <0x10500000 0x2000>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+		clock-names = "hclk";
+		clocks = <&cru HCLK_NANDC0>;
+		status = "disabled";
+	};
+
+	cru: clock-controller@20000000 {
+		compatible = "rockchip,rk3066a-cru";
+		reg = <0x20000000 0x1000>;
+		rockchip,grf = <&grf>;
+		u-boot,dm-pre-reloc;
+
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>,
+				  <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+				  <&cru PCLK_CPU>, <&cru ACLK_PERI>,
+				  <&cru HCLK_PERI>, <&cru PCLK_PERI>;
+		assigned-clock-rates = <400000000>, <594000000>,
+				       <300000000>, <150000000>,
+				       <75000000>, <300000000>,
+				       <150000000>, <75000000>;
+	};
+
+	timer@2000e000 {
+		compatible = "snps,dw-apb-timer-osc";
+		reg = <0x2000e000 0x100>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>;
+		clock-names = "timer", "pclk";
+	};
+
+	efuse: efuse@20010000 {
+		compatible = "rockchip,rk3066a-efuse";
+		reg = <0x20010000 0x4000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru PCLK_EFUSE>;
+		clock-names = "pclk_efuse";
+
+		cpu_leakage: cpu_leakage@17 {
+			reg = <0x17 0x1>;
+		};
+	};
+
+	timer@20038000 {
+		compatible = "snps,dw-apb-timer-osc";
+		reg = <0x20038000 0x100>;
+		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>;
+		clock-names = "timer", "pclk";
+	};
+
+	timer@2003a000 {
+		compatible = "snps,dw-apb-timer-osc";
+		reg = <0x2003a000 0x100>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TIMER1>, <&cru PCLK_TIMER1>;
+		clock-names = "timer", "pclk";
+	};
+
+	tsadc: tsadc@20060000 {
+		compatible = "rockchip,rk3066-tsadc";
+		reg = <0x20060000 0x100>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "saradc", "apb_pclk";
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
+	usbphy: phy {
+		compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		usbphy0: usb-phy@17c {
+			#phy-cells = <0>;
+			reg = <0x17c>;
+			clocks = <&cru SCLK_OTGPHY0>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+		};
+
+		usbphy1: usb-phy@188 {
+			#phy-cells = <0>;
+			reg = <0x188>;
+			clocks = <&cru SCLK_OTGPHY1>;
+			clock-names = "phyclk";
+			#clock-cells = <0>;
+		};
+	};
+
+	pinctrl: pinctrl {
+		compatible = "rockchip,rk3066a-pinctrl";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		u-boot,dm-pre-reloc;
+
+		gpio0: gpio0@20034000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20034000 0x100>;
+			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@2003c000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2003c000 0x100>;
+			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@2003e000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2003e000 0x100>;
+			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio3@20080000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20080000 0x100>;
+			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio4: gpio4@20084000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20084000 0x100>;
+			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO4>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio6: gpio6@2000a000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2000a000 0x100>;
+			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO6>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_default: pcfg_pull_default {
+			bias-pull-pin-default;
+		};
+
+		pcfg_pull_none: pcfg_pull_none {
+			bias-disable;
+		};
+
+		emac {
+			emac_xfer: emac-xfer {
+				rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
+						<RK_GPIO1 17 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
+						<RK_GPIO1 18 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
+						<RK_GPIO1 19 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
+						<RK_GPIO1 20 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
+						<RK_GPIO1 21 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */
+						<RK_GPIO1 22 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
+						<RK_GPIO1 23 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */
+			};
+
+			emac_mdio: emac-mdio {
+				rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
+						<RK_GPIO1 25 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */
+			};
+		};
+
+		emmc {
+			emmc_clk: emmc-clk {
+				rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>;
+			};
+
+			emmc_rst: emmc-rst {
+				rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>;
+			};
+
+			/*
+			 * The data pins are shared between nandc and emmc and
+			 * not accessible through pinctrl. Also they should've
+			 * been already set correctly by firmware, as
+			 * flash/emmc is the boot-device.
+			 */
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO2 29 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins = <RK_GPIO2 30 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO2 31 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins = <RK_GPIO3 0 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins = <RK_GPIO3 2 RK_FUNC_2 &pcfg_pull_none>,
+						<RK_GPIO3 3 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		i2c4 {
+			i2c4_xfer: i2c4-xfer {
+				rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
+						<RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm0 {
+			pwm0_out: pwm0-out {
+				rockchip,pins = <RK_GPIO0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_out: pwm1-out {
+				rockchip,pins = <RK_GPIO0 4 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_out: pwm2-out {
+				rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_out: pwm3-out {
+				rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_clk: spi0-clk {
+				rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_cs0: spi0-cs0 {
+				rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_tx: spi0-tx {
+				rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_rx: spi0-rx {
+				rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi0_cs1: spi0-cs1 {
+				rockchip,pins = <RK_GPIO4 15 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		spi1 {
+			spi1_clk: spi1-clk {
+				rockchip,pins = <RK_GPIO2 19 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_cs0: spi1-cs0 {
+				rockchip,pins = <RK_GPIO2 20 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_rx: spi1-rx {
+				rockchip,pins = <RK_GPIO2 22 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_tx: spi1-tx {
+				rockchip,pins = <RK_GPIO2 21 RK_FUNC_2 &pcfg_pull_default>;
+			};
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <RK_GPIO2 23 RK_FUNC_2 &pcfg_pull_default>;
+			};
+		};
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart1_cts: uart1-cts {
+				rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart1_rts: uart1-rts {
+				rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		uart2 {
+			uart2_xfer: uart2-xfer {
+				rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_default>;
+			};
+			/* no rts / cts for uart2 */
+		};
+
+		uart3 {
+			uart3_xfer: uart3-xfer {
+				rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart3_cts: uart3-cts {
+				rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			uart3_rts: uart3-rts {
+				rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		sd0 {
+			sd0_clk: sd0-clk {
+				rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_cmd: sd0-cmd {
+				rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_cd: sd0-cd {
+				rockchip,pins = <RK_GPIO3 14 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_wp: sd0-wp {
+				rockchip,pins = <RK_GPIO3 15 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_bus1: sd0-bus-width1 {
+				rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd0_bus4: sd0-bus-width4 {
+				rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 11 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 12 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 13 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		sd1 {
+			sd1_clk: sd1-clk {
+				rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_cmd: sd1-cmd {
+				rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_cd: sd1-cd {
+				rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_wp: sd1-wp {
+				rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_bus1: sd1-bus-width1 {
+				rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>;
+			};
+
+			sd1_bus4: sd1-bus-width4 {
+				rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		i2s0 {
+			i2s0_bus: i2s0-bus {
+				rockchip,pins = <RK_GPIO0 7 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 8 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 9 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 10 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 11 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 12 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 13 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 14 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 15 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		i2s1 {
+			i2s1_bus: i2s1-bus {
+				rockchip,pins = <RK_GPIO0 16 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 17 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 18 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 19 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 20 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 21 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+
+		i2s2 {
+			i2s2_bus: i2s2-bus {
+				rockchip,pins = <RK_GPIO0 24 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 25 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 26 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 27 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_default>,
+						<RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_default>;
+			};
+		};
+	};
+};
+
+&grf {
+	compatible = "rockchip,rk3066-grf", "syscon";
+};
+
+&i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_xfer>;
+};
+
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_xfer>;
+};
+
+&i2c2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_xfer>;
+};
+
+&i2c3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c3_xfer>;
+};
+
+&i2c4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c4_xfer>;
+};
+
+&mmc0 {
+	clock-frequency = <50000000>;
+	dmas = <&dmac2 1>;
+	dma-names = "rx-tx";
+	max-frequency = <50000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>;
+	u-boot,dm-pre-reloc;
+};
+
+&mmc1 {
+	dmas = <&dmac2 3>;
+	dma-names = "rx-tx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus4>;
+};
+
+&emmc {
+	dmas = <&dmac2 4>;
+	dma-names = "rx-tx";
+};
+
+&pwm0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_out>;
+};
+
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm1_out>;
+};
+
+&pwm2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm2_out>;
+};
+
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm3_out>;
+};
+
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
+};
+
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
+};
+
+&uart0 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac1_s 0>, <&dmac1_s 1>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer>;
+};
+
+&uart1 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac1_s 2>, <&dmac1_s 3>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_xfer>;
+};
+
+&uart2 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac2 6>, <&dmac2 7>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_xfer>;
+};
+
+&uart3 {
+	compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart";
+	dmas = <&dmac2 8>, <&dmac2 9>;
+	dma-names = "tx", "rx";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_xfer>;
+};
+
+&wdt {
+	compatible = "rockchip,rk3066-wdt", "snps,dw-wdt";
+};
+
+&emac {
+	compatible = "rockchip,rk3066-emac";
+};

commit 4931c6fb28511c3f74ac546161ce1d3223c9e536
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:12:44 2017 +0200

    rockchip: rk3066: add clock driver for rk3066 soc
    
    Add clock driver for rk3066 platform.
    
    Change-Id: I15527fb77c3b9a46a25df2ff51f4a78cf3808ea0
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
new file mode 100644
index 0000000000..c4a6951633
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
@@ -0,0 +1,189 @@
+/*
+ * (C) Copyright 2016 Heiko Stuebner <heiko@sntech.de>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_CRU_RK3066_H
+#define _ASM_ARCH_CRU_RK3066_H
+
+#define OSC_HZ		(24 * 1000 * 1000)
+
+#define APLL_HZ		(1416 * 1000000)
+#define APLL_SAFE_HZ	(600 * 1000000)
+#define GPLL_HZ		(594 * 1000000)
+#define CPLL_HZ		(384 * 1000000)
+
+/* The SRAM is clocked off aclk_cpu, so we want to max it out for boot speed */
+#define CPU_ACLK_HZ	297000000
+#define CPU_HCLK_HZ	148500000
+#define CPU_PCLK_HZ	74250000
+#define CPU_H2P_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3066_clk_priv {
+	struct rk3066_grf *grf;
+	struct rk3066_cru *cru;
+	ulong rate;
+	bool has_bwadj;
+};
+
+struct rk3066_cru {
+	struct rk3066_pll {
+		u32 con0;
+		u32 con1;
+		u32 con2;
+		u32 con3;
+	} pll[4];
+	u32 cru_mode_con;
+	u32 cru_clksel_con[35];
+	u32 cru_clkgate_con[10];
+	u32 reserved1[2];
+	u32 cru_glb_srst_fst_value;
+	u32 cru_glb_srst_snd_value;
+	u32 reserved2[2];
+	u32 cru_softrst_con[9];
+	u32 cru_misc_con;
+	u32 reserved3[2];
+	u32 cru_glb_cnt_th;
+};
+check_member(rk3066_cru, cru_glb_cnt_th, 0x0140);
+
+/* CRU_CLKSEL0_CON */
+enum {
+	/* a9_core_div: core = core_src / (a9_core_div + 1) */
+	A9_CORE_DIV_SHIFT	= 9,
+	A9_CORE_DIV_MASK	= 0x1f << A9_CORE_DIV_SHIFT,
+	CORE_PLL_SHIFT		= 8,
+	CORE_PLL_MASK		= 1 << CORE_PLL_SHIFT,
+	CORE_PLL_SELECT_APLL	= 0,
+	CORE_PLL_SELECT_GPLL,
+
+	/* core peri div: core:core_peri = 2:1, 4:1, 8:1 or 16:1 */
+	CORE_PERI_DIV_SHIFT	= 6,
+	CORE_PERI_DIV_MASK	= 3 << CORE_PERI_DIV_SHIFT,
+
+	/* aclk_cpu pll selection */
+	CPU_ACLK_PLL_SHIFT	= 5,
+	CPU_ACLK_PLL_MASK	= 1 << CPU_ACLK_PLL_SHIFT,
+	CPU_ACLK_PLL_SELECT_APLL	= 0,
+	CPU_ACLK_PLL_SELECT_GPLL,
+
+	/* a9_cpu_div: aclk_cpu = cpu_src / (a9_cpu_div + 1) */
+	A9_CPU_DIV_SHIFT	= 0,
+	A9_CPU_DIV_MASK		= 0x1f << A9_CPU_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL1_CON */
+enum {
+	/* ahb2apb_pclk_div: hclk_cpu:pclk_cpu = 1:1, 2:1 or 4:1 */
+	AHB2APB_DIV_SHIFT	= 14,
+	AHB2APB_DIV_MASK	= 3 << AHB2APB_DIV_SHIFT,
+
+	/* cpu_pclk_div: aclk_cpu:pclk_cpu = 1:1, 2:1, 4:1 or 8:1 */
+	CPU_PCLK_DIV_SHIFT	= 12,
+	CPU_PCLK_DIV_MASK	= 3 << CPU_PCLK_DIV_SHIFT,
+
+	/* cpu_hclk_div: aclk_cpu:hclk_cpu = 1:1, 2:1 or 4:1 */
+	CPU_HCLK_DIV_SHIFT	= 8,
+	CPU_HCLK_DIV_MASK	= 3 << CPU_HCLK_DIV_SHIFT,
+
+	/* core_aclk_div: cire:aclk_core = 1:1, 2:1, 3:1, 4:1 or 8:1 */
+	CORE_ACLK_DIV_SHIFT	= 3,
+	CORE_ACLK_DIV_MASK	= 7 << CORE_ACLK_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL10_CON */
+enum {
+	PERI_SEL_PLL_SHIFT	= 15,
+	PERI_SEL_PLL_MASK	= 1 << PERI_SEL_PLL_SHIFT,
+	PERI_SEL_CPLL		= 0,
+	PERI_SEL_GPLL,
+
+	/* peri pclk div: aclk_bus:pclk_bus = 1:1, 2:1, 4:1 or 8:1 */
+	PERI_PCLK_DIV_SHIFT	= 12,
+	PERI_PCLK_DIV_MASK	= 3 << PERI_PCLK_DIV_SHIFT,
+
+	/* peripheral bus hclk div:aclk_bus: hclk_bus = 1:1, 2:1 or 4:1 */
+	PERI_HCLK_DIV_SHIFT	= 8,
+	PERI_HCLK_DIV_MASK	= 3 << PERI_HCLK_DIV_SHIFT,
+
+	/* peri aclk div: aclk_peri = periph_src / (peri_aclk_div + 1) */
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+};
+/* CRU_CLKSEL11_CON */
+enum {
+	MMC0_DIV_SHIFT		= 0,
+	MMC0_DIV_MASK		= 0x3f << MMC0_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL12_CON */
+enum {
+	UART_PLL_SHIFT		= 15,
+	UART_PLL_MASK		= 1 << UART_PLL_SHIFT,
+	UART_PLL_SELECT_GENERAL	= 0,
+	UART_PLL_SELECT_CODEC,
+
+	EMMC_DIV_SHIFT		= 8,
+	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
+
+	SDIO_DIV_SHIFT		= 0,
+	SDIO_DIV_MASK		= 0x3f << SDIO_DIV_SHIFT,
+};
+
+/* CRU_CLKSEL25_CON */
+enum {
+	SPI1_DIV_SHIFT		= 8,
+	SPI1_DIV_MASK		= 0x7f << SPI1_DIV_SHIFT,
+
+	SPI0_DIV_SHIFT		= 0,
+	SPI0_DIV_MASK		= 0x7f << SPI0_DIV_SHIFT,
+};
+
+/* CRU_MODE_CON */
+enum {
+	GPLL_MODE_SHIFT		= 12,
+	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
+	GPLL_MODE_SLOW		= 0,
+	GPLL_MODE_NORMAL,
+	GPLL_MODE_DEEP,
+
+	CPLL_MODE_SHIFT		= 8,
+	CPLL_MODE_MASK		= 3 << CPLL_MODE_SHIFT,
+	CPLL_MODE_SLOW		= 0,
+	CPLL_MODE_NORMAL,
+	CPLL_MODE_DEEP,
+
+	DPLL_MODE_SHIFT		= 4,
+	DPLL_MODE_MASK		= 3 << DPLL_MODE_SHIFT,
+	DPLL_MODE_SLOW		= 0,
+	DPLL_MODE_NORMAL,
+	DPLL_MODE_DEEP,
+
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 3 << APLL_MODE_SHIFT,
+	APLL_MODE_SLOW		= 0,
+	APLL_MODE_NORMAL,
+	APLL_MODE_DEEP,
+};
+
+/* CRU_APLL_CON0 */
+enum {
+	CLKR_SHIFT		= 8,
+	CLKR_MASK		= 0x3f << CLKR_SHIFT,
+
+	CLKOD_SHIFT		= 0,
+	CLKOD_MASK		= 0x3f << CLKOD_SHIFT,
+};
+
+/* CRU_APLL_CON1 */
+enum {
+	CLKF_SHIFT		= 0,
+	CLKF_MASK		= 0x1fff << CLKF_SHIFT,
+};
+
+#endif
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index eae0ef6a9f..c662de1230 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
+obj-$(CONFIG_ROCKCHIP_RK3066) += clk_rk3066.o
 obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
new file mode 100644
index 0000000000..e15273268e
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -0,0 +1,611 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * (C) Copyright 2016 Heiko Stuebner <heiko@sntech.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <mapmem.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3066.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/hardware.h>
+#include <dt-bindings/clock/rk3066a-cru.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/uclass-internal.h>
+#include <linux/log2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum rk3066_clk_type {
+	RK3066_CRU,
+	RK3066A_CRU,
+};
+
+struct rk3066_clk_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rk3066a_cru dtd;
+#endif
+};
+
+struct pll_div {
+	u32 nr;
+	u32 nf;
+	u32 no;
+};
+
+enum {
+	VCO_MAX_HZ	= 1416U * 1000000,
+	VCO_MIN_HZ	= 300 * 1000000,
+	OUTPUT_MAX_HZ	= 1416U * 1000000,
+	OUTPUT_MIN_HZ	= 30 * 1000000,
+	FREF_MAX_HZ	= 1416U * 1000000,
+	FREF_MIN_HZ	= 30 * 1000,
+};
+
+enum {
+	/* PLL CON0 */
+	PLL_OD_MASK		= 0x0f,
+
+	/* PLL CON1 */
+	PLL_NF_MASK		= 0x1fff,
+
+	/* PLL CON2 */
+	PLL_BWADJ_MASK		= 0x0fff,
+
+	/* PLL CON3 */
+	PLL_RESET_SHIFT		= 5,
+
+	/* GRF_SOC_STATUS0 */
+	SOCSTS_DPLL_LOCK	= 1 << 4,
+	SOCSTS_APLL_LOCK	= 1 << 5,
+	SOCSTS_CPLL_LOCK	= 1 << 6,
+	SOCSTS_GPLL_LOCK	= 1 << 7,
+};
+
+#define RATE_TO_DIV(input_rate, output_rate) \
+	((input_rate) / (output_rate) - 1);
+
+#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _nr, _no) {\
+	.nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
+	_Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
+		       (_nr * _no) == hz, #hz "Hz cannot be hit with PLL "\
+		       "divisors on line " __stringify(__LINE__));
+
+/* Keep divisors as low as possible to reduce jitter and power usage */
+#ifdef CONFIG_TPL_BUILD
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
+static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
+#endif
+
+static int rkclk_set_pll(struct rk3066_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div, bool has_bwadj)
+{
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3066_pll *pll = &cru->pll[pll_id];
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000;
+	uint output_hz = vco_hz / div->no;
+
+	debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n",
+	      (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ &&
+	       (div->no == 1 || !(div->no % 2)));
+
+	/* enter reset */
+	rk_setreg(&pll->con3, 1 << PLL_RESET_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     CLKR_MASK | PLL_OD_MASK,
+		     ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1));
+	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);
+
+	if (has_bwadj)
+		rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);
+
+	udelay(10);
+
+	/* return from reset */
+	rk_clrreg(&pll->con3, 1 << PLL_RESET_SHIFT);
+
+	return 0;
+}
+
+static int rkclk_configure_ddr(struct rk3066_cru *cru, struct rk3066_grf *grf,
+			       unsigned int hz, bool has_bwadj)
+{
+	static const struct pll_div dpll_cfg[] = {
+		{.nf = 25, .nr = 2, .no = 1},
+		{.nf = 400, .nr = 9, .no = 2},
+		{.nf = 500, .nr = 9, .no = 2},
+		{.nf = 100, .nr = 3, .no = 1},
+	};
+	int cfg;
+
+	switch (hz) {
+	case 300000000:
+		cfg = 0;
+		break;
+	case 533000000:	/* actually 533.3P MHz */
+		cfg = 1;
+		break;
+	case 666000000:	/* actually 666.6P MHz */
+		cfg = 2;
+		break;
+	case 800000000:
+		cfg = 3;
+		break;
+	default:
+		debug("Unsupported SDRAM frequency");
+		return -EINVAL;
+	}
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
+		     DPLL_MODE_SLOW << DPLL_MODE_SHIFT);
+
+	rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg], has_bwadj);
+
+	/* wait for pll lock */
+	while (!(readl(&grf->soc_status0) & SOCSTS_DPLL_LOCK))
+		udelay(1);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,
+		     DPLL_MODE_NORMAL << DPLL_MODE_SHIFT);
+
+	return 0;
+}
+
+static int rkclk_configure_cpu(struct rk3066_cru *cru, struct rk3066_grf *grf,
+			      unsigned int hz, bool has_bwadj)
+{
+	static const struct pll_div apll_cfg[] = {
+		{.nf = 50, .nr = 1, .no = 2},
+		{.nf = 59, .nr = 1, .no = 1},
+	};
+	int div_core_peri, div_aclk_core, cfg;
+
+	/*
+	 * We support two possible frequencies, the safe 600MHz
+	 * which will work with default pmic settings and will
+	 * be set to get away from the 24MHz default and
+	 * the maximum of 1.416Ghz, which boards can set if they
+	 * were able to get pmic support for it.
+	 */
+	switch (hz) {
+	case APLL_SAFE_HZ:
+		cfg = 0;
+		div_core_peri = 1;
+		div_aclk_core = 3;
+		break;
+	case APLL_HZ:
+		cfg = 1;
+		div_core_peri = 2;
+		div_aclk_core = 3;
+		break;
+	default:
+		debug("Unsupported ARMCLK frequency");
+		return -EINVAL;
+	}
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,
+		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+
+	rkclk_set_pll(cru, CLK_ARM, &apll_cfg[cfg], has_bwadj);
+
+	/* waiting for pll lock */
+	while (!(readl(&grf->soc_status0) & SOCSTS_APLL_LOCK))
+		udelay(1);
+
+	/* Set divider for peripherals attached to the cpu core. */
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		CORE_PERI_DIV_MASK,
+		div_core_peri << CORE_PERI_DIV_SHIFT);
+
+	/* set up dependent divisor for aclk_core */
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		CORE_ACLK_DIV_MASK,
+		div_aclk_core << CORE_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,
+		     APLL_MODE_NORMAL << APLL_MODE_SHIFT);
+
+	return hz;
+}
+
+/* Get pll rate by id */
+static uint32_t rkclk_pll_get_rate(struct rk3066_cru *cru,
+				   enum rk_clk_id clk_id)
+{
+	uint32_t nr, no, nf;
+	uint32_t con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3066_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
+		GPLL_MODE_SHIFT
+	};
+	uint shift;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	switch ((con >> shift) & APLL_MODE_MASK >> APLL_MODE_SHIFT) {
+	case APLL_MODE_SLOW:
+		return OSC_HZ;
+	case APLL_MODE_NORMAL:
+		/* normal mode */
+		con = readl(&pll->con0);
+		no = ((con >> CLKOD_SHIFT) & (CLKOD_MASK >> CLKOD_SHIFT)) + 1;
+		nr = ((con >> CLKR_SHIFT) & (CLKR_MASK >> CLKR_SHIFT)) + 1;
+		con = readl(&pll->con1);
+		nf = ((con >> CLKF_SHIFT) & (CLKF_MASK >> CLKF_SHIFT)) + 1;
+
+		return (24 * nf / (nr * no)) * 1000000;
+	case APLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+static ulong rockchip_mmc_get_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int periph)
+{
+	uint div;
+	u32 con;
+
+	switch (periph) {
+	case HCLK_EMMC:
+		con = readl(&cru->cru_clksel_con[12]);
+		div = (con >> EMMC_DIV_SHIFT) & EMMC_DIV_MASK >> EMMC_DIV_SHIFT;
+		break;
+	case HCLK_SDMMC:
+		con = readl(&cru->cru_clksel_con[11]);
+		div = (con >> MMC0_DIV_SHIFT) & MMC0_DIV_MASK >> MMC0_DIV_SHIFT;
+		break;
+	case HCLK_SDIO:
+		con = readl(&cru->cru_clksel_con[12]);
+		div = (con >> SDIO_DIV_SHIFT) & SDIO_DIV_MASK >> SDIO_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(gclk_rate, div);
+}
+
+static ulong rockchip_mmc_set_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int  periph, uint freq)
+{
+	int src_clk_div;
+
+	debug("%s: gclk_rate=%u\n", __func__, gclk_rate);
+	src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+	if (src_clk_div > 0x3f)
+		src_clk_div = 0x3f;
+
+	switch (periph) {
+	case HCLK_EMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     EMMC_DIV_MASK,
+			     src_clk_div << EMMC_DIV_SHIFT);
+		break;
+	case HCLK_SDMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     MMC0_DIV_MASK,
+			     src_clk_div << MMC0_DIV_SHIFT);
+		break;
+	case HCLK_SDIO:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     SDIO_DIV_MASK,
+			     src_clk_div << SDIO_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_mmc_get_clk(cru, gclk_rate, periph);
+}
+
+static ulong rockchip_spi_get_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int periph)
+{
+	uint div;
+	u32 con;
+
+	switch (periph) {
+	case SCLK_SPI0:
+		con = readl(&cru->cru_clksel_con[25]);
+		div = (con >> SPI0_DIV_SHIFT) & SPI0_DIV_MASK >> SPI0_DIV_SHIFT;
+		break;
+	case SCLK_SPI1:
+		con = readl(&cru->cru_clksel_con[25]);
+		div = (con >> SPI1_DIV_SHIFT) & SPI1_DIV_MASK >> SPI1_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(gclk_rate, div);
+}
+
+static ulong rockchip_spi_set_clk(struct rk3066_cru *cru, uint gclk_rate,
+				  int periph, uint freq)
+{
+	int src_clk_div = RATE_TO_DIV(gclk_rate, freq);
+
+	switch (periph) {
+	case SCLK_SPI0:
+		assert(src_clk_div <= SPI0_DIV_MASK >> SPI0_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[25],
+			     SPI0_DIV_MASK,
+			     src_clk_div << SPI0_DIV_SHIFT);
+		break;
+	case SCLK_SPI1:
+		assert(src_clk_div <= SPI1_DIV_MASK >> SPI1_DIV_SHIFT);
+		rk_clrsetreg(&cru->cru_clksel_con[25],
+			     SPI1_DIV_MASK,
+			     src_clk_div << SPI1_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_spi_get_clk(cru, gclk_rate, periph);
+}
+#ifdef CONFIG_TPL_BUILD
+static void rkclk_init(struct rk3066_cru *cru, struct rk3066_grf *grf,
+		       bool has_bwadj)
+{
+	u32 aclk_div, hclk_div, pclk_div, h2p_div;
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK |
+		     CPLL_MODE_MASK,
+		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
+		     CPLL_MODE_SLOW << CPLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg, has_bwadj);
+	rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg, has_bwadj);
+
+	/* waiting for pll lock */
+	while ((readl(&grf->soc_status0) &
+			(SOCSTS_CPLL_LOCK | SOCSTS_GPLL_LOCK)) !=
+			(SOCSTS_CPLL_LOCK | SOCSTS_GPLL_LOCK))
+		udelay(1);
+
+	/*
+	 * cpu clock pll source selection and
+	 * reparent aclk_cpu_pre from apll to gpll
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = RATE_TO_DIV(GPLL_HZ, CPU_ACLK_HZ);
+	assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     CPU_ACLK_PLL_MASK |
+		     A9_CPU_DIV_MASK,
+		     CPU_ACLK_PLL_SELECT_GPLL << CPU_ACLK_PLL_SHIFT |
+		     aclk_div << A9_CPU_DIV_SHIFT);
+
+	hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ);
+	assert((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3);
+	pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ);
+	assert((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4);
+	h2p_div = ilog2(CPU_HCLK_HZ / CPU_H2P_HZ);
+	assert((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     AHB2APB_DIV_MASK |
+		     CPU_PCLK_DIV_MASK |
+		     CPU_HCLK_DIV_MASK,
+		     h2p_div << AHB2APB_DIV_SHIFT |
+		     pclk_div << CPU_PCLK_DIV_SHIFT |
+		     hclk_div << CPU_HCLK_DIV_SHIFT);
+
+	/*
+	 * peri clock pll source selection and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
+	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+		PERI_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
+	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+		PERI_ACLK_HZ && (pclk_div < 0x4));
+
+	rk_clrsetreg(&cru->cru_clksel_con[10],
+		     PERI_PCLK_DIV_MASK |
+		     PERI_HCLK_DIV_MASK |
+		     PERI_ACLK_DIV_MASK,
+		     PERI_SEL_GPLL << PERI_SEL_PLL_SHIFT |
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK |
+		     CPLL_MODE_MASK,
+		     GPLL_MODE_NORMAL << GPLL_MODE_SHIFT |
+		     CPLL_MODE_NORMAL << CPLL_MODE_SHIFT);
+
+	rockchip_mmc_set_clk(cru, PERI_HCLK_HZ, HCLK_SDMMC, 16000000);
+}
+#endif
+
+static ulong rk3066_clk_get_rate(struct clk *clk)
+{
+	struct rk3066_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong new_rate, gclk_rate;
+
+	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
+	switch (clk->id) {
+	case 1 ... 4:
+		new_rate = rkclk_pll_get_rate(priv->cru, clk->id);
+		break;
+	case HCLK_EMMC:
+	case HCLK_SDMMC:
+	case HCLK_SDIO:
+		new_rate = rockchip_mmc_get_clk(priv->cru, PERI_HCLK_HZ,
+						clk->id);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		new_rate = rockchip_spi_get_clk(priv->cru, PERI_PCLK_HZ,
+						clk->id);
+		break;
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+	case PCLK_I2C4:
+		return gclk_rate;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static ulong rk3066_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3066_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3066_cru *cru = priv->cru;
+	ulong new_rate;
+
+	switch (clk->id) {
+	case PLL_APLL:
+		new_rate = rkclk_configure_cpu(priv->cru, priv->grf, rate,
+					       priv->has_bwadj);
+		break;
+	case CLK_DDR:
+		new_rate = rkclk_configure_ddr(priv->cru, priv->grf, rate,
+					       priv->has_bwadj);
+		break;
+	case HCLK_EMMC:
+	case HCLK_SDMMC:
+	case HCLK_SDIO:
+		new_rate = rockchip_mmc_set_clk(cru, PERI_HCLK_HZ,
+						clk->id, rate);
+		break;
+	case SCLK_SPI0:
+	case SCLK_SPI1:
+		new_rate = rockchip_spi_set_clk(cru, PERI_PCLK_HZ,
+						clk->id, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static struct clk_ops rk3066_clk_ops = {
+	.get_rate	= rk3066_clk_get_rate,
+	.set_rate	= rk3066_clk_set_rate,
+};
+
+static int rk3066_clk_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3066_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct rk3066_cru *)devfdt_get_addr(dev);
+#endif
+
+	return 0;
+}
+
+static int rk3066_clk_probe(struct udevice *dev)
+{
+	struct rk3066_clk_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf))
+		return PTR_ERR(priv->grf);
+
+#ifdef CONFIG_TPL_BUILD
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3066_clk_plat *plat = dev_get_platdata(dev);
+
+	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
+#endif
+
+	rkclk_init(priv->cru, priv->grf, 1);
+#endif
+
+	return 0;
+}
+
+static int rk3066_clk_bind(struct udevice *dev)
+{
+	int ret;
+	struct udevice *sys_child, *sf_child;
+	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3066_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3066_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3066_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id rk3066_clk_ids[] = {
+	{ .compatible = "rockchip,rk3066a-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3066a_cru) = {
+	.name			= "rockchip_rk3066a_cru",
+	.id			= UCLASS_CLK,
+	.of_match		= rk3066_clk_ids,
+	.priv_auto_alloc_size	= sizeof(struct rk3066_clk_priv),
+	.platdata_auto_alloc_size = sizeof(struct rk3066_clk_plat),
+	.ops			= &rk3066_clk_ops,
+	.bind			= rk3066_clk_bind,
+	.ofdata_to_platdata	= rk3066_clk_ofdata_to_platdata,
+	.probe			= rk3066_clk_probe,
+};

commit 37012861905e16177ee6ce2621aadcf534e62def
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:12:16 2017 +0200

    rockchip: rk3066: add rk3066 pinctrl driver
    
    Add driver supporting pin multiplexing on rk3066 platform.
    
    Change-Id: Ibb8edea574939e646f1e3a09165d3ecfa1a283b6
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/periph.h b/arch/arm/include/asm/arch-rockchip/periph.h
index 9f4bc2e107..6c8c77dddb 100644
--- a/arch/arm/include/asm/arch-rockchip/periph.h
+++ b/arch/arm/include/asm/arch-rockchip/periph.h
@@ -43,6 +43,7 @@ enum periph_id {
 	PERIPH_ID_HDMI,
 	PERIPH_ID_GMAC,
 	PERIPH_ID_SFC,
+	PERIPH_ID_NAND,
 
 	PERIPH_ID_COUNT,
 
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 35a7c62963..4d0e958c41 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -178,6 +178,15 @@ config PINCTRL_ROCKCHIP_RK3128
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
+config PINCTRL_ROCKCHIP_RK3066
+        bool "Rockchip rk3066 pin control driver"
+        depends on DM
+        help
+          Support pin multiplexing control on Rockchip rk3066 SoCs. The driver is
+          controlled by a device tree node which contains both the GPIO
+          definitions and pin control functions for each available multiplex
+          function.
+
 config PINCTRL_ROCKCHIP_RK3188
 	bool "Rockchip rk3188 pin control driver"
 	depends on DM
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index f09c6e17b4..f846229ab2 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3066) += pinctrl_rk3066.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3128) += pinctrl_rk3128.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK322X) += pinctrl_rk322x.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3066.c b/drivers/pinctrl/rockchip/pinctrl_rk3066.c
new file mode 100644
index 0000000000..79e0a54d42
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3066.c
@@ -0,0 +1,340 @@
+/*
+ * Pinctrl driver for Rockchip 3066 SoCs
+ * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3066.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rk3066_pinctrl_priv {
+	struct rk3066_grf *grf;
+};
+
+static void pinctrl_rk3066_pwm_config(struct rk3066_grf *grf, int pwm_id)
+{
+	switch (pwm_id) {
+	case PERIPH_ID_PWM0:
+		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A3_MASK,
+			     GPIO0A3_PWM0 << GPIO0A3_SHIFT);
+		break;
+	case PERIPH_ID_PWM1:
+		rk_clrsetreg(&grf->gpio0a_iomux, GPIO0A4_MASK,
+			     GPIO0A4_PWM1 << GPIO0A4_SHIFT);
+		break;
+	case PERIPH_ID_PWM2:
+		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_MASK,
+			     GPIO0D6_PWM2 << GPIO0D6_SHIFT);
+		break;
+	case PERIPH_ID_PWM3:
+		rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D7_MASK,
+			     GPIO0D7_PWM3 << GPIO0D7_SHIFT);
+		break;
+	default:
+		debug("pwm id = %d iomux error!\n", pwm_id);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_i2c_config(struct rk3066_grf *grf, int i2c_id)
+{
+	switch (i2c_id) {
+	case PERIPH_ID_I2C0:
+		rk_clrsetreg(&grf->gpio2d_iomux,
+			     GPIO2D4_MASK | GPIO2D5_MASK,
+			     GPIO2D4_I2C0_SDA << GPIO2D4_SHIFT |
+			     GPIO2D5_I2C0_SCL << GPIO2D5_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C0_SEL_SHIFT,
+					     1 << RKI2C0_SEL_SHIFT);
+		break;
+	case PERIPH_ID_I2C1:
+		rk_clrsetreg(&grf->gpio2d_iomux,
+			     GPIO2D6_MASK | GPIO2D7_MASK,
+			     GPIO2D6_I2C1_SDA << GPIO2D6_SHIFT |
+			     GPIO2D7_I2C1_SCL << GPIO2D7_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C1_SEL_SHIFT,
+					     1 << RKI2C1_SEL_SHIFT);
+		break;
+	case PERIPH_ID_I2C2:
+		rk_clrsetreg(&grf->gpio3a_iomux,
+			     GPIO3A1_MASK | GPIO3A0_MASK,
+			     GPIO3A1_I2C2_SCL << GPIO3A1_SHIFT |
+			     GPIO3A0_I2C2_SDA << GPIO3A0_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C2_SEL_SHIFT,
+					     1 << RKI2C2_SEL_SHIFT);
+	case PERIPH_ID_I2C3:
+		rk_clrsetreg(&grf->gpio3a_iomux,
+			     GPIO3A3_MASK | GPIO3A2_MASK,
+			     GPIO3A3_I2C3_SCL << GPIO3A3_SHIFT |
+			     GPIO3A2_I2C3_SDA << GPIO3A2_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C3_SEL_SHIFT,
+					     1 << RKI2C3_SEL_SHIFT);
+	case PERIPH_ID_I2C4:
+		rk_clrsetreg(&grf->gpio3a_iomux,
+			     GPIO3A5_MASK | GPIO3A4_MASK,
+			     GPIO3A5_I2C4_SCL << GPIO3A5_SHIFT |
+			     GPIO3A4_I2C4_SDA << GPIO3A4_SHIFT);
+		rk_clrsetreg(&grf->soc_con1, 1 << RKI2C4_SEL_SHIFT,
+					     1 << RKI2C4_SEL_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_spi_config(struct rk3066_grf *grf, int spi_id, int cs)
+{
+	switch (spi_id) {
+	case PERIPH_ID_SPI0:
+		rk_clrsetreg(&grf->gpio1a_iomux,
+			     GPIO1A7_MASK | GPIO1A6_MASK | GPIO1A5_MASK,
+			     GPIO1A7_SPI0_TXD << GPIO1A7_SHIFT |
+			     GPIO1A6_SPI0_RXD << GPIO1A6_SHIFT |
+			     GPIO1A5_SPI0_CLK << GPIO1A5_SHIFT);
+		if(cs == 0)
+			rk_clrsetreg(&grf->gpio1a_iomux,
+				     GPIO1A4_MASK,
+				     GPIO1A4_SPI0_CSN0 << GPIO1A4_SHIFT);
+		else
+			rk_clrsetreg(&grf->gpio4b_iomux,
+				     GPIO4B7_MASK,
+				     GPIO4B7_SPI0_CSN1 << GPIO4B7_SHIFT);
+		break;
+	case PERIPH_ID_SPI1:
+		rk_clrsetreg(&grf->gpio2c_iomux,
+			     GPIO2C5_MASK | GPIO2C6_MASK | GPIO2C3_MASK,
+			     GPIO2C5_SPI1_TXD << GPIO2C5_SHIFT |
+			     GPIO2C6_SPI1_RXD << GPIO2C6_SHIFT |
+			     GPIO2C3_SPI1_CLK << GPIO2C3_SHIFT);
+		if(cs == 0)
+			rk_clrsetreg(&grf->gpio2c_iomux,
+				     GPIO2C4_MASK,
+				     GPIO2C4_SPI1_CSN0 << GPIO2C4_SHIFT);
+		else
+			rk_clrsetreg(&grf->gpio2c_iomux,
+				     GPIO2C7_MASK,
+				     GPIO2C7_SPI1_CSN1 << GPIO2C7_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_uart_config(struct rk3066_grf *grf, int uart_id)
+{
+	switch (uart_id) {
+	case PERIPH_ID_UART0:
+		rk_clrsetreg(&grf->gpio1a_iomux,
+			     GPIO1A2_MASK | GPIO1A3_MASK |
+			     GPIO1A0_MASK | GPIO1A1_MASK,
+			     GPIO1A2_UART0_CTS_N << GPIO1A2_SHIFT |
+			     GPIO1A3_UART0_RTS_N << GPIO1A3_SHIFT |
+			     GPIO1A0_UART0_SIN << GPIO1A0_SHIFT |
+			     GPIO1A1_UART0_SOUT << GPIO1A1_SHIFT);
+		break;
+	case PERIPH_ID_UART1:
+		rk_clrsetreg(&grf->gpio1a_iomux,
+			     GPIO1A7_MASK | GPIO1A6_MASK |
+			     GPIO1A5_MASK | GPIO1A4_MASK,
+			     GPIO1A7_UART1_RTS_N << GPIO1A7_SHIFT |
+			     GPIO1A6_UART1_CTS_N << GPIO1A6_SHIFT |
+			     GPIO1A5_UART1_SOUT << GPIO1A5_SHIFT |
+			     GPIO1A4_UART1_SIN << GPIO1A4_SHIFT);
+		break;
+	case PERIPH_ID_UART2:
+		rk_clrsetreg(&grf->gpio1b_iomux,
+			     GPIO1B1_MASK | GPIO1B0_MASK,
+			     GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+			     GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+		break;
+	case PERIPH_ID_UART3:
+		rk_clrsetreg(&grf->gpio3d_iomux,
+			     GPIO3D6_MASK | GPIO3D5_MASK |
+			     GPIO3D4_MASK | GPIO3D3_MASK,
+			     GPIO3D6_UART3_RTS_N << GPIO3D6_SHIFT |
+			     GPIO3D5_UART3_CTS_N << GPIO3D5_SHIFT |
+			     GPIO3D4_UART3_SOUT << GPIO3D4_SHIFT |
+			     GPIO3D3_UART3_SIN << GPIO3D3_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_sdmmc_config(struct rk3066_grf *grf, int mmc_id)
+{
+	switch (mmc_id) {
+	case PERIPH_ID_EMMC:
+		rk_clrsetreg(&grf->soc_con0,
+			     EMMC_FLASH_SEL_MASK,
+			     1 << EMMC_FLASH_SEL_SHIFT);
+		rk_clrsetreg(&grf->gpio3d_iomux,
+			     GPIO3D7_MASK,
+			     GPIO3D7_EMMC_CLKOUT << GPIO3D7_SHIFT);
+		rk_clrsetreg(&grf->gpio4b_iomux,
+			     GPIO4B2_MASK | GPIO4B1_MASK,
+			     GPIO4B2_EMMC_RSTN_OUT << GPIO4B2_SHIFT |
+			     GPIO4B1_EMMC_CMD << GPIO4B1_SHIFT);
+		break;
+	case PERIPH_ID_SDCARD:
+		rk_clrsetreg(&grf->gpio3b_iomux, 0xffff,
+			     GPIO3B7_SDMMC0_WRITE_PRT << GPIO3B7_SHIFT |
+			     GPIO3B6_SDMMC0_DETECT_N << GPIO3B6_SHIFT |
+			     GPIO3B5_SDMMC0_DATA3 << GPIO3B5_SHIFT |
+			     GPIO3B4_SDMMC0_DATA2 << GPIO3B4_SHIFT |
+			     GPIO3B3_SDMMC0_DATA1 << GPIO3B3_SHIFT |
+			     GPIO3B2_SDMMC0_DATA0 << GPIO3B2_SHIFT |
+			     GPIO3B1_SDMMC0_CMD << GPIO3B1_SHIFT |
+			     GPIO3B0_SDMMC0_CLKOUT << GPIO3B0_SHIFT);
+		break;
+	}
+}
+
+static void pinctrl_rk3066_nand_config(struct rk3066_grf *grf)
+{
+	rk_clrsetreg(&grf->soc_con0,
+		     EMMC_FLASH_SEL_MASK,
+		     0 << EMMC_FLASH_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio3d_iomux,
+		     GPIO3D7_MASK,
+		     GPIO3D7_FLASH_DQS << GPIO3D7_SHIFT);
+}
+
+static int rk3066_pinctrl_request(struct udevice *dev, int func, int flags)
+{
+	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
+
+	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
+	switch (func) {
+	case PERIPH_ID_PWM0:
+	case PERIPH_ID_PWM1:
+	case PERIPH_ID_PWM2:
+	case PERIPH_ID_PWM3:
+		pinctrl_rk3066_pwm_config(priv->grf, func);
+		break;
+	case PERIPH_ID_I2C0:
+	case PERIPH_ID_I2C1:
+	case PERIPH_ID_I2C2:
+	case PERIPH_ID_I2C3:
+	case PERIPH_ID_I2C4:
+		pinctrl_rk3066_i2c_config(priv->grf, func);
+		break;
+	case PERIPH_ID_SPI0:
+	case PERIPH_ID_SPI1:
+		pinctrl_rk3066_spi_config(priv->grf, func, flags);
+		break;
+	case PERIPH_ID_UART0:
+	case PERIPH_ID_UART1:
+	case PERIPH_ID_UART2:
+	case PERIPH_ID_UART3:
+		pinctrl_rk3066_uart_config(priv->grf, func);
+		break;
+	case PERIPH_ID_EMMC:
+	case PERIPH_ID_SDCARD:
+		pinctrl_rk3066_sdmmc_config(priv->grf, func);
+		break;
+	case PERIPH_ID_NAND:
+		pinctrl_rk3066_nand_config(priv->grf);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rk3066_pinctrl_get_periph_id(struct udevice *dev,
+					struct udevice *periph)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	u32 cell[3];
+	int ret;
+
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
+	if (ret < 0)
+		return -EINVAL;
+
+	switch (cell[1]) {
+	case 23:
+		return PERIPH_ID_SDCARD;
+	case 25:
+		return PERIPH_ID_EMMC;
+	case 27:
+		return PERIPH_ID_NAND;
+	case 34:
+		return PERIPH_ID_UART0;
+	case 35:
+		return PERIPH_ID_UART1;
+	case 36:
+		return PERIPH_ID_UART2;
+	case 37:
+		return PERIPH_ID_UART3;
+	case 38:
+		return PERIPH_ID_SPI0;
+	case 39:
+		return PERIPH_ID_SPI1;
+	case 40:
+		return PERIPH_ID_I2C0;
+	case 41:
+		return PERIPH_ID_I2C1;
+	case 42:
+		return PERIPH_ID_I2C2;
+	case 43:
+		return PERIPH_ID_I2C3;
+	case 30:
+		return PERIPH_ID_PWM0;
+	}
+#endif
+	return -ENOENT;
+}
+
+static int rk3066_pinctrl_set_state_simple(struct udevice *dev,
+					   struct udevice *periph)
+{
+	int func;
+
+	func = rk3066_pinctrl_get_periph_id(dev, periph);
+	if (func < 0)
+		return func;
+	return rk3066_pinctrl_request(dev, func, 0);
+}
+
+static struct pinctrl_ops rk3066_pinctrl_ops = {
+	.set_state_simple	= rk3066_pinctrl_set_state_simple,
+	.request	= rk3066_pinctrl_request,
+	.get_periph_id	= rk3066_pinctrl_get_periph_id,
+};
+
+static int rk3066_pinctrl_probe(struct udevice *dev)
+{
+	struct rk3066_pinctrl_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf))
+		debug("%s: grf=%p\n", __func__, priv->grf);
+	return 0;
+}
+
+static const struct udevice_id rk3066_pinctrl_ids[] = {
+	{ .compatible = "rockchip,rk3066a-pinctrl" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3066a_pinctrl) = {
+	.name		= "rockchip_rk3066a_pinctrl",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3066_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3066_pinctrl_priv),
+	.ops		= &rk3066_pinctrl_ops,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind           = dm_scan_fdt_dev,
+#endif
+	.probe		= rk3066_pinctrl_probe,
+};

commit fa3921912286c331398515972e59384085d581a8
Author: Paweł Jarosz <paweljarosz3691@gmail.com>
Date:   Thu Aug 17 15:11:54 2017 +0200

    rockchip: rk3066: add grf header file
    
    grf is needed by various drivers for rk3066 soc.
    
    Change-Id: Id605feb6491eab73c2db9a0acba6e096e519e4ba
    Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3066.h b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
new file mode 100644
index 0000000000..be40884985
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3066.h
@@ -0,0 +1,621 @@
+/*
+ * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef _ASM_ARCH_GRF_RK3066_H
+#define _ASM_ARCH_GRF_RK3066_H
+
+struct rk3066_grf_gpio_lh {
+	u32 l;
+	u32 h;
+};
+
+struct rk3066_grf {
+	struct rk3066_grf_gpio_lh gpio_dir[7];
+	struct rk3066_grf_gpio_lh gpio_do[7];
+	struct rk3066_grf_gpio_lh gpio_en[7];
+
+	u32 gpio0a_iomux;
+	u32 gpio0b_iomux;
+	u32 gpio0c_iomux;
+	u32 gpio0d_iomux;
+
+	u32 gpio1a_iomux;
+	u32 gpio1b_iomux;
+	u32 gpio1c_iomux;
+	u32 gpio1d_iomux;
+
+	u32 gpio2a_iomux;
+	u32 gpio2b_iomux;
+	u32 gpio2c_iomux;
+	u32 gpio2d_iomux;
+
+	u32 gpio3a_iomux;
+	u32 gpio3b_iomux;
+	u32 gpio3c_iomux;
+	u32 gpio3d_iomux;
+
+	u32 gpio4a_iomux;
+	u32 gpio4b_iomux;
+	u32 gpio4c_iomux;
+	u32 gpio4d_iomux;
+
+	u32 reserved0[5];
+
+	u32 gpio6b_iomux;
+
+	u32 reserved1[2];
+
+	struct rk3066_grf_gpio_lh gpio_pull[7];
+
+	u32 soc_con0;
+	u32 soc_con1;
+	u32 soc_con2;
+
+	u32 soc_status0;
+
+	u32 dmac1_con[3];
+	u32 dmac2_con[4];
+
+	u32 uoc0_con[3];
+	u32 uoc1_con[4];
+	u32 ddrc_con;
+	u32 ddrc_stat;
+
+	u32 reserved2[10];
+
+	u32 os_reg[4];
+};
+check_member(rk3066_grf, os_reg[3], 0x01d4);
+
+/* GRF_GPIO0A_IOMUX */
+enum {
+	GPIO0A6_SHIFT		= 12,
+	GPIO0A6_MASK		= 1 << GPIO0A6_SHIFT,
+	GPIO0A6_GPIO		= 0,
+	GPIO0A6_HOST_DRV_VBUS,
+
+	GPIO0A5_SHIFT		= 10,
+	GPIO0A5_MASK		= 1 << GPIO0A5_SHIFT,
+	GPIO0A5_GPIO		= 0,
+	GPIO0A5_OTG_DRV_VBUS,
+
+	GPIO0A4_SHIFT		= 8,
+	GPIO0A4_MASK		= 1 << GPIO0A4_SHIFT,
+	GPIO0A4_GPIO		= 0,
+	GPIO0A4_PWM1,
+
+	GPIO0A3_SHIFT		= 6,
+	GPIO0A3_MASK		= 1 << GPIO0A3_SHIFT,
+	GPIO0A3_GPIO		= 0,
+	GPIO0A3_PWM0
+};
+
+/* GRF_GPIO0D_IOMUX */
+enum {
+	GPIO0D7_SHIFT		= 14,
+	GPIO0D7_MASK		= 1 << GPIO0D7_SHIFT,
+	GPIO0D7_GPIO		= 0,
+	GPIO0D7_PWM3,
+
+	GPIO0D6_SHIFT		= 12,
+	GPIO0D6_MASK		= 1 << GPIO0D6_SHIFT,
+	GPIO0D6_GPIO		= 0,
+	GPIO0D6_PWM2
+};
+
+/* GRF_GPIO1A_IOMUX */
+enum {
+	GPIO1A7_SHIFT		= 14,
+	GPIO1A7_MASK		= 3 << GPIO1A7_SHIFT,
+	GPIO1A7_GPIO		= 0,
+	GPIO1A7_UART1_RTS_N,
+	GPIO1A7_SPI0_TXD,
+
+	GPIO1A6_SHIFT		= 12,
+	GPIO1A6_MASK		= 3 << GPIO1A6_SHIFT,
+	GPIO1A6_GPIO		= 0,
+	GPIO1A6_UART1_CTS_N,
+	GPIO1A6_SPI0_RXD,
+
+	GPIO1A5_SHIFT		= 10,
+	GPIO1A5_MASK		= 3 << GPIO1A5_SHIFT,
+	GPIO1A5_GPIO		= 0,
+	GPIO1A5_UART1_SOUT,
+	GPIO1A5_SPI0_CLK,
+
+	GPIO1A4_SHIFT		= 8,
+	GPIO1A4_MASK		= 3 << GPIO1A4_SHIFT,
+	GPIO1A4_GPIO		= 0,
+	GPIO1A4_UART1_SIN,
+	GPIO1A4_SPI0_CSN0,
+
+	GPIO1A3_SHIFT		= 6,
+	GPIO1A3_MASK		= 1 << GPIO1A3_SHIFT,
+	GPIO1A3_GPIO		= 0,
+	GPIO1A3_UART0_RTS_N,
+
+	GPIO1A2_SHIFT		= 4,
+	GPIO1A2_MASK		= 1 << GPIO1A2_SHIFT,
+	GPIO1A2_GPIO		= 0,
+	GPIO1A2_UART0_CTS_N,
+
+	GPIO1A1_SHIFT		= 2,
+	GPIO1A1_MASK		= 1 << GPIO1A1_SHIFT,
+	GPIO1A1_GPIO		= 0,
+	GPIO1A1_UART0_SOUT,
+
+	GPIO1A0_SHIFT		= 0,
+	GPIO1A0_MASK		= 1 << GPIO1A0_SHIFT,
+	GPIO1A0_GPIO		= 0,
+	GPIO1A0_UART0_SIN
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+	GPIO1B1_SHIFT		= 2,
+	GPIO1B1_MASK		= 1 << GPIO1B1_SHIFT,
+	GPIO1B1_GPIO		= 0,
+	GPIO1B1_UART2_SOUT,
+
+	GPIO1B0_SHIFT		= 0,
+	GPIO1B0_MASK		= 1 << GPIO1B0_SHIFT,
+	GPIO1B0_GPIO		= 0,
+	GPIO1B0_UART2_SIN
+};
+
+/* GRF_GPIO2C_IOMUX */
+enum {
+	GPIO2C7_SHIFT		= 14,
+	GPIO2C7_MASK		= 3 << GPIO2C7_SHIFT,
+	GPIO2C7_GPIO		= 0,
+	GPIO2C7_LCDC1_DATA23,
+	GPIO2C7_SPI1_CSN1,
+	GPIO2C7_HSADC_DATA4,
+
+	GPIO2C6_SHIFT		= 12,
+	GPIO2C6_MASK		= 3 << GPIO2C6_SHIFT,
+	GPIO2C6_GPIO		= 0,
+	GPIO2C6_LCDC1_DATA22,
+	GPIO2C6_SPI1_RXD,
+	GPIO2C6_HSADC_DATA3,
+
+	GPIO2C5_SHIFT		= 10,
+	GPIO2C5_MASK		= 3 << GPIO2C5_SHIFT,
+	GPIO2C5_GPIO		= 0,
+	GPIO2C5_LCDC1_DATA21,
+	GPIO2C5_SPI1_TXD,
+	GPIO2C5_HSADC_DATA2,
+
+	GPIO2C4_SHIFT		= 8,
+	GPIO2C4_MASK		= 3 << GPIO2C4_SHIFT,
+	GPIO2C4_GPIO		= 0,
+	GPIO2C4_LCDC1_DATA20,
+	GPIO2C4_SPI1_CSN0,
+	GPIO2C4_HSADC_DATA1,
+
+	GPIO2C3_SHIFT		= 6,
+	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
+	GPIO2C3_GPIO		= 0,
+	GPIO2C3_LCDC1_DATA19,
+	GPIO2C3_SPI1_CLK,
+	GPIO2C3_HSADC_DATA0
+};
+
+/* GRF_GPIO2D_IOMUX */
+enum {
+	GPIO2D7_SHIFT		= 14,
+	GPIO2D7_MASK		= 1 << GPIO2D7_SHIFT,
+	GPIO2D7_GPIO		= 0,
+	GPIO2D7_I2C1_SCL,
+
+	GPIO2D6_SHIFT		= 12,
+	GPIO2D6_MASK		= 1 << GPIO2D6_SHIFT,
+	GPIO2D6_GPIO		= 0,
+	GPIO2D6_I2C1_SDA,
+
+	GPIO2D5_SHIFT		= 10,
+	GPIO2D5_MASK		= 1 << GPIO2D5_SHIFT,
+	GPIO2D5_GPIO		= 0,
+	GPIO2D5_I2C0_SCL,
+
+	GPIO2D4_SHIFT		= 8,
+	GPIO2D4_MASK		= 1 << GPIO2D4_SHIFT,
+	GPIO2D4_GPIO		= 0,
+	GPIO2D4_I2C0_SDA
+
+};
+
+/* GRF_GPIO3A_IOMUX */
+enum {
+	GPIO3A7_SHIFT		= 14,
+	GPIO3A7_MASK		= 1 << GPIO3A7_SHIFT,
+	GPIO3A7_GPIO		= 0,
+	GPIO3A7_SDMMC0_WRITE_PRT,
+
+	GPIO3A6_SHIFT		= 12,
+	GPIO3A6_MASK		= 1 << GPIO3A6_SHIFT,
+	GPIO3A6_GPIO		= 0,
+	GPIO3A6_SDMMC0_RSTN_OUT,
+
+	GPIO3A5_SHIFT		= 10,
+	GPIO3A5_MASK		= 1 << GPIO3A5_SHIFT,
+	GPIO3A5_GPIO		= 0,
+	GPIO3A5_I2C4_SCL,
+
+	GPIO3A4_SHIFT		= 8,
+	GPIO3A4_MASK		= 1 << GPIO3A4_SHIFT,
+	GPIO3A4_GPIO		= 0,
+	GPIO3A4_I2C4_SDA,
+
+	GPIO3A3_SHIFT		= 6,
+	GPIO3A3_MASK		= 1 << GPIO3A3_SHIFT,
+	GPIO3A3_GPIO		= 0,
+	GPIO3A3_I2C3_SCL,
+
+	GPIO3A2_SHIFT		= 4,
+	GPIO3A2_MASK		= 1 << GPIO3A2_SHIFT,
+	GPIO3A2_GPIO		= 0,
+	GPIO3A2_I2C3_SDA,
+
+	GPIO3A1_SHIFT		= 2,
+	GPIO3A1_MASK		= 1 << GPIO3A1_SHIFT,
+	GPIO3A1_GPIO		= 0,
+	GPIO3A1_I2C2_SCL,
+
+	GPIO3A0_SHIFT		= 0,
+	GPIO3A0_MASK		= 1 << GPIO3A0_SHIFT,
+	GPIO3A0_GPIO		= 0,
+	GPIO3A0_I2C2_SDA,
+};
+
+/* GRF_GPIO3B_IOMUX */
+enum {
+	GPIO3B7_SHIFT		= 14,
+	GPIO3B7_MASK		= 1 << GPIO3B7_SHIFT,
+	GPIO3B7_GPIO		= 0,
+	GPIO3B7_SDMMC0_WRITE_PRT,
+
+	GPIO3B6_SHIFT		= 12,
+	GPIO3B6_MASK		= 1 << GPIO3B6_SHIFT,
+	GPIO3B6_GPIO		= 0,
+	GPIO3B6_SDMMC0_DETECT_N,
+
+	GPIO3B5_SHIFT		= 10,
+	GPIO3B5_MASK		= 1 << GPIO3B5_SHIFT,
+	GPIO3B5_GPIO		= 0,
+	GPIO3B5_SDMMC0_DATA3,
+
+	GPIO3B4_SHIFT		= 8,
+	GPIO3B4_MASK		= 1 << GPIO3B4_SHIFT,
+	GPIO3B4_GPIO		= 0,
+	GPIO3B4_SDMMC0_DATA2,
+
+	GPIO3B3_SHIFT		= 6,
+	GPIO3B3_MASK		= 1 << GPIO3B3_SHIFT,
+	GPIO3B3_GPIO		= 0,
+	GPIO3B3_SDMMC0_DATA1,
+
+	GPIO3B2_SHIFT		= 4,
+	GPIO3B2_MASK		= 1 << GPIO3B2_SHIFT,
+	GPIO3B2_GPIO		= 0,
+	GPIO3B2_SDMMC0_DATA0,
+
+	GPIO3B1_SHIFT		= 2,
+	GPIO3B1_MASK		= 1 << GPIO3B1_SHIFT,
+	GPIO3B1_GPIO		= 0,
+	GPIO3B1_SDMMC0_CMD,
+
+	GPIO3B0_SHIFT		= 0,
+	GPIO3B0_MASK		= 1 << GPIO3B0_SHIFT,
+	GPIO3B0_GPIO		= 0,
+	GPIO3B0_SDMMC0_CLKOUT
+
+};
+
+/* GRF_GPIO3C_IOMUX */
+enum {
+	GPIO3C7_SHIFT		= 14,
+	GPIO3C7_MASK		= 1 << GPIO3C7_SHIFT,
+	GPIO3C7_GPIO		= 0,
+	GPIO3C7_SDMMC1_WRITE_PRT,
+
+	GPIO3C6_SHIFT		= 12,
+	GPIO3C6_MASK		= 1 << GPIO3C6_SHIFT,
+	GPIO3C6_GPIO		= 0,
+	GPIO3C6_SDMMC1_DETECT_N,
+
+	GPIO3C5_SHIFT		= 10,
+	GPIO3C5_MASK		= 1 << GPIO3C5_SHIFT,
+	GPIO3C5_GPIO		= 0,
+	GPIO3C5_SDMMC1_CLKOUT,
+
+	GPIO3C4_SHIFT		= 8,
+	GPIO3C4_MASK		= 1 << GPIO3C4_SHIFT,
+	GPIO3C4_GPIO		= 0,
+	GPIO3C4_SDMMC1_DATA3,
+
+	GPIO3C3_SHIFT		= 6,
+	GPIO3C3_MASK		= 1 << GPIO3C3_SHIFT,
+	GPIO3C3_GPIO		= 0,
+	GPIO3C3_SDMMC1_DATA2,
+
+	GPIO3C2_SHIFT		= 4,
+	GPIO3C2_MASK		= 1 << GPIO3C2_SHIFT,
+	GPIO3C2_GPIO		= 0,
+	GPIO3C2_SDMMC1_DATA1,
+
+	GPIO3C1_SHIFT		= 2,
+	GPIO3C1_MASK		= 1 << GPIO3C1_SHIFT,
+	GPIO3C1_GPIO		= 0,
+	GPIO3C1_SDMMC1_DATA0,
+
+	GPIO3C0_SHIFT		= 0,
+	GPIO3C0_MASK		= 1 << GPIO3C0_SHIFT,
+	GPIO3C0_GPIO		= 0,
+	GPIO3C0_SMMC1_CMD
+};
+
+/* GRF_GPIO3D_IOMUX */
+enum {
+	GPIO3D7_SHIFT		= 14,
+	GPIO3D7_MASK		= 3 << GPIO3D7_SHIFT,
+	GPIO3D7_GPIO		= 0,
+	GPIO3D7_FLASH_DQS,
+	GPIO3D7_EMMC_CLKOUT,
+
+	GPIO3D6_SHIFT		= 12,
+	GPIO3D6_MASK		= 1 << GPIO3D6_SHIFT,
+	GPIO3D6_GPIO		= 0,
+	GPIO3D6_UART3_RTS_N,
+
+	GPIO3D5_SHIFT		= 10,
+	GPIO3D5_MASK		= 1 << GPIO3D5_SHIFT,
+	GPIO3D5_GPIO		= 0,
+	GPIO3D5_UART3_CTS_N,
+
+	GPIO3D4_SHIFT		= 8,
+	GPIO3D4_MASK		= 1 << GPIO3D4_SHIFT,
+	GPIO3D4_GPIO		= 0,
+	GPIO3D4_UART3_SOUT,
+
+	GPIO3D3_SHIFT		= 6,
+	GPIO3D3_MASK		= 1 << GPIO3D3_SHIFT,
+	GPIO3D3_GPIO		= 0,
+	GPIO3D3_UART3_SIN,
+
+	GPIO3D2_SHIFT		= 4,
+	GPIO3D2_MASK		= 1 << GPIO3D2_SHIFT,
+	GPIO3D2_GPIO		= 0,
+	GPIO3D2_SDMMC1_INT_N,
+
+	GPIO3D1_SHIFT		= 2,
+	GPIO3D1_MASK		= 1 << GPIO3D1_SHIFT,
+	GPIO3D1_GPIO		= 0,
+	GPIO3D1_SDMMC1_BACKEND_PWR,
+
+	GPIO3D0_SHIFT		= 0,
+	GPIO3D0_MASK		= 1 << GPIO3D0_SHIFT,
+	GPIO3D0_GPIO		= 0,
+	GPIO3D0_SDMMC1_PWR_EN
+
+};
+
+/* GRF_GPIO4A_IOMUX */
+enum {
+	GPIO4A7_SHIFT		= 14,
+	GPIO4A7_MASK		= 1 << GPIO4A7_SHIFT,
+	GPIO4A7_GPIO		= 0,
+	GPIO4A7_FLASH_DATA15,
+
+	GPIO4A6_SHIFT		= 12,
+	GPIO4A6_MASK		= 1 << GPIO4A6_SHIFT,
+	GPIO4A6_GPIO		= 0,
+	GPIO4A6_FLASH_DATA14,
+
+	GPIO4A5_SHIFT		= 10,
+	GPIO4A5_MASK		= 1 << GPIO4A5_SHIFT,
+	GPIO4A5_GPIO		= 0,
+	GPIO4A5_FLASH_DATA13,
+
+	GPIO4A4_SHIFT		= 8,
+	GPIO4A4_MASK		= 1 << GPIO4A4_SHIFT,
+	GPIO4A4_GPIO		= 0,
+	GPIO4A4_FLASH_DATA12,
+
+	GPIO4A3_SHIFT		= 6,
+	GPIO4A3_MASK		= 1 << GPIO4A3_SHIFT,
+	GPIO4A3_GPIO		= 0,
+	GPIO4A3_FLASH_DATA11,
+
+	GPIO4A2_SHIFT		= 4,
+	GPIO4A2_MASK		= 1 << GPIO4A2_SHIFT,
+	GPIO4A2_GPIO		= 0,
+	GPIO4A2_FLASH_DATA10,
+
+	GPIO4A1_SHIFT		= 2,
+	GPIO4A1_MASK		= 1 << GPIO4A1_SHIFT,
+	GPIO4A1_GPIO		= 0,
+	GPIO4A1_FLASH_DATA9,
+
+	GPIO4A0_SHIFT		= 0,
+	GPIO4A0_MASK		= 1 << GPIO4A0_SHIFT,
+	GPIO4A0_GPIO		= 0,
+	GPIO4A0_FLASH_DATA8
+
+};
+
+/* GRF_GPIO4B_IOMUX */
+enum {
+	GPIO4B7_SHIFT		= 14,
+	GPIO4B7_MASK		= 1 << GPIO4B7_SHIFT,
+	GPIO4B7_GPIO		= 0,
+	GPIO4B7_SPI0_CSN1,
+
+	GPIO4B6_SHIFT		= 12,
+	GPIO4B6_MASK		= 1 << GPIO4B6_SHIFT,
+	GPIO4B6_GPIO		= 0,
+	GPIO4B6_FLASH_CSN7,
+
+	GPIO4B5_SHIFT		= 10,
+	GPIO4B5_MASK		= 1 << GPIO4B5_SHIFT,
+	GPIO4B5_GPIO		= 0,
+	GPIO4B5_FLASH_CSN6,
+
+	GPIO4B4_SHIFT		= 8,
+	GPIO4B4_MASK		= 1 << GPIO4B4_SHIFT,
+	GPIO4B4_GPIO		= 0,
+	GPIO4B4_FLASH_CSN5,
+
+	GPIO4B3_SHIFT		= 6,
+	GPIO4B3_MASK		= 1 << GPIO4B3_SHIFT,
+	GPIO4B3_GPIO		= 0,
+	GPIO4B3_FLASH_CSN4,
+
+	GPIO4B2_SHIFT		= 4,
+	GPIO4B2_MASK		= 3 << GPIO4B2_SHIFT,
+	GPIO4B2_GPIO		= 0,
+	GPIO4B2_FLASH_CSN3,
+	GPIO4B2_EMMC_RSTN_OUT,
+
+	GPIO4B1_SHIFT		= 2,
+	GPIO4B1_MASK		= 3 << GPIO4B1_SHIFT,
+	GPIO4B1_GPIO		= 0,
+	GPIO4B1_FLASH_CSN2,
+	GPIO4B1_EMMC_CMD,
+
+	GPIO4B0_SHIFT		= 0,
+	GPIO4B0_MASK		= 1 << GPIO4B0_SHIFT,
+	GPIO4B0_GPIO		= 0,
+	GPIO4B0_FLASH_CSN1
+};
+
+/* GRF_SOC_CON0 */
+enum {
+	SMC_MUX_CON_SHIFT	= 13,
+	SMC_MUX_CON_MASK	= 1 << SMC_MUX_CON_SHIFT,
+
+	NOC_REMAP_SHIFT		= 12,
+	NOC_REMAP_MASK		= 1 << NOC_REMAP_SHIFT,
+
+	EMMC_FLASH_SEL_SHIFT	= 11,
+	EMMC_FLASH_SEL_MASK	= 1 << EMMC_FLASH_SEL_SHIFT,
+
+	TZPC_REVISION_SHIFT	= 7,
+	TZPC_REVISION_MASK	= 0xf << TZPC_REVISION_SHIFT,
+
+	L2CACHE_ACC_SHIFT	= 5,
+	L2CACHE_ACC_MASK	= 3 << L2CACHE_ACC_SHIFT,
+
+	L2RD_WAIT_SHIFT		= 3,
+	L2RD_WAIT_MASK		= 3 << L2RD_WAIT_SHIFT,
+
+	IMEMRD_WAIT_SHIFT	= 1,
+	IMEMRD_WAIT_MASK	= 3 << IMEMRD_WAIT_SHIFT,
+	
+	SOC_REMAP_SHIFT		= 0,
+	SOC_REMAP_MASK		= 1 << SOC_REMAP_SHIFT,
+};
+
+/* GRF_SOC_CON1 */
+enum {
+	RKI2C4_SEL_SHIFT	= 15,
+	RKI2C4_SEL_MASK		= 1 << RKI2C4_SEL_SHIFT,
+
+	RKI2C3_SEL_SHIFT	= 14,
+	RKI2C3_SEL_MASK		= 1 << RKI2C3_SEL_SHIFT,
+
+	RKI2C2_SEL_SHIFT	= 13,
+	RKI2C2_SEL_MASK		= 1 << RKI2C2_SEL_SHIFT,
+
+	RKI2C1_SEL_SHIFT	= 12,
+	RKI2C1_SEL_MASK		= 1 << RKI2C1_SEL_SHIFT,
+
+	RKI2C0_SEL_SHIFT	= 11,
+	RKI2C0_SEL_MASK		= 1 << RKI2C0_SEL_SHIFT,
+
+	VCODEC_SEL_SHIFT	= 10,
+	VCODEC_SEL_MASK		= 1 << VCODEC_SEL_SHIFT,
+
+	PERI_EMEM_PAUSE_SHIFT	= 9,
+	PERI_EMEM_PAUSE_MASK	= 1 << PERI_EMEM_PAUSE_SHIFT,
+
+	PERI_USB_PAUSE_SHIFT	= 8,
+	PERI_USB_PAUSE_MASK	= 1 << PERI_USB_PAUSE_SHIFT,
+
+	SMC_MUX_MODE_0_SHIFT	= 6,
+	SMC_MUX_MODE_0_MASK	= 1 << SMC_MUX_MODE_0_SHIFT,
+
+	SMC_SRAM_MW_0_SHIFT	= 4,
+	SMC_SRAM_MW_0_MASK	= 3 << SMC_SRAM_MW_0_SHIFT,
+
+	SMC_REMAP_0_SHIFT	= 3,
+	SMC_REMAP_0_MASK	= 1 << SMC_REMAP_0_SHIFT,
+
+	SMC_A_GT_M0_SYNC_SHIFT	= 2,
+	SMC_A_GT_M0_SYNC_MASK	= 1 << SMC_A_GT_M0_SYNC_SHIFT,
+
+	EMAC_SPEED_SHIFT	= 1,
+	EMAC_SPEEC_MASK		= 1 << EMAC_SPEED_SHIFT,
+
+	EMAC_MODE_SHIFT		= 0,
+	EMAC_MODE_MASK		= 1 << EMAC_MODE_SHIFT,
+};
+
+/* GRF_SOC_CON2 */
+enum {
+
+	MSCH4_MAINDDR3_SHIFT	= 7,
+	MSCH4_MAINDDR3_MASK	= 1 << MSCH4_MAINDDR3_SHIFT,
+	MSCH4_MAINDDR3_DDR3	= 1,
+
+	EMAC_NEWRCV_EN_SHIFT	= 6,
+	EMAC_NEWRCV_EN_MASK	= 1 << EMAC_NEWRCV_EN_SHIFT,
+
+	SW_ADDR15_EN_SHIFT	= 5,
+	SW_ADDR15_EN_MASK	= 1 << SW_ADDR15_EN_SHIFT,
+
+	SW_ADDR16_EN_SHIFT	= 4,
+	SW_ADDR16_EN_MASK	= 1 << SW_ADDR16_EN_SHIFT,
+
+	SW_ADDR17_EN_SHIFT	= 3,
+	SW_ADDR17_EN_MASK	= 1 << SW_ADDR17_EN_SHIFT,
+
+	BANK2_TO_RANK_EN_SHIFT	= 2,
+	BANK2_TO_RANK_EN_MASK	= 1 << BANK2_TO_RANK_EN_SHIFT,
+
+	RANK_TO_ROW15_EN_SHIFT	= 1,
+	RANK_TO_ROW15_EN_MASK	= 1 << RANK_TO_ROW15_EN_SHIFT,
+
+	UPCTL_C_ACTIVE_IN_SHIFT = 0,
+	UPCTL_C_ACTIVE_IN_MASK	= 1 << UPCTL_C_ACTIVE_IN_SHIFT,
+	UPCTL_C_ACTIVE_IN_MAY	= 0,
+	UPCTL_C_ACTIVE_IN_WILL,
+};
+
+/* GRF_DDRC_CON0 */
+enum {
+	DTO_LB_SHIFT		= 11,
+	DTO_LB_MASK		= 3 << DTO_LB_SHIFT,
+
+	DTO_TE_SHIFT		= 9,
+	DTO_TE_MASK		= 3 << DTO_TE_SHIFT,
+
+	DTO_PDR_SHIFT		= 7,
+	DTO_PDR_MASK		= 3 << DTO_PDR_SHIFT,
+
+	DTO_PDD_SHIFT		= 5,
+	DTO_PDD_MASK		= 3 << DTO_PDD_SHIFT,
+
+	DTO_IOM_SHIFT		= 3,
+	DTO_IOM_MASK		= 3 << DTO_IOM_SHIFT,
+
+	DTO_OE_SHIFT		= 1,
+	DTO_OE_MASK		= 3 << DTO_OE_SHIFT,
+
+	ATO_AE_SHIFT		= 0,
+	ATO_AE_MASK		= 1 << ATO_AE_SHIFT,
+};
+#endif

commit b5d6c3ee6999fa924c56257d5cfaa57df3777699
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 3 10:08:48 2017 +0800

    armv8: update gd after relocate
    
    We need to update gd in assamble code after relocate,
    this is a fix to:
    adc421e arm: move gd handling outside of C code
    
    Change-Id: I2730d6e7a8f0ee2a2fb44d63dfc7991aaae733b7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S
index 62fad452b2..2008b76bed 100644
--- a/arch/arm/lib/crt0_64.S
+++ b/arch/arm/lib/crt0_64.S
@@ -113,6 +113,8 @@ relocation_return:
 #endif /* !CONFIG_SPL_BUILD */
 #if defined(CONFIG_SPL_BUILD)
 	bl	spl_relocate_stack_gd           /* may return NULL */
+	/* set up gd here, outside any C code */
+	mov	x18, x0
 	/*
 	 * Perform 'sp = (x0 != NULL) ? x0 : sp' while working
 	 * around the constraint that conditional moves can not

commit 430b01462bf3f24aaf7920ae2587a6943c39ab5d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:33:14 2017 +0800

    rockchip: Kconfig: enable TPL/SPL support for rk3328
    
    Enable TPL/SPL support and some related option in Kconfig.
    
    Change-Id: Ifde2835d06cfd69933487a66ebce63956b12407e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ec6522b89a..41a7363d3a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -79,6 +79,18 @@ config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
 	select GICV2
+	select SUPPORT_SPL
+	select SUPPORT_TPL
+	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
+	imply SPL_SEPARATE_BSS
+	select ENABLE_ARM_SOC_BOOT0_HOOK
+	select DEBUG_UART_BOARD_INIT
+	select SYS_NS16550
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -86,6 +98,22 @@ config ROCKCHIP_RK3328
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
 
+if ROCKCHIP_RK3328
+
+config TPL_LDSCRIPT
+	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+
+config TPL_TEXT_BASE
+        default 0xff091000
+
+config TPL_MAX_SIZE
+        default 28672
+
+config TPL_STACK
+        default 0xff098000
+
+endif
+
 config ROCKCHIP_RK3368
 	bool "Support Rockchip RK3368"
 	select ARM64
@@ -165,7 +193,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM
 
 config TPL_ROCKCHIP_BACK_TO_BROM
 	bool "TPL returns to bootrom"
-	default y if ROCKCHIP_RK3368
+	default y if ROCKCHIP_RK3368 || ROCKCHIP_RK3328
 	select ROCKCHIP_BROM_HELPER
 	depends on TPL
 	help

commit df4f40acb449815384e397dcaf5b618bbc6cd855
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:36:50 2017 +0800

    rockchip: evb-rk3328: enable defconfig options for TPL/SPL
    
    Enable driver options for TPL/SPL in evb-rk3328_defconfig.
    
    Change-Id: I8f9e378b3d459d976e2522884b607b68b0fdf9fd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 8b8a835d33..d4a00718c5 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -1,11 +1,33 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3328/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_TPL=y
+CONFIG_TPL_BOOTROM_SUPPORT=y
+CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_TPL_SERIAL_PRESENT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
@@ -13,14 +35,23 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
+CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
@@ -29,22 +60,27 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3328=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
-CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
@@ -61,4 +97,5 @@ CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

commit cb2b7a1bc75ebb116b1eb9b0ae0223e84d86fc4b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:37:50 2017 +0800

    rockchip: rk3328: add config option for TPL/SPL
    
    Enable SPL_FRAMEWORK and TPL/SPL related base addr and size.
    
    Change-Id: I59ee5675b66ec63c531931be7ba43606718c527f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index ecc0219cd7..c5aba94508 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -13,12 +13,18 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define CONFIG_SPL_FRAMEWORK
+
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_TEXT_BASE		0x00200000
 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
 #define CONFIG_SYS_LOAD_ADDR		0x00800800
-
+#define CONFIG_SPL_STACK		0x00400000
+#define CONFIG_SPL_TEXT_BASE		0x00000000
+#define CONFIG_SPL_MAX_SIZE             0x10000
+#define CONFIG_SPL_BSS_START_ADDR	0x2000000
+#define CONFIG_SPL_BSS_MAX_SIZE         0x2000
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
 #define GICD_BASE			0xFF811000

commit 664225d1610d77ef64ed9a4f42d36474362592cc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:50:24 2017 +0800

    rockchip: dts: rk3328: enable the drivers need by tpl/spl
    
    Enable the drivers need by TPL/SPL with 'u-boot,dm-pre-reloc'.
    
    Change-Id: I7a3900379085e134631f390032fc974b25e46a08
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 3bac4e4415..4b13a8da64 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -48,6 +48,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 
@@ -64,6 +65,7 @@
 };
 
 &emmc {
+	u-boot,dm-pre-reloc;
 	bus-width = <8>;
 	cap-mmc-highspeed;
 	supports-emmc;
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index b821c4c979..2a4c4929d7 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -366,6 +366,7 @@
 	};
 
 	cru: clock-controller@ff440000 {
+		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
 		reg = <0x0 0xff440000 0x0 0x1000>;
 		rockchip,grf = <&grf>;

commit 0d85fb9b23c0694807c22c869cd91ad700fd8145
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:58:03 2017 +0800

    rockchip: rk3328-evb: add script for atf fit
    
    Add a script to generate binaries from bl31.elf, and generate
    u-boot.its file for FIT image including u-boot, dtb and atf
    binaries.
    
    Change-Id: Ife016da5468b3c618c619354fb280b6951aed94b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3328/mk_fit_atf.sh b/board/rockchip/evb_rk3328/mk_fit_atf.sh
new file mode 100755
index 0000000000..192c303af0
--- /dev/null
+++ b/board/rockchip/evb_rk3328/mk_fit_atf.sh
@@ -0,0 +1,108 @@
+#!/bin/sh
+#
+# script to generate FIT image source for rk3399 boards with
+# ARM Trusted Firmware and multiple device trees (given on the command line)
+#
+# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+
+[ -z "$BL31" ] && BL31="bl31.elf"
+
+if [ ! -f $BL31 ]; then
+	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
+	BL31=/dev/null
+fi
+
+cat << __HEADER_EOF
+/dts-v1/;
+
+/ {
+	description = "Configuration to load ATF before U-Boot";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot (64-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			arch = "arm64";
+			compression = "none";
+			load = <0x00200000>;
+		};
+__HEADER_EOF
+
+atf_cnt=1
+
+for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
+	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
+do
+	offset=${l%%:*}
+	ll=${l#*:}
+	phy_offset=${ll%:*}
+	filesz=${ll##*:}
+
+	#echo "$offset/$phy_offset/$filesz"
+
+	of=bl31_${phy_offset}.bin
+	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
+
+	out_string="${out_string}:${phy_offset}"
+
+	cat << __ATF1_EOF
+		atf@$atf_cnt {
+			description = "ARM Trusted Firmware";
+			data = /incbin/("$of");
+			type = "firmware";
+			arch = "arm64";
+			compression = "none";
+			load = <$phy_offset>;
+__ATF1_EOF
+	if [ "$atf_cnt" -eq 1 ]; then
+		cat << __ATF2_EOF
+			entry = <$phy_offset>;
+__ATF2_EOF
+		fi
+	cat << __ATF3_EOF
+		};
+__ATF3_EOF
+	atf_cnt=$((atf_cnt + 1))
+done
+
+cnt=1
+for dtname in $*
+do
+	cat << __FDT_IMAGE_EOF
+		fdt@$cnt {
+			description = "$(basename $dtname .dtb)";
+			data = /incbin/("$dtname");
+			type = "flat_dt";
+			compression = "none";
+		};
+__FDT_IMAGE_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __CONF_HEADER_EOF
+	};
+	configurations {
+		default = "config@1";
+
+__CONF_HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+	cat << __CONF_SECTION_EOF
+		config@$cnt {
+			description = "$(basename $dtname .dtb)";
+			firmware = "uboot@1";
+			loadables = "atf@1","atf@2";
+			fdt = "fdt@1";
+		};
+__CONF_SECTION_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __ITS_EOF
+	};
+};
+__ITS_EOF

commit 6c73d5e78d627fcbd9d4349dfebcd6a1b0abf84c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:43:22 2017 +0800

    rockchip: add a link file for armv8 tpl
    
    Rockchip TPL is not going to use both sram and dram, so
    we will use a separate link file.
    
    Change-Id: I336bdff8033ca2d49521a3639fbf182c293463b5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
new file mode 100644
index 0000000000..3fd50fd86c
--- /dev/null
+++ b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2013
+ * David Feng <fenghua@phytium.com.cn>
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *	Aneesh V <aneesh@ti.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
+OUTPUT_ARCH(aarch64)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	.text : {
+		. = ALIGN(8);
+		*(.__image_copy_start)
+		CPUDIR/start.o (.text*)
+		*(.text*)
+	}
+
+	.rodata : {
+		. = ALIGN(8);
+		*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+	}
+
+	.data : {
+		. = ALIGN(8);
+		*(.data*)
+	}
+
+	.u_boot_list : {
+		. = ALIGN(8);
+		KEEP(*(SORT(.u_boot_list*)));
+	}
+
+	.image_copy_end : {
+		. = ALIGN(8);
+		*(.__image_copy_end)
+	}
+
+	.end : {
+		. = ALIGN(8);
+		*(.__end)
+	}
+
+	_image_binary_end = .;
+
+	.bss_start (NOLOAD) : {
+		. = ALIGN(8);
+		KEEP(*(.__bss_start));
+	}
+
+	.bss (NOLOAD) : {
+		*(.bss*)
+		 . = ALIGN(8);
+	}
+
+	.bss_end (NOLOAD) : {
+		KEEP(*(.__bss_end));
+	}
+
+	/DISCARD/ : { *(.dynsym) }
+	/DISCARD/ : { *(.dynstr*) }
+	/DISCARD/ : { *(.dynamic*) }
+	/DISCARD/ : { *(.plt*) }
+	/DISCARD/ : { *(.interp*) }
+	/DISCARD/ : { *(.gnu*) }
+}
+
+#if defined(CONFIG_TPL_MAX_SIZE)
+ASSERT(__image_copy_end - __image_copy_start < (CONFIG_TPL_MAX_SIZE), \
+	"TPL image too big");
+#endif
+
+#if defined(CONFIG_TPL_BSS_MAX_SIZE)
+ASSERT(__bss_end - __bss_start < (CONFIG_TPL_BSS_MAX_SIZE), \
+	"TPL image BSS too big");
+#endif
+
+#if defined(CONFIG_TPL_MAX_FOOTPRINT)
+ASSERT(__bss_end - _start < (CONFIG_TPL_MAX_FOOTPRINT), \
+	"TPL image plus BSS too big");
+#endif

commit 4ebe3968b683190cb8e5741aa7227b4fa7497874
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:48:09 2017 +0800

    rockchip: rk3328: add spl board file support
    
    rk3328 spl is locate at dram, so do not have strict size limit,
    suppose to enable storage media controller driver, load ATF and
    U-Boot, then boot into ATF.
    
    Change-Id: I60d0e2b278dc09b04bd098f682c06bd5fb6cecf7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 35cc55fff3..dbaaf7d527 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -20,6 +20,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
diff --git a/arch/arm/mach-rockchip/rk3328-board-spl.c b/arch/arm/mach-rockchip/rk3328-board-spl.c
new file mode 100644
index 0000000000..1f7274a8d0
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3328-board-spl.c
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/cru_rk3328.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void board_debug_uart_init(void)
+{
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	preloader_console_init();
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		debug("DRAM init failed: %d\n", ret);
+		return;
+	}
+}
+
+u32 spl_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_MMC1;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif

commit d9cab26c621433b26b50d1f9ca43c69787fcbd4d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:46:54 2017 +0800

    rockchip: rk3328: add tpl board file support
    
    rk3328 tpl suppose to init ddr sdram and then back to bootrom.
    
    Change-Id: I05ec83e32650b5aca88940d725586ffabf28322e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 52eb04645f..35cc55fff3 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -14,6 +14,7 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
 
 obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
diff --git a/arch/arm/mach-rockchip/rk3328-board-tpl.c b/arch/arm/mach-rockchip/rk3328-board-tpl.c
new file mode 100644
index 0000000000..1c74ff29ea
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3328-board-tpl.c
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <led.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/timer.h>
+#include <dm/pinctrl.h>
+#include <dm/root.h>
+#include <dm/test.h>
+#include <dm/util.h>
+#include <power/regulator.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/arch/uart.h>
+
+#define CRU_BASE		0xFF440000
+#define GRF_BASE		0xFF100000
+#define UART2_BASE		0xFF130000
+#define STIMER_BASE_ADDR		0xFF1d0000
+#define CPU_TIMER_BASE			(STIMER_BASE_ADDR + 0x20)
+
+void board_timer_init(void)
+{
+	/* Initialize CNTFRQ */
+	__asm__ volatile ("LDR x0,=24000000");
+	__asm__ volatile ("MSR CNTFRQ_EL0, x0");
+
+	/* Enable STimer1 for core */
+	writel(0x0, CPU_TIMER_BASE + 0x0010);
+	writel(0xffffffff, CPU_TIMER_BASE + 0x0000);
+	writel(0xffffffff, CPU_TIMER_BASE + 0x0004);
+	writel(0x1, CPU_TIMER_BASE + 0x0010);
+}
+
+void board_debug_uart_init(void)
+{
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
+	struct rk_uart * const uart = (void *)UART2_BASE;
+
+	/* uart_sel_clk default select 24MHz */
+	writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148);
+
+	/* init uart baud rate 1500000 */
+	writel(0x83, &uart->lcr);
+	writel(0x1, &uart->rbr);
+	writel(0x3, &uart->lcr);
+
+	/* Enable early UART2 */
+	rk_clrsetreg(&grf->com_iomux,
+		     IOMUX_SEL_UART2_MASK,
+		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A0_SEL_MASK,
+		     GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT);
+	rk_clrsetreg(&grf->gpio2a_iomux,
+		     GPIO2A1_SEL_MASK,
+		     GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT);
+
+	/* enable FIFO */
+	writel(0x1, &uart->sfe);
+}
+
+void board_return_to_bootrom(void)
+{
+	back_to_bootrom();
+}
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_BOOTROM;
+}
+
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+#define EARLY_UART
+#ifdef EARLY_UART
+	debug_uart_init();
+	printascii("U-Boot TPL board init\n");
+#endif
+
+	board_timer_init();
+
+	ret = spl_early_init();
+	if (ret) {
+		printf("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+}

commit 9fb0777ec3cc6a89af9d2e0969c3bfe58306a88d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:17:07 2017 +0800

    rockchip: ram: add full feature rk3328 dram driver
    
    This driver supports ddr3/lpddr3/ddr4 sdram initialization.
    
    Since we are going to merge the common part in dram driver for all
    Rockchip SoCs, this patch become a RFC and can be used for people
    who need it.
    
    Change-Id: I255411e02089b461fdc384842e23ec2e092f87fb
    Signed-off-by: YouMin Chen <cym@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
new file mode 100644
index 0000000000..951d4fab18
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3328.h
@@ -0,0 +1,535 @@
+/*
+ * Copyright (C) 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SDRAM_RK3328_H
+#define _ASM_ARCH_SDRAM_RK3328_H
+
+enum {
+	DDR4 = 0,
+	DDR3 = 3,
+	LPDDR2 = 5,
+	LPDDR3 = 6,
+	LPDDR4 = 7,
+	UNUSED = 0xFF
+};
+
+#define SR_IDLE		93
+#define PD_IDLE		13
+#define SDRAM_ADDR	0x00000000
+#define PATTERN		(0x5aa5f00f)
+
+/* ddr pctl registers define */
+#define DDR_PCTL2_MSTR			0x0
+#define DDR_PCTL2_STAT			0x4
+#define DDR_PCTL2_MSTR1			0x8
+#define DDR_PCTL2_MRCTRL0		0x10
+#define DDR_PCTL2_MRCTRL1		0x14
+#define DDR_PCTL2_MRSTAT		0x18
+#define DDR_PCTL2_MRCTRL2		0x1c
+#define DDR_PCTL2_DERATEEN		0x20
+#define DDR_PCTL2_DERATEINT		0x24
+#define DDR_PCTL2_PWRCTL		0x30
+#define DDR_PCTL2_PWRTMG		0x34
+#define DDR_PCTL2_HWLPCTL		0x38
+#define DDR_PCTL2_RFSHCTL0		0x50
+#define DDR_PCTL2_RFSHCTL1		0x54
+#define DDR_PCTL2_RFSHCTL2		0x58
+#define DDR_PCTL2_RFSHCTL4		0x5c
+#define DDR_PCTL2_RFSHCTL3		0x60
+#define DDR_PCTL2_RFSHTMG		0x64
+#define DDR_PCTL2_RFSHTMG1		0x68
+#define DDR_PCTL2_RFSHCTL5		0x6c
+#define DDR_PCTL2_INIT0			0xd0
+#define DDR_PCTL2_INIT1			0xd4
+#define DDR_PCTL2_INIT2			0xd8
+#define DDR_PCTL2_INIT3			0xdc
+#define DDR_PCTL2_INIT4			0xe0
+#define DDR_PCTL2_INIT5			0xe4
+#define DDR_PCTL2_INIT6			0xe8
+#define DDR_PCTL2_INIT7			0xec
+#define DDR_PCTL2_DIMMCTL		0xf0
+#define DDR_PCTL2_RANKCTL		0xf4
+#define DDR_PCTL2_CHCTL			0xfc
+#define DDR_PCTL2_DRAMTMG0		0x100
+#define DDR_PCTL2_DRAMTMG1		0x104
+#define DDR_PCTL2_DRAMTMG2		0x108
+#define DDR_PCTL2_DRAMTMG3		0x10c
+#define DDR_PCTL2_DRAMTMG4		0x110
+#define DDR_PCTL2_DRAMTMG5		0x114
+#define DDR_PCTL2_DRAMTMG6		0x118
+#define DDR_PCTL2_DRAMTMG7		0x11c
+#define DDR_PCTL2_DRAMTMG8		0x120
+#define DDR_PCTL2_DRAMTMG9		0x124
+#define DDR_PCTL2_DRAMTMG10		0x128
+#define DDR_PCTL2_DRAMTMG11		0x12c
+#define DDR_PCTL2_DRAMTMG12		0x130
+#define DDR_PCTL2_DRAMTMG13		0x134
+#define DDR_PCTL2_DRAMTMG14		0x138
+#define DDR_PCTL2_DRAMTMG15		0x13c
+#define DDR_PCTL2_DRAMTMG16		0x140
+#define DDR_PCTL2_ZQCTL0		0x180
+#define DDR_PCTL2_ZQCTL1		0x184
+#define DDR_PCTL2_ZQCTL2		0x188
+#define DDR_PCTL2_ZQSTAT		0x18c
+#define DDR_PCTL2_DFITMG0		0x190
+#define DDR_PCTL2_DFITMG1		0x194
+#define DDR_PCTL2_DFILPCFG0		0x198
+#define DDR_PCTL2_DFILPCFG1		0x19c
+#define DDR_PCTL2_DFIUPD0		0x1a0
+#define DDR_PCTL2_DFIUPD1		0x1a4
+#define DDR_PCTL2_DFIUPD2		0x1a8
+#define DDR_PCTL2_DFIMISC		0x1b0
+#define DDR_PCTL2_DFITMG2		0x1b4
+#define DDR_PCTL2_DFITMG3		0x1b8
+#define DDR_PCTL2_DFISTAT		0x1bc
+#define DDR_PCTL2_DBICTL		0x1c0
+#define DDR_PCTL2_ADDRMAP0		0x200
+#define DDR_PCTL2_ADDRMAP1		0x204
+#define DDR_PCTL2_ADDRMAP2		0x208
+#define DDR_PCTL2_ADDRMAP3		0x20c
+#define DDR_PCTL2_ADDRMAP4		0x210
+#define DDR_PCTL2_ADDRMAP5		0x214
+#define DDR_PCTL2_ADDRMAP6		0x218
+#define DDR_PCTL2_ADDRMAP7		0x21c
+#define DDR_PCTL2_ADDRMAP8		0x220
+#define DDR_PCTL2_ADDRMAP9		0x224
+#define DDR_PCTL2_ADDRMAP10		0x228
+#define DDR_PCTL2_ADDRMAP11		0x22c
+#define DDR_PCTL2_ODTCFG		0x240
+#define DDR_PCTL2_ODTMAP		0x244
+#define DDR_PCTL2_SCHED			0x250
+#define DDR_PCTL2_SCHED1		0x254
+#define DDR_PCTL2_PERFHPR1		0x25c
+#define DDR_PCTL2_PERFLPR1		0x264
+#define DDR_PCTL2_PERFWR1		0x26c
+#define DDR_PCTL2_DQMAP0		0x280
+#define DDR_PCTL2_DQMAP1		0x284
+#define DDR_PCTL2_DQMAP2		0x288
+#define DDR_PCTL2_DQMAP3		0x28c
+#define DDR_PCTL2_DQMAP4		0x290
+#define DDR_PCTL2_DQMAP5		0x294
+#define DDR_PCTL2_DBG0			0x300
+#define DDR_PCTL2_DBG1			0x304
+#define DDR_PCTL2_DBGCAM		0x308
+#define DDR_PCTL2_DBGCMD		0x30c
+#define DDR_PCTL2_DBGSTAT		0x310
+#define DDR_PCTL2_SWCTL			0x320
+#define DDR_PCTL2_SWSTAT		0x324
+#define DDR_PCTL2_POISONCFG		0x36c
+#define DDR_PCTL2_POISONSTAT		0x370
+#define DDR_PCTL2_ADVECCINDEX		0x374
+#define DDR_PCTL2_ADVECCSTAT		0x378
+#define DDR_PCTL2_PSTAT			0x3fc
+#define DDR_PCTL2_PCCFG			0x400
+#define DDR_PCTL2_PCFGR_n		0x404
+#define DDR_PCTL2_PCFGW_n		0x408
+#define DDR_PCTL2_PCTRL_n		0x490
+
+/* PCTL2_MRSTAT */
+#define MR_WR_BUSY			BIT(0)
+
+/* PHY_REG0 */
+#define DIGITAL_DERESET			BIT(3)
+#define ANALOG_DERESET			BIT(2)
+#define DIGITAL_RESET			(0 << 3)
+#define ANALOG_RESET			(0 << 2)
+
+/* PHY_REG1 */
+#define PHY_DDR2			(0)
+#define PHY_LPDDR2			(1)
+#define PHY_DDR3			(2)
+#define PHY_LPDDR3			(3)
+#define PHY_DDR4			(4)
+#define PHY_BL_4			(0 << 2)
+#define PHY_BL_8			BIT(2)
+
+/* PHY_REG2 */
+#define PHY_DTT_EN			BIT(0)
+#define PHY_DTT_DISB			(0 << 0)
+#define PHY_WRITE_LEVELING_EN		BIT(2)
+#define PHY_WRITE_LEVELING_DISB		(0 << 2)
+#define PHY_SELECT_CS0			(2)
+#define PHY_SELECT_CS1			(1)
+#define PHY_SELECT_CS0_1		(0)
+#define PHY_WRITE_LEVELING_SELECTCS(n)	(n << 6)
+#define PHY_DATA_TRAINING_SELECTCS(n)	(n << 4)
+
+#define PHY_DDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR3_RON_RTT_451ohm		(1)
+#define PHY_DDR3_RON_RTT_225ohm		(2)
+#define PHY_DDR3_RON_RTT_150ohm		(3)
+#define PHY_DDR3_RON_RTT_112ohm		(4)
+#define PHY_DDR3_RON_RTT_90ohm		(5)
+#define PHY_DDR3_RON_RTT_75ohm		(6)
+#define PHY_DDR3_RON_RTT_64ohm		(7)
+#define PHY_DDR3_RON_RTT_56ohm		(16)
+#define PHY_DDR3_RON_RTT_50ohm		(17)
+#define PHY_DDR3_RON_RTT_45ohm		(18)
+#define PHY_DDR3_RON_RTT_41ohm		(19)
+#define PHY_DDR3_RON_RTT_37ohm		(20)
+#define PHY_DDR3_RON_RTT_34ohm		(21)
+#define PHY_DDR3_RON_RTT_33ohm		(22)
+#define PHY_DDR3_RON_RTT_30ohm		(23)
+#define PHY_DDR3_RON_RTT_28ohm		(24)
+#define PHY_DDR3_RON_RTT_26ohm		(25)
+#define PHY_DDR3_RON_RTT_25ohm		(26)
+#define PHY_DDR3_RON_RTT_23ohm		(27)
+#define PHY_DDR3_RON_RTT_22ohm		(28)
+#define PHY_DDR3_RON_RTT_21ohm		(29)
+#define PHY_DDR3_RON_RTT_20ohm		(30)
+#define PHY_DDR3_RON_RTT_19ohm		(31)
+
+#define PHY_DDR4_LPDDR3_RON_RTT_DISABLE	(0)
+#define PHY_DDR4_LPDDR3_RON_RTT_480ohm	(1)
+#define PHY_DDR4_LPDDR3_RON_RTT_240ohm	(2)
+#define PHY_DDR4_LPDDR3_RON_RTT_160ohm	(3)
+#define PHY_DDR4_LPDDR3_RON_RTT_120ohm	(4)
+#define PHY_DDR4_LPDDR3_RON_RTT_96ohm	(5)
+#define PHY_DDR4_LPDDR3_RON_RTT_80ohm	(6)
+#define PHY_DDR4_LPDDR3_RON_RTT_68ohm	(7)
+#define PHY_DDR4_LPDDR3_RON_RTT_60ohm	(16)
+#define PHY_DDR4_LPDDR3_RON_RTT_53ohm	(17)
+#define PHY_DDR4_LPDDR3_RON_RTT_48ohm	(18)
+#define PHY_DDR4_LPDDR3_RON_RTT_43ohm	(19)
+#define PHY_DDR4_LPDDR3_RON_RTT_40ohm	(20)
+#define PHY_DDR4_LPDDR3_RON_RTT_37ohm	(21)
+#define PHY_DDR4_LPDDR3_RON_RTT_34ohm	(22)
+#define PHY_DDR4_LPDDR3_RON_RTT_32ohm	(23)
+#define PHY_DDR4_LPDDR3_RON_RTT_30ohm	(24)
+#define PHY_DDR4_LPDDR3_RON_RTT_28ohm	(25)
+#define PHY_DDR4_LPDDR3_RON_RTT_26ohm	(26)
+#define PHY_DDR4_LPDDR3_RON_RTT_25ohm	(27)
+#define PHY_DDR4_LPDDR3_RON_RTT_24ohm	(28)
+#define PHY_DDR4_LPDDR3_RON_RTT_22ohm	(29)
+#define PHY_DDR4_LPDDR3_RON_RTT_21ohm	(30)
+#define PHY_DDR4_LPDDR3_RON_RTT_20ohm	(31)
+
+/* noc registers define */
+#define DDRCONF				0x8
+#define DDRTIMING			0xc
+#define DDRMODE				0x10
+#define READLATENCY			0x14
+#define AGING0				0x18
+#define AGING1				0x1c
+#define AGING2				0x20
+#define AGING3				0x24
+#define AGING4				0x28
+#define AGING5				0x2c
+#define ACTIVATE			0x38
+#define DEVTODEV			0x3c
+#define DDR4TIMING			0x40
+
+/* DDR GRF */
+#define DDR_GRF_CON(n)		(0 + (n) * 4)
+#define DDR_GRF_STATUS_BASE	(0X100)
+#define DDR_GRF_STATUS(n)	(DDR_GRF_STATUS_BASE + (n) * 4)
+
+/*
+ * sys_reg bitfield struct
+ * [31]		row_3_4_ch1
+ * [30]		row_3_4_ch0
+ * [29:28]	chinfo
+ * [27]		rank_ch1
+ * [26:25]	col_ch1
+ * [24]		bk_ch1
+ * [23:22]	cs0_row_ch1
+ * [21:20]	cs1_row_ch1
+ * [19:18]	bw_ch1
+ * [17:16]	dbw_ch1;
+ * [15:13]	ddrtype
+ * [12]		channelnum
+ * [11]		rank_ch0
+ * [10:9]	col_ch0
+ * [8]		bk_ch0
+ * [7:6]	cs0_row_ch0
+ * [5:4]	cs1_row_ch0
+ * [3:2]	bw_ch0
+ * [1:0]	dbw_ch0
+*/
+#define SYS_REG_ENC_ROW_3_4(n)	((n) << 30)
+#define SYS_REG_DEC_ROW_3_4(n)	((n >> 30) & 0x1)
+#define SYS_REG_ENC_CHINFO()		(1 << 28)
+#define SYS_REG_ENC_DDRTYPE(n)		((n) << 13)
+#define SYS_REG_ENC_NUM_CH(n)		(((n) - 1) << 12)
+#define SYS_REG_DEC_NUM_CH(n)		(1 + ((n >> 12) & 0x1))
+#define SYS_REG_ENC_RANK(n)		(((n) - 1) << 11)
+#define SYS_REG_DEC_RANK(n)		(1 + ((n >> 11) & 0x1))
+#define SYS_REG_ENC_COL(n)		(((n) - 9) << 9)
+#define SYS_REG_DEC_COL(n)		(9 + ((n >> 9) & 0x3))
+#define SYS_REG_ENC_BK(n)		(((n) == 3 ? 0 : 1) << 8)
+#define SYS_REG_DEC_BK(n)		(3 - ((n >> 8) & 0x1))
+#define SYS_REG_ENC_CS0_ROW(n)		(((n) - 13) << 6)
+#define SYS_REG_DEC_CS0_ROW(n)		(13 + ((n >> 6) & 0x3))
+#define SYS_REG_ENC_CS1_ROW(n)		(((n) - 13) << 4)
+#define SYS_REG_DEC_CS1_ROW(n)		(13 + ((n >> 4) & 0x3))
+#define SYS_REG_ENC_BW(n)		((2 >> (n)) << 2)
+#define SYS_REG_DEC_BW(n)		(2 >> ((n >> 2) & 0x3))
+#define SYS_REG_ENC_DBW(n)		((2 >> (n)) << 0)
+#define SYS_REG_DEC_DBW(n)		(2 >> ((n >> 0) & 0x3))
+
+/* CRU_SOFTRESET_CON5 */
+#define ddrphy_psrstn_req(n)    (((0x1 << 15) << 16) | (n << 15))
+#define ddrphy_srstn_req(n)     (((0x1 << 14) << 16) | (n << 14))
+#define ddrctrl_psrstn_req(n)	(((0x1 << 13) << 16) | (n << 13))
+#define ddrctrl_srstn_req(n)	(((0x1 << 12) << 16) | (n << 12))
+#define ddrmsch_srstn_req(n)	(((0x1 << 11) << 16) | (n << 11))
+#define msch_srstn_req(n)		(((0x1 << 9) << 16) | (n << 9))
+#define dfimon_srstn_req(n)		(((0x1 << 8) << 16) | (n << 8))
+#define grf_ddr_srstn_req(n)	(((0x1 << 7) << 16) | (n << 7))
+/* CRU_SOFTRESET_CON9 */
+#define ddrctrl_asrstn_req(n)		(((0x1 << 9) << 16) | (n << 9))
+
+/* CRU register */
+#define CRU_PLL_CON(pll_id, n)	((pll_id)  * 0x20 + (n) * 4)
+#define CRU_MODE				(0x80)
+#define CRU_GLB_CNT_TH			(0x90)
+#define CRU_CLKSEL_CON_BASE		0x100
+#define CRU_CLKSELS_CON(i)		(CRU_CLKSEL_CON_BASE + ((i) * 4))
+#define CRU_CLKGATE_CON_BASE		0x200
+#define CRU_CLKGATE_CON(i)		(CRU_CLKGATE_CON_BASE + ((i) * 4))
+#define CRU_CLKSFTRST_CON_BASE	0x300
+#define CRU_CLKSFTRST_CON(i)	(CRU_CLKSFTRST_CON_BASE + ((i) * 4))
+
+/* CRU_PLL_CON0 */
+#define PB(n)         ((0x1 << (15 + 16)) | ((n) << 15))
+#define POSTDIV1(n)   ((0x7 << (12 + 16)) | ((n) << 12))
+#define FBDIV(n)      ((0xFFF << 16) | (n))
+
+/* CRU_PLL_CON1 */
+#define RSTMODE(n)    ((0x1 << (15 + 16)) | ((n) << 15))
+#define RST(n)        ((0x1 << (14 + 16)) | ((n) << 14))
+#define PD(n)         ((0x1 << (13 + 16)) | ((n) << 13))
+#define DSMPD(n)      ((0x1 << (12 + 16)) | ((n) << 12))
+#define LOCK(n)       (((n) >> 10) & 0x1)
+#define POSTDIV2(n)   ((0x7 << (6 + 16)) | ((n) << 6))
+#define REFDIV(n)     ((0x3F << 16) | (n))
+
+union noc_ddrtiming {
+	u32 d32;
+	struct {
+		unsigned acttoact:6;
+		unsigned rdtomiss:6;
+		unsigned wrtomiss:6;
+		unsigned burstlen:3;
+		unsigned rdtowr:5;
+		unsigned wrtord:5;
+		unsigned bwratio:1;
+	} b;
+} NOC_TIMING_T;
+
+union noc_activate {
+	u32 d32;
+	struct {
+		unsigned rrd:4;
+		unsigned faw:6;
+		unsigned fawbank:1;
+		unsigned reserved1:21;
+	} b;
+};
+
+union noc_devtodev {
+	u32 d32;
+	struct {
+		unsigned busrdtord:2;
+		unsigned busrdtowr:2;
+		unsigned buswrtord:2;
+		unsigned reserved2:26;
+	} b;
+};
+
+union noc_ddr4timing {
+	u32 d32;
+	struct {
+		unsigned ccdl:3;
+		unsigned wrtordl:5;
+		unsigned rrdl:4;
+		unsigned reserved2:20;
+	} b;
+};
+
+union noc_ddrmode {
+	u32 d32;
+	struct {
+		unsigned autoprecharge:1;
+		unsigned bwratioextended:1;
+		unsigned reserved3:30;
+	} b;
+};
+
+u16 ddr_cfg_2_rbc[] = {
+	/***************************
+	* [5:4]  row(13+n)
+	* [3]    cs(0:0 cs, 1:2 cs)
+	* [2]  bank(0:0bank,1:8bank)
+	* [1:0]    col(11+n)
+	****************************/
+	/* row,        cs,       bank,   col */
+	((3 << 4) | (0 << 3) | (1 << 2) | 0),
+	((3 << 4) | (0 << 3) | (1 << 2) | 1),
+	((2 << 4) | (0 << 3) | (1 << 2) | 2),
+	((3 << 4) | (0 << 3) | (1 << 2) | 2),
+	((2 << 4) | (0 << 3) | (1 << 2) | 3),
+	((3 << 4) | (1 << 3) | (1 << 2) | 0),
+	((3 << 4) | (1 << 3) | (1 << 2) | 1),
+	((2 << 4) | (1 << 3) | (1 << 2) | 2),
+	((3 << 4) | (0 << 3) | (0 << 2) | 1),
+	((2 << 4) | (0 << 3) | (1 << 2) | 1),
+};
+
+u16 ddr4_cfg_2_rbc[] = {
+	/***************************
+	 * [6]	cs 0:0cs 1:2 cs
+	 * [5:3]  row(13+n)
+	 * [2]  cs(0:0 cs, 1:2 cs)
+	 * [1]  bw    0: 16bit 1:32bit
+	 * [0]  diebw 0:8bit 1:16bit
+	 ***************************/
+	/*  cs,       row,        cs,       bw,   diebw */
+	((0 << 6) | (3 << 3) | (0 << 2) | (1 << 1) | 0),
+	((1 << 6) | (2 << 3) | (0 << 2) | (1 << 1) | 0),
+	((0 << 6) | (4 << 3) | (0 << 2) | (0 << 1) | 0),
+	((1 << 6) | (3 << 3) | (0 << 2) | (0 << 1) | 0),
+	((0 << 6) | (4 << 3) | (0 << 2) | (1 << 1) | 1),
+	((1 << 6) | (3 << 3) | (0 << 2) | (1 << 1) | 1),
+	((1 << 6) | (4 << 3) | (0 << 2) | (0 << 1) | 1),
+	((0 << 6) | (2 << 3) | (1 << 2) | (1 << 1) | 0),
+	((0 << 6) | (3 << 3) | (1 << 2) | (0 << 1) | 0),
+	((0 << 6) | (3 << 3) | (1 << 2) | (1 << 1) | 1),
+	((0 << 6) | (4 << 3) | (1 << 2) | (0 << 1) | 1),
+};
+
+u32 addrmap[21][9] = {
+	/* map0  map1  map2  map3  map4  map5  map6  map7  map8 */
+	{22, 0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f0f, 0x3f3f},
+	{23, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f},
+	{23, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x0f080808, 0x00000f0f, 0x3f3f},
+	{24, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f},
+	{24, 0x000a0a0a, 0x00000000, 0x00000000, 0x00000000, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f},
+	{6, 0x00070707, 0x00000000, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f3f},
+	{7, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f3f},
+	{8, 0x00090909, 0x00000000, 0x00000000, 0x00001f00, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x3f3f},
+	{22, 0x001f0808, 0x00000000, 0x00000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f0f, 0x3f3f},
+	{23, 0x00080808, 0x00000000, 0x00000000, 0x00001f1f, 0x07070707,
+		0x0f070707, 0x00000f0f, 0x3f3f},
+
+	{24, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0801},
+	{23, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x0f080808, 0x00000f0f, 0x0801},
+	{24, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x0700},
+	{23, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x0700},
+	{24, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f01},
+	{23, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f0f, 0x3f01},
+	{24, 0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x06060606,
+		0x06060606, 0x00000f06, 0x3f00},
+	{8, 0x003f0a0a, 0x01010100, 0x01010101, 0x00001f1f, 0x09090909,
+		0x0f090909, 0x00000f0f, 0x0801},
+	{7, 0x003f0909, 0x00000007, 0x1f000000, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x0700},
+	{7, 0x003f0909, 0x01010100, 0x01010101, 0x00001f1f, 0x08080808,
+		0x08080808, 0x00000f0f, 0x3f01},
+
+	{6, 0x003f0808, 0x00000007, 0x1f000000, 0x00001f1f, 0x07070707,
+		0x07070707, 0x00000f07, 0x3f00}
+};
+
+struct rk3328_msch_timings {
+	union noc_ddrtiming ddrtiming;
+	union noc_ddrmode ddrmode;
+	u32 readlatency;
+	union noc_activate activate;
+	union noc_devtodev devtodev;
+	union noc_ddr4timing ddr4timing;
+	u32 agingx0;
+};
+
+struct rk3328_msch_regs {
+	u32 coreid;
+	u32 revisionid;
+	u32 ddrconf;
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 aging0;
+	u32 aging1;
+	u32 aging2;
+	u32 aging3;
+	u32 aging4;
+	u32 aging5;
+	u32 reserved[2];
+	u32 activate;
+	u32 devtodev;
+	u32 ddr4_timing;
+};
+
+struct rk3328_ddr_grf_regs {
+	u32 ddr_grf_con[4];
+	u32 reserved[(0x100 - 0x10) / 4];
+	u32 ddr_grf_status[11];
+};
+
+struct rk3328_ddr_pctl_regs {
+	u32 pctl[30][2];
+};
+
+struct rk3328_ddr_phy_regs {
+	u32 phy[5][2];
+};
+
+struct rk3328_ddr_skew {
+	u32 a0_a1_skew[15];
+	u32 cs0_dm0_skew[11];
+	u32 cs0_dm1_skew[11];
+	u32 cs0_dm2_skew[11];
+	u32 cs0_dm3_skew[11];
+	u32 cs1_dm0_skew[11];
+	u32 cs1_dm1_skew[11];
+	u32 cs1_dm2_skew[11];
+	u32 cs1_dm3_skew[11];
+};
+
+struct rk3328_sdram_channel {
+	unsigned int rank;
+	unsigned int col;
+	/* 3:8bank, 2:4bank */
+	unsigned int bk;
+	/* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int bw;
+	/* die buswidth, 2:32bit, 1:16bit, 0:8bit */
+	unsigned int dbw;
+	unsigned int row_3_4;
+	unsigned int cs0_row;
+	unsigned int cs1_row;
+	unsigned int ddrconfig;
+	struct rk3328_msch_timings noc_timings;
+};
+
+struct rk3328_sdram_params {
+	struct rk3328_sdram_channel ch;
+	unsigned int ddr_freq;
+	unsigned int dramtype;
+	unsigned int odt;
+	struct rk3328_ddr_pctl_regs pctl_regs;
+	struct rk3328_ddr_phy_regs phy_regs;
+	struct rk3328_ddr_skew skew;
+};
+
+#define PHY_REG(base, n)		(base + 4 * (n))
+
+#endif
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 9637a35e23..863b1202b7 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -3,23 +3,988 @@
  *
  * SPDX-License-Identifier:     GPL-2.0
  */
-
 #include <common.h>
+#include <clk.h>
+#include <debug_uart.h>
 #include <dm.h>
+#include <dt-structs.h>
 #include <ram.h>
+#include <regmap.h>
 #include <syscon.h>
+#include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3328.h>
 #include <asm/arch/grf_rk3328.h>
 #include <asm/arch/sdram_common.h>
+#include <asm/arch/sdram_rk3328.h>
+#include <asm/arch/uart.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 struct dram_info {
+#ifdef CONFIG_TPL_BUILD
+	struct rk3328_ddr_pctl_regs *pctl;
+	struct rk3328_ddr_phy_regs *phy;
+	struct clk ddr_clk;
+	struct rk3328_cru *cru;
+	struct rk3328_msch_regs *msch;
+	struct rk3328_ddr_grf_regs *ddr_grf;
+#endif
 	struct ram_info info;
 	struct rk3328_grf_regs *grf;
 };
 
+#ifdef CONFIG_TPL_BUILD
+
+struct rk3328_sdram_channel sdram_ch;
+
+struct rockchip_dmc_plat {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct dtd_rockchip_rk3328_dmc dtplat;
+#else
+	struct rk3328_sdram_params sdram_params;
+#endif
+	struct regmap *map;
+};
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+	struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+	struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
+	int ret;
+
+	ret = regmap_init_mem_platdata(dev, dtplat->reg,
+				       ARRAY_SIZE(dtplat->reg) / 2,
+				       &plat->map);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+#endif
+
+static void rkclk_ddr_reset(struct dram_info *dram,
+			    u32 ctl_srstn, u32 ctl_psrstn,
+			    u32 phy_srstn, u32 phy_psrstn)
+{
+	writel(ddrctrl_srstn_req(ctl_srstn) | ddrctrl_psrstn_req(ctl_psrstn) |
+		ddrphy_srstn_req(phy_srstn) | ddrphy_psrstn_req(phy_psrstn),
+		&dram->cru->softrst_con[5]);
+	writel(ddrctrl_asrstn_req(ctl_srstn), &dram->cru->softrst_con[9]);
+}
+
+static void rkclk_set_dpll(struct dram_info *dram, unsigned int mhz)
+{
+	unsigned int refdiv, postdiv1, postdiv2, fbdiv;
+	int delay = 1000;
+
+	refdiv = 1;
+	if (mhz <= 300) {
+		postdiv1 = 4;
+		postdiv2 = 2;
+	} else if (mhz <= 400) {
+		postdiv1 = 6;
+		postdiv2 = 1;
+	} else if (mhz <= 600) {
+		postdiv1 = 4;
+		postdiv2 = 1;
+	} else if (mhz <= 800) {
+		postdiv1 = 3;
+		postdiv2 = 1;
+	} else if (mhz <= 1600) {
+		postdiv1 = 2;
+		postdiv2 = 1;
+	} else {
+		postdiv1 = 1;
+		postdiv2 = 1;
+	}
+	fbdiv = (mhz * refdiv * postdiv1 * postdiv2) / 24;
+
+	writel(((0x1 << 4) << 16) | (0 << 4), &dram->cru->mode_con);
+	writel(POSTDIV1(postdiv1) | FBDIV(fbdiv), &dram->cru->dpll_con[0]);
+	writel(DSMPD(1) | POSTDIV2(postdiv2) | REFDIV(refdiv),
+	       &dram->cru->dpll_con[1]);
+
+	while (delay > 0) {
+		udelay(1);
+		if (LOCK(readl(&dram->cru->dpll_con[1])))
+			break;
+		delay--;
+	}
+
+	writel(((0x1 << 4) << 16) | (1 << 4), &dram->cru->mode_con);
+}
+
+static void rkclk_configure_ddr(struct dram_info *dram,
+				struct rk3328_sdram_params *sdram_params)
+{
+	void __iomem *phy_base = dram->phy;
+
+	/* choose DPLL for ddr clk source */
+	clrbits_le32(PHY_REG(phy_base, 0xef), 1 << 7);
+
+	/* for inno ddr phy need 2*freq */
+	rkclk_set_dpll(dram,  sdram_params->ddr_freq * 2);
+}
+
+static void phy_soft_reset(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrbits_le32(PHY_REG(phy_base, 0), 0x3 << 2);
+	udelay(1);
+	setbits_le32(PHY_REG(phy_base, 0), ANALOG_DERESET);
+	udelay(5);
+	setbits_le32(PHY_REG(phy_base, 0), DIGITAL_DERESET);
+	udelay(1);
+}
+
+static int pctl_cfg(struct dram_info *dram,
+		    struct rk3328_sdram_params *sdram_params)
+{
+	u32 i;
+	void __iomem *pctl_base = dram->pctl;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->pctl_regs.pctl[i][1],
+		       pctl_base + sdram_params->pctl_regs.pctl[i][0]);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_PWRTMG,
+			(0xff << 16) | 0x1f,
+			((SR_IDLE & 0xff) << 16) | (PD_IDLE & 0x1f));
+	/*
+	 * dfi_lp_en_pd=1,dfi_lp_wakeup_pd=2
+	 * hw_lp_idle_x32=1
+	 */
+	if (sdram_params->dramtype == LPDDR3) {
+		setbits_le32(pctl_base + DDR_PCTL2_DFILPCFG0, 1);
+		clrsetbits_le32(pctl_base + DDR_PCTL2_DFILPCFG0,
+				0xf << 4,
+				2 << 4);
+	}
+	clrsetbits_le32(pctl_base + DDR_PCTL2_HWLPCTL,
+			0xfff << 16,
+			1 << 16);
+	/* disable zqcs */
+	setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1u << 31);
+	setbits_le32(pctl_base + 0x2000 + DDR_PCTL2_ZQCTL0, 1u << 31);
+
+	return 0;
+}
+
+/* return ddrconfig value
+ *       (-1), find ddrconfig fail
+ *       other, the ddrconfig value
+ * only support cs0_row >= cs1_row
+ */
+static unsigned int calculate_ddrconfig(
+	struct rk3328_sdram_params *sdram_params)
+{
+	u32 cs, bw, die_bw, col, row, bank;
+	u32 i, tmp;
+	u32 ddrconf = -1;
+
+	cs = sdram_ch.rank;
+	bw = sdram_ch.bw;
+	die_bw = sdram_ch.dbw;
+	col = sdram_ch.col;
+	row = sdram_ch.cs0_row;
+	bank = sdram_ch.bk;
+
+	if (sdram_params->dramtype == DDR4) {
+		tmp = ((cs - 1) << 6) | ((row - 13) << 3) | (bw & 0x2) | die_bw;
+		for (i = 10; i < 17; i++) {
+			if (((tmp & 0x7) == (ddr4_cfg_2_rbc[i - 10] & 0x7)) &&
+			    ((tmp & 0x3c) <= (ddr4_cfg_2_rbc[i - 10] & 0x3c)) &&
+			    ((tmp & 0x40) <= (ddr4_cfg_2_rbc[i - 10] & 0x40))) {
+				ddrconf = i;
+				goto out;
+			}
+		}
+	} else {
+		if (bank == 2) {
+			ddrconf = 8;
+			goto out;
+		}
+
+		tmp = ((row - 13) << 4) | (1 << 2) | ((bw + col - 11) << 0);
+		for (i = 0; i < 5; i++)
+			if (((tmp & 0xf) == (ddr_cfg_2_rbc[i] & 0xf)) &&
+			    ((tmp & 0x30) <= (ddr_cfg_2_rbc[i] & 0x30))) {
+				ddrconf = i;
+				goto out;
+			}
+	}
+
+out:
+	if (ddrconf > 20)
+		printf("calculate_ddrconfig error\n");
+
+	return ddrconf;
+}
+
+/* n: Unit bytes */
+static void copy_to_reg(u32 *dest, u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+/*******
+ * calculate controller dram address map, and setting to register.
+ * argument sdram_ch.ddrconf must be right value before
+ * call this function.
+ *******/
+static void set_ctl_address_map(struct dram_info *dram,
+				struct rk3328_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	copy_to_reg((u32 *)(pctl_base + DDR_PCTL2_ADDRMAP0),
+		    &addrmap[sdram_ch.ddrconfig][0], 9 * 4);
+	if ((sdram_params->dramtype == LPDDR3) && (sdram_ch.row_3_4))
+		setbits_le32(pctl_base + DDR_PCTL2_ADDRMAP6, 1 << 31);
+	if ((sdram_params->dramtype == DDR4) && (sdram_ch.bw == 0x1))
+		setbits_le32(pctl_base + DDR_PCTL2_PCCFG, 1 << 8);
+
+	if (sdram_ch.rank == 1)
+		clrsetbits_le32(pctl_base + DDR_PCTL2_ADDRMAP0, 0x1f, 0x1f);
+}
+
+static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
+{
+	u32 tmp;
+	void __iomem *phy_base = dram->phy;
+
+	setbits_le32(PHY_REG(phy_base, 0x13), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x14), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x26), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x27), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x36), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x37), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x46), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x47), 1 << 3);
+	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4);
+	clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3);
+
+	if (freq <= (400 * MHz))
+		/* DLL bypass */
+		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	else
+		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
+	if (freq <= (680 * MHz))
+		tmp = 2;
+	else
+		tmp = 1;
+	writel(tmp, PHY_REG(phy_base, 0x28));
+	writel(tmp, PHY_REG(phy_base, 0x38));
+	writel(tmp, PHY_REG(phy_base, 0x48));
+	writel(tmp, PHY_REG(phy_base, 0x58));
+}
+
+static void set_ds_odt(struct dram_info *dram,
+		       struct rk3328_sdram_params *sdram_params)
+{
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+	void __iomem *phy_base = dram->phy;
+
+	if (sdram_params->dramtype == DDR3) {
+		cmd_drv = PHY_DDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR3_RON_RTT_45ohm;
+		dqs_drv = PHY_DDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR3_RON_RTT_225ohm;
+	} else {
+		cmd_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		clk_drv = PHY_DDR4_LPDDR3_RON_RTT_43ohm;
+		dqs_drv = PHY_DDR4_LPDDR3_RON_RTT_34ohm;
+		dqs_odt = PHY_DDR4_LPDDR3_RON_RTT_240ohm;
+	}
+	/* DS */
+	writel(cmd_drv, PHY_REG(phy_base, 0x11));
+	clrsetbits_le32(PHY_REG(phy_base, 0x12), 0x1f << 3, cmd_drv << 3);
+	writel(clk_drv, PHY_REG(phy_base, 0x16));
+	writel(clk_drv, PHY_REG(phy_base, 0x18));
+	writel(dqs_drv, PHY_REG(phy_base, 0x20));
+	writel(dqs_drv, PHY_REG(phy_base, 0x2f));
+	writel(dqs_drv, PHY_REG(phy_base, 0x30));
+	writel(dqs_drv, PHY_REG(phy_base, 0x3f));
+	writel(dqs_drv, PHY_REG(phy_base, 0x40));
+	writel(dqs_drv, PHY_REG(phy_base, 0x4f));
+	writel(dqs_drv, PHY_REG(phy_base, 0x50));
+	writel(dqs_drv, PHY_REG(phy_base, 0x5f));
+	/* ODT */
+	writel(dqs_odt, PHY_REG(phy_base, 0x21));
+	writel(dqs_odt, PHY_REG(phy_base, 0x2e));
+	writel(dqs_odt, PHY_REG(phy_base, 0x31));
+	writel(dqs_odt, PHY_REG(phy_base, 0x3e));
+	writel(dqs_odt, PHY_REG(phy_base, 0x41));
+	writel(dqs_odt, PHY_REG(phy_base, 0x4e));
+	writel(dqs_odt, PHY_REG(phy_base, 0x51));
+	writel(dqs_odt, PHY_REG(phy_base, 0x5e));
+}
+
+static void phy_cfg(struct dram_info *dram,
+		    struct rk3328_sdram_params *sdram_params)
+{
+	u32 i;
+	void __iomem *phy_base = dram->phy;
+
+	phy_dll_bypass_set(dram, sdram_params->ddr_freq);
+	for (i = 0; sdram_params->phy_regs.phy[i][0] != 0xFFFFFFFF; i++) {
+		writel(sdram_params->phy_regs.phy[i][1],
+		       phy_base + sdram_params->phy_regs.phy[i][0]);
+	}
+	if (sdram_ch.bw == 2) {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 0xf << 4);
+	} else {
+		clrsetbits_le32(PHY_REG(phy_base, 0), 0xf << 4, 3 << 4);
+		/* disable DQS2,DQS3 tx dll  for saving power */
+		clrbits_le32(PHY_REG(phy_base, 0x46), 1 << 3);
+		clrbits_le32(PHY_REG(phy_base, 0x56), 1 << 3);
+	}
+	set_ds_odt(dram, sdram_params);
+	/* deskew */
+	setbits_le32(PHY_REG(phy_base, 2), 8);
+	copy_to_reg(PHY_REG(phy_base, 0xb0),
+		    &sdram_params->skew.a0_a1_skew[0], 15 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0x70),
+		    &sdram_params->skew.cs0_dm0_skew[0], 44 * 4);
+	copy_to_reg(PHY_REG(phy_base, 0xc0),
+		    &sdram_params->skew.cs0_dm1_skew[0], 44 * 4);
+}
+
+static int update_refresh_reg(struct dram_info *dram)
+{
+	void __iomem *pctl_base = dram->pctl;
+	u32 ret;
+
+	ret = readl(pctl_base + DDR_PCTL2_RFSHCTL3) ^ (1 << 1);
+	writel(ret, pctl_base + DDR_PCTL2_RFSHCTL3);
+
+	return 0;
+}
+
+static int data_training(struct dram_info *dram, u32 cs, u32 dramtype)
+{
+	u32 ret;
+	u32 dis_auto_zq = 0;
+	void __iomem *pctl_base = dram->pctl;
+	void __iomem *phy_base = dram->phy;
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0);
+	}
+	/* choose training cs */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs));
+	/* enable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 1);
+	udelay(50);
+	ret = readl(PHY_REG(phy_base, 0xff));
+	/* disable gate training */
+	clrsetbits_le32(PHY_REG(phy_base, 2), 0x33, (0x20 >> cs) | 0);
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	if (dramtype == DDR4) {
+		clrsetbits_le32(PHY_REG(phy_base, 0x29), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x39), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x49), 0x3, 0x2);
+		clrsetbits_le32(PHY_REG(phy_base, 0x59), 0x3, 0x2);
+	}
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ (readl(PHY_REG(phy_base, 0)) >> 4);
+		ret = (ret == 0) ? 0 : -1;
+	}
+	return ret;
+}
+
+/* rank = 1: cs0
+ * rank = 2: cs1
+ * rank = 3: cs0 & cs1
+ * note: be careful of keep mr original val
+ */
+static int write_mr(struct dram_info *dram, u32 rank, u32 mr_num, u32 arg,
+		    u32 dramtype)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+	if ((dramtype == DDR3) || (dramtype == DDR4)) {
+		writel((mr_num << 12) | (rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel(arg, pctl_base + DDR_PCTL2_MRCTRL1);
+	} else {
+		writel((rank << 4) | (0 << 0),
+		       pctl_base + DDR_PCTL2_MRCTRL0);
+		writel((mr_num << 8) | (arg & 0xff),
+		       pctl_base + DDR_PCTL2_MRCTRL1);
+	}
+
+	setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31);
+	while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31))
+		continue;
+	while (readl(pctl_base + DDR_PCTL2_MRSTAT) & MR_WR_BUSY)
+		continue;
+
+	return 0;
+}
+
+/*
+ * rank : 1:cs0, 2:cs1, 3:cs0&cs1
+ * vrefrate: 4500: 45%,
+ */
+static int write_vrefdq(struct dram_info *dram, u32 rank, u32 vrefrate,
+			u32 dramtype)
+{
+	u32 tccd_l, value;
+	u32 dis_auto_zq = 0;
+	void __iomem *pctl_base = dram->pctl;
+
+	if ((dramtype != DDR4) || (vrefrate < 4500) ||
+	    (vrefrate > 9200))
+		return -1;
+
+	tccd_l = (readl(pctl_base + DDR_PCTL2_DRAMTMG4) >> 16) & 0xf;
+	tccd_l = (tccd_l - 4) << 10;
+
+	if (vrefrate > 7500) {
+		/* range 1 */
+		value = ((vrefrate - 6000) / 65) | tccd_l;
+	} else {
+		/* range 2 */
+		value = ((vrefrate - 4500) / 65) | tccd_l | (1 << 6);
+	}
+
+	/* disable zqcs */
+	if (!(readl(pctl_base + DDR_PCTL2_ZQCTL0) &
+		(1ul << 31))) {
+		dis_auto_zq = 1;
+		setbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	}
+	/* disable auto refresh */
+	setbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	/* enable vrefdq calibratin */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvrefdqe */
+	/* write vrefdq value */
+	write_mr(dram, rank, 6, value | (1 << 7), dramtype);
+	udelay(1);/* tvref_time */
+	write_mr(dram, rank, 6, value | (0 << 7), dramtype);
+	udelay(1);/* tvrefdqx */
+
+	/* restore zqcs */
+	if (dis_auto_zq)
+		clrbits_le32(pctl_base + DDR_PCTL2_ZQCTL0, 1 << 31);
+	/* restore auto refresh */
+	clrbits_le32(pctl_base + DDR_PCTL2_RFSHCTL3, 1);
+	update_refresh_reg(dram);
+
+	return 0;
+}
+
+#define _MAX_(x, y) (x > y ? x : y)
+
+static void rx_deskew_switch_adjust(struct dram_info *dram)
+{
+	u32 i, deskew_val;
+	u32 gate_val = 0;
+	void __iomem *phy_base = dram->phy;
+
+	for (i = 0; i < 4; i++)
+		gate_val = _MAX_(readl(PHY_REG(phy_base, 0xfb + i)), gate_val);
+
+	deskew_val = (gate_val >> 3) + 1;
+	deskew_val = (deskew_val > 0x1f) ? 0x1f : deskew_val;
+	clrsetbits_le32(PHY_REG(phy_base, 0x6e), 0xc, (deskew_val & 0x3) << 2);
+	clrsetbits_le32(PHY_REG(phy_base, 0x6f), 0x7 << 4,
+			(deskew_val & 0x1c) << 2);
+}
+
+static void tx_deskew_switch_adjust(struct dram_info *dram)
+{
+	void __iomem *phy_base = dram->phy;
+
+	clrsetbits_le32(PHY_REG(phy_base, 0x6e), 0x3, 1);
+}
+
+static void set_ddrconfig(struct dram_info *dram, u32 ddrconfig)
+{
+	writel(ddrconfig, &dram->msch->ddrconf);
+}
+
+static void dram_all_config(struct dram_info *dram,
+			    struct rk3328_sdram_params *sdram_params)
+{
+	u32 sys_reg = 0;
+
+	set_ddrconfig(dram, sdram_ch.ddrconfig);
+
+	sys_reg |= SYS_REG_ENC_DDRTYPE(sdram_params->dramtype);
+	sys_reg |= SYS_REG_ENC_ROW_3_4(sdram_ch.row_3_4);
+	sys_reg |= SYS_REG_ENC_RANK(sdram_ch.rank);
+	sys_reg |= SYS_REG_ENC_COL(sdram_ch.col);
+	sys_reg |= SYS_REG_ENC_BK(sdram_ch.bk);
+	sys_reg |= SYS_REG_ENC_CS0_ROW(sdram_ch.cs0_row);
+	if (sdram_ch.cs1_row)
+		sys_reg |= SYS_REG_ENC_CS1_ROW(sdram_ch.cs1_row);
+	sys_reg |= SYS_REG_ENC_BW(sdram_ch.bw);
+	sys_reg |= SYS_REG_ENC_DBW(sdram_ch.dbw);
+
+	writel(sys_reg, &dram->grf->os_reg[2]);
+
+	writel(sdram_ch.noc_timings.ddrtiming.d32, &dram->msch->ddrtiming);
+
+	writel(sdram_ch.noc_timings.ddrmode.d32, &dram->msch->ddrmode);
+	writel(sdram_ch.noc_timings.readlatency, &dram->msch->readlatency);
+
+	writel(sdram_ch.noc_timings.activate.d32, &dram->msch->activate);
+	writel(sdram_ch.noc_timings.devtodev.d32, &dram->msch->devtodev);
+	writel(sdram_ch.noc_timings.ddr4timing.d32, &dram->msch->ddr4_timing);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging0);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging1);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging2);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging3);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging4);
+	writel(sdram_ch.noc_timings.agingx0, &dram->msch->aging5);
+}
+
+static void enable_low_power(struct dram_info *dram,
+			     struct rk3328_sdram_params *sdram_params)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/* enable upctl2 axi clock auto gating */
+	writel(0x00800000, &dram->ddr_grf->ddr_grf_con[0]);
+	writel(0x20012001, &dram->ddr_grf->ddr_grf_con[2]);
+	/* enable upctl2 core clock auto gating */
+	writel(0x001e001a, &dram->ddr_grf->ddr_grf_con[2]);
+	/* enable sr, pd */
+	if (PD_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 1));
+	if (SR_IDLE == 0)
+		clrbits_le32(pctl_base + DDR_PCTL2_PWRCTL,	1);
+	else
+		setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, 1);
+	setbits_le32(pctl_base + DDR_PCTL2_PWRCTL, (1 << 3));
+}
+
+static int sdram_init(struct dram_info *dram,
+		      struct rk3328_sdram_params *sdram_params, u32 pre_init)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	rkclk_ddr_reset(dram, 1, 1, 1, 1);
+	udelay(10);
+	/*
+	 * dereset ddr phy psrstn to config pll,
+	 * if using phy pll psrstn must be dereset
+	 * before config pll
+	 */
+	rkclk_ddr_reset(dram, 1, 1, 1, 0);
+	rkclk_configure_ddr(dram, sdram_params);
+	if (pre_init == 0) {
+		switch (sdram_params->dramtype) {
+		case DDR3:
+			printf("DDR3\n");
+			break;
+		case DDR4:
+			printf("DDR4\n");
+			break;
+		case LPDDR3:
+		default:
+			printf("LPDDR3\n");
+			break;
+		}
+	}
+	/* release phy srst to provide clk to ctrl */
+	rkclk_ddr_reset(dram, 1, 1, 0, 0);
+	udelay(10);
+	phy_soft_reset(dram);
+	/* release ctrl presetn, and config ctl registers */
+	rkclk_ddr_reset(dram, 1, 0, 0, 0);
+	pctl_cfg(dram, sdram_params);
+	sdram_ch.ddrconfig = calculate_ddrconfig(sdram_params);
+	set_ctl_address_map(dram, sdram_params);
+	phy_cfg(dram, sdram_params);
+
+	/* enable dfi_init_start to init phy after ctl srstn deassert */
+	setbits_le32(pctl_base + DDR_PCTL2_DFIMISC, (1 << 5) | (1 << 4));
+	rkclk_ddr_reset(dram, 0, 0, 0, 0);
+	/* wait for dfi_init_done and dram init complete */
+	while ((readl(pctl_base + DDR_PCTL2_STAT) & 0x7) == 0)
+		continue;
+
+	/* do ddr gate training */
+	if (data_training(dram, 0, sdram_params->dramtype) != 0) {
+		printf("data training error\n");
+		return -1;
+	}
+
+	if (sdram_params->dramtype == DDR4)
+		write_vrefdq(dram, 0x3, 5670, sdram_params->dramtype);
+
+	if (pre_init == 0) {
+		rx_deskew_switch_adjust(dram);
+		tx_deskew_switch_adjust(dram);
+	}
+
+	dram_all_config(dram, sdram_params);
+	enable_low_power(dram, sdram_params);
+
+	return 0;
+}
+
+static u64 dram_detect_cap(struct dram_info *dram,
+			   struct rk3328_sdram_params *sdram_params,
+			   unsigned char channel)
+{
+	void __iomem *pctl_base = dram->pctl;
+
+	/*
+	 * for ddr3: ddrconf = 3
+	 * for ddr4: ddrconf = 12
+	 * for lpddr3: ddrconf = 3
+	 * default bw = 1
+	 */
+	u32 bk, bktmp;
+	u32 col, coltmp;
+	u32 row, rowtmp, row_3_4;
+	void __iomem *test_addr, *test_addr1;
+	u32 dbw;
+	u32 cs;
+	u32 bw = 1;
+	u64 cap = 0;
+	u32 dram_type = sdram_params->dramtype;
+	u32 pwrctl;
+
+	if (dram_type != DDR4) {
+		/* detect col and bk for ddr3/lpddr3 */
+		coltmp = 12;
+		bktmp = 3;
+		rowtmp = 16;
+
+		for (col = coltmp; col >= 9; col -= 1) {
+			writel(0, SDRAM_ADDR);
+			test_addr = (void __iomem *)(SDRAM_ADDR +
+					(1ul << (col + bw - 1ul)));
+			writel(PATTERN, test_addr);
+			if ((readl(test_addr) == PATTERN) &&
+			    (readl(SDRAM_ADDR) == 0))
+				break;
+		}
+		if (col == 8) {
+			printf("col error\n");
+			goto cap_err;
+		}
+
+		test_addr = (void __iomem *)(SDRAM_ADDR +
+				(1ul << (coltmp + bktmp + bw - 1ul)));
+		writel(0, SDRAM_ADDR);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_ADDR) == 0))
+			bk = 3;
+		else
+			bk = 2;
+		if (dram_type == LPDDR3)
+			dbw = 2;
+		else
+			dbw = 1;
+	} else {
+		/* detect bg for ddr4 */
+		coltmp = 10;
+		bktmp = 4;
+		rowtmp = 17;
+
+		col = 10;
+		bk = 2;
+		test_addr = (void __iomem *)(SDRAM_ADDR +
+				(1ul << (coltmp + bw + 1ul)));
+		writel(0, SDRAM_ADDR);
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_ADDR) == 0))
+			dbw = 0;
+		else
+			dbw = 1;
+	}
+	/* detect row */
+	for (row = rowtmp; row > 12; row--) {
+		writel(0, SDRAM_ADDR);
+		test_addr = (void __iomem *)(SDRAM_ADDR +
+				(1ul << (row + bktmp + coltmp + bw - 1ul)));
+		writel(PATTERN, test_addr);
+		if ((readl(test_addr) == PATTERN) &&
+		    (readl(SDRAM_ADDR) == 0))
+			break;
+	}
+	if (row == 12) {
+		printf("row error");
+		goto cap_err;
+	}
+	/* detect row_3_4 */
+	test_addr = SDRAM_ADDR;
+	test_addr1 = (void __iomem *)(SDRAM_ADDR +
+			(0x3ul << (row + bktmp + coltmp + bw - 1ul - 1ul)));
+
+	writel(0, test_addr);
+	writel(PATTERN, test_addr1);
+	if ((readl(test_addr) == 0) &&
+	    (readl(test_addr1) == PATTERN))
+		row_3_4 = 0;
+	else
+		row_3_4 = 1;
+
+	/* disable auto low-power */
+	pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL);
+	writel(0, pctl_base + DDR_PCTL2_PWRCTL);
+
+	/* bw and cs detect using phy read gate training */
+	if (data_training(dram, 1, dram_type) == 0)
+		cs = 1;
+	else
+		cs = 0;
+
+	bw = 2;
+
+	/* restore auto low-power */
+	writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL);
+
+	sdram_ch.rank = cs + 1;
+	sdram_ch.col = col;
+	sdram_ch.bk = bk;
+	sdram_ch.dbw = dbw;
+	sdram_ch.bw = bw;
+	sdram_ch.cs0_row = row;
+	if (cs)
+		sdram_ch.cs1_row = row;
+	else
+		sdram_ch.cs1_row = 0;
+	sdram_ch.row_3_4 = row_3_4;
+
+	if (dram_type == DDR4)
+		cap = 1llu << (cs + row + bk + col + ((dbw == 0) ? 2 : 1) + bw);
+	else
+		cap = 1llu << (cs + row + bk + col + bw);
+
+	return cap;
+
+cap_err:
+	return 0;
+}
+
+static u32 remodify_sdram_params(struct rk3328_sdram_params *sdram_params)
+{
+	u32 tmp = 0, tmp_adr = 0, i;
+
+	for (i = 0; sdram_params->pctl_regs.pctl[i][0] != 0xFFFFFFFF; i++) {
+		if (sdram_params->pctl_regs.pctl[i][0] == 0) {
+			tmp = sdram_params->pctl_regs.pctl[i][1];/* MSTR */
+			tmp_adr = i;
+		}
+	}
+
+	tmp &= ~((3ul << 30) | (3ul << 24) | (3ul << 12));
+
+	switch (sdram_ch.dbw) {
+	case 2:
+		tmp |= (3ul << 30);
+		break;
+	case 1:
+		tmp |= (2ul << 30);
+		break;
+	case 0:
+	default:
+		tmp |= (1ul << 30);
+		break;
+	}
+
+	if (sdram_ch.rank == 2)
+		tmp |= 3 << 24;
+	else
+		tmp |= 1 << 24;
+
+	tmp |= (2 - sdram_ch.bw) << 12;
+
+	sdram_params->pctl_regs.pctl[tmp_adr][1] = tmp;
+
+	if (sdram_ch.bw == 2)
+		sdram_ch.noc_timings.ddrtiming.b.bwratio = 0;
+	else
+		sdram_ch.noc_timings.ddrtiming.b.bwratio = 1;
+
+	return 0;
+}
+
+static int dram_detect_cs1_row(struct rk3328_sdram_params *sdram_params,
+			       unsigned char channel)
+{
+	u32 ret = 0;
+	u32 cs1_bit;
+	void __iomem *test_addr, *cs1_addr;
+	u32 row, bktmp, coltmp, bw;
+	u32 ddrconf = sdram_ch.ddrconfig;
+
+	if (sdram_ch.rank == 2) {
+		cs1_bit = addrmap[ddrconf][0] + 8;
+
+		if (cs1_bit > 31)
+			goto out;
+
+		cs1_addr = (void __iomem *)(1ul << cs1_bit);
+		if (cs1_bit < 20)
+			cs1_bit = 1;
+		else
+			cs1_bit = 0;
+
+		if (sdram_params->dramtype == DDR4) {
+			if (sdram_ch.dbw == 0)
+				bktmp = sdram_ch.bk + 2;
+			else
+				bktmp = sdram_ch.bk + 1;
+		} else {
+			bktmp = sdram_ch.bk;
+		}
+		bw = sdram_ch.bw;
+		coltmp = sdram_ch.col;
+
+		/* detect cs1 row */
+		for (row = sdram_ch.cs0_row; row > 12; row--) {
+			test_addr = (void __iomem *)(SDRAM_ADDR + cs1_addr +
+					(1ul << (row + cs1_bit + bktmp +
+					 coltmp + bw - 1ul)));
+			writel(0, SDRAM_ADDR + cs1_addr);
+			writel(PATTERN, test_addr);
+			if ((readl(test_addr) == PATTERN) &&
+			    (readl(SDRAM_ADDR + cs1_addr) == 0)) {
+				ret = row;
+				break;
+			}
+		}
+	}
+
+out:
+	return ret;
+}
+
+static int sdram_init_detect(struct dram_info *dram,
+			     struct rk3328_sdram_params *sdram_params)
+{
+	debug("Starting SDRAM initialization...\n");
+
+	memcpy(&sdram_ch, &sdram_params->ch,
+	       sizeof(struct rk3328_sdram_channel));
+
+	sdram_init(dram, sdram_params, 1);
+	dram_detect_cap(dram, sdram_params, 0);
+
+	/* modify bw, cs related timing */
+	remodify_sdram_params(sdram_params);
+	/* reinit sdram by real dram cap */
+	sdram_init(dram, sdram_params, 0);
+
+	/* redetect cs1 row */
+	sdram_ch.cs1_row =
+		dram_detect_cs1_row(sdram_params, 0);
+
+	return 0;
+}
+
+static int rk3328_dmc_init(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+	struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+	int ret;
+
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk3328_sdram_params *params = &plat->sdram_params;
+#else
+	struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat;
+	struct rk3328_sdram_params *params =
+					(void *)dtplat->rockchip_sdram_params;
+
+	ret = conv_of_platdata(dev);
+	if (ret)
+		return ret;
+#endif
+	priv->phy = regmap_get_range(plat->map, 0);
+	priv->pctl = regmap_get_range(plat->map, 1);
+	priv->grf = regmap_get_range(plat->map, 2);
+	priv->cru = regmap_get_range(plat->map, 3);
+	priv->msch = regmap_get_range(plat->map, 4);
+	priv->ddr_grf = regmap_get_range(plat->map, 5);
+
+	debug("%s phy %p pctrl %p grf %p cru %p msch %p ddr_grf %p\n",
+	      __func__, priv->phy, priv->pctl, priv->grf, priv->cru,
+	      priv->msch, priv->ddr_grf);
+	ret = sdram_init_detect(priv, params);
+	if (ret < 0) {
+		printf("%s DRAM init failed%d\n", __func__, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rk3328_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rockchip_dmc_plat *plat = dev_get_platdata(dev);
+	int ret;
+
+	ret = dev_read_u32_array(dev, "rockchip,sdram-params",
+				 (u32 *)&plat->sdram_params,
+				 sizeof(plat->sdram_params) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,sdram-params %d\n",
+		       __func__, ret);
+		return ret;
+	}
+	ret = regmap_init_mem(dev, &plat->map);
+	if (ret)
+		printf("%s: regmap failed %d\n", __func__, ret);
+#endif
+	return 0;
+}
+
+#endif
+
 static int rk3328_dmc_probe(struct udevice *dev)
 {
+#ifdef CONFIG_TPL_BUILD
+	if (rk3328_dmc_init(dev))
+		return 0;
+#else
 	struct dram_info *priv = dev_get_priv(dev);
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
@@ -27,7 +992,7 @@ static int rk3328_dmc_probe(struct udevice *dev)
 	priv->info.base = CONFIG_SYS_SDRAM_BASE;
 	priv->info.size = rockchip_sdram_size(
 				(phys_addr_t)&priv->grf->os_reg[2]);
-
+#endif
 	return 0;
 }
 
@@ -44,7 +1009,6 @@ static struct ram_ops rk3328_dmc_ops = {
 	.get_info = rk3328_dmc_get_info,
 };
 
-
 static const struct udevice_id rk3328_dmc_ids[] = {
 	{ .compatible = "rockchip,rk3328-dmc" },
 	{ }
@@ -55,6 +1019,12 @@ U_BOOT_DRIVER(dmc_rk3328) = {
 	.id = UCLASS_RAM,
 	.of_match = rk3328_dmc_ids,
 	.ops = &rk3328_dmc_ops,
+#ifdef CONFIG_TPL_BUILD
+	.ofdata_to_platdata = rk3328_dmc_ofdata_to_platdata,
+#endif
 	.probe = rk3328_dmc_probe,
 	.priv_auto_alloc_size = sizeof(struct dram_info),
+#ifdef CONFIG_TPL_BUILD
+	.platdata_auto_alloc_size = sizeof(struct rockchip_dmc_plat),
+#endif
 };

commit 1e1495636574c78ea9d3af3e0aae95d5204612d6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 11:08:22 2017 +0800

    rockchip: dts: rk3328: update dmc node for driver
    
    Update dmc node for full feature driver.
    
    Change-Id: Ie75b738a00c3f77ae5033d75ae21fe80238c119b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 5147795915..3bac4e4415 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include "rk3328.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"
 
 / {
 	model = "Rockchip RK3328 EVB";
diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
new file mode 100644
index 0000000000..d99e7e0352
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&dmc {
+	rockchip,sdram-params = <
+		0x1
+		0xC
+		0x3
+		0x1
+		0x0
+		0x0
+		0x10
+		0x10
+		0
+
+		0x9028b189
+		0x00000000
+		0x00000021
+		0x00000482
+		0x00000015
+		0x00000222
+		0x000000ff
+
+		333
+		3
+		0
+
+		0x00000000
+		0x43041001
+		0x00000064
+		0x0028003b
+		0x000000d0
+		0x00020053
+		0x000000d4
+		0x00020000
+		0x000000d8
+		0x00000100
+		0x000000dc
+		0x03200000
+		0x000000e0
+		0x00000000
+		0x000000e4
+		0x00090000
+		0x000000f4
+		0x000f011f
+		0x00000100
+		0x07090b06
+		0x00000104
+		0x00050209
+		0x00000108
+		0x03030407
+		0x0000010c
+		0x00202006
+		0x00000110
+		0x03020204
+		0x00000114
+		0x03030202
+		0x00000120
+		0x00000903
+		0x00000180
+		0x00800020
+		0x00000184
+		0x00000000
+		0x00000190
+		0x07010001
+		0x00000198
+		0x05001100
+		0x000001a0
+		0xc0400003
+		0x00000240
+		0x06000604
+		0x00000244
+		0x00000201
+		0x00000250
+		0x00000f00
+		0x00000490
+		0x00000001
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+
+		0x00000004
+		0x0000000a
+		0x00000028
+		0x00000006
+		0x0000002c
+		0x00000000
+		0x00000030
+		0x00000005
+		0xffffffff
+		0xffffffff
+
+		0x77
+		0x88
+		0x79
+		0x79
+		0x87
+		0x97
+		0x87
+		0x78
+		0x77
+		0x78
+		0x87
+		0x88
+		0x87
+		0x87
+		0x77
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+	>;
+};
diff --git a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
new file mode 100644
index 0000000000..62d809e833
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+&dmc {
+	rockchip,sdram-params = <
+		0x1
+		0xC
+		0x3
+		0x1
+		0x0
+		0x0
+		0x10
+		0x10
+		0
+
+		0x0c48a18a
+		0x00000000
+		0x00000021
+		0x00000482
+		0x00000015
+		0x0000021a
+		0x000000ff
+
+		333
+		6
+		0
+
+		0x00000000
+		0xc3040008
+		0x00000064
+		0x00140023
+		0x000000d0
+		0x00220002
+		0x000000d4
+		0x00010000
+		0x000000d8
+		0x00000703
+		0x000000dc
+		0x00830004
+		0x000000e0
+		0x00010000
+		0x000000e4
+		0x00070003
+		0x00000100
+		0x06090b07
+		0x00000104
+		0x0002020b
+		0x00000108
+		0x02030506
+		0x0000010c
+		0x00505000
+		0x00000110
+		0x03020204
+		0x00000114
+		0x01010303
+		0x00000118
+		0x02020003
+		0x00000120
+		0x00000303
+		0x00000138
+		0x00000025
+		0x00000180
+		0x003c000f
+		0x00000184
+		0x00900000
+		0x00000190
+		0x07020000
+		0x00000198
+		0x05001100
+		0x000001a0
+		0xc0400003
+		0x00000240
+		0x0900090c
+		0x00000244
+		0x00000101
+		0x00000250
+		0x00000f00
+		0x00000490
+		0x00000001
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+		0xffffffff
+
+		0x00000004
+		0x0000000b
+		0x00000028
+		0x00000006
+		0x0000002c
+		0x00000000
+		0x00000030
+		0x00000003
+		0xffffffff
+		0xffffffff
+
+		0x77
+		0x88
+		0x79
+		0x79
+		0x87
+		0x97
+		0x87
+		0x78
+		0x77
+		0x78
+		0x87
+		0x88
+		0x87
+		0x87
+		0x77
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x78
+		0x77
+		0x79
+		0x9
+
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x78
+		0x69
+		0x9
+
+		0x77
+		0x78
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x77
+		0x79
+		0x9
+	>;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 51da1e9ab7..b821c4c979 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -354,10 +354,15 @@
 		status = "disabled";
 	};
 
-	dmc: dmc@ff400000 {
+	dmc: dmc {
 		u-boot,dm-pre-reloc;
-		compatible = "rockchip,rk3328-dmc", "syscon";
-		reg = <0x0 0xff400000 0x0 0x1000>;
+		compatible = "rockchip,rk3328-dmc";
+		reg = <0x0 0xff400000 0x0 0x1000
+		       0x0 0xff780000 0x0 0x3000
+		       0x0 0xff100000 0x0 0x1000
+		       0x0 0xff440000 0x0 0x1000
+		       0x0 0xff720000 0x0 0x1000
+		       0x0 0xff798000 0x0 0x1000>;
 	};
 
 	cru: clock-controller@ff440000 {

commit 7c2f4ca09fd3102cb87d3abd8e00c5b3b23f7504
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 10:54:32 2017 +0800

    rockchip: tool: update rk3328 spl_boot0
    
    rk3328 is a 64bit SoC, do have spl_boot0.
    
    Change-Id: I26a472213f7f9a66a2fc6167d7ff4986de5e3a33
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1a24e16589..9fae9bc2c6 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -77,7 +77,7 @@ static struct spl_info spl_infos[] = {
 	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
 	{ "rk3288", "RK32", 0x8000, false, false },
-	{ "rk3328", "RK32", 0x8000 - 0x1000, false, false },
+	{ "rk3328", "RK32", 0x8000 - 0x1000, false, true },
 	{ "rk3368", "RK33", 0x8000 - 0x1000, false, true },
 	{ "rk3399", "RK33", 0x30000 - 0x2000, false, true },
 	{ "rv1108", "RK11", 0x1800, false, false},

commit 62f9d1a3c8186064624cf05cc7e32a3c1aa35558
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 2 15:07:58 2017 +0800

    rockchip: remove SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR from defconfig
    
    Use default value 0x4000 for SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR instead
    of define a new one.
    
    Change-Id: Icfaf22554f3dd3581b1ad92dc0529b9ff6c352d1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index a91ad2fc22..ffe7ee27e9 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -23,7 +23,6 @@ CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
 CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 05b269956c..b39c38f399 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -13,7 +13,6 @@ CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 3c8b32e283..da9741c292 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -13,7 +13,6 @@ CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y

commit 29daf81101ccd164e3bce1ed7b8eefff621f2d2c
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 2 15:06:16 2017 +0800

    rockchip: doc: update U-Boot location info
    
    Update rockchip U-Boot location to 0x4000/16384.
    
    Change-Id: I0801911a7baca9a7d374c0e1b5b1dddb194fb622
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 12fec38139..07cc727e98 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -99,13 +99,13 @@ To write an image that boots from an SD card (assumed to be /dev/sdc):
    ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
 	firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
    sudo dd if=out of=/dev/sdc seek=64 && \
-   sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
+   sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
 
 This puts the Rockchip header and SPL image first and then places the U-Boot
-image at block 256 (i.e. 128KB from the start of the SD card). This
+image at block 16384 (i.e. 4MB from the start of the SD card). This
 corresponds with this setting in U-Boot:
 
-   #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	256
+   #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x4000
 
 Put this SD (or micro-SD) card into your board and reset it. You should see
 something like:

commit b24d32f4784cd731ef64509edcece2911b07873b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Nov 2 14:55:23 2017 +0800

    spl: set SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to 0x4000 for rockchip
    
    Rockchip use a 'loader2' partition for U-Boot, so u-boot.bin or
    u-boot.itb load by SPL need to locate at0x4000. Detail here:
    http://opensource.rock-chips.com/wiki_Boot_option
    
    Change-Id: I3375346d04538cef1ce797bd2da5480c9ed50674
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 6174084d84..2115b58b35 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -141,11 +141,12 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
 	default 0x50 if ARCH_SUNXI
 	default 0x75 if ARCH_DAVINCI
 	default 0x8a if ARCH_MX6
-	default 0x100 if ARCH_ROCKCHIP || ARCH_UNIPHIER
+	default 0x100 if ARCH_UNIPHIER
 	default 0x140 if ARCH_MVEBU
 	default 0x200 if ARCH_SOCFPGA || ARCH_AT91
 	default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \
 		         OMAP54XX || AM33XX || AM43XX
+	default 0x4000 if ARCH_ROCKCHIP
 	help
 	  Address on the MMC to load U-Boot from, when the MMC is being used
 	  in raw mode. Units: MMC sectors (1 sector = 512 bytes).

commit 32040464ebe7253def76300f030e02ca9b9ff71b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 16:25:16 2017 +0800

    rockchip: config: update partition table
    
    User do not need to access the reserved part in system, remove them
    from partition table.
    Rename atf to trust as generic name for armv7 do not use ATF.
    
    Change-Id: Iadf98fca8ec8887e4bca8f5feef9cf0071b1813f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index bcb1a91b8e..a6a6096341 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -37,10 +37,8 @@
 #define PARTS_DEFAULT \
 	"uuid_disk=${uuid_gpt_disk};" \
 	"name=loader1,start=32K,size=4000K,uuid=${uuid_gpt_loader1};" \
-	"name=reserved1,size=64K,uuid=${uuid_gpt_reserved1};" \
-	"name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \
-	"name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \
-	"name=atf,size=4M,uuid=${uuid_gpt_atf};" \
+	"name=loader2,start=8MB,size=4MB,uuid=${uuid_gpt_loader2};" \
+	"name=trust,size=4M,uuid=${uuid_gpt_atf};" \
 	"name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
 	"name=rootfs,size=-,uuid="ROOT_UUID
 

commit c95e05fb816cbf867bc2052239bff4b7e56b9faa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Nov 3 16:07:02 2017 +0800

    rockchip: rock: remove CONFIG_ENV_OFFSEt
    
    We use the same default ENV setting in rockchip_common.h for all SoC.
    
    Change-Id: Icd3e9a56c42254bc727cb683cb0736fe7c7997b0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rock.h b/include/configs/rock.h
index 8d845d95e3..468dfdbff9 100644
--- a/include/configs/rock.h
+++ b/include/configs/rock.h
@@ -12,18 +12,4 @@
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
-
 #endif

commit cc14d0843e62574bdfe03dccd691d705cfbafbaf
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Thu Nov 2 15:18:51 2017 +0800

    rockchip: configs: enable DM_RESET config by default
    
    Change-Id: Iff8e5ff45a1acc6255ca1ca41892c837891a9ac0
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 4323b77768..a93dae0928 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -19,6 +19,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3368=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xFF1c0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 5a53951314..5f45c87b20 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -37,6 +37,7 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3036=y
+CONFIG_DM_RESET=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 950308875a..e8d78868d3 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM_CHARGE_DISPLAY=y
 CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 6c83f68f0d..7c2a607e90 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -33,6 +33,7 @@ CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index caa806ba77..a91ad2fc22 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -64,6 +64,7 @@ CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 5294ba9f5f..04f6a064e3 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -59,6 +59,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 01a503de66..8b8a835d33 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -38,6 +38,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 1c337fdc15..05b269956c 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -61,6 +61,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 3df3d97664..1713cc6468 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -37,6 +37,7 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RV1108=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 96a07defce..d9c4d30e05 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -60,6 +60,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 82da6016e6..40d7393859 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -64,6 +64,7 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index e193ccbe0d..3c8b32e283 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -63,6 +63,7 @@ CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 3d555d7522498fbf1c92c370b7fa22ca076194e2
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 10 15:23:57 2017 +0800

    rockchip: clk: add device_bind_driver_to_node for reset driver
    
    all rockchip socs add device_bind_driver_to_node,
    to bound device rockchip reset to clock-controller.
    
    Change-Id: I03c2a798d211fb4181d5fc0fd6db8609c6db04d2
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 7deea147fd..783f6f29a1 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -45,6 +45,12 @@ struct sysreset_reg {
 	unsigned int glb_srst_snd_value;
 };
 
+struct softreset_reg {
+	void __iomem *base;
+	unsigned int sf_reset_offset;
+	unsigned int sf_reset_num;
+};
+
 /**
  * clk_get_divisor() - Calculate the required clock divisior
  *
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 280ebb9ba2..32b250f97c 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -330,8 +330,9 @@ static int rk3036_clk_probe(struct udevice *dev)
 static int rk3036_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -347,6 +348,18 @@ static int rk3036_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3036_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index dcff3c3264..038c34a1da 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -556,8 +556,9 @@ static int rk3128_clk_probe(struct udevice *dev)
 static int rk3128_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -573,6 +574,18 @@ static int rk3128_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3128_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index bafda1a3c1..ad00d6e0e1 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -603,8 +603,9 @@ static int rk3188_clk_probe(struct udevice *dev)
 static int rk3188_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -620,6 +621,18 @@ static int rk3188_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3188_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index e59272dffc..ce7d62a0e4 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -413,8 +413,9 @@ static int rk322x_clk_probe(struct udevice *dev)
 static int rk322x_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -430,6 +431,18 @@ static int rk322x_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk322x_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 9;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 92a45e6078..431ff89e21 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -983,8 +983,9 @@ static int rk3288_clk_probe(struct udevice *dev)
 static int rk3288_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -1000,6 +1001,18 @@ static int rk3288_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3288_cru,
+						    cru_softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 4d522a7816..1388b44d98 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -597,8 +597,9 @@ static int rk3328_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3328_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -614,6 +615,18 @@ static int rk3328_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3328_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 12;
+		sf_child->priv = sf_priv;
+	}
+
 	return ret;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1fce2e7ee4..4a37bc9556 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -526,8 +526,9 @@ static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3368_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -543,6 +544,18 @@ static int rk3368_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3368_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 15;
+		sf_child->priv = sf_priv;
+	}
+
 	return ret;
 }
 
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index d4109d278f..231c94fe70 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1018,8 +1018,9 @@ static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3399_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -1035,6 +1036,18 @@ static int rk3399_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rk3399_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 21;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 
@@ -1210,6 +1223,26 @@ static int rk3399_pmuclk_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static int rk3399_pmuclk_bind(struct udevice *dev)
+{
+	int ret = 0;
+	struct udevice *sf_child;
+	struct softreset_reg *sf_priv = malloc(sizeof(struct softreset_reg));
+
+	ret = device_bind_driver_to_node(dev, "rockchip_reset",
+					 "reset", dev_ofnode(dev),
+					 &sf_child);
+	if (ret)
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+
+	sf_priv->sf_reset_offset = offsetof(struct rk3399_pmucru,
+					    pmucru_softrst_con[0]);
+	sf_priv->sf_reset_num = 2;
+	sf_child->priv = sf_priv;
+
+	return ret;
+}
+
 static const struct udevice_id rk3399_pmuclk_ids[] = {
 	{ .compatible = "rockchip,rk3399-pmucru" },
 	{ }
@@ -1223,6 +1256,7 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
 	.ofdata_to_platdata = rk3399_pmuclk_ofdata_to_platdata,
 	.ops		= &rk3399_pmuclk_ops,
 	.probe		= rk3399_pmuclk_probe,
+	.bind		= rk3399_pmuclk_bind,
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	.platdata_auto_alloc_size = sizeof(struct rk3399_pmuclk_plat),
 #endif
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index a1195486a9..a6c5c47ad8 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -223,8 +223,9 @@ static int rv1108_clk_probe(struct udevice *dev)
 static int rv1108_clk_bind(struct udevice *dev)
 {
 	int ret;
-	struct udevice *sys_child;
+	struct udevice *sys_child, *sf_child;
 	struct sysreset_reg *priv;
+	struct softreset_reg *sf_priv;
 
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
@@ -240,6 +241,18 @@ static int rv1108_clk_bind(struct udevice *dev)
 		sys_child->priv = priv;
 	}
 
+	ret = device_bind_driver_to_node(dev, "rockchip_reset", "reset",
+					 dev_ofnode(dev), &sf_child);
+	if (ret) {
+		debug("Warning: No rockchip reset driver: ret=%d\n", ret);
+	} else {
+		sf_priv = malloc(sizeof(struct softreset_reg));
+		sf_priv->sf_reset_offset = offsetof(struct rv1108_cru,
+						    softrst_con[0]);
+		sf_priv->sf_reset_num = 13;
+		sf_child->priv = sf_priv;
+	}
+
 	return 0;
 }
 

commit 5754b8c90d015fc03621bb60be9865b4dc276bc4
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Tue Oct 10 15:04:07 2017 +0800

    drivers/reset: support rockchip reset drivers
    
    Create driver to support all Rockchip SoCs soft reset.
    Example of usage:
    i2c driver:
            ret = reset_get_by_name(dev, "i2c", &reset_ctl);
            if (ret) {
                    error("reset_get_by_name() failed: %d\n", ret);
            }
    
            reset_assert(&reset_ctl);
            udelay(50);
            reset_deassert(&reset_ctl);
    
    i2c dts node:
    resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
    reset-names = "p_i2c", "i2c";
    
    Change-Id: I7db97619e33447d6130e349e90799cd398e29d72
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index e6af7da8fe..1121166bbf 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -67,4 +67,12 @@ config AST2500_RESET
 	  resets that are supported by watchdog. The main limitation though
 	  is that some reset signals, like I2C or MISC reset multiple devices.
 
+config RESET_ROCKCHIP
+	bool "Reset controller driver for Rockchip SoCs"
+	depends on DM_RESET && CLK
+	default y
+	help
+	  Support for reset controller on rockchip SoC. The main limitation though
+	  is that some reset signals, like I2C or MISC reset multiple devices.
+
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index d5e06c2241..40caba5d8f 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
 obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
+obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c
new file mode 100644
index 0000000000..322ac27762
--- /dev/null
+++ b/drivers/reset/reset-rockchip.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <reset-uclass.h>
+#include <linux/io.h>
+
+struct rockchip_reset_priv {
+	void __iomem *base;
+	unsigned int sf_reset_offset;
+	unsigned int sf_reset_num;
+};
+
+static int rockchip_reset_request(struct reset_ctl *reset_ctl)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (sf_reset_num=%d)\n", __func__,
+	      reset_ctl, reset_ctl->dev, reset_ctl->id, priv->sf_reset_num);
+
+	if (reset_ctl->id / 16 >= priv->sf_reset_num)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int rockchip_reset_free(struct reset_ctl *reset_ctl)
+{
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
+	      reset_ctl->dev, reset_ctl->id);
+
+	return 0;
+}
+
+static int rockchip_reset_assert(struct reset_ctl *reset_ctl)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+	int bank =  reset_ctl->id / 16;
+	int offset =  reset_ctl->id % 16;
+
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
+	      reset_ctl, reset_ctl->dev, reset_ctl->id,
+	      priv->base + (bank * 4));
+
+	writel(BIT(offset) | (BIT(offset) << 16), priv->base + (bank * 4));
+
+	return 0;
+}
+
+static int rockchip_reset_deassert(struct reset_ctl *reset_ctl)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+	int bank =  reset_ctl->id / 16;
+	int offset =  reset_ctl->id % 16;
+
+	debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
+	      reset_ctl, reset_ctl->dev, reset_ctl->id,
+	      priv->base + (bank * 4));
+
+	writel((BIT(offset) << 16), priv->base + (bank * 4));
+
+	return 0;
+}
+
+struct reset_ops rockchip_reset_ops = {
+	.request = rockchip_reset_request,
+	.free = rockchip_reset_free,
+	.rst_assert = rockchip_reset_assert,
+	.rst_deassert = rockchip_reset_deassert,
+};
+
+static int rockchip_reset_probe(struct udevice *dev)
+{
+	struct rockchip_reset_priv *priv = dev_get_priv(dev);
+	fdt_addr_t addr;
+	fdt_size_t size;
+
+	addr = devfdt_get_addr_size_index(dev, 0, &size);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	if ((priv->sf_reset_offset == 0) && (priv->sf_reset_num == 0))
+		return -EINVAL;
+
+	addr += priv->sf_reset_offset;
+	priv->base = ioremap(addr, size);
+
+	debug("%s(base=%p) (sf_reset_offset=%x, sf_reset_num=%d)\n", __func__,
+	      priv->base, priv->sf_reset_offset, priv->sf_reset_num);
+
+	return 0;
+}
+
+U_BOOT_DRIVER(rockchip_reset) = {
+	.name = "rockchip_reset",
+	.id = UCLASS_RESET,
+	.probe = rockchip_reset_probe,
+	.ops = &rockchip_reset_ops,
+	.priv_auto_alloc_size = sizeof(struct rockchip_reset_priv),
+};

commit 39507926d56515114fb92329210898931b750a09
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Oct 27 09:45:54 2017 +0800

    rockchip: sysreset: use fst reset for ARM64 SOC
    
    Rockchip ARM64 SOC will change cpu entry, only fst reset can reset it.
    
    Change-Id: I9172dae79ced3128f6a11fb0f4029685c6662dfd
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
index 894975f3fe..be00fefb3a 100644
--- a/drivers/sysreset/sysreset_rockchip.c
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -24,7 +24,12 @@ int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
 
 	switch (type) {
 	case SYSRESET_WARM:
+#ifdef CONFIG_ARM64
+		/* Rockchip 64bit SOC need fst reset for cpu reset entry */
+		writel(0xfdb9, cru_base + offset->glb_srst_fst_value);
+#else
 		writel(0xeca8, cru_base + offset->glb_srst_snd_value);
+#endif
 		break;
 	case SYSRESET_COLD:
 		writel(0xfdb9, cru_base + offset->glb_srst_fst_value);

commit 4f7772c4580b22bbd1702dc0dfeb990ea9c3a794
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 15:51:42 2017 +0800

    rockchip: sysreset: do not enable driver in TPL
    
    Sysreset do not help much in TPL, let's disable it to save code
    space.
    
    Change-Id: I51714e00284315767d874ecb85e56cb2c5ee2fe8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 50a0de9c92..3b100df3b9 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -14,4 +14,6 @@ obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
+endif

commit fbdd155836a4e674ef6c9e123d0e39400d5ee4df
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 25 16:04:19 2017 +0800

    rockchip: clock: update sysreset driver bingding
    
    Using priv for new sysreset driver binding.
    
    Change-Id: I7ecc0a922086272651a6c7923afd2186c1cfeb7a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 83f4ae6ca3..280ebb9ba2 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -330,11 +330,22 @@ static int rk3036_clk_probe(struct udevice *dev)
 static int rk3036_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3036_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK3036 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3036_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3036_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index f4c6ebc70e..dcff3c3264 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -556,11 +556,22 @@ static int rk3128_clk_probe(struct udevice *dev)
 static int rk3128_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3128_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK3128 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 7bf308dd42..bafda1a3c1 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -603,11 +603,22 @@ static int rk3188_clk_probe(struct udevice *dev)
 static int rk3188_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3188_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No rk3188 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3188_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3188_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 354883ae9d..e59272dffc 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -413,11 +413,22 @@ static int rk322x_clk_probe(struct udevice *dev)
 static int rk322x_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk322x_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK322x reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk322x_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk322x_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 204a54787e..92a45e6078 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -983,11 +983,22 @@ static int rk3288_clk_probe(struct udevice *dev)
 static int rk3288_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3288_sysreset", "reset", &dev);
-	if (ret)
-		debug("Warning: No RK3288 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3288_cru,
+						    cru_glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3288_cru,
+						    cru_glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 540d9104c3..4d522a7816 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -597,11 +597,22 @@ static int rk3328_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3328_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3328_sysreset", "reset", &dev);
-	if (ret)
-		printf("Warning: No RK3328 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3328_cru,
+						    glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3328_cru,
+						    glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return ret;
 }
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index cd3ab248fb..1fce2e7ee4 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -526,11 +526,22 @@ static int rk3368_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3368_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3368_sysreset", "reset", &dev);
-	if (ret)
-		error("bind RK3368 reset driver failed: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3368_cru,
+						    glb_srst_fst_val);
+		priv->glb_srst_snd_value = offsetof(struct rk3368_cru,
+						    glb_srst_snd_val);
+		sys_child->priv = priv;
+	}
 
 	return ret;
 }
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index b31446e276..d4109d278f 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1018,11 +1018,22 @@ static int rk3399_clk_ofdata_to_platdata(struct udevice *dev)
 static int rk3399_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rk3399_sysreset", "reset", &dev);
-	if (ret)
-		printf("Warning: No RK3399 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rk3399_cru,
+						    glb_srst_fst_value);
+		priv->glb_srst_snd_value = offsetof(struct rk3399_cru,
+						    glb_srst_snd_value);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index 86e73e414c..a1195486a9 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -223,11 +223,22 @@ static int rv1108_clk_probe(struct udevice *dev)
 static int rv1108_clk_bind(struct udevice *dev)
 {
 	int ret;
+	struct udevice *sys_child;
+	struct sysreset_reg *priv;
 
 	/* The reset driver does not have a device node, so bind it here */
-	ret = device_bind_driver(gd->dm_root, "rv1108_sysreset", "reset", &dev);
-	if (ret)
-		error("No Rv1108 reset driver: ret=%d\n", ret);
+	ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
+				 &sys_child);
+	if (ret) {
+		debug("Warning: No sysreset driver: ret=%d\n", ret);
+	} else {
+		priv = malloc(sizeof(struct sysreset_reg));
+		priv->glb_srst_fst_value = offsetof(struct rv1108_cru,
+						    glb_srst_fst_val);
+		priv->glb_srst_snd_value = offsetof(struct rv1108_cru,
+						    glb_srst_snd_val);
+		sys_child->priv = priv;
+	}
 
 	return 0;
 }

commit 116397d63e76e60b087053cc821c23fdd8774517
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 25 15:50:22 2017 +0800

    rockchip: sysreset: merge into one common driver
    
    Use a common driver for all Rockchip SOC instead of one for each SoC.
    Use driver_data for reg offset.
    
    Change-Id: Ie4a246e53052db47aab9cb3b0105d44a484db484
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index c6256c0dd8..7deea147fd 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -40,6 +40,11 @@ static inline int rk_pll_id(enum rk_clk_id clk_id)
 	return clk_id - 1;
 }
 
+struct sysreset_reg {
+	unsigned int glb_srst_fst_value;
+	unsigned int glb_srst_snd_value;
+};
+
 /**
  * clk_get_divisor() - Calculate the required clock divisior
  *
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index e3a0ab1718..50a0de9c92 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -9,19 +9,9 @@ obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 
-ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
-endif
-obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o
-obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
-obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
-obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
-obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
-obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o
-obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
-obj-$(CONFIG_ROCKCHIP_RV1108) += sysreset_rv1108.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
 obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
+obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
diff --git a/drivers/sysreset/sysreset_rk3036.c b/drivers/sysreset/sysreset_rk3036.c
deleted file mode 100644
index b3d2113239..0000000000
--- a/drivers/sysreset/sysreset_rk3036.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3036.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3036_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3036_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3036_sysreset = {
-	.request	= rk3036_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3036) = {
-	.name	= "rk3036_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3036_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c
deleted file mode 100644
index 5aab8ec50b..0000000000
--- a/drivers/sysreset/sysreset_rk3128.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3128.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3128_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3128_sysreset = {
-	.request	= rk3128_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3128) = {
-	.name	= "rk3128_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3128_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3188.c b/drivers/sysreset/sysreset_rk3188.c
deleted file mode 100644
index 053a6344f5..0000000000
--- a/drivers/sysreset/sysreset_rk3188.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <syscon.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3188.h>
-#include <asm/arch/grf_rk3188.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3188_cru *cru = rockchip_get_cru();
-	struct rk3188_grf *grf;
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-		if (IS_ERR(grf))
-			return -EPROTONOSUPPORT;
-
-		/*
-		 * warm-reset keeps the remap value,
-		 * so make sure it's disabled.
-		 */
-		rk_clrsetreg(&grf->soc_con0,
-			NOC_REMAP_MASK << NOC_REMAP_SHIFT,
-			0 << NOC_REMAP_SHIFT);
-
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3188_sysreset = {
-	.request	= rk3188_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3188) = {
-	.name	= "rk3188_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3188_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk322x.c b/drivers/sysreset/sysreset_rk322x.c
deleted file mode 100644
index 5fce79b685..0000000000
--- a/drivers/sysreset/sysreset_rk322x.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk322x_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk322x_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk322x_sysreset = {
-	.request	= rk322x_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk322x) = {
-	.name	= "rk322x_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk322x_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3288.c b/drivers/sysreset/sysreset_rk3288.c
deleted file mode 100644
index 0aad1c2160..0000000000
--- a/drivers/sysreset/sysreset_rk3288.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3288.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3288_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3288_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xeca8, &cru->cru_glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		rk_clrreg(&cru->cru_mode_con, 0xffff);
-		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3288_sysreset = {
-	.request	= rk3288_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3288) = {
-	.name	= "rk3288_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3288_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3328.c b/drivers/sysreset/sysreset_rk3328.c
deleted file mode 100644
index 7b9af0925b..0000000000
--- a/drivers/sysreset/sysreset_rk3328.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3328.h>
-#include <asm/arch/hardware.h>
-#include <asm/io.h>
-#include <linux/err.h>
-
-int rk3328_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3328_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3328_sysreset = {
-	.request	= rk3328_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3328) = {
-	.name	= "rk3328_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3328_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3368.c b/drivers/sysreset/sysreset_rk3368.c
deleted file mode 100644
index de62921b78..0000000000
--- a/drivers/sysreset/sysreset_rk3368.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * (C) Copyright Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-static void rk3368_pll_enter_slow_mode(struct rk3368_cru *cru)
-{
-	struct rk3368_pll *pll;
-	int i;
-
-	for (i = 0; i < 6; i++) {
-		pll = &cru->pll[i];
-		rk_clrreg(&pll->con3, PLL_MODE_MASK);
-	}
-}
-
-static int rk3368_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3368_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		rk3368_pll_enter_slow_mode(cru);
-		rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
-			     PMU_RST_BY_SND_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
-		writel(0xeca8, &cru->glb_srst_snd_val);
-		break;
-	case SYSRESET_COLD:
-		rk3368_pll_enter_slow_mode(cru);
-		rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
-			     PMU_RST_BY_FST_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
-		writel(0xfdb9, &cru->glb_srst_fst_val);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3368_sysreset = {
-	.request	= rk3368_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3368) = {
-	.name	= "rk3368_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3368_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rk3399.c b/drivers/sysreset/sysreset_rk3399.c
deleted file mode 100644
index 9a555464c6..0000000000
--- a/drivers/sysreset/sysreset_rk3399.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:	GPL-2.0
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rk3399.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rk3399_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rk3399_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->glb_srst_snd_value);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->glb_srst_fst_value);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rk3399_sysreset = {
-	.request	= rk3399_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rk3399) = {
-	.name	= "rk3399_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rk3399_sysreset,
-};
diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
new file mode 100644
index 0000000000..894975f3fe
--- /dev/null
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3328.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rockchip_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct sysreset_reg *offset = dev_get_priv(dev);
+	unsigned long cru_base = (unsigned long)rockchip_get_cru();
+
+	if (IS_ERR_VALUE(cru_base))
+		return (int)cru_base;
+
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, cru_base + offset->glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, cru_base + offset->glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rockchip_sysreset = {
+	.request	= rockchip_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rockchip) = {
+	.name	= "rockchip_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rockchip_sysreset,
+};
diff --git a/drivers/sysreset/sysreset_rv1108.c b/drivers/sysreset/sysreset_rv1108.c
deleted file mode 100644
index 9d8e9f7ade..0000000000
--- a/drivers/sysreset/sysreset_rv1108.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * (C) Copyright 2015 Rockchip Electronics Co., Ltd
- * Author: Andy Yan <andy.yan@rock-chips.com>
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <sysreset.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cru_rv1108.h>
-#include <asm/arch/hardware.h>
-#include <linux/err.h>
-
-int rv1108_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
-	struct rv1108_cru *cru = rockchip_get_cru();
-
-	if (IS_ERR(cru))
-		return PTR_ERR(cru);
-
-	switch (type) {
-	case SYSRESET_WARM:
-		writel(0xeca8, &cru->glb_srst_snd_val);
-		break;
-	case SYSRESET_COLD:
-		writel(0xfdb9, &cru->glb_srst_fst_val);
-		break;
-	default:
-		return -EPROTONOSUPPORT;
-	}
-
-	return -EINPROGRESS;
-}
-
-static struct sysreset_ops rv1108_sysreset = {
-	.request	= rv1108_sysreset_request,
-};
-
-U_BOOT_DRIVER(sysreset_rv1108) = {
-	.name	= "rv1108_sysreset",
-	.id	= UCLASS_SYSRESET,
-	.ops	= &rv1108_sysreset,
-};

commit 6a43f0b024d2ae72f4554cf7d0f9a06bd6eb5b2d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 15:16:53 2017 +0800

    configs: evb-rk3126: enable CONFIG_CMD_CHARGE_DISPLAY
    
    Change-Id: I1bab5ca35b41428530881005cb12c0eddccb54a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 20fe8e98ea..950308875a 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -23,6 +23,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_CHARGE_DISPLAY=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y

commit c0b38c6cdf99398b3a7a178a5409c2d45e1b1ea5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 18:03:56 2017 +0800

    cmd: add 'charge' cmd support
    
    It calls charge display.
    
    Change-Id: Iced07ec388b48f6849516cc67715b6a50860bc9c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 7b16720d88..87b56e2c92 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1219,6 +1219,11 @@ config CMD_REGULATOR
 	  the limits, which are found in device-tree and are kept in regulator's
 	  uclass platdata structure.
 
+config CMD_CHARGE_DISPLAY
+	bool "Enable Driver Model Charge Display command"
+	help
+	  Support U-Boot charge display.
+
 endmenu
 
 menu "Security commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index c91a8e8b34..868113eab2 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CMD_CLK) += clk.o
 obj-$(CONFIG_CMD_CONFIG) += config.o
 obj-$(CONFIG_CMD_CONSOLE) += console.o
 obj-$(CONFIG_CMD_CPU) += cpu.o
+obj-$(CONFIG_CMD_CHARGE_DISPLAY) += charge.o
 obj-$(CONFIG_DATAFLASH_MMC_SELECT) += dataflash_mmc_mux.o
 obj-$(CONFIG_CMD_DATE) += date.o
 obj-$(CONFIG_CMD_DEMO) += demo.o
diff --git a/cmd/charge.c b/cmd/charge.c
new file mode 100644
index 0000000000..805fdb30f7
--- /dev/null
+++ b/cmd/charge.c
@@ -0,0 +1,38 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <power/charge_display.h>
+
+static int charge_display(cmd_tbl_t *cmdtp, int flag, int argc,
+			  char *const argv[])
+{
+	int ret;
+	struct udevice *dev;
+
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			return ret;
+		}
+
+		return 0;
+	}
+
+	return charge_display_show(dev);
+}
+
+U_BOOT_CMD(
+	charge, 1, 0, charge_display,
+	"Charge display",
+	""
+);

commit 37cb087dbc758e57a0750a6a68e9dea099b1f29e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Nov 2 09:47:17 2017 +0800

    rockchip: rk3128: select BOARD_LATE_INIT
    
    Change-Id: I3d695600bb72bad27d64a8b30411e223a7034747
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig
index a6e8722daf..40655a22b5 100644
--- a/arch/arm/mach-rockchip/rk3128/Kconfig
+++ b/arch/arm/mach-rockchip/rk3128/Kconfig
@@ -5,6 +5,7 @@ choice
 
 config TARGET_EVB_RK3128
 	bool "RK3128 evaluation board"
+	select BOARD_LATE_INIT
 	help
 	  RK3128evb is a evaluation board for Rockchip rk3128,
 	  with full function and phisical connectors support like

commit cffae0b6f6a4adf7194b5197cbac988a78cec9b6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 1 11:53:13 2017 +0800

    rk3128: add charge display and logo show in board late init
    
    Change-Id: I1a377f7e62465715b84386ebfd3be3abbc2f769f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index fbd026aee4..55ea7f1836 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -14,7 +14,9 @@
 #include <asm/arch/grf_rk3128.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/timer.h>
+#include <power/charge_display.h>
 #include <power/regulator.h>
+#include <video_rockchip.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -46,6 +48,25 @@ static void setup_boot_mode(void)
 	}
 }
 
+#ifdef CONFIG_CHARGE_DISPLAY
+static int charge_display(void)
+{
+	int ret;
+	struct udevice *dev;
+
+	ret = uclass_get_device(UCLASS_CHARGE_DISPLAY, 0, &dev);
+	if (ret) {
+		if (ret != -ENODEV) {
+			printf("Get UCLASS CHARGE DISPLAY failed: %d\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	return charge_display_show(dev);
+}
+#endif
+
 __weak int rk_board_late_init(void)
 {
 	return 0;
@@ -55,6 +76,14 @@ int board_late_init(void)
 {
 	setup_boot_mode();
 
+#ifdef CONFIG_CHARGE_DISPLAY
+	charge_display();
+#endif
+
+#ifdef CONFIG_DRM_ROCKCHIP
+	rockchip_show_logo();
+#endif
+
 	return rk_board_late_init();
 }
 

commit 1bbb461d5b3c25c0860ea93247591ba2789bcf79
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 16:14:00 2017 +0800

    dm: add note for UCLASS_FG and UCLASS_KEY id
    
    Change-Id: I977f39d3f8e3c58be6f2b9e90128fb476f431af0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 255fdbd285..e74fcdd38a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -91,8 +91,8 @@ enum uclass_id {
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
 	UCLASS_VIDEO_CRTC,	/* Display Controller */
 	UCLASS_WDT,		/* Watchdot Timer driver */
-	UCLASS_FG,
-	UCLASS_KEY,
+	UCLASS_FG,		/* Fuel gauge */
+	UCLASS_KEY,		/* Key */
 	UCLASS_RC,		/* Remote Controller */
 	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 

commit e40c3d7feedc814f7c02543ffe10653c5bc1d8a7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 14:55:31 2017 +0800

    configs: evb-rk3126: enable charge animation
    
    Change-Id: I2ff56fd22fe6dcd05012882496ce09155cb7ad19
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index bb2c7bcbb7..20fe8e98ea 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -41,6 +41,8 @@ CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_CHARGE_DISPLAY=y
+CONFIG_CHARGE_ANIMATION=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0x20068000

commit 1cada0aa9bb05a3d50eb62e18a8d000a81ae03d5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 15:30:03 2017 +0800

    ARM: dts: rk3126-evb: add charge animation node
    
    Change-Id: I16dfffb0c41d1ba20a31778918522bf8078616ea
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 5c3eb378e9..ab96432cbc 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -148,6 +148,14 @@
 			press-threshold-microvolt = <1650000>;
 		};
 	};
+
+	charge-animation {
+		compatible = "charge-animation";
+		screen-on-voltage-threshold = <3350>;
+		power-on-voltage-threshold = <3450>;
+		power-on-soc-threshold = <0>;
+		status = "okay";
+	};
 };
 
 &i2c1 {

commit f1c8eccefa013f79019efacc657ed34b39d3f581
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 11:55:56 2017 +0800

    power: add charge animation support
    
    Change-Id: I3a8c3f90e4e743b06c7cd0613ac6b5863238c6a4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index f0b6b40d3f..d6fe1af5b3 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -75,6 +75,12 @@ config SY8106A_POWER
 
 endchoice
 
+config CHARGE_ANIMATION
+	bool "Enable charge animation"
+	depends on DM_CHARGE_DISPLAY && DM_FUEL_GAUGE
+	help
+	  This adds a simple function for charge animation display.
+
 config AXP_DCDC1_VOLT
 	int "axp pmic dcdc1 voltage"
 	depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 0e957eb201..a80457bc37 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_AXP209_POWER)	+= axp209.o
 obj-$(CONFIG_AXP221_POWER)	+= axp221.o
 obj-$(CONFIG_AXP809_POWER)	+= axp809.o
 obj-$(CONFIG_AXP818_POWER)	+= axp818.o
+obj-$(CONFIG_CHARGE_ANIMATION)	+= charge_animation.o
 obj-$(CONFIG_EXYNOS_TMU)	+= exynos-tmu.o
 obj-$(CONFIG_FTPMU010_POWER)	+= ftpmu010.o
 obj-$(CONFIG_SY8106A_POWER)	+= sy8106a.o
diff --git a/drivers/power/charge_animation.c b/drivers/power/charge_animation.c
new file mode 100644
index 0000000000..c68a04aa92
--- /dev/null
+++ b/drivers/power/charge_animation.c
@@ -0,0 +1,501 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <key.h>
+#include <linux/input.h>
+#include <pwm.h>
+#include <power/charge_display.h>
+#include <power/fuel_gauge.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+#include <power/regulator.h>
+#include <video_rockchip.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define LONG_PRESSED_TIME			2000 /* 2s */
+#define IMAGE_SHOW_RESET			-1
+
+enum key_event {
+	KEY_NOT_PRESSED = 0,
+	KEY_SHORT_PRESSED,
+	KEY_LONG_PRESSED,
+};
+
+struct charge_image {
+	const char *name;
+	int soc;
+	int period;	/* ms */
+};
+
+struct charge_animation_priv {
+	struct udevice *pmic;
+	struct udevice *fg;
+	struct udevice *pwrkey;
+	const struct charge_image *image;
+	int image_num;
+};
+
+struct charge_animation_pdata {
+	int screen_on_voltage_threshold;
+	int power_on_voltage_threshold;
+	int power_on_soc_threshold;
+	bool suspend_to_sram;
+	bool auto_start_kernel;
+};
+
+static int charge_animation_threshold_soc(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	return pdata->power_on_soc_threshold;
+}
+
+static int charge_animation_threshold_voltage(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (!pdata)
+		return -ENOSYS;
+
+	return pdata->power_on_voltage_threshold;
+}
+
+/*
+ * IF you want to use your own charge images, please:
+ *
+ * 1. Update the following 'image[]' to point to your own images;
+ * 2. You must set the failed image as last one and soc = -1 !!!
+ */
+static const struct charge_image image[] = {
+	{ .name = "battery_0.bmp", .soc = 5, .period = 600 },
+	{ .name = "battery_1.bmp", .soc = 20, .period = 600 },
+	{ .name = "battery_2.bmp", .soc = 40, .period = 600 },
+	{ .name = "battery_3.bmp", .soc = 60, .period = 600 },
+	{ .name = "battery_4.bmp", .soc = 80, .period = 600 },
+	{ .name = "battery_5.bmp", .soc = 100, .period = 600 },
+	{ .name = "battery_fail.bmp", .soc = -1, .period = 1000 },
+};
+
+static int charge_animation_ofdata_to_platdata(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+
+	if (dev_read_bool(dev, "charge,suspend-to-sram"))
+		pdata->suspend_to_sram = true;
+	else
+		pdata->suspend_to_sram = false;
+
+	if (dev_read_bool(dev, "charge,auto-start-kernel"))
+		pdata->auto_start_kernel = true;
+	else
+		pdata->auto_start_kernel = false;
+
+	pdata->power_on_soc_threshold =
+		dev_read_u32_default(dev, "power-on-soc-threshold", 0);
+	pdata->power_on_voltage_threshold =
+		dev_read_u32_default(dev, "power-on-voltage-threshold", 0);
+	pdata->screen_on_voltage_threshold =
+		dev_read_u32_default(dev, "screen-on-voltage-threshold", 0);
+
+	if (pdata->screen_on_voltage_threshold >
+	    pdata->power_on_voltage_threshold)
+		pdata->screen_on_voltage_threshold =
+					pdata->power_on_voltage_threshold;
+
+	debug("threshold soc=%d%%, voltage=%dmv, screen_on=%dmv, suspend=%d\n",
+	      pdata->power_on_soc_threshold, pdata->power_on_voltage_threshold,
+	      pdata->screen_on_voltage_threshold, pdata->suspend_to_sram);
+
+	return 0;
+}
+
+static int check_key_press(struct udevice *dev, bool restar_time)
+{
+	static unsigned long pressed_time;
+	static int old_state;
+	int report = KEY_NOT_PRESSED;
+	int state;
+
+	/* just for restart time */
+	if (restar_time) {
+		pressed_time = get_timer(0);
+		goto out;
+	}
+
+	state = key_read(dev);
+	if (state < 0) {
+		printf("read power key failed: %d\n", state);
+		goto out;
+	}
+
+	/* Start time is not initialized, let's do it */
+	if (!pressed_time && (state == KEY_PRESS_DOWN)) {
+		pressed_time = get_timer(0);
+		return KEY_NOT_PRESSED;
+	} else {
+		debug("key state = %d\n", state);
+
+		if (state == KEY_PRESS_DOWN) {
+			if (get_timer(pressed_time) >= LONG_PRESSED_TIME) {
+				report = KEY_LONG_PRESSED;
+				pressed_time = 0;
+				old_state = KEY_LONG_PRESSED;
+				printf("power key long pressed...\n");
+			}
+		/*
+		 * If you don't check 'old_state != KEY_LONG_PRESSED', it will
+		 * treat 'key long pressed' release as a 'short key pressed'
+		 * release.
+		 */
+		} else if ((state == KEY_PRESS_UP) &&
+			   (old_state != KEY_LONG_PRESSED)) {
+			report = KEY_SHORT_PRESSED;
+			old_state = report;
+			pressed_time = 0;
+			printf("power key short pressed...\n");
+		} else {
+			report = KEY_NOT_PRESSED;
+			old_state = report;
+			pressed_time = 0;
+			debug("power key Not pressed...\n");
+		}
+	}
+
+out:
+	return report;
+}
+
+static int charge_animation_show(struct udevice *dev)
+{
+	struct charge_animation_pdata *pdata = dev_get_platdata(dev);
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	const struct charge_image *image = priv->image;
+	struct udevice *pwrkey = priv->pwrkey;
+	struct udevice *pmic = priv->pmic;
+	struct udevice *fg = priv->fg;
+	int image_num = priv->image_num;
+	bool ever_lowpower_screen_off = false;
+	bool screen_on = true;
+	ulong show_start = 0, charge_start = 0, debug_start = 0;
+	ulong ms = 0, sec = 0;
+	int start_idx = 0, show_idx = -1;
+	int soc, voltage, key_state;
+	int i, charging = 1;
+
+	/* Not charger online, exit */
+	charging = fuel_gauge_get_chrg_online(fg);
+	if (charging <= 0)
+		return 0;
+
+	voltage = fuel_gauge_get_voltage(fg);
+	if (voltage < 0) {
+		printf("get voltage failed: %d\n", voltage);
+		return -EINVAL;
+	}
+
+	/* If low power, turn off screen */
+	if (voltage <= pdata->screen_on_voltage_threshold + 50) {
+		screen_on = false;
+		ever_lowpower_screen_off = true;
+		rockchip_show_bmp(NULL);
+	}
+
+	charge_start = get_timer(0);
+
+	/* Charging ! */
+	while (1) {
+		debug("step1 (%d)... \n", screen_on);
+
+		/* Step1: Is charging now ? */
+		charging = fuel_gauge_get_chrg_online(fg);
+		if (charging <= 0) {
+			printf("Not charging, online=%d. Shutdown...\n",
+			       charging);
+
+			/* wait uart flush before shutdown */
+			mdelay(500);
+
+			/* PMIC shutdown */
+			pmic_shutdown(pmic);
+
+			printf("Cpu should never reach here, shutdown failed !\n");
+			continue;
+		}
+
+		debug("step2 (%d)... show_idx=%d\n", screen_on, show_idx);
+
+		/* Step2: get soc and voltage */
+		soc = fuel_gauge_get_soc(fg);
+		if (soc < 0 || soc > 100) {
+			printf("get soc failed: %d\n", soc);
+			continue;
+		}
+
+		voltage = fuel_gauge_get_voltage(fg);
+		if (voltage < 0) {
+			printf("get voltage failed: %d\n", voltage);
+			continue;
+		}
+
+		/*
+		 * Just for debug, otherwise there will be nothing output which
+		 * is not good to know what happen.
+		 */
+		if (!debug_start)
+			debug_start = get_timer(0);
+		if (get_timer(debug_start) > 20000) {
+			debug_start = get_timer(0);
+			printf("soc=%d, vol=%d, online=%d, screen_on=%d, show_idx=%d, ever_off=%d\n",
+			       soc, voltage, charging, screen_on, show_idx,
+			       ever_lowpower_screen_off);
+		}
+
+		/*
+		 * If ever lowpower screen off, force screen on false, which
+		 * means key event can't modify screen_on, only voltage higher
+		 * then threshold can update screen_on=true;
+		 */
+		if (ever_lowpower_screen_off)
+			screen_on = false;
+
+		/*
+		 * Auto turn on screen when voltage higher than Vol screen on.
+		 * 'ever_lowpower_screen_off' means enter while loop with
+		 * screen off.
+		 */
+		if ((ever_lowpower_screen_off) &&
+		    (voltage > pdata->screen_on_voltage_threshold)) {
+			ever_lowpower_screen_off = false;
+			screen_on = true;
+			show_idx = IMAGE_SHOW_RESET;
+		}
+
+		/*
+		 * IMAGE_SHOW_RESET means show_idx show be update by start_idx.
+		 * When short key pressed event trigged, we will set show_idx
+		 * as IMAGE_SHOW_RESET which updates images index from start_idx
+		 * that calculate by current soc.
+		 */
+		if (show_idx == IMAGE_SHOW_RESET) {
+			for (i = 0; i < image_num - 2; i++) {
+				/* Find out which image we start to show */
+				if ((soc >= image[i].soc) &&
+				    (soc < image[i + 1].soc)) {
+					start_idx = i;
+					break;
+				}
+
+				if (soc >= 100) {
+					start_idx = image_num - 2;
+					break;
+				}
+			}
+
+			debug("%s: show_idx=%d, screen_on=%d\n",
+			      __func__, show_idx, screen_on);
+
+			/* Mark start index and start time */
+			show_idx = start_idx;
+			show_start = get_timer(0);
+		}
+
+		debug("step3 (%d)... show_idx=%d\n", screen_on, show_idx);
+
+		/* Step3: show images */
+		if (screen_on) {
+			debug("SHOW: %s\n", image[show_idx].name);
+			rockchip_show_bmp(image[show_idx].name);
+		} else {
+			/*
+			 * TODO: enter low power mode:
+			 *
+			 * 1. cut off some regualtors;
+			 * 2. set 24MHZ for some PLLs;
+			 * 3. auto turn off screen when timout;
+			 * 4. power key wakeup;
+			 * 5. timer period wakeup for pmic fg ?
+			 */
+		}
+
+		mdelay(5);
+
+		/* Every image shows period */
+		if (get_timer(show_start) > image[show_idx].period) {
+			show_start = get_timer(0);
+			/* Update to next image */
+			show_idx++;
+			if (show_idx > (image_num - 2))
+				show_idx = IMAGE_SHOW_RESET;
+		}
+
+		debug("step4 (%d)... \n", screen_on);
+
+		/*
+		 * Step4: check key event.
+		 *
+		 * Short key event: turn on/off screen;
+		 * Long key event: show logo and boot system or still charging.
+		 */
+		key_state = check_key_press(pwrkey, false);
+		if (key_state == KEY_SHORT_PRESSED) {
+			/* NULL means show nothing, ie. turn off screen */
+			if (screen_on)
+				rockchip_show_bmp(NULL);
+
+			/*
+			 * Clear current image index, and show image
+			 * from start_idx
+			 */
+			show_idx = IMAGE_SHOW_RESET;
+
+			/*
+			 * We turn off screen by rockchip_show_bmp(NULL), so we
+			 * should tell while loop to stop show images any more.
+			 *
+			 * If screen_on=false, means this short key pressed
+			 * event turn on the screen and we need show images.
+			 *
+			 * If screen_on=true, means this short key pressed
+			 * event turn off the screen and we never show images.
+			 */
+			if (screen_on)
+				screen_on = false;
+			else
+				screen_on = true;
+		} else if (key_state == KEY_LONG_PRESSED) {
+			/* Only long pressed while screen off needs screen_on true */
+			if (!screen_on)
+				screen_on = true;
+
+			/* Is able to boot now ? */
+			if (soc < pdata->power_on_soc_threshold) {
+				printf("soc=%d%%, threshold soc=%d%%\n",
+				       soc, pdata->power_on_soc_threshold);
+				printf("Low power, unable to boot, charging...\n");
+				/* 'true': just for clear time of check key */
+				check_key_press(pwrkey, true);
+				show_idx = image_num - 1;
+				continue;
+			}
+
+			if (voltage < pdata->power_on_voltage_threshold) {
+				printf("voltage=%dmv, threshold voltage=%dmv\n",
+				       voltage, pdata->power_on_voltage_threshold);
+				printf("Low power, unable to boot, charging...\n");
+				/* 'true': just for clear time of check key */
+				check_key_press(pwrkey, true);
+				show_idx = image_num - 1;
+				continue;
+			}
+
+			/* Success exit charging */
+			printf("Exit charge animation...\n");
+			rockchip_show_logo();
+			break;
+		} else {
+			/* Do nothing */
+		}
+
+		debug("step5 (%d)... \n", screen_on);
+
+		/*
+		 * Step5: Check auto start kernel
+		 */
+		if (pdata->auto_start_kernel) {
+			if ((voltage >= pdata->power_on_voltage_threshold) &&
+			    (soc >= pdata->power_on_soc_threshold)) {
+				printf("Auto start, exit charge animation..\n");
+				rockchip_show_logo();
+				break;
+			}
+		}
+	}
+
+	ms = get_timer(charge_start);
+	if (ms >= 1000) {
+		sec = ms / 1000;
+		ms = ms % 1000;
+	}
+
+	printf("charging time total: %lu.%lus, soc=%d%%, vol=%dmv\n",
+	       sec, ms, soc, voltage);
+
+	return 0;
+}
+
+static const struct dm_charge_display_ops charge_animation_ops = {
+	.get_power_on_soc = charge_animation_threshold_soc,
+	.get_power_on_voltage = charge_animation_threshold_voltage,
+	.show = charge_animation_show,
+};
+
+static int charge_animation_probe(struct udevice *dev)
+{
+	struct charge_animation_priv *priv = dev_get_priv(dev);
+	struct udevice *pwrkey, *fg, *pmic;
+	int ret;
+
+	/* Get PMIC */
+	ret = uclass_get_device(UCLASS_PMIC, 0, &pmic);
+	if (ret) {
+		printf("Get UCLASS PMIC failed: %d\n", ret);
+		return ret;
+	}
+	priv->pmic = pmic;
+
+	/* Get power key */
+	for (uclass_first_device(UCLASS_KEY, &pwrkey);
+	     pwrkey;
+	     uclass_next_device(&pwrkey)) {
+		if (key_type(pwrkey) == KEY_POWER) {
+			priv->pwrkey = pwrkey;
+			break;
+		}
+	}
+	if (!priv->pwrkey) {
+		printf("Can't find any power key\n");
+		return -ENOSYS;
+	}
+
+	/* Get fuel gauge */
+	ret = uclass_get_device(UCLASS_FG, 0, &fg);
+	if (ret) {
+		printf("Get UCLASS FG failed: %d\n", ret);
+		return ret;
+	}
+	priv->fg = fg;
+
+	/* Get image */
+	priv->image = image;
+	priv->image_num = ARRAY_SIZE(image);
+
+	printf("Enable charge animation display\n");
+
+	return 0;
+}
+
+static const struct udevice_id charge_animation_ids[] = {
+	{ .compatible = "charge-animation" },
+	{ },
+};
+
+U_BOOT_DRIVER(charge_animation) = {
+	.name = "charge-animation",
+	.id = UCLASS_CHARGE_DISPLAY,
+	.probe = charge_animation_probe,
+	.of_match = charge_animation_ids,
+	.ops = &charge_animation_ops,
+	.ofdata_to_platdata = charge_animation_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct charge_animation_pdata),
+	.priv_auto_alloc_size = sizeof(struct charge_animation_priv),
+};

commit 87b6d138dd43b3b66683694f83bd2a35cc47e8a7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 10:40:32 2017 +0800

    fuel gauge: rk816: do some adjustment to fit charge display framework
    
    1. fix return charger type error;
    2. initialize rsoc only when soc and voltage are beyond threshold.
    
    Change-Id: I154d205b0a2dbab84bcb26451c73f83ef0b0ac40
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index c58df8a6c4..c98546484f 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -13,6 +13,8 @@
 #include <asm/gpio.h>
 #include <common.h>
 #include <power/pmic.h>
+#include <dm/uclass-internal.h>
+#include <power/charge_display.h>
 #include <power/fuel_gauge.h>
 #include <power/rk8xx_pmic.h>
 #include <linux/usb/phy-rockchip-inno-usb2.h>
@@ -179,9 +181,6 @@ enum dc_type {
 
 static struct udevice *g_pmic_dev;
 
-/* TODO */
-#define CONFIG_SCREEN_ON_VOL_THRESD	3400
-
 static const u32 CHRG_VOL_SEL[] = {
 	4050, 4100, 4150, 4200, 4250, 4300, 4350
 };
@@ -797,18 +796,6 @@ static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
 	}
 }
 
-void rk816_bat_init_rsoc(struct battery_info *di)
-{
-	di->pwroff_min = rk816_bat_get_pwroff_min(di);
-	di->is_first_power_on = is_rk816_bat_first_poweron(di);
-	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
-
-	if (di->is_first_power_on || di->is_sw_reset)
-		rk816_bat_first_pwron(di);
-	else
-		rk816_bat_not_first_pwron(di);
-}
-
 static int rk816_bat_calc_linek(struct battery_info *di)
 {
 	int linek, diff, delta;
@@ -857,38 +844,6 @@ static void rk816_bat_init_poffset(struct battery_info *di)
 	di->poffset = coffset - ioffset;
 }
 
-static int rk816_fg_init(struct battery_info *di)
-{
-	rk816_bat_enable_gauge(di);
-	rk816_bat_set_vol_instant_mode(di);
-	rk816_bat_init_voltage_kb(di);
-	rk816_bat_init_poffset(di);
-	rk816_bat_clr_initialized_state(di);
-	di->dsoc = rk816_bat_get_dsoc(di);
-
-	/* it's better to init fg in kernel,
-	 * so avoid init in uboot as far as possible
-	 */
-	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
-		if (rk816_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
-			rk816_bat_init_rsoc(di);
-#ifdef CONFIG_UBOOT_CHARGE
-		else
-			rk816_bat_init_rsoc(di);
-#endif
-	}
-
-	rk816_bat_init_chrg_config(di);
-	di->voltage_avg = rk816_bat_get_avg_voltage(di);
-	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
-	di->current_avg = rk816_bat_get_avg_current(di);
-	di->sm_linek = rk816_bat_calc_linek(di);
-	di->finish_chrg_base = get_timer(0);
-	di->pwr_vol = di->voltage_avg;
-
-	return 0;
-}
-
 static bool is_rk816_bat_exist(struct  battery_info *di)
 {
 	return (rk816_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
@@ -966,6 +921,63 @@ static int rk816_bat_get_charger_type(struct battery_info *di)
 	return rk816_bat_get_usb_state(di);
 }
 
+void rk816_bat_init_rsoc(struct battery_info *di)
+{
+#ifdef CONFIG_DM_CHARGE_DISPLAY
+	struct udevice *dev;
+	int soc, voltage, est_voltage;
+	int ret;
+
+	ret = uclass_find_first_device(UCLASS_CHARGE_DISPLAY, &dev);
+	if (!ret) {
+		est_voltage = rk816_bat_get_avg_voltage(di);
+		soc = charge_display_get_power_on_soc(dev);
+		voltage = charge_display_get_power_on_voltage(dev);
+		DBG("threshold: %d%%, %dmv; now: %d%%, %dmv\n",
+		    soc, voltage, di->dsoc, est_voltage);
+		if ((di->dsoc >= soc) && (est_voltage >= voltage))
+			return;
+	}
+#endif
+
+	if (rk816_bat_get_charger_type(di) == NO_CHARGER)
+		return;
+
+	di->pwroff_min = rk816_bat_get_pwroff_min(di);
+	di->is_first_power_on = is_rk816_bat_first_poweron(di);
+	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
+
+	if (di->is_first_power_on || di->is_sw_reset)
+		rk816_bat_first_pwron(di);
+	else
+		rk816_bat_not_first_pwron(di);
+}
+
+static int rk816_fg_init(struct battery_info *di)
+{
+	rk816_bat_enable_gauge(di);
+	rk816_bat_set_vol_instant_mode(di);
+	rk816_bat_init_voltage_kb(di);
+	rk816_bat_init_poffset(di);
+	rk816_bat_clr_initialized_state(di);
+	di->dsoc = rk816_bat_get_dsoc(di);
+
+	/*
+	 * It's better to init fg in kernel,
+	 * so avoid init in uboot as far as possible.
+	 */
+	rk816_bat_init_rsoc(di);
+	rk816_bat_init_chrg_config(di);
+	di->voltage_avg = rk816_bat_get_avg_voltage(di);
+	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
+	di->current_avg = rk816_bat_get_avg_current(di);
+	di->sm_linek = rk816_bat_calc_linek(di);
+	di->finish_chrg_base = get_timer(0);
+	di->pwr_vol = di->voltage_avg;
+
+	return 0;
+}
+
 static void rk816_bat_save_dsoc(struct  battery_info *di, u8 save_soc)
 {
 	static int old_soc = -1;
@@ -1275,7 +1287,9 @@ static int rk816_bat_update_get_voltage(struct udevice *dev)
 
 static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
 {
-	return rk816_bat_dwc_otg_check_dpdm();
+	struct battery_info *di = dev_get_priv(dev);
+
+	return rk816_bat_get_charger_type(di);
 }
 
 static struct dm_fuel_gauge_ops fg_ops = {

commit d38403e47b2a64c4c7a82740200f92219cf4ffe3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Nov 1 11:54:49 2017 +0800

    video: dram: remove rockchip logo show from probe
    
    Because charge animation requires screen off when system
    power is extrem low. Logo show should be behind after
    charge animation, so remove it from probe.
    
    Change-Id: I136416de96acc09b5f3a477890ec3489d8dde96b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 1c1c2e10a6..5a746d579f 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -984,8 +984,6 @@ static int rockchip_display_probe(struct udevice *dev)
 	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
 	rockchip_show_fbbase(plat->base);
 	video_set_flush_dcache(dev, true);
-	#else
-	rockchip_show_logo();
 	#endif
 
 	return 0;

commit 55b6f88e0e1645500f4c2389e3c7378f34c5e71a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 11:50:36 2017 +0800

    dm: add charge display uclass
    
    This is mainly used for charge animation.
    
    Change-Id: Iac4ffe76b1985abfa44181a797a15df74e5bcf14
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 0f4ca0ea40..f0b6b40d3f 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -8,6 +8,12 @@ source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
 
+config DM_CHARGE_DISPLAY
+	bool "Enable driver model for charge display support"
+	depends on DM
+	help
+	  This adds a simple uclass for charge display.
+
 choice
 	prompt "Select Sunxi PMIC Variant"
 	depends on ARCH_SUNXI
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 90a3b00a7c..0e957eb201 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -5,6 +5,8 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+obj-$(CONFIG_DM_CHARGE_DISPLAY)	+= charge-display-uclass.o
+
 obj-$(CONFIG_AXP152_POWER)	+= axp152.o
 obj-$(CONFIG_AXP209_POWER)	+= axp209.o
 obj-$(CONFIG_AXP221_POWER)	+= axp221.o
diff --git a/drivers/power/charge-display-uclass.c b/drivers/power/charge-display-uclass.c
new file mode 100644
index 0000000000..41bed07ce8
--- /dev/null
+++ b/drivers/power/charge-display-uclass.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <command.h>
+#include <common.h>
+#include <dm.h>
+#include <power/charge_display.h>
+
+int charge_display_get_power_on_soc(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_power_on_soc)
+		return -ENOSYS;
+
+	return ops->get_power_on_soc(dev);
+}
+
+int charge_display_get_power_on_voltage(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_power_on_voltage)
+		return -ENOSYS;
+
+	return ops->get_power_on_voltage(dev);
+}
+
+int charge_display_show(struct udevice *dev)
+{
+	const struct dm_charge_display_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->show)
+		return -ENOSYS;
+
+	return ops->show(dev);
+}
+
+UCLASS_DRIVER(charge_display) = {
+	.id	= UCLASS_CHARGE_DISPLAY,
+	.name	= "charge_display",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index fabdc849c6..255fdbd285 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -94,6 +94,7 @@ enum uclass_id {
 	UCLASS_FG,
 	UCLASS_KEY,
 	UCLASS_RC,		/* Remote Controller */
+	UCLASS_CHARGE_DISPLAY,	/* Charge display */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/power/charge_display.h b/include/power/charge_display.h
new file mode 100644
index 0000000000..9c3486ea52
--- /dev/null
+++ b/include/power/charge_display.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _CHARGE_DISPLAY_H_
+#define _CHARGE_DISPLAY_H_
+
+struct dm_charge_display_ops {
+	int (*get_power_on_soc)(struct udevice *dev);
+	int (*get_power_on_voltage)(struct udevice *dev);
+	int (*show)(struct udevice *dev);
+};
+
+int charge_display_get_power_on_soc(struct udevice *dev);
+int charge_display_get_power_on_voltage(struct udevice *dev);
+int charge_display_show(struct udevice *dev);
+
+#endif

commit 7569b0b9426cbc3753852f90e432cfdc2437f5f1
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 10:41:28 2017 +0800

    video: remove regulator set in panel_simple_unprepare
    
    Change-Id: I7c9515cb0bdd720af8e143bea1a9cc4bb2772ae2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index eda3493c3c..318d347098 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -69,15 +69,7 @@ static int panel_simple_unprepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
-	int ret;
 
-	if (panel->power_supply) {
-		ret = regulator_set_enable(panel->power_supply,
-					   !panel->power_invert);
-		if (ret)
-			printf("%s: failed to disable power_supply",
-			       __func__);
-	}
 	dm_gpio_set_value(&panel->enable, 0);
 	mdelay(panel->delay_unprepare);
 

commit aa9b1b59c9e943799d4e2c17a3aa622019ebc48f
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 18:10:38 2017 +0800

    cmd: rockusb: add rockusb command support
    
    This patch add a new rockusb command support.
    
    Rockusb command provides a way to upgrade firmware for Rockchip SoC
    based devices, its design make use of USB Bulk-Only Transport based
    on USB Mass Storage framework.
    
    Change-Id: Idb04c62a8f6fb7ba84641bd4ee00f67920a7cfc8
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 473dc7cf88..7b16720d88 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -831,6 +831,14 @@ config CMD_REMOTEPROC
 	help
 	  Support for Remote Processor control
 
+config CMD_ROCKUSB
+	bool "rockusb - Command to upgrade Rockchip device"
+	depends on USB_GADGET
+	help
+	  Rockusb command provides a way to upgrade firmware for
+	  Rockchip SoC based devices, its design make use of USB
+	  Bulk-Only Transport based on UMS framework.
+
 config CMD_RKNAND
 	bool "rknand"
 	depends on RKNAND
diff --git a/cmd/Makefile b/cmd/Makefile
index a8f9da7c93..c91a8e8b34 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -107,6 +107,7 @@ obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
+obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_CMD_RKNAND) += rknand.o
 obj-$(CONFIG_CMD_SF) += sf.o
 obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
new file mode 100644
index 0000000000..177f71ad21
--- /dev/null
+++ b/cmd/rockusb.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ * Frank Wang <frank.wang@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <errno.h>
+#include <common.h>
+#include <command.h>
+#include <console.h>
+#include <g_dnl.h>
+#include <part.h>
+#include <usb.h>
+#include <usb_mass_storage.h>
+#include <rockusb.h>
+
+static struct rockusb rkusb;
+static struct rockusb *g_rkusb;
+
+static int rkusb_read_sector(struct ums *ums_dev,
+			     ulong start, lbaint_t blkcnt, void *buf)
+{
+	struct blk_desc *block_dev = &ums_dev->block_dev;
+	lbaint_t blkstart = start + ums_dev->start_sector;
+
+	return blk_dread(block_dev, blkstart, blkcnt, buf);
+}
+
+static int rkusb_write_sector(struct ums *ums_dev,
+			      ulong start, lbaint_t blkcnt, const void *buf)
+{
+	struct blk_desc *block_dev = &ums_dev->block_dev;
+	lbaint_t blkstart = start + ums_dev->start_sector;
+
+	return blk_dwrite(block_dev, blkstart, blkcnt, buf);
+}
+
+static int rkusb_erase_sector(struct ums *ums_dev,
+			      ulong start, lbaint_t blkcnt)
+{
+	struct blk_desc *block_dev = &ums_dev->block_dev;
+	lbaint_t blkstart = start + ums_dev->start_sector;
+
+	return blk_derase(block_dev, blkstart, blkcnt);
+}
+
+static void rkusb_fini(void)
+{
+	int i;
+
+	for (i = 0; i < g_rkusb->ums_cnt; i++)
+		free((void *)g_rkusb->ums[i].name);
+	free(g_rkusb->ums);
+	g_rkusb->ums = NULL;
+	g_rkusb = NULL;
+	g_rkusb->ums_cnt = 0;
+}
+
+#define RKUSB_NAME_LEN 16
+
+static int rkusb_init(const char *devtype, const char *devnums_part_str)
+{
+	char *s, *t, *devnum_part_str, *name;
+	struct blk_desc *block_dev;
+	disk_partition_t info;
+	int partnum, cnt;
+	int ret = -1;
+	struct ums *ums_new;
+
+	s = strdup(devnums_part_str);
+	if (!s)
+		return -1;
+
+	t = s;
+	g_rkusb->ums_cnt = 0;
+
+	for (;;) {
+		devnum_part_str = strsep(&t, ",");
+		if (!devnum_part_str)
+			break;
+
+		partnum = blk_get_device_part_str(devtype, devnum_part_str,
+					&block_dev, &info, 1);
+		if (partnum < 0)
+			goto cleanup;
+
+		/* f_mass_storage.c assumes SECTOR_SIZE sectors */
+		if (block_dev->blksz != SECTOR_SIZE)
+			goto cleanup;
+
+		ums_new = realloc(g_rkusb->ums, (g_rkusb->ums_cnt + 1) *
+				  sizeof(*g_rkusb->ums));
+		if (!ums_new)
+			goto cleanup;
+		g_rkusb->ums = ums_new;
+		cnt = g_rkusb->ums_cnt;
+
+		/* if partnum = 0, expose all partitions */
+		if (partnum == 0) {
+			g_rkusb->ums[cnt].start_sector = 0;
+			g_rkusb->ums[cnt].num_sectors = block_dev->lba;
+		} else {
+			g_rkusb->ums[cnt].start_sector = info.start;
+			g_rkusb->ums[cnt].num_sectors = info.size;
+		}
+
+		g_rkusb->ums[cnt].read_sector = rkusb_read_sector;
+		g_rkusb->ums[cnt].write_sector = rkusb_write_sector;
+		g_rkusb->ums[cnt].erase_sector = rkusb_erase_sector;
+
+		name = malloc(RKUSB_NAME_LEN);
+		if (!name)
+			goto cleanup;
+		snprintf(name, RKUSB_NAME_LEN, "rkusb disk %d", cnt);
+		g_rkusb->ums[cnt].name = name;
+		g_rkusb->ums[cnt].block_dev = *block_dev;
+
+		printf("RKUSB: LUN %d, dev %d, hwpart %d, sector %#x, count %#x\n",
+		       g_rkusb->ums_cnt,
+		       g_rkusb->ums[cnt].block_dev.devnum,
+		       g_rkusb->ums[cnt].block_dev.hwpart,
+		       g_rkusb->ums[cnt].start_sector,
+		       g_rkusb->ums[cnt].num_sectors);
+
+		g_rkusb->ums_cnt++;
+	}
+
+	if (g_rkusb->ums_cnt)
+		ret = 0;
+
+cleanup:
+	free(s);
+	if (ret < 0)
+		rkusb_fini();
+
+	return ret;
+}
+
+static int do_rkusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	const char *usb_controller;
+	const char *devtype;
+	const char *devnum;
+	unsigned int controller_index;
+	int rc;
+	int cable_ready_timeout __maybe_unused;
+
+	if (argc != 4)
+		return CMD_RET_USAGE;
+
+	usb_controller = argv[1];
+	devtype = argv[2];
+	devnum	= argv[3];
+
+	g_rkusb = &rkusb;
+	rc = rkusb_init(devtype, devnum);
+	if (rc < 0)
+		return CMD_RET_FAILURE;
+
+	controller_index = (unsigned int)(simple_strtoul(
+				usb_controller,	NULL, 0));
+	if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
+		error("Couldn't init USB controller.");
+		rc = CMD_RET_FAILURE;
+		goto cleanup_rkusb;
+	}
+
+	rc = fsg_init(g_rkusb->ums, g_rkusb->ums_cnt);
+	if (rc) {
+		error("fsg_init failed");
+		rc = CMD_RET_FAILURE;
+		goto cleanup_board;
+	}
+
+	rc = g_dnl_register("rkusb_ums_dnl");
+	if (rc) {
+		error("g_dnl_register failed");
+		rc = CMD_RET_FAILURE;
+		goto cleanup_board;
+	}
+
+	/* Timeout unit: seconds */
+	cable_ready_timeout = UMS_CABLE_READY_TIMEOUT;
+
+	if (!g_dnl_board_usb_cable_connected()) {
+		puts("Please connect USB cable.\n");
+
+		while (!g_dnl_board_usb_cable_connected()) {
+			if (ctrlc()) {
+				puts("\rCTRL+C - Operation aborted.\n");
+				rc = CMD_RET_SUCCESS;
+				goto cleanup_register;
+			}
+			if (!cable_ready_timeout) {
+				puts("\rUSB cable not detected.\nCommand exit.\n");
+				rc = CMD_RET_SUCCESS;
+				goto cleanup_register;
+			}
+
+			printf("\rAuto exit in: %.2d s.", cable_ready_timeout);
+			mdelay(1000);
+			cable_ready_timeout--;
+		}
+		puts("\r\n");
+	}
+
+	while (1) {
+		usb_gadget_handle_interrupts(controller_index);
+
+		rc = fsg_main_thread(NULL);
+		if (rc) {
+			/* Check I/O error */
+			if (rc == -EIO)
+				printf("\rCheck USB cable connection\n");
+
+			/* Check CTRL+C */
+			if (rc == -EPIPE)
+				printf("\rCTRL+C - Operation aborted\n");
+
+			rc = CMD_RET_SUCCESS;
+			goto cleanup_register;
+		}
+	}
+
+cleanup_register:
+	g_dnl_unregister();
+cleanup_board:
+	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+cleanup_rkusb:
+	rkusb_fini();
+
+	return rc;
+}
+
+U_BOOT_CMD(rockusb, 4, 1, do_rkusb,
+	   "Use the rockusb Protocol",
+	   "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
+);
diff --git a/include/rockusb.h b/include/rockusb.h
index 6e8647b7dd..fefe24c98c 100644
--- a/include/rockusb.h
+++ b/include/rockusb.h
@@ -69,4 +69,13 @@ static inline int rkusb_cmd_process(struct fsg_common *common,
 }
 #endif
 
+/* Wait at maximum 60 seconds for cable connection */
+#define RKUSB_CABLE_READY_TIMEOUT	60
+#define SECTOR_SIZE			0x200
+
+struct rockusb {
+	struct ums *ums;
+	int ums_cnt;
+};
+
 #endif /* __ROCKUSB_H__ */

commit f16e43f88dac0a4388778d4548e1482b04c353b1
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 17:19:44 2017 +0800

    usb: gadget: add a new rockusb gadget driver
    
    This patch add a new rockusb gadget driver function.
    
    For the design, simply embeding rockusb code into USB Mass Storage
    function as using UMS framework can prominently improve upgrade speed
    and devices stability.
    
    This change does not affect the original USB Mass Storage function,
    the rockusb process are just checked by IS_RKUSB_UMS_DNL macro which
    only run when CONFIG_CMD_ROCKUSB was defined and rkusb_ums_dnl
    composite driver was registed.
    
    Change-Id: I9c2723200c7e02d947587037abcd7d3badf4256c
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 1ecb92ac6b..ce8a70bcb3 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -250,6 +250,7 @@
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <usb_mass_storage.h>
+#include <rockusb.h>
 
 #include <asm/unaligned.h>
 #include <linux/usb/gadget.h>
@@ -1670,6 +1671,9 @@ static int send_status(struct fsg_common *common)
 
 
 /*-------------------------------------------------------------------------*/
+#ifdef CONFIG_CMD_ROCKUSB
+#include "f_rockusb.c"
+#endif
 
 /* Check whether the command is properly formed and whether its data size
  * and direction agree with the values we already have. */
@@ -1795,6 +1799,7 @@ static int do_scsi_command(struct fsg_common *common)
 	int			i;
 	static char		unknown[16];
 	struct fsg_lun		*curlun = &common->luns[common->lun];
+	const char		*cdev_name __maybe_unused;
 
 	dump_cdb(common);
 
@@ -1810,6 +1815,16 @@ static int do_scsi_command(struct fsg_common *common)
 	common->short_packet_received = 0;
 
 	down_read(&common->filesem);	/* We're using the backing file */
+
+	cdev_name = common->fsg->function.config->cdev->driver->name;
+	if (IS_RKUSB_UMS_DNL(cdev_name)) {
+		rc = rkusb_cmd_process(common, bh, &reply);
+		if (rc == RKUSB_RC_FINISHED || rc == RKUSB_RC_ERROR)
+			goto finish;
+		else if (rc == RKUSB_RC_UNKNOWN_CMND)
+			goto unknown_cmnd;
+	}
+
 	switch (common->cmnd[0]) {
 
 	case SC_INQUIRY:
@@ -2038,6 +2053,8 @@ unknown_cmnd:
 		}
 		break;
 	}
+
+finish:
 	up_read(&common->filesem);
 
 	if (reply == -EINTR)
@@ -2693,7 +2710,10 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
 	fsg->bulk_out = ep;
 
 	/* Copy descriptors */
-	f->descriptors = usb_copy_descriptors(fsg_fs_function);
+	if (IS_RKUSB_UMS_DNL(c->cdev->driver->name))
+		f->descriptors = usb_copy_descriptors(rkusb_fs_function);
+	else
+		f->descriptors = usb_copy_descriptors(fsg_fs_function);
 	if (unlikely(!f->descriptors))
 		return -ENOMEM;
 
@@ -2703,7 +2723,13 @@ static int fsg_bind(struct usb_configuration *c, struct usb_function *f)
 			fsg_fs_bulk_in_desc.bEndpointAddress;
 		fsg_hs_bulk_out_desc.bEndpointAddress =
 			fsg_fs_bulk_out_desc.bEndpointAddress;
-		f->hs_descriptors = usb_copy_descriptors(fsg_hs_function);
+
+		if (IS_RKUSB_UMS_DNL(c->cdev->driver->name))
+			f->hs_descriptors =
+				usb_copy_descriptors(rkusb_hs_function);
+		else
+			f->hs_descriptors =
+				usb_copy_descriptors(fsg_hs_function);
 		if (unlikely(!f->hs_descriptors)) {
 			free(f->descriptors);
 			return -ENOMEM;
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
new file mode 100644
index 0000000000..b5d350a975
--- /dev/null
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -0,0 +1,332 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ * Frank Wang <frank.wang@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <rockusb.h>
+
+#define ROCKUSB_INTERFACE_CLASS	0xff
+#define ROCKUSB_INTERFACE_SUB_CLASS	0x06
+#define ROCKUSB_INTERFACE_PROTOCOL	0x05
+
+static struct usb_interface_descriptor rkusb_intf_desc = {
+	.bLength		= USB_DT_INTERFACE_SIZE,
+	.bDescriptorType	= USB_DT_INTERFACE,
+	.bInterfaceNumber	= 0x00,
+	.bAlternateSetting	= 0x00,
+	.bNumEndpoints		= 0x02,
+	.bInterfaceClass	= ROCKUSB_INTERFACE_CLASS,
+	.bInterfaceSubClass	= ROCKUSB_INTERFACE_SUB_CLASS,
+	.bInterfaceProtocol	= ROCKUSB_INTERFACE_PROTOCOL,
+};
+
+static struct usb_descriptor_header *rkusb_fs_function[] = {
+	(struct usb_descriptor_header *)&rkusb_intf_desc,
+	(struct usb_descriptor_header *)&fsg_fs_bulk_in_desc,
+	(struct usb_descriptor_header *)&fsg_fs_bulk_out_desc,
+	NULL,
+};
+
+static struct usb_descriptor_header *rkusb_hs_function[] = {
+	(struct usb_descriptor_header *)&rkusb_intf_desc,
+	(struct usb_descriptor_header *)&fsg_hs_bulk_in_desc,
+	(struct usb_descriptor_header *)&fsg_hs_bulk_out_desc,
+	NULL,
+};
+
+struct rk_flash_info {
+	u32	flash_size;
+	u16	block_size;
+	u8	page_size;
+	u8	ecc_bits;
+	u8	access_time;
+	u8	manufacturer;
+	u8	flash_mask;
+} __packed;
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+	/* Enumerate as a loader device */
+	if (IS_RKUSB_UMS_DNL(name))
+		dev->bcdUSB = cpu_to_le16(0x0201);
+
+	return 0;
+}
+
+__maybe_unused
+static inline void dump_cbw(struct fsg_bulk_cb_wrap *cbw)
+{
+	assert(!cbw);
+
+	debug("%s:\n", __func__);
+	debug("Signature %x\n", cbw->Signature);
+	debug("Tag %x\n", cbw->Tag);
+	debug("DataTransferLength %x\n", cbw->DataTransferLength);
+	debug("Flags %x\n", cbw->Flags);
+	debug("LUN %x\n", cbw->Lun);
+	debug("Length %x\n", cbw->Length);
+	debug("OptionCode %x\n", cbw->CDB[0]);
+	debug("SubCode %x\n", cbw->CDB[1]);
+	debug("SectorAddr %x\n", get_unaligned_be32(&cbw->CDB[2]));
+	debug("BlkSectors %x\n\n", get_unaligned_be16(&cbw->CDB[7]));
+}
+
+static int rkusb_check_lun(struct fsg_common *common)
+{
+	struct fsg_lun *curlun;
+
+	/* Check the LUN */
+	if (common->lun >= 0 && common->lun < common->nluns) {
+		curlun = &common->luns[common->lun];
+		if (common->cmnd[0] != SC_REQUEST_SENSE) {
+			curlun->sense_data = SS_NO_SENSE;
+			curlun->info_valid = 0;
+		}
+	} else {
+		curlun = NULL;
+		common->bad_lun_okay = 0;
+
+		/*
+		 * INQUIRY and REQUEST SENSE commands are explicitly allowed
+		 * to use unsupported LUNs; all others may not.
+		 */
+		if (common->cmnd[0] != SC_INQUIRY &&
+		    common->cmnd[0] != SC_REQUEST_SENSE) {
+			debug("unsupported LUN %d\n", common->lun);
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static void __do_reset(struct usb_ep *ep, struct usb_request *req)
+{
+	do_reset(NULL, 0, 0, NULL);
+}
+
+static int rkusb_do_reset(struct fsg_common *common,
+			  struct fsg_buffhd *bh)
+{
+	common->data_size_from_cmnd = common->cmnd[4];
+	common->residue = 0;
+	bh->inreq->complete = __do_reset;
+	bh->state = BUF_STATE_EMPTY;
+
+	return 0;
+}
+
+static int rkusb_do_test_unit_ready(struct fsg_common *common,
+				    struct fsg_buffhd *bh)
+{
+	common->residue = 0x06 << 24; /* Max block xfer support from host */
+	common->data_dir = DATA_DIR_NONE;
+	bh->state = BUF_STATE_EMPTY;
+
+	return 0;
+}
+
+static int rkusb_do_read_flash_id(struct fsg_common *common,
+				  struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+
+	memcpy((void *)&buf[0], "EMMC ", 5);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_do_test_bad_block(struct fsg_common *common,
+				   struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+
+	memset((void *)&buf[0], 0, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_do_read_flash_info(struct fsg_common *common,
+				    struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+	struct rk_flash_info finfo = {
+		.block_size = 1024,
+		.ecc_bits = 0,
+		.page_size = 4,
+		.access_time = 40,
+		.manufacturer = 0,
+		.flash_mask = 0
+	};
+
+	finfo.flash_size = (u32)ums[common->lun].block_dev.lba;
+	if (finfo.flash_size)
+		finfo.flash_mask = 1;
+
+	memset((void *)&buf[0], 0, len);
+	memcpy((void *)&buf[0], (void *)&finfo, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_do_lba_erase(struct fsg_common *common,
+			      struct fsg_buffhd *bh)
+{
+	struct fsg_lun *curlun = &common->luns[common->lun];
+	u32 lba, amount;
+	loff_t file_offset;
+	int rc;
+
+	lba = get_unaligned_be32(&common->cmnd[2]);
+	if (lba >= curlun->num_sectors) {
+		curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		rc = -EINVAL;
+		goto out;
+	}
+
+	file_offset = ((loff_t) lba) << 9;
+	amount = get_unaligned_be16(&common->cmnd[7]) << 9;
+	if (unlikely(amount == 0)) {
+		curlun->sense_data = SS_INVALID_FIELD_IN_CDB;
+		rc = -EIO;
+		goto out;
+	}
+
+	/* Perform the erase */
+	rc = ums[common->lun].erase_sector(&ums[common->lun],
+			       file_offset / SECTOR_SIZE,
+			       amount / SECTOR_SIZE);
+	if (!rc) {
+		curlun->sense_data = SS_MEDIUM_NOT_PRESENT;
+		rc = -EIO;
+	}
+
+out:
+	common->data_dir = DATA_DIR_NONE;
+	bh->state = BUF_STATE_EMPTY;
+
+	return rc;
+}
+
+static int rkusb_do_read_capacity(struct fsg_common *common,
+				    struct fsg_buffhd *bh)
+{
+	u8 *buf = (u8 *)bh->buf;
+	u32 len = common->data_size;
+
+	/*
+	 * bit[0]: Direct LBA, 0: Disabled;
+	 * bit[1:63}: Reserved.
+	 */
+	memset((void *)&buf[0], 0, len);
+
+	/* Set data xfer size */
+	common->residue = common->data_size_from_cmnd = len;
+
+	return len;
+}
+
+static int rkusb_cmd_process(struct fsg_common *common,
+			     struct fsg_buffhd *bh, int *reply)
+{
+	struct usb_request	*req = bh->outreq;
+	struct fsg_bulk_cb_wrap	*cbw = req->buf;
+	int rc;
+
+	dump_cbw(cbw);
+
+	if (rkusb_check_lun(common)) {
+		*reply = -EINVAL;
+		return RKUSB_RC_ERROR;
+	}
+
+	switch (common->cmnd[0]) {
+	case RKUSB_TEST_UNIT_READY:
+		*reply = rkusb_do_test_unit_ready(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_READ_FLASH_ID:
+		*reply = rkusb_do_read_flash_id(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_TEST_BAD_BLOCK:
+		*reply = rkusb_do_test_bad_block(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_LBA_READ_10:
+		common->cmnd[0] = SC_READ_10;
+		common->cmnd[1] = 0; /* Not support */
+		rc = RKUSB_RC_CONTINUE;
+		break;
+
+	case RKUSB_LBA_WRITE_10:
+		common->cmnd[0] = SC_WRITE_10;
+		common->cmnd[1] = 0; /* Not support */
+		rc = RKUSB_RC_CONTINUE;
+		break;
+
+	case RKUSB_READ_FLASH_INFO:
+		*reply = rkusb_do_read_flash_info(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_LBA_ERASE:
+		*reply = rkusb_do_lba_erase(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_READ_CAPACITY:
+		*reply = rkusb_do_read_capacity(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_RESET:
+		*reply = rkusb_do_reset(common, bh);
+		rc = RKUSB_RC_FINISHED;
+		break;
+
+	case RKUSB_SET_DEVICE_ID:
+	case RKUSB_READ_10:
+	case RKUSB_WRITE_10:
+	case RKUSB_ERASE_10:
+	case RKUSB_WRITE_SPARE:
+	case RKUSB_READ_SPARE:
+	case RKUSB_ERASE_10_FORCE:
+	case RKUSB_GET_VERSION:
+	case RKUSB_ERASE_SYS_DISK:
+	case RKUSB_SDRAM_READ_10:
+	case RKUSB_SDRAM_WRITE_10:
+	case RKUSB_SDRAM_EXECUTE:
+	case RKUSB_GET_CHIP_VER:
+	case RKUSB_LOW_FORMAT:
+	case RKUSB_SET_RESET_FLAG:
+	case RKUSB_SPI_READ_10:
+	case RKUSB_SPI_WRITE_10:
+	case RKUSB_SESSION:
+		/* Fall through */
+	default:
+		rc = RKUSB_RC_UNKNOWN_CMND;
+		break;
+	}
+
+	return rc;
+}
+
+DECLARE_GADGET_BIND_CALLBACK(rkusb_ums_dnl, fsg_add);
diff --git a/include/rockusb.h b/include/rockusb.h
new file mode 100644
index 0000000000..6e8647b7dd
--- /dev/null
+++ b/include/rockusb.h
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ * Frank Wang <frank.wang@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ROCKUSB_H__
+#define __ROCKUSB_H__
+
+#include <common.h>
+#include <part.h>
+#include <linux/usb/composite.h>
+
+enum rkusb_cmd {
+	RKUSB_TEST_UNIT_READY	= 0x00,
+	RKUSB_READ_FLASH_ID	= 0x01,
+	RKUSB_SET_DEVICE_ID	= 0x02,
+	RKUSB_TEST_BAD_BLOCK	= 0x03,
+	RKUSB_READ_10		= 0x04,
+	RKUSB_WRITE_10		= 0x05,
+	RKUSB_ERASE_10		= 0x06,
+	RKUSB_WRITE_SPARE	= 0x07,
+	RKUSB_READ_SPARE	= 0x08,
+	RKUSB_ERASE_10_FORCE	= 0x0B,
+	RKUSB_GET_VERSION	= 0x0C,
+	RKUSB_LBA_READ_10	= 0x14,
+	RKUSB_LBA_WRITE_10	= 0x15,
+	RKUSB_ERASE_SYS_DISK	= 0x16,
+	RKUSB_SDRAM_READ_10	= 0x17,
+	RKUSB_SDRAM_WRITE_10	= 0x18,
+	RKUSB_SDRAM_EXECUTE	= 0x19,
+	RKUSB_READ_FLASH_INFO	= 0x1A,
+	RKUSB_GET_CHIP_VER	= 0x1B,
+	RKUSB_LOW_FORMAT	= 0x1C,
+	RKUSB_SET_RESET_FLAG	= 0x1E,
+	RKUSB_SPI_READ_10	= 0x21,
+	RKUSB_SPI_WRITE_10	= 0x22,
+	RKUSB_LBA_ERASE		= 0x25,
+	RKUSB_SESSION		= 0x30,
+	RKUSB_READ_CAPACITY	= 0xAA,
+	RKUSB_RESET		= 0xFF,
+};
+
+enum rkusb_rc {
+	RKUSB_RC_ERROR		= -1,
+	RKUSB_RC_CONTINUE	= 0,
+	RKUSB_RC_FINISHED	= 1,
+	RKUSB_RC_UNKNOWN_CMND	= 2,
+};
+
+#ifdef CONFIG_CMD_ROCKUSB
+#define IS_RKUSB_UMS_DNL(name)	(!strncmp((name), "rkusb_ums_dnl", 13))
+#else
+#define IS_RKUSB_UMS_DNL(name)	0
+
+struct fsg_buffhd;
+struct fsg_dev;
+struct fsg_common;
+struct fsg_config;
+
+static struct usb_descriptor_header *rkusb_fs_function[];
+static struct usb_descriptor_header *rkusb_hs_function[];
+
+static inline int rkusb_cmd_process(struct fsg_common *common,
+				    struct fsg_buffhd *bh, int *reply)
+{
+	return -EPERM;
+}
+#endif
+
+#endif /* __ROCKUSB_H__ */
diff --git a/include/usb_mass_storage.h b/include/usb_mass_storage.h
index 8229f62b97..dc2b85e029 100644
--- a/include/usb_mass_storage.h
+++ b/include/usb_mass_storage.h
@@ -20,6 +20,9 @@ struct ums {
 			   ulong start, lbaint_t blkcnt, void *buf);
 	int (*write_sector)(struct ums *ums_dev,
 			    ulong start, lbaint_t blkcnt, const void *buf);
+#ifdef CONFIG_CMD_ROCKUSB
+	int (*erase_sector)(struct ums *ums_dev, ulong start, lbaint_t blkcnt);
+#endif
 	unsigned int start_sector;
 	unsigned int num_sectors;
 	const char *name;

commit b3032eb3f0e591cff72a8c2034d27917298e05de
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Fri Oct 27 11:11:27 2017 +0800

    arm: rockchip: add the dependence for CMD_ROCKUSB
    
    The rockusb command must work in USB gadget download framework,
    this change adds USB_GADGET_DOWNLOAD dependence for CMD_ROCKUSB.
    
    Change-Id: I27246588a427b2ca958225c992265e053e90b3da
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ded670dde3..194394ec4f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1112,8 +1112,8 @@ config ARCH_ROCKCHIP
 	select DM_USB if USB
 	select DM_PWM
 	select DM_REGULATOR
+	select CMD_ROCKUSB if USB_GADGET_DOWNLOAD
 	imply CMD_FASTBOOT
-	imply CMD_ROCKUSB
 	imply FASTBOOT
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT

commit 8f3e6817094a330bba98b4f3ee845f97aed68783
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 30 14:50:44 2017 +0800

    rockchip: add usb mass storage gadget for common functions
    
    The rockusb command implementation depend on USB mass storage gadget,
    so enable it for all rockchip common files as default.
    
    Change-Id: I5c2cd8aaf44af077b38f70099b1bea033b0a3e34
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index cfa5364710..7bd67e9ef5 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -69,6 +69,10 @@
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 /* usb otg */
 #define CONFIG_ROCKCHIP_USB2_PHY
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index f8884c9511..ecc0219cd7 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -45,6 +45,9 @@
 
 #ifndef CONFIG_SPL_BUILD
 
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index b414553565..86d1a1c808 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -40,6 +40,10 @@
 #define CONFIG_BOUNCE_BUFFER
 
 #ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
 	"pxefile_addr_r=0x00600000\0" \
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 549839d4d6..bfb11ffdff 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -27,6 +27,9 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 /* rockchip ohci host driver */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1

commit d5c4b898d3e5f36286b27634c234963347585494
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 17:10:51 2017 +0800

    Revert "usb: rockchip: add rockusb command"
    
    Will make use of UMS framework to support rockusb command.
    
    This reverts commit 301fce6(usb: rockchip: add rockusb command).
    
    Change-Id: Iec2ed64212851a85e8570dcfaa5507a5b55c29c5
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index dfc11a49a9..473dc7cf88 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -838,15 +838,6 @@ config CMD_RKNAND
 	help
 	  Rockchip NAND FLASH device support
 
-config CMD_ROCKUSB
-	bool "rockusb"
-	depends on USB_FUNCTION_ROCKUSB
-	help
-	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
-	  read/write info, image to/from devices. This enable rockusb command
-	  support to comunication with rockusb device. for more detail about
-	  this command, please read doc/README.rockusb.
-
 config CMD_SATA
 	bool "sata - Access SATA subsystem"
 	select SATA
diff --git a/cmd/Makefile b/cmd/Makefile
index 17ae86dd77..a8f9da7c93 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -104,7 +104,6 @@ obj-$(CONFIG_CMD_READ) += read.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
-obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
deleted file mode 100644
index ae2baa672b..0000000000
--- a/cmd/rockusb.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2017 Eddie Cai <eddie.cai.linux@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <console.h>
-#include <g_dnl.h>
-#include <usb.h>
-#include <asm/arch/f_rockusb.h>
-
-static int do_rockusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
-{
-	int controller_index, dev_index;
-	char *usb_controller;
-	char *devtype;
-	char *devnum;
-	int ret;
-
-	if (argc < 2)
-		return CMD_RET_USAGE;
-
-	usb_controller = argv[1];
-	controller_index = simple_strtoul(usb_controller, NULL, 0);
-
-	if (argc >= 4) {
-		devtype = argv[2];
-		devnum  = argv[3];
-	} else {
-		return CMD_RET_USAGE;
-	}
-	dev_index = simple_strtoul(devnum, NULL, 0);
-	rockusb_dev_init(devtype, dev_index);
-
-	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
-	if (ret) {
-		error("USB init failed: %d", ret);
-		return CMD_RET_FAILURE;
-	}
-
-	g_dnl_clear_detach();
-	ret = g_dnl_register("usb_dnl_rockusb");
-	if (ret)
-		return CMD_RET_FAILURE;
-
-	if (!g_dnl_board_usb_cable_connected()) {
-		puts("\rUSB cable not detected, Command exit.\n");
-		ret = CMD_RET_FAILURE;
-		goto exit;
-	}
-
-	while (1) {
-		if (g_dnl_detach())
-			break;
-		if (ctrlc())
-			break;
-		usb_gadget_handle_interrupts(controller_index);
-	}
-	ret = CMD_RET_SUCCESS;
-
-exit:
-	g_dnl_unregister();
-	g_dnl_clear_detach();
-	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
-
-	return ret;
-}
-
-U_BOOT_CMD(rockusb, 4, 1, do_rockusb,
-	   "use the rockusb protocol",
-	   "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
-);

commit 7a4b7544d78e017ef53d126bc443bb9713626586
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Wed Oct 25 16:47:45 2017 +0800

    Revert "usb: rockchip: add the rockusb gadget"
    
    Instead of using fastboot framework it is better to use ums framework
    to improve firmware upgrade speed. Will add a new rockusb driver next.
    
    This reverts commit c7cd0ba("usb: rockchip: add the rockusb gadget").
    
    Change-Id: Ie578ee94e247780d6f9b56156b0ccf737fa18cb9
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
deleted file mode 100644
index c207a787f9..0000000000
--- a/arch/arm/include/asm/arch-rockchip/f_rockusb.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2017
- *
- * Eddie Cai <eddie.cai.linux@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _F_ROCKUSB_H_
-#define _F_ROCKUSB_H_
-#include <blk.h>
-
-#define ROCKUSB_VERSION		"0.1"
-
-#define ROCKUSB_INTERFACE_CLASS	0xff
-#define ROCKUSB_INTERFACE_SUB_CLASS	0x06
-#define ROCKUSB_INTERFACE_PROTOCOL	0x05
-
-#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0  (0x0200)
-#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1  (0x0040)
-#define TX_ENDPOINT_MAXIMUM_PACKET_SIZE      (0x0040)
-
-#define EP_BUFFER_SIZE			4096
-/*
- * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
- * (64 or 512 or 1024), else we break on certain controllers like DWC3
- * that expect bulk OUT requests to be divisible by maxpacket size.
- */
-
-#define CONFIG_ROCKUSB_BUF_ADDR		CONFIG_SYS_LOAD_ADDR
-#define CONFIG_ROCKUSB_BUF_SIZE		0x08000000
-
-#define RKUSB_STATUS_IDLE			0
-#define RKUSB_STATUS_CMD			1
-#define RKUSB_STATUS_RXDATA			2
-#define RKUSB_STATUS_TXDATA			3
-#define RKUSB_STATUS_CSW			4
-#define RKUSB_STATUS_RXDATA_PREPARE		5
-#define RKUSB_STATUS_TXDATA_PREPARE		6
-
-enum rkusb_command {
-K_FW_TEST_UNIT_READY	= 0x00,
-K_FW_READ_FLASH_ID = 0x01,
-K_FW_SET_DEVICE_ID = 0x02,
-K_FW_TEST_BAD_BLOCK = 0x03,
-K_FW_READ_10 = 0x04,
-K_FW_WRITE_10 = 0x05,
-K_FW_ERASE_10 = 0x06,
-K_FW_WRITE_SPARE = 0x07,
-K_FW_READ_SPARE = 0x08,
-
-K_FW_ERASE_10_FORCE = 0x0b,
-K_FW_GET_VERSION = 0x0c,
-
-K_FW_LBA_READ_10 = 0x14,
-K_FW_LBA_WRITE_10 = 0x15,
-K_FW_ERASE_SYS_DISK = 0x16,
-K_FW_SDRAM_READ_10 = 0x17,
-K_FW_SDRAM_WRITE_10 = 0x18,
-K_FW_SDRAM_EXECUTE = 0x19,
-K_FW_READ_FLASH_INFO = 0x1A,
-K_FW_GET_CHIP_VER = 0x1B,
-K_FW_LOW_FORMAT = 0x1C,
-K_FW_SET_RESET_FLAG = 0x1E,
-K_FW_SPI_READ_10 = 0x21,
-K_FW_SPI_WRITE_10 = 0x22,
-
-K_FW_SESSION = 0X30,
-K_FW_RESET = 0xff,
-};
-
-#define CBW_DIRECTION_OUT		0x00
-#define CBW_DIRECTION_IN		0x80
-
-struct cmd_dispatch_info {
-	enum rkusb_command cmd;
-	/* call back function to handle rockusb command */
-	void (*cb)(struct usb_ep *ep, struct usb_request *req);
-};
-
-/* Bulk-only data structures */
-
-/* Command Block Wrapper */
-struct fsg_bulk_cb_wrap {
-	__le32  signature;              /* Contains 'USBC' */
-	u32     tag;                    /* Unique per command id */
-	__le32  data_transfer_length;   /* Size of the data */
-	u8      flags;                  /* Direction in bit 7 */
-	u8      lun;                    /* lun (normally 0) */
-	u8      length;                 /* Of the CDB, <= MAX_COMMAND_SIZE */
-	u8      CDB[16];                /* Command Data Block */
-};
-
-#define USB_BULK_CB_WRAP_LEN    31
-#define USB_BULK_CB_SIG         0x43425355      /* Spells out USBC */
-#define USB_BULK_IN_FLAG        0x80
-
-/* Command status Wrapper */
-struct bulk_cs_wrap {
-	__le32  signature;              /* Should = 'USBS' */
-	u32     tag;                    /* Same as original command */
-	__le32  residue;                /* Amount not transferred */
-	u8      status;                 /* See below */
-};
-
-#define USB_BULK_CS_WRAP_LEN    13
-#define USB_BULK_CS_SIG         0x53425355      /* Spells out 'USBS' */
-#define USB_STATUS_PASS         0
-#define USB_STATUS_FAIL         1
-#define USB_STATUS_PHASE_ERROR  2
-
-#define CSW_GOOD                0x00
-#define CSW_FAIL                0x01
-
-struct f_rockusb {
-	struct usb_function usb_function;
-	struct usb_ep *in_ep, *out_ep;
-	struct usb_request *in_req, *out_req;
-	char *rockusb_dev_type;
-	unsigned int rockusb_dev_index;
-	unsigned int download_tag;
-	unsigned int download_lba;
-	unsigned int download_size;
-	unsigned int download_bytes;
-	struct blk_desc *download_desc;
-	int reboot_flag;
-};
-
-/* init rockusb device, tell rockusb which device you want to read/write*/
-void rockusb_dev_init(char *dev_type, int dev_index);
-#endif /* _F_ROCKUSB_H_ */
-
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 8e3a886536..e065c5aeb3 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1123,7 +1123,7 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
 			dwc3_stop_active_transfer(dwc, dep->number, true);
 			goto out1;
 		}
-		dev_vdbg(dwc->dev, "request %p was not queued to %s\n",
+		dev_err(dwc->dev, "request %p was not queued to %s\n",
 				request, ep->name);
 		ret = -EINVAL;
 		goto out0;
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 423d1f248e..225b66bc95 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -119,14 +119,6 @@ config G_DNL_VENDOR_NUM
 config G_DNL_PRODUCT_NUM
 	hex "Product ID of USB device"
 
-config USB_FUNCTION_ROCKUSB
-	bool "Enable USB rockusb gadget"
-	help
-	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
-	  read/write info, image to/from devices. This enables the USB part of
-	  the rockusb gadget.for more detail about Rockusb protocol, please see
-	  doc/README.rockusb
-
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 691f373aeb..7258099c1c 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o
 obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o
 obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o
 obj-$(CONFIG_USB_FUNCTION_FASTBOOT) += f_fastboot.o
-obj-$(CONFIG_USB_FUNCTION_ROCKUSB) += f_rockusb.o
 obj-$(CONFIG_USB_FUNCTION_SDP) += f_sdp.o
 endif
 endif
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
deleted file mode 100644
index d218b6da8f..0000000000
--- a/drivers/usb/gadget/f_rockusb.c
+++ /dev/null
@@ -1,691 +0,0 @@
-/*
- * (C) Copyright 2017
- *
- * Eddie Cai <eddie.cai.linux@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <errno.h>
-#include <malloc.h>
-#include <memalign.h>
-#include <linux/usb/ch9.h>
-#include <linux/usb/gadget.h>
-#include <linux/usb/composite.h>
-#include <linux/compiler.h>
-#include <version.h>
-#include <g_dnl.h>
-#include <asm/arch/f_rockusb.h>
-
-static inline struct f_rockusb *func_to_rockusb(struct usb_function *f)
-{
-	return container_of(f, struct f_rockusb, usb_function);
-}
-
-static struct usb_endpoint_descriptor fs_ep_in = {
-	.bLength            = USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType    = USB_DT_ENDPOINT,
-	.bEndpointAddress   = USB_DIR_IN,
-	.bmAttributes       = USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize     = cpu_to_le16(64),
-};
-
-static struct usb_endpoint_descriptor fs_ep_out = {
-	.bLength		= USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType	= USB_DT_ENDPOINT,
-	.bEndpointAddress	= USB_DIR_OUT,
-	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize		= cpu_to_le16(64),
-};
-
-static struct usb_endpoint_descriptor hs_ep_in = {
-	.bLength		= USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType	= USB_DT_ENDPOINT,
-	.bEndpointAddress	= USB_DIR_IN,
-	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize		= cpu_to_le16(512),
-};
-
-static struct usb_endpoint_descriptor hs_ep_out = {
-	.bLength		= USB_DT_ENDPOINT_SIZE,
-	.bDescriptorType	= USB_DT_ENDPOINT,
-	.bEndpointAddress	= USB_DIR_OUT,
-	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
-	.wMaxPacketSize		= cpu_to_le16(512),
-};
-
-static struct usb_interface_descriptor interface_desc = {
-	.bLength		= USB_DT_INTERFACE_SIZE,
-	.bDescriptorType	= USB_DT_INTERFACE,
-	.bInterfaceNumber	= 0x00,
-	.bAlternateSetting	= 0x00,
-	.bNumEndpoints		= 0x02,
-	.bInterfaceClass	= ROCKUSB_INTERFACE_CLASS,
-	.bInterfaceSubClass	= ROCKUSB_INTERFACE_SUB_CLASS,
-	.bInterfaceProtocol	= ROCKUSB_INTERFACE_PROTOCOL,
-};
-
-static struct usb_descriptor_header *rkusb_fs_function[] = {
-	(struct usb_descriptor_header *)&interface_desc,
-	(struct usb_descriptor_header *)&fs_ep_in,
-	(struct usb_descriptor_header *)&fs_ep_out,
-};
-
-static struct usb_descriptor_header *rkusb_hs_function[] = {
-	(struct usb_descriptor_header *)&interface_desc,
-	(struct usb_descriptor_header *)&hs_ep_in,
-	(struct usb_descriptor_header *)&hs_ep_out,
-	NULL,
-};
-
-static const char rkusb_name[] = "Rockchip Rockusb";
-
-static struct usb_string rkusb_string_defs[] = {
-	[0].s = rkusb_name,
-	{  }			/* end of list */
-};
-
-static struct usb_gadget_strings stringtab_rkusb = {
-	.language	= 0x0409,	/* en-us */
-	.strings	= rkusb_string_defs,
-};
-
-static struct usb_gadget_strings *rkusb_strings[] = {
-	&stringtab_rkusb,
-	NULL,
-};
-
-static struct f_rockusb *rockusb_func;
-static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
-static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size);
-
-struct f_rockusb *get_rkusb(void)
-{
-	struct f_rockusb *f_rkusb = rockusb_func;
-	if (!f_rkusb) {
-		f_rkusb = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*f_rkusb));
-		if (!f_rkusb)
-			return 0;
-
-		rockusb_func = f_rkusb;
-		memset(f_rkusb, 0, sizeof(*f_rkusb));
-	}
-	return f_rkusb;
-}
-
-static struct usb_endpoint_descriptor *rkusb_ep_desc(
-struct usb_gadget *g,
-struct usb_endpoint_descriptor *fs,
-struct usb_endpoint_descriptor *hs)
-{
-	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
-		return hs;
-	return fs;
-}
-
-static void rockusb_complete(struct usb_ep *ep, struct usb_request *req)
-{
-	int status = req->status;
-	if (!status)
-		return;
-	debug("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual);
-}
-
-/* config the rockusb device*/
-static int rockusb_bind(struct usb_configuration *c, struct usb_function *f)
-{
-	int id;
-	struct usb_gadget *gadget = c->cdev->gadget;
-	struct f_rockusb *f_rkusb = func_to_rockusb(f);
-	const char *s;
-
-	id = usb_interface_id(c, f);
-	if (id < 0)
-		return id;
-	interface_desc.bInterfaceNumber = id;
-
-	id = usb_string_id(c->cdev);
-	if (id < 0)
-		return id;
-
-	rkusb_string_defs[0].id = id;
-	interface_desc.iInterface = id;
-
-	f_rkusb->in_ep = usb_ep_autoconfig(gadget, &fs_ep_in);
-	if (!f_rkusb->in_ep)
-		return -ENODEV;
-	f_rkusb->in_ep->driver_data = c->cdev;
-
-	f_rkusb->out_ep = usb_ep_autoconfig(gadget, &fs_ep_out);
-	if (!f_rkusb->out_ep)
-		return -ENODEV;
-	f_rkusb->out_ep->driver_data = c->cdev;
-
-	f->descriptors = rkusb_fs_function;
-
-	if (gadget_is_dualspeed(gadget)) {
-		hs_ep_in.bEndpointAddress = fs_ep_in.bEndpointAddress;
-		hs_ep_out.bEndpointAddress = fs_ep_out.bEndpointAddress;
-		f->hs_descriptors = rkusb_hs_function;
-	}
-
-	s = env_get("serial#");
-	if (s)
-		g_dnl_set_serialnumber((char *)s);
-
-	return 0;
-}
-
-static void rockusb_unbind(struct usb_configuration *c, struct usb_function *f)
-{
-	/* clear the configuration*/
-	memset(rockusb_func, 0, sizeof(*rockusb_func));
-}
-
-static void rockusb_disable(struct usb_function *f)
-{
-	struct f_rockusb *f_rkusb = func_to_rockusb(f);
-
-	usb_ep_disable(f_rkusb->out_ep);
-	usb_ep_disable(f_rkusb->in_ep);
-
-	if (f_rkusb->out_req) {
-		free(f_rkusb->out_req->buf);
-		usb_ep_free_request(f_rkusb->out_ep, f_rkusb->out_req);
-		f_rkusb->out_req = NULL;
-	}
-	if (f_rkusb->in_req) {
-		free(f_rkusb->in_req->buf);
-		usb_ep_free_request(f_rkusb->in_ep, f_rkusb->in_req);
-		f_rkusb->in_req = NULL;
-	}
-}
-
-static struct usb_request *rockusb_start_ep(struct usb_ep *ep)
-{
-	struct usb_request *req;
-
-	req = usb_ep_alloc_request(ep, 0);
-	if (!req)
-		return NULL;
-
-	req->length = EP_BUFFER_SIZE;
-	req->buf = memalign(CONFIG_SYS_CACHELINE_SIZE, EP_BUFFER_SIZE);
-	if (!req->buf) {
-		usb_ep_free_request(ep, req);
-		return NULL;
-	}
-	memset(req->buf, 0, req->length);
-
-	return req;
-}
-
-static int rockusb_set_alt(struct usb_function *f,
-			    unsigned interface, unsigned alt)
-{
-	int ret;
-	struct usb_composite_dev *cdev = f->config->cdev;
-	struct usb_gadget *gadget = cdev->gadget;
-	struct f_rockusb *f_rkusb = func_to_rockusb(f);
-	const struct usb_endpoint_descriptor *d;
-
-	debug("%s: func: %s intf: %d alt: %d\n",
-	      __func__, f->name, interface, alt);
-
-	d = rkusb_ep_desc(gadget, &fs_ep_out, &hs_ep_out);
-	ret = usb_ep_enable(f_rkusb->out_ep, d);
-	if (ret) {
-		printf("failed to enable out ep\n");
-		return ret;
-	}
-
-	f_rkusb->out_req = rockusb_start_ep(f_rkusb->out_ep);
-	if (!f_rkusb->out_req) {
-		printf("failed to alloc out req\n");
-		ret = -EINVAL;
-		goto err;
-	}
-	f_rkusb->out_req->complete = rx_handler_command;
-
-	d = rkusb_ep_desc(gadget, &fs_ep_in, &hs_ep_in);
-	ret = usb_ep_enable(f_rkusb->in_ep, d);
-	if (ret) {
-		printf("failed to enable in ep\n");
-		goto err;
-	}
-
-	f_rkusb->in_req = rockusb_start_ep(f_rkusb->in_ep);
-	if (!f_rkusb->in_req) {
-		printf("failed alloc req in\n");
-		ret = -EINVAL;
-		goto err;
-	}
-	f_rkusb->in_req->complete = rockusb_complete;
-
-	ret = usb_ep_queue(f_rkusb->out_ep, f_rkusb->out_req, 0);
-	if (ret)
-		goto err;
-
-	return 0;
-err:
-	rockusb_disable(f);
-	return ret;
-}
-
-static int rockusb_add(struct usb_configuration *c)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	int status;
-
-	debug("%s: cdev: 0x%p\n", __func__, c->cdev);
-
-	f_rkusb->usb_function.name = "f_rockusb";
-	f_rkusb->usb_function.bind = rockusb_bind;
-	f_rkusb->usb_function.unbind = rockusb_unbind;
-	f_rkusb->usb_function.set_alt = rockusb_set_alt;
-	f_rkusb->usb_function.disable = rockusb_disable;
-	f_rkusb->usb_function.strings = rkusb_strings;
-
-	status = usb_add_function(c, &f_rkusb->usb_function);
-	if (status) {
-		free(f_rkusb);
-		rockusb_func = f_rkusb;
-	}
-	return status;
-}
-
-void rockusb_dev_init(char *dev_type, int dev_index)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	f_rkusb->rockusb_dev_type = dev_type;
-	f_rkusb->rockusb_dev_index = dev_index;
-}
-
-DECLARE_GADGET_BIND_CALLBACK(usb_dnl_rockusb, rockusb_add);
-
-static int rockusb_tx_write(const char *buffer, unsigned int buffer_size)
-{
-	struct usb_request *in_req = rockusb_func->in_req;
-	int ret;
-
-	memcpy(in_req->buf, buffer, buffer_size);
-	in_req->length = buffer_size;
-	usb_ep_dequeue(rockusb_func->in_ep, in_req);
-	ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
-	if (ret)
-		printf("Error %d on queue\n", ret);
-	return 0;
-}
-
-static int rockusb_tx_write_str(const char *buffer)
-{
-	return rockusb_tx_write(buffer, strlen(buffer));
-}
-
-#ifdef DEBUG
-static void printcbw(char *buf)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-
-	memcpy((char *)cbw, buf, USB_BULK_CB_WRAP_LEN);
-
-	debug("cbw: signature:%x\n", cbw->signature);
-	debug("cbw: tag=%x\n", cbw->tag);
-	debug("cbw: data_transfer_length=%d\n", cbw->data_transfer_length);
-	debug("cbw: flags=%x\n", cbw->flags);
-	debug("cbw: lun=%d\n", cbw->lun);
-	debug("cbw: length=%d\n", cbw->length);
-	debug("cbw: ucOperCode=%x\n", cbw->CDB[0]);
-	debug("cbw: ucReserved=%x\n", cbw->CDB[1]);
-	debug("cbw: dwAddress:%x %x %x %x\n", cbw->CDB[5], cbw->CDB[4],
-	      cbw->CDB[3], cbw->CDB[2]);
-	debug("cbw: ucReserved2=%x\n", cbw->CDB[6]);
-	debug("cbw: uslength:%x %x\n", cbw->CDB[8], cbw->CDB[7]);
-}
-
-static void printcsw(char *buf)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
-				 sizeof(struct bulk_cs_wrap));
-	memcpy((char *)csw, buf, USB_BULK_CS_WRAP_LEN);
-	debug("csw: signature:%x\n", csw->signature);
-	debug("csw: tag:%x\n", csw->tag);
-	debug("csw: residue:%x\n", csw->residue);
-	debug("csw: status:%x\n", csw->status);
-}
-#endif
-
-static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
-				 sizeof(struct bulk_cs_wrap));
-	csw->signature = cpu_to_le32(USB_BULK_CS_SIG);
-	csw->tag = tag;
-	csw->residue = cpu_to_be32(residue);
-	csw->status = status;
-#ifdef DEBUG
-	printcsw((char *)&csw);
-#endif
-	return rockusb_tx_write((char *)csw, size);
-}
-
-static unsigned int rx_bytes_expected(struct usb_ep *ep)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	int rx_remain = f_rkusb->download_size - f_rkusb->download_bytes;
-	unsigned int rem;
-	unsigned int maxpacket = ep->maxpacket;
-
-	if (rx_remain <= 0)
-		return 0;
-	else if (rx_remain > EP_BUFFER_SIZE)
-		return EP_BUFFER_SIZE;
-
-	rem = rx_remain % maxpacket;
-	if (rem > 0)
-		rx_remain = rx_remain + (maxpacket - rem);
-
-	return rx_remain;
-}
-
-/* usb_request complete call back to handle down load image */
-static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-	unsigned int transfer_size = 0;
-	const unsigned char *buffer = req->buf;
-	unsigned int buffer_size = req->actual;
-
-	transfer_size = f_rkusb->download_size - f_rkusb->download_bytes;
-	if (!f_rkusb->download_desc) {
-		printf("rx_handler_dl_image blk_get_dev\n");
-		f_rkusb->download_desc = blk_get_dev(f_rkusb->rockusb_dev_type,
-				f_rkusb->rockusb_dev_index);
-		if (!f_rkusb->download_desc ||
-		    f_rkusb->download_desc->type == DEV_TYPE_UNKNOWN) {
-			error("invalid mmc device\n");
-			rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_FAIL,
-					     USB_BULK_CS_WRAP_LEN);
-			return;
-		}
-	}
-
-	if (req->status != 0) {
-		printf("Bad status: %d\n", req->status);
-		rockusb_tx_write_csw(f_rkusb->download_tag, 0,
-				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-		return;
-	}
-
-	if (buffer_size < transfer_size)
-		transfer_size = buffer_size;
-
-	memcpy((void *)CONFIG_ROCKUSB_BUF_ADDR + f_rkusb->download_bytes,
-	       buffer, transfer_size);
-	f_rkusb->download_bytes += transfer_size;
-
-	/* Check if transfer is done */
-	if (f_rkusb->download_bytes >= f_rkusb->download_size) {
-		int blks = 0, blkcnt = f_rkusb->download_size/512;
-		debug("download %d bytes finished, start writing to lba %x\n",
-		       f_rkusb->download_bytes, f_rkusb->download_lba);
-		blks = blk_dwrite(f_rkusb->download_desc,
-				  f_rkusb->download_lba, blkcnt,
-					(char *)CONFIG_ROCKUSB_BUF_ADDR);
-		if (blks != blkcnt) {
-			error("failed writing to device %s: %d\n",
-			      f_rkusb->rockusb_dev_type,
-			      f_rkusb->rockusb_dev_index);
-			rockusb_tx_write_csw(f_rkusb->download_tag, 0,
-					     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-			return;
-		}
-
-		req->complete = rx_handler_command;
-		req->length = EP_BUFFER_SIZE;
-		f_rkusb->download_size = 0;
-		debug("done\n");
-		rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_GOOD,
-				     USB_BULK_CS_WRAP_LEN);
-	} else {
-		req->length = rx_bytes_expected(ep);
-	}
-
-	req->actual = 0;
-	usb_ep_queue(ep, req, 0);
-}
-
-static void cb_test_unit_ready(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-
-	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
-			     CSW_GOOD, USB_BULK_CS_WRAP_LEN);
-}
-
-static void cb_read_storage_id(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	char emmc_id[] = "EMMC ";
-
-	printf("cb_read_storage_id\n");
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	rockusb_tx_write_str(emmc_id);
-	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
-			     USB_BULK_CS_WRAP_LEN);
-}
-
-static void cb_write_lba(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	int sector_count;
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	sector_count = (int)get_unaligned_be16(&cbw->CDB[7]);
-	f_rkusb->download_lba = get_unaligned_be32(&cbw->CDB[2]);
-	f_rkusb->download_size = sector_count * 512;
-	f_rkusb->download_bytes = 0;
-	f_rkusb->download_tag = cbw->tag;
-	if ((0 == f_rkusb->download_size) ||
-	    (f_rkusb->download_size > CONFIG_ROCKUSB_BUF_SIZE)) {
-		rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
-				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-	} else {
-		req->complete = rx_handler_dl_image;
-		req->length = rx_bytes_expected(ep);
-	}
-}
-
-int __weak rkusb_set_reboot_flag(int flag)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	printf("rkusb_set_reboot_flag: %d\n", f_rkusb->reboot_flag);
-	return -ENOSYS;
-}
-
-static void compl_do_reset(struct usb_ep *ep, struct usb_request *req)
-{
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	rkusb_set_reboot_flag(f_rkusb->reboot_flag);
-	do_reset(NULL, 0, 0, NULL);
-}
-
-static void cb_reboot(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	struct f_rockusb *f_rkusb = get_rkusb();
-
-	f_rkusb->reboot_flag = 0;
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	f_rkusb->reboot_flag = cbw->CDB[1];
-	rockusb_func->in_req->complete = compl_do_reset;
-	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
-			     USB_BULK_CS_WRAP_LEN);
-}
-
-static void cb_not_support(struct usb_ep *ep, struct usb_request *req)
-{
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-	printf("Rockusb command %x not support yet\n", cbw->CDB[0]);
-	rockusb_tx_write_csw(cbw->tag, 0, CSW_FAIL, USB_BULK_CS_WRAP_LEN);
-}
-
-static const struct cmd_dispatch_info cmd_dispatch_info[] = {
-	{
-		.cmd = K_FW_TEST_UNIT_READY,
-		.cb = cb_test_unit_ready,
-	},
-	{
-		.cmd = K_FW_READ_FLASH_ID,
-		.cb = cb_read_storage_id,
-	},
-	{
-		.cmd = K_FW_SET_DEVICE_ID,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_TEST_BAD_BLOCK,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_WRITE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_ERASE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_WRITE_SPARE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_READ_SPARE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_ERASE_10_FORCE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_GET_VERSION,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_LBA_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_LBA_WRITE_10,
-		.cb = cb_write_lba,
-	},
-	{
-		.cmd = K_FW_ERASE_SYS_DISK,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SDRAM_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SDRAM_WRITE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SDRAM_EXECUTE,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_READ_FLASH_INFO,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_GET_CHIP_VER,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_LOW_FORMAT,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SET_RESET_FLAG,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SPI_READ_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SPI_WRITE_10,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_SESSION,
-		.cb = cb_not_support,
-	},
-	{
-		.cmd = K_FW_RESET,
-		.cb = cb_reboot,
-	},
-};
-
-static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
-{
-	void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL;
-	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
-				 sizeof(struct fsg_bulk_cb_wrap));
-	char *cmdbuf = req->buf;
-	int i;
-
-	if (req->status || req->length == 0)
-		return;
-
-	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
-#ifdef DEBUG
-	printcbw(req->buf);
-#endif
-
-	for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) {
-		if (cmd_dispatch_info[i].cmd == cbw->CDB[0]) {
-			func_cb = cmd_dispatch_info[i].cb;
-			break;
-		}
-	}
-
-	if (!func_cb) {
-		error("unknown command: %s", (char *)req->buf);
-		rockusb_tx_write_str("FAILunknown command");
-	} else {
-		if (req->actual < req->length) {
-			u8 *buf = (u8 *)req->buf;
-			buf[req->actual] = 0;
-			func_cb(ep, req);
-		} else {
-			error("buffer overflow");
-			rockusb_tx_write_str("FAILbuffer overflow");
-		}
-	}
-
-	*cmdbuf = '\0';
-	req->actual = 0;
-	usb_ep_queue(ep, req, 0);
-}

commit 08af5e362f4275b15f5deeff47fae8ef828629fc
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 27 17:35:04 2017 +0800

    rockchip: test: support ir test
    
    Change-Id: I066eeca4fb7e2971ceee8419cbc2b8d00821397f
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index d616a2f570..e0c18d728b 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -10,3 +10,4 @@ obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
 obj-y += test-rknand.o
+obj-$(CONFIG_RK_IR) += test-ir.o
diff --git a/test/rockchip/test-ir.c b/test/rockchip/test-ir.c
new file mode 100644
index 0000000000..e84bad8732
--- /dev/null
+++ b/test/rockchip/test-ir.c
@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <linux/input.h>
+#include <rc.h>
+
+#include "test-rockchip.h"
+
+static int ir_test(void)
+{
+	int ret;
+	ulong start;
+	int last_keycode, last_repeat;
+	int keycode, repeat;
+	struct udevice *dev;
+
+	printf("\nYou have 30s to test ir, press them, start!\n");
+
+	ret = uclass_get_device(UCLASS_RC, 0, &dev);
+	if (ret) {
+		printf("get rc device failed: %d\n", ret);
+		goto out;
+	}
+
+	keycode = rc_get_keycode(dev);
+	if (keycode == -ENOSYS) {
+		printf("ir_test: failed to bind driver\n");
+		goto out;
+	}
+
+	last_keycode = KEY_RESERVED;
+	last_repeat = KEY_RESERVED;
+	start = get_timer(0);
+	while (get_timer(start) <= 30000) {
+		mdelay(100);
+
+		keycode = rc_get_keycode(dev);
+		repeat = rc_get_repeat(dev);
+		if (keycode == KEY_RESERVED)
+			continue;
+
+		if (keycode != last_keycode || repeat != last_repeat) {
+			printf("ir_test: press key:0x%x repeat:%d\n",
+			       keycode, repeat);
+			last_keycode = keycode;
+			last_repeat = repeat;
+		}
+	}
+
+	return 0;
+
+out:
+	return -EINVAL;
+}
+
+int board_ir_test(int argc, char * const argv[])
+{
+	return ir_test();
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 2d862501b8..f9310b46f7 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -19,6 +19,9 @@ static board_module_t g_board_modules[] = {
 	{ .name = "emmc",	.test = board_emmc_test },
 	{ .name = "regulator",	.test = board_regulator_test },
 	{ .name = "rknand",	.test = board_rknand_test },
+#if defined(CONFIG_RK_IR)
+	{ .name = "ir",		.test = board_ir_test },
+#endif
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index ed95353391..5287b2d35f 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -13,4 +13,8 @@ int board_emmc_test(int argc, char * const argv[]);
 int board_regulator_test(int argc, char * const argv[]);
 int board_rknand_test(int argc, char * const argv[]);
 
+#if defined(CONFIG_RK_IR)
+int board_ir_test(int argc, char * const argv[]);
+#endif
+
 #endif /* _TEST_ROCKCHIP_H */

commit 5c0bf2193c3deb8a9b4ceb5dc2fbf76dd0828156
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 15:42:22 2017 +0800

    rockchip: config: use common CONFIG_ENV_SIZE for all SoCs
    
    All Rockchip SoCs use 32KB as CONFIG_ENV_SIZE.
    
    Change-Id: I4e7bb94be70ece871fa339feb90a591f889e833d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index b0efb47802..129b4a53ba 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -11,8 +11,6 @@
 
 
 /* Store env in emmc */
-#undef CONFIG_ENV_SIZE
-#define CONFIG_ENV_SIZE                 (32 << 10)
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_SYS_MMC_ENV_PART         0
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h
index 36009b8599..d2d630d610 100644
--- a/include/configs/kylin_rk3036.h
+++ b/include/configs/kylin_rk3036.h
@@ -13,8 +13,6 @@
 #ifndef CONFIG_SPL_BUILD
 
 /* Store env in emmc */
-#undef CONFIG_ENV_SIZE
-#define CONFIG_ENV_SIZE			SZ_32K
 #define CONFIG_SYS_MMC_ENV_DEV		0 /* emmc */
 #define CONFIG_SYS_MMC_ENV_PART		0 /* user area */
 
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index 9ac0df57de..4ed8f5a6c7 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -10,7 +10,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 1fbcd4b629..ade2594f1e 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -9,7 +9,6 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index 5e462346be..cfa5364710 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -14,7 +14,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 432a1c2a24..62cb1b557f 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -10,7 +10,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/*  64M */
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index 3ec97817eb..707febecbb 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index e87985c54c..f8884c9511 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -9,7 +9,6 @@
 
 #include "rockchip-common.h"
 
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 377d1fc769..9873131be8 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -10,7 +10,6 @@
 #include "rockchip-common.h"
 
 #define CONFIG_NR_DRAM_BANKS		1
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index 80fc9278d5..bcb1a91b8e 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -50,6 +50,7 @@
  * Rockchip SoCs use fixed ENV 32KB@(4MB-32KB)
  */
 #define CONFIG_ENV_OFFSET	(SZ_4M - SZ_32K)
+#define CONFIG_ENV_SIZE		SZ_32K
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 5ee45594a3..549839d4d6 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -9,7 +9,6 @@
 #include <asm/arch/hardware.h>
 #include "rockchip-common.h"
 
-#define CONFIG_ENV_SIZE			0x2000
 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SKIP_LOWLEVEL_INIT

commit 60cc9f538b03e5c1dc1163192d338a8f78e44141
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 15:35:24 2017 +0800

    rockchip: config: sync the ENV offset from rockchip legacy U-Boot
    
    Using the ENV offset from rockchip legacy U-Boot for all SoCs,
    the offset is 4MB-32KB
    
    Change-Id: Ic63d24c2089ff325df312759a78cbea20097b1a5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index b3986c28af..80fc9278d5 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -46,19 +46,10 @@
 
 #endif
 
-#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
-/* SPL @ 32k for 34k
- * u-boot directly after @ 68k for 400k or so
- * ENV @ 992k
- */
-#define CONFIG_ENV_OFFSET ((1024-32) * 1024)
-#else
-/* SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
+/*
+ * Rockchip SoCs use fixed ENV 32KB@(4MB-32KB)
  */
-#define CONFIG_ENV_OFFSET (96 * 1024)
-#endif
+#define CONFIG_ENV_OFFSET	(SZ_4M - SZ_32K)
 
 #define CONFIG_DISPLAY_BOARDINFO_LATE
 

commit 6b22cb8c04b4a91be97bf05796146ec7889a5d73
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 31 15:29:57 2017 +0800

    rockchip: remove separate define for CONFIG_ENV_OFFSET
    
    All Rockchip SoC use CONFIG_ENV_OFFSET defined in rockchip_common.h
    
    Change-Id: I3bfcdb78df3ba487b1e99fba83343afd57be0755
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index 1c131760f0..69e300605f 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -14,13 +14,7 @@
 #define CONFIG_BMP_32BPP
 
 #define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 1
-/*
- * SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdout=serial,vidconsole\0" \
diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 8ae1c4ee32..9e2c2e5c13 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -11,13 +11,6 @@
 
 #define CONFIG_MMC_SDHCI_SDMA
 #define CONFIG_SYS_MMC_ENV_DEV 0
-/*
- * SPL @ 32k for ~128k
- * ENV @ 240k
- * u-boot @ 256K
- */
-#undef CONFIG_ENV_OFFSET
-#define CONFIG_ENV_OFFSET (240 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 #define CONFIG_MISC_INIT_R
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index 7fe47e0d84..cfc31f4e77 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -9,14 +9,6 @@
 
 #include <configs/rk3399_common.h>
 
-/*
- * SPL @ 32kB for ~130kB
- * ENV @ 240KB for 8kB
- * FIT payload (ATF, U-Boot, FDT) @ 256kB
- */
-#undef CONFIG_ENV_OFFSET
-#define CONFIG_ENV_OFFSET (240 * 1024)
-
 #define CONFIG_SYS_MMC_ENV_DEV 1
 
 #define SDRAM_BANK_SIZE			(2UL << 30)

commit e131d8225b47db0c603433887da686a9f4803696
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 26 14:43:53 2017 +0800

    rockchip: evb-rk3328: remove CONFIG_ENV_OFFSET
    
    Remove CONFIG_ENV_OFFSET for there already have one in rockchip_common.h
    
    Change-Id: I2cbc1e94ea0ddb3923b019ed1e2337877eb59222
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index c792ce55c1..93b18b8c46 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -10,12 +10,6 @@
 #include <configs/rk3328_common.h>
 
 #define CONFIG_SYS_MMC_ENV_DEV 1
-/*
- * SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
- */
-#define CONFIG_ENV_OFFSET (96 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit 49c4b9c1c085023918d689327dee14c3f88556ec
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 17:45:57 2017 +0800

    video: drm: add backlight disable
    
    Change-Id: Ie3b5b3cb303ca1f9733fe7e17a6e71472b84c0e0
    signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 273009d732..eda3493c3c 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -88,20 +88,28 @@ static int panel_simple_enable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
+	int ret;
 
-	if (panel->backlight)
-		backlight_enable(panel->backlight);
-
-	mdelay(panel->delay_enable);
+	if (panel->backlight) {
+		ret = backlight_enable(panel->backlight);
+		mdelay(panel->delay_enable);
+		return ret;
+	}
 
 	return 0;
 }
 
 static int panel_simple_disable(struct display_state *state)
 {
-	/* TODO: backlight_disable:
-	 * presently uboot not support backlight disable.
-	 */
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+	int ret;
+
+	if (panel->backlight) {
+		ret = backlight_disable(panel->backlight);
+		mdelay(panel->delay_disable);
+		return ret;
+	}
 
 	return 0;
 }
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
index e96e58e4a9..c1d4128eaf 100644
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -226,20 +226,28 @@ static int rockchip_dsi_panel_enable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
 
-	msleep(panel->delay_enable);
+	if (panel->backlight) {
+		ret = backlight_enable(panel->backlight);
+		mdelay(panel->delay_enable);
+		return ret;
+	}
 
-	return backlight_enable(panel->backlight);
+	return 0;
 }
 
 static int rockchip_dsi_panel_disable(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
 
-	/* TODO: backlight_disable:
-	 * presently uboot not support backlight disable.
-	 */
+	if (panel->backlight) {
+		ret = backlight_disable(panel->backlight);
+		mdelay(panel->delay_disable);
+		return ret;
+	}
 
 	return 0;
 }

commit 2727548dfd307916262383321fb4bb7a6edf643f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 31 15:43:39 2017 +0800

    ARM: dts: rk3126-evb: add power-supply phandle for backlight
    
    power-supply property is necessary for backlight.
    
    Change-Id: Ie59b8648da060acc89a41ad4194d642054b38e40
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index b6370a8d66..5c3eb378e9 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -38,6 +38,14 @@
 		regulator-always-on;
 	};
 
+	vcc_backlight: vcc-backlight {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_backlight";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
 	backlight: backlight {
 		compatible = "pwm-backlight";
 		brightness-levels = <
@@ -76,6 +84,7 @@
 		default-brightness-level = <128>;
 		pwms = <&pwm0 0 1000000 1>;
 		enable-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
+		power-supply = <&vcc_backlight>;
 		status = "okay";
 	};
 

commit 55519f246506ad5302e3b85a3b12d468116d4c99
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 17:44:39 2017 +0800

    video: pwm backlight: add backlight_disable() implement
    
    Change-Id: Ib574feedf431e34e5da49aae24a7ae0361945ac9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index fbd7bf7838..5f7ea88db8 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -58,6 +58,40 @@ static int pwm_backlight_enable(struct udevice *dev)
 	return 0;
 }
 
+static int pwm_backlight_disable(struct udevice *dev)
+{
+	struct pwm_backlight_priv *priv = dev_get_priv(dev);
+	struct dm_regulator_uclass_platdata *plat;
+	uint duty_cycle;
+	int ret;
+
+	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
+		(priv->max_level - priv->min_level + 1);
+	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
+			     duty_cycle);
+	if (ret)
+		return ret;
+
+	ret = pwm_set_enable(priv->pwm, priv->channel, false);
+	if (ret)
+		return ret;
+
+	mdelay(10);
+	dm_gpio_set_value(&priv->enable, 0);
+
+	plat = dev_get_uclass_platdata(priv->reg);
+	printf("%s: Disable '%s', regulator '%s'/'%s'\n", __func__, dev->name,
+	      priv->reg->name, plat->name);
+	ret = regulator_set_enable(priv->reg, false);
+	if (ret) {
+		debug("%s: Cannot enable regulator for PWM '%s'\n", __func__,
+		      dev->name);
+	}
+	mdelay(120);
+
+	return 0;
+}
+
 static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
 {
 	struct pwm_backlight_priv *priv = dev_get_priv(dev);
@@ -118,6 +152,7 @@ static int pwm_backlight_probe(struct udevice *dev)
 
 static const struct backlight_ops pwm_backlight_ops = {
 	.enable	= pwm_backlight_enable,
+	.disable = pwm_backlight_disable,
 };
 
 static const struct udevice_id pwm_backlight_ids[] = {

commit 91d246a3ae4b1c47c3f8343566e2b57b276dd8ed
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 17:44:02 2017 +0800

    dm: backlight: add backlight_disable() interface
    
    Change-Id: I3b3d1e961b31ac0d4e4bf4656da1ae063e3b5a72
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/backlight-uclass.c b/drivers/video/backlight-uclass.c
index 0238289d1b..d7041227d8 100644
--- a/drivers/video/backlight-uclass.c
+++ b/drivers/video/backlight-uclass.c
@@ -19,6 +19,16 @@ int backlight_enable(struct udevice *dev)
 	return ops->enable(dev);
 }
 
+int backlight_disable(struct udevice *dev)
+{
+	const struct backlight_ops *ops = backlight_get_ops(dev);
+
+	if (!ops->disable)
+		return -ENOSYS;
+
+	return ops->disable(dev);
+}
+
 UCLASS_DRIVER(backlight) = {
 	.id		= UCLASS_PANEL_BACKLIGHT,
 	.name		= "backlight",
diff --git a/include/backlight.h b/include/backlight.h
index 90e1d981e1..c3e1a9d194 100644
--- a/include/backlight.h
+++ b/include/backlight.h
@@ -16,6 +16,14 @@ struct backlight_ops {
 	 * @return 0 if OK, -ve on error
 	 */
 	int (*enable)(struct udevice *dev);
+
+	/**
+	 * disable() - Disable a backlight
+	 *
+	 * @dev:	Backlight device to disable
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*disable)(struct udevice *dev);
 };
 
 #define backlight_get_ops(dev)	((struct backlight_ops *)(dev)->driver->ops)
@@ -28,4 +36,12 @@ struct backlight_ops {
  */
 int backlight_enable(struct udevice *dev);
 
+/**
+ * backlight_disable() - Disable a backlight
+ *
+ * @dev:	Backlight device to disable
+ * @return 0 if OK, -ve on error
+ */
+int backlight_disable(struct udevice *dev);
+
 #endif

commit 282d550a6124cdbd583691ba2ca6628f18575d40
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 11:14:50 2017 +0800

    power: pmic: rk8xx: add pmic_shutdown() implement
    
    Change-Id: Ib6f175e5b38f54fc41c608ee40166a0875989f3b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 4d8149849c..0f7771f7b3 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -65,6 +65,44 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
 	return 0;
 }
 
+static int rk8xx_shutdown(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev);
+	u8 val, dev_off;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK808_ID:
+		dev_off = BIT(3);
+		break;
+	case RK805_ID:
+	case RK816_ID:
+	case RK818_ID:
+		dev_off = BIT(0);
+		break;
+	default:
+		printf("Unknown PMIC: RK%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	ret = dm_i2c_read(dev, REG_DEVCTRL, &val, 1);
+	if (ret) {
+		printf("read error from device: %p register: %#x!",
+		       dev, REG_DEVCTRL);
+		return ret;
+	}
+
+	val |= dev_off;
+	ret = dm_i2c_write(dev, REG_DEVCTRL, &val, 1);
+	if (ret) {
+		printf("write error to device: %p register: %#x!",
+		       dev, REG_DEVCTRL);
+		return ret;
+	}
+
+	return 0;
+}
+
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 static int rk8xx_bind(struct udevice *dev)
 {
@@ -115,6 +153,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 	.reg_count = rk8xx_reg_count,
 	.read = rk8xx_read,
 	.write = rk8xx_write,
+	.shutdown = rk8xx_shutdown,
 };
 
 static const struct udevice_id rk8xx_ids[] = {

commit c8d15c437519477dbcc2c5e909619aed3ae9df30
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 30 11:13:46 2017 +0800

    dm: pmic: add pmic_shutdown() interface
    
    Change-Id: I9bed8de6d3733ab90175f26f68160ddd8f12e295
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 953bbe5026..9b8d8571e2 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -163,6 +163,17 @@ int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set)
 	return pmic_reg_write(dev, reg, byte);
 }
 
+
+int pmic_shutdown(struct udevice *dev)
+{
+	const struct dm_pmic_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->shutdown)
+		return -ENOSYS;
+
+	return ops->shutdown(dev);
+}
+
 UCLASS_DRIVER(pmic) = {
 	.id		= UCLASS_PMIC,
 	.name		= "pmic",
diff --git a/include/power/pmic.h b/include/power/pmic.h
index 4b34316427..980fd3e67d 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -164,6 +164,7 @@ struct dm_pmic_ops {
 	int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
 	int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
 		     int len);
+	int (*shutdown)(struct udevice *dev);
 };
 
 /**
@@ -297,6 +298,14 @@ int pmic_reg_write(struct udevice *dev, uint reg, uint value);
  */
 int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
 
+/**
+ * pmic_shutdown() - power off supplies of PMIC
+ *
+ * @dev:	PMIC device to update
+ * @return 0 on success or negative value of errno.
+ */
+int pmic_shutdown(struct udevice *dev);
+
 #endif /* CONFIG_DM_PMIC */
 
 #ifdef CONFIG_POWER

commit 0849a734fefefb7ef04fbf5c55a11d301bfc9653
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:48:27 2017 +0800

    video: lvds: fix iomux setting error
    
    1. GPIO2_B2 is LCD_EN;
    2. GPIO2_B1 is SPK_CTL;
    3. GPIO2_C5, GPIO2_C4 are I2C2.
    
    Change-Id: Ic3b0ffce0cd15caaffe5ed9994b41f8d0a580d26
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 01282829c3..48cb756f13 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -244,9 +244,8 @@ static void rk3126_output_ttl(struct display_state *state)
 	u32 val = 0;
 
 	/* iomux to lcdc */
-	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
+	writel(0xffc35541, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
 	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2C_IOMUX);
-	writel(0x00ff0055, lvds->grf + RK3126_GRF_GPIO2C_IOMUX2);
 	writel(0x700c1004, lvds->grf + RK3126_GRF_GPIO2D_IOMUX);
 
 	/* enable lvds mode */

commit 9c4c00b2b43aac73b856458c892457e6406206d4
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:47:06 2017 +0800

    phy: rockchip-inno-usb2: use debug for charger info output
    
    Change-Id: Ib204ef3dab245ce312eb07e7d75bce6ca5241320
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index e071ff80a9..168f2da817 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -394,7 +394,7 @@ int rockchip_chg_get_type(void)
 		chg_type = POWER_SUPPLY_TYPE_USB_CDP;
 
 out:
-	printf("charger is %s\n", chg_to_string(chg_type));
+	debug("charger is %s\n", chg_to_string(chg_type));
 
 	return chg_type;
 }

commit f8a3e58740b95bc1af6a489690ce031087ee4cb7
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:45:11 2017 +0800

    include: add video_rockchip.h
    
    export interfaces for other driver.
    
    Change-Id: Iaad51ec77a4427ff94d45d2ae32fff8060d72f7b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index 6a4cdd55f7..1c1c2e10a6 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -16,6 +16,7 @@
 #include <linux/media-bus-format.h>
 #include <malloc.h>
 #include <video.h>
+#include <video_rockchip.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
 #include <asm/arch-rockchip/resource_img.h>
diff --git a/include/video_rockchip.h b/include/video_rockchip.h
new file mode 100644
index 0000000000..4538e54463
--- /dev/null
+++ b/include/video_rockchip.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef VIDEO_ROCKCHIP_H
+#define VIDEO_ROCKCHIP_H
+
+void rockchip_show_bmp(const char *bmp);
+void rockchip_show_logo(void);
+
+#endif

commit 65543e0cc15db3d1c7a4bafd656ce7f6ffeda96e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:43:22 2017 +0800

    dm: fuel gauge: fix typo of uclass driver name
    
    Change-Id: Ib58046d6f7e148ea747f49509b69e44bac806ca1
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
index a1c4f65854..9b6720eb5b 100644
--- a/drivers/power/fuel_gauge/fuel_gauge_uclass.c
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -40,7 +40,7 @@ bool fuel_gauge_get_chrg_online(struct udevice *dev)
 	return ops->get_chrg_online(dev);
 }
 
-UCLASS_DRIVER(fuelxguage) = {
+UCLASS_DRIVER(fuel_guage) = {
 	.id		= UCLASS_FG,
 	.name		= "fuel_gauge",
 };

commit 9745ade23b1aed7e425e34635081c01bbecbab35
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:42:39 2017 +0800

    input: rk8xx pwrkey: add some optimization
    
    1. add key name and type;
    2. clear both fall and rise interrupt when detect rise.
    
    Change-Id: I0698f3decc4b92cf32ce564a1827eedb5ee19a01
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
index 530a57370b..cabdd3ce2c 100644
--- a/drivers/input/rk8xx_pwrkey.c
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <key.h>
+#include <linux/input.h>
 #include <power/pmic.h>
 #include <power/rk8xx_pmic.h>
 
@@ -39,23 +40,14 @@ static int rk8xx_pwrkey_read(struct udevice *dev)
 		return val;
 	}
 
-	if (val & key->pwron_fall_int) {
-		/* Clear rise when detect fall */
-		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-				     key->pwron_rise_int);
-		if (ret < 0) {
-			printf("%s: i2c write failed, ret=%d\n", __func__, val);
-			return ret;
-		}
-
+	if (val & key->pwron_fall_int)
 		status = KEY_PRESS_DOWN;
-	}
 
 	/* Must check pwron rise behind of fall !! */
 	if (val & key->pwron_rise_int) {
 		/* Clear fall when detect rise */
 		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
-				     key->pwron_fall_int);
+				     key->pwron_fall_int | key->pwron_rise_int);
 		if (ret < 0) {
 			printf("%s: i2c write failed, ret=%d\n", __func__, val);
 			return ret;
@@ -64,10 +56,16 @@ static int rk8xx_pwrkey_read(struct udevice *dev)
 		status = KEY_PRESS_UP;
 	}
 
+	debug("%s: int sts = 0x%x msk = 0x%x\n",
+	      __func__, pmic_reg_read(dev->parent, key->int_sts_reg),
+	      pmic_reg_read(dev->parent, key->int_msk_reg));
+
 	return status;
 }
 
 static const struct dm_key_ops key_ops = {
+	.type = KEY_POWER,
+	.name = "pmic-pwrkey",
 	.read = rk8xx_pwrkey_read,
 };
 
@@ -111,6 +109,7 @@ static int rk8xx_pwrkey_probe(struct udevice *dev)
 	}
 
 	/* enable fall and rise interrupt */
+	val = 0xff;
 	val &= ~(key->pwron_rise_int | key->pwron_fall_int);
 	ret = pmic_reg_write(dev->parent, key->int_msk_reg, val);
 	if (ret < 0) {

commit 6e14addfbc2a739744a5de1c76dfc07172824175
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:42:18 2017 +0800

    dm: key: add key type and key name interface
    
    Change-Id: Ifd054c609d92557b15acb8e53580dddd72325ff8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
index 0d38fbda81..6abd1cf3c0 100644
--- a/drivers/input/key-uclass.c
+++ b/drivers/input/key-uclass.c
@@ -17,6 +17,26 @@ int key_read(struct udevice *dev)
 	return ops->read(dev);
 }
 
+int key_type(struct udevice *dev)
+{
+	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->type)
+		return -ENOSYS;
+
+	return ops->type;
+}
+
+const char *key_name(struct udevice *dev)
+{
+	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->name)
+		return NULL;
+
+	return ops->name;
+}
+
 UCLASS_DRIVER(key) = {
 	.id		= UCLASS_KEY,
 	.name		= "key",
diff --git a/include/key.h b/include/key.h
index 56ae16681f..16bf4cac5b 100644
--- a/include/key.h
+++ b/include/key.h
@@ -14,9 +14,13 @@ enum key_state {
 };
 
 struct dm_key_ops {
+	int type;
+	const char *name;
 	int (*read)(struct udevice *dev);
 };
 
 int key_read(struct udevice *dev);
+int key_type(struct udevice *dev);
+const char *key_label(struct udevice *dev);
 
 #endif

commit f1f9ed82326366dc75c1655650a2f49d8437e869
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:31:19 2017 +0800

    configs: evb-rk3126: enable CONFIG_TEST_ROCKCHIP
    
    Change-Id: If12acf51b7a166ebab86f2fe76e5a10d21e48ab9
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index b9d5c53940..bb2c7bcbb7 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -68,3 +68,4 @@ CONFIG_DRM_ROCKCHIP_LVDS=y
 CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_TEST_ROCKCHIP=y

commit 9dd6ea8e8e8c6e9bd99b81fc7d867fe75e56a48c
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Oct 27 17:29:31 2017 +0800

    test: fix test-rknand.c compile error
    
    Change-Id: Ib3ad1f217c004f56790691128f739a95feaf2349
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index c104de6fc7..d616a2f570 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -9,4 +9,4 @@ obj-y += test-timer.o
 obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
-obj-y += test-rknand.c
\ No newline at end of file
+obj-y += test-rknand.o

commit 57cf0cf16e2e1223257abb97f7d8106205c0a079
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Oct 25 11:45:29 2017 +0800

    rockchip: rk3328: fix rockchip_get_cru api
    
    The API for get priv pointer is wrong, fix it.
    
    Change-Id: I78be059363f25d6202ff7c60f1e076bfe8b2e4fb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
index 4dcac27cc7..013d777a02 100644
--- a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
@@ -25,7 +25,7 @@ void *rockchip_get_cru(void)
 	if (ret)
 		return ERR_PTR(ret);
 
-	priv = devfdt_get_addr_ptr(dev);
+	priv = dev_get_priv(dev);
 
 	return priv->cru;
 }

commit 4723704fa3eb5aeaa0f759c3b068e56bc4b2607f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Oct 12 09:43:57 2017 +0800

    rockchip: rk3399-evb: update defconfig
    
    Change-Id: If6b0fc9a64f23e2fcbd1e016d90574674e34dc08
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 770c9287fb..1c337fdc15 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -9,21 +9,28 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_SPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
@@ -34,7 +41,10 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
@@ -62,7 +72,14 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
@@ -71,31 +88,8 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DUALSPEED=y
-CONFIG_USB_GADGET_VBUS_DRAW=0
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GADGET=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Rockchip"
-CONFIG_G_DNL_VENDOR_NUM=0x2207
-CONFIG_G_DNL_PRODUCT_NUM=0x330a
-CONFIG_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
-CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x08000000
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_LCD=y
-CONFIG_VIDEO=y
-CONFIG_CONSOLE_NORMAL=y
-CONFIG_CMD_BMP=y
 CONFIG_DRM_ROCKCHIP=y
-CONFIG_DRM_ROCKCHIP_VOP=y
 CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
-CONFIG_DRM_ROCKCHIP_PANEL=y
-CONFIG_DRM_ROCKCHIP_MIPI_DSI=y
+CONFIG_LCD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 711f6f4020cfdb3fe30ce45d393872ce5ccb9b60
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 14:42:06 2017 +0800

    rockchip: dts: rk322x: add ir device node
    
    Change-Id: I2c8838f542cff65fbbbb2cefa2320baef4684dd2
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index fe4abe9d6c..66619689a6 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk322x.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3229 Evaluation board";
@@ -90,3 +91,102 @@
 &usb20_otg {
        status = "okay";
 };
+
+&pwm3 {
+	status = "okay";
+	compatible = "rockchip,remotectl-pwm";
+
+	ir_key1 {
+		rockchip,usercode = <0x4040>;
+		rockchip,key_table =
+			<0xf2	KEY_REPLY>,
+			<0xba	KEY_BACK>,
+			<0xf4	KEY_UP>,
+			<0xf1	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xee	KEY_RIGHT>,
+			<0xbd	KEY_HOME>,
+			<0xea	KEY_VOLUMEUP>,
+			<0xe3	KEY_VOLUMEDOWN>,
+			<0xe2	KEY_SEARCH>,
+			<0xb2	KEY_POWER>,
+			<0xbc	KEY_MUTE>,
+			<0xec	KEY_MENU>,
+			<0xbf	0x190>,
+			<0xe0	0x191>,
+			<0xe1	0x192>,
+			<0xe9	183>,
+			<0xe6	248>,
+			<0xe8	185>,
+			<0xe7	186>,
+			<0xf0	388>,
+			<0xbe	0x175>;
+	};
+
+	ir_key2 {
+		rockchip,usercode = <0xff00>;
+		rockchip,key_table =
+			<0xf9	KEY_HOME>,
+			<0xbf	KEY_BACK>,
+			<0xfb	KEY_MENU>,
+			<0xaa	KEY_REPLY>,
+			<0xb9	KEY_UP>,
+			<0xe9	KEY_DOWN>,
+			<0xb8	KEY_LEFT>,
+			<0xea	KEY_RIGHT>,
+			<0xeb	KEY_VOLUMEDOWN>,
+			<0xef	KEY_VOLUMEUP>,
+			<0xf7	KEY_MUTE>,
+			<0xe7	KEY_POWER>,
+			<0xfc	KEY_POWER>,
+			<0xa9	KEY_VOLUMEDOWN>,
+			<0xa8	KEY_VOLUMEDOWN>,
+			<0xe0	KEY_VOLUMEDOWN>,
+			<0xa5	KEY_VOLUMEDOWN>,
+			<0xab	183>,
+			<0xb7	388>,
+			<0xe8	388>,
+			<0xf8	184>,
+			<0xaf	185>,
+			<0xed	KEY_VOLUMEDOWN>,
+			<0xee	186>,
+			<0xb3	KEY_VOLUMEDOWN>,
+			<0xf1	KEY_VOLUMEDOWN>,
+			<0xf2	KEY_VOLUMEDOWN>,
+			<0xf3	KEY_SEARCH>,
+			<0xb4	KEY_VOLUMEDOWN>,
+			<0xbe	KEY_SEARCH>;
+	};
+
+	ir_key3 {
+		rockchip,usercode = <0x1dcc>;
+		rockchip,key_table =
+			<0xee	KEY_REPLY>,
+			<0xf0	KEY_BACK>,
+			<0xf8	KEY_UP>,
+			<0xbb	KEY_DOWN>,
+			<0xef	KEY_LEFT>,
+			<0xed	KEY_RIGHT>,
+			<0xfc	KEY_HOME>,
+			<0xf1	KEY_VOLUMEUP>,
+			<0xfd	KEY_VOLUMEDOWN>,
+			<0xb7	KEY_SEARCH>,
+			<0xff	KEY_POWER>,
+			<0xf3	KEY_MUTE>,
+			<0xbf	KEY_MENU>,
+			<0xf9	0x191>,
+			<0xf5	0x192>,
+			<0xb3	388>,
+			<0xbe	KEY_1>,
+			<0xba	KEY_2>,
+			<0xb2	KEY_3>,
+			<0xbd	KEY_4>,
+			<0xf9	KEY_5>,
+			<0xb1	KEY_6>,
+			<0xfc	KEY_7>,
+			<0xf8	KEY_8>,
+			<0xb0	KEY_9>,
+			<0xb6	KEY_0>,
+			<0xb5	KEY_BACKSPACE>;
+	};
+};

commit bdbf80c83291311d12133a899e14351bd675a49c
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Sat Sep 30 17:51:27 2017 +0800

    input: Add RK remote control driver
    
    This patch adds support to RK RC driver, which is basically a IR
    receiver. This IP (PWM) is common across all the RK parts for
    settop box platforms.
    It implements a simple NEC protocol decoder.
    
    Change-Id: I057a341acaeb14d0165bd6187c4074dd230b079f
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 02933f7027..69fea3cb0d 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -20,6 +20,13 @@ config DM_RC
 	  This adds a uclass for Remote Controllers. This is needed
 	  in order to support standalone IR receivers.
 
+config RK_IR
+	bool "Enable rk ir support"
+	depends on DM_RC
+	select BITREVERSE
+	help
+	  This adds a driver for the rockchip IR controller.
+
 config CROS_EC_KEYB
 	bool "Enable Chrome OS EC keyboard support"
 	help
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index fe8fa640f5..510c4d1cef 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -8,6 +8,7 @@
 obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o
 obj-$(CONFIG_DM_KEY) += key-uclass.o
 obj-$(CONFIG_DM_RC) += rc-uclass.o
+obj-$(CONFIG_RK_IR) += rockchip_ir.o
 
 obj-$(CONFIG_I8042_KEYB) += i8042.o
 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
diff --git a/drivers/input/rockchip_ir.c b/drivers/input/rockchip_ir.c
new file mode 100644
index 0000000000..6579284b9e
--- /dev/null
+++ b/drivers/input/rockchip_ir.c
@@ -0,0 +1,342 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <errno.h>
+#include <rc.h>
+#include <rockchip_ir.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+
+#include <linux/bitrev.h>
+#include <linux/input.h>
+
+#include <asm/arch/periph.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct nec_dec nec;
+static struct rc_map *rc_map;
+
+static int rockchip_ir_get_keycode(struct udevice *dev)
+{
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	return priv->keycode;
+}
+
+static int rockchip_ir_get_repeat(struct udevice *dev)
+{
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	return priv->repeat;
+}
+
+static int ir_lookup_by_scancode(struct rockchip_ir_priv *priv,
+				 u32 usercode,
+				 u32 scancode)
+{
+	int i, j;
+
+	for (i = 0; i < priv->num; i++) {
+		if (rc_map[i].usercode == usercode)
+			break;
+	}
+	for (j = 0; i < priv->num && j < rc_map[i].nbuttons; j++) {
+		if (rc_map[i].scan[j].scancode == scancode) {
+			if (priv->keycode == rc_map[i].scan[j].keycode)
+				priv->repeat++;
+			else
+				priv->repeat = 0;
+			priv->keycode = rc_map[i].scan[j].keycode;
+			return 0;
+		}
+	}
+
+	priv->keycode = KEY_RESERVED;
+	priv->repeat = 0;
+
+	return -1;
+}
+
+static int ir_parse_keys(struct udevice *dev)
+{
+	int i, j;
+	int len;
+	int ret;
+	int subnode;
+	int node = dev_of_offset(dev);
+	const void *blob = gd->fdt_blob;
+
+	i = 0;
+	fdt_for_each_subnode(subnode, blob, node) {
+		rc_map[i].usercode = fdtdec_get_uint(blob, subnode,
+						     "rockchip,usercode",
+						     1234u);
+		if (rc_map[i].usercode == 1234u) {
+			debug("missing usercode property in the dts\n");
+			return -1;
+		}
+		debug("add new usercode:0x%x\n", rc_map[i].usercode);
+		fdt_get_property(blob, subnode, "rockchip,key_table", &len);
+		len /= sizeof(u32);
+		debug("len:%d\n", len);
+		rc_map[i].nbuttons = len / 2;
+		ret = fdtdec_get_int_array(blob, subnode, "rockchip,key_table",
+					   (u32 *)rc_map[i].scan, len);
+		if (ret) {
+			debug("missing key_table property in the dts\n");
+			return -1;
+		}
+		for (j = 0; j < (len / 2); j++) {
+			debug("[%d],usercode=0x%x scancode=0x%x keycode=0x%x\n",
+			      i,
+			      rc_map[i].usercode,
+			      rc_map[i].scan[j].scancode,
+			      rc_map[i].scan[j].keycode);
+		}
+		i++;
+	}
+
+	return 0;
+}
+
+/**
+ * ir_nec_decode() - Decode one NEC pulse or space
+ * @duration:   the struct ir_raw_event descriptor of the pulse/space
+ */
+static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev)
+{
+	int ret;
+	u32 usercode;
+	u32 scancode;
+	u8 __maybe_unused address, not_address, command, not_command;
+	struct nec_dec *data = &nec;
+
+	debug("NEC decode started at state %d (%uus %s)\n",
+	      data->state, TO_US(ev->duration), TO_STR(ev->pulse));
+
+	switch (data->state) {
+	case STATE_INACTIVE:
+		if (!ev->pulse)
+			break;
+
+		if (!eq_margin(ev->duration, NEC_HEADER_PULSE, NEC_UNIT * 2))
+			break;
+
+		data->count = 0;
+		data->state = STATE_HEADER_SPACE;
+		return 0;
+
+	case STATE_HEADER_SPACE:
+		if (ev->pulse)
+			break;
+
+		if (eq_margin(ev->duration, NEC_HEADER_SPACE, NEC_UNIT)) {
+			data->state = STATE_BIT_PULSE;
+			return 0;
+		}
+
+		break;
+
+	case STATE_BIT_PULSE:
+		if (!ev->pulse)
+			break;
+
+		if (!eq_margin(ev->duration, NEC_BIT_PULSE, NEC_UNIT / 2))
+			break;
+
+		data->state = STATE_BIT_SPACE;
+		return 0;
+
+	case STATE_BIT_SPACE:
+		if (ev->pulse)
+			break;
+
+		data->bits <<= 1;
+		if (eq_margin(ev->duration, NEC_BIT_1_SPACE, NEC_UNIT / 2))
+			data->bits |= 1;
+		else if (!eq_margin(ev->duration, NEC_BIT_0_SPACE,
+				    NEC_UNIT / 2))
+			break;
+		data->count++;
+
+		if (data->count == NEC_NBITS) {
+			address     = ((data->bits >> 24) & 0xff);
+			not_address = ((data->bits >> 16) & 0xff);
+			command	    = ((data->bits >>  8) & 0xff);
+			not_command = ((data->bits >>  0) & 0xff);
+
+			if ((command ^ not_command) != 0xff) {
+				debug("NEC checksum error: received 0x%08x\n",
+				      data->bits);
+			}
+			usercode = address << 8 | not_address;
+			scancode = command << 8 | not_command;
+			debug("raw usercode 0x%04x scancode 0x%04x\n",
+			      usercode, scancode);
+			/* change to dts format */
+			usercode = bitrev16(usercode);
+			scancode = (bitrev16(scancode) >> 8) & 0xFF;
+
+			data->state = STATE_INACTIVE;
+			ret = ir_lookup_by_scancode(priv, usercode, scancode);
+			if (!ret)
+				debug("keycode 0x%02x repeat 0x%x\n",
+				      priv->keycode, priv->repeat);
+			else
+				debug("ir lookup by scancode failed\n");
+		} else {
+			data->state = STATE_BIT_PULSE;
+		}
+
+		return 0;
+	}
+
+	debug("NEC decode failed at count %d state %d (%uus %s)\n",
+	      data->count, data->state, TO_US(ev->duration), TO_STR(ev->pulse));
+	data->state = STATE_INACTIVE;
+
+	return -1;
+}
+
+static void rockchip_ir_irq(int irq, void *data)
+{
+	u32 val;
+	u32 cycle_hpr, cycle_lpr, cycle;
+	struct ir_raw_event ev;
+	struct rockchip_ir_priv *priv = (struct rockchip_ir_priv *)data;
+
+	val = readl(priv->base + PWM_STA_REG(priv->id));
+	cycle_hpr = readl(priv->base + PWM_HPR_REG);
+	cycle_lpr = readl(priv->base + PWM_LPR_REG);
+	if (val & PWM_CH_POL(priv->id)) {
+		cycle = cycle_hpr;
+		ev.pulse = 0;
+	} else {
+		cycle = cycle_lpr;
+		ev.pulse = 1;
+	}
+	writel(PWM_CH_INT(priv->id),
+	       priv->base + PWM_STA_REG(priv->id));
+	ev.duration = cycle * priv->period;
+	ir_nec_decode(priv, &ev);
+}
+
+static void rockchip_ir_hw_init(struct udevice *dev)
+{
+	unsigned long tmp;
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	/* Enable capture mode, non-scaled clock, prescale 1 */
+	writel(REG_CTL_MD, priv->base + PWM_CTL_REG);
+
+	/* Clear Interrupt Status */
+	writel(PWM_CH_INT(priv->id),
+	       priv->base + PWM_STA_REG(priv->id));
+
+	/* Enable IRQ */
+	writel(PWM_CH_INT(priv->id),
+	       priv->base + PWM_INT_REG(priv->id));
+
+	/* Enable IR Module */
+	tmp = readl(priv->base + PWM_CTL_REG);
+	writel(tmp | REG_CTL_EN, priv->base + PWM_CTL_REG);
+}
+
+static int rockchip_ir_ofdata_to_platdata(struct udevice *dev)
+{
+	int node = dev_of_offset(dev);
+	const void *blob = gd->fdt_blob;
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	priv->num = fdtdec_get_child_count(blob, node);
+	if (priv->num == 0) {
+		debug("no ir map in dts\n");
+		return -1;
+	}
+	priv->base = devfdt_get_addr(dev);
+	priv->id = (priv->base >> 4) & 0xF;
+
+	return 0;
+}
+
+static int rockchip_ir_probe(struct udevice *dev)
+{
+	int ret;
+	struct clk clk;
+	struct udevice *pinctrl;
+	struct rockchip_ir_priv *priv = dev_get_priv(dev);
+
+	rc_map = calloc(1, priv->num * sizeof(struct rc_map));
+	if (!rc_map) {
+		debug("%s: failed to calloc\n", __func__);
+		return -EINVAL;
+	}
+
+	ret = ir_parse_keys(dev);
+	if (ret) {
+		debug("%s: failed to parse keys\n", __func__);
+		return -EINVAL;
+	}
+
+	/*
+	 * The PWM does not have decicated interrupt number in dts and can
+	 * not get periph_id by pinctrl framework, so let's init then here.
+	 */
+	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+	if (ret) {
+		debug("%s: can't find pinctrl device\n", __func__);
+		return -EINVAL;
+	}
+
+	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0 + priv->id);
+	if (ret) {
+		debug("%s pwm%d pinctrl init fail\n", __func__, priv->id);
+		return -EINVAL;
+	}
+
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret) {
+		debug("%s get clock fail!\n", __func__);
+		return -EINVAL;
+	}
+	priv->freq = clk_get_rate(&clk);
+	debug("%s pwm clk = %lu\n", __func__, priv->freq);
+	priv->period = 1000000000 / priv->freq;
+
+	irq_install_handler(IRQ_PWM,
+			    (interrupt_handler_t *)rockchip_ir_irq, priv);
+	irq_handler_enable(IRQ_PWM);
+
+	rockchip_ir_hw_init(dev);
+
+	return ret;
+}
+
+static const struct dm_rc_ops rockchip_ir_ops = {
+	.get_keycode = rockchip_ir_get_keycode,
+	.get_repeat = rockchip_ir_get_repeat,
+};
+
+static const struct udevice_id rockchip_ir_ids[] = {
+	{ .compatible = "rockchip,remotectl-pwm" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_ir) = {
+	.name	= "rockchip_ir",
+	.id	= UCLASS_RC,
+	.of_match = rockchip_ir_ids,
+	.ofdata_to_platdata     = rockchip_ir_ofdata_to_platdata,
+	.probe = rockchip_ir_probe,
+	.ops	= &rockchip_ir_ops,
+	.priv_auto_alloc_size = sizeof(struct rockchip_ir_priv),
+};
diff --git a/include/rockchip_ir.h b/include/rockchip_ir.h
new file mode 100644
index 0000000000..093234dad0
--- /dev/null
+++ b/include/rockchip_ir.h
@@ -0,0 +1,92 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef __ROCKCHIP_IR_H__
+#define __ROCKCHIP_IR_H__
+
+#include <linux/bitops.h>
+
+/* Registers */
+/* High polarity cycles */
+#define PWM_HPR_REG	0x04
+
+/* Low polarity cycles */
+#define PWM_LPR_REG	0x08
+
+/* PWM Control */
+#define PWM_CTL_REG	0x0c
+/* Enable */
+#define REG_CTL_EN	BIT(0)
+/* capture mode */
+#define REG_CTL_MD	BIT(2)
+
+/* Interrupt Status */
+#define PWM_STA_REG(id)	((4 - (id)) * 0x10)
+#define PWM_CH_POL(id)	BIT(id + 8)
+
+/* Interrupt Enable */
+#define PWM_INT_REG(id)	((4 - (id)) * 0x14)
+#define PWM_CH_INT(id)	BIT(id)
+
+/* NEC IR Pulse/Space protocol */
+#define NEC_NBITS		32
+#define NEC_UNIT		562500	/* ns */
+#define NEC_HEADER_PULSE	(16 * NEC_UNIT)
+#define NEC_HEADER_SPACE	(8  * NEC_UNIT)
+#define NEC_BIT_PULSE		(1  * NEC_UNIT)
+#define NEC_BIT_0_SPACE		(1  * NEC_UNIT)
+#define NEC_BIT_1_SPACE		(3  * NEC_UNIT)
+
+#define TO_US(duration)		((duration) / 1000)
+#define TO_STR(is_pulse)	((is_pulse) ? "pulse" : "space")
+
+#define MAX_NUM_KEYS	60
+
+enum nec_state {
+	STATE_INACTIVE,
+	STATE_HEADER_SPACE,
+	STATE_BIT_PULSE,
+	STATE_BIT_SPACE,
+};
+
+struct rockchip_ir_priv {
+	fdt_addr_t base;
+	ulong freq;
+	ulong period;
+	int id;
+	int num;
+	int keycode;
+	int repeat;
+};
+
+struct ir_raw_event {
+	u32 duration;
+	unsigned pulse:1;
+};
+
+struct nec_dec {
+	int state;
+	unsigned count;
+	u32 bits;
+};
+
+struct rc_map_table {
+	u32 scancode;
+	u32 keycode;
+};
+
+struct rc_map {
+	u32 usercode;
+	u32 nbuttons;
+	struct rc_map_table scan[MAX_NUM_KEYS];
+};
+
+/* macros for IR decoders */
+static inline bool eq_margin(unsigned d1, unsigned d2, unsigned margin)
+{
+	return ((d1 > (d2 - margin)) && (d1 < (d2 + margin)));
+}
+
+#endif /* __ROCKCHIP_IR_H__ */

commit b0deaf684103fb778ee2b9da1f9115fce4d811a9
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Sat Sep 30 18:17:24 2017 +0800

    irq: rockchip: add pwm hardware irq number
    
    Change-Id: Idfb344703cc842a6d41a69771bd2a36065b01aaf
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index ab907c4f3b..6694b5f7eb 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -38,6 +38,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			76
+#define IRQ_PWM				82
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -61,6 +62,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			99
+#define IRQ_PWM				110
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -84,6 +86,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			76
+#define IRQ_PWM				82
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -102,6 +105,7 @@
 #define GPIO_BANK_PINS			32
 
 #define IRQ_TIMER1			79
+#define IRQ_PWM				110
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -119,6 +123,7 @@
 #define IRQ_GPIO2			48
 #define IRQ_GPIO3			49
 #define IRQ_GPIO4			50
+#define IRQ_PWM				93
 #define IRQ_TIMER1			114	/* non-secure */
 
 #define GIC_IRQS_NR			(6 * 32)

commit eecd6f34aec4e117fe54976a792ac1aa20d32ad8
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 11:52:39 2017 +0800

    rockchip: clk: Add rk322x bus pclk clock support
    
    Change-Id: I63fcd3527ac2d4447b0f49f4665ca99caa90d6e5
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 9e7e047a4e..354883ae9d 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -314,6 +314,29 @@ static int rk322x_ddr_set_clk(struct rk322x_cru *cru, unsigned int set_rate)
 
 	return set_rate;
 }
+
+static ulong rk322x_get_bus_aclk(struct rk322x_cru *cru, ulong gclk_rate)
+{
+	u32 con;
+	u32 aclk_div;
+
+	con = readl(&cru->cru_clksel_con[0]);
+	aclk_div = ((con & BUS_ACLK_DIV_MASK) >> BUS_ACLK_DIV_SHIFT) + 1;
+
+	return gclk_rate / aclk_div;
+}
+
+static ulong rk322x_get_bus_pclk(struct rk322x_cru *cru, ulong gclk_rate)
+{
+	u32 con;
+	u32 pclk_div;
+
+	con = readl(&cru->cru_clksel_con[1]);
+	pclk_div = ((con & BUS_PCLK_DIV_MASK) >> BUS_PCLK_DIV_SHIFT) + 1;
+
+	return rk322x_get_bus_aclk(cru, gclk_rate) / pclk_div;
+}
+
 static ulong rk322x_clk_get_rate(struct clk *clk)
 {
 	struct rk322x_clk_priv *priv = dev_get_priv(clk->dev);
@@ -330,6 +353,9 @@ static ulong rk322x_clk_get_rate(struct clk *clk)
 	case SCLK_SDMMC:
 		rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id);
 		break;
+	case PCLK_GPIO0 ... PCLK_TIMER:
+		rate = rk322x_get_bus_pclk(priv->cru, gclk_rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit c634813016a443a98f2d310347d0f02e80eaf7ec
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 09:11:57 2017 +0800

    lib: add bit reverse library config
    
    Change-Id: Ib3d72274b07fb088d320f751a8a576338f3a4d0b
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index 3fb1f12012..4554bb28ea 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -80,6 +80,9 @@ config TPL_TINY_MEMSET
 config RBTREE
 	bool
 
+config BITREVERSE
+	bool
+
 source lib/dhry/Kconfig
 
 menu "Security support"

commit 0f1d0337a14088bf15f48a853daa0e2b1652c98a
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Fri Oct 13 08:50:32 2017 +0800

    configs: evb-rk3229: enable CONFIG_DM_RC
    
    Change-Id: I8d02fb4ee2c7c07aacd74f86114e9cca10c61f46
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index df5a36855c..caa806ba77 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -56,6 +56,7 @@ CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_RC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y

commit 6faa29c665388b16d672dfb640356643b83481ff
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Oct 24 11:36:00 2017 +0800

    test: add modular test for rknand on Rockchip platform
    
    Write assigned data payload into rknand device and read back. Then
    verify the context by comparing the write_buffer with read_buffer
    one by one.
    
    => rktest rknand 30000
    ***********************************************************
    Rockchip Board Module [rknand] Test start.
    ***********************************************************
    
    Device 0: Vendor: 0x2207 Rev: V1.00 Prod: rknand
                Type: Hard Disk
                Capacity: 7304.0 MB = 7.1 GB (14958592 x 512)
    ... is now current device
    
    rknand write: device 0 block # 4096, count 30000 ... 30000 blocks written: OK
    rknand write: size 14MB, used 2196ms, speed 6MB/s
    
    rknand read: device 0 block # 4096, count 30000 ... 30000 blocks read: OK
    rknand read: size 14MB, used 941ms, speed 15MB/s
    -----------------------------------------------------------
    Rockchip Board Module [rknand] Test end <PASS>.. Total: 8.347s
    -----------------------------------------------------------
    
    Change-Id: Iedc8d4c3d30a488770c24eabcc81649f8bdecaf2
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index fb6876ee21..c104de6fc7 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -9,3 +9,4 @@ obj-y += test-timer.o
 obj-y += test-key.o
 obj-y += test-emmc.o
 obj-y += test-regulator.o
+obj-y += test-rknand.c
\ No newline at end of file
diff --git a/test/rockchip/test-rknand.c b/test/rockchip/test-rknand.c
new file mode 100644
index 0000000000..de38b0d508
--- /dev/null
+++ b/test/rockchip/test-rknand.c
@@ -0,0 +1,119 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <cli.h>
+#include <common.h>
+#include <linux/compat.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <malloc.h>
+#include "test-rockchip.h"
+
+int board_rknand_test(int argc, char * const argv[])
+{
+	u8 *write_buffer, *read_buffer;
+	u32 i, blocks = 0;
+	unsigned long ts;
+	int err = 0;
+	char cmd_rknand[512] = {0};
+
+	blocks = simple_strtoul(argv[2], NULL, 0);
+	if (!blocks) {
+		printf("Usage: rktest rknand blocks\n");
+		printf("8129 <= blocks <= 30000\n");
+		err = -EINVAL;
+		goto err_wb;
+	} 
+
+	if (blocks % 2) {
+		/* Round up */
+		blocks += 1;
+	}
+
+	if (blocks < 8192) {
+		printf("Round up to 8192 blocks compulsively\n");
+		blocks = 8192;
+	}
+
+	if (blocks > 30000) {
+		printf("Round down to 30000 blocks compulsively\n");
+		blocks = 30000;
+	}
+
+	/* 1. Prepare memory */
+
+	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, 0);
+	if (!write_buffer) {
+		printf("No memory for write_buffer!\n");
+		err = -ENOMEM;
+		goto err_wb;
+	}
+
+	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512, 0);
+	if (!read_buffer) {
+		printf("No memory for read_buffer!\n");
+		err = -ENOMEM;
+		goto err_rb;
+	}
+
+	for (i = 0; i < blocks * 512; i++) {
+		write_buffer[i] = i;
+		read_buffer[i] = 0;
+	}
+
+	/* 2. Select device */
+
+	snprintf(cmd_rknand, sizeof(cmd_rknand), "rknand dev 0");
+	err = cli_simple_run_command(cmd_rknand, 0);
+	if (!err)
+		goto err_mw;
+
+	/* 3. Prepare and start cli command */
+
+	snprintf(cmd_rknand, sizeof(cmd_rknand),
+		 "rknand write 0x%x 0x1000 0x%x",
+		 (u32)write_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_rknand, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("rknand write: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+
+	snprintf(cmd_rknand, sizeof(cmd_rknand),
+		 "rknand read 0x%x 0x1000 0x%x",
+		 (u32)read_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_rknand, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("rknand read: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+	/* 4. Verify the context */
+
+	err = 0;
+	for (i = 0; i < blocks * 512; i++) {
+		if (write_buffer[i] != read_buffer[i]) {
+			printf("rknand context compare err!\n");
+			err = -EINVAL;
+			goto err_mw;
+		}
+	}
+
+err_mw:
+	kfree(read_buffer);
+	read_buffer = NULL;
+err_rb:
+	kfree(write_buffer);
+	write_buffer = NULL;
+err_wb:
+	return err;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 463802d3a9..2d862501b8 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -18,6 +18,7 @@ static board_module_t g_board_modules[] = {
 	{ .name = "key",	.test = board_key_test },
 	{ .name = "emmc",	.test = board_emmc_test },
 	{ .name = "regulator",	.test = board_regulator_test },
+	{ .name = "rknand",	.test = board_rknand_test },
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index 556175476a..ed95353391 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -11,5 +11,6 @@ int board_timer_test(int argc, char * const argv[]);
 int board_key_test(int argc, char * const argv[]);
 int board_emmc_test(int argc, char * const argv[]);
 int board_regulator_test(int argc, char * const argv[]);
+int board_rknand_test(int argc, char * const argv[]);
 
 #endif /* _TEST_ROCKCHIP_H */

commit 4b81300eb83290d63af054b224a90b4c631cf665
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Tue Oct 24 17:31:36 2017 +0800

    test: improve the code of test-emmc
    
    Firstly, we use simple_strtoul to simplify the code,
    and it could even supports hexadecimal number as parameter.
    Then we use kmalloc so that could ensure we get aligned
    address for transfer. Finally correct the code logic for
    blocks restriction.
    
    Change-Id: I0bcee1170f642b47bff0b94883061c1a3645c5eb
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
index d0407aa94b..a7b301e91e 100644
--- a/test/rockchip/test-emmc.c
+++ b/test/rockchip/test-emmc.c
@@ -12,21 +12,6 @@
 #include <malloc.h>
 #include "test-rockchip.h"
 
-static u32 atoi(const char *str)
-{
-	u32 s=0;
-
-	while(*str == ' ')
-		str++;
-
-	while(*str >= '0' && *str <= '9') {
-		s = s * 10 + *str - '0';
-		str++;
-	}
-
-	return s;
-}
-
 int board_emmc_test(int argc, char * const argv[])
 {
 	u8 *write_buffer, *read_buffer;
@@ -35,33 +20,38 @@ int board_emmc_test(int argc, char * const argv[])
 	int err = 0;
 	char cmd_mmc[512] = {0};
 
-	blocks = atoi(argv[2]);
+	blocks = simple_strtoul(argv[2], NULL, 0);
 	if (!blocks) {
 		printf("Usage: rktest emmc blocks\n");
 		printf("8129 <= blocks <= 30000\n");
 		err = -EINVAL;
 		goto err_wb;
-	} else if (blocks % 2) {
+	}
+
+	if (blocks % 2)
 		/* Round up */
 		blocks += 1;
-	} else if (blocks < 8192) {
+
+	if (blocks < 8192) {
 		printf("Round up to 8192 blocks compulsively\n");
 		blocks = 8192;
-	} else if (blocks > 30000) {
+	}
+
+	if (blocks > 30000) {
 		printf("Round down to 30000 blocks compulsively\n");
 		blocks = 30000;
 	}
 
 	/* 1. Prepare memory */
 
-	write_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	write_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
 	if (!write_buffer) {
 		printf("No memory for write_buffer!\n");
 		err = -ENOMEM;
 		goto err_wb;
 	}
 
-	read_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	read_buffer = (u8 *)kmalloc(sizeof(u8) * blocks * 512);
 	if (!read_buffer) {
 		printf("No memory for read_buffer!\n");
 		err = -ENOMEM;

commit 0948688932e5c5d6ee3bc76628bcd87a81ae1a59
Author: Zhangbin Tong <zebulun.tong@rock-chips.com>
Date:   Thu Oct 12 18:26:53 2017 +0800

    dm: input: add driver model rc uclass
    
    Change-Id: I1e9b067d49e81bd09c2d1e6c9612f0831480ce73
    Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 1a4c5a357f..02933f7027 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -13,6 +13,13 @@ config DM_KEY
 	help
 	  This adds a simple uclass for key.
 
+config DM_RC
+	bool "Enable driver model Remote Controller support"
+	depends on DM
+	help
+	  This adds a uclass for Remote Controllers. This is needed
+	  in order to support standalone IR receivers.
+
 config CROS_EC_KEYB
 	bool "Enable Chrome OS EC keyboard support"
 	help
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index bf2d6e3642..fe8fa640f5 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o
 obj-$(CONFIG_DM_KEY) += key-uclass.o
+obj-$(CONFIG_DM_RC) += rc-uclass.o
 
 obj-$(CONFIG_I8042_KEYB) += i8042.o
 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
diff --git a/drivers/input/rc-uclass.c b/drivers/input/rc-uclass.c
new file mode 100644
index 0000000000..3504e48cf4
--- /dev/null
+++ b/drivers/input/rc-uclass.c
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <rc.h>
+
+int rc_get_keycode(struct udevice *dev)
+{
+	const struct dm_rc_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_keycode)
+		return -ENOSYS;
+
+	return ops->get_keycode(dev);
+}
+
+int rc_get_repeat(struct udevice *dev)
+{
+	const struct dm_rc_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_repeat)
+		return -ENOSYS;
+
+	return ops->get_repeat(dev);
+}
+
+UCLASS_DRIVER(key) = {
+	.id		= UCLASS_RC,
+	.name		= "rc",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 779daa80f6..fabdc849c6 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -93,6 +93,7 @@ enum uclass_id {
 	UCLASS_WDT,		/* Watchdot Timer driver */
 	UCLASS_FG,
 	UCLASS_KEY,
+	UCLASS_RC,		/* Remote Controller */
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/rc.h b/include/rc.h
new file mode 100644
index 0000000000..dbaac9e21c
--- /dev/null
+++ b/include/rc.h
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _RC_H_
+#define _RC_H_
+
+struct dm_rc_ops {
+	int (*get_keycode)(struct udevice *dev);
+	int (*get_repeat)(struct udevice *dev);
+};
+
+int rc_get_keycode(struct udevice *dev);
+int rc_get_repeat(struct udevice *dev);
+
+#endif

commit 91441457b34909b43a4f7b377b10207bc066606c
Author: francis.fan <francis.fan@rock-chips.com>
Date:   Fri Oct 20 10:40:37 2017 +0800

    rockchip: add vendor storage api
    
    support read/write configuration data from/to vendor partition
    that allocated on emmc/nand/spi nor storage devices.
    
    Change-Id: Ie9aaf882f43d78f0baeeafec0c681c7c9e82ca97
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/vendor.h b/arch/arm/include/asm/arch-rockchip/vendor.h
new file mode 100644
index 0000000000..fdeafefd0a
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/vendor.h
@@ -0,0 +1,17 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef __ROCKCHIP_VENDOR_
+#define __ROCKCHIP_VENDOR_
+
+#define VENDOR_SN_ID		1 /* serialno */
+#define VENDOR_WIFI_MAC_ID	2 /* wifi mac */
+#define VENDOR_LAN_MAC_ID	3 /* lan mac */
+#define VENDOR_BLUETOOTH_ID	4 /* bluetooth mac */
+
+int vendor_storage_read(u16 id, void *pbuf, u16 size);
+int vendor_storage_write(u16 id, void *pbuf, u16 size);
+
+#endif /* _ROCKCHIP_VENDOR_ */
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index aa418c35b1..ec6522b89a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -213,6 +213,13 @@ config ROCKCHIP_PARTITION_BOOT
 	help
 	  This enables support for bootimg system from rockchip format partition
 
+config ROCKCHIP_VENDOR_PARTITION
+        bool "Rockchip vendor partition support"
+        depends on ROCKCHIP_BLOCK_API
+        help
+          This enable support to read/write vendor configuration data from/to
+	  this partition
+
 config GICV2
 	bool "ARM GICv2"
 
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index cc3a63e3ec..52eb04645f 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -24,6 +24,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
+obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
diff --git a/arch/arm/mach-rockchip/vendor.c b/arch/arm/mach-rockchip/vendor.c
new file mode 100644
index 0000000000..b1c08e2d43
--- /dev/null
+++ b/arch/arm/mach-rockchip/vendor.c
@@ -0,0 +1,604 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <asm/arch/vendor.h>
+
+#include "rockchip_blk.h"
+
+/* tag for vendor check */
+#define VENDOR_TAG		0x524B5644
+/* The Vendor partition contains the number of Vendor blocks */
+#define VENDOR_PART_NUM		4
+/* align to 64 bytes */
+#define VENDOR_BTYE_ALIGN	0x3F
+#define VENDOR_BLOCK_SIZE	512
+
+/* --- Emmc define --- */
+/* Starting address of the Vendor in memory. */
+#define EMMC_VENDOR_PART_OFFSET		(1024 * 7)
+/*
+ * The number of memory blocks used by each
+ * Vendor structure(128 * 512B = 64KB)
+ */
+#define EMMC_VENDOR_PART_BLKS		128
+/* The maximum number of items in each Vendor block */
+#define EMMC_VENDOR_ITEM_NUM		126
+
+/* --- Spi/Spi Nand/SLC/MLC define --- */
+/* The Vendor partition contains the number of Vendor blocks */
+#define	FLASH_VENDOR_PART_OFFSET	8
+/*
+ * The number of memory blocks used by each
+ * Vendor structure(8 * 512B = 4KB)
+ */
+#define FLASH_VENDOR_PART_BLKS		8
+/* The maximum number of items in each Vendor block */
+#define FLASH_VENDOR_ITEM_NUM		62
+
+/* Vendor uinit test define */
+/* #define VENDOR_STORAGE_TEST */
+#ifdef VENDOR_STORAGE_TEST
+int vendor_storage_test(void);
+#endif /* VENDOR_STORAGE_TEST */
+
+struct vendor_item {
+	u16  id;
+	u16  offset;
+	u16  size;
+	u16  flag;
+};
+
+struct vendor_hdr {
+	u32	tag;
+	u32	version;
+	u16	next_index;
+	u16	item_num;
+	u16	free_offset; /* Free space offset */
+	u16	free_size; /* Free space size */
+};
+
+/*
+ * Different types of Flash vendor info are different.
+ * EMMC:EMMC_VENDOR_PART_BLKS * BLOCK_SIZE(512) = 64KB;
+ * Spi Nor/Spi Nand/SLC/MLC: FLASH_VENDOR_PART_BLKS *
+ * BLOCK_SIZE(512) = 4KB.
+ * hash: For future expansion.
+ * version2: Together with hdr->version, it is used to
+ * ensure the current Vendor block content integrity.
+ *   (version2 == hdr->version):Data valid;
+ *   (version2 != hdr->version):Data invalid.
+ */
+struct vendor_info {
+	struct vendor_hdr *hdr;
+	struct vendor_item *item;
+	u8 *data;
+	u32 *hash;
+	u32 *version2;
+};
+/*
+ * Calculate the offset of each field for emmc.
+ * Emmc vendor info size: 64KB
+ */
+#define EMMC_VENDOR_INFO_SIZE	(EMMC_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
+#define EMMC_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + EMMC_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define EMMC_VENDOR_HASH_OFFSET (EMMC_VENDOR_INFO_SIZE - 8)
+#define EMMC_VENDOR_VERSION2_OFFSET (EMMC_VENDOR_INFO_SIZE - 4)
+/*
+ * Calculate the offset of each field for spi nor/spi nand/slc/mlc.
+ * Flash vendor info size: 4KB
+ */
+#define FLASH_VENDOR_INFO_SIZE	(FLASH_VENDOR_PART_BLKS * VENDOR_BLOCK_SIZE)
+#define FLASH_VENDOR_DATA_OFFSET	(sizeof(struct vendor_hdr) + FLASH_VENDOR_ITEM_NUM * sizeof(struct vendor_item))
+#define FLASH_VENDOR_HASH_OFFSET (FLASH_VENDOR_INFO_SIZE - 8)
+#define FLASH_VENDOR_VERSION2_OFFSET (FLASH_VENDOR_INFO_SIZE - 4)
+
+/* vendor info */
+static struct vendor_info vendor_info;
+/* The storage type of the device */
+static int bootdev_type;
+
+/**********************************************************/
+/*              vendor API implementation                 */
+/**********************************************************/
+static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
+{
+	unsigned int lba = 0;
+	int ret = 0;
+
+	/* Get the offset address according to the device type */
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		/*
+		 * The location of VendorStorage in Flash is shown in the
+		 * following figure. The starting address of the VendorStorage
+		 * partition is 3.5MB(EMMC_VENDOR_PART_OFFSET*BLOCK_SIZE(512)),
+		 * and the partition size is 256KB.
+		 * ----------------------------------------------------
+		 * |   3.5MB    |  VendorStorage  |                   |
+		 * ----------------------------------------------------
+		 */
+		lba = EMMC_VENDOR_PART_OFFSET;
+		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		/*
+		 * The location of VendorStorage in Flash is shown in the
+		 * following figure. The starting address of the VendorStorage
+		 * partition is 4KB (FLASH_VENDOR_PART_OFFSET * BLOCK_SIZE),
+		 * and the partition size is 16KB.
+		 * ----------------------------------------------------
+		 * |   4KB    |  VendorStorage  |                     |
+		 * ----------------------------------------------------
+		 */
+		lba = FLASH_VENDOR_PART_OFFSET;
+		debug("[Vednor INFO]:VendorStorage offset address=0x%x\n", lba);
+		break;
+	default:
+		debug("[Vednor ERROR]:Boot device type is invalid!\n");
+		ret = -ENODEV;
+		break;
+	}
+	if (!ret) {
+		if (write)
+			ret = blkdev_write(buffer, lba + addr, n_sec);
+		else
+			ret = blkdev_read(buffer, lba + addr, n_sec);
+	}
+	debug("[Vednor INFO]:op=%s, ret=%d\n", write ? "write" : "read", ret);
+
+	return ret;
+}
+
+/*
+ * The VendorStorage partition is divided into four parts
+ * (vendor 0-3) and its structure is shown in the following figure.
+ * The init function is used to select the latest and valid vendor.
+ *
+ * |******************** FLASH ********************|
+ * -------------------------------------------------
+ * |  vendor0  |  vendor1  |  vendor2  |  vendor3  |
+ * -------------------------------------------------
+ * Notices:
+ *   1. "version" and "version2" are used to verify that the vendor
+ *      is valid (equal is valid).
+ *   2. the "version" value is larger, indicating that the current
+ *      verndor data is new.
+ */
+int vendor_storage_init(void)
+{
+	int ret = 0;
+	u8 *buffer;
+	u32 size, i;
+	u32 max_ver = 0;
+	u32 max_index = 0;
+	u16 data_offset, hash_offset;
+	u16 version2_offset, part_size;
+
+	bootdev_type = get_bootdev_type();
+	if (!bootdev_type) {
+		printf("[Vednor ERROR]:Invalid boot device type(%d)\n",
+		       bootdev_type);
+		return -ENODEV;
+	}
+
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		size = EMMC_VENDOR_INFO_SIZE;
+		part_size = EMMC_VENDOR_PART_BLKS;
+		data_offset = EMMC_VENDOR_DATA_OFFSET;
+		hash_offset = EMMC_VENDOR_HASH_OFFSET;
+		version2_offset = EMMC_VENDOR_VERSION2_OFFSET;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		size = FLASH_VENDOR_INFO_SIZE;
+		part_size = FLASH_VENDOR_PART_BLKS;
+		data_offset = FLASH_VENDOR_DATA_OFFSET;
+		hash_offset = FLASH_VENDOR_HASH_OFFSET;
+		version2_offset = FLASH_VENDOR_VERSION2_OFFSET;
+		break;
+	default:
+		debug("[Vednor ERROR]:Boot device type is invalid!\n");
+		ret = -ENODEV;
+		break;
+	}
+	/* Invalid bootdev type */
+	if (ret)
+		return ret;
+	/* Always use, no need to release */
+	buffer = (u8 *)malloc(size);
+	if (!buffer) {
+		printf("[Vednor ERROR]:Malloc failed!\n");
+		return -ENOMEM;
+	}
+	/* Pointer initialization */
+	vendor_info.hdr = (struct vendor_hdr *)buffer;
+	vendor_info.item = (struct vendor_item *)(buffer + sizeof(struct vendor_hdr));
+	vendor_info.data = buffer + data_offset;
+	vendor_info.hash = (u32 *)(buffer + hash_offset);
+	vendor_info.version2 = (u32 *)(buffer + version2_offset);
+
+	/* Find valid and up-to-date one from (vendor0 - vendor3) */
+	for (i = 0; i < VENDOR_PART_NUM; i++) {
+		ret = vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 0);
+		if (ret)
+			return ret;
+
+		if ((vendor_info.hdr->tag == VENDOR_TAG) &&
+		    (*(vendor_info.version2) == vendor_info.hdr->version)) {
+			if (max_ver < vendor_info.hdr->version) {
+				max_index = i;
+				max_ver = vendor_info.hdr->version;
+			}
+		}
+	}
+	if (max_ver) {
+		debug("[Vednor INFO]:max_ver=%d, vendor_id=%d.\n", max_ver, max_index);
+		/*
+		 * Keep vendor_info the same as the largest
+		 * version of vendor
+		 */
+		if (max_index != (VENDOR_PART_NUM - 1))
+			ret = vendor_ops((u8 *)vendor_info.hdr, part_size * max_index, part_size, 0);
+	} else {
+		debug("[Vednor INFO]:Reset vendor info...\n");
+		memset((u8 *)vendor_info.hdr, 0, size);
+		vendor_info.hdr->version = 1;
+		vendor_info.hdr->tag = VENDOR_TAG;
+		/* data field length */
+		vendor_info.hdr->free_size = ((u32)vendor_info.hash - (u32)vendor_info.data);
+		*(vendor_info.version2) = vendor_info.hdr->version;
+	}
+	debug("[Vednor INFO]:ret=%d.\n", ret);
+
+#ifdef VENDOR_STORAGE_TEST
+	if (vendor_storage_test())
+		printf("[Vendor ERROR]:Vendor test result:failure\n");
+#endif
+
+	return ret;
+}
+
+int vendor_storage_read(u16 id, void *pbuf, u16 size)
+{
+	int ret = 0;
+	u32 i;
+	u16 offset;
+	struct vendor_item *item;
+
+	/* init vendor storage */
+	if (!bootdev_type) {
+		ret = vendor_storage_init();
+		if (ret)
+			return ret;
+	}
+
+	item = vendor_info.item;
+	for (i = 0; i < vendor_info.hdr->item_num; i++) {
+		if ((item + i)->id == id) {
+			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			/* Correct the size value */
+			if (size > (item + i)->size)
+				size = (item + i)->size;
+			offset = (item + i)->offset;
+			memcpy(pbuf, (vendor_info.data + offset), size);
+			return size;
+		}
+	}
+	debug("[Vednor ERROR]:No matching item, id=%d\n", id);
+
+	return -EINVAL;
+}
+
+int vendor_storage_write(u16 id, void *pbuf, u16 size)
+{
+	int ret = 0;
+	u32 i, next_index, align_size;
+	struct vendor_item *item;
+	u16 part_size, max_item_num, offset;
+
+	/* init vendor storage */
+	if (!bootdev_type) {
+		ret = vendor_storage_init();
+		if (ret)
+			return ret;
+	}
+
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		part_size = EMMC_VENDOR_PART_BLKS;
+		max_item_num = EMMC_VENDOR_ITEM_NUM;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		part_size = FLASH_VENDOR_PART_BLKS;
+		max_item_num = FLASH_VENDOR_ITEM_NUM;
+		break;
+	default:
+		ret = -ENODEV;
+		break;
+	}
+	/* Invalid bootdev? */
+	if (ret)
+		return ret;
+
+	next_index = vendor_info.hdr->next_index;
+	/* algin to 64 bytes*/
+	align_size = (size + VENDOR_BTYE_ALIGN) & (~VENDOR_BTYE_ALIGN);
+	if (size > align_size)
+		return -EINVAL;
+
+	item = vendor_info.item;
+	/* If item already exist, update the item data */
+	for (i = 0; i < vendor_info.hdr->item_num; i++) {
+		if ((item + i)->id == id) {
+			debug("[Vednor INFO]:Find the matching item, id=%d\n", id);
+			offset = (item + i)->offset;
+			memcpy((vendor_info.data + offset), pbuf, size);
+			(item + i)->size = size;
+			vendor_info.hdr->version++;
+			*(vendor_info.version2) = vendor_info.hdr->version;
+			vendor_info.hdr->next_index++;
+			if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+				vendor_info.hdr->next_index = 0;
+			return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+		}
+	}
+	/*
+	 * If item does not exist, and free size is enough,
+	 * creat a new one
+	 */
+	if ((vendor_info.hdr->item_num < max_item_num) &&
+	    (vendor_info.hdr->free_size >= align_size)) {
+		debug("[Vednor INFO]:Create new Item, id=%d\n", id);
+		item = vendor_info.item + vendor_info.hdr->item_num;
+		item->id = id;
+		item->offset = vendor_info.hdr->free_offset;
+		item->size = size;
+
+		vendor_info.hdr->free_offset += align_size;
+		vendor_info.hdr->free_size -= align_size;
+		memcpy((vendor_info.data + item->offset), pbuf, size);
+		vendor_info.hdr->item_num++;
+		vendor_info.hdr->version++;
+		vendor_info.hdr->next_index++;
+		*(vendor_info.version2) = vendor_info.hdr->version;
+		if (vendor_info.hdr->next_index >= VENDOR_PART_NUM)
+			vendor_info.hdr->next_index = 0;
+
+		return vendor_ops((u8 *)vendor_info.hdr, part_size * next_index, part_size, 1);
+	}
+	debug("[Vednor ERROR]:Vendor has no space left!\n");
+
+	return -ENOMEM;
+}
+
+/**********************************************************/
+/*              vendor API uinit test                      */
+/**********************************************************/
+#ifdef VENDOR_STORAGE_TEST
+/* Reset the vendor storage space to the initial state */
+void vendor_test_reset(void)
+{
+	u16 i, part_size;
+	u32 size;
+
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		size = EMMC_VENDOR_INFO_SIZE;
+		part_size = EMMC_VENDOR_PART_BLKS;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		size = FLASH_VENDOR_INFO_SIZE;
+		part_size = FLASH_VENDOR_PART_BLKS;
+		break;
+	default:
+		size = 0;
+		part_size = 0;
+		break;
+	}
+	/* Invalid bootdev? */
+	if (!size)
+		return;
+
+	memset((u8 *)vendor_info.hdr, 0, size);
+	vendor_info.hdr->version = 1;
+	vendor_info.hdr->tag = VENDOR_TAG;
+	/* data field length */
+	vendor_info.hdr->free_size =
+		((u32)vendor_info.hash - (u32)vendor_info.data);
+	*(vendor_info.version2) = vendor_info.hdr->version;
+	/* write to flash. */
+	for (i = 0; i < VENDOR_PART_NUM; i++)
+		vendor_ops((u8 *)vendor_info.hdr, part_size * i, part_size, 1);
+}
+
+/*
+ * A total of four tests
+ * 1.All items test.
+ * 2.Overrides the maximum number of items test.
+ * 3.Single Item memory overflow test.
+ * 4.Total memory overflow test.
+ */
+int vendor_storage_test(void)
+{
+	u16 id, size, j, item_num;
+	u32 total_size;
+	u8 *buffer = NULL;
+	int ret = 0;
+
+	/*
+	 * Calculate the maximum number of items and the maximum
+	 * allocable memory for each item.
+	 */
+	switch (bootdev_type) {
+	case BOOT_FROM_EMMC:
+		item_num = EMMC_VENDOR_ITEM_NUM;
+		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		size = total_size/item_num;
+		break;
+	case BOOT_FROM_FLASH:
+	case BOOT_FROM_SPI_NOR:
+	case BOOT_FROM_SPI_NAND:
+		item_num = FLASH_VENDOR_ITEM_NUM;
+		total_size = (u32)vendor_info.hash - (u32)vendor_info.data;
+		size = total_size/item_num;
+		break;
+	default:
+		total_size = 0;
+		break;
+	}
+	/* Invalid bootdev? */
+	if (!total_size)
+		return -ENODEV;
+	/* 64 bytes are aligned and rounded down */
+	size = (size/64)*64;
+	/* malloc memory */
+	buffer = (u8 *)malloc(size);
+	if (!buffer) {
+		printf("[Vendor Test]:Malloc failed(size=%d)!\n", size);
+		return -ENOMEM;
+	}
+	printf("[Vendor Test]:Test Start...\n");
+	printf("[Vendor Test]:Before Test, Vendor Resetting.\n");
+	vendor_test_reset();
+
+	/* FIRST TEST: test all items can be used correctly */
+	printf("[Vendor Test]:<All Items Used> Test Start...\n");
+	printf("[Vendor Test]:item_num=%d, size=%d.\n",
+	       item_num, size);
+	/*
+	 * Write data, then read the data, and compare the
+	 * data consistency
+	 */
+	for (id = 0; id < item_num; id++) {
+		memset(buffer, id, size);
+		ret = vendor_storage_write(id, buffer, size);
+		if (ret) {
+			printf("[Vendor Test]:vendor write failed(id=%d)!\n", id);
+			free(buffer);
+			return ret;
+		}
+	}
+	/* Read data */
+	for (id = 0; id < item_num; id++) {
+		memset(buffer, 0, size);
+		ret = vendor_storage_read(id, buffer, size);
+		if (ret != size) {
+			printf("[Vendor Test]:vendor read failed(id=%d)!\n", id);
+			free(buffer);
+			return ret;
+		}
+		/* check data Correctness */
+		for (j = 0; j < size; j++) {
+			if (*(buffer + j) != id) {
+				printf("[Vendor Test]:Unexpected error occurs(id=%d)\n", id);
+				printf("the data content is:\n");
+				print_buffer(0, buffer, 1, size, 16);
+
+				free(buffer);
+				return -1;
+			}
+		}
+		debug("\t#id=%03d success,data=0x%02x,size=%d.\n", id, *buffer, size);
+	}
+	printf("[Vendor Test]:<All Items Used> Test End,States:OK\n");
+
+	/*
+	 * SECOND TEST: Overrides the maximum number of items to see if the
+	 * return value matches the expectation
+	 */
+	printf("[Vendor Test]:<Overflow Items Cnt> Test Start...\n");
+	/* Any id value that was not used before */
+	id = item_num;
+	printf("[Vendor Test]:id=%d, size=%d.\n", id, size);
+	ret = vendor_storage_write(id, buffer, size);
+	if (ret == -ENOMEM)
+		printf("[Vendor Test]:<Overflow Items Cnt> Test End,States:OK\n");
+	else
+		printf("[Vendor Test]:<Overflow Items Cnt> Test End,States:Failed\n");
+
+	/* free buffer, remalloc later */
+	free(buffer);
+	buffer = NULL;
+	/*
+	 * remalloc memory and recalculate size to test memory overflow
+	 * (1) item_num > 10: Memory is divided into 10 blocks,
+	 * 11th memory will overflow.
+	 * (2) 10 > item_num > 1: Memory is divided into item_num-1
+	 * blocks. item_num block, memory will overflow.
+	 * (3) item_num = 1: size = total_size + 512 Bytes, The first
+	 * block, memory will overflow.
+	 * The reason to do so is to minimize the size of the memory,
+	 * making malloc easier to perform successfully.
+	 */
+	item_num = (item_num > 10) ? 10 : (item_num - 1);
+	size = item_num ? (total_size / item_num) : (total_size + 512);
+	size = (size + VENDOR_BTYE_ALIGN) & (~VENDOR_BTYE_ALIGN);
+	/* Find item_num value that can make the memory overflow */
+	for (id = 0; id <= item_num; id++) {
+		if (((id + 1) * size) > total_size) {
+			item_num = id;
+			break;
+		}
+	}
+	/* malloc */
+	buffer = (u8 *)malloc(size);
+	if (buffer == NULL) {
+		printf("[Vendor Test]:Malloc failed(size=%d)!\n", size);
+		return -ENOMEM;
+	}
+
+	/* THIRD TEST: Single Item memory overflow test */
+	printf("[Vendor Test]:<Single Item Memory Overflow> Test Start...\n");
+	/* The value can be arbitrary */
+	memset(buffer, 'a', size);
+	/* Any id value that was used before */
+	id = 0;
+	printf("[Vendor Test]:id=%d, size=%d.\n", id, size);
+	ret = vendor_storage_write(id, buffer, size);
+	if (!ret)
+		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:OK\n");
+	else
+		printf("[Vendor Test]:<Single Item Memory Overflow> Test End, States:Failed\n");
+
+	/* FORTH TEST: Total memory overflow test */
+	printf("[Vendor Test]:<Total memory overflow> Test Start...\n");
+	printf("[Vendor Test]:item_num=%d, size=%d.\n", item_num, size);
+
+	vendor_test_reset();
+	for (id = 0; id <= item_num; id++) {
+		memset(buffer, id, size);
+		ret = vendor_storage_write(id, buffer, size);
+		if (ret) {
+			if ((id == item_num) && (ret == -ENOMEM)) {
+				printf("[Vendor Test]:<Total memory overflow> Test End, States:OK\n");
+				break;
+			} else {
+				printf("[Vendor Test]:<Total memory overflow> Test End, States:Failed\n");
+				break;
+			}
+		}
+		debug("\t#id=%03d success,data=0x%02x,size=%d.\n", id, *buffer, size);
+	}
+
+	/* Test end */
+	printf("[Vendor Test]:After Test, Vendor Resetting...\n");
+	vendor_test_reset();
+	printf("[Vendor Test]:Test End.\n");
+	free(buffer);
+
+	return 0;
+}
+#endif /* VENDOR_STORAGE_TEST */

commit 5d86b08ce2b6fb8cfa407b40b282e41b17ebc7e8
Author: francis.fan <francis.fan@rock-chips.com>
Date:   Fri Oct 20 10:24:22 2017 +0800

    rockchip: add get_bootdev_type api
    
    Change-Id: Iebba25e824881a107615674f0700a39e03823949
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index a8c4488c3a..2ffc8119a1 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -77,3 +77,28 @@ int blkdev_write(void *buffer, u32 blk, u32 cnt)
 	return mmcblk_write(mmc, buffer, blk, cnt);
 }
 
+/* Gets the storage type of the current device */
+int get_bootdev_type(void)
+{
+	int type = 0;
+
+	#ifdef CONFIG_EMMC_BOOT
+		type = BOOT_FROM_EMMC;
+	#endif /* CONFIG_EMMC_BOOT */
+	#ifdef CONFIG_QSPI_BOOT
+		type = BOOT_FROM_SPI_NAND;
+	#endif /* CONFIG_QSPI_BOOT */
+	#ifdef CONFIG_NAND_BOOT
+		typpe = BOOT_FROM_FLASH;
+	#endif /* CONFIG_NAND_BOOT */
+	#ifdef CONFIG_NOR_BOOT
+		type = BOOT_FROM_SPI_NOR;
+	#endif /* CONFIG_NOR_BOOT */
+
+	/* For current use(Only EMMC support!) */
+	if (!type)
+		type = BOOT_FROM_EMMC;
+
+	return type;
+}
+
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
index 0539771d46..f6040d0b7b 100644
--- a/arch/arm/mach-rockchip/rockchip_blk.h
+++ b/arch/arm/mach-rockchip/rockchip_blk.h
@@ -1,7 +1,20 @@
 #ifndef __RK_BLK_H_
 #define __RK_BLK_H_
 
+/*
+ * boot device type define
+ * 1:flash 2:emmc 4:sdcard0 8:sdcard1
+ */
+#define BOOT_FROM_FLASH		(1 << 0)
+#define BOOT_FROM_EMMC		(1 << 1)
+#define BOOT_FROM_SD0		(1 << 2)
+#define BOOT_FROM_SD1		(1 << 3)
+#define BOOT_FROM_SPI_NOR	(1 << 4)
+#define BOOT_FROM_RAM		(1 << 5)
+#define BOOT_FROM_SPI_NAND	(1 << 6)
+
 int blkdev_read(void *buffer, u32 blk, u32 cnt);
 int blkdev_write(void *buffer, u32 blk, u32 cnt);
+int get_bootdev_type(void);
 
 #endif

commit ed5ce517739a2041dc32bb2c8aa2437f7889c5ce
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 23 18:06:55 2017 +0800

    rockchip: test: support regualtor test
    
    1. test current regulator state matches fdt config or not;
    2. test accuracy and correctness of voltage adjustment;
    3. the test command: "rktest regulator".
    
    Change-Id: I184ce36d4da7648a3c3052edbafb37f37c3a29be
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index f3c68c942a..fb6876ee21 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -8,3 +8,4 @@ obj-y += test-rockchip.o
 obj-y += test-timer.o
 obj-y += test-key.o
 obj-y += test-emmc.o
+obj-y += test-regulator.o
diff --git a/test/rockchip/test-regulator.c b/test/rockchip/test-regulator.c
new file mode 100644
index 0000000000..53fddfed51
--- /dev/null
+++ b/test/rockchip/test-regulator.c
@@ -0,0 +1,154 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <common.h>
+#include <dm.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include "test-rockchip.h"
+
+static void regulator_show_dt(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+
+	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
+	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
+		printf("%d uV", uc_pdata->min_uV);
+	else
+		printf("%d ~ %d uV", uc_pdata->min_uV, uc_pdata->max_uV);
+
+	printf("; %s]\n", uc_pdata->boot_on ? "enable" : "disabled");
+}
+
+static void regulator_show_state(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	int enable, uV;
+	int same = 1;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+	enable = regulator_get_enable(dev);
+	uV = regulator_get_value(dev);
+
+	if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
+		same = (enable == uc_pdata->boot_on) &&
+		       (uV == uc_pdata->min_uV);
+
+	printf("\t%s@%s: \t[", dev->name, uc_pdata->name);
+	printf("%d uV", uV);
+	printf("; %s] <%s>\n", enable ? "enable" : "disabled",
+	       same ? "same" : "Not same");
+}
+
+static int regulator_confirm_dt(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+
+	printf("<FDT config>:\n");
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		regulator_show_dt(dev);
+	}
+
+	printf("\n\n\n<NOW state>:\n");
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		regulator_show_state(dev);
+	}
+
+	printf("\n\n\n");
+	printf("1. Please compare <NOW state> and <FDT config>.\n");
+	printf("2. Please measure the volatge of all regulators "
+	       "and compare with <Now state> voltage.\n\n");
+	printf("After above done, you can hit any key to continue test case2...\n\n\n\n");
+
+	while (!getc())
+		;
+
+	return 0;
+}
+
+static int regulator_adjust_voltage(struct udevice *dev)
+{
+	struct dm_regulator_uclass_platdata *uc_pdata;
+	int i, uV, save_uV, step_uV = 12500;
+
+	uc_pdata = dev_get_uclass_platdata(dev);
+
+	/* only not fix voltage regulator will be tested! */
+	if ((uc_pdata->max_uV == uc_pdata->min_uV) ||
+	    !regulator_get_enable(dev))
+		return 0;
+
+	/* save for restore after test done */
+	save_uV = regulator_get_value(dev);
+
+	for (i = 1; i < 4; i++) {
+		uV = regulator_get_value(dev);
+		printf("[%s] ", uc_pdata->name);
+		printf("Try: %d uV --> %d uV;  ", uV, uV + step_uV * i);
+		uV += (step_uV * i);
+		regulator_set_value(dev, uV);
+		printf("Now: %d uV.\n\n", regulator_get_value(dev));
+		printf("Please measure voltage of [%s].\n"
+		       "After done, hit any key to continue...\n\n\n\n",
+		       uc_pdata->name);
+
+		while (!getc())
+			;
+	}
+
+	/* restore voltage */
+	regulator_set_value(dev, save_uV);
+
+	return 0;
+}
+
+static int regulator_confirm_voltage_accuracy(void)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_REGULATOR, &uc);
+	if (ret)
+		return ret;
+
+	for (uclass_first_device(UCLASS_REGULATOR, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		regulator_adjust_voltage(dev);
+	}
+
+	return 0;
+}
+
+int board_regulator_test(int argc, char * const argv[])
+{
+	printf("----------------------------------------------------\n");
+	printf("REGULATOR test case 1: regulator fdt config confirm\n");
+	printf("----------------------------------------------------\n\n");
+	regulator_confirm_dt();
+
+	printf("----------------------------------------------------\n");
+	printf("REGULATOR test case 2: regulator voltage accuracy confirm\n");
+	printf("----------------------------------------------------\n\n");
+	regulator_confirm_voltage_accuracy();
+
+	return 0;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index b709dfc928..463802d3a9 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -17,6 +17,7 @@ static board_module_t g_board_modules[] = {
 	{ .name = "timer",	.test = board_timer_test },
 	{ .name = "key",	.test = board_key_test },
 	{ .name = "emmc",	.test = board_emmc_test },
+	{ .name = "regulator",	.test = board_regulator_test },
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index ad86257c1c..556175476a 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -10,5 +10,6 @@
 int board_timer_test(int argc, char * const argv[]);
 int board_key_test(int argc, char * const argv[]);
 int board_emmc_test(int argc, char * const argv[]);
+int board_regulator_test(int argc, char * const argv[]);
 
 #endif /* _TEST_ROCKCHIP_H */

commit 895be89479e60417e9d3c0aa76d7406f78224f26
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Tue Oct 24 09:46:26 2017 +0800

    rockchip: test: add modular test for eMMC on Rockchip platform
    
    Write assigned data payload into eMMC and read back. Then
    verify the context by comparing the write_buffer with read_buffer
    one by one.
    
    => rktest emmc 20000
    ***********************************************************
    Rockchip Board Module [emmc] Test start.
    ***********************************************************
    
    MMC write: dev # 0, block # 4096, count 20000 ... 20000 blocks written: OK
    eMMC write: size 9MB, used 313ms, speed 31MB/s
    
    MMC read: dev # 0, block # 4096, count 20000 ... 20000 blocks read: OK
    eMMC read: size 9MB, used 234ms, speed 42MB/s
    
    -----------------------------------------------------------
    Rockchip Board Module [emmc] Test end <PASS>.. Total: 4.389s
    -----------------------------------------------------------
    
    Change-Id: Ia8e6e559a41e8b52169326d3cd408ac7d5a02e97
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
index fd5544479a..f3c68c942a 100644
--- a/test/rockchip/Makefile
+++ b/test/rockchip/Makefile
@@ -7,3 +7,4 @@
 obj-y += test-rockchip.o
 obj-y += test-timer.o
 obj-y += test-key.o
+obj-y += test-emmc.o
diff --git a/test/rockchip/test-emmc.c b/test/rockchip/test-emmc.c
new file mode 100644
index 0000000000..d0407aa94b
--- /dev/null
+++ b/test/rockchip/test-emmc.c
@@ -0,0 +1,119 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <cli.h>
+#include <common.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <malloc.h>
+#include "test-rockchip.h"
+
+static u32 atoi(const char *str)
+{
+	u32 s=0;
+
+	while(*str == ' ')
+		str++;
+
+	while(*str >= '0' && *str <= '9') {
+		s = s * 10 + *str - '0';
+		str++;
+	}
+
+	return s;
+}
+
+int board_emmc_test(int argc, char * const argv[])
+{
+	u8 *write_buffer, *read_buffer;
+	u32 i, blocks = 0;
+	unsigned long ts;
+	int err = 0;
+	char cmd_mmc[512] = {0};
+
+	blocks = atoi(argv[2]);
+	if (!blocks) {
+		printf("Usage: rktest emmc blocks\n");
+		printf("8129 <= blocks <= 30000\n");
+		err = -EINVAL;
+		goto err_wb;
+	} else if (blocks % 2) {
+		/* Round up */
+		blocks += 1;
+	} else if (blocks < 8192) {
+		printf("Round up to 8192 blocks compulsively\n");
+		blocks = 8192;
+	} else if (blocks > 30000) {
+		printf("Round down to 30000 blocks compulsively\n");
+		blocks = 30000;
+	}
+
+	/* 1. Prepare memory */
+
+	write_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	if (!write_buffer) {
+		printf("No memory for write_buffer!\n");
+		err = -ENOMEM;
+		goto err_wb;
+	}
+
+	read_buffer = (u8 *)malloc(sizeof(u8) * blocks * 512);
+	if (!read_buffer) {
+		printf("No memory for read_buffer!\n");
+		err = -ENOMEM;
+		goto err_rb;
+	}
+
+	for (i = 0; i < blocks * 512; i++) {
+		write_buffer[i] = i;
+		read_buffer[i] = 0;
+	}
+
+	/* 2. Prepare and start cli command */
+
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc write 0x%x 0x1000 0x%x",
+		 (u32)write_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_mmc, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("eMMC write: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+
+	snprintf(cmd_mmc, sizeof(cmd_mmc), "mmc read 0x%x 0x1000 0x%x",
+		 (u32)read_buffer, blocks);
+	ts = get_timer(0);
+	err = cli_simple_run_command(cmd_mmc, 0);
+	ts = get_timer(0) - ts;
+	if (!err)
+		goto err_mw;
+
+	printf("eMMC read: size %dMB, used %ldms, speed %ldMB/s\n",
+		blocks / 2048, ts, (blocks >> 1) / ts);
+
+	/* 3. Verify the context */
+
+	err = 0;
+	for (i = 0; i < blocks * 512; i++) {
+		if (write_buffer[i] != read_buffer[i]) {
+			printf("eMMC context compare err!\n");
+			err = -EINVAL;
+			goto err_mw;
+		}
+	}
+
+err_mw:
+	free(read_buffer);
+	read_buffer = NULL;
+err_rb:
+	free(write_buffer);
+	write_buffer = NULL;
+err_wb:
+	return err;
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
index 7fc5e724c6..b709dfc928 100644
--- a/test/rockchip/test-rockchip.c
+++ b/test/rockchip/test-rockchip.c
@@ -16,6 +16,7 @@ typedef struct board_module {
 static board_module_t g_board_modules[] = {
 	{ .name = "timer",	.test = board_timer_test },
 	{ .name = "key",	.test = board_key_test },
+	{ .name = "emmc",	.test = board_emmc_test },
 };
 
 static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
index cf1468c383..ad86257c1c 100644
--- a/test/rockchip/test-rockchip.h
+++ b/test/rockchip/test-rockchip.h
@@ -9,5 +9,6 @@
 
 int board_timer_test(int argc, char * const argv[]);
 int board_key_test(int argc, char * const argv[]);
+int board_emmc_test(int argc, char * const argv[]);
 
 #endif /* _TEST_ROCKCHIP_H */

commit 19d1b8c5dc42ff641461e08f34f7d2f2a3f3c995
Author: francis.fan <francis.fan@rock-chips.com>
Date:   Fri Oct 20 10:20:15 2017 +0800

    rockchip: add blkdev_write api
    
    Change-Id: I8adc1d01ec3e294dedbdf467d664b7c267e333dd
    Signed-off-by: Francis Fan <francis.fan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
index beeb63719f..a8c4488c3a 100644
--- a/arch/arm/mach-rockchip/blk.c
+++ b/arch/arm/mach-rockchip/blk.c
@@ -52,3 +52,28 @@ int blkdev_read(void *buffer, u32 blk, u32 cnt)
 
 	return mmcblk_read(mmc, buffer, blk, cnt);
 }
+
+static int mmcblk_write(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+{
+	u32 n;
+
+	debug("\nMMC write: block # 0x%x, count 0x%x  from %p... ",
+	      blk, cnt, buffer);
+
+	n = blk_dwrite(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
+	debug("%d blocks write: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+
+	return (n == cnt) ? 0 : -EIO;
+}
+
+int blkdev_write(void *buffer, u32 blk, u32 cnt)
+{
+	if (!mmc) {
+		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
+		if (!mmc)
+			return -ENODEV;
+	}
+
+	return mmcblk_write(mmc, buffer, blk, cnt);
+}
+
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
index 3e1483e708..0539771d46 100644
--- a/arch/arm/mach-rockchip/rockchip_blk.h
+++ b/arch/arm/mach-rockchip/rockchip_blk.h
@@ -2,5 +2,6 @@
 #define __RK_BLK_H_
 
 int blkdev_read(void *buffer, u32 blk, u32 cnt);
+int blkdev_write(void *buffer, u32 blk, u32 cnt);
 
 #endif

commit 9648c394760ed91799a1ffdc99d39d6186da13e9
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:46:18 2017 +0800

    configs: rockchip: enable usb-phy support for evb_rk3128
    
    This change enables usb-phy support for evb_rk3128_defconfig.
    
    Change-Id: Ic23b31690fe9ad9e4d89e31a925c021922d28d94
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 3004f5d7d8..6c83f68f0d 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -26,6 +26,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_REGULATOR_PWM=y

commit 0b27963c7b3b8e2506af7e2124ca215e3e616793
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:31:40 2017 +0800

    configs: rockchip: enable usb-phy support for evb_rk3126
    
    This change enables usb-phy support for evb_rk3126_defconfig.
    
    Change-Id: I5bc417c056d5f30aeaecf8d79cd1a57df5d79614
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 4568031ece..b9d5c53940 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -31,6 +31,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y

commit a0c2c8528d105a0e4582fac0487b2c261078cce3
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:44:26 2017 +0800

    ARM: dts: rockchip: enabe usb-phy support for rk3128-evb
    
    This change enables usb-phy support for rk3128-evb board.
    
    Change-Id: I71029cd2b8a916bf474f3b31ba3a1b554eccbfd2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 9170d1e87d..e8ba419ed5 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -50,6 +50,18 @@
 	};
 };
 
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };

commit 14fda4434d8c7b1bab8645a5829fd1fba108b072
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:29:54 2017 +0800

    ARM: dts: rockchip: enabe usb-phy support for rk3126-evb
    
    This change enables usb-phy support for rk3126-evb board.
    
    Change-Id: I9df0e31688ce86683821a1dae0d0832d8c8dba1d
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 062d57db63..b6370a8d66 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -321,6 +321,18 @@
 	};
 };
 
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
 &usb_host_ehci {
 	status = "okay";
 };

commit ed03aa52c27371436d92960335071aa3f3631d55
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:28:24 2017 +0800

    ARM: dts: rockchip: add usb-phy nodes for rk3128
    
    This change adds usb-phy nodes support for rk3128 SoCs.
    
    Change-Id: I33a3a648efe1bb8c022534c0c0d41f310f8e3723
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 91ce5ebe0e..bed21b4bf8 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -416,6 +416,35 @@
 		interrupts = <GIC_PPI 9 0xf04>;
 	};
 
+	u2phy: usb2-phy {
+		compatible = "rockchip,rk3128-usb2phy";
+		reg = <0x017c 0x0c>;
+		rockchip,grf = <&grf>;
+		clocks = <&cru SCLK_OTGPHY0>;
+		clock-names = "phyclk";
+		#clock-cells = <0>;
+		clock-output-names = "usb480m_phy";
+		#phy-cells = <1>;
+		status = "disabled";
+
+		u2phy_otg: otg-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "otg-bvalid", "otg-id",
+					  "linestate";
+			status = "disabled";
+		};
+
+		u2phy_host: host-port {
+			#phy-cells = <0>;
+			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate";
+			status = "disabled";
+		};
+	};
+
 	usb_otg: usb@10180000 {
 		compatible = "rockchip,rk3128-usb", "rockchip,rk3288-usb",
 			     "snps,dwc2";
@@ -424,6 +453,8 @@
 		dr_mode = "otg";
 		g-use-dma;
 		hnp-srp-disable;
+		phys = <&u2phy 0>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -431,6 +462,8 @@
 		compatible = "generic-ehci";
 		reg = <0x101c0000 0x20000>;
 		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -438,6 +471,8 @@
 		compatible = "generic-ohci";
 		reg = <0x101e0000 0x20000>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 

commit c86f0a42bb1b92ca1e0da0fea9b6b356c34ff5fc
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Tue Oct 17 14:33:34 2017 +0800

    phy: rockchip-inno-usb2: fixup grf_base get method
    
    Since the parent of udevice is always exist, the previous logic
    would be failed to get grf_base when usb-phy nodes was as a child
    node of root_driver. This patch fixup it.
    
    Change-Id: I8cb9ee2f4b703a030ec8e129d4d947f11006fe3c
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
index 1f56976980..e071ff80a9 100644
--- a/drivers/phy/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -451,34 +451,22 @@ static int rockchip_usb2phy_exit(struct phy *phy)
 static int rockchip_usb2phy_probe(struct udevice *dev)
 {
 	const struct rockchip_usb2phy_cfg *phy_cfgs;
-	struct rockchip_usb2phy *rphy;
-	struct udevice *parent;
+	struct rockchip_usb2phy *rphy = dev_get_priv(dev);
+	struct udevice *parent = dev->parent;
 	u32 reg, index;
 
-	rphy = dev_get_priv(dev);
-
-	parent = dev_get_parent(dev);
-	if (!parent) {
-		dev_dbg(dev, "could not find u2phy parent\n");
-		if (ofnode_read_bool(dev_ofnode(dev), "rockchip,grf"))
-			rphy->usbgrf_base =
-				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	} else {
-		rphy->grf_base =
-			(void __iomem *)((uintptr_t)dev_read_addr(parent));
-	}
+	if (!strncmp(parent->name, "root_driver", 11) &&
+	    dev_read_bool(dev, "rockchip,grf"))
+		rphy->grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	else
+		rphy->grf_base = (void __iomem *)dev_read_addr(parent);
 
 	if (rphy->grf_base <= 0) {
 		dev_err(dev, "get syscon grf failed\n");
 		return -EINVAL;
 	}
 
-	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
-		dev_err(dev, "could not read reg\n");
-		return -EINVAL;
-	}
-
-	if (ofnode_read_bool(dev_ofnode(dev), "rockchip,usbgrf")) {
+	if (dev_read_bool(dev, "rockchip,usbgrf")) {
 		rphy->usbgrf_base =
 			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
 		if (rphy->usbgrf_base <= 0) {
@@ -489,6 +477,11 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
 		rphy->usbgrf_base = NULL;
 	}
 
+	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
+		dev_err(dev, "could not read reg\n");
+		return -EINVAL;
+	}
+
 	phy_cfgs =
 		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
 	if (!phy_cfgs) {

commit ee4e2fd1d0b13e6aeb8365796916e828a9ec5188
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:42:39 2017 +0800

    configs: rockchip: enable ehci/ohci support for evb-rk3128
    
    This change enables usb ehci/ohci support for evb-rk3128 board.
    
    Change-Id: I26b7b92779a9f3754fd3b7b92524f6ad069a185b
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index 52b43442f9..3004f5d7d8 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -37,7 +37,12 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y

commit 2578e62ae3e11ce0b24135a78fad076493656fb2
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 18:10:55 2017 +0800

    configs: rockchip: enable ehci/ohci support for evb-rk3126
    
    This change enables usb ehci/ohci support for evb-rk3126 and configure
    max number ports of the root hub for ohci driver.
    
    Change-Id: Ic48964c00400b00f3602f009ce32b3cc9fcb8fa0
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index ebb961135a..4568031ece 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -47,7 +47,12 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index fc37ac4908..1fbcd4b629 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -70,4 +70,8 @@
 
 #endif
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
 #endif

commit 0633c67a49ba77ae387ee1fd0594d7cf37168933
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:41:04 2017 +0800

    configs: rockchip: enable fastboot for evb-rk3128
    
    This change enables fastboot support for evb-rk3128 board.
    
    Change-Id: Ic1bf2556e78376a8fac2e1b38fd206c8ecbb1db5
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index e704305698..52b43442f9 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -5,7 +5,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y

commit 6942ad29e76b01d555f09f19caaddc75fb55d75a
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 08:55:40 2017 +0800

    configs: rockchip: enable fastboot for evb-rk3126
    
    This change enables fastboot support for evb-rk3126 board.
    
    Change-Id: I1bc38ce106bbcb3164f6c0f07ef55813341c80a1
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 01654d3d79..ebb961135a 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -8,7 +8,13 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y

commit 642aba94af51b80ef50aadbbda2d3cebf350563c
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Thu Oct 19 10:38:05 2017 +0800

    ARM: dts: rockchip: enable usb host for rk3128-evb
    
    This patch enables usb ehci/ohci host for rk3128-evb board.
    
    Change-Id: Ibc1a43a437c5ad0bdfaf17f2e424ca6b5689fbf8
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 0397d2f82b..9170d1e87d 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -50,7 +50,16 @@
 	};
 };
 
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
 &usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 

commit 163744ea5b1657b4352c290c598628df56c2a0d9
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 18:09:23 2017 +0800

    ARM: dts: rockchip: enable usb host for rk3126-evb
    
    This patch enables usb ehci/ohci host for rk3126-evb board.
    
    Change-Id: I1571a6cd4751b208a74bba01ae01e9940bf1eecc
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index c9ccfecde0..062d57db63 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -321,6 +321,14 @@
 	};
 };
 
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
+
 &usb_otg {
 	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";

commit 06c9506f6f34ca140c2c41fd8ff6b2e5cb496232
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 18:07:47 2017 +0800

    ARM: dts: rockchip: add usb host nodes for rk3128
    
    This change adds usb ehci/ohci host nodes for rk3128 SoCs.
    
    Change-Id: Ia45eea69185dbe1b82b6bb234f2f7a097359d3ea
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 348feaeef1..91ce5ebe0e 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -427,6 +427,20 @@
 		status = "disabled";
 	};
 
+	usb_host_ehci: usb@101c0000 {
+		compatible = "generic-ehci";
+		reg = <0x101c0000 0x20000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	usb_host_ohci: usb@101e0000 {
+		compatible = "generic-ohci";
+		reg = <0x101e0000 0x20000>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
 	sdmmc: dwmmc@10214000 {
 		compatible = "rockchip,rk312x-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x10214000 0x4000>;

commit f0f5810719deb85647b17aa63b91c8e4c587ac52
Author: Frank Wang <frank.wang@rock-chips.com>
Date:   Mon Oct 16 16:03:24 2017 +0800

    ARM: dts: rockchip: fixup usb otg nodes for rk312x
    
    This patch deletes incorrect usb host nodes and fixup usb otg nodes
    for rk312x SoCs.
    
    Change-Id: I0bb0e35c79e712e4d1ef4342b456e955260978c2
    Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 3dc2cab6b2..c9ccfecde0 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -321,11 +321,8 @@
 	};
 };
 
-&usb_host {
-	status = "okay";
-};
-
 &usb_otg {
+	vbus-supply = <&vcc5v0_otg>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 321e9004bd..0397d2f82b 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -50,10 +50,6 @@
 	};
 };
 
-&usb_host {
-	status = "okay";
-};
-
 &usb_otg {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 254388dc11..348feaeef1 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -417,26 +417,14 @@
 	};
 
 	usb_otg: usb@10180000 {
-		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2";
+		compatible = "rockchip,rk3128-usb", "rockchip,rk3288-usb",
+			     "snps,dwc2";
 		reg = <0x10180000 0x40000>;
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_OTG0>;
-		clock-names = "otg";
 		dr_mode = "otg";
-		g-np-tx-fifo-size = <16>;
-		g-rx-fifo-size = <275>;
-		g-tx-fifo-size = <256 128 128 64 64 32>;
 		g-use-dma;
-	};
-
-	usb_host: usb@101c0000 {
-		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
-				"snps,dwc2";
-		reg = <0x101c0000 0x40000>;
-		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_OTG1>;
-		clock-names = "otg";
-		dr_mode = "host";
+		hnp-srp-disable;
+		status = "disabled";
 	};
 
 	sdmmc: dwmmc@10214000 {

commit 631e2524ffc385bce3b9be2c7eb60794d6f3c661
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 23 17:24:41 2017 +0800

    rockchip: rk3126-evb: add adc-keys node
    
    Change-Id: I050094a70f23edd3f55d2bc497ae9cafa8d0a8a3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 6020a9df67..3dc2cab6b2 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include "rk3128.dtsi"
+#include <dt-bindings/input/input.h>
 
 / {
 	model = "Rockchip RK3126 Evaluation board";
@@ -118,6 +119,26 @@
 			};
 		};
 	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 2>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <3300000>;
+
+		button-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <0>;
+		};
+
+		button-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <1650000>;
+		};
+	};
 };
 
 &i2c1 {

commit 1dc7864b9b15e2ddbe18cd7e35a874d4fbef9b97
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 17 20:22:35 2017 +0800

    test: add rockchip board module test
    
    1. add U-boot cmd "rktest", the cmd format:
            "rktest [module_name] [args...]"
    
    2. add timer and key module test, the cmd are:
            "rktest timer", "rktest key"
    
    Change-Id: I7056b7462925d3693a0e6101d83247f3f38736f8
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/test/Kconfig b/test/Kconfig
index 3643761bc6..b53d2d948c 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -15,6 +15,12 @@ config UT_TIME
 	  problems. But if you are having problems with udelay() and the like,
 	  this is a good place to start.
 
+config TEST_ROCKCHIP
+	bool "test Rockchip board modules"
+	depends on ARCH_ROCKCHIP
+	help
+	  This enables the test function for rockchip board modules.
+
 source "test/dm/Kconfig"
 source "test/env/Kconfig"
 source "test/overlay/Kconfig"
diff --git a/test/Makefile b/test/Makefile
index 6305afb211..d4e86ff967 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_SANDBOX) += command_ut.o
 obj-$(CONFIG_SANDBOX) += compression.o
 obj-$(CONFIG_SANDBOX) += print_ut.o
 obj-$(CONFIG_UT_TIME) += time_ut.o
+obj-$(CONFIG_TEST_ROCKCHIP) += rockchip/
diff --git a/test/rockchip/Makefile b/test/rockchip/Makefile
new file mode 100644
index 0000000000..fd5544479a
--- /dev/null
+++ b/test/rockchip/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += test-rockchip.o
+obj-y += test-timer.o
+obj-y += test-key.o
diff --git a/test/rockchip/test-key.c b/test/rockchip/test-key.c
new file mode 100644
index 0000000000..8a3cf6348f
--- /dev/null
+++ b/test/rockchip/test-key.c
@@ -0,0 +1,373 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <adc.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include <key.h>
+#include "test-rockchip.h"
+
+enum {
+	INVAL_KEY = 0,
+	ADC_KEY,
+	GPIO_KEY,
+	PMIC_KEY,
+};
+
+struct adc_key {
+	u8 channel;
+	int value;
+	int microvolt;
+	int margin;
+	int vref;
+};
+
+struct gpio_key {
+	int irq;
+};
+
+struct key_info {
+	const char *name;
+	int type;
+	struct adc_key adc;
+	struct gpio_key gpio;
+};
+
+#define ADC_MARGIN		30
+#define PMIC_PWRKEY_CNT		1
+
+static int g_key_count;
+
+static void gpio_irq_handler(int irq, void *data)
+{
+	struct key_info *key = data;
+
+	printf("gpio_irq_handler: irq=%d, key name=%s\n", irq, key->name);
+}
+
+static struct key_info *parse_dt_adc_key_node(const void *blob,
+					      int adc_key_node,
+					      struct key_info *keys)
+{
+	struct key_info *key = keys;
+	u32 adc_channels[2];
+	int node, vref, err;
+
+	/* Get vref */
+	vref = fdtdec_get_int(blob, adc_key_node,
+			      "keyup-threshold-microvolt", -1);
+	if (vref < 0) {
+		printf("failed read 'keyup-threshold-microvolt', ret=%d\n", vref);
+		return NULL;
+	}
+
+	/* Get io channel */
+	err = fdtdec_get_int_array(blob, adc_key_node, "io-channels",
+				   adc_channels, 2);
+	if (err) {
+		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
+		return NULL;
+	}
+
+	/* Parse every adc key data */
+	for (node = fdt_first_subnode(blob, adc_key_node);
+	     node >= 0;
+	     node = fdt_next_subnode(blob, node), key++) {
+		key->name = fdt_getprop(blob, node, "label", NULL);
+		key->type = ADC_KEY;
+		key->adc.vref = vref;
+		key->adc.margin = ADC_MARGIN;
+		key->adc.channel = adc_channels[1];
+		key->adc.microvolt = fdtdec_get_int(blob, node,
+				      "press-threshold-microvolt", -1);
+		if (key->adc.microvolt < 0) {
+			printf("failed read 'press-threshold-microvolt' of %s key, ret=%d\n",
+			       key->name, key->adc.microvolt);
+			return NULL;
+		}
+		/* Convert microvolt to adc value */
+		key->adc.value = key->adc.microvolt / (key->adc.vref / 1024);
+	}
+
+	return key;
+}
+
+static struct key_info *parse_dt_rockchip_key_node(const void *blob,
+						   int rockchip_key_node,
+						   struct key_info *keys)
+{
+	struct key_info *key = keys;
+	u32 gpios[2], adc_channels[2];
+	int node, err, adcval, irq;
+
+	/* Get io channel */
+	err = fdtdec_get_int_array(blob, rockchip_key_node, "io-channels",
+				   adc_channels, 2);
+	if (err) {
+		printf("failed read 'io-channels' of %s key, ret=%d\n", key->name, err);
+		return NULL;
+	}
+
+	/* Parse every adc/gpio key data */
+	for (node = fdt_first_subnode(blob, rockchip_key_node);
+	     node >= 0;
+	     node = fdt_next_subnode(blob, node), key++) {
+		adcval = fdtdec_get_int(blob, node,
+					"rockchip,adc_value", -1);
+		/* This is a adc key */
+		if (adcval >= 0) {
+			key->name = fdt_getprop(blob, node, "label", NULL);
+			key->type = ADC_KEY;
+			key->adc.value = adcval;
+			key->adc.margin = ADC_MARGIN;
+			key->adc.channel = adc_channels[1];
+		/* This is a gpio key */
+		} else {
+			key->name = fdt_getprop(blob, node, "label", NULL);
+			key->type = GPIO_KEY;
+			err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
+			if (err) {
+				printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
+				return NULL;
+			}
+			irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+			key->gpio.irq = irq;
+			irq_install_handler(irq, gpio_irq_handler, key);
+			irq_handler_enable(irq);
+			irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+		}
+	}
+
+	return key;
+}
+
+static struct key_info *parse_dt_gpio_key_node(const void *blob,
+					       int gpio_key_node,
+					       struct key_info *keys)
+{
+	struct key_info *key = keys;
+	u32 gpios[2];
+	int node, irq, err;
+
+	for (node = fdt_first_subnode(blob, gpio_key_node);
+	     node >= 0;
+	     node = fdt_next_subnode(blob, node), key++) {
+		key->name = fdt_getprop(blob, node, "label", NULL);
+		key->type = GPIO_KEY;
+		err = fdtdec_get_int_array(blob, node, "gpios", gpios, 2);
+		if (err) {
+			printf("failed read 'gpios' of %s key, ret=%d\n", key->name, err);
+			return NULL;
+		}
+		irq = phandle_gpio_to_irq(gpios[0], gpios[1]);
+		key->gpio.irq = irq;
+		irq_install_handler(irq, gpio_irq_handler, key);
+		irq_handler_enable(irq);
+		irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
+	}
+
+	return key;
+}
+
+static struct key_info *keys_init(void)
+{
+	const char *key_name = "pmic-power";
+	const void *blob = gd->fdt_blob;
+	struct key_info *key, *keys;
+	struct udevice *dev;
+	int adc_key_node, rockchip_key_node, gpio_key_node, i;
+	int adc_key_compat = 0, rockchip_key_compat = 0, gpio_key_compat = 0;
+	int count = 0;
+	const char *label[4] = { "INVAL", "ADC", "GPIO", "PMIC", };
+	/*
+	 * "rockchip,key": rockchip inner version;
+	 * "adc-keys": upsteam version;
+	 */
+	adc_key_node = fdt_node_offset_by_compatible(blob, 0, "adc-keys");
+	if (adc_key_node >= 0) {
+		if (!fdtdec_get_is_enabled(blob, adc_key_node)) {
+			printf("'adc-keys' node is disabled\n");
+		} else {
+			adc_key_compat = 1;
+			count += fdtdec_get_child_count(blob, adc_key_node);
+			printf("find 'adc-keys', board total %d keys\n", count);
+		}
+	}
+
+	rockchip_key_node = fdt_node_offset_by_compatible(blob, 0, "rockchip,key");
+	if (rockchip_key_node >= 0) {
+		if (!fdtdec_get_is_enabled(blob, rockchip_key_node)) {
+			printf("'rockchip,key' node is disabled\n");
+		} else {
+			rockchip_key_compat = 1;
+			count += fdtdec_get_child_count(blob, rockchip_key_node);
+			printf("find 'rockchip,key', board total %d keys\n", count);
+		}
+	}
+
+	gpio_key_node = fdt_node_offset_by_compatible(blob, 0, "gpio-keys");
+	if (gpio_key_node >= 0) {
+		if (!fdtdec_get_is_enabled(blob, gpio_key_node)) {
+			printf("'gpio-keys' node is disabled\n");
+		} else {
+			gpio_key_compat = 1;
+			count += fdtdec_get_child_count(blob, gpio_key_node);
+			printf("find 'gpio-key', board total %d keys\n", count);
+		}
+	}
+
+	/* reserve more for pmic pwrkey or gpio pwrkey */
+	g_key_count = count + PMIC_PWRKEY_CNT;
+	keys = calloc(g_key_count, sizeof(*key));
+	if (!keys) {
+		printf("calloc for key failed\n");
+		return NULL;
+	}
+
+	key = keys;
+
+	/* Parse adc_key_compat node */
+	if (adc_key_compat) {
+		key = parse_dt_adc_key_node(blob, adc_key_node, key);
+		if (!key) {
+			printf("parse_dt_adc_key_node failed\n");
+			goto out;
+		}
+	}
+	/* Parse rockchip_key_compat node */
+	if (rockchip_key_compat) {
+		key = parse_dt_rockchip_key_node(blob, rockchip_key_node, key);
+		if (!key) {
+			printf("parse_dt_rockchip_key_node failed\n");
+			goto out;
+		}
+	}
+	/* Parse gpio_key_compat node */
+	if (gpio_key_compat) {
+		key = parse_dt_gpio_key_node(blob, gpio_key_node, key);
+		if (!key) {
+			printf("parse_dt_gpio_key_node failed\n");
+			goto out;
+		}
+	}
+
+	/* Parse PMIC pwrkey */
+	if (uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev)) {
+		/* PMIC pwrkey not included */
+		g_key_count -= PMIC_PWRKEY_CNT;
+		printf("PMIC pwrkey not found, and will not be tested\n");
+	} else {
+		key->name = key_name;
+		key->type = PMIC_KEY;
+		printf("find 'pmic-power', board total %d keys\n", g_key_count);
+	}
+
+	printf("Support %d keys are:\n", g_key_count);
+	for (i = 0; i < g_key_count; i++) {
+		printf("\tkey-%d: name=%s, type=%s, "
+		       "[ADC]: channel=%d, vref=%d, "
+		       "microvolt=%d, value=%d, margin=%d "
+		       "[GPIO]: IRQ=%d:\n",
+		       i, keys[i].name, label[keys[i].type],
+		       keys[i].adc.channel, keys[i].adc.vref,
+		       keys[i].adc.microvolt, keys[i].adc.value,
+		       keys[i].adc.margin, keys[i].gpio.irq);
+	}
+
+	return keys;
+
+out:
+	free(keys);
+
+	return NULL;
+}
+
+static int key_test(struct key_info *keys)
+{
+	struct udevice *dev = NULL;
+	struct key_info *key;
+	unsigned int adcval;
+	int adc_h, adc_l;
+	int err, i;
+	ulong start;
+
+	if (g_key_count == 0) {
+		printf("Find total 0 keys, finish test\n");
+		goto out;
+	}
+
+	printf("\nYou have 30s to test keys, press or release them, start!\n");
+
+	start = get_timer(0);
+	while (get_timer(start) <= 30000) {
+		mdelay(100);
+		for (i = 0, key = keys; i < g_key_count; i++, key++) {
+			if (key->type == ADC_KEY) {
+				err = adc_channel_single_shot("saradc",
+						key->adc.channel, &adcval);
+				if (err) {
+					printf("\t%s: read saradc value failed\n", key->name);
+				} else {
+					adc_h = key->adc.value + key->adc.margin;
+					if (key->adc.value > key->adc.margin)
+						adc_l = key->adc.value - key->adc.margin;
+					else
+						adc_l = key->adc.value;
+
+					if ((adcval <= adc_h) && (adcval >= adc_l))
+						printf("\t%s: pressed down\n", key->name);
+				}
+			} else if (key->type == GPIO_KEY) {
+				/* it is a irq, so nothing to do */
+			} else if (key->type == PMIC_KEY) {
+				if (!dev) {
+					err = uclass_get_device_by_name(UCLASS_KEY, "pwrkey", &dev);
+					if (err) {
+						printf("get %s key failed\n", key->name);
+						goto out;
+					}
+				}
+				if (key_read(dev) == KEY_PRESS_DOWN)
+					printf("\t%s: pressed down\n", key->name);
+			} else {
+				printf("%s: Unknown key type!\n", key->name);
+			}
+		}
+	}
+
+	for (i = 0, key = keys; i < g_key_count; i++, key++) {
+		if (key->type == GPIO_KEY) {
+			printf("release irq of %s key\n", key->name);
+			irq_free_handler(key->gpio.irq);
+		}
+	}
+
+	return 0;
+
+out:
+	free(keys);
+
+	return -EINVAL;
+}
+
+int board_key_test(int argc, char * const argv[])
+{
+	struct key_info *keys;
+
+	keys = keys_init();
+	if (!keys) {
+		printf("%s: keys init failed\n", __func__);
+		return -EINVAL;
+	}
+
+	return key_test(keys);
+}
diff --git a/test/rockchip/test-rockchip.c b/test/rockchip/test-rockchip.c
new file mode 100644
index 0000000000..7fc5e724c6
--- /dev/null
+++ b/test/rockchip/test-rockchip.c
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include "test-rockchip.h"
+
+typedef struct board_module {
+	char *name;
+	int (*test)(int argc, char * const argv[]);
+} board_module_t;
+
+static board_module_t g_board_modules[] = {
+	{ .name = "timer",	.test = board_timer_test },
+	{ .name = "key",	.test = board_key_test },
+};
+
+static int do_rockchip_test(cmd_tbl_t *cmdtp, int flag,
+			    int argc, char * const argv[])
+{
+	ulong ms_start = 0, ms = 0, sec = 0;
+	board_module_t *module = NULL;
+	char *module_name = NULL;
+	int index = 0, err = 0;
+
+	if (argc >= 2) {
+		module_name = argv[1];
+	} else {
+		printf("cmd format: test_rockchip [module_name] [args...]\n");
+		return 0;
+	}
+
+	if (!module_name)
+		return 0;
+
+	printf("***********************************************************\n");
+	printf("Rockchip Board Module [%s] Test start.\n", module_name);
+	printf("***********************************************************\n");
+
+	for (index = 0; index < ARRAY_SIZE(g_board_modules); index++) {
+		module = &g_board_modules[index];
+		if (module && !strcmp(module->name, module_name)) {
+			ms_start = get_timer(0);
+
+			err = module->test(argc, argv);
+
+			ms = get_timer(ms_start);
+			if (ms >= 1000) {
+				sec = ms / 1000;
+				ms = ms % 1000;
+			}
+		}
+	}
+
+	printf("-----------------------------------------------------------\n");
+	printf("Rockchip Board Module [%s] Test end <%s>.. Total: %lu.%lus\n",
+	       module->name, err ? "FAILED" : "PASS", sec, ms);
+	printf("-----------------------------------------------------------\n\n\n");
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rktest, 10, 0, do_rockchip_test,
+	"Rockchip Board Module Test",
+	""
+);
diff --git a/test/rockchip/test-rockchip.h b/test/rockchip/test-rockchip.h
new file mode 100644
index 0000000000..cf1468c383
--- /dev/null
+++ b/test/rockchip/test-rockchip.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _TEST_ROCKCHIP_H
+#define _TEST_ROCKCHIP_H
+
+int board_timer_test(int argc, char * const argv[]);
+int board_key_test(int argc, char * const argv[]);
+
+#endif /* _TEST_ROCKCHIP_H */
diff --git a/test/rockchip/test-timer.c b/test/rockchip/test-timer.c
new file mode 100644
index 0000000000..f7b7db0cb6
--- /dev/null
+++ b/test/rockchip/test-timer.c
@@ -0,0 +1,141 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <irq-generic.h>
+#include <irq-platform.h>
+#include "test-rockchip.h"
+
+#define TIMER_LOAD_COUNT0	0x00
+#define TIMER_LOAD_COUNT1	0x04
+#define TIMER_CTRL		0x10
+#define TIMER_INTSTATUS		0x18
+
+#define SYS_COUNTER_FREQ0	24000000
+#define SYS_COUNTER_FREQ1	0
+
+#define TIMER_EN		BIT(0)
+#define TIMER_INT_EN		BIT(2)
+#define TIMER_CLR_INT		BIT(0)
+
+#if defined(CONFIG_ROCKCHIP_RK3128)
+#define TIMER_BASE		(0x20044000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK322X)
+#define TIMER_BASE		(0x110C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+#define TIMER_BASE		(0xFF6B0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+#define TIMER_BASE		(0xFF1C0000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+#define TIMER_BASE		(0xFF810000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+#define TIMER_BASE		(0xFF850000 + 0x20)	/* TIMER 1 */
+#define TIMER_IRQ		IRQ_TIMER1
+#else
+"Missing definitions of timer module test"
+#endif
+
+/*************************** timer irq test ***********************************/
+static ulong seconds;
+
+/* must use volatile to avoid being optimized by complier */
+static int volatile exit;
+
+static void timer_irq_handler(int irq, void *data)
+{
+	static int count;
+	int period;
+
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+
+	period = get_timer(seconds);
+	printf("timer_irq_handler: round-%d, irq=%d, period=%dms\n",
+	       count++, irq, period);
+	seconds = get_timer(0);
+
+	if (count >= 5) {
+		exit = 1;
+		irq_free_handler(TIMER_IRQ);
+		printf("timer_irq_handler: irq test finish.\n");
+	}
+}
+
+static int soc_timer_irq_test_init(void)
+{
+	writel(SYS_COUNTER_FREQ0, TIMER_BASE + TIMER_LOAD_COUNT0);
+	writel(SYS_COUNTER_FREQ1, TIMER_BASE + TIMER_LOAD_COUNT1);
+	writel(TIMER_CLR_INT, TIMER_BASE + TIMER_INTSTATUS);
+	writel(TIMER_EN | TIMER_INT_EN, TIMER_BASE + TIMER_CTRL);
+
+	irq_install_handler(TIMER_IRQ, timer_irq_handler, NULL);
+	irq_handler_enable(TIMER_IRQ);
+
+	seconds = get_timer(0);
+
+	while (!exit)
+		;
+
+	return 0;
+}
+
+/*************************** timer delay test *********************************/
+static inline uint64_t arch_counter_get_cntpct(void)
+{
+	uint64_t cval;
+
+	isb();
+	asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval));
+	return cval;
+}
+
+static void sys_timer_delay_test_init(void)
+{
+	ulong delay_t = 100, cost_t;
+	u64 tick_start;
+	int i;
+
+	for (i = 0; i < 5; i++) {
+		printf("sys timer delay test, round-%d\n", i);
+
+		/* us delay */
+		tick_start = arch_counter_get_cntpct();
+		udelay(delay_t);
+		cost_t = (arch_counter_get_cntpct() - tick_start) / 24;
+		printf("\tdesire delay %luus, actually delay %luus\n",
+		       delay_t, cost_t);
+
+		/* ms delay */
+		tick_start = arch_counter_get_cntpct();
+		mdelay(delay_t);
+		cost_t = (arch_counter_get_cntpct() - tick_start) / 24000;
+
+		printf("\tdesire delay %lums, actually delay: %lums\n",
+		       delay_t, cost_t);
+
+		/* ms delay */
+		tick_start = arch_counter_get_cntpct();
+		mdelay(delay_t * 10);
+		cost_t = (arch_counter_get_cntpct() - tick_start) / 24000;
+
+		printf("\tdesire delay %lums, actually delay: %lums\n",
+		       delay_t * 10, cost_t);
+	}
+}
+
+int board_timer_test(int argc, char * const argv[])
+{
+	sys_timer_delay_test_init();
+
+	soc_timer_irq_test_init();
+
+	return 0;
+}

commit 533c9f30f7a98163be985e74d8483ec0ddfe6ceb
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 19 20:48:18 2017 +0800

    env: set env_update() parameter 'varvalue' as 'const char *'
    
    Change-Id: I1591fd507363545af5f56a83e0932c317ae7b915
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 060e38dbb0..f6213bd30f 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -399,7 +399,7 @@ static int env_replace(const char *varname, const char *substr,
 
 #define ARGS_ITEM_NUM	50
 
-int env_update(const char *varname, char *varvalue)
+int env_update(const char *varname, const char *varvalue)
 {
 	/* 'a_' means "varargs_'; 'v_' means 'varvalue_' */
 	char *varargs;
diff --git a/include/common.h b/include/common.h
index 501646fed9..d5067cd1d0 100644
--- a/include/common.h
+++ b/include/common.h
@@ -391,7 +391,7 @@ int env_set(const char *varname, const char *value);
  * @valude: Value to append/replace
  * @return 0 if OK, 1 on error
  */
-int env_update(const char *varname, char *varvalue);
+int env_update(const char *varname, const char *varvalue);
 
 /**
  * env_set_ulong() - set an environment variable to an integer

commit bdf9542acdc083040e7a589eff7a15d6e2dd95d0
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:40:52 2017 +0800

    configs: evb-rk3126: enable display relate config
    
    Change-Id: I65e6f028eafa9422647d249ba53e9cee740b39c8
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 152dfbe201..01654d3d79 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -1,6 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_ROCKCHIP_RK3128=y
+CONFIG_ROCKCHIP_BLOCK_API=y
+CONFIG_ROCKCHIP_PARAM=y
+CONFIG_ROCKCHIP_RESOURCE_IMAGE=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -12,6 +15,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
 CONFIG_CMD_TIME=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -24,12 +28,12 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
 CONFIG_DM_FUEL_GAUGE=y
-CONFIG_POWER_FG_RK816=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
@@ -44,5 +48,10 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_LVDS=y
+CONFIG_LCD=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y

commit dd495b6446bde15cf3c34a05a0491bdc595b4158
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:39:03 2017 +0800

    rockchip: rk3128: fix compile warning
    
    fix warning:
      warning: "CONFIG_CONSOLE_SCROLL_LINES" redefined
     #define CONFIG_CONSOLE_SCROLL_LINES  10
    include/generated/autoconf.h:154:0: note:
     this is the location of the previous definition
     #define CONFIG_CONSOLE_SCROLL_LINES 1
    
    Change-Id: Iaee1b670724451dc21a5aacbccc10fc298bf301a
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index c60ddb0dcd..1c131760f0 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -22,8 +22,6 @@
  */
 #define CONFIG_ENV_OFFSET (96 * 1024)
 
-#define CONFIG_CONSOLE_SCROLL_LINES		10
-
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"

commit 13137280cf47e76db1426b20d7d96897ebad8276
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:37:12 2017 +0800

    rockchip: rk3128: add display relate configs
    
    Change-Id: I45fcdde06e2a66ef8ef6de6bbb1cb5ab154b01b5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
index f60e22c80a..c60ddb0dcd 100644
--- a/include/configs/evb_rk3128.h
+++ b/include/configs/evb_rk3128.h
@@ -9,6 +9,10 @@
 
 #include <configs/rk3128_common.h>
 
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV 1
 /*
@@ -20,4 +24,8 @@
 
 #define CONFIG_CONSOLE_SCROLL_LINES		10
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index b9f01cb5aa..fc37ac4908 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -65,6 +65,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit 3150246f25648c29d1227a83d74ff9e1c15b5c5d
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:36:04 2017 +0800

    rockchip: dts: rk3126-evb: add display node
    
    Change-Id: Id67bfffa32a3946ac9bc9cbcecc1cb01ce44138d
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 37d906f94b..6020a9df67 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -36,6 +36,88 @@
 		regulator-max-microvolt = <5000000>;
 		regulator-always-on;
 	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		brightness-levels = <
+			0   1   2   3   4   5   6   7
+			8   9  10  11  12  13  14  15
+			16  17  18  19  20  21  22  23
+			24  25  26  27  28  29  30  31
+			32  33  34  35  36  37  38  39
+			40  41  42  43  44  45  46  47
+			48  49  50  51  52  53  54  55
+			56  57  58  59  60  61  62  63
+			64  65  66  67  68  69  70  71
+			72  73  74  75  76  77  78  79
+			80  81  82  83  84  85  86  87
+			88  89  90  91  92  93  94  95
+			96  97  98  99 100 101 102 103
+			104 105 106 107 108 109 110 111
+			112 113 114 115 116 117 118 119
+			120 121 122 123 124 125 126 127
+			128 129 130 131 132 133 134 135
+			136 137 138 139 140 141 142 143
+			144 145 146 147 148 149 150 151
+			152 153 154 155 156 157 158 159
+			160 161 162 163 164 165 166 167
+			168 169 170 171 172 173 174 175
+			176 177 178 179 180 181 182 183
+			184 185 186 187 188 189 190 191
+			192 193 194 195 196 197 198 199
+			200 201 202 203 204 205 206 207
+			208 209 210 211 212 213 214 215
+			216 217 218 219 220 221 222 223
+			224 225 226 227 228 229 230 231
+			232 233 234 235 236 237 238 239
+			240 241 242 243 244 245 246 247
+			248 249 250 251 252 253 254 255>;
+		default-brightness-level = <128>;
+		pwms = <&pwm0 0 1000000 1>;
+		enable-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	lvds_panel: lvds-panel {
+		u-boot,dm-pre-reloc;
+		compatible ="simple-panel";
+		backlight = <&backlight>;
+		bus-format = <0x1009>;
+		/* enable-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+		 * delay,disable = <10>;
+		 * power-supply = <&vcc_lcd>;
+		 */
+		power-supply = <&ldo6>;
+		power-invert = <1>;
+		rockchip,data-mapping = "jeida";
+		rockchip,data-width = <18>;
+		rockchip,output = "rgb";
+
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: timing0 {
+				clock-frequency = <60000000>;
+				hactive = <1024>;
+				vactive = <600>;
+				hback-porch = <100>;
+				hfront-porch = <120>;
+				vback-porch = <10>;
+				vfront-porch = <15>;
+				hsync-len = <100>;
+				vsync-len = <10>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		ports {
+			panel_in_lvds: endpoint {
+				remote-endpoint = <&lvds_out_panel>;
+			};
+		};
+	};
 };
 
 &i2c1 {
@@ -231,6 +313,22 @@
 	status = "okay";
 };
 
+&lvds {
+	status = "okay";
+	ports {
+		lvds_out: endpoint@0 {
+			reg = <0>;
+			lvds_out_panel: endpoint {
+				remote-endpoint = <&panel_in_lvds>;
+			};
+		};
+	};
+};
+
+&vop {
+	status = "okay";
+};
+
 &pinctrl {
 	usb_otg {
 		otg_vbus_drv: host-vbus-drv {

commit 7f2c582aa4b75af0400e213f663684c546819169
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:29:18 2017 +0800

    rockchip: dts: rk3128: add display relate nodes
    
    Change-Id: Ic1b978bf02dbc1e8b6889d5526e60109ecb313b5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 03fc221408..254388dc11 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -367,6 +367,43 @@
 		#size-cells = <1>;
 	};
 
+	vop: vop@1010e000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3126-vop";
+		reg = <0x1010e000 0x100>, <0x1010ec00 0x400>;
+		reg-names = "regs", "gamma_lut";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VIO0>, <&cru DCLK_LCDC>, <&cru HCLK_LCDC>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_lvds: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&lvds_in_vop>;
+			};
+		};
+	};
+
+	display_subsystem: display-subsystem {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+
+		route {
+			route_lvds: route-lvds {
+				logo,uboot = "logo.bmp";
+				logo,kernel = "logo_kernel.bmp";
+				logo,mode = "fullscreen";
+				charge_logo,mode = "center";
+				connect = <&vop_out_lvds>;
+			};
+		};
+	};
+
 	gic: interrupt-controller@10139000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
@@ -436,6 +473,27 @@
 		status = "disabled";
 	};
 
+	lvds: lvds@20038000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3126-lvds";
+		reg = <0x20038000 0x4000>, <0x10110000 0x100>;
+		reg-names = "mipi_lvds_phy", "mipi_lvds_ctl";
+		rockchip,grf = <&grf>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			lvds_in: port@0 {
+				reg = <0>;
+				lvds_in_vop: endpoint {
+					remote-endpoint = <&vop_out_lvds>;
+				};
+			};
+		};
+	};
+
 	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
 		reg = <20072000 0x1000>;

commit 4b8c2ef13c2665367459bcaa0a836815775fb021
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:22:10 2017 +0800

    drm/rockchip: update: some fixes and new features
    
    Change-Id: Ief38022bda85fb0e7e0d1024be7aea279428329d
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
index 598d4c0265..3f262e6e8a 100644
--- a/drivers/video/drm/Kconfig
+++ b/drivers/video/drm/Kconfig
@@ -12,6 +12,9 @@ menuconfig DRM_ROCKCHIP
 config DRM_ROCKCHIP_PANEL
 	bool
 
+config DRM_ROCKCHIP_DSI_PANEL
+	bool
+
 config DRM_ROCKCHIP_MIPI_DSI
 	bool
 
@@ -19,7 +22,7 @@ config DRM_ROCKCHIP_DW_MIPI_DSI
 	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
 	depends on DRM_ROCKCHIP
 	select DRM_ROCKCHIP_MIPI_DSI
-	select DRM_ROCKCHIP_PANEL
+	select DRM_ROCKCHIP_DSI_PANEL
 	help
 	 This selects support for Rockchip SoC specific extensions
 	 for the Synopsys DesignWare HDMI driver. If you want to
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
index d9c0b1c7a2..8ecbad06d8 100755
--- a/drivers/video/drm/Makefile
+++ b/drivers/video/drm/Makefile
@@ -5,11 +5,13 @@
 #
 
 obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
-		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
+		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o \
+		rockchip_panel.o
 
 obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
-obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o \
+			rockchip-inno-mipi-dphy.o rockchip_dsi_panel.o
 obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
 obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
-obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o panel_simple.o \
-					rockchip_dsi_panel.o
+obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += panel_simple.o
+obj-$(CONFIG_DRM_ROCKCHIP_DSI_PANEL) += rockchip_dsi_panel.o
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
index 8047ebc636..273009d732 100644
--- a/drivers/video/drm/panel_simple.c
+++ b/drivers/video/drm/panel_simple.c
@@ -17,6 +17,7 @@
 #include <dm/uclass-id.h>
 #include <asm/gpio.h>
 #include <backlight.h>
+#include <power/regulator.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
@@ -33,6 +34,8 @@ struct panel_simple {
 	const struct drm_display_mode *mode;
 	int bus_format;
 
+	struct udevice *power_supply;
+	bool power_invert;
 	struct udevice *backlight;
 	struct gpio_desc enable;
 
@@ -46,6 +49,15 @@ static int panel_simple_prepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
+	int ret;
+
+	if (panel->power_supply) {
+		ret = regulator_set_enable(panel->power_supply,
+					   panel->power_invert);
+		if (ret)
+			printf("%s: failed to enable power_supply",
+			       __func__);
+	}
 
 	dm_gpio_set_value(&panel->enable, 1);
 	mdelay(panel->delay_prepare);
@@ -57,7 +69,15 @@ static int panel_simple_unprepare(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
+	int ret;
 
+	if (panel->power_supply) {
+		ret = regulator_set_enable(panel->power_supply,
+					   !panel->power_invert);
+		if (ret)
+			printf("%s: failed to disable power_supply",
+			       __func__);
+	}
 	dm_gpio_set_value(&panel->enable, 0);
 	mdelay(panel->delay_unprepare);
 
@@ -69,7 +89,9 @@ static int panel_simple_enable(struct display_state *state)
 	struct panel_state *panel_state = &state->panel_state;
 	struct panel_simple *panel = panel_state->private;
 
-	backlight_enable(panel->backlight);
+	if (panel->backlight)
+		backlight_enable(panel->backlight);
+
 	mdelay(panel->delay_enable);
 
 	return 0;
@@ -91,7 +113,7 @@ static int panel_simple_parse_dt(const void *blob, int node,
 
 	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
 				   &panel->enable, GPIOD_IS_OUT);
-	if (ret != -ENOENT) {
+	if (ret && ret != -ENOENT) {
 		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
 		      __func__, ret);
 		return ret;
@@ -99,11 +121,21 @@ static int panel_simple_parse_dt(const void *blob, int node,
 
 	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
 					   "backlight", &panel->backlight);
-	if (ret) {
+	if (ret && ret != -ENOENT) {
 		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
 		return ret;
 	}
 
+	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, panel->dev,
+					   "power-supply",
+					   &panel->power_supply);
+	if (ret && ret != -ENOENT) {
+		printf("%s: Cannot get power supply: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	panel->power_invert = !!fdtdec_get_int(blob, node, "power_invert", 0);
+
 	panel->delay_prepare = fdtdec_get_int(blob, node, "delay,prepare", 0);
 	panel->delay_unprepare = fdtdec_get_int(blob, node, "delay,unprepare", 0);
 	panel->delay_enable = fdtdec_get_int(blob, node, "delay,enable", 0);
@@ -134,6 +166,7 @@ static int panel_simple_init(struct display_state *state)
 	if (!panel)
 		return -ENOMEM;
 
+	memset(panel, 0, sizeof(*panel));
 	panel->blob = blob;
 	panel->node = node;
 	panel->mode = mode;
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
index d305e575f0..6a4cdd55f7 100644
--- a/drivers/video/drm/rockchip_display.c
+++ b/drivers/video/drm/rockchip_display.c
@@ -18,6 +18,7 @@
 #include <video.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
+#include <asm/arch-rockchip/resource_img.h>
 
 #include "bmp_helper.h"
 #include "rockchip_display.h"
@@ -26,34 +27,32 @@
 #include "rockchip_phy.h"
 #include "rockchip_panel.h"
 
+#define RK_BLK_SIZE 512
+
 DECLARE_GLOBAL_DATA_PTR;
 static LIST_HEAD(rockchip_display_list);
 static LIST_HEAD(logo_cache_list);
 
-#define DRM_ROCKCHIP_FB_WIDTH 1920
-#define DRM_ROCKCHIP_FB_HEIGHT 1080
-
-#define MEMORY_POOL_SIZE 32 * 1024 * 1024
-static unsigned long memory_start;
-static unsigned long memory_end;
-
-#ifdef CONFIG_RK_PWM_BL
-extern int rk_pwm_bl_config(int brightness);
+#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
+ #define DRM_ROCKCHIP_FB_WIDTH		1920
+ #define DRM_ROCKCHIP_FB_HEIGHT		1080
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
+#else
+ #define DRM_ROCKCHIP_FB_WIDTH		0
+ #define DRM_ROCKCHIP_FB_HEIGHT		0
+ #define DRM_ROCKCHIP_FB_BPP		VIDEO_BPP32
 #endif
 
-struct bmp_header *get_bmp_header(const char *bmp_name)
-{
-	printf("%s %d TODO\n", __func__, __LINE__);
-}
+#define MEMORY_POOL_SIZE	32 * 1024 * 1024
+#define DRM_ROCKCHIP_FB_SIZE \
+	VNBYTES(DRM_ROCKCHIP_FB_BPP) * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT
 
-int load_bmp_content(const char *logo, void *bmp, int size)
-{
-	printf("%s %d TODO\n", __func__, __LINE__);
-}
+static unsigned long memory_start;
+static unsigned long memory_end;
 
-static void init_display_buffer(void)
+static void init_display_buffer(ulong base)
 {
-	memory_start = gd->fb_base;
+	memory_start = base + DRM_ROCKCHIP_FB_SIZE;
 	memory_end = memory_start;
 }
 
@@ -73,28 +72,53 @@ static void *get_display_buffer(int size)
 	return buf;
 }
 
+#if 0
 static unsigned long get_display_size(void)
 {
 	return memory_end - memory_start;
 }
+#endif
 
 static bool can_direct_logo(int bpp)
 {
 	return bpp == 24 || bpp == 32;
 }
 
-static int get_panel_node(struct display_state *state, int conn_node)
+static struct udevice *find_panel_device_by_node(const void *blob,
+						 int panel_node)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
+	if (ret) {
+		printf("Warn: %s: can't find panel driver\n",
+		       fdt_get_name(blob, panel_node, NULL));
+		return NULL;
+	}
+
+	return dev;
+}
+
+static struct udevice *get_panel_device(struct display_state *state, int conn_node)
 {
+	struct panel_state *panel_state = &state->panel_state;
 	const void *blob = state->blob;
 	int panel, ports, port, ep, remote, ph, nodedepth;
+	struct udevice *dev;
 
 	panel = fdt_subnode_offset(blob, conn_node, "panel");
-	if (panel > 0)
-		return panel;
+	if (panel > 0 && fdt_device_is_available(blob, panel)) {
+		dev = find_panel_device_by_node(blob, panel);
+		if (dev) {
+			panel_state->node = panel;
+			return dev;
+		}
+	}
 
 	ports = fdt_subnode_offset(blob, conn_node, "ports");
 	if (ports < 0)
-		return -ENODEV;
+		return NULL;
 
 	fdt_for_each_subnode(port, blob, ports) {
 		fdt_for_each_subnode(ep, blob, port) {
@@ -112,11 +136,20 @@ static int get_panel_node(struct display_state *state, int conn_node)
 			panel = fdt_supernode_atdepth_offset(blob, remote,
 							     nodedepth - 2,
 							     NULL);
-			break;
+			if (!fdt_device_is_available(blob, panel)) {
+				debug("[%s]: panel is disabled\n",
+				      fdt_get_name(blob, panel, NULL));
+				continue;
+			}
+			dev = find_panel_device_by_node(blob, panel);
+			if (dev) {
+				panel_state->node = panel;
+				return dev;
+			}
 		}
 	}
 
-	return panel;
+	return NULL;
 }
 
 static int connector_phy_init(struct display_state *state)
@@ -126,6 +159,8 @@ static int connector_phy_init(struct display_state *state)
 	const void *blob = state->blob;
 	const struct rockchip_phy *phy;
 	int phy_node, phandle;
+	struct udevice *dev;
+	int ret;
 
 	phandle = fdt_getprop_u32_default_node(blob, conn_node, 0,
 					       "phys", -1);
@@ -138,12 +173,19 @@ static int connector_phy_init(struct display_state *state)
 		return phy_node;
 	}
 
-	phy = rockchip_get_phy(blob, phy_node);
+	ret = uclass_find_device_by_of_offset(UCLASS_PHY, phy_node, &dev);
+	if (ret) {
+		printf("Warn: %s: can't find phy driver\n",
+		       fdt_get_name(blob, phy_node, NULL));
+		return ret;
+	}
+	phy = (const struct rockchip_phy *)dev_get_driver_data(dev);
 	if (!phy) {
 		printf("failed to find phy driver\n");
 		return 0;
 	}
 
+	conn_state->phy_dev = dev;
 	conn_state->phy_node = phy_node;
 
 	if (!phy->funcs || !phy->funcs->init ||
@@ -164,30 +206,16 @@ static int connector_panel_init(struct display_state *state)
 	const void *blob = state->blob;
 	int conn_node = conn_state->node;
 	const struct rockchip_panel *panel;
-	int panel_node, dsp_lut_node;
+	int dsp_lut_node;
 	int ret, len;
 
-	panel_node = get_panel_node(state, conn_node);
-	if (panel_node < 0) {
-		printf("failed to find panel node\n");
-		return -ENODEV;
-	}
-
-	if (!fdt_device_is_available(blob, panel_node)) {
-		printf("panel is disabled\n");
-		return -ENODEV;
-	}
-
 	dm_scan_fdt_dev(conn_state->dev);
 
-	panel_state->node = panel_node;
-
-	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
-	if (ret) {
-		printf("Warn: %s: can't find panel driver\n",
-		       fdt_get_name(blob, panel_node, NULL));
-		return -ENODEV;
+	dev = get_panel_device(state, conn_node);
+	if (!dev) {
+		return 0;
 	}
+
 	panel = (const struct rockchip_panel *)dev_get_driver_data(dev);
 	if (!panel) {
 		printf("failed to find panel driver\n");
@@ -203,7 +231,7 @@ static int connector_panel_init(struct display_state *state)
 		return ret;
 	}
 
-	dsp_lut_node = fdt_subnode_offset(blob, panel_node, "dsp-lut");
+	dsp_lut_node = fdt_subnode_offset(blob, panel_state->node, "dsp-lut");
 	fdt_getprop(blob, dsp_lut_node, "gamma-lut", &len);
 	if (len > 0) {
 		conn_state->gamma.size  = len / sizeof(u32);
@@ -320,16 +348,10 @@ static int display_get_timing(struct display_state *state)
 	struct drm_display_mode *mode = &conn_state->mode;
 	const struct drm_display_mode *m;
 	const void *blob = state->blob;
-	int conn_node = conn_state->node;
-	int panel;
-
-	panel = get_panel_node(state, conn_node);
-	if (panel < 0) {
-		printf("failed to find panel node\n");
-		return -ENODEV;
-	}
+	struct panel_state *panel_state = &state->panel_state;
+	int panel = panel_state->node;
 
-	if (!display_get_timing_from_dts(panel, blob, mode)) {
+	if (panel > 0 && !display_get_timing_from_dts(panel, blob, mode)) {
 		printf("Using display timing dts\n");
 		goto done;
 	}
@@ -393,7 +415,7 @@ static int display_init(struct display_state *state)
 	if (conn_funcs->init) {
 		ret = conn_funcs->init(state);
 		if (ret)
-			goto deinit_panel;
+			goto deinit;
 	}
 	/*
 	 * support hotplug, but not connect;
@@ -427,8 +449,6 @@ static int display_init(struct display_state *state)
 deinit:
 	if (conn_funcs->deinit)
 		conn_funcs->deinit(state);
-deinit_panel:
-	rockchip_panel_deinit(state);
 	return ret;
 }
 
@@ -580,7 +600,7 @@ static int display_logo(struct display_state *state)
 	crtc_state->src_y = 0;
 	crtc_state->ymirror = logo->ymirror;
 
-	crtc_state->dma_addr = logo->mem + logo->offset;
+	crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
 	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
 
 	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
@@ -686,10 +706,12 @@ struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
 
 static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 {
+#ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
 	struct rockchip_logo_cache *logo_cache;
 	struct bmp_header *header;
 	void *dst = NULL, *pdst;
-	int size;
+	int size, len;
+	int ret = 0;
 
 	if (!logo || !bmp_name)
 		return -EINVAL;
@@ -702,9 +724,15 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		return 0;
 	}
 
-	header = get_bmp_header(bmp_name);
+	header = malloc(RK_BLK_SIZE);
 	if (!header)
-		return -EINVAL;
+		return -ENOMEM;
+
+	len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
+	if (len != RK_BLK_SIZE) {
+		ret = -EINVAL;
+		goto free_header;
+	}
 
 	logo->bpp = get_unaligned_le16(&header->bit_count);
 	logo->width = get_unaligned_le32(&header->width);
@@ -713,18 +741,21 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 	if (!can_direct_logo(logo->bpp)) {
 		if (size > MEMORY_POOL_SIZE) {
 			printf("failed to use boot buf as temp bmp buffer\n");
-			return -ENOMEM;
+			ret = -ENOMEM;
+			goto free_header;
 		}
-		pdst = (void *)gd->video_top;
+		pdst = get_display_buffer(size);
 
 	} else {
 		pdst = get_display_buffer(size);
 		dst = pdst;
 	}
 
-	if (load_bmp_content(bmp_name, pdst, size)) {
+	len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
+	if (len != size) {
 		printf("failed to load bmp %s\n", bmp_name);
-		return 0;
+		ret = -ENOENT;
+		goto free_header;
 	}
 
 	if (!can_direct_logo(logo->bpp)) {
@@ -736,23 +767,37 @@ static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
 		dst_size = logo->width * logo->height * logo->bpp >> 3;
 
 		dst = get_display_buffer(dst_size);
-		if (!dst)
-			return -ENOMEM;
+		if (!dst) {
+			ret = -ENOMEM;
+			goto free_header;
+		}
 		if (bmpdecoder(pdst, dst, logo->bpp)) {
 			printf("failed to decode bmp %s\n", bmp_name);
-			return 0;
+			ret = -EINVAL;
+			goto free_header;
 		}
+		flush_dcache_range((ulong)dst,
+				   ALIGN((ulong)dst + dst_size,
+					 CONFIG_SYS_CACHELINE_SIZE));
+
 		logo->offset = 0;
 		logo->ymirror = 0;
 	} else {
 		logo->offset = get_unaligned_le32(&header->data_offset);
 		logo->ymirror = 1;
 	}
-	logo->mem = (u32)(unsigned long)dst;
+	logo->mem = dst;
 
 	memcpy(&logo_cache->logo, logo, sizeof(*logo));
 
-	return 0;
+free_header:
+
+	free(header);
+
+	return ret;
+#else
+	return -EINVAL;
+#endif
 }
 
 void rockchip_show_fbbase(ulong fbbase)
@@ -761,7 +806,7 @@ void rockchip_show_fbbase(ulong fbbase)
 
 	list_for_each_entry(s, &rockchip_display_list, head) {
 		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
-		s->logo.mem = fbbase;
+		s->logo.mem = (char *)fbbase;
 		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
 		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
 		s->logo.bpp = 32;
@@ -804,7 +849,6 @@ void rockchip_show_logo(void)
 	}
 }
 
-extern const struct rockchip_connector rk3399_mipi_dsi_data;
 static int rockchip_display_probe(struct udevice *dev)
 {
 	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
@@ -831,7 +875,7 @@ static int rockchip_display_probe(struct udevice *dev)
 	if (!fdt_device_is_available(blob, route))
 		return -ENODEV;
 
-	init_display_buffer();
+	init_display_buffer(plat->base);
 
 	fdt_for_each_subnode(child, blob, route) {
 		if (!fdt_device_is_available(blob, child))
@@ -883,11 +927,12 @@ static int rockchip_display_probe(struct udevice *dev)
 
 		s = malloc(sizeof(*s));
 		if (!s)
-			goto err_free;
+			continue;
 
 		memset(s, 0, sizeof(*s));
 
 		INIT_LIST_HEAD(&s->head);
+		s->ulogo_name = fdt_stringlist_get(blob, child, "logo,uboot", 0, NULL);
 		s->klogo_name = fdt_stringlist_get(blob, child, "logo,kernel", 0, NULL);
 		name = fdt_stringlist_get(blob, child, "logo,mode", 0, NULL);
 		if (!strcmp(name, "fullscreen"))
@@ -910,27 +955,41 @@ static int rockchip_display_probe(struct udevice *dev)
 		s->crtc_state.crtc_id = get_crtc_id(blob, connect);
 		s->node = child;
 
-		connector_phy_init(s);
-		connector_panel_init(s);
+		if (connector_phy_init(s)) {
+			printf("Warn: %s: Failed to init phy drivers\n",
+			       fdt_get_name(blob, child, NULL));
+			free(s);
+			continue;
+		}
+
+		if (connector_panel_init(s)) {
+			printf("Warn: %s: Failed to init panel drivers\n",
+			       fdt_get_name(blob, child, NULL));
+			free(s);
+			continue;
+		}
 		list_add_tail(&s->head, &rockchip_display_list);
 	}
 
+	if (list_empty(&rockchip_display_list)) {
+		printf("Failed to found available display route\n");
+		return -ENODEV;
+	}
+
 	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
 	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
 	uc_priv->bpix = VIDEO_BPP32;
 
+	#ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
 	rockchip_show_fbbase(plat->base);
 	video_set_flush_dcache(dev, true);
+	#else
+	rockchip_show_logo();
+	#endif
 
 	return 0;
-
-err_free:
-	list_for_each_entry(s, &rockchip_display_list, head) {
-		list_del(&s->head);
-		free(s);
-	}
-	return -ENODEV;
 }
+
 #if 0
 void rockchip_display_fixup(void *blob)
 {
@@ -1010,7 +1069,7 @@ int rockchip_display_bind(struct udevice *dev)
 {
 	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
 
-	plat->size = 4 * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT;
+	plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
 
 	return 0;
 }
@@ -1027,3 +1086,37 @@ U_BOOT_DRIVER(rockchip_display) = {
 	.bind	= rockchip_display_bind,
 	.probe	= rockchip_display_probe,
 };
+
+static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	if (argc != 1)
+		return CMD_RET_USAGE;
+
+	rockchip_show_logo();
+
+	return 0;
+}
+
+static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
+				char *const argv[])
+{
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	rockchip_show_bmp(argv[1]);
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	rockchip_show_logo, 1, 1, do_rockchip_logo_show,
+	"load and display log from resource partition",
+	NULL
+);
+
+U_BOOT_CMD(
+	rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
+	"load and display bmp from resource partition",
+	"    <bmp_name>"
+);
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
index c80a76f4d5..d1826da186 100644
--- a/drivers/video/drm/rockchip_display.h
+++ b/drivers/video/drm/rockchip_display.h
@@ -71,6 +71,7 @@ struct panel_state {
 struct connector_state {
 	struct udevice *dev;
 	const struct rockchip_connector *connector;
+	struct udevice *phy_dev;
 	const struct rockchip_phy *phy;
 	int node;
 	int phy_node;
@@ -109,20 +110,23 @@ struct rockchip_logo_cache {
 
 struct display_state {
 	struct list_head head;
+
 	const void *blob;
 	int node;
+
+	struct crtc_state crtc_state;
+	struct connector_state conn_state;
+	struct panel_state panel_state;
+
 	const char *ulogo_name;
 	const char *klogo_name;
+
+	struct logo_info logo;
 	int logo_mode;
 	int charge_logo_mode;
-	struct bmp_image *ubmp;
-	struct bmp_image *kbmp;
 	void *mem_base;
 	int mem_size;
-	struct logo_info logo;
-	struct crtc_state crtc_state;
-	struct connector_state conn_state;
-	struct panel_state panel_state;
+
 	int enable;
 	int is_init;
 	int is_enable;
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
index 96ef2e9eb7..e96e58e4a9 100644
--- a/drivers/video/drm/rockchip_dsi_panel.c
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -297,15 +297,15 @@ static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockch
 
 	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
 				   &panel->enable, GPIOD_IS_OUT);
-	if (ret != -ENOENT) {
+	if (ret && ret != -ENOENT) {
 		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
 		      __func__, ret);
 		return ret;
 	}
 
 	ret = gpio_request_by_name(panel->dev, "reset-gpios", 0,
-				   &panel->enable, GPIOD_IS_OUT);
-	if (ret != -ENOENT) {
+				   &panel->reset, GPIOD_IS_OUT);
+	if (ret && ret != -ENOENT) {
 		printf("%s: Warning: cannot get reset GPIO: ret=%d\n",
 		      __func__, ret);
 		return ret;
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 629fbe6adf..01282829c3 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -18,7 +18,6 @@
 #include <asm/arch-rockchip/clock.h>
 #include <asm/gpio.h>
 
-
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
@@ -513,7 +512,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	int lvds_node = conn_state->node;
 	struct rockchip_lvds_device *lvds;
 	const char *name;
-	int i,width;
+	int i, width;
 	struct fdt_resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
 	int panel_node = panel_state->node;
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
index aabce7aba0..b69e263af4 100644
--- a/drivers/video/drm/rockchip_panel.c
+++ b/drivers/video/drm/rockchip_panel.c
@@ -4,21 +4,20 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/unaligned.h>
 #include <config.h>
 #include <common.h>
 #include <errno.h>
-#include <malloc.h>
+#include <dm/device.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
-#include <asm/unaligned.h>
-#include <linux/list.h>
-#include <dm/device.h>
 
 #include "rockchip_display.h"
 #include "rockchip_crtc.h"
 #include "rockchip_connector.h"
 #include "rockchip_panel.h"
 
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
 static const struct drm_display_mode auo_b125han03_mode = {
 	.clock = 146900,
 	.hdisplay = 1920,
@@ -46,16 +45,11 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
 	.vrefresh = 60,
 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
 };
-#if 0
+
 static const struct rockchip_panel simple_panel_data = {
 	.funcs = &panel_simple_funcs,
 };
-#endif
 
-static const struct rockchip_panel simple_panel_dsi_data = {
-	.funcs = &rockchip_dsi_panel_funcs,
-};
-#if 0
 static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
 	.funcs = &panel_simple_funcs,
 	.data = &lg_lp079qx1_sp0v_mode,
@@ -67,42 +61,44 @@ static const struct rockchip_panel auo_b125han03_data = {
 };
 #endif
 
+#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
+static const struct rockchip_panel simple_panel_dsi_data = {
+	.funcs = &rockchip_dsi_panel_funcs,
+};
+#endif
+
 static const struct udevice_id rockchip_panel_ids[] = {
-#if 0
-	}, {
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
+	{
 		.compatible = "simple-panel",
-		.funcs = &simple_panel_data,
+		.data = (ulong)&simple_panel_data,
+	}, {
+		.compatible = "lg,lp079qx1-sp0v",
+		.data = (ulong)&lg_lp079qx1_sp0v_data,
+	}, {
+		.compatible = "auo,b125han03",
+		.data = (ulong)&auo_b125han03_data,
 	},
 #endif
- {
+#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
+	{
 		.compatible = "simple-panel-dsi",
 		.data = (ulong)&simple_panel_dsi_data,
 	},
-#if 0
-{
-		.compatible = "lg,lp079qx1-sp0v",
-		.funcs = &lg_lp079qx1_sp0v_data,
-	}, {
-		.compatible = "auo,b125han03",
-		.funcs = &auo_b125han03_data,
-	},
 #endif
- {}
+	{}
 };
 
 static int rockchip_panel_probe(struct udevice *dev)
 {
-	printf("--->yzq %s %d\n", __func__, __LINE__);
 	return 0;
 }
 
 static int rockchip_panel_bind(struct udevice *dev)
 {
-	printf("--->yzq %s %d\n", __func__, __LINE__);
 	return 0;
 }
 
-
 U_BOOT_DRIVER(rockchip_panel) = {
 	.name = "rockchip_panel",
 	.id = UCLASS_PANEL,
@@ -123,25 +119,6 @@ rockchip_get_display_mode_from_panel(struct display_state *state)
 	return (const struct drm_display_mode *)panel->data;
 }
 
-#if 0
-const struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
-{
-	const char *name;
-	int i;
-
-	name = fdt_stringlist_get(blob, node, "compatible", 0, NULL);
-
-	for (i = 0; i < ARRAY_SIZE(g_panel); i++)
-		if (!strcmp(name, g_panel[i].compatible))
-			break;
-
-	if (i >= ARRAY_SIZE(g_panel))
-		return NULL;
-
-	return &g_panel[i];
-}
-#endif
-
 int rockchip_panel_init(struct display_state *state)
 {
 	struct panel_state *panel_state = &state->panel_state;
@@ -173,15 +150,10 @@ int rockchip_panel_prepare(struct display_state *state)
 	struct panel_state *panel_state = &state->panel_state;
 	const struct rockchip_panel *panel = panel_state->panel;
 
-printf("--->yzq %s %d\n", __func__, __LINE__);
 	if (!panel || !panel->funcs || !panel->funcs->prepare) {
-printf("--->yzq %s %d panel=%p\n", __func__, __LINE__, panel);
-printf("--->yzq %s %d panel->funcs=%p\n", __func__, __LINE__, panel->funcs);
-printf("--->yzq %s %d panel->funcs->prepare=%p\n", __func__, __LINE__, panel->funcs->prepare);
 		printf("%s: failed to find panel prepare funcs\n", __func__);
 		return -ENODEV;
 	}
-printf("--->yzq %s %d\n", __func__, __LINE__);
 
 	return panel->funcs->prepare(state);
 }
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
index 699128d7cc..1f4163ddff 100644
--- a/drivers/video/drm/rockchip_panel.h
+++ b/drivers/video/drm/rockchip_panel.h
@@ -21,8 +21,6 @@ struct rockchip_panel {
 	const void *data;
 };
 
-
-#ifdef CONFIG_DRM_ROCKCHIP_PANEL
 const struct rockchip_panel *rockchip_get_panel(const void *blob, int node);
 const struct drm_display_mode *
 rockchip_get_display_mode_from_panel(struct display_state *state);
@@ -32,49 +30,11 @@ int rockchip_panel_enable(struct display_state *state);
 int rockchip_panel_disable(struct display_state *state);
 int rockchip_panel_prepare(struct display_state *state);
 int rockchip_panel_unprepare(struct display_state *state);
-#else
-static inline struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
-{
-	return NULL;
-}
-
-static inline const struct drm_display_mode *
-rockchip_get_display_mode_from_panel(struct display_state *state)
-{
-	return NULL;
-}
-
-static inline int rockchip_panel_init(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline void rockchip_panel_deinit(struct display_state *state)
-{
-	return;
-}
-
-static inline int rockchip_panel_enable(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline int rockchip_panel_disable(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline int rockchip_panel_prepare(struct display_state *state)
-{
-	return -ENODEV;
-}
-
-static inline int rockchip_panel_unprepare(struct display_state *state)
-{
-	return -ENODEV;
-}
-#endif
 
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
 extern const struct rockchip_panel_funcs panel_simple_funcs;
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP_DSI_PANEL
 extern const struct rockchip_panel_funcs rockchip_dsi_panel_funcs;
+#endif
 #endif	/* _ROCKCHIP_PANEL_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
index dfa8e17bd3..6572735ab0 100644
--- a/drivers/video/drm/rockchip_phy.c
+++ b/drivers/video/drm/rockchip_phy.c
@@ -6,8 +6,8 @@
 
 #include <config.h>
 #include <common.h>
+#include <dm/device.h>
 #include <errno.h>
-#include <malloc.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <asm/unaligned.h>
@@ -18,36 +18,48 @@
 #include "rockchip_connector.h"
 #include "rockchip_phy.h"
 
-static const struct rockchip_phy g_phy[] = {
-#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
+static const struct rockchip_phy rockchip_rk3366_mipi_dphy_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
+
+static const struct rockchip_phy rockchip_rk3368_mipi_dphy_data = {
+	 .funcs = &inno_mipi_dphy_funcs,
+};
+#endif
+
+static const struct udevice_id rockchip_phy_ids[] = {
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 	{
 	 .compatible = "rockchip,rk3366-mipi-dphy",
-	 .funcs = &inno_mipi_dphy_funcs,
+	 .data = (ulong)&rockchip_rk3366_mipi_dphy_data,
 	},
 	{
 	 .compatible = "rockchip,rk3368-mipi-dphy",
-	 .funcs = &inno_mipi_dphy_funcs,
+	 .data = (ulong)&rockchip_rk3368_mipi_dphy_data,
 	},
 #endif
+	{}
 };
 
-const struct rockchip_phy *rockchip_get_phy(const void *blob, int phy_node)
+static int rockchip_phy_probe(struct udevice *dev)
 {
-	const char *name;
-	int i;
-
-	name = fdt_stringlist_get(blob, phy_node, "compatible", 0, NULL);
-
-	for (i = 0; i < ARRAY_SIZE(g_phy); i++) {
-		if (!strcmp(name, g_phy[i].compatible))
-			break;
-	}
-	if (i >= ARRAY_SIZE(g_phy))
-		return NULL;
+	return 0;
+}
 
-	return &g_phy[i];
+static int rockchip_phy_bind(struct udevice *dev)
+{
+	return 0;
 }
 
+U_BOOT_DRIVER(rockchip_phy) = {
+	.name = "rockchip_phy",
+	.id = UCLASS_PHY,
+	.of_match = rockchip_phy_ids,
+	.bind	= rockchip_phy_bind,
+	.probe	= rockchip_phy_probe,
+};
+
 int rockchip_phy_power_on(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
index 62fff2b1ce..70e9c820b7 100644
--- a/drivers/video/drm/rockchip_phy.h
+++ b/drivers/video/drm/rockchip_phy.h
@@ -16,7 +16,6 @@ struct rockchip_phy_funcs {
 };
 
 struct rockchip_phy {
-	char compatible[30];
 	const struct rockchip_phy_funcs *funcs;
 	const void *data;
 };
@@ -28,7 +27,7 @@ int rockchip_phy_power_on(struct display_state *state);
 unsigned long rockchip_phy_set_pll(struct display_state *state,
 				   unsigned long rate);
 
-#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
 extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
 #endif
 #endif
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
index fda346e8e8..7518e8c14d 100644
--- a/drivers/video/drm/rockchip_vop.c
+++ b/drivers/video/drm/rockchip_vop.c
@@ -27,7 +27,7 @@ static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
 {
 	return us * mode->clock / mode->htotal / 1000;
 }
-#if 0
+
 static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 {
 	struct crtc_state *crtc_state = &state->crtc_state;
@@ -41,14 +41,14 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 	if (!conn_state->gamma.lut)
 		return 0;
 
-	i = fdt_find_string(state->blob, node, "reg-names", "gamma_lut");
+	i = fdt_stringlist_search(state->blob, node, "reg-names", "gamma_lut");
 	if (i < 0) {
 		printf("Warning: vop not support gamma\n");
 		return 0;
 	}
 	lut_regs = (u32 *)fdtdec_get_addr_size_auto_noparent(state->blob,
-							     node, "reg",
-							     i, &lut_size);
+							     node, "reg", i,
+							     &lut_size, false);
 	if (lut_regs == (u32 *)FDT_ADDR_T_NONE) {
 		printf("failed to get gamma lut register\n");
 		return 0;
@@ -82,7 +82,6 @@ static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
 
 	return 0;
 }
-#endif
 
 static int rockchip_vop_init(struct display_state *state)
 {
@@ -102,10 +101,9 @@ static int rockchip_vop_init(struct display_state *state)
 	u16 vsync_len = mode->vsync_end - mode->vsync_start;
 	u16 vact_st = mode->vtotal - mode->vsync_start;
 	u16 vact_end = vact_st + vdisplay;
-	struct clk aclk, hclk, dclk;
+	struct clk dclk, aclk;
 	u32 val;
-	int i, ret;
-	int rate;
+	int ret;
 
 	vop = malloc(sizeof(*vop));
 	if (!vop)
@@ -122,56 +120,28 @@ static int rockchip_vop_init(struct display_state *state)
 	vop->line_flag = vop_data->line_flag;
 	vop->version = vop_data->version;
 
-	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
-	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to get aclk: ret=%d\n", __func__, ret);
-		return ret;
-	}
-#if 0
-	ret = clk_set_rate(&aclk, 384 * 1000 * 1000);
-	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
-		return ret;
-	}
-#endif
-#if 0
+	/*
+	 * TODO:
+	 * Set Dclk pll parent
+	 */
 
-	ret = clk_get_by_name(crtc_state->dev, "hclk_vop", &hclk);
+	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
 	if (!ret)
-		ret = clk_set_rate(&hclk, 100 * 1000 * 1000);
+		ret = clk_set_rate(&dclk, mode->clock * 1000);
 	if (IS_ERR_VALUE(ret)) {
-		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		printf("%s: Failed to set dclk: ret=%d\n", __func__, ret);
 		return ret;
 	}
-#endif
 
-	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
+	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
 	if (!ret)
-		ret = clk_set_rate(&dclk, mode->clock * 1000);
-	if (IS_ERR_VALUE(ret)) {
+		ret = clk_set_rate(&aclk, 400 * 1000 * 1000);
+	if (IS_ERR_VALUE(ret))
 		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
-		return ret;
-	}
 
-#if 0
-#ifdef CONFIG_RKCHIP_RK3399
-	/* Set Dclk pll parent */
-	if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
-		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 0);
-	else
-		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 1);
-#endif
-
-	/* Set aclk hclk and dclk */
-	rate = rkclk_lcdc_clk_set(crtc_state->crtc_id, mode->clock * 1000);
-	if (rate != mode->clock * 1000) {
-		printf("Warn: vop clk request %dhz, but real clock is %dhz",
-		       mode->clock * 1000, rate);
-	}
-#endif
 	memcpy(vop->regsbak, vop->regs, vop_data->reg_len);
 
-	//rockchip_vop_init_gamma(vop, state);
+	rockchip_vop_init_gamma(vop, state);
 
 	VOP_CTRL_SET(vop, global_regdone_en, 1);
 	VOP_CTRL_SET(vop, win_gate[0], 1);

commit 457a6c0b2455439e8d52a3329f46a2cde1547ce8
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 18:05:43 2017 +0800

    drm/rockchip: add rk3126 lvds support
    
    Change-Id: I88b097f7baedf6998adb6eb2c61724bd36a71275
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
index 85e5e85be9..629fbe6adf 100644
--- a/drivers/video/drm/rockchip_lvds.c
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -28,6 +28,7 @@ enum rockchip_lvds_sub_devtype {
 	RK3288_LVDS,
 	RK3366_LVDS,
 	RK3368_LVDS,
+	RK3126_LVDS,
 };
 
 struct rockchip_lvds_chip_data {
@@ -41,9 +42,9 @@ struct rockchip_lvds_chip_data {
 };
 
 struct rockchip_lvds_device {
-	u32	regbase;
+	void	*regbase;
 	void	*grf;
-	u32	ctrl_reg;
+	void	*ctrl_reg;
 	u32	channel;
 	u32	output;
 	u32	format;
@@ -111,20 +112,19 @@ static inline void lvds_ctrl_writel(struct rockchip_lvds_device *lvds,
 
 static inline u32 lvds_pmugrf_readl(u32 offset)
 {
-	return readl(LVDS_PMUGRF_BASE + offset);
+	return readl((void *)LVDS_PMUGRF_BASE + offset);
 }
 
 static inline void lvds_pmugrf_writel(u32 offset, u32 val)
 {
-	writel(val, LVDS_PMUGRF_BASE + offset);
+	writel(val, (void *)LVDS_PMUGRF_BASE + offset);
 }
 
 static inline u32 lvds_phy_lock(struct rockchip_lvds_device *lvds)
 {
 	u32 val = 0;
-	val = readl(lvds->ctrl_reg + 0x10);
-	val &= 0x1;
-	return val;
+	val = readl(lvds->ctrl_reg + MIPIC_PHY_STATUS);
+	return (val & m_PHY_LOCK_STATUS) ? 1 : 0;
 }
 
 static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
@@ -132,6 +132,13 @@ static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
 	return 0;
 }
 
+const struct rockchip_lvds_chip_data rk3126_lvds_drv_data = {
+	.chip_type = RK3126_LVDS,
+	.grf_soc_con7  = RK3126_GRF_LVDS_CON0,
+	.grf_soc_con15 = RK3126_GRF_CON1,
+	.has_vop_sel = true,
+};
+
 const struct rockchip_lvds_chip_data rk3366_lvds_drv_data = {
 	.chip_type = RK3366_LVDS,
 	.grf_soc_con7  = RK3366_GRF_SOC_CON5,
@@ -231,6 +238,41 @@ static int rk336x_lvds_pwr_on(struct display_state *state)
 	return 0;
 }
 
+static void rk3126_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* iomux to lcdc */
+	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2B_IOMUX);
+	writel(0xffff5555, lvds->grf + RK3126_GRF_GPIO2C_IOMUX);
+	writel(0x00ff0055, lvds->grf + RK3126_GRF_GPIO2C_IOMUX2);
+	writel(0x700c1004, lvds->grf + RK3126_GRF_GPIO2D_IOMUX);
+
+	/* enable lvds mode */
+	val = v_RK3126_LVDSMODE_EN(0) |
+		v_RK3126_MIPIPHY_TTL_EN(1) |
+		v_RK3126_MIPIPHY_LANE0_EN(1) |
+		v_RK3126_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+	val = v_RK3126_MIPITTL_CLK_EN(1) |
+		v_RK3126_MIPITTL_LANE0_EN(1) |
+		v_RK3126_MIPITTL_LANE1_EN(1) |
+		v_RK3126_MIPITTL_LANE2_EN(1) |
+		v_RK3126_MIPITTL_LANE3_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
+	/* enable lane */
+	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+	lvds_writel(lvds, MIPIPHY_REGEB, val);
+	/* set ttl mode and reset phy config */
+	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
+		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
+	lvds_writel(lvds, MIPIPHY_REGE0, val);
+	rk336x_lvds_pwr_on(state);
+}
 
 static void rk336x_output_ttl(struct display_state *state)
 {
@@ -279,6 +321,41 @@ static void rk336x_output_ttl(struct display_state *state)
 	rk336x_lvds_pwr_on(state);
 }
 
+static void rk3126_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* enable lvds mode */
+	val = v_RK3126_LVDSMODE_EN(1) |
+	      v_RK3126_MIPIPHY_TTL_EN(0);
+	/* config lvds_format */
+	val |= v_RK3126_LVDS_OUTPUT_FORMAT(lvds->format);
+	/* LSB receive mode */
+	val |= v_RK3126_LVDS_MSBSEL(LVDS_MSB_D7);
+	val |= v_RK3126_MIPIPHY_LANE0_EN(1) |
+	       v_RK3126_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+
+	/* digital internal disable */
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
+
+	/* set pll prediv and fbdiv */
+	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
+	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
+
+	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
+
+	/* set lvds mode and reset phy config */
+	lvds_msk_reg(lvds, MIPIPHY_REGE0,
+		     m_MSB_SEL | m_DIG_INTER_RST,
+		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+
+	rk336x_lvds_pwr_on(state);
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+}
+
 static void rk336x_output_lvds(struct display_state *state)
 {
 	struct connector_state *conn_state = &state->conn_state;
@@ -436,7 +513,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	int lvds_node = conn_state->node;
 	struct rockchip_lvds_device *lvds;
 	const char *name;
-	int i;
+	int i,width;
 	struct fdt_resource lvds_phy, lvds_ctrl;
 	struct panel_state *panel_state = &state->panel_state;
 	int panel_node = panel_state->node;
@@ -447,7 +524,7 @@ static int rockchip_lvds_init(struct display_state *state)
 	lvds->pdata = pdata;
 
 	if (pdata->chip_type == RK3288_LVDS) {
-		lvds->regbase = (u32)fdtdec_get_addr_size_auto_noparent(state->blob,
+		lvds->regbase = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
 						lvds_node, "reg", 0, NULL, false);
 	} else {
 		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
@@ -466,8 +543,8 @@ static int rockchip_lvds_init(struct display_state *state)
 			return -ENOMEM;
 		}
 
-		lvds->regbase = lvds_phy.start;
-		lvds->ctrl_reg = lvds_ctrl.start;
+		lvds->regbase = (void *)lvds_phy.start;
+		lvds->ctrl_reg = (void *)lvds_ctrl.start;
 	}
 
 	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
@@ -500,21 +577,26 @@ static int rockchip_lvds_init(struct display_state *state)
 		free(lvds);
 		return lvds->format;
 	}
-	i = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
-	if (i == 24) {
+	width = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
+	if (width == 24) {
 		lvds->format |= LVDS_24BIT;
-	} else if (i == 18) {
+	} else if (width == 18) {
 		lvds->format |= LVDS_18BIT;
 	} else {
-		printf("rockchip-lvds unsupport data-width[%d]\n", i);
+		printf("rockchip-lvds unsupport data-width[%d]\n", width);
 		free(lvds);
 		return -EINVAL;
 	}
+
 	printf("LVDS: data mapping: %s, data-width:%d, format:%d,\n",
-		name, i, lvds->format);
+		name, width, lvds->format);
 	conn_state->private = lvds;
 	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
-	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	if ((lvds->output == DISPLAY_OUTPUT_RGB) && (width == 18))
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
+	else
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
 
 	return 0;
 }
@@ -571,11 +653,15 @@ static int rockchip_lvds_enable(struct display_state *state)
 	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
 		if (lvds->pdata->chip_type == RK3288_LVDS)
 			rk3288_output_lvds(state);
+		else if (lvds->pdata->chip_type == RK3126_LVDS)
+			rk3126_output_lvds(state);
 		else
 			rk336x_output_lvds(state);
 	} else {
 		if (lvds->pdata->chip_type == RK3288_LVDS)
 			rk3288_output_ttl(state);
+		else if (lvds->pdata->chip_type == RK3126_LVDS)
+			rk3126_output_ttl(state);
 		else
 			rk336x_output_ttl(state);
 	}
@@ -605,7 +691,7 @@ const struct rockchip_connector_funcs rockchip_lvds_funcs = {
 };
 
 static const struct rockchip_connector rk3366_lvds_data = {
-	 .funcs = &rockchip_analogix_dp_funcs,
+	 .funcs = &rockchip_lvds_funcs,
 	 .data = &rk3366_lvds_drv_data,
 };
 
@@ -619,6 +705,11 @@ static const struct rockchip_connector rk3288_lvds_data = {
 	 .data = &rk3288_lvds_drv_data,
 };
 
+static const struct rockchip_connector rk3126_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3126_lvds_drv_data,
+};
+
 static const struct udevice_id rockchip_lvds_ids[] = {
 	{
 	 .compatible = "rockchip,rk3366-lvds",
@@ -629,6 +720,9 @@ static const struct udevice_id rockchip_lvds_ids[] = {
 	}, {
 	 .compatible = "rockchip,rk3288-lvds",
 	 .data = (ulong)&rk3288_lvds_data,
+	}, {
+	 .compatible = "rockchip,rk3126-lvds",
+	 .data = (ulong)&rk3126_lvds_data,
 	}, {}
 };
 
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
index 416eacef87..d06ed18b3b 100644
--- a/drivers/video/drm/rockchip_lvds.h
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -111,12 +111,39 @@
 #define RK3368_GRF_SOC_CON7	0x041c
 #define RK3368_GRF_SOC_CON15	0x043c
 
+#define RK3126_GRF_LVDS_CON0	0x0150
+#define RK3126_GRF_CON1		0x0144
+#define RK3126_GRF_GPIO2B_IOMUX	0x00cc  /* dclk sync vsync den d10 d11 d12 d13*/
+#define RK3126_GRF_GPIO2C_IOMUX	0x00d0  /* d14 d15 d16 d17 */
+#define RK3126_GRF_GPIO2C_IOMUX2	0x00e8  /* d18 d19 d20 d21 */
+#define RK3126_GRF_GPIO2D_IOMUX	0x00d4  /* d22 d23 0x700c1004*/
+
+
 #define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
 #define v_RK336X_LVDSMODE_EN(x)        (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
 #define v_RK336X_MIPIPHY_TTL_EN(x)     (BITS_MASK(x, 1, 15) | BITS_EN(1, 15))
 #define v_RK336X_MIPIPHY_LANE0_EN(x)   (BITS_MASK(x, 1, 5) | BITS_EN(1, 5))
 #define v_RK336X_MIPIDPI_FORCEX_EN(x)  (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
+
+#define v_RK3126_LVDS_OUTPUT_FORMAT(x)	(BITS_MASK(x, 3, 1) | BITS_EN(3, 1))
+#define v_RK3126_LVDS_MSBSEL(x)		(BITS_MASK(x, 1, 3) | BITS_EN(1, 3))
+#define v_RK3126_LVDSMODE_EN(x)		(BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
+#define v_RK3126_MIPIPHY_TTL_EN(x)	(BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
+#define v_RK3126_MIPIPHY_LANE0_EN(x)	(BITS_MASK(x, 1, 8) | BITS_EN(1, 8))
+#define v_RK3126_MIPIDPI_FORCEX_EN(x)	(BITS_MASK(x, 1, 9) | BITS_EN(1, 9))
+
+#define v_RK3126_MIPITTL_CLK_EN(x)     (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
+#define v_RK3126_MIPITTL_LANE0_EN(x)   (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
+#define v_RK3126_MIPITTL_LANE1_EN(x)   (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
+#define v_RK3126_MIPITTL_LANE2_EN(x)   (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
+#define v_RK3126_MIPITTL_LANE3_EN(x)   (BITS_MASK(x, 1, 14) | BITS_EN(1, 14))
+
+#define MIPIC_PHY_RSTZ		0x00a0
+#define m_PHY_ENABLE_CLK	BIT(2)
+#define MIPIC_PHY_STATUS	0x00b0
+#define m_PHY_LOCK_STATUS	BIT(0)
+
 enum {
 	LVDS_DATA_FROM_LCDC = 0,
 	LVDS_DATA_FORM_EBC,

commit 03a9cc7b3ba1b593d307beeaec93ad5b167e874e
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Thu Oct 19 17:42:44 2017 +0800

    drm/rockhcip: vop: add rk3126 vop support
    
    Change-Id: Ib0e1b5ce9d603fa2d6019017f63fab9c3dbbd85a
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
index b392f92ac7..03118acc75 100644
--- a/drivers/video/drm/rockchip_crtc.c
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -63,6 +63,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
 	{
 		.compatible = "rockchip,rk3036-vop",
 		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,rk3126-vop",
+		.data = (ulong)&rk3036_vop_data,
 	}, {
 		.compatible = "rockchip,rk3288-vop",
 		.data = (ulong)&rk3288_vop_data,

commit 3e3a3170d1aa42b995b36e7e505a0e9e5dba73ca
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Oct 20 10:47:26 2017 +0800

    clk: rockchip: rk3128: support dclk_lcdc and aclk_vio setting
    
    support vop clk setting freq, for uboot logo display.
    
    Change-Id: I766bdc2c3a13d0ee92f81fbd7a30b7cc87c2dceb
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 11d3692c22..9f5d864673 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -96,6 +96,10 @@ enum {
 	GPLL_MODE_SLOW		= 0,
 	GPLL_MODE_NORM,
 	GPLL_MODE_DEEP,
+	CPLL_MODE_SHIFT		= 8,
+	CPLL_MODE_MASK		= 1 << CPLL_MODE_SHIFT,
+	CPLL_MODE_SLOW		= 0,
+	CPLL_MODE_NORM,
 	DPLL_MODE_SHIFT		= 4,
 	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
 	DPLL_MODE_SLOW		= 0,
@@ -179,6 +183,27 @@ enum {
 	SARADC_DIV_CON_MASK	= GENMASK(15, 8),
 	SARADC_DIV_CON_WIDTH	= 8,
 
+	/* CRU_CLKSEL27_CON*/
+	DCLK_VOP_SEL_SHIFT         = 0,
+	DCLK_VOP_SEL_MASK          = 1 << DCLK_VOP_SEL_SHIFT,
+	DCLK_VOP_PLL_SEL_CPLL           = 0,
+	DCLK_VOP_DIV_CON_SHIFT          = 8,
+	DCLK_VOP_DIV_CON_MASK           = 0xfff << DCLK_VOP_DIV_CON_SHIFT,
+
+	/* CRU_CLKSEL31_CON */
+	VIO0_PLL_SHIFT		= 5,
+	VIO0_PLL_MASK		= 7 << VIO0_PLL_SHIFT,
+	VI00_SEL_CPLL		= 0,
+	VIO0_SEL_GPLL,
+	VIO0_DIV_SHIFT		= 0,
+	VIO0_DIV_MASK		= 0x1f << VIO0_DIV_SHIFT,
+	VIO1_PLL_SHIFT		= 13,
+	VIO1_PLL_MASK		= 7 << VIO1_PLL_SHIFT,
+	VI01_SEL_CPLL		= 0,
+	VIO1_SEL_GPLL,
+	VIO1_DIV_SHIFT		= 8,
+	VIO1_DIV_MASK		= 0x1f << VIO1_DIV_SHIFT,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index b9d8e78368..f4c6ebc70e 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -76,6 +76,70 @@ static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
 	return 0;
 }
 
+static int pll_para_config(u32 freq_hz, struct pll_div *div)
+{
+	u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0;
+	u32 postdiv1, postdiv2 = 1;
+	u32 fref_khz;
+	u32 diff_khz, best_diff_khz;
+	const u32 max_refdiv = 63, max_fbdiv = 3200, min_fbdiv = 16;
+	const u32 max_postdiv1 = 7, max_postdiv2 = 7;
+	u32 vco_khz;
+	u32 freq_khz = freq_hz / 1000;
+
+	if (!freq_hz) {
+		printf("%s: the frequency can't be 0 Hz\n", __func__);
+		return -1;
+	}
+
+	postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz);
+	if (postdiv1 > max_postdiv1) {
+		postdiv2 = DIV_ROUND_UP(postdiv1, max_postdiv1);
+		postdiv1 = DIV_ROUND_UP(postdiv1, postdiv2);
+	}
+
+	vco_khz = freq_khz * postdiv1 * postdiv2;
+
+	if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) ||
+	    postdiv2 > max_postdiv2) {
+		printf("%s: Cannot find out a supported VCO for Freq (%uHz)\n",
+		       __func__, freq_hz);
+		return -1;
+	}
+
+	div->postdiv1 = postdiv1;
+	div->postdiv2 = postdiv2;
+
+	best_diff_khz = vco_khz;
+	for (refdiv = 1; refdiv < max_refdiv && best_diff_khz; refdiv++) {
+		fref_khz = ref_khz / refdiv;
+
+		fbdiv = vco_khz / fref_khz;
+		if ((fbdiv >= max_fbdiv) || (fbdiv <= min_fbdiv))
+			continue;
+		diff_khz = vco_khz - fbdiv * fref_khz;
+		if (fbdiv + 1 < max_fbdiv && diff_khz > fref_khz / 2) {
+			fbdiv++;
+			diff_khz = fref_khz - diff_khz;
+		}
+
+		if (diff_khz >= best_diff_khz)
+			continue;
+
+		best_diff_khz = diff_khz;
+		div->refdiv = refdiv;
+		div->fbdiv = fbdiv;
+	}
+
+	if (best_diff_khz > 4 * (1000)) {
+		printf("%s: Failed to match output frequency %u bestis %u Hz\n",
+		       __func__, freq_hz,
+		       best_diff_khz * 1000);
+		return -1;
+	}
+	return 0;
+}
+
 static void rkclk_init(struct rk3128_cru *cru)
 {
 	u32 aclk_div;
@@ -161,9 +225,10 @@ static void rkclk_init(struct rk3128_cru *cru)
 
 	/* PLL enter normal-mode */
 	rk_clrsetreg(&cru->cru_mode_con,
-		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_MASK | APLL_MODE_MASK | CPLL_MODE_MASK,
 		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
-		     APLL_MODE_NORM << APLL_MODE_SHIFT);
+		     APLL_MODE_NORM << APLL_MODE_SHIFT |
+		     CPLL_MODE_NORM << CPLL_MODE_SHIFT);
 
 	/*fix NAND controller  working clock max to 150Mhz */
 	rk_clrsetreg(&cru->cru_clksel_con[2],
@@ -181,11 +246,11 @@ static uint32_t rkclk_pll_get_rate(struct rk3128_cru *cru,
 	int pll_id = rk_pll_id(clk_id);
 	struct rk3128_pll *pll = &cru->pll[pll_id];
 	static u8 clk_shift[CLK_COUNT] = {
-		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, 0xff,
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,
 		GPLL_MODE_SHIFT, 0xff
 	};
 	static u32 clk_mask[CLK_COUNT] = {
-		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xff,
+		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, CPLL_MODE_MASK,
 		GPLL_MODE_MASK, 0xff
 	};
 	uint shift;
@@ -350,6 +415,71 @@ static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
 	return rk3128_saradc_get_clk(cru);
 }
 
+static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+	struct pll_div cpll_config = {0};
+
+	src_clk_div = GPLL_HZ / hz;
+	assert(src_clk_div - 1 < 31);
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO0_PLL_MASK | VIO0_DIV_MASK,
+			     VIO0_SEL_GPLL << VIO0_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO0_DIV_SHIFT);
+		break;
+	case ACLK_VIO1:
+		rk_clrsetreg(&cru->cru_clksel_con[31],
+			     VIO1_PLL_MASK | VIO1_DIV_MASK,
+			     VIO1_SEL_GPLL << VIO1_PLL_SHIFT |
+			     (src_clk_div - 1) << VIO1_DIV_SHIFT);
+		break;
+	case DCLK_LCDC:
+		if (pll_para_config(hz, &cpll_config))
+			return -1;
+		rkclk_set_pll(cru, CLK_CODEC, &cpll_config);
+
+		rk_clrsetreg(&cru->cru_clksel_con[27],
+			     DCLK_VOP_SEL_MASK | DCLK_VOP_DIV_CON_MASK,
+			     DCLK_VOP_PLL_SEL_CPLL << DCLK_VOP_SEL_SHIFT |
+			     (1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
+		break;
+	default:
+		printf("do not support this vop freq\n");
+		return -EINVAL;
+	}
+
+	return hz;
+}
+
+static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con, parent;
+
+	switch (clk_id) {
+	case ACLK_VIO0:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = con  & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case ACLK_VIO1:
+		con = readl(&cru->cru_clksel_con[31]);
+		div = (con >> 8) & 0x1f;
+		parent = GPLL_HZ;
+		break;
+	case DCLK_LCDC:
+		con = readl(&cru->cru_clksel_con[27]);
+		div = (con >> 8) & 0xfff;
+		parent = rkclk_pll_get_rate(cru, CLK_CODEC);
+		break;
+	default:
+		return -ENOENT;
+	}
+	return DIV_TO_RATE(parent, div);
+}
+
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
@@ -364,6 +494,10 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 		return rk3128_i2c_get_clk(priv->cru, clk->id);
 	case SCLK_SARADC:
                 return rk3128_saradc_get_clk(priv->cru);
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		return rk3128_vop_get_rate(priv->cru, clk->id);
 	default:
 		return -ENOENT;
 	}
@@ -378,6 +512,12 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	switch (clk->id) {
 	case 0 ... 63:
 		return 0;
+	case DCLK_LCDC:
+	case ACLK_VIO0:
+	case ACLK_VIO1:
+		new_rate = rk3128_vop_set_clk(priv->cru,
+						clk->id, rate);
+		break;
 	case HCLK_EMMC:
 		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
 						clk->id, rate);
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 35e943575f..476268a78b 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -52,8 +52,8 @@
 
 /* aclk gates */
 #define ACLK_DMAC2		194
-#define ACLK_LCDC		197
-#define ACLK_VIO		203
+#define ACLK_VIO0		197
+#define ACLK_VIO1		203
 #define ACLK_VCODEC		208
 #define ACLK_CPU		209
 #define ACLK_PERI		210

commit d37af50d6d3fd90508443e69df6b0d18251989ab
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Wed Oct 18 16:32:55 2017 +0800

    rockchip: bootrkp: add compatible support for armv7 and armv8
    
    booti only can be used boot armv8 system, we call do_bootm_linux
    to boot armv7 here.
    
    Change-Id: Ic09c4a7818199b54b9eb37bc4da0171248ac9f8d
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
index b9ef47fc6d..fe25c469b3 100644
--- a/arch/arm/mach-rockchip/bootrkp.c
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -5,8 +5,9 @@
  */
 
 #include <common.h>
-#include <config.h>
+#include <bootm.h>
 #include <linux/list.h>
+#include <libfdt.h>
 #include <malloc.h>
 #include <asm/arch/resource_img.h>
 #include "rockchip_parameter.h"
@@ -66,6 +67,34 @@ struct rockchip_image {
 	uint32_t crc;
 };
 
+#if !defined(CONFIG_ARM64)
+#ifdef CONFIG_LMB
+static void boot_start_lmb(bootm_headers_t *images)
+{
+	ulong		mem_start;
+	phys_size_t	mem_size;
+
+	lmb_init(&images->lmb);
+
+	mem_start = env_get_bootm_low();
+	mem_size = env_get_bootm_size();
+
+	lmb_add(&images->lmb, (phys_addr_t)mem_start, mem_size);
+
+	arch_lmb_reserve(&images->lmb);
+	board_lmb_reserve(&images->lmb);
+}
+#else
+static inline void boot_start_lmb(bootm_headers_t *images) { }
+#endif
+
+static void boot_lmb_init(bootm_headers_t *images)
+{
+	boot_start_lmb(images);
+	images->state = BOOTM_STATE_OS_GO;
+}
+#endif
+
 static int read_boot_mode_from_misc(struct blk_part *misc)
 {
 	struct bootloader_message *bmsg;
@@ -115,7 +144,7 @@ static int read_rockchip_image(struct blk_part *part, void *dst)
 	if (ret < 0)
 		goto err;
 	if (img->tag != TAG_KERNEL) {
-		printf("%s: invalid image tag\n", part->name);
+		printf("%s: invalid image tag(0x%x)\n", part->name, img->tag);
 		goto err;
 	}
 
@@ -143,12 +172,11 @@ static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 	struct blk_part *boot;
 	struct blk_part *kernel;
 	struct blk_part *misc;
-	int ramdisk_size;
-	int kernel_size;
-	int fdt_size;
+	ulong ramdisk_size;
+	ulong kernel_size;
+	ulong fdt_size;
 	int boot_mode;
 	int ret = 0;
-	char cmdbuf[64];
 
 	misc = rockchip_get_blk_part(PART_MISC);
 	if (misc)
@@ -185,10 +213,22 @@ static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
 		goto out;
 	}
 
-	printf("kernel_size:0x%ulx ramdisk_size:0x%x\n", kernel_size, ramdisk_size);
-	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
+	printf("kernel   @ 0x%08lx (0x%08lx)\n", kernel_addr_r, kernel_size);
+	printf("ramdisk  @ 0x%08lx (0x%08lx)\n", ramdisk_addr_r, ramdisk_size);
+#if defined(CONFIG_ARM64)
+	char cmdbuf[64];
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%lx 0x%lx",
 		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
 	run_command(cmdbuf, 0);
+#else
+	boot_lmb_init(&images);
+	images.ep = kernel_addr_r;
+	images.initrd_start = ramdisk_addr_r;
+	images.initrd_end = ramdisk_addr_r + ramdisk_size;
+	images.ft_addr = (void *)fdt_addr_r;
+	images.ft_len = fdt_totalsize(fdt_addr_r);
+	do_bootm_linux(0, 0, NULL, &images);
+#endif
 out:
 	return ret;
 }

commit 3d6b39cb83c648649ed7a5fb0297cb1324078f23
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Thu Oct 12 20:36:19 2017 +0800

    rockchip: parameter: use env_update to update bootargs
    
    function env_update will update bootargs by a more
    appropriate way, so let's update bootargs by this api.
    
    Change-Id: I75b1627ceb59df00b82adc80d541027489abc1ea
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
index c33d10c925..ff26a4bfd5 100644
--- a/arch/arm/mach-rockchip/rockchip_parameter.c
+++ b/arch/arm/mach-rockchip/rockchip_parameter.c
@@ -24,6 +24,7 @@ static int rockchip_param_parse(char *param)
 {
 	struct blk_part *part;
 	const char *cmdline = strstr(param, "CMDLINE:");
+	char *cmdline_end = strstr(cmdline, "\n"); /* end by '\n' */
 	const char *blkdev_parts = strstr(cmdline, "mtdparts");
 	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
 	char *next = (char *)blkdev_def;
@@ -31,9 +32,15 @@ static int rockchip_param_parse(char *param)
 	int len;
 	unsigned long size, from;
 
-	debug("%s", cmdline);
+	if (!cmdline) {
+		printf("invalid parameter\n");
+		return -EINVAL;
+	}
 
-	env_set("bootargs", cmdline);
+	*cmdline_end = '\0';
+	debug("%s", cmdline);
+	/* skip "CMDLINE:" */
+	env_update("bootargs", cmdline + strlen("CMDLINE:"));
 
 	while (*next) {
 		if (*next == '-') {
@@ -79,9 +86,8 @@ static int rockchip_init_param(void)
 
 	blkdev_read(param, RK_BLK_OFFSET, MAX_PARAM_SIZE >> 9);
 
-	rockchip_param_parse(param->params);
+	return rockchip_param_parse(param->params);
 
-	return 0;
 }
 
 struct blk_part *rockchip_get_blk_part(const char *name)

commit 5db1153e4bcf62d696d150c11c67a464ede9baca
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 19 20:33:39 2017 +0800

    drivers: irq: support convert gpio to irq by gpio fdt phandle
    
    add funtion: phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
    
    Change-Id: Iec2d1ed08138c2476bb13deb16ca06960fadd60d
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index 18cab91f2a..c1529ef62d 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -8,6 +8,8 @@
 #include <irq-generic.h>
 #include "irq-gpio-switch.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
 #if GPIO_BANK_NUM >= 1
 	GPIO_BANK_REGISTER(0, GPIO_BANK_PINS),
@@ -70,6 +72,64 @@ static int _hard_gpio_to_irq(u32 gpio)
 	return -EINVAL;
 }
 
+static int _phandle_gpio_to_irq(u32 gpio_phandle, u32 offset)
+{
+	int irq_gpio, bank, ret = EINVAL_GPIO;
+	bool found;
+	const char *name;
+	char *name_tok;
+	int node;
+
+	node = fdt_node_offset_by_phandle(gd->fdt_blob, gpio_phandle);
+	if (node < 0) {
+		printf("can't find node by gpio_phandle %d, ret=%d\n",
+		       gpio_phandle, node);
+		return EINVAL_GPIO;
+	}
+
+	name = fdt_get_name(gd->fdt_blob, node, NULL);
+	if (!name) {
+		printf("can't find device name for the gpio bank\n");
+		return EINVAL_GPIO;
+	}
+
+	name_tok = strdup(name);
+	if (!name_tok) {
+		printf("Error: strdup in %s failed!\n", __func__);
+		return -ENOMEM;
+	}
+
+	name = strtok(name_tok, "@");
+	if (!name) {
+		printf("can't find correct device name for the gpio bank\n");
+		goto out;
+	}
+
+	for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
+		if (!strcmp(gpio_banks[bank].name, name)) {
+			found = true;
+			break;
+		}
+	}
+
+	if (!found) {
+		printf("irq gpio framework can't find %s\n", name);
+		goto out;
+	}
+
+	debug("%s: gpio%d-%d\n", __func__, bank, offset);
+	irq_gpio = RK_IRQ_GPIO(bank, offset);
+	if (!gpio_is_valid(irq_gpio))
+		goto out;
+
+	free(name_tok);
+	return _hard_gpio_to_irq(irq_gpio);
+
+out:
+	free(name_tok);
+	return ret;
+}
+
 static int _irq_to_gpio(int irq)
 {
 	int bank, pin, idx;
@@ -142,6 +202,14 @@ int hard_gpio_to_irq(u32 gpio)
 	return _hard_gpio_to_irq(gpio);
 }
 
+int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin)
+{
+	if (gpio_phandle < 0)
+		return EINVAL_GPIO;
+
+	return _phandle_gpio_to_irq(gpio_phandle, pin);
+}
+
 int irq_to_gpio(int irq)
 {
 	return _irq_to_gpio(irq);
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 592c93bf55..f16c8e5ca0 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -76,6 +76,7 @@ int gpio_to_irq(struct gpio_desc *gpio);
 #define GPIO_BANK_SHIFT			8
 #define RK_IRQ_GPIO(bank, pin) 		(((bank) << GPIO_BANK_SHIFT) | (pin))
 int hard_gpio_to_irq(unsigned gpio);
+int phandle_gpio_to_irq(u32 gpio_phandle, u32 pin);
 
 /* only irq-gpio.c can use it */
 void _generic_gpio_handle_irq(int irq);

commit 0e508c4fef6fc071e3216d5aa537525f23529f1a
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 17 11:11:28 2017 +0800

    drivers: irq: disable irq before free irq handler
    
    It makes irq handler free safely
    
    Change-Id: Id3af8956d5681881301e658a1adb9ca3aba97f79
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 8dd09078d2..ab7d5493e5 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -173,7 +173,7 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 
 void irq_free_handler(int irq)
 {
-	if (irq_bad(irq))
+	if (irq_handler_disable(irq))
 		return;
 
 	irqs_desc[irq].handle_irq = NULL;

commit b679e969976a36ab3f5ea03972294f6562e2bd9b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Oct 19 20:31:29 2017 +0800

    rockchip: rk3128: reserve 14MB for op-tee
    
    op-tee needs 14MB memory with TA enabled, otherwise 2MB.
    
    Change-Id: Id2b6c5d81a669a7572f3ac2944d438989f99fc8b
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index a650621558..fbd026aee4 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -77,9 +77,9 @@ int dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x8400000;
-	/* Reserve 0x200000 for OPTEE */
+	/* Reserve 0xe00000(14MB) for OPTEE with TA enabled, otherwise 2MB */
 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
-				+ gd->bd->bi_dram[0].size + 0x200000;
+				+ gd->bd->bi_dram[0].size + 0xe00000;
 	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
 				+ gd->ram_size - gd->bd->bi_dram[1].start;
 

commit 12ee84b17991eae46b50879000edaccfb6e75d45
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Thu Oct 19 09:39:58 2017 +0800

    mmc: dwmmc: fix wrong implementation of dwmci_memcpy_toio
    
    We should increase the buffer address instead of fifo for
    write case.
    
    Change-Id: Ifab8ab0480c7b6f5cd0f89c8cd67ed7b7005acad
    Fixes: bda599f7c7d1 ("mmc: dwmmc: Add stride PIO for better burst mode support")
    Reported-and-tested-by: Frank Wang <wmc@rock-chips.com>
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 9f279092b0..cae88ac08e 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -51,7 +51,27 @@ void noinline dwmci_memcpy_fromio(void *buffer, void *fifo_addr)
 
 void noinline dwmci_memcpy_toio(void *buffer, void *fifo_addr)
 {
-	dwmci_memcpy_fromio(fifo_addr, buffer);
+	__asm__ __volatile__ (
+		"push {r2, r3, r4, r5, r6, r7, r8, r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"pop {r2, r3, r4, r5, r6,r7,r8,r9}\n"
+		:::"memory"
+	);
 }
 #else
 void dwmci_memcpy_fromio(void *buffer, void *fifo_addr) {};

commit 42b2f1bc60c14ede471c4cb54fb7f660c73669b2
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Wed Oct 18 16:46:03 2017 +0800

    3128: clock: config nand controller working clock max 150Mhz
    
    nandc working clock div from gpll and max clock config 150Mhz
    while gpll config as 600Mhz.
    
    Change-Id: I893d453d031a0ddd0cd79111699d3600095c6e4f
    Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 0f803ad93d..11d3692c22 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -131,6 +131,16 @@ enum {
 	CORE_PERI_DIV_SHIFT	= 0,
 	CORE_PERI_DIV_MASK	= 0xf << CORE_PERI_DIV_SHIFT,
 
+	/* CRU_CLK_SEL2_CON */
+	NANDC_PLL_SEL_SHIFT	= 14,
+	NANDC_PLL_SEL_MASK	= 7 << NANDC_PLL_SEL_SHIFT,
+	NANDC_PLL_SEL_CPLL	= 0,
+	NANDC_PLL_SEL_GPLL,
+	NANDC_CLK_DIV_SHIFT	= 8,
+	NANDC_CLK_DIV_MASK	= 0x1f << NANDC_CLK_DIV_SHIFT,
+	PVTM_CLK_DIV_SHIFT	= 0,
+	PVTM_CLK_DIV_MASK	= 0x3f << PVTM_CLK_DIV_SHIFT,
+
 	/* CRU_CLKSEL10_CON */
 	PERI_PLL_SEL_SHIFT	= 14,
 	PERI_PLL_SEL_MASK	= 1 << PERI_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 925a2f3ea6..b9d8e78368 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -164,6 +164,12 @@ static void rkclk_init(struct rk3128_cru *cru)
 		     GPLL_MODE_MASK | APLL_MODE_MASK,
 		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
 		     APLL_MODE_NORM << APLL_MODE_SHIFT);
+
+	/*fix NAND controller  working clock max to 150Mhz */
+	rk_clrsetreg(&cru->cru_clksel_con[2],
+		     NANDC_PLL_SEL_MASK | NANDC_CLK_DIV_MASK,
+		     NANDC_PLL_SEL_GPLL << NANDC_PLL_SEL_SHIFT |
+		     3 << NANDC_CLK_DIV_SHIFT);
 }
 
 /* Get pll rate by id */

commit 441217e374e194c5ac7c2727e59d43af034ac7c0
Author: Zhaoyifeng <zyf@rock-chips.com>
Date:   Tue Oct 17 14:29:38 2017 +0800

    drivers: rknand: add nand flash drivers for Rockchip SoC
    
    This patch add the nand flash support for Rockchip Soc(RK3128, RK3126x,
    RK3188, Rk3229 etc).
    
    Change-Id: I35ea09f0714b303b247a97ed13cc6e0e56675a0e
    Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 30bf556fd2..dfc11a49a9 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -831,6 +831,13 @@ config CMD_REMOTEPROC
 	help
 	  Support for Remote Processor control
 
+config CMD_RKNAND
+	bool "rknand"
+	depends on RKNAND
+	default y if RKNAND
+	help
+	  Rockchip NAND FLASH device support
+
 config CMD_ROCKUSB
 	bool "rockusb"
 	depends on USB_FUNCTION_ROCKUSB
diff --git a/cmd/Makefile b/cmd/Makefile
index caabfd7528..17ae86dd77 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -108,6 +108,7 @@ obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
+obj-$(CONFIG_CMD_RKNAND) += rknand.o
 obj-$(CONFIG_CMD_SF) += sf.o
 obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
 obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
diff --git a/cmd/rknand.c b/cmd/rknand.c
new file mode 100644
index 0000000000..d0a70ac84f
--- /dev/null
+++ b/cmd/rknand.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <rknand.h>
+
+static int rknand_curr_dev;
+static int do_rknand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	int ret;
+
+	if (argc == 2) {
+		if (strncmp(argv[1], "scan", 4) == 0) {
+			ret = rknand_scan_namespace();
+			if (ret)
+				return CMD_RET_FAILURE;
+
+			return ret;
+		}
+	}
+
+	return blk_common_cmd(argc, argv, IF_TYPE_RKNAND, &rknand_curr_dev);
+}
+
+U_BOOT_CMD(
+	rknand, 8, 1, do_rknand,
+	"rockchip nand flash sub-system",
+	"scan - scan Nand devices\n"
+	"rknand info - show all available Nand devices\n"
+	"rknand device [dev] - show or set current Nand device\n"
+	"rknand part [dev] - print partition table of one or all Nand devices\n"
+	"rknand read addr blk# cnt - read `cnt' blocks starting at block\n"
+	"     `blk#' to memory address `addr'\n"
+	"rknand write addr blk# cnt - write `cnt' blocks starting at block\n"
+	"     `blk#' from memory address `addr'"
+);
diff --git a/disk/part.c b/disk/part.c
index c67fdacc79..c04e91af20 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -133,6 +133,7 @@ void dev_print (struct blk_desc *dev_desc)
 	case IF_TYPE_MMC:
 	case IF_TYPE_USB:
 	case IF_TYPE_NVME:
+	case IF_TYPE_RKNAND:
 		printf ("Vendor: %s Rev: %s Prod: %s\n",
 			dev_desc->vendor,
 			dev_desc->revision,
@@ -269,6 +270,9 @@ static void print_part_header(const char *type, struct blk_desc *dev_desc)
 	case IF_TYPE_NVME:
 		puts ("NVMe");
 		break;
+	case IF_TYPE_RKNAND:
+		puts("RKNAND");
+		break;
 	default:
 		puts ("UNKNOWN");
 		break;
diff --git a/doc/README.rknand b/doc/README.rknand
new file mode 100644
index 0000000000..83bcab118c
--- /dev/null
+++ b/doc/README.rknand
@@ -0,0 +1,28 @@
+rknand (Rockchip NAND FLASH drivers with FTL)
+=====================================================
+
+Overview
+--------
+
+The rknand is used for Rockchip Soc NAND FLASH devices.
+
+Status
+------
+It supprot SLC and MLC NAND Flash with fully FTL.
+
+Usage in U-Boot
+---------------
+
+To list all of the rknand hard disks, try:
+
+  => rknand info
+  Device 0: Vendor: 0x2207 Rev: V1.00 Prod: rknand
+	    Type: Hard Disk
+	    Capacity: 7304.0 MB = 7.1 GB (14958592 x 512)
+
+To find and initialize nand devices, try:
+  => rknand dev 0
+  Device 0: Vendor: 0x2207 Rev: V1.00 Prod: rknand
+	    Type: Hard Disk
+	    Capacity: 7304.0 MB = 7.1 GB (14958592 x 512)
+... is now current device
diff --git a/drivers/Kconfig b/drivers/Kconfig
index baf2d5bac0..26348736fd 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -72,6 +72,8 @@ source "drivers/remoteproc/Kconfig"
 
 source "drivers/reset/Kconfig"
 
+source "drivers/rknand/Kconfig"
+
 source "drivers/rtc/Kconfig"
 
 source "drivers/scsi/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 5edf096a3a..9f961fd3ed 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_FPGA) += fpga/
 obj-y += misc/
 obj-$(CONFIG_MMC) += mmc/
 obj-$(CONFIG_NVME) += nvme/
+obj-$(CONFIG_RKNAND) += rknand/
 obj-y += pcmcia/
 obj-y += dfu/
 obj-$(CONFIG_X86) += pch/
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 3c5a87b60a..4485f8026c 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -23,6 +23,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
 	[IF_TYPE_HOST]		= "host",
 	[IF_TYPE_SYSTEMACE]	= "ace",
 	[IF_TYPE_NVME]		= "nvme",
+	[IF_TYPE_RKNAND]	= "rknand",
 };
 
 static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
@@ -36,6 +37,7 @@ static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
 	[IF_TYPE_SATA]		= UCLASS_AHCI,
 	[IF_TYPE_HOST]		= UCLASS_ROOT,
 	[IF_TYPE_NVME]		= UCLASS_NVME,
+	[IF_TYPE_RKNAND]	= UCLASS_RKNAND,
 	[IF_TYPE_SYSTEMACE]	= UCLASS_INVALID,
 };
 
diff --git a/drivers/rknand/Kconfig b/drivers/rknand/Kconfig
new file mode 100644
index 0000000000..ea2f21d484
--- /dev/null
+++ b/drivers/rknand/Kconfig
@@ -0,0 +1,12 @@
+#
+# Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+config RKNAND
+	bool "Rockchip NAND FLASH device support"
+	depends on BLK
+	help
+	  This option enables support for Rockchip NAND FLASH devices.
+	  It supports block interface(with rk ftl) to read and write NAND FLASH.
diff --git a/drivers/rknand/Makefile b/drivers/rknand/Makefile
new file mode 100644
index 0000000000..573462b851
--- /dev/null
+++ b/drivers/rknand/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += rknand.o rk_ftl_arm_v7.o
diff --git a/drivers/rknand/rk_ftl_arm_v7.S b/drivers/rknand/rk_ftl_arm_v7.S
new file mode 100644
index 0000000000..dd234e0d3a
--- /dev/null
+++ b/drivers/rknand/rk_ftl_arm_v7.S
@@ -0,0 +1,23971 @@
+	.syntax unified
+	.arch armv7-a
+	.fpu softvfp
+	.eabi_attribute 20, 1
+	.eabi_attribute 21, 1
+	.eabi_attribute 23, 3
+	.eabi_attribute 24, 1
+	.eabi_attribute 25, 1
+	.eabi_attribute 26, 2
+	.eabi_attribute 30, 4
+	.eabi_attribute 34, 0
+	.eabi_attribute 18, 4
+	.thumb
+	.file	"rk_ftl_arm_v7.c"
+	.section	.text.FlashMemCmp8,"ax",%progbits
+	.align	1
+	.global	FlashMemCmp8
+	.thumb
+	.thumb_func
+	.type	FlashMemCmp8, %function
+FlashMemCmp8:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L10
+	push	{r4, r5, lr}
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L9
+	ldrb	r4, [r0, #1]	@ zero_extendqisi2
+	ldrb	r3, [r1, #1]	@ zero_extendqisi2
+	cmp	r4, r3
+	beq	.L8
+	movs	r3, #0
+	b	.L9
+.L6:
+	ldrb	r5, [r0, r3]	@ zero_extendqisi2
+	ldrb	r4, [r1, r3]	@ zero_extendqisi2
+	add	r3, r3, #1
+	cmp	r5, r4
+	beq	.L9
+	mov	r0, r3
+	pop	{r4, r5, pc}
+.L9:
+	cmp	r3, r2
+	bne	.L6
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L8:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L11:
+	.align	2
+.L10:
+	.word	.LANCHOR0
+	.size	FlashMemCmp8, .-FlashMemCmp8
+	.section	.text.FlashRsvdBlkChk,"ax",%progbits
+	.align	1
+	.global	FlashRsvdBlkChk
+	.thumb
+	.thumb_func
+	.type	FlashRsvdBlkChk, %function
+FlashRsvdBlkChk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L15
+	ldr	r2, .L15+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	bcs	.L14
+	adds	r0, r0, #0
+	it	ne
+	movne	r0, #1
+	bx	lr
+.L14:
+	movs	r0, #1
+	bx	lr
+.L16:
+	.align	2
+.L15:
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashRsvdBlkChk, .-FlashRsvdBlkChk
+	.section	.text.FlashGetRandomizer,"ax",%progbits
+	.align	1
+	.global	FlashGetRandomizer
+	.thumb
+	.thumb_func
+	.type	FlashGetRandomizer, %function
+FlashGetRandomizer:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L19
+	and	r2, r1, #127
+	push	{r4, lr}
+	ldrh	r4, [r3, r2, lsl #1]
+	ldr	r3, .L19+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L18
+	bl	FlashRsvdBlkChk
+	cbz	r0, .L18
+	orr	r4, r4, #-1073741824
+.L18:
+	mov	r0, r4
+	pop	{r4, pc}
+.L20:
+	.align	2
+.L19:
+	.word	.LANCHOR3
+	.word	.LANCHOR4
+	.size	FlashGetRandomizer, .-FlashGetRandomizer
+	.section	.text.FlashSetRandomizer,"ax",%progbits
+	.align	1
+	.global	FlashSetRandomizer
+	.thumb
+	.thumb_func
+	.type	FlashSetRandomizer, %function
+FlashSetRandomizer:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	and	r2, r1, #127
+	ldr	r3, .L23
+	mov	r5, r0
+	ldrh	r4, [r3, r2, lsl #1]
+	ldr	r3, .L23+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L22
+	bl	FlashRsvdBlkChk
+	cbz	r0, .L22
+	orr	r4, r4, #-1073741824
+.L22:
+	ldr	r3, .L23+8
+	ldr	r3, [r3, r5, lsl #3]
+	str	r4, [r3, #336]
+	pop	{r3, r4, r5, pc}
+.L24:
+	.align	2
+.L23:
+	.word	.LANCHOR3
+	.word	.LANCHOR4
+	.word	.LANCHOR5
+	.size	FlashSetRandomizer, .-FlashSetRandomizer
+	.section	.text.FlashReadCmd,"ax",%progbits
+	.align	1
+	.global	FlashReadCmd
+	.thumb
+	.thumb_func
+	.type	FlashReadCmd, %function
+FlashReadCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	lsrs	r2, r1, #16
+	ldr	r4, .L26
+	mov	r5, r0
+	ldr	r6, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	movs	r4, #0
+	adds	r3, r3, #8
+	add	r3, r6, r3, lsl #8
+	str	r4, [r3, #8]
+	str	r4, [r3, #4]
+	str	r4, [r3, #4]
+	uxtb	r4, r1
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	str	r2, [r3, #4]
+	movs	r2, #48
+	str	r2, [r3, #8]
+	pop	{r4, r5, r6, lr}
+	b	FlashSetRandomizer
+.L27:
+	.align	2
+.L26:
+	.word	.LANCHOR5
+	.size	FlashReadCmd, .-FlashReadCmd
+	.section	.text.FlashReadDpDataOutCmd,"ax",%progbits
+	.align	1
+	.global	FlashReadDpDataOutCmd
+	.thumb
+	.thumb_func
+	.type	FlashReadDpDataOutCmd, %function
+FlashReadDpDataOutCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L32
+	push	{r4, lr}
+	ldr	r4, [r2, r0, lsl #3]
+	add	r2, r2, r0, lsl #3
+	ldrb	r3, [r2, #4]	@ zero_extendqisi2
+	ldr	r2, .L32+4
+	adds	r3, r3, #8
+	ldrb	r2, [r2, #16]	@ zero_extendqisi2
+	add	r3, r4, r3, lsl #8
+	cmp	r2, #1
+	mov	r2, #0
+	bne	.L29
+	movs	r4, #6
+	str	r4, [r3, #8]
+	str	r2, [r3, #4]
+	str	r2, [r3, #4]
+	uxtb	r2, r1
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #16
+	b	.L31
+.L29:
+	str	r2, [r3, #8]
+	uxtb	r4, r1
+	str	r2, [r3, #4]
+	str	r2, [r3, #4]
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #16
+	str	r4, [r3, #4]
+	movs	r4, #5
+	str	r4, [r3, #8]
+	str	r2, [r3, #4]
+.L31:
+	str	r2, [r3, #4]
+	movs	r2, #224
+	str	r2, [r3, #8]
+	pop	{r4, lr}
+	b	FlashSetRandomizer
+.L33:
+	.align	2
+.L32:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashReadDpDataOutCmd, .-FlashReadDpDataOutCmd
+	.section	.text.flash_enter_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_enter_slc_mode
+	.thumb
+	.thumb_func
+	.type	flash_enter_slc_mode, %function
+flash_enter_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L36
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L34
+	ldr	r3, .L36+4
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	movs	r2, #218
+	str	r2, [r3, #8]
+.L34:
+	bx	lr
+.L37:
+	.align	2
+.L36:
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.size	flash_enter_slc_mode, .-flash_enter_slc_mode
+	.section	.text.flash_exit_slc_mode,"ax",%progbits
+	.align	1
+	.global	flash_exit_slc_mode
+	.thumb
+	.thumb_func
+	.type	flash_exit_slc_mode, %function
+flash_exit_slc_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L40
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L38
+	ldr	r3, .L40+4
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	movs	r2, #223
+	str	r2, [r3, #8]
+.L38:
+	bx	lr
+.L41:
+	.align	2
+.L40:
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.size	flash_exit_slc_mode, .-flash_exit_slc_mode
+	.section	.text.FlashProgFirstCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgFirstCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgFirstCmd, %function
+FlashProgFirstCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	lsrs	r2, r1, #16
+	ldr	r4, .L43
+	mov	r5, r0
+	ldr	r6, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	movs	r4, #128
+	adds	r3, r3, #8
+	add	r3, r6, r3, lsl #8
+	str	r4, [r3, #8]
+	movs	r4, #0
+	str	r4, [r3, #4]
+	str	r4, [r3, #4]
+	uxtb	r4, r1
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	str	r2, [r3, #4]
+	pop	{r4, r5, r6, lr}
+	b	FlashSetRandomizer
+.L44:
+	.align	2
+.L43:
+	.word	.LANCHOR5
+	.size	FlashProgFirstCmd, .-FlashProgFirstCmd
+	.section	.text.FlashEraseCmd,"ax",%progbits
+	.align	1
+	.global	FlashEraseCmd
+	.thumb
+	.thumb_func
+	.type	FlashEraseCmd, %function
+FlashEraseCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L47
+	ldr	r5, [r4, r0, lsl #3]
+	add	r0, r4, r0, lsl #3
+	ldrb	r3, [r0, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r5, r3, lsl #8
+	cbz	r2, .L46
+	movs	r2, #96
+	str	r2, [r3, #8]
+	uxtb	r2, r1
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #16
+	str	r2, [r3, #4]
+	ldr	r2, .L47+4
+	ldr	r2, [r2, #0]
+	adds	r1, r1, r2
+.L46:
+	movs	r2, #96
+	str	r2, [r3, #8]
+	uxtb	r2, r1
+	str	r2, [r3, #4]
+	lsrs	r2, r1, #8
+	lsrs	r1, r1, #16
+	str	r2, [r3, #4]
+	movs	r2, #208
+	str	r1, [r3, #4]
+	str	r2, [r3, #8]
+	pop	{r4, r5, pc}
+.L48:
+	.align	2
+.L47:
+	.word	.LANCHOR5
+	.word	.LANCHOR2
+	.size	FlashEraseCmd, .-FlashEraseCmd
+	.section	.text.FlashProgDpSecondCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgDpSecondCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgDpSecondCmd, %function
+FlashProgDpSecondCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	lsrs	r2, r1, #16
+	ldr	r4, .L50
+	mov	r5, r0
+	ldr	r6, [r4, r0, lsl #3]
+	add	r4, r4, r0, lsl #3
+	ldrb	r3, [r4, #4]	@ zero_extendqisi2
+	ldr	r4, .L50+4
+	adds	r3, r3, #8
+	ldrb	r4, [r4, #11]	@ zero_extendqisi2
+	add	r3, r6, r3, lsl #8
+	str	r4, [r3, #8]
+	movs	r4, #0
+	str	r4, [r3, #4]
+	str	r4, [r3, #4]
+	uxtb	r4, r1
+	str	r4, [r3, #4]
+	lsrs	r4, r1, #8
+	str	r4, [r3, #4]
+	str	r2, [r3, #4]
+	pop	{r4, r5, r6, lr}
+	b	FlashSetRandomizer
+.L51:
+	.align	2
+.L50:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashProgDpSecondCmd, .-FlashProgDpSecondCmd
+	.section	.text.FlashProgSecondCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgSecondCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgSecondCmd, %function
+FlashProgSecondCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L53
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	movs	r2, #16
+	str	r2, [r3, #8]
+	bx	lr
+.L54:
+	.align	2
+.L53:
+	.word	.LANCHOR5
+	.size	FlashProgSecondCmd, .-FlashProgSecondCmd
+	.section	.text.FlashProgDpFirstCmd,"ax",%progbits
+	.align	1
+	.global	FlashProgDpFirstCmd
+	.thumb
+	.thumb_func
+	.type	FlashProgDpFirstCmd, %function
+FlashProgDpFirstCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L56
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	add	r3, r2, r3, lsl #8
+	ldr	r2, .L56+4
+	ldrb	r2, [r2, #10]	@ zero_extendqisi2
+	str	r2, [r3, #8]
+	bx	lr
+.L57:
+	.align	2
+.L56:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashProgDpFirstCmd, .-FlashProgDpFirstCmd
+	.section	.text.FlashReadStatus,"ax",%progbits
+	.align	1
+	.global	FlashReadStatus
+	.thumb
+	.thumb_func
+	.type	FlashReadStatus, %function
+FlashReadStatus:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r2, #112
+	ldr	r3, .L59
+	ldr	r5, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	movs	r0, #80
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	adds	r4, r4, #8
+	lsls	r4, r4, #8
+	adds	r3, r5, r4
+	str	r2, [r3, #8]
+	bl	udelay
+	ldr	r0, [r5, r4]
+	pop	{r3, r4, r5, pc}
+.L60:
+	.align	2
+.L59:
+	.word	.LANCHOR5
+	.size	FlashReadStatus, .-FlashReadStatus
+	.section	.text.JSHash,"ax",%progbits
+	.align	1
+	.global	JSHash
+	.thumb
+	.thumb_func
+	.type	JSHash, %function
+JSHash:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	mov	r3, r0
+	movs	r2, #0
+	push	{r4, r5, lr}
+	ldr	r0, .L64
+	b	.L62
+.L63:
+	lsls	r4, r0, #5
+	ldrb	r5, [r3, r2]	@ zero_extendqisi2
+	add	r4, r4, r0, lsr #2
+	adds	r2, r2, #1
+	adds	r4, r4, r5
+	eors	r0, r0, r4
+.L62:
+	cmp	r2, r1
+	bne	.L63
+	pop	{r4, r5, pc}
+.L65:
+	.align	2
+.L64:
+	.word	1204201446
+	.size	JSHash, .-JSHash
+	.section	.text.FlashLoadIdbInfo,"ax",%progbits
+	.align	1
+	.global	FlashLoadIdbInfo
+	.thumb
+	.thumb_func
+	.type	FlashLoadIdbInfo, %function
+FlashLoadIdbInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r0, #0
+	bx	lr
+	.size	FlashLoadIdbInfo, .-FlashLoadIdbInfo
+	.section	.text.BuildFlashLsbPageTable,"ax",%progbits
+	.align	1
+	.global	BuildFlashLsbPageTable
+	.thumb
+	.thumb_func
+	.type	BuildFlashLsbPageTable, %function
+BuildFlashLsbPageTable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r4, r1
+	cbnz	r0, .L68
+	ldr	r3, .L107
+.L69:
+	strh	r0, [r3, #2]!	@ movhi
+	adds	r0, r0, #1
+	uxth	r0, r0
+	cmp	r0, #256
+	bne	.L69
+	b	.L70
+.L68:
+	cmp	r0, #1
+	bne	.L71
+	movs	r2, #0
+	ldr	r0, .L107+4
+	mov	r3, r2
+.L74:
+	uxth	r1, r3
+	cmp	r1, #3
+	bls	.L72
+	tst	r3, #1
+	ite	eq
+	moveq	r1, #2
+	movne	r1, #3
+	subs	r1, r2, r1
+	uxth	r1, r1
+.L72:
+	adds	r3, r3, #1
+	strh	r1, [r2, r0]	@ movhi
+	adds	r2, r2, #2
+	cmp	r3, #256
+	bne	.L74
+	b	.L70
+.L71:
+	cmp	r0, #2
+	bne	.L75
+	movs	r3, #0
+	ldr	r0, .L107
+	movw	r2, #65535
+	mov	r1, r3
+	b	.L106
+.L78:
+	cmp	r3, #1
+	ite	ls
+	movls	r1, r3
+	movhi	r1, r2
+.L106:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	strh	r1, [r0, #2]!	@ movhi
+	uxth	r3, r3
+	uxth	r2, r2
+	cmp	r3, #256
+	bne	.L78
+	b	.L70
+.L75:
+	cmp	r0, #3
+	mov	r2, #0
+	bne	.L79
+	ldr	r0, .L107+4
+	mov	r3, r2
+.L82:
+	uxth	r1, r2
+	cmp	r1, #5
+	bls	.L80
+	tst	r2, #1
+	ite	eq
+	moveq	r1, #4
+	movne	r1, #5
+	subs	r1, r3, r1
+	uxth	r1, r1
+.L80:
+	adds	r2, r2, #1
+	strh	r1, [r3, r0]	@ movhi
+	adds	r3, r3, #2
+	cmp	r2, #256
+	bne	.L82
+	b	.L70
+.L79:
+	cmp	r0, #4
+	bne	.L83
+	ldr	r3, .L107+4
+	movs	r1, #16
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #1
+	strh	r0, [r3, #8]	@ movhi
+	strh	r2, [r3, #2]	@ movhi
+	movs	r2, #2
+	strh	r2, [r3, #4]	@ movhi
+	movs	r2, #3
+	strh	r2, [r3, #6]	@ movhi
+	movs	r2, #5
+	strh	r2, [r3, #10]	@ movhi
+	movs	r2, #7
+	strh	r2, [r3, #12]	@ movhi
+	movs	r2, #8
+	strh	r2, [r3, #14]!	@ movhi
+.L85:
+	tst	r2, #1
+	ite	eq
+	moveq	r0, #6
+	movne	r0, #7
+	adds	r2, r2, #1
+	subs	r0, r1, r0
+	adds	r1, r1, #2
+	cmp	r2, #256
+	strh	r0, [r3, #2]!	@ movhi
+	uxth	r1, r1
+	bne	.L85
+	b	.L70
+.L83:
+	cmp	r0, #5
+	bne	.L86
+	ldr	r1, .L107
+	mov	r3, r2
+.L87:
+	strh	r3, [r1, #2]!	@ movhi
+	adds	r3, r3, #1
+	uxth	r3, r3
+	cmp	r3, #16
+	bne	.L87
+	ldr	r2, .L107+8
+.L88:
+	strh	r3, [r2, #2]!	@ movhi
+	adds	r3, r3, #2
+	uxth	r3, r3
+	cmp	r3, #496
+	bne	.L88
+	b	.L70
+.L86:
+	cmp	r0, #6
+	bne	.L70
+	ldr	r0, .L107
+	mov	r3, r2
+.L91:
+	uxth	r1, r3
+	cmp	r1, #5
+	bls	.L89
+	tst	r3, #1
+	ite	eq
+	moveq	r1, #10
+	movne	r1, #12
+	subs	r1, r2, r1
+	uxth	r1, r1
+.L89:
+	adds	r3, r3, #1
+	adds	r2, r2, #3
+	cmp	r3, #256
+	strh	r1, [r0, #2]!	@ movhi
+	uxth	r2, r2
+	bne	.L91
+.L70:
+	mov	r2, #1024
+	ldr	r0, .L107+12
+	movs	r1, #255
+	uxth	r4, r4
+	bl	memset
+	ldr	r2, .L107
+	movs	r3, #0
+	ldr	r0, .L107+12
+	b	.L92
+.L93:
+	adds	r3, r3, #1
+	ldrh	r1, [r2, #2]!
+	uxth	r3, r3
+	strh	r1, [r0, r1, lsl #1]	@ movhi
+.L92:
+	cmp	r3, r4
+	bcc	.L93
+	pop	{r4, pc}
+.L108:
+	.align	2
+.L107:
+	.word	.LANCHOR8-2
+	.word	.LANCHOR8
+	.word	.LANCHOR8+30
+	.word	.LANCHOR9
+	.size	BuildFlashLsbPageTable, .-BuildFlashLsbPageTable
+	.section	.text.FlashPrintInfo,"ax",%progbits
+	.align	1
+	.global	FlashPrintInfo
+	.thumb
+	.thumb_func
+	.type	FlashPrintInfo, %function
+FlashPrintInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashPrintInfo, .-FlashPrintInfo
+	.section	.text.ToshibaSetRRPara,"ax",%progbits
+	.align	1
+	.global	ToshibaSetRRPara
+	.thumb
+	.thumb_func
+	.type	ToshibaSetRRPara, %function
+ToshibaSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	add	r7, r1, r1, lsl #2
+	ldr	r3, .L118
+	mov	r4, r0
+	mov	r6, r1
+	movs	r5, #0
+	add	sl, r3, r7
+	b	.L111
+.L115:
+	ldr	r8, .L118+16
+	movs	r3, #85
+	str	r3, [r4, #8]
+	movs	r0, #200
+	ldrsb	r3, [r5, r8]
+	str	r3, [r4, #4]
+	bl	udelay
+	ldr	r3, .L118+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L112
+	add	r8, r8, r7
+	add	r3, r8, r5
+	b	.L117
+.L112:
+	cmp	r3, #35
+	bne	.L114
+	add	r3, sl, r5
+.L117:
+	ldrsb	r3, [r3, #5]
+	b	.L116
+.L114:
+	ldr	r3, .L118+8
+	ldrsb	r3, [r3, r6]
+.L116:
+	adds	r5, r5, #1
+	str	r3, [r4, #0]
+.L111:
+	ldr	r3, .L118+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r5, r3
+	bcc	.L115
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L119:
+	.align	2
+.L118:
+	.word	.LANCHOR12
+	.word	.LANCHOR11
+	.word	.LANCHOR13
+	.word	.LANCHOR14
+	.word	.LANCHOR10
+	.size	ToshibaSetRRPara, .-ToshibaSetRRPara
+	.section	.text.SamsungSetRRPara,"ax",%progbits
+	.align	1
+	.global	SamsungSetRRPara
+	.thumb
+	.thumb_func
+	.type	SamsungSetRRPara, %function
+SamsungSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r5, r0
+	ldr	r6, .L123
+	movs	r4, #0
+	ldr	r7, .L123+4
+	add	r8, r6, r1, lsl #2
+	b	.L121
+.L122:
+	movs	r3, #161
+	str	r3, [r5, #8]
+	movs	r3, #0
+	str	r3, [r5, #0]
+	ldrsb	r3, [r4, r6]
+	mov	r0, #300
+	str	r3, [r5, #0]
+	add	r3, r8, r4
+	adds	r4, r4, #1
+	ldrsb	r3, [r3, #4]
+	str	r3, [r5, #0]
+	bl	udelay
+.L121:
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L122
+	pop	{r4, r5, r6, r7, r8, pc}
+.L124:
+	.align	2
+.L123:
+	.word	.LANCHOR15
+	.word	.LANCHOR14
+	.size	SamsungSetRRPara, .-SamsungSetRRPara
+	.section	.text.FlashDieInfoInit,"ax",%progbits
+	.align	1
+	.global	FlashDieInfoInit
+	.thumb
+	.thumb_func
+	.type	FlashDieInfoInit, %function
+FlashDieInfoInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L137
+	movs	r3, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	strb	r3, [r2, #0]
+	ldr	r2, .L137+4
+	strb	r3, [r2, #0]
+	ldr	r3, .L137+8
+	ldrh	r2, [r3, #10]
+	ldr	r3, .L137+12
+	cmp	r2, #256
+	str	r2, [r3, #0]
+	bls	.L126
+	mov	r2, #512
+	b	.L136
+.L126:
+	cmp	r2, #128
+	bls	.L127
+	mov	r2, #256
+.L136:
+	str	r2, [r3, #0]
+.L127:
+	movs	r1, #0
+	movs	r2, #8
+	ldr	r0, .L137+16
+	movs	r5, #0
+	bl	memset
+	movs	r1, #0
+	movs	r2, #32
+	ldr	r0, .L137+20
+	bl	memset
+	ldr	r6, .L137+24
+	ldr	r0, .L137+28
+	movs	r1, #0
+	movs	r2, #128
+	ldr	sl, .L137+36
+	bl	memset
+	ldr	r8, .L137
+	ldr	r3, .L137+20
+	mov	r7, r6
+.L129:
+	ldr	r4, [sl, #0]
+	mov	r1, r7
+	mov	r0, r4
+	ldrb	fp, [r0], #1	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	mov	r2, fp
+	bl	FlashMemCmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L128
+	ldrb	r2, [r8, #0]	@ zero_extendqisi2
+	ldr	r1, .L137+16
+	str	r0, [r3, r2, lsl #2]
+	strb	r5, [r1, r2]
+	adds	r2, r2, #1
+	strb	r2, [r8, #0]
+.L128:
+	adds	r5, r5, #1
+	adds	r7, r7, #8
+	cmp	r5, #4
+	bne	.L129
+	ldr	r2, .L137
+	ldr	r3, .L137+4
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	strb	r1, [r3, #0]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #2
+	bne	.L130
+	ldr	r7, .L137+20
+	movs	r5, #0
+	ldr	r8, .L137+12
+	adds	r3, r4, #1
+	mov	sl, r2
+.L133:
+	mov	r0, r3
+	mov	r1, r6
+	mov	r2, fp
+	str	r3, [sp, #4]
+	bl	FlashMemCmp8
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L131
+	ldrb	r2, [sl, #0]	@ zero_extendqisi2
+	ldrb	r1, [r4, #13]	@ zero_extendqisi2
+	ldr	r0, [r8, #0]
+	muls	r0, r1, r0
+	ldrh	r1, [r4, #14]
+	and	r1, r1, #65280
+	muls	r1, r0, r1
+	str	r1, [r7, r2, lsl #2]
+	ldrb	r0, [r4, #23]	@ zero_extendqisi2
+	cbz	r0, .L132
+	lsls	r1, r1, #1
+	str	r1, [r7, r2, lsl #2]
+.L132:
+	ldr	r1, .L137+16
+	strb	r5, [r1, r2]
+	adds	r2, r2, #1
+	ldr	r1, .L137
+	strb	r2, [r1, #0]
+.L131:
+	adds	r5, r5, #1
+	adds	r6, r6, #8
+	cmp	r5, #4
+	bne	.L133
+.L130:
+	ldr	r3, .L137
+	ldrb	r2, [r4, #13]	@ zero_extendqisi2
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	muls	r2, r3, r2
+	ldrh	r3, [r4, #14]
+	muls	r2, r3, r2
+	ldr	r3, .L137+32
+	strh	r2, [r3, #0]	@ movhi
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L138:
+	.align	2
+.L137:
+	.word	.LANCHOR16
+	.word	.LANCHOR17
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR22
+	.word	.LANCHOR21
+	.word	.LANCHOR24
+	.word	.LANCHOR23
+	.size	FlashDieInfoInit, .-FlashDieInfoInit
+	.section	.text.FlashReadIdbData,"ax",%progbits
+	.align	1
+	.global	FlashReadIdbData
+	.thumb
+	.thumb_func
+	.type	FlashReadIdbData, %function
+FlashReadIdbData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	mov	r2, #2048
+	ldr	r1, .L140
+	bl	memcpy
+	movs	r0, #0
+	pop	{r3, pc}
+.L141:
+	.align	2
+.L140:
+	.word	.LANCHOR25
+	.size	FlashReadIdbData, .-FlashReadIdbData
+	.section	.text.FlashLoadPhyInfoInRam,"ax",%progbits
+	.align	1
+	.global	FlashLoadPhyInfoInRam
+	.thumb
+	.thumb_func
+	.type	FlashLoadPhyInfoInRam, %function
+FlashLoadPhyInfoInRam:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r5, #0
+	ldr	r6, .L154
+.L146:
+	lsls	r3, r5, #5
+	ldr	r1, .L154+4
+	adds	r4, r6, r3
+	adds	r0, r4, #1
+	ldrb	r2, [r6, r3]	@ zero_extendqisi2
+	bl	FlashMemCmp8
+	cbnz	r0, .L143
+	cbnz	r4, .L152
+	b	.L153
+.L143:
+	adds	r5, r5, #1
+	cmp	r5, #72
+	bne	.L146
+	mov	r0, #-1
+	pop	{r4, r5, r6, pc}
+.L152:
+	ldrb	r2, [r4, #22]	@ zero_extendqisi2
+	mov	r1, r0
+	ldr	r3, .L154+8
+.L148:
+	lsls	r0, r1, #5
+	ldrb	r0, [r0, r3]	@ zero_extendqisi2
+	cmp	r0, r2
+	beq	.L147
+	adds	r1, r1, #1
+	cmp	r1, #4
+	bne	.L148
+.L147:
+	ldr	r3, .L154+8
+	movs	r2, #32
+	ldr	r0, .L154+12
+	add	r1, r3, r1, lsl #5
+	bl	memcpy
+	ldr	r0, .L154+16
+	mov	r1, r4
+	movs	r2, #32
+	bl	memcpy
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L153:
+	mov	r0, #-1
+	pop	{r4, r5, r6, pc}
+.L155:
+	.align	2
+.L154:
+	.word	.LANCHOR26
+	.word	.LANCHOR22
+	.word	.LANCHOR27
+	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.size	FlashLoadPhyInfoInRam, .-FlashLoadPhyInfoInRam
+	.global	__aeabi_uidiv
+	.section	.text.LogAddr2PhyAddr,"ax",%progbits
+	.align	1
+	.global	LogAddr2PhyAddr
+	.thumb
+	.thumb_func
+	.type	LogAddr2PhyAddr, %function
+LogAddr2PhyAddr:
+	@ args = 4, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	fp, r3
+	ldr	r3, .L161
+	mov	r5, r2
+	mov	r4, r0
+	mov	ip, r1
+	ldrh	r2, [r3, #12]
+	ldrh	r8, [r3, #14]
+	ldr	r3, .L161+4
+	mul	r8, r8, r2
+	ldrh	r6, [r3, #0]
+	ldr	r3, .L161+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	uxth	r8, r8
+	cmp	r3, #1
+	bne	.L157
+	lsls	r6, r6, #1
+	uxth	r6, r6
+.L157:
+	ldr	r7, [r4, #4]
+	mov	r1, r8
+	str	ip, [sp, #4]
+	bic	r7, r7, #-2147483648
+	ubfx	sl, r7, #10, #16
+	mov	r0, sl
+	lsls	r7, r7, #22
+	bl	__aeabi_uidiv
+	ldr	ip, [sp, #4]
+	lsrs	r7, r7, #22
+	cmp	ip, #1
+	uxth	r0, r0
+	mls	r8, r8, r0, sl
+	uxth	r8, r8
+	bne	.L158
+	ldr	r3, .L161+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L158
+	ldr	r3, .L161+16
+	ldrh	r7, [r3, r7, lsl #1]
+.L158:
+	ldr	r3, .L161+20
+	ldr	r3, [r3, r0, lsl #2]
+	mla	r6, r6, r8, r3
+	ldrb	r3, [sp, #40]	@ zero_extendqisi2
+	cmp	r3, #1
+	add	r7, r6, r7
+	str	r7, [r5, #0]
+	str	r0, [fp, #0]
+	bls	.L160
+	ldr	r0, [r4, #4]
+	ldr	r3, [r4, #40]
+	add	r0, r0, #1024
+	subs	r3, r0, r3
+	rsbs	r0, r3, #0
+	adc	r0, r0, r3
+	b	.L159
+.L160:
+	movs	r0, #0
+.L159:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L162:
+	.align	2
+.L161:
+	.word	.LANCHOR28
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	.LANCHOR20
+	.size	LogAddr2PhyAddr, .-LogAddr2PhyAddr
+	.section	.text.FlashReadStatusEN,"ax",%progbits
+	.align	1
+	.global	FlashReadStatusEN
+	.thumb
+	.thumb_func
+	.type	FlashReadStatusEN, %function
+FlashReadStatusEN:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L172
+	push	{r4, r5, r6, lr}
+	ldr	r5, [r3, r0, lsl #3]
+	add	r0, r3, r0, lsl #3
+	ldrb	r4, [r0, #4]	@ zero_extendqisi2
+	ldr	r0, .L172+4
+	adds	r4, r4, #8
+	ldr	r0, [r0, #0]
+	lsls	r4, r4, #8
+	adds	r3, r5, r4
+	ldrb	r0, [r0, #8]	@ zero_extendqisi2
+	cmp	r0, #2
+	bne	.L164
+	ldr	r0, .L172+8
+	cbnz	r2, .L165
+	ldrb	r2, [r0, #13]	@ zero_extendqisi2
+	b	.L171
+.L165:
+	ldrb	r2, [r0, #14]	@ zero_extendqisi2
+.L171:
+	str	r2, [r3, #8]
+	ldrb	r0, [r0, #15]	@ zero_extendqisi2
+	cbnz	r0, .L170
+	b	.L168
+.L169:
+	lsls	r6, r2, #3
+	adds	r2, r2, #1
+	lsr	r6, r1, r6
+	uxtb	r6, r6
+	str	r6, [r3, #4]
+	b	.L167
+.L170:
+	movs	r2, #0
+.L167:
+	cmp	r2, r0
+	bcc	.L169
+	b	.L168
+.L164:
+	movs	r2, #112
+	str	r2, [r3, #8]
+.L168:
+	movs	r0, #80
+	bl	udelay
+	ldr	r0, [r5, r4]
+	uxtb	r0, r0
+	pop	{r4, r5, r6, pc}
+.L173:
+	.align	2
+.L172:
+	.word	.LANCHOR5
+	.word	.LANCHOR23
+	.word	.LANCHOR6
+	.size	FlashReadStatusEN, .-FlashReadStatusEN
+	.section	.text.FlashWaitReadyEN,"ax",%progbits
+	.align	1
+	.global	FlashWaitReadyEN
+	.thumb
+	.thumb_func
+	.type	FlashWaitReadyEN, %function
+FlashWaitReadyEN:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	mov	r5, r1
+	mov	r4, r2
+.L178:
+	mov	r0, r6
+	mov	r1, r5
+	mov	r2, r4
+	bl	FlashReadStatusEN
+	cmp	r0, #255
+	beq	.L178
+	lsls	r2, r0, #25
+	bpl	.L178
+	pop	{r4, r5, r6, pc}
+	.size	FlashWaitReadyEN, .-FlashWaitReadyEN
+	.section	.text.ReadFlashInfo,"ax",%progbits
+	.align	1
+	.global	ReadFlashInfo
+	.thumb
+	.thumb_func
+	.type	ReadFlashInfo, %function
+ReadFlashInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r1, #0
+	movs	r2, #11
+	mov	r4, r0
+	bl	memset
+	ldr	r3, .L182
+	ldr	r1, .L182+4
+	ldr	r3, [r3, #0]
+	ldr	r1, [r1, #0]
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	muls	r2, r1, r2
+	uxth	r2, r2
+	strb	r2, [r4, #4]
+	movs	r1, #0
+	lsrs	r0, r2, #8
+	strb	r0, [r4, #5]
+	ldr	r0, .L182+8
+	ldrb	r0, [r0, #0]	@ zero_extendqisi2
+	strb	r0, [r4, #7]
+	ldrb	r0, [r3, #13]	@ zero_extendqisi2
+	muls	r2, r0, r2
+	ldrh	r0, [r3, #14]
+	muls	r2, r0, r2
+	ldrb	r0, [r3, #8]	@ zero_extendqisi2
+	muls	r2, r0, r2
+	strb	r2, [r4, #0]
+	ubfx	r0, r2, #8, #8
+	strb	r0, [r4, #1]
+	ubfx	r0, r2, #16, #8
+	lsrs	r2, r2, #24
+	strb	r0, [r4, #2]
+	strb	r2, [r4, #3]
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	strb	r2, [r4, #6]
+	movs	r2, #32
+	strb	r2, [r4, #8]
+	movs	r2, #1
+	ldrb	r3, [r3, #7]	@ zero_extendqisi2
+	strb	r1, [r4, #10]
+	strb	r3, [r4, #9]
+	ldr	r3, .L182+12
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	mov	r3, r1
+	ldr	r1, .L182+16
+	b	.L180
+.L181:
+	ldrb	r5, [r3, r1]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	ldrb	r6, [r4, #10]	@ zero_extendqisi2
+	lsl	r5, r2, r5
+	orrs	r5, r5, r6
+	strb	r5, [r4, #10]
+.L180:
+	uxtb	r5, r3
+	cmp	r5, r0
+	bcc	.L181
+	pop	{r4, r5, r6, pc}
+.L183:
+	.align	2
+.L182:
+	.word	.LANCHOR23
+	.word	.LANCHOR2
+	.word	.LANCHOR29
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.size	ReadFlashInfo, .-ReadFlashInfo
+	.section	.text.NandcReadDontCaseBusyEn,"ax",%progbits
+	.align	1
+	.global	NandcReadDontCaseBusyEn
+	.thumb
+	.thumb_func
+	.type	NandcReadDontCaseBusyEn, %function
+NandcReadDontCaseBusyEn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandcReadDontCaseBusyEn, .-NandcReadDontCaseBusyEn
+	.section	.text.NandcGetChipIf,"ax",%progbits
+	.align	1
+	.global	NandcGetChipIf
+	.thumb
+	.thumb_func
+	.type	NandcGetChipIf, %function
+NandcGetChipIf:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L186
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r0, [r3, #4]	@ zero_extendqisi2
+	adds	r0, r0, #8
+	add	r0, r2, r0, lsl #8
+	bx	lr
+.L187:
+	.align	2
+.L186:
+	.word	.LANCHOR5
+	.size	NandcGetChipIf, .-NandcGetChipIf
+	.section	.text.NandcSetDdrPara,"ax",%progbits
+	.align	1
+	.global	NandcSetDdrPara
+	.thumb
+	.thumb_func
+	.type	NandcSetDdrPara, %function
+NandcSetDdrPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L189
+	lsls	r2, r0, #8
+	orr	r2, r2, r0, lsl #16
+	orr	r2, r2, #1
+	ldr	r3, [r3, #0]
+	str	r2, [r3, #304]
+	bx	lr
+.L190:
+	.align	2
+.L189:
+	.word	.LANCHOR30
+	.size	NandcSetDdrPara, .-NandcSetDdrPara
+	.section	.text.NandcSetDdrDiv,"ax",%progbits
+	.align	1
+	.global	NandcSetDdrDiv
+	.thumb
+	.thumb_func
+	.type	NandcSetDdrDiv, %function
+NandcSetDdrDiv:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L192
+	orr	r0, r0, #16640
+	ldr	r3, [r3, #0]
+	str	r0, [r3, #344]
+	bx	lr
+.L193:
+	.align	2
+.L192:
+	.word	.LANCHOR30
+	.size	NandcSetDdrDiv, .-NandcSetDdrDiv
+	.section	.text.NandcSetDdrMode,"ax",%progbits
+	.align	1
+	.global	NandcSetDdrMode
+	.thumb
+	.thumb_func
+	.type	NandcSetDdrMode, %function
+NandcSetDdrMode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L196
+	ldr	r2, [r3, #0]
+	ldr	r3, [r2, #0]
+	bfc	r3, #13, #1
+	cbz	r0, .L195
+	orr	r3, r3, #253952
+.L195:
+	str	r3, [r2, #0]
+	bx	lr
+.L197:
+	.align	2
+.L196:
+	.word	.LANCHOR30
+	.size	NandcSetDdrMode, .-NandcSetDdrMode
+	.section	.text.NandcSetMode,"ax",%progbits
+	.align	1
+	.global	NandcSetMode
+	.thumb
+	.thumb_func
+	.type	NandcSetMode, %function
+NandcSetMode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L202
+	ands	r1, r0, #6
+	ldr	r2, [r3, #0]
+	ldr	r3, [r2, #0]
+	beq	.L199
+	lsls	r1, r0, #29
+	orr	r3, r3, #24576
+	movw	r1, #16641
+	str	r1, [r2, #344]
+	ldr	r1, .L202+4
+	bfc	r3, #15, #1
+	orr	r3, r3, #196608
+	it	mi
+	orrmi	r3, r3, #32768
+	str	r1, [r2, #304]
+	movs	r1, #38
+	str	r1, [r2, #308]
+	movs	r1, #39
+	str	r1, [r2, #308]
+	b	.L201
+.L199:
+	bfi	r3, r1, #13, #1
+.L201:
+	str	r3, [r2, #0]
+	movs	r0, #0
+	bx	lr
+.L203:
+	.align	2
+.L202:
+	.word	.LANCHOR30
+	.word	1710595
+	.size	NandcSetMode, .-NandcSetMode
+	.section	.text.NandcFlashCs,"ax",%progbits
+	.align	1
+	.global	NandcFlashCs
+	.thumb
+	.thumb_func
+	.type	NandcFlashCs, %function
+NandcFlashCs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L205
+	ldr	r3, [r2, r0, lsl #3]
+	add	r2, r2, r0, lsl #3
+	movs	r0, #1
+	ldrb	r1, [r2, #4]	@ zero_extendqisi2
+	ldr	r2, [r3, #0]
+	lsl	r1, r0, r1
+	bfi	r2, r1, #0, #8
+	str	r2, [r3, #0]
+	bx	lr
+.L206:
+	.align	2
+.L205:
+	.word	.LANCHOR5
+	.size	NandcFlashCs, .-NandcFlashCs
+	.section	.text.NandcFlashDeCs,"ax",%progbits
+	.align	1
+	.global	NandcFlashDeCs
+	.thumb
+	.thumb_func
+	.type	NandcFlashDeCs, %function
+NandcFlashDeCs:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L208
+	ldr	r2, [r3, r0, lsl #3]
+	ldr	r3, [r2, #0]
+	bfc	r3, #0, #8
+	bfc	r3, #17, #1
+	str	r3, [r2, #0]
+	bx	lr
+.L209:
+	.align	2
+.L208:
+	.word	.LANCHOR5
+	.size	NandcFlashDeCs, .-NandcFlashDeCs
+	.section	.text.FlashWaitCmdDone,"ax",%progbits
+	.align	1
+	.global	FlashWaitCmdDone
+	.thumb
+	.thumb_func
+	.type	FlashWaitCmdDone, %function
+FlashWaitCmdDone:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L213
+	lsls	r3, r0, #4
+	push	{r4, r5, r6, lr}
+	adds	r4, r2, r3
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r6, r0
+	ldr	r3, [r4, #8]
+	cbz	r3, .L211
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r3, .L213+4
+	ldr	r1, [r4, #4]
+	mov	r0, r5
+	ldr	r2, [r3, r6, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r6, r0
+	mov	r0, r5
+	bl	NandcFlashDeCs
+	ldr	r3, [r4, #8]
+	ldr	r2, [r4, #12]
+	ands	r6, r6, #1
+	it	ne
+	movne	r6, #-1
+	str	r6, [r3, #0]
+	movs	r3, #0
+	str	r3, [r4, #8]
+	cbz	r2, .L211
+	str	r6, [r2, #0]
+	str	r3, [r4, #12]
+.L211:
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L214:
+	.align	2
+.L213:
+	.word	.LANCHOR21
+	.word	.LANCHOR20
+	.size	FlashWaitCmdDone, .-FlashWaitCmdDone
+	.section	.text.HynixSetRRPara,"ax",%progbits
+	.align	1
+	.global	HynixSetRRPara
+	.thumb
+	.thumb_func
+	.type	HynixSetRRPara, %function
+HynixSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r8, r3
+	ldr	r3, .L221
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	sxth	fp, r0
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #6
+	bne	.L216
+	ldr	r3, .L221+4
+	add	fp, r3, fp, lsl #6
+	add	fp, fp, r8, lsl #2
+	b	.L217
+.L216:
+	cmp	r3, #7
+	bne	.L218
+	lsl	r3, fp, #7
+	add	fp, r3, fp, lsl #5
+	ldr	r3, .L221+8
+	add	fp, r3, fp
+	sxth	r3, r8
+	lsls	r2, r3, #3
+	add	r3, r2, r3, lsl #1
+	add	fp, fp, r3
+	b	.L217
+.L218:
+	add	fp, r8, fp, lsl #3
+	ldr	r3, .L221+4
+	add	fp, r3, fp, lsl #3
+.L217:
+	ldr	r3, .L221+12
+	mov	r0, r4
+	movs	r7, #0
+	ldr	r2, [r3, r4, lsl #3]
+	add	r3, r3, r4, lsl #3
+	ldrb	sl, [r3, #4]	@ zero_extendqisi2
+	add	sl, sl, #8
+	add	sl, r2, sl, lsl #8
+	bl	NandcFlashCs
+	movs	r3, #54
+	str	r3, [sl, #8]
+	b	.L219
+.L220:
+	ldrb	r3, [r6, r7]	@ zero_extendqisi2
+	movs	r0, #200
+	str	r3, [sl, #4]
+	bl	udelay
+	ldrsb	r3, [fp, r7]
+	adds	r7, r7, #1
+	str	r3, [sl, #0]
+.L219:
+	uxtb	r3, r7
+	cmp	r3, r5
+	bcc	.L220
+	movs	r3, #22
+	mov	r0, r4
+	str	r3, [sl, #8]
+	bl	NandcFlashDeCs
+	ldr	r3, .L221+16
+	strb	r8, [r3, r4]
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L222:
+	.align	2
+.L221:
+	.word	.LANCHOR23
+	.word	.LANCHOR31+20
+	.word	.LANCHOR31+28
+	.word	.LANCHOR5
+	.word	.LANCHOR32
+	.size	HynixSetRRPara, .-HynixSetRRPara
+	.section	.text.FlashSetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	FlashSetReadRetryDefault
+	.thumb
+	.thumb_func
+	.type	FlashSetReadRetryDefault, %function
+FlashSetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L228
+	push	{r4, r5, r6, lr}
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L223
+	ldr	r6, .L228+4
+	movs	r4, #0
+	ldr	r5, .L228+8
+.L226:
+	ldrb	r3, [r6, r4, lsl #3]	@ zero_extendqisi2
+	uxtb	r0, r4
+	cmp	r3, #173
+	bne	.L225
+	ldrb	r1, [r5, #1]	@ zero_extendqisi2
+	movs	r3, #0
+	ldr	r2, .L228+12
+	bl	HynixSetRRPara
+.L225:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L226
+.L223:
+	pop	{r4, r5, r6, pc}
+.L229:
+	.align	2
+.L228:
+	.word	.LANCHOR23
+	.word	.LANCHOR22
+	.word	.LANCHOR31
+	.word	.LANCHOR31+4
+	.size	FlashSetReadRetryDefault, .-FlashSetReadRetryDefault
+	.section	.text.NandcDelayns,"ax",%progbits
+	.align	1
+	.global	NandcDelayns
+	.thumb
+	.thumb_func
+	.type	NandcDelayns, %function
+NandcDelayns:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	udelay
+	movs	r0, #0
+	pop	{r3, pc}
+	.size	NandcDelayns, .-NandcDelayns
+	.section	.text.NandcWaitFlashReady,"ax",%progbits
+	.align	1
+	.global	NandcWaitFlashReady
+	.thumb
+	.thumb_func
+	.type	NandcWaitFlashReady, %function
+NandcWaitFlashReady:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L236
+	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r5, [r3, r0, lsl #3]
+	ldr	r4, .L236+4
+.L233:
+	movs	r0, #100
+	bl	udelay
+	ldr	r3, [r5, #0]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r0, r3, #22
+	bmi	.L234
+	subs	r4, r4, #1
+	bne	.L233
+	mov	r0, #-1
+	b	.L232
+.L234:
+	movs	r0, #0
+.L232:
+	pop	{r1, r2, r3, r4, r5, pc}
+.L237:
+	.align	2
+.L236:
+	.word	.LANCHOR5
+	.word	100000
+	.size	NandcWaitFlashReady, .-NandcWaitFlashReady
+	.section	.text.FlashEraseSLc2KBlocks,"ax",%progbits
+	.align	1
+	.global	FlashEraseSLc2KBlocks
+	.thumb
+	.thumb_func
+	.type	FlashEraseSLc2KBlocks, %function
+FlashEraseSLc2KBlocks:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r6, r1
+	mov	r4, r0
+	movs	r5, #0
+	ldr	r7, .L246
+	ldr	sl, .L246+12
+	ldr	fp, .L246+16
+	b	.L239
+.L245:
+	subs	r3, r6, r5
+	movs	r1, #0
+	add	r2, sp, #8
+	mov	r0, r4
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #12
+	bl	LogAddr2PhyAddr
+	ldr	r3, [sp, #12]
+	ldrb	r2, [r7, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bcc	.L240
+	mov	r3, #-1
+	str	r3, [r4, #0]
+	b	.L241
+.L240:
+	ldrb	r8, [sl, r3]	@ zero_extendqisi2
+	lsls	r3, r3, #4
+	mov	r0, r8
+	strb	r8, [fp, r3]
+	bl	NandcWaitFlashReady
+	mov	r0, r8
+	bl	NandcFlashCs
+	movs	r2, #0
+	ldr	r1, [sp, #8]
+	mov	r0, r8
+	bl	FlashEraseCmd
+	mov	r0, r8
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #8]
+	mov	r0, r8
+	bl	FlashReadStatus
+	ldr	r3, .L246+4
+	ldr	r1, [r3, #0]
+	ldr	r3, [sp, #8]
+	adds	r1, r1, r3
+	ands	r0, r0, #1
+	it	ne
+	movne	r0, #-1
+	movs	r2, #0
+	str	r0, [r4, #0]
+	mov	r0, r8
+	bl	FlashEraseCmd
+	mov	r0, r8
+	bl	NandcWaitFlashReady
+	mov	r0, r8
+	ldr	r1, [sp, #8]
+	bl	FlashReadStatus
+	lsls	r3, r0, #31
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r4, #0]
+	ldr	r3, [r4, #0]
+	adds	r3, r3, #1
+	bne	.L244
+	ldr	r0, .L246+8
+	ldr	r1, [sp, #8]
+	bl	printf
+.L244:
+	mov	r0, r8
+	bl	NandcFlashDeCs
+.L241:
+	adds	r5, r5, #1
+	adds	r4, r4, #36
+.L239:
+	cmp	r5, r6
+	bne	.L245
+	movs	r0, #0
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L247:
+	.align	2
+.L246:
+	.word	.LANCHOR16
+	.word	.LANCHOR2
+	.word	.LC1
+	.word	.LANCHOR19
+	.word	.LANCHOR21
+	.size	FlashEraseSLc2KBlocks, .-FlashEraseSLc2KBlocks
+	.section	.text.FlashEraseBlocks,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlocks
+	.thumb
+	.thumb_func
+	.type	FlashEraseBlocks, %function
+FlashEraseBlocks:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L264
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r4, [r3, #0]	@ zero_extendqisi2
+	mov	r5, r0
+	str	r1, [sp, #12]
+	mov	r6, r2
+	cmp	r4, #0
+	beq	.L262
+	mov	r1, r2
+	bl	FlashEraseSLc2KBlocks
+	b	.L250
+.L258:
+	rsb	r3, r4, r8
+	movs	r6, #36
+	muls	r6, r4, r6
+	add	fp, r5, r6
+	movs	r1, #0
+	uxtb	r3, r3
+	mov	r0, fp
+	str	r3, [sp, #0]
+	add	r2, sp, #16
+	add	r3, sp, #20
+	bl	LogAddr2PhyAddr
+	ldr	r1, .L264+4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	mov	r7, r0
+	ldr	r0, [sp, #20]
+	cmp	r0, r3
+	bcc	.L251
+	mov	r3, #-1
+	str	r3, [r5, r6]
+	b	.L252
+.L251:
+	ldr	r3, .L264+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r7, #0
+	add	r3, sl, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L254
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L254:
+	ldr	r2, [sp, #20]
+	ldr	r1, .L264+12
+	add	r3, r1, r2, lsl #4
+	movs	r1, #0
+	str	r1, [r3, #12]
+	ldr	r1, [sp, #16]
+	str	fp, [r3, #8]
+	str	r1, [r3, #4]
+	cbz	r7, .L255
+	adds	r1, r4, #1
+	movs	r0, #36
+	mla	r1, r0, r1, r5
+	str	r1, [r3, #12]
+.L255:
+	ldr	r3, .L264+16
+	ldrb	r6, [r3, r2]	@ zero_extendqisi2
+	lsls	r2, r2, #4
+	mov	r0, r6
+	strb	r6, [sl, r2]
+	bl	NandcFlashCs
+	ldr	r2, [sp, #12]
+	mov	r0, r6
+	cmp	r2, #1
+	bne	.L256
+	ldr	r3, .L264+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L256
+	bl	flash_enter_slc_mode
+	b	.L257
+.L256:
+	bl	flash_exit_slc_mode
+.L257:
+	ldr	r3, .L264+24
+	mov	r0, r6
+	ldr	r2, [sp, #20]
+	adds	r4, r4, r7
+	ldr	r1, [sp, #16]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r6
+	ldr	r1, [sp, #16]
+	mov	r2, r7
+	bl	FlashEraseCmd
+	mov	r0, r6
+	bl	NandcFlashDeCs
+.L252:
+	adds	r4, r4, #1
+	b	.L249
+.L262:
+	ldr	sl, .L264+12
+	mov	r8, r2
+.L249:
+	cmp	r4, r8
+	bcc	.L258
+	movs	r4, #0
+	ldr	r7, .L264+4
+	ldr	r6, .L264+20
+	ldr	r5, .L264+12
+	b	.L259
+.L261:
+	uxtb	r0, r4
+	bl	FlashWaitCmdDone
+	ldr	r3, [sp, #12]
+	cmp	r3, #1
+	bne	.L260
+	ldrb	r3, [r6, #0]	@ zero_extendqisi2
+	cbz	r3, .L260
+	lsls	r3, r4, #4
+	ldrb	r0, [r5, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L260:
+	adds	r4, r4, #1
+.L259:
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L261
+	movs	r0, #0
+.L250:
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L265:
+	.align	2
+.L264:
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.word	.LANCHOR33
+	.word	.LANCHOR21
+	.word	.LANCHOR19
+	.word	.LANCHOR7
+	.word	.LANCHOR20
+	.size	FlashEraseBlocks, .-FlashEraseBlocks
+	.section	.text.SandiskSetRRPara,"ax",%progbits
+	.align	1
+	.global	SandiskSetRRPara
+	.thumb
+	.thumb_func
+	.type	SandiskSetRRPara, %function
+SandiskSetRRPara:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	movs	r3, #239
+	mov	r4, r0
+	str	r3, [r0, #8]
+	movs	r3, #17
+	str	r3, [r0, #4]
+	movs	r0, #200
+	mov	r5, r1
+	bl	udelay
+	ldr	r3, .L272
+	ldr	r1, .L272+4
+	add	r5, r5, r5, lsl #2
+	ldr	r2, .L272+8
+	ldrb	r6, [r3, #0]	@ zero_extendqisi2
+	adds	r1, r1, r5
+	ldr	r3, .L272+12
+	adds	r5, r2, r5
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	movs	r3, #0
+	b	.L267
+.L270:
+	cmp	r0, #67
+	ite	eq
+	addeq	r2, r5, r3
+	addne	r2, r1, r3
+	adds	r3, r3, #1
+	ldrsb	r2, [r2, #5]
+	str	r2, [r4, #0]
+.L267:
+	cmp	r3, r6
+	bcc	.L270
+	movs	r0, #0
+	pop	{r4, r5, r6, lr}
+	b	NandcWaitFlashReady
+.L273:
+	.align	2
+.L272:
+	.word	.LANCHOR14
+	.word	.LANCHOR12
+	.word	.LANCHOR10
+	.word	.LANCHOR11
+	.size	SandiskSetRRPara, .-SandiskSetRRPara
+	.section	.text.FlashEraseBlock,"ax",%progbits
+	.align	1
+	.global	FlashEraseBlock
+	.thumb
+	.thumb_func
+	.type	FlashEraseBlock, %function
+FlashEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	mov	r5, r1
+	mov	r6, r2
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r2, r6
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashEraseCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r5, #1
+	pop	{r4, r5, r6, pc}
+	.size	FlashEraseBlock, .-FlashEraseBlock
+	.section	.text.FlashReset,"ax",%progbits
+	.align	1
+	.global	FlashReset
+	.thumb
+	.thumb_func
+	.type	FlashReset, %function
+FlashReset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L276
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	ldrb	r5, [r3, #4]	@ zero_extendqisi2
+	adds	r5, r5, #8
+	add	r5, r2, r5, lsl #8
+	bl	NandcFlashCs
+	movs	r3, #255
+	mov	r0, r4
+	str	r3, [r5, #8]
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	pop	{r3, r4, r5, lr}
+	b	NandcFlashDeCs
+.L277:
+	.align	2
+.L276:
+	.word	.LANCHOR5
+	.size	FlashReset, .-FlashReset
+	.section	.text.FlashSetInterfaceMode,"ax",%progbits
+	.align	1
+	.global	FlashSetInterfaceMode
+	.thumb
+	.thumb_func
+	.type	FlashSetInterfaceMode, %function
+FlashSetInterfaceMode:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L292
+	mov	ip, #239
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r6, #0
+	ldr	r8, .L292+8
+	mov	r1, r6
+	ldrb	sl, [r3, #0]	@ zero_extendqisi2
+	mov	lr, #128
+	and	fp, sl, #1
+	and	sl, sl, #4
+	str	sl, [sp, #4]
+.L288:
+	add	r3, r8, r6
+	ldr	r7, .L292+4
+	ldr	r2, [r6, r8]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	ldrb	r5, [r6, r7]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	lsls	r3, r3, #8
+	cmp	r5, #152
+	add	r4, r2, r3
+	beq	.L279
+	cmp	r5, #69
+	beq	.L279
+	cmp	r5, #173
+	beq	.L279
+	cmp	r5, #44
+	bne	.L280
+.L279:
+	cmp	r0, #1
+	bne	.L281
+	cmp	fp, #0
+	beq	.L280
+	cmp	r5, #173
+	str	ip, [r4, #8]
+	bne	.L282
+	str	r0, [r4, #4]
+	b	.L291
+.L282:
+	cmp	r5, #44
+	bne	.L284
+	str	r0, [r4, #4]
+	movs	r4, #5
+	str	r4, [r2, r3]
+	b	.L286
+.L284:
+	str	lr, [r4, #4]
+	str	r0, [r2, r3]
+	b	.L286
+.L281:
+	ldr	r7, [sp, #4]
+	cbz	r7, .L280
+	cmp	r5, #173
+	str	ip, [r4, #8]
+	bne	.L285
+	movs	r5, #1
+	movs	r7, #32
+	str	r5, [r4, #4]
+	b	.L290
+.L285:
+	cmp	r5, #44
+	bne	.L287
+	movs	r7, #35
+	movs	r5, #1
+	str	r5, [r4, #4]
+.L290:
+	str	r7, [r2, r3]
+	b	.L286
+.L287:
+	str	lr, [r4, #4]
+.L291:
+	str	r1, [r2, r3]
+.L286:
+	str	r1, [r2, r3]
+	str	r1, [r2, r3]
+	str	r1, [r2, r3]
+.L280:
+	adds	r6, r6, #8
+	cmp	r6, #32
+	bne	.L288
+	movs	r0, #0
+	bl	NandcWaitFlashReady
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L293:
+	.align	2
+.L292:
+	.word	.LANCHOR34
+	.word	.LANCHOR22
+	.word	.LANCHOR5
+	.size	FlashSetInterfaceMode, .-FlashSetInterfaceMode
+	.section	.text.FlashReadDpCmd,"ax",%progbits
+	.align	1
+	.global	FlashReadDpCmd
+	.thumb
+	.thumb_func
+	.type	FlashReadDpCmd, %function
+FlashReadDpCmd:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L298
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r7, r2
+	ldr	r2, [r3, r0, lsl #3]
+	add	r3, r3, r0, lsl #3
+	mov	r4, r0
+	mov	r5, r1
+	ldrb	r6, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L298+4
+	adds	r6, r6, #8
+	add	r6, r2, r6, lsl #8
+	ldrb	r2, [r3, #16]	@ zero_extendqisi2
+	cmp	r2, #1
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	str	r2, [r6, #8]
+	bne	.L295
+	mov	r8, #0
+	uxtb	r2, r1
+	str	r8, [r6, #4]
+	str	r8, [r6, #4]
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #16
+	str	r2, [r6, #4]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [r6, #8]
+	bl	NandcWaitFlashReady
+	str	r8, [r6, #8]
+	str	r8, [r6, #4]
+	str	r8, [r6, #4]
+	b	.L297
+.L295:
+	uxtb	r2, r1
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #8
+	str	r2, [r6, #4]
+	lsrs	r2, r1, #16
+	str	r2, [r6, #4]
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r3, [r6, #8]
+.L297:
+	uxtb	r3, r7
+	mov	r0, r4
+	str	r3, [r6, #4]
+	mov	r1, r5
+	lsrs	r3, r7, #8
+	lsrs	r7, r7, #16
+	str	r3, [r6, #4]
+	movs	r3, #48
+	str	r7, [r6, #4]
+	str	r3, [r6, #8]
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FlashSetRandomizer
+.L299:
+	.align	2
+.L298:
+	.word	.LANCHOR5
+	.word	.LANCHOR6
+	.size	FlashReadDpCmd, .-FlashReadDpCmd
+	.section	.text.FlashDeInit,"ax",%progbits
+	.align	1
+	.global	FlashDeInit
+	.thumb
+	.thumb_func
+	.type	FlashDeInit, %function
+FlashDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	movs	r0, #0
+	ldr	r4, .L302
+	bl	NandcWaitFlashReady
+	bl	FlashSetReadRetryDefault
+	ldrb	r3, [r4, #0]	@ zero_extendqisi2
+	cbz	r3, .L301
+	ldr	r3, .L302+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	lsls	r2, r3, #31
+	bpl	.L301
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r3, #0
+	strb	r3, [r4, #0]
+.L301:
+	ldr	r3, .L302+8
+	movs	r0, #0
+	ldr	r3, [r3, #0]
+	str	r0, [r3, #336]
+	pop	{r4, pc}
+.L303:
+	.align	2
+.L302:
+	.word	.LANCHOR35
+	.word	.LANCHOR34
+	.word	.LANCHOR5
+	.size	FlashDeInit, .-FlashDeInit
+	.section	.text.NandcRandmzSel,"ax",%progbits
+	.align	1
+	.global	NandcRandmzSel
+	.thumb
+	.thumb_func
+	.type	NandcRandmzSel, %function
+NandcRandmzSel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L305
+	ldr	r3, [r3, r0, lsl #3]
+	str	r1, [r3, #336]
+	bx	lr
+.L306:
+	.align	2
+.L305:
+	.word	.LANCHOR5
+	.size	NandcRandmzSel, .-NandcRandmzSel
+	.section	.text.NandcTimeCfg,"ax",%progbits
+	.align	1
+	.global	NandcTimeCfg
+	.thumb
+	.thumb_func
+	.type	NandcTimeCfg, %function
+NandcTimeCfg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L312
+	cmp	r0, #35
+	ldr	r3, [r3, #0]
+	bhi	.L308
+	movw	r2, #4193
+	b	.L311
+.L308:
+	cmp	r0, #99
+	ite	hi
+	movwhi	r2, #8322
+	movwls	r2, #4225
+.L311:
+	str	r2, [r3, #4]
+	bx	lr
+.L313:
+	.align	2
+.L312:
+	.word	.LANCHOR30
+	.size	NandcTimeCfg, .-NandcTimeCfg
+	.section	.text.FlashTimingCfg,"ax",%progbits
+	.align	1
+	.global	FlashTimingCfg
+	.thumb
+	.thumb_func
+	.type	FlashTimingCfg, %function
+FlashTimingCfg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L315
+	ldrb	r0, [r3, #21]	@ zero_extendqisi2
+	b	NandcTimeCfg
+.L316:
+	.align	2
+.L315:
+	.word	.LANCHOR18
+	.size	FlashTimingCfg, .-FlashTimingCfg
+	.section	.text.NandcBchSel,"ax",%progbits
+	.align	1
+	.global	NandcBchSel
+	.thumb
+	.thumb_func
+	.type	NandcBchSel, %function
+NandcBchSel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L322
+	movs	r1, #16
+	ldr	r2, [r3, #0]
+	movs	r3, #1
+	str	r3, [r2, #8]
+	ldr	r3, .L322+4
+	str	r0, [r3, #0]
+	movs	r3, #0
+	cmp	r0, r1
+	bfi	r3, r1, #8, #8
+	bfc	r3, #18, #1
+	beq	.L321
+.L318:
+	cmp	r0, #24
+	bne	.L320
+	orr	r3, r3, #16
+	b	.L319
+.L320:
+	cmp	r0, #40
+	orr	r3, r3, #262144
+	orr	r3, r3, #16
+	bne	.L319
+.L321:
+	bfc	r3, #4, #1
+.L319:
+	orr	r3, r3, #1
+	str	r3, [r2, #12]
+	bx	lr
+.L323:
+	.align	2
+.L322:
+	.word	.LANCHOR30
+	.word	.LANCHOR36
+	.size	NandcBchSel, .-NandcBchSel
+	.section	.text.FlashBchSel,"ax",%progbits
+	.align	1
+	.global	FlashBchSel
+	.thumb
+	.thumb_func
+	.type	FlashBchSel, %function
+FlashBchSel:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L325
+	strb	r0, [r3, #0]
+	b	NandcBchSel
+.L326:
+	.align	2
+.L325:
+	.word	.LANCHOR29
+	.size	FlashBchSel, .-FlashBchSel
+	.section	.text.NandCIrqEnable,"ax",%progbits
+	.align	1
+	.global	NandCIrqEnable
+	.thumb
+	.thumb_func
+	.type	NandCIrqEnable, %function
+NandCIrqEnable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqEnable, .-NandCIrqEnable
+	.section	.text.NandCIrqDisable,"ax",%progbits
+	.align	1
+	.global	NandCIrqDisable
+	.thumb
+	.thumb_func
+	.type	NandCIrqDisable, %function
+NandCIrqDisable:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandCIrqDisable, .-NandCIrqDisable
+	.section	.text.rk_nandc_get_irq_status,"ax",%progbits
+	.align	1
+	.global	rk_nandc_get_irq_status
+	.thumb
+	.thumb_func
+	.type	rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, [r0, #372]
+	bx	lr
+	.size	rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+	.section	.text.rk_nandc_flash_ready,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_ready
+	.thumb
+	.thumb_func
+	.type	rk_nandc_flash_ready, %function
+rk_nandc_flash_ready:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_ready, .-rk_nandc_flash_ready
+	.section	.text.NandcIqrWaitFlashReady,"ax",%progbits
+	.align	1
+	.global	NandcIqrWaitFlashReady
+	.thumb
+	.thumb_func
+	.type	NandcIqrWaitFlashReady, %function
+NandcIqrWaitFlashReady:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
+	.section	.text.rk_nandc_flash_xfer_completed,"ax",%progbits
+	.align	1
+	.global	rk_nandc_flash_xfer_completed
+	.thumb
+	.thumb_func
+	.type	rk_nandc_flash_xfer_completed, %function
+rk_nandc_flash_xfer_completed:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
+	.section	.text.NandcSendDumpDataStart,"ax",%progbits
+	.align	1
+	.global	NandcSendDumpDataStart
+	.thumb
+	.thumb_func
+	.type	NandcSendDumpDataStart, %function
+NandcSendDumpDataStart:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, [r0, #16]
+	sub	sp, sp, #8
+	ldr	r3, .L334
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	bfc	r2, #2, #1
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	str	r2, [r0, #16]
+	str	r3, [r0, #8]
+	orr	r3, r3, #4
+	str	r3, [r0, #8]
+	add	sp, sp, #8
+	bx	lr
+.L335:
+	.align	2
+.L334:
+	.word	538969130
+	.size	NandcSendDumpDataStart, .-NandcSendDumpDataStart
+	.section	.text.NandcSendDumpDataDone,"ax",%progbits
+	.align	1
+	.global	NandcSendDumpDataDone
+	.thumb
+	.thumb_func
+	.type	NandcSendDumpDataDone, %function
+NandcSendDumpDataDone:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	sub	sp, sp, #8
+.L337:
+	ldr	r3, [r0, #8]
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #4]
+	lsls	r1, r3, #11
+	bpl	.L337
+	add	sp, sp, #8
+	bx	lr
+	.size	NandcSendDumpDataDone, .-NandcSendDumpDataDone
+	.section	.text.NandcXferStart,"ax",%progbits
+	.align	1
+	.global	NandcXferStart
+	.thumb
+	.thumb_func
+	.type	NandcXferStart, %function
+NandcXferStart:
+	@ args = 8, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #32
+	ldr	r4, [sp, #68]
+	ldr	r6, [sp, #64]
+	cbnz	r4, .L351
+	adds	r7, r6, #0
+	it	ne
+	movne	r7, #1
+	b	.L340
+.L351:
+	movs	r7, #1
+.L340:
+	ldr	r5, .L354
+	mov	r8, #16
+	ldr	r4, [r5, r0, lsl #3]
+	add	r0, r5, r0, lsl #3
+	ldrb	ip, [r0, #4]	@ zero_extendqisi2
+	movs	r0, #0
+	ldr	r5, [r4, #12]
+	bfi	r5, r8, #8, #8
+	bfi	r5, r0, #3, #1
+	bfi	r0, r1, #1, #1
+	bfi	r5, ip, #5, #3
+	orr	r0, r0, #8
+	mov	ip, #1
+	bfi	r0, ip, #5, #2
+	lsr	r3, r3, ip
+	orr	r0, r0, #536870912
+	orr	r0, r0, #1024
+	bfi	r0, r3, #4, #1
+	ldr	r3, .L354+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #3
+	bls	.L341
+	ldr	r3, [r4, #16]
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	bfc	r3, #2, #1
+	str	r3, [sp, #28]
+	cmp	r7, #0
+	beq	.L342
+	cmp	r1, #0
+	beq	.L343
+	ldr	r3, .L354+8
+	str	r1, [sp, #8]
+	str	r2, [sp, #4]
+	ldr	r3, [r3, #0]
+	cmp	r3, #24
+	ite	hi
+	movhi	r3, #128
+	movls	r3, #64
+	str	r3, [sp, #16]
+	lsr	r3, r2, ip
+	str	r3, [sp, #20]
+	ldr	r3, .L354+12
+	ldr	ip, [sp, #68]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #12]
+	movs	r3, #0
+	mov	r7, r3
+	b	.L345
+.L348:
+	ldr	r1, [sp, #68]
+	lsr	fp, r3, #2
+	cbz	r1, .L346
+	ldrh	sl, [ip, #2]
+	ldr	r2, [sp, #12]
+	ldrh	r8, [ip], #4
+	orr	r8, r8, sl, lsl #16
+	str	r8, [r2, fp, lsl #2]
+	b	.L347
+.L346:
+	ldr	r2, [sp, #12]
+	mov	r1, #-1
+	str	r1, [r2, fp, lsl #2]
+.L347:
+	ldr	r1, [sp, #16]
+	adds	r7, r7, #1
+	adds	r3, r3, r1
+.L345:
+	ldr	r2, [sp, #20]
+	cmp	r7, r2
+	bcc	.L348
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #4]
+.L343:
+	adds	r2, r2, #1
+	ldr	r3, .L354+12
+	asrs	r2, r2, #1
+	bfi	r0, r2, #22, #6
+	cbnz	r6, .L353
+	ldr	r2, [r3, #0]
+	b	.L349
+.L353:
+	mov	r2, r6
+.L349:
+	ldr	r7, [r3, #4]
+	mov	ip, #1
+	str	r2, [r3, #8]
+	str	ip, [r3, #24]
+	str	r2, [r3, #16]
+	str	r7, [r3, #20]
+	str	r7, [r3, #12]
+	movs	r3, #0
+	str	r2, [r4, #20]
+	movs	r2, #16
+	str	r7, [r4, #24]
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	bfi	r3, r2, #9, #5
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	orr	r3, r3, #448
+	str	r3, [sp, #28]
+	lsls	r3, r6, #30
+	bne	.L350
+	ldr	r3, [sp, #28]
+	movs	r2, #2
+	bfi	r3, r2, #3, #3
+	str	r3, [sp, #28]
+.L350:
+	ldr	r3, [sp, #28]
+	rsbs	r1, r1, #1
+	it	cc
+	movcc	r1, #0
+	orr	r3, r3, #4
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	bfi	r3, r1, #1, #1
+	str	r3, [sp, #28]
+	ldr	r3, [sp, #28]
+	orr	r3, r3, #1
+	str	r3, [sp, #28]
+.L342:
+	ldr	r3, [sp, #28]
+	str	r3, [r4, #16]
+.L341:
+	str	r5, [r4, #12]
+	str	r0, [r4, #8]
+	orr	r0, r0, #4
+	str	r0, [r4, #8]
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L355:
+	.align	2
+.L354:
+	.word	.LANCHOR5
+	.word	.LANCHOR37
+	.word	.LANCHOR36
+	.word	.LANCHOR38
+	.size	NandcXferStart, .-NandcXferStart
+	.section	.text.NandcXferComp,"ax",%progbits
+	.align	1
+	.global	NandcXferComp
+	.thumb
+	.thumb_func
+	.type	NandcXferComp, %function
+NandcXferComp:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L372
+	push	{r0, r1, r2, r4, r5, lr}
+	ldr	r4, [r3, r0, lsl #3]
+	ldr	r3, .L372+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #3
+	bls	.L368
+	ldr	r2, [r4, #16]
+	lsls	r0, r2, #29
+	bpl	.L368
+	ldr	r2, [r4, #16]
+	lsls	r1, r2, #30
+	bpl	.L364
+	ldr	r2, [r4, #8]
+	str	r2, [sp, #0]
+	b	.L371
+.L362:
+	cmp	r3, #5
+	bls	.L371
+	ldr	r2, [r4, #0]
+	str	r2, [sp, #4]
+	ldr	r2, [sp, #4]
+	lsls	r2, r2, #18
+	bpl	.L371
+	ldr	r2, [sp, #4]
+	lsls	r0, r2, #14
+	bmi	.L361
+.L371:
+	ldr	r1, [r4, #28]
+	ldr	r2, [sp, #0]
+	ubfx	r1, r1, #16, #5
+	ubfx	r2, r2, #22, #6
+	cmp	r1, r2
+	blt	.L362
+	b	.L361
+.L364:
+	ldr	r3, [r4, #8]
+	str	r3, [sp, #0]
+	ldr	r3, [sp, #0]
+	lsls	r1, r3, #11
+	bpl	.L364
+	ldr	r5, .L372+8
+	ldr	r3, [r5, #0]
+	cbz	r3, .L365
+	mov	r0, r4
+	bl	NandcSendDumpDataStart
+.L365:
+	ldr	r3, [r5, #0]
+	cbz	r3, .L361
+	mov	r0, r4
+	bl	NandcSendDumpDataDone
+.L361:
+	ldr	r3, .L372+12
+	movs	r2, #0
+	str	r2, [r3, #24]
+	b	.L356
+.L368:
+	ldr	r3, [r4, #8]
+	str	r3, [sp, #0]
+	ldr	r3, [sp, #0]
+	lsls	r2, r3, #11
+	bpl	.L368
+.L356:
+	pop	{r1, r2, r3, r4, r5, pc}
+.L373:
+	.align	2
+.L372:
+	.word	.LANCHOR5
+	.word	.LANCHOR37
+	.word	.LANCHOR39
+	.word	.LANCHOR38
+	.size	NandcXferComp, .-NandcXferComp
+	.section	.text.NandcCopy1KB,"ax",%progbits
+	.align	1
+	.global	NandcCopy1KB
+	.thumb
+	.thumb_func
+	.type	NandcCopy1KB, %function
+NandcCopy1KB:
+	@ args = 4, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	cmp	r1, #1
+	mov	r4, r2
+	add	r2, r0, #4096
+	ldr	r5, [sp, #16]
+	add	r6, r0, #512
+	add	r2, r2, r4, lsl #9
+	bne	.L375
+	cbz	r3, .L376
+	mov	r0, r2
+	mov	r1, r3
+	mov	r2, #1024
+	bl	memcpy
+.L376:
+	cbz	r5, .L374
+	lsrs	r4, r4, #1
+	ldrb	r2, [r5, #1]	@ zero_extendqisi2
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldrb	r3, [r5, #2]	@ zero_extendqisi2
+	lsls	r3, r3, #16
+	orr	r3, r3, r2, lsl #8
+	ldrb	r2, [r5, #0]	@ zero_extendqisi2
+	orrs	r3, r3, r2
+	ldrb	r2, [r5, #3]	@ zero_extendqisi2
+	orr	r3, r3, r2, lsl #24
+	str	r3, [r6, r4]
+	pop	{r4, r5, r6, pc}
+.L375:
+	cbz	r3, .L378
+	mov	r1, r2
+	mov	r0, r3
+	mov	r2, #1024
+	bl	memcpy
+.L378:
+	cbz	r5, .L374
+	lsrs	r4, r4, #1
+	lsls	r3, r4, #4
+	lsls	r4, r4, #6
+	subs	r4, r4, r3
+	ldr	r3, [r6, r4]
+	lsrs	r2, r3, #8
+	strb	r3, [r5, #0]
+	strb	r2, [r5, #1]
+	lsrs	r2, r3, #16
+	lsrs	r3, r3, #24
+	strb	r2, [r5, #2]
+	strb	r3, [r5, #3]
+.L374:
+	pop	{r4, r5, r6, pc}
+	.size	NandcCopy1KB, .-NandcCopy1KB
+	.section	.text.NandcXferData,"ax",%progbits
+	.align	1
+	.global	NandcXferData
+	.thumb
+	.thumb_func
+	.type	NandcXferData, %function
+NandcXferData:
+	@ args = 4, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #88
+	mov	r4, r3
+	mov	fp, r3
+	ldr	r3, .L417
+	mov	r6, r0
+	str	r1, [sp, #12]
+	lsls	r1, r4, #26
+	mov	sl, r2
+	ldr	r5, [sp, #120]
+	ldr	r8, [r3, r0, lsl #3]
+	bne	.L380
+	cbnz	r5, .L381
+	add	r0, sp, #20
+	movs	r1, #255
+	movs	r2, #64
+	add	r5, sp, #20
+	bl	memset
+.L381:
+	movs	r3, #0
+	mov	r0, r6
+	ldr	r1, [sp, #12]
+	mov	r2, sl
+	stmia	sp, {r4, r5}
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	bne	.L404
+	ldr	r3, .L417+4
+	lsr	r0, sl, #1
+	ldr	r1, .L417+8
+	ldr	r4, [r3, #0]
+	ldr	r3, [sp, #12]
+	cmp	r4, #24
+	ite	hi
+	movhi	r4, #128
+	movls	r4, #64
+	mov	r2, r3
+	b	.L384
+.L385:
+	ldr	r7, [r1, #4]
+	lsrs	r3, r3, #2
+	adds	r2, r2, #1
+	ldr	r3, [r7, r3, lsl #2]
+	lsrs	r7, r3, #8
+	strb	r3, [r5, #0]
+	strb	r7, [r5, #1]
+	lsrs	r7, r3, #16
+	lsrs	r3, r3, #24
+	strb	r7, [r5, #2]
+	strb	r3, [r5, #3]
+	adds	r5, r5, #4
+	mov	r3, r6
+.L384:
+	cmp	r2, r0
+	add	r6, r3, r4
+	bcc	.L385
+	ldr	r3, .L417+4
+	lsr	sl, sl, #2
+	ldr	r0, [r3, #0]
+	ldr	r3, .L417+12
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	mov	r4, r3
+	b	.L386
+.L392:
+	add	r2, r3, #8
+	ldr	r2, [r8, r2, lsl #2]
+	str	r2, [sp, #84]
+	ldr	r2, [sp, #84]
+	lsls	r2, r2, #29
+	bmi	.L407
+	ldr	r2, [sp, #84]
+	ands	r2, r2, #32768
+	bne	.L407
+	cmp	r1, #5
+	bls	.L388
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #27, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #29, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L389
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #27, #1
+	b	.L416
+.L389:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #29, #1
+	b	.L416
+.L388:
+	cmp	r1, #3
+	bls	.L390
+	ldr	r7, [sp, #84]
+	ldr	r5, [sp, #84]
+	ldr	r6, [sp, #84]
+	ubfx	r7, r7, #3, #5
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #28, #1
+	ubfx	r6, r6, #16, #5
+	ubfx	r2, r2, #30, #1
+	orr	r5, r7, r5, lsl #5
+	orr	r2, r6, r2, lsl #5
+	cmp	r5, r2
+	ldr	r5, [sp, #84]
+	bls	.L391
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #3, #5
+	ubfx	r2, r2, #28, #1
+	b	.L416
+.L391:
+	ldr	r2, [sp, #84]
+	ubfx	r5, r5, #16, #5
+	ubfx	r2, r2, #30, #1
+.L416:
+	orr	r2, r5, r2, lsl #5
+.L390:
+	cmp	r4, r2
+	it	cc
+	movcc	r4, r2
+	b	.L387
+.L407:
+	mov	r4, #-1
+.L387:
+	adds	r3, r3, #1
+.L386:
+	cmp	r3, sl
+	bcs	.L382
+	cmp	r0, #0
+	bne	.L392
+	b	.L382
+.L404:
+	movs	r4, #0
+.L382:
+	movs	r3, #0
+	str	r3, [r8, #16]
+	b	.L393
+.L380:
+	ldr	r3, [sp, #12]
+	mov	r7, #0
+	cmp	r3, #1
+	bne	.L414
+	b	.L394
+.L397:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	and	r4, r7, #3
+	mov	r0, r8
+	movs	r1, #1
+	mla	r3, r7, r3, r5
+	mov	r2, r4
+	adds	r7, r7, #2
+	str	r3, [sp, #0]
+	mov	r3, fp
+	bl	NandcCopy1KB
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	str	r3, [sp, #4]
+	movs	r1, #1
+	movs	r2, #2
+	mov	r3, r4
+	bl	NandcXferStart
+	mov	r0, r6
+	bl	NandcXferComp
+	add	fp, fp, #1024
+.L394:
+	cmp	r7, sl
+	bcc	.L397
+	movs	r4, #0
+	b	.L393
+.L414:
+	mov	r1, r7
+	movs	r2, #2
+	mov	r3, r7
+	str	r7, [sp, #0]
+	str	r7, [sp, #4]
+	mov	r4, r7
+	bl	NandcXferStart
+	b	.L398
+.L402:
+	mov	r0, r6
+	bl	NandcXferComp
+	ldr	r3, [r8, #32]
+	add	ip, r7, #2
+	cmp	ip, sl
+	str	r3, [sp, #84]
+	bcs	.L399
+	movs	r3, #0
+	mov	r0, r6
+	str	r3, [sp, #0]
+	mov	r1, r3
+	str	r3, [sp, #4]
+	movs	r2, #2
+	and	r3, ip, #3
+	str	ip, [sp, #8]
+	bl	NandcXferStart
+	ldr	ip, [sp, #8]
+.L399:
+	ldr	r3, [sp, #84]
+	lsls	r3, r3, #29
+	bmi	.L411
+	ldr	r2, [sp, #84]
+	ldr	r3, [sp, #84]
+	ubfx	r2, r2, #3, #5
+	ubfx	r3, r3, #27, #1
+	orr	r3, r2, r3, lsl #5
+	cmp	r4, r3
+	it	cc
+	movcc	r4, r3
+	b	.L400
+.L411:
+	mov	r4, #-1
+.L400:
+	cmp	r5, #0
+	ite	ne
+	movne	r3, #2
+	moveq	r3, #0
+	sub	r2, ip, #2
+	mov	r0, r8
+	movs	r1, #0
+	mla	r7, r7, r3, r5
+	and	r2, r2, #3
+	mov	r3, fp
+	str	ip, [sp, #8]
+	add	fp, fp, #1024
+	str	r7, [sp, #0]
+	bl	NandcCopy1KB
+	ldr	ip, [sp, #8]
+	mov	r7, ip
+.L398:
+	cmp	r7, sl
+	bcc	.L402
+.L393:
+	ldr	r3, .L417+12
+	ldr	r3, [r3, #0]
+	cmp	r3, #5
+	bls	.L403
+	ldr	r3, [sp, #12]
+	cbnz	r3, .L403
+	ldr	r3, [r8, #0]
+	and	r2, r3, #139264
+	cmp	r2, #139264
+	bne	.L403
+	mov	r4, #-1
+	orr	r3, r3, #131072
+	str	r3, [r8, #0]
+.L403:
+	mov	r0, r4
+	add	sp, sp, #88
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L418:
+	.align	2
+.L417:
+	.word	.LANCHOR5
+	.word	.LANCHOR36
+	.word	.LANCHOR38
+	.word	.LANCHOR37
+	.size	NandcXferData, .-NandcXferData
+	.section	.text.FlashProgPage,"ax",%progbits
+	.align	1
+	.global	FlashProgPage
+	.thumb
+	.thumb_func
+	.type	FlashProgPage, %function
+FlashProgPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L422
+	mov	r5, r1
+	mov	r6, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L420
+	ldr	r3, .L422+4
+	ldr	r2, .L422+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	bcs	.L420
+	ldr	r3, .L422+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L421
+	subs	r7, r7, #2
+	b	.L420
+.L421:
+	movs	r7, #4
+.L420:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r0, r4
+	mov	r1, r5
+	bl	FlashProgFirstCmd
+	uxtb	r2, r7
+	mov	r3, r6
+	movs	r1, #1
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r1, r5
+	mov	r0, r4
+	bl	FlashReadStatus
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	and	r0, r5, #1
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L423:
+	.align	2
+.L422:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.word	.LANCHOR0
+	.size	FlashProgPage, .-FlashProgPage
+	.section	.text.FlashPageProgMsbFFData,"ax",%progbits
+	.align	1
+	.global	FlashPageProgMsbFFData
+	.thumb
+	.thumb_func
+	.type	FlashPageProgMsbFFData, %function
+FlashPageProgMsbFFData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L432
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r2
+	ldr	r2, .L432+4
+	mov	r8, r0
+	ldr	r3, [r3, #0]
+	mov	r7, r1
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cbz	r2, .L425
+	ldr	r2, .L432+8
+	ldr	r1, [r2, #0]
+	ldr	r2, .L432+12
+	cmp	r1, r2
+	beq	.L424
+.L425:
+	subs	r2, r3, #5
+	cmp	r2, #2
+	bls	.L429
+	cmp	r3, #68
+	beq	.L429
+	cmp	r3, #35
+	beq	.L429
+	cmp	r3, #19
+	bne	.L424
+	b	.L429
+.L430:
+	ldrh	r3, [sl, r4, lsl #1]
+	cmp	r3, fp
+	bne	.L424
+	movs	r1, #255
+	mov	r2, #32768
+	ldr	r0, [r5, #0]
+	bl	memset
+	adds	r1, r4, r7
+	adds	r4, r4, #1
+	mov	r0, r8
+	ldr	r2, [r5, #0]
+	movs	r3, #0
+	bl	FlashProgPage
+	uxth	r4, r4
+	b	.L431
+.L429:
+	ldr	r6, .L432
+	movw	fp, #65535
+	ldr	sl, .L432+20
+	ldr	r5, .L432+16
+.L431:
+	ldr	r3, [r6, #0]
+	ldrh	r3, [r3, #10]
+	cmp	r3, r4
+	bhi	.L430
+.L424:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L433:
+	.align	2
+.L432:
+	.word	.LANCHOR23
+	.word	.LANCHOR7
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR41
+	.word	.LANCHOR9
+	.size	FlashPageProgMsbFFData, .-FlashPageProgMsbFFData
+	.section	.text.FlashReadRawPage,"ax",%progbits
+	.align	1
+	.global	FlashReadRawPage
+	.thumb
+	.thumb_func
+	.type	FlashReadRawPage, %function
+FlashReadRawPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r8, r3
+	ldr	r3, .L437
+	mov	r6, r1
+	mov	r5, r2
+	mov	r4, r0
+	ldrb	r7, [r3, #9]	@ zero_extendqisi2
+	cbnz	r0, .L435
+	ldr	r3, .L437+4
+	ldr	r2, .L437+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	muls	r3, r2, r3
+	cmp	r1, r3
+	it	cc
+	movcc	r7, #4
+.L435:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r1, r6
+	mov	r0, r4
+	bl	FlashReadCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r3, r5
+	movs	r1, #0
+	mov	r2, r7
+	mov	r0, r4
+	str	r8, [sp, #0]
+	bl	NandcXferData
+	mov	r5, r0
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L438:
+	.align	2
+.L437:
+	.word	.LANCHOR18
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadRawPage, .-FlashReadRawPage
+	.section	.text.HynixReadRetrial,"ax",%progbits
+	.align	1
+	.global	HynixReadRetrial
+	.thumb
+	.thumb_func
+	.type	HynixReadRetrial, %function
+HynixReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r2
+	ldr	r2, .L454
+	mov	r7, r3
+	mov	r6, r0
+	str	r1, [sp, #4]
+	adds	r3, r2, r0
+	mov	r8, #0
+	ldrb	fp, [r2, #2]	@ zero_extendqisi2
+	mov	r5, #-1
+	ldr	r2, .L454+4
+	ldrb	r4, [r3, #12]	@ zero_extendqisi2
+	ldr	r2, [r2, #0]
+	ldrb	r2, [r2, #19]	@ zero_extendqisi2
+	cmp	r2, #7
+	it	eq
+	ldrbeq	r4, [r3, #20]	@ zero_extendqisi2
+	bl	NandcWaitFlashReady
+	b	.L441
+.L446:
+	adds	r4, r4, #1
+	ldr	r2, .L454
+	mov	r0, r6
+	uxtb	r4, r4
+	cmp	r4, fp
+	it	cs
+	movcs	r4, #0
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	mov	r3, r4
+	adds	r2, r2, #4
+	bl	HynixSetRRPara
+	mov	r3, r7
+	mov	r0, r6
+	ldr	r1, [sp, #4]
+	mov	r2, sl
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	beq	.L443
+	ldr	r2, .L454+8
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L452
+	movs	r7, #0
+	mov	sl, r7
+.L443:
+	add	r8, r8, #1
+.L441:
+	cmp	r8, fp
+	bcc	.L446
+	b	.L445
+.L452:
+	mov	r5, r0
+.L445:
+	ldr	r3, .L454+4
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	cmp	r3, #7
+	ldr	r3, .L454
+	add	r6, r3, r6
+	ldr	r3, .L454+8
+	it	eq
+	strbeq	r4, [r6, #20]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	it	ne
+	strbne	r4, [r6, #12]
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L449
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L449:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L455:
+	.align	2
+.L454:
+	.word	.LANCHOR31
+	.word	.LANCHOR23
+	.word	.LANCHOR29
+	.size	HynixReadRetrial, .-HynixReadRetrial
+	.section	.text.MicronReadRetrial,"ax",%progbits
+	.align	1
+	.global	MicronReadRetrial
+	.thumb
+	.thumb_func
+	.type	MicronReadRetrial, %function
+MicronReadRetrial:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	mov	fp, r3
+	ldr	r3, .L470
+	str	r2, [sp, #20]
+	mov	sl, r0
+	ldr	r2, .L470+4
+	str	r1, [sp, #16]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbnz	r2, .L457
+	add	r3, r3, r3, lsl #1
+	ubfx	r3, r3, #2, #8
+	b	.L469
+.L457:
+	lsrs	r3, r3, #2
+.L469:
+	mov	r0, sl
+	str	r3, [sp, #12]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L470+8
+	mov	r8, #0
+	mov	r4, #-1
+	ldr	r6, [r3, sl, lsl #3]
+	add	r3, r3, sl, lsl #3
+	ldrb	r7, [r3, #4]	@ zero_extendqisi2
+	adds	r7, r7, #8
+	lsls	r7, r7, #8
+	adds	r5, r6, r7
+	b	.L459
+.L463:
+	movs	r2, #239
+	movs	r3, #137
+	str	r2, [r5, #8]
+	movs	r0, #200
+	str	r3, [r5, #4]
+	bl	udelay
+	movs	r2, #0
+	add	ip, r8, #1
+	mov	r0, sl
+	str	ip, [r5, #0]
+	mov	r3, fp
+	str	r2, [r5, #0]
+	ldr	r1, [sp, #16]
+	str	r2, [r5, #0]
+	str	r2, [r5, #0]
+	ldr	r2, [sp, #20]
+	str	ip, [sp, #8]
+	bl	FlashReadRawPage
+	ldr	ip, [sp, #8]
+	adds	r2, r0, #1
+	beq	.L460
+	ldr	r3, [sp, #12]
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	cmp	r0, r3
+	bcc	.L467
+	mov	fp, #0
+	str	fp, [sp, #20]
+.L460:
+	mov	r8, ip
+.L459:
+	ldr	r2, .L470+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r8, r3
+	bcc	.L463
+	b	.L462
+.L467:
+	mov	r4, r0
+.L462:
+	movs	r3, #239
+	movs	r0, #200
+	str	r3, [r5, #8]
+	movs	r3, #137
+	str	r3, [r5, #4]
+	bl	udelay
+	movs	r3, #0
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	str	r3, [r6, r7]
+	ldr	r3, [sp, #12]
+	cmp	r4, r3
+	bcc	.L464
+	ldr	r0, .L470+16
+	mov	r1, r8
+	ldr	r2, [sp, #16]
+	mov	r3, r8
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+	str	r4, [sp, #0]
+	bl	printf
+.L464:
+	mov	r0, r4
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L471:
+	.align	2
+.L470:
+	.word	.LANCHOR29
+	.word	.LANCHOR7
+	.word	.LANCHOR5
+	.word	.LANCHOR42
+	.word	.LC2
+	.size	MicronReadRetrial, .-MicronReadRetrial
+	.section	.text.SamsungReadRetrial,"ax",%progbits
+	.align	1
+	.global	SamsungReadRetrial
+	.thumb
+	.thumb_func
+	.type	SamsungReadRetrial, %function
+SamsungReadRetrial:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	r8, r2
+	mov	r6, r3
+	mov	fp, r1
+	bl	NandcWaitFlashReady
+	ldr	r3, .L482
+	movs	r5, #1
+	mov	r4, #-1
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	sl, [r3, #4]	@ zero_extendqisi2
+	add	sl, sl, #8
+	add	sl, r2, sl, lsl #8
+	b	.L473
+.L477:
+	mov	r0, sl
+	uxtb	r1, r5
+	bl	SamsungSetRRPara
+	mov	r1, fp
+	mov	r0, r7
+	mov	r2, r8
+	mov	r3, r6
+	bl	FlashReadRawPage
+	adds	r1, r0, #1
+	beq	.L474
+	ldr	r2, .L482+4
+	cmp	r4, #-1
+	it	eq
+	moveq	r4, r0
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r0, r3, lsr #2
+	bcc	.L480
+	movs	r6, #0
+	mov	r8, r6
+.L474:
+	adds	r5, r5, #1
+.L473:
+	ldr	r2, .L482+8
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r5, r3
+	bcc	.L477
+	b	.L476
+.L480:
+	mov	r4, r0
+.L476:
+	movs	r1, #0
+	mov	r0, sl
+	bl	SamsungSetRRPara
+	ldr	r3, .L482+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r4, r3, lsr #2
+	bcc	.L478
+	cmp	r4, #-1
+	ite	eq
+	moveq	r4, #-1
+	movne	r4, #256
+.L478:
+	mov	r0, r4
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L483:
+	.align	2
+.L482:
+	.word	.LANCHOR5
+	.word	.LANCHOR29
+	.word	.LANCHOR42
+	.size	SamsungReadRetrial, .-SamsungReadRetrial
+	.section	.text.ToshibaReadRetrial,"ax",%progbits
+	.align	1
+	.global	ToshibaReadRetrial
+	.thumb
+	.thumb_func
+	.type	ToshibaReadRetrial, %function
+ToshibaReadRetrial:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r7, r0
+	mov	fp, r2
+	mov	r8, r3
+	str	r1, [sp, #4]
+	bl	NandcWaitFlashReady
+	ldr	r3, .L506
+	ldr	r2, [r3, r7, lsl #3]
+	add	r3, r3, r7, lsl #3
+	ldrb	r4, [r3, #4]	@ zero_extendqisi2
+	ldr	r3, .L506+4
+	adds	r4, r4, #8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r4, r2, r4, lsl #8
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bls	.L501
+	ldr	r3, .L506+8
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L502
+	movs	r0, #0
+	mov	sl, #1
+	bl	NandcSetDdrMode
+	b	.L486
+.L502:
+	mov	sl, r3
+.L486:
+	movs	r3, #92
+	str	r3, [r4, #8]
+	movs	r3, #197
+	str	r3, [r4, #8]
+	b	.L485
+.L501:
+	mov	sl, #0
+.L485:
+	movs	r6, #1
+	mov	r5, #-1
+	b	.L487
+.L496:
+	ldr	r1, .L506+4
+	mov	r0, r4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	uxtb	r1, r6
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L488
+	bl	SandiskSetRRPara
+	b	.L489
+.L488:
+	bl	ToshibaSetRRPara
+.L489:
+	ldr	r2, .L506+4
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, #34
+	bne	.L490
+	ldr	r1, .L506+12
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	subs	r3, r3, #3
+	cmp	r6, r3
+	bne	.L490
+	movs	r2, #179
+	str	r2, [r4, #8]
+.L490:
+	movs	r3, #38
+	str	r3, [r4, #8]
+	movs	r3, #93
+	str	r3, [r4, #8]
+	cmp	sl, #0
+	beq	.L491
+	movs	r0, #4
+	bl	NandcSetDdrMode
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	mov	r3, r8
+	mov	r0, r7
+	bl	FlashReadRawPage
+	mov	r3, r0
+	movs	r0, #0
+	str	r3, [sp, #0]
+	bl	NandcSetDdrMode
+	ldr	r3, [sp, #0]
+	b	.L492
+.L491:
+	mov	r3, r8
+	mov	r0, r7
+	ldr	r1, [sp, #4]
+	mov	r2, fp
+	bl	FlashReadRawPage
+	mov	r3, r0
+.L492:
+	adds	r0, r3, #1
+	beq	.L493
+	ldr	r1, .L506+16
+	cmp	r5, #-1
+	it	eq
+	moveq	r5, r3
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	add	r2, r2, r2, lsl #1
+	cmp	r3, r2, lsr #2
+	bcc	.L504
+	mov	r8, #0
+	mov	fp, r8
+.L493:
+	adds	r6, r6, #1
+.L487:
+	ldr	r2, .L506+12
+	ldrb	r3, [r2, #0]	@ zero_extendqisi2
+	adds	r3, r3, #1
+	cmp	r6, r3
+	bcc	.L496
+	b	.L495
+.L504:
+	mov	r5, r3
+.L495:
+	ldr	r3, .L506+4
+	movs	r1, #0
+	mov	r0, r4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	subs	r3, r3, #67
+	cmp	r3, #1
+	bhi	.L497
+	bl	SandiskSetRRPara
+	b	.L498
+.L497:
+	bl	ToshibaSetRRPara
+.L498:
+	movs	r3, #255
+	str	r3, [r4, #8]
+	ldr	r3, .L506+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bcc	.L499
+	cmp	r5, #-1
+	ite	eq
+	moveq	r5, #-1
+	movne	r5, #256
+.L499:
+	mov	r0, r7
+	bl	NandcWaitFlashReady
+	cmp	sl, #0
+	beq	.L500
+	movs	r0, #4
+	bl	NandcSetDdrMode
+.L500:
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L507:
+	.align	2
+.L506:
+	.word	.LANCHOR5
+	.word	.LANCHOR11
+	.word	.LANCHOR35
+	.word	.LANCHOR42
+	.word	.LANCHOR29
+	.size	ToshibaReadRetrial, .-ToshibaReadRetrial
+	.section	.text.FlashSavePhyInfo,"ax",%progbits
+	.align	1
+	.global	FlashSavePhyInfo
+	.thumb
+	.thumb_func
+	.type	FlashSavePhyInfo, %function
+FlashSavePhyInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L515
+	ldr	r8, .L515+60
+	ldr	sl, .L515+64
+	ldr	r3, [r7, #0]
+	ldr	fp, .L515+48
+	ldr	r6, .L515+4
+	str	r3, [r8, #0]
+	ldr	r3, .L515+8
+	ldrb	r0, [r3, #0]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r1, #0
+	mov	r2, #2048
+	ldr	r0, [r7, #0]
+	bl	memset
+	ldr	r0, [r8, #0]
+	ldr	r3, .L515+12
+	movs	r2, #32
+	ldr	r1, .L515+16
+	str	sl, [r0, #0]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #12]	@ movhi
+	ldr	r3, .L515+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r0, #14]	@ movhi
+	ldr	r3, .L515+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [r0, #1076]
+	adds	r0, r0, #16
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+28
+	movs	r2, #8
+	adds	r0, r0, #80
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+32
+	movs	r2, #32
+	adds	r0, r0, #96
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+36
+	movs	r2, #32
+	adds	r0, r0, #160
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	ldr	r1, .L515+40
+	movs	r2, #32
+	adds	r0, r0, #192
+	bl	memcpy
+	ldr	r0, [r8, #0]
+	mov	r2, #852
+	ldr	r1, .L515+44
+	adds	r0, r0, #224
+	bl	memcpy
+	ldr	r4, [r8, #0]
+	movw	r1, #2036
+	add	r0, r4, #12
+	bl	JSHash
+	mov	r3, #1592
+	str	r3, [r4, #4]
+	ldr	r3, [fp, #0]
+	str	r3, [r8, #0]
+	str	r0, [r4, #8]
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	mov	r4, r5
+.L511:
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r2, r0
+	muls	r1, r4, r1
+	bl	FlashEraseBlock
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	bl	FlashProgPage
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	mov	r3, r0
+	muls	r1, r4, r1
+	ldr	r2, [r7, #0]
+	adds	r1, r1, #1
+	bl	FlashProgPage
+	ldr	r3, .L515+48
+	movs	r0, #0
+	ldr	r1, [r6, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L509
+	ldr	fp, [r8, #0]
+	ldr	r3, [fp, #0]
+	cmp	r3, sl
+	bne	.L509
+	add	r0, fp, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [fp, #8]
+	cmp	r3, r0
+	bne	.L509
+	ldr	r3, .L515+52
+	adds	r2, r4, #1
+	adds	r5, r5, #1
+	str	r2, [r3, #0]
+	ldr	r3, .L515+56
+	ldr	r2, [r6, #0]
+	muls	r2, r4, r2
+	cmp	r5, #1
+	str	r2, [r3, #0]
+	bhi	.L510
+.L509:
+	adds	r4, r4, #1
+	cmp	r4, #4
+	bne	.L511
+.L510:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	cmp	r5, #0
+	ite	eq
+	moveq	r0, #-1
+	movne	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L516:
+	.align	2
+.L515:
+	.word	.LANCHOR44
+	.word	.LANCHOR2
+	.word	.LANCHOR45
+	.word	.LANCHOR16
+	.word	.LANCHOR22
+	.word	.LANCHOR1
+	.word	.LANCHOR35
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR18
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR41
+	.word	.LANCHOR46
+	.word	.LANCHOR47
+	.word	.LANCHOR43
+	.word	1312902724
+	.size	FlashSavePhyInfo, .-FlashSavePhyInfo
+	.section	.text.FlashReadIdbDataRaw,"ax",%progbits
+	.align	1
+	.global	FlashReadIdbDataRaw
+	.thumb
+	.thumb_func
+	.type	FlashReadIdbDataRaw, %function
+FlashReadIdbDataRaw:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	mov	r8, r0
+	ldr	r1, .L528
+	add	r0, sp, #12
+	bl	memcpy
+	ldr	r3, .L528+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	str	r3, [sp, #4]
+	ldr	r3, .L528+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+12
+	cmp	r2, r3
+	bne	.L518
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+.L518:
+	mov	r0, r8
+	movs	r1, #0
+	mov	r2, #2048
+	mov	r7, #-1
+	bl	memset
+	movs	r4, #2
+	ldr	sl, .L528+32
+	ldr	fp, .L528+36
+	ldr	r6, .L528+16
+	b	.L519
+.L526:
+	movs	r5, #0
+.L521:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r5]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r3, .L528+16
+	movs	r0, #0
+	ldr	r1, [fp, #0]
+	muls	r1, r4, r1
+	ldr	r2, [r3, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L520
+	adds	r5, r5, #1
+	cmp	r5, #4
+	bne	.L521
+	b	.L522
+.L520:
+	ldr	r3, [r6, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+20
+	cmp	r2, r3
+	bne	.L522
+	add	r3, sp, #16
+	ldr	r0, .L528+24
+	adds	r5, r3, r5
+	ldrb	r1, [r5, #-4]	@ zero_extendqisi2
+	bl	printf
+	mov	r2, #2048
+	mov	r0, r8
+	ldr	r1, [r6, #0]
+	bl	memcpy
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #512]
+	strb	r3, [sl, #0]
+	ldr	r3, .L528+28
+	ldr	r2, [r3, #0]
+	cmp	r2, r4
+	bls	.L525
+	str	r4, [r3, #0]
+	movs	r7, #0
+	bl	FlashSavePhyInfo
+.L522:
+	adds	r4, r4, #1
+.L519:
+	ldrb	r3, [sl, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L526
+	b	.L523
+.L525:
+	movs	r7, #0
+.L523:
+	ldr	r0, [sp, #4]
+	bl	FlashBchSel
+	ldr	r3, .L528+8
+	ldr	r2, [r3, #0]
+	ldr	r3, .L528+12
+	cmp	r2, r3
+	bne	.L524
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+.L524:
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L529:
+	.align	2
+.L528:
+	.word	.LANCHOR48
+	.word	.LANCHOR29
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR44
+	.word	-52655045
+	.word	.LC3
+	.word	.LANCHOR46
+	.word	.LANCHOR1
+	.word	.LANCHOR2
+	.size	FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
+	.section	.text.FlashLoadPhyInfo,"ax",%progbits
+	.align	1
+	.global	FlashLoadPhyInfo
+	.thumb
+	.thumb_func
+	.type	FlashLoadPhyInfo, %function
+FlashLoadPhyInfo:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r2, #4
+	ldr	sl, .L542+40
+	add	r0, sp, #12
+	ldr	r1, .L542
+	movs	r4, #0
+	bl	memcpy
+	ldr	r5, .L542+4
+	ldr	r3, [sl, #0]
+	mov	r0, r4
+	ldr	r6, .L542+8
+	mov	r8, #4
+	mov	r7, #-1
+	str	r3, [r5, #0]
+	ldr	r3, .L542+12
+	ldrh	r2, [r6, #10]
+	str	r4, [r3, #0]
+	str	r2, [sp, #4]
+	bl	flash_enter_slc_mode
+	b	.L531
+.L533:
+	add	r3, sp, #12
+	ldrb	r0, [r3, r6]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+	mov	r1, r4
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L532
+	movs	r0, #0
+	mov	r1, fp
+	ldr	r2, [sl, #0]
+	mov	r3, r0
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	bne	.L532
+	adds	r6, r6, #1
+	cmp	r6, #4
+	beq	.L534
+	b	.L533
+.L532:
+	ldr	r6, [r5, #0]
+	ldr	r2, .L542+16
+	ldr	r3, [r6, #0]
+	cmp	r3, r2
+	bne	.L534
+	cbnz	r7, .L535
+	ldr	r3, .L542+8
+	mov	r0, r4
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L542+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	mov	r0, r7
+	b	.L541
+.L535:
+	add	r0, r6, #12
+	movw	r1, #2036
+	bl	JSHash
+	ldr	r3, [r6, #8]
+	cmp	r3, r0
+	bne	.L534
+	add	r1, r6, #160
+	movs	r2, #32
+	ldr	r0, .L542+8
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	movs	r2, #32
+	ldr	r0, .L542+24
+	adds	r1, r1, #192
+	bl	memcpy
+	ldr	r1, [r5, #0]
+	mov	r2, #852
+	ldr	r0, .L542+28
+	adds	r1, r1, #224
+	bl	memcpy
+	ldr	r6, [r5, #0]
+	ldr	r3, .L542+32
+	mov	r0, r4
+	ldr	r2, [r6, #1076]
+	strb	r2, [r3, #0]
+	ldr	r3, .L542+12
+	str	r4, [r3, #0]
+	ldr	r3, .L542+8
+	ldrh	r1, [r3, #10]
+	bl	__aeabi_uidiv
+	ldr	r3, .L542+20
+	adds	r0, r0, #1
+	str	r0, [r3, #0]
+	cmp	r0, #1
+	bne	.L537
+	movs	r2, #2
+	str	r2, [r3, #0]
+.L537:
+	ldrh	r2, [r6, #14]
+	movs	r7, #0
+	ldr	r3, .L542+36
+	strb	r2, [r3, #0]
+.L534:
+	ldr	r2, [sp, #4]
+	subs	r8, r8, #1
+	add	r4, r4, r2
+	beq	.L538
+.L531:
+	add	fp, r4, #1
+	movs	r6, #0
+	b	.L533
+.L538:
+	mov	r0, r8
+.L541:
+	bl	flash_exit_slc_mode
+	mov	r0, r7
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L543:
+	.align	2
+.L542:
+	.word	.LANCHOR48
+	.word	.LANCHOR43
+	.word	.LANCHOR18
+	.word	.LANCHOR47
+	.word	1312902724
+	.word	.LANCHOR46
+	.word	.LANCHOR6
+	.word	.LANCHOR31
+	.word	.LANCHOR35
+	.word	.LANCHOR49
+	.word	.LANCHOR44
+	.size	FlashLoadPhyInfo, .-FlashLoadPhyInfo
+	.section	.text.FlashDdrTunningRead,"ax",%progbits
+	.align	1
+	.global	FlashDdrTunningRead
+	.thumb
+	.thumb_func
+	.type	FlashDdrTunningRead, %function
+FlashDdrTunningRead:
+	@ args = 4, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	ldr	r3, .L564
+	sub	sp, sp, #24
+	mov	fp, r2
+	str	r0, [sp, #8]
+	ldr	r3, [r3, #0]
+	str	r1, [sp, #12]
+	ldr	r3, [r3, #304]
+	str	r3, [sp, #20]
+	ldr	r3, .L564+4
+	ldr	r7, [r3, #0]
+	ldr	r3, [sp, #56]
+	cmp	r7, #7
+	ite	hi
+	movhi	r7, #12
+	movls	r7, #6
+	cbz	r3, .L556
+	movs	r0, #1
+	ldr	r4, .L564+8
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	ldr	r0, [sp, #8]
+	bl	FlashReset
+	ldr	r1, [sp, #12]
+	mov	r2, fp
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	bl	FlashReadRawPage
+	mov	r8, r0
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	cmp	r8, #-1
+	beq	.L547
+	mov	r2, r8
+	ldr	r0, .L564+12
+	ldr	r1, [sp, #12]
+	bl	printf
+	ldr	r3, .L564+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	cmp	r2, #2048
+	bcc	.L547
+	movs	r2, #0
+	str	r2, [r3, #0]
+	mov	sl, r2
+	mov	fp, r2
+	b	.L546
+.L556:
+	mov	r8, #1024
+.L546:
+	movs	r4, #0
+	mov	r6, #-1
+	mov	ip, r4
+	mov	r5, r4
+	str	r4, [sp, #16]
+.L552:
+	uxtb	r0, r7
+	str	ip, [sp, #4]
+	bl	NandcSetDdrPara
+	mov	r3, sl
+	ldr	r0, [sp, #8]
+	mov	r2, fp
+	ldr	r1, [sp, #12]
+	bl	FlashReadRawPage
+	add	r3, r8, #1
+	ldr	ip, [sp, #4]
+	cmp	r0, r3
+	bhi	.L548
+	cmp	r0, #2
+	bhi	.L558
+	adds	r5, r5, #1
+	cmp	r5, #9
+	bls	.L558
+	subs	r4, r7, r5
+	mov	r8, r0
+	movs	r6, #0
+	b	.L550
+.L548:
+	cmp	ip, r5
+	bcs	.L559
+	cmp	r5, #7
+	rsb	r3, r5, r4
+	str	r3, [sp, #16]
+	bhi	.L551
+	mov	ip, r5
+	b	.L559
+.L558:
+	movs	r6, #0
+	mov	r4, r7
+	mov	r8, r0
+	mov	sl, r6
+	mov	fp, r6
+	b	.L549
+.L559:
+	movs	r5, #0
+.L549:
+	adds	r7, r7, #2
+	cmp	r7, #69
+	bls	.L552
+.L550:
+	cmp	ip, r5
+	bcc	.L553
+.L551:
+	ldr	r4, [sp, #16]
+.L553:
+	cbz	r4, .L554
+	ldr	r0, .L564+20
+	mov	r1, r4
+	bl	printf
+	uxtb	r0, r4
+	bl	NandcSetDdrPara
+.L554:
+	cbz	r6, .L547
+	ldr	r0, .L564+24
+	ldr	r1, [sp, #8]
+	ldr	r2, [sp, #12]
+	bl	printf
+	ldr	r3, [sp, #56]
+	cbz	r3, .L561
+	ldr	r3, [sp, #20]
+	ubfx	r0, r3, #8, #8
+	bl	NandcSetDdrPara
+	b	.L547
+.L561:
+	mov	r8, r6
+.L547:
+	mov	r0, r8
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L565:
+	.align	2
+.L564:
+	.word	.LANCHOR30
+	.word	.LANCHOR37
+	.word	.LANCHOR34
+	.word	.LC4
+	.word	.LANCHOR50
+	.word	.LC5
+	.word	.LC6
+	.size	FlashDdrTunningRead, .-FlashDdrTunningRead
+	.section	.text.FlashDdrParaScan,"ax",%progbits
+	.align	1
+	.global	FlashDdrParaScan
+	.thumb
+	.thumb_func
+	.type	FlashDdrParaScan, %function
+FlashDdrParaScan:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldr	r5, .L571
+	movs	r4, #0
+	mov	r7, r1
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r5, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r0, r6
+	str	r4, [sp, #0]
+	bl	FlashDdrTunningRead
+	mov	r1, r7
+	mov	r2, r4
+	mov	r3, r4
+	mov	r8, r0
+	mov	r0, r6
+	bl	FlashReadRawPage
+	adds	r0, r0, #1
+	beq	.L567
+	cmp	r8, #-1
+	bne	.L568
+.L567:
+	ldrb	r3, [r5, #0]	@ zero_extendqisi2
+	lsls	r3, r3, #31
+	bpl	.L568
+	movs	r0, #1
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+	movs	r2, #0
+	b	.L570
+.L568:
+	movs	r2, #1
+.L570:
+	ldr	r3, .L571+4
+	movs	r0, #0
+	strb	r2, [r3, #0]
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L572:
+	.align	2
+.L571:
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.size	FlashDdrParaScan, .-FlashDdrParaScan
+	.section	.text.FlashReadPage,"ax",%progbits
+	.align	1
+	.global	FlashReadPage
+	.thumb
+	.thumb_func
+	.type	FlashReadPage, %function
+FlashReadPage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r3
+	mov	r5, r0
+	mov	r7, r1
+	mov	r8, r2
+	bl	FlashReadRawPage
+	adds	r3, r0, #1
+	mov	r4, r0
+	bne	.L574
+	ldr	r6, .L579
+	ldrb	fp, [r6, #0]	@ zero_extendqisi2
+	cmp	fp, #0
+	beq	.L575
+	movs	r3, #0
+	mov	r0, r5
+	strb	r3, [r6, #0]
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	bl	FlashReadRawPage
+	strb	fp, [r6, #0]
+	adds	r6, r0, #1
+	bne	.L578
+.L575:
+	ldr	r3, .L579+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L574
+	ldr	r3, .L579+8
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp, #0]
+	mov	r3, sl
+	bl	FlashDdrTunningRead
+	mov	r4, r0
+	adds	r0, r0, #1
+	beq	.L576
+	ldr	r3, .L579+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r4, r3, lsr #1
+	bls	.L574
+.L576:
+	ubfx	r0, r6, #8, #8
+	bl	NandcSetDdrPara
+	b	.L574
+.L578:
+	mov	r4, r0
+.L574:
+	ldr	fp, .L579+24
+	ldr	r6, [fp, #0]
+	cbz	r6, .L577
+	adds	r1, r4, #1
+	bne	.L577
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	mov	r0, r5
+	blx	r6
+	mov	r2, r5
+	mov	r3, r7
+	mov	r4, r0
+	ldr	r0, .L579+16
+	mov	r1, r4
+	bl	printf
+	adds	r2, r4, #1
+	bne	.L577
+	ldr	r3, .L579+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L577
+	mov	r0, r5
+	bl	flash_enter_slc_mode
+	ldr	r4, [fp, #0]
+	mov	r0, r5
+	mov	r1, r7
+	mov	r2, r8
+	mov	r3, sl
+	blx	r4
+	mov	r4, r0
+.L577:
+	mov	r0, r4
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L580:
+	.align	2
+.L579:
+	.word	.LANCHOR4
+	.word	.LANCHOR35
+	.word	.LANCHOR30
+	.word	.LANCHOR29
+	.word	.LC7
+	.word	.LANCHOR7
+	.word	.LANCHOR51
+	.size	FlashReadPage, .-FlashReadPage
+	.section	.text.Ftl_log2,"ax",%progbits
+	.align	1
+	.global	Ftl_log2
+	.thumb
+	.thumb_func
+	.type	Ftl_log2, %function
+Ftl_log2:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r2, #1
+	movs	r3, #0
+	b	.L582
+.L583:
+	adds	r3, r3, #1
+	lsls	r2, r2, #1
+	uxth	r3, r3
+.L582:
+	cmp	r2, r0
+	bls	.L583
+	subs	r3, r3, #1
+	uxth	r0, r3
+	bx	lr
+	.size	Ftl_log2, .-Ftl_log2
+	.section	.text.FtlPrintInfo,"ax",%progbits
+	.align	1
+	.global	FtlPrintInfo
+	.thumb
+	.thumb_func
+	.type	FtlPrintInfo, %function
+FtlPrintInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlPrintInfo, .-FtlPrintInfo
+	.section	.text.FtlSysBlkNumInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkNumInit
+	.thumb
+	.thumb_func
+	.type	FtlSysBlkNumInit, %function
+FtlSysBlkNumInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L588
+	cmp	r0, #23
+	it	ls
+	movls	r0, #24
+	ldr	r2, .L588+4
+	str	r0, [r3, #0]
+	ldr	r3, .L588+8
+	ldrh	r3, [r3, #0]
+	muls	r3, r0, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L588+12
+	ldrh	r2, [r2, #0]
+	subs	r0, r2, r0
+	ldr	r2, .L588+16
+	strh	r0, [r2, #0]	@ movhi
+	movs	r0, #0
+	ldr	r2, .L588+20
+	ldr	r2, [r2, #0]
+	subs	r3, r2, r3
+	ldr	r2, .L588+24
+	str	r3, [r2, #0]
+	bx	lr
+.L589:
+	.align	2
+.L588:
+	.word	.LANCHOR52
+	.word	.LANCHOR54
+	.word	.LANCHOR53
+	.word	.LANCHOR56
+	.word	.LANCHOR55
+	.word	.LANCHOR58
+	.word	.LANCHOR57
+	.size	FtlSysBlkNumInit, .-FtlSysBlkNumInit
+	.global	__aeabi_idiv
+	.section	.text.FtlConstantsInit,"ax",%progbits
+	.align	1
+	.global	FtlConstantsInit
+	.thumb
+	.thumb_func
+	.type	FtlConstantsInit, %function
+FtlConstantsInit:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrh	r7, [r0, #8]
+	sub	sp, sp, #32
+	ldr	r3, .L605
+	ldrh	r1, [r0, #10]
+	ldrh	r0, [r0, #12]
+	strh	r7, [r3, #0]	@ movhi
+	ldr	r3, .L605+4
+	ldrh	ip, [r4, #14]
+	ldr	r2, .L605+8
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L605+12
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L605+16
+	strh	ip, [r3, #0]	@ movhi
+	movs	r3, #0
+.L591:
+	strb	r3, [r3, r2]
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L591
+	ldrh	r2, [r4, #14]
+	ldrh	r3, [r4, #20]
+	cmp	r3, r2, lsr #8
+	bcs	.L592
+	ldr	r3, .L605+8
+	uxtb	sl, r0
+	movs	r2, #0
+	subs	r6, r3, r0
+	str	r6, [sp, #24]
+	subs	r6, r1, #1
+	lsl	r8, sl, #1
+	mla	r6, r0, r6, r3
+	uxtb	r8, r8
+	rsb	r5, r8, #0
+	uxtb	r5, r5
+	str	r6, [sp, #28]
+	b	.L593
+.L594:
+	ldr	r2, [sp, #12]
+	add	fp, r6, r5
+	add	lr, lr, #1
+	strb	fp, [r2, r3]
+	ldr	r2, [sp, #20]
+	add	fp, r6, r2
+	ldr	r2, [sp, #16]
+	strb	fp, [r2, r3]
+	b	.L595
+.L603:
+	ldr	fp, [sp, #24]
+	movs	r3, #0
+	mov	r6, r3
+	mov	lr, r3
+	add	fp, fp, r2
+	str	fp, [sp, #12]
+	ldr	fp, [sp, #28]
+	str	r2, [sp, #4]
+	add	fp, fp, r2
+	str	fp, [sp, #16]
+	add	fp, r5, sl
+	str	fp, [sp, #20]
+.L595:
+	add	r6, r6, r8
+	cmp	lr, r1
+	add	r3, r3, r0
+	uxtb	r6, r6
+	bcc	.L594
+	ldr	r2, [sp, #4]
+	adds	r5, r5, #1
+	adds	r2, r2, #1
+	uxtb	r5, r5
+.L593:
+	cmp	r2, r0
+	bcc	.L603
+	ldr	r3, .L605+4
+	lsls	r1, r1, #1
+	lsr	ip, ip, #1
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L605+16
+	strh	ip, [r3, #0]	@ movhi
+.L592:
+	ldr	r3, .L605+20
+	movs	r2, #5
+	movs	r1, #0
+	cmp	r7, #1
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r2, .L605+24
+	it	eq
+	strheq	r7, [r3, #0]	@ movhi
+	ldr	r3, .L605+28
+	strh	r1, [r2, #0]	@ movhi
+	mov	r2, #4352
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r2, .L605+32
+	ldrb	r8, [r2, #0]	@ zero_extendqisi2
+	cmp	r8, #0
+	beq	.L597
+	mov	r2, #384
+	strh	r2, [r3, #0]	@ movhi
+.L597:
+	ldr	r3, .L605+4
+	ldrh	r5, [r3, #0]
+	muls	r5, r0, r5
+	ldr	r3, .L605+36
+	uxth	r5, r5
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L605+16
+	ldrh	r6, [r3, #0]
+	muls	r0, r6, r0
+	ldr	r3, .L605+40
+	uxth	r0, r0
+	strh	r0, [r3, #0]	@ movhi
+	bl	Ftl_log2
+	ldr	r3, .L605+44
+	ldrh	fp, [r4, #16]
+	ldrh	r1, [r4, #18]
+	ldrh	sl, [r4, #20]
+	mul	r2, fp, r5
+	strh	r0, [r3, #0]	@ movhi
+	mov	r0, sl
+	ldr	r3, .L605+48
+	strh	fp, [r3, #0]	@ movhi
+	ldr	r3, .L605+52
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L605+56
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L605+60
+	strh	sl, [r3, #0]	@ movhi
+	str	r1, [sp, #8]
+	bl	Ftl_log2
+	ldr	r3, .L605+64
+	ldr	r2, .L605+68
+	ldr	r1, [sp, #8]
+	mul	r1, r1, sl
+	strh	r0, [r3, #0]	@ movhi
+	lsl	r3, sl, #9
+	mov	r7, r0
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L605+72
+	lsrs	r3, r3, #8
+	cmp	r6, #1024
+	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #26]
+	ldr	r3, .L605+76
+	ldr	r4, .L605+28
+	strh	r2, [r3, #0]	@ movhi
+	mul	r2, r6, r5
+	ldr	r3, .L605+80
+	ldrh	r0, [r4, #0]
+	str	r2, [r3, #0]
+	it	hi
+	uxtbhi	r2, r6
+	ldr	r3, .L605+24
+	it	hi
+	strhhi	r2, [r3, #0]	@ movhi
+	lsls	r0, r0, #3
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L605+84
+	subs	r2, r6, r2
+	muls	r2, r5, r2
+	mul	r2, sl, r2
+	mul	fp, fp, r2
+	asr	r2, fp, #11
+	str	r2, [r3, #0]
+	bl	__aeabi_idiv
+	ldr	r3, .L605+88
+	uxth	r0, r0
+	strh	r0, [r3, #0]	@ movhi
+	cmp	r0, #4
+	bhi	.L599
+	movs	r2, #4
+	strh	r2, [r3, #0]	@ movhi
+.L599:
+	cmp	r8, #0
+	beq	.L600
+	mov	r3, #640
+	strh	r3, [r4, #0]	@ movhi
+.L600:
+	ldrh	r2, [r4, #0]
+	lsls	r6, r6, #6
+	ldr	r3, .L605+92
+	mov	r1, r5
+	ldr	r4, .L605+96
+	asr	r2, r2, r7
+	adds	r7, r7, #9
+	asr	r6, r6, r7
+	adds	r2, r2, #2
+	strh	r2, [r3, #0]	@ movhi
+	uxth	r6, r6
+	ldr	r3, .L605+100
+	mul	r2, r5, r6
+	strh	r6, [r3, #0]	@ movhi
+	ldr	r3, .L605+104
+	adds	r6, r6, #8
+	str	r2, [r3, #0]
+	ldr	r3, .L605+88
+	ldrh	r0, [r3, #0]
+	bl	__aeabi_uidiv
+	cmp	r5, #1
+	uxtah	r6, r6, r0
+	str	r6, [r4, #0]
+	bne	.L601
+	adds	r6, r6, #4
+	str	r6, [r4, #0]
+.L601:
+	ldrh	r0, [r4, #0]
+	bl	FtlSysBlkNumInit
+	ldr	r2, [r4, #0]
+	ldr	r3, .L605+108
+	str	r2, [r3, #0]
+	ldr	r3, .L605+112
+	ldr	r2, [r3, #0]
+	ldr	r3, .L605+48
+	lsls	r2, r2, #2
+	ldrh	r3, [r3, #0]
+	muls	r2, r3, r2
+	ldr	r3, .L605+64
+	ldrh	r3, [r3, #0]
+	adds	r3, r3, #9
+	lsr	r2, r2, r3
+	ldr	r3, .L605+116
+	adds	r2, r2, #2
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #24
+	ldr	r3, .L605+120
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #0
+	ldr	r3, .L605+124
+	str	r2, [r3, #0]
+	ldr	r2, .L605+88
+	ldrh	r0, [r2, #0]
+	adds	r3, r0, #3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r3, .L605+104
+	ldr	r1, [r3, #0]
+	adds	r4, r1, #3
+	str	r4, [r3, #0]
+	ldr	r4, .L605+128
+	ldrb	r4, [r4, #0]	@ zero_extendqisi2
+	cbz	r4, .L602
+	adds	r0, r0, #4
+	adds	r1, r1, #5
+	strh	r0, [r2, #0]	@ movhi
+	str	r1, [r3, #0]
+.L602:
+	movs	r0, #0
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L606:
+	.align	2
+.L605:
+	.word	.LANCHOR59
+	.word	.LANCHOR60
+	.word	.LANCHOR62
+	.word	.LANCHOR61
+	.word	.LANCHOR56
+	.word	.LANCHOR63
+	.word	.LANCHOR64
+	.word	.LANCHOR65
+	.word	.LANCHOR0
+	.word	.LANCHOR53
+	.word	.LANCHOR66
+	.word	.LANCHOR67
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR70
+	.word	.LANCHOR71
+	.word	.LANCHOR72
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR75
+	.word	.LANCHOR58
+	.word	.LANCHOR76
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+	.word	.LANCHOR52
+	.word	.LANCHOR79
+	.word	.LANCHOR80
+	.word	.LANCHOR81
+	.word	.LANCHOR57
+	.word	.LANCHOR82
+	.word	.LANCHOR83
+	.word	.LANCHOR84
+	.word	.LANCHOR7
+	.size	FtlConstantsInit, .-FtlConstantsInit
+	.section	.text.IsBlkInVendorPart,"ax",%progbits
+	.align	1
+	.global	IsBlkInVendorPart
+	.thumb
+	.thumb_func
+	.type	IsBlkInVendorPart, %function
+IsBlkInVendorPart:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L614
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L612
+	ldr	r3, .L614+4
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L614+8
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L609
+.L611:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L613
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L609:
+	cmp	r3, r1
+	bne	.L611
+	movs	r0, #0
+	pop	{r4, pc}
+.L613:
+	movs	r0, #1
+	pop	{r4, pc}
+.L612:
+	mov	r0, r3
+	pop	{r4, pc}
+.L615:
+	.align	2
+.L614:
+	.word	.LANCHOR85
+	.word	.LANCHOR77
+	.word	.LANCHOR86
+	.size	IsBlkInVendorPart, .-IsBlkInVendorPart
+	.section	.text.FtlGetCap,"ax",%progbits
+	.align	1
+	.global	FtlGetCap
+	.thumb
+	.thumb_func
+	.type	FtlGetCap, %function
+FtlGetCap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L617
+	ldr	r0, [r3, #0]
+	bx	lr
+.L618:
+	.align	2
+.L617:
+	.word	.LANCHOR84
+	.size	FtlGetCap, .-FtlGetCap
+	.section	.text.FtlGetCapacity,"ax",%progbits
+	.align	1
+	.global	FtlGetCapacity
+	.thumb
+	.thumb_func
+	.type	FtlGetCapacity, %function
+FtlGetCapacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L620
+	ldr	r0, [r3, #0]
+	bx	lr
+.L621:
+	.align	2
+.L620:
+	.word	.LANCHOR84
+	.size	FtlGetCapacity, .-FtlGetCapacity
+	.section	.text.ftl_get_density,"ax",%progbits
+	.align	1
+	.global	ftl_get_density
+	.thumb
+	.thumb_func
+	.type	ftl_get_density, %function
+ftl_get_density:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L623
+	ldr	r0, [r3, #0]
+	bx	lr
+.L624:
+	.align	2
+.L623:
+	.word	.LANCHOR84
+	.size	ftl_get_density, .-ftl_get_density
+	.section	.text.FtlGetLpn,"ax",%progbits
+	.align	1
+	.global	FtlGetLpn
+	.thumb
+	.thumb_func
+	.type	FtlGetLpn, %function
+FtlGetLpn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L626
+	ldr	r0, [r3, #0]
+	bx	lr
+.L627:
+	.align	2
+.L626:
+	.word	.LANCHOR87
+	.size	FtlGetLpn, .-FtlGetLpn
+	.section	.text.FtlGetCurEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlGetCurEraseBlock
+	.thumb
+	.thumb_func
+	.type	FtlGetCurEraseBlock, %function
+FtlGetCurEraseBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L629
+	ldr	r3, .L629+4
+	ldr	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L630:
+	.align	2
+.L629:
+	.word	.LANCHOR88
+	.word	.LANCHOR53
+	.size	FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
+	.section	.text.FtlGetAllBlockNum,"ax",%progbits
+	.align	1
+	.global	FtlGetAllBlockNum
+	.thumb
+	.thumb_func
+	.type	FtlGetAllBlockNum, %function
+FtlGetAllBlockNum:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L632
+	ldr	r3, .L632+4
+	ldrh	r0, [r2, #0]
+	ldrh	r3, [r3, #0]
+	muls	r0, r3, r0
+	bx	lr
+.L633:
+	.align	2
+.L632:
+	.word	.LANCHOR53
+	.word	.LANCHOR56
+	.size	FtlGetAllBlockNum, .-FtlGetAllBlockNum
+	.section	.text.FtlBbmMapBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmMapBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmMapBadBlock, %function
+FtlBbmMapBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L635
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldrh	r4, [r3, #0]
+	movs	r7, #1
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	uxth	r2, r0
+	mls	r3, r4, r2, r5
+	ldr	r4, .L635+4
+	add	r1, r4, r2, lsl #2
+	ldr	r0, [r1, #28]
+	uxth	r3, r3
+	and	r1, r3, #31
+	lsrs	r6, r3, #5
+	lsl	r1, r7, r1
+	ldr	r7, [r0, r6, lsl #2]
+	orrs	r1, r1, r7
+	str	r1, [r0, r6, lsl #2]
+	str	r1, [sp, #0]
+	mov	r1, r5
+	ldr	r0, .L635+8
+	bl	printf
+	ldrh	r3, [r4, #6]
+	movs	r0, #0
+	adds	r3, r3, #1
+	strh	r3, [r4, #6]	@ movhi
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L636:
+	.align	2
+.L635:
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.word	.LC8
+	.size	FtlBbmMapBadBlock, .-FtlBbmMapBadBlock
+	.global	__aeabi_uidivmod
+	.section	.text.FtlBbmIsBadBlock,"ax",%progbits
+	.align	1
+	.global	FtlBbmIsBadBlock
+	.thumb
+	.thumb_func
+	.type	FtlBbmIsBadBlock, %function
+FtlBbmIsBadBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L638
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r5, [r3, #0]
+	mov	r1, r5
+	bl	__aeabi_uidivmod
+	mov	r0, r6
+	uxth	r4, r1
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r3, .L638+4
+	lsrs	r2, r4, #5
+	and	r4, r4, #31
+	uxth	r0, r0
+	add	r0, r3, r0, lsl #2
+	ldr	r3, [r0, #28]
+	ldr	r0, [r3, r2, lsl #2]
+	lsr	r0, r0, r4
+	and	r0, r0, #1
+	pop	{r4, r5, r6, pc}
+.L639:
+	.align	2
+.L638:
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.size	FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
+	.section	.text.FtlBbtInfoPrint,"ax",%progbits
+	.align	1
+	.global	FtlBbtInfoPrint
+	.thumb
+	.thumb_func
+	.type	FtlBbtInfoPrint, %function
+FtlBbtInfoPrint:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FtlBbtInfoPrint, .-FtlBbtInfoPrint
+	.section	.text.FtlBbt2Bitmap,"ax",%progbits
+	.align	1
+	.global	FtlBbt2Bitmap
+	.thumb
+	.thumb_func
+	.type	FtlBbt2Bitmap, %function
+FtlBbt2Bitmap:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L646
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r6, r0
+	ldrh	r2, [r3, #0]
+	mov	r0, r1
+	mov	r5, r1
+	movs	r1, #0
+	ldr	r7, .L646+4
+	movs	r4, #0
+	lsls	r2, r2, #2
+	movw	r8, #65535
+	bl	memset
+.L644:
+	ldrh	r3, [r6, r4]
+	cmp	r3, r8
+	beq	.L641
+	ldrh	r2, [r7, #0]
+	cmp	r2, r3
+	bhi	.L643
+	ldr	r1, .L646+8
+	movs	r2, #79
+	ldr	r0, .L646+12
+	bl	printf
+	ldr	r0, .L646+16
+	ldr	r1, .L646+20
+	bl	printf
+.L643:
+	ldrh	r2, [r6, r4]
+	movs	r1, #1
+	adds	r4, r4, #2
+	lsrs	r3, r2, #5
+	and	r2, r2, #31
+	lsl	r2, r1, r2
+	cmp	r4, #1024
+	ldr	r1, [r5, r3, lsl #2]
+	orr	r2, r1, r2
+	str	r2, [r5, r3, lsl #2]
+	bne	.L644
+.L641:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L647:
+	.align	2
+.L646:
+	.word	.LANCHOR90
+	.word	.LANCHOR66
+	.word	.LANCHOR91
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlBbt2Bitmap, .-FtlBbt2Bitmap
+	.section	.text.FtlBbtMemInit,"ax",%progbits
+	.align	1
+	.global	FtlBbtMemInit
+	.thumb
+	.thumb_func
+	.type	FtlBbtMemInit, %function
+FtlBbtMemInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L649
+	movw	r3, #65535
+	movs	r1, #255
+	movs	r2, #16
+	strh	r3, [r0, #0]	@ movhi
+	movs	r3, #0
+	strh	r3, [r0, #6]	@ movhi
+	adds	r0, r0, #12
+	b	memset
+.L650:
+	.align	2
+.L649:
+	.word	.LANCHOR89
+	.size	FtlBbtMemInit, .-FtlBbtMemInit
+	.section	.text.V2P_block,"ax",%progbits
+	.align	1
+	.global	V2P_block
+	.thumb
+	.thumb_func
+	.type	V2P_block, %function
+V2P_block:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r7, r1
+	ldr	r3, .L652
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	muls	r7, r4, r7
+	mov	r1, r4
+	bl	__aeabi_uidiv
+	ldr	r3, .L652+4
+	mov	r1, r4
+	ldrh	r5, [r3, #0]
+	mla	r5, r0, r5, r7
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L653:
+	.align	2
+.L652:
+	.word	.LANCHOR61
+	.word	.LANCHOR66
+	.size	V2P_block, .-V2P_block
+	.section	.text.P2V_plane,"ax",%progbits
+	.align	1
+	.global	P2V_plane
+	.thumb
+	.thumb_func
+	.type	P2V_plane, %function
+P2V_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L655
+	push	{r4, r5, r6, lr}
+	mov	r6, r0
+	ldrh	r4, [r3, #0]
+	ldr	r3, .L655+4
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	mov	r1, r4
+	mul	r5, r0, r4
+	mov	r0, r6
+	bl	__aeabi_uidivmod
+	adds	r1, r5, r1
+	uxth	r0, r1
+	pop	{r4, r5, r6, pc}
+.L656:
+	.align	2
+.L655:
+	.word	.LANCHOR61
+	.word	.LANCHOR66
+	.size	P2V_plane, .-P2V_plane
+	.section	.text.P2V_block_in_plane,"ax",%progbits
+	.align	1
+	.global	P2V_block_in_plane
+	.thumb
+	.thumb_func
+	.type	P2V_block_in_plane, %function
+P2V_block_in_plane:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L658
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidivmod
+	ldr	r3, .L658+4
+	uxth	r0, r1
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	uxth	r0, r0
+	pop	{r3, pc}
+.L659:
+	.align	2
+.L658:
+	.word	.LANCHOR66
+	.word	.LANCHOR61
+	.size	P2V_block_in_plane, .-P2V_block_in_plane
+	.section	.text.ftl_cmp_data_ver,"ax",%progbits
+	.align	1
+	.global	ftl_cmp_data_ver
+	.thumb
+	.thumb_func
+	.type	ftl_cmp_data_ver, %function
+ftl_cmp_data_ver:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	cmp	r0, r1
+	bls	.L661
+	subs	r0, r0, r1
+	cmp	r0, #-2147483648
+	ite	hi
+	movhi	r0, #0
+	movls	r0, #1
+	bx	lr
+.L661:
+	subs	r0, r1, r0
+	cmp	r0, #-2147483648
+	ite	ls
+	movls	r0, #0
+	movhi	r0, #1
+	bx	lr
+	.size	ftl_cmp_data_ver, .-ftl_cmp_data_ver
+	.section	.text.FtlFreeSysBlkQueueInit,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueInit
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueInit, %function
+FtlFreeSysBlkQueueInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L664
+	mov	r2, #2048
+	push	{r4, lr}
+	movs	r4, #0
+	mov	r1, r4
+	strh	r4, [r3, #2]	@ movhi
+	strh	r4, [r3, #4]	@ movhi
+	strh	r4, [r3, #6]	@ movhi
+	strh	r0, [r3], #8	@ movhi
+	mov	r0, r3
+	bl	memset
+	mov	r0, r4
+	pop	{r4, pc}
+.L665:
+	.align	2
+.L664:
+	.word	.LANCHOR92
+	.size	FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
+	.section	.text.FtlFreeSysBlkQueueEmpty,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueEmpty
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueEmpty, %function
+FtlFreeSysBlkQueueEmpty:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L667
+	ldrh	r0, [r3, #6]
+	rsbs	r0, r0, #1
+	it	cc
+	movcc	r0, #0
+	bx	lr
+.L668:
+	.align	2
+.L667:
+	.word	.LANCHOR92
+	.size	FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
+	.section	.text.FtlFreeSysBlkQueueFull,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueFull
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueFull, %function
+FtlFreeSysBlkQueueFull:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L670
+	ldrh	r0, [r3, #6]
+	sub	r2, r0, #1024
+	rsbs	r0, r2, #0
+	adc	r0, r0, r2
+	bx	lr
+.L671:
+	.align	2
+.L670:
+	.word	.LANCHOR92
+	.size	FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
+	.section	.text.FtlFreeSysBlkQueueIn,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueIn
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueIn, %function
+FtlFreeSysBlkQueueIn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L675
+	ldrh	r3, [r3, #6]
+	cmp	r3, #1024
+	beq	.L672
+	cbz	r1, .L674
+	bl	P2V_block_in_plane
+	ldr	r3, .L675+4
+	movs	r1, #1
+	mov	r2, r1
+	mov	r5, r0
+	ldr	r0, [r3, #0]
+	lsls	r3, r4, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L675+8
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L675+12
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+.L674:
+	ldr	r3, .L675
+	ldrh	r2, [r3, #6]
+	adds	r2, r2, #1
+	strh	r2, [r3, #6]	@ movhi
+	ldrh	r2, [r3, #4]
+	adds	r1, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #4]	@ movhi
+	strh	r4, [r3, r1, lsl #1]	@ movhi
+.L672:
+	pop	{r3, r4, r5, pc}
+.L676:
+	.align	2
+.L675:
+	.word	.LANCHOR92
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.size	FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn
+	.section	.text.FtlFreeSysBLkSort,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBLkSort
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBLkSort, %function
+FtlFreeSysBLkSort:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	ldr	r5, .L687
+	ldr	r7, .L687+4
+	ldr	r6, .L687+8
+	b	.L678
+.L679:
+	add	r8, r4, r8
+	add	r8, r8, #4
+	ldrh	r0, [r5, r8, lsl #1]
+	bl	P2V_block_in_plane
+	ldr	r2, [r6, #0]
+	ldr	r3, [r7, #0]
+	ldrh	r2, [r2, r0, lsl #1]
+	str	r2, [r3, r4, lsl #2]
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L678:
+	ldrh	ip, [r5, #6]
+	ldrh	r8, [r5, #2]
+	cmp	r4, ip
+	bcc	.L679
+	ldr	r3, .L687+4
+	add	r6, ip, #-1
+	ldr	r4, .L687
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	b	.L680
+.L685:
+	adds	r5, r3, #1
+	mov	r2, r3
+	uxth	r5, r5
+	mov	r0, r5
+	b	.L681
+.L683:
+	ldr	r7, [r1, r0, lsl #2]
+	ldr	sl, [r1, r2, lsl #2]
+	cmp	sl, r7
+	it	hi
+	movhi	r2, r0
+	adds	r0, r0, #1
+	uxth	r0, r0
+.L681:
+	cmp	r0, ip
+	bcc	.L683
+	cmp	r3, r2
+	beq	.L684
+	ldr	r0, [r1, r2, lsl #2]
+	ldr	r7, [r1, r3, lsl #2]
+	str	r7, [r1, r2, lsl #2]
+	add	r2, r8, r2
+	str	r0, [r1, r3, lsl #2]
+	add	r3, r8, r3
+	adds	r2, r2, #4
+	adds	r3, r3, #4
+	ldrh	r0, [r4, r2, lsl #1]
+	ldrh	r7, [r4, r3, lsl #1]
+	strh	r7, [r4, r2, lsl #1]	@ movhi
+	strh	r0, [r4, r3, lsl #1]	@ movhi
+.L684:
+	mov	r3, r5
+.L680:
+	cmp	r3, r6
+	blt	.L685
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L688:
+	.align	2
+.L687:
+	.word	.LANCHOR92
+	.word	.LANCHOR96
+	.word	.LANCHOR94
+	.size	FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
+	.section	.text.IsInFreeQueue,"ax",%progbits
+	.align	1
+	.global	IsInFreeQueue
+	.thumb
+	.thumb_func
+	.type	IsInFreeQueue, %function
+IsInFreeQueue:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L695
+	push	{r4, r5, lr}
+	ldrh	r1, [r2, #6]
+	cmp	r1, #1024
+	beq	.L693
+	ldrh	r4, [r2, #2]
+	movs	r3, #0
+	b	.L691
+.L692:
+	adds	r5, r3, r4
+	lsls	r5, r5, #22
+	add	r5, r2, r5, lsr #21
+	ldrh	r5, [r5, #8]
+	cmp	r5, r0
+	beq	.L694
+	adds	r3, r3, #1
+.L691:
+	cmp	r3, r1
+	bcc	.L692
+.L693:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L694:
+	movs	r0, #1
+	pop	{r4, r5, pc}
+.L696:
+	.align	2
+.L695:
+	.word	.LANCHOR92
+	.size	IsInFreeQueue, .-IsInFreeQueue
+	.section	.text.FtlFreeSysBlkQueueOut,"ax",%progbits
+	.align	1
+	.global	FtlFreeSysBlkQueueOut
+	.thumb
+	.thumb_func
+	.type	FtlFreeSysBlkQueueOut, %function
+FtlFreeSysBlkQueueOut:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r3, .L700
+	ldrh	r1, [r3, #6]
+	cbz	r1, .L699
+	ldrh	r2, [r3, #2]
+	subs	r1, r1, #1
+	strh	r1, [r3, #6]	@ movhi
+	adds	r0, r2, #4
+	adds	r2, r2, #1
+	bic	r2, r2, #64512
+	strh	r2, [r3, #2]	@ movhi
+	ldrh	r4, [r3, r0, lsl #1]
+	ldr	r3, .L700+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L698
+	mov	r0, r4
+	bl	P2V_block_in_plane
+	ldr	r3, .L700+8
+	movs	r1, #1
+	mov	r2, r1
+	mov	r5, r0
+	ldr	r0, [r3, #0]
+	lsls	r3, r4, #10
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	ldr	r3, .L700+12
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L700+16
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	b	.L698
+.L699:
+	movw	r4, #65535
+.L698:
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L701:
+	.align	2
+.L700:
+	.word	.LANCHOR92
+	.word	.LANCHOR7
+	.word	.LANCHOR93
+	.word	.LANCHOR94
+	.word	.LANCHOR95
+	.size	FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
+	.section	.text.insert_data_list,"ax",%progbits
+	.align	1
+	.global	insert_data_list
+	.thumb
+	.thumb_func
+	.type	insert_data_list, %function
+insert_data_list:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L718
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrh	fp, [r3, #0]
+	cmp	r0, fp
+	bcs	.L703
+	ldr	r3, .L718+4
+	movs	r6, #6
+	muls	r6, r0, r6
+	ldr	r1, [r3, #0]
+	movw	r3, #65535
+	adds	r2, r1, r6
+	strh	r3, [r1, r6]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	ldr	r3, .L718+8
+	ldr	r5, [r3, #0]
+	cmp	r5, #0
+	beq	.L717
+.L704:
+	ldr	r3, .L718+12
+	ldrh	r4, [r2, #4]
+	ldr	ip, [r3, #0]
+	lsls	r3, r0, #1
+	ldrh	r7, [ip, r0, lsl #1]
+	cbz	r4, .L713
+	muls	r4, r7, r4
+	b	.L716
+.L713:
+	mov	r4, #-1
+.L716:
+	str	r4, [sp, #8]
+	subs	r4, r5, r1
+	ldr	r7, .L718+16
+	mov	sl, r2
+	asrs	r4, r4, #1
+	muls	r4, r7, r4
+	ldr	r7, .L718+20
+	uxth	r4, r4
+	str	ip, [sp, #4]
+	ldr	r7, [r7, #0]
+	adds	r3, r7, r3
+	str	r3, [sp, #20]
+	str	r7, [sp, #12]
+	mov	r3, r5
+	movs	r7, #0
+.L711:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, fp
+	bhi	.L703
+	cmp	r0, r4
+	beq	.L703
+	ldr	r2, [sp, #4]
+	lsl	r8, r4, #1
+	str	r8, [sp, #16]
+	ldrh	r8, [r2, r4, lsl #1]
+	ldrh	r2, [r3, #4]
+	cbz	r2, .L714
+	mul	r2, r2, r8
+	b	.L706
+.L714:
+	mov	r2, #-1
+.L706:
+	ldr	r8, [sp, #8]
+	cmp	r2, r8
+	bne	.L707
+	ldr	r2, [sp, #12]
+	ldr	ip, [sp, #16]
+	ldrh	r8, [r2, ip]
+	ldr	r2, [sp, #20]
+	ldrh	ip, [r2, #0]
+	cmp	r8, ip
+	bcc	.L709
+	b	.L715
+.L707:
+	bhi	.L715
+.L709:
+	ldrh	r2, [r3, #0]
+	movw	r8, #65535
+	cmp	r2, r8
+	bne	.L710
+	mov	r2, sl
+	strh	r0, [r3, #0]	@ movhi
+	ldr	r3, .L718+24
+	strh	r4, [r2, #2]	@ movhi
+	b	.L717
+.L710:
+	mov	ip, #6
+	mov	r4, r2
+	mla	r3, ip, r2, r1
+	b	.L711
+.L715:
+	strh	r4, [r1, r6]	@ movhi
+	mov	r2, sl
+	ldrh	r4, [r3, #2]
+	cmp	r3, r5
+	strh	r4, [r2, #2]	@ movhi
+	bne	.L712
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L718+8
+.L717:
+	str	r2, [r3, #0]
+	b	.L703
+.L712:
+	ldrh	r2, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r2, r4, r2
+	strh	r0, [r1, r2]	@ movhi
+.L703:
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L719:
+	.align	2
+.L718:
+	.word	.LANCHOR55
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	-1431655765
+	.word	.LANCHOR94
+	.word	.LANCHOR100
+	.size	insert_data_list, .-insert_data_list
+	.section	.text.INSERT_DATA_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_DATA_LIST
+	.thumb
+	.thumb_func
+	.type	INSERT_DATA_LIST, %function
+INSERT_DATA_LIST:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	insert_data_list
+	ldr	r2, .L722
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L722+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L720
+	ldr	r1, .L722+8
+	movs	r2, #196
+	ldr	r0, .L722+12
+	bl	printf
+	ldr	r0, .L722+16
+	ldr	r1, .L722+20
+	pop	{r3, lr}
+	b	printf
+.L720:
+	pop	{r3, pc}
+.L723:
+	.align	2
+.L722:
+	.word	.LANCHOR101
+	.word	.LANCHOR55
+	.word	.LANCHOR102
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	INSERT_DATA_LIST, .-INSERT_DATA_LIST
+	.section	.text.insert_free_list,"ax",%progbits
+	.align	1
+	.global	insert_free_list
+	.thumb
+	.thumb_func
+	.type	insert_free_list, %function
+insert_free_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movw	r8, #65535
+	cmp	r0, r8
+	beq	.L725
+	ldr	r3, .L732
+	mov	fp, #6
+	mul	r6, fp, r0
+	ldr	r2, [r3, #0]
+	ldr	r3, .L732+4
+	adds	r1, r2, r6
+	ldr	r4, [r3, #0]
+	strh	r8, [r1, #2]	@ movhi
+	strh	r8, [r2, r6]	@ movhi
+	cbz	r4, .L731
+.L726:
+	ldr	r3, .L732+8
+	subs	r5, r4, r2
+	asrs	r5, r5, #1
+	ldr	ip, [r3, #0]
+	ldr	r3, .L732+12
+	muls	r5, r3, r5
+	mov	r3, r4
+	uxth	r5, r5
+	ldrh	sl, [ip, r0, lsl #1]
+.L729:
+	ldrh	r7, [ip, r5, lsl #1]
+	cmp	r7, sl
+	bcs	.L727
+	ldrh	r7, [r3, #0]
+	cmp	r7, r8
+	bne	.L728
+	strh	r5, [r1, #2]	@ movhi
+	strh	r0, [r3, #0]	@ movhi
+	b	.L725
+.L728:
+	mla	r3, fp, r7, r2
+	mov	r5, r7
+	b	.L729
+.L727:
+	ldrh	r7, [r3, #2]
+	cmp	r3, r4
+	strh	r5, [r2, r6]	@ movhi
+	strh	r7, [r1, #2]	@ movhi
+	bne	.L730
+	strh	r0, [r3, #2]	@ movhi
+	ldr	r3, .L732+4
+.L731:
+	str	r1, [r3, #0]
+	b	.L725
+.L730:
+	ldrh	r1, [r3, #2]
+	movs	r4, #6
+	strh	r0, [r3, #2]	@ movhi
+	muls	r1, r4, r1
+	strh	r0, [r2, r1]	@ movhi
+.L725:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L733:
+	.align	2
+.L732:
+	.word	.LANCHOR97
+	.word	.LANCHOR103
+	.word	.LANCHOR94
+	.word	-1431655765
+	.size	insert_free_list, .-insert_free_list
+	.section	.text.INSERT_FREE_LIST,"ax",%progbits
+	.align	1
+	.global	INSERT_FREE_LIST
+	.thumb
+	.thumb_func
+	.type	INSERT_FREE_LIST, %function
+INSERT_FREE_LIST:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	insert_free_list
+	ldr	r2, .L736
+	ldrh	r3, [r2, #0]
+	adds	r3, r3, #1
+	uxth	r3, r3
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L736+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, r3
+	bcs	.L734
+	ldr	r1, .L736+8
+	movs	r2, #189
+	ldr	r0, .L736+12
+	bl	printf
+	ldr	r0, .L736+16
+	ldr	r1, .L736+20
+	pop	{r3, lr}
+	b	printf
+.L734:
+	pop	{r3, pc}
+.L737:
+	.align	2
+.L736:
+	.word	.LANCHOR104
+	.word	.LANCHOR55
+	.word	.LANCHOR105
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	INSERT_FREE_LIST, .-INSERT_FREE_LIST
+	.section	.text.List_remove_node,"ax",%progbits
+	.align	1
+	.global	List_remove_node
+	.thumb
+	.thumb_func
+	.type	List_remove_node, %function
+List_remove_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r6, #6
+	muls	r6, r1, r6
+	ldr	r3, .L744
+	mov	r5, r0
+	ldr	r7, [r3, #0]
+	movw	r3, #65535
+	adds	r4, r7, r6
+	ldrh	r2, [r4, #2]
+	cmp	r2, r3
+	bne	.L739
+	ldr	r3, [r0, #0]
+	cmp	r4, r3
+	beq	.L739
+	ldr	r1, .L744+4
+	mov	r2, #354
+	ldr	r0, .L744+8
+	bl	printf
+	ldr	r0, .L744+12
+	ldr	r1, .L744+16
+	bl	printf
+.L739:
+	ldr	r3, [r5, #0]
+	movw	r2, #65535
+	cmp	r4, r3
+	ldrh	r3, [r7, r6]
+	bne	.L740
+	cmp	r3, r2
+	bne	.L741
+	movs	r3, #0
+	str	r3, [r5, #0]
+	b	.L742
+.L741:
+	ldr	r1, .L744
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r3, r0, r3, r1
+	str	r3, [r5, #0]
+	strh	r2, [r3, #2]	@ movhi
+	b	.L742
+.L740:
+	cmp	r3, r2
+	ldrh	r2, [r4, #2]
+	bne	.L743
+	cmp	r2, r3
+	beq	.L742
+	ldr	r1, .L744
+	movs	r0, #6
+	muls	r2, r0, r2
+	ldr	r1, [r1, #0]
+	strh	r3, [r1, r2]	@ movhi
+	b	.L742
+.L743:
+	ldr	r1, .L744
+	movs	r0, #6
+	ldr	r1, [r1, #0]
+	mla	r5, r0, r3, r1
+	strh	r2, [r5, #2]	@ movhi
+	ldrh	r2, [r4, #2]
+	muls	r0, r2, r0
+	strh	r3, [r1, r0]	@ movhi
+.L742:
+	movw	r3, #65535
+	movs	r0, #0
+	strh	r3, [r7, r6]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L745:
+	.align	2
+.L744:
+	.word	.LANCHOR97
+	.word	.LANCHOR106
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	List_remove_node, .-List_remove_node
+	.section	.text.List_pop_index_node,"ax",%progbits
+	.align	1
+	.global	List_pop_index_node
+	.thumb
+	.thumb_func
+	.type	List_pop_index_node, %function
+List_pop_index_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #0]
+	push	{r4, r5, r6, lr}
+	cbz	r3, .L751
+	ldr	r2, .L752
+	movw	r6, #65535
+	movs	r5, #6
+	ldr	r4, [r2, #0]
+	b	.L748
+.L750:
+	mla	r3, r5, r2, r4
+	subs	r1, r1, #1
+	uxth	r1, r1
+.L748:
+	cbz	r1, .L749
+	ldrh	r2, [r3, #0]
+	cmp	r2, r6
+	bne	.L750
+.L749:
+	subs	r4, r3, r4
+	ldr	r3, .L752+4
+	asrs	r4, r4, #1
+	muls	r4, r3, r4
+	uxth	r4, r4
+	mov	r1, r4
+	bl	List_remove_node
+	mov	r0, r4
+	pop	{r4, r5, r6, pc}
+.L751:
+	movw	r0, #65535
+	pop	{r4, r5, r6, pc}
+.L753:
+	.align	2
+.L752:
+	.word	.LANCHOR97
+	.word	-1431655765
+	.size	List_pop_index_node, .-List_pop_index_node
+	.section	.text.List_pop_head_node,"ax",%progbits
+	.align	1
+	.global	List_pop_head_node
+	.thumb
+	.thumb_func
+	.type	List_pop_head_node, %function
+List_pop_head_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	List_pop_index_node
+	.size	List_pop_head_node, .-List_pop_head_node
+	.section	.text.List_get_gc_head_node,"ax",%progbits
+	.align	1
+	.global	List_get_gc_head_node
+	.thumb
+	.thumb_func
+	.type	List_get_gc_head_node, %function
+List_get_gc_head_node:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L761
+	push	{r4, lr}
+	ldr	r3, [r3, #0]
+	cbz	r3, .L760
+	ldr	r2, .L761+4
+	movw	r1, #65535
+	movs	r4, #6
+	ldr	r2, [r2, #0]
+	b	.L757
+.L759:
+	mla	r3, r4, r3, r2
+	subs	r0, r0, #1
+	uxth	r0, r0
+.L757:
+	cbz	r0, .L758
+	ldrh	r3, [r3, #0]
+	cmp	r3, r1
+	bne	.L759
+	mov	r0, r1
+	pop	{r4, pc}
+.L758:
+	subs	r3, r3, r2
+	ldr	r0, .L761+8
+	asrs	r3, r3, #1
+	muls	r0, r3, r0
+	uxth	r0, r0
+	pop	{r4, pc}
+.L760:
+	movw	r0, #65535
+	pop	{r4, pc}
+.L762:
+	.align	2
+.L761:
+	.word	.LANCHOR98
+	.word	.LANCHOR97
+	.word	-1431655765
+	.size	List_get_gc_head_node, .-List_get_gc_head_node
+	.section	.text.List_update_data_list,"ax",%progbits
+	.align	1
+	.global	List_update_data_list
+	.thumb
+	.thumb_func
+	.type	List_update_data_list, %function
+List_update_data_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L772
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L764
+	ldr	r3, .L772+4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L764
+	ldr	r3, .L772+8
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L764
+	ldr	r3, .L772+12
+	movs	r7, #6
+	muls	r7, r0, r7
+	ldr	r8, [r3, #0]
+	ldr	r3, .L772+16
+	add	r5, r8, r7
+	ldr	r3, [r3, #0]
+	cmp	r5, r3
+	beq	.L764
+	ldr	r3, .L772+20
+	movw	r2, #65535
+	ldrh	r6, [r5, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	muls	r6, r3, r6
+	ldrh	r3, [r5, #2]
+	it	eq
+	moveq	r6, #-1
+	cmp	r3, r2
+	bne	.L766
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	bne	.L766
+	ldr	r1, .L772+24
+	movw	r2, #445
+	ldr	r0, .L772+28
+	bl	printf
+	ldr	r0, .L772+32
+	ldr	r1, .L772+36
+	bl	printf
+.L766:
+	ldrh	r3, [r5, #2]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L767
+	ldrh	r2, [r8, r7]
+	cmp	r2, r3
+	beq	.L764
+.L767:
+	ldr	r2, .L772+12
+	movs	r1, #6
+	ldr	r2, [r2, #0]
+	mla	r3, r1, r3, r2
+	ldr	r1, .L772+40
+	subs	r2, r3, r2
+	asrs	r2, r2, #1
+	muls	r2, r1, r2
+	ldr	r1, .L772+20
+	uxth	r2, r2
+	ldrh	r3, [r3, #4]
+	ldr	r1, [r1, #0]
+	ldrh	r2, [r1, r2, lsl #1]
+	muls	r3, r2, r3
+	it	eq
+	moveq	r3, #-1
+	cmp	r6, r3
+	bcs	.L764
+	ldr	r5, .L772+44
+	mov	r1, r4
+	ldr	r0, .L772+16
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L769
+	ldr	r1, .L772+24
+	mov	r2, #456
+	ldr	r0, .L772+28
+	bl	printf
+	ldr	r0, .L772+32
+	ldr	r1, .L772+36
+	bl	printf
+.L769:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+.L764:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L773:
+	.align	2
+.L772:
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR97
+	.word	.LANCHOR98
+	.word	.LANCHOR99
+	.word	.LANCHOR110
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	-1431655765
+	.word	.LANCHOR101
+	.size	List_update_data_list, .-List_update_data_list
+	.section	.text.ftl_free_no_use_map_blk,"ax",%progbits
+	.align	1
+	.global	ftl_free_no_use_map_blk
+	.thumb
+	.thumb_func
+	.type	ftl_free_no_use_map_blk, %function
+ftl_free_no_use_map_blk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #10]
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #20]
+	lsls	r2, r2, #1
+	ldr	r6, [r0, #12]
+	movs	r1, #0
+	ldr	r7, [r0, #24]
+	mov	r0, r5
+	bl	memset
+	movs	r2, #0
+	b	.L775
+.L779:
+	ldr	r1, [r7, r2, lsl #2]
+	movs	r3, #0
+	ubfx	r1, r1, #10, #16
+	b	.L776
+.L778:
+	ldrh	r0, [r6, r3, lsl #1]
+	cmp	r0, r1
+	bne	.L777
+	ldrh	r0, [r5, r3, lsl #1]
+	adds	r0, r0, #1
+	strh	r0, [r5, r3, lsl #1]	@ movhi
+.L777:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L776:
+	ldrh	r0, [r4, #10]
+	cmp	r0, r3
+	bhi	.L778
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L775:
+	ldrh	r3, [r4, #6]
+	cmp	r3, r2
+	bhi	.L779
+	mov	sl, #0
+	ldrh	r3, [r5, #0]
+	mov	r7, sl
+	ldr	r2, .L785
+	b	.L780
+.L784:
+	ldrh	r1, [r4, #0]
+	cmp	r1, r7
+	bne	.L781
+	ldrh	r1, [r2, #0]
+	ldrh	r0, [r4, #2]
+	cmp	r0, r1
+	it	cc
+	strhcc	r1, [r5, r7, lsl #1]	@ movhi
+.L781:
+	ldrh	r8, [r5, r7, lsl #1]
+	lsl	fp, r7, #1
+	cmp	r3, r8
+	itt	hi
+	movhi	sl, r7
+	movhi	r3, r8
+	cmp	r8, #0
+	bne	.L783
+	ldrh	r0, [r6, fp]
+	cbz	r0, .L783
+	movs	r1, #1
+	stmia	sp, {r2, r3}
+	bl	FtlFreeSysBlkQueueIn
+	ldmia	sp, {r2, r3}
+	strh	r8, [r6, fp]	@ movhi
+	ldrh	r1, [r4, #8]
+	subs	r1, r1, #1
+	strh	r1, [r4, #8]	@ movhi
+.L783:
+	adds	r7, r7, #1
+	uxth	r7, r7
+.L780:
+	ldrh	r1, [r4, #10]
+	cmp	r1, r7
+	bhi	.L784
+	mov	r0, sl
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L786:
+	.align	2
+.L785:
+	.word	.LANCHOR69
+	.size	ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
+	.section	.text.ftl_map_blk_alloc_new_blk,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_alloc_new_blk
+	.thumb
+	.thumb_func
+	.type	ftl_map_blk_alloc_new_blk, %function
+ftl_map_blk_alloc_new_blk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ldrh	r2, [r0, #10]
+	movs	r5, #0
+	ldr	r3, [r0, #12]
+	b	.L788
+.L791:
+	mov	r7, r3
+	adds	r3, r3, #2
+	ldrh	r6, [r7, #0]
+	cbnz	r6, .L789
+	bl	FtlFreeSysBlkQueueOut
+	strh	r0, [r7, #0]	@ movhi
+	cbz	r0, .L790
+	ldr	r3, [r4, #28]
+	strh	r6, [r4, #2]	@ movhi
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	ldrh	r3, [r4, #8]
+	strh	r5, [r4, #0]	@ movhi
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	b	.L790
+.L789:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L788:
+	cmp	r5, r2
+	bne	.L791
+.L790:
+	ldrh	r3, [r4, #10]
+	cmp	r3, r5
+	bhi	.L792
+	ldr	r1, .L793
+	movw	r2, #553
+	ldr	r0, .L793+4
+	bl	printf
+	ldr	r0, .L793+8
+	ldr	r1, .L793+12
+	bl	printf
+.L792:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L794:
+	.align	2
+.L793:
+	.word	.LANCHOR111
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
+	.section	.text.select_l2p_ram_region,"ax",%progbits
+	.align	1
+	.global	select_l2p_ram_region
+	.thumb
+	.thumb_func
+	.type	select_l2p_ram_region, %function
+select_l2p_ram_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L807
+	movw	r1, #65535
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L807+4
+	ldr	r0, [r2, #0]
+	movs	r2, #0
+	mov	r4, r2
+	ldrh	r3, [r3, #0]
+	b	.L796
+.L798:
+	adds	r2, r2, #12
+	adds	r5, r0, r2
+	ldrh	r5, [r5, #-12]
+	cmp	r5, r1
+	beq	.L797
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L796:
+	cmp	r4, r3
+	bne	.L798
+	movs	r1, #0
+	mov	r4, r3
+	mov	r6, #-2147483648
+	mov	r2, r1
+	b	.L799
+.L801:
+	adds	r5, r0, r1
+	ldr	r5, [r5, #4]
+	cmp	r5, #0
+	blt	.L800
+	cmp	r5, r6
+	itt	cc
+	movcc	r6, r5
+	movcc	r4, r2
+.L800:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L799:
+	cmp	r2, r3
+	bne	.L801
+	cmp	r4, r3
+	bcc	.L797
+	ldr	r2, .L807+8
+	movs	r1, #0
+	mov	r4, r3
+	mov	r5, #-1
+	ldrh	r7, [r2, #0]
+	mov	r2, r1
+	b	.L802
+.L804:
+	adds	r6, r0, r1
+	ldr	r6, [r6, #4]
+	cmp	r6, r5
+	bcs	.L803
+	ldrh	ip, [r0, r1]
+	cmp	ip, r7
+	it	ne
+	movne	r5, r6
+	it	ne
+	movne	r4, r2
+.L803:
+	adds	r2, r2, #1
+	adds	r1, r1, #12
+	uxth	r2, r2
+.L802:
+	cmp	r2, r3
+	bne	.L804
+	cmp	r4, r2
+	bcc	.L797
+	ldr	r1, .L807+12
+	mov	r2, #756
+	ldr	r0, .L807+16
+	bl	printf
+	ldr	r0, .L807+20
+	ldr	r1, .L807+24
+	bl	printf
+.L797:
+	mov	r0, r4
+	pop	{r3, r4, r5, r6, r7, pc}
+.L808:
+	.align	2
+.L807:
+	.word	.LANCHOR112
+	.word	.LANCHOR83
+	.word	.LANCHOR113
+	.word	.LANCHOR114
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	select_l2p_ram_region, .-select_l2p_ram_region
+	.section	.text.FtlUpdateVaildLpn,"ax",%progbits
+	.align	1
+	.global	FtlUpdateVaildLpn
+	.thumb
+	.thumb_func
+	.type	FtlUpdateVaildLpn, %function
+FtlUpdateVaildLpn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L815
+	push	{r4, r5, lr}
+	ldrh	r2, [r3, #0]
+	adds	r1, r2, #1
+	cmp	r2, #4
+	strh	r1, [r3, #0]	@ movhi
+	mov	r2, r3
+	bhi	.L810
+	cbz	r0, .L809
+.L810:
+	movs	r3, #0
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L815+4
+	movw	r4, #65535
+	ldrh	r5, [r2, #0]
+	ldr	r2, .L815+8
+	ldr	r1, [r2, #0]
+	mov	r2, r3
+	b	.L812
+.L814:
+	ldrh	r0, [r1], #2
+	cmp	r0, r4
+	it	ne
+	addne	r3, r3, r0
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L812:
+	cmp	r2, r5
+	bne	.L814
+	ldr	r2, .L815+12
+	str	r3, [r2, #0]
+.L809:
+	pop	{r4, r5, pc}
+.L816:
+	.align	2
+.L815:
+	.word	.LANCHOR115
+	.word	.LANCHOR55
+	.word	.LANCHOR99
+	.word	.LANCHOR116
+	.size	FtlUpdateVaildLpn, .-FtlUpdateVaildLpn
+	.section	.text.ftl_set_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_set_blk_mode
+	.thumb
+	.thumb_func
+	.type	ftl_set_blk_mode, %function
+ftl_set_blk_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L821
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+	uxth	r2, r2
+	ldr	r3, [r3, #0]
+	cbz	r1, .L818
+	movs	r1, #1
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	orrs	r0, r0, r1
+	b	.L820
+.L818:
+	movs	r1, #1
+	lsl	r0, r1, r0
+	ldr	r1, [r3, r2, lsl #2]
+	bic	r0, r1, r0
+.L820:
+	str	r0, [r3, r2, lsl #2]
+	bx	lr
+.L822:
+	.align	2
+.L821:
+	.word	.LANCHOR117
+	.size	ftl_set_blk_mode, .-ftl_set_blk_mode
+	.section	.text.ftl_get_blk_mode,"ax",%progbits
+	.align	1
+	.global	ftl_get_blk_mode
+	.thumb
+	.thumb_func
+	.type	ftl_get_blk_mode, %function
+ftl_get_blk_mode:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L824
+	lsrs	r2, r0, #5
+	and	r0, r0, #31
+	ldr	r3, [r3, #0]
+	ldr	r3, [r3, r2, lsl #2]
+	lsr	r0, r3, r0
+	and	r0, r0, #1
+	bx	lr
+.L825:
+	.align	2
+.L824:
+	.word	.LANCHOR117
+	.size	ftl_get_blk_mode, .-ftl_get_blk_mode
+	.section	.text.FtlL2PDataInit,"ax",%progbits
+	.align	1
+	.global	FtlL2PDataInit
+	.thumb
+	.thumb_func
+	.type	FtlL2PDataInit, %function
+FtlL2PDataInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L829
+	movs	r1, #0
+	push	{r4, r5, r6, r7, r8, lr}
+	ldr	r2, [r3, #0]
+	ldr	r3, .L829+4
+	ldr	r5, .L829+8
+	ldr	r4, .L829+12
+	lsls	r2, r2, #1
+	ldr	r6, .L829+16
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r3, [r4, #0]
+	ldrh	r2, [r6, #0]
+	movs	r1, #255
+	muls	r2, r3, r2
+	ldr	r0, [r5, #0]
+	bl	memset
+	ldr	r3, .L829+20
+	ldrh	r7, [r6, #0]
+	ldr	ip, [r5, #0]
+	movw	r5, #65535
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	ldrh	r6, [r4, #0]
+	mov	r1, r3
+	mov	r4, r3
+	b	.L827
+.L828:
+	adds	r1, r1, #1
+	bic	r3, r3, #3
+	add	r3, ip, r3
+	str	r3, [r2, #-4]
+	uxth	r1, r1
+	mov	r3, r8
+	str	r4, [r2, #-8]
+	strh	r5, [r2, #-12]	@ movhi
+.L827:
+	adds	r2, r2, #12
+	cmp	r1, r7
+	add	r8, r3, r6
+	movw	r0, #65535
+	bne	.L828
+	ldr	r2, .L829
+	ldr	r3, .L829+24
+	ldr	r2, [r2, #0]
+	strh	r0, [r3, #2]	@ movhi
+	strh	r0, [r3, #0]	@ movhi
+	strh	r2, [r3, #10]	@ movhi
+	movw	r2, #61634
+	strh	r2, [r3, #4]	@ movhi
+	ldr	r2, .L829+28
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #8]	@ movhi
+	ldr	r2, .L829+32
+	ldrh	r2, [r2, #0]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, .L829+36
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #12]
+	ldr	r2, .L829+40
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #16]
+	ldr	r2, .L829+4
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #20]
+	ldr	r2, .L829+44
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #24]
+	pop	{r4, r5, r6, r7, r8, pc}
+.L830:
+	.align	2
+.L829:
+	.word	.LANCHOR80
+	.word	.LANCHOR118
+	.word	.LANCHOR119
+	.word	.LANCHOR73
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.word	.LANCHOR120
+	.word	.LANCHOR121
+	.word	.LANCHOR82
+	.word	.LANCHOR122
+	.word	.LANCHOR123
+	.word	.LANCHOR124
+	.size	FtlL2PDataInit, .-FtlL2PDataInit
+	.section	.text.ftl_sb_update_avl_pages,"ax",%progbits
+	.align	1
+	.global	ftl_sb_update_avl_pages
+	.thumb
+	.thumb_func
+	.type	ftl_sb_update_avl_pages, %function
+ftl_sb_update_avl_pages:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movs	r3, #0
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L838
+	push	{r4, r5, r6, r7, lr}
+	movw	r4, #65535
+	ldrh	r3, [r3, #0]
+	b	.L832
+.L834:
+	add	r5, r2, #8
+	ldrh	r5, [r0, r5, lsl #1]
+	cmp	r5, r4
+	beq	.L833
+	ldrh	r5, [r0, #4]
+	adds	r5, r5, #1
+	strh	r5, [r0, #4]	@ movhi
+.L833:
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L832:
+	cmp	r2, r3
+	bcc	.L834
+	ldr	r2, .L838+4
+	mov	r4, r0
+	movw	r5, #65535
+	mvns	r1, r1
+	ldrh	r6, [r2, #0]
+	movs	r2, #0
+	b	.L835
+.L837:
+	ldrh	r7, [r4, #16]
+	cmp	r7, r5
+	beq	.L836
+	ldrh	r7, [r0, #4]
+	adds	r7, r6, r7
+	adds	r7, r7, r1
+	strh	r7, [r0, #4]	@ movhi
+.L836:
+	adds	r2, r2, #1
+	adds	r4, r4, #2
+	uxth	r2, r2
+.L835:
+	cmp	r2, r3
+	bne	.L837
+	pop	{r4, r5, r6, r7, pc}
+.L839:
+	.align	2
+.L838:
+	.word	.LANCHOR53
+	.word	.LANCHOR68
+	.size	ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
+	.section	.text.make_superblock,"ax",%progbits
+	.align	1
+	.global	make_superblock
+	.thumb
+	.thumb_func
+	.type	make_superblock, %function
+make_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L847
+	ldrh	r2, [r0, #0]
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L841
+	ldr	r1, .L847+4
+	movw	r2, #2145
+	ldr	r0, .L847+8
+	bl	printf
+	ldr	r0, .L847+12
+	ldr	r1, .L847+16
+	bl	printf
+.L841:
+	movs	r5, #0
+	ldr	r8, .L847+40
+	strh	r5, [r4, #4]	@ movhi
+	movw	r6, #65535
+	strb	r5, [r4, #7]
+	ldr	r7, .L847+20
+	b	.L842
+.L844:
+	ldrb	r0, [r7, r5]	@ zero_extendqisi2
+	add	sl, r5, #8
+	ldrh	r1, [r4, #0]
+	bl	V2P_block
+	strh	r6, [r4, sl, lsl #1]	@ movhi
+	mov	fp, r0
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L843
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	strh	fp, [r4, sl, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	strb	r3, [r4, #7]
+.L843:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L842:
+	ldrh	r3, [r8, #0]
+	cmp	r3, r5
+	bhi	.L844
+	ldr	r2, .L847+24
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #9]
+	ldr	r3, .L847+28
+	ldr	r3, [r3, #0]
+	cbz	r3, .L845
+	ldr	r3, .L847+32
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r2, lsl #1]
+	cmp	r3, #59
+	bhi	.L845
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L845:
+	ldr	r3, .L847+36
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L846
+	movs	r3, #1
+	strb	r3, [r4, #9]
+.L846:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L848:
+	.align	2
+.L847:
+	.word	.LANCHOR55
+	.word	.LANCHOR125
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR62
+	.word	.LANCHOR68
+	.word	.LANCHOR126
+	.word	.LANCHOR94
+	.word	.LANCHOR7
+	.word	.LANCHOR53
+	.size	make_superblock, .-make_superblock
+	.section	.text.SupperBlkListInit,"ax",%progbits
+	.align	1
+	.global	SupperBlkListInit
+	.thumb
+	.thumb_func
+	.type	SupperBlkListInit, %function
+SupperBlkListInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L860
+	movs	r1, #0
+	ldr	r3, .L860+4
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r6, #0
+	ldrh	r3, [r3, #0]
+	mov	r7, r6
+	ldr	r0, [r2, #0]
+	movs	r2, #6
+	muls	r2, r3, r2
+	mov	r4, r6
+	bl	memset
+	ldr	r3, .L860+8
+	ldr	sl, .L860+68
+	str	r6, [r3, #0]
+	ldr	r3, .L860+12
+	str	r6, [r3, #0]
+	ldr	r3, .L860+16
+	str	r6, [r3, #0]
+	ldr	r3, .L860+20
+	strh	r6, [r3, #0]	@ movhi
+	ldr	r3, .L860+24
+	strh	r6, [r3, #0]	@ movhi
+	b	.L850
+.L852:
+	ldr	r2, .L860+28
+	mov	r1, r4
+	ldrb	r0, [r2, r8]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L851
+	ldrh	r3, [fp, #0]
+	adds	r5, r5, r3
+	uxth	r5, r5
+.L851:
+	add	r8, r8, #1
+	uxth	r8, r8
+	b	.L857
+.L859:
+	movs	r5, #0
+	ldr	fp, .L860+72
+	mov	r8, r5
+.L857:
+	ldr	r2, .L860+32
+	ldrh	r3, [r2, #0]
+	cmp	r3, r8
+	bhi	.L852
+	cbz	r5, .L853
+	mov	r1, r5
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r5, r0
+	b	.L854
+.L853:
+	ldr	r3, .L860+36
+	movw	r2, #65535
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+.L854:
+	ldr	r3, .L860
+	movs	r2, #6
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r4, r3
+	strh	r5, [r3, #4]	@ movhi
+	ldr	r3, .L860+40
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L855
+	ldr	r3, .L860+44
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L855
+	ldr	r3, .L860+48
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	beq	.L855
+	ldr	r3, .L860+36
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r4, lsl #1]
+	cbnz	r3, .L856
+	adds	r6, r6, #1
+	mov	r0, r4
+	uxth	r6, r6
+	bl	INSERT_FREE_LIST
+	b	.L855
+.L856:
+	adds	r7, r7, #1
+	mov	r0, r4
+	uxth	r7, r7
+	bl	INSERT_DATA_LIST
+.L855:
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L850:
+	ldrh	r3, [sl, #0]
+	cmp	r4, r3
+	bcc	.L859
+	ldr	r2, .L860+20
+	strh	r7, [r2, #0]	@ movhi
+	ldr	r2, .L860+24
+	strh	r6, [r2, #0]	@ movhi
+	adds	r6, r7, r6
+	cmp	r6, r3
+	ble	.L858
+	ldr	r1, .L860+52
+	movw	r2, #2209
+	ldr	r0, .L860+56
+	bl	printf
+	ldr	r0, .L860+60
+	ldr	r1, .L860+64
+	bl	printf
+.L858:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L861:
+	.align	2
+.L860:
+	.word	.LANCHOR97
+	.word	.LANCHOR56
+	.word	.LANCHOR103
+	.word	.LANCHOR98
+	.word	.LANCHOR100
+	.word	.LANCHOR101
+	.word	.LANCHOR104
+	.word	.LANCHOR62
+	.word	.LANCHOR53
+	.word	.LANCHOR99
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR127
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR55
+	.word	.LANCHOR68
+	.size	SupperBlkListInit, .-SupperBlkListInit
+	.section	.text.update_multiplier_value,"ax",%progbits
+	.align	1
+	.global	update_multiplier_value
+	.thumb
+	.thumb_func
+	.type	update_multiplier_value, %function
+update_multiplier_value:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r4, #0
+	mov	r6, r0
+	mov	r5, r4
+	ldr	sl, .L867+8
+	ldr	r8, .L867+12
+	ldr	r7, .L867
+	b	.L863
+.L865:
+	mov	r1, r6
+	ldrb	r0, [r8, r5]	@ zero_extendqisi2
+	bl	V2P_block
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L864
+	ldrh	r3, [r7, #0]
+	adds	r4, r4, r3
+	uxth	r4, r4
+.L864:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L863:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L865
+	cbz	r4, .L866
+	mov	r1, r4
+	mov	r0, #32768
+	bl	__aeabi_idiv
+	uxth	r4, r0
+.L866:
+	ldr	r3, .L867+4
+	movs	r2, #6
+	movs	r0, #0
+	ldr	r3, [r3, #0]
+	mla	r6, r2, r6, r3
+	strh	r4, [r6, #4]	@ movhi
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L868:
+	.align	2
+.L867:
+	.word	.LANCHOR68
+	.word	.LANCHOR97
+	.word	.LANCHOR53
+	.word	.LANCHOR62
+	.size	update_multiplier_value, .-update_multiplier_value
+	.section	.text.GetFreeBlockMinEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMinEraseCount
+	.thumb
+	.thumb_func
+	.type	GetFreeBlockMinEraseCount, %function
+GetFreeBlockMinEraseCount:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L872
+	ldr	r0, [r3, #0]
+	cbz	r0, .L870
+	ldr	r3, .L872+4
+	ldr	r3, [r3, #0]
+	subs	r0, r0, r3
+	ldr	r3, .L872+8
+	asrs	r0, r0, #1
+	muls	r0, r3, r0
+	ldr	r3, .L872+12
+	uxth	r0, r0
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r0, lsl #1]
+.L870:
+	bx	lr
+.L873:
+	.align	2
+.L872:
+	.word	.LANCHOR103
+	.word	.LANCHOR97
+	.word	-1431655765
+	.word	.LANCHOR94
+	.size	GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount
+	.section	.text.GetFreeBlockMaxEraseCount,"ax",%progbits
+	.align	1
+	.global	GetFreeBlockMaxEraseCount
+	.thumb
+	.thumb_func
+	.type	GetFreeBlockMaxEraseCount, %function
+GetFreeBlockMaxEraseCount:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L881
+	push	{r4, r5, r6, lr}
+	ldr	r3, [r3, #0]
+	cbz	r3, .L880
+	ldr	r2, .L881+4
+	movs	r1, #7
+	movw	r5, #65535
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	asrs	r2, r2, #3
+	cmp	r0, r2
+	it	gt
+	uxthgt	r0, r2
+	ldr	r2, .L881+8
+	movs	r6, #6
+	ldr	r1, [r2, #0]
+	ldr	r2, .L881+12
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	movs	r2, #0
+	uxth	r3, r3
+	b	.L877
+.L879:
+	mul	r4, r6, r3
+	ldrh	r4, [r1, r4]
+	cmp	r4, r5
+	beq	.L878
+	adds	r2, r2, #1
+	mov	r3, r4
+	uxth	r2, r2
+.L877:
+	cmp	r2, r0
+	bne	.L879
+.L878:
+	ldr	r2, .L881+16
+	ldr	r2, [r2, #0]
+	ldrh	r0, [r2, r3, lsl #1]
+	pop	{r4, r5, r6, pc}
+.L880:
+	mov	r0, r3
+	pop	{r4, r5, r6, pc}
+.L882:
+	.align	2
+.L881:
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	.LANCHOR97
+	.word	-1431655765
+	.word	.LANCHOR94
+	.size	GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount
+	.section	.text.free_data_superblock,"ax",%progbits
+	.align	1
+	.global	free_data_superblock
+	.thumb
+	.thumb_func
+	.type	free_data_superblock, %function
+free_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r2, #65535
+	cmp	r0, r2
+	push	{r3, lr}
+	beq	.L884
+	ldr	r2, .L885
+	movs	r1, #0
+	ldr	r2, [r2, #0]
+	strh	r1, [r2, r0, lsl #1]	@ movhi
+	bl	INSERT_FREE_LIST
+.L884:
+	movs	r0, #0
+	pop	{r3, pc}
+.L886:
+	.align	2
+.L885:
+	.word	.LANCHOR99
+	.size	free_data_superblock, .-free_data_superblock
+	.section	.text.FtlGcBufInit,"ax",%progbits
+	.align	1
+	.global	FtlGcBufInit
+	.thumb
+	.thumb_func
+	.type	FtlGcBufInit, %function
+FtlGcBufInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L892
+	movs	r2, #0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r2
+	str	r2, [r3, #0]
+	ldr	r3, .L892+4
+	ldrh	ip, [r3, #0]
+	ldr	r3, .L892+8
+	ldr	r7, [r3, #0]
+	ldr	r3, .L892+12
+	ldr	r6, [r3, #0]
+	ldr	r3, .L892+16
+	ldr	r1, [r3, #0]
+	ldr	r3, .L892+20
+	ldrh	r5, [r3, #0]
+	ldr	r3, .L892+24
+	str	r5, [sp, #4]
+	ldrh	fp, [r3, #0]
+	ldr	r3, .L892+28
+	ldr	r0, [r3, #0]
+	mov	r3, r2
+	b	.L888
+.L889:
+	movs	r5, #1
+	bic	r4, r4, #3
+	adds	r3, r3, r5
+	bic	r2, r2, #3
+	adds	r4, r7, r4
+	adds	r2, r6, r2
+	str	r4, [r1, #-12]
+	uxth	r3, r3
+	str	r2, [r1, #-8]
+	str	r5, [r1, #-4]
+	str	r4, [r0, #-28]
+	mov	r4, r8
+	str	r2, [r0, #-24]
+	mov	r2, sl
+.L888:
+	adds	r1, r1, #12
+	ldr	r5, [sp, #4]
+	adds	r0, r0, #36
+	cmp	r3, ip
+	add	r8, r4, r5
+	add	sl, r2, fp
+	bne	.L889
+	ldr	r1, .L892+8
+	movs	r4, #12
+	ldr	r2, .L892+32
+	mov	fp, #0
+	ldr	ip, [r1, #0]
+	ldr	r1, .L892+20
+	ldr	r8, [r2, #0]
+	ldr	r2, .L892+16
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L892+12
+	ldr	r2, [r2, #0]
+	ldr	r6, [r1, #0]
+	ldr	r1, .L892+24
+	ldrh	r5, [r1, #0]
+	b	.L890
+.L891:
+	mul	r1, r4, r3
+	mul	r0, r7, r3
+	add	sl, r2, r1
+	bic	r0, r0, #3
+	str	fp, [sl, #8]
+	add	r0, ip, r0
+	str	r0, [r2, r1]
+	mul	r1, r5, r3
+	adds	r3, r3, #1
+	uxth	r3, r3
+	bic	r1, r1, #3
+	adds	r1, r6, r1
+	str	r1, [sl, #4]
+.L890:
+	cmp	r3, r8
+	bcc	.L891
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L893:
+	.align	2
+.L892:
+	.word	.LANCHOR128
+	.word	.LANCHOR53
+	.word	.LANCHOR129
+	.word	.LANCHOR130
+	.word	.LANCHOR131
+	.word	.LANCHOR73
+	.word	.LANCHOR74
+	.word	.LANCHOR132
+	.word	.LANCHOR133
+	.size	FtlGcBufInit, .-FtlGcBufInit
+	.section	.text.FtlVariablesInit,"ax",%progbits
+	.align	1
+	.global	FtlVariablesInit
+	.thumb
+	.thumb_func
+	.type	FtlVariablesInit, %function
+FtlVariablesInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L895
+	movw	r2, #65535
+	ldr	r5, .L895+4
+	mov	r1, r4
+	str	r4, [r3, #0]
+	ldr	r3, .L895+8
+	strh	r2, [r3, #0]	@ movhi
+	mov	r2, #-1
+	ldr	r3, .L895+12
+	str	r4, [r3, #0]
+	ldr	r3, .L895+16
+	str	r4, [r3, #0]
+	ldr	r3, .L895+20
+	str	r2, [r3, #0]
+	ldr	r3, .L895+24
+	str	r4, [r3, #0]
+	ldr	r3, .L895+28
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L895+32
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L895+36
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r2, [r5, #0]
+	ldr	r3, .L895+40
+	mov	r1, r4
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L895+44
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	mov	r1, r4
+	movs	r2, #48
+	ldr	r0, .L895+48
+	bl	memset
+	mov	r1, r4
+	mov	r2, #512
+	ldr	r0, .L895+52
+	bl	memset
+	bl	FtlGcBufInit
+	bl	FtlL2PDataInit
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L896:
+	.align	2
+.L895:
+	.word	.LANCHOR134
+	.word	.LANCHOR56
+	.word	.LANCHOR135
+	.word	.LANCHOR136
+	.word	.LANCHOR137
+	.word	.LANCHOR138
+	.word	.LANCHOR126
+	.word	.LANCHOR85
+	.word	.LANCHOR77
+	.word	.LANCHOR86
+	.word	.LANCHOR94
+	.word	.LANCHOR139
+	.word	.LANCHOR140
+	.word	.LANCHOR141
+	.size	FtlVariablesInit, .-FtlVariablesInit
+	.section	.text.FtlGcBufFree,"ax",%progbits
+	.align	1
+	.global	FtlGcBufFree
+	.thumb
+	.thumb_func
+	.type	FtlGcBufFree, %function
+FtlGcBufFree:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L904
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #36
+	ldr	r6, [r3, #0]
+	ldr	r3, .L904+4
+	ldr	r4, [r3, #0]
+	movs	r3, #0
+	mov	fp, r3
+	b	.L898
+.L901:
+	mov	ip, #12
+	mul	r3, ip, r2
+	add	sl, r4, r3
+	ldr	ip, [r4, r3]
+	ldr	r3, [r7, #8]
+	cmp	ip, r3
+	bne	.L899
+	mov	r3, r8
+	str	fp, [sl, #8]
+	b	.L900
+.L899:
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L903:
+	cmp	r2, r6
+	bcc	.L901
+	mov	r3, r8
+.L900:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L898:
+	cmp	r3, r1
+	bcs	.L897
+	mla	r7, r5, r3, r0
+	movs	r2, #0
+	mov	r8, r3
+	b	.L903
+.L897:
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L905:
+	.align	2
+.L904:
+	.word	.LANCHOR133
+	.word	.LANCHOR131
+	.size	FtlGcBufFree, .-FtlGcBufFree
+	.section	.text.FtlGcBufAlloc,"ax",%progbits
+	.align	1
+	.global	FtlGcBufAlloc
+	.thumb
+	.thumb_func
+	.type	FtlGcBufAlloc, %function
+FtlGcBufAlloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L913
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	movs	r7, #12
+	ldr	r8, [r3, #0]
+	movs	r6, #1
+	ldr	r3, .L913+4
+	movs	r5, #36
+	ldr	ip, [r3, #0]
+	movs	r3, #0
+	b	.L907
+.L910:
+	mla	r4, r7, r2, ip
+	ldr	sl, [r4, #8]
+	cmp	sl, #0
+	bne	.L908
+	mla	r2, r5, r3, r0
+	str	r6, [r4, #8]
+	ldr	sl, [r4, #0]
+	ldr	r4, [r4, #4]
+	str	sl, [r2, #8]
+	str	r4, [r2, #12]
+	b	.L909
+.L908:
+	adds	r2, r2, #1
+	uxth	r2, r2
+	b	.L911
+.L912:
+	movs	r2, #0
+.L911:
+	cmp	r2, r8
+	bcc	.L910
+.L909:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L907:
+	cmp	r3, r1
+	bcc	.L912
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L914:
+	.align	2
+.L913:
+	.word	.LANCHOR133
+	.word	.LANCHOR131
+	.size	FtlGcBufAlloc, .-FtlGcBufAlloc
+	.section	.text.IsBlkInGcList,"ax",%progbits
+	.align	1
+	.global	IsBlkInGcList
+	.thumb
+	.thumb_func
+	.type	IsBlkInGcList, %function
+IsBlkInGcList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L920
+	push	{r4, lr}
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L920+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	b	.L916
+.L918:
+	ldrh	r4, [r2], #2
+	cmp	r4, r0
+	beq	.L919
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L916:
+	cmp	r3, r1
+	bne	.L918
+	movs	r0, #0
+	pop	{r4, pc}
+.L919:
+	movs	r0, #1
+	pop	{r4, pc}
+.L921:
+	.align	2
+.L920:
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.size	IsBlkInGcList, .-IsBlkInGcList
+	.section	.text.FtlGcUpdatePage,"ax",%progbits
+	.align	1
+	.global	FtlGcUpdatePage
+	.thumb
+	.thumb_func
+	.type	FtlGcUpdatePage, %function
+FtlGcUpdatePage:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r4, r0
+	ubfx	r0, r0, #10, #16
+	mov	r5, r1
+	mov	r6, r2
+	bl	P2V_block_in_plane
+	ldr	r3, .L926
+	ldrh	r7, [r3, #0]
+	ldr	r3, .L926+4
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r1, r2
+	b	.L923
+.L925:
+	ldrh	ip, [r1], #2
+	cmp	ip, r0
+	beq	.L924
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L923:
+	cmp	r3, r7
+	bne	.L925
+	strh	r0, [r2, r3, lsl #1]	@ movhi
+	ldr	r3, .L926
+	ldrh	r2, [r3, #0]
+	adds	r2, r2, #1
+	strh	r2, [r3, #0]	@ movhi
+.L924:
+	ldr	r0, .L926+8
+	movs	r1, #12
+	ldr	r3, .L926+12
+	ldr	r0, [r0, #0]
+	ldrh	r2, [r3, #0]
+	muls	r1, r2, r1
+	adds	r7, r0, r1
+	str	r4, [r0, r1]
+	adds	r2, r2, #1
+	str	r5, [r7, #4]
+	str	r6, [r7, #8]
+	strh	r2, [r3, #0]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L927:
+	.align	2
+.L926:
+	.word	.LANCHOR142
+	.word	.LANCHOR143
+	.word	.LANCHOR145
+	.word	.LANCHOR144
+	.size	FtlGcUpdatePage, .-FtlGcUpdatePage
+	.section	.text.FtlGcPageVarInit,"ax",%progbits
+	.align	1
+	.global	FtlGcPageVarInit
+	.thumb
+	.thumb_func
+	.type	FtlGcPageVarInit, %function
+FtlGcPageVarInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L929
+	movs	r3, #0
+	push	{r4, lr}
+	movs	r1, #255
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r4, .L929+4
+	ldr	r2, .L929+8
+	strh	r3, [r2, #0]	@ movhi
+	ldrh	r2, [r4, #0]
+	ldr	r3, .L929+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r2, .L929+16
+	ldrh	r3, [r4, #0]
+	movs	r1, #255
+	ldr	r0, [r2, #0]
+	movs	r2, #12
+	muls	r2, r3, r2
+	bl	memset
+	pop	{r4, lr}
+	b	FtlGcBufInit
+.L930:
+	.align	2
+.L929:
+	.word	.LANCHOR142
+	.word	.LANCHOR70
+	.word	.LANCHOR144
+	.word	.LANCHOR143
+	.word	.LANCHOR145
+	.size	FtlGcPageVarInit, .-FtlGcPageVarInit
+	.section	.text.FtlGcRefreshBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcRefreshBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcRefreshBlock, %function
+FtlGcRefreshBlock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, lr}
+	ldr	r4, .L934
+	ldrh	r5, [r4, #0]
+	cmp	r5, r0
+	beq	.L932
+	ldr	r3, .L934+4
+	ldrh	r1, [r3, #0]
+	cmp	r1, r0
+	beq	.L932
+	movw	r2, #65535
+	cmp	r5, r2
+	bne	.L933
+	strh	r0, [r4, #0]	@ movhi
+	b	.L932
+.L933:
+	cmp	r1, r2
+	it	eq
+	strheq	r0, [r3, #0]	@ movhi
+.L932:
+	movs	r0, #0
+	pop	{r4, r5, pc}
+.L935:
+	.align	2
+.L934:
+	.word	.LANCHOR146
+	.word	.LANCHOR147
+	.size	FtlGcRefreshBlock, .-FtlGcRefreshBlock
+	.section	.text.FtlGcMarkBadPhyBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcMarkBadPhyBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcMarkBadPhyBlk, %function
+FtlGcMarkBadPhyBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	bl	P2V_block_in_plane
+	mov	r5, r0
+	bl	FtlGcRefreshBlock
+	ldr	r3, .L941
+	ldr	r3, [r3, #0]
+	cbz	r3, .L937
+	ldr	r3, .L941+4
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	cmp	r2, #29
+	bls	.L937
+	subs	r2, r2, #30
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+.L937:
+	ldr	r3, .L941+8
+	ldr	r2, .L941+12
+	ldrh	r1, [r3, #0]
+	movs	r3, #0
+	b	.L938
+.L940:
+	ldrh	r0, [r2, #2]!
+	cmp	r0, r4
+	beq	.L939
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L938:
+	cmp	r3, r1
+	bne	.L940
+	cmp	r3, #15
+	bhi	.L939
+	ldr	r2, .L941+16
+	strh	r4, [r2, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	ldr	r2, .L941+8
+	strh	r3, [r2, #0]	@ movhi
+.L939:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L942:
+	.align	2
+.L941:
+	.word	.LANCHOR126
+	.word	.LANCHOR94
+	.word	.LANCHOR148
+	.word	.LANCHOR149-2
+	.word	.LANCHOR149
+	.size	FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
+	.section	.text.FtlGcReFreshBadBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcReFreshBadBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcReFreshBadBlk, %function
+FtlGcReFreshBadBlk:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L946
+	push	{r4, lr}
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L944
+	ldr	r2, .L946+4
+	ldrh	r1, [r2, #0]
+	movw	r2, #65535
+	cmp	r1, r2
+	bne	.L944
+	ldr	r4, .L946+8
+	ldrh	r2, [r4, #0]
+	cmp	r2, r3
+	bcc	.L945
+	movs	r3, #0
+	strh	r3, [r4, #0]	@ movhi
+.L945:
+	ldr	r3, .L946+12
+	ldrh	r2, [r4, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	bl	P2V_block_in_plane
+	bl	FtlGcRefreshBlock
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+.L944:
+	movs	r0, #0
+	pop	{r4, pc}
+.L947:
+	.align	2
+.L946:
+	.word	.LANCHOR148
+	.word	.LANCHOR146
+	.word	.LANCHOR150
+	.word	.LANCHOR149
+	.size	FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
+	.section	.text.ftl_memset,"ax",%progbits
+	.align	1
+	.global	ftl_memset
+	.thumb
+	.thumb_func
+	.type	ftl_memset, %function
+ftl_memset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memset
+	.size	ftl_memset, .-ftl_memset
+	.section	.text.ftl_memcpy,"ax",%progbits
+	.align	1
+	.global	ftl_memcpy
+	.thumb
+	.thumb_func
+	.type	ftl_memcpy, %function
+ftl_memcpy:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcpy
+	.size	ftl_memcpy, .-ftl_memcpy
+	.section	.text.ftl_memcmp,"ax",%progbits
+	.align	1
+	.global	ftl_memcmp
+	.thumb
+	.thumb_func
+	.type	ftl_memcmp, %function
+ftl_memcmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	memcmp
+	.size	ftl_memcmp, .-ftl_memcmp
+	.section	.text.rknand_get_clk_rate,"ax",%progbits
+	.align	1
+	.global	rknand_get_clk_rate
+	.thumb
+	.thumb_func
+	.type	rknand_get_clk_rate, %function
+rknand_get_clk_rate:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r0, .L952
+	bx	lr
+.L953:
+	.align	2
+.L952:
+	.word	148000000
+	.size	rknand_get_clk_rate, .-rknand_get_clk_rate
+	.section	.text.ftl_malloc,"ax",%progbits
+	.align	1
+	.global	ftl_malloc
+	.thumb
+	.thumb_func
+	.type	ftl_malloc, %function
+ftl_malloc:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	movs	r1, #0
+	b	kmalloc
+	.size	ftl_malloc, .-ftl_malloc
+	.section	.text.FtlMemInit,"ax",%progbits
+	.align	1
+	.global	FtlMemInit
+	.thumb
+	.thumb_func
+	.type	FtlMemInit, %function
+FtlMemInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L960
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	movs	r1, #0
+	str	r1, [r3, #0]
+	movs	r5, #12
+	ldr	r3, .L960+4
+	ldr	r2, .L960+8
+	ldr	r4, .L960+12
+	str	r1, [r3, #0]
+	ldr	r3, .L960+16
+	ldrh	r0, [r4, #0]
+	ldr	r8, .L960+296
+	str	r1, [r3, #0]
+	ldr	r3, .L960+20
+	lsls	r0, r0, #1
+	ldr	r7, .L960+24
+	str	r1, [r3, #0]
+	ldr	r3, .L960+28
+	str	r1, [r3, #0]
+	ldr	r3, .L960+32
+	str	r1, [r3, #0]
+	ldr	r3, .L960+36
+	str	r1, [r3, #0]
+	ldr	r3, .L960+40
+	str	r1, [r3, #0]
+	ldr	r3, .L960+44
+	str	r1, [r3, #0]
+	ldr	r3, .L960+48
+	str	r1, [r3, #0]
+	ldr	r3, .L960+52
+	str	r1, [r3, #0]
+	ldr	r3, .L960+56
+	str	r1, [r3, #0]
+	ldr	r3, .L960+60
+	str	r1, [r3, #0]
+	ldr	r3, .L960+64
+	str	r1, [r3, #0]
+	ldr	r3, .L960+68
+	str	r1, [r3, #0]
+	ldr	r3, .L960+72
+	str	r1, [r3, #0]
+	ldr	r3, .L960+76
+	str	r1, [r3, #0]
+	movw	r3, #65535
+	str	r3, [r2, #0]
+	ldr	r2, .L960+80
+	str	r1, [r2, #0]
+	ldr	r2, .L960+84
+	str	r1, [r2, #0]
+	ldr	r2, .L960+88
+	str	r1, [r2, #0]
+	ldr	r2, .L960+92
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r2, .L960+96
+	strh	r3, [r2, #0]	@ movhi
+	movs	r2, #32
+	ldr	r3, .L960+100
+	strh	r2, [r3, #0]	@ movhi
+	movs	r2, #128
+	ldr	r3, .L960+104
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L960+108
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L960+112
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L960+116
+	strh	r1, [r3, #0]	@ movhi
+	str	r1, [sp, #4]
+	bl	ftl_malloc
+	ldr	r3, .L960+120
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+124
+	movs	r4, #36
+	str	r0, [r3, #0]
+	ldrh	r3, [r8, #0]
+	muls	r4, r3, r4
+	lsls	r6, r4, #2
+	mov	r0, r6
+	bl	ftl_malloc
+	ldr	r3, .L960+128
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+132
+	str	r0, [r3, #0]
+	mov	r0, r6
+	bl	ftl_malloc
+	ldr	r3, .L960+136
+	ldr	r6, .L960+140
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+144
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+148
+	ldrh	r4, [r6, #0]
+	str	r0, [r3, #0]
+	mov	r0, r4
+	ldrh	r3, [r8, #0]
+	lsls	r3, r3, #1
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	bl	ftl_malloc
+	ldr	r3, .L960+152
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+156
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+160
+	str	r0, [r3, #0]
+	ldr	r0, [r7, #0]
+	muls	r0, r4, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+164
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+168
+	str	r0, [r3, #0]
+	mov	r0, r4
+	bl	ftl_malloc
+	ldr	r3, .L960+172
+	ldr	r4, .L960+176
+	str	r0, [r3, #0]
+	ldr	r0, [r7, #0]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+180
+	ldrh	r8, [r8, #0]
+	str	r0, [r3, #0]
+	ldrh	r3, [r4, #0]
+	mul	r8, r8, r3
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L960+184
+	str	r0, [r3, #0]
+	lsl	r0, r8, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+188
+	str	r0, [r3, #0]
+	ldrh	r3, [r4, #0]
+	ldr	r0, [r7, #0]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r4, .L960+192
+	ldr	r3, .L960+196
+	ldr	r7, .L960+200
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	lsls	r0, r0, #1
+	uxth	r0, r0
+	strh	r0, [r7, #0]	@ movhi
+	bl	ftl_malloc
+	ldr	r3, .L960+204
+	str	r0, [r3, #0]
+	ldrh	r0, [r7, #0]
+	addw	r0, r0, #547
+	lsrs	r0, r0, #9
+	strh	r0, [r7, #0]	@ movhi
+	ldr	r7, .L960+208
+	lsls	r0, r0, #9
+	bl	ftl_malloc
+	ldr	r3, .L960+212
+	str	r0, [r3, #0]
+	adds	r0, r0, #32
+	ldr	r3, .L960+216
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L960+220
+	str	r0, [r3, #0]
+	ldr	r3, [r7, #0]
+	lsl	r8, r3, #1
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L960+224
+	str	r0, [r3, #0]
+	mov	r0, r8
+	bl	ftl_malloc
+	ldr	r3, .L960+228
+	ldr	r8, .L960+300
+	str	r0, [r3, #0]
+	ldrh	r0, [r4, #0]
+	lsrs	r0, r0, #3
+	adds	r0, r0, #4
+	bl	ftl_malloc
+	ldr	r3, .L960+232
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L960+236
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	lsls	r0, r0, #1
+	bl	ftl_malloc
+	ldr	r3, .L960+240
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	ldr	r8, .L960+304
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+244
+	str	r0, [r3, #0]
+	ldrh	r0, [r8, #0]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+248
+	ldrh	r2, [r8, #0]
+	ldr	r1, [sp, #4]
+	lsls	r2, r2, #2
+	str	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L960+252
+	ldrh	r0, [r3, #0]
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+256
+	str	r0, [r3, #0]
+	ldr	r0, [r7, #0]
+	ldr	r7, .L960+260
+	lsls	r0, r0, #2
+	bl	ftl_malloc
+	ldr	r3, .L960+264
+	str	r0, [r3, #0]
+	ldrh	r0, [r7, #0]
+	muls	r0, r5, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+268
+	ldr	r5, .L960+272
+	str	r0, [r3, #0]
+	ldrh	r3, [r7, #0]
+	ldrh	r0, [r6, #0]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+276
+	str	r0, [r3, #0]
+	movs	r0, #6
+	ldrh	r3, [r4, #0]
+	muls	r0, r3, r0
+	bl	ftl_malloc
+	ldr	r3, .L960+280
+	ldr	r4, .L960+284
+	ldrh	r2, [r5, #0]
+	str	r0, [r3, #0]
+	ldr	r3, .L960+288
+	ldrh	r3, [r3, #0]
+	adds	r3, r3, #31
+	lsrs	r3, r3, #5
+	strh	r3, [r4, #0]	@ movhi
+	muls	r3, r2, r3
+	lsls	r0, r3, #2
+	bl	ftl_malloc
+	ldr	r2, .L960+292
+	ldrh	r4, [r4, #0]
+	movs	r1, #1
+	mov	r3, r2
+	ldrh	r5, [r5, #0]
+	lsls	r4, r4, #2
+	str	r0, [r3, #28]!
+	mov	r0, r4
+	b	.L956
+.L961:
+	.align	2
+.L960:
+	.word	.LANCHOR151
+	.word	.LANCHOR152
+	.word	.LANCHOR167
+	.word	.LANCHOR70
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR133
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR159
+	.word	.LANCHOR160
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR95
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR165
+	.word	.LANCHOR166
+	.word	.LANCHOR168
+	.word	.LANCHOR169
+	.word	.LANCHOR88
+	.word	.LANCHOR146
+	.word	.LANCHOR147
+	.word	.LANCHOR170
+	.word	.LANCHOR171
+	.word	.LANCHOR172
+	.word	.LANCHOR148
+	.word	.LANCHOR150
+	.word	.LANCHOR143
+	.word	.LANCHOR145
+	.word	.LANCHOR173
+	.word	.LANCHOR174
+	.word	.LANCHOR175
+	.word	.LANCHOR73
+	.word	.LANCHOR93
+	.word	.LANCHOR132
+	.word	.LANCHOR96
+	.word	.LANCHOR176
+	.word	.LANCHOR177
+	.word	.LANCHOR129
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR74
+	.word	.LANCHOR131
+	.word	.LANCHOR180
+	.word	.LANCHOR181
+	.word	.LANCHOR56
+	.word	.LANCHOR130
+	.word	.LANCHOR182
+	.word	.LANCHOR139
+	.word	.LANCHOR80
+	.word	.LANCHOR183
+	.word	.LANCHOR94
+	.word	.LANCHOR99
+	.word	.LANCHOR122
+	.word	.LANCHOR118
+	.word	.LANCHOR117
+	.word	.LANCHOR86
+	.word	.LANCHOR184
+	.word	.LANCHOR185
+	.word	.LANCHOR186
+	.word	.LANCHOR82
+	.word	.LANCHOR124
+	.word	.LANCHOR83
+	.word	.LANCHOR123
+	.word	.LANCHOR112
+	.word	.LANCHOR60
+	.word	.LANCHOR119
+	.word	.LANCHOR97
+	.word	.LANCHOR90
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.word	.LANCHOR53
+	.word	.LANCHOR77
+	.word	.LANCHOR78
+.L957:
+	ldr	r6, [r2, #28]
+	adds	r1, r1, #1
+	adds	r6, r6, r0
+	adds	r0, r0, r4
+	str	r6, [r3, #4]!
+.L956:
+	cmp	r1, r5
+	bcc	.L957
+	ldr	r0, .L962
+	movs	r3, #0
+	mov	r2, r3
+	add	r0, r0, r1, lsl #2
+	b	.L958
+.L959:
+	adds	r4, r0, r3
+	adds	r1, r1, #1
+	adds	r3, r3, #4
+	str	r2, [r4, #28]
+.L958:
+	cmp	r1, #7
+	bls	.L959
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L963:
+	.align	2
+.L962:
+	.word	.LANCHOR89
+	.size	FtlMemInit, .-FtlMemInit
+	.section	.text.NandcInit,"ax",%progbits
+	.align	1
+	.global	NandcInit
+	.thumb
+	.thumb_func
+	.type	NandcInit, %function
+NandcInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r2, #1
+	ldr	r3, .L965
+	movs	r4, #0
+	ldr	r5, .L965+4
+	stmia	r3, {r0, r4}
+	str	r2, [r3, #12]
+	movs	r2, #2
+	str	r0, [r3, #8]
+	str	r2, [r3, #20]
+	movs	r2, #3
+	str	r0, [r3, #16]
+	str	r2, [r3, #28]
+	str	r0, [r3, #24]
+	str	r0, [r5, #0]
+	ldr	r2, .L965+8
+	ldr	r3, [r0, #0]
+	and	r3, r3, #253952
+	ubfx	r1, r3, #13, #1
+	str	r1, [r2, #0]
+	ldr	r2, .L965+12
+	and	r3, r3, #245760
+	ldr	r1, [r0, #352]
+	orr	r3, r3, #256
+	ubfx	r1, r1, #16, #4
+	str	r1, [r2, #0]
+	ldr	r1, [r0, #352]
+	ldr	r2, .L965+16
+	str	r1, [r2, #0]
+	str	r3, [r0, #0]
+	str	r4, [r0, #336]
+	movs	r0, #40
+	bl	NandcTimeCfg
+	ldr	r3, [r5, #0]
+	movw	r2, #8322
+	mov	r0, #36864
+	str	r2, [r3, #344]
+	ldr	r2, .L965+20
+	str	r2, [r3, #304]
+	bl	ftl_malloc
+	ldr	r3, .L965+24
+	str	r0, [r3, #0]
+	ldr	r3, .L965+28
+	str	r0, [r3, #0]
+	add	r0, r0, #32768
+	str	r4, [r3, #24]
+	str	r0, [r3, #4]
+	ldr	r3, .L965+32
+	str	r4, [r3, #0]
+	pop	{r3, r4, r5, pc}
+.L966:
+	.align	2
+.L965:
+	.word	.LANCHOR5
+	.word	.LANCHOR30
+	.word	.LANCHOR187
+	.word	.LANCHOR37
+	.word	.LANCHOR40
+	.word	1710593
+	.word	.LANCHOR188
+	.word	.LANCHOR38
+	.word	.LANCHOR39
+	.size	NandcInit, .-NandcInit
+	.section	.text.ftl_free,"ax",%progbits
+	.align	1
+	.global	ftl_free
+	.thumb
+	.thumb_func
+	.type	ftl_free, %function
+ftl_free:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	free
+	.size	ftl_free, .-ftl_free
+	.section	.text.StorageSysDataLoad,"ax",%progbits
+	.align	1
+	.global	StorageSysDataLoad
+	.thumb
+	.thumb_func
+	.type	StorageSysDataLoad, %function
+StorageSysDataLoad:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, lr}
+	mov	r2, #512
+	mov	r5, r0
+	mov	r4, r1
+	mov	r0, r1
+	movs	r1, #0
+	bl	memset
+	movs	r0, #16
+	add	r1, r5, #256
+	movs	r2, #1
+	mov	r3, r4
+	pop	{r4, r5, r6, lr}
+	b	FtlRead
+	.size	StorageSysDataLoad, .-StorageSysDataLoad
+	.section	.text.StorageSysDataStore,"ax",%progbits
+	.align	1
+	.global	StorageSysDataStore
+	.thumb
+	.thumb_func
+	.type	StorageSysDataStore, %function
+StorageSysDataStore:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r1
+	movs	r2, #1
+	add	r1, r0, #256
+	movs	r0, #16
+	b	FtlWrite
+	.size	StorageSysDataStore, .-StorageSysDataStore
+	.section	.text.FlashCs123Init,"ax",%progbits
+	.align	1
+	.global	FlashCs123Init
+	.thumb
+	.thumb_func
+	.type	FlashCs123Init, %function
+FlashCs123Init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	bx	lr
+	.size	FlashCs123Init, .-FlashCs123Init
+	.section	.text.rk_nand_de_init,"ax",%progbits
+	.align	1
+	.global	rk_nand_de_init
+	.thumb
+	.thumb_func
+	.type	rk_nand_de_init, %function
+rk_nand_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	b	FlashDeInit
+	.size	rk_nand_de_init, .-rk_nand_de_init
+	.section	.text.rk_ftl_get_capacity,"ax",%progbits
+	.align	1
+	.global	rk_ftl_get_capacity
+	.thumb
+	.thumb_func
+	.type	rk_ftl_get_capacity, %function
+rk_ftl_get_capacity:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r3, .L973
+	ldr	r0, [r3, #0]
+	bx	lr
+.L974:
+	.align	2
+.L973:
+	.word	.LANCHOR84
+	.size	rk_ftl_get_capacity, .-rk_ftl_get_capacity
+	.section	.text.rknand_print_hex,"ax",%progbits
+	.align	1
+	.global	rknand_print_hex
+	.thumb
+	.thumb_func
+	.type	rknand_print_hex, %function
+rknand_print_hex:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movs	r7, #0
+	mov	sl, r0
+	mov	r4, r1
+	mov	r5, r2
+	mov	r8, r3
+	mov	r6, r7
+	b	.L976
+.L982:
+	cbnz	r7, .L977
+	ldr	r0, .L984
+	mov	r1, sl
+	mov	r2, r6
+	bl	printf
+.L977:
+	cmp	r5, #4
+	ldr	r0, .L984+4
+	bne	.L978
+	ldr	r1, [r4, r6, lsl #2]
+	b	.L983
+.L978:
+	cmp	r5, #2
+	ite	eq
+	ldrsheq	r1, [r4, r6, lsl #1]
+	ldrbne	r1, [r4, r6]	@ zero_extendqisi2
+.L983:
+	adds	r7, r7, #1
+	bl	printf
+	cmp	r7, #15
+	bls	.L981
+	ldr	r0, .L984+8
+	movs	r7, #0
+	ldr	r1, .L984+12
+	bl	printf
+.L981:
+	adds	r6, r6, #1
+.L976:
+	cmp	r6, r8
+	bne	.L982
+	ldr	r0, .L984+8
+	ldr	r1, .L984+12
+	pop	{r3, r4, r5, r6, r7, r8, sl, lr}
+	b	printf
+.L985:
+	.align	2
+.L984:
+	.word	.LC12
+	.word	.LC13
+	.word	.LC10
+	.word	.LC14
+	.size	rknand_print_hex, .-rknand_print_hex
+	.section	.text.FlashReadSlc2KPages,"ax",%progbits
+	.align	1
+	.global	FlashReadSlc2KPages
+	.thumb
+	.thumb_func
+	.type	FlashReadSlc2KPages, %function
+FlashReadSlc2KPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1000
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	mov	r7, r1
+	ldrb	r8, [r3, #9]	@ zero_extendqisi2
+	str	r2, [sp, #12]
+	mov	r4, r0
+	movs	r6, #0
+	ldr	sl, .L1000+28
+	b	.L987
+.L996:
+	subs	r3, r7, r6
+	ldr	r1, [sp, #12]
+	add	r2, sp, #20
+	mov	r0, r4
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #16
+	bl	LogAddr2PhyAddr
+	ldr	r1, .L1000+4
+	ldr	r3, [sp, #16]
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bcc	.L988
+	mov	r3, #-1
+	str	r3, [r4, #0]
+	b	.L989
+.L988:
+	ldr	r2, .L1000+8
+	ldrb	r5, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	mov	r0, r5
+	bl	NandcFlashCs
+	ldr	r1, [sp, #20]
+	mov	r0, r5
+	bl	FlashReadCmd
+	mov	r0, r5
+	bl	NandcWaitFlashReady
+	ldr	r3, [r4, #12]
+	movs	r1, #0
+	mov	r2, r8
+	mov	r0, r5
+	str	r3, [sp, #0]
+	ldr	r3, [r4, #8]
+	bl	NandcXferData
+	ldr	r3, [sp, #20]
+	ldr	r1, [sl, #0]
+	adds	r1, r1, r3
+	mov	fp, r0
+	mov	r0, r5
+	bl	FlashReadCmd
+	ldr	r3, [r4, #8]
+	cbz	r3, .L990
+	add	r3, r3, #2048
+.L990:
+	ldr	r2, [r4, #12]
+	cbz	r2, .L991
+	adds	r2, r2, #8
+.L991:
+	movs	r1, #0
+	str	r2, [sp, #0]
+	mov	r0, r5
+	mov	r2, r8
+	bl	NandcXferData
+	mov	r3, r0
+	mov	r0, r5
+	str	r3, [sp, #8]
+	bl	NandcFlashDeCs
+	ldr	r2, .L1000+12
+	ldr	r3, [sp, #8]
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, fp
+	it	cc
+	movcc	r3, fp
+	add	r2, r2, r2, lsl #1
+	cmp	r3, r2, lsr #2
+	bls	.L992
+	cmp	r3, #-1
+	ite	eq
+	moveq	r3, #-1
+	movne	r3, #256
+.L992:
+	adds	r2, r3, #1
+	str	r3, [r4, #0]
+	beq	.L993
+	cmp	r3, #256
+	beq	.L993
+	movs	r3, #0
+	str	r3, [r4, #0]
+.L993:
+	ldr	r3, [r4, #12]
+	cbz	r3, .L994
+	ldr	r2, [r3, #8]
+	adds	r0, r2, #1
+	bne	.L994
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	it	ne
+	strne	r2, [r4, #0]
+.L994:
+	ldr	r3, [r4, #0]
+	adds	r1, r3, #1
+	bne	.L989
+	ldr	r2, .L1000+12
+	ldr	r1, [r4, #4]
+	ldr	r0, .L1000+16
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	bl	printf
+	ldr	r1, [r4, #8]
+	cbz	r1, .L995
+	ldr	r0, .L1000+20
+	movs	r2, #4
+	movs	r3, #8
+	bl	rknand_print_hex
+.L995:
+	ldr	r1, [r4, #12]
+	cbz	r1, .L989
+	movs	r2, #4
+	ldr	r0, .L1000+24
+	mov	r3, r2
+	bl	rknand_print_hex
+.L989:
+	adds	r6, r6, #1
+	adds	r4, r4, #36
+.L987:
+	cmp	r6, r7
+	bne	.L996
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1001:
+	.align	2
+.L1000:
+	.word	.LANCHOR18
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.word	.LANCHOR29
+	.word	.LC15
+	.word	.LC16
+	.word	.LC17
+	.word	.LANCHOR2
+	.size	FlashReadSlc2KPages, .-FlashReadSlc2KPages
+	.section	.text.FlashReadPages,"ax",%progbits
+	.align	1
+	.global	FlashReadPages
+	.thumb
+	.thumb_func
+	.type	FlashReadPages, %function
+FlashReadPages:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1050
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #48
+	ldrb	r3, [r3, #9]	@ zero_extendqisi2
+	str	r0, [sp, #12]
+	str	r1, [sp, #32]
+	str	r3, [sp, #28]
+	ldr	r3, .L1050+4
+	str	r2, [sp, #20]
+	ldrb	r4, [r3, #0]	@ zero_extendqisi2
+	str	r4, [sp, #36]
+	ldr	r4, .L1050+8
+	ldrb	r4, [r4, #0]	@ zero_extendqisi2
+	cmp	r4, #0
+	beq	.L1036
+	bl	FlashReadSlc2KPages
+	b	.L1004
+.L1035:
+	movs	r3, #36
+	ldr	r4, [sp, #12]
+	add	r2, sp, #44
+	ldr	r1, [sp, #20]
+	mul	r3, r3, fp
+	adds	r7, r4, r3
+	ldr	r4, [sp, #32]
+	mov	r0, r7
+	str	r3, [sp, #16]
+	rsb	r3, fp, r4
+	ldr	r5, [r7, #4]
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #40
+	bl	LogAddr2PhyAddr
+	ldr	r2, .L1050+12
+	ldr	r3, [sp, #40]
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	mov	r8, r0
+	bcc	.L1005
+	ldr	r1, [sp, #12]
+	mov	r3, #-1
+	ldr	r4, [sp, #16]
+	str	r3, [r1, r4]
+	b	.L1006
+.L1005:
+	ldr	r2, .L1050+16
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	ldr	r3, .L1050+20
+	mov	r0, r4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r8, #0
+	bl	NandcWaitFlashReady
+	ldr	r3, .L1050+24
+	ldr	r3, [r3, #0]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r0, #1
+	cmp	r3, #6
+	bhi	.L1008
+	ldr	r2, .L1050+28
+	cmp	r0, #7
+	add	r1, r2, r4
+	ldrb	r3, [r1, #12]	@ zero_extendqisi2
+	it	eq
+	ldrbeq	r3, [r1, #20]	@ zero_extendqisi2
+	ldr	r1, .L1050+32
+	ldrb	r1, [r1, r4]	@ zero_extendqisi2
+	cmp	r1, r3
+	beq	.L1008
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	mov	r0, r4
+	ldr	r2, .L1050+36
+	bl	HynixSetRRPara
+.L1008:
+	mov	r0, r4
+	and	r5, r5, #-2147483648
+	str	r5, [sp, #24]
+	bl	NandcFlashCs
+	ldr	r2, [sp, #20]
+	cmp	r2, #1
+	beq	.L1010
+	ldr	r5, [sp, #24]
+	cbz	r5, .L1011
+.L1010:
+	ldr	r3, .L1050+40
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1011
+	mov	r0, r4
+	bl	flash_enter_slc_mode
+	b	.L1012
+.L1011:
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L1012:
+	mov	r5, r7
+	movs	r6, #0
+	mov	r7, r8
+.L1049:
+	ldr	r1, [sp, #44]
+	adds	r2, r1, #1
+	bne	.L1014
+	cmp	r4, #255
+	beq	.L1038
+.L1014:
+	cbz	r7, .L1016
+	ldr	r3, .L1050+44
+	mov	r0, r4
+	ldr	r2, [r3, #0]
+	adds	r2, r1, r2
+	bl	FlashReadDpCmd
+	b	.L1017
+.L1016:
+	mov	r0, r4
+	bl	FlashReadCmd
+.L1017:
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	cbz	r7, .L1015
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	bl	FlashReadDpDataOutCmd
+	b	.L1015
+.L1038:
+	movs	r7, #0
+.L1015:
+	ldr	r3, [r5, #12]
+	movs	r1, #0
+	mov	r0, r4
+	ldr	r2, [sp, #28]
+	str	r3, [sp, #0]
+	ldr	r3, [r5, #8]
+	bl	NandcXferData
+	ldr	r1, .L1050+4
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	cbz	r3, .L1040
+	adds	r3, r0, #1
+	bne	.L1040
+	strb	r6, [r1, #0]
+	movs	r7, #0
+	b	.L1049
+.L1040:
+	mov	r8, r7
+	mov	r7, r5
+	mov	r6, r8
+	mov	r5, r0
+	cmp	r8, #0
+	beq	.L1019
+	ldr	r2, .L1050+44
+	mov	r0, r4
+	ldr	r3, [sp, #44]
+	ldr	r1, [r2, #0]
+	adds	r1, r1, r3
+	bl	FlashReadDpDataOutCmd
+	ldr	r1, [sp, #12]
+	movs	r2, #36
+	add	r3, fp, #1
+	mov	r0, r4
+	mla	r3, r2, r3, r1
+	movs	r1, #0
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #0]
+	ldr	r2, [sp, #28]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+	mov	sl, r0
+	cmp	r0, #-1
+	ite	ne
+	movne	r6, r8
+	moveq	r6, #0
+.L1019:
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	ldr	r3, [sp, #36]
+	ldr	r2, .L1050+4
+	adds	r0, r5, #1
+	strb	r3, [r2, #0]
+	bne	.L1023
+	ldr	r3, .L1050+48
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1021
+	ldr	r3, .L1050+52
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, #304]
+	movs	r3, #1
+	str	r3, [sp, #0]
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashDdrTunningRead
+	adds	r1, r0, #1
+	mov	r5, r0
+	beq	.L1022
+	ldr	r3, .L1050+56
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r0, r3, lsr #1
+	bls	.L1043
+.L1022:
+	ubfx	r0, r6, #8, #8
+	bl	NandcSetDdrPara
+	adds	r2, r5, #1
+	bne	.L1043
+.L1021:
+	ldr	r3, .L1050+60
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	ldr	r2, [r7, #8]
+	ldr	r6, [r3, #0]
+	ldr	r3, [r7, #12]
+	cmp	r6, #0
+	beq	.L1024
+	blx	r6
+	adds	r3, r0, #1
+	mov	r5, r0
+	bne	.L1045
+	ldr	r3, .L1050+24
+	ldr	r3, [r3, #0]
+	ldrb	r3, [r3, #19]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	cmp	r3, #6
+	bhi	.L1026
+	ldr	r2, .L1050+28
+	mov	r0, r4
+	movs	r3, #0
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	adds	r2, r2, #4
+	bl	HynixSetRRPara
+.L1026:
+	ldr	r1, [sp, #44]
+	mov	r0, r4
+	ldr	r2, [r7, #8]
+	ldr	r3, [r7, #12]
+	bl	FlashReadRawPage
+	ldr	r3, .L1050+56
+	ldr	r1, [r7, #4]
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	mov	r5, r0
+	ldr	r0, .L1050+64
+	mov	r3, r5
+	bl	printf
+	adds	r6, r5, #1
+	bne	.L1045
+	ldr	r3, .L1050+40
+	ldrb	r6, [r3, #0]	@ zero_extendqisi2
+	cmp	r6, #0
+	beq	.L1025
+	ldr	r1, [sp, #20]
+	mov	r0, r4
+	cmp	r1, #1
+	beq	.L1027
+	ldr	r2, [sp, #24]
+	cbz	r2, .L1028
+.L1027:
+	bl	flash_enter_slc_mode
+	b	.L1029
+.L1028:
+	bl	flash_exit_slc_mode
+.L1029:
+	ldr	r3, .L1050+60
+	mov	r0, r4
+	ldr	r1, [sp, #44]
+	ldr	r2, [r7, #8]
+	ldr	r5, [r3, #0]
+	ldr	r3, [r7, #12]
+	blx	r5
+	mov	r5, r0
+	b	.L1045
+.L1024:
+	bl	FlashReadRawPage
+	mov	r5, r0
+	b	.L1025
+.L1051:
+	.align	2
+.L1050:
+	.word	.LANCHOR18
+	.word	.LANCHOR4
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.word	.LANCHOR189
+	.word	.LANCHOR23
+	.word	.LANCHOR31
+	.word	.LANCHOR32
+	.word	.LANCHOR31+4
+	.word	.LANCHOR7
+	.word	.LANCHOR2
+	.word	.LANCHOR35
+	.word	.LANCHOR30
+	.word	.LANCHOR29
+	.word	.LANCHOR51
+	.word	.LC18
+.L1043:
+	movs	r6, #0
+.L1023:
+	ldr	r3, .L1052
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	r5, r3, lsr #2
+	bls	.L1025
+	ldr	r3, .L1052+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	it	eq
+	moveq	r5, #256
+	b	.L1025
+.L1045:
+	movs	r6, #0
+.L1025:
+	ldr	r1, [sp, #12]
+	adds	r0, r5, #1
+	ldr	r3, [sp, #16]
+	str	r5, [r1, r3]
+	beq	.L1030
+	cmp	r5, #256
+	beq	.L1030
+	ldr	r2, [sp, #16]
+	movs	r3, #0
+	str	r3, [r1, r2]
+.L1030:
+	ldr	r1, [sp, #16]
+	ldr	r2, [sp, #12]
+	ldr	r3, [r2, r1]
+	adds	r1, r3, #1
+	bne	.L1031
+	ldr	r2, .L1052
+	ldr	r1, [r7, #4]
+	ldr	r0, .L1052+8
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	bl	printf
+	ldr	r1, [r7, #12]
+	cbz	r1, .L1031
+	movs	r2, #4
+	ldr	r0, .L1052+12
+	mov	r3, r2
+	bl	rknand_print_hex
+.L1031:
+	cbz	r6, .L1032
+	ldr	r3, .L1052
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	add	r3, r3, r3, lsl #1
+	cmp	sl, r3, lsr #2
+	bls	.L1033
+	ldr	r3, .L1052+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	it	eq
+	moveq	sl, #256
+.L1033:
+	ldr	r1, [sp, #12]
+	movs	r2, #36
+	add	r3, fp, #1
+	muls	r3, r2, r3
+	cmp	sl, #-1
+	str	sl, [r1, r3]
+	beq	.L1032
+	cmp	sl, #256
+	beq	.L1032
+	movs	r2, #0
+	str	r2, [r1, r3]
+.L1032:
+	ldr	r2, [sp, #20]
+	add	fp, fp, r6
+	cmp	r2, #1
+	beq	.L1034
+	ldr	r3, [sp, #24]
+	cbz	r3, .L1006
+.L1034:
+	ldr	r3, .L1052+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1006
+	mov	r0, r4
+	bl	flash_exit_slc_mode
+.L1006:
+	add	fp, fp, #1
+	b	.L1003
+.L1036:
+	mov	sl, r4
+	mov	fp, r4
+.L1003:
+	ldr	r4, [sp, #32]
+	cmp	fp, r4
+	bcc	.L1035
+	movs	r0, #0
+.L1004:
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1053:
+	.align	2
+.L1052:
+	.word	.LANCHOR29
+	.word	.LANCHOR51
+	.word	.LC15
+	.word	.LC17
+	.word	.LANCHOR7
+	.size	FlashReadPages, .-FlashReadPages
+	.section	.text.FtlGcScanTempBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcScanTempBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcScanTempBlk, %function
+FtlGcScanTempBlk:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1078
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r5, r0
+	ldrh	r4, [r3, #0]
+	movw	r3, #65535
+	sub	sp, sp, #24
+	cmp	r4, r3
+	beq	.L1072
+	cbnz	r4, .L1055
+	b	.L1056
+.L1072:
+	movs	r4, #0
+.L1055:
+	ldr	r3, .L1078+4
+	ldrh	r3, [r3, #0]
+	cmp	r1, r3
+	bne	.L1057
+.L1056:
+	bl	FtlGcPageVarInit
+.L1057:
+	mov	sl, #-1
+	movw	r8, #65535
+.L1069:
+	ldrh	r3, [r5, #0]
+	movs	r2, #0
+	strb	r2, [r5, #8]
+	cmp	r3, r8
+	beq	.L1058
+.L1059:
+	mov	fp, sl
+.L1076:
+	ldr	r3, .L1078+8
+	ldr	r2, .L1078+12
+	ldr	r0, .L1078+16
+	ldr	lr, [r3, #0]
+	ldr	r3, .L1078+20
+	ldr	ip, [r2, #0]
+	mov	r2, r5
+	ldrh	sl, [r0, #0]
+	ldrh	r7, [r3, #0]
+	movs	r3, #0
+	mov	r6, r3
+	str	ip, [sp, #8]
+	str	r5, [sp, #4]
+	b	.L1060
+.L1062:
+	ldrh	r0, [r2, #16]
+	cmp	r0, r8
+	beq	.L1061
+	ldr	r5, [sp, #8]
+	mov	ip, #36
+	orr	r0, r4, r0, lsl #10
+	mla	r1, ip, r6, r5
+	str	r0, [r1, #4]
+	movs	r0, #0
+	str	r0, [r1, #8]
+	mul	r0, r7, r6
+	adds	r6, r6, #1
+	uxth	r6, r6
+	bic	r0, r0, #3
+	add	r0, lr, r0
+	str	r0, [r1, #12]
+.L1061:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	uxth	r3, r3
+.L1060:
+	cmp	r3, sl
+	bne	.L1062
+	ldr	r2, .L1078+12
+	mov	r1, r6
+	movs	r7, #0
+	ldr	r5, [sp, #4]
+	mov	sl, r7
+	ldr	r0, [r2, #0]
+	movs	r2, #0
+	bl	FlashReadPages
+	b	.L1063
+.L1070:
+	ldr	r0, .L1078+12
+	ldr	r3, [r0, #0]
+	adds	r2, r3, r7
+	ldr	r1, [r2, #4]
+	str	r2, [sp, #20]
+	ubfx	r0, r1, #10, #16
+	str	r3, [sp, #16]
+	str	r1, [sp, #12]
+	bl	P2V_plane
+	ldr	r3, [sp, #16]
+	ldr	r1, [sp, #12]
+	ldr	r2, [sp, #20]
+	ldr	r3, [r3, r7]
+	cbnz	r3, .L1064
+	ldr	r3, [r2, #12]
+	adds	r7, r7, #36
+	ldrh	r2, [r3, #0]
+	cmp	r2, r8
+	bne	.L1065
+	ldr	r3, .L1078+24
+	movs	r1, #1
+	mov	r2, r0
+	mov	sl, fp
+	str	r1, [r3, #0]
+	b	.L1058
+.L1065:
+	add	sl, sl, #1
+	ldr	r0, [r3, #12]
+	ldr	r2, [r3, #8]
+	bl	FtlGcUpdatePage
+	uxth	sl, sl
+	b	.L1063
+.L1064:
+	ldr	r2, .L1078+28
+	mov	sl, fp
+	ldr	r2, [r2, #0]
+	cbnz	r2, .L1066
+	ldr	r2, .L1078+32
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1067
+.L1066:
+	ldr	r2, .L1078+36
+	ldrh	r0, [r5, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r2, [r2, r0, lsl #1]
+	cmp	r2, #119
+	bls	.L1074
+.L1067:
+	cmp	r3, #-1
+	it	eq
+	moveq	sl, r1
+	b	.L1068
+.L1074:
+	mov	sl, r1
+.L1068:
+	ldr	r3, .L1078+40
+	movs	r4, #0
+	ldrh	r2, [r5, #0]
+	ldr	r3, [r3, #0]
+	strh	r4, [r3, r2, lsl #1]	@ movhi
+	ldrh	r0, [r5, #0]
+	bl	INSERT_FREE_LIST
+	strh	r8, [r5, #0]	@ movhi
+	bl	FtlGcPageVarInit
+	b	.L1069
+.L1063:
+	cmp	sl, r6
+	bne	.L1070
+	ldr	r3, .L1078+4
+	adds	r4, r4, #1
+	uxth	r4, r4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r4
+	bhi	.L1076
+	mov	sl, fp
+	movs	r2, #0
+.L1058:
+	ldr	r3, .L1078
+	mov	r0, r5
+	movw	r1, #65535
+	strh	r4, [r5, #2]	@ movhi
+	strb	r2, [r5, #6]
+	strh	r1, [r3, #0]	@ movhi
+	mov	r1, r4
+	bl	ftl_sb_update_avl_pages
+	mov	r0, sl
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1079:
+	.align	2
+.L1078:
+	.word	.LANCHOR190
+	.word	.LANCHOR68
+	.word	.LANCHOR130
+	.word	.LANCHOR173
+	.word	.LANCHOR53
+	.word	.LANCHOR74
+	.word	.LANCHOR137
+	.word	.LANCHOR126
+	.word	.LANCHOR7
+	.word	.LANCHOR94
+	.word	.LANCHOR99
+	.size	FtlGcScanTempBlk, .-FtlGcScanTempBlk
+	.section	.text.FtlScanSysBlk,"ax",%progbits
+	.align	1
+	.global	FtlScanSysBlk
+	.thumb
+	.thumb_func
+	.type	FtlScanSysBlk, %function
+FtlScanSysBlk:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1141
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r4, #0
+	ldr	r5, .L1141+4
+	sub	sp, sp, #40
+	strh	r4, [r3, #0]	@ movhi
+	mov	r1, r4
+	ldr	r3, .L1141+8
+	ldr	r2, [r5, #0]
+	ldr	r7, .L1141+12
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1141+16
+	lsls	r2, r2, #2
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r2, [r5, #0]
+	ldr	r3, .L1141+20
+	mov	r1, r4
+	ldr	r5, .L1141+24
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldr	r3, .L1141+28
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #2
+	bl	memset
+	ldr	r3, .L1141+32
+	ldrh	r2, [r5, #0]
+	mov	r1, r4
+	ldr	r0, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	ldr	r0, .L1141+36
+	movs	r1, #255
+	movs	r2, #12
+	bl	memset
+	ldr	r3, .L1141+40
+	ldrh	r3, [r3, #0]
+	str	r3, [sp, #24]
+	b	.L1081
+.L1083:
+	ldrb	r0, [fp, r4]	@ zero_extendqisi2
+	ldr	r1, [sp, #24]
+	str	r3, [sp, #4]
+	bl	V2P_block
+	str	r0, [sp, #8]
+	bl	FtlBbmIsBadBlock
+	ldr	r2, [sp, #8]
+	ldr	r3, [sp, #4]
+	cbnz	r0, .L1082
+	ldr	r1, [r7, #0]
+	lsls	r2, r2, #10
+	ldr	r0, [r6, #0]
+	mla	r1, sl, r3, r1
+	str	r2, [r1, #4]
+	ldr	r2, [r8, #0]
+	str	r2, [r1, #8]
+	ldrh	r2, [r5, #0]
+	muls	r2, r3, r2
+	adds	r3, r3, #1
+	bic	r2, r2, #3
+	adds	r2, r0, r2
+	str	r2, [r1, #12]
+	uxth	r3, r3
+.L1082:
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1118
+.L1130:
+	movs	r3, #0
+	ldr	fp, .L1141+76
+	ldr	r8, .L1141+80
+	mov	r4, r3
+	ldr	r6, .L1141+44
+	mov	sl, #36
+	ldr	r5, .L1141+48
+	str	r3, [sp, #20]
+.L1118:
+	ldr	r1, .L1141+52
+	ldrh	r2, [r1, #0]
+	cmp	r2, r4
+	bhi	.L1083
+	str	r3, [sp, #20]
+	cmp	r3, #0
+	beq	.L1084
+	ldr	r0, [r7, #0]
+	mov	r1, r3
+	movs	r2, #1
+	movs	r6, #0
+	bl	FlashReadPages
+	str	r6, [sp, #32]
+.L1117:
+	ldr	r3, [r7, #0]
+	adds	r2, r3, r6
+	ldr	r3, [r3, r6]
+	ldr	r5, [r2, #4]
+	adds	r3, r3, #1
+	ldr	r4, [r2, #12]
+	ubfx	r5, r5, #10, #16
+	bne	.L1085
+	mov	r8, #16
+.L1087:
+	ldr	r0, [r7, #0]
+	movs	r1, #1
+	mov	r2, r1
+	adds	r0, r0, r6
+	ldr	r3, [r0, #4]
+	adds	r3, r3, #1
+	str	r3, [r0, #4]
+	bl	FlashReadPages
+	ldrh	r3, [r4, #0]
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1086
+	ldr	r1, .L1141+12
+	mov	r2, #-1
+	ldr	r3, [r1, #0]
+	str	r2, [r3, r6]
+	b	.L1085
+.L1086:
+	ldr	r3, [r7, #0]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	bne	.L1085
+	add	r8, r8, #-1
+	uxth	r8, r8
+	cmp	r8, #0
+	bne	.L1087
+.L1085:
+	ldr	r3, [r7, #0]
+	ldr	r3, [r3, r6]
+	adds	r3, r3, #1
+	beq	.L1088
+	ldr	r2, .L1141+56
+	ldr	r3, [r4, #4]
+	ldr	r1, [r2, #0]
+	adds	r0, r1, #1
+	beq	.L1089
+	cmp	r1, r3
+	bhi	.L1090
+.L1089:
+	adds	r1, r3, #1
+	beq	.L1090
+	adds	r3, r3, #1
+	str	r3, [r2, #0]
+.L1090:
+	ldrh	r3, [r4, #0]
+	movw	r2, #61604
+	cmp	r3, r2
+	beq	.L1093
+	bhi	.L1096
+	movw	r2, #61574
+	cmp	r3, r2
+	bne	.L1091
+	b	.L1139
+.L1096:
+	movw	r2, #61634
+	cmp	r3, r2
+	beq	.L1094
+	movw	r2, #65535
+	cmp	r3, r2
+	bne	.L1091
+	b	.L1140
+.L1094:
+	ldr	r3, .L1141
+	ldr	r8, .L1141+4
+	ldrh	r2, [r3, #0]
+	ldr	r3, [r8, #0]
+	cmp	r2, r3
+	bls	.L1097
+	ldr	r1, .L1141+60
+	movw	r2, #1183
+	ldr	r0, .L1141+64
+	bl	printf
+	ldr	r0, .L1141+68
+	ldr	r1, .L1141+72
+	bl	printf
+.L1097:
+	ldr	r3, [r8, #0]
+	mov	ip, #0
+	ldr	r1, .L1141
+	uxth	r2, r3
+	str	r3, [sp, #12]
+	subs	r3, r2, #1
+	ldrh	r0, [r1, #0]
+	ldr	r1, .L1141+16
+	uxth	r3, r3
+	subs	r2, r2, r0
+	subs	r2, r2, #1
+	ldr	r1, [r1, #0]
+	sxth	fp, r3
+	sxth	r2, r2
+	str	r2, [sp, #36]
+	add	sl, r1, fp, lsl #2
+	str	sl, [sp, #16]
+	mov	sl, r5
+	b	.L1098
+.L1104:
+	rsb	r2, ip, fp
+	str	r2, [sp, #28]
+	ldr	r2, [sp, #16]
+	add	ip, ip, #1
+	ldr	r8, [r4, #4]
+	subs	r5, r2, #4
+	str	r5, [sp, #16]
+	ldr	r5, [r2, #0]
+	cmp	r8, r5
+	bls	.L1099
+	ldr	ip, [r1, #0]
+	mov	r5, sl
+	str	r2, [sp, #16]
+	cmp	ip, #0
+	bne	.L1100
+	ldr	r2, [sp, #12]
+	cmp	r0, r2
+	beq	.L1100
+	add	ip, r0, #1
+	ldr	r0, .L1141
+	strh	ip, [r0, #0]	@ movhi
+.L1100:
+	ldr	r0, .L1141+20
+	sxth	sl, r3
+	mov	fp, r3
+	str	sl, [sp, #12]
+	mov	r3, r1
+	ldr	ip, [r0, #0]
+	movs	r0, #0
+	mov	r8, ip
+	b	.L1101
+.L1102:
+	ldr	sl, [r1, #4]!
+	adds	r0, r0, #1
+	uxth	r0, r0
+	str	sl, [r3], #4
+	ldrh	sl, [ip, #2]!
+	strh	sl, [r8], #2	@ movhi
+.L1101:
+	ldr	r2, [sp, #12]
+	sxth	sl, r0
+	cmp	sl, r2
+	bne	.L1102
+	ldr	r1, [r4, #4]
+	mov	r3, fp
+	ldr	r2, [sp, #16]
+	ldr	sl, [sp, #28]
+	str	r1, [r2, #0]
+	ldr	r2, .L1141+20
+	ldr	r2, [r2, #0]
+	strh	r5, [r2, sl, lsl #1]	@ movhi
+	b	.L1103
+.L1099:
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L1098:
+	ldr	r5, [sp, #36]
+	sxth	r2, r3
+	cmp	r2, r5
+	bgt	.L1104
+	mov	r5, sl
+.L1103:
+	sxth	r3, r3
+	cmp	r3, #0
+	blt	.L1091
+	ldr	r2, .L1141
+	ldr	r0, .L1141+4
+	ldrh	r1, [r2, #0]
+	ldr	r0, [r0, #0]
+	subs	r0, r0, r1
+	subs	r0, r0, #1
+	sxth	r0, r0
+	cmp	r3, r0
+	bgt	.L1091
+	adds	r1, r1, #1
+	strh	r1, [r2, #0]	@ movhi
+	ldr	r2, .L1141+16
+	ldr	r1, [r4, #4]
+	ldr	r2, [r2, #0]
+	str	r1, [r2, r3, lsl #2]
+	ldr	r2, .L1141+20
+	b	.L1137
+.L1142:
+	.align	2
+.L1141:
+	.word	.LANCHOR121
+	.word	.LANCHOR80
+	.word	.LANCHOR85
+	.word	.LANCHOR173
+	.word	.LANCHOR123
+	.word	.LANCHOR122
+	.word	.LANCHOR77
+	.word	.LANCHOR185
+	.word	.LANCHOR86
+	.word	.LANCHOR191
+	.word	.LANCHOR55
+	.word	.LANCHOR130
+	.word	.LANCHOR74
+	.word	.LANCHOR53
+	.word	.LANCHOR153
+	.word	.LANCHOR192
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR62
+	.word	.LANCHOR129
+.L1139:
+	ldr	r3, .L1143
+	ldr	r8, .L1143+28
+	ldrh	r2, [r3, #0]
+	ldrh	r3, [r8, #0]
+	cmp	r2, r3
+	bls	.L1105
+	ldr	r1, .L1143+4
+	movw	r2, #1230
+	ldr	r0, .L1143+8
+	bl	printf
+	ldr	r0, .L1143+12
+	ldr	r1, .L1143+16
+	bl	printf
+.L1105:
+	ldr	r1, .L1143
+	mov	ip, #0
+	ldrh	r8, [r8, #0]
+	ldrh	r0, [r1, #0]
+	add	r2, r8, #-1
+	str	r8, [sp, #16]
+	uxth	r3, r2
+	subs	r2, r2, r0
+	str	r2, [sp, #36]
+	ldr	r2, .L1143+20
+	sxth	fp, r3
+	ldr	r1, [r2, #0]
+	add	sl, r1, fp, lsl #2
+	str	sl, [sp, #28]
+	mov	sl, r5
+	b	.L1106
+.L1112:
+	ldr	r2, [sp, #28]
+	add	ip, ip, #1
+	ldr	r8, [r4, #4]
+	subs	r5, r2, #4
+	str	r5, [sp, #28]
+	ldr	r5, [r2, #0]
+	cmp	r8, r5
+	bls	.L1107
+	ldr	ip, [r1, #0]
+	mov	r5, sl
+	cmp	ip, #0
+	bne	.L1108
+	ldr	sl, [sp, #16]
+	cmp	r0, sl
+	beq	.L1108
+	add	ip, r0, #1
+	ldr	r0, .L1143
+	strh	ip, [r0, #0]	@ movhi
+.L1108:
+	ldr	r0, .L1143+24
+	sxth	sl, r3
+	mov	fp, r3
+	str	sl, [sp, #16]
+	str	r2, [sp, #28]
+	mov	r3, r1
+	ldr	ip, [r0, #0]
+	movs	r0, #0
+	mov	r8, ip
+	b	.L1109
+.L1110:
+	ldr	sl, [r1, #4]!
+	adds	r0, r0, #1
+	uxth	r0, r0
+	str	sl, [r3], #4
+	ldrh	sl, [r8, #2]!
+	strh	sl, [ip], #2	@ movhi
+.L1109:
+	ldr	r2, [sp, #16]
+	sxth	sl, r0
+	cmp	sl, r2
+	bne	.L1110
+	ldr	r2, [sp, #28]
+	mov	r3, fp
+	ldr	r1, [r4, #4]
+	ldr	sl, [sp, #12]
+	str	r1, [r2, #0]
+	ldr	r2, .L1143+24
+	ldr	r2, [r2, #0]
+	strh	r5, [r2, sl, lsl #1]	@ movhi
+	b	.L1111
+.L1107:
+	subs	r3, r3, #1
+	uxth	r3, r3
+.L1106:
+	ldr	r5, [sp, #36]
+	rsb	r2, ip, fp
+	str	r2, [sp, #12]
+	cmp	r2, r5
+	bgt	.L1112
+	mov	r5, sl
+.L1111:
+	sxth	r3, r3
+	cmp	r3, #0
+	blt	.L1091
+	ldr	r0, .L1143+28
+	ldr	r2, .L1143
+	ldrh	r0, [r0, #0]
+	ldrh	r1, [r2, #0]
+	subs	r0, r0, #1
+	subs	r0, r0, r1
+	sxth	r0, r0
+	cmp	r3, r0
+	bgt	.L1091
+	adds	r1, r1, #1
+	strh	r1, [r2, #0]	@ movhi
+	ldr	r2, .L1143+20
+	ldr	r1, [r4, #4]
+	ldr	r2, [r2, #0]
+	str	r1, [r2, r3, lsl #2]
+	ldr	r2, .L1143+24
+.L1137:
+	ldr	r2, [r2, #0]
+	strh	r5, [r2, r3, lsl #1]	@ movhi
+	b	.L1091
+.L1093:
+	ldr	r8, .L1143+32
+	movw	sl, #65535
+	ldrh	r3, [r8, #0]
+	cmp	r3, sl
+	bne	.L1113
+	ldr	r3, [r4, #4]
+	strh	r5, [r8, #0]	@ movhi
+	str	r3, [r8, #8]
+	b	.L1091
+.L1113:
+	ldrh	r0, [r8, #4]
+	movw	ip, #65535
+	cmp	r0, ip
+	beq	.L1114
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L1114:
+	ldr	r2, [r4, #4]
+	ldr	r1, [r8, #8]
+	ldr	r3, .L1143+32
+	cmp	r1, r2
+	bcs	.L1115
+	ldrh	r1, [r3, #0]
+	str	r2, [r3, #8]
+	strh	r5, [r3, #0]	@ movhi
+	strh	r1, [r3, #4]	@ movhi
+	b	.L1091
+.L1115:
+	strh	r5, [r3, #4]	@ movhi
+	b	.L1091
+.L1140:
+	mov	r0, r5
+	b	.L1138
+.L1088:
+	ldr	r1, .L1143+36
+	mov	r0, r5
+	ldrb	r3, [r1, #0]	@ zero_extendqisi2
+	cbz	r3, .L1116
+.L1138:
+	movs	r1, #0
+	b	.L1136
+.L1116:
+	movs	r1, #1
+.L1136:
+	bl	FtlFreeSysBlkQueueIn
+.L1091:
+	ldr	r5, [sp, #32]
+	adds	r6, r6, #36
+	adds	r3, r5, #1
+	ldr	r5, [sp, #20]
+	uxth	r3, r3
+	str	r3, [sp, #32]
+	cmp	r3, r5
+	bne	.L1117
+.L1084:
+	ldr	sl, [sp, #24]
+	add	r3, sl, #1
+	uxth	r3, r3
+	str	r3, [sp, #24]
+.L1081:
+	ldr	r3, .L1143+40
+	ldr	ip, [sp, #24]
+	ldrh	r3, [r3, #0]
+	cmp	r3, ip
+	bhi	.L1130
+	ldr	r3, .L1143+44
+	ldr	r1, [r3, #0]
+	ldrh	r3, [r1, #0]
+	cbnz	r3, .L1119
+	ldr	r2, .L1143+48
+	ldrh	r2, [r2, #0]
+	cbz	r2, .L1119
+	ldr	r2, .L1143+52
+	ldr	r4, [r2, #0]
+	mov	r2, r1
+	b	.L1120
+.L1123:
+	ldrh	r5, [r2], #2
+	adds	r3, r3, #1
+	cbz	r5, .L1120
+	ldr	r3, .L1143+56
+	sxth	r0, r0
+	ldr	ip, .L1143+52
+	mov	sl, r1
+	add	r6, r1, r0, lsl #1
+	ldr	r5, [r3, #0]
+	movs	r3, #0
+	mov	r2, r3
+	mov	r4, r3
+	add	r7, r5, r0, lsl #2
+	mov	fp, r3
+	b	.L1121
+.L1122:
+	ldrh	r1, [r6, r2]
+	strh	r1, [sl, r2]	@ movhi
+	ldr	r1, [r7, r3]
+	str	r1, [r5, r3]
+	adds	r3, r3, #4
+	strh	fp, [r6, r2]	@ movhi
+	adds	r2, r2, #2
+.L1121:
+	ldr	r1, [ip, #0]
+	add	r8, r4, r0
+	adds	r4, r4, #1
+	cmp	r8, r1
+	bcc	.L1122
+	b	.L1119
+.L1120:
+	cmp	r3, r4
+	uxth	r0, r3
+	bne	.L1123
+.L1119:
+	ldr	r3, .L1143+24
+	ldr	r0, [r3, #0]
+	ldrh	r3, [r0, #0]
+	cmp	r3, #0
+	bne	.L1124
+	ldr	r2, .L1143
+	ldrh	r2, [r2, #0]
+	cmp	r2, #0
+	beq	.L1124
+	ldr	r2, .L1143+28
+	ldrh	r4, [r2, #0]
+	mov	r2, r0
+	b	.L1125
+.L1128:
+	ldrh	r5, [r2], #2
+	adds	r3, r3, #1
+	cmp	r5, #0
+	beq	.L1125
+	ldr	r3, .L1143+20
+	sxth	r1, r1
+	subs	r6, r1, r6
+	add	r7, r0, r1, lsl #1
+	ldr	r5, [r3, #0]
+	movs	r3, #0
+	mov	r2, r3
+	mov	r4, r3
+	add	r0, r0, r6, lsl #1
+	add	ip, r5, r1, lsl #2
+	b	.L1126
+.L1127:
+	ldrh	r8, [r7, r2]
+	ldr	sl, [ip, r3]
+	strh	r8, [r0, r2]	@ movhi
+	add	r8, r5, r6, lsl #2
+	str	sl, [r8, r3]
+	mov	r8, #0
+	adds	r3, r3, #4
+	strh	r8, [r7, r2]	@ movhi
+	adds	r2, r2, #2
+.L1126:
+	ldr	r8, .L1143+28
+	add	sl, r4, r1
+	adds	r4, r4, #1
+	ldrh	r8, [r8, #0]
+	cmp	sl, r8
+	blt	.L1127
+	b	.L1124
+.L1144:
+	.align	2
+.L1143:
+	.word	.LANCHOR85
+	.word	.LANCHOR192
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR185
+	.word	.LANCHOR86
+	.word	.LANCHOR77
+	.word	.LANCHOR191
+	.word	.LANCHOR7
+	.word	.LANCHOR56
+	.word	.LANCHOR122
+	.word	.LANCHOR121
+	.word	.LANCHOR80
+	.word	.LANCHOR123
+.L1125:
+	cmp	r3, r4
+	uxth	r1, r3
+	mov	r6, r3
+	blt	.L1128
+.L1124:
+	ldr	r3, .L1145
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1145+4
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	bls	.L1129
+	ldr	r1, .L1145+8
+	movw	r2, #1364
+	ldr	r0, .L1145+12
+	bl	printf
+	ldr	r0, .L1145+16
+	ldr	r1, .L1145+20
+	bl	printf
+.L1129:
+	movs	r0, #0
+	add	sp, sp, #40
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1146:
+	.align	2
+.L1145:
+	.word	.LANCHOR121
+	.word	.LANCHOR80
+	.word	.LANCHOR192
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlScanSysBlk, .-FtlScanSysBlk
+	.section	.text.FtlVendorPartRead,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartRead
+	.thumb
+	.thumb_func
+	.type	FtlVendorPartRead, %function
+FtlVendorPartRead:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1157
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r8, r2
+	ldrh	sl, [r3, #0]
+	adds	r2, r1, r0
+	ldr	r3, .L1157+4
+	sub	sp, sp, #48
+	mov	r6, r0
+	mov	r5, r1
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bhi	.L1155
+	lsr	sl, r0, sl
+	movs	r7, #0
+	lsl	sl, sl, #2
+	b	.L1149
+.L1154:
+	ldr	r1, .L1157+8
+	mov	r0, r6
+	ldr	r2, .L1157+12
+	ldr	r3, [r1, #0]
+	ldrh	r4, [r2, #0]
+	mov	r1, r4
+	ldr	fp, [r3, sl]
+	bl	__aeabi_uidivmod
+	uxth	r3, r1
+	subs	r4, r4, r3
+	uxth	r4, r4
+	cmp	r4, r5
+	it	hi
+	uxthhi	r4, r5
+	cmp	fp, #0
+	beq	.L1151
+	ldr	r1, .L1157+16
+	add	r0, sp, #12
+	str	fp, [sp, #16]
+	ldr	r2, [r1, #0]
+	movs	r1, #1
+	str	r3, [sp, #4]
+	str	r2, [sp, #20]
+	movs	r2, #0
+	str	r2, [sp, #24]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	mov	r0, r8
+	cmp	r2, #-1
+	it	eq
+	moveq	r7, #-1
+	ldr	r2, .L1157+16
+	ldr	r1, [r2, #0]
+	lsls	r2, r4, #9
+	add	r1, r1, r3, lsl #9
+	bl	memcpy
+	b	.L1153
+.L1151:
+	mov	r0, r8
+	mov	r1, fp
+	lsls	r2, r4, #9
+	bl	memset
+.L1153:
+	subs	r5, r5, r4
+	adds	r6, r6, r4
+	add	r8, r8, r4, lsl #9
+	add	sl, sl, #4
+.L1149:
+	cmp	r5, #0
+	bne	.L1154
+	b	.L1148
+.L1155:
+	mov	r7, #-1
+.L1148:
+	mov	r0, r7
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1158:
+	.align	2
+.L1157:
+	.word	.LANCHOR72
+	.word	.LANCHOR65
+	.word	.LANCHOR186
+	.word	.LANCHOR71
+	.word	.LANCHOR177
+	.size	FtlVendorPartRead, .-FtlVendorPartRead
+	.section	.text.Ftl_load_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_load_ext_data
+	.thumb
+	.thumb_func
+	.type	Ftl_load_ext_data, %function
+Ftl_load_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #0
+	ldr	r4, .L1163
+	movs	r1, #1
+	ldr	r5, .L1163+4
+	mov	r2, r4
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	cmp	r3, r5
+	beq	.L1160
+	mov	r0, r4
+	movs	r1, #0
+	mov	r2, #512
+	bl	memset
+	str	r5, [r4, #0]
+.L1160:
+	ldr	r2, [r4, #0]
+	ldr	r3, .L1163
+	cmp	r2, r5
+	bne	.L1161
+	ldr	r1, [r3, #88]
+	ldr	r2, .L1163+8
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #92]
+	ldr	r2, .L1163+12
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #8]
+	ldr	r2, .L1163+16
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #12]
+	ldr	r2, .L1163+20
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #16]
+	ldr	r2, .L1163+24
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #20]
+	ldr	r2, .L1163+28
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #28]
+	ldr	r2, .L1163+32
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #32]
+	ldr	r2, .L1163+36
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #36]
+	ldr	r2, .L1163+40
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #40]
+	ldr	r2, .L1163+44
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #44]
+	ldr	r2, .L1163+48
+	str	r1, [r2, #0]
+	ldr	r1, [r3, #48]
+	ldr	r2, .L1163+52
+	str	r1, [r2, #0]
+	ldr	r2, [r3, #60]
+	ldr	r3, .L1163+56
+	str	r2, [r3, #0]
+.L1161:
+	ldr	r3, .L1163+60
+	movs	r2, #0
+	str	r2, [r3, #0]
+	ldr	r3, .L1163
+	ldr	r2, [r3, #68]
+	ldr	r3, .L1163+64
+	cmp	r2, r3
+	bne	.L1162
+	ldr	r3, .L1163+68
+	movs	r2, #1
+	ldr	r0, .L1163+72
+	ldr	r1, .L1163+76
+	str	r2, [r3, #0]
+	bl	printf
+.L1162:
+	ldr	r3, .L1163+80
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1163+84
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1163+32
+	ldr	r3, [r3, #0]
+	mla	r0, r0, r2, r3
+	ldr	r3, .L1163+88
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1163+92
+	str	r0, [r3, #0]
+	pop	{r3, r4, r5, pc}
+.L1164:
+	.align	2
+.L1163:
+	.word	.LANCHOR141
+	.word	1179929683
+	.word	.LANCHOR193
+	.word	.LANCHOR194
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR160
+	.word	.LANCHOR159
+	.word	.LANCHOR162
+	.word	.LANCHOR95
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR152
+	.word	.LANCHOR151
+	.word	305432421
+	.word	.LANCHOR126
+	.word	.LC10
+	.word	.LC19
+	.word	.LANCHOR63
+	.word	.LANCHOR161
+	.word	.LANCHOR55
+	.word	.LANCHOR195
+	.size	Ftl_load_ext_data, .-Ftl_load_ext_data
+	.section	.text.FtlLoadEctTbl,"ax",%progbits
+	.align	1
+	.global	FtlLoadEctTbl
+	.thumb
+	.thumb_func
+	.type	FtlLoadEctTbl, %function
+FtlLoadEctTbl:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r0, #64
+	ldr	r4, .L1167
+	ldr	r5, .L1167+4
+	ldr	r2, [r4, #0]
+	ldrh	r1, [r5, #0]
+	bl	FtlVendorPartRead
+	ldr	r3, [r4, #0]
+	ldr	r2, [r3, #0]
+	ldr	r3, .L1167+8
+	cmp	r2, r3
+	beq	.L1166
+	ldr	r1, .L1167+12
+	ldr	r0, .L1167+16
+	bl	printf
+	ldrh	r2, [r5, #0]
+	ldr	r0, [r4, #0]
+	movs	r1, #0
+	lsls	r2, r2, #9
+	bl	memset
+.L1166:
+	movs	r0, #0
+	pop	{r3, r4, r5, pc}
+.L1168:
+	.align	2
+.L1167:
+	.word	.LANCHOR183
+	.word	.LANCHOR182
+	.word	1112818501
+	.word	.LC20
+	.word	.LC10
+	.size	FtlLoadEctTbl, .-FtlLoadEctTbl
+	.section	.text.load_l2p_region,"ax",%progbits
+	.align	1
+	.global	load_l2p_region
+	.thumb
+	.thumb_func
+	.type	load_l2p_region, %function
+load_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1174
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r3, [r3, #0]
+	mov	r8, r1
+	cmp	r3, r0
+	bcs	.L1170
+	ldr	r1, .L1174+4
+	movw	r2, #467
+	ldr	r0, .L1174+8
+	bl	printf
+	ldr	r0, .L1174+12
+	ldr	r1, .L1174+16
+	bl	printf
+.L1170:
+	ldr	r3, .L1174+20
+	ldr	r7, .L1174+24
+	ldr	r3, [r3, #0]
+	ldr	r6, [r3, r4, lsl #2]
+	movs	r3, #12
+	cbnz	r6, .L1171
+	mul	r5, r3, r8
+	ldr	r3, [r7, #0]
+	movs	r1, #255
+	adds	r3, r3, r5
+	ldr	r0, [r3, #8]
+	ldr	r3, .L1174+28
+	ldrh	r2, [r3, #0]
+	bl	memset
+	ldr	r3, [r7, #0]
+	adds	r2, r3, r5
+	strh	r4, [r3, r5]	@ movhi
+	str	r6, [r2, #4]
+	b	.L1172
+.L1171:
+	ldr	r5, .L1174+32
+	movs	r1, #1
+	mov	r2, r1
+	mov	r0, r5
+	str	r6, [r5, #4]
+	mul	r6, r3, r8
+	ldr	r3, [r7, #0]
+	adds	r3, r3, r6
+	ldr	r3, [r3, #8]
+	str	r3, [r5, #8]
+	ldr	r3, .L1174+36
+	ldr	r3, [r3, #0]
+	str	r3, [r5, #12]
+	bl	FlashReadPages
+	ldr	r3, [r5, #12]
+	ldrh	r3, [r3, #8]
+	cmp	r3, r4
+	beq	.L1173
+	ldr	r1, .L1174+4
+	mov	r2, #488
+	ldr	r0, .L1174+8
+	bl	printf
+	ldr	r0, .L1174+12
+	ldr	r1, .L1174+16
+	bl	printf
+.L1173:
+	ldr	r3, .L1174+24
+	movs	r1, #0
+	ldr	r3, [r3, #0]
+	adds	r2, r3, r6
+	strh	r4, [r3, r6]	@ movhi
+	str	r1, [r2, #4]
+.L1172:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1175:
+	.align	2
+.L1174:
+	.word	.LANCHOR82
+	.word	.LANCHOR196
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR124
+	.word	.LANCHOR112
+	.word	.LANCHOR73
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.size	load_l2p_region, .-load_l2p_region
+	.section	.text.FtlGetLastWrittenPage,"ax",%progbits
+	.align	1
+	.global	FtlGetLastWrittenPage
+	.thumb
+	.thumb_func
+	.type	FtlGetLastWrittenPage, %function
+FtlGetLastWrittenPage:
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+	cmp	r1, #1
+	push	{r4, r5, r6, r7, r8, sl, lr}
+	sub	sp, sp, #108
+	it	eq
+	ldreq	r3, .L1187
+	mov	r5, r1
+	it	ne
+	ldrne	r3, .L1187+4
+	add	sl, sp, #68
+	lsl	r8, r0, #10
+	movs	r1, #1
+	mov	r0, sl
+	mov	r2, r5
+	ldrh	r4, [r3, #0]
+	add	r3, sp, #4
+	str	r3, [sp, #80]
+	movs	r7, #0
+	subs	r4, r4, #1
+	str	r7, [sp, #76]
+	uxth	r4, r4
+	sxth	r3, r4
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L1180
+	b	.L1185
+.L1183:
+	adds	r6, r6, r3
+	movs	r1, #1
+	mov	r0, sl
+	mov	r2, r5
+	add	r6, r6, r6, lsr #31
+	ubfx	r6, r6, #1, #16
+	sxth	r3, r6
+	orr	r3, r3, r8
+	str	r3, [sp, #72]
+	bl	FlashReadPages
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #1
+	bne	.L1181
+	ldr	r3, [sp, #8]
+	adds	r3, r3, #1
+	bne	.L1181
+	ldr	r3, [sp, #68]
+	adds	r3, r3, #1
+	beq	.L1181
+	subs	r4, r6, #1
+	uxth	r4, r4
+	b	.L1185
+.L1181:
+	adds	r6, r6, #1
+	uxth	r7, r6
+.L1185:
+	sxth	r6, r7
+	sxth	r3, r4
+	cmp	r6, r3
+	ble	.L1183
+.L1180:
+	sxth	r0, r4
+	add	sp, sp, #108
+	pop	{r4, r5, r6, r7, r8, sl, pc}
+.L1188:
+	.align	2
+.L1187:
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.size	FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
+	.section	.text.FtlLoadSysInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadSysInfo
+	.thumb
+	.thumb_func
+	.type	FtlLoadSysInfo, %function
+FtlLoadSysInfo:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r4, #0
+	ldr	r6, .L1209
+	mov	r1, r4
+	ldr	r5, .L1209+4
+	ldr	r8, .L1209+48
+	ldr	r3, [r6, #0]
+	str	r4, [r5, #8]
+	str	r3, [r5, #12]
+	ldr	r3, .L1209+8
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1209+12
+	lsls	r2, r2, #1
+	ldr	r0, [r3, #0]
+	bl	memset
+	ldrh	r0, [r8, #0]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1205
+	movs	r1, #1
+	mov	fp, r8
+	bl	FtlGetLastWrittenPage
+	uxth	sl, r0
+	mov	r7, r0
+	add	r3, sl, #1
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r8, .L1209+148
+	ldr	r3, .L1209+16
+	b	.L1191
+.L1194:
+	ldrh	r1, [fp, #0]
+	sxth	r2, sl
+	subs	r2, r2, r4
+	ldr	r0, .L1209+4
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r5, #4]
+	ldr	r2, [r8, #0]
+	movs	r1, #1
+	str	r2, [r5, #8]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r5, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1192
+	ldr	r2, [r8, #0]
+	ldr	r2, [r2, #0]
+	cmp	r2, r3
+	bne	.L1192
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r2, #0]
+	movw	r2, #61604
+	cmp	r1, r2
+	beq	.L1193
+.L1192:
+	adds	r4, r4, #1
+.L1191:
+	subs	r2, r7, r4
+	lsls	r2, r2, #16
+	bpl	.L1194
+	b	.L1208
+.L1193:
+	ldr	r3, .L1209+8
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1209+20
+	adds	r2, r2, #24
+	ldrh	r3, [r3, #0]
+	cmp	r3, r2, lsl #1
+	bcs	.L1196
+	ldr	r1, .L1209+24
+	movw	r2, #1426
+	ldr	r0, .L1209+28
+	bl	printf
+	ldr	r0, .L1209+32
+	ldr	r1, .L1209+36
+	bl	printf
+.L1196:
+	ldr	r5, .L1209+4
+	movs	r2, #48
+	ldr	r4, .L1209+40
+	ldr	r6, .L1209+8
+	ldr	r1, [r5, #8]
+	mov	r0, r4
+	bl	memcpy
+	ldr	r3, .L1209+12
+	ldrh	r2, [r6, #0]
+	ldr	r1, [r5, #8]
+	ldr	r0, [r3, #0]
+	adds	r1, r1, #48
+	lsls	r2, r2, #1
+	bl	memcpy
+	ldrh	r2, [r6, #0]
+	ldr	r0, .L1209+44
+	add	r1, r2, #24
+	ldr	r3, [r5, #8]
+	lsrs	r2, r2, #3
+	lsrs	r1, r1, #1
+	adds	r2, r2, #4
+	ldr	r0, [r0, #0]
+	add	r1, r3, r1, lsl #2
+	bl	memcpy
+	ldr	r2, [r4, #0]
+	ldr	r3, .L1209+16
+	cmp	r2, r3
+	bne	.L1205
+	ldr	r3, .L1209+48
+	ldrh	r5, [r4, #8]
+	ldrb	r2, [r4, #10]	@ zero_extendqisi2
+	strh	r5, [r3, #6]	@ movhi
+	ldr	r3, .L1209+52
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1205
+	ldr	r3, .L1209+56
+	ldr	r2, .L1209+60
+	str	r5, [r3, #0]
+	ldr	r3, .L1209+64
+	ldrh	r3, [r3, #0]
+	muls	r3, r5, r3
+	str	r3, [r2, #0]
+	ldr	r2, .L1209+68
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	ldr	r2, .L1209+72
+	str	r3, [r2, #0]
+	ldr	r3, .L1209+76
+	ldr	r4, [r3, #0]
+	ldr	r3, .L1209+80
+	ldrh	r0, [r3, #6]
+	ldr	r3, .L1209+84
+	subs	r0, r4, r0
+	subs	r0, r0, r5
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1209+88
+	cmp	r5, r4
+	strh	r0, [r3, #0]	@ movhi
+	bls	.L1197
+	ldr	r1, .L1209+24
+	mov	r2, #1448
+	ldr	r0, .L1209+28
+	bl	printf
+	ldr	r0, .L1209+32
+	ldr	r1, .L1209+36
+	bl	printf
+.L1197:
+	ldr	r3, .L1209+40
+	ldr	r2, .L1209+92
+	ldrh	r1, [r3, #16]
+	ldrh	r0, [r3, #14]
+	ldrh	r5, [r3, #18]
+	lsrs	r4, r1, #6
+	and	r1, r1, #63
+	strb	r1, [r2, #6]
+	ldrb	r1, [r3, #11]	@ zero_extendqisi2
+	strh	r4, [r2, #2]	@ movhi
+	movw	r4, #65535
+	strh	r0, [r2, #0]	@ movhi
+	strb	r1, [r2, #8]
+	movs	r2, #0
+	ldr	r1, .L1209+96
+	strh	r2, [r1, #2]	@ movhi
+	strh	r4, [r1, #0]	@ movhi
+	strb	r2, [r1, #6]
+	strb	r2, [r1, #8]
+	ldr	r1, .L1209+100
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #20]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #12]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1209+104
+	ldrh	r5, [r3, #22]
+	strh	r5, [r1, #0]	@ movhi
+	ldrh	r5, [r3, #24]
+	lsrs	r6, r5, #6
+	and	r5, r5, #63
+	strb	r5, [r1, #6]
+	ldrb	r5, [r3, #13]	@ zero_extendqisi2
+	strh	r6, [r1, #2]	@ movhi
+	strb	r5, [r1, #8]
+	ldr	r1, .L1209+108
+	ldr	r5, [r3, #32]
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+112
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+116
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+120
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+124
+	str	r5, [r1, #0]
+	ldr	r1, .L1209+128
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+132
+	str	r2, [r1, #0]
+	ldr	r1, .L1209+136
+	str	r2, [r1, #0]
+	ldr	r2, .L1209+140
+	ldr	r1, [r3, #40]
+	ldr	r5, [r2, #0]
+	cmp	r1, r5
+	it	hi
+	strhi	r1, [r2, #0]
+	ldr	r2, [r3, #36]
+	ldr	r3, .L1209+144
+	ldr	r1, [r3, #0]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3, #0]
+	cmp	r0, r4
+	beq	.L1200
+	ldr	r0, .L1209+92
+	bl	make_superblock
+.L1200:
+	ldr	r0, .L1209+100
+	movw	r4, #65535
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1201
+	bl	make_superblock
+.L1201:
+	ldr	r0, .L1209+104
+	ldrh	r3, [r0, #0]
+	cmp	r3, r4
+	beq	.L1202
+	bl	make_superblock
+.L1202:
+	ldr	r0, .L1209+96
+	movw	r3, #65535
+	ldrh	r2, [r0, #0]
+	cmp	r2, r3
+	beq	.L1206
+	bl	make_superblock
+	b	.L1206
+.L1205:
+	mov	r0, #-1
+	b	.L1190
+.L1206:
+	movs	r0, #0
+.L1190:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1208:
+	ldr	r1, .L1209+24
+	mov	r2, #1424
+	ldr	r0, .L1209+28
+	bl	printf
+	ldr	r1, .L1209+36
+	ldr	r0, .L1209+32
+	bl	printf
+	b	.L1193
+.L1210:
+	.align	2
+.L1209:
+	.word	.LANCHOR180
+	.word	.LANCHOR197
+	.word	.LANCHOR55
+	.word	.LANCHOR99
+	.word	1179929683
+	.word	.LANCHOR73
+	.word	.LANCHOR198
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR140
+	.word	.LANCHOR117
+	.word	.LANCHOR191
+	.word	.LANCHOR60
+	.word	.LANCHOR199
+	.word	.LANCHOR87
+	.word	.LANCHOR68
+	.word	.LANCHOR71
+	.word	.LANCHOR84
+	.word	.LANCHOR57
+	.word	.LANCHOR89
+	.word	.LANCHOR53
+	.word	.LANCHOR200
+	.word	.LANCHOR107
+	.word	.LANCHOR201
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR160
+	.word	.LANCHOR159
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR158
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR96
+	.size	FtlLoadSysInfo, .-FtlLoadSysInfo
+	.section	.text.FtlLoadBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadBbt
+	.thumb
+	.thumb_func
+	.type	FtlLoadBbt, %function
+FtlLoadBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r3, #0
+	ldr	r6, .L1230
+	movw	sl, #61649
+	str	r3, [r6, #8]
+	ldr	r3, .L1230+4
+	ldr	r4, [r3, #0]
+	str	r4, [r6, #12]
+	bl	FtlBbtMemInit
+	ldr	r3, .L1230+8
+	mov	r8, r3
+	ldrh	r5, [r3, #0]
+	subs	r5, r5, #1
+	uxth	r5, r5
+	b	.L1212
+.L1216:
+	movs	r1, #1
+	ldr	r0, .L1230
+	mov	r2, r1
+	lsls	r3, r5, #10
+	str	r3, [r6, #4]
+	bl	FlashReadPages
+	ldr	r3, [r6, #0]
+	ldr	r7, .L1230
+	adds	r3, r3, #1
+	bne	.L1213
+	ldr	r3, [r6, #4]
+	movs	r1, #1
+	mov	r0, r7
+	mov	r2, r1
+	adds	r3, r3, #1
+	str	r3, [r6, #4]
+	bl	FlashReadPages
+.L1213:
+	ldr	r3, [r7, #0]
+	adds	r3, r3, #1
+	beq	.L1214
+	ldrh	r3, [r4, #0]
+	cmp	r3, sl
+	bne	.L1214
+	ldr	r3, .L1230+12
+	ldr	r2, [r4, #4]
+	strh	r5, [r3, #0]	@ movhi
+	str	r2, [r3, #8]
+	ldrh	r2, [r4, #8]
+	strh	r2, [r3, #4]	@ movhi
+	b	.L1215
+.L1214:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1212:
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #47
+	cmp	r3, r5
+	ble	.L1216
+.L1215:
+	ldr	r5, .L1230+12
+	movw	r3, #65535
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1227
+	ldrh	r2, [r5, #4]
+	cmp	r2, r3
+	beq	.L1218
+	ldr	r6, .L1230
+	movs	r1, #1
+	lsls	r2, r2, #10
+	mov	r0, r6
+	str	r2, [r6, #4]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	beq	.L1218
+	ldrh	r2, [r4, #0]
+	movw	r3, #61649
+	cmp	r2, r3
+	bne	.L1218
+	ldr	r3, [r4, #4]
+	ldr	r2, [r5, #8]
+	cmp	r3, r2
+	bls	.L1218
+	ldrh	r2, [r5, #4]
+	str	r3, [r5, #8]
+	ldrh	r3, [r4, #8]
+	strh	r2, [r5, #0]	@ movhi
+	strh	r3, [r5, #4]	@ movhi
+.L1218:
+	ldr	fp, .L1230+12
+	movs	r1, #1
+	movs	r5, #0
+	ldr	r6, .L1230
+	ldr	r8, .L1230+48
+	ldrh	r0, [fp, #0]
+	bl	FtlGetLastWrittenPage
+	uxth	sl, r0
+	mov	r7, r0
+	add	r3, sl, #1
+	strh	r3, [fp, #2]	@ movhi
+	sxth	sl, sl
+	movw	r3, #61649
+	b	.L1219
+.L1222:
+	ldrh	r1, [fp, #0]
+	rsb	r2, r5, sl
+	ldr	r0, .L1230
+	orr	r2, r2, r1, lsl #10
+	str	r2, [r6, #4]
+	ldr	r2, [r8, #0]
+	movs	r1, #1
+	str	r3, [sp, #4]
+	str	r2, [r6, #8]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1220
+	ldrh	r2, [r4, #0]
+	cmp	r2, r3
+	beq	.L1221
+.L1220:
+	adds	r5, r5, #1
+.L1219:
+	subs	r2, r7, r5
+	lsls	r1, r2, #16
+	bpl	.L1222
+	b	.L1229
+.L1221:
+	ldr	r3, .L1230+12
+	ldrh	r2, [r4, #10]
+	ldrh	r0, [r4, #12]
+	strh	r2, [r3, #6]	@ movhi
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1224
+	ldr	r3, .L1230+16
+	ldr	r2, [r3, #0]
+	cmp	r0, r2
+	beq	.L1224
+	ldr	r3, .L1230+20
+	ldrh	r3, [r3, #0]
+	lsrs	r3, r3, #2
+	cmp	r2, r3
+	bcs	.L1224
+	cmp	r0, r3
+	bcs	.L1224
+	bl	FtlSysBlkNumInit
+.L1224:
+	ldr	r5, .L1230+24
+	movs	r4, #0
+	ldr	r8, .L1230+52
+	ldr	r7, .L1230+28
+	ldr	r6, .L1230
+	b	.L1225
+.L1226:
+	ldrh	r2, [r7, #0]
+	ldr	r1, [r6, #8]
+	ldr	r0, [r5, #4]!
+	lsls	r2, r2, #2
+	mla	r1, r4, r2, r1
+	bl	memcpy
+	adds	r4, r4, #1
+.L1225:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcc	.L1226
+	movs	r0, #0
+	b	.L1217
+.L1227:
+	mov	r0, #-1
+.L1217:
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1229:
+	ldr	r1, .L1230+32
+	mov	r2, #332
+	ldr	r0, .L1230+36
+	bl	printf
+	ldr	r1, .L1230+40
+	ldr	r0, .L1230+44
+	bl	printf
+	b	.L1221
+.L1231:
+	.align	2
+.L1230:
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.word	.LANCHOR66
+	.word	.LANCHOR89
+	.word	.LANCHOR52
+	.word	.LANCHOR56
+	.word	.LANCHOR89+24
+	.word	.LANCHOR90
+	.word	.LANCHOR202
+	.word	.LC9
+	.word	.LC11
+	.word	.LC10
+	.word	.LANCHOR96
+	.word	.LANCHOR60
+	.size	FtlLoadBbt, .-FtlLoadBbt
+	.section	.text.FtlLoadFactoryBbt,"ax",%progbits
+	.align	1
+	.global	FtlLoadFactoryBbt
+	.thumb
+	.thumb_func
+	.type	FtlLoadFactoryBbt, %function
+FtlLoadFactoryBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1239
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r5, #0
+	ldr	r7, .L1239+4
+	ldr	r3, [r3, #0]
+	ldr	r6, .L1239+8
+	ldr	r8, .L1239+20
+	str	r3, [r7, #8]
+	ldr	r3, .L1239+12
+	ldr	sl, [r3, #0]
+	ldr	r3, .L1239+16
+	str	sl, [r7, #12]
+	b	.L1233
+.L1238:
+	ldrh	r4, [r8, #0]
+	movw	r2, #65535
+	movw	fp, #61664
+	strh	r2, [r6], #2	@ movhi
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1234
+.L1237:
+	mla	r2, r2, r5, r4
+	movs	r1, #1
+	ldr	r0, .L1239+4
+	lsls	r2, r2, #10
+	str	r2, [r7, #4]
+	mov	r2, r1
+	str	r3, [sp, #4]
+	bl	FlashReadPages
+	ldr	r2, [r7, #0]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1235
+	ldrh	r2, [sl, #0]
+	cmp	r2, fp
+	bne	.L1235
+	strh	r4, [r6, #-2]	@ movhi
+	b	.L1236
+.L1235:
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1234:
+	ldrh	r2, [r8, #0]
+	sub	r1, r2, #15
+	cmp	r1, r4
+	ble	.L1237
+.L1236:
+	adds	r5, r5, #1
+.L1233:
+	ldrh	r2, [r3, #0]
+	cmp	r5, r2
+	bcc	.L1238
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1240:
+	.align	2
+.L1239:
+	.word	.LANCHOR96
+	.word	.LANCHOR197
+	.word	.LANCHOR89+12
+	.word	.LANCHOR180
+	.word	.LANCHOR60
+	.word	.LANCHOR66
+	.size	FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
+	.section	.text.FlashProgSlc2KPages,"ax",%progbits
+	.align	1
+	.global	FlashProgSlc2KPages
+	.thumb
+	.thumb_func
+	.type	FlashProgSlc2KPages, %function
+FlashProgSlc2KPages:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #64
+	mov	sl, r0
+	mov	fp, r1
+	str	r3, [sp, #12]
+	mov	r5, r0
+	ldr	r3, .L1259
+	movs	r6, #0
+	str	r2, [sp, #8]
+	ldr	r7, .L1259+4
+	ldrb	r8, [r3, #9]	@ zero_extendqisi2
+	b	.L1242
+.L1249:
+	rsb	r3, r6, fp
+	ldr	r1, [sp, #8]
+	add	r2, sp, #56
+	mov	r0, r5
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #60
+	bl	LogAddr2PhyAddr
+	ldr	r1, .L1259+8
+	ldr	r3, [sp, #60]
+	ldrb	r2, [r1, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bcc	.L1243
+	mov	r3, #-1
+	str	r3, [r5, #0]
+	b	.L1244
+.L1243:
+	ldr	r2, .L1259+12
+	ldrb	r4, [r2, r3]	@ zero_extendqisi2
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	bl	NandcFlashCs
+	mov	r0, r4
+	ldr	r1, [sp, #56]
+	bl	FlashProgFirstCmd
+	ldr	r3, [r5, #12]
+	mov	r2, r8
+	movs	r1, #1
+	mov	r0, r4
+	str	r3, [sp, #0]
+	ldr	r3, [r5, #8]
+	bl	NandcXferData
+	ldr	r1, [sp, #56]
+	mov	r0, r4
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #56]
+	mov	r0, r4
+	bl	FlashReadStatus
+	ldr	r3, [sp, #56]
+	ldr	r1, [r7, #0]
+	adds	r1, r1, r3
+	ands	r0, r0, #1
+	it	ne
+	movne	r0, #-1
+	str	r0, [r5, #0]
+	mov	r0, r4
+	bl	FlashProgFirstCmd
+	ldr	r3, [r5, #8]
+	cbz	r3, .L1246
+	add	r3, r3, #2048
+.L1246:
+	ldr	r2, [r5, #12]
+	cbz	r2, .L1247
+	adds	r2, r2, #8
+.L1247:
+	movs	r1, #1
+	str	r2, [sp, #0]
+	mov	r0, r4
+	mov	r2, r8
+	bl	NandcXferData
+	ldr	r3, [sp, #56]
+	ldr	r1, [r7, #0]
+	mov	r0, r4
+	adds	r1, r1, r3
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcWaitFlashReady
+	mov	r0, r4
+	ldr	r1, [sp, #56]
+	bl	FlashReadStatus
+	lsls	r3, r0, #31
+	mov	r0, r4
+	itt	mi
+	movmi	r3, #-1
+	strmi	r3, [r5, #0]
+	bl	NandcFlashDeCs
+.L1244:
+	adds	r6, r6, #1
+	adds	r5, r5, #36
+.L1242:
+	cmp	r6, fp
+	bne	.L1249
+	ldr	r3, [sp, #12]
+	cmp	r3, #0
+	beq	.L1250
+	movs	r5, #0
+	add	r4, sl, #8
+	ldr	r6, .L1259+16
+	mov	sl, r5
+	ldr	r8, .L1259+36
+	b	.L1251
+.L1256:
+	ldr	r3, [r4, #-8]
+	sub	r7, r4, #8
+	adds	r3, r3, #1
+	bne	.L1252
+	ldr	r1, [r4, #-4]
+	ldr	r0, .L1259+20
+	bl	printf
+	b	.L1253
+.L1252:
+	rsb	r3, sl, fp
+	mov	r0, r7
+	ldr	r1, [sp, #8]
+	add	r2, sp, #56
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #60
+	add	r5, sp, #20
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r6, #0]
+	ldr	ip, [r8, #0]
+	movs	r3, #0
+	str	r3, [lr, #0]
+	str	r3, [ip, #0]
+	ldmia	r7!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	ldmia	r7!, {r0, r1, r2, r3}
+	str	lr, [sp, #28]
+	str	ip, [sp, #32]
+	stmia	r5!, {r0, r1, r2, r3}
+	movs	r1, #1
+	ldr	r3, [r7, #0]
+	add	r0, sp, #20
+	ldr	r2, [sp, #8]
+	str	r3, [r5, #0]
+	bl	FlashReadPages
+	ldr	r5, [sp, #20]
+	adds	r0, r5, #1
+	bne	.L1254
+	ldr	r0, .L1259+24
+	ldr	r1, [r4, #-4]
+	bl	printf
+	str	r5, [r4, #-8]
+.L1254:
+	ldr	r3, [r4, #4]
+	cbz	r3, .L1255
+	ldr	r2, [r3, #0]
+	ldr	r3, [r8, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1255
+	ldr	r0, .L1259+28
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1255:
+	ldr	r3, [r4, #0]
+	cbz	r3, .L1253
+	ldr	r2, [r3, #0]
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1253
+	ldr	r0, .L1259+32
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1253:
+	add	sl, sl, #1
+	adds	r4, r4, #36
+.L1251:
+	cmp	sl, fp
+	bne	.L1256
+.L1250:
+	movs	r0, #0
+	add	sp, sp, #64
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1260:
+	.align	2
+.L1259:
+	.word	.LANCHOR18
+	.word	.LANCHOR2
+	.word	.LANCHOR16
+	.word	.LANCHOR19
+	.word	.LANCHOR203
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LANCHOR204
+	.size	FlashProgSlc2KPages, .-FlashProgSlc2KPages
+	.section	.text.FlashProgPages,"ax",%progbits
+	.align	1
+	.global	FlashProgPages
+	.thumb
+	.thumb_func
+	.type	FlashProgPages, %function
+FlashProgPages:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #72
+	ldr	r4, .L1288
+	mov	r8, r0
+	str	r1, [sp, #8]
+	mov	fp, r2
+	str	r3, [sp, #16]
+	ldr	r4, [r4, #0]
+	ldrb	r4, [r4, #19]	@ zero_extendqisi2
+	str	r4, [sp, #20]
+	ldr	r4, .L1288+4
+	ldrb	r4, [r4, #9]	@ zero_extendqisi2
+	str	r4, [sp, #12]
+	ldr	r4, .L1288+8
+	ldrb	r5, [r4, #0]	@ zero_extendqisi2
+	cmp	r5, #0
+	beq	.L1285
+	bl	FlashProgSlc2KPages
+	b	.L1263
+.L1275:
+	ldr	r1, [sp, #8]
+	movs	r4, #36
+	muls	r4, r5, r4
+	add	r6, r8, r4
+	subs	r3, r1, r5
+	mov	r0, r6
+	mov	r1, fp
+	add	r2, sp, #64
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #68
+	bl	LogAddr2PhyAddr
+	ldr	r3, .L1288+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	mov	r7, r0
+	ldr	r0, [sp, #68]
+	cmp	r0, r3
+	bcc	.L1264
+	mov	r3, #-1
+	str	r3, [r8, r4]
+	b	.L1265
+.L1264:
+	ldr	r3, .L1288+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	it	eq
+	moveq	r7, #0
+	add	r3, sl, r0, lsl #4
+	ldr	r3, [r3, #8]
+	cbz	r3, .L1267
+	uxtb	r0, r0
+	bl	FlashWaitCmdDone
+.L1267:
+	ldr	r2, [sp, #68]
+	ldr	r1, .L1288+20
+	add	r3, r1, r2, lsl #4
+	movs	r1, #0
+	str	r1, [r3, #12]
+	ldr	r1, [sp, #64]
+	str	r6, [r3, #8]
+	str	r1, [r3, #4]
+	cbz	r7, .L1268
+	adds	r1, r5, #1
+	movs	r0, #36
+	mla	r1, r0, r1, r8
+	str	r1, [r3, #12]
+.L1268:
+	ldr	r3, .L1288+24
+	ldrb	r4, [r3, r2]	@ zero_extendqisi2
+	lsls	r2, r2, #4
+	ldr	r3, .L1288+12
+	mov	r0, r4
+	strb	r4, [sl, r2]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1269
+	bl	NandcWaitFlashReady
+	b	.L1270
+.L1269:
+	bl	NandcFlashCs
+	ldr	r2, [sp, #68]
+	ldr	r3, .L1288+28
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	mov	r0, r4
+	bl	NandcFlashDeCs
+.L1270:
+	ldr	r2, [sp, #20]
+	subs	r3, r2, #1
+	cmp	r3, #6
+	bhi	.L1271
+	ldr	r3, .L1288+32
+	ldrb	r3, [r3, r4]	@ zero_extendqisi2
+	cbz	r3, .L1271
+	ldr	r3, .L1288+36
+	mov	r0, r4
+	adds	r2, r3, #4
+	ldrb	r1, [r3, #1]	@ zero_extendqisi2
+	movs	r3, #0
+	bl	HynixSetRRPara
+.L1271:
+	mov	r0, r4
+	bl	NandcFlashCs
+	cmp	fp, #1
+	mov	r0, r4
+	bne	.L1272
+	ldr	r3, .L1288+40
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1272
+	bl	flash_enter_slc_mode
+	b	.L1273
+.L1272:
+	bl	flash_exit_slc_mode
+.L1273:
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	bl	FlashProgFirstCmd
+	ldr	r3, [r6, #12]
+	mov	r0, r4
+	movs	r1, #1
+	ldr	r2, [sp, #12]
+	str	r3, [sp, #0]
+	ldr	r3, [r6, #8]
+	bl	NandcXferData
+	cbz	r7, .L1274
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	bl	FlashProgDpFirstCmd
+	ldr	r3, .L1288+28
+	ldr	r2, [sp, #68]
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	ldr	r2, [r3, r2, lsl #2]
+	adds	r2, r2, #0
+	it	ne
+	movne	r2, #1
+	bl	FlashWaitReadyEN
+	ldr	r3, .L1288+44
+	mov	r0, r4
+	ldr	r1, [r3, #0]
+	ldr	r3, [sp, #64]
+	adds	r1, r1, r3
+	bl	FlashProgDpSecondCmd
+	movs	r2, #36
+	adds	r3, r5, #1
+	mov	r0, r4
+	movs	r1, #1
+	mla	r3, r2, r3, r8
+	ldr	r2, [r3, #12]
+	str	r2, [sp, #0]
+	ldr	r2, [sp, #12]
+	ldr	r3, [r3, #8]
+	bl	NandcXferData
+.L1274:
+	mov	r0, r4
+	ldr	r1, [sp, #64]
+	bl	FlashProgSecondCmd
+	mov	r0, r4
+	bl	NandcFlashDeCs
+	adds	r5, r5, r7
+.L1265:
+	adds	r5, r5, #1
+	b	.L1262
+.L1285:
+	ldr	sl, .L1288+20
+.L1262:
+	ldr	r1, [sp, #8]
+	cmp	r5, r1
+	bcc	.L1275
+	movs	r4, #0
+	ldr	r7, .L1288+12
+	ldr	r6, .L1288+40
+	ldr	r5, .L1288+20
+	b	.L1276
+.L1278:
+	uxtb	r0, r4
+	bl	FlashWaitCmdDone
+	cmp	fp, #1
+	bne	.L1277
+	ldrb	r3, [r6, #0]	@ zero_extendqisi2
+	cbz	r3, .L1277
+	lsls	r3, r4, #4
+	ldrb	r0, [r5, r3]	@ zero_extendqisi2
+	bl	flash_exit_slc_mode
+.L1277:
+	adds	r4, r4, #1
+.L1276:
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	cmp	r4, r3
+	bcc	.L1278
+	ldr	r2, [sp, #16]
+	cmp	r2, #0
+	beq	.L1287
+	movs	r5, #0
+	add	r4, r8, #8
+	ldr	r6, .L1288+48
+	mov	sl, r5
+	ldr	r8, .L1288+68
+	b	.L1279
+.L1284:
+	ldr	r3, [r4, #-8]
+	sub	r7, r4, #8
+	adds	r3, r3, #1
+	bne	.L1280
+	ldr	r1, [r4, #-4]
+	ldr	r0, .L1288+52
+	bl	printf
+	b	.L1281
+.L1280:
+	ldr	r1, [sp, #8]
+	mov	r0, r7
+	add	r2, sp, #64
+	add	r5, sp, #28
+	rsb	r3, sl, r1
+	mov	r1, fp
+	uxtb	r3, r3
+	str	r3, [sp, #0]
+	add	r3, sp, #68
+	bl	LogAddr2PhyAddr
+	ldr	lr, [r6, #0]
+	ldr	ip, [r8, #0]
+	movs	r3, #0
+	str	r3, [lr, #0]
+	str	r3, [ip, #0]
+	ldmia	r7!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	ldmia	r7!, {r0, r1, r2, r3}
+	stmia	r5!, {r0, r1, r2, r3}
+	movs	r1, #1
+	ldr	r3, [r7, #0]
+	mov	r2, fp
+	add	r0, sp, #28
+	str	lr, [sp, #36]
+	str	ip, [sp, #40]
+	str	r3, [r5, #0]
+	bl	FlashReadPages
+	ldr	r5, [sp, #28]
+	adds	r2, r5, #1
+	bne	.L1282
+	ldr	r0, .L1288+56
+	ldr	r1, [r4, #-4]
+	bl	printf
+	str	r5, [r4, #-8]
+.L1282:
+	ldr	r3, [r4, #4]
+	cbz	r3, .L1283
+	ldr	r2, [r3, #0]
+	ldr	r3, [r8, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1283
+	ldr	r0, .L1288+60
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1283:
+	ldr	r3, [r4, #0]
+	cbz	r3, .L1281
+	ldr	r2, [r3, #0]
+	ldr	r3, [r6, #0]
+	ldr	r3, [r3, #0]
+	cmp	r2, r3
+	beq	.L1281
+	ldr	r0, .L1288+64
+	ldr	r1, [r4, #-4]
+	bl	printf
+	mov	r3, #-1
+	str	r3, [r4, #-8]
+.L1281:
+	add	sl, sl, #1
+	adds	r4, r4, #36
+.L1279:
+	ldr	r2, [sp, #8]
+	cmp	sl, r2
+	bne	.L1284
+	movs	r0, #0
+	b	.L1263
+.L1289:
+	.align	2
+.L1288:
+	.word	.LANCHOR23
+	.word	.LANCHOR18
+	.word	.LANCHOR0
+	.word	.LANCHOR16
+	.word	.LANCHOR33
+	.word	.LANCHOR21
+	.word	.LANCHOR19
+	.word	.LANCHOR20
+	.word	.LANCHOR32
+	.word	.LANCHOR31
+	.word	.LANCHOR7
+	.word	.LANCHOR2
+	.word	.LANCHOR203
+	.word	.LC21
+	.word	.LC22
+	.word	.LC23
+	.word	.LC24
+	.word	.LANCHOR204
+.L1287:
+	ldr	r0, [sp, #16]
+.L1263:
+	add	sp, sp, #72
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+	.size	FlashProgPages, .-FlashProgPages
+	.section	.text.FtlVpcTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlVpcTblFlush
+	.thumb
+	.thumb_func
+	.type	FtlVpcTblFlush, %function
+FtlVpcTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r8, #0
+	ldr	r4, .L1302
+	ldr	sl, .L1302+88
+	ldr	fp, .L1302+92
+	ldr	r6, .L1302+4
+	ldr	r0, [sl, #0]
+	ldr	r5, [fp, #0]
+	ldrh	r3, [r4, #0]
+	str	r0, [r6, #8]
+	str	r5, [r6, #12]
+	strh	r3, [r5, #2]	@ movhi
+	movw	r3, #61604
+	strh	r3, [r5, #0]	@ movhi
+	ldr	r3, [r4, #8]
+	ldr	r7, .L1302+8
+	ldr	r1, .L1302+12
+	str	r3, [r5, #4]
+	ldr	r3, .L1302+16
+	str	r8, [r5, #8]
+	str	r8, [r5, #12]
+	stmia	r7, {r1, r3}
+	ldrh	r3, [r4, #6]
+	strh	r3, [r7, #8]	@ movhi
+	ldr	r3, .L1302+20
+	ldrh	r3, [r3, #0]
+	strb	r3, [r7, #10]
+	ldr	r3, .L1302+24
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r7, #14]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	orr	r2, r2, r1, lsl #6
+	strh	r2, [r7, #16]	@ movhi
+	strb	r3, [r7, #11]
+	ldr	r3, .L1302+28
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r3, #2]
+	strh	r2, [r7, #18]	@ movhi
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	orr	r2, r2, r1, lsl #6
+	strh	r2, [r7, #20]	@ movhi
+	strb	r3, [r7, #12]
+	ldr	r3, .L1302+32
+	ldrh	r2, [r3, #0]
+	strh	r2, [r7, #22]	@ movhi
+	ldrh	r1, [r3, #2]
+	ldrb	r2, [r3, #6]	@ zero_extendqisi2
+	ldrb	r3, [r3, #8]	@ zero_extendqisi2
+	orr	r2, r2, r1, lsl #6
+	movs	r1, #255
+	strh	r2, [r7, #24]	@ movhi
+	strb	r3, [r7, #13]
+	ldr	r3, .L1302+36
+	ldr	r3, [r3, #0]
+	str	r3, [r7, #32]
+	ldr	r3, .L1302+40
+	ldr	r3, [r3, #0]
+	str	r3, [r7, #40]
+	ldr	r3, .L1302+44
+	ldr	r3, [r3, #0]
+	str	r3, [r7, #36]
+	ldr	r3, .L1302+48
+	ldrh	r2, [r3, #0]
+	bl	memset
+	mov	r1, r7
+	ldr	r7, .L1302+52
+	movs	r2, #48
+	ldr	r0, [r6, #8]
+	bl	memcpy
+	ldr	r3, .L1302+56
+	ldrh	r2, [r7, #0]
+	ldr	r0, [r6, #8]
+	ldr	r1, [r3, #0]
+	lsls	r2, r2, #1
+	adds	r0, r0, #48
+	bl	memcpy
+	ldrh	r2, [r7, #0]
+	ldr	r3, [r6, #8]
+	mov	r7, r8
+	add	r0, r2, #24
+	lsrs	r2, r2, #3
+	lsrs	r0, r0, #1
+	adds	r2, r2, #4
+	add	r0, r3, r0, lsl #2
+	ldr	r3, .L1302+60
+	ldr	r1, [r3, #0]
+	bl	memcpy
+	mov	r0, r8
+	bl	FtlUpdateVaildLpn
+	movw	r8, #65535
+.L1301:
+	ldr	r3, [sl, #0]
+	movs	r1, #1
+	ldrh	r2, [r4, #0]
+	ldr	r0, .L1302+4
+	str	r3, [r6, #8]
+	ldr	r3, [fp, #0]
+	str	r3, [r6, #12]
+	ldrh	r3, [r4, #2]
+	orr	r3, r3, r2, lsl #10
+	mov	r2, r1
+	str	r3, [r6, #4]
+	mov	r3, r1
+	bl	FlashProgPages
+	ldr	r3, .L1302+64
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1292
+	ldrh	r3, [r4, #0]
+	ldrh	r8, [r4, #4]
+	strh	r3, [r4, #4]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r2, .L1302+40
+	ldr	r3, [r2, #0]
+	adds	r1, r3, #1
+	str	r1, [r2, #0]
+	movs	r1, #1
+	str	r3, [r4, #8]
+	lsls	r2, r0, #10
+	strh	r0, [r4, #0]	@ movhi
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	r3, [r5, #4]
+	mov	r3, r1
+	strh	r0, [r5, #2]	@ movhi
+	ldr	r0, .L1302+4
+	bl	FlashProgPages
+.L1292:
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r6, #0]
+	adds	r3, r3, #1
+	adds	r2, r2, #1
+	uxth	r3, r3
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L1293
+	cmp	r3, #1
+	bne	.L1294
+	ldr	r1, .L1302+68
+	mov	r2, #1096
+	ldr	r0, .L1302+72
+	bl	printf
+	ldr	r0, .L1302+76
+	ldr	r1, .L1302+80
+	bl	printf
+.L1294:
+	ldr	r2, .L1302
+	ldrh	r3, [r2, #2]
+	cmp	r3, #1
+	bne	.L1295
+	ldr	r3, .L1302+64
+	ldrh	r3, [r3, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1295:
+	adds	r7, r7, #1
+	uxth	r7, r7
+	cmp	r7, #3
+	bls	.L1301
+	ldr	r3, .L1302+4
+	mov	r2, r7
+	ldr	r0, .L1302+84
+	ldr	r1, [r3, #4]
+	bl	printf
+.L1297:
+	b	.L1297
+.L1293:
+	cmp	r3, #1
+	beq	.L1301
+	movw	r3, #65535
+	cmp	r8, r3
+	beq	.L1298
+	mov	r0, r8
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+.L1298:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1303:
+	.align	2
+.L1302:
+	.word	.LANCHOR191
+	.word	.LANCHOR197
+	.word	.LANCHOR140
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR60
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR161
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR73
+	.word	.LANCHOR55
+	.word	.LANCHOR99
+	.word	.LANCHOR117
+	.word	.LANCHOR69
+	.word	.LANCHOR205
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC25
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.size	FtlVpcTblFlush, .-FtlVpcTblFlush
+	.section	.text.FtlBbmTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlBbmTblFlush
+	.thumb
+	.thumb_func
+	.type	FtlBbmTblFlush, %function
+FtlBbmTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1316
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	movs	r1, #0
+	ldr	r0, [r3, #0]
+	movs	r4, #0
+	ldr	r3, .L1316+4
+	ldr	r7, .L1316+8
+	ldr	r5, .L1316+12
+	ldr	r3, [r3, #0]
+	str	r0, [r7, #8]
+	ldr	r8, .L1316+48
+	str	r3, [r7, #12]
+	ldr	r3, .L1316+16
+	ldr	sl, .L1316+52
+	ldrh	r2, [r3, #0]
+	bl	memset
+	b	.L1305
+.L1306:
+	ldrh	r2, [sl, #0]
+	ldr	r3, [r7, #8]
+	ldr	r1, [r5, #4]!
+	mul	r0, r2, r4
+	lsls	r2, r2, #2
+	adds	r4, r4, #1
+	add	r0, r3, r0, lsl #2
+	bl	memcpy
+.L1305:
+	ldrh	r3, [r8, #0]
+	ldr	r6, .L1316+8
+	cmp	r4, r3
+	blt	.L1306
+	ldr	r5, [r6, #12]
+	movs	r2, #16
+	movs	r1, #255
+	movs	r7, #0
+	mov	r0, r5
+	mov	r8, r7
+	bl	memset
+	movw	r3, #61649
+	strh	r3, [r5, #0]	@ movhi
+	ldr	r3, .L1316+20
+	ldr	sl, .L1316
+	ldr	fp, .L1316+4
+	ldr	r2, [r3, #8]
+	str	r2, [r5, #4]
+	ldrh	r2, [r3, #0]
+	strh	r2, [r5, #2]	@ movhi
+	ldrh	r2, [r3, #4]
+	ldrh	r3, [r3, #6]
+	strh	r2, [r5, #8]	@ movhi
+	strh	r3, [r5, #10]	@ movhi
+	ldr	r3, .L1316+24
+	ldr	r3, [r3, #0]
+	strh	r3, [r5, #12]	@ movhi
+	b	.L1315
+.L1312:
+	mov	r8, #1
+.L1315:
+	ldr	r3, [sl, #0]
+	movs	r1, #0
+	ldr	r4, .L1316+20
+	ldrh	r0, [r5, #10]
+	str	r3, [r6, #8]
+	str	r1, [r6, #0]
+	ldr	r3, [fp, #0]
+	ldrh	r1, [r4, #0]
+	ldrh	r2, [r4, #2]
+	str	r3, [r6, #12]
+	orr	r3, r2, r1, lsl #10
+	str	r3, [r6, #4]
+	ldrh	r3, [r4, #4]
+	str	r0, [sp, #0]
+	ldr	r0, .L1316+28
+	bl	printf
+	movs	r1, #1
+	mov	r2, r1
+	mov	r3, r1
+	ldr	r0, .L1316+8
+	bl	FlashProgPages
+	ldr	r3, .L1316+32
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	blt	.L1308
+	ldrh	r2, [r4, #0]
+	movs	r1, #0
+	ldr	r3, [r4, #8]
+	strh	r1, [r4, #2]	@ movhi
+	movs	r1, #1
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	str	r3, [r5, #4]
+	strh	r2, [r5, #8]	@ movhi
+	ldrh	r3, [r4, #4]
+	strh	r2, [r4, #4]	@ movhi
+	ldr	r2, .L1316+36
+	strh	r3, [r4, #0]	@ movhi
+	lsls	r3, r3, #10
+	str	r3, [r6, #4]
+	ldr	r0, [r2, #0]
+	mov	r2, r1
+	str	r3, [r0, #4]
+	bl	FlashEraseBlocks
+	movs	r1, #1
+	ldr	r0, .L1316+8
+	mov	r2, r1
+	mov	r3, r1
+	bl	FlashProgPages
+.L1308:
+	ldr	r3, .L1316+20
+	ldrh	r2, [r3, #2]
+	adds	r2, r2, #1
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	bne	.L1309
+	adds	r7, r7, #1
+	ldr	r0, .L1316+40
+	ldr	r1, [r6, #4]
+	uxth	r7, r7
+	bl	printf
+	cmp	r7, #3
+	bls	.L1315
+	ldr	r3, .L1316+8
+	mov	r2, r7
+	ldr	r0, .L1316+44
+	ldr	r1, [r3, #4]
+	bl	printf
+.L1311:
+	b	.L1311
+.L1309:
+	cmp	r8, #0
+	beq	.L1312
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1317:
+	.align	2
+.L1316:
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR197
+	.word	.LANCHOR89+24
+	.word	.LANCHOR73
+	.word	.LANCHOR89
+	.word	.LANCHOR52
+	.word	.LC26
+	.word	.LANCHOR69
+	.word	.LANCHOR93
+	.word	.LC27
+	.word	.LC28
+	.word	.LANCHOR60
+	.word	.LANCHOR90
+	.size	FtlBbmTblFlush, .-FtlBbmTblFlush
+	.section	.text.FtlGcFreeBadSuperBlk,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeBadSuperBlk
+	.thumb
+	.thumb_func
+	.type	FtlGcFreeBadSuperBlk, %function
+FtlGcFreeBadSuperBlk:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	sl, r0
+	ldr	r5, .L1328
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1327
+	b	.L1320
+.L1326:
+	ldr	r3, .L1328+4
+	mov	r1, sl
+	mov	fp, #0
+	ldrb	r0, [r3, r4]	@ zero_extendqisi2
+	bl	V2P_block
+	mov	r3, r0
+	b	.L1321
+.L1325:
+	ldrh	r2, [r7, fp, lsl #1]
+	cmp	r2, r3
+	bne	.L1322
+	mov	r0, r3
+	str	r3, [sp, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldrh	r1, [r5, #0]
+	mov	r2, fp
+	ldr	r3, [sp, #4]
+	b	.L1323
+.L1324:
+	adds	r0, r2, #1
+	ldrh	lr, [r6, r0, lsl #1]
+	strh	lr, [r6, r2, lsl #1]	@ movhi
+	uxth	r2, r0
+.L1323:
+	cmp	r2, r1
+	bcc	.L1324
+	subs	r1, r1, #1
+	strh	r1, [r5, #0]	@ movhi
+.L1322:
+	add	fp, fp, #1
+	uxth	fp, fp
+.L1321:
+	ldrh	r2, [r5, #0]
+	cmp	r2, fp
+	bhi	.L1325
+	adds	r4, r4, #1
+	uxth	r4, r4
+	b	.L1319
+.L1327:
+	ldr	r7, .L1328+8
+	movs	r4, #0
+	ldr	r8, .L1328+12
+	mov	r6, r7
+.L1319:
+	ldrh	r3, [r8, #0]
+	cmp	r3, r4
+	bhi	.L1326
+	bl	FtlGcReFreshBadBlk
+.L1320:
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1329:
+	.align	2
+.L1328:
+	.word	.LANCHOR148
+	.word	.LANCHOR62
+	.word	.LANCHOR149
+	.word	.LANCHOR53
+	.size	FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
+	.section	.text.update_vpc_list,"ax",%progbits
+	.align	1
+	.global	update_vpc_list
+	.thumb
+	.thumb_func
+	.type	update_vpc_list, %function
+update_vpc_list:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, .L1340
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cmp	r3, #0
+	bne	.L1331
+	ldr	r2, .L1340+4
+	ldrh	r1, [r2, #0]
+	cmp	r1, r0
+	bne	.L1332
+	movw	r3, #65535
+	strh	r3, [r2, #0]	@ movhi
+	b	.L1333
+.L1332:
+	ldr	r2, .L1340+8
+	ldrh	r2, [r2, #0]
+	cmp	r2, r0
+	beq	.L1334
+	ldr	r2, .L1340+12
+	ldrh	r2, [r2, #0]
+	cmp	r2, r0
+	beq	.L1334
+	ldr	r2, .L1340+16
+	ldrh	r2, [r2, #0]
+	cmp	r2, r0
+	beq	.L1334
+.L1333:
+	ldr	r5, .L1340+20
+	mov	r1, r4
+	ldr	r0, .L1340+24
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1335
+	ldr	r1, .L1340+28
+	movw	r2, #2809
+	ldr	r0, .L1340+32
+	bl	printf
+	ldr	r0, .L1340+36
+	ldr	r1, .L1340+40
+	bl	printf
+.L1335:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	free_data_superblock
+	mov	r0, r4
+	bl	FtlGcFreeBadSuperBlk
+	ldr	r3, .L1340+44
+	ldrh	r2, [r3, #0]
+	ldrh	r3, [r5, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1340+48
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1339
+	ldr	r1, .L1340+28
+	movw	r2, #2812
+	ldr	r0, .L1340+32
+	bl	printf
+	ldr	r1, .L1340+40
+	ldr	r0, .L1340+36
+	bl	printf
+	b	.L1339
+.L1331:
+	bl	List_update_data_list
+	movs	r3, #0
+	b	.L1334
+.L1339:
+	movs	r3, #1
+.L1334:
+	mov	r0, r3
+	pop	{r3, r4, r5, pc}
+.L1341:
+	.align	2
+.L1340:
+	.word	.LANCHOR99
+	.word	.LANCHOR201
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR101
+	.word	.LANCHOR98
+	.word	.LANCHOR206
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR104
+	.word	.LANCHOR55
+	.size	update_vpc_list, .-update_vpc_list
+	.section	.text.decrement_vpc_count,"ax",%progbits
+	.align	1
+	.global	decrement_vpc_count
+	.thumb
+	.thumb_func
+	.type	decrement_vpc_count, %function
+decrement_vpc_count:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	movw	r3, #65535
+	cmp	r0, r3
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	beq	.L1343
+	ldr	r6, .L1349
+	ldr	r3, [r6, #0]
+	ldrh	r5, [r3, r0, lsl #1]
+	cbnz	r5, .L1344
+	mov	r1, r4
+	ldr	r0, .L1349+4
+	mov	r2, r5
+	bl	printf
+	ldr	r3, [r6, #0]
+	ldrh	r4, [r3, r4, lsl #1]
+	cmp	r4, #0
+	bne	.L1345
+	ldr	r1, .L1349+8
+	movw	r2, #2827
+	ldr	r0, .L1349+12
+	mov	r5, r4
+	bl	printf
+	ldr	r0, .L1349+16
+	ldr	r1, .L1349+20
+	bl	printf
+	b	.L1345
+.L1344:
+	subs	r5, r5, #1
+	strh	r5, [r3, r0, lsl #1]	@ movhi
+.L1343:
+	ldr	r6, .L1349+24
+	movw	r3, #65535
+	ldrh	r0, [r6, #0]
+	cmp	r0, r3
+	bne	.L1346
+	strh	r4, [r6, #0]	@ movhi
+	b	.L1348
+.L1346:
+	cmp	r0, r4
+	beq	.L1348
+	bl	update_vpc_list
+	ldr	r3, .L1349+28
+	strh	r4, [r6, #0]	@ movhi
+	ldr	r2, [r3, #0]
+	ldr	r3, .L1349+32
+	ldr	r3, [r3, #0]
+	subs	r3, r2, r3
+	ldr	r2, .L1349+36
+	adds	r5, r0, #0
+	it	ne
+	movne	r5, #1
+	asrs	r3, r3, #1
+	muls	r3, r2, r3
+	ldr	r2, .L1349
+	uxth	r3, r3
+	ldr	r2, [r2, #0]
+	ldrh	r2, [r2, r3, lsl #1]
+	cbnz	r2, .L1345
+	cmp	r4, r3
+	beq	.L1345
+	ldr	r1, .L1349+8
+	movw	r2, #2843
+	ldr	r0, .L1349+12
+	bl	printf
+	ldr	r1, .L1349+20
+	ldr	r0, .L1349+16
+	bl	printf
+	b	.L1345
+.L1348:
+	movs	r5, #0
+.L1345:
+	mov	r0, r5
+	pop	{r4, r5, r6, pc}
+.L1350:
+	.align	2
+.L1349:
+	.word	.LANCHOR99
+	.word	.LC29
+	.word	.LANCHOR207
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR135
+	.word	.LANCHOR98
+	.word	.LANCHOR97
+	.word	-1431655765
+	.size	decrement_vpc_count, .-decrement_vpc_count
+	.section	.text.get_new_active_ppa,"ax",%progbits
+	.align	1
+	.global	get_new_active_ppa
+	.thumb
+	.thumb_func
+	.type	get_new_active_ppa, %function
+get_new_active_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #0]
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	movw	r3, #65535
+	cmp	r2, r3
+	mov	r4, r0
+	bne	.L1352
+	ldr	r1, .L1367
+	movw	r2, #2749
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1352:
+	ldr	r3, .L1367+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1353
+	ldr	r1, .L1367
+	movw	r2, #2750
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1353:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1354
+	ldr	r1, .L1367
+	movw	r2, #2751
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1354:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	movs	r7, #0
+	movw	r6, #65535
+	strb	r7, [r4, #10]
+	adds	r3, r3, #8
+	ldr	sl, .L1367+24
+	ldr	r8, .L1367+28
+	ldrh	r3, [r4, r3, lsl #1]
+	ldr	r5, .L1367+20
+	b	.L1355
+.L1356:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r5, #0]
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1357
+	ldrh	r3, [r4, #2]
+	strb	r7, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1357:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+.L1355:
+	cmp	r3, r6
+	beq	.L1356
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	cmp	r2, #1
+	bne	.L1358
+	ldrb	r2, [sl, #0]	@ zero_extendqisi2
+	cbnz	r2, .L1358
+	ldrh	r2, [r4, #2]
+	ldrh	r2, [r8, r2, lsl #1]
+	cmp	r2, r6
+	bne	.L1358
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1356
+.L1358:
+	ldrh	r5, [r4, #2]
+	movw	r6, #65535
+	ldr	sl, .L1367+20
+	mov	r8, r6
+	ldr	r7, .L1367+24
+	orr	r5, r5, r3, lsl #10
+	ldrh	r3, [r4, #4]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+.L1363:
+	ldrh	r2, [sl, #0]
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+.L1360:
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, r2
+	bne	.L1359
+	ldrh	r3, [r4, #2]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+.L1359:
+	add	r1, r3, #8
+	ldrh	r1, [r4, r1, lsl #1]
+	cmp	r1, r6
+	beq	.L1360
+	strb	r3, [r4, #6]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1361
+	ldrb	r2, [r7, #0]	@ zero_extendqisi2
+	ldrh	r3, [r4, #2]
+	cbnz	r2, .L1365
+	ldr	r2, .L1367+28
+	ldrh	r3, [r2, r3, lsl #1]
+	cmp	r3, r8
+	bne	.L1361
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1361
+	subs	r3, r3, #1
+	ldrh	r0, [r4, #0]
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	b	.L1363
+.L1365:
+	ldr	r2, .L1367+32
+	ldrh	r2, [r2, #0]
+	cmp	r3, r2
+	bcc	.L1361
+	ldr	r3, .L1367+36
+	ldrh	r2, [r4, #0]
+	ldrh	r1, [r4, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #4]	@ movhi
+	mov	r2, r3	@ movhi
+	ldr	r3, .L1367+16
+	strb	r2, [r4, #6]
+	ldrh	r3, [r3, #0]
+	strh	r3, [r4, #2]	@ movhi
+.L1361:
+	ldr	r3, .L1367+16
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1364
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1364
+	ldr	r1, .L1367
+	movw	r2, #2795
+	ldr	r0, .L1367+4
+	bl	printf
+	ldr	r0, .L1367+8
+	ldr	r1, .L1367+12
+	bl	printf
+.L1364:
+	mov	r0, r5
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1368:
+	.align	2
+.L1367:
+	.word	.LANCHOR208
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.word	.LANCHOR7
+	.word	.LANCHOR9
+	.word	.LANCHOR69
+	.word	.LANCHOR99
+	.size	get_new_active_ppa, .-get_new_active_ppa
+	.section	.text.FtlSlcSuperblockCheck,"ax",%progbits
+	.align	1
+	.global	FtlSlcSuperblockCheck
+	.thumb
+	.thumb_func
+	.type	FtlSlcSuperblockCheck, %function
+FtlSlcSuperblockCheck:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, r8, sl, lr}
+	mov	r4, r0
+	ldrh	r3, [r0, #4]
+	cmp	r3, #0
+	beq	.L1369
+	ldrh	r3, [r0, #0]
+	movw	r5, #65535
+	cmp	r3, r5
+	beq	.L1369
+	ldrb	r3, [r0, #6]	@ zero_extendqisi2
+	movs	r6, #0
+	ldr	sl, .L1375+4
+	adds	r3, r3, #8
+	ldr	r8, .L1375+20
+	ldr	r7, .L1375
+	ldrh	r3, [r0, r3, lsl #1]
+	b	.L1371
+.L1372:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	ldrh	r2, [r7, #0]
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	strb	r3, [r4, #6]
+	cmp	r2, r3
+	bne	.L1373
+	ldrh	r3, [r4, #2]
+	strb	r6, [r4, #6]
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1373:
+	ldrb	r3, [r4, #6]	@ zero_extendqisi2
+	adds	r3, r3, #8
+	ldrh	r3, [r4, r3, lsl #1]
+.L1371:
+	cmp	r3, r5
+	beq	.L1372
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1374
+	ldrb	r2, [sl, #0]	@ zero_extendqisi2
+	cbnz	r2, .L1374
+	ldrh	r2, [r4, #2]
+	ldrh	r2, [r8, r2, lsl #1]
+	cmp	r2, r5
+	bne	.L1374
+	ldrh	r3, [r4, #4]
+	ldrh	r0, [r4, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #4]	@ movhi
+	bl	decrement_vpc_count
+	ldrh	r3, [r4, #4]
+	cmp	r3, #0
+	bne	.L1372
+	ldrh	r2, [r4, #2]
+	strb	r3, [r4, #6]
+	adds	r2, r2, #1
+	strh	r2, [r4, #2]	@ movhi
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1374:
+	ldr	r2, .L1375+4
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1369
+	cmp	r3, #1
+	bne	.L1369
+	ldr	r3, .L1375+8
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1369
+	ldr	r3, .L1375+12
+	ldrh	r2, [r4, #0]
+	ldrh	r1, [r4, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	movs	r3, #0
+	strh	r3, [r4, #4]	@ movhi
+	mov	r2, r3	@ movhi
+	ldr	r3, .L1375+16
+	strb	r2, [r4, #6]
+	ldrh	r3, [r3, #0]
+	strh	r3, [r4, #2]	@ movhi
+.L1369:
+	pop	{r3, r4, r5, r6, r7, r8, sl, pc}
+.L1376:
+	.align	2
+.L1375:
+	.word	.LANCHOR53
+	.word	.LANCHOR7
+	.word	.LANCHOR69
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR9
+	.size	FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck
+	.section	.text.allocate_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_data_superblock
+	.thumb
+	.thumb_func
+	.type	allocate_data_superblock, %function
+allocate_data_superblock:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r7, .L1419
+	sub	sp, sp, #24
+	ldr	r8, .L1419+100
+.L1416:
+	ldr	r1, .L1419+4
+	ldrh	r2, [r7, #0]
+	ldrh	r3, [r1, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1379
+	ldr	r1, .L1419+12
+	movw	r2, #2594
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1379:
+	ldr	r3, .L1419+28
+	cmp	r4, r3
+	bne	.L1380
+	ldr	r3, .L1419+32
+	ldrh	r2, [r7, #0]
+	ldr	r3, [r3, #0]
+	lsrs	r1, r2, #1
+	adds	r0, r1, #1
+	mul	r5, r3, r2
+	add	r0, r0, r5, lsr #2
+	ldr	r5, .L1419+36
+	uxth	r0, r0
+	ldr	r5, [r5, #0]
+	cbz	r5, .L1408
+	ldr	r5, .L1419+40
+	ldr	r5, [r5, #0]
+	cmp	r5, #29
+	bhi	.L1408
+	cmp	r5, #2
+	bls	.L1413
+	lsls	r0, r2, #31
+	bpl	.L1381
+	cbz	r3, .L1410
+	b	.L1381
+.L1380:
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1413
+	ldr	r3, .L1419+44
+	ldrh	r3, [r3, #0]
+	cmp	r3, #1
+	beq	.L1413
+	ldr	r3, .L1419+48
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1413
+	ldr	r2, .L1419+36
+	ldrh	r3, [r7, #0]
+	ldr	r2, [r2, #0]
+	lsrs	r1, r3, #3
+	cbz	r2, .L1381
+	ldr	r2, .L1419+40
+	ldr	r2, [r2, #0]
+	cmp	r2, #1
+	bhi	.L1381
+	movs	r1, #7
+	muls	r1, r3, r1
+	lsrs	r1, r1, #3
+	b	.L1381
+.L1408:
+	mov	r1, r0
+.L1381:
+	cbz	r1, .L1382
+	subs	r1, r1, #1
+	uxth	r1, r1
+	b	.L1382
+.L1410:
+	mov	r1, r3
+	b	.L1382
+.L1413:
+	movs	r1, #0
+.L1382:
+	ldr	r0, .L1419+52
+	bl	List_pop_index_node
+	ldrh	r3, [r7, #0]
+	uxth	r5, r0
+	cbnz	r3, .L1383
+	ldr	r1, .L1419+12
+	movw	r2, #2614
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1383:
+	ldr	r2, .L1419
+	mov	r0, r4
+	ldrh	r3, [r2, #0]
+	subs	r3, r3, #1
+	strh	r3, [r2, #0]	@ movhi
+	strh	r5, [r4, #0]	@ movhi
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1384
+	ldr	r3, .L1419+56
+	movw	r2, #65535
+	ldr	r1, .L1419+4
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldrh	r3, [r1, #0]
+	ldrh	r2, [r7, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1416
+	ldr	r1, .L1419+12
+	movw	r2, #2625
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r1, .L1419+24
+	ldr	r0, .L1419+20
+	bl	printf
+	b	.L1416
+.L1384:
+	ldr	r1, .L1419+4
+	ldrh	r2, [r7, #0]
+	ldrh	r3, [r1, #0]
+	adds	r2, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	ble	.L1386
+	ldr	r1, .L1419+12
+	movw	r2, #2628
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1386:
+	ldr	r3, .L1419+60
+	movs	r6, #0
+	ldr	lr, [r8, #0]
+	mov	sl, r4
+	mov	r1, r4
+	mov	r2, r6
+	ldrh	r3, [r3, #0]
+	mov	r0, r6
+	stmia	sp, {r4, lr}
+	str	r3, [sp, #20]
+	mov	r3, lr
+	b	.L1387
+.L1389:
+	str	r0, [r3, #8]
+	movw	r4, #65535
+	str	r0, [r3, #12]
+	ldrh	ip, [r1, #16]
+	cmp	ip, r4
+	beq	.L1388
+	ldr	r4, [sp, #4]
+	mov	lr, #36
+	lsl	ip, ip, #10
+	mla	fp, lr, r6, r4
+	adds	r6, r6, #1
+	uxth	r6, r6
+	str	ip, [fp, #4]
+.L1388:
+	adds	r2, r2, #1
+	adds	r3, r3, #36
+	adds	r1, r1, #2
+	uxth	r2, r2
+.L1387:
+	ldr	r4, [sp, #20]
+	cmp	r2, r4
+	bne	.L1389
+	ldr	r4, [sp, #0]
+	cbnz	r6, .L1390
+	ldr	r1, .L1419+12
+	mov	r2, #2640
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1390:
+	ldr	r3, .L1419+36
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1391
+	ldr	r3, .L1419+64
+	cmp	r4, r3
+	bne	.L1391
+	ldr	r3, .L1419+68
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r5, lsl #1]
+	cmp	r3, #30
+	bls	.L1391
+	movs	r3, #0
+	strb	r3, [r4, #8]
+.L1391:
+	ldr	r3, .L1419+72
+	ldrh	r3, [r3, #0]
+	cmp	r3, r5
+	bne	.L1392
+	ldr	r1, .L1419+12
+	movw	r2, #2647
+	ldr	r0, .L1419+16
+	bl	printf
+	ldr	r0, .L1419+20
+	ldr	r1, .L1419+24
+	bl	printf
+.L1392:
+	ldr	r3, .L1419+68
+	ldrb	r2, [r4, #8]	@ zero_extendqisi2
+	ldr	r3, [r3, #0]
+	cbnz	r2, .L1393
+	ldrh	r2, [r3, r5, lsl #1]
+	cbz	r2, .L1394
+	ldr	r1, .L1419+76
+	ldrh	r1, [r1, #0]
+	adds	r2, r2, r1
+	b	.L1417
+.L1394:
+	movs	r2, #2
+.L1417:
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	mov	r0, r5
+	ldr	r3, .L1419+80
+	movs	r1, #0
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	b	.L1418
+.L1393:
+	ldrh	r2, [r3, r5, lsl #1]
+	mov	r0, r5
+	movs	r1, #1
+	adds	r2, r2, #1
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	ldr	r3, .L1419+84
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+.L1418:
+	bl	ftl_set_blk_mode
+	ldr	r3, .L1419+68
+	lsl	fp, r5, #1
+	str	fp, [sp, #20]
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r5, lsl #1]
+	ldr	r3, .L1419+88
+	ldr	r1, [r3, #0]
+	cmp	r2, r1
+	it	hi
+	strhi	r2, [r3, #0]
+	ldr	r3, .L1419+76
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1419+80
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1419+84
+	ldr	r3, [r3, #0]
+	mla	r0, r0, r2, r3
+	ldr	r3, .L1419+8
+	ldrh	r1, [r3, #0]
+	bl	__aeabi_uidiv
+	ldr	r3, .L1419+92
+	str	r0, [r3, #0]
+	ldr	r3, .L1419+96
+	ldr	r3, [r3, #0]
+	ldr	r2, [r3, #16]
+	adds	r2, r2, #1
+	str	r2, [r3, #16]
+	ldr	r3, [r8, #0]
+	movs	r2, #0
+	b	.L1398
+.L1420:
+	.align	2
+.L1419:
+	.word	.LANCHOR104
+	.word	.LANCHOR101
+	.word	.LANCHOR55
+	.word	.LANCHOR209
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR109
+	.word	.LANCHOR166
+	.word	.LANCHOR126
+	.word	.LANCHOR164
+	.word	.LANCHOR59
+	.word	.LANCHOR7
+	.word	.LANCHOR103
+	.word	.LANCHOR99
+	.word	.LANCHOR53
+	.word	.LANCHOR107
+	.word	.LANCHOR94
+	.word	.LANCHOR201
+	.word	.LANCHOR63
+	.word	.LANCHOR161
+	.word	.LANCHOR162
+	.word	.LANCHOR163
+	.word	.LANCHOR195
+	.word	.LANCHOR183
+	.word	.LANCHOR93
+.L1399:
+	adds	r2, r2, #1
+	ldr	r1, [r3, #-32]
+	uxth	r2, r2
+	bic	r1, r1, #1020
+	bic	r1, r1, #3
+	str	r1, [r3, #-32]
+.L1398:
+	adds	r3, r3, #36
+	cmp	r2, r6
+	bne	.L1399
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r2, r6
+	mov	fp, #0
+	ldr	r0, [r8, #0]
+	bl	FlashEraseBlocks
+	mov	ip, r5
+	mov	r3, r6
+	mov	r5, fp
+	mov	r6, r4
+	mov	r4, fp
+	b	.L1400
+.L1402:
+	ldr	r1, [r8, #0]
+	add	r0, r1, fp
+	ldr	r1, [r1, fp]
+	adds	r2, r1, #1
+	bne	.L1401
+	ldr	r0, [r0, #4]
+	adds	r5, r5, #1
+	str	r1, [sp, #16]
+	ubfx	r0, r0, #10, #16
+	str	r3, [sp, #12]
+	str	ip, [sp, #8]
+	bl	FtlBbmMapBadBlock
+	ldr	r1, [sp, #16]
+	strh	r1, [sl, #16]	@ movhi
+	ldrb	r1, [r6, #7]	@ zero_extendqisi2
+	subs	r1, r1, #1
+	strb	r1, [r6, #7]
+	ldr	ip, [sp, #8]
+	ldr	r3, [sp, #12]
+.L1401:
+	adds	r4, r4, #1
+	add	fp, fp, #36
+	add	sl, sl, #2
+	uxth	r4, r4
+.L1400:
+	cmp	r4, r3
+	bne	.L1402
+	mov	r3, r5
+	mov	r4, r6
+	mov	r5, ip
+	cbz	r3, .L1403
+	mov	r0, ip
+	bl	update_multiplier_value
+	bl	FtlBbmTblFlush
+.L1403:
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1404
+	ldr	r3, .L1421
+	movw	r2, #65535
+	ldr	r3, [r3, #0]
+	strh	r2, [r3, r5, lsl #1]	@ movhi
+	b	.L1416
+.L1404:
+	ldr	r2, .L1421+4
+	ldr	fp, [sp, #20]
+	ldrh	r2, [r2, #0]
+	muls	r3, r2, r3
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	uxth	r3, r3
+	ldr	r2, .L1421+8
+	strh	r5, [r4, #0]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	ldr	r1, [r2, #0]
+	str	r1, [r4, #12]
+	adds	r1, r1, #1
+	str	r1, [r2, #0]
+	ldr	r2, .L1421
+	ldr	r2, [r2, #0]
+	strh	r3, [r2, fp]	@ movhi
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1405
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cbnz	r3, .L1406
+.L1405:
+	ldr	r1, .L1421+12
+	movw	r2, #2700
+	ldr	r0, .L1421+16
+	bl	printf
+	ldr	r0, .L1421+20
+	ldr	r1, .L1421+24
+	bl	printf
+.L1406:
+	movs	r0, #0
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1422:
+	.align	2
+.L1421:
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR153
+	.word	.LANCHOR209
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	allocate_data_superblock, .-allocate_data_superblock
+	.section	.text.FtlSuperblockPowerLostFix,"ax",%progbits
+	.align	1
+	.global	FtlSuperblockPowerLostFix
+	.thumb
+	.thumb_func
+	.type	FtlSuperblockPowerLostFix, %function
+FtlSuperblockPowerLostFix:
+	@ args = 0, pretend = 0, frame = 40
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1430
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	sub	sp, sp, #40
+	cbz	r7, .L1424
+	ldrb	r7, [r0, #8]	@ zero_extendqisi2
+	sub	r5, r7, #1
+	rsbs	r7, r5, #0
+	adc	r7, r7, r5
+.L1424:
+	mov	r8, #7
+	mov	r5, #-1
+	ldr	sl, .L1430+16
+	ldr	fp, .L1430+20
+	ldr	r6, .L1430+4
+	b	.L1425
+.L1428:
+	ldrh	r3, [r4, #4]
+	cbz	r3, .L1426
+	mov	r0, r4
+	bl	get_new_active_ppa
+	str	r0, [sp, #8]
+	adds	r0, r0, #1
+	beq	.L1426
+	ldr	r3, [sl, #0]
+	add	r0, sp, #4
+	ldr	r2, [fp, #0]
+	ldr	r1, [r6, #0]
+	str	r3, [sp, #12]
+	ldrh	r3, [r4, #0]
+	str	r2, [sp, #16]
+	str	r5, [sp, #20]
+	strh	r3, [r2, #2]	@ movhi
+	movs	r3, #0
+	str	r1, [r2, #4]
+	strh	r3, [r2, #0]	@ movhi
+	str	r5, [r2, #8]
+	str	r5, [r2, #12]
+	adds	r2, r1, #1
+	cmp	r2, #-1
+	it	eq
+	moveq	r2, r3
+	movs	r1, #1
+	str	r2, [r6, #0]
+	mov	r2, r7
+	bl	FlashProgPages
+	ldrh	r0, [r4, #0]
+	bl	decrement_vpc_count
+.L1425:
+	subs	r8, r8, #1
+	bne	.L1428
+.L1426:
+	ldr	r3, .L1430+8
+	ldrh	r2, [r4, #0]
+	ldrh	r1, [r4, #4]
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, r2, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L1430+12
+	ldrh	r3, [r3, #0]
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #0
+	strb	r3, [r4, #6]
+	strh	r3, [r4, #4]	@ movhi
+	add	sp, sp, #40
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1431:
+	.align	2
+.L1430:
+	.word	.LANCHOR7
+	.word	.LANCHOR154
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.size	FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix
+	.section	.text.FtlLowFormatEraseBlock,"ax",%progbits
+	.align	1
+	.global	FtlLowFormatEraseBlock
+	.thumb
+	.thumb_func
+	.type	FtlLowFormatEraseBlock, %function
+FtlLowFormatEraseBlock:
+	@ args = 0, pretend = 0, frame = 24
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1462
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	movs	r6, #0
+	str	r0, [sp, #12]
+	mov	r8, r1
+	mov	r4, r6
+	mov	r5, r6
+	str	r3, [sp, #8]
+	movs	r7, #36
+	ldr	r3, .L1462+4
+	ldr	sl, .L1462+24
+	str	r0, [r3, #0]
+	b	.L1433
+.L1437:
+	mul	r3, r7, r6
+	ldr	r1, .L1462+8
+	ldr	fp, [sl, #0]
+	movs	r0, #0
+	str	r0, [fp, r3]
+	ldrb	r0, [r1, r6]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bl	V2P_block
+	str	r0, [sp, #4]
+	cmp	r8, #0
+	beq	.L1434
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1435
+.L1434:
+	ldr	r0, [sp, #4]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1436
+	mul	r3, r7, r4
+	ldr	r2, [sl, #0]
+	ldr	ip, [sp, #4]
+	adds	r2, r2, r3
+	add	r3, fp, r3
+	lsl	r1, ip, #10
+	str	r0, [r3, #8]
+	ldr	r0, .L1462+12
+	str	r1, [r2, #4]
+	ldrh	r2, [r0, #0]
+	muls	r2, r4, r2
+	ldr	r0, .L1462+16
+	adds	r4, r4, #1
+	bic	r2, r2, #3
+	uxth	r4, r4
+	ldr	r1, [r0, #0]
+	adds	r2, r1, r2
+	str	r2, [r3, #12]
+	b	.L1435
+.L1436:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1435:
+	adds	r6, r6, #1
+	uxth	r6, r6
+.L1433:
+	ldr	r1, .L1462+20
+	ldrh	r3, [r1, #0]
+	cmp	r3, r6
+	bhi	.L1437
+	cmp	r4, #0
+	beq	.L1439
+	ldr	r2, [sp, #8]
+	mov	sl, #0
+	ldr	r7, .L1462+24
+	mov	fp, sl
+	adds	r6, r2, #0
+	mov	r2, r4
+	it	ne
+	movne	r6, #1
+	ldr	r0, [r7, #0]
+	mov	r1, r6
+	bl	FlashEraseBlocks
+.L1441:
+	ldr	r3, [r7, #0]
+	add	r2, r3, sl
+	ldr	r3, [r3, sl]
+	adds	r3, r3, #1
+	bne	.L1440
+	ldr	r0, [r2, #4]
+	adds	r5, r5, #1
+	ubfx	r0, r0, #10, #16
+	uxth	r5, r5
+	bl	FtlBbmMapBadBlock
+.L1440:
+	add	fp, fp, #1
+	add	sl, sl, #36
+	uxth	fp, fp
+	cmp	fp, r4
+	bne	.L1441
+	cmp	r8, #0
+	beq	.L1455
+	ldr	r3, .L1462+28
+	ldrh	r3, [r3, #0]
+	str	r3, [sp, #8]
+	ldr	r3, .L1462
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1456
+	ldr	ip, [sp, #8]
+	movs	r6, #1
+	lsr	ip, ip, #2
+	str	ip, [sp, #4]
+	b	.L1442
+.L1455:
+	mov	ip, #6
+	str	ip, [sp, #4]
+	mov	ip, #1
+	str	ip, [sp, #8]
+	b	.L1442
+.L1456:
+	movs	r6, #1
+	str	r6, [sp, #4]
+.L1442:
+	ldr	sl, .L1462+24
+	movs	r7, #0
+.L1450:
+	mov	fp, #0
+	mov	r4, fp
+	b	.L1443
+.L1446:
+	mov	ip, #36
+	ldr	r2, [sl, #0]
+	ldr	r1, .L1462+8
+	movs	r0, #0
+	mul	r3, ip, fp
+	str	r2, [sp, #16]
+	str	r0, [r2, r3]
+	ldrb	r0, [r1, fp]	@ zero_extendqisi2
+	ldr	r1, [sp, #12]
+	bl	V2P_block
+	str	r0, [sp, #20]
+	cmp	r8, #0
+	beq	.L1444
+	bl	IsBlkInVendorPart
+	cbnz	r0, .L1445
+.L1444:
+	ldr	r0, [sp, #20]
+	bl	FtlBbmIsBadBlock
+	cbnz	r0, .L1445
+	ldr	r2, [sp, #16]
+	mov	ip, #36
+	ldr	r1, [sp, #20]
+	ldr	r0, .L1462+32
+	mla	r3, ip, r4, r2
+	add	r2, r7, r1, lsl #10
+	ldr	r1, .L1462+12
+	str	r2, [r3, #4]
+	ldr	r2, [r0, #0]
+	ldr	r0, .L1462+36
+	str	r2, [r3, #8]
+	ldrh	r2, [r1, #0]
+	muls	r2, r4, r2
+	adds	r4, r4, #1
+	ldr	r1, [r0, #0]
+	bic	r2, r2, #3
+	uxth	r4, r4
+	adds	r2, r1, r2
+	str	r2, [r3, #12]
+.L1445:
+	add	fp, fp, #1
+	uxth	fp, fp
+.L1443:
+	ldr	r1, .L1462+20
+	ldrh	r3, [r1, #0]
+	cmp	r3, fp
+	bhi	.L1446
+	cmp	r4, #0
+	beq	.L1439
+	mov	r1, r4
+	mov	r2, r6
+	ldr	r0, [sl, #0]
+	movs	r3, #1
+	mov	fp, #0
+	bl	FlashProgPages
+	mov	ip, r8
+	mov	r8, r6
+	mov	r6, r4
+	mov	r4, fp
+.L1449:
+	ldr	r2, [sl, #0]
+	add	r1, r2, fp
+	ldr	r2, [r2, fp]
+	cbz	r2, .L1448
+	ldr	r0, [r1, #4]
+	adds	r5, r5, #1
+	str	ip, [sp, #0]
+	ubfx	r0, r0, #10, #16
+	uxth	r5, r5
+	bl	FtlBbmMapBadBlock
+	ldr	ip, [sp, #0]
+.L1448:
+	adds	r4, r4, #1
+	add	fp, fp, #36
+	uxth	r4, r4
+	cmp	r4, r6
+	bne	.L1449
+	mov	r4, r6
+	mov	r6, r8
+	mov	r8, ip
+	ldr	ip, [sp, #4]
+	add	r7, r7, ip
+	ldr	ip, [sp, #8]
+	uxth	r7, r7
+	cmp	r7, ip
+	bcc	.L1450
+	movs	r7, #0
+	ldr	fp, .L1462+24
+	mov	sl, r7
+.L1452:
+	cmp	r8, #0
+	beq	.L1451
+	ldr	r3, [fp, #0]
+	adds	r2, r3, r7
+	ldr	r3, [r3, r7]
+	cbnz	r3, .L1451
+	ldr	r0, [r2, #4]
+	movs	r1, #1
+	ubfx	r0, r0, #10, #16
+	bl	FtlFreeSysBlkQueueIn
+.L1451:
+	add	sl, sl, #1
+	adds	r7, r7, #36
+	uxth	sl, sl
+	cmp	sl, r4
+	bne	.L1452
+	ldr	r0, [sp, #12]
+	cmp	r0, #63
+	bls	.L1453
+	cmp	r8, #0
+	beq	.L1439
+.L1453:
+	ldr	r3, .L1462+24
+	mov	r1, r6
+	mov	r2, r4
+	ldr	r0, [r3, #0]
+	bl	FlashEraseBlocks
+.L1439:
+	mov	r0, r5
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1463:
+	.align	2
+.L1462:
+	.word	.LANCHOR7
+	.word	.LANCHOR88
+	.word	.LANCHOR62
+	.word	.LANCHOR74
+	.word	.LANCHOR181
+	.word	.LANCHOR53
+	.word	.LANCHOR93
+	.word	.LANCHOR69
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.size	FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
+	.section	.text.FlashTestBlk,"ax",%progbits
+	.align	1
+	.global	FlashTestBlk
+	.thumb
+	.thumb_func
+	.type	FlashTestBlk, %function
+FlashTestBlk:
+	@ args = 0, pretend = 0, frame = 104
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1469
+	push	{r4, r5, lr}
+	mov	r4, r0
+	ldr	r3, [r3, #0]
+	sub	sp, sp, #108
+	cmp	r0, r3
+	bcc	.L1467
+.L1466:
+	ldr	r5, .L1469+4
+	add	r0, sp, #4
+	movs	r1, #165
+	movs	r2, #32
+	str	r0, [sp, #80]
+	lsls	r4, r4, #10
+	ldr	r3, [r5, #0]
+	str	r3, [sp, #76]
+	bl	memset
+	movs	r1, #90
+	movs	r2, #8
+	ldr	r0, [r5, #0]
+	bl	memset
+	movs	r1, #1
+	mov	r2, r1
+	add	r0, sp, #68
+	str	r4, [sp, #72]
+	bl	FlashEraseBlocks
+	movs	r1, #1
+	add	r0, sp, #68
+	mov	r2, r1
+	mov	r3, r1
+	bl	FlashProgPages
+	ldr	r4, [sp, #68]
+	add	r0, sp, #68
+	movs	r1, #0
+	movs	r2, #1
+	cmp	r4, #0
+	ite	ne
+	movne	r4, #-1
+	moveq	r4, #0
+	bl	FlashEraseBlocks
+	b	.L1465
+.L1467:
+	movs	r4, #0
+.L1465:
+	mov	r0, r4
+	add	sp, sp, #108
+	pop	{r4, r5, pc}
+.L1470:
+	.align	2
+.L1469:
+	.word	.LANCHOR46
+	.word	.LANCHOR41
+	.size	FlashTestBlk, .-FlashTestBlk
+	.section	.text.ftl_map_blk_gc,"ax",%progbits
+	.align	1
+	.global	ftl_map_blk_gc
+	.thumb
+	.thumb_func
+	.type	ftl_map_blk_gc, %function
+ftl_map_blk_gc:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	ldr	sl, [r0, #24]
+	bl	ftl_free_no_use_map_blk
+	ldrh	r3, [r4, #10]
+	ldrh	r2, [r4, #8]
+	subs	r3, r3, #4
+	cmp	r2, r3
+	blt	.L1472
+	uxth	r0, r0
+	ldrh	r7, [r5, r0, lsl #1]
+	cmp	r7, #0
+	beq	.L1472
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	bne	.L1472
+	movs	r2, #1
+	str	r2, [r4, #32]
+	strh	r3, [r5, r0, lsl #1]	@ movhi
+	ldrh	r3, [r4, #8]
+	ldrh	r2, [r4, #2]
+	subs	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	ldr	r3, .L1480
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1473
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1473:
+	movs	r5, #0
+	ldr	r6, .L1480+4
+	ldr	fp, .L1480+28
+	mov	r8, r7
+	b	.L1474
+.L1478:
+	lsls	r3, r5, #2
+	str	r3, [sp, #4]
+	ldr	r3, [sl, r5, lsl #2]
+	cmp	r8, r3, lsr #10
+	bne	.L1475
+	ldr	r2, [fp, #0]
+	movs	r1, #1
+	ldr	r0, .L1480+4
+	str	r3, [r6, #4]
+	str	r2, [r6, #8]
+	ldr	r2, .L1480+8
+	ldr	r7, [r2, #0]
+	mov	r2, r1
+	str	r7, [r6, #12]
+	bl	FlashReadPages
+	ldrh	r3, [r7, #8]
+	cmp	r3, r5
+	beq	.L1476
+	ldr	r1, .L1480+12
+	movw	r2, #585
+	ldr	r0, .L1480+16
+	bl	printf
+	ldr	r0, .L1480+20
+	ldr	r1, .L1480+24
+	bl	printf
+.L1476:
+	ldr	r3, .L1480+4
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	bne	.L1477
+	ldr	r2, [sp, #4]
+	movs	r3, #0
+	str	r3, [sl, r2]
+	b	.L1475
+.L1477:
+	mov	r0, r4
+	mov	r1, r5
+	ldr	r2, [r6, #8]
+	bl	FtlMapWritePage
+.L1475:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1474:
+	ldrh	r3, [r4, #6]
+	cmp	r3, r5
+	bhi	.L1478
+	mov	r7, r8
+	mov	r0, r8
+	movs	r1, #1
+	bl	FtlFreeSysBlkQueueIn
+	movs	r3, #0
+	str	r3, [r4, #32]
+.L1472:
+	ldr	r3, .L1480
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1479
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1479:
+	movs	r0, #0
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1481:
+	.align	2
+.L1480:
+	.word	.LANCHOR69
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.word	.LANCHOR210
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR176
+	.size	ftl_map_blk_gc, .-ftl_map_blk_gc
+	.section	.text.Ftl_write_map_blk_to_last_page,"ax",%progbits
+	.align	1
+	.global	Ftl_write_map_blk_to_last_page
+	.thumb
+	.thumb_func
+	.type	Ftl_write_map_blk_to_last_page, %function
+Ftl_write_map_blk_to_last_page:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movw	r2, #65535
+	ldrh	r3, [r0, #0]
+	mov	r4, r0
+	ldr	r5, [r0, #12]
+	cmp	r3, r2
+	ldr	r7, [r0, #24]
+	bne	.L1483
+	ldrh	r3, [r0, #8]
+	cbz	r3, .L1484
+	ldr	r1, .L1489
+	movw	r2, #613
+	ldr	r0, .L1489+4
+	bl	printf
+	ldr	r0, .L1489+8
+	ldr	r1, .L1489+12
+	bl	printf
+.L1484:
+	ldrh	r3, [r4, #8]
+	adds	r3, r3, #1
+	strh	r3, [r4, #8]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	movs	r3, #0
+	strh	r0, [r5, #0]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	strh	r3, [r4, #0]	@ movhi
+	ldr	r3, [r4, #28]
+	adds	r3, r3, #1
+	str	r3, [r4, #28]
+	b	.L1485
+.L1483:
+	ldrh	r5, [r5, r3, lsl #1]
+	movs	r1, #255
+	ldr	r2, .L1489+16
+	ldrh	r3, [r0, #2]
+	ldr	r6, .L1489+20
+	orr	r3, r3, r5, lsl #10
+	str	r3, [r2, #4]
+	ldr	r3, .L1489+24
+	ldr	r0, [r6, #0]
+	ldr	r3, [r3, #0]
+	str	r0, [r2, #8]
+	str	r3, [r2, #12]
+	ldr	r2, [r4, #28]
+	str	r2, [r3, #4]
+	movw	r2, #64245
+	strh	r2, [r3, #8]	@ movhi
+	ldrh	r2, [r4, #4]
+	strh	r5, [r3, #2]	@ movhi
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L1489+28
+	ldrh	r2, [r3, #0]
+	lsls	r2, r2, #3
+	bl	memset
+	movs	r3, #0
+	ldrh	r0, [r4, #6]
+	mov	r2, r3
+	ldr	r1, [r6, #0]
+	b	.L1486
+.L1488:
+	ldr	r6, [r7], #4
+	cmp	r5, r6, lsr #10
+	bne	.L1487
+	adds	r2, r2, #1
+	uxth	r2, r2
+	str	r3, [r1, r2, lsl #3]
+	add	r6, r1, r2, lsl #3
+	ldr	lr, [r7, #-4]
+	str	lr, [r6, #4]
+.L1487:
+	adds	r3, r3, #1
+.L1486:
+	uxth	r6, r3
+	cmp	r6, r0
+	bcc	.L1488
+	movs	r1, #1
+	movs	r3, #0
+	ldr	r0, .L1489+16
+	mov	r2, r1
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	mov	r0, r4
+	adds	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+	bl	ftl_map_blk_gc
+.L1485:
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1490:
+	.align	2
+.L1489:
+	.word	.LANCHOR211
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR197
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR69
+	.size	Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
+	.section	.text.FtlMapWritePage,"ax",%progbits
+	.align	1
+	.global	FtlMapWritePage
+	.thumb
+	.thumb_func
+	.type	FtlMapWritePage, %function
+FtlMapWritePage:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r7, .L1507
+	movs	r6, #0
+	ldr	r8, .L1507+32
+	ldr	r5, .L1507+4
+	ldr	fp, .L1507+36
+	stmia	sp, {r1, r2}
+.L1505:
+	ldr	r3, [r7, #0]
+	ldrh	r2, [r4, #2]
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #1
+	cmp	r2, r3
+	bge	.L1493
+	ldrh	r3, [r4, #0]
+	movw	r1, #65535
+	cmp	r3, r1
+	bne	.L1494
+.L1493:
+	mov	r0, r4
+	bl	Ftl_write_map_blk_to_last_page
+.L1494:
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r4, #12]
+	ldrh	r3, [r3, r2, lsl #1]
+	cbnz	r3, .L1495
+	ldr	r1, .L1507+8
+	movw	r2, #671
+	ldr	r0, .L1507+12
+	bl	printf
+	ldr	r0, .L1507+16
+	ldr	r1, .L1507+20
+	bl	printf
+.L1495:
+	ldrh	r2, [r4, #0]
+	ldrh	r3, [r4, #10]
+	cmp	r2, r3
+	bcc	.L1496
+	ldr	r1, .L1507+8
+	mov	r2, #672
+	ldr	r0, .L1507+12
+	bl	printf
+	ldr	r0, .L1507+16
+	ldr	r1, .L1507+20
+	bl	printf
+.L1496:
+	ldrh	r2, [r4, #0]
+	movs	r1, #0
+	ldr	r3, [r4, #12]
+	ldr	r0, [fp, #0]
+	ldrh	sl, [r3, r2, lsl #1]
+	ldr	r2, [sp, #4]
+	ldrh	r3, [r4, #2]
+	str	r0, [r5, #12]
+	str	r2, [r5, #8]
+	movs	r2, #16
+	orr	r3, r3, sl, lsl #10
+	str	r3, [r5, #4]
+	bl	memset
+	ldr	r3, [r5, #12]
+	ldr	r2, [r4, #28]
+	ldr	r1, [sp, #0]
+	ldr	r0, .L1507+4
+	str	r2, [r3, #4]
+	ldrh	r2, [r4, #4]
+	strh	r1, [r3, #8]	@ movhi
+	movs	r1, #1
+	strh	sl, [r3, #2]	@ movhi
+	strh	r2, [r3, #0]	@ movhi
+	mov	r2, r1
+	mov	r3, r1
+	bl	FlashProgPages
+	ldrh	r3, [r4, #2]
+	ldr	r2, [r5, #0]
+	adds	r3, r3, #1
+	adds	r2, r2, #1
+	uxth	r3, r3
+	strh	r3, [r4, #2]	@ movhi
+	bne	.L1497
+	ldr	r0, .L1507+24
+	adds	r6, r6, #1
+	ldr	r1, [r5, #4]
+	bl	printf
+	ldrh	r3, [r4, #2]
+	uxth	r6, r6
+	cmp	r3, #2
+	bhi	.L1498
+	ldrh	r3, [r8, #0]
+	subs	r3, r3, #1
+	strh	r3, [r4, #2]	@ movhi
+.L1498:
+	cmp	r6, #3
+	bls	.L1499
+	ldr	r3, .L1507+4
+	mov	r2, r6
+	ldr	r0, .L1507+28
+	ldr	r1, [r3, #4]
+	bl	printf
+.L1500:
+	b	.L1500
+.L1499:
+	ldr	r3, [r4, #32]
+	cmp	r3, #0
+	beq	.L1505
+.L1506:
+	b	.L1506
+.L1497:
+	cmp	r3, #1
+	beq	.L1505
+	ldr	r3, .L1507+4
+	movs	r0, #0
+	ldr	r1, [sp, #0]
+	ldr	r2, [r3, #4]
+	ldr	r3, [r4, #24]
+	str	r2, [r3, r1, lsl #2]
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1508:
+	.align	2
+.L1507:
+	.word	.LANCHOR159
+	.word	.LANCHOR197
+	.word	.LANCHOR212
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC30
+	.word	.LC31
+	.word	.LANCHOR69
+	.word	.LANCHOR180
+	.size	FtlMapWritePage, .-FtlMapWritePage
+	.section	.text.FtlMapBlkWriteDumpData,"ax",%progbits
+	.align	1
+	.global	FtlMapBlkWriteDumpData
+	.thumb
+	.thumb_func
+	.type	FtlMapBlkWriteDumpData, %function
+FtlMapBlkWriteDumpData:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, [r0, #36]
+	push	{r4, r5, r6, r7, r8, lr}
+	mov	r4, r0
+	ldrh	r6, [r0, #6]
+	ldr	r8, [r0, #24]
+	cmp	r3, #0
+	beq	.L1509
+	movs	r3, #0
+	str	r3, [r0, #36]
+	ldr	r3, .L1515
+	ldr	r5, .L1515+4
+	ldr	r3, [r3, #0]
+	str	r3, [r5, #8]
+	ldr	r3, .L1515+8
+	ldr	r7, [r3, #0]
+	ldrh	r3, [r0, #2]
+	str	r7, [r5, #12]
+	cbz	r3, .L1511
+	ldr	r2, .L1515+12
+	ldrh	r2, [r2, #0]
+	subs	r2, r2, #1
+	cmp	r3, r2
+	bge	.L1511
+	ldrh	r2, [r0, #0]
+	movw	r1, #65535
+	cmp	r2, r1
+	beq	.L1511
+	ldr	r1, [r0, #12]
+	subs	r3, r3, #1
+	mov	r0, r5
+	ldrh	r2, [r1, r2, lsl #1]
+	movs	r1, #1
+	orr	r3, r3, r2, lsl #10
+	mov	r2, r1
+	str	r3, [r5, #4]
+	bl	FlashReadPages
+	ldr	r3, [r5, #0]
+	adds	r3, r3, #1
+	beq	.L1511
+	ldr	r3, [r4, #24]
+	ldrh	r1, [r7, #8]
+	ldr	r2, [r3, r1, lsl #2]
+	ldr	r3, [r5, #4]
+	cmp	r2, r3
+	bne	.L1511
+	mov	r0, r4
+	b	.L1514
+.L1511:
+	subs	r6, r6, #1
+	ldr	r5, .L1515+4
+	uxth	r6, r6
+	ldr	r3, [r8, r6, lsl #2]
+	str	r3, [r5, #4]
+	cbz	r3, .L1512
+	movs	r1, #1
+	mov	r0, r5
+	mov	r2, r1
+	bl	FlashReadPages
+	b	.L1513
+.L1512:
+	ldr	r3, .L1515+16
+	movs	r1, #255
+	ldr	r0, [r5, #8]
+	ldrh	r2, [r3, #0]
+	bl	memset
+.L1513:
+	mov	r0, r4
+	mov	r1, r6
+.L1514:
+	ldr	r2, [r5, #8]
+	pop	{r4, r5, r6, r7, r8, lr}
+	b	FtlMapWritePage
+.L1509:
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1516:
+	.align	2
+.L1515:
+	.word	.LANCHOR176
+	.word	.LANCHOR197
+	.word	.LANCHOR180
+	.word	.LANCHOR69
+	.word	.LANCHOR73
+	.size	FtlMapBlkWriteDumpData, .-FtlMapBlkWriteDumpData
+	.section	.text.FtlVendorPartWrite,"ax",%progbits
+	.align	1
+	.global	FtlVendorPartWrite
+	.thumb
+	.thumb_func
+	.type	FtlVendorPartWrite, %function
+FtlVendorPartWrite:
+	@ args = 0, pretend = 0, frame = 56
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1527
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #56
+	ldrh	sl, [r3, #0]
+	mov	r6, r0
+	ldr	r3, .L1527+4
+	mov	r4, r1
+	str	r2, [sp, #8]
+	adds	r2, r1, r0
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bhi	.L1525
+	lsr	sl, r0, sl
+	mov	fp, #0
+	ldr	r7, .L1527+8
+	lsl	r3, sl, #2
+	str	r3, [sp, #4]
+	b	.L1519
+.L1524:
+	ldr	r2, .L1527+12
+	mov	r0, r6
+	ldr	r3, [r2, #0]
+	ldr	r2, [sp, #4]
+	ldr	r3, [r3, r2]
+	ldr	r2, .L1527+16
+	ldrh	r8, [r2, #0]
+	str	r3, [sp, #0]
+	mov	r1, r8
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #0]
+	uxth	r1, r1
+	str	r1, [sp, #12]
+	rsb	r5, r1, r8
+	uxth	r5, r5
+	cmp	r5, r4
+	it	hi
+	uxthhi	r5, r4
+	cbz	r3, .L1521
+	cmp	r5, r8
+	beq	.L1521
+	str	r3, [sp, #24]
+	movs	r1, #1
+	ldr	r3, [r7, #0]
+	add	r0, sp, #20
+	mov	r2, r1
+	str	r3, [sp, #28]
+	movs	r3, #0
+	str	r3, [sp, #32]
+	bl	FlashReadPages
+	b	.L1522
+.L1521:
+	ldr	r3, .L1527+20
+	movs	r1, #0
+	ldr	r0, [r7, #0]
+	ldrh	r2, [r3, #0]
+	bl	memset
+.L1522:
+	ldr	r3, [sp, #12]
+	lsl	r8, r5, #9
+	ldr	r0, [r7, #0]
+	mov	r2, r8
+	ldr	r1, [sp, #8]
+	subs	r4, r4, r5
+	add	r0, r0, r3, lsl #9
+	adds	r6, r6, r5
+	bl	memcpy
+	mov	r1, sl
+	ldr	r0, .L1527+24
+	add	sl, sl, #1
+	ldr	r2, [r7, #0]
+	bl	FtlMapWritePage
+	ldr	r3, [sp, #8]
+	add	r3, r3, r8
+	str	r3, [sp, #8]
+	ldr	r3, [sp, #4]
+	adds	r3, r3, #4
+	str	r3, [sp, #4]
+	cmp	r0, #-1
+	it	eq
+	moveq	fp, #-1
+.L1519:
+	cmp	r4, #0
+	bne	.L1524
+	b	.L1518
+.L1525:
+	mov	fp, #-1
+.L1518:
+	mov	r0, fp
+	add	sp, sp, #56
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1528:
+	.align	2
+.L1527:
+	.word	.LANCHOR72
+	.word	.LANCHOR65
+	.word	.LANCHOR177
+	.word	.LANCHOR186
+	.word	.LANCHOR71
+	.word	.LANCHOR73
+	.word	.LANCHOR213
+	.size	FtlVendorPartWrite, .-FtlVendorPartWrite
+	.section	.text.Ftl_save_ext_data,"ax",%progbits
+	.align	1
+	.global	Ftl_save_ext_data
+	.thumb
+	.thumb_func
+	.type	Ftl_save_ext_data, %function
+Ftl_save_ext_data:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	ldr	r2, .L1531
+	ldr	r3, .L1531+4
+	ldr	r1, [r2, #0]
+	cmp	r1, r3
+	bne	.L1529
+	ldr	r3, .L1531+8
+	movs	r0, #0
+	movs	r1, #1
+	str	r3, [r2, #4]
+	ldr	r3, .L1531+12
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #88]
+	ldr	r3, .L1531+16
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #92]
+	ldr	r3, .L1531+20
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #8]
+	ldr	r3, .L1531+24
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #12]
+	ldr	r3, .L1531+28
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #16]
+	ldr	r3, .L1531+32
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #20]
+	ldr	r3, .L1531+36
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #28]
+	ldr	r3, .L1531+40
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #32]
+	ldr	r3, .L1531+44
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #36]
+	ldr	r3, .L1531+48
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #40]
+	ldr	r3, .L1531+52
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #44]
+	ldr	r3, .L1531+56
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #48]
+	ldr	r3, .L1531+60
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #60]
+	ldr	r3, .L1531+64
+	ldr	r3, [r3, #0]
+	str	r3, [r2, #64]
+	b	FtlVendorPartWrite
+.L1529:
+	bx	lr
+.L1532:
+	.align	2
+.L1531:
+	.word	.LANCHOR141
+	.word	1179929683
+	.word	1342177344
+	.word	.LANCHOR193
+	.word	.LANCHOR194
+	.word	.LANCHOR155
+	.word	.LANCHOR156
+	.word	.LANCHOR160
+	.word	.LANCHOR159
+	.word	.LANCHOR162
+	.word	.LANCHOR95
+	.word	.LANCHOR157
+	.word	.LANCHOR158
+	.word	.LANCHOR163
+	.word	.LANCHOR164
+	.word	.LANCHOR152
+	.word	.LANCHOR151
+	.size	Ftl_save_ext_data, .-Ftl_save_ext_data
+	.section	.text.FtlEctTblFlush,"ax",%progbits
+	.align	1
+	.global	FtlEctTblFlush
+	.thumb
+	.thumb_func
+	.type	FtlEctTblFlush, %function
+FtlEctTblFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1540
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1538
+	ldr	r3, .L1540+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #29
+	ite	ls
+	movls	r3, #4
+	movhi	r3, #32
+	b	.L1534
+.L1538:
+	movs	r3, #32
+.L1534:
+	ldr	r2, .L1540+8
+	ldrh	r1, [r2, #0]
+	cmp	r1, #31
+	bhi	.L1535
+	movs	r3, #1
+	adds	r1, r1, #1
+	strh	r1, [r2, #0]	@ movhi
+.L1535:
+	ldr	r2, .L1540+12
+	cbnz	r0, .L1536
+	ldr	r1, [r2, #0]
+	ldr	r0, [r1, #20]
+	ldr	r1, [r1, #16]
+	adds	r3, r3, r0
+	cmp	r1, r3
+	bcc	.L1537
+.L1536:
+	ldr	r2, [r2, #0]
+	movs	r0, #64
+	ldr	r3, [r2, #16]
+	str	r3, [r2, #20]
+	ldr	r3, .L1540+16
+	str	r3, [r2, #0]
+	ldr	r3, .L1540+20
+	ldrh	r1, [r3, #0]
+	lsls	r3, r1, #9
+	str	r3, [r2, #12]
+	ldr	r3, [r2, #8]
+	adds	r3, r3, #1
+	str	r3, [r2, #8]
+	movs	r3, #0
+	str	r3, [r2, #4]
+	bl	FtlVendorPartWrite
+	bl	Ftl_save_ext_data
+.L1537:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1541:
+	.align	2
+.L1540:
+	.word	.LANCHOR126
+	.word	.LANCHOR164
+	.word	.LANCHOR214
+	.word	.LANCHOR183
+	.word	1112818501
+	.word	.LANCHOR182
+	.size	FtlEctTblFlush, .-FtlEctTblFlush
+	.section	.text.flush_l2p_region,"ax",%progbits
+	.align	1
+	.global	flush_l2p_region
+	.thumb
+	.thumb_func
+	.type	flush_l2p_region, %function
+flush_l2p_region:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #12
+	muls	r4, r0, r4
+	ldr	r5, .L1543
+	ldr	r0, .L1543+4
+	ldr	r2, [r5, #0]
+	adds	r3, r2, r4
+	ldrh	r1, [r2, r4]
+	ldr	r2, [r3, #8]
+	bl	FtlMapWritePage
+	ldr	r3, [r5, #0]
+	movs	r0, #0
+	adds	r4, r3, r4
+	ldr	r3, [r4, #4]
+	bic	r3, r3, #-2147483648
+	str	r3, [r4, #4]
+	pop	{r3, r4, r5, pc}
+.L1544:
+	.align	2
+.L1543:
+	.word	.LANCHOR112
+	.word	.LANCHOR120
+	.size	flush_l2p_region, .-flush_l2p_region
+	.section	.text.log2phys,"ax",%progbits
+	.align	1
+	.global	log2phys
+	.thumb
+	.thumb_func
+	.type	log2phys, %function
+log2phys:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1555
+	push	{r4, r5, r6, r7, r8, lr}
+	movs	r5, #1
+	ldrh	r3, [r3, #0]
+	mov	r6, r1
+	mov	r7, r2
+	adds	r3, r3, #7
+	lsr	r4, r0, r3
+	lsl	r5, r5, r3
+	ldr	r3, .L1555+4
+	subs	r5, r5, #1
+	ands	r5, r5, r0
+	uxth	r4, r4
+	ldr	r3, [r3, #0]
+	uxth	r5, r5
+	cmp	r0, r3
+	bcc	.L1546
+	ldr	r1, .L1555+8
+	movw	r2, #781
+	ldr	r0, .L1555+12
+	bl	printf
+	ldr	r0, .L1555+16
+	ldr	r1, .L1555+20
+	bl	printf
+.L1546:
+	ldr	r3, .L1555+24
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1555+28
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+	mov	r8, r3
+	b	.L1547
+.L1553:
+	adds	r3, r3, #12
+	adds	r0, r2, r3
+	ldrh	r0, [r0, #-12]
+	cmp	r0, r4
+	bne	.L1548
+.L1549:
+	ldr	r2, .L1555+28
+	movs	r3, #12
+	ldr	r2, [r2, #0]
+	mla	r3, r3, r8, r2
+	cbnz	r7, .L1550
+	ldr	r3, [r3, #8]
+	ldr	r3, [r3, r5, lsl #2]
+	str	r3, [r6, #0]
+	b	.L1551
+.L1550:
+	ldr	r1, [r6, #0]
+	ldr	r2, [r3, #8]
+	str	r1, [r2, r5, lsl #2]
+	ldr	r2, [r3, #4]
+	orr	r2, r2, #-2147483648
+	str	r2, [r3, #4]
+	ldr	r3, .L1555+32
+	strh	r4, [r3, #0]	@ movhi
+.L1551:
+	ldr	r3, .L1555+28
+	movs	r2, #12
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r8, r3
+	ldr	r2, [r3, #4]
+	adds	r1, r2, #1
+	beq	.L1552
+	adds	r2, r2, #1
+	str	r2, [r3, #4]
+.L1552:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, pc}
+.L1548:
+	add	r8, r8, #1
+	uxth	r8, r8
+.L1547:
+	cmp	r8, r1
+	bne	.L1553
+	bl	select_l2p_ram_region
+	movs	r3, #12
+	ldr	r2, .L1555+28
+	ldr	r2, [r2, #0]
+	mul	r3, r3, r0
+	mov	r8, r0
+	adds	r1, r2, r3
+	ldrh	r2, [r2, r3]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1554
+	ldr	r3, [r1, #4]
+	cmp	r3, #0
+	bge	.L1554
+	bl	flush_l2p_region
+.L1554:
+	mov	r0, r4
+	mov	r1, r8
+	bl	load_l2p_region
+	b	.L1549
+.L1556:
+	.align	2
+.L1555:
+	.word	.LANCHOR72
+	.word	.LANCHOR87
+	.word	.LANCHOR215
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.word	.LANCHOR113
+	.size	log2phys, .-log2phys
+	.section	.text.FtlReUsePrevPpa,"ax",%progbits
+	.align	1
+	.global	FtlReUsePrevPpa
+	.thumb
+	.thumb_func
+	.type	FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+	mov	r6, r0
+	ubfx	r0, r1, #10, #16
+	str	r1, [sp, #4]
+	bl	P2V_block_in_plane
+	ldr	r3, .L1564
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r4, r0
+	cmp	r2, #0
+	bne	.L1558
+	ldr	r3, .L1564+4
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	beq	.L1559
+	ldr	r1, .L1564+8
+	movs	r5, #6
+	ldr	r0, .L1564+12
+	ldrh	r7, [r1, #0]
+	ldr	r1, .L1564+16
+	ldr	r1, [r1, #0]
+	subs	r3, r3, r1
+	asrs	r3, r3, #1
+	muls	r3, r0, r3
+	movw	r0, #65535
+	uxth	r3, r3
+	b	.L1560
+.L1563:
+	cmp	r3, r4
+	bne	.L1561
+	ldr	r5, .L1564+8
+	mov	r1, r4
+	ldr	r0, .L1564+4
+	bl	List_remove_node
+	ldrh	r3, [r5, #0]
+	cbnz	r3, .L1562
+	ldr	r1, .L1564+20
+	movw	r2, #1677
+	ldr	r0, .L1564+24
+	bl	printf
+	ldr	r0, .L1564+28
+	ldr	r1, .L1564+32
+	bl	printf
+.L1562:
+	ldrh	r3, [r5, #0]
+	mov	r0, r4
+	subs	r3, r3, #1
+	strh	r3, [r5, #0]	@ movhi
+	bl	INSERT_DATA_LIST
+	ldr	r3, .L1564
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	b	.L1558
+.L1561:
+	muls	r3, r5, r3
+	ldrh	r3, [r1, r3]
+	cmp	r3, r0
+	beq	.L1559
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1560:
+	cmp	r2, r7
+	bne	.L1563
+	b	.L1559
+.L1558:
+	adds	r2, r2, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+.L1559:
+	mov	r0, r6
+	add	r1, sp, #4
+	movs	r2, #1
+	bl	log2phys
+	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+.L1565:
+	.align	2
+.L1564:
+	.word	.LANCHOR99
+	.word	.LANCHOR103
+	.word	.LANCHOR104
+	.word	-1431655765
+	.word	.LANCHOR97
+	.word	.LANCHOR216
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.size	FtlReUsePrevPpa, .-FtlReUsePrevPpa
+	.section	.text.l2p_flush,"ax",%progbits
+	.align	1
+	.global	l2p_flush
+	.thumb
+	.thumb_func
+	.type	l2p_flush, %function
+l2p_flush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	movs	r4, #0
+	ldr	r7, .L1570
+	movs	r5, #12
+	ldr	r6, .L1570+4
+	b	.L1567
+.L1569:
+	ldr	r3, [r6, #0]
+	mla	r3, r5, r4, r3
+	ldr	r3, [r3, #4]
+	cmp	r3, #0
+	bge	.L1568
+	mov	r0, r4
+	bl	flush_l2p_region
+.L1568:
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L1567:
+	ldrh	r3, [r7, #0]
+	cmp	r3, r4
+	bhi	.L1569
+	movs	r0, #0
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1571:
+	.align	2
+.L1570:
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.size	l2p_flush, .-l2p_flush
+	.section	.text.allocate_new_data_superblock,"ax",%progbits
+	.align	1
+	.global	allocate_new_data_superblock
+	.thumb
+	.thumb_func
+	.type	allocate_new_data_superblock, %function
+allocate_new_data_superblock:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1584
+	push	{r4, r5, r6, lr}
+	mov	r4, r0
+	ldrh	r5, [r0, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r3, r5
+	bhi	.L1573
+	ldr	r1, .L1584+4
+	movw	r2, #2707
+	ldr	r0, .L1584+8
+	bl	printf
+	ldr	r0, .L1584+12
+	ldr	r1, .L1584+16
+	bl	printf
+.L1573:
+	movw	r3, #65535
+	cmp	r5, r3
+	beq	.L1574
+	ldr	r3, .L1584+20
+	mov	r0, r5
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r5, lsl #1]
+	cbz	r3, .L1575
+	bl	INSERT_DATA_LIST
+	b	.L1574
+.L1575:
+	bl	INSERT_FREE_LIST
+.L1574:
+	movs	r3, #0
+	strb	r3, [r4, #8]
+	ldr	r3, .L1584+24
+	cmp	r4, r3
+	beq	.L1576
+	ldr	r3, .L1584+28
+	ldrh	r3, [r3, #0]
+	cmp	r3, #1
+	beq	.L1576
+	ldr	r2, .L1584+32
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1577
+.L1576:
+	movs	r3, #1
+	strb	r3, [r4, #8]
+	b	.L1578
+.L1577:
+	ldr	r2, .L1584+36
+	cmp	r4, r2
+	bne	.L1578
+	cmp	r3, #3
+	beq	.L1579
+	ldr	r3, .L1584+40
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L1580
+.L1579:
+	movs	r3, #1
+	strb	r3, [r2, #8]
+.L1580:
+	ldr	r3, .L1584+44
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1578
+	ldr	r3, .L1584+48
+	ldr	r3, [r3, #0]
+	cmp	r3, #29
+	bhi	.L1578
+	ldr	r3, .L1584+36
+	movs	r2, #1
+	strb	r2, [r3, #8]
+.L1578:
+	ldr	r6, .L1584+52
+	movw	r3, #65535
+	ldrh	r0, [r6, #0]
+	cmp	r0, r3
+	beq	.L1581
+	cmp	r5, r0
+	bne	.L1582
+	ldr	r3, .L1584+20
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1583
+.L1582:
+	bl	update_vpc_list
+.L1583:
+	movw	r3, #65535
+	strh	r3, [r6, #0]	@ movhi
+.L1581:
+	mov	r0, r4
+	bl	allocate_data_superblock
+	bl	l2p_flush
+	movs	r0, #0
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	movs	r0, #0
+	pop	{r4, r5, r6, pc}
+.L1585:
+	.align	2
+.L1584:
+	.word	.LANCHOR55
+	.word	.LANCHOR217
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR99
+	.word	.LANCHOR108
+	.word	.LANCHOR59
+	.word	.LANCHOR7
+	.word	.LANCHOR107
+	.word	.LANCHOR152
+	.word	.LANCHOR126
+	.word	.LANCHOR164
+	.word	.LANCHOR135
+	.size	allocate_new_data_superblock, .-allocate_new_data_superblock
+	.section	.text.FtlProgPages,"ax",%progbits
+	.align	1
+	.global	FtlProgPages
+	.thumb
+	.thumb_func
+	.type	FtlProgPages, %function
+FtlProgPages:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r3
+	ldr	r3, .L1602
+	mov	r5, r0
+	str	r1, [sp, #4]
+	ldrb	r7, [r3, #0]	@ zero_extendqisi2
+	cbz	r7, .L1587
+	ldrb	r7, [r4, #8]	@ zero_extendqisi2
+	sub	r2, r7, #1
+	rsbs	r7, r2, #0
+	adc	r7, r7, r2
+.L1587:
+	mov	r0, r5
+	ldr	r1, [sp, #4]
+	mov	r2, r7
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	mov	sl, #0
+	ldr	r6, .L1602+4
+	ldr	fp, .L1602+36
+	b	.L1588
+.L1591:
+	ldr	r0, [r5, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldrh	r3, [r4, #0]
+	cmp	r3, r0
+	bne	.L1589
+	ldr	r2, [r6, #0]
+	ldrh	r1, [r4, #4]
+	ldrh	r0, [r2, r3, lsl #1]
+	subs	r1, r0, r1
+	strh	r1, [r2, r3, lsl #1]	@ movhi
+	ldr	r2, .L1602+8
+	strb	r8, [r4, #6]
+	strh	r8, [r4, #4]	@ movhi
+	ldrh	r3, [r2, #0]
+	strh	r3, [r4, #2]	@ movhi
+.L1589:
+	ldrh	r3, [r4, #4]
+	cbnz	r3, .L1590
+	mov	r0, r4
+	bl	allocate_new_data_superblock
+.L1590:
+	ldr	r0, [r5, #4]
+	ldr	r3, [fp, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r3, r3, #1
+	str	r3, [fp, #96]
+	bl	FtlGcMarkBadPhyBlk
+	mov	r0, r4
+	bl	get_new_active_ppa
+	movs	r1, #1
+	mov	r2, r7
+	str	r0, [r5, #4]
+	str	r0, [sp, #12]
+	mov	r0, r5
+	ldrb	r3, [r4, #9]	@ zero_extendqisi2
+	bl	FlashProgPages
+	b	.L1600
+.L1601:
+	mov	r8, #0
+.L1600:
+	ldr	r3, [r5, #0]
+	adds	r3, r3, #1
+	beq	.L1591
+	ldr	r3, .L1602+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1592
+	ldr	r1, .L1602+16
+	mov	r2, #1464
+	ldr	r0, .L1602+20
+	bl	printf
+	ldr	r0, .L1602+24
+	ldr	r1, .L1602+28
+	bl	printf
+.L1592:
+	ldr	r3, [r5, #4]
+	str	r3, [sp, #12]
+	cbz	r7, .L1593
+	orr	r3, r3, #-2147483648
+	str	r3, [sp, #12]
+.L1593:
+	movs	r2, #1
+	ldr	r0, [r5, #16]
+	add	r1, sp, #12
+	bl	log2phys
+	ldr	r3, [r5, #12]
+	ldr	r0, [r3, #12]
+	adds	r3, r0, #1
+	beq	.L1594
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, [r6, #0]
+	ldrh	r2, [r3, r0, lsl #1]
+	mov	r8, r0
+	cbnz	r2, .L1595
+	ldr	r0, .L1602+32
+	mov	r1, r8
+	bl	printf
+.L1595:
+	mov	r0, r8
+	bl	decrement_vpc_count
+.L1594:
+	add	sl, sl, #1
+	adds	r5, r5, #36
+.L1588:
+	ldr	r3, [sp, #4]
+	cmp	sl, r3
+	bne	.L1601
+	ldr	r3, .L1602+12
+	ldrb	r2, [r4, #6]	@ zero_extendqisi2
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bcc	.L1586
+	ldr	r1, .L1602+16
+	movw	r2, #1481
+	ldr	r0, .L1602+20
+	bl	printf
+	ldr	r0, .L1602+24
+	ldr	r1, .L1602+28
+	bl	printf
+.L1586:
+	pop	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1603:
+	.align	2
+.L1602:
+	.word	.LANCHOR7
+	.word	.LANCHOR99
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.word	.LANCHOR218
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LC32
+	.word	.LANCHOR141
+	.size	FtlProgPages, .-FtlProgPages
+	.section	.text.FtlCacheWriteBack,"ax",%progbits
+	.align	1
+	.global	FtlCacheWriteBack
+	.thumb
+	.thumb_func
+	.type	FtlCacheWriteBack, %function
+FtlCacheWriteBack:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	ldr	r4, .L1606
+	ldr	r0, [r4, #0]
+	cbz	r0, .L1605
+	ldr	r3, .L1606+4
+	movs	r1, #1
+	movs	r2, #0
+	ldr	r3, [r3, #0]
+	bl	FtlProgPages
+	movs	r3, #0
+	str	r3, [r4, #0]
+.L1605:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1607:
+	.align	2
+.L1606:
+	.word	.LANCHOR134
+	.word	.LANCHOR219
+	.size	FtlCacheWriteBack, .-FtlCacheWriteBack
+	.section	.text.FtlGcFreeTempBlock,"ax",%progbits
+	.align	1
+	.global	FtlGcFreeTempBlock
+	.thumb
+	.thumb_func
+	.type	FtlGcFreeTempBlock, %function
+FtlGcFreeTempBlock:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	ldr	r0, .L1624
+	ldr	r3, .L1624+4
+	ldrh	r4, [r0, #0]
+	ldrh	r1, [r3, #0]
+	movw	r3, #65535
+	cmp	r4, r3
+	beq	.L1609
+	bl	FtlGcScanTempBlk
+	str	r0, [sp, #4]
+	adds	r0, r0, #1
+	beq	.L1609
+	ldr	r3, .L1624+8
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r4, lsl #1]
+	cmp	r2, #4
+	bls	.L1610
+	subs	r2, r2, #5
+	movs	r0, #1
+	strh	r2, [r3, r4, lsl #1]	@ movhi
+	bl	FtlEctTblFlush
+.L1610:
+	ldr	r3, .L1624+12
+	ldr	r3, [r3, #0]
+	cbnz	r3, .L1611
+	ldr	r3, .L1624+16
+	ldr	r0, [sp, #4]
+	ldr	r2, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r2, r2, #1
+	str	r2, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+.L1611:
+	ldr	r3, .L1624+12
+	movs	r2, #0
+	movs	r4, #1
+	str	r2, [r3, #0]
+	b	.L1612
+.L1609:
+	ldr	r5, .L1624
+	movs	r4, #0
+	ldr	r3, .L1624+12
+	ldrh	r2, [r5, #0]
+	str	r4, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1612
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1624+20
+	ldr	r1, .L1624+4
+	ldrh	r2, [r3, #0]
+	ldrh	r1, [r1, #0]
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	muls	r3, r1, r3
+	cmp	r2, r3
+	beq	.L1613
+	ldr	r1, .L1624+24
+	movs	r2, #161
+	ldr	r0, .L1624+28
+	bl	printf
+	ldr	r0, .L1624+32
+	ldr	r1, .L1624+36
+	bl	printf
+.L1613:
+	ldr	r3, .L1624
+	movs	r5, #0
+	ldr	r2, .L1624+40
+	ldr	r4, .L1624+4
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r4, #0]
+	ldrb	r0, [r3, #7]	@ zero_extendqisi2
+	muls	r0, r4, r0
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldr	r1, .L1624+44
+	ldr	r2, .L1624+20
+	ldr	fp, .L1624+68
+	ldr	r0, [r1, #0]
+	mov	sl, r2
+	ldrh	r4, [r2, #0]
+	ldr	r8, .L1624+72
+	adds	r0, r4, r0
+	str	r0, [r1, #0]
+	b	.L1614
+.L1618:
+	ldr	r7, [fp, #0]
+	movs	r6, #12
+	muls	r6, r5, r6
+	ldr	r3, [r8, #0]
+	adds	r4, r7, r6
+	ldr	r2, [r4, #8]
+	cmp	r2, r3
+	bcc	.L1615
+	ldr	r1, .L1624+24
+	movs	r2, #166
+	ldr	r0, .L1624+28
+	bl	printf
+	ldr	r0, .L1624+32
+	ldr	r1, .L1624+36
+	bl	printf
+.L1615:
+	movs	r2, #0
+	ldr	r0, [r4, #8]
+	add	r1, sp, #4
+	bl	log2phys
+	ldr	r0, [sp, #4]
+	ldr	r3, [r7, r6]
+	cmp	r0, r3
+	bne	.L1616
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	adds	r1, r4, #4
+	movs	r2, #1
+	mov	r6, r0
+	ldr	r0, [r4, #8]
+	bl	log2phys
+	mov	r0, r6
+	b	.L1623
+.L1616:
+	ldr	r3, [r4, #4]
+	cmp	r0, r3
+	beq	.L1617
+	ldr	r3, .L1624
+	ldrh	r0, [r3, #0]
+.L1623:
+	bl	decrement_vpc_count
+.L1617:
+	adds	r5, r5, #1
+	uxth	r5, r5
+.L1614:
+	ldrh	r3, [sl, #0]
+	cmp	r3, r5
+	bhi	.L1618
+	movw	r0, #65535
+	ldr	r4, .L1624
+	bl	decrement_vpc_count
+	ldr	r3, .L1624+40
+	ldrh	r0, [r4, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r0, lsl #1]
+	cbz	r3, .L1619
+	bl	INSERT_DATA_LIST
+	b	.L1620
+.L1619:
+	bl	INSERT_FREE_LIST
+.L1620:
+	ldr	r3, .L1624+20
+	movw	r5, #65535
+	strh	r5, [r4, #0]	@ movhi
+	movs	r4, #0
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1624+48
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	ldr	r3, .L1624+52
+	ldr	r2, .L1624+56
+	movs	r1, #3
+	ldrh	r3, [r3, #0]
+	ldrh	r2, [r2, #0]
+	muls	r2, r1, r2
+	cmp	r3, r2, lsr #2
+	ble	.L1612
+	ldr	r3, .L1624+60
+	movs	r2, #20
+	strh	r5, [r3, #0]	@ movhi
+	ldr	r3, .L1624+64
+	strh	r2, [r3, #0]	@ movhi
+.L1612:
+	mov	r0, r4
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1625:
+	.align	2
+.L1624:
+	.word	.LANCHOR109
+	.word	.LANCHOR68
+	.word	.LANCHOR94
+	.word	.LANCHOR137
+	.word	.LANCHOR141
+	.word	.LANCHOR144
+	.word	.LANCHOR220
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR99
+	.word	.LANCHOR155
+	.word	.LANCHOR142
+	.word	.LANCHOR104
+	.word	.LANCHOR200
+	.word	.LANCHOR201
+	.word	.LANCHOR170
+	.word	.LANCHOR145
+	.word	.LANCHOR87
+	.size	FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
+	.section	.text.Ftl_gc_temp_data_write_back,"ax",%progbits
+	.align	1
+	.global	Ftl_gc_temp_data_write_back
+	.thumb
+	.thumb_func
+	.type	Ftl_gc_temp_data_write_back, %function
+Ftl_gc_temp_data_write_back:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	ldr	r3, .L1635
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1635+4
+	cbz	r2, .L1627
+	ldr	r2, [r3, #0]
+	lsls	r2, r2, #31
+	bpl	.L1627
+	ldr	r2, .L1635+8
+	ldrh	r2, [r2, #4]
+	cmp	r2, #0
+	bne	.L1632
+.L1627:
+	ldr	r4, .L1635+12
+	movs	r2, #0
+	ldr	r1, [r3, #0]
+	mov	r3, r2
+	movs	r5, #0
+	ldr	r7, .L1635+4
+	ldr	r0, [r4, #0]
+	movs	r6, #36
+	bl	FlashProgPages
+	b	.L1629
+.L1631:
+	mul	r3, r6, r5
+	ldr	r1, [r4, #0]
+	adds	r2, r1, r3
+	ldr	r1, [r1, r3]
+	adds	r0, r1, #1
+	bne	.L1630
+	ldr	r3, .L1635+8
+	movs	r5, #0
+	ldr	r0, .L1635+16
+	ldrh	r4, [r3, #0]
+	ldr	r0, [r0, #0]
+	strh	r5, [r0, r4, lsl #1]	@ movhi
+	strh	r1, [r3, #0]	@ movhi
+	ldr	r3, .L1635+20
+	ldr	r0, [r2, #4]
+	ldr	r1, [r3, #96]
+	ubfx	r0, r0, #10, #16
+	adds	r1, r1, #1
+	str	r1, [r3, #96]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	bl	FtlGcPageVarInit
+	b	.L1634
+.L1630:
+	ldr	r3, [r2, #12]
+	adds	r5, r5, #1
+	ldr	r1, [r2, #4]
+	uxth	r5, r5
+	ldr	r0, [r3, #12]
+	ldr	r2, [r3, #8]
+	bl	FtlGcUpdatePage
+.L1629:
+	ldr	r1, [r7, #0]
+	cmp	r5, r1
+	bcc	.L1631
+	ldr	r3, .L1635+12
+	ldr	r0, [r3, #0]
+	bl	FtlGcBufFree
+	ldr	r3, .L1635+4
+	movs	r0, #0
+	str	r0, [r3, #0]
+	ldr	r3, .L1635+8
+	ldrh	r3, [r3, #4]
+	cbnz	r3, .L1628
+	movs	r0, #1
+	bl	FtlGcFreeTempBlock
+.L1634:
+	movs	r0, #1
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1632:
+	movs	r0, #0
+.L1628:
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1636:
+	.align	2
+.L1635:
+	.word	.LANCHOR7
+	.word	.LANCHOR128
+	.word	.LANCHOR109
+	.word	.LANCHOR174
+	.word	.LANCHOR99
+	.word	.LANCHOR141
+	.size	Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back
+	.section	.text.FtlGcPageRecovery,"ax",%progbits
+	.align	1
+	.global	FtlGcPageRecovery
+	.thumb
+	.thumb_func
+	.type	FtlGcPageRecovery, %function
+FtlGcPageRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	ldr	r4, .L1639
+	ldr	r5, .L1639+4
+	ldrh	r1, [r4, #0]
+	mov	r0, r5
+	bl	FtlGcScanTempBlk
+	ldrh	r2, [r5, #2]
+	ldrh	r3, [r4, #0]
+	cmp	r2, r3
+	bcc	.L1637
+	ldr	r0, .L1639+8
+	bl	FtlMapBlkWriteDumpData
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r3, .L1639+12
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1637:
+	pop	{r3, r4, r5, pc}
+.L1640:
+	.align	2
+.L1639:
+	.word	.LANCHOR68
+	.word	.LANCHOR109
+	.word	.LANCHOR120
+	.word	.LANCHOR137
+	.size	FtlGcPageRecovery, .-FtlGcPageRecovery
+	.section	.text.Ftl_get_new_temp_ppa,"ax",%progbits
+	.align	1
+	.global	Ftl_get_new_temp_ppa
+	.thumb
+	.thumb_func
+	.type	Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movw	r3, #65535
+	ldr	r5, .L1644
+	ldrh	r2, [r5, #0]
+	cmp	r2, r3
+	beq	.L1642
+	ldrh	r3, [r5, #4]
+	cbnz	r3, .L1643
+.L1642:
+	bl	FtlCacheWriteBack
+	movs	r0, #0
+	bl	FtlGcFreeTempBlock
+	ldr	r0, .L1644
+	movs	r4, #0
+	strb	r4, [r5, #8]
+	bl	allocate_data_superblock
+	ldr	r3, .L1644+4
+	strh	r4, [r3, #0]	@ movhi
+	ldr	r3, .L1644+8
+	strh	r4, [r3, #0]	@ movhi
+	bl	l2p_flush
+	mov	r0, r4
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+.L1643:
+	ldr	r0, .L1644
+	pop	{r3, r4, r5, lr}
+	b	get_new_active_ppa
+.L1645:
+	.align	2
+.L1644:
+	.word	.LANCHOR109
+	.word	.LANCHOR142
+	.word	.LANCHOR144
+	.size	Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+	.section	.text.ftl_discard,"ax",%progbits
+	.align	1
+	.global	ftl_discard
+	.thumb
+	.thumb_func
+	.type	ftl_discard, %function
+ftl_discard:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1655
+	push	{r0, r1, r4, r5, r6, r7, r8, lr}
+	mov	r4, r2
+	ldr	r3, [r3, #0]
+	adds	r2, r2, r1
+	mov	r6, r1
+	cmp	r2, r3
+	bhi	.L1652
+	cmp	r4, #31
+	bls	.L1653
+	bl	FtlCacheWriteBack
+	ldr	r3, .L1655+4
+	mov	r0, r6
+	ldrh	r7, [r3, #0]
+	mov	r1, r7
+	bl	__aeabi_uidiv
+	mls	r6, r0, r7, r6
+	mov	r5, r0
+	uxth	r6, r6
+	cbz	r6, .L1648
+	subs	r6, r7, r6
+	adds	r5, r0, #1
+	cmp	r6, r4
+	it	cs
+	movcs	r6, r4
+	uxth	r6, r6
+	subs	r4, r4, r6
+.L1648:
+	mov	r3, #-1
+	ldr	r8, .L1655+4
+	str	r3, [sp, #4]
+	ldr	r7, .L1655+8
+	ldr	r6, .L1655+12
+	b	.L1649
+.L1651:
+	movs	r2, #0
+	mov	r0, r5
+	mov	r1, sp
+	bl	log2phys
+	ldr	r3, [sp, #0]
+	adds	r3, r3, #1
+	beq	.L1650
+	ldr	r3, [r7, #0]
+	add	r1, sp, #4
+	movs	r2, #1
+	mov	r0, r5
+	adds	r3, r3, #1
+	str	r3, [r7, #0]
+	ldr	r3, [r6, #0]
+	adds	r3, r3, #1
+	str	r3, [r6, #0]
+	bl	log2phys
+	ldr	r0, [sp, #0]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	bl	decrement_vpc_count
+.L1650:
+	ldrh	r3, [r8, #0]
+	adds	r5, r5, #1
+	subs	r4, r4, r3
+.L1649:
+	ldrh	r3, [r8, #0]
+	cmp	r4, r3
+	bcs	.L1651
+	ldr	r3, .L1655+8
+	mov	r4, #0
+	ldr	r2, [r3, #0]
+	cmp	r2, #32
+	bls	.L1654
+	str	r4, [r3, #0]
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	b	.L1654
+.L1652:
+	mov	r0, #-1
+	b	.L1647
+.L1653:
+	movs	r0, #0
+	b	.L1647
+.L1654:
+	mov	r0, r4
+.L1647:
+	pop	{r2, r3, r4, r5, r6, r7, r8, pc}
+.L1656:
+	.align	2
+.L1655:
+	.word	.LANCHOR84
+	.word	.LANCHOR71
+	.word	.LANCHOR221
+	.word	.LANCHOR157
+	.size	ftl_discard, .-ftl_discard
+	.section	.text.FtlSysFlush,"ax",%progbits
+	.align	1
+	.global	FtlSysFlush
+	.thumb
+	.thumb_func
+	.type	FtlSysFlush, %function
+FtlSysFlush:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	movs	r0, #1
+	bl	FtlEctTblFlush
+	bl	FtlVpcTblFlush
+	movs	r0, #0
+	pop	{r3, pc}
+	.size	FtlSysFlush, .-FtlSysFlush
+	.section	.text.FtlDeInit,"ax",%progbits
+	.align	1
+	.global	FtlDeInit
+	.thumb
+	.thumb_func
+	.type	FtlDeInit, %function
+FtlDeInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1660
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L1659
+	bl	FtlSysFlush
+.L1659:
+	movs	r0, #0
+	pop	{r3, pc}
+.L1661:
+	.align	2
+.L1660:
+	.word	.LANCHOR222
+	.size	FtlDeInit, .-FtlDeInit
+	.section	.text.rk_ftl_de_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_de_init
+	.thumb
+	.thumb_func
+	.type	rk_ftl_de_init, %function
+rk_ftl_de_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	rk_nand_de_init
+	bl	FtlDeInit
+	pop	{r3, lr}
+	b	rk_nand_de_init
+	.size	rk_ftl_de_init, .-rk_ftl_de_init
+	.section	.text.FtlMapTblRecovery,"ax",%progbits
+	.align	1
+	.global	FtlMapTblRecovery
+	.thumb
+	.thumb_func
+	.type	FtlMapTblRecovery, %function
+FtlMapTblRecovery:
+	@ args = 0, pretend = 0, frame = 16
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	ldr	r3, [r0, #12]
+	movs	r1, #0
+	ldrh	sl, [r0, #6]
+	ldr	fp, [r0, #24]
+	str	r3, [sp, #8]
+	ldr	r3, [r0, #16]
+	lsl	r2, sl, #2
+	ldr	r6, .L1683
+	str	r3, [sp, #12]
+	ldrh	r3, [r0, #8]
+	mov	r0, fp
+	str	r3, [sp, #4]
+	bl	memset
+	ldr	r1, .L1683+4
+	movs	r2, #0
+	mov	r8, r2
+	str	r2, [r4, #32]
+	str	r2, [r4, #28]
+	ldr	r3, [r1, #0]
+	str	r3, [r6, #8]
+	ldr	r3, .L1683+8
+	ldr	r5, [r3, #0]
+	movw	r3, #65535
+	str	r5, [r6, #12]
+	strh	r3, [r4, #0]	@ movhi
+	strh	r3, [r4, #2]	@ movhi
+	movs	r3, #1
+	str	r3, [r4, #36]
+	ldr	r3, [sp, #8]
+	mov	r7, r3
+	mov	r3, fp
+	mov	fp, sl
+	mov	sl, r4
+	b	.L1664
+.L1677:
+	ldr	r0, [sp, #4]
+	subs	r2, r0, #1
+	cmp	r8, r2
+	bne	.L1665
+	sxth	r6, r1
+	mov	r4, sl
+	mov	sl, fp
+	mov	fp, r3
+	ldr	r3, [sp, #8]
+	mov	r7, r1
+	movs	r1, #1
+	add	r3, r3, r6, lsl #1
+	str	r3, [sp, #4]
+	ldr	r3, [sp, #8]
+	ldrh	r0, [r3, r6, lsl #1]
+	bl	FtlGetLastWrittenPage
+	ldr	r1, [sp, #12]
+	strh	r7, [r4, #0]	@ movhi
+	ldr	r7, .L1683
+	uxth	r0, r0
+	adds	r3, r0, #1
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r3, [r1, r6, lsl #2]
+	sxth	r8, r0
+	movs	r6, #0
+	str	r3, [r4, #28]
+	b	.L1666
+.L1668:
+	ldr	r2, [sp, #4]
+	movs	r1, #1
+	ldr	r0, .L1683
+	ldrh	r3, [r2, #0]
+	mov	r2, r1
+	orr	r3, r6, r3, lsl #10
+	str	r3, [r7, #4]
+	bl	FlashReadPages
+	ldr	r3, [r7, #0]
+	adds	r3, r3, #1
+	beq	.L1667
+	ldrh	r3, [r5, #8]
+	cmp	r3, sl
+	bcs	.L1667
+	ldrh	r2, [r4, #4]
+	ldrh	r1, [r5, #0]
+	cmp	r1, r2
+	itt	eq
+	ldreq	r2, [r7, #4]
+	streq	r2, [fp, r3, lsl #2]
+.L1667:
+	adds	r6, r6, #1
+.L1666:
+	sxth	r3, r6
+	cmp	r8, r3
+	bge	.L1668
+	b	.L1669
+.L1665:
+	ldr	r0, .L1683+4
+	ldrh	r1, [r7], #2
+	ldr	r2, [r0, #0]
+	ldr	r0, .L1683+12
+	str	r2, [r6, #8]
+	ldrh	r2, [r0, #0]
+	ldr	r0, .L1683
+	subs	r2, r2, #1
+	orr	r2, r2, r1, lsl #10
+	movs	r1, #1
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	r3, [sp, #0]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	r3, [sp, #0]
+	adds	r2, r2, #1
+	beq	.L1681
+	ldrh	r1, [r5, #0]
+	ldrh	r2, [sl, #4]
+	cmp	r1, r2
+	bne	.L1681
+	ldrh	r2, [r5, #8]
+	movw	r1, #64245
+	cmp	r2, r1
+	bne	.L1681
+	ldr	r2, .L1683+12
+	movs	r1, #0
+	ldr	r0, .L1683+4
+	mov	lr, r3
+	ldrh	r4, [r2, #0]
+	ldr	r2, [r0, #0]
+	subs	r4, r4, #1
+	b	.L1671
+.L1673:
+	ldrh	r0, [r2, #0]
+	cmp	r0, fp
+	itt	cc
+	ldrcc	r3, [r2, #4]
+	strcc	r3, [lr, r0, lsl #2]
+	adds	r1, r1, #1
+	adds	r2, r2, #8
+.L1671:
+	cmp	r1, r4
+	blt	.L1673
+	mov	r3, lr
+	b	.L1674
+.L1676:
+	ldrh	r2, [r7, #-2]
+	movs	r1, #1
+	ldr	r0, .L1683
+	orr	r2, r4, r2, lsl #10
+	str	r2, [r6, #4]
+	mov	r2, r1
+	str	ip, [sp, #0]
+	bl	FlashReadPages
+	ldr	r2, [r6, #0]
+	ldr	ip, [sp, #0]
+	adds	r2, r2, #1
+	beq	.L1675
+	ldrh	r2, [r5, #8]
+	cmp	r2, fp
+	bcs	.L1675
+	ldrh	r1, [sl, #4]
+	ldrh	r0, [r5, #0]
+	cmp	r0, r1
+	itt	eq
+	ldreq	r1, [r6, #4]
+	streq	r1, [r8, r2, lsl #2]
+.L1675:
+	adds	r4, r4, #1
+	b	.L1682
+.L1681:
+	mov	ip, r8
+	movs	r4, #0
+	mov	r8, r3
+.L1682:
+	ldr	r1, .L1683+12
+	ldrh	r2, [r1, #0]
+	cmp	r4, r2
+	blt	.L1676
+	mov	r3, r8
+	mov	r8, ip
+.L1674:
+	add	r8, r8, #1
+.L1664:
+	ldr	r2, [sp, #4]
+	uxth	r1, r8
+	cmp	r8, r2
+	blt	.L1677
+	mov	r4, sl
+.L1669:
+	mov	r0, r4
+	bl	ftl_free_no_use_map_blk
+	ldr	r3, .L1683+12
+	ldrh	r2, [r4, #2]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1678
+	mov	r0, r4
+	bl	ftl_map_blk_alloc_new_blk
+.L1678:
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	mov	r0, r4
+	bl	ftl_map_blk_gc
+	movs	r0, #0
+	add	sp, sp, #16
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1684:
+	.align	2
+.L1683:
+	.word	.LANCHOR197
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR69
+	.size	FtlMapTblRecovery, .-FtlMapTblRecovery
+	.section	.text.FtlLoadMapInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadMapInfo
+	.thumb
+	.thumb_func
+	.type	FtlLoadMapInfo, %function
+FtlLoadMapInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	bl	FtlL2PDataInit
+	ldr	r0, .L1686
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L1687:
+	.align	2
+.L1686:
+	.word	.LANCHOR120
+	.size	FtlLoadMapInfo, .-FtlLoadMapInfo
+	.section	.text.FtlLoadVonderInfo,"ax",%progbits
+	.align	1
+	.global	FtlLoadVonderInfo
+	.thumb
+	.thumb_func
+	.type	FtlLoadVonderInfo, %function
+FtlLoadVonderInfo:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, lr}
+	ldr	r3, .L1689
+	ldr	r0, .L1689+4
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #10]	@ movhi
+	movw	r3, #61574
+	strh	r3, [r0, #4]	@ movhi
+	ldr	r3, .L1689+8
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #8]	@ movhi
+	ldr	r3, .L1689+12
+	ldrh	r3, [r3, #0]
+	strh	r3, [r0, #6]	@ movhi
+	ldr	r3, .L1689+16
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #12]
+	ldr	r3, .L1689+20
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #16]
+	ldr	r3, .L1689+24
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #20]
+	ldr	r3, .L1689+28
+	ldr	r3, [r3, #0]
+	str	r3, [r0, #24]
+	bl	FtlMapTblRecovery
+	movs	r0, #0
+	pop	{r3, pc}
+.L1690:
+	.align	2
+.L1689:
+	.word	.LANCHOR77
+	.word	.LANCHOR213
+	.word	.LANCHOR85
+	.word	.LANCHOR78
+	.word	.LANCHOR86
+	.word	.LANCHOR185
+	.word	.LANCHOR184
+	.word	.LANCHOR186
+	.size	FtlLoadVonderInfo, .-FtlLoadVonderInfo
+	.section	.text.FtlRecoverySuperblock,"ax",%progbits
+	.align	1
+	.global	FtlRecoverySuperblock
+	.thumb
+	.thumb_func
+	.type	FtlRecoverySuperblock, %function
+FtlRecoverySuperblock:
+	@ args = 0, pretend = 0, frame = 72
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldrh	r2, [r0, #0]
+	movw	r3, #65535
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	cmp	r2, r3
+	sub	sp, sp, #72
+	mov	r4, r0
+	beq	.L1692
+	ldrh	r5, [r0, #2]
+	ldr	r2, .L1784
+	str	r5, [sp, #24]
+	ldrb	r5, [r0, #6]	@ zero_extendqisi2
+	ldrh	r2, [r2, #0]
+	str	r5, [sp, #36]
+	ldr	r5, [sp, #24]
+	cmp	r2, r5
+	mov	r5, #0
+	bne	.L1693
+	mov	r3, r5	@ movhi
+	strh	r5, [r0, #4]	@ movhi
+	b	.L1781
+.L1693:
+	ldrh	r0, [r0, #16]
+	b	.L1694
+.L1695:
+	adds	r5, r5, #1
+	uxth	r5, r5
+	add	r2, r5, #8
+	ldrh	r0, [r4, r2, lsl #1]
+.L1694:
+	cmp	r0, r3
+	beq	.L1695
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L1696
+	bl	FtlGetLastWrittenPage
+	adds	r3, r0, #1
+	mov	r6, r0
+	beq	.L1697
+	ldr	r3, .L1784+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1776
+	ldr	r3, .L1784+8
+	ldrh	r7, [r3, r0, lsl #1]
+	b	.L1766
+.L1696:
+	movs	r1, #0
+	bl	FtlGetLastWrittenPage
+	mov	r6, r0
+	adds	r0, r0, #1
+	beq	.L1697
+.L1776:
+	mov	r7, r6
+.L1766:
+	ldr	r3, .L1784+12
+	movs	r5, #0
+	str	r4, [sp, #48]
+	mov	r2, r4
+	ldrh	fp, [r3, #0]
+	ldr	r3, .L1784+16
+	ldr	sl, [r3, #0]
+	ldr	r3, .L1784+20
+	ldr	r8, [r3, #0]
+	ldr	r3, .L1784+24
+	ldrh	ip, [r3, #0]
+	mov	r3, r5
+	b	.L1699
+.L1697:
+	ldr	r3, [sp, #24]
+	cbz	r3, .L1700
+	ldr	r1, .L1784+28
+	movw	r2, #1748
+	ldr	r0, .L1784+32
+	bl	printf
+	ldr	r0, .L1784+36
+	ldr	r1, .L1784+40
+	bl	printf
+.L1700:
+	ldr	r3, [sp, #36]
+	cbz	r3, .L1701
+	cmp	r3, r5
+	beq	.L1701
+	ldr	r1, .L1784+28
+	movw	r2, #1749
+	ldr	r0, .L1784+32
+	bl	printf
+	ldr	r0, .L1784+36
+	ldr	r1, .L1784+40
+	bl	printf
+.L1701:
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	b	.L1692
+.L1703:
+	ldrh	r0, [r2, #16]
+	movw	lr, #65535
+	cmp	r0, lr
+	beq	.L1702
+	mov	lr, #36
+	orr	r0, r7, r0, lsl #10
+	mla	r1, lr, r5, sl
+	str	r0, [r1, #4]
+	movs	r0, #0
+	str	r0, [r1, #8]
+	mul	r0, ip, r5
+	adds	r5, r5, #1
+	uxth	r5, r5
+	bic	r0, r0, #3
+	add	r0, r8, r0
+	str	r0, [r1, #12]
+.L1702:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	uxth	r3, r3
+.L1699:
+	cmp	r3, fp
+	bne	.L1703
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	bne	.L1768
+	ldr	r3, .L1784+4
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	adds	r3, r3, #0
+	it	ne
+	movne	r3, #1
+	b	.L1777
+.L1768:
+	movs	r3, #0
+.L1777:
+	ldr	r8, .L1784+16
+	mov	r1, r5
+	str	r3, [sp, #32]
+	mov	fp, r7
+	ldr	r2, [sp, #32]
+	ldr	r0, [r8, #0]
+	bl	FlashReadPages
+	ldr	r2, .L1784+44
+	ldr	sl, [r8, #0]
+	uxth	ip, r7
+	movw	r8, #65535
+	str	r8, [sp, #16]
+	ldr	r3, [r2, #0]
+	mov	r8, #0
+	str	r3, [sp, #20]
+	mov	r3, r6
+	mov	r6, sl
+	mov	sl, ip
+	b	.L1705
+.L1710:
+	ldr	r1, [r6, #0]
+	cbnz	r1, .L1706
+	ldr	ip, [r6, #12]
+	ldr	r7, [ip, #4]
+	adds	r1, r7, #1
+	beq	.L1707
+	ldr	r1, [r2, #0]
+	mov	r0, r7
+	str	r2, [sp, #12]
+	str	r3, [sp, #4]
+	str	ip, [sp, #8]
+	bl	ftl_cmp_data_ver
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	ldr	ip, [sp, #8]
+	cbz	r0, .L1707
+	adds	r7, r7, #1
+	str	r7, [r2, #0]
+.L1707:
+	ldr	r1, [ip, #0]
+	adds	r1, r1, #1
+	bne	.L1708
+	uxth	r6, r3
+	ldr	r3, .L1784+16
+	movs	r2, #36
+	mov	r7, fp
+	ldr	r3, [r3, #0]
+	mla	r3, r2, r8, r3
+	b	.L1778
+.L1706:
+	str	sl, [sp, #16]
+.L1708:
+	add	r8, r8, #1
+	adds	r6, r6, #36
+	uxth	r8, r8
+.L1705:
+	cmp	r8, r5
+	bne	.L1710
+	adds	r6, r3, #1
+	ldr	r3, .L1784+16
+	mov	r7, fp
+	uxth	r6, r6
+	ldr	r3, [r3, #0]
+.L1778:
+	ldr	r0, [r3, #4]
+	ubfx	r0, r0, #10, #16
+	bl	P2V_plane
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	cmp	r3, #1
+	str	r0, [sp, #28]
+	bne	.L1711
+	ldr	r2, .L1784+4
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbnz	r2, .L1711
+	ldr	r2, .L1784+8
+	ldrh	r6, [r2, r6, lsl #1]
+.L1711:
+	ldr	r2, .L1784
+	ldrh	r2, [r2, #0]
+	cmp	r2, r6
+	bne	.L1712
+	movs	r2, #0
+	strh	r6, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	strh	r2, [r4, #4]	@ movhi
+.L1712:
+	ldr	r5, [sp, #24]
+	cmp	r6, r5
+	bne	.L1713
+	ldr	r8, [sp, #28]
+	ldr	r5, [sp, #36]
+	cmp	r8, r5
+	bne	.L1713
+	mov	r0, r4
+	mov	r1, r6
+	mov	r2, r8
+	b	.L1782
+.L1713:
+	ldr	r2, [sp, #20]
+	ldr	r8, [sp, #16]
+	subs	r5, r2, #1
+	movw	r2, #65535
+	cmp	r8, r2
+	bne	.L1714
+	cmp	r3, #0
+	bne	.L1715
+.L1714:
+	ldr	r2, .L1784+48
+	uxth	r3, r7
+	ldr	r0, [sp, #24]
+	ldr	r1, [r2, #0]
+	adds	r1, r1, #1
+	it	eq
+	streq	r5, [r2, #0]
+	ldr	r2, [r2, #0]
+	str	r2, [sp, #16]
+	adds	r2, r0, #7
+	cmp	r3, r2
+	ble	.L1769
+	subs	r7, r3, #7
+	uxth	r7, r7
+	b	.L1717
+.L1769:
+	ldr	r7, [sp, #24]
+.L1717:
+	mov	fp, #-1
+	mov	r8, r3
+	mov	sl, fp
+	mov	r3, r6
+	mov	r6, r5
+	b	.L1718
+.L1720:
+	ldrh	r0, [r1, #16]
+	movw	r3, #65535
+	cmp	r0, r3
+	beq	.L1719
+	ldr	r3, [sp, #20]
+	mov	lr, #36
+	orr	r0, r7, r0, lsl #10
+	mla	ip, lr, r5, r3
+	adds	r5, r5, #1
+	uxth	r5, r5
+	str	r0, [ip, #4]
+.L1719:
+	adds	r2, r2, #1
+	adds	r1, r1, #2
+	uxth	r2, r2
+.L1731:
+	ldr	r0, [sp, #44]
+	cmp	r2, r0
+	bne	.L1720
+	ldr	ip, .L1784+16
+	mov	r1, r5
+	ldr	r3, [sp, #40]
+	ldr	r2, [sp, #32]
+	ldr	r0, [ip, #0]
+	str	r3, [sp, #4]
+	str	ip, [sp, #8]
+	bl	FlashReadPages
+	ldr	r2, .L1784+4
+	movs	r0, #0
+	ldr	ip, [sp, #8]
+	ldr	r3, [sp, #4]
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	ldr	r1, [ip, #0]
+	mov	ip, r3
+	str	r5, [sp, #40]
+	str	r2, [sp, #20]
+	ldr	r2, .L1784+48
+	ldr	r2, [r2, #0]
+	b	.L1721
+.L1785:
+	.align	2
+.L1784:
+	.word	.LANCHOR68
+	.word	.LANCHOR7
+	.word	.LANCHOR8
+	.word	.LANCHOR53
+	.word	.LANCHOR173
+	.word	.LANCHOR130
+	.word	.LANCHOR74
+	.word	.LANCHOR223
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR154
+	.word	.LANCHOR138
+.L1729:
+	ldr	r3, [r1, #0]
+	cbnz	r3, .L1722
+	ldr	r3, [r1, #12]
+	movw	r5, #65535
+	ldrh	lr, [r3, #0]
+	cmp	lr, r5
+	beq	.L1771
+	ldr	r3, [r3, #4]
+	adds	r5, r3, #1
+	beq	.L1771
+	cmp	fp, #-1
+	bne	.L1723
+	ldr	r5, .L1786
+	ldrh	lr, [r5, r7, lsl #1]
+	movw	r5, #65535
+	cmp	lr, r5
+	bne	.L1724
+	ldr	r5, [sp, #20]
+	cbz	r5, .L1723
+.L1724:
+	cmp	r2, r6
+	ite	ne
+	movne	fp, r2
+	moveq	fp, #-1
+	b	.L1723
+.L1722:
+	ldr	r3, .L1786+4
+	mov	r5, r6
+	ldrb	r1, [r4, #8]	@ zero_extendqisi2
+	mov	r6, ip
+	str	r2, [r3, #0]
+	cmp	r1, #0
+	bne	.L1715
+	ldr	r1, .L1786
+	ldrh	r0, [r1, r7, lsl #1]
+	movw	r1, #65535
+	cmp	r0, r1
+	bne	.L1725
+	cmp	fp, #-1
+	beq	.L1726
+	str	fp, [r3, #0]
+	b	.L1715
+.L1726:
+	ldr	r0, [sp, #16]
+	cmp	r0, r5
+	beq	.L1783
+	str	r0, [r3, #0]
+	b	.L1715
+.L1725:
+	cmp	sl, r5
+	beq	.L1728
+	cmp	sl, #-1
+	beq	.L1715
+	str	sl, [r3, #0]
+	b	.L1715
+.L1728:
+	cmp	r2, r5
+	beq	.L1715
+.L1783:
+	subs	r2, r2, #1
+	b	.L1779
+.L1771:
+	mov	r3, r2
+	mov	r2, sl
+.L1723:
+	adds	r0, r0, #1
+	mov	sl, r2
+	adds	r1, r1, #36
+	mov	r2, r3
+	uxth	r0, r0
+.L1721:
+	ldr	r3, [sp, #40]
+	cmp	r0, r3
+	bne	.L1729
+	adds	r7, r7, #1
+	ldr	r1, .L1786+4
+	mov	r3, ip
+	uxth	r7, r7
+	str	r2, [r1, #0]
+.L1718:
+	cmp	r7, r8
+	bhi	.L1730
+	ldr	r5, .L1786+8
+	mov	r1, r4
+	ldr	r2, .L1786+12
+	str	r3, [sp, #40]
+	ldrh	lr, [r5, #0]
+	movs	r5, #0
+	ldr	r2, [r2, #0]
+	str	lr, [sp, #44]
+	str	r2, [sp, #20]
+	mov	r2, r5
+	b	.L1731
+.L1730:
+	mov	r5, r6
+	mov	r6, r3
+	ldr	r3, .L1786+4
+	mov	r2, #-1
+.L1779:
+	str	r2, [r3, #0]
+.L1715:
+	ldr	r3, .L1786+16
+	movs	r2, #1
+	ldr	r0, .L1786+20
+	ldr	r7, .L1786+12
+	strh	r2, [r3, #0]	@ movhi
+	bl	FtlMapBlkWriteDumpData
+	ldr	sl, [sp, #24]
+	str	r6, [sp, #20]
+.L1732:
+	ldr	r3, .L1786+24
+	movs	r6, #0
+	ldr	r0, .L1786+8
+	mov	r2, r4
+	ldr	lr, [r7, #0]
+	ldrb	fp, [r3, #0]	@ zero_extendqisi2
+	mov	r3, r6
+	ldrh	ip, [r0, #0]
+	b	.L1733
+.L1736:
+	ldrh	r0, [r2, #16]
+	movw	r1, #65535
+	cmp	r0, r1
+	beq	.L1734
+	mov	r8, #36
+	orr	r0, sl, r0, lsl #10
+	mla	r1, r8, r6, lr
+	str	r0, [r1, #4]
+	ldrb	r8, [r4, #8]	@ zero_extendqisi2
+	cmp	r8, #1
+	bne	.L1735
+	cmp	fp, #0
+	beq	.L1735
+	orr	r0, r0, #-2147483648
+	str	r0, [r1, #4]
+.L1735:
+	adds	r6, r6, #1
+	uxth	r6, r6
+.L1734:
+	adds	r3, r3, #1
+	adds	r2, r2, #2
+	uxth	r3, r3
+.L1733:
+	cmp	r3, ip
+	bne	.L1736
+	ldr	r0, [r7, #0]
+	mov	r1, r6
+	ldr	r2, [sp, #32]
+	mov	r8, #0
+	bl	FlashReadPages
+	movs	r3, #36
+	str	sl, [sp, #40]
+	muls	r3, r6, r3
+	str	r3, [sp, #52]
+	b	.L1737
+.L1761:
+	ldr	r3, [r7, #0]
+	add	sl, r3, r8
+	ldr	r6, [sl, #4]
+	ubfx	r0, r6, #10, #16
+	str	r6, [sp, #68]
+	bl	P2V_plane
+	ldr	ip, [sp, #40]
+	ldr	r3, [sp, #24]
+	cmp	ip, r3
+	bcc	.L1738
+	bne	.L1739
+	ldr	r3, [sp, #36]
+	cmp	r0, r3
+	bcc	.L1738
+.L1739:
+	ldr	ip, [sp, #40]
+	ldr	r3, [sp, #20]
+	cmp	ip, r3
+	bne	.L1740
+	ldr	ip, [sp, #28]
+	cmp	r0, ip
+	beq	.L1775
+.L1740:
+	ldr	r3, [sl, #0]
+	adds	r3, r3, #1
+	beq	.L1742
+	ldr	r6, [sl, #12]
+	movw	lr, #61589
+	ldrh	r3, [r6, #0]
+	cmp	r3, lr
+	bne	.L1749
+.L1743:
+	ldr	r5, [r6, #4]
+	adds	r3, r5, #1
+	beq	.L1744
+	ldr	sl, .L1786+28
+	mov	r0, r5
+	ldr	r1, [sl, #0]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1744
+	adds	r3, r5, #1
+	str	r3, [sl, #0]
+.L1744:
+	ldr	sl, [r6, #8]
+	add	r1, sp, #64
+	ldr	r3, [r6, #12]
+	movs	r2, #0
+	mov	r0, sl
+	str	r3, [sp, #60]
+	bl	log2phys
+	ldr	r0, .L1786+4
+	ldr	r1, [r0, #0]
+	adds	r0, r1, #1
+	beq	.L1745
+	mov	r0, r5
+	bl	ftl_cmp_data_ver
+	cmp	r0, #0
+	beq	.L1745
+	ldr	r3, [sp, #60]
+	adds	r1, r3, #1
+	beq	.L1746
+	ldr	r0, [r7, #0]
+	movs	r2, #0
+	add	r0, r0, r8
+	ldr	r1, [r0, #12]
+	str	r3, [r0, #4]
+	str	r1, [sp, #16]
+	movs	r1, #1
+	bl	FlashReadPages
+	ldr	r3, [sp, #16]
+	ldr	r3, [r3, #4]
+	str	r3, [sp, #44]
+	ldr	r3, [r7, #0]
+	add	fp, r3, r8
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	bne	.L1747
+	b	.L1748
+.L1746:
+	ldr	r3, [sp, #68]
+	ldr	r2, [sp, #64]
+	cmp	r2, r3
+	bne	.L1749
+	mov	r0, sl
+	add	r1, sp, #60
+	movs	r2, #1
+	bl	log2phys
+.L1749:
+	ldrh	r0, [r4, #0]
+	b	.L1780
+.L1747:
+	ldr	r3, [sp, #16]
+	ldr	r6, [r3, #8]
+	cmp	r6, sl
+	bne	.L1748
+	ldr	r1, .L1786+4
+	ldr	r0, [r1, #0]
+	ldr	r1, [sp, #44]
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1748
+	ldr	r3, [sp, #64]
+	ldr	r2, [sp, #68]
+	cmp	r3, r2
+	beq	.L1753
+.L1750:
+	ldr	r2, [sp, #60]
+	cmp	r3, r2
+	beq	.L1748
+	adds	r2, r3, #1
+	beq	.L1751
+	ldr	r2, [fp, #12]
+	mov	r0, fp
+	str	r3, [fp, #4]
+	movs	r1, #1
+	str	r2, [sp, #16]
+	movs	r2, #0
+	bl	FlashReadPages
+	b	.L1752
+.L1751:
+	str	r3, [fp, #0]
+.L1752:
+	ldr	r3, [r7, #0]
+	ldr	r3, [r3, r8]
+	adds	r3, r3, #1
+	beq	.L1753
+	ldr	r3, [sp, #16]
+	ldr	r1, .L1786+4
+	ldr	sl, [r3, #4]
+	ldr	r0, [r1, #0]
+	mov	r1, sl
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1753
+	ldr	r0, [sp, #44]
+	mov	r1, sl
+	bl	ftl_cmp_data_ver
+	cbz	r0, .L1748
+.L1753:
+	mov	r0, r6
+	ldr	r1, [sp, #60]
+	bl	FtlReUsePrevPpa
+.L1748:
+	ldrh	r0, [r4, #0]
+	mov	r3, #-1
+	str	r3, [sp, #60]
+	bl	decrement_vpc_count
+	b	.L1755
+.L1787:
+	.align	2
+.L1786:
+	.word	.LANCHOR9
+	.word	.LANCHOR138
+	.word	.LANCHOR53
+	.word	.LANCHOR173
+	.word	.LANCHOR224
+	.word	.LANCHOR120
+	.word	.LANCHOR7
+	.word	.LANCHOR154
+.L1745:
+	ldr	r3, [sp, #68]
+	ldr	r2, [sp, #64]
+	cmp	r2, r3
+	beq	.L1755
+	movs	r2, #1
+	mov	r0, sl
+	add	r1, sp, #68
+	bl	log2phys
+	ldr	fp, [sp, #64]
+	cmp	fp, #-1
+	beq	.L1755
+	ldr	r3, [sp, #60]
+	cmp	fp, r3
+	beq	.L1755
+	ubfx	r0, fp, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1788
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L1756
+	ldr	r3, .L1788+4
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	beq	.L1756
+	ldr	r3, .L1788+8
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	bne	.L1755
+.L1756:
+	ldr	r0, [r7, #0]
+	movs	r1, #1
+	movs	r2, #0
+	str	fp, [r0, #4]
+	ldr	r6, [r0, #12]
+	bl	FlashReadPages
+	ldr	r3, [r7, #0]
+	ldr	r1, [r6, #4]
+	ldr	r3, [r3, #0]
+	adds	r3, r3, #1
+	beq	.L1755
+	mov	r0, r5
+	bl	ftl_cmp_data_ver
+	cbnz	r0, .L1755
+	mov	r0, sl
+	add	r1, sp, #64
+	movs	r2, #1
+	bl	log2phys
+.L1755:
+	ldr	r0, [sp, #60]
+	adds	r3, r0, #1
+	beq	.L1738
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	ldr	r3, .L1788+12
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	mov	r6, r0
+	bhi	.L1757
+	ldr	r1, .L1788+16
+	movw	r2, #2027
+	ldr	r0, .L1788+20
+	bl	printf
+	ldr	r0, .L1788+24
+	ldr	r1, .L1788+28
+	bl	printf
+.L1757:
+	ldr	r3, .L1788+32
+	ldr	r3, [r3, #0]
+	ldrh	r3, [r3, r6, lsl #1]
+	cbz	r3, .L1758
+	mov	r0, r6
+.L1780:
+	bl	decrement_vpc_count
+	b	.L1738
+.L1758:
+	mov	r1, r6
+	ldr	r0, .L1788+36
+	bl	printf
+	b	.L1738
+.L1742:
+	ldr	r2, .L1788+40
+	ldr	r3, [r2, #0]
+	cmp	r3, #31
+	bhi	.L1759
+	ldr	r0, .L1788+44
+	str	r6, [r0, r3, lsl #2]
+	adds	r3, r3, #1
+	str	r3, [r2, #0]
+.L1759:
+	ldrh	r0, [r4, #0]
+	bl	decrement_vpc_count
+	ldr	r1, .L1788+48
+	ldr	r3, [r1, #0]
+	adds	r0, r3, #1
+	bne	.L1760
+	str	r5, [r1, #0]
+	b	.L1738
+.L1760:
+	cmp	r3, r5
+	itt	hi
+	ldrhi	r2, .L1788+48
+	strhi	r5, [r2, #0]
+.L1738:
+	add	r8, r8, #36
+.L1737:
+	ldr	r3, [sp, #52]
+	cmp	r8, r3
+	bne	.L1761
+	ldr	sl, [sp, #40]
+	ldrb	r3, [r4, #8]	@ zero_extendqisi2
+	add	sl, sl, #1
+	cmp	r3, #1
+	uxth	sl, sl
+	bne	.L1762
+	ldr	r3, .L1788+52
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1762
+	ldr	r3, .L1788+56
+	ldrh	r3, [r3, #0]
+	cmp	r3, sl
+	bne	.L1762
+	ldr	r8, [sp, #20]
+	cmp	r8, sl
+	beq	.L1775
+.L1762:
+	ldr	r3, .L1788+60
+	ldrh	r3, [r3, #0]
+	cmp	sl, r3
+	bne	.L1732
+	ldr	r2, .L1788+64
+	movs	r3, #0
+	strh	sl, [r4, #2]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	ldrh	r1, [r2, #0]
+	movw	r2, #65535
+	ldr	r0, [sp, #48]
+	b	.L1763
+.L1765:
+	adds	r0, r0, #2
+	ldrh	r5, [r0, #14]
+	cmp	r5, r2
+	beq	.L1764
+.L1781:
+	strb	r3, [r4, #6]
+	b	.L1692
+.L1764:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1763:
+	cmp	r3, r1
+	bne	.L1765
+	b	.L1692
+.L1775:
+.L1741:
+	ldr	r6, [sp, #20]
+	mov	r0, r4
+	ldr	r3, [sp, #28]
+	mov	r1, r6
+	mov	r2, r3
+	strh	r6, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+.L1782:
+	bl	ftl_sb_update_avl_pages
+.L1692:
+	movs	r0, #0
+	add	sp, sp, #72
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1789:
+	.align	2
+.L1788:
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR55
+	.word	.LANCHOR223
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR99
+	.word	.LC33
+	.word	.LANCHOR225
+	.word	.LANCHOR226
+	.word	.LANCHOR138
+	.word	.LANCHOR7
+	.word	.LANCHOR69
+	.word	.LANCHOR68
+	.word	.LANCHOR53
+	.size	FtlRecoverySuperblock, .-FtlRecoverySuperblock
+	.section	.text.FtlPowerLostRecovery,"ax",%progbits
+	.align	1
+	.global	FtlPowerLostRecovery
+	.thumb
+	.thumb_func
+	.type	FtlPowerLostRecovery, %function
+FtlPowerLostRecovery:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, lr}
+	movs	r4, #0
+	ldr	r3, .L1791
+	ldr	r5, .L1791+4
+	str	r4, [r3, #0]
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	ldr	r5, .L1791+8
+	bl	FtlSlcSuperblockCheck
+	mov	r0, r5
+	bl	FtlRecoverySuperblock
+	mov	r0, r5
+	bl	FtlSlcSuperblockCheck
+	bl	FtlGcPageRecovery
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	mov	r0, r4
+	pop	{r3, r4, r5, pc}
+.L1792:
+	.align	2
+.L1791:
+	.word	.LANCHOR225
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.size	FtlPowerLostRecovery, .-FtlPowerLostRecovery
+	.section	.text.FtlSysBlkInit,"ax",%progbits
+	.align	1
+	.global	FtlSysBlkInit
+	.thumb
+	.thumb_func
+	.type	FtlSysBlkInit, %function
+FtlSysBlkInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1803
+	movs	r2, #0
+	push	{r4, lr}
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L1803+4
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlScanSysBlk
+	ldr	r3, .L1803+8
+	ldrh	r2, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	beq	.L1799
+	bl	FtlLoadSysInfo
+	mov	r4, r0
+	cmp	r0, #0
+	bne	.L1800
+	bl	FtlLoadMapInfo
+	bl	FtlLoadVonderInfo
+	bl	Ftl_load_ext_data
+	bl	FtlLoadEctTbl
+	bl	FtlFreeSysBLkSort
+	bl	SupperBlkListInit
+	bl	FtlPowerLostRecovery
+	movs	r0, #1
+	bl	FtlUpdateVaildLpn
+	ldr	r3, .L1803+12
+	ldrh	r1, [r3, #0]
+	ldr	r3, .L1803+16
+	ldr	r2, [r3, #0]
+	mov	r3, r4
+	b	.L1795
+.L1797:
+	adds	r0, r2, r4
+	adds	r4, r4, #12
+	ldr	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L1796
+	adds	r3, r3, #1
+.L1795:
+	cmp	r3, r1
+	blt	.L1797
+	b	.L1802
+.L1796:
+	ldr	r0, .L1803+20
+	bl	FtlSuperblockPowerLostFix
+	ldr	r0, .L1803+24
+	bl	FtlSuperblockPowerLostFix
+	ldr	r0, .L1803+28
+	bl	FtlMapBlkWriteDumpData
+	ldr	r0, .L1803+32
+	bl	FtlMapBlkWriteDumpData
+	ldr	r3, .L1803+36
+	ldrh	r2, [r3, #30]
+	adds	r2, r2, #1
+	strh	r2, [r3, #30]	@ movhi
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+	bl	FtlVpcTblFlush
+	movs	r0, #0
+	pop	{r4, pc}
+.L1799:
+	mov	r0, #-1
+	pop	{r4, pc}
+.L1800:
+	mov	r0, #-1
+	pop	{r4, pc}
+.L1802:
+	ldr	r3, .L1803
+	ldrh	r0, [r3, #0]
+	cmp	r0, #0
+	bne	.L1796
+	pop	{r4, pc}
+.L1804:
+	.align	2
+.L1803:
+	.word	.LANCHOR224
+	.word	.LANCHOR54
+	.word	.LANCHOR191
+	.word	.LANCHOR83
+	.word	.LANCHOR112
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR120
+	.word	.LANCHOR213
+	.word	.LANCHOR140
+	.size	FtlSysBlkInit, .-FtlSysBlkInit
+	.section	.text.FtlInit,"ax",%progbits
+	.align	1
+	.global	FtlInit
+	.thumb
+	.thumb_func
+	.type	FtlInit, %function
+FtlInit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	mov	r3, #-1
+	ldr	r4, .L1807
+	movs	r2, #0
+	str	r3, [r4, #0]
+	ldr	r3, .L1807+4
+	str	r2, [r3, #0]
+	bl	FtlConstantsInit
+	bl	FtlMemInit
+	bl	FtlVariablesInit
+	ldr	r3, .L1807+8
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbnz	r0, .L1806
+	bl	FtlSysBlkInit
+	cbnz	r0, .L1806
+	movs	r3, #1
+	str	r3, [r4, #0]
+.L1806:
+	movs	r0, #0
+	pop	{r4, pc}
+.L1808:
+	.align	2
+.L1807:
+	.word	.LANCHOR222
+	.word	.LANCHOR227
+	.word	.LANCHOR54
+	.size	FtlInit, .-FtlInit
+	.section	.text.rk_ftl_garbage_collect,"ax",%progbits
+	.align	1
+	.global	rk_ftl_garbage_collect
+	.thumb
+	.thumb_func
+	.type	rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+	@ args = 0, pretend = 0, frame = 32
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L1871
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	sub	sp, sp, #32
+	ldr	r3, [r3, #0]
+	cmp	r3, #0
+	bne	.L1861
+	ldr	r2, .L1871+4
+	ldrh	r2, [r2, #0]
+	cmp	r2, #47
+	bls	.L1862
+	ldr	r3, .L1871+8
+	movw	r5, #65535
+	ldrh	r4, [r3, #0]
+	cmp	r4, r5
+	beq	.L1811
+	ldr	r1, .L1871+12
+	ldrh	r2, [r1, #0]
+	cmp	r2, r5
+	itt	eq
+	strheq	r4, [r1, #0]	@ movhi
+	strheq	r2, [r3, #0]	@ movhi
+.L1811:
+	cmp	r0, #0
+	bne	.L1863
+	ldr	r3, .L1871+16
+	ldrh	r3, [r3, #0]
+	cmp	r3, #24
+	bhi	.L1864
+	ldr	r2, .L1871+20
+	cmp	r3, #16
+	ldrh	r4, [r2, #0]
+	bls	.L1814
+	lsrs	r4, r4, #5
+	b	.L1813
+.L1814:
+	cmp	r3, #12
+	bls	.L1815
+	lsrs	r4, r4, #4
+	b	.L1813
+.L1815:
+	cmp	r3, #8
+	bls	.L1813
+	lsrs	r4, r4, #2
+	b	.L1813
+.L1864:
+	movs	r4, #1
+.L1813:
+	ldr	r2, .L1871+24
+	ldrh	r1, [r2, #0]
+	cmp	r1, r3
+	mov	r1, r2
+	bcs	.L1817
+	ldr	r3, .L1871+28
+	movw	r0, #65535
+	ldrh	r3, [r3, #0]
+	cmp	r3, r0
+	bne	.L1818
+	ldr	r0, .L1871+12
+	ldrh	r0, [r0, #0]
+	cmp	r0, r3
+	bne	.L1818
+	ldr	r3, .L1871+32
+	ldrh	r0, [r3, #0]
+	cbnz	r0, .L1819
+	ldr	r3, .L1871+36
+	movs	r1, #3
+	ldr	r3, [r3, #0]
+	muls	r1, r3, r1
+	ldr	r3, .L1871+40
+	ldr	r3, [r3, #0]
+	cmp	r3, r1, lsr #2
+	bcs	.L1820
+.L1819:
+	ldr	r3, .L1871+44
+	movs	r2, #3
+	ldrh	r3, [r3, #0]
+	muls	r2, r3, r2
+	ldr	r3, .L1871+24
+	asrs	r2, r2, #2
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1821
+.L1820:
+	movs	r3, #18
+	strh	r3, [r2, #0]	@ movhi
+.L1821:
+	ldr	r3, .L1871+48
+	movs	r2, #0
+	str	r2, [r3, #0]
+	b	.L1810
+.L1818:
+	ldr	r3, .L1871+44
+	movs	r2, #3
+	ldrh	r3, [r3, #0]
+	muls	r3, r2, r3
+	asrs	r3, r3, #2
+	strh	r3, [r1, #0]	@ movhi
+.L1817:
+	ldr	r3, .L1871+52
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1812
+	adds	r4, r4, #32
+	uxth	r4, r4
+	b	.L1812
+.L1863:
+	movs	r4, #1
+.L1812:
+	ldr	r3, .L1871+56
+	ldrh	r2, [r3, #0]
+	movw	r3, #65535
+	cmp	r2, r3
+	bne	.L1823
+	ldr	r3, .L1871+12
+	ldrh	r1, [r3, #0]
+	cmp	r1, r2
+	beq	.L1824
+	ldr	r0, .L1871+60
+	ldr	r0, [r0, #0]
+	ldrh	r1, [r0, r1, lsl #1]
+	cbnz	r1, .L1825
+	strh	r2, [r3, #0]	@ movhi
+.L1825:
+	ldrh	r1, [r3, #0]
+	ldr	r2, .L1871+56
+	strh	r1, [r2, #0]	@ movhi
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1824:
+	ldr	r5, .L1871+56
+	movw	r6, #65535
+	movs	r3, #0
+	ldrh	r0, [r5, #0]
+	strb	r3, [r5, #8]
+	cmp	r0, r6
+	beq	.L1823
+	bl	IsBlkInGcList
+	cbz	r0, .L1826
+	strh	r6, [r5, #0]	@ movhi
+.L1826:
+	ldr	r3, .L1871+64
+	ldr	r6, .L1871+56
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L1827
+	ldrh	r0, [r6, #0]
+	bl	ftl_get_blk_mode
+	strb	r0, [r6, #8]
+.L1827:
+	ldrh	r2, [r6, #0]
+	movw	r3, #65535
+	ldr	r5, .L1871+56
+	cmp	r2, r3
+	beq	.L1823
+	mov	r0, r5
+	bl	make_superblock
+	ldr	r2, .L1871+68
+	movs	r3, #0
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r3, [r2, #0]	@ movhi
+	ldr	r3, .L1871+60
+	ldrh	r2, [r5, #0]
+	ldr	r3, [r3, #0]
+	ldrh	r2, [r3, r2, lsl #1]
+	ldr	r3, .L1871+72
+	strh	r2, [r3, #0]	@ movhi
+.L1823:
+	ldr	r2, .L1871+56
+	ldr	r1, .L1871+76
+	ldrh	r3, [r2, #0]
+	ldrh	r1, [r1, #0]
+	cmp	r1, r3
+	beq	.L1828
+	ldr	r1, .L1871+80
+	ldrh	r1, [r1, #0]
+	cmp	r1, r3
+	bne	.L1865
+.L1829:
+.L1828:
+	movw	r3, #65535
+	strh	r3, [r2, #0]	@ movhi
+	b	.L1870
+.L1865:
+	ldr	r6, .L1871+84
+	ldr	r7, .L1871+88
+.L1867:
+	ldr	r3, .L1871+56
+	movw	r2, #65535
+	ldrh	r8, [r3, #0]
+	cmp	r8, r2
+	bne	.L1831
+	ldr	r2, .L1871+48
+	mov	sl, r3
+	ldr	fp, .L1871+60
+	movs	r1, #0
+	str	r1, [r2, #0]
+.L1866:
+	ldrh	r1, [r6, #0]
+	mov	r0, r1
+	str	r1, [sp, #8]
+	bl	List_get_gc_head_node
+	uxth	r5, r0
+	strh	r5, [sl, #0]	@ movhi
+	cmp	r5, r8
+	bne	.L1833
+	ldr	r3, .L1871+84
+	movs	r2, #0
+	movs	r0, #8
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1810
+.L1833:
+	mov	r0, r5
+	bl	IsBlkInGcList
+	ldr	r2, [sp, #8]
+	adds	r3, r2, #1
+	cbnz	r0, .L1868
+.L1834:
+	ldr	r1, .L1871+20
+	uxth	r0, r3
+	ldr	r3, [fp, #0]
+	strh	r0, [r6, #0]	@ movhi
+	ldrh	ip, [r1, #0]
+	ldr	r1, .L1871+92
+	ldrh	r2, [r3, r5, lsl #1]
+	ldrh	r1, [r1, #0]
+	mul	r1, r1, ip
+	cmp	r2, r1, asr #1
+	bgt	.L1836
+	cmp	r0, #48
+	bls	.L1837
+	cmp	r2, #8
+	bls	.L1837
+	ldr	r2, .L1871+96
+	ldrh	r2, [r2, #0]
+	cmp	r2, #35
+	bhi	.L1837
+.L1836:
+	movs	r2, #0
+	strh	r2, [r6, #0]	@ movhi
+.L1837:
+	ldrh	r2, [r3, r5, lsl #1]
+	ldr	r3, .L1871+56
+	cmp	r2, r1
+	blt	.L1838
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+	ldr	r3, .L1871+84
+	movs	r2, #0
+	strh	r2, [r3, #0]	@ movhi
+	b	.L1870
+.L1838:
+	cbnz	r2, .L1839
+	movw	r0, #65535
+	bl	decrement_vpc_count
+	ldrh	r3, [r6, #0]
+	adds	r3, r3, #1
+.L1868:
+	strh	r3, [r6, #0]	@ movhi
+	b	.L1866
+.L1872:
+	.align	2
+.L1871:
+	.word	.LANCHOR165
+	.word	.LANCHOR101
+	.word	.LANCHOR147
+	.word	.LANCHOR146
+	.word	.LANCHOR104
+	.word	.LANCHOR68
+	.word	.LANCHOR170
+	.word	.LANCHOR109
+	.word	.LANCHOR228
+	.word	.LANCHOR87
+	.word	.LANCHOR116
+	.word	.LANCHOR200
+	.word	.LANCHOR166
+	.word	.LANCHOR148
+	.word	.LANCHOR201
+	.word	.LANCHOR99
+	.word	.LANCHOR7
+	.word	.LANCHOR229
+	.word	.LANCHOR230
+	.word	.LANCHOR107
+	.word	.LANCHOR108
+	.word	.LANCHOR172
+	.word	.LANCHOR132
+	.word	.LANCHOR53
+	.word	.LANCHOR142
+.L1839:
+	movs	r2, #0
+	strb	r2, [r3, #8]
+	ldr	r2, .L1873
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbz	r2, .L1840
+	mov	r0, r5
+	str	r3, [sp, #4]
+	bl	ftl_get_blk_mode
+	ldr	r3, [sp, #4]
+	strb	r0, [r3, #8]
+.L1840:
+	ldr	r5, .L1873+4
+	ldr	r3, .L1873+8
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1841
+	ldr	r1, .L1873+12
+	mov	r2, #772
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1841:
+	ldr	r3, .L1873+28
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1842
+	ldr	r1, .L1873+12
+	movw	r2, #773
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1842:
+	ldr	r5, .L1873+4
+	ldr	r3, .L1873+32
+	ldrh	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1843
+	ldr	r1, .L1873+12
+	movw	r2, #774
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1843:
+	ldr	r0, .L1873+4
+	bl	make_superblock
+	ldr	r1, .L1873+36
+	movs	r3, #0
+	ldrh	r0, [r5, #0]
+	strh	r3, [r1, #0]	@ movhi
+	ldr	r1, .L1873+40
+	ldr	r1, [r1, #0]
+	ldrh	r0, [r1, r0, lsl #1]
+	ldr	r1, .L1873+44
+	strh	r3, [r5, #2]	@ movhi
+	strb	r3, [r5, #6]
+	strh	r0, [r1, #0]	@ movhi
+.L1831:
+	ldr	r3, .L1873+48
+	movs	r2, #1
+	str	r2, [r3, #0]
+	ldr	r3, .L1873+52
+	ldrh	r3, [r3, #0]
+	str	r3, [sp, #8]
+	ldr	r3, .L1873
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	ldr	r3, .L1873+4
+	cbz	r2, .L1844
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	cmp	r2, #1
+	bne	.L1844
+	ldr	r2, .L1873+56
+	ldrh	r2, [r2, #0]
+	str	r2, [sp, #8]
+.L1844:
+	ldrh	r3, [r3, #2]
+	ldr	r8, [sp, #8]
+	adds	r2, r3, r4
+	cmp	r2, r8
+	itt	gt
+	rsbgt	r4, r3, r8
+	uxthgt	r4, r4
+	movs	r3, #0
+	str	r4, [sp, #20]
+	str	r3, [sp, #12]
+	b	.L1846
+.L1848:
+	ldrh	r1, [r2, #2]!
+	movw	r8, #65535
+	cmp	r1, r8
+	beq	.L1847
+	mla	r8, r0, r5, lr
+	adds	r5, r5, #1
+	orr	r1, r4, r1, lsl #10
+	uxth	r5, r5
+	str	r1, [r8, #4]
+.L1847:
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1855:
+	cmp	r3, ip
+	bne	.L1848
+	ldr	r3, .L1873+4
+	mov	r1, r5
+	ldr	r0, [r7, #0]
+	movs	r4, #0
+	mov	sl, r5
+	ldrb	r2, [r3, #8]	@ zero_extendqisi2
+	bl	FlashReadPages
+	str	r4, [sp, #16]
+	b	.L1849
+.L1853:
+	ldr	r3, [r7, #0]
+	adds	r2, r3, r4
+	ldr	r3, [r3, r4]
+	ldr	r5, [r2, #12]
+	adds	r3, r3, #1
+	beq	.L1850
+	ldrh	r3, [r5, #0]
+	movw	r8, #61589
+	cmp	r3, r8
+	bne	.L1850
+	ldr	r8, [r5, #8]
+	cmp	r8, #-1
+	bne	.L1851
+	ldr	r1, .L1873+12
+	mov	r2, #812
+	ldr	r0, .L1873+16
+	bl	printf
+	ldr	r0, .L1873+20
+	ldr	r1, .L1873+24
+	bl	printf
+.L1851:
+	movs	r2, #0
+	add	r1, sp, #28
+	mov	r0, r8
+	bl	log2phys
+	ldr	r2, [r7, #0]
+	ldr	r1, [sp, #28]
+	adds	r2, r2, r4
+	bic	r1, r1, #-2147483648
+	ldr	r3, [r2, #4]
+	cmp	r1, r3
+	bne	.L1850
+	ldr	r0, .L1873+36
+	mov	fp, #36
+	ldr	r8, .L1873+72
+	ldr	r2, [r2, #16]
+	ldrh	r3, [r0, #0]
+	ldr	r1, [r8, #0]
+	adds	r3, r3, #1
+	strh	r3, [r0, #0]	@ movhi
+	ldr	r0, .L1873+60
+	ldr	r3, [r0, #0]
+	mla	r3, fp, r1, r3
+	str	r2, [r3, #16]
+	str	r3, [sp, #4]
+	bl	Ftl_get_new_temp_ppa
+	ldr	r3, [sp, #4]
+	ldr	r1, .L1873+60
+	ldr	r2, [r1, #0]
+	str	r0, [r3, #4]
+	ldr	r3, [r8, #0]
+	ldr	r0, [r7, #0]
+	mla	r2, fp, r3, r2
+	adds	r0, r0, r4
+	ldr	fp, .L1873+32
+	adds	r3, r3, #1
+	ldr	r1, [r0, #8]
+	str	r1, [r2, #8]
+	ldr	r1, [r0, #12]
+	str	r1, [r2, #12]
+	movs	r1, #1
+	ldr	r2, [sp, #28]
+	str	r2, [r5, #12]
+	ldrh	r2, [fp, #0]
+	strh	r2, [r5, #2]	@ movhi
+	ldr	r2, .L1873+64
+	str	r3, [r8, #0]
+	ldr	r2, [r2, #0]
+	str	r2, [r5, #4]
+	bl	FtlGcBufAlloc
+	ldr	r3, .L1873
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbnz	r3, .L1852
+	ldrb	r3, [fp, #7]	@ zero_extendqisi2
+	ldr	r2, [r8, #0]
+	cmp	r2, r3
+	beq	.L1852
+	ldrh	r3, [fp, #4]
+	cbnz	r3, .L1850
+.L1852:
+	bl	Ftl_gc_temp_data_write_back
+	cmp	r0, #0
+	bne	.L1869
+.L1850:
+	ldr	r8, [sp, #16]
+	adds	r4, r4, #36
+	add	r3, r8, #1
+	uxth	r3, r3
+	str	r3, [sp, #16]
+.L1849:
+	ldr	r3, [sp, #16]
+	cmp	r3, sl
+	bne	.L1853
+	ldr	r8, [sp, #12]
+	add	r8, r8, #1
+	str	r8, [sp, #12]
+.L1846:
+	ldr	r8, [sp, #12]
+	ldr	r2, .L1873+4
+	uxth	r3, r8
+	ldr	r8, [sp, #20]
+	cmp	r3, r8
+	bcs	.L1854
+	ldr	r3, .L1873+68
+	movs	r5, #0
+	ldrh	r4, [r2, #2]
+	movs	r0, #36
+	ldr	lr, [r7, #0]
+	adds	r2, r2, #14
+	ldrh	ip, [r3, #0]
+	ldr	r3, [sp, #12]
+	adds	r4, r4, r3
+	mov	r3, r5
+	b	.L1855
+.L1854:
+	ldrh	r3, [r2, #2]
+	ldr	r4, [sp, #20]
+	ldr	r8, [sp, #8]
+	adds	r4, r4, r3
+	uxth	r4, r4
+	strh	r4, [r2, #2]	@ movhi
+	cmp	r4, r8
+	bcs	.L1856
+	ldr	r3, .L1873+36
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L1873+44
+	ldrh	r3, [r3, #0]
+	cmp	r2, r3
+	bne	.L1857
+.L1856:
+	ldr	r3, .L1873+72
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1858
+	bl	Ftl_gc_temp_data_write_back
+	cbz	r0, .L1858
+.L1869:
+	ldr	r3, .L1873+48
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1870:
+	ldr	r3, .L1873+76
+	ldrh	r0, [r3, #0]
+	b	.L1810
+.L1874:
+	.align	2
+.L1873:
+	.word	.LANCHOR7
+	.word	.LANCHOR201
+	.word	.LANCHOR107
+	.word	.LANCHOR231
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR108
+	.word	.LANCHOR109
+	.word	.LANCHOR229
+	.word	.LANCHOR99
+	.word	.LANCHOR230
+	.word	.LANCHOR165
+	.word	.LANCHOR68
+	.word	.LANCHOR69
+	.word	.LANCHOR174
+	.word	.LANCHOR154
+	.word	.LANCHOR53
+	.word	.LANCHOR128
+	.word	.LANCHOR228
+.L1858:
+	ldr	r3, .L1875
+	ldrh	r0, [r3, #0]
+	cbnz	r0, .L1859
+	ldr	r3, .L1875+4
+	ldr	r2, .L1875+8
+	ldrh	r1, [r3, #0]
+	ldr	r2, [r2, #0]
+	ldrh	r4, [r2, r1, lsl #1]
+	cbz	r4, .L1859
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	ldrh	r0, [r3, #0]
+	bl	update_vpc_list
+	bl	FtlCacheWriteBack
+	bl	l2p_flush
+	bl	FtlVpcTblFlush
+.L1859:
+	ldr	r3, .L1875+4
+	movw	r2, #65535
+	strh	r2, [r3, #0]	@ movhi
+.L1857:
+	ldr	r3, .L1875+12
+	ldrh	r0, [r3, #0]
+	cmp	r0, #2
+	bhi	.L1860
+	ldr	r3, .L1875+16
+	ldrh	r4, [r3, #0]
+	b	.L1867
+.L1860:
+	ldr	r3, .L1875+20
+	movs	r2, #0
+	adds	r0, r0, #1
+	str	r2, [r3, #0]
+	b	.L1810
+.L1861:
+	movs	r0, #0
+	b	.L1810
+.L1862:
+	mov	r0, r3
+.L1810:
+	add	sp, sp, #32
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1876:
+	.align	2
+.L1875:
+	.word	.LANCHOR229
+	.word	.LANCHOR201
+	.word	.LANCHOR99
+	.word	.LANCHOR104
+	.word	.LANCHOR68
+	.word	.LANCHOR165
+	.size	rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+	.section	.text.ftl_write,"ax",%progbits
+	.align	1
+	.global	ftl_write
+	.thumb
+	.thumb_func
+	.type	ftl_write, %function
+ftl_write:
+	@ args = 0, pretend = 0, frame = 80
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	cmp	r0, #16
+	sub	sp, sp, #80
+	mov	r5, r1
+	str	r2, [sp, #12]
+	str	r3, [sp, #4]
+	bne	.L1878
+	add	r0, r1, #256
+	mov	r1, r2
+	mov	r2, r3
+	bl	FtlVendorPartWrite
+	b	.L1879
+.L1878:
+	ldr	r3, .L1920
+	ldr	r0, [sp, #12]
+	ldr	r3, [r3, #0]
+	adds	r7, r0, r1
+	cmp	r7, r3
+	bhi	.L1910
+	ldr	r3, .L1920+4
+	ldr	r0, [r3, #0]
+	adds	r1, r0, #1
+	beq	.L1879
+	ldr	r3, .L1920+8
+	mov	r2, #2048
+	mov	r0, r5
+	str	r2, [r3, #0]
+	ldr	r3, .L1920+12
+	ldrh	r6, [r3, #0]
+	mov	r1, r6
+	bl	__aeabi_uidiv
+	mov	r1, r6
+	mov	sl, r0
+	subs	r0, r7, #1
+	bl	__aeabi_uidiv
+	ldr	r3, .L1920+16
+	ldr	r2, [r3, #0]
+	rsb	r4, sl, r0
+	str	r0, [sp, #24]
+	adds	r1, r4, #1
+	str	r1, [sp, #0]
+	adds	r2, r1, r2
+	str	r2, [r3, #0]
+	ldr	r3, .L1920+20
+	ldr	r7, [r3, #0]
+	cbz	r7, .L1880
+	ldr	r3, [r7, #16]
+	cmp	sl, r3
+	beq	.L1881
+	bl	FtlCacheWriteBack
+	b	.L1880
+.L1881:
+	ldr	r3, .L1920+24
+	mov	r1, r6
+	mov	r0, r5
+	ldr	r2, [r3, #0]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	bl	__aeabi_uidivmod
+	ldr	r2, [sp, #12]
+	ldr	r0, [r7, #8]
+	subs	r6, r6, r1
+	add	r0, r0, r1, lsl #9
+	cmp	r6, r2
+	it	cs
+	movcs	r6, r2
+	ldr	r1, [sp, #4]
+	lsl	r8, r6, #9
+	mov	r2, r8
+	bl	memcpy
+	cmp	r4, #0
+	beq	.L1912
+	ldr	r3, [sp, #12]
+	adds	r5, r5, r6
+	ldr	r0, [sp, #4]
+	add	sl, sl, #1
+	subs	r3, r3, r6
+	str	r3, [sp, #12]
+	add	r0, r0, r8
+	str	r0, [sp, #4]
+	bl	FtlCacheWriteBack
+	str	r4, [sp, #0]
+.L1880:
+	mov	r4, sl
+	str	sl, [sp, #20]
+	ldr	r6, .L1920+28
+	mov	sl, r5
+	b	.L1882
+.L1909:
+	ldr	r1, .L1920+32
+	ldrb	r2, [r6, #6]	@ zero_extendqisi2
+	ldrh	r3, [r1, #0]
+	cmp	r2, r3
+	bcc	.L1883
+	ldr	r1, .L1920+36
+	mov	r2, #1544
+	ldr	r0, .L1920+40
+	bl	printf
+	ldr	r0, .L1920+44
+	ldr	r1, .L1920+48
+	bl	printf
+.L1883:
+	ldr	r2, .L1920+28
+	ldrh	r3, [r2, #4]
+	cbnz	r3, .L1884
+	bl	FtlCacheWriteBack
+	ldr	r0, .L1920+28
+	bl	allocate_new_data_superblock
+.L1884:
+	ldrb	r3, [r6, #7]	@ zero_extendqisi2
+	ldrh	r2, [r6, #4]
+	ldr	r1, .L1920+32
+	lsls	r3, r3, #2
+	ldr	r0, [sp, #0]
+	cmp	r3, r2
+	it	cs
+	movcs	r3, r2
+	ldrb	r2, [r6, #6]	@ zero_extendqisi2
+	cmp	r3, r0
+	it	cc
+	movcc	r0, r3
+	ldrh	r3, [r1, #0]
+	str	r0, [sp, #8]
+	cmp	r2, r3
+	bcc	.L1885
+	ldr	r1, .L1920+36
+	movw	r2, #1577
+	ldr	r0, .L1920+40
+	bl	printf
+	ldr	r0, .L1920+44
+	ldr	r1, .L1920+48
+	bl	printf
+.L1885:
+	movs	r3, #0
+	ldr	r5, .L1920+52
+	str	r3, [sp, #16]
+	b	.L1886
+.L1905:
+	ldrh	r3, [r6, #4]
+	cmp	r3, #0
+	beq	.L1913
+	movs	r2, #0
+	add	r1, sp, #76
+	mov	r0, r4
+	movs	r7, #36
+	bl	log2phys
+	ldr	r0, .L1920+28
+	bl	get_new_active_ppa
+	ldr	r3, [sp, #16]
+	muls	r7, r3, r7
+	ldr	r3, [r5, #0]
+	adds	r3, r3, r7
+	str	r4, [r3, #16]
+	str	r0, [r3, #4]
+	ldr	r0, .L1920+56
+	ldrh	r2, [r0, #0]
+	ldr	r0, [sp, #16]
+	mul	r1, r2, r0
+	lsrs	r1, r1, #2
+	str	r1, [sp, #32]
+	ldr	r1, .L1920+60
+	ldr	r0, [sp, #32]
+	ldr	r1, [r1, #0]
+	add	r8, r1, r0, lsl #2
+	str	r8, [r3, #12]
+	str	r1, [sp, #36]
+	mov	r0, r8
+	movs	r1, #0
+	bl	memset
+	ldr	r1, [sp, #20]
+	ldr	r3, .L1920+12
+	cmp	r4, r1
+	beq	.L1888
+	ldr	r2, [sp, #24]
+	cmp	r4, r2
+	bne	.L1915
+	b	.L1919
+.L1888:
+	ldrh	fp, [r3, #0]
+	mov	r0, sl
+	mov	r1, fp
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #12]
+	rsb	fp, r1, fp
+	str	r1, [sp, #28]
+	cmp	fp, r3
+	it	cs
+	movcs	fp, r3
+	b	.L1891
+.L1919:
+	ldr	r0, [sp, #12]
+	ldrh	fp, [r3, #0]
+	movs	r3, #0
+	add	r2, sl, r0
+	str	r3, [sp, #28]
+	mls	fp, r4, fp, r2
+	uxth	fp, fp
+.L1891:
+	ldr	r3, .L1920+12
+	ldrh	r3, [r3, #0]
+	cmp	fp, r3
+	bne	.L1892
+	ldr	r0, [sp, #20]
+	ldr	r3, [r5, #0]
+	cmp	r4, r0
+	add	r7, r3, r7
+	bne	.L1893
+	ldr	r1, [sp, #4]
+	str	r1, [r7, #8]
+	b	.L1894
+.L1893:
+	mul	r3, fp, r4
+	ldr	r2, [sp, #4]
+	rsb	r3, sl, r3
+	add	r3, r2, r3, lsl #9
+	b	.L1918
+.L1892:
+	ldr	r3, [sp, #20]
+	cmp	r4, r3
+	ldr	r3, [r5, #0]
+	it	eq
+	ldreq	r2, .L1920+64
+	add	r3, r3, r7
+	it	ne
+	ldrne	r2, .L1920+68
+	ldr	r2, [r2, #0]
+	str	r2, [r3, #8]
+	ldr	r3, [sp, #76]
+	adds	r2, r3, #1
+	beq	.L1897
+	str	r3, [sp, #44]
+	movs	r1, #1
+	ldr	r3, [r5, #0]
+	add	r0, sp, #40
+	str	r4, [sp, #56]
+	adds	r3, r3, r7
+	ldr	r2, [r3, #8]
+	ldr	r3, [r3, #12]
+	str	r2, [sp, #48]
+	movs	r2, #0
+	str	r3, [sp, #52]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	adds	r3, r3, #1
+	bne	.L1898
+	ldr	r3, .L1920+72
+	ldr	r2, [r3, #72]
+	adds	r2, r2, #1
+	str	r2, [r3, #72]
+	b	.L1899
+.L1898:
+	ldr	r1, [r8, #8]
+	cmp	r1, r4
+	beq	.L1900
+	ldr	r3, .L1920+72
+	ldr	r0, .L1920+76
+	ldr	r2, [r3, #72]
+	adds	r2, r2, #1
+	str	r2, [r3, #72]
+	mov	r2, r4
+	bl	printf
+.L1900:
+	ldr	r3, [r8, #8]
+	cmp	r3, r4
+	beq	.L1899
+	ldr	r1, .L1920+36
+	movw	r2, #1630
+	ldr	r0, .L1920+40
+	bl	printf
+	ldr	r1, .L1920+48
+	ldr	r0, .L1920+44
+	bl	printf
+	b	.L1899
+.L1897:
+	ldr	r3, [r5, #0]
+	movs	r1, #0
+	adds	r3, r3, r7
+	ldr	r0, [r3, #8]
+	ldr	r3, .L1920+80
+	ldrh	r2, [r3, #0]
+	bl	memset
+.L1899:
+	ldr	r0, [sp, #20]
+	ldr	r3, [r5, #0]
+	cmp	r4, r0
+	add	r3, r3, r7
+	bne	.L1901
+	ldr	r0, [r3, #8]
+	ldr	r3, [sp, #28]
+	ldr	r1, [sp, #4]
+	add	r0, r0, r3, lsl #9
+	b	.L1917
+.L1921:
+	.align	2
+.L1920:
+	.word	.LANCHOR84
+	.word	.LANCHOR222
+	.word	.LANCHOR232
+	.word	.LANCHOR71
+	.word	.LANCHOR156
+	.word	.LANCHOR134
+	.word	.LANCHOR158
+	.word	.LANCHOR107
+	.word	.LANCHOR53
+	.word	.LANCHOR233
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR175
+	.word	.LANCHOR74
+	.word	.LANCHOR181
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR141
+	.word	.LC34
+	.word	.LANCHOR73
+.L1901:
+	ldr	r2, .L1922
+	ldr	r0, [r3, #8]
+	ldrh	r1, [r2, #0]
+	muls	r1, r4, r1
+	ldr	r2, [sp, #4]
+	rsb	r1, sl, r1
+	add	r1, r2, r1, lsl #9
+.L1917:
+	lsl	r2, fp, #9
+	bl	memcpy
+	ldr	r3, [sp, #24]
+	cmp	r4, r3
+	bne	.L1894
+	ldrh	r3, [r6, #4]
+	cbz	r3, .L1894
+	ldr	r3, [r5, #0]
+	adds	r7, r3, r7
+	ldr	r3, .L1922+4
+	str	r7, [r3, #0]
+	ldr	r3, .L1922+8
+	str	r6, [r3, #0]
+	b	.L1894
+.L1915:
+	ldr	r2, [r5, #0]
+	ldrh	r3, [r3, #0]
+	muls	r3, r4, r3
+	ldr	r0, [sp, #4]
+	rsb	r3, sl, r3
+	adds	r7, r2, r7
+	add	r3, r0, r3, lsl #9
+.L1918:
+	str	r3, [r7, #8]
+.L1894:
+	ldr	r1, .L1922+12
+	ldrb	r2, [r6, #6]	@ zero_extendqisi2
+	ldrh	r3, [r1, #0]
+	cmp	r2, r3
+	bcc	.L1903
+	ldr	r1, .L1922+16
+	movw	r2, #1651
+	ldr	r0, .L1922+20
+	bl	printf
+	ldr	r0, .L1922+24
+	ldr	r1, .L1922+28
+	bl	printf
+.L1903:
+	ldr	r2, [sp, #36]
+	movw	r3, #61589
+	ldr	r0, [sp, #32]
+	strh	r3, [r2, r0, lsl #2]	@ movhi
+	ldr	r3, .L1922+32
+	ldr	r2, [r3, #0]
+	str	r2, [r8, #4]
+	adds	r2, r2, #1
+	str	r2, [r3, #0]
+	adds	r2, r2, #1
+	bne	.L1904
+	movs	r2, #0
+	str	r2, [r3, #0]
+.L1904:
+	ldr	r3, [sp, #76]
+	str	r4, [r8, #8]
+	adds	r4, r4, #1
+	str	r3, [r8, #12]
+	ldrh	r3, [r6, #0]
+	strh	r3, [r8, #2]	@ movhi
+	ldr	r3, [sp, #16]
+	adds	r3, r3, #1
+	str	r3, [sp, #16]
+.L1886:
+	ldr	r3, [sp, #16]
+	ldr	r0, [sp, #8]
+	cmp	r3, r0
+	bne	.L1905
+	b	.L1887
+.L1913:
+	ldr	r3, [sp, #16]
+	str	r3, [sp, #8]
+.L1887:
+	ldr	r3, .L1922+4
+	ldr	r3, [r3, #0]
+	cbz	r3, .L1906
+	ldr	r0, [sp, #8]
+	subs	r0, r0, #1
+	str	r0, [sp, #8]
+	beq	.L1907
+	ldr	r1, [sp, #0]
+	subs	r1, r1, #1
+	str	r1, [sp, #0]
+.L1906:
+	ldr	r3, .L1922+36
+	movs	r2, #0
+	ldr	r1, [sp, #8]
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1922+40
+	bl	FtlProgPages
+	ldr	r2, [sp, #0]
+	ldr	r3, [sp, #8]
+	cmp	r2, r3
+	bcs	.L1908
+	ldr	r1, .L1922+16
+	movw	r2, #1666
+	ldr	r0, .L1922+20
+	bl	printf
+	ldr	r0, .L1922+24
+	ldr	r1, .L1922+28
+	bl	printf
+.L1908:
+	ldr	r0, [sp, #0]
+	ldr	r1, [sp, #8]
+	subs	r0, r0, r1
+	str	r0, [sp, #0]
+.L1882:
+	ldr	r2, [sp, #0]
+	cmp	r2, #0
+	bne	.L1909
+.L1907:
+	ldr	sl, [sp, #20]
+	movs	r0, #0
+	ldr	r3, [sp, #24]
+	rsb	r1, sl, r3
+	bl	rk_ftl_garbage_collect
+	movs	r0, #0
+	b	.L1879
+.L1910:
+	mov	r0, #-1
+	b	.L1879
+.L1912:
+	mov	r0, r4
+.L1879:
+	add	sp, sp, #80
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1923:
+	.align	2
+.L1922:
+	.word	.LANCHOR71
+	.word	.LANCHOR134
+	.word	.LANCHOR219
+	.word	.LANCHOR53
+	.word	.LANCHOR233
+	.word	.LC9
+	.word	.LC10
+	.word	.LC11
+	.word	.LANCHOR154
+	.word	.LANCHOR175
+	.word	.LANCHOR107
+	.size	ftl_write, .-ftl_write
+	.section	.text.ftl_read,"ax",%progbits
+	.align	1
+	.global	ftl_read
+	.thumb
+	.thumb_func
+	.type	ftl_read, %function
+ftl_read:
+	@ args = 0, pretend = 0, frame = 72
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	cmp	r0, #16
+	sub	sp, sp, #72
+	mov	r4, r1
+	mov	r7, r3
+	str	r2, [sp, #36]
+	bne	.L1925
+	add	r0, r1, #256
+	mov	r1, r2
+	mov	r2, r3
+	bl	FtlVendorPartRead
+	str	r0, [sp, #12]
+	b	.L1926
+.L1925:
+	ldr	r3, [sp, #36]
+	adds	r3, r3, r1
+	str	r3, [sp, #16]
+	ldr	r3, .L1958
+	ldr	r1, [sp, #16]
+	ldr	r3, [r3, #0]
+	cmp	r1, r3
+	bhi	.L1946
+	ldr	r3, .L1958+4
+	ldr	r3, [r3, #0]
+	adds	r2, r3, #1
+	beq	.L1947
+	ldr	fp, .L1958+48
+	bl	FtlCacheWriteBack
+	mov	r0, r4
+	mov	sl, #0
+	mov	r8, r4
+	ldrh	r5, [fp, #0]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r3, [sp, #16]
+	mov	r1, r5
+	mov	r5, sl
+	str	r0, [sp, #20]
+	subs	r0, r3, #1
+	bl	__aeabi_uidiv
+	ldr	r1, [sp, #20]
+	ldr	r6, [sp, #20]
+	rsb	r3, r1, #1
+	str	sl, [sp, #32]
+	str	sl, [sp, #12]
+	adds	r3, r3, r0
+	str	r3, [sp, #8]
+	ldr	r3, .L1958+8
+	ldr	r1, [sp, #8]
+	str	r0, [sp, #24]
+	ldr	r2, [r3, #0]
+	adds	r2, r1, r2
+	str	r2, [r3, #0]
+	b	.L1953
+.L1945:
+	movs	r2, #0
+	mov	r0, r6
+	add	r1, sp, #68
+	bl	log2phys
+	ldr	r3, [sp, #68]
+	adds	r4, r3, #1
+	bne	.L1954
+	b	.L1957
+.L1931:
+	mla	r0, r0, r6, r4
+	cmp	r0, r8
+	bcc	.L1930
+	ldr	r3, [sp, #16]
+	cmp	r0, r3
+	bcs	.L1930
+	rsb	r0, r8, r0
+	movs	r1, #0
+	mov	r2, #512
+	add	r0, r7, r0, lsl #9
+	bl	memset
+.L1930:
+	adds	r4, r4, #1
+	b	.L1928
+.L1957:
+	movs	r4, #0
+.L1928:
+	ldrh	r0, [fp, #0]
+	cmp	r4, r0
+	bcc	.L1931
+	b	.L1932
+.L1954:
+	ldr	r2, .L1958+12
+	movs	r4, #36
+	ldr	r2, [r2, #0]
+	mla	r4, r4, r5, r2
+	str	r3, [r4, #4]
+	ldr	r3, [sp, #20]
+	cmp	r6, r3
+	bne	.L1933
+	ldr	r3, .L1958+16
+	mov	r0, r8
+	ldr	r3, [r3, #0]
+	str	r3, [r4, #8]
+	ldrh	r3, [fp, #0]
+	mov	r1, r3
+	str	r3, [sp, #4]
+	bl	__aeabi_uidivmod
+	ldr	r3, [sp, #4]
+	str	r1, [sp, #40]
+	subs	r2, r3, r1
+	ldr	r1, [sp, #36]
+	cmp	r2, r1
+	it	cc
+	movcc	r1, r2
+	str	r1, [sp, #32]
+	cmp	r1, r3
+	bne	.L1934
+	str	r7, [r4, #8]
+	b	.L1934
+.L1933:
+	ldr	r3, [sp, #24]
+	cmp	r6, r3
+	bne	.L1935
+	ldr	r3, .L1958+20
+	ldrh	r2, [fp, #0]
+	ldr	r1, [sp, #16]
+	ldr	r3, [r3, #0]
+	str	r3, [r4, #8]
+	mul	r3, r2, r6
+	rsb	sl, r3, r1
+	cmp	sl, r2
+	bne	.L1934
+	b	.L1955
+.L1935:
+	ldrh	r3, [fp, #0]
+	muls	r3, r6, r3
+.L1955:
+	rsb	r3, r8, r3
+	add	r3, r7, r3, lsl #9
+	str	r3, [r4, #8]
+.L1934:
+	ldr	r3, .L1958+24
+	ldr	r2, .L1958+28
+	str	r6, [r4, #16]
+	ldrh	r3, [r3, #0]
+	muls	r3, r5, r3
+	ldr	r2, [r2, #0]
+	adds	r5, r5, #1
+	bic	r3, r3, #3
+	adds	r3, r2, r3
+	str	r3, [r4, #12]
+.L1932:
+	ldr	r3, [sp, #8]
+	adds	r6, r6, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #8]
+	beq	.L1936
+	ldr	r3, .L1958+32
+	ldrh	r3, [r3, #0]
+	cmp	r5, r3, lsl #2
+	bne	.L1953
+.L1936:
+	cmp	r5, #0
+	beq	.L1953
+	ldr	r4, .L1958+12
+	mov	r1, r5
+	movs	r2, #0
+	ldr	r0, [r4, #0]
+	bl	FlashReadPages
+	ldr	r3, [sp, #40]
+	str	r6, [sp, #60]
+	lsls	r3, r3, #9
+	str	r3, [sp, #44]
+	ldr	r3, [sp, #32]
+	lsls	r3, r3, #9
+	str	r3, [sp, #48]
+	lsl	r3, sl, #9
+	str	r3, [sp, #52]
+	movs	r3, #0
+	str	r3, [sp, #28]
+.L1944:
+	movs	r6, #36
+	ldr	r3, [sp, #28]
+	muls	r6, r3, r6
+	ldr	r3, [r4, #0]
+	ldr	r1, [sp, #20]
+	adds	r3, r3, r6
+	ldr	r2, [r3, #16]
+	cmp	r2, r1
+	bne	.L1938
+	ldr	r1, [r3, #8]
+	ldr	r3, .L1958+16
+	ldr	r3, [r3, #0]
+	cmp	r1, r3
+	bne	.L1939
+	ldr	r3, [sp, #44]
+	mov	r0, r7
+	ldr	r2, [sp, #48]
+	adds	r1, r1, r3
+	b	.L1956
+.L1938:
+	ldr	r1, [sp, #24]
+	cmp	r2, r1
+	bne	.L1939
+	ldr	r2, .L1958+20
+	ldr	r1, [r3, #8]
+	ldr	r3, [r2, #0]
+	cmp	r1, r3
+	bne	.L1939
+	ldrh	r0, [fp, #0]
+	ldr	r3, [sp, #24]
+	muls	r0, r3, r0
+	rsb	r0, r8, r0
+	ldr	r2, [sp, #52]
+	add	r0, r7, r0, lsl #9
+.L1956:
+	bl	memcpy
+.L1939:
+	ldr	r3, [r4, #0]
+	adds	r2, r3, r6
+	ldr	r3, [r3, r6]
+	adds	r0, r3, #1
+	bne	.L1940
+	ldr	r2, .L1958+36
+	str	r3, [sp, #12]
+	ldr	r1, [r2, #72]
+	adds	r1, r1, #1
+	str	r1, [r2, #72]
+	b	.L1941
+.L1940:
+	cmp	r3, #256
+	bne	.L1941
+	ldr	r0, [r2, #4]
+	movw	r6, #2049
+	ubfx	r0, r0, #10, #16
+	bl	P2V_block_in_plane
+	str	r0, [sp, #56]
+	bl	FtlGcRefreshBlock
+.L1943:
+	subs	r6, r6, #1
+	beq	.L1942
+	movs	r0, #1
+	mov	r1, r0
+	bl	rk_ftl_garbage_collect
+	ldr	r1, .L1958+40
+	ldr	r2, [sp, #56]
+	ldrh	r3, [r1, #0]
+	cmp	r3, r2
+	beq	.L1943
+.L1942:
+	bl	FtlSysFlush
+.L1941:
+	ldr	r3, [sp, #28]
+	adds	r3, r3, #1
+	str	r3, [sp, #28]
+	cmp	r3, r5
+	bne	.L1944
+	ldr	r6, [sp, #60]
+	movs	r5, #0
+.L1953:
+	ldr	r3, [sp, #8]
+	cmp	r3, #0
+	bne	.L1945
+	ldr	r3, .L1958+44
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L1926
+	ldr	r0, [sp, #8]
+	movs	r1, #1
+	bl	rk_ftl_garbage_collect
+	b	.L1926
+.L1946:
+	mov	r3, #-1
+.L1947:
+	str	r3, [sp, #12]
+.L1926:
+	ldr	r0, [sp, #12]
+	add	sp, sp, #72
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1959:
+	.align	2
+.L1958:
+	.word	.LANCHOR84
+	.word	.LANCHOR222
+	.word	.LANCHOR160
+	.word	.LANCHOR173
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR74
+	.word	.LANCHOR181
+	.word	.LANCHOR53
+	.word	.LANCHOR141
+	.word	.LANCHOR201
+	.word	.LANCHOR148
+	.word	.LANCHOR71
+	.size	ftl_read, .-ftl_read
+	.section	.text.FlashReadFacBbtData,"ax",%progbits
+	.align	1
+	.global	FlashReadFacBbtData
+	.thumb
+	.thumb_func
+	.type	FlashReadFacBbtData, %function
+FlashReadFacBbtData:
+	@ args = 0, pretend = 0, frame = 48
+	@ frame_needed = 0, uses_anonymous_args = 0
+	mov	r3, r2
+	ldr	r2, .L1969
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r6, r1
+	ldrh	sl, [r2, #14]
+	sub	sp, sp, #48
+	ldrh	r1, [r2, #12]
+	mov	r4, r0
+	ldr	r2, .L1969+4
+	movw	fp, #61664
+	ldr	r7, .L1969+8
+	mul	sl, sl, r1
+	ldr	r2, [r2, #0]
+	str	r2, [sp, #20]
+	ldr	r2, [r7, #0]
+	uxth	sl, sl
+	add	r5, sl, #-1
+	mul	r8, sl, r6
+	str	r2, [sp, #24]
+	uxth	r5, r5
+	sub	sl, sl, #15
+	b	.L1961
+.L1967:
+	add	r2, r5, r8
+	movs	r1, #1
+	add	r0, sp, #12
+	str	r3, [sp, #4]
+	lsls	r2, r2, #10
+	str	r2, [sp, #16]
+	mov	r2, r1
+	bl	FlashReadPages
+	ldr	r2, [sp, #12]
+	ldr	r3, [sp, #4]
+	adds	r2, r2, #1
+	beq	.L1962
+	ldr	r2, [r7, #0]
+	ldrh	r2, [r2, #0]
+	cmp	r2, fp
+	bne	.L1962
+	cbz	r4, .L1968
+	cbnz	r6, .L1964
+	ldr	r2, .L1969+4
+	movs	r0, #1
+	ldr	r5, .L1969+12
+	ldr	r2, [r2, #0]
+	b	.L1965
+.L1966:
+	ubfx	r1, r6, #5, #16
+	and	r7, r6, #31
+	adds	r6, r6, #1
+	lsl	r7, r0, r7
+	ldr	lr, [r2, r1, lsl #2]
+	uxth	r6, r6
+	orr	r7, lr, r7
+	str	r7, [r2, r1, lsl #2]
+.L1965:
+	ldr	r1, [r5, #0]
+	cmp	r6, r1
+	bcc	.L1966
+.L1964:
+	ldr	r2, .L1969+4
+	mov	r0, r4
+	ldr	r1, [r2, #0]
+	mov	r2, r3
+	bl	memcpy
+	movs	r2, #4
+	ldr	r0, .L1969+16
+	mov	r1, r4
+	mov	r3, r2
+	bl	rknand_print_hex
+	movs	r0, #0
+	b	.L1963
+.L1962:
+	subs	r5, r5, #1
+	uxth	r5, r5
+.L1961:
+	cmp	sl, r5
+	ble	.L1967
+	mov	r0, #-1
+	b	.L1963
+.L1968:
+	mov	r0, r4
+.L1963:
+	add	sp, sp, #48
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L1970:
+	.align	2
+.L1969:
+	.word	.LANCHOR28
+	.word	.LANCHOR44
+	.word	.LANCHOR234
+	.word	.LANCHOR46
+	.word	.LC35
+	.size	FlashReadFacBbtData, .-FlashReadFacBbtData
+	.section	.text.FlashGetBadBlockList,"ax",%progbits
+	.align	1
+	.global	FlashGetBadBlockList
+	.thumb
+	.thumb_func
+	.type	FlashGetBadBlockList, %function
+FlashGetBadBlockList:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r3, r4, r5, r6, r7, lr}
+	mov	r5, r0
+	ldr	r3, .L1978
+	ldr	r6, .L1978+4
+	ldr	r3, [r3, #0]
+	ldr	r0, [r6, #0]
+	ldrb	r2, [r3, #13]	@ zero_extendqisi2
+	ldrh	r4, [r3, #14]
+	muls	r4, r2, r4
+	uxth	r4, r4
+	adds	r2, r4, #7
+	lsrs	r2, r2, #3
+	bl	FlashReadFacBbtData
+	adds	r0, r0, #1
+	beq	.L1977
+	movs	r2, #0
+	lsrs	r0, r4, #4
+	ldr	r6, [r6, #0]
+	mov	r3, r2
+	subs	r4, r4, #1
+	movs	r1, #1
+	b	.L1973
+.L1975:
+	lsrs	r7, r2, #5
+	and	ip, r2, #31
+	lsl	ip, r1, ip
+	ldr	r7, [r6, r7, lsl #2]
+	tst	ip, r7
+	beq	.L1974
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L1974:
+	cmp	r3, r0
+	bcs	.L1977
+	adds	r2, r2, #1
+	uxth	r2, r2
+.L1973:
+	cmp	r2, r4
+	blt	.L1975
+	b	.L1972
+.L1977:
+	movs	r3, #0
+.L1972:
+	movw	r2, #65535
+	movs	r0, #0
+	strh	r2, [r5, r3, lsl #1]	@ movhi
+	pop	{r3, r4, r5, r6, r7, pc}
+.L1979:
+	.align	2
+.L1978:
+	.word	.LANCHOR23
+	.word	.LANCHOR41
+	.size	FlashGetBadBlockList, .-FlashGetBadBlockList
+	.section	.text.FtlMakeBbt,"ax",%progbits
+	.align	1
+	.global	FtlMakeBbt
+	.thumb
+	.thumb_func
+	.type	FtlMakeBbt, %function
+FtlMakeBbt:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r0, r1, r4, r5, r6, r7, r8, sl, fp, lr}
+	bl	FtlBbtMemInit
+	movs	r4, #0
+	ldr	r5, .L1998
+	bl	FtlLoadFactoryBbt
+	ldr	r6, .L1998+4
+	add	r2, r5, #12
+	str	r2, [sp, #4]
+	b	.L1981
+.L1987:
+	ldr	r3, .L1998+8
+	ldr	r2, [sp, #4]
+	ldr	r8, .L1998+20
+	ldr	r0, [r3, #0]
+	ldr	r3, .L1998+12
+	str	r0, [r8, #8]
+	ldr	sl, [r3, #0]
+	ldrh	r3, [r2], #2
+	str	sl, [r8, #12]
+	str	r2, [sp, #4]
+	movw	r2, #65535
+	cmp	r3, r2
+	beq	.L1982
+	ldrh	r7, [r6, #0]
+	movs	r1, #1
+	mov	r2, r1
+	mov	r0, r8
+	mla	r7, r7, r4, r3
+	lsls	r3, r7, #10
+	str	r3, [r8, #4]
+	bl	FlashReadPages
+	ldrh	r2, [r6, #0]
+	ldr	r0, [r5, #28]
+	adds	r2, r2, #7
+	ldr	r1, [r8, #8]
+	lsrs	r2, r2, #3
+	bl	memcpy
+	b	.L1983
+.L1982:
+	mov	r1, r4
+	bl	FlashGetBadBlockList
+	ldr	r1, [r5, #28]
+	ldr	r0, [r8, #8]
+	bl	FtlBbt2Bitmap
+	ldrh	fp, [r6, #0]
+	mov	r3, r5
+	mov	r5, r4
+	add	fp, fp, #-1
+	mov	r4, sl
+	mov	sl, r3
+	uxth	fp, fp
+	b	.L1996
+.L1985:
+	add	fp, fp, #-1
+	uxth	fp, fp
+.L1996:
+	ldrh	r0, [r6, #0]
+	mla	r0, r5, r0, fp
+	uxth	r0, r0
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1985
+	ldr	r3, [sp, #4]
+	movs	r1, #0
+	ldr	r2, .L1998+12
+	strh	fp, [r3, #-2]	@ movhi
+	ldr	r0, [r2, #0]
+	movs	r2, #16
+	bl	memset
+	ldr	r2, [sp, #4]
+	movw	r3, 61664	@ movhi
+	ldrh	r7, [r6, #0]
+	strh	r3, [r4, #0]	@ movhi
+	movs	r3, #0
+	str	r3, [r4, #4]
+	ldrh	r3, [r2, #-2]
+	ldr	r0, [r8, #8]
+	mla	r7, r7, r5, r3
+	strh	r3, [r4, #2]	@ movhi
+	ldr	r1, [sl, #28]
+	lsls	r3, r7, #10
+	str	r3, [r8, #4]
+	ldr	r3, .L1998+16
+	ldrh	r2, [r3, #0]
+	lsls	r2, r2, #2
+	bl	memcpy
+	movs	r1, #1
+	mov	r2, r1
+	ldr	r0, .L1998+20
+	bl	FlashEraseBlocks
+	movs	r1, #1
+	mov	r3, r1
+	ldr	r0, .L1998+20
+	mov	r2, r1
+	bl	FlashProgPages
+	ldr	r3, [r8, #0]
+	adds	r3, r3, #1
+	bne	.L1997
+	uxth	r0, r7
+	bl	FtlBbmMapBadBlock
+	b	.L1996
+.L1997:
+	mov	r4, r5
+	mov	r5, sl
+.L1983:
+	uxth	r0, r7
+	adds	r4, r4, #1
+	bl	FtlBbmMapBadBlock
+	adds	r5, r5, #4
+.L1981:
+	ldr	r2, .L1998+24
+	ldrh	r3, [r2, #0]
+	cmp	r4, r3
+	bcc	.L1987
+	movs	r4, #0
+	ldr	r5, .L1998+28
+	b	.L1988
+.L1989:
+	mov	r0, r4
+	adds	r4, r4, #1
+	bl	FtlBbmMapBadBlock
+	uxth	r4, r4
+.L1988:
+	ldrh	r3, [r5, #0]
+	cmp	r3, r4
+	bhi	.L1989
+	ldr	r5, .L1998
+	movw	r6, #65535
+	ldrh	r4, [r5, #12]
+	subs	r4, r4, #1
+	uxth	r4, r4
+	b	.L1990
+.L1995:
+	mov	r0, r4
+	bl	FtlBbmIsBadBlock
+	cmp	r0, #1
+	beq	.L1991
+	mov	r0, r4
+	bl	FlashTestBlk
+	cbz	r0, .L1992
+	mov	r0, r4
+	bl	FtlBbmMapBadBlock
+	b	.L1991
+.L1992:
+	ldrh	r3, [r5, #0]
+	cmp	r3, r6
+	bne	.L1993
+	strh	r4, [r5, #0]	@ movhi
+	b	.L1991
+.L1993:
+	ldr	r3, .L1998
+	strh	r4, [r3, #4]	@ movhi
+	b	.L1994
+.L1991:
+	subs	r4, r4, #1
+	uxth	r4, r4
+.L1990:
+	ldrh	r3, [r5, #12]
+	subs	r3, r3, #47
+	cmp	r3, r4
+	ble	.L1995
+.L1994:
+	ldr	r4, .L1998
+	movs	r5, #0
+	ldr	r3, .L1998+32
+	movs	r1, #1
+	movs	r2, #2
+	str	r5, [r4, #8]
+	ldr	r0, [r3, #0]
+	ldrh	r3, [r4, #0]
+	strh	r5, [r4, #2]	@ movhi
+	lsls	r3, r3, #10
+	str	r3, [r0, #4]
+	ldrh	r3, [r4, #4]
+	lsls	r3, r3, #10
+	str	r3, [r0, #40]
+	bl	FlashEraseBlocks
+	ldrh	r0, [r4, #0]
+	bl	FtlBbmMapBadBlock
+	ldrh	r0, [r4, #4]
+	bl	FtlBbmMapBadBlock
+	bl	FtlBbmTblFlush
+	ldr	r3, [r4, #8]
+	ldrh	r2, [r4, #4]
+	adds	r3, r3, #1
+	str	r3, [r4, #8]
+	ldrh	r3, [r4, #0]
+	strh	r5, [r4, #2]	@ movhi
+	strh	r2, [r4, #0]	@ movhi
+	strh	r3, [r4, #4]	@ movhi
+	bl	FtlBbmTblFlush
+	mov	r0, r5
+	pop	{r2, r3, r4, r5, r6, r7, r8, sl, fp, pc}
+.L1999:
+	.align	2
+.L1998:
+	.word	.LANCHOR89
+	.word	.LANCHOR66
+	.word	.LANCHOR96
+	.word	.LANCHOR180
+	.word	.LANCHOR90
+	.word	.LANCHOR197
+	.word	.LANCHOR60
+	.word	.LANCHOR75
+	.word	.LANCHOR93
+	.size	FtlMakeBbt, .-FtlMakeBbt
+	.section	.text.FtlLowFormat,"ax",%progbits
+	.align	1
+	.global	FtlLowFormat
+	.thumb
+	.thumb_func
+	.type	FtlLowFormat, %function
+FtlLowFormat:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r2, .L2021
+	movs	r3, #0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	str	r3, [r2, #0]
+	ldr	r2, .L2021+4
+	str	r3, [r2, #0]
+	ldr	r3, .L2021+8
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	bl	FtlLoadBbt
+	cbz	r0, .L2001
+	bl	FtlMakeBbt
+.L2001:
+	ldr	r3, .L2021+12
+	ldr	r2, .L2021+16
+	ldrh	r4, [r3, #0]
+	ldr	r3, .L2021+20
+	lsls	r4, r4, #7
+	ldr	r0, [r3, #0]
+	ldr	r3, .L2021+24
+	ldr	r1, [r3, #0]
+	movs	r3, #0
+	b	.L2002
+.L2003:
+	mvns	r5, r3
+	orr	r5, r3, r5, lsl #16
+	str	r5, [r0, r3, lsl #2]
+	str	r2, [r1, r3, lsl #2]
+	adds	r3, r3, #1
+	uxth	r3, r3
+.L2002:
+	cmp	r3, r4
+	blt	.L2003
+	ldr	r3, .L2021+28
+	movs	r4, #0
+	ldr	r6, .L2021+32
+	ldrh	r5, [r3, #0]
+	b	.L2004
+.L2005:
+	mov	r0, r5
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r5, r5, #1
+	uxth	r5, r5
+	adds	r4, r4, r0
+	uxth	r4, r4
+.L2004:
+	ldrh	r3, [r6, #0]
+	cmp	r3, r5
+	bhi	.L2005
+	ldr	r3, .L2021+36
+	ldrh	r1, [r3, #0]
+	subs	r3, r4, #2
+	cmp	r3, r1, lsl #1
+	bgt	.L2006
+.L2010:
+	movs	r4, #0
+	ldr	r6, .L2021+28
+	mov	r5, r4
+	b	.L2007
+.L2006:
+	mov	r0, r4
+	ldr	r5, .L2021+32
+	bl	__aeabi_uidiv
+	ldr	r3, .L2021+40
+	ldr	r3, [r3, #0]
+	adds	r0, r0, r3
+	uxth	r0, r0
+	bl	FtlSysBlkNumInit
+	ldr	r3, .L2021+8
+	ldrh	r0, [r3, #0]
+	bl	FtlFreeSysBlkQueueInit
+	ldr	r3, .L2021+28
+	ldrh	r4, [r3, #0]
+	b	.L2008
+.L2009:
+	mov	r0, r4
+	movs	r1, #1
+	bl	FtlLowFormatEraseBlock
+	adds	r4, r4, #1
+	uxth	r4, r4
+.L2008:
+	ldrh	r3, [r5, #0]
+	cmp	r3, r4
+	bhi	.L2009
+	b	.L2010
+.L2011:
+	mov	r0, r5
+	movs	r1, #0
+	bl	FtlLowFormatEraseBlock
+	adds	r5, r5, #1
+	uxth	r5, r5
+	adds	r4, r4, r0
+	uxth	r4, r4
+.L2007:
+	ldrh	r3, [r6, #0]
+	cmp	r3, r5
+	bhi	.L2011
+	ldr	r3, .L2021+32
+	ldr	r8, .L2021+64
+	ldr	sl, .L2021+68
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L2021+44
+	str	r2, [r3, #0]
+	ldr	r3, .L2021+48
+	ldr	fp, [r3, #0]
+	ldr	r3, .L2021+36
+	mov	r0, fp
+	ldrh	r5, [r3, #0]
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ubfx	r7, r0, #5, #16
+	mov	r6, r0
+	add	r3, r7, #36
+	strh	r3, [r8, #0]	@ movhi
+	movs	r3, #24
+	muls	r3, r5, r3
+	cmp	r4, r3
+	str	r0, [sl, #0]
+	ble	.L2012
+	rsb	r0, r4, fp
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	str	r0, [sl, #0]
+	lsrs	r0, r0, #5
+	adds	r0, r0, #24
+	strh	r0, [r8, #0]	@ movhi
+.L2012:
+	ldr	r3, .L2021+52
+	ldr	r3, [r3, #0]
+	cmp	r3, #1
+	bne	.L2013
+	mov	r0, r4
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r8, .L2021+64
+	ldrh	sl, [r8, #0]
+	uxtah	r0, sl, r0
+	add	sl, sl, r0, lsr #2
+	strh	sl, [r8, #0]	@ movhi
+.L2013:
+	ldr	r3, .L2021+56
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L2014
+	mov	r0, r4
+	mov	r1, r5
+	bl	__aeabi_uidiv
+	ldr	r8, .L2021+64
+	ldrh	sl, [r8, #0]
+	uxtah	r0, sl, r0
+	add	sl, sl, r0, lsr #2
+	strh	sl, [r8, #0]	@ movhi
+.L2014:
+	ldr	r3, .L2021+60
+	ldrh	r3, [r3, #0]
+	cbz	r3, .L2015
+	ldr	r2, .L2021+64
+	ldrh	r1, [r2, #0]
+	add	r1, r1, r3, lsr #1
+	strh	r1, [r2, #0]	@ movhi
+	mul	r1, r5, r3
+	cmp	r1, r4
+	ble	.L2015
+	ldr	r1, .L2021+68
+	adds	r3, r3, #32
+	adds	r7, r7, r3
+	strh	r7, [r2, #0]	@ movhi
+	str	r6, [r1, #0]
+.L2015:
+	ldr	r3, .L2021+68
+	ldr	r2, .L2021+64
+	ldr	r6, .L2021+72
+	ldr	r1, [r3, #0]
+	ldrh	r2, [r2, #0]
+	ldr	r4, .L2021+76
+	subs	r2, r1, r2
+	muls	r5, r2, r5
+	ldr	r2, .L2021+80
+	str	r5, [r2, #0]
+	ldr	r2, .L2021+84
+	ldrh	r2, [r2, #0]
+	muls	r5, r2, r5
+	str	r5, [r3, #0]
+	ldr	r3, .L2021+12
+	ldrh	r3, [r3, #0]
+	muls	r5, r3, r5
+	ldr	r3, .L2021+88
+	str	r5, [r3, #0]
+	movw	r5, #65535
+	bl	FtlBbmTblFlush
+	ldr	r3, .L2021+32
+	movs	r1, #0
+	ldr	r0, [r6, #0]
+	ldrh	r2, [r3, #0]
+	lsls	r2, r2, #1
+	bl	memset
+	ldr	r2, .L2021+92
+	movs	r3, #0
+	strh	r3, [r4, #2]	@ movhi
+	strb	r3, [r4, #6]
+	movs	r1, #255
+	str	r3, [r2, #0]
+	ldr	r2, .L2021+96
+	strh	r3, [r4, #0]	@ movhi
+	strh	r3, [r2, #2]	@ movhi
+	strb	r3, [r2, #6]
+	strb	r3, [r2, #8]
+	movs	r3, #1
+	strb	r3, [r4, #8]
+	ldr	r3, .L2021+28
+	strh	r5, [r2, #0]	@ movhi
+	ldrh	r2, [r3, #0]
+	ldr	r3, .L2021+100
+	lsrs	r2, r2, #3
+	ldr	r0, [r3, #0]
+	bl	memset
+.L2016:
+	ldr	r7, .L2021+76
+	mov	r0, r7
+	bl	make_superblock
+	ldrb	r2, [r4, #7]	@ zero_extendqisi2
+	ldr	r3, .L2021+72
+	cbnz	r2, .L2017
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r6, #0]
+	strh	r5, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+	b	.L2016
+.L2017:
+	ldr	r2, .L2021
+	movw	r6, #65535
+	ldr	r4, .L2021+104
+	ldrh	r0, [r7, #4]
+	ldr	r1, [r2, #0]
+	str	r1, [r7, #12]
+	adds	r1, r1, #1
+	str	r1, [r2, #0]
+	ldrh	r1, [r7, #0]
+	ldr	r2, [r3, #0]
+	strh	r0, [r2, r1, lsl #1]	@ movhi
+	movs	r2, #0
+	strh	r2, [r4, #2]	@ movhi
+	strb	r2, [r4, #6]
+	ldrh	r2, [r7, #0]
+	mov	r7, r3
+	adds	r2, r2, #1
+	strh	r2, [r4, #0]	@ movhi
+	movs	r2, #1
+	strb	r2, [r4, #8]
+.L2018:
+	ldr	r5, .L2021+104
+	mov	r0, r5
+	bl	make_superblock
+	ldrb	r3, [r4, #7]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2019
+	ldrh	r2, [r4, #0]
+	ldr	r3, [r7, #0]
+	strh	r6, [r3, r2, lsl #1]	@ movhi
+	ldrh	r3, [r4, #0]
+	adds	r3, r3, #1
+	strh	r3, [r4, #0]	@ movhi
+	b	.L2018
+.L2022:
+	.align	2
+.L2021:
+	.word	.LANCHOR153
+	.word	.LANCHOR154
+	.word	.LANCHOR54
+	.word	.LANCHOR71
+	.word	168778952
+	.word	.LANCHOR178
+	.word	.LANCHOR179
+	.word	.LANCHOR55
+	.word	.LANCHOR56
+	.word	.LANCHOR53
+	.word	.LANCHOR81
+	.word	.LANCHOR88
+	.word	.LANCHOR57
+	.word	.LANCHOR126
+	.word	.LANCHOR7
+	.word	.LANCHOR64
+	.word	.LANCHOR200
+	.word	.LANCHOR87
+	.word	.LANCHOR99
+	.word	.LANCHOR107
+	.word	.LANCHOR199
+	.word	.LANCHOR68
+	.word	.LANCHOR84
+	.word	.LANCHOR116
+	.word	.LANCHOR201
+	.word	.LANCHOR117
+	.word	.LANCHOR108
+.L2019:
+	ldr	r4, .L2023
+	ldrh	r1, [r5, #4]
+	ldrh	r2, [r5, #0]
+	ldr	r3, [r4, #0]
+	str	r3, [r5, #12]
+	adds	r3, r3, #1
+	str	r3, [r4, #0]
+	movw	r5, #65535
+	ldr	r3, .L2023+4
+	ldr	r3, [r3, #0]
+	strh	r1, [r3, r2, lsl #1]	@ movhi
+	ldr	r3, .L2023+8
+	strh	r5, [r3, #0]	@ movhi
+	bl	FtlFreeSysBlkQueueOut
+	ldr	r3, .L2023+12
+	movs	r2, #0
+	strh	r2, [r3, #2]	@ movhi
+	ldr	r2, .L2023+16
+	strh	r5, [r3, #4]	@ movhi
+	ldr	r2, [r2, #0]
+	strh	r2, [r3, #6]	@ movhi
+	ldr	r2, [r4, #0]
+	str	r2, [r3, #8]
+	adds	r2, r2, #1
+	str	r2, [r4, #0]
+	strh	r0, [r3, #0]	@ movhi
+	bl	FtlVpcTblFlush
+	bl	FtlSysBlkInit
+	cbnz	r0, .L2020
+	ldr	r3, .L2023+20
+	movs	r2, #1
+	str	r2, [r3, #0]
+.L2020:
+	movs	r0, #0
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L2024:
+	.align	2
+.L2023:
+	.word	.LANCHOR153
+	.word	.LANCHOR99
+	.word	.LANCHOR109
+	.word	.LANCHOR191
+	.word	.LANCHOR199
+	.word	.LANCHOR222
+	.size	FtlLowFormat, .-FtlLowFormat
+	.section	.text.HynixGetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	HynixGetReadRetryDefault
+	.thumb
+	.thumb_func
+	.type	HynixGetReadRetryDefault, %function
+HynixGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 64
+	@ frame_needed = 0, uses_anonymous_args = 0
+	ldr	r3, .L2114
+	movs	r2, #172
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	movs	r1, #174
+	strb	r0, [r3, #0]
+	strb	r2, [r3, #4]
+	movs	r0, #173
+	movs	r2, #175
+	cmp	r4, #2
+	sub	sp, sp, #64
+	strb	r0, [r3, #5]
+	strb	r1, [r3, #6]
+	strb	r2, [r3, #7]
+	bne	.L2026
+	movs	r2, #167
+	strb	r2, [r3, #4]
+	ldr	r3, .L2114+4
+	movs	r2, #247
+	strb	r2, [r3, #17]
+	b	.L2081
+.L2026:
+	cmp	r4, #3
+	bne	.L2028
+	movs	r2, #176
+	strb	r2, [r3, #4]
+	movs	r2, #177
+	strb	r2, [r3, #5]
+	movs	r2, #178
+	strb	r2, [r3, #6]
+	movs	r2, #179
+	strb	r2, [r3, #7]
+	movs	r2, #180
+	strb	r2, [r3, #8]
+	movs	r2, #181
+	strb	r2, [r3, #9]
+	movs	r2, #182
+	strb	r2, [r3, #10]
+	movs	r2, #183
+	b	.L2108
+.L2028:
+	cmp	r4, #4
+	bne	.L2029
+	movs	r5, #204
+	strb	r0, [r3, #9]
+	strb	r5, [r3, #4]
+	movs	r5, #191
+	strb	r1, [r3, #10]
+	strb	r5, [r3, #5]
+	movs	r5, #170
+	strb	r5, [r3, #6]
+	movs	r5, #171
+	strb	r5, [r3, #7]
+	movs	r5, #205
+	strb	r5, [r3, #8]
+.L2108:
+	movs	r6, #8
+	strb	r2, [r3, #11]
+	mov	r5, r6
+	b	.L2027
+.L2029:
+	cmp	r4, #5
+	bne	.L2030
+	movs	r2, #56
+	movs	r6, #8
+	strb	r2, [r3, #4]
+	movs	r2, #57
+	strb	r2, [r3, #5]
+	movs	r2, #58
+	strb	r2, [r3, #6]
+	movs	r2, #59
+	strb	r2, [r3, #7]
+	b	.L2107
+.L2030:
+	cmp	r4, #6
+	bne	.L2031
+	movs	r2, #14
+	movs	r6, #12
+	strb	r2, [r3, #4]
+	movs	r2, #15
+	strb	r2, [r3, #5]
+	movs	r2, #16
+	strb	r2, [r3, #6]
+	movs	r2, #17
+	strb	r2, [r3, #7]
+	b	.L2107
+.L2031:
+	cmp	r4, #7
+	bne	.L2081
+	movs	r2, #176
+	movs	r6, #12
+	strb	r2, [r3, #4]
+	movs	r5, #10
+	movs	r2, #177
+	strb	r2, [r3, #5]
+	movs	r2, #178
+	strb	r2, [r3, #6]
+	movs	r2, #179
+	strb	r2, [r3, #7]
+	movs	r2, #180
+	strb	r2, [r3, #8]
+	movs	r2, #181
+	strb	r2, [r3, #9]
+	movs	r2, #182
+	strb	r2, [r3, #10]
+	movs	r2, #183
+	strb	r2, [r3, #11]
+	movs	r2, #212
+	strb	r2, [r3, #12]
+	movs	r2, #213
+	strb	r2, [r3, #13]
+	b	.L2027
+.L2081:
+	movs	r6, #7
+.L2107:
+	movs	r5, #4
+.L2027:
+	subs	r3, r4, #1
+	cmp	r3, #1
+	bhi	.L2103
+	b	.L2112
+.L2038:
+	ldr	r3, .L2114+8
+	mov	sl, #0
+	ldr	r1, .L2114+12
+	ldr	r4, .L2114+16
+	ldrb	r2, [r3, r7]	@ zero_extendqisi2
+	ldr	r0, [r1, r2, lsl #3]
+	add	r4, r4, r2, lsl #6
+	add	r2, r1, r2, lsl #3
+	ldrb	r3, [r2, #4]	@ zero_extendqisi2
+	movs	r2, #55
+	adds	r3, r3, #8
+	add	r3, r0, r3, lsl #8
+.L2034:
+	add	r1, r8, sl
+	str	r2, [r3, #8]
+	movs	r0, #80
+	ldrb	r1, [r1, #4]	@ zero_extendqisi2
+	str	r1, [r3, #4]
+	str	r2, [sp, #8]
+	str	r3, [sp, #12]
+	bl	udelay
+	ldr	r3, [sp, #12]
+	ldr	r1, [r3, #0]
+	strb	r1, [r4, sl]
+	add	sl, sl, #1
+	ldr	r2, [sp, #8]
+	uxtb	r1, sl
+	cmp	r1, r5
+	bcc	.L2034
+	movs	r3, #0
+	b	.L2035
+.L2036:
+	ldrb	ip, [sl, r2, lsl #2]	@ zero_extendqisi2
+	ldrb	r0, [r4, r3]	@ zero_extendqisi2
+	add	r0, ip, r0
+	strb	r0, [r1, r2, lsl #3]
+	adds	r2, r2, #1
+	cmp	r2, #7
+	bne	.L2036
+	adds	r3, r3, #1
+	cmp	r3, #4
+	beq	.L2037
+.L2035:
+	movs	r2, #1
+	adds	r1, r4, r3
+	add	sl, fp, r3
+	b	.L2036
+.L2037:
+	adds	r7, r7, #1
+	movs	r3, #0
+	strb	r3, [r4, #16]
+	strb	r3, [r4, #24]
+	uxtb	r7, r7
+	strb	r3, [r4, #32]
+	strb	r3, [r4, #40]
+	strb	r3, [r4, #48]
+	strb	r3, [r4, #41]
+	strb	r3, [r4, #49]
+	b	.L2032
+.L2112:
+	ldr	r8, .L2114
+	movs	r7, #0
+	ldr	fp, .L2114+4
+.L2032:
+	ldr	r3, .L2114+20
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, r7
+	bhi	.L2038
+	b	.L2039
+.L2103:
+	subs	r3, r4, #3
+	cmp	r3, #4
+	bhi	.L2039
+	smulbb	r3, r5, r6
+	str	r6, [sp, #48]
+	asrs	r2, r3, #2
+	lsls	r3, r3, #4
+	str	r3, [sp, #52]
+	movs	r3, #0
+	str	r3, [sp, #20]
+	subs	r3, r5, #1
+	str	r2, [sp, #24]
+	uxtb	r3, r3
+	str	r3, [sp, #56]
+	b	.L2040
+.L2080:
+	ldr	r3, .L2114+8
+	ldr	fp, [sp, #20]
+	ldrb	r6, [r3, fp]	@ zero_extendqisi2
+	ldr	r3, .L2114+12
+	mov	r0, r6
+	ldr	sl, [r3, r6, lsl #3]
+	add	r3, r3, r6, lsl #3
+	ldrb	r8, [r3, #4]	@ zero_extendqisi2
+	movs	r3, #255
+	add	r8, r8, #8
+	lsl	r8, r8, #8
+	add	r7, sl, r8
+	str	r3, [r7, #8]
+	bl	NandcWaitFlashReady
+	cmp	r4, #7
+	sxth	r3, r6
+	beq	.L2041
+	ldr	r1, .L2114+16
+	add	r3, r1, r3, lsl #6
+	b	.L2109
+.L2041:
+	lsls	r1, r3, #7
+	add	r3, r1, r3, lsl #5
+	ldr	r1, .L2114+24
+	adds	r3, r1, r3
+.L2109:
+	str	r3, [sp, #32]
+	movs	r3, #54
+	cmp	r4, #4
+	str	r3, [r7, #8]
+	bne	.L2043
+	movs	r3, #255
+	str	r3, [r7, #4]
+	movs	r3, #64
+	str	r3, [sl, r8]
+	movs	r3, #204
+	b	.L2110
+.L2043:
+	subs	r3, r4, #5
+	cmp	r3, #1
+	bhi	.L2045
+	ldr	r3, .L2114
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r7, #4]
+	movs	r3, #82
+	b	.L2111
+.L2045:
+	movs	r3, #174
+	str	r3, [r7, #4]
+	movs	r3, #0
+	str	r3, [sl, r8]
+	movs	r3, #176
+.L2110:
+	str	r3, [r7, #4]
+	movs	r3, #77
+.L2111:
+	str	r3, [sl, r8]
+	movs	r3, #22
+	str	r3, [r7, #8]
+	movs	r3, #23
+	str	r3, [r7, #8]
+	movs	r3, #4
+	str	r3, [r7, #8]
+	movs	r3, #25
+	str	r3, [r7, #8]
+	movs	r3, #0
+	cmp	r4, #6
+	str	r3, [r7, #8]
+	mov	r0, r6
+	str	r3, [r7, #4]
+	str	r3, [r7, #4]
+	it	eq
+	moveq	r3, #31
+	str	r3, [r7, #4]
+	movs	r3, #2
+	str	r3, [r7, #4]
+	movs	r3, #0
+	str	r3, [r7, #4]
+	movs	r3, #48
+	str	r3, [r7, #8]
+	bl	NandcWaitFlashReady
+	sub	ip, r4, #5
+	mov	r1, ip
+	str	ip, [sp, #36]
+	cmp	r1, #1
+	bls	.L2083
+	cmp	r4, #7
+	ite	eq
+	moveq	r1, #32
+	movne	r1, #2
+	b	.L2049
+.L2083:
+	movs	r1, #16
+.L2049:
+	ldr	r3, .L2114+28
+	ldr	r2, [r3, #0]
+	movs	r3, #0
+.L2050:
+	ldr	r0, [r7, #0]
+	strb	r0, [r2, r3]
+	adds	r3, r3, #1
+	uxtb	r0, r3
+	cmp	r0, r1
+	bcc	.L2050
+	cmp	r4, #7
+	bne	.L2051
+	movs	r3, #0
+.L2053:
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	cmp	r1, #12
+	beq	.L2052
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	cmp	r1, #10
+	beq	.L2052
+	adds	r3, r3, #1
+	adds	r2, r2, #4
+	uxtb	r3, r3
+	cmp	r3, #8
+	bne	.L2053
+	b	.L2054
+.L2052:
+	cmp	r3, #6
+	bls	.L2055
+.L2054:
+	ldr	r0, .L2114+32
+	movs	r1, #0
+	bl	printf
+.L2056:
+	b	.L2056
+.L2051:
+	cmp	r4, #6
+	bne	.L2055
+	movs	r3, #0
+.L2057:
+	ldrb	r1, [r2], #1	@ zero_extendqisi2
+	cmp	r1, #12
+	beq	.L2055
+	ldrb	r1, [r2, #7]	@ zero_extendqisi2
+	cmp	r1, #4
+	beq	.L2055
+	adds	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #8
+	bne	.L2057
+	b	.L2113
+.L2059:
+	b	.L2059
+.L2115:
+	.align	2
+.L2114:
+	.word	.LANCHOR31
+	.word	.LANCHOR235
+	.word	.LANCHOR19
+	.word	.LANCHOR5
+	.word	.LANCHOR31+20
+	.word	.LANCHOR16
+	.word	.LANCHOR31+28
+	.word	.LANCHOR44
+	.word	.LC36
+.L2055:
+	ldr	r0, .L2116
+	movs	r3, #0
+	ldr	r0, [r0, #0]
+	str	r0, [sp, #40]
+.L2060:
+	ldr	r2, [r7, #0]
+	ldr	r1, [sp, #40]
+	strb	r2, [r1, r3]
+	adds	r3, r3, #1
+	ldr	r2, [sp, #52]
+	cmp	r3, r2
+	blt	.L2060
+	ldr	r3, .L2116
+	movs	r2, #8
+	ldr	ip, [sp, #24]
+	ldr	r1, [r3, #0]
+	lsl	r0, ip, #2
+	lsl	fp, ip, #3
+	str	r0, [sp, #44]
+	adds	r0, r1, r0
+.L2062:
+	movs	r3, #0
+	mov	lr, r3
+.L2061:
+	ldr	ip, [r0, r3]
+	add	lr, lr, #1
+	mvn	ip, ip
+	str	ip, [r0, r3]
+	ldr	ip, [sp, #24]
+	adds	r3, r3, #4
+	cmp	lr, ip
+	blt	.L2061
+	subs	r2, r2, #1
+	add	r0, r0, fp
+	bne	.L2062
+	mov	lr, r1
+	str	r2, [sp, #16]
+	str	r5, [sp, #60]
+	b	.L2063
+.L2067:
+	movs	r0, #1
+	mov	fp, #16
+	str	r3, [sp, #4]
+	lsl	r5, r0, r3
+	movs	r0, #0
+	mov	ip, r0
+	str	fp, [sp, #28]
+.L2065:
+	ldr	fp, [lr, r0]
+	ldr	r3, [sp, #44]
+	and	fp, r5, fp
+	adds	r0, r0, r3
+	ldr	r3, [sp, #28]
+	cmp	fp, r5
+	it	eq
+	addeq	ip, ip, #1
+	subs	r3, r3, #1
+	str	r3, [sp, #28]
+	bne	.L2065
+	ldr	r3, [sp, #4]
+	cmp	ip, #8
+	it	hi
+	orrhi	r2, r2, r5
+	adds	r3, r3, #1
+	cmp	r3, #32
+	bne	.L2067
+	ldr	fp, [sp, #16]
+	ldr	ip, [sp, #24]
+	add	fp, fp, #1
+	str	r2, [lr], #4
+	cmp	fp, ip
+	str	fp, [sp, #16]
+	bge	.L2085
+.L2063:
+	movs	r2, #0
+	mov	r3, r2
+	b	.L2067
+.L2085:
+	movs	r3, #0
+	ldr	r5, [sp, #60]
+	mov	r2, r3
+.L2068:
+	ldr	r0, [r1, r3]
+	cbnz	r0, .L2069
+	adds	r2, r2, #1
+.L2069:
+	adds	r3, r3, #4
+	cmp	r3, #32
+	bne	.L2068
+	cmp	r2, #7
+	ble	.L2070
+	ldr	r0, .L2116+4
+	movs	r2, #1
+	mov	r3, #1024
+	bl	rknand_print_hex
+	ldr	r0, .L2116+8
+	movs	r1, #0
+	bl	printf
+.L2071:
+	b	.L2071
+.L2070:
+	cmp	r4, #6
+	beq	.L2086
+	cmp	r4, #7
+	ite	eq
+	moveq	r0, #10
+	movne	r0, #8
+	str	r0, [sp, #16]
+	b	.L2072
+.L2086:
+	movs	r1, #4
+	str	r1, [sp, #16]
+.L2072:
+	cbz	r5, .L2073
+	ldr	r2, [sp, #56]
+	add	lr, r2, #1
+	b	.L2074
+.L2073:
+	mov	lr, #1
+.L2074:
+	ldr	r0, [sp, #40]
+	movs	r2, #0
+	ldr	r1, [sp, #32]
+	mov	fp, r4
+	b	.L2075
+.L2076:
+	ldrb	ip, [r4], #1	@ zero_extendqisi2
+	strb	ip, [r1, r3]
+	adds	r3, r3, #1
+	uxtb	ip, r3
+	cmp	ip, r5
+	bcc	.L2076
+	ldr	ip, [sp, #48]
+	adds	r2, r2, #1
+	ldr	r3, [sp, #16]
+	add	r0, r0, lr
+	cmp	r2, ip
+	add	r1, r1, r3
+	bge	.L2077
+.L2075:
+	mov	r4, r0
+	movs	r3, #0
+	b	.L2076
+.L2077:
+	movs	r3, #255
+	mov	r0, r6
+	str	r3, [r7, #8]
+	mov	r4, fp
+	bl	NandcWaitFlashReady
+	ldr	r1, [sp, #36]
+	cmp	r1, #1
+	bhi	.L2078
+	movs	r3, #54
+	str	r3, [r7, #8]
+	ldr	r3, .L2116+12
+	mov	r1, #-1
+	ldr	r0, [sp, #20]
+	ldrb	r3, [r3, #4]	@ zero_extendqisi2
+	str	r3, [r7, #4]
+	movs	r3, #0
+	str	r3, [sl, r8]
+	movs	r3, #22
+	str	r3, [r7, #8]
+	bl	FlashReadCmd
+	b	.L2079
+.L2078:
+	movs	r3, #56
+	str	r3, [r7, #8]
+.L2079:
+	mov	r0, r6
+	bl	NandcWaitFlashReady
+	ldr	r2, [sp, #20]
+	adds	r3, r2, #1
+	uxtb	r3, r3
+	str	r3, [sp, #20]
+.L2040:
+	ldr	r0, .L2116+16
+	ldr	r2, [sp, #20]
+	ldrb	r3, [r0, #0]	@ zero_extendqisi2
+	cmp	r3, r2
+	bhi	.L2080
+	ldr	r6, [sp, #48]
+.L2039:
+	ldr	r3, .L2116+12
+	strb	r5, [r3, #1]
+	strb	r6, [r3, #2]
+	add	sp, sp, #64
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L2113:
+	movs	r1, #0
+	ldr	r0, .L2116+8
+	bl	printf
+	b	.L2059
+.L2117:
+	.align	2
+.L2116:
+	.word	.LANCHOR44
+	.word	.LC37
+	.word	.LC36
+	.word	.LANCHOR31
+	.word	.LANCHOR16
+	.size	HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
+	.section	.text.FlashGetReadRetryDefault,"ax",%progbits
+	.align	1
+	.global	FlashGetReadRetryDefault
+	.thumb
+	.thumb_func
+	.type	FlashGetReadRetryDefault, %function
+FlashGetReadRetryDefault:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	@ link register save eliminated.
+	mov	r3, r0
+	cmp	r0, #0
+	beq	.L2118
+	subs	r2, r0, #1
+	cmp	r2, #6
+	bhi	.L2120
+	b	HynixGetReadRetryDefault
+.L2120:
+	cmp	r0, #49
+	bne	.L2121
+	ldr	r0, .L2129
+	movs	r2, #64
+	ldr	r1, .L2129+4
+	strb	r3, [r0, #0]
+	movs	r3, #4
+	strb	r3, [r0, #1]
+	movs	r3, #15
+	strb	r3, [r0, #2]
+	adds	r0, r0, #4
+	b	.L2127
+.L2121:
+	cmp	r0, #33
+	beq	.L2122
+	cmp	r0, #65
+	beq	.L2122
+	cmp	r0, #66
+	bne	.L2123
+.L2122:
+	ldr	r0, .L2129
+	strb	r3, [r0, #0]
+	movs	r3, #4
+	b	.L2128
+.L2123:
+	cmp	r0, #34
+	beq	.L2124
+	cmp	r0, #67
+	bne	.L2125
+.L2124:
+	ldr	r0, .L2129
+	strb	r3, [r0, #0]
+	movs	r3, #5
+.L2128:
+	strb	r3, [r0, #1]
+	movs	r2, #45
+	movs	r3, #7
+	ldr	r1, .L2129+8
+	strb	r3, [r0, #2]
+	adds	r0, r0, #4
+	b	.L2127
+.L2125:
+	cmp	r0, #35
+	beq	.L2126
+	cmp	r0, #68
+	bne	.L2118
+.L2126:
+	ldr	r0, .L2129
+	movs	r2, #95
+	ldr	r1, .L2129+12
+	strb	r3, [r0, #0]
+	movs	r3, #5
+	strb	r3, [r0, #1]
+	movs	r3, #17
+	strb	r3, [r0, #2]
+	adds	r0, r0, #4
+.L2127:
+	b	memcpy
+.L2118:
+	bx	lr
+.L2130:
+	.align	2
+.L2129:
+	.word	.LANCHOR31
+	.word	.LANCHOR15
+	.word	.LANCHOR10
+	.word	.LANCHOR12
+	.size	FlashGetReadRetryDefault, .-FlashGetReadRetryDefault
+	.section	.text.FlashInit,"ax",%progbits
+	.align	1
+	.global	FlashInit
+	.thumb
+	.thumb_func
+	.type	FlashInit, %function
+FlashInit:
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, r5, r6, r7, r8, sl, fp, lr}
+	mov	r4, r0
+	sub	sp, sp, #24
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L2180
+	movs	r5, #0
+	ldr	r8, .L2180+84
+	mov	r6, r5
+	str	r0, [r3, #0]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L2180+4
+	str	r0, [r3, #0]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L2180+8
+	str	r0, [r3, #0]
+	mov	r0, #32768
+	bl	ftl_malloc
+	ldr	r3, .L2180+12
+	str	r0, [r3, #0]
+	mov	r0, #4096
+	bl	ftl_malloc
+	ldr	r3, .L2180+16
+	ldr	r2, .L2180+20
+	str	r0, [r3, #0]
+	movs	r3, #50
+	strb	r3, [r2, #0]
+	mov	r0, r4
+	ldr	r2, .L2180+24
+	ldr	r4, .L2180+28
+	strb	r3, [r2, #0]
+	movs	r2, #128
+	ldr	r3, .L2180+32
+	mov	r7, r4
+	str	r5, [r3, #0]
+	ldr	r3, .L2180+36
+	str	r2, [r3, #0]
+	movs	r2, #60
+	ldr	r3, .L2180+40
+	strb	r5, [r3, #0]
+	ldr	r3, .L2180+44
+	str	r5, [r3, #0]
+	ldr	r3, .L2180+48
+	strb	r5, [r3, #0]
+	ldr	r3, .L2180+52
+	strb	r2, [r3, #0]
+	bl	NandcInit
+.L2136:
+	uxtb	r3, r6
+	str	r3, [sp, #16]
+	mov	r0, r3
+	bl	FlashReset
+	add	r2, r8, r5
+	ldr	r3, [sp, #16]
+	ldrb	sl, [r2, #4]	@ zero_extendqisi2
+	ldr	fp, [r5, r8]
+	mov	r0, r3
+	add	sl, sl, #8
+	lsl	sl, sl, #8
+	add	r2, fp, sl
+	str	r2, [sp, #20]
+	bl	NandcFlashCs
+	ldr	r2, [sp, #20]
+	movs	r1, #144
+	movs	r0, #200
+	str	r1, [r2, #8]
+	movs	r1, #0
+	str	r1, [r2, #4]
+	bl	udelay
+	ldr	r2, [fp, sl]
+	strb	r2, [r5, r7]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #1]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #2]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #3]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #4]
+	ldr	r2, [fp, sl]
+	strb	r2, [r4, #5]
+	ldr	r3, [sp, #16]
+	mov	r0, r3
+	bl	NandcFlashDeCs
+	ldrb	r2, [r5, r7]	@ zero_extendqisi2
+	subs	r3, r2, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L2132
+	ldrb	r1, [r4, #2]	@ zero_extendqisi2
+	ldrb	r3, [r4, #1]	@ zero_extendqisi2
+	ldr	r0, .L2180+56
+	str	r1, [sp, #0]
+	ldrb	r1, [r4, #3]	@ zero_extendqisi2
+	str	r1, [sp, #4]
+	ldrb	r1, [r4, #4]	@ zero_extendqisi2
+	str	r1, [sp, #8]
+	ldrb	r1, [r4, #5]	@ zero_extendqisi2
+	str	r1, [sp, #12]
+	adds	r1, r6, #1
+	bl	printf
+.L2132:
+	cbnz	r6, .L2133
+	ldrb	r3, [r7, #0]	@ zero_extendqisi2
+	subs	r3, r3, #1
+	uxtb	r3, r3
+	cmp	r3, #253
+	bhi	.L2172
+	ldrb	r3, [r7, #1]	@ zero_extendqisi2
+	cmp	r3, #255
+	beq	.L2172
+.L2133:
+	ldrb	r3, [r5, r7]	@ zero_extendqisi2
+	cmp	r3, #181
+	bne	.L2135
+	movs	r3, #44
+	strb	r3, [r5, r7]
+.L2135:
+	adds	r6, r6, #1
+	adds	r5, r5, #8
+	adds	r4, r4, #8
+	cmp	r6, #4
+	bne	.L2136
+	ldr	r3, .L2180+28
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #173
+	beq	.L2137
+	ldr	r3, .L2180+60
+	ldr	r0, [r3, #0]
+	bl	NandcSetDdrMode
+.L2137:
+	movs	r1, #0
+	mov	r2, #852
+	ldr	r0, .L2180+64
+	bl	memset
+	ldr	r2, .L2180+68
+	ldr	r3, .L2180+72
+	str	r2, [r3, #0]
+	movs	r2, #0
+	ldr	r3, .L2180+76
+	strb	r2, [r3, #0]
+	ldr	r3, .L2180+28
+	ldrb	r3, [r3, #1]	@ zero_extendqisi2
+	cmp	r3, #241
+	beq	.L2138
+	cmp	r3, #218
+	beq	.L2138
+	cmp	r3, #220
+	bne	.L2139
+.L2138:
+	ldr	r2, .L2180+48
+	movs	r1, #1
+	ldr	r0, .L2180+28
+	strb	r1, [r2, #0]
+	movs	r2, #16
+	ldr	r1, .L2180+20
+	ldrb	r4, [r0, #0]	@ zero_extendqisi2
+	strb	r2, [r1, #0]
+	cmp	r4, #152
+	ldr	r1, .L2180+52
+	strb	r2, [r1, #0]
+	ldr	r2, .L2180+80
+	strb	r4, [r2, #1]
+	bne	.L2140
+	ldrsb	r0, [r0, #4]
+	cmp	r0, #0
+	blt	.L2140
+	movs	r0, #24
+	strb	r0, [r1, #0]
+.L2140:
+	cmp	r3, #218
+	bne	.L2141
+	mov	r1, #2048
+	b	.L2177
+.L2181:
+	.align	2
+.L2180:
+	.word	.LANCHOR44
+	.word	.LANCHOR41
+	.word	.LANCHOR234
+	.word	.LANCHOR203
+	.word	.LANCHOR204
+	.word	.LANCHOR1
+	.word	.LANCHOR49
+	.word	.LANCHOR22
+	.word	.LANCHOR46
+	.word	.LANCHOR2
+	.word	.LANCHOR35
+	.word	.LANCHOR50
+	.word	.LANCHOR0
+	.word	.LANCHOR45
+	.word	.LC38
+	.word	.LANCHOR187
+	.word	.LANCHOR31
+	.word	.LANCHOR18
+	.word	.LANCHOR23
+	.word	.LANCHOR4
+	.word	.LANCHOR236
+	.word	.LANCHOR5
+.L2141:
+	cmp	r3, #220
+	bne	.L2142
+	mov	r1, #4096
+.L2177:
+	strh	r1, [r2, #14]	@ movhi
+	strb	r3, [r2, #2]
+.L2142:
+	ldr	r1, .L2182
+	movs	r2, #32
+	ldr	r0, .L2182+4
+	bl	memcpy
+	ldr	r0, .L2182+8
+	ldr	r1, .L2182+12
+	movs	r2, #32
+	bl	memcpy
+.L2139:
+	ldr	r3, .L2182+16
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #0
+	bne	.L2143
+	bl	FlashLoadPhyInfoInRam
+	cbnz	r0, .L2144
+	ldr	r3, .L2182+20
+	ldr	r4, .L2182+24
+	ldr	r3, [r3, #0]
+	ldrh	r0, [r3, #16]
+	ubfx	r0, r0, #8, #3
+	strb	r0, [r4, #0]
+	lsls	r2, r0, #31
+	bmi	.L2144
+	ldr	r3, .L2182+28
+	movs	r2, #1
+	strb	r2, [r3, #0]
+	bl	FlashSetInterfaceMode
+	ldrb	r0, [r4, #0]	@ zero_extendqisi2
+	bl	NandcSetMode
+.L2144:
+	ldr	r4, .L2182+20
+	ldr	r3, [r4, #0]
+	ldrb	r2, [r3, #26]	@ zero_extendqisi2
+	ldr	r3, .L2182+32
+	strb	r2, [r3, #0]
+	bl	FlashLoadPhyInfo
+	cmp	r0, #0
+	beq	.L2143
+	ldr	r3, [r4, #0]
+	ldr	r0, .L2182+36
+	ldrh	r1, [r3, #14]
+	bl	printf
+	bl	FlashLoadPhyInfoInRam
+	adds	r3, r0, #1
+	beq	.L2134
+	bl	FlashDieInfoInit
+	ldr	r3, [r4, #0]
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	bl	FlashGetReadRetryDefault
+	ldr	r1, .L2182+40
+	ldr	r3, [r4, #0]
+	ldrh	r1, [r1, #0]
+	ldrb	r2, [r3, #9]	@ zero_extendqisi2
+	addw	r1, r1, #4095
+	cmp	r2, r1, lsr #12
+	blt	.L2145
+	ldrh	r1, [r3, #14]
+	adds	r1, r1, #255
+	cmp	r2, r1, lsr #8
+	bge	.L2146
+.L2145:
+	ldrh	r2, [r3, #14]
+	bic	r2, r2, #255
+	strh	r2, [r3, #14]	@ movhi
+.L2146:
+	ldr	r3, .L2182+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L2147
+	bl	FlashSavePhyInfo
+	ldr	r3, .L2182+44
+	movs	r0, #0
+	ldr	r1, [r3, #0]
+	bl	FlashDdrParaScan
+.L2147:
+	bl	FlashSavePhyInfo
+.L2143:
+	ldr	r5, .L2182+20
+	ldr	r2, .L2182+32
+	ldr	r4, .L2182+48
+	ldr	r3, [r5, #0]
+	ldrb	r1, [r3, #26]	@ zero_extendqisi2
+	ldrb	r6, [r3, #18]	@ zero_extendqisi2
+	strb	r1, [r2, #0]
+	ldr	r1, .L2182+52
+	ldrh	r2, [r3, #16]
+	ubfx	r0, r2, #7, #1
+	strb	r0, [r1, #0]
+	ldr	r1, .L2182+56
+	ubfx	r0, r2, #3, #1
+	strb	r0, [r1, #0]
+	ubfx	r0, r2, #4, #1
+	ldr	r1, .L2182+60
+	ubfx	r2, r2, #8, #3
+	strb	r0, [r1, #0]
+	ldr	r1, .L2182+24
+	ldrh	r0, [r3, #10]
+	strb	r2, [r1, #0]
+	movs	r2, #0
+	ldrb	r1, [r3, #12]	@ zero_extendqisi2
+	str	r2, [r4, #0]
+	bl	__aeabi_idiv
+	mov	r1, r0
+	mov	r0, r6
+	bl	BuildFlashLsbPageTable
+	bl	FlashDieInfoInit
+	ldr	r3, [r5, #0]
+	ldrh	r2, [r3, #16]
+	lsls	r0, r2, #25
+	bpl	.L2148
+	ldrb	r0, [r3, #19]	@ zero_extendqisi2
+	ldr	r2, .L2182+64
+	ldr	r3, .L2182+68
+	ldrb	r1, [r2, #1]	@ zero_extendqisi2
+	strb	r0, [r3, #0]
+	ldr	r3, .L2182+72
+	strb	r1, [r3, #0]
+	ldrb	r1, [r2, #2]	@ zero_extendqisi2
+	ldr	r3, .L2182+76
+	strb	r1, [r3, #0]
+	subs	r1, r0, #1
+	cmp	r1, #6
+	bhi	.L2149
+	ldr	r3, .L2182+80
+	str	r3, [r4, #0]
+	subs	r3, r0, #5
+	cmp	r3, #1
+	bhi	.L2150
+	ldr	r3, .L2182+84
+	movs	r2, #1
+	str	r2, [r3, #0]
+	b	.L2151
+.L2150:
+	cmp	r0, #7
+	beq	.L2174
+.L2151:
+	ldr	r1, .L2182+88
+	b	.L2152
+.L2174:
+	add	r1, r2, #28
+.L2152:
+	movs	r3, #0
+	mov	r2, r3
+.L2154:
+	ldrsb	r4, [r1, r2]
+	cbnz	r4, .L2153
+	adds	r3, r3, #1
+.L2153:
+	adds	r2, r2, #1
+	cmp	r2, #32
+	bne	.L2154
+	cmp	r3, #27
+	bls	.L2148
+	bl	FlashGetReadRetryDefault
+	bl	FlashSavePhyInfo
+	b	.L2148
+.L2149:
+	sub	r2, r0, #17
+	cmp	r2, #2
+	bhi	.L2155
+	ldr	r2, .L2182+92
+	str	r2, [r4, #0]
+	movs	r2, #7
+	cmp	r0, #19
+	strb	r2, [r3, #0]
+	bne	.L2148
+	movs	r2, #15
+	b	.L2178
+.L2155:
+	cmp	r0, #33
+	beq	.L2156
+	cmp	r0, #65
+	beq	.L2156
+	cmp	r0, #66
+	bne	.L2157
+.L2156:
+	ldr	r2, .L2182+96
+	ldr	r3, .L2182+48
+	str	r2, [r3, #0]
+	movs	r2, #4
+	ldr	r3, .L2182+72
+	strb	r2, [r3, #0]
+	movs	r2, #7
+	ldr	r3, .L2182+76
+	b	.L2178
+.L2157:
+	cmp	r0, #67
+	beq	.L2158
+	cmp	r0, #34
+	beq	.L2158
+	cmp	r0, #35
+	beq	.L2158
+	cmp	r0, #68
+	bne	.L2159
+.L2158:
+	ldr	r2, .L2182+96
+	ldr	r3, .L2182+48
+	str	r2, [r3, #0]
+	movs	r2, #7
+	ldr	r3, .L2182+76
+	cmp	r0, #35
+	strb	r2, [r3, #0]
+	beq	.L2160
+	cmp	r0, #68
+	bne	.L2161
+.L2160:
+	movs	r2, #17
+	strb	r2, [r3, #0]
+.L2161:
+	subs	r0, r0, #67
+	ldr	r3, .L2182+72
+	cmp	r0, #1
+	bhi	.L2162
+	movs	r2, #4
+.L2178:
+	strb	r2, [r3, #0]
+	b	.L2148
+.L2162:
+	movs	r2, #5
+	b	.L2178
+.L2159:
+	cmp	r0, #49
+	bne	.L2148
+	ldr	r2, .L2182+100
+	ldr	r3, .L2182+48
+	str	r2, [r3, #0]
+.L2148:
+	ldr	r3, .L2182+104
+	ldr	r2, [r3, #0]
+	ldr	r3, .L2182+108
+	cmp	r2, r3
+	bne	.L2163
+	ldr	r3, .L2182+32
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cbz	r3, .L2163
+	ldr	r3, .L2182+20
+	movs	r2, #0
+	ldr	r3, [r3, #0]
+	strb	r2, [r3, #18]
+.L2163:
+	ldr	r3, .L2182+112
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #44
+	bne	.L2164
+	ldr	r3, .L2182+28
+	ldrb	r2, [r3, #0]	@ zero_extendqisi2
+	cbz	r2, .L2164
+	movs	r2, #0
+	movs	r0, #1
+	strb	r2, [r3, #0]
+	bl	FlashSetInterfaceMode
+	movs	r0, #1
+	bl	NandcSetMode
+.L2164:
+	movs	r0, #0
+	bl	flash_enter_slc_mode
+	ldr	r3, .L2182+24
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	tst	r3, #6
+	beq	.L2165
+	ldr	r2, .L2182+28
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cbnz	r2, .L2166
+	lsls	r1, r3, #31
+	bmi	.L2165
+.L2166:
+	ldr	r3, .L2182+44
+	movs	r0, #0
+	ldr	r1, [r3, #0]
+	bl	FlashDdrParaScan
+.L2165:
+	movs	r0, #0
+	bl	flash_exit_slc_mode
+	ldr	r3, .L2182+20
+	ldr	r3, [r3, #0]
+	ldrb	r0, [r3, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	ldr	r0, .L2182+116
+	bl	FlashReadIdbDataRaw
+	ldr	r3, .L2182+120
+	cmp	r0, #0
+	bne	.L2167
+	ldr	r2, .L2182+124
+	ldrb	r1, [r3, #0]	@ zero_extendqisi2
+	ldrb	r2, [r2, #0]	@ zero_extendqisi2
+	cmp	r1, r2
+	it	hi
+	strbhi	r2, [r3, #0]
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	cmp	r3, #15
+	bhi	.L2169
+	movs	r2, #16
+	ldr	r3, .L2182+120
+	b	.L2179
+.L2183:
+	.align	2
+.L2182:
+	.word	.LANCHOR27+32
+	.word	.LANCHOR6
+	.word	.LANCHOR18
+	.word	.LANCHOR236
+	.word	.LANCHOR0
+	.word	.LANCHOR23
+	.word	.LANCHOR34
+	.word	.LANCHOR35
+	.word	.LANCHOR7
+	.word	.LC39
+	.word	.LANCHOR24
+	.word	.LANCHOR47
+	.word	.LANCHOR51
+	.word	.LANCHOR4
+	.word	.LANCHOR189
+	.word	.LANCHOR33
+	.word	.LANCHOR31
+	.word	.LANCHOR11
+	.word	.LANCHOR14
+	.word	.LANCHOR42
+	.word	HynixReadRetrial
+	.word	.LANCHOR39
+	.word	.LANCHOR31+20
+	.word	MicronReadRetrial
+	.word	ToshibaReadRetrial
+	.word	SamsungReadRetrial
+	.word	.LANCHOR40
+	.word	1446522928
+	.word	.LANCHOR22
+	.word	.LANCHOR25
+	.word	.LANCHOR1
+	.word	.LANCHOR49
+.L2167:
+	movs	r2, #16
+.L2179:
+	strb	r2, [r3, #0]
+.L2169:
+	ldr	r3, .L2184
+	ldr	r4, .L2184+4
+	ldr	r5, [r3, #0]
+	ldrb	r1, [r5, #12]	@ zero_extendqisi2
+	ldrh	r6, [r5, #10]
+	ldrh	r7, [r5, #14]
+	strh	r1, [r4, #8]	@ movhi
+	mov	r0, r6
+	ldrb	r3, [r5, #7]	@ zero_extendqisi2
+	str	r3, [r4, #4]
+	ldr	r3, .L2184+8
+	ldr	r3, [r3, #0]
+	str	r3, [r4, #0]
+	ldr	r3, .L2184+12
+	ldrb	r3, [r3, #0]	@ zero_extendqisi2
+	strh	r3, [r4, #10]	@ movhi
+	ldrb	r3, [r5, #13]	@ zero_extendqisi2
+	strh	r6, [r4, #16]	@ movhi
+	strh	r7, [r4, #14]	@ movhi
+	strh	r3, [r4, #12]	@ movhi
+	bl	__aeabi_idiv
+	mov	r2, #512
+	strh	r0, [r4, #18]	@ movhi
+	ldrb	r3, [r5, #9]	@ zero_extendqisi2
+	muls	r6, r3, r6
+	strh	r2, [r4, #24]	@ movhi
+	uxth	r6, r6
+	ldr	r2, .L2184+16
+	strh	r3, [r4, #20]	@ movhi
+	strh	r6, [r4, #22]	@ movhi
+	ldrb	r1, [r2, #0]	@ zero_extendqisi2
+	strh	r1, [r4, #26]	@ movhi
+	ldr	r1, .L2184+20
+	ldrb	r1, [r1, #0]	@ zero_extendqisi2
+	cmp	r1, #1
+	bne	.L2170
+	lsls	r3, r3, #1
+	movs	r1, #16
+	lsrs	r7, r7, #1
+	strh	r3, [r4, #20]	@ movhi
+	lsls	r6, r6, #1
+	movs	r3, #8
+	strb	r1, [r2, #0]
+	strh	r7, [r4, #14]	@ movhi
+	strh	r6, [r4, #22]	@ movhi
+	strh	r3, [r4, #26]	@ movhi
+.L2170:
+	ldrb	r0, [r5, #20]	@ zero_extendqisi2
+	bl	FlashBchSel
+	movs	r0, #0
+	b	.L2134
+.L2172:
+	mvn	r0, #1
+.L2134:
+	add	sp, sp, #24
+	pop	{r4, r5, r6, r7, r8, sl, fp, pc}
+.L2185:
+	.align	2
+.L2184:
+	.word	.LANCHOR23
+	.word	.LANCHOR28
+	.word	.LANCHOR22
+	.word	.LANCHOR16
+	.word	.LANCHOR1
+	.word	.LANCHOR0
+	.size	FlashInit, .-FlashInit
+	.section	.text.rk_ftl_init,"ax",%progbits
+	.align	1
+	.global	rk_ftl_init
+	.thumb
+	.thumb_func
+	.type	rk_ftl_init, %function
+rk_ftl_init:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+	push	{r4, lr}
+	bl	FlashInit
+	mov	r4, r0
+	cbnz	r0, .L2187
+	ldr	r0, .L2188
+	bl	FtlInit
+.L2187:
+	mov	r1, r4
+	ldr	r0, .L2188+4
+	bl	printf
+	mov	r0, r4
+	pop	{r4, pc}
+.L2189:
+	.align	2
+.L2188:
+	.word	.LANCHOR28
+	.word	.LC40
+	.size	rk_ftl_init, .-rk_ftl_init
+	.global	gc_ink_free_return_value
+	.global	FtlUpdateVaildLpnCount
+	.global	g_ect_tbl_power_up_flush
+	.global	power_up_flag
+	.global	g_LowFormat
+	.global	gFtlInitStatus
+	.global	DeviceCapacity
+	.global	ToshibaRefValue
+	.global	Toshiba15RefValue
+	.global	ToshibaA19RefValue
+	.global	SamsungRefValue
+	.global	refValueDefault
+	.global	random_seed
+	.global	gSlcNandParaInfo
+	.global	gNandParaInfo
+	.global	NandFlashParaTbl
+	.global	g_power_lost_recovery_flag
+	.global	c_mlc_erase_count_value
+	.global	g_recovery_ppa_tbl
+	.global	g_recovery_page_min_ver
+	.global	g_recovery_page_num
+	.global	g_cur_erase_blk
+	.global	g_gc_skip_write_count
+	.global	g_gc_head_data_block_count
+	.global	g_gc_head_data_block
+	.global	g_ftl_nand_free_count
+	.global	g_in_swl_replace
+	.global	g_in_gc_progress
+	.global	g_all_blk_used_slc_mode
+	.global	g_max_erase_count
+	.global	g_totle_sys_slc_erase_count
+	.global	g_totle_slc_erase_count
+	.global	g_min_erase_count
+	.global	g_totle_avg_erase_count
+	.global	g_totle_mlc_erase_count
+	.global	g_totle_l2p_write_count
+	.global	g_totle_cache_write_count
+	.global	g_tmp_data_superblock_id
+	.global	g_totle_read_page_count
+	.global	g_totle_discard_page_count
+	.global	g_totle_read_sector
+	.global	g_totle_write_sector
+	.global	g_totle_write_page_count
+	.global	g_totle_gc_page_count
+	.global	g_gc_blk_index
+	.global	g_gc_merge_free_blk_threshold
+	.global	g_gc_free_blk_threshold
+	.global	g_gc_bad_block_temp_tbl
+	.global	g_gc_bad_block_gc_index
+	.global	g_gc_bad_block_temp_num
+	.global	g_gc_next_blk_1
+	.global	g_gc_next_blk
+	.global	g_gc_cur_blk_max_valid_pages
+	.global	g_gc_cur_blk_valid_pages
+	.global	g_gc_page_offset
+	.global	g_gc_blk_num
+	.global	p_gc_blk_tbl
+	.global	p_gc_page_info
+	.global	g_sys_ext_data
+	.global	g_sys_save_data
+	.global	gp_last_act_superblock
+	.global	g_gc_superblock
+	.global	g_gc_temp_superblock
+	.global	g_buffer_superblock
+	.global	g_active_superblock
+	.global	g_num_data_superblocks
+	.global	g_num_free_superblocks
+	.global	p_data_block_list_tail
+	.global	p_data_block_list_head
+	.global	p_free_data_block_list_head
+	.global	p_data_block_list_table
+	.global	g_l2p_last_update_region_id
+	.global	p_l2p_map_buf
+	.global	p_l2p_ram_map
+	.global	g_totle_vendor_block
+	.global	p_vendor_region_ppn_table
+	.global	p_vendor_block_ver_table
+	.global	p_vendor_block_valid_page_count
+	.global	p_vendor_block_table
+	.global	g_totle_map_block
+	.global	p_map_region_ppn_table
+	.global	p_map_block_ver_table
+	.global	p_map_block_valid_page_count
+	.global	p_map_block_table
+	.global	p_blk_mode_table
+	.global	p_valid_page_count_check_table
+	.global	p_valid_page_count_table
+	.global	g_totle_swl_count
+	.global	p_swl_mul_table
+	.global	p_erase_count_table
+	.global	g_ect_tbl_info_size
+	.global	gp_ect_tbl_info
+	.global	g_gc_num_req
+	.global	c_gc_page_buf_num
+	.global	gp_gc_page_buf_info
+	.global	p_gc_data_buf
+	.global	p_gc_spare_buf
+	.global	p_io_spare_buf
+	.global	p_io_data_buf_1
+	.global	p_io_data_buf_0
+	.global	p_sys_spare_buf
+	.global	p_vendor_data_buf
+	.global	p_sys_data_buf_1
+	.global	p_sys_data_buf
+	.global	p_plane_order_table
+	.global	g_req_cache
+	.global	req_gc_dst
+	.global	req_gc
+	.global	req_erase
+	.global	req_prgm
+	.global	req_read
+	.global	req_sys
+	.global	gVendorBlkInfo
+	.global	gL2pMapInfo
+	.global	gSysFreeQueue
+	.global	gSysInfo
+	.global	gBbtInfo
+	.global	g_inkDie_check_enable
+	.global	g_SlcPartLbaEndSector
+	.global	g_MaxLbn
+	.global	g_VaildLpn
+	.global	g_MaxLpn
+	.global	g_MaxLbaSector
+	.global	g_GlobalDataVersion
+	.global	g_GlobalSysVersion
+	.global	ftl_gc_temp_power_lost_recovery_flag
+	.global	c_ftl_nand_max_data_blks
+	.global	c_ftl_nand_data_op_blks_per_plane
+	.global	c_ftl_nand_data_blks_per_plane
+	.global	c_ftl_nand_max_sys_blks
+	.global	c_ftl_nand_init_sys_blks_per_plane
+	.global	c_ftl_nand_sys_blks_per_plane
+	.global	c_ftl_vendor_part_size
+	.global	c_ftl_nand_max_vendor_blks
+	.global	c_ftl_nand_max_map_blks
+	.global	c_ftl_nand_map_blks_per_plane
+	.global	c_ftl_nand_vendor_region_num
+	.global	c_ftl_nand_l2pmap_ram_region_num
+	.global	c_ftl_nand_map_region_num
+	.global	c_ftl_nand_totle_phy_blks
+	.global	c_ftl_nand_reserved_blks
+	.global	c_ftl_nand_byte_pre_oob
+	.global	c_ftl_nand_byte_pre_page
+	.global	c_ftl_nand_sec_pre_page_shift
+	.global	c_ftl_nand_sec_pre_page
+	.global	c_ftl_nand_page_pre_super_blk
+	.global	c_ftl_nand_page_pre_slc_blk
+	.global	c_ftl_nand_page_pre_blk
+	.global	c_ftl_nand_bbm_buf_size
+	.global	c_ftl_nand_ext_blk_pre_plane
+	.global	c_ftl_nand_blk_pre_plane
+	.global	c_ftl_nand_planes_num
+	.global	c_ftl_nand_blks_per_die_shift
+	.global	c_ftl_nand_blks_per_die
+	.global	c_ftl_nand_planes_per_die
+	.global	c_ftl_nand_die_num
+	.global	c_ftl_nand_type
+	.global	gMasterTempBuf
+	.global	gMasterInfo
+	.global	gNandcDumpWriteEn
+	.global	gToggleModeClkDiv
+	.global	gBootDdrMode
+	.global	gNandcEccBits
+	.global	gpNandc1
+	.global	gpNandc
+	.global	g_nandc_version_data
+	.global	gNandcVer
+	.global	gNandChipMap
+	.global	gNandIDataBuf
+	.global	FlashDdrTunningReadCount
+	.global	FlashWaitBusyScheduleEn
+	.global	gNandPhyInfo
+	.global	gFlashProgCheckSpareBuffer
+	.global	gFlashProgCheckBuffer
+	.global	gFlashSpareBuffer
+	.global	gFlashPageBuffer1
+	.global	gFlashPageBuffer0
+	.global	gpFlashSaveInfo
+	.global	gReadRetryInfo
+	.global	gpNandParaInfo
+	.global	gNandOptPara
+	.global	g_slc2KBNand
+	.global	g_maxRetryCount
+	.global	g_maxRegNum
+	.global	g_retryMode
+	.global	gNandIDBResBlkNumSaveInFlash
+	.global	gNandIDBResBlkNum
+	.global	gNandFlashResEndPageAddr
+	.global	gNandFlashInfoBlockAddr
+	.global	gNandFlashIdbBlockAddr
+	.global	gNandFlashInfoBlockEcc
+	.global	gNandFlashIDBEccBits
+	.global	gNandFlashEccBits
+	.global	gNandRandomizer
+	.global	gBlockPageAlignSize
+	.global	gTotleBlock
+	.global	gNandMaxChip
+	.global	gNandMaxDie
+	.global	gFlashInterfaceMode
+	.global	gFlashSlcMode
+	.global	gFlashOnfiModeEn
+	.global	gFlashToggleModeEn
+	.global	gFlashSdrModeEn
+	.global	gMultiPageProgEn
+	.global	gMultiPageReadEn
+	.global	gpReadRetrial
+	.global	mlcPageToSlcPageTbl
+	.global	slcPageToMlcPageTbl
+	.global	DieAddrs
+	.global	gDieOp
+	.global	DieCsIndex
+	.global	IDByte
+	.global	read_retry_cur_offset
+	.section	.rodata
+.LANCHOR48 = . + 0
+.LC0:
+	.byte	60
+	.byte	40
+	.byte	24
+	.byte	16
+	.section	.bss.g_recovery_ppa_tbl,"aw",%nobits
+	.align	2
+.LANCHOR226 = . + 0
+	.type	g_recovery_ppa_tbl, %object
+	.size	g_recovery_ppa_tbl, 128
+g_recovery_ppa_tbl:
+	.space	128
+	.section	.bss.p_blk_mode_table,"aw",%nobits
+	.align	2
+.LANCHOR117 = . + 0
+	.type	p_blk_mode_table, %object
+	.size	p_blk_mode_table, 4
+p_blk_mode_table:
+	.space	4
+	.section	.rodata.__func__.8224,"a",%progbits
+.LANCHOR220 = . + 0
+	.type	__func__.8224, %object
+	.size	__func__.8224, 19
+__func__.8224:
+	.ascii	"FtlGcFreeTempBlock\000"
+	.section	.bss.p_gc_blk_tbl,"aw",%nobits
+	.align	2
+.LANCHOR143 = . + 0
+	.type	p_gc_blk_tbl, %object
+	.size	p_gc_blk_tbl, 4
+p_gc_blk_tbl:
+	.space	4
+	.section	.bss.g_ect_tbl_power_up_flush,"aw",%nobits
+	.align	1
+.LANCHOR214 = . + 0
+	.type	g_ect_tbl_power_up_flush, %object
+	.size	g_ect_tbl_power_up_flush, 2
+g_ect_tbl_power_up_flush:
+	.space	2
+	.section	.bss.gFlashSlcMode,"aw",%nobits
+.LANCHOR7 = . + 0
+	.type	gFlashSlcMode, %object
+	.size	gFlashSlcMode, 1
+gFlashSlcMode:
+	.space	1
+	.section	.data.gNandParaInfo,"aw",%progbits
+	.align	1
+.LANCHOR18 = . + 0
+	.type	gNandParaInfo, %object
+	.size	gNandParaInfo, 32
+gNandParaInfo:
+	.byte	0
+	.byte	0
+	.space	5
+	.byte	0
+	.byte	1
+	.byte	8
+	.short	128
+	.byte	2
+	.byte	1
+	.short	2048
+	.short	0
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.section	.bss.gNandRandomizer,"aw",%nobits
+.LANCHOR4 = . + 0
+	.type	gNandRandomizer, %object
+	.size	gNandRandomizer, 1
+gNandRandomizer:
+	.space	1
+	.section	.bss.gDieOp,"aw",%nobits
+	.align	2
+.LANCHOR21 = . + 0
+	.type	gDieOp, %object
+	.size	gDieOp, 128
+gDieOp:
+	.space	128
+	.section	.data.refValueDefault,"aw",%progbits
+.LANCHOR235 = . + 0
+	.type	refValueDefault, %object
+	.size	refValueDefault, 28
+refValueDefault:
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	0
+	.byte	-3
+	.byte	-7
+	.byte	-8
+	.byte	0
+	.byte	-6
+	.byte	-13
+	.byte	-15
+	.byte	0
+	.byte	-11
+	.byte	-20
+	.byte	-23
+	.byte	0
+	.byte	0
+	.byte	-26
+	.byte	-30
+	.byte	0
+	.byte	0
+	.byte	-32
+	.byte	-37
+	.section	.bss.gFlashToggleModeEn,"aw",%nobits
+.LANCHOR35 = . + 0
+	.type	gFlashToggleModeEn, %object
+	.size	gFlashToggleModeEn, 1
+gFlashToggleModeEn:
+	.space	1
+	.section	.bss.g_sys_ext_data,"aw",%nobits
+	.align	2
+.LANCHOR141 = . + 0
+	.type	g_sys_ext_data, %object
+	.size	g_sys_ext_data, 512
+g_sys_ext_data:
+	.space	512
+	.section	.rodata.__func__.8120,"a",%progbits
+.LANCHOR209 = . + 0
+	.type	__func__.8120, %object
+	.size	__func__.8120, 25
+__func__.8120:
+	.ascii	"allocate_data_superblock\000"
+	.section	.bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits
+	.align	1
+.LANCHOR70 = . + 0
+	.type	c_ftl_nand_page_pre_super_blk, %object
+	.size	c_ftl_nand_page_pre_super_blk, 2
+c_ftl_nand_page_pre_super_blk:
+	.space	2
+	.section	.bss.g_inkDie_check_enable,"aw",%nobits
+	.align	2
+.LANCHOR126 = . + 0
+	.type	g_inkDie_check_enable, %object
+	.size	g_inkDie_check_enable, 4
+g_inkDie_check_enable:
+	.space	4
+	.section	.bss.gNandFlashEccBits,"aw",%nobits
+.LANCHOR29 = . + 0
+	.type	gNandFlashEccBits, %object
+	.size	gNandFlashEccBits, 1
+gNandFlashEccBits:
+	.space	1
+	.section	.bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits
+	.align	1
+.LANCHOR200 = . + 0
+	.type	c_ftl_nand_data_op_blks_per_plane, %object
+	.size	c_ftl_nand_data_op_blks_per_plane, 2
+c_ftl_nand_data_op_blks_per_plane:
+	.space	2
+	.section	.bss.p_sys_data_buf_1,"aw",%nobits
+	.align	2
+.LANCHOR176 = . + 0
+	.type	p_sys_data_buf_1, %object
+	.size	p_sys_data_buf_1, 4
+p_sys_data_buf_1:
+	.space	4
+	.section	.bss.g_maxRetryCount,"aw",%nobits
+.LANCHOR42 = . + 0
+	.type	g_maxRetryCount, %object
+	.size	g_maxRetryCount, 1
+g_maxRetryCount:
+	.space	1
+	.section	.rodata.__func__.7721,"a",%progbits
+.LANCHOR212 = . + 0
+	.type	__func__.7721, %object
+	.size	__func__.7721, 16
+__func__.7721:
+	.ascii	"FtlMapWritePage\000"
+	.section	.bss.gMultiPageProgEn,"aw",%nobits
+.LANCHOR33 = . + 0
+	.type	gMultiPageProgEn, %object
+	.size	gMultiPageProgEn, 1
+gMultiPageProgEn:
+	.space	1
+	.section	.bss.gMasterInfo,"aw",%nobits
+	.align	2
+.LANCHOR38 = . + 0
+	.type	gMasterInfo, %object
+	.size	gMasterInfo, 32
+gMasterInfo:
+	.space	32
+	.section	.bss.gReadRetryInfo,"aw",%nobits
+.LANCHOR31 = . + 0
+	.type	gReadRetryInfo, %object
+	.size	gReadRetryInfo, 852
+gReadRetryInfo:
+	.space	852
+	.section	.bss.c_ftl_nand_die_num,"aw",%nobits
+	.align	1
+.LANCHOR60 = . + 0
+	.type	c_ftl_nand_die_num, %object
+	.size	c_ftl_nand_die_num, 2
+c_ftl_nand_die_num:
+	.space	2
+	.section	.bss.gToggleModeClkDiv,"aw",%nobits
+	.align	2
+	.type	gToggleModeClkDiv, %object
+	.size	gToggleModeClkDiv, 4
+gToggleModeClkDiv:
+	.space	4
+	.section	.bss.p_valid_page_count_table,"aw",%nobits
+	.align	2
+.LANCHOR99 = . + 0
+	.type	p_valid_page_count_table, %object
+	.size	p_valid_page_count_table, 4
+p_valid_page_count_table:
+	.space	4
+	.section	.bss.req_erase,"aw",%nobits
+	.align	2
+.LANCHOR93 = . + 0
+	.type	req_erase, %object
+	.size	req_erase, 4
+req_erase:
+	.space	4
+	.section	.bss.c_ftl_nand_max_data_blks,"aw",%nobits
+	.align	2
+.LANCHOR57 = . + 0
+	.type	c_ftl_nand_max_data_blks, %object
+	.size	c_ftl_nand_max_data_blks, 4
+c_ftl_nand_max_data_blks:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockEcc,"aw",%nobits
+	.type	gNandFlashInfoBlockEcc, %object
+	.size	gNandFlashInfoBlockEcc, 1
+gNandFlashInfoBlockEcc:
+	.space	1
+	.section	.bss.g_nandc_version_data,"aw",%nobits
+	.align	2
+.LANCHOR40 = . + 0
+	.type	g_nandc_version_data, %object
+	.size	g_nandc_version_data, 4
+g_nandc_version_data:
+	.space	4
+	.section	.bss.gNandIDBResBlkNumSaveInFlash,"aw",%nobits
+.LANCHOR49 = . + 0
+	.type	gNandIDBResBlkNumSaveInFlash, %object
+	.size	gNandIDBResBlkNumSaveInFlash, 1
+gNandIDBResBlkNumSaveInFlash:
+	.space	1
+	.section	.bss.g_MaxLbn,"aw",%nobits
+	.align	2
+.LANCHOR199 = . + 0
+	.type	g_MaxLbn, %object
+	.size	g_MaxLbn, 4
+g_MaxLbn:
+	.space	4
+	.section	.bss.g_retryMode,"aw",%nobits
+.LANCHOR11 = . + 0
+	.type	g_retryMode, %object
+	.size	g_retryMode, 1
+g_retryMode:
+	.space	1
+	.section	.bss.gMasterTempBuf,"aw",%nobits
+	.align	2
+.LANCHOR188 = . + 0
+	.type	gMasterTempBuf, %object
+	.size	gMasterTempBuf, 4
+gMasterTempBuf:
+	.space	4
+	.section	.rodata.__func__.7617,"a",%progbits
+.LANCHOR106 = . + 0
+	.type	__func__.7617, %object
+	.size	__func__.7617, 17
+__func__.7617:
+	.ascii	"List_remove_node\000"
+	.section	.bss.gpFlashSaveInfo,"aw",%nobits
+	.align	2
+.LANCHOR43 = . + 0
+	.type	gpFlashSaveInfo, %object
+	.size	gpFlashSaveInfo, 4
+gpFlashSaveInfo:
+	.space	4
+	.section	.bss.g_GlobalSysVersion,"aw",%nobits
+	.align	2
+.LANCHOR153 = . + 0
+	.type	g_GlobalSysVersion, %object
+	.size	g_GlobalSysVersion, 4
+g_GlobalSysVersion:
+	.space	4
+	.section	.rodata.__func__.7840,"a",%progbits
+.LANCHOR192 = . + 0
+	.type	__func__.7840, %object
+	.size	__func__.7840, 14
+__func__.7840:
+	.ascii	"FtlScanSysBlk\000"
+	.section	.bss.gpReadRetrial,"aw",%nobits
+	.align	2
+.LANCHOR51 = . + 0
+	.type	gpReadRetrial, %object
+	.size	gpReadRetrial, 4
+gpReadRetrial:
+	.space	4
+	.section	.rodata.str1.1,"aMS",%progbits,1
+.LC1:
+	.ascii	"FlashEraseBlocks pageAddr error %x\012\000"
+.LC2:
+	.ascii	"micron RR %d row=%x,count %d,status=%d\012\000"
+.LC3:
+	.ascii	"ECC:%d\012\000"
+.LC4:
+	.ascii	"sdr read ok %x ecc=%d\012\000"
+.LC5:
+	.ascii	"sync para %d\012\000"
+.LC6:
+	.ascii	"TOG mode Read error %x %x\012\000"
+.LC7:
+	.ascii	"read retry status %x %x %x\012\000"
+.LC8:
+	.ascii	"phyBlk = 0x%x die = %d block_in_die = 0x%x 0x%8x\012"
+	.ascii	"\000"
+.LC9:
+	.ascii	"\012!!!!! error @ func:%s - line:%d\012\000"
+.LC10:
+	.ascii	"%s\012\000"
+.LC11:
+	.ascii	"!!!!! FTL sys Error !!!!!\000"
+.LC12:
+	.ascii	"%s 0x%x:\000"
+.LC13:
+	.ascii	"%x \000"
+.LC14:
+	.ascii	"\000"
+.LC15:
+	.ascii	"Read pageadd=%x  ecc=%x err=%x\012\000"
+.LC16:
+	.ascii	"data:\000"
+.LC17:
+	.ascii	"spare:\000"
+.LC18:
+	.ascii	"ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+.LC19:
+	.ascii	"slc mode\000"
+.LC20:
+	.ascii	"no ect\000"
+.LC21:
+	.ascii	"prog error: = %x\012\000"
+.LC22:
+	.ascii	"prog read error: = %x\012\000"
+.LC23:
+	.ascii	"prog read s error: = %x %x %x\012\000"
+.LC24:
+	.ascii	"prog read d error: = %x %x %x\012\000"
+.LC25:
+	.ascii	"FtlVpcTblFlush error = %x error count = %d\012\000"
+.LC26:
+	.ascii	"FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+.LC27:
+	.ascii	"FtlBbmTblFlush error:%x\012\000"
+.LC28:
+	.ascii	"FtlBbmTblFlush error = %x error count = %d\012\000"
+.LC29:
+	.ascii	"decrement_vpc_count %x = %d\012\000"
+.LC30:
+	.ascii	"FtlMapWritePage error = %x \012\000"
+.LC31:
+	.ascii	"FtlMapWritePage error = %x error count = %d\012\000"
+.LC32:
+	.ascii	"Ftlwrite decrement_vpc_count %x = %d\012\000"
+.LC33:
+	.ascii	"spuer block %x vpn is 0\012 \000"
+.LC34:
+	.ascii	"FtlWrite: lpa error:%x %x\012\000"
+.LC35:
+	.ascii	"BBT:\000"
+.LC36:
+	.ascii	"otp error! %d\000"
+.LC37:
+	.ascii	"rr\000"
+.LC38:
+	.ascii	"No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+.LC39:
+	.ascii	"FlashLoadPhyInfo fail %x!!\012\000"
+.LC40:
+	.ascii	"FtlInit %x\012\000"
+	.section	.bss.gNandFlashIdbBlockAddr,"aw",%nobits
+	.align	2
+.LANCHOR46 = . + 0
+	.type	gNandFlashIdbBlockAddr, %object
+	.size	gNandFlashIdbBlockAddr, 4
+gNandFlashIdbBlockAddr:
+	.space	4
+	.section	.bss.req_sys,"aw",%nobits
+	.align	2
+.LANCHOR197 = . + 0
+	.type	req_sys, %object
+	.size	req_sys, 36
+req_sys:
+	.space	36
+	.section	.bss.gFlashSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR234 = . + 0
+	.type	gFlashSpareBuffer, %object
+	.size	gFlashSpareBuffer, 4
+gFlashSpareBuffer:
+	.space	4
+	.section	.bss.p_vendor_block_ver_table,"aw",%nobits
+	.align	2
+.LANCHOR185 = . + 0
+	.type	p_vendor_block_ver_table, %object
+	.size	p_vendor_block_ver_table, 4
+p_vendor_block_ver_table:
+	.space	4
+	.section	.bss.g_gc_next_blk,"aw",%nobits
+	.align	1
+.LANCHOR146 = . + 0
+	.type	g_gc_next_blk, %object
+	.size	g_gc_next_blk, 2
+g_gc_next_blk:
+	.space	2
+	.section	.bss.mlcPageToSlcPageTbl,"aw",%nobits
+	.align	2
+.LANCHOR9 = . + 0
+	.type	mlcPageToSlcPageTbl, %object
+	.size	mlcPageToSlcPageTbl, 1024
+mlcPageToSlcPageTbl:
+	.space	1024
+	.section	.bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits
+	.align	1
+.LANCHOR72 = . + 0
+	.type	c_ftl_nand_sec_pre_page_shift, %object
+	.size	c_ftl_nand_sec_pre_page_shift, 2
+c_ftl_nand_sec_pre_page_shift:
+	.space	2
+	.section	.rodata.__func__.8134,"a",%progbits
+.LANCHOR217 = . + 0
+	.type	__func__.8134, %object
+	.size	__func__.8134, 29
+__func__.8134:
+	.ascii	"allocate_new_data_superblock\000"
+	.section	.bss.read_retry_cur_offset,"aw",%nobits
+.LANCHOR32 = . + 0
+	.type	read_retry_cur_offset, %object
+	.size	read_retry_cur_offset, 4
+read_retry_cur_offset:
+	.space	4
+	.section	.bss.p_vendor_block_valid_page_count,"aw",%nobits
+	.align	2
+.LANCHOR184 = . + 0
+	.type	p_vendor_block_valid_page_count, %object
+	.size	p_vendor_block_valid_page_count, 4
+p_vendor_block_valid_page_count:
+	.space	4
+	.section	.bss.gNandcVer,"aw",%nobits
+	.align	2
+.LANCHOR37 = . + 0
+	.type	gNandcVer, %object
+	.size	gNandcVer, 4
+gNandcVer:
+	.space	4
+	.section	.bss.g_num_free_superblocks,"aw",%nobits
+	.align	1
+.LANCHOR104 = . + 0
+	.type	g_num_free_superblocks, %object
+	.size	g_num_free_superblocks, 2
+g_num_free_superblocks:
+	.space	2
+	.section	.bss.p_data_block_list_table,"aw",%nobits
+	.align	2
+.LANCHOR97 = . + 0
+	.type	p_data_block_list_table, %object
+	.size	p_data_block_list_table, 4
+p_data_block_list_table:
+	.space	4
+	.section	.rodata.__func__.7894,"a",%progbits
+.LANCHOR198 = . + 0
+	.type	__func__.7894, %object
+	.size	__func__.7894, 15
+__func__.7894:
+	.ascii	"FtlLoadSysInfo\000"
+	.section	.bss.g_gc_skip_write_count,"aw",%nobits
+	.align	2
+.LANCHOR169 = . + 0
+	.type	g_gc_skip_write_count, %object
+	.size	g_gc_skip_write_count, 4
+g_gc_skip_write_count:
+	.space	4
+	.section	.bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits
+	.align	1
+.LANCHOR55 = . + 0
+	.type	c_ftl_nand_data_blks_per_plane, %object
+	.size	c_ftl_nand_data_blks_per_plane, 2
+c_ftl_nand_data_blks_per_plane:
+	.space	2
+	.section	.bss.gc_ink_free_return_value,"aw",%nobits
+	.align	1
+.LANCHOR228 = . + 0
+	.type	gc_ink_free_return_value, %object
+	.size	gc_ink_free_return_value, 2
+gc_ink_free_return_value:
+	.space	2
+	.section	.rodata.__func__.7583,"a",%progbits
+.LANCHOR105 = . + 0
+	.type	__func__.7583, %object
+	.size	__func__.7583, 17
+__func__.7583:
+	.ascii	"INSERT_FREE_LIST\000"
+	.section	.bss.DieAddrs,"aw",%nobits
+	.align	2
+.LANCHOR20 = . + 0
+	.type	DieAddrs, %object
+	.size	DieAddrs, 32
+DieAddrs:
+	.space	32
+	.section	.bss.g_totle_mlc_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR161 = . + 0
+	.type	g_totle_mlc_erase_count, %object
+	.size	g_totle_mlc_erase_count, 4
+g_totle_mlc_erase_count:
+	.space	4
+	.section	.rodata.__func__.7587,"a",%progbits
+.LANCHOR102 = . + 0
+	.type	__func__.7587, %object
+	.size	__func__.7587, 17
+__func__.7587:
+	.ascii	"INSERT_DATA_LIST\000"
+	.section	.data.gSlcNandParaInfo,"aw",%progbits
+	.align	1
+.LANCHOR236 = . + 0
+	.type	gSlcNandParaInfo, %object
+	.size	gSlcNandParaInfo, 32
+gSlcNandParaInfo:
+	.byte	2
+	.byte	-104
+	.byte	-15
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	1
+	.byte	1
+	.byte	4
+	.short	64
+	.byte	1
+	.byte	1
+	.short	1024
+	.short	256
+	.byte	0
+	.byte	0
+	.byte	16
+	.byte	40
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.section	.bss.p_sys_spare_buf,"aw",%nobits
+	.align	2
+.LANCHOR180 = . + 0
+	.type	p_sys_spare_buf, %object
+	.size	p_sys_spare_buf, 4
+p_sys_spare_buf:
+	.space	4
+	.section	.bss.g_gc_bad_block_gc_index,"aw",%nobits
+	.align	1
+.LANCHOR150 = . + 0
+	.type	g_gc_bad_block_gc_index, %object
+	.size	g_gc_bad_block_gc_index, 2
+g_gc_bad_block_gc_index:
+	.space	2
+	.section	.bss.gNandFlashResEndPageAddr,"aw",%nobits
+	.align	2
+	.type	gNandFlashResEndPageAddr, %object
+	.size	gNandFlashResEndPageAddr, 4
+gNandFlashResEndPageAddr:
+	.space	4
+	.section	.bss.gp_gc_page_buf_info,"aw",%nobits
+	.align	2
+.LANCHOR131 = . + 0
+	.type	gp_gc_page_buf_info, %object
+	.size	gp_gc_page_buf_info, 4
+gp_gc_page_buf_info:
+	.space	4
+	.section	.bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR230 = . + 0
+	.type	g_gc_cur_blk_max_valid_pages, %object
+	.size	g_gc_cur_blk_max_valid_pages, 2
+g_gc_cur_blk_max_valid_pages:
+	.space	2
+	.section	.rodata.__func__.7474,"a",%progbits
+.LANCHOR202 = . + 0
+	.type	__func__.7474, %object
+	.size	__func__.7474, 11
+__func__.7474:
+	.ascii	"FtlLoadBbt\000"
+	.section	.bss.g_totle_write_sector,"aw",%nobits
+	.align	2
+.LANCHOR193 = . + 0
+	.type	g_totle_write_sector, %object
+	.size	g_totle_write_sector, 4
+g_totle_write_sector:
+	.space	4
+	.section	.bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits
+	.align	1
+.LANCHOR64 = . + 0
+	.type	c_ftl_nand_ext_blk_pre_plane, %object
+	.size	c_ftl_nand_ext_blk_pre_plane, 2
+c_ftl_nand_ext_blk_pre_plane:
+	.space	2
+	.section	.bss.gpNandc1,"aw",%nobits
+	.align	2
+	.type	gpNandc1, %object
+	.size	gpNandc1, 4
+gpNandc1:
+	.space	4
+	.section	.bss.g_in_swl_replace,"aw",%nobits
+	.align	2
+.LANCHOR166 = . + 0
+	.type	g_in_swl_replace, %object
+	.size	g_in_swl_replace, 4
+g_in_swl_replace:
+	.space	4
+	.section	.bss.FlashDdrTunningReadCount,"aw",%nobits
+	.align	2
+.LANCHOR50 = . + 0
+	.type	FlashDdrTunningReadCount, %object
+	.size	FlashDdrTunningReadCount, 4
+FlashDdrTunningReadCount:
+	.space	4
+	.section	.bss.gBootDdrMode,"aw",%nobits
+	.align	2
+.LANCHOR187 = . + 0
+	.type	gBootDdrMode, %object
+	.size	gBootDdrMode, 4
+gBootDdrMode:
+	.space	4
+	.section	.bss.gNandMaxChip,"aw",%nobits
+.LANCHOR17 = . + 0
+	.type	gNandMaxChip, %object
+	.size	gNandMaxChip, 1
+gNandMaxChip:
+	.space	1
+	.section	.bss.c_mlc_erase_count_value,"aw",%nobits
+	.align	1
+.LANCHOR63 = . + 0
+	.type	c_mlc_erase_count_value, %object
+	.size	c_mlc_erase_count_value, 2
+c_mlc_erase_count_value:
+	.space	2
+	.section	.bss.p_map_block_table,"aw",%nobits
+	.align	2
+.LANCHOR122 = . + 0
+	.type	p_map_block_table, %object
+	.size	p_map_block_table, 4
+p_map_block_table:
+	.space	4
+	.section	.data.SamsungRefValue,"aw",%progbits
+.LANCHOR15 = . + 0
+	.type	SamsungRefValue, %object
+	.size	SamsungRefValue, 64
+SamsungRefValue:
+	.byte	-89
+	.byte	-92
+	.byte	-91
+	.byte	-90
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	5
+	.byte	10
+	.byte	0
+	.byte	0
+	.byte	40
+	.byte	0
+	.byte	-20
+	.byte	-40
+	.byte	-19
+	.byte	-11
+	.byte	-19
+	.byte	-26
+	.byte	10
+	.byte	15
+	.byte	5
+	.byte	0
+	.byte	15
+	.byte	10
+	.byte	-5
+	.byte	-20
+	.byte	-24
+	.byte	-17
+	.byte	-24
+	.byte	-36
+	.byte	-15
+	.byte	-5
+	.byte	-2
+	.byte	-16
+	.byte	10
+	.byte	0
+	.byte	-5
+	.byte	-20
+	.byte	-48
+	.byte	-30
+	.byte	-48
+	.byte	-62
+	.byte	20
+	.byte	15
+	.byte	-5
+	.byte	-20
+	.byte	-24
+	.byte	-5
+	.byte	-24
+	.byte	-36
+	.byte	30
+	.byte	20
+	.byte	-5
+	.byte	-20
+	.byte	-5
+	.byte	-1
+	.byte	-5
+	.byte	-8
+	.byte	7
+	.byte	12
+	.byte	2
+	.byte	0
+	.section	.rodata.__func__.8140,"a",%progbits
+.LANCHOR208 = . + 0
+	.type	__func__.8140, %object
+	.size	__func__.8140, 19
+__func__.8140:
+	.ascii	"get_new_active_ppa\000"
+	.section	.data.NandOptPara,"aw",%progbits
+.LANCHOR27 = . + 0
+	.type	NandOptPara, %object
+	.size	NandOptPara, 128
+NandOptPara:
+	.byte	1
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	0
+	.byte	50
+	.byte	17
+	.byte	-128
+	.byte	112
+	.byte	120
+	.byte	120
+	.byte	3
+	.byte	1
+	.byte	0
+	.space	14
+	.byte	2
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	0
+	.byte	0
+	.byte	17
+	.byte	-127
+	.byte	112
+	.byte	-15
+	.byte	-14
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	14
+	.byte	3
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	96
+	.byte	96
+	.byte	17
+	.byte	-127
+	.byte	112
+	.byte	-15
+	.byte	-14
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	14
+	.byte	4
+	.byte	0
+	.byte	49
+	.byte	63
+	.byte	0
+	.byte	49
+	.byte	-128
+	.byte	21
+	.byte	96
+	.byte	96
+	.byte	17
+	.byte	-127
+	.byte	112
+	.byte	112
+	.byte	112
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	14
+	.section	.bss.c_ftl_nand_blks_per_die,"aw",%nobits
+	.align	1
+.LANCHOR66 = . + 0
+	.type	c_ftl_nand_blks_per_die, %object
+	.size	c_ftl_nand_blks_per_die, 2
+c_ftl_nand_blks_per_die:
+	.space	2
+	.section	.rodata.__func__.7364,"a",%progbits
+.LANCHOR233 = . + 0
+	.type	__func__.7364, %object
+	.size	__func__.7364, 10
+__func__.7364:
+	.ascii	"ftl_write\000"
+	.section	.bss.g_totle_read_sector,"aw",%nobits
+	.align	2
+.LANCHOR194 = . + 0
+	.type	g_totle_read_sector, %object
+	.size	g_totle_read_sector, 4
+g_totle_read_sector:
+	.space	4
+	.section	.bss.c_ftl_nand_max_sys_blks,"aw",%nobits
+	.align	2
+.LANCHOR54 = . + 0
+	.type	c_ftl_nand_max_sys_blks, %object
+	.size	c_ftl_nand_max_sys_blks, 4
+c_ftl_nand_max_sys_blks:
+	.space	4
+	.section	.bss.g_slc2KBNand,"aw",%nobits
+.LANCHOR0 = . + 0
+	.type	g_slc2KBNand, %object
+	.size	g_slc2KBNand, 1
+g_slc2KBNand:
+	.space	1
+	.section	.rodata.__func__.7743,"a",%progbits
+.LANCHOR114 = . + 0
+	.type	__func__.7743, %object
+	.size	__func__.7743, 22
+__func__.7743:
+	.ascii	"select_l2p_ram_region\000"
+	.section	.data.Toshiba15RefValue,"aw",%progbits
+.LANCHOR12 = . + 0
+	.type	Toshiba15RefValue, %object
+	.size	Toshiba15RefValue, 95
+Toshiba15RefValue:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	2
+	.byte	4
+	.byte	2
+	.byte	0
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	0
+	.byte	124
+	.byte	124
+	.byte	0
+	.byte	122
+	.byte	0
+	.byte	122
+	.byte	122
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	120
+	.byte	2
+	.byte	120
+	.byte	122
+	.byte	0
+	.byte	126
+	.byte	4
+	.byte	126
+	.byte	122
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	118
+	.byte	4
+	.byte	118
+	.byte	120
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	4
+	.byte	118
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.byte	6
+	.byte	10
+	.byte	6
+	.byte	2
+	.byte	0
+	.byte	116
+	.byte	124
+	.byte	116
+	.byte	118
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.section	.bss.g_gc_next_blk_1,"aw",%nobits
+	.align	1
+.LANCHOR147 = . + 0
+	.type	g_gc_next_blk_1, %object
+	.size	g_gc_next_blk_1, 2
+g_gc_next_blk_1:
+	.space	2
+	.section	.rodata.__func__.7820,"a",%progbits
+.LANCHOR205 = . + 0
+	.type	__func__.7820, %object
+	.size	__func__.7820, 15
+__func__.7820:
+	.ascii	"FtlVpcTblFlush\000"
+	.section	.bss.c_ftl_nand_map_region_num,"aw",%nobits
+	.align	1
+.LANCHOR82 = . + 0
+	.type	c_ftl_nand_map_region_num, %object
+	.size	c_ftl_nand_map_region_num, 2
+c_ftl_nand_map_region_num:
+	.space	2
+	.section	.bss.req_gc,"aw",%nobits
+	.align	2
+.LANCHOR132 = . + 0
+	.type	req_gc, %object
+	.size	req_gc, 4
+req_gc:
+	.space	4
+	.section	.bss.gpNandc,"aw",%nobits
+	.align	2
+.LANCHOR30 = . + 0
+	.type	gpNandc, %object
+	.size	gpNandc, 4
+gpNandc:
+	.space	4
+	.section	.bss.g_totle_vendor_block,"aw",%nobits
+	.align	1
+.LANCHOR85 = . + 0
+	.type	g_totle_vendor_block, %object
+	.size	g_totle_vendor_block, 2
+g_totle_vendor_block:
+	.space	2
+	.section	.bss.p_l2p_ram_map,"aw",%nobits
+	.align	2
+.LANCHOR112 = . + 0
+	.type	p_l2p_ram_map, %object
+	.size	p_l2p_ram_map, 4
+p_l2p_ram_map:
+	.space	4
+	.section	.bss.FlashWaitBusyScheduleEn,"aw",%nobits
+	.align	2
+	.type	FlashWaitBusyScheduleEn, %object
+	.size	FlashWaitBusyScheduleEn, 4
+FlashWaitBusyScheduleEn:
+	.space	4
+	.section	.bss.p_plane_order_table,"aw",%nobits
+.LANCHOR62 = . + 0
+	.type	p_plane_order_table, %object
+	.size	p_plane_order_table, 32
+p_plane_order_table:
+	.space	32
+	.section	.bss.DieCsIndex,"aw",%nobits
+	.align	2
+.LANCHOR19 = . + 0
+	.type	DieCsIndex, %object
+	.size	DieCsIndex, 8
+DieCsIndex:
+	.space	8
+	.section	.bss.g_totle_cache_write_count,"aw",%nobits
+	.align	2
+.LANCHOR158 = . + 0
+	.type	g_totle_cache_write_count, %object
+	.size	g_totle_cache_write_count, 4
+g_totle_cache_write_count:
+	.space	4
+	.section	.bss.g_gc_num_req,"aw",%nobits
+	.align	2
+.LANCHOR128 = . + 0
+	.type	g_gc_num_req, %object
+	.size	g_gc_num_req, 4
+g_gc_num_req:
+	.space	4
+	.section	.bss.c_ftl_nand_byte_pre_oob,"aw",%nobits
+	.align	1
+.LANCHOR74 = . + 0
+	.type	c_ftl_nand_byte_pre_oob, %object
+	.size	c_ftl_nand_byte_pre_oob, 2
+c_ftl_nand_byte_pre_oob:
+	.space	2
+	.section	.bss.g_gc_bad_block_temp_tbl,"aw",%nobits
+	.align	1
+.LANCHOR149 = . + 0
+	.type	g_gc_bad_block_temp_tbl, %object
+	.size	g_gc_bad_block_temp_tbl, 34
+g_gc_bad_block_temp_tbl:
+	.space	34
+	.section	.bss.gFlashSdrModeEn,"aw",%nobits
+	.type	gFlashSdrModeEn, %object
+	.size	gFlashSdrModeEn, 1
+gFlashSdrModeEn:
+	.space	1
+	.section	.bss.p_data_block_list_tail,"aw",%nobits
+	.align	2
+.LANCHOR100 = . + 0
+	.type	p_data_block_list_tail, %object
+	.size	p_data_block_list_tail, 4
+p_data_block_list_tail:
+	.space	4
+	.section	.bss.gFlashInterfaceMode,"aw",%nobits
+.LANCHOR34 = . + 0
+	.type	gFlashInterfaceMode, %object
+	.size	gFlashInterfaceMode, 1
+gFlashInterfaceMode:
+	.space	1
+	.section	.bss.p_map_block_ver_table,"aw",%nobits
+	.align	2
+.LANCHOR123 = . + 0
+	.type	p_map_block_ver_table, %object
+	.size	p_map_block_ver_table, 4
+p_map_block_ver_table:
+	.space	4
+	.section	.bss.gNandcEccBits,"aw",%nobits
+	.align	2
+.LANCHOR36 = . + 0
+	.type	gNandcEccBits, %object
+	.size	gNandcEccBits, 4
+gNandcEccBits:
+	.space	4
+	.section	.data.ToshibaA19RefValue,"aw",%progbits
+.LANCHOR10 = . + 0
+	.type	ToshibaA19RefValue, %object
+	.size	ToshibaA19RefValue, 45
+ToshibaA19RefValue:
+	.byte	4
+	.byte	5
+	.byte	6
+	.byte	7
+	.byte	13
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	4
+	.byte	4
+	.byte	124
+	.byte	126
+	.byte	0
+	.byte	0
+	.byte	124
+	.byte	120
+	.byte	120
+	.byte	0
+	.byte	124
+	.byte	118
+	.byte	116
+	.byte	114
+	.byte	0
+	.byte	8
+	.byte	8
+	.byte	0
+	.byte	0
+	.byte	0
+	.byte	11
+	.byte	126
+	.byte	118
+	.byte	116
+	.byte	0
+	.byte	16
+	.byte	118
+	.byte	114
+	.byte	112
+	.byte	0
+	.byte	2
+	.byte	0
+	.byte	126
+	.byte	124
+	.byte	0
+	.section	.bss.g_totle_swl_count,"aw",%nobits
+	.align	2
+.LANCHOR136 = . + 0
+	.type	g_totle_swl_count, %object
+	.size	g_totle_swl_count, 4
+g_totle_swl_count:
+	.space	4
+	.section	.bss.gBbtInfo,"aw",%nobits
+	.align	2
+.LANCHOR89 = . + 0
+	.type	gBbtInfo, %object
+	.size	gBbtInfo, 60
+gBbtInfo:
+	.space	60
+	.section	.bss.c_ftl_nand_byte_pre_page,"aw",%nobits
+	.align	1
+.LANCHOR73 = . + 0
+	.type	c_ftl_nand_byte_pre_page, %object
+	.size	c_ftl_nand_byte_pre_page, 2
+c_ftl_nand_byte_pre_page:
+	.space	2
+	.section	.bss.g_power_lost_recovery_flag,"aw",%nobits
+	.align	1
+.LANCHOR224 = . + 0
+	.type	g_power_lost_recovery_flag, %object
+	.size	g_power_lost_recovery_flag, 2
+g_power_lost_recovery_flag:
+	.space	2
+	.section	.bss.gNandIDBResBlkNum,"aw",%nobits
+.LANCHOR1 = . + 0
+	.type	gNandIDBResBlkNum, %object
+	.size	gNandIDBResBlkNum, 1
+gNandIDBResBlkNum:
+	.space	1
+	.section	.bss.gNandcDumpWriteEn,"aw",%nobits
+	.align	2
+.LANCHOR39 = . + 0
+	.type	gNandcDumpWriteEn, %object
+	.size	gNandcDumpWriteEn, 4
+gNandcDumpWriteEn:
+	.space	4
+	.section	.bss.gFlashProgCheckSpareBuffer,"aw",%nobits
+	.align	2
+.LANCHOR204 = . + 0
+	.type	gFlashProgCheckSpareBuffer, %object
+	.size	gFlashProgCheckSpareBuffer, 4
+gFlashProgCheckSpareBuffer:
+	.space	4
+	.section	.bss.g_tmp_data_superblock_id,"aw",%nobits
+	.align	1
+.LANCHOR135 = . + 0
+	.type	g_tmp_data_superblock_id, %object
+	.size	g_tmp_data_superblock_id, 2
+g_tmp_data_superblock_id:
+	.space	2
+	.section	.bss.c_ftl_nand_totle_phy_blks,"aw",%nobits
+	.align	2
+.LANCHOR58 = . + 0
+	.type	c_ftl_nand_totle_phy_blks, %object
+	.size	c_ftl_nand_totle_phy_blks, 4
+c_ftl_nand_totle_phy_blks:
+	.space	4
+	.section	.bss.p_map_region_ppn_table,"aw",%nobits
+	.align	2
+.LANCHOR124 = . + 0
+	.type	p_map_region_ppn_table, %object
+	.size	p_map_region_ppn_table, 4
+p_map_region_ppn_table:
+	.space	4
+	.section	.bss.g_gc_cur_blk_valid_pages,"aw",%nobits
+	.align	1
+.LANCHOR229 = . + 0
+	.type	g_gc_cur_blk_valid_pages, %object
+	.size	g_gc_cur_blk_valid_pages, 2
+g_gc_cur_blk_valid_pages:
+	.space	2
+	.section	.bss.p_gc_page_info,"aw",%nobits
+	.align	2
+.LANCHOR145 = . + 0
+	.type	p_gc_page_info, %object
+	.size	p_gc_page_info, 4
+p_gc_page_info:
+	.space	4
+	.section	.bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits
+	.align	1
+.LANCHOR83 = . + 0
+	.type	c_ftl_nand_l2pmap_ram_region_num, %object
+	.size	c_ftl_nand_l2pmap_ram_region_num, 2
+c_ftl_nand_l2pmap_ram_region_num:
+	.space	2
+	.section	.bss.gc_discard_updated,"aw",%nobits
+	.align	2
+.LANCHOR221 = . + 0
+	.type	gc_discard_updated, %object
+	.size	gc_discard_updated, 4
+gc_discard_updated:
+	.space	4
+	.section	.rodata.__func__.7759,"a",%progbits
+.LANCHOR215 = . + 0
+	.type	__func__.7759, %object
+	.size	__func__.7759, 9
+__func__.7759:
+	.ascii	"log2phys\000"
+	.section	.bss.g_ect_tbl_info_size,"aw",%nobits
+	.align	1
+.LANCHOR182 = . + 0
+	.type	g_ect_tbl_info_size, %object
+	.size	g_ect_tbl_info_size, 2
+g_ect_tbl_info_size:
+	.space	2
+	.section	.bss.g_all_blk_used_slc_mode,"aw",%nobits
+	.align	2
+.LANCHOR152 = . + 0
+	.type	g_all_blk_used_slc_mode, %object
+	.size	g_all_blk_used_slc_mode, 4
+g_all_blk_used_slc_mode:
+	.space	4
+	.section	.rodata.__func__.8040,"a",%progbits
+.LANCHOR125 = . + 0
+	.type	__func__.8040, %object
+	.size	__func__.8040, 16
+__func__.8040:
+	.ascii	"make_superblock\000"
+	.section	.bss.c_ftl_nand_vendor_region_num,"aw",%nobits
+	.align	1
+.LANCHOR78 = . + 0
+	.type	c_ftl_nand_vendor_region_num, %object
+	.size	c_ftl_nand_vendor_region_num, 2
+c_ftl_nand_vendor_region_num:
+	.space	2
+	.section	.bss.g_ftl_nand_free_count,"aw",%nobits
+	.align	2
+.LANCHOR232 = . + 0
+	.type	g_ftl_nand_free_count, %object
+	.size	g_ftl_nand_free_count, 4
+g_ftl_nand_free_count:
+	.space	4
+	.section	.data.ToshibaRefValue,"aw",%progbits
+.LANCHOR13 = . + 0
+	.type	ToshibaRefValue, %object
+	.size	ToshibaRefValue, 8
+ToshibaRefValue:
+	.byte	0
+	.byte	4
+	.byte	124
+	.byte	120
+	.byte	116
+	.byte	8
+	.byte	12
+	.byte	112
+	.section	.bss.g_l2p_last_update_region_id,"aw",%nobits
+	.align	1
+.LANCHOR113 = . + 0
+	.type	g_l2p_last_update_region_id, %object
+	.size	g_l2p_last_update_region_id, 2
+g_l2p_last_update_region_id:
+	.space	2
+	.section	.bss.g_gc_page_offset,"aw",%nobits
+	.align	1
+.LANCHOR144 = . + 0
+	.type	g_gc_page_offset, %object
+	.size	g_gc_page_offset, 2
+g_gc_page_offset:
+	.space	2
+	.section	.rodata.__func__.8060,"a",%progbits
+.LANCHOR127 = . + 0
+	.type	__func__.8060, %object
+	.size	__func__.8060, 18
+__func__.8060:
+	.ascii	"SupperBlkListInit\000"
+	.section	.bss.g_gc_blk_num,"aw",%nobits
+	.align	1
+.LANCHOR142 = . + 0
+	.type	g_gc_blk_num, %object
+	.size	g_gc_blk_num, 2
+g_gc_blk_num:
+	.space	2
+	.section	.bss.c_ftl_nand_max_map_blks,"aw",%nobits
+	.align	2
+.LANCHOR80 = . + 0
+	.type	c_ftl_nand_max_map_blks, %object
+	.size	c_ftl_nand_max_map_blks, 4
+c_ftl_nand_max_map_blks:
+	.space	4
+	.section	.bss.g_totle_read_page_count,"aw",%nobits
+	.align	2
+.LANCHOR160 = . + 0
+	.type	g_totle_read_page_count, %object
+	.size	g_totle_read_page_count, 4
+g_totle_read_page_count:
+	.space	4
+	.section	.rodata.__func__.7648,"a",%progbits
+.LANCHOR110 = . + 0
+	.type	__func__.7648, %object
+	.size	__func__.7648, 22
+__func__.7648:
+	.ascii	"List_update_data_list\000"
+	.section	.bss.p_swl_mul_table,"aw",%nobits
+	.align	2
+.LANCHOR139 = . + 0
+	.type	p_swl_mul_table, %object
+	.size	p_swl_mul_table, 4
+p_swl_mul_table:
+	.space	4
+	.section	.bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits
+	.align	2
+.LANCHOR137 = . + 0
+	.type	ftl_gc_temp_power_lost_recovery_flag, %object
+	.size	ftl_gc_temp_power_lost_recovery_flag, 4
+ftl_gc_temp_power_lost_recovery_flag:
+	.space	4
+	.section	.bss.p_vendor_data_buf,"aw",%nobits
+	.align	2
+.LANCHOR177 = . + 0
+	.type	p_vendor_data_buf, %object
+	.size	p_vendor_data_buf, 4
+p_vendor_data_buf:
+	.space	4
+	.section	.data.gc_tmp_blk_bops_scan_addr,"aw",%progbits
+	.align	1
+.LANCHOR190 = . + 0
+	.type	gc_tmp_blk_bops_scan_addr, %object
+	.size	gc_tmp_blk_bops_scan_addr, 2
+gc_tmp_blk_bops_scan_addr:
+	.short	-1
+	.section	.rodata.__func__.8315,"a",%progbits
+.LANCHOR231 = . + 0
+	.type	__func__.8315, %object
+	.size	__func__.8315, 23
+__func__.8315:
+	.ascii	"rk_ftl_garbage_collect\000"
+	.section	.bss.p_vendor_region_ppn_table,"aw",%nobits
+	.align	2
+.LANCHOR186 = . + 0
+	.type	p_vendor_region_ppn_table, %object
+	.size	p_vendor_region_ppn_table, 4
+p_vendor_region_ppn_table:
+	.space	4
+	.section	.bss.p_map_block_valid_page_count,"aw",%nobits
+	.align	2
+.LANCHOR118 = . + 0
+	.type	p_map_block_valid_page_count, %object
+	.size	p_map_block_valid_page_count, 4
+p_map_block_valid_page_count:
+	.space	4
+	.section	.bss.req_prgm,"aw",%nobits
+	.align	2
+.LANCHOR175 = . + 0
+	.type	req_prgm, %object
+	.size	req_prgm, 4
+req_prgm:
+	.space	4
+	.section	.bss.g_totle_l2p_write_count,"aw",%nobits
+	.align	2
+.LANCHOR159 = . + 0
+	.type	g_totle_l2p_write_count, %object
+	.size	g_totle_l2p_write_count, 4
+g_totle_l2p_write_count:
+	.space	4
+	.section	.bss.g_num_data_superblocks,"aw",%nobits
+	.align	1
+.LANCHOR101 = . + 0
+	.type	g_num_data_superblocks, %object
+	.size	g_num_data_superblocks, 2
+g_num_data_superblocks:
+	.space	2
+	.section	.bss.c_ftl_nand_blk_pre_plane,"aw",%nobits
+	.align	1
+.LANCHOR56 = . + 0
+	.type	c_ftl_nand_blk_pre_plane, %object
+	.size	c_ftl_nand_blk_pre_plane, 2
+c_ftl_nand_blk_pre_plane:
+	.space	2
+	.section	.bss.g_gc_head_data_block,"aw",%nobits
+	.align	2
+.LANCHOR167 = . + 0
+	.type	g_gc_head_data_block, %object
+	.size	g_gc_head_data_block, 4
+g_gc_head_data_block:
+	.space	4
+	.section	.bss.g_totle_slc_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR162 = . + 0
+	.type	g_totle_slc_erase_count, %object
+	.size	g_totle_slc_erase_count, 4
+g_totle_slc_erase_count:
+	.space	4
+	.section	.rodata.__func__.7685,"a",%progbits
+.LANCHOR111 = . + 0
+	.type	__func__.7685, %object
+	.size	__func__.7685, 26
+__func__.7685:
+	.ascii	"ftl_map_blk_alloc_new_blk\000"
+	.section	.bss.req_gc_dst,"aw",%nobits
+	.align	2
+.LANCHOR174 = . + 0
+	.type	req_gc_dst, %object
+	.size	req_gc_dst, 4
+req_gc_dst:
+	.space	4
+	.section	.bss.req_read,"aw",%nobits
+	.align	2
+.LANCHOR173 = . + 0
+	.type	req_read, %object
+	.size	req_read, 4
+req_read:
+	.space	4
+	.section	.bss.g_totle_avg_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR195 = . + 0
+	.type	g_totle_avg_erase_count, %object
+	.size	g_totle_avg_erase_count, 4
+g_totle_avg_erase_count:
+	.space	4
+	.section	.bss.c_ftl_nand_planes_per_die,"aw",%nobits
+	.align	1
+.LANCHOR61 = . + 0
+	.type	c_ftl_nand_planes_per_die, %object
+	.size	c_ftl_nand_planes_per_die, 2
+c_ftl_nand_planes_per_die:
+	.space	2
+	.section	.rodata.__func__.7427,"a",%progbits
+.LANCHOR91 = . + 0
+	.type	__func__.7427, %object
+	.size	__func__.7427, 14
+__func__.7427:
+	.ascii	"FtlBbt2Bitmap\000"
+	.section	.bss.g_gc_merge_free_blk_threshold,"aw",%nobits
+	.align	1
+.LANCHOR171 = . + 0
+	.type	g_gc_merge_free_blk_threshold, %object
+	.size	g_gc_merge_free_blk_threshold, 2
+g_gc_merge_free_blk_threshold:
+	.space	2
+	.section	.rodata.__func__.7986,"a",%progbits
+.LANCHOR223 = . + 0
+	.type	__func__.7986, %object
+	.size	__func__.7986, 22
+__func__.7986:
+	.ascii	"FtlRecoverySuperblock\000"
+	.section	.bss.g_MaxLpn,"aw",%nobits
+	.align	2
+.LANCHOR87 = . + 0
+	.type	g_MaxLpn, %object
+	.size	g_MaxLpn, 4
+g_MaxLpn:
+	.space	4
+	.section	.bss.gpNandParaInfo,"aw",%nobits
+	.align	2
+.LANCHOR23 = . + 0
+	.type	gpNandParaInfo, %object
+	.size	gpNandParaInfo, 4
+gpNandParaInfo:
+	.space	4
+	.section	.bss.g_LowFormat,"aw",%nobits
+	.align	2
+.LANCHOR227 = . + 0
+	.type	g_LowFormat, %object
+	.size	g_LowFormat, 4
+g_LowFormat:
+	.space	4
+	.section	.bss.c_ftl_nand_type,"aw",%nobits
+	.align	1
+.LANCHOR59 = . + 0
+	.type	c_ftl_nand_type, %object
+	.size	c_ftl_nand_type, 2
+c_ftl_nand_type:
+	.space	2
+	.section	.bss.gSysFreeQueue,"aw",%nobits
+	.align	1
+.LANCHOR92 = . + 0
+	.type	gSysFreeQueue, %object
+	.size	gSysFreeQueue, 2056
+gSysFreeQueue:
+	.space	2056
+	.section	.bss.slcPageToMlcPageTbl,"aw",%nobits
+	.align	2
+.LANCHOR8 = . + 0
+	.type	slcPageToMlcPageTbl, %object
+	.size	slcPageToMlcPageTbl, 512
+slcPageToMlcPageTbl:
+	.space	512
+	.section	.bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits
+	.align	2
+.LANCHOR52 = . + 0
+	.type	c_ftl_nand_sys_blks_per_plane, %object
+	.size	c_ftl_nand_sys_blks_per_plane, 4
+c_ftl_nand_sys_blks_per_plane:
+	.space	4
+	.section	.bss.g_buffer_superblock,"aw",%nobits
+	.align	2
+.LANCHOR108 = . + 0
+	.type	g_buffer_superblock, %object
+	.size	g_buffer_superblock, 48
+g_buffer_superblock:
+	.space	48
+	.section	.bss.p_sys_data_buf,"aw",%nobits
+	.align	2
+.LANCHOR96 = . + 0
+	.type	p_sys_data_buf, %object
+	.size	p_sys_data_buf, 4
+p_sys_data_buf:
+	.space	4
+	.section	.bss.c_ftl_nand_reserved_blks,"aw",%nobits
+	.align	1
+.LANCHOR75 = . + 0
+	.type	c_ftl_nand_reserved_blks, %object
+	.size	c_ftl_nand_reserved_blks, 2
+c_ftl_nand_reserved_blks:
+	.space	2
+	.section	.bss.g_maxRegNum,"aw",%nobits
+.LANCHOR14 = . + 0
+	.type	g_maxRegNum, %object
+	.size	g_maxRegNum, 1
+g_maxRegNum:
+	.space	1
+	.section	.bss.p_gc_spare_buf,"aw",%nobits
+	.align	2
+.LANCHOR130 = . + 0
+	.type	p_gc_spare_buf, %object
+	.size	p_gc_spare_buf, 4
+p_gc_spare_buf:
+	.space	4
+	.section	.bss.gFlashProgCheckBuffer,"aw",%nobits
+	.align	2
+.LANCHOR203 = . + 0
+	.type	gFlashProgCheckBuffer, %object
+	.size	gFlashProgCheckBuffer, 4
+gFlashProgCheckBuffer:
+	.space	4
+	.section	.bss.gNandFlashInfoBlockAddr,"aw",%nobits
+	.align	2
+.LANCHOR47 = . + 0
+	.type	gNandFlashInfoBlockAddr, %object
+	.size	gNandFlashInfoBlockAddr, 4
+gNandFlashInfoBlockAddr:
+	.space	4
+	.section	.bss.p_valid_page_count_check_table,"aw",%nobits
+	.align	2
+	.type	p_valid_page_count_check_table, %object
+	.size	p_valid_page_count_check_table, 4
+p_valid_page_count_check_table:
+	.space	4
+	.section	.bss.p_io_spare_buf,"aw",%nobits
+	.align	2
+.LANCHOR181 = . + 0
+	.type	p_io_spare_buf, %object
+	.size	p_io_spare_buf, 4
+p_io_spare_buf:
+	.space	4
+	.section	.bss.c_ftl_vendor_part_size,"aw",%nobits
+	.align	1
+.LANCHOR65 = . + 0
+	.type	c_ftl_vendor_part_size, %object
+	.size	c_ftl_vendor_part_size, 2
+c_ftl_vendor_part_size:
+	.space	2
+	.section	.bss.c_ftl_nand_planes_num,"aw",%nobits
+	.align	1
+.LANCHOR53 = . + 0
+	.type	c_ftl_nand_planes_num, %object
+	.size	c_ftl_nand_planes_num, 2
+c_ftl_nand_planes_num:
+	.space	2
+	.section	.bss.p_io_data_buf_0,"aw",%nobits
+	.align	2
+.LANCHOR178 = . + 0
+	.type	p_io_data_buf_0, %object
+	.size	p_io_data_buf_0, 4
+p_io_data_buf_0:
+	.space	4
+	.section	.bss.p_io_data_buf_1,"aw",%nobits
+	.align	2
+.LANCHOR179 = . + 0
+	.type	p_io_data_buf_1, %object
+	.size	p_io_data_buf_1, 4
+p_io_data_buf_1:
+	.space	4
+	.section	.data.power_up_flag,"aw",%progbits
+	.align	2
+	.type	power_up_flag, %object
+	.size	power_up_flag, 4
+power_up_flag:
+	.word	1
+	.section	.bss.gFlashOnfiModeEn,"aw",%nobits
+	.type	gFlashOnfiModeEn, %object
+	.size	gFlashOnfiModeEn, 1
+gFlashOnfiModeEn:
+	.space	1
+	.section	.bss.g_totle_write_page_count,"aw",%nobits
+	.align	2
+.LANCHOR156 = . + 0
+	.type	g_totle_write_page_count, %object
+	.size	g_totle_write_page_count, 4
+g_totle_write_page_count:
+	.space	4
+	.section	.bss.g_totle_gc_page_count,"aw",%nobits
+	.align	2
+.LANCHOR155 = . + 0
+	.type	g_totle_gc_page_count, %object
+	.size	g_totle_gc_page_count, 4
+g_totle_gc_page_count:
+	.space	4
+	.section	.bss.g_min_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR164 = . + 0
+	.type	g_min_erase_count, %object
+	.size	g_min_erase_count, 4
+g_min_erase_count:
+	.space	4
+	.section	.bss.FtlUpdateVaildLpnCount,"aw",%nobits
+	.align	1
+.LANCHOR115 = . + 0
+	.type	FtlUpdateVaildLpnCount, %object
+	.size	FtlUpdateVaildLpnCount, 2
+FtlUpdateVaildLpnCount:
+	.space	2
+	.section	.bss.g_cur_erase_blk,"aw",%nobits
+	.align	2
+.LANCHOR88 = . + 0
+	.type	g_cur_erase_blk, %object
+	.size	g_cur_erase_blk, 4
+g_cur_erase_blk:
+	.space	4
+	.section	.bss.g_in_gc_progress,"aw",%nobits
+	.align	2
+.LANCHOR165 = . + 0
+	.type	g_in_gc_progress, %object
+	.size	g_in_gc_progress, 4
+g_in_gc_progress:
+	.space	4
+	.section	.bss.gNandChipMap,"aw",%nobits
+	.align	2
+.LANCHOR5 = . + 0
+	.type	gNandChipMap, %object
+	.size	gNandChipMap, 32
+gNandChipMap:
+	.space	32
+	.section	.bss.gFlashPageBuffer1,"aw",%nobits
+	.align	2
+.LANCHOR41 = . + 0
+	.type	gFlashPageBuffer1, %object
+	.size	gFlashPageBuffer1, 4
+gFlashPageBuffer1:
+	.space	4
+	.section	.bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits
+	.align	2
+.LANCHOR81 = . + 0
+	.type	c_ftl_nand_init_sys_blks_per_plane, %object
+	.size	c_ftl_nand_init_sys_blks_per_plane, 4
+c_ftl_nand_init_sys_blks_per_plane:
+	.space	4
+	.section	.rodata.__func__.8151,"a",%progbits
+.LANCHOR206 = . + 0
+	.type	__func__.8151, %object
+	.size	__func__.8151, 16
+__func__.8151:
+	.ascii	"update_vpc_list\000"
+	.section	.bss.p_free_data_block_list_head,"aw",%nobits
+	.align	2
+.LANCHOR103 = . + 0
+	.type	p_free_data_block_list_head, %object
+	.size	p_free_data_block_list_head, 4
+p_free_data_block_list_head:
+	.space	4
+	.section	.bss.gNandIDataBuf,"aw",%nobits
+	.align	2
+.LANCHOR25 = . + 0
+	.type	gNandIDataBuf, %object
+	.size	gNandIDataBuf, 2048
+gNandIDataBuf:
+	.space	2048
+	.section	.bss.gNandFlashIDBEccBits,"aw",%nobits
+.LANCHOR45 = . + 0
+	.type	gNandFlashIDBEccBits, %object
+	.size	gNandFlashIDBEccBits, 1
+gNandFlashIDBEccBits:
+	.space	1
+	.section	.bss.gNandPhyInfo,"aw",%nobits
+	.align	2
+.LANCHOR28 = . + 0
+	.type	gNandPhyInfo, %object
+	.size	gNandPhyInfo, 28
+gNandPhyInfo:
+	.space	28
+	.section	.bss.gSysInfo,"aw",%nobits
+	.align	2
+.LANCHOR191 = . + 0
+	.type	gSysInfo, %object
+	.size	gSysInfo, 12
+gSysInfo:
+	.space	12
+	.section	.bss.gMultiPageReadEn,"aw",%nobits
+.LANCHOR189 = . + 0
+	.type	gMultiPageReadEn, %object
+	.size	gMultiPageReadEn, 1
+gMultiPageReadEn:
+	.space	1
+	.section	.bss.g_gc_blk_index,"aw",%nobits
+	.align	1
+.LANCHOR172 = . + 0
+	.type	g_gc_blk_index, %object
+	.size	g_gc_blk_index, 2
+g_gc_blk_index:
+	.space	2
+	.section	.bss.g_gc_free_blk_threshold,"aw",%nobits
+	.align	1
+.LANCHOR170 = . + 0
+	.type	g_gc_free_blk_threshold, %object
+	.size	g_gc_free_blk_threshold, 2
+g_gc_free_blk_threshold:
+	.space	2
+	.section	.bss.g_max_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR163 = . + 0
+	.type	g_max_erase_count, %object
+	.size	g_max_erase_count, 4
+g_max_erase_count:
+	.space	4
+	.section	.bss.gVendorBlkInfo,"aw",%nobits
+	.align	2
+.LANCHOR213 = . + 0
+	.type	gVendorBlkInfo, %object
+	.size	gVendorBlkInfo, 40
+gVendorBlkInfo:
+	.space	40
+	.section	.bss.g_GlobalDataVersion,"aw",%nobits
+	.align	2
+.LANCHOR154 = . + 0
+	.type	g_GlobalDataVersion, %object
+	.size	g_GlobalDataVersion, 4
+g_GlobalDataVersion:
+	.space	4
+	.section	.bss.gp_last_act_superblock,"aw",%nobits
+	.align	2
+.LANCHOR219 = . + 0
+	.type	gp_last_act_superblock, %object
+	.size	gp_last_act_superblock, 4
+gp_last_act_superblock:
+	.space	4
+	.section	.bss.c_ftl_nand_max_vendor_blks,"aw",%nobits
+	.align	1
+.LANCHOR77 = . + 0
+	.type	c_ftl_nand_max_vendor_blks, %object
+	.size	c_ftl_nand_max_vendor_blks, 2
+c_ftl_nand_max_vendor_blks:
+	.space	2
+	.section	.data.random_seed,"aw",%progbits
+	.align	1
+.LANCHOR3 = . + 0
+	.type	random_seed, %object
+	.size	random_seed, 256
+random_seed:
+	.short	22378
+	.short	1512
+	.short	25245
+	.short	17827
+	.short	25756
+	.short	19440
+	.short	9026
+	.short	10030
+	.short	29528
+	.short	20467
+	.short	29676
+	.short	24432
+	.short	31328
+	.short	6872
+	.short	13426
+	.short	13842
+	.short	8783
+	.short	1108
+	.short	782
+	.short	28837
+	.short	30729
+	.short	9505
+	.short	18676
+	.short	23085
+	.short	18730
+	.short	1085
+	.short	32609
+	.short	14697
+	.short	20858
+	.short	15170
+	.short	30365
+	.short	1607
+	.short	32298
+	.short	4995
+	.short	18905
+	.short	1976
+	.short	9592
+	.short	20204
+	.short	17443
+	.short	13615
+	.short	23330
+	.short	29369
+	.short	13947
+	.short	9398
+	.short	32398
+	.short	8984
+	.short	27600
+	.short	21785
+	.short	6019
+	.short	6311
+	.short	31598
+	.short	30210
+	.short	19327
+	.short	13896
+	.short	11347
+	.short	27545
+	.short	3107
+	.short	26575
+	.short	32270
+	.short	19852
+	.short	20601
+	.short	8349
+	.short	9290
+	.short	29819
+	.short	13579
+	.short	3661
+	.short	28676
+	.short	27331
+	.short	32574
+	.short	8693
+	.short	31253
+	.short	9081
+	.short	5399
+	.short	6842
+	.short	20087
+	.short	5537
+	.short	1274
+	.short	11617
+	.short	9530
+	.short	4866
+	.short	8035
+	.short	23219
+	.short	1178
+	.short	23272
+	.short	7383
+	.short	18944
+	.short	12488
+	.short	12871
+	.short	29340
+	.short	20532
+	.short	11022
+	.short	22514
+	.short	228
+	.short	22363
+	.short	24978
+	.short	14584
+	.short	12138
+	.short	3092
+	.short	17916
+	.short	16863
+	.short	14554
+	.short	31457
+	.short	29474
+	.short	25311
+	.short	24121
+	.short	3684
+	.short	28037
+	.short	22865
+	.short	22839
+	.short	25217
+	.short	13217
+	.short	27186
+	.short	14938
+	.short	11180
+	.short	29754
+	.short	24180
+	.short	15150
+	.short	32455
+	.short	20434
+	.short	23848
+	.short	29983
+	.short	16120
+	.short	14769
+	.short	20041
+	.short	29803
+	.short	28406
+	.short	17598
+	.short	28087
+	.section	.bss.c_ftl_nand_sec_pre_page,"aw",%nobits
+	.align	1
+.LANCHOR71 = . + 0
+	.type	c_ftl_nand_sec_pre_page, %object
+	.size	c_ftl_nand_sec_pre_page, 2
+c_ftl_nand_sec_pre_page:
+	.space	2
+	.section	.bss.gNandMaxDie,"aw",%nobits
+.LANCHOR16 = . + 0
+	.type	gNandMaxDie, %object
+	.size	gNandMaxDie, 1
+gNandMaxDie:
+	.space	1
+	.section	.rodata.__func__.7708,"a",%progbits
+.LANCHOR211 = . + 0
+	.type	__func__.7708, %object
+	.size	__func__.7708, 31
+__func__.7708:
+	.ascii	"Ftl_write_map_blk_to_last_page\000"
+	.section	.bss.p_gc_data_buf,"aw",%nobits
+	.align	2
+.LANCHOR129 = . + 0
+	.type	p_gc_data_buf, %object
+	.size	p_gc_data_buf, 4
+p_gc_data_buf:
+	.space	4
+	.section	.rodata.__func__.7953,"a",%progbits
+.LANCHOR216 = . + 0
+	.type	__func__.7953, %object
+	.size	__func__.7953, 16
+__func__.7953:
+	.ascii	"FtlReUsePrevPpa\000"
+	.section	.bss.g_MaxLbaSector,"aw",%nobits
+	.align	2
+.LANCHOR84 = . + 0
+	.type	g_MaxLbaSector, %object
+	.size	g_MaxLbaSector, 4
+g_MaxLbaSector:
+	.space	4
+	.section	.bss.p_erase_count_table,"aw",%nobits
+	.align	2
+.LANCHOR94 = . + 0
+	.type	p_erase_count_table, %object
+	.size	p_erase_count_table, 4
+p_erase_count_table:
+	.space	4
+	.section	.bss.p_vendor_block_table,"aw",%nobits
+	.align	2
+.LANCHOR86 = . + 0
+	.type	p_vendor_block_table, %object
+	.size	p_vendor_block_table, 4
+p_vendor_block_table:
+	.space	4
+	.section	.bss.p_data_block_list_head,"aw",%nobits
+	.align	2
+.LANCHOR98 = . + 0
+	.type	p_data_block_list_head, %object
+	.size	p_data_block_list_head, 4
+p_data_block_list_head:
+	.space	4
+	.section	.bss.gNandOptPara,"aw",%nobits
+.LANCHOR6 = . + 0
+	.type	gNandOptPara, %object
+	.size	gNandOptPara, 32
+gNandOptPara:
+	.space	32
+	.section	.bss.g_sys_save_data,"aw",%nobits
+	.align	2
+.LANCHOR140 = . + 0
+	.type	g_sys_save_data, %object
+	.size	g_sys_save_data, 48
+g_sys_save_data:
+	.space	48
+	.section	.bss.g_VaildLpn,"aw",%nobits
+	.align	2
+.LANCHOR116 = . + 0
+	.type	g_VaildLpn, %object
+	.size	g_VaildLpn, 4
+g_VaildLpn:
+	.space	4
+	.section	.bss.g_recovery_page_num,"aw",%nobits
+	.align	2
+.LANCHOR225 = . + 0
+	.type	g_recovery_page_num, %object
+	.size	g_recovery_page_num, 4
+g_recovery_page_num:
+	.space	4
+	.section	.bss.gTotleBlock,"aw",%nobits
+	.align	1
+.LANCHOR24 = . + 0
+	.type	gTotleBlock, %object
+	.size	gTotleBlock, 2
+gTotleBlock:
+	.space	2
+	.section	.rodata.__func__.7695,"a",%progbits
+.LANCHOR210 = . + 0
+	.type	__func__.7695, %object
+	.size	__func__.7695, 15
+__func__.7695:
+	.ascii	"ftl_map_blk_gc\000"
+	.section	.bss.IDByte,"aw",%nobits
+	.align	2
+.LANCHOR22 = . + 0
+	.type	IDByte, %object
+	.size	IDByte, 32
+IDByte:
+	.space	32
+	.section	.bss.g_gc_temp_superblock,"aw",%nobits
+	.align	2
+.LANCHOR109 = . + 0
+	.type	g_gc_temp_superblock, %object
+	.size	g_gc_temp_superblock, 48
+g_gc_temp_superblock:
+	.space	48
+	.section	.bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits
+	.align	1
+.LANCHOR69 = . + 0
+	.type	c_ftl_nand_page_pre_slc_blk, %object
+	.size	c_ftl_nand_page_pre_slc_blk, 2
+c_ftl_nand_page_pre_slc_blk:
+	.space	2
+	.section	.bss.gBlockPageAlignSize,"aw",%nobits
+	.align	2
+.LANCHOR2 = . + 0
+	.type	gBlockPageAlignSize, %object
+	.size	gBlockPageAlignSize, 4
+gBlockPageAlignSize:
+	.space	4
+	.section	.bss.g_gc_superblock,"aw",%nobits
+	.align	2
+.LANCHOR201 = . + 0
+	.type	g_gc_superblock, %object
+	.size	g_gc_superblock, 48
+g_gc_superblock:
+	.space	48
+	.section	.bss.g_totle_sys_slc_erase_count,"aw",%nobits
+	.align	2
+.LANCHOR95 = . + 0
+	.type	g_totle_sys_slc_erase_count, %object
+	.size	g_totle_sys_slc_erase_count, 4
+g_totle_sys_slc_erase_count:
+	.space	4
+	.section	.bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits
+	.align	1
+.LANCHOR67 = . + 0
+	.type	c_ftl_nand_blks_per_die_shift, %object
+	.size	c_ftl_nand_blks_per_die_shift, 2
+c_ftl_nand_blks_per_die_shift:
+	.space	2
+	.section	.rodata.__func__.8156,"a",%progbits
+.LANCHOR207 = . + 0
+	.type	__func__.8156, %object
+	.size	__func__.8156, 20
+__func__.8156:
+	.ascii	"decrement_vpc_count\000"
+	.section	.bss.g_SlcPartLbaEndSector,"aw",%nobits
+	.align	2
+.LANCHOR151 = . + 0
+	.type	g_SlcPartLbaEndSector, %object
+	.size	g_SlcPartLbaEndSector, 4
+g_SlcPartLbaEndSector:
+	.space	4
+	.section	.bss.g_totle_discard_page_count,"aw",%nobits
+	.align	2
+.LANCHOR157 = . + 0
+	.type	g_totle_discard_page_count, %object
+	.size	g_totle_discard_page_count, 4
+g_totle_discard_page_count:
+	.space	4
+	.section	.bss.c_ftl_nand_bbm_buf_size,"aw",%nobits
+	.align	1
+.LANCHOR90 = . + 0
+	.type	c_ftl_nand_bbm_buf_size, %object
+	.size	c_ftl_nand_bbm_buf_size, 2
+c_ftl_nand_bbm_buf_size:
+	.space	2
+	.section	.bss.gL2pMapInfo,"aw",%nobits
+	.align	2
+.LANCHOR120 = . + 0
+	.type	gL2pMapInfo, %object
+	.size	gL2pMapInfo, 40
+gL2pMapInfo:
+	.space	40
+	.section	.bss.g_gc_head_data_block_count,"aw",%nobits
+	.align	2
+.LANCHOR168 = . + 0
+	.type	g_gc_head_data_block_count, %object
+	.size	g_gc_head_data_block_count, 4
+g_gc_head_data_block_count:
+	.space	4
+	.section	.rodata.__func__.7338,"a",%progbits
+.LANCHOR218 = . + 0
+	.type	__func__.7338, %object
+	.size	__func__.7338, 13
+__func__.7338:
+	.ascii	"FtlProgPages\000"
+	.section	.bss.gFlashPageBuffer0,"aw",%nobits
+	.align	2
+.LANCHOR44 = . + 0
+	.type	gFlashPageBuffer0, %object
+	.size	gFlashPageBuffer0, 4
+gFlashPageBuffer0:
+	.space	4
+	.section	.bss.g_req_cache,"aw",%nobits
+	.align	2
+.LANCHOR134 = . + 0
+	.type	g_req_cache, %object
+	.size	g_req_cache, 4
+g_req_cache:
+	.space	4
+	.section	.data.gFtlInitStatus,"aw",%progbits
+	.align	2
+.LANCHOR222 = . + 0
+	.type	gFtlInitStatus, %object
+	.size	gFtlInitStatus, 4
+gFtlInitStatus:
+	.word	-1
+	.section	.bss.c_gc_page_buf_num,"aw",%nobits
+	.align	2
+.LANCHOR133 = . + 0
+	.type	c_gc_page_buf_num, %object
+	.size	c_gc_page_buf_num, 4
+c_gc_page_buf_num:
+	.space	4
+	.section	.data.NandFlashParaTbl,"aw",%progbits
+	.align	1
+.LANCHOR26 = . + 0
+	.type	NandFlashParaTbl, %object
+	.size	NandFlashParaTbl, 2304
+NandFlashParaTbl:
+	.byte	6
+	.byte	44
+	.byte	100
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	68
+	.byte	68
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	1064
+	.short	479
+	.byte	3
+	.byte	17
+	.byte	40
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	44
+	.byte	104
+	.byte	4
+	.byte	74
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	8
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	5
+	.byte	44
+	.byte	-120
+	.byte	4
+	.byte	75
+	.byte	-87
+	.byte	0
+	.byte	4
+	.byte	1
+	.byte	16
+	.short	256
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	287
+	.byte	1
+	.byte	0
+	.byte	24
+	.byte	32
+	.byte	1
+	.byte	0
+	.byte	1
+	.byte	0
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+	.byte	-109
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+	.short	1497
+	.byte	2
+	.byte	66
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+	.byte	87
+	.byte	8
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+	.short	1473
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+	.byte	66
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+	.byte	81
+	.byte	8
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+	.short	256
+	.byte	2
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+	.byte	68
+	.byte	40
+	.byte	32
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+	.byte	69
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+	.byte	80
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+	.short	256
+	.byte	2
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+	.short	2138
+	.short	1497
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+	.byte	8
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+	.short	473
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+	.byte	8
+	.byte	1
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+	.short	256
+	.byte	2
+	.byte	2
+	.short	1058
+	.short	1497
+	.byte	2
+	.byte	66
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+	.byte	3
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+	.byte	100
+	.byte	68
+	.byte	0
+	.byte	1
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+	.short	128
+	.byte	2
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+	.short	2048
+	.short	473
+	.byte	2
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+	.byte	68
+	.byte	0
+	.byte	2
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2048
+	.short	505
+	.byte	2
+	.byte	49
+	.byte	60
+	.byte	36
+	.byte	3
+	.byte	0
+	.byte	3
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+	.space	4
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+	.byte	-108
+	.byte	122
+	.byte	84
+	.byte	67
+	.byte	0
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2076
+	.short	409
+	.byte	2
+	.byte	0
+	.byte	40
+	.byte	36
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
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+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-34
+	.byte	-43
+	.byte	122
+	.byte	88
+	.byte	67
+	.byte	0
+	.byte	2
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2076
+	.short	441
+	.byte	2
+	.byte	0
+	.byte	40
+	.byte	36
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-43
+	.byte	-108
+	.byte	118
+	.byte	84
+	.byte	67
+	.byte	0
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	1038
+	.short	281
+	.byte	2
+	.byte	0
+	.byte	24
+	.byte	36
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.byte	6
+	.byte	-20
+	.byte	-41
+	.byte	20
+	.byte	118
+	.byte	84
+	.byte	-62
+	.byte	0
+	.byte	1
+	.byte	16
+	.short	128
+	.byte	2
+	.byte	2
+	.short	2076
+	.short	1169
+	.byte	2
+	.byte	0
+	.byte	24
+	.byte	40
+	.byte	3
+	.byte	1
+	.byte	3
+	.byte	0
+	.byte	0
+	.byte	0
+	.space	4
+	.section	.bss.c_ftl_nand_page_pre_blk,"aw",%nobits
+	.align	1
+.LANCHOR68 = . + 0
+	.type	c_ftl_nand_page_pre_blk, %object
+	.size	c_ftl_nand_page_pre_blk, 2
+c_ftl_nand_page_pre_blk:
+	.space	2
+	.section	.bss.g_totle_map_block,"aw",%nobits
+	.align	1
+.LANCHOR121 = . + 0
+	.type	g_totle_map_block, %object
+	.size	g_totle_map_block, 2
+g_totle_map_block:
+	.space	2
+	.section	.bss.DeviceCapacity,"aw",%nobits
+	.align	2
+.LANCHOR76 = . + 0
+	.type	DeviceCapacity, %object
+	.size	DeviceCapacity, 4
+DeviceCapacity:
+	.space	4
+	.section	.bss.gp_ect_tbl_info,"aw",%nobits
+	.align	2
+.LANCHOR183 = . + 0
+	.type	gp_ect_tbl_info, %object
+	.size	gp_ect_tbl_info, 4
+gp_ect_tbl_info:
+	.space	4
+	.section	.rodata.__func__.7655,"a",%progbits
+.LANCHOR196 = . + 0
+	.type	__func__.7655, %object
+	.size	__func__.7655, 16
+__func__.7655:
+	.ascii	"load_l2p_region\000"
+	.section	.bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits
+	.align	1
+.LANCHOR79 = . + 0
+	.type	c_ftl_nand_map_blks_per_plane, %object
+	.size	c_ftl_nand_map_blks_per_plane, 2
+c_ftl_nand_map_blks_per_plane:
+	.space	2
+	.section	.bss.p_l2p_map_buf,"aw",%nobits
+	.align	2
+.LANCHOR119 = . + 0
+	.type	p_l2p_map_buf, %object
+	.size	p_l2p_map_buf, 4
+p_l2p_map_buf:
+	.space	4
+	.section	.bss.g_recovery_page_min_ver,"aw",%nobits
+	.align	2
+.LANCHOR138 = . + 0
+	.type	g_recovery_page_min_ver, %object
+	.size	g_recovery_page_min_ver, 4
+g_recovery_page_min_ver:
+	.space	4
+	.section	.bss.g_active_superblock,"aw",%nobits
+	.align	2
+.LANCHOR107 = . + 0
+	.type	g_active_superblock, %object
+	.size	g_active_superblock, 48
+g_active_superblock:
+	.space	48
+	.section	.bss.g_gc_bad_block_temp_num,"aw",%nobits
+	.align	1
+.LANCHOR148 = . + 0
+	.type	g_gc_bad_block_temp_num, %object
+	.size	g_gc_bad_block_temp_num, 2
+g_gc_bad_block_temp_num:
+	.space	2
+	.hidden	free
+	.ident	"GCC: (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3"
+	.section	.note.GNU-stack,"",%progbits
diff --git a/drivers/rknand/rknand.c b/drivers/rknand/rknand.c
new file mode 100644
index 0000000000..06d31cef72
--- /dev/null
+++ b/drivers/rknand/rknand.c
@@ -0,0 +1,205 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
+#include "rknand.h"
+
+struct blk_desc *rknand_get_blk_desc(struct rknand_dev *ndev)
+{
+	struct blk_desc *desc;
+	struct udevice *dev;
+
+	device_find_first_child(ndev->dev, &dev);
+	if (!dev)
+		return NULL;
+	desc = dev_get_uclass_platdata(dev);
+
+	return desc;
+}
+
+ulong rknand_bread(struct udevice *udev, lbaint_t start,
+		       lbaint_t blkcnt, void *dst)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	int err;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (ndev->read == NULL)
+		return 0;
+
+	err = ndev->read(0, (u32)start, (u32)blkcnt, dst);
+	if (err)
+		return err;
+
+	return blkcnt;
+}
+
+ulong rknand_bwrite(struct udevice *udev, lbaint_t start,
+		       lbaint_t blkcnt, const void *src)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	int err;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (ndev->write == NULL)
+		return 0;
+
+	err = ndev->write(0, (u32)start, (u32)blkcnt, src);
+	if (err)
+		return err;
+
+	return blkcnt;
+}
+
+ulong rknand_berase(struct udevice *udev, lbaint_t start,
+			lbaint_t blkcnt)
+{
+	struct blk_desc *block_dev = dev_get_uclass_platdata(udev);
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	int err;
+
+	if (blkcnt == 0)
+		return 0;
+
+	if ((start + blkcnt) > block_dev->lba)
+		return 0;
+
+	if (ndev->erase == NULL)
+		return 0;
+
+	err = ndev->erase(0, (u32)start, (u32)blkcnt);
+	if (err)
+		return err;
+
+	return blkcnt;
+}
+
+int rknand_scan_namespace(void)
+{
+	struct uclass *uc;
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get(UCLASS_RKNAND, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		debug("%s %d %p\n", __func__, __LINE__, dev);
+		ret = device_probe(dev);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int rknand_blk_bind(struct udevice *udev)
+{
+	struct udevice *bdev;
+	int ret;
+
+	ret = blk_create_devicef(udev, "rknand_blk", "blk",
+				 IF_TYPE_RKNAND,
+			0, 512, 0, &bdev);
+	if (ret) {
+		debug("Cannot create block device\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rknand_blk_probe(struct udevice *udev)
+{
+	struct rknand_dev *ndev = dev_get_priv(udev->parent);
+	struct blk_desc *desc = dev_get_uclass_platdata(udev);
+
+	debug("%s %d %p ndev = %p %p\n", __func__, __LINE__,
+	      udev, ndev, udev->parent);
+	ndev->dev = udev;
+	desc->if_type = IF_TYPE_RKNAND;
+	desc->lba = ndev->density;
+	desc->log2blksz = 9;
+	desc->blksz = 512;
+	desc->bdev = udev;
+	desc->devnum = 0;
+	sprintf(desc->vendor, "0x%.4x", 0x2207);
+	memcpy(desc->product, "rknand", sizeof("rknand"));
+	memcpy(desc->revision, "V1.00", sizeof("V1.00"));
+	/* part_init(desc); */
+	return 0;
+}
+
+static int rockchip_nand_probe(struct udevice *udev)
+{
+	int ret;
+	struct rknand_dev *ndev = dev_get_priv(udev);
+
+	ndev->ioaddr = (void *)devfdt_get_addr(udev);
+	ret = rk_ftl_init(ndev->ioaddr);
+	if (!ret) {
+		ndev->density = ftl_get_density(0);
+		ndev->read = ftl_read;
+		ndev->write = ftl_write;
+		ndev->erase = ftl_discard;
+	}
+
+	return ret;
+}
+
+static const struct blk_ops rknand_blk_ops = {
+	.read	= rknand_bread,
+#ifndef CONFIG_SPL_BUILD
+	.write	= rknand_bwrite,
+	.erase	= rknand_berase,
+#endif
+};
+
+static const struct udevice_id rockchip_nand_ids[] = {
+	{ .compatible = "rockchip,rk-nandc" },
+	{ }
+};
+
+U_BOOT_DRIVER(rknand_blk) = {
+	.name		= "rknand_blk",
+	.id		= UCLASS_BLK,
+	.ops		= &rknand_blk_ops,
+	.probe		= rknand_blk_probe,
+};
+
+UCLASS_DRIVER(rknand) = {
+	.id		= UCLASS_RKNAND,
+	.name		= "rknand",
+	.flags		= DM_UC_FLAG_SEQ_ALIAS,
+	.per_device_auto_alloc_size = sizeof(struct rknand_uclass_priv),
+};
+
+U_BOOT_DRIVER(rknand) = {
+	.name		= "rknand",
+	.id		= UCLASS_RKNAND,
+	.of_match	= rockchip_nand_ids,
+	.bind		= rknand_blk_bind,
+	.probe		= rockchip_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct rknand_dev),
+};
+
diff --git a/drivers/rknand/rknand.h b/drivers/rknand/rknand.h
new file mode 100644
index 0000000000..5ab9940b39
--- /dev/null
+++ b/drivers/rknand/rknand.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) (C) Copyright 2016-2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DRIVER_RKNAND_H__
+#define __DRIVER_RKNAND_H__
+
+#include <asm/io.h>
+#include <clk.h>
+#include <asm/arch/clock.h>
+
+/* Represents an NVM Express device. Each nvme_dev is a PCI function. */
+struct rknand_dev {
+	void *ioaddr;
+	struct clk nandc_clk;
+	struct clk nandc_hclk;
+	u32 density;
+	struct udevice *dev;
+
+	/*
+	 * read() - read from a block device
+	 *
+	 * @start:	Start block number to read (0=first)
+	 * @blkcnt:	Number of blocks to read
+	 * @buffer:	Destination buffer for data read
+	 * @return 0 is OK, -1 is error.
+	 */
+	u32 (*read)(u8 lun, u32 start, u32 blkcnt, void *buffer);
+	/*
+	 * write() - write to a block device
+	 *
+	 * @dev:	Device to write to
+	 * @start:	Start block number to write (0=first)
+	 * @blkcnt:	Number of blocks to write
+	 * @buffer:	Source buffer for data to write
+	 * @return 0 is OK, -1 is error.
+	 */
+	u32 (*write)(u8 lun, u32 start, u32 blkcnt, const void *buffer);
+	/*
+	 * erase() - erase a section of a block device
+	 *
+	 * @dev:	Device to (partially) erase
+	 * @start:	Start block number to erase (0=first)
+	 * @blkcnt:	Number of blocks to erase
+	 * @return 0 is OK, -1 is error.
+	 */
+	u32 (*erase)(u8 lun, u32 start, u32 blkcnt);
+};
+
+struct rknand_uclass_priv {
+	struct rknand_dev *ndev;
+};
+
+u32 ftl_write(u8 lun, u32 start, u32 blkcnt, const void *buffer);
+u32 ftl_read(u8 lun, u32 start, u32 blkcnt, void *buffer);
+u32 ftl_discard(u8 lun, u32 start, u32 blkcnt);
+u32 ftl_get_density(u8 lun);
+int rk_ftl_init(u32 *reg_base);
+
+#endif /* __DRIVER_RKNAND_H__ */
diff --git a/include/blk.h b/include/blk.h
index 27abfddb94..25a6bcd1c6 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -32,6 +32,7 @@ enum if_type {
 	IF_TYPE_HOST,
 	IF_TYPE_SYSTEMACE,
 	IF_TYPE_NVME,
+	IF_TYPE_RKNAND,
 
 	IF_TYPE_COUNT,			/* Number of interface types */
 };
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index c2d8ab7768..779daa80f6 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -70,6 +70,7 @@ enum uclass_id {
 	UCLASS_REGULATOR,	/* Regulator device */
 	UCLASS_REMOTEPROC,	/* Remote Processor device */
 	UCLASS_RESET,		/* Reset controller device */
+	UCLASS_RKNAND,		/* Rockchip nand device with ftl */
 	UCLASS_RTC,		/* Real time clock device */
 	UCLASS_SCSI,		/* SCSI device */
 	UCLASS_SERIAL,		/* Serial UART */
diff --git a/include/rknand.h b/include/rknand.h
new file mode 100644
index 0000000000..7357febefd
--- /dev/null
+++ b/include/rknand.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __RKNAND_H__
+#define __RKNAND_H__
+/**
+ * rknand_scan_namespace - scan all namespaces attached to RK NAND
+ * controllers
+ *
+ * This probes all registered RK NAND uclass device drivers in the
+ * system,and tries to find all namespaces attached to the RK NAND
+ * controllers.
+ *
+ * @return:	0 on success, -ve on error
+ */
+int rknand_scan_namespace(void);
+#endif /* __RKNAND_H__ */

commit afabcf8d2f6268702a1355811ef46f98ef9a851b
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:59:44 2017 +0800

    arm: dts: Enable SARADC for rk3188-radxarock
    
    Change-Id: I8a7ab42d532c1b2d8043e7904881f90920044e4f
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts
index 5f5b5e9a1f..2930f81320 100644
--- a/arch/arm/dts/rk3188-radxarock.dts
+++ b/arch/arm/dts/rk3188-radxarock.dts
@@ -344,6 +344,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &spdif {
 	status = "okay";
 };

commit 93e4b4f16c55ecc9d96fc92255d802b7f486e5fd
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:57:28 2017 +0800

    arm: dts: rk3188: Add SARADC node at dtsi level
    
    Change-Id: If2c16764a6623213c1be95f4c3ad2132c3135a96
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi
index f4d438eb66..518469cf97 100644
--- a/arch/arm/dts/rk3188.dtsi
+++ b/arch/arm/dts/rk3188.dtsi
@@ -124,6 +124,16 @@
 		};
 	};
 
+	saradc: saradc@2006c000 {
+		compatible = "rockchip,saradc";
+		reg = <0x2006c000 0x100>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "pclk_saradc";
+		status = "disabled";
+	};
+
 	usbphy: phy {
 		compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy";
 		rockchip,grf = <&grf>;

commit dcb51bfed1fa3950f9f561b08f5d9b667999fafc
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:56:21 2017 +0800

    clk: rockchip: Add rk3188 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: I1869cd06615e037548e77eae65df4acdf666a058
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
index f5d6420d04..850b0a7af5 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3188.h
@@ -138,6 +138,13 @@ enum {
 	SDIO_DIV_MASK		= 0x3f,
 };
 
+/* CRU_CLKSEL24_CON */
+enum {
+	SARADC_DIV_SHIFT	= 8,
+	SARADC_DIV_MASK		=GENMASK(15, 8),
+	SARADC_DIV_WIDTH	= 8,
+};
+
 /* CRU_CLKSEL25_CON */
 enum {
 	SPI1_DIV_SHIFT		= 8,
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 8c2c9bc1d8..7bf308dd42 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -17,6 +17,7 @@
 #include <asm/arch/cru_rk3188.h>
 #include <asm/arch/grf_rk3188.h>
 #include <asm/arch/hardware.h>
+#include <bitfield.h>
 #include <dt-bindings/clock/rk3188-cru.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -371,6 +372,30 @@ static ulong rockchip_spi_set_clk(struct rk3188_cru *cru, uint gclk_rate,
 	return rockchip_spi_get_clk(cru, gclk_rate, periph);
 }
 
+static ulong rk3188_saradc_get_clk(struct rk3188_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, SARADC_DIV_SHIFT, SARADC_DIV_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3188_saradc_set_clk(struct rk3188_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     SARADC_DIV_MASK,
+		     src_clk_div << SARADC_DIV_SHIFT);
+
+	return rk3188_saradc_get_clk(cru);
+}
+
 #ifdef CONFIG_SPL_BUILD
 static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 		       bool has_bwadj)
@@ -488,6 +513,8 @@ static ulong rk3188_clk_get_rate(struct clk *clk)
 	case PCLK_I2C3:
 	case PCLK_I2C4:
 		return gclk_rate;
+	case SCLK_SARADC:
+                new_rate =  rk3188_saradc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -524,6 +551,9 @@ static ulong rk3188_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rockchip_spi_set_clk(cru, PERI_PCLK_HZ,
 						clk->id, rate);
 		break;
+	case SCLK_SARADC:
+		new_rate = rk3188_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit f972b1726d5d35072671533f05775a7ace129159
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:52:59 2017 +0800

    arm: dts: Enable SARADC for rk3128-evb
    
    Change-Id: Ic11fdea352520ae63850ff36be6bc74a80e6aada
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 6ac6a35f5c..37d906f94b 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -249,3 +249,7 @@
 				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
 	};
 };
+
+&saradc {
+	status = "okay";
+};

commit eb4fc8a10985fdeaa0010e60db8a713fb5a4c104
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:49:44 2017 +0800

    clk: rockchip: Add rk3128 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: I973b5f50b81559f054ca552ab69ec176cbe3abaa
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index 8d6b166631..0f803ad93d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -164,6 +164,11 @@ enum {
 	EMMC_DIV_SHIFT		= 8,
 	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
 
+	/* CLKSEL_CON24 */
+	SARADC_DIV_CON_SHIFT	= 8,
+	SARADC_DIV_CON_MASK	= GENMASK(15, 8),
+	SARADC_DIV_CON_WIDTH	= 8,
+
 	/* CRU_SOFTRST5_CON */
 	DDRCTRL_PSRST_SHIFT	= 11,
 	DDRCTRL_SRST_SHIFT	= 10,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index f344047a6c..925a2f3ea6 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -13,6 +13,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3128.h>
 #include <asm/arch/hardware.h>
+#include <bitfield.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3128-cru.h>
 #include <linux/log2.h>
@@ -317,6 +318,32 @@ static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 
 	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
 }
+
+static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, SARADC_DIV_CON_SHIFT,
+			       SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     SARADC_DIV_CON_MASK,
+		     src_clk_div << SARADC_DIV_CON_SHIFT);
+
+	return rk3128_saradc_get_clk(cru);
+}
+
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
@@ -329,7 +356,8 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	case PCLK_I2C2:
 	case PCLK_I2C3:
 		return rk3128_i2c_get_clk(priv->cru, clk->id);
-		break;
+	case SCLK_SARADC:
+                return rk3128_saradc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -354,6 +382,9 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 	case PCLK_I2C3:
 		new_rate = rk3128_i2c_set_clk(priv->cru, clk->id, rate);
 		break;
+	case SCLK_SARADC:
+		new_rate = rk3128_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit c95ecb1990068c2a41887eb3aaa6338d24e33887
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Oct 16 14:42:05 2017 +0800

    rockchip: dts: rk3128: Add SARADC at dtsi level
    
    Change-Id: Ifcbda377d5b0eff50bd41cfc6141eb1f76211dc2
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index 0c59adad02..03fc221408 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -301,6 +301,18 @@
 		#dma-cells = <2>;
 	};
 
+	saradc: saradc@2006c000 {
+		compatible = "rockchip,saradc";
+		reg = <0x2006c000 0x100>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
 	pwm0: pwm0@20050000 {
 		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
 		reg = <0x20050000 0x10>;
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
index 36c8006bd2..35e943575f 100644
--- a/include/dt-bindings/clock/rk3128-cru.h
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -29,6 +29,7 @@
 #define SCLK_TIMER1		86
 #define SCLK_TIMER2		87
 #define SCLK_TIMER3		88
+#define SCLK_SARADC		91
 #define SCLK_OTGPHY0		93
 #define SCLK_LCDC		100
 #define SCLK_HDMI		109
@@ -58,6 +59,7 @@
 #define ACLK_PERI		210
 
 /* pclk gates */
+#define PCLK_SARADC		318
 #define PCLK_GPIO0		320
 #define PCLK_GPIO1		321
 #define PCLK_GPIO2		322
@@ -160,6 +162,7 @@
 #define SRST_EMMC		83
 #define SRST_SPI0		84
 #define SRST_WDT		86
+#define SRST_SARADC		87
 #define SRST_DDRPHY		88
 #define SRST_DDRPHY_P		89
 #define SRST_DDRCTRL		90

commit f3d84b4a519345e539aa88707fa3ccc76f9de9b5
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 19:48:29 2017 +0800

    rockchip: rk3128: enable GICv2 irq support
    
    Change-Id: I5bfffa770ca04d7077031cd25345f93d58ba5c6e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d59dad320a..aa418c35b1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -14,6 +14,7 @@ config ROCKCHIP_RK3036
 config ROCKCHIP_RK3128
 	bool "Support Rockchip RK3128"
 	select CPU_V7
+	select GICV2
 	help
 	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index af901322ad..b9f01cb5aa 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -26,6 +26,8 @@
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
 #define CONFIG_SYS_LOAD_ADDR		0x60800800
 
+#define GICC_BASE			0x1013A000
+#define GICD_BASE			0x10139000
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 

commit 6d0f6303ecb42b2b984b593861d6d188d274cf00
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 19:24:46 2017 +0800

    irq-platform.h: add timer1 irq number definition
    
    Change-Id: I866f0aac9561a8cbe56d87a746aef259883be28e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index f1055a6834..ab907c4f3b 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -19,6 +19,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			61
 #define IRQ_GPIO0			68
 #define IRQ_GPIO1			69
 #define IRQ_GPIO2			79
@@ -36,6 +37,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			76
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -58,6 +60,7 @@
 #define GPIO_BANK_NUM			9
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			99
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -80,6 +83,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			76
 #define IRQ_GPIO0			83
 #define IRQ_GPIO1			84
 #define IRQ_GPIO2			85
@@ -97,6 +101,7 @@
 #define GPIO_BANK_NUM			4
 #define GPIO_BANK_PINS			32
 
+#define IRQ_TIMER1			79
 #define IRQ_GPIO0			113
 #define IRQ_GPIO1			114
 #define IRQ_GPIO2			115
@@ -114,6 +119,7 @@
 #define IRQ_GPIO2			48
 #define IRQ_GPIO3			49
 #define IRQ_GPIO4			50
+#define IRQ_TIMER1			114	/* non-secure */
 
 #define GIC_IRQS_NR			(6 * 32)
 #define GPIO_IRQS_NR			(5 * 32)

commit 778da45f0b4c4e0c9c2664dcd4a6d9d02335bdba
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 19:14:29 2017 +0800

    irq-platform.h: rk3128: add irq numbers definition
    
    Change-Id: Idf3f3f1342bc1339d9e5efbe70d9ae7e059f50af
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/include/irq-platform.h b/include/irq-platform.h
index e3d16429ac..f1055a6834 100644
--- a/include/irq-platform.h
+++ b/include/irq-platform.h
@@ -7,7 +7,24 @@
 #ifndef _ROCKCHIP_PLAT_IRQ_H_
 #define _ROCKCHIP_PLAT_IRQ_H_
 
-#if defined(CONFIG_ROCKCHIP_RK322X)
+#if defined(CONFIG_ROCKCHIP_RK3128)
+#define GPIO0_PHYS			0x2007C000
+#define GPIO1_PHYS			0x20080000
+#define GPIO2_PHYS			0x20084000
+#define GPIO3_PHYS			0x20088000
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			68
+#define IRQ_GPIO1			69
+#define IRQ_GPIO2			79
+#define IRQ_GPIO3			71
+
+#elif defined(CONFIG_ROCKCHIP_RK322X)
 #define GPIO0_PHYS			0x11110000
 #define GPIO1_PHYS			0x11120000
 #define GPIO2_PHYS			0x11130000

commit f960b24c88fc28e535d2c64836b91e38bd7148bc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:44:23 2017 +0800

    configs: evb-rk3126: enable rk816 fuel gauge
    
    Change-Id: Ica59f1a0c6d4a91aee2f27bd8dad24ecf27bd171
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index b00cdcf4e6..152dfbe201 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -23,6 +23,8 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_DM_FUEL_GAUGE=y
+CONFIG_POWER_FG_RK816=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y

commit 8c08c1e2598a2bac3e4fadc91ae452f018b229f2
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:32:34 2017 +0800

    configs: evb-rk3126: enable CONFIG_DM_KEY
    
    Change-Id: I7b352b596934fd9ef98ccc86e082ff89b76ac67e
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index 58a6571dc6..b00cdcf4e6 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -18,6 +18,7 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y

commit 00579f814fcd335511cd9c1931708561ed92ed69
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:28:36 2017 +0800

    rockchip: dts: rk3126-evb: add battery node of rk816
    
    Change-Id: I185a6110ba1bb0f415e9d7c0263524ae6ae27baa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index d478953165..6ac6a35f5c 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -80,6 +80,29 @@
 			status = "okay";
 		};
 
+		battery {
+			compatible = "rk816-battery";
+			ocv_table = < 3400 3654 3686 3710 3744 3775 3803
+						  3825 3843 3858 3870 3886 3916 3955
+						  3988 4010 4023 4032 4049 4080 4151 >;
+			design_capacity = <2000>;
+			design_qmax = <2200>;
+			bat_res = <120>;
+			max_input_current = <2000>;
+			max_chrg_current = <1000>;
+			max_chrg_voltage = <4200>;
+			sleep_enter_current = <300>;
+			sleep_exit_current = <300>;
+			sleep_filter_current = <100>;
+			power_off_thresd = <3500>;
+			zero_algorithm_vol = <3800>;
+			max_soc_offset = <60>;
+			monitor_sec = <5>;
+			virtual_power = <0>;
+			power_dc2otg = <0>;
+			dc_det_adc = <0>;
+		};
+
 		regulators {
 
 			vdd_arm: DCDC_REG1{

commit 7bde6e15181d05b8b038e345f9cfb0b87284c265
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 17:41:16 2017 +0800

    fuel gauge: rk816: default enabled when PMIC_RK8XX selected
    
    Change-Id: I56c882bbb3023f56380d2c19acbcb98ccced43ba
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 2299e2c397..3be00c67a3 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -13,5 +13,6 @@ config POWER_FG_RK818
 config POWER_FG_RK816
 	bool "RK816 Fuel gauge support"
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	default y
 	help
 	  This adds support for RK816 fuel gauge support.
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
index 20a54d03c0..c58df8a6c4 100644
--- a/drivers/power/fuel_gauge/fg_rk816.c
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -206,7 +206,12 @@ static void rk816_bat_write(u8 reg, u8 buf)
 
 static int rk816_bat_dwc_otg_check_dpdm(void)
 {
+#ifdef CONFIG_PHY_ROCKCHIP_INNO_USB2
 	return rockchip_chg_get_type();
+#else
+	BAT_INFO("rockchip_chg_get_type() is not implement\n");
+	return NO_CHARGER;
+#endif
 }
 
 static int rk816_bat_get_rsoc(struct battery_info *di)

commit 2c62abd17cc890f79a9802680717ba4e2186b487
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:23:13 2017 +0800

    rockchip: rk3128: add regulators_enable_boot_on for pmic init
    
    add regulators_enable_boot_on to init pmic which have boot on flags.
    
    Change-Id: I17de4452c6d2fd30903cb0e8807fed96c12a26f6
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
index 70eda6fe2b..a650621558 100644
--- a/arch/arm/mach-rockchip/rk3128-board.c
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -14,6 +14,7 @@
 #include <asm/arch/grf_rk3128.h>
 #include <asm/arch/boot_mode.h>
 #include <asm/arch/timer.h>
+#include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -59,8 +60,16 @@ int board_late_init(void)
 
 int board_init(void)
 {
+	int ret = 0;
+
 	rockchip_timer_init();
 
+	ret = regulators_enable_boot_on(false);
+	if (ret) {
+		debug("%s: Cannot enable boot on regulator\n", __func__);
+		return ret;
+	}
+
 	return 0;
 }
 

commit 56b13c4690641776eaa869a4b2d41cd324a0ff1e
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:20:23 2017 +0800

    rk3126: config: enable pmic rk816 config by default
    
    Change-Id: I792141962901ff38c24d4cb8928bfb4562e01670
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
index a547546de5..58a6571dc6 100644
--- a/configs/evb-rk3126_defconfig
+++ b/configs/evb-rk3126_defconfig
@@ -22,8 +22,11 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
 CONFIG_RAM=y
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000

commit 31a12144ebd927b9a68f3532441d7a39e4a5361a
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:19:17 2017 +0800

    rockchip: rk3126-evb: add i2c2 and rk816 nodes
    
    Change-Id: Ie032fd363e71633fbdca676e6e57ac9932ccc817
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
index 2e6ca8762b..d478953165 100644
--- a/arch/arm/dts/rk3126-evb.dts
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -50,6 +50,151 @@
 	};
 };
 
+&i2c2 {
+	clock-frequency = <100000>;
+	status = "okay";
+
+	rk816: pmic@1a {
+		compatible = "rockchip,rk816";
+		reg = <0x1a>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk816-clkout2";
+
+		gpio {
+			status = "okay";
+		};
+
+		pwrkey {
+			status = "okay";
+		};
+
+		rtc {
+			status = "okay";
+		};
+
+		regulators {
+
+			vdd_arm: DCDC_REG1{
+				regulator-name= "vdd_arm";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vdd_log: DCDC_REG2 {
+				regulator-name= "vdd_logic";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc28_cif: LDO_REG1 {
+				regulator-name = "vcc28_cif";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc18_cif: LDO_REG2 {
+				regulator-name = "vcc18_cif";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_11: LDO_REG3 {
+				regulator-name = "vdd_11";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1100000>;
+				};
+			};
+
+			ldo4: LDO_REG4 {
+				regulator-name= "ldo4";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo5: LDO_REG5 {
+				regulator-name= "ldo5";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			ldo6: LDO_REG6 {
+				regulator-name= "ldo6";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+		};
+	};
+};
+
 &usb_host {
 	status = "okay";
 };
@@ -75,4 +220,9 @@
 			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	pmic_int_l: pmic-int-l {
+			rockchip,pins =
+				<0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+	};
 };

commit 9ac6f4797ca1f9a9c5c1f4bdb8414fefa85f8bd3
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:17:19 2017 +0800

    rockchip: rk3128: fix up the i2c addr base and pinctrl define error
    
    Change-Id: I3dbb3f7b36ed4f48c3bdf475efe1f1735cbc33b8
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
index e7710b7e12..0c59adad02 100644
--- a/arch/arm/dts/rk3128.dtsi
+++ b/arch/arm/dts/rk3128.dtsi
@@ -424,9 +424,9 @@
 		status = "disabled";
 	};
 
-	i2c0: i2c0@20070000 {
+	i2c0: i2c0@20072000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x20070000 0x1000>;
+		reg = <20072000 0x1000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -436,9 +436,9 @@
 		pinctrl-0 = <&i2c0_xfer>;
 	};
 
-	i2c1: i2c1@20054000 {
+	i2c1: i2c1@20056000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x20054000 0x1000>;
+		reg = <0x20056000 0x1000>;
 		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -448,28 +448,28 @@
 		pinctrl-0 = <&i2c1_xfer>;
 	};
 
-	i2c2: i2c2@20058000 {
+	i2c2: i2c2@2005a000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x20058000 0x1000>;
+		reg = <0x2005a000 0x1000>;
 		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		clock-names = "i2c";
 		clocks = <&cru PCLK_I2C2>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&i2c0_xfer>;
+		pinctrl-0 = <&i2c2_xfer>;
 	};
 
-	i2c3: i2c3@2005c000 {
+	i2c3: i2c3@2005e000 {
 		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
-		reg = <0x2005c000 0x1000>;
+		reg = <0x2005e000 0x1000>;
 		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		clock-names = "i2c";
 		clocks = <&cru PCLK_I2C3>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&i2c0_xfer>;
+		pinctrl-0 = <&i2c3_xfer>;
 	};
 
 	spi0: spi@20074000 {
@@ -704,8 +704,8 @@
 
 		i2c0 {
 			i2c0_xfer: i2c0-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
+						<0 1 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
 
@@ -718,15 +718,15 @@
 
 		i2c2 {
 			i2c2_xfer: i2c2-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 20 3 &pcfg_pull_none>,
+						<2 21 3 &pcfg_pull_none>;
 			};
 		};
 
 		i2c3 {
 			i2c3_xfer: i2c3-xfer {
-				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
-						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
+						<0 7 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
 

commit 19d1aa3c9c413f45f8f215ca851aa05c6142e047
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 16:33:05 2017 +0800

    rockchip: rk3399: default enable bmp display
    
    Change-Id: Ia8f2db14e4423407bfc267cb9d9080b05ca993da
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index e9143c92db..8ae1c4ee32 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -24,6 +24,10 @@
 #define CONFIG_SERIAL_TAG
 #define CONFIG_ENV_OVERWRITE
 
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+
 #define ROCKCHIP_DEVICE_SETTINGS \
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"

commit 5174e4ff732e2791a223d681870ff517073713a5
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 16:29:08 2017 +0800

    rk3399: config: evb: enable drm display related configs
    
    Change-Id: I3abdf6caf533f6dbc7bc979718adff0302676e78
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index cbdfdda503..770c9287fb 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -71,9 +71,6 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
-CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
 CONFIG_USB_GADGET=y
@@ -93,3 +90,12 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_LCD=y
+CONFIG_VIDEO=y
+CONFIG_CONSOLE_NORMAL=y
+CONFIG_CMD_BMP=y
+CONFIG_DRM_ROCKCHIP=y
+CONFIG_DRM_ROCKCHIP_VOP=y
+CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y
+CONFIG_DRM_ROCKCHIP_PANEL=y
+CONFIG_DRM_ROCKCHIP_MIPI_DSI=y

commit 9a87226564e717dca81a862f364fcfe2f3c696fe
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Mon Oct 16 11:16:26 2017 +0800

    clk: rockchip: rk3128: support i2c clk get and set rate
    
    Change-Id: I16af8297918b677165244330a4a39d3f041d5ee4
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 830848ea24..f344047a6c 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -275,6 +275,48 @@ static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
 	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
 }
 
+static ulong rk3128_i2c_get_clk(struct rk3128_cru *cru, ulong clk_id)
+{
+	u32 div, con;
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		con = readl(&cru->cru_clksel_con[10]);
+		div = con >> 12 & 0x3;
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, div);
+}
+
+static ulong rk3128_i2c_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = PERI_ACLK_HZ / hz;
+	assert(src_clk_div - 1 < 4);
+
+	switch (clk_id) {
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		rk_setreg(&cru->cru_clksel_con[10],
+			  ((src_clk_div - 1) << 12));
+		break;
+	default:
+		printf("do not support this i2c bus\n");
+		return -EINVAL;
+	}
+
+	return DIV_TO_RATE(PERI_ACLK_HZ, src_clk_div);
+}
 static ulong rk3128_clk_get_rate(struct clk *clk)
 {
 	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
@@ -282,6 +324,12 @@ static ulong rk3128_clk_get_rate(struct clk *clk)
 	switch (clk->id) {
 	case 0 ... 63:
 		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		return rk3128_i2c_get_clk(priv->cru, clk->id);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -300,6 +348,12 @@ static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
 						clk->id, rate);
 		break;
+	case PCLK_I2C0:
+	case PCLK_I2C1:
+	case PCLK_I2C2:
+	case PCLK_I2C3:
+		new_rate = rk3128_i2c_set_clk(priv->cru, clk->id, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 9f9d01585cb94be301305b8f50f41a28e46ac336
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 16 16:33:38 2017 +0800

    rockchip: clk: rk3128: fix GPIO2C4_SHIFT and GPIO2C5_SHIFT define error
    
    The other I2C definitions are all correct.
    
    Change-Id: I24559cae054db39a203ae44de1519c14ed543b64
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
index 5da6cd2351..68c23ec6d0 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
@@ -536,13 +536,13 @@ enum {
 	GPIO2C6_GPIO		= 0,
 	GPIO2C6_GMAC_TXD2	= 4,
 
-	GPIO2C5_SHIFT		= 12,
+	GPIO2C5_SHIFT		= 4,
 	GPIO2C5_MASK		= 7 << GPIO2C5_SHIFT,
 	GPIO2C5_GPIO		= 0,
 	GPIO2C5_I2C2_SCL	= 3,
 	GPIO2C5_GMAC_RXD2,
 
-	GPIO2C4_SHIFT		= 12,
+	GPIO2C4_SHIFT		= 0,
 	GPIO2C4_MASK		= 7 << GPIO2C4_SHIFT,
 	GPIO2C4_GPIO		= 0,
 	GPIO2C4_I2C2_SDA	= 3,

commit 186f85721af2c81d74566143f7ec69d2655d02e4
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 16:23:03 2017 +0800

    drm/rockhcip: add drm rockchip display support
    
    Change-Id: I5ef0e29d1e0855a7aa47bd0737835b79c53bf25a
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 082cc4a528..48b77eb8d7 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -426,6 +426,7 @@ config VIDEO_FSL_DCU_MAX_FB_SIZE_MB
 	 Controller Unit (DCU4).
 
 source "drivers/video/rockchip/Kconfig"
+source "drivers/video/drm/Kconfig"
 
 config VIDEO_SANDBOX_SDL
 	bool "Enable sandbox video console using SDL"
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 5cf8909295..52a7aa0e62 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
 obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
 obj-${CONFIG_EXYNOS_FB} += exynos/
 obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/
+obj-${CONFIG_DRM_ROCKCHIP} += drm/
 
 obj-y += bridge/
 obj-y += sunxi/
diff --git a/drivers/video/drm/Kconfig b/drivers/video/drm/Kconfig
new file mode 100644
index 0000000000..598d4c0265
--- /dev/null
+++ b/drivers/video/drm/Kconfig
@@ -0,0 +1,46 @@
+menuconfig DRM_ROCKCHIP
+	bool "Rockchip DRM Support"
+	depends on DM_VIDEO
+	help
+	  Rockchip SoCs provide video output capabilities for High-Definition
+	  Multimedia Interface (HDMI), Low-voltage Differential Signalling
+	  (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
+
+	  This driver supports the on-chip video output device, and targets the
+	  Rockchip RK3288 and RK3399.
+
+config DRM_ROCKCHIP_PANEL
+	bool
+
+config DRM_ROCKCHIP_MIPI_DSI
+	bool
+
+config DRM_ROCKCHIP_DW_MIPI_DSI
+	tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_MIPI_DSI
+	select DRM_ROCKCHIP_PANEL
+	help
+	 This selects support for Rockchip SoC specific extensions
+	 for the Synopsys DesignWare HDMI driver. If you want to
+	 enable MIPI DSI on RK3288 based SoC, you should selet this
+	 option.
+
+config DRM_ROCKCHIP_ANALOGIX_DP
+	bool "Rockchip specific extensions for Analogix DP driver"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	help
+	  This selects support for Rockchip SoC specific extensions
+	  for the Analogix Core DP driver. If you want to enable DP
+	  on RK3288 based SoC, you should selet this option.
+
+config DRM_ROCKCHIP_LVDS
+	bool "Rockchip LVDS Support"
+	depends on DRM_ROCKCHIP
+	select DRM_ROCKCHIP_PANEL
+	help
+	  Choose this option to enable support for Rockchip LVDS controllers.
+	  Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
+	  support LVDS, rgb, dual LVDS output mode. say Y to enable its
+	  driver.
diff --git a/drivers/video/drm/Makefile b/drivers/video/drm/Makefile
new file mode 100755
index 0000000000..d9c0b1c7a2
--- /dev/null
+++ b/drivers/video/drm/Makefile
@@ -0,0 +1,15 @@
+#
+# (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += rockchip_display.o rockchip_crtc.o rockchip_phy.o \
+		rockchip_vop.o rockchip_vop_reg.o bmp_helper.o
+
+obj-$(CONFIG_DRM_ROCKCHIP_MIPI_DSI)	+= rockchip_mipi_dsi.o
+obj-$(CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI) += rockchip-dw-mipi-dsi.o rockchip-inno-mipi-dphy.o
+obj-$(CONFIG_DRM_ROCKCHIP_ANALOGIX_DP) += rockchip_analogix_dp.o rockchip_analogix_dp_reg.o
+obj-$(CONFIG_DRM_ROCKCHIP_LVDS) += rockchip_lvds.o
+obj-$(CONFIG_DRM_ROCKCHIP_PANEL) += rockchip_panel.o panel_simple.o \
+					rockchip_dsi_panel.o
diff --git a/drivers/video/drm/bmp_helper.c b/drivers/video/drm/bmp_helper.c
new file mode 100755
index 0000000000..a95fe88147
--- /dev/null
+++ b/drivers/video/drm/bmp_helper.c
@@ -0,0 +1,239 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Mark Yao <mark.yao@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <config.h>
+#include <common.h>
+#include <malloc.h>
+#include <asm/unaligned.h>
+#include <bmp_layout.h>
+
+#define BMP_RLE8_ESCAPE		0
+#define BMP_RLE8_EOL		0
+#define BMP_RLE8_EOBMP		1
+#define BMP_RLE8_DELTA		2
+
+static void draw_unencoded_bitmap(uint16_t **dst, uint8_t *bmap, uint16_t *cmap,
+				  uint32_t cnt)
+{
+	while (cnt > 0) {
+		*(*dst)++ = cmap[*bmap++];
+		cnt--;
+	}
+}
+
+static void draw_encoded_bitmap(uint16_t **dst, uint16_t c, uint32_t cnt)
+{
+	uint16_t *fb = *dst;
+	int cnt_8copy = cnt >> 3;
+
+	cnt -= cnt_8copy << 3;
+	while (cnt_8copy > 0) {
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		*fb++ = c;
+		cnt_8copy--;
+	}
+	while (cnt > 0) {
+		*fb++ = c;
+		cnt--;
+	}
+	*dst = fb;
+}
+
+static void decode_rle8_bitmap(void *psrc, void *pdst, uint16_t *cmap,
+			       int width, int height, int bits, int x_off,
+			       int y_off, bool flip)
+{
+	uint32_t cnt, runlen;
+	int x = 0, y = 0;
+	int decode = 1;
+	int linesize = width * 2;
+	uint8_t *bmap = psrc;
+	uint8_t *dst = pdst;
+
+	if (flip) {
+		y = height - 1;
+		dst = pdst + y * linesize;
+	}
+
+	while (decode) {
+		if (bmap[0] == BMP_RLE8_ESCAPE) {
+			switch (bmap[1]) {
+			case BMP_RLE8_EOL:
+				/* end of line */
+				bmap += 2;
+				x = 0;
+				if (flip) {
+					y--;
+					dst -= linesize * 2;
+				} else {
+					y++;
+				}
+				break;
+			case BMP_RLE8_EOBMP:
+				/* end of bitmap */
+				decode = 0;
+				break;
+			case BMP_RLE8_DELTA:
+				/* delta run */
+				x += bmap[2];
+				if (flip) {
+					y -= bmap[3];
+					dst -= bmap[3] * linesize;
+					dst += bmap[2] * 2;
+				} else {
+					y += bmap[3];
+					dst += bmap[3] * linesize;
+					dst += bmap[2] * 2;
+				}
+				bmap += 4;
+				break;
+			default:
+				/* unencoded run */
+				runlen = bmap[1];
+				bmap += 2;
+				if (y >= height || x >= width) {
+					decode = 0;
+					break;
+				}
+				if (x + runlen > width)
+					cnt = width - x;
+				else
+					cnt = runlen;
+				draw_unencoded_bitmap((uint16_t **)&dst, bmap,
+						      cmap, cnt);
+				x += runlen;
+				bmap += runlen;
+				if (runlen & 1)
+					bmap++;
+			}
+		} else {
+			/* encoded run */
+			if (y < height) {
+				runlen = bmap[0];
+				if (x < width) {
+					/* aggregate the same code */
+					while (bmap[0] == 0xff &&
+					       bmap[2] != BMP_RLE8_ESCAPE &&
+					       bmap[1] == bmap[3]) {
+						runlen += bmap[2];
+						bmap += 2;
+					}
+					if (x + runlen > width)
+						cnt = width - x;
+					else
+						cnt = runlen;
+					draw_encoded_bitmap((uint16_t **)&dst,
+							    cmap[bmap[1]], cnt);
+				}
+				x += runlen;
+			}
+			bmap += 2;
+		}
+	}
+}
+
+int bmpdecoder(void *bmp_addr, void *pdst, int dst_bpp)
+{
+	int stride, padded_width, bpp, i, width, height;
+	struct bmp_image *bmp = bmp_addr;
+	uint8_t *src = bmp_addr;
+	uint8_t *dst = pdst;
+	bool flip = false;
+	uint16_t *cmap;
+	uint8_t *cmap_base;
+
+	if (!bmp || !(bmp->header.signature[0] == 'B' &&
+	    bmp->header.signature[1] == 'M')) {
+		printf("cat not find bmp file\n");
+		return -1;
+	}
+	width = get_unaligned_le32(&bmp->header.width);
+	height = get_unaligned_le32(&bmp->header.height);
+	bpp = get_unaligned_le16(&bmp->header.bit_count);
+	padded_width = width & 0x3 ? (width & ~0x3) + 4 : width;
+
+	if (height < 0)
+		height = 0 - height;
+	else
+		flip = true;
+
+	cmap_base = src + sizeof(bmp->header);
+	src = bmp_addr + get_unaligned_le32(&bmp->header.data_offset);
+
+	switch (bpp) {
+	case 8:
+		if (dst_bpp != 16) {
+			printf("can't support covert bmap to bit[%d]\n",
+			       dst_bpp);
+			return -1;
+		}
+		cmap = malloc(sizeof(cmap) * 256);
+
+		/* Set color map */
+		for (i = 0; i < 256; i++) {
+			ushort colreg = ((cmap_base[0] << 8) & 0xf800) |
+					((cmap_base[1] << 3) & 0x07e0) |
+					((cmap_base[2] >> 3) & 0x001f) ;
+			cmap_base += 4;
+			cmap[i] = colreg;
+		}
+		/*
+		 * only support convert 8bit bmap file to RGB565.
+		 */
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			decode_rle8_bitmap(src, dst, cmap, width, height,
+					   bpp, 0, 0, flip);
+		} else {
+			int j;
+			stride = width * 2;
+
+			if (flip)
+				dst += stride * (height - 1);
+
+			for (i = 0; i < height; ++i) {
+				for (j = 0; j < width; j++) {
+					*(uint16_t *)dst = cmap[*(src++)];
+					dst += sizeof(uint16_t) / sizeof(*dst);
+				}
+				src += (padded_width - width);
+				if (flip)
+					dst -= stride * 2;
+			}
+		}
+		free(cmap);
+		break;
+	case 24:
+		if (get_unaligned_le32(&bmp->header.compression)) {
+			printf("can't not support compression for 24bit bmap");
+			return -1;
+		}
+		stride = ALIGN(width * 3, 4);
+		if (flip)
+			src += stride * (height - 1);
+
+		for (i = 0; i < height; i++) {
+			memcpy(dst, src, 3 * width);
+			dst += stride;
+			src += stride;
+			if (flip)
+				src -= stride * 2;
+		}
+		break;
+	case 16:
+	case 32:
+	default:
+		printf("unsupport bit=%d now\n", bpp);
+		return -1;
+	}
+
+	return 0;
+}
diff --git a/drivers/video/drm/bmp_helper.h b/drivers/video/drm/bmp_helper.h
new file mode 100644
index 0000000000..5e125004d2
--- /dev/null
+++ b/drivers/video/drm/bmp_helper.h
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Mark Yao <mark.yao@rock-chips.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _BMP_HELPER_H_
+#define _BMP_HELPER_H_
+
+#define BMP_RLE8_ESCAPE		0
+#define BMP_RLE8_EOL		0
+#define BMP_RLE8_EOBMP		1
+#define BMP_RLE8_DELTA		2
+
+#define range(x, min, max) ((x) < (min)) ? (min) : (((x) > (max)) ? (max) : (x))
+
+int bmpdecoder(void *bmp_addr, void *dst, int dst_bpp);
+#endif /* _BMP_HELPER_H_ */
diff --git a/drivers/video/drm/panel_simple.c b/drivers/video/drm/panel_simple.c
new file mode 100644
index 0000000000..8047ebc636
--- /dev/null
+++ b/drivers/video/drm/panel_simple.c
@@ -0,0 +1,170 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <linux/media-bus-format.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+#include <asm/gpio.h>
+#include <backlight.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_panel.h"
+
+#define msleep(a)	udelay(a * 1000)
+
+struct panel_simple {
+	struct udevice *dev;
+	const void *blob;
+	int node;
+
+	const struct drm_display_mode *mode;
+	int bus_format;
+
+	struct udevice *backlight;
+	struct gpio_desc enable;
+
+	int delay_prepare;
+	int delay_unprepare;
+	int delay_enable;
+	int delay_disable;
+};
+
+static int panel_simple_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	dm_gpio_set_value(&panel->enable, 1);
+	mdelay(panel->delay_prepare);
+
+	return 0;
+}
+
+static int panel_simple_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	dm_gpio_set_value(&panel->enable, 0);
+	mdelay(panel->delay_unprepare);
+
+	return 0;
+}
+
+static int panel_simple_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	backlight_enable(panel->backlight);
+	mdelay(panel->delay_enable);
+
+	return 0;
+}
+
+static int panel_simple_disable(struct display_state *state)
+{
+	/* TODO: backlight_disable:
+	 * presently uboot not support backlight disable.
+	 */
+
+	return 0;
+}
+
+static int panel_simple_parse_dt(const void *blob, int node,
+				 struct panel_simple *panel)
+{
+	int ret;
+
+	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
+				   &panel->enable, GPIOD_IS_OUT);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
+					   "backlight", &panel->backlight);
+	if (ret) {
+		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	panel->delay_prepare = fdtdec_get_int(blob, node, "delay,prepare", 0);
+	panel->delay_unprepare = fdtdec_get_int(blob, node, "delay,unprepare", 0);
+	panel->delay_enable = fdtdec_get_int(blob, node, "delay,enable", 0);
+	panel->delay_disable = fdtdec_get_int(blob, node, "delay,disable", 0);
+	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+
+	printf("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
+	       panel->delay_prepare, panel->delay_unprepare,
+	       panel->delay_enable, panel->delay_disable);
+
+	/* keep panel blank on init. */
+	dm_gpio_set_value(&panel->enable, 0);
+
+	return 0;
+}
+
+static int panel_simple_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	int node = panel_state->node;
+	const struct drm_display_mode *mode = panel_state->panel->data;
+	struct panel_simple *panel;
+	int ret;
+
+	panel = malloc(sizeof(*panel));
+	if (!panel)
+		return -ENOMEM;
+
+	panel->blob = blob;
+	panel->node = node;
+	panel->mode = mode;
+	panel->dev = panel_state->dev;
+	panel_state->private = panel;
+
+	ret = panel_simple_parse_dt(blob, node, panel);
+	if (ret) {
+		printf("%s: failed to parse DT\n", __func__);
+		free(panel);
+		return ret;
+	}
+
+	conn_state->bus_format = panel->bus_format;
+
+	return 0;
+}
+
+static void panel_simple_deinit(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct panel_simple *panel = panel_state->private;
+
+	free(panel);
+}
+
+const struct rockchip_panel_funcs panel_simple_funcs = {
+	.init		= panel_simple_init,
+	.deinit		= panel_simple_deinit,
+	.prepare	= panel_simple_prepare,
+	.unprepare	= panel_simple_unprepare,
+	.enable		= panel_simple_enable,
+	.disable	= panel_simple_disable,
+};
diff --git a/drivers/video/drm/rockchip-dw-mipi-dsi.c b/drivers/video/drm/rockchip-dw-mipi-dsi.c
new file mode 100644
index 0000000000..ab1d7042df
--- /dev/null
+++ b/drivers/video/drm/rockchip-dw-mipi-dsi.c
@@ -0,0 +1,1025 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <dm/device.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+#include "rockchip_mipi_dsi.h"
+
+#define MSEC_PER_SEC    1000L
+#define USEC_PER_SEC	1000000L
+
+#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us)	\
+({ \
+	int try = 100; \
+	for (;;) { \
+		(val) = op(addr); \
+		if (cond) \
+			break; \
+		try--; \
+		if (!try) \
+			break; \
+		if (sleep_us) \
+			udelay(sleep_us >> 2); \
+	} \
+	(cond) ? 0 : -ETIMEDOUT; \
+})
+
+#define RK3288_GRF_SOC_CON6		0x025c
+#define RK3288_DSI0_SEL_VOP_LIT		BIT(6)
+#define RK3288_DSI1_SEL_VOP_LIT		BIT(9)
+
+#define RK3399_GRF_SOC_CON19		0x6250
+#define RK3399_DSI0_SEL_VOP_LIT		BIT(0)
+#define RK3399_DSI1_SEL_VOP_LIT		BIT(4)
+
+/* disable turnrequest, turndisable, forcetxstopmode, forcerxmode */
+#define RK3399_GRF_SOC_CON22		0x6258
+#define RK3399_GRF_DSI_MODE		0xffff0000
+
+#define DSI_VERSION			0x00
+#define DSI_PWR_UP			0x04
+#define RESET				0
+#define POWERUP				BIT(0)
+
+#define DSI_CLKMGR_CFG			0x08
+#define TO_CLK_DIVIDSION(div)		(((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVIDSION(div)	(((div) & 0xff) << 0)
+
+#define DSI_DPI_VCID			0x0c
+#define DPI_VID(vid)			(((vid) & 0x3) << 0)
+
+#define DSI_DPI_COLOR_CODING		0x10
+#define EN18_LOOSELY			BIT(8)
+#define DPI_COLOR_CODING_16BIT_1	0x0
+#define DPI_COLOR_CODING_16BIT_2	0x1
+#define DPI_COLOR_CODING_16BIT_3	0x2
+#define DPI_COLOR_CODING_18BIT_1	0x3
+#define DPI_COLOR_CODING_18BIT_2	0x4
+#define DPI_COLOR_CODING_24BIT		0x5
+
+#define DSI_DPI_CFG_POL			0x14
+#define COLORM_ACTIVE_LOW		BIT(4)
+#define SHUTD_ACTIVE_LOW		BIT(3)
+#define HSYNC_ACTIVE_LOW		BIT(2)
+#define VSYNC_ACTIVE_LOW		BIT(1)
+#define DATAEN_ACTIVE_LOW		BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM		0x18
+#define OUTVACT_LPCMD_TIME(p)		(((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p)		((p) & 0xff)
+
+#define DSI_DBI_CFG			0x20
+#define DSI_DBI_CMDSIZE			0x28
+
+#define DSI_PCKHDL_CFG			0x2c
+#define EN_CRC_RX			BIT(4)
+#define EN_ECC_RX			BIT(3)
+#define EN_BTA				BIT(2)
+#define EN_EOTP_RX			BIT(1)
+#define EN_EOTP_TX			BIT(0)
+
+#define DSI_MODE_CFG			0x34
+#define ENABLE_VIDEO_MODE		0
+#define ENABLE_CMD_MODE			BIT(0)
+
+#define DSI_VID_MODE_CFG		0x38
+#define FRAME_BTA_ACK			BIT(14)
+#define ENABLE_LOW_POWER		(0x3f << 8)
+#define ENABLE_LOW_POWER_MASK		(0x3f << 8)
+#define VID_MODE_TYPE_BURST_SYNC_PULSES		0x2
+#define VID_MODE_TYPE_MASK			0x3
+
+#define DSI_VID_PKT_SIZE		0x3c
+#define VID_PKT_SIZE(p)			(((p) & 0x3fff) << 0)
+#define VID_PKT_MAX_SIZE		0x3fff
+
+#define DSI_VID_HSA_TIME		0x48
+#define DSI_VID_HBP_TIME		0x4c
+#define DSI_VID_HLINE_TIME		0x50
+#define DSI_VID_VSA_LINES		0x54
+#define DSI_VID_VBP_LINES		0x58
+#define DSI_VID_VFP_LINES		0x5c
+#define DSI_VID_VACTIVE_LINES		0x60
+#define DSI_CMD_MODE_CFG		0x68
+#define MAX_RD_PKT_SIZE_LP		BIT(24)
+#define DCS_LW_TX_LP			BIT(19)
+#define DCS_SR_0P_TX_LP			BIT(18)
+#define DCS_SW_1P_TX_LP			BIT(17)
+#define DCS_SW_0P_TX_LP			BIT(16)
+#define GEN_LW_TX_LP			BIT(14)
+#define GEN_SR_2P_TX_LP			BIT(13)
+#define GEN_SR_1P_TX_LP			BIT(12)
+#define GEN_SR_0P_TX_LP			BIT(11)
+#define GEN_SW_2P_TX_LP			BIT(10)
+#define GEN_SW_1P_TX_LP			BIT(9)
+#define GEN_SW_0P_TX_LP			BIT(8)
+#define EN_ACK_RQST			BIT(1)
+#define EN_TEAR_FX			BIT(0)
+
+#define CMD_MODE_ALL_LP			(MAX_RD_PKT_SIZE_LP | \
+					 DCS_LW_TX_LP | \
+					 DCS_SR_0P_TX_LP | \
+					 DCS_SW_1P_TX_LP | \
+					 DCS_SW_0P_TX_LP | \
+					 GEN_LW_TX_LP | \
+					 GEN_SR_2P_TX_LP | \
+					 GEN_SR_1P_TX_LP | \
+					 GEN_SR_0P_TX_LP | \
+					 GEN_SW_2P_TX_LP | \
+					 GEN_SW_1P_TX_LP | \
+					 GEN_SW_0P_TX_LP)
+
+#define DSI_GEN_HDR			0x6c
+#define GEN_HDATA(data)			(((data) & 0xffff) << 8)
+#define GEN_HDATA_MASK			(0xffff << 8)
+#define GEN_HTYPE(type)			(((type) & 0xff) << 0)
+#define GEN_HTYPE_MASK			0xff
+
+#define DSI_GEN_PLD_DATA		0x70
+
+#define DSI_CMD_PKT_STATUS		0x74
+#define GEN_CMD_EMPTY			BIT(0)
+#define GEN_CMD_FULL			BIT(1)
+#define GEN_PLD_W_EMPTY			BIT(2)
+#define GEN_PLD_W_FULL			BIT(3)
+#define GEN_PLD_R_EMPTY			BIT(4)
+#define GEN_PLD_R_FULL			BIT(5)
+#define GEN_RD_CMD_BUSY			BIT(6)
+
+#define DSI_TO_CNT_CFG			0x78
+#define HSTX_TO_CNT(p)			(((p) & 0xffff) << 16)
+#define LPRX_TO_CNT(p)			((p) & 0xffff)
+
+#define DSI_BTA_TO_CNT			0x8c
+#define DSI_LPCLK_CTRL			0x94
+#define AUTO_CLKLANE_CTRL		BIT(1)
+#define PHY_TXREQUESTCLKHS		BIT(0)
+
+#define DSI_PHY_TMR_LPCLK_CFG		0x98
+#define PHY_CLKHS2LP_TIME(lbcc)		(((lbcc) & 0x3ff) << 16)
+#define PHY_CLKLP2HS_TIME(lbcc)		((lbcc) & 0x3ff)
+
+#define DSI_PHY_TMR_CFG			0x9c
+#define PHY_HS2LP_TIME(lbcc)		(((lbcc) & 0xff) << 24)
+#define PHY_LP2HS_TIME(lbcc)		(((lbcc) & 0xff) << 16)
+#define MAX_RD_TIME(lbcc)		((lbcc) & 0x7fff)
+
+#define DSI_PHY_RSTZ			0xa0
+#define PHY_DISFORCEPLL			0
+#define PHY_ENFORCEPLL			BIT(3)
+#define PHY_DISABLECLK			0
+#define PHY_ENABLECLK			BIT(2)
+#define PHY_RSTZ			0
+#define PHY_UNRSTZ			BIT(1)
+#define PHY_SHUTDOWNZ			0
+#define PHY_UNSHUTDOWNZ			BIT(0)
+
+#define DSI_PHY_IF_CFG			0xa4
+#define N_LANES(n)			((((n) - 1) & 0x3) << 0)
+#define PHY_STOP_WAIT_TIME(cycle)	(((cycle) & 0xff) << 8)
+
+#define DSI_PHY_STATUS			0xb0
+#define LOCK				BIT(0)
+#define STOP_STATE_CLK_LANE		BIT(2)
+
+#define DSI_PHY_TST_CTRL0		0xb4
+#define PHY_TESTCLK			BIT(1)
+#define PHY_UNTESTCLK			0
+#define PHY_TESTCLR			BIT(0)
+#define PHY_UNTESTCLR			0
+
+#define DSI_PHY_TST_CTRL1		0xb8
+#define PHY_TESTEN			BIT(16)
+#define PHY_UNTESTEN			0
+#define PHY_TESTDOUT(n)			(((n) & 0xff) << 8)
+#define PHY_TESTDIN(n)			(((n) & 0xff) << 0)
+
+#define DSI_INT_ST0			0xbc
+#define DSI_INT_ST1			0xc0
+#define DSI_INT_MSK0			0xc4
+#define DSI_INT_MSK1			0xc8
+
+#define PHY_STATUS_TIMEOUT_US		10000
+#define CMD_PKT_STATUS_TIMEOUT_US	20000
+
+#define BYPASS_VCO_RANGE	BIT(7)
+#define VCO_RANGE_CON_SEL(val)	(((val) & 0x7) << 3)
+#define VCO_IN_CAP_CON_DEFAULT	(0x0 << 1)
+#define VCO_IN_CAP_CON_LOW	(0x1 << 1)
+#define VCO_IN_CAP_CON_HIGH	(0x2 << 1)
+#define REF_BIAS_CUR_SEL	BIT(0)
+
+#define CP_CURRENT_3MA		BIT(3)
+#define CP_PROGRAM_EN		BIT(7)
+#define LPF_PROGRAM_EN		BIT(6)
+#define LPF_RESISTORS_20_KOHM	0
+
+#define HSFREQRANGE_SEL(val)	(((val) & 0x3f) << 1)
+
+#define INPUT_DIVIDER(val)	((val - 1) & 0x7f)
+#define LOW_PROGRAM_EN		0
+#define HIGH_PROGRAM_EN		BIT(7)
+#define LOOP_DIV_LOW_SEL(val)	((val - 1) & 0x1f)
+#define LOOP_DIV_HIGH_SEL(val)	(((val - 1) >> 5) & 0x1f)
+#define PLL_LOOP_DIV_EN		BIT(5)
+#define PLL_INPUT_DIV_EN	BIT(4)
+
+#define POWER_CONTROL		BIT(6)
+#define INTERNAL_REG_CURRENT	BIT(3)
+#define BIAS_BLOCK_ON		BIT(2)
+#define BANDGAP_ON		BIT(0)
+
+#define TER_RESISTOR_HIGH	BIT(7)
+#define	TER_RESISTOR_LOW	0
+#define LEVEL_SHIFTERS_ON	BIT(6)
+#define TER_CAL_DONE		BIT(5)
+#define SETRD_MAX		(0x7 << 2)
+#define POWER_MANAGE		BIT(1)
+#define TER_RESISTORS_ON	BIT(0)
+
+#define BIASEXTR_SEL(val)	((val) & 0x7)
+#define BANDGAP_SEL(val)	((val) & 0x7)
+#define TLP_PROGRAM_EN		BIT(7)
+#define THS_PRE_PROGRAM_EN	BIT(7)
+#define THS_ZERO_PROGRAM_EN	BIT(6)
+
+enum {
+	BANDGAP_97_07,
+	BANDGAP_98_05,
+	BANDGAP_99_02,
+	BANDGAP_100_00,
+	BANDGAP_93_17,
+	BANDGAP_94_15,
+	BANDGAP_95_12,
+	BANDGAP_96_10,
+};
+
+enum {
+	BIASEXTR_87_1,
+	BIASEXTR_91_5,
+	BIASEXTR_95_9,
+	BIASEXTR_100,
+	BIASEXTR_105_94,
+	BIASEXTR_111_88,
+	BIASEXTR_118_8,
+	BIASEXTR_127_7,
+};
+
+struct dw_mipi_dsi_plat_data {
+	u32 dsi0_en_bit;
+	u32 dsi1_en_bit;
+	u32 grf_switch_reg;
+	u32 grf_dsi0_mode;
+	u32 grf_dsi0_mode_reg;
+	unsigned int max_data_lanes;
+	u32 max_bit_rate_per_lane;
+	bool has_vop_sel;
+};
+
+struct dw_mipi_dsi {
+	void *base;
+	void *grf;
+
+	unsigned int lane_mbps; /* per lane */
+	u32 channel;
+	u32 lanes;
+	u32 format;
+	u32 mode_flags;
+	u16 input_div;
+	u16 feedback_div;
+	struct drm_display_mode *mode;
+
+	const struct dw_mipi_dsi_plat_data *pdata;
+};
+
+enum dw_mipi_dsi_mode {
+	DW_MIPI_DSI_CMD_MODE,
+	DW_MIPI_DSI_VID_MODE,
+};
+
+struct dphy_pll_testdin_map {
+	unsigned int max_mbps;
+	u8 testdin;
+};
+
+/* The table is based on 27MHz DPHY pll reference clock. */
+static const struct dphy_pll_testdin_map dptdin_map[] = {
+	{  90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
+	{ 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
+	{ 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
+	{ 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
+	{ 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
+	{ 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
+	{ 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
+	{1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
+	{1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
+	{1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
+};
+
+static int max_mbps_to_testdin(unsigned int max_mbps)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(dptdin_map); i++)
+		if (dptdin_map[i].max_mbps > max_mbps)
+			return dptdin_map[i].testdin;
+
+	return -EINVAL;
+}
+
+/*
+ * The controller should generate 2 frames before
+ * preparing the peripheral.
+ */
+static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
+{
+	int refresh, two_frames;
+
+	refresh = drm_mode_vrefresh(dsi->mode);
+	two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
+	mdelay(two_frames);
+}
+
+static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)
+{
+	writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
+{
+	return readl(dsi->base + reg);
+}
+
+static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
+				 u8 test_data)
+{
+	/*
+	 * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
+	 * is latched internally as the current test code. Test data is
+	 * programmed internally by rising edge on TESTCLK.
+	 */
+	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) |
+					  PHY_TESTDIN(test_code));
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR);
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) |
+					  PHY_TESTDIN(test_data));
+
+	dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+}
+
+static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
+{
+	int ret, testdin, vco, val;
+
+	vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
+
+	testdin = max_mbps_to_testdin(dsi->lane_mbps);
+	if (testdin < 0) {
+		printf("failed to get testdin for %dmbps lane clock\n",
+		       dsi->lane_mbps);
+		return testdin;
+	}
+
+	dsi_write(dsi, DSI_PWR_UP, POWERUP);
+
+	dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
+					 VCO_RANGE_CON_SEL(vco) |
+					 VCO_IN_CAP_CON_LOW |
+					 REF_BIAS_CUR_SEL);
+
+	dw_mipi_dsi_phy_write(dsi, 0x11, CP_CURRENT_3MA);
+	dw_mipi_dsi_phy_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
+					 LPF_RESISTORS_20_KOHM);
+
+	dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
+
+	dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+	dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->input_div));
+	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_LOW_SEL(dsi->feedback_div) |
+					 LOW_PROGRAM_EN);
+	dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_HIGH_SEL(dsi->feedback_div) |
+					 HIGH_PROGRAM_EN);
+
+	dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
+					 BIAS_BLOCK_ON | BANDGAP_ON);
+
+	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
+					 SETRD_MAX | TER_RESISTORS_ON);
+	dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
+					 SETRD_MAX | POWER_MANAGE |
+					 TER_RESISTORS_ON);
+
+	dw_mipi_dsi_phy_write(dsi, 0x22, LOW_PROGRAM_EN |
+					 BIASEXTR_SEL(BIASEXTR_127_7));
+	dw_mipi_dsi_phy_write(dsi, 0x22, HIGH_PROGRAM_EN |
+					 BANDGAP_SEL(BANDGAP_96_10));
+
+	dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
+	dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x55);
+	dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
+				     PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+				 val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("failed to wait for phy lock state\n");
+		return ret;
+	}
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+				 val, val & STOP_STATE_CLK_LANE, 1000,
+				 PHY_STATUS_TIMEOUT_US);
+	if (ret < 0)
+		printf("failed to wait for phy clk lane stop state\n");
+
+	return ret;
+}
+
+static unsigned long dw_mipi_dsi_set_pll(struct dw_mipi_dsi *dsi,
+					 unsigned long rate)
+{
+	unsigned int i, pre;
+	unsigned long pllref, tmp;
+	unsigned int m = 1, n = 1;
+
+	pllref = 24000000;
+	tmp = pllref;
+
+	for (i = 1; i < 6; i++) {
+		pre = pllref / i;
+		if ((tmp > (rate % pre)) && (rate / pre < 512)) {
+			tmp = rate % pre;
+			n = i;
+			m = rate / pre;
+		}
+		if (tmp == 0)
+			break;
+	}
+
+	dsi->input_div = n;
+	dsi->feedback_div = m;
+
+	return pllref * m / n;
+}
+
+static unsigned long dw_mipi_dsi_calc_link_bandwidth(struct dw_mipi_dsi *dsi)
+{
+	unsigned long mpclk, tmp;
+	unsigned int target_mbps = 1000, max_mbps;
+	int bpp;
+
+	max_mbps = dsi->pdata->max_bit_rate_per_lane / USEC_PER_SEC;
+
+	bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
+	if (bpp < 0) {
+		printf("failed to get bpp for pixel format %d\n", dsi->format);
+		return bpp;
+	}
+
+	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
+	if (mpclk) {
+		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
+		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
+		if (tmp < max_mbps)
+			target_mbps = tmp;
+		else
+			printf("DPHY clock frequency is out of range\n");
+	}
+
+	return target_mbps * USEC_PER_SEC;
+}
+
+static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 val)
+{
+	int ret;
+	int sts = 0;
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, !(sts & GEN_CMD_FULL), 1000,
+				 CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("failed to get available command FIFO\n");
+		return ret;
+	}
+
+	dsi_write(dsi, DSI_GEN_HDR, val);
+
+	ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+				 sts, sts & (GEN_CMD_EMPTY | GEN_PLD_W_EMPTY),
+				 1000, CMD_PKT_STATUS_TIMEOUT_US);
+	if (ret < 0) {
+		printf("failed to write command FIFO\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dw_mipi_dsi_short_write(struct dw_mipi_dsi *dsi,
+				   const struct mipi_dsi_msg *msg)
+{
+	const u16 *tx_buf = msg->tx_buf;
+	u32 val = GEN_HDATA(*tx_buf) | GEN_HTYPE(msg->type);
+
+	if (msg->tx_len > 2) {
+		printf("too long tx buf length %zu for short write\n",
+		       msg->tx_len);
+		return -EINVAL;
+	}
+
+	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+}
+
+static int dw_mipi_dsi_long_write(struct dw_mipi_dsi *dsi,
+				  const struct mipi_dsi_msg *msg)
+{
+	const u32 *tx_buf = msg->tx_buf;
+	int len = msg->tx_len, pld_data_bytes = sizeof(*tx_buf), ret;
+	u32 val = GEN_HDATA(msg->tx_len) | GEN_HTYPE(msg->type);
+	u32 remainder = 0;
+	u32 sts = 0;
+
+	if (msg->tx_len < 3) {
+		printf("wrong tx buf length %zu for long write\n",
+		       msg->tx_len);
+		return -EINVAL;
+	}
+
+	while (DIV_ROUND_UP(len, pld_data_bytes)) {
+		if (len < pld_data_bytes) {
+			memcpy(&remainder, tx_buf, len);
+			dsi_write(dsi, DSI_GEN_PLD_DATA, remainder);
+			len = 0;
+		} else {
+			dsi_write(dsi, DSI_GEN_PLD_DATA, *tx_buf);
+			tx_buf++;
+			len -= pld_data_bytes;
+		}
+
+		ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+					 sts, !(sts & GEN_PLD_W_FULL), 1000,
+					 CMD_PKT_STATUS_TIMEOUT_US);
+		if (ret < 0) {
+			printf("failed to get available write payload FIFO\n");
+			return ret;
+		}
+	}
+
+	return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+}
+
+static ssize_t rockchip_dw_mipi_dsi_transfer(struct display_state *state,
+					     const struct mipi_dsi_msg *msg)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+	int ret;
+
+	switch (msg->type) {
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		ret = dw_mipi_dsi_short_write(dsi, msg);
+		break;
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+		ret = dw_mipi_dsi_long_write(dsi, msg);
+		break;
+	default:
+		printf("unsupport packet data type: %d\n", msg->type);
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
+static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
+{
+	u32 val;
+
+	val = VID_MODE_TYPE_BURST_SYNC_PULSES | ENABLE_LOW_POWER;
+
+	dsi_write(dsi, DSI_VID_MODE_CFG, val);
+}
+
+static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
+				 enum dw_mipi_dsi_mode mode)
+{
+	if (mode == DW_MIPI_DSI_CMD_MODE) {
+		dsi_write(dsi, DSI_PWR_UP, RESET);
+		dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+		dsi_write(dsi, DSI_PWR_UP, POWERUP);
+	} else {
+		dsi_write(dsi, DSI_PWR_UP, RESET);
+		dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
+		dw_mipi_dsi_video_mode_config(dsi);
+		dsi_write(dsi, DSI_PWR_UP, POWERUP);
+	}
+}
+
+static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PWR_UP, RESET);
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ);
+}
+
+static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PWR_UP, RESET);
+	dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
+		  | PHY_RSTZ | PHY_SHUTDOWNZ);
+	dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
+		  TX_ESC_CLK_DIVIDSION(7));
+	dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+}
+
+static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
+				   struct drm_display_mode *mode)
+{
+	u32 val = 0, color = 0;
+
+	switch (dsi->format) {
+	case MIPI_DSI_FMT_RGB888:
+		color = DPI_COLOR_CODING_24BIT;
+		break;
+	case MIPI_DSI_FMT_RGB666:
+		color = DPI_COLOR_CODING_18BIT_2 | EN18_LOOSELY;
+		break;
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		color = DPI_COLOR_CODING_18BIT_1;
+		break;
+	case MIPI_DSI_FMT_RGB565:
+		color = DPI_COLOR_CODING_16BIT_1;
+		break;
+	}
+
+	if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+		val |= VSYNC_ACTIVE_LOW;
+	if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+		val |= HSYNC_ACTIVE_LOW;
+
+	dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
+	dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
+	dsi_write(dsi, DSI_DPI_CFG_POL, val);
+	dsi_write(dsi, DSI_DPI_LP_CMD_TIM, OUTVACT_LPCMD_TIME(4)
+		  | INVACT_LPCMD_TIME(4));
+}
+
+static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PCKHDL_CFG, EN_CRC_RX | EN_ECC_RX | EN_BTA);
+}
+
+static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
+					    struct drm_display_mode *mode)
+{
+	dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));
+}
+
+static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));
+	dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
+	dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
+	dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+}
+
+/* Get lane byte clock cycles. */
+static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
+					   u32 hcomponent)
+{
+	u32 frac, lbcc;
+
+	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
+
+	frac = lbcc % dsi->mode->clock;
+	lbcc = lbcc / dsi->mode->clock;
+	if (frac)
+		lbcc++;
+
+	return lbcc;
+}
+
+static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
+{
+	u32 htotal, hsa, hbp, lbcc;
+	struct drm_display_mode *mode = dsi->mode;
+
+	htotal = mode->htotal;
+	hsa = mode->hsync_end - mode->hsync_start;
+	hbp = mode->htotal - mode->hsync_end;
+
+	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal);
+	dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);
+
+	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa);
+	dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);
+
+	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp);
+	dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);
+}
+
+static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
+{
+	u32 vactive, vsa, vfp, vbp;
+	struct drm_display_mode *mode = dsi->mode;
+
+	vactive = mode->vdisplay;
+	vsa = mode->vsync_end - mode->vsync_start;
+	vfp = mode->vsync_start - mode->vdisplay;
+	vbp = mode->vtotal - mode->vsync_end;
+
+	dsi_write(dsi, DSI_VID_VACTIVE_LINES, vactive);
+	dsi_write(dsi, DSI_VID_VSA_LINES, vsa);
+	dsi_write(dsi, DSI_VID_VFP_LINES, vfp);
+	dsi_write(dsi, DSI_VID_VBP_LINES, vbp);
+}
+
+static void dw_mipi_dsi_dphy_timing_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME(0x14)
+		  | PHY_LP2HS_TIME(0x10) | MAX_RD_TIME(10000));
+
+	dsi_write(dsi, DSI_PHY_TMR_LPCLK_CFG, PHY_CLKHS2LP_TIME(0x40)
+		  | PHY_CLKLP2HS_TIME(0x40));
+}
+
+static void dw_mipi_dsi_dphy_interface_config(struct dw_mipi_dsi *dsi)
+{
+	dsi_write(dsi, DSI_PHY_IF_CFG, PHY_STOP_WAIT_TIME(0x20) |
+		  N_LANES(dsi->lanes));
+}
+
+static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
+{
+	dsi_read(dsi, DSI_INT_ST0);
+	dsi_read(dsi, DSI_INT_ST1);
+	dsi_write(dsi, DSI_INT_MSK0, 0);
+	dsi_write(dsi, DSI_INT_MSK1, 0);
+}
+
+const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+	.dsi0_en_bit = RK3288_DSI0_SEL_VOP_LIT,
+	.dsi1_en_bit = RK3288_DSI1_SEL_VOP_LIT,
+	.grf_switch_reg = RK3288_GRF_SOC_CON6,
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1500000000,
+	.has_vop_sel = true,
+};
+
+const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data = {
+	.dsi0_en_bit = BIT(2),
+	.grf_switch_reg = 0x0400,
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1000000000,
+	.has_vop_sel = true,
+};
+
+const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data = {
+	.max_bit_rate_per_lane = 1000000000,
+	.max_data_lanes = 4,
+};
+
+const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
+	.dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
+	.dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
+	.grf_switch_reg = RK3399_GRF_SOC_CON19,
+	.grf_dsi0_mode = RK3399_GRF_DSI_MODE,
+	.grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
+	.max_data_lanes = 4,
+	.max_bit_rate_per_lane = 1500000000,
+	.has_vop_sel = true,
+};
+
+static int dw_mipi_dsi_clk_enable(struct dw_mipi_dsi *dsi)
+{
+	return 0;
+}
+
+static int rockchip_dw_mipi_dsi_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
+	int mipi_node = conn_state->node;
+	struct dw_mipi_dsi *dsi;
+	int panel;
+
+	dsi = malloc(sizeof(*dsi));
+	if (!dsi)
+		return -ENOMEM;
+
+	dsi->base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+						mipi_node, "reg", 0, NULL, false);
+	dsi->pdata = pdata;
+	conn_state->private = dsi;
+	conn_state->type = DRM_MODE_CONNECTOR_DSI;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	panel = fdt_subnode_offset(state->blob, mipi_node, "panel");
+	if (panel < 0) {
+		printf("failed to find panel node\n");
+		return -1;
+	}
+
+#define FDT_GET_INT(val, name) \
+	val = fdtdec_get_int(state->blob, panel, name, -1); \
+	if (val < 0) { \
+		printf("Can't get %s\n", name); \
+		return -1; \
+	}
+
+	FDT_GET_INT(dsi->lanes, "dsi,lanes");
+	FDT_GET_INT(dsi->format, "dsi,format");
+	FDT_GET_INT(dsi->mode_flags, "dsi,mode_flags");
+	FDT_GET_INT(dsi->channel, "reg");
+
+	dsi->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (dsi->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, dsi->grf);
+		return  -ENXIO;
+	}
+
+	return 0;
+}
+
+static void rockchip_dw_mipi_dsi_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	free(dsi);
+}
+
+static int rockchip_dw_mipi_dsi_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+	unsigned long bw, rate;
+
+	dsi->mode = &conn_state->mode;
+
+	dw_mipi_dsi_clk_enable(dsi);
+
+	rockchip_phy_power_on(state);
+
+	bw = dw_mipi_dsi_calc_link_bandwidth(dsi);
+
+	if (conn_state->phy)
+		rate = rockchip_phy_set_pll(state, bw);
+	else
+		rate = dw_mipi_dsi_set_pll(dsi, bw);
+
+	dsi->lane_mbps = rate / USEC_PER_SEC;
+
+	printf("final DSI-Link bandwidth: %u Mbps x %d\n",
+	       dsi->lane_mbps, dsi->lanes);
+
+	dw_mipi_dsi_init(dsi);
+	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
+	dw_mipi_dsi_packet_handler_config(dsi);
+	dw_mipi_dsi_video_mode_config(dsi);
+	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
+	dw_mipi_dsi_command_mode_config(dsi);
+	dw_mipi_dsi_line_timer_config(dsi);
+	dw_mipi_dsi_vertical_timing_config(dsi);
+	dw_mipi_dsi_dphy_timing_config(dsi);
+	dw_mipi_dsi_dphy_interface_config(dsi);
+	dw_mipi_dsi_clear_err(dsi);
+
+	return 0;
+}
+
+static int rockchip_dw_mipi_dsi_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct dw_mipi_dsi_plat_data *pdata = connector->data;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+	u32 val;
+
+	if (pdata->grf_dsi0_mode_reg)
+		writel(pdata->grf_dsi0_mode,
+		       dsi->grf + pdata->grf_dsi0_mode_reg);
+
+	if (!conn_state->phy)
+		dw_mipi_dsi_phy_init(dsi);
+	dw_mipi_dsi_wait_for_two_frames(dsi);
+
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+
+	if (!pdata->has_vop_sel)
+		return 0;
+
+	if (pdata->grf_switch_reg) {
+		if (crtc_state->crtc_id)
+			val = pdata->dsi0_en_bit | (pdata->dsi0_en_bit << 16);
+		else
+			val = pdata->dsi0_en_bit << 16;
+
+		writel(val, dsi->grf + pdata->grf_switch_reg);
+	}
+	debug("vop %s output to dsi0\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
+
+	return 0;
+}
+
+static int rockchip_dw_mipi_dsi_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct dw_mipi_dsi *dsi = conn_state->private;
+
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+
+	/*
+	 * This is necessary to make sure the peripheral will be driven
+	 * normally when the display is enabled again later.
+	 */
+	mdelay(120);
+
+	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
+	dw_mipi_dsi_disable(dsi);
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs = {
+	.init = rockchip_dw_mipi_dsi_init,
+	.deinit = rockchip_dw_mipi_dsi_deinit,
+	.prepare = rockchip_dw_mipi_dsi_prepare,
+	.enable = rockchip_dw_mipi_dsi_enable,
+	.disable = rockchip_dw_mipi_dsi_disable,
+	.transfer = rockchip_dw_mipi_dsi_transfer,
+};
+
+static const struct rockchip_connector rk3288_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3288_mipi_dsi_drv_data,
+};
+
+static const struct rockchip_connector rk3366_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3366_mipi_dsi_drv_data,
+};
+
+static const struct rockchip_connector rk3368_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3368_mipi_dsi_drv_data,
+};
+
+const struct rockchip_connector rk3399_mipi_dsi_data = {
+	 .funcs = &rockchip_dw_mipi_dsi_funcs,
+	 .data = &rk3399_mipi_dsi_drv_data,
+};
+
+static const struct udevice_id rockchip_mipi_dsi_ids[] = {
+	{
+	 .compatible = "rockchip,rk3288-mipi-dsi",
+	 .data = (ulong)&rk3288_mipi_dsi_data,
+	},{
+	 .compatible = "rockchip,rk3366-mipi-dsi",
+	 .data = (ulong)&rk3366_mipi_dsi_data,
+	},{
+	 .compatible = "rockchip,rk3368-mipi-dsi",
+	 .data = (ulong)&rk3368_mipi_dsi_data,
+	},{
+	 .compatible = "rockchip,rk3399-mipi-dsi",
+	 .data = (ulong)&rk3399_mipi_dsi_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_mipi_dsi) = {
+	.name = "rockchip_mipi_dsi",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_mipi_dsi_ids,
+};
diff --git a/drivers/video/drm/rockchip-inno-mipi-dphy.c b/drivers/video/drm/rockchip-inno-mipi-dphy.c
new file mode 100644
index 0000000000..9b0c073e61
--- /dev/null
+++ b/drivers/video/drm/rockchip-inno-mipi-dphy.c
@@ -0,0 +1,583 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <div64.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+#include "rockchip_mipi_dsi.h"
+
+/* Innosilicon MIPI D-PHY registers */
+#define INNO_PHY_LANE_CTRL	0x00000
+#define CLK_LANE_EN_MASK	BIT(6)
+#define DATA_LANE_3_EN_MASK	BIT(5)
+#define DATA_LANE_2_EN_MASK	BIT(4)
+#define DATA_LANE_1_EN_MASK	BIT(3)
+#define DATA_LANE_0_EN_MASK	BIT(2)
+#define CLK_LANE_EN		BIT(6)
+#define DATA_LANE_3_EN		BIT(5)
+#define DATA_LANE_2_EN		BIT(4)
+#define DATA_LANE_1_EN		BIT(3)
+#define DATA_LANE_0_EN		BIT(2)
+#define INNO_PHY_POWER_CTRL	0x00004
+#define ANALOG_RESET_MASK	BIT(2)
+#define ANALOG_RESET		BIT(2)
+#define ANALOG_NORMAL		0
+#define LDO_POWER_MASK		BIT(1)
+#define LDO_POWER_DOWN		BIT(1)
+#define LDO_POWER_ON		0
+#define PLL_POWER_MASK		BIT(0)
+#define PLL_POWER_DOWN		BIT(0)
+#define PLL_POWER_ON		0
+#define INNO_PHY_PLL_CTRL_0	0x0000c
+#define FBDIV_HI_MASK		BIT(5)
+#define FBDIV_HI(x)		UPDATE(x, 5, 5)
+#define PREDIV_MASK		GENMASK(4, 0)
+#define PREDIV(x)		UPDATE(x, 4, 0)
+#define INNO_PHY_PLL_CTRL_1	0x00010
+#define FBDIV_LO_MASK		GENMASK(7, 0)
+#define FBDIV_LO(x)		UPDATE(x, 7, 0)
+#define INNO_PHY_DIG_CTRL	0x00080
+#define DIGITAL_RESET_MASK	BIT(0)
+#define DIGITAL_NORMAL		BIT(0)
+#define DIGITAL_RESET		0
+
+#define INNO_CLOCK_LANE_REG_BASE	0x00100
+#define INNO_DATA_LANE_0_REG_BASE	0x00180
+#define INNO_DATA_LANE_1_REG_BASE	0x00200
+#define INNO_DATA_LANE_2_REG_BASE	0x00280
+#define INNO_DATA_LANE_3_REG_BASE	0x00300
+
+#define T_LPX_OFFSET		0x00014
+#define T_HS_PREPARE_OFFSET	0x00018
+#define T_HS_ZERO_OFFSET	0x0001c
+#define T_HS_TRAIL_OFFSET	0x00020
+#define T_HS_EXIT_OFFSET	0x00024
+#define T_CLK_POST_OFFSET	0x00028
+#define T_WAKUP_H_OFFSET	0x00030
+#define T_WAKUP_L_OFFSET	0x00034
+#define T_CLK_PRE_OFFSET	0x00038
+#define T_TA_GO_OFFSET		0x00040
+#define T_TA_SURE_OFFSET	0x00044
+#define T_TA_WAIT_OFFSET	0x00048
+
+#define T_LPX_MASK		GENMASK(5, 0)
+#define T_LPX(x)		UPDATE(x, 5, 0)
+#define T_HS_PREPARE_MASK	GENMASK(6, 0)
+#define T_HS_PREPARE(x)		UPDATE(x, 6, 0)
+#define T_HS_ZERO_MASK		GENMASK(5, 0)
+#define T_HS_ZERO(x)		UPDATE(x, 5, 0)
+#define T_HS_TRAIL_MASK		GENMASK(6, 0)
+#define T_HS_TRAIL(x)		UPDATE(x, 6, 0)
+#define T_HS_EXIT_MASK		GENMASK(4, 0)
+#define T_HS_EXIT(x)		UPDATE(x, 4, 0)
+#define T_CLK_POST_MASK		GENMASK(3, 0)
+#define T_CLK_POST(x)		UPDATE(x, 3, 0)
+#define T_WAKUP_H_MASK		GENMASK(1, 0)
+#define T_WAKUP_H(x)		UPDATE(x, 1, 0)
+#define T_WAKUP_L_MASK		GENMASK(7, 0)
+#define T_WAKUP_L(x)		UPDATE(x, 7, 0)
+#define T_CLK_PRE_MASK		GENMASK(3, 0)
+#define T_CLK_PRE(x)		UPDATE(x, 3, 0)
+#define T_TA_GO_MASK		GENMASK(5, 0)
+#define T_TA_GO(x)		UPDATE(x, 5, 0)
+#define T_TA_SURE_MASK		GENMASK(5, 0)
+#define T_TA_SURE(x)		UPDATE(x, 5, 0)
+#define T_TA_WAIT_MASK		GENMASK(5, 0)
+#define T_TA_WAIT(x)		UPDATE(x, 5, 0)
+
+enum lane_type {
+	CLOCK_LANE,
+	DATA_LANE_0,
+	DATA_LANE_1,
+	DATA_LANE_2,
+	DATA_LANE_3,
+};
+
+struct inno_mipi_dphy_timing {
+	u8 lpx;
+	u8 hs_prepare;
+	u8 hs_zero;
+	u8 hs_trail;
+	u8 hs_exit;
+	u8 clk_post;
+	u8 wakup_h;
+	u8 wakup_l;
+	u8 clk_pre;
+	u8 ta_go;
+	u8 ta_sure;
+	u8 ta_wait;
+};
+
+struct inno_mipi_dphy {
+	const void *blob;
+	int node;
+	u32 regs;
+
+	unsigned int lane_mbps;
+	int lanes;
+	int bpp;
+};
+
+static const u32 lane_reg_offset[] = {
+	[CLOCK_LANE] = INNO_CLOCK_LANE_REG_BASE,
+	[DATA_LANE_0] = INNO_DATA_LANE_0_REG_BASE,
+	[DATA_LANE_1] = INNO_DATA_LANE_1_REG_BASE,
+	[DATA_LANE_2] = INNO_DATA_LANE_2_REG_BASE,
+	[DATA_LANE_3] = INNO_DATA_LANE_3_REG_BASE,
+};
+
+#define FIXED_PARAM(_freq, _prepare, _clk_zero, _data_zero, _trail)	\
+{	\
+	.max_freq = _freq,	\
+	.hs_prepare = _prepare,	\
+	.clk_lane = {	\
+		.hs_zero = _clk_zero,	\
+	},	\
+	.data_lane = {	\
+		.hs_zero = _data_zero,	\
+	},	\
+	.hs_trail = _trail,	\
+}
+
+struct fixed_param {
+	unsigned int max_freq;
+	u8 hs_prepare;
+	struct {
+		u8 hs_zero;
+	} clk_lane;
+	struct {
+		u8 hs_zero;
+	} data_lane;
+	u8 hs_trail;
+};
+
+static const struct fixed_param fixed_param_table[] = {
+	FIXED_PARAM( 110, 0x20, 0x16, 0x02, 0x22),
+	FIXED_PARAM( 150, 0x06, 0x16, 0x03, 0x45),
+	FIXED_PARAM( 200, 0x18, 0x17, 0x04, 0x0b),
+	FIXED_PARAM( 250, 0x05, 0x17, 0x05, 0x16),
+	FIXED_PARAM( 300, 0x51, 0x18, 0x06, 0x2c),
+	FIXED_PARAM( 400, 0x64, 0x19, 0x07, 0x33),
+	FIXED_PARAM( 500, 0x20, 0x1b, 0x07, 0x4e),
+	FIXED_PARAM( 600, 0x6a, 0x1d, 0x08, 0x3a),
+	FIXED_PARAM( 700, 0x3e, 0x1e, 0x08, 0x6a),
+	FIXED_PARAM( 800, 0x21, 0x1f, 0x09, 0x29),
+	FIXED_PARAM(1000, 0x09, 0x20, 0x09, 0x27)
+};
+
+static inline void inno_write(struct inno_mipi_dphy *inno, u32 reg, u32 val)
+{
+	writel(val, inno->regs + reg);
+}
+
+static inline u32 inno_read(struct inno_mipi_dphy *inno, u32 reg)
+{
+	return readl(inno->regs + reg);
+}
+
+static inline void inno_update_bits(struct inno_mipi_dphy *inno, u32 reg,
+				    u32 mask, u32 val)
+{
+	u32 tmp, orig;
+
+	orig = inno_read(inno, reg);
+	tmp = orig & ~mask;
+	tmp |= val & mask;
+	inno_write(inno, reg, tmp);
+}
+
+static void inno_mipi_dphy_timing_update(struct inno_mipi_dphy *inno,
+					 enum lane_type lane_type,
+					 struct inno_mipi_dphy_timing *t)
+{
+	u32 base = lane_reg_offset[lane_type];
+	u32 m, v;
+
+	m = T_HS_PREPARE_MASK;
+	v = T_HS_PREPARE(t->hs_prepare);
+	inno_update_bits(inno, base + T_HS_PREPARE_OFFSET, m, v);
+
+	m = T_HS_ZERO_MASK;
+	v = T_HS_ZERO(t->hs_zero);
+	inno_update_bits(inno, base + T_HS_ZERO_OFFSET, m, v);
+
+	m = T_HS_TRAIL_MASK;
+	v = T_HS_TRAIL(t->hs_trail);
+	inno_update_bits(inno, base + T_HS_TRAIL_OFFSET, m, v);
+
+	m = T_HS_EXIT_MASK;
+	v = T_HS_EXIT(t->hs_exit);
+	inno_update_bits(inno, base + T_HS_EXIT_OFFSET, m, v);
+
+	if (lane_type == CLOCK_LANE) {
+		m = T_CLK_POST_MASK;
+		v = T_CLK_POST(t->clk_post);
+		inno_update_bits(inno, base + T_CLK_POST_OFFSET, m, v);
+
+		m = T_CLK_PRE_MASK;
+		v = T_CLK_PRE(t->clk_pre);
+		inno_update_bits(inno, base + T_CLK_PRE_OFFSET, m, v);
+	}
+
+	m = T_WAKUP_H_MASK;
+	v = T_WAKUP_H(t->wakup_h);
+	inno_update_bits(inno, base + T_WAKUP_H_OFFSET, m, v);
+
+	m = T_WAKUP_L_MASK;
+	v = T_WAKUP_L(t->wakup_l);
+	inno_update_bits(inno, base + T_WAKUP_L_OFFSET, m, v);
+
+	m = T_LPX_MASK;
+	v = T_LPX(t->lpx);
+	inno_update_bits(inno, base + T_LPX_OFFSET, m, v);
+
+	m = T_TA_GO_MASK;
+	v = T_TA_GO(t->ta_go);
+	inno_update_bits(inno, base + T_TA_GO_OFFSET, m, v);
+
+	m = T_TA_SURE_MASK;
+	v = T_TA_SURE(t->ta_sure);
+	inno_update_bits(inno, base + T_TA_SURE_OFFSET, m, v);
+
+	m = T_TA_WAIT_MASK;
+	v = T_TA_WAIT(t->ta_wait);
+	inno_update_bits(inno, base + T_TA_WAIT_OFFSET, m, v);
+}
+
+static void inno_mipi_dphy_get_fixed_param(struct inno_mipi_dphy_timing *t,
+					   unsigned int freq,
+					   enum lane_type lane_type)
+{
+	const struct fixed_param *param;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(fixed_param_table); i++)
+		if (freq <= fixed_param_table[i].max_freq)
+			break;
+
+	if (i == ARRAY_SIZE(fixed_param_table))
+		--i;
+
+	param = &fixed_param_table[i];
+
+	if (lane_type == CLOCK_LANE)
+		t->hs_zero = param->clk_lane.hs_zero;
+	else
+		t->hs_zero = param->data_lane.hs_zero;
+
+	t->hs_prepare = param->hs_prepare;
+	t->hs_trail = param->hs_trail;
+}
+
+static void inno_mipi_dphy_lane_timing_init(struct inno_mipi_dphy *inno,
+					    enum lane_type lane_type)
+{
+	struct mipi_dphy_timing timing;
+	struct inno_mipi_dphy_timing data;
+	unsigned long txbyteclk, txclkesc, UI;
+	unsigned int esc_clk_div;
+
+	memset(&timing, 0, sizeof(timing));
+	memset(&data, 0, sizeof(data));
+
+	txbyteclk = inno->lane_mbps * USEC_PER_SEC / 8;
+	esc_clk_div = DIV_ROUND_UP(txbyteclk, 20000000);
+	txclkesc = txbyteclk / esc_clk_div;
+	UI = DIV_ROUND_CLOSEST(NSEC_PER_USEC, inno->lane_mbps);
+
+	debug("txbyteclk=%lu, txclkesc=%lu, esc_clk_div=%u, UI=%lu\n",
+	      txbyteclk, txclkesc, esc_clk_div, UI);
+
+	mipi_dphy_timing_get_default(&timing, UI);
+	inno_mipi_dphy_get_fixed_param(&data, inno->lane_mbps, lane_type);
+
+	/*
+	 * Ttxbyteclk * val >= Ths-exit
+	 * Ttxbyteclk * val >= Tclk-post
+	 * Ttxbyteclk * val >= Tclk-pre
+	 * Ttxbyteclk * (2 + val) >= Tlpx
+	 */
+	data.hs_exit = DIV_ROUND_UP(timing.hsexit * txbyteclk, NSEC_PER_SEC);
+	data.clk_post = DIV_ROUND_UP(timing.clkpost * txbyteclk, NSEC_PER_SEC);
+	data.clk_pre = DIV_ROUND_UP(timing.clkpre * txbyteclk, NSEC_PER_SEC);
+	data.wakup_h = 0x3;
+	data.wakup_l = 0xff;
+	data.lpx = DIV_ROUND_UP(txbyteclk * timing.lpx, NSEC_PER_SEC);
+	if (data.lpx > 2)
+		data.lpx -= 2;
+
+	/*
+	 * Ttxclkesc * val >= Tta-go
+	 * Ttxclkesc * val >= Tta-sure
+	 * Ttxclkesc * val >= Tta-wait
+	 */
+	data.ta_go = DIV_ROUND_UP(timing.tago * txclkesc, NSEC_PER_SEC);
+	data.ta_sure = DIV_ROUND_UP(timing.tasure * txclkesc, NSEC_PER_SEC);
+	data.ta_wait = DIV_ROUND_UP(timing.taget * txclkesc, NSEC_PER_SEC);
+
+	inno_mipi_dphy_timing_update(inno, lane_type, &data);
+
+#define TIMING_NS(x, freq) (((x) * (DIV_ROUND_CLOSEST(NSEC_PER_SEC, freq))))
+	debug("hs-exit=%lu, clk-post=%lu, clk-pre=%lu, lpx=%lu\n",
+	      TIMING_NS(data.hs_exit, txbyteclk),
+	      TIMING_NS(data.clk_post, txbyteclk),
+	      TIMING_NS(data.clk_pre, txbyteclk),
+	      TIMING_NS(data.lpx + 2, txbyteclk));
+	debug("ta-go=%lu, ta-sure=%lu, ta-wait=%lu\n",
+	      TIMING_NS(data.ta_go, txclkesc),
+	      TIMING_NS(data.ta_sure, txclkesc),
+	      TIMING_NS(data.ta_wait, txclkesc));
+}
+
+static unsigned long inno_mipi_dphy_pll_round_rate(unsigned long fin,
+						   unsigned long fout,
+						   u8 *prediv, u16 *fbdiv)
+{
+	unsigned long best_freq = 0;
+	u8 min_prediv, max_prediv;
+	u8 _prediv, best_prediv = 0;
+	u16 _fbdiv, best_fbdiv = 0;
+	u32 min_delta = 0xffffffff;
+
+	fout *= 2;
+
+	min_prediv = DIV_ROUND_UP(fin, 40000000);
+	max_prediv = fin / 5000000;
+
+	for (_prediv = min_prediv; _prediv <= max_prediv; _prediv++) {
+		u64 tmp;
+		u32 delta;
+		tmp = (u64)fout * _prediv;
+		do_div(tmp, fin);
+		_fbdiv = tmp;
+		if ((_fbdiv == 15) || (_fbdiv < 12) || (_fbdiv > 511))
+			continue;
+		tmp = (u64)_fbdiv * fin;
+		do_div(tmp, _prediv);
+
+		delta = abs(fout - tmp);
+		if (delta < min_delta) {
+			best_prediv = _prediv;
+			best_fbdiv = _fbdiv;
+			min_delta = delta;
+			best_freq = tmp;
+		}
+	}
+
+	if (best_freq) {
+		*prediv = best_prediv;
+		*fbdiv = best_fbdiv;
+	}
+
+	return best_freq / 2;
+}
+
+static inline void inno_mipi_dphy_reset(struct inno_mipi_dphy *inno)
+{
+	/* Reset analog */
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 ANALOG_RESET_MASK, ANALOG_RESET);
+	udelay(1);
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 ANALOG_RESET_MASK, ANALOG_NORMAL);
+	/* Reset digital */
+	inno_update_bits(inno, INNO_PHY_DIG_CTRL,
+			 DIGITAL_RESET_MASK, DIGITAL_RESET);
+	udelay(1);
+	inno_update_bits(inno, INNO_PHY_DIG_CTRL,
+			 DIGITAL_RESET_MASK, DIGITAL_NORMAL);
+}
+
+static void inno_mipi_dphy_timing_init(struct inno_mipi_dphy *inno)
+{
+	switch (inno->lanes) {
+	case 4:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_3);
+		/* Fall through */
+	case 3:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_2);
+		/* Fall through */
+	case 2:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_1);
+		/* Fall through */
+	case 1:
+	default:
+		inno_mipi_dphy_lane_timing_init(inno, DATA_LANE_0);
+		inno_mipi_dphy_lane_timing_init(inno, CLOCK_LANE);
+		break;
+	}
+}
+
+static inline void inno_mipi_dphy_lane_enable(struct inno_mipi_dphy *inno)
+{
+	u32 m = 0, v = 0;
+
+	switch (inno->lanes) {
+	case 4:
+		m |= DATA_LANE_3_EN_MASK;
+		v |= DATA_LANE_3_EN;
+		/* Fall through */
+	case 3:
+		m |= DATA_LANE_2_EN_MASK;
+		v |= DATA_LANE_2_EN;
+		/* Fall through */
+	case 2:
+		m |= DATA_LANE_1_EN_MASK;
+		v |= DATA_LANE_1_EN;
+		/* Fall through */
+	default:
+	case 1:
+		m |= DATA_LANE_0_EN_MASK | CLK_LANE_EN_MASK;
+		v |= DATA_LANE_0_EN | CLK_LANE_EN;
+		break;
+	}
+
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, m, v);
+}
+
+static inline void inno_mipi_dphy_pll_ldo_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 PLL_POWER_MASK | LDO_POWER_MASK,
+			 PLL_POWER_DOWN | LDO_POWER_DOWN);
+}
+
+static inline void inno_mipi_dphy_pll_ldo_enable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_POWER_CTRL,
+			 PLL_POWER_MASK | LDO_POWER_MASK,
+			 PLL_POWER_ON | LDO_POWER_ON);
+}
+
+static int inno_mipi_dphy_power_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_mipi_dphy *inno = conn_state->phy_private;
+
+	inno_mipi_dphy_pll_ldo_enable(inno);
+	inno_mipi_dphy_lane_enable(inno);
+	inno_mipi_dphy_reset(inno);
+	inno_mipi_dphy_timing_init(inno);
+	udelay(1);
+
+	return 0;
+}
+
+static inline void inno_mipi_dphy_lane_disable(struct inno_mipi_dphy *inno)
+{
+	inno_update_bits(inno, INNO_PHY_LANE_CTRL, 0x7c, 0x00);
+}
+
+static int inno_mipi_dphy_power_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_mipi_dphy *inno = conn_state->phy_private;
+
+	inno_mipi_dphy_lane_disable(inno);
+	inno_mipi_dphy_pll_ldo_disable(inno);
+
+	return 0;
+}
+
+static unsigned long inno_mipi_dphy_set_pll(struct display_state *state,
+					    unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct inno_mipi_dphy *inno = conn_state->phy_private;
+	unsigned long fin, fout;
+	u16 fbdiv = 0;
+	u8 prediv = 0;
+	u32 m, v;
+
+	fin = 24000000;
+	fout = inno_mipi_dphy_pll_round_rate(fin, rate, &prediv, &fbdiv);
+
+	printf("%s: fin=%lu, fout=%lu, prediv=%u, fbdiv=%u\n",
+	       __func__, fin, fout, prediv, fbdiv);
+
+	m = FBDIV_HI_MASK | PREDIV_MASK;
+	v = FBDIV_HI(fbdiv >> 8) | PREDIV(prediv);
+	inno_update_bits(inno, INNO_PHY_PLL_CTRL_0, m, v);
+
+	m = FBDIV_LO_MASK;
+	v = FBDIV_LO(fbdiv);
+	inno_update_bits(inno, INNO_PHY_PLL_CTRL_1, m, v);
+
+	inno->lane_mbps = fout / USEC_PER_SEC;
+
+	return fout;
+}
+
+static int inno_mipi_dphy_parse_dt(int panel_node, struct inno_mipi_dphy *inno)
+{
+	const void *blob = inno->blob;
+	int format;
+
+	inno->lanes = fdtdec_get_int(blob, panel_node, "dsi,lanes", -1);
+	if (inno->lanes < 0)
+		inno->lanes = 4;
+
+	format = fdtdec_get_int(blob, panel_node, "dsi,format", -1);
+	inno->bpp = mipi_dsi_pixel_format_to_bpp(format);
+	if (inno->bpp < 0)
+		inno->bpp = 24;
+
+	return 0;
+}
+
+static int inno_mipi_dphy_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	int node = conn_state->phy_node;
+	int panel_node = panel_state->node;
+	struct inno_mipi_dphy *inno;
+	int ret;
+
+	inno = malloc(sizeof(*inno));
+	if (!inno)
+		return -ENOMEM;
+
+	inno->blob = blob;
+	inno->node = node;
+
+	ret = inno_mipi_dphy_parse_dt(panel_node, inno);
+	if (ret) {
+		printf("%s: failed to parse DT\n", __func__);
+		return ret;
+	}
+
+	inno->regs = fdtdec_get_addr_size_auto_noparent(blob, node, "reg",
+							0, NULL, false);
+	if (inno->regs == FDT_ADDR_T_NONE) {
+		printf("%s: failed to get mipi phy address\n", __func__);
+		return -ENOMEM;
+	}
+
+	conn_state->phy_private = inno;
+
+	return 0;
+}
+
+const struct rockchip_phy_funcs inno_mipi_dphy_funcs = {
+	.init = inno_mipi_dphy_init,
+	.power_on = inno_mipi_dphy_power_on,
+	.power_off = inno_mipi_dphy_power_off,
+	.set_pll = inno_mipi_dphy_set_pll,
+};
diff --git a/drivers/video/drm/rockchip_analogix_dp.c b/drivers/video/drm/rockchip_analogix_dp.c
new file mode 100644
index 0000000000..2ba56fce84
--- /dev/null
+++ b/drivers/video/drm/rockchip_analogix_dp.c
@@ -0,0 +1,1045 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <dm/device.h>
+#include <linux/list.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/gpio.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_analogix_dp.h"
+
+/**
+ * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
+ * @lcdsel_grf_reg: grf register offset of lcdc select
+ * @lcdsel_big: reg value of selecting vop big for eDP
+ * @lcdsel_lit: reg value of selecting vop little for eDP
+ */
+struct rockchip_dp_chip_data {
+	u32	lcdsel_grf_reg;
+	u32	lcdsel_big;
+	u32	lcdsel_lit;
+	u32	chip_type;
+	bool	has_vop_sel;
+};
+
+static void
+analogix_dp_enable_rx_to_enhanced_mode(struct analogix_dp_device *dp,
+				       bool enable)
+{
+	u8 data;
+
+	analogix_dp_read_byte_from_dpcd(dp, DP_LANE_COUNT_SET, &data);
+
+	if (enable)
+		analogix_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
+					       DP_LANE_COUNT_ENHANCED_FRAME_EN |
+					       DPCD_LANE_COUNT_SET(data));
+	else
+		analogix_dp_write_byte_to_dpcd(dp, DP_LANE_COUNT_SET,
+					       DPCD_LANE_COUNT_SET(data));
+}
+
+static int analogix_dp_is_enhanced_mode_available(struct analogix_dp_device *dp)
+{
+	u8 data;
+	int retval;
+
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data);
+	retval = DPCD_ENHANCED_FRAME_CAP(data);
+
+	return retval;
+}
+
+static void analogix_dp_set_enhanced_mode(struct analogix_dp_device *dp)
+{
+	u8 data;
+
+	data = analogix_dp_is_enhanced_mode_available(dp);
+	analogix_dp_enable_rx_to_enhanced_mode(dp, data);
+	analogix_dp_enable_enhanced_mode(dp, data);
+}
+
+static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
+{
+	analogix_dp_set_training_pattern(dp, DP_NONE);
+
+	analogix_dp_write_byte_to_dpcd(dp, DP_TRAINING_PATTERN_SET,
+				       DP_TRAINING_PATTERN_DISABLE);
+}
+
+static void
+analogix_dp_set_lane_lane_pre_emphasis(struct analogix_dp_device *dp,
+				       int pre_emphasis, int lane)
+{
+	switch (lane) {
+	case 0:
+		analogix_dp_set_lane0_pre_emphasis(dp, pre_emphasis);
+		break;
+	case 1:
+		analogix_dp_set_lane1_pre_emphasis(dp, pre_emphasis);
+		break;
+
+	case 2:
+		analogix_dp_set_lane2_pre_emphasis(dp, pre_emphasis);
+		break;
+
+	case 3:
+		analogix_dp_set_lane3_pre_emphasis(dp, pre_emphasis);
+		break;
+	}
+}
+
+static int analogix_dp_link_start(struct analogix_dp_device *dp)
+{
+	u8 buf[4];
+	int lane, lane_count, pll_tries, retval;
+
+	lane_count = dp->link_train.lane_count;
+
+	dp->link_train.lt_state = CLOCK_RECOVERY;
+	dp->link_train.eq_loop = 0;
+
+	for (lane = 0; lane < lane_count; lane++)
+		dp->link_train.cr_loop[lane] = 0;
+
+	/* Set link rate and count as you want to establish*/
+	analogix_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
+	analogix_dp_set_lane_count(dp, dp->link_train.lane_count);
+
+	/* Setup RX configuration */
+	buf[0] = dp->link_train.link_rate;
+	buf[1] = dp->link_train.lane_count;
+	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_LINK_BW_SET, 2, buf);
+	if (retval)
+		return retval;
+
+	/* Set TX pre-emphasis to minimum */
+	for (lane = 0; lane < lane_count; lane++)
+		analogix_dp_set_lane_lane_pre_emphasis(dp,
+			PRE_EMPHASIS_LEVEL_0, lane);
+
+	/* Wait for PLL lock */
+	pll_tries = 0;
+	while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+		if (pll_tries == DP_TIMEOUT_LOOP_COUNT) {
+			pr_err("Wait for PLL lock timed out\n");
+			return -ETIMEDOUT;
+		}
+
+		pll_tries++;
+		udelay(120);
+	}
+
+	/* Set training pattern 1 */
+	analogix_dp_set_training_pattern(dp, TRAINING_PTN1);
+
+	/* Set RX training pattern */
+	retval = analogix_dp_write_byte_to_dpcd(dp,
+			DP_TRAINING_PATTERN_SET,
+			DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_1);
+	if (retval)
+		return retval;
+
+	for (lane = 0; lane < lane_count; lane++)
+		buf[lane] = DP_TRAIN_PRE_EMPH_LEVEL_0 |
+			    DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
+
+	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
+						 lane_count, buf);
+
+	return retval;
+}
+
+static unsigned char analogix_dp_get_lane_status(u8 link_status[2], int lane)
+{
+	int shift = (lane & 1) * 4;
+	u8 link_value = link_status[lane >> 1];
+
+	return (link_value >> shift) & 0xf;
+}
+
+static int analogix_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
+{
+	int lane;
+	u8 lane_status;
+
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = analogix_dp_get_lane_status(link_status, lane);
+		if ((lane_status & DP_LANE_CR_DONE) == 0)
+			return -EINVAL;
+	}
+	return 0;
+}
+
+static int analogix_dp_channel_eq_ok(u8 link_status[2], u8 link_align,
+				     int lane_count)
+{
+	int lane;
+	u8 lane_status;
+
+	if ((link_align & DP_INTERLANE_ALIGN_DONE) == 0)
+		return -EINVAL;
+
+	for (lane = 0; lane < lane_count; lane++) {
+		lane_status = analogix_dp_get_lane_status(link_status, lane);
+		lane_status &= DP_CHANNEL_EQ_BITS;
+		if (lane_status != DP_CHANNEL_EQ_BITS)
+			return -EINVAL;
+	}
+
+	return 0;
+}
+
+static unsigned char
+analogix_dp_get_adjust_request_voltage(u8 adjust_request[2], int lane)
+{
+	int shift = (lane & 1) * 4;
+	u8 link_value = adjust_request[lane >> 1];
+
+	return (link_value >> shift) & 0x3;
+}
+
+static unsigned char analogix_dp_get_adjust_request_pre_emphasis(
+					u8 adjust_request[2],
+					int lane)
+{
+	int shift = (lane & 1) * 4;
+	u8 link_value = adjust_request[lane >> 1];
+
+	return ((link_value >> shift) & 0xc) >> 2;
+}
+
+static void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp,
+					       u8 training_lane_set, int lane)
+{
+	switch (lane) {
+	case 0:
+		analogix_dp_set_lane0_link_training(dp, training_lane_set);
+		break;
+	case 1:
+		analogix_dp_set_lane1_link_training(dp, training_lane_set);
+		break;
+
+	case 2:
+		analogix_dp_set_lane2_link_training(dp, training_lane_set);
+		break;
+
+	case 3:
+		analogix_dp_set_lane3_link_training(dp, training_lane_set);
+		break;
+	}
+}
+
+static unsigned int
+analogix_dp_get_lane_link_training(struct analogix_dp_device *dp,
+				   int lane)
+{
+	u32 reg;
+
+	switch (lane) {
+	case 0:
+		reg = analogix_dp_get_lane0_link_training(dp);
+		break;
+	case 1:
+		reg = analogix_dp_get_lane1_link_training(dp);
+		break;
+	case 2:
+		reg = analogix_dp_get_lane2_link_training(dp);
+		break;
+	case 3:
+		reg = analogix_dp_get_lane3_link_training(dp);
+		break;
+	default:
+		WARN_ON(1);
+		return 0;
+	}
+
+	return reg;
+}
+
+static void analogix_dp_reduce_link_rate(struct analogix_dp_device *dp)
+{
+	analogix_dp_training_pattern_dis(dp);
+	analogix_dp_set_enhanced_mode(dp);
+
+	dp->link_train.lt_state = FAILED;
+}
+
+static void analogix_dp_get_adjust_training_lane(struct analogix_dp_device *dp,
+						 u8 adjust_request[2])
+{
+	int lane, lane_count;
+	u8 voltage_swing, pre_emphasis, training_lane;
+
+	lane_count = dp->link_train.lane_count;
+	for (lane = 0; lane < lane_count; lane++) {
+		voltage_swing = analogix_dp_get_adjust_request_voltage(
+						adjust_request, lane);
+		pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(
+						adjust_request, lane);
+		training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) |
+				DPCD_PRE_EMPHASIS_SET(pre_emphasis);
+
+		if (voltage_swing == VOLTAGE_LEVEL_3)
+			training_lane |= DP_TRAIN_MAX_SWING_REACHED;
+		if (pre_emphasis == PRE_EMPHASIS_LEVEL_3)
+			training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
+
+		dp->link_train.training_lane[lane] = training_lane;
+	}
+}
+
+static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
+{
+	int lane, lane_count, retval;
+	u8 voltage_swing, pre_emphasis, training_lane;
+	u8 link_status[2], adjust_request[2];
+
+	udelay(101);
+
+	lane_count = dp->link_train.lane_count;
+
+	retval =  analogix_dp_read_bytes_from_dpcd(dp,
+			DP_LANE0_1_STATUS, 2, link_status);
+	if (retval)
+		return retval;
+
+	retval =  analogix_dp_read_bytes_from_dpcd(dp,
+			DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+	if (retval)
+		return retval;
+
+	if (analogix_dp_clock_recovery_ok(link_status, lane_count) == 0) {
+		/* set training pattern 2 for EQ */
+		analogix_dp_set_training_pattern(dp, TRAINING_PTN2);
+
+		retval = analogix_dp_write_byte_to_dpcd(dp,
+				DP_TRAINING_PATTERN_SET,
+				DP_LINK_SCRAMBLING_DISABLE |
+				DP_TRAINING_PATTERN_2);
+		if (retval)
+			return retval;
+
+		pr_info("Link Training Clock Recovery success\n");
+		dp->link_train.lt_state = EQUALIZER_TRAINING;
+	} else {
+		for (lane = 0; lane < lane_count; lane++) {
+			training_lane = analogix_dp_get_lane_link_training(
+							dp, lane);
+			voltage_swing = analogix_dp_get_adjust_request_voltage(
+							adjust_request, lane);
+			pre_emphasis = analogix_dp_get_adjust_request_pre_emphasis(
+							adjust_request, lane);
+
+			if (DPCD_VOLTAGE_SWING_GET(training_lane) ==
+					voltage_swing &&
+			    DPCD_PRE_EMPHASIS_GET(training_lane) ==
+					pre_emphasis)
+				dp->link_train.cr_loop[lane]++;
+
+			if (dp->link_train.cr_loop[lane] == MAX_CR_LOOP ||
+			    voltage_swing == VOLTAGE_LEVEL_3 ||
+			    pre_emphasis == PRE_EMPHASIS_LEVEL_3) {
+				pr_err("CR Max reached (%d,%d,%d)\n",
+					dp->link_train.cr_loop[lane],
+					voltage_swing, pre_emphasis);
+				analogix_dp_reduce_link_rate(dp);
+				return -EIO;
+			}
+		}
+	}
+
+	analogix_dp_get_adjust_training_lane(dp, adjust_request);
+
+	for (lane = 0; lane < lane_count; lane++)
+		analogix_dp_set_lane_link_training(dp,
+			dp->link_train.training_lane[lane], lane);
+
+	retval = analogix_dp_write_bytes_to_dpcd(dp,
+			DP_TRAINING_LANE0_SET, lane_count,
+			dp->link_train.training_lane);
+	if (retval)
+		return retval;
+
+	return retval;
+}
+
+static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
+{
+	int lane, lane_count, retval;
+	u32 reg;
+	u8 link_align, link_status[2], adjust_request[2];
+
+	udelay(401);
+
+	lane_count = dp->link_train.lane_count;
+
+	retval = analogix_dp_read_bytes_from_dpcd(dp,
+			DP_LANE0_1_STATUS, 2, link_status);
+	if (retval)
+		return retval;
+
+	if (analogix_dp_clock_recovery_ok(link_status, lane_count)) {
+		analogix_dp_reduce_link_rate(dp);
+		return -EIO;
+	}
+
+	retval = analogix_dp_read_bytes_from_dpcd(dp,
+			DP_ADJUST_REQUEST_LANE0_1, 2, adjust_request);
+	if (retval)
+		return retval;
+
+	retval = analogix_dp_read_byte_from_dpcd(dp,
+			DP_LANE_ALIGN_STATUS_UPDATED, &link_align);
+	if (retval)
+		return retval;
+
+	analogix_dp_get_adjust_training_lane(dp, adjust_request);
+
+	if (!analogix_dp_channel_eq_ok(link_status, link_align, lane_count)) {
+		/* traing pattern Set to Normal */
+		analogix_dp_training_pattern_dis(dp);
+
+		pr_info("Link Training success!\n");
+
+		analogix_dp_get_link_bandwidth(dp, &reg);
+		dp->link_train.link_rate = reg;
+		pr_debug("final bandwidth = %.2x\n",
+			dp->link_train.link_rate);
+
+		analogix_dp_get_lane_count(dp, &reg);
+		dp->link_train.lane_count = reg;
+		pr_debug("final lane count = %.2x\n",
+			dp->link_train.lane_count);
+
+		/* set enhanced mode if available */
+		analogix_dp_set_enhanced_mode(dp);
+		dp->link_train.lt_state = FINISHED;
+
+		return 0;
+	}
+
+	/* not all locked */
+	dp->link_train.eq_loop++;
+
+	if (dp->link_train.eq_loop > MAX_EQ_LOOP) {
+		pr_err("EQ Max loop\n");
+		analogix_dp_reduce_link_rate(dp);
+		return -EIO;
+	}
+
+	for (lane = 0; lane < lane_count; lane++)
+		analogix_dp_set_lane_link_training(dp,
+			dp->link_train.training_lane[lane], lane);
+
+	retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
+			lane_count, dp->link_train.training_lane);
+
+	return retval;
+}
+
+static void analogix_dp_get_max_rx_bandwidth(struct analogix_dp_device *dp,
+					     u8 *bandwidth)
+{
+	u8 data;
+
+	/*
+	 * For DP rev.1.1, Maximum link rate of Main Link lanes
+	 * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps
+	 * For DP rev.1.2, Maximum link rate of Main Link lanes
+	 * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps
+	 */
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, &data);
+	*bandwidth = data;
+}
+
+static void analogix_dp_get_max_rx_lane_count(struct analogix_dp_device *dp,
+					      u8 *lane_count)
+{
+	u8 data;
+
+	/*
+	 * For DP rev.1.1, Maximum number of Main Link lanes
+	 * 0x01 = 1 lane, 0x02 = 2 lanes, 0x04 = 4 lanes
+	 */
+	analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &data);
+	*lane_count = DPCD_MAX_LANE_COUNT(data);
+}
+
+static void analogix_dp_init_training(struct analogix_dp_device *dp,
+				      enum link_lane_count_type max_lane,
+				      int max_rate)
+{
+	/*
+	 * MACRO_RST must be applied after the PLL_LOCK to avoid
+	 * the DP inter pair skew issue for at least 10 us
+	 */
+	analogix_dp_reset_macro(dp);
+
+	/* Initialize by reading RX's DPCD */
+	analogix_dp_get_max_rx_bandwidth(dp, &dp->link_train.link_rate);
+	analogix_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
+
+	if ((dp->link_train.link_rate != DP_LINK_BW_1_62) &&
+	    (dp->link_train.link_rate != DP_LINK_BW_2_7) &&
+	    (dp->link_train.link_rate != DP_LINK_BW_5_4)) {
+		pr_err("Rx Max Link Rate is abnormal :%x !\n",
+			dp->link_train.link_rate);
+		dp->link_train.link_rate = DP_LINK_BW_1_62;
+	}
+
+	if (dp->link_train.lane_count == 0) {
+		pr_err("Rx Max Lane count is abnormal :%x !\n",
+			dp->link_train.lane_count);
+		dp->link_train.lane_count = (u8)LANE_COUNT1;
+	}
+
+	/* Setup TX lane count & rate */
+	if (dp->link_train.lane_count > max_lane)
+		dp->link_train.lane_count = max_lane;
+	if (dp->link_train.link_rate > max_rate)
+		dp->link_train.link_rate = max_rate;
+
+	/* All DP analog module power up */
+	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
+}
+
+static int analogix_dp_sw_link_training(struct analogix_dp_device *dp)
+{
+	int retval = 0, training_finished = 0;
+
+	dp->link_train.lt_state = START;
+
+	/* Process here */
+	while (!retval && !training_finished) {
+		switch (dp->link_train.lt_state) {
+		case START:
+			retval = analogix_dp_link_start(dp);
+			if (retval)
+				pr_err("LT link start failed!\n");
+			break;
+		case CLOCK_RECOVERY:
+			retval = analogix_dp_process_clock_recovery(dp);
+			if (retval)
+				pr_err("LT CR failed!\n");
+			break;
+		case EQUALIZER_TRAINING:
+			retval = analogix_dp_process_equalizer_training(dp);
+			if (retval)
+				pr_err("LT EQ failed!\n");
+			break;
+		case FINISHED:
+			training_finished = 1;
+			break;
+		case FAILED:
+			return -EREMOTEIO;
+		}
+	}
+	if (retval)
+		pr_err("eDP link training failed (%d)\n", retval);
+
+	return retval;
+}
+
+static int analogix_dp_set_link_train(struct analogix_dp_device *dp,
+				      u32 count, u32 bwtype)
+{
+	int i;
+	int retval;
+
+	for (i = 0; i < DP_TIMEOUT_LOOP_COUNT; i++) {
+		analogix_dp_init_training(dp, count, bwtype);
+		retval = analogix_dp_sw_link_training(dp);
+		if (retval == 0)
+			break;
+
+		udelay(110);
+	}
+
+	return retval;
+}
+
+static int analogix_dp_config_video(struct analogix_dp_device *dp)
+{
+	int retval = 0;
+	int timeout_loop = 0;
+	int done_count = 0;
+
+	analogix_dp_config_video_slave_mode(dp);
+
+	analogix_dp_set_video_color_format(dp);
+
+	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+		pr_err("PLL is not locked yet.\n");
+		return -EINVAL;
+	}
+
+	for (;;) {
+		timeout_loop++;
+		if (analogix_dp_is_slave_video_stream_clock_on(dp) == 0)
+			break;
+		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
+			pr_err("Timeout of video streamclk ok\n");
+			return -ETIMEDOUT;
+		}
+
+		udelay(2);
+	}
+
+	/* Set to use the register calculated M/N video */
+	analogix_dp_set_video_cr_mn(dp, CALCULATED_M, 0, 0);
+
+	/* For video bist, Video timing must be generated by register */
+	analogix_dp_set_video_timing_mode(dp, VIDEO_TIMING_FROM_CAPTURE);
+
+	/* Disable video mute */
+	analogix_dp_enable_video_mute(dp, 0);
+
+	/* Configure video slave mode */
+	analogix_dp_enable_video_master(dp, 0);
+
+	timeout_loop = 0;
+
+	for (;;) {
+		timeout_loop++;
+		if (analogix_dp_is_video_stream_on(dp) == 0) {
+			done_count++;
+			if (done_count > 10)
+				break;
+		} else if (done_count) {
+			done_count = 0;
+		}
+		if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) {
+			pr_err("Timeout of video streamclk ok\n");
+			return -ETIMEDOUT;
+		}
+
+		udelay(1001);
+	}
+
+	if (retval != 0)
+		pr_err("Video stream is not detected!\n");
+
+	return retval;
+}
+
+static void analogix_dp_enable_scramble(struct analogix_dp_device *dp,
+					bool enable)
+{
+	u8 data;
+
+	if (enable) {
+		analogix_dp_enable_scrambling(dp);
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+						&data);
+		analogix_dp_write_byte_to_dpcd(dp,
+			DP_TRAINING_PATTERN_SET,
+			(u8)(data & ~DP_LINK_SCRAMBLING_DISABLE));
+	} else {
+		analogix_dp_disable_scrambling(dp);
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TRAINING_PATTERN_SET,
+						&data);
+		analogix_dp_write_byte_to_dpcd(dp,
+			DP_TRAINING_PATTERN_SET,
+			(u8)(data | DP_LINK_SCRAMBLING_DISABLE));
+	}
+}
+
+static void analogix_dp_init_dp(struct analogix_dp_device *dp)
+{
+	analogix_dp_reset(dp);
+
+	analogix_dp_swreset(dp);
+
+	analogix_dp_init_analog_param(dp);
+	analogix_dp_init_interrupt(dp);
+
+	/* SW defined function Normal operation */
+	analogix_dp_enable_sw_function(dp);
+
+	analogix_dp_config_interrupt(dp);
+	analogix_dp_init_analog_func(dp);
+
+	analogix_dp_init_hpd(dp);
+	analogix_dp_init_aux(dp);
+}
+
+static unsigned char analogix_dp_calc_edid_check_sum(unsigned char *edid_data)
+{
+	int i;
+	unsigned char sum = 0;
+
+	for (i = 0; i < EDID_BLOCK_LENGTH; i++)
+		sum = sum + edid_data[i];
+
+	return sum;
+}
+
+static int analogix_dp_read_edid(struct analogix_dp_device *dp)
+{
+	unsigned char *edid = dp->edid;
+	unsigned int extend_block = 0;
+	unsigned char sum;
+	unsigned char test_vector;
+	int retval;
+
+	/*
+	 * EDID device address is 0x50.
+	 * However, if necessary, you must have set upper address
+	 * into E-EDID in I2C device, 0x30.
+	 */
+
+	/* Read Extension Flag, Number of 128-byte EDID extension blocks */
+	retval = analogix_dp_read_byte_from_i2c(dp, I2C_EDID_DEVICE_ADDR,
+						EDID_EXTENSION_FLAG,
+						&extend_block);
+	if (retval)
+		return retval;
+
+	if (extend_block > 0) {
+		debug("EDID data includes a single extension!\n");
+
+		/* Read EDID data */
+		retval = analogix_dp_read_bytes_from_i2c(dp,
+						I2C_EDID_DEVICE_ADDR,
+						EDID_HEADER_PATTERN,
+						EDID_BLOCK_LENGTH,
+						&edid[EDID_HEADER_PATTERN]);
+		if (retval != 0) {
+			pr_err("EDID Read failed!\n");
+			return -EIO;
+		}
+		sum = analogix_dp_calc_edid_check_sum(edid);
+		if (sum != 0) {
+			pr_err("EDID bad checksum!\n");
+			return -EIO;
+		}
+
+		/* Read additional EDID data */
+		retval = analogix_dp_read_bytes_from_i2c(dp,
+				I2C_EDID_DEVICE_ADDR,
+				EDID_BLOCK_LENGTH,
+				EDID_BLOCK_LENGTH,
+				&edid[EDID_BLOCK_LENGTH]);
+		if (retval != 0) {
+			pr_err("EDID Read failed!\n");
+			return -EIO;
+		}
+		sum = analogix_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]);
+		if (sum != 0) {
+			pr_err("EDID bad checksum!\n");
+			return -EIO;
+		}
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+						&test_vector);
+		if (test_vector & DP_TEST_LINK_EDID_READ) {
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_EDID_CHECKSUM,
+				edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_RESPONSE,
+				DP_TEST_EDID_CHECKSUM_WRITE);
+		}
+	} else {
+		pr_info("EDID data does not include any extensions.\n");
+
+		/* Read EDID data */
+		retval = analogix_dp_read_bytes_from_i2c(dp,
+				I2C_EDID_DEVICE_ADDR, EDID_HEADER_PATTERN,
+				EDID_BLOCK_LENGTH, &edid[EDID_HEADER_PATTERN]);
+		if (retval != 0) {
+			pr_err("EDID Read failed!\n");
+			return -EIO;
+		}
+		sum = analogix_dp_calc_edid_check_sum(edid);
+		if (sum != 0) {
+			pr_err("EDID bad checksum!\n");
+			return -EIO;
+		}
+
+		analogix_dp_read_byte_from_dpcd(dp, DP_TEST_REQUEST,
+						&test_vector);
+		if (test_vector & DP_TEST_LINK_EDID_READ) {
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]);
+			analogix_dp_write_byte_to_dpcd(dp,
+				DP_TEST_RESPONSE, DP_TEST_EDID_CHECKSUM_WRITE);
+		}
+	}
+
+	debug("EDID Read success!\n");
+	return 0;
+}
+
+static int analogix_dp_handle_edid(struct analogix_dp_device *dp)
+{
+	u8 buf[12];
+	int i, try = 5;
+	int retval;
+
+retry:
+	/* Read DPCD DP_DPCD_REV~RECEIVE_PORT1_CAP_1 */
+	retval = analogix_dp_read_bytes_from_dpcd(dp, DP_DPCD_REV, 12, buf);
+
+	if (retval && try--) {
+		mdelay(10);
+		goto retry;
+	}
+
+	if (retval)
+		return retval;
+
+	/* Read EDID */
+	for (i = 0; i < 3; i++) {
+		retval = analogix_dp_read_edid(dp);
+		if (!retval)
+			break;
+	}
+
+	return retval;
+}
+
+const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data = {
+	.lcdsel_grf_reg = 0x6250,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3399_EDP,
+	.has_vop_sel = true,
+};
+
+const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data = {
+	.lcdsel_grf_reg = 0x025c,
+	.lcdsel_big = 0 | BIT(21),
+	.lcdsel_lit = BIT(5) | BIT(21),
+	.chip_type = RK3288_DP,
+	.has_vop_sel = true,
+};
+
+const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data = {
+	.chip_type = RK3368_EDP,
+	.has_vop_sel = false,
+};
+
+static int rockchip_analogix_dp_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct rockchip_dp_chip_data *pdata = connector->data;
+	int dp_node = conn_state->node;
+	struct analogix_dp_device *dp;
+	struct analogix_dp_plat_data *plat_data;
+	int ret;
+
+	dp = malloc(sizeof(*dp));
+	if (!dp)
+		return -ENOMEM;
+
+	memset(dp, 0, sizeof(*dp));
+	plat_data = malloc(sizeof(*pdata));
+	if (!plat_data)
+		return -ENOMEM;
+	dp->reg_base = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+						dp_node, "reg", 0, NULL, false);
+	dp->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (dp->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, dp->grf);
+		return  -ENXIO;
+	}
+
+	ret = gpio_request_by_name(conn_state->dev, "hpd-gpios", 0,
+				   &dp->hpd_gpio, GPIOD_IS_IN);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get hpd GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	dp->plat_data = plat_data;
+	dp->plat_data->dev_type = ROCKCHIP_DP;
+	dp->plat_data->subdev_type = pdata->chip_type;
+	/*
+	 * Like Rockchip DisplayPort TRM indicate that "Main link
+	 * containing 4 physical lanes of 2.7/1.62 Gbps/lane".
+	 */
+	dp->video_info.max_link_rate = 0x0A;
+	dp->video_info.max_lane_count = 0x04;
+
+	conn_state->private = dp;
+	conn_state->type = DRM_MODE_CONNECTOR_eDP;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
+
+#if 0
+	if (pdata->chip_type == RK3399_EDP) {
+		/*
+		 * reset edp controller.
+		 */
+		writel(0x20002000, RKIO_CRU_PHYS + 0x444);
+		mdelay(10);
+		writel(0x20000000, RKIO_CRU_PHYS + 0x444);
+		mdelay(10);
+	} else if (pdata->chip_type == RK3368_EDP) {
+		/* edp ref clk sel */
+		writel(0x00010001, RKIO_GRF_PHYS + 0x410);
+		/* edp 24m clock domain software reset */
+		writel(0x80008000, RKIO_CRU_PHYS + 0x318);
+		udelay(20);
+		writel(0x80000000, RKIO_CRU_PHYS + 0x318);
+		/* edp ctrl apb bus software reset */
+		writel(0x04000400, RKIO_CRU_PHYS + 0x31c);
+		udelay(20);
+		writel(0x04000000, RKIO_CRU_PHYS + 0x31c);
+	} else if (pdata->chip_type == RK3288_DP) {
+		/* edp ref clk sel */
+		writel(0x00100010, RKIO_GRF_PHYS + 0x274);
+		/* edp 24m clock domain software reset */
+		writel(0x80008000, RKIO_CRU_PHYS + 0x1d0);
+		udelay(20);
+		writel(0x80000000, RKIO_CRU_PHYS + 0x1d0);
+		udelay(20);
+	}
+#endif
+
+	analogix_dp_init_dp(dp);
+
+	return 0;
+}
+
+static void rockchip_analogix_dp_deinit(struct display_state *state)
+{
+	/* TODO */
+}
+
+static int rockchip_analogix_dp_get_edid(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct analogix_dp_device *dp = conn_state->private;
+	int ret;
+
+	ret = analogix_dp_handle_edid(dp);
+	if (ret)
+		return ret;
+	memcpy(&conn_state->edid, &dp->edid, sizeof(dp->edid));
+
+	return 0;
+}
+
+static int rockchip_analogix_dp_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct rockchip_dp_chip_data *pdata = connector->data;
+	struct analogix_dp_device *dp = conn_state->private;
+	u32 val;
+
+	if (!pdata->has_vop_sel)
+		return 0;
+
+	if (crtc_state->crtc_id)
+		val = pdata->lcdsel_lit;
+	else
+		val = pdata->lcdsel_big;
+
+	writel(val, dp->grf + pdata->lcdsel_grf_reg);
+
+	debug("vop %s output to edp\n", (crtc_state->crtc_id) ? "LIT" : "BIG");
+
+	return 0;
+}
+
+static int rockchip_analogix_dp_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct analogix_dp_device *dp = conn_state->private;
+	int ret;
+
+	ret = analogix_dp_set_link_train(dp, dp->video_info.max_lane_count,
+					 dp->video_info.max_link_rate);
+	if (ret) {
+		pr_err("unable to do link train\n");
+		return 0;
+	}
+
+	analogix_dp_enable_scramble(dp, 1);
+	analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
+	analogix_dp_enable_enhanced_mode(dp, 1);
+
+	analogix_dp_init_video(dp);
+	ret = analogix_dp_config_video(dp);
+	if (ret)
+		pr_err("unable to config video\n");
+
+	/* Enable video */
+	analogix_dp_start_video(dp);
+
+	return 0;
+}
+
+static int rockchip_analogix_dp_disable(struct display_state *state)
+{
+	/* TODO */
+
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_analogix_dp_funcs = {
+	.init = rockchip_analogix_dp_init,
+	.deinit = rockchip_analogix_dp_deinit,
+	.get_edid = rockchip_analogix_dp_get_edid,
+	.prepare = rockchip_analogix_dp_prepare,
+	.enable = rockchip_analogix_dp_enable,
+	.disable = rockchip_analogix_dp_disable,
+};
+
+static const struct rockchip_connector rk3288_analogix_dp_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3288_analogix_dp_drv_data,
+};
+
+static const struct rockchip_connector rk3399_analogix_edp_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3399_analogix_edp_drv_data,
+};
+
+static const struct rockchip_connector rk3368_analogix_edp_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3368_analogix_edp_drv_data,
+};
+
+static const struct udevice_id rockchip_analogix_dp_ids[] = {
+	{
+	 .compatible = "rockchip,rk3288-dp",
+	 .data = (ulong)&rk3288_analogix_dp_data,
+	},{
+	 .compatible = "rockchip,rk3399-edp",
+	 .data = (ulong)&rk3399_analogix_edp_data,
+	},{
+	 .compatible = "rockchip,rk3368-edp",
+	 .data = (ulong)&rk3368_analogix_edp_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_analogix_dp) = {
+	.name = "rockchip_analogix_dp",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_analogix_dp_ids,
+};
diff --git a/drivers/video/drm/rockchip_analogix_dp.h b/drivers/video/drm/rockchip_analogix_dp.h
new file mode 100644
index 0000000000..aa3add0554
--- /dev/null
+++ b/drivers/video/drm/rockchip_analogix_dp.h
@@ -0,0 +1,1183 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DRM_ANALOGIX_DP_H__
+#define __DRM_ANALOGIX_DP_H__
+
+#define pr_err printf
+#define pr_info printf
+#define pr_debug debug
+
+/*
+ * Unless otherwise noted, all values are from the DP 1.1a spec.  Note that
+ * DP and DPCD versions are independent.  Differences from 1.0 are not noted,
+ * 1.0 devices basically don't exist in the wild.
+ *
+ * Abbreviations, in chronological order:
+ *
+ * eDP: Embedded DisplayPort version 1
+ * DPI: DisplayPort Interoperability Guideline v1.1a
+ * 1.2: DisplayPort 1.2
+ * MST: Multistream Transport - part of DP 1.2a
+ *
+ * 1.2 formally includes both eDP and DPI definitions.
+ */
+
+#define DP_AUX_MAX_PAYLOAD_BYTES	16
+
+#define DP_AUX_I2C_WRITE		0x0
+#define DP_AUX_I2C_READ			0x1
+#define DP_AUX_I2C_WRITE_STATUS_UPDATE	0x2
+#define DP_AUX_I2C_MOT			0x4
+#define DP_AUX_NATIVE_WRITE		0x8
+#define DP_AUX_NATIVE_READ		0x9
+
+#define DP_AUX_NATIVE_REPLY_ACK		(0x0 << 0)
+#define DP_AUX_NATIVE_REPLY_NACK	(0x1 << 0)
+#define DP_AUX_NATIVE_REPLY_DEFER	(0x2 << 0)
+#define DP_AUX_NATIVE_REPLY_MASK	(0x3 << 0)
+
+#define DP_AUX_I2C_REPLY_ACK		(0x0 << 2)
+#define DP_AUX_I2C_REPLY_NACK		(0x1 << 2)
+#define DP_AUX_I2C_REPLY_DEFER		(0x2 << 2)
+#define DP_AUX_I2C_REPLY_MASK		(0x3 << 2)
+
+/* AUX CH addresses */
+/* DPCD */
+#define DP_DPCD_REV                         0x000
+
+#define DP_MAX_LINK_RATE                    0x001
+
+#define DP_MAX_LANE_COUNT                   0x002
+# define DP_MAX_LANE_COUNT_MASK		    0x1f
+# define DP_TPS3_SUPPORTED		    (1 << 6) /* 1.2 */
+# define DP_ENHANCED_FRAME_CAP		    (1 << 7)
+
+#define DP_MAX_DOWNSPREAD                   0x003
+# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING  (1 << 6)
+
+#define DP_NORP                             0x004
+
+#define DP_DOWNSTREAMPORT_PRESENT           0x005
+# define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
+# define DP_DWN_STRM_PORT_TYPE_MASK         0x06
+# define DP_DWN_STRM_PORT_TYPE_DP           (0 << 1)
+# define DP_DWN_STRM_PORT_TYPE_ANALOG       (1 << 1)
+# define DP_DWN_STRM_PORT_TYPE_TMDS         (2 << 1)
+# define DP_DWN_STRM_PORT_TYPE_OTHER        (3 << 1)
+# define DP_FORMAT_CONVERSION               (1 << 3)
+# define DP_DETAILED_CAP_INFO_AVAILABLE	    (1 << 4) /* DPI */
+
+#define DP_MAIN_LINK_CHANNEL_CODING         0x006
+
+#define DP_DOWN_STREAM_PORT_COUNT	    0x007
+# define DP_PORT_COUNT_MASK		    0x0f
+# define DP_MSA_TIMING_PAR_IGNORED	    (1 << 6) /* eDP */
+# define DP_OUI_SUPPORT			    (1 << 7)
+
+#define DP_RECEIVE_PORT_0_CAP_0		    0x008
+# define DP_LOCAL_EDID_PRESENT		    (1 << 1)
+# define DP_ASSOCIATED_TO_PRECEDING_PORT    (1 << 2)
+
+#define DP_RECEIVE_PORT_0_BUFFER_SIZE	    0x009
+
+#define DP_RECEIVE_PORT_1_CAP_0		    0x00a
+#define DP_RECEIVE_PORT_1_BUFFER_SIZE       0x00b
+
+#define DP_I2C_SPEED_CAP		    0x00c    /* DPI */
+# define DP_I2C_SPEED_1K		    0x01
+# define DP_I2C_SPEED_5K		    0x02
+# define DP_I2C_SPEED_10K		    0x04
+# define DP_I2C_SPEED_100K		    0x08
+# define DP_I2C_SPEED_400K		    0x10
+# define DP_I2C_SPEED_1M		    0x20
+
+#define DP_EDP_CONFIGURATION_CAP            0x00d   /* XXX 1.2? */
+# define DP_ALTERNATE_SCRAMBLER_RESET_CAP   (1 << 0)
+# define DP_FRAMING_CHANGE_CAP		    (1 << 1)
+# define DP_DPCD_DISPLAY_CONTROL_CAPABLE     (1 << 3) /* edp v1.2 or higher */
+
+#define DP_TRAINING_AUX_RD_INTERVAL         0x00e   /* XXX 1.2? */
+
+#define DP_ADAPTER_CAP			    0x00f   /* 1.2 */
+# define DP_FORCE_LOAD_SENSE_CAP	    (1 << 0)
+# define DP_ALTERNATE_I2C_PATTERN_CAP	    (1 << 1)
+
+#define DP_SUPPORTED_LINK_RATES		    0x010 /* eDP 1.4 */
+# define DP_MAX_SUPPORTED_RATES		     8	    /* 16-bit little-endian */
+
+/* Multiple stream transport */
+#define DP_FAUX_CAP			    0x020   /* 1.2 */
+# define DP_FAUX_CAP_1			    (1 << 0)
+
+#define DP_MSTM_CAP			    0x021   /* 1.2 */
+# define DP_MST_CAP			    (1 << 0)
+
+#define DP_NUMBER_OF_AUDIO_ENDPOINTS	    0x022   /* 1.2 */
+
+/* AV_SYNC_DATA_BLOCK                                  1.2 */
+#define DP_AV_GRANULARITY		    0x023
+# define DP_AG_FACTOR_MASK		    (0xf << 0)
+# define DP_AG_FACTOR_3MS		    (0 << 0)
+# define DP_AG_FACTOR_2MS		    (1 << 0)
+# define DP_AG_FACTOR_1MS		    (2 << 0)
+# define DP_AG_FACTOR_500US		    (3 << 0)
+# define DP_AG_FACTOR_200US		    (4 << 0)
+# define DP_AG_FACTOR_100US		    (5 << 0)
+# define DP_AG_FACTOR_10US		    (6 << 0)
+# define DP_AG_FACTOR_1US		    (7 << 0)
+# define DP_VG_FACTOR_MASK		    (0xf << 4)
+# define DP_VG_FACTOR_3MS		    (0 << 4)
+# define DP_VG_FACTOR_2MS		    (1 << 4)
+# define DP_VG_FACTOR_1MS		    (2 << 4)
+# define DP_VG_FACTOR_500US		    (3 << 4)
+# define DP_VG_FACTOR_200US		    (4 << 4)
+# define DP_VG_FACTOR_100US		    (5 << 4)
+
+#define DP_AUD_DEC_LAT0			    0x024
+#define DP_AUD_DEC_LAT1			    0x025
+
+#define DP_AUD_PP_LAT0			    0x026
+#define DP_AUD_PP_LAT1			    0x027
+
+#define DP_VID_INTER_LAT		    0x028
+
+#define DP_VID_PROG_LAT			    0x029
+
+#define DP_REP_LAT			    0x02a
+
+#define DP_AUD_DEL_INS0			    0x02b
+#define DP_AUD_DEL_INS1			    0x02c
+#define DP_AUD_DEL_INS2			    0x02d
+/* End of AV_SYNC_DATA_BLOCK */
+
+#define DP_RECEIVER_ALPM_CAP		    0x02e   /* eDP 1.4 */
+# define DP_ALPM_CAP			    (1 << 0)
+
+#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP   0x02f   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_CAP		    (1 << 0)
+
+#define DP_GUID				    0x030   /* 1.2 */
+
+#define DP_PSR_SUPPORT                      0x070   /* XXX 1.2? */
+# define DP_PSR_IS_SUPPORTED                1
+# define DP_PSR2_IS_SUPPORTED		    2	    /* eDP 1.4 */
+
+#define DP_PSR_CAPS                         0x071   /* XXX 1.2? */
+# define DP_PSR_NO_TRAIN_ON_EXIT            1
+# define DP_PSR_SETUP_TIME_330              (0 << 1)
+# define DP_PSR_SETUP_TIME_275              (1 << 1)
+# define DP_PSR_SETUP_TIME_220              (2 << 1)
+# define DP_PSR_SETUP_TIME_165              (3 << 1)
+# define DP_PSR_SETUP_TIME_110              (4 << 1)
+# define DP_PSR_SETUP_TIME_55               (5 << 1)
+# define DP_PSR_SETUP_TIME_0                (6 << 1)
+# define DP_PSR_SETUP_TIME_MASK             (7 << 1)
+# define DP_PSR_SETUP_TIME_SHIFT            1
+
+/*
+ * 0x80-0x8f describe downstream port capabilities, but there are two layouts
+ * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set.  If it was not,
+ * each port's descriptor is one byte wide.  If it was set, each port's is
+ * four bytes wide, starting with the one byte from the base info.  As of
+ * DP interop v1.1a only VGA defines additional detail.
+ */
+
+/* offset 0 */
+#define DP_DOWNSTREAM_PORT_0		    0x80
+# define DP_DS_PORT_TYPE_MASK		    (7 << 0)
+# define DP_DS_PORT_TYPE_DP		    0
+# define DP_DS_PORT_TYPE_VGA		    1
+# define DP_DS_PORT_TYPE_DVI		    2
+# define DP_DS_PORT_TYPE_HDMI		    3
+# define DP_DS_PORT_TYPE_NON_EDID	    4
+# define DP_DS_PORT_HPD			    (1 << 3)
+/* offset 1 for VGA is maximum megapixels per second / 8 */
+/* offset 2 */
+# define DP_DS_VGA_MAX_BPC_MASK		    (3 << 0)
+# define DP_DS_VGA_8BPC			    0
+# define DP_DS_VGA_10BPC		    1
+# define DP_DS_VGA_12BPC		    2
+# define DP_DS_VGA_16BPC		    3
+
+/* link configuration */
+#define	DP_LINK_BW_SET		            0x100
+# define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
+# define DP_LINK_BW_1_62		    0x06
+# define DP_LINK_BW_2_7			    0x0a
+# define DP_LINK_BW_5_4			    0x14    /* 1.2 */
+
+#define DP_LANE_COUNT_SET	            0x101
+# define DP_LANE_COUNT_MASK		    0x0f
+# define DP_LANE_COUNT_ENHANCED_FRAME_EN    (1 << 7)
+
+#define DP_TRAINING_PATTERN_SET	            0x102
+# define DP_TRAINING_PATTERN_DISABLE	    0
+# define DP_TRAINING_PATTERN_1		    1
+# define DP_TRAINING_PATTERN_2		    2
+# define DP_TRAINING_PATTERN_3		    3	    /* 1.2 */
+# define DP_TRAINING_PATTERN_MASK	    0x3
+
+/* DPCD 1.1 only. For DPCD >= 1.2 see per-lane DP_LINK_QUAL_LANEn_SET */
+# define DP_LINK_QUAL_PATTERN_11_DISABLE    (0 << 2)
+# define DP_LINK_QUAL_PATTERN_11_D10_2	    (1 << 2)
+# define DP_LINK_QUAL_PATTERN_11_ERROR_RATE (2 << 2)
+# define DP_LINK_QUAL_PATTERN_11_PRBS7	    (3 << 2)
+# define DP_LINK_QUAL_PATTERN_11_MASK	    (3 << 2)
+
+# define DP_RECOVERED_CLOCK_OUT_EN	    (1 << 4)
+# define DP_LINK_SCRAMBLING_DISABLE	    (1 << 5)
+
+# define DP_SYMBOL_ERROR_COUNT_BOTH	    (0 << 6)
+# define DP_SYMBOL_ERROR_COUNT_DISPARITY    (1 << 6)
+# define DP_SYMBOL_ERROR_COUNT_SYMBOL	    (2 << 6)
+# define DP_SYMBOL_ERROR_COUNT_MASK	    (3 << 6)
+
+#define DP_TRAINING_LANE0_SET		    0x103
+#define DP_TRAINING_LANE1_SET		    0x104
+#define DP_TRAINING_LANE2_SET		    0x105
+#define DP_TRAINING_LANE3_SET		    0x106
+
+# define DP_TRAIN_VOLTAGE_SWING_MASK	    0x3
+# define DP_TRAIN_VOLTAGE_SWING_SHIFT	    0
+# define DP_TRAIN_MAX_SWING_REACHED	    (1 << 2)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_1 (1 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_2 (2 << 0)
+# define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (3 << 0)
+
+# define DP_TRAIN_PRE_EMPHASIS_MASK	    (3 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_0		(0 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_1		(1 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_2		(2 << 3)
+# define DP_TRAIN_PRE_EMPH_LEVEL_3		(3 << 3)
+
+# define DP_TRAIN_PRE_EMPHASIS_SHIFT	    3
+# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED  (1 << 5)
+
+#define DP_DOWNSPREAD_CTRL		    0x107
+# define DP_SPREAD_AMP_0_5		    (1 << 4)
+# define DP_MSA_TIMING_PAR_IGNORE_EN	    (1 << 7) /* eDP */
+
+#define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
+# define DP_SET_ANSI_8B10B		    (1 << 0)
+
+#define DP_I2C_SPEED_CONTROL_STATUS	    0x109   /* DPI */
+/* bitmask as for DP_I2C_SPEED_CAP */
+
+#define DP_EDP_CONFIGURATION_SET            0x10a   /* XXX 1.2? */
+# define DP_ALTERNATE_SCRAMBLER_RESET_ENABLE (1 << 0)
+# define DP_FRAMING_CHANGE_ENABLE	    (1 << 1)
+# define DP_PANEL_SELF_TEST_ENABLE	    (1 << 7)
+
+#define DP_LINK_QUAL_LANE0_SET		    0x10b   /* DPCD >= 1.2 */
+#define DP_LINK_QUAL_LANE1_SET		    0x10c
+#define DP_LINK_QUAL_LANE2_SET		    0x10d
+#define DP_LINK_QUAL_LANE3_SET		    0x10e
+# define DP_LINK_QUAL_PATTERN_DISABLE	    0
+# define DP_LINK_QUAL_PATTERN_D10_2	    1
+# define DP_LINK_QUAL_PATTERN_ERROR_RATE    2
+# define DP_LINK_QUAL_PATTERN_PRBS7	    3
+# define DP_LINK_QUAL_PATTERN_80BIT_CUSTOM  4
+# define DP_LINK_QUAL_PATTERN_HBR2_EYE      5
+# define DP_LINK_QUAL_PATTERN_MASK	    7
+
+#define DP_TRAINING_LANE0_1_SET2	    0x10f
+#define DP_TRAINING_LANE2_3_SET2	    0x110
+# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
+# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
+# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
+# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
+
+#define DP_MSTM_CTRL			    0x111   /* 1.2 */
+# define DP_MST_EN			    (1 << 0)
+# define DP_UP_REQ_EN			    (1 << 1)
+# define DP_UPSTREAM_IS_SRC		    (1 << 2)
+
+#define DP_AUDIO_DELAY0			    0x112   /* 1.2 */
+#define DP_AUDIO_DELAY1			    0x113
+#define DP_AUDIO_DELAY2			    0x114
+
+#define DP_LINK_RATE_SET		    0x115   /* eDP 1.4 */
+# define DP_LINK_RATE_SET_SHIFT		    0
+# define DP_LINK_RATE_SET_MASK		    (7 << 0)
+
+#define DP_RECEIVER_ALPM_CONFIG		    0x116   /* eDP 1.4 */
+# define DP_ALPM_ENABLE			    (1 << 0)
+# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1)
+
+#define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF  0x117   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_ENABLE	    (1 << 0)
+# define DP_IRQ_HPD_ENABLE		    (1 << 1)
+
+#define DP_UPSTREAM_DEVICE_DP_PWR_NEED	    0x118   /* 1.2 */
+# define DP_PWR_NOT_NEEDED		    (1 << 0)
+
+#define DP_AUX_FRAME_SYNC_VALUE		    0x15c   /* eDP 1.4 */
+# define DP_AUX_FRAME_SYNC_VALID	    (1 << 0)
+
+#define DP_PSR_EN_CFG			    0x170   /* XXX 1.2? */
+# define DP_PSR_ENABLE			    (1 << 0)
+# define DP_PSR_MAIN_LINK_ACTIVE	    (1 << 1)
+# define DP_PSR_CRC_VERIFICATION	    (1 << 2)
+# define DP_PSR_FRAME_CAPTURE		    (1 << 3)
+# define DP_PSR_SELECTIVE_UPDATE	    (1 << 4)
+# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS     (1 << 5)
+
+#define DP_ADAPTER_CTRL			    0x1a0
+# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)
+
+#define DP_BRANCH_DEVICE_CTRL		    0x1a1
+# define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
+
+#define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
+#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
+#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
+
+#define DP_SINK_COUNT			    0x200
+/* prior to 1.2 bit 7 was reserved mbz */
+# define DP_GET_SINK_COUNT(x)		    ((((x) & 0x80) >> 1) | ((x) & 0x3f))
+# define DP_SINK_CP_READY		    (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR	    0x201
+# define DP_REMOTE_CONTROL_COMMAND_PENDING  (1 << 0)
+# define DP_AUTOMATED_TEST_REQUEST	    (1 << 1)
+# define DP_CP_IRQ			    (1 << 2)
+# define DP_MCCS_IRQ			    (1 << 3)
+# define DP_DOWN_REP_MSG_RDY		    (1 << 4) /* 1.2 MST */
+# define DP_UP_REQ_MSG_RDY		    (1 << 5) /* 1.2 MST */
+# define DP_SINK_SPECIFIC_IRQ		    (1 << 6)
+
+#define DP_LANE0_1_STATUS		    0x202
+#define DP_LANE2_3_STATUS		    0x203
+# define DP_LANE_CR_DONE		    (1 << 0)
+# define DP_LANE_CHANNEL_EQ_DONE	    (1 << 1)
+# define DP_LANE_SYMBOL_LOCKED		    (1 << 2)
+
+#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE |		\
+			    DP_LANE_CHANNEL_EQ_DONE |	\
+			    DP_LANE_SYMBOL_LOCKED)
+
+#define DP_LANE_ALIGN_STATUS_UPDATED	    0x204
+
+#define DP_INTERLANE_ALIGN_DONE		    (1 << 0)
+#define DP_DOWNSTREAM_PORT_STATUS_CHANGED   (1 << 6)
+#define DP_LINK_STATUS_UPDATED		    (1 << 7)
+
+#define DP_SINK_STATUS			    0x205
+
+#define DP_RECEIVE_PORT_0_STATUS	    (1 << 0)
+#define DP_RECEIVE_PORT_1_STATUS	    (1 << 1)
+
+#define DP_ADJUST_REQUEST_LANE0_1	    0x206
+#define DP_ADJUST_REQUEST_LANE2_3	    0x207
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK  0x03
+# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK   0x0c
+# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT  2
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK  0x30
+# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
+# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
+
+#define DP_TEST_REQUEST			    0x218
+# define DP_TEST_LINK_TRAINING		    (1 << 0)
+# define DP_TEST_LINK_VIDEO_PATTERN	    (1 << 1)
+# define DP_TEST_LINK_EDID_READ		    (1 << 2)
+# define DP_TEST_LINK_PHY_TEST_PATTERN	    (1 << 3) /* DPCD >= 1.1 */
+# define DP_TEST_LINK_FAUX_PATTERN	    (1 << 4) /* DPCD >= 1.2 */
+
+#define DP_TEST_LINK_RATE		    0x219
+# define DP_LINK_RATE_162		    (0x6)
+# define DP_LINK_RATE_27		    (0xa)
+
+#define DP_TEST_LANE_COUNT		    0x220
+
+#define DP_TEST_PATTERN			    0x221
+
+#define DP_TEST_CRC_R_CR		    0x240
+#define DP_TEST_CRC_G_Y			    0x242
+#define DP_TEST_CRC_B_CB		    0x244
+
+#define DP_TEST_SINK_MISC		    0x246
+# define DP_TEST_CRC_SUPPORTED		    (1 << 5)
+# define DP_TEST_COUNT_MASK		    0xf
+
+#define DP_TEST_RESPONSE		    0x260
+# define DP_TEST_ACK			    (1 << 0)
+# define DP_TEST_NAK			    (1 << 1)
+# define DP_TEST_EDID_CHECKSUM_WRITE	    (1 << 2)
+
+#define DP_TEST_EDID_CHECKSUM		    0x261
+
+#define DP_TEST_SINK			    0x270
+# define DP_TEST_SINK_START		    (1 << 0)
+
+#define DP_PAYLOAD_TABLE_UPDATE_STATUS      0x2c0   /* 1.2 MST */
+# define DP_PAYLOAD_TABLE_UPDATED           (1 << 0)
+# define DP_PAYLOAD_ACT_HANDLED             (1 << 1)
+
+#define DP_VC_PAYLOAD_ID_SLOT_1             0x2c1   /* 1.2 MST */
+/* up to ID_SLOT_63 at 0x2ff */
+
+#define DP_SOURCE_OUI			    0x300
+#define DP_SINK_OUI			    0x400
+#define DP_BRANCH_OUI			    0x500
+
+#define DP_SET_POWER                        0x600
+# define DP_SET_POWER_D0                    0x1
+# define DP_SET_POWER_D3                    0x2
+# define DP_SET_POWER_MASK                  0x3
+
+#define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
+# define DP_EDP_11			    0x00
+# define DP_EDP_12			    0x01
+# define DP_EDP_13			    0x02
+# define DP_EDP_14			    0x03
+
+#define DP_EDP_GENERAL_CAP_1		    0x701
+
+#define DP_EDP_BACKLIGHT_ADJUSTMENT_CAP     0x702
+
+#define DP_EDP_GENERAL_CAP_2		    0x703
+
+#define DP_EDP_GENERAL_CAP_3		    0x704    /* eDP 1.4 */
+
+#define DP_EDP_DISPLAY_CONTROL_REGISTER     0x720
+
+#define DP_EDP_BACKLIGHT_MODE_SET_REGISTER  0x721
+
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_MSB     0x722
+#define DP_EDP_BACKLIGHT_BRIGHTNESS_LSB     0x723
+
+#define DP_EDP_PWMGEN_BIT_COUNT             0x724
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
+#define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
+
+#define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
+
+#define DP_EDP_BACKLIGHT_FREQ_SET           0x728
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_LSB   0x72c
+
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MSB   0x72d
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_MID   0x72e
+#define DP_EDP_BACKLIGHT_FREQ_CAP_MAX_LSB   0x72f
+
+#define DP_EDP_DBC_MINIMUM_BRIGHTNESS_SET   0x732
+#define DP_EDP_DBC_MAXIMUM_BRIGHTNESS_SET   0x733
+
+#define DP_EDP_REGIONAL_BACKLIGHT_BASE      0x740    /* eDP 1.4 */
+#define DP_EDP_REGIONAL_BACKLIGHT_0	    0x741    /* eDP 1.4 */
+
+#define DP_SIDEBAND_MSG_DOWN_REQ_BASE	    0x1000   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REP_BASE	    0x1200   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_DOWN_REP_BASE	    0x1400   /* 1.2 MST */
+#define DP_SIDEBAND_MSG_UP_REQ_BASE	    0x1600   /* 1.2 MST */
+
+#define DP_SINK_COUNT_ESI		    0x2002   /* 1.2 */
+/* 0-5 sink count */
+# define DP_SINK_COUNT_CP_READY             (1 << 6)
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0   0x2003   /* 1.2 */
+
+#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1   0x2004   /* 1.2 */
+
+#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0     0x2005   /* 1.2 */
+
+#define DP_PSR_ERROR_STATUS                 0x2006  /* XXX 1.2? */
+# define DP_PSR_LINK_CRC_ERROR              (1 << 0)
+# define DP_PSR_RFB_STORAGE_ERROR           (1 << 1)
+# define DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR (1 << 2) /* eDP 1.4 */
+
+#define DP_PSR_ESI                          0x2007  /* XXX 1.2? */
+# define DP_PSR_CAPS_CHANGE                 (1 << 0)
+
+#define DP_PSR_STATUS                       0x2008  /* XXX 1.2? */
+# define DP_PSR_SINK_INACTIVE               0
+# define DP_PSR_SINK_ACTIVE_SRC_SYNCED      1
+# define DP_PSR_SINK_ACTIVE_RFB             2
+# define DP_PSR_SINK_ACTIVE_SINK_SYNCED     3
+# define DP_PSR_SINK_ACTIVE_RESYNC          4
+# define DP_PSR_SINK_INTERNAL_ERROR         7
+# define DP_PSR_SINK_STATE_MASK             0x07
+
+#define DP_RECEIVER_ALPM_STATUS		    0x200b  /* eDP 1.4 */
+# define DP_ALPM_LOCK_TIMEOUT_ERROR	    (1 << 0)
+
+/* DP 1.2 Sideband message defines */
+/* peer device type - DP 1.2a Table 2-92 */
+#define DP_PEER_DEVICE_NONE		0x0
+#define DP_PEER_DEVICE_SOURCE_OR_SST	0x1
+#define DP_PEER_DEVICE_MST_BRANCHING	0x2
+#define DP_PEER_DEVICE_SST_SINK		0x3
+#define DP_PEER_DEVICE_DP_LEGACY_CONV	0x4
+
+/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */
+#define DP_LINK_ADDRESS			0x01
+#define DP_CONNECTION_STATUS_NOTIFY	0x02
+#define DP_ENUM_PATH_RESOURCES		0x10
+#define DP_ALLOCATE_PAYLOAD		0x11
+#define DP_QUERY_PAYLOAD		0x12
+#define DP_RESOURCE_STATUS_NOTIFY	0x13
+#define DP_CLEAR_PAYLOAD_ID_TABLE	0x14
+#define DP_REMOTE_DPCD_READ		0x20
+#define DP_REMOTE_DPCD_WRITE		0x21
+#define DP_REMOTE_I2C_READ		0x22
+#define DP_REMOTE_I2C_WRITE		0x23
+#define DP_POWER_UP_PHY			0x24
+#define DP_POWER_DOWN_PHY		0x25
+#define DP_SINK_EVENT_NOTIFY		0x30
+#define DP_QUERY_STREAM_ENC_STATUS	0x38
+
+/* DP 1.2 MST sideband nak reasons - table 2.84 */
+#define DP_NAK_WRITE_FAILURE		0x01
+#define DP_NAK_INVALID_READ		0x02
+#define DP_NAK_CRC_FAILURE		0x03
+#define DP_NAK_BAD_PARAM		0x04
+#define DP_NAK_DEFER			0x05
+#define DP_NAK_LINK_FAILURE		0x06
+#define DP_NAK_NO_RESOURCES		0x07
+#define DP_NAK_DPCD_FAIL		0x08
+#define DP_NAK_I2C_NAK			0x09
+#define DP_NAK_ALLOCATE_FAIL		0x0a
+
+#define ANALOGIX_DP_TX_SW_RESET			0x14
+#define ANALOGIX_DP_FUNC_EN_1			0x18
+#define ANALOGIX_DP_FUNC_EN_2			0x1C
+#define ANALOGIX_DP_VIDEO_CTL_1			0x20
+#define ANALOGIX_DP_VIDEO_CTL_2			0x24
+#define ANALOGIX_DP_VIDEO_CTL_3			0x28
+
+#define ANALOGIX_DP_VIDEO_CTL_8			0x3C
+#define ANALOGIX_DP_VIDEO_CTL_10		0x44
+
+#define ANALOGIX_DP_PLL_REG_1			0xfc
+#define ANALOGIX_DP_PLL_REG_2			0x9e4
+#define ANALOGIX_DP_PLL_REG_3			0x9e8
+#define ANALOGIX_DP_PLL_REG_4			0x9ec
+#define ANALOGIX_DP_PLL_REG_5			0xa00
+
+#define ANALOGIX_DP_PD				0x12c
+
+#define ANALOGIX_DP_LANE_MAP			0x35C
+
+#define ANALOGIX_DP_ANALOG_CTL_1		0x370
+#define ANALOGIX_DP_ANALOG_CTL_2		0x374
+#define ANALOGIX_DP_ANALOG_CTL_3		0x378
+#define ANALOGIX_DP_PLL_FILTER_CTL_1		0x37C
+#define ANALOGIX_DP_TX_AMP_TUNING_CTL		0x380
+
+#define ANALOGIX_DP_AUX_HW_RETRY_CTL		0x390
+
+#define ANALOGIX_DP_COMMON_INT_STA_1		0x3C4
+#define ANALOGIX_DP_COMMON_INT_STA_2		0x3C8
+#define ANALOGIX_DP_COMMON_INT_STA_3		0x3CC
+#define ANALOGIX_DP_COMMON_INT_STA_4		0x3D0
+#define ANALOGIX_DP_INT_STA			0x3DC
+#define ANALOGIX_DP_COMMON_INT_MASK_1		0x3E0
+#define ANALOGIX_DP_COMMON_INT_MASK_2		0x3E4
+#define ANALOGIX_DP_COMMON_INT_MASK_3		0x3E8
+#define ANALOGIX_DP_COMMON_INT_MASK_4		0x3EC
+#define ANALOGIX_DP_INT_STA_MASK		0x3F8
+#define ANALOGIX_DP_INT_CTL			0x3FC
+
+#define ANALOGIX_DP_SYS_CTL_1			0x600
+#define ANALOGIX_DP_SYS_CTL_2			0x604
+#define ANALOGIX_DP_SYS_CTL_3			0x608
+#define ANALOGIX_DP_SYS_CTL_4			0x60C
+
+#define ANALOGIX_DP_PKT_SEND_CTL		0x640
+#define ANALOGIX_DP_HDCP_CTL			0x648
+
+#define ANALOGIX_DP_LINK_BW_SET			0x680
+#define ANALOGIX_DP_LANE_COUNT_SET		0x684
+#define ANALOGIX_DP_TRAINING_PTN_SET		0x688
+#define ANALOGIX_DP_LN0_LINK_TRAINING_CTL	0x68C
+#define ANALOGIX_DP_LN1_LINK_TRAINING_CTL	0x690
+#define ANALOGIX_DP_LN2_LINK_TRAINING_CTL	0x694
+#define ANALOGIX_DP_LN3_LINK_TRAINING_CTL	0x698
+
+#define ANALOGIX_DP_DEBUG_CTL			0x6C0
+#define ANALOGIX_DP_HPD_DEGLITCH_L		0x6C4
+#define ANALOGIX_DP_HPD_DEGLITCH_H		0x6C8
+#define ANALOGIX_DP_LINK_DEBUG_CTL		0x6E0
+
+#define ANALOGIX_DP_M_VID_0			0x700
+#define ANALOGIX_DP_M_VID_1			0x704
+#define ANALOGIX_DP_M_VID_2			0x708
+#define ANALOGIX_DP_N_VID_0			0x70C
+#define ANALOGIX_DP_N_VID_1			0x710
+#define ANALOGIX_DP_N_VID_2			0x714
+
+#define ANALOGIX_DP_PLL_CTL			0x71C
+#define ANALOGIX_DP_PHY_PD			0x720
+#define ANALOGIX_DP_PHY_TEST			0x724
+
+#define ANALOGIX_DP_VIDEO_FIFO_THRD		0x730
+#define ANALOGIX_DP_AUDIO_MARGIN		0x73C
+
+#define ANALOGIX_DP_M_VID_GEN_FILTER_TH		0x764
+#define ANALOGIX_DP_M_AUD_GEN_FILTER_TH		0x778
+#define ANALOGIX_DP_AUX_CH_STA			0x780
+#define ANALOGIX_DP_AUX_CH_DEFER_CTL		0x788
+#define ANALOGIX_DP_AUX_RX_COMM			0x78C
+#define ANALOGIX_DP_BUFFER_DATA_CTL		0x790
+#define ANALOGIX_DP_AUX_CH_CTL_1		0x794
+#define ANALOGIX_DP_AUX_ADDR_7_0		0x798
+#define ANALOGIX_DP_AUX_ADDR_15_8		0x79C
+#define ANALOGIX_DP_AUX_ADDR_19_16		0x7A0
+#define ANALOGIX_DP_AUX_CH_CTL_2		0x7A4
+
+#define ANALOGIX_DP_BUF_DATA_0			0x7C0
+
+#define ANALOGIX_DP_SOC_GENERAL_CTL		0x800
+
+/* ANALOGIX_DP_TX_SW_RESET */
+#define RESET_DP_TX				(0x1 << 0)
+
+/* ANALOGIX_DP_FUNC_EN_1 */
+#define MASTER_VID_FUNC_EN_N			(0x1 << 7)
+#define SLAVE_VID_FUNC_EN_N			(0x1 << 5)
+#define AUD_FIFO_FUNC_EN_N			(0x1 << 4)
+#define AUD_FUNC_EN_N				(0x1 << 3)
+#define HDCP_FUNC_EN_N				(0x1 << 2)
+#define CRC_FUNC_EN_N				(0x1 << 1)
+#define SW_FUNC_EN_N				(0x1 << 0)
+
+/* ANALOGIX_DP_FUNC_EN_2 */
+#define SSC_FUNC_EN_N				(0x1 << 7)
+#define AUX_FUNC_EN_N				(0x1 << 2)
+#define SERDES_FIFO_FUNC_EN_N			(0x1 << 1)
+#define LS_CLK_DOMAIN_FUNC_EN_N			(0x1 << 0)
+
+/* ANALOGIX_DP_VIDEO_CTL_1 */
+#define VIDEO_EN				(0x1 << 7)
+#define HDCP_VIDEO_MUTE				(0x1 << 6)
+
+/* ANALOGIX_DP_VIDEO_CTL_1 */
+#define IN_D_RANGE_MASK				(0x1 << 7)
+#define IN_D_RANGE_SHIFT			(7)
+#define IN_D_RANGE_CEA				(0x1 << 7)
+#define IN_D_RANGE_VESA				(0x0 << 7)
+#define IN_BPC_MASK				(0x7 << 4)
+#define IN_BPC_SHIFT				(4)
+#define IN_BPC_12_BITS				(0x3 << 4)
+#define IN_BPC_10_BITS				(0x2 << 4)
+#define IN_BPC_8_BITS				(0x1 << 4)
+#define IN_BPC_6_BITS				(0x0 << 4)
+#define IN_COLOR_F_MASK				(0x3 << 0)
+#define IN_COLOR_F_SHIFT			(0)
+#define IN_COLOR_F_YCBCR444			(0x2 << 0)
+#define IN_COLOR_F_YCBCR422			(0x1 << 0)
+#define IN_COLOR_F_RGB				(0x0 << 0)
+
+/* ANALOGIX_DP_VIDEO_CTL_3 */
+#define IN_YC_COEFFI_MASK			(0x1 << 7)
+#define IN_YC_COEFFI_SHIFT			(7)
+#define IN_YC_COEFFI_ITU709			(0x1 << 7)
+#define IN_YC_COEFFI_ITU601			(0x0 << 7)
+#define VID_CHK_UPDATE_TYPE_MASK		(0x1 << 4)
+#define VID_CHK_UPDATE_TYPE_SHIFT		(4)
+#define VID_CHK_UPDATE_TYPE_1			(0x1 << 4)
+#define VID_CHK_UPDATE_TYPE_0			(0x0 << 4)
+
+/* ANALOGIX_DP_VIDEO_CTL_8 */
+#define VID_HRES_TH(x)				(((x) & 0xf) << 4)
+#define VID_VRES_TH(x)				(((x) & 0xf) << 0)
+
+/* ANALOGIX_DP_VIDEO_CTL_10 */
+#define FORMAT_SEL				(0x1 << 4)
+#define INTERACE_SCAN_CFG			(0x1 << 2)
+#define VSYNC_POLARITY_CFG			(0x1 << 1)
+#define HSYNC_POLARITY_CFG			(0x1 << 0)
+
+/* ANALOGIX_DP_PLL_REG_1 */
+#define REF_CLK_24M				(0x1 << 0)
+#define REF_CLK_27M				(0x0 << 0)
+#define REF_CLK_MASK				(0x1 << 0)
+
+/* ANALOGIX_DP_LANE_MAP */
+#define LANE3_MAP_LOGIC_LANE_0			(0x0 << 6)
+#define LANE3_MAP_LOGIC_LANE_1			(0x1 << 6)
+#define LANE3_MAP_LOGIC_LANE_2			(0x2 << 6)
+#define LANE3_MAP_LOGIC_LANE_3			(0x3 << 6)
+#define LANE2_MAP_LOGIC_LANE_0			(0x0 << 4)
+#define LANE2_MAP_LOGIC_LANE_1			(0x1 << 4)
+#define LANE2_MAP_LOGIC_LANE_2			(0x2 << 4)
+#define LANE2_MAP_LOGIC_LANE_3			(0x3 << 4)
+#define LANE1_MAP_LOGIC_LANE_0			(0x0 << 2)
+#define LANE1_MAP_LOGIC_LANE_1			(0x1 << 2)
+#define LANE1_MAP_LOGIC_LANE_2			(0x2 << 2)
+#define LANE1_MAP_LOGIC_LANE_3			(0x3 << 2)
+#define LANE0_MAP_LOGIC_LANE_0			(0x0 << 0)
+#define LANE0_MAP_LOGIC_LANE_1			(0x1 << 0)
+#define LANE0_MAP_LOGIC_LANE_2			(0x2 << 0)
+#define LANE0_MAP_LOGIC_LANE_3			(0x3 << 0)
+
+/* ANALOGIX_DP_ANALOG_CTL_1 */
+#define TX_TERMINAL_CTRL_50_OHM			(0x1 << 4)
+
+/* ANALOGIX_DP_ANALOG_CTL_2 */
+#define SEL_24M					(0x1 << 3)
+#define TX_DVDD_BIT_1_0625V			(0x4 << 0)
+
+/* ANALOGIX_DP_ANALOG_CTL_3 */
+#define DRIVE_DVDD_BIT_1_0625V			(0x4 << 5)
+#define VCO_BIT_600_MICRO			(0x5 << 0)
+
+/* ANALOGIX_DP_PLL_FILTER_CTL_1 */
+#define PD_RING_OSC				(0x1 << 6)
+#define AUX_TERMINAL_CTRL_50_OHM		(0x2 << 4)
+#define TX_CUR1_2X				(0x1 << 2)
+#define TX_CUR_16_MA				(0x3 << 0)
+
+/* ANALOGIX_DP_TX_AMP_TUNING_CTL */
+#define CH3_AMP_400_MV				(0x0 << 24)
+#define CH2_AMP_400_MV				(0x0 << 16)
+#define CH1_AMP_400_MV				(0x0 << 8)
+#define CH0_AMP_400_MV				(0x0 << 0)
+
+/* ANALOGIX_DP_AUX_HW_RETRY_CTL */
+#define AUX_BIT_PERIOD_EXPECTED_DELAY(x)	(((x) & 0x7) << 8)
+#define AUX_HW_RETRY_INTERVAL_MASK		(0x3 << 3)
+#define AUX_HW_RETRY_INTERVAL_600_MICROSECONDS	(0x0 << 3)
+#define AUX_HW_RETRY_INTERVAL_800_MICROSECONDS	(0x1 << 3)
+#define AUX_HW_RETRY_INTERVAL_1000_MICROSECONDS	(0x2 << 3)
+#define AUX_HW_RETRY_INTERVAL_1800_MICROSECONDS	(0x3 << 3)
+#define AUX_HW_RETRY_COUNT_SEL(x)		(((x) & 0x7) << 0)
+
+/* ANALOGIX_DP_COMMON_INT_STA_1 */
+#define VSYNC_DET				(0x1 << 7)
+#define PLL_LOCK_CHG				(0x1 << 6)
+#define SPDIF_ERR				(0x1 << 5)
+#define SPDIF_UNSTBL				(0x1 << 4)
+#define VID_FORMAT_CHG				(0x1 << 3)
+#define AUD_CLK_CHG				(0x1 << 2)
+#define VID_CLK_CHG				(0x1 << 1)
+#define SW_INT					(0x1 << 0)
+
+/* ANALOGIX_DP_COMMON_INT_STA_2 */
+#define ENC_EN_CHG				(0x1 << 6)
+#define HW_BKSV_RDY				(0x1 << 3)
+#define HW_SHA_DONE				(0x1 << 2)
+#define HW_AUTH_STATE_CHG			(0x1 << 1)
+#define HW_AUTH_DONE				(0x1 << 0)
+
+/* ANALOGIX_DP_COMMON_INT_STA_3 */
+#define AFIFO_UNDER				(0x1 << 7)
+#define AFIFO_OVER				(0x1 << 6)
+#define R0_CHK_FLAG				(0x1 << 5)
+
+/* ANALOGIX_DP_COMMON_INT_STA_4 */
+#define PSR_ACTIVE				(0x1 << 7)
+#define PSR_INACTIVE				(0x1 << 6)
+#define SPDIF_BI_PHASE_ERR			(0x1 << 5)
+#define HOTPLUG_CHG				(0x1 << 2)
+#define HPD_LOST				(0x1 << 1)
+#define PLUG					(0x1 << 0)
+
+/* ANALOGIX_DP_INT_STA */
+#define INT_HPD					(0x1 << 6)
+#define HW_TRAINING_FINISH			(0x1 << 5)
+#define RPLY_RECEIV				(0x1 << 1)
+#define AUX_ERR					(0x1 << 0)
+
+/* ANALOGIX_DP_INT_CTL */
+#define SOFT_INT_CTRL				(0x1 << 2)
+#define INT_POL1				(0x1 << 1)
+#define INT_POL0				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_1 */
+#define DET_STA					(0x1 << 2)
+#define FORCE_DET				(0x1 << 1)
+#define DET_CTRL				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_2 */
+#define CHA_CRI(x)				(((x) & 0xf) << 4)
+#define CHA_STA					(0x1 << 2)
+#define FORCE_CHA				(0x1 << 1)
+#define CHA_CTRL				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_3 */
+#define HPD_STATUS				(0x1 << 6)
+#define F_HPD					(0x1 << 5)
+#define HPD_CTRL				(0x1 << 4)
+#define HDCP_RDY				(0x1 << 3)
+#define STRM_VALID				(0x1 << 2)
+#define F_VALID					(0x1 << 1)
+#define VALID_CTRL				(0x1 << 0)
+
+/* ANALOGIX_DP_SYS_CTL_4 */
+#define FIX_M_AUD				(0x1 << 4)
+#define ENHANCED				(0x1 << 3)
+#define FIX_M_VID				(0x1 << 2)
+#define M_VID_UPDATE_CTRL			(0x3 << 0)
+
+/* ANALOGIX_DP_TRAINING_PTN_SET */
+#define SCRAMBLER_TYPE				(0x1 << 9)
+#define HW_LINK_TRAINING_PATTERN		(0x1 << 8)
+#define SCRAMBLING_DISABLE			(0x1 << 5)
+#define SCRAMBLING_ENABLE			(0x0 << 5)
+#define LINK_QUAL_PATTERN_SET_MASK		(0x3 << 2)
+#define LINK_QUAL_PATTERN_SET_PRBS7		(0x3 << 2)
+#define LINK_QUAL_PATTERN_SET_D10_2		(0x1 << 2)
+#define LINK_QUAL_PATTERN_SET_DISABLE		(0x0 << 2)
+#define SW_TRAINING_PATTERN_SET_MASK		(0x3 << 0)
+#define SW_TRAINING_PATTERN_SET_PTN2		(0x2 << 0)
+#define SW_TRAINING_PATTERN_SET_PTN1		(0x1 << 0)
+#define SW_TRAINING_PATTERN_SET_NORMAL		(0x0 << 0)
+
+/* ANALOGIX_DP_LN0_LINK_TRAINING_CTL */
+#define PRE_EMPHASIS_SET_MASK			(0x3 << 3)
+#define PRE_EMPHASIS_SET_SHIFT			(3)
+
+/* ANALOGIX_DP_DEBUG_CTL */
+#define PLL_LOCK				(0x1 << 4)
+#define F_PLL_LOCK				(0x1 << 3)
+#define PLL_LOCK_CTRL				(0x1 << 2)
+#define PN_INV					(0x1 << 0)
+
+/* ANALOGIX_DP_PLL_CTL */
+#define DP_PLL_PD				(0x1 << 7)
+#define DP_PLL_RESET				(0x1 << 6)
+#define DP_PLL_LOOP_BIT_DEFAULT			(0x1 << 4)
+#define DP_PLL_REF_BIT_1_1250V			(0x5 << 0)
+#define DP_PLL_REF_BIT_1_2500V			(0x7 << 0)
+
+/* ANALOGIX_DP_PHY_PD */
+#define DP_PHY_PD				(0x1 << 5)
+#define AUX_PD					(0x1 << 4)
+#define CH3_PD					(0x1 << 3)
+#define CH2_PD					(0x1 << 2)
+#define CH1_PD					(0x1 << 1)
+#define CH0_PD					(0x1 << 0)
+
+/* ANALOGIX_DP_PHY_TEST */
+#define MACRO_RST				(0x1 << 5)
+#define CH1_TEST				(0x1 << 1)
+#define CH0_TEST				(0x1 << 0)
+
+/* ANALOGIX_DP_AUX_CH_STA */
+#define AUX_BUSY				(0x1 << 4)
+#define AUX_STATUS_MASK				(0xf << 0)
+
+/* ANALOGIX_DP_AUX_CH_DEFER_CTL */
+#define DEFER_CTRL_EN				(0x1 << 7)
+#define DEFER_COUNT(x)				(((x) & 0x7f) << 0)
+
+/* ANALOGIX_DP_AUX_RX_COMM */
+#define AUX_RX_COMM_I2C_DEFER			(0x2 << 2)
+#define AUX_RX_COMM_AUX_DEFER			(0x2 << 0)
+
+/* ANALOGIX_DP_BUFFER_DATA_CTL */
+#define BUF_CLR					(0x1 << 7)
+#define BUF_DATA_COUNT(x)			(((x) & 0x1f) << 0)
+
+/* ANALOGIX_DP_AUX_CH_CTL_1 */
+#define AUX_LENGTH(x)				(((x - 1) & 0xf) << 4)
+#define AUX_TX_COMM_MASK			(0xf << 0)
+#define AUX_TX_COMM_DP_TRANSACTION		(0x1 << 3)
+#define AUX_TX_COMM_I2C_TRANSACTION		(0x0 << 3)
+#define AUX_TX_COMM_MOT				(0x1 << 2)
+#define AUX_TX_COMM_WRITE			(0x0 << 0)
+#define AUX_TX_COMM_READ			(0x1 << 0)
+
+/* ANALOGIX_DP_AUX_ADDR_7_0 */
+#define AUX_ADDR_7_0(x)				(((x) >> 0) & 0xff)
+
+/* ANALOGIX_DP_AUX_ADDR_15_8 */
+#define AUX_ADDR_15_8(x)			(((x) >> 8) & 0xff)
+
+/* ANALOGIX_DP_AUX_ADDR_19_16 */
+#define AUX_ADDR_19_16(x)			(((x) >> 16) & 0x0f)
+
+/* ANALOGIX_DP_AUX_CH_CTL_2 */
+#define ADDR_ONLY				(0x1 << 1)
+#define AUX_EN					(0x1 << 0)
+
+/* ANALOGIX_DP_SOC_GENERAL_CTL */
+#define AUDIO_MODE_SPDIF_MODE			(0x1 << 8)
+#define AUDIO_MODE_MASTER_MODE			(0x0 << 8)
+#define MASTER_VIDEO_INTERLACE_EN		(0x1 << 4)
+#define VIDEO_MASTER_CLK_SEL			(0x1 << 2)
+#define VIDEO_MASTER_MODE_EN			(0x1 << 1)
+#define VIDEO_MODE_MASK				(0x1 << 0)
+#define VIDEO_MODE_SLAVE_MODE			(0x1 << 0)
+#define VIDEO_MODE_MASTER_MODE			(0x0 << 0)
+
+#define DP_TIMEOUT_LOOP_COUNT 100
+#define MAX_CR_LOOP 5
+#define MAX_EQ_LOOP 5
+
+/* I2C EDID Chip ID, Slave Address */
+#define I2C_EDID_DEVICE_ADDR			0x50
+#define I2C_E_EDID_DEVICE_ADDR			0x30
+
+#define EDID_BLOCK_LENGTH			0x80
+#define EDID_HEADER_PATTERN			0x00
+#define EDID_EXTENSION_FLAG			0x7e
+#define EDID_CHECKSUM				0x7f
+
+/* DP_MAX_LANE_COUNT */
+#define DPCD_ENHANCED_FRAME_CAP(x)		(((x) >> 7) & 0x1)
+#define DPCD_MAX_LANE_COUNT(x)			((x) & 0x1f)
+
+/* DP_LANE_COUNT_SET */
+#define DPCD_LANE_COUNT_SET(x)			((x) & 0x1f)
+
+/* DP_TRAINING_LANE0_SET */
+#define DPCD_PRE_EMPHASIS_SET(x)		(((x) & 0x3) << 3)
+#define DPCD_PRE_EMPHASIS_GET(x)		(((x) >> 3) & 0x3)
+#define DPCD_VOLTAGE_SWING_SET(x)		(((x) & 0x3) << 0)
+#define DPCD_VOLTAGE_SWING_GET(x)		(((x) >> 0) & 0x3)
+
+enum link_lane_count_type {
+	LANE_COUNT1 = 1,
+	LANE_COUNT2 = 2,
+	LANE_COUNT4 = 4
+};
+
+enum link_training_state {
+	START,
+	CLOCK_RECOVERY,
+	EQUALIZER_TRAINING,
+	FINISHED,
+	FAILED
+};
+
+enum voltage_swing_level {
+	VOLTAGE_LEVEL_0,
+	VOLTAGE_LEVEL_1,
+	VOLTAGE_LEVEL_2,
+	VOLTAGE_LEVEL_3,
+};
+
+enum pre_emphasis_level {
+	PRE_EMPHASIS_LEVEL_0,
+	PRE_EMPHASIS_LEVEL_1,
+	PRE_EMPHASIS_LEVEL_2,
+	PRE_EMPHASIS_LEVEL_3,
+};
+
+enum pattern_set {
+	PRBS7,
+	D10_2,
+	TRAINING_PTN1,
+	TRAINING_PTN2,
+	DP_NONE
+};
+
+enum color_space {
+	COLOR_RGB,
+	COLOR_YCBCR422,
+	COLOR_YCBCR444
+};
+
+enum color_depth {
+	COLOR_6,
+	COLOR_8,
+	COLOR_10,
+	COLOR_12
+};
+
+enum color_coefficient {
+	COLOR_YCBCR601,
+	COLOR_YCBCR709
+};
+
+enum dynamic_range {
+	VESA,
+	CEA
+};
+
+enum pll_status {
+	PLL_UNLOCKED,
+	PLL_LOCKED
+};
+
+enum clock_recovery_m_value_type {
+	CALCULATED_M,
+	REGISTER_M
+};
+
+enum video_timing_recognition_type {
+	VIDEO_TIMING_FROM_CAPTURE,
+	VIDEO_TIMING_FROM_REGISTER
+};
+
+enum analog_power_block {
+	AUX_BLOCK,
+	CH0_BLOCK,
+	CH1_BLOCK,
+	CH2_BLOCK,
+	CH3_BLOCK,
+	ANALOG_TOTAL,
+	POWER_ALL
+};
+
+enum dp_irq_type {
+	DP_IRQ_TYPE_HP_CABLE_IN  = BIT(0),
+	DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
+	DP_IRQ_TYPE_HP_CHANGE    = BIT(2),
+	DP_IRQ_TYPE_UNKNOWN      = BIT(3),
+};
+
+struct video_info {
+	char *name;
+
+	bool h_sync_polarity;
+	bool v_sync_polarity;
+	bool interlaced;
+
+	enum color_space color_space;
+	enum dynamic_range dynamic_range;
+	enum color_coefficient ycbcr_coeff;
+	enum color_depth color_depth;
+
+	int max_link_rate;
+	enum link_lane_count_type max_lane_count;
+};
+
+struct link_train {
+	int eq_loop;
+	int cr_loop[4];
+
+	u8 link_rate;
+	u8 lane_count;
+	u8 training_lane[4];
+
+	enum link_training_state lt_state;
+};
+
+enum analogix_dp_devtype {
+	EXYNOS_DP,
+	ROCKCHIP_DP,
+};
+
+enum analogix_dp_sub_devtype {
+	RK3288_DP,
+	RK3368_EDP,
+	RK3399_EDP,
+};
+
+struct analogix_dp_plat_data {
+	enum analogix_dp_devtype dev_type;
+	enum analogix_dp_sub_devtype subdev_type;
+};
+
+struct analogix_dp_device {
+	void *reg_base;
+	void *grf;
+	struct gpio_desc hpd_gpio;
+	struct video_info	video_info;
+	struct link_train	link_train;
+	struct drm_display_mode *mode;
+	struct analogix_dp_plat_data *plat_data;
+	unsigned char edid[EDID_BLOCK_LENGTH * 2];
+};
+
+/* analogix_dp_reg.c */
+void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable);
+void analogix_dp_stop_video(struct analogix_dp_device *dp);
+void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable);
+void analogix_dp_init_analog_param(struct analogix_dp_device *dp);
+void analogix_dp_init_interrupt(struct analogix_dp_device *dp);
+void analogix_dp_reset(struct analogix_dp_device *dp);
+void analogix_dp_swreset(struct analogix_dp_device *dp);
+void analogix_dp_config_interrupt(struct analogix_dp_device *dp);
+void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp);
+void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp);
+enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp);
+void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable);
+void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
+				       enum analog_power_block block,
+				       bool enable);
+void analogix_dp_init_analog_func(struct analogix_dp_device *dp);
+void analogix_dp_init_hpd(struct analogix_dp_device *dp);
+void analogix_dp_force_hpd(struct analogix_dp_device *dp);
+enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
+void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp);
+void analogix_dp_reset_aux(struct analogix_dp_device *dp);
+void analogix_dp_init_aux(struct analogix_dp_device *dp);
+int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp);
+void analogix_dp_enable_sw_function(struct analogix_dp_device *dp);
+int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp);
+int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
+				   unsigned int reg_addr,
+				   unsigned char data);
+int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned char *data);
+int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char data[]);
+int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
+				     unsigned int reg_addr,
+				     unsigned int count,
+				     unsigned char data[]);
+int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
+				  unsigned int device_addr,
+				  unsigned int reg_addr);
+int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
+				   unsigned int device_addr,
+				   unsigned int reg_addr,
+				   unsigned int *data);
+int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
+				    unsigned int device_addr,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char edid[]);
+void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype);
+void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype);
+void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count);
+void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count);
+void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
+				      bool enable);
+void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
+				      enum pattern_set pattern);
+void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level);
+void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane);
+u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
+u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
+u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
+u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
+void analogix_dp_reset_macro(struct analogix_dp_device *dp);
+void analogix_dp_init_video(struct analogix_dp_device *dp);
+
+void analogix_dp_set_video_color_format(struct analogix_dp_device *dp);
+int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp);
+void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
+				 enum clock_recovery_m_value_type type,
+				 u32 m_value,
+				 u32 n_value);
+void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type);
+void analogix_dp_enable_video_master(struct analogix_dp_device *dp,
+				     bool enable);
+void analogix_dp_start_video(struct analogix_dp_device *dp);
+int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp);
+void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
+void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
+void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
+
+#endif /* __DRM_ANALOGIX_DP__ */
diff --git a/drivers/video/drm/rockchip_analogix_dp_reg.c b/drivers/video/drm/rockchip_analogix_dp_reg.c
new file mode 100644
index 0000000000..7e6c638972
--- /dev/null
+++ b/drivers/video/drm/rockchip_analogix_dp_reg.c
@@ -0,0 +1,1334 @@
+/*
+ * Analogix DP (Display port) core register interface driver.
+ *
+ * Copyright (C) 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2012 Samsung Electronics Co., Ltd.
+ * Author: Jingoo Han <jg1.han@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <dm/device.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_analogix_dp.h"
+
+#define COMMON_INT_MASK_1	0
+#define COMMON_INT_MASK_2	0
+#define COMMON_INT_MASK_3	0
+#define COMMON_INT_MASK_4	(HOTPLUG_CHG | HPD_LOST | PLUG)
+#define INT_STA_MASK		INT_HPD
+
+void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		reg |= HDCP_VIDEO_MUTE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+		reg &= ~HDCP_VIDEO_MUTE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	}
+}
+
+void analogix_dp_stop_video(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	reg &= ~VIDEO_EN;
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+}
+
+void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable)
+		reg = LANE3_MAP_LOGIC_LANE_0 | LANE2_MAP_LOGIC_LANE_1 |
+		      LANE1_MAP_LOGIC_LANE_2 | LANE0_MAP_LOGIC_LANE_3;
+	else
+		reg = LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 |
+		      LANE1_MAP_LOGIC_LANE_1 | LANE0_MAP_LOGIC_LANE_0;
+
+	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP);
+}
+
+void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = TX_TERMINAL_CTRL_50_OHM;
+	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1);
+
+	reg = SEL_24M | TX_DVDD_BIT_1_0625V;
+	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
+
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
+		reg = REF_CLK_24M;
+		if (dp->plat_data->subdev_type == RK3288_DP ||
+		    dp->plat_data->subdev_type == RK3368_EDP)
+			reg ^= REF_CLK_MASK;
+
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+		writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
+		writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
+		writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
+		writel(0x22, dp->reg_base + ANALOGIX_DP_PLL_REG_5);
+	}
+
+	reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;
+	writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3);
+
+	reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM |
+		TX_CUR1_2X | TX_CUR_16_MA;
+	writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1);
+
+	reg = CH3_AMP_400_MV | CH2_AMP_400_MV |
+		CH1_AMP_400_MV | CH0_AMP_400_MV;
+	writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL);
+}
+
+void analogix_dp_init_interrupt(struct analogix_dp_device *dp)
+{
+	/* Set interrupt pin assertion polarity as high */
+	writel(INT_POL1 | INT_POL0, dp->reg_base + ANALOGIX_DP_INT_CTL);
+
+	/* Clear pending regisers */
+	writel(0xff, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+	writel(0x4f, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_2);
+	writel(0xe0, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_3);
+	writel(0xe7, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+	writel(0x63, dp->reg_base + ANALOGIX_DP_INT_STA);
+
+	/* 0:mask,1: unmask */
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	writel(0x00, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+void analogix_dp_reset(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	analogix_dp_stop_video(dp);
+	analogix_dp_enable_video_mute(dp, 0);
+
+	reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
+		AUD_FIFO_FUNC_EN_N | AUD_FUNC_EN_N |
+		HDCP_FUNC_EN_N | SW_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+
+	reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N |
+		SERDES_FIFO_FUNC_EN_N |
+		LS_CLK_DOMAIN_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+
+	udelay(30);
+
+	analogix_dp_lane_swap(dp, 0);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+	writel(0x40, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_PKT_SEND_CTL);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_HDCP_CTL);
+
+	writel(0x5e, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_L);
+	writel(0x1a, dp->reg_base + ANALOGIX_DP_HPD_DEGLITCH_H);
+
+	writel(0x10, dp->reg_base + ANALOGIX_DP_LINK_DEBUG_CTL);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+
+	writel(0x0, dp->reg_base + ANALOGIX_DP_VIDEO_FIFO_THRD);
+	writel(0x20, dp->reg_base + ANALOGIX_DP_AUDIO_MARGIN);
+
+	writel(0x4, dp->reg_base + ANALOGIX_DP_M_VID_GEN_FILTER_TH);
+	writel(0x2, dp->reg_base + ANALOGIX_DP_M_AUD_GEN_FILTER_TH);
+
+	writel(0x00000101, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+}
+
+void analogix_dp_swreset(struct analogix_dp_device *dp)
+{
+	writel(RESET_DP_TX, dp->reg_base + ANALOGIX_DP_TX_SW_RESET);
+}
+
+void analogix_dp_config_interrupt(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* 0: mask, 1: unmask */
+	reg = COMMON_INT_MASK_1;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1);
+
+	reg = COMMON_INT_MASK_2;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2);
+
+	reg = COMMON_INT_MASK_3;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3);
+
+	reg = COMMON_INT_MASK_4;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+
+	reg = INT_STA_MASK;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* 0: mask, 1: unmask */
+	reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+	reg &= ~COMMON_INT_MASK_4;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+	reg &= ~INT_STA_MASK;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* 0: mask, 1: unmask */
+	reg = COMMON_INT_MASK_4;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4);
+
+	reg = INT_STA_MASK;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK);
+}
+
+enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+	if (reg & PLL_LOCK)
+		return PLL_LOCKED;
+	else
+		return PLL_UNLOCKED;
+}
+
+void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		reg |= DP_PLL_PD;
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_PLL_CTL);
+		reg &= ~DP_PLL_PD;
+		writel(reg, dp->reg_base + ANALOGIX_DP_PLL_CTL);
+	}
+}
+
+void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
+				       enum analog_power_block block,
+				       bool enable)
+{
+	u32 reg;
+	u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
+
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+		phy_pd_addr = ANALOGIX_DP_PD;
+
+	switch (block) {
+	case AUX_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= AUX_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~AUX_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH0_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH0_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH0_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH1_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH1_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH1_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH2_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH2_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH2_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case CH3_BLOCK:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= CH3_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~CH3_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case ANALOG_TOTAL:
+		if (enable) {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg |= DP_PHY_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			reg = readl(dp->reg_base + phy_pd_addr);
+			reg &= ~DP_PHY_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	case POWER_ALL:
+		if (enable) {
+			reg = DP_PHY_PD | AUX_PD | CH3_PD | CH2_PD |
+				CH1_PD | CH0_PD;
+			writel(reg, dp->reg_base + phy_pd_addr);
+		} else {
+			writel(0x00, dp->reg_base + phy_pd_addr);
+		}
+		break;
+	default:
+		break;
+	}
+}
+
+void analogix_dp_init_analog_func(struct analogix_dp_device *dp)
+{
+	u32 reg;
+	int timeout_loop = 0;
+
+	analogix_dp_set_analog_power_down(dp, POWER_ALL, 0);
+
+	reg = PLL_LOCK_CHG;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+	reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL);
+	writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL);
+
+	/* Power up PLL */
+	if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+		analogix_dp_set_pll_power_down(dp, 0);
+
+		while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
+			timeout_loop++;
+			if(DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+				pr_err("failed to get pll lock status\n");
+				return;
+			}
+			udelay(20);
+		}
+	}
+
+	/* Enable Serdes FIFO function and Link symbol clock domain module */
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N
+		| AUX_FUNC_EN_N);
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+}
+
+void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio))
+		return;
+
+	reg = HOTPLUG_CHG | HPD_LOST | PLUG;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+
+	reg = INT_HPD;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
+}
+
+void analogix_dp_init_hpd(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio))
+		return;
+
+	analogix_dp_clear_hotplug_interrupts(dp);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg &= ~(F_HPD | HPD_CTRL);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+}
+
+void analogix_dp_force_hpd(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	reg = (F_HPD | HPD_CTRL);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+}
+
+enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio)) {
+		reg = dm_gpio_get_value(&dp->hpd_gpio);
+		if (reg)
+			return DP_IRQ_TYPE_HP_CABLE_IN;
+		else
+			return DP_IRQ_TYPE_HP_CABLE_OUT;
+	} else {
+		/* Parse hotplug interrupt status register */
+		reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4);
+
+		if (reg & PLUG)
+			return DP_IRQ_TYPE_HP_CABLE_IN;
+
+		if (reg & HPD_LOST)
+			return DP_IRQ_TYPE_HP_CABLE_OUT;
+
+		if (reg & HOTPLUG_CHG)
+			return DP_IRQ_TYPE_HP_CHANGE;
+
+		return DP_IRQ_TYPE_UNKNOWN;
+	}
+}
+
+void analogix_dp_reset_aux(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* Disable AUX channel module */
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg |= AUX_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+}
+
+void analogix_dp_init_aux(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* Clear inerrupts related to AUX channel */
+	reg = RPLY_RECEIV | AUX_ERR;
+	writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA);
+
+	analogix_dp_reset_aux(dp);
+
+	/* Disable AUX transaction H/W retry */
+	if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
+		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
+		      AUX_HW_RETRY_COUNT_SEL(3) |
+		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+	else
+		reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) |
+		      AUX_HW_RETRY_COUNT_SEL(0) |
+		      AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL);
+
+	/* Receive AUX Channel DEFER commands equal to DEFFER_COUNT*64 */
+	reg = DEFER_CTRL_EN | DEFER_COUNT(1);
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL);
+
+	/* Enable AUX channel module */
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+	reg &= ~AUX_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2);
+}
+
+int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	if (dm_gpio_is_valid(&dp->hpd_gpio)) {
+		if (dm_gpio_get_value(&dp->hpd_gpio))
+			return 0;
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+		if (reg & HPD_STATUS)
+			return 0;
+	}
+
+	return -EINVAL;
+}
+
+void analogix_dp_enable_sw_function(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	reg &= ~SW_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+}
+
+int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
+{
+	int reg;
+	int retval = 0;
+	int timeout_loop = 0;
+
+	/* Enable AUX CH operation */
+	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+	reg |= AUX_EN;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+
+	/* Is AUX CH command reply received? */
+	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+	while (!(reg & RPLY_RECEIV)) {
+		timeout_loop++;
+		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+			pr_err("AUX CH command reply failed!\n");
+			return -ETIMEDOUT;
+		}
+		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+		udelay(11);
+	}
+
+	/* Clear interrupt source for AUX CH command reply */
+	writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA);
+
+	/* Clear interrupt source for AUX CH access error */
+	reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
+	if (reg & AUX_ERR) {
+		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
+		return -EREMOTEIO;
+	}
+
+	/* Check AUX CH error access status */
+	reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
+	if ((reg & AUX_STATUS_MASK) != 0) {
+		pr_err("AUX CH error happens: %d\n\n",
+			reg & AUX_STATUS_MASK);
+		return -EREMOTEIO;
+	}
+
+	return retval;
+}
+
+int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
+				   unsigned int reg_addr,
+				   unsigned char data)
+{
+	u32 reg;
+	int i;
+	int retval;
+
+	for (i = 0; i < 3; i++) {
+		/* Clear AUX CH data buffer */
+		reg = BUF_CLR;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+		/* Select DPCD device address */
+		reg = AUX_ADDR_7_0(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+		reg = AUX_ADDR_15_8(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+		reg = AUX_ADDR_19_16(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+		/* Write data buffer */
+		reg = (unsigned int)data;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+
+		/*
+		 * Set DisplayPort transaction and write 1 byte
+		 * If bit 3 is 1, DisplayPort transaction.
+		 * If Bit 3 is 0, I2C transaction.
+		 */
+		reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+		/* Start AUX transaction */
+		retval = analogix_dp_start_aux_transaction(dp);
+		if (retval == 0)
+			break;
+
+		pr_debug("%s: Aux Transaction fail!\n", __func__);
+	}
+
+	return retval;
+}
+
+int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned char *data)
+{
+	u32 reg;
+	int i;
+	int retval;
+
+	for (i = 0; i < 3; i++) {
+		/* Clear AUX CH data buffer */
+		reg = BUF_CLR;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+		/* Select DPCD device address */
+		reg = AUX_ADDR_7_0(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+		reg = AUX_ADDR_15_8(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+		reg = AUX_ADDR_19_16(reg_addr);
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+		/*
+		 * Set DisplayPort transaction and read 1 byte
+		 * If bit 3 is 1, DisplayPort transaction.
+		 * If Bit 3 is 0, I2C transaction.
+		 */
+		reg = AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ;
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+		/* Start AUX transaction */
+		retval = analogix_dp_start_aux_transaction(dp);
+		if (retval == 0)
+			break;
+
+		pr_info("%s: Aux Transaction fail!\n", __func__);
+	}
+
+	/* Read data buffer */
+	reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+	*data = (unsigned char)(reg & 0xff);
+
+	return retval;
+}
+
+int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char data[])
+{
+	u32 reg;
+	unsigned int start_offset;
+	unsigned int cur_data_count;
+	unsigned int cur_data_idx;
+	int i;
+	int retval = 0;
+
+	/* Clear AUX CH data buffer */
+	reg = BUF_CLR;
+	writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+	start_offset = 0;
+	while (start_offset < count) {
+		/* Buffer size of AUX CH is 16 * 4bytes */
+		if ((count - start_offset) > 16)
+			cur_data_count = 16;
+		else
+			cur_data_count = count - start_offset;
+
+		for (i = 0; i < 3; i++) {
+			/* Select DPCD device address */
+			reg = AUX_ADDR_7_0(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+			reg = AUX_ADDR_15_8(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+			reg = AUX_ADDR_19_16(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+			for (cur_data_idx = 0; cur_data_idx < cur_data_count;
+			     cur_data_idx++) {
+				reg = data[start_offset + cur_data_idx];
+				writel(reg, dp->reg_base +
+				       ANALOGIX_DP_BUF_DATA_0 +
+				       4 * cur_data_idx);
+			}
+
+			/*
+			 * Set DisplayPort transaction and write
+			 * If bit 3 is 1, DisplayPort transaction.
+			 * If Bit 3 is 0, I2C transaction.
+			 */
+			reg = AUX_LENGTH(cur_data_count) |
+				AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_WRITE;
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+			/* Start AUX transaction */
+			retval = analogix_dp_start_aux_transaction(dp);
+			if (retval == 0)
+				break;
+
+			pr_debug("%s: Aux Transaction fail!\n",
+				__func__);
+		}
+
+		start_offset += cur_data_count;
+	}
+
+	return retval;
+}
+
+int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
+				     unsigned int reg_addr,
+				     unsigned int count,
+				     unsigned char data[])
+{
+	u32 reg;
+	unsigned int start_offset;
+	unsigned int cur_data_count;
+	unsigned int cur_data_idx;
+	int i;
+	int retval = 0;
+
+	/* Clear AUX CH data buffer */
+	reg = BUF_CLR;
+	writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+	start_offset = 0;
+	while (start_offset < count) {
+		/* Buffer size of AUX CH is 16 * 4bytes */
+		if ((count - start_offset) > 16)
+			cur_data_count = 16;
+		else
+			cur_data_count = count - start_offset;
+
+		/* AUX CH Request Transaction process */
+		for (i = 0; i < 3; i++) {
+			/* Select DPCD device address */
+			reg = AUX_ADDR_7_0(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+			reg = AUX_ADDR_15_8(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+			reg = AUX_ADDR_19_16(reg_addr + start_offset);
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+			/*
+			 * Set DisplayPort transaction and read
+			 * If bit 3 is 1, DisplayPort transaction.
+			 * If Bit 3 is 0, I2C transaction.
+			 */
+			reg = AUX_LENGTH(cur_data_count) |
+				AUX_TX_COMM_DP_TRANSACTION | AUX_TX_COMM_READ;
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+			/* Start AUX transaction */
+			retval = analogix_dp_start_aux_transaction(dp);
+			if (retval == 0)
+				break;
+
+			pr_debug("%s: Aux Transaction fail!\n",
+				__func__);
+		}
+
+		for (cur_data_idx = 0; cur_data_idx < cur_data_count;
+		    cur_data_idx++) {
+			reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0
+						 + 4 * cur_data_idx);
+			data[start_offset + cur_data_idx] =
+				(unsigned char)reg;
+		}
+
+		start_offset += cur_data_count;
+	}
+
+	return retval;
+}
+
+int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
+				  unsigned int device_addr,
+				  unsigned int reg_addr)
+{
+	u32 reg;
+	int retval;
+
+	/* Set EDID device address */
+	reg = device_addr;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
+	writel(0x0, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);
+
+	/* Set offset from base address of EDID device */
+	writel(reg_addr, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+
+	/*
+	 * Set I2C transaction and write address
+	 * If bit 3 is 1, DisplayPort transaction.
+	 * If Bit 3 is 0, I2C transaction.
+	 */
+	reg = AUX_TX_COMM_I2C_TRANSACTION | AUX_TX_COMM_MOT |
+		AUX_TX_COMM_WRITE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+	/* Start AUX transaction */
+	retval = analogix_dp_start_aux_transaction(dp);
+	if (retval != 0)
+		pr_debug("%s: Aux Transaction fail!\n", __func__);
+
+	return retval;
+}
+
+int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
+				   unsigned int device_addr,
+				   unsigned int reg_addr,
+				   unsigned int *data)
+{
+	u32 reg;
+	int i;
+	int retval;
+
+	for (i = 0; i < 3; i++) {
+		/* Clear AUX CH data buffer */
+		reg = BUF_CLR;
+		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+		/* Select EDID device */
+		retval = analogix_dp_select_i2c_device(dp, device_addr,
+						       reg_addr);
+		if (retval != 0)
+			continue;
+
+		/*
+		 * Set I2C transaction and read data
+		 * If bit 3 is 1, DisplayPort transaction.
+		 * If Bit 3 is 0, I2C transaction.
+		 */
+		reg = AUX_TX_COMM_I2C_TRANSACTION |
+			AUX_TX_COMM_READ;
+		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);
+
+		/* Start AUX transaction */
+		retval = analogix_dp_start_aux_transaction(dp);
+		if (retval == 0)
+			break;
+
+		pr_debug("%s: Aux Transaction fail!\n", __func__);
+	}
+
+	/* Read data */
+	if (retval == 0)
+		*data = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0);
+
+	return retval;
+}
+
+int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
+				    unsigned int device_addr,
+				    unsigned int reg_addr,
+				    unsigned int count,
+				    unsigned char edid[])
+{
+	u32 reg;
+	unsigned int i, j;
+	unsigned int cur_data_idx;
+	unsigned int defer = 0;
+	int retval = 0;
+
+	for (i = 0; i < count; i += 16) {
+		for (j = 0; j < 3; j++) {
+			/* Clear AUX CH data buffer */
+			reg = BUF_CLR;
+			writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);
+
+			/* Set normal AUX CH command */
+			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+			reg &= ~ADDR_ONLY;
+			writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
+
+			/*
+			 * If Rx sends defer, Tx sends only reads
+			 * request without sending address
+			 */
+			if (!defer)
+				retval = analogix_dp_select_i2c_device(dp,
+						device_addr, reg_addr + i);
+			else
+				defer = 0;
+
+			if (retval == 0) {
+				/*
+				 * Set I2C transaction and write data
+				 * If bit 3 is 1, DisplayPort transaction.
+				 * If Bit 3 is 0, I2C transaction.
+				 */
+				reg = AUX_LENGTH(16) |
+					AUX_TX_COMM_I2C_TRANSACTION |
+					AUX_TX_COMM_READ;
+				writel(reg, dp->reg_base +
+					ANALOGIX_DP_AUX_CH_CTL_1);
+
+				/* Start AUX transaction */
+				retval = analogix_dp_start_aux_transaction(dp);
+				if (retval == 0)
+					break;
+
+				pr_debug("%s: Aux Transaction fail!\n",
+					__func__);
+			}
+			/* Check if Rx sends defer */
+			reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM);
+			if (reg == AUX_RX_COMM_AUX_DEFER ||
+			    reg == AUX_RX_COMM_I2C_DEFER) {
+				pr_err("Defer: %d\n\n", reg);
+				defer = 1;
+			}
+		}
+
+		for (cur_data_idx = 0; cur_data_idx < 16; cur_data_idx++) {
+			reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0
+						 + 4 * cur_data_idx);
+			edid[i + cur_data_idx] = (unsigned char)reg;
+		}
+	}
+
+	return retval;
+}
+
+void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
+{
+	u32 reg;
+
+	reg = bwtype;
+	if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62))
+		writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
+}
+
+void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET);
+	*bwtype = reg;
+}
+
+void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count)
+{
+	u32 reg;
+
+	reg = count;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
+}
+
+void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET);
+	*count = reg;
+}
+
+void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
+				      bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg |= ENHANCED;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg &= ~ENHANCED;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+	}
+}
+
+void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
+				      enum pattern_set pattern)
+{
+	u32 reg;
+
+	switch (pattern) {
+	case PRBS7:
+		reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_PRBS7;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case D10_2:
+		reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_D10_2;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case TRAINING_PTN1:
+		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case TRAINING_PTN2:
+		reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	case DP_NONE:
+		reg = SCRAMBLING_ENABLE |
+			LINK_QUAL_PATTERN_SET_DISABLE |
+			SW_TRAINING_PATTERN_SET_NORMAL;
+		writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+		break;
+	default:
+		break;
+	}
+}
+
+void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
+					u32 level)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	reg &= ~PRE_EMPHASIS_SET_MASK;
+	reg |= level << PRE_EMPHASIS_SET_SHIFT;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+}
+
+void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
+					 u32 training_lane)
+{
+	u32 reg;
+
+	reg = training_lane;
+	writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+}
+
+u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
+	return reg;
+}
+
+u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
+	return reg;
+}
+
+u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
+	return reg;
+}
+
+u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
+	return reg;
+}
+
+void analogix_dp_reset_macro(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST);
+	reg |= MACRO_RST;
+	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+
+	/* 10 us is the minimum reset time. */
+	udelay(20);
+
+	reg &= ~MACRO_RST;
+	writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST);
+}
+
+void analogix_dp_init_video(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG;
+	writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1);
+
+	reg = 0x0;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+
+	reg = CHA_CRI(4) | CHA_CTRL;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+
+	reg = 0x0;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+
+	reg = VID_HRES_TH(2) | VID_VRES_TH(0);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8);
+}
+
+void analogix_dp_set_video_color_format(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	/* Configure the input color depth, color space, dynamic range */
+	reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) |
+		(dp->video_info.color_depth << IN_BPC_SHIFT) |
+		(dp->video_info.color_space << IN_COLOR_F_SHIFT);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2);
+
+	/* Set Input Color YCbCr Coefficients to ITU601 or ITU709 */
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
+	reg &= ~IN_YC_COEFFI_MASK;
+	if (dp->video_info.ycbcr_coeff)
+		reg |= IN_YC_COEFFI_ITU709;
+	else
+		reg |= IN_YC_COEFFI_ITU601;
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3);
+}
+
+int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1);
+
+	if (!(reg & DET_STA)) {
+		pr_debug("Input stream clock not detected.\n");
+		return -EINVAL;
+	}
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2);
+	pr_debug("wait SYS_CTL_2.\n");
+
+	if (reg & CHA_STA) {
+		pr_debug("Input stream clk is changing\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
+				 enum clock_recovery_m_value_type type,
+				 u32 m_value, u32 n_value)
+{
+	u32 reg;
+
+	if (type == REGISTER_M) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg |= FIX_M_VID;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg = m_value & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0);
+		reg = (m_value >> 8) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1);
+		reg = (m_value >> 16) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2);
+
+		reg = n_value & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0);
+		reg = (n_value >> 8) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1);
+		reg = (n_value >> 16) & 0xff;
+		writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2);
+	} else  {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+		reg &= ~FIX_M_VID;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4);
+
+		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_0);
+		writel(0x80, dp->reg_base + ANALOGIX_DP_N_VID_1);
+		writel(0x00, dp->reg_base + ANALOGIX_DP_N_VID_2);
+	}
+}
+
+void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type)
+{
+	u32 reg;
+
+	if (type == VIDEO_TIMING_FROM_CAPTURE) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		reg &= ~FORMAT_SEL;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+		reg |= FORMAT_SEL;
+		writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	}
+}
+
+void analogix_dp_enable_video_master(struct analogix_dp_device *dp, bool enable)
+{
+	u32 reg;
+
+	if (enable) {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		reg &= ~VIDEO_MODE_MASK;
+		reg |= VIDEO_MASTER_MODE_EN | VIDEO_MODE_MASTER_MODE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+	} else {
+		reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+		reg &= ~VIDEO_MODE_MASK;
+		reg |= VIDEO_MODE_SLAVE_MODE;
+		writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+	}
+}
+
+void analogix_dp_start_video(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+	reg |= VIDEO_EN;
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1);
+}
+
+int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3);
+	if (!(reg & STRM_VALID)) {
+		pr_debug("Input video stream is not detected.\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+	reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N);
+	reg |= MASTER_VID_FUNC_EN_N;
+	writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg &= ~INTERACE_SCAN_CFG;
+	reg |= (dp->video_info.interlaced << 2);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg &= ~VSYNC_POLARITY_CFG;
+	reg |= (dp->video_info.v_sync_polarity << 1);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+	reg &= ~HSYNC_POLARITY_CFG;
+	reg |= (dp->video_info.h_sync_polarity << 0);
+	writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10);
+
+	reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL);
+}
+
+void analogix_dp_enable_scrambling(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	reg &= ~SCRAMBLING_DISABLE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+}
+
+void analogix_dp_disable_scrambling(struct analogix_dp_device *dp)
+{
+	u32 reg;
+
+	reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+	reg |= SCRAMBLING_DISABLE;
+	writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET);
+}
diff --git a/drivers/video/drm/rockchip_connector.h b/drivers/video/drm/rockchip_connector.h
new file mode 100644
index 0000000000..bec485baec
--- /dev/null
+++ b/drivers/video/drm/rockchip_connector.h
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_CONNECTOR_H_
+#define _ROCKCHIP_CONNECTOR_H_
+
+#include "rockchip_mipi_dsi.h"
+
+struct rockchip_connector {
+	const struct rockchip_connector_funcs *funcs;
+
+	const void *data;
+};
+
+struct rockchip_connector_funcs {
+	/*
+	 * init connector, prepare resource to ensure
+	 * detect and get_timing can works
+	 */
+	int (*init)(struct display_state *state);
+
+	void (*deinit)(struct display_state *state);
+	/*
+	 * Optional, if connector not support hotplug,
+	 * Returns:
+	 *   0 means disconnected, else means connected
+	 */
+	int (*detect)(struct display_state *state);
+	/*
+	 * Optional, if implement it, need fill the timing data:
+	 *     state->conn_state->mode
+	 * you can refer to the rockchip_display: display_get_timing(),
+	 * Returns:
+	 *   0 means success, else means failed
+	 */
+	int (*get_timing)(struct display_state *state);
+	/*
+	 * Optional, if implement it, need fill the edid data:
+	 *     state->conn_state->edid
+	 * Returns:
+	 *   0 means success, else means failed
+	 */
+	int (*get_edid)(struct display_state *state);
+	/*
+	 * call before crtc enable.
+	 */
+	int (*prepare)(struct display_state *state);
+	/*
+	 * call after crtc enable
+	 */
+	int (*enable)(struct display_state *state);
+	int (*disable)(struct display_state *state);
+	void (*unprepare)(struct display_state *state);
+	/*
+	 * Save data to dts, then you can share data to kernel space.
+	 */
+	int (*fixup_dts)(struct display_state *state, void *blob);
+	/* transmit a DSI packet */
+	ssize_t (*transfer)(struct display_state *state,
+			    const struct mipi_dsi_msg *msg);
+};
+
+const struct rockchip_connector *
+rockchip_get_connector(const void *blob, int connector_node);
+
+#ifdef CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI
+struct dw_mipi_dsi_plat_data;
+extern const struct rockchip_connector_funcs rockchip_dw_mipi_dsi_funcs;
+extern const struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data;
+extern const struct dw_mipi_dsi_plat_data rk3366_mipi_dsi_drv_data;
+extern const struct dw_mipi_dsi_plat_data rk3368_mipi_dsi_drv_data;
+extern const struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data;
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP_ANALOGIX_DP
+struct rockchip_dp_chip_data;
+extern const struct rockchip_connector_funcs rockchip_analogix_dp_funcs;
+extern const struct rockchip_dp_chip_data rk3399_analogix_edp_drv_data;
+extern const struct rockchip_dp_chip_data rk3368_analogix_edp_drv_data;
+extern const struct rockchip_dp_chip_data rk3288_analogix_dp_drv_data;
+#endif
+#ifdef CONFIG_DRM_ROCKCHIP_LVDS
+struct rockchip_lvds_chip_data;
+extern const struct rockchip_connector_funcs rockchip_lvds_funcs;
+extern const struct rockchip_lvds_chip_data rk3366_lvds_drv_data;
+extern const struct rockchip_lvds_chip_data rk3368_lvds_drv_data;
+extern const struct rockchip_lvds_chip_data rk3288_lvds_drv_data;
+#endif
+#endif
diff --git a/drivers/video/drm/rockchip_crtc.c b/drivers/video/drm/rockchip_crtc.c
new file mode 100644
index 0000000000..b392f92ac7
--- /dev/null
+++ b/drivers/video/drm/rockchip_crtc.c
@@ -0,0 +1,111 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <dm/device.h>
+#include <dm.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+
+static const struct rockchip_crtc rk3036_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3036_vop,
+};
+
+static const struct rockchip_crtc rk3288_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3288_vop,
+};
+
+static const struct rockchip_crtc rk3368_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3368_vop,
+};
+
+static const struct rockchip_crtc rk3366_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3366_vop,
+};
+
+static const struct rockchip_crtc rk3399_vop_big_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3399_vop_big,
+};
+
+static const struct rockchip_crtc rk3399_vop_lit_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3399_vop_lit,
+};
+
+static const struct rockchip_crtc rk322x_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk322x_vop,
+};
+
+static const struct rockchip_crtc rk3328_vop_data = {
+	.funcs = &rockchip_vop_funcs,
+	.data = &rk3328_vop,
+};
+
+static const struct udevice_id rockchip_vop_ids[] = {
+	{
+		.compatible = "rockchip,rk3036-vop",
+		.data = (ulong)&rk3036_vop_data,
+	}, {
+		.compatible = "rockchip,rk3288-vop",
+		.data = (ulong)&rk3288_vop_data,
+	}, {
+		.compatible = "rockchip,rk3368-vop",
+		.data = (ulong)&rk3368_vop_data,
+	}, {
+		.compatible = "rockchip,rk3366-vop",
+		.data = (ulong)&rk3366_vop_data,
+	}, {
+		.compatible = "rockchip,rk3399-vop-big",
+		.data = (ulong)&rk3399_vop_big_data,
+	}, {
+		.compatible = "rockchip,rk3399-vop-lit",
+		.data = (ulong)&rk3399_vop_lit_data,
+	}, {
+		.compatible = "rockchip,rk322x-vop",
+		.data = (ulong)&rk322x_vop_data,
+	}, {
+		.compatible = "rockchip,rk3328-vop",
+		.data = (ulong)&rk3328_vop_data,
+	}, { }
+};
+
+static int rockchip_vop_probe(struct udevice *dev)
+{
+	return 0;
+}
+
+static int rockchip_vop_bind(struct udevice *dev)
+{
+	return 0;
+}
+
+U_BOOT_DRIVER(rockchip_vop) = {
+	.name	= "rockchip-vop",
+	.id	= UCLASS_VIDEO_CRTC,
+	.of_match = rockchip_vop_ids,
+	.bind	= rockchip_vop_bind,
+	.probe	= rockchip_vop_probe,
+};
+
+UCLASS_DRIVER(rockchip_crtc) = {
+	.id		= UCLASS_VIDEO_CRTC,
+	.name		= "CRTC",
+};
diff --git a/drivers/video/drm/rockchip_crtc.h b/drivers/video/drm/rockchip_crtc.h
new file mode 100644
index 0000000000..087a84cd98
--- /dev/null
+++ b/drivers/video/drm/rockchip_crtc.h
@@ -0,0 +1,36 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_CRTC_H_
+#define _ROCKCHIP_CRTC_H_
+
+struct rockchip_crtc {
+	const struct rockchip_crtc_funcs *funcs;
+	const void *data;
+};
+
+struct rockchip_crtc_funcs {
+	int (*init)(struct display_state *state);
+	void (*deinit)(struct display_state *state);
+	int (*set_plane)(struct display_state *state);
+	int (*prepare)(struct display_state *state);
+	int (*enable)(struct display_state *state);
+	int (*disable)(struct display_state *state);
+	void (*unprepare)(struct display_state *state);
+	int (*fixup_dts)(struct display_state *state, void *blob);
+};
+
+struct vop_data;
+extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
+extern const struct vop_data rk3036_vop;
+extern const struct vop_data rk3288_vop;
+extern const struct vop_data rk3368_vop;
+extern const struct vop_data rk3366_vop;
+extern const struct vop_data rk3399_vop_big;
+extern const struct vop_data rk3399_vop_lit;
+extern const struct vop_data rk322x_vop;
+extern const struct vop_data rk3328_vop;
+#endif
diff --git a/drivers/video/drm/rockchip_display.c b/drivers/video/drm/rockchip_display.c
new file mode 100644
index 0000000000..d305e575f0
--- /dev/null
+++ b/drivers/video/drm/rockchip_display.c
@@ -0,0 +1,1029 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/unaligned.h>
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <libfdt.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <linux/list.h>
+#include <linux/compat.h>
+#include <linux/media-bus-format.h>
+#include <malloc.h>
+#include <video.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+
+#include "bmp_helper.h"
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+#include "rockchip_panel.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+static LIST_HEAD(rockchip_display_list);
+static LIST_HEAD(logo_cache_list);
+
+#define DRM_ROCKCHIP_FB_WIDTH 1920
+#define DRM_ROCKCHIP_FB_HEIGHT 1080
+
+#define MEMORY_POOL_SIZE 32 * 1024 * 1024
+static unsigned long memory_start;
+static unsigned long memory_end;
+
+#ifdef CONFIG_RK_PWM_BL
+extern int rk_pwm_bl_config(int brightness);
+#endif
+
+struct bmp_header *get_bmp_header(const char *bmp_name)
+{
+	printf("%s %d TODO\n", __func__, __LINE__);
+}
+
+int load_bmp_content(const char *logo, void *bmp, int size)
+{
+	printf("%s %d TODO\n", __func__, __LINE__);
+}
+
+static void init_display_buffer(void)
+{
+	memory_start = gd->fb_base;
+	memory_end = memory_start;
+}
+
+static void *get_display_buffer(int size)
+{
+	unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
+	void *buf;
+
+	if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
+		printf("failed to alloc %dbyte memory to display\n", size);
+		return NULL;
+	}
+	buf = (void *)roundup_memory;
+
+	memory_end = roundup_memory + size;
+
+	return buf;
+}
+
+static unsigned long get_display_size(void)
+{
+	return memory_end - memory_start;
+}
+
+static bool can_direct_logo(int bpp)
+{
+	return bpp == 24 || bpp == 32;
+}
+
+static int get_panel_node(struct display_state *state, int conn_node)
+{
+	const void *blob = state->blob;
+	int panel, ports, port, ep, remote, ph, nodedepth;
+
+	panel = fdt_subnode_offset(blob, conn_node, "panel");
+	if (panel > 0)
+		return panel;
+
+	ports = fdt_subnode_offset(blob, conn_node, "ports");
+	if (ports < 0)
+		return -ENODEV;
+
+	fdt_for_each_subnode(port, blob, ports) {
+		fdt_for_each_subnode(ep, blob, port) {
+			ph = fdt_getprop_u32_default_node(blob, ep, 0,
+							  "remote-endpoint", 0);
+			if (!ph)
+				continue;
+
+			remote = fdt_node_offset_by_phandle(blob, ph);
+
+			nodedepth = fdt_node_depth(blob, remote);
+			if (nodedepth < 2)
+				continue;
+
+			panel = fdt_supernode_atdepth_offset(blob, remote,
+							     nodedepth - 2,
+							     NULL);
+			break;
+		}
+	}
+
+	return panel;
+}
+
+static int connector_phy_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	int conn_node = conn_state->node;
+	const void *blob = state->blob;
+	const struct rockchip_phy *phy;
+	int phy_node, phandle;
+
+	phandle = fdt_getprop_u32_default_node(blob, conn_node, 0,
+					       "phys", -1);
+	if (phandle < 0)
+		return 0;
+
+	phy_node = fdt_node_offset_by_phandle(blob, phandle);
+	if (phy_node < 0) {
+		printf("failed to find phy node\n");
+		return phy_node;
+	}
+
+	phy = rockchip_get_phy(blob, phy_node);
+	if (!phy) {
+		printf("failed to find phy driver\n");
+		return 0;
+	}
+
+	conn_state->phy_node = phy_node;
+
+	if (!phy->funcs || !phy->funcs->init ||
+	    phy->funcs->init(state)) {
+		printf("failed to init phy driver\n");
+		return -EINVAL;
+	}
+
+	conn_state->phy = phy;
+	return 0;
+}
+
+static int connector_panel_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	struct udevice *dev;
+	const void *blob = state->blob;
+	int conn_node = conn_state->node;
+	const struct rockchip_panel *panel;
+	int panel_node, dsp_lut_node;
+	int ret, len;
+
+	panel_node = get_panel_node(state, conn_node);
+	if (panel_node < 0) {
+		printf("failed to find panel node\n");
+		return -ENODEV;
+	}
+
+	if (!fdt_device_is_available(blob, panel_node)) {
+		printf("panel is disabled\n");
+		return -ENODEV;
+	}
+
+	dm_scan_fdt_dev(conn_state->dev);
+
+	panel_state->node = panel_node;
+
+	ret = uclass_find_device_by_of_offset(UCLASS_PANEL, panel_node, &dev);
+	if (ret) {
+		printf("Warn: %s: can't find panel driver\n",
+		       fdt_get_name(blob, panel_node, NULL));
+		return -ENODEV;
+	}
+	panel = (const struct rockchip_panel *)dev_get_driver_data(dev);
+	if (!panel) {
+		printf("failed to find panel driver\n");
+		return 0;
+	}
+
+	panel_state->dev = dev;
+	panel_state->panel = panel;
+
+	ret = rockchip_panel_init(state);
+	if (ret) {
+		printf("failed to init panel driver\n");
+		return ret;
+	}
+
+	dsp_lut_node = fdt_subnode_offset(blob, panel_node, "dsp-lut");
+	fdt_getprop(blob, dsp_lut_node, "gamma-lut", &len);
+	if (len > 0) {
+		conn_state->gamma.size  = len / sizeof(u32);
+		conn_state->gamma.lut = malloc(len);
+		if (!conn_state->gamma.lut) {
+			printf("malloc gamma lut failed\n");
+			return -ENOMEM;
+		}
+		if (fdtdec_get_int_array(blob, dsp_lut_node, "gamma-lut",
+					 conn_state->gamma.lut,
+					 conn_state->gamma.size)) {
+			printf("Cannot decode gamma_lut\n");
+			conn_state->gamma.lut = NULL;
+			return -EINVAL;
+		}
+		panel_state->dsp_lut_node = dsp_lut_node;
+	}
+
+	return 0;
+}
+
+int drm_mode_vrefresh(const struct drm_display_mode *mode)
+{
+	int refresh = 0;
+	unsigned int calc_val;
+
+	if (mode->vrefresh > 0) {
+		refresh = mode->vrefresh;
+	} else if (mode->htotal > 0 && mode->vtotal > 0) {
+		int vtotal;
+
+		vtotal = mode->vtotal;
+		/* work out vrefresh the value will be x1000 */
+		calc_val = (mode->clock * 1000);
+		calc_val /= mode->htotal;
+		refresh = (calc_val + vtotal / 2) / vtotal;
+
+		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+			refresh *= 2;
+		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
+			refresh /= 2;
+		if (mode->vscan > 1)
+			refresh /= mode->vscan;
+	}
+	return refresh;
+}
+
+static int display_get_timing_from_dts(int panel, const void *blob,
+				       struct drm_display_mode *mode)
+{
+	int timing, phandle, native_mode;
+	int hactive, vactive, pixelclock;
+	int hfront_porch, hback_porch, hsync_len;
+	int vfront_porch, vback_porch, vsync_len;
+	int val, flags = 0;
+
+	timing = fdt_subnode_offset(blob, panel, "display-timings");
+	if (timing < 0)
+		return -ENODEV;
+
+	native_mode = fdt_subnode_offset(blob, timing, "timing");
+	if (native_mode < 0) {
+		phandle = fdt_getprop_u32_default_node(blob, timing, 0,
+						       "native-mode", -1);
+		native_mode = fdt_node_offset_by_phandle_node(blob, timing, phandle);
+		if (native_mode <= 0) {
+			printf("failed to get display timings from DT\n");
+			return -ENXIO;
+		}
+	}
+
+#define FDT_GET_INT(val, name) \
+	val = fdtdec_get_int(blob, native_mode, name, -1); \
+	if (val < 0) { \
+		printf("Can't get %s\n", name); \
+		return -ENXIO; \
+	}
+
+	FDT_GET_INT(hactive, "hactive");
+	FDT_GET_INT(vactive, "vactive");
+	FDT_GET_INT(pixelclock, "clock-frequency");
+	FDT_GET_INT(hsync_len, "hsync-len");
+	FDT_GET_INT(hfront_porch, "hfront-porch");
+	FDT_GET_INT(hback_porch, "hback-porch");
+	FDT_GET_INT(vsync_len, "vsync-len");
+	FDT_GET_INT(vfront_porch, "vfront-porch");
+	FDT_GET_INT(vback_porch, "vback-porch");
+	FDT_GET_INT(val, "hsync-active");
+	flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	FDT_GET_INT(val, "vsync-active");
+	flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+	mode->hdisplay = hactive;
+	mode->hsync_start = mode->hdisplay + hfront_porch;
+	mode->hsync_end = mode->hsync_start + hsync_len;
+	mode->htotal = mode->hsync_end + hback_porch;
+
+	mode->vdisplay = vactive;
+	mode->vsync_start = mode->vdisplay + vfront_porch;
+	mode->vsync_end = mode->vsync_start + vsync_len;
+	mode->vtotal = mode->vsync_end + vback_porch;
+
+	mode->clock = pixelclock / 1000;
+	mode->flags = flags;
+
+	return 0;
+}
+
+static int display_get_timing(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct drm_display_mode *mode = &conn_state->mode;
+	const struct drm_display_mode *m;
+	const void *blob = state->blob;
+	int conn_node = conn_state->node;
+	int panel;
+
+	panel = get_panel_node(state, conn_node);
+	if (panel < 0) {
+		printf("failed to find panel node\n");
+		return -ENODEV;
+	}
+
+	if (!display_get_timing_from_dts(panel, blob, mode)) {
+		printf("Using display timing dts\n");
+		goto done;
+	}
+
+	m = rockchip_get_display_mode_from_panel(state);
+	if (m) {
+		printf("Using display timing from compatible panel driver\n");
+		memcpy(mode, m, sizeof(*m));
+		goto done;
+	}
+
+	rockchip_panel_prepare(state);
+
+	if (conn_funcs->get_edid && !conn_funcs->get_edid(state)) {
+		int panel_bits_per_colourp;
+
+		if (!edid_get_drm_mode((void *)&conn_state->edid,
+				     sizeof(conn_state->edid), mode,
+				     &panel_bits_per_colourp)) {
+			printf("Using display timing from edid\n");
+			edid_print_info((void *)&conn_state->edid);
+			goto done;
+		}
+	}
+
+	printf("failed to find display timing\n");
+	return -ENODEV;
+done:
+	printf("Detailed mode clock %u kHz, flags[%x]\n"
+	       "    H: %04d %04d %04d %04d\n"
+	       "    V: %04d %04d %04d %04d\n"
+	       "bus_format: %x\n",
+	       mode->clock, mode->flags,
+	       mode->hdisplay, mode->hsync_start,
+	       mode->hsync_end, mode->htotal,
+	       mode->vdisplay, mode->vsync_start,
+	       mode->vsync_end, mode->vtotal,
+	       conn_state->bus_format);
+
+	return 0;
+}
+
+static int display_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret = 0;
+
+	if (state->is_init)
+		return 0;
+
+	if (!conn_funcs || !crtc_funcs) {
+		printf("failed to find connector or crtc functions\n");
+		return -ENXIO;
+	}
+
+	if (conn_funcs->init) {
+		ret = conn_funcs->init(state);
+		if (ret)
+			goto deinit_panel;
+	}
+	/*
+	 * support hotplug, but not connect;
+	 */
+	if (conn_funcs->detect) {
+		ret = conn_funcs->detect(state);
+		if (!ret)
+			goto deinit;
+	}
+
+	if (conn_funcs->get_timing) {
+		ret = conn_funcs->get_timing(state);
+		if (ret)
+			goto deinit;
+	} else {
+		ret = display_get_timing(state);
+		if (ret)
+			goto deinit;
+	}
+
+	if (crtc_funcs->init) {
+		ret = crtc_funcs->init(state);
+		if (ret)
+			goto deinit;
+	}
+
+	state->is_init = 1;
+
+	return 0;
+
+deinit:
+	if (conn_funcs->deinit)
+		conn_funcs->deinit(state);
+deinit_panel:
+	rockchip_panel_deinit(state);
+	return ret;
+}
+
+static int display_set_plane(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret;
+
+	if (!state->is_init)
+		return -EINVAL;
+
+	if (crtc_funcs->set_plane) {
+		ret = crtc_funcs->set_plane(state);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int display_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+	int ret = 0;
+
+	display_init(state);
+
+	if (!state->is_init)
+		return -EINVAL;
+
+	if (state->is_enable)
+		return 0;
+
+	if (crtc_funcs->prepare) {
+		ret = crtc_funcs->prepare(state);
+		if (ret)
+			return ret;
+	}
+
+	if (conn_funcs->prepare) {
+		ret = conn_funcs->prepare(state);
+		if (ret)
+			goto unprepare_crtc;
+	}
+
+	rockchip_panel_prepare(state);
+
+	if (crtc_funcs->enable) {
+		ret = crtc_funcs->enable(state);
+		if (ret)
+			goto unprepare_conn;
+	}
+
+	if (conn_funcs->enable) {
+		ret = conn_funcs->enable(state);
+		if (ret)
+			goto disable_crtc;
+	}
+
+	rockchip_panel_enable(state);
+
+	state->is_enable = true;
+
+	return 0;
+unprepare_crtc:
+	if (crtc_funcs->unprepare)
+		crtc_funcs->unprepare(state);
+unprepare_conn:
+	if (conn_funcs->unprepare)
+		conn_funcs->unprepare(state);
+disable_crtc:
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
+	return ret;
+}
+
+static int display_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *conn = conn_state->connector;
+	const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
+	struct crtc_state *crtc_state = &state->crtc_state;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
+
+	if (!state->is_init)
+		return 0;
+
+	if (!state->is_enable)
+		return 0;
+
+	rockchip_panel_disable(state);
+
+	if (crtc_funcs->disable)
+		crtc_funcs->disable(state);
+
+	if (conn_funcs->disable)
+		conn_funcs->disable(state);
+
+	rockchip_panel_unprepare(state);
+
+	if (conn_funcs->unprepare)
+		conn_funcs->unprepare(state);
+
+	state->is_enable = 0;
+	state->is_init = 0;
+
+	return 0;
+}
+
+static int display_logo(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct logo_info *logo = &state->logo;
+	int hdisplay, vdisplay;
+
+	display_init(state);
+	if (!state->is_init)
+		return -ENODEV;
+
+	switch (logo->bpp) {
+	case 16:
+		crtc_state->format = ROCKCHIP_FMT_RGB565;
+		break;
+	case 24:
+		crtc_state->format = ROCKCHIP_FMT_RGB888;
+		break;
+	case 32:
+		crtc_state->format = ROCKCHIP_FMT_ARGB8888;
+		break;
+	default:
+		printf("can't support bmp bits[%d]\n", logo->bpp);
+		return -EINVAL;
+	}
+	crtc_state->rb_swap = logo->bpp != 32;
+	hdisplay = conn_state->mode.hdisplay;
+	vdisplay = conn_state->mode.vdisplay;
+	crtc_state->src_w = logo->width;
+	crtc_state->src_h = logo->height;
+	crtc_state->src_x = 0;
+	crtc_state->src_y = 0;
+	crtc_state->ymirror = logo->ymirror;
+
+	crtc_state->dma_addr = logo->mem + logo->offset;
+	crtc_state->xvir = ALIGN(crtc_state->src_w * logo->bpp, 32) >> 5;
+
+	if (logo->mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
+		crtc_state->crtc_x = 0;
+		crtc_state->crtc_y = 0;
+		crtc_state->crtc_w = hdisplay;
+		crtc_state->crtc_h = vdisplay;
+	} else {
+		if (crtc_state->src_w >= hdisplay) {
+			crtc_state->crtc_x = 0;
+			crtc_state->crtc_w = hdisplay;
+		} else {
+			crtc_state->crtc_x = (hdisplay - crtc_state->src_w) / 2;
+			crtc_state->crtc_w = crtc_state->src_w;
+		}
+
+		if (crtc_state->src_h >= vdisplay) {
+			crtc_state->crtc_y = 0;
+			crtc_state->crtc_h = vdisplay;
+		} else {
+			crtc_state->crtc_y = (vdisplay - crtc_state->src_h) / 2;
+			crtc_state->crtc_h = crtc_state->src_h;
+		}
+	}
+
+	display_set_plane(state);
+	display_enable(state);
+
+	return 0;
+}
+
+static int get_crtc_id(const void *blob, int connect)
+{
+	int phandle, remote;
+	int val;
+
+	phandle = fdt_getprop_u32_default_node(blob, connect, 0,
+					       "remote-endpoint", -1);
+	if (phandle < 0)
+		goto err;
+	remote = fdt_node_offset_by_phandle(blob, phandle);
+
+	val = fdtdec_get_int(blob, remote, "reg", -1);
+	if (val < 0)
+		goto err;
+
+	return val;
+err:
+	printf("Can't get crtc id, default set to id = 0\n");
+	return 0;
+}
+
+static int find_crtc_node(const void *blob, int node)
+{
+	int nodedepth = fdt_node_depth(blob, node);
+
+	if (nodedepth < 2)
+		return -EINVAL;
+
+	return fdt_supernode_atdepth_offset(blob, node,
+					    nodedepth - 2, NULL);
+}
+
+static int find_connector_node(const void *blob, int node)
+{
+	int phandle, remote;
+	int nodedepth;
+
+	phandle = fdt_getprop_u32_default_node(blob, node, 0,
+					       "remote-endpoint", -1);
+	remote = fdt_node_offset_by_phandle(blob, phandle);
+	nodedepth = fdt_node_depth(blob, remote);
+
+	return fdt_supernode_atdepth_offset(blob, remote,
+					    nodedepth - 3, NULL);
+}
+
+struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
+{
+	struct rockchip_logo_cache *tmp, *logo_cache = NULL;
+
+	list_for_each_entry(tmp, &logo_cache_list, head) {
+		if (!strcmp(tmp->name, bmp)) {
+			logo_cache = tmp;
+			break;
+		}
+	}
+
+	if (!logo_cache) {
+		logo_cache = malloc(sizeof(*logo_cache));
+		if (!logo_cache) {
+			printf("failed to alloc memory for logo cache\n");
+			return NULL;
+		}
+		memset(logo_cache, 0, sizeof(*logo_cache));
+		strcpy(logo_cache->name, bmp);
+		INIT_LIST_HEAD(&logo_cache->head);
+		list_add_tail(&logo_cache->head, &logo_cache_list);
+	}
+
+	return logo_cache;
+}
+
+static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
+{
+	struct rockchip_logo_cache *logo_cache;
+	struct bmp_header *header;
+	void *dst = NULL, *pdst;
+	int size;
+
+	if (!logo || !bmp_name)
+		return -EINVAL;
+	logo_cache = find_or_alloc_logo_cache(bmp_name);
+	if (!logo_cache)
+		return -ENOMEM;
+
+	if (logo_cache->logo.mem) {
+		memcpy(logo, &logo_cache->logo, sizeof(*logo));
+		return 0;
+	}
+
+	header = get_bmp_header(bmp_name);
+	if (!header)
+		return -EINVAL;
+
+	logo->bpp = get_unaligned_le16(&header->bit_count);
+	logo->width = get_unaligned_le32(&header->width);
+	logo->height = get_unaligned_le32(&header->height);
+	size = get_unaligned_le32(&header->file_size);
+	if (!can_direct_logo(logo->bpp)) {
+		if (size > MEMORY_POOL_SIZE) {
+			printf("failed to use boot buf as temp bmp buffer\n");
+			return -ENOMEM;
+		}
+		pdst = (void *)gd->video_top;
+
+	} else {
+		pdst = get_display_buffer(size);
+		dst = pdst;
+	}
+
+	if (load_bmp_content(bmp_name, pdst, size)) {
+		printf("failed to load bmp %s\n", bmp_name);
+		return 0;
+	}
+
+	if (!can_direct_logo(logo->bpp)) {
+		int dst_size;
+		/*
+		 * TODO: force use 16bpp if bpp less than 16;
+		 */
+		logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
+		dst_size = logo->width * logo->height * logo->bpp >> 3;
+
+		dst = get_display_buffer(dst_size);
+		if (!dst)
+			return -ENOMEM;
+		if (bmpdecoder(pdst, dst, logo->bpp)) {
+			printf("failed to decode bmp %s\n", bmp_name);
+			return 0;
+		}
+		logo->offset = 0;
+		logo->ymirror = 0;
+	} else {
+		logo->offset = get_unaligned_le32(&header->data_offset);
+		logo->ymirror = 1;
+	}
+	logo->mem = (u32)(unsigned long)dst;
+
+	memcpy(&logo_cache->logo, logo, sizeof(*logo));
+
+	return 0;
+}
+
+void rockchip_show_fbbase(ulong fbbase)
+{
+	struct display_state *s;
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
+		s->logo.mem = fbbase;
+		s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
+		s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
+		s->logo.bpp = 32;
+		s->logo.ymirror = 0;
+
+		display_logo(s);
+	}
+}
+
+void rockchip_show_bmp(const char *bmp)
+{
+	struct display_state *s;
+
+	if (!bmp) {
+		list_for_each_entry(s, &rockchip_display_list, head)
+			display_disable(s);
+		return;
+	}
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		s->logo.mode = s->charge_logo_mode;
+		if (load_bmp_logo(&s->logo, bmp))
+			continue;
+		display_logo(s);
+	}
+}
+
+void rockchip_show_logo(void)
+{
+	struct display_state *s;
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		s->logo.mode = s->logo_mode;
+		if (load_bmp_logo(&s->logo, s->ulogo_name))
+			printf("failed to display uboot logo\n");
+		else
+			display_logo(s);
+		if (load_bmp_logo(&s->logo, s->klogo_name))
+			printf("failed to display kernel logo\n");
+	}
+}
+
+extern const struct rockchip_connector rk3399_mipi_dsi_data;
+static int rockchip_display_probe(struct udevice *dev)
+{
+	struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+	const void *blob = gd->fdt_blob;
+	int route, child, phandle, connect, crtc_node, conn_node;
+	struct udevice *crtc_dev, *conn_dev;
+	const struct rockchip_crtc *crtc;
+	const struct rockchip_connector *conn;
+	struct display_state *s;
+	const char *name;
+	int ret;
+
+	/* Before relocation we don't need to do anything */
+	if (!(gd->flags & GD_FLG_RELOC))
+		return 0;
+
+	route = fdt_path_offset(blob, "/display-subsystem/route");
+	if (route < 0) {
+		printf("Can't find display display route node\n");
+		return -ENODEV;
+	}
+
+	if (!fdt_device_is_available(blob, route))
+		return -ENODEV;
+
+	init_display_buffer();
+
+	fdt_for_each_subnode(child, blob, route) {
+		if (!fdt_device_is_available(blob, child))
+			continue;
+
+		phandle = fdt_getprop_u32_default_node(blob, child, 0,
+						       "connect", -1);
+		if (phandle < 0) {
+			printf("Warn: %s: can't find connect node's handle\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+
+		connect = fdt_node_offset_by_phandle(blob, phandle);
+		if (connect < 0) {
+			printf("Warn: %s: can't find connect node\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+
+		crtc_node = find_crtc_node(blob, connect);
+		if (!fdt_device_is_available(blob, crtc_node)) {
+			printf("Warn: %s: crtc node is not available\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+		ret = uclass_find_device_by_of_offset(UCLASS_VIDEO_CRTC, crtc_node, &crtc_dev);
+		if (ret) {
+			printf("Warn: %s: can't find crtc driver\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+
+		crtc = (const struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
+
+		conn_node = find_connector_node(blob, connect);
+		if (!fdt_device_is_available(blob, conn_node)) {
+			printf("Warn: %s: connector node is not available\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+		ret = uclass_find_device_by_of_offset(UCLASS_DISPLAY, conn_node, &conn_dev);
+		if (ret) {
+			printf("Warn: %s: can't find connector driver\n",
+			       fdt_get_name(blob, child, NULL));
+			continue;
+		}
+		conn = (const struct rockchip_connector *)dev_get_driver_data(conn_dev);
+
+		s = malloc(sizeof(*s));
+		if (!s)
+			goto err_free;
+
+		memset(s, 0, sizeof(*s));
+
+		INIT_LIST_HEAD(&s->head);
+		s->klogo_name = fdt_stringlist_get(blob, child, "logo,kernel", 0, NULL);
+		name = fdt_stringlist_get(blob, child, "logo,mode", 0, NULL);
+		if (!strcmp(name, "fullscreen"))
+			s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
+		else
+			s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
+		name = fdt_stringlist_get(blob, child, "charge_logo,mode", 0, NULL);
+		if (!strcmp(name, "fullscreen"))
+			s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
+		else
+			s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
+
+		s->blob = blob;
+		s->conn_state.node = conn_node;
+		s->conn_state.dev = conn_dev;
+		s->conn_state.connector = conn;
+		s->crtc_state.node = crtc_node;
+		s->crtc_state.dev = crtc_dev;
+		s->crtc_state.crtc = crtc;
+		s->crtc_state.crtc_id = get_crtc_id(blob, connect);
+		s->node = child;
+
+		connector_phy_init(s);
+		connector_panel_init(s);
+		list_add_tail(&s->head, &rockchip_display_list);
+	}
+
+	uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
+	uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
+	uc_priv->bpix = VIDEO_BPP32;
+
+	rockchip_show_fbbase(plat->base);
+	video_set_flush_dcache(dev, true);
+
+	return 0;
+
+err_free:
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		list_del(&s->head);
+		free(s);
+	}
+	return -ENODEV;
+}
+#if 0
+void rockchip_display_fixup(void *blob)
+{
+	const struct rockchip_connector_funcs *conn_funcs;
+	const struct rockchip_crtc_funcs *crtc_funcs;
+	const struct rockchip_connector *conn;
+	const struct rockchip_crtc *crtc;
+	struct display_state *s;
+	u32 offset;
+	int node;
+	char path[100];
+	int ret;
+
+	if (!get_display_size())
+		return;
+
+	node = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
+					       (u64)memory_start,
+					       (u64)get_display_size());
+	if (node < 0) {
+		printf("failed to add drm-loader-logo memory\n");
+		return;
+	}
+
+	list_for_each_entry(s, &rockchip_display_list, head) {
+		conn = s->conn_state.connector;
+		if (!conn)
+			continue;
+		conn_funcs = conn->funcs;
+		if (!conn_funcs) {
+			printf("failed to get exist connector\n");
+			continue;
+		}
+
+		crtc = s->crtc_state.crtc;
+		if (!crtc)
+			continue;
+
+		crtc_funcs = crtc->funcs;
+		if (!crtc_funcs) {
+			printf("failed to get exist crtc\n");
+			continue;
+		}
+
+		if (crtc_funcs->fixup_dts)
+			crtc_funcs->fixup_dts(s, blob);
+
+		if (conn_funcs->fixup_dts)
+			conn_funcs->fixup_dts(s, blob);
+
+		ret = fdt_get_path(s->blob, s->node, path, sizeof(path));
+		if (ret < 0) {
+			printf("failed to get route path[%s], ret=%d\n",
+			       path, ret);
+			continue;
+		}
+
+#define FDT_SET_U32(name, val) \
+		do_fixup_by_path_u32(blob, path, name, val, 1);
+
+		offset = s->logo.offset + s->logo.mem - memory_start;
+		FDT_SET_U32("logo,offset", offset);
+		FDT_SET_U32("logo,width", s->logo.width);
+		FDT_SET_U32("logo,height", s->logo.height);
+		FDT_SET_U32("logo,bpp", s->logo.bpp);
+		FDT_SET_U32("logo,ymirror", s->logo.ymirror);
+		FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
+		FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
+		FDT_SET_U32("video,vrefresh",
+			    drm_mode_vrefresh(&s->conn_state.mode));
+#undef FDT_SET_U32
+	}
+}
+#endif
+
+int rockchip_display_bind(struct udevice *dev)
+{
+	struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+
+	plat->size = 4 * DRM_ROCKCHIP_FB_WIDTH * DRM_ROCKCHIP_FB_HEIGHT;
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_display_ids[] = {
+	{ .compatible = "rockchip,display-subsystem" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_display) = {
+	.name	= "rockchip_display",
+	.id	= UCLASS_VIDEO,
+	.of_match = rockchip_display_ids,
+	.bind	= rockchip_display_bind,
+	.probe	= rockchip_display_probe,
+};
diff --git a/drivers/video/drm/rockchip_display.h b/drivers/video/drm/rockchip_display.h
new file mode 100644
index 0000000000..c80a76f4d5
--- /dev/null
+++ b/drivers/video/drm/rockchip_display.h
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_DISPLAY_H
+#define _ROCKCHIP_DISPLAY_H
+
+#include <bmp_layout.h>
+#include <drm_modes.h>
+#include <edid.h>
+
+#define ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL	BIT(0)
+#define ROCKCHIP_OUTPUT_DSI_DUAL_LINK		BIT(1)
+
+enum data_format {
+	ROCKCHIP_FMT_ARGB8888 = 0,
+	ROCKCHIP_FMT_RGB888,
+	ROCKCHIP_FMT_RGB565,
+	ROCKCHIP_FMT_YUV420SP = 4,
+	ROCKCHIP_FMT_YUV422SP,
+	ROCKCHIP_FMT_YUV444SP,
+};
+
+enum display_mode {
+	ROCKCHIP_DISPLAY_FULLSCREEN,
+	ROCKCHIP_DISPLAY_CENTER,
+};
+
+/*
+ * display output interface supported by rockchip lcdc
+ */
+#define ROCKCHIP_OUT_MODE_P888	0
+#define ROCKCHIP_OUT_MODE_P666	1
+#define ROCKCHIP_OUT_MODE_P565	2
+/* for use special outface */
+#define ROCKCHIP_OUT_MODE_AAAA	15
+
+struct crtc_state {
+	struct udevice *dev;
+	const struct rockchip_crtc *crtc;
+	void *private;
+	int node;
+	int crtc_id;
+
+	int format;
+	u32 dma_addr;
+	int ymirror;
+	int rb_swap;
+	int xvir;
+	int src_x;
+	int src_y;
+	int src_w;
+	int src_h;
+	int crtc_x;
+	int crtc_y;
+	int crtc_w;
+	int crtc_h;
+};
+
+struct panel_state {
+	struct udevice *dev;
+	int node;
+	int dsp_lut_node;
+
+	const struct rockchip_panel *panel;
+	void *private;
+};
+
+struct connector_state {
+	struct udevice *dev;
+	const struct rockchip_connector *connector;
+	const struct rockchip_phy *phy;
+	int node;
+	int phy_node;
+
+	void *private;
+	void *phy_private;
+
+	struct drm_display_mode mode;
+	u8 edid[EDID_SIZE * 4];
+	int bus_format;
+	int output_mode;
+	int type;
+	int output_type;
+
+	struct {
+		u32 *lut;
+		int size;
+	} gamma;
+};
+
+struct logo_info {
+	int mode;
+	char *mem;
+	bool ymirror;
+	u32 offset;
+	u32 width;
+	u32 height;
+	u32 bpp;
+};
+
+struct rockchip_logo_cache {
+	struct list_head head;
+	char name[20];
+	struct logo_info logo;
+};
+
+struct display_state {
+	struct list_head head;
+	const void *blob;
+	int node;
+	const char *ulogo_name;
+	const char *klogo_name;
+	int logo_mode;
+	int charge_logo_mode;
+	struct bmp_image *ubmp;
+	struct bmp_image *kbmp;
+	void *mem_base;
+	int mem_size;
+	struct logo_info logo;
+	struct crtc_state crtc_state;
+	struct connector_state conn_state;
+	struct panel_state panel_state;
+	int enable;
+	int is_init;
+	int is_enable;
+};
+
+int drm_mode_vrefresh(const struct drm_display_mode *mode);
+
+#endif
diff --git a/drivers/video/drm/rockchip_dsi_panel.c b/drivers/video/drm/rockchip_dsi_panel.c
new file mode 100644
index 0000000000..96ef2e9eb7
--- /dev/null
+++ b/drivers/video/drm/rockchip_dsi_panel.c
@@ -0,0 +1,384 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <linux/media-bus-format.h>
+#include <dm/uclass.h>
+#include <dm/uclass-id.h>
+#include <video.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+#include <backlight.h>
+#include <asm/gpio.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_panel.h"
+#include "rockchip_mipi_dsi.h"
+
+#define msleep(a)	udelay(a * 1000)
+
+struct dsi_ctrl_hdr {
+	u8 dtype;	/* data type */
+	u8 wait;	/* ms */
+	u8 dlen;	/* payload len */
+} __packed;
+
+struct dsi_cmd_desc {
+	struct dsi_ctrl_hdr dchdr;
+	u8 *payload;
+};
+
+struct dsi_panel_cmds {
+	u8 *buf;
+	int blen;
+	struct dsi_cmd_desc *cmds;
+	int cmd_cnt;
+};
+
+struct rockchip_dsi_panel {
+	struct udevice *dev;
+	const void *blob;
+	int node;
+
+	int bus_format;
+
+	struct udevice *backlight;
+	struct gpio_desc enable;
+	struct gpio_desc reset;
+
+	unsigned int delay_reset;
+	unsigned int delay_prepare;
+	unsigned int delay_unprepare;
+	unsigned int delay_enable;
+	unsigned int delay_disable;
+	unsigned int delay_init;
+
+	struct dsi_panel_cmds *on_cmds;
+	struct dsi_panel_cmds *off_cmds;
+};
+
+static int rockchip_dsi_panel_parse_cmds(const void *blob, int node,
+					 const u8 *data, int blen,
+					 struct dsi_panel_cmds *pcmds)
+{
+	int len;
+	u8 *buf, *bp;
+	struct dsi_ctrl_hdr *dchdr;
+	int i, cnt;
+
+	if (!pcmds)
+		return -EINVAL;
+
+	buf = malloc(sizeof(char) * blen);
+	if (!buf)
+		return -ENOMEM;
+
+	memcpy(buf, data, blen);
+
+	/* scan dcs commands */
+	bp = buf;
+	len = blen;
+	cnt = 0;
+	while (len > sizeof(*dchdr)) {
+		dchdr = (struct dsi_ctrl_hdr *)bp;
+		if (dchdr->dlen > len) {
+			printf("%s: dtsi cmd=%x error, len=%d",
+			       __func__, dchdr->dtype, dchdr->dlen);
+			free(buf);
+			return -ENOMEM;
+		}
+
+		bp += sizeof(*dchdr);
+		len -= sizeof(*dchdr);
+		bp += dchdr->dlen;
+		len -= dchdr->dlen;
+		cnt++;
+	}
+
+	if (len != 0) {
+		printf("%s: dcs_cmd=%x len=%d error!", __func__, buf[0], blen);
+		free(buf);
+		return -ENOMEM;
+	}
+
+	pcmds->cmds = malloc(cnt * sizeof(struct dsi_cmd_desc));
+	if (!pcmds->cmds) {
+		free(buf);
+		return -ENOMEM;
+	}
+
+	pcmds->cmd_cnt = cnt;
+	pcmds->buf = buf;
+	pcmds->blen = blen;
+
+	bp = buf;
+	len = blen;
+	for (i = 0; i < cnt; i++) {
+		dchdr = (struct dsi_ctrl_hdr *)bp;
+		len -= sizeof(*dchdr);
+		bp += sizeof(*dchdr);
+		pcmds->cmds[i].dchdr = *dchdr;
+		pcmds->cmds[i].payload = bp;
+		bp += dchdr->dlen;
+		len -= dchdr->dlen;
+	}
+
+	debug("%s: total_len=%d, cmd_cnt=%d\n",
+	      __func__, pcmds->blen, pcmds->cmd_cnt);
+	return 0;
+}
+
+static int rockchip_dsi_panel_send_cmds(struct display_state *state,
+					struct dsi_panel_cmds *cmds)
+{
+	int i, ret;
+
+	if (!cmds)
+		return -EINVAL;
+
+	for (i = 0; i < cmds->cmd_cnt; i++) {
+		switch (cmds->cmds[i].dchdr.dtype) {
+		case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+		case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+		case MIPI_DSI_GENERIC_LONG_WRITE:
+			ret = mipi_dsi_generic_write(state, cmds->cmds[i].payload,
+						     cmds->cmds[i].dchdr.dlen);
+			break;
+		case MIPI_DSI_DCS_SHORT_WRITE:
+		case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+		case MIPI_DSI_DCS_LONG_WRITE:
+			ret = mipi_dsi_dcs_write(state, cmds->cmds[i].payload,
+						 cmds->cmds[i].dchdr.dlen);
+			break;
+		default:
+			return -EINVAL;
+		}
+
+		if (ret)
+			printf("failed to write cmd%d: %d\n", i, ret);
+
+		if (cmds->cmds[i].dchdr.wait)
+			msleep(cmds->cmds[i].dchdr.wait);
+	}
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
+
+	dm_gpio_set_value(&panel->enable, 1);
+	msleep(panel->delay_prepare);
+
+	dm_gpio_set_value(&panel->reset, 1);
+	msleep(panel->delay_reset);
+	dm_gpio_set_value(&panel->reset, 0);
+
+	msleep(panel->delay_init);
+
+	if (panel->on_cmds) {
+		ret = rockchip_dsi_panel_send_cmds(state, panel->on_cmds);
+		if (ret)
+			printf("failed to send on cmds: %d\n", ret);
+	}
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+	int ret;
+
+	if (panel->off_cmds) {
+		ret = rockchip_dsi_panel_send_cmds(state, panel->off_cmds);
+		if (ret)
+			printf("failed to send on cmds: %d\n", ret);
+	}
+
+	dm_gpio_set_value(&panel->reset, 0);
+
+	mdelay(panel->delay_unprepare);
+
+	dm_gpio_set_value(&panel->enable, 0);
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+
+	msleep(panel->delay_enable);
+
+	return backlight_enable(panel->backlight);
+}
+
+static int rockchip_dsi_panel_disable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+
+	/* TODO: backlight_disable:
+	 * presently uboot not support backlight disable.
+	 */
+
+	return 0;
+}
+
+static int rockchip_dsi_panel_parse_dt(const void *blob, int node, struct rockchip_dsi_panel *panel)
+{
+	const void *data;
+	int len = 0;
+	int ret = 0;
+
+	panel->delay_prepare = fdtdec_get_int(blob, node, "prepare-delay-ms", 0);
+	panel->delay_unprepare = fdtdec_get_int(blob, node, "unprepare-delay-ms", 0);
+	panel->delay_enable = fdtdec_get_int(blob, node, "enable-delay-ms", 0);
+	panel->delay_disable = fdtdec_get_int(blob, node, "disable-delay-ms", 0);
+	panel->delay_init = fdtdec_get_int(blob, node, "init-delay-ms", 0);
+	panel->delay_reset = fdtdec_get_int(blob, node, "reset-delay-ms", 0);
+	panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
+
+	data = fdt_getprop(blob, node, "panel-init-sequence", &len);
+	if (data) {
+		panel->on_cmds = malloc(sizeof(*panel->on_cmds));
+		if (!panel->on_cmds)
+			return -ENOMEM;
+
+		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+						    panel->on_cmds);
+		if (ret) {
+			printf("failed to parse panel init sequence\n");
+			goto free_on_cmds;
+		}
+	}
+
+	data = fdt_getprop(blob, node, "panel-exit-sequence", &len);
+	if (data) {
+		panel->off_cmds = malloc(sizeof(*panel->off_cmds));
+		if (!panel->off_cmds) {
+			ret = -ENOMEM;
+			goto free_on_cmds;
+		}
+
+		ret = rockchip_dsi_panel_parse_cmds(blob, node, data, len,
+						    panel->off_cmds);
+		if (ret) {
+			printf("failed to parse panel exit sequence\n");
+			goto free_cmds;
+		}
+	}
+
+	ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, panel->dev,
+					   "backlight", &panel->backlight);
+	if (ret) {
+		printf("%s: Cannot get backlight: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(panel->dev, "enable-gpios", 0,
+				   &panel->enable, GPIOD_IS_OUT);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get enable GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	ret = gpio_request_by_name(panel->dev, "reset-gpios", 0,
+				   &panel->enable, GPIOD_IS_OUT);
+	if (ret != -ENOENT) {
+		printf("%s: Warning: cannot get reset GPIO: ret=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+	/* keep panel blank on init. */
+	dm_gpio_set_value(&panel->enable, 0);
+	dm_gpio_set_value(&panel->reset, 0);
+
+	return 0;
+
+free_cmds:
+	free(panel->off_cmds);
+free_on_cmds:
+	free(panel->on_cmds);
+	return ret;
+}
+
+static int rockchip_dsi_panel_init(struct display_state *state)
+{
+	const void *blob = state->blob;
+	struct connector_state *conn_state = &state->conn_state;
+	struct panel_state *panel_state = &state->panel_state;
+	int node = panel_state->node;
+	struct rockchip_dsi_panel *panel;
+	int ret;
+
+	panel = malloc(sizeof(*panel));
+	if (!panel)
+		return -ENOMEM;
+
+	memset(panel, 0, sizeof(*panel));
+
+	panel->blob = blob;
+	panel->node = node;
+	panel->dev = panel_state->dev;
+	panel_state->private = panel;
+
+	ret = rockchip_dsi_panel_parse_dt(blob, node, panel);
+	if (ret) {
+		printf("%s: failed to parse DT\n", __func__);
+		free(panel);
+		return ret;
+	}
+
+	conn_state->bus_format = panel->bus_format;
+
+	return 0;
+}
+
+static void rockchip_dsi_panel_deinit(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	struct rockchip_dsi_panel *panel = panel_state->private;
+
+	if (panel->on_cmds) {
+		free(panel->on_cmds->buf);
+		free(panel->on_cmds->cmds);
+	}
+
+	if (panel->off_cmds) {
+		free(panel->off_cmds->buf);
+		free(panel->off_cmds->cmds);
+	}
+
+	free(panel);
+}
+
+const struct rockchip_panel_funcs rockchip_dsi_panel_funcs = {
+	.init		= rockchip_dsi_panel_init,
+	.deinit		= rockchip_dsi_panel_deinit,
+	.prepare	= rockchip_dsi_panel_prepare,
+	.unprepare	= rockchip_dsi_panel_unprepare,
+	.enable		= rockchip_dsi_panel_enable,
+	.disable	= rockchip_dsi_panel_disable,
+};
diff --git a/drivers/video/drm/rockchip_lvds.c b/drivers/video/drm/rockchip_lvds.c
new file mode 100644
index 0000000000..85e5e85be9
--- /dev/null
+++ b/drivers/video/drm/rockchip_lvds.c
@@ -0,0 +1,639 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <asm/io.h>
+#include <dm/device.h>
+#include <syscon.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/gpio.h>
+
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_lvds.h"
+
+enum rockchip_lvds_sub_devtype {
+	RK3288_LVDS,
+	RK3366_LVDS,
+	RK3368_LVDS,
+};
+
+struct rockchip_lvds_chip_data {
+	u32	chip_type;
+	bool	has_vop_sel;
+	u32	grf_soc_con5;
+	u32	grf_soc_con6;
+	u32	grf_soc_con7;
+	u32	grf_soc_con15;
+	u32	grf_gpio1d_iomux;
+};
+
+struct rockchip_lvds_device {
+	u32	regbase;
+	void	*grf;
+	u32	ctrl_reg;
+	u32	channel;
+	u32	output;
+	u32	format;
+	struct drm_display_mode *mode;
+	const struct rockchip_lvds_chip_data *pdata;
+};
+
+static inline int lvds_name_to_format(const char *s)
+{
+	if (!s)
+		return -EINVAL;
+
+	if (strncmp(s, "jeida", 6) == 0)
+		return LVDS_FORMAT_JEIDA;
+	else if (strncmp(s, "vesa", 5) == 0)
+		return LVDS_FORMAT_VESA;
+
+	return -EINVAL;
+}
+
+static inline int lvds_name_to_output(const char *s)
+{
+	if (!s)
+		return -EINVAL;
+
+	if (strncmp(s, "rgb", 3) == 0)
+		return DISPLAY_OUTPUT_RGB;
+	else if (strncmp(s, "lvds", 4) == 0)
+		return DISPLAY_OUTPUT_LVDS;
+	else if (strncmp(s, "duallvds", 8) == 0)
+		return DISPLAY_OUTPUT_DUAL_LVDS;
+
+	return -EINVAL;
+}
+
+static inline void lvds_writel(struct rockchip_lvds_device *lvds,
+			      u32 offset, u32 val)
+{
+	writel(val, lvds->regbase + offset);
+
+	if ((lvds->pdata->chip_type == RK3288_LVDS) &&
+	    (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS))
+		writel(val, lvds->regbase + offset + 0x100);
+}
+
+static inline void lvds_msk_reg(struct rockchip_lvds_device *lvds, u32 offset,
+			       u32 msk, u32 val)
+{
+	u32 temp;
+
+	temp = readl(lvds->regbase + offset) & (0xFF - (msk));
+	writel(temp | ((val) & (msk)), lvds->regbase + offset);
+}
+
+static inline u32 lvds_readl(struct rockchip_lvds_device *lvds, u32 offset)
+{
+	return readl(lvds->regbase + offset);
+}
+
+static inline void lvds_ctrl_writel(struct rockchip_lvds_device *lvds,
+				   u32 offset, u32 val)
+{
+	writel(val, lvds->ctrl_reg + offset);
+}
+
+static inline u32 lvds_pmugrf_readl(u32 offset)
+{
+	return readl(LVDS_PMUGRF_BASE + offset);
+}
+
+static inline void lvds_pmugrf_writel(u32 offset, u32 val)
+{
+	writel(val, LVDS_PMUGRF_BASE + offset);
+}
+
+static inline u32 lvds_phy_lock(struct rockchip_lvds_device *lvds)
+{
+	u32 val = 0;
+	val = readl(lvds->ctrl_reg + 0x10);
+	val &= 0x1;
+	return val;
+}
+
+static int rockchip_lvds_clk_enable(struct rockchip_lvds_device *lvds)
+{
+	return 0;
+}
+
+const struct rockchip_lvds_chip_data rk3366_lvds_drv_data = {
+	.chip_type = RK3366_LVDS,
+	.grf_soc_con7  = RK3366_GRF_SOC_CON5,
+	.grf_soc_con15 = RK3366_GRF_SOC_CON6,
+	.has_vop_sel = true,
+};
+
+const struct rockchip_lvds_chip_data rk3368_lvds_drv_data = {
+	.chip_type = RK3368_LVDS,
+	.grf_soc_con7  = RK3368_GRF_SOC_CON7,
+	.grf_soc_con15 = RK3368_GRF_SOC_CON15,
+	.has_vop_sel = false,
+};
+
+const struct rockchip_lvds_chip_data rk3288_lvds_drv_data = {
+	.chip_type = RK3288_LVDS,
+	.has_vop_sel = true,
+	.grf_soc_con6 = 0x025c,
+	.grf_soc_con7 = 0x0260,
+	.grf_gpio1d_iomux = 0x000c,
+};
+
+static int rk336x_lvds_pwr_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	/* disable lvds lane and power off pll */
+	lvds_writel(lvds, MIPIPHY_REGEB,
+		    v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
+		    v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
+
+	/* power down lvds pll and bandgap */
+	lvds_msk_reg(lvds, MIPIPHY_REG1,
+		     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
+		     v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
+
+	/* disable lvds */
+	lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
+		     v_LVDS_EN(0) | v_TTL_EN(0));
+
+	return 0;
+}
+
+static int rk3288_lvds_pwr_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_DISABLE);
+	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_DISABLE);
+
+	writel(0xffff8000, lvds->grf + lvds->pdata->grf_soc_con7);
+
+	return 0;
+}
+
+static int rk336x_lvds_pwr_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 delay_times = 20;
+
+	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
+		/* set VOCM 900 mv and V-DIFF 350 mv */
+		lvds_msk_reg(lvds, MIPIPHY_REGE4, m_VOCM | m_DIFF_V,
+			     v_VOCM(0) | v_DIFF_V(2));
+		/* power up lvds pll and ldo */
+		lvds_msk_reg(lvds, MIPIPHY_REG1,
+			     m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
+			     v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) |
+			     v_PLL_PWR_DOWN(0));
+		/* enable lvds lane and power on pll */
+		lvds_writel(lvds, MIPIPHY_REGEB,
+			    v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
+			    v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
+
+		/* enable lvds */
+		lvds_msk_reg(lvds, MIPIPHY_REGE3,
+			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
+			     v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
+	} else {
+		lvds_msk_reg(lvds, MIPIPHY_REGE3,
+			     m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
+			     v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
+	}
+	/* delay for waitting pll lock on */
+	while (delay_times--) {
+		if (lvds_phy_lock(lvds))
+			break;
+		udelay(100);
+	}
+
+	if (delay_times <= 0)
+		printf("wait lvds phy lock failed, please check the hardware!\n");
+
+	return 0;
+}
+
+
+static void rk336x_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* iomux to lcdc */
+	if (lvds->pdata->chip_type == RK3368_LVDS) {
+		/* lcdc data 11 10 */
+		lvds_pmugrf_writel(0x04, 0xf0005000);
+		/* lcdc data 12 13 14 15 16 17 18 19 */
+		lvds_pmugrf_writel(0x08, 0xFFFF5555);
+		/* lcdc data 20 21 22 23 HSYNC VSYNC DEN DCLK */
+		lvds_pmugrf_writel(0x0c, 0xFFFF5555);
+		/* set clock lane enable */
+		lvds_ctrl_writel(lvds, 0x0, 0x4);
+	} else {
+		/* lcdc data 15 ... 10, vsync, hsync */
+		lvds_pmugrf_writel(0x0c, 0xffff555a);
+		/* lcdc data 23 ... 16 */
+		lvds_pmugrf_writel(0x30, 0xffff5555);
+		/* lcdc dclk, den */
+		lvds_pmugrf_writel(0x34, 0x000f0005);
+	}
+
+	/* enable lvds mode */
+	val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(1) |
+		v_RK336X_MIPIPHY_LANE0_EN(1) |
+		v_RK336X_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+	val = v_RK336X_FORCE_JETAG(0);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con15);
+
+	/* enable lane */
+	lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
+	val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
+		v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
+	lvds_writel(lvds, MIPIPHY_REGEB, val);
+
+	/* set ttl mode and reset phy config */
+	val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
+		v_MSB_SEL(1) | v_DIG_INTER_RST(1);
+	lvds_writel(lvds, MIPIPHY_REGE0, val);
+
+	rk336x_lvds_pwr_on(state);
+}
+
+static void rk336x_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	u32 val = 0;
+
+	/* enable lvds mode */
+	val |= v_RK336X_LVDSMODE_EN(1) | v_RK336X_MIPIPHY_TTL_EN(0);
+	/* config lvds_format */
+	val |= v_RK336X_LVDS_OUTPUT_FORMAT(lvds->format);
+	/* LSB receive mode */
+	val |= v_RK336X_LVDS_MSBSEL(LVDS_MSB_D7);
+	val |= v_RK336X_MIPIPHY_LANE0_EN(1) |
+	       v_RK336X_MIPIDPI_FORCEX_EN(1);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+	/* digital internal disable */
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
+
+	/* set pll prediv and fbdiv */
+	lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
+	lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
+
+	lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
+
+	/* set lvds mode and reset phy config */
+	lvds_msk_reg(lvds, MIPIPHY_REGE0,
+		     m_MSB_SEL | m_DIG_INTER_RST,
+		     v_MSB_SEL(1) | v_DIG_INTER_RST(1));
+
+	rk336x_lvds_pwr_on(state);
+	lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
+}
+
+static int rk3288_lvds_pwr_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u32 val;
+	u32 h_bp = mode->htotal - mode->hsync_start;
+	u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
+	u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
+
+	val = lvds->format;
+	if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
+		val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
+	else if (lvds->output == DISPLAY_OUTPUT_LVDS)
+		val |= LVDS_CH0_EN;
+	else if (lvds->output == DISPLAY_OUTPUT_RGB)
+		val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
+
+	if (h_bp & 0x01)
+		val |= LVDS_START_PHASE_RST_1;
+
+	val |= (pin_dclk << 8) | (pin_hsync << 9);
+	val |= (0xffff << 16);
+	writel(val, lvds->grf + lvds->pdata->grf_soc_con7);
+
+	return 0;
+}
+
+static void rk3288_output_ttl(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	rk3288_lvds_pwr_on(state);
+	/* iomux: dclk den hsync vsync */
+	writel(0x00550055, lvds->grf + lvds->pdata->grf_gpio1d_iomux);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
+		    RK3288_LVDS_CH0_REG0_TTL_EN |
+		    RK3288_LVDS_CH0_REG0_LANECK_EN |
+		    RK3288_LVDS_CH0_REG0_LANE4_EN |
+		    RK3288_LVDS_CH0_REG0_LANE3_EN |
+		    RK3288_LVDS_CH0_REG0_LANE2_EN |
+		    RK3288_LVDS_CH0_REG0_LANE1_EN |
+		    RK3288_LVDS_CH0_REG0_LANE0_EN);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
+		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
+
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
+		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
+		    RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
+		    RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
+		    RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
+		    RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
+		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
+		    RK3288_LVDS_CH0_REG20_LSB);
+
+	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
+	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
+}
+
+static void rk3288_output_lvds(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	rk3288_lvds_pwr_on(state);
+
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
+		    RK3288_LVDS_CH0_REG0_LVDS_EN |
+		    RK3288_LVDS_CH0_REG0_LANECK_EN |
+		    RK3288_LVDS_CH0_REG0_LANE4_EN |
+		    RK3288_LVDS_CH0_REG0_LANE3_EN |
+		    RK3288_LVDS_CH0_REG0_LANE2_EN |
+		    RK3288_LVDS_CH0_REG0_LANE1_EN |
+		    RK3288_LVDS_CH0_REG0_LANE0_EN);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
+		    RK3288_LVDS_CH0_REG1_LANECK_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE4_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE3_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE2_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE1_BIAS |
+		    RK3288_LVDS_CH0_REG1_LANE0_BIAS);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
+		    RK3288_LVDS_CH0_REG2_RESERVE_ON |
+		    RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
+		    RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
+		    RK3288_LVDS_PLL_FBDIV_REG2(0x46));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
+		    RK3288_LVDS_PLL_FBDIV_REG3(0x46));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
+	lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
+		    RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
+	lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
+		    RK3288_LVDS_CH0_REG20_LSB);
+
+	lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
+	lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
+}
+
+static int rockchip_lvds_init(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	const struct rockchip_lvds_chip_data *pdata = connector->data;
+	int lvds_node = conn_state->node;
+	struct rockchip_lvds_device *lvds;
+	const char *name;
+	int i;
+	struct fdt_resource lvds_phy, lvds_ctrl;
+	struct panel_state *panel_state = &state->panel_state;
+	int panel_node = panel_state->node;
+
+	lvds = malloc(sizeof(*lvds));
+	if (!lvds)
+		return -ENOMEM;
+	lvds->pdata = pdata;
+
+	if (pdata->chip_type == RK3288_LVDS) {
+		lvds->regbase = (u32)fdtdec_get_addr_size_auto_noparent(state->blob,
+						lvds_node, "reg", 0, NULL, false);
+	} else {
+		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
+					   "mipi_lvds_phy", &lvds_phy);
+		if (i) {
+			printf("can't get regs lvds_phy addresses!\n");
+			free(lvds);
+			return -ENOMEM;
+		}
+
+		i = fdt_get_named_resource(state->blob, lvds_node, "reg", "reg-names",
+					   "mipi_lvds_ctl", &lvds_ctrl);
+		if (i) {
+			printf("can't get regs lvds_ctrl addresses!\n");
+			free(lvds);
+			return -ENOMEM;
+		}
+
+		lvds->regbase = lvds_phy.start;
+		lvds->ctrl_reg = lvds_ctrl.start;
+	}
+
+	lvds->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (lvds->grf <= 0) {
+		printf("%s: Get syscon grf failed (ret=%p)\n",
+		      __func__, lvds->grf);
+		return  -ENXIO;
+	}
+
+	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,output", 0, NULL);
+	if (!name)
+		/* default set it as output rgb */
+		lvds->output = DISPLAY_OUTPUT_RGB;
+	else
+		lvds->output = lvds_name_to_output(name);
+	if (lvds->output < 0) {
+		printf("invalid output type [%s]\n", name);
+		free(lvds);
+		return lvds->output;
+	}
+	name = fdt_stringlist_get(state->blob, panel_node, "rockchip,data-mapping", 0, NULL);
+	if (!name)
+		/* default set it as format jeida */
+		lvds->format = LVDS_FORMAT_JEIDA;
+	else
+		lvds->format = lvds_name_to_format(name);
+
+	if (lvds->format < 0) {
+		printf("invalid data-mapping format [%s]\n", name);
+		free(lvds);
+		return lvds->format;
+	}
+	i = fdtdec_get_int(state->blob, panel_node, "rockchip,data-width", 24);
+	if (i == 24) {
+		lvds->format |= LVDS_24BIT;
+	} else if (i == 18) {
+		lvds->format |= LVDS_18BIT;
+	} else {
+		printf("rockchip-lvds unsupport data-width[%d]\n", i);
+		free(lvds);
+		return -EINVAL;
+	}
+	printf("LVDS: data mapping: %s, data-width:%d, format:%d,\n",
+		name, i, lvds->format);
+	conn_state->private = lvds;
+	conn_state->type = DRM_MODE_CONNECTOR_LVDS;
+	conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	return 0;
+}
+
+static void rockchip_lvds_deinit(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	free(lvds);
+}
+
+static int rockchip_lvds_prepare(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	lvds->mode = &conn_state->mode;
+
+	rockchip_lvds_clk_enable(lvds);
+
+	return 0;
+}
+
+static void rockchip_lvds_vop_routing(struct rockchip_lvds_device *lvds, int pipe)
+{
+	u32 val;
+
+	if (lvds->pdata->chip_type == RK3288_LVDS) {
+		if (pipe)
+			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
+				(RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
+		else
+			val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
+		writel(val, lvds->grf + lvds->pdata->grf_soc_con6);
+	} else {
+		if (pipe)
+			val = RK3366_LVDS_VOP_SEL_LIT;
+		else
+			val = RK3366_LVDS_VOP_SEL_BIG;
+
+		writel(val, lvds->grf + RK3366_GRF_SOC_CON0);
+	}
+}
+
+static int rockchip_lvds_enable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+	struct crtc_state *crtc_state = &state->crtc_state;
+
+	if (lvds->pdata->has_vop_sel)
+		rockchip_lvds_vop_routing(lvds, crtc_state->crtc_id);
+
+	if (lvds->output == DISPLAY_OUTPUT_LVDS) {
+		if (lvds->pdata->chip_type == RK3288_LVDS)
+			rk3288_output_lvds(state);
+		else
+			rk336x_output_lvds(state);
+	} else {
+		if (lvds->pdata->chip_type == RK3288_LVDS)
+			rk3288_output_ttl(state);
+		else
+			rk336x_output_ttl(state);
+	}
+
+	return 0;
+}
+
+static int rockchip_lvds_disable(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	struct rockchip_lvds_device *lvds = conn_state->private;
+
+	if (lvds->pdata->chip_type == RK3288_LVDS)
+		rk3288_lvds_pwr_off(state);
+	else
+		rk336x_lvds_pwr_off(state);
+
+	return 0;
+}
+
+const struct rockchip_connector_funcs rockchip_lvds_funcs = {
+	.init = rockchip_lvds_init,
+	.deinit = rockchip_lvds_deinit,
+	.prepare = rockchip_lvds_prepare,
+	.enable = rockchip_lvds_enable,
+	.disable = rockchip_lvds_disable,
+};
+
+static const struct rockchip_connector rk3366_lvds_data = {
+	 .funcs = &rockchip_analogix_dp_funcs,
+	 .data = &rk3366_lvds_drv_data,
+};
+
+static const struct rockchip_connector rk3368_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3368_lvds_drv_data,
+};
+
+static const struct rockchip_connector rk3288_lvds_data = {
+	 .funcs = &rockchip_lvds_funcs,
+	 .data = &rk3288_lvds_drv_data,
+};
+
+static const struct udevice_id rockchip_lvds_ids[] = {
+	{
+	 .compatible = "rockchip,rk3366-lvds",
+	 .data = (ulong)&rk3366_lvds_data,
+	}, {
+	 .compatible = "rockchip,rk3368-lvds",
+	 .data = (ulong)&rk3368_lvds_data,
+	}, {
+	 .compatible = "rockchip,rk3288-lvds",
+	 .data = (ulong)&rk3288_lvds_data,
+	}, {}
+};
+
+U_BOOT_DRIVER(rockchip_lvds) = {
+	.name = "rockchip_lvds",
+	.id = UCLASS_DISPLAY,
+	.of_match = rockchip_lvds_ids,
+};
diff --git a/drivers/video/drm/rockchip_lvds.h b/drivers/video/drm/rockchip_lvds.h
new file mode 100644
index 0000000000..416eacef87
--- /dev/null
+++ b/drivers/video/drm/rockchip_lvds.h
@@ -0,0 +1,203 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_LVDS_H_
+#define _ROCKCHIP_LVDS_H_
+#define RK3288_LVDS_CH0_REG0			0x00
+#define RK3288_LVDS_CH0_REG0_LVDS_EN		BIT(7)
+#define RK3288_LVDS_CH0_REG0_TTL_EN		BIT(6)
+#define RK3288_LVDS_CH0_REG0_LANECK_EN		BIT(5)
+#define RK3288_LVDS_CH0_REG0_LANE4_EN		BIT(4)
+#define RK3288_LVDS_CH0_REG0_LANE3_EN		BIT(3)
+#define RK3288_LVDS_CH0_REG0_LANE2_EN		BIT(2)
+#define RK3288_LVDS_CH0_REG0_LANE1_EN		BIT(1)
+#define RK3288_LVDS_CH0_REG0_LANE0_EN		BIT(0)
+
+#define RK3288_LVDS_CH0_REG1			0x04
+#define RK3288_LVDS_CH0_REG1_LANECK_BIAS	BIT(5)
+#define RK3288_LVDS_CH0_REG1_LANE4_BIAS		BIT(4)
+#define RK3288_LVDS_CH0_REG1_LANE3_BIAS		BIT(3)
+#define RK3288_LVDS_CH0_REG1_LANE2_BIAS		BIT(2)
+#define RK3288_LVDS_CH0_REG1_LANE1_BIAS		BIT(1)
+#define RK3288_LVDS_CH0_REG1_LANE0_BIAS		BIT(0)
+
+#define RK3288_LVDS_CH0_REG2			0x08
+#define RK3288_LVDS_CH0_REG2_RESERVE_ON		BIT(7)
+#define RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE	BIT(6)
+#define RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE	BIT(5)
+#define RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE	BIT(4)
+#define RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE	BIT(3)
+#define RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE	BIT(2)
+#define RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE	BIT(1)
+#define RK3288_LVDS_CH0_REG2_PLL_FBDIV8		BIT(0)
+
+#define RK3288_LVDS_CH0_REG3			0x0c
+#define RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK	0xff
+
+#define RK3288_LVDS_CH0_REG4			0x10
+#define RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE	BIT(5)
+#define RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE	BIT(4)
+#define RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE	BIT(3)
+#define RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE	BIT(2)
+#define RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE	BIT(1)
+#define RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE	BIT(0)
+
+#define RK3288_LVDS_CH0_REG5			0x14
+#define RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA	BIT(5)
+#define RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA	BIT(4)
+#define RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA	BIT(3)
+#define RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA	BIT(2)
+#define RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA	BIT(1)
+#define RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA	BIT(0)
+
+#define RK3288_LVDS_CFG_REGC			0x30
+#define RK3288_LVDS_CFG_REGC_PLL_ENABLE		0x00
+#define RK3288_LVDS_CFG_REGC_PLL_DISABLE	0xff
+
+#define RK3288_LVDS_CH0_REGD			0x34
+#define RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK	0x1f
+
+#define RK3288_LVDS_CH0_REG20			0x80
+#define RK3288_LVDS_CH0_REG20_MSB		0x45
+#define RK3288_LVDS_CH0_REG20_LSB		0x44
+
+#define RK3288_LVDS_CFG_REG21			0x84
+#define RK3288_LVDS_CFG_REG21_TX_ENABLE		0x92
+#define RK3288_LVDS_CFG_REG21_TX_DISABLE	0x00
+
+/* fbdiv value is split over 2 registers, with bit8 in reg2 */
+#define RK3288_LVDS_PLL_FBDIV_REG2(_fbd) \
+		(_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
+#define RK3288_LVDS_PLL_FBDIV_REG3(_fbd) \
+		(_fbd & RK3288_LVDS_CH0_REG3_PLL_FBDIV_MASK)
+#define RK3288_LVDS_PLL_PREDIV_REGD(_pd) \
+		(_pd & RK3288_LVDS_CH0_REGD_PLL_PREDIV_MASK)
+
+#define RK3288_LVDS_SOC_CON6_SEL_VOP_LIT	BIT(3)
+
+#define LVDS_FMT_MASK				(0x07 << 16)
+#define LVDS_MSB				BIT(3)
+#define LVDS_DUAL				BIT(4)
+#define LVDS_FMT_1				BIT(5)
+#define LVDS_TTL_EN				BIT(6)
+#define LVDS_START_PHASE_RST_1			BIT(7)
+#define LVDS_DCLK_INV				BIT(8)
+#define LVDS_CH0_EN				BIT(11)
+#define LVDS_CH1_EN				BIT(12)
+#define LVDS_PWRDN				BIT(15)
+
+#define LVDS_24BIT				(0 << 1)
+#define LVDS_18BIT				(1 << 1)
+#define LVDS_FORMAT_VESA			(0 << 0)
+#define LVDS_FORMAT_JEIDA			(1 << 0)
+
+#define DISPLAY_OUTPUT_RGB		0
+#define DISPLAY_OUTPUT_LVDS		1
+#define DISPLAY_OUTPUT_DUAL_LVDS	2
+
+#define BITS(x, bit)            ((x) << (bit))
+#define BITS_MASK(x, mask, bit)  BITS((x) & (mask), bit)
+#define BITS_EN(mask, bit)       BITS(mask, bit + 16)
+
+#define RK3366_GRF_SOC_CON0	0x0400
+#define RK3366_LVDS_VOP_SEL_LIT	(BITS_MASK(1, 1, 0) | BITS_EN(1, 0))
+#define RK3366_LVDS_VOP_SEL_BIG	(BITS_MASK(0, 1, 0) | BITS_EN(1, 0))
+#define RK3366_GRF_SOC_CON5	0x0414
+#define RK3366_GRF_SOC_CON6	0x0418
+
+#define RK3368_GRF_SOC_CON7	0x041c
+#define RK3368_GRF_SOC_CON15	0x043c
+
+#define v_RK336X_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
+#define v_RK336X_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
+#define v_RK336X_LVDSMODE_EN(x)        (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
+#define v_RK336X_MIPIPHY_TTL_EN(x)     (BITS_MASK(x, 1, 15) | BITS_EN(1, 15))
+#define v_RK336X_MIPIPHY_LANE0_EN(x)   (BITS_MASK(x, 1, 5) | BITS_EN(1, 5))
+#define v_RK336X_MIPIDPI_FORCEX_EN(x)  (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
+enum {
+	LVDS_DATA_FROM_LCDC = 0,
+	LVDS_DATA_FORM_EBC,
+};
+
+enum {
+	LVDS_MSB_D0 = 0,
+	LVDS_MSB_D7,
+};
+
+#define MIPIPHY_REG0            0x0000
+#define m_LANE_EN_0             BITS(1, 2)
+#define m_LANE_EN_1             BITS(1, 3)
+#define m_LANE_EN_2             BITS(1, 4)
+#define m_LANE_EN_3             BITS(1, 5)
+#define m_LANE_EN_CLK           BITS(1, 5)
+#define v_LANE_EN_0(x)          BITS(1, 2)
+#define v_LANE_EN_1(x)          BITS(1, 3)
+#define v_LANE_EN_2(x)          BITS(1, 4)
+#define v_LANE_EN_3(x)          BITS(1, 5)
+#define v_LANE_EN_CLK(x)        BITS(1, 5)
+
+#define MIPIPHY_REG1            0x0004
+#define m_SYNC_RST              BITS(1, 0)
+#define m_LDO_PWR_DOWN          BITS(1, 1)
+#define m_PLL_PWR_DOWN          BITS(1, 2)
+#define v_SYNC_RST(x)           BITS_MASK(x, 1, 0)
+#define v_LDO_PWR_DOWN(x)       BITS_MASK(x, 1, 1)
+#define v_PLL_PWR_DOWN(x)       BITS_MASK(x, 1, 2)
+
+#define MIPIPHY_REG3		0x000c
+#define m_PREDIV                BITS(0x1f, 0)
+#define m_FBDIV_MSB             BITS(1, 5)
+#define v_PREDIV(x)             BITS_MASK(x, 0x1f, 0)
+#define v_FBDIV_MSB(x)          BITS_MASK(x, 1, 5)
+
+#define MIPIPHY_REG4		0x0010
+#define v_FBDIV_LSB(x)          BITS_MASK(x, 0xff, 0)
+
+#define MIPIPHY_REGE0		0x0380
+#define m_MSB_SEL               BITS(1, 0)
+#define m_DIG_INTER_RST         BITS(1, 2)
+#define m_LVDS_MODE_EN          BITS(1, 5)
+#define m_TTL_MODE_EN           BITS(1, 6)
+#define m_MIPI_MODE_EN          BITS(1, 7)
+#define v_MSB_SEL(x)            BITS_MASK(x, 1, 0)
+#define v_DIG_INTER_RST(x)      BITS_MASK(x, 1, 2)
+#define v_LVDS_MODE_EN(x)       BITS_MASK(x, 1, 5)
+#define v_TTL_MODE_EN(x)        BITS_MASK(x, 1, 6)
+#define v_MIPI_MODE_EN(x)       BITS_MASK(x, 1, 7)
+
+#define MIPIPHY_REGE1           0x0384
+#define m_DIG_INTER_EN          BITS(1, 7)
+#define v_DIG_INTER_EN(x)       BITS_MASK(x, 1, 7)
+
+#define MIPIPHY_REGE3           0x038c
+#define m_MIPI_EN               BITS(1, 0)
+#define m_LVDS_EN               BITS(1, 1)
+#define m_TTL_EN                BITS(1, 2)
+#define v_MIPI_EN(x)            BITS_MASK(x, 1, 0)
+#define v_LVDS_EN(x)            BITS_MASK(x, 1, 1)
+#define v_TTL_EN(x)             BITS_MASK(x, 1, 2)
+
+#define MIPIPHY_REGE4		0x0390
+#define m_VOCM			BITS(3, 4)
+#define m_DIFF_V		BITS(3, 6)
+
+#define v_VOCM(x)		BITS_MASK(x, 3, 4)
+#define v_DIFF_V(x)		BITS_MASK(x, 3, 6)
+
+#define MIPIPHY_REGE8           0x03a0
+
+#define MIPIPHY_REGEB           0x03ac
+#define v_PLL_PWR_OFF(x)        BITS_MASK(x, 1, 2)
+#define v_LANECLK_EN(x)         BITS_MASK(x, 1, 3)
+#define v_LANE3_EN(x)           BITS_MASK(x, 1, 4)
+#define v_LANE2_EN(x)           BITS_MASK(x, 1, 5)
+#define v_LANE1_EN(x)           BITS_MASK(x, 1, 6)
+#define v_LANE0_EN(x)           BITS_MASK(x, 1, 7)
+
+#define LVDS_PMUGRF_BASE         0xff738000
+#define v_RK336X_FORCE_JETAG(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
+
+#endif
diff --git a/drivers/video/drm/rockchip_mipi_dsi.c b/drivers/video/drm/rockchip_mipi_dsi.c
new file mode 100644
index 0000000000..c07d385ffa
--- /dev/null
+++ b/drivers/video/drm/rockchip_mipi_dsi.c
@@ -0,0 +1,262 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_mipi_dsi.h"
+
+void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+				  unsigned long period)
+{
+	/* Global Operation Timing Parameters */
+	timing->clkmiss = 0;
+	timing->clkpost = 70 + 52 * period;
+	timing->clkpre = 8 * period;
+	timing->clkprepare = 65;
+	timing->clksettle = 95;
+	timing->clktermen = 0;
+	timing->clktrail = 80;
+	timing->clkzero = 260;
+	timing->dtermen = 0;
+	timing->eot = 0;
+	timing->hsexit = 120;
+	timing->hsprepare = 65 + 4 * period;
+	timing->hszero = 145 + 6 * period;
+	timing->hssettle = 85 + 6 * period;
+	timing->hsskip = 40;
+	timing->hstrail = max(8 * period, 60 + 4 * period);
+	timing->init = 100000;
+	timing->lpx = 60;
+	timing->taget = 5 * timing->lpx;
+	timing->tago = 4 * timing->lpx;
+	timing->tasure = 2 * timing->lpx;
+	timing->wakeup = 1000000;
+}
+
+ssize_t mipi_dsi_generic_write(struct display_state *state,
+			       const void *payload, size_t size)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.tx_buf = payload;
+	msg.tx_len = size;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	switch (size) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
+		break;
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
+		break;
+	default:
+		msg.type = MIPI_DSI_GENERIC_LONG_WRITE;
+		break;
+	}
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_dcs_write(struct display_state *state,
+			   const void *payload, size_t size)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.tx_buf = payload;
+	msg.tx_len = size;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	switch (size) {
+	case 0:
+		return -EINVAL;
+	case 1:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
+		break;
+	default:
+		msg.type = MIPI_DSI_DCS_LONG_WRITE;
+		break;
+	}
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
+			      size_t num_params, void *data, size_t size)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.tx_buf = params;
+	msg.tx_len = num_params;
+	msg.rx_len = size;
+	msg.rx_buf = data;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	switch (num_params) {
+	case 0:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
+		break;
+	case 1:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
+		break;
+	case 2:
+		msg.type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
+			  size_t len)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_connector *connector = conn_state->connector;
+	struct mipi_dsi_msg msg;
+
+	if (!connector || !connector->funcs || !connector->funcs->transfer) {
+		printf("%s: failed to find connector transfer funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	memset(&msg, 0, sizeof(msg));
+	msg.channel = 0;
+	msg.type = MIPI_DSI_DCS_READ;
+	msg.tx_buf = &cmd;
+	msg.tx_len = 1;
+	msg.rx_len = len;
+	msg.rx_buf = data;
+	msg.flags |= MIPI_DSI_MSG_USE_LPM;
+
+	return connector->funcs->transfer(state, &msg);
+}
+
+static bool mipi_dsi_packet_format_is_short(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_V_SYNC_START:
+	case MIPI_DSI_V_SYNC_END:
+	case MIPI_DSI_H_SYNC_START:
+	case MIPI_DSI_H_SYNC_END:
+	case MIPI_DSI_END_OF_TRANSMISSION:
+	case MIPI_DSI_COLOR_MODE_OFF:
+	case MIPI_DSI_COLOR_MODE_ON:
+	case MIPI_DSI_SHUTDOWN_PERIPHERAL:
+	case MIPI_DSI_TURN_ON_PERIPHERAL:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+	case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM:
+	case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
+	case MIPI_DSI_DCS_SHORT_WRITE:
+	case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+	case MIPI_DSI_DCS_READ:
+	case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+		return true;
+	}
+
+	return false;
+}
+
+static bool mipi_dsi_packet_format_is_long(u8 type)
+{
+	switch (type) {
+	case MIPI_DSI_NULL_PACKET:
+	case MIPI_DSI_BLANKING_PACKET:
+	case MIPI_DSI_GENERIC_LONG_WRITE:
+	case MIPI_DSI_DCS_LONG_WRITE:
+	case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_30:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_36:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_16:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_18:
+	case MIPI_DSI_PIXEL_STREAM_3BYTE_18:
+	case MIPI_DSI_PACKED_PIXEL_STREAM_24:
+		return true;
+	}
+
+	return false;
+}
+
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg)
+{
+	if (!packet || !msg)
+		return -EINVAL;
+
+	/* do some minimum sanity checking */
+	if (!mipi_dsi_packet_format_is_short(msg->type) &&
+	    !mipi_dsi_packet_format_is_long(msg->type))
+		return -EINVAL;
+
+	if (msg->channel > 3)
+		return -EINVAL;
+
+	memset(packet, 0, sizeof(*packet));
+	packet->header[0] = ((msg->channel & 0x3) << 6) | (msg->type & 0x3f);
+	if (mipi_dsi_packet_format_is_long(msg->type)) {
+		packet->header[1] = (msg->tx_len >> 0) & 0xff;
+		packet->header[2] = (msg->tx_len >> 8) & 0xff;
+		packet->payload_length = msg->tx_len;
+		packet->payload = msg->tx_buf;
+	} else {
+		const u8 *tx = msg->tx_buf;
+		packet->header[1] = (msg->tx_len > 0) ? tx[0] : 0;
+		packet->header[2] = (msg->tx_len > 1) ? tx[1] : 0;
+	}
+
+	packet->size = sizeof(packet->header) + packet->payload_length;
+
+	return 0;
+}
diff --git a/drivers/video/drm/rockchip_mipi_dsi.h b/drivers/video/drm/rockchip_mipi_dsi.h
new file mode 100644
index 0000000000..44a66618fe
--- /dev/null
+++ b/drivers/video/drm/rockchip_mipi_dsi.h
@@ -0,0 +1,243 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_MIPI_DSI_H__
+#define __ROCKCHIP_MIPI_DSI_H__
+
+#define MSEC_PER_SEC	1000L
+#define USEC_PER_MSEC	1000L
+#define NSEC_PER_USEC	1000L
+#define NSEC_PER_MSEC	1000000L
+#define USEC_PER_SEC	1000000L
+#define NSEC_PER_SEC	1000000000L
+#define FSEC_PER_SEC	1000000000000000LL
+
+#define GENMASK(h, l)	(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+#define UPDATE(v, h, l)	(((v) << (l)) & GENMASK((h), (l)))
+#define HIWORD_UPDATE(v, h, l)	(((v) << (l)) | (GENMASK(h, l) << 16))
+
+#define readl_poll_timeout(addr, val, cond, sleep_us, timeout_us)	\
+({ \
+	int try = 100; \
+	for (;;) { \
+		(val) = readl(addr); \
+		if (cond) \
+			break; \
+		try--; \
+		if (!try) \
+			break; \
+		if (sleep_us) \
+			udelay(sleep_us >> 2); \
+	} \
+	(cond) ? 0 : -ETIMEDOUT; \
+})
+
+/* MIPI DSI Processor-to-Peripheral transaction types */
+enum {
+	MIPI_DSI_V_SYNC_START				= 0x01,
+	MIPI_DSI_V_SYNC_END				= 0x11,
+	MIPI_DSI_H_SYNC_START				= 0x21,
+	MIPI_DSI_H_SYNC_END				= 0x31,
+
+	MIPI_DSI_COLOR_MODE_OFF				= 0x02,
+	MIPI_DSI_COLOR_MODE_ON				= 0x12,
+	MIPI_DSI_SHUTDOWN_PERIPHERAL			= 0x22,
+	MIPI_DSI_TURN_ON_PERIPHERAL			= 0x32,
+
+	MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM		= 0x03,
+	MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM		= 0x13,
+	MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM		= 0x23,
+
+	MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM		= 0x04,
+	MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM		= 0x14,
+	MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM		= 0x24,
+
+	MIPI_DSI_DCS_SHORT_WRITE			= 0x05,
+	MIPI_DSI_DCS_SHORT_WRITE_PARAM			= 0x15,
+
+	MIPI_DSI_DCS_READ				= 0x06,
+
+	MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE		= 0x37,
+
+	MIPI_DSI_END_OF_TRANSMISSION			= 0x08,
+
+	MIPI_DSI_NULL_PACKET				= 0x09,
+	MIPI_DSI_BLANKING_PACKET			= 0x19,
+	MIPI_DSI_GENERIC_LONG_WRITE			= 0x29,
+	MIPI_DSI_DCS_LONG_WRITE				= 0x39,
+
+	MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20	= 0x0c,
+	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24		= 0x1c,
+	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16		= 0x2c,
+
+	MIPI_DSI_PACKED_PIXEL_STREAM_30			= 0x0d,
+	MIPI_DSI_PACKED_PIXEL_STREAM_36			= 0x1d,
+	MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12		= 0x3d,
+
+	MIPI_DSI_PACKED_PIXEL_STREAM_16			= 0x0e,
+	MIPI_DSI_PACKED_PIXEL_STREAM_18			= 0x1e,
+	MIPI_DSI_PIXEL_STREAM_3BYTE_18			= 0x2e,
+	MIPI_DSI_PACKED_PIXEL_STREAM_24			= 0x3e,
+};
+
+/* request ACK from peripheral */
+#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
+/* use Low Power Mode to transmit message */
+#define MIPI_DSI_MSG_USE_LPM	BIT(1)
+
+/**
+ * struct mipi_dsi_msg - read/write DSI buffer
+ * @channel: virtual channel id
+ * @type: payload data type
+ * @flags: flags controlling this message transmission
+ * @tx_len: length of @tx_buf
+ * @tx_buf: data to be written
+ * @rx_len: length of @rx_buf
+ * @rx_buf: data to be read, or NULL
+ */
+struct mipi_dsi_msg {
+	u8 channel;
+	u8 type;
+	u16 flags;
+
+	size_t tx_len;
+	const void *tx_buf;
+
+	size_t rx_len;
+	void *rx_buf;
+};
+
+/**
+ * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
+ * @size: size (in bytes) of the packet
+ * @header: the four bytes that make up the header (Data ID, Word Count or
+ *     Packet Data, and ECC)
+ * @payload_length: number of bytes in the payload
+ * @payload: a pointer to a buffer containing the payload, if any
+ */
+struct mipi_dsi_packet {
+	size_t size;
+	u8 header[4];
+	size_t payload_length;
+	const u8 *payload;
+};
+
+
+/* DSI mode flags */
+
+/* video mode */
+#define MIPI_DSI_MODE_VIDEO		BIT(0)
+/* video burst mode */
+#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
+/* video pulse mode */
+#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
+/* enable auto vertical count mode */
+#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
+/* enable hsync-end packets in vsync-pulse and v-porch area */
+#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
+/* disable hfront-porch area */
+#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
+/* disable hback-porch area */
+#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
+/* disable hsync-active area */
+#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
+/* flush display FIFO on vsync pulse */
+#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
+/* disable EoT packets in HS mode */
+#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM		BIT(11)
+
+enum mipi_dsi_pixel_format {
+	MIPI_DSI_FMT_RGB888,
+	MIPI_DSI_FMT_RGB666,
+	MIPI_DSI_FMT_RGB666_PACKED,
+	MIPI_DSI_FMT_RGB565,
+};
+
+/**
+ * mipi_dsi_pixel_format_to_bpp - obtain the number of bits per pixel for any
+ *                                given pixel format defined by the MIPI DSI
+ *                                specification
+ * @fmt: MIPI DSI pixel format
+ *
+ * Returns: The number of bits per pixel of the given pixel format.
+ */
+static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt)
+{
+	switch (fmt) {
+	case MIPI_DSI_FMT_RGB888:
+	case MIPI_DSI_FMT_RGB666:
+		return 24;
+
+	case MIPI_DSI_FMT_RGB666_PACKED:
+		return 18;
+
+	case MIPI_DSI_FMT_RGB565:
+		return 16;
+	}
+
+	return -EINVAL;
+}
+
+/**
+ * enum mipi_dsi_dcs_tear_mode - Tearing Effect Output Line mode
+ * @MIPI_DSI_DCS_TEAR_MODE_VBLANK: the TE output line consists of V-Blanking
+ *    information only
+ * @MIPI_DSI_DCS_TEAR_MODE_VHBLANK : the TE output line consists of both
+ *    V-Blanking and H-Blanking information
+ */
+enum mipi_dsi_dcs_tear_mode {
+	MIPI_DSI_DCS_TEAR_MODE_VBLANK,
+	MIPI_DSI_DCS_TEAR_MODE_VHBLANK,
+};
+
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
+
+struct mipi_dphy_timing {
+	unsigned int clkmiss;
+	unsigned int clkpost;
+	unsigned int clkpre;
+	unsigned int clkprepare;
+	unsigned int clksettle;
+	unsigned int clktermen;
+	unsigned int clktrail;
+	unsigned int clkzero;
+	unsigned int dtermen;
+	unsigned int eot;
+	unsigned int hsexit;
+	unsigned int hsprepare;
+	unsigned int hszero;
+	unsigned int hssettle;
+	unsigned int hsskip;
+	unsigned int hstrail;
+	unsigned int init;
+	unsigned int lpx;
+	unsigned int taget;
+	unsigned int tago;
+	unsigned int tasure;
+	unsigned int wakeup;
+};
+
+void mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
+				  unsigned long period);
+ssize_t mipi_dsi_dcs_write(struct display_state *state,
+			   const void *payload, size_t size);
+ssize_t mipi_dsi_generic_write(struct display_state *state,
+			       const void *payload, size_t size);
+int mipi_dsi_create_packet(struct mipi_dsi_packet *packet,
+			   const struct mipi_dsi_msg *msg);
+ssize_t mipi_dsi_dcs_read(struct display_state *state, u8 cmd, void *data,
+			  size_t len);
+ssize_t mipi_dsi_generic_read(struct display_state *state, const void *params,
+			      size_t num_params, void *data, size_t size);
+#endif /* __ROCKCHIP_MIPI_DSI__ */
diff --git a/drivers/video/drm/rockchip_panel.c b/drivers/video/drm/rockchip_panel.c
new file mode 100644
index 0000000000..aabce7aba0
--- /dev/null
+++ b/drivers/video/drm/rockchip_panel.c
@@ -0,0 +1,226 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+#include <dm/device.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_panel.h"
+
+static const struct drm_display_mode auo_b125han03_mode = {
+	.clock = 146900,
+	.hdisplay = 1920,
+	.hsync_start = 1920 + 48,
+	.hsync_end = 1920 + 48 + 32,
+	.htotal = 1920 + 48 + 32 + 140,
+	.vdisplay = 1080,
+	.vsync_start = 1080 + 2,
+	.vsync_end = 1080 + 2 + 5,
+	.vtotal = 1080 + 2 + 5 + 57,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
+	.clock = 200000,
+	.hdisplay = 1536,
+	.hsync_start = 1536 + 12,
+	.hsync_end = 1536 + 12 + 16,
+	.htotal = 1536 + 12 + 16 + 48,
+	.vdisplay = 2048,
+	.vsync_start = 2048 + 8,
+	.vsync_end = 2048 + 8 + 4,
+	.vtotal = 2048 + 8 + 4 + 8,
+	.vrefresh = 60,
+	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+#if 0
+static const struct rockchip_panel simple_panel_data = {
+	.funcs = &panel_simple_funcs,
+};
+#endif
+
+static const struct rockchip_panel simple_panel_dsi_data = {
+	.funcs = &rockchip_dsi_panel_funcs,
+};
+#if 0
+static const struct rockchip_panel lg_lp079qx1_sp0v_data = {
+	.funcs = &panel_simple_funcs,
+	.data = &lg_lp079qx1_sp0v_mode,
+};
+
+static const struct rockchip_panel auo_b125han03_data = {
+	.funcs = &panel_simple_funcs,
+	.data = &auo_b125han03_mode,
+};
+#endif
+
+static const struct udevice_id rockchip_panel_ids[] = {
+#if 0
+	}, {
+		.compatible = "simple-panel",
+		.funcs = &simple_panel_data,
+	},
+#endif
+ {
+		.compatible = "simple-panel-dsi",
+		.data = (ulong)&simple_panel_dsi_data,
+	},
+#if 0
+{
+		.compatible = "lg,lp079qx1-sp0v",
+		.funcs = &lg_lp079qx1_sp0v_data,
+	}, {
+		.compatible = "auo,b125han03",
+		.funcs = &auo_b125han03_data,
+	},
+#endif
+ {}
+};
+
+static int rockchip_panel_probe(struct udevice *dev)
+{
+	printf("--->yzq %s %d\n", __func__, __LINE__);
+	return 0;
+}
+
+static int rockchip_panel_bind(struct udevice *dev)
+{
+	printf("--->yzq %s %d\n", __func__, __LINE__);
+	return 0;
+}
+
+
+U_BOOT_DRIVER(rockchip_panel) = {
+	.name = "rockchip_panel",
+	.id = UCLASS_PANEL,
+	.of_match = rockchip_panel_ids,
+	.bind	= rockchip_panel_bind,
+	.probe	= rockchip_panel_probe,
+};
+
+const struct drm_display_mode *
+rockchip_get_display_mode_from_panel(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->data)
+		return NULL;
+
+	return (const struct drm_display_mode *)panel->data;
+}
+
+#if 0
+const struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
+{
+	const char *name;
+	int i;
+
+	name = fdt_stringlist_get(blob, node, "compatible", 0, NULL);
+
+	for (i = 0; i < ARRAY_SIZE(g_panel); i++)
+		if (!strcmp(name, g_panel[i].compatible))
+			break;
+
+	if (i >= ARRAY_SIZE(g_panel))
+		return NULL;
+
+	return &g_panel[i];
+}
+#endif
+
+int rockchip_panel_init(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->init) {
+		printf("%s: failed to find panel init funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->init(state);
+}
+
+void rockchip_panel_deinit(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->deinit) {
+		printf("%s: failed to find panel deinit funcs\n", __func__);
+		return;
+	}
+
+	panel->funcs->deinit(state);
+}
+
+int rockchip_panel_prepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+printf("--->yzq %s %d\n", __func__, __LINE__);
+	if (!panel || !panel->funcs || !panel->funcs->prepare) {
+printf("--->yzq %s %d panel=%p\n", __func__, __LINE__, panel);
+printf("--->yzq %s %d panel->funcs=%p\n", __func__, __LINE__, panel->funcs);
+printf("--->yzq %s %d panel->funcs->prepare=%p\n", __func__, __LINE__, panel->funcs->prepare);
+		printf("%s: failed to find panel prepare funcs\n", __func__);
+		return -ENODEV;
+	}
+printf("--->yzq %s %d\n", __func__, __LINE__);
+
+	return panel->funcs->prepare(state);
+}
+
+int rockchip_panel_unprepare(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->unprepare) {
+		printf("%s: failed to find panel unprepare funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->unprepare(state);
+}
+
+int rockchip_panel_enable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->enable) {
+		printf("%s: failed to find panel prepare funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->enable(state);
+}
+
+int rockchip_panel_disable(struct display_state *state)
+{
+	struct panel_state *panel_state = &state->panel_state;
+	const struct rockchip_panel *panel = panel_state->panel;
+
+	if (!panel || !panel->funcs || !panel->funcs->disable) {
+		printf("%s: failed to find panel disable funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return panel->funcs->disable(state);
+}
diff --git a/drivers/video/drm/rockchip_panel.h b/drivers/video/drm/rockchip_panel.h
new file mode 100644
index 0000000000..699128d7cc
--- /dev/null
+++ b/drivers/video/drm/rockchip_panel.h
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PANEL_H_
+#define _ROCKCHIP_PANEL_H_
+
+struct rockchip_panel_funcs {
+	int (*init)(struct display_state *state);
+	void (*deinit)(struct display_state *state);
+	int (*prepare)(struct display_state *state);
+	int (*unprepare)(struct display_state *state);
+	int (*enable)(struct display_state *state);
+	int (*disable)(struct display_state *state);
+};
+
+struct rockchip_panel {
+	const struct rockchip_panel_funcs *funcs;
+	const void *data;
+};
+
+
+#ifdef CONFIG_DRM_ROCKCHIP_PANEL
+const struct rockchip_panel *rockchip_get_panel(const void *blob, int node);
+const struct drm_display_mode *
+rockchip_get_display_mode_from_panel(struct display_state *state);
+int rockchip_panel_init(struct display_state *state);
+void rockchip_panel_deinit(struct display_state *state);
+int rockchip_panel_enable(struct display_state *state);
+int rockchip_panel_disable(struct display_state *state);
+int rockchip_panel_prepare(struct display_state *state);
+int rockchip_panel_unprepare(struct display_state *state);
+#else
+static inline struct rockchip_panel *rockchip_get_panel(const void *blob, int node)
+{
+	return NULL;
+}
+
+static inline const struct drm_display_mode *
+rockchip_get_display_mode_from_panel(struct display_state *state)
+{
+	return NULL;
+}
+
+static inline int rockchip_panel_init(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline void rockchip_panel_deinit(struct display_state *state)
+{
+	return;
+}
+
+static inline int rockchip_panel_enable(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline int rockchip_panel_disable(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline int rockchip_panel_prepare(struct display_state *state)
+{
+	return -ENODEV;
+}
+
+static inline int rockchip_panel_unprepare(struct display_state *state)
+{
+	return -ENODEV;
+}
+#endif
+
+extern const struct rockchip_panel_funcs panel_simple_funcs;
+extern const struct rockchip_panel_funcs rockchip_dsi_panel_funcs;
+#endif	/* _ROCKCHIP_PANEL_H_ */
diff --git a/drivers/video/drm/rockchip_phy.c b/drivers/video/drm/rockchip_phy.c
new file mode 100644
index 0000000000..dfa8e17bd3
--- /dev/null
+++ b/drivers/video/drm/rockchip_phy.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <linux/list.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_phy.h"
+
+static const struct rockchip_phy g_phy[] = {
+#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+	{
+	 .compatible = "rockchip,rk3366-mipi-dphy",
+	 .funcs = &inno_mipi_dphy_funcs,
+	},
+	{
+	 .compatible = "rockchip,rk3368-mipi-dphy",
+	 .funcs = &inno_mipi_dphy_funcs,
+	},
+#endif
+};
+
+const struct rockchip_phy *rockchip_get_phy(const void *blob, int phy_node)
+{
+	const char *name;
+	int i;
+
+	name = fdt_stringlist_get(blob, phy_node, "compatible", 0, NULL);
+
+	for (i = 0; i < ARRAY_SIZE(g_phy); i++) {
+		if (!strcmp(name, g_phy[i].compatible))
+			break;
+	}
+	if (i >= ARRAY_SIZE(g_phy))
+		return NULL;
+
+	return &g_phy[i];
+}
+
+int rockchip_phy_power_on(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy = conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->power_on) {
+		printf("%s: failed to find phy power on funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->power_on(state);
+}
+
+int rockchip_phy_power_off(struct display_state *state)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy = conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->power_off) {
+		printf("%s: failed to find phy power_off funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->power_off(state);
+}
+
+unsigned long rockchip_phy_set_pll(struct display_state *state,
+				   unsigned long rate)
+{
+	struct connector_state *conn_state = &state->conn_state;
+	const struct rockchip_phy *phy = conn_state->phy;
+
+	if (!phy || !phy->funcs || !phy->funcs->set_pll) {
+		printf("%s: failed to find phy set_pll funcs\n", __func__);
+		return -ENODEV;
+	}
+
+	return phy->funcs->set_pll(state, rate);
+}
diff --git a/drivers/video/drm/rockchip_phy.h b/drivers/video/drm/rockchip_phy.h
new file mode 100644
index 0000000000..62fff2b1ce
--- /dev/null
+++ b/drivers/video/drm/rockchip_phy.h
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PHY_H_
+#define _ROCKCHIP_PHY_H_
+
+struct rockchip_phy_funcs {
+	int (*init)(struct display_state *state);
+	int (*power_on)(struct display_state *state);
+	int (*power_off)(struct display_state *state);
+	unsigned long (*set_pll)(struct display_state *state,
+				 unsigned long rate);
+};
+
+struct rockchip_phy {
+	char compatible[30];
+	const struct rockchip_phy_funcs *funcs;
+	const void *data;
+};
+
+const struct rockchip_phy *
+rockchip_get_phy(const void *blob, int phy_node);
+int rockchip_phy_power_off(struct display_state *state);
+int rockchip_phy_power_on(struct display_state *state);
+unsigned long rockchip_phy_set_pll(struct display_state *state,
+				   unsigned long rate);
+
+#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
+extern const struct rockchip_phy_funcs inno_mipi_dphy_funcs;
+#endif
+#endif
diff --git a/drivers/video/drm/rockchip_vop.c b/drivers/video/drm/rockchip_vop.c
new file mode 100644
index 0000000000..fda346e8e8
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop.c
@@ -0,0 +1,515 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+#include <linux/media-bus-format.h>
+#include <clk.h>
+#include <asm/arch/clock.h>
+#include <linux/err.h>
+
+#include "rockchip_display.h"
+#include "rockchip_crtc.h"
+#include "rockchip_connector.h"
+#include "rockchip_vop.h"
+
+static inline int us_to_vertical_line(struct drm_display_mode *mode, int us)
+{
+	return us * mode->clock / mode->htotal / 1000;
+}
+#if 0
+static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	u32 *lut = conn_state->gamma.lut;
+	int node = crtc_state->node;
+	fdt_size_t lut_size;
+	int i, lut_len;
+	u32 *lut_regs;
+
+	if (!conn_state->gamma.lut)
+		return 0;
+
+	i = fdt_find_string(state->blob, node, "reg-names", "gamma_lut");
+	if (i < 0) {
+		printf("Warning: vop not support gamma\n");
+		return 0;
+	}
+	lut_regs = (u32 *)fdtdec_get_addr_size_auto_noparent(state->blob,
+							     node, "reg",
+							     i, &lut_size);
+	if (lut_regs == (u32 *)FDT_ADDR_T_NONE) {
+		printf("failed to get gamma lut register\n");
+		return 0;
+	}
+	lut_len = lut_size / 4;
+	if (lut_len != 256 && lut_len != 1024) {
+		printf("Warning: unsupport gamma lut table[%d]\n", lut_len);
+		return 0;
+	}
+
+	if (conn_state->gamma.size != lut_len) {
+		int size = conn_state->gamma.size;
+		u32 j, r, g, b, color;
+
+		for (i = 0; i < lut_len; i++) {
+			j = i * size / lut_len;
+			r = lut[j] / size / size * lut_len / size;
+			g = lut[j] / size % size * lut_len / size;
+			b = lut[j] % size * lut_len / size;
+			color = r * lut_len * lut_len + g * lut_len + b;
+
+			writel(color, lut_regs + (i << 2));
+		}
+	} else {
+		for (i = 0; i < lut_len; i++)
+			writel(lut[i], lut_regs + (i << 2));
+	}
+
+	VOP_CTRL_SET(vop, dsp_lut_en, 1);
+	VOP_CTRL_SET(vop, update_gamma_lut, 1);
+
+	return 0;
+}
+#endif
+
+static int rockchip_vop_init(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	const struct rockchip_crtc *crtc = crtc_state->crtc;
+	const struct vop_data *vop_data = crtc->data;
+	struct vop *vop;
+	u16 hsync_len = mode->hsync_end - mode->hsync_start;
+	u16 hdisplay = mode->hdisplay;
+	u16 htotal = mode->htotal;
+	u16 hact_st = mode->htotal - mode->hsync_start;
+	u16 hact_end = hact_st + hdisplay;
+	u16 vdisplay = mode->vdisplay;
+	u16 vtotal = mode->vtotal;
+	u16 vsync_len = mode->vsync_end - mode->vsync_start;
+	u16 vact_st = mode->vtotal - mode->vsync_start;
+	u16 vact_end = vact_st + vdisplay;
+	struct clk aclk, hclk, dclk;
+	u32 val;
+	int i, ret;
+	int rate;
+
+	vop = malloc(sizeof(*vop));
+	if (!vop)
+		return -ENOMEM;
+	memset(vop, 0, sizeof(*vop));
+
+	crtc_state->private = vop;
+	vop->regs = (void *)fdtdec_get_addr_size_auto_noparent(state->blob,
+					crtc_state->node, "reg", 0, NULL, false);
+	vop->regsbak = malloc(vop_data->reg_len);
+	vop->win = vop_data->win;
+	vop->win_offset = vop_data->win_offset;
+	vop->ctrl = vop_data->ctrl;
+	vop->line_flag = vop_data->line_flag;
+	vop->version = vop_data->version;
+
+	ret = clk_get_by_name(crtc_state->dev, "aclk_vop", &aclk);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to get aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+#if 0
+	ret = clk_set_rate(&aclk, 384 * 1000 * 1000);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+#endif
+#if 0
+
+	ret = clk_get_by_name(crtc_state->dev, "hclk_vop", &hclk);
+	if (!ret)
+		ret = clk_set_rate(&hclk, 100 * 1000 * 1000);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+#endif
+
+	ret = clk_get_by_name(crtc_state->dev, "dclk_vop", &dclk);
+	if (!ret)
+		ret = clk_set_rate(&dclk, mode->clock * 1000);
+	if (IS_ERR_VALUE(ret)) {
+		printf("%s: Failed to set aclk: ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+#if 0
+#ifdef CONFIG_RKCHIP_RK3399
+	/* Set Dclk pll parent */
+	if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
+		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 0);
+	else
+		rkclk_lcdc_dclk_pll_sel(crtc_state->crtc_id, 1);
+#endif
+
+	/* Set aclk hclk and dclk */
+	rate = rkclk_lcdc_clk_set(crtc_state->crtc_id, mode->clock * 1000);
+	if (rate != mode->clock * 1000) {
+		printf("Warn: vop clk request %dhz, but real clock is %dhz",
+		       mode->clock * 1000, rate);
+	}
+#endif
+	memcpy(vop->regsbak, vop->regs, vop_data->reg_len);
+
+	//rockchip_vop_init_gamma(vop, state);
+
+	VOP_CTRL_SET(vop, global_regdone_en, 1);
+	VOP_CTRL_SET(vop, win_gate[0], 1);
+	VOP_CTRL_SET(vop, win_gate[1], 1);
+	VOP_CTRL_SET(vop, dsp_blank, 0);
+
+	val = 0x8;
+	val |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1;
+	val |= (mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1);
+	VOP_CTRL_SET(vop, pin_pol, val);
+
+	switch (conn_state->type) {
+	case DRM_MODE_CONNECTOR_LVDS:
+		VOP_CTRL_SET(vop, rgb_en, 1);
+		VOP_CTRL_SET(vop, rgb_pin_pol, val);
+		break;
+	case DRM_MODE_CONNECTOR_eDP:
+		VOP_CTRL_SET(vop, edp_en, 1);
+		VOP_CTRL_SET(vop, edp_pin_pol, val);
+		break;
+	case DRM_MODE_CONNECTOR_HDMIA:
+		VOP_CTRL_SET(vop, hdmi_en, 1);
+		VOP_CTRL_SET(vop, hdmi_pin_pol, val);
+		break;
+	case DRM_MODE_CONNECTOR_DSI:
+		VOP_CTRL_SET(vop, mipi_en, 1);
+		VOP_CTRL_SET(vop, mipi_pin_pol, val);
+		VOP_CTRL_SET(vop, mipi_dual_channel_en,
+			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_CHANNEL));
+		VOP_CTRL_SET(vop, data01_swap,
+			!!(conn_state->output_type & ROCKCHIP_OUTPUT_DSI_DUAL_LINK));
+		break;
+	default:
+		printf("unsupport connector_type[%d]\n", conn_state->type);
+	}
+
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
+	    !(vop_data->feature & VOP_FEATURE_OUTPUT_10BIT))
+		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
+
+	switch (conn_state->bus_format) {
+	case MEDIA_BUS_FMT_RGB565_1X16:
+		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB565);
+		break;
+	case MEDIA_BUS_FMT_RGB666_1X18:
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
+		val = DITHER_DOWN_EN(1) | DITHER_DOWN_MODE(RGB888_TO_RGB666);
+		break;
+	case MEDIA_BUS_FMT_RGB888_1X24:
+	default:
+		val = DITHER_DOWN_EN(0) | PRE_DITHER_DOWN_EN(0);
+		break;
+	}
+	if (conn_state->output_mode == ROCKCHIP_OUT_MODE_AAAA)
+		val |= PRE_DITHER_DOWN_EN(0);
+	else
+		val |= PRE_DITHER_DOWN_EN(1);
+	val |= DITHER_DOWN_MODE_SEL(DITHER_DOWN_ALLEGRO);
+	VOP_CTRL_SET(vop, dither_down, val);
+
+	VOP_CTRL_SET(vop, out_mode, conn_state->output_mode);
+	VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
+	val = hact_st << 16;
+	val |= hact_end;
+	VOP_CTRL_SET(vop, hact_st_end, val);
+	VOP_CTRL_SET(vop, hpost_st_end, val);
+	VOP_CTRL_SET(vop, vtotal_pw, (vtotal << 16) | vsync_len);
+	val = vact_st << 16;
+	val |= vact_end;
+	VOP_CTRL_SET(vop, vact_st_end, val);
+	VOP_CTRL_SET(vop, vpost_st_end, val);
+	VOP_CTRL_SET(vop, standby, 1);
+	VOP_LINE_FLAG_SET(vop, line_flag_num[0], vact_end - 3);
+	VOP_LINE_FLAG_SET(vop, line_flag_num[1],
+			  vact_end - us_to_vertical_line(mode, 1000));
+	vop_cfg_done(vop);
+
+	return 0;
+}
+
+static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src,
+				  uint32_t dst, bool is_horizontal,
+				  int vsu_mode, int *vskiplines)
+{
+	uint16_t val = 1 << SCL_FT_DEFAULT_FIXPOINT_SHIFT;
+
+	if (is_horizontal) {
+		if (mode == SCALE_UP)
+			val = GET_SCL_FT_BIC(src, dst);
+		else if (mode == SCALE_DOWN)
+			val = GET_SCL_FT_BILI_DN(src, dst);
+	} else {
+		if (mode == SCALE_UP) {
+			if (vsu_mode == SCALE_UP_BIL)
+				val = GET_SCL_FT_BILI_UP(src, dst);
+			else
+				val = GET_SCL_FT_BIC(src, dst);
+		} else if (mode == SCALE_DOWN) {
+			if (vskiplines) {
+				*vskiplines = scl_get_vskiplines(src, dst);
+				val = scl_get_bili_dn_vskip(src, dst,
+							    *vskiplines);
+			} else {
+				val = GET_SCL_FT_BILI_DN(src, dst);
+			}
+		}
+	}
+
+	return val;
+}
+
+static void scl_vop_cal_scl_fac(struct vop *vop,
+				uint32_t src_w, uint32_t src_h, uint32_t dst_w,
+				uint32_t dst_h, uint32_t pixel_format)
+{
+	uint16_t yrgb_hor_scl_mode, yrgb_ver_scl_mode;
+	uint16_t cbcr_hor_scl_mode = SCALE_NONE;
+	uint16_t cbcr_ver_scl_mode = SCALE_NONE;
+	int hsub = drm_format_horz_chroma_subsampling(pixel_format);
+	int vsub = drm_format_vert_chroma_subsampling(pixel_format);
+	bool is_yuv = false;
+	uint16_t cbcr_src_w = src_w / hsub;
+	uint16_t cbcr_src_h = src_h / vsub;
+	uint16_t vsu_mode;
+	uint16_t lb_mode;
+	uint32_t val;
+	int vskiplines = 0;
+
+	if (!vop->win->scl)
+		return;
+
+	if (dst_w > 3840) {
+		printf("Maximum destination width (3840) exceeded\n");
+		return;
+	}
+
+	if (!vop->win->scl->ext) {
+		VOP_SCL_SET(vop, scale_yrgb_x,
+			    scl_cal_scale2(src_w, dst_w));
+		VOP_SCL_SET(vop, scale_yrgb_y,
+			    scl_cal_scale2(src_h, dst_h));
+		if (is_yuv) {
+			VOP_SCL_SET(vop, scale_cbcr_x,
+				    scl_cal_scale2(src_w, dst_w));
+			VOP_SCL_SET(vop, scale_cbcr_y,
+				    scl_cal_scale2(src_h, dst_h));
+		}
+		return;
+	}
+
+	yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w);
+	yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h);
+
+	if (is_yuv) {
+		cbcr_hor_scl_mode = scl_get_scl_mode(cbcr_src_w, dst_w);
+		cbcr_ver_scl_mode = scl_get_scl_mode(cbcr_src_h, dst_h);
+		if (cbcr_hor_scl_mode == SCALE_DOWN)
+			lb_mode = scl_vop_cal_lb_mode(dst_w, true);
+		else
+			lb_mode = scl_vop_cal_lb_mode(cbcr_src_w, true);
+	} else {
+		if (yrgb_hor_scl_mode == SCALE_DOWN)
+			lb_mode = scl_vop_cal_lb_mode(dst_w, false);
+		else
+			lb_mode = scl_vop_cal_lb_mode(src_w, false);
+	}
+
+	VOP_SCL_SET_EXT(vop, lb_mode, lb_mode);
+	if (lb_mode == LB_RGB_3840X2) {
+		if (yrgb_ver_scl_mode != SCALE_NONE) {
+			printf("ERROR : not allow yrgb ver scale\n");
+			return;
+		}
+		if (cbcr_ver_scl_mode != SCALE_NONE) {
+			printf("ERROR : not allow cbcr ver scale\n");
+			return;
+		}
+		vsu_mode = SCALE_UP_BIL;
+	} else if (lb_mode == LB_RGB_2560X4) {
+		vsu_mode = SCALE_UP_BIL;
+	} else {
+		vsu_mode = SCALE_UP_BIC;
+	}
+
+	val = scl_vop_cal_scale(yrgb_hor_scl_mode, src_w, dst_w,
+				true, 0, NULL);
+	VOP_SCL_SET(vop, scale_yrgb_x, val);
+	val = scl_vop_cal_scale(yrgb_ver_scl_mode, src_h, dst_h,
+				false, vsu_mode, &vskiplines);
+	VOP_SCL_SET(vop, scale_yrgb_y, val);
+
+	VOP_SCL_SET_EXT(vop, vsd_yrgb_gt4, vskiplines == 4);
+	VOP_SCL_SET_EXT(vop, vsd_yrgb_gt2, vskiplines == 2);
+
+	VOP_SCL_SET_EXT(vop, yrgb_hor_scl_mode, yrgb_hor_scl_mode);
+	VOP_SCL_SET_EXT(vop, yrgb_ver_scl_mode, yrgb_ver_scl_mode);
+	VOP_SCL_SET_EXT(vop, yrgb_hsd_mode, SCALE_DOWN_BIL);
+	VOP_SCL_SET_EXT(vop, yrgb_vsd_mode, SCALE_DOWN_BIL);
+	VOP_SCL_SET_EXT(vop, yrgb_vsu_mode, vsu_mode);
+	if (is_yuv) {
+		val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w,
+					dst_w, true, 0, NULL);
+		VOP_SCL_SET(vop, scale_cbcr_x, val);
+		val = scl_vop_cal_scale(cbcr_ver_scl_mode, cbcr_src_h,
+					dst_h, false, vsu_mode, &vskiplines);
+		VOP_SCL_SET(vop, scale_cbcr_y, val);
+
+		VOP_SCL_SET_EXT(vop, vsd_cbcr_gt4, vskiplines == 4);
+		VOP_SCL_SET_EXT(vop, vsd_cbcr_gt2, vskiplines == 2);
+		VOP_SCL_SET_EXT(vop, cbcr_hor_scl_mode, cbcr_hor_scl_mode);
+		VOP_SCL_SET_EXT(vop, cbcr_ver_scl_mode, cbcr_ver_scl_mode);
+		VOP_SCL_SET_EXT(vop, cbcr_hsd_mode, SCALE_DOWN_BIL);
+		VOP_SCL_SET_EXT(vop, cbcr_vsd_mode, SCALE_DOWN_BIL);
+		VOP_SCL_SET_EXT(vop, cbcr_vsu_mode, vsu_mode);
+	}
+}
+
+static int rockchip_vop_set_plane(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct connector_state *conn_state = &state->conn_state;
+	struct drm_display_mode *mode = &conn_state->mode;
+	u32 act_info, dsp_info, dsp_st, dsp_stx, dsp_sty;
+	struct vop *vop = crtc_state->private;
+	int src_w = crtc_state->src_w;
+	int src_h = crtc_state->src_h;
+	int crtc_x = crtc_state->crtc_x;
+	int crtc_y = crtc_state->crtc_y;
+	int crtc_w = crtc_state->crtc_w;
+	int crtc_h = crtc_state->crtc_h;
+	int xvir = crtc_state->xvir;
+
+	act_info = (src_h - 1) << 16;
+	act_info |= (src_w - 1) & 0xffff;
+
+	dsp_info = (crtc_h - 1) << 16;
+	dsp_info |= (crtc_w - 1) & 0xffff;
+
+	dsp_stx = crtc_x + mode->htotal - mode->hsync_start;
+	dsp_sty = crtc_y + mode->vtotal - mode->vsync_start;
+	dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff);
+
+	if (crtc_state->ymirror)
+		crtc_state->dma_addr += (src_h - 1) * xvir * 4;
+	VOP_WIN_SET(vop, ymirror, crtc_state->ymirror);
+	VOP_WIN_SET(vop, format, crtc_state->format);
+	VOP_WIN_SET(vop, yrgb_vir, xvir);
+	VOP_WIN_SET(vop, yrgb_mst, crtc_state->dma_addr);
+
+	scl_vop_cal_scl_fac(vop, src_w, src_h, crtc_w, crtc_h,
+			    crtc_state->format);
+
+	VOP_WIN_SET(vop, act_info, act_info);
+	VOP_WIN_SET(vop, dsp_info, dsp_info);
+	VOP_WIN_SET(vop, dsp_st, dsp_st);
+	VOP_WIN_SET(vop, rb_swap, crtc_state->rb_swap);
+
+	VOP_WIN_SET(vop, src_alpha_ctl, 0);
+
+	VOP_WIN_SET(vop, enable, 1);
+	vop_cfg_done(vop);
+
+	return 0;
+}
+
+static int rockchip_vop_prepare(struct display_state *state)
+{
+	return 0;
+}
+
+static int rockchip_vop_enable(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct vop *vop = crtc_state->private;
+
+	VOP_CTRL_SET(vop, standby, 0);
+	vop_cfg_done(vop);
+
+	return 0;
+}
+
+static int rockchip_vop_disable(struct display_state *state)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct vop *vop = crtc_state->private;
+
+	VOP_CTRL_SET(vop, standby, 1);
+	vop_cfg_done(vop);
+	return 0;
+}
+
+static int rockchip_vop_fixup_dts(struct display_state *state, void *blob)
+{
+	struct crtc_state *crtc_state = &state->crtc_state;
+	struct panel_state *pstate = &state->panel_state;
+	uint32_t phandle;
+	char path[100];
+	int ret, dsp_lut_node;
+
+	if (!pstate->dsp_lut_node)
+		return 0;
+
+	ret = fdt_get_path(state->blob, pstate->dsp_lut_node, path, sizeof(path));
+	if (ret < 0) {
+		printf("failed to get dsp_lut path[%s], ret=%d\n",
+			path, ret);
+		return ret;
+	}
+
+	dsp_lut_node = fdt_path_offset(blob, path);
+	phandle = fdt_get_phandle(blob, dsp_lut_node);
+	if (!phandle) {
+		phandle = fdt_alloc_phandle(blob);
+		if (!phandle) {
+			printf("failed to alloc phandle\n");
+			return -ENOMEM;
+		}
+
+		fdt_set_phandle(blob, dsp_lut_node, phandle);
+	}
+
+	ret = fdt_get_path(state->blob, crtc_state->node, path, sizeof(path));
+	if (ret < 0) {
+		printf("failed to get route path[%s], ret=%d\n",
+			path, ret);
+		return ret;
+	}
+
+	do_fixup_by_path_u32(blob, path, "dsp-lut", phandle, 1);
+
+	return 0;
+}
+
+const struct rockchip_crtc_funcs rockchip_vop_funcs = {
+	.init = rockchip_vop_init,
+	.set_plane = rockchip_vop_set_plane,
+	.prepare = rockchip_vop_prepare,
+	.enable = rockchip_vop_enable,
+	.disable = rockchip_vop_disable,
+	.fixup_dts = rockchip_vop_fixup_dts,
+};
diff --git a/drivers/video/drm/rockchip_vop.h b/drivers/video/drm/rockchip_vop.h
new file mode 100644
index 0000000000..387632ea75
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop.h
@@ -0,0 +1,427 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_VOP_H_
+#define _ROCKCHIP_VOP_H_
+
+/*
+ * major: IP major vertion, used for IP structure
+ * minor: big feature change under same structure
+ */
+#define VOP_VERSION(major, minor)	((major) << 8 | (minor))
+#define VOP_MAJOR(version) 	((version) >> 8)
+#define VOP_MINOR(version) 	((version) & 0xff)
+
+#define VOP_REG_SUPPORT(vop, reg) \
+		(!reg.major || (reg.major == VOP_MAJOR(vop->version) && \
+		reg.begin_minor <= VOP_MINOR(vop->version) && \
+		reg.end_minor >= VOP_MINOR(vop->version) && \
+		reg.mask))
+
+#define VOP_WIN_SUPPORT(vop, win, name) \
+		VOP_REG_SUPPORT(vop, win->phy->name)
+
+#define VOP_CTRL_SUPPORT(vop, name) \
+		VOP_REG_SUPPORT(vop, vop->ctrl->name)
+
+#define __REG_SET(x, off, mask, shift, v, write_mask) \
+		vop_mask_write(x, off, mask, shift, v, write_mask)
+
+#define _REG_SET(vop, name, off, reg, mask, v) \
+	do { \
+		if (VOP_REG_SUPPORT(vop, reg)) \
+			__REG_SET(vop, off + reg.offset, mask, reg.shift, \
+				  v, reg.write_mask); \
+		else \
+			debug("Warning: not support "#name"\n"); \
+	} while(0)
+
+#define REG_SET(x, name, off, reg, v) \
+		_REG_SET(x, name, off, reg, reg.mask, v)
+#define REG_SET_MASK(x, name, off, reg, mask, v, relaxed) \
+		_REG_SET(x, name, off, reg, reg.mask & mask, v)
+
+#define VOP_WIN_SET(x, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->name, v)
+#define VOP_WIN_SET_EXT(x, ext, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->ext->name, v)
+#define VOP_SCL_SET(x, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->scl->name, v)
+#define VOP_SCL_SET_EXT(x, name, v) \
+		REG_SET(x, name, x->win_offset, x->win->scl->ext->name, v)
+
+#define VOP_CTRL_SET(x, name, v) \
+		REG_SET(x, name, 0, (x)->ctrl->name, v)
+#define VOP_LINE_FLAG_SET(x, name, v) \
+		REG_SET(x, name, 0, (x)->line_flag->name, v)
+
+#define VOP_CTRL_GET(x, name) \
+		vop_read_reg(x, 0, &vop->ctrl->name)
+
+#define VOP_WIN_GET(x, name) \
+		vop_read_reg(x, vop->win->offset, &vop->win->name)
+
+enum alpha_mode {
+	ALPHA_STRAIGHT,
+	ALPHA_INVERSE,
+};
+
+enum global_blend_mode {
+	ALPHA_GLOBAL,
+	ALPHA_PER_PIX,
+	ALPHA_PER_PIX_GLOBAL,
+};
+
+enum alpha_cal_mode {
+	ALPHA_SATURATION,
+	ALPHA_NO_SATURATION,
+};
+
+enum color_mode {
+	ALPHA_SRC_PRE_MUL,
+	ALPHA_SRC_NO_PRE_MUL,
+};
+
+enum factor_mode {
+	ALPHA_ZERO,
+	ALPHA_ONE,
+	ALPHA_SRC,
+	ALPHA_SRC_INVERSE,
+	ALPHA_SRC_GLOBAL,
+};
+
+enum scale_mode {
+	SCALE_NONE = 0x0,
+	SCALE_UP   = 0x1,
+	SCALE_DOWN = 0x2
+};
+
+enum lb_mode {
+	LB_YUV_3840X5 = 0x0,
+	LB_YUV_2560X8 = 0x1,
+	LB_RGB_3840X2 = 0x2,
+	LB_RGB_2560X4 = 0x3,
+	LB_RGB_1920X5 = 0x4,
+	LB_RGB_1280X8 = 0x5
+};
+
+enum sacle_up_mode {
+	SCALE_UP_BIL = 0x0,
+	SCALE_UP_BIC = 0x1
+};
+
+enum scale_down_mode {
+	SCALE_DOWN_BIL = 0x0,
+	SCALE_DOWN_AVG = 0x1
+};
+
+enum dither_down_mode {
+	RGB888_TO_RGB565 = 0x0,
+	RGB888_TO_RGB666 = 0x1
+};
+
+enum dither_down_mode_sel {
+	DITHER_DOWN_ALLEGRO = 0x0,
+	DITHER_DOWN_FRC = 0x1
+};
+
+#define PRE_DITHER_DOWN_EN(x)	((x) << 0)
+#define DITHER_DOWN_EN(x)	((x) << 1)
+#define DITHER_DOWN_MODE(x)	((x) << 2)
+#define DITHER_DOWN_MODE_SEL(x)	((x) << 3)
+
+#define FRAC_16_16(mult, div)    (((mult) << 16) / (div))
+#define SCL_FT_DEFAULT_FIXPOINT_SHIFT	12
+#define SCL_MAX_VSKIPLINES		4
+#define MIN_SCL_FT_AFTER_VSKIP		1
+
+static inline uint16_t scl_cal_scale(int src, int dst, int shift)
+{
+	return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
+}
+
+static inline uint16_t scl_cal_scale2(int src, int dst)
+{
+	return ((src - 1) << 12) / (dst - 1);
+}
+
+#define GET_SCL_FT_BILI_DN(src, dst)	scl_cal_scale(src, dst, 12)
+#define GET_SCL_FT_BILI_UP(src, dst)	scl_cal_scale(src, dst, 16)
+#define GET_SCL_FT_BIC(src, dst)	scl_cal_scale(src, dst, 16)
+
+static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
+					     int vskiplines)
+{
+	int act_height;
+
+	act_height = (src_h + vskiplines - 1) / vskiplines;
+
+	return GET_SCL_FT_BILI_DN(act_height, dst_h);
+}
+
+static inline enum scale_mode scl_get_scl_mode(int src, int dst)
+{
+	if (src < dst)
+		return SCALE_UP;
+	else if (src > dst)
+		return SCALE_DOWN;
+
+	return SCALE_NONE;
+}
+
+static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
+{
+	uint32_t vskiplines;
+
+	for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
+		if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
+			break;
+
+	return vskiplines;
+}
+
+static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
+{
+	int lb_mode;
+
+	if (width > 2560)
+		lb_mode = LB_RGB_3840X2;
+	else if (width > 1920)
+		lb_mode = LB_RGB_2560X4;
+	else if (!is_yuv)
+		lb_mode = LB_RGB_1920X5;
+	else if (width > 1280)
+		lb_mode = LB_YUV_3840X5;
+	else
+		lb_mode = LB_YUV_2560X8;
+
+	return lb_mode;
+}
+
+struct vop_reg_data {
+	uint32_t offset;
+	uint32_t value;
+};
+
+struct vop_reg {
+	uint32_t mask;
+	uint32_t offset:12;
+	uint32_t shift:5;
+	uint32_t begin_minor:4;
+	uint32_t end_minor:4;
+	uint32_t major:3;
+	uint32_t write_mask:1;
+};
+
+struct vop_ctrl {
+	struct vop_reg standby;
+	struct vop_reg htotal_pw;
+	struct vop_reg hact_st_end;
+	struct vop_reg vtotal_pw;
+	struct vop_reg vact_st_end;
+	struct vop_reg vact_st_end_f1;
+	struct vop_reg vs_st_end_f1;
+	struct vop_reg hpost_st_end;
+	struct vop_reg vpost_st_end;
+	struct vop_reg vpost_st_end_f1;
+	struct vop_reg post_scl_factor;
+	struct vop_reg post_scl_ctrl;
+	struct vop_reg dsp_interlace;
+	struct vop_reg global_regdone_en;
+	struct vop_reg auto_gate_en;
+	struct vop_reg post_lb_mode;
+	struct vop_reg dsp_layer_sel;
+	struct vop_reg overlay_mode;
+	struct vop_reg core_dclk_div;
+	struct vop_reg dclk_ddr;
+	struct vop_reg p2i_en;
+	struct vop_reg rgb_en;
+	struct vop_reg edp_en;
+	struct vop_reg hdmi_en;
+	struct vop_reg mipi_en;
+	struct vop_reg data01_swap;
+	struct vop_reg mipi_dual_channel_en;
+	struct vop_reg dp_en;
+	struct vop_reg pin_pol;
+	struct vop_reg rgb_pin_pol;
+	struct vop_reg hdmi_pin_pol;
+	struct vop_reg edp_pin_pol;
+	struct vop_reg mipi_pin_pol;
+	struct vop_reg dp_pin_pol;
+
+	struct vop_reg dither_up;
+	struct vop_reg dither_down;
+
+	struct vop_reg dsp_out_yuv;
+	struct vop_reg dsp_data_swap;
+	struct vop_reg dsp_ccir656_avg;
+	struct vop_reg dsp_black;
+	struct vop_reg dsp_blank;
+	struct vop_reg dsp_outzero;
+	struct vop_reg dsp_lut_en;
+	struct vop_reg update_gamma_lut;
+
+	struct vop_reg out_mode;
+
+	struct vop_reg xmirror;
+	struct vop_reg ymirror;
+	struct vop_reg dsp_background;
+
+	struct vop_reg win_gate[4];
+	struct vop_reg cfg_done;
+};
+
+struct vop_scl_extension {
+	struct vop_reg cbcr_vsd_mode;
+	struct vop_reg cbcr_vsu_mode;
+	struct vop_reg cbcr_hsd_mode;
+	struct vop_reg cbcr_ver_scl_mode;
+	struct vop_reg cbcr_hor_scl_mode;
+	struct vop_reg yrgb_vsd_mode;
+	struct vop_reg yrgb_vsu_mode;
+	struct vop_reg yrgb_hsd_mode;
+	struct vop_reg yrgb_ver_scl_mode;
+	struct vop_reg yrgb_hor_scl_mode;
+	struct vop_reg line_load_mode;
+	struct vop_reg cbcr_axi_gather_num;
+	struct vop_reg yrgb_axi_gather_num;
+	struct vop_reg vsd_cbcr_gt2;
+	struct vop_reg vsd_cbcr_gt4;
+	struct vop_reg vsd_yrgb_gt2;
+	struct vop_reg vsd_yrgb_gt4;
+	struct vop_reg bic_coe_sel;
+	struct vop_reg cbcr_axi_gather_en;
+	struct vop_reg yrgb_axi_gather_en;
+	struct vop_reg lb_mode;
+};
+
+struct vop_scl_regs {
+	const struct vop_scl_extension *ext;
+
+	struct vop_reg scale_yrgb_x;
+	struct vop_reg scale_yrgb_y;
+	struct vop_reg scale_cbcr_x;
+	struct vop_reg scale_cbcr_y;
+};
+
+struct vop_win {
+	const struct vop_scl_regs *scl;
+
+	struct vop_reg enable;
+	struct vop_reg format;
+	struct vop_reg ymirror;
+	struct vop_reg rb_swap;
+	struct vop_reg act_info;
+	struct vop_reg dsp_info;
+	struct vop_reg dsp_st;
+	struct vop_reg yrgb_mst;
+	struct vop_reg uv_mst;
+	struct vop_reg yrgb_vir;
+	struct vop_reg uv_vir;
+	struct vop_reg alpha_mode;
+	struct vop_reg alpha_en;
+
+	struct vop_reg dst_alpha_ctl;
+	struct vop_reg src_alpha_ctl;
+};
+
+struct vop_line_flag {
+	struct vop_reg line_flag_num[2];
+};
+
+#define VOP_FEATURE_OUTPUT_10BIT	BIT(0)
+
+struct vop_data {
+	uint32_t version;
+	const struct vop_ctrl *ctrl;
+	const struct vop_win *win;
+	const struct vop_line_flag *line_flag;
+	int win_offset;
+	int reg_len;
+	u64 feature;
+};
+
+struct vop {
+	u32 *regsbak;
+	void *regs;
+
+	uint32_t version;
+	const struct vop_ctrl *ctrl;
+	const struct vop_win *win;
+	const struct vop_line_flag *line_flag;
+	int win_offset;
+};
+
+static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v)
+{
+	writel(v, vop->regs + offset);
+	vop->regsbak[offset >> 2] = v;
+}
+
+static inline uint32_t vop_readl(struct vop *vop, uint32_t offset)
+{
+	return readl(vop->regs + offset);
+}
+
+static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base,
+				    const struct vop_reg *reg)
+{
+	return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask;
+}
+
+static inline void vop_mask_write(struct vop *vop, uint32_t offset,
+				  uint32_t mask, uint32_t shift, uint32_t v,
+				  bool write_mask)
+{
+	if (!mask)
+		return;
+
+	if (write_mask) {
+		v = ((v & mask) << shift) | (mask << (shift + 16));
+	} else {
+		uint32_t cached_val = vop->regsbak[offset >> 2];
+
+		v = (cached_val & ~(mask << shift)) | ((v & mask) << shift);
+		vop->regsbak[offset >> 2] = v;
+	}
+
+	writel(v, vop->regs + offset);
+}
+
+static inline void vop_cfg_done(struct vop *vop)
+{
+	VOP_CTRL_SET(vop, cfg_done, 1);
+}
+
+/**
+ * drm_format_horz_chroma_subsampling - get the horizontal chroma subsampling factor
+ * @format: pixel format (DRM_FORMAT_*)
+ *
+ * Returns:
+ * The horizontal chroma subsampling factor for the
+ * specified pixel format.
+ */
+static inline int drm_format_horz_chroma_subsampling(uint32_t format)
+{
+	/* uboot only support RGB format */
+	return 1;
+}
+
+/**
+ * drm_format_vert_chroma_subsampling - get the vertical chroma subsampling factor
+ * @format: pixel format (DRM_FORMAT_*)
+ *
+ * Returns:
+ * The vertical chroma subsampling factor for the
+ * specified pixel format.
+ */
+static inline int drm_format_vert_chroma_subsampling(uint32_t format)
+{
+	/* uboot only support RGB format */
+	return 1;
+}
+
+#endif
diff --git a/drivers/video/drm/rockchip_vop_reg.c b/drivers/video/drm/rockchip_vop_reg.c
new file mode 100644
index 0000000000..c8730cf22c
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop_reg.c
@@ -0,0 +1,319 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <fdt_support.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+#include <linux/list.h>
+
+#include "rockchip_vop.h"
+#include "rockchip_vop_reg.h"
+
+#define VOP_REG_VER_MASK(off, _mask, s, _write_mask, _major, \
+		         _begin_minor, _end_minor) \
+		{.offset = off, \
+		 .mask = _mask, \
+		 .shift = s, \
+		 .write_mask = _write_mask, \
+		 .major = _major, \
+		 .begin_minor = _begin_minor, \
+		 .end_minor = _end_minor,}
+
+#define VOP_REG(off, _mask, s) \
+		VOP_REG_VER_MASK(off, _mask, s, false, 0, 0, -1)
+
+#define VOP_REG_MASK(off, _mask, s) \
+		VOP_REG_VER_MASK(off, _mask, s, true, 0, 0, -1)
+
+#define VOP_REG_VER(off, _mask, s, _major, _begin_minor, _end_minor) \
+		VOP_REG_VER_MASK(off, _mask, s, false, \
+				 _major, _begin_minor, _end_minor)
+
+static const struct vop_scl_extension rk3288_win_full_scl_ext = {
+	.cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),
+	.cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),
+	.cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28),
+	.cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26),
+	.cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24),
+	.yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23),
+	.yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22),
+	.yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20),
+	.yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18),
+	.yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16),
+	.line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15),
+	.cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12),
+	.yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8),
+	.vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7),
+	.vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6),
+	.vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5),
+	.vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4),
+	.bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2),
+	.cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1),
+	.yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0),
+	.lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs rk3288_win_full_scl = {
+	.ext = &rk3288_win_full_scl_ext,
+	.scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
+	.scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
+	.scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
+	.scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
+};
+
+static const struct vop_win rk3288_win01_data = {
+	.scl = &rk3288_win_full_scl,
+	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
+	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
+	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
+	.ymirror = VOP_REG_VER(RK3368_WIN0_CTRL0, 0x1, 22, 3, 2, -1),
+	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
+	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
+	.uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
+	.uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
+	.src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xffffffff, 0),
+	.dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xffffffff, 0),
+};
+
+static const struct vop_ctrl rk3288_ctrl_data = {
+	.standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22),
+	.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+	.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+	.vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3288_DSP_VACT_ST_END_F1, 0x1fff1fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3288_DSP_VS_ST_END_F1, 0x1fff1fff, 0),
+	.hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end_f1 = VOP_REG(RK3288_POST_DSP_VACT_INFO_F1, 0x1fff1fff, 0),
+	.post_scl_factor = VOP_REG(RK3288_POST_SCL_FACTOR_YRGB, 0xffffffff, 0),
+	.post_scl_ctrl = VOP_REG(RK3288_POST_SCL_CTRL, 0x3, 0),
+
+	.dsp_interlace = VOP_REG(RK3288_DSP_CTRL0, 0x1, 10),
+	.auto_gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
+	.dsp_layer_sel = VOP_REG(RK3288_DSP_CTRL1, 0xff, 8),
+	.post_lb_mode = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 18, 3, 2, -1),
+	.global_regdone_en = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 11, 3, 2, -1),
+	.overlay_mode = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 16, 3, 2, -1),
+	.core_dclk_div = VOP_REG_VER(RK3399_DSP_CTRL0, 0x1, 4, 3, 4, -1),
+	.p2i_en = VOP_REG_VER(RK3399_DSP_CTRL0, 0x1, 5, 3, 4, -1),
+	.dclk_ddr = VOP_REG_VER(RK3399_DSP_CTRL0, 0x1, 8, 3, 4, -1),
+	.dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
+	.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
+	.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
+	.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
+	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
+	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
+	.data01_swap = VOP_REG_VER(RK3288_SYS_CTRL, 0x1, 17, 3, 5, -1),
+	.pin_pol = VOP_REG_VER(RK3288_DSP_CTRL0, 0xf, 4, 3, 0, 1),
+	.dp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
+	.rgb_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 16, 3, 2, -1),
+	.hdmi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 20, 3, 2, -1),
+	.edp_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 24, 3, 2, -1),
+	.mipi_pin_pol = VOP_REG_VER(RK3368_DSP_CTRL1, 0xf, 28, 3, 2, -1),
+
+	.dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1),
+	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
+
+	.dsp_out_yuv = VOP_REG_VER(RK3399_POST_SCL_CTRL, 0x1, 2, 3, 5, -1),
+	.dsp_data_swap = VOP_REG(RK3288_DSP_CTRL0, 0x1f, 12),
+	.dsp_ccir656_avg = VOP_REG(RK3288_DSP_CTRL0, 0x1, 20),
+	.dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),
+	.dsp_lut_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 0),
+	.update_gamma_lut = VOP_REG_VER(RK3288_DSP_CTRL1, 0x1, 7, 3, 5, -1),
+	.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
+
+	.xmirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 22),
+	.ymirror = VOP_REG(RK3288_DSP_CTRL0, 0x1, 23),
+
+	.dsp_background = VOP_REG(RK3288_DSP_BG, 0xffffffff, 0),
+
+	.cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0),
+	.win_gate[0] = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
+	.win_gate[1] = VOP_REG(RK3288_WIN3_CTRL0, 0x1, 0),
+};
+
+static const struct vop_line_flag rk3288_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
+};
+
+const struct vop_data rk3288_vop = {
+	.version = VOP_VERSION(3, 1),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3288_vop_line_flag,
+	.reg_len = RK3288_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_line_flag rk3368_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
+	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
+};
+
+const struct vop_data rk3368_vop = {
+	.version = VOP_VERSION(3, 2),
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3368_vop_line_flag,
+	.reg_len = RK3368_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_line_flag rk3366_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0),
+	.line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16),
+};
+
+const struct vop_data rk3366_vop = {
+	.version = VOP_VERSION(3, 4),
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3366_DSP_VACT_ST_END_F1 * 4,
+};
+
+const struct vop_data rk3399_vop_big = {
+	.version = VOP_VERSION(3, 5),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
+};
+
+const struct vop_data rk3399_vop_lit = {
+	.version = VOP_VERSION(3, 6),
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
+};
+
+const struct vop_data rk322x_vop = {
+	.version = VOP_VERSION(3, 7),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3288_ctrl_data,
+	.win = &rk3288_win01_data,
+	.line_flag = &rk3366_vop_line_flag,
+	.reg_len = RK3399_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_ctrl rk3328_ctrl_data = {
+	.standby = VOP_REG(RK3328_SYS_CTRL, 0x1, 22),
+	.auto_gate_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 23),
+	.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+	.hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+	.vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0),
+	.vact_st_end_f1 = VOP_REG(RK3328_DSP_VACT_ST_END_F1, 0x1fff1fff, 0),
+	.vs_st_end_f1 = VOP_REG(RK3328_DSP_VS_ST_END_F1, 0x1fff1fff, 0),
+	.hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
+	.vpost_st_end_f1 = VOP_REG(RK3328_POST_DSP_VACT_INFO_F1, 0x1fff1fff, 0),
+	.dsp_interlace = VOP_REG(RK3328_DSP_CTRL0, 0x1, 10),
+	.dsp_layer_sel = VOP_REG(RK3328_DSP_CTRL1, 0xff, 8),
+	.post_lb_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 18),
+	.global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
+	.overlay_mode = VOP_REG(RK3328_SYS_CTRL, 0x1, 16),
+	.core_dclk_div = VOP_REG(RK3328_DSP_CTRL0, 0x1, 4),
+	.p2i_en = VOP_REG(RK3328_DSP_CTRL0, 0x1, 5),
+	.rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
+	.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
+	.edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
+	.mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
+	.rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 16),
+	.hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 20),
+	.edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 24),
+	.mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 28),
+
+	.dither_down = VOP_REG(RK3328_DSP_CTRL1, 0xf, 1),
+	.dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),
+
+	.dsp_data_swap = VOP_REG(RK3328_DSP_CTRL0, 0x1f, 12),
+	.dsp_ccir656_avg = VOP_REG(RK3328_DSP_CTRL0, 0x1, 20),
+	.dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),
+	.dsp_lut_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 0),
+	.out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0),
+
+	.xmirror = VOP_REG(RK3328_DSP_CTRL0, 0x1, 22),
+	.ymirror = VOP_REG(RK3328_DSP_CTRL0, 0x1, 23),
+
+	.dsp_background = VOP_REG(RK3328_DSP_BG, 0xffffffff, 0),
+
+	.cfg_done = VOP_REG(RK3328_REG_CFG_DONE, 0x1, 0),
+};
+
+
+static const struct vop_line_flag rk3328_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0),
+	.line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16),
+};
+
+const struct vop_data rk3328_vop = {
+	.version = VOP_VERSION(3, 8),
+	.feature = VOP_FEATURE_OUTPUT_10BIT,
+	.ctrl = &rk3328_ctrl_data,
+	.win = &rk3288_win01_data,
+	.win_offset = 0xd0,
+	.line_flag = &rk3328_vop_line_flag,
+	.reg_len = RK3328_DSP_VACT_ST_END_F1 * 4,
+};
+
+static const struct vop_scl_regs rk3036_win_scl = {
+	.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
+	.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
+	.scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
+	.scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
+};
+
+static const struct vop_win rk3036_win0_data = {
+	.scl = &rk3036_win_scl,
+	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
+	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
+	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
+	.act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),
+	.dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),
+	.dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),
+	.yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),
+	.uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
+	.yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
+	.uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
+	.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
+	.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0)
+};
+
+static const struct vop_ctrl rk3036_ctrl_data = {
+	.standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30),
+	.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
+	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
+	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
+	.dsp_layer_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 8),
+	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+	.hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
+	.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+	.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
+	.cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0),
+};
+
+static const struct vop_line_flag rk3036_vop_line_flag = {
+	.line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
+};
+
+const struct vop_data rk3036_vop = {
+	.version = VOP_VERSION(2, 2),
+	.ctrl = &rk3036_ctrl_data,
+	.win = &rk3036_win0_data,
+	.line_flag = &rk3036_vop_line_flag,
+	.reg_len = RK3036_DSP_VACT_ST_END_F1 * 4,
+};
diff --git a/drivers/video/drm/rockchip_vop_reg.h b/drivers/video/drm/rockchip_vop_reg.h
new file mode 100644
index 0000000000..ed0c22e21e
--- /dev/null
+++ b/drivers/video/drm/rockchip_vop_reg.h
@@ -0,0 +1,872 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_VOP_REG_H
+#define _ROCKCHIP_VOP_REG_H
+
+/* rk3288 register definition */
+#define RK3288_REG_CFG_DONE			0x0000
+#define RK3288_VERSION_INFO			0x0004
+#define RK3288_SYS_CTRL				0x0008
+#define RK3288_SYS_CTRL1			0x000c
+#define RK3288_DSP_CTRL0			0x0010
+#define RK3288_DSP_CTRL1			0x0014
+#define RK3288_DSP_BG				0x0018
+#define RK3288_MCU_CTRL				0x001c
+#define RK3288_INTR_CTRL0			0x0020
+#define RK3288_INTR_CTRL1			0x0024
+#define RK3288_WIN0_CTRL0			0x0030
+#define RK3288_WIN0_CTRL1			0x0034
+#define RK3288_WIN0_COLOR_KEY			0x0038
+#define RK3288_WIN0_VIR				0x003c
+#define RK3288_WIN0_YRGB_MST			0x0040
+#define RK3288_WIN0_CBR_MST			0x0044
+#define RK3288_WIN0_ACT_INFO			0x0048
+#define RK3288_WIN0_DSP_INFO			0x004c
+#define RK3288_WIN0_DSP_ST			0x0050
+#define RK3288_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3288_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3288_WIN0_SCL_OFFSET			0x005c
+#define RK3288_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3288_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3288_WIN0_FADING_CTRL			0x0068
+
+/* win1 register */
+#define RK3288_WIN1_CTRL0			0x0070
+#define RK3288_WIN1_CTRL1			0x0074
+#define RK3288_WIN1_COLOR_KEY			0x0078
+#define RK3288_WIN1_VIR				0x007c
+#define RK3288_WIN1_YRGB_MST			0x0080
+#define RK3288_WIN1_CBR_MST			0x0084
+#define RK3288_WIN1_ACT_INFO			0x0088
+#define RK3288_WIN1_DSP_INFO			0x008c
+#define RK3288_WIN1_DSP_ST			0x0090
+#define RK3288_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3288_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3288_WIN1_SCL_OFFSET			0x009c
+#define RK3288_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3288_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3288_WIN1_FADING_CTRL			0x00a8
+/* win2 register */
+#define RK3288_WIN2_CTRL0			0x00b0
+#define RK3288_WIN2_CTRL1			0x00b4
+#define RK3288_WIN2_VIR0_1			0x00b8
+#define RK3288_WIN2_VIR2_3			0x00bc
+#define RK3288_WIN2_MST0			0x00c0
+#define RK3288_WIN2_DSP_INFO0			0x00c4
+#define RK3288_WIN2_DSP_ST0			0x00c8
+#define RK3288_WIN2_COLOR_KEY			0x00cc
+#define RK3288_WIN2_MST1			0x00d0
+#define RK3288_WIN2_DSP_INFO1			0x00d4
+#define RK3288_WIN2_DSP_ST1			0x00d8
+#define RK3288_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3288_WIN2_MST2			0x00e0
+#define RK3288_WIN2_DSP_INFO2			0x00e4
+#define RK3288_WIN2_DSP_ST2			0x00e8
+#define RK3288_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3288_WIN2_MST3			0x00f0
+#define RK3288_WIN2_DSP_INFO3			0x00f4
+#define RK3288_WIN2_DSP_ST3			0x00f8
+#define RK3288_WIN2_FADING_CTRL			0x00fc
+/* win3 register */
+#define RK3288_WIN3_CTRL0			0x0100
+#define RK3288_WIN3_CTRL1			0x0104
+#define RK3288_WIN3_VIR0_1			0x0108
+#define RK3288_WIN3_VIR2_3			0x010c
+#define RK3288_WIN3_MST0			0x0110
+#define RK3288_WIN3_DSP_INFO0			0x0114
+#define RK3288_WIN3_DSP_ST0			0x0118
+#define RK3288_WIN3_COLOR_KEY			0x011c
+#define RK3288_WIN3_MST1			0x0120
+#define RK3288_WIN3_DSP_INFO1			0x0124
+#define RK3288_WIN3_DSP_ST1			0x0128
+#define RK3288_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3288_WIN3_MST2			0x0130
+#define RK3288_WIN3_DSP_INFO2			0x0134
+#define RK3288_WIN3_DSP_ST2			0x0138
+#define RK3288_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3288_WIN3_MST3			0x0140
+#define RK3288_WIN3_DSP_INFO3			0x0144
+#define RK3288_WIN3_DSP_ST3			0x0148
+#define RK3288_WIN3_FADING_CTRL			0x014c
+/* hwc register */
+#define RK3288_HWC_CTRL0			0x0150
+#define RK3288_HWC_CTRL1			0x0154
+#define RK3288_HWC_MST				0x0158
+#define RK3288_HWC_DSP_ST			0x015c
+#define RK3288_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3288_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3288_HWC_FADING_CTRL			0x0168
+/* post process register */
+#define RK3288_POST_DSP_HACT_INFO		0x0170
+#define RK3288_POST_DSP_VACT_INFO		0x0174
+#define RK3288_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3288_POST_SCL_CTRL			0x0180
+#define RK3288_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3288_DSP_HTOTAL_HS_END		0x0188
+#define RK3288_DSP_HACT_ST_END			0x018c
+#define RK3288_DSP_VTOTAL_VS_END		0x0190
+#define RK3288_DSP_VACT_ST_END			0x0194
+#define RK3288_DSP_VS_ST_END_F1			0x0198
+#define RK3288_DSP_VACT_ST_END_F1		0x019c
+/* register definition end */
+
+/* rk3368 register definition */
+#define RK3368_REG_CFG_DONE			0x0000
+#define RK3368_VERSION_INFO			0x0004
+#define RK3368_SYS_CTRL				0x0008
+#define RK3368_SYS_CTRL1			0x000c
+#define RK3368_DSP_CTRL0			0x0010
+#define RK3368_DSP_CTRL1			0x0014
+#define RK3368_DSP_BG				0x0018
+#define RK3368_MCU_CTRL				0x001c
+#define RK3368_LINE_FLAG			0x0020
+#define RK3368_INTR_EN				0x0024
+#define RK3368_INTR_CLEAR			0x0028
+#define RK3368_INTR_STATUS			0x002c
+#define RK3368_WIN0_CTRL0			0x0030
+#define RK3368_WIN0_CTRL1			0x0034
+#define RK3368_WIN0_COLOR_KEY			0x0038
+#define RK3368_WIN0_VIR				0x003c
+#define RK3368_WIN0_YRGB_MST			0x0040
+#define RK3368_WIN0_CBR_MST			0x0044
+#define RK3368_WIN0_ACT_INFO			0x0048
+#define RK3368_WIN0_DSP_INFO			0x004c
+#define RK3368_WIN0_DSP_ST			0x0050
+#define RK3368_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3368_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3368_WIN0_SCL_OFFSET			0x005c
+#define RK3368_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3368_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3368_WIN0_FADING_CTRL			0x0068
+#define RK3368_WIN0_CTRL2			0x006c
+#define RK3368_WIN1_CTRL0			0x0070
+#define RK3368_WIN1_CTRL1			0x0074
+#define RK3368_WIN1_COLOR_KEY			0x0078
+#define RK3368_WIN1_VIR				0x007c
+#define RK3368_WIN1_YRGB_MST			0x0080
+#define RK3368_WIN1_CBR_MST			0x0084
+#define RK3368_WIN1_ACT_INFO			0x0088
+#define RK3368_WIN1_DSP_INFO			0x008c
+#define RK3368_WIN1_DSP_ST			0x0090
+#define RK3368_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3368_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3368_WIN1_SCL_OFFSET			0x009c
+#define RK3368_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3368_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3368_WIN1_FADING_CTRL			0x00a8
+#define RK3368_WIN1_CTRL2			0x00ac
+#define RK3368_WIN2_CTRL0			0x00b0
+#define RK3368_WIN2_CTRL1			0x00b4
+#define RK3368_WIN2_VIR0_1			0x00b8
+#define RK3368_WIN2_VIR2_3			0x00bc
+#define RK3368_WIN2_MST0			0x00c0
+#define RK3368_WIN2_DSP_INFO0			0x00c4
+#define RK3368_WIN2_DSP_ST0			0x00c8
+#define RK3368_WIN2_COLOR_KEY			0x00cc
+#define RK3368_WIN2_MST1			0x00d0
+#define RK3368_WIN2_DSP_INFO1			0x00d4
+#define RK3368_WIN2_DSP_ST1			0x00d8
+#define RK3368_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3368_WIN2_MST2			0x00e0
+#define RK3368_WIN2_DSP_INFO2			0x00e4
+#define RK3368_WIN2_DSP_ST2			0x00e8
+#define RK3368_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3368_WIN2_MST3			0x00f0
+#define RK3368_WIN2_DSP_INFO3			0x00f4
+#define RK3368_WIN2_DSP_ST3			0x00f8
+#define RK3368_WIN2_FADING_CTRL			0x00fc
+#define RK3368_WIN3_CTRL0			0x0100
+#define RK3368_WIN3_CTRL1			0x0104
+#define RK3368_WIN3_VIR0_1			0x0108
+#define RK3368_WIN3_VIR2_3			0x010c
+#define RK3368_WIN3_MST0			0x0110
+#define RK3368_WIN3_DSP_INFO0			0x0114
+#define RK3368_WIN3_DSP_ST0			0x0118
+#define RK3368_WIN3_COLOR_KEY			0x011c
+#define RK3368_WIN3_MST1			0x0120
+#define RK3368_WIN3_DSP_INFO1			0x0124
+#define RK3368_WIN3_DSP_ST1			0x0128
+#define RK3368_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3368_WIN3_MST2			0x0130
+#define RK3368_WIN3_DSP_INFO2			0x0134
+#define RK3368_WIN3_DSP_ST2			0x0138
+#define RK3368_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3368_WIN3_MST3			0x0140
+#define RK3368_WIN3_DSP_INFO3			0x0144
+#define RK3368_WIN3_DSP_ST3			0x0148
+#define RK3368_WIN3_FADING_CTRL			0x014c
+#define RK3368_HWC_CTRL0			0x0150
+#define RK3368_HWC_CTRL1			0x0154
+#define RK3368_HWC_MST				0x0158
+#define RK3368_HWC_DSP_ST			0x015c
+#define RK3368_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3368_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3368_HWC_FADING_CTRL			0x0168
+#define RK3368_HWC_RESERVED1			0x016c
+#define RK3368_POST_DSP_HACT_INFO		0x0170
+#define RK3368_POST_DSP_VACT_INFO		0x0174
+#define RK3368_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3368_POST_RESERVED			0x017c
+#define RK3368_POST_SCL_CTRL			0x0180
+#define RK3368_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3368_DSP_HTOTAL_HS_END		0x0188
+#define RK3368_DSP_HACT_ST_END			0x018c
+#define RK3368_DSP_VTOTAL_VS_END		0x0190
+#define RK3368_DSP_VACT_ST_END			0x0194
+#define RK3368_DSP_VS_ST_END_F1			0x0198
+#define RK3368_DSP_VACT_ST_END_F1		0x019c
+#define RK3368_PWM_CTRL				0x01a0
+#define RK3368_PWM_PERIOD_HPR			0x01a4
+#define RK3368_PWM_DUTY_LPR			0x01a8
+#define RK3368_PWM_CNT				0x01ac
+#define RK3368_BCSH_COLOR_BAR			0x01b0
+#define RK3368_BCSH_BCS				0x01b4
+#define RK3368_BCSH_H				0x01b8
+#define RK3368_BCSH_CTRL			0x01bc
+#define RK3368_CABC_CTRL0			0x01c0
+#define RK3368_CABC_CTRL1			0x01c4
+#define RK3368_CABC_CTRL2			0x01c8
+#define RK3368_CABC_CTRL3			0x01cc
+#define RK3368_CABC_GAUSS_LINE0_0		0x01d0
+#define RK3368_CABC_GAUSS_LINE0_1		0x01d4
+#define RK3368_CABC_GAUSS_LINE1_0		0x01d8
+#define RK3368_CABC_GAUSS_LINE1_1		0x01dc
+#define RK3368_CABC_GAUSS_LINE2_0		0x01e0
+#define RK3368_CABC_GAUSS_LINE2_1		0x01e4
+#define RK3368_FRC_LOWER01_0			0x01e8
+#define RK3368_FRC_LOWER01_1			0x01ec
+#define RK3368_FRC_LOWER10_0			0x01f0
+#define RK3368_FRC_LOWER10_1			0x01f4
+#define RK3368_FRC_LOWER11_0			0x01f8
+#define RK3368_FRC_LOWER11_1			0x01fc
+#define RK3368_IFBDC_CTRL			0x0200
+#define RK3368_IFBDC_TILES_NUM			0x0204
+#define RK3368_IFBDC_FRAME_RST_CYCLE		0x0208
+#define RK3368_IFBDC_BASE_ADDR			0x020c
+#define RK3368_IFBDC_MB_SIZE			0x0210
+#define RK3368_IFBDC_CMP_INDEX_INIT		0x0214
+#define RK3368_IFBDC_VIR			0x0220
+#define RK3368_IFBDC_DEBUG0			0x0230
+#define RK3368_IFBDC_DEBUG1			0x0234
+#define RK3368_LATENCY_CTRL0			0x0250
+#define RK3368_RD_MAX_LATENCY_NUM0		0x0254
+#define RK3368_RD_LATENCY_THR_NUM0		0x0258
+#define RK3368_RD_LATENCY_SAMP_NUM0		0x025c
+#define RK3368_WIN0_DSP_BG			0x0260
+#define RK3368_WIN1_DSP_BG			0x0264
+#define RK3368_WIN2_DSP_BG			0x0268
+#define RK3368_WIN3_DSP_BG			0x026c
+#define RK3368_SCAN_LINE_NUM			0x0270
+#define RK3368_CABC_DEBUG0			0x0274
+#define RK3368_CABC_DEBUG1			0x0278
+#define RK3368_CABC_DEBUG2			0x027c
+#define RK3368_DBG_REG_000			0x0280
+#define RK3368_DBG_REG_001			0x0284
+#define RK3368_DBG_REG_002			0x0288
+#define RK3368_DBG_REG_003			0x028c
+#define RK3368_DBG_REG_004			0x0290
+#define RK3368_DBG_REG_005			0x0294
+#define RK3368_DBG_REG_006			0x0298
+#define RK3368_DBG_REG_007			0x029c
+#define RK3368_DBG_REG_008			0x02a0
+#define RK3368_DBG_REG_016			0x02c0
+#define RK3368_DBG_REG_017			0x02c4
+#define RK3368_DBG_REG_018			0x02c8
+#define RK3368_DBG_REG_019			0x02cc
+#define RK3368_DBG_REG_020			0x02d0
+#define RK3368_DBG_REG_021			0x02d4
+#define RK3368_DBG_REG_022			0x02d8
+#define RK3368_DBG_REG_023			0x02dc
+#define RK3368_DBG_REG_028			0x02f0
+#define RK3368_MMU_DTE_ADDR			0x0300
+#define RK3368_MMU_STATUS			0x0304
+#define RK3368_MMU_COMMAND			0x0308
+#define RK3368_MMU_PAGE_FAULT_ADDR		0x030c
+#define RK3368_MMU_ZAP_ONE_LINE			0x0310
+#define RK3368_MMU_INT_RAWSTAT			0x0314
+#define RK3368_MMU_INT_CLEAR			0x0318
+#define RK3368_MMU_INT_MASK			0x031c
+#define RK3368_MMU_INT_STATUS			0x0320
+#define RK3368_MMU_AUTO_GATING			0x0324
+#define RK3368_WIN2_LUT_ADDR			0x0400
+#define RK3368_WIN3_LUT_ADDR			0x0800
+#define RK3368_HWC_LUT_ADDR			0x0c00
+#define RK3368_GAMMA_LUT_ADDR			0x1000
+#define RK3368_CABC_GAMMA_LUT_ADDR		0x1800
+#define RK3368_MCU_BYPASS_WPORT			0x2200
+#define RK3368_MCU_BYPASS_RPORT			0x2300
+/* rk3368 register definition end */
+
+#define RK3366_REG_CFG_DONE			0x0000
+#define RK3366_VERSION_INFO			0x0004
+#define RK3366_SYS_CTRL				0x0008
+#define RK3366_SYS_CTRL1			0x000c
+#define RK3366_DSP_CTRL0			0x0010
+#define RK3366_DSP_CTRL1			0x0014
+#define RK3366_DSP_BG				0x0018
+#define RK3366_MCU_CTRL				0x001c
+#define RK3366_WB_CTRL0				0x0020
+#define RK3366_WB_CTRL1				0x0024
+#define RK3366_WB_YRGB_MST			0x0028
+#define RK3366_WB_CBR_MST			0x002c
+#define RK3366_WIN0_CTRL0			0x0030
+#define RK3366_WIN0_CTRL1			0x0034
+#define RK3366_WIN0_COLOR_KEY			0x0038
+#define RK3366_WIN0_VIR				0x003c
+#define RK3366_WIN0_YRGB_MST			0x0040
+#define RK3366_WIN0_CBR_MST			0x0044
+#define RK3366_WIN0_ACT_INFO			0x0048
+#define RK3366_WIN0_DSP_INFO			0x004c
+#define RK3366_WIN0_DSP_ST			0x0050
+#define RK3366_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3366_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3366_WIN0_SCL_OFFSET			0x005c
+#define RK3366_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3366_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3366_WIN0_FADING_CTRL			0x0068
+#define RK3366_WIN0_CTRL2			0x006c
+#define RK3366_WIN1_CTRL0			0x0070
+#define RK3366_WIN1_CTRL1			0x0074
+#define RK3366_WIN1_COLOR_KEY			0x0078
+#define RK3366_WIN1_VIR				0x007c
+#define RK3366_WIN1_YRGB_MST			0x0080
+#define RK3366_WIN1_CBR_MST			0x0084
+#define RK3366_WIN1_ACT_INFO			0x0088
+#define RK3366_WIN1_DSP_INFO			0x008c
+#define RK3366_WIN1_DSP_ST			0x0090
+#define RK3366_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3366_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3366_WIN1_SCL_OFFSET			0x009c
+#define RK3366_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3366_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3366_WIN1_FADING_CTRL			0x00a8
+#define RK3366_WIN1_CTRL2			0x00ac
+#define RK3366_WIN2_CTRL0			0x00b0
+#define RK3366_WIN2_CTRL1			0x00b4
+#define RK3366_WIN2_VIR0_1			0x00b8
+#define RK3366_WIN2_VIR2_3			0x00bc
+#define RK3366_WIN2_MST0			0x00c0
+#define RK3366_WIN2_DSP_INFO0			0x00c4
+#define RK3366_WIN2_DSP_ST0			0x00c8
+#define RK3366_WIN2_COLOR_KEY			0x00cc
+#define RK3366_WIN2_MST1			0x00d0
+#define RK3366_WIN2_DSP_INFO1			0x00d4
+#define RK3366_WIN2_DSP_ST1			0x00d8
+#define RK3366_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3366_WIN2_MST2			0x00e0
+#define RK3366_WIN2_DSP_INFO2			0x00e4
+#define RK3366_WIN2_DSP_ST2			0x00e8
+#define RK3366_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3366_WIN2_MST3			0x00f0
+#define RK3366_WIN2_DSP_INFO3			0x00f4
+#define RK3366_WIN2_DSP_ST3			0x00f8
+#define RK3366_WIN2_FADING_CTRL			0x00fc
+#define RK3366_WIN3_CTRL0			0x0100
+#define RK3366_WIN3_CTRL1			0x0104
+#define RK3366_WIN3_VIR0_1			0x0108
+#define RK3366_WIN3_VIR2_3			0x010c
+#define RK3366_WIN3_MST0			0x0110
+#define RK3366_WIN3_DSP_INFO0			0x0114
+#define RK3366_WIN3_DSP_ST0			0x0118
+#define RK3366_WIN3_COLOR_KEY			0x011c
+#define RK3366_WIN3_MST1			0x0120
+#define RK3366_WIN3_DSP_INFO1			0x0124
+#define RK3366_WIN3_DSP_ST1			0x0128
+#define RK3366_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3366_WIN3_MST2			0x0130
+#define RK3366_WIN3_DSP_INFO2			0x0134
+#define RK3366_WIN3_DSP_ST2			0x0138
+#define RK3366_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3366_WIN3_MST3			0x0140
+#define RK3366_WIN3_DSP_INFO3			0x0144
+#define RK3366_WIN3_DSP_ST3			0x0148
+#define RK3366_WIN3_FADING_CTRL			0x014c
+#define RK3366_HWC_CTRL0			0x0150
+#define RK3366_HWC_CTRL1			0x0154
+#define RK3366_HWC_MST				0x0158
+#define RK3366_HWC_DSP_ST			0x015c
+#define RK3366_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3366_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3366_HWC_FADING_CTRL			0x0168
+#define RK3366_HWC_RESERVED1			0x016c
+#define RK3366_POST_DSP_HACT_INFO		0x0170
+#define RK3366_POST_DSP_VACT_INFO		0x0174
+#define RK3366_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3366_POST_RESERVED			0x017c
+#define RK3366_POST_SCL_CTRL			0x0180
+#define RK3366_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3366_DSP_HTOTAL_HS_END		0x0188
+#define RK3366_DSP_HACT_ST_END			0x018c
+#define RK3366_DSP_VTOTAL_VS_END		0x0190
+#define RK3366_DSP_VACT_ST_END			0x0194
+#define RK3366_DSP_VS_ST_END_F1			0x0198
+#define RK3366_DSP_VACT_ST_END_F1		0x019c
+#define RK3366_PWM_CTRL				0x01a0
+#define RK3366_PWM_PERIOD_HPR			0x01a4
+#define RK3366_PWM_DUTY_LPR			0x01a8
+#define RK3366_PWM_CNT				0x01ac
+#define RK3366_BCSH_COLOR_BAR			0x01b0
+#define RK3366_BCSH_BCS				0x01b4
+#define RK3366_BCSH_H				0x01b8
+#define RK3366_BCSH_CTRL			0x01bc
+#define RK3366_CABC_CTRL0			0x01c0
+#define RK3366_CABC_CTRL1			0x01c4
+#define RK3366_CABC_CTRL2			0x01c8
+#define RK3366_CABC_CTRL3			0x01cc
+#define RK3366_CABC_GAUSS_LINE0_0		0x01d0
+#define RK3366_CABC_GAUSS_LINE0_1		0x01d4
+#define RK3366_CABC_GAUSS_LINE1_0		0x01d8
+#define RK3366_CABC_GAUSS_LINE1_1		0x01dc
+#define RK3366_CABC_GAUSS_LINE2_0		0x01e0
+#define RK3366_CABC_GAUSS_LINE2_1		0x01e4
+#define RK3366_FRC_LOWER01_0			0x01e8
+#define RK3366_FRC_LOWER01_1			0x01ec
+#define RK3366_FRC_LOWER10_0			0x01f0
+#define RK3366_FRC_LOWER10_1			0x01f4
+#define RK3366_FRC_LOWER11_0			0x01f8
+#define RK3366_FRC_LOWER11_1			0x01fc
+#define RK3366_INTR_EN0				0x0280
+#define RK3366_INTR_CLEAR0			0x0284
+#define RK3366_INTR_STATUS0			0x0288
+#define RK3366_INTR_RAW_STATUS0			0x028c
+#define RK3366_INTR_EN1				0x0290
+#define RK3366_INTR_CLEAR1			0x0294
+#define RK3366_INTR_STATUS1			0x0298
+#define RK3366_INTR_RAW_STATUS1			0x029c
+#define RK3366_LINE_FLAG			0x02a0
+#define RK3366_VOP_STATUS			0x02a4
+#define RK3366_BLANKING_VALUE			0x02a8
+#define RK3366_WIN0_DSP_BG			0x02b0
+#define RK3366_WIN1_DSP_BG			0x02b4
+#define RK3366_WIN2_DSP_BG			0x02b8
+#define RK3366_WIN3_DSP_BG			0x02bc
+#define RK3366_WIN2_LUT_ADDR			0x0400
+#define RK3366_WIN3_LUT_ADDR			0x0800
+#define RK3366_HWC_LUT_ADDR			0x0c00
+#define RK3366_GAMMA0_LUT_ADDR			0x1000
+#define RK3366_GAMMA1_LUT_ADDR			0x1400
+#define RK3366_CABC_GAMMA_LUT_ADDR		0x1800
+#define RK3366_MCU_BYPASS_WPORT			0x2200
+#define RK3366_MCU_BYPASS_RPORT			0x2300
+#define RK3366_MMU_DTE_ADDR			0x2400
+#define RK3366_MMU_STATUS			0x2404
+#define RK3366_MMU_COMMAND			0x2408
+#define RK3366_MMU_PAGE_FAULT_ADDR		0x240c
+#define RK3366_MMU_ZAP_ONE_LINE 		0x2410
+#define RK3366_MMU_INT_RAWSTAT			0x2414
+#define RK3366_MMU_INT_CLEAR			0x2418
+#define RK3366_MMU_INT_MASK			0x241c
+#define RK3366_MMU_INT_STATUS			0x2420
+#define RK3366_MMU_AUTO_GATING			0x2424
+
+/* rk3399 register definition */
+#define RK3399_REG_CFG_DONE			0x0000
+#define RK3399_VERSION_INFO			0x0004
+#define RK3399_SYS_CTRL				0x0008
+#define RK3399_SYS_CTRL1			0x000c
+#define RK3399_DSP_CTRL0			0x0010
+#define RK3399_DSP_CTRL1			0x0014
+#define RK3399_DSP_BG				0x0018
+#define RK3399_MCU_CTRL				0x001c
+#define RK3399_WB_CTRL0				0x0020
+#define RK3399_WB_CTRL1				0x0024
+#define RK3399_WB_YRGB_MST			0x0028
+#define RK3399_WB_CBR_MST			0x002c
+#define RK3399_WIN0_CTRL0			0x0030
+#define RK3399_WIN0_CTRL1			0x0034
+#define RK3399_WIN0_COLOR_KEY			0x0038
+#define RK3399_WIN0_VIR				0x003c
+#define RK3399_WIN0_YRGB_MST			0x0040
+#define RK3399_WIN0_CBR_MST			0x0044
+#define RK3399_WIN0_ACT_INFO			0x0048
+#define RK3399_WIN0_DSP_INFO			0x004c
+#define RK3399_WIN0_DSP_ST			0x0050
+#define RK3399_WIN0_SCL_FACTOR_YRGB		0x0054
+#define RK3399_WIN0_SCL_FACTOR_CBR		0x0058
+#define RK3399_WIN0_SCL_OFFSET			0x005c
+#define RK3399_WIN0_SRC_ALPHA_CTRL		0x0060
+#define RK3399_WIN0_DST_ALPHA_CTRL		0x0064
+#define RK3399_WIN0_FADING_CTRL			0x0068
+#define RK3399_WIN0_CTRL2			0x006c
+#define RK3399_WIN1_CTRL0			0x0070
+#define RK3399_WIN1_CTRL1			0x0074
+#define RK3399_WIN1_COLOR_KEY			0x0078
+#define RK3399_WIN1_VIR				0x007c
+#define RK3399_WIN1_YRGB_MST			0x0080
+#define RK3399_WIN1_CBR_MST			0x0084
+#define RK3399_WIN1_ACT_INFO			0x0088
+#define RK3399_WIN1_DSP_INFO			0x008c
+#define RK3399_WIN1_DSP_ST			0x0090
+#define RK3399_WIN1_SCL_FACTOR_YRGB		0x0094
+#define RK3399_WIN1_SCL_FACTOR_CBR		0x0098
+#define RK3399_WIN1_SCL_OFFSET			0x009c
+#define RK3399_WIN1_SRC_ALPHA_CTRL		0x00a0
+#define RK3399_WIN1_DST_ALPHA_CTRL		0x00a4
+#define RK3399_WIN1_FADING_CTRL			0x00a8
+#define RK3399_WIN1_CTRL2			0x00ac
+#define RK3399_WIN2_CTRL0			0x00b0
+#define RK3399_WIN2_CTRL1			0x00b4
+#define RK3399_WIN2_VIR0_1			0x00b8
+#define RK3399_WIN2_VIR2_3			0x00bc
+#define RK3399_WIN2_MST0			0x00c0
+#define RK3399_WIN2_DSP_INFO0			0x00c4
+#define RK3399_WIN2_DSP_ST0			0x00c8
+#define RK3399_WIN2_COLOR_KEY			0x00cc
+#define RK3399_WIN2_MST1			0x00d0
+#define RK3399_WIN2_DSP_INFO1			0x00d4
+#define RK3399_WIN2_DSP_ST1			0x00d8
+#define RK3399_WIN2_SRC_ALPHA_CTRL		0x00dc
+#define RK3399_WIN2_MST2			0x00e0
+#define RK3399_WIN2_DSP_INFO2			0x00e4
+#define RK3399_WIN2_DSP_ST2			0x00e8
+#define RK3399_WIN2_DST_ALPHA_CTRL		0x00ec
+#define RK3399_WIN2_MST3			0x00f0
+#define RK3399_WIN2_DSP_INFO3			0x00f4
+#define RK3399_WIN2_DSP_ST3			0x00f8
+#define RK3399_WIN2_FADING_CTRL			0x00fc
+#define RK3399_WIN3_CTRL0			0x0100
+#define RK3399_WIN3_CTRL1			0x0104
+#define RK3399_WIN3_VIR0_1			0x0108
+#define RK3399_WIN3_VIR2_3			0x010c
+#define RK3399_WIN3_MST0			0x0110
+#define RK3399_WIN3_DSP_INFO0			0x0114
+#define RK3399_WIN3_DSP_ST0			0x0118
+#define RK3399_WIN3_COLOR_KEY			0x011c
+#define RK3399_WIN3_MST1			0x0120
+#define RK3399_WIN3_DSP_INFO1			0x0124
+#define RK3399_WIN3_DSP_ST1			0x0128
+#define RK3399_WIN3_SRC_ALPHA_CTRL		0x012c
+#define RK3399_WIN3_MST2			0x0130
+#define RK3399_WIN3_DSP_INFO2			0x0134
+#define RK3399_WIN3_DSP_ST2			0x0138
+#define RK3399_WIN3_DST_ALPHA_CTRL		0x013c
+#define RK3399_WIN3_MST3			0x0140
+#define RK3399_WIN3_DSP_INFO3			0x0144
+#define RK3399_WIN3_DSP_ST3			0x0148
+#define RK3399_WIN3_FADING_CTRL			0x014c
+#define RK3399_HWC_CTRL0			0x0150
+#define RK3399_HWC_CTRL1			0x0154
+#define RK3399_HWC_MST				0x0158
+#define RK3399_HWC_DSP_ST			0x015c
+#define RK3399_HWC_SRC_ALPHA_CTRL		0x0160
+#define RK3399_HWC_DST_ALPHA_CTRL		0x0164
+#define RK3399_HWC_FADING_CTRL			0x0168
+#define RK3399_HWC_RESERVED1			0x016c
+#define RK3399_POST_DSP_HACT_INFO		0x0170
+#define RK3399_POST_DSP_VACT_INFO		0x0174
+#define RK3399_POST_SCL_FACTOR_YRGB		0x0178
+#define RK3399_POST_RESERVED			0x017c
+#define RK3399_POST_SCL_CTRL			0x0180
+#define RK3399_POST_DSP_VACT_INFO_F1		0x0184
+#define RK3399_DSP_HTOTAL_HS_END		0x0188
+#define RK3399_DSP_HACT_ST_END			0x018c
+#define RK3399_DSP_VTOTAL_VS_END		0x0190
+#define RK3399_DSP_VACT_ST_END			0x0194
+#define RK3399_DSP_VS_ST_END_F1			0x0198
+#define RK3399_DSP_VACT_ST_END_F1		0x019c
+#define RK3399_PWM_CTRL				0x01a0
+#define RK3399_PWM_PERIOD_HPR			0x01a4
+#define RK3399_PWM_DUTY_LPR			0x01a8
+#define RK3399_PWM_CNT				0x01ac
+#define RK3399_BCSH_COLOR_BAR			0x01b0
+#define RK3399_BCSH_BCS				0x01b4
+#define RK3399_BCSH_H				0x01b8
+#define RK3399_BCSH_CTRL			0x01bc
+#define RK3399_CABC_CTRL0			0x01c0
+#define RK3399_CABC_CTRL1			0x01c4
+#define RK3399_CABC_CTRL2			0x01c8
+#define RK3399_CABC_CTRL3			0x01cc
+#define RK3399_CABC_GAUSS_LINE0_0		0x01d0
+#define RK3399_CABC_GAUSS_LINE0_1		0x01d4
+#define RK3399_CABC_GAUSS_LINE1_0		0x01d8
+#define RK3399_CABC_GAUSS_LINE1_1		0x01dc
+#define RK3399_CABC_GAUSS_LINE2_0		0x01e0
+#define RK3399_CABC_GAUSS_LINE2_1		0x01e4
+#define RK3399_FRC_LOWER01_0			0x01e8
+#define RK3399_FRC_LOWER01_1			0x01ec
+#define RK3399_FRC_LOWER10_0			0x01f0
+#define RK3399_FRC_LOWER10_1			0x01f4
+#define RK3399_FRC_LOWER11_0			0x01f8
+#define RK3399_FRC_LOWER11_1			0x01fc
+#define RK3399_AFBCD0_CTRL			0x0200
+#define RK3399_AFBCD0_HDR_PTR			0x0204
+#define RK3399_AFBCD0_PIC_SIZE			0x0208
+#define RK3399_AFBCD0_STATUS			0x020c
+#define RK3399_AFBCD1_CTRL			0x0220
+#define RK3399_AFBCD1_HDR_PTR			0x0224
+#define RK3399_AFBCD1_PIC_SIZE			0x0228
+#define RK3399_AFBCD1_STATUS			0x022c
+#define RK3399_AFBCD2_CTRL			0x0240
+#define RK3399_AFBCD2_HDR_PTR			0x0244
+#define RK3399_AFBCD2_PIC_SIZE			0x0248
+#define RK3399_AFBCD2_STATUS			0x024c
+#define RK3399_AFBCD3_CTRL			0x0260
+#define RK3399_AFBCD3_HDR_PTR			0x0264
+#define RK3399_AFBCD3_PIC_SIZE			0x0268
+#define RK3399_AFBCD3_STATUS			0x026c
+#define RK3399_INTR_EN0				0x0280
+#define RK3399_INTR_CLEAR0			0x0284
+#define RK3399_INTR_STATUS0			0x0288
+#define RK3399_INTR_RAW_STATUS0			0x028c
+#define RK3399_INTR_EN1				0x0290
+#define RK3399_INTR_CLEAR1			0x0294
+#define RK3399_INTR_STATUS1			0x0298
+#define RK3399_INTR_RAW_STATUS1			0x029c
+#define RK3399_LINE_FLAG			0x02a0
+#define RK3399_VOP_STATUS			0x02a4
+#define RK3399_BLANKING_VALUE			0x02a8
+#define RK3399_MCU_BYPASS_PORT			0x02ac
+#define RK3399_WIN0_DSP_BG			0x02b0
+#define RK3399_WIN1_DSP_BG			0x02b4
+#define RK3399_WIN2_DSP_BG			0x02b8
+#define RK3399_WIN3_DSP_BG			0x02bc
+#define RK3399_YUV2YUV_WIN			0x02c0
+#define RK3399_YUV2YUV_POST			0x02c4
+#define RK3399_AUTO_GATING_EN			0x02cc
+#define RK3399_WIN0_CSC_COE			0x03a0
+#define RK3399_WIN1_CSC_COE			0x03c0
+#define RK3399_WIN2_CSC_COE			0x03e0
+#define RK3399_WIN3_CSC_COE			0x0400
+#define RK3399_HWC_CSC_COE			0x0420
+#define RK3399_BCSH_R2Y_CSC_COE			0x0440
+#define RK3399_BCSH_Y2R_CSC_COE			0x0460
+#define RK3399_POST_YUV2YUV_Y2R_COE		0x0480
+#define RK3399_POST_YUV2YUV_3X3_COE		0x04a0
+#define RK3399_POST_YUV2YUV_R2Y_COE		0x04c0
+#define RK3399_WIN0_YUV2YUV_Y2R			0x04e0
+#define RK3399_WIN0_YUV2YUV_3X3			0x0500
+#define RK3399_WIN0_YUV2YUV_R2Y			0x0520
+#define RK3399_WIN1_YUV2YUV_Y2R			0x0540
+#define RK3399_WIN1_YUV2YUV_3X3			0x0560
+#define RK3399_WIN1_YUV2YUV_R2Y			0x0580
+#define RK3399_WIN2_YUV2YUV_Y2R			0x05a0
+#define RK3399_WIN2_YUV2YUV_3X3			0x05c0
+#define RK3399_WIN2_YUV2YUV_R2Y			0x05e0
+#define RK3399_WIN3_YUV2YUV_Y2R			0x0600
+#define RK3399_WIN3_YUV2YUV_3X3			0x0620
+#define RK3399_WIN3_YUV2YUV_R2Y			0x0640
+#define RK3399_WIN2_LUT_ADDR			0x1000
+#define RK3399_WIN3_LUT_ADDR			0x1400
+#define RK3399_HWC_LUT_ADDR			0x1800
+#define RK3399_CABC_GAMMA_LUT_ADDR		0x1c00
+#define RK3399_GAMMA_LUT_ADDR			0x2000
+/* rk3399 register definition end */
+
+/* rk3328 register definition end */
+#define RK3328_REG_CFG_DONE			0x00000000
+#define RK3328_VERSION_INFO			0x00000004
+#define RK3328_SYS_CTRL				0x00000008
+#define RK3328_SYS_CTRL1			0x0000000c
+#define RK3328_DSP_CTRL0			0x00000010
+#define RK3328_DSP_CTRL1			0x00000014
+#define RK3328_DSP_BG				0x00000018
+#define RK3328_AUTO_GATING_EN			0x0000003c
+#define RK3328_LINE_FLAG			0x00000040
+#define RK3328_VOP_STATUS			0x00000044
+#define RK3328_BLANKING_VALUE			0x00000048
+#define RK3328_WIN0_DSP_BG			0x00000050
+#define RK3328_WIN1_DSP_BG			0x00000054
+#define RK3328_DBG_PERF_LATENCY_CTRL0		0x000000c0
+#define RK3328_DBG_PERF_RD_MAX_LATENCY_NUM0	0x000000c4
+#define RK3328_DBG_PERF_RD_LATENCY_THR_NUM0	0x000000c8
+#define RK3328_DBG_PERF_RD_LATENCY_SAMP_NUM0	0x000000cc
+#define RK3328_INTR_EN0				0x000000e0
+#define RK3328_INTR_CLEAR0			0x000000e4
+#define RK3328_INTR_STATUS0			0x000000e8
+#define RK3328_INTR_RAW_STATUS0			0x000000ec
+#define RK3328_INTR_EN1				0x000000f0
+#define RK3328_INTR_CLEAR1			0x000000f4
+#define RK3328_INTR_STATUS1			0x000000f8
+#define RK3328_INTR_RAW_STATUS1			0x000000fc
+#define RK3328_WIN0_CTRL0			0x00000100
+#define RK3328_WIN0_CTRL1			0x00000104
+#define RK3328_WIN0_COLOR_KEY			0x00000108
+#define RK3328_WIN0_VIR				0x0000010c
+#define RK3328_WIN0_YRGB_MST			0x00000110
+#define RK3328_WIN0_CBR_MST			0x00000114
+#define RK3328_WIN0_ACT_INFO			0x00000118
+#define RK3328_WIN0_DSP_INFO			0x0000011c
+#define RK3328_WIN0_DSP_ST			0x00000120
+#define RK3328_WIN0_SCL_FACTOR_YRGB		0x00000124
+#define RK3328_WIN0_SCL_FACTOR_CBR		0x00000128
+#define RK3328_WIN0_SCL_OFFSET			0x0000012c
+#define RK3328_WIN0_SRC_ALPHA_CTRL		0x00000130
+#define RK3328_WIN0_DST_ALPHA_CTRL		0x00000134
+#define RK3328_WIN0_FADING_CTRL			0x00000138
+#define RK3328_WIN0_CTRL2			0x0000013c
+#define RK3328_DBG_WIN0_REG0			0x000001f0
+#define RK3328_DBG_WIN0_REG1			0x000001f4
+#define RK3328_DBG_WIN0_REG2			0x000001f8
+#define RK3328_DBG_WIN0_RESERVED		0x000001fc
+#define RK3328_WIN1_CTRL0			0x00000200
+#define RK3328_WIN1_CTRL1			0x00000204
+#define RK3328_WIN1_COLOR_KEY			0x00000208
+#define RK3328_WIN1_VIR				0x0000020c
+#define RK3328_WIN1_YRGB_MST			0x00000210
+#define RK3328_WIN1_CBR_MST			0x00000214
+#define RK3328_WIN1_ACT_INFO			0x00000218
+#define RK3328_WIN1_DSP_INFO			0x0000021c
+#define RK3328_WIN1_DSP_ST			0x00000220
+#define RK3328_WIN1_SCL_FACTOR_YRGB		0x00000224
+#define RK3328_WIN1_SCL_FACTOR_CBR		0x00000228
+#define RK3328_WIN1_SCL_OFFSET			0x0000022c
+#define RK3328_WIN1_SRC_ALPHA_CTRL		0x00000230
+#define RK3328_WIN1_DST_ALPHA_CTRL		0x00000234
+#define RK3328_WIN1_FADING_CTRL			0x00000238
+#define RK3328_WIN1_CTRL2			0x0000023c
+#define RK3328_DBG_WIN1_REG0			0x000002f0
+#define RK3328_DBG_WIN1_REG1			0x000002f4
+#define RK3328_DBG_WIN1_REG2			0x000002f8
+#define RK3328_DBG_WIN1_RESERVED		0x000002fc
+#define RK3328_WIN2_CTRL0			0x00000300
+#define RK3328_WIN2_CTRL1			0x00000304
+#define RK3328_WIN2_COLOR_KEY			0x00000308
+#define RK3328_WIN2_VIR				0x0000030c
+#define RK3328_WIN2_YRGB_MST			0x00000310
+#define RK3328_WIN2_CBR_MST			0x00000314
+#define RK3328_WIN2_ACT_INFO			0x00000318
+#define RK3328_WIN2_DSP_INFO			0x0000031c
+#define RK3328_WIN2_DSP_ST			0x00000320
+#define RK3328_WIN2_SCL_FACTOR_YRGB		0x00000324
+#define RK3328_WIN2_SCL_FACTOR_CBR		0x00000328
+#define RK3328_WIN2_SCL_OFFSET			0x0000032c
+#define RK3328_WIN2_SRC_ALPHA_CTRL		0x00000330
+#define RK3328_WIN2_DST_ALPHA_CTRL		0x00000334
+#define RK3328_WIN2_FADING_CTRL			0x00000338
+#define RK3328_WIN2_CTRL2			0x0000033c
+#define RK3328_DBG_WIN2_REG0			0x000003f0
+#define RK3328_DBG_WIN2_REG1			0x000003f4
+#define RK3328_DBG_WIN2_REG2			0x000003f8
+#define RK3328_DBG_WIN2_RESERVED		0x000003fc
+#define RK3328_WIN3_CTRL0			0x00000400
+#define RK3328_WIN3_CTRL1			0x00000404
+#define RK3328_WIN3_COLOR_KEY			0x00000408
+#define RK3328_WIN3_VIR				0x0000040c
+#define RK3328_WIN3_YRGB_MST			0x00000410
+#define RK3328_WIN3_CBR_MST			0x00000414
+#define RK3328_WIN3_ACT_INFO			0x00000418
+#define RK3328_WIN3_DSP_INFO			0x0000041c
+#define RK3328_WIN3_DSP_ST			0x00000420
+#define RK3328_WIN3_SCL_FACTOR_YRGB		0x00000424
+#define RK3328_WIN3_SCL_FACTOR_CBR		0x00000428
+#define RK3328_WIN3_SCL_OFFSET			0x0000042c
+#define RK3328_WIN3_SRC_ALPHA_CTRL		0x00000430
+#define RK3328_WIN3_DST_ALPHA_CTRL		0x00000434
+#define RK3328_WIN3_FADING_CTRL			0x00000438
+#define RK3328_WIN3_CTRL2			0x0000043c
+#define RK3328_DBG_WIN3_REG0			0x000004f0
+#define RK3328_DBG_WIN3_REG1			0x000004f4
+#define RK3328_DBG_WIN3_REG2			0x000004f8
+#define RK3328_DBG_WIN3_RESERVED		0x000004fc
+
+#define RK3328_HWC_CTRL0			0x00000500
+#define RK3328_HWC_CTRL1			0x00000504
+#define RK3328_HWC_MST				0x00000508
+#define RK3328_HWC_DSP_ST			0x0000050c
+#define RK3328_HWC_SRC_ALPHA_CTRL		0x00000510
+#define RK3328_HWC_DST_ALPHA_CTRL		0x00000514
+#define RK3328_HWC_FADING_CTRL			0x00000518
+#define RK3328_HWC_RESERVED1			0x0000051c
+#define RK3328_POST_DSP_HACT_INFO		0x00000600
+#define RK3328_POST_DSP_VACT_INFO		0x00000604
+#define RK3328_POST_SCL_FACTOR_YRGB		0x00000608
+#define RK3328_POST_RESERVED			0x0000060c
+#define RK3328_POST_SCL_CTRL			0x00000610
+#define RK3328_POST_DSP_VACT_INFO_F1		0x00000614
+#define RK3328_DSP_HTOTAL_HS_END		0x00000618
+#define RK3328_DSP_HACT_ST_END			0x0000061c
+#define RK3328_DSP_VTOTAL_VS_END		0x00000620
+#define RK3328_DSP_VACT_ST_END			0x00000624
+#define RK3328_DSP_VS_ST_END_F1			0x00000628
+#define RK3328_DSP_VACT_ST_END_F1		0x0000062c
+#define RK3328_BCSH_COLOR_BAR			0x00000640
+#define RK3328_BCSH_BCS				0x00000644
+#define RK3328_BCSH_H				0x00000648
+#define RK3328_BCSH_CTRL			0x0000064c
+#define RK3328_FRC_LOWER01_0			0x00000678
+#define RK3328_FRC_LOWER01_1			0x0000067c
+#define RK3328_FRC_LOWER10_0			0x00000680
+#define RK3328_FRC_LOWER10_1			0x00000684
+#define RK3328_FRC_LOWER11_0			0x00000688
+#define RK3328_FRC_LOWER11_1			0x0000068c
+#define RK3328_DBG_POST_REG0			0x000006e8
+#define RK3328_DBG_POST_RESERVED		0x000006ec
+#define RK3328_DBG_DATAO			0x000006f0
+#define RK3328_DBG_DATAO_2			0x000006f4
+
+/* sdr to hdr */
+#define RK3328_SDR2HDR_CTRL			0x00000700
+#define RK3328_EOTF_OETF_Y0			0x00000704
+#define RK3328_RESERVED0001			0x00000708
+#define RK3328_RESERVED0002			0x0000070c
+#define RK3328_EOTF_OETF_Y1			0x00000710
+#define RK3328_EOTF_OETF_Y64			0x0000080c
+#define RK3328_OETF_DX_DXPOW1			0x00000810
+#define RK3328_OETF_DX_DXPOW64			0x0000090c
+#define RK3328_OETF_XN1				0x00000910
+#define RK3328_OETF_XN63			0x00000a08
+
+/* hdr to sdr */
+#define RK3328_HDR2SDR_CTRL			0x00000a10
+#define RK3328_HDR2SDR_SRC_RANGE		0x00000a14
+#define RK3328_HDR2SDR_NORMFACEETF		0x00000a18
+#define RK3328_RESERVED0003			0x00000a1c
+#define RK3328_HDR2SDR_DST_RANGE		0x00000a20
+#define RK3328_HDR2SDR_NORMFACCGAMMA		0x00000a24
+#define RK3328_EETF_OETF_Y0			0x00000a28
+#define RK3328_SAT_Y0				0x00000a2c
+#define RK3328_EETF_OETF_Y1			0x00000a30
+#define RK3328_SAT_Y1				0x00000ab0
+#define RK3328_SAT_Y8				0x00000acc
+
+#define RK3328_HWC_LUT_ADDR			0x00000c00
+
+/* rk3036 register definition */
+#define RK3036_SYS_CTRL			0x00
+#define RK3036_DSP_CTRL0		0x04
+#define RK3036_DSP_CTRL1		0x08
+#define RK3036_INT_STATUS		0x10
+#define RK3036_ALPHA_CTRL		0x14
+#define RK3036_WIN0_COLOR_KEY		0x18
+#define RK3036_WIN1_COLOR_KEY		0x1c
+#define RK3036_WIN0_YRGB_MST		0x20
+#define RK3036_WIN0_CBR_MST		0x24
+#define RK3036_WIN1_VIR			0x28
+#define RK3036_AXI_BUS_CTRL		0x2c
+#define RK3036_WIN0_VIR			0x30
+#define RK3036_WIN0_ACT_INFO		0x34
+#define RK3036_WIN0_DSP_INFO		0x38
+#define RK3036_WIN0_DSP_ST		0x3c
+#define RK3036_WIN0_SCL_FACTOR_YRGB	0x40
+#define RK3036_WIN0_SCL_FACTOR_CBR	0x44
+#define RK3036_WIN0_SCL_OFFSET		0x48
+#define RK3036_HWC_MST			0x58
+#define RK3036_HWC_DSP_ST		0x5c
+#define RK3036_DSP_HTOTAL_HS_END	0x6c
+#define RK3036_DSP_HACT_ST_END		0x70
+#define RK3036_DSP_VTOTAL_VS_END	0x74
+#define RK3036_DSP_VACT_ST_END		0x78
+#define RK3036_DSP_VS_ST_END_F1		0x7c
+#define RK3036_DSP_VACT_ST_END_F1	0x80
+#define RK3036_GATHER_TRANSFER		0x84
+#define RK3036_VERSION_INFO		0x94
+#define RK3036_REG_CFG_DONE		0x90
+#define RK3036_WIN1_MST			0xa0
+#define RK3036_WIN1_ACT_INFO		0xb4
+#define RK3036_WIN1_DSP_INFO		0xb8
+#define RK3036_WIN1_DSP_ST		0xbc
+#define RK3036_WIN1_SCL_FACTOR_YRGB	0xc0
+#define RK3036_WIN1_SCL_OFFSET		0xc8
+#define RK3036_BCSH_CTRL		0xd0
+#define RK3036_BCSH_COLOR_BAR		0xd4
+#define RK3036_BCSH_BCS			0xd8
+#define RK3036_BCSH_H			0xdc
+#define RK3036_WIN1_LUT_ADDR		0x400
+#define RK3036_HWC_LUT_ADDR		0x800
+/* rk3036 register definition end */
+
+#endif /* _ROCKCHIP_VOP_REG_H */
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index e3b9e5b0c9..c2d8ab7768 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -88,6 +88,7 @@ enum uclass_id {
 	UCLASS_VIDEO,		/* Video or LCD device */
 	UCLASS_VIDEO_BRIDGE,	/* Video bridge, e.g. DisplayPort to LVDS */
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
+	UCLASS_VIDEO_CRTC,	/* Display Controller */
 	UCLASS_WDT,		/* Watchdot Timer driver */
 	UCLASS_FG,
 	UCLASS_KEY,
diff --git a/include/dt-bindings/media/rockchip_mipi_dsi.h b/include/dt-bindings/media/rockchip_mipi_dsi.h
new file mode 100644
index 0000000000..469d8c4358
--- /dev/null
+++ b/include/dt-bindings/media/rockchip_mipi_dsi.h
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ROCKCHIP_MIPI_DSI_H__
+#define __ROCKCHIP_MIPI_DSI_H__
+
+/* request ACK from peripheral */
+#define MIPI_DSI_MSG_REQ_ACK	BIT(0)
+/* use Low Power Mode to transmit message */
+#define MIPI_DSI_MSG_USE_LPM	BIT(1)
+
+/* DSI mode flags */
+
+/* video mode */
+#define MIPI_DSI_MODE_VIDEO		BIT(0)
+/* video burst mode */
+#define MIPI_DSI_MODE_VIDEO_BURST	BIT(1)
+/* video pulse mode */
+#define MIPI_DSI_MODE_VIDEO_SYNC_PULSE	BIT(2)
+/* enable auto vertical count mode */
+#define MIPI_DSI_MODE_VIDEO_AUTO_VERT	BIT(3)
+/* enable hsync-end packets in vsync-pulse and v-porch area */
+#define MIPI_DSI_MODE_VIDEO_HSE		BIT(4)
+/* disable hfront-porch area */
+#define MIPI_DSI_MODE_VIDEO_HFP		BIT(5)
+/* disable hback-porch area */
+#define MIPI_DSI_MODE_VIDEO_HBP		BIT(6)
+/* disable hsync-active area */
+#define MIPI_DSI_MODE_VIDEO_HSA		BIT(7)
+/* flush display FIFO on vsync pulse */
+#define MIPI_DSI_MODE_VSYNC_FLUSH	BIT(8)
+/* disable EoT packets in HS mode */
+#define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM		BIT(11)
+
+#define MIPI_DSI_DCS_POWER_MODE_DISPLAY (1 << 2)
+#define MIPI_DSI_DCS_POWER_MODE_NORMAL  (1 << 3)
+#define MIPI_DSI_DCS_POWER_MODE_SLEEP   (1 << 4)
+#define MIPI_DSI_DCS_POWER_MODE_PARTIAL (1 << 5)
+#define MIPI_DSI_DCS_POWER_MODE_IDLE    (1 << 6)
+
+#endif /* __ROCKCHIP_MIPI_DSI__ */
diff --git a/include/linux/media-bus-format.h b/include/linux/media-bus-format.h
new file mode 100644
index 0000000000..190d491d5b
--- /dev/null
+++ b/include/linux/media-bus-format.h
@@ -0,0 +1,137 @@
+/*
+ * Media Bus API header
+ *
+ * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __LINUX_MEDIA_BUS_FORMAT_H
+#define __LINUX_MEDIA_BUS_FORMAT_H
+
+/*
+ * These bus formats uniquely identify data formats on the data bus. Format 0
+ * is reserved, MEDIA_BUS_FMT_FIXED shall be used by host-client pairs, where
+ * the data format is fixed. Additionally, "2X8" means that one pixel is
+ * transferred in two 8-bit samples, "BE" or "LE" specify in which order those
+ * samples are transferred over the bus: "LE" means that the least significant
+ * bits are transferred first, "BE" means that the most significant bits are
+ * transferred first, and "PADHI" and "PADLO" define which bits - low or high,
+ * in the incomplete high byte, are filled with padding bits.
+ *
+ * The bus formats are grouped by type, bus_width, bits per component, samples
+ * per pixel and order of subsamples. Numerical values are sorted using generic
+ * numerical sort order (8 thus comes before 10).
+ *
+ * As their value can't change when a new bus format is inserted in the
+ * enumeration, the bus formats are explicitly given a numerical value. The next
+ * free values for each category are listed below, update them when inserting
+ * new pixel codes.
+ */
+
+#define MEDIA_BUS_FMT_FIXED			0x0001
+
+/* RGB - next is	0x1018 */
+#define MEDIA_BUS_FMT_RGB444_1X12		0x1016
+#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE	0x1001
+#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE	0x1002
+#define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE	0x1003
+#define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE	0x1004
+#define MEDIA_BUS_FMT_RGB565_1X16		0x1017
+#define MEDIA_BUS_FMT_BGR565_2X8_BE		0x1005
+#define MEDIA_BUS_FMT_BGR565_2X8_LE		0x1006
+#define MEDIA_BUS_FMT_RGB565_2X8_BE		0x1007
+#define MEDIA_BUS_FMT_RGB565_2X8_LE		0x1008
+#define MEDIA_BUS_FMT_RGB666_1X18		0x1009
+#define MEDIA_BUS_FMT_RBG888_1X24		0x100e
+#define MEDIA_BUS_FMT_RGB666_1X24_CPADHI	0x1015
+#define MEDIA_BUS_FMT_RGB666_1X7X3_SPWG		0x1010
+#define MEDIA_BUS_FMT_BGR888_1X24		0x1013
+#define MEDIA_BUS_FMT_GBR888_1X24		0x1014
+#define MEDIA_BUS_FMT_RGB888_1X24		0x100a
+#define MEDIA_BUS_FMT_RGB888_2X12_BE		0x100b
+#define MEDIA_BUS_FMT_RGB888_2X12_LE		0x100c
+#define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG		0x1011
+#define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA	0x1012
+#define MEDIA_BUS_FMT_ARGB8888_1X32		0x100d
+#define MEDIA_BUS_FMT_RGB888_1X32_PADHI		0x100f
+
+/* YUV (including grey) - next is	0x2026 */
+#define MEDIA_BUS_FMT_Y8_1X8			0x2001
+#define MEDIA_BUS_FMT_UV8_1X8			0x2015
+#define MEDIA_BUS_FMT_UYVY8_1_5X8		0x2002
+#define MEDIA_BUS_FMT_VYUY8_1_5X8		0x2003
+#define MEDIA_BUS_FMT_YUYV8_1_5X8		0x2004
+#define MEDIA_BUS_FMT_YVYU8_1_5X8		0x2005
+#define MEDIA_BUS_FMT_UYVY8_2X8			0x2006
+#define MEDIA_BUS_FMT_VYUY8_2X8			0x2007
+#define MEDIA_BUS_FMT_YUYV8_2X8			0x2008
+#define MEDIA_BUS_FMT_YVYU8_2X8			0x2009
+#define MEDIA_BUS_FMT_Y10_1X10			0x200a
+#define MEDIA_BUS_FMT_UYVY10_2X10		0x2018
+#define MEDIA_BUS_FMT_VYUY10_2X10		0x2019
+#define MEDIA_BUS_FMT_YUYV10_2X10		0x200b
+#define MEDIA_BUS_FMT_YVYU10_2X10		0x200c
+#define MEDIA_BUS_FMT_Y12_1X12			0x2013
+#define MEDIA_BUS_FMT_UYVY12_2X12		0x201c
+#define MEDIA_BUS_FMT_VYUY12_2X12		0x201d
+#define MEDIA_BUS_FMT_YUYV12_2X12		0x201e
+#define MEDIA_BUS_FMT_YVYU12_2X12		0x201f
+#define MEDIA_BUS_FMT_UYVY8_1X16		0x200f
+#define MEDIA_BUS_FMT_VYUY8_1X16		0x2010
+#define MEDIA_BUS_FMT_YUYV8_1X16		0x2011
+#define MEDIA_BUS_FMT_YVYU8_1X16		0x2012
+#define MEDIA_BUS_FMT_YDYUYDYV8_1X16		0x2014
+#define MEDIA_BUS_FMT_UYVY10_1X20		0x201a
+#define MEDIA_BUS_FMT_VYUY10_1X20		0x201b
+#define MEDIA_BUS_FMT_YUYV10_1X20		0x200d
+#define MEDIA_BUS_FMT_YVYU10_1X20		0x200e
+#define MEDIA_BUS_FMT_VUY8_1X24			0x2024
+#define MEDIA_BUS_FMT_YUV8_1X24			0x2025
+#define MEDIA_BUS_FMT_UYVY12_1X24		0x2020
+#define MEDIA_BUS_FMT_VYUY12_1X24		0x2021
+#define MEDIA_BUS_FMT_YUYV12_1X24		0x2022
+#define MEDIA_BUS_FMT_YVYU12_1X24		0x2023
+#define MEDIA_BUS_FMT_YUV10_1X30		0x2016
+#define MEDIA_BUS_FMT_AYUV8_1X32		0x2017
+
+/* Bayer - next is	0x3019 */
+#define MEDIA_BUS_FMT_SBGGR8_1X8		0x3001
+#define MEDIA_BUS_FMT_SGBRG8_1X8		0x3013
+#define MEDIA_BUS_FMT_SGRBG8_1X8		0x3002
+#define MEDIA_BUS_FMT_SRGGB8_1X8		0x3014
+#define MEDIA_BUS_FMT_SBGGR10_ALAW8_1X8		0x3015
+#define MEDIA_BUS_FMT_SGBRG10_ALAW8_1X8		0x3016
+#define MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8		0x3017
+#define MEDIA_BUS_FMT_SRGGB10_ALAW8_1X8		0x3018
+#define MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8		0x300b
+#define MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8		0x300c
+#define MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8		0x3009
+#define MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8		0x300d
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE	0x3003
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE	0x3004
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE	0x3005
+#define MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE	0x3006
+#define MEDIA_BUS_FMT_SBGGR10_1X10		0x3007
+#define MEDIA_BUS_FMT_SGBRG10_1X10		0x300e
+#define MEDIA_BUS_FMT_SGRBG10_1X10		0x300a
+#define MEDIA_BUS_FMT_SRGGB10_1X10		0x300f
+#define MEDIA_BUS_FMT_SBGGR12_1X12		0x3008
+#define MEDIA_BUS_FMT_SGBRG12_1X12		0x3010
+#define MEDIA_BUS_FMT_SGRBG12_1X12		0x3011
+#define MEDIA_BUS_FMT_SRGGB12_1X12		0x3012
+
+/* JPEG compressed formats - next is	0x4002 */
+#define MEDIA_BUS_FMT_JPEG_1X8			0x4001
+
+/* Vendor specific formats - next is	0x5002 */
+
+/* S5C73M3 sensor specific interleaved UYVY and JPEG */
+#define MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8		0x5001
+
+/* HSV - next is	0x6002 */
+#define MEDIA_BUS_FMT_AHSV8888_1X32		0x6001
+
+#endif /* __LINUX_MEDIA_BUS_FORMAT_H */

commit bda599f7c7d1023a9629cecf3fcb9d90c159c5f0
Author: Shawn Lin <shawn.lin@rock-chips.com>
Date:   Mon Oct 9 17:51:29 2017 +0800

    mmc: dwmmc: Add stride PIO for better burst mode support
    
    This patch enables stride PIO for better burst mode
    support on some rockchip platforms, for instance rk3128,
    etc. It uses ldm and stm to make multiple accessing from
    CPU under some ARM architecture.
    
    Design Note:
    1) Carefully test it beyond the armv7(m) core since I don't
    test them! If you disassemble the code, dwmci_memcpy_fromio
    may be changed to use ldmia.w and stmia.w, as well as some
    other optimization for push/pop stack operation, but they
    are all fine!
    2) Do *NOT* remove noinline and __volatile attributes as
    you could fall into trouble by the optimization of GCC.
    And please invent new attributes if you use *OTHER* compilers
    which have their own keywords claiming the function to be a
    "plase don't inline the function and please don't reorder the
    groups".
    3) If you want to use this feature for other rockchip platforms,
    you could append new config in rockchip_dw_mmc.c. But now we only
    have CONFIG_ROCKCHIP_RK3128 which means we just enable it for
    rk312x platforms.
    4) Stride PIO is determined by both of host->stride_pio and
    the data payload. The intention of it is to make the block
    accessing faster. So now only enable it for who's data payload
    is larger(or equal to)than 512 Bytes.
    5) MAX_STRIDE means we support burst MAX_STRIDE * 4 Bytes per
    stride. Of course you could change that, but please read the
    comment before it in the code and do it carefully.
    
    How to test?
    1) Prepare a memory, for instance, 0x70000000 on RK3126c.
    
    => mw 0x70000000 0x55aa55aa 0x200
    
    2) Check it to see if 0x70000000 ~ 0x700000200 are all 0x55aa55aa
    
    => md 0x70000000 0x200
    70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    ....
    
    3) Fetch data of 0x70000000 ~ 0x700000200 and wrrite them to eMMC,
    for instance, LBA 0x10000, and blk count is 1 as one blk means 0x200
    bytes.
    
    => mmc write 0x70000000 0x10000 1
    
    MMC write: dev # 0, block # 65536, count 1 ... 1 blocks written: OK
    
    4) Clean the merory buffer and double check it
    
    => mw 0x70000000 0x0 0x200
    => md 0x70000000 0x200
    70000000: 00000000 00000000 00000000 00000000    ................
    70000010: 00000000 00000000 00000000 00000000    ................
    70000020: 00000000 00000000 00000000 00000000    ................
    ....
    
    5) Well, now let's read back the data from eMMC from the LBA
    we wrote before.
    
    => mmc read 0x70000000 0x10000 1
    
    MMC read: dev # 0, block # 65536, count 1 ... 1 blocks read: OK
    
    6) We expect the 0x70000000 ~ 0x700000200 should be 0x55aa55aa instead
    of 0x0 which is cleared by step 4).
    
    => md 0x70000000 0x200
    70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa    .U.U.U.U.U.U.U.U
    ....
    
    Great, we see that the write and read eMMC are finished well and
    the data payload is correct as expected!
    
    Change-Id: I9b68c335449550b95f1a8f5841d46821346e45af
    Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index c94ed6e576..9f279092b0 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -16,6 +16,47 @@
 
 #define PAGE_SIZE 4096
 
+/*
+ * Currently it supports read/write up to 8*8*4 Bytes per
+ * stride as a burst mode. Please note that if you change
+ * MAX_STRIDE, you should also update dwmci_memcpy_fromio
+ * to augment the groups of {ldm, stm}.
+ */
+#define MAX_STRIDE 64
+#if CONFIG_ARM && CONFIG_CPU_V7
+void noinline dwmci_memcpy_fromio(void *buffer, void *fifo_addr)
+{
+	__asm__ __volatile__ (
+		"push {r2, r3, r4, r5, r6, r7, r8, r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"ldm r1, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"stm r0!, {r2,r3,r4,r5,r6,r7,r8,r9}\n"
+		"pop {r2, r3, r4, r5, r6,r7,r8,r9}\n"
+		:::"memory"
+	);
+}
+
+void noinline dwmci_memcpy_toio(void *buffer, void *fifo_addr)
+{
+	dwmci_memcpy_fromio(fifo_addr, buffer);
+}
+#else
+void dwmci_memcpy_fromio(void *buffer, void *fifo_addr) {};
+void dwmci_memcpy_toio(void *buffer, void *fifo_addr) {};
+#endif
 static int dwmci_wait_reset(struct dwmci_host *host, u32 value)
 {
 	unsigned long timeout = 1000;
@@ -102,8 +143,11 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 	ulong start = get_timer(0);
 	u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >>
 			    RX_WMARK_SHIFT) + 1) * 2;
+	bool stride;
 
 	size = data->blocksize * data->blocks / 4;
+	/* Still use legacy PIO mode if size < 512(128 * 4) Bytes */
+	stride = host->stride_pio && size > 128;
 	if (data->flags == MMC_DATA_READ)
 		buf = (unsigned int *)data->dest;
 	else
@@ -144,9 +188,24 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 					len = (len >> DWMCI_FIFO_SHIFT) &
 						    DWMCI_FIFO_MASK;
 					len = min(size, len);
-					for (i = 0; i < len; i++)
-						*buf++ =
-						dwmci_readl(host, DWMCI_DATA);
+					if (!stride) {
+						/* Legacy pio mode */
+						for (i = 0; i < len; i++)
+							*buf++ = dwmci_readl(host, DWMCI_DATA);
+						goto read_again;
+					}
+
+					/* dwmci_memcpy_fromio now bursts 256 Bytes once */
+					if (len < MAX_STRIDE)
+						continue;
+
+					for (i = 0; i < len / MAX_STRIDE; i++) {
+						dwmci_memcpy_fromio(buf, host->ioaddr + DWMCI_DATA);
+						buf += MAX_STRIDE;
+					}
+
+					len = i * MAX_STRIDE;
+read_again:
 					size = size > len ? (size - len) : 0;
 				}
 				dwmci_writel(host, DWMCI_RINTSTS,
@@ -159,9 +218,23 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 						   DWMCI_FIFO_SHIFT) &
 						   DWMCI_FIFO_MASK);
 					len = min(size, len);
-					for (i = 0; i < len; i++)
-						dwmci_writel(host, DWMCI_DATA,
-							     *buf++);
+					if (!stride) {
+						for (i = 0; i < len; i++)
+							dwmci_writel(host, DWMCI_DATA,
+								     *buf++);
+						goto write_again;
+					}
+					/* dwmci_memcpy_toio now bursts 256 Bytes once */
+					if (len < MAX_STRIDE)
+						continue;
+
+					for (i = 0; i < len / MAX_STRIDE; i++) {
+						dwmci_memcpy_toio(buf, host->ioaddr + DWMCI_DATA);
+						buf += MAX_STRIDE;
+					}
+
+					len = i * MAX_STRIDE;
+write_again:
 					size = size > len ? (size - len) : 0;
 				}
 				dwmci_writel(host, DWMCI_RINTSTS,
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 6027642f44..4e607bfec4 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -260,6 +260,12 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 
 	host->fifo_mode = priv->fifo_mode;
 
+#ifdef CONFIG_ROCKCHIP_RK3128
+	host->stride_pio = true;
+#else
+	host->stride_pio = false;
+#endif
+
 #ifdef CONFIG_PWRSEQ
 	/* Enable power if needed */
 	ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 374a67d39c..9edbdf65c5 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -146,6 +146,7 @@
  * @fifoth_val:	Value for FIFOTH register (or 0 to leave unset)
  * @mmc:	Pointer to generic MMC structure for this device
  * @priv:	Private pointer for use by controller
+ * @stride_pio: Provide the ability of accessing fifo with burst mode
  */
 struct dwmci_host {
 	const char *name;
@@ -162,6 +163,7 @@ struct dwmci_host {
 	u32 fifoth_val;
 	struct mmc *mmc;
 	void *priv;
+	bool stride_pio;
 
 	void (*clksel)(struct dwmci_host *host);
 	void (*board_init)(struct dwmci_host *host);

commit 3d363c8dd846d1b63137f7f24d6e07445fdfd522
Author: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date:   Wed Sep 20 13:50:13 2017 +0200

    rockchip: imply ADC and SARADC_ROCKCHIP for Rockchip SOCs
    
    Enable the Rockchip SARADC driver for all Rockchip SoCs.
    
    Note that the SARADC peripheral is available on all SoCs except the
    RK3036 and RK3228.  However, as this is a DM-driver, enabling by
    default will not cause any function problems (and can always be
    changed from defconfig, if size is a concern).
    
    Change-Id: I79f921256d986a22e37174c003d49f7423676e28
    Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: David Wu <david.wu@rock-chips.com>
    (cherry picked from commit 8e8bcccc1830723ead3eaa9fdbf9579f09973f39)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6ef2db3188..ded670dde3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1119,6 +1119,8 @@ config ARCH_ROCKCHIP
 	imply USB_FUNCTION_FASTBOOT
 	imply SPL_SYSRESET
 	imply TPL_SYSRESET
+	imply ADC
+	imply SARADC_ROCKCHIP
 
 config TARGET_THUNDERX_88XX
 	bool "Support ThunderX 88xx"

commit cba1291691d1b3ebf56d794478632287acba5581
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:47:19 2017 +0800

    rockchip: dts: Enable SARADC for rk3399-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: Ia74bafb3c1e92570bc385102288831b934e53598
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 3b4cab15acd83aa468e809a300797253d8f66818)

diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index be0c6d98bd..0e5d8d79a1 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -149,6 +149,10 @@
 	status = "okay";
 };
 
+&saradc {
+	status = "okay";
+};
+
 &sdmmc {
 	bus-width = <4>;
 	status = "okay";

commit ea9be535651e890c71d1e49e8371c190202d7fbd
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:46:19 2017 +0800

    rockchip: dts: Enable SARADC for rk3368-sheep
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: I82d03c9a468e4166a37f62c66937ac28463d1574
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 6333a3bad91153c9183060624de190709076eb48)

diff --git a/arch/arm/dts/rk3368-sheep.dts b/arch/arm/dts/rk3368-sheep.dts
index 7c190f7456..27befadd67 100644
--- a/arch/arm/dts/rk3368-sheep.dts
+++ b/arch/arm/dts/rk3368-sheep.dts
@@ -260,6 +260,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &tsadc {
 	status = "okay";
 	rockchip,hw-tshut-mode = <0>; /* CRU */

commit 648b218ee6b89ba20c349365759c9f9f8f70e3b2
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:45:21 2017 +0800

    rockchip: dts: Enable SARADC for rk3368-px5-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: I98f3e32d907c48705943012408bf6570e0ad13a2
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 0ac1ae65eae072b56928f17b4a2abf79d2d1c477)

diff --git a/arch/arm/dts/rk3368-px5-evb.dts b/arch/arm/dts/rk3368-px5-evb.dts
index c7478f7ddb..e9c5ebad47 100644
--- a/arch/arm/dts/rk3368-px5-evb.dts
+++ b/arch/arm/dts/rk3368-px5-evb.dts
@@ -296,6 +296,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &tsadc {
 	status = "okay";
 	rockchip,hw-tshut-mode = <0>; /* CRU */

commit 2bca1182c1c1a4ba96c4f3ab39fde7b9c5e1d2c6
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:44:23 2017 +0800

    rockchip: dts: Enable SARADC for rk3328-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: I68f8dab9383e5e23e355daaeeb61c14e11c410f1
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit f957dec682dc2fa0363e09bfb5f41f008569245b)

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index c0716de30e..5147795915 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -42,6 +42,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };

commit 3d50e68bd36f79ce2b14f157a04275721f648e15
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:43:08 2017 +0800

    rockchip: dts: Enable SARADC for rk3288-popmetal
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: Ib1dd53196f6fb4c585a70c4cd0af3d04c32eb792
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 0eaf58bfaa0cffe822e216e260c1d36284d8bf10)

diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi
index dd6ce8b69e..63785eb55e 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -491,6 +491,10 @@
 	};
 };
 
+&saradc {
+	status = "okay";
+};
+
 &tsadc {
 	rockchip,hw-tshut-mode = <0>;
 	rockchip,hw-tshut-polarity = <0>;

commit dfe9d5ec84ecad2afd18445139974f2c8c484c80
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:41:38 2017 +0800

    rockchip: dts: Enable SARADC for rv1108-evb
    
    Enable the SARADC for download key pressed detect.
    
    Change-Id: Ia02f90a2a7b7a8f1154f6ef9ba0abf736d03c699
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 679276bde6f0aebb207053b5f11012f20577ce37)

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 42dc7a1c62..71bdcd2207 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -39,6 +39,10 @@
 	snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
 };
 
+&saradc {
+	status = "okay";
+};
+
 &sfc {
 	status = "okay";
 	flash@0 {

commit a0898465dd46d958220c01f4fb10cb2c263394bf
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:40:11 2017 +0800

    rockchip: dts: rv1108: Add SARADC node at dtsi level
    
    Change-Id: I36e463e74d1fd17a3870de566fde63ac99a41755
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit fdc1eccbd19e8ea45e527d2b199917c075b6a4cd)

diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 5fc8eb6ac1..e7863e239f 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -149,6 +149,17 @@
 		};
 	};
 
+	saradc: saradc@1038c000 {
+		compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
+		reg = <0x1038c000 0x100>;
+		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clock-frequency = <1000000>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		status = "disabled";
+	};
+
 	pmugrf: syscon@20060000 {
 		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;

commit e78991bff6c180cd013fbf57297d2e2e3ffb1bd2
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:38:58 2017 +0800

    rockchip: clk: Add rk3399 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: Ifff2c9716ea409eee76cbeaf0a0878df05f304d2
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 364fc7315aa0e6e20f604bb8b369b4bdc0dd8e8a)

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index d4a5f3ba53..b31446e276 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <mapmem.h>
 #include <syscon.h>
+#include <bitfield.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3399.h>
@@ -181,7 +182,8 @@ enum {
 
 	/* CLKSEL_CON26 */
 	CLK_SARADC_DIV_CON_SHIFT	= 8,
-	CLK_SARADC_DIV_CON_MASK		= 0xff << CLK_SARADC_DIV_CON_SHIFT,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
+	CLK_SARADC_DIV_CON_WIDTH	= 8,
 
 	/* CLKSEL_CON27 */
 	CLK_TSADC_SEL_X24M		= 0x0,
@@ -861,6 +863,32 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
 
 	return set_rate;
 }
+
+static ulong rk3399_saradc_get_clk(struct rk3399_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[26]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[26],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3399_saradc_get_clk(cru);
+}
+
 static ulong rk3399_clk_get_rate(struct clk *clk)
 {
 	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
@@ -896,6 +924,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
 		break;
 	case PCLK_EFUSE1024NS:
 		break;
+	case SCLK_SARADC:
+		rate = rk3399_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -944,6 +975,9 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case PCLK_EFUSE1024NS:
 		break;
+	case SCLK_SARADC:
+		ret = rk3399_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit 73e16df2e83b818e119b404283e6b2c49d3cafb3
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:37:50 2017 +0800

    rockchip: clk: Add rk3368 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: I47cc95d7e2cbf026bc34042cef4c2fe636bae674
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 615514c16dee4d43bd584ea326a5a56ebcb89c85)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 2b1197fd46..5f6a5fbe4c 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -89,6 +89,11 @@ enum {
 	MCU_CLK_DIV_SHIFT		= 0,
 	MCU_CLK_DIV_MASK		= GENMASK(4, 0),
 
+	/* CLKSEL_CON25 */
+	CLK_SARADC_DIV_CON_SHIFT	= 8,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
+	CLK_SARADC_DIV_CON_WIDTH	= 8,
+
 	/* CLKSEL43_CON */
 	GMAC_MUX_SEL_EXTCLK             = BIT(8),
 
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 0160d50c03..cd3ab248fb 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <mapmem.h>
 #include <syscon.h>
+#include <bitfield.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3368.h>
 #include <asm/arch/hardware.h>
@@ -397,6 +398,31 @@ static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)
 	return rk3368_spi_get_clk(cru, clk_id);
 }
 
+static ulong rk3368_saradc_get_clk(struct rk3368_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[25]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[25],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3368_saradc_get_clk(cru);
+}
+
 static ulong rk3368_clk_get_rate(struct clk *clk)
 {
 	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
@@ -419,6 +445,9 @@ static ulong rk3368_clk_get_rate(struct clk *clk)
 		rate = rk3368_mmc_get_clk(priv->cru, clk->id);
 		break;
 #endif
+	case SCLK_SARADC:
+		rate = rk3368_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -453,6 +482,9 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
 		break;
 #endif
+	case SCLK_SARADC:
+		ret =  rk3368_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit ae74d3d5ad3cffadf8908d726eb8f5e7d70126d4
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:35:44 2017 +0800

    rockchip: clk: Add rk3328 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 10-bits width.
    
    Change-Id: I73608db35c926470692eb982e881b01e52fcf2d9
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit b375d84135e26d5ec5034a515af4df5981785f37)

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index c3a6650de0..540d9104c3 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
@@ -114,7 +115,8 @@ enum {
 
 	/* CLKSEL_CON23 */
 	CLK_SARADC_DIV_CON_SHIFT	= 0,
-	CLK_SARADC_DIV_CON_MASK		= 0x3ff << CLK_SARADC_DIV_CON_SHIFT,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH	= 10,
 
 	/* CLKSEL_CON24 */
 	CLK_PWM_PLL_SEL_CPLL		= 0,
@@ -478,6 +480,31 @@ static ulong rk3328_pwm_set_clk(struct rk3328_cru *cru, uint hz)
 	return DIV_TO_RATE(GPLL_HZ, div);
 }
 
+static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[23]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[23],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rk3328_saradc_get_clk(cru);
+}
+
 static ulong rk3328_clk_get_rate(struct clk *clk)
 {
 	struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
@@ -501,6 +528,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
 	case SCLK_PWM:
 		rate = rk3328_pwm_get_clk(priv->cru);
 		break;
+	case SCLK_SARADC:
+		rate = rk3328_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -531,6 +561,9 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_PWM:
 		ret = rk3328_pwm_set_clk(priv->cru, rate);
 		break;
+	case SCLK_SARADC:
+		ret = rk3328_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit b6e52402c4623753f3761c6c8d43016be50aeb88
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:28:19 2017 +0800

    rockchip: clk: Add SARADC clock support for rk3288
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 8-bits width.
    
    Change-Id: Icb41bbf2a719ab7b2c1c70e1227408d3abb625db
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit ef4cf5ae393e4adf532f536d6da97c87f88db230)

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index bd05379c44..204a54787e 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <dt-structs.h>
@@ -111,6 +112,15 @@ enum {
 	PERI_ACLK_DIV_SHIFT	= 0,
 	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
 
+	/*
+	 * CLKSEL24
+	 * saradc_div_con:
+	 * clk_saradc=24MHz/(saradc_div_con+1)
+	 */
+	CLK_SARADC_DIV_CON_SHIFT	= 8,
+	CLK_SARADC_DIV_CON_MASK		= GENMASK(15, 8),
+	CLK_SARADC_DIV_CON_WIDTH	= 8,
+
 	SOCSTS_DPLL_LOCK	= 1 << 5,
 	SOCSTS_APLL_LOCK	= 1 << 6,
 	SOCSTS_CPLL_LOCK	= 1 << 7,
@@ -635,6 +645,31 @@ static ulong rockchip_spi_set_clk(struct rk3288_cru *cru, uint gclk_rate,
 	return rockchip_spi_get_clk(cru, gclk_rate, periph);
 }
 
+static ulong rockchip_saradc_get_clk(struct rk3288_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->cru_clksel_con[24]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->cru_clksel_con[24],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rockchip_saradc_get_clk(cru);
+}
+
 static ulong rk3288_clk_get_rate(struct clk *clk)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
@@ -669,6 +704,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 		return gclk_rate;
 	case PCLK_PWM:
 		return PD_BUS_PCLK_HZ;
+	case SCLK_SARADC:
+		new_rate = rockchip_saradc_get_clk(priv->cru);
+		break;
 	default:
 		return -ENOENT;
 	}
@@ -759,6 +797,9 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 		new_rate = rate;
 		break;
 #endif
+	case SCLK_SARADC:
+		new_rate = rockchip_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}

commit befbd723c2c9eadcfa6e9ae1dca845f05d3c29c8
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:28:18 2017 +0800

    rockchip: clk: Add rv1108 SARADC clock support
    
    The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
    SARADC integer divider control register is 10-bits width.
    
    Change-Id: I1ff152b72a75680601f22c5b621de8b2198a6778
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit 2e4ce50d1aca35d13944f48a7e15d0b63e86eb38)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index 2a1ae692be..ad2dc96467 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -90,6 +90,11 @@ enum {
 	CORE_CLK_DIV_SHIFT	= 0,
 	CORE_CLK_DIV_MASK	= 0x1f << CORE_CLK_DIV_SHIFT,
 
+	/* CLKSEL_CON22 */
+	CLK_SARADC_DIV_CON_SHIFT= 0,
+	CLK_SARADC_DIV_CON_MASK	= GENMASK(9, 0),
+	CLK_SARADC_DIV_CON_WIDTH= 10,
+
 	/* CLKSEL24_CON */
 	MAC_PLL_SEL_SHIFT	= 12,
 	MAC_PLL_SEL_MASK	= 1 << MAC_PLL_SEL_SHIFT,
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index cf966bbdc3..86e73e414c 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <bitfield.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
@@ -36,7 +37,7 @@ enum {
 			 #hz "Hz cannot be hit with PLL "\
 			 "divisors on line " __stringify(__LINE__));
 
-/* use interge mode*/
+/* use integer mode */
 static inline int rv1108_pll_id(enum rk_clk_id clk_id)
 {
 	int id = 0;
@@ -130,6 +131,31 @@ static int rv1108_sfc_set_clk(struct rv1108_cru *cru, uint rate)
 	return DIV_TO_RATE(pll_rate, div);
 }
 
+static ulong rv1108_saradc_get_clk(struct rv1108_cru *cru)
+{
+	u32 div, val;
+
+	val = readl(&cru->clksel_con[22]);
+	div = bitfield_extract(val, CLK_SARADC_DIV_CON_SHIFT,
+			       CLK_SARADC_DIV_CON_WIDTH);
+
+	return DIV_TO_RATE(OSC_HZ, div);
+}
+
+static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz)
+{
+	int src_clk_div;
+
+	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
+	assert(src_clk_div < 128);
+
+	rk_clrsetreg(&cru->clksel_con[22],
+		     CLK_SARADC_DIV_CON_MASK,
+		     src_clk_div << CLK_SARADC_DIV_CON_SHIFT);
+
+	return rv1108_saradc_get_clk(cru);
+}
+
 static ulong rv1108_clk_get_rate(struct clk *clk)
 {
 	struct rv1108_clk_priv *priv = dev_get_priv(clk->dev);
@@ -137,6 +163,8 @@ static ulong rv1108_clk_get_rate(struct clk *clk)
 	switch (clk->id) {
 	case 0 ... 63:
 		return rkclk_pll_get_rate(priv->cru, clk->id);
+	case SCLK_SARADC:
+		return rv1108_saradc_get_clk(priv->cru);
 	default:
 		return -ENOENT;
 	}
@@ -154,6 +182,9 @@ static ulong rv1108_clk_set_rate(struct clk *clk, ulong rate)
 	case SCLK_SFC:
 		new_rate = rv1108_sfc_set_clk(priv->cru, rate);
 		break;
+	case SCLK_SARADC:
+		new_rate = rv1108_saradc_set_clk(priv->cru, rate);
+		break;
 	default:
 		return -ENOENT;
 	}
diff --git a/include/dt-bindings/clock/rv1108-cru.h b/include/dt-bindings/clock/rv1108-cru.h
index d2ad3bb52d..7defc6b282 100644
--- a/include/dt-bindings/clock/rv1108-cru.h
+++ b/include/dt-bindings/clock/rv1108-cru.h
@@ -39,6 +39,7 @@
 #define SCLK_MAC_TX			88
 #define SCLK_MACREF			89
 #define SCLK_MACREF_OUT			90
+#define SCLK_SARADC			91
 
 
 /* aclk gates */
@@ -67,6 +68,7 @@
 #define PCLK_TIMER			270
 #define PCLK_PERI			271
 #define PCLK_GMAC			272
+#define PCLK_SARADC			273
 
 /* hclk gates */
 #define HCLK_I2S0_8CH			320

commit ae6cbe8a11c7df7096b4db01fd29fbda04beff23
Author: David Wu <david.wu@rock-chips.com>
Date:   Wed Sep 20 14:28:16 2017 +0800

    dm: adc: Add driver for Rockchip SARADC
    
    The ADC can support some channels signal-ended some bits Successive Approximation
    Register (SAR) A/D Converter, like 6-channel and 10-bit. It converts the analog
    input signal into some bits binary digital codes.
    
    Change-Id: I073d00a739df142ddb4b93cc6a0a48b47008d3f0
    Signed-off-by: David Wu <david.wu@rock-chips.com>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    (cherry picked from commit ae3ed042ed31d1acbdd56938b45bd6c5076bebe3)

diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index e5335f7234..8094420548 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -28,3 +28,12 @@ config ADC_SANDBOX
 	  - 4 analog input channels
 	  - 16-bit resolution
 	  - single and multi-channel conversion mode
+
+config SARADC_ROCKCHIP
+	bool "Enable Rockchip SARADC driver"
+	help
+	  This enables driver for Rockchip SARADC.
+	  It provides:
+	  - 2~6 analog input channels
+	  - 1O or 12 bits resolution
+	  - Up to 1MSPS of sample rate
diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile
index cebf26de07..4b5aa693ec 100644
--- a/drivers/adc/Makefile
+++ b/drivers/adc/Makefile
@@ -8,3 +8,4 @@
 obj-$(CONFIG_ADC) += adc-uclass.o
 obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
 obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
+obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
new file mode 100644
index 0000000000..0e6271d097
--- /dev/null
+++ b/drivers/adc/rockchip-saradc.c
@@ -0,0 +1,183 @@
+/*
+ * (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Rockchip SARADC driver for U-Boot
+ */
+
+#include <common.h>
+#include <adc.h>
+#include <clk.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+
+#define SARADC_CTRL_CHN_MASK		GENMASK(2, 0)
+#define SARADC_CTRL_POWER_CTRL		BIT(3)
+#define SARADC_CTRL_IRQ_ENABLE		BIT(5)
+#define SARADC_CTRL_IRQ_STATUS		BIT(6)
+
+#define SARADC_TIMEOUT			(100 * 1000)
+
+struct rockchip_saradc_regs {
+	unsigned int data;
+	unsigned int stas;
+	unsigned int ctrl;
+	unsigned int dly_pu_soc;
+};
+
+struct rockchip_saradc_data {
+	int				num_bits;
+	int				num_channels;
+	unsigned long			clk_rate;
+};
+
+struct rockchip_saradc_priv {
+	struct rockchip_saradc_regs		*regs;
+	int					active_channel;
+	const struct rockchip_saradc_data	*data;
+};
+
+int rockchip_saradc_channel_data(struct udevice *dev, int channel,
+				 unsigned int *data)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+
+	if (channel != priv->active_channel) {
+		error("Requested channel is not active!");
+		return -EINVAL;
+	}
+
+	if ((readl(&priv->regs->ctrl) & SARADC_CTRL_IRQ_STATUS) !=
+	    SARADC_CTRL_IRQ_STATUS)
+		return -EBUSY;
+
+	/* Read value */
+	*data = readl(&priv->regs->data);
+	*data &= uc_pdata->data_mask;
+
+	/* Power down adc */
+	writel(0, &priv->regs->ctrl);
+
+	return 0;
+}
+
+int rockchip_saradc_start_channel(struct udevice *dev, int channel)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+
+	if (channel < 0 || channel >= priv->data->num_channels) {
+		error("Requested channel is invalid!");
+		return -EINVAL;
+	}
+
+	/* 8 clock periods as delay between power up and start cmd */
+	writel(8, &priv->regs->dly_pu_soc);
+
+	/* Select the channel to be used and trigger conversion */
+	writel(SARADC_CTRL_POWER_CTRL | (channel & SARADC_CTRL_CHN_MASK) |
+	       SARADC_CTRL_IRQ_ENABLE, &priv->regs->ctrl);
+
+	priv->active_channel = channel;
+
+	return 0;
+}
+
+int rockchip_saradc_stop(struct udevice *dev)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+
+	/* Power down adc */
+	writel(0, &priv->regs->ctrl);
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+int rockchip_saradc_probe(struct udevice *dev)
+{
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct clk clk;
+	int ret;
+
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (ret)
+		return ret;
+
+	ret = clk_set_rate(&clk, priv->data->clk_rate);
+	if (IS_ERR_VALUE(ret))
+		return ret;
+
+	priv->active_channel = -1;
+
+	return 0;
+}
+
+int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
+{
+	struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
+	struct rockchip_saradc_priv *priv = dev_get_priv(dev);
+	struct rockchip_saradc_data *data;
+
+	data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
+	priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
+	if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
+		error("Dev: %s - can't get address!", dev->name);
+		return -ENODATA;
+	}
+
+	priv->data = data;
+	uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;;
+	uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
+	uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5;
+	uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1;
+
+	return 0;
+}
+
+static const struct adc_ops rockchip_saradc_ops = {
+	.start_channel = rockchip_saradc_start_channel,
+	.channel_data = rockchip_saradc_channel_data,
+	.stop = rockchip_saradc_stop,
+};
+
+static const struct rockchip_saradc_data saradc_data = {
+	.num_bits = 10,
+	.num_channels = 3,
+	.clk_rate = 1000000,
+};
+
+static const struct rockchip_saradc_data rk3066_tsadc_data = {
+	.num_bits = 12,
+	.num_channels = 2,
+	.clk_rate = 50000,
+};
+
+static const struct rockchip_saradc_data rk3399_saradc_data = {
+	.num_bits = 10,
+	.num_channels = 6,
+	.clk_rate = 1000000,
+};
+
+static const struct udevice_id rockchip_saradc_ids[] = {
+	{ .compatible = "rockchip,saradc",
+	  .data = (ulong)&saradc_data },
+	{ .compatible = "rockchip,rk3066-tsadc",
+	  .data = (ulong)&rk3066_tsadc_data },
+	{ .compatible = "rockchip,rk3399-saradc",
+	  .data = (ulong)&rk3399_saradc_data },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_saradc) = {
+	.name		= "rockchip_saradc",
+	.id		= UCLASS_ADC,
+	.of_match	= rockchip_saradc_ids,
+	.ops		= &rockchip_saradc_ops,
+	.probe		= rockchip_saradc_probe,
+	.ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv),
+};

commit 114fbf71bcf3c055c0499f0dea6deda8e370603f
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 11 10:42:37 2017 +0800

    configs: add evb-rk3126_defconfig
    
    Change-Id: Ic66c588e1659e1ba87b2116d130bc9e4326bb437
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3126_defconfig b/configs/evb-rk3126_defconfig
new file mode 100644
index 0000000000..a547546de5
--- /dev/null
+++ b/configs/evb-rk3126_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3126-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit d3bcd7237efa4f1965e94ab6db3238ffe0a7582d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Oct 11 10:42:22 2017 +0800

    rockchip: dts: add rk3126-evb.dts
    
    Change-Id: I4a088342ac370ccf58ddcac84c390a24638b4ac2
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9fc8127317..fcf0f71e5a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
+	rk3126-evb.dtb \
 	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
diff --git a/arch/arm/dts/rk3126-evb.dts b/arch/arm/dts/rk3126-evb.dts
new file mode 100644
index 0000000000..2e6ca8762b
--- /dev/null
+++ b/arch/arm/dts/rk3126-evb.dts
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+
+/ {
+	model = "Rockchip RK3126 Evaluation board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+        hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&emmc {
+	fifo-mode;
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};

commit 6cab9ef35ce2dbd2284fcf4e31e3d120f4647d5b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Oct 10 19:19:48 2017 +0800

    power: pmic: rk8xx: bind rk816 fuel gauge
    
    Change-Id: I81962bc8fa2e11585dead8b32f7b46a6882275aa
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 8358549014..4d8149849c 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -29,6 +29,7 @@ static const struct pmic_child_info power_key_info[] = {
 
 static const struct pmic_child_info fuel_gauge_info[] = {
 	{ .prefix = "battery", .driver = "rk818_fg"},
+	{ .prefix = "battery", .driver = "rk816_fg"},
 	{ },
 };
 

commit 6a367335743118ba7c38d91108c40043ed123397
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 20:22:29 2017 +0800

    power: pmic: rk8xx: bind rk818 fuel gauge
    
    Change-Id: Iad4d6f66d48e824a2020ba78fa81e30cf52230ca
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 0d32410149..8358549014 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -27,6 +27,11 @@ static const struct pmic_child_info power_key_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info fuel_gauge_info[] = {
+	{ .prefix = "battery", .driver = "rk818_fg"},
+	{ },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
 	return RK808_NUM_OF_REGS;
@@ -82,6 +87,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, fuel_gauge_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	/* Always return success for this device */
 	return 0;
 }

commit ab5c5d85514c4680f6b48fc96fcad528e3a1c387
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 14 20:28:51 2017 +0800

    power: fuel gauge: add rk816 support
    
    Change-Id: I282045cf1bcefa3bc18278a86b568de3703e095a
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 78b5963536..2299e2c397 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -9,3 +9,9 @@ config POWER_FG_RK818
 	depends on DM_FUEL_GAUGE && PMIC_RK8XX
 	help
 	  This adds support for RK818 fuel gauge support.
+
+config POWER_FG_RK816
+	bool "RK816 Fuel gauge support"
+	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK816 fuel gauge support.
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 0b84981222..5e9d2c6126 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
 obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
+obj-$(CONFIG_POWER_FG_RK816) += fg_rk816.o
diff --git a/drivers/power/fuel_gauge/fg_rk816.c b/drivers/power/fuel_gauge/fg_rk816.c
new file mode 100644
index 0000000000..20a54d03c0
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_rk816.c
@@ -0,0 +1,1399 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/* #include <adc.h> */
+#include <dm.h>
+#include <errno.h>
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <asm/gpio.h>
+#include <common.h>
+#include <power/pmic.h>
+#include <power/fuel_gauge.h>
+#include <power/rk8xx_pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include "fg_regs.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int dbg_enable = 0;
+#define DBG(args...) \
+	do { \
+		if (dbg_enable) { \
+			printf(args); \
+		} \
+	} while (0)
+
+#define BAT_INFO(fmt, args...) printf("rk816-bat: "fmt, ##args)
+
+#define DRIVER_VERSION		"2.0"
+
+/* THERMAL_REG */
+#define TEMP_115C		(0x03 << 2)
+#define FB_TEMP_MSK		0x0c
+
+/* CHRG_CTRL_REG2*/
+#define FINISH_100MA		(0x00 << 6)
+#define FINISH_150MA		(0x01 << 6)
+#define FINISH_200MA		(0x02 << 6)
+#define FINISH_250MA		(0x03 << 6)
+#define FINISH_CUR_MSK		0xc7
+
+/* CHRG_CTRL_REG3*/
+#define CHRG_TERM_DIG_SIGNAL	(1 << 5)
+#define CHRG_TIMER_CCCV_EN	(1 << 2)
+
+/* CHRG_CTRL_REG */
+#define ILIM_450MA		(0x00)
+#define ILIM_2000MA		(0x07)
+#define CHRG_CT_EN		(1 << 7)
+
+/* USB_CTRL_REG */
+#define INPUT_CUR_MSK		0x0f
+
+/* VB_MON_REG */
+#define PLUG_IN_STS		(1 << 6)
+
+/* GGSTS */
+#define BAT_CON			(1 << 4)
+#define VOL_INSTANT		(1 << 0)
+#define VOL_AVG			(0 << 0)
+
+/* TS_CTRL_REG */
+#define GG_EN			(1 << 7)
+
+/* CHRG_USB_CTRL*/
+#define CHRG_EN			(1 << 7)
+
+/*SUP_STS_REG*/
+#define BAT_EXS			(1 << 7)
+#define USB_EXIST		(1 << 1)
+#define USB_EFF			(1 << 0)
+#define CHARGE_OFF		(0x00 << 4)
+#define DEAD_CHARGE		(0x01 << 4)
+#define TRICKLE_CHARGE		(0x02 << 4)
+#define CC_OR_CV		(0x03 << 4)
+#define CHARGE_FINISH		(0x04 << 4)
+#define USB_OVER_VOL		(0x05 << 4)
+#define BAT_TMP_ERR		(0x06 << 4)
+#define TIMER_ERR		(0x07 << 4)
+#define USB_VLIMIT_EN		(1 << 3)
+#define USB_CLIMIT_EN		(1 << 2)
+#define BAT_STATUS_MSK		0x70
+
+/* GGCON */
+#define ADC_CUR_MODE		(1 << 1)
+
+/* CALI PARAM */
+#define FINISH_CALI_CURR	1500
+#define TERM_CALI_CURR		600
+#define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_SOC	66
+#define SECONDS(n)		((n) * 1000)
+
+/* CALC PARAM */
+#define MAX_PERCENTAGE		100
+#define MAX_INTERPOLATE		1000
+#define MAX_INT			0x7fff
+#define MIN_FCC			500
+
+/* DC ADC */
+#define FG_INIT			(1 << 3)
+#define FG_RESET_LATE		(1 << 1)
+#define FG_RESET_NOW		(1 << 0)
+#define CHRG_TERM_DSOC		90
+#define CHRG_TERM_K		650
+#define CHRG_FULL_K		400
+#define ADC_CALIB_THRESHOLD	4
+#define DC_ADC_TRIGGER		150
+#define DIV(x)			((x) ? (x) : 1)
+
+/***********************************************************/
+struct battery_info {
+	int		chrg_type;
+	int		poffset;
+	int		bat_res;
+	int		current_avg;
+	int		voltage_avg;
+	int		voltage_ocv;
+	int		voltage_k;
+	int		voltage_b;
+	int		dsoc;
+	int		rsoc;
+	int		fcc;
+	int		qmax;
+	int		remain_cap;
+	int		design_cap;
+	int		nac;
+	u32		*ocv_table;
+	u32		ocv_size;
+	int		virtual_power;
+	int		pwroff_min;
+	int		sm_old_cap;
+	int		sm_linek;
+	int		sm_chrg_dsoc;
+	int		adc_allow_update;
+	int		chrg_vol_sel;
+	int		chrg_cur_input;
+	int		chrg_cur_sel;
+	int		dts_vol_sel;
+	int		dts_cur_input;
+	int		dts_cur_sel;
+	int		max_soc_offset;
+	struct gpio_desc *dc_det;
+	int		dc_type;
+	int		dc_det_adc;
+	ulong		vol_mode_base;
+	ulong		finish_chrg_base;
+	u8		calc_dsoc;
+	u8		calc_rsoc;
+	int		sm_meet_soc;
+	u8		halt_cnt;
+	bool		is_halt;
+	bool		is_ocv_calib;
+	bool		is_max_soc_offset;
+	bool		is_first_power_on;
+	bool		is_sw_reset;
+	int		pwr_dsoc;
+	int		pwr_rsoc;
+	int		pwr_vol;
+};
+
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
+
+enum dc_type {
+	DC_TYPE_OF_NONE = 0,
+	DC_TYPE_OF_GPIO,
+	DC_TYPE_OF_ADC,
+};
+
+static struct udevice *g_pmic_dev;
+
+/* TODO */
+#define CONFIG_SCREEN_ON_VOL_THRESD	3400
+
+static const u32 CHRG_VOL_SEL[] = {
+	4050, 4100, 4150, 4200, 4250, 4300, 4350
+};
+
+static const u32 CHRG_CUR_SEL[] = {
+	1000, 1200, 1400, 1600, 1800, 2000, 2250, 2400
+};
+
+static const u32 CHRG_CUR_INPUT[] = {
+	450, 800, 850, 1000, 1250, 1500, 1750, 2000
+};
+
+static int rk816_bat_read(u8 reg)
+{
+	return pmic_reg_read(g_pmic_dev, reg);
+}
+
+static void rk816_bat_write(u8 reg, u8 buf)
+{
+	pmic_reg_write(g_pmic_dev, reg, buf);
+}
+
+static int rk816_bat_dwc_otg_check_dpdm(void)
+{
+	return rockchip_chg_get_type();
+}
+
+static int rk816_bat_get_rsoc(struct battery_info *di)
+{
+	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+}
+
+static int rk816_bat_get_dsoc(struct  battery_info *di)
+{
+	return rk816_bat_read(SOC_REG);
+}
+
+static void rk816_bat_enable_gauge(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(TS_CTRL_REG);
+	val |= GG_EN;
+	rk816_bat_write(TS_CTRL_REG, val);
+}
+
+static void rk816_bat_set_vol_instant_mode(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(GGSTS_REG);
+	val |= VOL_INSTANT;
+	rk816_bat_write(GGSTS_REG, val);
+}
+
+static void rk816_bat_set_vol_avg_mode(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(GGSTS_REG);
+	val &= ~0x01;
+	val |= VOL_AVG;
+	rk816_bat_write(GGSTS_REG, val);
+}
+
+static int rk816_bat_get_vcalib0(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(VCALIB0_REGL) << 0;
+	val |= rk816_bat_read(VCALIB0_REGH) << 8;
+
+	return val;
+}
+
+static int rk816_bat_get_vcalib1(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(VCALIB1_REGL) << 0;
+	val |= rk816_bat_read(VCALIB1_REGH) << 8;
+
+	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	return val;
+}
+
+static void rk816_bat_set_coffset(struct battery_info *di, int val)
+{
+	u8 buf;
+
+	buf = (val >> 0) & 0xff;
+	rk816_bat_write(CAL_OFFSET_REGL, buf);
+	buf = (val >> 8) & 0xff;
+	rk816_bat_write(CAL_OFFSET_REGH, buf);
+
+	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+}
+
+static int rk816_bat_get_ioffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(IOFFSET_REGL) << 0;
+	val |= rk816_bat_read(IOFFSET_REGH) << 8;
+
+	return val;
+}
+
+static void rk816_bat_init_voltage_kb(struct battery_info *di)
+{
+	int vcalib0, vcalib1;
+
+	vcalib0 = rk816_bat_get_vcalib0(di);
+	vcalib1 = rk816_bat_get_vcalib1(di);
+	di->voltage_k = (4200 - 3000) * 1000 / DIV(vcalib1 - vcalib0);
+	di->voltage_b = 4200 - (di->voltage_k * vcalib1) / 1000;
+	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
+}
+
+static int rk816_bat_get_ocv_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk816_bat_read(BAT_OCV_REGL) << 0;
+	val |= rk816_bat_read(BAT_OCV_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+	vol = vol * 1100 / 1000;
+
+	return vol;
+}
+
+static int rk816_bat_get_avg_current(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+
+	if (val & 0x800)
+		val -= 4096;
+	val = val * 1506 / 1000;
+
+	return val;
+}
+
+static int rk816_bat_get_avg_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk816_bat_read(BAT_VOL_REGL) << 0;
+	val |= rk816_bat_read(BAT_VOL_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+	vol = vol * 1100 / 1000;
+
+	return vol;
+}
+
+static int rk816_bat_get_est_voltage(struct battery_info *di)
+{
+	int est_vol, vol, curr;
+
+	vol = rk816_bat_get_avg_voltage(di);
+	curr = rk816_bat_get_avg_current(di);
+	est_vol = vol - (di->bat_res * curr / 1000);
+
+	return (est_vol > 2800) ? est_vol : vol;
+}
+
+static u8 rk816_bat_finish_ma(int fcc)
+{
+	u8 ma;
+
+	if (fcc > 5000)
+		ma = FINISH_250MA;
+	else if (fcc >= 4000)
+		ma = FINISH_200MA;
+	else if (fcc >= 3000)
+		ma = FINISH_150MA;
+	else
+		ma = FINISH_100MA;
+
+	return ma;
+}
+
+static void rk816_bat_select_chrg_cv(struct battery_info *di)
+{
+	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
+
+	chrg_vol_sel = di->dts_vol_sel;
+	chrg_cur_sel = di->dts_cur_sel;
+	chrg_cur_input = di->dts_cur_input;
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_VOL_SEL); index++) {
+		if (chrg_vol_sel < CHRG_VOL_SEL[index])
+			break;
+		di->chrg_vol_sel = (index << 4);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_INPUT); index++) {
+		if (chrg_cur_input < CHRG_CUR_INPUT[index])
+			break;
+		di->chrg_cur_input = (index << 0);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_SEL); index++) {
+		if (chrg_cur_sel < CHRG_CUR_SEL[index])
+			break;
+		di->chrg_cur_sel = (index << 0);
+	}
+
+	DBG("<%s>. vol=0x%x, input=0x%x, sel=0x%x\n",
+	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
+}
+
+static void rk816_bat_init_chrg_config(struct battery_info *di)
+{
+	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
+	u8 sup_sts, ggcon, thermal, finish_ma;
+
+	rk816_bat_select_chrg_cv(di);
+	finish_ma = rk816_bat_finish_ma(di->fcc);
+
+	ggcon = rk816_bat_read(GGCON_REG);
+	sup_sts = rk816_bat_read(SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	thermal = rk816_bat_read(THERMAL_REG);
+	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+
+	/* set charge current and voltage */
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= di->chrg_cur_input;
+	chrg_ctrl1 = (CHRG_EN | di->chrg_vol_sel | di->chrg_cur_sel);
+
+	/* digital signal and finish current*/
+	chrg_ctrl3 |= CHRG_TERM_DIG_SIGNAL;
+	chrg_ctrl2 &= ~FINISH_CUR_MSK;
+	chrg_ctrl2 |= finish_ma;
+
+	/* cccv mode */
+	chrg_ctrl3 &= ~CHRG_TIMER_CCCV_EN;
+
+	/* enable voltage limit and enable input current limit */
+	sup_sts |= USB_VLIMIT_EN;
+	sup_sts |= USB_CLIMIT_EN;
+
+	/* set feedback temperature */
+	usb_ctrl |= CHRG_CT_EN;
+	thermal &= ~FB_TEMP_MSK;
+	thermal |= TEMP_115C;
+
+	/* adc current mode */
+	ggcon |= ADC_CUR_MODE;
+
+	rk816_bat_write(GGCON_REG, ggcon);
+	rk816_bat_write(SUP_STS_REG, sup_sts);
+	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk816_bat_write(THERMAL_REG, thermal);
+	rk816_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
+	rk816_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
+	rk816_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+}
+
+static u32 interpolate(int value, u32 *table, int size)
+{
+	uint8_t i;
+	uint16_t d;
+
+	for (i = 0; i < size; i++) {
+		if (value < table[i])
+			break;
+	}
+
+	if ((i > 0) && (i < size)) {
+		d = (value - table[i - 1]) * (MAX_INTERPOLATE / (size - 1));
+		d /= table[i] - table[i - 1];
+		d = d + (i - 1) * (MAX_INTERPOLATE / (size - 1));
+	} else {
+		d = i * ((MAX_INTERPOLATE + size / 2) / size);
+	}
+
+	if (d > 1000)
+		d = 1000;
+
+	return d;
+}
+
+/* returns (a * b) / c */
+static int32_t ab_div_c(u32 a, u32 b, u32 c)
+{
+	bool sign;
+	u32 ans = MAX_INT;
+	int32_t tmp;
+
+	sign = ((((a ^ b) ^ c) & 0x80000000) != 0);
+
+	if (c != 0) {
+		if (sign)
+			c = -c;
+		tmp = ((int32_t)a * b + (c >> 1)) / c;
+		if (tmp < MAX_INT)
+			ans = tmp;
+	}
+
+	if (sign)
+		ans = -ans;
+
+	return ans;
+}
+
+static int rk816_bat_vol_to_cap(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_cap;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_cap = ab_div_c(tmp, di->fcc, MAX_INTERPOLATE);
+
+	return ocv_cap;
+}
+
+static int rk816_bat_vol_to_soc(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_soc;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_soc = ab_div_c(tmp, MAX_PERCENTAGE, MAX_INTERPOLATE);
+
+	return ocv_soc;
+}
+
+static int rk816_bat_get_prev_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(REMAIN_CAP_REG3) << 24;
+	val |= rk816_bat_read(REMAIN_CAP_REG2) << 16;
+	val |= rk816_bat_read(REMAIN_CAP_REG1) << 8;
+	val |= rk816_bat_read(REMAIN_CAP_REG0) << 0;
+
+	return val;
+}
+
+static void rk816_bat_save_fcc(struct battery_info *di, u32 cap)
+{
+	u8 buf;
+
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(NEW_FCC_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(NEW_FCC_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(NEW_FCC_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(NEW_FCC_REG0, buf);
+}
+
+static int rk816_bat_get_fcc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(NEW_FCC_REG3) << 24;
+	val |= rk816_bat_read(NEW_FCC_REG2) << 16;
+	val |= rk816_bat_read(NEW_FCC_REG1) << 8;
+	val |= rk816_bat_read(NEW_FCC_REG0) << 0;
+
+	if (val < MIN_FCC)
+		val = di->design_cap;
+	else if (val > di->qmax)
+		val = di->qmax;
+
+	return val;
+}
+
+static u8 rk816_bat_get_pwroff_min(struct battery_info *di)
+{
+	u8 cur, last;
+
+	cur = rk816_bat_read(NON_ACT_TIMER_CNT_REG);
+	last = rk816_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
+	rk816_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+
+	return (cur != last) ? cur : 0;
+}
+
+static int rk816_bat_get_coulomb_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(GASCNT_REG3) << 24;
+	val |= rk816_bat_read(GASCNT_REG2) << 16;
+	val |= rk816_bat_read(GASCNT_REG1) << 8;
+	val |= rk816_bat_read(GASCNT_REG0) << 0;
+	val /= 2390;
+
+	return val;
+}
+
+static void rk816_bat_init_capacity(struct battery_info *di, u32 capacity)
+{
+	u8 buf;
+	u32 cap;
+	int delta;
+
+	delta = capacity - di->remain_cap;
+	if (!delta)
+		return;
+
+	cap = capacity * 2390;
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(GASCNT_CAL_REG0, buf);
+
+	di->remain_cap = rk816_bat_get_coulomb_cap(di);
+	di->rsoc = rk816_bat_get_rsoc(di);
+}
+
+static bool is_rk816_bat_ocv_valid(struct battery_info *di)
+{
+	return di->pwroff_min >= 30 ? true : false;
+}
+
+static int rk816_bat_get_usb_state(struct battery_info *di)
+{
+	int charger_type;
+
+	switch (rk816_bat_dwc_otg_check_dpdm()) {
+	case 0:
+		if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+			charger_type = DC_CHARGER;
+		else
+			charger_type = NO_CHARGER;
+		break;
+	case 1:
+	case 3:
+		charger_type = USB_CHARGER;
+		break;
+	case 2:
+		charger_type = AC_CHARGER;
+		break;
+	default:
+		charger_type = NO_CHARGER;
+	}
+
+	return charger_type;
+}
+
+static void rk816_bat_clr_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(MISC_MARK_REG);
+	val &= ~FG_INIT;
+	rk816_bat_write(MISC_MARK_REG, val);
+}
+
+static bool rk816_bat_is_initialized(struct battery_info *di)
+{
+	return (rk816_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+}
+
+static void rk816_bat_set_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk816_bat_read(MISC_MARK_REG);
+	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
+		val |= FG_INIT;
+		rk816_bat_write(MISC_MARK_REG, val);
+		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
+			 rk816_bat_get_est_voltage(di),
+			 rk816_bat_get_usb_state(di));
+	}
+}
+
+static void rk816_bat_first_pwron(struct battery_info *di)
+{
+	int ocv_vol;
+
+	rk816_bat_save_fcc(di, di->design_cap);
+	ocv_vol = rk816_bat_get_ocv_voltage(di);
+	di->fcc = rk816_bat_get_fcc(di);
+	di->nac = rk816_bat_vol_to_cap(di, ocv_vol);
+	di->rsoc = rk816_bat_vol_to_soc(di, ocv_vol);
+	di->dsoc = di->rsoc;
+	rk816_bat_init_capacity(di, di->nac);
+	rk816_bat_set_initialized_state(di);
+
+	BAT_INFO("first power on: soc=%d\n", di->dsoc);
+}
+
+static u8 rk816_bat_get_halt_cnt(struct battery_info *di)
+{
+	return rk816_bat_read(HALT_CNT_REG);
+}
+
+static void rk816_bat_inc_halt_cnt(struct battery_info *di)
+{
+	u8 cnt;
+
+	cnt = rk816_bat_read(HALT_CNT_REG);
+	rk816_bat_write(HALT_CNT_REG, ++cnt);
+}
+
+static bool is_rk816_bat_last_halt(struct battery_info *di)
+{
+	int pre_cap = rk816_bat_get_prev_cap(di);
+	int now_cap = rk816_bat_get_coulomb_cap(di);
+
+	/* over 5%: system halt last time */
+	if (abs(now_cap - pre_cap) > (di->fcc / 20)) {
+		rk816_bat_inc_halt_cnt(di);
+		return true;
+	} else {
+		return false;
+	}
+}
+
+static void rk816_bat_not_first_pwron(struct battery_info *di)
+{
+	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
+
+	di->fcc = rk816_bat_get_fcc(di);
+	pre_soc = rk816_bat_get_dsoc(di);
+	pre_cap = rk816_bat_get_prev_cap(di);
+	now_cap = rk816_bat_get_coulomb_cap(di);
+	di->pwr_dsoc = pre_soc;
+	di->pwr_rsoc = (now_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+	di->is_halt = is_rk816_bat_last_halt(di);
+	di->halt_cnt = rk816_bat_get_halt_cnt(di);
+	di->is_ocv_calib = is_rk816_bat_ocv_valid(di);
+
+	if (di->is_halt) {
+		BAT_INFO("system halt last time... cap: pre=%d, now=%d\n",
+			 pre_cap, now_cap);
+		if (now_cap < 0)
+			now_cap = 0;
+		rk816_bat_init_capacity(di, now_cap);
+		pre_cap = di->remain_cap;
+		pre_soc = di->rsoc;
+		goto finish;
+	} else if (di->is_ocv_calib) {
+		ocv_vol = rk816_bat_get_ocv_voltage(di);
+		ocv_soc = rk816_bat_vol_to_soc(di, ocv_vol);
+		ocv_cap = rk816_bat_vol_to_cap(di, ocv_vol);
+		pre_cap = ocv_cap;
+		BAT_INFO("do ocv calib.. rsoc=%d\n", ocv_soc);
+
+		if (abs(ocv_soc - pre_soc) >= di->max_soc_offset) {
+			BAT_INFO("trigger max soc offset, soc: %d -> %d\n",
+				 pre_soc, ocv_soc);
+			pre_soc = ocv_soc;
+			di->is_max_soc_offset = true;
+		}
+		BAT_INFO("OCV calib: cap=%d, rsoc=%d\n", ocv_cap, ocv_soc);
+	}
+finish:
+	di->dsoc = pre_soc;
+	di->nac = pre_cap;
+	rk816_bat_init_capacity(di, di->nac);
+	rk816_bat_set_initialized_state(di);
+	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d Ver=%s\n",
+		 di->dsoc, di->rsoc, di->remain_cap, di->pwroff_min,
+		 rk816_bat_get_avg_voltage(di), rk816_bat_get_ocv_voltage(di),
+		 rk816_bat_get_avg_current(di), rk816_bat_get_dsoc(di),
+		 rk816_bat_get_usb_state(di), DRIVER_VERSION
+		 );
+}
+
+static bool is_rk816_bat_first_poweron(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk816_bat_read(GGSTS_REG);
+	if (buf & BAT_CON) {
+		buf &= ~BAT_CON;
+		rk816_bat_write(GGSTS_REG, buf);
+		return true;
+	}
+
+	return false;
+}
+
+static bool rk816_bat_ocv_sw_reset(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk816_bat_read(MISC_MARK_REG);
+	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
+	    (buf & FG_RESET_NOW)) {
+		buf &= ~FG_RESET_LATE;
+		buf &= ~FG_RESET_NOW;
+		rk816_bat_write(MISC_MARK_REG, buf);
+		BAT_INFO("manual reset fuel gauge\n");
+		return true;
+	} else {
+		return false;
+	}
+}
+
+void rk816_bat_init_rsoc(struct battery_info *di)
+{
+	di->pwroff_min = rk816_bat_get_pwroff_min(di);
+	di->is_first_power_on = is_rk816_bat_first_poweron(di);
+	di->is_sw_reset = rk816_bat_ocv_sw_reset(di);
+
+	if (di->is_first_power_on || di->is_sw_reset)
+		rk816_bat_first_pwron(di);
+	else
+		rk816_bat_not_first_pwron(di);
+}
+
+static int rk816_bat_calc_linek(struct battery_info *di)
+{
+	int linek, diff, delta;
+
+	di->calc_dsoc = di->dsoc;
+	di->calc_rsoc = di->rsoc;
+	di->sm_old_cap = di->remain_cap;
+
+	delta = abs(di->dsoc - di->rsoc);
+	diff = delta * 3;
+	di->sm_meet_soc = (di->dsoc >= di->rsoc) ?
+			   (di->dsoc + diff) : (di->rsoc + diff);
+
+	if (di->dsoc < di->rsoc)
+		linek = 1000 * (delta + diff) / DIV(diff);
+	else if (di->dsoc > di->rsoc)
+		linek = 1000 * diff / DIV(delta + diff);
+	else
+		linek = 1000;
+
+	di->sm_chrg_dsoc = di->dsoc * 1000;
+
+	DBG("<%s>. meet=%d, diff=%d, link=%d, calc: dsoc=%d, rsoc=%d\n",
+	    __func__, di->sm_meet_soc, diff, linek,
+	    di->calc_dsoc, di->calc_rsoc);
+
+	return linek;
+}
+
+static int rk816_bat_get_coffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(CAL_OFFSET_REGL) << 0;
+	val |= rk816_bat_read(CAL_OFFSET_REGH) << 8;
+
+	return val;
+}
+
+static void rk816_bat_init_poffset(struct battery_info *di)
+{
+	int coffset, ioffset;
+
+	coffset = rk816_bat_get_coffset(di);
+	ioffset = rk816_bat_get_ioffset(di);
+	di->poffset = coffset - ioffset;
+}
+
+static int rk816_fg_init(struct battery_info *di)
+{
+	rk816_bat_enable_gauge(di);
+	rk816_bat_set_vol_instant_mode(di);
+	rk816_bat_init_voltage_kb(di);
+	rk816_bat_init_poffset(di);
+	rk816_bat_clr_initialized_state(di);
+	di->dsoc = rk816_bat_get_dsoc(di);
+
+	/* it's better to init fg in kernel,
+	 * so avoid init in uboot as far as possible
+	 */
+	if (rk816_bat_get_usb_state(di) != NO_CHARGER) {
+		if (rk816_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
+			rk816_bat_init_rsoc(di);
+#ifdef CONFIG_UBOOT_CHARGE
+		else
+			rk816_bat_init_rsoc(di);
+#endif
+	}
+
+	rk816_bat_init_chrg_config(di);
+	di->voltage_avg = rk816_bat_get_avg_voltage(di);
+	di->voltage_ocv = rk816_bat_get_ocv_voltage(di);
+	di->current_avg = rk816_bat_get_avg_current(di);
+	di->sm_linek = rk816_bat_calc_linek(di);
+	di->finish_chrg_base = get_timer(0);
+	di->pwr_vol = di->voltage_avg;
+
+	return 0;
+}
+
+static bool is_rk816_bat_exist(struct  battery_info *di)
+{
+	return (rk816_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+}
+
+static void rk816_bat_set_current(int input_current)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= (input_current);
+	rk816_bat_write(USB_CTRL_REG, usb_ctrl);
+}
+
+static void rk816_bat_charger_setting(struct battery_info *di, int charger)
+{
+	static u8 old_charger = UNDEF_CHARGER;
+
+	/*charger changed*/
+	if (old_charger != charger) {
+		if (charger == NO_CHARGER)
+			rk816_bat_set_current(ILIM_450MA);
+		else if (charger == USB_CHARGER)
+			rk816_bat_set_current(ILIM_450MA);
+		else if (charger == DC_CHARGER || charger == AC_CHARGER)
+			rk816_bat_set_current(di->chrg_cur_input);
+		else
+			BAT_INFO("charger setting error %d\n", charger);
+
+		old_charger = charger;
+	}
+}
+
+static int rk816_bat_get_dc_state(struct battery_info *di)
+{
+	/* struct adc_channel val; */
+
+	if (di->dc_type == DC_TYPE_OF_NONE) {
+		return NO_CHARGER;
+	} else if (di->dc_type == DC_TYPE_OF_ADC) {
+		/*
+		if (adc_channels_single_shot("saradc", 0, &val)) {
+			printf("read saradc value failed\n");
+			return NO_CHARGER;
+		}
+
+		return (val.data >= DC_ADC_TRIGGER) ? DC_CHARGER : NO_CHARGER;
+		*/
+		return NO_CHARGER;
+	} else {
+		return (dm_gpio_get_value(di->dc_det)) ?
+			DC_CHARGER : NO_CHARGER;
+	}
+}
+
+static int rk816_bat_get_charger_type(struct battery_info *di)
+{
+	int charger_type = NO_CHARGER;
+
+	/* check by ic hardware: this check make check work safer */
+	if ((rk816_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+		return NO_CHARGER;
+
+	/* virtual or bat not exist */
+	if (di->virtual_power)
+		return DC_CHARGER;
+
+	/* check DC first */
+	charger_type = rk816_bat_get_dc_state(di);
+	if (charger_type == DC_CHARGER)
+		return charger_type;
+
+	/* check USB second */
+	return rk816_bat_get_usb_state(di);
+}
+
+static void rk816_bat_save_dsoc(struct  battery_info *di, u8 save_soc)
+{
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk816_bat_write(SOC_REG, save_soc);
+	}
+}
+
+static void rk816_bat_save_cap(struct battery_info *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk816_bat_write(REMAIN_CAP_REG0, buf);
+}
+
+static u8 rk816_bat_get_chrg_status(struct battery_info *di)
+{
+	u8 status;
+
+	status = rk816_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	switch (status) {
+	case CHARGE_OFF:
+		DBG("CHARGE-OFF...\n");
+		break;
+	case DEAD_CHARGE:
+		DBG("DEAD CHARGE...\n");
+		break;
+	case  TRICKLE_CHARGE:
+		DBG("TRICKLE CHARGE...\n ");
+		break;
+	case  CC_OR_CV:
+		DBG("CC or CV...\n");
+		break;
+	case  CHARGE_FINISH:
+		DBG("CHARGE FINISH...\n");
+		break;
+	case  USB_OVER_VOL:
+		DBG("USB OVER VOL...\n");
+		break;
+	case  BAT_TMP_ERR:
+		DBG("BAT TMP ERROR...\n");
+		break;
+	case  TIMER_ERR:
+		DBG("TIMER ERROR...\n");
+		break;
+	case  USB_EXIST:
+		DBG("USB EXIST...\n");
+		break;
+	case  USB_EFF:
+		DBG(" USB EFF...\n");
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return status;
+}
+
+static void rk816_bat_finish_chrg(struct battery_info *di)
+{
+	u32 tgt_sec = 0;
+
+	if (di->dsoc < 100) {
+		tgt_sec = di->fcc * 3600 / 100 / FINISH_CALI_CURR;
+		if (get_timer(di->finish_chrg_base) > SECONDS(tgt_sec)) {
+			di->finish_chrg_base = get_timer(0);
+			di->dsoc++;
+		}
+	}
+	DBG("<%s>. sec=%d, finish_sec=%lu\n", __func__, SECONDS(tgt_sec),
+	    get_timer(di->finish_chrg_base));
+}
+
+static void rk816_bat_debug_info(struct battery_info *di)
+{
+	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
+	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
+	static const char *name[] = {"NONE", "USB", "AC", "DC", "UNDEF"};
+
+	if (!dbg_enable)
+		return;
+	ggcon = rk816_bat_read(GGCON_REG);
+	ggsts = rk816_bat_read(GGSTS_REG);
+	sup_sts = rk816_bat_read(SUP_STS_REG);
+	usb_ctrl = rk816_bat_read(USB_CTRL_REG);
+	thermal = rk816_bat_read(THERMAL_REG);
+	vb_mod = rk816_bat_read(VB_MON_REG);
+	misc = rk816_bat_read(MISC_MARK_REG);
+	rtc = rk816_bat_read(SECONDS_REG);
+	chrg_ctrl1 = rk816_bat_read(CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk816_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk816_bat_read(CHRG_CTRL_REG3);
+
+	DBG("\n---------------------- DEBUG REGS ------------------------\n"
+	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
+	    "VB_MOD=0x%2x, USB_CTRL=0x%2x, THERMAL=0x%2x, MISC=0x%2x\n"
+	    "CHRG_CTRL:REG1=0x%2x, REG2=0x%2x, REG3=0x%2x\n",
+	    ggcon, ggsts, rtc, sup_sts, vb_mod, usb_ctrl,
+	    thermal, misc, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3
+	    );
+	DBG("----------------------------------------------------------\n"
+	    "Dsoc=%d, Rsoc=%d, Vavg=%d, Iavg=%d, Cap=%d, Fcc=%d, d=%d\n"
+	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d\n"
+	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d\n"
+	    "off: i=0x%x, c=0x%x, max=%d, ocv_c=%d, halt: st=%d, cnt=%d\n"
+	    "pwr: dsoc=%d, rsoc=%d, vol=%d, exist=%d\n",
+	    di->dsoc, rk816_bat_get_rsoc(di), rk816_bat_get_avg_voltage(di),
+	    rk816_bat_get_avg_current(di), di->remain_cap, di->fcc,
+	    di->rsoc - di->dsoc,
+	    di->sm_linek, di->sm_old_cap, name[di->chrg_type],
+	    CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+	    CHRG_CUR_INPUT[usb_ctrl & 0x0f],
+	    CHRG_VOL_SEL[(chrg_ctrl1 & 0x70) >> 4],  di->pwroff_min,
+	    di->sm_meet_soc, di->calc_dsoc, di->calc_rsoc,
+	    rk816_bat_get_ocv_voltage(di), rk816_bat_get_ioffset(di),
+	    rk816_bat_get_coffset(di), di->is_max_soc_offset,
+	    di->is_ocv_calib, di->is_halt, di->halt_cnt, di->pwr_dsoc,
+	    di->pwr_rsoc, di->pwr_vol, is_rk816_bat_exist(di)
+	    );
+	rk816_bat_get_chrg_status(di);
+	DBG("###########################################################\n");
+}
+
+static void rk816_bat_linek_algorithm(struct battery_info *di)
+{
+	int delta_cap, ydsoc, tmp;
+	u8 chg_st = rk816_bat_get_chrg_status(di);
+
+	/* slow down */
+	if (di->dsoc == 99)
+		di->sm_linek = CHRG_FULL_K;
+	else if (di->dsoc >= CHRG_TERM_DSOC && di->current_avg > TERM_CALI_CURR)
+		di->sm_linek = CHRG_TERM_K;
+
+	delta_cap = di->remain_cap - di->sm_old_cap;
+	ydsoc = di->sm_linek * delta_cap * 100 / DIV(di->fcc);
+	if (ydsoc > 0) {
+		tmp = (di->sm_chrg_dsoc + 1) / 1000;
+		if (tmp != di->dsoc)
+			di->sm_chrg_dsoc = di->dsoc * 1000;
+		di->sm_chrg_dsoc += ydsoc;
+		di->dsoc = (di->sm_chrg_dsoc + 1) / 1000;
+		di->sm_old_cap = di->remain_cap;
+		if (di->dsoc == di->rsoc && di->sm_linek != CHRG_FULL_K &&
+		    di->sm_linek != CHRG_TERM_K)
+			di->sm_linek = 1000;
+	}
+
+	if ((di->sm_linek == 1000 || di->dsoc >= 100) &&
+	    (chg_st != CHARGE_FINISH)) {
+		if (di->sm_linek == 1000)
+			di->dsoc = di->rsoc;
+		di->sm_chrg_dsoc = di->dsoc * 1000;
+	}
+
+	DBG("linek=%d, sm_dsoc=%d, delta_cap=%d, ydsoc=%d, old_cap=%d\n"
+	    "calc: dsoc=%d, rsoc=%d, meet=%d\n",
+	    di->sm_linek, di->sm_chrg_dsoc, delta_cap, ydsoc, di->sm_old_cap,
+	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
+}
+
+static int rk816_bat_get_iadc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk816_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk816_bat_read(BAT_CUR_AVG_REGH) << 8;
+	if (val > 2047)
+		val -= 4096;
+
+	return val;
+}
+
+static bool rk816_bat_adc_calib(struct battery_info *di)
+{
+	int i, ioffset, coffset, adc;
+
+	if (abs(di->current_avg) < ADC_CALIB_THRESHOLD)
+		return false;
+
+	for (i = 0; i < 5; i++) {
+		adc = rk816_bat_get_iadc(di);
+		coffset = rk816_bat_get_coffset(di);
+		rk816_bat_set_coffset(di, coffset + adc);
+		mdelay(200);
+		adc = rk816_bat_get_iadc(di);
+		if (abs(adc) < ADC_CALIB_THRESHOLD) {
+			coffset = rk816_bat_get_coffset(di);
+			ioffset = rk816_bat_get_ioffset(di);
+			di->poffset = coffset - ioffset;
+			rk816_bat_write(POFFSET_REG, di->poffset);
+			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
+				 coffset, ioffset, di->poffset);
+			return true;
+		} else {
+			BAT_INFO("coffset calib again %d..\n", i);
+			rk816_bat_set_coffset(di, coffset);
+			mdelay(200);
+		}
+	}
+
+	return false;
+}
+
+static void rk816_bat_smooth_charge(struct battery_info *di)
+{
+	u8 chg_st = rk816_bat_get_chrg_status(di);
+
+	if (di->vol_mode_base && get_timer(di->vol_mode_base) > SECONDS(10)) {
+		rk816_bat_set_vol_avg_mode(di);
+		di->vol_mode_base = 0;
+	}
+
+	/* not charge mode and not keep in uboot charge: exit */
+	if ((di->chrg_type == NO_CHARGER) ||
+	    !rk816_bat_is_initialized(di)) {
+		DBG("chrg=%d, initialized=%d\n", di->chrg_type,
+		    rk816_bat_is_initialized(di));
+		goto out;
+	}
+
+	/* update rsoc and remain cap */
+	di->remain_cap = rk816_bat_get_coulomb_cap(di);
+	di->rsoc = rk816_bat_get_rsoc(di);
+	if (di->remain_cap > di->fcc) {
+		di->sm_old_cap -= (di->remain_cap - di->fcc);
+		rk816_bat_init_capacity(di, di->fcc);
+	}
+
+	/* finish charge step */
+	if (chg_st == CHARGE_FINISH) {
+		DBG("finish charge step...\n");
+		if (di->adc_allow_update)
+			di->adc_allow_update = !rk816_bat_adc_calib(di);
+		rk816_bat_finish_chrg(di);
+		rk816_bat_init_capacity(di, di->fcc);
+	} else {
+		DBG("smooth charge step...\n");
+		di->adc_allow_update = true;
+		di->finish_chrg_base = get_timer(0);
+		rk816_bat_linek_algorithm(di);
+	}
+
+	/* dsoc limit */
+	if (di->dsoc > 100)
+		di->dsoc = 100;
+	else if (di->dsoc < 0)
+		di->dsoc = 0;
+
+	rk816_bat_save_dsoc(di, di->dsoc);
+	rk816_bat_save_cap(di, di->remain_cap);
+out:
+	rk816_bat_debug_info(di);
+}
+
+static int rk816_bat_update_get_soc(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+	static ulong seconds;
+
+	/* set charge current */
+	di->chrg_type =
+		rk816_bat_get_charger_type(di);
+	rk816_bat_charger_setting(di, di->chrg_type);
+
+	/* fg calc every 5 seconds */
+	if (!seconds)
+		seconds = get_timer(0);
+	if (get_timer(seconds) >= SECONDS(5)) {
+		seconds = get_timer(0);
+		rk816_bat_smooth_charge(di);
+	}
+
+	/* bat exist, fg init success(dts pass) and uboot charge: report data */
+	if (!di->virtual_power && di->voltage_k)
+		return di->dsoc;
+	else
+		return VIRTUAL_POWER_SOC;
+}
+
+static int rk816_bat_update_get_voltage(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk816_bat_get_est_voltage(di);
+	else
+		return VIRTUAL_POWER_VOL;
+}
+
+static bool rk816_bat_update_get_chrg_online(struct udevice *dev)
+{
+	return rk816_bat_dwc_otg_check_dpdm();
+}
+
+static struct dm_fuel_gauge_ops fg_ops = {
+	.get_soc = rk816_bat_update_get_soc,
+	.get_voltage = rk816_bat_update_get_voltage,
+	.get_chrg_online = rk816_bat_update_get_chrg_online,
+};
+
+static int rk816_bat_parse_dt(struct battery_info *di, void const *blob)
+{
+	int node, parent, len, err;
+	const char *prop;
+
+	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk816");
+	if (parent < 0) {
+		printf("can't find rockchip,rk816 node\n");
+		return -ENODEV;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, parent)) {
+		DBG("rk816 node disabled\n");
+		return -ENODEV;
+	}
+
+	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
+	if (node < 0) {
+		debug("can't find battery node\n");
+		di->chrg_cur_input = ILIM_2000MA;
+		return -EINVAL;
+	}
+
+	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	if (!prop) {
+		printf("can't find ocv_table prop\n");
+		return -EINVAL;
+	}
+
+	di->ocv_table = calloc(len, 1);
+	if (!di->ocv_table) {
+		printf("can't calloc ocv_table\n");
+		return -ENOMEM;
+	}
+
+	di->ocv_size = len / 4;
+	err = fdtdec_get_int_array(blob, node, "ocv_table",
+				   di->ocv_table, di->ocv_size);
+	if (err < 0) {
+		printf("read ocv_table error\n");
+		free(di->ocv_table);
+		return -EINVAL;
+	}
+
+	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	if (di->design_cap < 0) {
+		printf("read design_capacity error\n");
+		return -EINVAL;
+	}
+
+	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	if (di->qmax < 0) {
+		printf("read design_qmax error\n");
+		return -EINVAL;
+	}
+
+	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
+	di->dts_cur_input = fdtdec_get_int(blob, node,
+					   "max_input_current", 2000);
+	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
+	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
+	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
+	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
+	di->dc_det_adc = fdtdec_get_int(blob, node, "dc_det_adc", 0);
+	if (di->dc_det_adc <= 0) {
+		if (!gpio_request_by_name_nodev(offset_to_ofnode(node),
+						"dc_det_gpio",
+						0, di->dc_det, GPIOD_IS_IN)) {
+			di->dc_type = DC_TYPE_OF_GPIO;
+		} else {
+			di->dc_type = DC_TYPE_OF_NONE;
+		}
+	} else {
+		di->dc_type = DC_TYPE_OF_ADC;
+	}
+
+	if (!is_rk816_bat_exist(di))
+		di->virtual_power = 1;
+
+	DBG("-------------------------------:\n");
+	DBG("max_input_current:%d\n", di->dts_cur_input);
+	DBG("max_chrg_current:%d\n", di->dts_cur_sel);
+	DBG("max_chrg_voltage:%d\n", di->dts_vol_sel);
+	DBG("design_capacity :%d\n", di->design_cap);
+	DBG("design_qmax:%d\n", di->qmax);
+	DBG("max_soc_offset:%d\n", di->max_soc_offset);
+	DBG("dc_det_adc:%d\n", di->dc_det_adc);
+
+	return 0;
+}
+
+static int rk816_fg_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	struct battery_info *di = dev_get_priv(dev);
+	int ret;
+
+	if (priv->variant != 0x8160) {
+		debug("Not support pmic variant: rk%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	g_pmic_dev = dev->parent;
+	ret = rk816_bat_parse_dt(di, gd->fdt_blob);
+	if (ret)
+		return ret;
+
+	return rk816_fg_init(di);
+}
+
+U_BOOT_DRIVER(rk816_fg) = {
+	.name = "rk816_fg",
+	.id = UCLASS_FG,
+	.probe = rk816_fg_probe,
+	.ops = &fg_ops,
+	.priv_auto_alloc_size = sizeof(struct battery_info),
+};
+

commit a00c88f53292ac0cd3d3df288004b663371d7645
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 14 20:27:52 2017 +0800

    power: fuel gauge: add rk818 support
    
    Change-Id: I73dced9e62dd247a886868a320d3488f02755265
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
index 8b08a90f99..78b5963536 100644
--- a/drivers/power/fuel_gauge/Kconfig
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -4,3 +4,8 @@ config DM_FUEL_GAUGE
 	help
 	  This adds a simple uclass for fuel gauge.
 
+config POWER_FG_RK818
+	bool "RK818 Fuel gauge support"
+	depends on DM_FUEL_GAUGE && PMIC_RK8XX
+	help
+	  This adds support for RK818 fuel gauge support.
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 75d762e01f..0b84981222 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -8,3 +8,4 @@
 obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
 
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
+obj-$(CONFIG_POWER_FG_RK818) += fg_rk818.o
diff --git a/drivers/power/fuel_gauge/fg_regs.h b/drivers/power/fuel_gauge/fg_regs.h
new file mode 100644
index 0000000000..cbbceb7060
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_regs.h
@@ -0,0 +1,95 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _FG_RK8XX_H_
+#define _FG_RK8XX_H_
+
+/* register definition */
+#define SECONDS_REG		0X00
+#define VB_MON_REG		0x21
+#define THERMAL_REG		0x22
+#define SUP_STS_REG		0xA0
+#define USB_CTRL_REG		0xA1
+#define CHRG_CTRL_REG1		0xA3
+#define CHRG_CTRL_REG2		0xA4
+#define CHRG_CTRL_REG3		0xA5
+#define BAT_CTRL_REG		0xA6
+#define BAT_HTS_TS_REG		0xA8
+#define BAT_LTS_TS_REG		0xA9
+#define TS_CTRL_REG		0xAC
+#define ADC_CTRL_REG		0xAD
+#define GGCON_REG		0xB0
+#define GGSTS_REG		0xB1
+#define ZERO_CUR_ADC_REGH	0xB2
+#define ZERO_CUR_ADC_REGL	0xB3
+#define GASCNT_CAL_REG3		0xB4
+#define GASCNT_CAL_REG2		0xB5
+#define GASCNT_CAL_REG1		0xB6
+#define GASCNT_CAL_REG0		0xB7
+#define GASCNT_REG3		0xB8
+#define GASCNT_REG2		0xB9
+#define GASCNT_REG1		0xBA
+#define GASCNT_REG0		0xBB
+#define BAT_CUR_AVG_REGH	0xBC
+#define BAT_CUR_AVG_REGL	0xBD
+#define TS_ADC_REGH		0xBE
+#define TS_ADC_REGL		0xBF
+#define RK818_TS2_ADC_REGH	0xC0
+#define RK818_TS2_ADC_REGL	0xC1
+#define RK816_USB_ADC_REGH	0xC0
+#define RK816_USB_ADC_REGL	0xC1
+#define BAT_OCV_REGH		0xC2
+#define BAT_OCV_REGL		0xC3
+#define BAT_VOL_REGH		0xC4
+#define BAT_VOL_REGL		0xC5
+#define RELAX_ENTRY_THRES_REGH	0xC6
+#define RELAX_ENTRY_THRES_REGL	0xC7
+#define RELAX_EXIT_THRES_REGH	0xC8
+#define RELAX_EXIT_THRES_REGL	0xC9
+#define RELAX_VOL1_REGH		0xCA
+#define RELAX_VOL1_REGL		0xCB
+#define RELAX_VOL2_REGH		0xCC
+#define RELAX_VOL2_REGL		0xCD
+#define RELAX_CUR1_REGH		0xCE
+#define RELAX_CUR1_REGL		0xCF
+#define RELAX_CUR2_REGH		0xD0
+#define RELAX_CUR2_REGL		0xD1
+#define CAL_OFFSET_REGH		0xD2
+#define CAL_OFFSET_REGL		0xD3
+#define NON_ACT_TIMER_CNT_REG	0xD4
+#define VCALIB0_REGH		0xD5
+#define VCALIB0_REGL		0xD6
+#define VCALIB1_REGH		0xD7
+#define VCALIB1_REGL		0xD8
+#define FCC_GASCNT_REG3		0xD9
+#define FCC_GASCNT_REG2		0xDA
+#define FCC_GASCNT_REG1		0xDB
+#define FCC_GASCNT_REG0		0xDC
+#define IOFFSET_REGH		0xDD
+#define IOFFSET_REGL		0xDE
+#define SLEEP_CON_SAMP_CUR_REG	0xDF
+#define SOC_REG			0xE0
+#define	REMAIN_CAP_REG3		0xE1
+#define	REMAIN_CAP_REG2		0xE2
+#define	REMAIN_CAP_REG1		0xE3
+#define	REMAIN_CAP_REG0		0xE4
+#define	UPDAT_LEVE_REG		0xE5
+#define	NEW_FCC_REG3		0xE6
+#define	NEW_FCC_REG2		0xE7
+#define	NEW_FCC_REG1		0xE8
+#define	NEW_FCC_REG0		0xE9
+#define NON_ACT_TIMER_CNT_SAVE_REG 0xEA
+#define OCV_VOL_VALID_REG	0xEB
+#define REBOOT_CNT_REG		0xEC
+#define POFFSET_REG		0xED
+#define MISC_MARK_REG		0xEE
+#define HALT_CNT_REG          	0xEF
+#define DATA15_REG		0xEF
+#define DATA16_REG		0xF0
+#define DATA17_REG		0xF1
+#define DATA18_REG		0xF2
+
+#endif
diff --git a/drivers/power/fuel_gauge/fg_rk818.c b/drivers/power/fuel_gauge/fg_rk818.c
new file mode 100644
index 0000000000..b05a2100da
--- /dev/null
+++ b/drivers/power/fuel_gauge/fg_rk818.c
@@ -0,0 +1,1514 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <errno.h>
+#include <common.h>
+#include <malloc.h>
+#include <fdtdec.h>
+#include <asm/gpio.h>
+#include <common.h>
+#include <power/pmic.h>
+#include <power/fuel_gauge.h>
+#include <power/rk8xx_pmic.h>
+#include <linux/usb/phy-rockchip-inno-usb2.h>
+#include "fg_regs.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int dbg_enable = 0;
+#define DBG(args...) \
+	do { \
+		if (dbg_enable) { \
+			printf(args); \
+		} \
+	} while (0)
+
+#define BAT_INFO(fmt, args...) printf("rk818-bat: "fmt, ##args)
+
+#define DRIVER_VERSION		"2.0"
+
+/* THERMAL_REG */
+#define TEMP_105C		(0x02 << 2)
+#define TEMP_115C		(0x03 << 2)
+#define FB_TEMP_MSK		0x0c
+
+/* CHRG_CTRL_REG2 */
+#define FINISH_100MA		(0x00 << 6)
+#define FINISH_150MA		(0x01 << 6)
+#define FINISH_200MA		(0x02 << 6)
+#define FINISH_250MA		(0x03 << 6)
+#define FINISH_CUR_MSK		0xc7
+
+/* CHRG_CTRL_REG3 */
+#define CHRG_TERM_DIG_SIGNAL	(1 << 5)
+#define CHRG_TERM_ANA_SIGNAL	(0 << 5)
+#define CHRG_TIMER_CCCV_EN	(1 << 2)
+#define CHRG_TERM_SIG_MSK	(1 << 5)
+
+/* CHRG_CTRL_REG */
+#define ILIM_450MA		(0x00)
+#define ILIM_80MA		(0x01)
+#define ILIM_850MA		(0x02)
+#define ILIM_2000MA		(0x07)
+#define CHRG_CT_EN		(1 << 7)
+
+/* USB_CTRL_REG */
+#define INPUT_CUR_MSK		0x0f
+
+/* VB_MON_REG */
+#define PLUG_IN_STS		(1 << 6)
+
+/* GGSTS */
+#define BAT_CON			(1 << 4)
+#define VOL_INSTANT		(1 << 0)
+#define VOL_AVG			(0 << 0)
+
+/* TS_CTRL_REG */
+#define GG_EN			(1 << 7)
+
+/* CHRG_USB_CTRL */
+#define CHRG_EN			(1 << 7)
+
+#define ADC_TS2_EN		(1 << 4)
+#define TS2_ADC_MODE		(1 << 5)
+
+/* SUP_STS_REG */
+#define BAT_EXS			(1 << 7)
+#define USB_EXIST		(1 << 1)
+#define USB_EFF			(1 << 0)
+#define CHARGE_OFF		(0x00 << 4)
+#define DEAD_CHARGE		(0x01 << 4)
+#define TRICKLE_CHARGE		(0x02 << 4)
+#define CC_OR_CV		(0x03 << 4)
+#define CHARGE_FINISH		(0x04 << 4)
+#define USB_OVER_VOL		(0x05 << 4)
+#define BAT_TMP_ERR		(0x06 << 4)
+#define TIMER_ERR		(0x07 << 4)
+#define USB_VLIMIT_EN		(1 << 3)
+#define USB_CLIMIT_EN		(1 << 2)
+#define BAT_STATUS_MSK		0x70
+
+/* GGCON */
+#define ADC_CUR_MODE		(1 << 1)
+
+/* CALI PARAM */
+#define FINISH_CALI_CURR	1500
+#define TERM_CALI_CURR		600
+#define	VIRTUAL_POWER_VOL	4200
+#define	VIRTUAL_POWER_SOC	66
+#define SECONDS(n)		((n) * 1000)
+
+/* CALC PARAM */
+#define MAX_PERCENTAGE		100
+#define MAX_INTERPOLATE		1000
+#define MAX_INT			0x7fff
+#define MIN_FCC			500
+
+/* sample resistor and division */
+#define SAMPLE_RES_10mR		10
+#define SAMPLE_RES_20mR		20
+#define SAMPLE_RES_DIV1		1
+#define SAMPLE_RES_DIV2		2
+
+#define FG_INIT			(1 << 5)
+#define FG_RESET_LATE		(1 << 4)
+#define FG_RESET_NOW		(1 << 3)
+
+#define DEFAULT_POFFSET		42
+#define DEFAULT_COFFSET		0x832
+#define INVALID_COFFSET_MIN	0x780
+#define INVALID_COFFSET_MAX	0x980
+
+#define CHRG_TERM_DSOC		90
+#define CHRG_TERM_K		650
+#define CHRG_FULL_K		400
+#define ADC_CALIB_THRESHOLD	4
+
+#define TS2_THRESHOLD_VOL	4350
+#define TS2_VALID_VOL		1000
+#define TS2_VOL_MULTI		0
+#define TS2_CHECK_CNT		5
+
+#define DIV(x)			((x) ? (x) : 1)
+
+/* charger type definition */
+enum charger_type {
+	NO_CHARGER = 0,
+	USB_CHARGER,
+	AC_CHARGER,
+	DC_CHARGER,
+	UNDEF_CHARGER,
+};
+
+struct battery_info {
+	int		chrg_type;
+	int		poffset;
+	int		bat_res;
+	int		current_avg;
+	int		voltage_avg;
+	int		voltage_ocv;
+	int		voltage_k;
+	int		voltage_b;
+	int		dsoc;
+	int		rsoc;
+	int		fcc;
+	int		qmax;
+	int		remain_cap;
+	int		design_cap;
+	int		nac;
+	u32		*ocv_table;
+	u32		ocv_size;
+	int		virtual_power;
+	int		ts2_vol_multi;
+	int		pwroff_min;
+	int		sm_old_cap;
+	int		sm_linek;
+	int		sm_chrg_dsoc;
+	int		adc_allow_update;
+	int		chrg_vol_sel;
+	int		chrg_cur_input;
+	int		chrg_cur_sel;
+	int		dts_vol_sel;
+	int		dts_cur_input;
+	int		dts_cur_sel;
+	int		max_soc_offset;
+	int		sample_res;
+	int		res_div;
+	struct gpio_desc *dc_det;
+	int		dc_det_adc;
+	ulong		finish_chrg_base;
+	ulong		term_sig_base;
+	u8		calc_dsoc;
+	u8		calc_rsoc;
+	int		sm_meet_soc;
+	u8		halt_cnt;
+	u8		dc_active_level;
+	bool		dc_is_valid;
+	bool		is_halt;
+	bool		is_ocv_calib;
+	bool		is_max_soc_offset;
+	bool		is_first_power_on;
+	bool		is_sw_reset;
+	int		pwr_dsoc;
+	int		pwr_rsoc;
+	int		pwr_vol;
+};
+
+static struct udevice *g_pmic_dev;
+
+/* TODO */
+#define CONFIG_SCREEN_ON_VOL_THRESD	3400
+
+static const u32 CHRG_VOL_SEL[] = {
+	4050, 4100, 4150, 4200, 4250, 4300, 4350
+};
+
+static const u32 CHRG_CUR_SEL[] = {
+	1000, 1200, 1400, 1600, 1800, 2000, 2250, 2400, 2600, 2800, 3000
+};
+
+static const u32 CHRG_CUR_INPUT[] = {
+	450, 800, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000
+};
+
+static int rk818_bat_read(u8 reg)
+{
+	return pmic_reg_read(g_pmic_dev, reg);
+}
+
+static void rk818_bat_write(u8 reg, u8 buf)
+{
+	pmic_reg_write(g_pmic_dev, reg, buf);
+}
+
+static int rk818_bat_dwc_otg_check_dpdm(void)
+{
+	return rockchip_chg_get_type();
+}
+
+static int rk818_bat_get_rsoc(struct battery_info *di)
+{
+	return (di->remain_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+}
+
+static int rk818_bat_get_dsoc(struct  battery_info *di)
+{
+	return rk818_bat_read(SOC_REG);
+}
+
+static void rk818_bat_enable_gauge(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk818_bat_read(TS_CTRL_REG);
+	val |= GG_EN;
+	rk818_bat_write(TS_CTRL_REG, val);
+}
+
+static int rk818_bat_get_vcalib0(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(VCALIB0_REGL) << 0;
+	val |= rk818_bat_read(VCALIB0_REGH) << 8;
+
+	return val;
+}
+
+static int rk818_bat_get_vcalib1(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(VCALIB1_REGL) << 0;
+	val |= rk818_bat_read(VCALIB1_REGH) << 8;
+
+	return val;
+}
+
+static int rk818_bat_get_coffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(CAL_OFFSET_REGL) << 0;
+	val |= rk818_bat_read(CAL_OFFSET_REGH) << 8;
+
+	DBG("<%s>. coffset: 0x%x\n", __func__, val);
+	return val;
+}
+
+static void rk818_bat_set_coffset(struct battery_info *di, int val)
+{
+	u8 buf;
+
+	buf = (val >> 0) & 0xff;
+	rk818_bat_write(CAL_OFFSET_REGL, buf);
+	buf = (val >> 8) & 0xff;
+	rk818_bat_write(CAL_OFFSET_REGH, buf);
+
+	DBG("<%s>. set coffset: 0x%x\n", __func__, val);
+}
+
+static int rk818_bat_get_ioffset(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(IOFFSET_REGL) << 0;
+	val |= rk818_bat_read(IOFFSET_REGH) << 8;
+
+	DBG("<%s>. ioffset: 0x%x\n", __func__, val);
+	return val;
+}
+
+static void rk818_bat_init_coffset(struct battery_info *di)
+{
+	int ioffset, coffset;
+
+	ioffset = rk818_bat_get_ioffset(di);
+
+	di->poffset = rk818_bat_read(POFFSET_REG);
+	if (!di->poffset)
+		di->poffset = DEFAULT_POFFSET;
+
+	coffset = di->poffset + ioffset;
+	if (coffset < INVALID_COFFSET_MIN || coffset > INVALID_COFFSET_MAX)
+		coffset = DEFAULT_COFFSET;
+
+	rk818_bat_set_coffset(di, coffset);
+}
+
+static void rk818_bat_init_voltage_kb(struct battery_info *di)
+{
+	int vcalib0, vcalib1;
+
+	vcalib0 = rk818_bat_get_vcalib0(di);
+	vcalib1 = rk818_bat_get_vcalib1(di);
+	di->voltage_k = (4200 - 3000) * 1000 / DIV(vcalib1 - vcalib0);
+	di->voltage_b = 4200 - (di->voltage_k * vcalib1) / 1000;
+	DBG("%s. vk=%d, vb=%d\n", __func__, di->voltage_k, di->voltage_b);
+}
+
+static int rk818_bat_get_ocv_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk818_bat_read(BAT_OCV_REGL) << 0;
+	val |= rk818_bat_read(BAT_OCV_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+
+	return vol;
+}
+
+static int rk818_bat_get_avg_current(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+
+	if (val & 0x800)
+		val -= 4096;
+	val = val * di->res_div * 1506 / 1000;
+
+	return val;
+}
+
+static int rk818_bat_get_avg_voltage(struct battery_info *di)
+{
+	int vol, val = 0;
+
+	val |= rk818_bat_read(BAT_VOL_REGL) << 0;
+	val |= rk818_bat_read(BAT_VOL_REGH) << 8;
+	vol = di->voltage_k * val / 1000 + di->voltage_b;
+
+	return vol;
+}
+
+static int rk818_bat_get_est_voltage(struct battery_info *di)
+{
+	int est_vol, vol, curr;
+
+	vol = rk818_bat_get_avg_voltage(di);
+	curr = rk818_bat_get_avg_current(di);
+	est_vol = vol - (di->bat_res * curr / 1000);
+
+	return (est_vol > 2800) ? est_vol : vol;
+}
+
+static u8 rk818_bat_finish_ma(struct battery_info *di, int fcc)
+{
+	u8 ma;
+
+	if (di->res_div == 2)
+		ma = FINISH_100MA;
+	else if (fcc > 5000)
+		ma = FINISH_250MA;
+	else if (fcc >= 4000)
+		ma = FINISH_200MA;
+	else if (fcc >= 3000)
+		ma = FINISH_150MA;
+	else
+		ma = FINISH_100MA;
+
+	return ma;
+}
+
+static void rk818_bat_select_chrg_cv(struct battery_info *di)
+{
+	int index, chrg_vol_sel, chrg_cur_sel, chrg_cur_input;
+
+	chrg_vol_sel = di->dts_vol_sel;
+	chrg_cur_sel = di->dts_cur_sel;
+	chrg_cur_input = di->dts_cur_input;
+	if (di->sample_res == SAMPLE_RES_10mR) {
+		if (chrg_cur_sel > 2000)
+			chrg_cur_sel /= di->res_div;
+		else
+			chrg_cur_sel = 1000;
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_VOL_SEL); index++) {
+		if (chrg_vol_sel < CHRG_VOL_SEL[index])
+			break;
+		di->chrg_vol_sel = (index << 4);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_INPUT); index++) {
+		if (chrg_cur_input < CHRG_CUR_INPUT[index])
+			break;
+		di->chrg_cur_input = (index << 0);
+	}
+
+	for (index = 0; index < ARRAY_SIZE(CHRG_CUR_SEL); index++) {
+		if (chrg_cur_sel < CHRG_CUR_SEL[index])
+			break;
+		di->chrg_cur_sel = (index << 0);
+	}
+
+	DBG("<%s>. vol=0x%x, input=0x%x, sel=0x%x\n",
+	    __func__, di->chrg_vol_sel, di->chrg_cur_input, di->chrg_cur_sel);
+}
+
+static void rk818_bat_init_chrg_config(struct battery_info *di)
+{
+	u8 chrg_ctrl1, usb_ctrl, chrg_ctrl2, chrg_ctrl3;
+	u8 sup_sts, ggcon, thermal, finish_ma;
+
+	rk818_bat_select_chrg_cv(di);
+	finish_ma = rk818_bat_finish_ma(di, di->fcc);
+
+	ggcon = rk818_bat_read(GGCON_REG);
+	sup_sts = rk818_bat_read(SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	thermal = rk818_bat_read(THERMAL_REG);
+	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+
+	/* set charge current and voltage */
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= di->chrg_cur_input;
+	chrg_ctrl1 = (CHRG_EN | di->chrg_vol_sel | di->chrg_cur_sel);
+
+	/* digital signal and finish current*/
+	chrg_ctrl3 &= ~CHRG_TERM_SIG_MSK;
+	chrg_ctrl3 |= CHRG_TERM_ANA_SIGNAL;
+	chrg_ctrl2 &= ~FINISH_CUR_MSK;
+	chrg_ctrl2 |= finish_ma;
+
+	/* cccv mode */
+	chrg_ctrl3 &= ~CHRG_TIMER_CCCV_EN;
+
+	/* enable voltage limit and enable input current limit */
+	sup_sts &= ~USB_VLIMIT_EN;
+	sup_sts |= USB_CLIMIT_EN;
+
+	/* set feedback temperature */
+	usb_ctrl |= CHRG_CT_EN;
+	thermal &= ~FB_TEMP_MSK;
+	thermal |= TEMP_105C;
+
+	/* adc current mode */
+	ggcon |= ADC_CUR_MODE;
+
+	rk818_bat_write(GGCON_REG, ggcon);
+	rk818_bat_write(SUP_STS_REG, sup_sts);
+	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
+	rk818_bat_write(THERMAL_REG, thermal);
+	rk818_bat_write(CHRG_CTRL_REG1, chrg_ctrl1);
+	rk818_bat_write(CHRG_CTRL_REG2, chrg_ctrl2);
+	rk818_bat_write(CHRG_CTRL_REG3, chrg_ctrl3);
+}
+
+static u32 interpolate(int value, u32 *table, int size)
+{
+	uint8_t i;
+	uint16_t d;
+
+	for (i = 0; i < size; i++) {
+		if (value < table[i])
+			break;
+	}
+
+	if ((i > 0) && (i < size)) {
+		d = (value - table[i - 1]) * (MAX_INTERPOLATE / (size - 1));
+		d /= table[i] - table[i - 1];
+		d = d + (i - 1) * (MAX_INTERPOLATE / (size - 1));
+	} else {
+		d = i * ((MAX_INTERPOLATE + size / 2) / size);
+	}
+
+	if (d > 1000)
+		d = 1000;
+
+	return d;
+}
+
+/* returns (a * b) / c */
+static int32_t ab_div_c(u32 a, u32 b, u32 c)
+{
+	bool sign;
+	u32 ans = MAX_INT;
+	int32_t tmp;
+
+	sign = ((((a ^ b) ^ c) & 0x80000000) != 0);
+
+	if (c != 0) {
+		if (sign)
+			c = -c;
+		tmp = ((int32_t)a * b + (c >> 1)) / c;
+		if (tmp < MAX_INT)
+			ans = tmp;
+	}
+
+	if (sign)
+		ans = -ans;
+
+	return ans;
+}
+
+static int rk818_bat_vol_to_cap(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_cap;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_cap = ab_div_c(tmp, di->fcc, MAX_INTERPOLATE);
+
+	return ocv_cap;
+}
+
+static int rk818_bat_vol_to_soc(struct battery_info *di, int voltage)
+{
+	u32 *ocv_table, tmp;
+	int ocv_size, ocv_soc;
+
+	ocv_table = di->ocv_table;
+	ocv_size = di->ocv_size;
+	tmp = interpolate(voltage, ocv_table, ocv_size);
+	ocv_soc = ab_div_c(tmp, MAX_PERCENTAGE, MAX_INTERPOLATE);
+
+	return ocv_soc;
+}
+
+static int rk818_bat_get_prev_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(REMAIN_CAP_REG3) << 24;
+	val |= rk818_bat_read(REMAIN_CAP_REG2) << 16;
+	val |= rk818_bat_read(REMAIN_CAP_REG1) << 8;
+	val |= rk818_bat_read(REMAIN_CAP_REG0) << 0;
+
+	return val;
+}
+
+static void rk818_bat_save_fcc(struct battery_info *di, u32 cap)
+{
+	u8 buf;
+
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(NEW_FCC_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(NEW_FCC_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(NEW_FCC_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(NEW_FCC_REG0, buf);
+}
+
+static int rk818_bat_get_fcc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(NEW_FCC_REG3) << 24;
+	val |= rk818_bat_read(NEW_FCC_REG2) << 16;
+	val |= rk818_bat_read(NEW_FCC_REG1) << 8;
+	val |= rk818_bat_read(NEW_FCC_REG0) << 0;
+
+	if (val < MIN_FCC)
+		val = di->design_cap;
+	else if (val > di->qmax)
+		val = di->qmax;
+
+	return val;
+}
+
+static int rk818_bat_get_pwroff_min(struct battery_info *di)
+{
+	u8 cur, last;
+
+	cur = rk818_bat_read(NON_ACT_TIMER_CNT_REG);
+	last = rk818_bat_read(NON_ACT_TIMER_CNT_SAVE_REG);
+	rk818_bat_write(NON_ACT_TIMER_CNT_SAVE_REG, cur);
+
+	return (cur != last) ? cur : 0;
+}
+
+static int rk818_bat_get_coulomb_cap(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(GASCNT_REG3) << 24;
+	val |= rk818_bat_read(GASCNT_REG2) << 16;
+	val |= rk818_bat_read(GASCNT_REG1) << 8;
+	val |= rk818_bat_read(GASCNT_REG0) << 0;
+	val /= 2390;
+
+	return val * di->res_div;
+}
+
+static void rk818_bat_init_capacity(struct battery_info *di, u32 capacity)
+{
+	u8 buf;
+	u32 cap;
+	int delta;
+
+	delta = capacity - di->remain_cap;
+	if (!delta)
+		return;
+
+	cap = capacity * 2390 / di->res_div;
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(GASCNT_CAL_REG0, buf);
+
+	di->remain_cap = rk818_bat_get_coulomb_cap(di);
+	di->rsoc = rk818_bat_get_rsoc(di);
+}
+
+static bool is_rk818_bat_ocv_valid(struct battery_info *di)
+{
+	return di->pwroff_min >= 30 ? true : false;
+}
+
+static int rk818_bat_get_usb_state(struct battery_info *di)
+{
+	int charger_type;
+
+	switch (rk818_bat_dwc_otg_check_dpdm()) {
+	case 0:
+		if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) != 0)
+			charger_type = DC_CHARGER;
+		else
+			charger_type = NO_CHARGER;
+		break;
+	case 1:
+	case 3:
+		charger_type = USB_CHARGER;
+		break;
+	case 2:
+		charger_type = AC_CHARGER;
+		break;
+	default:
+		charger_type = NO_CHARGER;
+	}
+
+	return charger_type;
+}
+
+static void rk818_bat_clr_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk818_bat_read(MISC_MARK_REG);
+	val &= ~FG_INIT;
+	rk818_bat_write(MISC_MARK_REG, val);
+}
+
+static bool rk818_bat_is_initialized(struct battery_info *di)
+{
+	return (rk818_bat_read(MISC_MARK_REG) & FG_INIT) ? true : false;
+}
+
+static void rk818_bat_set_initialized_state(struct battery_info *di)
+{
+	u8 val;
+
+	val = rk818_bat_read(MISC_MARK_REG);
+	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
+		val |= FG_INIT;
+		rk818_bat_write(MISC_MARK_REG, val);
+		BAT_INFO("fuel gauge initialized... estv=%d, ch=%d\n",
+			 rk818_bat_get_est_voltage(di),
+			 rk818_bat_get_usb_state(di));
+	}
+}
+
+static void rk818_bat_first_pwron(struct battery_info *di)
+{
+	int ocv_vol;
+
+	rk818_bat_save_fcc(di, di->design_cap);
+	ocv_vol = rk818_bat_get_ocv_voltage(di);
+	di->fcc = rk818_bat_get_fcc(di);
+	di->nac = rk818_bat_vol_to_cap(di, ocv_vol);
+	di->rsoc = rk818_bat_vol_to_soc(di, ocv_vol);
+	di->dsoc = di->rsoc;
+	rk818_bat_init_capacity(di, di->nac);
+	rk818_bat_set_initialized_state(di);
+	BAT_INFO("first power on: soc=%d\n", di->dsoc);
+}
+
+static u8 rk818_bat_get_halt_cnt(struct battery_info *di)
+{
+	return rk818_bat_read(HALT_CNT_REG);
+}
+
+static void rk818_bat_inc_halt_cnt(struct battery_info *di)
+{
+	u8 cnt;
+
+	cnt = rk818_bat_read(HALT_CNT_REG);
+	rk818_bat_write(HALT_CNT_REG, ++cnt);
+}
+
+static bool is_rk818_bat_last_halt(struct battery_info *di)
+{
+	int pre_cap = rk818_bat_get_prev_cap(di);
+	int now_cap = rk818_bat_get_coulomb_cap(di);
+
+	/* over 5%: system halt last time */
+	if (abs(now_cap - pre_cap) > (di->fcc / 20)) {
+		rk818_bat_inc_halt_cnt(di);
+		return true;
+	} else {
+		return false;
+	}
+}
+
+static void rk818_bat_not_first_pwron(struct battery_info *di)
+{
+	int pre_soc, pre_cap, ocv_cap, ocv_soc, ocv_vol, now_cap;
+
+	di->fcc = rk818_bat_get_fcc(di);
+	pre_soc = rk818_bat_get_dsoc(di);
+	pre_cap = rk818_bat_get_prev_cap(di);
+	now_cap = rk818_bat_get_coulomb_cap(di);
+	di->pwr_dsoc = pre_soc;
+	di->pwr_rsoc = (now_cap + di->fcc / 200) * 100 / DIV(di->fcc);
+	di->is_halt = is_rk818_bat_last_halt(di);
+	di->halt_cnt = rk818_bat_get_halt_cnt(di);
+	di->is_ocv_calib = is_rk818_bat_ocv_valid(di);
+
+	if (di->is_halt) {
+		BAT_INFO("system halt last time... cap: pre=%d, now=%d\n",
+			 pre_cap, now_cap);
+		if (now_cap < 0)
+			now_cap = 0;
+		rk818_bat_init_capacity(di, now_cap);
+		pre_cap = di->remain_cap;
+		pre_soc = di->rsoc;
+		goto finish;
+	} else if (di->is_ocv_calib) {
+		ocv_vol = rk818_bat_get_ocv_voltage(di);
+		ocv_soc = rk818_bat_vol_to_soc(di, ocv_vol);
+		ocv_cap = rk818_bat_vol_to_cap(di, ocv_vol);
+		pre_cap = ocv_cap;
+		BAT_INFO("do ocv calib.. rsoc=%d\n", ocv_soc);
+
+		if (abs(ocv_soc - pre_soc) >= di->max_soc_offset) {
+			BAT_INFO("trigger max soc offset, soc: %d -> %d\n",
+				 pre_soc, ocv_soc);
+			pre_soc = ocv_soc;
+			di->is_max_soc_offset = true;
+		}
+		BAT_INFO("OCV calib: cap=%d, rsoc=%d\n", ocv_cap, ocv_soc);
+	}
+finish:
+	di->dsoc = pre_soc;
+	di->nac = pre_cap;
+	rk818_bat_init_capacity(di, di->nac);
+	rk818_bat_set_initialized_state(di);
+	BAT_INFO("dl=%d rl=%d cap=%d m=%d v=%d ov=%d c=%d pl=%d ch=%d Ver=%s\n",
+		 di->dsoc, di->rsoc, di->remain_cap, di->pwroff_min,
+		 rk818_bat_get_avg_voltage(di), rk818_bat_get_ocv_voltage(di),
+		 rk818_bat_get_avg_current(di), rk818_bat_get_dsoc(di),
+		 rk818_bat_get_usb_state(di), DRIVER_VERSION
+		 );
+}
+
+static bool is_rk818_bat_first_poweron(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk818_bat_read(GGSTS_REG);
+	if (buf & BAT_CON) {
+		buf &= ~BAT_CON;
+		rk818_bat_write(GGSTS_REG, buf);
+		return true;
+	}
+
+	return false;
+}
+
+static bool rk818_bat_ocv_sw_reset(struct battery_info *di)
+{
+	u8 buf;
+
+	buf = rk818_bat_read(MISC_MARK_REG);
+	if (((buf & FG_RESET_LATE) && di->pwroff_min >= 30) ||
+	    (buf & FG_RESET_NOW)) {
+		buf &= ~FG_RESET_LATE;
+		buf &= ~FG_RESET_NOW;
+		rk818_bat_write(MISC_MARK_REG, buf);
+		BAT_INFO("manual reset fuel gauge\n");
+		return true;
+	} else {
+		return false;
+	}
+}
+
+void rk818_bat_init_rsoc(struct battery_info *di)
+{
+	di->pwroff_min = rk818_bat_get_pwroff_min(di);
+	di->is_first_power_on = is_rk818_bat_first_poweron(di);
+	di->is_sw_reset = rk818_bat_ocv_sw_reset(di);
+
+	if (di->is_first_power_on || di->is_sw_reset)
+		rk818_bat_first_pwron(di);
+	else
+		rk818_bat_not_first_pwron(di);
+}
+
+static int rk818_bat_calc_linek(struct battery_info *di)
+{
+	int linek, diff, delta;
+
+	di->calc_dsoc = di->dsoc;
+	di->calc_rsoc = di->rsoc;
+	di->sm_old_cap = di->remain_cap;
+
+	delta = abs(di->dsoc - di->rsoc);
+	diff = delta * 3;
+	di->sm_meet_soc = (di->dsoc >= di->rsoc) ?
+			   (di->dsoc + diff) : (di->rsoc + diff);
+
+	if (di->dsoc < di->rsoc)
+		linek = 1000 * (delta + diff) / DIV(diff);
+	else if (di->dsoc > di->rsoc)
+		linek = 1000 * diff / DIV(delta + diff);
+	else
+		linek = 1000;
+
+	di->sm_chrg_dsoc = di->dsoc * 1000;
+
+	DBG("<%s>. meet=%d, diff=%d, link=%d, calc: dsoc=%d, rsoc=%d\n",
+	    __func__, di->sm_meet_soc, diff, linek,
+	    di->calc_dsoc, di->calc_rsoc);
+
+	return linek;
+}
+
+static void rk818_bat_init_ts2(struct battery_info *di)
+{
+	u8 buf;
+
+	if (!di->ts2_vol_multi)
+		return;
+
+	/* TS2 adc mode */
+	buf = rk818_bat_read(TS_CTRL_REG);
+	buf |= TS2_ADC_MODE;
+	rk818_bat_write(TS_CTRL_REG, buf);
+
+	/* TS2 adc enable */
+	buf = rk818_bat_read(ADC_CTRL_REG);
+	buf |= ADC_TS2_EN;
+	rk818_bat_write(ADC_CTRL_REG, buf);
+}
+
+static int rk818_fg_init(struct battery_info *di)
+{
+	rk818_bat_enable_gauge(di);
+	rk818_bat_init_voltage_kb(di);
+	rk818_bat_init_coffset(di);
+	rk818_bat_init_ts2(di);
+	rk818_bat_clr_initialized_state(di);
+	di->dsoc = rk818_bat_get_dsoc(di);
+
+	/*
+	 * it's better to init fg in kernel,
+	 * so avoid init in uboot as far as possible
+	 */
+	if (rk818_bat_get_usb_state(di) != NO_CHARGER) {
+		if (rk818_bat_get_est_voltage(di) < CONFIG_SCREEN_ON_VOL_THRESD)
+			rk818_bat_init_rsoc(di);
+#ifdef CONFIG_UBOOT_CHARGE
+		else
+			rk818_bat_init_rsoc(di);
+#endif
+	}
+
+	rk818_bat_init_chrg_config(di);
+	di->voltage_avg = rk818_bat_get_avg_voltage(di);
+	di->voltage_ocv = rk818_bat_get_ocv_voltage(di);
+	di->current_avg = rk818_bat_get_avg_current(di);
+	di->sm_linek = rk818_bat_calc_linek(di);
+	di->finish_chrg_base = get_timer(0);
+	di->term_sig_base = get_timer(0);
+	di->pwr_vol = di->voltage_avg;
+
+	return 0;
+}
+
+static bool is_rk818_bat_exist(struct  battery_info *di)
+{
+	return (rk818_bat_read(SUP_STS_REG) & BAT_EXS) ? true : false;
+}
+
+static void rk818_bat_set_current(int input_current)
+{
+	u8 usb_ctrl;
+
+	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	usb_ctrl &= ~INPUT_CUR_MSK;
+	usb_ctrl |= (input_current);
+	rk818_bat_write(USB_CTRL_REG, usb_ctrl);
+}
+
+static int rk818_bat_get_ts2_voltage(struct battery_info *di)
+{
+	u32 val = 0;
+
+	val |= rk818_bat_read(RK818_TS2_ADC_REGL) << 0;
+	val |= rk818_bat_read(RK818_TS2_ADC_REGH) << 8;
+
+	/* refer voltage 2.2V, 12bit adc accuracy */
+	val = val * 2200 * di->ts2_vol_multi / 4095;
+	DBG("<%s>. ts2 voltage=%d\n", __func__, val);
+
+	return val;
+}
+
+static void rk818_bat_ts2_update_current(struct battery_info *di)
+{
+	int ts2_vol, input_current, invalid_cnt = 0, confirm_cnt = 0;
+
+	rk818_bat_set_current(ILIM_450MA);
+	input_current = ILIM_850MA;
+	while (input_current < di->chrg_cur_input) {
+		mdelay(100);
+		ts2_vol = rk818_bat_get_ts2_voltage(di);
+		DBG("******** ts2 vol=%d\n", ts2_vol);
+		/* filter invalid voltage */
+		if (ts2_vol <= TS2_VALID_VOL) {
+			invalid_cnt++;
+			DBG("%s: invalid ts2 voltage: %d\n, cnt=%d",
+			    __func__, ts2_vol, invalid_cnt);
+			if (invalid_cnt < TS2_CHECK_CNT)
+				continue;
+
+			/* if fail, set max input current as default */
+			input_current = di->chrg_cur_input;
+			rk818_bat_set_current(input_current);
+			break;
+		}
+
+		/* update input current */
+		if (ts2_vol >= TS2_THRESHOLD_VOL) {
+			/* update input current */
+			input_current++;
+			rk818_bat_set_current(input_current);
+			DBG("********* input=%d\n",
+			    CHRG_CUR_INPUT[input_current & 0x0f]);
+		} else {
+			/* confirm lower threshold voltage */
+			confirm_cnt++;
+			if (confirm_cnt < TS2_CHECK_CNT) {
+				DBG("%s: confirm ts2 voltage: %d\n, cnt=%d",
+				    __func__, ts2_vol, confirm_cnt);
+				continue;
+			}
+
+			/* trigger threshold, so roll back 1 step */
+			input_current--;
+			if (input_current == ILIM_80MA ||
+			    input_current < 0)
+				input_current = ILIM_450MA;
+			rk818_bat_set_current(input_current);
+			break;
+		}
+	}
+
+	BAT_INFO("DC_CHARGER charge_cur_input=%d\n",
+		 CHRG_CUR_INPUT[input_current]);
+}
+
+static void rk818_bat_charger_setting(struct battery_info *di, int charger)
+{
+	static u8 old_charger = UNDEF_CHARGER;
+
+	/* charger changed */
+	if (old_charger != charger) {
+		if (charger == NO_CHARGER) {
+			BAT_INFO("NO_CHARGER\n");
+			rk818_bat_set_current(ILIM_450MA);
+		} else if (charger == USB_CHARGER) {
+			BAT_INFO("USB_CHARGER\n");
+			rk818_bat_set_current(ILIM_450MA);
+		} else if (charger == DC_CHARGER || charger == AC_CHARGER) {
+#ifdef CONFIG_UBOOT_CHARGE
+			if (di->ts2_vol_multi) {
+#else
+			if ((rk818_bat_get_est_voltage(di) <
+			     CONFIG_SCREEN_ON_VOL_THRESD) &&
+			    (di->ts2_vol_multi)) {
+#endif
+				rk818_bat_ts2_update_current(di);
+			} else {
+				rk818_bat_set_current(di->chrg_cur_input);
+				BAT_INFO("DC_CHARGER charge_cur_input=%d\n",
+					 CHRG_CUR_INPUT[di->chrg_cur_input]);
+			}
+		} else {
+			BAT_INFO("charger setting error %d\n", charger);
+		}
+
+		old_charger = charger;
+	}
+}
+
+static int rk818_bat_get_dc_state(struct battery_info *di)
+{
+	if (!di->dc_is_valid)
+		return NO_CHARGER;
+
+	return dm_gpio_get_value(di->dc_det) ? DC_CHARGER : NO_CHARGER;
+}
+
+static int rk818_bat_get_charger_type(struct battery_info *di)
+{
+	int charger_type = NO_CHARGER;
+
+	/* check by ic hardware: this check make check work safer */
+	if ((rk818_bat_read(VB_MON_REG) & PLUG_IN_STS) == 0)
+		return NO_CHARGER;
+
+	/* virtual or bat not exist */
+	if (di->virtual_power)
+		return DC_CHARGER;
+
+	/* check DC firstly */
+	charger_type = rk818_bat_get_dc_state(di);
+	if (charger_type == DC_CHARGER)
+		return charger_type;
+
+	/* check USB secondly */
+	return rk818_bat_get_usb_state(di);
+}
+
+static void rk818_bat_save_dsoc(struct battery_info *di, u8 save_soc)
+{
+	static int old_soc = -1;
+
+	if (old_soc != save_soc) {
+		old_soc = save_soc;
+		rk818_bat_write(SOC_REG, save_soc);
+	}
+}
+
+static void rk818_bat_save_cap(struct battery_info *di, int cap)
+{
+	u8 buf;
+	static int old_cap;
+
+	if (old_cap == cap)
+		return;
+
+	if (cap >= di->qmax)
+		cap = di->qmax;
+
+	old_cap = cap;
+	buf = (cap >> 24) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG3, buf);
+	buf = (cap >> 16) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG2, buf);
+	buf = (cap >> 8) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG1, buf);
+	buf = (cap >> 0) & 0xff;
+	rk818_bat_write(REMAIN_CAP_REG0, buf);
+}
+
+static u8 rk818_bat_get_chrg_status(struct battery_info *di)
+{
+	u8 status;
+
+	status = rk818_bat_read(SUP_STS_REG) & BAT_STATUS_MSK;
+	switch (status) {
+	case CHARGE_OFF:
+		DBG("CHARGE-OFF...\n");
+		break;
+	case DEAD_CHARGE:
+		DBG("DEAD CHARGE...\n");
+		break;
+	case  TRICKLE_CHARGE:
+		DBG("TRICKLE CHARGE...\n ");
+		break;
+	case  CC_OR_CV:
+		DBG("CC or CV...\n");
+		break;
+	case  CHARGE_FINISH:
+		DBG("CHARGE FINISH...\n");
+		break;
+	case  USB_OVER_VOL:
+		DBG("USB OVER VOL...\n");
+		break;
+	case  BAT_TMP_ERR:
+		DBG("BAT TMP ERROR...\n");
+		break;
+	case  TIMER_ERR:
+		DBG("TIMER ERROR...\n");
+		break;
+	case  USB_EXIST:
+		DBG("USB EXIST...\n");
+		break;
+	case  USB_EFF:
+		DBG("USB EFF...\n");
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return status;
+}
+
+static void rk818_bat_finish_chrg(struct battery_info *di)
+{
+	u32 tgt_sec = 0;
+
+	if (di->dsoc < 100) {
+		tgt_sec = di->fcc * 3600 / 100 / FINISH_CALI_CURR;
+		if (get_timer(di->finish_chrg_base) > SECONDS(tgt_sec)) {
+			di->finish_chrg_base = get_timer(0);
+			di->dsoc++;
+		}
+	}
+	DBG("<%s>. sec=%d, finish_sec=%lu\n", __func__, SECONDS(tgt_sec),
+	    get_timer(di->finish_chrg_base));
+}
+
+static void rk818_bat_debug_info(struct battery_info *di)
+{
+	u8 sup_sts, ggcon, ggsts, vb_mod, rtc, thermal, misc;
+	u8 usb_ctrl, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3;
+	static const char *name[] = {"NONE", "USB", "AC", "DC", "UNDEF"};
+
+	if (!dbg_enable)
+		return;
+	ggcon = rk818_bat_read(GGCON_REG);
+	ggsts = rk818_bat_read(GGSTS_REG);
+	sup_sts = rk818_bat_read(SUP_STS_REG);
+	usb_ctrl = rk818_bat_read(USB_CTRL_REG);
+	thermal = rk818_bat_read(THERMAL_REG);
+	vb_mod = rk818_bat_read(VB_MON_REG);
+	misc = rk818_bat_read(MISC_MARK_REG);
+	rtc = rk818_bat_read(SECONDS_REG);
+	chrg_ctrl1 = rk818_bat_read(CHRG_CTRL_REG1);
+	chrg_ctrl2 = rk818_bat_read(CHRG_CTRL_REG2);
+	chrg_ctrl3 = rk818_bat_read(CHRG_CTRL_REG3);
+
+	DBG("\n---------------------- DEBUG REGS ------------------------\n"
+	    "GGCON=0x%2x, GGSTS=0x%2x, RTC=0x%2x, SUP_STS= 0x%2x\n"
+	    "VB_MOD=0x%2x, USB_CTRL=0x%2x, THERMAL=0x%2x, MISC=0x%2x\n"
+	    "CHRG_CTRL:REG1=0x%2x, REG2=0x%2x, REG3=0x%2x\n",
+	    ggcon, ggsts, rtc, sup_sts, vb_mod, usb_ctrl,
+	    thermal, misc, chrg_ctrl1, chrg_ctrl2, chrg_ctrl3
+	    );
+	DBG("----------------------------------------------------------\n"
+	    "Dsoc=%d, Rsoc=%d, Vavg=%d, Iavg=%d, Cap=%d, Fcc=%d, d=%d\n"
+	    "K=%d, old_cap=%d, charger=%s, Is=%d, Ip=%d, Vs=%d\n"
+	    "min=%d, meet: soc=%d, calc: dsoc=%d, rsoc=%d, Vocv=%d\n"
+	    "off: i=0x%x, c=0x%x, max=%d, ocv_c=%d, halt: st=%d, cnt=%d\n"
+	    "pwr: dsoc=%d, rsoc=%d, vol=%d, Res=%d, exist=%d\n",
+	    di->dsoc, rk818_bat_get_rsoc(di), rk818_bat_get_avg_voltage(di),
+	    rk818_bat_get_avg_current(di), di->remain_cap, di->fcc,
+	    di->rsoc - di->dsoc,
+	    di->sm_linek, di->sm_old_cap, name[di->chrg_type],
+	    di->res_div * CHRG_CUR_SEL[chrg_ctrl1 & 0x0f],
+	    CHRG_CUR_INPUT[usb_ctrl & 0x0f],
+	    CHRG_VOL_SEL[(chrg_ctrl1 & 0x70) >> 4],  di->pwroff_min,
+	    di->sm_meet_soc, di->calc_dsoc, di->calc_rsoc,
+	    rk818_bat_get_ocv_voltage(di), rk818_bat_get_ioffset(di),
+	    rk818_bat_get_coffset(di), di->is_max_soc_offset,
+	    di->is_ocv_calib, di->is_halt, di->halt_cnt, di->pwr_dsoc,
+	    di->pwr_rsoc, di->pwr_vol, di->sample_res, is_rk818_bat_exist(di)
+	    );
+	rk818_bat_get_chrg_status(di);
+	DBG("###########################################################\n");
+}
+
+static void rk818_bat_linek_algorithm(struct battery_info *di)
+{
+	int delta_cap, ydsoc, tmp;
+	u8 chg_st = rk818_bat_get_chrg_status(di);
+
+	/* slow down */
+	if (di->dsoc == 99)
+		di->sm_linek = CHRG_FULL_K;
+	else if (di->dsoc >= CHRG_TERM_DSOC && di->current_avg > TERM_CALI_CURR)
+		di->sm_linek = CHRG_TERM_K;
+
+	delta_cap = di->remain_cap - di->sm_old_cap;
+	ydsoc = di->sm_linek * delta_cap * 100 / DIV(di->fcc);
+	if (ydsoc > 0) {
+		tmp = (di->sm_chrg_dsoc + 1) / 1000;
+		if (tmp != di->dsoc)
+			di->sm_chrg_dsoc = di->dsoc * 1000;
+		di->sm_chrg_dsoc += ydsoc;
+		di->dsoc = (di->sm_chrg_dsoc + 1) / 1000;
+		di->sm_old_cap = di->remain_cap;
+		if (di->dsoc == di->rsoc && di->sm_linek != CHRG_FULL_K &&
+		    di->sm_linek != CHRG_TERM_K)
+			di->sm_linek = 1000;
+	}
+
+	if ((di->sm_linek == 1000 || di->dsoc >= 100) &&
+	    (chg_st != CHARGE_FINISH)) {
+		if (di->sm_linek == 1000)
+			di->dsoc = di->rsoc;
+		di->sm_chrg_dsoc = di->dsoc * 1000;
+	}
+
+	DBG("linek=%d, sm_dsoc=%d, delta_cap=%d, ydsoc=%d, old_cap=%d\n"
+	    "calc: dsoc=%d, rsoc=%d, meet=%d\n",
+	    di->sm_linek, di->sm_chrg_dsoc, delta_cap, ydsoc, di->sm_old_cap,
+	    di->calc_dsoc, di->calc_rsoc, di->sm_meet_soc);
+}
+
+static void rk818_bat_set_term_mode(struct battery_info *di, int mode)
+{
+	u8 buf;
+
+	buf = rk818_bat_read(CHRG_CTRL_REG3);
+	buf &= ~CHRG_TERM_SIG_MSK;
+	buf |= mode;
+	rk818_bat_write(CHRG_CTRL_REG3, buf);
+
+	DBG("set charge to %s term mode\n", mode ? "digital" : "analog");
+}
+
+static int rk818_bat_get_iadc(struct battery_info *di)
+{
+	int val = 0;
+
+	val |= rk818_bat_read(BAT_CUR_AVG_REGL) << 0;
+	val |= rk818_bat_read(BAT_CUR_AVG_REGH) << 8;
+	if (val > 2047)
+		val -= 4096;
+
+	return val;
+}
+
+static bool rk818_bat_adc_calib(struct battery_info *di)
+{
+	int i, ioffset, coffset, adc;
+
+	if (abs(di->current_avg) < ADC_CALIB_THRESHOLD)
+		return false;
+
+	for (i = 0; i < 5; i++) {
+		adc = rk818_bat_get_iadc(di);
+		coffset = rk818_bat_get_coffset(di);
+		rk818_bat_set_coffset(di, coffset + adc);
+		mdelay(200);
+		adc = rk818_bat_get_iadc(di);
+		if (abs(adc) < ADC_CALIB_THRESHOLD) {
+			coffset = rk818_bat_get_coffset(di);
+			ioffset = rk818_bat_get_ioffset(di);
+			di->poffset = coffset - ioffset;
+			rk818_bat_write(POFFSET_REG, di->poffset);
+			BAT_INFO("new offset:c=0x%x, i=0x%x, p=0x%x\n",
+				 coffset, ioffset, di->poffset);
+			return true;
+		} else {
+			BAT_INFO("coffset calib again %d..\n", i);
+			rk818_bat_set_coffset(di, coffset);
+			mdelay(200);
+		}
+	}
+
+	return false;
+}
+
+static void rk818_bat_smooth_charge(struct battery_info *di)
+{
+	u8 chg_st = rk818_bat_get_chrg_status(di);
+
+	/* set terminal charge mode */
+	if (di->term_sig_base && get_timer(di->term_sig_base) > SECONDS(1)) {
+		rk818_bat_set_term_mode(di, CHRG_TERM_DIG_SIGNAL);
+		di->term_sig_base = 0;
+	}
+
+	/* not charge mode and not keep in uboot charge: exit */
+	if ((di->chrg_type == NO_CHARGER) ||
+	    !rk818_bat_is_initialized(di)) {
+		DBG("chrg=%d, initialized=%d\n", di->chrg_type,
+		    rk818_bat_is_initialized(di));
+		goto out;
+	}
+
+	/* update rsoc and remain cap */
+	di->remain_cap = rk818_bat_get_coulomb_cap(di);
+	di->rsoc = rk818_bat_get_rsoc(di);
+	if (di->remain_cap > di->fcc) {
+		di->sm_old_cap -= (di->remain_cap - di->fcc);
+		rk818_bat_init_capacity(di, di->fcc);
+	}
+
+	/* finish charge step */
+	if (chg_st == CHARGE_FINISH) {
+		DBG("finish charge step...\n");
+		if (di->adc_allow_update)
+			di->adc_allow_update = !rk818_bat_adc_calib(di);
+		rk818_bat_finish_chrg(di);
+		rk818_bat_init_capacity(di, di->fcc);
+	} else {
+		DBG("smooth charge step...\n");
+		di->adc_allow_update = true;
+		di->finish_chrg_base = get_timer(0);
+		rk818_bat_linek_algorithm(di);
+	}
+
+	/* dsoc limit */
+	if (di->dsoc > 100)
+		di->dsoc = 100;
+	else if (di->dsoc < 0)
+		di->dsoc = 0;
+
+	rk818_bat_save_dsoc(di, di->dsoc);
+	rk818_bat_save_cap(di, di->remain_cap);
+out:
+	rk818_bat_debug_info(di);
+}
+
+static int rk818_bat_update_get_soc(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+	static ulong seconds;
+
+	/* set charge current */
+	di->chrg_type =
+		rk818_bat_get_charger_type(di);
+	rk818_bat_charger_setting(di, di->chrg_type);
+
+	/* fg calc every 5 seconds */
+	if (!seconds)
+		seconds = get_timer(0);
+	if (get_timer(seconds) >= SECONDS(5)) {
+		seconds = get_timer(0);
+		rk818_bat_smooth_charge(di);
+	}
+
+	/* bat exist, fg init success(dts pass) and uboot charge: report data */
+	if (!di->virtual_power && di->voltage_k)
+		return di->dsoc;
+	else
+		return VIRTUAL_POWER_SOC;
+}
+
+static int rk818_bat_update_get_voltage(struct udevice *dev)
+{
+	struct battery_info *di = dev_get_priv(dev);
+
+	if (!di->virtual_power && di->voltage_k)
+		return rk818_bat_get_est_voltage(di);
+	else
+		return VIRTUAL_POWER_VOL;
+}
+
+static bool rk818_bat_update_get_chrg_online(struct udevice *dev)
+{
+	return rk818_bat_dwc_otg_check_dpdm();
+}
+
+static struct dm_fuel_gauge_ops fg_ops = {
+	.get_soc = rk818_bat_update_get_soc,
+	.get_voltage = rk818_bat_update_get_voltage,
+	.get_chrg_online = rk818_bat_update_get_chrg_online,
+};
+
+static int rk818_bat_parse_dt(struct battery_info *di, void const *blob)
+{
+	int node, parent, len, err;
+	const char *prop;
+
+	parent = fdt_node_offset_by_compatible(blob, 0, "rockchip,rk818");
+	if (parent < 0) {
+		printf("can't find rockchip,rk818 node\n");
+		return -ENODEV;
+	}
+
+	if (!fdtdec_get_is_enabled(blob, parent)) {
+		DBG("rk818 node disabled\n");
+		return -ENODEV;
+	}
+
+	node = fdt_subnode_offset_namelen(blob, parent, "battery", 7);
+	if (node < 0) {
+		printf("can't find battery node\n");
+		di->chrg_cur_input = ILIM_2000MA;
+		return -EINVAL;
+	}
+
+	prop = fdt_getprop(blob, node, "ocv_table", &len);
+	if (!prop) {
+		printf("can't find ocv_table prop\n");
+		return -EINVAL;
+	}
+
+	di->ocv_table = calloc(len, 1);
+	if (!di->ocv_table) {
+		printf("can't calloc ocv_table\n");
+		return -ENOMEM;
+	}
+
+	di->ocv_size = len / 4;
+	err = fdtdec_get_int_array(blob, node, "ocv_table",
+				   di->ocv_table, di->ocv_size);
+	if (err < 0) {
+		printf("read ocv_table error\n");
+		free(di->ocv_table);
+		return -EINVAL;
+	}
+
+	di->design_cap = fdtdec_get_int(blob, node, "design_capacity", -1);
+	if (di->design_cap < 0) {
+		printf("read design_capacity error\n");
+		return -EINVAL;
+	}
+
+	di->qmax = fdtdec_get_int(blob, node, "design_qmax", -1);
+	if (di->qmax < 0) {
+		printf("read design_qmax error\n");
+		return -EINVAL;
+	}
+
+	di->dts_vol_sel = fdtdec_get_int(blob, node, "max_chrg_voltage", 4200);
+	di->dts_cur_input = fdtdec_get_int(blob, node,
+					   "max_input_current", 2000);
+	di->dts_cur_sel = fdtdec_get_int(blob, node, "max_chrg_current", 1200);
+	di->sample_res = fdtdec_get_int(blob, node, "sample_res",
+					SAMPLE_RES_20mR);
+	di->res_div = (di->sample_res == SAMPLE_RES_20mR) ?
+		       SAMPLE_RES_DIV1 : SAMPLE_RES_DIV2;
+	di->max_soc_offset = fdtdec_get_int(blob, node, "max_soc_offset", 70);
+	di->virtual_power = fdtdec_get_int(blob, node, "virtual_power", 0);
+	di->ts2_vol_multi = fdtdec_get_int(blob, node, "ts2_vol_multi", 0);
+	di->bat_res = fdtdec_get_int(blob, node, "bat_res", 135);
+	if (!gpio_request_by_name_nodev(offset_to_ofnode(node), "dc_det_gpio",
+					0, di->dc_det, GPIOD_IS_IN)) {
+		di->dc_is_valid = true;
+	}
+
+	if (!is_rk818_bat_exist(di))
+		di->virtual_power = 1;
+
+	DBG("-------------------------------:\n");
+	DBG("max_input_current:%d\n", di->dts_cur_input);
+	DBG("max_chrg_current:%d\n", di->dts_cur_sel);
+	DBG("max_chrg_voltage:%d\n", di->dts_vol_sel);
+	DBG("design_capacity :%d\n", di->design_cap);
+	DBG("design_qmax:%d\n", di->qmax);
+	DBG("max_soc_offset:%d\n", di->max_soc_offset);
+	DBG("sample_res:%d\n", di->sample_res);
+
+	return 0;
+}
+
+static int rk818_fg_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+	struct battery_info *di = dev_get_priv(dev);
+	int ret;
+
+	if (priv->variant != 0x8180) {
+		debug("Not support pmic variant: rk%x\n", priv->variant);
+		return -EINVAL;
+	}
+
+	g_pmic_dev = dev->parent;
+	ret = rk818_bat_parse_dt(di, gd->fdt_blob);
+	if (ret)
+		return ret;
+
+	return rk818_fg_init(di);
+}
+
+U_BOOT_DRIVER(rk818_fg) = {
+	.name = "rk818_fg",
+	.id = UCLASS_FG,
+	.probe = rk818_fg_probe,
+	.ops = &fg_ops,
+	.priv_auto_alloc_size = sizeof(struct battery_info),
+};

commit 1ccc17a74d7a8097cb0c501a70c401947e20ae1f
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Fri Sep 29 14:22:27 2017 +0800

    include: usb: add phy rockchip inno usb2 header file
    
    The rockchip USB 2.0 PHY can support USB BC1.2, but for the
    time being, the framework doesn't provide a method to get
    the USB charger type for the power module, so this header
    file provides an rockchip_chg_get_type() API to get the USB
    charger type.
    
    Change-Id: I2076981e75fac7b129b17188be49188693294ef1
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/include/linux/usb/phy-rockchip-inno-usb2.h b/include/linux/usb/phy-rockchip-inno-usb2.h
new file mode 100644
index 0000000000..d56c9ff6c1
--- /dev/null
+++ b/include/linux/usb/phy-rockchip-inno-usb2.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _PHY_ROCKCHIP_INNO_USB2_H
+#define _PHY_ROCKCHIP_INNO_USB2_H
+
+extern int rockchip_chg_get_type(void);
+
+#endif /* _PHY_ROCKCHIP_INNO_USB2_H */

commit 1ffcaf06aab7f41ac1aef0de04ee281e50a9a8d3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 20 11:11:11 2017 +0800

    configs: evb-rk3328: enable CONFIG_DM_KEY
    
    So that we can use rk805 power key function
    
    Change-Id: Ic737b9a030f4218504051a17955e4e7b36d1b14c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index ddcc868d74..01a503de66 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -23,6 +23,7 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PHY=y

commit f9e5337ac21b288cd6ec6c4c0ced344c8b2cdcd9
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 27 14:55:26 2017 +0800

    rockchip: dts: rk3328-evb: add pwrkey node for rk805
    
    Change-Id: Iace8687e0192a7b1058c098ea3026864c8b54748
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 36c0c0097d..c0716de30e 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -121,6 +121,10 @@
 		#clock-cells = <1>;
 		clock-output-names = "xin32k", "rk805-clkout2";
 
+		pwrkey {
+			status = "okay";
+		};
+
 		regulators {
 			vdd_logic: DCDC_REG1 {
 				regulator-name = "vdd_logic";

commit 6d747531ae712b6e19fddc2a65eceb1effccacf6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 20:21:09 2017 +0800

    power: pmic: rk8xx: bind power key
    
    Change-Id: I629e46abcf5da694c37517c64da7d02918b44705
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index f2a2f07de7..0d32410149 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -22,6 +22,11 @@ static const struct pmic_child_info pmic_children_info[] = {
 	{ },
 };
 
+static const struct pmic_child_info power_key_info[] = {
+	{ .prefix = "pwrkey", .driver = "rk8xx_pwrkey"},
+	{ },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
 	return RK808_NUM_OF_REGS;
@@ -73,6 +78,10 @@ static int rk8xx_bind(struct udevice *dev)
 	if (!children)
 		debug("%s: %s - no child found\n", __func__, dev->name);
 
+	children = pmic_bind_children(dev, dev->node, power_key_info);
+	if (!children)
+		debug("%s: %s - no child found\n", __func__, dev->name);
+
 	/* Always return success for this device */
 	return 0;
 }

commit 436d684c023d358797e3ff743d13062787564222
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 19:02:05 2017 +0800

    input: add rk8xx pwrkey support
    
    RK805/816 provide pwrkey function while RK808/818 is not.
    
    Change-Id: Ia6cd9fcb0a360d81cff54cf49a1f1c9c653488e6
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 1ea90bf9d9..1a4c5a357f 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -30,3 +30,10 @@ config I8042_KEYB
 	  driver handles English and German keyboards - set the environment
 	  variable 'keymap' to "de" to select German. Keyboard repeat is
 	  handled by the keyboard itself.
+
+config RK8XX_PWRKEY
+	bool "Enable RK805/816 pwrkey support"
+	depends on DM_KEY && PMIC_RK8XX
+	default y
+	help
+	  This adds a driver for the RK805/816 pwrkey support.
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index dfe46a037d..bf2d6e3642 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
 obj-$(CONFIG_TWL4030_INPUT) += twl4030.o
 obj-$(CONFIG_TWL6030_INPUT) += twl6030.o
 obj-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
+obj-$(CONFIG_RK8XX_PWRKEY) += rk8xx_pwrkey.o
 ifdef CONFIG_PS2KBD
 obj-y += keyboard.o pc_keyb.o
 obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
diff --git a/drivers/input/rk8xx_pwrkey.c b/drivers/input/rk8xx_pwrkey.c
new file mode 100644
index 0000000000..530a57370b
--- /dev/null
+++ b/drivers/input/rk8xx_pwrkey.c
@@ -0,0 +1,130 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <key.h>
+#include <power/pmic.h>
+#include <power/rk8xx_pmic.h>
+
+#define	RK816_INT_STS_REG1	0x49
+#define	RK816_INT_MSK_REG1	0x4a
+#define RK816_PWRON_RISE_INT	(1 << 6)
+#define RK816_PWRON_FALL_INT	(1 << 5)
+
+#define	RK805_INT_STS_REG	0x4c
+#define	RK805_INT_MSK_REG	0x4d
+#define RK805_PWRON_RISE_INT	(1 << 0)
+#define RK805_PWRON_FALL_INT	(1 << 7)
+
+struct key_data {
+	u8 int_sts_reg;
+	u8 int_msk_reg;
+	u8 pwron_rise_int;
+	u8 pwron_fall_int;
+};
+
+static int rk8xx_pwrkey_read(struct udevice *dev)
+{
+	struct key_data *key = dev_get_priv(dev);
+	int status = KEY_PRESS_NONE;
+	int ret, val;
+
+	val = pmic_reg_read(dev->parent, key->int_sts_reg);
+	if (val < 0) {
+		printf("%s: i2c read failed, ret=%d\n", __func__, val);
+		return val;
+	}
+
+	if (val & key->pwron_fall_int) {
+		/* Clear rise when detect fall */
+		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
+				     key->pwron_rise_int);
+		if (ret < 0) {
+			printf("%s: i2c write failed, ret=%d\n", __func__, val);
+			return ret;
+		}
+
+		status = KEY_PRESS_DOWN;
+	}
+
+	/* Must check pwron rise behind of fall !! */
+	if (val & key->pwron_rise_int) {
+		/* Clear fall when detect rise */
+		ret = pmic_reg_write(dev->parent, key->int_sts_reg,
+				     key->pwron_fall_int);
+		if (ret < 0) {
+			printf("%s: i2c write failed, ret=%d\n", __func__, val);
+			return ret;
+		}
+
+		status = KEY_PRESS_UP;
+	}
+
+	return status;
+}
+
+static const struct dm_key_ops key_ops = {
+	.read = rk8xx_pwrkey_read,
+};
+
+static int rk8xx_pwrkey_probe(struct udevice *dev)
+{
+	struct rk8xx_priv *rk8xx = dev_get_priv(dev->parent);
+	struct key_data *key = dev_get_priv(dev);
+	int ret, val;
+
+	switch (rk8xx->variant) {
+	case RK805_ID:
+		key->int_sts_reg = RK805_INT_STS_REG;
+		key->int_msk_reg = RK805_INT_MSK_REG;
+		key->pwron_rise_int = RK805_PWRON_RISE_INT;
+		key->pwron_fall_int = RK805_PWRON_FALL_INT;
+		break;
+
+	case RK816_ID:
+		key->int_sts_reg = RK816_INT_STS_REG1;
+		key->int_msk_reg = RK816_INT_MSK_REG1;
+		key->pwron_rise_int = RK816_PWRON_RISE_INT;
+		key->pwron_fall_int = RK816_PWRON_FALL_INT;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	/* Clear states */
+	ret = pmic_reg_write(dev->parent, key->int_sts_reg,
+			     key->pwron_rise_int | key->pwron_fall_int);
+	if (ret < 0) {
+		printf("%s: i2c write failed, ret=%d\n", __func__, ret);
+		return ret;
+	}
+
+	val = pmic_reg_read(dev->parent, key->int_msk_reg);
+	if (val < 0) {
+		printf("%s: i2c read failed, ret=%d\n", __func__, val);
+		return val;
+	}
+
+	/* enable fall and rise interrupt */
+	val &= ~(key->pwron_rise_int | key->pwron_fall_int);
+	ret = pmic_reg_write(dev->parent, key->int_msk_reg, val);
+	if (ret < 0) {
+		printf("%s: i2c write failed, ret=%d\n", __func__, val);
+		return ret;
+	}
+
+	return 0;
+}
+
+U_BOOT_DRIVER(rk8xx_pwrkey) = {
+	.name   = "rk8xx_pwrkey",
+	.id     = UCLASS_KEY,
+	.probe  = rk8xx_pwrkey_probe,
+	.ops	= &key_ops,
+	.priv_auto_alloc_size = sizeof(struct key_data),
+};

commit 42865eb5adf4d0ae92999d96b7ef0f6e7005a62b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Oct 9 09:10:45 2017 +0800

    drivers: irq: deliver both irq and private data to irq handler
    
    gic irq handler only need private data, while gpio irq(parent bank)
    handler needs private data and irq number for getting gpio bank and
    pin information. So we need deliver both of them to the irq handler.
    
    This patch fixes the legacy code issue.
    
    Change-Id: I1917b588a867e807cbd15e2e4101ae259cf4a40f
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
index 93a557f857..8dd09078d2 100644
--- a/drivers/irq/irq-generic.c
+++ b/drivers/irq/irq-generic.c
@@ -13,7 +13,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 struct irq_desc {
-	void (*handle_irq)(void *data);
+	interrupt_handler_t *handle_irq;
+	void *data;
 };
 
 static struct irq_desc irqs_desc[PLATFORM_MAX_IRQS_NR];
@@ -37,7 +38,7 @@ static int irq_bad(int irq)
 }
 
 /* general interrupt handler for gpio chip */
-void _generic_gpio_handle_irq(int irq, void *data)
+void _generic_gpio_handle_irq(int irq)
 {
 	if (irq_bad(irq))
 		return;
@@ -48,7 +49,7 @@ void _generic_gpio_handle_irq(int irq, void *data)
 	}
 
 	if (irqs_desc[irq].handle_irq)
-		irqs_desc[irq].handle_irq(data);
+		irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
 }
 
 void _do_generic_irq_handler(void)
@@ -57,7 +58,7 @@ void _do_generic_irq_handler(void)
 
 	if (irq < PLATFORM_GIC_IRQS_NR) {
 		if (irqs_desc[irq].handle_irq)
-			irqs_desc[irq].handle_irq((void *)(unsigned long)irq);
+			irqs_desc[irq].handle_irq(irq, irqs_desc[irq].data);
 	}
 
 	gic_irq_chip->irq_eoi(irq);
@@ -91,8 +92,10 @@ static int _do_arch_irq_init(void)
 	 */
 	initialized = true;
 
-	for (irq = 0; irq < PLATFORM_MAX_IRQS_NR; irq++)
+	for (irq = 0; irq < PLATFORM_MAX_IRQS_NR; irq++) {
 		irqs_desc[irq].handle_irq = NULL;
+		irqs_desc[irq].data = NULL;
+	}
 
 	gic_irq_chip = arch_gic_irq_init();
 	if (chip_irq_bad(gic_irq_chip)) {
@@ -165,6 +168,7 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
 		return;
 
 	irqs_desc[irq].handle_irq = handler;
+	irqs_desc[irq].data = data;
 }
 
 void irq_free_handler(int irq)
@@ -173,6 +177,7 @@ void irq_free_handler(int irq)
 		return;
 
 	irqs_desc[irq].handle_irq = NULL;
+	irqs_desc[irq].data = NULL;
 }
 
 #ifdef CONFIG_ARM64
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
index b331ffeb7f..d80ae116c4 100644
--- a/drivers/irq/irq-gpio.c
+++ b/drivers/irq/irq-gpio.c
@@ -77,7 +77,7 @@ static void gpio_irq_ack(void __iomem *regbase, unsigned int bit)
 	gpio_bit_op(regbase, GPIO_PORTS_EOI, bit, 1);
 }
 
-static void generic_gpio_handle_irq(int irq)
+static void generic_gpio_handle_irq(int irq, void *data __always_unused)
 {
 	struct gpio_bank *bank = gpio_id_to_bank(irq - IRQ_GPIO0);
 	unsigned gpio_irq, pin, unmasked = 0;
@@ -104,7 +104,7 @@ static void generic_gpio_handle_irq(int irq)
 			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
 		}
 
-		_generic_gpio_handle_irq(gpio_irq + pin, NULL);
+		_generic_gpio_handle_irq(gpio_irq + pin);
 
 		isr &= ~(1 << pin);
 
diff --git a/include/common.h b/include/common.h
index 0f386e9db2..501646fed9 100644
--- a/include/common.h
+++ b/include/common.h
@@ -106,7 +106,11 @@ void __assert_fail(const char *assertion, const char *file, unsigned line,
 #define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
 #endif /* BUG */
 
+#ifndef CONFIG_IRQ
 typedef void (interrupt_handler_t)(void *);
+#else
+typedef void (interrupt_handler_t)(int, void *);
+#endif
 
 #include <asm/u-boot.h> /* boot information for Linux kernel */
 #include <asm/global_data.h>	/* global data used for startup functions */
diff --git a/include/irq-generic.h b/include/irq-generic.h
index 6dfed10095..592c93bf55 100644
--- a/include/irq-generic.h
+++ b/include/irq-generic.h
@@ -78,6 +78,6 @@ int gpio_to_irq(struct gpio_desc *gpio);
 int hard_gpio_to_irq(unsigned gpio);
 
 /* only irq-gpio.c can use it */
-void _generic_gpio_handle_irq(int irq, void *data);
+void _generic_gpio_handle_irq(int irq);
 
 #endif /* _IRQ_GENERIC_H */

commit dbcd1484759f8c50fdc61bdc8fc48cf8294a1ae8
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Fri Sep 29 09:14:20 2017 +0800

    drivers: irq: malloc a temporary string for strtok
    
    strtok will update original input string.
    
    Change-Id: I9c81a72045f057c8a7d17f688e2d9f70dd849880
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
index 79c78034cf..18cab91f2a 100644
--- a/drivers/irq/irq-gpio-switch.c
+++ b/drivers/irq/irq-gpio-switch.c
@@ -89,19 +89,25 @@ static int _irq_to_gpio(int irq)
 
 int gpio_to_irq(struct gpio_desc *gpio)
 {
-	int irq_gpio, bank;
+	int irq_gpio, bank, ret = EINVAL_GPIO;
 	bool found;
-	char *name;
+	char *name, *name_tok;
 
 	if (!gpio->dev->name) {
 		printf("can't find device name for the gpio bank\n");
 		return EINVAL_GPIO;
 	}
 
-	name = strtok((char *)gpio->dev->name, "@");
+	name_tok = strdup(gpio->dev->name);
+	if (!name_tok) {
+		printf("Error: strdup in %s failed!\n", __func__);
+		return -ENOMEM;
+	}
+
+	name = strtok(name_tok, "@");
 	if (!name) {
 		printf("can't find correct device name for the gpio bank\n");
-		return EINVAL_GPIO;
+		goto out;
 	}
 
 	for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
@@ -113,14 +119,19 @@ int gpio_to_irq(struct gpio_desc *gpio)
 
 	if (!found) {
 		printf("irq gpio framework can't find %s\n", name);
-		return EINVAL_GPIO;
+		goto out;
 	}
 
 	irq_gpio = RK_IRQ_GPIO(bank, gpio->offset);
 	if (!gpio_is_valid(irq_gpio))
-		return EINVAL_GPIO;
+		goto out;
 
+	free(name_tok);
 	return _hard_gpio_to_irq(irq_gpio);
+
+out:
+	free(name_tok);
+	return ret;
 }
 
 int hard_gpio_to_irq(u32 gpio)

commit 64c74e0b2d26a51a23fadc7fca5bed7febb0d022
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 27 14:23:25 2017 +0800

    env: add env_update()
    
    This add/append/replace the sub value of an environment variable.
    
    Change-Id: I0fcda0a1c631013eb9458a04a09546ba1c643db3
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 4033d90c8e..060e38dbb0 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -297,6 +297,222 @@ int env_set(const char *varname, const char *varvalue)
 		return _do_env_set(0, 3, (char * const *)argv, H_PROGRAMMATIC);
 }
 
+static int env_append(const char *varname, const char *varvalue)
+{
+	int len = 0;
+	char *oldvalue, *newvalue;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	if (varvalue)
+		len += strlen(varvalue);
+
+	oldvalue = env_get(varname);
+	if (oldvalue) {
+		len += strlen(oldvalue);
+		/* Exist ! */
+		if (strstr(oldvalue, varvalue))
+			return 0;
+	}
+
+	newvalue = malloc(len + 2);
+	if (!newvalue) {
+		printf("Error: malloc in %s failed!\n", __func__);
+		return 1;
+	}
+
+	*newvalue = '\0';
+
+	if (oldvalue) {
+		strcpy(newvalue, oldvalue);
+		strcat(newvalue, " ");
+	}
+
+	if (varvalue)
+		strcat(newvalue, varvalue);
+
+	env_set(varname, newvalue);
+	free(newvalue);
+
+	return 0;
+}
+
+static int env_replace(const char *varname, const char *substr,
+		       const char *replacement)
+{
+	char *oldvalue, *newvalue, *dst, *sub;
+	int substr_len, replace_len, oldvalue_len, len;
+
+	/* before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	oldvalue = env_get(varname);
+	if (!oldvalue)
+		return 1;
+
+	sub = strstr(oldvalue, substr);
+	if (!sub)
+		return 1;
+
+	oldvalue_len = strlen(oldvalue) + 1;
+	substr_len = strlen(substr);
+	replace_len = strlen(replacement);
+
+	if (replace_len >= substr_len)
+		len = oldvalue_len + replace_len - substr_len;
+	else
+		len = oldvalue_len + substr_len - replace_len;
+
+	newvalue = malloc(len);
+	if (!newvalue) {
+		printf("Error: malloc in %s failed!\n", __func__);
+		return 1;
+	}
+
+	*newvalue = '\0';
+
+	/*
+	 * Orignal string is splited like format: [str1.. substr str2..]
+	 */
+
+	/* str1.. */
+	dst = newvalue;
+	dst = strncat(dst, oldvalue, sub - oldvalue);
+
+	/* substr */
+	dst += sub - oldvalue;
+	dst = strncat(dst, replacement, replace_len);
+
+	/* str2.. */
+	dst += replace_len;
+	len = oldvalue_len - substr_len - (sub - oldvalue);
+	dst = strncat(dst, sub + substr_len, len);
+
+	env_set(varname, newvalue);
+	free(newvalue);
+
+	return 0;
+}
+
+#define ARGS_ITEM_NUM	50
+
+int env_update(const char *varname, char *varvalue)
+{
+	/* 'a_' means "varargs_'; 'v_' means 'varvalue_' */
+	char *varargs;
+	char *a_title, *v_title;
+	char *a_string_tok, *a_item_tok = NULL;
+	char *v_string_tok, *v_item_tok = NULL;
+	char *a_item, *a_items[ARGS_ITEM_NUM] = { NULL };
+	char *v_item, *v_items[ARGS_ITEM_NUM] = { NULL };
+	bool match = false;
+	int i = 0, j = 0;
+
+	/* Before import into hashtable */
+	if (!(gd->flags & GD_FLG_ENV_READY) || !varname)
+		return 1;
+
+	/* If varname doesn't exist, create it and set varvalue */
+	varargs = env_get(varname);
+	if (!varargs) {
+		env_set(varname, varvalue);
+		return 0;
+	}
+
+	/* Malloc a temporary varargs for strtok */
+	a_string_tok = strdup(varargs);
+	if (!a_string_tok) {
+		printf("Error: strdup in failed, line=%d\n", __LINE__);
+		return 1;
+	}
+
+	/* Malloc a temporary varvalue for strtok */
+	v_string_tok = strdup(varvalue);
+	if (!v_string_tok) {
+		free(a_string_tok);
+		printf("Error: strdup in failed, line=%d\n", __LINE__);
+		return 1;
+	}
+
+	/* Splite varargs into items containing "=" by the blank */
+	a_item = strtok(a_string_tok, " ");
+	while (a_item && i < ARGS_ITEM_NUM) {
+		debug("%s: [a_item %d]: %s\n", __func__, i, a_item);
+		if (strstr(a_item, "="))
+			a_items[i++] = a_item;
+		a_item = strtok(NULL, " ");
+	}
+
+	/*
+	 * Splite varvalue into items containing "=" by the blank.
+	 * parse varvalue title, eg: "bootmode=emmc", title is "bootmode"
+	 */
+	v_item = strtok(v_string_tok, " ");
+	while (v_item && j < ARGS_ITEM_NUM) {
+		debug("%s: <v_item %d>: %s\n", __func__, j, v_item);
+		if (strstr(v_item, "="))
+			v_items[j++] = v_item;
+		else
+			env_append(varname, v_item);
+		v_item = strtok(NULL, " ");
+	}
+
+	/* For every v_item, search its title */
+	for (j = 0; j < ARGS_ITEM_NUM && v_items[j]; j++) {
+		v_item = v_items[j];
+		/* Malloc a temporary a_item for strtok */
+		v_item_tok = strdup(v_item);
+		if (!v_item_tok) {
+			printf("Error: strdup in failed, line=%d\n", __LINE__);
+			free(a_string_tok);
+			free(v_string_tok);
+			return 1;
+		}
+		v_title = strtok(v_item_tok, "=");
+		debug("%s: <v_title>: %s\n", __func__, v_title);
+
+		/* For every a_item, search its title */
+		for (i = 0; i < ARGS_ITEM_NUM && a_items[i]; i++) {
+			a_item = a_items[i];
+			/* Malloc a temporary a_item for strtok */
+			a_item_tok = strdup(a_item);
+			if (!a_item_tok) {
+				printf("Error: strdup in failed, line=%d\n", __LINE__);
+				free(a_string_tok);
+				free(v_string_tok);
+				free(v_item_tok);
+				return 1;
+			}
+
+			a_title = strtok(a_item_tok, "=");
+			debug("%s: [a_title]: %s\n", __func__, a_title);
+			if (!strcmp(a_title, v_title)) {
+				/* Find! replace it */
+				env_replace(varname, a_item, v_item);
+				free(a_item_tok);
+				match = true;
+				break;
+			}
+			free(a_item_tok);
+		}
+
+		/* Not find, just append */
+		if (!match)
+			env_append(varname, v_item);
+
+		match = false;
+		free(v_item_tok);
+	}
+
+	free(v_string_tok);
+	free(a_string_tok);
+
+	return 0;
+}
+
 /**
  * Set an environment variable to an integer value
  *
diff --git a/include/common.h b/include/common.h
index aaed131671..0f386e9db2 100644
--- a/include/common.h
+++ b/include/common.h
@@ -378,6 +378,17 @@ int env_get_yesno(const char *var);
  */
 int env_set(const char *varname, const char *value);
 
+/**
+ * env_update() - update sub value of an environment variable
+ *
+ * This add/append/replace the sub value of an environment variable.
+ *
+ * @varname: Variable to adjust
+ * @valude: Value to append/replace
+ * @return 0 if OK, 1 on error
+ */
+int env_update(const char *varname, char *varvalue);
+
 /**
  * env_set_ulong() - set an environment variable to an integer
  *

commit fafee76a04ce54858faf55967c02ae62396a493b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Oct 10 14:45:54 2017 +0800

    rockchip: rk3128: enable fifo-mode for emmc
    
    rk3128 dwmmc controller do not have internal DMA, since we don't
    support external DMA for mmc driver now, we need enable fifo-mode
    in dts.
    
    Change-Id: Ibec30cde8d2d419a5f1db59b60aa7dc1fd6c3c9c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
index 5ef51c9b79..321e9004bd 100644
--- a/arch/arm/dts/rk3128-evb.dts
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -59,6 +59,7 @@
 };
 
 &emmc {
+	fifo-mode;
 	status = "okay";
 };
 

commit b9e63a962a36aac486c684be5f240a53cc85d44a
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Fri Sep 15 15:01:09 2017 +0800

    edid: support decode edid to drm modes
    
    Change-Id: I38f82586d81177a4e6f5c20815af5480b40d2ff8
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/common/edid.c b/common/edid.c
index 3d0809ad11..9de7e2f92d 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -16,6 +16,7 @@
 #include <fdtdec.h>
 #include <linux/ctype.h>
 #include <linux/string.h>
+#include <drm_modes.h>
 
 int edid_check_info(struct edid1_info *edid_info)
 {
@@ -136,6 +137,62 @@ static void decode_timing(u8 *buf, struct display_timing *timing)
 	      va + vbl, vborder);
 }
 
+/**
+ * decode_mode() - Decoding an 18-byte detailed timing record
+ *
+ * @buf:	Pointer to EDID detailed timing record
+ * @timing:	Place to put timing
+ */
+static void decode_mode(u8 *buf, struct drm_display_mode *mode)
+{
+	uint x_mm, y_mm;
+	unsigned int ha, hbl, hso, hspw, hborder;
+	unsigned int va, vbl, vso, vspw, vborder;
+	struct edid_detailed_timing *t = (struct edid_detailed_timing *)buf;
+
+	x_mm = (buf[12] + ((buf[14] & 0xf0) << 4));
+	y_mm = (buf[13] + ((buf[14] & 0x0f) << 8));
+	ha = (buf[2] + ((buf[4] & 0xf0) << 4));
+	hbl = (buf[3] + ((buf[4] & 0x0f) << 8));
+	hso = (buf[8] + ((buf[11] & 0xc0) << 2));
+	hspw = (buf[9] + ((buf[11] & 0x30) << 4));
+	hborder = buf[15];
+	va = (buf[5] + ((buf[7] & 0xf0) << 4));
+	vbl = (buf[6] + ((buf[7] & 0x0f) << 8));
+	vso = ((buf[10] >> 4) + ((buf[11] & 0x0c) << 2));
+	vspw = ((buf[10] & 0x0f) + ((buf[11] & 0x03) << 4));
+	vborder = buf[16];
+
+	/* Edid contains pixel clock in terms of 10KHz */
+	mode->clock = (buf[0] + (buf[1] << 8)) * 10;
+	mode->hdisplay = ha;
+	mode->hsync_start = ha + hso;
+	mode->hsync_end = ha + hso + hspw;
+	mode->htotal = ha + hbl;
+	mode->vdisplay = va;
+	mode->vsync_start = va + vso;
+	mode->vsync_end = va + vso + vspw;
+	mode->vtotal = va + vbl;
+
+	mode->flags = EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY(*t) ?
+		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
+	mode->flags |= EDID_DETAILED_TIMING_FLAG_VSYNC_POLARITY(*t) ?
+		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
+
+	if (EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY(*t))
+		mode->flags |= DRM_MODE_FLAG_INTERLACE;
+
+	debug("Detailed mode clock %u kHz, %d mm x %d mm, flags[%x]\n"
+	      "     %04d %04d %04d %04d hborder %d\n"
+	      "     %04d %04d %04d %04d vborder %d\n",
+	      mode->clock,
+	      x_mm, y_mm, mode->flags,
+	      mode->hdisplay, mode->hsync_start, mode->hsync_end,
+	      mode->htotal, hborder,
+	      mode->vdisplay, mode->vsync_start, mode->vsync_end,
+	      mode->vtotal, vborder);
+}
+
 /**
  * Check if HDMI vendor specific data block is present in CEA block
  * @param info	CEA extension block
@@ -169,6 +226,54 @@ static bool cea_is_hdmi_vsdb_present(struct edid_cea861_info *info)
 	return false;
 }
 
+int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
+		      int *panel_bits_per_colourp)
+{
+	struct edid1_info *edid = (struct edid1_info *)buf;
+	bool timing_done;
+	int i;
+
+	if (buf_size < sizeof(*edid) || edid_check_info(edid)) {
+		debug("%s: Invalid buffer\n", __func__);
+		return -EINVAL;
+	}
+
+	if (!EDID1_INFO_FEATURE_PREFERRED_TIMING_MODE(*edid)) {
+		debug("%s: No preferred timing\n", __func__);
+		return -ENOENT;
+	}
+
+	/* Look for detailed timing */
+	timing_done = false;
+	for (i = 0; i < 4; i++) {
+		struct edid_monitor_descriptor *desc;
+
+		desc = &edid->monitor_details.descriptor[i];
+		if (desc->zero_flag_1 != 0) {
+			decode_mode((u8 *)desc, mode);
+			timing_done = true;
+			break;
+		}
+	}
+	if (!timing_done)
+		return -EINVAL;
+
+	if (!EDID1_INFO_VIDEO_INPUT_DIGITAL(*edid)) {
+		debug("%s: Not a digital display\n", __func__);
+		return -ENOSYS;
+	}
+	if (edid->version != 1 || edid->revision < 4) {
+		debug("%s: EDID version %d.%d does not have required info\n",
+		      __func__, edid->version, edid->revision);
+		*panel_bits_per_colourp = -1;
+	} else  {
+		*panel_bits_per_colourp =
+			((edid->video_input_definition & 0x70) >> 3) + 4;
+	}
+
+	return 0;
+}
+
 int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 		    int *panel_bits_per_colourp)
 {
@@ -226,6 +331,7 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 	return 0;
 }
 
+
 /**
  * Snip the tailing whitespace/return of a string.
  *
diff --git a/include/drm_modes.h b/include/drm_modes.h
new file mode 100644
index 0000000000..6e9121a0c8
--- /dev/null
+++ b/include/drm_modes.h
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2008-2016 Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _DRM_MODES_H
+#define _DRM_MODES_H
+
+/* Video mode flags */
+/* bit compatible with the xorg definitions. */
+#define DRM_MODE_FLAG_PHSYNC			(1 << 0)
+#define DRM_MODE_FLAG_NHSYNC			(1 << 1)
+#define DRM_MODE_FLAG_PVSYNC			(1 << 2)
+#define DRM_MODE_FLAG_NVSYNC			(1 << 3)
+#define DRM_MODE_FLAG_INTERLACE			(1 << 4)
+#define DRM_MODE_FLAG_DBLSCAN			(1 << 5)
+#define DRM_MODE_FLAG_CSYNC			(1 << 6)
+#define DRM_MODE_FLAG_PCSYNC			(1 << 7)
+#define DRM_MODE_FLAG_NCSYNC			(1 << 8)
+#define DRM_MODE_FLAG_HSKEW			(1 << 9) /* hskew provided */
+#define DRM_MODE_FLAG_BCAST			(1 << 10)
+#define DRM_MODE_FLAG_PIXMUX			(1 << 11)
+#define DRM_MODE_FLAG_DBLCLK			(1 << 12)
+#define DRM_MODE_FLAG_CLKDIV2			(1 << 13)
+
+#define DRM_MODE_CONNECTOR_Unknown	0
+#define DRM_MODE_CONNECTOR_VGA		1
+#define DRM_MODE_CONNECTOR_DVII		2
+#define DRM_MODE_CONNECTOR_DVID		3
+#define DRM_MODE_CONNECTOR_DVIA		4
+#define DRM_MODE_CONNECTOR_Composite	5
+#define DRM_MODE_CONNECTOR_SVIDEO	6
+#define DRM_MODE_CONNECTOR_LVDS		7
+#define DRM_MODE_CONNECTOR_Component	8
+#define DRM_MODE_CONNECTOR_9PinDIN	9
+#define DRM_MODE_CONNECTOR_DisplayPort	10
+#define DRM_MODE_CONNECTOR_HDMIA	11
+#define DRM_MODE_CONNECTOR_HDMIB	12
+#define DRM_MODE_CONNECTOR_TV		13
+#define DRM_MODE_CONNECTOR_eDP		14
+#define DRM_MODE_CONNECTOR_VIRTUAL      15
+#define DRM_MODE_CONNECTOR_DSI		16
+
+#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
+#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
+#define DRM_EDID_PT_SEPARATE_SYNC  (3 << 3)
+#define DRM_EDID_PT_STEREO         (1 << 5)
+#define DRM_EDID_PT_INTERLACED     (1 << 7)
+
+struct drm_display_mode {
+	/* Proposed mode values */
+	int clock;		/* in kHz */
+	int hdisplay;
+	int hsync_start;
+	int hsync_end;
+	int htotal;
+	int vdisplay;
+	int vsync_start;
+	int vsync_end;
+	int vtotal;
+	int vrefresh;
+	int vscan;
+	unsigned int flags;
+};
+
+#endif
diff --git a/include/edid.h b/include/edid.h
index a9f2f3d3ab..9f3276c080 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -305,6 +305,7 @@ int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
 		    unsigned int *hmax, unsigned int *vmin,
 		    unsigned int *vmax);
 
+struct drm_display_mode;
 struct display_timing;
 
 /**
@@ -320,5 +321,7 @@ struct display_timing;
  */
 int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 		    int *panel_bits_per_colourp);
+int edid_get_drm_mode(u8 *buf, int buf_size, struct drm_display_mode *mode,
+		      int *panel_bits_per_colourp);
 
 #endif /* __EDID_H_ */

commit d807358c867e6c2ce845161c70097719e754c33a
Author: cwz <cwz@rock-chips.com>
Date:   Tue Mar 17 16:59:02 2015 +0800

    libfdt: add api fdt_node_offset_by_phandle_node() find node with phandle and start node.
    
    Change-Id: I3d7c710367005510ed936e75863f9d3685cb4bc5
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
    Signed-off-by: cwz <cwz@rock-chips.com>

diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 9994d17e56..49c3cddc6f 100755
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -526,6 +526,29 @@ int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
 	return offset; /* error from fdt_next_node() */
 }
 
+int fdt_node_offset_by_phandle_node(const void *fdt, int node, uint32_t phandle)
+{
+	int offset;
+
+	if ((phandle == 0) || (phandle == -1) || (node < 0))
+		return -FDT_ERR_BADPHANDLE;
+
+	FDT_CHECK_HEADER(fdt);
+
+	offset = node;
+	if (fdt_get_phandle(fdt, offset) == phandle)
+		return offset;
+
+	for (offset = fdt_next_node(fdt, offset, NULL);
+	     offset >= 0;
+	     offset = fdt_next_node(fdt, offset, NULL)) {
+		if (fdt_get_phandle(fdt, offset) == phandle)
+			return offset;
+	}
+
+	return offset; /* error from fdt_next_node() */
+}
+
 int fdt_stringlist_contains(const char *strlist, int listlen, const char *str)
 {
 	int len = strlen(str);
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
index 210bc855e9..cb533f4275 100644
--- a/lib/libfdt/libfdt.h
+++ b/lib/libfdt/libfdt.h
@@ -2166,6 +2166,27 @@ int fdt_next_region(const void *fdt,
 int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
 			  int max_regions, struct fdt_region_state *info);
 int fdt_device_is_available(const void *blob, int node);
+/**
+ * fdt_node_offset_by_phandle_node - find the node with a given phandle and node
+ * @fdt: pointer to the device tree blob
+ * @phandle: phandle value
+ * @node: start node value
+ *
+ * fdt_node_offset_by_phandle_node() returns the offset of the node
+ * which has the given phandle value.  If there is more than one node
+ * in the tree with the given phandle (an invalid tree), results are
+ * undefined.
+ *
+ * returns:
+ *	structure block offset of the located node (>= 0), on success
+ *	-FDT_ERR_NOTFOUND, no node with that phandle exists
+ *	-FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE, standard meanings
+ */
+int fdt_node_offset_by_phandle_node(const void *fdt, int node, uint32_t phandle);
 #endif /* SWIG */
 
 #endif /* _LIBFDT_H */

commit f82d121178c3f14d3846d92fe8d998c105d9e299
Author: yxj <yxj@rock-chips.com>
Date:   Thu Jun 19 16:11:24 2014 +0800

    libfdt: add function  fdt_device_is_available
    
    Change-Id: Ia6c727e246339107c280f715d0e35edd54ce6dc3
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
    Signed-off-by: yxj <yxj@rock-chips.com>

diff --git a/include/libfdt.h b/include/libfdt.h
old mode 100644
new mode 100755
diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
old mode 100644
new mode 100755
index 1be9538fd2..9994d17e56
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -680,3 +680,26 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
 
 	return offset; /* error from fdt_next_node() */
 }
+
+
+/**
+ *  of_device_is_available - check if a device is available for use
+ *
+ *  @device: Node to check for availability
+ *
+ *  Returns 1 if the status property is absent or set to "okay" or "ok",
+ *  0 otherwise
+ */
+int fdt_device_is_available(const void *blob, int node)
+{
+	const char *cell;
+	cell = fdt_getprop(blob, node, "status", NULL);
+	if (cell) {
+		if (!strcmp(cell, "okay") || !strcmp(cell, "ok"))
+			return 1;
+	} else {
+		return 1;
+	}
+	return 0;
+}
+
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
index 6af94cb3f7..210bc855e9 100644
--- a/lib/libfdt/libfdt.h
+++ b/lib/libfdt/libfdt.h
@@ -2165,6 +2165,7 @@ int fdt_next_region(const void *fdt,
  */
 int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count,
 			  int max_regions, struct fdt_region_state *info);
+int fdt_device_is_available(const void *blob, int node);
 #endif /* SWIG */
 
 #endif /* _LIBFDT_H */

commit d4bafcc8339af546de6330fc50662705732bdbef
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Mon Sep 4 10:41:16 2017 +0800

    video: do video_sync with lcdputs
    
    Change-Id: I7d239c86b314e693bf97ec25cbab3e6b132b4fc3
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
index b5afd72227..53f4eddd42 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -259,6 +259,7 @@ static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc,
 		return CMD_RET_FAILURE;
 	for (s = argv[1]; *s; s++)
 		vidconsole_put_char(dev, *s);
+	video_sync(dev->parent);
 
 	return 0;
 }

commit 4cfbff4dd7dc025503963f2ffc7ba2f8db9e5452
Author: Mark Yao <mark.yao@rock-chips.com>
Date:   Mon Sep 4 10:37:50 2017 +0800

    rockchip: rk3399: default enable vidconsole display
    
    Change-Id: I934ed8c2fe579d800e0287ba680c2490641bf743
    Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index cab940e7c0..e9143c92db 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -24,4 +24,8 @@
 #define CONFIG_SERIAL_TAG
 #define CONFIG_ENV_OVERWRITE
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif
diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h
index e481a28ae9..7fe47e0d84 100644
--- a/include/configs/puma_rk3399.h
+++ b/include/configs/puma_rk3399.h
@@ -29,4 +29,8 @@
 #define CONFIG_BMP_24BPP
 #define CONFIG_BMP_32BPP
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
 #endif
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index eda6ed7071..377d1fc769 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -72,6 +72,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"partitions=" PARTS_DEFAULT \
+	ROCKCHIP_DEVICE_SETTINGS \
 	BOOTENV
 
 #endif

commit f04b6e2961435a7fe118946317661d017d9b1ccc
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 28 18:20:43 2017 +0800

    rockchip: rk322x: fix pd_bus hclk/pclk
    
    The pd_bus hclk/pclk source is pd_bus aclk, not the PLL.
    
    Change-Id: I3e83f05f6b5423decb264f917adc91c6b40a6e46
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 6bbfde47f8..9e7e047a4e 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -117,16 +117,16 @@ static void rkclk_init(struct rk322x_cru *cru)
 		     pclk_div << CORE_PERI_DIV_SHIFT);
 
 	/*
-	 * select apll as pd_bus bus clock source and
+	 * select gpll as pd_bus bus clock source and
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
 	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
 
-	pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1;
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
 	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
 
-	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
 	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],

commit 7e8f60663f0eae1cbf443a722bb837749a45637a
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 17:53:24 2017 +0800

    rockchip: rk3128: add sdram driver
    
    RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.
    
    This patch is only used for U-Boot, but not for SPL which will
    comes later, maybe after we merge all the common code into a common
    file.
    
    Cover-letter:
    rockchip: add new SoC support for RK3128
    
    RK3128 is a quad-core ARM Cortex-A7 SoC, this patch set add basic
    support for it, it does not support SPL/TPL now, and the sdram driver
    only support get dram size from sysreg in U-Boot stage. Most of basic
    driver like clock, pinctrl, sysreset have been implement, and more
    drivers like mac and display will be later.
    
    END
    
    Change-Id: I8756d6acf7b085e25edb8c6f3e56b7bc8a33353c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 45b5fe7247..1a1e5578ca 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,6 +5,7 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
new file mode 100644
index 0000000000..04ad2bbb8c
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/sdram_common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct dram_info {
+	struct ram_info info;
+	struct rk3128_grf *grf;
+};
+
+static int rk3128_dmc_probe(struct udevice *dev)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	printf("%s: grf=%p\n", __func__, priv->grf);
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+				(phys_addr_t)&priv->grf->os_reg[1]);
+
+	return 0;
+}
+
+static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk3128_dmc_ops = {
+	.get_info = rk3128_dmc_get_info,
+};
+
+
+static const struct udevice_id rk3128_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3128-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk3128) = {
+	.name = "rockchip_rk3128_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk3128_dmc_ids,
+	.ops = &rk3128_dmc_ops,
+	.probe = rk3128_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+};

commit 8286a720ace5164e821495eefcaf66fedddd5a6b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 15:21:00 2017 +0800

    rockchip: rk3128: add defconfig for evb-rk3128
    
    Enable board config for evb-rk3128.
    Serial output and eMMC works in this version.
    
    Change-Id: I010fcdef35b745d6a93558a9382e4d020576eeeb
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
new file mode 100644
index 0000000000..e704305698
--- /dev/null
+++ b/configs/evb-rk3128_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3128=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3128=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DEBUG_UART_BASE=0x20068000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x310c
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y

commit 5e5397cbae97f271b8119bf17091641291066f67
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 15:19:49 2017 +0800

    rockchip: rk3128: add evb-rk3128 support
    
    evb-rk3128 is an evb from Rockchip based on rk3128 SoC:
    - 2 USB2.0 Host port;
    - 1 HDMI port;
    - 2 10/100M eth port;
    - 2GB ddr;
    - 16GB eMMC;
    - UART to USB debug port;
    
    Change-Id: Icfc8b74449678e0e2488f7bf394ec217e52c15b6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig
index e69de29bb2..a6e8722daf 100644
--- a/arch/arm/mach-rockchip/rk3128/Kconfig
+++ b/arch/arm/mach-rockchip/rk3128/Kconfig
@@ -0,0 +1,23 @@
+if ROCKCHIP_RK3128
+
+choice
+	prompt "RK3128 board select"
+
+config TARGET_EVB_RK3128
+	bool "RK3128 evaluation board"
+	help
+	  RK3128evb is a evaluation board for Rockchip rk3128,
+	  with full function and phisical connectors support like
+	  usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
+
+endchoice
+
+config SYS_SOC
+	default "rockchip"
+
+config SYS_MALLOC_F_LEN
+	default 0x0800
+
+source "board/rockchip/evb_rk3128/Kconfig"
+
+endif
diff --git a/board/rockchip/evb_rk3128/Kconfig b/board/rockchip/evb_rk3128/Kconfig
new file mode 100644
index 0000000000..5b3095ade9
--- /dev/null
+++ b/board/rockchip/evb_rk3128/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EVB_RK3128
+
+config SYS_BOARD
+	default "evb_rk3128"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "evb_rk3128"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/evb_rk3128/MAINTAINERS b/board/rockchip/evb_rk3128/MAINTAINERS
new file mode 100644
index 0000000000..f5145d1f04
--- /dev/null
+++ b/board/rockchip/evb_rk3128/MAINTAINERS
@@ -0,0 +1,6 @@
+EVB-RK3128
+M:      Kever Yang <kever.yang@rock-chips.com>
+S:      Maintained
+F:      board/rockchip/evb_rk3128
+F:      include/configs/evb_rk3128.h
+F:      configs/evb-rk3128_defconfig
diff --git a/board/rockchip/evb_rk3128/Makefile b/board/rockchip/evb_rk3128/Makefile
new file mode 100644
index 0000000000..6040891075
--- /dev/null
+++ b/board/rockchip/evb_rk3128/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= evb-rk3128.o
diff --git a/board/rockchip/evb_rk3128/evb-rk3128.c b/board/rockchip/evb_rk3128/evb-rk3128.c
new file mode 100644
index 0000000000..bf36e25a7c
--- /dev/null
+++ b/board/rockchip/evb_rk3128/evb-rk3128.c
@@ -0,0 +1,9 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
diff --git a/include/configs/evb_rk3128.h b/include/configs/evb_rk3128.h
new file mode 100644
index 0000000000..f60e22c80a
--- /dev/null
+++ b/include/configs/evb_rk3128.h
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __EVB_RK3128_H
+#define __EVB_RK3128_H
+
+#include <configs/rk3128_common.h>
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 1
+/*
+ * SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#endif

commit 65217512a6ba041e9f74f8994135f57133943af5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 14:48:15 2017 +0800

    rockchip: rk3128: add sysreset driver
    
    Add rk3128 sysreset driver.
    
    Change-Id: I69e0aa7e8ea7f8ef98a097d037d755b52a724844
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index ce161a7165..e3a0ab1718 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
 endif
+obj-$(CONFIG_ROCKCHIP_RK3128) += sysreset_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
diff --git a/drivers/sysreset/sysreset_rk3128.c b/drivers/sysreset/sysreset_rk3128.c
new file mode 100644
index 0000000000..5aab8ec50b
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3128.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+int rk3128_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3128_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		writel(0xeca8, &cru->cru_glb_srst_snd_value);
+		break;
+	case SYSRESET_COLD:
+		writel(0xfdb9, &cru->cru_glb_srst_fst_value);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3128_sysreset = {
+	.request	= rk3128_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3128) = {
+	.name	= "rk3128_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3128_sysreset,
+};

commit 2241bfd6de8c7d3c6a1aef886b4bba71cae89060
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 14:40:33 2017 +0800

    rockchip: rk3128: add pinctrl driver
    
    Add rk3128 pinctrl driver and grf/iomux structure definition.
    
    Change-Id: I0bf2f29fc28274f3d7a67beeacdb4f5a57210ba5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
new file mode 100644
index 0000000000..5da6cd2351
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
@@ -0,0 +1,551 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_GRF_RK3128_H
+#define _ASM_ARCH_GRF_RK3128_H
+
+#include <common.h>
+
+struct rk3128_grf {
+	unsigned int reserved[0x2a];
+	unsigned int gpio0a_iomux;
+	unsigned int gpio0b_iomux;
+	unsigned int gpio0c_iomux;
+	unsigned int gpio0d_iomux;
+	unsigned int gpio1a_iomux;
+	unsigned int gpio1b_iomux;
+	unsigned int gpio1c_iomux;
+	unsigned int gpio1d_iomux;
+	unsigned int gpio2a_iomux;
+	unsigned int gpio2b_iomux;
+	unsigned int gpio2c_iomux;
+	unsigned int gpio2d_iomux;
+	unsigned int gpio3a_iomux;
+	unsigned int gpio3b_iomux;
+	unsigned int gpio3c_iomux;
+	unsigned int gpio3d_iomux;
+	unsigned int gpio2c_iomux2;
+	unsigned int grf_cif_iomux;
+	unsigned int grf_cif_iomux1;
+	unsigned int reserved1[(0x118 - 0xf0) / 4 - 1];
+	unsigned int gpio0l_pull;
+	unsigned int gpio0h_pull;
+	unsigned int gpio1l_pull;
+	unsigned int gpio1h_pull;
+	unsigned int gpio2l_pull;
+	unsigned int gpio2h_pull;
+	unsigned int gpio3l_pull;
+	unsigned int gpio3h_pull;
+	unsigned int reserved2;
+	unsigned int soc_con0;
+	unsigned int soc_con1;
+	unsigned int soc_con2;
+	unsigned int soc_status0;
+	unsigned int reserved3[6];
+	unsigned int mac_con0;
+	unsigned int mac_con1;
+	unsigned int reserved4[4];
+	unsigned int uoc0_con0;
+	unsigned int reserved5;
+	unsigned int uoc1_con1;
+	unsigned int uoc1_con2;
+	unsigned int uoc1_con3;
+	unsigned int uoc1_con4;
+	unsigned int uoc1_con5;
+	unsigned int reserved6;
+	unsigned int ddrc_stat;
+	unsigned int reserved9;
+	unsigned int soc_status1;
+	unsigned int cpu_con0;
+	unsigned int cpu_con1;
+	unsigned int cpu_con2;
+	unsigned int cpu_con3;
+	unsigned int reserved10;
+	unsigned int reserved11;
+	unsigned int cpu_status0;
+	unsigned int cpu_status1;
+	unsigned int os_reg[8];
+	unsigned int reserved12[(0x280 - 0x1e4) / 4 - 1];
+	unsigned int usbphy0_con[8];
+	unsigned int usbphy1_con[8];
+	unsigned int uoc_status0;
+	unsigned int reserved13[(0x300 - 0x2c0) / 4 - 1];
+	unsigned int chip_tag;
+	unsigned int sdmmc_det_cnt;
+};
+check_member(rk3128_grf, sdmmc_det_cnt, 0x304);
+
+struct rk3128_pmu {
+	unsigned int wakeup_cfg;
+	unsigned int pwrdn_con;
+	unsigned int pwrdn_st;
+	unsigned int idle_req;
+	unsigned int idle_st;
+	unsigned int pwrmode_con;
+	unsigned int pwr_state;
+	unsigned int osc_cnt;
+	unsigned int core_pwrdwn_cnt;
+	unsigned int core_pwrup_cnt;
+	unsigned int sft_con;
+	unsigned int ddr_sref_st;
+	unsigned int int_con;
+	unsigned int int_st;
+	unsigned int sys_reg[4];
+};
+check_member(rk3128_pmu, int_st, 0x34);
+
+/* GRF_GPIO0A_IOMUX */
+enum {
+	GPIO0A7_SHIFT		= 14,
+	GPIO0A7_MASK		= 3 << GPIO0A7_SHIFT,
+	GPIO0A7_GPIO		= 0,
+	GPIO0A7_I2C3_SDA,
+
+	GPIO0A6_SHIFT		= 12,
+	GPIO0A6_MASK		= 3 << GPIO0A6_SHIFT,
+	GPIO0A6_GPIO		= 0,
+	GPIO0A6_I2C3_SCL,
+
+	GPIO0A3_SHIFT		= 6,
+	GPIO0A3_MASK		= 3 << GPIO0A3_SHIFT,
+	GPIO0A3_GPIO		= 0,
+	GPIO0A3_I2C1_SDA,
+
+	GPIO0A2_SHIFT		= 4,
+	GPIO0A2_MASK		= 1 << GPIO0A2_SHIFT,
+	GPIO0A2_GPIO		= 0,
+	GPIO0A2_I2C1_SCL,
+
+	GPIO0A1_SHIFT		= 2,
+	GPIO0A1_MASK		= 1 << GPIO0A1_SHIFT,
+	GPIO0A1_GPIO		= 0,
+	GPIO0A1_I2C0_SDA,
+
+	GPIO0A0_SHIFT		= 0,
+	GPIO0A0_MASK		= 1 << GPIO0A0_SHIFT,
+	GPIO0A0_GPIO		= 0,
+	GPIO0A0_I2C0_SCL,
+};
+
+/* GRF_GPIO0B_IOMUX */
+enum {
+	GPIO0B6_SHIFT		= 12,
+	GPIO0B6_MASK		= 3 << GPIO0B6_SHIFT,
+	GPIO0B6_GPIO		= 0,
+	GPIO0B6_I2S_SDI,
+	GPIO0B6_SPI_CSN0,
+
+	GPIO0B5_SHIFT		= 10,
+	GPIO0B5_MASK		= 3 << GPIO0B5_SHIFT,
+	GPIO0B5_GPIO		= 0,
+	GPIO0B5_I2S_SDO,
+	GPIO0B5_SPI_RXD,
+
+	GPIO0B4_SHIFT		= 8,
+	GPIO0B4_MASK		= 1 << GPIO0B4_SHIFT,
+	GPIO0B4_GPIO		= 0,
+	GPIO0B4_I2S_LRCKTX,
+
+	GPIO0B3_SHIFT		= 6,
+	GPIO0B3_MASK		= 3 << GPIO0B3_SHIFT,
+	GPIO0B3_GPIO		= 0,
+	GPIO0B3_I2S_LRCKRX,
+	GPIO0B3_SPI_TXD,
+
+	GPIO0B1_SHIFT		= 2,
+	GPIO0B1_MASK		= 3,
+	GPIO0B1_GPIO		= 0,
+	GPIO0B1_I2S_SCLK,
+	GPIO0B1_SPI_CLK,
+
+	GPIO0B0_SHIFT		= 0,
+	GPIO0B0_MASK		= 3,
+	GPIO0B0_GPIO		= 0,
+	GPIO0B0_I2S1_MCLK,
+};
+
+/* GRF_GPIO0D_IOMUX */
+enum {
+	GPIO0D4_SHIFT		= 8,
+	GPIO0D4_MASK		= 1 << GPIO0D4_SHIFT,
+	GPIO0D4_GPIO		= 0,
+	GPIO0D4_PWM2,
+
+	GPIO0D3_SHIFT		= 6,
+	GPIO0D3_MASK		= 1 << GPIO0D3_SHIFT,
+	GPIO0D3_GPIO		= 0,
+	GPIO0D3_PWM1,
+
+	GPIO0D2_SHIFT		= 4,
+	GPIO0D2_MASK		= 1 << GPIO0D2_SHIFT,
+	GPIO0D2_GPIO		= 0,
+	GPIO0D2_PWM0,
+
+	GPIO0D1_SHIFT		= 2,
+	GPIO0D1_MASK		= 1 << GPIO0D1_SHIFT,
+	GPIO0D1_GPIO		= 0,
+	GPIO0D1_UART2_CTSN,
+
+	GPIO0D0_SHIFT		= 0,
+	GPIO0D0_MASK		= 3 << GPIO0D0_SHIFT,
+	GPIO0D0_GPIO		= 0,
+	GPIO0D0_UART2_RTSN,
+	GPIO0D0_PMIC_SLEEP,
+};
+
+/* GRF_GPIO1A_IOMUX */
+enum {
+	GPIO1A5_SHIFT		= 10,
+	GPIO1A5_MASK		= 3 << GPIO1A5_SHIFT,
+	GPIO1A5_GPIO		= 0,
+	GPIO1A5_I2S_SDI,
+	GPIO1A5_SDMMC_DATA3,
+
+	GPIO1A4_SHIFT		= 8,
+	GPIO1A4_MASK		= 3 << GPIO1A4_SHIFT,
+	GPIO1A4_GPIO		= 0,
+	GPIO1A4_I2S_SD0,
+	GPIO1A4_SDMMC_DATA2,
+
+	GPIO1A3_SHIFT		= 6,
+	GPIO1A3_MASK		= 1 << GPIO1A3_SHIFT,
+	GPIO1A3_GPIO		= 0,
+	GPIO1A3_I2S_LRCKTX,
+
+	GPIO1A2_SHIFT		= 4,
+	GPIO1A2_MASK		= 3 << GPIO1A2_SHIFT,
+	GPIO1A2_GPIO		= 0,
+	GPIO1A2_I2S_LRCKRX,
+	GPIO1A2_SDMMC_DATA1,
+
+	GPIO1A1_SHIFT		= 2,
+	GPIO1A1_MASK		= 3 << GPIO1A1_SHIFT,
+	GPIO1A1_GPIO		= 0,
+	GPIO1A1_I2S_SCLK,
+	GPIO1A1_SDMMC_DATA0,
+	GPIO1A1_PMIC_SLEEP,
+
+	GPIO1A0_SHIFT		= 0,
+	GPIO1A0_MASK		= 3,
+	GPIO1A0_GPIO		= 0,
+	GPIO1A0_I2S_MCLK,
+	GPIO1A0_SDMMC_CLKOUT,
+	GPIO1A0_XIN32K,
+
+};
+
+/* GRF_GPIO1B_IOMUX */
+enum {
+	GPIO1B7_SHIFT		= 14,
+	GPIO1B7_MASK		= 1 << GPIO1B7_SHIFT,
+	GPIO1B7_GPIO		= 0,
+	GPIO1B7_MMC0_CMD,
+
+	GPIO1B6_SHIFT		= 12,
+	GPIO1B6_MASK		= 1 << GPIO1B6_SHIFT,
+	GPIO1B6_GPIO		= 0,
+	GPIO1B6_MMC_PWREN,
+
+	GPIO1B2_SHIFT		= 4,
+	GPIO1B2_MASK		= 3 << GPIO1B2_SHIFT,
+	GPIO1B2_GPIO		= 0,
+	GPIO1B2_SPI_RXD,
+	GPIO1B2_UART1_SIN,
+
+	GPIO1B1_SHIFT		= 2,
+	GPIO1B1_MASK		= 3 << GPIO1B1_SHIFT,
+	GPIO1B1_GPIO		= 0,
+	GPIO1B1_SPI_TXD,
+	GPIO1B1_UART1_SOUT,
+
+	GPIO1B0_SHIFT		= 0,
+	GPIO1B0_MASK		= 3 << GPIO1B0_SHIFT,
+	GPIO1B0_GPIO		= 0,
+	GPIO1B0_SPI_CLK,
+	GPIO1B0_UART1_CTSN
+};
+
+/* GRF_GPIO1C_IOMUX */
+enum {
+	GPIO1C6_SHIFT		= 12,
+	GPIO1C6_MASK		= 3 << GPIO1C6_SHIFT,
+	GPIO1C6_GPIO		= 0,
+	GPIO1C6_NAND_CS2,
+	GPIO1C6_EMMC_CMD,
+
+	GPIO1C5_SHIFT		= 10,
+	GPIO1C5_MASK		= 3 << GPIO1C5_SHIFT,
+	GPIO1C5_GPIO		= 0,
+	GPIO1C5_MMC0_D3,
+	GPIO1C5_JTAG_TMS,
+
+	GPIO1C4_SHIFT		= 8,
+	GPIO1C4_MASK		= 3 << GPIO1C4_SHIFT,
+	GPIO1C4_GPIO		= 0,
+	GPIO1C4_MMC0_D2,
+	GPIO1C4_JTAG_TCK,
+
+	GPIO1C3_SHIFT		= 6,
+	GPIO1C3_MASK		= 3 << GPIO1C3_SHIFT,
+	GPIO1C3_GPIO		= 0,
+	GPIO1C3_MMC0_D1,
+	GPIO1C3_UART2_RX,
+
+	GPIO1C2_SHIFT		= 4,
+	GPIO1C2_MASK		= 3 << GPIO1C2_SHIFT ,
+	GPIO1C2_GPIO		= 0,
+	GPIO1C2_MMC0_D0,
+	GPIO1C2_UART2_TX,
+
+	GPIO1C1_SHIFT		= 2,
+	GPIO1C1_MASK		= 1 << GPIO1C1_SHIFT,
+	GPIO1C1_GPIO		= 0,
+	GPIO1C1_MMC0_DETN,
+
+	GPIO1C0_SHIFT		= 0,
+	GPIO1C0_MASK		= 1 << GPIO1C0_SHIFT,
+	GPIO1C0_GPIO		= 0,
+	GPIO1C0_MMC0_CLKOUT,
+};
+
+/* GRF_GPIO1D_IOMUX */
+enum {
+	GPIO1D7_SHIFT		= 14,
+	GPIO1D7_MASK		= 3 << GPIO1D7_SHIFT,
+	GPIO1D7_GPIO		= 0,
+	GPIO1D7_NAND_D7,
+	GPIO1D7_EMMC_D7,
+	GPIO1D7_SPI_CSN1,
+
+	GPIO1D6_SHIFT		= 12,
+	GPIO1D6_MASK		= 3 << GPIO1D6_SHIFT,
+	GPIO1D6_GPIO		= 0,
+	GPIO1D6_NAND_D6,
+	GPIO1D6_EMMC_D6,
+	GPIO1D6_SPI_CSN0,
+
+	GPIO1D5_SHIFT		= 10,
+	GPIO1D5_MASK		= 3 << GPIO1D5_SHIFT,
+	GPIO1D5_GPIO		= 0,
+	GPIO1D5_NAND_D5,
+	GPIO1D5_EMMC_D5,
+	GPIO1D5_SPI_TXD1,
+
+	GPIO1D4_SHIFT		= 8,
+	GPIO1D4_MASK		= 3 << GPIO1D4_SHIFT,
+	GPIO1D4_GPIO		= 0,
+	GPIO1D4_NAND_D4,
+	GPIO1D4_EMMC_D4,
+	GPIO1D4_SPI_RXD1,
+
+	GPIO1D3_SHIFT		= 6,
+	GPIO1D3_MASK		= 3 << GPIO1D3_SHIFT,
+	GPIO1D3_GPIO		= 0,
+	GPIO1D3_NAND_D3,
+	GPIO1D3_EMMC_D3,
+	GPIO1D3_SFC_SIO3,
+
+	GPIO1D2_SHIFT		= 4,
+	GPIO1D2_MASK		= 3 << GPIO1D2_SHIFT,
+	GPIO1D2_GPIO		= 0,
+	GPIO1D2_NAND_D2,
+	GPIO1D2_EMMC_D2,
+	GPIO1D2_SFC_SIO2,
+
+	GPIO1D1_SHIFT		= 2,
+	GPIO1D1_MASK		= 3 << GPIO1D1_SHIFT,
+	GPIO1D1_GPIO		= 0,
+	GPIO1D1_NAND_D1,
+	GPIO1D1_EMMC_D1,
+	GPIO1D1_SFC_SIO1,
+
+	GPIO1D0_SHIFT		= 0,
+	GPIO1D0_MASK		= 3 << GPIO1D0_SHIFT,
+	GPIO1D0_GPIO		= 0,
+	GPIO1D0_NAND_D0,
+	GPIO1D0_EMMC_D0,
+	GPIO1D0_SFC_SIO0,
+};
+
+/* GRF_GPIO2A_IOMUX */
+enum {
+	GPIO2A7_SHIFT		= 14,
+	GPIO2A7_MASK		= 3 << GPIO2A7_SHIFT,
+	GPIO2A7_GPIO		= 0,
+	GPIO2A7_NAND_DQS,
+	GPIO2A7_EMMC_CLKOUT,
+
+	GPIO2A6_SHIFT		= 12,
+	GPIO2A6_MASK		= 1 << GPIO2A6_SHIFT,
+	GPIO2A6_GPIO		= 0,
+	GPIO2A6_NAND_CS0,
+
+	GPIO2A5_SHIFT		= 10,
+	GPIO2A5_MASK		= 3 << GPIO2A5_SHIFT,
+	GPIO2A5_GPIO		= 0,
+	GPIO2A5_NAND_WP,
+	GPIO2A5_EMMC_PWREN,
+
+	GPIO2A4_SHIFT		= 8,
+	GPIO2A4_MASK		= 3 << GPIO2A4_SHIFT,
+	GPIO2A4_GPIO		= 0,
+	GPIO2A4_NAND_RDY,
+	GPIO2A4_EMMC_CMD,
+	GPIO2A3_SFC_CLK,
+
+	GPIO2A3_SHIFT		= 6,
+	GPIO2A3_MASK		= 3 << GPIO2A3_SHIFT,
+	GPIO2A3_GPIO		= 0,
+	GPIO2A3_NAND_RDN,
+	GPIO2A4_SFC_CSN1,
+
+	GPIO2A2_SHIFT		= 4,
+	GPIO2A2_MASK		= 3 << GPIO2A2_SHIFT,
+	GPIO2A2_GPIO		= 0,
+	GPIO2A2_NAND_WRN,
+	GPIO2A4_SFC_CSN0,
+
+	GPIO2A1_SHIFT		= 2,
+	GPIO2A1_MASK		= 3 << GPIO2A1_SHIFT,
+	GPIO2A1_GPIO		= 0,
+	GPIO2A1_NAND_CLE,
+	GPIO2A1_EMMC_CLKOUT,
+
+	GPIO2A0_SHIFT		= 0,
+	GPIO2A0_MASK		= 3 << GPIO2A0_SHIFT,
+	GPIO2A0_GPIO		= 0,
+	GPIO2A0_NAND_ALE,
+	GPIO2A0_SPI_CLK,
+};
+
+/* GRF_GPIO2B_IOMUX */
+enum {
+	GPIO2B7_SHIFT		= 14,
+	GPIO2B7_MASK		= 3 << GPIO2B7_SHIFT,
+	GPIO2B7_GPIO		= 0,
+	GPIO2B7_LCDC0_D13,
+	GPIO2B7_EBC_SDCE5,
+	GPIO2B7_GMAC_RXER,
+
+	GPIO2B6_SHIFT		= 12,
+	GPIO2B6_MASK		= 3 << GPIO2B6_SHIFT,
+	GPIO2B6_GPIO		= 0,
+	GPIO2B6_LCDC0_D12,
+	GPIO2B6_EBC_SDCE4,
+	GPIO2B6_GMAC_CLK,
+
+	GPIO2B5_SHIFT		= 10,
+	GPIO2B5_MASK		= 3 << GPIO2B5_SHIFT,
+	GPIO2B5_GPIO		= 0,
+	GPIO2B5_LCDC0_D11,
+	GPIO2B5_EBC_SDCE3,
+	GPIO2B5_GMAC_TXEN,
+
+	GPIO2B4_SHIFT		= 8,
+	GPIO2B4_MASK		= 3 << GPIO2B4_SHIFT,
+	GPIO2B4_GPIO		= 0,
+	GPIO2B4_LCDC0_D10,
+	GPIO2B4_EBC_SDCE2,
+	GPIO2B4_GMAC_MDIO,
+
+	GPIO2B3_SHIFT		= 6,
+	GPIO2B3_MASK		= 3 << GPIO2B3_SHIFT,
+	GPIO2B3_GPIO		= 0,
+	GPIO2B3_LCDC0_DEN,
+	GPIO2B3_EBC_GDCLK,
+	GPIO2B3_GMAC_RXCLK,
+
+	GPIO2B2_SHIFT		= 4,
+	GPIO2B2_MASK		= 3 << GPIO2B2_SHIFT,
+	GPIO2B2_GPIO		= 0,
+	GPIO2B2_LCDC0_VSYNC,
+	GPIO2B2_EBC_SDOE,
+	GPIO2B2_GMAC_CRS,
+
+	GPIO2B1_SHIFT		= 2,
+	GPIO2B1_MASK		= 3 << GPIO2B1_SHIFT,
+	GPIO2B1_GPIO		= 0,
+	GPIO2B1_LCDC0_HSYNC,
+	GPIO2B1_EBC_SDLE,
+	GPIO2B1_GMAC_TXCLK,
+
+	GPIO2B0_SHIFT		= 0,
+	GPIO2B0_MASK		= 3 << GPIO2B0_SHIFT,
+	GPIO2B0_GPIO		= 0,
+	GPIO2B0_LCDC0_DCLK,
+	GPIO2B0_EBC_SDCLK,
+	GPIO2B0_GMAC_RXDV,
+};
+
+/* GRF_GPIO2C_IOMUX */
+enum {
+	GPIO2C3_SHIFT		= 6,
+	GPIO2C3_MASK		= 3 << GPIO2C3_SHIFT,
+	GPIO2C3_GPIO		= 0,
+	GPIO2C3_LCDC0_D17,
+	GPIO2C3_EBC_GDPWR0,
+	GPIO2C3_GMAC_TXD0,
+
+	GPIO2C2_SHIFT		= 4,
+	GPIO2C2_MASK		= 3 << GPIO2C2_SHIFT,
+	GPIO2C2_GPIO		= 0,
+	GPIO2C2_LCDC0_D16,
+	GPIO2C2_EBC_GDSP,
+	GPIO2C2_GMAC_TXD1,
+
+	GPIO2C1_SHIFT		= 2,
+	GPIO2C1_MASK		= 3 << GPIO2C1_SHIFT,
+	GPIO2C1_GPIO		= 0,
+	GPIO2C1_LCDC0_D15,
+	GPIO2C1_EBC_GDOE,
+	GPIO2C1_GMAC_RXD0,
+
+	GPIO2C0_SHIFT		= 0,
+	GPIO2C0_MASK		= 3 << GPIO2C0_SHIFT,
+	GPIO2C0_GPIO		= 0,
+	GPIO2C0_LCDC0_D14,
+	GPIO2C0_EBC_VCOM,
+	GPIO2C0_GMAC_RXD1,
+};
+
+/* GRF_GPIO2D_IOMUX */
+enum {
+	GPIO2D6_SHIFT		= 12,
+	GPIO2D6_MASK		= 3 << GPIO2D6_SHIFT,
+	GPIO2D6_GPIO		= 0,
+	GPIO2D6_LCDC0_D22,
+	GPIO2D6_GMAC_COL	= 4,
+
+	GPIO2D1_SHIFT		= 2,
+	GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
+	GPIO2D1_GPIO		= 0,
+	GPIO2D1_GMAC_MDC	= 3,
+};
+
+/* GRF_GPIO2C_IOMUX2 */
+enum {
+	GPIO2C7_SHIFT		= 12,
+	GPIO2C7_MASK		= 7 << GPIO2C7_SHIFT,
+	GPIO2C7_GPIO		= 0,
+	GPIO2C7_GMAC_TXD3	= 4,
+
+	GPIO2C6_SHIFT		= 12,
+	GPIO2C6_MASK		= 7 << GPIO2C6_SHIFT,
+	GPIO2C6_GPIO		= 0,
+	GPIO2C6_GMAC_TXD2	= 4,
+
+	GPIO2C5_SHIFT		= 12,
+	GPIO2C5_MASK		= 7 << GPIO2C5_SHIFT,
+	GPIO2C5_GPIO		= 0,
+	GPIO2C5_I2C2_SCL	= 3,
+	GPIO2C5_GMAC_RXD2,
+
+	GPIO2C4_SHIFT		= 12,
+	GPIO2C4_MASK		= 7 << GPIO2C4_SHIFT,
+	GPIO2C4_GPIO		= 0,
+	GPIO2C4_I2C2_SDA	= 3,
+	GPIO2C4_GMAC_RXD2,
+};
+#endif
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index bcbe4a18c1..35a7c62963 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -168,6 +168,16 @@ config PINCTRL_ROCKCHIP_RK3036
 	  the GPIO definitions and pin control functions for each available
 	  multiplex function.
 
+config PINCTRL_ROCKCHIP_RK3128
+	bool "Rockchip rk3128 pin control driver"
+	depends on DM
+	help
+	  Support pin multiplexing control on Rockchip rk3128 SoCs.
+
+	  The driver is controlled by a device tree node which contains both
+	  the GPIO definitions and pin control functions for each available
+	  multiplex function.
+
 config PINCTRL_ROCKCHIP_RK3188
 	bool "Rockchip rk3188 pin control driver"
 	depends on DM
diff --git a/drivers/pinctrl/rockchip/Makefile b/drivers/pinctrl/rockchip/Makefile
index 5251771a10..f09c6e17b4 100644
--- a/drivers/pinctrl/rockchip/Makefile
+++ b/drivers/pinctrl/rockchip/Makefile
@@ -1,11 +1,11 @@
 #
-# Copyright (c) 2015 Google, Inc
-# Written by Simon Glass <sjg@chromium.org>
+# Copyright (c) 2017 Rockchip Electronics Co., Ltd
 #
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
+obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3128) += pinctrl_rk3128.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK322X) += pinctrl_rk322x.o
 obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3288) += pinctrl_rk3288.o
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3128.c b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
new file mode 100644
index 0000000000..b1c32ac592
--- /dev/null
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3128.c
@@ -0,0 +1,187 @@
+/*
+ * Pinctrl driver for Rockchip 3128 SoCs
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/periph.h>
+#include <dm/pinctrl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rk3128_pinctrl_priv {
+	struct rk3128_grf *grf;
+};
+
+static void pinctrl_rk3128_i2c_config(struct rk3128_grf *grf, int i2c_id)
+{
+	switch (i2c_id) {
+	case PERIPH_ID_I2C0:
+		rk_clrsetreg(&grf->gpio0a_iomux,
+			     GPIO0A1_MASK | GPIO0A0_MASK,
+			     GPIO0A1_I2C0_SDA << GPIO0A1_SHIFT |
+			     GPIO0A0_I2C0_SCL << GPIO0A0_SHIFT);
+
+		break;
+	case PERIPH_ID_I2C1:
+		rk_clrsetreg(&grf->gpio0a_iomux,
+			     GPIO0A3_MASK | GPIO0A2_MASK,
+			     GPIO0A3_I2C1_SDA << GPIO0A3_SHIFT |
+			     GPIO0A2_I2C1_SCL << GPIO0A2_SHIFT);
+		break;
+	case PERIPH_ID_I2C2:
+		rk_clrsetreg(&grf->gpio2c_iomux2,
+			     GPIO2C5_MASK | GPIO2C4_MASK,
+			     GPIO2C5_I2C2_SCL << GPIO2C5_SHIFT |
+			     GPIO2C4_I2C2_SDA << GPIO2C4_SHIFT);
+		break;
+	case PERIPH_ID_I2C3:
+		rk_clrsetreg(&grf->gpio0a_iomux,
+			     GPIO0A7_MASK | GPIO0A6_MASK,
+			     GPIO0A7_I2C3_SDA << GPIO0A7_SHIFT |
+			     GPIO0A6_I2C3_SCL << GPIO0A6_SHIFT);
+
+		break;
+	}
+}
+
+static void pinctrl_rk3128_sdmmc_config(struct rk3128_grf *grf, int mmc_id)
+{
+	switch (mmc_id) {
+	case PERIPH_ID_EMMC:
+		rk_clrsetreg(&grf->gpio1d_iomux, 0xffff,
+			     GPIO1D7_EMMC_D7 << GPIO1D7_SHIFT |
+			     GPIO1D6_EMMC_D6 << GPIO1D6_SHIFT |
+			     GPIO1D5_EMMC_D5 << GPIO1D5_SHIFT |
+			     GPIO1D4_EMMC_D4 << GPIO1D4_SHIFT |
+			     GPIO1D3_EMMC_D3 << GPIO1D3_SHIFT |
+			     GPIO1D2_EMMC_D2 << GPIO1D2_SHIFT |
+			     GPIO1D1_EMMC_D1 << GPIO1D1_SHIFT |
+			     GPIO1D0_EMMC_D0 << GPIO1D0_SHIFT);
+		rk_clrsetreg(&grf->gpio2a_iomux,
+			     GPIO2A5_MASK | GPIO2A7_MASK,
+			     GPIO2A5_EMMC_PWREN << GPIO2A5_SHIFT |
+			     GPIO2A7_EMMC_CLKOUT << GPIO2A7_SHIFT);
+		break;
+	case PERIPH_ID_SDCARD:
+		rk_clrsetreg(&grf->gpio1c_iomux, 0x0fff,
+			     GPIO1C5_MMC0_D3 << GPIO1C5_SHIFT |
+			     GPIO1C4_MMC0_D2 << GPIO1C4_SHIFT |
+			     GPIO1C3_MMC0_D1 << GPIO1C3_SHIFT |
+			     GPIO1C2_MMC0_D0 << GPIO1C2_SHIFT |
+			     GPIO1C1_MMC0_DETN << GPIO1C1_SHIFT |
+			     GPIO1C0_MMC0_CLKOUT << GPIO1C0_SHIFT);
+		break;
+	}
+}
+
+static int rk3128_pinctrl_request(struct udevice *dev, int func, int flags)
+{
+	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
+
+	debug("%s: func=%x, flags=%x\n", __func__, func, flags);
+	switch (func) {
+	case PERIPH_ID_I2C0:
+	case PERIPH_ID_I2C1:
+	case PERIPH_ID_I2C2:
+	case PERIPH_ID_I2C3:
+		pinctrl_rk3128_i2c_config(priv->grf, func);
+		break;
+	case PERIPH_ID_SDMMC0:
+	case PERIPH_ID_SDMMC1:
+		pinctrl_rk3128_sdmmc_config(priv->grf, func);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int rk3128_pinctrl_get_periph_id(struct udevice *dev,
+					struct udevice *periph)
+{
+	u32 cell[3];
+	int ret;
+
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
+	if (ret < 0)
+		return -EINVAL;
+
+	switch (cell[1]) {
+	case 14:
+		return PERIPH_ID_SDCARD;
+	case 16:
+		return PERIPH_ID_EMMC;
+	case 20:
+		return PERIPH_ID_UART0;
+	case 21:
+		return PERIPH_ID_UART1;
+	case 22:
+		return PERIPH_ID_UART2;
+	case 23:
+		return PERIPH_ID_SPI0;
+	case 24:
+		return PERIPH_ID_I2C0;
+	case 25:
+		return PERIPH_ID_I2C1;
+	case 26:
+		return PERIPH_ID_I2C2;
+	case 27:
+		return PERIPH_ID_I2C3;
+	case 30:
+		return PERIPH_ID_PWM0;
+	}
+	return -ENOENT;
+}
+
+static int rk3128_pinctrl_set_state_simple(struct udevice *dev,
+					   struct udevice *periph)
+{
+	int func;
+
+	func = rk3128_pinctrl_get_periph_id(dev, periph);
+	if (func < 0)
+		return func;
+	return rk3128_pinctrl_request(dev, func, 0);
+}
+
+static struct pinctrl_ops rk3128_pinctrl_ops = {
+	.set_state_simple	= rk3128_pinctrl_set_state_simple,
+	.request	= rk3128_pinctrl_request,
+	.get_periph_id	= rk3128_pinctrl_get_periph_id,
+};
+
+static int rk3128_pinctrl_probe(struct udevice *dev)
+{
+	struct rk3128_pinctrl_priv *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	debug("%s: grf=%p\n", __func__, priv->grf);
+	return 0;
+}
+
+static const struct udevice_id rk3128_pinctrl_ids[] = {
+	{ .compatible = "rockchip,rk3128-pinctrl" },
+	{ }
+};
+
+U_BOOT_DRIVER(pinctrl_rk3128) = {
+	.name		= "pinctrl_rk3128",
+	.id		= UCLASS_PINCTRL,
+	.of_match	= rk3128_pinctrl_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3128_pinctrl_priv),
+	.ops		= &rk3128_pinctrl_ops,
+	.bind		= dm_scan_fdt_dev,
+	.probe		= rk3128_pinctrl_probe,
+};

commit de4fa2432c987fd9f99e4fba36cdb768bdfd7475
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 14:16:28 2017 +0800

    rockchip: rk3128: add clock driver
    
    Add rk3128 clock driver and cru structure definition.
    
    Change-Id: Ib6e17f56b2e7e6cc6cdf06f8d9ac44c062b5b6e3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
new file mode 100644
index 0000000000..8d6b166631
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -0,0 +1,173 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_CRU_RK3128_H
+#define _ASM_ARCH_CRU_RK3128_H
+
+#include <common.h>
+
+#define MHz		1000000
+#define OSC_HZ		(24 * MHz)
+
+#define APLL_HZ		(600 * MHz)
+#define GPLL_HZ		(594 * MHz)
+
+#define CORE_PERI_HZ	150000000
+#define CORE_ACLK_HZ	300000000
+
+#define BUS_ACLK_HZ	148500000
+#define BUS_HCLK_HZ	148500000
+#define BUS_PCLK_HZ	74250000
+
+#define PERI_ACLK_HZ	148500000
+#define PERI_HCLK_HZ	148500000
+#define PERI_PCLK_HZ	74250000
+
+/* Private data for the clock driver - used by rockchip_get_cru() */
+struct rk3128_clk_priv {
+	struct rk3128_cru *cru;
+	ulong rate;
+};
+
+struct rk3128_cru {
+	struct rk3128_pll {
+		unsigned int con0;
+		unsigned int con1;
+		unsigned int con2;
+		unsigned int con3;
+	} pll[4];
+	unsigned int cru_mode_con;
+	unsigned int cru_clksel_con[35];
+	unsigned int cru_clkgate_con[11];
+	unsigned int reserved;
+	unsigned int cru_glb_srst_fst_value;
+	unsigned int cru_glb_srst_snd_value;
+	unsigned int reserved1[2];
+	unsigned int cru_softrst_con[9];
+	unsigned int cru_misc_con;
+	unsigned int reserved2[2];
+	unsigned int cru_glb_cnt_th;
+	unsigned int reserved3[3];
+	unsigned int cru_glb_rst_st;
+	unsigned int reserved4[(0x1c0 - 0x150) / 4 - 1];
+	unsigned int cru_sdmmc_con[2];
+	unsigned int cru_sdio_con[2];
+	unsigned int reserved5[2];
+	unsigned int cru_emmc_con[2];
+	unsigned int reserved6[4];
+	unsigned int cru_pll_prg_en;
+};
+check_member(rk3128_cru, cru_pll_prg_en, 0x01f0);
+
+struct pll_div {
+	u32 refdiv;
+	u32 fbdiv;
+	u32 postdiv1;
+	u32 postdiv2;
+	u32 frac;
+};
+
+enum {
+	/* PLLCON0*/
+	PLL_POSTDIV1_SHIFT	= 12,
+	PLL_POSTDIV1_MASK	= 7 << PLL_POSTDIV1_SHIFT,
+	PLL_FBDIV_SHIFT		= 0,
+	PLL_FBDIV_MASK		= 0xfff,
+
+	/* PLLCON1 */
+	PLL_RST_SHIFT		= 14,
+	PLL_PD_SHIFT		= 13,
+	PLL_PD_MASK		= 1 << PLL_PD_SHIFT,
+	PLL_DSMPD_SHIFT		= 12,
+	PLL_DSMPD_MASK		= 1 << PLL_DSMPD_SHIFT,
+	PLL_LOCK_STATUS_SHIFT	= 10,
+	PLL_LOCK_STATUS_MASK	= 1 << PLL_LOCK_STATUS_SHIFT,
+	PLL_POSTDIV2_SHIFT	= 6,
+	PLL_POSTDIV2_MASK	= 7 << PLL_POSTDIV2_SHIFT,
+	PLL_REFDIV_SHIFT	= 0,
+	PLL_REFDIV_MASK		= 0x3f,
+
+	/* CRU_MODE */
+	GPLL_MODE_SHIFT		= 12,
+	GPLL_MODE_MASK		= 3 << GPLL_MODE_SHIFT,
+	GPLL_MODE_SLOW		= 0,
+	GPLL_MODE_NORM,
+	GPLL_MODE_DEEP,
+	DPLL_MODE_SHIFT		= 4,
+	DPLL_MODE_MASK		= 1 << DPLL_MODE_SHIFT,
+	DPLL_MODE_SLOW		= 0,
+	DPLL_MODE_NORM,
+	APLL_MODE_SHIFT		= 0,
+	APLL_MODE_MASK		= 1 << APLL_MODE_SHIFT,
+	APLL_MODE_SLOW		= 0,
+	APLL_MODE_NORM,
+
+	/* CRU_CLK_SEL0_CON */
+	BUS_ACLK_PLL_SEL_SHIFT	= 14,
+	BUS_ACLK_PLL_SEL_MASK	= 3 << BUS_ACLK_PLL_SEL_SHIFT,
+	BUS_ACLK_PLL_SEL_CPLL	= 0,
+	BUS_ACLK_PLL_SEL_GPLL,
+	BUS_ACLK_PLL_SEL_GPLL_DIV2,
+	BUS_ACLK_PLL_SEL_GPLL_DIV3,
+	BUS_ACLK_DIV_SHIFT	= 8,
+	BUS_ACLK_DIV_MASK	= 0x1f << BUS_ACLK_DIV_SHIFT,
+	CORE_CLK_PLL_SEL_SHIFT	= 7,
+	CORE_CLK_PLL_SEL_MASK	= 1 << CORE_CLK_PLL_SEL_SHIFT,
+	CORE_CLK_PLL_SEL_APLL	= 0,
+	CORE_CLK_PLL_SEL_GPLL_DIV2,
+	CORE_DIV_CON_SHIFT	= 0,
+	CORE_DIV_CON_MASK	= 0x1f << CORE_DIV_CON_SHIFT,
+
+	/* CRU_CLK_SEL1_CON */
+	BUS_PCLK_DIV_SHIFT	= 12,
+	BUS_PCLK_DIV_MASK	= 7 << BUS_PCLK_DIV_SHIFT,
+	BUS_HCLK_DIV_SHIFT	= 8,
+	BUS_HCLK_DIV_MASK	= 3 << BUS_HCLK_DIV_SHIFT,
+	CORE_ACLK_DIV_SHIFT	= 4,
+	CORE_ACLK_DIV_MASK	= 7 << CORE_ACLK_DIV_SHIFT,
+	CORE_PERI_DIV_SHIFT	= 0,
+	CORE_PERI_DIV_MASK	= 0xf << CORE_PERI_DIV_SHIFT,
+
+	/* CRU_CLKSEL10_CON */
+	PERI_PLL_SEL_SHIFT	= 14,
+	PERI_PLL_SEL_MASK	= 1 << PERI_PLL_SEL_SHIFT,
+	PERI_PLL_APLL		= 0,
+	PERI_PLL_DPLL,
+	PERI_PLL_GPLL,
+	PERI_PCLK_DIV_SHIFT	= 12,
+	PERI_PCLK_DIV_MASK	= 3 << PERI_PCLK_DIV_SHIFT,
+	PERI_HCLK_DIV_SHIFT	= 8,
+	PERI_HCLK_DIV_MASK	= 3 << PERI_HCLK_DIV_SHIFT,
+	PERI_ACLK_DIV_SHIFT	= 0,
+	PERI_ACLK_DIV_MASK	= 0x1f << PERI_ACLK_DIV_SHIFT,
+
+	/* CRU_CLKSEL11_CON */
+	MMC0_PLL_SHIFT		= 6,
+	MMC0_PLL_MASK		= 3 << MMC0_PLL_SHIFT,
+	MMC0_SEL_APLL		= 0,
+	MMC0_SEL_GPLL,
+	MMC0_SEL_GPLL_DIV2,
+	MMC0_SEL_24M,
+	MMC0_DIV_SHIFT		= 0,
+	MMC0_DIV_MASK		= 0x3f << MMC0_DIV_SHIFT,
+
+	/* CRU_CLKSEL12_CON */
+	EMMC_PLL_SHIFT		= 14,
+	EMMC_PLL_MASK		= 3 << EMMC_PLL_SHIFT,
+	EMMC_SEL_APLL		= 0,
+	EMMC_SEL_GPLL,
+	EMMC_SEL_GPLL_DIV2,
+	EMMC_SEL_24M,
+	EMMC_DIV_SHIFT		= 8,
+	EMMC_DIV_MASK		= 0x3f << EMMC_DIV_SHIFT,
+
+	/* CRU_SOFTRST5_CON */
+	DDRCTRL_PSRST_SHIFT	= 11,
+	DDRCTRL_SRST_SHIFT	= 10,
+	DDRPHY_PSRST_SHIFT	= 9,
+	DDRPHY_SRST_SHIFT	= 8,
+};
+#endif
diff --git a/arch/arm/mach-rockchip/rk3128/Makefile b/arch/arm/mach-rockchip/rk3128/Makefile
index 0f63d921de..50e1117542 100644
--- a/arch/arm/mach-rockchip/rk3128/Makefile
+++ b/arch/arm/mach-rockchip/rk3128/Makefile
@@ -6,3 +6,4 @@
 
 obj-y += rk3128.o
 obj-y += syscon_rk3128.o
+obj-y += clk_rk3128.o
diff --git a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c
new file mode 100644
index 0000000000..7ca5fd3484
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+
+int rockchip_get_clk(struct udevice **devp)
+{
+	return uclass_get_device_by_driver(UCLASS_CLK,
+			DM_GET_DRIVER(rockchip_rk3128_cru), devp);
+}
+
+void *rockchip_get_cru(void)
+{
+	struct rk3128_clk_priv *priv;
+	struct udevice *dev;
+	int ret;
+
+	ret = rockchip_get_clk(&dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	priv = dev_get_priv(dev);
+
+	return priv->cru;
+}
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index c50aff2e93..eae0ef6a9f 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -1,10 +1,11 @@
 #
-# Copyright (c) 2016 Google, Inc
+# Copyright (c) 2017 Rockchip Electronics Co., Ltd
 #
 # SPDX-License-Identifier:      GPL-2.0+
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += clk_rk3036.o
+obj-$(CONFIG_ROCKCHIP_RK3128) += clk_rk3128.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += clk_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += clk_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
new file mode 100644
index 0000000000..830848ea24
--- /dev/null
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -0,0 +1,350 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3128.h>
+#include <asm/arch/hardware.h>
+#include <dm/lists.h>
+#include <dt-bindings/clock/rk3128-cru.h>
+#include <linux/log2.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+	VCO_MAX_HZ	= 2400U * 1000000,
+	VCO_MIN_HZ	= 600 * 1000000,
+	OUTPUT_MAX_HZ	= 2400U * 1000000,
+	OUTPUT_MIN_HZ	= 24 * 1000000,
+};
+
+#define DIV_TO_RATE(input_rate, div)	((input_rate) / ((div) + 1))
+
+#define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\
+	.refdiv = _refdiv,\
+	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
+	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
+
+/* use integer mode*/
+static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
+static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
+
+static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
+			 const struct pll_div *div)
+{
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+
+	/* All PLLs have same VCO and output frequency range restrictions. */
+	uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000;
+	uint output_hz = vco_hz / div->postdiv1 / div->postdiv2;
+
+	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
+	      pll, div->fbdiv, div->refdiv, div->postdiv1,
+	      div->postdiv2, vco_hz, output_hz);
+	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
+	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+
+	/* use integer mode */
+	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);
+	/* Power down */
+	rk_setreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	rk_clrsetreg(&pll->con0,
+		     PLL_POSTDIV1_MASK | PLL_FBDIV_MASK,
+		     (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv);
+	rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK,
+		     (div->postdiv2 << PLL_POSTDIV2_SHIFT |
+		     div->refdiv << PLL_REFDIV_SHIFT));
+
+	/* Power Up */
+	rk_clrreg(&pll->con1, 1 << PLL_PD_SHIFT);
+
+	/* waiting for pll lock */
+	while (readl(&pll->con1) & (1 << PLL_LOCK_STATUS_SHIFT))
+		udelay(1);
+
+	return 0;
+}
+
+static void rkclk_init(struct rk3128_cru *cru)
+{
+	u32 aclk_div;
+	u32 hclk_div;
+	u32 pclk_div;
+
+	/* pll enter slow-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_SLOW << GPLL_MODE_SHIFT |
+		     APLL_MODE_SLOW << APLL_MODE_SHIFT);
+
+	/* init pll */
+	rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg);
+	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);
+
+	/*
+	 * select apll as cpu/core clock pll source and
+	 * set up dependent divisors for PERI and ACLK clocks.
+	 * core hz : apll = 1:1
+	 */
+	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
+	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+
+	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
+	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,
+		     CORE_CLK_PLL_SEL_APLL << CORE_CLK_PLL_SEL_SHIFT |
+		     0 << CORE_DIV_CON_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     CORE_ACLK_DIV_MASK | CORE_PERI_DIV_MASK,
+		     aclk_div << CORE_ACLK_DIV_SHIFT |
+		     pclk_div << CORE_PERI_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_bus bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
+	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+
+	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
+	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+
+	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
+	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+
+	rk_clrsetreg(&cru->cru_clksel_con[0],
+		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,
+		     BUS_ACLK_PLL_SEL_GPLL << BUS_ACLK_PLL_SEL_SHIFT |
+		     aclk_div << BUS_ACLK_DIV_SHIFT);
+
+	rk_clrsetreg(&cru->cru_clksel_con[1],
+		     BUS_PCLK_DIV_MASK | BUS_HCLK_DIV_MASK,
+		     pclk_div << BUS_PCLK_DIV_SHIFT |
+		     hclk_div << BUS_HCLK_DIV_SHIFT);
+
+	/*
+	 * select gpll as pd_peri bus clock source and
+	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
+	 */
+	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
+	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+
+	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
+	assert((1 << hclk_div) * PERI_HCLK_HZ ==
+		PERI_ACLK_HZ && (hclk_div < 0x4));
+
+	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
+	assert((1 << pclk_div) * PERI_PCLK_HZ ==
+		PERI_ACLK_HZ && pclk_div < 0x8);
+
+	rk_clrsetreg(&cru->cru_clksel_con[10],
+		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |
+		     PERI_HCLK_DIV_MASK | PERI_ACLK_DIV_MASK,
+		     PERI_PLL_GPLL << PERI_PLL_SEL_SHIFT |
+		     pclk_div << PERI_PCLK_DIV_SHIFT |
+		     hclk_div << PERI_HCLK_DIV_SHIFT |
+		     aclk_div << PERI_ACLK_DIV_SHIFT);
+
+	/* PLL enter normal-mode */
+	rk_clrsetreg(&cru->cru_mode_con,
+		     GPLL_MODE_MASK | APLL_MODE_MASK,
+		     GPLL_MODE_NORM << GPLL_MODE_SHIFT |
+		     APLL_MODE_NORM << APLL_MODE_SHIFT);
+}
+
+/* Get pll rate by id */
+static uint32_t rkclk_pll_get_rate(struct rk3128_cru *cru,
+				   enum rk_clk_id clk_id)
+{
+	uint32_t refdiv, fbdiv, postdiv1, postdiv2;
+	uint32_t con;
+	int pll_id = rk_pll_id(clk_id);
+	struct rk3128_pll *pll = &cru->pll[pll_id];
+	static u8 clk_shift[CLK_COUNT] = {
+		0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, 0xff,
+		GPLL_MODE_SHIFT, 0xff
+	};
+	static u32 clk_mask[CLK_COUNT] = {
+		0xff, APLL_MODE_MASK, DPLL_MODE_MASK, 0xff,
+		GPLL_MODE_MASK, 0xff
+	};
+	uint shift;
+	uint mask;
+
+	con = readl(&cru->cru_mode_con);
+	shift = clk_shift[clk_id];
+	mask = clk_mask[clk_id];
+
+	switch ((con & mask) >> shift) {
+	case GPLL_MODE_SLOW:
+		return OSC_HZ;
+	case GPLL_MODE_NORM:
+
+		/* normal mode */
+		con = readl(&pll->con0);
+		postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT;
+		fbdiv = (con & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT;
+		con = readl(&pll->con1);
+		postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT;
+		refdiv = (con & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;
+		return (24 * fbdiv / (refdiv * postdiv1 * postdiv2)) * 1000000;
+	case GPLL_MODE_DEEP:
+	default:
+		return 32768;
+	}
+}
+
+static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph)
+{
+	uint src_rate;
+	uint div, mux;
+	u32 con;
+
+	switch (periph) {
+	case HCLK_EMMC:
+	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
+		con = readl(&cru->cru_clksel_con[12]);
+		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
+		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		con = readl(&cru->cru_clksel_con[11]);
+		mux = (con & MMC0_PLL_MASK) >> MMC0_PLL_SHIFT;
+		div = (con & MMC0_DIV_MASK) >> MMC0_DIV_SHIFT;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	src_rate = mux == EMMC_SEL_24M ? OSC_HZ : clk_general_rate;
+	return DIV_TO_RATE(src_rate, div);
+}
+
+static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate,
+				  int periph, uint freq)
+{
+	int src_clk_div;
+	int mux;
+
+	debug("%s: clk_general_rate=%u\n", __func__, clk_general_rate);
+
+	/* mmc clock defaulg div 2 internal, need provide double in cru */
+	src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq);
+
+	if (src_clk_div > 128) {
+		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
+		mux = EMMC_SEL_24M;
+	} else {
+		mux = EMMC_SEL_GPLL;
+	}
+
+	switch (periph) {
+	case HCLK_EMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[12],
+			     EMMC_PLL_MASK | EMMC_DIV_MASK,
+			     mux << EMMC_PLL_SHIFT |
+			     (src_clk_div - 1) << EMMC_DIV_SHIFT);
+		break;
+	case HCLK_SDMMC:
+	case SCLK_SDMMC:
+		rk_clrsetreg(&cru->cru_clksel_con[11],
+			     MMC0_PLL_MASK | MMC0_DIV_MASK,
+			     mux << MMC0_PLL_SHIFT |
+			     (src_clk_div - 1) << MMC0_DIV_SHIFT);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rockchip_mmc_get_clk(cru, clk_general_rate, periph);
+}
+
+static ulong rk3128_clk_get_rate(struct clk *clk)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+
+	switch (clk->id) {
+	case 0 ... 63:
+		return rkclk_pll_get_rate(priv->cru, clk->id);
+	default:
+		return -ENOENT;
+	}
+}
+
+static ulong rk3128_clk_set_rate(struct clk *clk, ulong rate)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(clk->dev);
+	ulong new_rate, gclk_rate;
+
+	gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL);
+	switch (clk->id) {
+	case 0 ... 63:
+		return 0;
+	case HCLK_EMMC:
+		new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate,
+						clk->id, rate);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return new_rate;
+}
+
+static struct clk_ops rk3128_clk_ops = {
+	.get_rate	= rk3128_clk_get_rate,
+	.set_rate	= rk3128_clk_set_rate,
+};
+
+static int rk3128_clk_probe(struct udevice *dev)
+{
+	struct rk3128_clk_priv *priv = dev_get_priv(dev);
+
+	priv->cru = (struct rk3128_cru *)devfdt_get_addr(dev);
+	rkclk_init(priv->cru);
+
+	return 0;
+}
+
+static int rk3128_clk_bind(struct udevice *dev)
+{
+	int ret;
+
+	/* The reset driver does not have a device node, so bind it here */
+	ret = device_bind_driver(gd->dm_root, "rk3128_sysreset", "reset", &dev);
+	if (ret)
+		debug("Warning: No RK3128 reset driver: ret=%d\n", ret);
+
+	return 0;
+}
+
+static const struct udevice_id rk3128_clk_ids[] = {
+	{ .compatible = "rockchip,rk3128-cru" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_rk3128_cru) = {
+	.name		= "clk_rk3128",
+	.id		= UCLASS_CLK,
+	.of_match	= rk3128_clk_ids,
+	.priv_auto_alloc_size = sizeof(struct rk3128_clk_priv),
+	.ops		= &rk3128_clk_ops,
+	.bind		= rk3128_clk_bind,
+	.probe		= rk3128_clk_probe,
+};

commit 6a13bde3e49fb0a31c6d46fd27313d77fb559224
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 11:01:51 2017 +0800

    rockchip: rk3128: add soc basic support
    
    RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
    and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
    and device, HDMI/LVDS/MIPI display.
    
    Change-Id: I8b1ded3cadddd7fb3aa6df6eebd882f6cb0c994b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 3c492a20ff..d59dad320a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,6 +11,15 @@ config ROCKCHIP_RK3036
 	  and video codec support. Peripherals include Gigabit Ethernet,
 	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK3128
+	bool "Support Rockchip RK3128"
+	select CPU_V7
+	help
+	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
+	  including NEON and GPU, Mali-400 graphics, several DDR3 options
+	  and video codec support. Peripherals include Gigabit Ethernet,
+	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
 config ROCKCHIP_RK3188
 	bool "Support Rockchip RK3188"
 	select CPU_V7
@@ -210,6 +219,7 @@ config GICV3
 	bool "ARM GICv3"
 
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
+source "arch/arm/mach-rockchip/rk3128/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
 source "arch/arm/mach-rockchip/rk3288/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index aac2d4418d..cc3a63e3ec 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
+obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
@@ -40,6 +41,7 @@ obj-y += rk_timer.o
 endif
 
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
+obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
 ifndef CONFIG_TPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
 endif
diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c
new file mode 100644
index 0000000000..70eda6fe2b
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128-board.c
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <ram.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/grf_rk3128.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define PMU_BASE	0x100a0000
+
+static void setup_boot_mode(void)
+{
+	struct rk3128_pmu *const pmu = (void *)PMU_BASE;
+	int boot_mode = readl(&pmu->sys_reg[0]);
+
+	debug("boot mode %x.\n", boot_mode);
+
+	/* Clear boot mode */
+	writel(BOOT_NORMAL, &pmu->sys_reg[0]);
+
+	switch (boot_mode) {
+	case BOOT_FASTBOOT:
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+		break;
+	case BOOT_UMS:
+		printf("enter UMS!\n");
+		env_set("preboot", "setenv preboot; ums mmc 0");
+		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
+	}
+}
+
+__weak int rk_board_late_init(void)
+{
+	return 0;
+}
+
+int board_late_init(void)
+{
+	setup_boot_mode();
+
+	return rk_board_late_init();
+}
+
+int board_init(void)
+{
+	rockchip_timer_init();
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = 0x8400000;
+	/* Reserve 0x200000 for OPTEE */
+	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+				+ gd->bd->bi_dram[0].size + 0x200000;
+	gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+				+ gd->ram_size - gd->bd->bi_dram[1].start;
+
+	return 0;
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3128_otg_data = {
+	.rx_fifo_sz	= 512,
+	.np_tx_fifo_sz	= 16,
+	.tx_fifo_sz	= 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	int node;
+	const char *mode;
+	bool matched = false;
+	const void *blob = gd->fdt_blob;
+
+	/* find the usb_otg node */
+	node = fdt_node_offset_by_compatible(blob, -1,
+					"rockchip,rk3288-usb");
+
+	while (node > 0) {
+		mode = fdt_getprop(blob, node, "dr_mode", NULL);
+		if (mode && strcmp(mode, "otg") == 0) {
+			matched = true;
+			break;
+		}
+
+		node = fdt_node_offset_by_compatible(blob, node,
+					"rockchip,rk3288-usb");
+	}
+	if (!matched) {
+		debug("Not found usb_otg device\n");
+		return -ENODEV;
+	}
+	rk3128_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+	return dwc2_udc_probe(&rk3128_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk3128_grf *grf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
+
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/arch/arm/mach-rockchip/rk3128/Makefile b/arch/arm/mach-rockchip/rk3128/Makefile
new file mode 100644
index 0000000000..0f63d921de
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += rk3128.o
+obj-y += syscon_rk3128.o
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
new file mode 100644
index 0000000000..9d6e3b1ee1
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+int arch_cpu_init(void)
+{
+	/* We do some SoC one time setting here. */
+
+	return 0;
+}
diff --git a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
new file mode 100644
index 0000000000..0b636390ac
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
@@ -0,0 +1,21 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/arch/clock.h>
+
+static const struct udevice_id rk3128_syscon_ids[] = {
+	{ .compatible = "rockchip,rk3128-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ }
+};
+
+U_BOOT_DRIVER(syscon_rk3128) = {
+	.name = "rk3128_syscon",
+	.id = UCLASS_SYSCON,
+	.of_match = rk3128_syscon_ids,
+};
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
new file mode 100644
index 0000000000..af901322ad
--- /dev/null
+++ b/include/configs/rk3128_common.h
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_RK3128_COMMON_H
+#define __CONFIG_RK3128_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_ENV_SIZE			0x2000
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_TIMER_RATE		(24 * 1000 * 1000)
+#define CONFIG_SYS_TIMER_BASE		0x200440a0 /* TIMER5 */
+#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMER_BASE + 8)
+
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_TEXT_BASE		0x60000000
+#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
+#define CONFIG_SYS_LOAD_ADDR		0x60800800
+
+
+#define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
+
+/* MMC/SD IP block */
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_SUPPORT_VFAT
+#define CONFIG_FS_EXT4
+
+/* RAW SD card / eMMC locations. */
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
+
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+#define CONFIG_SYS_SDRAM_BASE		0x60000000
+#define CONFIG_NR_DRAM_BANKS		2
+#define SDRAM_MAX_SIZE			0x80000000
+
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+
+#ifndef CONFIG_SPL_BUILD
+
+/* usb mass storage */
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+	"scriptaddr=0x60500000\0" \
+	"pxefile_addr_r=0x60600000\0" \
+	"fdt_addr_r=0x61f00000\0" \
+	"kernel_addr_r=0x62000000\0" \
+	"ramdisk_addr_r=0x64000000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	ENV_MEM_LAYOUT_SETTINGS \
+	"partitions=" PARTS_DEFAULT \
+	BOOTENV
+
+#endif
+
+#endif

commit 40d96d0bb5c795db7e35d5487e6fbd15965473c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Mar 10 10:17:56 2017 +0800

    rockchip: rk3128: add device tree file
    
    Add dts binding header for rk3128, files origin from kernel.
    
    Change-Id: I56042f44f131aecee9d91bf381c74be0da6d5064
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 762429c463..9fc8127317 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3036-sdk.dtb \
+	rk3128-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3288-evb.dtb \
 	rk3288-fennec.dtb \
diff --git a/arch/arm/dts/rk3128-evb.dts b/arch/arm/dts/rk3128-evb.dts
new file mode 100644
index 0000000000..5ef51c9b79
--- /dev/null
+++ b/arch/arm/dts/rk3128-evb.dts
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "rk3128.dtsi"
+
+/ {
+	model = "Rockchip RK3128 Evaluation board";
+	compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-drv {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_host";
+		gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+        hym8563: hym8563@51 {
+		compatible = "haoyu,hym8563";
+		reg = <0x51>;
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+	};
+};
+
+&usb_host {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&emmc {
+	status = "okay";
+};
+
+&pinctrl {
+	usb_otg {
+		otg_vbus_drv: host-vbus-drv {
+			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb_host {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
diff --git a/arch/arm/dts/rk3128.dtsi b/arch/arm/dts/rk3128.dtsi
new file mode 100644
index 0000000000..e7710b7e12
--- /dev/null
+++ b/arch/arm/dts/rk3128.dtsi
@@ -0,0 +1,756 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/clock/rk3128-cru.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "rockchip,rk3128";
+	rockchip,sram = <&sram>;
+	interrupt-parent = <&gic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		gpio0 = &gpio0;
+		gpio1 = &gpio1;
+		gpio2 = &gpio2;
+		gpio3 = &gpio3;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		spi0 = &spi0;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x60000000 0x40000000>;
+	};
+
+        arm-pmu {
+                compatible = "arm,cortex-a7-pmu";
+                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+                             <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+        };
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		enable-method = "rockchip,rk3128-smp";
+
+		cpu0:cpu@0x000 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x000>;
+			operating-points = <
+				/* KHz    uV */
+				 816000 1000000
+			>;
+			#cooling-cells = <2>; /* min followed by max */
+			clock-latency = <40000>;
+			clocks = <&cru ARMCLK>;
+		};
+
+		cpu1:cpu@0x001 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x001>;
+		};
+
+		cpu2:cpu@0x002 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x002>;
+		};
+
+		cpu3:cpu@0x003 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x003>;
+		};
+	};
+
+	cpu_axi_bus: cpu_axi_bus {
+		compatible = "rockchip,cpu_axi_bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		qos {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			crypto {
+				reg = <0x10128080 0x20>;
+			};
+
+			core {
+				reg = <0x1012a000 0x20>;
+			};
+
+			peri {
+				reg = <0x1012c000 0x20>;
+			};
+
+			gpu {
+				reg = <0x1012d000 0x20>;
+			};
+
+			vpu {
+				reg = <0x1012e000 0x20>;
+			};
+
+			rga {
+				reg = <0x1012f000 0x20>;
+			};
+			ebc {
+				reg = <0x1012f080 0x20>;
+			};
+
+			iep {
+				reg = <0x1012f100 0x20>;
+			};
+
+			lcdc {
+				reg = <0x1012f180 0x20>;
+				rockchip,priority = <3 3>;
+			};
+
+			vip {
+				reg = <0x1012f200 0x20>;
+				rockchip,priority = <3 3>;
+			};
+		};
+
+		msch {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			msch@10128000 {
+				reg = <0x10128000 0x20>;
+				rockchip,read-latency = <0x3f>;
+			};
+		};
+	};
+
+	psci {
+		compatible      = "arm,psci";
+		method          = "smc";
+		cpu_suspend     = <0x84000001>;
+		cpu_off         = <0x84000002>;
+		cpu_on          = <0x84000003>;
+		migrate         = <0x84000005>;
+	};
+
+	amba {
+		compatible = "arm,amba-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		interrupt-parent = <&gic>;
+		ranges;
+
+                pdma: pdma@20078000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x20078000 0x4000>;
+                        arm,pl330-broken-no-flushp;//2
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                        #dma-cells = <1>;
+                        clocks = <&cru ACLK_DMAC2>;
+                        clock-names = "apb_pclk";
+                };
+	};
+
+	xin24m: xin24m {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xin24m";
+		#clock-cells = <0>;
+	};
+
+	xin12m: xin12m {
+		compatible = "fixed-clock";
+		clocks = <&xin24m>;
+		clock-frequency = <12000000>;
+		clock-output-names = "xin12m";
+		#clock-cells = <0>;
+	};
+
+
+	timer {
+		compatible = "arm,armv7-timer";
+		arm,cpu-registers-not-fw-configured;
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		clock-frequency = <24000000>;
+	};
+
+	timer@20044000 {
+		compatible = "arm,armv7-timer";
+		reg = <0x20044000 0xb8>;
+		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,broadcast = <1>;
+	};
+
+	watchdog: wdt@2004c000 {
+		compatible = "rockchip,watch dog";
+		reg = <0x2004c000 0x100>;
+		clock-names = "pclk_wdt";
+		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+		rockchip,irq = <1>;
+		rockchip,timeout = <60>;
+		rockchip,atboot = <1>;
+		rockchip,debug = <0>;
+	};
+
+	reset: reset@20000110 {
+		compatible = "rockchip,reset";
+		reg = <0x20000110 0x24>;
+		#reset-cells = <1>;
+	};
+
+	nandc: nandc@10500000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x10500000 0x4000>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>,
+			 <&cru HCLK_NANDC>,
+			 <&cru SRST_NANDC>;
+		clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
+	};
+
+	dmc: dmc@20004000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3128-dmc", "syscon";
+		reg = <0x0 0x20004000 0x0 0x1000>;
+	};
+
+	cru: clock-controller@20000000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3128-cru";
+		reg = <0x20000000 0x1000>;
+		rockchip,grf = <&grf>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+		assigned-clocks = <&cru PLL_GPLL>;
+		assigned-clock-rates = <594000000>;
+	};
+
+	uart0: serial0@20060000 {
+		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
+		reg = <0x20060000 0x100>;
+		interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
+		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		dmas = <&pdma 2>, <&pdma 3>;
+		#dma-cells = <2>;
+	};
+
+	uart1: serial1@20064000 {
+		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
+		reg = <0x20064000 0x100>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
+		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1_xfer>;
+		dmas = <&pdma 4>, <&pdma 5>;
+		#dma-cells = <2>;
+	};
+
+	uart2: serial2@20068000 {
+		compatible = "rockchip,rk3128-uart", "snps,dw-apb-uart";
+		reg = <0x20068000 0x100>;
+		interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clock-frequency = <24000000>;
+		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
+		clock-names = "baudclk", "apb_pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2_xfer>;
+		dmas = <&pdma 6>, <&pdma 7>;
+		#dma-cells = <2>;
+	};
+
+	pwm0: pwm0@20050000 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050000 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	pwm1: pwm1@20050010 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050010 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	pwm2: pwm2@20050020 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050020 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm2_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	pwm3: pwm3@20050030 {
+		compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
+		reg = <0x20050030 0x10>;
+		#pwm-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru PCLK_PWM>;
+		clock-names = "pwm";
+	};
+
+	sram: sram@10080400 {
+		compatible = "rockchip,rk3128-smp-sram", "mmio-sram";
+		reg = <0x10080400 0x1C00>;
+		map-exec;
+		map-cacheable;
+	};
+
+	pmu: syscon@100a0000 {
+		compatible = "rockchip,rk3128-pmu", "syscon", "simple-mfd";
+		reg = <0x100a0000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+	gic: interrupt-controller@10139000 {
+		compatible = "arm,gic-400";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		reg = <0x10139000 0x1000>,
+		      <0x1013a000 0x1000>,
+		      <0x1013c000 0x2000>,
+		      <0x1013e000 0x2000>;
+		interrupts = <GIC_PPI 9 0xf04>;
+	};
+
+	usb_otg: usb@10180000 {
+		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2";
+		reg = <0x10180000 0x40000>;
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG0>;
+		clock-names = "otg";
+		dr_mode = "otg";
+		g-np-tx-fifo-size = <16>;
+		g-rx-fifo-size = <275>;
+		g-tx-fifo-size = <256 128 128 64 64 32>;
+		g-use-dma;
+	};
+
+	usb_host: usb@101c0000 {
+		compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+				"snps,dwc2";
+		reg = <0x101c0000 0x40000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG1>;
+		clock-names = "otg";
+		dr_mode = "host";
+	};
+
+	sdmmc: dwmmc@10214000 {
+		compatible = "rockchip,rk312x-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x10214000 0x4000>;
+		max-frequency = <150000000>;
+		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		fifo-depth = <0x100>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+		bus-width = <4>;
+		status = "disabled";
+	};
+
+	emmc: dwmmc@1021c000 {
+		compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x1021c000 0x4000>;
+		max-frequency = <150000000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		bus-width = <8>;
+		default-sample-phase = <158>;
+		num-slots = <1>;
+		fifo-depth = <0x100>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+		resets = <&cru SRST_EMMC>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
+	i2c0: i2c0@20070000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x20070000 0x1000>;
+		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+	};
+
+	i2c1: i2c1@20054000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x20054000 0x1000>;
+		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c1_xfer>;
+	};
+
+	i2c2: i2c2@20058000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x20058000 0x1000>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+	};
+
+	i2c3: i2c3@2005c000 {
+		compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
+		reg = <0x2005c000 0x1000>;
+		interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-names = "i2c";
+		clocks = <&cru PCLK_I2C3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c0_xfer>;
+	};
+
+	spi0: spi@20074000 {
+		compatible = "rockchip,rk3128-spi", "rockchip,rk3288-spi";
+		reg = <0x20074000 0x1000>;
+		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi0_txd_mux0 &spi0_rxd_mux0 &spi0_clk_mux0 &spi0_cs0_mux0 &spi0_cs1_mux0>;
+		rockchip,spi-src-clk = <0>;
+		num-cs = <2>;
+		clocks =<&cru SCLK_SPI>, <&cru PCLK_SPI>;
+		clock-names = "spi","pclk_spi0";
+		dmas = <&pdma 8>, <&pdma 9>;
+		#dma-cells = <2>;
+		dma-names = "tx", "rx";
+	};
+
+	grf: syscon@20008000 {
+		u-boot,dm-pre-reloc;
+		compatible = "rockchip,rk3128-grf", "syscon";
+		reg = <0x20008000 0x1000>;
+	};
+
+	pinctrl: pinctrl@20008000 {
+		compatible = "rockchip,rk3128-pinctrl";
+		reg = <0x20008000 0xA8>,
+		      <0x200080A8 0x4C>,
+		      <0x20008118 0x20>,
+		      <0x20008100 0x04>;
+		reg-names = "base", "mux", "pull", "drv";
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		gpio0: gpio0@2007c000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2007c000 0x100>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO0>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@20080000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20080000 0x100>;
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO1>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio2@20084000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20084000 0x100>;
+			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio2@20088000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x20088000 0x100>;
+			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru PCLK_GPIO3>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
+		pcfg_pull_down: pcfg-pull-down {
+			bias-pull-down;
+		};
+
+		pcfg_pull_none: pcfg-pull-none {
+			bias-disable;
+		};
+
+		emmc {
+			/*
+			 * We run eMMC at max speed; bump up drive strength.
+			 * We also have external pulls, so disable the internal ones.
+			 */
+
+			emmc_clk: emmc-clk {
+				rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_cmd: emmc-cmd {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_pwren: emmc-pwren {
+				rockchip,pins = <2 5 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			emmc_bus8: emmc-bus8 {
+				rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
+						<1 25 RK_FUNC_2 &pcfg_pull_none>,
+						<1 26 RK_FUNC_2 &pcfg_pull_none>,
+						<1 27 RK_FUNC_2 &pcfg_pull_none>,
+						<1 28 RK_FUNC_2 &pcfg_pull_none>,
+						<1 29 RK_FUNC_2 &pcfg_pull_none>,
+						<1 30 RK_FUNC_2 &pcfg_pull_none>,
+						<1 31 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		nandc{
+			nandc_ale:nandc-ale {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_cle:nandc-cle {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_wrn:nandc-wrn {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_rdn:nandc-rdn {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_rdy:nandc-rdy {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_cs0:nandc-cs0 {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			nandc_data: nandc-data {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+
+		uart0 {
+			uart0_xfer: uart0-xfer {
+				rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_none>,
+						<0 17 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_cts: uart0-cts {
+				rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_none>;
+			};
+
+			uart0_rts: uart0-rts {
+				rockchip,pins = <0 19 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		uart1 {
+			uart1_xfer: uart1-xfer {
+				rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_none>,
+						<2 23 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+                uart2 {
+                        uart2_xfer: uart2-xfer {
+                                rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,
+                                                <1 19 RK_FUNC_2 &pcfg_pull_none>;
+                        };
+                };
+
+		sdmmc {
+			sdmmc_clk: sdmmc-clk {
+				rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none>;
+			};
+
+			sdmmc_cmd: sdmmc-cmd {
+				rockchip,pins = <1 RK_PC1 1 &pcfg_pull_up>;
+			};
+
+			sdmmc_wp: sdmmc-wp {
+				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up>;
+			};
+
+			sdmmc_pwren: sdmmc-pwren {
+				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up>;
+			};
+
+			sdmmc_bus4: sdmmc-bus4 {
+				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up>,
+						<1 RK_PC3 1 &pcfg_pull_up>,
+						<1 RK_PC4 1 &pcfg_pull_up>,
+						<1 RK_PC5 1 &pcfg_pull_up>;
+			};
+		};
+
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins = <0 1 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm2 {
+			pwm2_pin: pwm2-pin {
+				rockchip,pins = <0 1 2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins = <0 27 1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c0 {
+			i2c0_xfer: i2c0-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c1 {
+			i2c1_xfer: i2c1-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c2 {
+			i2c2_xfer: i2c2-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		i2c3 {
+			i2c3_xfer: i2c3-xfer {
+				rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
+						<0 3 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
+		spi0 {
+			spi0_txd_mux0:spi0-txd-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_rxd_mux0:spi0-rxd-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_clk_mux0:spi0-clk-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_cs0_mux0:spi0-cs0-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+
+			spi0_cs1_mux0:spi0-cs1-mux0 {
+				rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+	};
+};
diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h
new file mode 100644
index 0000000000..36c8006bd2
--- /dev/null
+++ b/include/dt-bindings/clock/rk3128-cru.h
@@ -0,0 +1,187 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3128_H
+
+/* core clocks */
+#define PLL_APLL		1
+#define PLL_DPLL		2
+#define PLL_GPLL		3
+#define ARMCLK			4
+
+/* sclk gates (special clocks) */
+#define SCLK_GPU		64
+#define SCLK_SPI		65
+#define SCLK_SDMMC		68
+#define SCLK_SDIO		69
+#define SCLK_EMMC		71
+#define SCLK_NANDC		76
+#define SCLK_UART0		77
+#define SCLK_UART1		78
+#define SCLK_UART2		79
+#define SCLK_I2S		82
+#define SCLK_SPDIF		83
+#define SCLK_TIMER0		85
+#define SCLK_TIMER1		86
+#define SCLK_TIMER2		87
+#define SCLK_TIMER3		88
+#define SCLK_OTGPHY0		93
+#define SCLK_LCDC		100
+#define SCLK_HDMI		109
+#define SCLK_HEVC		111
+#define SCLK_I2S_OUT		113
+#define SCLK_SDMMC_DRV		114
+#define SCLK_SDIO_DRV		115
+#define SCLK_EMMC_DRV		117
+#define SCLK_SDMMC_SAMPLE	118
+#define SCLK_SDIO_SAMPLE	119
+#define SCLK_EMMC_SAMPLE	121
+#define SCLK_PVTM_CORE          123
+#define SCLK_PVTM_GPU           124
+#define SCLK_PVTM_VIDEO         125
+#define SCLK_MAC		151
+#define SCLK_MACREF		152
+#define SCLK_SFC		160
+
+#define DCLK_LCDC		190
+
+/* aclk gates */
+#define ACLK_DMAC2		194
+#define ACLK_LCDC		197
+#define ACLK_VIO		203
+#define ACLK_VCODEC		208
+#define ACLK_CPU		209
+#define ACLK_PERI		210
+
+/* pclk gates */
+#define PCLK_GPIO0		320
+#define PCLK_GPIO1		321
+#define PCLK_GPIO2		322
+#define PCLK_GPIO3		323
+#define PCLK_GRF		329
+#define PCLK_I2C0		332
+#define PCLK_I2C1		333
+#define PCLK_I2C2		334
+#define PCLK_I2C3		335
+#define PCLK_SPI		338
+#define PCLK_UART0		341
+#define PCLK_UART1		342
+#define PCLK_UART2		343
+#define PCLK_PWM		350
+#define PCLK_TIMER		353
+#define PCLK_HDMI		360
+#define PCLK_CPU		362
+#define PCLK_PERI		363
+#define PCLK_DDRUPCTL		364
+#define PCLK_WDT		368
+
+/* hclk gates */
+#define HCLK_OTG0		449
+#define HCLK_OTG1		450
+#define HCLK_NANDC		453
+#define HCLK_SDMMC		456
+#define HCLK_SDIO		457
+#define HCLK_EMMC		459
+#define HCLK_I2S		462
+#define HCLK_LCDC		465
+#define HCLK_ROM		467
+#define HCLK_VIO_BUS		472
+#define HCLK_VCODEC		476
+#define HCLK_CPU		477
+#define HCLK_PERI		478
+
+#define CLK_NR_CLKS		(HCLK_PERI + 1)
+
+/* soft-reset indices */
+#define SRST_CORE0		0
+#define SRST_CORE1		1
+#define SRST_CORE0_DBG		4
+#define SRST_CORE1_DBG		5
+#define SRST_CORE0_POR		8
+#define SRST_CORE1_POR		9
+#define SRST_L2C		12
+#define SRST_TOPDBG		13
+#define SRST_STRC_SYS_A		14
+#define SRST_PD_CORE_NIU	15
+
+#define SRST_TIMER2		16
+#define SRST_CPUSYS_H		17
+#define SRST_AHB2APB_H		19
+#define SRST_TIMER3		20
+#define SRST_INTMEM		21
+#define SRST_ROM		22
+#define SRST_PERI_NIU		23
+#define SRST_I2S		24
+#define SRST_DDR_PLL		25
+#define SRST_GPU_DLL		26
+#define SRST_TIMER0		27
+#define SRST_TIMER1		28
+#define SRST_CORE_DLL		29
+#define SRST_EFUSE_P		30
+#define SRST_ACODEC_P		31
+
+#define SRST_GPIO0		32
+#define SRST_GPIO1		33
+#define SRST_GPIO2		34
+#define SRST_UART0		39
+#define SRST_UART1		40
+#define SRST_UART2		41
+#define SRST_I2C0		43
+#define SRST_I2C1		44
+#define SRST_I2C2		45
+#define SRST_SFC		47
+
+#define SRST_PWM0		48
+#define SRST_DAP		51
+#define SRST_DAP_SYS		52
+#define SRST_GRF		55
+#define SRST_PERIPHSYS_A	57
+#define SRST_PERIPHSYS_H	58
+#define SRST_PERIPHSYS_P	59
+#define SRST_CPU_PERI		61
+#define SRST_EMEM_PERI		62
+#define SRST_USB_PERI		63
+
+#define SRST_DMA2		64
+#define SRST_MAC		66
+#define SRST_NANDC		68
+#define SRST_USBOTG0		69
+#define SRST_OTGC0		71
+#define SRST_USBOTG1		72
+#define SRST_OTGC1		74
+#define SRST_DDRMSCH		79
+
+#define SRST_MMC0		81
+#define SRST_SDIO		82
+#define SRST_EMMC		83
+#define SRST_SPI0		84
+#define SRST_WDT		86
+#define SRST_DDRPHY		88
+#define SRST_DDRPHY_P		89
+#define SRST_DDRCTRL		90
+#define SRST_DDRCTRL_P		91
+
+#define SRST_HDMI_P		96
+#define SRST_VIO_BUS_H		99
+#define SRST_UTMI0		103
+#define SRST_UTMI1		104
+#define SRST_USBPOR		105
+
+#define SRST_VCODEC_A		112
+#define SRST_VCODEC_H		113
+#define SRST_VIO1_A		114
+#define SRST_HEVC		115
+#define SRST_VCODEC_NIU_A	116
+#define SRST_LCDC1_A		117
+#define SRST_LCDC1_H		118
+#define SRST_LCDC1_D		119
+#define SRST_GPU		120
+#define SRST_GPU_NIU_A		122
+
+#define SRST_DBG_P		131
+
+#endif

commit 7336d5ed65203829a2da3e1e0b94f245b5384d36
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 17:56:57 2017 +0800

    rockchip: mkimage: add support for rk3128 soc
    
    Add support for rk3128 package header in mkimage tool.
    
    Change-Id: Ida30dda9c3bceccc81dad0780f2a46d97e13c38c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 04e8272fd5..1a24e16589 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -73,6 +73,7 @@ struct spl_info {
 
 static struct spl_info spl_infos[] = {
 	{ "rk3036", "RK30", 0x1000, false, false },
+	{ "rk3128", "RK31", 0x1800, false, false },
 	{ "rk3188", "RK31", 0x8000 - 0x800, true, false },
 	{ "rk322x", "RK32", 0x8000 - 0x1000, false, false },
 	{ "rk3288", "RK32", 0x8000, false, false },

commit 6c9bca3c0bb6c6793cb095ea18cfba3b815ca5c2
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 16:58:51 2017 +0800

    rockchip: clk: fix typo in rk322x clock driver
    
    Fix typo RK322X/RK3036 in rk322x clock driver.
    
    Change-Id: If06fc94761519c215c6a3ddc3de5f54c8b949c8f
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 431972ef18..6bbfde47f8 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -391,7 +391,7 @@ static int rk322x_clk_bind(struct udevice *dev)
 	/* The reset driver does not have a device node, so bind it here */
 	ret = device_bind_driver(gd->dm_root, "rk322x_sysreset", "reset", &dev);
 	if (ret)
-		debug("Warning: No RK3036 reset driver: ret=%d\n", ret);
+		debug("Warning: No RK322x reset driver: ret=%d\n", ret);
 
 	return 0;
 }

commit f63defb363a973673bb3bd152f64271a9d9ba726
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 27 17:01:11 2017 +0800

    rockchip: rk3036: fix grf macro define
    
    Some of macros definition are not correct, fix them according to TRM.
    
    Change-Id: If3b7ec621425f1eb1c432b39bf826c896196130b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
index 7625f249bd..d995b7db14 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
@@ -209,10 +209,10 @@ enum {
 	GPIO1A3_I2S_LRCKTX,
 
 	GPIO1A2_SHIFT		= 4,
-	GPIO1A2_MASK		= 6 << GPIO1A2_SHIFT,
+	GPIO1A2_MASK		= 3 << GPIO1A2_SHIFT,
 	GPIO1A2_GPIO		= 0,
 	GPIO1A2_I2S_LRCKRX,
-	GPIO1A2_I2S_PWM1_0,
+	GPIO1A2_PWM1_0,
 
 	GPIO1A1_SHIFT		= 2,
 	GPIO1A1_MASK		= 1 << GPIO1A1_SHIFT,

commit 1e2dd4672e4eeb4379c367a5299c98a276a04ed5
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Mon Sep 25 16:31:56 2017 +0800

    rockchip: rk3188: ram: add support for 16bit row address
    
    RK3188 using the same ddr_conf for both 15 bit and 16 bit row address.
    
    Change-Id: If78e4922d85250f6962dcb17e17cd3ac5e480673
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index 9d8b225dfa..365d00ef54 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -682,11 +682,18 @@ out:
 
 static int sdram_get_niu_config(struct rk3188_sdram_params *sdram_params)
 {
-	int i, tmp, size, ret = 0;
+	int i, tmp, size, row, ret = 0;
 
+	row = sdram_params->ch[0].cs0_row;
+	/*
+	 * RK3188 share the rank and row bit15, we use same ddr config for 15bit
+	 * and 16bit row
+	 */
+	if (row == 16)
+		row = 15;
 	tmp = sdram_params->ch[0].col - 9;
 	tmp -= (sdram_params->ch[0].bw == 2) ? 0 : 1;
-	tmp |= ((sdram_params->ch[0].cs0_row - 13) << 4);
+	tmp |= ((row - 13) << 4);
 	size = sizeof(ddrconf_table)/sizeof(ddrconf_table[0]);
 	for (i = 0; i < size; i++)
 		if (tmp == ddrconf_table[i])

commit 010527dddb7e56aa77926f6e041142cd87b8b8de
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 14 11:29:55 2017 +0800

    evb-rk3229: do not modify the boot cmd
    
    Change-Id: I50afc490de2faf58c92716cff5853245f9dcc0e2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h
index 8906c8f0b1..b0efb47802 100644
--- a/include/configs/evb_rk3229.h
+++ b/include/configs/evb_rk3229.h
@@ -19,34 +19,10 @@
 
 #ifndef CONFIG_SPL_BUILD
 /* Enable gpt partition table */
-#undef PARTS_DEFAULT
-#define PARTS_DEFAULT \
-	"uuid_disk=${uuid_gpt_disk};" \
-	"name=loader_a,start=4M,size=4M,uuid=${uuid_gpt_loader};" \
-	"name=loader_b,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_a,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=trust_b,size=4M,uuid=${uuid_gpt_reserved};" \
-	"name=misc,size=4M,uuid=${uuid_gpt_misc};" \
-	"name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
-	"name=boot_a,size=32M,uuid=${uuid_gpt_boot_a};" \
-	"name=boot_b,size=32M,uuid=${uuid_gpt_boot_b};" \
-	"name=system_a,size=818M,uuid=${uuid_gpt_system_a};" \
-	"name=system_b,size=818M,uuid=${uuid_gpt_system_b};" \
-	"name=vendor_a,size=50M,uuid=${uuid_gpt_vendor_a};" \
-	"name=vendor_b,size=50M,uuid=${uuid_gpt_vendor_b};" \
-	"name=cache,size=100M,uuid=${uuid_gpt_cache};" \
-	"name=persist,size=4M,uuid=${uuid_gpt_persist};" \
-	"name=userdata,size=-,uuid=${uuid_gpt_userdata};\0" \
-
 #define CONFIG_PREBOOT
 
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
-#undef CONFIG_BOOTCOMMAND
-#define CONFIG_BOOTCOMMAND \
-	"mmc read 0x61000000 0x8000 0x5000;" \
-	"bootm 0x61000000" \
-
 /* Enable atags */
 #define CONFIG_SYS_BOOTPARAMS_LEN	(64*1024)
 #define CONFIG_INITRD_TAG

commit b398a9a7fa47edd24de23d1fa8f06a44b942891d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 18 19:41:54 2017 +0800

    dm: input: add implementation of driver model key uclass
    
    Change-Id: I379b694dfaee14ed23cc7abfa05aff77933bb725
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index b3873c140d..1ea90bf9d9 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -7,6 +7,12 @@ config DM_KEYBOARD
 	  includes methods to start/stop the device, check for available
 	  input and update LEDs if the keyboard has them.
 
+config DM_KEY
+	bool "Enable driver model key support"
+	depends on DM
+	help
+	  This adds a simple uclass for key.
+
 config CROS_EC_KEYB
 	bool "Enable Chrome OS EC keyboard support"
 	help
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 9109ac6dba..dfe46a037d 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -6,6 +6,7 @@
 #
 
 obj-$(CONFIG_DM_KEYBOARD) += keyboard-uclass.o
+obj-$(CONFIG_DM_KEY) += key-uclass.o
 
 obj-$(CONFIG_I8042_KEYB) += i8042.o
 obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
diff --git a/drivers/input/key-uclass.c b/drivers/input/key-uclass.c
new file mode 100644
index 0000000000..0d38fbda81
--- /dev/null
+++ b/drivers/input/key-uclass.c
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <key.h>
+
+int key_read(struct udevice *dev)
+{
+	const struct dm_key_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->read)
+		return -ENOSYS;
+
+	return ops->read(dev);
+}
+
+UCLASS_DRIVER(key) = {
+	.id		= UCLASS_KEY,
+	.name		= "key",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index d3d11c86de..e3b9e5b0c9 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -90,6 +90,7 @@ enum uclass_id {
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
 	UCLASS_WDT,		/* Watchdot Timer driver */
 	UCLASS_FG,
+	UCLASS_KEY,
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/key.h b/include/key.h
new file mode 100644
index 0000000000..56ae16681f
--- /dev/null
+++ b/include/key.h
@@ -0,0 +1,22 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _KEY_H_
+#define _KEY_H_
+
+enum key_state {
+	KEY_PRESS_NONE,
+	KEY_PRESS_UP,
+	KEY_PRESS_DOWN,
+};
+
+struct dm_key_ops {
+	int (*read)(struct udevice *dev);
+};
+
+int key_read(struct udevice *dev);
+
+#endif

commit a7ca45e88e535311cd6ea86349f00ec90f5a4b61
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 19 17:54:40 2017 +0800

    dm: power: add implementation of driver model fuel gauge uclass
    
    Change-Id: I48fa0340d49cc1bc39c91223ac04e98790e0bee2
    Signed-off-by: shengfei Xu <xsf@rock-chips.com>

diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index d8c107e206..0f4ca0ea40 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -2,6 +2,8 @@ menu "Power"
 
 source "drivers/power/domain/Kconfig"
 
+source "drivers/power/fuel_gauge/Kconfig"
+
 source "drivers/power/pmic/Kconfig"
 
 source "drivers/power/regulator/Kconfig"
diff --git a/drivers/power/fuel_gauge/Kconfig b/drivers/power/fuel_gauge/Kconfig
new file mode 100644
index 0000000000..8b08a90f99
--- /dev/null
+++ b/drivers/power/fuel_gauge/Kconfig
@@ -0,0 +1,6 @@
+config DM_FUEL_GAUGE
+	bool "Enable driver model fuel gauge support"
+	depends on DM
+	help
+	  This adds a simple uclass for fuel gauge.
+
diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile
index 3b349f939a..75d762e01f 100644
--- a/drivers/power/fuel_gauge/Makefile
+++ b/drivers/power/fuel_gauge/Makefile
@@ -5,4 +5,6 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
+obj-$(CONFIG_DM_FUEL_GAUGE) += fuel_gauge_uclass.o
+
 obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
diff --git a/drivers/power/fuel_gauge/fuel_gauge_uclass.c b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
new file mode 100644
index 0000000000..a1c4f65854
--- /dev/null
+++ b/drivers/power/fuel_gauge/fuel_gauge_uclass.c
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <errno.h>
+#include <dm.h>
+#include <power/fuel_gauge.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int fuel_gauge_get_voltage(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_voltage)
+		return -ENOSYS;
+
+	return ops->get_voltage(dev);
+}
+
+int fuel_gauge_get_soc(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_soc)
+		return -ENOSYS;
+
+	return ops->get_soc(dev);
+}
+
+bool fuel_gauge_get_chrg_online(struct udevice *dev)
+{
+	const struct dm_fuel_gauge_ops *ops = dev_get_driver_ops(dev);
+
+	if (!ops || !ops->get_chrg_online)
+		return -ENOSYS;
+
+	return ops->get_chrg_online(dev);
+}
+
+UCLASS_DRIVER(fuelxguage) = {
+	.id		= UCLASS_FG,
+	.name		= "fuel_gauge",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 3fc20834ae..d3d11c86de 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -89,6 +89,7 @@ enum uclass_id {
 	UCLASS_VIDEO_BRIDGE,	/* Video bridge, e.g. DisplayPort to LVDS */
 	UCLASS_VIDEO_CONSOLE,	/* Text console driver for video device */
 	UCLASS_WDT,		/* Watchdot Timer driver */
+	UCLASS_FG,
 
 	UCLASS_COUNT,
 	UCLASS_INVALID = -1,
diff --git a/include/power/fuel_gauge.h b/include/power/fuel_gauge.h
new file mode 100644
index 0000000000..14714c343d
--- /dev/null
+++ b/include/power/fuel_gauge.h
@@ -0,0 +1,20 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _FUEL_GAUGE_H_
+#define _FUEL_GAUGE_H_
+
+struct dm_fuel_gauge_ops {
+	int (*get_soc)(struct udevice *dev);
+	int (*get_voltage)(struct udevice *dev);
+	bool (*get_chrg_online)(struct udevice *dev);
+};
+
+int fuel_gauge_get_soc(struct udevice *dev);
+int fuel_gauge_get_voltage(struct udevice *dev);
+bool fuel_gauge_get_chrg_online(struct udevice *dev);
+
+#endif

commit 9e741d50b7d57696ee88200832d3d6759d25321f
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Wed Sep 20 10:35:48 2017 +0800

    rockchip: dts: rk3328: add usb2 phy nodes
    
    RK3328 has one USB 2.0 PHY consist of two usb ports,
    one port is used for DWC2 controller, the other port
    is shared between EHCI and OHCI controllers.
    
    Change-Id: Ie016fd4a7990f54b25de4523b2b762f0b399a729
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index f71690f643..36c0c0097d 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -70,6 +70,18 @@
 	status = "okay";
 };
 
+&u2phy {
+        status = "okay";
+};
+
+&u2phy_otg {
+        status = "okay";
+};
+
+&u2phy_host {
+        status = "okay";
+};
+
 &usb_host0_ehci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 0bab1e33cc..51da1e9ab7 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -422,6 +422,44 @@
 			<32768>, <32768>;
 	};
 
+	usb2phy_grf: syscon-usb@ff450000 {
+		compatible = "rockchip,rk3328-usb2phy-grf",
+			     "simple-mfd", "syscon";
+		reg = <0x0 0xff450000 0x0 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,rk3328-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&xin24m>;
+			clock-names = "phyclk";
+			clock-output-names = "usb480m_phy";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			#phy-cells = <1>;
+			status = "disabled";
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
+	};
+
 	sdmmc: rksdmmc@ff500000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff500000 0x0 0x4000>;
@@ -460,6 +498,8 @@
 		compatible = "generic-ehci";
 		reg = <0x0 0xff5c0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -467,6 +507,8 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xff5d0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -477,6 +519,8 @@
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
+		phys = <&u2phy 0>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 

commit b125c7115c8de4b77304ae7027b1d2d7f7cf7e5b
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Mon Sep 25 22:11:43 2017 +0800

    configs: rv1108: enable usb2 phy driver
    
    Add defconfig to enable generic PHY framework and USB 2.0 PHY
    driver which used for DWC2, EHCI and OHCI usb controllers.
    
    Change-Id: Ib238269faa5046b8853590d6de3ade3ca38e6882
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 7036f433ee..3df3d97664 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -23,6 +23,8 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y

commit 2e595678abed3336e738dd120daffd2b11bf04f9
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Wed Sep 20 10:26:06 2017 +0800

    configs: rk3328: enable usb2 phy driver
    
    Add defconfig to enable generic PHY framework and USB 2.0 PHY
    driver which used for DWC2, EHCI and OHCI usb controllers.
    
    Change-Id: I93fa29843f6f6d4d43e3e4939225bc2f79ad3131
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 6d0f3af7a3..ddcc868d74 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -25,6 +25,8 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3328=y
 CONFIG_DM_PMIC=y

commit f0c40dcdc2ca7d6522efeee4bd2e42dc8e3e8ab2
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Wed Sep 20 10:06:30 2017 +0800

    phy: add a new driver for rockchip usb2 phy
    
    This phy driver supports for rockchip SoCs with USB 2.0
    PHY consist of Innosilicon PHY. It can be used for the
    PHY with two usb ports, typically, one port is used for
    DWC2, the other port is shared between the EHCI and OHCI
    controllers.
    
    Change-Id: I00634c5fcfd93ed55b8332e27d915ca587bd2783
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 98f2a1b047..a5717a1e2a 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -59,6 +59,12 @@ config SPL_NOP_PHY
 	  This is useful when a driver uses the PHY framework but no real PHY
 	  hardware exists.
 
+config PHY_ROCKCHIP_INNO_USB2
+	bool "Support Rockchip INNO USB2PHY"
+	depends on PHY && ARCH_ROCKCHIP
+	help
+	  Support for Rockchip USB 2.0 PHY with Innosilicon IP block.
+
 config PIPE3_PHY
 	bool "Support omap's PIPE3 PHY"
 	depends on PHY && ARCH_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index ab56c46bb4..2b8f47eee4 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -7,5 +7,6 @@
 
 obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o
 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o
+obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o
 obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c
new file mode 100644
index 0000000000..1f56976980
--- /dev/null
+++ b/drivers/phy/phy-rockchip-inno-usb2.c
@@ -0,0 +1,680 @@
+/*
+ * Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <common.h>
+#include <dm.h>
+#include <generic-phy.h>
+#include <syscon.h>
+
+#define U2PHY_BIT_WRITEABLE_SHIFT	16
+#define CHG_DCD_MAX_RETRIES		6
+#define CHG_PRI_MAX_RETRIES		2
+#define CHG_DCD_POLL_TIME		100	/* millisecond */
+#define CHG_PRIMARY_DET_TIME		40	/* millisecond */
+#define CHG_SECONDARY_DET_TIME		40	/* millisecond */
+
+struct rockchip_usb2phy;
+
+enum power_supply_type {
+	POWER_SUPPLY_TYPE_UNKNOWN = 0,
+	POWER_SUPPLY_TYPE_USB,		/* Standard Downstream Port */
+	POWER_SUPPLY_TYPE_USB_DCP,	/* Dedicated Charging Port */
+	POWER_SUPPLY_TYPE_USB_CDP,	/* Charging Downstream Port */
+	POWER_SUPPLY_TYPE_USB_FLOATING,	/* DCP without shorting D+/D- */
+};
+
+enum rockchip_usb2phy_port_id {
+	USB2PHY_PORT_OTG,
+	USB2PHY_PORT_HOST,
+	USB2PHY_NUM_PORTS,
+};
+
+struct usb2phy_reg {
+	u32	offset;
+	u32	bitend;
+	u32	bitstart;
+	u32	disable;
+	u32	enable;
+};
+
+/**
+ * struct rockchip_chg_det_reg: usb charger detect registers
+ * @cp_det: charging port detected successfully.
+ * @dcp_det: dedicated charging port detected successfully.
+ * @dp_det: assert data pin connect successfully.
+ * @idm_sink_en: open dm sink curren.
+ * @idp_sink_en: open dp sink current.
+ * @idp_src_en: open dm source current.
+ * @rdm_pdwn_en: open dm pull down resistor.
+ * @vdm_src_en: open dm voltage source.
+ * @vdp_src_en: open dp voltage source.
+ * @opmode: utmi operational mode.
+ */
+struct rockchip_chg_det_reg {
+	struct usb2phy_reg	cp_det;
+	struct usb2phy_reg	dcp_det;
+	struct usb2phy_reg	dp_det;
+	struct usb2phy_reg	idm_sink_en;
+	struct usb2phy_reg	idp_sink_en;
+	struct usb2phy_reg	idp_src_en;
+	struct usb2phy_reg	rdm_pdwn_en;
+	struct usb2phy_reg	vdm_src_en;
+	struct usb2phy_reg	vdp_src_en;
+	struct usb2phy_reg	opmode;
+};
+
+/**
+ * struct rockchip_usb2phy_port_cfg: usb-phy port configuration.
+ * @phy_sus: phy suspend register.
+ * @bvalid_det_en: vbus valid rise detection enable register.
+ * @bvalid_det_st: vbus valid rise detection status register.
+ * @bvalid_det_clr: vbus valid rise detection clear register.
+ * @ls_det_en: linestate detection enable register.
+ * @ls_det_st: linestate detection state register.
+ * @ls_det_clr: linestate detection clear register.
+ * @iddig_output: iddig output from grf.
+ * @iddig_en: utmi iddig select between grf and phy,
+ *	      0: from phy; 1: from grf
+ * @idfall_det_en: id fall detection enable register.
+ * @idfall_det_st: id fall detection state register.
+ * @idfall_det_clr: id fall detection clear register.
+ * @idrise_det_en: id rise detection enable register.
+ * @idrise_det_st: id rise detection state register.
+ * @idrise_det_clr: id rise detection clear register.
+ * @utmi_avalid: utmi vbus avalid status register.
+ * @utmi_bvalid: utmi vbus bvalid status register.
+ * @utmi_iddig: otg port id pin status register.
+ * @utmi_ls: utmi linestate state register.
+ * @utmi_hstdet: utmi host disconnect register.
+ * @vbus_det_en: vbus detect function power down register.
+ */
+struct rockchip_usb2phy_port_cfg {
+	struct usb2phy_reg	phy_sus;
+	struct usb2phy_reg	bvalid_det_en;
+	struct usb2phy_reg	bvalid_det_st;
+	struct usb2phy_reg	bvalid_det_clr;
+	struct usb2phy_reg	ls_det_en;
+	struct usb2phy_reg	ls_det_st;
+	struct usb2phy_reg	ls_det_clr;
+	struct usb2phy_reg	iddig_output;
+	struct usb2phy_reg	iddig_en;
+	struct usb2phy_reg	idfall_det_en;
+	struct usb2phy_reg	idfall_det_st;
+	struct usb2phy_reg	idfall_det_clr;
+	struct usb2phy_reg	idrise_det_en;
+	struct usb2phy_reg	idrise_det_st;
+	struct usb2phy_reg	idrise_det_clr;
+	struct usb2phy_reg	utmi_avalid;
+	struct usb2phy_reg	utmi_bvalid;
+	struct usb2phy_reg	utmi_iddig;
+	struct usb2phy_reg	utmi_ls;
+	struct usb2phy_reg	utmi_hstdet;
+	struct usb2phy_reg	vbus_det_en;
+};
+
+/**
+ * struct rockchip_usb2phy_cfg: usb-phy configuration.
+ * @reg: the address offset of grf for usb-phy config.
+ * @num_ports: specify how many ports that the phy has.
+ * @phy_tuning: phy default parameters tunning.
+ * @clkout_ctl: keep on/turn off output clk of phy.
+ * @chg_det: charger detection registers.
+ */
+struct rockchip_usb2phy_cfg {
+	u32	reg;
+	u32	num_ports;
+	int (*phy_tuning)(struct rockchip_usb2phy *);
+	struct usb2phy_reg	clkout_ctl;
+	const struct rockchip_usb2phy_port_cfg	port_cfgs[USB2PHY_NUM_PORTS];
+	const struct rockchip_chg_det_reg	chg_det;
+};
+
+/**
+ * @dcd_retries: The retry count used to track Data contact
+ *		 detection process.
+ * @primary_retries: The retry count used to do usb bc detection
+ *		     primary stage.
+ * @grf: General Register Files register base.
+ * @usbgrf_base : USB General Register Files register base.
+ * @phy_cfg: phy register configuration, assigned by driver data.
+ */
+struct rockchip_usb2phy {
+	u8		dcd_retries;
+	u8		primary_retries;
+	void __iomem	*grf_base;
+	void __iomem	*usbgrf_base;
+	const struct rockchip_usb2phy_cfg	*phy_cfg;
+};
+
+static inline void __iomem *get_reg_base(struct rockchip_usb2phy *rphy)
+{
+	return !rphy->usbgrf_base ? rphy->grf_base : rphy->usbgrf_base;
+}
+
+static inline int property_enable(void __iomem *base,
+				  const struct usb2phy_reg *reg, bool en)
+{
+	u32 val, mask, tmp;
+
+	tmp = en ? reg->enable : reg->disable;
+	mask = GENMASK(reg->bitend, reg->bitstart);
+	val = (tmp << reg->bitstart) | (mask << U2PHY_BIT_WRITEABLE_SHIFT);
+
+	return writel(val, base + reg->offset);
+}
+
+static inline bool property_enabled(void __iomem *base,
+				    const struct usb2phy_reg *reg)
+{
+	u32 tmp, orig;
+	u32 mask = GENMASK(reg->bitend, reg->bitstart);
+
+	orig = readl(base + reg->offset);
+
+	tmp = (orig & mask) >> reg->bitstart;
+
+	return tmp == reg->enable;
+}
+
+static const char *chg_to_string(enum power_supply_type chg_type)
+{
+	switch (chg_type) {
+	case POWER_SUPPLY_TYPE_USB:
+		return "USB_SDP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_DCP:
+		return "USB_DCP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_CDP:
+		return "USB_CDP_CHARGER";
+	case POWER_SUPPLY_TYPE_USB_FLOATING:
+		return "USB_FLOATING_CHARGER";
+	default:
+		return "INVALID_CHARGER";
+	}
+}
+
+static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
+				    bool en)
+{
+	void __iomem *base = get_reg_base(rphy);
+
+	property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
+	property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);
+}
+
+static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
+					    bool en)
+{
+	void __iomem *base = get_reg_base(rphy);
+
+	property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);
+	property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);
+}
+
+static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
+					      bool en)
+{
+	void __iomem *base = get_reg_base(rphy);
+
+	property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);
+	property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);
+}
+
+static bool rockchip_chg_primary_det_retry(struct rockchip_usb2phy *rphy)
+{
+	bool vout = false;
+
+	while (rphy->primary_retries--) {
+		/* voltage source on DP, probe on DM */
+		rockchip_chg_enable_primary_det(rphy, true);
+		mdelay(CHG_PRIMARY_DET_TIME);
+		vout = property_enabled(rphy->grf_base,
+					&rphy->phy_cfg->chg_det.cp_det);
+		if (vout)
+			break;
+	}
+
+	return vout;
+}
+
+int rockchip_chg_get_type(void)
+{
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	enum power_supply_type chg_type;
+	struct rockchip_usb2phy rphy;
+	struct udevice *dev;
+	ofnode u2phy_node, grf_node;
+	fdt_size_t size;
+	u32 reg, index;
+	bool is_dcd, vout;
+	int ret;
+
+	u2phy_node = ofnode_null();
+	grf_node = ofnode_null();
+
+	u2phy_node = ofnode_path("/usb2-phy");
+
+	if (!ofnode_valid(u2phy_node)) {
+		grf_node = ofnode_path("/syscon-usb");
+		if (ofnode_valid(grf_node))
+			u2phy_node = ofnode_find_subnode(grf_node,
+							 "usb2-phy");
+	}
+
+	if (!ofnode_valid(u2phy_node)) {
+		printf("%s: missing u2phy node\n", __func__);
+		return -EINVAL;
+	}
+
+	if (ofnode_valid(grf_node)) {
+		rphy.grf_base =
+			(void __iomem *)ofnode_get_addr_size(grf_node,
+							     "reg", &size);
+	} else {
+		if (ofnode_read_bool(u2phy_node, "rockchip,grf"))
+			rphy.grf_base =
+				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	}
+
+	if (rphy.grf_base <= 0) {
+		dev_err(dev, "get syscon grf failed\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(u2phy_node, "reg", &reg)) {
+		printf("%s: could not read reg\n", __func__);
+		return -EINVAL;
+	}
+
+	if (ofnode_read_bool(u2phy_node, "rockchip,usbgrf")) {
+		rphy.usbgrf_base =
+			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
+		if (rphy.usbgrf_base <= 0) {
+			dev_err(dev, "get syscon usbgrf failed\n");
+			return -EINVAL;
+		}
+	} else {
+		rphy.usbgrf_base = NULL;
+	}
+
+	ret = uclass_get_device_by_ofnode(UCLASS_PHY, u2phy_node, &dev);
+	if (ret) {
+		printf("%s: uclass_get_device_by_ofnode failed: %d\n",
+		       __func__, ret);
+		return ret;
+	}
+
+	phy_cfgs =
+		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
+	if (!phy_cfgs) {
+		printf("%s: unable to get phy_cfgs\n", __func__);
+		return -EINVAL;
+	}
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			rphy.phy_cfg = &phy_cfgs[index];
+			break;
+		}
+		++index;
+	}
+
+	if (!rphy.phy_cfg) {
+		printf("%s: no phy-config can be matched\n", __func__);
+		return -EINVAL;
+	}
+
+	rphy.dcd_retries = CHG_DCD_MAX_RETRIES;
+	rphy.primary_retries = CHG_PRI_MAX_RETRIES;
+
+	/* stage 1, start DCD processing stage */
+	rockchip_chg_enable_dcd(&rphy, true);
+
+	while (rphy.dcd_retries--) {
+		mdelay(CHG_DCD_POLL_TIME);
+
+		/* get data contact detection status */
+		is_dcd = property_enabled(rphy.grf_base,
+					  &rphy.phy_cfg->chg_det.dp_det);
+
+		if (is_dcd || !rphy.dcd_retries) {
+			/*
+			 * stage 2, turn off DCD circuitry, then
+			 * voltage source on DP, probe on DM.
+			 */
+			rockchip_chg_enable_dcd(&rphy, false);
+			rockchip_chg_enable_primary_det(&rphy, true);
+			break;
+		}
+	}
+
+	mdelay(CHG_PRIMARY_DET_TIME);
+	vout = property_enabled(rphy.grf_base,
+				&rphy.phy_cfg->chg_det.cp_det);
+	rockchip_chg_enable_primary_det(&rphy, false);
+	if (vout) {
+		/* stage 3, voltage source on DM, probe on DP */
+		rockchip_chg_enable_secondary_det(&rphy, true);
+	} else {
+		if (!rphy.dcd_retries) {
+			/* floating charger found */
+			chg_type = POWER_SUPPLY_TYPE_USB_FLOATING;
+			goto out;
+		} else {
+			/*
+			 * Retry some times to make sure that it's
+			 * really a USB SDP charger.
+			 */
+			vout = rockchip_chg_primary_det_retry(&rphy);
+			if (vout) {
+				/* stage 3, voltage source on DM, probe on DP */
+				rockchip_chg_enable_secondary_det(&rphy, true);
+			} else {
+				/* USB SDP charger found */
+				chg_type = POWER_SUPPLY_TYPE_USB;
+				goto out;
+			}
+		}
+	}
+
+	mdelay(CHG_SECONDARY_DET_TIME);
+	vout = property_enabled(rphy.grf_base,
+				&rphy.phy_cfg->chg_det.dcp_det);
+	/* stage 4, turn off voltage source */
+	rockchip_chg_enable_secondary_det(&rphy, false);
+	if (vout)
+		chg_type = POWER_SUPPLY_TYPE_USB_DCP;
+	else
+		chg_type = POWER_SUPPLY_TYPE_USB_CDP;
+
+out:
+	printf("charger is %s\n", chg_to_string(chg_type));
+
+	return chg_type;
+}
+
+static int rockchip_usb2phy_init(struct phy *phy)
+{
+	struct rockchip_usb2phy *rphy;
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	void __iomem *base;
+
+	rphy = dev_get_priv(phy->dev);
+	base = get_reg_base(rphy);
+
+	if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	} else if (phy->id == USB2PHY_PORT_HOST) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
+	} else {
+		dev_err(phy->dev, "phy id %lu not support", phy->id);
+		return -EINVAL;
+	}
+
+	property_enable(base, &port_cfg->phy_sus, false);
+
+	/* waiting for the utmi_clk to become stable */
+	udelay(2000);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_exit(struct phy *phy)
+{
+	struct rockchip_usb2phy *rphy;
+	const struct rockchip_usb2phy_port_cfg *port_cfg;
+	void __iomem *base;
+
+	rphy = dev_get_priv(phy->dev);
+	base = get_reg_base(rphy);
+
+	if (phy->id == USB2PHY_PORT_OTG) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
+	} else if (phy->id == USB2PHY_PORT_HOST) {
+		port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
+	} else {
+		dev_err(phy->dev, "phy id %lu not support", phy->id);
+		return -EINVAL;
+	}
+
+	property_enable(base, &port_cfg->phy_sus, true);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_probe(struct udevice *dev)
+{
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	struct rockchip_usb2phy *rphy;
+	struct udevice *parent;
+	u32 reg, index;
+
+	rphy = dev_get_priv(dev);
+
+	parent = dev_get_parent(dev);
+	if (!parent) {
+		dev_dbg(dev, "could not find u2phy parent\n");
+		if (ofnode_read_bool(dev_ofnode(dev), "rockchip,grf"))
+			rphy->usbgrf_base =
+				syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	} else {
+		rphy->grf_base =
+			(void __iomem *)((uintptr_t)dev_read_addr(parent));
+	}
+
+	if (rphy->grf_base <= 0) {
+		dev_err(dev, "get syscon grf failed\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_u32(dev_ofnode(dev), "reg", &reg)) {
+		dev_err(dev, "could not read reg\n");
+		return -EINVAL;
+	}
+
+	if (ofnode_read_bool(dev_ofnode(dev), "rockchip,usbgrf")) {
+		rphy->usbgrf_base =
+			syscon_get_first_range(ROCKCHIP_SYSCON_USBGRF);
+		if (rphy->usbgrf_base <= 0) {
+			dev_err(dev, "get syscon usbgrf failed\n");
+			return -EINVAL;
+		}
+	} else {
+		rphy->usbgrf_base = NULL;
+	}
+
+	phy_cfgs =
+		(const struct rockchip_usb2phy_cfg *)dev_get_driver_data(dev);
+	if (!phy_cfgs) {
+		dev_err(dev, "unable to get phy_cfgs\n");
+		return -EINVAL;
+	}
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			rphy->phy_cfg = &phy_cfgs[index];
+			break;
+		}
+		++index;
+	}
+
+	if (!rphy->phy_cfg) {
+		dev_err(dev, "no phy-config can be matched\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct phy_ops rockchip_usb2phy_ops = {
+	.init = rockchip_usb2phy_init,
+	.exit = rockchip_usb2phy_exit,
+};
+
+static const struct rockchip_usb2phy_cfg rk312x_phy_cfgs[] = {
+	{
+		.reg = 0x17c,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x0190, 15, 15, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x017c, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x017c, 14, 14, 0, 1 },
+				.bvalid_det_st	= { 0x017c, 15, 15, 0, 1 },
+				.bvalid_det_clr	= { 0x017c, 15, 15, 0, 1 },
+				.iddig_output	= { 0x017c, 10, 10, 0, 1 },
+				.iddig_en	= { 0x017c, 9, 9, 0, 1 },
+				.idfall_det_en  = { 0x01a0, 2, 2, 0, 1 },
+				.idfall_det_st  = { 0x01a0, 3, 3, 0, 1 },
+				.idfall_det_clr = { 0x01a0, 3, 3, 0, 1 },
+				.idrise_det_en  = { 0x01a0, 0, 0, 0, 1 },
+				.idrise_det_st  = { 0x01a0, 1, 1, 0, 1 },
+				.idrise_det_clr = { 0x01a0, 1, 1, 0, 1 },
+				.ls_det_en	= { 0x017c, 12, 12, 0, 1 },
+				.ls_det_st	= { 0x017c, 13, 13, 0, 1 },
+				.ls_det_clr	= { 0x017c, 13, 13, 0, 1 },
+				.utmi_bvalid	= { 0x014c, 5, 5, 0, 1 },
+				.utmi_iddig	= { 0x014c, 8, 8, 0, 1 },
+				.utmi_ls	= { 0x014c, 7, 6, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0194, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0194, 14, 14, 0, 1 },
+				.ls_det_st	= { 0x0194, 15, 15, 0, 1 },
+				.ls_det_clr	= { 0x0194, 15, 15, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x017c, 3, 0, 5, 1 },
+			.cp_det		= { 0x02c0, 6, 6, 0, 1 },
+			.dcp_det	= { 0x02c0, 5, 5, 0, 1 },
+			.dp_det		= { 0x02c0, 7, 7, 0, 1 },
+			.idm_sink_en	= { 0x0184, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0184, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0184, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0184, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0184, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0184, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static const struct rockchip_usb2phy_cfg rk3328_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0110, 2, 2, 0, 1 },
+				.bvalid_det_st	= { 0x0114, 2, 2, 0, 1 },
+				.bvalid_det_clr = { 0x0118, 2, 2, 0, 1 },
+				.iddig_output	= { 0x0100, 10, 10, 0, 1 },
+				.iddig_en	= { 0x0100, 9, 9, 0, 1 },
+				.idfall_det_en	= { 0x0110, 5, 5, 0, 1 },
+				.idfall_det_st	= { 0x0114, 5, 5, 0, 1 },
+				.idfall_det_clr = { 0x0118, 5, 5, 0, 1 },
+				.idrise_det_en	= { 0x0110, 4, 4, 0, 1 },
+				.idrise_det_st	= { 0x0114, 4, 4, 0, 1 },
+				.idrise_det_clr = { 0x0118, 4, 4, 0, 1 },
+				.ls_det_en	= { 0x0110, 0, 0, 0, 1 },
+				.ls_det_st	= { 0x0114, 0, 0, 0, 1 },
+				.ls_det_clr	= { 0x0118, 0, 0, 0, 1 },
+				.utmi_avalid	= { 0x0120, 10, 10, 0, 1 },
+				.utmi_bvalid	= { 0x0120, 9, 9, 0, 1 },
+				.utmi_iddig	= { 0x0120, 6, 6, 0, 1 },
+				.utmi_ls	= { 0x0120, 5, 4, 0, 1 },
+				.vbus_det_en	= { 0x001c, 15, 15, 1, 0 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x104, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x110, 1, 1, 0, 1 },
+				.ls_det_st	= { 0x114, 1, 1, 0, 1 },
+				.ls_det_clr	= { 0x118, 1, 1, 0, 1 },
+				.utmi_ls	= { 0x120, 17, 16, 0, 1 },
+				.utmi_hstdet	= { 0x120, 19, 19, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0120, 24, 24, 0, 1 },
+			.dcp_det	= { 0x0120, 23, 23, 0, 1 },
+			.dp_det		= { 0x0120, 25, 25, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
+	{
+		.reg = 0x100,
+		.num_ports	= 2,
+		.clkout_ctl	= { 0x108, 4, 4, 1, 0 },
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0x0100, 8, 0, 0, 0x1d1 },
+				.bvalid_det_en	= { 0x0680, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0x0690, 3, 3, 0, 1 },
+				.bvalid_det_clr = { 0x06a0, 3, 3, 0, 1 },
+				.ls_det_en	= { 0x0680, 2, 2, 0, 1 },
+				.ls_det_st	= { 0x0690, 2, 2, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 2, 2, 0, 1 },
+				.utmi_bvalid	= { 0x0804, 10, 10, 0, 1 },
+				.utmi_ls	= { 0x0804, 13, 12, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0x0104, 8, 0, 0, 0x1d1 },
+				.ls_det_en	= { 0x0680, 4, 4, 0, 1 },
+				.ls_det_st	= { 0x0690, 4, 4, 0, 1 },
+				.ls_det_clr	= { 0x06a0, 4, 4, 0, 1 },
+				.utmi_ls	= { 0x0804, 9, 8, 0, 1 },
+				.utmi_hstdet	= { 0x0804, 7, 7, 0, 1 }
+			}
+		},
+		.chg_det = {
+			.opmode		= { 0x0100, 3, 0, 5, 1 },
+			.cp_det		= { 0x0804, 1, 1, 0, 1 },
+			.dcp_det	= { 0x0804, 0, 0, 0, 1 },
+			.dp_det		= { 0x0804, 2, 2, 0, 1 },
+			.idm_sink_en	= { 0x0108, 8, 8, 0, 1 },
+			.idp_sink_en	= { 0x0108, 7, 7, 0, 1 },
+			.idp_src_en	= { 0x0108, 9, 9, 0, 1 },
+			.rdm_pdwn_en	= { 0x0108, 10, 10, 0, 1 },
+			.vdm_src_en	= { 0x0108, 12, 12, 0, 1 },
+			.vdp_src_en	= { 0x0108, 11, 11, 0, 1 },
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static const struct udevice_id rockchip_usb2phy_ids[] = {
+	{ .compatible = "rockchip,rk3128-usb2phy", .data = (ulong)&rk312x_phy_cfgs },
+	{ .compatible = "rockchip,rk3328-usb2phy", .data = (ulong)&rk3328_phy_cfgs },
+	{ .compatible = "rockchip,rv1108-usb2phy", .data = (ulong)&rv1108_phy_cfgs },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_usb2phy) = {
+	.name		= "rockchip_usb2phy",
+	.id		= UCLASS_PHY,
+	.of_match	= rockchip_usb2phy_ids,
+	.ops		= &rockchip_usb2phy_ops,
+	.probe		= rockchip_usb2phy_probe,
+	.priv_auto_alloc_size = sizeof(struct rockchip_usb2phy),
+};

commit e33aecafee38ba39ec54e0b528ede9b2e301819b
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Mon Sep 25 22:01:17 2017 +0800

    rockchip: dts: rv1108: add usb2 phy nodes
    
    rv1108 has one USB 2.0 PHY consist of two usb ports,
    one port is used for DWC2 controller, the other port
    is shared between EHCI and OHCI controllers.
    
    Change-Id: I9e272a16721e05a94a75adbcfbd538c122d1ca69
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 2b221b6d61..42dc7a1c62 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -50,6 +50,18 @@
 	};
 };
 
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 3153dfe658..5fc8eb6ac1 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -126,6 +126,29 @@
 		reg = <0x10300000 0x1000>;
 	};
 
+	u2phy: usb2-phy@10300100 {
+		compatible = "rockchip,rv1108-usb2phy";
+		reg = <0x100 0x0c>;
+		rockchip,grf = <&grf>;
+		rockchip,usbgrf = <&usbgrf>;
+		#phy-cells = <1>;
+		status = "disabled";
+
+		u2phy_otg: otg-port {
+			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "otg-mux";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		u2phy_host: host-port {
+			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "linestate";
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+	};
+
 	pmugrf: syscon@20060000 {
 		compatible = "rockchip,rv1108-pmugrf", "syscon";
 		reg = <0x20060000 0x1000>;
@@ -139,6 +162,11 @@
 		#reset-cells = <1>;
 	};
 
+	usbgrf: syscon@202a0000 {
+		compatible = "rockchip,rv1108-usbgrf", "syscon";
+		reg = <0x202a0000 0x1000>;
+	};
+
 	emmc: dwmmc@30110000 {
 		compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
 		clock-freq-min-max = <400000 150000000>;
@@ -179,6 +207,8 @@
 		compatible = "generic-ehci";
 		reg = <0x30140000 0x20000>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -186,6 +216,8 @@
 		compatible = "generic-ohci";
 		reg = <0x30160000 0x20000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&u2phy 1>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -196,6 +228,8 @@
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 		hnp-srp-disable;
 		dr_mode = "otg";
+		phys = <&u2phy 0>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 

commit 03e886f9855e708c6559c3acb9b088172cb4f1b2
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Aug 9 11:36:28 2017 +0800

    ARM: dts: rockchip: add USB nodes for evb-rv1108
    
    This patch adds USB OTG/EHCI/OHCI nodes for evb-rv1108 USB ports.
    
    Change-Id: Ia75a63dcfd8055b5112f421818b0c543960e798e
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/arch/arm/dts/rv1108-evb.dts b/arch/arm/dts/rv1108-evb.dts
index 0128dd8b1d..2b221b6d61 100644
--- a/arch/arm/dts/rv1108-evb.dts
+++ b/arch/arm/dts/rv1108-evb.dts
@@ -20,6 +20,15 @@
 	chosen {
 		stdout-path = "serial2:1500000n8";
 	};
+
+	vcc5v0_otg: vcc5v0-otg-drv {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		regulator-name = "vcc5v0_otg";
+		gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
 };
 
 &gmac {
@@ -52,3 +61,16 @@
 &uart2 {
 	status = "okay";
 };
+
+&usb20_otg {
+	vbus-supply = <&vcc5v0_otg>;
+	status = "okay";
+};
+
+&usb_host_ehci {
+	status = "okay";
+};
+
+&usb_host_ohci {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rv1108.dtsi b/arch/arm/dts/rv1108.dtsi
index 77ca24e7f3..3153dfe658 100644
--- a/arch/arm/dts/rv1108.dtsi
+++ b/arch/arm/dts/rv1108.dtsi
@@ -175,6 +175,30 @@
 		status = "disabled";
 	};
 
+	usb_host_ehci: usb@30140000 {
+		compatible = "generic-ehci";
+		reg = <0x30140000 0x20000>;
+		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	usb_host_ohci: usb@30160000 {
+		compatible = "generic-ohci";
+		reg = <0x30160000 0x20000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	usb20_otg: usb@30180000 {
+		compatible = "rockchip,rv1108-usb", "rockchip,rk3288-usb",
+			     "snps,dwc2";
+		reg = <0x30180000 0x40000>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		hnp-srp-disable;
+		dr_mode = "otg";
+		status = "disabled";
+	};
+
 	sfc: sfc@301c0000 {
 		compatible = "rockchip,sfc";
 		reg = <0x301c0000 0x200>;

commit 31d551b63d6bfa1a04299b7278a7b7283baec28d
Author: William Wu <william.wu@rock-chips.com>
Date:   Wed Aug 9 11:36:27 2017 +0800

    configs: rockchip: add USB configs for evb-rv1108 board
    
    This patch adds USB configs to support the USB OTG port(consist
    of DWC2 controller) and the USB Host port(consist of EHCI and OHCI
    controllers) on evb-rv1108 board, and also support fastboot over
    USB and USB mass storage.
    
    Change-Id: I80b1ff133a3e16ca0e8202fe737c93d18b6e5b08
    Signed-off-by: William Wu <william.wu@rock-chips.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index ab4276ac8c..7036f433ee 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -5,8 +5,16 @@ CONFIG_TARGET_EVB_RV1108=y
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x62000000
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
@@ -26,6 +34,7 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RV1108=y
+CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
@@ -33,4 +42,16 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x110a
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 04779162d0..5ee45594a3 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -28,4 +28,7 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x2000000)
 
+/* rockchip ohci host driver */
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
 #endif

commit be82169b5cc561b6430b6ee412065ba83c825ceb
Author: Wu Liang feng <wulf@rock-chips.com>
Date:   Mon Sep 25 21:36:22 2017 +0800

    rockchip: rv1108: syscon: add support for usbgrf
    
    usbgrf is a independent module like grf which contain
    usb phy control registers.
    
    Change-Id: I5676cab33bcdd66b4033c9514b82cac26b6ce3e5
    Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 641df58ac2..c6256c0dd8 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -20,6 +20,7 @@ enum {
 	ROCKCHIP_SYSCON_PMUSGRF,
 	ROCKCHIP_SYSCON_CIC,
 	ROCKCHIP_SYSCON_MSCH,
+	ROCKCHIP_SYSCON_USBGRF,
 };
 
 /* Standard Rockchip clock numbers */
diff --git a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
index 8bb0ab89b8..d41cb8325a 100644
--- a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
@@ -11,6 +11,7 @@
 
 static const struct udevice_id rv1108_syscon_ids[] = {
 	{ .compatible = "rockchip,rv1108-grf", .data = ROCKCHIP_SYSCON_GRF },
+	{ .compatible = "rockchip,rv1108-usbgrf", .data = ROCKCHIP_SYSCON_USBGRF },
 	{ }
 };
 

commit 9790078035b7e04843ac92fc27cad1ba32bd0190
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 10:37:19 2017 +0800

    fdt: fdt_chosen: support merge uboot and kernel bootargs for Rockchip
    
    Change-Id: Id8a81d729a736d66301ca964f5b765a92f24c642
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/common/fdt_support.c b/common/fdt_support.c
index 916a448c11..7e6a6696b6 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -291,6 +291,7 @@ int fdt_chosen(void *fdt)
 
 	str = env_get("bootargs");
 	if (str) {
+#ifndef CONFIG_ARCH_ROCKCHIP
 		err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
 				  strlen(str) + 1);
 		if (err < 0) {
@@ -298,6 +299,31 @@ int fdt_chosen(void *fdt)
 			       fdt_strerror(err));
 			return err;
 		}
+#else
+		const char *bootargs = NULL;
+		char buf[2048];
+
+		bootargs = fdt_getprop(fdt, nodeoffset, "bootargs", NULL);
+		if (bootargs) {
+			memset(buf, 0, sizeof(buf));
+			snprintf(buf, sizeof(buf), "%s %s", bootargs, str);
+			err = fdt_setprop(fdt, nodeoffset, "bootargs", buf,
+					  strlen(buf) + 1);
+			if (err < 0) {
+				printf("WARNING: could not set bootargs %s.\n",
+				       fdt_strerror(err));
+				return err;
+			}
+		} else {
+			err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
+					  strlen(str) + 1);
+			if (err < 0) {
+				printf("WARNING: could not set bootargs %s.\n",
+				       fdt_strerror(err));
+				return err;
+			}
+		}
+#endif
 	}
 
 	return fdt_fixup_stdout(fdt, nodeoffset);

commit e8337a14b72803ab9f060746090d6b3a5e9831e6
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 19:22:36 2017 +0800

    rk3368: add arch_cpu_init implementation
    
    1. add ddr read latency config;
    2. pwm select rkpwm source;
    3. pwm2 select 32KHz clock source;
    4. enable force jtag;
    5. add cpu axi qos config.
    
    Change-Id: I974c8c3084b6e6b07769bb3611ea1e97b4e132b4
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index f62d91df74..ce9e62669f 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -30,6 +30,37 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MCU_EXPERI_BASE_BIT31_BIT28       ((MCU_EXPERI_BASE & GENMASK(31, 28)) >> 28)
 #define MCU_EXPERI_BASE_BIT27_BIT12       ((MCU_EXPERI_BASE & GENMASK(27, 12)) >> 12)
 
+#define DDR_LATENCY_BASE		(0xffac0000 + 0x14)
+#define DDR_READ_LATENCY_VALUE		0x34
+
+#define CPU_AXI_QOS_PRIORITY_BASE	0xffad0300
+#define CPU_AXI_QOS_PRIORITY		0x08
+#define QOS_PRIORITY_LEVEL_H		2
+#define QOS_PRIORITY_LEVEL_L		2
+
+#define ISP_R0_QOS_BASE			0xffad0080
+#define QOS_ISP_R0_PRIORITY_LEVEL_H	1
+#define QOS_ISP_R0_PRIORITY_LEVEL_L	1
+
+#define ISP_R1_QOS_BASE			0xffad0100
+#define QOS_ISP_R1_PRIORITY_LEVEL_H	1
+#define QOS_ISP_R1_PRIORITY_LEVEL_L	1
+
+#define ISP_W0_QOS_BASE			0xffad0180
+#define QOS_ISP_W0_PRIORITY_LEVEL_H	3
+#define QOS_ISP_W0_PRIORITY_LEVEL_L	3
+
+#define ISP_W1_QOS_BASE			0xffad0200
+#define QOS_ISP_W1_PRIORITY_LEVEL_H	3
+#define QOS_ISP_W1_PRIORITY_LEVEL_L	3
+
+/* cpu axi qos priority */
+#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
+		((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
+
+#define GRF_SOC_CON15			0xff77043c
+#define PMU_GRF_SOC_CON0		0xff738100
+
 static struct mm_region rk3368_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -92,6 +123,56 @@ static int mcu_init(void)
 	return 0;
 }
 
+static void cpu_axi_qos_prority_level_config(void)
+{
+	u32 level;
+
+	/* Set lcdc cpu axi qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_PRIORITY_LEVEL_H,
+					   QOS_PRIORITY_LEVEL_L);
+	writel(level, CPU_AXI_QOS_PRIORITY_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp r0 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_R0_PRIORITY_LEVEL_H,
+					   QOS_ISP_R0_PRIORITY_LEVEL_L);
+	writel(level, ISP_R0_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp r1 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_R1_PRIORITY_LEVEL_H,
+					   QOS_ISP_R1_PRIORITY_LEVEL_L);
+	writel(level, ISP_R1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp w0 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_W0_PRIORITY_LEVEL_H,
+					   QOS_ISP_W0_PRIORITY_LEVEL_L);
+	writel(level, ISP_W0_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+
+	/* Set cpu isp w1 qos priority level */
+	level = CPU_AXI_QOS_PRIORITY_LEVEL(QOS_ISP_W1_PRIORITY_LEVEL_H,
+					   QOS_ISP_W1_PRIORITY_LEVEL_L);
+	writel(level, ISP_W1_QOS_BASE + CPU_AXI_QOS_PRIORITY);
+}
+
+int arch_cpu_init(void)
+{
+	/* DDR read latency config */
+	writel(DDR_READ_LATENCY_VALUE, DDR_LATENCY_BASE);
+
+	/* PWMs select rkpwm clock source */
+	rk_setreg(GRF_SOC_CON15, 1 << 12);
+
+	/* PWM2 select 32KHz clock source */
+	rk_clrreg(PMU_GRF_SOC_CON0, 1 << 7);
+
+	/* Enable force jtag */
+	rk_setreg(GRF_SOC_CON15, 1 << 13);
+
+	/* Cpu axi qos config */
+	cpu_axi_qos_prority_level_config();
+
+	return 0;
+}
+
 int arch_early_init_r(void)
 {
 	return mcu_init();

commit bdeebcdf00ebe436321906d25106d1fecc2aa77d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 19:05:34 2017 +0800

    rk3399: arch_cpu_init: pwm3 select pwm3a io
    
    Change-Id: Ic6efea20d3815947775d843c0088e8bf1b5dcfab
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index a2810ec8b7..ea449c8f5a 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -16,6 +16,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #define GRF_EMMCCORE_CON11 0xff77f02c
+#define PMU_GRF_SOC_CON0   0xff320180
 
 static struct mm_region rk3399_mem_map[] = {
 	{
@@ -57,6 +58,9 @@ int arch_cpu_init(void)
 	/* Emmc clock generator: disable the clock multipilier */
 	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
 
+	/* PWM3 select pwm3a io */
+	rk_clrreg(PMU_GRF_SOC_CON0, 1 << 5);
+
 	return 0;
 }
 

commit 1cbfe65d1cc1e4f470be7732dbbfe21031788501
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 15:54:03 2017 +0800

    rk322x: add arch_cpu_init implementation
    
    1. pwm select rkpwm clock source;
    2. pwm0~3 io select;
    3. uart1~2 io select;
    4. HDMI phy clock source select HDMIPHY clock out;
    
    Change-Id: I7e59b4d50b2b10f1b3a9d832eaa1297288ebfeff
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x/Makefile b/arch/arm/mach-rockchip/rk322x/Makefile
index ecb3e8dfda..c2330499f9 100644
--- a/arch/arm/mach-rockchip/rk322x/Makefile
+++ b/arch/arm/mach-rockchip/rk322x/Makefile
@@ -7,3 +7,4 @@
 
 obj-y += clk_rk322x.o
 obj-y += syscon_rk322x.o
+obj-y += rk322x.o
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
new file mode 100644
index 0000000000..dcc9f423c3
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#define GRF_SOC_CON2	0x11000408
+#define GRF_CON_IOMUX	0x11000050
+#define CRU_MISC_CON	0x110e0134
+
+int arch_cpu_init(void)
+{
+	/* We do some SoC one time setting here. */
+
+	/* PWMs select rkpwm clock source */
+	rk_setreg(GRF_SOC_CON2, 1 << 0);
+
+	/* PWM0~3 io select */
+	rk_setreg(GRF_CON_IOMUX, 0xf << 0);
+
+	/* UART1~2 io select */
+	rk_setreg(GRF_CON_IOMUX, (1 << 11) | (1 << 8));
+
+	/* HDMI phy clock source select HDMIPHY clock out */
+	rk_clrreg(CRU_MISC_CON, 1 << 13);
+
+	/* TODO: ECO version */
+
+	return 0;
+}

commit d35ebf985d12c74b10e53efcc54b1c0887c90b6b
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 11:41:34 2017 +0800

    rk3328: arch_cpu_init: add some settings
    
    1. enable force jtag;
    2. HDMI phy clock source select HDMIPHY clock out.
    
    Change-Id: I7699093f96a7c75ce1c3e8fede8811651093bb24
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 6764494d3b..df5b190a1e 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -11,6 +11,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define GRF_SOC_CON4		0xff100410
+#define CRU_MISC_CON		0xff440084
+
 static struct mm_region rk3328_mem_map[] = {
 	{
 		.virt = 0x0UL,
@@ -48,5 +51,13 @@ int arch_cpu_init(void)
 {
 	/* We do some SoC one time setting here. */
 
+	/* Enable force to jtag, jtag_tclk/tms iomuxed with sdmmc0_d2/d3 */
+	rk_setreg(GRF_SOC_CON4, 1 << 12);
+
+	/* HDMI phy clock source select HDMIPHY clock out */
+	rk_clrreg(CRU_MISC_CON, 1 << 13);
+
+	/* TODO: ECO version */
+
 	return 0;
 }

commit d1afae36a32b6b733bfa52bfe9ca2127c205dd3e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Tue Sep 12 11:31:04 2017 +0800

    rk3288: arch_cpu_init: add some settings
    
    1. disable lvds phy;
    2. select EDP clock source 24M;
    3. set read latency;
    4. set vop qos to highest priority.
    
    Change-Id: I374d4717b721b10d1d6eb20ad6ac5fbea7c7b467
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index acc3b7932a..eee90cfd53 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -7,6 +7,18 @@
 #include <asm/arch/hardware.h>
 
 #define GRF_SOC_CON2 0xff77024c
+#define GRF_SOC_CON7 0xff770260
+
+#define VIO0_VOP_QOS_BASE	0xffad0408
+#define VIO1_VOP_QOS_BASE	0xffad0008
+#define BUS_MSCH0_QOS_BASE	0xffac0014
+#define BUS_MSCH1_QOS_BASE	0xffac0094
+
+#define READLATENCY_VAL		0x34
+#define CRU_CLKSEL_CON28	0Xff7600d0
+
+#define CPU_AXI_QOS_PRIORITY_LEVEL(h, l) \
+	((((h) & 3) << 8) | (((h) & 3) << 2) | ((l) & 3))
 
 int arch_cpu_init(void)
 {
@@ -15,5 +27,19 @@ int arch_cpu_init(void)
 	/* Use rkpwm by default */
 	rk_setreg(GRF_SOC_CON2, 1 << 0);
 
+	/* Disable LVDS phy */
+	rk_setreg(GRF_SOC_CON7, 1 << 15);
+
+	/* Select EDP clock source 24M */
+	rk_setreg(CRU_CLKSEL_CON28, 1 << 15);
+
+	/* Read latency configure */
+	writel(READLATENCY_VAL, BUS_MSCH0_QOS_BASE);
+	writel(READLATENCY_VAL, BUS_MSCH1_QOS_BASE);
+
+	/* Set vop qos to highest priority */
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO0_VOP_QOS_BASE);
+	writel(CPU_AXI_QOS_PRIORITY_LEVEL(2, 2), VIO1_VOP_QOS_BASE);
+
 	return 0;
 }

commit 86a31622597a3c3bb7d00bd0cc8b024c11ac5e56
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 13 16:47:08 2017 +0800

    rockchip: rk3288: enable interrupt support
    
    Change-Id: Ia6697313d3c62532200bddf789a038f49963996c
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ecf2c35692..3c492a20ff 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -57,6 +57,7 @@ config ROCKCHIP_RK3288
 	select SPL_BOARD_INIT if SPL
 	select SUPPORT_SPL
 	select SPL
+	select GICV2
 	help
 	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index e9e3c4013c..3ec97817eb 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -34,6 +34,9 @@
 #define CONFIG_SPL_STACK		0xff718000
 #define CONFIG_SPL_TEXT_BASE		0xff704004
 
+#define GICD_BASE			0xffc01000
+#define GICC_BASE			0xffc02000
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit 503f955fe23d3884f6c9f622aa6a013cde07c52d
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Wed Sep 13 16:34:43 2017 +0800

    rockchip: rk3368: enable interrupt support
    
    Change-Id: I7031cf89b42b906dcd65c139042815105401ced5
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index ee52aadef1..ecf2c35692 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -88,6 +88,7 @@ config ROCKCHIP_RK3368
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
 	select SYS_NS16550
+	select GICV2
 	help
 	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
 	  into a big and little cluster with 4 cores each) Cortex-A53 including
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 8cba92c56d..b414553565 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -34,6 +34,9 @@
 #define CONFIG_SPL_BSS_START_ADDR       0x400000
 #define CONFIG_SPL_BSS_MAX_SIZE         0x20000
 
+#define GICD_BASE			0xffB71000
+#define GICC_BASE			0xffB72000
+
 #define CONFIG_BOUNCE_BUFFER
 
 #ifndef CONFIG_SPL_BUILD

commit 8f557da16ac51da2410964bf6af926284929f8dc
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 7 20:33:12 2017 +0800

    rockchip: rk3399: enable interrupt support
    
    Change-Id: Icbc73224c3da7fd1e0aebfabe302437ece2f83ad
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8f730dbd17..ee52aadef1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -125,6 +125,7 @@ config ROCKCHIP_RK3399
 	select SPL_DRIVERS_MISC_SUPPORT
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select DEBUG_UART_BOARD_INIT
+	select GICV3
 	help
 	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
 	  and quad-core Cortex-A53.
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 4fd325eeb0..eda6ed7071 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -35,6 +35,10 @@
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
+#define GICD_BASE			0xFEE00000
+#define GICR_BASE			0xFEF00000
+#define GICC_BASE			0xFFF00000
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000

commit 55da6f7382b4fe85bd0781902900a57631d7750e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 7 19:08:29 2017 +0800

    rockchip: rk3328: enable interrupt support
    
    Change-Id: Ib579a37a82e1da469a2706b110ca653fc992d761
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8c8751a4d0..8f730dbd17 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -67,6 +67,7 @@ config ROCKCHIP_RK3288
 config ROCKCHIP_RK3328
 	bool "Support Rockchip RK3328"
 	select ARM64
+	select GICV2
 	help
 	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
 	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index 9819b22ce2..e87985c54c 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -22,6 +22,9 @@
 
 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
 
+#define GICD_BASE			0xFF811000
+#define GICC_BASE			0xFF812000
+
 /* MMC/SD IP block */
 #define CONFIG_BOUNCE_BUFFER
 

commit d1d395d70d0d4482edbc2742016316ea2f24607e
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Thu Sep 7 19:07:30 2017 +0800

    rockchip: rk322x: enable interrupt support
    
    Change-Id: I587628af26073499e3dcc8814e016f9b5276fafd
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 8526d7d1ad..8c8751a4d0 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -44,6 +44,7 @@ config ROCKCHIP_RK322X
 	select DEBUG_UART_BOARD_INIT
 	select TPL_LIBCOMMON_SUPPORT
 	select TPL_LIBGENERIC_SUPPORT
+	select GICV2
 	help
 	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index 6ebe7b7f5c..432a1c2a24 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -29,6 +29,9 @@
 #define CONFIG_TPL_STACK		0x10088000
 #define CONFIG_TPL_TEXT_BASE		0x10081004
 
+#define GICD_BASE                 	0x32011000
+#define GICC_BASE                  	0x32012000
+
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(28 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK32"
 

commit a93252df4b8889072b30bb4c81676ac47442bcb3
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 25 15:24:33 2017 +0800

    rockchip: Kconfig: add CONFIG_GICV2 and CONFIG_GIV3 options
    
    Change-Id: I6c7aec8af2570e7de73a0002bb88f3818b09b266
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index bd58ed93b6..8526d7d1ad 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -198,6 +198,12 @@ config ROCKCHIP_PARTITION_BOOT
 	help
 	  This enables support for bootimg system from rockchip format partition
 
+config GICV2
+	bool "ARM GICv2"
+
+config GICV3
+	bool "ARM GICv3"
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"

commit fa40f8a0c4e1a304a22cb297b4faf59a4627a774
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 25 15:22:49 2017 +0800

    ARM: add support for irq interrup framework
    
    both GICV2 and GICV3 are supported
    
    Change-Id: Ie928cc781c0e0830b98d12c4033e45a43befc2ff
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 5c500be51d..7a21560416 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -246,6 +246,23 @@ WEAK(lowlevel_init)
 #endif
 #endif
 
+#if defined(CONFIG_IRQ)
+	/*
+	 * Setting HCR_EL2.TGE AMO IMO FMO for exception rounting to EL2
+	 */
+	mrs	x0, CurrentEL		/* check currentEL */
+	cmp	x0, 0x8
+	b.ne	end			/* currentEL != EL2 */
+
+	mrs	x9, hcr_el2
+	orr	x9, x9, #(7 << 3)	/* HCR_EL2.AMO IMO FMO set */
+	orr	x9, x9, #(1 << 27)	/* HCR_EL2.TGE set */
+	msr	hcr_el2, x9
+
+end:
+	nop
+#endif /* CONFIG_IRQ */
+
 #ifdef CONFIG_ARMV8_MULTIENTRY
 	branch_if_master x0, x1, 2f
 
diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S
index 62d0022408..febd967e28 100644
--- a/arch/arm/lib/gic_64.S
+++ b/arch/arm/lib/gic_64.S
@@ -108,6 +108,50 @@ ENTRY(gic_init_secure_percpu)
 	mov	w11, #0x1		/* Enable SGI 0 */
 	str	w11, [x10, GICR_ISENABLERn]
 
+#ifdef CONFIG_IRQ
+	/* Rockchip: check elx */
+	switch_el x0, el3_sre, el2_sre, el1_sre
+
+	/* Initialize Cpu Interface */
+el3_sre:
+	mrs	x10, ICC_SRE_EL3
+	orr	x10, x10, #0xf		/* SRE & Disable IRQ/FIQ Bypass & */
+					/* Allow EL2 access to ICC_SRE_EL2 */
+	msr	ICC_SRE_EL3, x10
+	isb
+
+el2_sre:
+	mrs	x10, ICC_SRE_EL2
+	orr	x10, x10, #0xf		/* SRE & Disable IRQ/FIQ Bypass & */
+					/* Allow EL1 access to ICC_SRE_EL1 */
+	msr	ICC_SRE_EL2, x10
+	isb
+
+el1_sre:
+	mrs	x0, CurrentEL		/* check currentEL */
+	cmp	x0, 0xC
+	b.ne	el1_ctlr		/* currentEL != EL3 */
+
+el3_ctlr:
+	mov	x10, #0x3		/* EnableGrp1NS | EnableGrp1S */
+	msr	ICC_IGRPEN1_EL3, x10
+	isb
+
+	msr	ICC_CTLR_EL3, xzr
+	isb
+
+el1_ctlr:
+	mov	x10, #0x3		/* EnableGrp1NS | EnableGrp1S */
+	msr	ICC_IGRPEN1_EL1, x10
+	isb
+
+	msr	ICC_CTLR_EL1, xzr	/* NonSecure ICC_CTLR_EL1 */
+	isb
+
+	mov	x10, #0xf0		/* Non-Secure access to ICC_PMR_EL1 */
+	msr	ICC_PMR_EL1, x10
+	isb
+#else
 	/* Initialize Cpu Interface */
 	mrs	x10, ICC_SRE_EL3
 	orr	x10, x10, #0xf		/* SRE & Disable IRQ/FIQ Bypass & */
@@ -134,6 +178,8 @@ ENTRY(gic_init_secure_percpu)
 	mov	x10, #0x1 << 7		/* Non-Secure access to ICC_PMR_EL1 */
 	msr	ICC_PMR_EL1, x10
 	isb
+#endif
+
 #elif defined(CONFIG_GICV2)
 	/*
 	 * Initialize SGIs and PPIs
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 80869adb61..6b8ec16776 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -26,6 +26,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_IRQ
 int interrupt_init (void)
 {
 	/*
@@ -44,6 +45,7 @@ int disable_interrupts (void)
 {
 	return 0;
 }
+#endif
 
 void bad_mode (void)
 {
@@ -154,6 +156,7 @@ void do_fiq (struct pt_regs *pt_regs)
 	bad_mode ();
 }
 
+#ifndef CONFIG_IRQ
 void do_irq (struct pt_regs *pt_regs)
 {
 	efi_restore_gd();
@@ -162,3 +165,4 @@ void do_irq (struct pt_regs *pt_regs)
 	show_regs (pt_regs);
 	bad_mode ();
 }
+#endif
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 7c9cfce69f..e151f80625 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -9,7 +9,7 @@
 #include <linux/compiler.h>
 #include <efi_loader.h>
 
-
+#ifndef CONFIG_IRQ
 int interrupt_init(void)
 {
 	return 0;
@@ -24,6 +24,7 @@ int disable_interrupts(void)
 {
 	return 0;
 }
+#endif
 
 void show_regs(struct pt_regs *regs)
 {
@@ -92,6 +93,7 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
 	panic("Resetting CPU ...\n");
 }
 
+#ifndef CONFIG_IRQ
 /*
  * do_irq handles the Irq exception.
  */
@@ -102,6 +104,7 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
 	show_regs(pt_regs);
 	panic("Resetting CPU ...\n");
 }
+#endif
 
 /*
  * do_fiq handles the Fiq exception.
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index 737622d26f..5f15e34ed5 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -25,8 +25,16 @@ int arch_reserve_stacks(void)
 	gd->irq_sp = gd->start_addr_sp;
 
 # if !defined(CONFIG_ARM64)
+#ifdef CONFIG_IRQ
+#ifndef CONFIG_IRQ_STACK_SIZE
+#define CONFIG_IRQ_STACK_SIZE	8192
+#endif
+	gd->start_addr_sp -= CONFIG_IRQ_STACK_SIZE;
+
+#else
 	/* leave 3 words for abort-stack, plus 1 for alignment */
 	gd->start_addr_sp -= 16;
+#endif
 # endif
 #endif
 
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 101909103e..d25cf4585c 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -131,6 +131,13 @@ IRQ_STACK_START_IN:
 	.word	0x0badc0de
 #endif
 
+#ifdef CONFIG_IRQ
+/* IRQ stack memory (calculated at run-time) */
+.globl IRQ_STACK_START
+IRQ_STACK_START:
+	.word	0x0badc0de
+#endif
+
 @
 @ IRQ stack frame.
 @
@@ -257,9 +264,16 @@ not_used:
 
 	.align	5
 irq:
+#ifdef CONFIG_IRQ
+	get_irq_stack
+	irq_save_user_regs
+	bl	do_irq
+	irq_restore_user_regs
+#else
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_irq
+#endif
 
 	.align	5
 fiq:

commit 4e6670fe63b534b8dfcf07b7547078f9298dd574
Author: Joseph Chen <chenjh@rock-chips.com>
Date:   Mon Sep 25 14:44:10 2017 +0800

    drivers: add irq interrupt framework support
    
    This patch add support for IRQ interrupt, FIQ not included.
    It will be enabled when you select CONFIG_GICV2 or CONFIG_GICV3.
    
    The framework support gic interrupt and gpio interrupt, relative APIs
    are provided in: ./include/irq-platform.h
    
    If you'd like to add a new platform support into interrupt framework,
    please follow the steps:
    1. add relative definitions in the file like other platforms:
            ./include/irq-platform.h
    
    2. add GICD, GICC and GICR(for GICV3) base address definitions in the
       rkxxx-common.h, they are needed in: arch/arm/cpu/armv8/start.S;
    
    3. enable CONFIG_GICV2 or CONFIG_GICV3.
    
    Notice:
    1. the framework is initialize in function 'interrupt_init()' of
       _sequence_r[]. So you should not request irqs too early.
    
    2. IRQ stack size is configured by CONFIG_IRQ_STACK_SIZE, the default
       value is 8KB when CONFIG_IRQ_STACK_SIZE is absent.
    
    Change-Id: I3d9e29873c9d64cd28aabd13a61111438c5902b0
    Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

diff --git a/drivers/Kconfig b/drivers/Kconfig
index 613e60235d..baf2d5bac0 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -98,6 +98,8 @@ source "drivers/video/Kconfig"
 
 source "drivers/watchdog/Kconfig"
 
+source "drivers/irq/Kconfig"
+
 config PHYS_TO_BUS
 	bool "Custom physical to bus address mapping"
 	help
diff --git a/drivers/Makefile b/drivers/Makefile
index dab5c182c2..5edf096a3a 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
 obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
 obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
 obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
+obj-$(CONFIG_IRQ) += irq/
 
 ifndef CONFIG_TPL_BUILD
 ifdef CONFIG_SPL_BUILD
diff --git a/drivers/irq/Kconfig b/drivers/irq/Kconfig
new file mode 100644
index 0000000000..090b4e1ceb
--- /dev/null
+++ b/drivers/irq/Kconfig
@@ -0,0 +1,6 @@
+config IRQ
+	bool "IRQ support"
+	depends on GICV2 || GICV3
+	default y
+	help
+	  Provide IRQ support for platforms
diff --git a/drivers/irq/Makefile b/drivers/irq/Makefile
new file mode 100644
index 0000000000..244a65d123
--- /dev/null
+++ b/drivers/irq/Makefile
@@ -0,0 +1,10 @@
+#
+# (C) Copyright 2017 Rockchip Electronics Co., Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += irq-gic.o
+obj-y += irq-gpio.o
+obj-y += irq-generic.o
+obj-y += irq-gpio-switch.o
\ No newline at end of file
diff --git a/drivers/irq/irq-generic.c b/drivers/irq/irq-generic.c
new file mode 100644
index 0000000000..93a557f857
--- /dev/null
+++ b/drivers/irq/irq-generic.c
@@ -0,0 +1,268 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/u-boot-arm.h>
+#include <irq-generic.h>
+#include "irq-gic.h"
+#include "irq-gpio.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct irq_desc {
+	void (*handle_irq)(void *data);
+};
+
+static struct irq_desc irqs_desc[PLATFORM_MAX_IRQS_NR];
+static struct irq_chip *gic_irq_chip, *gpio_irq_chip;
+static bool initialized;
+
+static int irq_bad(int irq)
+{
+	if (irq >= PLATFORM_MAX_IRQS_NR) {
+		printf("WARN: IRQ %d is out of max supported IRQ %d\n",
+		       irq, PLATFORM_MAX_IRQS_NR);
+		return -EINVAL;
+	}
+
+	if (!initialized) {
+		printf("WARN: Interrupt framework is not initialized\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/* general interrupt handler for gpio chip */
+void _generic_gpio_handle_irq(int irq, void *data)
+{
+	if (irq_bad(irq))
+		return;
+
+	if (irq < PLATFORM_GIC_IRQS_NR) {
+		printf("WRAN: IRQ %d is not a GPIO irq\n", irq);
+		return;
+	}
+
+	if (irqs_desc[irq].handle_irq)
+		irqs_desc[irq].handle_irq(data);
+}
+
+void _do_generic_irq_handler(void)
+{
+	u32 irq = gic_irq_chip->irq_get();
+
+	if (irq < PLATFORM_GIC_IRQS_NR) {
+		if (irqs_desc[irq].handle_irq)
+			irqs_desc[irq].handle_irq((void *)(unsigned long)irq);
+	}
+
+	gic_irq_chip->irq_eoi(irq);
+}
+
+static int chip_irq_bad(struct irq_chip *chip)
+{
+	if (!chip->name ||
+	    !chip->irq_init ||
+	    !chip->irq_enable ||
+	    !chip->irq_disable ||
+	    !chip->irq_set_type)
+		return -EINVAL;
+
+	return 0;
+}
+
+static int _do_arch_irq_init(void)
+{
+	int irq, err = -EINVAL;
+
+	/* After relocation done, bss data initialized */
+	if (!(gd->flags & GD_FLG_RELOC)) {
+		printf("WARN: interrupt should be init after reloc\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * should set true before arch_gpio_irq_init(), otherwise
+	 *  can't request irqs for gpio banks.
+	 */
+	initialized = true;
+
+	for (irq = 0; irq < PLATFORM_MAX_IRQS_NR; irq++)
+		irqs_desc[irq].handle_irq = NULL;
+
+	gic_irq_chip = arch_gic_irq_init();
+	if (chip_irq_bad(gic_irq_chip)) {
+		printf("ERROR: bad gic irq chip\n");
+		goto out;
+	}
+
+	gpio_irq_chip = arch_gpio_irq_init();
+	if (chip_irq_bad(gpio_irq_chip)) {
+		printf("ERROR: bad gpio irq chip\n");
+		goto out;
+	}
+
+	err = gic_irq_chip->irq_init();
+	if (err) {
+		printf("ERROR: gic interrupt init failed\n");
+		goto out;
+	}
+
+	err = gpio_irq_chip->irq_init();
+	if (err) {
+		printf("ERROR: gpio interrupt init failed\n");
+		goto out;
+	}
+
+	return 0;
+
+out:
+	initialized = false;
+
+	return err;
+}
+
+int irq_handler_enable(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return gic_irq_chip->irq_enable(irq);
+	else
+		return gpio_irq_chip->irq_enable(irq);
+}
+
+int irq_handler_disable(int irq)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return gic_irq_chip->irq_disable(irq);
+	else
+		return gpio_irq_chip->irq_disable(irq);
+}
+
+int irq_set_irq_type(int irq, unsigned int type)
+{
+	if (irq_bad(irq))
+		return -EINVAL;
+
+	if (irq < PLATFORM_GIC_IRQS_NR)
+		return gic_irq_chip->irq_set_type(irq, type);
+	else
+		return gpio_irq_chip->irq_set_type(irq, type);
+}
+
+void irq_install_handler(int irq, interrupt_handler_t *handler, void *data)
+{
+	if (irq_bad(irq))
+		return;
+
+	irqs_desc[irq].handle_irq = handler;
+}
+
+void irq_free_handler(int irq)
+{
+	if (irq_bad(irq))
+		return;
+
+	irqs_desc[irq].handle_irq = NULL;
+}
+
+#ifdef CONFIG_ARM64
+static void cpu_local_irq_enable(void)
+{
+	asm volatile("msr daifclr, #0x02");
+}
+
+static int cpu_local_irq_disable(void)
+{
+	asm volatile("msr daifset, #0x02");
+
+	return 0;
+}
+
+void do_irq(struct pt_regs *pt_regs, unsigned int esr)
+{
+	_do_generic_irq_handler();
+}
+#else
+static void cpu_local_irq_enable(void)
+{
+	unsigned long cpsr;
+
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     "bic %0, %0, #0x80\n"
+			     "msr cpsr_c, %0"
+			     : "=r" (cpsr) : : "memory");
+}
+
+static int cpu_local_irq_disable(void)
+{
+	unsigned long old_cpsr, new_cpsr;
+
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     "orr %1, %0, #0xc0\n"
+			     "msr cpsr_c, %1"
+			     : "=r" (old_cpsr), "=r" (new_cpsr)
+			     :
+			     : "memory");
+
+	return (old_cpsr & 0x80) == 0;
+}
+
+void do_irq(struct pt_regs *pt_regs)
+{
+	_do_generic_irq_handler();
+}
+#endif
+
+int arch_interrupt_init(void)
+{
+#ifndef CONFIG_ARM64
+	unsigned long cpsr __maybe_unused;
+
+	/* stack has been reserved in: arch_reserve_stacks() */
+	IRQ_STACK_START = gd->irq_sp;
+
+	__asm__ __volatile__("mrs %0, cpsr\n"
+			     : "=r" (cpsr)
+			     :
+			     : "memory");
+
+	__asm__ __volatile__("msr cpsr_c, %0\n"
+			     "mov sp, %1\n"
+			     :
+			     : "r" (IRQ_MODE | I_BIT |
+				    F_BIT | (cpsr & ~FIQ_MODE)),
+			       "r" (IRQ_STACK_START)
+			     : "memory");
+
+	__asm__ __volatile__("msr cpsr_c, %0"
+			     :
+			     : "r" (cpsr)
+			     : "memory");
+#endif
+	return _do_arch_irq_init();
+}
+
+int interrupt_init(void)
+{
+	return arch_interrupt_init();
+}
+
+void enable_interrupts(void)
+{
+	cpu_local_irq_enable();
+}
+
+int disable_interrupts(void)
+{
+	return cpu_local_irq_disable();
+}
diff --git a/drivers/irq/irq-gic.c b/drivers/irq/irq-gic.c
new file mode 100644
index 0000000000..3b1c91db9d
--- /dev/null
+++ b/drivers/irq/irq-gic.c
@@ -0,0 +1,289 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/gic.h>
+#include <config.h>
+#include <irq-generic.h>
+#include "irq-gic.h"
+
+typedef enum INT_TRIG {
+	INT_LEVEL_TRIGGER,
+	INT_EDGE_TRIGGER
+} eINT_TRIG;
+
+typedef enum INT_SECURE {
+	INT_SECURE,
+	INT_NOSECURE
+} eINT_SECURE;
+
+typedef enum INT_SIGTYPE {
+	INT_SIGTYPE_IRQ,
+	INT_SIGTYPE_FIQ
+} eINT_SIGTYPE;
+
+#define g_gicd		((pGICD_REG)GICD_BASE)
+#define g_gicc		((pGICC_REG)GICC_BASE)
+
+__maybe_unused static u8 g_gic_cpumask = 0x01;
+
+static inline void int_set_prio_filter(u32 nprio)
+{
+	g_gicc->iccpmr = (nprio & 0xff);
+}
+
+static inline void int_enable_distributor(void)
+{
+	g_gicd->icddcr = 0x01;
+}
+
+static inline void int_disable_distributor(void)
+{
+	g_gicd->icddcr = 0x00;
+}
+
+static inline void int_enable_secure_signal(void)
+{
+	g_gicc->iccicr |= 0x01;
+}
+
+static inline void int_disable_secure_signal(void)
+{
+	g_gicc->iccicr &= (~0x01);
+}
+
+static inline void int_enable_nosecure_signal(void)
+{
+	g_gicc->iccicr |= 0x02;
+}
+
+static inline void int_disable_nosecure_signal(void)
+{
+	g_gicc->iccicr &= (~0x02);
+}
+
+static int gic_irq_set_trigger(int irq, eINT_TRIG ntrig)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 16;
+	offset = irq % 16;
+
+	if (ntrig == INT_LEVEL_TRIGGER)
+		g_gicd->icdicfr[group] &= (~(1 << (2 * offset + 1)));
+	else
+		g_gicd->icdicfr[group] |= (1 << (2 * offset + 1));
+
+	return 0;
+}
+
+__maybe_unused static int gic_irq_set_pending(int irq)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdispr[group] = (0x1 << offset);
+
+	return 0;
+}
+
+__maybe_unused static int gic_irq_clear_pending(int irq)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdicpr[group] = (0x1 << offset);
+
+	return 0;
+}
+
+__maybe_unused static int gic_irq_set_secure(int irq, eINT_SECURE nsecure)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdiser[group] |= nsecure << offset;
+
+	return 0;
+}
+
+__maybe_unused static u32 gic_get_cpumask(void)
+{
+	u32 mask = 0, i;
+
+	for (i = mask = 0; i < 32; i += 4) {
+		mask = g_gicd->itargetsr[i];
+		mask |= mask >> 16;
+		mask |= mask >> 8;
+		if (mask)
+			break;
+	}
+
+	if (!mask)
+		printf("GIC CPU mask not found.\n");
+
+	debug("GIC CPU mask = 0x%08x\n", mask);
+
+	return mask;
+}
+
+static int gic_irq_enable(int irq)
+{
+#ifdef CONFIG_GICV2
+	u32 shift = (irq % 4) * 8;
+	u32 offset = (irq / 4);
+	u32 M, N;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	M = irq / 32;
+	N = irq % 32;
+
+	g_gicc->iccicr &= (~0x08);
+	g_gicd->icdiser[M] = (0x1 << N);
+	g_gicd->itargetsr[offset] &= ~(0xFF << shift);
+	g_gicd->itargetsr[offset] |= (g_gic_cpumask << shift);
+#else
+	u32 M, N;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	M = irq / 32;
+	N = irq % 32;
+	g_gicd->icdiser[M] = (0x1 << N);
+#endif
+
+	return 0;
+}
+
+static int gic_irq_disable(int irq)
+{
+	u32 group, offset;
+
+	if (irq >= PLATFORM_GIC_IRQS_NR)
+		return -EINVAL;
+
+	group = irq / 32;
+	offset = irq % 32;
+	g_gicd->icdicer[group] = (0x1 << offset);
+
+	return 0;
+}
+
+/*
+ * irq_set_type - set the irq trigger type for an irq
+ *
+ * @irq: irq number
+ * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see asm/arch/irq.h
+ */
+static int gic_irq_set_type(int irq, unsigned int type)
+{
+	unsigned int int_type;
+
+	switch (type) {
+	case IRQ_TYPE_EDGE_RISING:
+	case IRQ_TYPE_EDGE_FALLING:
+		int_type = INT_EDGE_TRIGGER;
+		break;
+	case IRQ_TYPE_LEVEL_HIGH:
+	case IRQ_TYPE_LEVEL_LOW:
+		int_type = INT_LEVEL_TRIGGER;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	gic_irq_set_trigger(irq, int_type);
+
+	return 0;
+}
+
+static void gic_irq_eoi(int irq)
+{
+#ifdef CONFIG_GICV2
+	g_gicc->icceoir = irq;
+#else
+	asm volatile("msr " __stringify(ICC_EOIR1_EL1) ", %0"
+			: : "r" ((u64)irq));
+	asm volatile("msr " __stringify(ICC_DIR_EL1) ", %0"
+			: : "r" ((u64)irq));
+	isb();
+#endif
+}
+
+static int gic_irq_get(void)
+{
+#ifdef CONFIG_GICV2
+	return g_gicc->icciar & 0x3ff; /* bit9 - bit0 */
+#else
+	u64 irqstat;
+
+	asm volatile("mrs %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat));
+	return (u32)irqstat & 0x3ff;
+#endif
+}
+
+static int gic_irq_init(void)
+{
+	/* GICV3 done in: arch/arm/cpu/armv8/start.S */
+#ifdef CONFIG_GICV2
+	/* end of interrupt */
+	g_gicc->icceoir = PLATFORM_GIC_IRQS_NR;
+
+	/* disable gicc and gicd */
+	g_gicc->iccicr = 0x00;
+	g_gicd->icddcr = 0x00;
+
+	/* enable interrupt */
+	g_gicd->icdicer[0] = 0xFFFFFFFF;
+	g_gicd->icdicer[1] = 0xFFFFFFFF;
+	g_gicd->icdicer[2] = 0xFFFFFFFF;
+	g_gicd->icdicer[3] = 0xFFFFFFFF;
+	g_gicd->icdicfr[3] &= ~(1 << 1);
+
+	/* set interrupt priority threhold min: 256 */
+	int_set_prio_filter(0xff);
+	int_enable_secure_signal();
+	int_enable_nosecure_signal();
+	int_enable_distributor();
+
+	g_gic_cpumask = gic_get_cpumask();
+#endif
+
+	return 0;
+}
+
+static struct irq_chip gic_irq_chip = {
+	.name		= "gic-irq-chip",
+	.irq_init	= gic_irq_init,
+	.irq_get	= gic_irq_get,
+	.irq_enable	= gic_irq_enable,
+	.irq_disable	= gic_irq_disable,
+	.irq_eoi	= gic_irq_eoi,
+	.irq_set_type	= gic_irq_set_type,
+};
+
+struct irq_chip *arch_gic_irq_init(void)
+{
+	return &gic_irq_chip;
+}
diff --git a/drivers/irq/irq-gic.h b/drivers/irq/irq-gic.h
new file mode 100644
index 0000000000..4bd53c2092
--- /dev/null
+++ b/drivers/irq/irq-gic.h
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GIC_H_
+#define _IRQ_GIC_H_
+
+#include <irq-platform.h>
+
+/* INTC Registers */
+typedef volatile struct tagGICD_REG {
+	u32 icddcr;		/* 0x000 */
+	u32 icdictr;		/* 0x004 */
+	u32 icdiidr;		/* 0x008 */
+	u32 reserved0[29];
+	u32 icdisr[4];		/* 0x080 */
+	u32 reserved1[28];
+	u32 icdiser[4];		/* 0x100 */
+	u32 reserved2[28];
+	u32 icdicer[4];		/* 0x180: GICD_ISENABLERn */
+	u32 reserved3[28];
+	u32 icdispr[4];		/* 0x200 */
+	u32 reserved4[28];
+	u32 icdicpr[4];		/* 0x280 */
+	u32 reserved5[28];
+	u32 icdiabr[4];		/* 0x300 */
+	u32 reserved6[60];
+	u32 icdipr_sgi[4];	/* 0x400 */
+	u32 icdipr_ppi[4];	/* 0x410 */
+	u32 icdipr_spi[18];	/* 0x420 */
+	u32 reserved7[230];
+	u32 itargetsr[255];	/* 0x800 */
+	u32 reserved9[1];
+	u32 icdicfr[7];		/* 0xc00: GICD_ICFGRn: trigger level/edge */
+	u32 reserved8[185];
+	u32 icdsgir;		/* 0xf00 */
+} GICD_REG, *pGICD_REG;
+
+typedef volatile struct tagGICC_REG {
+	u32 iccicr;		/* 0x00 */
+	u32 iccpmr;		/* 0x04: GICC_PMR */
+	u32 iccbpr;		/* 0x08 */
+	u32 icciar;		/* 0x0c */
+	u32 icceoir;		/* 0x10 */
+	u32 iccrpr;		/* 0x14 */
+	u32 icchpir;		/* 0x18 */
+	u32 iccabpr;		/* 0x1c */
+	u32 reserved0[55];
+	u32 icciidr;		/* 0xfc */
+} GICC_REG, *pGICC_REG;
+
+#define PLATFORM_GIC_IRQS_NR		GIC_IRQS_NR
+#define PLATFORM_GPIO_IRQS_NR		GPIO_IRQS_NR
+#define PLATFORM_MAX_IRQS_NR		(GIC_IRQS_NR + GPIO_IRQS_NR)
+
+struct irq_chip *arch_gic_irq_init(void);
+
+#endif /* _IRQ_GIC_H_ */
diff --git a/drivers/irq/irq-gpio-switch.c b/drivers/irq/irq-gpio-switch.c
new file mode 100644
index 0000000000..79c78034cf
--- /dev/null
+++ b/drivers/irq/irq-gpio-switch.c
@@ -0,0 +1,161 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <dm.h>
+#include <irq-generic.h>
+#include "irq-gpio-switch.h"
+
+static struct gpio_bank gpio_banks[GPIO_BANK_NUM] = {
+#if GPIO_BANK_NUM >= 1
+	GPIO_BANK_REGISTER(0, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 2
+	GPIO_BANK_REGISTER(1, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 3
+	GPIO_BANK_REGISTER(2, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 4
+	GPIO_BANK_REGISTER(3, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 5
+	GPIO_BANK_REGISTER(4, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 6
+	GPIO_BANK_REGISTER(5, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 7
+	GPIO_BANK_REGISTER(6, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 8
+	GPIO_BANK_REGISTER(7, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 9
+	GPIO_BANK_REGISTER(8, GPIO_BANK_PINS),
+#endif
+#if GPIO_BANK_NUM >= 10
+	GPIO_BANK_REGISTER(9, GPIO_BANK_PINS),
+#endif
+};
+
+static int gpio_is_valid(u32 gpio)
+{
+	if ((gpio == EINVAL_GPIO) || !GPIO_BANK_VALID(gpio) ||
+	    !GPIO_PIN_VALID(gpio)) {
+		printf("gpio = 0x%x is not valid!\n", gpio);
+		return 0;
+	}
+
+	return 1;
+}
+
+static int _hard_gpio_to_irq(u32 gpio)
+{
+	int idx, bank = 0, pin = 0;
+
+	if (!gpio_is_valid(gpio))
+		return -EINVAL;
+
+	bank = (gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET;
+	pin = (gpio & GPIO_PIN_MASK) >> GPIO_PIN_OFFSET;
+
+	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
+		if (gpio_banks[idx].id == bank)
+			return (gpio_banks[idx].irq_base + pin);
+	}
+
+	return -EINVAL;
+}
+
+static int _irq_to_gpio(int irq)
+{
+	int bank, pin, idx;
+
+	bank = (irq - PIN_BASE) / GPIO_BANK_PINS;
+	pin = (irq - PIN_BASE) % GPIO_BANK_PINS;
+
+	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
+		if (gpio_banks[idx].id == bank) {
+			return (bank << GPIO_BANK_OFFSET) |
+				(pin << GPIO_PIN_OFFSET);
+		}
+	}
+
+	return -EINVAL;
+}
+
+int gpio_to_irq(struct gpio_desc *gpio)
+{
+	int irq_gpio, bank;
+	bool found;
+	char *name;
+
+	if (!gpio->dev->name) {
+		printf("can't find device name for the gpio bank\n");
+		return EINVAL_GPIO;
+	}
+
+	name = strtok((char *)gpio->dev->name, "@");
+	if (!name) {
+		printf("can't find correct device name for the gpio bank\n");
+		return EINVAL_GPIO;
+	}
+
+	for (bank = 0; bank < ARRAY_SIZE(gpio_banks); bank++) {
+		if (!strcmp(gpio_banks[bank].name, name)) {
+			found = true;
+			break;
+		}
+	}
+
+	if (!found) {
+		printf("irq gpio framework can't find %s\n", name);
+		return EINVAL_GPIO;
+	}
+
+	irq_gpio = RK_IRQ_GPIO(bank, gpio->offset);
+	if (!gpio_is_valid(irq_gpio))
+		return EINVAL_GPIO;
+
+	return _hard_gpio_to_irq(irq_gpio);
+}
+
+int hard_gpio_to_irq(u32 gpio)
+{
+	if (!gpio_is_valid(gpio))
+		return EINVAL_GPIO;
+
+	return _hard_gpio_to_irq(gpio);
+}
+
+int irq_to_gpio(int irq)
+{
+	return _irq_to_gpio(irq);
+}
+
+struct gpio_bank *gpio_id_to_bank(u32 id)
+{
+	int idx;
+
+	for (idx = 0; idx < ARRAY_SIZE(gpio_banks); idx++) {
+		if (gpio_banks[idx].id == id)
+			return &gpio_banks[idx];
+	}
+
+	return NULL;
+}
+
+struct gpio_bank *gpio_to_bank(u32 gpio)
+{
+	int id;
+
+	if (!gpio_is_valid(gpio))
+		return NULL;
+
+	id = (gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET;
+
+	return gpio_id_to_bank(id);
+}
diff --git a/drivers/irq/irq-gpio-switch.h b/drivers/irq/irq-gpio-switch.h
new file mode 100644
index 0000000000..1442825132
--- /dev/null
+++ b/drivers/irq/irq-gpio-switch.h
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GPIO_SWITCH_H_
+#define _IRQ_GPIO_SWITCH_H_
+
+#include <asm/io.h>
+#include <common.h>
+#include <irq-platform.h>
+
+/* bank and pin bit mask */
+#define GPIO_BANK_MASK		0xFFFFFF00
+#define GPIO_BANK_OFFSET	8
+#define GPIO_PIN_MASK		0x000000FF
+#define GPIO_PIN_OFFSET		0
+
+#define EINVAL_GPIO		-1
+#define PIN_BASE		GIC_IRQS_NR
+
+struct gpio_bank {
+	char *name;
+	void __iomem *regbase;
+	int id;
+	int irq_base;
+	int ngpio;
+};
+
+#define GPIO_BANK_REGISTER(ID, GPIO_BANK_NUM)	\
+	{								\
+		.name	  = __stringify(gpio##ID),			\
+		.regbase  = (unsigned char __iomem *)GPIO##ID##_PHYS,	\
+		.id	  = ID,						\
+		.irq_base = PIN_BASE + (ID) * (GPIO_BANK_NUM),		\
+		.ngpio    = GPIO_BANK_NUM,				\
+	}
+
+/* gpio bank[31:8] and pin[7:0] */
+#define GPIO_BANK(gpio)		((gpio & GPIO_BANK_MASK) >> GPIO_BANK_OFFSET)
+#define GPIO_PIN(gpio)		((gpio & GPIO_PIN_MASK) >> GPIO_PIN_OFFSET)
+#define GPIO_BANK_VALID(gpio)	(GPIO_BANK(gpio) < GPIO_BANK_NUM)
+#define GPIO_PIN_VALID(gpio)	(GPIO_PIN(gpio) < GPIO_BANK_PINS)
+
+int hard_gpio_to_irq(u32 gpio);
+int irq_to_gpio(int irq);
+
+struct gpio_bank *gpio_id_to_bank(unsigned int id);
+struct gpio_bank *gpio_to_bank(unsigned gpio);
+
+#endif	/* _IRQ_GPIO_SWITCH_H_ */
diff --git a/drivers/irq/irq-gpio.c b/drivers/irq/irq-gpio.c
new file mode 100644
index 0000000000..b331ffeb7f
--- /dev/null
+++ b/drivers/irq/irq-gpio.c
@@ -0,0 +1,246 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <irq-generic.h>
+#include "irq-gpio.h"
+#include "irq-gpio-switch.h"
+
+typedef enum GPIOIntType {
+	GPIOLevelLow = 0,
+	GPIOLevelHigh,
+	GPIOEdgelFalling,
+	GPIOEdgelRising
+} eGPIOIntType_t;
+
+typedef enum eGPIOPinLevel {
+	GPIO_LOW = 0,
+	GPIO_HIGH
+} eGPIOPinLevel_t;
+
+typedef enum eGPIOPinDirection {
+	GPIO_IN = 0,
+	GPIO_OUT
+} eGPIOPinDirection_t;
+
+#define GPIO_SWPORT_DR		0x00
+#define GPIO_SWPORT_DDR		0x04
+#define GPIO_INTEN		0x30
+#define GPIO_INTMASK		0x34
+#define GPIO_INTTYPE_LEVEL	0x38
+#define GPIO_INT_POLARITY	0x3c
+#define GPIO_INT_STATUS		0x40
+#define GPIO_INT_RAWSTATUS	0x44
+#define GPIO_DEBOUNCE		0x48
+#define GPIO_PORTS_EOI		0x4c
+#define GPIO_EXT_PORT		0x50
+#define GPIO_LS_SYNC		0x60
+
+static inline unsigned pin_to_bit(unsigned pin)
+{
+	return (1 << pin);
+}
+
+static inline unsigned offset_to_bit(unsigned offset)
+{
+	return (1 << offset);
+}
+
+static void gpio_bit_op(void __iomem *regbase, unsigned int offset,
+			u32 bit, unsigned char flag)
+{
+	u32 val = readl(regbase + offset);
+
+	if (flag)
+		val |= bit;
+	else
+		val &= ~bit;
+
+	writel(val, regbase + offset);
+}
+
+static void gpio_irq_unmask(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_INTEN, bit, 1);
+}
+
+static void gpio_irq_mask(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_INTEN, bit, 0);
+}
+
+static void gpio_irq_ack(void __iomem *regbase, unsigned int bit)
+{
+	gpio_bit_op(regbase, GPIO_PORTS_EOI, bit, 1);
+}
+
+static void generic_gpio_handle_irq(int irq)
+{
+	struct gpio_bank *bank = gpio_id_to_bank(irq - IRQ_GPIO0);
+	unsigned gpio_irq, pin, unmasked = 0;
+	u32 isr, ilr;
+
+	isr = readl(bank->regbase + GPIO_INT_STATUS);
+	ilr = readl(bank->regbase + GPIO_INTTYPE_LEVEL);
+
+	gpio_irq = bank->irq_base;
+
+	while (isr) {
+		pin = fls(isr) - 1;
+
+		/* first mask and ack irq */
+		gpio_irq_mask(bank->regbase, offset_to_bit(pin));
+		gpio_irq_ack(bank->regbase, offset_to_bit(pin));
+
+		/*
+		 * if gpio is edge triggered, clear condition before executing
+		 * the handler so that we don't miss edges
+		 */
+		if (ilr & (1 << pin)) {
+			unmasked = 1;
+			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
+		}
+
+		_generic_gpio_handle_irq(gpio_irq + pin, NULL);
+
+		isr &= ~(1 << pin);
+
+		if (!unmasked)
+			gpio_irq_unmask(bank->regbase, offset_to_bit(pin));
+	}
+}
+
+static void gpio_set_intr_type(void __iomem *regbase,
+			       unsigned int bit,
+			       eGPIOIntType_t type)
+{
+	switch (type) {
+	case GPIOLevelLow:
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 0);
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 0);
+		break;
+	case GPIOLevelHigh:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 0);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 1);
+		break;
+	case GPIOEdgelFalling:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 1);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 0);
+		break;
+	case GPIOEdgelRising:
+		gpio_bit_op(regbase, GPIO_INTTYPE_LEVEL, bit, 1);
+		gpio_bit_op(regbase, GPIO_INT_POLARITY, bit, 1);
+		break;
+	}
+}
+
+static int gpio_irq_set_type(int gpio_irq, unsigned int type)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+	eGPIOIntType_t int_type = 0;
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	switch (type) {
+	case IRQ_TYPE_EDGE_RISING:
+		int_type = GPIOEdgelRising;
+		break;
+	case IRQ_TYPE_EDGE_FALLING:
+		int_type = GPIOEdgelFalling;
+		break;
+	case IRQ_TYPE_LEVEL_HIGH:
+		int_type = GPIOLevelHigh;
+		break;
+	case IRQ_TYPE_LEVEL_LOW:
+		int_type = GPIOLevelLow;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* Before set interrupt type, gpio must set input */
+	gpio_bit_op(bank->regbase, GPIO_SWPORT_DDR,
+		    offset_to_bit(gpio), GPIO_IN);
+	gpio_set_intr_type(bank->regbase, offset_to_bit(gpio), int_type);
+
+	return 0;
+}
+
+static int gpio_irq_enable(int gpio_irq)
+{
+	int gpio = irq_to_gpio(gpio_irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	gpio_irq_unmask(bank->regbase, offset_to_bit(gpio));
+
+	return 0;
+}
+
+static int gpio_irq_disable(int irq)
+{
+	int gpio = irq_to_gpio(irq);
+	struct gpio_bank *bank = gpio_to_bank(gpio);
+
+	if (!bank)
+		return -EINVAL;
+
+	gpio &= GPIO_PIN_MASK;
+	if (gpio >= bank->ngpio)
+		return -EINVAL;
+
+	gpio_irq_mask(bank->regbase, offset_to_bit(gpio));
+
+	return 0;
+}
+
+static int gpio_irq_init(void)
+{
+	struct gpio_bank *bank = NULL;
+	int i = 0;
+
+	for (i = 0; i < GPIO_BANK_NUM; i++) {
+		bank = gpio_id_to_bank(i);
+		if (bank) {
+			/* disable gpio pin interrupt */
+			writel(0, bank->regbase + GPIO_INTEN);
+
+			/* register gpio group irq handler */
+			irq_install_handler(IRQ_GPIO0 + bank->id,
+			(interrupt_handler_t *)generic_gpio_handle_irq, NULL);
+
+			/* default enable all gpio group interrupt */
+			irq_handler_enable(IRQ_GPIO0 + bank->id);
+		}
+	}
+
+	return 0;
+}
+
+static struct irq_chip gpio_irq_chip = {
+	.name		= "gpio-irq-chip",
+	.irq_init	= gpio_irq_init,
+	.irq_enable	= gpio_irq_enable,
+	.irq_disable	= gpio_irq_disable,
+	.irq_set_type	= gpio_irq_set_type,
+};
+
+struct irq_chip *arch_gpio_irq_init(void)
+{
+	return &gpio_irq_chip;
+}
diff --git a/drivers/irq/irq-gpio.h b/drivers/irq/irq-gpio.h
new file mode 100644
index 0000000000..78aa1e8adb
--- /dev/null
+++ b/drivers/irq/irq-gpio.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GPIO_H_
+#define _IRQ_GPIO_H_
+
+struct irq_chip *arch_gpio_irq_init(void);
+
+#endif /* _IRQ_GPIO_H_ */
diff --git a/include/irq-generic.h b/include/irq-generic.h
new file mode 100644
index 0000000000..6dfed10095
--- /dev/null
+++ b/include/irq-generic.h
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _IRQ_GENERIC_H
+#define _IRQ_GENERIC_H
+
+#include <asm-generic/gpio.h>
+#include <common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/*
+ * IRQ line status.
+ *
+ * IRQ_TYPE_NONE		- default, unspecified type
+ * IRQ_TYPE_EDGE_RISING		- rising edge triggered
+ * IRQ_TYPE_EDGE_FALLING	- falling edge triggered
+ * IRQ_TYPE_EDGE_BOTH		- rising and falling edge triggered
+ * IRQ_TYPE_LEVEL_HIGH		- high level triggered
+ * IRQ_TYPE_LEVEL_LOW		- low level triggered
+ * IRQ_TYPE_LEVEL_MASK		- mask to filter out the level bits
+ * IRQ_TYPE_SENSE_MASK		- mask for all the above bits
+ */
+enum {
+	IRQ_TYPE_NONE		= 0x00000000,
+	IRQ_TYPE_EDGE_RISING	= 0x00000001,
+	IRQ_TYPE_EDGE_FALLING	= 0x00000002,
+	IRQ_TYPE_EDGE_BOTH	= (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
+	IRQ_TYPE_LEVEL_HIGH	= 0x00000004,
+	IRQ_TYPE_LEVEL_LOW	= 0x00000008,
+	IRQ_TYPE_LEVEL_MASK	= (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
+	IRQ_TYPE_SENSE_MASK	= 0x0000000f,
+};
+
+/*
+ * struct irq_chip - hardware interrupt chip descriptor
+ *
+ * @name:		name for irq chip
+ * @irq_enable:		enable the interrupt (defaults to chip->unmask if NULL)
+ * @irq_disable:	disable the interrupt
+ * @irq_ack:		start of a new interrupt
+ * @irq_eoi:		end of interrupt
+ * @irq_set_type:	set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
+ */
+struct irq_chip {
+	const char	*name;
+	int		(*irq_init)(void);
+	int		(*irq_get)(void);
+	int		(*irq_enable)(int irq);
+	int		(*irq_disable)(int irq);
+	void		(*irq_ack)(int irq);
+	void		(*irq_eoi)(int irq);
+	int		(*irq_set_type)(int irq, unsigned int flow_type);
+};
+
+/* APIs for irqs */
+void irq_install_handler(int irq, interrupt_handler_t *handler, void *data);
+void irq_free_handler(int irq);
+int irq_set_irq_type(int irq, unsigned int type);
+int irq_handler_enable(int irq);
+int irq_handler_disable(int irq);
+int gpio_to_irq(struct gpio_desc *gpio);
+
+/*
+ * Assign gpio to irq directly. Don't use it without special reasons.
+ *
+ * Usage example:
+ *	int gpio0_a0, irq;
+ *
+ *	gpio = RK_IRQ_GPIO(RK_GPIO0, RK_PA0);
+ *	irq = hard_gpio_to_irq(gpio0_a0);
+ *	irq_install_handler(irq, ...);
+ */
+#define GPIO_BANK_SHIFT			8
+#define RK_IRQ_GPIO(bank, pin) 		(((bank) << GPIO_BANK_SHIFT) | (pin))
+int hard_gpio_to_irq(unsigned gpio);
+
+/* only irq-gpio.c can use it */
+void _generic_gpio_handle_irq(int irq, void *data);
+
+#endif /* _IRQ_GENERIC_H */
diff --git a/include/irq-platform.h b/include/irq-platform.h
new file mode 100644
index 0000000000..e3d16429ac
--- /dev/null
+++ b/include/irq-platform.h
@@ -0,0 +1,110 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PLAT_IRQ_H_
+#define _ROCKCHIP_PLAT_IRQ_H_
+
+#if defined(CONFIG_ROCKCHIP_RK322X)
+#define GPIO0_PHYS			0x11110000
+#define GPIO1_PHYS			0x11120000
+#define GPIO2_PHYS			0x11130000
+#define GPIO3_PHYS			0x11140000
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			83
+#define IRQ_GPIO1			84
+#define IRQ_GPIO2			85
+#define IRQ_GPIO3			86
+
+#elif defined(CONFIG_ROCKCHIP_RK3288)
+#define GPIO0_PHYS			0xFF750000
+#define GPIO1_PHYS			0xFF780000
+#define GPIO2_PHYS			0xFF790000
+#define GPIO3_PHYS			0xFF7A0000
+#define GPIO4_PHYS			0xFF7B0000
+#define GPIO5_PHYS			0xFF7C0000
+#define GPIO6_PHYS			0xFF7D0000
+#define GPIO7_PHYS			0xFF7E0000
+#define GPIO8_PHYS			0xFF7F0000
+
+#define GIC_IRQS_NR			(5 * 32)
+#define GPIO_IRQS_NR			(9 * 32)
+
+#define GPIO_BANK_NUM			9
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			113
+#define IRQ_GPIO1			114
+#define IRQ_GPIO2			115
+#define IRQ_GPIO3			116
+#define IRQ_GPIO4			117
+#define IRQ_GPIO5			118
+#define IRQ_GPIO6			119
+#define IRQ_GPIO7			120
+#define IRQ_GPIO8			121
+
+#elif defined(CONFIG_ROCKCHIP_RK3328)
+#define	GPIO0_PHYS			0xFF210000
+#define	GPIO1_PHYS			0xFF220000
+#define	GPIO2_PHYS			0xFF230000
+#define	GPIO3_PHYS			0xFF240000
+
+#define GIC_IRQS_NR			(4 * 32)
+#define GPIO_IRQS_NR			(4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			83
+#define IRQ_GPIO1			84
+#define IRQ_GPIO2			85
+#define IRQ_GPIO3			86
+
+#elif defined(CONFIG_ROCKCHIP_RK3368)
+#define GPIO0_PHYS			0xFF750000
+#define GPIO1_PHYS			0xFF780000
+#define GPIO2_PHYS			0xFF790000
+#define GPIO3_PHYS			0xFF7A0000
+
+#define GIC_IRQS_NR                     (5 * 32)
+#define GPIO_IRQS_NR                    (4 * 32)
+
+#define GPIO_BANK_NUM			4
+#define GPIO_BANK_PINS			32
+
+#define IRQ_GPIO0			113
+#define IRQ_GPIO1			114
+#define IRQ_GPIO2			115
+#define IRQ_GPIO3			116
+
+#elif defined(CONFIG_ROCKCHIP_RK3399)
+#define GPIO0_PHYS			0xFF720000
+#define GPIO1_PHYS			0xFF730000
+#define GPIO2_PHYS			0xFF780000
+#define GPIO3_PHYS			0xFF788000
+#define GPIO4_PHYS			0xFF790000
+
+#define IRQ_GPIO0			46
+#define IRQ_GPIO1			47
+#define IRQ_GPIO2			48
+#define IRQ_GPIO3			49
+#define IRQ_GPIO4			50
+
+#define GIC_IRQS_NR			(6 * 32)
+#define GPIO_IRQS_NR			(5 * 32)
+
+#define GPIO_BANK_NUM			5
+#define GPIO_BANK_PINS			32
+#else
+"Missing define RIQ relative things"
+#endif
+
+#endif /* _ROCKCHIP_PLAT_IRQ_H_ */

commit 27a50c86bac5d9665af4654f7e1d291b59fd664a
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Sep 5 15:28:15 2017 +0800

    rockchip: add a buid script
    
    This script assume that you have installed arm-linux-gnueabi for armv7
    and aarch64-linux-gnu for armv8, or you have android toolchain in ../prebuilts
    directory, otherwise please setting the correct TOOLCHAIN path that you have in
    this script.
    
    usage: ./make.sh board
    ./make.sh evb-rk3399     ---- build for evb-rk3399_defconfig
    ./make.sh firefly-rk3288 ---- build for firefly-rk3288_defconfig
    
    Change-Id: Id2b0cdee60897bd18f7d0e557429c868a83dfe49
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/make.sh b/make.sh
new file mode 100755
index 0000000000..7a355fc6ed
--- /dev/null
+++ b/make.sh
@@ -0,0 +1,30 @@
+#!/bin/sh
+BOARD=$1
+DIR=${BOARD#*-}
+DSTDIR=rockdev/${DIR}
+TOOLCHAIN=arm-linux-gnueabi-
+JOB=`sed -n "N;/processor/p" /proc/cpuinfo|wc -l`
+
+select_toolchain()
+{
+	local dst path
+	if grep  -q '^CONFIG_ARM64=y' ${DSTDIR}/out/.config ; then
+        	TOOLCHAIN=aarch64-linux-gnu-
+		dst=../prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/bin
+		if [ -d ${dst} ]; then
+			path=$(cd `dirname ${dst}`; pwd)
+			TOOLCHAIN=${path}/bin/aarch64-linux-android-
+		fi
+	else
+		dst=../prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9/bin
+		if [ -d ${dst} ]; then
+			path=$(cd `dirname ${dst}`; pwd)
+			TOOLCHAIN=${path}/bin/arm-linux-androideabi-
+		fi
+	fi
+	echo toolchain: ${TOOLCHAIN}
+}
+echo "make for ${BOARD}_defconfig by -j${JOB}"
+make ${BOARD}_defconfig O=${DSTDIR}/out
+select_toolchain
+make CROSS_COMPILE=${TOOLCHAIN}  all --jobs=${JOB} O=${DSTDIR}/out

commit 4d5d72683f48788fb2504b10bf6fc684055712c3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Tue Aug 29 17:21:04 2017 +0800

    rockchip: add bootrkp command
    
    Add support for booting system from rockchip
    format partition.
    
    Change-Id: I513d2f2f53dcb1a578447c1ea112b2e4e7c9838a
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d2b33cffb7..bd58ed93b6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -192,6 +192,12 @@ config ROCKCHIP_RESOURCE_IMAGE
 	  This enables support to get dtb or logo files from
 	  rockchip resource image format partition.
 
+config ROCKCHIP_PARTITION_BOOT
+	bool "Enable support for booting system from rockchip format partition"
+	depends on ROCKCHIP_RESOURCE_IMAGE
+	help
+	  This enables support for bootimg system from rockchip format partition
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b55985f0fb..aac2d4418d 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -26,6 +26,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
+obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/bootrkp.c b/arch/arm/mach-rockchip/bootrkp.c
new file mode 100644
index 0000000000..b9ef47fc6d
--- /dev/null
+++ b/arch/arm/mach-rockchip/bootrkp.c
@@ -0,0 +1,200 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <config.h>
+#include <linux/list.h>
+#include <malloc.h>
+#include <asm/arch/resource_img.h>
+#include "rockchip_parameter.h"
+#include "rockchip_blk.h"
+
+#define TAG_KERNEL			0x4C4E524B
+
+#define PART_MISC			"misc"
+#define PART_KERNEL			"kernel"
+#define PART_BOOT			"boot"
+#define PART_RECOVERY			"recovery"
+
+#define DTB_FILE			"rk-kernel.dtb"
+
+#define BOOTLOADER_MESSAGE_OFFSET_IN_MISC	(16 * 1024)
+#define BOOTLOADER_MESSAGE_BLK_OFFSET		(BOOTLOADER_MESSAGE_OFFSET_IN_MISC >> 9)
+
+enum android_boot_mode {
+	ANDROID_BOOT_MODE_NORMAL = 0,
+
+	/* "recovery" mode is triggered by the "reboot recovery" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "boot-recovery" in the BCB message. This mode should boot the
+	 * recovery kernel.
+	 */
+	ANDROID_BOOT_MODE_RECOVERY,
+
+	/* "bootloader" mode is triggered by the "reboot bootloader" command or
+	 * equivalent adb/fastboot command. It can also be triggered by writing
+	 * "bootonce-bootloader" in the BCB message. This mode should boot into
+	 * fastboot.
+	 */
+	ANDROID_BOOT_MODE_BOOTLOADER,
+};
+
+struct bootloader_message {
+	char command[32];
+	char status[32];
+	char recovery[768];
+
+	/*
+         * The 'recovery' field used to be 1024 bytes.  It has only ever
+	 * been used to store the recovery command line, so 768 bytes
+	 * should be plenty.  We carve off the last 256 bytes to store the
+	 * stage string (for multistage packages) and possible future
+	 * expansion.
+         */
+	char stage[32];
+	char slot_suffix[32];
+	char reserved[192];
+};
+
+struct rockchip_image {
+	uint32_t tag;
+	uint32_t size;
+	int8_t image[1];
+	uint32_t crc;
+};
+
+static int read_boot_mode_from_misc(struct blk_part *misc)
+{
+	struct bootloader_message *bmsg;
+	int size = DIV_ROUND_UP(sizeof(struct bootloader_message),
+				RK_BLK_SIZE) * RK_BLK_SIZE;
+	int ret = 0;
+
+	bmsg = memalign(ARCH_DMA_MINALIGN, size);
+	ret = blkdev_read(bmsg, misc->from + BOOTLOADER_MESSAGE_BLK_OFFSET,
+			  size >> 9);
+	if (ret < 0)
+		goto out;
+
+	if (!strcmp(bmsg->command, "boot-recovery")) {
+		printf("boot mode: recovery\n");
+		ret = ANDROID_BOOT_MODE_RECOVERY;
+	} else {
+		printf("boot mode: normal\n");
+		ret = ANDROID_BOOT_MODE_NORMAL;
+	}
+
+out:
+	free(bmsg);
+	return ret;
+}
+
+/*
+ * non-OTA packaged kernel.img & boot.img
+ * return the image size on success, and a
+ * negative value on error.
+ */
+static int read_rockchip_image(struct blk_part *part, void *dst)
+{
+	struct rockchip_image *img;
+	int header_len = 8;
+	int cnt;
+	int ret;
+
+	img = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!img) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	/* read first block with header imformation */
+	ret = blkdev_read(img, part->from, 1);
+	if (ret < 0)
+		goto err;
+	if (img->tag != TAG_KERNEL) {
+		printf("%s: invalid image tag\n", part->name);
+		goto err;
+	}
+
+	memcpy(dst, img->image, RK_BLK_SIZE - header_len);
+	/*
+	 * read the rest blks
+	 * total size  = image size + 8 bytes header + 4 bytes crc32
+	 */
+	cnt = DIV_ROUND_UP(img->size + 8 + 4, RK_BLK_SIZE);
+	ret = blkdev_read(dst + RK_BLK_SIZE - header_len,
+			  part->from + 1, cnt - 1);
+	if (!ret)
+		ret = img->size;
+err:
+	free(img);
+	return ret;
+}
+
+static int do_bootrkp(cmd_tbl_t *cmdtp, int flag, int argc,
+		      char * const argv[])
+{
+	ulong fdt_addr_r = env_get_ulong("fdt_addr_r", 16, 0);
+	ulong ramdisk_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0);
+	ulong kernel_addr_r = env_get_ulong("kernel_addr_r", 16, 0x480000);
+	struct blk_part *boot;
+	struct blk_part *kernel;
+	struct blk_part *misc;
+	int ramdisk_size;
+	int kernel_size;
+	int fdt_size;
+	int boot_mode;
+	int ret = 0;
+	char cmdbuf[64];
+
+	misc = rockchip_get_blk_part(PART_MISC);
+	if (misc)
+		boot_mode = read_boot_mode_from_misc(misc);
+	else
+		boot_mode = ANDROID_BOOT_MODE_RECOVERY;
+
+	if (boot_mode == ANDROID_BOOT_MODE_RECOVERY)
+		boot = rockchip_get_blk_part(PART_RECOVERY);
+	else
+		boot = rockchip_get_blk_part(PART_BOOT);
+	kernel = rockchip_get_blk_part(PART_KERNEL);
+
+	if (!kernel || !boot) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	kernel_size = read_rockchip_image(kernel, (void *)kernel_addr_r);
+	if (kernel_size < 0) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	ramdisk_size = read_rockchip_image(boot, (void *)ramdisk_addr_r);
+	if (ramdisk_size < 0) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	fdt_size = rockchip_read_resource_file((void *)fdt_addr_r, DTB_FILE, 0, 0);
+	if (fdt_size < 0) {
+		ret = CMD_RET_FAILURE;
+		goto out;
+	}
+
+	printf("kernel_size:0x%ulx ramdisk_size:0x%x\n", kernel_size, ramdisk_size);
+	sprintf(cmdbuf, "booti 0x%lx 0x%lx:0x%x 0x%lx",
+		kernel_addr_r, ramdisk_addr_r, ramdisk_size, fdt_addr_r);
+	run_command(cmdbuf, 0);
+out:
+	return ret;
+}
+
+U_BOOT_CMD(
+	bootrkp,  CONFIG_SYS_MAXARGS,     1,      do_bootrkp,
+	"boot Linux Image image from rockchip partition storage",
+	""
+);

commit 08dcd37c063a8e4bf7d302c7b128af3d070b4e8b
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 4 16:44:32 2017 +0800

    rockchip: add rockchip resource image support
    
    Rockchip resource image is used to store dtb
    and logos for different usages. This patch adds
    support to read the files(dtb or logo)stored in
    resource image format partition.
    
    Change-Id: I65982d340ff4573e5b543965d3857a2c66db8bb9
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/resource_img.h b/arch/arm/include/asm/arch-rockchip/resource_img.h
new file mode 100644
index 0000000000..af4596250a
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/resource_img.h
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __RESC_IMG_H_
+#define __RESC_IMG_H_
+
+/*
+ * read file from resource partition
+ * @buf: destination buf to store file data;
+ * @name: file name
+ * @offset: blocks offset in the file, 1 block = 512 bytes
+ * @len: the size(by bytes) of file to read.
+ */
+int rockchip_read_resource_file(void *buf, const char *name,
+				int offset, int len);
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b122267cf6..d2b33cffb7 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -185,6 +185,13 @@ config ROCKCHIP_PARAM
 	  This enable support to get partition from rockchip
 	  parameter
 
+config ROCKCHIP_RESOURCE_IMAGE
+	bool "Enable support for rockchip resource image"
+	depends on ROCKCHIP_PARAM
+	help
+	  This enables support to get dtb or logo files from
+	  rockchip resource image format partition.
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 91600eb52a..b55985f0fb 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -25,6 +25,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
+obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/resource_img.c b/arch/arm/mach-rockchip/resource_img.c
new file mode 100644
index 0000000000..9a5d46fff9
--- /dev/null
+++ b/arch/arm/mach-rockchip/resource_img.c
@@ -0,0 +1,242 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <malloc.h>
+#include <linux/list.h>
+#include <asm/arch/resource_img.h>
+#include "rockchip_parameter.h"
+#include "rockchip_blk.h"
+
+#define PART_RESOURCE			"resource"
+#define RESOURCE_MAGIC			"RSCE"
+#define RESOURCE_MAGIC_SIZE		4
+#define RESOURCE_VERSION		0
+#define CONTENT_VERSION			0
+#define ENTRY_TAG			"ENTR"
+#define ENTRY_TAG_SIZE			4
+#define MAX_FILE_NAME_LEN		256
+
+/*
+ *         resource image structure
+ * ----------------------------------------------
+ * |                                            |
+ * |    header  (1 block)                       |
+ * |                                            |
+ * ---------------------------------------------|
+ * |                      |                     |
+ * |    entry0  (1 block) |                     |
+ * |                      |                     |
+ * ------------------------                     |
+ * |                      |                     |
+ * |    entry1  (1 block) | contents (n blocks) |
+ * |                      |                     |
+ * ------------------------                     |
+ * |    ......            |                     |
+ * ------------------------                     |
+ * |                      |                     |
+ * |    entryn  (1 block) |                     |
+ * |                      |                     |
+ * ----------------------------------------------
+ * |                                            |
+ * |    file0  (x blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ * |                                            |
+ * |    file1  (y blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ * |                   ......                   |
+ * |---------------------------------------------
+ * |                                            |
+ * |    filen  (z blocks)                       |
+ * |                                            |
+ * ----------------------------------------------
+ */
+
+/**
+ * struct resource_image_header
+ *
+ * @magic: should be "RSCE"
+ * @version: resource image version, current is 0
+ * @c_version: content version, current is 0
+ * @blks: the size of the header ( 1 block = 512 bytes)
+ * @c_offset: contents offset(by block) in the image
+ * @e_blks: the size(by block) of the entry in the contents
+ * @e_num: numbers of the entrys.
+ */
+
+struct resource_img_hdr {
+	char		magic[4];
+	uint16_t	version;
+	uint16_t	c_version;
+	uint8_t		blks;
+	uint8_t		c_offset;
+	uint8_t		e_blks;
+	uint32_t	e_nums;
+};
+
+struct resource_entry {
+	char		tag[4];
+	char		name[MAX_FILE_NAME_LEN];
+	uint32_t	f_offset;
+	uint32_t	f_size;
+};
+
+struct resource_file {
+	char		name[MAX_FILE_NAME_LEN];
+	uint32_t	f_offset;
+	uint32_t	f_size;
+	struct list_head link;
+};
+
+static struct blk_part *rsce_blk;
+
+static LIST_HEAD(entrys_head);
+
+static int resource_image_check_header(const struct resource_img_hdr *hdr)
+{
+	int ret;
+
+	ret = memcmp(RESOURCE_MAGIC, hdr->magic, RESOURCE_MAGIC_SIZE);
+	if (ret) {
+		printf("bad resource image magic\n");
+		ret = -EINVAL;
+	}
+	debug("resource image header:\n");
+	debug("magic:%s\n", hdr->magic);
+	debug("version:%d\n", hdr->version);
+	debug("c_version:%d\n", hdr->c_version);
+	debug("blks:%d\n", hdr->blks);
+	debug("c_offset:%d\n", hdr->c_offset);
+	debug("e_blks:%d\n", hdr->e_blks);
+	debug("e_num:%d\n", hdr->e_nums);
+
+	return ret;
+}
+
+static int add_file_to_list(struct resource_entry *entry)
+{
+	struct resource_file *file;
+
+	if (memcmp(entry->tag, ENTRY_TAG, ENTRY_TAG_SIZE)) {
+		printf("invalid entry tag\n");
+		return -ENOENT;
+	}
+	file = malloc(sizeof(*file));
+	if (!file) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+	strcpy(file->name, entry->name);
+	file->f_offset = entry->f_offset;
+	file->f_size = entry->f_size;
+	list_add_tail(&file->link, &entrys_head);
+	debug("entry:%p  %s offset:%d size:%d\n",
+	      entry, file->name, file->f_offset, file->f_size);
+
+	return 0;
+}
+
+static int read_file_info_from_blk_dev(void)
+{
+	struct resource_img_hdr *hdr;
+	struct resource_entry *entry;
+	void *content;
+	int size;
+	int ret;
+	int e_num;
+
+	rsce_blk = rockchip_get_blk_part(PART_RESOURCE);
+	if (!rsce_blk) {
+		printf("no resource partition found\n");
+		return  -ENODEV;
+	}
+
+	hdr = memalign(ARCH_DMA_MINALIGN, RK_BLK_SIZE);
+	if (!hdr) {
+		printf("out of memory!\n");
+		return -ENOMEM;
+	}
+
+	ret = blkdev_read(hdr, rsce_blk->from, 1);
+	if (ret < 0)
+		goto out;
+	ret = resource_image_check_header(hdr);
+	if (ret < 0)
+		goto out;
+	content = memalign(ARCH_DMA_MINALIGN,
+			   hdr->e_blks * hdr->e_nums * RK_BLK_SIZE);
+	if (!content) {
+		printf("alloc memory for content failed\n");
+		goto out;
+	}
+	ret = blkdev_read(content, rsce_blk->from + hdr->c_offset,
+			  hdr->e_blks * hdr->e_nums);
+	if (ret < 0)
+		goto err;
+
+	for (e_num = 0; e_num < hdr->e_nums; e_num++) {
+		size = e_num * hdr->e_blks * RK_BLK_SIZE;
+		entry = (struct resource_entry *)(content + size);
+		add_file_to_list(entry);
+	}
+
+err:
+	free(content);
+out:
+	free(hdr);
+
+	return 0;
+}
+
+static struct resource_file *get_file_info(struct resource_img_hdr *hdr,
+					   const void *content,
+					   const char *name)
+{
+	struct resource_file *file;
+	struct list_head *node;
+
+	if (list_empty(&entrys_head))
+		read_file_info_from_blk_dev();
+
+	list_for_each(node, &entrys_head) {
+		file = list_entry(node, struct resource_file, link);
+		if (!strcmp(file->name, name))
+			return file;
+	}
+
+	return NULL;
+}
+
+/*
+ * read file from resource partition
+ * @buf: destination buf to store file data;
+ * @name: file name
+ * @offset: blocks offset in the file, 1 block = 512 bytes
+ * @len: the size(by bytes) of file to read.
+ */
+int rockchip_read_resource_file(void *buf, const char *name,
+				int offset, int len)
+{
+	struct resource_file *file;
+	int ret = 0;
+	int blks;
+
+	file = get_file_info(NULL, NULL, name);
+	if (!file) {
+		printf("Can't find file:%s\n", name);
+		return -ENOENT;
+	}
+
+	if (len <= 0 || len > file->f_size)
+		len = file->f_size;
+	blks = DIV_ROUND_UP(len, RK_BLK_SIZE);
+	ret = blkdev_read(buf, rsce_blk->from + file->f_offset + offset, blks);
+	if (!ret)
+		ret = len;
+
+	return ret;
+}

commit fb11f32b79b7fcbac77e4d9fddb18aa94b37ecad
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 18 20:28:14 2017 +0800

    rockchip: add support to parse partition from rockchip parameter
    
    This patch add support to parse block device partiton from
    rockchip parameter.
    
    Change-Id: I563211ba58cf333ae4a732dfa5432f30b8587c61
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index eb8dab3f94..b122267cf6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -178,6 +178,13 @@ config ROCKCHIP_BLOCK_API
 	  This enable read access to block device on
 	  rockchip platform.
 
+config ROCKCHIP_PARAM
+	bool "Rockchip parameter support"
+	depends on ROCKCHIP_BLOCK_API
+	help
+	  This enable support to get partition from rockchip
+	  parameter
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index dfce57a053..91600eb52a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -24,6 +24,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
+obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.c b/arch/arm/mach-rockchip/rockchip_parameter.c
new file mode 100644
index 0000000000..c33d10c925
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_parameter.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include "rockchip_parameter.h"
+#include "rockchip_blk.h"
+
+#define MAX_PARAM_SIZE			(1024 * 64)
+
+struct rockchip_param {
+	u32 tag;
+	u32 length;
+	char params[1];
+	u32 crc;
+};
+
+static LIST_HEAD(parts_head);
+
+static int rockchip_param_parse(char *param)
+{
+	struct blk_part *part;
+	const char *cmdline = strstr(param, "CMDLINE:");
+	const char *blkdev_parts = strstr(cmdline, "mtdparts");
+	const char *blkdev_def = strchr(blkdev_parts, ':') + 1;
+	char *next = (char *)blkdev_def;
+	char *pend;
+	int len;
+	unsigned long size, from;
+
+	debug("%s", cmdline);
+
+	env_set("bootargs", cmdline);
+
+	while (*next) {
+		if (*next == '-') {
+			size = (~0UL);
+			next++;
+		} else {
+			size = simple_strtoul(next, &next, 16);
+		}
+		next++;
+		from = simple_strtoul(next, &next, 16);
+		next++;
+		pend =  strchr(next, ')');
+		if (!pend)
+			break;
+		len = min_t(int, pend - next, PART_NAME_SIZE);
+		part = malloc(sizeof(*part));
+		if (!part) {
+			printf("out of memory\n");
+			break;
+		}
+		part->from = from + RK_BLK_OFFSET;
+		part->size = size;
+		strncpy(part->name, next, len);
+		part->name[len] = '\0';
+		next = strchr(next, ',');
+		next++;
+		list_add_tail(&part->node, &parts_head);
+		debug("0x%lx@0x%lx(%s)\n", part->size, part->from, part->name);
+	}
+
+	return 0;
+}
+
+static int rockchip_init_param(void)
+{
+	struct rockchip_param *param;
+
+	param = memalign(ARCH_DMA_MINALIGN, MAX_PARAM_SIZE);
+	if (!param) {
+		printf("out of memory\n");
+		return -ENOMEM;
+	}
+
+	blkdev_read(param, RK_BLK_OFFSET, MAX_PARAM_SIZE >> 9);
+
+	rockchip_param_parse(param->params);
+
+	return 0;
+}
+
+struct blk_part *rockchip_get_blk_part(const char *name)
+{
+	struct blk_part *part;
+	struct list_head *node;
+
+	if (list_empty(&parts_head))
+		rockchip_init_param();
+
+	list_for_each(node, &parts_head) {
+		part = list_entry(node, struct blk_part, node);
+		if (!strcmp(part->name, name))
+			return part;
+	}
+
+	return NULL;
+}
+
+
diff --git a/arch/arm/mach-rockchip/rockchip_parameter.h b/arch/arm/mach-rockchip/rockchip_parameter.h
new file mode 100644
index 0000000000..b77a1599d9
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_parameter.h
@@ -0,0 +1,25 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _ROCKCHIP_PARAMS_H_
+#define _ROCKCHIP_PARAMS_H_
+
+#include <linux/list.h>
+
+#define RK_BLK_OFFSET			0x2000
+#define PART_NAME_SIZE			32
+#define RK_BLK_SIZE			(1 << 9)
+
+struct blk_part {
+	char name[PART_NAME_SIZE];
+	unsigned long from;
+	unsigned long size;
+	struct list_head node;
+};
+
+struct blk_part *rockchip_get_blk_part(const char *name);
+
+#endif

commit f4ee26b1d6a65437ac6bb2e3a8437f2cea6e8ec3
Author: Andy Yan <andy.yan@rock-chips.com>
Date:   Mon Sep 18 20:27:10 2017 +0800

    rockchip: add blk read api
    
    Add api to read data from block device
    
    Change-Id: Ic5bf4410d826b188ff840a3ef053d0fde548e039
    Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index e1bc947d68..eb8dab3f94 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -172,6 +172,12 @@ config ROCKCHIP_BROM_HELPER
 config SPL_MMC_SUPPORT
 	default y if !SPL_ROCKCHIP_BACK_TO_BROM
 
+config ROCKCHIP_BLOCK_API
+	bool "Rockchip block device api support"
+	help
+	  This enable read access to block device on
+	  rockchip platform.
+
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 source "arch/arm/mach-rockchip/rk3188/Kconfig"
 source "arch/arm/mach-rockchip/rk322x/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 5ef09383ac..dfce57a053 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -23,6 +23,7 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-$(CONFIG_ROCKCHIP_BLOCK_API) += blk.o
 obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
 obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
diff --git a/arch/arm/mach-rockchip/blk.c b/arch/arm/mach-rockchip/blk.c
new file mode 100644
index 0000000000..beeb63719f
--- /dev/null
+++ b/arch/arm/mach-rockchip/blk.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <mmc.h>
+#include "rockchip_blk.h"
+
+static struct mmc *mmc;
+
+struct mmc *mmcblk_dev_init(int dev)
+{
+	struct mmc *mmcdev;
+
+	mmcdev = find_mmc_device(dev);
+	if (!mmcdev) {
+		printf("no mmc device at slot %x\n", dev);
+		return NULL;
+	}
+
+	if (mmc_init(mmcdev))
+		return NULL;
+
+	return mmcdev;
+}
+
+static int mmcblk_read(struct mmc *mmcdev, void *buffer, u32 blk, u32 cnt)
+{
+	u32 n;
+	ulong start = (ulong)buffer;
+
+	debug("\nMMC read: block # 0x%x, count 0x%x  to %p... ", blk, cnt, buffer);
+
+	n = blk_dread(mmc_get_blk_desc(mmcdev), blk, cnt, buffer);
+	/* invalidate cache after read via dma */
+	invalidate_dcache_range(start, start + cnt * 512);
+	debug("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR");
+
+	return (n == cnt) ? 0 : -EIO;
+}
+
+
+int blkdev_read(void *buffer, u32 blk, u32 cnt)
+{
+	if (!mmc) {
+		mmc = mmcblk_dev_init(env_get_ulong("mmcdev", 10, 0));
+		if (!mmc)
+			return -ENODEV;
+	}
+
+	return mmcblk_read(mmc, buffer, blk, cnt);
+}
diff --git a/arch/arm/mach-rockchip/rockchip_blk.h b/arch/arm/mach-rockchip/rockchip_blk.h
new file mode 100644
index 0000000000..3e1483e708
--- /dev/null
+++ b/arch/arm/mach-rockchip/rockchip_blk.h
@@ -0,0 +1,6 @@
+#ifndef __RK_BLK_H_
+#define __RK_BLK_H_
+
+int blkdev_read(void *buffer, u32 blk, u32 cnt);
+
+#endif

commit 46326550dc17cfbb1d003d726c8df4f152a77300
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 10:05:26 2017 +0800

    rockchip: dts: rk3328-evb: add i2c1 and rk805 nodes
    
    add i2c1 and rk805 nodes to support rk805 init setting.
    
    Change-Id: Ic5074f17d492af8a2b9cc08584592327c67a4466
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 8a14c653e4..f71690f643 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -87,3 +87,121 @@
 	vbus-supply = <&vcc5v0_host_xhci>;
 	status = "okay";
 };
+
+&i2c1 {
+	clock-frequency = <400000>;
+	i2c-scl-rising-time-ns = <168>;
+	i2c-scl-falling-time-ns = <4>;
+	status = "okay";
+
+	rk805: pmic@18 {
+		compatible = "rockchip,rk805";
+		status = "okay";
+		reg = <0x18>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		gpio-controller;
+		#gpio-cells = <2>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-name = "vdd_logic";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-ramp-delay = <6001>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vdd_18: LDO_REG1 {
+				regulator-name = "vdd_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_18emmc: LDO_REG2 {
+				regulator-name = "vcc_18emmc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10: LDO_REG3 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+};
+
+&pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+		rockchip,pins =
+			<2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;	/* gpio2_a6 */
+		};
+	};
+};
+

commit bb20e97e9ee1009edaec026d48f3e34c1a23ecfc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 10:02:35 2017 +0800

    configs: rk3328: add support for pmic rk8xx and regulator and i2c driver
    
    Add defconfig for rk8xx and regulator and i2c controller.
    
    Change-Id: I3ea25c7f5c10ef952a3dd32a026d95e17ff3f536
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 7bec001786..6d0f3af7a3 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -22,12 +22,18 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3328=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0xFF130000

commit 4b6f5dc9ea3bf70bcbf9e58f158ff892fd2903bc
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 10:01:47 2017 +0800

    power: pmic: rk805: support rk805 pmic
    
    Change-Id: I2d757eb748e5903e0287557f3c6a64b8e3c89596
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 0fdea95046..f2a2f07de7 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -99,6 +99,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 };
 
 static const struct udevice_id rk8xx_ids[] = {
+	{ .compatible = "rockchip,rk805" },
 	{ .compatible = "rockchip,rk808" },
 	{ .compatible = "rockchip,rk816" },
 	{ .compatible = "rockchip,rk818" },
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index cf3566e2d8..6d4a243855 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -117,6 +117,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		switch (num) {
 		case 0:
@@ -159,6 +160,7 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
 	int ret = 0;
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (buck >= 4) {
 			mask = 1 << (buck - 4);
@@ -187,6 +189,7 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (buck >= 4) {
 			buck -= 4;
@@ -231,6 +234,7 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		return &rk816_ldo[num];
 	case RK818_ID:
@@ -247,6 +251,7 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
 	int ret = 0;
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (ldo >= 4) {
 			mask = 1 << (ldo - 4);
@@ -275,6 +280,7 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
 	int ret = 0;
 
 	switch (priv->variant) {
+	case RK805_ID:
 	case RK816_ID:
 		if (ldo >= 4) {
 			ldo -= 4;
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 8e821c3fc3..b1482b78ce 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -178,6 +178,7 @@ enum {
 };
 
 enum {
+	RK805_ID = 0x8050,
 	RK808_ID = 0x0000,
 	RK816_ID = 0x8160,
 	RK818_ID = 0x8180,

commit 5e1bceea9e1cc94db6d5b08b34f382aa47846da8
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 09:56:47 2017 +0800

    power: pmic: rk816: support rk816 pmic
    
    Change-Id: I609eef4efe25833d3d878a74931ca240365faa30
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index eb3ec0f601..0fdea95046 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -100,6 +100,7 @@ static struct dm_pmic_ops rk8xx_ops = {
 
 static const struct udevice_id rk8xx_ids[] = {
 	{ .compatible = "rockchip,rk808" },
+	{ .compatible = "rockchip,rk816" },
 	{ .compatible = "rockchip,rk818" },
 	{ }
 };
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 76fc2eff60..cf3566e2d8 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -48,6 +48,21 @@ static const struct rk8xx_reg_info rk808_buck[] = {
 	{ 1800000, 100000, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk816_buck[] = {
+	/* buck 1 */
+	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000, 0, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	/* buck 2 */
+	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 1800000, 200000, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	{ 2300000, 0, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
+	/* buck 3 */
+	{ 712500, 12500, -1, RK818_BUCK_VSEL_MASK, },
+	/* buck 4 */
+	{ 800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, },
+};
+
 static const struct rk8xx_reg_info rk818_buck[] = {
 	{ 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, },
 	{ 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, },
@@ -67,6 +82,15 @@ static const struct rk8xx_reg_info rk808_ldo[] = {
 	{ 1800000, 100000, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, },
 };
 
+static const struct rk8xx_reg_info rk816_ldo[] = {
+	{ 800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, },
+	{ 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, },
+};
+
 static const struct rk8xx_reg_info rk818_ldo[] = {
 	{ 1800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, },
 	{ 1800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, },
@@ -88,10 +112,24 @@ static const uint rk818_chrg_shutdown_vsel_array[] = {
 };
 
 static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
-					     int num)
+						 int num, int uvolt)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
 	switch (priv->variant) {
+	case RK816_ID:
+		switch (num) {
+		case 0:
+		case 1:
+			if (uvolt <= 1450000)
+				return &rk816_buck[num * 3 + 0];
+			else if (uvolt <= 2200000)
+				return &rk816_buck[num * 3 + 1];
+			else
+				return &rk816_buck[num * 3 + 2];
+		default:
+			return &rk816_buck[num + 4];
+		}
 	case RK818_ID:
 		return &rk818_buck[num];
 	default:
@@ -101,7 +139,7 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
 
 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 {
-	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck - 1);
+	const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
 	int mask = info->vsel_mask;
 	int val;
 
@@ -114,23 +152,76 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
 	return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
 }
 
+static int _buck_get_enable(struct udevice *pmic, int buck)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK816_ID:
+		if (buck >= 4) {
+			mask = 1 << (buck - 4);
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2);
+		} else {
+			mask = 1 << buck;
+			ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1);
+		}
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		ret = pmic_reg_read(pmic, REG_DCDC_EN);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	return ret & mask ? true : false;
+}
+
+
 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
 {
-	uint mask;
+	uint mask, value, en_reg;
 	int ret;
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
 
-	buck--;
-	mask = 1 << buck;
-	if (enable) {
-		ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 0, 3 << (buck * 2));
-		if (ret)
-			return ret;
-		ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 1 << buck, 0);
-		if (ret)
-			return ret;
+	switch (priv->variant) {
+	case RK816_ID:
+		if (buck >= 4) {
+			buck -= 4;
+			en_reg = RK816_REG_DCDC_EN2;
+		} else {
+			en_reg = RK816_REG_DCDC_EN1;
+		}
+		if (enable)
+			value = ((1 << buck) | (1 << (buck + 4)));
+		else
+			value = ((0 << buck) | (1 << (buck + 4)));
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
+
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << buck;
+		if (enable) {
+			ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX,
+					      0, 3 << (buck * 2));
+			if (ret)
+				return ret;
+			ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT,
+					      1 << buck, 0);
+			if (ret)
+				return ret;
+		}
+		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
+				      enable ? mask : 0);
+		break;
+	default:
+		ret = -EINVAL;
 	}
 
-	return pmic_clrsetbits(pmic, REG_DCDC_EN, mask, enable ? mask : 0);
+	return ret;
 }
 
 #ifdef ENABLE_DRIVER
@@ -138,7 +229,10 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 					     int num)
 {
 	struct rk8xx_priv *priv = dev_get_priv(pmic);
+
 	switch (priv->variant) {
+	case RK816_ID:
+		return &rk816_ldo[num];
 	case RK818_ID:
 		return &rk818_ldo[num];
 	default:
@@ -146,10 +240,70 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
 	}
 }
 
+static int _ldo_get_enable(struct udevice *pmic, int ldo)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask = 0;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK816_ID:
+		if (ldo >= 4) {
+			mask = 1 << (ldo - 4);
+			ret = pmic_reg_read(pmic, RK816_REG_LDO_EN2);
+		} else {
+			mask = 1 << ldo;
+			ret = pmic_reg_read(pmic, RK816_REG_LDO_EN1);
+		}
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		ret = pmic_reg_read(pmic, REG_LDO_EN);
+		if (ret < 0)
+			return ret;
+		break;
+	}
+	return ret & mask ? true : false;
+}
+
+
+static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
+{
+	struct rk8xx_priv *priv = dev_get_priv(pmic);
+	uint mask, value, en_reg;
+	int ret = 0;
+
+	switch (priv->variant) {
+	case RK816_ID:
+		if (ldo >= 4) {
+			ldo -= 4;
+			en_reg = RK816_REG_LDO_EN2;
+		} else {
+			en_reg = RK816_REG_LDO_EN1;
+		}
+		if (enable)
+			value = ((1 << ldo) | (1 << (ldo + 4)));
+		else
+			value = ((0 << ldo) | (1 << (ldo + 4)));
+
+		ret = pmic_reg_write(pmic, en_reg, value);
+		break;
+	case RK808_ID:
+	case RK818_ID:
+		mask = 1 << ldo;
+		ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
+				       enable ? mask : 0);
+		break;
+	}
+
+	return ret;
+}
+
 static int buck_get_value(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
-	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck);
+	const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
 	int mask = info->vsel_mask;
 	int ret, val;
 
@@ -165,14 +319,14 @@ static int buck_get_value(struct udevice *dev)
 
 static int buck_set_value(struct udevice *dev, int uvolt)
 {
-	int buck = dev->driver_data;
+	int buck = dev->driver_data - 1;
 
 	return _buck_set_value(dev->parent, buck, uvolt);
 }
 
 static int buck_set_enable(struct udevice *dev, bool enable)
 {
-	int buck = dev->driver_data;
+	int buck = dev->driver_data - 1;
 
 	return _buck_set_enable(dev->parent, buck, enable);
 }
@@ -180,16 +334,8 @@ static int buck_set_enable(struct udevice *dev, bool enable)
 static int buck_get_enable(struct udevice *dev)
 {
 	int buck = dev->driver_data - 1;
-	int ret;
-	uint mask;
-
-	mask = 1 << buck;
 
-	ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
-	if (ret < 0)
-		return ret;
-
-	return ret & mask ? true : false;
+	return _buck_get_enable(dev->parent, buck);
 }
 
 static int ldo_get_value(struct udevice *dev)
@@ -228,27 +374,15 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
 	int ldo = dev->driver_data - 1;
-	uint mask;
-
-	mask = 1 << ldo;
 
-	return pmic_clrsetbits(dev->parent, REG_LDO_EN, mask,
-			       enable ? mask : 0);
+	return _ldo_set_enable(dev->parent, ldo, enable);
 }
 
 static int ldo_get_enable(struct udevice *dev)
 {
 	int ldo = dev->driver_data - 1;
-	int ret;
-	uint mask;
-
-	mask = 1 << ldo;
 
-	ret = pmic_reg_read(dev->parent, REG_LDO_EN);
-	if (ret < 0)
-		return ret;
-
-	return ret & mask ? true : false;
+	return _ldo_get_enable(dev->parent, ldo);
 }
 
 static int switch_set_enable(struct udevice *dev, bool enable)
diff --git a/include/power/rk8xx_pmic.h b/include/power/rk8xx_pmic.h
index 47a6b36e7e..8e821c3fc3 100644
--- a/include/power/rk8xx_pmic.h
+++ b/include/power/rk8xx_pmic.h
@@ -171,8 +171,15 @@ enum {
 };
 
 enum {
-	RK805_ID = 0x8050,
+	RK816_REG_DCDC_EN1 = 0x23,
+	RK816_REG_DCDC_EN2,
+	RK816_REG_LDO_EN1 = 0x27,
+	RK816_REG_LDO_EN2,
+};
+
+enum {
 	RK808_ID = 0x0000,
+	RK816_ID = 0x8160,
 	RK818_ID = 0x8180,
 };
 

commit 4d786a237a928bdc25060dfff0cff4f68d2c18e1
Author: Elaine Zhang <zhangqing@rock-chips.com>
Date:   Fri Sep 8 09:52:12 2017 +0800

    rockchip: i2c: rk3328: support i2c for rk3328 SoC
    
    Change-Id: Ibef0a50ed34f8a38a6aada8b4bb703a8b1f794d7
    Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 68e66536e4..a051893c4a 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -396,6 +396,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
 	{ .compatible = "rockchip,rk3066-i2c" },
 	{ .compatible = "rockchip,rk3188-i2c" },
 	{ .compatible = "rockchip,rk3288-i2c" },
+	{ .compatible = "rockchip,rk3328-i2c" },
 	{ .compatible = "rockchip,rk3399-i2c" },
 	{ }
 };

commit c3488198635ec48e03a0ec5c30f6a4bad5682f15
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 15:18:17 2017 +0800

    rockchip: rk3399: init CPU clock when rkclk_init()
    
    Init the CPU and its buses to speed up the boot time.
    
    Change-Id: Ib56f641eb789bb87a67b04f781e879b8dcd847a5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 7232806724..d4a5f3ba53 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -403,6 +403,7 @@ static void rkclk_init(struct rk3399_cru *cru)
 	u32 hclk_div;
 	u32 pclk_div;
 
+	rk3399_configure_cpu(cru, APLL_L_600_MHZ);
 	/*
 	 * some cru registers changed by bootrom, we'd better reset them to
 	 * reset/default values described in TRM to avoid confusion in kernel.

commit b67be560b3e1231b3403faa7a6887499bdee4fa7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 16:08:28 2017 +0800

    rockchip: rock-rk3188: do not use ARCH_MEMSET in TPL
    
    This patch is to fix error in build TPL:
    common/init/built-in.o: In function `board_init_f_init_reserve':
    common/init/board_init.c:111: undefined reference to `memset'
    
    Change-Id: I9893987e26a86927d1628519d257d62f3a9ceaf9
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index aaf27751d4..cd7b36b5a7 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 # CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ROCKCHIP_RK3188=y

commit f9c699b5c4dd8da61fd76b3483dcff14b6ee3230
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 13 09:32:35 2017 +0800

    rockchip: enable TPL_SYSRESET for all rockchip SoCs
    
    With Makefiles testing for $(SPL_TPL_)SYSRESET, we need TPL_SYSRESET
    for do_reset() in TPL for Rockchip SoCs.
    
    References: 87c16d4 "drivers: spl: consistently use the $(SPL_TPL_)
    macro"
    
    Change-Id: Ib4509b01e9efb4503552345efccc94e79fb0c12b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 69749d2806..6ef2db3188 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1118,6 +1118,7 @@ config ARCH_ROCKCHIP
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT
 	imply SPL_SYSRESET
+	imply TPL_SYSRESET
 
 config TARGET_THUNDERX_88XX
 	bool "Support ThunderX 88xx"

commit e6cf1f43f0547ef5eda4ce3bb2a4c8d4687e1238
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 17:02:56 2017 +0800

    spl: optee: add support for Rockchip customize optee
    
    Rockchip change the parameter to r1 instead of lr.
    
    Change-Id: I675e3be2a8a80c548117e449f72f70888d1b4191
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
index 4f7f8ba474..64b24956ee 100644
--- a/common/spl/spl_optee.S
+++ b/common/spl/spl_optee.S
@@ -9,5 +9,6 @@
 
 ENTRY(spl_optee_entry)
 	ldr lr, =CONFIG_SYS_TEXT_BASE
+	ldr r1, =CONFIG_SYS_TEXT_BASE
 	mov pc, r3
 ENDPROC(spl_optee_entry)

commit f3c945a623ee2bce3a79b0cc797897b04887b0ce
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 16:07:00 2017 +0800

    rockchip: rk3288: add timer_init() for u-boot
    
    If we do not enable the SPL, we need enable the timer for U-Boot.
    
    Change-Id: I6d39f7a68e345ea36fbb624c43db5be630fa817b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 535f871799..9ec1d420a2 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -16,6 +16,7 @@
 #include <asm/arch/pmu_rk3288.h>
 #include <asm/arch/qos_rk3288.h>
 #include <asm/arch/boot_mode.h>
+#include <asm/arch/timer.h>
 #include <asm/gpio.h>
 #include <dm/pinctrl.h>
 #include <dt-bindings/clock/rk3288-cru.h>
@@ -162,6 +163,8 @@ int board_init(void)
 	struct udevice *pinctrl;
 	int ret;
 
+	rockchip_timer_init();
+
 	/*
 	 * We need to implement sdcard iomux here for the further
 	 * initlization, otherwise, it'll hit sdcard command sending

commit 1dd6e3818ac62e8566ac4c07e6c341180319d5ca
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Tue Sep 6 15:27:27 2016 +0800

    rockchip: provide CONFIG_ROCKCHIP_SPL macro for convenience
    
    Rockchip also provide some SPL binary for some SoCs, it's responsible
    for the SDRAM initialization, and load U-Boot to SDRAM.
    
    We can use CONFIG_ROCKCHIP_SPL in case want to use Rockchip's SPL
    binary.
    
    mkimage:
    
    dd if=tools/rk_tools/bin/rk32/rk3288_ddr_400MHz_v1.03.bin
    of=spl.bin bs=4 skip=1 && tools/mkimage -n rk3288 -T rksd -d spl.bin
    rk3288_uboot.img && cat u-boot-dtb.bin >> rk3288_uboot.img
    
    Change-Id: Icf918d02d5ae3fbbe3ddcb87e1b4930ec4cd141c
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index 53cc9a0dcd..9da8c8109d 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -129,6 +129,14 @@ config SPL_LIBGENERIC_SUPPORT
 config SPL_SERIAL_SUPPORT
 	default y
 
+config ROCKCHIP_SPL
+	bool "Use Rockchip's SPL binary"
+	select ROCKCHIP_SPL_BACK_TO_BROM
+	help
+	  Rockchip has provide a SPL binary to configure DDR device instead of
+	  open source u-boot-spl binary, which can autodetect DDR deivce type and
+	  initialize.
+
 source "board/chipspark/popmetal_rk3288/Kconfig"
 
 source "board/firefly/firefly-rk3288/Kconfig"

commit b7b8d0a683d7dec418c94b725f5fb09c009e24b9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 15:52:07 2017 +0800

    spl: stash bootstage info before jump to next stage
    
    Since we may jump to next stage like ATF/OP-TEE instead of U-Boot,
    we need to stash the bootstage info before it.
    
    Change-Id: I4de48f95291be638cc57be25c2bc27f526d9f9f0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index 85e2e887c9..d156e74533 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -424,6 +424,15 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
 	      gd->malloc_ptr / 1024);
 #endif
+#ifdef CONFIG_BOOTSTAGE_STASH
+	int ret;
+
+	bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl");
+	ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
+			      CONFIG_BOOTSTAGE_STASH_SIZE);
+	if (ret)
+		debug("Failed to stash bootstage: err=%d\n", ret);
+#endif
 
 	if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
 		debug("loaded - jumping to U-Boot via ATF BL31.\n");
@@ -436,15 +445,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	}
 
 	debug("loaded - jumping to U-Boot...\n");
-#ifdef CONFIG_BOOTSTAGE_STASH
-	int ret;
-
-	bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl");
-	ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
-			      CONFIG_BOOTSTAGE_STASH_SIZE);
-	if (ret)
-		debug("Failed to stash bootstage: err=%d\n", ret);
-#endif
 	spl_board_prepare_for_boot();
 	jump_to_image_no_args(&spl_image);
 }

commit 9ff78ba88eb625534301cf3b7c49936bdf0671c1
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 15:47:23 2017 +0800

    rockchip: rk3399: enable secure timer before spl_early_init()
    
    We need to enable the timer before spl_early_init(), when enable
    bootstage, the spl_early_init will get time mark from timer.
    
    Change-Id: I2e873e2655fd0145782643108afcafb84082ce2c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index a3708caa03..be3636f85b 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -108,6 +108,8 @@ void board_init_f(ulong dummy)
 	/*  Emmc clock generator: disable the clock multipilier */
 	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
 
+	secure_timer_init();
+
 	ret = spl_early_init();
 	if (ret) {
 		debug("spl_early_init() failed: %d\n", ret);
@@ -126,8 +128,6 @@ void board_init_f(ulong dummy)
 	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
 	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
 
-	secure_timer_init();
-
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
 		debug("Pinctrl init failed: %d\n", ret);

commit f4c98a16321ddd923b404417fda90402f1226f89
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Sep 12 15:45:59 2017 +0800

    armv8: add timer_get_boot_us() for generic timer
    
    Rockchip use 24M for generic timer, count/24 is us.
    
    Change-Id: I89a38fdeb5fd4f6a54ec31926c2e120786be14de
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c
index a2dda333fe..8b13dd95ca 100644
--- a/arch/arm/cpu/armv8/generic_timer.c
+++ b/arch/arm/cpu/armv8/generic_timer.c
@@ -62,3 +62,10 @@ unsigned long usec2ticks(unsigned long usec)
 
 	return ticks;
 }
+
+ulong timer_get_boot_us(void)
+{
+	ulong count = timer_read_counter();
+
+	return count/24;
+}

commit 4214dda9435890a62b55fb1191ec4996b21a0293
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 14:57:41 2017 +0800

    rockchip: remove CONFIG_SPL_ATF_TEXT_BASE for all boards
    
    After update bl31_entry(), we don't need CONFIG_SPL_ATF_TEXT_BASE.
    
    Change-Id: Ia64fdaa37242332a497077ecc7833c7c8d0b0d45
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index d51687a680..e193ccbe0d 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -15,7 +15,6 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_SPL_ATF_TEXT_BASE=0x00010000
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 45a12a8b27..ca8eee57f1 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -29,7 +29,6 @@ CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_SPL_ATF_TEXT_BASE=0x10000
 CONFIG_TPL=y
 CONFIG_TPL_BOOTROM_SUPPORT=y
 CONFIG_TPL_DRIVERS_MISC_SUPPORT=y

commit 160ff8a6e2778537ca744b617e48e3a361b16520
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 14:56:07 2017 +0800

    spl: remove SPL_ATF_TEXT_BASE config option
    
    We don't need SPL_ATF_TEXT_BASE since we can get the bl31 entry
    from spl_image.entry_point.
    
    Change-Id: I730ad6548e277527f1b07b40ffb7a3bc0a9d6d35
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 601d1262de..6174084d84 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -700,12 +700,6 @@ config SPL_ATF_SUPPORT
 	  is loaded by SPL(which is considered as BL2 in ATF terminology).
 	  More detail at: https://github.com/ARM-software/arm-trusted-firmware
 
-config SPL_ATF_TEXT_BASE
-	depends on SPL_ATF_SUPPORT
-	hex "ATF BL31 base address"
-	help
-	  This is the base address in memory for ATF BL31 text and entry point.
-
 config SPL_OPTEE_SUPPORT
 	bool "Support OP-TEE Trusted OS"
 	depends on ARM

commit 7940094c97d3636cb5a919bc62ba4817f1d9641d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 14:33:14 2017 +0800

    spl: update bl31_entry() with new name and parameter
    
    Rename the bl31_entry() function with 'spl_' prefix and add one
    parameter for bl31 entry address since we can get it from spl_image header.
    
    Change-Id: I4b6125f1d7138f26c2256ab86f449be4a6f1c4cc
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/spl.c b/common/spl/spl.c
index d0459bec3f..85e2e887c9 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -427,7 +427,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 
 	if (CONFIG_IS_ENABLED(ATF_SUPPORT)) {
 		debug("loaded - jumping to U-Boot via ATF BL31.\n");
-		bl31_entry();
+		spl_bl31_entry((void *)spl_image.entry_point);
 	}
 
 	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 6e8f928044..2f6fff971a 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -82,13 +82,13 @@ void raw_write_daif(unsigned int daif)
 	__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
 }
 
-void bl31_entry(void)
+void spl_bl31_entry(void *entry_addr)
 {
 	struct bl31_params *bl31_params;
 	void (*entry)(struct bl31_params *params, void *plat_params) = NULL;
 
 	bl31_params = bl2_plat_get_bl31_params();
-	entry = (void *)CONFIG_SPL_ATF_TEXT_BASE;
+	entry = entry_addr;
 
 	raw_write_daif(SPSR_EXCEPTION_MASK);
 	dcache_disable();
diff --git a/include/spl.h b/include/spl.h
index 13d46ed780..d21a3d21cb 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -267,7 +267,11 @@ int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr);
 int spl_mmc_load_image(struct spl_image_info *spl_image,
 		       struct spl_boot_device *bootdev);
 
-void bl31_entry(void);
+/**
+ * spl_bl31_entry - entry function for ATF bl31
+ * @entry_addr - entry address of bl31 text
+ */
+void spl_bl31_entry(void *entry_addr);
 
 /**
  * spl_optee_entry - entry function for optee

commit 31e72715a91300637bf32724017bbe46f4c4e526
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 11:25:05 2017 +0800

    rockchip: firefly-rk3399: enable SPL_SYSRESET config
    
    After the patch below, we need to add SPL_SYSRESET for do_reset()
    in SPL:
    87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro
    
    Change-Id: Id7be0a9ed6d4d522fe0941433e6f2b569eda0a00
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 3e88a37efd..d51687a680 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -70,6 +70,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y

commit 7dfddccf7e99f7876aced2b8bfe4732ef9368a62
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 11:18:58 2017 +0800

    rockchip: ram: rk3399: update reg map for of-platdata
    
    After Simon's patch, the dtoc can work with 64bit address,
    so we need to fix reg number for it.
    Depend on Simon's patch set:
    https://patchwork.ozlabs.org/cover/807266/
    
    Change-Id: Ifc715eeea82e412d2236f22a4d8885efc02aec40
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 63342ab5c9..5ed4b03837 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1115,7 +1115,7 @@ static int conv_of_platdata(struct udevice *dev)
 	int ret;
 
 	ret = regmap_init_mem_platdata(dev, dtplat->reg,
-			ARRAY_SIZE(dtplat->reg) / 4,
+			ARRAY_SIZE(dtplat->reg) / 2,
 			&plat->map);
 	if (ret)
 		return ret;

commit adcf6d062e7b7708255f1bdae994cd75008b1e27
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Sep 7 11:15:35 2017 +0800

    rockchip: sdhci: update reg map for of-platdata
    
    After Simon's patch, the dtoc can work with 64bit address,
    so we need to fix reg number for it.
    Depend on Simon's patch set:
    https://patchwork.ozlabs.org/cover/807266/
    
    Change-Id: Ibd3cda6d5891b1faccb23da94cd4200cb12dd514
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index fd3bb1042a..a05a422728 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -187,7 +187,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat;
 
 	host->name = dev->name;
-	host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]);
+	host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
 	host->host_caps |= MMC_MODE_8BIT;
 	max_frequency = dtplat->max_frequency;
 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);

commit 3b103c4e393dce7f7fad8887b5da35444be6f13f
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:16:01 2017 -0600

    dtoc: Add a header to the generated files
    
    Add a header that indicates that the files generated by dtoc should not be
    modified.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index cfca45b0ac..dc9c0d9f45 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -190,6 +190,16 @@ class DtbPlatdata(object):
         self._lines = []
         return lines
 
+    def out_header(self):
+        """Output a message indicating that this is an auto-generated file"""
+        self.out('''/*
+ * DO NOT MODIFY
+ *
+ * This file was generated by dtoc from a .dtb (device tree binary) file.
+ */
+
+''')
+
     def get_phandle_argc(self, prop, node_name):
         """Check if a node contains phandles
 
@@ -410,6 +420,7 @@ class DtbPlatdata(object):
         definitions for node in self._valid_nodes. See the documentation in
         README.of-plat for more information.
         """
+        self.out_header()
         self.out('#include <stdbool.h>\n')
         self.out('#include <libfdt.h>\n')
 
@@ -512,6 +523,7 @@ class DtbPlatdata(object):
         See the documentation in doc/driver-model/of-plat.txt for more
         information.
         """
+        self.out_header()
         self.out('#include <common.h>\n')
         self.out('#include <dm.h>\n')
         self.out('#include <dt-structs.h>\n')

commit de97595a87479a65eb8634a52369202d587edd4c
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:16:00 2017 -0600

    dtoc: Rename the auto-generated dt-structs.h file
    
    The filename of the auto-generated file is the same as the file that
    includes it. Even though the form is in the generated/ subdirectory, this
    could be confused.
    
    Rename the generated file to something that makes it clear it is
    auto-generated.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/include/dt-structs.h b/include/dt-structs.h
index 76979e73e1..c0f56951b5 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -23,7 +23,7 @@ struct phandle_2_arg {
 	const void *node;
 	int arg[2];
 };
-#include <generated/dt-structs.h>
+#include <generated/dt-structs-gen.h>
 #endif
 
 #endif
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index dd8065d87d..b86ea76bab 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -257,14 +257,15 @@ cmd_dtoch = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o
 quiet_cmd_plat = PLAT    $@
 cmd_plat = $(CC) $(c_flags) -c $< -o $@
 
-$(obj)/dts/dt-platdata.o: $(obj)/dts/dt-platdata.c include/generated/dt-structs.h
+$(obj)/dts/dt-platdata.o: $(obj)/dts/dt-platdata.c \
+		include/generated/dt-structs-gen.h
 	$(call if_changed,plat)
 
 PHONY += dts_dir
 dts_dir:
 	$(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts)
 
-include/generated/dt-structs.h: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
+include/generated/dt-structs-gen.h: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc
 	$(call if_changed,dtoch)
 
 $(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc

commit 54d1a4b76c2dfc54f524c9a49fe2777d7ea94fc4
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:59 2017 -0600

    dtoc: Support properties containing multiple phandle values
    
    At present dtoc has a very simplistic view of phandles. It assumes that
    a property has only a single phandle with a single argument (i.e. two
    cells per property).
    
    This is not true in many cases. Enhance the implementation to scan all
    phandles in a property and to use the correct number of arguments (which
    can be 0, 1, 2 or more) when generating the C code. For the struct
    definitions, use a struct which can hold the maximum number of arguments
    used by the property.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/include/dt-structs.h b/include/dt-structs.h
index 9ab4e2524d..76979e73e1 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -18,6 +18,11 @@ struct phandle_1_arg {
 	const void *node;
 	int arg[1];
 };
+
+struct phandle_2_arg {
+	const void *node;
+	int arg[2];
+};
 #include <generated/dt-structs.h>
 #endif
 
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 1920a59f82..cfca45b0ac 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -394,11 +394,13 @@ class DtbPlatdata(object):
                     if not isinstance(prop.value, list):
                         prop.value = [prop.value]
                     # Process the list as pairs of (phandle, id)
-                    value_it = iter(prop.value)
-                    for phandle_cell, _ in zip(value_it, value_it):
+                    pos = 0
+                    for args in info.args:
+                        phandle_cell = prop.value[pos]
                         phandle = fdt_util.fdt32_to_cpu(phandle_cell)
                         target_node = self._fdt.phandle_to_node[phandle]
                         node.phandles.add(target_node)
+                        pos += 1 + args
 
 
     def generate_structs(self, structs):
@@ -422,7 +424,7 @@ class DtbPlatdata(object):
                     struct_name = 'struct phandle_%d_arg' % info.max_args
                     self.out('\t%s%s[%d]' % (tab_to(2, struct_name),
                                              conv_name_to_c(prop.name),
-                                             len(prop.value) / 2))
+                                             len(info.args)))
                 else:
                     ptype = TYPE_NAMES[prop.type]
                     self.out('\t%s%s' % (tab_to(2, ptype),
@@ -461,13 +463,18 @@ class DtbPlatdata(object):
                 info = self.get_phandle_argc(prop, node.name)
                 if info:
                     # Process the list as pairs of (phandle, id)
-                    value_it = iter(prop.value)
-                    for phandle_cell, id_cell in zip(value_it, value_it):
+                    pos = 0
+                    for args in info.args:
+                        phandle_cell = prop.value[pos]
                         phandle = fdt_util.fdt32_to_cpu(phandle_cell)
-                        id_num = fdt_util.fdt32_to_cpu(id_cell)
                         target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
-                        vals.append('{&%s%s, {%d}}' % (VAL_PREFIX, name, id_num))
+                        arg_values = []
+                        for i in range(args):
+                            arg_values.append(str(fdt_util.fdt32_to_cpu(prop.value[pos + 1 + i])))
+                        pos += 1 + args
+                        vals.append('\t{&%s%s, {%s}}' % (VAL_PREFIX, name,
+                                                     ', '.join(arg_values)))
                     for val in vals:
                         self.buf('\n\t\t%s,' % val)
                 else:
diff --git a/tools/dtoc/dtoc_test_phandle.dts b/tools/dtoc/dtoc_test_phandle.dts
index c0a602f296..ba12b0fe65 100644
--- a/tools/dtoc/dtoc_test_phandle.dts
+++ b/tools/dtoc/dtoc_test_phandle.dts
@@ -10,15 +10,28 @@
 
 / {
 	phandle: phandle-target {
+		u-boot,dm-pre-reloc;
+		compatible = "target";
+		intval = <0>;
+                #clock-cells = <0>;
+	};
+
+	phandle_1: phandle2-target {
 		u-boot,dm-pre-reloc;
 		compatible = "target";
 		intval = <1>;
-                #clock-cells = <1>;
+		#clock-cells = <1>;
+	};
+	phandle_2: phandle3-target {
+		u-boot,dm-pre-reloc;
+		compatible = "target";
+		intval = <2>;
+		#clock-cells = <2>;
 	};
 
 	phandle-source {
 		u-boot,dm-pre-reloc;
 		compatible = "source";
-		clocks = <&phandle 1>;
+		clocks = <&phandle &phandle_1 11 &phandle_2 12 13 &phandle>;
 	};
 };
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index fbae927cf8..cc009b2a25 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -228,7 +228,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
         self.assertEqual('''#include <stdbool.h>
 #include <libfdt.h>
 struct dtd_source {
-\tstruct phandle_1_arg clocks[1];
+\tstruct phandle_2_arg clocks[4];
 };
 struct dtd_target {
 \tfdt32_t\t\tintval;
@@ -243,7 +243,7 @@ struct dtd_target {
 #include <dt-structs.h>
 
 static struct dtd_target dtv_phandle_target = {
-\t.intval\t\t\t= 0x1,
+\t.intval\t\t\t= 0x0,
 };
 U_BOOT_DEVICE(phandle_target) = {
 \t.name\t\t= "target",
@@ -251,9 +251,30 @@ U_BOOT_DEVICE(phandle_target) = {
 \t.platdata_size\t= sizeof(dtv_phandle_target),
 };
 
+static struct dtd_target dtv_phandle2_target = {
+\t.intval\t\t\t= 0x1,
+};
+U_BOOT_DEVICE(phandle2_target) = {
+\t.name\t\t= "target",
+\t.platdata\t= &dtv_phandle2_target,
+\t.platdata_size\t= sizeof(dtv_phandle2_target),
+};
+
+static struct dtd_target dtv_phandle3_target = {
+\t.intval\t\t\t= 0x2,
+};
+U_BOOT_DEVICE(phandle3_target) = {
+\t.name\t\t= "target",
+\t.platdata\t= &dtv_phandle3_target,
+\t.platdata_size\t= sizeof(dtv_phandle3_target),
+};
+
 static struct dtd_source dtv_phandle_source = {
 \t.clocks\t\t\t= {
-\t\t{&dtv_phandle_target, {1}},},
+\t\t\t{&dtv_phandle_target, {}},
+\t\t\t{&dtv_phandle2_target, {11}},
+\t\t\t{&dtv_phandle3_target, {12, 13}},
+\t\t\t{&dtv_phandle_target, {}},},
 };
 U_BOOT_DEVICE(phandle_source) = {
 \t.name\t\t= "source",

commit f9faa23037379234c2c74cd66ff8e446e60ca81b
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:58 2017 -0600

    dtoc: Put phandle args in an array
    
    We want to support more than one phandle argument. It makes sense to use
    an array for this rather than discrete struct members. Adjust the code to
    support this. Rename the member to 'arg' instead of 'id'.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 2584b7ea34..e006b6bbab 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -32,7 +32,7 @@ int clk_get_by_index_platdata(struct udevice *dev, int index,
 	ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
 	if (ret)
 		return ret;
-	clk->id = cells[0].id;
+	clk->id = cells[0].arg[0];
 
 	return 0;
 }
diff --git a/include/dt-structs.h b/include/dt-structs.h
index 2ed997115a..9ab4e2524d 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -11,12 +11,12 @@
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 struct phandle_0_arg {
 	const void *node;
-	int id[0];
+	int arg[0];
 };
 
 struct phandle_1_arg {
 	const void *node;
-	int id;
+	int arg[1];
 };
 #include <generated/dt-structs.h>
 #endif
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index c0a3ae692b..1920a59f82 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -467,7 +467,7 @@ class DtbPlatdata(object):
                         id_num = fdt_util.fdt32_to_cpu(id_cell)
                         target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
-                        vals.append('{&%s%s, %d}' % (VAL_PREFIX, name, id_num))
+                        vals.append('{&%s%s, {%d}}' % (VAL_PREFIX, name, id_num))
                     for val in vals:
                         self.buf('\n\t\t%s,' % val)
                 else:
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index aa617a649c..fbae927cf8 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -253,7 +253,7 @@ U_BOOT_DEVICE(phandle_target) = {
 
 static struct dtd_source dtv_phandle_source = {
 \t.clocks\t\t\t= {
-\t\t{&dtv_phandle_target, 1},},
+\t\t{&dtv_phandle_target, {1}},},
 };
 U_BOOT_DEVICE(phandle_source) = {
 \t.name\t\t= "source",

commit 59e6856db08982e9d13a2d1cf3f4050e51ffdf03
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:57 2017 -0600

    dtoc: Put each phandle on a separate line
    
    When writing values from properties which contain phandles, dtoc currently
    writes 8 phandles per line. Change this to write one phandle per line.
    This helps reduce line length, since phandles are generally longer and may
    have arguments.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 0234f71b76..c0a3ae692b 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -468,15 +468,17 @@ class DtbPlatdata(object):
                         target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
                         vals.append('{&%s%s, %d}' % (VAL_PREFIX, name, id_num))
+                    for val in vals:
+                        self.buf('\n\t\t%s,' % val)
                 else:
                     for val in prop.value:
                         vals.append(get_value(prop.type, val))
 
-                # Put 8 values per line to avoid very long lines.
-                for i in xrange(0, len(vals), 8):
-                    if i:
-                        self.buf(',\n\t\t')
-                    self.buf(', '.join(vals[i:i + 8]))
+                    # Put 8 values per line to avoid very long lines.
+                    for i in xrange(0, len(vals), 8):
+                        if i:
+                            self.buf(',\n\t\t')
+                        self.buf(', '.join(vals[i:i + 8]))
                 self.buf('}')
             else:
                 self.buf(get_value(prop.type, prop.value))
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 23c4439ed9..aa617a649c 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -252,7 +252,8 @@ U_BOOT_DEVICE(phandle_target) = {
 };
 
 static struct dtd_source dtv_phandle_source = {
-\t.clocks\t\t\t= {{&dtv_phandle_target, 1}},
+\t.clocks\t\t\t= {
+\t\t{&dtv_phandle_target, 1},},
 };
 U_BOOT_DEVICE(phandle_source) = {
 \t.name\t\t= "source",

commit 3a40acd42e66522b944d6f1a6aa3297771c9fa65
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:56 2017 -0600

    dtoc: Rename the phandle struct
    
    Rather than naming the phandle struct according to the number of cells it
    uses (e.g. struct phandle_2_cell) name it according to the number of
    arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
    naming.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/doc/driver-model/of-plat.txt b/doc/driver-model/of-plat.txt
index 3ed8c759d6..732bc34f06 100644
--- a/doc/driver-model/of-plat.txt
+++ b/doc/driver-model/of-plat.txt
@@ -111,7 +111,7 @@ struct dtd_rockchip_rk3288_dw_mshc {
         bool            cap_sd_highspeed;
         fdt32_t         card_detect_delay;
         fdt32_t         clock_freq_min_max[2];
-        struct phandle_2_cell clocks[4];
+        struct phandle_1_arg clocks[4];
         bool            disable_wp;
         fdt32_t         fifo_depth;
         fdt32_t         interrupts[3];
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 4f9895b523..2584b7ea34 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -23,7 +23,7 @@ static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 # if CONFIG_IS_ENABLED(OF_PLATDATA)
 int clk_get_by_index_platdata(struct udevice *dev, int index,
-			      struct phandle_2_cell *cells, struct clk *clk)
+			      struct phandle_1_arg *cells, struct clk *clk)
 {
 	int ret;
 
diff --git a/include/clk.h b/include/clk.h
index 6769c3f8e8..13b157b59b 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -61,9 +61,9 @@ struct clk {
 };
 
 #if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
-struct phandle_2_cell;
+struct phandle_1_arg;
 int clk_get_by_index_platdata(struct udevice *dev, int index,
-			      struct phandle_2_cell *cells, struct clk *clk);
+			      struct phandle_1_arg *cells, struct clk *clk);
 
 /**
  * clock_get_by_index - Get/request a clock by integer index.
diff --git a/include/dt-structs.h b/include/dt-structs.h
index 0732c442ff..2ed997115a 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -9,7 +9,12 @@
 
 /* These structures may only be used in SPL */
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-struct phandle_2_cell {
+struct phandle_0_arg {
+	const void *node;
+	int id[0];
+};
+
+struct phandle_1_arg {
 	const void *node;
 	int id;
 };
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 001bc4ea66..0234f71b76 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -419,7 +419,8 @@ class DtbPlatdata(object):
                 info = self.get_phandle_argc(prop, structs[name])
                 if info:
                     # For phandles, include a reference to the target
-                    self.out('\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),
+                    struct_name = 'struct phandle_%d_arg' % info.max_args
+                    self.out('\t%s%s[%d]' % (tab_to(2, struct_name),
                                              conv_name_to_c(prop.name),
                                              len(prop.value) / 2))
                 else:
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 62460acb7c..23c4439ed9 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -228,7 +228,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
         self.assertEqual('''#include <stdbool.h>
 #include <libfdt.h>
 struct dtd_source {
-\tstruct phandle_2_cell clocks[1];
+\tstruct phandle_1_arg clocks[1];
 };
 struct dtd_target {
 \tfdt32_t\t\tintval;

commit cb3f9bf4b3fefc5dc35aaef5596cf092993625f3
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:55 2017 -0600

    dtoc: Rename is_phandle() and adjust it to return more detail
    
    Update this function to return more detail about a property that contains
    phandles. This will allow (in a future commit) more accurate handling of
    these properties.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index a483d6c875..001bc4ea66 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -12,6 +12,7 @@ This supports converting device tree data to C structures definitions and
 static data.
 """
 
+import collections
 import copy
 import sys
 
@@ -44,6 +45,14 @@ TYPE_NAMES = {
 STRUCT_PREFIX = 'dtd_'
 VAL_PREFIX = 'dtv_'
 
+# This holds information about a property which includes phandles.
+#
+# max_args: integer: Maximum number or arguments that any phandle uses (int).
+# args: Number of args for each phandle in the property. The total number of
+#     phandles is len(args). This is a list of integers.
+PhandleInfo = collections.namedtuple('PhandleInfo', ['max_args', 'args'])
+
+
 def conv_name_to_c(name):
     """Convert a device-tree name to a C identifier
 
@@ -181,20 +190,42 @@ class DtbPlatdata(object):
         self._lines = []
         return lines
 
-    def is_phandle(self, prop):
-	"""Check if a node contains phandles
+    def get_phandle_argc(self, prop, node_name):
+        """Check if a node contains phandles
 
-	We have no reliable way of detecting whether a node uses a phandle
-	or not. As an interim measure, use a list of known property names.
+        We have no reliable way of detecting whether a node uses a phandle
+        or not. As an interim measure, use a list of known property names.
 
-	Args:
-	    prop: Prop object to check
-	Return:
-	    True if the object value contains phandles, else False
-	"""
-	if prop.name in ['clocks']:
-	    return True
-	return False
+        Args:
+            prop: Prop object to check
+        Return:
+            Number of argument cells is this is a phandle, else None
+        """
+        if prop.name in ['clocks']:
+            val = prop.value
+            if not isinstance(val, list):
+                val = [val]
+            i = 0
+
+            max_args = 0
+            args = []
+            while i < len(val):
+                phandle = fdt_util.fdt32_to_cpu(val[i])
+                target = self._fdt.phandle_to_node.get(phandle)
+                if not target:
+                    raise ValueError("Cannot parse '%s' in node '%s'" %
+                                     (prop.name, node_name))
+                prop_name = '#clock-cells'
+                cells = target.props.get(prop_name)
+                if not cells:
+                    raise ValueError("Node '%s' has no '%s' property" %
+                            (target.name, prop_name))
+                num_args = fdt_util.fdt32_to_cpu(cells.value)
+                max_args = max(max_args, num_args)
+                args.append(num_args)
+                i += 1 + num_args
+            return PhandleInfo(max_args, args)
+        return None
 
     def scan_dtb(self):
         """Scan the device tree to obtain a tree of nodes and properties
@@ -358,14 +389,16 @@ class DtbPlatdata(object):
             for pname, prop in node.props.items():
                 if pname in PROP_IGNORE_LIST or pname[0] == '#':
                     continue
-                if isinstance(prop.value, list):
-                    if self.is_phandle(prop):
-                        # Process the list as pairs of (phandle, id)
-                        value_it = iter(prop.value)
-                        for phandle_cell, _ in zip(value_it, value_it):
-                            phandle = fdt_util.fdt32_to_cpu(phandle_cell)
-                            target_node = self._fdt.phandle_to_node[phandle]
-                            node.phandles.add(target_node)
+                info = self.get_phandle_argc(prop, node.name)
+                if info:
+                    if not isinstance(prop.value, list):
+                        prop.value = [prop.value]
+                    # Process the list as pairs of (phandle, id)
+                    value_it = iter(prop.value)
+                    for phandle_cell, _ in zip(value_it, value_it):
+                        phandle = fdt_util.fdt32_to_cpu(phandle_cell)
+                        target_node = self._fdt.phandle_to_node[phandle]
+                        node.phandles.add(target_node)
 
 
     def generate_structs(self, structs):
@@ -383,7 +416,8 @@ class DtbPlatdata(object):
             self.out('struct %s%s {\n' % (STRUCT_PREFIX, name))
             for pname in sorted(structs[name]):
                 prop = structs[name][pname]
-                if self.is_phandle(prop):
+                info = self.get_phandle_argc(prop, structs[name])
+                if info:
                     # For phandles, include a reference to the target
                     self.out('\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),
                                              conv_name_to_c(prop.name),
@@ -423,7 +457,8 @@ class DtbPlatdata(object):
                 vals = []
                 # For phandles, output a reference to the platform data
                 # of the target node.
-                if self.is_phandle(prop):
+                info = self.get_phandle_argc(prop, node.name)
+                if info:
                     # Process the list as pairs of (phandle, id)
                     value_it = iter(prop.value)
                     for phandle_cell, id_cell in zip(value_it, value_it):
diff --git a/tools/dtoc/dtoc_test_phandle.dts b/tools/dtoc/dtoc_test_phandle.dts
index e9828a695b..c0a602f296 100644
--- a/tools/dtoc/dtoc_test_phandle.dts
+++ b/tools/dtoc/dtoc_test_phandle.dts
@@ -13,6 +13,7 @@
 		u-boot,dm-pre-reloc;
 		compatible = "target";
 		intval = <1>;
+                #clock-cells = <1>;
 	};
 
 	phandle-source {

commit 7088d44b5d696d7e8eae1d830214e70280163811
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:54 2017 -0600

    dtoc: Make is_phandle() a member function
    
    This function will need to have access to class members once we enhance it
    to support multiple phandle values. In preparation for that, move it into
    the class.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 705ab27c86..a483d6c875 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -116,21 +116,6 @@ def get_compat_name(node):
         compat, aliases = compat[0], compat[1:]
     return conv_name_to_c(compat), [conv_name_to_c(a) for a in aliases]
 
-def is_phandle(prop):
-    """Check if a node contains phandles
-
-    We have no reliable way of detecting whether a node uses a phandle
-    or not. As an interim measure, use a list of known property names.
-
-    Args:
-        prop: Prop object to check
-    Return:
-        True if the object value contains phandles, else False
-    """
-    if prop.name in ['clocks']:
-        return True
-    return False
-
 
 class DtbPlatdata(object):
     """Provide a means to convert device tree binary data to platform data
@@ -196,6 +181,21 @@ class DtbPlatdata(object):
         self._lines = []
         return lines
 
+    def is_phandle(self, prop):
+	"""Check if a node contains phandles
+
+	We have no reliable way of detecting whether a node uses a phandle
+	or not. As an interim measure, use a list of known property names.
+
+	Args:
+	    prop: Prop object to check
+	Return:
+	    True if the object value contains phandles, else False
+	"""
+	if prop.name in ['clocks']:
+	    return True
+	return False
+
     def scan_dtb(self):
         """Scan the device tree to obtain a tree of nodes and properties
 
@@ -359,7 +359,7 @@ class DtbPlatdata(object):
                 if pname in PROP_IGNORE_LIST or pname[0] == '#':
                     continue
                 if isinstance(prop.value, list):
-                    if is_phandle(prop):
+                    if self.is_phandle(prop):
                         # Process the list as pairs of (phandle, id)
                         value_it = iter(prop.value)
                         for phandle_cell, _ in zip(value_it, value_it):
@@ -383,7 +383,7 @@ class DtbPlatdata(object):
             self.out('struct %s%s {\n' % (STRUCT_PREFIX, name))
             for pname in sorted(structs[name]):
                 prop = structs[name][pname]
-                if is_phandle(prop):
+                if self.is_phandle(prop):
                     # For phandles, include a reference to the target
                     self.out('\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),
                                              conv_name_to_c(prop.name),
@@ -423,7 +423,7 @@ class DtbPlatdata(object):
                 vals = []
                 # For phandles, output a reference to the platform data
                 # of the target node.
-                if is_phandle(prop):
+                if self.is_phandle(prop):
                     # Process the list as pairs of (phandle, id)
                     value_it = iter(prop.value)
                     for phandle_cell, id_cell in zip(value_it, value_it):

commit 0ac13c2142456e3f7d76ce54875ff7f62f4710cb
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:53 2017 -0600

    dtoc: Use the Fdt's class's phandle map
    
    Now that the Fdt class can map phandles to the associated nodes, use that
    instead of a separate implementation.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 0c719310b1..705ab27c86 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -144,17 +144,14 @@ class DtbPlatdata(object):
         _dtb_fname: Filename of the input device tree binary file
         _valid_nodes: A list of Node object with compatible strings
         _include_disabled: true to include nodes marked status = "disabled"
-        _phandle_nodes: A dict of nodes indexed by phandle number (1, 2...)
         _outfile: The current output file (sys.stdout or a real file)
         _lines: Stashed list of output lines for outputting in the future
-        _phandle_nodes: A dict of Nodes indexed by phandle (an integer)
     """
     def __init__(self, dtb_fname, include_disabled):
         self._fdt = None
         self._dtb_fname = dtb_fname
         self._valid_nodes = None
         self._include_disabled = include_disabled
-        self._phandle_nodes = {}
         self._outfile = None
         self._lines = []
         self._aliases = {}
@@ -210,8 +207,7 @@ class DtbPlatdata(object):
     def scan_node(self, root):
         """Scan a node and subnodes to build a tree of node and phandle info
 
-        This adds each node to self._valid_nodes and each phandle to
-        self._phandle_nodes.
+        This adds each node to self._valid_nodes.
 
         Args:
             root: Root node for scan
@@ -222,10 +218,6 @@ class DtbPlatdata(object):
                 if (not self._include_disabled and not status or
                         status.value != 'disabled'):
                     self._valid_nodes.append(node)
-                    phandle_prop = node.props.get('phandle')
-                    if phandle_prop:
-                        phandle = phandle_prop.GetPhandle()
-                        self._phandle_nodes[phandle] = node
 
             # recurse to handle any subnodes
             self.scan_node(node)
@@ -234,11 +226,9 @@ class DtbPlatdata(object):
         """Scan the device tree for useful information
 
         This fills in the following properties:
-            _phandle_nodes: A dict of Nodes indexed by phandle (an integer)
             _valid_nodes: A list of nodes we wish to consider include in the
                 platform data
         """
-        self._phandle_nodes = {}
         self._valid_nodes = []
         return self.scan_node(self._fdt.GetRoot())
 
@@ -374,7 +364,7 @@ class DtbPlatdata(object):
                         value_it = iter(prop.value)
                         for phandle_cell, _ in zip(value_it, value_it):
                             phandle = fdt_util.fdt32_to_cpu(phandle_cell)
-                            target_node = self._phandle_nodes[phandle]
+                            target_node = self._fdt.phandle_to_node[phandle]
                             node.phandles.add(target_node)
 
 
@@ -439,7 +429,7 @@ class DtbPlatdata(object):
                     for phandle_cell, id_cell in zip(value_it, value_it):
                         phandle = fdt_util.fdt32_to_cpu(phandle_cell)
                         id_num = fdt_util.fdt32_to_cpu(id_cell)
-                        target_node = self._phandle_nodes[phandle]
+                        target_node = self._fdt.phandle_to_node[phandle]
                         name = conv_name_to_c(target_node.name)
                         vals.append('{&%s%s, %d}' % (VAL_PREFIX, name, id_num))
                 else:

commit 5a30597af76537e0d23456af5cf53699741f73b5
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:52 2017 -0600

    dtoc: Update the Fdt class to record phandles
    
    Add a map from phandles to nodes. This can be used by clients of the the
    class instead of maintaining this themselves.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index ffd42ce541..dbc338653b 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -212,6 +212,10 @@ class Node:
         searching into subnodes so that the entire tree is built.
         """
         self.props = self._fdt.GetProps(self)
+        phandle = self.props.get('phandle')
+        if phandle:
+            val = fdt_util.fdt32_to_cpu(phandle.value)
+            self._fdt.phandle_to_node[val] = self
 
         offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self.Offset())
         while offset >= 0:
@@ -263,6 +267,7 @@ class Fdt:
     def __init__(self, fname):
         self._fname = fname
         self._cached_offsets = False
+        self.phandle_to_node = {}
         if self._fname:
             self._fname = fdt_util.EnsureCompiled(self._fname)
 

commit 4b26144b09a8993114d42c90b318948efc9fadb9
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:51 2017 -0600

    dtoc: Handle 'reg' properties with unusual sizes
    
    At present dtoc assumes that all 'reg' properties have both an address and
    a size. For I2C devices we do not have this. Adjust dtoc to cope.
    
    Reported-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtoc_test_simple.dts b/tools/dtoc/dtoc_test_simple.dts
index c736686263..6afe674b1f 100644
--- a/tools/dtoc/dtoc_test_simple.dts
+++ b/tools/dtoc/dtoc_test_simple.dts
@@ -9,6 +9,8 @@
  /dts-v1/;
 
 / {
+	#address-cells = <1>;
+	#size-cells = <1>;
 	spl-test {
 		u-boot,dm-pre-reloc;
 		compatible = "sandbox,spl-test";
@@ -45,4 +47,16 @@
 		compatible = "sandbox,spl-test.2";
 	};
 
+	i2c@0 {
+		compatible = "sandbox,i2c-test";
+		u-boot,dm-pre-reloc;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pmic@9 {
+			compatible = "sandbox,pmic-test";
+			u-boot,dm-pre-reloc;
+			reg = <9>;
+			low-power;
+		};
+	};
 };
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 09cfddaaaa..62460acb7c 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -121,6 +121,12 @@ class TestDtoc(unittest.TestCase):
             data = infile.read()
         self.assertEqual('''#include <stdbool.h>
 #include <libfdt.h>
+struct dtd_sandbox_i2c_test {
+};
+struct dtd_sandbox_pmic_test {
+\tbool\t\tlow_power;
+\tfdt64_t\t\treg[2];
+};
 struct dtd_sandbox_spl_test {
 \tbool\t\tboolval;
 \tunsigned char\tbytearray[3];
@@ -192,6 +198,24 @@ U_BOOT_DEVICE(spl_test4) = {
 \t.platdata_size\t= sizeof(dtv_spl_test4),
 };
 
+static struct dtd_sandbox_i2c_test dtv_i2c_at_0 = {
+};
+U_BOOT_DEVICE(i2c_at_0) = {
+\t.name\t\t= "sandbox_i2c_test",
+\t.platdata\t= &dtv_i2c_at_0,
+\t.platdata_size\t= sizeof(dtv_i2c_at_0),
+};
+
+static struct dtd_sandbox_pmic_test dtv_pmic_at_9 = {
+\t.low_power\t\t= true,
+\t.reg\t\t\t= {0x9, 0x0},
+};
+U_BOOT_DEVICE(pmic_at_9) = {
+\t.name\t\t= "sandbox_pmic_test",
+\t.platdata\t= &dtv_pmic_at_9,
+\t.platdata_size\t= sizeof(dtv_pmic_at_9),
+};
+
 ''', data)
 
     def test_phandle(self):

commit a28bfcc35587bf3d3f86eb49fb81c9570ddfcc4b
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:50 2017 -0600

    dtoc: Add support for 32 or 64-bit addresses
    
    When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
    does not since it ignores the #address-cells and #size-cells properties.
    
    Update the tool to use fdt64_t as the element type for reg properties when
    either the address or size is larger than one cell. Use the correct value
    so that C code can obtain the information from the device tree easily.
    
    Alos create a new type, fdt_val_t, which is defined to either fdt32_t or
    fdt64_t depending on the word size of the machine. This type corresponds
    to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types
    since they are defined to phys_addr_t and phys_size_t which use
    'unsigned long' in the 32-bit case, rather than 'unsigned int'.
    
    Add tests for the four combinations of address and size values (32/32,
    64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368
    which now need to use the new fdt_val_t type.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    
    Suggested-by: Heiko Stuebner <heiko@sntech.de>
    Reported-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 2be1f572d7..0160d50c03 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -471,7 +471,7 @@ static int rk3368_clk_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3368_clk_plat *plat = dev_get_platdata(dev);
 
-	priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 #if IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_TPL_BUILD)
 	rkclk_init(priv->cru);
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 3edafea140..7232806724 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -963,7 +963,7 @@ static int rk3399_clk_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_clk_plat *plat = dev_get_platdata(dev);
 
-	priv->cru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 	rkclk_init(priv->cru);
 #endif
@@ -1145,7 +1145,7 @@ static int rk3399_pmuclk_probe(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct rk3399_pmuclk_plat *plat = dev_get_platdata(dev);
 
-	priv->pmucru = map_sysmem(plat->dtd.reg[1], plat->dtd.reg[3]);
+	priv->pmucru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index d4e16a27ef..0f1d30820c 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -40,7 +40,7 @@ static struct regmap *regmap_alloc_count(int count)
 }
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,
+int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
 			     struct regmap **mapp)
 {
 	struct regmap_range *range;
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 4a0947c626..1ba02be8e1 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -27,10 +27,12 @@ typedef phys_size_t fdt_size_t;
 #define FDT_ADDR_T_NONE (-1ULL)
 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be64_to_cpu(reg)
+typedef fdt64_t fdt_val_t;
 #else
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be32_to_cpu(reg)
+typedef fdt32_t fdt_val_t;
 #endif
 
 /* Information obtained about memory from the FDT */
diff --git a/include/regmap.h b/include/regmap.h
index 1eed94e47a..493a5d8eff 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -69,7 +69,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp);
  * @count:	Number of pairs (e.g. 1 if the regmap has a single entry)
  * @mapp:	Returns allocated map
  */
-int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,
+int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
 			     struct regmap **mapp);
 
 /**
diff --git a/include/syscon.h b/include/syscon.h
index 34842aa470..5d52b1cc3c 100644
--- a/include/syscon.h
+++ b/include/syscon.h
@@ -8,6 +8,8 @@
 #ifndef __SYSCON_H
 #define __SYSCON_H
 
+#include <fdtdec.h>
+
 /**
  * struct syscon_uc_info - Information stored by the syscon UCLASS_UCLASS
  *
@@ -28,9 +30,11 @@ struct syscon_ops {
  * We don't support 64-bit machines. If they are so resource-contrained that
  * they need to use OF_PLATDATA, something is horribly wrong with the
  * education of our hardware engineers.
+ *
+ * Update: 64-bit is now supported and we have an education crisis.
  */
 struct syscon_base_platdata {
-	u32 reg[2];
+	fdt_val_t reg[2];
 };
 #endif
 
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 3243bccfe8..0c719310b1 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -242,6 +242,66 @@ class DtbPlatdata(object):
         self._valid_nodes = []
         return self.scan_node(self._fdt.GetRoot())
 
+    @staticmethod
+    def get_num_cells(node):
+        """Get the number of cells in addresses and sizes for this node
+
+        Args:
+            node: Node to check
+
+        Returns:
+            Tuple:
+                Number of address cells for this node
+                Number of size cells for this node
+        """
+        parent = node.parent
+        na, ns = 2, 2
+        if parent:
+            na_prop = parent.props.get('#address-cells')
+            ns_prop = parent.props.get('#size-cells')
+            if na_prop:
+                na = fdt_util.fdt32_to_cpu(na_prop.value)
+            if ns_prop:
+                ns = fdt_util.fdt32_to_cpu(ns_prop.value)
+        return na, ns
+
+    def scan_reg_sizes(self):
+        """Scan for 64-bit 'reg' properties and update the values
+
+        This finds 'reg' properties with 64-bit data and converts the value to
+        an array of 64-values. This allows it to be output in a way that the
+        C code can read.
+        """
+        for node in self._valid_nodes:
+            reg = node.props.get('reg')
+            if not reg:
+                continue
+            na, ns = self.get_num_cells(node)
+            total = na + ns
+
+            if reg.type != fdt.TYPE_INT:
+                raise ValueError("Node '%s' reg property is not an int")
+            if len(reg.value) % total:
+                raise ValueError("Node '%s' reg property has %d cells "
+                        'which is not a multiple of na + ns = %d + %d)' %
+                        (node.name, len(reg.value), na, ns))
+            reg.na = na
+            reg.ns = ns
+            if na != 1 or ns != 1:
+                reg.type = fdt.TYPE_INT64
+                i = 0
+                new_value = []
+                val = reg.value
+                if not isinstance(val, list):
+                    val = [val]
+                while i < len(val):
+                    addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.na)
+                    i += na
+                    size = fdt_util.fdt_cells_to_cpu(val[i:], reg.ns)
+                    i += ns
+                    new_value += [addr, size]
+                reg.value = new_value
+
     def scan_structs(self):
         """Scan the device tree building up the C structures we will use.
 
@@ -450,6 +510,7 @@ def run_steps(args, dtb_file, include_disabled, output):
     plat = DtbPlatdata(dtb_file, include_disabled)
     plat.scan_dtb()
     plat.scan_tree()
+    plat.scan_reg_sizes()
     plat.setup_output(output)
     structs = plat.scan_structs()
     plat.scan_phandles()
diff --git a/tools/dtoc/dtoc_test_addr32.dts b/tools/dtoc/dtoc_test_addr32.dts
new file mode 100644
index 0000000000..bcfdcae10b
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr32.dts
@@ -0,0 +1,27 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = <0x1234 0x5678>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = <0x12345678 0x98765432 2 3>;
+	};
+
+};
diff --git a/tools/dtoc/dtoc_test_addr32_64.dts b/tools/dtoc/dtoc_test_addr32_64.dts
new file mode 100644
index 0000000000..1c96243310
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr32_64.dts
@@ -0,0 +1,33 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <2>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = <0x1234 0x5678 0x0>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = <0x12345678 0x98765432 0x10987654>;
+	};
+
+	test3 {
+		u-boot,dm-pre-reloc;
+		compatible = "test3";
+		reg = <0x12345678 0x98765432 0x10987654 2 0 3>;
+	};
+
+};
diff --git a/tools/dtoc/dtoc_test_addr64.dts b/tools/dtoc/dtoc_test_addr64.dts
new file mode 100644
index 0000000000..4c0ad0ec36
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr64.dts
@@ -0,0 +1,33 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = /bits/ 64 <0x1234 0x5678>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = /bits/ 64 <0x1234567890123456 0x9876543210987654>;
+	};
+
+	test3 {
+		u-boot,dm-pre-reloc;
+		compatible = "test3";
+		reg = /bits/ 64 <0x1234567890123456 0x9876543210987654 2 3>;
+	};
+
+};
diff --git a/tools/dtoc/dtoc_test_addr64_32.dts b/tools/dtoc/dtoc_test_addr64_32.dts
new file mode 100644
index 0000000000..c36f6b726e
--- /dev/null
+++ b/tools/dtoc/dtoc_test_addr64_32.dts
@@ -0,0 +1,33 @@
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+ /dts-v1/;
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <1>;
+
+	test1 {
+		u-boot,dm-pre-reloc;
+		compatible = "test1";
+		reg = <0x1234 0x0 0x5678>;
+	};
+
+	test2 {
+		u-boot,dm-pre-reloc;
+		compatible = "test2";
+		reg = <0x12345678 0x90123456 0x98765432>;
+	};
+
+	test3 {
+		u-boot,dm-pre-reloc;
+		compatible = "test3";
+		reg = <0x12345678 0x90123456 0x98765432 0 2 3>;
+	};
+
+};
diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py
index bec6ee947a..338d47a5e1 100644
--- a/tools/dtoc/fdt_util.py
+++ b/tools/dtoc/fdt_util.py
@@ -38,6 +38,8 @@ def fdt_cells_to_cpu(val, cells):
     Return:
         A native-endian long value
     """
+    if not cells:
+        return 0
     out = long(fdt32_to_cpu(val[0]))
     if cells == 2:
         out = out << 32 | fdt32_to_cpu(val[1])
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 5040f23325..09cfddaaaa 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -270,4 +270,216 @@ U_BOOT_DEVICE(spl_test) = {
 \t.platdata_size\t= sizeof(dtv_spl_test),
 };
 
+''', data)
+
+    def test_addresses64(self):
+        """Test output from a node with a 'reg' property with na=2, ns=2"""
+        dtb_file = get_dtb_file('dtoc_test_addr64.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test3 {
+\tfdt64_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x1234, 0x5678},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x9876543210987654},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+static struct dtd_test3 dtv_test3 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x9876543210987654, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test3) = {
+\t.name\t\t= "test3",
+\t.platdata\t= &dtv_test3,
+\t.platdata_size\t= sizeof(dtv_test3),
+};
+
+''', data)
+
+    def test_addresses32(self):
+        """Test output from a node with a 'reg' property with na=1, ns=1"""
+        dtb_file = get_dtb_file('dtoc_test_addr32.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt32_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt32_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x1234, 0x5678},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x12345678, 0x98765432, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+''', data)
+
+    def test_addresses64_32(self):
+        """Test output from a node with a 'reg' property with na=2, ns=1"""
+        dtb_file = get_dtb_file('dtoc_test_addr64_32.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test3 {
+\tfdt64_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x123400000000, 0x5678},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x98765432},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+static struct dtd_test3 dtv_test3 = {
+\t.reg\t\t\t= {0x1234567890123456, 0x98765432, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test3) = {
+\t.name\t\t= "test3",
+\t.platdata\t= &dtv_test3,
+\t.platdata_size\t= sizeof(dtv_test3),
+};
+
+''', data)
+
+    def test_addresses32_64(self):
+        """Test output from a node with a 'reg' property with na=1, ns=2"""
+        dtb_file = get_dtb_file('dtoc_test_addr32_64.dts')
+        output = tools.GetOutputFilename('output')
+        dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <stdbool.h>
+#include <libfdt.h>
+struct dtd_test1 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test2 {
+\tfdt64_t\t\treg[2];
+};
+struct dtd_test3 {
+\tfdt64_t\t\treg[4];
+};
+''', data)
+
+        dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+        with open(output) as infile:
+            data = infile.read()
+        self.assertEqual('''#include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
+
+static struct dtd_test1 dtv_test1 = {
+\t.reg\t\t\t= {0x1234, 0x567800000000},
+};
+U_BOOT_DEVICE(test1) = {
+\t.name\t\t= "test1",
+\t.platdata\t= &dtv_test1,
+\t.platdata_size\t= sizeof(dtv_test1),
+};
+
+static struct dtd_test2 dtv_test2 = {
+\t.reg\t\t\t= {0x12345678, 0x9876543210987654},
+};
+U_BOOT_DEVICE(test2) = {
+\t.name\t\t= "test2",
+\t.platdata\t= &dtv_test2,
+\t.platdata_size\t= sizeof(dtv_test2),
+};
+
+static struct dtd_test3 dtv_test3 = {
+\t.reg\t\t\t= {0x12345678, 0x9876543210987654, 0x2, 0x3},
+};
+U_BOOT_DEVICE(test3) = {
+\t.name\t\t= "test3",
+\t.platdata\t= &dtv_test3,
+\t.platdata_size\t= sizeof(dtv_test3),
+};
+
 ''', data)

commit 12a972efaa3df3275d89be656f68daf89c9d80c5
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:49 2017 -0600

    dtoc: Avoid very long lines in output
    
    Large arrays can result in lines with hundreds or thousands of characters
    which is not very editor-friendly. To avoid this, addjust the tool to
    group values 8 per line.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 4a1162a9fa..3243bccfe8 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -385,7 +385,12 @@ class DtbPlatdata(object):
                 else:
                     for val in prop.value:
                         vals.append(get_value(prop.type, val))
-                self.buf(', '.join(vals))
+
+                # Put 8 values per line to avoid very long lines.
+                for i in xrange(0, len(vals), 8):
+                    if i:
+                        self.buf(',\n\t\t')
+                    self.buf(', '.join(vals[i:i + 8]))
                 self.buf('}')
             else:
                 self.buf(get_value(prop.type, prop.value))
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 8b95c4124f..5040f23325 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -146,7 +146,8 @@ static struct dtd_sandbox_spl_test dtv_spl_test = {
 \t.bytearray\t\t= {0x6, 0x0, 0x0},
 \t.byteval\t\t= 0x5,
 \t.intval\t\t\t= 0x1,
-\t.longbytearray\t\t= {0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10, 0x11},
+\t.longbytearray\t\t= {0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10,
+\t\t0x11},
 \t.stringval\t\t= "message",
 \t.boolval\t\t= true,
 \t.intarray\t\t= {0x2, 0x3, 0x4, 0x0},
@@ -162,7 +163,8 @@ static struct dtd_sandbox_spl_test dtv_spl_test2 = {
 \t.bytearray\t\t= {0x1, 0x23, 0x34},
 \t.byteval\t\t= 0x8,
 \t.intval\t\t\t= 0x3,
-\t.longbytearray\t\t= {0x9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
+\t.longbytearray\t\t= {0x9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+\t\t0x0},
 \t.stringval\t\t= "message2",
 \t.intarray\t\t= {0x5, 0x0, 0x0, 0x0},
 \t.stringarray\t\t= {"another", "multi-word", "message"},

commit ef2715f40346912f83d23e5012e37341373f4af8
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:48 2017 -0600

    dtoc: Add a 64-bit type and a way to convert cells into 64 bits
    
    When dealing with multi-cell values we need a type that can hold this
    value. Add this and a function to process it from a list of cell values.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 041a33188f..4a1162a9fa 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -38,6 +38,7 @@ TYPE_NAMES = {
     fdt.TYPE_BYTE: 'unsigned char',
     fdt.TYPE_STRING: 'const char *',
     fdt.TYPE_BOOL: 'bool',
+    fdt.TYPE_INT64: 'fdt64_t',
 }
 
 STRUCT_PREFIX = 'dtd_'
@@ -95,6 +96,8 @@ def get_value(ftype, value):
         return '"%s"' % value
     elif ftype == fdt.TYPE_BOOL:
         return 'true'
+    elif ftype == fdt.TYPE_INT64:
+        return '%#x' % value
 
 def get_compat_name(node):
     """Get a node's first compatible string as a C identifier
diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 49409a62ec..ffd42ce541 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -21,7 +21,7 @@ import libfdt
 # so it is fairly efficient.
 
 # A list of types we support
-(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL) = range(4)
+(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL, TYPE_INT64) = range(5)
 
 def CheckErr(errnum, msg):
     if errnum:
diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py
index b9dfae8d0e..bec6ee947a 100644
--- a/tools/dtoc/fdt_util.py
+++ b/tools/dtoc/fdt_util.py
@@ -29,6 +29,20 @@ def fdt32_to_cpu(val):
         val = val.encode('raw_unicode_escape')
     return struct.unpack('>I', val)[0]
 
+def fdt_cells_to_cpu(val, cells):
+    """Convert one or two cells to a long integer
+
+    Args:
+        Value to convert (array of one or more 4-character strings)
+
+    Return:
+        A native-endian long value
+    """
+    out = long(fdt32_to_cpu(val[0]))
+    if cells == 2:
+        out = out << 32 | fdt32_to_cpu(val[1])
+    return out
+
 def EnsureCompiled(fname):
     """Compile an fdt .dts source file into a .dtb binary blob if needed.
 

commit f08a0424b9ff3c735665fce37050a81d43c290f0
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:47 2017 -0600

    dtoc: Adjust Node to record its parent
    
    We need to be able to search back up the tree for #address-cells and
     #size-cells. Record the parent of each node to make this easier.
    
    Signed-off-by: Simon Glass <sjg@chromium.org>
    Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
    Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 63a32ea2d7..49409a62ec 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -174,8 +174,9 @@ class Node:
         props: A dict of properties for this node, each a Prop object.
             Keyed by property name
     """
-    def __init__(self, fdt, offset, name, path):
+    def __init__(self, fdt, parent, offset, name, path):
         self._fdt = fdt
+        self.parent = parent
         self._offset = offset
         self.name = name
         self.path = path
@@ -217,7 +218,7 @@ class Node:
             sep = '' if self.path[-1] == '/' else '/'
             name = self._fdt._fdt_obj.get_name(offset)
             path = self.path + sep + name
-            node = Node(self._fdt, offset, name, path)
+            node = Node(self._fdt, self, offset, name, path)
             self.subnodes.append(node)
 
             node.Scan()
@@ -279,7 +280,7 @@ class Fdt:
 
         TODO(sjg@chromium.org): Implement the 'root' parameter
         """
-        self._root = self.Node(self, 0, '/', '/')
+        self._root = self.Node(self, None, 0, '/', '/')
         self._root.Scan()
 
     def GetRoot(self):
@@ -386,7 +387,7 @@ class Fdt:
         return libfdt.fdt_off_dt_struct(self._fdt) + offset
 
     @classmethod
-    def Node(self, fdt, offset, name, path):
+    def Node(self, fdt, parent, offset, name, path):
         """Create a new node
 
         This is used by Fdt.Scan() to create a new node using the correct
@@ -394,11 +395,12 @@ class Fdt:
 
         Args:
             fdt: Fdt object
+            parent: Parent node, or None if this is the root node
             offset: Offset of node
             name: Node name
             path: Full path to node
         """
-        node = Node(fdt, offset, name, path)
+        node = Node(fdt, parent, offset, name, path)
         return node
 
 def FdtScan(fname):

commit 1b0ab182b451476d8a7cca9536707930e6ab6b4d
Author: Simon Glass <sjg@chromium.org>
Date:   Tue Aug 29 14:15:46 2017 -0600

    fdt: Sync libfdt up to upstream
    
    Add upstream changes to U-Boot:
    
    - new pylibfdt functions
    - fdt_setprop_placeholder()
    
    Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/lib/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 80a3212141..3dc775261f 100644
--- a/lib/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
@@ -228,8 +228,8 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name)
 	return 0;
 }
 
-int fdt_setprop(void *fdt, int nodeoffset, const char *name,
-		const void *val, int len)
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data)
 {
 	struct fdt_property *prop;
 	int err;
@@ -242,8 +242,22 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 	if (err)
 		return err;
 
+	*prop_data = prop->data;
+	return 0;
+}
+
+int fdt_setprop(void *fdt, int nodeoffset, const char *name,
+		const void *val, int len)
+{
+	void *prop_data;
+	int err;
+
+	err = fdt_setprop_placeholder(fdt, nodeoffset, name, len, &prop_data);
+	if (err)
+		return err;
+
 	if (len)
-		memcpy(prop->data, val, len);
+		memcpy(prop_data, val, len);
 	return 0;
 }
 
diff --git a/lib/libfdt/libfdt.h b/lib/libfdt/libfdt.h
index f3f9cad184..6af94cb3f7 100644
--- a/lib/libfdt/libfdt.h
+++ b/lib/libfdt/libfdt.h
@@ -1404,6 +1404,37 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name);
 int fdt_setprop(void *fdt, int nodeoffset, const char *name,
 		const void *val, int len);
 
+/**
+ * fdt_setprop _placeholder - allocate space for a property
+ * @fdt: pointer to the device tree blob
+ * @nodeoffset: offset of the node whose property to change
+ * @name: name of the property to change
+ * @len: length of the property value
+ * @prop_data: return pointer to property data
+ *
+ * fdt_setprop_placeholer() allocates the named property in the given node.
+ * If the property exists it is resized. In either case a pointer to the
+ * property data is returned.
+ *
+ * This function may insert or delete data from the blob, and will
+ * therefore change the offsets of some existing nodes.
+ *
+ * returns:
+ *	0, on success
+ *	-FDT_ERR_NOSPACE, there is insufficient free space in the blob to
+ *		contain the new property value
+ *	-FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_BADMAGIC,
+ *	-FDT_ERR_BADVERSION,
+ *	-FDT_ERR_BADSTATE,
+ *	-FDT_ERR_BADSTRUCTURE,
+ *	-FDT_ERR_BADLAYOUT,
+ *	-FDT_ERR_TRUNCATED, standard meanings
+ */
+int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name,
+			    int len, void **prop_data);
+
 /**
  * fdt_setprop_u32 - set a property to a 32-bit integer
  * @fdt: pointer to the device tree blob
diff --git a/lib/libfdt/pylibfdt/libfdt.i b/lib/libfdt/pylibfdt/libfdt.i
index 3b11bb0c95..6c44996c31 100644
--- a/lib/libfdt/pylibfdt/libfdt.i
+++ b/lib/libfdt/pylibfdt/libfdt.i
@@ -128,6 +128,23 @@ class Fdt:
         self._fdt = bytearray(data)
         check_err(fdt_check_header(self._fdt));
 
+    def subnode_offset(self, parentoffset, name, quiet=()):
+        """Get the offset of a named subnode
+
+        Args:
+            parentoffset: Offset of the parent node to check
+            name: Name of the required subnode, e.g. 'subnode@1'
+            quiet: Errors to ignore (empty to raise on all errors)
+
+        Returns:
+            The node offset of the found node, if any
+
+        Raises
+            FdtException if there is no node with that name, or other error
+        """
+        return check_err(fdt_subnode_offset(self._fdt, parentoffset, name),
+                         quiet)
+
     def path_offset(self, path, quiet=()):
         """Get the offset for a given path
 
@@ -302,6 +319,47 @@ class Fdt:
             return pdata
         return bytearray(pdata[0])
 
+    def get_phandle(self, nodeoffset):
+        """Get the phandle of a node
+
+        Args:
+            nodeoffset: Node offset to check
+
+        Returns:
+            phandle of node, or 0 if the node has no phandle or another error
+            occurs
+        """
+        return fdt_get_phandle(self._fdt, nodeoffset)
+
+    def parent_offset(self, nodeoffset, quiet=()):
+        """Get the offset of a node's parent
+
+        Args:
+            nodeoffset: Node offset to check
+            quiet: Errors to ignore (empty to raise on all errors)
+
+        Returns:
+            The offset of the parent node, if any
+
+        Raises:
+            FdtException if no parent found or other error occurs
+        """
+        return check_err(fdt_parent_offset(self._fdt, nodeoffset), quiet)
+
+    def node_offset_by_phandle(self, phandle, quiet=()):
+        """Get the offset of a node with the given phandle
+
+        Args:
+            phandle: Phandle to search for
+            quiet: Errors to ignore (empty to raise on all errors)
+
+        Returns:
+            The offset of node with that phandle, if any
+
+        Raises:
+            FdtException if no node found or other error occurs
+        """
+        return check_err(fdt_node_offset_by_phandle(self._fdt, phandle), quiet)
 
 class Property:
     """Holds a device tree property name and value.

commit 9946fd65b27597d65138f554c9b2a2c4e81cf6a0
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:53:56 2017 +0800

    rockchip: rk3328: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Cover-letter:
    move rockchip sdram driver to driver/ram
    
    move all the Rockchip sdram driver which support CONFIG_RAM into
    driver/ram folder
    END
    Change-Id: I21aafa8c85ff65e3cb3f318cfeaefed059424c56
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3328/Makefile b/arch/arm/mach-rockchip/rk3328/Makefile
index 72873e29e6..bbab036a12 100644
--- a/arch/arm/mach-rockchip/rk3328/Makefile
+++ b/arch/arm/mach-rockchip/rk3328/Makefile
@@ -6,5 +6,4 @@
 
 obj-y += clk_rk3328.o
 obj-y += rk3328.o
-obj-y += sdram_rk3328.o
 obj-y += syscon_rk3328.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index bc76a2077b..45b5fe7247 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -8,4 +8,5 @@ obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
+obj-$(CONFIG_ROCKCHIP_RK3328) = sdram_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3328/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3328/sdram_rk3328.c
rename to drivers/ram/rockchip/sdram_rk3328.c

commit a75d2fbe75e094b9f878d4208341ccc5cd12766f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:52:08 2017 +0800

    rockchip: rk3288: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Change-Id: I8196b81c7a05d2c041e7d1c7cdd38321b0dc38b8
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3288/Makefile b/arch/arm/mach-rockchip/rk3288/Makefile
index b5b28efbe8..a0033a0d84 100644
--- a/arch/arm/mach-rockchip/rk3288/Makefile
+++ b/arch/arm/mach-rockchip/rk3288/Makefile
@@ -6,5 +6,4 @@
 
 obj-y += clk_rk3288.o
 obj-y += rk3288.o
-obj-y += sdram_rk3288.o
 obj-y += syscon_rk3288.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 355384987e..bc76a2077b 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -7,4 +7,5 @@
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
+obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
rename to drivers/ram/rockchip/sdram_rk3288.c

commit 44af99509b810bb514be720a7632cad414135ae3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:48:53 2017 +0800

    rockchip: rk3188: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Change-Id: Icd3308c253646171d29a1a2295f528f95c623202
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile
index 2dc9511de7..7fa010405b 100644
--- a/arch/arm/mach-rockchip/rk3188/Makefile
+++ b/arch/arm/mach-rockchip/rk3188/Makefile
@@ -6,6 +6,5 @@
 
 ifndef CONFIG_TPL_BUILD
 obj-y += clk_rk3188.o
-obj-y += sdram_rk3188.o
 obj-y += syscon_rk3188.o
 endif
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 52cc809379..355384987e 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,5 +5,6 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3188/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3188/sdram_rk3188.c
rename to drivers/ram/rockchip/sdram_rk3188.c

commit d0b1becdab1c3db806870f24f282b9b4063bf5e4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 17:44:12 2017 +0800

    rockchip: rk3399: move sdram driver to driver/ram
    
    Since we have CONFIG_RAM framwork and its driver folder, move the driver
    into it.
    
    Change-Id: I53f9de99b2b1180b74cca948847105be66d540f2
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/Makefile b/arch/arm/mach-rockchip/rk3399/Makefile
index 793ce31c12..98ebeac340 100644
--- a/arch/arm/mach-rockchip/rk3399/Makefile
+++ b/arch/arm/mach-rockchip/rk3399/Makefile
@@ -6,5 +6,4 @@
 
 obj-y += clk_rk3399.o
 obj-y += rk3399.o
-obj-y += sdram_rk3399.o
 obj-y += syscon_rk3399.o
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index 06ab2fd6a4..52cc809379 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -6,3 +6,4 @@
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
+obj-$(CONFIG_ROCKCHIP_RK3399) = sdram_rk3399.o
diff --git a/arch/arm/mach-rockchip/rk3399/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
similarity index 100%
rename from arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
rename to drivers/ram/rockchip/sdram_rk3399.c

commit 26b9591560b21019004b3b997a83fd50daddb0b4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jul 21 18:00:36 2017 +0800

    rockchip: dts: rk3229: remove dram channel info
    
    The dram channel info will be auto detect by the driver,
    we do not need it.
    
    Cover-letter:
    rockchip: rk3229: add sdram and sd support
    
    Add sdram driver for rk3229 and other fix like pinctrl and sd node.
    
    END
    Change-Id: I4cb96150fe3cf68278b9c1cb6585e1bf3d4df4b1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index e66d6bf5fd..fe4abe9d6c 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -40,7 +40,6 @@
 };
 
 &dmc {
-	rockchip,sdram-channel = /bits/ 8 <1 10 3 2 1 0 15 15>;
 	rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
 		0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
 		0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1

commit 64da4a852bda5ac711b9c9bbdd89691ff87ff1ba
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 9 17:33:41 2017 +0800

    rockchip: rk322x: add sdram driver
    
    Add driver for rk322x to support sdram initialize in SPL.
    
    Series-version: 3
    Series-changes: 3
    - move rk332x sdram driver to driver/ram
    - do the ram init in TPL instad of SPL
    
    Change-Id: I44f5fed275d65e7758efd38f1a5124a8d9698a7d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
new file mode 100644
index 0000000000..b10de76411
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
@@ -0,0 +1,581 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef _ASM_ARCH_SDRAM_RK322X_H
+#define _ASM_ARCH_SDRAM_RK322X_H
+
+#include <common.h>
+
+enum {
+	DDR3		= 3,
+	LPDDR2		= 5,
+	LPDDR3		= 6,
+	UNUSED		= 0xFF,
+};
+
+struct rk322x_sdram_channel {
+	/*
+	 * bit width in address, eg:
+	 * 8 banks using 3 bit to address,
+	 * 2 cs using 1 bit to address.
+	 */
+	u8 rank;
+	u8 col;
+	u8 bk;
+	u8 bw;
+	u8 dbw;
+	u8 row_3_4;
+	u8 cs0_row;
+	u8 cs1_row;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	/*
+	 * For of-platdata, which would otherwise convert this into two
+	 * byte-swapped integers. With a size of 9 bytes, this struct will
+	 * appear in of-platdata as a byte array.
+	 *
+	 * If OF_PLATDATA enabled, need to add a dummy byte in dts.(i.e 0xff)
+	 */
+	u8 dummy;
+#endif
+};
+
+struct rk322x_ddr_pctl {
+	u32 scfg;
+	u32 sctl;
+	u32 stat;
+	u32 intrstat;
+	u32 reserved0[(0x40 - 0x10) / 4];
+	u32 mcmd;
+	u32 powctl;
+	u32 powstat;
+	u32 cmdtstat;
+	u32 cmdtstaten;
+	u32 reserved1[(0x60 - 0x54) / 4];
+	u32 mrrcfg0;
+	u32 mrrstat0;
+	u32 mrrstat1;
+	u32 reserved2[(0x7c - 0x6c) / 4];
+
+	u32 mcfg1;
+	u32 mcfg;
+	u32 ppcfg;
+	u32 mstat;
+	u32 lpddr2zqcfg;
+	u32 reserved3;
+
+	u32 dtupdes;
+	u32 dtuna;
+	u32 dtune;
+	u32 dtuprd0;
+	u32 dtuprd1;
+	u32 dtuprd2;
+	u32 dtuprd3;
+	u32 dtuawdt;
+	u32 reserved4[(0xc0 - 0xb4) / 4];
+
+	u32 togcnt1u;
+	u32 tinit;
+	u32 trsth;
+	u32 togcnt100n;
+	u32 trefi;
+	u32 tmrd;
+	u32 trfc;
+	u32 trp;
+	u32 trtw;
+	u32 tal;
+	u32 tcl;
+	u32 tcwl;
+	u32 tras;
+	u32 trc;
+	u32 trcd;
+	u32 trrd;
+	u32 trtp;
+	u32 twr;
+	u32 twtr;
+	u32 texsr;
+	u32 txp;
+	u32 txpdll;
+	u32 tzqcs;
+	u32 tzqcsi;
+	u32 tdqs;
+	u32 tcksre;
+	u32 tcksrx;
+	u32 tcke;
+	u32 tmod;
+	u32 trstl;
+	u32 tzqcl;
+	u32 tmrr;
+	u32 tckesr;
+	u32 tdpd;
+	u32 tref_mem_ddr3;
+	u32 reserved5[(0x180 - 0x14c) / 4];
+	u32 ecccfg;
+	u32 ecctst;
+	u32 eccclr;
+	u32 ecclog;
+	u32 reserved6[(0x200 - 0x190) / 4];
+	u32 dtuwactl;
+	u32 dturactl;
+	u32 dtucfg;
+	u32 dtuectl;
+	u32 dtuwd0;
+	u32 dtuwd1;
+	u32 dtuwd2;
+	u32 dtuwd3;
+	u32 dtuwdm;
+	u32 dturd0;
+	u32 dturd1;
+	u32 dturd2;
+	u32 dturd3;
+	u32 dtulfsrwd;
+	u32 dtulfsrrd;
+	u32 dtueaf;
+	/* dfi control registers */
+	u32 dfitctrldelay;
+	u32 dfiodtcfg;
+	u32 dfiodtcfg1;
+	u32 dfiodtrankmap;
+	/* dfi write data registers */
+	u32 dfitphywrdata;
+	u32 dfitphywrlat;
+	u32 reserved7[(0x260 - 0x258) / 4];
+	u32 dfitrddataen;
+	u32 dfitphyrdlat;
+	u32 reserved8[(0x270 - 0x268) / 4];
+	u32 dfitphyupdtype0;
+	u32 dfitphyupdtype1;
+	u32 dfitphyupdtype2;
+	u32 dfitphyupdtype3;
+	u32 dfitctrlupdmin;
+	u32 dfitctrlupdmax;
+	u32 dfitctrlupddly;
+	u32 reserved9;
+	u32 dfiupdcfg;
+	u32 dfitrefmski;
+	u32 dfitctrlupdi;
+	u32 reserved10[(0x2ac - 0x29c) / 4];
+	u32 dfitrcfg0;
+	u32 dfitrstat0;
+	u32 dfitrwrlvlen;
+	u32 dfitrrdlvlen;
+	u32 dfitrrdlvlgateen;
+	u32 dfiststat0;
+	u32 dfistcfg0;
+	u32 dfistcfg1;
+	u32 reserved11;
+	u32 dfitdramclken;
+	u32 dfitdramclkdis;
+	u32 dfistcfg2;
+	u32 dfistparclr;
+	u32 dfistparlog;
+	u32 reserved12[(0x2f0 - 0x2e4) / 4];
+
+	u32 dfilpcfg0;
+	u32 reserved13[(0x300 - 0x2f4) / 4];
+	u32 dfitrwrlvlresp0;
+	u32 dfitrwrlvlresp1;
+	u32 dfitrwrlvlresp2;
+	u32 dfitrrdlvlresp0;
+	u32 dfitrrdlvlresp1;
+	u32 dfitrrdlvlresp2;
+	u32 dfitrwrlvldelay0;
+	u32 dfitrwrlvldelay1;
+	u32 dfitrwrlvldelay2;
+	u32 dfitrrdlvldelay0;
+	u32 dfitrrdlvldelay1;
+	u32 dfitrrdlvldelay2;
+	u32 dfitrrdlvlgatedelay0;
+	u32 dfitrrdlvlgatedelay1;
+	u32 dfitrrdlvlgatedelay2;
+	u32 dfitrcmd;
+	u32 reserved14[(0x3f8 - 0x340) / 4];
+	u32 ipvr;
+	u32 iptr;
+};
+check_member(rk322x_ddr_pctl, iptr, 0x03fc);
+
+struct rk322x_ddr_phy {
+	u32 ddrphy_reg[0x100];
+};
+
+struct rk322x_pctl_timing {
+	u32 togcnt1u;
+	u32 tinit;
+	u32 trsth;
+	u32 togcnt100n;
+	u32 trefi;
+	u32 tmrd;
+	u32 trfc;
+	u32 trp;
+	u32 trtw;
+	u32 tal;
+	u32 tcl;
+	u32 tcwl;
+	u32 tras;
+	u32 trc;
+	u32 trcd;
+	u32 trrd;
+	u32 trtp;
+	u32 twr;
+	u32 twtr;
+	u32 texsr;
+	u32 txp;
+	u32 txpdll;
+	u32 tzqcs;
+	u32 tzqcsi;
+	u32 tdqs;
+	u32 tcksre;
+	u32 tcksrx;
+	u32 tcke;
+	u32 tmod;
+	u32 trstl;
+	u32 tzqcl;
+	u32 tmrr;
+	u32 tckesr;
+	u32 tdpd;
+	u32 trefi_mem_ddr3;
+};
+
+struct rk322x_phy_timing {
+	u32 mr[4];
+	u32 mr11;
+	u32 bl;
+	u32 cl_al;
+};
+
+struct rk322x_msch_timings {
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 activate;
+	u32 devtodev;
+};
+
+struct rk322x_service_sys {
+	u32 id_coreid;
+	u32 id_revisionid;
+	u32 ddrconf;
+	u32 ddrtiming;
+	u32 ddrmode;
+	u32 readlatency;
+	u32 activate;
+	u32 devtodev;
+};
+
+struct rk322x_base_params {
+	struct rk322x_msch_timings noc_timing;
+	u32 ddrconfig;
+	u32 ddr_freq;
+	u32 dramtype;
+	/*
+	 * unused for rk322x
+	 */
+	u32 stride;
+	u32 odt;
+};
+
+/* PCT_DFISTCFG0 */
+#define DFI_INIT_START			(1 << 0)
+#define DFI_DATA_BYTE_DISABLE_EN	(1 << 2)
+
+/* PCT_DFISTCFG1 */
+#define DFI_DRAM_CLK_SR_EN		(1 << 0)
+#define DFI_DRAM_CLK_DPD_EN		(1 << 1)
+
+/* PCT_DFISTCFG2 */
+#define DFI_PARITY_INTR_EN		(1 << 0)
+#define DFI_PARITY_EN			(1 << 1)
+
+/* PCT_DFILPCFG0 */
+#define TLP_RESP_TIME_SHIFT		16
+#define LP_SR_EN			(1 << 8)
+#define LP_PD_EN			(1 << 0)
+
+/* PCT_DFITCTRLDELAY */
+#define TCTRL_DELAY_TIME_SHIFT		0
+
+/* PCT_DFITPHYWRDATA */
+#define TPHY_WRDATA_TIME_SHIFT		0
+
+/* PCT_DFITPHYRDLAT */
+#define TPHY_RDLAT_TIME_SHIFT		0
+
+/* PCT_DFITDRAMCLKDIS */
+#define TDRAM_CLK_DIS_TIME_SHIFT	0
+
+/* PCT_DFITDRAMCLKEN */
+#define TDRAM_CLK_EN_TIME_SHIFT		0
+
+/* PCTL_DFIODTCFG */
+#define RANK0_ODT_WRITE_SEL		(1 << 3)
+#define RANK1_ODT_WRITE_SEL		(1 << 11)
+
+/* PCTL_DFIODTCFG1 */
+#define ODT_LEN_BL8_W_SHIFT		16
+
+/* PUBL_ACDLLCR */
+#define ACDLLCR_DLLDIS			(1 << 31)
+#define ACDLLCR_DLLSRST			(1 << 30)
+
+/* PUBL_DXDLLCR */
+#define DXDLLCR_DLLDIS			(1 << 31)
+#define DXDLLCR_DLLSRST			(1 << 30)
+
+/* PUBL_DLLGCR */
+#define DLLGCR_SBIAS			(1 << 30)
+
+/* PUBL_DXGCR */
+#define DQSRTT				(1 << 9)
+#define DQRTT				(1 << 10)
+
+/* PIR */
+#define PIR_INIT			(1 << 0)
+#define PIR_DLLSRST			(1 << 1)
+#define PIR_DLLLOCK			(1 << 2)
+#define PIR_ZCAL			(1 << 3)
+#define PIR_ITMSRST			(1 << 4)
+#define PIR_DRAMRST			(1 << 5)
+#define PIR_DRAMINIT			(1 << 6)
+#define PIR_QSTRN			(1 << 7)
+#define PIR_RVTRN			(1 << 8)
+#define PIR_ICPC			(1 << 16)
+#define PIR_DLLBYP			(1 << 17)
+#define PIR_CTLDINIT			(1 << 18)
+#define PIR_CLRSR			(1 << 28)
+#define PIR_LOCKBYP			(1 << 29)
+#define PIR_ZCALBYP			(1 << 30)
+#define PIR_INITBYP			(1u << 31)
+
+/* PGCR */
+#define PGCR_DFTLMT_SHIFT		3
+#define PGCR_DFTCMP_SHIFT		2
+#define PGCR_DQSCFG_SHIFT		1
+#define PGCR_ITMDMD_SHIFT		0
+
+/* PGSR */
+#define PGSR_IDONE			(1 << 0)
+#define PGSR_DLDONE			(1 << 1)
+#define PGSR_ZCDONE			(1 << 2)
+#define PGSR_DIDONE			(1 << 3)
+#define PGSR_DTDONE			(1 << 4)
+#define PGSR_DTERR			(1 << 5)
+#define PGSR_DTIERR			(1 << 6)
+#define PGSR_DFTERR			(1 << 7)
+#define PGSR_RVERR			(1 << 8)
+#define PGSR_RVEIRR			(1 << 9)
+
+/* PTR0 */
+#define PRT_ITMSRST_SHIFT		18
+#define PRT_DLLLOCK_SHIFT		6
+#define PRT_DLLSRST_SHIFT		0
+
+/* PTR1 */
+#define PRT_DINIT0_SHIFT		0
+#define PRT_DINIT1_SHIFT		19
+
+/* PTR2 */
+#define PRT_DINIT2_SHIFT		0
+#define PRT_DINIT3_SHIFT		17
+
+/* DCR */
+#define DDRMD_LPDDR			0
+#define DDRMD_DDR			1
+#define DDRMD_DDR2			2
+#define DDRMD_DDR3			3
+#define DDRMD_LPDDR2_LPDDR3		4
+#define DDRMD_MASK			7
+#define DDRMD_SHIFT			0
+#define PDQ_MASK			7
+#define PDQ_SHIFT			4
+
+/* DXCCR */
+#define DQSNRES_MASK			0xf
+#define DQSNRES_SHIFT			8
+#define DQSRES_MASK			0xf
+#define DQSRES_SHIFT			4
+
+/* DTPR */
+#define TDQSCKMAX_SHIFT			27
+#define TDQSCKMAX_MASK			7
+#define TDQSCK_SHIFT			24
+#define TDQSCK_MASK			7
+
+/* DSGCR */
+#define DQSGX_SHIFT			5
+#define DQSGX_MASK			7
+#define DQSGE_SHIFT			8
+#define DQSGE_MASK			7
+
+/* SCTL */
+#define INIT_STATE			0
+#define CFG_STATE			1
+#define GO_STATE			2
+#define SLEEP_STATE			3
+#define WAKEUP_STATE			4
+
+/* STAT */
+#define LP_TRIG_SHIFT			4
+#define LP_TRIG_MASK			7
+#define PCTL_STAT_MASK			7
+#define INIT_MEM			0
+#define CONFIG				1
+#define CONFIG_REQ			2
+#define ACCESS				3
+#define ACCESS_REQ			4
+#define LOW_POWER			5
+#define LOW_POWER_ENTRY_REQ		6
+#define LOW_POWER_EXIT_REQ		7
+
+/* ZQCR*/
+#define PD_OUTPUT_SHIFT			0
+#define PU_OUTPUT_SHIFT			5
+#define PD_ONDIE_SHIFT			10
+#define PU_ONDIE_SHIFT			15
+#define ZDEN_SHIFT			28
+
+/* DDLGCR */
+#define SBIAS_BYPASS			(1 << 23)
+
+/* MCFG */
+#define MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT	24
+#define PD_IDLE_SHIFT			8
+#define MDDR_EN				(2 << 22)
+#define LPDDR2_EN			(3 << 22)
+#define LPDDR3_EN			(1 << 22)
+#define DDR2_EN				(0 << 5)
+#define DDR3_EN				(1 << 5)
+#define LPDDR2_S2			(0 << 6)
+#define LPDDR2_S4			(1 << 6)
+#define MDDR_LPDDR2_BL_2		(0 << 20)
+#define MDDR_LPDDR2_BL_4		(1 << 20)
+#define MDDR_LPDDR2_BL_8		(2 << 20)
+#define MDDR_LPDDR2_BL_16		(3 << 20)
+#define DDR2_DDR3_BL_4			0
+#define DDR2_DDR3_BL_8			1
+#define TFAW_SHIFT			18
+#define PD_EXIT_SLOW			(0 << 17)
+#define PD_EXIT_FAST			(1 << 17)
+#define PD_TYPE_SHIFT			16
+#define BURSTLENGTH_SHIFT		20
+
+/* POWCTL */
+#define POWER_UP_START			(1 << 0)
+
+/* POWSTAT */
+#define POWER_UP_DONE			(1 << 0)
+
+/* MCMD */
+enum {
+	DESELECT_CMD			= 0,
+	PREA_CMD,
+	REF_CMD,
+	MRS_CMD,
+	ZQCS_CMD,
+	ZQCL_CMD,
+	RSTL_CMD,
+	MRR_CMD				= 8,
+	DPDE_CMD,
+};
+
+#define BANK_ADDR_MASK			7
+#define BANK_ADDR_SHIFT			17
+#define CMD_ADDR_MASK			0x1fff
+#define CMD_ADDR_SHIFT			4
+
+#define LPDDR23_MA_SHIFT		4
+#define LPDDR23_MA_MASK			0xff
+#define LPDDR23_OP_SHIFT		12
+#define LPDDR23_OP_MASK			0xff
+
+#define START_CMD			(1u << 31)
+
+/* DDRPHY REG */
+enum {
+	/* DDRPHY_REG0 */
+	SOFT_RESET_MASK				= 3,
+	SOFT_DERESET_ANALOG			= 1 << 2,
+	SOFT_DERESET_DIGITAL			= 1 << 3,
+	SOFT_RESET_SHIFT			= 2,
+
+	/* DDRPHY REG1 */
+	PHY_DDR3				= 0,
+	PHY_DDR2				= 1,
+	PHY_LPDDR3				= 2,
+	PHY_LPDDR2				= 3,
+
+	PHT_BL_8				= 1 << 2,
+	PHY_BL_4				= 0 << 2,
+
+	/* DDRPHY_REG2 */
+	MEMORY_SELECT_DDR3			= 0 << 0,
+	MEMORY_SELECT_LPDDR3			= 2 << 0,
+	MEMORY_SELECT_LPDDR2			= 3 << 0,
+	DQS_SQU_CAL_SEL_CS0_CS1			= 0 << 4,
+	DQS_SQU_CAL_SEL_CS1			= 1 << 4,
+	DQS_SQU_CAL_SEL_CS0			= 2 << 4,
+	DQS_SQU_CAL_NORMAL_MODE			= 0 << 1,
+	DQS_SQU_CAL_BYPASS_MODE			= 1 << 1,
+	DQS_SQU_CAL_START			= 1 << 0,
+	DQS_SQU_NO_CAL				= 0 << 0,
+};
+
+/* CK pull up/down driver strength control */
+enum {
+	PHY_RON_RTT_DISABLE = 0,
+	PHY_RON_RTT_451OHM = 1,
+	PHY_RON_RTT_225OHM,
+	PHY_RON_RTT_150OHM,
+	PHY_RON_RTT_112OHM,
+	PHY_RON_RTT_90OHM,
+	PHY_RON_RTT_75OHM,
+	PHY_RON_RTT_64OHM = 7,
+
+	PHY_RON_RTT_56OHM = 16,
+	PHY_RON_RTT_50OHM,
+	PHY_RON_RTT_45OHM,
+	PHY_RON_RTT_41OHM,
+	PHY_RON_RTT_37OHM,
+	PHY_RON_RTT_34OHM,
+	PHY_RON_RTT_33OHM,
+	PHY_RON_RTT_30OHM = 23,
+
+	PHY_RON_RTT_28OHM = 24,
+	PHY_RON_RTT_26OHM,
+	PHY_RON_RTT_25OHM,
+	PHY_RON_RTT_23OHM,
+	PHY_RON_RTT_22OHM,
+	PHY_RON_RTT_21OHM,
+	PHY_RON_RTT_20OHM,
+	PHY_RON_RTT_19OHM = 31,
+};
+
+/* DQS squelch DLL delay */
+enum {
+	DQS_DLL_NO_DELAY	= 0,
+	DQS_DLL_22P5_DELAY,
+	DQS_DLL_45_DELAY,
+	DQS_DLL_67P5_DELAY,
+	DQS_DLL_90_DELAY,
+	DQS_DLL_112P5_DELAY,
+	DQS_DLL_135_DELAY,
+	DQS_DLL_157P5_DELAY,
+};
+
+/* GRF_SOC_CON0 */
+#define GRF_DDR_16BIT_EN		(((0x1 << 0) << 16) | (0x1 << 0))
+#define GRF_DDR_32BIT_EN		(((0x1 << 0) << 16) | (0x0 << 0))
+#define GRF_MSCH_NOC_16BIT_EN		(((0x1 << 7) << 16) | (0x1 << 7))
+#define GRF_MSCH_NOC_32BIT_EN		(((0x1 << 7) << 16) | (0x0 << 7))
+
+#define GRF_DDRPHY_BUFFEREN_CORE_EN	(((0x1 << 8) << 16) | (0x0 << 8))
+#define GRF_DDRPHY_BUFFEREN_CORE_DIS	(((0x1 << 8) << 16) | (0x1 << 8))
+
+#define GRF_DDR3_EN			(((0x1 << 6) << 16) | (0x1 << 6))
+#define GRF_LPDDR2_3_EN			(((0x1 << 6) << 16) | (0x0 << 6))
+
+#define PHY_DRV_ODT_SET(n)		(((n) << 4) | (n))
+#define DDR3_DLL_RESET			(1 << 8)
+
+#endif /* _ASM_ARCH_SDRAM_RK322X_H */
diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile
index b09d03c2c9..06ab2fd6a4 100644
--- a/drivers/ram/rockchip/Makefile
+++ b/drivers/ram/rockchip/Makefile
@@ -5,3 +5,4 @@
 #
 
 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
+obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o
diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
new file mode 100644
index 0000000000..cc3138b21d
--- /dev/null
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -0,0 +1,855 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0
+ */
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <errno.h>
+#include <ram.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk322x.h>
+#include <asm/arch/grf_rk322x.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram_rk322x.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/uart.h>
+#include <asm/arch/sdram_common.h>
+#include <asm/types.h>
+#include <linux/err.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+struct chan_info {
+	struct rk322x_ddr_pctl *pctl;
+	struct rk322x_ddr_phy *phy;
+	struct rk322x_service_sys *msch;
+};
+
+struct dram_info {
+	struct chan_info chan[1];
+	struct ram_info info;
+	struct clk ddr_clk;
+	struct rk322x_cru *cru;
+	struct rk322x_grf *grf;
+};
+
+struct rk322x_sdram_params {
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+		struct dtd_rockchip_rk3228_dmc of_plat;
+#endif
+		struct rk322x_sdram_channel ch[1];
+		struct rk322x_pctl_timing pctl_timing;
+		struct rk322x_phy_timing phy_timing;
+		struct rk322x_base_params base;
+		int num_channels;
+		struct regmap *map;
+};
+
+#ifdef CONFIG_TPL_BUILD
+/*
+ * [7:6]  bank(n:n bit bank)
+ * [5:4]  row(13+n)
+ * [3]    cs(0:1 cs, 1:2 cs)
+ * [2:1]  bank(n:n bit bank)
+ * [0]    col(10+n)
+ */
+const char ddr_cfg_2_rbc[] = {
+	((0 << 6) | (0 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 1),
+	((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 2),
+	((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 2),
+	((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 2),
+	((0 << 6) | (0 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (1 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (2 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (3 << 4) | (0 << 3) | (1 << 2) | 0),
+	((0 << 6) | (2 << 4) | (0 << 3) | (0 << 2) | 1),
+	((1 << 6) | (1 << 4) | (0 << 3) | (0 << 2) | 2),
+	((1 << 6) | (1 << 4) | (0 << 3) | (0 << 2) | 1),
+	((0 << 6) | (3 << 4) | (1 << 3) | (1 << 2) | 1),
+	((0 << 6) | (3 << 4) | (1 << 3) | (1 << 2) | 0),
+};
+
+static void copy_to_reg(u32 *dest, const u32 *src, u32 n)
+{
+	int i;
+
+	for (i = 0; i < n / sizeof(u32); i++) {
+		writel(*src, dest);
+		src++;
+		dest++;
+	}
+}
+
+void phy_pctrl_reset(struct rk322x_cru *cru,
+		     struct rk322x_ddr_phy *ddr_phy)
+{
+	rk_clrsetreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
+			1 << DDRCTRL_SRST_SHIFT | 1 << DDRPHY_PSRST_SHIFT |
+			1 << DDRPHY_SRST_SHIFT,
+			1 << DDRCTRL_PSRST_SHIFT | 1 << DDRCTRL_SRST_SHIFT |
+			1 << DDRPHY_PSRST_SHIFT | 1 << DDRPHY_SRST_SHIFT);
+
+	rockchip_udelay(10);
+
+	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRPHY_PSRST_SHIFT |
+						  1 << DDRPHY_SRST_SHIFT);
+	rockchip_udelay(10);
+
+	rk_clrreg(&cru->cru_softrst_con[5], 1 << DDRCTRL_PSRST_SHIFT |
+						  1 << DDRCTRL_SRST_SHIFT);
+	rockchip_udelay(10);
+
+	clrbits_le32(&ddr_phy->ddrphy_reg[0],
+		     SOFT_RESET_MASK << SOFT_RESET_SHIFT);
+	rockchip_udelay(10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0],
+		     SOFT_DERESET_ANALOG);
+	rockchip_udelay(5);
+	setbits_le32(&ddr_phy->ddrphy_reg[0],
+		     SOFT_DERESET_DIGITAL);
+
+	rockchip_udelay(1);
+}
+
+void phy_dll_bypass_set(struct rk322x_ddr_phy *ddr_phy, u32 freq)
+{
+	u32 tmp;
+
+	setbits_le32(&ddr_phy->ddrphy_reg[0x13], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x26], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x36], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x10);
+	setbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x10);
+
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x14], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x27], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x37], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x47], 0x8);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0x57], 0x8);
+
+	if (freq <= 400)
+		setbits_le32(&ddr_phy->ddrphy_reg[0xa4], 0x1f);
+	else
+		clrbits_le32(&ddr_phy->ddrphy_reg[0xa4], 0x1f);
+
+	if (freq <= 680)
+		tmp = 3;
+	else
+		tmp = 2;
+
+	writel(tmp, &ddr_phy->ddrphy_reg[0x28]);
+	writel(tmp, &ddr_phy->ddrphy_reg[0x38]);
+	writel(tmp, &ddr_phy->ddrphy_reg[0x48]);
+	writel(tmp, &ddr_phy->ddrphy_reg[0x58]);
+}
+
+static void send_command(struct rk322x_ddr_pctl *pctl,
+			 u32 rank, u32 cmd, u32 arg)
+{
+	writel((START_CMD | (rank << 20) | arg | cmd), &pctl->mcmd);
+	rockchip_udelay(1);
+	while (readl(&pctl->mcmd) & START_CMD)
+		;
+}
+
+static void memory_init(struct chan_info *chan,
+			struct rk322x_sdram_params *sdram_params)
+{
+	struct rk322x_ddr_pctl *pctl = chan->pctl;
+	u32 dramtype = sdram_params->base.dramtype;
+
+	if (dramtype == DDR3) {
+		send_command(pctl, 3, DESELECT_CMD, 0);
+		rockchip_udelay(1);
+		send_command(pctl, 3, PREA_CMD, 0);
+		send_command(pctl, 3, MRS_CMD,
+			     (0x02 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (sdram_params->phy_timing.mr[2] & CMD_ADDR_MASK) <<
+			     CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, MRS_CMD,
+			     (0x03 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (sdram_params->phy_timing.mr[3] & CMD_ADDR_MASK) <<
+			     CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, MRS_CMD,
+			     (0x01 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     (sdram_params->phy_timing.mr[1] & CMD_ADDR_MASK) <<
+			     CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, MRS_CMD,
+			     (0x00 & BANK_ADDR_MASK) << BANK_ADDR_SHIFT |
+			     ((sdram_params->phy_timing.mr[0] |
+			       DDR3_DLL_RESET) &
+			     CMD_ADDR_MASK) << CMD_ADDR_SHIFT);
+
+		send_command(pctl, 3, ZQCL_CMD, 0);
+	} else {
+		send_command(pctl, 3, MRS_CMD,
+			     (0x63 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0 & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		rockchip_udelay(10);
+		send_command(pctl, 3, MRS_CMD,
+			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0xff & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		rockchip_udelay(1);
+		send_command(pctl, 3, MRS_CMD,
+			     (0x10 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (0xff & LPDDR23_OP_MASK) <<
+			     LPDDR23_OP_SHIFT);
+		rockchip_udelay(1);
+		send_command(pctl, 3, MRS_CMD,
+			     (1 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (sdram_params->phy_timing.mr[1] &
+			      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		send_command(pctl, 3, MRS_CMD,
+			     (2 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (sdram_params->phy_timing.mr[2] &
+			      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		send_command(pctl, 3, MRS_CMD,
+			     (3 & LPDDR23_MA_MASK) << LPDDR23_MA_SHIFT |
+			     (sdram_params->phy_timing.mr[3] &
+			      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+		if (dramtype == LPDDR3)
+			send_command(pctl, 3, MRS_CMD, (11 & LPDDR23_MA_MASK) <<
+				     LPDDR23_MA_SHIFT |
+				     (sdram_params->phy_timing.mr11 &
+				      LPDDR23_OP_MASK) << LPDDR23_OP_SHIFT);
+	}
+}
+
+static u32 data_training(struct chan_info *chan)
+{
+	struct rk322x_ddr_phy *ddr_phy = chan->phy;
+	struct rk322x_ddr_pctl *pctl = chan->pctl;
+	u32 value;
+	u32 bw = (readl(&ddr_phy->ddrphy_reg[0]) >> 4) & 0xf;
+	u32 ret;
+
+	/* disable auto refresh */
+	value = readl(&pctl->trefi) | (1 << 31);
+	writel(1 << 31, &pctl->trefi);
+
+	clrsetbits_le32(&ddr_phy->ddrphy_reg[2], 0x30,
+			DQS_SQU_CAL_SEL_CS0);
+	setbits_le32(&ddr_phy->ddrphy_reg[2], DQS_SQU_CAL_START);
+
+	rockchip_udelay(30);
+	ret = readl(&ddr_phy->ddrphy_reg[0xff]);
+
+	clrbits_le32(&ddr_phy->ddrphy_reg[2],
+		     DQS_SQU_CAL_START);
+
+	/*
+	 * since data training will take about 20us, so send some auto
+	 * refresh(about 7.8us) to complement the lost time
+	 */
+	send_command(pctl, 3, PREA_CMD, 0);
+	send_command(pctl, 3, REF_CMD, 0);
+
+	writel(value, &pctl->trefi);
+
+	if (ret & 0x10) {
+		ret = -1;
+	} else {
+		ret = (ret & 0xf) ^ bw;
+		ret = (ret == 0) ? 0 : -1;
+	}
+	return ret;
+}
+
+static void move_to_config_state(struct rk322x_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK)
+				!= ACCESS)
+				;
+			/*
+			 * If at low power state, need wakeup first, and then
+			 * enter the config, so fallthrough
+			 */
+		case ACCESS:
+			/* fallthrough */
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG)
+				;
+			break;
+		case CONFIG:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void move_to_access_state(struct rk322x_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MASK;
+		switch (state) {
+		case LOW_POWER:
+			writel(WAKEUP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case ACCESS:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+static void move_to_lowpower_state(struct rk322x_ddr_pctl *pctl)
+{
+	unsigned int state;
+
+	while (1) {
+		state = readl(&pctl->stat) & PCTL_STAT_MASK;
+		switch (state) {
+		case INIT_MEM:
+			writel(CFG_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != CONFIG)
+				;
+			/* fallthrough */
+		case CONFIG:
+			writel(GO_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) != ACCESS)
+				;
+			break;
+		case ACCESS:
+			writel(SLEEP_STATE, &pctl->sctl);
+			while ((readl(&pctl->stat) & PCTL_STAT_MASK) !=
+			       LOW_POWER)
+				;
+			break;
+		case LOW_POWER:
+			return;
+		default:
+			break;
+		}
+	}
+}
+
+/* pctl should in low power mode when call this function */
+static void phy_softreset(struct dram_info *dram)
+{
+	struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy;
+	struct rk322x_grf *grf = dram->grf;
+
+	writel(GRF_DDRPHY_BUFFEREN_CORE_EN, &grf->soc_con[0]);
+	clrbits_le32(&ddr_phy->ddrphy_reg[0], 0x3 << 2);
+	rockchip_udelay(1);
+	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 2);
+	rockchip_udelay(5);
+	setbits_le32(&ddr_phy->ddrphy_reg[0], 1 << 3);
+	writel(GRF_DDRPHY_BUFFEREN_CORE_DIS, &grf->soc_con[0]);
+}
+
+/* bw: 2: 32bit, 1:16bit */
+static void set_bw(struct dram_info *dram, u32 bw)
+{
+	struct rk322x_ddr_pctl *pctl = dram->chan[0].pctl;
+	struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy;
+	struct rk322x_grf *grf = dram->grf;
+
+	if (bw == 1) {
+		setbits_le32(&pctl->ppcfg, 1);
+		clrbits_le32(&ddr_phy->ddrphy_reg[0], 0xc << 4);
+		writel(GRF_MSCH_NOC_16BIT_EN, &grf->soc_con[0]);
+		clrbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x8);
+		clrbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x8);
+	} else {
+		clrbits_le32(&pctl->ppcfg, 1);
+		setbits_le32(&ddr_phy->ddrphy_reg[0], 0xf << 4);
+		writel(GRF_DDR_32BIT_EN | GRF_MSCH_NOC_32BIT_EN,
+		       &grf->soc_con[0]);
+		setbits_le32(&ddr_phy->ddrphy_reg[0x46], 0x8);
+		setbits_le32(&ddr_phy->ddrphy_reg[0x56], 0x8);
+	}
+}
+
+static void pctl_cfg(struct rk322x_ddr_pctl *pctl,
+		     struct rk322x_sdram_params *sdram_params,
+		     struct rk322x_grf *grf)
+{
+	u32 burst_len;
+	u32 bw;
+	u32 dramtype = sdram_params->base.dramtype;
+
+	if (sdram_params->ch[0].bw == 2)
+		bw = GRF_DDR_32BIT_EN | GRF_MSCH_NOC_32BIT_EN;
+	else
+		bw = GRF_MSCH_NOC_16BIT_EN;
+
+	writel(DFI_INIT_START | DFI_DATA_BYTE_DISABLE_EN, &pctl->dfistcfg0);
+	writel(DFI_DRAM_CLK_SR_EN | DFI_DRAM_CLK_DPD_EN, &pctl->dfistcfg1);
+	writel(DFI_PARITY_INTR_EN | DFI_PARITY_EN, &pctl->dfistcfg2);
+	writel(0x51010, &pctl->dfilpcfg0);
+
+	writel(1, &pctl->dfitphyupdtype0);
+	writel(0x0d, &pctl->dfitphyrdlat);
+	writel(0, &pctl->dfitphywrdata);
+
+	writel(0, &pctl->dfiupdcfg);
+	copy_to_reg(&pctl->togcnt1u, &sdram_params->pctl_timing.togcnt1u,
+		    sizeof(struct rk322x_pctl_timing));
+	if (dramtype == DDR3) {
+		writel((1 << 3) | (1 << 11),
+		       &pctl->dfiodtcfg);
+		writel(7 << 16, &pctl->dfiodtcfg1);
+		writel((readl(&pctl->tcl) - 1) / 2 - 1, &pctl->dfitrddataen);
+		writel((readl(&pctl->tcwl) - 1) / 2 - 1, &pctl->dfitphywrlat);
+		writel(500, &pctl->trsth);
+		writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT | DDR3_EN |
+		       DDR2_DDR3_BL_8 | (6 - 4) << TFAW_SHIFT | PD_EXIT_SLOW |
+		       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+		       &pctl->mcfg);
+		writel(bw | GRF_DDR3_EN, &grf->soc_con[0]);
+	} else {
+		if (sdram_params->phy_timing.bl & PHT_BL_8)
+			burst_len = MDDR_LPDDR2_BL_8;
+		else
+			burst_len = MDDR_LPDDR2_BL_4;
+
+		writel(readl(&pctl->tcl) / 2 - 1, &pctl->dfitrddataen);
+		writel(readl(&pctl->tcwl) / 2 - 1, &pctl->dfitphywrlat);
+		writel(0, &pctl->trsth);
+		if (dramtype == LPDDR2) {
+			writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT |
+			       LPDDR2_S4 | LPDDR2_EN | burst_len |
+			       (6 - 4) << TFAW_SHIFT | PD_EXIT_FAST |
+			       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+			       &pctl->mcfg);
+			writel(0, &pctl->dfiodtcfg);
+			writel(0, &pctl->dfiodtcfg1);
+		} else {
+			writel(0 << MDDR_LPDDR2_CLK_STOP_IDLE_SHIFT |
+			       LPDDR2_S4 | LPDDR3_EN | burst_len |
+			       (6 - 4) << TFAW_SHIFT | PD_EXIT_FAST |
+			       1 << PD_TYPE_SHIFT | 0 << PD_IDLE_SHIFT,
+			       &pctl->mcfg);
+			writel((1 << 3) | (1 << 2), &pctl->dfiodtcfg);
+			writel((7 << 16) | 4, &pctl->dfiodtcfg1);
+		}
+		writel(bw | GRF_LPDDR2_3_EN, &grf->soc_con[0]);
+	}
+	setbits_le32(&pctl->scfg, 1);
+}
+
+static void phy_cfg(struct chan_info *chan,
+		    struct rk322x_sdram_params *sdram_params)
+{
+	struct rk322x_ddr_phy *ddr_phy = chan->phy;
+	struct rk322x_service_sys *axi_bus = chan->msch;
+	struct rk322x_msch_timings *noc_timing = &sdram_params->base.noc_timing;
+	struct rk322x_phy_timing *phy_timing = &sdram_params->phy_timing;
+	struct rk322x_pctl_timing *pctl_timing = &sdram_params->pctl_timing;
+	u32 cmd_drv, clk_drv, dqs_drv, dqs_odt;
+
+	writel(noc_timing->ddrtiming, &axi_bus->ddrtiming);
+	writel(noc_timing->ddrmode, &axi_bus->ddrmode);
+	writel(noc_timing->readlatency, &axi_bus->readlatency);
+	writel(noc_timing->activate, &axi_bus->activate);
+	writel(noc_timing->devtodev, &axi_bus->devtodev);
+
+	switch (sdram_params->base.dramtype) {
+	case DDR3:
+		writel(PHY_DDR3 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]);
+		break;
+	case LPDDR2:
+		writel(PHY_LPDDR2 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]);
+		break;
+	default:
+		writel(PHY_LPDDR2 | phy_timing->bl, &ddr_phy->ddrphy_reg[1]);
+		break;
+	}
+
+	writel(phy_timing->cl_al, &ddr_phy->ddrphy_reg[0xb]);
+	writel(pctl_timing->tcwl, &ddr_phy->ddrphy_reg[0xc]);
+
+	cmd_drv = PHY_RON_RTT_34OHM;
+	clk_drv = PHY_RON_RTT_45OHM;
+	dqs_drv = PHY_RON_RTT_34OHM;
+	if (sdram_params->base.dramtype == LPDDR2)
+		dqs_odt = PHY_RON_RTT_DISABLE;
+	else
+		dqs_odt = PHY_RON_RTT_225OHM;
+
+	writel(cmd_drv, &ddr_phy->ddrphy_reg[0x11]);
+	clrsetbits_le32(&ddr_phy->ddrphy_reg[0x12], (0x1f << 3), cmd_drv << 3);
+	writel(clk_drv, &ddr_phy->ddrphy_reg[0x16]);
+	writel(clk_drv, &ddr_phy->ddrphy_reg[0x18]);
+
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x20]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x2f]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x30]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x3f]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x40]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x4f]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x50]);
+	writel(dqs_drv, &ddr_phy->ddrphy_reg[0x5f]);
+
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x21]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x2e]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x31]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x3e]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x41]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x4e]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x51]);
+	writel(dqs_odt, &ddr_phy->ddrphy_reg[0x5e]);
+}
+
+void dram_cfg_rbc(struct chan_info *chan,
+		  struct rk322x_sdram_params *sdram_params)
+{
+	char noc_config;
+	int i = 0;
+	struct rk322x_sdram_channel *config = &sdram_params->ch[0];
+	struct rk322x_service_sys *axi_bus = chan->msch;
+
+	move_to_config_state(chan->pctl);
+
+	if ((config->rank == 2) && (config->cs1_row == config->cs0_row)) {
+		if ((config->col + config->bw) == 12) {
+			i = 14;
+			goto finish;
+		} else if ((config->col + config->bw) == 11) {
+			i = 15;
+			goto finish;
+		}
+	}
+	noc_config = ((config->cs0_row - 13) << 4) | ((config->bk - 2) << 2) |
+				(config->col + config->bw - 11);
+	for (i = 0; i < 11; i++) {
+		if (noc_config == ddr_cfg_2_rbc[i])
+			break;
+	}
+
+	if (i < 11)
+		goto finish;
+
+	noc_config = ((config->bk - 2) << 6) | ((config->cs0_row - 13) << 4) |
+				(config->col + config->bw - 11);
+
+	for (i = 11; i < 14; i++) {
+		if (noc_config == ddr_cfg_2_rbc[i])
+			break;
+	}
+	if (i < 14)
+		goto finish;
+	else
+		i = 0;
+
+finish:
+	writel(i, &axi_bus->ddrconf);
+	move_to_access_state(chan->pctl);
+}
+
+static void dram_all_config(const struct dram_info *dram,
+			    struct rk322x_sdram_params *sdram_params)
+{
+	struct rk322x_sdram_channel *info = &sdram_params->ch[0];
+	u32 sys_reg = 0;
+
+	sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT;
+	sys_reg |= (1 - 1) << SYS_REG_NUM_CH_SHIFT;
+	sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0);
+	sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(0);
+	sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(0);
+	sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(0);
+	sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(0);
+	sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(0);
+	sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(0);
+	sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(0);
+	sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(0);
+
+	writel(sys_reg, &dram->grf->os_reg[2]);
+}
+
+#define TEST_PATTEN	0x5aa5f00f
+
+static int dram_cap_detect(struct dram_info *dram,
+			   struct rk322x_sdram_params *sdram_params)
+{
+	u32 bw, row, col, addr;
+	u32 ret = 0;
+	struct rk322x_service_sys *axi_bus = dram->chan[0].msch;
+
+	if (sdram_params->base.dramtype == DDR3)
+		sdram_params->ch[0].dbw = 1;
+	else
+		sdram_params->ch[0].dbw = 2;
+
+	move_to_config_state(dram->chan[0].pctl);
+	/* bw detect */
+	set_bw(dram, 2);
+	if (data_training(&dram->chan[0]) == 0) {
+		bw = 2;
+	} else {
+		bw = 1;
+		set_bw(dram, 1);
+		move_to_lowpower_state(dram->chan[0].pctl);
+		phy_softreset(dram);
+		move_to_config_state(dram->chan[0].pctl);
+		if (data_training(&dram->chan[0])) {
+			printf("BW detect error\n");
+			ret = -EINVAL;
+		}
+	}
+	sdram_params->ch[0].bw = bw;
+	sdram_params->ch[0].bk = 3;
+
+	if (bw == 2)
+		writel(6, &axi_bus->ddrconf);
+	else
+		writel(3, &axi_bus->ddrconf);
+	move_to_access_state(dram->chan[0].pctl);
+	for (col = 11; col >= 9; col--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE +
+			(1 << (col + bw - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (col == 8) {
+		printf("Col detect error\n");
+		ret = -EINVAL;
+		goto out;
+	} else {
+		sdram_params->ch[0].col = col;
+	}
+
+	writel(10, &axi_bus->ddrconf);
+
+	/* Detect row*/
+	for (row = 16; row >= 12; row--) {
+		writel(0, CONFIG_SYS_SDRAM_BASE);
+		addr = CONFIG_SYS_SDRAM_BASE + (1u << (row + 11 + 3 - 1));
+		writel(TEST_PATTEN, addr);
+		if ((readl(addr) == TEST_PATTEN) &&
+		    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+			break;
+	}
+	if (row == 11) {
+		printf("Row detect error\n");
+		ret = -EINVAL;
+	} else {
+		sdram_params->ch[0].cs1_row = row;
+		sdram_params->ch[0].row_3_4 = 0;
+		sdram_params->ch[0].cs0_row = row;
+	}
+	/* cs detect */
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(TEST_PATTEN, CONFIG_SYS_SDRAM_BASE + (1u << 30));
+	writel(~TEST_PATTEN, CONFIG_SYS_SDRAM_BASE + (1u << 30) + 4);
+	if ((readl(CONFIG_SYS_SDRAM_BASE + (1u << 30)) == TEST_PATTEN) &&
+	    (readl(CONFIG_SYS_SDRAM_BASE) == 0))
+		sdram_params->ch[0].rank = 2;
+	else
+		sdram_params->ch[0].rank = 1;
+out:
+	return ret;
+}
+
+static int sdram_init(struct dram_info *dram,
+		      struct rk322x_sdram_params *sdram_params)
+{
+	int ret;
+
+	ret = clk_set_rate(&dram->ddr_clk,
+			   sdram_params->base.ddr_freq * MHz * 2);
+	if (ret < 0) {
+		printf("Could not set DDR clock\n");
+		return ret;
+	}
+
+	phy_pctrl_reset(dram->cru, dram->chan[0].phy);
+	phy_dll_bypass_set(dram->chan[0].phy, sdram_params->base.ddr_freq);
+	pctl_cfg(dram->chan[0].pctl, sdram_params, dram->grf);
+	phy_cfg(&dram->chan[0], sdram_params);
+	writel(POWER_UP_START, &dram->chan[0].pctl->powctl);
+	while (!(readl(&dram->chan[0].pctl->powstat) & POWER_UP_DONE))
+		;
+	memory_init(&dram->chan[0], sdram_params);
+	move_to_access_state(dram->chan[0].pctl);
+	ret = dram_cap_detect(dram, sdram_params);
+	if (ret)
+		goto out;
+	dram_cfg_rbc(&dram->chan[0], sdram_params);
+	dram_all_config(dram, sdram_params);
+out:
+	return ret;
+}
+
+static int rk322x_dmc_ofdata_to_platdata(struct udevice *dev)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	struct rk322x_sdram_params *params = dev_get_platdata(dev);
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(dev);
+	int ret;
+
+	params->num_channels = 1;
+
+	ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing",
+				   (u32 *)&params->pctl_timing,
+				   sizeof(params->pctl_timing) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,pctl-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,phy-timing",
+				   (u32 *)&params->phy_timing,
+				   sizeof(params->phy_timing) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,phy-timing\n", __func__);
+		return -EINVAL;
+	}
+	ret = fdtdec_get_int_array(blob, node, "rockchip,sdram-params",
+				   (u32 *)&params->base,
+				   sizeof(params->base) / sizeof(u32));
+	if (ret) {
+		printf("%s: Cannot read rockchip,sdram-params\n", __func__);
+		return -EINVAL;
+	}
+	ret = regmap_init_mem(dev, &params->map);
+	if (ret)
+		return ret;
+#endif
+
+	return 0;
+}
+#endif /* CONFIG_TPL_BUILD */
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+static int conv_of_platdata(struct udevice *dev)
+{
+	struct rk322x_sdram_params *plat = dev_get_platdata(dev);
+	struct dtd_rockchip_rk322x_dmc *of_plat = &plat->of_plat;
+	int ret;
+
+	memcpy(&plat->pctl_timing, of_plat->rockchip_pctl_timing,
+	       sizeof(plat->pctl_timing));
+	memcpy(&plat->phy_timing, of_plat->rockchip_phy_timing,
+	       sizeof(plat->phy_timing));
+	memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));
+
+	plat->num_channels = 1;
+	ret = regmap_init_mem_platdata(dev, of_plat->reg,
+				       ARRAY_SIZE(of_plat->reg) / 2,
+				       &plat->map);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+#endif
+
+static int rk322x_dmc_probe(struct udevice *dev)
+{
+#ifdef CONFIG_TPL_BUILD
+	struct rk322x_sdram_params *plat = dev_get_platdata(dev);
+	int ret;
+	struct udevice *dev_clk;
+#endif
+	struct dram_info *priv = dev_get_priv(dev);
+
+	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+#ifdef CONFIG_TPL_BUILD
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	ret = conv_of_platdata(dev);
+	if (ret)
+		return ret;
+#endif
+
+	priv->chan[0].msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH);
+	priv->chan[0].pctl = regmap_get_range(plat->map, 0);
+	priv->chan[0].phy = regmap_get_range(plat->map, 1);
+	ret = rockchip_get_clk(&dev_clk);
+	if (ret)
+		return ret;
+	priv->ddr_clk.id = CLK_DDR;
+	ret = clk_request(dev_clk, &priv->ddr_clk);
+	if (ret)
+		return ret;
+
+	priv->cru = rockchip_get_cru();
+	if (IS_ERR(priv->cru))
+		return PTR_ERR(priv->cru);
+	ret = sdram_init(priv, plat);
+	if (ret)
+		return ret;
+#else
+	priv->info.base = CONFIG_SYS_SDRAM_BASE;
+	priv->info.size = rockchip_sdram_size(
+			(phys_addr_t)&priv->grf->os_reg[2]);
+#endif
+
+	return 0;
+}
+
+static int rk322x_dmc_get_info(struct udevice *dev, struct ram_info *info)
+{
+	struct dram_info *priv = dev_get_priv(dev);
+
+	*info = priv->info;
+
+	return 0;
+}
+
+static struct ram_ops rk322x_dmc_ops = {
+	.get_info = rk322x_dmc_get_info,
+};
+
+static const struct udevice_id rk322x_dmc_ids[] = {
+	{ .compatible = "rockchip,rk3228-dmc" },
+	{ }
+};
+
+U_BOOT_DRIVER(dmc_rk322x) = {
+	.name = "rockchip_rk322x_dmc",
+	.id = UCLASS_RAM,
+	.of_match = rk322x_dmc_ids,
+	.ops = &rk322x_dmc_ops,
+#ifdef CONFIG_TPL_BUILD
+	.ofdata_to_platdata = rk322x_dmc_ofdata_to_platdata,
+#endif
+	.probe = rk322x_dmc_probe,
+	.priv_auto_alloc_size = sizeof(struct dram_info),
+#ifdef CONFIG_TPL_BUILD
+	.platdata_auto_alloc_size = sizeof(struct rk322x_sdram_params),
+#endif
+};
+

commit 95830dbaf7b37c1bbaf44c1e5d1b5d3990dd9b89
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 16:31:14 2017 +0800

    rockchip: pinctrl: use fdtdec_get_int_array() to get interrupt
    
    Not all the udevice have a available DT node, eg. rksdmmc@ff500000.blk
    which add by mmc_bind(), if we use dev_read_u32_array(), the interface
    will use the ofnode directly and end with:
            assert(ofnode_valid(node));
    
    Use fdtdec_get_int_array() instead.
    
    Change-Id: I1fc90ad0bd22451856e97be7728ba9996bf3bc0c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3036.c b/drivers/pinctrl/rockchip/pinctrl_rk3036.c
index 94f6d7ad40..9215d6c96e 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3036.c
@@ -193,7 +193,8 @@ static int rk3036_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3188.c b/drivers/pinctrl/rockchip/pinctrl_rk3188.c
index 692d8e298d..65c1f665ea 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3188.c
@@ -370,7 +370,8 @@ static int rk3188_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
index a21b64044b..721aeab966 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
@@ -597,7 +597,8 @@ static int rk3288_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
index c74163e026..f3e7eec9e4 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
@@ -249,7 +249,8 @@ static int rk3328_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
index cab268c7d6..d93b90310b 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
@@ -350,7 +350,8 @@ static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 
diff --git a/drivers/pinctrl/rockchip/pinctrl_rv1108.c b/drivers/pinctrl/rockchip/pinctrl_rv1108.c
index cda94f4957..bdf3910a88 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rv1108.c
@@ -108,7 +108,8 @@ static int rv1108_pinctrl_get_periph_id(struct udevice *dev,
 	u32 cell[3];
 	int ret;
 
-	ret = dev_read_u32_array(periph, "interrupts", cell, ARRAY_SIZE(cell));
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
+				   "interrupts", cell, ARRAY_SIZE(cell));
 	if (ret < 0)
 		return -EINVAL;
 

commit cf5771bef769584ed72cab79014c2a58ec6715d7
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:38:22 2017 +0800

    rockchip: evb-rk3229: don't remove clock-names node in spl
    
    The SPL need 'ciu-sample' for dwmmc driver when enable higher
    speed.
    
    Change-Id: I1e24f2551e118edf3d175abc5514826ef988a148
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 2fe2061535..df5a36855c 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -42,7 +42,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_TPL_DM=y
 CONFIG_REGMAP=y

commit 6c639845dad3c58df6689dc6c3f8a34957d5402e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:36:45 2017 +0800

    rockchip: rk322x: add CLK_EMMC_SAMPLE clock support
    
    Change-Id: I332e9ad79f8f9ce51108d3e914f8e439a5ff8b74
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index d7f6a3c313..431972ef18 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -220,6 +220,7 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate,
 	switch (periph) {
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[11]);
 		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
 		con = readl(&cru->cru_clksel_con[12]);
@@ -261,6 +262,7 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
 	switch (periph) {
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		rk_clrsetreg(&cru->cru_clksel_con[11],
 			     EMMC_PLL_MASK,
 			     mux << EMMC_PLL_SHIFT);

commit a35feaca3c37f0f5e9e897cee8eae1dcecbca98e
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:33:22 2017 +0800

    rockchip: evb-rk322x: update defconfig with tpl and optee support
    
    Enable all the options for TPL/SPL and OPTEE.
    
    Cover-letter:
    rockchip: add tpl and OPTEE support for rk3229
    
    Add some generic options for TPL support for arm 32bit, and then
    and TPL support for rk3229(cortex-A7), and then add OPTEE support
    in SPL.
    
    END
    
    Change-Id: I8db693ccf552161a558a620261152908afb6dc56
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 668e01a8e5..2fe2061535 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -4,14 +4,27 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ROCKCHIP_RK322X=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds"
+CONFIG_TPL_TEXT_BASE=0x10081004
+CONFIG_TPL_MAX_SIZE=28672
+CONFIG_TPL_STACK=0x10088000
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
 CONFIG_TARGET_EVB_RK3229=y
-CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3229/fit_spl_optee.its"
 # CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SPL_OPTEE_SUPPORT=y
 CONFIG_FASTBOOT=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_CMD_FASTBOOT=y
@@ -28,14 +41,19 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
@@ -44,12 +62,14 @@ CONFIG_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK322X=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y

commit afbbd4f78e8b3a347d408e4c4c7213b248922aec
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 10:01:06 2017 +0800

    rockchip: evb-rk3229: add README file for OP-TEE support
    
    Detail of step by step to bring up the board with OP-TEE support.
    
    Change-Id: If3156fa3fb3ede6270f871dcf0e518aced202443
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3229/README b/board/rockchip/evb_rk3229/README
new file mode 100644
index 0000000000..93328c75b2
--- /dev/null
+++ b/board/rockchip/evb_rk3229/README
@@ -0,0 +1,72 @@
+Get the Source and prebuild binary
+==================================
+
+  > mkdir ~/evb_rk3229
+  > cd ~/evb_rk3229
+  > git clone git://git.denx.de/u-boot.git
+  > git clone https://github.com/OP-TEE/optee_os.git
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
+
+Compile the OP-TEE
+===============
+
+  > cd optee_os
+  > make clean
+  > make CROSS_COMPILE_ta_arm32=arm-none-eabi- PLATFORM=rockchip-rk322x
+  Get tee.bin in this step, copy it to U-Boot root dir:
+  > cp out/arm-plat-rockchip/core/tee-pager.bin ../u-boot/tee.bin
+
+Compile the U-Boot
+==================
+
+  > cd ../u-boot
+  > export CROSS_COMPILE=arm-linux-gnueabihf-
+  > export ARCH=arm
+  > make evb-rk3229_defconfig
+  > make
+  > make u-boot.itb
+
+  Get tpl/u-boot-tpl.bin, spl/u-boot-spl.bin and u-boot.itb in this step.
+
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
+  > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
+  > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+  > cd ../u-boot
+  > tools/mkimage -n rk322x -T rksd -d tpl/u-boot-spl.bin idbloader.img
+  > cat spl/u-boot-spl.bin >> idbloader.img
+
+  Get idbloader.img in this step.
+
+Flash the image to eMMC
+=======================
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > cd ..
+  > rkdeveloptool db rkbin/rk32/rk322x_loader_v1.04.232.bin
+  > rkdeveloptool wl 64 u-boot/idbloader.img
+  > rkdeveloptool wl 0x4000 u-boot/u-boot.itb
+  > rkdeveloptool rd
+
+Flash the image to SD card
+==========================
+  > dd if=u-boot/idbloader.img of=/dev/sdb seek=64
+  > dd if=u-boot/u-boot.itb of=/dev/sdb seek=16384
+
+You should be able to get U-Boot log message with OP-TEE boot info.
+
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option

commit 3e3311d94f22271953949bf17e31d5b793c38b00
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:39:57 2017 +0800

    rockchip: evb-rk3229: add fit source file for itb
    
    We package U-Boot and OP-TEE into one itb file for SPL,
    so that we can support OP-TEE in SPL.
    
    Change-Id: I2c20333d6f3bb11ac1ec4bbb32c901028fb15d64
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3229/fit_spl_optee.its b/board/rockchip/evb_rk3229/fit_spl_optee.its
new file mode 100644
index 0000000000..ed93d443f9
--- /dev/null
+++ b/board/rockchip/evb_rk3229/fit_spl_optee.its
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot fit source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "Simple image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot";
+			data = /incbin/("../../../u-boot-nodtb.bin");
+			type = "standalone";
+			arch = "arm";
+			compression = "none";
+			load = <0x61000000>;
+		};
+		optee@1 {
+			description = "ARM Trusted Firmware";
+			data = /incbin/("../../../tee.bin");
+			type = "firmware";
+			arch = "arm";
+			compression = "none";
+			load = <0x68400000>;
+			entry = <0x68400000>;
+		};
+		fdt@1 {
+			description = "rk3229 dtb";
+			data = /incbin/("../../../u-boot.dtb");
+			type = "flat_dt";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "conf@1";
+		conf@1 {
+			description = "RK3399 evb";
+			firmware = "uboot@1";
+			loadables = "optee@1";
+			fdt = "fdt@1";
+		};
+	};
+};

commit 821035d8ed28fc01b526002c2db261cf5a584f6b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:29:39 2017 +0800

    rockchip: rk322x: dts: enable uart2 for SPL/TPL
    
    When we use DM_SERIAL for serial driver, we need enable the
    dts node for the debug console.
    
    Change-Id: I02261a1b1851c57d5ce310beb1896cb8450aacc0
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 64f1c2d7da..e66d6bf5fd 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -84,6 +84,7 @@
 };
 
 &uart2 {
+	u-boot,dm-pre-reloc;
 	status = "okay";
 };
 

commit 1bd2b131ff8c89a661ba9c192f30205bcad28163
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:22:42 2017 +0800

    spl: add support to booting with OP-TEE
    
    OP-TEE is an open source trusted OS, in armv7, its loading and
    running are like this:
    loading:
    - SPL load both OP-TEE and U-Boot
    running:
    - SPL run into OP-TEE in secure mode;
    - OP-TEE run into U-Boot in non-secure mode;
    
    More detail:
    https://github.com/OP-TEE/optee_os
    and search for 'boot arguments' for detail entry parameter in:
    core/arch/arm/kernel/generic_entry_a32.S
    
    Change-Id: I1344a35dd11bd69ca00e9b99909e1eb610648d86
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index b05ec21ed6..601d1262de 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -706,6 +706,13 @@ config SPL_ATF_TEXT_BASE
 	help
 	  This is the base address in memory for ATF BL31 text and entry point.
 
+config SPL_OPTEE_SUPPORT
+	bool "Support OP-TEE Trusted OS"
+	depends on ARM
+	help
+	  OP-TEE is an open source Trusted OS  which is loaded by SPL.
+	  More detail at: https://github.com/OP-TEE/optee_os
+
 config TPL
 	bool
 	depends on SUPPORT_TPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index e229947b53..8abd15c003 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o
 obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o
 obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o
 obj-$(CONFIG_$(SPL_TPL_)ATF_SUPPORT) += spl_atf.o
+obj-$(CONFIG_$(SPL_TPL_)OPTEE_SUPPORT) += spl_optee.o
 obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o
 obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o
 obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 8b219ba690..d0459bec3f 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -430,6 +430,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 		bl31_entry();
 	}
 
+	if (CONFIG_IS_ENABLED(OPTEE_SUPPORT)) {
+		debug("loaded - jumping to U-Boot via OP-TEE.\n");
+		spl_optee_entry(0, 0, 0, (void *)spl_image.entry_point);
+	}
+
 	debug("loaded - jumping to U-Boot...\n");
 #ifdef CONFIG_BOOTSTAGE_STASH
 	int ret;
diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S
new file mode 100644
index 0000000000..4f7f8ba474
--- /dev/null
+++ b/common/spl/spl_optee.S
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+ENTRY(spl_optee_entry)
+	ldr lr, =CONFIG_SYS_TEXT_BASE
+	mov pc, r3
+ENDPROC(spl_optee_entry)
diff --git a/include/spl.h b/include/spl.h
index ce4cf0abbe..13d46ed780 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -269,6 +269,15 @@ int spl_mmc_load_image(struct spl_image_info *spl_image,
 
 void bl31_entry(void);
 
+/**
+ * spl_optee_entry - entry function for optee
+ * entry arg0, pagestore
+ * entry arg1, (ARMv7 standard bootarg #1)
+ * entry arg2, device tree address, (ARMv7 standard bootarg #2)
+ * entry arg3, non-secure entry address (ARMv7 bootarg #0)
+ */
+void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
+
 /**
  * board_return_to_bootrom - allow for boards to continue with the boot ROM
  *

commit 4fe1bec3dce93d58393e8254fae706ff9a22d6e4
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:19:14 2017 +0800

    sysreset: enable driver support in SPL/TPL
    
    SPL/TPL also need use sysreset for some feature like panic callback.
    
    Change-Id: Icbca8b06d36c4dfd504950b566053fa3e2255050
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index a6d48e8a66..a61a7d37c6 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -13,6 +13,24 @@ config SYSRESET
 	  to effect a reset. The uclass will try all available drivers when
 	  reset_walk() is called.
 
+config SPL_SYSRESET
+	bool "Enable support for system reset drivers in SPL mode"
+	depends on SYSRESET && SPL_DM
+	help
+	  Enable system reset drivers which can be used to reset the CPU or
+	  board. Each driver can provide a reset method which will be called
+	  to effect a reset. The uclass will try all available drivers when
+	  reset_walk() is called.
+
+config TPL_SYSRESET
+	bool "Enable support for system reset drivers in TPL mode"
+	depends on SYSRESET && TPL_DM
+	help
+	  Enable system reset drivers which can be used to reset the CPU or
+	  board. Each driver can provide a reset method which will be called
+	  to effect a reset. The uclass will try all available drivers when
+	  reset_walk() is called.
+
 if SYSRESET
 
 config SYSRESET_PSCI
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 476d361297..ce161a7165 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
 obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
 obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o

commit 06d27531d0a219b6756b6049f369f3958e76d965
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:10:33 2017 +0800

    rockchip: rk322x: enable tpl support
    
    Move original spl to tpl, and add spl to load next stage firmware,
    adapt all the address and option for them.
    
    Change-Id: I3fd2b8305ba8fa9ea687ab7f3fd1ffd2fac9ece6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index d9b25d5de4..e1bc947d68 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -32,9 +32,18 @@ config ROCKCHIP_RK322X
 	bool "Support Rockchip RK3228/RK3229"
 	select CPU_V7
 	select SUPPORT_SPL
+	select SUPPORT_TPL
 	select SPL
+	select TPL
+	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
+	select TPL_NEEDS_SEPARATE_STACK if TPL
+	select SPL_DRIVERS_MISC_SUPPORT
+	imply SPL_SERIAL_SUPPORT
+	imply TPL_SERIAL_SUPPORT
 	select ROCKCHIP_BROM_HELPER
 	select DEBUG_UART_BOARD_INIT
+	select TPL_LIBCOMMON_SUPPORT
+	select TPL_LIBGENERIC_SUPPORT
 	help
 	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
 	  including NEON and GPU, Mali-400 graphics, several DDR3 options
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 79e9704a2c..5ef09383ac 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -13,10 +13,11 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
 
 obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
 
 obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
-obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o
diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c
index 4ddb8ba065..71e641ef33 100644
--- a/arch/arm/mach-rockchip/rk322x-board-spl.c
+++ b/arch/arm/mach-rockchip/rk322x-board-spl.c
@@ -5,77 +5,43 @@
  */
 
 #include <common.h>
-#include <debug_uart.h>
 #include <dm.h>
-#include <ram.h>
 #include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/cru_rk322x.h>
-#include <asm/arch/grf_rk322x.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
-#include <asm/arch/uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
 
 u32 spl_boot_device(void)
 {
 	return BOOT_DEVICE_MMC1;
 }
-DECLARE_GLOBAL_DATA_PTR;
-
-#define GRF_BASE	0x11000000
-#define SGRF_BASE	0x10140000
 
-#define DEBUG_UART_BASE	0x11030000
+u32 spl_boot_mode(const u32 boot_device)
+{
+	return MMCSD_MODE_RAW;
+}
 
 void board_debug_uart_init(void)
 {
-static struct rk322x_grf * const grf = (void *)GRF_BASE;
-	/* Enable early UART2 channel 1 on the RK322x */
-	rk_clrsetreg(&grf->gpio1b_iomux,
-		     GPIO1B1_MASK | GPIO1B2_MASK,
-		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-	/* Set channel C as UART2 input */
-	rk_clrsetreg(&grf->con_iomux,
-		     CON_IOMUX_UART2SEL_MASK,
-		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 }
 
-#define SGRF_DDR_CON0 0x10150000
 void board_init_f(ulong dummy)
 {
-	struct udevice *dev;
 	int ret;
 
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("SPL Init");
-
 	ret = spl_early_init();
 	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
+		printf("spl_early_init() failed: %d\n", ret);
 		hang();
 	}
+	preloader_console_init();
+}
 
-	rockchip_timer_init();
-	printf("timer init done\n");
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		printf("DRAM init failed: %d\n", ret);
-		return;
-	}
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
 
-	/* Disable the ddr secure region setting to make it non-secure */
-	rk_clrreg(SGRF_DDR_CON0, 0x4000);
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
-	back_to_bootrom();
-#endif
+	return 0;
 }
+#endif
diff --git a/arch/arm/mach-rockchip/rk322x-board-tpl.c b/arch/arm/mach-rockchip/rk322x-board-tpl.c
new file mode 100644
index 0000000000..5277dd6b9f
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk322x-board-tpl.c
@@ -0,0 +1,81 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/cru_rk322x.h>
+#include <asm/arch/grf_rk322x.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/uart.h>
+
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_MMC1;
+}
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE	0x11000000
+#define SGRF_BASE	0x10140000
+
+#define DEBUG_UART_BASE	0x11030000
+
+void board_debug_uart_init(void)
+{
+static struct rk322x_grf * const grf = (void *)GRF_BASE;
+	/* Enable early UART2 channel 1 on the RK322x */
+	rk_clrsetreg(&grf->gpio1b_iomux,
+		     GPIO1B1_MASK | GPIO1B2_MASK,
+		     GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
+		     GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
+	/* Set channel C as UART2 input */
+	rk_clrsetreg(&grf->con_iomux,
+		     CON_IOMUX_UART2SEL_MASK,
+		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
+}
+
+#define SGRF_DDR_CON0 0x10150000
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+	printascii("TPL Init");
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	rockchip_timer_init();
+	printf("timer init done\n");
+	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (ret) {
+		printf("DRAM init failed: %d\n", ret);
+		return;
+	}
+
+	/* Disable the ddr secure region setting to make it non-secure */
+	rk_clrreg(SGRF_DDR_CON0, 0x4000);
+#if defined(CONFIG_TPL_ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_TPL_BOARD_INIT)
+	back_to_bootrom();
+#endif
+}
diff --git a/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
new file mode 100644
index 0000000000..841c803e73
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk322x/u-boot-tpl.lds
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE
+
+#undef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_MAX_SIZE CONFIG_TPL_MAX_SIZE
+
+#include "../../cpu/u-boot-spl.lds"
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index cf7894dcb2..6ebe7b7f5c 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -21,11 +21,13 @@
 
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SYS_NS16550_MEM32
-#define CONFIG_SYS_TEXT_BASE		0x60000000
-#define CONFIG_SYS_INIT_SP_ADDR		0x60100000
-#define CONFIG_SYS_LOAD_ADDR		0x60800800
-#define CONFIG_SPL_STACK		0x10088000
-#define CONFIG_SPL_TEXT_BASE		0x10081004
+#define CONFIG_SYS_TEXT_BASE		0x61000000
+#define CONFIG_SYS_INIT_SP_ADDR		0x61100000
+#define CONFIG_SYS_LOAD_ADDR		0x61800800
+#define CONFIG_SPL_TEXT_BASE		0x60000000
+
+#define CONFIG_TPL_STACK		0x10088000
+#define CONFIG_TPL_TEXT_BASE		0x10081004
 
 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE	(28 << 10)
 #define CONFIG_ROCKCHIP_CHIP_TAG	"RK32"

commit 2ca68684959f3e021035db6fa9221f552f6e8319
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:05:30 2017 +0800

    arm: add a separate stack for TPL
    
    TPL stack may different from SPL and sys stack, add support for
    separate one when the board defines it.
    
    Change-Id: I4e962e2e3a2c983892dd41397b2ac0622e3c3dc7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index fa81317717..3c1c603039 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -70,7 +70,9 @@ ENTRY(_main)
  * Set up initial C runtime environment and call board_init_f(0).
  */
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+#if defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_NEEDS_SEPARATE_STACK)
+	ldr	r0, =(CONFIG_TPL_STACK)
+#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
 	ldr	r0, =(CONFIG_SPL_STACK)
 #else
 	ldr	r0, =(CONFIG_SYS_INIT_SP_ADDR)

commit e4e8a0a71b52001f3467f6520c9baa2046b01027
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 09:01:51 2017 +0800

    arm: add option for TPL support in arm 32bit
    
    Some options like TPL_SYS_THUMB_BUILD, TPL_USE_ARCH_MEMCPY
    and TPL_USE_ARCH_MEMCPY are needed for TPL build in 32bit arm.
    
    Change-Id: I1bccdd91c56abc68d181d40ba3bf944e5f72d1c7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b84ecb7983..69749d2806 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -228,6 +228,17 @@ config SPL_SYS_THUMB_BUILD
 	   density. For ARM architectures that support Thumb2 this flag will
 	   result in Thumb2 code generated by GCC.
 
+config TPL_SYS_THUMB_BUILD
+	bool "Build TPL using the Thumb instruction set"
+	default y if SYS_THUMB_BUILD
+	depends on TPL && !ARM64
+	help
+	   Use this flag to build SPL using the Thumb instruction set for
+	   ARM architectures. Thumb instruction set provides better code
+	   density. For ARM architectures that support Thumb2 this flag will
+	   result in Thumb2 code generated by GCC.
+
+
 config SYS_L2CACHE_OFF
 	bool "L2cache off"
 	help
@@ -264,6 +275,15 @@ config SPL_USE_ARCH_MEMCPY
 	  Such implementation may be faster under some conditions
 	  but may increase the binary size.
 
+config TPL_USE_ARCH_MEMCPY
+	bool "Use an assembly optimized implementation of memcpy for TPL"
+	default y if USE_ARCH_MEMCPY
+	depends on !ARM64
+	help
+	  Enable the generation of an optimized version of memcpy.
+	  Such implementation may be faster under some conditions
+	  but may increase the binary size.
+
 config USE_ARCH_MEMSET
 	bool "Use an assembly optimized implementation of memset"
 	default y
@@ -282,6 +302,15 @@ config SPL_USE_ARCH_MEMSET
 	  Such implementation may be faster under some conditions
 	  but may increase the binary size.
 
+config TPL_USE_ARCH_MEMSET
+	bool "Use an assembly optimized implementation of memset for TPL"
+	default y if USE_ARCH_MEMSET
+	depends on !ARM64
+	help
+	  Enable the generation of an optimized version of memset.
+	  Such implementation may be faster under some conditions
+	  but may increase the binary size.
+
 config ARM64_SUPPORT_AARCH32
 	bool "ARM64 system support AArch32 execution state"
 	default y if ARM64 && !TARGET_THUNDERX_88XX

commit e2f2fb237ef0459b6a443366917e01c6e5d5d03d
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Sep 6 08:57:08 2017 +0800

    lib: add TPL_OF_LIBFDT option for TPL
    
    TPL may need use libfdt for dt decode, add option for it.
    
    Change-Id: I20a7e7510cb3e10fbad68bd489fe1c5d03b012c3
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/lib/Kconfig b/lib/Kconfig
index fe337acaeb..3fb1f12012 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -211,6 +211,16 @@ config SPL_OF_LIBFDT
 	  particular compatible nodes. The library operates on a flattened
 	  version of the device tree.
 
+config TPL_OF_LIBFDT
+	bool "Enable the FDT library for TPL"
+	default y if TPL_OF_CONTROL
+	help
+	  This enables the FDT library (libfdt). It provides functions for
+	  accessing binary device tree images in memory, such as adding and
+	  removing nodes and properties, scanning through the tree and finding
+	  particular compatible nodes. The library operates on a flattened
+	  version of the device tree.
+
 config FDT_FIXUP_PARTITIONS
 	bool "overwrite MTD partitions in DTS through defined in 'mtdparts'"
 	depends on OF_LIBFDT

commit 80275b831bdbddf6c5963d48a2fcddc7a7263eee
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 18 12:55:35 2017 +0800

    rockchip: evb-rk3399: update document for board bring up
    
    Since we support ATF in SPL and add script for it, let's make the
    document up to date.
    
    Change-Id: Ic6468825c61a8729ca38f7580dc728f0a753560a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README
index fb8bb19763..7da7c848bd 100644
--- a/board/rockchip/evb_rk3399/README
+++ b/board/rockchip/evb_rk3399/README
@@ -18,8 +18,8 @@ evb key features:
 * PMIC: rk808
 * debug console: UART2
 
-In order to support Arm Trust Firmware(ATF), we need to use the
-miniloader from rockchip which:
+In order to support Arm Trust Firmware(ATF), we can use either SPL or
+miniloader from rockchip to do:
 * do DRAM init
 * load and verify ATF image
 * load and verify U-Boot image
@@ -32,8 +32,8 @@ Get the Source and prebuild binary
   > mkdir ~/evb_rk3399
   > cd ~/evb_rk3399
   > git clone https://github.com/ARM-software/arm-trusted-firmware.git
-  > git clone https://github.com/rockchip-linux/rkbin
-  > git clone https://github.com/rockchip-linux/rkflashtool
+  > git clone https://github.com/rockchip-linux/rkbin.git
+  > git clone https://github.com/rockchip-linux/rkdeveloptool.git
 
 Compile the ATF
 ===============
@@ -41,33 +41,76 @@ Compile the ATF
   > cd arm-trusted-firmware
   > make realclean
   > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
+  Get bl31.elf in this step, copy it to U-Boot root dir:
+  > cp bl31.elf ../u-boot/
 
 Compile the U-Boot
 ==================
 
   > cd ../u-boot
-  > make CROSS_COMPILE=aarch64-linux-gnu- evb-rk3399_defconfig all
+  > export ARCH=arm64
+  > export CROSS_COMPILE=aarch64-linux-gnu-
+  > make evb-rk3399_defconfig
+  for firefly-rk3399, use below instead:
+  > make evb-firefly_defconfig
+  > make
+  > make u-boot.itb
 
-Compile the rkflashtool
-=======================
+  Get spl/u-boot-spl.bin and u-boot.itb in this step.
 
+Compile the rkdeveloptool
+=======================
+  Follow instructions in latest README
   > cd ../rkflashtool
+  > autoreconf -i
+  > ./configure
   > make
+  > sudo make install
+
+  Get rkdeveloptool in you Host in this step.
+
+Both origin binaries and Tool are ready now, choose either option 1 or
+option 2 to deploy U-Boot.
+
+Package the image
+=================
+
+Package the image for U-Boot SPL(option 1)
+--------------------------------
+  > cd ..
+  > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img
+
+  Get idbspl.img in this step.
 
-Package the image for miniloader
-================================
+Package the image for Rockchip miniloader(option 2)
+------------------------------------------
   > cd ..
-  > cp arm-trusted-firmware/build/rk3399/release/bl31.bin rkbin/rk33
+  > cp arm-trusted-firmware/build/rk3399/release/bl31.elf rkbin/rk33
   > ./rkbin/tools/trust_merger rkbin/tools/RK3399TRUST.ini
   > ./rkbin/tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img
-  > mkdir image
-  > mv trust.img ./image/
-  > mv uboot.img ./image/rk3399evb-uboot.bin
 
-Flash the image
-===============
+  Get trust.img and uboot.img in this step.
+
+Flash the image to eMMC
+=======================
+
+Flash the image with U-Boot SPL(option 1)
+-------------------------------
 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > rkdeveloptool wl 64 u-boot/idbspl.img
+  > rkdeveloptool wl 512 u-boot/u-boot.itb
+  > rkdeveloptool rd
 
-  > ./rkflashtool/rkflashloader rk3399evb
+Flash the image with Rockchip miniloader(option 2)
+----------------------------------------
+Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
+  > rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > rkdeveloptool ul rkbin/rk33/rk3399_loader_v1.08.106.bin
+  > rkdeveloptool wl 0x4000 u-boot/uboot.img
+  > rkdeveloptool wl 0x6000 u-boot/trust.img
+  > rkdeveloptool rd
 
 You should be able to get U-Boot log message in console/UART2 now.
+For more detail, please reference to:
+http://opensource.rock-chips.com/wiki_Boot_option

commit 8f1e1356e164a5d640612a3d1327c908f230b2f6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 18 11:46:35 2017 +0800

    rockchip: rk3399-evb: add script for atf fit
    
    Add a script to generate binaries from bl31.elf, and generate
    u-boot.its file for FIT image including u-boot, dtb and atf binaries.
    
    Change-Id: Iad47682119a8e1b382da913069a0771e32f9295d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/mk_fit_atf.sh b/board/rockchip/evb_rk3399/mk_fit_atf.sh
new file mode 100755
index 0000000000..146550aab3
--- /dev/null
+++ b/board/rockchip/evb_rk3399/mk_fit_atf.sh
@@ -0,0 +1,110 @@
+#!/bin/sh
+#
+# script to generate FIT image source for rk3399 boards with
+# ARM Trusted Firmware and multiple device trees (given on the command line)
+#
+# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
+
+[ -z "$BL31" ] && BL31="bl31.elf"
+
+if [ ! -f $BL31 ]; then
+	echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
+	BL31=/dev/null
+fi
+
+#tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin idbspl.img
+
+cat << __HEADER_EOF
+/dts-v1/;
+
+/ {
+	description = "Configuration to load ATF before U-Boot";
+	#address-cells = <1>;
+
+	images {
+		uboot@1 {
+			description = "U-Boot (64-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			arch = "arm64";
+			compression = "none";
+			load = <0x00200000>;
+		};
+__HEADER_EOF
+
+atf_cnt=1
+
+for l in `readelf -l $BL31 | grep -A1 LOAD | gawk --non-decimal-data \
+	'{if (NR % 2) {printf "%d:0x%x:", $2,$4} else {printf "%d\n", $1}}'`
+do
+	offset=${l%%:*}
+	ll=${l#*:}
+	phy_offset=${ll%:*}
+	filesz=${ll##*:}
+
+	#echo "$offset/$phy_offset/$filesz"
+
+	of=rk3399bl31_${phy_offset}.bin
+	dd if=$BL31 of=$of bs=1 skip=$offset count=$filesz
+
+	out_string="${out_string}:${phy_offset}"
+
+	cat << __ATF1_EOF
+		atf@$atf_cnt {
+			description = "ARM Trusted Firmware";
+			data = /incbin/("$of");
+			type = "firmware";
+			arch = "arm64";
+			compression = "none";
+			load = <$phy_offset>;
+__ATF1_EOF
+	if [ "$atf_cnt" -eq 1 ]; then
+		cat << __ATF2_EOF
+			entry = <$phy_offset>;
+__ATF2_EOF
+		fi
+	cat << __ATF3_EOF
+		};
+__ATF3_EOF
+	atf_cnt=$((atf_cnt + 1))
+done
+
+cnt=1
+for dtname in $*
+do
+	cat << __FDT_IMAGE_EOF
+		fdt@$cnt {
+			description = "$(basename $dtname .dtb)";
+			data = /incbin/("$dtname");
+			type = "flat_dt";
+			compression = "none";
+		};
+__FDT_IMAGE_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __CONF_HEADER_EOF
+	};
+	configurations {
+		default = "config@1";
+
+__CONF_HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+	cat << __CONF_SECTION_EOF
+		config@$cnt {
+			description = "$(basename $dtname .dtb)";
+			firmware = "uboot@1";
+			loadables = "atf@1","atf@2","atf@3";
+			fdt = "fdt@1";
+		};
+__CONF_SECTION_EOF
+	cnt=$((cnt+1))
+done
+
+cat << __ITS_EOF
+	};
+};
+__ITS_EOF

commit c460d3fb18a911ef5488fbbf7ca7733dcd7d31c8
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 18 11:29:22 2017 +0800

    rockchip: firefly-rk3399: add FIT for rk3399
    
    Enable SPL_FIT_GENERATOR with path.
    
    Change-Id: I378f3d0cf9532279a3a9999d8343a9159521b56d
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 193e611460..3e88a37efd 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="board/rockchip/evb_rk3399/mk_fit_atf.sh"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000

commit dd866228e383a530a67334c462069b45d7866462
Author: David Wu <david.wu@rock-chips.com>
Date:   Mon Aug 14 15:04:28 2017 +0800

    rockchip: rk322x: Disable integrated macphy for saving power consuming
    
    Unfortunately, the integrated macphy default is enabled, which will
    increase power consuming, if we do not use this PHY. So let's disable
    it at first, which will save power consuming. If we really use it, then
    enable it in driver level.
    
    Change-Id: Ieafaf7e1e6fd74de2999fb3d27153e520968d13d
    Signed-off-by: David Wu <david.wu@rock-chips.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
index 26071c8ec8..c0c0d84cf1 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
@@ -54,6 +54,32 @@ struct rk322x_grf {
 	unsigned int os_reg[8];
 	unsigned int reserved9[(0x604 - 0x5e4) / 4 - 1];
 	unsigned int ddrc_stat;
+	unsigned int reserved10[(0x680 - 0x604) / 4 - 1];
+	unsigned int sig_detect_con[2];
+	unsigned int reserved11[(0x690 - 0x684) / 4 - 1];
+	unsigned int sig_detect_status[2];
+	unsigned int reserved12[(0x6a0 - 0x694) / 4 - 1];
+	unsigned int sig_detect_clr[2];
+	unsigned int reserved13[(0x6b0 - 0x6a4) / 4 - 1];
+	unsigned int emmc_det;
+	unsigned int reserved14[(0x700 - 0x6b0) / 4 - 1];
+	unsigned int host0_con[3];
+	unsigned int reserved15;
+	unsigned int host1_con[3];
+	unsigned int reserved16;
+	unsigned int host2_con[3];
+	unsigned int reserved17[(0x760 - 0x728) / 4 - 1];
+	unsigned int usbphy0_con[27];
+	unsigned int reserved18[(0x800 - 0x7c8) / 4 - 1];
+	unsigned int usbphy1_con[27];
+	unsigned int reserved19[(0x880 - 0x868) / 4 - 1];
+	unsigned int otg_con0;
+	unsigned int uoc_status0;
+	unsigned int reserved20[(0x900 - 0x884) / 4 - 1];
+	unsigned int mac_con[2];
+	unsigned int reserved21[(0xb00 - 0x904) / 4 - 1];
+	unsigned int macphy_con[4];
+	unsigned int macphy_status;
 };
 check_member(rk322x_grf, ddrc_stat, 0x604);
 
@@ -516,4 +542,10 @@ enum {
 	CON_IOMUX_PWM0SEL_SHIFT	= 0,
 	CON_IOMUX_PWM0SEL_MASK	= 1 << CON_IOMUX_PWM0SEL_SHIFT,
 };
+
+/* GRF_MACPHY_CON0 */
+enum {
+	MACPHY_CFG_ENABLE_SHIFT = 0,
+	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,
+};
 #endif
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index 2ef81bacf8..d97be336b6 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -72,7 +72,16 @@ int board_init(void)
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 
+	/*
+	* The integrated macphy is enabled by default, disable it
+	* for saving power consuming.
+	*/
+	rk_clrsetreg(&grf->macphy_con[0],
+		     MACPHY_CFG_ENABLE_MASK,
+		     0 << MACPHY_CFG_ENABLE_SHIFT);
+
 	rockchip_timer_init();
+
 	return 0;
 }
 

commit 0fb7615c973ca1470ae06fff4c05ce51b1b6ecbe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 19:26:05 2017 +0800

    rockchip: rk322x: enable fastboot to set boot mode tag
    
    To support fastboot "fastboot reboot-bootloader" cmd.
    
    Change-Id: Idf3055bdc86f851bfc68ee7f8b14fbdc21991dff
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index f5fe5235b4..2ef81bacf8 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <ram.h>
+#include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/periph.h>
@@ -141,3 +142,17 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 	return 0;
 }
 #endif
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk322x_grf *grf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	/* Set boot mode to fastboot */
+	writel(BOOT_FASTBOOT, &grf->os_reg[0]);
+
+	return 0;
+}
+#endif

commit 21bd753785f618ef58f912c18333998cf2c2f578
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 19:08:50 2017 +0800

    rockchip: enable rk322x sysreset driver
    
    The sysreset driver for rk322x is ready but not enabled,
    add it to Makefile to make sure it's enabled.
    
    Change-Id: If337fc0dca58367ea6f74e559c3cefcfc2c79115
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index a5200d377d..476d361297 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,6 +13,7 @@ ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
 endif
 obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
+obj-$(CONFIG_ROCKCHIP_RK322X) += sysreset_rk322x.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
 obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o

commit 8a4ef50b80ee69aab1c3cbbe80fdba93284f7c94
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 17:41:38 2017 +0800

    rockchip: rk3399: enable preboot for boot mode detect
    
    We need to get into preboot once we detect that we are not
    get into normal boot.
    
    Change-Id: I7e4b6eed990167b3b0fcca2fbc2beb0b5f40cd4b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index f342c29260..4fd325eeb0 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -72,6 +72,8 @@
 
 #endif
 
+#define CONFIG_PREBOOT
+
 /* enable usb config for usb ether */
 
 #endif

commit b24566395f6d47f594d42ceb3196496818e8cec6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 17:31:28 2017 +0800

    rockchip: rk3399: enable fastboot to set boot mode tag
    
    fastboot have a command "reboot-bootloader" which require the boot
    loader to reboot and get into fastboot mode again.
    
    Change-Id: Iac61c89fd3b93d771494287b738ac33d524cdc8a
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index dd5f8a87e0..a2810ec8b7 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -95,3 +95,17 @@ int board_late_init(void)
 
 	return 0;
 }
+
+#if defined(CONFIG_USB_FUNCTION_FASTBOOT)
+int fb_set_reboot_flag(void)
+{
+	struct rk3399_pmugrf_regs *pmugrf;
+
+	printf("Setting reboot to fastboot flag ...\n");
+	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+	/* Clear boot mode */
+	writel(BOOT_FASTBOOT, &pmugrf->os_reg0);
+
+	return 0;
+}
+#endif

commit f9d5dc255d0cd7307a62fd3ec2ccbe621ea531da
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 9 16:49:17 2017 +0800

    rockchip: rk3399: detect boot mode
    
    U-Boot fastboot, kernel may reboot with parameter which require
    bootloader to get into different boot mode, detect it and enter
    proper mode.
    
    Change-Id: I6d3596dc8862e69e489b8a1d8564f644de5ebdf5
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
index 415466a49b..c4a6d46649 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -5,6 +5,7 @@ choice
 
 config TARGET_EVB_RK3399
 	bool "RK3399 evaluation board"
+	select BOARD_LATE_INIT
 	help
 	  RK3399evb is a evaluation board for Rockchp rk3399,
 	  with full function and phisical connectors support like type-C ports,
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index dbc248f84a..dd5f8a87e0 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -5,9 +5,13 @@
  */
 
 #include <common.h>
+#include <syscon.h>
 #include <asm/armv8/mmu.h>
-#include <asm/io.h>
+#include <asm/arch/boot_mode.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/hardware.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,3 +59,39 @@ int arch_cpu_init(void)
 
 	return 0;
 }
+
+static void setup_boot_mode(void)
+{
+	struct rk3399_pmugrf_regs *pmugrf;
+	int boot_mode;
+
+	pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);;
+	boot_mode = readl(&pmugrf->os_reg0);
+	debug("boot mode %x\n", boot_mode);
+
+	/* Clear boot mode */
+	writel(BOOT_NORMAL, &pmugrf->os_reg0);
+
+	switch (boot_mode) {
+	case BOOT_FASTBOOT:
+		printf("enter fastboot!\n");
+		env_set("preboot", "setenv preboot; fastboot usb0");
+		break;
+	case BOOT_UMS:
+		printf("enter UMS!\n");
+		env_set("preboot", "setenv preboot; if mmc dev 0;"
+		       "then ums mmc 0; else ums mmc 1;fi");
+		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
+	}
+}
+
+int board_late_init(void)
+{
+	setup_boot_mode();
+
+	return 0;
+}

commit 4c90d8abc4933e7e679e916756849bbd8712cffe
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 15:03:45 2017 +0800

    rockchip: add BOOT_LOADER support for boot mode
    
    Rockchip using rockusb for flash emmc via USB, people
    use 'reboot loader' in kernel and then want to get a rockusb
    device in bootloader for firmware update.
    
    Change-Id: I16480f07761c2199443373aa54d458ca0851b708
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c
index a3457f3914..1f11f8e6af 100644
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -40,6 +40,10 @@ static void setup_boot_mode(void)
 		printf("enter UMS!\n");
 		env_set("preboot", "setenv preboot; ums mmc 0");
 		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
 	}
 }
 
diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index d57290da25..f5fe5235b4 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -36,6 +36,10 @@ static void setup_boot_mode(void)
 		printf("enter UMS!\n");
 		env_set("preboot", "setenv preboot; ums mmc 0");
 		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
 	}
 }
 
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c
index 278bb406f0..535f871799 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -45,6 +45,10 @@ static void setup_boot_mode(void)
 		env_set("preboot", "setenv preboot; if mmc dev 0;"
 		       "then ums mmc 0; else ums mmc 1;fi");
 		break;
+	case BOOT_LOADER:
+		printf("enter Rockusb!\n");
+		env_set("preboot", "setenv preboot; rockusb 0 mmc 0");
+		break;
 	}
 }
 

commit a5a0ed380a40d18b733070cd05754133eb22c419
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 14:36:25 2017 +0800

    rockchip: rk322x: update the sysreg number for boot mode
    
    The boot mode for rk322x is stored in sysreg 0, update it.
    
    Change-Id: I31babf99bdd7028c8ea1f068ed202c828f323391
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index f91043eec0..d57290da25 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -20,12 +20,12 @@ DECLARE_GLOBAL_DATA_PTR;
 static void setup_boot_mode(void)
 {
 	struct rk322x_grf *const grf = (void *)GRF_BASE;
-	int boot_mode = readl(&grf->os_reg[4]);
+	int boot_mode = readl(&grf->os_reg[0]);
 
 	debug("boot mode %x.\n", boot_mode);
 
 	/* Clear boot mode */
-	writel(BOOT_NORMAL, &grf->os_reg[4]);
+	writel(BOOT_NORMAL, &grf->os_reg[0]);
 
 	switch (boot_mode) {
 	case BOOT_FASTBOOT:

commit 398fe2d1cf91bf463be6bd984800f76f75397905
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 14:22:00 2017 +0800

    rockchip: rk3229: move usb gadget into defconfig
    
    Use the defconfig for all usb gadget and function related
    option instead of define then in header file.
    
    Change-Id: Ibd21f6693ffb573c88eed69ddddeaa923cb9d8ea
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 5a658a1495..668e01a8e5 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -12,11 +12,19 @@ CONFIG_DEBUG_UART=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x60800800
+CONFIG_FASTBOOT_BUF_SIZE=0x04000000
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
@@ -43,6 +51,7 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
+CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index fa9abc0a56..cf7894dcb2 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -39,11 +39,9 @@
 #define SDRAM_MAX_SIZE			0x80000000
 
 #ifndef CONFIG_SPL_BUILD
-/* usb otg */
 
 /* usb mass storage */
 #define CONFIG_USB_FUNCTION_MASS_STORAGE
-#define CONFIG_CMD_USB_MASS_STORAGE
 
 /* usb host */
 #define ENV_MEM_LAYOUT_SETTINGS \

commit bf50816db1ed4adf8e9a6cd01955376b6f971457
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Aug 4 14:19:49 2017 +0800

    rockchip: enable rockusb for all rockchip SoCs
    
    Rockusb will be used by all the rockchip SoCs, enable it by
    default in Kconfig, and it can be work if USB gadget is available.
    
    Change-Id: Iec93f12202b20dc8e1b4969bd69594014c30888e
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 53eae8953e..b84ecb7983 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1084,6 +1084,7 @@ config ARCH_ROCKCHIP
 	select DM_PWM
 	select DM_REGULATOR
 	imply CMD_FASTBOOT
+	imply CMD_ROCKUSB
 	imply FASTBOOT
 	imply FAT_WRITE
 	imply USB_FUNCTION_FASTBOOT

commit 8a3fd8428ed691fa47354b661fde0c468e69c059
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Thu May 25 16:50:33 2017 +0800

    rockchip:usb: add a simple readme for rockusb
    
    add a simple readme to introduce rockusb and tell people how to use it
    
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Changes in v7:
    -none
    
    Changes in v6:
    -none
    
    Changes in v5:
    -none
    
    Changes in v4:
    -add some blank line to make it look better
    
    Changes in v3:
    -fix checkpatch error

diff --git a/doc/README.rockusb b/doc/README.rockusb
new file mode 100644
index 0000000000..5405dc48c1
--- /dev/null
+++ b/doc/README.rockusb
@@ -0,0 +1,51 @@
+Rockusb (Rockchip USB protocol)
+=====================================================
+
+Overview
+--------
+
+Rockusb protocol is widely used by Rockchip SoC based devices. It can
+read/write info, image to/from devices. This document briefly describes how to
+use Rockusb for upgrading firmware (e.g. kernel, u-boot, rootfs, etc.).
+
+Tools
+--------
+There are many tools can support Rockusb protocol. rkdeveloptool
+(https://github.com/rockchip-linux/rkdeveloptool) is open source,
+It is maintained by Rockchip. People don't want to build from source
+can download from here
+(https://github.com/rockchip-linux/rkbin/blob/master/tools/rkdeveloptool)
+
+Usage
+--------
+The Usage of Rockusb command is:
+
+rockusb <USB_controller> <devtype> <dev[:part]>
+
+e.g. rockusb 0 mmc 0
+
+On your U-Boot console, type this command to enter rockusb mode.
+On your host PC. use lsusb command. you should see a usb device
+using 0x2207 as its USB verdor id.
+
+for more detail about the rkdeveloptool. please read the usage.
+
+rkdeveloptool -h
+
+use rkdeveloptool wl command to write lba. BeginSec is the lba on device
+you want to write.
+
+sudo rkdeveloptool wl  <BeginSec> <File>
+
+to flash U-Boot image use below command. U-Boot binary is made by mkimage.
+see doc/README.rockchip for more detail about how to get U-Boot binary.
+
+sudo rkdeveloptool wl  64 <U-Boot binary>
+
+There are plenty of Rockusb command. but wl(write lba) and
+rd(reboot) command. These two command can let people flash
+image to device.
+
+To do
+-----
+* Fully support Rockusb protocol

commit 301fce6d0e4d677efe092fe8ccc30d965500957a
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Thu May 25 16:50:32 2017 +0800

    usb: rockchip: add rockusb command
    
    this patch add rockusb command. the usage is
    rockusb <USB_controller> <devtype> <dev[:part]>
    e.g. rockusb 0 mmc 0
    
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Changes in v7:
    -none
    
    Changes in v6:
    -none
    
    Changes in v5:
    -none
    
    Changes in v4:
    -move USB_FUNCTION_ROCKUSB to drivers/usb/gadget/Kconfig
    -modify the dependence
    
    Changes in v3:
    -fix comment from Simon and Lukasz
    -fix checkpactch error

diff --git a/cmd/Kconfig b/cmd/Kconfig
index d6d130edfa..30bf556fd2 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -831,6 +831,15 @@ config CMD_REMOTEPROC
 	help
 	  Support for Remote Processor control
 
+config CMD_ROCKUSB
+	bool "rockusb"
+	depends on USB_FUNCTION_ROCKUSB
+	help
+	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
+	  read/write info, image to/from devices. This enable rockusb command
+	  support to comunication with rockusb device. for more detail about
+	  this command, please read doc/README.rockusb.
+
 config CMD_SATA
 	bool "sata - Access SATA subsystem"
 	select SATA
diff --git a/cmd/Makefile b/cmd/Makefile
index 2a5b8ce825..caabfd7528 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -104,6 +104,7 @@ obj-$(CONFIG_CMD_READ) += read.o
 obj-$(CONFIG_CMD_REGINFO) += reginfo.o
 obj-$(CONFIG_CMD_REISER) += reiser.o
 obj-$(CONFIG_CMD_REMOTEPROC) += remoteproc.o
+obj-$(CONFIG_CMD_ROCKUSB) += rockusb.o
 obj-$(CONFIG_SANDBOX) += host.o
 obj-$(CONFIG_CMD_SATA) += sata.o
 obj-$(CONFIG_CMD_NVME) += nvme.o
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
new file mode 100644
index 0000000000..ae2baa672b
--- /dev/null
+++ b/cmd/rockusb.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2017 Eddie Cai <eddie.cai.linux@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <console.h>
+#include <g_dnl.h>
+#include <usb.h>
+#include <asm/arch/f_rockusb.h>
+
+static int do_rockusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	int controller_index, dev_index;
+	char *usb_controller;
+	char *devtype;
+	char *devnum;
+	int ret;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+
+	usb_controller = argv[1];
+	controller_index = simple_strtoul(usb_controller, NULL, 0);
+
+	if (argc >= 4) {
+		devtype = argv[2];
+		devnum  = argv[3];
+	} else {
+		return CMD_RET_USAGE;
+	}
+	dev_index = simple_strtoul(devnum, NULL, 0);
+	rockusb_dev_init(devtype, dev_index);
+
+	ret = board_usb_init(controller_index, USB_INIT_DEVICE);
+	if (ret) {
+		error("USB init failed: %d", ret);
+		return CMD_RET_FAILURE;
+	}
+
+	g_dnl_clear_detach();
+	ret = g_dnl_register("usb_dnl_rockusb");
+	if (ret)
+		return CMD_RET_FAILURE;
+
+	if (!g_dnl_board_usb_cable_connected()) {
+		puts("\rUSB cable not detected, Command exit.\n");
+		ret = CMD_RET_FAILURE;
+		goto exit;
+	}
+
+	while (1) {
+		if (g_dnl_detach())
+			break;
+		if (ctrlc())
+			break;
+		usb_gadget_handle_interrupts(controller_index);
+	}
+	ret = CMD_RET_SUCCESS;
+
+exit:
+	g_dnl_unregister();
+	g_dnl_clear_detach();
+	board_usb_cleanup(controller_index, USB_INIT_DEVICE);
+
+	return ret;
+}
+
+U_BOOT_CMD(rockusb, 4, 1, do_rockusb,
+	   "use the rockusb protocol",
+	   "<USB_controller> <devtype> <dev[:part]>  e.g. rockusb 0 mmc 0\n"
+);

commit c7cd0ba49a960f25f65b00de957671d05dbe0dd9
Author: Eddie Cai <eddie.cai.linux@gmail.com>
Date:   Thu May 25 16:50:31 2017 +0800

    usb: rockchip: add the rockusb gadget
    
    this patch implement rockusb protocol on the device side. this is based on USB
    download gadget infrastructure. the rockusb function implements the rd, wl, rid
    commands. it can work with rkdeveloptool
    
    Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
    Reviewed-by: Simon Glass <sjg@chromium.org>
    
    Changes in v7:
    -none
    
    Changes in v6:
    -move some data to f_rockusb structure
    
    Changes in v5:
    -fix build error when build non-rockchip board
    -fix checkpatch error
    
    Changes in v4:
    -use enum instead of macro define
    -move some structure define and macro to f_rockusb.h
    -add some function comment as Simon required
    -address other comment from Simon
    -fix build error as Lukasz point out
    
    Changes in v3:
    -split the macro to f_rockusb.h
    -use ALLOC_CACHE_ALIGN_BUFFER to define cache safe struct inside the function.
    -fix checkpatch error

diff --git a/arch/arm/include/asm/arch-rockchip/f_rockusb.h b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
new file mode 100644
index 0000000000..c207a787f9
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/f_rockusb.h
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2017
+ *
+ * Eddie Cai <eddie.cai.linux@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _F_ROCKUSB_H_
+#define _F_ROCKUSB_H_
+#include <blk.h>
+
+#define ROCKUSB_VERSION		"0.1"
+
+#define ROCKUSB_INTERFACE_CLASS	0xff
+#define ROCKUSB_INTERFACE_SUB_CLASS	0x06
+#define ROCKUSB_INTERFACE_PROTOCOL	0x05
+
+#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0  (0x0200)
+#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1  (0x0040)
+#define TX_ENDPOINT_MAXIMUM_PACKET_SIZE      (0x0040)
+
+#define EP_BUFFER_SIZE			4096
+/*
+ * EP_BUFFER_SIZE must always be an integral multiple of maxpacket size
+ * (64 or 512 or 1024), else we break on certain controllers like DWC3
+ * that expect bulk OUT requests to be divisible by maxpacket size.
+ */
+
+#define CONFIG_ROCKUSB_BUF_ADDR		CONFIG_SYS_LOAD_ADDR
+#define CONFIG_ROCKUSB_BUF_SIZE		0x08000000
+
+#define RKUSB_STATUS_IDLE			0
+#define RKUSB_STATUS_CMD			1
+#define RKUSB_STATUS_RXDATA			2
+#define RKUSB_STATUS_TXDATA			3
+#define RKUSB_STATUS_CSW			4
+#define RKUSB_STATUS_RXDATA_PREPARE		5
+#define RKUSB_STATUS_TXDATA_PREPARE		6
+
+enum rkusb_command {
+K_FW_TEST_UNIT_READY	= 0x00,
+K_FW_READ_FLASH_ID = 0x01,
+K_FW_SET_DEVICE_ID = 0x02,
+K_FW_TEST_BAD_BLOCK = 0x03,
+K_FW_READ_10 = 0x04,
+K_FW_WRITE_10 = 0x05,
+K_FW_ERASE_10 = 0x06,
+K_FW_WRITE_SPARE = 0x07,
+K_FW_READ_SPARE = 0x08,
+
+K_FW_ERASE_10_FORCE = 0x0b,
+K_FW_GET_VERSION = 0x0c,
+
+K_FW_LBA_READ_10 = 0x14,
+K_FW_LBA_WRITE_10 = 0x15,
+K_FW_ERASE_SYS_DISK = 0x16,
+K_FW_SDRAM_READ_10 = 0x17,
+K_FW_SDRAM_WRITE_10 = 0x18,
+K_FW_SDRAM_EXECUTE = 0x19,
+K_FW_READ_FLASH_INFO = 0x1A,
+K_FW_GET_CHIP_VER = 0x1B,
+K_FW_LOW_FORMAT = 0x1C,
+K_FW_SET_RESET_FLAG = 0x1E,
+K_FW_SPI_READ_10 = 0x21,
+K_FW_SPI_WRITE_10 = 0x22,
+
+K_FW_SESSION = 0X30,
+K_FW_RESET = 0xff,
+};
+
+#define CBW_DIRECTION_OUT		0x00
+#define CBW_DIRECTION_IN		0x80
+
+struct cmd_dispatch_info {
+	enum rkusb_command cmd;
+	/* call back function to handle rockusb command */
+	void (*cb)(struct usb_ep *ep, struct usb_request *req);
+};
+
+/* Bulk-only data structures */
+
+/* Command Block Wrapper */
+struct fsg_bulk_cb_wrap {
+	__le32  signature;              /* Contains 'USBC' */
+	u32     tag;                    /* Unique per command id */
+	__le32  data_transfer_length;   /* Size of the data */
+	u8      flags;                  /* Direction in bit 7 */
+	u8      lun;                    /* lun (normally 0) */
+	u8      length;                 /* Of the CDB, <= MAX_COMMAND_SIZE */
+	u8      CDB[16];                /* Command Data Block */
+};
+
+#define USB_BULK_CB_WRAP_LEN    31
+#define USB_BULK_CB_SIG         0x43425355      /* Spells out USBC */
+#define USB_BULK_IN_FLAG        0x80
+
+/* Command status Wrapper */
+struct bulk_cs_wrap {
+	__le32  signature;              /* Should = 'USBS' */
+	u32     tag;                    /* Same as original command */
+	__le32  residue;                /* Amount not transferred */
+	u8      status;                 /* See below */
+};
+
+#define USB_BULK_CS_WRAP_LEN    13
+#define USB_BULK_CS_SIG         0x53425355      /* Spells out 'USBS' */
+#define USB_STATUS_PASS         0
+#define USB_STATUS_FAIL         1
+#define USB_STATUS_PHASE_ERROR  2
+
+#define CSW_GOOD                0x00
+#define CSW_FAIL                0x01
+
+struct f_rockusb {
+	struct usb_function usb_function;
+	struct usb_ep *in_ep, *out_ep;
+	struct usb_request *in_req, *out_req;
+	char *rockusb_dev_type;
+	unsigned int rockusb_dev_index;
+	unsigned int download_tag;
+	unsigned int download_lba;
+	unsigned int download_size;
+	unsigned int download_bytes;
+	struct blk_desc *download_desc;
+	int reboot_flag;
+};
+
+/* init rockusb device, tell rockusb which device you want to read/write*/
+void rockusb_dev_init(char *dev_type, int dev_index);
+#endif /* _F_ROCKUSB_H_ */
+
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index e065c5aeb3..8e3a886536 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1123,7 +1123,7 @@ static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
 			dwc3_stop_active_transfer(dwc, dep->number, true);
 			goto out1;
 		}
-		dev_err(dwc->dev, "request %p was not queued to %s\n",
+		dev_vdbg(dwc->dev, "request %p was not queued to %s\n",
 				request, ep->name);
 		ret = -EINVAL;
 		goto out0;
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 225b66bc95..423d1f248e 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -119,6 +119,14 @@ config G_DNL_VENDOR_NUM
 config G_DNL_PRODUCT_NUM
 	hex "Product ID of USB device"
 
+config USB_FUNCTION_ROCKUSB
+	bool "Enable USB rockusb gadget"
+	help
+	  Rockusb protocol is widely used by Rockchip SoC based devices. It can
+	  read/write info, image to/from devices. This enables the USB part of
+	  the rockusb gadget.for more detail about Rockusb protocol, please see
+	  doc/README.rockusb
+
 config USBNET_DEVADDR
 	string "USB Gadget Ethernet device mac address"
 	default "de:ad:be:ef:00:01"
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 7258099c1c..691f373aeb 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o
 obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o
 obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o
 obj-$(CONFIG_USB_FUNCTION_FASTBOOT) += f_fastboot.o
+obj-$(CONFIG_USB_FUNCTION_ROCKUSB) += f_rockusb.o
 obj-$(CONFIG_USB_FUNCTION_SDP) += f_sdp.o
 endif
 endif
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
new file mode 100644
index 0000000000..d218b6da8f
--- /dev/null
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -0,0 +1,691 @@
+/*
+ * (C) Copyright 2017
+ *
+ * Eddie Cai <eddie.cai.linux@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <errno.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/composite.h>
+#include <linux/compiler.h>
+#include <version.h>
+#include <g_dnl.h>
+#include <asm/arch/f_rockusb.h>
+
+static inline struct f_rockusb *func_to_rockusb(struct usb_function *f)
+{
+	return container_of(f, struct f_rockusb, usb_function);
+}
+
+static struct usb_endpoint_descriptor fs_ep_in = {
+	.bLength            = USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType    = USB_DT_ENDPOINT,
+	.bEndpointAddress   = USB_DIR_IN,
+	.bmAttributes       = USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize     = cpu_to_le16(64),
+};
+
+static struct usb_endpoint_descriptor fs_ep_out = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_OUT,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(64),
+};
+
+static struct usb_endpoint_descriptor hs_ep_in = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_IN,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor hs_ep_out = {
+	.bLength		= USB_DT_ENDPOINT_SIZE,
+	.bDescriptorType	= USB_DT_ENDPOINT,
+	.bEndpointAddress	= USB_DIR_OUT,
+	.bmAttributes		= USB_ENDPOINT_XFER_BULK,
+	.wMaxPacketSize		= cpu_to_le16(512),
+};
+
+static struct usb_interface_descriptor interface_desc = {
+	.bLength		= USB_DT_INTERFACE_SIZE,
+	.bDescriptorType	= USB_DT_INTERFACE,
+	.bInterfaceNumber	= 0x00,
+	.bAlternateSetting	= 0x00,
+	.bNumEndpoints		= 0x02,
+	.bInterfaceClass	= ROCKUSB_INTERFACE_CLASS,
+	.bInterfaceSubClass	= ROCKUSB_INTERFACE_SUB_CLASS,
+	.bInterfaceProtocol	= ROCKUSB_INTERFACE_PROTOCOL,
+};
+
+static struct usb_descriptor_header *rkusb_fs_function[] = {
+	(struct usb_descriptor_header *)&interface_desc,
+	(struct usb_descriptor_header *)&fs_ep_in,
+	(struct usb_descriptor_header *)&fs_ep_out,
+};
+
+static struct usb_descriptor_header *rkusb_hs_function[] = {
+	(struct usb_descriptor_header *)&interface_desc,
+	(struct usb_descriptor_header *)&hs_ep_in,
+	(struct usb_descriptor_header *)&hs_ep_out,
+	NULL,
+};
+
+static const char rkusb_name[] = "Rockchip Rockusb";
+
+static struct usb_string rkusb_string_defs[] = {
+	[0].s = rkusb_name,
+	{  }			/* end of list */
+};
+
+static struct usb_gadget_strings stringtab_rkusb = {
+	.language	= 0x0409,	/* en-us */
+	.strings	= rkusb_string_defs,
+};
+
+static struct usb_gadget_strings *rkusb_strings[] = {
+	&stringtab_rkusb,
+	NULL,
+};
+
+static struct f_rockusb *rockusb_func;
+static void rx_handler_command(struct usb_ep *ep, struct usb_request *req);
+static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size);
+
+struct f_rockusb *get_rkusb(void)
+{
+	struct f_rockusb *f_rkusb = rockusb_func;
+	if (!f_rkusb) {
+		f_rkusb = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*f_rkusb));
+		if (!f_rkusb)
+			return 0;
+
+		rockusb_func = f_rkusb;
+		memset(f_rkusb, 0, sizeof(*f_rkusb));
+	}
+	return f_rkusb;
+}
+
+static struct usb_endpoint_descriptor *rkusb_ep_desc(
+struct usb_gadget *g,
+struct usb_endpoint_descriptor *fs,
+struct usb_endpoint_descriptor *hs)
+{
+	if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
+		return hs;
+	return fs;
+}
+
+static void rockusb_complete(struct usb_ep *ep, struct usb_request *req)
+{
+	int status = req->status;
+	if (!status)
+		return;
+	debug("status: %d ep '%s' trans: %d\n", status, ep->name, req->actual);
+}
+
+/* config the rockusb device*/
+static int rockusb_bind(struct usb_configuration *c, struct usb_function *f)
+{
+	int id;
+	struct usb_gadget *gadget = c->cdev->gadget;
+	struct f_rockusb *f_rkusb = func_to_rockusb(f);
+	const char *s;
+
+	id = usb_interface_id(c, f);
+	if (id < 0)
+		return id;
+	interface_desc.bInterfaceNumber = id;
+
+	id = usb_string_id(c->cdev);
+	if (id < 0)
+		return id;
+
+	rkusb_string_defs[0].id = id;
+	interface_desc.iInterface = id;
+
+	f_rkusb->in_ep = usb_ep_autoconfig(gadget, &fs_ep_in);
+	if (!f_rkusb->in_ep)
+		return -ENODEV;
+	f_rkusb->in_ep->driver_data = c->cdev;
+
+	f_rkusb->out_ep = usb_ep_autoconfig(gadget, &fs_ep_out);
+	if (!f_rkusb->out_ep)
+		return -ENODEV;
+	f_rkusb->out_ep->driver_data = c->cdev;
+
+	f->descriptors = rkusb_fs_function;
+
+	if (gadget_is_dualspeed(gadget)) {
+		hs_ep_in.bEndpointAddress = fs_ep_in.bEndpointAddress;
+		hs_ep_out.bEndpointAddress = fs_ep_out.bEndpointAddress;
+		f->hs_descriptors = rkusb_hs_function;
+	}
+
+	s = env_get("serial#");
+	if (s)
+		g_dnl_set_serialnumber((char *)s);
+
+	return 0;
+}
+
+static void rockusb_unbind(struct usb_configuration *c, struct usb_function *f)
+{
+	/* clear the configuration*/
+	memset(rockusb_func, 0, sizeof(*rockusb_func));
+}
+
+static void rockusb_disable(struct usb_function *f)
+{
+	struct f_rockusb *f_rkusb = func_to_rockusb(f);
+
+	usb_ep_disable(f_rkusb->out_ep);
+	usb_ep_disable(f_rkusb->in_ep);
+
+	if (f_rkusb->out_req) {
+		free(f_rkusb->out_req->buf);
+		usb_ep_free_request(f_rkusb->out_ep, f_rkusb->out_req);
+		f_rkusb->out_req = NULL;
+	}
+	if (f_rkusb->in_req) {
+		free(f_rkusb->in_req->buf);
+		usb_ep_free_request(f_rkusb->in_ep, f_rkusb->in_req);
+		f_rkusb->in_req = NULL;
+	}
+}
+
+static struct usb_request *rockusb_start_ep(struct usb_ep *ep)
+{
+	struct usb_request *req;
+
+	req = usb_ep_alloc_request(ep, 0);
+	if (!req)
+		return NULL;
+
+	req->length = EP_BUFFER_SIZE;
+	req->buf = memalign(CONFIG_SYS_CACHELINE_SIZE, EP_BUFFER_SIZE);
+	if (!req->buf) {
+		usb_ep_free_request(ep, req);
+		return NULL;
+	}
+	memset(req->buf, 0, req->length);
+
+	return req;
+}
+
+static int rockusb_set_alt(struct usb_function *f,
+			    unsigned interface, unsigned alt)
+{
+	int ret;
+	struct usb_composite_dev *cdev = f->config->cdev;
+	struct usb_gadget *gadget = cdev->gadget;
+	struct f_rockusb *f_rkusb = func_to_rockusb(f);
+	const struct usb_endpoint_descriptor *d;
+
+	debug("%s: func: %s intf: %d alt: %d\n",
+	      __func__, f->name, interface, alt);
+
+	d = rkusb_ep_desc(gadget, &fs_ep_out, &hs_ep_out);
+	ret = usb_ep_enable(f_rkusb->out_ep, d);
+	if (ret) {
+		printf("failed to enable out ep\n");
+		return ret;
+	}
+
+	f_rkusb->out_req = rockusb_start_ep(f_rkusb->out_ep);
+	if (!f_rkusb->out_req) {
+		printf("failed to alloc out req\n");
+		ret = -EINVAL;
+		goto err;
+	}
+	f_rkusb->out_req->complete = rx_handler_command;
+
+	d = rkusb_ep_desc(gadget, &fs_ep_in, &hs_ep_in);
+	ret = usb_ep_enable(f_rkusb->in_ep, d);
+	if (ret) {
+		printf("failed to enable in ep\n");
+		goto err;
+	}
+
+	f_rkusb->in_req = rockusb_start_ep(f_rkusb->in_ep);
+	if (!f_rkusb->in_req) {
+		printf("failed alloc req in\n");
+		ret = -EINVAL;
+		goto err;
+	}
+	f_rkusb->in_req->complete = rockusb_complete;
+
+	ret = usb_ep_queue(f_rkusb->out_ep, f_rkusb->out_req, 0);
+	if (ret)
+		goto err;
+
+	return 0;
+err:
+	rockusb_disable(f);
+	return ret;
+}
+
+static int rockusb_add(struct usb_configuration *c)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	int status;
+
+	debug("%s: cdev: 0x%p\n", __func__, c->cdev);
+
+	f_rkusb->usb_function.name = "f_rockusb";
+	f_rkusb->usb_function.bind = rockusb_bind;
+	f_rkusb->usb_function.unbind = rockusb_unbind;
+	f_rkusb->usb_function.set_alt = rockusb_set_alt;
+	f_rkusb->usb_function.disable = rockusb_disable;
+	f_rkusb->usb_function.strings = rkusb_strings;
+
+	status = usb_add_function(c, &f_rkusb->usb_function);
+	if (status) {
+		free(f_rkusb);
+		rockusb_func = f_rkusb;
+	}
+	return status;
+}
+
+void rockusb_dev_init(char *dev_type, int dev_index)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	f_rkusb->rockusb_dev_type = dev_type;
+	f_rkusb->rockusb_dev_index = dev_index;
+}
+
+DECLARE_GADGET_BIND_CALLBACK(usb_dnl_rockusb, rockusb_add);
+
+static int rockusb_tx_write(const char *buffer, unsigned int buffer_size)
+{
+	struct usb_request *in_req = rockusb_func->in_req;
+	int ret;
+
+	memcpy(in_req->buf, buffer, buffer_size);
+	in_req->length = buffer_size;
+	usb_ep_dequeue(rockusb_func->in_ep, in_req);
+	ret = usb_ep_queue(rockusb_func->in_ep, in_req, 0);
+	if (ret)
+		printf("Error %d on queue\n", ret);
+	return 0;
+}
+
+static int rockusb_tx_write_str(const char *buffer)
+{
+	return rockusb_tx_write(buffer, strlen(buffer));
+}
+
+#ifdef DEBUG
+static void printcbw(char *buf)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+
+	memcpy((char *)cbw, buf, USB_BULK_CB_WRAP_LEN);
+
+	debug("cbw: signature:%x\n", cbw->signature);
+	debug("cbw: tag=%x\n", cbw->tag);
+	debug("cbw: data_transfer_length=%d\n", cbw->data_transfer_length);
+	debug("cbw: flags=%x\n", cbw->flags);
+	debug("cbw: lun=%d\n", cbw->lun);
+	debug("cbw: length=%d\n", cbw->length);
+	debug("cbw: ucOperCode=%x\n", cbw->CDB[0]);
+	debug("cbw: ucReserved=%x\n", cbw->CDB[1]);
+	debug("cbw: dwAddress:%x %x %x %x\n", cbw->CDB[5], cbw->CDB[4],
+	      cbw->CDB[3], cbw->CDB[2]);
+	debug("cbw: ucReserved2=%x\n", cbw->CDB[6]);
+	debug("cbw: uslength:%x %x\n", cbw->CDB[8], cbw->CDB[7]);
+}
+
+static void printcsw(char *buf)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
+				 sizeof(struct bulk_cs_wrap));
+	memcpy((char *)csw, buf, USB_BULK_CS_WRAP_LEN);
+	debug("csw: signature:%x\n", csw->signature);
+	debug("csw: tag:%x\n", csw->tag);
+	debug("csw: residue:%x\n", csw->residue);
+	debug("csw: status:%x\n", csw->status);
+}
+#endif
+
+static int rockusb_tx_write_csw(u32 tag, int residue, u8 status, int size)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct bulk_cs_wrap, csw,
+				 sizeof(struct bulk_cs_wrap));
+	csw->signature = cpu_to_le32(USB_BULK_CS_SIG);
+	csw->tag = tag;
+	csw->residue = cpu_to_be32(residue);
+	csw->status = status;
+#ifdef DEBUG
+	printcsw((char *)&csw);
+#endif
+	return rockusb_tx_write((char *)csw, size);
+}
+
+static unsigned int rx_bytes_expected(struct usb_ep *ep)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	int rx_remain = f_rkusb->download_size - f_rkusb->download_bytes;
+	unsigned int rem;
+	unsigned int maxpacket = ep->maxpacket;
+
+	if (rx_remain <= 0)
+		return 0;
+	else if (rx_remain > EP_BUFFER_SIZE)
+		return EP_BUFFER_SIZE;
+
+	rem = rx_remain % maxpacket;
+	if (rem > 0)
+		rx_remain = rx_remain + (maxpacket - rem);
+
+	return rx_remain;
+}
+
+/* usb_request complete call back to handle down load image */
+static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+	unsigned int transfer_size = 0;
+	const unsigned char *buffer = req->buf;
+	unsigned int buffer_size = req->actual;
+
+	transfer_size = f_rkusb->download_size - f_rkusb->download_bytes;
+	if (!f_rkusb->download_desc) {
+		printf("rx_handler_dl_image blk_get_dev\n");
+		f_rkusb->download_desc = blk_get_dev(f_rkusb->rockusb_dev_type,
+				f_rkusb->rockusb_dev_index);
+		if (!f_rkusb->download_desc ||
+		    f_rkusb->download_desc->type == DEV_TYPE_UNKNOWN) {
+			error("invalid mmc device\n");
+			rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_FAIL,
+					     USB_BULK_CS_WRAP_LEN);
+			return;
+		}
+	}
+
+	if (req->status != 0) {
+		printf("Bad status: %d\n", req->status);
+		rockusb_tx_write_csw(f_rkusb->download_tag, 0,
+				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+		return;
+	}
+
+	if (buffer_size < transfer_size)
+		transfer_size = buffer_size;
+
+	memcpy((void *)CONFIG_ROCKUSB_BUF_ADDR + f_rkusb->download_bytes,
+	       buffer, transfer_size);
+	f_rkusb->download_bytes += transfer_size;
+
+	/* Check if transfer is done */
+	if (f_rkusb->download_bytes >= f_rkusb->download_size) {
+		int blks = 0, blkcnt = f_rkusb->download_size/512;
+		debug("download %d bytes finished, start writing to lba %x\n",
+		       f_rkusb->download_bytes, f_rkusb->download_lba);
+		blks = blk_dwrite(f_rkusb->download_desc,
+				  f_rkusb->download_lba, blkcnt,
+					(char *)CONFIG_ROCKUSB_BUF_ADDR);
+		if (blks != blkcnt) {
+			error("failed writing to device %s: %d\n",
+			      f_rkusb->rockusb_dev_type,
+			      f_rkusb->rockusb_dev_index);
+			rockusb_tx_write_csw(f_rkusb->download_tag, 0,
+					     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+			return;
+		}
+
+		req->complete = rx_handler_command;
+		req->length = EP_BUFFER_SIZE;
+		f_rkusb->download_size = 0;
+		debug("done\n");
+		rockusb_tx_write_csw(f_rkusb->download_tag, 0, CSW_GOOD,
+				     USB_BULK_CS_WRAP_LEN);
+	} else {
+		req->length = rx_bytes_expected(ep);
+	}
+
+	req->actual = 0;
+	usb_ep_queue(ep, req, 0);
+}
+
+static void cb_test_unit_ready(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+
+	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
+			     CSW_GOOD, USB_BULK_CS_WRAP_LEN);
+}
+
+static void cb_read_storage_id(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	char emmc_id[] = "EMMC ";
+
+	printf("cb_read_storage_id\n");
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	rockusb_tx_write_str(emmc_id);
+	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
+			     USB_BULK_CS_WRAP_LEN);
+}
+
+static void cb_write_lba(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	int sector_count;
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	sector_count = (int)get_unaligned_be16(&cbw->CDB[7]);
+	f_rkusb->download_lba = get_unaligned_be32(&cbw->CDB[2]);
+	f_rkusb->download_size = sector_count * 512;
+	f_rkusb->download_bytes = 0;
+	f_rkusb->download_tag = cbw->tag;
+	if ((0 == f_rkusb->download_size) ||
+	    (f_rkusb->download_size > CONFIG_ROCKUSB_BUF_SIZE)) {
+		rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length,
+				     CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+	} else {
+		req->complete = rx_handler_dl_image;
+		req->length = rx_bytes_expected(ep);
+	}
+}
+
+int __weak rkusb_set_reboot_flag(int flag)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	printf("rkusb_set_reboot_flag: %d\n", f_rkusb->reboot_flag);
+	return -ENOSYS;
+}
+
+static void compl_do_reset(struct usb_ep *ep, struct usb_request *req)
+{
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	rkusb_set_reboot_flag(f_rkusb->reboot_flag);
+	do_reset(NULL, 0, 0, NULL);
+}
+
+static void cb_reboot(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	struct f_rockusb *f_rkusb = get_rkusb();
+
+	f_rkusb->reboot_flag = 0;
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	f_rkusb->reboot_flag = cbw->CDB[1];
+	rockusb_func->in_req->complete = compl_do_reset;
+	rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD,
+			     USB_BULK_CS_WRAP_LEN);
+}
+
+static void cb_not_support(struct usb_ep *ep, struct usb_request *req)
+{
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+	printf("Rockusb command %x not support yet\n", cbw->CDB[0]);
+	rockusb_tx_write_csw(cbw->tag, 0, CSW_FAIL, USB_BULK_CS_WRAP_LEN);
+}
+
+static const struct cmd_dispatch_info cmd_dispatch_info[] = {
+	{
+		.cmd = K_FW_TEST_UNIT_READY,
+		.cb = cb_test_unit_ready,
+	},
+	{
+		.cmd = K_FW_READ_FLASH_ID,
+		.cb = cb_read_storage_id,
+	},
+	{
+		.cmd = K_FW_SET_DEVICE_ID,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_TEST_BAD_BLOCK,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_WRITE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_ERASE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_WRITE_SPARE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_READ_SPARE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_ERASE_10_FORCE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_GET_VERSION,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_LBA_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_LBA_WRITE_10,
+		.cb = cb_write_lba,
+	},
+	{
+		.cmd = K_FW_ERASE_SYS_DISK,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SDRAM_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SDRAM_WRITE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SDRAM_EXECUTE,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_READ_FLASH_INFO,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_GET_CHIP_VER,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_LOW_FORMAT,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SET_RESET_FLAG,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SPI_READ_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SPI_WRITE_10,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_SESSION,
+		.cb = cb_not_support,
+	},
+	{
+		.cmd = K_FW_RESET,
+		.cb = cb_reboot,
+	},
+};
+
+static void rx_handler_command(struct usb_ep *ep, struct usb_request *req)
+{
+	void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL;
+	ALLOC_CACHE_ALIGN_BUFFER(struct fsg_bulk_cb_wrap, cbw,
+				 sizeof(struct fsg_bulk_cb_wrap));
+	char *cmdbuf = req->buf;
+	int i;
+
+	if (req->status || req->length == 0)
+		return;
+
+	memcpy((char *)cbw, req->buf, USB_BULK_CB_WRAP_LEN);
+#ifdef DEBUG
+	printcbw(req->buf);
+#endif
+
+	for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) {
+		if (cmd_dispatch_info[i].cmd == cbw->CDB[0]) {
+			func_cb = cmd_dispatch_info[i].cb;
+			break;
+		}
+	}
+
+	if (!func_cb) {
+		error("unknown command: %s", (char *)req->buf);
+		rockusb_tx_write_str("FAILunknown command");
+	} else {
+		if (req->actual < req->length) {
+			u8 *buf = (u8 *)req->buf;
+			buf[req->actual] = 0;
+			func_cb(ep, req);
+		} else {
+			error("buffer overflow");
+			rockusb_tx_write_str("FAILbuffer overflow");
+		}
+	}
+
+	*cmdbuf = '\0';
+	req->actual = 0;
+	usb_ep_queue(ep, req, 0);
+}

commit 5505cbac43eb300c9d98e02dce586585ab050af9
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Tue Aug 1 14:51:17 2017 +0800

    rockchip: rk3399-firefly: enable usb device gadget
    
    ums and fastboot.
    
    Change-Id: Iba6fa6679fbafe7534aa563362b0831267895e39
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index d4e3e6363a..193e611460 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -15,12 +15,21 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_ATF_SUPPORT=y
 CONFIG_SPL_ATF_TEXT_BASE=0x00010000
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
@@ -65,6 +74,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
@@ -73,4 +84,9 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_USE_TINY_PRINTF=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330c
 CONFIG_ERRNO_STR=y

commit 0c294d0696e107ce719271269896bb57c08f4a9b
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 27 20:03:31 2017 +0800

    rockchip: evb-rk3399: add ethaddr and serial# init
    
    Sync the code from puma-rk3399:
    8adc9d1 rockchip: board: puma_rk3399: derive ethaddr from cpuid
    9415b9a rockchip: board: puma_rk3399: add support for serial# and cpuid#
    via efuses
    
    Change-Id: Ib5528d0742b56a0e57431adaa01f411eee7e1ca1
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index 2d642a7a09..02c11e5946 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -5,25 +5,31 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <misc.h>
 #include <ram.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
+#include <asm/setup.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
+#include <u-boot/sha256.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define RK3399_CPUID_OFF  0x7
+#define RK3399_CPUID_LEN  0x10
+
 int board_init(void)
 {
 	struct udevice *pinctrl, *regulator;
 	int ret;
 
 	/*
-	 * The PWM do not have decicated interrupt number in dts and can
+	 * The PWM does not have decicated interrupt number in dts and can
 	 * not get periph_id by pinctrl framework, so let's init them here.
-	 * The PWM2 and PWM3 are for pwm regulater.
+	 * The PWM2 and PWM3 are for pwm regulators.
 	 */
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
 	if (ret) {
@@ -70,6 +76,119 @@ out:
 	return 0;
 }
 
+static void setup_macaddr(void)
+{
+#if CONFIG_IS_ENABLED(CMD_NET)
+	int ret;
+	const char *cpuid = env_get("cpuid#");
+	u8 hash[SHA256_SUM_LEN];
+	int size = sizeof(hash);
+	u8 mac_addr[6];
+
+	/* Only generate a MAC address, if none is set in the environment */
+	if (env_get("ethaddr"))
+		return;
+
+	if (!cpuid) {
+		debug("%s: could not retrieve 'cpuid#'\n", __func__);
+		return;
+	}
+
+	ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size);
+	if (ret) {
+		debug("%s: failed to calculate SHA256\n", __func__);
+		return;
+	}
+
+	/* Copy 6 bytes of the hash to base the MAC address on */
+	memcpy(mac_addr, hash, 6);
+
+	/* Make this a valid MAC address and set it */
+	mac_addr[0] &= 0xfe;  /* clear multicast bit */
+	mac_addr[0] |= 0x02;  /* set local assignment bit (IEEE802) */
+	eth_env_set_enetaddr("ethaddr", mac_addr);
+#endif
+
+	return;
+}
+
+static void setup_serial(void)
+{
+#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE)
+	struct udevice *dev;
+	int ret, i;
+	u8 cpuid[RK3399_CPUID_LEN];
+	u8 low[RK3399_CPUID_LEN/2], high[RK3399_CPUID_LEN/2];
+	char cpuid_str[RK3399_CPUID_LEN * 2 + 1];
+	u64 serialno;
+	char serialno_str[16];
+
+	/* retrieve the device */
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(rockchip_efuse), &dev);
+	if (ret) {
+		debug("%s: could not find efuse device\n", __func__);
+		return;
+	}
+
+	/* read the cpu_id range from the efuses */
+	ret = misc_read(dev, RK3399_CPUID_OFF, &cpuid, sizeof(cpuid));
+	if (ret) {
+		debug("%s: reading cpuid from the efuses failed\n",
+		      __func__);
+		return;
+	}
+
+	memset(cpuid_str, 0, sizeof(cpuid_str));
+	for (i = 0; i < 16; i++)
+		sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
+
+	debug("cpuid: %s\n", cpuid_str);
+
+	/*
+	 * Mix the cpuid bytes using the same rules as in
+	 *   ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
+	 */
+	for (i = 0; i < 8; i++) {
+		low[i] = cpuid[1 + (i << 1)];
+		high[i] = cpuid[i << 1];
+	}
+
+	serialno = crc32_no_comp(0, low, 8);
+	serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
+	snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
+
+	env_set("cpuid#", cpuid_str);
+	env_set("serial#", serialno_str);
+#endif
+
+	return;
+}
+
+int misc_init_r(void)
+{
+	setup_serial();
+	setup_macaddr();
+
+	return 0;
+}
+
+#ifdef CONFIG_SERIAL_TAG
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+	char *serial_string;
+	u64 serial = 0;
+
+	serial_string = env_get("serial#");
+
+	if (serial_string)
+		serial = simple_strtoull(serial_string, NULL, 16);
+
+	serialnr->high = (u32)(serial >> 32);
+	serialnr->low = (u32)(serial & 0xffffffff);
+}
+#endif
+
 #ifdef CONFIG_USB_DWC3
 static struct dwc3_device dwc3_device_data = {
 	.maximum_speed = USB_SPEED_HIGH,

commit 44fe3794744a122b9612458c874d9ed5548cf7fa
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Thu Jul 27 20:05:45 2017 +0800

    rockchip: firefly-rk3399: enable EFUSE drive
    
    Enable the EFUSE driver for get the cpuid and serial.
    
    Change-Id: Ic347b9edbb06da784f0788fc29d61c3003e2b69b
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index 94b9209cd7..d4e3e6363a 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -34,6 +34,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 9c8638a08e..cab940e7c0 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -20,5 +20,8 @@
 #define CONFIG_ENV_OFFSET (240 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
+#define CONFIG_MISC_INIT_R
+#define CONFIG_SERIAL_TAG
+#define CONFIG_ENV_OVERWRITE
 
 #endif

commit a576bbabf2ab94dc36ff6f47283a0c9d41ac5c03
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Jun 16 09:59:56 2017 +0800

    rockchip: rk322x: init rktimer in uboot
    
    rktimer is needed when not using SPL, we can only remove this after
    the rockchip pre-loader(miniloader) has init rktimer.
    
    Change-Id: I926cea6f6e1bfd81f4fe207ec43ddd4d490ddd25
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c
index c0ac2e9b56..f91043eec0 100644
--- a/arch/arm/mach-rockchip/rk322x-board.c
+++ b/arch/arm/mach-rockchip/rk322x-board.c
@@ -67,6 +67,7 @@ int board_init(void)
 		     CON_IOMUX_UART2SEL_MASK,
 		     CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
 
+	rockchip_timer_init();
 	return 0;
 }
 

commit 1eccadd2678cde800539db52e71ab8ff03d48472
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jul 19 19:56:37 2017 +0800

    rockchip: rk3399: correct the env setting
    
    The mmc0(emmc) is the default boot device, so let's use
    mmc device 0 as default env device.
    The SPL size in rk3399 is lager than other Rockchip SoC,
    we need to using a new offset and not to conflict with
    SPL memory space.
    
    Change-Id: I2b2738afda4f6e9340691fef7abb197550ce6fba
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h
index 015f25a774..9c8638a08e 100644
--- a/include/configs/evb_rk3399.h
+++ b/include/configs/evb_rk3399.h
@@ -9,13 +9,15 @@
 
 #include <configs/rk3399_common.h>
 
-#define CONFIG_SYS_MMC_ENV_DEV 1
+#define CONFIG_MMC_SDHCI_SDMA
+#define CONFIG_SYS_MMC_ENV_DEV 0
 /*
- * SPL @ 32k for ~36k
- * ENV @ 96k
- * u-boot @ 128K
+ * SPL @ 32k for ~128k
+ * ENV @ 240k
+ * u-boot @ 256K
  */
-#define CONFIG_ENV_OFFSET (96 * 1024)
+#undef CONFIG_ENV_OFFSET
+#define CONFIG_ENV_OFFSET (240 * 1024)
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 

commit 73bcadf17670b3f174734b02c502fc160a797cd3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Jun 14 16:54:15 2017 +0800

    rockchip: rk3399: dtsi: enable mmc_phy in SPL
    
    Change-Id: I741fb1416f176a64a792e6c35c1103bcdc9a5b27
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 25bd63ecfb..68221b47f7 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1298,6 +1298,7 @@
 		};
 
 		emmc_phy: phy@f780 {
+		u-boot,dm-pre-reloc;
 			compatible = "rockchip,rk3399-emmc-phy";
 			reg = <0xf780 0x24>;
 			clocks = <&sdhci>;

commit a34fddcea912a1a6e4b33177aeb0ca3fa1b9a1b4
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:26 2017 +0800

    dts: rk3399: change the maximum eMMC clock frequency to 150MHz
    
    The rockchip mmc controllers don't support _the _odd__ divider,
    otherwise probably cause unpredictable error.
    
    The driver originally select gpll(594M) as the clock source, and we set
    div to 3 at 200MHz. We have to change the maximum eMMC clock frequency
    to 150MHz in U-Boot stage, so that the div will be 4.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 7f1fc50f38..25bd63ecfb 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -283,7 +283,7 @@
 		arasan,soc-ctl-syscon = <&grf>;
 		assigned-clocks = <&cru SCLK_EMMC>;
 		assigned-clock-rates = <200000000>;
-		max-frequency = <200000000>;
+		max-frequency = <150000000>;
 		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
 		clock-names = "clk_xin", "clk_ahb";
 		clock-output-names = "emmc_cardclock";

commit b673f29a58f5996a9e943fcf782c3810e5108c0f
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:25 2017 +0800

    mmc: add support for HS400 mode of eMMC5.0
    
    This patch adds HS400 mode support for eMMC5.0 device. HS400 mode is
    high speed DDR interface timing from HS200. Clock frequency is up to
    200MHz and only 8-bit bus width is supported. In addition, tuning
    process of HS200 is required to synchronize the command response on the
    CMD line because CMD input timing for HS400 mode is the same as HS200
    mode.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 89a03babfc..2749c24d13 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -855,6 +855,45 @@ static int mmc_select_hs200(struct mmc *mmc)
 }
 #endif
 
+static int mmc_select_hs400(struct mmc *mmc)
+{
+	int ret;
+
+	/* Switch card to HS mode */
+	ret = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			   EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS, false);
+	if (ret)
+		return ret;
+
+	/* Set host controller to HS timing */
+	mmc_set_timing(mmc, MMC_TIMING_MMC_HS);
+
+	/* Reduce frequency to HS frequency */
+	mmc_set_clock(mmc, MMC_HIGH_52_MAX_DTR);
+
+	ret = mmc_send_status(mmc, 1000);
+	if (ret)
+		return ret;
+
+	/* Switch card to DDR */
+	ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			 EXT_CSD_BUS_WIDTH,
+			 EXT_CSD_DDR_BUS_WIDTH_8);
+	if (ret)
+		return ret;
+
+	/* Switch card to HS400 */
+	ret = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			   EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS400, false);
+	if (ret)
+		return ret;
+
+	/* Set host controller to HS400 timing and frequency */
+	mmc_set_timing(mmc, MMC_TIMING_MMC_HS400);
+
+	return ret;
+}
+
 static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 {
 	u8 card_type;
@@ -960,9 +999,14 @@ static int mmc_change_freq(struct mmc *mmc)
 
 	mmc_set_bus_speed(mmc, avail_type);
 
-	if (mmc_card_hs200(mmc))
+	if (mmc_card_hs200(mmc)) {
 		err = mmc_hs200_tuning(mmc);
-	else if (!mmc_card_hs400es(mmc)) {
+		if (avail_type & EXT_CSD_CARD_TYPE_HS400 &&
+		    mmc->bus_width == MMC_BUS_WIDTH_8BIT) {
+			err = mmc_select_hs400(mmc);
+			mmc_set_bus_speed(mmc, avail_type);
+		}
+	} else if (!mmc_card_hs400es(mmc)) {
 		err = mmc_select_bus_width(mmc) > 0 ? 0 : err;
 		if (!err && avail_type & EXT_CSD_CARD_TYPE_DDR_52)
 			err = mmc_select_hs_ddr(mmc);

commit 7279e4870e5693d29cecb8ac10ba7588ff94f1a2
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:24 2017 +0800

    mmc: sdhci: add the support for tuning
    
    MMC framework has already implemented hs200 mode for eMMC devices,
    moreover the standard SDHC3.0 controller support tuning. We can set the
    corresponding flag in host->host_cpas.
    
    Host driver issue tuning command repeatedly until the host controller
    resets Execute Tuning to 0. Host controller resets Execute Tuning to 0
    when tuning is completed or tuning is not completed within 40 times.
    Host driver can abort this loop by 40 times CMD19/CMD21 issue or 150ms
    time-out. If tuning is completed successfully, driver set Sampling Clock
    Select to 1 and this means the host contorller start to use tuned
    sampling clcok. If tuning is failed, host controller keeps Sampling
    Clock Select to 0.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 1815c2d6eb..f5ae3a6bdc 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -158,7 +158,10 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT;
 
 	sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
-	mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
+	mask = SDHCI_CMD_INHIBIT;
+
+	if (data)
+		mask |= SDHCI_DATA_INHIBIT;
 
 	/* We shouldn't wait for data inihibit for stop commands, even
 	   though they might use busy signaling */
@@ -200,6 +203,13 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 	if (data)
 		flags |= SDHCI_CMD_DATA;
 
+	if (cmd->cmdidx == MMC_SEND_TUNING_BLOCK ||
+	    cmd->cmdidx == MMC_SEND_TUNING_BLOCK_HS200) {
+		mask &= ~SDHCI_INT_RESPONSE;
+		mask |= SDHCI_INT_DATA_AVAIL;
+		flags |= SDHCI_CMD_DATA;
+	}
+
 	/* Set Transfer mode regarding to data flag */
 	if (data != 0) {
 		sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
@@ -558,6 +568,108 @@ static int sdhci_init(struct mmc *mmc)
 	return 0;
 }
 
+static int sdhci_send_tuning(struct sdhci_host *host, u32 opcode)
+{
+	struct mmc_cmd cmd;
+
+	cmd.cmdidx = opcode;
+	cmd.resp_type = MMC_RSP_R1;
+	cmd.cmdarg = 0;
+	/*
+	 * In response to CMD19, the card sends 64 bytes of tuning
+	 * block to the Host Controller. So we set the block size
+	 * to 64 here.
+	 */
+	if (opcode == MMC_SEND_TUNING_BLOCK_HS200 &&
+	    host->mmc->bus_width == MMC_BUS_WIDTH_8BIT)
+		sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), SDHCI_BLOCK_SIZE);
+	else
+		sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE);
+
+	/*
+	 * The tuning block is sent by the card to the host controller.
+	 * So we set the TRNS_READ bit in the Transfer Mode register.
+	 * This also takes care of setting DMA Enable and Multi Block
+	 * Select in the same register to 0.
+	 */
+	sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
+
+#ifdef CONFIG_DM_MMC
+	return sdhci_send_command(host->mmc->dev, &cmd, NULL);
+#else
+	return sdhci_send_command(host->mmc, &cmd, NULL);
+#endif
+}
+
+#define MAX_TUNING_LOOP 40
+static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
+{
+	int i;
+	int ret;
+
+	/*
+	 * Issue opcode repeatedly till Execute Tuning is set to 0 or the number
+	 * of loops reaches 40 times.
+	 */
+	for (i = 0; i < MAX_TUNING_LOOP; i++) {
+		u16 ctrl;
+
+		ret = sdhci_send_tuning(host, opcode);
+
+		if (ret)
+			return ret;
+
+		ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+		if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {
+			if (ctrl & SDHCI_CTRL_TUNED_CLK)
+				/* Tuning successfully */
+				return 0;
+			break;
+		}
+	}
+
+	return -ETIMEDOUT;
+}
+
+#ifdef CONFIG_DM_MMC
+static int sdhci_execute_tuning(struct udevice *dev, u32 opcode)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static int sdhci_execute_tuning(struct mmc *mmc, u32 opcode)
+{
+#endif
+	struct sdhci_host *host = mmc->priv;
+	u16 ctrl;
+
+	/*
+	 * The Host Controller needs tuning in case of SDR104 and DDR50
+	 * mode, and for SDR50 mode when Use Tuning for SDR50 is set in
+	 * the Capabilities register.
+	 * If the Host Controller supports the HS200 mode then the
+	 * tuning function has to be executed.
+	 */
+	switch (mmc->timing) {
+	/* HS400 tuning is done in HS200 mode */
+	case MMC_TIMING_MMC_HS400:
+		return -EINVAL;
+	case MMC_TIMING_MMC_HS200:
+		/*
+		 * Periodic re-tuning for HS400 is not expected to be needed, so
+		 * disable it here.
+		 */
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	ctrl |= SDHCI_CTRL_EXEC_TUNING;
+	sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
+
+	return __sdhci_execute_tuning(host, opcode);
+}
+
 #ifdef CONFIG_DM_MMC
 int sdhci_probe(struct udevice *dev)
 {
@@ -570,6 +682,7 @@ const struct dm_mmc_ops sdhci_ops = {
 	.card_busy	= sdhci_card_busy,
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
+	.execute_tuning = sdhci_execute_tuning,
 };
 #else
 static const struct mmc_ops sdhci_ops = {
@@ -577,6 +690,7 @@ static const struct mmc_ops sdhci_ops = {
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
 	.init		= sdhci_init,
+	.execute_tuning = sdhci_execute_tuning,
 };
 #endif
 

commit dce4cf740c5c4ccb435db3c6687252da4bf67c13
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:23 2017 +0800

    mmc: sdhci: rockchip: add phy support
    
    This patch gets phy phandle from dt-binding, and power
    cycle/re-configure phy whilst changing card clock.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f4050b1c6f..fd3bb1042a 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -6,6 +6,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
+#include <asm/arch/hardware.h>
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
@@ -28,11 +29,151 @@ struct rockchip_sdhc_plat {
 	struct mmc mmc;
 };
 
+struct rockchip_emmc_phy {
+	u32 emmcphy_con[7];
+	u32 reserved;
+	u32 emmcphy_status;
+};
+
 struct rockchip_sdhc {
 	struct sdhci_host host;
 	void *base;
+	struct rockchip_emmc_phy *phy;
 };
 
+#define PHYCTRL_CALDONE_MASK		0x1
+#define PHYCTRL_CALDONE_SHIFT		0x6
+#define PHYCTRL_CALDONE_DONE		0x1
+
+#define PHYCTRL_DLLRDY_MASK		0x1
+#define PHYCTRL_DLLRDY_SHIFT		0x5
+#define PHYCTRL_DLLRDY_DONE		0x1
+
+#define PHYCTRL_FREQSEL_200M            0x0
+#define PHYCTRL_FREQSEL_50M             0x1
+#define PHYCTRL_FREQSEL_100M            0x2
+#define PHYCTRL_FREQSEL_150M            0x3
+
+#define KHz	(1000)
+#define MHz	(1000 * KHz)
+
+static void rk3399_emmc_phy_power_on(struct rockchip_emmc_phy *phy, u32 clock)
+{
+	u32 caldone, dllrdy, freqsel;
+	uint start;
+
+	writel(RK_CLRSETBITS(7 << 4, 0), &phy->emmcphy_con[6]);
+	writel(RK_CLRSETBITS(1 << 11, 1 << 11), &phy->emmcphy_con[0]);
+	writel(RK_CLRSETBITS(0xf << 7, 4 << 7), &phy->emmcphy_con[0]);
+
+	/*
+	 * According to the user manual, calpad calibration
+	 * cycle takes more than 2us without the minimal recommended
+	 * value, so we may need a little margin here
+	 */
+	udelay(3);
+	writel(RK_CLRSETBITS(1, 1), &phy->emmcphy_con[6]);
+
+	/*
+	 * According to the user manual, it asks driver to
+	 * wait 5us for calpad busy trimming
+	 */
+	udelay(5);
+	caldone = readl(&phy->emmcphy_status);
+	caldone = (caldone >> PHYCTRL_CALDONE_SHIFT) & PHYCTRL_CALDONE_MASK;
+	if (caldone != PHYCTRL_CALDONE_DONE) {
+		debug("%s: caldone timeout.\n", __func__);
+		return;
+	}
+
+	/* Set the frequency of the DLL operation */
+	if (clock < 75 * MHz)
+		freqsel = PHYCTRL_FREQSEL_50M;
+	else if (clock < 125 * MHz)
+		freqsel = PHYCTRL_FREQSEL_100M;
+	else if (clock < 175 * MHz)
+		freqsel = PHYCTRL_FREQSEL_150M;
+	else
+		freqsel = PHYCTRL_FREQSEL_200M;
+
+	/* Set the frequency of the DLL operation */
+	writel(RK_CLRSETBITS(3 << 12, freqsel << 12), &phy->emmcphy_con[0]);
+	writel(RK_CLRSETBITS(1 << 1, 1 << 1), &phy->emmcphy_con[6]);
+
+	start = get_timer(0);
+
+	do {
+		udelay(1);
+		dllrdy = readl(&phy->emmcphy_status);
+		dllrdy = (dllrdy >> PHYCTRL_DLLRDY_SHIFT) & PHYCTRL_DLLRDY_MASK;
+		if (dllrdy == PHYCTRL_DLLRDY_DONE)
+			break;
+	} while (get_timer(start) < 50000);
+
+	if (dllrdy != PHYCTRL_DLLRDY_DONE)
+		debug("%s: dllrdy timeout.\n", __func__);
+}
+
+static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)
+{
+	writel(RK_CLRSETBITS(1, 0), &phy->emmcphy_con[6]);
+	writel(RK_CLRSETBITS(1 << 1, 0), &phy->emmcphy_con[6]);
+}
+
+static int arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	struct rockchip_sdhc *priv =
+			container_of(host, struct rockchip_sdhc, host);
+	int cycle_phy = host->clock != clock &&
+			clock > EMMC_MIN_FREQ;
+
+	if (cycle_phy)
+		rk3399_emmc_phy_power_off(priv->phy);
+
+	sdhci_set_clock(host, clock);
+
+	if (cycle_phy)
+		rk3399_emmc_phy_power_on(priv->phy, clock);
+
+	return 0;
+}
+
+static struct sdhci_ops arasan_sdhci_ops = {
+	.set_clock	= arasan_sdhci_set_clock,
+};
+
+static int arasan_get_phy(struct udevice *dev)
+{
+	struct rockchip_sdhc *priv = dev_get_priv(dev);
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+	priv->phy = (struct rockchip_emmc_phy *)0xff77f780;
+#else
+	int phy_node, grf_node;
+	fdt_addr_t grf_base, grf_phy_offset;
+
+	phy_node = fdtdec_lookup_phandle(gd->fdt_blob,
+					 dev_of_offset(dev), "phys");
+	if (phy_node <= 0) {
+		debug("Not found emmc phy device\n");
+		return -ENODEV;
+	}
+
+	grf_node = fdt_parent_offset(gd->fdt_blob, phy_node);
+	if (grf_node <= 0) {
+		debug("Not found usb phy device\n");
+		return -ENODEV;
+	}
+
+	grf_base = fdtdec_get_addr(gd->fdt_blob, grf_node, "reg");
+	grf_phy_offset = fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
+				grf_node, phy_node, "reg", 0, NULL, false);
+
+	priv->phy = (struct rockchip_emmc_phy *)(grf_base + grf_phy_offset);
+#endif
+	return 0;
+}
+
 static int arasan_sdhci_probe(struct udevice *dev)
 {
 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
@@ -75,6 +216,12 @@ static int arasan_sdhci_probe(struct udevice *dev)
 		printf("%s fail to get clk\n", __func__);
 	}
 
+	ret = arasan_get_phy(dev);
+	if (ret)
+		return ret;
+
+	host->ops = &arasan_sdhci_ops;
+
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->max_clk = max_frequency;
 

commit a15c58b2f9d2d083f1896a5a206f0cec6c46eb4e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:22 2017 +0800

    mmc: sdhci: export sdhci_set_clock()
    
    For arasan-rk3399-sdhci controller, we should make sure the phy is in
    poweroff status before we configure the clock stuff. So that we need to
    export it for phy configuration.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 67ecacbf2b..1815c2d6eb 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -301,9 +301,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 		return -ECOMM;
 }
 
-static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
+int sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-	struct sdhci_host *host = mmc->priv;
 	unsigned int div, clk = 0, timeout;
 
 	/* Wait max 20 ms */
@@ -319,12 +318,10 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		timeout--;
 		udelay(100);
 	}
-
 	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 
 	if (clock == 0)
 		return 0;
-
 	if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
 		/*
 		 * Check if the Host Controller supports Programmable Clock
@@ -364,7 +361,6 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		}
 		div >>= 1;
 	}
-
 	if (host->ops && host->ops->set_clock_ext)
 		host->ops->set_clock_ext(host, div);
 
@@ -386,12 +382,10 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		timeout--;
 		udelay(1000);
 	}
-
 	clk |= SDHCI_CLOCK_CARD_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 
 	host->clock = clock;
-
 	return 0;
 }
 
@@ -489,8 +483,12 @@ static int sdhci_set_ios(struct mmc *mmc)
 	if (host->ops && host->ops->set_control_reg)
 		host->ops->set_control_reg(host);
 
-	if (mmc->clock != host->clock)
-		sdhci_set_clock(mmc, mmc->clock);
+	if (mmc->clock != host->clock) {
+		if (host->ops && host->ops->set_clock)
+			host->ops->set_clock(host, mmc->clock);
+		else
+			sdhci_set_clock(host, mmc->clock);
+	}
 
 	/* Set bus width */
 	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
diff --git a/include/sdhci.h b/include/sdhci.h
index b8b614d3e9..354f1e7099 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -254,7 +254,8 @@ struct sdhci_ops {
 	int	(*get_cd)(struct sdhci_host *host);
 	void	(*set_control_reg)(struct sdhci_host *host);
 	void	(*set_ios_post)(struct sdhci_host *host);
-	void	(*set_clock)(struct sdhci_host *host, u32 div);
+	int	(*set_clock)(struct sdhci_host *host, unsigned int clock);
+	void	(*set_clock_ext)(struct sdhci_host *host, u32 div);
 };
 
 struct sdhci_host {
@@ -279,6 +280,8 @@ struct sdhci_host {
 	struct mmc_config cfg;
 };
 
+int sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
+
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
 
 static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)

commit 5de821224e8787b9ca6870c03796775d7de2093a
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:21 2017 +0800

    mmc: sdhci: rename set_clock callback
    
    In fact, the original name is unsuitable for its behavior. It's better
    to rename to set_clock_ext.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 62817a0d07..95447310ab 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -73,14 +73,14 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
 	sdhci_writel(host, ctrl, SDHCI_CONTROL2);
 }
 
-static void s5p_set_clock(struct sdhci_host *host, u32 div)
+static void s5p_set_clock_ext(struct sdhci_host *host, u32 div)
 {
 	/* ToDo : Use the Clock Framework */
 	set_mmc_clk(host->index, div);
 }
 
 static const struct sdhci_ops s5p_sdhci_ops = {
-	.set_clock	= &s5p_set_clock,
+	.set_clock_ext	= &s5p_set_clock_ext,
 	.set_control_reg = &s5p_sdhci_set_control_reg,
 };
 
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 5c9459a8c3..67ecacbf2b 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -365,8 +365,8 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 		div >>= 1;
 	}
 
-	if (host->ops && host->ops->set_clock)
-		host->ops->set_clock(host, div);
+	if (host->ops && host->ops->set_clock_ext)
+		host->ops->set_clock_ext(host, div);
 
 	clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
 	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)

commit 76194d8c2fabf723f8017ac4abcf8bb061b91b43
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:20 2017 +0800

    mmc: sdhci: add support for UHS timing
    
    To support UHS speed mode, controller should enable 1.8V signaling and
    select one of UHS modes.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 0c5cf5cc86..5c9459a8c3 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -425,6 +425,39 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 	sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 }
 
+static void sdhci_set_uhs_signaling(struct sdhci_host *host)
+{
+	u16 ctrl_2;
+	u32 timing = host->mmc->timing;
+
+	ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	/* Select Bus Speed Mode for host */
+	ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
+
+	if ((timing != MMC_TIMING_LEGACY) &&
+	    (timing != MMC_TIMING_MMC_HS) &&
+	    (timing != MMC_TIMING_SD_HS))
+		ctrl_2 |= SDHCI_CTRL_VDD_180;
+
+	if ((timing == MMC_TIMING_MMC_HS200) ||
+	    (timing == MMC_TIMING_UHS_SDR104))
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_DRV_TYPE_A;
+	else if (timing == MMC_TIMING_UHS_SDR12)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
+	else if (timing == MMC_TIMING_UHS_SDR25)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
+	else if (timing == MMC_TIMING_UHS_SDR50)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
+	else if ((timing == MMC_TIMING_UHS_DDR50) ||
+		 (timing == MMC_TIMING_MMC_DDR52))
+		ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
+	else if (timing == MMC_TIMING_MMC_HS400 ||
+		 timing == MMC_TIMING_MMC_HS400ES)
+		ctrl_2 |= SDHCI_CTRL_HS400 | SDHCI_CTRL_DRV_TYPE_A;
+
+	sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
+}
+
 #ifdef CONFIG_DM_MMC
 static bool sdhci_card_busy(struct udevice *dev)
 {
@@ -484,6 +517,13 @@ static int sdhci_set_ios(struct mmc *mmc)
 
 	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 
+	if ((mmc->timing != MMC_TIMING_LEGACY) &&
+	    (mmc->timing != MMC_TIMING_MMC_HS) &&
+	    (mmc->timing != MMC_TIMING_SD_HS))
+		sdhci_set_power(host, MMC_VDD_165_195_SHIFT);
+
+	sdhci_set_uhs_signaling(host);
+
 	/* If available, call the driver specific "post" set_ios() function */
 	if (host->ops && host->ops->set_ios_post)
 		host->ops->set_ios_post(host);
diff --git a/include/mmc.h b/include/mmc.h
index 4a9bfb5ff8..75d2fbd453 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -138,6 +138,7 @@
 
 #define MMC_STATE_PRG		(7 << 9)
 
+#define MMC_VDD_165_195_SHIFT	7
 #define MMC_VDD_165_195		0x00000080	/* VDD voltage 1.65 - 1.95 */
 #define MMC_VDD_20_21		0x00000100	/* VDD voltage 2.0 ~ 2.1 */
 #define MMC_VDD_21_22		0x00000200	/* VDD voltage 2.1 ~ 2.2 */
diff --git a/include/sdhci.h b/include/sdhci.h
index 4348f1149d..b8b614d3e9 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -147,6 +147,23 @@
 #define SDHCI_ACMD12_ERR	0x3C
 
 /* 3E-3F reserved */
+#define SDHCI_HOST_CONTROL2		0x3E
+#define SDHCI_CTRL_UHS_MASK		0x0007
+#define SDHCI_CTRL_UHS_SDR12		0x0000
+#define SDHCI_CTRL_UHS_SDR25		0x0001
+#define SDHCI_CTRL_UHS_SDR50		0x0002
+#define SDHCI_CTRL_UHS_SDR104		0x0003
+#define SDHCI_CTRL_UHS_DDR50		0x0004
+#define SDHCI_CTRL_HS400		0x0005
+#define SDHCI_CTRL_VDD_180		0x0008
+#define SDHCI_CTRL_DRV_TYPE_MASK	0x0030
+#define SDHCI_CTRL_DRV_TYPE_B		0x0000
+#define SDHCI_CTRL_DRV_TYPE_A		0x0010
+#define SDHCI_CTRL_DRV_TYPE_C		0x0020
+#define SDHCI_CTRL_DRV_TYPE_D		0x0030
+#define SDHCI_CTRL_EXEC_TUNING		0x0040
+#define SDHCI_CTRL_TUNED_CLK		0x0080
+#define SDHCI_CTRL_PRESET_VAL_ENABLE	0x8000
 
 #define SDHCI_CAPABILITIES	0x40
 #define  SDHCI_TIMEOUT_CLK_MASK	0x0000003F

commit 31044c33dec7dea9ce253cf7d4f080fd17b8e596
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:19 2017 +0800

    mmc: sdhci: update host->clock after clock setting
    
    Overwrite host->clock after clock setting to avoid repetitive reset
    clock.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 1b947dc7fc..0c5cf5cc86 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -389,6 +389,9 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 
 	clk |= SDHCI_CLOCK_CARD_EN;
 	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+	host->clock = clock;
+
 	return 0;
 }
 

commit 2a62bae8ce411b681bdcb7654fb1566e690dee0e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:18 2017 +0800

    mmc: sdhci: rockchip: fix bus width setting
    
    Rockchip sdhci controller capable of 8-bit transfer. The original can
    only run at 4 bit mode.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f31d329c81..f4050b1c6f 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -47,10 +47,24 @@ static int arasan_sdhci_probe(struct udevice *dev)
 
 	host->name = dev->name;
 	host->ioaddr = map_sysmem(dtplat->reg[1], dtplat->reg[3]);
+	host->host_caps |= MMC_MODE_8BIT;
 	max_frequency = dtplat->max_frequency;
 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
 #else
 	max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
+	switch (dev_read_u32_default(dev, "bus-width", 4)) {
+	case 8:
+		host->host_caps |= MMC_MODE_8BIT;
+		break;
+	case 4:
+		host->host_caps |= MMC_MODE_4BIT;
+		break;
+	case 1:
+		break;
+	default:
+		printf("Invalid \"bus-width\" value\n");
+		return -EINVAL;
+	}
 	ret = clk_get_by_index(dev, 0, &clk);
 #endif
 	if (!ret) {

commit c1cfa99b4e425fdc084ebd7ddc28312a7d478cd3
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:17 2017 +0800

    mmc: dw_mmc: fix bus width setting
    
    Hosts capable of 8-bit transfers can also do 4 bits.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 0272bf50c3..c94ed6e576 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -559,8 +559,7 @@ void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
 	cfg->host_caps = host->caps;
 
 	if (host->buswidth == 8) {
-		cfg->host_caps |= MMC_MODE_8BIT;
-		cfg->host_caps &= ~MMC_MODE_4BIT;
+		cfg->host_caps |= MMC_MODE_8BIT | MMC_MODE_4BIT;
 	} else {
 		cfg->host_caps |= MMC_MODE_4BIT;
 		cfg->host_caps &= ~MMC_MODE_8BIT;

commit 24527ef9d051e3b1cdfce5119b66801c312c3c30
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:16 2017 +0800

    mmc: dw_mmc: rockchip: fix data crc error on ddr52 8bit mode
    
    The clk_divider must be set to 1 on ddr52 8bit mode for rockchip
    platform. Otherwise we will get a data crc error during data
    transmission.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index f2a3989c32..0272bf50c3 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -344,7 +344,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 	int timeout = 10000;
 	unsigned long sclk;
 
-	if ((freq == host->clock) || (freq == 0))
+	if (freq == 0)
 		return 0;
 	/*
 	 * If host->get_mmc_clk isn't defined,
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index f79e557ab1..6027642f44 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -43,6 +43,13 @@ static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
 	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
 	int ret;
 
+	/*
+	 * If DDR52 8bit mode(only emmc work in 8bit mode),
+	 * divider must be set 1
+	 */
+	if (mmc_card_ddr52(host->mmc) && host->mmc->bus_width == 8)
+		freq *= 2;
+
 	ret = clk_set_rate(&priv->clk, freq);
 	if (ret < 0) {
 		debug("%s: err=%d\n", __func__, ret);

commit 5545757f7791e4b522a775b3f495feb508f659a1
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:15 2017 +0800

    mmc: add DDR52 support for eMMC card
    
    4.41+ eMMC card devices can run at 52MHz on DDR 8-bit mode, it can
    improve write/read performance. Host driver can set MMC_MODE_DDR_52Mhz
    to enable this feature.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index c6938ba9ca..89a03babfc 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -795,6 +795,27 @@ static int mmc_select_hs(struct mmc *mmc)
 	return ret;
 }
 
+static int mmc_select_hs_ddr(struct mmc *mmc)
+{
+	u32 ext_csd_bits;
+	int err = 0;
+
+	if (mmc->bus_width == MMC_BUS_WIDTH_1BIT)
+		return 0;
+
+	ext_csd_bits = (mmc->bus_width == MMC_BUS_WIDTH_8BIT) ?
+			EXT_CSD_DDR_BUS_WIDTH_8 : EXT_CSD_DDR_BUS_WIDTH_4;
+
+	err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			 EXT_CSD_BUS_WIDTH, ext_csd_bits);
+	if (err)
+		return err;
+
+	mmc_set_timing(mmc, MMC_TIMING_MMC_DDR52);
+
+	return 0;
+}
+
 #ifndef CONFIG_SPL_BUILD
 static int mmc_select_hs200(struct mmc *mmc)
 {
@@ -941,8 +962,11 @@ static int mmc_change_freq(struct mmc *mmc)
 
 	if (mmc_card_hs200(mmc))
 		err = mmc_hs200_tuning(mmc);
-	else
+	else if (!mmc_card_hs400es(mmc)) {
 		err = mmc_select_bus_width(mmc) > 0 ? 0 : err;
+		if (!err && avail_type & EXT_CSD_CARD_TYPE_DDR_52)
+			err = mmc_select_hs_ddr(mmc);
+	}
 
 	return err;
 }

commit 0d797f1817b7b48099abdc659e661768bb1c1954
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:14 2017 +0800

    mmc: dw_mmc: reset controller after data error
    
    Per dw_mmc databook, it's recommend that reset the host contoller if
    some data-related error occurre during tuning progress.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 560a1ca4d4..f2a3989c32 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -97,7 +97,7 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 {
 	int ret = 0;
 	u32 timeout = 240000;
-	u32 mask, size, i, len = 0;
+	u32 status, ctrl, mask, size, i, len = 0;
 	u32 *buf = NULL;
 	ulong start = get_timer(0);
 	u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >>
@@ -114,6 +114,23 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data)
 		/* Error during data transfer. */
 		if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
 			debug("%s: DATA ERROR!\n", __func__);
+
+			dwmci_wait_reset(host, DWMCI_RESET_ALL);
+			dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
+				     DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
+
+			do {
+				status = dwmci_readl(host, DWMCI_CMD);
+				if (timeout-- < 0)
+					ret = -ETIMEDOUT;
+			} while (status & DWMCI_CMD_START);
+
+			if (!host->fifo_mode) {
+				ctrl = dwmci_readl(host, DWMCI_BMOD);
+				ctrl |= DWMCI_BMOD_IDMAC_RESET;
+				dwmci_writel(host, DWMCI_BMOD, ctrl);
+			}
+
 			ret = -EINVAL;
 			break;
 		}

commit 4455fdd99ce625d75f57206c32925e32754503d4
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:13 2017 +0800

    mmc: dw_mmc: rockchip: implement tuning with clock phase framework
    
    This algorithm will try 1 degree increment, since there's no way to tell
    what resolution the underlying phase code uses. As an added bonus, doing
    many tunings yields better results since some tests are run more than
    once (ex: if the underlying driver use 45 degree increments, the tuning
    code will try the same angle more than once).
    
    It will then construct a list of good phase ranges (even range that
    cross 270/0), will pick the biggest range then it will set the
    sample_clk to the middle of that range.
    
    Please notice that it tuning only 0-270 degree in U-Boot, but kernel
    tuning range is 0-360 degree. Below are two reasons about this:
    1. Expect data-related interrupt may miss during 270-360 degree on
    rockchip platform, dw_mmc driver will poll for data interrupt until
    240 seconds timeout afterwards. And the host controller will be left in
    an unpredictable state.
    2. The phase of a clock signal is shift by some delay elements on
    rockchip platform. And the delay element affected by logic voltage and
    temperature in runtime. These factors wouldn't have changed a lot in
    U-Boot stage.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index e7fcf89f73..f79e557ab1 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -30,6 +30,7 @@ struct rockchip_mmc_plat {
 
 struct rockchip_dwmmc_priv {
 	struct clk clk;
+	struct clk sample_clk;
 	struct dwmci_host host;
 	int fifo_depth;
 	bool fifo_mode;
@@ -95,6 +96,123 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+#define NUM_PHASES			270
+#define TUNING_ITERATION_TO_PHASE(i)	(DIV_ROUND_UP((i) * 270, NUM_PHASES))
+
+static int rockchip_dwmmc_execute_tuning(struct dwmci_host *host, u32 opcode)
+{
+	int ret = 0;
+	int i;
+	bool v, prev_v = 0, first_v;
+	struct range_t {
+		int start;
+		int end; /* inclusive */
+	};
+	struct range_t *ranges;
+	unsigned int range_count = 0;
+	int longest_range_len = -1;
+	int longest_range = -1;
+	int middle_phase;
+	struct udevice *dev = host->priv;
+	struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
+	struct mmc *mmc = host->mmc;
+
+	if (IS_ERR(&priv->sample_clk))
+		return -EIO;
+
+	ranges = calloc(sizeof(*ranges), NUM_PHASES / 2 + 1);
+	if (!ranges)
+		return -ENOMEM;
+
+	/* Try each phase and extract good ranges */
+	for (i = 0; i < NUM_PHASES; ) {
+		clk_set_phase(&priv->sample_clk, TUNING_ITERATION_TO_PHASE(i));
+
+		v = !mmc_send_tuning(mmc, opcode);
+
+		if (i == 0)
+			first_v = v;
+
+		if ((!prev_v) && v) {
+			range_count++;
+			ranges[range_count - 1].start = i;
+		}
+		if (v) {
+			ranges[range_count - 1].end = i;
+			i++;
+		} else if (i == NUM_PHASES - 1) {
+			/* No extra skipping rules if we're at the end */
+			i++;
+		} else {
+			/*
+			 * No need to check too close to an invalid
+			 * one since testing bad phases is slow.  Skip
+			 * 20 degrees.
+			 */
+			i += DIV_ROUND_UP(20 * NUM_PHASES, NUM_PHASES);
+
+			/* Always test the last one */
+			if (i >= NUM_PHASES)
+				i = NUM_PHASES - 1;
+		}
+
+		prev_v = v;
+	}
+
+	if (range_count == 0) {
+		debug("All phases bad!");
+		ret = -EIO;
+		goto free;
+	}
+
+	/* wrap around case, merge the end points */
+	if ((range_count > 1) && first_v && v) {
+		ranges[0].start = ranges[range_count - 1].start;
+		range_count--;
+	}
+
+	if (ranges[0].start == 0 && ranges[0].end == NUM_PHASES - 1) {
+		clk_set_phase(&priv->sample_clk,
+			      TUNING_ITERATION_TO_PHASE(NUM_PHASES / 2));
+		debug("All phases work, using middle phase.\n");
+		goto free;
+	}
+
+	/* Find the longest range */
+	for (i = 0; i < range_count; i++) {
+		int len = (ranges[i].end - ranges[i].start + 1);
+
+		if (len < 0)
+			len += NUM_PHASES;
+
+		if (longest_range_len < len) {
+			longest_range_len = len;
+			longest_range = i;
+		}
+
+		debug("Good phase range %d-%d (%d len)\n",
+		      TUNING_ITERATION_TO_PHASE(ranges[i].start),
+		      TUNING_ITERATION_TO_PHASE(ranges[i].end), len);
+	}
+
+	printf("Best phase range %d-%d (%d len)\n",
+	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].start),
+	       TUNING_ITERATION_TO_PHASE(ranges[longest_range].end),
+	       longest_range_len);
+
+	middle_phase = ranges[longest_range].start + longest_range_len / 2;
+	middle_phase %= NUM_PHASES;
+	debug("Successfully tuned phase to %d\n",
+	      TUNING_ITERATION_TO_PHASE(middle_phase));
+
+	clk_set_phase(&priv->sample_clk,
+		      TUNING_ITERATION_TO_PHASE(middle_phase));
+
+free:
+	free(ranges);
+	return ret;
+}
+
 static int rockchip_dwmmc_probe(struct udevice *dev)
 {
 	struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
@@ -111,6 +229,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
 	host->buswidth = dtplat->bus_width;
 	host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
+	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 	host->priv = dev;
 	host->dev_index = 0;
 	priv->fifo_depth = dtplat->fifo_depth;
@@ -125,6 +244,8 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
 	ret = clk_get_by_index(dev, 0, &priv->clk);
 	if (ret < 0)
 		return ret;
+	clk_get_by_name(dev, "ciu_sample", &priv->sample_clk);
+	host->execute_tuning = rockchip_dwmmc_execute_tuning;
 #endif
 	host->fifoth_val = MSIZE(0x2) |
 		RX_WMARK(priv->fifo_depth / 2 - 1) |

commit 8c921dce85fe02b6276d9a170269718cb677e0f2
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:12 2017 +0800

    mmc: dw_mmc: add the support for the tuning scheme
    
    For the HS200/HS400/SDR104, tuning is needed to determine the optimal
    sampling point. Actual tuning procedure is provided by specific host
    controller driver.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 85696daaff..560a1ca4d4 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -403,6 +403,22 @@ static bool dwmci_card_busy(struct mmc *mmc)
 	return !!(status & DWMCI_BUSY);
 }
 
+#ifdef CONFIG_DM_MMC
+static int dwmci_execute_tuning(struct udevice *dev, u32 opcode)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static int dwmci_execute_tuning(struct mmc *mmc, u32 opcode)
+{
+#endif
+	struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+
+	if (!host->execute_tuning)
+		return -EIO;
+
+	return host->execute_tuning(host, opcode);
+}
+
 #ifdef CONFIG_DM_MMC
 static int dwmci_set_ios(struct udevice *dev)
 {
@@ -498,6 +514,7 @@ const struct dm_mmc_ops dm_dwmci_ops = {
 	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
+	.execute_tuning	= dwmci_execute_tuning,
 };
 
 #else
@@ -506,6 +523,7 @@ static const struct mmc_ops dwmci_ops = {
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
 	.init		= dwmci_init,
+	.execute_tuning	= dwmci_execute_tuning,
 };
 #endif
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index a9058824e0..374a67d39c 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -180,6 +180,7 @@ struct dwmci_host {
 	 * @freq:	Frequency the host is trying to achieve
 	 */
 	unsigned int (*get_mmc_clk)(struct dwmci_host *host, uint freq);
+	int (*execute_tuning)(struct dwmci_host *host, u32 opcode);
 #ifndef CONFIG_BLK
 	struct mmc_config cfg;
 #endif

commit 11fbeef50c1bcee6aa4ff957a5eafab7b2bd788e
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:10 2017 +0800

    rockchip: clk: rk3288: add support for the clock phase
    
    This patch adds phase adjustment for mmc clock(ciu_sample), which is
    used to select the optimal sampling point of a data input.
    
    The phase shift is achieved through 255 delay elements(40-80
    picoseconds),  and calculate the number of delay element via clock
    frequency.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 31ec327f86..bd05379c44 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -496,6 +496,7 @@ static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,
 	switch (periph) {
 	case HCLK_EMMC:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 		con = readl(&cru->cru_clksel_con[12]);
 		mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT;
 		div = (con & EMMC_DIV_MASK) >> EMMC_DIV_SHIFT;
@@ -648,7 +649,9 @@ static ulong rk3288_clk_get_rate(struct clk *clk)
 	case HCLK_SDMMC:
 	case HCLK_SDIO0:
 	case SCLK_EMMC:
+	case SCLK_EMMC_SAMPLE:
 	case SCLK_SDMMC:
+	case SCLK_SDMMC_SAMPLE:
 	case SCLK_SDIO0:
 		new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id);
 		break;
@@ -763,9 +766,130 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 	return new_rate;
 }
 
+#define ROCKCHIP_MMC_DELAY_SEL		BIT(10)
+#define ROCKCHIP_MMC_DEGREE_MASK	0x3
+#define ROCKCHIP_MMC_DELAYNUM_OFFSET	2
+#define ROCKCHIP_MMC_DELAYNUM_MASK	(0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
+
+#define PSECS_PER_SEC 1000000000000LL
+/*
+ * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
+ * simplify calculations. So 45degs could be anywhere between 33deg and 57.8deg.
+ */
+#define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60
+
+int rockchip_mmc_get_phase(struct clk *clk)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	u32 raw_value, delay_num;
+	u16 degrees = 0;
+	ulong rate;
+
+	rate = rk3288_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		raw_value = readl(&cru->cru_emmc_con[1]);
+	else
+		raw_value = readl(&cru->cru_sdmmc_con[1]);
+
+	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;
+
+	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {
+		/* degrees/delaynum * 10000 */
+		unsigned long factor = (ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10) *
+					36 * (rate / 1000000);
+
+		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);
+		delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET;
+		degrees += DIV_ROUND_CLOSEST(delay_num * factor, 10000);
+	}
+
+	return degrees % 360;
+}
+
+int rockchip_mmc_set_phase(struct clk *clk, u32 degrees)
+{
+	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
+	struct rk3288_cru *cru = priv->cru;
+	u8 nineties, remainder, delay_num;
+	u32 raw_value, delay;
+	ulong rate;
+
+	rate = rk3288_clk_get_rate(clk);
+
+	if (rate < 0)
+		return rate;
+
+	nineties = degrees / 90;
+	remainder = (degrees % 90);
+
+	/*
+	 * Convert to delay; do a little extra work to make sure we
+	 * don't overflow 32-bit / 64-bit numbers.
+	 */
+	delay = 10000000; /* PSECS_PER_SEC / 10000 / 10 */
+	delay *= remainder;
+	delay = DIV_ROUND_CLOSEST(delay, (rate / 1000) * 36 *
+				(ROCKCHIP_MMC_DELAY_ELEMENT_PSEC / 10));
+
+	delay_num = (u8)min_t(u32, delay, 255);
+
+	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;
+	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;
+	raw_value |= nineties;
+
+	if (clk->id == SCLK_EMMC_SAMPLE)
+		writel(raw_value | 0xffff0000, &cru->cru_emmc_con[1]);
+	else
+		writel(raw_value | 0xffff0000, &cru->cru_sdmmc_con[1]);
+
+	debug("mmc set_phase(%d) delay_nums=%u reg=%#x actual_degrees=%d\n",
+	      degrees, delay_num, raw_value, rockchip_mmc_get_phase(clk));
+
+	return 0;
+}
+
+static int rk3288_clk_get_phase(struct clk *clk)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_get_phase(clk);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
+static int rk3288_clk_set_phase(struct clk *clk, int degrees)
+{
+	int ret;
+
+	switch (clk->id) {
+	case SCLK_EMMC_SAMPLE:
+	case SCLK_SDMMC_SAMPLE:
+		ret = rockchip_mmc_set_phase(clk, degrees);
+		break;
+	default:
+		return -ENOENT;
+	}
+
+	return ret;
+}
+
 static struct clk_ops rk3288_clk_ops = {
 	.get_rate	= rk3288_clk_get_rate,
 	.set_rate	= rk3288_clk_set_rate,
+	.get_phase	= rk3288_clk_get_phase,
+	.set_phase	= rk3288_clk_set_phase,
 };
 
 static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)

commit b2259b20377dc9475cb602dd473cf125e519e6af
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:09 2017 +0800

    rockchip: clk: rk3288: fix mmc clock setting
    
    Mmc clock automatically divide 2 in internal.
    
    Before this:
    gpll = 594MHz, clock = 148.5MHz
    div = 594/148.5-1 = 3
    output clock is 99MHz
    
    After this:
    gpll = 594MHz, clock = 148.5MHz
    div = 297+148.5-1/148.5 = 2
    output clock is 148.5Mhz
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 478195b10b..31ec327f86 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -517,7 +517,7 @@ static ulong rockchip_mmc_get_clk(struct rk3288_cru *cru, uint gclk_rate,
 	}
 
 	src_rate = mux == EMMC_PLL_SELECT_24MHZ ? OSC_HZ : gclk_rate;
-	return DIV_TO_RATE(src_rate, div);
+	return DIV_TO_RATE(src_rate, div) / 2;
 }
 
 static ulong rockchip_mmc_set_clk(struct rk3288_cru *cru, uint gclk_rate,

commit 724f958711cb00e7bc38b286194101c69056c6f1
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:08 2017 +0800

    clk: introduce clk_phase get/set function & callback
    
    A common operation for a clock signal generator is to shift the phase of
    that signal. This patch introduces a new function to the clk.h API to
    dynamically adjust the phase of a clock signal. Additionally this patch
    introduces support for the new function in the clock framework via the
    .set_phase & .get_phase callback in struct clk_ops.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index e68d9279b9..4f9895b523 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -190,6 +190,26 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
 	return ops->set_rate(clk, rate);
 }
 
+int clk_get_phase(struct clk *clk)
+{
+	struct clk_ops *ops = clk_dev_ops(clk->dev);
+
+	if (!ops->get_phase)
+		return -ENOSYS;
+
+	return ops->get_phase(clk);
+}
+
+int clk_set_phase(struct clk *clk, int degrees)
+{
+	struct clk_ops *ops = clk_dev_ops(clk->dev);
+
+	if (!ops->set_phase)
+		return -ENOSYS;
+
+	return ops->set_phase(clk, degrees);
+}
+
 int clk_enable(struct clk *clk)
 {
 	struct clk_ops *ops = clk_dev_ops(clk->dev);
diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index e7ea334c60..a3eb3a987e 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -77,6 +77,23 @@ struct clk_ops {
 	 * @return new rate, or -ve error code.
 	 */
 	ulong (*set_rate)(struct clk *clk, ulong rate);
+	/**
+	 * clk_get_phase() - Get the phase shift of a clock signal.
+	 *
+	 * @clk:	The clock to manipulate.
+	 * @return the phase shift of a clock node in degrees,
+	 *		otherwise returns -ve error code.
+	 */
+	int (*get_phase)(struct clk *clk);
+
+	/**
+	 * clk_set_rate() - Adjust the phase shift of a clock signal.
+	 *
+	 * @clk:	The clock to manipulate.
+	 * @degrees:	Numberof degrees the signal is shifted.
+	 * @return 0 on success, or -ve error code.
+	 */
+	int (*set_phase)(struct clk *clk, int degrees);
 	/**
 	 * enable() - Enable a clock.
 	 *
diff --git a/include/clk.h b/include/clk.h
index c5988f78a8..6769c3f8e8 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -177,6 +177,26 @@ ulong clk_get_rate(struct clk *clk);
  */
 ulong clk_set_rate(struct clk *clk, ulong rate);
 
+/**
+ * clk_get_phase() - Get the phase shift of a clock signal.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @return the phase shift of a clock node in degrees, otherwise returns
+ *		-ve error code.
+ */
+int clk_get_phase(struct clk *clk);
+
+/**
+ * clk_set_rate() - Adjust the phase shift of a clock signal.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @degrees:	Numberof degrees the signal is shifted.
+ * @return 0 on success, or -ve error code.
+ */
+int clk_set_phase(struct clk *clk, int degrees);
+
 /**
  * clk_enable() - Enable (turn on) a clock.
  *

commit 3d4726e6b2cd97aafe2b4fe2c3b91d4eb658b61d
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:07 2017 +0800

    cmd: mmc: show the current speed mode
    
    So far mmc framework had support speed mode switch, it good to show the
    current speed mode from 'mmc info'.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index c635c50933..7b9d5fe991 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -15,6 +15,10 @@ static int curr_device = -1;
 static void print_mmcinfo(struct mmc *mmc)
 {
 	int i;
+	const char *timing[] = {
+		"Legacy", "High Speed", "High Speed", "SDR12",
+		"SDR25", "SDR50", "SDR104", "DDR50",
+		"DDR52", "HS200", "HS400", "HS400 Enhanced Strobe"};
 
 	printf("Device: %s\n", mmc->cfg->name);
 	printf("Manufacturer ID: %x\n", mmc->cid[0] >> 24);
@@ -23,6 +27,7 @@ static void print_mmcinfo(struct mmc *mmc)
 			(mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
 			(mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
 
+	printf("Timing Interface: %s\n", timing[mmc->timing]);
 	printf("Tran Speed: %d\n", mmc->clock);
 	printf("Rd Block Len: %d\n", mmc->read_bl_len);
 

commit 3e3ff0ac7798974e939459ad51ed1c8e58a3b9db
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:06 2017 +0800

    mmc: remove tran_speed from struct mmc
    
    The clock element is updated by mmc_set_clock every time, it denotes the
    current transfer speed.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index ea8adb248f..c635c50933 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -23,7 +23,7 @@ static void print_mmcinfo(struct mmc *mmc)
 			(mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
 			(mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
 
-	printf("Tran Speed: %d\n", mmc->tran_speed);
+	printf("Tran Speed: %d\n", mmc->clock);
 	printf("Rd Block Len: %d\n", mmc->read_bl_len);
 
 	printf("%s version %d.%d", IS_SD(mmc) ? "SD" : "MMC",
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 46f87c3dfe..c6938ba9ca 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1449,7 +1449,7 @@ static bool mmc_can_card_busy(struct mmc *)
 static int mmc_startup(struct mmc *mmc)
 {
 	int err, i;
-	uint mult, freq;
+	uint mult, freq, tran_speed;
 	u64 cmult, csize, capacity;
 	struct mmc_cmd cmd;
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
@@ -1545,7 +1545,7 @@ static int mmc_startup(struct mmc *mmc)
 	freq = fbase[(cmd.response[0] & 0x7)];
 	mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
 
-	mmc->tran_speed = freq * mult;
+	tran_speed = freq * mult;
 
 	mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
 	mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
@@ -1792,11 +1792,11 @@ static int mmc_startup(struct mmc *mmc)
 			return err;
 
 		if (mmc->card_caps & MMC_MODE_HS)
-			mmc->tran_speed = 50000000;
+			tran_speed = 50000000;
 		else
-			mmc->tran_speed = 25000000;
+			tran_speed = 25000000;
 
-		mmc_set_clock(mmc, mmc->tran_speed);
+		mmc_set_clock(mmc, tran_speed);
 	}
 
 	/* Fix the block length for DDR mode */
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 06bbff1ff5..b9a3338666 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -318,7 +318,7 @@ static void xenon_mask_cmd_conflict_err(struct sdhci_host *host)
 static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
 {
 	struct xenon_sdhci_priv *priv = host->mmc->priv;
-	uint speed = host->mmc->tran_speed;
+	uint speed = host->mmc->clock;
 	int pwr_18v = 0;
 
 	if ((sdhci_readb(host, SDHCI_POWER_CONTROL) & ~SDHCI_POWER_ON) ==
diff --git a/include/mmc.h b/include/mmc.h
index 18ef396b3d..4a9bfb5ff8 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -508,7 +508,6 @@ struct mmc {
 	u8 part_attr;
 	u8 wr_rel_set;
 	u8 part_config;
-	uint tran_speed;
 	uint read_bl_len;
 	uint write_bl_len;
 	uint erase_grp_size;	/* in 512-byte sectors */

commit caa21a21f1c85abdcf83060db76159fe85e8e540
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:05 2017 +0800

    mmc: rework ddr mode judgement with timing
    
    Since the card device is set the proper timing after speed mode switch
    is completed, host driver can get ddr_mode from timing parameter. So
    drop the antiquated ddr_mode.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 00697fc1f2..ea8adb248f 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -38,7 +38,7 @@ static void print_mmcinfo(struct mmc *mmc)
 	print_size(mmc->capacity, "\n");
 
 	printf("Bus Width: %d-bit%s\n", mmc->bus_width,
-			mmc->ddr_mode ? " DDR" : "");
+			mmc_card_ddr(mmc) ? " DDR" : "");
 
 	puts("Erase Group Size: ");
 	print_size(((u64)mmc->erase_grp_size) << 9, "\n");
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 3cdc5737d0..85696daaff 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -432,7 +432,7 @@ static int dwmci_set_ios(struct mmc *mmc)
 	dwmci_writel(host, DWMCI_CTYPE, ctype);
 
 	regs = dwmci_readl(host, DWMCI_UHS_REG);
-	if (mmc->ddr_mode)
+	if (mmc_card_ddr(mmc))
 		regs |= DWMCI_DDR_MODE;
 	else
 		regs &= ~DWMCI_DDR_MODE;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index cc188c4260..e3d1f91c94 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -407,7 +407,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 #if defined(CONFIG_FSL_USDHC)
 	esdhc_write32(&regs->mixctrl,
 	(esdhc_read32(&regs->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F)
-			| (mmc->ddr_mode ? XFERTYP_DDREN : 0));
+			| (mmc_card_ddr(mmc) ? XFERTYP_DDREN : 0));
 	esdhc_write32(&regs->xfertyp, xfertyp & 0xFFFF0000);
 #else
 	esdhc_write32(&regs->xfertyp, xfertyp);
@@ -548,7 +548,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
 	while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16)
 		div++;
 
-	pre_div >>= 1;
+	pre_div >>= mmc_card_ddr(mmc) ? 2 : 1;
 	div -= 1;
 
 	clk = (pre_div << 8) | (div << 4);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index f07f066099..46f87c3dfe 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -210,7 +210,7 @@ int mmc_set_blocklen(struct mmc *mmc, int len)
 {
 	struct mmc_cmd cmd;
 
-	if (mmc->ddr_mode)
+	if (mmc_card_ddr(mmc))
 		return 0;
 
 	cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
@@ -1933,7 +1933,6 @@ int mmc_start_init(struct mmc *mmc)
 	if (err)
 		return err;
 #endif
-	mmc->ddr_mode = 0;
 	mmc_set_bus_width(mmc, 1);
 	mmc_set_clock(mmc, 1);
 	mmc_set_timing(mmc, MMC_TIMING_LEGACY);
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index e272b14153..398bd5648a 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -532,7 +532,7 @@ static void uniphier_sd_set_ddr_mode(struct uniphier_sd_priv *priv,
 	u32 tmp;
 
 	tmp = readl(priv->regbase + UNIPHIER_SD_IF_MODE);
-	if (mmc->ddr_mode)
+	if (mmc_card_ddr(mmc))
 		tmp |= UNIPHIER_SD_IF_MODE_DDR;
 	else
 		tmp &= ~UNIPHIER_SD_IF_MODE_DDR;
@@ -599,7 +599,7 @@ static int uniphier_sd_set_ios(struct udevice *dev)
 	int ret;
 
 	dev_dbg(dev, "clock %uHz, DDRmode %d, width %u\n",
-		mmc->clock, mmc->ddr_mode, mmc->bus_width);
+		mmc->clock, mmc_card_ddr(mmc), mmc->bus_width);
 
 	ret = uniphier_sd_set_bus_width(priv, mmc);
 	if (ret)
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 83037fe7ec..06bbff1ff5 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -237,7 +237,7 @@ static void xenon_mmc_phy_set(struct sdhci_host *host)
 	sdhci_writew(host, var, SDHCI_CLOCK_CONTROL);
 
 	var = sdhci_readl(host, EMMC_PHY_FUNC_CONTROL);
-	if (host->mmc->ddr_mode) {
+	if (mmc_card_ddr(host->mmc)) {
 		var |= (DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) | CMD_DDR_MODE;
 	} else {
 		var &= ~((DQ_DDR_MODE_MASK << DQ_DDR_MODE_SHIFT) |
@@ -329,7 +329,7 @@ static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
 	if (IS_SD(host->mmc)) {
 		/* SD/SDIO */
 		if (pwr_18v) {
-			if (host->mmc->ddr_mode)
+			if (mmc_card_ddr(host->mmc))
 				priv->timing = MMC_TIMING_UHS_DDR50;
 			else if (speed <= 25000000)
 				priv->timing = MMC_TIMING_UHS_SDR25;
@@ -343,7 +343,7 @@ static void xenon_sdhci_set_ios_post(struct sdhci_host *host)
 		}
 	} else {
 		/* eMMC */
-		if (host->mmc->ddr_mode)
+		if (mmc_card_ddr(host->mmc))
 			priv->timing = MMC_TIMING_MMC_DDR52;
 		else if (speed <= 26000000)
 			priv->timing = MMC_TIMING_LEGACY;
diff --git a/include/mmc.h b/include/mmc.h
index ba63405a03..18ef396b3d 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -527,7 +527,6 @@ struct mmc {
 	char op_cond_pending;	/* 1 if we are waiting on an op_cond command */
 	char init_in_progress;	/* 1 if we have done mmc_start_init() */
 	char preinit;		/* start init as early as possible */
-	int ddr_mode;
 #if CONFIG_IS_ENABLED(DM_MMC)
 	struct udevice *dev;	/* Device for this MMC controller */
 #endif

commit 49dba0331173456ba11eb71244199939c037004b
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:04 2017 +0800

    mmc: add support for HS200 mode of eMMC4.5
    
    Add the support of the HS200 mode for eMMC 4.5 devices. The eMMC 4.5
    device has support up to 200MHz bus speed, it can speed up the boot speed.
    
    We can enable this feature via MMC_MODE_HS200 if the host controller has
    the ability to support HS200 timing. Also the tuning feature required
    when the HS200 mode is selected.
    
    By the way, mmc card can only switch to high speed mode in SPL stage.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index c8043c898a..f07f066099 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -318,6 +318,26 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 	return blkcnt;
 }
 
+void mmc_set_clock(struct mmc *mmc, uint clock)
+{
+	if (clock > mmc->cfg->f_max)
+		clock = mmc->cfg->f_max;
+
+	if (clock < mmc->cfg->f_min)
+		clock = mmc->cfg->f_min;
+
+	mmc->clock = clock;
+
+	mmc_set_ios(mmc);
+}
+
+static void mmc_set_bus_width(struct mmc *mmc, uint width)
+{
+	mmc->bus_width = width;
+
+	mmc_set_ios(mmc);
+}
+
 static void mmc_set_timing(struct mmc *mmc, uint timing)
 {
 	mmc->timing = timing;
@@ -587,6 +607,181 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 	return __mmc_switch(mmc, set, index, value, true);
 }
 
+static int mmc_select_bus_width(struct mmc *mmc)
+{
+	u32 ext_csd_bits[] = {
+		EXT_CSD_BUS_WIDTH_8,
+		EXT_CSD_BUS_WIDTH_4,
+	};
+	u32 bus_widths[] = {
+		MMC_BUS_WIDTH_8BIT,
+		MMC_BUS_WIDTH_4BIT,
+	};
+	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
+	ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
+	u32 idx, bus_width = 0;
+	int err = 0;
+
+	if (mmc->version < MMC_VERSION_4 ||
+	    !(mmc->cfg->host_caps & (MMC_MODE_4BIT | MMC_MODE_8BIT)))
+		return 0;
+
+	err = mmc_send_ext_csd(mmc, ext_csd);
+
+	if (err)
+		return err;
+
+	idx = (mmc->cfg->host_caps & MMC_MODE_8BIT) ? 0 : 1;
+
+	/*
+	 * Unlike SD, MMC cards dont have a configuration register to notify
+	 * supported bus width. So bus test command should be run to identify
+	 * the supported bus width or compare the ext csd values of current
+	 * bus width and ext csd values of 1 bit mode read earlier.
+	 */
+	for (; idx < ARRAY_SIZE(bus_widths); idx++) {
+		/*
+		 * Host is capable of 8bit transfer, then switch
+		 * the device to work in 8bit transfer mode. If the
+		 * mmc switch command returns error then switch to
+		 * 4bit transfer mode. On success set the corresponding
+		 * bus width on the host.
+		 */
+		err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+				 EXT_CSD_BUS_WIDTH, ext_csd_bits[idx]);
+		if (err)
+			continue;
+
+		bus_width = bus_widths[idx];
+		mmc_set_bus_width(mmc, bus_width);
+
+		err = mmc_send_ext_csd(mmc, test_csd);
+
+		if (err)
+			continue;
+
+		/* Only compare read only fields */
+		if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] ==
+			test_csd[EXT_CSD_PARTITIONING_SUPPORT]) &&
+		    (ext_csd[EXT_CSD_HC_WP_GRP_SIZE] ==
+			test_csd[EXT_CSD_HC_WP_GRP_SIZE]) &&
+		    (ext_csd[EXT_CSD_REV] == test_csd[EXT_CSD_REV]) &&
+			(ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] ==
+			test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]) &&
+		    !memcmp(&ext_csd[EXT_CSD_SEC_CNT],
+			&test_csd[EXT_CSD_SEC_CNT], 4)) {
+			err = bus_width;
+			break;
+		} else {
+			err = -EBADMSG;
+		}
+	}
+
+	return err;
+}
+
+static const u8 tuning_blk_pattern_4bit[] = {
+	0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
+	0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
+	0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
+	0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
+	0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
+	0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
+	0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
+	0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
+};
+
+static const u8 tuning_blk_pattern_8bit[] = {
+	0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
+	0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
+	0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
+	0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
+	0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
+	0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
+	0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
+	0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
+	0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
+	0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
+	0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
+	0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
+	0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
+	0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
+	0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
+	0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
+};
+
+int mmc_send_tuning(struct mmc *mmc, u32 opcode)
+{
+	struct mmc_cmd cmd;
+	struct mmc_data data;
+	const u8 *tuning_block_pattern;
+	int size, err = 0;
+	u8 *data_buf;
+
+	if (mmc->bus_width == MMC_BUS_WIDTH_8BIT) {
+		tuning_block_pattern = tuning_blk_pattern_8bit;
+		size = sizeof(tuning_blk_pattern_8bit);
+	} else if (mmc->bus_width == MMC_BUS_WIDTH_4BIT) {
+		tuning_block_pattern = tuning_blk_pattern_4bit;
+		size = sizeof(tuning_blk_pattern_4bit);
+	} else {
+		return -EINVAL;
+	}
+
+	data_buf = calloc(1, size);
+	if (!data_buf)
+		return -ENOMEM;
+
+	cmd.cmdidx = opcode;
+	cmd.resp_type = MMC_RSP_R1;
+	cmd.cmdarg = 0;
+
+	data.dest = (char *)data_buf;
+	data.blocksize = size;
+	data.blocks = 1;
+	data.flags = MMC_DATA_READ;
+
+	err = mmc_send_cmd(mmc, &cmd, &data);
+	if (err)
+		goto out;
+
+	if (memcmp(data_buf, tuning_block_pattern, size))
+		err = -EIO;
+out:
+	free(data_buf);
+	return err;
+}
+
+static int mmc_execute_tuning(struct mmc *mmc)
+{
+#ifdef CONFIG_DM_MMC
+	struct dm_mmc_ops *ops = mmc_get_ops(mmc->dev);
+#endif
+	u32 opcode;
+
+	if (IS_SD(mmc))
+		opcode = MMC_SEND_TUNING_BLOCK;
+	else
+		opcode = MMC_SEND_TUNING_BLOCK_HS200;
+
+#ifndef CONFIG_DM_MMC
+	if (mmc->cfg->ops->execute_tuning) {
+		return mmc->cfg->ops->execute_tuning(mmc, opcode);
+#else
+	if (ops->execute_tuning) {
+		return ops->execute_tuning(mmc->dev, opcode);
+#endif
+	} else {
+		debug("Tuning feature required for HS200 mode.\n");
+		return -EIO;
+	}
+}
+
+static int mmc_hs200_tuning(struct mmc *mmc)
+{
+	return mmc_execute_tuning(mmc);
+}
+
 static int mmc_select_hs(struct mmc *mmc)
 {
 	int ret;
@@ -600,6 +795,45 @@ static int mmc_select_hs(struct mmc *mmc)
 	return ret;
 }
 
+#ifndef CONFIG_SPL_BUILD
+static int mmc_select_hs200(struct mmc *mmc)
+{
+	int ret;
+	struct mmc_cmd cmd;
+
+	/*
+	 * Set the bus width(4 or 8) with host's support and
+	 * switch to HS200 mode if bus width is set successfully.
+	 */
+	ret = mmc_select_bus_width(mmc);
+
+	if (ret > 0) {
+		ret = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+				   EXT_CSD_HS_TIMING,
+				   EXT_CSD_TIMING_HS200, false);
+
+		if (ret)
+			return ret;
+
+		mmc_set_timing(mmc, MMC_TIMING_MMC_HS200);
+
+		cmd.cmdidx = MMC_CMD_SEND_STATUS;
+		cmd.resp_type = MMC_RSP_R1;
+		cmd.cmdarg = mmc->rca << 16;
+
+		ret = mmc_send_cmd(mmc, &cmd, NULL);
+
+		if (ret)
+			return ret;
+
+		if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
+			return -EBADMSG;
+	}
+
+	return ret;
+}
+#endif
+
 static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 {
 	u8 card_type;
@@ -651,10 +885,24 @@ static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 	return avail_type;
 }
 
+static void mmc_set_bus_speed(struct mmc *mmc, u8 avail_type)
+{
+	int clock = 0;
+
+	if (mmc_card_hs(mmc))
+		clock = (avail_type & EXT_CSD_CARD_TYPE_52) ?
+			MMC_HIGH_52_MAX_DTR : MMC_HIGH_26_MAX_DTR;
+	else if (mmc_card_hs200(mmc) ||
+		 mmc_card_hs400(mmc) ||
+		 mmc_card_hs400es(mmc))
+		clock = MMC_HS200_MAX_DTR;
+
+	mmc_set_clock(mmc, clock);
+}
+
 static int mmc_change_freq(struct mmc *mmc)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
-	char cardtype;
 	u32 avail_type;
 	int err;
 
@@ -674,9 +922,13 @@ static int mmc_change_freq(struct mmc *mmc)
 	if (err)
 		return err;
 
-	cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
 	avail_type = mmc_select_card_type(mmc, ext_csd);
 
+#ifndef CONFIG_SPL_BUILD
+	if (avail_type & EXT_CSD_CARD_TYPE_HS200)
+		err = mmc_select_hs200(mmc);
+	else
+#endif
 	if (avail_type & EXT_CSD_CARD_TYPE_HS)
 		err = mmc_select_hs(mmc);
 	else
@@ -685,26 +937,14 @@ static int mmc_change_freq(struct mmc *mmc)
 	if (err)
 		return err;
 
-	/* Now check to see that it worked */
-	err = mmc_send_ext_csd(mmc, ext_csd);
-
-	if (err)
-		return err;
+	mmc_set_bus_speed(mmc, avail_type);
 
-	/* No high-speed support */
-	if (!ext_csd[EXT_CSD_HS_TIMING])
-		return 0;
-
-	/* High Speed is set, there are two types: 52MHz and 26MHz */
-	if (cardtype & EXT_CSD_CARD_TYPE_52) {
-		if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
-			mmc->card_caps |= MMC_MODE_DDR_52MHz;
-		mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
-	} else {
-		mmc->card_caps |= MMC_MODE_HS;
-	}
+	if (mmc_card_hs200(mmc))
+		err = mmc_hs200_tuning(mmc);
+	else
+		err = mmc_select_bus_width(mmc) > 0 ? 0 : err;
 
-	return 0;
+	return err;
 }
 
 static int mmc_set_capacity(struct mmc *mmc, int part_num)
@@ -1206,26 +1446,6 @@ static bool mmc_can_card_busy(struct mmc *)
 }
 #endif
 
-void mmc_set_clock(struct mmc *mmc, uint clock)
-{
-	if (clock > mmc->cfg->f_max)
-		clock = mmc->cfg->f_max;
-
-	if (clock < mmc->cfg->f_min)
-		clock = mmc->cfg->f_min;
-
-	mmc->clock = clock;
-
-	mmc_set_ios(mmc);
-}
-
-static void mmc_set_bus_width(struct mmc *mmc, uint width)
-{
-	mmc->bus_width = width;
-
-	mmc_set_ios(mmc);
-}
-
 static int mmc_startup(struct mmc *mmc)
 {
 	int err, i;
@@ -1233,7 +1453,6 @@ static int mmc_startup(struct mmc *mmc)
 	u64 cmult, csize, capacity;
 	struct mmc_cmd cmd;
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
-	ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 	bool has_parts = false;
 	bool part_completed;
 	struct blk_desc *bdesc;
@@ -1576,102 +1795,12 @@ static int mmc_startup(struct mmc *mmc)
 			mmc->tran_speed = 50000000;
 		else
 			mmc->tran_speed = 25000000;
-	} else if (mmc->version >= MMC_VERSION_4) {
-		/* Only version 4 of MMC supports wider bus widths */
-		int idx;
-
-		/* An array of possible bus widths in order of preference */
-		static unsigned ext_csd_bits[] = {
-			EXT_CSD_DDR_BUS_WIDTH_8,
-			EXT_CSD_DDR_BUS_WIDTH_4,
-			EXT_CSD_BUS_WIDTH_8,
-			EXT_CSD_BUS_WIDTH_4,
-			EXT_CSD_BUS_WIDTH_1,
-		};
-
-		/* An array to map CSD bus widths to host cap bits */
-		static unsigned ext_to_hostcaps[] = {
-			[EXT_CSD_DDR_BUS_WIDTH_4] =
-				MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
-			[EXT_CSD_DDR_BUS_WIDTH_8] =
-				MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
-			[EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
-			[EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
-		};
-
-		/* An array to map chosen bus width to an integer */
-		static unsigned widths[] = {
-			8, 4, 8, 4, 1,
-		};
-
-		for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
-			unsigned int extw = ext_csd_bits[idx];
-			unsigned int caps = ext_to_hostcaps[extw];
-
-			/*
-			 * If the bus width is still not changed,
-			 * don't try to set the default again.
-			 * Otherwise, recover from switch attempts
-			 * by switching to 1-bit bus width.
-			 */
-			if (extw == EXT_CSD_BUS_WIDTH_1 &&
-					mmc->bus_width == 1) {
-				err = 0;
-				break;
-			}
-
-			/*
-			 * Check to make sure the card and controller support
-			 * these capabilities
-			 */
-			if ((mmc->card_caps & caps) != caps)
-				continue;
-
-			err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
-					EXT_CSD_BUS_WIDTH, extw);
-
-			if (err)
-				continue;
-
-			mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
-			mmc_set_bus_width(mmc, widths[idx]);
 
-			err = mmc_send_ext_csd(mmc, test_csd);
-
-			if (err)
-				continue;
-
-			/* Only compare read only fields */
-			if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
-				== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
-			    ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
-				== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
-			    ext_csd[EXT_CSD_REV]
-				== test_csd[EXT_CSD_REV] &&
-			    ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
-				== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
-			    memcmp(&ext_csd[EXT_CSD_SEC_CNT],
-				   &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
-				break;
-			else
-				err = -EBADMSG;
-		}
-
-		if (err)
-			return err;
-
-		if (mmc->card_caps & MMC_MODE_HS) {
-			if (mmc->card_caps & MMC_MODE_HS_52MHz)
-				mmc->tran_speed = 52000000;
-			else
-				mmc->tran_speed = 26000000;
-		}
+		mmc_set_clock(mmc, mmc->tran_speed);
 	}
 
-	mmc_set_clock(mmc, mmc->tran_speed);
-
 	/* Fix the block length for DDR mode */
-	if (mmc->ddr_mode) {
+	if (mmc_card_ddr(mmc)) {
 		mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
 		mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
 	}
diff --git a/include/mmc.h b/include/mmc.h
index 075a1aad3b..ba63405a03 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -85,6 +85,8 @@
 #define MMC_CMD_SET_BLOCKLEN		16
 #define MMC_CMD_READ_SINGLE_BLOCK	17
 #define MMC_CMD_READ_MULTIPLE_BLOCK	18
+#define MMC_SEND_TUNING_BLOCK		19
+#define MMC_SEND_TUNING_BLOCK_HS200	21
 #define MMC_CMD_SET_BLOCK_COUNT         23
 #define MMC_CMD_WRITE_SINGLE_BLOCK	24
 #define MMC_CMD_WRITE_MULTIPLE_BLOCK	25
@@ -391,6 +393,17 @@ struct dm_mmc_ops {
 	 * @return 0 if write-enabled, 1 if write-protected, -ve on error
 	 */
 	int (*get_wp)(struct udevice *dev);
+
+	/**
+	 * execute_tuning() - Find the optimal sampling point of a data
+	 *			input signals.
+	 *
+	 * @dev:	Device to check
+	 * @opcode:	The tuning command opcode value is different
+	 *		for SD and eMMC cards
+	 * @return 0 if write-enabled, 1 if write-protected, -ve on error
+	 */
+	int (*execute_tuning)(struct udevice *dev, u32 opcode);
 };
 
 #define mmc_get_ops(dev)        ((struct dm_mmc_ops *)(dev)->driver->ops)
@@ -417,6 +430,7 @@ struct mmc_ops {
 	int (*init)(struct mmc *mmc);
 	int (*getcd)(struct mmc *mmc);
 	int (*getwp)(struct mmc *mmc);
+	int (*execute_tuning)(struct udevice *dev, u32 opcode);
 };
 #endif
 
@@ -455,6 +469,11 @@ struct mmc {
 	uint has_init;
 	int high_capacity;
 	uint bus_width;
+
+#define MMC_BUS_WIDTH_1BIT	1
+#define MMC_BUS_WIDTH_4BIT	4
+#define MMC_BUS_WIDTH_8BIT	8
+
 	uint timing;
 
 #define MMC_TIMING_LEGACY	0
@@ -471,6 +490,12 @@ struct mmc {
 #define MMC_TIMING_MMC_HS400ES	11
 
 	uint clock;
+
+#define MMC_HIGH_26_MAX_DTR	26000000
+#define MMC_HIGH_52_MAX_DTR	52000000
+#define MMC_HIGH_DDR_MAX_DTR	52000000
+#define MMC_HS200_MAX_DTR	200000000
+
 	uint card_caps;
 	uint ocr;
 	uint dsr;
@@ -563,6 +588,8 @@ static inline bool mmc_card_hs400es(struct mmc *mmc)
 	return mmc->timing == MMC_TIMING_MMC_HS400ES;
 }
 
+int mmc_send_tuning(struct mmc *mmc, u32 opcode);
+
 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
 
 /**

commit 55e5defd207194cd5883c3f37ee40806ce624e1b
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:03 2017 +0800

    mmc: rework mmc_switch for non-send_status scenario
    
    Per JEDEC spec, it is not recommended to use cmd13 to get card status
    after speed mode switch. CMD13 can't be guaranteed due to the
    asynchronous operation.
    
    Besieds, if the host controller supports busy detection in HW, we use it
    instead of cmd13.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index e1e835849e..c8043c898a 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -523,10 +523,46 @@ static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 	return err;
 }
 
-int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
+static int mmc_poll_for_busy(struct mmc *mmc)
 {
 	struct mmc_cmd cmd;
+	u8 busy = true;
+	uint start;
+	int ret;
 	int timeout = 1000;
+
+	cmd.cmdidx = MMC_CMD_SEND_STATUS;
+	cmd.resp_type = MMC_RSP_R1;
+	cmd.cmdarg = mmc->rca << 16;
+
+	start = get_timer(0);
+
+	do {
+		if (mmc_can_card_busy(mmc)) {
+			busy = mmc_card_busy(mmc);
+		} else {
+			ret = mmc_send_cmd(mmc, &cmd, NULL);
+
+			if (ret)
+				return ret;
+
+			if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
+				return -EBADMSG;
+			busy = (cmd.response[0] & MMC_STATUS_CURR_STATE) ==
+				MMC_STATE_PRG;
+		}
+
+		if (get_timer(start) > timeout && busy)
+			return -ETIMEDOUT;
+	} while (busy);
+
+	return 0;
+}
+
+static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
+			u8 send_status)
+{
+	struct mmc_cmd cmd;
 	int retries = 3;
 	int ret;
 
@@ -536,20 +572,19 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 				 (index << 16) |
 				 (value << 8);
 
-	while (retries > 0) {
+	do {
 		ret = mmc_send_cmd(mmc, &cmd, NULL);
 
-		/* Waiting for the ready status */
-		if (!ret) {
-			ret = mmc_send_status(mmc, timeout);
-			return ret;
-		}
-
-		retries--;
-	}
+		if (!ret && send_status)
+			return mmc_poll_for_busy(mmc);
+	} while (--retries > 0 && ret);
 
 	return ret;
+}
 
+int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
+{
+	return __mmc_switch(mmc, set, index, value, true);
 }
 
 static int mmc_select_hs(struct mmc *mmc)

commit bdd003c0cb1d870daaf1cadfe524b2daa4192131
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:02 2017 +0800

    mmc: sdhci: implement card_busy detection
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index e79b98bd08..1b947dc7fc 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -422,6 +422,23 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 	sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 }
 
+#ifdef CONFIG_DM_MMC
+static bool sdhci_card_busy(struct udevice *dev)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static bool sdhci_card_busy(struct mmc *mmc)
+{
+#endif
+	struct sdhci_host *host = mmc->priv;
+	u32 present_state;
+
+	/* Check whether DAT[0] is 0 */
+	present_state = sdhci_readl(host, SDHCI_PRESENT_STATE);
+
+	return !(present_state & SDHCI_DATA_0_LVL);
+}
+
 #ifdef CONFIG_DM_MMC
 static int sdhci_set_ios(struct udevice *dev)
 {
@@ -509,11 +526,13 @@ int sdhci_probe(struct udevice *dev)
 }
 
 const struct dm_mmc_ops sdhci_ops = {
+	.card_busy	= sdhci_card_busy,
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
 };
 #else
 static const struct mmc_ops sdhci_ops = {
+	.card_busy	= sdhci_card_busy,
 	.send_cmd	= sdhci_send_command,
 	.set_ios	= sdhci_set_ios,
 	.init		= sdhci_init,
diff --git a/include/sdhci.h b/include/sdhci.h
index 7e84012f60..4348f1149d 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -64,6 +64,7 @@
 #define  SDHCI_CARD_STATE_STABLE	BIT(17)
 #define  SDHCI_CARD_DETECT_PIN_LEVEL	BIT(18)
 #define  SDHCI_WRITE_PROTECT	BIT(19)
+#define SDHCI_DATA_0_LVL	BIT(20)
 
 #define SDHCI_HOST_CONTROL	0x28
 #define  SDHCI_CTRL_LED		BIT(0)

commit ba0e56e1b7a9a529af8105ad005a730a7656d1ca
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:01 2017 +0800

    mmc: dw_mmc: implement card_busy detection
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 23f642980b..3cdc5737d0 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -383,6 +383,26 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
 	return 0;
 }
 
+#ifdef CONFIG_DM_MMC
+static bool dwmci_card_busy(struct udevice *dev)
+{
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+#else
+static bool dwmci_card_busy(struct mmc *mmc)
+{
+#endif
+	u32 status;
+	struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
+
+	/*
+	 * Check the busy bit which is low when DAT[3:0]
+	 * (the data lines) are 0000
+	 */
+	status = dwmci_readl(host, DWMCI_STATUS);
+
+	return !!(status & DWMCI_BUSY);
+}
+
 #ifdef CONFIG_DM_MMC
 static int dwmci_set_ios(struct udevice *dev)
 {
@@ -475,12 +495,14 @@ int dwmci_probe(struct udevice *dev)
 }
 
 const struct dm_mmc_ops dm_dwmci_ops = {
+	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
 };
 
 #else
 static const struct mmc_ops dwmci_ops = {
+	.card_busy	= dwmci_card_busy,
 	.send_cmd	= dwmci_send_cmd,
 	.set_ios	= dwmci_set_ios,
 	.init		= dwmci_init,

commit ad77484a25657c67fa9e48ed7e125617670297bf
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:07:00 2017 +0800

    mmc: add card_busy to query card status
    
    Card devices get into busy status since host request speed mode
    switch, if host controller is able to query whether the device is busy,
    try it instead of sending cmd13.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 5dda20cda5..1a11844cae 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -37,6 +37,22 @@ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 	return dm_mmc_send_cmd(mmc->dev, cmd, data);
 }
 
+bool mmc_card_busy(struct mmc *mmc)
+{
+	struct dm_mmc_ops *ops = mmc_get_ops(mmc->dev);
+
+	if (!ops->card_busy)
+		return -ENOSYS;
+	return ops->card_busy(mmc->dev);
+}
+
+bool mmc_can_card_busy(struct mmc *mmc)
+{
+	struct dm_mmc_ops *ops = mmc_get_ops(mmc->dev);
+
+	return !!ops->card_busy;
+}
+
 int dm_mmc_set_ios(struct udevice *dev)
 {
 	struct dm_mmc_ops *ops = mmc_get_ops(dev);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d3bc99abc9..e1e835849e 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1156,6 +1156,19 @@ static void mmc_set_ios(struct mmc *mmc)
 	if (mmc->cfg->ops->set_ios)
 		mmc->cfg->ops->set_ios(mmc);
 }
+
+static bool mmc_card_busy(struct mmc *mmc)
+{
+	if (!mmc->cfg->ops->card_busy)
+		return -ENOSYS;
+
+	return mmc->cfg->ops->card_busy(mmc);
+}
+
+static bool mmc_can_card_busy(struct mmc *)
+{
+	return !!mmc->cfg->ops->card_busy;
+}
 #endif
 
 void mmc_set_clock(struct mmc *mmc, uint clock)
diff --git a/include/mmc.h b/include/mmc.h
index 418f842dd2..075a1aad3b 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -360,6 +360,14 @@ struct dm_mmc_ops {
 	int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd,
 			struct mmc_data *data);
 
+	/**
+	 * card_busy() - Query the card device status
+	 *
+	 * @dev:	Device to update
+	 * @return true if card device is busy
+	 */
+	bool (*card_busy)(struct udevice *dev);
+
 	/**
 	 * set_ios() - Set the I/O speed/width for an MMC device
 	 *
@@ -394,12 +402,15 @@ int dm_mmc_get_cd(struct udevice *dev);
 int dm_mmc_get_wp(struct udevice *dev);
 
 /* Transition functions for compatibility */
+bool mmc_card_busy(struct mmc *mmc);
+bool mmc_can_card_busy(struct mmc *mmc);
 int mmc_set_ios(struct mmc *mmc);
 int mmc_getcd(struct mmc *mmc);
 int mmc_getwp(struct mmc *mmc);
 
 #else
 struct mmc_ops {
+	bool (*card_busy)(struct mmc *mmc);
 	int (*send_cmd)(struct mmc *mmc,
 			struct mmc_cmd *cmd, struct mmc_data *data);
 	int (*set_ios)(struct mmc *mmc);

commit 9f83e5c69a86e120991ff069c4d61f969593c182
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:59 2017 +0800

    mmc: sdhci: fix HISPD bit setting
    
    Configure HISPD bit field according to the timing parameter instead of
    the card clock frequency.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 11d1f0c24c..e79b98bd08 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -456,14 +456,12 @@ static int sdhci_set_ios(struct mmc *mmc)
 			ctrl &= ~SDHCI_CTRL_4BITBUS;
 	}
 
-	if (mmc->clock > 26000000)
+	if (!(mmc->timing == MMC_TIMING_LEGACY) &&
+	    !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT))
 		ctrl |= SDHCI_CTRL_HISPD;
 	else
 		ctrl &= ~SDHCI_CTRL_HISPD;
 
-	if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
-		ctrl &= ~SDHCI_CTRL_HISPD;
-
 	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 
 	/* If available, call the driver specific "post" set_ios() function */

commit e61cd3d745c6ec050bffc7d1e9ba81c391984113
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:58 2017 +0800

    mmc: rework high speed mode selection
    
    Select timing parameter for the host since HS mode switch is completed.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 9a0f19b67f..d3bc99abc9 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -552,6 +552,19 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 
 }
 
+static int mmc_select_hs(struct mmc *mmc)
+{
+	int ret;
+
+	ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+			 EXT_CSD_HS_TIMING, EXT_CSD_TIMING_HS);
+
+	if (!ret)
+		mmc_set_timing(mmc, MMC_TIMING_MMC_HS);
+
+	return ret;
+}
+
 static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
 {
 	u8 card_type;
@@ -630,8 +643,7 @@ static int mmc_change_freq(struct mmc *mmc)
 	avail_type = mmc_select_card_type(mmc, ext_csd);
 
 	if (avail_type & EXT_CSD_CARD_TYPE_HS)
-		err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
-				 EXT_CSD_HS_TIMING, 1);
+		err = mmc_select_hs(mmc);
 	else
 		err = -EINVAL;
 
diff --git a/include/mmc.h b/include/mmc.h
index 441f3eb273..418f842dd2 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -228,6 +228,12 @@
 #define EXT_CSD_DDR_BUS_WIDTH_4	5	/* Card is in 4 bit DDR mode */
 #define EXT_CSD_DDR_BUS_WIDTH_8	6	/* Card is in 8 bit DDR mode */
 
+#define EXT_CSD_TIMING_BC	0	/* Backwards compatility */
+#define EXT_CSD_TIMING_HS	1	/* High speed */
+#define EXT_CSD_TIMING_HS200	2	/* HS200 */
+#define EXT_CSD_TIMING_HS400	3	/* HS400 */
+#define EXT_CSD_DRV_STR_SHIFT	4	/* Driver Strength shift */
+
 #define EXT_CSD_BOOT_ACK_ENABLE			(1 << 6)
 #define EXT_CSD_BOOT_PARTITION_ENABLE		(1 << 3)
 #define EXT_CSD_PARTITION_ACCESS_ENABLE		(1 << 0)

commit 543bfa6c21c2e4e265bee19592b660f9e840b3de
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:57 2017 +0800

    mmc: xenon_sdhci: drop redundant timing definitions
    
    Remove the redundant mmc timing definitions which have defined in mmc.h.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 2b7cb7f6b6..83037fe7ec 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -94,18 +94,6 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Hyperion only have one slot 0 */
 #define XENON_MMC_SLOT_ID_HYPERION		0
 
-#define MMC_TIMING_LEGACY	0
-#define MMC_TIMING_MMC_HS	1
-#define MMC_TIMING_SD_HS	2
-#define MMC_TIMING_UHS_SDR12	3
-#define MMC_TIMING_UHS_SDR25	4
-#define MMC_TIMING_UHS_SDR50	5
-#define MMC_TIMING_UHS_SDR104	6
-#define MMC_TIMING_UHS_DDR50	7
-#define MMC_TIMING_MMC_DDR52	8
-#define MMC_TIMING_MMC_HS200	9
-#define MMC_TIMING_MMC_HS400	10
-
 #define XENON_MMC_MAX_CLK	400000000
 
 enum soc_pad_ctrl_type {

commit 81db2d363c233b49c5ea7a305b0c75c1aa940b34
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:56 2017 +0800

    mmc: add set_timing entry for timing selection
    
    Some controller should do some configuration according to the selected
    timing.
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index e49f292196..9a0f19b67f 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -318,6 +318,12 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 	return blkcnt;
 }
 
+static void mmc_set_timing(struct mmc *mmc, uint timing)
+{
+	mmc->timing = timing;
+	mmc_set_ios(mmc);
+}
+
 static int mmc_go_idle(struct mmc *mmc)
 {
 	struct mmc_cmd cmd;
@@ -1741,6 +1747,7 @@ int mmc_start_init(struct mmc *mmc)
 	mmc->ddr_mode = 0;
 	mmc_set_bus_width(mmc, 1);
 	mmc_set_clock(mmc, 1);
+	mmc_set_timing(mmc, MMC_TIMING_LEGACY);
 
 	/* Reset the Card */
 	err = mmc_go_idle(mmc);
diff --git a/include/mmc.h b/include/mmc.h
index 3c06cd596c..441f3eb273 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -438,6 +438,21 @@ struct mmc {
 	uint has_init;
 	int high_capacity;
 	uint bus_width;
+	uint timing;
+
+#define MMC_TIMING_LEGACY	0
+#define MMC_TIMING_MMC_HS	1
+#define MMC_TIMING_SD_HS	2
+#define MMC_TIMING_UHS_SDR12	3
+#define MMC_TIMING_UHS_SDR25	4
+#define MMC_TIMING_UHS_SDR50	5
+#define MMC_TIMING_UHS_SDR104	6
+#define MMC_TIMING_UHS_DDR50	7
+#define MMC_TIMING_MMC_DDR52	8
+#define MMC_TIMING_MMC_HS200	9
+#define MMC_TIMING_MMC_HS400	10
+#define MMC_TIMING_MMC_HS400ES	11
+
 	uint clock;
 	uint card_caps;
 	uint ocr;
@@ -497,6 +512,40 @@ enum mmc_hwpart_conf_mode {
 	MMC_HWPART_CONF_COMPLETE,
 };
 
+static inline bool mmc_card_hs(struct mmc *mmc)
+{
+	return (mmc->timing == MMC_TIMING_MMC_HS) ||
+		(mmc->timing == MMC_TIMING_SD_HS);
+}
+
+static inline bool mmc_card_ddr(struct mmc *mmc)
+{
+	return (mmc->timing == MMC_TIMING_UHS_DDR50) ||
+		(mmc->timing == MMC_TIMING_MMC_DDR52) ||
+		(mmc->timing == MMC_TIMING_MMC_HS400) ||
+		(mmc->timing == MMC_TIMING_MMC_HS400ES);
+}
+
+static inline bool mmc_card_hs200(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_HS200;
+}
+
+static inline bool mmc_card_ddr52(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_DDR52;
+}
+
+static inline bool mmc_card_hs400(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_HS400;
+}
+
+static inline bool mmc_card_hs400es(struct mmc *mmc)
+{
+	return mmc->timing == MMC_TIMING_MMC_HS400ES;
+}
+
 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv);
 
 /**

commit 227f658e55a6b1c7c219babd1bfd1130aac4568d
Author: Ziyuan Xu <xzy.xu@rock-chips.com>
Date:   Mon May 15 14:06:55 2017 +0800

    mmc: select the available type from host_caps and card_caps
    
    The original implementation select HS timing by default, add available
    type selection for higher speed mode compatibility, such as hs200,
    hs400, hs400es.
    
    By the way, we assume that card run at 1.8V or 1.2V I/O when its timing
    is ddr52/hs200/hs400(es).
    
    Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 38d2e07dd5..e49f292196 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -546,10 +546,62 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 
 }
 
+static u32 mmc_select_card_type(struct mmc *mmc, u8 *ext_csd)
+{
+	u8 card_type;
+	u32 host_caps, avail_type = 0;
+
+	card_type = ext_csd[EXT_CSD_CARD_TYPE];
+	host_caps = mmc->cfg->host_caps;
+
+	if ((host_caps & MMC_MODE_HS) &&
+	    (card_type & EXT_CSD_CARD_TYPE_26))
+		avail_type |= EXT_CSD_CARD_TYPE_26;
+
+	if ((host_caps & MMC_MODE_HS) &&
+	    (card_type & EXT_CSD_CARD_TYPE_52))
+		avail_type |= EXT_CSD_CARD_TYPE_52;
+
+	/*
+	 * For the moment, u-boot doesn't support signal voltage
+	 * switch, therefor we assume that host support ddr52
+	 * at 1.8v or 3.3v I/O(1.2v I/O not supported, hs200 and
+	 * hs400 are the same).
+	 */
+	if ((host_caps & MMC_MODE_DDR_52MHz) &&
+	    (card_type & EXT_CSD_CARD_TYPE_DDR_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_DDR_1_8V;
+
+	if ((host_caps & MMC_MODE_HS200) &&
+	    (card_type & EXT_CSD_CARD_TYPE_HS200_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V;
+
+	/*
+	 * If host can support HS400, it means that host can also
+	 * support HS200.
+	 */
+	if ((host_caps & MMC_MODE_HS400) &&
+	    (host_caps & MMC_MODE_8BIT) &&
+	    (card_type & EXT_CSD_CARD_TYPE_HS400_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V |
+				EXT_CSD_CARD_TYPE_HS400_1_8V;
+
+	if ((host_caps & MMC_MODE_HS400ES) &&
+	    (host_caps & MMC_MODE_8BIT) &&
+	    ext_csd[EXT_CSD_STROBE_SUPPORT] &&
+	    (avail_type & EXT_CSD_CARD_TYPE_HS400_1_8V))
+		avail_type |= EXT_CSD_CARD_TYPE_HS200_1_8V |
+				EXT_CSD_CARD_TYPE_HS400_1_8V |
+				EXT_CSD_CARD_TYPE_HS400ES;
+
+	return avail_type;
+}
+
 static int mmc_change_freq(struct mmc *mmc)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 	char cardtype;
+	u32 avail_type;
 	int err;
 
 	mmc->card_caps = 0;
@@ -569,8 +621,13 @@ static int mmc_change_freq(struct mmc *mmc)
 		return err;
 
 	cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
+	avail_type = mmc_select_card_type(mmc, ext_csd);
 
-	err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
+	if (avail_type & EXT_CSD_CARD_TYPE_HS)
+		err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+				 EXT_CSD_HS_TIMING, 1);
+	else
+		err = -EINVAL;
 
 	if (err)
 		return err;
diff --git a/include/mmc.h b/include/mmc.h
index 010ebe048c..3c06cd596c 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -58,6 +58,9 @@
 #define MMC_MODE_8BIT		(1 << 3)
 #define MMC_MODE_SPI		(1 << 4)
 #define MMC_MODE_DDR_52MHz	(1 << 5)
+#define MMC_MODE_HS200		(1 << 6)
+#define MMC_MODE_HS400		(1 << 7)
+#define MMC_MODE_HS400ES	(1 << 8)
 
 #define SD_DATA_4BIT	0x00040000
 
@@ -182,6 +185,7 @@
 #define EXT_CSD_BOOT_BUS_WIDTH		177
 #define EXT_CSD_PART_CONF		179	/* R/W */
 #define EXT_CSD_BUS_WIDTH		183	/* R/W */
+#define EXT_CSD_STROBE_SUPPORT		184	/* RO */
 #define EXT_CSD_HS_TIMING		185	/* R/W */
 #define EXT_CSD_REV			192	/* RO */
 #define EXT_CSD_CARD_TYPE		196	/* RO */
@@ -201,6 +205,18 @@
 
 #define EXT_CSD_CARD_TYPE_26	(1 << 0)	/* Card can run at 26MHz */
 #define EXT_CSD_CARD_TYPE_52	(1 << 1)	/* Card can run at 52MHz */
+#define EXT_CSD_CARD_TYPE_HS	(EXT_CSD_CARD_TYPE_26 | \
+				 EXT_CSD_CARD_TYPE_52)
+#define EXT_CSD_CARD_TYPE_HS200_1_8V	BIT(4)	/* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200_1_2V	BIT(5)	/* Card can run at 200MHz */
+#define EXT_CSD_CARD_TYPE_HS200		(EXT_CSD_CARD_TYPE_HS200_1_8V | \
+					 EXT_CSD_CARD_TYPE_HS200_1_2V)
+#define EXT_CSD_CARD_TYPE_HS400_1_8V	BIT(6)	/* Card can run at 200MHz DDR, 1.8V */
+#define EXT_CSD_CARD_TYPE_HS400_1_2V	BIT(7)	/* Card can run at 200MHz DDR, 1.2V */
+#define EXT_CSD_CARD_TYPE_HS400		(EXT_CSD_CARD_TYPE_HS400_1_8V | \
+					 EXT_CSD_CARD_TYPE_HS400_1_2V)
+#define EXT_CSD_CARD_TYPE_HS400ES	BIT(8)	/* Card can run at HS400ES */
+
 #define EXT_CSD_CARD_TYPE_DDR_1_8V	(1 << 2)
 #define EXT_CSD_CARD_TYPE_DDR_1_2V	(1 << 3)
 #define EXT_CSD_CARD_TYPE_DDR_52	(EXT_CSD_CARD_TYPE_DDR_1_8V \

commit 01637644e2b9c7365b1189bed6e3c8a0d4099057
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed May 17 11:11:35 2017 +0800

    rockchip: evb-rk3328: set uart2 and sdmmc io routing
    
    In rk3328, some function pin may have more than one choice, and muxed
    with more than one IO, for example, the UART2 controller IO,
    TX and RX, have 3 choice(setting in com_iomux):
    - M0 which mux with GPIO1A0/GPIO1A1
    - M1 which mux with GPIO2A0/GPIO2A1
    - usb2phy which mux with USB2.0 DP/DM pin.
    
    We should set these IO routing in board file.
    
    Change-Id: If6f6fd890d8e225cdb584a4025aac578198764e6
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c
index 99a73dacf1..d6fc57cd8e 100644
--- a/board/rockchip/evb_rk3328/evb-rk3328.c
+++ b/board/rockchip/evb_rk3328/evb-rk3328.c
@@ -5,7 +5,10 @@
  */
 
 #include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3328.h>
 #include <asm/armv8/mmu.h>
+#include <asm/io.h>
 #include <dwc3-uboot.h>
 #include <power/regulator.h>
 #include <usb.h>
@@ -15,6 +18,14 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_init(void)
 {
 	int ret;
+#define GRF_BASE	0xff100000
+	struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
+
+	/* uart2 select m1, sdcard select m1*/
+	rk_clrsetreg(&grf->com_iomux,
+		     IOMUX_SEL_UART2_MASK | IOMUX_SEL_SDMMC_MASK,
+		     IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT |
+		     IOMUX_SEL_SDMMC_M1 << IOMUX_SEL_SDMMC_SHIFT);
 
 	ret = regulators_enable_boot_on(false);
 	if (ret)

commit 781954d5fd41dbe94bce20f227ac0ced1f72af31
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Fri Apr 7 18:08:18 2017 +0800

    rk3399: set sram and ddr as non-secure region
    
    Some host like SD and eMMC may use DMA to transter data,
    set memory to non-secure to make sure the address can be accessed.
    
    Change-Id: Ieab393a316e3e88af98385c84daba44502bba62c
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index d6bf74f7ad..a3708caa03 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -103,6 +103,8 @@ void board_init_f(ulong dummy)
 	printascii("U-Boot SPL board init");
 #endif
 
+	rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0x200);
+	rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
 	/*  Emmc clock generator: disable the clock multipilier */
 	rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
 

commit 0f0669eabbf46c6814c82dbe3843a8cc7737e0c6
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Sat Oct 8 15:01:50 2016 +0800

    rk3399: config: enable usb mass storage gadget
    
    Change-Id: I588e2260d8ce07ebd6cc1fd8e6809b2e960fd600
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index aa65cbd9ee..cbdfdda503 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -92,3 +92,4 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_BUF_ADDR=0x00800800
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
+CONFIG_CMD_USB_MASS_STORAGE=y
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 1d7a87271c..f342c29260 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -42,6 +42,8 @@
 #define CONFIG_SUPPORT_VFAT
 #define CONFIG_FS_EXT4
 
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+
 /* RAW SD card / eMMC locations. */
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
 

commit 02ef5c83a3f7b29c4c0de64c3a219e639aaf562f
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 31 16:40:02 2016 +0800

    FROMLIST: config: rk3399: add support for dwc3 gadget
    
    To support fastboot, we need to enable the controller first.
    rk3399 is using dwc3 as usb device controller, this patch enable
    the configs for dwc3 gadget.
    
    Change-Id: I2726ed1c35897c2366c1c9766fdf460baab23975
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
    
    Conflicts:
            configs/evb-rk3399_defconfig

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 7a0bd4aec9..aa65cbd9ee 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -76,3 +76,19 @@ CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
 CONFIG_DISPLAY_ROCKCHIP_MIPI=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_ERRNO_STR=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_VBUS_DRAW=0
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Rockchip"
+CONFIG_G_DNL_VENDOR_NUM=0x2207
+CONFIG_G_DNL_PRODUCT_NUM=0x330a
+CONFIG_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x08000000

commit da65ef61af2d5b0475a0deee4bf63000efd35eea
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 31 16:40:00 2016 +0800

    FROMLIST: board: evb-rk3399: add api to support dwc3 gadget
    
    This patch add board_usb_init() and interrupt callback
    for dwc3 gadget.
    
    Change-Id: I1ea19c0ec7d3fd14904e7fcc97c6d19221206762
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index d50c59db8d..2d642a7a09 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -10,6 +10,8 @@
 #include <dm/uclass-internal.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
+#include <usb.h>
+#include <dwc3-uboot.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -67,3 +69,24 @@ int board_init(void)
 out:
 	return 0;
 }
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfe800000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif

commit 41933c04adca8c0bf3d02c4758932a44cad780d3
Author: Kever Yang <kever.yang@rock-chips.com>
Date:   Wed Aug 31 16:40:01 2016 +0800

    FROMLIST: usb: dwc3: add support for 16 bit UTMI+ interface
    
    The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
    add one variable in dwc3/dwc3_device struct to support 16 bit
    UTMI+ interface on some SoCs like Rockchip rk3399.
    
    Change-Id: Ic5db5e9ee845b5f9d2848bb44fbf07c094b3b5a7
    Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 87b9c87edf..1cbf17967a 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -16,6 +16,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <fdtdec.h>
 #include <dwc3-uboot.h>
 #include <asm/dma-mapping.h>
 #include <linux/ioport.h>
@@ -29,6 +30,8 @@
 
 #include "linux-compat.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 static LIST_HEAD(dwc3_list);
 /* -------------------------------------------------------------------------- */
 
@@ -390,6 +393,11 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->dis_u2_susphy_quirk)
 		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 
+	if (dwc->usb2_phyif_utmi_width == 16) {
+		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+		reg |= DWC3_GUSB2PHYCFG_PHYIF_16BIT;
+	}
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
 	mdelay(100);
@@ -623,6 +631,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 	int			ret;
 
 	void			*mem;
+	const void *blob = gd->fdt_blob;
+	int node;
 
 	mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
 	if (!mem)
@@ -684,6 +694,14 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 
 	dwc->index = dwc3_dev->index;
 
+	node = fdt_node_offset_by_compatible(blob, -1,
+			"rockchip,rk3399-xhci");
+	if (node < 0)
+		debug("%s dwc3 node not found\n", __func__);
+	else
+		dwc->usb2_phyif_utmi_width =
+			fdtdec_get_int(blob, node, "snps,phyif-utmi-bits", -1);
+
 	dwc3_cache_hwparams(dwc);
 
 	ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 72d2fcdd3f..0c61c51467 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -74,6 +74,7 @@
 #define DWC3_GCTL		0xc110
 #define DWC3_GEVTEN		0xc114
 #define DWC3_GSTS		0xc118
+#define DWC3_GUCTL1		0xc11c
 #define DWC3_GSNPSID		0xc120
 #define DWC3_GGPIO		0xc124
 #define DWC3_GUID		0xc128
@@ -162,7 +163,17 @@
 
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
+#define DWC3_GUSB2PHYCFG_ENBLSLPM   (1 << 8)
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
+#define DWC3_GUSB2PHYCFG_PHYIF_8BIT	(0 << 3)
+#define DWC3_GUSB2PHYCFG_PHYIF_16BIT	(1 << 3)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT	(10)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK	(0xf << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT (0x5 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT (0x9 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_SHIFT)
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
@@ -813,6 +824,7 @@ struct dwc3 {
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;
+	unsigned		usb2_phyif_utmi_width:5;
 	int			index;
 	struct list_head        list;
 };

commit c98ac3487e413c71e5d36322ef3324b21c6f60f9
Author: Tom Rini <trini@konsulko.com>
Date:   Mon Sep 11 14:10:40 2017 -0400

    Prepare v2017.09
    
    Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/Makefile b/Makefile
index 5bb3b09115..8086f3c93e 100644
--- a/Makefile
+++ b/Makefile
@@ -5,7 +5,7 @@
 VERSION = 2017
 PATCHLEVEL = 09
 SUBLEVEL =
-EXTRAVERSION = -rc4
+EXTRAVERSION =
 NAME =
 
 # *DOCUMENTATION*

commit bbfbdb5722ea3bc6f600d315ed3e539bb74615d5
Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date:   Mon Sep 11 16:07:02 2017 +0200

    MAINTAINERS: board: qcom: db410c: Maintainer changed
    
    Replacing original author Mateusz Kulikowski
    <mateusz.kulikowski@gmail.com> as db410c maintainer
    
    Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>

diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS b/board/qualcomm/dragonboard410c/MAINTAINERS
index 65cb47cb5d..f9ddc9dde1 100644
--- a/board/qualcomm/dragonboard410c/MAINTAINERS
+++ b/board/qualcomm/dragonboard410c/MAINTAINERS
@@ -1,5 +1,5 @@
 DRAGONBOARD410C BOARD
-M:	Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+M:	Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
 S:	Maintained
 F:	board/qualcomm/dragonboard410c/
 F:	include/configs/dragonboard410c.h
